diff -Nrcpad gcc-9.3.0/.gitattributes gcc-10.1.0/.gitattributes
*** gcc-9.3.0/.gitattributes	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/.gitattributes	Thu May  7 10:49:58 2020
***************
*** 1 ****
! *.{c,C,cc,h} whitespace=indent-with-non-tab,space-before-tab,trailing-space
--- 1,10 ----
! # Add indent-with-non-tab to the default git whitespace warnings.
! # Note that this file doesn't support bash-style brace expansion.
! 
! *.[cCh] whitespace=indent-with-non-tab,space-before-tab,trailing-space
! *.cc whitespace=indent-with-non-tab,space-before-tab,trailing-space
! ChangeLog whitespace=indent-with-non-tab,space-before-tab,trailing-space
! # Make diff on MD files use "(define" as a function marker.
! # Use together with git config diff.md.xfuncname '^\(define.*$'
! # which is run by contrib/gcc-git-customization.sh too.
! *.md diff=md
diff -Nrcpad gcc-9.3.0/.gitignore gcc-10.1.0/.gitignore
*** gcc-9.3.0/.gitignore	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/.gitignore	Thu May  7 10:49:58 2020
*************** TAGS.sub
*** 36,41 ****
--- 36,43 ----
  .lvimrc
  
  .clang-format
+ .clangd
+ compile_commands.json
  
  .gdbinit
  .gdb_history
diff -Nrcpad gcc-9.3.0/ChangeLog gcc-10.1.0/ChangeLog
*** gcc-9.3.0/ChangeLog	Thu Mar 12 11:08:03 2020
--- gcc-10.1.0/ChangeLog	Thu May  7 10:50:32 2020
***************
*** 1,18 ****
! 2020-03-12  Release Manager
  
! 	* GCC 9.3.0 released.
  
! 2019-08-12  Release Manager
  
! 	* GCC 9.2.0 released.
  
! 2019-05-04  Michael Meissner  <meissner@linux.ibm.com>
  
! 	* ChangeLog.ibm: Delete unintentional commit on the wrong branch.
  
! 2019-05-03  Release Manager
  
! 	* GCC 9.1.0 released.
  
  2019-04-22  Roman Zhuykov  <zhroma@ispras.ru>
  
--- 1,333 ----
! 2020-05-07  Release Manager
  
! 	* GCC 10.1.0 released.
  
! 2020-04-29  Thomas Schwinge  <thomas@codesourcery.com>
  
! 	PR target/92713
! 	* configure.ac ["${ENABLE_LIBSTDCXX}" = "default" && amdgcn*-*-*]
! 	(noconfigdirs): Add 'target-libstdc++-v3'.
! 	* configure: Regenerate.
  
! 2020-04-21  Stephen Casner  <casner@acm.org>
  
! 	PR 25830
! 	* configure.ac (noconfigdirs): Exclude gdb & gprof for pdp11.
! 	* configure: Rebuild.
  
! 2020-04-17  Martin Liska  <mliska@suse.cz>
! 	    Jonathan Yong <10walls@gmail.com>
  
! 	PR gcov-profile/94570
! 	* ltmain.sh: Do not define HAVE_DOS_BASED_FILE_SYSTEM
! 	for CYGWIN.
! 
! 2020-04-14  Martin Jambor  <mjambor@suse.cz>
! 
! 	* MAINTAINERS (Reviewers): Add myself as callgraph (IPA) reviewer.
! 
! 2020-04-09  Tom Tromey  <tom@tromey.com>
! 
! 	* configure: Rebuild.
! 	* Makefile.in: Rebuild.
! 	* Makefile.def (gdbsupport, gdbserver): New host modules.
! 	(configure-gdb): Depend on all-gdbsupport.
! 	(all-gdb): Depend on all-gdbsupport, all-libctf.
! 	* configure.ac (host_tools): Add gdbserver.
! 	Conditionally build gdbserver and gdbsupport.
! 
! 2020-03-09  Tobias Burnus  <tobias@codesourcery.com>
! 
! 	* configure.ac: Build libgomp by default for amdgcn.
! 	* configure: Regenerate.
! 
! 2020-03-05  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
! 
! 	* MAINTAINERS (Write After Approval): Add myself.
! 
! 2020-02-28  Joel Hutton  <joel.hutton@arm.com>
! 
! 	* MAINTAINERS (Write After Approval) : Add myself.
! 
! 2020-02-20  Palmer Dabbelt  <palmer@sifive.com>
! 
! 	* MAINTAINERS: Change palmer@sifive.com to palmer@dabbelt.com.
! 
! 2020-02-14  Martin Sebor  <msebor@redhat.com>
! 
! 	* doc/extend.texi (attribute alias): Mention type requirement.
! 	(attribute weak): Same.
! 	(attribute weakref): Correct invalid example.
! 
! 2020-02-03  Segher Boessenkool  <segher@kernel.crashing.org>
! 
! 	* doc/md.texi (PowerPC and IBM RS6000): Improve documentation.
! 
! 2020-01-15  Segher Boessenkool  <segher@kernel.crashing.org>
! 	    Jakub Jelinek  <jakub@redhat.com>
! 
! 	* .gitattributes: Add *.md diff=md.
! 
! 2020-01-14  Georg-Johann Lay  <avr@gjlay.de>
! 
! 	The mentioned auto-generated file is no more part of the
! 
! 	GCC sources, it's auto-generated in $(builddir) during build.
! 
! 	PR target/92055
! 	* contrib/gcc_update (files_and_dependencies): Remove
! 	entry for gcc/config/avr/t-multilib.
! 
! 2020-01-14  Anatoly Sokolov <aesok@dol.ru>
! 
! 	* MAINTAINERS: Update my email address.
! 
! 2020-01-13  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* README.MOVED_TO_GIT: Remove.
! 
! 2020-01-11  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* README.MOVED_TO_GIT: New file.
! 
! 2020-01-02  Dennis Zhang  <dennis.zhang@arm.com>
! 
! 	* MAINTAINERS (Write After Approval): Add myself.
! 
! 2019-12-20  Jerome Lambourg  <lambourg@adacore.com>
! 
! 	* MAINTAINERS (write_after_approval): Add myself.
! 
! 2019-12-19  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
! 
! 	* MAINTAINERS (write_after_approval): Add myself.
! 
! 2019-12-17  Mihail Ionescu  <mihail.ionescu@arm.com>
! 
! 	* MAINTAINERS (write_after_approval): Add myself.
! 
! 2019-12-11  Matthias Klose  <doko@ubuntu.com>
! 
! 	* configure.ac: Factor out common cases for compare_exclusions.
! 	* configure: Regenerate.
! 
! 2019-12-11  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
! 
! 	* config-ml.in (msp430-*-*): Support --disable-no-exceptions configure
! 	flag.
! 
! 2019-12-10  Lewis Hyatt  <lhyatt@gmail.com>
! 
! 	* MAINTAINERS (Write After Approval): Add myself.
! 
! 2019-11-27  Tobias Burnus  <tobias@codesourcery.com>
! 
! 	PR middle-end/92463
! 	* configure.ac: Use MPFR_RNDN instead of GMP's MP_RNDN.
! 	* configure: Regenerate
! 
! 2019-11-20  Janne Blomqvist  <jb@gcc.gnu.org>
! 
! 	* configure.ac: Use https for gcc.gnu.org.
! 	* configure: Regenerated.
! 
! 2019-11-19  James Greenhalgh  <james.greenhalgh@arm.com>
! 
! 	* MAINTAINERS (aarch64 port): Remove my name, move to...
! 	(Write After Approval): ...Here.
! 
! 2019-11-15  Kelvin Nilsen  <kelvin@gcc.gnu.org>
! 
! 	* MAINTAINERS: Change my email address as maintainer.
! 
! 2019-11-11  Janne Blomqvist  <jb@gcc.gnu.org>
! 
! 	PR fortran/91828
! 	* configure.ac: Bump minimum MPFR to 3.1.0, recommended to 3.1.6+.
! 	* configure: Regenerated.
! 
! 2019-10-21  Jason Merrill  <jason@redhat.com>
! 
! 	* .gitattributes: Also check ChangeLog whitespace.
! 
! 2019-10-21  Andrew Burgess  <andrew.burgess@embecosm.com>
! 
! 	* contrib/dg-extract-results.sh: Add support for KPASS.
! 	* contrib/dg-extract-results.py: Likewise.
! 
! 2019-10-17  Jason Merrill  <jason@redhat.com>
! 
! 	* .gitattributes: Avoid {} in filename pattern.
! 
! 2019-10-08  Thomas Schwinge  <thomas@codesourcery.com>
! 
! 	* MAINTAINERS: Add back Trevor Smigiel; move into Write After
! 	Approval section.
! 
! 2019-10-01  Frederik Harwath <frederik@codesourcery.com>
! 
! 	* MAINTAINERS: Add myself to Write After Approval
! 
! 2019-09-26  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* MAINTAINERS: Add myself as an aarch64 maintainer.
! 
! 2019-09-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
! 
! 	* MAINTAINERS: Add myself as aarch64 maintainer.
! 
! 2019-09-23  Carl Love  <cel@us.ibm.com>
! 
! 	* config/rs6000/vsx.md (xxswapd_v4si, xxswapd_v8hi, xxswapd_v16qi):
! 	New define_insn.
! 	(vsx_xxpermdi4_le_<mode> for VSX_W, vsx_xxpermdi8_le_V8HI,
! 	vsx_xxpermdi16_le_V16QI): Removed define_insn.
! 
! 2019-09-13  Sam Tebbs  <sam.tebbs@arm.com>
! 
! 	* MAINTAINERS (Sam Tebbs): Update email address.
! 
! 2019-09-10  Tobias Burnus  <tobias@codesourcery.com>
! 
! 	* MAINTAINERS: Update my email address.
! 
! 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
! 
! 	* libtool.m4: Handle uclinuxfdpiceabi.
! 
! 2019-09-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
! 
! 	* MAINTAINERS: Add myself as the maintainer of the eBPF port.
! 	Remove myself from Write After Approval section.
! 
! 2019-09-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
! 
! 	* configure.ac: Support for bpf-*-* targets.
! 	* configure: Regenerate.
! 
! 2019-09-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
! 
! 	* config.sub: Import upstream version 2019-06-30.
! 	* config.guess: Import upstream version 2019-07-24.
! 
! 2019-09-03  Ulrich Weigand  <uweigand@de.ibm.com>
! 
! 	* MAINTAINERS: Remove spu port maintainers.
! 
! 2019-08-28  Martin Liska  <mliska@suse.cz>
! 
! 	* .gitignore: Add .clangd and compile_commands.json
! 	to .gitignore.
! 
! 2019-08-23  Michael Forney  <mforney@mforney.org>
! 
! 	* Makefile.tpl (HOST_EXPORTS): Add CXX_FOR_BUILD.
! 	* Makefile.in: Regenerate.
! 
! 2019-08-19  Tom Tromey  <tom@tromey.com>
! 
! 	* configure: Rebuild.
! 	* configure.ac: Add --with-static-standard-libraries.
! 
! 2019-08-16  Alexandre Oliva <oliva@gnu.org>
! 
! 	* MAINTAINERS: aoliva from @redhat.com to @gcc.gnu.org.
! 
! 2019-08-13  Mark Eggleston  <mark.eggleston@codethink.co.uk>
! 
! 	* MAINTAINERS (Write After Approval): Add myself.
! 
! 2019-07-08  Kito Cheng  <kito.cheng@sifive.com>
! 
! 	* MAINTAINERS (Write After Approval): Remove myself, already listed in
! 	RISC-V port maitainer.
! 
! 2019-07-08  Kito Cheng  <kito.cheng@sifive.com>
! 
! 	* MAINTAINERS (Write After Approval): Fix the list sorted by surname.
! 
! 2019-07-08  Kito Cheng  <kito.cheng@sifive.com>
! 
! 	* MAINTAINERS (Write After Approval): Add myself.
! 
! 2019-07-03  Andrea Corallo  <andrea.corallo@arm.com>
! 
! 	* MAINTAINERS (Write After Approval): Add myself.
! 
! 2019-06-25  Martin Liska  <mliska@suse.cz>
! 
! 	contrib/filter-clang-warnings.py: Transform from
! 	filter-rtags-warnings.py.
! 
! 2019-06-15  Tom Tromey  <tom@tromey.com>
! 
! 	* configure.ac (host_libs): Add gnulib.
! 	* configure: Rebuild.
! 	* Makefile.def (host_modules, dependencies): Add gnulib.
! 	* Makefile.in: Rebuild.
! 
! 2019-06-12  Dimitar Dimitrov  <dimitar@dinux.eu>
! 
! 	* MAINTAINERS (Write After Approval): Add myself.
! 
! 2019-06-12  Dimitar Dimitrov  <dimitar@dinux.eu>
! 
! 	* configure: Regenerate.
! 	* configure.ac: Add PRU target.
! 
! 2019-06-11  Matthew Beliveau  <mbelivea@redhat.com>
! 
! 	* MAINTAINERS (Write After Approval): Add myself.
! 
! 2019-06-11  Nick Clifton  <nickc@redhat.com>
! 
! 	Import these changes from the binutils/gdb repository:
! 
! 	2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
! 
! 	* Makefile.def (dependencies): configure-libctf depends on all-bfd
! 	and all its deps.
! 	* Makefile.in: Regenerated.
! 
! 	2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
! 
! 	* Makefile.def (host_modules): Add libctf.
! 	* Makefile.def (dependencies): Likewise.
! 	libctf depends on zlib, libiberty, and bfd.
! 	* Makefile.in: Regenerated.
! 	* configure.ac (host_libs): Add libctf.
! 	* configure: Regenerated.
! 
! 2019-05-20  Vladislav Ivanishin  <vlad@ispras.ru>
! 
! 	* MAINTAINERS (Write After Approval): Add myself.
! 
! 2019-05-19  Peter Bergner  <bergner@linux.ibm.com>
! 
! 	* MAINTAINERS: Update my email address.
! 
! 2019-05-17  Thomas Rodgers  <trodgers@redhat.com>
! 
! 	* MAINTAINERS (Write After Approval): Add myself.
! 
! 2019-05-16  Jun Ma  <junma@linux.alibaba.com>
! 
! 	* MAINTAINERS (Write After Approval): Add myself.
! 
! 2019-05-07  Jim Wilson  <jimw@sifive.com>
! 
! 	* MAINTAINERS: Remove myself as IA-64 maintainer.
! 
! 2019-05-04  Roland Illig  <roland.illig@gmx.de>
! 
! 	* MAINTAINERS (Write After Approval): Add myself.
! 
! 2019-05-02  Richard Biener  <rguenther@suse.de>
! 
! 	PR bootstrap/85574
! 	* Makefile.tpl (compare target): Also compare extra-compare
! 	files.
! 	* Makefile.in: Regenerate.
  
  2019-04-22  Roman Zhuykov  <zhroma@ispras.ru>
  
diff -Nrcpad gcc-9.3.0/INSTALL/binaries.html gcc-10.1.0/INSTALL/binaries.html
*** gcc-9.3.0/INSTALL/binaries.html	Thu Mar 12 11:08:33 2020
--- gcc-10.1.0/INSTALL/binaries.html	Thu May  7 10:50:54 2020
***************
*** 1,6 ****
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
--- 1,6 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
*************** You have freedom to copy and modify this
*** 22,31 ****
  <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
  <head>
  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
! <title>Installing GCC</title>
  
! <meta name="description" content="Installing GCC">
! <meta name="keywords" content="Installing GCC">
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
--- 22,31 ----
  <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
  <head>
  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
! <title>Installing GCC: Binaries</title>
  
! <meta name="description" content="Installing GCC: Binaries">
! <meta name="keywords" content="Installing GCC: Binaries">
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
*************** ul.no-bullet {list-style: none}
*** 61,67 ****
  </head>
  
  <body lang="en">
! <h1 class="settitle" align="center">Installing GCC</h1>
  
  
  
--- 61,67 ----
  </head>
  
  <body lang="en">
! <h1 class="settitle" align="center">Installing GCC: Binaries</h1>
  
  
  
*************** contact their makers.
*** 101,107 ****
  <li> AIX:
  <ul>
  <li> <a href="http://www.bullfreeware.com">Bull&rsquo;s Open Source Software Archive for
! for AIX 5L and AIX 6</a>;
  
  </li><li> <a href="http://www.perzl.org/aix/">AIX Open Source Packages (AIX5L AIX 6.1
  AIX 7.1)</a>.
--- 101,107 ----
  <li> AIX:
  <ul>
  <li> <a href="http://www.bullfreeware.com">Bull&rsquo;s Open Source Software Archive for
! for AIX 6 and AIX 7</a>;
  
  </li><li> <a href="http://www.perzl.org/aix/">AIX Open Source Packages (AIX5L AIX 6.1
  AIX 7.1)</a>.
*************** AIX 7.1)</a>.
*** 117,124 ****
  </li><li> Solaris 2 (SPARC, Intel):
  <ul>
  <li> <a href="https://www.opencsw.org/">OpenCSW</a>
- 
- </li><li> <a href="http://jupiterrise.com/tgcware/">TGCware</a>
  </li></ul>
  
  </li><li> macOS:
--- 117,122 ----
diff -Nrcpad gcc-9.3.0/INSTALL/build.html gcc-10.1.0/INSTALL/build.html
*** gcc-9.3.0/INSTALL/build.html	Thu Mar 12 11:08:33 2020
--- gcc-10.1.0/INSTALL/build.html	Thu May  7 10:50:54 2020
***************
*** 1,6 ****
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
--- 1,6 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
*************** You have freedom to copy and modify this
*** 22,31 ****
  <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
  <head>
  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
! <title>Installing GCC</title>
  
! <meta name="description" content="Installing GCC">
! <meta name="keywords" content="Installing GCC">
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
--- 22,31 ----
  <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
  <head>
  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
! <title>Installing GCC: Building</title>
  
! <meta name="description" content="Installing GCC: Building">
! <meta name="keywords" content="Installing GCC: Building">
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
*************** ul.no-bullet {list-style: none}
*** 61,67 ****
  </head>
  
  <body lang="en">
! <h1 class="settitle" align="center">Installing GCC</h1>
  
  
  
--- 61,67 ----
  </head>
  
  <body lang="en">
! <h1 class="settitle" align="center">Installing GCC: Building</h1>
  
  
  
*************** examples of supported build configuratio
*** 231,236 ****
--- 231,237 ----
  </p>
  </dd>
  <dt>&lsquo;<samp>bootstrap-O3</samp>&rsquo;</dt>
+ <dt>&lsquo;<samp>bootstrap-Og</samp>&rsquo;</dt>
  <dd><p>Analogous to <code>bootstrap-O1</code>.
  </p>
  </dd>
*************** and network filesystems.
*** 417,442 ****
  <a name="Building-the-Ada-compiler"></a>
  <h3 class="section">Building the Ada compiler</h3>
  
! <p>In order to build GNAT, the Ada compiler, you need a working GNAT
! compiler (GCC version 4.0 or later).
! This includes GNAT tools such as <code>gnatmake</code> and
! <code>gnatlink</code>, since the Ada front end is written in Ada and
! uses some GNAT-specific extensions.
! </p>
! <p>In order to build a cross compiler, it is suggested to install
! the new compiler as native first, and then use it to build the cross
! compiler.
! </p>
! <p><code>configure</code> does not test whether the GNAT installation works
! and has a sufficiently recent version; if too old a GNAT version is
! installed, the build will fail unless <samp>--enable-languages</samp> is
! used to disable building the Ada front end.
! </p>
! <p><code>ADA_INCLUDE_PATH</code> and <code>ADA_OBJECT_PATH</code> environment variables
! must not be set when building the Ada compiler, the Ada tools, or the
! Ada runtime libraries. You can check that your build environment is clean
! by verifying that &lsquo;<samp>gnatls -v</samp>&rsquo; lists only one explicit path in each
! section.
  </p>
  <a name="Building-with-profile-feedback"></a>
  <h3 class="section">Building with profile feedback</h3>
--- 418,424 ----
  <a name="Building-the-Ada-compiler"></a>
  <h3 class="section">Building the Ada compiler</h3>
  
! <p><a href="prerequisites.html#GNAT-prerequisite">GNAT prerequisites</a>.
  </p>
  <a name="Building-with-profile-feedback"></a>
  <h3 class="section">Building with profile feedback</h3>
diff -Nrcpad gcc-9.3.0/INSTALL/configure.html gcc-10.1.0/INSTALL/configure.html
*** gcc-9.3.0/INSTALL/configure.html	Thu Mar 12 11:08:33 2020
--- gcc-10.1.0/INSTALL/configure.html	Thu May  7 10:50:53 2020
***************
*** 1,6 ****
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
--- 1,6 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
*************** You have freedom to copy and modify this
*** 22,31 ****
  <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
  <head>
  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
! <title>Installing GCC</title>
  
! <meta name="description" content="Installing GCC">
! <meta name="keywords" content="Installing GCC">
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
--- 22,31 ----
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! <title>Installing GCC: Configuration</title>
  
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*************** ul.no-bullet {list-style: none}
*** 61,67 ****
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! <h1 class="settitle" align="center">Installing GCC</h1>
  
  
  
--- 61,67 ----
  </head>
  
  <body lang="en">
! <h1 class="settitle" align="center">Installing GCC: Configuration</h1>
  
  
  
*************** if you determine that they are not bugs
*** 159,164 ****
--- 159,179 ----
  <p>The default value refers to the FSF&rsquo;s GCC bug tracker.
  </p>
  </dd>
+ <dt><code>--with-documentation-root-url=<var>url</var></code></dt>
+ <dd><p>Specify the URL root that contains GCC option documentation.  The <var>url</var>
+ should end with a <code>/</code> character.
+ </p>
+ <p>The default value is <a href="https://gcc.gnu.org/onlinedocs/">https://gcc.gnu.org/onlinedocs/</a>.
+ </p>
+ </dd>
+ <dt><code>--with-changes-root-url=<var>url</var></code></dt>
+ <dd><p>Specify the URL root that contains information about changes in GCC
+ releases like <code>gcc-<var>version</var>/changes.html</code>.
+ The <var>url</var> should end with a <code>/</code> character.
+ </p>
+ <p>The default value is <a href="https://gcc.gnu.org/">https://gcc.gnu.org/</a>.
+ </p>
+ </dd>
  </dl>
  
  <a name="Target-specification"></a>
*************** is the target system triple, such as &ls
*** 493,499 ****
  
  </li><li> If the target system is the same that you are building on, check
  operating system specific directories (e.g. <samp>/usr/ccs/bin</samp> on
! Sun Solaris 2).
  
  </li><li> Check in the <code>PATH</code> for a tool whose name is prefixed by the
  target system triple.
--- 508,514 ----
  
  </li><li> If the target system is the same that you are building on, check
  operating system specific directories (e.g. <samp>/usr/ccs/bin</samp> on
! Solaris 2).
  
  </li><li> Check in the <code>PATH</code> for a tool whose name is prefixed by the
  target system triple.
*************** predefined set of them.
*** 588,593 ****
--- 603,612 ----
  <dd><p>single-float, biendian, softfloat.
  </p>
  </dd>
+ <dt><code>msp430-*-*</code></dt>
+ <dd><p>no-exceptions
+ </p>
+ </dd>
  <dt><code>powerpc*-*-*, rs6000*-*-*</code></dt>
  <dd><p>aix64, pthread, softfloat, powercpu, powerpccpu, powerpcos, biendian,
  sysv, aix.
*************** assumptions made by the configure test a
*** 825,830 ****
--- 844,855 ----
  This is an alias for <samp>--enable-tls=no</samp>.
  </p>
  </dd>
+ <dt><code>--disable-tm-clone-registry</code></dt>
+ <dd><p>Disable TM clone registry in libgcc. It is enabled in libgcc by default.
+ This option helps to reduce code size for embedded targets which do
+ not use transactional memory.
+ </p>
+ </dd>
  <dt><code>--with-cpu=<var>cpu</var></code></dt>
  <dt><code>--with-cpu-32=<var>cpu</var></code></dt>
  <dt><code>--with-cpu-64=<var>cpu</var></code></dt>
*************** addition, &lsquo;<samp>libstdc++</samp>&
*** 1107,1114 ****
  <samp><var>libdir</var></samp> unless you overruled it by using
  <samp>--with-gxx-include-dir=<var>dirname</var></samp>.  Using this option is
  particularly useful if you intend to use several versions of GCC in
! parallel.  This is currently supported by &lsquo;<samp>libgfortran</samp>&rsquo;,
! &lsquo;<samp>libstdc++</samp>&rsquo;, and &lsquo;<samp>libobjc</samp>&rsquo;.
  </p>
  </dd>
  <dt><code><a name="WithAixSoname"></a>--with-aix-soname=&lsquo;<samp>aix</samp>&rsquo;, &lsquo;<samp>svr4</samp>&rsquo; or &lsquo;<samp>both</samp>&rsquo;</code></dt>
--- 1132,1139 ----
  <samp><var>libdir</var></samp> unless you overruled it by using
  <samp>--with-gxx-include-dir=<var>dirname</var></samp>.  Using this option is
  particularly useful if you intend to use several versions of GCC in
! parallel.  The default is &lsquo;<samp>yes</samp>&rsquo; for &lsquo;<samp>libada</samp>&rsquo;, and &lsquo;<samp>no</samp>&rsquo; for
! the remaining libraries.
  </p>
  </dd>
  <dt><code><a name="WithAixSoname"></a>--with-aix-soname=&lsquo;<samp>aix</samp>&rsquo;, &lsquo;<samp>svr4</samp>&rsquo; or &lsquo;<samp>both</samp>&rsquo;</code></dt>
*************** GLIBC 2.11 or above, otherwise disabled.
*** 1679,1690 ****
  <dd><p>Tells GCC to use <var>choice</var> as the default for <samp>-fdiagnostics-color=</samp>
  option (if not used explicitly on the command line).  <var>choice</var>
  can be one of &lsquo;<samp>never</samp>&rsquo;, &lsquo;<samp>auto</samp>&rsquo;, &lsquo;<samp>always</samp>&rsquo;, and &lsquo;<samp>auto-if-env</samp>&rsquo;
! where &lsquo;<samp>auto</samp>&rsquo; is the default.  &lsquo;<samp>auto-if-env</samp>&rsquo; means that
! <samp>-fdiagnostics-color=auto</samp> will be the default if <code>GCC_COLORS</code>
! is present and non-empty in the environment, and
  <samp>-fdiagnostics-color=never</samp> otherwise.
  </p>
  </dd>
  <dt><code>--enable-lto</code></dt>
  <dt><code>--disable-lto</code></dt>
  <dd><p>Enable support for link-time optimization (LTO).  This is enabled by
--- 1704,1725 ----
  <dd><p>Tells GCC to use <var>choice</var> as the default for <samp>-fdiagnostics-color=</samp>
  option (if not used explicitly on the command line).  <var>choice</var>
  can be one of &lsquo;<samp>never</samp>&rsquo;, &lsquo;<samp>auto</samp>&rsquo;, &lsquo;<samp>always</samp>&rsquo;, and &lsquo;<samp>auto-if-env</samp>&rsquo;
! where &lsquo;<samp>auto</samp>&rsquo; is the default.  &lsquo;<samp>auto-if-env</samp>&rsquo; makes
! <samp>-fdiagnostics-color=auto</samp> the default if <code>GCC_COLORS</code>
! is present and non-empty in the environment of the compiler, and
  <samp>-fdiagnostics-color=never</samp> otherwise.
  </p>
  </dd>
+ <dt><code>--with-diagnostics-urls=<var>choice</var></code></dt>
+ <dd><p>Tells GCC to use <var>choice</var> as the default for <samp>-fdiagnostics-urls=</samp>
+ option (if not used explicitly on the command line).  <var>choice</var>
+ can be one of &lsquo;<samp>never</samp>&rsquo;, &lsquo;<samp>auto</samp>&rsquo;, &lsquo;<samp>always</samp>&rsquo;, and &lsquo;<samp>auto-if-env</samp>&rsquo;
+ where &lsquo;<samp>auto</samp>&rsquo; is the default.  &lsquo;<samp>auto-if-env</samp>&rsquo; makes
+ <samp>-fdiagnostics-urls=auto</samp> the default if <code>GCC_URLS</code>
+ or <code>TERM_URLS</code> is present and non-empty in the environment of the
+ compiler, and <samp>-fdiagnostics-urls=never</samp> otherwise.
+ </p>
+ </dd>
  <dt><code>--enable-lto</code></dt>
  <dt><code>--disable-lto</code></dt>
  <dd><p>Enable support for link-time optimization (LTO).  This is enabled by
*************** target if target binutils supported.
*** 1803,1808 ****
--- 1838,1848 ----
  <p>The following options only apply to building cross compilers.
  </p>
  <dl compact="compact">
+ <dt><code>--with-toolexeclibdir=<var>dir</var></code></dt>
+ <dd><p>Specify the installation directory for libraries built with a cross compiler.
+ The default is <samp>${gcc_tooldir}/lib</samp>.
+ </p>
+ </dd>
  <dt><code>--with-sysroot</code></dt>
  <dt><code>--with-sysroot=<var>dir</var></code></dt>
  <dd><p>Tells GCC to consider <var>dir</var> as the root of a tree that contains
*************** being used as the target C library.  Thi
*** 1881,1898 ****
  omitted from <samp>libgcc.a</samp> on the assumption that it will be provided by
  &lsquo;<samp>newlib</samp>&rsquo;.
  </p>
  </dd>
  <dt><code>--with-avrlibc</code></dt>
! <dd><p>Specifies that &lsquo;<samp>AVR-Libc</samp>&rsquo; is
! being used as the target C library.  This causes float support
  functions like <code>__addsf3</code> to be omitted from <samp>libgcc.a</samp> on
  the assumption that it will be provided by <samp>libm.a</samp>.  For more
  technical details, cf. <a href="http://gcc.gnu.org/PR54461">PR54461</a>.
! This option is only supported for the AVR target.  It is not supported for
  RTEMS configurations, which currently use newlib.  The option is
  supported since version 4.7.2 and is the default in 4.8.0 and newer.
  </p>
  </dd>
  <dt><code>--with-nds32-lib=<var>library</var></code></dt>
  <dd><p>Specifies that <var>library</var> setting is used for building <samp>libgcc.a</samp>.
  Currently, the valid <var>library</var> is &lsquo;<samp>newlib</samp>&rsquo; or &lsquo;<samp>mculib</samp>&rsquo;.
--- 1921,1991 ----
  omitted from <samp>libgcc.a</samp> on the assumption that it will be provided by
  &lsquo;<samp>newlib</samp>&rsquo;.
  </p>
+ <a name="avr"></a>
  </dd>
  <dt><code>--with-avrlibc</code></dt>
! <dd><p>Only supported for the AVR target. Specifies that &lsquo;<samp>AVR-Libc</samp>&rsquo; is
! being used as the target C&nbsp; library.  This causes float support
  functions like <code>__addsf3</code> to be omitted from <samp>libgcc.a</samp> on
  the assumption that it will be provided by <samp>libm.a</samp>.  For more
  technical details, cf. <a href="http://gcc.gnu.org/PR54461">PR54461</a>.
! It is not supported for
  RTEMS configurations, which currently use newlib.  The option is
  supported since version 4.7.2 and is the default in 4.8.0 and newer.
  </p>
  </dd>
+ <dt><code>--with-double={32|64|32,64|64,32}</code></dt>
+ <dt><code>--with-long-double={32|64|32,64|64,32|double}</code></dt>
+ <dd><p>Only supported for the AVR target since version&nbsp;10.
+ Specify the default layout available for the C/C++ &lsquo;<samp>double</samp>&rsquo;
+ and &lsquo;<samp>long double</samp>&rsquo; type, respectively. The following rules apply:
+ </p><ul>
+ <li> The first value after the &lsquo;<samp>=</samp>&rsquo; specifies the default layout (in bits)
+ of the type and also the default for the <samp>-mdouble=</samp> resp.
+ <samp>-mlong-double=</samp> compiler option.
+ </li><li> If more than one value is specified, respective multilib variants are
+ available, and  <samp>-mdouble=</samp> resp. <samp>-mlong-double=</samp> acts
+ as a multilib option.
+ </li><li> If <samp>--with-long-double=double</samp> is specified, &lsquo;<samp>double</samp>&rsquo; and
+ &lsquo;<samp>long double</samp>&rsquo; will have the same layout.
+ </li><li> The defaults are <samp>--with-long-double=64,32</samp> and
+ <samp>--with-double=32,64</samp>.  The default &lsquo;<samp>double</samp>&rsquo; layout imposed by
+ the latter is compatible with older versions of the compiler that implement
+ &lsquo;<samp>double</samp>&rsquo; as a 32-bit type, which does not comply to the language standard.
+ </li></ul>
+ <p>Not all combinations of <samp>--with-double=</samp> and
+ <samp>--with-long-double=</samp> are valid.  For example, the combination
+ <samp>--with-double=32,64</samp> <samp>--with-long-double=32</samp> will be
+ rejected because the first option specifies the availability of
+ multilibs for &lsquo;<samp>double</samp>&rsquo;, whereas the second option implies
+ that &lsquo;<samp>long double</samp>&rsquo; &mdash; and hence also &lsquo;<samp>double</samp>&rsquo; &mdash; is always
+ 32&nbsp;bits wide.
+ </p>
+ </dd>
+ <dt><code>--with-double-comparison={tristate|bool|libf7}</code></dt>
+ <dd><p>Only supported for the AVR target since version&nbsp;10.
+ Specify what result format is returned by library functions that
+ compare 64-bit floating point values (<code>DFmode</code>).
+ The GCC default is &lsquo;<samp>tristate</samp>&rsquo;.  If the floating point
+ implementation returns a boolean instead, set it to &lsquo;<samp>bool</samp>&rsquo;.
+ </p>
+ </dd>
+ <dt><code>--with-libf7={libgcc|math|math-symbols|no}</code></dt>
+ <dd><p>Only supported for the AVR target since version&nbsp;10.
+ Specify to which degree code from LibF7 is included in libgcc.
+ LibF7 is an ad-hoc, AVR-specific, 64-bit floating point emulation
+ written in C and (inline) assembly. &lsquo;<samp>libgcc</samp>&rsquo; adds support
+ for functions that one would usually expect in libgcc like double addition,
+ double comparisons and double conversions. &lsquo;<samp>math</samp>&rsquo; also adds routines
+ that one would expect in <samp>libm.a</samp>, but with <code>__</code> (two underscores)
+ prepended to the symbol names as specified by <samp>math.h</samp>.
+ &lsquo;<samp>math-symbols</samp>&rsquo; also defines weak aliases for the functions
+ declared in <samp>math.h</samp>.  However, <code>--with-libf7</code> won&rsquo;t
+ install no <samp>math.h</samp> header file whatsoever, this file must come
+ from elsewhere.  This option sets <samp>--with-double-comparison</samp>
+ to &lsquo;<samp>bool</samp>&rsquo;.
+ </p>
+ </dd>
  <dt><code>--with-nds32-lib=<var>library</var></code></dt>
  <dd><p>Specifies that <var>library</var> setting is used for building <samp>libgcc.a</samp>.
  Currently, the valid <var>library</var> is &lsquo;<samp>newlib</samp>&rsquo; or &lsquo;<samp>mculib</samp>&rsquo;.
*************** variables in the site file.
*** 1960,1966 ****
  <dt><code>--enable-objc-gc</code></dt>
  <dd><p>Specify that an additional variant of the GNU Objective-C runtime library
  is built, using an external build of the Boehm-Demers-Weiser garbage
! collector (<a href="http://www.hboehm.info/gc/">http://www.hboehm.info/gc/</a>).  This library needs to be
  available for each multilib variant, unless configured with
  <samp>--enable-objc-gc=&lsquo;<samp>auto</samp>&rsquo;</samp> in which case the build of the
  additional runtime library is skipped when not available and the build
--- 2053,2059 ----
  <dt><code>--enable-objc-gc</code></dt>
  <dd><p>Specify that an additional variant of the GNU Objective-C runtime library
  is built, using an external build of the Boehm-Demers-Weiser garbage
! collector (<a href="https://www.hboehm.info/gc/">https://www.hboehm.info/gc/</a>).  This library needs to be
  available for each multilib variant, unless configured with
  <samp>--enable-objc-gc=&lsquo;<samp>auto</samp>&rsquo;</samp> in which case the build of the
  additional runtime library is skipped when not available and the build
*************** default locations.
*** 1994,1999 ****
--- 2087,2125 ----
  <p>The following options apply to the build of the D runtime library.
  </p>
  <dl compact="compact">
+ <dt><code>--enable-libphobos-checking</code></dt>
+ <dt><code>--disable-libphobos-checking</code></dt>
+ <dt><code>--enable-libphobos-checking=<var>list</var></code></dt>
+ <dd><p>This option controls whether run-time checks and contracts are compiled into
+ the D runtime library.  When the option is not specified, the library is built
+ with &lsquo;<samp>release</samp>&rsquo; checking.  When the option is specified without a
+ <var>list</var>, the result is the same as &lsquo;<samp>--enable-libphobos-checking=yes</samp>&rsquo;.
+ Likewise, &lsquo;<samp>--disable-libphobos-checking</samp>&rsquo; is equivalent to
+ &lsquo;<samp>--enable-libphobos-checking=no</samp>&rsquo;.
+ </p>
+ <p>The categories of checks available in <var>list</var> are &lsquo;<samp>yes</samp>&rsquo; (compiles
+ libphobos with <samp>-fno-release</samp>), &lsquo;<samp>no</samp>&rsquo; (compiles libphobos with
+ <samp>-frelease</samp>), &lsquo;<samp>all</samp>&rsquo; (same as &lsquo;<samp>yes</samp>&rsquo;), &lsquo;<samp>none</samp>&rsquo; or
+ &lsquo;<samp>release</samp>&rsquo; (same as &lsquo;<samp>no</samp>&rsquo;).
+ </p>
+ <p>Individual checks available in <var>list</var> are &lsquo;<samp>assert</samp>&rsquo; (compiles libphobos
+ with an extra option <samp>-fassert</samp>).
+ </p>
+ </dd>
+ <dt><code>--with-libphobos-druntime-only</code></dt>
+ <dt><code>--with-libphobos-druntime-only=<var>choice</var></code></dt>
+ <dd><p>Specify whether to build only the core D runtime library (druntime), or both
+ the core and standard library (phobos) into libphobos.  This is useful for
+ targets that have full support in druntime, but no or incomplete support
+ in phobos.  <var>choice</var> can be one of &lsquo;<samp>auto</samp>&rsquo;, &lsquo;<samp>yes</samp>&rsquo;, and &lsquo;<samp>no</samp>&rsquo;
+ where &lsquo;<samp>auto</samp>&rsquo; is the default.
+ </p>
+ <p>When the option is not specified, the default choice &lsquo;<samp>auto</samp>&rsquo; means that it
+ is inferred whether the target has support for the phobos standard library.
+ When the option is specified without a <var>choice</var>,  the result is the same as
+ &lsquo;<samp>--with-libphobos-druntime-only=yes</samp>&rsquo;.
+ </p>
+ </dd>
  <dt><code>--with-target-system-zlib</code></dt>
  <dd><p>Use installed &lsquo;<samp>zlib</samp>&rsquo; rather than that included with GCC.  This needs
  to be available for each multilib variant, unless configured with
diff -Nrcpad gcc-9.3.0/INSTALL/download.html gcc-10.1.0/INSTALL/download.html
*** gcc-9.3.0/INSTALL/download.html	Thu Mar 12 11:08:32 2020
--- gcc-10.1.0/INSTALL/download.html	Thu May  7 10:50:53 2020
***************
*** 1,6 ****
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
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! <!-- Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
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--- 1,6 ----
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*** 22,31 ****
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! <title>Installing GCC</title>
  
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! <title>Downloading GCC</title>
  
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*** 61,67 ****
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! <h1 class="settitle" align="center">Installing GCC</h1>
  
  
  
--- 61,67 ----
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! <h1 class="settitle" align="center">Downloading GCC</h1>
  
  
  
diff -Nrcpad gcc-9.3.0/INSTALL/finalinstall.html gcc-10.1.0/INSTALL/finalinstall.html
*** gcc-9.3.0/INSTALL/finalinstall.html	Thu Mar 12 11:08:33 2020
--- gcc-10.1.0/INSTALL/finalinstall.html	Thu May  7 10:50:54 2020
***************
*** 1,6 ****
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  under the terms of the GNU Free Documentation License, Version 1.3 or
*************** You have freedom to copy and modify this
*** 22,31 ****
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--- 61,67 ----
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! <h1 class="settitle" align="center">Installing GCC: Final installation</h1>
  
  
  
diff -Nrcpad gcc-9.3.0/INSTALL/gfdl.html gcc-10.1.0/INSTALL/gfdl.html
*** gcc-9.3.0/INSTALL/gfdl.html	Thu Mar 12 11:08:34 2020
--- gcc-10.1.0/INSTALL/gfdl.html	Thu May  7 10:50:54 2020
***************
*** 1,6 ****
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*** 22,31 ****
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! <h1 class="settitle" align="center">Installing GCC</h1>
  
  
  
--- 61,67 ----
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  <body lang="en">
! <h1 class="settitle" align="center">Installing GCC: GNU Free Documentation License</h1>
  
  
  
diff -Nrcpad gcc-9.3.0/INSTALL/index.html gcc-10.1.0/INSTALL/index.html
*** gcc-9.3.0/INSTALL/index.html	Thu Mar 12 11:08:32 2020
--- gcc-10.1.0/INSTALL/index.html	Thu May  7 10:50:52 2020
***************
*** 1,6 ****
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
--- 1,6 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
*************** not yet been merged into the main part o
*** 126,132 ****
  <p>
  <p><a href="./index.html">Return to the GCC Installation page</a>
  </p>
! <p>Copyright &copy; 1988-2019 Free Software Foundation, Inc.
  </p><br>
  <p>Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
--- 126,132 ----
  <p>
  <p><a href="./index.html">Return to the GCC Installation page</a>
  </p>
! <p>Copyright &copy; 1988-2020 Free Software Foundation, Inc.
  </p><br>
  <p>Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
diff -Nrcpad gcc-9.3.0/INSTALL/old.html gcc-10.1.0/INSTALL/old.html
*** gcc-9.3.0/INSTALL/old.html	Thu Mar 12 11:08:33 2020
--- gcc-10.1.0/INSTALL/old.html	Thu May  7 10:50:54 2020
***************
*** 1,6 ****
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
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--- 1,6 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
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! <!-- Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
*************** You have freedom to copy and modify this
*** 22,31 ****
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! <title>Installing GCC</title>
  
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--- 61,67 ----
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! <h1 class="settitle" align="center">Installing GCC: Old documentation</h1>
  
  
  
diff -Nrcpad gcc-9.3.0/INSTALL/prerequisites.html gcc-10.1.0/INSTALL/prerequisites.html
*** gcc-9.3.0/INSTALL/prerequisites.html	Thu Mar 12 11:08:32 2020
--- gcc-10.1.0/INSTALL/prerequisites.html	Thu May  7 10:50:53 2020
***************
*** 1,6 ****
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
--- 1,6 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
*************** You have freedom to copy and modify this
*** 22,31 ****
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! <title>Installing GCC</title>
  
! <meta name="description" content="Installing GCC">
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! <title>Prerequisites for GCC</title>
  
! <meta name="description" content="Prerequisites for GCC">
! <meta name="keywords" content="Prerequisites for GCC">
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! <h1 class="settitle" align="center">Installing GCC</h1>
  
  
  
--- 61,67 ----
  </head>
  
  <body lang="en">
! <h1 class="settitle" align="center">Prerequisites for GCC</h1>
  
  
  
*************** name of the package depends on your dist
*** 122,133 ****
  &lsquo;<samp>fatal error: gnu/stubs-32.h: No such file</samp>&rsquo;
  </p>
  </dd>
! <dt>GNAT</dt>
  <dd>
! <p>In order to build the Ada compiler (GNAT) you must already have GNAT
! installed because portions of the Ada frontend are written in Ada (with
! GNAT extensions.)  Refer to the Ada installation instructions for more
! specific information.
  </p>
  </dd>
  <dt>A &ldquo;working&rdquo; POSIX compatible shell, or GNU bash</dt>
--- 122,155 ----
  &lsquo;<samp>fatal error: gnu/stubs-32.h: No such file</samp>&rsquo;
  </p>
  </dd>
! <dt><a name="GNAT-prerequisite"></a>GNAT</dt>
  <dd>
! <p>In order to build GNAT, the Ada compiler, you need a working GNAT
! compiler (GCC version 4.7 or later).
! </p>
! <p>This includes GNAT tools such as <code>gnatmake</code> and
! <code>gnatlink</code>, since the Ada front end is written in Ada and
! uses some GNAT-specific extensions.
! </p>
! <p>In order to build a cross compiler, it is strongly recommended to install
! the new compiler as native first, and then use it to build the cross
! compiler. Other native compiler versions may work but this is not guaranteed and
! will typically fail with hard to understand compilation errors during the
! build.
! </p>
! <p>Similarly, it is strongly recommended to use an older version of GNAT to build
! GNAT. More recent versions of GNAT than the version built are not guaranteed
! to work and will often fail during the build with compilation errors.
! </p>
! <p>Note that <code>configure</code> does not test whether the GNAT installation works
! and has a sufficiently recent version; if too old a GNAT version is
! installed and <samp>--enable-languages=ada</samp> is used, the build will fail.
! </p>
! <p><code>ADA_INCLUDE_PATH</code> and <code>ADA_OBJECT_PATH</code> environment variables
! must not be set when building the Ada compiler, the Ada tools, or the
! Ada runtime libraries. You can check that your build environment is clean
! by verifying that &lsquo;<samp>gnatls -v</samp>&rsquo; lists only one explicit path in each
! section.
  </p>
  </dd>
  <dt>A &ldquo;working&rdquo; POSIX compatible shell, or GNU bash</dt>
*************** requirements.
*** 167,173 ****
  <dt>bzip2 version 1.0.2 (or later)</dt>
  <dd>
  <p>Necessary to uncompress GCC <code>tar</code> files when source code is
! obtained via FTP mirror sites.
  </p>
  </dd>
  <dt>GNU make version 3.80 (or later)</dt>
--- 189,195 ----
  <dt>bzip2 version 1.0.2 (or later)</dt>
  <dd>
  <p>Necessary to uncompress GCC <code>tar</code> files when source code is
! obtained via HTTPS mirror sites.
  </p>
  </dd>
  <dt>GNU make version 3.80 (or later)</dt>
*************** systems&rsquo; <code>tar</code> programs
*** 186,194 ****
  <dd>
  <p>Necessary when targeting Darwin, building &lsquo;<samp>libstdc++</samp>&rsquo;,
  and not using <samp>--disable-symvers</samp>.
! Necessary when targeting Solaris 2 with Sun <code>ld</code> and not using
! <samp>--disable-symvers</samp>.  The bundled <code>perl</code> in Solaris&nbsp;8
! and up works.
  </p>
  <p>Necessary when regenerating <samp>Makefile</samp> dependencies in libiberty.
  Necessary when regenerating <samp>libiberty/functions.texi</samp>.
--- 208,215 ----
  <dd>
  <p>Necessary when targeting Darwin, building &lsquo;<samp>libstdc++</samp>&rsquo;,
  and not using <samp>--disable-symvers</samp>.
! Necessary when targeting Solaris 2 with Solaris <code>ld</code> and not using
! <samp>--disable-symvers</samp>.
  </p>
  <p>Necessary when regenerating <samp>Makefile</samp> dependencies in libiberty.
  Necessary when regenerating <samp>libiberty/functions.texi</samp>.
*************** The in-tree build is only supported with
*** 224,230 ****
  download_prerequisites installs.
  </p>
  </dd>
! <dt>MPFR Library version 2.4.2 (or later)</dt>
  <dd>
  <p>Necessary to build GCC.  It can be downloaded from
  <a href="https://www.mpfr.org">https://www.mpfr.org</a>.  If an MPFR source distribution is found
--- 245,251 ----
  download_prerequisites installs.
  </p>
  </dd>
! <dt>MPFR Library version 3.1.0 (or later)</dt>
  <dd>
  <p>Necessary to build GCC.  It can be downloaded from
  <a href="https://www.mpfr.org">https://www.mpfr.org</a>.  If an MPFR source distribution is found
*************** The in-tree build is only supported with
*** 237,243 ****
  download_prerequisites installs.
  </p>
  </dd>
! <dt>MPC Library version 0.8.1 (or later)</dt>
  <dd>
  <p>Necessary to build GCC.  It can be downloaded from
  <a href="http://www.multiprecision.org/mpc/">http://www.multiprecision.org/mpc/</a>.  If an MPC source distribution
--- 258,264 ----
  download_prerequisites installs.
  </p>
  </dd>
! <dt>MPC Library version 1.0.1 (or later)</dt>
  <dd>
  <p>Necessary to build GCC.  It can be downloaded from
  <a href="http://www.multiprecision.org/mpc/">http://www.multiprecision.org/mpc/</a>.  If an MPC source distribution
*************** download_prerequisites installs.
*** 253,259 ****
  <dt>isl Library version 0.15 or later.</dt>
  <dd>
  <p>Necessary to build GCC with the Graphite loop optimizations.
! It can be downloaded from <a href="ftp://gcc.gnu.org/pub/gcc/infrastructure/">ftp://gcc.gnu.org/pub/gcc/infrastructure/</a>.
  If an isl source distribution is found
  in a subdirectory of your GCC sources named <samp>isl</samp>, it will be
  built together with GCC.  Alternatively, the <samp>--with-isl</samp> configure
--- 274,280 ----
  <dt>isl Library version 0.15 or later.</dt>
  <dd>
  <p>Necessary to build GCC with the Graphite loop optimizations.
! It can be downloaded from <a href="https://gcc.gnu.org/pub/gcc/infrastructure/">https://gcc.gnu.org/pub/gcc/infrastructure/</a>.
  If an isl source distribution is found
  in a subdirectory of your GCC sources named <samp>isl</samp>, it will be
  built together with GCC.  Alternatively, the <samp>--with-isl</samp> configure
*************** option should be used if isl is not inst
*** 261,266 ****
--- 282,294 ----
  search path.
  </p>
  </dd>
+ <dt>zstd Library.</dt>
+ <dd>
+ <p>Necessary to build GCC with zstd compression used for LTO bytecode.
+ The library is searched in your default library patch search.
+ Alternatively, the <samp>--with-zstd</samp> configure option should be used.
+ </p>
+ </dd>
  </dl>
  
  <a name="Tools_002fpackages-necessary-for-modifying-GCC"></a>
*************** to the latest released version.
*** 306,315 ****
  <dt>Tcl</dt>
  <dd>
  <p>Necessary to run the GCC testsuite; see the section on testing for
! details.  Tcl 8.6 has a known regression in RE pattern handling that
! make parts of the testsuite fail.  See
! <a href="http://core.tcl.tk/tcl/tktview/267b7e2334ee2e9de34c4b00d6e72e2f1997085f">http://core.tcl.tk/tcl/tktview/267b7e2334ee2e9de34c4b00d6e72e2f1997085f</a>
! for more information.  This bug has been fixed in 8.6.1.
  </p>
  </dd>
  <dt>autogen version 5.5.4 (or later) and</dt>
--- 334,340 ----
  <dt>Tcl</dt>
  <dd>
  <p>Necessary to run the GCC testsuite; see the section on testing for
! details.
  </p>
  </dd>
  <dt>autogen version 5.5.4 (or later) and</dt>
diff -Nrcpad gcc-9.3.0/INSTALL/specific.html gcc-10.1.0/INSTALL/specific.html
*** gcc-9.3.0/INSTALL/specific.html	Thu Mar 12 11:08:32 2020
--- gcc-10.1.0/INSTALL/specific.html	Thu May  7 10:50:53 2020
***************
*** 1,6 ****
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
--- 1,6 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
*************** You have freedom to copy and modify this
*** 22,31 ****
  <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
  <head>
  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
! <title>Installing GCC</title>
  
! <meta name="description" content="Installing GCC">
! <meta name="keywords" content="Installing GCC">
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
--- 22,31 ----
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  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
! <title>Host/Target specific installation notes for GCC</title>
  
! <meta name="description" content="Host/Target specific installation notes for GCC">
! <meta name="keywords" content="Host/Target specific installation notes for GCC">
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
*************** ul.no-bullet {list-style: none}
*** 61,67 ****
  </head>
  
  <body lang="en">
! <h1 class="settitle" align="center">Installing GCC</h1>
  
  
  
--- 61,67 ----
  </head>
  
  <body lang="en">
! <h1 class="settitle" align="center">Host/Target specific installation notes for GCC</h1>
  
  
  
*************** information have to.
*** 103,109 ****
  <ul>
  <li> <a href="#aarch64-x-x">aarch64*-*-*</a>
  </li><li> <a href="#alpha-x-x">alpha*-*-*</a>
! </li><li> <a href="#amd64-x-solaris210">amd64-*-solaris2.10</a>
  </li><li> <a href="#arm-x-eabi">arm-*-eabi</a>
  </li><li> <a href="#avr">avr</a>
  </li><li> <a href="#bfin">Blackfin</a>
--- 103,109 ----
  <ul>
  <li> <a href="#aarch64-x-x">aarch64*-*-*</a>
  </li><li> <a href="#alpha-x-x">alpha*-*-*</a>
! </li><li> <a href="#amd64-x-solaris2">amd64-*-solaris2*</a>
  </li><li> <a href="#arm-x-eabi">arm-*-eabi</a>
  </li><li> <a href="#avr">avr</a>
  </li><li> <a href="#bfin">Blackfin</a>
*************** information have to.
*** 115,121 ****
  </li><li> <a href="#hppa-hp-hpux11">hppa*-hp-hpux11</a>
  </li><li> <a href="#x-x-linux-gnu">*-*-linux-gnu</a>
  </li><li> <a href="#ix86-x-linux">i?86-*-linux*</a>
! </li><li> <a href="#ix86-x-solaris210">i?86-*-solaris2.10</a>
  </li><li> <a href="#ia64-x-linux">ia64-*-linux</a>
  </li><li> <a href="#ia64-x-hpux">ia64-*-hpux*</a>
  </li><li> <a href="#x-ibm-aix">*-ibm-aix*</a>
--- 115,121 ----
  </li><li> <a href="#hppa-hp-hpux11">hppa*-hp-hpux11</a>
  </li><li> <a href="#x-x-linux-gnu">*-*-linux-gnu</a>
  </li><li> <a href="#ix86-x-linux">i?86-*-linux*</a>
! </li><li> <a href="#ix86-x-solaris2">i?86-*-solaris2*</a>
  </li><li> <a href="#ia64-x-linux">ia64-*-linux</a>
  </li><li> <a href="#ia64-x-hpux">ia64-*-hpux*</a>
  </li><li> <a href="#x-ibm-aix">*-ibm-aix*</a>
*************** information have to.
*** 153,159 ****
  </li><li> <a href="#x-x-solaris2">*-*-solaris2*</a>
  </li><li> <a href="#sparc-x-x">sparc*-*-*</a>
  </li><li> <a href="#sparc-sun-solaris2">sparc-sun-solaris2*</a>
- </li><li> <a href="#sparc-sun-solaris210">sparc-sun-solaris2.10</a>
  </li><li> <a href="#sparc-x-linux">sparc-*-linux*</a>
  </li><li> <a href="#sparc64-x-solaris2">sparc64-*-solaris2*</a>
  </li><li> <a href="#sparcv9-x-solaris2">sparcv9-*-solaris2*</a>
--- 153,158 ----
*************** information have to.
*** 164,170 ****
  </li><li> <a href="#visium-x-elf">visium-*-elf</a>
  </li><li> <a href="#x-x-vxworks">*-*-vxworks*</a>
  </li><li> <a href="#x86-64-x-x">x86_64-*-*, amd64-*-*</a>
! </li><li> <a href="#x86-64-x-solaris210">x86_64-*-solaris2.1[0-9]*</a>
  </li><li> <a href="#xtensa-x-elf">xtensa*-*-elf</a>
  </li><li> <a href="#xtensa-x-linux">xtensa*-*-linux*</a>
  </li><li> <a href="#windows">Microsoft Windows</a>
--- 163,169 ----
  </li><li> <a href="#visium-x-elf">visium-*-elf</a>
  </li><li> <a href="#x-x-vxworks">*-*-vxworks*</a>
  </li><li> <a href="#x86-64-x-x">x86_64-*-*, amd64-*-*</a>
! </li><li> <a href="#x86-64-x-solaris2">x86_64-*-solaris2*</a>
  </li><li> <a href="#xtensa-x-elf">xtensa*-*-elf</a>
  </li><li> <a href="#xtensa-x-linux">xtensa*-*-linux*</a>
  </li><li> <a href="#windows">Microsoft Windows</a>
*************** of the options are given at configure ti
*** 225,257 ****
  Alpha-based platforms using ELF.  In addition to reading this
  section, please read all other sections that match your target.
  </p>
- <p>We require binutils 2.11.2 or newer.
- Previous binutils releases had a number of problems with DWARF 2
- debugging information, not the least of which is incorrect linking of
- shared libraries.
- </p>
  <hr />
! <a name="amd64-x-solaris210"></a><a name="amd64-*-solaris2_002e1_005b0-9_005d*"></a>
! <h3 class="heading">amd64-*-solaris2.1[0-9]*</h3>
! <p>This is a synonym for &lsquo;<samp>x86_64-*-solaris2.1[0-9]*</samp>&rsquo;.
  </p>
  <hr />
! <a name="amdgcn-unknown-amdhsa"></a><a name="amdgcn-unknown-amdhsa-1"></a>
! <h3 class="heading">amdgcn-unknown-amdhsa</h3>
  <p>AMD GCN GPU target.
  </p>
  <p>Instead of GNU Binutils, you will need to install LLVM 6, or later, and copy
! <samp>bin/llvm-mc</samp> to <samp>amdgcn-unknown-amdhsa/bin/as</samp>,
! <samp>bin/lld</samp> to <samp>amdgcn-unknown-amdhsa/bin/ld</samp>,
! <samp>bin/llvm-nm</samp> to <samp>amdgcn-unknown-amdhsa/bin/nm</samp>, and
! <samp>bin/llvm-ar</samp> to both <samp>bin/amdgcn-unknown-amdhsa-ar</samp> and
! <samp>bin/amdgcn-unknown-amdhsa-ranlib</samp>.
  </p>
  <p>Use Newlib (2019-01-16, or newer).
  </p>
  <p>To run the binaries, install the HSA Runtime from the
  <a href="https://rocm.github.io">ROCm Platform</a>, and use
! <samp>libexec/gcc/amdhsa-unknown-amdhsa/<var>version</var>/gcn-run</samp> to launch them
  on the GPU.
  </p>
  <hr />
--- 224,251 ----
  Alpha-based platforms using ELF.  In addition to reading this
  section, please read all other sections that match your target.
  </p>
  <hr />
! <a name="amd64-x-solaris2"></a><a name="amd64-*-solaris2*"></a>
! <h3 class="heading">amd64-*-solaris2*</h3>
! <p>This is a synonym for &lsquo;<samp>x86_64-*-solaris2*</samp>&rsquo;.
  </p>
  <hr />
! <a name="amdgcn-x-amdhsa"></a><a name="amdgcn-*-amdhsa"></a>
! <h3 class="heading">amdgcn-*-amdhsa</h3>
  <p>AMD GCN GPU target.
  </p>
  <p>Instead of GNU Binutils, you will need to install LLVM 6, or later, and copy
! <samp>bin/llvm-mc</samp> to <samp>amdgcn-amdhsa/bin/as</samp>,
! <samp>bin/lld</samp> to <samp>amdgcn-amdhsa/bin/ld</samp>,
! <samp>bin/llvm-nm</samp> to <samp>amdgcn-amdhsa/bin/nm</samp>, and
! <samp>bin/llvm-ar</samp> to both <samp>bin/amdgcn-amdhsa-ar</samp> and
! <samp>bin/amdgcn-amdhsa-ranlib</samp>.
  </p>
  <p>Use Newlib (2019-01-16, or newer).
  </p>
  <p>To run the binaries, install the HSA Runtime from the
  <a href="https://rocm.github.io">ROCm Platform</a>, and use
! <samp>libexec/gcc/amdhsa-amdhsa/<var>version</var>/gcn-run</samp> to launch them
  on the GPU.
  </p>
  <hr />
*************** can also be obtained from:
*** 309,315 ****
  See &ldquo;Blackfin Options&rdquo; in the main manual
  </p>
  <p>More information, and a version of binutils with support for this processor,
! is available at <a href="https://blackfin.uclinux.org">https://blackfin.uclinux.org</a>
  </p>
  <hr />
  <a name="cr16"></a><a name="CR16"></a>
--- 303,309 ----
  See &ldquo;Blackfin Options&rdquo; in the main manual
  </p>
  <p>More information, and a version of binutils with support for this processor,
! are available at <a href="https://sourceforge.net/projects/adi-toolchain/">https://sourceforge.net/projects/adi-toolchain/</a>.
  </p>
  <hr />
  <a name="cr16"></a><a name="CR16"></a>
*************** possible you have a hardware problem.  F
*** 606,638 ****
  found on <a href="http://www.bitwizard.nl/sig11/">www.bitwizard.nl</a>.
  </p>
  <hr />
! <a name="ix86-x-solaris210"></a><a name="i_003f86-*-solaris2_002e10"></a>
! <h3 class="heading">i?86-*-solaris2.10</h3>
! <p>Use this for Solaris 10 or later on x86 and x86-64 systems.  Starting
! with GCC 4.7, there is also a 64-bit &lsquo;<samp>amd64-*-solaris2.1[0-9]*</samp>&rsquo; or
! &lsquo;<samp>x86_64-*-solaris2.1[0-9]*</samp>&rsquo; configuration that corresponds to
  &lsquo;<samp>sparcv9-sun-solaris2*</samp>&rsquo;.
  </p>
  <p>It is recommended that you configure GCC to use the GNU assembler.  The
! versions included in Solaris 10, from GNU binutils 2.15 (in
! <samp>/usr/sfw/bin/gas</samp>), and Solaris 11, from GNU binutils 2.19 or
! newer (also available as <samp>/usr/bin/gas</samp> and
  <samp>/usr/gnu/bin/as</samp>), work fine.  The current version, from GNU
! binutils 2.29, is known to work, but the version from GNU binutils 2.26
! must be avoided.  Recent versions of the Solaris assembler in
! <samp>/usr/ccs/bin/as</samp> work almost as well, though.
  </p>
! <p>For linking, the Solaris linker, is preferred.  If you want to use the GNU
! linker instead, note that due to a packaging bug the version in Solaris
! 10, from GNU binutils 2.15 (in <samp>/usr/sfw/bin/gld</samp>), cannot be used,
! while the version in Solaris 11, from GNU binutils 2.19 or newer (also
! in <samp>/usr/gnu/bin/ld</samp> and <samp>/usr/bin/gld</samp>), works, as does the
! latest version, from GNU binutils 2.29.
  </p>
  <p>To use GNU <code>as</code>, configure with the options
! <samp>--with-gnu-as --with-as=/usr/sfw/bin/gas</samp>.  It may be necessary
  to configure with <samp>--without-gnu-ld --with-ld=/usr/ccs/bin/ld</samp> to
! guarantee use of Sun <code>ld</code>.
  </p>
  <hr />
  <a name="ia64-x-linux"></a><a name="ia64-*-linux"></a>
--- 600,628 ----
  found on <a href="http://www.bitwizard.nl/sig11/">www.bitwizard.nl</a>.
  </p>
  <hr />
! <a name="ix86-x-solaris2"></a><a name="i_003f86-*-solaris2*"></a>
! <h3 class="heading">i?86-*-solaris2*</h3>
! <p>Use this for Solaris 11.3 or later on x86 and x86-64 systems.  Starting
! with GCC 4.7, there is also a 64-bit &lsquo;<samp>amd64-*-solaris2*</samp>&rsquo; or
! &lsquo;<samp>x86_64-*-solaris2*</samp>&rsquo; configuration that corresponds to
  &lsquo;<samp>sparcv9-sun-solaris2*</samp>&rsquo;.
  </p>
  <p>It is recommended that you configure GCC to use the GNU assembler.  The
! versions included in Solaris 11.3, from GNU binutils 2.23.1 or
! newer (available as <samp>/usr/bin/gas</samp> and
  <samp>/usr/gnu/bin/as</samp>), work fine.  The current version, from GNU
! binutils 2.34, is known to work.  Recent versions of the Solaris assembler in
! <samp>/usr/bin/as</samp> work almost as well, though.
  </p>
! <p>For linking, the Solaris linker is preferred.  If you want to use the GNU
! linker instead, the version in Solaris 11.3, from GNU binutils 2.23.1 or
! newer (in <samp>/usr/gnu/bin/ld</samp> and <samp>/usr/bin/gld</samp>), works,
! as does the latest version, from GNU binutils 2.34.
  </p>
  <p>To use GNU <code>as</code>, configure with the options
! <samp>--with-gnu-as --with-as=/usr/gnu/bin/as</samp>.  It may be necessary
  to configure with <samp>--without-gnu-ld --with-ld=/usr/ccs/bin/ld</samp> to
! guarantee use of Solaris <code>ld</code>.
  </p>
  <hr />
  <a name="ia64-x-linux"></a><a name="ia64-*-linux"></a>
*************** use traps on systems that support them.
*** 950,960 ****
  <p>The moxie processor.
  </p>
  <hr />
! <a name="msp430-x-elf"></a><a name="msp430-*-elf"></a>
! <h3 class="heading">msp430-*-elf</h3>
  <p>TI MSP430 processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
  <a name="nds32le-x-elf"></a><a name="nds32le-*-elf"></a>
  <h3 class="heading">nds32le-*-elf</h3>
--- 940,964 ----
  <p>The moxie processor.
  </p>
  <hr />
! <a name="msp430-x-elf"></a><a name="msp430-*-elf*"></a>
! <h3 class="heading">msp430-*-elf*</h3>
  <p>TI MSP430 processor.
  This configuration is intended for embedded systems.
  </p>
+ <p>&lsquo;<samp>msp430-*-elf</samp>&rsquo; is the standard configuration with most GCC
+ features enabled by default.
+ </p>
+ <p>&lsquo;<samp>msp430-*-elfbare</samp>&rsquo; is tuned for a bare-metal environment, and disables
+ features related to shared libraries and other functionality not used for
+ this device.  This reduces code and data usage of the GCC libraries, resulting
+ in a minimal run-time environment by default.
+ </p>
+ <p>Features disabled by default include:
+ </p><ul>
+ <li> transactional memory
+ </li><li> __cxa_atexit
+ </li></ul>
+ 
  <hr />
  <a name="nds32le-x-elf"></a><a name="nds32le-*-elf"></a>
  <h3 class="heading">nds32le-*-elf</h3>
*************** This configuration is intended for embed
*** 1001,1007 ****
  <p>You can specify a default version for the <samp>-mcpu=<var>cpu_type</var></samp>
  switch by using the configure option <samp>--with-cpu-<var>cpu_type</var></samp>.
  </p>
! <p>You will need GNU binutils 2.15 or newer.
  </p>
  <hr />
  <a name="powerpc-x-darwin"></a><a name="powerpc-*-darwin*"></a>
--- 1005,1011 ----
  <p>You can specify a default version for the <samp>-mcpu=<var>cpu_type</var></samp>
  switch by using the configure option <samp>--with-cpu-<var>cpu_type</var></samp>.
  </p>
! <p>You will need GNU binutils 2.20 or newer.
  </p>
  <hr />
  <a name="powerpc-x-darwin"></a><a name="powerpc-*-darwin*"></a>
*************** This configuration is intended for embed
*** 1071,1100 ****
  <h3 class="heading">riscv32-*-elf</h3>
  <p>The RISC-V RV32 instruction set.
  This configuration is intended for embedded systems.
! This (and all other RISC-V) targets are supported upstream as of the
! binutils 2.28 release.
  </p>
  <hr />
  <a name="riscv32-x-linux"></a><a name="riscv32-*-linux"></a>
  <h3 class="heading">riscv32-*-linux</h3>
  <p>The RISC-V RV32 instruction set running GNU/Linux.
! This (and all other RISC-V) targets are supported upstream as of the
! binutils 2.28 release.
  </p>
  <hr />
  <a name="riscv64-x-elf"></a><a name="riscv64-*-elf"></a>
  <h3 class="heading">riscv64-*-elf</h3>
  <p>The RISC-V RV64 instruction set.
  This configuration is intended for embedded systems.
! This (and all other RISC-V) targets are supported upstream as of the
! binutils 2.28 release.
  </p>
  <hr />
  <a name="riscv64-x-linux"></a><a name="riscv64-*-linux"></a>
  <h3 class="heading">riscv64-*-linux</h3>
  <p>The RISC-V RV64 instruction set running GNU/Linux.
! This (and all other RISC-V) targets are supported upstream as of the
! binutils 2.28 release.
  </p>
  <hr />
  <a name="rx-x-elf"></a><a name="rx-*-elf"></a>
--- 1075,1100 ----
  <h3 class="heading">riscv32-*-elf</h3>
  <p>The RISC-V RV32 instruction set.
  This configuration is intended for embedded systems.
! This (and all other RISC-V) targets require the binutils 2.30 release.
  </p>
  <hr />
  <a name="riscv32-x-linux"></a><a name="riscv32-*-linux"></a>
  <h3 class="heading">riscv32-*-linux</h3>
  <p>The RISC-V RV32 instruction set running GNU/Linux.
! This (and all other RISC-V) targets require the binutils 2.30 release.
  </p>
  <hr />
  <a name="riscv64-x-elf"></a><a name="riscv64-*-elf"></a>
  <h3 class="heading">riscv64-*-elf</h3>
  <p>The RISC-V RV64 instruction set.
  This configuration is intended for embedded systems.
! This (and all other RISC-V) targets require the binutils 2.30 release.
  </p>
  <hr />
  <a name="riscv64-x-linux"></a><a name="riscv64-*-linux"></a>
  <h3 class="heading">riscv64-*-linux</h3>
  <p>The RISC-V RV64 instruction set running GNU/Linux.
! This (and all other RISC-V) targets require the binutils 2.30 release.
  </p>
  <hr />
  <a name="rx-x-elf"></a><a name="rx-*-elf"></a>
*************** supported as cross-compilation target on
*** 1120,1141 ****
  <hr />
  <a name="x-x-solaris2"></a><a name="g_t*-*-solaris2*"></a>
  <h3 class="heading">*-*-solaris2*</h3>
! <p>Support for Solaris 10 has been obsoleted in GCC 9, but can still be
! enabled by configuring with <samp>--enable-obsolete</samp>.  Support will be
! removed in GCC 10.  Support for Solaris 9 has been removed in GCC 5.
! Support for Solaris 8 has been removed in GCC 4.8.  Support for Solaris
! 7 has been removed in GCC 4.6.
  </p>
! <p>Sun does not ship a C compiler with Solaris 2 before Solaris 10, though
! you can download the Sun Studio compilers for free.  In Solaris 10 and
! 11, GCC 3.4.3 is available as <code>/usr/sfw/bin/gcc</code>.  Solaris 11
! also provides GCC 4.5.2, 4.7.3, and 4.8.2 as
! <code>/usr/gcc/4.5/bin/gcc</code> or similar.  Alternatively,
  you can install a pre-built GCC to bootstrap and install GCC.  See the
  <a href="binaries.html">binaries page</a> for details.
  </p>
  <p>The Solaris 2 <code>/bin/sh</code> will often fail to configure
! &lsquo;<samp>libstdc++-v3</samp>&rsquo;or &lsquo;<samp>boehm-gc</samp>&rsquo;.  We therefore recommend using the
  following initial sequence of commands
  </p>
  <div class="smallexample">
--- 1120,1137 ----
  <hr />
  <a name="x-x-solaris2"></a><a name="g_t*-*-solaris2*"></a>
  <h3 class="heading">*-*-solaris2*</h3>
! <p>Support for Solaris 10 has been removed in GCC 10.  Support for Solaris
! 9 has been removed in GCC 5.  Support for Solaris 8 has been removed in
! GCC 4.8.  Support for Solaris 7 has been removed in GCC 4.6.
  </p>
! <p>Solaris 11.3 provides GCC 4.5.2, 4.7.3, and 4.8.2 as
! <code>/usr/gcc/4.5/bin/gcc</code> or similar.  Newer Solaris versions
! provide one or more of GCC 5, 7, and 9.  Alternatively,
  you can install a pre-built GCC to bootstrap and install GCC.  See the
  <a href="binaries.html">binaries page</a> for details.
  </p>
  <p>The Solaris 2 <code>/bin/sh</code> will often fail to configure
! &lsquo;<samp>libstdc++-v3</samp>&rsquo;.  We therefore recommend using the
  following initial sequence of commands
  </p>
  <div class="smallexample">
*************** following initial sequence of commands
*** 1147,1192 ****
  In addition we strongly recommend specifying an absolute path to invoke
  <code><var>srcdir</var>/configure</code>.
  </p>
! <p>Solaris 10 comes with a number of optional OS packages.  Some of these
! are needed to use GCC fully, namely <code>SUNWarc</code>,
! <code>SUNWbtool</code>, <code>SUNWesu</code>, <code>SUNWhea</code>, <code>SUNWlibm</code>,
! <code>SUNWsprot</code>, and <code>SUNWtoo</code>.  If you did not install all
! optional packages when installing Solaris 10, you will need to verify that
! the packages that GCC needs are installed.
! To check whether an optional package is installed, use
! the <code>pkginfo</code> command.  To add an optional package, use the
! <code>pkgadd</code> command.  For further details, see the Solaris 10
! documentation.
! </p>
! <p>Starting with Solaris 11, the package management has changed, so you
! need to check for <code>system/header</code>, <code>system/linker</code>, and
! <code>developer/assembler</code> packages.  Checking for and installing
! packages is done with the <code>pkg</code> command now.
  </p>
  <p>Trying to use the linker and other tools in
  <samp>/usr/ucb</samp> to install GCC has been observed to cause trouble.
  For example, the linker may hang indefinitely.  The fix is to remove
  <samp>/usr/ucb</samp> from your <code>PATH</code>.
  </p>
! <p>The build process works more smoothly with the legacy Sun tools so, if you
  have <samp>/usr/xpg4/bin</samp> in your <code>PATH</code>, we recommend that you place
  <samp>/usr/bin</samp> before <samp>/usr/xpg4/bin</samp> for the duration of the build.
  </p>
  <p>We recommend the use of the Solaris assembler or the GNU assembler, in
  conjunction with the Solaris linker.  The GNU <code>as</code>
! versions included in Solaris 10, from GNU binutils 2.15 (in
! <samp>/usr/sfw/bin/gas</samp>), and Solaris 11,
! from GNU binutils 2.19 or newer (also in <samp>/usr/bin/gas</samp> and
  <samp>/usr/gnu/bin/as</samp>), are known to work.
! The current version, from GNU binutils 2.29,
  is known to work as well.  Note that your mileage may vary
  if you use a combination of the GNU tools and the Solaris tools: while the
! combination GNU <code>as</code> + Sun <code>ld</code> should reasonably work,
! the reverse combination Sun <code>as</code> + GNU <code>ld</code> may fail to
  build or cause memory corruption at runtime in some cases for C++ programs.
! GNU <code>ld</code> usually works as well, although the version included in
! Solaris 10 cannot be used due to several bugs.  Again, the current
! version (2.29) is known to work, but generally lacks platform specific
  features, so better stay with Solaris <code>ld</code>.  To use the LTO linker
  plugin (<samp>-fuse-linker-plugin</samp>) with GNU <code>ld</code>, GNU
  binutils <em>must</em> be configured with <samp>--enable-largefile</samp>.
--- 1143,1173 ----
  In addition we strongly recommend specifying an absolute path to invoke
  <code><var>srcdir</var>/configure</code>.
  </p>
! <p>In Solaris 11, you need to check for <code>system/header</code>,
! <code>system/linker</code>, and <code>developer/assembler</code> packages.
  </p>
  <p>Trying to use the linker and other tools in
  <samp>/usr/ucb</samp> to install GCC has been observed to cause trouble.
  For example, the linker may hang indefinitely.  The fix is to remove
  <samp>/usr/ucb</samp> from your <code>PATH</code>.
  </p>
! <p>The build process works more smoothly with the legacy Solaris tools so, if you
  have <samp>/usr/xpg4/bin</samp> in your <code>PATH</code>, we recommend that you place
  <samp>/usr/bin</samp> before <samp>/usr/xpg4/bin</samp> for the duration of the build.
  </p>
  <p>We recommend the use of the Solaris assembler or the GNU assembler, in
  conjunction with the Solaris linker.  The GNU <code>as</code>
! versions included in Solaris 11.3,
! from GNU binutils 2.23.1 or newer (in <samp>/usr/bin/gas</samp> and
  <samp>/usr/gnu/bin/as</samp>), are known to work.
! The current version, from GNU binutils 2.34,
  is known to work as well.  Note that your mileage may vary
  if you use a combination of the GNU tools and the Solaris tools: while the
! combination GNU <code>as</code> + Solaris <code>ld</code> should reasonably work,
! the reverse combination Solaris <code>as</code> + GNU <code>ld</code> may fail to
  build or cause memory corruption at runtime in some cases for C++ programs.
! GNU <code>ld</code> usually works as well.  Again, the current
! version (2.34) is known to work, but generally lacks platform specific
  features, so better stay with Solaris <code>ld</code>.  To use the LTO linker
  plugin (<samp>-fuse-linker-plugin</samp>) with GNU <code>ld</code>, GNU
  binutils <em>must</em> be configured with <samp>--enable-largefile</samp>.
*************** GNU binutils.  &lsquo;<samp>libstdc++</s
*** 1197,1209 ****
  appropriate version is found.  Solaris <code>c++filt</code> from the Solaris
  Studio compilers does <em>not</em> work.
  </p>
! <p>Sun bug 4927647 sometimes causes random spurious testsuite failures
! related to missing diagnostic output.  This bug doesn&rsquo;t affect GCC
! itself, rather it is a kernel bug triggered by the <code>expect</code>
! program which is used only by the GCC testsuite driver.  When the bug
! causes the <code>expect</code> program to miss anticipated output, extra
! testsuite failures appear.
  </p>
  <hr />
  <a name="sparc-x-x"></a><a name="sparc*-*-*"></a>
  <h3 class="heading">sparc*-*-*</h3>
--- 1178,1196 ----
  appropriate version is found.  Solaris <code>c++filt</code> from the Solaris
  Studio compilers does <em>not</em> work.
  </p>
! <p>The versions of the GNU Multiple Precision Library (GMP), the MPFR
! library and the MPC library bundled with Solaris 11.3 and later are
! usually recent enough to match GCC&rsquo;s requirements.  There are two
! caveats:
  </p>
+ <ul>
+ <li> While the version of the GMP library in Solaris 11.3 works with GCC, you
+ need to configure with <samp>--with-gmp-include=/usr/include/gmp</samp>.
+ 
+ </li><li> The version of the MPFR libary included in Solaris 11.3 is too old; you
+ need to provide a more recent one.
+ </li></ul>
+ 
  <hr />
  <a name="sparc-x-x"></a><a name="sparc*-*-*"></a>
  <h3 class="heading">sparc*-*-*</h3>
*************** in <a href="prerequisites.html">the prer
*** 1221,1227 ****
  <a name="sparc-sun-solaris2"></a><a name="sparc-sun-solaris2*"></a>
  <h3 class="heading">sparc-sun-solaris2*</h3>
  <p>When GCC is configured to use GNU binutils 2.14 or later, the binaries
! produced are smaller than the ones produced using Sun&rsquo;s native tools;
  this difference is quite significant for binaries containing debugging
  information.
  </p>
--- 1208,1214 ----
  <a name="sparc-sun-solaris2"></a><a name="sparc-sun-solaris2*"></a>
  <h3 class="heading">sparc-sun-solaris2*</h3>
  <p>When GCC is configured to use GNU binutils 2.14 or later, the binaries
! produced are smaller than the ones produced using Solaris native tools;
  this difference is quite significant for binaries containing debugging
  information.
  </p>
*************** machines.
*** 1237,1261 ****
  library or the MPC library on a Solaris 7 or later system, the canonical
  target triplet must be specified as the <code>build</code> parameter on the
  configure line.  This target triplet can be obtained by invoking <code>./config.guess</code> in the toplevel source directory of GCC (and
! not that of GMP or MPFR or MPC).  For example on a Solaris 9 system:
! </p>
! <div class="smallexample">
! <pre class="smallexample">% ./configure --build=sparc-sun-solaris2.9 --prefix=xxx
! </pre></div>
! 
! <hr />
! <a name="sparc-sun-solaris210"></a><a name="sparc-sun-solaris2_002e10"></a>
! <h3 class="heading">sparc-sun-solaris2.10</h3>
! <p>There is a bug in older versions of the Sun assembler which breaks
! thread-local storage (TLS).  A typical error message is
  </p>
  <div class="smallexample">
! <pre class="smallexample">ld: fatal: relocation error: R_SPARC_TLS_LE_HIX22: file /var/tmp//ccamPA1v.o:
!   symbol &lt;unknown&gt;: bad symbol type SECT: symbol type must be TLS
  </pre></div>
  
- <p>This bug is fixed in Sun patch 118683-03 or later.
- </p>
  <hr />
  <a name="sparc-x-linux"></a><a name="sparc-*-linux*"></a>
  <h3 class="heading">sparc-*-linux*</h3>
--- 1224,1235 ----
  library or the MPC library on a Solaris 7 or later system, the canonical
  target triplet must be specified as the <code>build</code> parameter on the
  configure line.  This target triplet can be obtained by invoking <code>./config.guess</code> in the toplevel source directory of GCC (and
! not that of GMP or MPFR or MPC).  For example on a Solaris 11 system:
  </p>
  <div class="smallexample">
! <pre class="smallexample">% ./configure --build=sparc-sun-solaris2.11 --prefix=xxx
  </pre></div>
  
  <hr />
  <a name="sparc-x-linux"></a><a name="sparc-*-linux*"></a>
  <h3 class="heading">sparc-*-linux*</h3>
*************** thread-local storage (TLS).  A typical e
*** 1263,1275 ****
  <hr />
  <a name="sparc64-x-solaris2"></a><a name="sparc64-*-solaris2*"></a>
  <h3 class="heading">sparc64-*-solaris2*</h3>
  <p>When configuring the GNU Multiple Precision Library (GMP), the MPFR
  library or the MPC library, the canonical target triplet must be specified
  as the <code>build</code> parameter on the configure line.  For example
! on a Solaris 9 system:
  </p>
  <div class="smallexample">
! <pre class="smallexample">% ./configure --build=sparc64-sun-solaris2.9 --prefix=xxx
  </pre></div>
  
  <hr />
--- 1237,1256 ----
  <hr />
  <a name="sparc64-x-solaris2"></a><a name="sparc64-*-solaris2*"></a>
  <h3 class="heading">sparc64-*-solaris2*</h3>
+ <p>When configuring a 64-bit-default GCC on Solaris/SPARC, you must use a
+ build compiler that generates 64-bit code, either by default or by
+ specifying &lsquo;<samp>CC='gcc -m64' CXX='gcc-m64'</samp>&rsquo; to <code>configure</code>.
+ Additionally, you <em>must</em> pass <samp>--build=sparc64-sun-solaris2.11</samp>
+ or <samp>--build=sparcv9-sun-solaris2.11</samp> because <samp>config.guess</samp>
+ misdetects this situation, which can cause build failures.
+ </p>
  <p>When configuring the GNU Multiple Precision Library (GMP), the MPFR
  library or the MPC library, the canonical target triplet must be specified
  as the <code>build</code> parameter on the configure line.  For example
! on a Solaris 11 system:
  </p>
  <div class="smallexample">
! <pre class="smallexample">% ./configure --build=sparc64-sun-solaris2.11 --prefix=xxx
  </pre></div>
  
  <hr />
*************** On GNU/Linux the default is a bi-arch co
*** 1349,1356 ****
  both 64-bit x86-64 and 32-bit x86 code (via the <samp>-m32</samp> switch).
  </p>
  <hr />
! <a name="x86-64-x-solaris210"></a><a name="x86_005f64-*-solaris2_002e1_005b0-9_005d*"></a>
! <h3 class="heading">x86_64-*-solaris2.1[0-9]*</h3>
  <p>GCC also supports the x86-64 architecture implemented by the AMD64
  processor (&lsquo;<samp>amd64-*-*</samp>&rsquo; is an alias for &lsquo;<samp>x86_64-*-*</samp>&rsquo;) on
  Solaris 10 or later.  Unlike other systems, without special options a
--- 1330,1337 ----
  both 64-bit x86-64 and 32-bit x86 code (via the <samp>-m32</samp> switch).
  </p>
  <hr />
! <a name="x86-64-x-solaris2"></a><a name="x86_005f64-*-solaris2*"></a>
! <h3 class="heading">x86_64-*-solaris2*</h3>
  <p>GCC also supports the x86-64 architecture implemented by the AMD64
  processor (&lsquo;<samp>amd64-*-*</samp>&rsquo; is an alias for &lsquo;<samp>x86_64-*-*</samp>&rsquo;) on
  Solaris 10 or later.  Unlike other systems, without special options a
*************** can generate 64-bit x86-64 code with the
*** 1359,1365 ****
  GCC 4.7, there is also a configuration that defaults to 64-bit code, but
  can generate 32-bit code with <samp>-m32</samp>.  To configure and build
  this way, you have to provide all support libraries like <samp>libgmp</samp>
! as 64-bit code, configure with <samp>--target=x86_64-pc-solaris2.1x</samp>
  and &lsquo;<samp>CC=gcc -m64</samp>&rsquo;.
  </p>
  <hr />
--- 1340,1346 ----
  GCC 4.7, there is also a configuration that defaults to 64-bit code, but
  can generate 32-bit code with <samp>-m32</samp>.  To configure and build
  this way, you have to provide all support libraries like <samp>libgmp</samp>
! as 64-bit code, configure with <samp>--target=x86_64-pc-solaris2.11</samp>
  and &lsquo;<samp>CC=gcc -m64</samp>&rsquo;.
  </p>
  <hr />
diff -Nrcpad gcc-9.3.0/INSTALL/test.html gcc-10.1.0/INSTALL/test.html
*** gcc-9.3.0/INSTALL/test.html	Thu Mar 12 11:08:33 2020
--- gcc-10.1.0/INSTALL/test.html	Thu May  7 10:50:54 2020
***************
*** 1,6 ****
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
--- 1,6 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
! <!-- Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
  under the terms of the GNU Free Documentation License, Version 1.3 or
*************** You have freedom to copy and modify this
*** 22,31 ****
  <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
  <head>
  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
! <title>Installing GCC</title>
  
! <meta name="description" content="Installing GCC">
! <meta name="keywords" content="Installing GCC">
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
--- 22,31 ----
  <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
  <head>
  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
! <title>Installing GCC: Testing</title>
  
! <meta name="description" content="Installing GCC: Testing">
! <meta name="keywords" content="Installing GCC: Testing">
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
*************** ul.no-bullet {list-style: none}
*** 61,67 ****
  </head>
  
  <body lang="en">
! <h1 class="settitle" align="center">Installing GCC</h1>
  
  
  
--- 61,67 ----
  </head>
  
  <body lang="en">
! <h1 class="settitle" align="center">Installing GCC: Testing</h1>
  
  
  
diff -Nrcpad gcc-9.3.0/LAST_UPDATED gcc-10.1.0/LAST_UPDATED
*** gcc-9.3.0/LAST_UPDATED	Thu Mar 12 11:08:31 2020
--- gcc-10.1.0/LAST_UPDATED	Thu May  7 10:50:52 2020
***************
*** 1 ****
! Obtained from git: releases/gcc-9.3.0 revision 4212a6a3e44f870412d9025eeb323fd4f50a61da
--- 1 ----
! Obtained from git: releases/gcc-10.1.0 revision 6e6e3f144a33ae504149dc992453b4f6dea12fdb
diff -Nrcpad gcc-9.3.0/MAINTAINERS gcc-10.1.0/MAINTAINERS
*** gcc-9.3.0/MAINTAINERS	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/MAINTAINERS	Thu May  7 10:49:58 2020
*************** docs, and the testsuite related to that.
*** 44,52 ****
  			CPU Port Maintainers	(CPU alphabetical order)
  
  aarch64 port		Richard Earnshaw	<richard.earnshaw@arm.com>
! aarch64 port		James Greenhalgh	<james.greenhalgh@arm.com>
  aarch64 port		Marcus Shawcroft	<marcus.shawcroft@arm.com>
! aarch64 SVE port	Richard Sandiford	<richard.sandiford@arm.com>
  alpha port		Richard Henderson	<rth@twiddle.net>
  amdgcn port		Julian Brown		<julian@codesourcery.com>
  amdgcn port		Andrew Stubbs		<ams@codesourcery.com>
--- 44,52 ----
  			CPU Port Maintainers	(CPU alphabetical order)
  
  aarch64 port		Richard Earnshaw	<richard.earnshaw@arm.com>
! aarch64 port		Richard Sandiford	<richard.sandiford@arm.com>
  aarch64 port		Marcus Shawcroft	<marcus.shawcroft@arm.com>
! aarch64 port		Kyrylo Tkachov		<kyrylo.tkachov@arm.com>
  alpha port		Richard Henderson	<rth@twiddle.net>
  amdgcn port		Julian Brown		<julian@codesourcery.com>
  amdgcn port		Andrew Stubbs		<ams@codesourcery.com>
*************** arm port		Ramana Radhakrishnan	<ramana.r
*** 57,62 ****
--- 57,63 ----
  arm port		Kyrylo Tkachov		<kyrylo.tkachov@arm.com>
  avr port		Denis Chertykov		<chertykov@gmail.com>
  bfin port		Jie Zhang		<jzhang918@gmail.com>
+ bpf port		Jose E. Marchesi	<jose.marchesi@oracle.com>
  c6x port		Bernd Schmidt		<bernds_cb1@t-online.de>
  cris port		Hans-Peter Nilsson	<hp@axis.com>
  c-sky port		Xianmiao Qu		<xianmiao_qu@c-sky.com>
*************** c-sky port		Yunhai Shang		<yunhai_shang@
*** 64,70 ****
  epiphany port		Joern Rennecke		<gnu@amylaar.uk>
  fr30 port		Nick Clifton		<nickc@redhat.com>
  frv port		Nick Clifton		<nickc@redhat.com>
! frv port		Alexandre Oliva		<aoliva@redhat.com>
  ft32 port		James Bowman		<james.bowman@ftdichip.com>
  h8 port			Jeff Law		<law@redhat.com>
  hppa port		Jeff Law		<law@redhat.com>
--- 65,71 ----
  epiphany port		Joern Rennecke		<gnu@amylaar.uk>
  fr30 port		Nick Clifton		<nickc@redhat.com>
  frv port		Nick Clifton		<nickc@redhat.com>
! frv port		Alexandre Oliva		<aoliva@gcc.gnu.org>
  ft32 port		James Bowman		<james.bowman@ftdichip.com>
  h8 port			Jeff Law		<law@redhat.com>
  hppa port		Jeff Law		<law@redhat.com>
*************** hppa port		John David Anglin	<dave.angli
*** 72,78 ****
  i386 port		Jan Hubicka		<hubicka@ucw.cz>
  i386 port		Uros Bizjak		<ubizjak@gmail.com>
  i386 vector ISA extns	Kirill Yukhin		<kirill.yukhin@gmail.com>
- ia64 port		Jim Wilson		<wilson@tuliptree.org>
  iq2000 port		Nick Clifton		<nickc@redhat.com>
  lm32 port		Sebastien Bourdeauducq	<sebastien@milkymist.org>
  m32r port		Nick Clifton		<nickc@redhat.com>
--- 73,78 ----
*************** microblaze		Michael Eager		<eager@eagerc
*** 84,90 ****
  mips port		Matthew Fortune		<mfortune@gmail.com>
  mmix port		Hans-Peter Nilsson	<hp@bitrange.com>
  mn10300 port		Jeff Law		<law@redhat.com>
! mn10300 port		Alexandre Oliva		<aoliva@redhat.com>
  moxie port		Anthony Green		<green@moxielogic.com>
  msp430 port		Nick Clifton		<nickc@redhat.com>
  nds32 port		Chung-Ju Wu		<jasonwucj@gmail.com>
--- 84,90 ----
  mips port		Matthew Fortune		<mfortune@gmail.com>
  mmix port		Hans-Peter Nilsson	<hp@bitrange.com>
  mn10300 port		Jeff Law		<law@redhat.com>
! mn10300 port		Alexandre Oliva		<aoliva@gcc.gnu.org>
  moxie port		Anthony Green		<green@moxielogic.com>
  msp430 port		Nick Clifton		<nickc@redhat.com>
  nds32 port		Chung-Ju Wu		<jasonwucj@gmail.com>
*************** or1k port		Stafford Horne		<shorne@gmail
*** 96,102 ****
  pdp11 port		Paul Koning		<ni1d@arrl.net>
  powerpcspe port		Andrew Jenner		<andrew@codesourcery.com>
  riscv port		Kito Cheng		<kito.cheng@gmail.com>
! riscv port		Palmer Dabbelt		<palmer@sifive.com>
  riscv port		Andrew Waterman		<andrew@sifive.com>
  riscv port		Jim Wilson		<jimw@sifive.com>
  rs6000/powerpc port	David Edelsohn		<dje.gcc@gmail.com>
--- 96,102 ----
  pdp11 port		Paul Koning		<ni1d@arrl.net>
  powerpcspe port		Andrew Jenner		<andrew@codesourcery.com>
  riscv port		Kito Cheng		<kito.cheng@gmail.com>
! riscv port		Palmer Dabbelt		<palmer@dabbelt.com>
  riscv port		Andrew Waterman		<andrew@sifive.com>
  riscv port		Jim Wilson		<jimw@sifive.com>
  rs6000/powerpc port	David Edelsohn		<dje.gcc@gmail.com>
*************** rx port			Nick Clifton		<nickc@redhat.co
*** 106,118 ****
  s390 port		Hartmut Penner		<hepenner@us.ibm.com>
  s390 port		Ulrich Weigand		<uweigand@de.ibm.com>
  s390 port		Andreas Krebbel		<krebbel@linux.ibm.com>
! sh port			Alexandre Oliva		<aoliva@redhat.com>
  sh port			Oleg Endo		<olegendo@gcc.gnu.org>
  sparc port		David S. Miller		<davem@redhat.com>
  sparc port		Eric Botcazou		<ebotcazou@libertysurf.fr>
- spu port		Trevor Smigiel		<trevor_smigiel@playstation.sony.com>
- spu port		David Edelsohn		<dje.gcc@gmail.com>
- spu port		Ulrich Weigand		<uweigand@de.ibm.com>
  tilegx port		Walter Lee		<walt@tilera.com>
  tilepro port		Walter Lee		<walt@tilera.com>
  v850 port		Nick Clifton		<nickc@redhat.com>
--- 106,115 ----
  s390 port		Hartmut Penner		<hepenner@us.ibm.com>
  s390 port		Ulrich Weigand		<uweigand@de.ibm.com>
  s390 port		Andreas Krebbel		<krebbel@linux.ibm.com>
! sh port			Alexandre Oliva		<aoliva@gcc.gnu.org>
  sh port			Oleg Endo		<olegendo@gcc.gnu.org>
  sparc port		David S. Miller		<davem@redhat.com>
  sparc port		Eric Botcazou		<ebotcazou@libertysurf.fr>
  tilegx port		Walter Lee		<walt@tilera.com>
  tilepro port		Walter Lee		<walt@tilera.com>
  v850 port		Nick Clifton		<nickc@redhat.com>
*************** libiberty		Ian Lance Taylor	<ian@airs.co
*** 174,180 ****
  libitm			Torvald Riegel		<triegel@redhat.com>
  libobjc			Nicola Pero		<nicola.pero@meta-innovation.com>
  libobjc			Andrew Pinski		<pinskia@gmail.com>
! libquadmath		Tobias Burnus		<burnus@net-b.de>
  libquadmath		Jakub Jelinek		<jakub@redhat.com>
  libvtv			Caroline Tice		<cmtice@google.com>
  libhsail-rt		Pekka Jääskeläinen	<pekka.jaaskelainen@parmance.com>
--- 171,177 ----
  libitm			Torvald Riegel		<triegel@redhat.com>
  libobjc			Nicola Pero		<nicola.pero@meta-innovation.com>
  libobjc			Andrew Pinski		<pinskia@gmail.com>
! libquadmath		Tobias Burnus		<tobias@codesourcery.com>
  libquadmath		Jakub Jelinek		<jakub@redhat.com>
  libvtv			Caroline Tice		<cmtice@google.com>
  libhsail-rt		Pekka Jääskeläinen	<pekka.jaaskelainen@parmance.com>
*************** diagnostic messages	Dodji Seketeli		<dod
*** 214,220 ****
  diagnostic messages	David Malcolm		<dmalcolm@redhat.com>
  build machinery (*.in)	Paolo Bonzini		<bonzini@gnu.org>
  build machinery (*.in)	Nathanael Nerode	<neroden@gcc.gnu.org>
! build machinery (*.in)	Alexandre Oliva		<aoliva@redhat.com>
  build machinery (*.in)	Ralf Wildenhues		<Ralf.Wildenhues@gmx.de>
  docs co-maintainer	Gerald Pfeifer		<gerald@pfeifer.com>
  docs co-maintainer	Joseph Myers		<joseph@codesourcery.com>
--- 211,217 ----
  diagnostic messages	David Malcolm		<dmalcolm@redhat.com>
  build machinery (*.in)	Paolo Bonzini		<bonzini@gnu.org>
  build machinery (*.in)	Nathanael Nerode	<neroden@gcc.gnu.org>
! build machinery (*.in)	Alexandre Oliva		<aoliva@gcc.gnu.org>
  build machinery (*.in)	Ralf Wildenhues		<Ralf.Wildenhues@gmx.de>
  docs co-maintainer	Gerald Pfeifer		<gerald@pfeifer.com>
  docs co-maintainer	Joseph Myers		<joseph@codesourcery.com>
*************** check in changes outside of the parts of
*** 258,270 ****
  
  arc port		Andrew Burgess		<andrew.burgess@embecosm.com>
  arc port		Claudiu Zissulescu	<claziss@synopsys.com>
  C front end		Marek Polacek		<polacek@redhat.com>
  dataflow		Paolo Bonzini		<bonzini@gnu.org>
  dataflow		Seongbae Park		<seongbae.park@gmail.com>
  dataflow		Kenneth Zadeck		<zadeck@naturalbridge.com>
  driver			Joseph Myers		<joseph@codesourcery.com>
  Fortran			Janne Blomqvist		<jb@gcc.gnu.org>
! Fortran			Tobias Burnus		<burnus@net-b.de>
  Fortran			François-Xavier Coudert	<fxcoudert@gcc.gnu.org>
  Fortran			Jerry DeLisle		<jvdelisle@gcc.gnu.org>
  Fortran			Erik Edelmann		<erik.edelmann@iki.fi>
--- 255,269 ----
  
  arc port		Andrew Burgess		<andrew.burgess@embecosm.com>
  arc port		Claudiu Zissulescu	<claziss@synopsys.com>
+ callgraph		Martin Liska		<mliska@suse.cz>
+ callgraph		Martin Jambor		<mjambor@suse.cz>
  C front end		Marek Polacek		<polacek@redhat.com>
  dataflow		Paolo Bonzini		<bonzini@gnu.org>
  dataflow		Seongbae Park		<seongbae.park@gmail.com>
  dataflow		Kenneth Zadeck		<zadeck@naturalbridge.com>
  driver			Joseph Myers		<joseph@codesourcery.com>
  Fortran			Janne Blomqvist		<jb@gcc.gnu.org>
! Fortran			Tobias Burnus		<tobias@codesourcery.com>
  Fortran			François-Xavier Coudert	<fxcoudert@gcc.gnu.org>
  Fortran			Jerry DeLisle		<jvdelisle@gcc.gnu.org>
  Fortran			Erik Edelmann		<erik.edelmann@iki.fi>
*************** loop optimizer		Zdenek Dvorak		<ook@ucw.
*** 287,293 ****
  LTO			Richard Biener		<rguenther@suse.de>
  LTO plugin		Cary Coutant		<ccoutant@gmail.com>
  Plugin			Le-Chun Wu		<lcwu@google.com>
! register allocation	Peter Bergner		<bergner@vnet.ibm.com>
  register allocation	Kenneth Zadeck		<zadeck@naturalbridge.com>
  register allocation	Seongbae Park		<seongbae.park@gmail.com>
  RTL optimizers		Steven Bosscher		<steven@gcc.gnu.org>
--- 286,292 ----
  LTO			Richard Biener		<rguenther@suse.de>
  LTO plugin		Cary Coutant		<ccoutant@gmail.com>
  Plugin			Le-Chun Wu		<lcwu@google.com>
! register allocation	Peter Bergner		<bergner@linux.ibm.com>
  register allocation	Kenneth Zadeck		<zadeck@naturalbridge.com>
  register allocation	Seongbae Park		<seongbae.park@gmail.com>
  RTL optimizers		Steven Bosscher		<steven@gcc.gnu.org>
*************** Wolfgang Bangerth				<bangerth@dealii.or
*** 317,322 ****
--- 316,322 ----
  Gergö Barany					<gergo@codesourcery.com>
  Charles Baylis					<charles.baylis@linaro.org>
  Tejas Belagod					<tejas.belagod@arm.com>
+ Matthew Beliveau				<mbelivea@redhat.com>
  Jon Beniston					<jon@beniston.com>
  Andrew Bennett					<andrew.bennett@imgtec.com>
  Andrew Benson					<abensonca@gmail.com>
*************** William Cohen					<wcohen@redhat.com>
*** 353,358 ****
--- 353,359 ----
  Michael Collison				<michael.collison@arm.com>
  Josh Conner					<joshconner@google.com>
  R. Kelley Cook					<kcook@gcc.gnu.org>
+ Andrea Corallo					<andrea.corallo@arm.com>
  Christian Cornelssen				<ccorn@cs.tu-berlin.de>
  Ludovic Courtès					<ludo@gnu.org>
  Lawrence Crowl					<crowl@google.com>
*************** Bud Davis					<jmdavis@link.com>
*** 365,374 ****
--- 366,377 ----
  Chris Demetriou					<cgd@google.com>
  Sameera Deshpande				<sameera.deshpande@linaro.org>
  Wilco Dijkstra					<wdijkstr@arm.com>
+ Dimitar Dimitrov				<dimitar@dinux.eu>
  Benoit Dupont de Dinechin			<benoit.dupont-de-dinechin@st.com>
  Jason Eckhardt					<jle@rice.edu>
  Bernd Edlinger					<bernd.edlinger@hotmail.de>
  Phil Edwards					<pme@gcc.gnu.org>
+ Mark Eggleston					<mark.eggleston@codethink.co.uk>
  Steve Ellcey					<sellcey@caviumnetworks.com>
  Mohan Embar					<gnustuff@thisiscool.com>
  Revital Eres					<eres@il.ibm.com>
*************** Jan-Benedict Glaw				<jbglaw@lug-owl.de>
*** 397,402 ****
--- 400,406 ----
  Marc Glisse					<marc.glisse@inria.fr>
  Prachi Godbole					<prachi.godbole@imgtec.com>
  Torbjorn Granlund				<tege@swox.com>
+ James Greenhalgh				<james.greenhalgh@arm.com>
  Doug Gregor					<doug.gregor@gmail.com>
  Matthew Gretton-Dann				<matthew.gretton-dann@arm.com>
  Yury Gribov					<tetra2005@gmail.com>
*************** Xuepeng Guo					<terry.xpguo@gmail.com>
*** 407,412 ****
--- 411,417 ----
  Wei Guozhi					<carrot@google.com>
  Mostafa Hagog					<hagog@gcc.gnu.org>
  Andrew Haley		                        <aph@redhat.com>
+ Frederik Harwath				<frederik@codesourcery.com>
  Stuart Hastings					<stuart@apple.com>
  Michael Haubenwallner				<michael.haubenwallner@ssi-schaefer.com>
  Pat Haugen					<pthaugen@us.ibm.com>
*************** Falk Hueffner					<falk@debian.org>
*** 426,434 ****
--- 431,444 ----
  Andrew John Hughes				<gnu_andrew@member.fsf.org>
  Dominique d'Humieres				<dominiq@lps.ens.fr>
  Andy Hutchinson					<hutchinsonandy@aim.com>
+ Joel Hutton					<joel.hutton@arm.com>
+ Lewis Hyatt					<lhyatt@gmail.com>
  Naveen H.S					<naveenh@marvell.com>
+ Roland Illig					<roland.illig@gmx.de>
  Meador Inge					<meadori@codesourcery.com>
  Bernardo Innocenti				<bernie@develer.com>
+ Mihail Ionescu					<mihail.ionescu@arm.com>
+ Vladislav Ivanishin				<vlad@ispras.ru>
  Alexander Ivchenko				<aivchenk@gmail.com>
  Balaji V. Iyer					<bviyer@gmail.com>
  Daniel Jacobowitz				<drow@false.org>
*************** Razya Ladelsky					<razya@gcc.gnu.org>
*** 462,467 ****
--- 472,478 ----
  Thierry Lafage					<thierry.lafage@inria.fr>
  Aaron W. LaFramboise				<aaronavay62@aaronwl.com>
  Rask Ingemann Lambertsen			<ccc94453@vip.cybercity.dk>
+ Jerome Lambourg                                 <lambourg@adacore.com>
  Asher Langton					<langton2@llnl.gov>
  Chris Lattner					<sabre@nondot.org>
  Terry Laurenzo					<tlaurenzo@gmail.com>
*************** Carl Love					<cel@us.ibm.com>
*** 487,498 ****
  Martin v. Löwis					<loewis@informatik.hu-berlin.de>
  H.J. Lu						<hjl.tools@gmail.com>
  Xiong Hu Luo					<luoxhu@linux.vnet.ibm.com>
  Christophe Lyon					<christophe.lyon@st.com>
  Luis Machado					<luisgpm@br.ibm.com>
  Ziga Mahkovec					<ziga.mahkovec@klika.si>
  Matthew Malcomson				<matthew.malcomson@arm.com>
  Mikhail Maltsev					<maltsevm@gmail.com>
! Jose E. Marchesi				<jose.marchesi@oracle.com>
  Patrick Marlier					<patrick.marlier@gmail.com>
  Simon Martin					<simartin@users.sourceforge.net>
  Alejandro Martinez				<alejandro.martinezvicente@arm.com>
--- 498,510 ----
  Martin v. Löwis					<loewis@informatik.hu-berlin.de>
  H.J. Lu						<hjl.tools@gmail.com>
  Xiong Hu Luo					<luoxhu@linux.vnet.ibm.com>
+ Bin Bin Lv					<shlb@linux.ibm.com>
  Christophe Lyon					<christophe.lyon@st.com>
  Luis Machado					<luisgpm@br.ibm.com>
  Ziga Mahkovec					<ziga.mahkovec@klika.si>
  Matthew Malcomson				<matthew.malcomson@arm.com>
  Mikhail Maltsev					<maltsevm@gmail.com>
! Stamatis Markianos-Wright			<stam.markianos-wright@arm.com>
  Patrick Marlier					<patrick.marlier@gmail.com>
  Simon Martin					<simartin@users.sourceforge.net>
  Alejandro Martinez				<alejandro.martinezvicente@arm.com>
*************** Brooks Moses					<bmoses@google.com>
*** 514,525 ****
  Dirk Mueller					<dmueller@suse.de>
  Phil Muldoon					<pmuldoon@redhat.com>
  Steven Munroe					<munroesj52@gmail.com>
  Szabolcs Nagy					<szabolcs.nagy@arm.com>
  Quentin Neill					<quentin.neill.gnu@gmail.com>
  Adam Nemet					<adambnemet@gmail.com>
  Thomas Neumann					<tneumann@users.sourceforge.net>
  Dan Nicolaescu					<dann@ics.uci.edu>
! Kelvin Nilsen					<kdnilsen@linux.vnet.ibm.com>
  James Norris
  Diego Novillo					<dnovillo@google.com>
  Dorit Nuzman					<dorit@il.ibm.com>
--- 526,538 ----
  Dirk Mueller					<dmueller@suse.de>
  Phil Muldoon					<pmuldoon@redhat.com>
  Steven Munroe					<munroesj52@gmail.com>
+ Jun Ma						<junma@linux.alibaba.com>
  Szabolcs Nagy					<szabolcs.nagy@arm.com>
  Quentin Neill					<quentin.neill.gnu@gmail.com>
  Adam Nemet					<adambnemet@gmail.com>
  Thomas Neumann					<tneumann@users.sourceforge.net>
  Dan Nicolaescu					<dann@ics.uci.edu>
! Kelvin Nilsen					<kelvin.nilsen@gmail.com>
  James Norris
  Diego Novillo					<dnovillo@google.com>
  Dorit Nuzman					<dorit@il.ibm.com>
*************** Peter O'Gorman					<pogma@thewrittenword
*** 530,535 ****
--- 543,549 ----
  Andrea Ornstein					<andrea.ornstein@st.com>
  Maxim Ostapenko					<m.ostapenko@samsung.com>
  Patrick Palka					<ppalka@gcc.gnu.org>
+ Srinath Parvathaneni				<srinath.parvathaneni@arm.com>
  Devang Patel					<dpatel@apple.com>
  Andris Pavenis					<andris.pavenis@iki.fi>
  Fernando Pereira				<pronesto@gmail.com>
*************** Fritz Reese					<fritzoreese@gmail.com>
*** 553,558 ****
--- 567,573 ----
  Volker Reichelt					<v.reichelt@netcologne.de>
  Bernhard Reutner-Fischer			<rep.dot.nop@gmail.com>
  Tom Rix						<trix@redhat.com>
+ Thomas Rodgers					<trodgers@redhat.com>
  Craig Rodrigues					<rodrigc@gcc.gnu.org>
  Erven Rohou					<erven.rohou@inria.fr>
  Ira Rosen					<irar@il.ibm.com>
*************** Trevor Saunders					<tbsaunde+gcc@tbsaun
*** 567,572 ****
--- 582,588 ----
  Aaron Sawdey					<acsawdey@linux.ibm.com>
  Roger Sayle					<roger@eyesopen.com>
  Will Schmidt					<will_schmidt@vnet.ibm.com>
+ Stefan Schulze Frielinghaus			<stefansf@linux.ibm.com>
  Tilo Schwarz					<tilo@tilo-schwarz.de>
  Martin Sebor					<msebor@gcc.gnu.org>
  Svein Seldal					<svein@dev.seldal.com>
*************** Sharad Singhai					<singhai@google.com>
*** 579,587 ****
  Johannes Singler				<singler@kit.edu>
  Franz Sirl					<franz.sirl-kernel@lauterbach.com>
  Jan Sjodin					<jan.sjodin@amd.com>
  Edward Smith-Rowland				<3dw4rd@verizon.net>
  Jayant Sonar					<rsonar.jayant@gmail.com>
! Anatoly Sokolov					<aesok@post.ru>
  Michael Sokolov					<msokolov@ivan.Harhan.ORG>
  Richard Stallman				<rms@gnu.org>
  Basile Starynkevitch				<basile@starynkevitch.net>
--- 595,604 ----
  Johannes Singler				<singler@kit.edu>
  Franz Sirl					<franz.sirl-kernel@lauterbach.com>
  Jan Sjodin					<jan.sjodin@amd.com>
+ Trevor Smigiel					<trevor_smigiel@playstation.sony.com>
  Edward Smith-Rowland				<3dw4rd@verizon.net>
  Jayant Sonar					<rsonar.jayant@gmail.com>
! Anatoly Sokolov					<aesok@dol.ru>
  Michael Sokolov					<msokolov@ivan.Harhan.ORG>
  Richard Stallman				<rms@gnu.org>
  Basile Starynkevitch				<basile@starynkevitch.net>
*************** Gabriele Svelto					<gabriele.svelto@st.
*** 594,600 ****
  Toma Tabacu					<toma.tabacu@imgtec.com>
  Sriraman Tallam					<tmsriram@google.com>
  Samuel Tardieu					<sam@rfc1149.net>
! Sam Tebbs					<sam.tebbs@arm.com>
  Dinar Temirbulatov				<dtemirbulatov@gmail.com>
  Kresten Krab Thorup				<krab@gcc.gnu.org>
  Kai Tietz					<ktietz70@googlemail.com>
--- 611,617 ----
  Toma Tabacu					<toma.tabacu@imgtec.com>
  Sriraman Tallam					<tmsriram@google.com>
  Samuel Tardieu					<sam@rfc1149.net>
! Sam Tebbs					<samuel.tebbs@gmail.com>
  Dinar Temirbulatov				<dtemirbulatov@gmail.com>
  Kresten Krab Thorup				<krab@gcc.gnu.org>
  Kai Tietz					<ktietz70@googlemail.com>
*************** Kwok Cheung Yeung				<kcy@codesourcery.c
*** 639,644 ****
--- 656,662 ----
  Greta Yorsh					<greta.yorsh@arm.com>
  David Yuste					<david.yuste@gmail.com>
  Adhemerval Zanella				<azanella@linux.vnet.ibm.com>
+ Dennis Zhang					<dennis.zhang@arm.com>
  Yufeng Zhang					<yufeng.zhang@arm.com>
  Qing Zhao					<qing.zhao@oracle.com>
  Shujing Zhao					<pearly.zhao@oracle.com>
diff -Nrcpad gcc-9.3.0/MD5SUMS gcc-10.1.0/MD5SUMS
*** gcc-9.3.0/MD5SUMS	Thu Mar 12 11:25:24 2020
--- gcc-10.1.0/MD5SUMS	Thu May  7 11:08:31 2020
***************
*** 1,5 ****
  # This file contains the MD5 checksums of the files in the 
! # gcc-9.3.0.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
  # This file contains the MD5 checksums of the files in the 
! # gcc-10.1.0.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
***************
*** 9,59 ****
  # md5sum -c MD5SUMS | grep -v "OK$"
  #
  bda40697a9e2e23c4a52125fc1cc713d  .dir-locals.el
! e399c6eed967a5699498feb798da61ee  .gitattributes
! 645fabee994929358d9cf5c1de50fb98  .gitignore
  8c00452ef1e298846493ec8b239f93e2  ABOUT-NLS
  59530bdf33659b29e73d4adb9f9f6552  COPYING
  2d5025d4aa3495befef8f17206a5b0a1  COPYING.LIB
  fe60d87048567d4fe8c8a0ed2448bcc8  COPYING.RUNTIME
  d32239bcb673463ab874e80d47fae504  COPYING3
  6a6a8e020838b23406c81b19c1d46df6  COPYING3.LIB
! f63d09af5ec61572f096c18445ebdd6d  ChangeLog
  fd4ecdf5d672efe2b0e409aca9cf9446  ChangeLog.jit
  09538b708302f1735f6fa05b622ecf5e  ChangeLog.tree-ssa
  24ab760126489e69436a43185dc3d202  INSTALL/README
! b54df9bfc2e7837cfdec727a84be4835  INSTALL/binaries.html
! 9815185c5432adfdaf3fd21062c4940b  INSTALL/build.html
! 137a40d9c7c794e6fc9cd477aa283f78  INSTALL/configure.html
! 019978d85be640aa573eff9f0288ee2d  INSTALL/download.html
! 21217d485bf1a98b9c76dcd01852340a  INSTALL/finalinstall.html
! 9ad173ba846ae2495bc565c8e3b5c72b  INSTALL/gfdl.html
! 9fedad0e9418880cf690e3171a61ab5b  INSTALL/index.html
! 2c0f4834602472d41e202221f2973335  INSTALL/old.html
! cb11a407f704c0bfbef64d17128cadd0  INSTALL/prerequisites.html
! 1c03c2c7732f60e49c9f4fc500ad3089  INSTALL/specific.html
! 4f086007f929585b190278c5c2f7b43c  INSTALL/test.html
! 1d9738c6b0f4d236c5d893aca99c2ea3  LAST_UPDATED
! cd94bf363014d5234ce951236b2eff7e  MAINTAINERS
! babbf63ed4e6324c3ce3ec6ae4852ee2  Makefile.def
! 1317b9514961375f717373570309ad98  Makefile.in
! 1476c59b7fd3be8c21d1af1eb4ac036c  Makefile.tpl
! 67d4a908da8fc33478e15cba991d3fe8  NEWS
  80d26bc3b1ad4f6969a96a24c9181bf5  README
  a657821f65bab77f4fbf3a75cdee6da9  ar-lib
  500b9244caa7a7ab23ece1db37efa76d  compile
! 68ecc2bbf30bfff0308ab1d43ec4f6e6  config-ml.in
! 40b5681beb170241cdc60d00932a204f  config.guess
  040359150cf11493f973a46d8a25b06b  config.rpath
! 028bb6041dfd0ac0e34915870eea93ec  config.sub
! 22284ec925ce4df611c8da798fcd58ef  config/ChangeLog
  0fcd4badfe2a2191778bdf5ab94aa40c  config/acinclude.m4
  2ea0edfde0ce5ce69b49317a5650f048  config/acx.m4
  6b030f5cf640bdd401ea739f54a667f8  config/asmcfi.m4
  a6bf9c39c62222092ea6d5d8551c077f  config/ax_check_define.m4
  dd11d6ddf98d1e2066fa3aef4f8ce966  config/ax_pthread.m4
  596c2296c23cda1b6445427d6c3ce3ad  config/bitfields.m4
  5c6a030699353abe2ff69294a495e4cd  config/bootstrap-O1.mk
  4d3304310a9b7b17872d6f644e1dd7c8  config/bootstrap-O3.mk
  f0d17f3362caa1926e231994168f1e8d  config/bootstrap-asan.mk
  696b71cc336927f298a69c5b9321910b  config/bootstrap-cet.mk
  3be755875df9da02eb4b0a9badd414f1  config/bootstrap-debug-big.mk
--- 9,61 ----
  # md5sum -c MD5SUMS | grep -v "OK$"
  #
  bda40697a9e2e23c4a52125fc1cc713d  .dir-locals.el
! 5b296b32e07d2a84f4ac051ed7f95b91  .gitattributes
! 0c7916423c9bbd5ff06dd5ba28f35e4d  .gitignore
  8c00452ef1e298846493ec8b239f93e2  ABOUT-NLS
  59530bdf33659b29e73d4adb9f9f6552  COPYING
  2d5025d4aa3495befef8f17206a5b0a1  COPYING.LIB
  fe60d87048567d4fe8c8a0ed2448bcc8  COPYING.RUNTIME
  d32239bcb673463ab874e80d47fae504  COPYING3
  6a6a8e020838b23406c81b19c1d46df6  COPYING3.LIB
! 5516c557f542b5335f9b64994e170e9c  ChangeLog
  fd4ecdf5d672efe2b0e409aca9cf9446  ChangeLog.jit
  09538b708302f1735f6fa05b622ecf5e  ChangeLog.tree-ssa
  24ab760126489e69436a43185dc3d202  INSTALL/README
! e1c93ceda3bbe87922603d635c313b8f  INSTALL/binaries.html
! d9f1884820a2e99f008e741566a1eaad  INSTALL/build.html
! 05bd05adf28f7d8452022a8a8d320882  INSTALL/configure.html
! d9fd48c7e3572c71d29718a822559709  INSTALL/download.html
! cadabbcbc80839856a250fb9718edd4a  INSTALL/finalinstall.html
! e9fe891b162f4aa1b9dd2f6d32b041b5  INSTALL/gfdl.html
! 79e8d9191ad9b199665b9926001d2395  INSTALL/index.html
! 63764c6d871b587581a99d935f33bf5a  INSTALL/old.html
! 9a15ddbf1b6937ce25f38e1ff5e1b54c  INSTALL/prerequisites.html
! b837a1e2fb39ecd453886d9ca05a2786  INSTALL/specific.html
! aa64c5e8c1a4235d4d6ff2b96321a4a1  INSTALL/test.html
! 8481125ede004090f3df469e25f3e2da  LAST_UPDATED
! 4ccaac378eb9cf3fbfcf750473e826bf  MAINTAINERS
! a17604d493359c825eafd4af94730246  Makefile.def
! ff6d1260e969bb733093c18248246493  Makefile.in
! a9cb179e6102a6074986bbfc9b6bf96a  Makefile.tpl
! 41ae7e3e3d02107835c7887b51883f01  NEWS
  80d26bc3b1ad4f6969a96a24c9181bf5  README
  a657821f65bab77f4fbf3a75cdee6da9  ar-lib
  500b9244caa7a7ab23ece1db37efa76d  compile
! 8888c74be9b5beaeef318ce5b165e5de  config-ml.in
! b3c47a769a12794661355d3a5dcfeb3d  config.guess
  040359150cf11493f973a46d8a25b06b  config.rpath
! 8172cd8087c91ceb16a61a62c9d71ff1  config.sub
! 3864086abc40928225717ffefb7a4a9c  config/ChangeLog
  0fcd4badfe2a2191778bdf5ab94aa40c  config/acinclude.m4
  2ea0edfde0ce5ce69b49317a5650f048  config/acx.m4
  6b030f5cf640bdd401ea739f54a667f8  config/asmcfi.m4
  a6bf9c39c62222092ea6d5d8551c077f  config/ax_check_define.m4
+ fa1446baa94824d733d33eb615217d23  config/ax_count_cpus.m4
  dd11d6ddf98d1e2066fa3aef4f8ce966  config/ax_pthread.m4
  596c2296c23cda1b6445427d6c3ce3ad  config/bitfields.m4
  5c6a030699353abe2ff69294a495e4cd  config/bootstrap-O1.mk
  4d3304310a9b7b17872d6f644e1dd7c8  config/bootstrap-O3.mk
+ 772abbb55df582cb2630074d944b9f23  config/bootstrap-Og.mk
  f0d17f3362caa1926e231994168f1e8d  config/bootstrap-asan.mk
  696b71cc336927f298a69c5b9321910b  config/bootstrap-cet.mk
  3be755875df9da02eb4b0a9badd414f1  config/bootstrap-debug-big.mk
*************** babb6167c05386834412652e8b27239e  config
*** 63,85 ****
  9a194b56c06b616528d1e76306aa78e6  config/bootstrap-debug.mk
  abb913a79f307c92b276ddb058600c2b  config/bootstrap-lto-lean.mk
  33768879cdb11bf946d977ab6632d169  config/bootstrap-lto-noplugin.mk
! 46d519a53c628afcbdd8f0bf47500a7f  config/bootstrap-lto.mk
  f466ea6022e6627a2e3d94bb0cc7eeb9  config/bootstrap-time.mk
  065f6478cf9a6fdc999f666517cfb8b4  config/bootstrap-ubsan.mk
! 197020547d9441bc0fed105dd9ad7822  config/cet.m4
  04bdbef77f5fd2e282f7dee0bde60444  config/codeset.m4
  b5a5c394536a15e50be1998bd341fd02  config/depstand.m4
  321e8bd6894bd9a668af361e89e92e9b  config/dfp.m4
  57534269dac398c79a36036eb35704a1  config/elf.m4
  042203b305962ba9a8f8474ef80edeee  config/enable.m4
  15b8d5adf53ad5ec75f055b193a6b1c2  config/extensions.m4
! 8e54553a2c063659a749e0ef9e5348e4  config/futex.m4
  d3eafe382a46e6747e3644cf4a55d5cc  config/gc++filt.m4
  9495055af79ee43819009a4faf0df96b  config/gcc-plugin.m4
  1282ef4331970c26224afd363968e276  config/gettext-sister.m4
  1a627bc39dc12ae705bd4136731da428  config/gettext.m4
  29c9c3d57667bc9e6f14d625b2cd5894  config/glibc21.m4
! 16956754bb073f43a4e0c8077356a5a7  config/gthr.m4
  c385066b0fe61ef55d44cf2619e79b26  config/gxx-include-dir.m4
  b7384c06ff3d09212ac04dbab4ce969c  config/hwcaps.m4
  bce7c97d56a16836e49ff576ffa33089  config/iconv.m4
--- 65,87 ----
  9a194b56c06b616528d1e76306aa78e6  config/bootstrap-debug.mk
  abb913a79f307c92b276ddb058600c2b  config/bootstrap-lto-lean.mk
  33768879cdb11bf946d977ab6632d169  config/bootstrap-lto-noplugin.mk
! 300f4b357f96bcf7bed569192152a866  config/bootstrap-lto.mk
  f466ea6022e6627a2e3d94bb0cc7eeb9  config/bootstrap-time.mk
  065f6478cf9a6fdc999f666517cfb8b4  config/bootstrap-ubsan.mk
! 2a345c51b0991f307b2d59c6c57c3c29  config/cet.m4
  04bdbef77f5fd2e282f7dee0bde60444  config/codeset.m4
  b5a5c394536a15e50be1998bd341fd02  config/depstand.m4
  321e8bd6894bd9a668af361e89e92e9b  config/dfp.m4
  57534269dac398c79a36036eb35704a1  config/elf.m4
  042203b305962ba9a8f8474ef80edeee  config/enable.m4
  15b8d5adf53ad5ec75f055b193a6b1c2  config/extensions.m4
! 2f2de833dd86bba89d64e5813be81550  config/futex.m4
  d3eafe382a46e6747e3644cf4a55d5cc  config/gc++filt.m4
  9495055af79ee43819009a4faf0df96b  config/gcc-plugin.m4
  1282ef4331970c26224afd363968e276  config/gettext-sister.m4
  1a627bc39dc12ae705bd4136731da428  config/gettext.m4
  29c9c3d57667bc9e6f14d625b2cd5894  config/glibc21.m4
! e271ffe7b43dfbd759f0195c2c1624dd  config/gthr.m4
  c385066b0fe61ef55d44cf2619e79b26  config/gxx-include-dir.m4
  b7384c06ff3d09212ac04dbab4ce969c  config/hwcaps.m4
  bce7c97d56a16836e49ff576ffa33089  config/iconv.m4
*************** db111161c56fa9d53a03abfb188ad1d0  config
*** 93,103 ****
  cbcbd9977ef1239ccac0c5c54d214302  config/ld-symbolic.m4
  1cbbc8830601bf43a3c42ee10a01eecd  config/lead-dot.m4
  77931c860806547ce9fc56097a731c6f  config/lib-ld.m4
! 50120e7fff340d87578219756e55a5e3  config/lib-link.m4
  4455537cdae70977a1283180062a2d8d  config/lib-prefix.m4
  b75e527c5a9b8dcbcfb1ac321fa244eb  config/libstdc++-raw-cxx.m4
  534dce34ae221e73e2d67d3ba07f00a3  config/lthostflags.m4
! a0e43b71bb326f55e765be2fab1ac561  config/math.m4
  e10d31316e03a59577fb4ed90a670914  config/mh-alpha-linux
  3fe4a576c2a75736c8da3af1d0824217  config/mh-cygwin
  507b102116e2550175bb7f42ee3c2958  config/mh-darwin
--- 95,105 ----
  cbcbd9977ef1239ccac0c5c54d214302  config/ld-symbolic.m4
  1cbbc8830601bf43a3c42ee10a01eecd  config/lead-dot.m4
  77931c860806547ce9fc56097a731c6f  config/lib-ld.m4
! 0a70244d959a1a5320a786bc0fa37268  config/lib-link.m4
  4455537cdae70977a1283180062a2d8d  config/lib-prefix.m4
  b75e527c5a9b8dcbcfb1ac321fa244eb  config/libstdc++-raw-cxx.m4
  534dce34ae221e73e2d67d3ba07f00a3  config/lthostflags.m4
! ad4ae2c604a57f5e6f53c9edc33ea1f1  config/math.m4
  e10d31316e03a59577fb4ed90a670914  config/mh-alpha-linux
  3fe4a576c2a75736c8da3af1d0824217  config/mh-cygwin
  507b102116e2550175bb7f42ee3c2958  config/mh-darwin
*************** c950e3234da1eb9ad5f29bc1c2d2ae74  config
*** 120,126 ****
  9af153786999225732c95595da5ebd52  config/mt-spu
  4641658da74a0c3af1b517487876ff0e  config/multi.m4
  120ec56e3aa27739a2945bc1c8a2530a  config/nls.m4
! fa22f7e8f43ef5b6e9ab94ec570c2327  config/no-executables.m4
  5135144630c100a01c62fa64629aafb4  config/override.m4
  d31260ea4a04e5fe935a240278d5d02b  config/picflag.m4
  a155332d4af74bcf3f4c52b4dbadca34  config/plugins.m4
--- 122,128 ----
  9af153786999225732c95595da5ebd52  config/mt-spu
  4641658da74a0c3af1b517487876ff0e  config/multi.m4
  120ec56e3aa27739a2945bc1c8a2530a  config/nls.m4
! 8f2bd36861dd8e2742bcd719a977271b  config/no-executables.m4
  5135144630c100a01c62fa64629aafb4  config/override.m4
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--- 706,782 ----
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*************** a35e6564e67b42874106be34fc6f7781  gcc/ad
*** 747,795 ****
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--- 785,833 ----
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*************** a5b434a722702877e8adeb876ce25427  gcc/ad
*** 833,839 ****
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--- 871,877 ----
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*************** c5c0258dcc3da325b8b6059feda4ab8b  gcc/ad
*** 844,863 ****
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--- 882,901 ----
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*************** b89035369a95b1e44ec3d5e6521de980  gcc/ad
*** 869,881 ****
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--- 907,919 ----
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*************** c2e67c60760605ebb18faac11692746b  gcc/ad
*** 897,913 ****
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--- 935,951 ----
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*************** dad22cac0d2c02a1244964ba1f053b29  gcc/ad
*** 936,942 ****
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--- 974,980 ----
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*************** ebf1c0449c1d2608e1c7f43e4b24e08b  gcc/ad
*** 947,954 ****
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--- 985,992 ----
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*************** d6900d889eea0c90ec45bc1cd3c2472d  gcc/ad
*** 972,978 ****
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--- 1010,1016 ----
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*************** af19ea21a438d41e78bb565e4cdad2ac  gcc/ad
*** 1019,1063 ****
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--- 1057,1101 ----
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*** 1074,1124 ****
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--- 1112,1162 ----
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*************** a64d2a86589b39f4c65f238c21c65b02  gcc/ad
*** 1126,1143 ****
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--- 1164,1181 ----
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*************** ded222eb0e850f564b74099b21d23f63  gcc/ad
*** 1158,1174 ****
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*************** e705c781630322203ba706d00e994575  gcc/ad
*** 1176,1189 ****
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*** 1211,1217 ****
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*** 1236,1241 ****
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*** 1296,1306 ****
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--- 1341,1351 ----
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*** 1311,1321 ****
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*** 1400,1407 ****
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--- 1445,1452 ----
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*** 1412,1439 ****
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*** 1446,1452 ****
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*** 1547,1553 ****
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*** 1558,1563 ****
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*** 1580,1587 ****
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*** 1602,1613 ****
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*** 1615,1627 ****
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*** 1635,1642 ****
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*** 1669,1681 ****
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*** 1689,1713 ****
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  17c9d079fd5e06d3f686c339aa2ce5f7  gcc/ada/libgnat/g-soliop__qnx.ads
  e69f6c5abc77b3ecd8aba070fe4b2abd  gcc/ada/libgnat/g-soliop__solaris.ads
! c16345d769c62f21f7908f1f1877af9a  gcc/ada/libgnat/g-sothco.adb
! 77edb74f2da68cd2656a3f77d59f8fe6  gcc/ada/libgnat/g-sothco.ads
  098022c6a3071fc06a454ddc06ceed20  gcc/ada/libgnat/g-sothco__dummy.adb
  d7aedbbd80aa98be61e8549f63d936e2  gcc/ada/libgnat/g-sothco__dummy.ads
  680a7bc1d606f549c3fe584b446a0227  gcc/ada/libgnat/g-souinf.ads
*************** d7aedbbd80aa98be61e8549f63d936e2  gcc/ad
*** 1716,1722 ****
  6f455f1a7bf555f9557999b391bcce8f  gcc/ada/libgnat/g-speche.adb
  3e9a176bbe75a749cbd52d30efb6c082  gcc/ada/libgnat/g-speche.ads
  6ecbca09d5a9c575f85d42413b57833a  gcc/ada/libgnat/g-spipat.adb
! 1e2548b89fcc5f6b4d0d7e6752cd7cf6  gcc/ada/libgnat/g-spipat.ads
  1e819afcfb0c9c7268539523f09d1476  gcc/ada/libgnat/g-spitbo.adb
  57d9dd98988aa15f4d3ee0704461b3b0  gcc/ada/libgnat/g-spitbo.ads
  6dfad102df709074a5cf6688b8421038  gcc/ada/libgnat/g-sptabo.ads
--- 1764,1770 ----
  6f455f1a7bf555f9557999b391bcce8f  gcc/ada/libgnat/g-speche.adb
  3e9a176bbe75a749cbd52d30efb6c082  gcc/ada/libgnat/g-speche.ads
  6ecbca09d5a9c575f85d42413b57833a  gcc/ada/libgnat/g-spipat.adb
! e9fbeabeb97757dbc5348757df790fca  gcc/ada/libgnat/g-spipat.ads
  1e819afcfb0c9c7268539523f09d1476  gcc/ada/libgnat/g-spitbo.adb
  57d9dd98988aa15f4d3ee0704461b3b0  gcc/ada/libgnat/g-spitbo.ads
  6dfad102df709074a5cf6688b8421038  gcc/ada/libgnat/g-sptabo.ads
*************** d7aedbbd80aa98be61e8549f63d936e2  gcc/ad
*** 1724,1744 ****
  bdccce071fc2af683e7cda4c4dddcaca  gcc/ada/libgnat/g-sptavs.ads
  74b2cf03d84f4f72d150b63455250df9  gcc/ada/libgnat/g-sse.ads
  8177e45a04249209c5a38b9e8a122751  gcc/ada/libgnat/g-ssvety.ads
  0ce4cdf1b0370a585af859d9f90af4bc  gcc/ada/libgnat/g-stheme.adb
  1025f2c3b14c93528c4da7132b49b744  gcc/ada/libgnat/g-strhas.ads
  c3d11acb66085e1e184733fc4b9b1bcb  gcc/ada/libgnat/g-string.adb
  1f8f8f16f2ec48c956b588a9de21fd0e  gcc/ada/libgnat/g-string.ads
  e75dc701e500258345394c01e9a39a8d  gcc/ada/libgnat/g-strspl.ads
  c1b38c106dba8247e1205c7c7a37a0c6  gcc/ada/libgnat/g-stseme.adb
! 571b8b297e44e99200cc962cec459680  gcc/ada/libgnat/g-stsifd__sockets.adb
  8819d093536634a723cbb36a885aa93e  gcc/ada/libgnat/g-table.adb
  8d403b0783232432236cb834ed4010eb  gcc/ada/libgnat/g-table.ads
  9c07fac7685c33caced992981ca1ace6  gcc/ada/libgnat/g-tasloc.adb
  ed90e23241997a8698ddf8c272e2b825  gcc/ada/libgnat/g-tasloc.ads
  d42e5235e4fa3aca1df656e66c9165a9  gcc/ada/libgnat/g-timsta.adb
  c94a22c9fe7427c5a10239ac76db68bf  gcc/ada/libgnat/g-timsta.ads
! ecd4e1dbdff70a3123f80dcf37a23681  gcc/ada/libgnat/g-traceb.adb
! aa44556fb9cad93a5fd7b8e096b1e377  gcc/ada/libgnat/g-traceb.ads
  7859e07c23a7e4445aa662dc2980444a  gcc/ada/libgnat/g-trasym.adb
  ee64372c67283ee2a93cfaa3ebd956b7  gcc/ada/libgnat/g-trasym.ads
  a7684b3fc6fe0ec77bbe0255785098c4  gcc/ada/libgnat/g-tty.adb
--- 1772,1793 ----
  bdccce071fc2af683e7cda4c4dddcaca  gcc/ada/libgnat/g-sptavs.ads
  74b2cf03d84f4f72d150b63455250df9  gcc/ada/libgnat/g-sse.ads
  8177e45a04249209c5a38b9e8a122751  gcc/ada/libgnat/g-ssvety.ads
+ 45a8475940459d0b2e995a3c1f213d7f  gcc/ada/libgnat/g-sthcso.adb
  0ce4cdf1b0370a585af859d9f90af4bc  gcc/ada/libgnat/g-stheme.adb
  1025f2c3b14c93528c4da7132b49b744  gcc/ada/libgnat/g-strhas.ads
  c3d11acb66085e1e184733fc4b9b1bcb  gcc/ada/libgnat/g-string.adb
  1f8f8f16f2ec48c956b588a9de21fd0e  gcc/ada/libgnat/g-string.ads
  e75dc701e500258345394c01e9a39a8d  gcc/ada/libgnat/g-strspl.ads
  c1b38c106dba8247e1205c7c7a37a0c6  gcc/ada/libgnat/g-stseme.adb
! 9e8873c3be48b246e9f621278ae7b9e5  gcc/ada/libgnat/g-stsifd__sockets.adb
  8819d093536634a723cbb36a885aa93e  gcc/ada/libgnat/g-table.adb
  8d403b0783232432236cb834ed4010eb  gcc/ada/libgnat/g-table.ads
  9c07fac7685c33caced992981ca1ace6  gcc/ada/libgnat/g-tasloc.adb
  ed90e23241997a8698ddf8c272e2b825  gcc/ada/libgnat/g-tasloc.ads
  d42e5235e4fa3aca1df656e66c9165a9  gcc/ada/libgnat/g-timsta.adb
  c94a22c9fe7427c5a10239ac76db68bf  gcc/ada/libgnat/g-timsta.ads
! b612fd9b5d160889c1099a8e37dfbf07  gcc/ada/libgnat/g-traceb.adb
! 86d22302a1a957995a2c0d0a39690c60  gcc/ada/libgnat/g-traceb.ads
  7859e07c23a7e4445aa662dc2980444a  gcc/ada/libgnat/g-trasym.adb
  ee64372c67283ee2a93cfaa3ebd956b7  gcc/ada/libgnat/g-trasym.ads
  a7684b3fc6fe0ec77bbe0255785098c4  gcc/ada/libgnat/g-tty.adb
*************** b113c295ae84cef68d53400f26cd924f  gcc/ad
*** 1781,1787 ****
  3120783f0b5808a5ff2c3cc0bcfe8372  gcc/ada/libgnat/s-addima.ads
  bf9d8d9ba5aa778bd962f179934b4ed1  gcc/ada/libgnat/s-addope.adb
  d77236998648e189c81fdd4a531e5e14  gcc/ada/libgnat/s-addope.ads
! 881af0a6d9ff170b9272b547d7f29591  gcc/ada/libgnat/s-arit64.adb
  838292eb3a6c2d528a0666a98f0dbd78  gcc/ada/libgnat/s-arit64.ads
  da8b5bb231f1d4d8d30b20bb937e9b49  gcc/ada/libgnat/s-assert.adb
  fe8bc10afac633c616864613044f9402  gcc/ada/libgnat/s-assert.ads
--- 1830,1838 ----
  3120783f0b5808a5ff2c3cc0bcfe8372  gcc/ada/libgnat/s-addima.ads
  bf9d8d9ba5aa778bd962f179934b4ed1  gcc/ada/libgnat/s-addope.adb
  d77236998648e189c81fdd4a531e5e14  gcc/ada/libgnat/s-addope.ads
! c37d95e6bc4fdc3da526a7c249106352  gcc/ada/libgnat/s-aotase.adb
! 2e80d44e098886929b992ee03b9882dc  gcc/ada/libgnat/s-aotase.ads
! a11ea373bfe1dddfb0a75be0b18c2484  gcc/ada/libgnat/s-arit64.adb
  838292eb3a6c2d528a0666a98f0dbd78  gcc/ada/libgnat/s-arit64.ads
  da8b5bb231f1d4d8d30b20bb937e9b49  gcc/ada/libgnat/s-assert.adb
  fe8bc10afac633c616864613044f9402  gcc/ada/libgnat/s-assert.ads
*************** fe8bc10afac633c616864613044f9402  gcc/ad
*** 1791,1804 ****
  f1f327dccca77b6601cd0316cab6c62d  gcc/ada/libgnat/s-atocou.ads
  b0f698b6bf60b53f87de991902f7e1b4  gcc/ada/libgnat/s-atocou__builtin.adb
  4bbe825b7782c77b7c2dab9b985ec026  gcc/ada/libgnat/s-atocou__x86.adb
  1bba8b3a52d36a6773cf0acfc6f24788  gcc/ada/libgnat/s-atopri.adb
! 126397d09bdb196398519bfed3e2df81  gcc/ada/libgnat/s-atopri.ads
  ed8ef67450c2df5fc5b236960ac5c61d  gcc/ada/libgnat/s-auxdec.adb
  7b220c72a6e52c8207b62a2d212e741b  gcc/ada/libgnat/s-auxdec.ads
! 10b76c0bd1efc669f41654d1b32b981c  gcc/ada/libgnat/s-bignum.adb
! 1aebe337317671188317a91881593e49  gcc/ada/libgnat/s-bignum.ads
  95faae561dd2db1d3677d785989d1a80  gcc/ada/libgnat/s-bitops.adb
  a1ad3269ca16ee830b4a9c228a32d857  gcc/ada/libgnat/s-bitops.ads
  885e5a2e26a0d2a3340e7627acbe930a  gcc/ada/libgnat/s-boarop.ads
  849da979230dfb93b638654030fe6997  gcc/ada/libgnat/s-boustr.adb
  b69679644bf60f91f56c8c4bb32869e7  gcc/ada/libgnat/s-boustr.ads
--- 1842,1863 ----
  f1f327dccca77b6601cd0316cab6c62d  gcc/ada/libgnat/s-atocou.ads
  b0f698b6bf60b53f87de991902f7e1b4  gcc/ada/libgnat/s-atocou__builtin.adb
  4bbe825b7782c77b7c2dab9b985ec026  gcc/ada/libgnat/s-atocou__x86.adb
+ 54777ec9bda1e73bbd06ca4e15699895  gcc/ada/libgnat/s-atoope.ads
+ c2e7d7b4d9997dc324d34b23a5528f88  gcc/ada/libgnat/s-atopar.adb
+ df6e87bff224741fcc74ef1f4a979dcc  gcc/ada/libgnat/s-atopar.ads
+ d7e67cf45709308f9393af133893d705  gcc/ada/libgnat/s-atopex.adb
+ e88aaee45316b4de26735c7c6def734e  gcc/ada/libgnat/s-atopex.ads
  1bba8b3a52d36a6773cf0acfc6f24788  gcc/ada/libgnat/s-atopri.adb
! ed13341cb38966e8490a0d042c36f43f  gcc/ada/libgnat/s-atopri.ads
  ed8ef67450c2df5fc5b236960ac5c61d  gcc/ada/libgnat/s-auxdec.adb
  7b220c72a6e52c8207b62a2d212e741b  gcc/ada/libgnat/s-auxdec.ads
! e54ca55ca10d556fb097947e077afd0d  gcc/ada/libgnat/s-bignum.adb
! b4741724d0fdc874c2f00ece8d0b4351  gcc/ada/libgnat/s-bignum.ads
! 6e74bcd17ab036f487fa93e8f2bda19f  gcc/ada/libgnat/s-bitfie.ads
  95faae561dd2db1d3677d785989d1a80  gcc/ada/libgnat/s-bitops.adb
  a1ad3269ca16ee830b4a9c228a32d857  gcc/ada/libgnat/s-bitops.ads
+ 04ce5cc421af90e1dc1f548030e6615a  gcc/ada/libgnat/s-bituti.adb
+ f91eed1ca975009d69cb4caf60b6e2eb  gcc/ada/libgnat/s-bituti.ads
  885e5a2e26a0d2a3340e7627acbe930a  gcc/ada/libgnat/s-boarop.ads
  849da979230dfb93b638654030fe6997  gcc/ada/libgnat/s-boustr.adb
  b69679644bf60f91f56c8c4bb32869e7  gcc/ada/libgnat/s-boustr.ads
*************** a777b7233ac3d9a99571a166b4b83915  gcc/ad
*** 1915,1920 ****
--- 1974,1981 ----
  623ee04c268f6fc08dc0e9b0055a9b38  gcc/ada/libgnat/s-fore.ads
  1dfccc286f78fbb60c90dc9438fe9297  gcc/ada/libgnat/s-gearop.adb
  eb32531519af267d284b42a1c0588caa  gcc/ada/libgnat/s-gearop.ads
+ 2d6f785d1c8f845c353a9387316178e0  gcc/ada/libgnat/s-genbig.adb
+ f94e2ca0f8203fa71742bded0d1738a8  gcc/ada/libgnat/s-genbig.ads
  c48a1b36dc6fa58abea3c5e7e9643df0  gcc/ada/libgnat/s-geveop.adb
  5912901fa62e055045b833865f46dc61  gcc/ada/libgnat/s-geveop.ads
  93b7b252ac6e43b620e6e3163f777e46  gcc/ada/libgnat/s-gloloc.adb
*************** c48a1b36dc6fa58abea3c5e7e9643df0  gcc/ad
*** 1922,1928 ****
  4c69921a462a94f4d5cb347564773d8c  gcc/ada/libgnat/s-gloloc__mingw.adb
  47d63ddcbb22683fdaa8bd4bdbca5f44  gcc/ada/libgnat/s-htable.adb
  91c034fe6b5aa4392b09a3d0c59ee202  gcc/ada/libgnat/s-htable.ads
! c1b858e1dbbab660d802f1295382a25b  gcc/ada/libgnat/s-imenne.adb
  349f7c8012727d757b6f9eaa961bbdac  gcc/ada/libgnat/s-imenne.ads
  2a41401362dd1665b4586c4685cb2eb5  gcc/ada/libgnat/s-imgbiu.adb
  58c969f2a64a360c638fb2b7945bc7c5  gcc/ada/libgnat/s-imgbiu.ads
--- 1983,1989 ----
  4c69921a462a94f4d5cb347564773d8c  gcc/ada/libgnat/s-gloloc__mingw.adb
  47d63ddcbb22683fdaa8bd4bdbca5f44  gcc/ada/libgnat/s-htable.adb
  91c034fe6b5aa4392b09a3d0c59ee202  gcc/ada/libgnat/s-htable.ads
! 51cbde385b6d5eda07020cf8bc590c92  gcc/ada/libgnat/s-imenne.adb
  349f7c8012727d757b6f9eaa961bbdac  gcc/ada/libgnat/s-imenne.ads
  2a41401362dd1665b4586c4685cb2eb5  gcc/ada/libgnat/s-imgbiu.adb
  58c969f2a64a360c638fb2b7945bc7c5  gcc/ada/libgnat/s-imgbiu.ads
*************** e87a616f028a0b17a65e9b769c168786  gcc/ad
*** 1963,1969 ****
  441feb5fb26574f5464198d6a962e6e9  gcc/ada/libgnat/s-mastop.adb
  6c8b3efa60e6b3314fc6deae90dd270c  gcc/ada/libgnat/s-mastop.ads
  307602cb6f14246a110f8f7fd0f915ff  gcc/ada/libgnat/s-memcop.ads
! 159bfa06a42a5d0a9f48e28721a7ffb4  gcc/ada/libgnat/s-memory.adb
  dd57ed5008db87c34f01255a20da97b5  gcc/ada/libgnat/s-memory.ads
  ec6d5d2550b81537178ccc751c5c332c  gcc/ada/libgnat/s-mmap.adb
  cfb45ec1af79a38dc3814fcc263dfce9  gcc/ada/libgnat/s-mmap.ads
--- 2024,2030 ----
  441feb5fb26574f5464198d6a962e6e9  gcc/ada/libgnat/s-mastop.adb
  6c8b3efa60e6b3314fc6deae90dd270c  gcc/ada/libgnat/s-mastop.ads
  307602cb6f14246a110f8f7fd0f915ff  gcc/ada/libgnat/s-memcop.ads
! 93ef0e1a8febcb63de7ca87eae8b81c5  gcc/ada/libgnat/s-memory.adb
  dd57ed5008db87c34f01255a20da97b5  gcc/ada/libgnat/s-memory.ads
  ec6d5d2550b81537178ccc751c5c332c  gcc/ada/libgnat/s-mmap.adb
  cfb45ec1af79a38dc3814fcc263dfce9  gcc/ada/libgnat/s-mmap.ads
*************** c4045ad22005510940d70e1a445db431  gcc/ad
*** 1977,1984 ****
  480094d72a734edeb42c7f5646072a7d  gcc/ada/libgnat/s-objrea.adb
  ff5d15e422a34fb0a9ede457870c83f9  gcc/ada/libgnat/s-objrea.ads
  92f9546f6c8187b82cbd56bfdd1f577b  gcc/ada/libgnat/s-optide.adb
! c3fd45fd4709b42e8ba692ec0f8b9d29  gcc/ada/libgnat/s-os_lib.adb
! c97029c7e9a8763f9b3ae639cf032785  gcc/ada/libgnat/s-os_lib.ads
  89c9d84a8e7286677c624b6d5b85d3ed  gcc/ada/libgnat/s-osprim.ads
  0bce1d0b888de6ed9b48adac313cf821  gcc/ada/libgnat/s-osprim__darwin.adb
  599a8e7665b3b32b99dd5614f083de3e  gcc/ada/libgnat/s-osprim__lynxos.ads
--- 2038,2045 ----
  480094d72a734edeb42c7f5646072a7d  gcc/ada/libgnat/s-objrea.adb
  ff5d15e422a34fb0a9ede457870c83f9  gcc/ada/libgnat/s-objrea.ads
  92f9546f6c8187b82cbd56bfdd1f577b  gcc/ada/libgnat/s-optide.adb
! fd01b6584d48e6571cdd710fb36185fa  gcc/ada/libgnat/s-os_lib.adb
! 86ede71c04b00d87a2a99d888b4cb803  gcc/ada/libgnat/s-os_lib.ads
  89c9d84a8e7286677c624b6d5b85d3ed  gcc/ada/libgnat/s-osprim.ads
  0bce1d0b888de6ed9b48adac313cf821  gcc/ada/libgnat/s-osprim__darwin.adb
  599a8e7665b3b32b99dd5614f083de3e  gcc/ada/libgnat/s-osprim__lynxos.ads
*************** c560f69958cb86a1895d66977478283f  gcc/ad
*** 2127,2134 ****
  8dbd9b24ed2637efcd54f34048824ea8  gcc/ada/libgnat/s-ransee.adb
  2364b5b78e25443b20ec2b8cdb841ef5  gcc/ada/libgnat/s-ransee.ads
  8d70d1e4988a5a72b130d3cf5799a1be  gcc/ada/libgnat/s-regexp.adb
! ef7eaf2e8b3c6794e058f7f7ca73f2e0  gcc/ada/libgnat/s-regexp.ads
! 71776edb81a3c91d92fa31be67fe849c  gcc/ada/libgnat/s-regpat.adb
  cc2bae05b220e92cce3f6cb076d3ead5  gcc/ada/libgnat/s-regpat.ads
  fe59fa1085c8d34ef0b787dd0fe12056  gcc/ada/libgnat/s-resfil.adb
  59fd2e44e6749e4e7bf82385132c5385  gcc/ada/libgnat/s-resfil.ads
--- 2188,2195 ----
  8dbd9b24ed2637efcd54f34048824ea8  gcc/ada/libgnat/s-ransee.adb
  2364b5b78e25443b20ec2b8cdb841ef5  gcc/ada/libgnat/s-ransee.ads
  8d70d1e4988a5a72b130d3cf5799a1be  gcc/ada/libgnat/s-regexp.adb
! ae1319a8fc8f18434fec32c9f2a4c417  gcc/ada/libgnat/s-regexp.ads
! 413909875061eee55bd21b311e579e35  gcc/ada/libgnat/s-regpat.adb
  cc2bae05b220e92cce3f6cb076d3ead5  gcc/ada/libgnat/s-regpat.ads
  fe59fa1085c8d34ef0b787dd0fe12056  gcc/ada/libgnat/s-resfil.adb
  59fd2e44e6749e4e7bf82385132c5385  gcc/ada/libgnat/s-resfil.ads
*************** c25de87117d85e2b6a3d3cd284911f96  gcc/ad
*** 2146,2152 ****
  2e3a6b4f92d3d7e1acc772fee90708c8  gcc/ada/libgnat/s-shasto.adb
  8a3ae50853e2eb8a9d28b47e6ab54cd0  gcc/ada/libgnat/s-shasto.ads
  052b13009a8bf7edad4bdee074b1673f  gcc/ada/libgnat/s-soflin.adb
! 79bc625f71799333518497b3ed4bf8e5  gcc/ada/libgnat/s-soflin.ads
  df4be614957f52797d5aecd311234634  gcc/ada/libgnat/s-soliin.adb
  5a0a26cb30441003f1b56e834da37f75  gcc/ada/libgnat/s-soliin.ads
  5b7b5264cfed8600b2015bf62d1a4fbb  gcc/ada/libgnat/s-sopco3.adb
--- 2207,2213 ----
  2e3a6b4f92d3d7e1acc772fee90708c8  gcc/ada/libgnat/s-shasto.adb
  8a3ae50853e2eb8a9d28b47e6ab54cd0  gcc/ada/libgnat/s-shasto.ads
  052b13009a8bf7edad4bdee074b1673f  gcc/ada/libgnat/s-soflin.adb
! 498e4b65a0e03bc9a94a237a99f4862d  gcc/ada/libgnat/s-soflin.ads
  df4be614957f52797d5aecd311234634  gcc/ada/libgnat/s-soliin.adb
  5a0a26cb30441003f1b56e834da37f75  gcc/ada/libgnat/s-soliin.ads
  5b7b5264cfed8600b2015bf62d1a4fbb  gcc/ada/libgnat/s-sopco3.adb
*************** c187b788d13f0c9d58a28004df012d45  gcc/ad
*** 2161,2168 ****
  5f022e58fdd29520d8f393b10a15237d  gcc/ada/libgnat/s-stache.ads
  144f160a8083d611a54b7ccd4f70027a  gcc/ada/libgnat/s-stalib.adb
  a09d5f20b67206e35b48c9560d9bb59b  gcc/ada/libgnat/s-stalib.ads
! b516f0327d70c07ba6011b6f4c913c3e  gcc/ada/libgnat/s-stausa.adb
! 51fa29b4a46bbedc542018805517c91b  gcc/ada/libgnat/s-stausa.ads
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  9f1d2c7410967596a5399cb737c049cb  gcc/ada/libgnat/s-stchop__limit.ads
--- 2222,2229 ----
  5f022e58fdd29520d8f393b10a15237d  gcc/ada/libgnat/s-stache.ads
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! a65b72eff6648d6dbf0efba6a1ddcac8  gcc/ada/libgnat/s-stausa.adb
! 3d62bf5929d1224aa3e8a0292c103e33  gcc/ada/libgnat/s-stausa.ads
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*************** a8f31521ebd9b84df8102768f7d30e41  gcc/ad
*** 2175,2181 ****
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! 0bf448ec76cfe069f30340c580e4af9e  gcc/ada/libgnat/s-stratt.ads
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--- 2236,2242 ----
  ced175b1bf33f62a2907c660c4d85377  gcc/ada/libgnat/s-stposu.adb
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! 89e8464a49754be1a8d2add0453737b4  gcc/ada/libgnat/s-stratt.ads
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*************** a68e42112b9349743323cd021bddf2c2  gcc/ad
*** 2185,2191 ****
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! 43240e098f19525094480838a6101b98  gcc/ada/libgnat/s-ststop.adb
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--- 2246,2252 ----
  dc169d65cd1a29397924e600d04484c7  gcc/ada/libgnat/s-string.ads
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! 5dda092312e579f886e08d958eed562c  gcc/ada/libgnat/s-ststop.adb
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*************** b99040b51fe38632c84d83658c01433e  gcc/ad
*** 2207,2235 ****
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! b66d467665c6026ebad1d283539d2778  gcc/ada/libgnat/s-valcha.ads
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! 4d1f5639332e4c066856009fb9f49ce5  gcc/ada/libgnat/s-valdec.ads
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! 4414283fe00aeef084a94593b10e6eec  gcc/ada/libgnat/s-valenu.ads
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! 69aa6c1e89da5775d7514ea7fc8697d4  gcc/ada/libgnat/s-valint.ads
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! e753c965295c48547f3502af87f1bc8e  gcc/ada/libgnat/s-vallld.ads
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! 50f8e9573051402ccbeb50e716c22969  gcc/ada/libgnat/s-vallli.ads
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! 3f117198767c5af39d3c37f0acdb95b8  gcc/ada/libgnat/s-valllu.ads
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! 24046f059f8221e4f467939ed79ff043  gcc/ada/libgnat/s-valuns.ads
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! ded452eab7f97d8c7d5a5993c1ef23f9  gcc/ada/libgnat/s-valwch.ads
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--- 2268,2296 ----
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! 2d21f4cac15948fb3ea3bdc96a28d74f  gcc/ada/libgnat/s-valboo.ads
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! e08e1c5450ac03f4686afd4190040b87  gcc/ada/libgnat/s-valcha.ads
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! 6290e3bb57c65f3c65751ebff9d2b17e  gcc/ada/libgnat/s-valdec.ads
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! 246d2281f354f61bbd99253fe77150db  gcc/ada/libgnat/s-valenu.ads
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! 93d618bd10b71e17f583932d3715adce  gcc/ada/libgnat/s-valint.ads
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! fdd8b27b18a9cff09cd2f4fe5123b5c4  gcc/ada/libgnat/s-vallld.ads
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! 7231ecfcbf0af67080c32661b1140449  gcc/ada/libgnat/s-vallli.ads
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! f165592d5485fab66534ac0a36f4cc2f  gcc/ada/libgnat/s-valllu.ads
! 92ac16fbb888795dd03fadedab450510  gcc/ada/libgnat/s-valrea.adb
! f2bd5c5a727f5758ca21d69762c1f76f  gcc/ada/libgnat/s-valrea.ads
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! 339727fc7764296d20c4c6c5bf3d0ae3  gcc/ada/libgnat/s-valuns.ads
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! 3aaf0dac9aeaec8ed0614636c18d8b3e  gcc/ada/libgnat/s-valwch.ads
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  e7019807e20fdee91766e8225472792f  gcc/ada/libgnat/s-vector.ads
*************** ac51c3eb34cf66753be79ac94aa71dd0  gcc/ad
*** 2257,2263 ****
  2f1d9895ef9cfba29ed0bf714933b3ac  gcc/ada/libgnat/s-widllu.ads
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! 479aafa7b7860bd1af6f63026e8bc8e3  gcc/ada/libgnat/s-win32.ads
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--- 2318,2324 ----
  2f1d9895ef9cfba29ed0bf714933b3ac  gcc/ada/libgnat/s-widllu.ads
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! 40c3dd7c372b6e0eb3e520c510546287  gcc/ada/libgnat/s-win32.ads
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*************** b8b0f9c3471d18ee5ac33521fe6f6d31  gcc/ad
*** 2337,2346 ****
  fd1c9e241f5bf1bb5655c69153b41133  gcc/ada/live.adb
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! d5fb038e1bece33829101f5100efb7e4  gcc/ada/make.adb
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--- 2398,2407 ----
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! 6f01d31d309436765d5a0cef3adb8a7c  gcc/ada/make.adb
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*************** d59bb9ad893e176fa2cded8febe1f1e2  gcc/ad
*** 2349,2510 ****
  ab8b20a835280643629b5a641143549a  gcc/ada/mdll-utl.ads
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! 6ecec1fa5635335354906061d325b150  gcc/ada/par-ch3.adb
! b9ecee8521fd968b45dddd76144ae121  gcc/ada/par-ch4.adb
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! 70ca561770e36bdd61efb458a504eb4c  gcc/ada/par-ch9.adb
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! aa3d52b3280778cbd58855e5bbbc2191  gcc/ada/par-load.adb
! 20c85c0d05d9a8359c9131f17936bdf9  gcc/ada/par-prag.adb
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! 370a6950cfa221c1caeb46d2568314be  gcc/ada/par-util.adb
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! b4add0b663570d19f3201d139dc759db  gcc/ada/rtsfind.adb
! c791cab6abd881ee9e79d1775b910a6b  gcc/ada/rtsfind.ads
! 93cff1e4af0dfa433f20ee55f72b939c  gcc/ada/s-oscons-tmplt.c
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! e2526cc5fec084faa70f0ba584098fda  gcc/ada/scans.ads
! 7aea039fcb915c7fd2ae540ccb39da58  gcc/ada/scil_ll.adb
! e5fdf1230d569c906cb6cfb7d9f2b91b  gcc/ada/scil_ll.ads
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--- 2410,2572 ----
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  ce8bdbc1faf25978aaeeaf7fef14282e  gcc/ada/sigtramp-ios.c
*************** ce8bdbc1faf25978aaeeaf7fef14282e  gcc/ad
*** 2514,2521 ****
  581955a58be54ffd713d187d36bb77eb  gcc/ada/sigtramp.h
  964d2d42ee863f446d936f5609b49576  gcc/ada/sinfo-cn.adb
  b3db2ea6c248b12d6a1aa909c2fb560f  gcc/ada/sinfo-cn.ads
! fd0fa5dbea3979c7dff56ff4fcf76cd3  gcc/ada/sinfo.adb
! 24fdf7fff7c3b5dfc0eddc8b8ab0e902  gcc/ada/sinfo.ads
  ed64532bd55b81a2f3ee9c5e3f71950d  gcc/ada/sinput-c.adb
  8dbd9525784306ba6737c3f646f36210  gcc/ada/sinput-c.ads
  a4e1a96e7fcc8fdf67a2666c9b25219c  gcc/ada/sinput-d.adb
--- 2576,2583 ----
  581955a58be54ffd713d187d36bb77eb  gcc/ada/sigtramp.h
  964d2d42ee863f446d936f5609b49576  gcc/ada/sinfo-cn.adb
  b3db2ea6c248b12d6a1aa909c2fb560f  gcc/ada/sinfo-cn.ads
! 04cd7c776876629d4dfcc2c0be7709dc  gcc/ada/sinfo.adb
! 2973d9e861b9a6619820bb37cd927ff0  gcc/ada/sinfo.ads
  ed64532bd55b81a2f3ee9c5e3f71950d  gcc/ada/sinput-c.adb
  8dbd9525784306ba6737c3f646f36210  gcc/ada/sinput-c.ads
  a4e1a96e7fcc8fdf67a2666c9b25219c  gcc/ada/sinput-d.adb
*************** a4e1a96e7fcc8fdf67a2666c9b25219c  gcc/ad
*** 2523,2549 ****
  d808a8e77dcb2ceac3f7df82bdf615fb  gcc/ada/sinput-l.adb
  1fa90022a9d7b33d43c44fc7a53d747c  gcc/ada/sinput-l.ads
  e4c10e29c06832fd1fd605fd428107ec  gcc/ada/sinput.adb
! 1afcd5d2ab18ecf9731e780023329535  gcc/ada/sinput.ads
  c2cb7998d90db14a7d03081370f0acf7  gcc/ada/snames.adb-tmpl
! e345f2d4a96cdbc45a54760f76c24f6e  gcc/ada/snames.ads-tmpl
  1d0f0a946dfb952f009ada43305106dd  gcc/ada/snames.h-tmpl
! d68b38701d07ba0cba2822d77ddab870  gcc/ada/socket.c
  ecba0441b0c08f91cbb4d9d57855d8a1  gcc/ada/spark_xrefs.adb
  a4d3247a60a43b8fb66e9f80fefec652  gcc/ada/spark_xrefs.ads
! a76ba0935ef07f8f7f4c6880195bccf8  gcc/ada/sprint.adb
! 20bba6a1d6623542814543094b41a5e1  gcc/ada/sprint.ads
  f995abb75b38017c68bddb66ba689f75  gcc/ada/stand.adb
  b4535290e998256e998917bfedfe8762  gcc/ada/stand.ads
! 6aca758eb73ec9f41cdaac1674669809  gcc/ada/stringt.adb
! 0a2c4035f07da4061d835150706c954e  gcc/ada/stringt.ads
! b5cae868703771f395010d2d54d23083  gcc/ada/stringt.h
  9d0a10cda0308e97df7e8be39f047e91  gcc/ada/style.adb
! 39c23c46fc8dd463cab734caf28a4387  gcc/ada/style.ads
! 68a181642eecae516221281ffe0701c7  gcc/ada/styleg.adb
! 452c7b176ae8e8ccdca4250621d2451c  gcc/ada/styleg.ads
! 62181222b514846d4e100d78338fd598  gcc/ada/stylesw.adb
! 5c334eb9cf38ee93c586f76b3df56f63  gcc/ada/stylesw.ads
! 3d9a38356af5cba176f1192c5927b32c  gcc/ada/switch-b.adb
  10c2624ddbb44b95895434f1d5837370  gcc/ada/switch-b.ads
  78a74b6a3041457159ffb2e1bcf585b1  gcc/ada/switch-c.adb
  7ade1c576f0da32c3e87139642181216  gcc/ada/switch-c.ads
--- 2585,2612 ----
  d808a8e77dcb2ceac3f7df82bdf615fb  gcc/ada/sinput-l.adb
  1fa90022a9d7b33d43c44fc7a53d747c  gcc/ada/sinput-l.ads
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! 096d02e3c5956918835ed9752c2dbec6  gcc/ada/sinput.ads
  c2cb7998d90db14a7d03081370f0acf7  gcc/ada/snames.adb-tmpl
! ae7fa20ea0b853f6edd04234494e8fb6  gcc/ada/snames.ads-tmpl
  1d0f0a946dfb952f009ada43305106dd  gcc/ada/snames.h-tmpl
! 5ed6a363c24115485e6cea6d7b14e721  gcc/ada/socket.c
  ecba0441b0c08f91cbb4d9d57855d8a1  gcc/ada/spark_xrefs.adb
  a4d3247a60a43b8fb66e9f80fefec652  gcc/ada/spark_xrefs.ads
! c9a3fb3d37f7c8f03159f697300d5975  gcc/ada/sprint.adb
! 7f89761f9112f11fc32f3aabd10d4209  gcc/ada/sprint.ads
  f995abb75b38017c68bddb66ba689f75  gcc/ada/stand.adb
  b4535290e998256e998917bfedfe8762  gcc/ada/stand.ads
! 92510faaca8c15e63e6f22f0b28dbe5f  gcc/ada/standard.ads.h
! db19233a0ba9a6d2567d0526c15e4ba7  gcc/ada/stringt.adb
! e66628557ba3f7ee5bea96b54018fae1  gcc/ada/stringt.ads
! a017e6973360b8754f9b99ba9203bed9  gcc/ada/stringt.h
  9d0a10cda0308e97df7e8be39f047e91  gcc/ada/style.adb
! 46f8dfd8fa1884969af12c4e657a1125  gcc/ada/style.ads
! cd4b0571bc0559c8b01c6d71feb5359e  gcc/ada/styleg.adb
! 2ff7867acd81d0a4f306c08ac82ec825  gcc/ada/styleg.ads
! 4188eeda6e0ab8740fd14f7fdc9a42f0  gcc/ada/stylesw.adb
! 8ee2055fd6d5b8923b88ca0628da93fc  gcc/ada/stylesw.ads
! 7acf56086ed0016487bc7b993990ef9d  gcc/ada/switch-b.adb
  10c2624ddbb44b95895434f1d5837370  gcc/ada/switch-b.ads
  78a74b6a3041457159ffb2e1bcf585b1  gcc/ada/switch-c.adb
  7ade1c576f0da32c3e87139642181216  gcc/ada/switch-c.ads
*************** a5507e2cb9fc96483410d5e85fec5f46  gcc/ad
*** 2553,2596 ****
  1ec73212f02b1a4c45f67490c3bd7f54  gcc/ada/switch.ads
  a8622b1153f99f906216cb785f6cf530  gcc/ada/symbols.adb
  7885552eab4c426ed16650a49dded033  gcc/ada/symbols.ads
! 7bd0e452df5b8d2f89423c925bafc3fe  gcc/ada/sysdep.c
! 581a50e6b55a733b1838cb66d29f4c2a  gcc/ada/table.adb
! d6005851c0cdc85894de6266a16836cd  gcc/ada/table.ads
! 04b5dd63a6e82b5b248ba4af3ba16171  gcc/ada/targext.c
  24ebbbc71b005eda1427f66038e6b6ff  gcc/ada/targparm.adb
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  4e0e41ebc6e118d078072ebd9ef5299e  gcc/ada/tbuild.ads
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  85f5e4abcd75dc026adf17bcbc0e778a  gcc/ada/tempdir.ads
! 44c2121bc04e448fc5bd4ea309e677b3  gcc/ada/terminals.c
! e635a8902588c0790b777b7dfb968a4b  gcc/ada/tracebak.c
  affc284db5ac9cbafd11b2d9de6fc107  gcc/ada/tree_gen.adb
  2960cfd21cd508ef0059b3e8918bfffd  gcc/ada/tree_gen.ads
  c767501bb45de3606a130dfea0709594  gcc/ada/tree_in.adb
  ee24cc5650ff81e6205a57a950e20562  gcc/ada/tree_in.ads
  a5cd5fbff386c480e34c14c081668aee  gcc/ada/tree_io.adb
  57c0c54eb3091ab00fd12c7c4bd77d82  gcc/ada/tree_io.ads
! 816b0d06ba4b034a0f69029adb6ecc97  gcc/ada/treepr.adb
! 47f4a40c116ec8b8aea4ed8b55e5fb34  gcc/ada/treepr.ads
  b1a12d53199396f327ddecc980e710d1  gcc/ada/treeprs.adt
  b05a4bff0ee225d70b6baa6701c01bf2  gcc/ada/ttypes.ads
  44b3c8087d3fd240264a1ad0dc77a0cf  gcc/ada/types.adb
! 2552348103f7690c21c86ed038cc5bc1  gcc/ada/types.ads
! 59b3225f490c43c1ed9ea274b32f4ca8  gcc/ada/types.h
! 0cf1ffbd9ba57ead8660fe9d2ca34728  gcc/ada/uintp.adb
! 0ff746af3fa827ddc0332efcaeb631a4  gcc/ada/uintp.ads
! b8d9a35de5c493bbf5edabadbb4a6223  gcc/ada/uintp.h
  0ab157a95877c623a4f4600d07b6af73  gcc/ada/uname.adb
  89743788d5f4528350bd3a08a169b50e  gcc/ada/uname.ads
  4c1ca05bc80ffd919eaebd44c01f5275  gcc/ada/urealp.adb
! bb651eadadef3337ff46ca232c5d0d61  gcc/ada/urealp.ads
! cb19b2120d796e96e1ffd447473f9e84  gcc/ada/urealp.h
! 8c4e569ff49f71580a3dc15cfb1cdbf1  gcc/ada/usage.adb
  9ef90e9d51dada2ad1078cff235e9cb3  gcc/ada/usage.ads
! 65e1a4e716f9f737b443fd1815bc5e0e  gcc/ada/validsw.adb
! bf5a50df861a6944ef43cf700b019547  gcc/ada/validsw.ads
  49ef8bc97a344f91b927f23054ade642  gcc/ada/vx_stack_info.c
  884e1a54368295893128977447d7e59c  gcc/ada/vxworks-arm-link.spec
  e158d4a4cda56237d4f66dfddc3b9915  gcc/ada/vxworks-e500-link.spec
--- 2616,2659 ----
  1ec73212f02b1a4c45f67490c3bd7f54  gcc/ada/switch.ads
  a8622b1153f99f906216cb785f6cf530  gcc/ada/symbols.adb
  7885552eab4c426ed16650a49dded033  gcc/ada/symbols.ads
! c17013bcd7ea95abfc4e17c481a31e13  gcc/ada/sysdep.c
! 213dc3186b3a5cbec6c7bcc285f88bb8  gcc/ada/table.adb
! b5fdef764c9ee0134c3c4a8949312b8f  gcc/ada/table.ads
! 123e79ca733a8bf03f09f197795e57b1  gcc/ada/targext.c
  24ebbbc71b005eda1427f66038e6b6ff  gcc/ada/targparm.adb
! 06eba24546f58424ec35b2453c68bdb9  gcc/ada/targparm.ads
  cdf183c5334f14d076adc47a9d8ba503  gcc/ada/tb-gcc.c
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! ab638d7890d59a129ab071eef8fbb3c7  gcc/ada/tracebak.c
  affc284db5ac9cbafd11b2d9de6fc107  gcc/ada/tree_gen.adb
  2960cfd21cd508ef0059b3e8918bfffd  gcc/ada/tree_gen.ads
  c767501bb45de3606a130dfea0709594  gcc/ada/tree_in.adb
  ee24cc5650ff81e6205a57a950e20562  gcc/ada/tree_in.ads
  a5cd5fbff386c480e34c14c081668aee  gcc/ada/tree_io.adb
  57c0c54eb3091ab00fd12c7c4bd77d82  gcc/ada/tree_io.ads
! dd6a8f4ee7a02d88edb39e75f5e0c817  gcc/ada/treepr.adb
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  b1a12d53199396f327ddecc980e710d1  gcc/ada/treeprs.adt
  b05a4bff0ee225d70b6baa6701c01bf2  gcc/ada/ttypes.ads
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  0ab157a95877c623a4f4600d07b6af73  gcc/ada/uname.adb
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  4c1ca05bc80ffd919eaebd44c01f5275  gcc/ada/urealp.adb
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! d12b7d6a907a81fc78d9ae89ac90fbd9  gcc/ada/urealp.h
! c1004f90e87d20218ae89f44f7d300d2  gcc/ada/usage.adb
  9ef90e9d51dada2ad1078cff235e9cb3  gcc/ada/usage.ads
! ba301bc1c75de50c289de448c66789d3  gcc/ada/validsw.adb
! 5de4741ac8e14fe7a03333e5056b7c97  gcc/ada/validsw.ads
  49ef8bc97a344f91b927f23054ade642  gcc/ada/vx_stack_info.c
  884e1a54368295893128977447d7e59c  gcc/ada/vxworks-arm-link.spec
  e158d4a4cda56237d4f66dfddc3b9915  gcc/ada/vxworks-e500-link.spec
*************** f972a9a2e32e4d6aa260193203ee6862  gcc/ad
*** 2600,4455 ****
  745188949cd7ff6df266579735782385  gcc/ada/vxworks-smp-ppc-link.spec
  297ba61aeda52a880298da8069891ecc  gcc/ada/vxworks-smp-x86-link.spec
  cf24e76097812a932a26f6600d193208  gcc/ada/vxworks-x86-link.spec
! 9780ddff3d60e5bd7ef4bdcc5b836af2  gcc/ada/warnsw.adb
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  4828592e78577e7df5db506fb1804dae  gcc/ada/xeinfo.adb
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! 05c6a1a142df920ee225f6785afe5201  gcc/ada/xoscons.adb
  884d43deb30aa4aebc9243c344e1b34e  gcc/ada/xr_tabls.adb
  a6617a6b5331fdb03db23cf14b42f795  gcc/ada/xr_tabls.ads
! b2ddf0f933005f8cbf6395f9aa06c69c  gcc/ada/xref_lib.adb
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  9850046bbde2ebe6e0ac9359ef601022  gcc/ada/xsinfo.adb
  98720dde9a297e98960f1ae636982c99  gcc/ada/xsnamest.adb
  2da8ae65290801fd795b744e8aa2bd91  gcc/ada/xtreeprs.adb
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  33170889e5f8d6d706c9860cc6182beb  gcc/ada/xutil.ads
! bdf98fed4b1caf482ba73539059a70c8  gcc/addresses.h
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! af06312a4680a8f5516a66c65553d484  gcc/alias.h
! 97e1d797af1c39d9c32c92a073df5a18  gcc/align.h
! 9c97bcef669ff02c38ee00291aa421ee  gcc/alloc-pool.c
! 44afcda6f1081bcc7067febfe1d2fc68  gcc/alloc-pool.h
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! a1ee54d37fe1e32b95a116f33ad5f5b9  gcc/asan.h
! 846d8b05a24e1f1ba79fd2d5edd183c7  gcc/attribs.c
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! 629cfb7a8428c20122c51e810fea6563  gcc/brig/brigfrontend/brig-atomic-inst-handler.cc
! c4408a1f53e65e85426ee67fc3ba3e92  gcc/brig/brigfrontend/brig-basic-inst-handler.cc
! 52c81ac48db97ee6a1ac9dce1e922641  gcc/brig/brigfrontend/brig-branch-inst-handler.cc
! 191355c3699654e1aba425531ab1912c  gcc/brig/brigfrontend/brig-cmp-inst-handler.cc
! 2e22916384b604617c6bdc31f09a5585  gcc/brig/brigfrontend/brig-code-entry-handler.cc
! 6ef972387ecb045a58c2320a004aba5f  gcc/brig/brigfrontend/brig-code-entry-handler.h
! c3e749adaf8cc54a0fb1e3314f4e280a  gcc/brig/brigfrontend/brig-comment-handler.cc
! f1f411673644efc30ae8e5be472efe41  gcc/brig/brigfrontend/brig-control-handler.cc
! 805f27aa5a708402abb427162ab14649  gcc/brig/brigfrontend/brig-copy-move-inst-handler.cc
! 1fd67cef442c094d70a2731006681414  gcc/brig/brigfrontend/brig-cvt-inst-handler.cc
! bd6933cc136813537626ac6962a24bda  gcc/brig/brigfrontend/brig-fbarrier-handler.cc
! dd44c9d5db4ed04429f823b42cb6a261  gcc/brig/brigfrontend/brig-function-handler.cc
! 56f67834bf8e6ef451a67a6464b48a2b  gcc/brig/brigfrontend/brig-function.cc
! cbd765b53e06b1f9557d137ba9cac302  gcc/brig/brigfrontend/brig-function.h
! e9745bbc623518ce3a71915a1092f4e1  gcc/brig/brigfrontend/brig-inst-mod-handler.cc
! 9670af020d2c5a385d0148505ba3761d  gcc/brig/brigfrontend/brig-label-handler.cc
! 2f09869fe701b12973d6d518a7f72d5d  gcc/brig/brigfrontend/brig-lane-inst-handler.cc
! 114813364cc603c6d7cf288acf12651b  gcc/brig/brigfrontend/brig-machine.c
! eb59a2920ce9868e427626bdcaa8b455  gcc/brig/brigfrontend/brig-machine.h
! c2958c341c52432bff257297de0735d8  gcc/brig/brigfrontend/brig-mem-inst-handler.cc
! efc202591517d829b1612caf24da7da6  gcc/brig/brigfrontend/brig-module-handler.cc
! a4cfcd6c1cf93ae742fbb7fb1bc3cad6  gcc/brig/brigfrontend/brig-queue-inst-handler.cc
! 82f6bc23d96614bf2ecf26da2d2c7000  gcc/brig/brigfrontend/brig-seg-inst-handler.cc
! e69c88923bee28c801f9c51c55d28cab  gcc/brig/brigfrontend/brig-signal-inst-handler.cc
! 4bfc6047a2f25d3d298fc5c35c17d23c  gcc/brig/brigfrontend/brig-to-generic.cc
! f4cd168c850e7da273d3aa66c874831f  gcc/brig/brigfrontend/brig-to-generic.h
! 728054f743bb2f01310591f6b94ddb28  gcc/brig/brigfrontend/brig-util.cc
! 926561872b2cb320ab15884bc7f2ea52  gcc/brig/brigfrontend/brig-util.h
! 0c6d20e56a323697a1356366b04a7d0d  gcc/brig/brigfrontend/brig-variable-handler.cc
! cb11d588eb0c5a7e0337c56e9323e118  gcc/brig/brigfrontend/phsa.h
! b703f97fb4aab4ca6b4c27e100cc9976  gcc/brig/brigspec.c
! 93b5f35a203ae51d5b5107590b47c8f7  gcc/brig/config-lang.in
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  4a7d3f368a24d549fabaafbe44fcb134  gcc/config/sparc/t-linux
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  75987b7fdc6fa9c9ff2108ff1003e6d2  gcc/config/sparc/t-netbsd64
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  511770bb20c2707fabd4f231ce8b83cf  gcc/config/sparc/t-sol2
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  b04597637b0c08dd3e6d1a40c43e76b4  gcc/config/sparc/t-vxworks
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  9b2ddc345afcea4f415dd0c8bc2d2ed3  gcc/config/sparc/x-sparc
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  5dad674732908a1c6e62e627e047929e  gcc/config/t-musl
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  4b382926844dd76c21046df37b41105c  gcc/config/t-openbsd
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  501751f2be56698ed1c9cf18358b67ac  gcc/config/t-rtems
  51d3678acb41d4448cc332f7a8e8cb2e  gcc/config/t-slibgcc
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  94b3e10150e75899d2fc1410cf218e3f  gcc/config/t-sysroot-suffix
  6f78c5decbfb4b465e7c289b60109023  gcc/config/t-uclibc
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  94847c7229d625be28df740c61698b73  gcc/config/tilegx/t-tilegx
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  3f18cdd00997ddf3552919159dbe4bbb  gcc/config/tilepro/t-tilepro
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  17fd5cabcc31b720b23bad47cf7fe84c  gcc/config/tm-dwarf2.h
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  a6ae71a556271cc116214b3e9e87d867  gcc/config/usegld.h
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! f09e660bb8addbf81c31e3065c7194fb  gcc/config/vms/make-crtlmap.awk
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  88a072da5fbb7828331d88720c03679d  gcc/config/vms/vms-crtlmap.map
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  5cc0a69d6149e22cb7ea38c2206a2af3  gcc/config/x-cflags-O1
  e039340cbf1639956ac7be2a90852c1b  gcc/config/x-darwin
  70a634635eff456ffab3bc53b2a81690  gcc/config/x-hpux
--- 2663,4642 ----
  745188949cd7ff6df266579735782385  gcc/ada/vxworks-smp-ppc-link.spec
  297ba61aeda52a880298da8069891ecc  gcc/ada/vxworks-smp-x86-link.spec
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  4828592e78577e7df5db506fb1804dae  gcc/ada/xeinfo.adb
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  884d43deb30aa4aebc9243c344e1b34e  gcc/ada/xr_tabls.adb
  a6617a6b5331fdb03db23cf14b42f795  gcc/ada/xr_tabls.ads
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  9850046bbde2ebe6e0ac9359ef601022  gcc/ada/xsinfo.adb
  98720dde9a297e98960f1ae636982c99  gcc/ada/xsnamest.adb
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  a6b6cc6fb2c8e1208fd31f2f607a1a77  gcc/ada/xutil.adb
  33170889e5f8d6d706c9860cc6182beb  gcc/ada/xutil.ads
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*************** aaed50f554cda133edf7210a7795da61  gcc/d/
*** 4584,4695 ****
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--- 4774,4885 ----
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*** 4698,4707 ****
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*************** a0bc51d5990da2df457fd68c965179a2  gcc/te
*** 8471,8493 ****
  4f6ad8cac6b84de53049a5eea97fab49  gcc/testsuite/c-c++-common/Wno-builtin-declaration-mismatch-1.c
  b935c2a58d7f731bf0cccb6a7d11766c  gcc/testsuite/c-c++-common/Wparentheses-1.c
  ccb8ce6afa2243d9aec47e26a1e585f2  gcc/testsuite/c-c++-common/Wpointer-arith-1.c
! ec5ec31a0614d6762df2a4f03ada7bac  gcc/testsuite/c-c++-common/Wpointer-compare-1.c
  11d3248b6ea99e7a45d1a774cb605703  gcc/testsuite/c-c++-common/Wprio-ctor-dtor.c
  418addd7c496fa3ae10687ea8dd6668c  gcc/testsuite/c-c++-common/Wrestrict-2.c
  444583f2170154222066726b97ff69ff  gcc/testsuite/c-c++-common/Wrestrict-3.c
! 68729058c66482b738afcbe8f284ee0f  gcc/testsuite/c-c++-common/Wrestrict.c
  51fdd1aacef3259e17622c73fe086bee  gcc/testsuite/c-c++-common/Wreturn-local-addr.c
  d57f0b6d660c8299b95ba02b346d2d76  gcc/testsuite/c-c++-common/Wsequence-point-1.c
  3831f9cd25e86185c0d7bd260ddc4a22  gcc/testsuite/c-c++-common/Wsequence-point-2.c
! fc393bd66715c29dc1e10b0c545a89de  gcc/testsuite/c-c++-common/Wshift-count-negative-1.c
  30f55184465e5031498ef7eb0d2b75e4  gcc/testsuite/c-c++-common/Wshift-count-negative-2.c
! 289a216514c6f7948e7c944ac1ff49e0  gcc/testsuite/c-c++-common/Wshift-count-overflow-1.c
  7f7dfe9827844964aa5913a0df77bfda  gcc/testsuite/c-c++-common/Wshift-count-overflow-2.c
! 615b9696cc389bf238ee92d8aa94732a  gcc/testsuite/c-c++-common/Wshift-negative-value-1.c
! df797fee4aa298224d59315abfc9a9f7  gcc/testsuite/c-c++-common/Wshift-negative-value-2.c
  9cde469967b17467bf200952edf9872c  gcc/testsuite/c-c++-common/Wshift-negative-value-3.c
  26642fe2d9af413debdae5db59b1f3ff  gcc/testsuite/c-c++-common/Wshift-negative-value-4.c
! bce3d116ad042543d8deca59891335d8  gcc/testsuite/c-c++-common/Wshift-negative-value-5.c
  2ec4a0079f61044cd2556d10f9086c01  gcc/testsuite/c-c++-common/Wshift-negative-value-6.c
  23215ac7f9da39dedf899636af7edacc  gcc/testsuite/c-c++-common/Wshift-overflow-1.c
  83d4f8080bdfbd062809fe67c5263ebe  gcc/testsuite/c-c++-common/Wshift-overflow-2.c
--- 8689,8712 ----
  4f6ad8cac6b84de53049a5eea97fab49  gcc/testsuite/c-c++-common/Wno-builtin-declaration-mismatch-1.c
  b935c2a58d7f731bf0cccb6a7d11766c  gcc/testsuite/c-c++-common/Wparentheses-1.c
  ccb8ce6afa2243d9aec47e26a1e585f2  gcc/testsuite/c-c++-common/Wpointer-arith-1.c
! 65a57bad4b8b23479abc12a4777b052f  gcc/testsuite/c-c++-common/Wpointer-compare-1.c
  11d3248b6ea99e7a45d1a774cb605703  gcc/testsuite/c-c++-common/Wprio-ctor-dtor.c
  418addd7c496fa3ae10687ea8dd6668c  gcc/testsuite/c-c++-common/Wrestrict-2.c
  444583f2170154222066726b97ff69ff  gcc/testsuite/c-c++-common/Wrestrict-3.c
! 634d3b1c41d2942b4647a1b3db84dcf5  gcc/testsuite/c-c++-common/Wrestrict.c
  51fdd1aacef3259e17622c73fe086bee  gcc/testsuite/c-c++-common/Wreturn-local-addr.c
  d57f0b6d660c8299b95ba02b346d2d76  gcc/testsuite/c-c++-common/Wsequence-point-1.c
  3831f9cd25e86185c0d7bd260ddc4a22  gcc/testsuite/c-c++-common/Wsequence-point-2.c
! 1b42c3a14a41be6fe27998ddaf0c09fb  gcc/testsuite/c-c++-common/Wshadow-1.c
! 76117ab138e7572d8f580b339e5456af  gcc/testsuite/c-c++-common/Wshift-count-negative-1.c
  30f55184465e5031498ef7eb0d2b75e4  gcc/testsuite/c-c++-common/Wshift-count-negative-2.c
! d425900c0046df4dd9d326f6c8eb2d67  gcc/testsuite/c-c++-common/Wshift-count-overflow-1.c
  7f7dfe9827844964aa5913a0df77bfda  gcc/testsuite/c-c++-common/Wshift-count-overflow-2.c
! b4259718f4cfc2633ca66fce82e19921  gcc/testsuite/c-c++-common/Wshift-negative-value-1.c
! 9c17780b7734fb8edd8d6132d7571dea  gcc/testsuite/c-c++-common/Wshift-negative-value-2.c
  9cde469967b17467bf200952edf9872c  gcc/testsuite/c-c++-common/Wshift-negative-value-3.c
  26642fe2d9af413debdae5db59b1f3ff  gcc/testsuite/c-c++-common/Wshift-negative-value-4.c
! 4eb245cdd007f951220ef4ce4752393f  gcc/testsuite/c-c++-common/Wshift-negative-value-5.c
  2ec4a0079f61044cd2556d10f9086c01  gcc/testsuite/c-c++-common/Wshift-negative-value-6.c
  23215ac7f9da39dedf899636af7edacc  gcc/testsuite/c-c++-common/Wshift-overflow-1.c
  83d4f8080bdfbd062809fe67c5263ebe  gcc/testsuite/c-c++-common/Wshift-overflow-2.c
*************** ba76c2340f7c7f9d54120447cf44b260  gcc/te
*** 8497,8512 ****
  f8b8dcb9f64cd4f1158a36e44cdf76b7  gcc/testsuite/c-c++-common/Wshift-overflow-6.c
  d2ebf4f8689ab32e5be23f1ebf97667f  gcc/testsuite/c-c++-common/Wshift-overflow-7.c
  2095424b6b86a7ddbae9c94c16fa2157  gcc/testsuite/c-c++-common/Wsign-compare-1.c
  de15cabafc30a00e81c083c9a9428ac8  gcc/testsuite/c-c++-common/Wsizeof-pointer-div.c
  32df34b1472bcfdea6e41e9ce2f31d7c  gcc/testsuite/c-c++-common/Wsizeof-pointer-memaccess1.c
  bf0b620625355f346eefd54a379f0ac2  gcc/testsuite/c-c++-common/Wsizeof-pointer-memaccess2.c
  9435b893d35596d6e6c421a7d0ca6b4e  gcc/testsuite/c-c++-common/Wsizeof-pointer-memaccess3.c
  c2f8af9a24cbf598244cbdf23a6eb007  gcc/testsuite/c-c++-common/Wsizeof-pointer-memaccess4.c
  2dc81fc124460cc2ec5d7aef6b94b6f3  gcc/testsuite/c-c++-common/Wstringop-overflow.c
  b9163d26f5124adacd165e32f8b32a62  gcc/testsuite/c-c++-common/Wstringop-truncation-2.c
  e43106fc454dedd36c41a975a04be5e3  gcc/testsuite/c-c++-common/Wstringop-truncation-3.c
! ca1309cdddeac332d3eecfb8a1684b9d  gcc/testsuite/c-c++-common/Wstringop-truncation-4.c
! 69a9c731f88bd8d54d3320a623dc9ca6  gcc/testsuite/c-c++-common/Wstringop-truncation.c
  99ac388cc01e6685268df2541e341b35  gcc/testsuite/c-c++-common/Wswitch-unreachable-1.c
  29d1bf983b396d52416eb729f211b026  gcc/testsuite/c-c++-common/Wswitch-unreachable-2.c
  10961c472b3ef7a9066ef56ea7bb58d9  gcc/testsuite/c-c++-common/Wswitch-unreachable-3.c
--- 8716,8737 ----
  f8b8dcb9f64cd4f1158a36e44cdf76b7  gcc/testsuite/c-c++-common/Wshift-overflow-6.c
  d2ebf4f8689ab32e5be23f1ebf97667f  gcc/testsuite/c-c++-common/Wshift-overflow-7.c
  2095424b6b86a7ddbae9c94c16fa2157  gcc/testsuite/c-c++-common/Wsign-compare-1.c
+ 40bc1e540d092c06d14dc9842ee9cd03  gcc/testsuite/c-c++-common/Wsign-conversion-1.c
  de15cabafc30a00e81c083c9a9428ac8  gcc/testsuite/c-c++-common/Wsizeof-pointer-div.c
  32df34b1472bcfdea6e41e9ce2f31d7c  gcc/testsuite/c-c++-common/Wsizeof-pointer-memaccess1.c
  bf0b620625355f346eefd54a379f0ac2  gcc/testsuite/c-c++-common/Wsizeof-pointer-memaccess2.c
  9435b893d35596d6e6c421a7d0ca6b4e  gcc/testsuite/c-c++-common/Wsizeof-pointer-memaccess3.c
  c2f8af9a24cbf598244cbdf23a6eb007  gcc/testsuite/c-c++-common/Wsizeof-pointer-memaccess4.c
+ 10fbcaf8f85faf81c5222e12ccd7746b  gcc/testsuite/c-c++-common/Wstringop-overflow-2.c
  2dc81fc124460cc2ec5d7aef6b94b6f3  gcc/testsuite/c-c++-common/Wstringop-overflow.c
  b9163d26f5124adacd165e32f8b32a62  gcc/testsuite/c-c++-common/Wstringop-truncation-2.c
  e43106fc454dedd36c41a975a04be5e3  gcc/testsuite/c-c++-common/Wstringop-truncation-3.c
! e80b7aaae365db3fe8339ddc534cc5c0  gcc/testsuite/c-c++-common/Wstringop-truncation-4.c
! b32553a80bbb7f2d37ad1425d200e8da  gcc/testsuite/c-c++-common/Wstringop-truncation.c
! 9d794a1763749ee0180f56ce7aed6d0c  gcc/testsuite/c-c++-common/Wswitch-outside-range-1.c
! 91da5133e61260ea9e9663f1e6a778fd  gcc/testsuite/c-c++-common/Wswitch-outside-range-2.c
! e47c13cfff5cd19e684db7748de8566d  gcc/testsuite/c-c++-common/Wswitch-outside-range-3.c
! 9435c6ed98822f843a71200c0acaa495  gcc/testsuite/c-c++-common/Wswitch-outside-range-4.c
  99ac388cc01e6685268df2541e341b35  gcc/testsuite/c-c++-common/Wswitch-unreachable-1.c
  29d1bf983b396d52416eb729f211b026  gcc/testsuite/c-c++-common/Wswitch-unreachable-2.c
  10961c472b3ef7a9066ef56ea7bb58d9  gcc/testsuite/c-c++-common/Wswitch-unreachable-3.c
*************** f7cf252f8fb24838c4491a1b681216d3  gcc/te
*** 8539,8546 ****
  3acd34af9a98cb4913d6b6310f170f6c  gcc/testsuite/c-c++-common/Wunused-var-7.c
  955505dd1a7bcb4ea846ce40b428a43d  gcc/testsuite/c-c++-common/Wunused-var-8.c
  521676114b454f97187cc76d533621e6  gcc/testsuite/c-c++-common/Wunused-var-9.c
! a50d762e53776af1cdd4faaa0f858285  gcc/testsuite/c-c++-common/Wvarargs-2.c
! f86e3374bdfa46067438564a7eae6a71  gcc/testsuite/c-c++-common/Wvarargs.c
  e104bcfe21abe9fcad2b191ce9dee6c6  gcc/testsuite/c-c++-common/addrtmp.c
  f39ce0b617da5fc9aba69733615ee0de  gcc/testsuite/c-c++-common/array-1.c
  15b241020a9a5497396b58539b2405ba  gcc/testsuite/c-c++-common/array-5.c
--- 8764,8771 ----
  3acd34af9a98cb4913d6b6310f170f6c  gcc/testsuite/c-c++-common/Wunused-var-7.c
  955505dd1a7bcb4ea846ce40b428a43d  gcc/testsuite/c-c++-common/Wunused-var-8.c
  521676114b454f97187cc76d533621e6  gcc/testsuite/c-c++-common/Wunused-var-9.c
! 65cf5a15ffd224b6b51f7d207aa29f27  gcc/testsuite/c-c++-common/Wvarargs-2.c
! 70d4ab70f79cf2ba91c2d0552436e561  gcc/testsuite/c-c++-common/Wvarargs.c
  e104bcfe21abe9fcad2b191ce9dee6c6  gcc/testsuite/c-c++-common/addrtmp.c
  f39ce0b617da5fc9aba69733615ee0de  gcc/testsuite/c-c++-common/array-1.c
  15b241020a9a5497396b58539b2405ba  gcc/testsuite/c-c++-common/array-5.c
*************** cc33621f0af40932dc13ca0bff4d3557  gcc/te
*** 8551,8557 ****
  72de90fafd160e4a777ef19bc09ff0d7  gcc/testsuite/c-c++-common/asan/alloca_big_alignment.c
  2bb6049bc37ecb2ca6971011cbefcc2a  gcc/testsuite/c-c++-common/asan/alloca_detect_custom_size.c
  adeb73c262eb712e84e2823a98c1199c  gcc/testsuite/c-c++-common/asan/alloca_instruments_all_paddings.c
! b366c5c4178a271313ec4af76598d605  gcc/testsuite/c-c++-common/asan/alloca_loop_unpoisoning.c
  648add575c0dbd9df398dc0058875eb1  gcc/testsuite/c-c++-common/asan/alloca_overflow_partial.c
  483882054d8d099b9769ca966f926bf0  gcc/testsuite/c-c++-common/asan/alloca_overflow_right.c
  f521c0adacbecee9cbfcbdd089681c95  gcc/testsuite/c-c++-common/asan/alloca_safe_access.c
--- 8776,8782 ----
  72de90fafd160e4a777ef19bc09ff0d7  gcc/testsuite/c-c++-common/asan/alloca_big_alignment.c
  2bb6049bc37ecb2ca6971011cbefcc2a  gcc/testsuite/c-c++-common/asan/alloca_detect_custom_size.c
  adeb73c262eb712e84e2823a98c1199c  gcc/testsuite/c-c++-common/asan/alloca_instruments_all_paddings.c
! 26d4fb4c2d502b73e4750d7337c6faa6  gcc/testsuite/c-c++-common/asan/alloca_loop_unpoisoning.c
  648add575c0dbd9df398dc0058875eb1  gcc/testsuite/c-c++-common/asan/alloca_overflow_partial.c
  483882054d8d099b9769ca966f926bf0  gcc/testsuite/c-c++-common/asan/alloca_overflow_right.c
  f521c0adacbecee9cbfcbdd089681c95  gcc/testsuite/c-c++-common/asan/alloca_safe_access.c
*************** e9ac694e62021365bb12134eac0ea1b3  gcc/te
*** 8578,8584 ****
  9d719540480f24017a08403b775b3ccd  gcc/testsuite/c-c++-common/asan/kasan-alloca-2.c
  7d6a8668da9be8e1c34c69f4cbea9508  gcc/testsuite/c-c++-common/asan/kasan-recover-1.c
  b6fba65be56233636391b792d7776a15  gcc/testsuite/c-c++-common/asan/kasan-recover-2.c
! 9b634a25e0edb8bec2cce9224f04e230  gcc/testsuite/c-c++-common/asan/memcmp-1.c
  1607b2f88b8139c3bc2645aebffbe6bf  gcc/testsuite/c-c++-common/asan/memcmp-2.c
  11dbf4231551cd47fc06aadbd971a2ff  gcc/testsuite/c-c++-common/asan/misalign-1.c
  b7d8c6d2bcb21a1f7e5b1b1ae09c6681  gcc/testsuite/c-c++-common/asan/misalign-2.c
--- 8803,8809 ----
  9d719540480f24017a08403b775b3ccd  gcc/testsuite/c-c++-common/asan/kasan-alloca-2.c
  7d6a8668da9be8e1c34c69f4cbea9508  gcc/testsuite/c-c++-common/asan/kasan-recover-1.c
  b6fba65be56233636391b792d7776a15  gcc/testsuite/c-c++-common/asan/kasan-recover-2.c
! 0c7b4191d87f812f75f703f1f42597fa  gcc/testsuite/c-c++-common/asan/memcmp-1.c
  1607b2f88b8139c3bc2645aebffbe6bf  gcc/testsuite/c-c++-common/asan/memcmp-2.c
  11dbf4231551cd47fc06aadbd971a2ff  gcc/testsuite/c-c++-common/asan/misalign-1.c
  b7d8c6d2bcb21a1f7e5b1b1ae09c6681  gcc/testsuite/c-c++-common/asan/misalign-2.c
*************** d4cafd1e2a02428237d07dbd1a042e54  gcc/te
*** 8630,8636 ****
  cbc001fdbd160c2b35cb6fbce99eec06  gcc/testsuite/c-c++-common/asan/pr81697.c
  13c66617d3ebd53841304080e3ca5897  gcc/testsuite/c-c++-common/asan/pr88291.c
  d28d598c3f2451cc37c1f66782dabfec  gcc/testsuite/c-c++-common/asan/pr88333.c
! ce1f2f8e0159892ba41e667f8f50198c  gcc/testsuite/c-c++-common/asan/pr88619.c
  9812809bad1f3dafa58acebb37551dff  gcc/testsuite/c-c++-common/asan/pr89124.c
  53382ff9da47e361b5e5dc525d26e518  gcc/testsuite/c-c++-common/asan/red-align-1.c
  40dc4b3092482d9427dfbc9415f0b0a8  gcc/testsuite/c-c++-common/asan/red-align-2.c
--- 8855,8861 ----
  cbc001fdbd160c2b35cb6fbce99eec06  gcc/testsuite/c-c++-common/asan/pr81697.c
  13c66617d3ebd53841304080e3ca5897  gcc/testsuite/c-c++-common/asan/pr88291.c
  d28d598c3f2451cc37c1f66782dabfec  gcc/testsuite/c-c++-common/asan/pr88333.c
! 62ed79bf235f51a98c4b6b7829b845a2  gcc/testsuite/c-c++-common/asan/pr88619.c
  9812809bad1f3dafa58acebb37551dff  gcc/testsuite/c-c++-common/asan/pr89124.c
  53382ff9da47e361b5e5dc525d26e518  gcc/testsuite/c-c++-common/asan/red-align-1.c
  40dc4b3092482d9427dfbc9415f0b0a8  gcc/testsuite/c-c++-common/asan/red-align-2.c
*************** ca3a4e630befd762fc8576e74160a5a4  gcc/te
*** 8654,8659 ****
--- 8879,8885 ----
  23fd6d68a2d88cbcf8cd954faf8fb296  gcc/testsuite/c-c++-common/asmgoto-3.c
  dcd81f0d6cf4d767d2d3f42f805b143b  gcc/testsuite/c-c++-common/asmgoto-4.c
  3965a9ab5dc92c92b09bb770bf0f0749  gcc/testsuite/c-c++-common/attr-aligned-1.c
+ 60a72243e0d12ee432c336b955b7f836  gcc/testsuite/c-c++-common/attr-copy.c
  7013572d9ddd96911ba5c9684a120afa  gcc/testsuite/c-c++-common/attr-fallthrough-1.c
  d74ec118aa5c7b9d1779b844850d814b  gcc/testsuite/c-c++-common/attr-fallthrough-2.c
  ecc5351c14d6a9924c9ba3fe13409d1d  gcc/testsuite/c-c++-common/attr-may-alias-1.c
*************** ae68ce1c3e422bd9410658aded021175  gcc/te
*** 8668,8674 ****
  aecf8808dcce2f2171e6ff35d91b4e01  gcc/testsuite/c-c++-common/attr-nonstring-5.c
  d26d1d76d721a6b00e027af33557e823  gcc/testsuite/c-c++-common/attr-nonstring-6.c
  86ea749bcbbf7e6b48a29eb97f3481f0  gcc/testsuite/c-c++-common/attr-nonstring-7.c
! 3c3ba740bb7ddaca63b4be93852d469d  gcc/testsuite/c-c++-common/attr-nonstring-8.c
  98687838cf46c8c28ee0ab7af818dc38  gcc/testsuite/c-c++-common/attr-opt-1.c
  5ad24543b6d83246f7cebf2bed5c2379  gcc/testsuite/c-c++-common/attr-simd-2.c
  ba228dab53d862be27c7036d86f735eb  gcc/testsuite/c-c++-common/attr-simd-4.c
--- 8894,8900 ----
  aecf8808dcce2f2171e6ff35d91b4e01  gcc/testsuite/c-c++-common/attr-nonstring-5.c
  d26d1d76d721a6b00e027af33557e823  gcc/testsuite/c-c++-common/attr-nonstring-6.c
  86ea749bcbbf7e6b48a29eb97f3481f0  gcc/testsuite/c-c++-common/attr-nonstring-7.c
! d33489fa23f1333508c24af91d628caa  gcc/testsuite/c-c++-common/attr-nonstring-8.c
  98687838cf46c8c28ee0ab7af818dc38  gcc/testsuite/c-c++-common/attr-opt-1.c
  5ad24543b6d83246f7cebf2bed5c2379  gcc/testsuite/c-c++-common/attr-simd-2.c
  ba228dab53d862be27c7036d86f735eb  gcc/testsuite/c-c++-common/attr-simd-4.c
*************** debeca168f3a9a432da9b7fe19f105d0  gcc/te
*** 8685,8690 ****
--- 8911,8917 ----
  05e6e3f334bd062d9e932f51ca25a73d  gcc/testsuite/c-c++-common/attributes-enum-2.c
  e1214c78ebce01448d71917e783e66f3  gcc/testsuite/c-c++-common/builtin-arith-overflow-1.c
  563de839d84e990d18f755b18712b764  gcc/testsuite/c-c++-common/builtin-arith-overflow-2.c
+ edbcc39f20e5248e2b957a28e01fee51  gcc/testsuite/c-c++-common/builtin-arith-overflow-3.c
  9db04682d9ed26e120c150f32a81c167  gcc/testsuite/c-c++-common/builtin-convertvector-1.c
  86e09291e64c6f0da9f5f640b3c8b994  gcc/testsuite/c-c++-common/builtin-convertvector-2.c
  2b8aa91fb8f2e3743b68c66f3224582b  gcc/testsuite/c-c++-common/builtin-has-attribute-2.c
*************** eab9eacba95bc4624b72fe3bf81daac3  gcc/te
*** 8711,8727 ****
  dfcddf8e03e527e614cad79d5530f49e  gcc/testsuite/c-c++-common/conflict-markers-7.c
  fe9ba880903f66a472e33ffd221fe3ee  gcc/testsuite/c-c++-common/conflict-markers-8.c
  60862ce07b266f605ac33d7ec3a6ab37  gcc/testsuite/c-c++-common/conflict-markers-9.c
! 9d9c46947813115ec77f53871be955d1  gcc/testsuite/c-c++-common/convert-vec-1.c
  7df2c1d437a437ae20fe8cd33d071a1a  gcc/testsuite/c-c++-common/cpp/diagnostic-pragma-1.c
  da5e564f6cffb4d2f63384ba5d7351b1  gcc/testsuite/c-c++-common/cpp/diagnostic-pragma-2.c
  80917e73eda1f9f63bafbcc4d94a0927  gcc/testsuite/c-c++-common/cpp/ffile-prefix-map.c
  040be3c971d2d342750c402c54b9b869  gcc/testsuite/c-c++-common/cpp/fmacro-prefix-map.c
  ec867e7b9ed2db10d86511396a956702  gcc/testsuite/c-c++-common/cpp/macro-arg-count-1.c
  1ea6a04229ddcedf5e76f5218e8d0f3d  gcc/testsuite/c-c++-common/cpp/macro-arg-count-2.c
  38afd926394292efa57d77eed0f14ef2  gcc/testsuite/c-c++-common/cpp/normalize-3.c
  c1473b6b7a5935bfbf0e28c2124d5918  gcc/testsuite/c-c++-common/cpp/openacc-define-1.c
  c9229fff2e95406401ff0e77f9e25e9b  gcc/testsuite/c-c++-common/cpp/openacc-define-2.c
! 7fb5dc95966aaf57d733872060904b4b  gcc/testsuite/c-c++-common/cpp/openacc-define-3.c
  23d2256fdd9c03d95361e499c9aa5d11  gcc/testsuite/c-c++-common/cpp/openmp-define-1.c
  1ba0ade791f40edbd80fddddb700282b  gcc/testsuite/c-c++-common/cpp/openmp-define-2.c
  88fdfa7ad0dd8169a90963238ee1847e  gcc/testsuite/c-c++-common/cpp/openmp-define-3.c
--- 8938,8963 ----
  dfcddf8e03e527e614cad79d5530f49e  gcc/testsuite/c-c++-common/conflict-markers-7.c
  fe9ba880903f66a472e33ffd221fe3ee  gcc/testsuite/c-c++-common/conflict-markers-8.c
  60862ce07b266f605ac33d7ec3a6ab37  gcc/testsuite/c-c++-common/conflict-markers-9.c
! 2a61ee01bf6046a5b3ebef68f4abffe8  gcc/testsuite/c-c++-common/convert-vec-1.c
  7df2c1d437a437ae20fe8cd33d071a1a  gcc/testsuite/c-c++-common/cpp/diagnostic-pragma-1.c
  da5e564f6cffb4d2f63384ba5d7351b1  gcc/testsuite/c-c++-common/cpp/diagnostic-pragma-2.c
  80917e73eda1f9f63bafbcc4d94a0927  gcc/testsuite/c-c++-common/cpp/ffile-prefix-map.c
  040be3c971d2d342750c402c54b9b869  gcc/testsuite/c-c++-common/cpp/fmacro-prefix-map.c
+ 1ccb9ebc08e51c65b99fa5f74657100a  gcc/testsuite/c-c++-common/cpp/fmax-include-depth-1a.h
+ f7fc996e6cb72eb21ae19ef5b5a25faa  gcc/testsuite/c-c++-common/cpp/fmax-include-depth-1b.h
+ bfae689199f4ecb8ef24c9303b60d957  gcc/testsuite/c-c++-common/cpp/fmax-include-depth.c
+ ea3e3f0ffc094df5a744f60183e9f81e  gcc/testsuite/c-c++-common/cpp/has-builtin-2.c
+ bc23e7fea0a34a28d11356c984dbef26  gcc/testsuite/c-c++-common/cpp/has-builtin-3.c
+ 8e94c37617c184f7b783ccc14a832e5a  gcc/testsuite/c-c++-common/cpp/has-builtin.c
+ 63f74f9fe01b458a7f669b372a1d3acc  gcc/testsuite/c-c++-common/cpp/has-include-1.c
+ 531592f10d055837951d413baf4a7c33  gcc/testsuite/c-c++-common/cpp/has-include-next-1.c
+ f886530357fac0e7bc06382bcf2120f9  gcc/testsuite/c-c++-common/cpp/line-1.c
  ec867e7b9ed2db10d86511396a956702  gcc/testsuite/c-c++-common/cpp/macro-arg-count-1.c
  1ea6a04229ddcedf5e76f5218e8d0f3d  gcc/testsuite/c-c++-common/cpp/macro-arg-count-2.c
  38afd926394292efa57d77eed0f14ef2  gcc/testsuite/c-c++-common/cpp/normalize-3.c
  c1473b6b7a5935bfbf0e28c2124d5918  gcc/testsuite/c-c++-common/cpp/openacc-define-1.c
  c9229fff2e95406401ff0e77f9e25e9b  gcc/testsuite/c-c++-common/cpp/openacc-define-2.c
! ac27af3ea0b119b95109334b03d48ca9  gcc/testsuite/c-c++-common/cpp/openacc-define-3.c
  23d2256fdd9c03d95361e499c9aa5d11  gcc/testsuite/c-c++-common/cpp/openmp-define-1.c
  1ba0ade791f40edbd80fddddb700282b  gcc/testsuite/c-c++-common/cpp/openmp-define-2.c
  88fdfa7ad0dd8169a90963238ee1847e  gcc/testsuite/c-c++-common/cpp/openmp-define-3.c
*************** c85025f0def783f70f9bb6a4ea9a23f3  gcc/te
*** 8735,8746 ****
  5e5bc603cb54f22e303862dd47211ded  gcc/testsuite/c-c++-common/cpp/pr63831-1.c
  a72a693524249dca84528ebc132082b5  gcc/testsuite/c-c++-common/cpp/pr63831-2.c
  fc6312863e2a09e397690651369f617d  gcc/testsuite/c-c++-common/cpp/pr65238-1.c
! f09773d2f7d23b50a4dac013615f3aaa  gcc/testsuite/c-c++-common/cpp/pr88974.c
! df43df705a8397d72a82fe6d91e8ec64  gcc/testsuite/c-c++-common/cpp/pr92296-1.c
! dde08a560ecf3f1c0944037da04f2048  gcc/testsuite/c-c++-common/cpp/pr92296-2.c
  791d43cbbb9115404405c22be44e4ae7  gcc/testsuite/c-c++-common/cpp/ucnid-2011-1.c
  0f93514d0ad79c03edfd672fb354e619  gcc/testsuite/c-c++-common/cpp/va-opt-2.c
  d4400c02e16c9ce8399bebed26d20e37  gcc/testsuite/c-c++-common/cpp/va-opt-3.c
  111311014e0b7d3088a84587438910e7  gcc/testsuite/c-c++-common/cpp/va-opt-error.c
  eea6a019e69d78eae4d98554090253c2  gcc/testsuite/c-c++-common/cpp/va-opt-pedantic.c
  170aae082482e5179e2b24f5f07b815a  gcc/testsuite/c-c++-common/cpp/va-opt.c
--- 8971,8994 ----
  5e5bc603cb54f22e303862dd47211ded  gcc/testsuite/c-c++-common/cpp/pr63831-1.c
  a72a693524249dca84528ebc132082b5  gcc/testsuite/c-c++-common/cpp/pr63831-2.c
  fc6312863e2a09e397690651369f617d  gcc/testsuite/c-c++-common/cpp/pr65238-1.c
! 98b26af476c2ea78a482486746564d25  gcc/testsuite/c-c++-common/cpp/pr88974.c
! b9707fab2c32f9df25c7136a89dceeb4  gcc/testsuite/c-c++-common/cpp/pr91639-one.h
! c193497a1a06b2c72230e6146ff47080  gcc/testsuite/c-c++-common/cpp/pr91639-two.h
! 63ccfcc2367b0c8566b11e28fb991851  gcc/testsuite/c-c++-common/cpp/pr91639.c
! 79d5ce62e7f6d0704d8ac0b6d7cc870e  gcc/testsuite/c-c++-common/cpp/pr92296-1.c
! c4436789b283a10d7409837f19d80dd1  gcc/testsuite/c-c++-common/cpp/pr92296-2.c
! b6cb90fb3ec84953777835b5cfd6e596  gcc/testsuite/c-c++-common/cpp/pr93452-1.c
! f101f9b273696455d853878a2f1bddbd  gcc/testsuite/c-c++-common/cpp/pr93452-2.c
! d2d827c3a2830dd9430591dd49019960  gcc/testsuite/c-c++-common/cpp/pr93545-1.c
! 684f6231e94addb6c14e7eebb5df2132  gcc/testsuite/c-c++-common/cpp/pr93545-2.c
! aa884d944cf2bbf71c7c642a33b7244f  gcc/testsuite/c-c++-common/cpp/pr93545-3.c
! 6409b79dc5abde19a70909f1a884d018  gcc/testsuite/c-c++-common/cpp/pr93545-4.c
! 17f09d053664aa8b96634b37ce0988da  gcc/testsuite/c-c++-common/cpp/spaceship-1.c
! 9cdc13ca5a948af9c95ec156cac8609c  gcc/testsuite/c-c++-common/cpp/ucnid-2011-1-utf8.c
  791d43cbbb9115404405c22be44e4ae7  gcc/testsuite/c-c++-common/cpp/ucnid-2011-1.c
  0f93514d0ad79c03edfd672fb354e619  gcc/testsuite/c-c++-common/cpp/va-opt-2.c
  d4400c02e16c9ce8399bebed26d20e37  gcc/testsuite/c-c++-common/cpp/va-opt-3.c
+ ffa7f1250b7f00a641ad13c5836e4f01  gcc/testsuite/c-c++-common/cpp/va-opt-4.c
  111311014e0b7d3088a84587438910e7  gcc/testsuite/c-c++-common/cpp/va-opt-error.c
  eea6a019e69d78eae4d98554090253c2  gcc/testsuite/c-c++-common/cpp/va-opt-pedantic.c
  170aae082482e5179e2b24f5f07b815a  gcc/testsuite/c-c++-common/cpp/va-opt.c
*************** b15ede4348fb88921443e477ccfed8c5  gcc/te
*** 8751,8758 ****
  9f26ab0e1663587353727208a8b1fe9e  gcc/testsuite/c-c++-common/cpp/warning-zero-in-literals-1.c
  36dd0a2ab7ef169ecc90eb0e12535005  gcc/testsuite/c-c++-common/cpp/warning-zero-location-2.c
  f517ccd69d4612259fd415543074a1e1  gcc/testsuite/c-c++-common/cpp/warning-zero-location.c
! a0486a5f7c8ccac781c350a259d1d10a  gcc/testsuite/c-c++-common/cxxbitfields-3.c
! 41b7167c10caf062116cc33d0f57a9ca  gcc/testsuite/c-c++-common/cxxbitfields-6.c
  e48cf012715a725279208fd10940b8e2  gcc/testsuite/c-c++-common/dfp/call-by-value.c
  4d71532298674e27bb29f74b9b081bb9  gcc/testsuite/c-c++-common/dfp/cast.c
  6de381732d2a2a650b9f507f67d47f69  gcc/testsuite/c-c++-common/dfp/compare-eq-const.c
--- 8999,9006 ----
  9f26ab0e1663587353727208a8b1fe9e  gcc/testsuite/c-c++-common/cpp/warning-zero-in-literals-1.c
  36dd0a2ab7ef169ecc90eb0e12535005  gcc/testsuite/c-c++-common/cpp/warning-zero-location-2.c
  f517ccd69d4612259fd415543074a1e1  gcc/testsuite/c-c++-common/cpp/warning-zero-location.c
! e0679adbe0d4b1cebebea8c808d31d66  gcc/testsuite/c-c++-common/cxxbitfields-3.c
! 8396e54be3fd4ced4b4e48c5c558f34f  gcc/testsuite/c-c++-common/cxxbitfields-6.c
  e48cf012715a725279208fd10940b8e2  gcc/testsuite/c-c++-common/dfp/call-by-value.c
  4d71532298674e27bb29f74b9b081bb9  gcc/testsuite/c-c++-common/dfp/cast.c
  6de381732d2a2a650b9f507f67d47f69  gcc/testsuite/c-c++-common/dfp/compare-eq-const.c
*************** b55d67c31827320a4218c9bfa118857d  gcc/te
*** 8838,8846 ****
  48d67f7f36d890f8419440d99f232731  gcc/testsuite/c-c++-common/dfp/usual-arith-conv-const.c
  c0e0d2f46bf19ec2b6f3291f97a1ac27  gcc/testsuite/c-c++-common/dfp/usual-arith-conv.c
  c61445e4f3f7abcd07bdc13453dab78f  gcc/testsuite/c-c++-common/diagnostic-format-json-1.c
! 102d279fe363eee425ec914ad3006ffe  gcc/testsuite/c-c++-common/diagnostic-format-json-2.c
! e9eac9b36d7e9c168ac2e8376e53bea7  gcc/testsuite/c-c++-common/diagnostic-format-json-3.c
! 074348b0888c3071fca0d5b264223823  gcc/testsuite/c-c++-common/diagnostic-format-json-4.c
  8b9be60b2836ff3affa36f7dafd186cf  gcc/testsuite/c-c++-common/diagnostic-format-json-5.c
  d5d9e4636806cc2c21ba5269905d360d  gcc/testsuite/c-c++-common/dump-ada-spec-1.c
  4e1eb848dd5329ff9c951118474783d5  gcc/testsuite/c-c++-common/dump-ada-spec-10.c
--- 9086,9094 ----
  48d67f7f36d890f8419440d99f232731  gcc/testsuite/c-c++-common/dfp/usual-arith-conv-const.c
  c0e0d2f46bf19ec2b6f3291f97a1ac27  gcc/testsuite/c-c++-common/dfp/usual-arith-conv.c
  c61445e4f3f7abcd07bdc13453dab78f  gcc/testsuite/c-c++-common/diagnostic-format-json-1.c
! 57848ca2604428b467faa3fe84a6f322  gcc/testsuite/c-c++-common/diagnostic-format-json-2.c
! 7aa8d52d5b2a4b1c6822e6dec65911fc  gcc/testsuite/c-c++-common/diagnostic-format-json-3.c
! b1d771b9d7217e823e590c2decdf1b7c  gcc/testsuite/c-c++-common/diagnostic-format-json-4.c
  8b9be60b2836ff3affa36f7dafd186cf  gcc/testsuite/c-c++-common/diagnostic-format-json-5.c
  d5d9e4636806cc2c21ba5269905d360d  gcc/testsuite/c-c++-common/dump-ada-spec-1.c
  4e1eb848dd5329ff9c951118474783d5  gcc/testsuite/c-c++-common/dump-ada-spec-10.c
*************** d5d9e4636806cc2c21ba5269905d360d  gcc/te
*** 8848,8853 ****
--- 9096,9102 ----
  8827eb74f0cafa02e7ac44673f062550  gcc/testsuite/c-c++-common/dump-ada-spec-12.c
  1ed2cdeec0479de57049ec71f84e59ad  gcc/testsuite/c-c++-common/dump-ada-spec-13.c
  605445bdc11b6eea029486c30b6c2887  gcc/testsuite/c-c++-common/dump-ada-spec-14.c
+ 7ac1a7c49ffa6c0f99b0152427b088a0  gcc/testsuite/c-c++-common/dump-ada-spec-15.c
  b7ca570ac280601076a28194f31ba77a  gcc/testsuite/c-c++-common/dump-ada-spec-2.c
  ec450dea19e4d8bdd513fcf03b8610a9  gcc/testsuite/c-c++-common/dump-ada-spec-3.c
  1b20a222264c2ed9a3f7ea7fa6848b21  gcc/testsuite/c-c++-common/dump-ada-spec-4.c
*************** a485c2cf2b8fb5018ff6ffa1d09b0291  gcc/te
*** 8877,8884 ****
  9b3df6f3fe1425a3c20ed01eae079f75  gcc/testsuite/c-c++-common/fold-masked-cmp-3.c
  1d12f3305ca06a823562f0fccea56f16  gcc/testsuite/c-c++-common/goacc-gomp/nesting-1.c
  25018148b12e7e9ba0bb52c882a3c39b  gcc/testsuite/c-c++-common/goacc-gomp/nesting-fail-1.c
  318406ae2dc40af036abc40c46d96836  gcc/testsuite/c-c++-common/goacc/Wparentheses-1.c
! 0f4a8c3af40625949799a00ac8ebafb7  gcc/testsuite/c-c++-common/goacc/acc-icf.c
  78e3e76e0e3ddc0a7c614fe954c64e81  gcc/testsuite/c-c++-common/goacc/asyncwait-1.c
  d426111516a83fc5f035da114398322c  gcc/testsuite/c-c++-common/goacc/asyncwait-5.c
  063beec82d4803f5428815adff355071  gcc/testsuite/c-c++-common/goacc/builtin-goacc-parlevel-id-size-2.c
--- 9126,9134 ----
  9b3df6f3fe1425a3c20ed01eae079f75  gcc/testsuite/c-c++-common/fold-masked-cmp-3.c
  1d12f3305ca06a823562f0fccea56f16  gcc/testsuite/c-c++-common/goacc-gomp/nesting-1.c
  25018148b12e7e9ba0bb52c882a3c39b  gcc/testsuite/c-c++-common/goacc-gomp/nesting-fail-1.c
+ 0c724489142a5ed4513ada6ff6ebaea9  gcc/testsuite/c-c++-common/goacc-gomp/pr93465-1.c
  318406ae2dc40af036abc40c46d96836  gcc/testsuite/c-c++-common/goacc/Wparentheses-1.c
! 06b0d3f7a3b04e4b89feaac74e124f6e  gcc/testsuite/c-c++-common/goacc/acc-icf.c
  78e3e76e0e3ddc0a7c614fe954c64e81  gcc/testsuite/c-c++-common/goacc/asyncwait-1.c
  d426111516a83fc5f035da114398322c  gcc/testsuite/c-c++-common/goacc/asyncwait-5.c
  063beec82d4803f5428815adff355071  gcc/testsuite/c-c++-common/goacc/builtin-goacc-parlevel-id-size-2.c
*************** f2b008762a25069d1c4d34ad85325ccc  gcc/te
*** 8888,8894 ****
  069b96601ec3dbb953900d35acabe0b6  gcc/testsuite/c-c++-common/goacc/classify-kernels-unparallelized.c
  47a7c99ae34f4da1883673ac8d09df16  gcc/testsuite/c-c++-common/goacc/classify-kernels.c
  4489f5541298c8caa17c3537203b9767  gcc/testsuite/c-c++-common/goacc/classify-parallel.c
! 22224fc6b5284abce5bc5d292d1d7f18  gcc/testsuite/c-c++-common/goacc/classify-routine.c
  ed0df84115a0f8b333602804bdee2a95  gcc/testsuite/c-c++-common/goacc/clauses-fail.c
  8bfd01f209498815723e71000488572c  gcc/testsuite/c-c++-common/goacc/collapse-1.c
  ca2517a3cc3cd3ae7a63df0a68ad4598  gcc/testsuite/c-c++-common/goacc/combined-directives-2.c
--- 9138,9145 ----
  069b96601ec3dbb953900d35acabe0b6  gcc/testsuite/c-c++-common/goacc/classify-kernels-unparallelized.c
  47a7c99ae34f4da1883673ac8d09df16  gcc/testsuite/c-c++-common/goacc/classify-kernels.c
  4489f5541298c8caa17c3537203b9767  gcc/testsuite/c-c++-common/goacc/classify-parallel.c
! d99c4bf7d10ae08e76de310ac61ac639  gcc/testsuite/c-c++-common/goacc/classify-routine.c
! f88fdac3d2797d27986e0273ba4fa3f0  gcc/testsuite/c-c++-common/goacc/clause-locations.c
  ed0df84115a0f8b333602804bdee2a95  gcc/testsuite/c-c++-common/goacc/clauses-fail.c
  8bfd01f209498815723e71000488572c  gcc/testsuite/c-c++-common/goacc/collapse-1.c
  ca2517a3cc3cd3ae7a63df0a68ad4598  gcc/testsuite/c-c++-common/goacc/combined-directives-2.c
*************** c68fccfb3ff8b00b01d51396677c6d59  gcc/te
*** 8898,8905 ****
  6ff2b7486e948a4634adb071ea7906c0  gcc/testsuite/c-c++-common/goacc/data-1.c
  3723e03d13b0b843a30211fff8a058f5  gcc/testsuite/c-c++-common/goacc/data-2.c
  84f08e112686de908716edd944c7dc5b  gcc/testsuite/c-c++-common/goacc/data-clause-duplicate-1.c
! d303b8f37d15e5cf9e3a59b34f6f88c5  gcc/testsuite/c-c++-common/goacc/declare-1.c
! 02105a038f30c2a84779902e85cdcf50  gcc/testsuite/c-c++-common/goacc/declare-2.c
  17b63246fd51599bad2716165cbcff0d  gcc/testsuite/c-c++-common/goacc/default-1.c
  8e4b3f87057e886c28e0ca3244adec22  gcc/testsuite/c-c++-common/goacc/default-2.c
  7d7b279607b90403d1fc926ab594dc28  gcc/testsuite/c-c++-common/goacc/default-3.c
--- 9149,9159 ----
  6ff2b7486e948a4634adb071ea7906c0  gcc/testsuite/c-c++-common/goacc/data-1.c
  3723e03d13b0b843a30211fff8a058f5  gcc/testsuite/c-c++-common/goacc/data-2.c
  84f08e112686de908716edd944c7dc5b  gcc/testsuite/c-c++-common/goacc/data-clause-duplicate-1.c
! 9002f93f9316611a4bf82150a101d933  gcc/testsuite/c-c++-common/goacc/declare-1.c
! 49a1e1e29de03de0f3ad515f0e13524f  gcc/testsuite/c-c++-common/goacc/declare-2.c
! 0560ac2e807203ffc51c8c17edd4abd6  gcc/testsuite/c-c++-common/goacc/declare-pr90861.c
! 229bed5ef7072db0fa428c10c115e33d  gcc/testsuite/c-c++-common/goacc/declare-pr94120.c
! d8469e069b8c26c06d8a2d2aab67a981  gcc/testsuite/c-c++-common/goacc/deep-copy-arrayofstruct.c
  17b63246fd51599bad2716165cbcff0d  gcc/testsuite/c-c++-common/goacc/default-1.c
  8e4b3f87057e886c28e0ca3244adec22  gcc/testsuite/c-c++-common/goacc/default-2.c
  7d7b279607b90403d1fc926ab594dc28  gcc/testsuite/c-c++-common/goacc/default-3.c
*************** d6dca572326bd0b24e648f6d079d7dfa  gcc/te
*** 8910,8917 ****
  b2061cbe48e6c36be03418229b1e6c1c  gcc/testsuite/c-c++-common/goacc/deviceptr-3.c
  21cc12eefbed69c28189deb30ef6ecff  gcc/testsuite/c-c++-common/goacc/deviceptr-4.c
  6645aa455bee82b9f65beedd82a8f916  gcc/testsuite/c-c++-common/goacc/executeables-1.c
! 4ca7778182ca59cc898b6561ec22be62  gcc/testsuite/c-c++-common/goacc/finalize-1.c
! 14f1d49aa2ebd030b7b411a4d94e4f5e  gcc/testsuite/c-c++-common/goacc/host_data-1.c
  d77fd6ebff8fb0a959f82a4fb9de022e  gcc/testsuite/c-c++-common/goacc/host_data-2.c
  f5740839231c8e8304cea75d03b7fb0b  gcc/testsuite/c-c++-common/goacc/if-clause-1.c
  da99712686fe793685ab6055e56491ed  gcc/testsuite/c-c++-common/goacc/if-clause-2.c
--- 9164,9172 ----
  b2061cbe48e6c36be03418229b1e6c1c  gcc/testsuite/c-c++-common/goacc/deviceptr-3.c
  21cc12eefbed69c28189deb30ef6ecff  gcc/testsuite/c-c++-common/goacc/deviceptr-4.c
  6645aa455bee82b9f65beedd82a8f916  gcc/testsuite/c-c++-common/goacc/executeables-1.c
! 8b05591aaa9488a181b4907b5258b082  gcc/testsuite/c-c++-common/goacc/finalize-1.c
! ee2c56a8648c3d2971c138604ce265a2  gcc/testsuite/c-c++-common/goacc/firstprivate-mappings-1.c
! c7a7080eb3718456e352647005144afe  gcc/testsuite/c-c++-common/goacc/host_data-1.c
  d77fd6ebff8fb0a959f82a4fb9de022e  gcc/testsuite/c-c++-common/goacc/host_data-2.c
  f5740839231c8e8304cea75d03b7fb0b  gcc/testsuite/c-c++-common/goacc/if-clause-1.c
  da99712686fe793685ab6055e56491ed  gcc/testsuite/c-c++-common/goacc/if-clause-2.c
*************** d8680bac58d645327339827aeb4d6670  gcc/te
*** 8958,8970 ****
  c6bb19f1b877604f532b3271637f15af  gcc/testsuite/c-c++-common/goacc/loop-clauses.c
  943121f9af2ecdb53cd96ba15a3c0258  gcc/testsuite/c-c++-common/goacc/loop-private-1.c
  c433ed40537345c26ace448f210a1463  gcc/testsuite/c-c++-common/goacc/loop-shape.c
  8670ca5eb3bccd05d00cc1698ea1ff01  gcc/testsuite/c-c++-common/goacc/nesting-1.c
  1bbc8c8f2872cd7f133d840900d4d0d1  gcc/testsuite/c-c++-common/goacc/nesting-data-1.c
  5edfd501d11a61e005f7ad74e86b8631  gcc/testsuite/c-c++-common/goacc/nesting-fail-1.c
  ec0de1bc2f55f65b60fe6cbda3d62957  gcc/testsuite/c-c++-common/goacc/note-parallelism.c
  8c7a33093e4b8a8b716fde5f62882b6a  gcc/testsuite/c-c++-common/goacc/parallel-1.c
  1994a28c1697281b5e4019f4e2bea2c8  gcc/testsuite/c-c++-common/goacc/parallel-dims-1.c
! ac7ad09e55c590bef58c1ff5ce565a72  gcc/testsuite/c-c++-common/goacc/parallel-dims-2.c
  3506964551b29d6bd0669597783ba177  gcc/testsuite/c-c++-common/goacc/parallel-reduction.c
  abf2f06821ef83fd68a177bc03b2f19d  gcc/testsuite/c-c++-common/goacc/pcopy.c
  24874d772e438b20ebcc2ae6aede4234  gcc/testsuite/c-c++-common/goacc/pcopyin.c
--- 9213,9229 ----
  c6bb19f1b877604f532b3271637f15af  gcc/testsuite/c-c++-common/goacc/loop-clauses.c
  943121f9af2ecdb53cd96ba15a3c0258  gcc/testsuite/c-c++-common/goacc/loop-private-1.c
  c433ed40537345c26ace448f210a1463  gcc/testsuite/c-c++-common/goacc/loop-shape.c
+ 5ef5dacaf48012f84913e1efd580ef6f  gcc/testsuite/c-c++-common/goacc/mdc-1.c
+ a1af888000974e530b8f236ccc5b10f9  gcc/testsuite/c-c++-common/goacc/mdc-2.c
+ c644835069ca62b0871e65dd11ac6116  gcc/testsuite/c-c++-common/goacc/nested-reductions-warn.c
+ 5dbe1c94c52777f2ba869d6a3ce7f449  gcc/testsuite/c-c++-common/goacc/nested-reductions.c
  8670ca5eb3bccd05d00cc1698ea1ff01  gcc/testsuite/c-c++-common/goacc/nesting-1.c
  1bbc8c8f2872cd7f133d840900d4d0d1  gcc/testsuite/c-c++-common/goacc/nesting-data-1.c
  5edfd501d11a61e005f7ad74e86b8631  gcc/testsuite/c-c++-common/goacc/nesting-fail-1.c
  ec0de1bc2f55f65b60fe6cbda3d62957  gcc/testsuite/c-c++-common/goacc/note-parallelism.c
  8c7a33093e4b8a8b716fde5f62882b6a  gcc/testsuite/c-c++-common/goacc/parallel-1.c
  1994a28c1697281b5e4019f4e2bea2c8  gcc/testsuite/c-c++-common/goacc/parallel-dims-1.c
! 72833bf83f290c33144334e2aaf10a57  gcc/testsuite/c-c++-common/goacc/parallel-dims-2.c
  3506964551b29d6bd0669597783ba177  gcc/testsuite/c-c++-common/goacc/parallel-reduction.c
  abf2f06821ef83fd68a177bc03b2f19d  gcc/testsuite/c-c++-common/goacc/pcopy.c
  24874d772e438b20ebcc2ae6aede4234  gcc/testsuite/c-c++-common/goacc/pcopyin.c
*************** e01bc16654eb70269f569e503d5a0905  gcc/te
*** 8975,8980 ****
--- 9234,9240 ----
  091ae7cbab8ef2ea646aa972e71bd3fe  gcc/testsuite/c-c++-common/goacc/pr79428-1.c
  d398b6a88925d39ad550f7a21e489047  gcc/testsuite/c-c++-common/goacc/pr84217.c
  f4e4c18e18f7861d92862c9c4423bf8f  gcc/testsuite/c-c++-common/goacc/pr85782.c
+ 61a570b9f391acfdfb9b0189424a74ee  gcc/testsuite/c-c++-common/goacc/pr93488.c
  77856d506d7addd81bc68f380358627f  gcc/testsuite/c-c++-common/goacc/pragma_context.c
  d76b8ed3ade6794cf7f243b5df9b41cb  gcc/testsuite/c-c++-common/goacc/present-1.c
  b9c9ccb2e2c82e5d460ac09e049ad1e2  gcc/testsuite/c-c++-common/goacc/private-reduction-1.c
*************** b9c9ccb2e2c82e5d460ac09e049ad1e2  gcc/te
*** 8986,8997 ****
  257a77aee12af0f943094c1039f93f8b  gcc/testsuite/c-c++-common/goacc/reduction-6.c
  56a2b01609c03c4779369ba70942e140  gcc/testsuite/c-c++-common/goacc/reduction-promotions.c
  31851b706d47bb66e2b8de98b7f8934c  gcc/testsuite/c-c++-common/goacc/routine-1.c
! 44e375e77afcb7cef15cc49bdc9479e8  gcc/testsuite/c-c++-common/goacc/routine-2.c
  b8fe6f4ef7484e937e55940896edeb2c  gcc/testsuite/c-c++-common/goacc/routine-3-extern.c
  91d2db0804978500ca4814a650d91c42  gcc/testsuite/c-c++-common/goacc/routine-3.c
  fe9c03ab5265c1d2f0f397b619dc939c  gcc/testsuite/c-c++-common/goacc/routine-4-extern.c
  979496d47bba4aa1b092f5023de8c229  gcc/testsuite/c-c++-common/goacc/routine-4.c
! dcee40ba28568f3ad302624ac23e8332  gcc/testsuite/c-c++-common/goacc/routine-5.c
  71ff1b7541d8c733624f242976e1b747  gcc/testsuite/c-c++-common/goacc/sb-1.c
  1dde0d0d526302b12c8c22cfe846ddc1  gcc/testsuite/c-c++-common/goacc/sb-2.c
  2e25fe0594ffb9e9a8f935be5d6e9cfa  gcc/testsuite/c-c++-common/goacc/sb-3.c
--- 9246,9259 ----
  257a77aee12af0f943094c1039f93f8b  gcc/testsuite/c-c++-common/goacc/reduction-6.c
  56a2b01609c03c4779369ba70942e140  gcc/testsuite/c-c++-common/goacc/reduction-promotions.c
  31851b706d47bb66e2b8de98b7f8934c  gcc/testsuite/c-c++-common/goacc/routine-1.c
! 66d1c557f3ebfa20b746e35c99769fb4  gcc/testsuite/c-c++-common/goacc/routine-2.c
  b8fe6f4ef7484e937e55940896edeb2c  gcc/testsuite/c-c++-common/goacc/routine-3-extern.c
  91d2db0804978500ca4814a650d91c42  gcc/testsuite/c-c++-common/goacc/routine-3.c
  fe9c03ab5265c1d2f0f397b619dc939c  gcc/testsuite/c-c++-common/goacc/routine-4-extern.c
  979496d47bba4aa1b092f5023de8c229  gcc/testsuite/c-c++-common/goacc/routine-4.c
! 4058dedd0ce4bf12abaa52a2eb5deb92  gcc/testsuite/c-c++-common/goacc/routine-5.c
! 5dae5250504c76cc05365cbb5d9a592e  gcc/testsuite/c-c++-common/goacc/routine-level-of-parallelism-1.c
! b0bf71cce5ee03e8c5cc8266b46bfe0a  gcc/testsuite/c-c++-common/goacc/routine-level-of-parallelism-2.c
  71ff1b7541d8c733624f242976e1b747  gcc/testsuite/c-c++-common/goacc/sb-1.c
  1dde0d0d526302b12c8c22cfe846ddc1  gcc/testsuite/c-c++-common/goacc/sb-2.c
  2e25fe0594ffb9e9a8f935be5d6e9cfa  gcc/testsuite/c-c++-common/goacc/sb-3.c
*************** d8d78230b698b1427515ae7b473eaf5f  gcc/te
*** 9009,9015 ****
  63761edcc60694bb3443638fd038e6de  gcc/testsuite/c-c++-common/gomp/Wparentheses-2.c
  87caf85546707f566688fc6b60a4d1e9  gcc/testsuite/c-c++-common/gomp/Wparentheses-3.c
  f2eeacd8e01fce5f98daff2393115250  gcc/testsuite/c-c++-common/gomp/Wparentheses-4.c
! 450622eac3970da63e43723374af5da7  gcc/testsuite/c-c++-common/gomp/atomic-1.c
  ca9adc82afaa4bfe9afab3d0c83d5427  gcc/testsuite/c-c++-common/gomp/atomic-10.c
  95e1c98e0d2d1d928153976ab5e8cb8f  gcc/testsuite/c-c++-common/gomp/atomic-12.c
  9234fa00d24e1c055ac2a9759e31f513  gcc/testsuite/c-c++-common/gomp/atomic-13.c
--- 9271,9277 ----
  63761edcc60694bb3443638fd038e6de  gcc/testsuite/c-c++-common/gomp/Wparentheses-2.c
  87caf85546707f566688fc6b60a4d1e9  gcc/testsuite/c-c++-common/gomp/Wparentheses-3.c
  f2eeacd8e01fce5f98daff2393115250  gcc/testsuite/c-c++-common/gomp/Wparentheses-4.c
! 594f9585c33418a75a6d249f9f52a31b  gcc/testsuite/c-c++-common/gomp/atomic-1.c
  ca9adc82afaa4bfe9afab3d0c83d5427  gcc/testsuite/c-c++-common/gomp/atomic-10.c
  95e1c98e0d2d1d928153976ab5e8cb8f  gcc/testsuite/c-c++-common/gomp/atomic-12.c
  9234fa00d24e1c055ac2a9759e31f513  gcc/testsuite/c-c++-common/gomp/atomic-13.c
*************** ea35c8898a66194ddfd4052e95c9b78c  gcc/te
*** 9018,9037 ****
  0129f6c1e124f845d12d0e1105a1272a  gcc/testsuite/c-c++-common/gomp/atomic-16.c
  1e7cf6b2e527531bfe1930fd346929f6  gcc/testsuite/c-c++-common/gomp/atomic-17.c
  9ad3042446baebcc43e5235b00f9ac92  gcc/testsuite/c-c++-common/gomp/atomic-18.c
! 4387a1f9e3a39f3f0a490f7b5f0a1d5a  gcc/testsuite/c-c++-common/gomp/atomic-19.c
  02a1665574401bc7491c754880894569  gcc/testsuite/c-c++-common/gomp/atomic-2.c
! 82eb40f0e012879cfa5b920f71094a7a  gcc/testsuite/c-c++-common/gomp/atomic-20.c
! 5ed7973dc3a5e4c73b9ae29adadeec1d  gcc/testsuite/c-c++-common/gomp/atomic-21.c
! 9ada7ca5fe7f15b28036d683d2029c20  gcc/testsuite/c-c++-common/gomp/atomic-22.c
  8a1c4fd345dd7757c147e2ee391cd6ed  gcc/testsuite/c-c++-common/gomp/atomic-23.c
  ef84be84eed7be26fd4aef69eb50de83  gcc/testsuite/c-c++-common/gomp/atomic-3.c
  b2ce89f1ba635f8d6701308583cd4759  gcc/testsuite/c-c++-common/gomp/atomic-4.c
  338ba582f00391fbbba5113c8a1bb792  gcc/testsuite/c-c++-common/gomp/atomic-7.c
  99033a31ad0844a80bb561d39f21bc2c  gcc/testsuite/c-c++-common/gomp/atomic-8.c
! a6583e4cf6c5bb3b1a46172a0635d197  gcc/testsuite/c-c++-common/gomp/atomic-9.c
! f8fae4282ff0e48926f701561453f07e  gcc/testsuite/c-c++-common/gomp/cancel-1.c
  192802715f9a6395e2ccf6ce992c4fee  gcc/testsuite/c-c++-common/gomp/cancel-2.c
! 84d156374cb201e3db7e2fce998b8c07  gcc/testsuite/c-c++-common/gomp/clauses-1.c
  dacaf1dba8b8934a8347980fb0ce8a45  gcc/testsuite/c-c++-common/gomp/clauses-2.c
  657094047e2432f3bc3c5cafde1eafcd  gcc/testsuite/c-c++-common/gomp/clauses-3.c
  8d9ef02ce9840a58a8c64026e4df30b2  gcc/testsuite/c-c++-common/gomp/clauses-4.c
--- 9280,9300 ----
  0129f6c1e124f845d12d0e1105a1272a  gcc/testsuite/c-c++-common/gomp/atomic-16.c
  1e7cf6b2e527531bfe1930fd346929f6  gcc/testsuite/c-c++-common/gomp/atomic-17.c
  9ad3042446baebcc43e5235b00f9ac92  gcc/testsuite/c-c++-common/gomp/atomic-18.c
! 1e5d679fc3a0742dc00c356cc6f0524c  gcc/testsuite/c-c++-common/gomp/atomic-19.c
  02a1665574401bc7491c754880894569  gcc/testsuite/c-c++-common/gomp/atomic-2.c
! ef6fbf40bb979e66ae3eedd17f4baaa5  gcc/testsuite/c-c++-common/gomp/atomic-20.c
! 2270bdc798a328bef75686971339d262  gcc/testsuite/c-c++-common/gomp/atomic-21.c
! 3bf74d2ed758caccfaf364279bbb7626  gcc/testsuite/c-c++-common/gomp/atomic-22.c
  8a1c4fd345dd7757c147e2ee391cd6ed  gcc/testsuite/c-c++-common/gomp/atomic-23.c
  ef84be84eed7be26fd4aef69eb50de83  gcc/testsuite/c-c++-common/gomp/atomic-3.c
  b2ce89f1ba635f8d6701308583cd4759  gcc/testsuite/c-c++-common/gomp/atomic-4.c
  338ba582f00391fbbba5113c8a1bb792  gcc/testsuite/c-c++-common/gomp/atomic-7.c
  99033a31ad0844a80bb561d39f21bc2c  gcc/testsuite/c-c++-common/gomp/atomic-8.c
! 3cc6adb13ca30af2db982d07306a24d7  gcc/testsuite/c-c++-common/gomp/atomic-9.c
! 45c8c473f031ba94eb1154ab4f79b457  gcc/testsuite/c-c++-common/gomp/cancel-1.c
  192802715f9a6395e2ccf6ce992c4fee  gcc/testsuite/c-c++-common/gomp/cancel-2.c
! 22b424a04e803213ee1d9b44ee71dfdd  gcc/testsuite/c-c++-common/gomp/clause-dups-1.c
! ebe8429c37f6fa2e045dd0eb77355133  gcc/testsuite/c-c++-common/gomp/clauses-1.c
  dacaf1dba8b8934a8347980fb0ce8a45  gcc/testsuite/c-c++-common/gomp/clauses-2.c
  657094047e2432f3bc3c5cafde1eafcd  gcc/testsuite/c-c++-common/gomp/clauses-3.c
  8d9ef02ce9840a58a8c64026e4df30b2  gcc/testsuite/c-c++-common/gomp/clauses-4.c
*************** b5dcc71908364b350a7c979c2633f7fb  gcc/te
*** 9042,9049 ****
  bfb7ec61cc1300767edd2730dd158b24  gcc/testsuite/c-c++-common/gomp/critical-1.c
  c572ac0bc0904c15b451df6870cc393d  gcc/testsuite/c-c++-common/gomp/critical-2.c
  5f6c97b6403ccadad05f9eb1bf43588e  gcc/testsuite/c-c++-common/gomp/declare-target-1.c
! 8a9e05600cd5512c57c6a5d42c2d1996  gcc/testsuite/c-c++-common/gomp/declare-target-2.c
  a21180b58525f6feec0df94eb7749cdc  gcc/testsuite/c-c++-common/gomp/declare-target-3.c
  5c3aa6169a1b08a0610a7d8c42ae8536  gcc/testsuite/c-c++-common/gomp/default-1.c
  210213fef63c2c9f7b4d77ee3540dfd2  gcc/testsuite/c-c++-common/gomp/defaultmap-1.c
  cfe9ce2bee6dfde91d715b2c34a5a896  gcc/testsuite/c-c++-common/gomp/defaultmap-2.c
--- 9305,9327 ----
  bfb7ec61cc1300767edd2730dd158b24  gcc/testsuite/c-c++-common/gomp/critical-1.c
  c572ac0bc0904c15b451df6870cc393d  gcc/testsuite/c-c++-common/gomp/critical-2.c
  5f6c97b6403ccadad05f9eb1bf43588e  gcc/testsuite/c-c++-common/gomp/declare-target-1.c
! 011908dbc654415146f6b075c979b877  gcc/testsuite/c-c++-common/gomp/declare-target-2.c
  a21180b58525f6feec0df94eb7749cdc  gcc/testsuite/c-c++-common/gomp/declare-target-3.c
+ d10729d6cc377a4d618b04058f34092a  gcc/testsuite/c-c++-common/gomp/declare-target-4.c
+ bd8b4a8c817f542091fc2d7fded4917a  gcc/testsuite/c-c++-common/gomp/declare-target-5.c
+ 432250dcf3d9afc1090b630b510db1b8  gcc/testsuite/c-c++-common/gomp/declare-variant-1.c
+ 7f5d7596767c4d11ea513a12caaa9677  gcc/testsuite/c-c++-common/gomp/declare-variant-10.c
+ 51e43bef12ddebee2151356a6379e207  gcc/testsuite/c-c++-common/gomp/declare-variant-11.c
+ a5afca905d34b587b6fd9cf5feeb7b84  gcc/testsuite/c-c++-common/gomp/declare-variant-12.c
+ 75564d16588312df035165e1f86306ff  gcc/testsuite/c-c++-common/gomp/declare-variant-13.c
+ 8d01699da719427efa576f7174290b30  gcc/testsuite/c-c++-common/gomp/declare-variant-2.c
+ 94f924cd613b79f5f8ab07c38cc88b01  gcc/testsuite/c-c++-common/gomp/declare-variant-3.c
+ 65b510d9e426dc2a3b6896eb93dd8335  gcc/testsuite/c-c++-common/gomp/declare-variant-4.c
+ ee52d5fc3f8423c9720ccca8a58180a2  gcc/testsuite/c-c++-common/gomp/declare-variant-5.c
+ 31ff49ea5267f602dfb4b11b7b086584  gcc/testsuite/c-c++-common/gomp/declare-variant-6.c
+ d029e5eb6faefe6ca785e1b9e12615d3  gcc/testsuite/c-c++-common/gomp/declare-variant-7.c
+ ec57ddf60230099a4e71566afe991826  gcc/testsuite/c-c++-common/gomp/declare-variant-8.c
+ 97b1f9bfd5c062c5e04176f9ca2486bd  gcc/testsuite/c-c++-common/gomp/declare-variant-9.c
  5c3aa6169a1b08a0610a7d8c42ae8536  gcc/testsuite/c-c++-common/gomp/default-1.c
  210213fef63c2c9f7b4d77ee3540dfd2  gcc/testsuite/c-c++-common/gomp/defaultmap-1.c
  cfe9ce2bee6dfde91d715b2c34a5a896  gcc/testsuite/c-c++-common/gomp/defaultmap-2.c
*************** f65cd3e2b7713964176e994c1aab473e  gcc/te
*** 9054,9060 ****
  685c37a890fe3f63baeef038dca54d42  gcc/testsuite/c-c++-common/gomp/depend-4.c
  90e9e15dcfe2bb1bc2d07cc4f05b3bb5  gcc/testsuite/c-c++-common/gomp/depend-5.c
  96ee24acfb0236cf20bc30472bd80148  gcc/testsuite/c-c++-common/gomp/depend-6.c
! 306470decfd1de04b77936371069b02d  gcc/testsuite/c-c++-common/gomp/depend-iterator-1.c
  f6ebc71161cbbf685aa218b4a86497d4  gcc/testsuite/c-c++-common/gomp/depend-iterator-2.c
  a4e597074c9ce25ed2b94adda52102d5  gcc/testsuite/c-c++-common/gomp/depobj-1.c
  389475c8477c859e20aa20be1676dbd0  gcc/testsuite/c-c++-common/gomp/distribute-1.c
--- 9332,9338 ----
  685c37a890fe3f63baeef038dca54d42  gcc/testsuite/c-c++-common/gomp/depend-4.c
  90e9e15dcfe2bb1bc2d07cc4f05b3bb5  gcc/testsuite/c-c++-common/gomp/depend-5.c
  96ee24acfb0236cf20bc30472bd80148  gcc/testsuite/c-c++-common/gomp/depend-6.c
! 4a7e69295838b1320de92a6b5208a196  gcc/testsuite/c-c++-common/gomp/depend-iterator-1.c
  f6ebc71161cbbf685aa218b4a86497d4  gcc/testsuite/c-c++-common/gomp/depend-iterator-2.c
  a4e597074c9ce25ed2b94adda52102d5  gcc/testsuite/c-c++-common/gomp/depobj-1.c
  389475c8477c859e20aa20be1676dbd0  gcc/testsuite/c-c++-common/gomp/distribute-1.c
*************** b9f70a44108d3410396c88c5623b3919  gcc/te
*** 9074,9085 ****
  52e6c91a76e14e06cc40b81b362ebe34  gcc/testsuite/c-c++-common/gomp/gridify-1.c
  c24725037d3fce70e48f0d8904037cee  gcc/testsuite/c-c++-common/gomp/gridify-2.c
  c7544ae76b33ed7babf0c27bf94d0136  gcc/testsuite/c-c++-common/gomp/gridify-3.c
  23583f36afaee374633de54a6b57a3e6  gcc/testsuite/c-c++-common/gomp/if-1.c
  1a907f0d46c82ea2b68fa098d75a6865  gcc/testsuite/c-c++-common/gomp/if-2.c
  71d3b22e0e174e813b323afe92d6f310  gcc/testsuite/c-c++-common/gomp/if-3.c
  2247fde132c8bd3e6a2897e3580872aa  gcc/testsuite/c-c++-common/gomp/lastprivate-conditional-1.c
! f6d300325ea5c613df90da681d245af3  gcc/testsuite/c-c++-common/gomp/lastprivate-conditional-2.c
  2e0840d181813aec1108fbd34f344fea  gcc/testsuite/c-c++-common/gomp/linear-1.c
  eec3d37cfef017c19ee5872ce45df774  gcc/testsuite/c-c++-common/gomp/map-1.c
  fae5bed04e9aad1c7be88f67ac4b8ec9  gcc/testsuite/c-c++-common/gomp/map-2.c
  84b32011b7cc61bdab96dc5182d6fa16  gcc/testsuite/c-c++-common/gomp/map-3.c
--- 9352,9373 ----
  52e6c91a76e14e06cc40b81b362ebe34  gcc/testsuite/c-c++-common/gomp/gridify-1.c
  c24725037d3fce70e48f0d8904037cee  gcc/testsuite/c-c++-common/gomp/gridify-2.c
  c7544ae76b33ed7babf0c27bf94d0136  gcc/testsuite/c-c++-common/gomp/gridify-3.c
+ 1216c6524ff3a9bfcf178bb37b9b3961  gcc/testsuite/c-c++-common/gomp/has-include-1.c
  23583f36afaee374633de54a6b57a3e6  gcc/testsuite/c-c++-common/gomp/if-1.c
  1a907f0d46c82ea2b68fa098d75a6865  gcc/testsuite/c-c++-common/gomp/if-2.c
  71d3b22e0e174e813b323afe92d6f310  gcc/testsuite/c-c++-common/gomp/if-3.c
+ 5281fe81b3f419fc33159d07429ef65b  gcc/testsuite/c-c++-common/gomp/if-4.c
  2247fde132c8bd3e6a2897e3580872aa  gcc/testsuite/c-c++-common/gomp/lastprivate-conditional-1.c
! 7a41e9c11639ccee3155f9ff2b1bc60d  gcc/testsuite/c-c++-common/gomp/lastprivate-conditional-2.c
! 61a5cf3348b2df91e9c5c6dda0024e27  gcc/testsuite/c-c++-common/gomp/lastprivate-conditional-3.c
! d173a4359da95b48c8d051a752a820ad  gcc/testsuite/c-c++-common/gomp/lastprivate-conditional-4.c
! 94c1c42c60585a077f568d5bea528077  gcc/testsuite/c-c++-common/gomp/lastprivate-conditional-5.c
  2e0840d181813aec1108fbd34f344fea  gcc/testsuite/c-c++-common/gomp/linear-1.c
+ 8ad9b1765201c7061303ff4364b00be3  gcc/testsuite/c-c++-common/gomp/loop-1.c
+ 98a2a47c678a83b550ad02b4645cb7b0  gcc/testsuite/c-c++-common/gomp/loop-2.c
+ 9592f2cca3c5fd7c0e8fd9da7cb178d1  gcc/testsuite/c-c++-common/gomp/loop-3.c
+ 96f80819d26df95994ad31e806db9ad9  gcc/testsuite/c-c++-common/gomp/loop-4.c
+ f57f51983db80a2fd1be027e87767d44  gcc/testsuite/c-c++-common/gomp/loop-5.c
  eec3d37cfef017c19ee5872ce45df774  gcc/testsuite/c-c++-common/gomp/map-1.c
  fae5bed04e9aad1c7be88f67ac4b8ec9  gcc/testsuite/c-c++-common/gomp/map-2.c
  84b32011b7cc61bdab96dc5182d6fa16  gcc/testsuite/c-c++-common/gomp/map-3.c
*************** fae5bed04e9aad1c7be88f67ac4b8ec9  gcc/te
*** 9090,9095 ****
--- 9378,9387 ----
  406abd50996addc0929156835a0b5686  gcc/testsuite/c-c++-common/gomp/nesting-warn-1.c
  ce3fb89f1513613421cc620156235d68  gcc/testsuite/c-c++-common/gomp/nontemporal-1.c
  22a3481e8c3df4f0596de8f67dab0a59  gcc/testsuite/c-c++-common/gomp/nontemporal-2.c
+ 16f6f2aa3b13e584355ef5103361c8dd  gcc/testsuite/c-c++-common/gomp/order-1.c
+ fd9490b39935ee32a52e7d5b5bed20d0  gcc/testsuite/c-c++-common/gomp/order-2.c
+ db900e16f622568df37b1e202fd25b9f  gcc/testsuite/c-c++-common/gomp/order-3.c
+ 45e1a414c7fd275bfb69b8395e7bf291  gcc/testsuite/c-c++-common/gomp/order-4.c
  346e1047ae41de5d851736fb41185adb  gcc/testsuite/c-c++-common/gomp/ordered-1.c
  ef86bb29dfbea0543e8ca02ce440c823  gcc/testsuite/c-c++-common/gomp/ordered-2.c
  c8eb196146424dae7866984b548de18b  gcc/testsuite/c-c++-common/gomp/ordered-3.c
*************** e083342c345fbf82eb1bd2fc11805647  gcc/te
*** 9153,9158 ****
--- 9445,9451 ----
  819ef14711cd571111df09cc81f8d206  gcc/testsuite/c-c++-common/gomp/pr91401-1.c
  b5b3167776d67985ba91daaee41243de  gcc/testsuite/c-c++-common/gomp/pr91401-2.c
  e4152974615471671fa0299b4121889f  gcc/testsuite/c-c++-common/gomp/pr91920.c
+ c47f7acdcdd1614c035f4f07306fc305  gcc/testsuite/c-c++-common/gomp/pr91987.c
  bfdfa56ffe2ff48534494fc41ae0f4d1  gcc/testsuite/c-c++-common/gomp/pr93555-1.c
  b31fd83ffcebdfef84e1d323888e9a76  gcc/testsuite/c-c++-common/gomp/pr93555-2.c
  5d522e2f1f7455bc45f6c1f230d5a5b0  gcc/testsuite/c-c++-common/gomp/priority-1.c
*************** b31fd83ffcebdfef84e1d323888e9a76  gcc/te
*** 9160,9173 ****
  857f55ab743945a521e3287d1b905b4b  gcc/testsuite/c-c++-common/gomp/reduction-task-1.c
  040477a98707a5ccf3fe66c561644189  gcc/testsuite/c-c++-common/gomp/reduction-task-2.c
  6bfb4e8e6e1307990ff6a4535855f6b7  gcc/testsuite/c-c++-common/gomp/reduction-task-3.c
! a677ced15167345536932576278b9fa6  gcc/testsuite/c-c++-common/gomp/requires-1.c
! 1da64247e9c80b88109924d4ddfab713  gcc/testsuite/c-c++-common/gomp/requires-2.c
  b69afb2466e8b2efa22ee4a458ff3bc2  gcc/testsuite/c-c++-common/gomp/requires-3.c
! f31d71fe976bead81e0806575e65f64f  gcc/testsuite/c-c++-common/gomp/requires-4.c
  8af1ef16f27f56d5d687ed958b671d57  gcc/testsuite/c-c++-common/gomp/schedule-1.c
  22fba04602b98c0a4fd88b5b47d5ffee  gcc/testsuite/c-c++-common/gomp/schedule-modifiers-1.c
  0ec2e2f575568924dc191f53badc3e5d  gcc/testsuite/c-c++-common/gomp/schedule-simd-1.c
  328147f679f9eac26be960bf85acb2e8  gcc/testsuite/c-c++-common/gomp/sections1.c
  c7cb982e272572b3d42948b23c3c6229  gcc/testsuite/c-c++-common/gomp/simd1.c
  3ffb158d7db65691583ca6ff7330457a  gcc/testsuite/c-c++-common/gomp/simd2.c
  117ad281591bd59a2efbf98a38c512cc  gcc/testsuite/c-c++-common/gomp/simd3.c
--- 9453,9472 ----
  857f55ab743945a521e3287d1b905b4b  gcc/testsuite/c-c++-common/gomp/reduction-task-1.c
  040477a98707a5ccf3fe66c561644189  gcc/testsuite/c-c++-common/gomp/reduction-task-2.c
  6bfb4e8e6e1307990ff6a4535855f6b7  gcc/testsuite/c-c++-common/gomp/reduction-task-3.c
! 510098e898a0bf706702fa24a48e71ac  gcc/testsuite/c-c++-common/gomp/requires-1.c
! 402906410edb43bb1d0515698684f3a6  gcc/testsuite/c-c++-common/gomp/requires-2.c
  b69afb2466e8b2efa22ee4a458ff3bc2  gcc/testsuite/c-c++-common/gomp/requires-3.c
! 7737b0ae3793f150650db4af4fdfa22d  gcc/testsuite/c-c++-common/gomp/requires-4.c
! 98d49db0122233c9a1c869817a9b3df8  gcc/testsuite/c-c++-common/gomp/scan-1.c
! 3fb5b28574137ba1aa754466a8ea9a57  gcc/testsuite/c-c++-common/gomp/scan-2.c
! 9f76c491a629f3bbd470f28c269ef485  gcc/testsuite/c-c++-common/gomp/scan-3.c
! 640bcd6f5cf5af442783c7dc5ad52d3b  gcc/testsuite/c-c++-common/gomp/scan-4.c
! e413f648ce33386781b2b3e3e93cb96b  gcc/testsuite/c-c++-common/gomp/scan-5.c
  8af1ef16f27f56d5d687ed958b671d57  gcc/testsuite/c-c++-common/gomp/schedule-1.c
  22fba04602b98c0a4fd88b5b47d5ffee  gcc/testsuite/c-c++-common/gomp/schedule-modifiers-1.c
  0ec2e2f575568924dc191f53badc3e5d  gcc/testsuite/c-c++-common/gomp/schedule-simd-1.c
  328147f679f9eac26be960bf85acb2e8  gcc/testsuite/c-c++-common/gomp/sections1.c
+ a51768554ba67aa659d21bbab17ca919  gcc/testsuite/c-c++-common/gomp/simd-setjmp-1.c
  c7cb982e272572b3d42948b23c3c6229  gcc/testsuite/c-c++-common/gomp/simd1.c
  3ffb158d7db65691583ca6ff7330457a  gcc/testsuite/c-c++-common/gomp/simd2.c
  117ad281591bd59a2efbf98a38c512cc  gcc/testsuite/c-c++-common/gomp/simd3.c
*************** cbcc4bef361026a7cc530337842d4576  gcc/te
*** 9181,9193 ****
  1c82cae2e7ce3866f8094c1dd264cbae  gcc/testsuite/c-c++-common/gomp/sink-2.c
  5da781fbb8445e840fae91d1a209f84a  gcc/testsuite/c-c++-common/gomp/sink-3.c
  0c93f7b88c30539ace084df2f4c7f5ae  gcc/testsuite/c-c++-common/gomp/sink-4.c
! e3472b85746f74ee4851f3899ed89521  gcc/testsuite/c-c++-common/gomp/target-data-1.c
  a8435825c61a8dc6ab7b5b8cda3dd35d  gcc/testsuite/c-c++-common/gomp/target-teams-1.c
  bd7a4a612b8188086bf0650fb29a279a  gcc/testsuite/c-c++-common/gomp/taskloop-reduction-1.c
  2308634fac41b5571bbc8ecf6a185772  gcc/testsuite/c-c++-common/gomp/taskwait-depend-1.c
  539c731e3f7fd40b1bf0432a8a02c04f  gcc/testsuite/c-c++-common/gomp/teams-1.c
! d97eaca438f1848c299f18afd033c184  gcc/testsuite/c-c++-common/gomp/teams-2.c
  5e0762ad9f0a708e2bb91ebe98e91915  gcc/testsuite/c-c++-common/gomp/udr-1.c
  715226741a182526f3d2c9f0d0384ac7  gcc/testsuite/c-c++-common/guality/pr43141.c
  8f5de27b05717c97b322a2c6d71bdda2  gcc/testsuite/c-c++-common/ident-0a.c
  43fa0c72c2114313b8484bf6f08b7085  gcc/testsuite/c-c++-common/ident-0b.c
--- 9480,9497 ----
  1c82cae2e7ce3866f8094c1dd264cbae  gcc/testsuite/c-c++-common/gomp/sink-2.c
  5da781fbb8445e840fae91d1a209f84a  gcc/testsuite/c-c++-common/gomp/sink-3.c
  0c93f7b88c30539ace084df2f4c7f5ae  gcc/testsuite/c-c++-common/gomp/sink-4.c
! 0f606c818aafa917b4e4ca06798a0500  gcc/testsuite/c-c++-common/gomp/target-data-1.c
  a8435825c61a8dc6ab7b5b8cda3dd35d  gcc/testsuite/c-c++-common/gomp/target-teams-1.c
  bd7a4a612b8188086bf0650fb29a279a  gcc/testsuite/c-c++-common/gomp/taskloop-reduction-1.c
  2308634fac41b5571bbc8ecf6a185772  gcc/testsuite/c-c++-common/gomp/taskwait-depend-1.c
  539c731e3f7fd40b1bf0432a8a02c04f  gcc/testsuite/c-c++-common/gomp/teams-1.c
! 3020e821377ef557f546cba8a78f1192  gcc/testsuite/c-c++-common/gomp/teams-2.c
  5e0762ad9f0a708e2bb91ebe98e91915  gcc/testsuite/c-c++-common/gomp/udr-1.c
+ ae581c139df3ad068476c3c0011b10df  gcc/testsuite/c-c++-common/guality/Og-dce-1.c
+ 77dfce37c98a7f3ba9475b987b487300  gcc/testsuite/c-c++-common/guality/Og-dce-2.c
+ d8649d74f0435be9dfbda3d78613de4d  gcc/testsuite/c-c++-common/guality/Og-dce-3.c
+ e26c6f6984625a53461cd5383d9d7094  gcc/testsuite/c-c++-common/guality/Og-global-dse-1.c
+ 7cea7ea892b69a1a021d0bb57e2130d6  gcc/testsuite/c-c++-common/guality/Og-static-wo-1.c
  715226741a182526f3d2c9f0d0384ac7  gcc/testsuite/c-c++-common/guality/pr43141.c
  8f5de27b05717c97b322a2c6d71bdda2  gcc/testsuite/c-c++-common/ident-0a.c
  43fa0c72c2114313b8484bf6f08b7085  gcc/testsuite/c-c++-common/ident-0b.c
*************** a26cac5f6c3bf19d27815db147fb6b76  gcc/te
*** 9209,9217 ****
  28fa0dc109db1913bd5f6088442c8b67  gcc/testsuite/c-c++-common/missing-header-3.c
  22d0401be580cc821a107ff58ba0adf4  gcc/testsuite/c-c++-common/missing-header-4.c
  43b0969da91f5c38b8fb0ee512205d1f  gcc/testsuite/c-c++-common/missing-symbol.c
! 01e056c68731cbfbfaba142a85c7d93a  gcc/testsuite/c-c++-common/nonnull-1.c
! c173ff464a71a0767592505ad9027cfe  gcc/testsuite/c-c++-common/nonnull-2.c
! b5ecd0643340dd5cbd091366ced73bd5  gcc/testsuite/c-c++-common/nonnull-3.c
  a7f92f1077c23eb293a388ad0c9418d7  gcc/testsuite/c-c++-common/opaque-vector.c
  8ae15f4cc1a3d855f57b363a617c368f  gcc/testsuite/c-c++-common/patchable_function_entry-decl.c
  2e25fd811978da14fc47e4213d8f03a3  gcc/testsuite/c-c++-common/patchable_function_entry-default.c
--- 9513,9521 ----
  28fa0dc109db1913bd5f6088442c8b67  gcc/testsuite/c-c++-common/missing-header-3.c
  22d0401be580cc821a107ff58ba0adf4  gcc/testsuite/c-c++-common/missing-header-4.c
  43b0969da91f5c38b8fb0ee512205d1f  gcc/testsuite/c-c++-common/missing-symbol.c
! 33034d99e6dfa89744a2c586900037a3  gcc/testsuite/c-c++-common/nonnull-1.c
! a1ccbbeb722e380d831827588c7f4d57  gcc/testsuite/c-c++-common/nonnull-2.c
! 56f94db4972b3a054d2adecfd106d42a  gcc/testsuite/c-c++-common/nonnull-3.c
  a7f92f1077c23eb293a388ad0c9418d7  gcc/testsuite/c-c++-common/opaque-vector.c
  8ae15f4cc1a3d855f57b363a617c368f  gcc/testsuite/c-c++-common/patchable_function_entry-decl.c
  2e25fd811978da14fc47e4213d8f03a3  gcc/testsuite/c-c++-common/patchable_function_entry-default.c
*************** a369d890b3c8a2c5aefbfa5a42a6d9f8  gcc/te
*** 9226,9234 ****
  255e51279bc61c31135265871f548ae6  gcc/testsuite/c-c++-common/pr30020.c
  b26d0787722b770e1bedb29da6ca65db  gcc/testsuite/c-c++-common/pr33193.c
  19a0263d13d2e33c9a7e8aeaa26cf684  gcc/testsuite/c-c++-common/pr33763.c
! 03c8350c115cec16ed63ed3e3854fa12  gcc/testsuite/c-c++-common/pr35503-1.c
! 2f6e98a404e10a1f90ec2f072764888a  gcc/testsuite/c-c++-common/pr35503-2.c
! b3b574bf7f00bf9dccc2c96dca1721ff  gcc/testsuite/c-c++-common/pr35503-3.c
  a35a58b3b493f052b0bf4ba74eefead5  gcc/testsuite/c-c++-common/pr36282-1.c
  34cf6e3a3ee13163cf912fe7228fe32f  gcc/testsuite/c-c++-common/pr36282-2.c
  3066c34876746e18bc19dfa90edf3930  gcc/testsuite/c-c++-common/pr36282-3.c
--- 9530,9539 ----
  255e51279bc61c31135265871f548ae6  gcc/testsuite/c-c++-common/pr30020.c
  b26d0787722b770e1bedb29da6ca65db  gcc/testsuite/c-c++-common/pr33193.c
  19a0263d13d2e33c9a7e8aeaa26cf684  gcc/testsuite/c-c++-common/pr33763.c
! bfc80bee0cf89ae06495eacd09d45473  gcc/testsuite/c-c++-common/pr34029-1.c
! 79b973b5477ccf9e7126bfc1dd1c8119  gcc/testsuite/c-c++-common/pr35503-1.c
! db92c8a3170c0649c16071602311eb28  gcc/testsuite/c-c++-common/pr35503-2.c
! e6b0f1555e14ad393bcf6311304214b7  gcc/testsuite/c-c++-common/pr35503-3.c
  a35a58b3b493f052b0bf4ba74eefead5  gcc/testsuite/c-c++-common/pr36282-1.c
  34cf6e3a3ee13163cf912fe7228fe32f  gcc/testsuite/c-c++-common/pr36282-2.c
  3066c34876746e18bc19dfa90edf3930  gcc/testsuite/c-c++-common/pr36282-3.c
*************** ddf8c2722b17f92d422315b2f26e4935  gcc/te
*** 9248,9254 ****
  aadf03d86632dc2c5d8b990a20395ac4  gcc/testsuite/c-c++-common/pr44832.c
  6fded49b3b911303ba8ed16b1c3d1b79  gcc/testsuite/c-c++-common/pr46562-2.c
  d8239263162d96344888c161406c0381  gcc/testsuite/c-c++-common/pr46562.c
! 46691ad64c68f1639445378b6e85f4ce  gcc/testsuite/c-c++-common/pr48418.c
  351f6d41b6b48bd87e1a012a18ace4be  gcc/testsuite/c-c++-common/pr49706-2.c
  87900ecbe4cff94e78f0edc1fe288e56  gcc/testsuite/c-c++-common/pr49706.c
  1aadfcf1bc4a0abbcbd275cc5c109a2d  gcc/testsuite/c-c++-common/pr50459-2.c
--- 9553,9559 ----
  aadf03d86632dc2c5d8b990a20395ac4  gcc/testsuite/c-c++-common/pr44832.c
  6fded49b3b911303ba8ed16b1c3d1b79  gcc/testsuite/c-c++-common/pr46562-2.c
  d8239263162d96344888c161406c0381  gcc/testsuite/c-c++-common/pr46562.c
! 61ab4beee7b9e623afb964ae1203b15e  gcc/testsuite/c-c++-common/pr48418.c
  351f6d41b6b48bd87e1a012a18ace4be  gcc/testsuite/c-c++-common/pr49706-2.c
  87900ecbe4cff94e78f0edc1fe288e56  gcc/testsuite/c-c++-common/pr49706.c
  1aadfcf1bc4a0abbcbd275cc5c109a2d  gcc/testsuite/c-c++-common/pr50459-2.c
*************** ef4bca6875e6d260de7ba0490e9b878e  gcc/te
*** 9280,9286 ****
  7445853c57a5b58f4c64bb6360b07326  gcc/testsuite/c-c++-common/pr51628-8.c
  3c7d88f69b773b5248be8aa9bcf3d053  gcc/testsuite/c-c++-common/pr51628-9.c
  765e6d527def56cb3a5295e8b879c82c  gcc/testsuite/c-c++-common/pr51712.c
! 18b60e1f921ff729a499063148e1ac35  gcc/testsuite/c-c++-common/pr51768.c
  19c5c8c6c4a09bd9d296a28e8078a301  gcc/testsuite/c-c++-common/pr52177.c
  e9ab7e8194d7254751245044f83dc8be  gcc/testsuite/c-c++-common/pr52181.c
  9cecc063b60fd542510c334a50694aed  gcc/testsuite/c-c++-common/pr53037-5.c
--- 9585,9591 ----
  7445853c57a5b58f4c64bb6360b07326  gcc/testsuite/c-c++-common/pr51628-8.c
  3c7d88f69b773b5248be8aa9bcf3d053  gcc/testsuite/c-c++-common/pr51628-9.c
  765e6d527def56cb3a5295e8b879c82c  gcc/testsuite/c-c++-common/pr51712.c
! 65339c78e1b0a00a94b3eb33bb35abc0  gcc/testsuite/c-c++-common/pr51768.c
  19c5c8c6c4a09bd9d296a28e8078a301  gcc/testsuite/c-c++-common/pr52177.c
  e9ab7e8194d7254751245044f83dc8be  gcc/testsuite/c-c++-common/pr52181.c
  9cecc063b60fd542510c334a50694aed  gcc/testsuite/c-c++-common/pr53037-5.c
*************** e9ab7e8194d7254751245044f83dc8be  gcc/te
*** 9292,9298 ****
  f1d943c48a18ca5c666d26543205d144  gcc/testsuite/c-c++-common/pr55619.c
  3db0ead60e4a73b927872aff202102be  gcc/testsuite/c-c++-common/pr55771.c
  0c7d9dbc79d0449ecbce0d3cf963a080  gcc/testsuite/c-c++-common/pr56302.c
! 9afa40540f5027b00cbd573193c0f4f0  gcc/testsuite/c-c++-common/pr56493.c
  a83a3dfeb8c2e989fe3570117b3eacd4  gcc/testsuite/c-c++-common/pr56566.c
  e257567d3e45108aa92c38c2756f8082  gcc/testsuite/c-c++-common/pr56607.c
  93039c44a01737b0dc6ca34eeea375fc  gcc/testsuite/c-c++-common/pr57371-1.c
--- 9597,9603 ----
  f1d943c48a18ca5c666d26543205d144  gcc/testsuite/c-c++-common/pr55619.c
  3db0ead60e4a73b927872aff202102be  gcc/testsuite/c-c++-common/pr55771.c
  0c7d9dbc79d0449ecbce0d3cf963a080  gcc/testsuite/c-c++-common/pr56302.c
! abab614f0a54935c73af82b38d108644  gcc/testsuite/c-c++-common/pr56493.c
  a83a3dfeb8c2e989fe3570117b3eacd4  gcc/testsuite/c-c++-common/pr56566.c
  e257567d3e45108aa92c38c2756f8082  gcc/testsuite/c-c++-common/pr56607.c
  93039c44a01737b0dc6ca34eeea375fc  gcc/testsuite/c-c++-common/pr57371-1.c
*************** e45c80d629228a224b619758f4298be9  gcc/te
*** 9328,9339 ****
  ad768f900ccd45a1c88b7d0f9d0a7317  gcc/testsuite/c-c++-common/pr65040.c
  53e0beba2fc0ed51f72b8c45e804dfb3  gcc/testsuite/c-c++-common/pr65120.c
  2cd83f4e65f35f2fe2cc8fc9a3fd8394  gcc/testsuite/c-c++-common/pr65556.c
! e87e517ca2da472a85acb598c8be252a  gcc/testsuite/c-c++-common/pr65830.c
  a9a485258f83c69df2db1edbc1b8da25  gcc/testsuite/c-c++-common/pr66208.c
  0eaa335b485fac18a046168e23451cbe  gcc/testsuite/c-c++-common/pr66322.c
  e827ebe372e4239bd1ec76051f4882f1  gcc/testsuite/c-c++-common/pr67639.c
  7399efb952d306383053d5e268f89c04  gcc/testsuite/c-c++-common/pr67653.c
! 59f951a0a38055ac95e5a02c7098758c  gcc/testsuite/c-c++-common/pr68107.c
  dfd653501b778d81153304f2a3d6efbb  gcc/testsuite/c-c++-common/pr68582.c
  95f642fc06dfe4b461e01735b1815fa2  gcc/testsuite/c-c++-common/pr68657-1.c
  195d3e020b85d20a8223c8d29842ec24  gcc/testsuite/c-c++-common/pr68657-2.c
--- 9633,9644 ----
  ad768f900ccd45a1c88b7d0f9d0a7317  gcc/testsuite/c-c++-common/pr65040.c
  53e0beba2fc0ed51f72b8c45e804dfb3  gcc/testsuite/c-c++-common/pr65120.c
  2cd83f4e65f35f2fe2cc8fc9a3fd8394  gcc/testsuite/c-c++-common/pr65556.c
! 2b3acc23f7d545f6d7e839c0bb76d7fa  gcc/testsuite/c-c++-common/pr65830.c
  a9a485258f83c69df2db1edbc1b8da25  gcc/testsuite/c-c++-common/pr66208.c
  0eaa335b485fac18a046168e23451cbe  gcc/testsuite/c-c++-common/pr66322.c
  e827ebe372e4239bd1ec76051f4882f1  gcc/testsuite/c-c++-common/pr67639.c
  7399efb952d306383053d5e268f89c04  gcc/testsuite/c-c++-common/pr67653.c
! 07a689b0af5776ea84e9c299330c25f2  gcc/testsuite/c-c++-common/pr68107.c
  dfd653501b778d81153304f2a3d6efbb  gcc/testsuite/c-c++-common/pr68582.c
  95f642fc06dfe4b461e01735b1815fa2  gcc/testsuite/c-c++-common/pr68657-1.c
  195d3e020b85d20a8223c8d29842ec24  gcc/testsuite/c-c++-common/pr68657-2.c
*************** cbe3fc815940c07168eae35940a68240  gcc/te
*** 9354,9361 ****
  021fff0470a2865e5a38b50712393164  gcc/testsuite/c-c++-common/pr69558-4.c
  f281e153e0cd83902b9a418f6d6d015a  gcc/testsuite/c-c++-common/pr69558.c
  388b963ce0a6d74b387fe44e74666652  gcc/testsuite/c-c++-common/pr69669.c
! fbb1b0632c52ba909e513c69f0a13650  gcc/testsuite/c-c++-common/pr69733.c
! dc7d9d40dac973e012fc8b7b6f54d784  gcc/testsuite/c-c++-common/pr69764.c
  f4386df5fa5c32d56388c75bdf15c9d4  gcc/testsuite/c-c++-common/pr69797.c
  65bc4d5f65c8acc789b20b18a397a09c  gcc/testsuite/c-c++-common/pr70144-1.c
  0bb9d8ed56991f7a3858d98c907408a9  gcc/testsuite/c-c++-common/pr70144-2.c
--- 9659,9666 ----
  021fff0470a2865e5a38b50712393164  gcc/testsuite/c-c++-common/pr69558-4.c
  f281e153e0cd83902b9a418f6d6d015a  gcc/testsuite/c-c++-common/pr69558.c
  388b963ce0a6d74b387fe44e74666652  gcc/testsuite/c-c++-common/pr69669.c
! fcab2c37c592cb820664aef7ee6475af  gcc/testsuite/c-c++-common/pr69733.c
! 7aa22aab6059a2ccc56102a0aa7818b0  gcc/testsuite/c-c++-common/pr69764.c
  f4386df5fa5c32d56388c75bdf15c9d4  gcc/testsuite/c-c++-common/pr69797.c
  65bc4d5f65c8acc789b20b18a397a09c  gcc/testsuite/c-c++-common/pr70144-1.c
  0bb9d8ed56991f7a3858d98c907408a9  gcc/testsuite/c-c++-common/pr70144-2.c
*************** ecc72a9bb2a70f28d6c832a7f8f58ed5  gcc/te
*** 9395,9407 ****
  f187b1fa4588b6b485c67bc45272ee70  gcc/testsuite/c-c++-common/pr88664-2.c
  e1c6090860137d89e82f5f3641323830  gcc/testsuite/c-c++-common/pr88984.c
  6a2204c315ddd7bab3f04f84e4490bd5  gcc/testsuite/c-c++-common/pr89566.c
! 14b5a8022339731cc96988e1904f8f89  gcc/testsuite/c-c++-common/pr89888.c
  3631e7a853bf47afcc4f5db428d630ff  gcc/testsuite/c-c++-common/pr89933.c
  39e1e4487b61521edeb410a0c9d9958b  gcc/testsuite/c-c++-common/pr89946.c
  75e121868c2f5a95ffbb0bf6c3de0a20  gcc/testsuite/c-c++-common/pr89985.c
  6b55a407d08d3d9c405be8cf45164944  gcc/testsuite/c-c++-common/pr90108.c
  8fd647f51d930e760ae749a56cb10ac5  gcc/testsuite/c-c++-common/pr90677-2.c
  d42df05e7fed418c382335210d53f9b8  gcc/testsuite/c-c++-common/pr90677.c
  b0ba836310044e7b419ef679f0b48d6f  gcc/testsuite/c-c++-common/raw-string-1.c
  554e7071d2525351de28445762633866  gcc/testsuite/c-c++-common/raw-string-10.c
  fc54e7227094f307fa566b3a8cd0ba9a  gcc/testsuite/c-c++-common/raw-string-11.c
--- 9700,9725 ----
  f187b1fa4588b6b485c67bc45272ee70  gcc/testsuite/c-c++-common/pr88664-2.c
  e1c6090860137d89e82f5f3641323830  gcc/testsuite/c-c++-common/pr88984.c
  6a2204c315ddd7bab3f04f84e4490bd5  gcc/testsuite/c-c++-common/pr89566.c
! 13205c717bffbf6f93c9d98e9dd5f17f  gcc/testsuite/c-c++-common/pr89888.c
  3631e7a853bf47afcc4f5db428d630ff  gcc/testsuite/c-c++-common/pr89933.c
  39e1e4487b61521edeb410a0c9d9958b  gcc/testsuite/c-c++-common/pr89946.c
  75e121868c2f5a95ffbb0bf6c3de0a20  gcc/testsuite/c-c++-common/pr89985.c
  6b55a407d08d3d9c405be8cf45164944  gcc/testsuite/c-c++-common/pr90108.c
+ ea275fe66144f99170f9b56b75c74d6e  gcc/testsuite/c-c++-common/pr90590-1.c
+ f8ba9b55656ffe194a765712af938e40  gcc/testsuite/c-c++-common/pr90590-1.h
+ 5ed76cef74874d75c1e8cc238f3b66fc  gcc/testsuite/c-c++-common/pr90590-2.c
+ 77dafd6086404ad78f14a145879f03da  gcc/testsuite/c-c++-common/pr90590-2.h
  8fd647f51d930e760ae749a56cb10ac5  gcc/testsuite/c-c++-common/pr90677-2.c
  d42df05e7fed418c382335210d53f9b8  gcc/testsuite/c-c++-common/pr90677.c
+ 0689877a2912c8e2b99fcbf9989c65f4  gcc/testsuite/c-c++-common/pr90927.c
+ 33199266bc6ca89c5e64e48f4e68ed29  gcc/testsuite/c-c++-common/pr92352.c
+ b45c683e1065f93893860cdb2a150b1c  gcc/testsuite/c-c++-common/pr92452.c
+ 265ce028b2de4c8a8622390ecfdfeda0  gcc/testsuite/c-c++-common/pr92833-1.c
+ 0e1eb38694d373069325e88d4429d3fe  gcc/testsuite/c-c++-common/pr92833-2.c
+ 66ad792d1d2d0bdd9e451b351af65ce3  gcc/testsuite/c-c++-common/pr92833-3.c
+ bf9f9984774fc19887b8b04e985fbdc2  gcc/testsuite/c-c++-common/pr92833-4.c
+ e0634fac709f26330953f3dcafaa2394  gcc/testsuite/c-c++-common/pr94385.c
+ 4dfa0ccb316da545a1f8b242aac41f3e  gcc/testsuite/c-c++-common/pr94755.c
  b0ba836310044e7b419ef679f0b48d6f  gcc/testsuite/c-c++-common/raw-string-1.c
  554e7071d2525351de28445762633866  gcc/testsuite/c-c++-common/raw-string-10.c
  fc54e7227094f307fa566b3a8cd0ba9a  gcc/testsuite/c-c++-common/raw-string-11.c
*************** f8efe3ea05de6da4c3e58da2f4059831  gcc/te
*** 9439,9453 ****
  00dd44fe0ccdd0863230695dfb0f07d4  gcc/testsuite/c-c++-common/rotate-7a.c
  efbd156b4e5e325505e6eb4e7cb69c45  gcc/testsuite/c-c++-common/rotate-8.c
  57e5b2848b9eefd31d2257ad2db5539a  gcc/testsuite/c-c++-common/rotate-9.c
! bee589250233b6532ec2092706139b87  gcc/testsuite/c-c++-common/scal-to-vec1.c
  56185c5eccbe01ad46244faa1da60110  gcc/testsuite/c-c++-common/scal-to-vec2.c
! 3c2fa8dfd083c62e12d99765cea7f5e6  gcc/testsuite/c-c++-common/simulate-thread/bitfields-1.c
! 69fd96687255c17fed56d60f4e262cb1  gcc/testsuite/c-c++-common/simulate-thread/bitfields-2.c
! adb50709ddcf8583700615ea9a6ffcdd  gcc/testsuite/c-c++-common/simulate-thread/bitfields-3.c
! 9c19c1df6348e12b2ba128f16ed0297b  gcc/testsuite/c-c++-common/simulate-thread/bitfields-4.c
  44e124b6efbd861ac0aa2c9196131cd3  gcc/testsuite/c-c++-common/sizeof-array-argument.c
  3b6b1021a97b044fd6f4d5e187425192  gcc/testsuite/c-c++-common/spec-barrier-1.c
! 7c0733283e3914a74283236c082f5a8c  gcc/testsuite/c-c++-common/spec-barrier-2.c
  559b16a4a85f21eeaaa2e75ac7769f51  gcc/testsuite/c-c++-common/spellcheck-reserved.c
  3904c1e06218e5b72020662cd962cf18  gcc/testsuite/c-c++-common/substring-location-PR-87562-1-a.h
  d41d8cd98f00b204e9800998ecf8427e  gcc/testsuite/c-c++-common/substring-location-PR-87562-1-b.h
--- 9757,9771 ----
  00dd44fe0ccdd0863230695dfb0f07d4  gcc/testsuite/c-c++-common/rotate-7a.c
  efbd156b4e5e325505e6eb4e7cb69c45  gcc/testsuite/c-c++-common/rotate-8.c
  57e5b2848b9eefd31d2257ad2db5539a  gcc/testsuite/c-c++-common/rotate-9.c
! f9ed915fcb0e475845740fa55cfc452e  gcc/testsuite/c-c++-common/scal-to-vec1.c
  56185c5eccbe01ad46244faa1da60110  gcc/testsuite/c-c++-common/scal-to-vec2.c
! 48efd205308f2e806dee8335c1cb3983  gcc/testsuite/c-c++-common/simulate-thread/bitfields-1.c
! 521750e83ab2df432ecb4a77bd0d5a19  gcc/testsuite/c-c++-common/simulate-thread/bitfields-2.c
! a5c60fe52097cec85469622ba5fdb925  gcc/testsuite/c-c++-common/simulate-thread/bitfields-3.c
! ea258fcc065ffda90982abc5cfd1d059  gcc/testsuite/c-c++-common/simulate-thread/bitfields-4.c
  44e124b6efbd861ac0aa2c9196131cd3  gcc/testsuite/c-c++-common/sizeof-array-argument.c
  3b6b1021a97b044fd6f4d5e187425192  gcc/testsuite/c-c++-common/spec-barrier-1.c
! 80f293e41667e8b36f21d7e67a6c70b0  gcc/testsuite/c-c++-common/spec-barrier-2.c
  559b16a4a85f21eeaaa2e75ac7769f51  gcc/testsuite/c-c++-common/spellcheck-reserved.c
  3904c1e06218e5b72020662cd962cf18  gcc/testsuite/c-c++-common/substring-location-PR-87562-1-a.h
  d41d8cd98f00b204e9800998ecf8427e  gcc/testsuite/c-c++-common/substring-location-PR-87562-1-b.h
*************** a4ea85477797866805ea1b7ba50ac38a  gcc/te
*** 9465,9478 ****
  760b86f9f2b8020d24fb1a3ddc47561e  gcc/testsuite/c-c++-common/tm/cancel-1.c
  24ff23ed7aec69e78f509593b0501e85  gcc/testsuite/c-c++-common/tm/freq.c
  f8244e4647992e9a0345e21a44b31fc3  gcc/testsuite/c-c++-common/tm/inline-asm-2.c
! 76847c9017d9f87b56a27402e39e83fc  gcc/testsuite/c-c++-common/tm/inline-asm.c
  08d397d9c83e4bef2fecf1ac0e08c4b5  gcc/testsuite/c-c++-common/tm/ipa-1.c
  2ba8b54a665f15db63ba7de21e65fcdb  gcc/testsuite/c-c++-common/tm/malloc.c
  eeedc4e342124b573cee07ce3df192b7  gcc/testsuite/c-c++-common/tm/memcpy-1.c
  32077c16de6ee8727a43fde0685a483e  gcc/testsuite/c-c++-common/tm/omp.c
  f99192805adee98751aaf370a2fc3af0  gcc/testsuite/c-c++-common/tm/outer-1.c
! 590f63ee8c14eac89517ad6ad385a16e  gcc/testsuite/c-c++-common/tm/pr54893.c
! 516560e2fad8d9903558560cad054df5  gcc/testsuite/c-c++-common/tm/safe-1.c
  78b683a42d8ed6844fd0dcaea769bcea  gcc/testsuite/c-c++-common/tm/safe-2.c
  8906fccb031956020cc42f74871c6ca3  gcc/testsuite/c-c++-common/tm/safe-3.c
  76b4e04d7d40be0a96c7c1edf63449c0  gcc/testsuite/c-c++-common/tm/trxn-expr-2.c
--- 9783,9796 ----
  760b86f9f2b8020d24fb1a3ddc47561e  gcc/testsuite/c-c++-common/tm/cancel-1.c
  24ff23ed7aec69e78f509593b0501e85  gcc/testsuite/c-c++-common/tm/freq.c
  f8244e4647992e9a0345e21a44b31fc3  gcc/testsuite/c-c++-common/tm/inline-asm-2.c
! bd39372523b64e552803d182ebbe5f26  gcc/testsuite/c-c++-common/tm/inline-asm.c
  08d397d9c83e4bef2fecf1ac0e08c4b5  gcc/testsuite/c-c++-common/tm/ipa-1.c
  2ba8b54a665f15db63ba7de21e65fcdb  gcc/testsuite/c-c++-common/tm/malloc.c
  eeedc4e342124b573cee07ce3df192b7  gcc/testsuite/c-c++-common/tm/memcpy-1.c
  32077c16de6ee8727a43fde0685a483e  gcc/testsuite/c-c++-common/tm/omp.c
  f99192805adee98751aaf370a2fc3af0  gcc/testsuite/c-c++-common/tm/outer-1.c
! 94ee6081f443e70fa49deebc5c56ec1f  gcc/testsuite/c-c++-common/tm/pr54893.c
! c1a2ef67f6a805b62b13b9f6f4107f19  gcc/testsuite/c-c++-common/tm/safe-1.c
  78b683a42d8ed6844fd0dcaea769bcea  gcc/testsuite/c-c++-common/tm/safe-2.c
  8906fccb031956020cc42f74871c6ca3  gcc/testsuite/c-c++-common/tm/safe-3.c
  76b4e04d7d40be0a96c7c1edf63449c0  gcc/testsuite/c-c++-common/tm/trxn-expr-2.c
*************** f64e9a0e7b5ee2dca69c8d247f6246ab  gcc/te
*** 9525,9539 ****
  c0ced56aa092fbe05fcfb0400e4a7973  gcc/testsuite/c-c++-common/torture/builtin-arith-overflow.h
  e6519a905d51bc4a47ceea85c886d98b  gcc/testsuite/c-c++-common/torture/builtin-convertvector-1.c
  255588ac3834ead37b7f36c6b58cd61b  gcc/testsuite/c-c++-common/torture/complex-alias-1.c
! 6f6772646a39bb33b4665e4788d002f6  gcc/testsuite/c-c++-common/torture/complex-sign-add.c
! e9694366b253ea3b37da90d7dca58f70  gcc/testsuite/c-c++-common/torture/complex-sign-mixed-add.c
! e4baa8b33bfc938900d5100eff4edddf  gcc/testsuite/c-c++-common/torture/complex-sign-mixed-div.c
! 52d3c6b6de8502ae65de9eac39b74c8c  gcc/testsuite/c-c++-common/torture/complex-sign-mixed-mul.c
! 0cac1cee19174131ff8c68f0bd088ffe  gcc/testsuite/c-c++-common/torture/complex-sign-mixed-sub.c
! 94b433318b3ee471acbc9c4a5e019078  gcc/testsuite/c-c++-common/torture/complex-sign-mul-minus-one.c
! c71bc12356cbf6eba1442ee7a52ce795  gcc/testsuite/c-c++-common/torture/complex-sign-mul-one.c
! 38b5d3f4dd33161d4f79f3789cac04aa  gcc/testsuite/c-c++-common/torture/complex-sign-mul.c
! d6a230e22444b633319bb1e309e0641c  gcc/testsuite/c-c++-common/torture/complex-sign-sub.c
  4ae74720c58c8cbadc297c4a41a985fb  gcc/testsuite/c-c++-common/torture/complex-sign.h
  9f1ae2fa915c5159ec134a1894ad5cf1  gcc/testsuite/c-c++-common/torture/pr42834.c
  675e839574d99a5e8a0446f66b3520ca  gcc/testsuite/c-c++-common/torture/pr46137.c
--- 9843,9857 ----
  c0ced56aa092fbe05fcfb0400e4a7973  gcc/testsuite/c-c++-common/torture/builtin-arith-overflow.h
  e6519a905d51bc4a47ceea85c886d98b  gcc/testsuite/c-c++-common/torture/builtin-convertvector-1.c
  255588ac3834ead37b7f36c6b58cd61b  gcc/testsuite/c-c++-common/torture/complex-alias-1.c
! 252f95ec0162dd10262e227d09b36737  gcc/testsuite/c-c++-common/torture/complex-sign-add.c
! 2e42a65fc880e668586d3506db231d5b  gcc/testsuite/c-c++-common/torture/complex-sign-mixed-add.c
! e66ac106001c0acd07a0f8da5f732d73  gcc/testsuite/c-c++-common/torture/complex-sign-mixed-div.c
! b9d33618a5c03ea155703661506a97c0  gcc/testsuite/c-c++-common/torture/complex-sign-mixed-mul.c
! b0122d0c879837137f66c27145a6358c  gcc/testsuite/c-c++-common/torture/complex-sign-mixed-sub.c
! dd5142586e3d5b7dc7b3a0aec5196b3d  gcc/testsuite/c-c++-common/torture/complex-sign-mul-minus-one.c
! 471a346d291876358cd0a0a04a18d6e4  gcc/testsuite/c-c++-common/torture/complex-sign-mul-one.c
! 6733790e29253b482618d3d7ca3d459b  gcc/testsuite/c-c++-common/torture/complex-sign-mul.c
! d61cc0116375f68235d4f54cec36629f  gcc/testsuite/c-c++-common/torture/complex-sign-sub.c
  4ae74720c58c8cbadc297c4a41a985fb  gcc/testsuite/c-c++-common/torture/complex-sign.h
  9f1ae2fa915c5159ec134a1894ad5cf1  gcc/testsuite/c-c++-common/torture/pr42834.c
  675e839574d99a5e8a0446f66b3520ca  gcc/testsuite/c-c++-common/torture/pr46137.c
*************** ca950930999a7ccb3d7502dc3da32ba2  gcc/te
*** 9601,9607 ****
  1e976c09a489a55463300c4cde641838  gcc/testsuite/c-c++-common/tsan/step.c
  d61adffa4e34a837a6cb7feea1530906  gcc/testsuite/c-c++-common/tsan/thread_leak.c
  51f76be6c4f19fa936f07a8bd2649930  gcc/testsuite/c-c++-common/tsan/thread_leak1.c
! 77a983da2ab70bf4af117b710ba01539  gcc/testsuite/c-c++-common/tsan/thread_leak2.c
  2a1cc14372eafa2d784920c8669e47db  gcc/testsuite/c-c++-common/tsan/tiny_race.c
  75b79548e5a2ab6acf3a7d2bb32e6f36  gcc/testsuite/c-c++-common/tsan/tls_race.c
  1048d0e6a3ca80d3b4720a445847e7cb  gcc/testsuite/c-c++-common/tsan/tsan_barrier.h
--- 9919,9925 ----
  1e976c09a489a55463300c4cde641838  gcc/testsuite/c-c++-common/tsan/step.c
  d61adffa4e34a837a6cb7feea1530906  gcc/testsuite/c-c++-common/tsan/thread_leak.c
  51f76be6c4f19fa936f07a8bd2649930  gcc/testsuite/c-c++-common/tsan/thread_leak1.c
! e35caecbc64e5306c5790ce0f003eff6  gcc/testsuite/c-c++-common/tsan/thread_leak2.c
  2a1cc14372eafa2d784920c8669e47db  gcc/testsuite/c-c++-common/tsan/tiny_race.c
  75b79548e5a2ab6acf3a7d2bb32e6f36  gcc/testsuite/c-c++-common/tsan/tls_race.c
  1048d0e6a3ca80d3b4720a445847e7cb  gcc/testsuite/c-c++-common/tsan/tsan_barrier.h
*************** e421ddf2d69b41e79c4238d86ca23e02  gcc/te
*** 9647,9658 ****
  701ee447bdcb3bdd63f4e19e0aa275c7  gcc/testsuite/c-c++-common/ubsan/div-by-zero-5.c
  f1d5ba00cab5b6e91752dc500c497bad  gcc/testsuite/c-c++-common/ubsan/div-by-zero-6.c
  be42c7c0119ada6c8b75859883b7947d  gcc/testsuite/c-c++-common/ubsan/div-by-zero-7.c
! d07c65cd2e8a1d0ef1dee133476f0011  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-1.c
  96159bb28961f7d226730c47d4f46b1c  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-10.c
  412e240273773d78a1d355e70f1bb47f  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-11.c
! d8a1f7454571a008b04fa6c1291f6438  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-2.c
  9f26f2597db64bf07c0305c3e561422c  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-3.c
! da122df61cc25a538786852631e2414d  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-4.c
  f1056f3f61f4c10747448d20be20be58  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-5.c
  5f549a8ec9aa4eb9f413c32a4603f3a1  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-6.c
  ad0210bfe2c0bf78466fbeb232c7f222  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-7.c
--- 9965,9976 ----
  701ee447bdcb3bdd63f4e19e0aa275c7  gcc/testsuite/c-c++-common/ubsan/div-by-zero-5.c
  f1d5ba00cab5b6e91752dc500c497bad  gcc/testsuite/c-c++-common/ubsan/div-by-zero-6.c
  be42c7c0119ada6c8b75859883b7947d  gcc/testsuite/c-c++-common/ubsan/div-by-zero-7.c
! 8d9e9d9d9f81061daf513b5ba1554c80  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-1.c
  96159bb28961f7d226730c47d4f46b1c  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-10.c
  412e240273773d78a1d355e70f1bb47f  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-11.c
! aa8c21345689da604fd19160c9daa7ee  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-2.c
  9f26f2597db64bf07c0305c3e561422c  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-3.c
! 4d032db6c4b016774cd0edcbed6e16b7  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-4.c
  f1056f3f61f4c10747448d20be20be58  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-5.c
  5f549a8ec9aa4eb9f413c32a4603f3a1  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-6.c
  ad0210bfe2c0bf78466fbeb232c7f222  gcc/testsuite/c-c++-common/ubsan/float-cast-overflow-7.c
*************** ff518288ae9456cb45c23143120ce391  gcc/te
*** 9690,9696 ****
  dd5de113b9d39840cc410d98a0688b16  gcc/testsuite/c-c++-common/ubsan/object-size-6.c
  54f96d0307492b003e27add3b92cb292  gcc/testsuite/c-c++-common/ubsan/object-size-7.c
  222d773305badc3b5ff04e6872ab67f8  gcc/testsuite/c-c++-common/ubsan/object-size-8.c
! b432ce7b5bba74d5dfd1b8f2b9c237aa  gcc/testsuite/c-c++-common/ubsan/object-size-9.c
  d6430d78fd6061aa98d01ec7e90a309f  gcc/testsuite/c-c++-common/ubsan/opts-1.c
  a61b9d88d557ac4c1e79416cd543c935  gcc/testsuite/c-c++-common/ubsan/opts-2.c
  09eeda7174b879c9fe824cfb0c04f9fe  gcc/testsuite/c-c++-common/ubsan/opts-3.c
--- 10008,10014 ----
  dd5de113b9d39840cc410d98a0688b16  gcc/testsuite/c-c++-common/ubsan/object-size-6.c
  54f96d0307492b003e27add3b92cb292  gcc/testsuite/c-c++-common/ubsan/object-size-7.c
  222d773305badc3b5ff04e6872ab67f8  gcc/testsuite/c-c++-common/ubsan/object-size-8.c
! 98ada51021e709699ac1188f83a106c1  gcc/testsuite/c-c++-common/ubsan/object-size-9.c
  d6430d78fd6061aa98d01ec7e90a309f  gcc/testsuite/c-c++-common/ubsan/opts-1.c
  a61b9d88d557ac4c1e79416cd543c935  gcc/testsuite/c-c++-common/ubsan/opts-2.c
  09eeda7174b879c9fe824cfb0c04f9fe  gcc/testsuite/c-c++-common/ubsan/opts-3.c
*************** a55f82635f39282e5a6df541601c4ccc  gcc/te
*** 9771,9778 ****
  c984d91c7853e9d690baeaad795dd74b  gcc/testsuite/c-c++-common/ubsan/pr85213.c
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  e1b150cb23fdeeb165a94d174c99d4b5  gcc/testsuite/c-c++-common/ubsan/pr88215.c
  ed6772b373b6f56a159b87f88582ef1a  gcc/testsuite/c-c++-common/ubsan/ptr-overflow-1.c
! 130b8e4c44c6b9730f42609fcfcd0c0b  gcc/testsuite/c-c++-common/ubsan/ptr-overflow-2.c
  04c1164b217e389d12b509fb96d8b31f  gcc/testsuite/c-c++-common/ubsan/ptr-overflow-sanitization-1.c
  dab28cca030f6a4bc8dd3c11ed677fff  gcc/testsuite/c-c++-common/ubsan/recovery-1.c
  5bb4d0c13ed60e4d8054523bc5e48304  gcc/testsuite/c-c++-common/ubsan/recovery-2.c
--- 10089,10097 ----
  c984d91c7853e9d690baeaad795dd74b  gcc/testsuite/c-c++-common/ubsan/pr85213.c
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  e1b150cb23fdeeb165a94d174c99d4b5  gcc/testsuite/c-c++-common/ubsan/pr88215.c
+ cea81e64e159f87882055579bee45c82  gcc/testsuite/c-c++-common/ubsan/pr94641.c
  ed6772b373b6f56a159b87f88582ef1a  gcc/testsuite/c-c++-common/ubsan/ptr-overflow-1.c
! ab3e6031c7ebb34b8970ad0914e7acf0  gcc/testsuite/c-c++-common/ubsan/ptr-overflow-2.c
  04c1164b217e389d12b509fb96d8b31f  gcc/testsuite/c-c++-common/ubsan/ptr-overflow-sanitization-1.c
  dab28cca030f6a4bc8dd3c11ed677fff  gcc/testsuite/c-c++-common/ubsan/recovery-1.c
  5bb4d0c13ed60e4d8054523bc5e48304  gcc/testsuite/c-c++-common/ubsan/recovery-2.c
*************** f05c0689692cbede80befe82de25dc21  gcc/te
*** 9859,9887 ****
  5d6889d4089a1f4aaf45e435f0eb55bf  gcc/testsuite/c-c++-common/vla-1.c
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  4047fbaa76a1a5d41ea12f6f27df3243  gcc/testsuite/c-c++-common/wdate-time.c
! 3d3f83f9897919cf80e049a3206cc93d  gcc/testsuite/config/default.exp
  58dc5a5cf5db074f93f28ff8913eed25  gcc/testsuite/g++.dg/20090107-1.C
  e530347ad81371c3d469f2a1d1245735  gcc/testsuite/g++.dg/20090121-1.C
  34c8e7d537bafbaafc64457157d9941d  gcc/testsuite/g++.dg/DRs/dr1207-1.C
  135ae25fc37d38f1d817ed5038d76739  gcc/testsuite/g++.dg/DRs/dr1207-2.C
  c78a7d0e0f56139db13df05e5557054a  gcc/testsuite/g++.dg/DRs/dr1511-1.C
  a8a423a0388215f96cf72d6abf415d72  gcc/testsuite/g++.dg/DRs/dr1511-2.C
  b76a9cedbf2dc42cfc090cc116dd5b23  gcc/testsuite/g++.dg/DRs/dr2137-1.C
  c34c077c14a731c1e76b55760a45595e  gcc/testsuite/g++.dg/DRs/dr2137-2.C
! 5f280ae7fc7976f77184dcdf57a38709  gcc/testsuite/g++.dg/README
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  a41465f245515983bde6bb1167545c97  gcc/testsuite/g++.dg/Wattributes-2.C
  855737fcfec2beb103a1b9c7c6e31f1c  gcc/testsuite/g++.dg/Wattributes-3.C
  6eca350a065a90ffa5fe1016ff56b35b  gcc/testsuite/g++.dg/Wattributes-4.C
  3ff207592dbb65eecb677a29243ae42b  gcc/testsuite/g++.dg/Wattributes-5.C
  35b2001cf691ecf0a90121735a12e0ac  gcc/testsuite/g++.dg/Wattributes.C
! 2687fa5e702b8432b772f5fa0cfaaf80  gcc/testsuite/g++.dg/Wcast-function-type.C
  f2143b28e578a3bad2b2e83b50e55a09  gcc/testsuite/g++.dg/Wclass-memaccess-2.C
  8beea6608726e30b4c6e45d68c7fd049  gcc/testsuite/g++.dg/Wclass-memaccess-3.C
  a870375da7bcd4c5c455867aab227d04  gcc/testsuite/g++.dg/Wclass-memaccess-4.C
  0c3f9ec615c7fb98f24e74081dfa3a73  gcc/testsuite/g++.dg/Wclass-memaccess.C
  5ae126d2bd8ea7c9e7da7c0f0bf249a8  gcc/testsuite/g++.dg/Wframe-address-in-Wall.C
  5ba575936ea99c0ac6a33f32f31ed443  gcc/testsuite/g++.dg/Wframe-address.C
  8c0d0fa0bf8f3a3120d9b417967af343  gcc/testsuite/g++.dg/Wmissing-attributes.C
  4988a6deade72f34e9e9cc8e9fb583a9  gcc/testsuite/g++.dg/Wno-frame-address.C
  f0d27e546f279d0c350c8d8c55b73eb0  gcc/testsuite/g++.dg/Wshadow.C
--- 10178,10211 ----
  5d6889d4089a1f4aaf45e435f0eb55bf  gcc/testsuite/c-c++-common/vla-1.c
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  4047fbaa76a1a5d41ea12f6f27df3243  gcc/testsuite/c-c++-common/wdate-time.c
! 9429a29ba85ed365fc5fbe98d1262a84  gcc/testsuite/config/default.exp
  58dc5a5cf5db074f93f28ff8913eed25  gcc/testsuite/g++.dg/20090107-1.C
  e530347ad81371c3d469f2a1d1245735  gcc/testsuite/g++.dg/20090121-1.C
  34c8e7d537bafbaafc64457157d9941d  gcc/testsuite/g++.dg/DRs/dr1207-1.C
  135ae25fc37d38f1d817ed5038d76739  gcc/testsuite/g++.dg/DRs/dr1207-2.C
+ 8ce864b8f2d2ae710018ffa009a91983  gcc/testsuite/g++.dg/DRs/dr1423.C
  c78a7d0e0f56139db13df05e5557054a  gcc/testsuite/g++.dg/DRs/dr1511-1.C
  a8a423a0388215f96cf72d6abf415d72  gcc/testsuite/g++.dg/DRs/dr1511-2.C
+ 5402422aa468b0e17faae787be45ca05  gcc/testsuite/g++.dg/DRs/dr1778.C
+ e1ec3bf667b6fc27346a0e4a5cf1958b  gcc/testsuite/g++.dg/DRs/dr1940.C
  b76a9cedbf2dc42cfc090cc116dd5b23  gcc/testsuite/g++.dg/DRs/dr2137-1.C
  c34c077c14a731c1e76b55760a45595e  gcc/testsuite/g++.dg/DRs/dr2137-2.C
! 150674e33ec632b8ae1b75047191bc79  gcc/testsuite/g++.dg/README
  c2db197c9d51ba75cb2475afeb61f7a3  gcc/testsuite/g++.dg/Walloca1.C
  a41465f245515983bde6bb1167545c97  gcc/testsuite/g++.dg/Wattributes-2.C
  855737fcfec2beb103a1b9c7c6e31f1c  gcc/testsuite/g++.dg/Wattributes-3.C
  6eca350a065a90ffa5fe1016ff56b35b  gcc/testsuite/g++.dg/Wattributes-4.C
  3ff207592dbb65eecb677a29243ae42b  gcc/testsuite/g++.dg/Wattributes-5.C
  35b2001cf691ecf0a90121735a12e0ac  gcc/testsuite/g++.dg/Wattributes.C
! b5c04f6860b32d2a8e3ec7fde9e8f7d4  gcc/testsuite/g++.dg/Wcast-function-type.C
  f2143b28e578a3bad2b2e83b50e55a09  gcc/testsuite/g++.dg/Wclass-memaccess-2.C
  8beea6608726e30b4c6e45d68c7fd049  gcc/testsuite/g++.dg/Wclass-memaccess-3.C
  a870375da7bcd4c5c455867aab227d04  gcc/testsuite/g++.dg/Wclass-memaccess-4.C
+ 4ba67574e50be395fe4f4c58eaac86a7  gcc/testsuite/g++.dg/Wclass-memaccess-5.C
  0c3f9ec615c7fb98f24e74081dfa3a73  gcc/testsuite/g++.dg/Wclass-memaccess.C
  5ae126d2bd8ea7c9e7da7c0f0bf249a8  gcc/testsuite/g++.dg/Wframe-address-in-Wall.C
  5ba575936ea99c0ac6a33f32f31ed443  gcc/testsuite/g++.dg/Wframe-address.C
+ d3da67df470514d2b026a69fffe2d402  gcc/testsuite/g++.dg/Wmissing-attributes-1.C
  8c0d0fa0bf8f3a3120d9b417967af343  gcc/testsuite/g++.dg/Wmissing-attributes.C
  4988a6deade72f34e9e9cc8e9fb583a9  gcc/testsuite/g++.dg/Wno-frame-address.C
  f0d27e546f279d0c350c8d8c55b73eb0  gcc/testsuite/g++.dg/Wshadow.C
*************** f564d0148a08a312e7e15ffb1de694d1  gcc/te
*** 9921,9926 ****
--- 10245,10251 ----
  4abed4043e768a5054f965fe816ae8ea  gcc/testsuite/g++.dg/abi/abi-tag9.C
  c7c251f16058a4d4f1db8e0df28385ff  gcc/testsuite/g++.dg/abi/align1.C
  53fac1fa94eb44628f1a30c989aa1635  gcc/testsuite/g++.dg/abi/align2.C
+ 73fcf08640223665c619e0649f3fb6bc  gcc/testsuite/g++.dg/abi/align3.C
  2e2b81268b12d9840736f5f280fdcd82  gcc/testsuite/g++.dg/abi/anon1.C
  d612831779ae34b6217159ef7510dee7  gcc/testsuite/g++.dg/abi/anon2.C
  4024cd0fe696880556f4db4786e81c53  gcc/testsuite/g++.dg/abi/anon3.C
*************** ae8183ac34cf252335be257cff5018dc  gcc/te
*** 9953,10008 ****
  9b5fe1eda32f4e6ddea3106ea8d9f1da  gcc/testsuite/g++.dg/abi/dtor1.C
  9d59f34907d1d9588084fc4da7772c02  gcc/testsuite/g++.dg/abi/empty10.C
  5ce11bfa25802ab713c346269c112592  gcc/testsuite/g++.dg/abi/empty11.C
! d83fd47aaca9d94d6980cfbba538c905  gcc/testsuite/g++.dg/abi/empty12.C
  a67351c73c174a85fd80c1312ec10944  gcc/testsuite/g++.dg/abi/empty12.h
  1630e6d5985ef065e5f89a09e1ad7de2  gcc/testsuite/g++.dg/abi/empty12a.c
! 2691548ce45d764d941d235be1ee2edc  gcc/testsuite/g++.dg/abi/empty13.C
  a67351c73c174a85fd80c1312ec10944  gcc/testsuite/g++.dg/abi/empty13.h
  783bc42becbccf0d7968fd3bab1ba325  gcc/testsuite/g++.dg/abi/empty13a.c
! ffa4b143f0018d4184dfad1521abf8c5  gcc/testsuite/g++.dg/abi/empty14.C
  2d8a973f4693f0c2599c71d4bd75970d  gcc/testsuite/g++.dg/abi/empty14.h
  d8ba2e9e7eb3d27c8b4a48aa1856c030  gcc/testsuite/g++.dg/abi/empty14a.c
! c61b6e16786b5a5d57d5a58e52e62e91  gcc/testsuite/g++.dg/abi/empty15.C
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  8ce25fbdb0f027f2b0b568ee1c7639b1  gcc/testsuite/g++.dg/abi/empty15a.c
! ebe429908b6dd1932f65a7e7368056fb  gcc/testsuite/g++.dg/abi/empty16.C
  83c1bcb566ddcd409f40c31b6c8e0983  gcc/testsuite/g++.dg/abi/empty16.h
  bf743a5f82f85d43f667e969ff6ff1fe  gcc/testsuite/g++.dg/abi/empty16a.c
! 7c5a711af4e57f967d178b84406f31f1  gcc/testsuite/g++.dg/abi/empty17.C
  adb63dc33cd067de7bd5aff45cb6d595  gcc/testsuite/g++.dg/abi/empty17.h
  c32cd8bf7607a12f3a4538c5b0ecc54d  gcc/testsuite/g++.dg/abi/empty17a.c
! 8c7d1d499f5f9cefb49a38582312cdc2  gcc/testsuite/g++.dg/abi/empty18.C
  d39b28b357ba923c05422cd19c59e3e5  gcc/testsuite/g++.dg/abi/empty18.h
  5c07acbda0be0c2cc075d7cb857d3a34  gcc/testsuite/g++.dg/abi/empty18a.c
! 58ac4319f6767ff1793b4ec8abdf038d  gcc/testsuite/g++.dg/abi/empty19.C
  d34f60c5cd3e144b5da52fca4f005100  gcc/testsuite/g++.dg/abi/empty19.h
  0bf6c5fe5ca61040974a834f61745570  gcc/testsuite/g++.dg/abi/empty19a.c
  891040fc5976cd0d45d02844947ac008  gcc/testsuite/g++.dg/abi/empty20.C
  385f78cbb6a5549dbc8ec10bf138f57e  gcc/testsuite/g++.dg/abi/empty21.C
! 578f6801eec84e75ad4a54b3726791aa  gcc/testsuite/g++.dg/abi/empty22.C
  004f629374b4c567efc4e4e63d3ac560  gcc/testsuite/g++.dg/abi/empty22.h
  7850a59e39d82507fd087278a2cd79f9  gcc/testsuite/g++.dg/abi/empty22a.c
  bb2799fbd43a031988487c6f0dd4dbba  gcc/testsuite/g++.dg/abi/empty23.C
  f0b6278a62b6c89e97bcbf083d6f17f9  gcc/testsuite/g++.dg/abi/empty24.C
! 64bd965d7cebc647161332822fb38de7  gcc/testsuite/g++.dg/abi/empty25.C
  55bee7b1c82d91987e3cd6b7bdb38113  gcc/testsuite/g++.dg/abi/empty25.h
  e7af2f0a6c31f4aee9fb356be3c25cd1  gcc/testsuite/g++.dg/abi/empty25a.c
! e783dc972183ffc0ca87d5fc8daef0cb  gcc/testsuite/g++.dg/abi/empty26.C
  004f629374b4c567efc4e4e63d3ac560  gcc/testsuite/g++.dg/abi/empty26.h
  f8fee29cdc75f054e4b9e0c1cc9dca5a  gcc/testsuite/g++.dg/abi/empty26a.c
  10a11e6d098463595790e189e7be2063  gcc/testsuite/g++.dg/abi/empty27.C
  f07ecb2c96198bf16a1aa3d6b70a6b5f  gcc/testsuite/g++.dg/abi/empty28.C
  439cb06f574d525a195f08b4a22195a1  gcc/testsuite/g++.dg/abi/empty29.C
  20ddbca2f51ca8d3dc3d3c2645fbad14  gcc/testsuite/g++.dg/abi/empty4.C
  7f1427fcf02f49105008a4e13eb98972  gcc/testsuite/g++.dg/abi/empty5.C
  d3abb8f9307b552b4063b456bfe2f213  gcc/testsuite/g++.dg/abi/empty7.C
  27d608837dfdc6090e3ac0eaa55f3981  gcc/testsuite/g++.dg/abi/empty8.C
  bbab6b1f77eed09d3a2c4f07991cdb40  gcc/testsuite/g++.dg/abi/empty9.C
  7cbe4b1023b73117f1fca798569bc98d  gcc/testsuite/g++.dg/abi/enum1.C
! 36a61d87710bbb301fc1b2db03f54b26  gcc/testsuite/g++.dg/abi/forced.C
  81d54a8ce0f88af87b94623f3b24e0b5  gcc/testsuite/g++.dg/abi/guard1.C
! 670e84a04b4051967e333717ccd35f48  gcc/testsuite/g++.dg/abi/guard2.C
  aeaf70ac2113165664ca8c8208320777  gcc/testsuite/g++.dg/abi/guard3.C
  111786b8402b8dd840adfb9a53cf3aac  gcc/testsuite/g++.dg/abi/inline1.C
  0da487653363b2d57b4be53f3c1e584f  gcc/testsuite/g++.dg/abi/invisiref1.C
  f567a6076697b72a2d4da2d5f3d44e24  gcc/testsuite/g++.dg/abi/invisiref1a.C
--- 10278,10335 ----
  9b5fe1eda32f4e6ddea3106ea8d9f1da  gcc/testsuite/g++.dg/abi/dtor1.C
  9d59f34907d1d9588084fc4da7772c02  gcc/testsuite/g++.dg/abi/empty10.C
  5ce11bfa25802ab713c346269c112592  gcc/testsuite/g++.dg/abi/empty11.C
! 2c1804bc92d6990927272d950fdb1add  gcc/testsuite/g++.dg/abi/empty12.C
  a67351c73c174a85fd80c1312ec10944  gcc/testsuite/g++.dg/abi/empty12.h
  1630e6d5985ef065e5f89a09e1ad7de2  gcc/testsuite/g++.dg/abi/empty12a.c
! 5d4853af822e61e7fac02a620dc160c7  gcc/testsuite/g++.dg/abi/empty13.C
  a67351c73c174a85fd80c1312ec10944  gcc/testsuite/g++.dg/abi/empty13.h
  783bc42becbccf0d7968fd3bab1ba325  gcc/testsuite/g++.dg/abi/empty13a.c
! d4a2225a22f70e69ca59136f9a1b16ae  gcc/testsuite/g++.dg/abi/empty14.C
  2d8a973f4693f0c2599c71d4bd75970d  gcc/testsuite/g++.dg/abi/empty14.h
  d8ba2e9e7eb3d27c8b4a48aa1856c030  gcc/testsuite/g++.dg/abi/empty14a.c
! dd92a71887e664f6c40c6d165e73bf35  gcc/testsuite/g++.dg/abi/empty15.C
  68930f11b25b2f12499752ed5cfe247c  gcc/testsuite/g++.dg/abi/empty15.h
  8ce25fbdb0f027f2b0b568ee1c7639b1  gcc/testsuite/g++.dg/abi/empty15a.c
! 810e2646ffc23a5fcc2d6298655f2d6b  gcc/testsuite/g++.dg/abi/empty16.C
  83c1bcb566ddcd409f40c31b6c8e0983  gcc/testsuite/g++.dg/abi/empty16.h
  bf743a5f82f85d43f667e969ff6ff1fe  gcc/testsuite/g++.dg/abi/empty16a.c
! 199eebd280bc5036f7a9fcf8633f1b77  gcc/testsuite/g++.dg/abi/empty17.C
  adb63dc33cd067de7bd5aff45cb6d595  gcc/testsuite/g++.dg/abi/empty17.h
  c32cd8bf7607a12f3a4538c5b0ecc54d  gcc/testsuite/g++.dg/abi/empty17a.c
! e9db1329dacc719297595cc5592aef2d  gcc/testsuite/g++.dg/abi/empty18.C
  d39b28b357ba923c05422cd19c59e3e5  gcc/testsuite/g++.dg/abi/empty18.h
  5c07acbda0be0c2cc075d7cb857d3a34  gcc/testsuite/g++.dg/abi/empty18a.c
! 00a4795f81c059db19e1c5692f26aae0  gcc/testsuite/g++.dg/abi/empty19.C
  d34f60c5cd3e144b5da52fca4f005100  gcc/testsuite/g++.dg/abi/empty19.h
  0bf6c5fe5ca61040974a834f61745570  gcc/testsuite/g++.dg/abi/empty19a.c
  891040fc5976cd0d45d02844947ac008  gcc/testsuite/g++.dg/abi/empty20.C
  385f78cbb6a5549dbc8ec10bf138f57e  gcc/testsuite/g++.dg/abi/empty21.C
! 800a451832c8df761156a64d8974ab89  gcc/testsuite/g++.dg/abi/empty22.C
  004f629374b4c567efc4e4e63d3ac560  gcc/testsuite/g++.dg/abi/empty22.h
  7850a59e39d82507fd087278a2cd79f9  gcc/testsuite/g++.dg/abi/empty22a.c
  bb2799fbd43a031988487c6f0dd4dbba  gcc/testsuite/g++.dg/abi/empty23.C
  f0b6278a62b6c89e97bcbf083d6f17f9  gcc/testsuite/g++.dg/abi/empty24.C
! 2b6a4cad450908edb19fbc18f75617a9  gcc/testsuite/g++.dg/abi/empty25.C
  55bee7b1c82d91987e3cd6b7bdb38113  gcc/testsuite/g++.dg/abi/empty25.h
  e7af2f0a6c31f4aee9fb356be3c25cd1  gcc/testsuite/g++.dg/abi/empty25a.c
! e7fd9645583c30de9dacdd50bf8e05cc  gcc/testsuite/g++.dg/abi/empty26.C
  004f629374b4c567efc4e4e63d3ac560  gcc/testsuite/g++.dg/abi/empty26.h
  f8fee29cdc75f054e4b9e0c1cc9dca5a  gcc/testsuite/g++.dg/abi/empty26a.c
  10a11e6d098463595790e189e7be2063  gcc/testsuite/g++.dg/abi/empty27.C
  f07ecb2c96198bf16a1aa3d6b70a6b5f  gcc/testsuite/g++.dg/abi/empty28.C
  439cb06f574d525a195f08b4a22195a1  gcc/testsuite/g++.dg/abi/empty29.C
+ cca4aaee0c3c6ff85f8c623aade1f4b5  gcc/testsuite/g++.dg/abi/empty30.C
  20ddbca2f51ca8d3dc3d3c2645fbad14  gcc/testsuite/g++.dg/abi/empty4.C
  7f1427fcf02f49105008a4e13eb98972  gcc/testsuite/g++.dg/abi/empty5.C
  d3abb8f9307b552b4063b456bfe2f213  gcc/testsuite/g++.dg/abi/empty7.C
  27d608837dfdc6090e3ac0eaa55f3981  gcc/testsuite/g++.dg/abi/empty8.C
  bbab6b1f77eed09d3a2c4f07991cdb40  gcc/testsuite/g++.dg/abi/empty9.C
  7cbe4b1023b73117f1fca798569bc98d  gcc/testsuite/g++.dg/abi/enum1.C
! f3ab2d1f8d99db36cb9e2cd278c1f937  gcc/testsuite/g++.dg/abi/forced.C
  81d54a8ce0f88af87b94623f3b24e0b5  gcc/testsuite/g++.dg/abi/guard1.C
! af2f348dc394b09edc0540c3c0e13115  gcc/testsuite/g++.dg/abi/guard2.C
  aeaf70ac2113165664ca8c8208320777  gcc/testsuite/g++.dg/abi/guard3.C
+ 30c2238f695a2b333dea47d996d50abc  gcc/testsuite/g++.dg/abi/guard4.C
  111786b8402b8dd840adfb9a53cf3aac  gcc/testsuite/g++.dg/abi/inline1.C
  0da487653363b2d57b4be53f3c1e584f  gcc/testsuite/g++.dg/abi/invisiref1.C
  f567a6076697b72a2d4da2d5f3d44e24  gcc/testsuite/g++.dg/abi/invisiref1a.C
*************** afcddf1b30dc19c258215591ad57145a  gcc/te
*** 10012,10029 ****
  bb31b4837b79e765fedbacaa8bb430d3  gcc/testsuite/g++.dg/abi/key2.C
  d06c8255efe2bb66e4bb6606d9fb8b0c  gcc/testsuite/g++.dg/abi/lambda-capture1.C
  2c4486b0b97a7d8919b8fffad18a0478  gcc/testsuite/g++.dg/abi/lambda-static-1.C
  44d0f298ab4a8fb8dcb8f4930bac5fd0  gcc/testsuite/g++.dg/abi/layout1.C
  629ced02f7a4d9d57a9b120d8c7bbbde  gcc/testsuite/g++.dg/abi/layout2.C
  6372326d116dead9b369290e7a9ccb46  gcc/testsuite/g++.dg/abi/layout3.C
  1b56fef803fe85ec97121919ad3ba2b9  gcc/testsuite/g++.dg/abi/local1-a.cc
  4ab5160617737559c38e1ffb650b797e  gcc/testsuite/g++.dg/abi/local1.C
  34ecb36205a7c22314ddda92d332a23d  gcc/testsuite/g++.dg/abi/local2.C
! f8d0c657f02f5ffd1a597dad4a5fec57  gcc/testsuite/g++.dg/abi/macro0.C
  06f0193b05c4ae743af4e38aec8d1122  gcc/testsuite/g++.dg/abi/macro2.C
  5a637c99e4aa66fa130b6c1d893fc41e  gcc/testsuite/g++.dg/abi/main.C
  ad6491d281aef40e7e1cf7d856f2aa05  gcc/testsuite/g++.dg/abi/mangle-arm-crypto.C
! 9d6bc38d9a9f6f77a54253b4bd5637a9  gcc/testsuite/g++.dg/abi/mangle-neon-aarch64.C
! 0772782dd64649ac82cfa7e52258b845  gcc/testsuite/g++.dg/abi/mangle-neon.C
  6cb105420cef0cf42e64341086161402  gcc/testsuite/g++.dg/abi/mangle-regparm.C
  6390442984f217030ab16eaa73d32de0  gcc/testsuite/g++.dg/abi/mangle-regparm1a.C
  2e043f4f1db73efd7ba04afe8375a72e  gcc/testsuite/g++.dg/abi/mangle1.C
--- 10339,10357 ----
  bb31b4837b79e765fedbacaa8bb430d3  gcc/testsuite/g++.dg/abi/key2.C
  d06c8255efe2bb66e4bb6606d9fb8b0c  gcc/testsuite/g++.dg/abi/lambda-capture1.C
  2c4486b0b97a7d8919b8fffad18a0478  gcc/testsuite/g++.dg/abi/lambda-static-1.C
+ 75bbddd165a101e33a88857c65eb383d  gcc/testsuite/g++.dg/abi/lambda-vis.C
  44d0f298ab4a8fb8dcb8f4930bac5fd0  gcc/testsuite/g++.dg/abi/layout1.C
  629ced02f7a4d9d57a9b120d8c7bbbde  gcc/testsuite/g++.dg/abi/layout2.C
  6372326d116dead9b369290e7a9ccb46  gcc/testsuite/g++.dg/abi/layout3.C
  1b56fef803fe85ec97121919ad3ba2b9  gcc/testsuite/g++.dg/abi/local1-a.cc
  4ab5160617737559c38e1ffb650b797e  gcc/testsuite/g++.dg/abi/local1.C
  34ecb36205a7c22314ddda92d332a23d  gcc/testsuite/g++.dg/abi/local2.C
! c2831c977cea5cc58301e51f6554c7a9  gcc/testsuite/g++.dg/abi/macro0.C
  06f0193b05c4ae743af4e38aec8d1122  gcc/testsuite/g++.dg/abi/macro2.C
  5a637c99e4aa66fa130b6c1d893fc41e  gcc/testsuite/g++.dg/abi/main.C
  ad6491d281aef40e7e1cf7d856f2aa05  gcc/testsuite/g++.dg/abi/mangle-arm-crypto.C
! 5a436d692434f9722c7fe2a71f3090a0  gcc/testsuite/g++.dg/abi/mangle-neon-aarch64.C
! 1258c53ab6daad5251b29f5a76d70e18  gcc/testsuite/g++.dg/abi/mangle-neon.C
  6cb105420cef0cf42e64341086161402  gcc/testsuite/g++.dg/abi/mangle-regparm.C
  6390442984f217030ab16eaa73d32de0  gcc/testsuite/g++.dg/abi/mangle-regparm1a.C
  2e043f4f1db73efd7ba04afe8375a72e  gcc/testsuite/g++.dg/abi/mangle1.C
*************** e2fc150d746b05b2efcbaf25872d2c83  gcc/te
*** 10069,10075 ****
  a84434f5c46a2c8ce5e8fc7546a02ebd  gcc/testsuite/g++.dg/abi/mangle50.C
  34fb30b2f192e308ecc1674dc3ba8b78  gcc/testsuite/g++.dg/abi/mangle51.C
  1147b07a0fef33ae8c193d3d7348e448  gcc/testsuite/g++.dg/abi/mangle52.C
! 269ead6e00689e1fbf9b85b8492cf690  gcc/testsuite/g++.dg/abi/mangle53.C
  d43f8e727dca25ae9ab67e20413201c0  gcc/testsuite/g++.dg/abi/mangle54.C
  b9028edde34a935e2d9b697792d95a8c  gcc/testsuite/g++.dg/abi/mangle55.C
  bf267f0818c0365757d528f8dd92f3f1  gcc/testsuite/g++.dg/abi/mangle56.C
--- 10397,10403 ----
  a84434f5c46a2c8ce5e8fc7546a02ebd  gcc/testsuite/g++.dg/abi/mangle50.C
  34fb30b2f192e308ecc1674dc3ba8b78  gcc/testsuite/g++.dg/abi/mangle51.C
  1147b07a0fef33ae8c193d3d7348e448  gcc/testsuite/g++.dg/abi/mangle52.C
! cbb3c939ee68895d2bb77783d61e7f6b  gcc/testsuite/g++.dg/abi/mangle53.C
  d43f8e727dca25ae9ab67e20413201c0  gcc/testsuite/g++.dg/abi/mangle54.C
  b9028edde34a935e2d9b697792d95a8c  gcc/testsuite/g++.dg/abi/mangle55.C
  bf267f0818c0365757d528f8dd92f3f1  gcc/testsuite/g++.dg/abi/mangle56.C
*************** cd207cce9213418d57092b0421db04a0  gcc/te
*** 10091,10098 ****
  0cdd24a1b15598b312927e271f3f773e  gcc/testsuite/g++.dg/abi/mangle7.C
  09d5c0b39937ef8fcdbd59cc1b8a35f3  gcc/testsuite/g++.dg/abi/mangle70.C
  bdb7d5e9e8b96f820db6f1caaf850dfc  gcc/testsuite/g++.dg/abi/mangle71.C
! d8f9a5b68d809aa87d02fa7068210f81  gcc/testsuite/g++.dg/abi/mangle72.C
  b3ecb552fa1904358ec43eadbf16a954  gcc/testsuite/g++.dg/abi/mangle73.C
  cc6afae4c242d6e5a9083cec1a9a9907  gcc/testsuite/g++.dg/abi/mangle8.C
  7e14b0353ae53e5a5a8bcf850c4fcbc9  gcc/testsuite/g++.dg/abi/mangle9.C
  d85264fae2b4c2eb4d8629cb29c42e90  gcc/testsuite/g++.dg/abi/no-linkage-expr1.C
--- 10419,10428 ----
  0cdd24a1b15598b312927e271f3f773e  gcc/testsuite/g++.dg/abi/mangle7.C
  09d5c0b39937ef8fcdbd59cc1b8a35f3  gcc/testsuite/g++.dg/abi/mangle70.C
  bdb7d5e9e8b96f820db6f1caaf850dfc  gcc/testsuite/g++.dg/abi/mangle71.C
! e8f728908ea1c92ddf0ca367f3ddd8ef  gcc/testsuite/g++.dg/abi/mangle72.C
  b3ecb552fa1904358ec43eadbf16a954  gcc/testsuite/g++.dg/abi/mangle73.C
+ 1e408015b0df315173c32e6b3f5736cc  gcc/testsuite/g++.dg/abi/mangle74.C
+ 0016fd51a6bc2e14276cddc1051332e2  gcc/testsuite/g++.dg/abi/mangle75.C
  cc6afae4c242d6e5a9083cec1a9a9907  gcc/testsuite/g++.dg/abi/mangle8.C
  7e14b0353ae53e5a5a8bcf850c4fcbc9  gcc/testsuite/g++.dg/abi/mangle9.C
  d85264fae2b4c2eb4d8629cb29c42e90  gcc/testsuite/g++.dg/abi/no-linkage-expr1.C
*************** c88701df415b47ac9bf5cba84cf379ab  gcc/te
*** 10172,10179 ****
  a3ef49aa5fa035e0eaa1fb23c589fe61  gcc/testsuite/g++.dg/abi/vthunk2.C
  6881f6a907aed22e3604db9a81d71753  gcc/testsuite/g++.dg/abi/vthunk3.C
  59cdef1c2f5ac26231205b723cb9ea52  gcc/testsuite/g++.dg/abi/vtt1.C
! 9079c44ba7eab35f21fd683bbd668e13  gcc/testsuite/g++.dg/addr_builtin-1.C
! 73a35f476b67656704a611aaff8b8652  gcc/testsuite/g++.dg/asan/asan.exp
  aaab0b483d6b43b9fb8facfcf01ac3b3  gcc/testsuite/g++.dg/asan/asan_globals_test-wrapper.cc
  58f1893fa192cc0429f68ba9628696b9  gcc/testsuite/g++.dg/asan/asan_globals_test.cc
  573f81866bae96b4c422317d9f9f630c  gcc/testsuite/g++.dg/asan/asan_mem_test.cc
--- 10502,10520 ----
  a3ef49aa5fa035e0eaa1fb23c589fe61  gcc/testsuite/g++.dg/abi/vthunk2.C
  6881f6a907aed22e3604db9a81d71753  gcc/testsuite/g++.dg/abi/vthunk3.C
  59cdef1c2f5ac26231205b723cb9ea52  gcc/testsuite/g++.dg/abi/vtt1.C
! cb66889e261971e64a6568617bffaeaa  gcc/testsuite/g++.dg/addr_builtin-1.C
! ecd03bae079c6305cd465a27f7220ff6  gcc/testsuite/g++.dg/analyzer/analyzer.exp
! 0918dccee8951925f7bc4640874a6cd3  gcc/testsuite/g++.dg/analyzer/cstdlib-2.C
! b1051c81ee9929eae4057f7d1ce5ecd2  gcc/testsuite/g++.dg/analyzer/cstdlib.C
! e618363917558f650a6b91cce53eb8d2  gcc/testsuite/g++.dg/analyzer/malloc.C
! c1b3414587c698d22d3b866194a5a95e  gcc/testsuite/g++.dg/analyzer/pr93212.C
! 6730f749b069d8ed2ba525a0ff83ad2c  gcc/testsuite/g++.dg/analyzer/pr93288.C
! c12e9b1c9d4173ff464e74ea78ab647e  gcc/testsuite/g++.dg/analyzer/pr93777.C
! a2fd899038ad8292f72a6822b197251e  gcc/testsuite/g++.dg/analyzer/pr93899.C
! a2758017cbe70d6725a03103a1efc89c  gcc/testsuite/g++.dg/analyzer/pr93950.C
! af6376136b82ff87b709854f25d0da2b  gcc/testsuite/g++.dg/analyzer/pr94028.C
! 52afe02bc242a0578da458c6b600f7a9  gcc/testsuite/g++.dg/analyzer/pr94816.C
! 8fbe9f1a2d96d5386432457537ce4c2b  gcc/testsuite/g++.dg/asan/asan.exp
  aaab0b483d6b43b9fb8facfcf01ac3b3  gcc/testsuite/g++.dg/asan/asan_globals_test-wrapper.cc
  58f1893fa192cc0429f68ba9628696b9  gcc/testsuite/g++.dg/asan/asan_globals_test.cc
  573f81866bae96b4c422317d9f9f630c  gcc/testsuite/g++.dg/asan/asan_mem_test.cc
*************** af3ff602be3b5ad56f6eeab78b01f4c3  gcc/te
*** 10228,10237 ****
  a416f70498c96b063db3ef076881b554  gcc/testsuite/g++.dg/asan/use-after-scope-types-4.C
  4d734c312f8b167f5433fb979b4ef213  gcc/testsuite/g++.dg/asan/use-after-scope-types-5.C
  e20a12eb6455f420adb919299f6e8991  gcc/testsuite/g++.dg/asan/use-after-scope-types.h
! 01499301a7233f3e3e0bac80890e7dea  gcc/testsuite/g++.dg/asm-qual-1.C
  0a7cdd480ff9677cd742fad1ef91da3a  gcc/testsuite/g++.dg/asm-qual-2.C
! 917076cae2072eb9f1a65db5635ccef7  gcc/testsuite/g++.dg/asm-qual-3.C
! 8783d2100c8c7d678addad2d680c9fa8  gcc/testsuite/g++.dg/bprob/bprob.exp
  6683eda46cb30a95dcb3ae310aa86684  gcc/testsuite/g++.dg/bprob/g++-bprob-1.C
  91292dc36de1287d9de59661dd0c8c78  gcc/testsuite/g++.dg/bprob/g++-bprob-2.C
  eb7c2ac5d3e686273e3fe6fe17a3abe4  gcc/testsuite/g++.dg/cdce3.C
--- 10569,10578 ----
  a416f70498c96b063db3ef076881b554  gcc/testsuite/g++.dg/asan/use-after-scope-types-4.C
  4d734c312f8b167f5433fb979b4ef213  gcc/testsuite/g++.dg/asan/use-after-scope-types-5.C
  e20a12eb6455f420adb919299f6e8991  gcc/testsuite/g++.dg/asan/use-after-scope-types.h
! 7876e3ae48981ffdea338e795be1efe9  gcc/testsuite/g++.dg/asm-qual-1.C
  0a7cdd480ff9677cd742fad1ef91da3a  gcc/testsuite/g++.dg/asm-qual-2.C
! d20368f5d5a6e496d867b6db2befc2af  gcc/testsuite/g++.dg/asm-qual-3.C
! 3f82172340234f6a96fec5c00f7bcbae  gcc/testsuite/g++.dg/bprob/bprob.exp
  6683eda46cb30a95dcb3ae310aa86684  gcc/testsuite/g++.dg/bprob/g++-bprob-1.C
  91292dc36de1287d9de59661dd0c8c78  gcc/testsuite/g++.dg/bprob/g++-bprob-2.C
  eb7c2ac5d3e686273e3fe6fe17a3abe4  gcc/testsuite/g++.dg/cdce3.C
*************** bd34927c7e8ef0637a91744aa30c8e22  gcc/te
*** 10243,10249 ****
  13aa9df754ce327f35901d755310d167  gcc/testsuite/g++.dg/charset/asm5.c
  188e64ef71cd1832cf590f89eb899d5b  gcc/testsuite/g++.dg/charset/attribute1.c
  5ec905da0c5303d292f6f23f2befdd9b  gcc/testsuite/g++.dg/charset/attribute2.c
! 5be05a2962dd12fddc67772e3b791c16  gcc/testsuite/g++.dg/charset/charset.exp
  c3f1b1efe5249f47d609a5022d321c0a  gcc/testsuite/g++.dg/charset/extern1.cc
  e00c15044b80ea8ae41ddca791f728b5  gcc/testsuite/g++.dg/charset/extern2.cc
  8c029ca8175e4d8995ea0dbac6040733  gcc/testsuite/g++.dg/charset/extern3.cc
--- 10584,10590 ----
  13aa9df754ce327f35901d755310d167  gcc/testsuite/g++.dg/charset/asm5.c
  188e64ef71cd1832cf590f89eb899d5b  gcc/testsuite/g++.dg/charset/attribute1.c
  5ec905da0c5303d292f6f23f2befdd9b  gcc/testsuite/g++.dg/charset/attribute2.c
! b24fe142cc1226303cf33c6109301302  gcc/testsuite/g++.dg/charset/charset.exp
  c3f1b1efe5249f47d609a5022d321c0a  gcc/testsuite/g++.dg/charset/extern1.cc
  e00c15044b80ea8ae41ddca791f728b5  gcc/testsuite/g++.dg/charset/extern2.cc
  8c029ca8175e4d8995ea0dbac6040733  gcc/testsuite/g++.dg/charset/extern3.cc
*************** f21dc1eb54ea34814c912bb958cc243b  gcc/te
*** 10282,10288 ****
  3e6b5a438641d0fa418b9b6b59dc9ad5  gcc/testsuite/g++.dg/compat/abi/vbase8-4_main.C
  218fc83d35fc2202ce2c23a8d88a2a0e  gcc/testsuite/g++.dg/compat/abi/vbase8-4_x.C
  ad654d45c988963d6d91e514325cd68c  gcc/testsuite/g++.dg/compat/abi/vbase8-4_y.C
! 12192492a78d71601ea603499ba8a2c9  gcc/testsuite/g++.dg/compat/break/README
  a1f42f9828f95c9f3dd670a142b67209  gcc/testsuite/g++.dg/compat/break/bitfield5.h
  a4f5bc9b9eeba848df2b3660451312e5  gcc/testsuite/g++.dg/compat/break/bitfield5_main.C
  34a963a4f73f5fc81a2a3c61cb1410b4  gcc/testsuite/g++.dg/compat/break/bitfield5_x.C
--- 10623,10629 ----
  3e6b5a438641d0fa418b9b6b59dc9ad5  gcc/testsuite/g++.dg/compat/abi/vbase8-4_main.C
  218fc83d35fc2202ce2c23a8d88a2a0e  gcc/testsuite/g++.dg/compat/abi/vbase8-4_x.C
  ad654d45c988963d6d91e514325cd68c  gcc/testsuite/g++.dg/compat/abi/vbase8-4_y.C
! 6ea04d217d21b87cb6270731a49c10ab  gcc/testsuite/g++.dg/compat/break/README
  a1f42f9828f95c9f3dd670a142b67209  gcc/testsuite/g++.dg/compat/break/bitfield5.h
  a4f5bc9b9eeba848df2b3660451312e5  gcc/testsuite/g++.dg/compat/break/bitfield5_main.C
  34a963a4f73f5fc81a2a3c61cb1410b4  gcc/testsuite/g++.dg/compat/break/bitfield5_x.C
*************** d9e96ae25c2319373bcfd08d3028762f  gcc/te
*** 10303,10309 ****
  c066ba2e23a50eda1497704cad37719c  gcc/testsuite/g++.dg/compat/break/vbase11_main.C
  cc9fd160c8ac0d554f08ed78757c1ad7  gcc/testsuite/g++.dg/compat/break/vbase11_x.C
  3af15235a86640de95ef01c264b9a669  gcc/testsuite/g++.dg/compat/break/vbase11_y.C
! c60d4cb96e6b612d152b582125b1b762  gcc/testsuite/g++.dg/compat/compat.exp
  d84d0fab6bdaa40e3302c2dc1bd89d10  gcc/testsuite/g++.dg/compat/decimal/compat-common.h
  5606bac1873edfc020404d944e030ebb  gcc/testsuite/g++.dg/compat/decimal/decimal-dummy.h
  3d52f6f9878705d4ff92b2d02c56e07f  gcc/testsuite/g++.dg/compat/decimal/pass-1_main.C
--- 10644,10650 ----
  c066ba2e23a50eda1497704cad37719c  gcc/testsuite/g++.dg/compat/break/vbase11_main.C
  cc9fd160c8ac0d554f08ed78757c1ad7  gcc/testsuite/g++.dg/compat/break/vbase11_x.C
  3af15235a86640de95ef01c264b9a669  gcc/testsuite/g++.dg/compat/break/vbase11_y.C
! 3e6bff6590ca30834c6847a59801fc53  gcc/testsuite/g++.dg/compat/compat.exp
  d84d0fab6bdaa40e3302c2dc1bd89d10  gcc/testsuite/g++.dg/compat/decimal/compat-common.h
  5606bac1873edfc020404d944e030ebb  gcc/testsuite/g++.dg/compat/decimal/decimal-dummy.h
  3d52f6f9878705d4ff92b2d02c56e07f  gcc/testsuite/g++.dg/compat/decimal/pass-1_main.C
*************** e6954ac1ae67eacbb067ca0a7269df99  gcc/te
*** 10401,10605 ****
  7099b2ccdbe9faffb91a1279b3d9c958  gcc/testsuite/g++.dg/compat/init/init-ref2_main.C
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  75bddd0f3c0ceb101b0c3111cedc4fb4  gcc/testsuite/g++.dg/compat/init/init-ref2_y.C
! f8c98464fd2d26c8ec30d6d9caddc844  gcc/testsuite/g++.dg/compat/struct-layout-1.exp
  b3150d6e06b56824040f5b2dadcf18ce  gcc/testsuite/g++.dg/compat/struct-layout-1.h
! 5764db95d85b972fac8494daae7c161b  gcc/testsuite/g++.dg/compat/struct-layout-1_generate.c
! ba9b2b011bb6d65e0f78322916048095  gcc/testsuite/g++.dg/compat/struct-layout-1_x1.h
  7d588bff78cea94dd3152a4c181ee8c9  gcc/testsuite/g++.dg/compat/struct-layout-1_x2.h
! 540c5c4712244b57919a4e690783e793  gcc/testsuite/g++.dg/compat/struct-layout-1_y1.h
  7dc3e674ef2752731b6cd90ebd1aeb0a  gcc/testsuite/g++.dg/compat/struct-layout-1_y2.h
  7d6e46af1d90aeac247ba7174a61e45e  gcc/testsuite/g++.dg/concepts/abbrev1.C
  bbe257fc7d17e04ac4c36e490e7b696c  gcc/testsuite/g++.dg/concepts/abbrev2.C
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! aaaa29b6c39c1fbdb4c4fcde1f511d3c  gcc/testsuite/g++.dg/concepts/alias3.C
! dfe452123d550c3726918665c198c439  gcc/testsuite/g++.dg/concepts/alias4.C
! 9b07329ffde7e3ab73e48730b264b0ea  gcc/testsuite/g++.dg/concepts/auto1.C
! f971c7fc20ea5153ff2db74e41c8dd4b  gcc/testsuite/g++.dg/concepts/auto3.C
! 7d8b6228df7afe31d3b9e613d58e4ec5  gcc/testsuite/g++.dg/concepts/auto4.C
! 7303ec3af0573ef750a1fb389aeec53d  gcc/testsuite/g++.dg/concepts/class-deduction1.C
! 27d70640425a392e01875d0ec6be9397  gcc/testsuite/g++.dg/concepts/class-deduction2.C
! cf06495040cfea83dc099072aa0c8a46  gcc/testsuite/g++.dg/concepts/class.C
! e5da2c1829e56ebbac7505ac623c5424  gcc/testsuite/g++.dg/concepts/class1.C
! 81a4123aaca71749da65667e0ba2731b  gcc/testsuite/g++.dg/concepts/class2.C
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! 692499c2560134265269b5877c68e133  gcc/testsuite/g++.dg/concepts/class4.C
! ba3d4854575b45fcffb3c72905ea4efe  gcc/testsuite/g++.dg/concepts/class5.C
! 56a0b73845900d5520e98b230547b786  gcc/testsuite/g++.dg/concepts/class6.C
! 5d73f9f5854ca135d48d8f7317f70a59  gcc/testsuite/g++.dg/concepts/concepts-pr88395.C
! 5abd397f0f456d35458ca2dd797a76f8  gcc/testsuite/g++.dg/concepts/constrained-parm.C
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! 2b53f16b163d70e3646e4e4f6d701f1d  gcc/testsuite/g++.dg/concepts/disjunction1.C
! a15ff5379b3be6699b48b2b5b6463a72  gcc/testsuite/g++.dg/concepts/dr1430.C
! a8417c909324fcfc3cb4a236f70a7754  gcc/testsuite/g++.dg/concepts/equiv.C
! 3b934e8e20bbe3878795f28c23aad25d  gcc/testsuite/g++.dg/concepts/equiv2.C
! 1ffd7a86078ea874a6ef5696f5b8436a  gcc/testsuite/g++.dg/concepts/explicit-inst1.C
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! f992194ea23998da82c167b7b6072a42  gcc/testsuite/g++.dg/concepts/explicit-inst3.C
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  6b93c9bfdaa98cfad9237a7e53a8916a  gcc/testsuite/g++.dg/concepts/pr67656.C
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  80acdea1aca490469567728dd37ac486  gcc/testsuite/g++.dg/concepts/pr84423-1.C
  d3cc382cfea8828e266ca88b690a649f  gcc/testsuite/g++.dg/concepts/pr84423-2.C
  48f51db719dd544c776963adc2fda8f3  gcc/testsuite/g++.dg/concepts/pr84661.C
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--- 10742,10873 ----
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*************** f0aed431ce3357281e21fdd3e10a7644  gcc/te
*** 10608,10613 ****
--- 10876,10882 ----
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*** 10617,10623 ****
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*** 10629,10641 ****
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*** 10646,10651 ****
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*** 10653,10679 ****
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*************** e8c9f921aabceacddf429e950c792f1d  gcc/te
*** 10688,10695 ****
--- 11136,11145 ----
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*** 10697,10709 ****
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--- 11147,11164 ----
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*************** deb6cb3161ca7aaacc743984b6723181  gcc/te
*** 10715,10720 ****
--- 11170,11176 ----
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*************** e77445122d16af02724b7b51c72087ca  gcc/te
*** 10728,10733 ****
--- 11184,11190 ----
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*** 10738,10743 ****
--- 11195,11201 ----
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  1821a76c969bbe9fe98225106370d360  gcc/testsuite/g++.dg/cpp0x/Wzero-as-null-pointer-constant-2.C
*************** ba390f0baffc64985277221eab5182a0  gcc/te
*** 10747,10758 ****
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! 494bdfeaab84dab0e7afa29b43056b67  gcc/testsuite/g++.dg/cpp0x/alias-decl-1.C
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--- 11205,11217 ----
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+ 35eb2b0d89dd868b4665cb96608dd353  gcc/testsuite/g++.dg/cpp0x/aggr3.C
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! 11e072a762e1cb207c056d71c7d4a65e  gcc/testsuite/g++.dg/cpp0x/alias-decl-1.C
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*************** e03936252459ddf6c4b90fd566a2462b  gcc/te
*** 10761,10767 ****
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--- 11220,11226 ----
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*************** d1f72aa66557b83fa8a81de2cdda78ee  gcc/te
*** 10817,10822 ****
--- 11276,11283 ----
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*************** ef369c9d8dbd4b3ba5c764f92fc53a46  gcc/te
*** 10828,10833 ****
--- 11289,11298 ----
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*************** aebe00f4a175042412bb35a0e940886a  gcc/te
*** 10837,10842 ****
--- 11302,11308 ----
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*************** bbdaf73ad7b33d122b856e24d23ea582  gcc/te
*** 10847,10853 ****
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--- 11313,11319 ----
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*************** e679c3ff5560017984a9332e3cd8e485  gcc/te
*** 10855,10860 ****
--- 11321,11331 ----
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*************** bad0e410f23dcdb0acee4e8365284563  gcc/te
*** 10872,10881 ****
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--- 11343,11352 ----
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*************** e737c0b34a3d5c19f425eb66805b856e  gcc/te
*** 10902,10911 ****
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--- 11373,11382 ----
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*************** aa41699e56a27b02170cc57be10b3a5e  gcc/te
*** 10976,10981 ****
--- 11447,11453 ----
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*************** c5c31ddd271a1ea41e1cc0115e3e4305  gcc/te
*** 10983,10993 ****
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--- 11455,11467 ----
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*************** b2677ed5d88c259b9b0fac3db40c4180  gcc/te
*** 10998,11009 ****
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! f31ece5b8af07663a50281d823199cdb  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr6.C
  53691315132b119750fc419e5844dd1b  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr7.C
  2802ca42ee9d91cfb21c5e02dcf35ba4  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C
  baedeb1b9236f89f03d2fe34e0f45576  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr9.C
--- 11472,11483 ----
  a41c6fa5f9f050cf59e34e5334dd0947  gcc/testsuite/g++.dg/cpp0x/constexpr-arith-overflow.C
  4901daebef7a51847b08d357c96855a3  gcc/testsuite/g++.dg/cpp0x/constexpr-arith-overflow2.C
  d184daf58a1efefa9b5d9f2675332595  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr.C
! a507f11a2d85cb4ed8213ac9d2770e97  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr10.C
  8fd033f4e6b69599a1e293c45d0814cb  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr2.C
  0a82455c1794efadc3bbb4e4ba357339  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr3.C
  12a7829023637da75e6542a82c846dd8  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr4.C
  76b49e548152de94f9aa28dfd665f8ea  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr5.C
! f2d764af35d223fdeefcb56f4c29ecaf  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr6.C
  53691315132b119750fc419e5844dd1b  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr7.C
  2802ca42ee9d91cfb21c5e02dcf35ba4  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C
  baedeb1b9236f89f03d2fe34e0f45576  gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr9.C
*************** a3fe89999694d5e28c05f50283b43674  gcc/te
*** 11019,11030 ****
  8b3cdd4f7cd1165cdb6c78c54ac301a5  gcc/testsuite/g++.dg/cpp0x/constexpr-array18.C
  326904e2b7feccc3245b271683c77260  gcc/testsuite/g++.dg/cpp0x/constexpr-array19.C
  687c6e77d4af3cd918c0ff421773a66c  gcc/testsuite/g++.dg/cpp0x/constexpr-array2.C
! f15a074b6c2f23374821380fa691e3fd  gcc/testsuite/g++.dg/cpp0x/constexpr-array23.C
  3ac9c1d9fb2c907fc817b194d0e9d585  gcc/testsuite/g++.dg/cpp0x/constexpr-array24.C
  8b7c8e7c1b64cfa0626f7f2311c9fef5  gcc/testsuite/g++.dg/cpp0x/constexpr-array3.C
  6451aa5bb5fa736dda3ebad1dc2e8336  gcc/testsuite/g++.dg/cpp0x/constexpr-array4.C
  1d46f32449f9e0292d662928246ec784  gcc/testsuite/g++.dg/cpp0x/constexpr-array5.C
! b6b51682fe34441f8ce41479034a1762  gcc/testsuite/g++.dg/cpp0x/constexpr-array6.C
  b61d9249e720e8298080c0003dd18f1d  gcc/testsuite/g++.dg/cpp0x/constexpr-array7.C
  b94eb3b8291b32feaea3689ea9f3d351  gcc/testsuite/g++.dg/cpp0x/constexpr-array8.C
  7e45f3e21eeb41d59ac86b62d32ffdf6  gcc/testsuite/g++.dg/cpp0x/constexpr-array9.C
--- 11493,11507 ----
  8b3cdd4f7cd1165cdb6c78c54ac301a5  gcc/testsuite/g++.dg/cpp0x/constexpr-array18.C
  326904e2b7feccc3245b271683c77260  gcc/testsuite/g++.dg/cpp0x/constexpr-array19.C
  687c6e77d4af3cd918c0ff421773a66c  gcc/testsuite/g++.dg/cpp0x/constexpr-array2.C
! 827176e8937b1c43dc1626c4a7abe125  gcc/testsuite/g++.dg/cpp0x/constexpr-array20.C
! 9f1d33f7fbc48aae53064b372e0b7551  gcc/testsuite/g++.dg/cpp0x/constexpr-array21.C
! f4f262de9adf968192a3da56a3c4adc1  gcc/testsuite/g++.dg/cpp0x/constexpr-array22.C
! 2e25f59424b3bb9e86bdcc2fe91c41af  gcc/testsuite/g++.dg/cpp0x/constexpr-array23.C
  3ac9c1d9fb2c907fc817b194d0e9d585  gcc/testsuite/g++.dg/cpp0x/constexpr-array24.C
  8b7c8e7c1b64cfa0626f7f2311c9fef5  gcc/testsuite/g++.dg/cpp0x/constexpr-array3.C
  6451aa5bb5fa736dda3ebad1dc2e8336  gcc/testsuite/g++.dg/cpp0x/constexpr-array4.C
  1d46f32449f9e0292d662928246ec784  gcc/testsuite/g++.dg/cpp0x/constexpr-array5.C
! be6358dd3b71be0a5561e5437089998e  gcc/testsuite/g++.dg/cpp0x/constexpr-array6.C
  b61d9249e720e8298080c0003dd18f1d  gcc/testsuite/g++.dg/cpp0x/constexpr-array7.C
  b94eb3b8291b32feaea3689ea9f3d351  gcc/testsuite/g++.dg/cpp0x/constexpr-array8.C
  7e45f3e21eeb41d59ac86b62d32ffdf6  gcc/testsuite/g++.dg/cpp0x/constexpr-array9.C
*************** e4e15e959aaae288fa7a722d7abb7509  gcc/te
*** 11047,11066 ****
  9b79d9e139bdca82ac944985ea038aa0  gcc/testsuite/g++.dg/cpp0x/constexpr-builtin3.C
  85fdfb48424c10ce307707bc1d85353b  gcc/testsuite/g++.dg/cpp0x/constexpr-builtin4.C
  a3e1dfa48f53c341c8fd1fed39d39593  gcc/testsuite/g++.dg/cpp0x/constexpr-cache1.C
! f2e2a8c3c4cd4ae3cee3b8d9d00cde28  gcc/testsuite/g++.dg/cpp0x/constexpr-cast.C
  c69a3f036aa1a3b23cdbaaea842e210b  gcc/testsuite/g++.dg/cpp0x/constexpr-cleanup.C
  4c7ae3f55ce6d714d60e08811293b1e3  gcc/testsuite/g++.dg/cpp0x/constexpr-comma1.C
  80367967b9445fd60f61c8e306a887c1  gcc/testsuite/g++.dg/cpp0x/constexpr-complex.C
  81e19679cf444654f916ddfdba9dddbb  gcc/testsuite/g++.dg/cpp0x/constexpr-complex2.C
  91a3ed066890c479ed4178dddf5077d3  gcc/testsuite/g++.dg/cpp0x/constexpr-compound.C
! 1b3b6506c34be30daa78b4f5636f9ca4  gcc/testsuite/g++.dg/cpp0x/constexpr-condition.C
  8581fb1eeb620cb25e1a416019fc44de  gcc/testsuite/g++.dg/cpp0x/constexpr-condition2.C
  d0cf4047a18cf95475f57cf96be3f551  gcc/testsuite/g++.dg/cpp0x/constexpr-const1.C
  75d9efefe5bb3dfe5b0f05252db79aa0  gcc/testsuite/g++.dg/cpp0x/constexpr-conv1.C
  7e8f9774868e4f214b17e146d6344110  gcc/testsuite/g++.dg/cpp0x/constexpr-conv2.C
  60ce3758f2c3854a6422972210ea5908  gcc/testsuite/g++.dg/cpp0x/constexpr-conv3.C
  4cbad2472a3e3e6ded4b3854f5379ad9  gcc/testsuite/g++.dg/cpp0x/constexpr-conv4.C
! bcc83a93ce0107eccc68dc9df9f5d9ab  gcc/testsuite/g++.dg/cpp0x/constexpr-ctor.C
  51fca83dad5aded415ebb510430667ac  gcc/testsuite/g++.dg/cpp0x/constexpr-ctor10.C
  209a19455d0ca9a2da35009fb3340aec  gcc/testsuite/g++.dg/cpp0x/constexpr-ctor11.C
  fdaf7283debdce5f1d5dabf1e498354f  gcc/testsuite/g++.dg/cpp0x/constexpr-ctor12.C
--- 11524,11545 ----
  9b79d9e139bdca82ac944985ea038aa0  gcc/testsuite/g++.dg/cpp0x/constexpr-builtin3.C
  85fdfb48424c10ce307707bc1d85353b  gcc/testsuite/g++.dg/cpp0x/constexpr-builtin4.C
  a3e1dfa48f53c341c8fd1fed39d39593  gcc/testsuite/g++.dg/cpp0x/constexpr-cache1.C
! 2d072e1c9404478ff6f2aff9be053f5d  gcc/testsuite/g++.dg/cpp0x/constexpr-cast.C
  c69a3f036aa1a3b23cdbaaea842e210b  gcc/testsuite/g++.dg/cpp0x/constexpr-cleanup.C
  4c7ae3f55ce6d714d60e08811293b1e3  gcc/testsuite/g++.dg/cpp0x/constexpr-comma1.C
  80367967b9445fd60f61c8e306a887c1  gcc/testsuite/g++.dg/cpp0x/constexpr-complex.C
  81e19679cf444654f916ddfdba9dddbb  gcc/testsuite/g++.dg/cpp0x/constexpr-complex2.C
  91a3ed066890c479ed4178dddf5077d3  gcc/testsuite/g++.dg/cpp0x/constexpr-compound.C
! 57686e4c28abf456a6024fa8b83e9d81  gcc/testsuite/g++.dg/cpp0x/constexpr-condition.C
  8581fb1eeb620cb25e1a416019fc44de  gcc/testsuite/g++.dg/cpp0x/constexpr-condition2.C
  d0cf4047a18cf95475f57cf96be3f551  gcc/testsuite/g++.dg/cpp0x/constexpr-const1.C
+ ab3d5e56cf6749d0ebf9a07451e3d13e  gcc/testsuite/g++.dg/cpp0x/constexpr-const2.C
+ 6e7f3f58a9be8daac296baae34368917  gcc/testsuite/g++.dg/cpp0x/constexpr-const3.C
  75d9efefe5bb3dfe5b0f05252db79aa0  gcc/testsuite/g++.dg/cpp0x/constexpr-conv1.C
  7e8f9774868e4f214b17e146d6344110  gcc/testsuite/g++.dg/cpp0x/constexpr-conv2.C
  60ce3758f2c3854a6422972210ea5908  gcc/testsuite/g++.dg/cpp0x/constexpr-conv3.C
  4cbad2472a3e3e6ded4b3854f5379ad9  gcc/testsuite/g++.dg/cpp0x/constexpr-conv4.C
! 8f30ca3e9b4c2f9c4aa2ab56fa84129a  gcc/testsuite/g++.dg/cpp0x/constexpr-ctor.C
  51fca83dad5aded415ebb510430667ac  gcc/testsuite/g++.dg/cpp0x/constexpr-ctor10.C
  209a19455d0ca9a2da35009fb3340aec  gcc/testsuite/g++.dg/cpp0x/constexpr-ctor11.C
  fdaf7283debdce5f1d5dabf1e498354f  gcc/testsuite/g++.dg/cpp0x/constexpr-ctor12.C
*************** a259b7f32c3d335c69d177ab19112031  gcc/te
*** 11088,11093 ****
--- 11567,11573 ----
  982f09c738563707c799bb936672cdef  gcc/testsuite/g++.dg/cpp0x/constexpr-decltype1.C
  c7765e8d6215ac706fbd0fd3b189155d  gcc/testsuite/g++.dg/cpp0x/constexpr-decltype2.C
  515fa60e9a8d9e1a6fa8dde14c47e958  gcc/testsuite/g++.dg/cpp0x/constexpr-decltype3.C
+ a4cb8ab88b885adc2062830771d64846  gcc/testsuite/g++.dg/cpp0x/constexpr-decltype4.C
  2aca1fb114aea81a9c27b98c5caa23bc  gcc/testsuite/g++.dg/cpp0x/constexpr-defarg.C
  785c6f90cb5bc3b2af7339874bf81e3c  gcc/testsuite/g++.dg/cpp0x/constexpr-defarg2.C
  cff5ffbde8aa11968863d58f12230fd8  gcc/testsuite/g++.dg/cpp0x/constexpr-default-ctor.C
*************** cff5ffbde8aa11968863d58f12230fd8  gcc/te
*** 11095,11106 ****
  b9f62d1adc6b6e0fe01886a17a69c102  gcc/testsuite/g++.dg/cpp0x/constexpr-delegating.C
  7931d487bd0cfaf955fae2246fa72de9  gcc/testsuite/g++.dg/cpp0x/constexpr-delegating2.C
  5b017b9ac3b68833449b967e43cba950  gcc/testsuite/g++.dg/cpp0x/constexpr-delete.C
! 28d2bb8bbc72ff16672fb97c7fb878c5  gcc/testsuite/g++.dg/cpp0x/constexpr-delete2.C
  4f2e7c33f09e5b0c1d98c13b7f990e4a  gcc/testsuite/g++.dg/cpp0x/constexpr-deref.C
  a5ca183a9981a662b98c564cad9d2142  gcc/testsuite/g++.dg/cpp0x/constexpr-diag1.C
  262bf0368b4b07acdfe79a5a0de00e78  gcc/testsuite/g++.dg/cpp0x/constexpr-diag2.C
! d9d50d08e2266c093c3125a4b230bfc8  gcc/testsuite/g++.dg/cpp0x/constexpr-diag3.C
! 33a3321b91b5bea229044ac073d4dab2  gcc/testsuite/g++.dg/cpp0x/constexpr-diag4.C
  cdcf1abb99ff7db2a6de02d4da860839  gcc/testsuite/g++.dg/cpp0x/constexpr-diag5.C
  3b6a46c1a5699fddb411eb1188a5afbc  gcc/testsuite/g++.dg/cpp0x/constexpr-eh-spec.C
  df8026b0f85dbf1a32a645a96eaee562  gcc/testsuite/g++.dg/cpp0x/constexpr-ellipsis.C
--- 11575,11586 ----
  b9f62d1adc6b6e0fe01886a17a69c102  gcc/testsuite/g++.dg/cpp0x/constexpr-delegating.C
  7931d487bd0cfaf955fae2246fa72de9  gcc/testsuite/g++.dg/cpp0x/constexpr-delegating2.C
  5b017b9ac3b68833449b967e43cba950  gcc/testsuite/g++.dg/cpp0x/constexpr-delete.C
! f85801423624d5e4e418f9fe401034b6  gcc/testsuite/g++.dg/cpp0x/constexpr-delete2.C
  4f2e7c33f09e5b0c1d98c13b7f990e4a  gcc/testsuite/g++.dg/cpp0x/constexpr-deref.C
  a5ca183a9981a662b98c564cad9d2142  gcc/testsuite/g++.dg/cpp0x/constexpr-diag1.C
  262bf0368b4b07acdfe79a5a0de00e78  gcc/testsuite/g++.dg/cpp0x/constexpr-diag2.C
! 98281a1dbf50db36e4d79b6a2285d939  gcc/testsuite/g++.dg/cpp0x/constexpr-diag3.C
! f40741605855158bc8dc6da1beb0acec  gcc/testsuite/g++.dg/cpp0x/constexpr-diag4.C
  cdcf1abb99ff7db2a6de02d4da860839  gcc/testsuite/g++.dg/cpp0x/constexpr-diag5.C
  3b6a46c1a5699fddb411eb1188a5afbc  gcc/testsuite/g++.dg/cpp0x/constexpr-eh-spec.C
  df8026b0f85dbf1a32a645a96eaee562  gcc/testsuite/g++.dg/cpp0x/constexpr-ellipsis.C
*************** baf44bb3bbcc1b19835fcba0732c07b8  gcc/te
*** 11111,11116 ****
--- 11591,11597 ----
  381479cfc8a4816cc7ecac86af925b76  gcc/testsuite/g++.dg/cpp0x/constexpr-empty12.C
  753e5f64602d5b078b77508da90185f6  gcc/testsuite/g++.dg/cpp0x/constexpr-empty13.C
  2a33a8f9f599ab8ad56bcf27c4f4faa1  gcc/testsuite/g++.dg/cpp0x/constexpr-empty14.C
+ 39d49ad5520441d592a3a79408382c59  gcc/testsuite/g++.dg/cpp0x/constexpr-empty15.C
  aef682375c033fe1283502c7f213d6ca  gcc/testsuite/g++.dg/cpp0x/constexpr-empty2.C
  f2be36db1d24de846eca69288f8e004a  gcc/testsuite/g++.dg/cpp0x/constexpr-empty3.C
  933cc130bc4ebc33fb81e8901f604e0a  gcc/testsuite/g++.dg/cpp0x/constexpr-empty4.C
*************** cf5dbf6e27520dc069362029f5cb0540  gcc/te
*** 11121,11127 ****
  0639a526e3e93a7d7ddd53722d0d65a4  gcc/testsuite/g++.dg/cpp0x/constexpr-empty9.C
  4570544b4f85e2fcc79cdc49cab6983d  gcc/testsuite/g++.dg/cpp0x/constexpr-ex1.C
  4e6fff7f5e83663f75c94efbf299525b  gcc/testsuite/g++.dg/cpp0x/constexpr-ex2.C
! e6644795e323db4ec4f3b171e831e2f6  gcc/testsuite/g++.dg/cpp0x/constexpr-ex3.C
  ce75146a9a51521a3b4ff82cc14225c3  gcc/testsuite/g++.dg/cpp0x/constexpr-ex4.C
  19eb610e0af0918f7473197af97c60d4  gcc/testsuite/g++.dg/cpp0x/constexpr-expinst.C
  54953d2c31360e2eeefa3305044bd360  gcc/testsuite/g++.dg/cpp0x/constexpr-explicit-inst.C
--- 11602,11608 ----
  0639a526e3e93a7d7ddd53722d0d65a4  gcc/testsuite/g++.dg/cpp0x/constexpr-empty9.C
  4570544b4f85e2fcc79cdc49cab6983d  gcc/testsuite/g++.dg/cpp0x/constexpr-ex1.C
  4e6fff7f5e83663f75c94efbf299525b  gcc/testsuite/g++.dg/cpp0x/constexpr-ex2.C
! c42ce017f72e0ac9bc977500bc2d096c  gcc/testsuite/g++.dg/cpp0x/constexpr-ex3.C
  ce75146a9a51521a3b4ff82cc14225c3  gcc/testsuite/g++.dg/cpp0x/constexpr-ex4.C
  19eb610e0af0918f7473197af97c60d4  gcc/testsuite/g++.dg/cpp0x/constexpr-expinst.C
  54953d2c31360e2eeefa3305044bd360  gcc/testsuite/g++.dg/cpp0x/constexpr-explicit-inst.C
*************** eadd7fb5df730440e565cdf877d0c66f  gcc/te
*** 11184,11190 ****
  211c953e7e3e1153239acc0f3fee4960  gcc/testsuite/g++.dg/cpp0x/constexpr-missing.C
  bf6f271556a8b151987d288c88c9b77d  gcc/testsuite/g++.dg/cpp0x/constexpr-mutable1.C
  123ce7f549210e41438da89fdee5c4f9  gcc/testsuite/g++.dg/cpp0x/constexpr-mutable2.C
! 5d0e68ae69b140a3f3d6c28f50471b7d  gcc/testsuite/g++.dg/cpp0x/constexpr-neg1.C
  e02963b07b48f6e88a5b755a616555ce  gcc/testsuite/g++.dg/cpp0x/constexpr-neg2.C
  57ffb63082d5ee0a0b3b7fdf424bff83  gcc/testsuite/g++.dg/cpp0x/constexpr-neg3.C
  e5edb7904b37f34e9b7834b8b913ff6c  gcc/testsuite/g++.dg/cpp0x/constexpr-noexcept.C
--- 11665,11671 ----
  211c953e7e3e1153239acc0f3fee4960  gcc/testsuite/g++.dg/cpp0x/constexpr-missing.C
  bf6f271556a8b151987d288c88c9b77d  gcc/testsuite/g++.dg/cpp0x/constexpr-mutable1.C
  123ce7f549210e41438da89fdee5c4f9  gcc/testsuite/g++.dg/cpp0x/constexpr-mutable2.C
! 64cb73f78ba207f5415530836a27af3e  gcc/testsuite/g++.dg/cpp0x/constexpr-neg1.C
  e02963b07b48f6e88a5b755a616555ce  gcc/testsuite/g++.dg/cpp0x/constexpr-neg2.C
  57ffb63082d5ee0a0b3b7fdf424bff83  gcc/testsuite/g++.dg/cpp0x/constexpr-neg3.C
  e5edb7904b37f34e9b7834b8b913ff6c  gcc/testsuite/g++.dg/cpp0x/constexpr-noexcept.C
*************** d1ec0d16df219b4574614b6f4fa3b9b6  gcc/te
*** 11201,11213 ****
  7984f830cb12240213de4cb699fc0fad  gcc/testsuite/g++.dg/cpp0x/constexpr-nonlit.C
  ddcd4dc55809dc226c321025c894f2b0  gcc/testsuite/g++.dg/cpp0x/constexpr-nonlit2.C
  e30db9bfd86140e4533c65e96fcc3879  gcc/testsuite/g++.dg/cpp0x/constexpr-nonstatic.C
  990beb043ae4d800be378b30e8be4884  gcc/testsuite/g++.dg/cpp0x/constexpr-nullptr-1.C
  3623c3968c6c158956f2321675d38aad  gcc/testsuite/g++.dg/cpp0x/constexpr-nullptr-2.C
  d4c1a5cc0803346fbc25f7a4d5748fd8  gcc/testsuite/g++.dg/cpp0x/constexpr-nullptr.C
! 9234777336f797ed877671569794ca38  gcc/testsuite/g++.dg/cpp0x/constexpr-object1.C
  a3363a18129aba2537ab6af225e19a74  gcc/testsuite/g++.dg/cpp0x/constexpr-object2.C
! f7d1927790fe9ba9f36fd6bbda3f9ed0  gcc/testsuite/g++.dg/cpp0x/constexpr-odr1.C
! 13d94e5ae0c04d0ff4b29a4b81f1163b  gcc/testsuite/g++.dg/cpp0x/constexpr-odr2.C
  b0f3e3a129a29b94607b7667c179da90  gcc/testsuite/g++.dg/cpp0x/constexpr-overflow.C
  49a55dd7856ddc68e96fae9181b210ee  gcc/testsuite/g++.dg/cpp0x/constexpr-overflow2.C
  9b22329501cdc0c04eb177944b0b9482  gcc/testsuite/g++.dg/cpp0x/constexpr-pedantic.C
--- 11682,11695 ----
  7984f830cb12240213de4cb699fc0fad  gcc/testsuite/g++.dg/cpp0x/constexpr-nonlit.C
  ddcd4dc55809dc226c321025c894f2b0  gcc/testsuite/g++.dg/cpp0x/constexpr-nonlit2.C
  e30db9bfd86140e4533c65e96fcc3879  gcc/testsuite/g++.dg/cpp0x/constexpr-nonstatic.C
+ 2b6a53b16231810c0a21185dce583796  gcc/testsuite/g++.dg/cpp0x/constexpr-nsdmi1.C
  990beb043ae4d800be378b30e8be4884  gcc/testsuite/g++.dg/cpp0x/constexpr-nullptr-1.C
  3623c3968c6c158956f2321675d38aad  gcc/testsuite/g++.dg/cpp0x/constexpr-nullptr-2.C
  d4c1a5cc0803346fbc25f7a4d5748fd8  gcc/testsuite/g++.dg/cpp0x/constexpr-nullptr.C
! da36a7fb764d4698ece80f56e1801401  gcc/testsuite/g++.dg/cpp0x/constexpr-object1.C
  a3363a18129aba2537ab6af225e19a74  gcc/testsuite/g++.dg/cpp0x/constexpr-object2.C
! b99766124d64d06b0dfeeabec5efde5f  gcc/testsuite/g++.dg/cpp0x/constexpr-odr1.C
! 0ba04b9a4a44719f19b5a5fc6905b1a1  gcc/testsuite/g++.dg/cpp0x/constexpr-odr2.C
  b0f3e3a129a29b94607b7667c179da90  gcc/testsuite/g++.dg/cpp0x/constexpr-overflow.C
  49a55dd7856ddc68e96fae9181b210ee  gcc/testsuite/g++.dg/cpp0x/constexpr-overflow2.C
  9b22329501cdc0c04eb177944b0b9482  gcc/testsuite/g++.dg/cpp0x/constexpr-pedantic.C
*************** c893e2388f9acef593b874b1e6b02071  gcc/te
*** 11227,11235 ****
--- 11709,11719 ----
  d0613cd67d583f80a028bb4816e6c9e8  gcc/testsuite/g++.dg/cpp0x/constexpr-recursion2.C
  8df497f4a921feee2cc5153489dcd088  gcc/testsuite/g++.dg/cpp0x/constexpr-recursion3.C
  5e160a188aef7805034f272bd43d2ab7  gcc/testsuite/g++.dg/cpp0x/constexpr-redeclaration1.C
+ 0754013cd1a94dc63c7abbafa940d434  gcc/testsuite/g++.dg/cpp0x/constexpr-redeclaration2.C
  dc7a7eb622691a6363e90822f0e39072  gcc/testsuite/g++.dg/cpp0x/constexpr-ref1.C
  dd168221387ec9a93f3d125cb4241c56  gcc/testsuite/g++.dg/cpp0x/constexpr-ref10.C
  d9da9cf4bb858e7842583767dee979b2  gcc/testsuite/g++.dg/cpp0x/constexpr-ref11.C
+ 543080be79ba1b2e79dcf614235b0a12  gcc/testsuite/g++.dg/cpp0x/constexpr-ref12.C
  d1d1aecd66ba1c7f2b50e13b37172d43  gcc/testsuite/g++.dg/cpp0x/constexpr-ref2.C
  52e47448fe1ed73156ebb657652051d7  gcc/testsuite/g++.dg/cpp0x/constexpr-ref3.C
  a8465ccb79db2326e46ace178e06b2d1  gcc/testsuite/g++.dg/cpp0x/constexpr-ref4.C
*************** db629678a3f266682c3a566dd37c8b81  gcc/te
*** 11239,11248 ****
  88d7941c296f4e995a894a2cebceb674  gcc/testsuite/g++.dg/cpp0x/constexpr-ref8.C
  99d2ac51d143edf6ad6147fb059396f4  gcc/testsuite/g++.dg/cpp0x/constexpr-ref9.C
  7c740c2600da22d8ec93e0d98e4d6ca6  gcc/testsuite/g++.dg/cpp0x/constexpr-reinterpret1.C
  c40c8e60c51460a8c4576cf7e9487ce3  gcc/testsuite/g++.dg/cpp0x/constexpr-rom.C
  0243ed8d6dc6cc84334b7250ce7437cc  gcc/testsuite/g++.dg/cpp0x/constexpr-sassert.C
  707c661c266e778c1084c105e9d93852  gcc/testsuite/g++.dg/cpp0x/constexpr-self1.C
! 93f5adfa91badd2f855a754ab7a5e65b  gcc/testsuite/g++.dg/cpp0x/constexpr-shift1.C
  7a36f88a96eb3ed09cffef0f69eabd70  gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof1.C
  e18407480b883d38af683aed53d2093c  gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof2.C
  f2a2bd8f3f76f7eef94a256167e0f091  gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof3.C
--- 11723,11733 ----
  88d7941c296f4e995a894a2cebceb674  gcc/testsuite/g++.dg/cpp0x/constexpr-ref8.C
  99d2ac51d143edf6ad6147fb059396f4  gcc/testsuite/g++.dg/cpp0x/constexpr-ref9.C
  7c740c2600da22d8ec93e0d98e4d6ca6  gcc/testsuite/g++.dg/cpp0x/constexpr-reinterpret1.C
+ 2837e188d6c2796de22556bf7f21a88d  gcc/testsuite/g++.dg/cpp0x/constexpr-reinterpret2.C
  c40c8e60c51460a8c4576cf7e9487ce3  gcc/testsuite/g++.dg/cpp0x/constexpr-rom.C
  0243ed8d6dc6cc84334b7250ce7437cc  gcc/testsuite/g++.dg/cpp0x/constexpr-sassert.C
  707c661c266e778c1084c105e9d93852  gcc/testsuite/g++.dg/cpp0x/constexpr-self1.C
! f0ab53b23cf8ef048b8891b5ab461a71  gcc/testsuite/g++.dg/cpp0x/constexpr-shift1.C
  7a36f88a96eb3ed09cffef0f69eabd70  gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof1.C
  e18407480b883d38af683aed53d2093c  gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof2.C
  f2a2bd8f3f76f7eef94a256167e0f091  gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof3.C
*************** dd4700728489bec2565506d830e467d8  gcc/te
*** 11251,11257 ****
  6750ddb6d120c8e7368eaae5150e78c1  gcc/testsuite/g++.dg/cpp0x/constexpr-static10.C
  7431d68cb7a29a352611ab8a7cdad67b  gcc/testsuite/g++.dg/cpp0x/constexpr-static11.C
  323e38ced3137a14df2f9f2f58e82249  gcc/testsuite/g++.dg/cpp0x/constexpr-static12.C
! 411fb6dd9e470568da2b5ebae64434b1  gcc/testsuite/g++.dg/cpp0x/constexpr-static13.C
  797b8689368a7682042cd629a45f6125  gcc/testsuite/g++.dg/cpp0x/constexpr-static2.C
  c007c5c7f6d811c5864f3f9c4f7da9a4  gcc/testsuite/g++.dg/cpp0x/constexpr-static3.C
  c75a35a6482a003b532401a29c58bf6e  gcc/testsuite/g++.dg/cpp0x/constexpr-static4.C
--- 11736,11742 ----
  6750ddb6d120c8e7368eaae5150e78c1  gcc/testsuite/g++.dg/cpp0x/constexpr-static10.C
  7431d68cb7a29a352611ab8a7cdad67b  gcc/testsuite/g++.dg/cpp0x/constexpr-static11.C
  323e38ced3137a14df2f9f2f58e82249  gcc/testsuite/g++.dg/cpp0x/constexpr-static12.C
! 4b42a41e41c60370727286f29f142765  gcc/testsuite/g++.dg/cpp0x/constexpr-static13.C
  797b8689368a7682042cd629a45f6125  gcc/testsuite/g++.dg/cpp0x/constexpr-static2.C
  c007c5c7f6d811c5864f3f9c4f7da9a4  gcc/testsuite/g++.dg/cpp0x/constexpr-static3.C
  c75a35a6482a003b532401a29c58bf6e  gcc/testsuite/g++.dg/cpp0x/constexpr-static4.C
*************** b72a638cfe9f75108dd3de08b22b4715  gcc/te
*** 11263,11268 ****
--- 11748,11754 ----
  2b7418fe89f68acd7f4472eb03122d05  gcc/testsuite/g++.dg/cpp0x/constexpr-stmtexpr2.C
  728e02d9e415648f3e06dcbe2f8f5d53  gcc/testsuite/g++.dg/cpp0x/constexpr-strchr.C
  3e26440573b2be806457625de52bffab  gcc/testsuite/g++.dg/cpp0x/constexpr-string.C
+ fe13161c3660e86f38f7deb1068c6c5d  gcc/testsuite/g++.dg/cpp0x/constexpr-string2.C
  43244f86cbe6c3b8c26b558e0d88ded9  gcc/testsuite/g++.dg/cpp0x/constexpr-strstr.C
  6eb82ff153e81bcd77b89c565cfd5a74  gcc/testsuite/g++.dg/cpp0x/constexpr-switch.C
  6c91ba87eea37f77b9dbfcbf6c0b805b  gcc/testsuite/g++.dg/cpp0x/constexpr-switch2.C
*************** ba638c2a427eedfb5bf4ec41ae37ed36  gcc/te
*** 11274,11280 ****
  c715cc77c59c08b4178c8df94944f49a  gcc/testsuite/g++.dg/cpp0x/constexpr-template1.C
  56e1285a24a4fbdb11978e8af54953ca  gcc/testsuite/g++.dg/cpp0x/constexpr-template10.C
  cf1b5ea6542ce4e4c53d713d22353179  gcc/testsuite/g++.dg/cpp0x/constexpr-template11.C
! 3acad53c5375a99271f7531125add841  gcc/testsuite/g++.dg/cpp0x/constexpr-template2.C
  0bcbbb5fdaa0906b82119d032554061e  gcc/testsuite/g++.dg/cpp0x/constexpr-template3.C
  a05dfbf634e5313455c47b794057b288  gcc/testsuite/g++.dg/cpp0x/constexpr-template4.C
  fa38f028820b71aa1be6862fa8eb6f7c  gcc/testsuite/g++.dg/cpp0x/constexpr-template5.C
--- 11760,11766 ----
  c715cc77c59c08b4178c8df94944f49a  gcc/testsuite/g++.dg/cpp0x/constexpr-template1.C
  56e1285a24a4fbdb11978e8af54953ca  gcc/testsuite/g++.dg/cpp0x/constexpr-template10.C
  cf1b5ea6542ce4e4c53d713d22353179  gcc/testsuite/g++.dg/cpp0x/constexpr-template11.C
! 5dc4506a28e07ba88766b1053618ec54  gcc/testsuite/g++.dg/cpp0x/constexpr-template2.C
  0bcbbb5fdaa0906b82119d032554061e  gcc/testsuite/g++.dg/cpp0x/constexpr-template3.C
  a05dfbf634e5313455c47b794057b288  gcc/testsuite/g++.dg/cpp0x/constexpr-template4.C
  fa38f028820b71aa1be6862fa8eb6f7c  gcc/testsuite/g++.dg/cpp0x/constexpr-template5.C
*************** d423b4e954788b36b3142a79b4a48be3  gcc/te
*** 11293,11302 ****
  e4e296b91d878f03ac7d69d384efc1f4  gcc/testsuite/g++.dg/cpp0x/constexpr-typedef1.C
  c868309eb133e9093601e0e6e0842fa8  gcc/testsuite/g++.dg/cpp0x/constexpr-typeid.C
  23385779f30a9c5bbced6e730f47b4ca  gcc/testsuite/g++.dg/cpp0x/constexpr-union.C
! 380e22b3547a08b68dd8190a2a3a282d  gcc/testsuite/g++.dg/cpp0x/constexpr-union2.C
  4c8925527b341742a37fea8686026b8c  gcc/testsuite/g++.dg/cpp0x/constexpr-union3.C
  5a7503f8381d02697b9d955f1dd4e944  gcc/testsuite/g++.dg/cpp0x/constexpr-union4.C
! 01b88919162b508acd06e72325ccf2df  gcc/testsuite/g++.dg/cpp0x/constexpr-union5.C
  e0a86859c165bfaac8fd8efd9023935b  gcc/testsuite/g++.dg/cpp0x/constexpr-union6.C
  9c897128234fa6ab41edf384f11dd381  gcc/testsuite/g++.dg/cpp0x/constexpr-using.C
  7a9a83c41c3d2c5f82ac428442905b65  gcc/testsuite/g++.dg/cpp0x/constexpr-using2.C
--- 11779,11788 ----
  e4e296b91d878f03ac7d69d384efc1f4  gcc/testsuite/g++.dg/cpp0x/constexpr-typedef1.C
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  23385779f30a9c5bbced6e730f47b4ca  gcc/testsuite/g++.dg/cpp0x/constexpr-union.C
! 3284c160f8cd7f776749a492a915afad  gcc/testsuite/g++.dg/cpp0x/constexpr-union2.C
  4c8925527b341742a37fea8686026b8c  gcc/testsuite/g++.dg/cpp0x/constexpr-union3.C
  5a7503f8381d02697b9d955f1dd4e944  gcc/testsuite/g++.dg/cpp0x/constexpr-union4.C
! be8e4b63955ef6076e0e2cd57b4fd61c  gcc/testsuite/g++.dg/cpp0x/constexpr-union5.C
  e0a86859c165bfaac8fd8efd9023935b  gcc/testsuite/g++.dg/cpp0x/constexpr-union6.C
  9c897128234fa6ab41edf384f11dd381  gcc/testsuite/g++.dg/cpp0x/constexpr-using.C
  7a9a83c41c3d2c5f82ac428442905b65  gcc/testsuite/g++.dg/cpp0x/constexpr-using2.C
*************** ec6bf8354ca1b8834959e856431d6ac4  gcc/te
*** 11318,11323 ****
--- 11804,11814 ----
  7bca20d6ac21d6cb78ab16d5c52b7e64  gcc/testsuite/g++.dg/cpp0x/constexpr-wstring1.C
  b16fc42e77fa07ebcdb1053ea5d24120  gcc/testsuite/g++.dg/cpp0x/constexpr-wstring2.C
  70dc080523c40a07cec30261f6f7007a  gcc/testsuite/g++.dg/cpp0x/conv-tmpl1.C
+ cc2373e435695606310d41c976621d1d  gcc/testsuite/g++.dg/cpp0x/conv-tmpl2.C
+ 12893b349842435f0ad6cfd0970c2e76  gcc/testsuite/g++.dg/cpp0x/conv-tmpl3.C
+ e4e9735a6f8a7316a38d6f9bac4f2de3  gcc/testsuite/g++.dg/cpp0x/conv-tmpl4.C
+ c6ed9a173e49cf9b4145563ba4d4d758  gcc/testsuite/g++.dg/cpp0x/conv-tmpl5.C
+ 26843a450ccbca339f12433d7ac2cc1e  gcc/testsuite/g++.dg/cpp0x/conv-tmpl6.C
  38cf671e2c9af718ef5149c2d09c8383  gcc/testsuite/g++.dg/cpp0x/cplusplus.C
  61947bc3307a11bf874ab41c139e4d41  gcc/testsuite/g++.dg/cpp0x/cplusplus_0x.C
  450d9ea3c6d9042a0f4898432bc9c749  gcc/testsuite/g++.dg/cpp0x/dc1.C
*************** a5f546aaf002e31dc77b29dbac735473  gcc/te
*** 11340,11353 ****
  3df1dfeae5659a7702340d1f4c142e85  gcc/testsuite/g++.dg/cpp0x/decltype-call2.C
  94b4a0fd5edd628fe8247db245d9f0ad  gcc/testsuite/g++.dg/cpp0x/decltype-call3.C
  3ee5acdb01862b8525e5acbc41d1263a  gcc/testsuite/g++.dg/cpp0x/decltype-call4.C
  f1c16eae211724928eb3908ca78a9906  gcc/testsuite/g++.dg/cpp0x/decltype-incomplete1.C
  9bbdff7e4aee14dd984dd68004151da7  gcc/testsuite/g++.dg/cpp0x/decltype-mem-initializer1.C
! b0b8adf5716816752727bd37b18c24f3  gcc/testsuite/g++.dg/cpp0x/decltype-pr66548.C
  8961cd3bf214ae4a4f009436806b1744  gcc/testsuite/g++.dg/cpp0x/decltype-pr81506.C
  61ab3fbe660abdfcfb4275658c81e532  gcc/testsuite/g++.dg/cpp0x/decltype-refbug.C
  d565f43de0d3d2b2d501eb8dd82bb1ca  gcc/testsuite/g++.dg/cpp0x/decltype-tid1.C
  346bf8f6597611bdb1098a12ad2eb4c7  gcc/testsuite/g++.dg/cpp0x/decltype1.C
! 0e5a3836bf22c03696252480b80064b6  gcc/testsuite/g++.dg/cpp0x/decltype10.C
  dab751c0d217002893d6d2cce32516a6  gcc/testsuite/g++.dg/cpp0x/decltype11.C
  be8fea74b105bfefc165d375173728c7  gcc/testsuite/g++.dg/cpp0x/decltype12.C
  1d189249b7e9ebf527c0d549b552ef29  gcc/testsuite/g++.dg/cpp0x/decltype13.C
--- 11831,11845 ----
  3df1dfeae5659a7702340d1f4c142e85  gcc/testsuite/g++.dg/cpp0x/decltype-call2.C
  94b4a0fd5edd628fe8247db245d9f0ad  gcc/testsuite/g++.dg/cpp0x/decltype-call3.C
  3ee5acdb01862b8525e5acbc41d1263a  gcc/testsuite/g++.dg/cpp0x/decltype-call4.C
+ 22d7818c4cd703bb7c4198e6debd1a87  gcc/testsuite/g++.dg/cpp0x/decltype-err1.C
  f1c16eae211724928eb3908ca78a9906  gcc/testsuite/g++.dg/cpp0x/decltype-incomplete1.C
  9bbdff7e4aee14dd984dd68004151da7  gcc/testsuite/g++.dg/cpp0x/decltype-mem-initializer1.C
! 86689ac14b3954e26df6a80c2cb80f4c  gcc/testsuite/g++.dg/cpp0x/decltype-pr66548.C
  8961cd3bf214ae4a4f009436806b1744  gcc/testsuite/g++.dg/cpp0x/decltype-pr81506.C
  61ab3fbe660abdfcfb4275658c81e532  gcc/testsuite/g++.dg/cpp0x/decltype-refbug.C
  d565f43de0d3d2b2d501eb8dd82bb1ca  gcc/testsuite/g++.dg/cpp0x/decltype-tid1.C
  346bf8f6597611bdb1098a12ad2eb4c7  gcc/testsuite/g++.dg/cpp0x/decltype1.C
! cd30f65897473d2252967474a635d566  gcc/testsuite/g++.dg/cpp0x/decltype10.C
  dab751c0d217002893d6d2cce32516a6  gcc/testsuite/g++.dg/cpp0x/decltype11.C
  be8fea74b105bfefc165d375173728c7  gcc/testsuite/g++.dg/cpp0x/decltype12.C
  1d189249b7e9ebf527c0d549b552ef29  gcc/testsuite/g++.dg/cpp0x/decltype13.C
*************** ad9d85d4500ad557c6ff5d638338e37f  gcc/te
*** 11368,11374 ****
  36fe3ea3f2239bc457e9ecfbbf2b8b79  gcc/testsuite/g++.dg/cpp0x/decltype27.C
  cf4a89f6a97febee3af4a5464d4376e2  gcc/testsuite/g++.dg/cpp0x/decltype28.C
  c2f6b0368e7faea893818dbfe1543040  gcc/testsuite/g++.dg/cpp0x/decltype29.C
! 053d92936273b14717e2ea463e58e849  gcc/testsuite/g++.dg/cpp0x/decltype3.C
  3ffe9a4bd265e99a11cdc602b9903250  gcc/testsuite/g++.dg/cpp0x/decltype30.C
  a66c63b98b7a52091279ca1dd1553df9  gcc/testsuite/g++.dg/cpp0x/decltype31.C
  8edd915327ee2c7fd329d8c4d9132dc2  gcc/testsuite/g++.dg/cpp0x/decltype32.C
--- 11860,11866 ----
  36fe3ea3f2239bc457e9ecfbbf2b8b79  gcc/testsuite/g++.dg/cpp0x/decltype27.C
  cf4a89f6a97febee3af4a5464d4376e2  gcc/testsuite/g++.dg/cpp0x/decltype28.C
  c2f6b0368e7faea893818dbfe1543040  gcc/testsuite/g++.dg/cpp0x/decltype29.C
! f02ab3e345ebaf2c7e838bc888533dd9  gcc/testsuite/g++.dg/cpp0x/decltype3.C
  3ffe9a4bd265e99a11cdc602b9903250  gcc/testsuite/g++.dg/cpp0x/decltype30.C
  a66c63b98b7a52091279ca1dd1553df9  gcc/testsuite/g++.dg/cpp0x/decltype31.C
  8edd915327ee2c7fd329d8c4d9132dc2  gcc/testsuite/g++.dg/cpp0x/decltype32.C
*************** bd08c6c7799c44db7137d5bdda4a4c33  gcc/te
*** 11379,11385 ****
  3869d95e391dba45b73631274c1ea985  gcc/testsuite/g++.dg/cpp0x/decltype37.C
  a3ba35bd21a746eed5c781d96b7ac1b4  gcc/testsuite/g++.dg/cpp0x/decltype38.C
  5c5a2ca8e170bf1af59a6323bf4acb8b  gcc/testsuite/g++.dg/cpp0x/decltype39.C
! d19f09ec1e20cf899925e0ef73d57180  gcc/testsuite/g++.dg/cpp0x/decltype4.C
  6ecda3200d1e3dc5bcc9f1d705d4288d  gcc/testsuite/g++.dg/cpp0x/decltype40.C
  dbb3477aeefe07ee68f38b1836c1f4a2  gcc/testsuite/g++.dg/cpp0x/decltype41.C
  a62748c335775c13524854a1863cb205  gcc/testsuite/g++.dg/cpp0x/decltype42.C
--- 11871,11877 ----
  3869d95e391dba45b73631274c1ea985  gcc/testsuite/g++.dg/cpp0x/decltype37.C
  a3ba35bd21a746eed5c781d96b7ac1b4  gcc/testsuite/g++.dg/cpp0x/decltype38.C
  5c5a2ca8e170bf1af59a6323bf4acb8b  gcc/testsuite/g++.dg/cpp0x/decltype39.C
! 7a625ad305e74af8e70eecc8a90abfe4  gcc/testsuite/g++.dg/cpp0x/decltype4.C
  6ecda3200d1e3dc5bcc9f1d705d4288d  gcc/testsuite/g++.dg/cpp0x/decltype40.C
  dbb3477aeefe07ee68f38b1836c1f4a2  gcc/testsuite/g++.dg/cpp0x/decltype41.C
  a62748c335775c13524854a1863cb205  gcc/testsuite/g++.dg/cpp0x/decltype42.C
*************** eb43241ea5b225a09884d83e5c0f03b1  gcc/te
*** 11414,11421 ****
  3c1ef1f8f24a3b37c15ed12133f27b85  gcc/testsuite/g++.dg/cpp0x/decltype69.C
  c3626f3b26fbb53bd234a4e39649b63f  gcc/testsuite/g++.dg/cpp0x/decltype7.C
  df382ac6654921a0defb5bf5089786af  gcc/testsuite/g++.dg/cpp0x/decltype70.C
  bbdff105c665351973aaa6a25eaa0940  gcc/testsuite/g++.dg/cpp0x/decltype8.C
! fc3deb1155e05bed411171f339f83abb  gcc/testsuite/g++.dg/cpp0x/decltype9.C
  3b20b1750b2ca6ed0f61eed98be9416e  gcc/testsuite/g++.dg/cpp0x/deduce.C
  3187223bdfa9e7cd351538529dc18cf1  gcc/testsuite/g++.dg/cpp0x/defaulted1.C
  ed0b7799626b31c5a32ff2aa85aca02b  gcc/testsuite/g++.dg/cpp0x/defaulted10.C
--- 11906,11918 ----
  3c1ef1f8f24a3b37c15ed12133f27b85  gcc/testsuite/g++.dg/cpp0x/decltype69.C
  c3626f3b26fbb53bd234a4e39649b63f  gcc/testsuite/g++.dg/cpp0x/decltype7.C
  df382ac6654921a0defb5bf5089786af  gcc/testsuite/g++.dg/cpp0x/decltype70.C
+ eebb4dcfdd45da8b4ab243276003d0ea  gcc/testsuite/g++.dg/cpp0x/decltype71.C
+ e88dd76d94beebe947081c522d04a783  gcc/testsuite/g++.dg/cpp0x/decltype72.C
+ 8a424595eeb543dc61f8e67f3612677c  gcc/testsuite/g++.dg/cpp0x/decltype73.C
+ 193e7380e34c2fdae5c5ba9c6764410f  gcc/testsuite/g++.dg/cpp0x/decltype74.C
+ 7fb3846e66a785a7faa535980ada0e9e  gcc/testsuite/g++.dg/cpp0x/decltype75.C
  bbdff105c665351973aaa6a25eaa0940  gcc/testsuite/g++.dg/cpp0x/decltype8.C
! 037e88423c377bc171f0dea56fb59c12  gcc/testsuite/g++.dg/cpp0x/decltype9.C
  3b20b1750b2ca6ed0f61eed98be9416e  gcc/testsuite/g++.dg/cpp0x/deduce.C
  3187223bdfa9e7cd351538529dc18cf1  gcc/testsuite/g++.dg/cpp0x/defaulted1.C
  ed0b7799626b31c5a32ff2aa85aca02b  gcc/testsuite/g++.dg/cpp0x/defaulted10.C
*************** c5cfd7dcc71474b03e84af97fcd2efb6  gcc/te
*** 11425,11438 ****
  e3439744310182654809bf7e7cdf2ee5  gcc/testsuite/g++.dg/cpp0x/defaulted15.C
  8d364de9c1fc13848d0cb11fd0c219bf  gcc/testsuite/g++.dg/cpp0x/defaulted16.C
  117fed6575bb7c2c848426cd4cdad0fc  gcc/testsuite/g++.dg/cpp0x/defaulted17.C
! cd8d340770589ccf4b186d2235b652d0  gcc/testsuite/g++.dg/cpp0x/defaulted18.C
  06b4b5f3e4775bbcad5ef3d2f9697ff0  gcc/testsuite/g++.dg/cpp0x/defaulted19.C
  c6c23dba60439877ea9d4ecd95b6716b  gcc/testsuite/g++.dg/cpp0x/defaulted19a.C
! cddec9076a722e1e3b2245c4e6e95fbf  gcc/testsuite/g++.dg/cpp0x/defaulted2.C
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  ab2ec53e6f43a87c7a2ce0dc95e5e40e  gcc/testsuite/g++.dg/cpp0x/defaulted21.C
  761773e20736e514dc3f9f126c6b1284  gcc/testsuite/g++.dg/cpp0x/defaulted22.C
! 168937275ffa129760d711c8e7227295  gcc/testsuite/g++.dg/cpp0x/defaulted23.C
  9b830e70f4bd9e8040d06907198842e0  gcc/testsuite/g++.dg/cpp0x/defaulted24.C
  6f73d994ec6b567f3086494c830b9ddc  gcc/testsuite/g++.dg/cpp0x/defaulted25.C
  6c1b7b2d94aac6ba3656a0418fe2026c  gcc/testsuite/g++.dg/cpp0x/defaulted26.C
--- 11922,11935 ----
  e3439744310182654809bf7e7cdf2ee5  gcc/testsuite/g++.dg/cpp0x/defaulted15.C
  8d364de9c1fc13848d0cb11fd0c219bf  gcc/testsuite/g++.dg/cpp0x/defaulted16.C
  117fed6575bb7c2c848426cd4cdad0fc  gcc/testsuite/g++.dg/cpp0x/defaulted17.C
! e428af51adeb48463d87e7d9991db47e  gcc/testsuite/g++.dg/cpp0x/defaulted18.C
  06b4b5f3e4775bbcad5ef3d2f9697ff0  gcc/testsuite/g++.dg/cpp0x/defaulted19.C
  c6c23dba60439877ea9d4ecd95b6716b  gcc/testsuite/g++.dg/cpp0x/defaulted19a.C
! 0f031c0ec3728513afccc81ade7c988d  gcc/testsuite/g++.dg/cpp0x/defaulted2.C
  402df00ef452a091463327eb186f03fe  gcc/testsuite/g++.dg/cpp0x/defaulted20.C
  ab2ec53e6f43a87c7a2ce0dc95e5e40e  gcc/testsuite/g++.dg/cpp0x/defaulted21.C
  761773e20736e514dc3f9f126c6b1284  gcc/testsuite/g++.dg/cpp0x/defaulted22.C
! 50e0e5a7f0cb67b841f7cb17199de596  gcc/testsuite/g++.dg/cpp0x/defaulted23.C
  9b830e70f4bd9e8040d06907198842e0  gcc/testsuite/g++.dg/cpp0x/defaulted24.C
  6f73d994ec6b567f3086494c830b9ddc  gcc/testsuite/g++.dg/cpp0x/defaulted25.C
  6c1b7b2d94aac6ba3656a0418fe2026c  gcc/testsuite/g++.dg/cpp0x/defaulted26.C
*************** c40529dd80c964b83ae572f9bbf80a37  gcc/te
*** 11454,11460 ****
  473fd9b33bf018433bb89bb7abce2ecf  gcc/testsuite/g++.dg/cpp0x/defaulted40.C
  ac76d900f119c9ca0e7c93a364ec9ca8  gcc/testsuite/g++.dg/cpp0x/defaulted41.C
  973e3938ae3516d6d2de0d6490aaa504  gcc/testsuite/g++.dg/cpp0x/defaulted42.C
! 2361de3fe5aae5c2a5e9c114c1db2fd3  gcc/testsuite/g++.dg/cpp0x/defaulted43.C
  2ee0772db61578cee819eb3f0c529df5  gcc/testsuite/g++.dg/cpp0x/defaulted44.C
  bf3070d396c7bb7e08191019deb59497  gcc/testsuite/g++.dg/cpp0x/defaulted45.C
  acc6bd6fd744bdc18ca97d53d2b93372  gcc/testsuite/g++.dg/cpp0x/defaulted46.C
--- 11951,11957 ----
  473fd9b33bf018433bb89bb7abce2ecf  gcc/testsuite/g++.dg/cpp0x/defaulted40.C
  ac76d900f119c9ca0e7c93a364ec9ca8  gcc/testsuite/g++.dg/cpp0x/defaulted41.C
  973e3938ae3516d6d2de0d6490aaa504  gcc/testsuite/g++.dg/cpp0x/defaulted42.C
! 723f6a28d0477aa32ef541172ba0175a  gcc/testsuite/g++.dg/cpp0x/defaulted43.C
  2ee0772db61578cee819eb3f0c529df5  gcc/testsuite/g++.dg/cpp0x/defaulted44.C
  bf3070d396c7bb7e08191019deb59497  gcc/testsuite/g++.dg/cpp0x/defaulted45.C
  acc6bd6fd744bdc18ca97d53d2b93372  gcc/testsuite/g++.dg/cpp0x/defaulted46.C
*************** cbe0ba147a1df371f25c8ab8623476ef  gcc/te
*** 11483,11489 ****
  a5a365073fed8c5bd9263eef7df7b899  gcc/testsuite/g++.dg/cpp0x/deleted10.C
  237265837e45688c4ab0305223c90d74  gcc/testsuite/g++.dg/cpp0x/deleted11.C
  2983561177357253ebbb1f5c1fa5f8e4  gcc/testsuite/g++.dg/cpp0x/deleted12.C
! 2d9bfdbc6407d55b8911aeaa44476c9f  gcc/testsuite/g++.dg/cpp0x/deleted13.C
  acf27aac5d288264569c9a250fea5c37  gcc/testsuite/g++.dg/cpp0x/deleted14.C
  80874d553919bf312b4841380187e0f9  gcc/testsuite/g++.dg/cpp0x/deleted2.C
  a9129f4cd34b93dbe745e3849ea1c38a  gcc/testsuite/g++.dg/cpp0x/deleted3.C
--- 11980,11986 ----
  a5a365073fed8c5bd9263eef7df7b899  gcc/testsuite/g++.dg/cpp0x/deleted10.C
  237265837e45688c4ab0305223c90d74  gcc/testsuite/g++.dg/cpp0x/deleted11.C
  2983561177357253ebbb1f5c1fa5f8e4  gcc/testsuite/g++.dg/cpp0x/deleted12.C
! 20f5ce4631c9d2ed308c5c54cf5abbbf  gcc/testsuite/g++.dg/cpp0x/deleted13.C
  acf27aac5d288264569c9a250fea5c37  gcc/testsuite/g++.dg/cpp0x/deleted14.C
  80874d553919bf312b4841380187e0f9  gcc/testsuite/g++.dg/cpp0x/deleted2.C
  a9129f4cd34b93dbe745e3849ea1c38a  gcc/testsuite/g++.dg/cpp0x/deleted3.C
*************** eb4634d27d5a5c365fd14baf4c66848f  gcc/te
*** 11495,11509 ****
  cfa749d587e9ffe675ffde4ecd146469  gcc/testsuite/g++.dg/cpp0x/deleted9.C
  ca26ad5278a2ac2347db2c2a451bdddf  gcc/testsuite/g++.dg/cpp0x/dependent1.C
  2fbad4ef7b7c86640c1a39e440f3fe7e  gcc/testsuite/g++.dg/cpp0x/dependent2.C
  76420e94bb106abb520db142b01ffdcb  gcc/testsuite/g++.dg/cpp0x/depr-copy1.C
  4a822a67b0bd440c48f63f58b5bfe94c  gcc/testsuite/g++.dg/cpp0x/depr-copy2.C
! 5de6edcb8f5c4a1b19557e4fe1234ec8  gcc/testsuite/g++.dg/cpp0x/desig1.C
! bbac96f234fa44dfc7175446cf573528  gcc/testsuite/g++.dg/cpp0x/desig2.C
! 2270461b06f25a4e26eb23e1b3a995c9  gcc/testsuite/g++.dg/cpp0x/desig3.C
! e19b1884115cbf11b34984ce19905aba  gcc/testsuite/g++.dg/cpp0x/desig4.C
  57f206102874c11b23948de50830b79b  gcc/testsuite/g++.dg/cpp0x/desig5.C
  f8840f0998d1d23158832c277c888d14  gcc/testsuite/g++.dg/cpp0x/diag1.C
  56b051f9e6f8f51d106fe800ef06e54a  gcc/testsuite/g++.dg/cpp0x/diag2.C
  be2f327033fbf2bb4c287d571b817102  gcc/testsuite/g++.dg/cpp0x/dr2061.C
  bd568f7f1307dab8f5eb35fec36e71e2  gcc/testsuite/g++.dg/cpp0x/duplicate1.C
  d4426133b81413ad1d3051caa8d7c24a  gcc/testsuite/g++.dg/cpp0x/dyncast1.C
--- 11992,12008 ----
  cfa749d587e9ffe675ffde4ecd146469  gcc/testsuite/g++.dg/cpp0x/deleted9.C
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  2fbad4ef7b7c86640c1a39e440f3fe7e  gcc/testsuite/g++.dg/cpp0x/dependent2.C
+ 3c3ad36552189c7402279e37b7b6b485  gcc/testsuite/g++.dg/cpp0x/dependent3.C
  76420e94bb106abb520db142b01ffdcb  gcc/testsuite/g++.dg/cpp0x/depr-copy1.C
  4a822a67b0bd440c48f63f58b5bfe94c  gcc/testsuite/g++.dg/cpp0x/depr-copy2.C
! 861890614eff3a18d972ae21c8cedb3f  gcc/testsuite/g++.dg/cpp0x/desig1.C
! 5b8e06a1ebe55e784146bad7f9381d14  gcc/testsuite/g++.dg/cpp0x/desig2.C
! 9325507793124d714ba42d0b77847a70  gcc/testsuite/g++.dg/cpp0x/desig3.C
! 2d09b7c626475cd42f2ea613ae9600d5  gcc/testsuite/g++.dg/cpp0x/desig4.C
  57f206102874c11b23948de50830b79b  gcc/testsuite/g++.dg/cpp0x/desig5.C
  f8840f0998d1d23158832c277c888d14  gcc/testsuite/g++.dg/cpp0x/diag1.C
  56b051f9e6f8f51d106fe800ef06e54a  gcc/testsuite/g++.dg/cpp0x/diag2.C
+ 6d4629d016ec53ea282d36e875e3ca38  gcc/testsuite/g++.dg/cpp0x/diag3.C
  be2f327033fbf2bb4c287d571b817102  gcc/testsuite/g++.dg/cpp0x/dr2061.C
  bd568f7f1307dab8f5eb35fec36e71e2  gcc/testsuite/g++.dg/cpp0x/duplicate1.C
  d4426133b81413ad1d3051caa8d7c24a  gcc/testsuite/g++.dg/cpp0x/dyncast1.C
*************** ae5050f808215ad0bc3a23021ec8e8d8  gcc/te
*** 11525,11531 ****
  2385f2d89aa76808f9f39a25dbe3f34d  gcc/testsuite/g++.dg/cpp0x/enum18.C
  f05f6314bab056a03c548eb4c50f323a  gcc/testsuite/g++.dg/cpp0x/enum19.C
  083386cf718cff0127f11b509677d908  gcc/testsuite/g++.dg/cpp0x/enum2.C
! 1bb294fb870e3913a5e6884e7c73ebce  gcc/testsuite/g++.dg/cpp0x/enum20.C
  6c52dc0b8feff7c3403eed172bec2ebd  gcc/testsuite/g++.dg/cpp0x/enum21a.C
  52d5ff8d8835de9029291b2e0be36123  gcc/testsuite/g++.dg/cpp0x/enum21b.C
  7ff20adcaa2a7e7bc5390f2d01264d25  gcc/testsuite/g++.dg/cpp0x/enum22.C
--- 12024,12030 ----
  2385f2d89aa76808f9f39a25dbe3f34d  gcc/testsuite/g++.dg/cpp0x/enum18.C
  f05f6314bab056a03c548eb4c50f323a  gcc/testsuite/g++.dg/cpp0x/enum19.C
  083386cf718cff0127f11b509677d908  gcc/testsuite/g++.dg/cpp0x/enum2.C
! 0ebf93e7334b3e9c3a23e5aef4befe07  gcc/testsuite/g++.dg/cpp0x/enum20.C
  6c52dc0b8feff7c3403eed172bec2ebd  gcc/testsuite/g++.dg/cpp0x/enum21a.C
  52d5ff8d8835de9029291b2e0be36123  gcc/testsuite/g++.dg/cpp0x/enum21b.C
  7ff20adcaa2a7e7bc5390f2d01264d25  gcc/testsuite/g++.dg/cpp0x/enum22.C
*************** f05f6314bab056a03c548eb4c50f323a  gcc/te
*** 11534,11541 ****
  d69ddb30d1feb9e35bc7751f26929957  gcc/testsuite/g++.dg/cpp0x/enum25.C
  43b0beab61ef041fe4a52745f4a7aff8  gcc/testsuite/g++.dg/cpp0x/enum26.C
  debb7cdd47e6b29dab60a0c1c616a2a9  gcc/testsuite/g++.dg/cpp0x/enum27.C
! 623a594b2fcf71561e5f8f847250edd2  gcc/testsuite/g++.dg/cpp0x/enum28.C
! 8a20d528742a699e8b68ab52b1eb152f  gcc/testsuite/g++.dg/cpp0x/enum29.C
  8d9beca38ea27fd3108a3981efe82cc1  gcc/testsuite/g++.dg/cpp0x/enum3.C
  2f1b4e8f571d3a0821fb29054df76de2  gcc/testsuite/g++.dg/cpp0x/enum30.C
  aa85c0553f87574847d97be55cc90542  gcc/testsuite/g++.dg/cpp0x/enum31.C
--- 12033,12040 ----
  d69ddb30d1feb9e35bc7751f26929957  gcc/testsuite/g++.dg/cpp0x/enum25.C
  43b0beab61ef041fe4a52745f4a7aff8  gcc/testsuite/g++.dg/cpp0x/enum26.C
  debb7cdd47e6b29dab60a0c1c616a2a9  gcc/testsuite/g++.dg/cpp0x/enum27.C
! fd52dc72271fc1cff93dc8f34d29d106  gcc/testsuite/g++.dg/cpp0x/enum28.C
! 04a455618b9ab134e59388fdfbfd7e38  gcc/testsuite/g++.dg/cpp0x/enum29.C
  8d9beca38ea27fd3108a3981efe82cc1  gcc/testsuite/g++.dg/cpp0x/enum3.C
  2f1b4e8f571d3a0821fb29054df76de2  gcc/testsuite/g++.dg/cpp0x/enum30.C
  aa85c0553f87574847d97be55cc90542  gcc/testsuite/g++.dg/cpp0x/enum31.C
*************** b1410081d8b18a483605fea34ded714b  gcc/te
*** 11548,11553 ****
--- 12047,12053 ----
  0c1bd3a6f06a95634ee6e7e1c8cfcb43  gcc/testsuite/g++.dg/cpp0x/enum38.C
  f520b3c677602a9f4bb925811947dd27  gcc/testsuite/g++.dg/cpp0x/enum39.C
  4314a939d182c8ee315404a2d9cf3ec3  gcc/testsuite/g++.dg/cpp0x/enum4.C
+ 1180e3480996d107ee707434d64528e0  gcc/testsuite/g++.dg/cpp0x/enum40.C
  771003df84c0886c950718b7f6d81033  gcc/testsuite/g++.dg/cpp0x/enum5.C
  67ec15297186c0dc5b419618c460a2f2  gcc/testsuite/g++.dg/cpp0x/enum6.C
  2b0985c5003a3baf1ba60c7c38770636  gcc/testsuite/g++.dg/cpp0x/enum7.C
*************** f75f41e0c1359b56dd9a9190d3b7dbfc  gcc/te
*** 11570,11581 ****
  4dd1f6fb02b660c2afd73b2484741309  gcc/testsuite/g++.dg/cpp0x/explicit10.C
  3f2e186bcfdd6a4b2ef37c198e9d0592  gcc/testsuite/g++.dg/cpp0x/explicit11.C
  04d323815939ee79d5f47c7f6eb46028  gcc/testsuite/g++.dg/cpp0x/explicit12.C
  fec28f5357647ffbc93c027ac0fbf703  gcc/testsuite/g++.dg/cpp0x/explicit2.C
  ef5c8a016f49426952ad2493c17aef13  gcc/testsuite/g++.dg/cpp0x/explicit3.C
  438a3bc90c2ee1fc82bce90fdfa60da5  gcc/testsuite/g++.dg/cpp0x/explicit4.C
  f347276901d21feb41a426530f369377  gcc/testsuite/g++.dg/cpp0x/explicit5.C
  ba3e0584cbce47fcf6afb488bb1a336d  gcc/testsuite/g++.dg/cpp0x/explicit6.C
! ba14aa5d6a38127d55331f0cce7f0ac9  gcc/testsuite/g++.dg/cpp0x/explicit7.C
  be032bb4361dd11f064d960f788b56ae  gcc/testsuite/g++.dg/cpp0x/explicit8.C
  7caf88bf1e85136d7d02bad6475c761b  gcc/testsuite/g++.dg/cpp0x/explicit9.C
  17b14634dec8aeb365371418aa64cddf  gcc/testsuite/g++.dg/cpp0x/extern_template-1.C
--- 12070,12083 ----
  4dd1f6fb02b660c2afd73b2484741309  gcc/testsuite/g++.dg/cpp0x/explicit10.C
  3f2e186bcfdd6a4b2ef37c198e9d0592  gcc/testsuite/g++.dg/cpp0x/explicit11.C
  04d323815939ee79d5f47c7f6eb46028  gcc/testsuite/g++.dg/cpp0x/explicit12.C
+ 1a2bb99e92ffa2d1e6477ef38633d9ee  gcc/testsuite/g++.dg/cpp0x/explicit13.C
+ 08da4fbac4fef79e26d26b24a22682af  gcc/testsuite/g++.dg/cpp0x/explicit14.C
  fec28f5357647ffbc93c027ac0fbf703  gcc/testsuite/g++.dg/cpp0x/explicit2.C
  ef5c8a016f49426952ad2493c17aef13  gcc/testsuite/g++.dg/cpp0x/explicit3.C
  438a3bc90c2ee1fc82bce90fdfa60da5  gcc/testsuite/g++.dg/cpp0x/explicit4.C
  f347276901d21feb41a426530f369377  gcc/testsuite/g++.dg/cpp0x/explicit5.C
  ba3e0584cbce47fcf6afb488bb1a336d  gcc/testsuite/g++.dg/cpp0x/explicit6.C
! 5a83a54a7920fd3bbd167d3dca9af8a5  gcc/testsuite/g++.dg/cpp0x/explicit7.C
  be032bb4361dd11f064d960f788b56ae  gcc/testsuite/g++.dg/cpp0x/explicit8.C
  7caf88bf1e85136d7d02bad6475c761b  gcc/testsuite/g++.dg/cpp0x/explicit9.C
  17b14634dec8aeb365371418aa64cddf  gcc/testsuite/g++.dg/cpp0x/extern_template-1.C
*************** d4322d3a60ab9276cc1264c288db974f  gcc/te
*** 11619,11625 ****
  4ae8baf4fdff1d18d31b0e4d7b426ece  gcc/testsuite/g++.dg/cpp0x/friend3.C
  31af356fd46efd356e7ce6ac470d2427  gcc/testsuite/g++.dg/cpp0x/friend4.C
  026439040836176852865f6754370e70  gcc/testsuite/g++.dg/cpp0x/friend5.C
! 5142fbd8e81f930faa6dbc67f841e158  gcc/testsuite/g++.dg/cpp0x/gen-attrs-1.C
  cb97cb3c29926aede38017aa01da015d  gcc/testsuite/g++.dg/cpp0x/gen-attrs-10.C
  7de2f3d73363a0558cd75484e381dcca  gcc/testsuite/g++.dg/cpp0x/gen-attrs-11.C
  7de2f3d73363a0558cd75484e381dcca  gcc/testsuite/g++.dg/cpp0x/gen-attrs-12.C
--- 12121,12127 ----
  4ae8baf4fdff1d18d31b0e4d7b426ece  gcc/testsuite/g++.dg/cpp0x/friend3.C
  31af356fd46efd356e7ce6ac470d2427  gcc/testsuite/g++.dg/cpp0x/friend4.C
  026439040836176852865f6754370e70  gcc/testsuite/g++.dg/cpp0x/friend5.C
! 4ee6b098255abe7601f2a9f6bc71d637  gcc/testsuite/g++.dg/cpp0x/gen-attrs-1.C
  cb97cb3c29926aede38017aa01da015d  gcc/testsuite/g++.dg/cpp0x/gen-attrs-10.C
  7de2f3d73363a0558cd75484e381dcca  gcc/testsuite/g++.dg/cpp0x/gen-attrs-11.C
  7de2f3d73363a0558cd75484e381dcca  gcc/testsuite/g++.dg/cpp0x/gen-attrs-12.C
*************** cafb4050999077603b35549aaf971561  gcc/te
*** 11635,11641 ****
  55d3adc084d366b23be078511b3dfa85  gcc/testsuite/g++.dg/cpp0x/gen-attrs-2.C
  e197ae9afbdec5767245d3c86bca0231  gcc/testsuite/g++.dg/cpp0x/gen-attrs-20.C
  7b1009d067c8727dea390c9869d7a0cb  gcc/testsuite/g++.dg/cpp0x/gen-attrs-21.C
! d4dc911729d16cf9f552259eea132935  gcc/testsuite/g++.dg/cpp0x/gen-attrs-22.C
  ec3da2b5b326b8e77d52b18452c4db5c  gcc/testsuite/g++.dg/cpp0x/gen-attrs-23.C
  68aa7e13490a93ced5b6694c44411070  gcc/testsuite/g++.dg/cpp0x/gen-attrs-24.C
  b71b52bfcd7a69c6c39dc260a3f9a222  gcc/testsuite/g++.dg/cpp0x/gen-attrs-25.C
--- 12137,12143 ----
  55d3adc084d366b23be078511b3dfa85  gcc/testsuite/g++.dg/cpp0x/gen-attrs-2.C
  e197ae9afbdec5767245d3c86bca0231  gcc/testsuite/g++.dg/cpp0x/gen-attrs-20.C
  7b1009d067c8727dea390c9869d7a0cb  gcc/testsuite/g++.dg/cpp0x/gen-attrs-21.C
! 3d5e2a7237ee3efa8b2b084876f30473  gcc/testsuite/g++.dg/cpp0x/gen-attrs-22.C
  ec3da2b5b326b8e77d52b18452c4db5c  gcc/testsuite/g++.dg/cpp0x/gen-attrs-23.C
  68aa7e13490a93ced5b6694c44411070  gcc/testsuite/g++.dg/cpp0x/gen-attrs-24.C
  b71b52bfcd7a69c6c39dc260a3f9a222  gcc/testsuite/g++.dg/cpp0x/gen-attrs-25.C
*************** d464ffbe0c0287db991fc6854490c130  gcc/te
*** 11651,11662 ****
  21d78c5d17bae8f1b6bb73945dcd3902  gcc/testsuite/g++.dg/cpp0x/gen-attrs-34.C
  7d665bb78f74cfeda5c7489ccd367115  gcc/testsuite/g++.dg/cpp0x/gen-attrs-35.C
  bcd108fab23ce4022e3dec63114c9ff3  gcc/testsuite/g++.dg/cpp0x/gen-attrs-36-1.C
! 6546f08ad4e30f185ee3c2438c478b88  gcc/testsuite/g++.dg/cpp0x/gen-attrs-36.C
! 85bf99aa780605a6fd86e7a4cf6e5e8a  gcc/testsuite/g++.dg/cpp0x/gen-attrs-37.C
  bb1fc6dd579b1a618936a4dadc14db97  gcc/testsuite/g++.dg/cpp0x/gen-attrs-38.C
  98100318c81e01be9cde3359f29d785e  gcc/testsuite/g++.dg/cpp0x/gen-attrs-39-1.C
  1e9f1592b1b32cddbd98886cee9b568e  gcc/testsuite/g++.dg/cpp0x/gen-attrs-39.C
! f3e00699c57e131796be4cd7ccb023cb  gcc/testsuite/g++.dg/cpp0x/gen-attrs-4.C
  07d8ce7aa1bb54786d8dcfb173bcb392  gcc/testsuite/g++.dg/cpp0x/gen-attrs-40.C
  77126c882ae6b13b5eaf6bdda66c4f26  gcc/testsuite/g++.dg/cpp0x/gen-attrs-41.C
  97507133ec7407e6a8b7f3a4fc369b12  gcc/testsuite/g++.dg/cpp0x/gen-attrs-42.C
--- 12153,12164 ----
  21d78c5d17bae8f1b6bb73945dcd3902  gcc/testsuite/g++.dg/cpp0x/gen-attrs-34.C
  7d665bb78f74cfeda5c7489ccd367115  gcc/testsuite/g++.dg/cpp0x/gen-attrs-35.C
  bcd108fab23ce4022e3dec63114c9ff3  gcc/testsuite/g++.dg/cpp0x/gen-attrs-36-1.C
! ca1e38d01edaab7d8c2016f5d27be7c0  gcc/testsuite/g++.dg/cpp0x/gen-attrs-36.C
! 4604ed42d9891e8fd3cc31832bd33578  gcc/testsuite/g++.dg/cpp0x/gen-attrs-37.C
  bb1fc6dd579b1a618936a4dadc14db97  gcc/testsuite/g++.dg/cpp0x/gen-attrs-38.C
  98100318c81e01be9cde3359f29d785e  gcc/testsuite/g++.dg/cpp0x/gen-attrs-39-1.C
  1e9f1592b1b32cddbd98886cee9b568e  gcc/testsuite/g++.dg/cpp0x/gen-attrs-39.C
! d4be6942ea0a3d7cd69b59fbcb5ffd8f  gcc/testsuite/g++.dg/cpp0x/gen-attrs-4.C
  07d8ce7aa1bb54786d8dcfb173bcb392  gcc/testsuite/g++.dg/cpp0x/gen-attrs-40.C
  77126c882ae6b13b5eaf6bdda66c4f26  gcc/testsuite/g++.dg/cpp0x/gen-attrs-41.C
  97507133ec7407e6a8b7f3a4fc369b12  gcc/testsuite/g++.dg/cpp0x/gen-attrs-42.C
*************** c157a52995fc54c0b46c8795dea13ada  gcc/te
*** 11688,11700 ****
  c75dea1e932fc65c88986652795dcbc3  gcc/testsuite/g++.dg/cpp0x/gen-attrs-64.C
  52f82ed142fbe1acdd0fe0b6f0d56e33  gcc/testsuite/g++.dg/cpp0x/gen-attrs-65.C
  40fb270687c3b0ccc01dc21db4e07678  gcc/testsuite/g++.dg/cpp0x/gen-attrs-66.C
  322765b108a034880469a5351cdc61a2  gcc/testsuite/g++.dg/cpp0x/gen-attrs-68.C
  b76ee20d4e5161664ef1b5b122268e53  gcc/testsuite/g++.dg/cpp0x/gen-attrs-69.C
  f55fa66c82d267feca5db82dc835210a  gcc/testsuite/g++.dg/cpp0x/gen-attrs-7.C
  1e684e9934b01f7c9c53981ab2a9cd8f  gcc/testsuite/g++.dg/cpp0x/gen-attrs-71.C
! e0b4f953ad274eb8ec84b8e630f87d3a  gcc/testsuite/g++.dg/cpp0x/gen-attrs-8.C
  5dd92815927177080853d47a890f5439  gcc/testsuite/g++.dg/cpp0x/gen-attrs-9.C
! 941ea69f8ea2184ff55eabc54b7eeb07  gcc/testsuite/g++.dg/cpp0x/gnu_fext-numeric-literals.C
  2e2788f974b88f56ceecc2b764d701db  gcc/testsuite/g++.dg/cpp0x/gnu_fno-ext-numeric-literals.C
  9efada2e8cbcac32c0257fef01bf08a7  gcc/testsuite/g++.dg/cpp0x/implicit-copy.C
  0c0f3b4146bc156fd3b22332c0e3393f  gcc/testsuite/g++.dg/cpp0x/implicit-trivial1.C
--- 12190,12204 ----
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  40fb270687c3b0ccc01dc21db4e07678  gcc/testsuite/g++.dg/cpp0x/gen-attrs-66.C
+ 7007c2d7d8cdb780cdcb952d51859183  gcc/testsuite/g++.dg/cpp0x/gen-attrs-67.C
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  f55fa66c82d267feca5db82dc835210a  gcc/testsuite/g++.dg/cpp0x/gen-attrs-7.C
+ 40cf365212691f5dfcdf3a1b85548079  gcc/testsuite/g++.dg/cpp0x/gen-attrs-70.C
  1e684e9934b01f7c9c53981ab2a9cd8f  gcc/testsuite/g++.dg/cpp0x/gen-attrs-71.C
! 29ab98a7b8d445bb51e5069dd98f7cca  gcc/testsuite/g++.dg/cpp0x/gen-attrs-8.C
  5dd92815927177080853d47a890f5439  gcc/testsuite/g++.dg/cpp0x/gen-attrs-9.C
! 40caf35e131e99903b76e36f0e04b2a9  gcc/testsuite/g++.dg/cpp0x/gnu_fext-numeric-literals.C
  2e2788f974b88f56ceecc2b764d701db  gcc/testsuite/g++.dg/cpp0x/gnu_fno-ext-numeric-literals.C
  9efada2e8cbcac32c0257fef01bf08a7  gcc/testsuite/g++.dg/cpp0x/implicit-copy.C
  0c0f3b4146bc156fd3b22332c0e3393f  gcc/testsuite/g++.dg/cpp0x/implicit-trivial1.C
*************** bbc63910b25c6f98c35fc2a38455ffe0  gcc/te
*** 11742,11747 ****
--- 12246,12254 ----
  ef58cfd45b994e29a5ffb11ea1d0cd8b  gcc/testsuite/g++.dg/cpp0x/inh-ctor30.C
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  eb356bb5e47b9ce813f868c74583298f  gcc/testsuite/g++.dg/cpp0x/inh-ctor32.C
+ cf8d547a477f23de9fcd096bf5e63dd9  gcc/testsuite/g++.dg/cpp0x/inh-ctor33.C
+ 3e2bbbf810a96449bcff45e067d280dd  gcc/testsuite/g++.dg/cpp0x/inh-ctor34.C
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  47ad482b069988147c4dcac60c026f4d  gcc/testsuite/g++.dg/cpp0x/inh-ctor3a.C
  071eafda7f7d2d4bff42921fbd048a45  gcc/testsuite/g++.dg/cpp0x/inh-ctor4.C
  972640c006b3bcd568fc760f06817f9f  gcc/testsuite/g++.dg/cpp0x/inh-ctor5.C
*************** eb356bb5e47b9ce813f868c74583298f  gcc/te
*** 11749,11768 ****
  69ad16a291979db5662ea42e8bd7fa16  gcc/testsuite/g++.dg/cpp0x/inh-ctor7.C
  3e47bc4c1090a1639f8ab3081f4464c0  gcc/testsuite/g++.dg/cpp0x/inh-ctor8.C
  0ad99281a7ad33864f8d659dc86ddbe2  gcc/testsuite/g++.dg/cpp0x/inh-ctor9.C
  5900d3033d3e379599e256c557071368  gcc/testsuite/g++.dg/cpp0x/initlist-array10.C
  09f09079c354ad93c3844a14549e0854  gcc/testsuite/g++.dg/cpp0x/initlist-array2.C
! 2689261b6dbe2bf5875e915ce8a31a53  gcc/testsuite/g++.dg/cpp0x/initlist-array3.C
  6c1907913d332611dd16d03002d759f9  gcc/testsuite/g++.dg/cpp0x/initlist-array4.C
  8758d8464674d29f4276f8d3ebc899c3  gcc/testsuite/g++.dg/cpp0x/initlist-array5.C
  46821fed8cc048872c88fe4b51e84963  gcc/testsuite/g++.dg/cpp0x/initlist-array6.C
! 75dbdd73972da9a369980925ff477d9d  gcc/testsuite/g++.dg/cpp0x/initlist-arrray1.C
  110edad11491436d7ef19ef7a8517bf0  gcc/testsuite/g++.dg/cpp0x/initlist-base1.C
  56c081b4510fd319fae6d0ce40b10398  gcc/testsuite/g++.dg/cpp0x/initlist-base2.C
  3bd8f8e03e5ae6051554dde874bf03f6  gcc/testsuite/g++.dg/cpp0x/initlist-base3.C
  68f886cb4e912d3c297c2a92ab92832f  gcc/testsuite/g++.dg/cpp0x/initlist-cast1.C
  994605127bf908d7a5b9745b9991101e  gcc/testsuite/g++.dg/cpp0x/initlist-ctor1.C
  8d42dd7607b094785c2cd3a8c2078180  gcc/testsuite/g++.dg/cpp0x/initlist-ctor2.C
! 8642aa67406b008384f59447a05a884c  gcc/testsuite/g++.dg/cpp0x/initlist-deduce.C
  12570a3277b174fbec9867439383c712  gcc/testsuite/g++.dg/cpp0x/initlist-deduce2.C
  164cef62ad37c1cf80ca6128f56094b2  gcc/testsuite/g++.dg/cpp0x/initlist-defarg1.C
  be08dc99a94b7b3278c8c66a5274c415  gcc/testsuite/g++.dg/cpp0x/initlist-defarg2.C
--- 12256,12280 ----
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  0ad99281a7ad33864f8d659dc86ddbe2  gcc/testsuite/g++.dg/cpp0x/inh-ctor9.C
+ 75dbdd73972da9a369980925ff477d9d  gcc/testsuite/g++.dg/cpp0x/initlist-array1.C
  5900d3033d3e379599e256c557071368  gcc/testsuite/g++.dg/cpp0x/initlist-array10.C
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  09f09079c354ad93c3844a14549e0854  gcc/testsuite/g++.dg/cpp0x/initlist-array2.C
! 8c888f7ab5cc44480801a14718225380  gcc/testsuite/g++.dg/cpp0x/initlist-array3.C
  6c1907913d332611dd16d03002d759f9  gcc/testsuite/g++.dg/cpp0x/initlist-array4.C
  8758d8464674d29f4276f8d3ebc899c3  gcc/testsuite/g++.dg/cpp0x/initlist-array5.C
  46821fed8cc048872c88fe4b51e84963  gcc/testsuite/g++.dg/cpp0x/initlist-array6.C
! d7673a64e080b2520dfa614d99d396f1  gcc/testsuite/g++.dg/cpp0x/initlist-array7.C
! f0118d5667765863d9b140fbe97f21fe  gcc/testsuite/g++.dg/cpp0x/initlist-array8.C
! 08e86122dd871f4eb3c913a1a621f98d  gcc/testsuite/g++.dg/cpp0x/initlist-array9.C
  110edad11491436d7ef19ef7a8517bf0  gcc/testsuite/g++.dg/cpp0x/initlist-base1.C
  56c081b4510fd319fae6d0ce40b10398  gcc/testsuite/g++.dg/cpp0x/initlist-base2.C
  3bd8f8e03e5ae6051554dde874bf03f6  gcc/testsuite/g++.dg/cpp0x/initlist-base3.C
  68f886cb4e912d3c297c2a92ab92832f  gcc/testsuite/g++.dg/cpp0x/initlist-cast1.C
+ 6c5330c1db9324895d3422e0847edb6d  gcc/testsuite/g++.dg/cpp0x/initlist-cleanup1.C
  994605127bf908d7a5b9745b9991101e  gcc/testsuite/g++.dg/cpp0x/initlist-ctor1.C
  8d42dd7607b094785c2cd3a8c2078180  gcc/testsuite/g++.dg/cpp0x/initlist-ctor2.C
! 85f4b64a3f7721e892ec214ca53047d4  gcc/testsuite/g++.dg/cpp0x/initlist-deduce.C
  12570a3277b174fbec9867439383c712  gcc/testsuite/g++.dg/cpp0x/initlist-deduce2.C
  164cef62ad37c1cf80ca6128f56094b2  gcc/testsuite/g++.dg/cpp0x/initlist-defarg1.C
  be08dc99a94b7b3278c8c66a5274c415  gcc/testsuite/g++.dg/cpp0x/initlist-defarg2.C
*************** f8949630a7a02f66d0ceb796b5525cb8  gcc/te
*** 11775,11781 ****
--- 12287,12295 ----
  797ec13acacd7b94b604de1651b198db  gcc/testsuite/g++.dg/cpp0x/initlist-n3922.C
  75fe6dcf44e6fa0a35cfaa871faa2b15  gcc/testsuite/g++.dg/cpp0x/initlist-new1.C
  7bddf9c6b842f5be4f0dcb028b72f5d6  gcc/testsuite/g++.dg/cpp0x/initlist-new2.C
+ c7426143406ef7a62dfbbb6b6ef974ca  gcc/testsuite/g++.dg/cpp0x/initlist-new3.C
  bcbe398391cda8139c8462f46935b7e2  gcc/testsuite/g++.dg/cpp0x/initlist-opt.C
+ e572423dbc63856346f68c0f83dab54a  gcc/testsuite/g++.dg/cpp0x/initlist-overload1.C
  a054a7d4e96233b7a3a6591843a8d33f  gcc/testsuite/g++.dg/cpp0x/initlist-pmf1.C
  e3ec7ab89d20e6ccf50aa92954896f07  gcc/testsuite/g++.dg/cpp0x/initlist-postfix-open-square.C
  1b5c7e432be89c3edcbfaad424a2e353  gcc/testsuite/g++.dg/cpp0x/initlist-protected.C
*************** f787403dc64b99be9c0c9b763121c4d7  gcc/te
*** 11810,11816 ****
  4d9bf62c5a26d090ff28c1f8c54bbfcf  gcc/testsuite/g++.dg/cpp0x/initlist114.C
  2a71e373ad8beaab8b8cdfe204c0f1fe  gcc/testsuite/g++.dg/cpp0x/initlist115.C
  f3e3a423075b6d0d03243d7a3125c656  gcc/testsuite/g++.dg/cpp0x/initlist118.C
! 540183723223acf529878183682623fb  gcc/testsuite/g++.dg/cpp0x/initlist12.C
  a5e64985a46db12492fa03d5e7dfd347  gcc/testsuite/g++.dg/cpp0x/initlist13.C
  3071307e831ae441c218cbab9dbc1d8f  gcc/testsuite/g++.dg/cpp0x/initlist14.C
  803cc72c140b1d53ee7a3e50e344d414  gcc/testsuite/g++.dg/cpp0x/initlist15.C
--- 12324,12334 ----
  4d9bf62c5a26d090ff28c1f8c54bbfcf  gcc/testsuite/g++.dg/cpp0x/initlist114.C
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  f3e3a423075b6d0d03243d7a3125c656  gcc/testsuite/g++.dg/cpp0x/initlist118.C
! 31217547242c5595304fc359b0208dd1  gcc/testsuite/g++.dg/cpp0x/initlist119.C
! 72c0cb48cd09853c2fc6940f74aaccd2  gcc/testsuite/g++.dg/cpp0x/initlist12.C
! 29c35f2a6e40093e69a57af1acacdc58  gcc/testsuite/g++.dg/cpp0x/initlist120.C
! 541d894667b752e80fa965821d083b78  gcc/testsuite/g++.dg/cpp0x/initlist121.C
! 92d788f8062cd25acbb2f8240948a8d4  gcc/testsuite/g++.dg/cpp0x/initlist122.C
  a5e64985a46db12492fa03d5e7dfd347  gcc/testsuite/g++.dg/cpp0x/initlist13.C
  3071307e831ae441c218cbab9dbc1d8f  gcc/testsuite/g++.dg/cpp0x/initlist14.C
  803cc72c140b1d53ee7a3e50e344d414  gcc/testsuite/g++.dg/cpp0x/initlist15.C
*************** cca8f0f32efd7aaaf7b91296cf791904  gcc/te
*** 11825,11839 ****
  64364ea12acb4240adbd595c64451aad  gcc/testsuite/g++.dg/cpp0x/initlist23.C
  ab7e6d43c7b15b554e82bf9c1cb322da  gcc/testsuite/g++.dg/cpp0x/initlist24.C
  e9d4087118231da3d279e1d516576092  gcc/testsuite/g++.dg/cpp0x/initlist25.C
! 40a2146f563ac0e1671708d086d2ddbc  gcc/testsuite/g++.dg/cpp0x/initlist26.C
  a91da33ee84c2ea78d5b6401d75d528e  gcc/testsuite/g++.dg/cpp0x/initlist27.C
! 409f1edeecc2d94cbbf54fc7a0255cd4  gcc/testsuite/g++.dg/cpp0x/initlist28.C
! d52f65c0efc2ba0b9bcad9eaab6271d3  gcc/testsuite/g++.dg/cpp0x/initlist29.C
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  a558a49726098b2e30f9484a7f3b4bb8  gcc/testsuite/g++.dg/cpp0x/initlist30.C
  d778aca18992e788189451060e227a20  gcc/testsuite/g++.dg/cpp0x/initlist31.C
  348452a0372d790b7162b71f61d7cbcf  gcc/testsuite/g++.dg/cpp0x/initlist32.C
! 6ba09d9c9e0fd292dde60c4e745e9293  gcc/testsuite/g++.dg/cpp0x/initlist33.C
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  8c75cbd72be21d449d42f2bc4b04ec7b  gcc/testsuite/g++.dg/cpp0x/initlist35.C
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--- 12343,12357 ----
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  e9d4087118231da3d279e1d516576092  gcc/testsuite/g++.dg/cpp0x/initlist25.C
! 790f2567a3f4ee757eebea15eadb2fee  gcc/testsuite/g++.dg/cpp0x/initlist26.C
  a91da33ee84c2ea78d5b6401d75d528e  gcc/testsuite/g++.dg/cpp0x/initlist27.C
! 289479e3cf59a28a7d9e0d3163e1cad5  gcc/testsuite/g++.dg/cpp0x/initlist28.C
! e740069b6b9e1423ef8e1b3610d6d39f  gcc/testsuite/g++.dg/cpp0x/initlist29.C
  ee2417eea379565b56e2d87788fa6673  gcc/testsuite/g++.dg/cpp0x/initlist3.C
  a558a49726098b2e30f9484a7f3b4bb8  gcc/testsuite/g++.dg/cpp0x/initlist30.C
  d778aca18992e788189451060e227a20  gcc/testsuite/g++.dg/cpp0x/initlist31.C
  348452a0372d790b7162b71f61d7cbcf  gcc/testsuite/g++.dg/cpp0x/initlist32.C
! a2834629b04af762946ceecad082bf0e  gcc/testsuite/g++.dg/cpp0x/initlist33.C
  53ef55753c091278fa63b21ed620c269  gcc/testsuite/g++.dg/cpp0x/initlist34.C
  8c75cbd72be21d449d42f2bc4b04ec7b  gcc/testsuite/g++.dg/cpp0x/initlist35.C
  17463ad4702c262b0d2f0c3a0d8ecae7  gcc/testsuite/g++.dg/cpp0x/initlist36.C
*************** bd9a289d0125621da4bc499b31e3f4dc  gcc/te
*** 11897,11903 ****
  9b12d77819d15cca867962c6c284d597  gcc/testsuite/g++.dg/cpp0x/initlist9.C
  8ac4b7fda1afbabe884fb435e50058e7  gcc/testsuite/g++.dg/cpp0x/initlist90.C
  2246fe95f3db3abaf2aef16782aad4aa  gcc/testsuite/g++.dg/cpp0x/initlist91.C
! 7e36dd916d221f5250944ac9bf993c93  gcc/testsuite/g++.dg/cpp0x/initlist92.C
  cf8755fd15f43cbec418f59193dc9a93  gcc/testsuite/g++.dg/cpp0x/initlist93.C
  45d64991bc424279411d7f51c978e541  gcc/testsuite/g++.dg/cpp0x/initlist94.C
  c27ca98c8a89c6bae88c1f75ab92d8f2  gcc/testsuite/g++.dg/cpp0x/initlist95.C
--- 12415,12421 ----
  9b12d77819d15cca867962c6c284d597  gcc/testsuite/g++.dg/cpp0x/initlist9.C
  8ac4b7fda1afbabe884fb435e50058e7  gcc/testsuite/g++.dg/cpp0x/initlist90.C
  2246fe95f3db3abaf2aef16782aad4aa  gcc/testsuite/g++.dg/cpp0x/initlist91.C
! 1db2904b88a501ae452f0c8fc1fc5cdf  gcc/testsuite/g++.dg/cpp0x/initlist92.C
  cf8755fd15f43cbec418f59193dc9a93  gcc/testsuite/g++.dg/cpp0x/initlist93.C
  45d64991bc424279411d7f51c978e541  gcc/testsuite/g++.dg/cpp0x/initlist94.C
  c27ca98c8a89c6bae88c1f75ab92d8f2  gcc/testsuite/g++.dg/cpp0x/initlist95.C
*************** d760d0a7496b6388d094295ed24d69c2  gcc/te
*** 11934,11939 ****
--- 12452,12458 ----
  e3e033217dd9afad744590e36bbae723  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-89158.C
  80270fb7ac39c71842d867b9d9450c14  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-89387.C
  e5baf09943b216da8f648a3463ce27ec  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-89648.C
+ dd5a1d8825301f34c70b68766377b76d  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-93597.C
  d9b3b9597d3bf51088b71abd8f440104  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-98.C
  220829872340dbf04070c457af860d3c  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-__func__.C
  101b0e2a29835d3f460096703091da25  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-__func__2.C
*************** c8bb19b0550505147cc17a59ca8b2c5e  gcc/te
*** 11942,11948 ****
  4a4a71f2c93c7e5e1b91f4c5e042b71f  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-array2.C
  7209902f770a13ca53a0fdefe12a149c  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-array3.C
  de587add0ca42e32537302826d4176cd  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-asm1.C
! 3060b30d35a9e9c120739f10c831bbb2  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-attr1.C
  12e217d7c561fa4925e741bbe7cac652  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-attr2.C
  187afac210e9e3812bc885dc82b852c9  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-auto1.C
  c6b435df2e057f17565b118504b3c651  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-auto2.C
--- 12461,12467 ----
  4a4a71f2c93c7e5e1b91f4c5e042b71f  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-array2.C
  7209902f770a13ca53a0fdefe12a149c  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-array3.C
  de587add0ca42e32537302826d4176cd  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-asm1.C
! 9f8d4c9a9712342806e07dd5c882a533  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-attr1.C
  12e217d7c561fa4925e741bbe7cac652  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-attr2.C
  187afac210e9e3812bc885dc82b852c9  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-auto1.C
  c6b435df2e057f17565b118504b3c651  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-auto2.C
*************** f130e737443b7a01f91ec2fe01f62eff  gcc/te
*** 11964,11972 ****
  2e57b10c1463ef9819d08221f0daa540  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const7.C
  b585b1ced3a56644fa0fe5fea48a7186  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const8.C
  2b3062fcf828f181fc3399b93693031a  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const9.C
  db7bc02fc98b9ea2b1ac747f9c1b93fc  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv.C
  59ff738b6c6f39d1085d9586f3b2460e  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv10.C
! 522c3e9a3e7905c1f6e87fc6ce263930  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv11.C
  e68f0f2940c3cb9d879b66d1c30fa709  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv12.C
  3dbab9bf6a8658397ceee8badb58e22b  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv13.C
  299fbfde279f22ba6cf7e79d7e17f49b  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv2.C
--- 12483,12492 ----
  2e57b10c1463ef9819d08221f0daa540  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const7.C
  b585b1ced3a56644fa0fe5fea48a7186  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const8.C
  2b3062fcf828f181fc3399b93693031a  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const9.C
+ b4468f4f3ad891d5e034fa908a0a57e9  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-constexpr1.C
  db7bc02fc98b9ea2b1ac747f9c1b93fc  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv.C
  59ff738b6c6f39d1085d9586f3b2460e  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv10.C
! af8f4c292dd27cf325f9b83b0e8ae304  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv11.C
  e68f0f2940c3cb9d879b66d1c30fa709  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv12.C
  3dbab9bf6a8658397ceee8badb58e22b  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv13.C
  299fbfde279f22ba6cf7e79d7e17f49b  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv2.C
*************** f84ddfe5534d65a28836f3e1f7f92bbe  gcc/te
*** 11986,11992 ****
  620c51f35ce9293367e1ae8b3038f83a  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-debug.C
  23762f5c7832f1cc2669f9358277141c  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-decltype1.C
  3ad56243aecddd505746acfd0489c7b7  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-decltype2.C
! f6c210c1c7e7dd66df36d8ef7876d028  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-deduce-ext-neg.C
  e0fcc12ea86ca07e002f0dd4599d71b4  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-deduce-ext-neg2.C
  9edc8f5532794fc604ffd377c6d84b82  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-deduce-neg.C
  09786f33b21f73e03794802f7bd62377  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-deduce.C
--- 12506,12512 ----
  620c51f35ce9293367e1ae8b3038f83a  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-debug.C
  23762f5c7832f1cc2669f9358277141c  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-decltype1.C
  3ad56243aecddd505746acfd0489c7b7  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-decltype2.C
! 9a9463ed3486e89b0432bdba5e217c4b  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-deduce-ext-neg.C
  e0fcc12ea86ca07e002f0dd4599d71b4  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-deduce-ext-neg2.C
  9edc8f5532794fc604ffd377c6d84b82  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-deduce-neg.C
  09786f33b21f73e03794802f7bd62377  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-deduce.C
*************** b0a5175c866c3f8cc9595a3a187eaad5  gcc/te
*** 12004,12021 ****
  38a5c8e0569ee441818049e1f170838f  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-dependent1.C
  e8dd4784bd328df4e1de1999906f386b  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-diag1.C
  e4baead2918480aa1e47e55ecfdaef26  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-direct-init.C
- 608222e5fa9681660b33f435a7788d0a  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-eh.C
  648328393aca4082788e0744e52e3e04  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-eh2.C
  0ab2ed931f43d51b53e363fe32167ff6  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-eh3.C
  9d4fde9cfb96267081f1aa77d2deeb36  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-err1.C
! eb6effb9eb957ed45362f2cd4c444d24  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-err2.C
  3c3c692d78d20810a507ca61f516f335  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-err3.C
  c6b21ef3d42d35ffe79ed36524e9ec61  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-errloc.C
  565028d290a1aaefcc898ddc343c790d  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-errloc2.C
  64d58e1c51e2027bb140c1dd770b59be  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-field-names.C
  8e477764dd6337808dde5daa1a40dba2  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-for.C
  0718fc0a437732be6811f43a1735a976  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice1.C
! d010708ff9dfabefb31e6ac59b3c7b96  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice10.C
  d2f0042eab3739e1bd09f52de25d0071  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice11.C
  a2ff0e65a2311577d1f595af7795c694  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice12.C
  f4d7c3883b7ff95465ec63f63b569187  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice13.C
--- 12524,12540 ----
  38a5c8e0569ee441818049e1f170838f  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-dependent1.C
  e8dd4784bd328df4e1de1999906f386b  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-diag1.C
  e4baead2918480aa1e47e55ecfdaef26  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-direct-init.C
  648328393aca4082788e0744e52e3e04  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-eh2.C
  0ab2ed931f43d51b53e363fe32167ff6  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-eh3.C
  9d4fde9cfb96267081f1aa77d2deeb36  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-err1.C
! 060163907dc82ea50945260f2b6fdcc8  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-err2.C
  3c3c692d78d20810a507ca61f516f335  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-err3.C
  c6b21ef3d42d35ffe79ed36524e9ec61  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-errloc.C
  565028d290a1aaefcc898ddc343c790d  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-errloc2.C
  64d58e1c51e2027bb140c1dd770b59be  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-field-names.C
  8e477764dd6337808dde5daa1a40dba2  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-for.C
  0718fc0a437732be6811f43a1735a976  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice1.C
! 44ab37b79623d334b6f0f82bbee28af5  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice10.C
  d2f0042eab3739e1bd09f52de25d0071  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice11.C
  a2ff0e65a2311577d1f595af7795c694  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice12.C
  f4d7c3883b7ff95465ec63f63b569187  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice13.C
*************** c9399095e908bfb2c338755b0557db76  gcc/te
*** 12039,12044 ****
--- 12558,12564 ----
  8163be06d8cb83f18060b0f809886f54  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice3.C
  566757828ca7fd872e3ce086519d1f94  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice30.C
  509c6bc8173633403a3b69ff7b8b13df  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice31.C
+ 7e07661dc1ca992b2b4883b3ef8927b7  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice32.C
  47226bea0ac5dc3c286fd8fe05473a80  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice4.C
  08db2d244c01eaf3577fdfbf5896e831  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice5.C
  013befc905429c5e9dd82dd968dd005e  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice6.C
*************** f33b3ea62d84fcfc133c8244474d4e53  gcc/te
*** 12053,12063 ****
  35991a38498aa38210830132f5fa17c2  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-intname.C
  bc00a977840d32643b8a79c194a24b04  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-local1.C
  3d5fac660854c02a5bec76cbbd0ba95d  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-lookup-neg.C
! 92fefb85a61373d151ed5d5b0e5c14aa  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mangle.C
  bc4834e829a567ab458b88513efb0adc  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mangle2.C
  a3babe4a5a450c501c6d3daf88a2a741  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mangle3.C
  9dc008f9d5045d3deab89ba4ac3a1544  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mangle4.C
  543ea50ea09345cb7118e5bb0639b733  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mangle5.C
  eeae91bf7da7535c64375c8b6e2ad746  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mixed.C
  3292c801823c4c4aa6fe6e560dd10624  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mutable.C
  ed3cffe55f643c172f1955fc59175de2  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mutable2.C
--- 12573,12584 ----
  35991a38498aa38210830132f5fa17c2  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-intname.C
  bc00a977840d32643b8a79c194a24b04  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-local1.C
  3d5fac660854c02a5bec76cbbd0ba95d  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-lookup-neg.C
! 0c66941b78fb17dd08b48ed0294e0479  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mangle.C
  bc4834e829a567ab458b88513efb0adc  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mangle2.C
  a3babe4a5a450c501c6d3daf88a2a741  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mangle3.C
  9dc008f9d5045d3deab89ba4ac3a1544  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mangle4.C
  543ea50ea09345cb7118e5bb0639b733  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mangle5.C
+ 6240609c482a5a29a2e64e03e50d440c  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mangle6.C
  eeae91bf7da7535c64375c8b6e2ad746  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mixed.C
  3292c801823c4c4aa6fe6e560dd10624  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mutable.C
  ed3cffe55f643c172f1955fc59175de2  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-mutable2.C
*************** cb3b2650a080bd9c7acfa0a46c317afe  gcc/te
*** 12130,12135 ****
--- 12651,12657 ----
  0ce8fb4c59c538e1cfae95698dd75432  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this19.C
  cc4765893caa87184d413c00dfcebbdf  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this2.C
  b6ddea01d88ae9c7b77c9063bd626372  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this20.C
+ 6049913bbade35678c9dba1f34363ef1  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this21.C
  4d206d41378a3a22959ec8c2c1439014  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this3.C
  63fdeead97cb6030e039c864293a278b  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this4.C
  a1527f0e0a6049284f314faba2a6a27f  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this5.C
*************** bb6feb4793b61fdd7abfa89b1284d0ab  gcc/te
*** 12144,12149 ****
--- 12666,12672 ----
  7a7e2f3dfeb05aed9d632e3d645bfe5c  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-use.C
  76cbd45d77305f1f4413f70fb8213751  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-use2.C
  18c978d671e4db891b45910e69c90461  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-variadic1.C
+ 3ac45d44a43ae18f34839cf90f32815e  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-variadic10.C
  4207a17bd687f925ffa814b5967e6fad  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-variadic2.C
  4aceadd2b246ab66ad033bf33c21e79a  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-variadic3.C
  f834269fe12aa32c10b9a1ccedad58d6  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-variadic4.C
*************** b04e79d6eb874572f153681bc89d3eae  gcc/te
*** 12155,12168 ****
  a667f158c89a42014e4ccc192862b932  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-vla1.C
  9da68ff6b459e7ba59b9ed131bcd5fa5  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-vla2.C
  d1d6585012ce959c2cfe7d34a8d32f1f  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-vla3.C
  8c9e7ce9968698440f1e47686a929bb1  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-warn1.C
  1af236773511fe3a7320590aa6d59e45  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-warn2.C
  1721b206a34146aec4acd108fcd04b6c  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-warn3.C
  7255e800041a798555ab9b7f8fd3108d  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-warn4.C
  597f79827ab167c158bc3b52aa51e573  gcc/testsuite/g++.dg/cpp0x/linkage2.C
  ceadcf043cb7e277e03b4160aab8102e  gcc/testsuite/g++.dg/cpp0x/local-targ1.C
  2fc41c677c8e84c030121c0ae006b699  gcc/testsuite/g++.dg/cpp0x/local-type1.C
! 720c06b5c25cab6c40b3316fae6b92b6  gcc/testsuite/g++.dg/cpp0x/locations1.C
  41600003230a22f3cbcc4e6fac3dde3d  gcc/testsuite/g++.dg/cpp0x/long_long.C
  0f1a7b03015ad65ff22caedf39bbdd41  gcc/testsuite/g++.dg/cpp0x/main1.C
  c994f9d97744ab8028b2b30365d6830e  gcc/testsuite/g++.dg/cpp0x/mem-init-aggr1.C
--- 12678,12696 ----
  a667f158c89a42014e4ccc192862b932  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-vla1.C
  9da68ff6b459e7ba59b9ed131bcd5fa5  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-vla2.C
  d1d6585012ce959c2cfe7d34a8d32f1f  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-vla3.C
+ 77f4e6cc4597b954339280bc19854824  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-vla4.C
+ fbb4a596d7a8bbadec829208456e278b  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-vla5.C
  8c9e7ce9968698440f1e47686a929bb1  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-warn1.C
  1af236773511fe3a7320590aa6d59e45  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-warn2.C
  1721b206a34146aec4acd108fcd04b6c  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-warn3.C
  7255e800041a798555ab9b7f8fd3108d  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-warn4.C
+ 55e51064d61136b2fc56a556b82f97cd  gcc/testsuite/g++.dg/cpp0x/lambda/pr94426-1.C
+ 3d6f07b3db79eaa5784b2af709c297de  gcc/testsuite/g++.dg/cpp0x/lambda/pr94426-2.C
  597f79827ab167c158bc3b52aa51e573  gcc/testsuite/g++.dg/cpp0x/linkage2.C
+ b5bfe09b3a6a445ea1f567939c595cc9  gcc/testsuite/g++.dg/cpp0x/literal-type1.C
  ceadcf043cb7e277e03b4160aab8102e  gcc/testsuite/g++.dg/cpp0x/local-targ1.C
  2fc41c677c8e84c030121c0ae006b699  gcc/testsuite/g++.dg/cpp0x/local-type1.C
! cd8432c1af15f4b569241057f6cca8bc  gcc/testsuite/g++.dg/cpp0x/locations1.C
  41600003230a22f3cbcc4e6fac3dde3d  gcc/testsuite/g++.dg/cpp0x/long_long.C
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*************** fe526337c46e51da61277e503a425d3c  gcc/te
*** 12181,12199 ****
  981a1b52d13a4061d8e2bfcbe9c0fba0  gcc/testsuite/g++.dg/cpp0x/no-weak1.C
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! db2a149a605aefe6c3ec1ff014c718e1  gcc/testsuite/g++.dg/cpp0x/noexcept15.C
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--- 12709,12727 ----
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*************** a0e44dc1e8f11505922ef4ad50fc35c3  gcc/te
*** 12219,12226 ****
--- 12747,12769 ----
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*************** c92e0eda44dd6b3d74960b249fa5204f  gcc/te
*** 12228,12234 ****
--- 12771,12783 ----
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*************** b8706c4b353788bfe037cbbf67877a76  gcc/te
*** 12248,12253 ****
--- 12797,12803 ----
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  6a97f223fff723db9f950c32a7828e35  gcc/testsuite/g++.dg/cpp0x/nsdmi-template1.C
*************** f6b13d6e4f8551af6696e76147a52fb9  gcc/te
*** 12295,12301 ****
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! 41a8752eaf8bea288958b279ecabaacd  gcc/testsuite/g++.dg/cpp0x/nullptr04.C
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--- 12845,12851 ----
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*************** d777236ca68365e8e6a7b45bf4e707fb  gcc/te
*** 12318,12324 ****
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--- 12868,12874 ----
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*************** a5272f2b141b976a80585ef6cded80e8  gcc/te
*** 12328,12339 ****
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--- 12878,12891 ----
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*************** a174690fe306aaf345b02df91c3ddebe  gcc/te
*** 12354,12360 ****
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--- 12906,12912 ----
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*************** fee88fa74a737885a8b333edaeadea5f  gcc/te
*** 12372,12378 ****
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--- 12924,12930 ----
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*************** b5f4aef18b560b7280f82fd482d125c3  gcc/te
*** 12384,12390 ****
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--- 12936,12942 ----
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*************** e9182fc181b2f685d1473abd3dc6494e  gcc/te
*** 12451,12457 ****
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--- 13003,13009 ----
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  525a7f1677a2f8d9ca18bad15207261b  gcc/testsuite/g++.dg/cpp0x/pr65558.C
*************** e3798eda72e850294e15fe5d76637811  gcc/te
*** 12466,12472 ****
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  448bc36042e9d013ec7bfb4a8df5c4ca  gcc/testsuite/g++.dg/cpp0x/pr68348.C
! e512f6703be7d9559d02caf34601fba6  gcc/testsuite/g++.dg/cpp0x/pr68724.C
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  d584417478a609ab589447aa7e173812  gcc/testsuite/g++.dg/cpp0x/pr69056.C
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--- 13018,13024 ----
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! 9fa085e414e7864d4503ab7c516f33a3  gcc/testsuite/g++.dg/cpp0x/pr68724.C
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  72ddfeb4cc0f740fe85e9fb11ecf08c6  gcc/testsuite/g++.dg/cpp0x/pr69481.C
*************** a32de62864222434c111c70941412a14  gcc/te
*** 12514,12520 ****
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  6a8a3192f33b5a97c95c21fc48b0f717  gcc/testsuite/g++.dg/cpp0x/pr78890-2.C
! 81bec8048abafcd5a12ebbf8b73aee8f  gcc/testsuite/g++.dg/cpp0x/pr79118.C
  6cef64c2476ef0d34f1295562a595936  gcc/testsuite/g++.dg/cpp0x/pr79296.C
  d34b0013209051900b8114802ea89d6d  gcc/testsuite/g++.dg/cpp0x/pr79361-1.C
  082b887aa1f2c8f001a0beace0ba3331  gcc/testsuite/g++.dg/cpp0x/pr79361-2.C
--- 13066,13072 ----
  59ab20c472dedbf6674ed028c898469b  gcc/testsuite/g++.dg/cpp0x/pr78771-old.C
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! e95574892ed489d9ea065571fb305359  gcc/testsuite/g++.dg/cpp0x/pr79118.C
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  d34b0013209051900b8114802ea89d6d  gcc/testsuite/g++.dg/cpp0x/pr79361-1.C
  082b887aa1f2c8f001a0beace0ba3331  gcc/testsuite/g++.dg/cpp0x/pr79361-2.C
*************** ce317b0879de92313ef6b7d499d12986  gcc/te
*** 12540,12546 ****
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  70a182b3dddc113e81b5322b16298fe4  gcc/testsuite/g++.dg/cpp0x/pr83978.C
! 71d60efef3e782a1d320da23ac44744e  gcc/testsuite/g++.dg/cpp0x/pr83993.C
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  bb7f83402a9ba07412c928a5c22bdf7d  gcc/testsuite/g++.dg/cpp0x/pr84585.C
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--- 13092,13098 ----
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! 3d3d4cf4662fd6a946d39e4e223bd600  gcc/testsuite/g++.dg/cpp0x/pr83993.C
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  3357d765c2a248307f8a2822fc51cdf5  gcc/testsuite/g++.dg/cpp0x/pr84606.C
*************** bb7f83402a9ba07412c928a5c22bdf7d  gcc/te
*** 12548,12554 ****
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--- 13100,13106 ----
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*************** cbb0714a6c1942035c56360615afc6d1  gcc/te
*** 12568,12573 ****
--- 13120,13126 ----
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*************** db21b41ed5477b5b7d2b3c575f29a0ff  gcc/te
*** 12581,12586 ****
--- 13134,13141 ----
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  1f725aacb479fe72f5d994446fab5d54  gcc/testsuite/g++.dg/cpp0x/ptrmem-cst-arg1.C
*************** cf3faabae812bd6f8ade13f3c1d36871  gcc/te
*** 12620,12625 ****
--- 13175,13187 ----
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  95c63c47fabae91ec605312aa14b8b87  gcc/testsuite/g++.dg/cpp0x/range-for9.C
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+ 8a71cf891e8518665824499f113e2f05  gcc/testsuite/g++.dg/cpp0x/ref-bind2.C
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+ 7bd7d572797664b340cbbd95894feb6e  gcc/testsuite/g++.dg/cpp0x/ref-bind4.C
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+ 49a197500ff063e67fcb6e5da7a86594  gcc/testsuite/g++.dg/cpp0x/ref-bind6.C
+ 40e3f42cd5f4b322013adb46fba11bd2  gcc/testsuite/g++.dg/cpp0x/ref-bind7.C
  87cba3bd81389f956a4ab8405ad5dc46  gcc/testsuite/g++.dg/cpp0x/ref-qual-mangle1.C
  af4673410b97bcc5393dd82a2599c2d1  gcc/testsuite/g++.dg/cpp0x/ref-qual-multi-neg.C
  d0d588806aef3922d92ee7fb7c632659  gcc/testsuite/g++.dg/cpp0x/ref-qual1.C
*************** c288331543b30d300aa6764b7ae67cda  gcc/te
*** 12644,12665 ****
  ed1433ae38ea49612a71ea6123c29d74  gcc/testsuite/g++.dg/cpp0x/ref-qual9.C
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  c64ae67d31b051e49d0eb8f2c33f4819  gcc/testsuite/g++.dg/cpp0x/reinterpret_cast1.C
! cdd198e87cf6f674f85fbbf5d3184523  gcc/testsuite/g++.dg/cpp0x/reinterpret_cast2.C
  2d33d6463b23da791a795f21e50b808a  gcc/testsuite/g++.dg/cpp0x/rv-array1.C
  9122229630112e85dde4be74e27fcb88  gcc/testsuite/g++.dg/cpp0x/rv-bitfield.C
  1e9966d28717f5fb799ff5c2afa3c83b  gcc/testsuite/g++.dg/cpp0x/rv-bitfield2.C
  6f717309141d65e0f5a5766b9d4d703c  gcc/testsuite/g++.dg/cpp0x/rv-bitfield3.C
  82da21d14a2076c80f60b0fe3bae2177  gcc/testsuite/g++.dg/cpp0x/rv-cast.C
! 59ec35f5f583d041fec6e83c1dc6887c  gcc/testsuite/g++.dg/cpp0x/rv-cast2.C
  2f59293907015075e8362ece252a2234  gcc/testsuite/g++.dg/cpp0x/rv-cast3.C
  db69e4e0631892725d99d48517e599d5  gcc/testsuite/g++.dg/cpp0x/rv-cast4.C
  264ff9d7cfc38198ff55c16a016563aa  gcc/testsuite/g++.dg/cpp0x/rv-cast5.C
  2afe0a70cc7f7f067a60ce414d09ab4a  gcc/testsuite/g++.dg/cpp0x/rv-cast6.C
  ccba3040ed86b5ffae7d72b18f556d1c  gcc/testsuite/g++.dg/cpp0x/rv-cond1.C
  682309935142019cb21a9df2c35d9a5c  gcc/testsuite/g++.dg/cpp0x/rv-cond2.C
  3a02f68ebc48112a74f31983fd72c639  gcc/testsuite/g++.dg/cpp0x/rv-cond3.C
  4d78acdd9f4b8ae8afa532ceaf0c07c4  gcc/testsuite/g++.dg/cpp0x/rv-conv1.C
! 68fdce54ec37dd9c4ce6cc23940e6669  gcc/testsuite/g++.dg/cpp0x/rv-conv2.C
  55bf372aa23fed509d52b517cd46aa98  gcc/testsuite/g++.dg/cpp0x/rv-conv3.C
  889a7002f4d78b4abd44856da792f8dc  gcc/testsuite/g++.dg/cpp0x/rv-copy1.C
  de88aaa56b0d394bd02f079bb0f4dddf  gcc/testsuite/g++.dg/cpp0x/rv-deduce.C
--- 13206,13228 ----
  ed1433ae38ea49612a71ea6123c29d74  gcc/testsuite/g++.dg/cpp0x/ref-qual9.C
  3d3c78a78484238b76f840d346c73307  gcc/testsuite/g++.dg/cpp0x/reference_collapsing.C
  c64ae67d31b051e49d0eb8f2c33f4819  gcc/testsuite/g++.dg/cpp0x/reinterpret_cast1.C
! b40ac51909e6a02c84a04247688b185c  gcc/testsuite/g++.dg/cpp0x/reinterpret_cast2.C
  2d33d6463b23da791a795f21e50b808a  gcc/testsuite/g++.dg/cpp0x/rv-array1.C
  9122229630112e85dde4be74e27fcb88  gcc/testsuite/g++.dg/cpp0x/rv-bitfield.C
  1e9966d28717f5fb799ff5c2afa3c83b  gcc/testsuite/g++.dg/cpp0x/rv-bitfield2.C
  6f717309141d65e0f5a5766b9d4d703c  gcc/testsuite/g++.dg/cpp0x/rv-bitfield3.C
  82da21d14a2076c80f60b0fe3bae2177  gcc/testsuite/g++.dg/cpp0x/rv-cast.C
! 108729688256a7cc0defac9e6312e7fc  gcc/testsuite/g++.dg/cpp0x/rv-cast2.C
  2f59293907015075e8362ece252a2234  gcc/testsuite/g++.dg/cpp0x/rv-cast3.C
  db69e4e0631892725d99d48517e599d5  gcc/testsuite/g++.dg/cpp0x/rv-cast4.C
  264ff9d7cfc38198ff55c16a016563aa  gcc/testsuite/g++.dg/cpp0x/rv-cast5.C
  2afe0a70cc7f7f067a60ce414d09ab4a  gcc/testsuite/g++.dg/cpp0x/rv-cast6.C
+ 27fca615b5ec8b1c9bd7d91180538466  gcc/testsuite/g++.dg/cpp0x/rv-cast7.C
  ccba3040ed86b5ffae7d72b18f556d1c  gcc/testsuite/g++.dg/cpp0x/rv-cond1.C
  682309935142019cb21a9df2c35d9a5c  gcc/testsuite/g++.dg/cpp0x/rv-cond2.C
  3a02f68ebc48112a74f31983fd72c639  gcc/testsuite/g++.dg/cpp0x/rv-cond3.C
  4d78acdd9f4b8ae8afa532ceaf0c07c4  gcc/testsuite/g++.dg/cpp0x/rv-conv1.C
! 0a9a74fc1be6ebe8c0f8c42d06cbc453  gcc/testsuite/g++.dg/cpp0x/rv-conv2.C
  55bf372aa23fed509d52b517cd46aa98  gcc/testsuite/g++.dg/cpp0x/rv-conv3.C
  889a7002f4d78b4abd44856da792f8dc  gcc/testsuite/g++.dg/cpp0x/rv-copy1.C
  de88aaa56b0d394bd02f079bb0f4dddf  gcc/testsuite/g++.dg/cpp0x/rv-deduce.C
*************** f213598004dcfd0117fecc9593637790  gcc/te
*** 12669,12675 ****
  94c30aa2c23a35b6b477f7b1b868841b  gcc/testsuite/g++.dg/cpp0x/rv-func2.C
  b90dda56d04244318a53aa1fd8d04e61  gcc/testsuite/g++.dg/cpp0x/rv-func3.C
  a622d27a6844d3ef35c8d8c481a42bb5  gcc/testsuite/g++.dg/cpp0x/rv-init1.C
! 80d18310cc9ae43358ab8ce4c8a35323  gcc/testsuite/g++.dg/cpp0x/rv-lvalue-req.C
  2a81ce678792db63349c1f40f691b226  gcc/testsuite/g++.dg/cpp0x/rv-reinterpret.C
  57ca627add7fb3090157211ed3ea80fd  gcc/testsuite/g++.dg/cpp0x/rv-restrict.C
  66a6ae714e2694ad87aa5a2e51b9c52c  gcc/testsuite/g++.dg/cpp0x/rv-return.C
--- 13232,13238 ----
  94c30aa2c23a35b6b477f7b1b868841b  gcc/testsuite/g++.dg/cpp0x/rv-func2.C
  b90dda56d04244318a53aa1fd8d04e61  gcc/testsuite/g++.dg/cpp0x/rv-func3.C
  a622d27a6844d3ef35c8d8c481a42bb5  gcc/testsuite/g++.dg/cpp0x/rv-init1.C
! eb4954f499863f542d04423a5703a544  gcc/testsuite/g++.dg/cpp0x/rv-lvalue-req.C
  2a81ce678792db63349c1f40f691b226  gcc/testsuite/g++.dg/cpp0x/rv-reinterpret.C
  57ca627add7fb3090157211ed3ea80fd  gcc/testsuite/g++.dg/cpp0x/rv-restrict.C
  66a6ae714e2694ad87aa5a2e51b9c52c  gcc/testsuite/g++.dg/cpp0x/rv-return.C
*************** ddee5e1bf0ce08cff4566375599c67f1  gcc/te
*** 12679,12702 ****
  779fd2d42bfb701a65f0e9552cb88d65  gcc/testsuite/g++.dg/cpp0x/rv-this2.C
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  ce88e86fef9026207a379023cb8c2d11  gcc/testsuite/g++.dg/cpp0x/rv10.C
! c259a71550b325c7c9b7d034c638a1a1  gcc/testsuite/g++.dg/cpp0x/rv1n.C
! 22f5c176e19df95d176c87ec1d8d0ed8  gcc/testsuite/g++.dg/cpp0x/rv1p.C
! 1f6b8fee55af59e66affa85399eb566c  gcc/testsuite/g++.dg/cpp0x/rv2n.C
! 2f84602e59d796139880cb7b6873abf6  gcc/testsuite/g++.dg/cpp0x/rv2p.C
! efbb06ae1752341ac888db26198eadad  gcc/testsuite/g++.dg/cpp0x/rv3n.C
! 352f21c5ee38f37b10364d14c0b73b3c  gcc/testsuite/g++.dg/cpp0x/rv3p.C
! 34f1fb070d5e0bd43119e5e95813923f  gcc/testsuite/g++.dg/cpp0x/rv4n.C
! 0a41d5a05a2bf97019094d11b5ca06a6  gcc/testsuite/g++.dg/cpp0x/rv4p.C
! ea5c980652a3d4cec9716f209b73dcce  gcc/testsuite/g++.dg/cpp0x/rv5n.C
! d74e0f701c9e3b5d05ecb524827d76b8  gcc/testsuite/g++.dg/cpp0x/rv5p.C
! f8932d821196cd4ff1253ded7abfe6f3  gcc/testsuite/g++.dg/cpp0x/rv6n.C
! cb2efb2a6d22a06df03c6f7bd0f7e016  gcc/testsuite/g++.dg/cpp0x/rv6p.C
! 5a9623af46a6b62c5e1dcb85686268d7  gcc/testsuite/g++.dg/cpp0x/rv7n.C
! ad995236b5e567490bd4aac3abe61317  gcc/testsuite/g++.dg/cpp0x/rv7p.C
! dbfcfd86642ca2356dc24ed9700c2fbe  gcc/testsuite/g++.dg/cpp0x/rv8p.C
  8568feb0868ae4989d6f1e0f0816198b  gcc/testsuite/g++.dg/cpp0x/rv9p.C
  9328b0378950a77e4d83178cdca07ca6  gcc/testsuite/g++.dg/cpp0x/rvo.C
  d2a48680a52815fe32ccc773a43bfb6d  gcc/testsuite/g++.dg/cpp0x/scoped_enum.C
  2e29d3eec85e64bea1a4b77bde8a1f4e  gcc/testsuite/g++.dg/cpp0x/scoped_enum2.C
  8bf59e171ba21d86aad1d3a5eb652d37  gcc/testsuite/g++.dg/cpp0x/scoped_enum3.C
  1e24d1d0ae7f073e1479225d241dc5e1  gcc/testsuite/g++.dg/cpp0x/scoped_enum4.C
--- 13242,13267 ----
  779fd2d42bfb701a65f0e9552cb88d65  gcc/testsuite/g++.dg/cpp0x/rv-this2.C
  35f5356c301b8d554b6ddb747601f71f  gcc/testsuite/g++.dg/cpp0x/rv-trivial-bug.C
  ce88e86fef9026207a379023cb8c2d11  gcc/testsuite/g++.dg/cpp0x/rv10.C
! 984f2314039ca0acd236476411e758f0  gcc/testsuite/g++.dg/cpp0x/rv1n.C
! 15d87dec28bc2bf07957aa2efac8c5e6  gcc/testsuite/g++.dg/cpp0x/rv1p.C
! ac261eafb3e495cf20262a70de7dfb7e  gcc/testsuite/g++.dg/cpp0x/rv2n.C
! 0be439b36117f9917e597e257ec4f97e  gcc/testsuite/g++.dg/cpp0x/rv2p.C
! cee372decdb9877c0b4e54abf202d891  gcc/testsuite/g++.dg/cpp0x/rv3n.C
! f83f5f07c48f1a21ff377a8221fecc7c  gcc/testsuite/g++.dg/cpp0x/rv3p.C
! 228bee1a8e482ecc0bbd747ffbdea0a3  gcc/testsuite/g++.dg/cpp0x/rv4n.C
! e0b4689897e409a291fe930817b83fc6  gcc/testsuite/g++.dg/cpp0x/rv4p.C
! 8036a42565533c21b9cf9f42014c0719  gcc/testsuite/g++.dg/cpp0x/rv5n.C
! b7fcac6d25d00cfd3c811ecd387e1cfe  gcc/testsuite/g++.dg/cpp0x/rv5p.C
! 7ec0af41c6aa4fb9bf1066f955988c1b  gcc/testsuite/g++.dg/cpp0x/rv6n.C
! bd42ab7e47ac21e4d8ce605c4d31417d  gcc/testsuite/g++.dg/cpp0x/rv6p.C
! 237b133e2fecdeff0ffa813ebd9270a7  gcc/testsuite/g++.dg/cpp0x/rv7n.C
! 6430fc164cb972a0bd11a9693f6bf989  gcc/testsuite/g++.dg/cpp0x/rv7p.C
! 150241ce9261d7617231c46520453f43  gcc/testsuite/g++.dg/cpp0x/rv8p.C
  8568feb0868ae4989d6f1e0f0816198b  gcc/testsuite/g++.dg/cpp0x/rv9p.C
  9328b0378950a77e4d83178cdca07ca6  gcc/testsuite/g++.dg/cpp0x/rvo.C
  d2a48680a52815fe32ccc773a43bfb6d  gcc/testsuite/g++.dg/cpp0x/scoped_enum.C
+ dbf403dece2dcda754e190c99117436a  gcc/testsuite/g++.dg/cpp0x/scoped_enum10.C
+ 5fe71eb7441c614cb101c4588673b0ca  gcc/testsuite/g++.dg/cpp0x/scoped_enum11.C
  2e29d3eec85e64bea1a4b77bde8a1f4e  gcc/testsuite/g++.dg/cpp0x/scoped_enum2.C
  8bf59e171ba21d86aad1d3a5eb652d37  gcc/testsuite/g++.dg/cpp0x/scoped_enum3.C
  1e24d1d0ae7f073e1479225d241dc5e1  gcc/testsuite/g++.dg/cpp0x/scoped_enum4.C
*************** d2a48680a52815fe32ccc773a43bfb6d  gcc/te
*** 12704,12709 ****
--- 13269,13275 ----
  3f236d1e4bfadb8a02c1a7289b23bad2  gcc/testsuite/g++.dg/cpp0x/scoped_enum6.C
  8d757b1b8b2bb07f96bcaba2a77354dd  gcc/testsuite/g++.dg/cpp0x/scoped_enum7.C
  b3ee3166a5741307088b2339967053fe  gcc/testsuite/g++.dg/cpp0x/scoped_enum8.C
+ b15547e978fb9f580b852e2581dabb0c  gcc/testsuite/g++.dg/cpp0x/scoped_enum9.C
  fd6131462c6e3edcb0e1d2d7c01ff384  gcc/testsuite/g++.dg/cpp0x/scoped_enum_98.C
  6685ec50d52d3887bdc0a886cae9ec64  gcc/testsuite/g++.dg/cpp0x/scoped_enum_examples.C
  8127b3be0d9d5dd0589006e9bbc74bc4  gcc/testsuite/g++.dg/cpp0x/sfinae-nullptr1.C
*************** fadfd124d98089fde0add757adc40755  gcc/te
*** 12772,12781 ****
  ec1a51ea3fd41e6e61c8f425bde1fd0b  gcc/testsuite/g++.dg/cpp0x/sfinae7.C
  547894832b1452d5f513938e0cb8a166  gcc/testsuite/g++.dg/cpp0x/sfinae8.C
  03177ceac1dca2efe41bd4b603c2a79e  gcc/testsuite/g++.dg/cpp0x/sfinae9.C
  e3c4cd6748b5a83f7b2c14889d2c4590  gcc/testsuite/g++.dg/cpp0x/static_assert1.C
  b37ccc1795a94faef1d66ac5782dcc39  gcc/testsuite/g++.dg/cpp0x/static_assert10.C
  7aecd80cc0e41c35763816d27e4f0304  gcc/testsuite/g++.dg/cpp0x/static_assert11.C
! facce48609424ece7368b1854cae226b  gcc/testsuite/g++.dg/cpp0x/static_assert12.C
  e884bf1c365eb117bddb8cf25bb61944  gcc/testsuite/g++.dg/cpp0x/static_assert13.C
  51637c7e4d8745c6a05dd4de2ac799bc  gcc/testsuite/g++.dg/cpp0x/static_assert14.C
  ef0f59d78fc1f37751b79acad3704989  gcc/testsuite/g++.dg/cpp0x/static_assert15.C
--- 13338,13348 ----
  ec1a51ea3fd41e6e61c8f425bde1fd0b  gcc/testsuite/g++.dg/cpp0x/sfinae7.C
  547894832b1452d5f513938e0cb8a166  gcc/testsuite/g++.dg/cpp0x/sfinae8.C
  03177ceac1dca2efe41bd4b603c2a79e  gcc/testsuite/g++.dg/cpp0x/sfinae9.C
+ e629df81396ef9a075b65fd8e5e45646  gcc/testsuite/g++.dg/cpp0x/spaceship-eq1.C
  e3c4cd6748b5a83f7b2c14889d2c4590  gcc/testsuite/g++.dg/cpp0x/static_assert1.C
  b37ccc1795a94faef1d66ac5782dcc39  gcc/testsuite/g++.dg/cpp0x/static_assert10.C
  7aecd80cc0e41c35763816d27e4f0304  gcc/testsuite/g++.dg/cpp0x/static_assert11.C
! 46a9fceaf3a83086da13e43beb7e382a  gcc/testsuite/g++.dg/cpp0x/static_assert12.C
  e884bf1c365eb117bddb8cf25bb61944  gcc/testsuite/g++.dg/cpp0x/static_assert13.C
  51637c7e4d8745c6a05dd4de2ac799bc  gcc/testsuite/g++.dg/cpp0x/static_assert14.C
  ef0f59d78fc1f37751b79acad3704989  gcc/testsuite/g++.dg/cpp0x/static_assert15.C
*************** f24eae3c4070d37d2bbcb3f45a386807  gcc/te
*** 12785,12794 ****
  b6e1adef2dde113019ef4fea0f82078b  gcc/testsuite/g++.dg/cpp0x/static_assert5.C
  be87eb6f527a213d6b73c8a9a9d444f5  gcc/testsuite/g++.dg/cpp0x/static_assert6.C
  10b488e73e6cc35cd83a7ed1625b7f03  gcc/testsuite/g++.dg/cpp0x/static_assert7.C
! d78d11d532c9c101f2e38bd019cd103b  gcc/testsuite/g++.dg/cpp0x/static_assert8.C
  4e2bbb9a59c90b11ad60255050db8632  gcc/testsuite/g++.dg/cpp0x/static_assert9.C
! 0d886197bcd772f2eff3bcdb10bdc464  gcc/testsuite/g++.dg/cpp0x/std-layout1.C
! ba40cb32554c443f975b3d2573e8a567  gcc/testsuite/g++.dg/cpp0x/std_fext-numeric-literals.C
  503a83d0ab836e09fec9e6dea94cff0e  gcc/testsuite/g++.dg/cpp0x/std_fno-ext-numeric-literals.C
  c8339a090dcd3866e3bcee3adaa249a3  gcc/testsuite/g++.dg/cpp0x/stddef.C
  271ca147c68e58fb493c98645f047765  gcc/testsuite/g++.dg/cpp0x/stdint.C
--- 13352,13361 ----
  b6e1adef2dde113019ef4fea0f82078b  gcc/testsuite/g++.dg/cpp0x/static_assert5.C
  be87eb6f527a213d6b73c8a9a9d444f5  gcc/testsuite/g++.dg/cpp0x/static_assert6.C
  10b488e73e6cc35cd83a7ed1625b7f03  gcc/testsuite/g++.dg/cpp0x/static_assert7.C
! 55bcfe78cb456d10d487a5d2cb636c1b  gcc/testsuite/g++.dg/cpp0x/static_assert8.C
  4e2bbb9a59c90b11ad60255050db8632  gcc/testsuite/g++.dg/cpp0x/static_assert9.C
! 5ecbb1570e344c2a0ac2cf38717a7157  gcc/testsuite/g++.dg/cpp0x/std-layout1.C
! 7191e892f8b8c7d55159c17b4d7637fa  gcc/testsuite/g++.dg/cpp0x/std_fext-numeric-literals.C
  503a83d0ab836e09fec9e6dea94cff0e  gcc/testsuite/g++.dg/cpp0x/std_fno-ext-numeric-literals.C
  c8339a090dcd3866e3bcee3adaa249a3  gcc/testsuite/g++.dg/cpp0x/stddef.C
  271ca147c68e58fb493c98645f047765  gcc/testsuite/g++.dg/cpp0x/stdint.C
*************** b3ffcd3fe45fdfaefdabb2511bf9b313  gcc/te
*** 12811,12817 ****
  876e96d0eed6375333af80e688e23863  gcc/testsuite/g++.dg/cpp0x/trailing11.C
  f178110e8a5769a1841d717a00deee31  gcc/testsuite/g++.dg/cpp0x/trailing12.C
  2781b15beed8210d1827b068b5ac9a01  gcc/testsuite/g++.dg/cpp0x/trailing13.C
! 57e80133013d7d8b083771c915cf7ac5  gcc/testsuite/g++.dg/cpp0x/trailing14.C
  8d5a5322aa6c6ee7c3b0ef623f8f23b9  gcc/testsuite/g++.dg/cpp0x/trailing2.C
  112aba2c9def0d824c652cc9ddf0ff39  gcc/testsuite/g++.dg/cpp0x/trailing3.C
  7dc0503315e6109d214036deeaad3329  gcc/testsuite/g++.dg/cpp0x/trailing4.C
--- 13378,13384 ----
  876e96d0eed6375333af80e688e23863  gcc/testsuite/g++.dg/cpp0x/trailing11.C
  f178110e8a5769a1841d717a00deee31  gcc/testsuite/g++.dg/cpp0x/trailing12.C
  2781b15beed8210d1827b068b5ac9a01  gcc/testsuite/g++.dg/cpp0x/trailing13.C
! 7367e178eedb96b16a13ecbdeaa28d9c  gcc/testsuite/g++.dg/cpp0x/trailing14.C
  8d5a5322aa6c6ee7c3b0ef623f8f23b9  gcc/testsuite/g++.dg/cpp0x/trailing2.C
  112aba2c9def0d824c652cc9ddf0ff39  gcc/testsuite/g++.dg/cpp0x/trailing3.C
  7dc0503315e6109d214036deeaad3329  gcc/testsuite/g++.dg/cpp0x/trailing4.C
*************** e69574b29d74e1b9574f866ac163bf88  gcc/te
*** 12847,12853 ****
  965c8fdc0d5cc8cc39876fdca4e84c0a  gcc/testsuite/g++.dg/cpp0x/udlit-namespace-ambiguous.C
  c22929ae134a66f7eeb3de0e9d4754c0  gcc/testsuite/g++.dg/cpp0x/udlit-namespace-using-directive.C
  b8dd562d9fa4097d45afc195d68afb59  gcc/testsuite/g++.dg/cpp0x/udlit-namespace.C
! 9da9fba72d3e318e3af5d3d3b644c13f  gcc/testsuite/g++.dg/cpp0x/udlit-nofunc-neg.C
  b520ee398b84acd7a5bb1e971c30f63c  gcc/testsuite/g++.dg/cpp0x/udlit-nonempty-str-neg.C
  2ea771abd36fe1e9cd24889a0a651f4b  gcc/testsuite/g++.dg/cpp0x/udlit-nospace-neg.C
  c98f0db41b47932bd855703aa9e6af9f  gcc/testsuite/g++.dg/cpp0x/udlit-nosuffix-neg.C
--- 13414,13420 ----
  965c8fdc0d5cc8cc39876fdca4e84c0a  gcc/testsuite/g++.dg/cpp0x/udlit-namespace-ambiguous.C
  c22929ae134a66f7eeb3de0e9d4754c0  gcc/testsuite/g++.dg/cpp0x/udlit-namespace-using-directive.C
  b8dd562d9fa4097d45afc195d68afb59  gcc/testsuite/g++.dg/cpp0x/udlit-namespace.C
! c080a0215f111b08041a465f8372f6b8  gcc/testsuite/g++.dg/cpp0x/udlit-nofunc-neg.C
  b520ee398b84acd7a5bb1e971c30f63c  gcc/testsuite/g++.dg/cpp0x/udlit-nonempty-str-neg.C
  2ea771abd36fe1e9cd24889a0a651f4b  gcc/testsuite/g++.dg/cpp0x/udlit-nospace-neg.C
  c98f0db41b47932bd855703aa9e6af9f  gcc/testsuite/g++.dg/cpp0x/udlit-nosuffix-neg.C
*************** c0bba2c546aa3f650d69e738211a7b4e  gcc/te
*** 12864,12870 ****
  66db6abb93529ba90cdfe4e4b42525f8  gcc/testsuite/g++.dg/cpp0x/udlit-resolve.C
  11761d8ff202feddb1cf7a455d6a5512  gcc/testsuite/g++.dg/cpp0x/udlit-sfinae-neg.C
  3ec6c18837b63f9912c715949577f4f0  gcc/testsuite/g++.dg/cpp0x/udlit-sfinae.C
! 0bb839fa8073eb3e4784e4906fca1ce7  gcc/testsuite/g++.dg/cpp0x/udlit-shadow-neg.C
  7ed88f5df044b39c06dd30c049f587a3  gcc/testsuite/g++.dg/cpp0x/udlit-string-length.C
  e4eff855502dea296eb6bc9057513594  gcc/testsuite/g++.dg/cpp0x/udlit-string-literal.C
  6936b5e9fca3eaf5914d66bf5edc59f8  gcc/testsuite/g++.dg/cpp0x/udlit-string-literal.h
--- 13431,13437 ----
  66db6abb93529ba90cdfe4e4b42525f8  gcc/testsuite/g++.dg/cpp0x/udlit-resolve.C
  11761d8ff202feddb1cf7a455d6a5512  gcc/testsuite/g++.dg/cpp0x/udlit-sfinae-neg.C
  3ec6c18837b63f9912c715949577f4f0  gcc/testsuite/g++.dg/cpp0x/udlit-sfinae.C
! a689d876ac0ee6a58ece549add3e16c7  gcc/testsuite/g++.dg/cpp0x/udlit-shadow-neg.C
  7ed88f5df044b39c06dd30c049f587a3  gcc/testsuite/g++.dg/cpp0x/udlit-string-length.C
  e4eff855502dea296eb6bc9057513594  gcc/testsuite/g++.dg/cpp0x/udlit-string-literal.C
  6936b5e9fca3eaf5914d66bf5edc59f8  gcc/testsuite/g++.dg/cpp0x/udlit-string-literal.h
*************** e4eff855502dea296eb6bc9057513594  gcc/te
*** 12872,12880 ****
  ff425f0355a54d312eec6e5a8f284e41  gcc/testsuite/g++.dg/cpp0x/udlit-systemheader.C
  4860e031a9a55de24fce24715763a3aa  gcc/testsuite/g++.dg/cpp0x/udlit-template.C
  b0d09c427406afa79404ae6e27aa438a  gcc/testsuite/g++.dg/cpp0x/udlit-tmpl-arg-neg.C
! 7bd7e4170ca9c92aef40d4a3bd4a35fd  gcc/testsuite/g++.dg/cpp0x/udlit-tmpl-arg-neg2.C
  ebbb3f1b85b16c5be2a25964d8017ab6  gcc/testsuite/g++.dg/cpp0x/udlit-tmpl-arg.C
! da66e92075834f212c03ede552d0eb4d  gcc/testsuite/g++.dg/cpp0x/udlit-tmpl-parms-neg.C
  ce9cf1b6176245da0b5eaeddad6f4ec7  gcc/testsuite/g++.dg/cpp0x/udlit-tmpl-parms.C
  78d986a88c4fb77084876c129d4f1364  gcc/testsuite/g++.dg/cpp0x/udlit_system_header
  334c8dcebc42b37885e8f695c3285534  gcc/testsuite/g++.dg/cpp0x/union1.C
--- 13439,13447 ----
  ff425f0355a54d312eec6e5a8f284e41  gcc/testsuite/g++.dg/cpp0x/udlit-systemheader.C
  4860e031a9a55de24fce24715763a3aa  gcc/testsuite/g++.dg/cpp0x/udlit-template.C
  b0d09c427406afa79404ae6e27aa438a  gcc/testsuite/g++.dg/cpp0x/udlit-tmpl-arg-neg.C
! 60b7337e229fffe2601d7f44744c7e45  gcc/testsuite/g++.dg/cpp0x/udlit-tmpl-arg-neg2.C
  ebbb3f1b85b16c5be2a25964d8017ab6  gcc/testsuite/g++.dg/cpp0x/udlit-tmpl-arg.C
! 8b75c806f29e543ce42e4b667ef2fe64  gcc/testsuite/g++.dg/cpp0x/udlit-tmpl-parms-neg.C
  ce9cf1b6176245da0b5eaeddad6f4ec7  gcc/testsuite/g++.dg/cpp0x/udlit-tmpl-parms.C
  78d986a88c4fb77084876c129d4f1364  gcc/testsuite/g++.dg/cpp0x/udlit_system_header
  334c8dcebc42b37885e8f695c3285534  gcc/testsuite/g++.dg/cpp0x/union1.C
*************** d628aec947fb9383000669568fb54fe3  gcc/te
*** 12887,12896 ****
  88c785e361fc4c7ed26f0505241bad1d  gcc/testsuite/g++.dg/cpp0x/union8.C
  6d6ff5e1107f65ae6fdc850aaada06ea  gcc/testsuite/g++.dg/cpp0x/unnamed_refs.C
  7687213971360103949df277ec9a4982  gcc/testsuite/g++.dg/cpp0x/using-enum-1.C
! 5ff50b37857db1120f649fd613157bb3  gcc/testsuite/g++.dg/cpp0x/using-enum-2.C
! 5453cfddd739b8f091b5077a25dbd04b  gcc/testsuite/g++.dg/cpp0x/using-enum-3.C
  c2935d37441711e00030dd4962af84b5  gcc/testsuite/g++.dg/cpp0x/variadic-104.C
  0fa36631e12ec97e9e0d646888cd43ab  gcc/testsuite/g++.dg/cpp0x/variadic-alias1.C
  8eb6bba0c4ef3e1b77151f91ce5ddeb3  gcc/testsuite/g++.dg/cpp0x/variadic-bind.C
  5b99491b1ddd285caf57c8d9cc3a52aa  gcc/testsuite/g++.dg/cpp0x/variadic-crash1.C
  487cbd86a6922cf1b1ed0e770dfe74ee  gcc/testsuite/g++.dg/cpp0x/variadic-crash2.C
--- 13454,13464 ----
  88c785e361fc4c7ed26f0505241bad1d  gcc/testsuite/g++.dg/cpp0x/union8.C
  6d6ff5e1107f65ae6fdc850aaada06ea  gcc/testsuite/g++.dg/cpp0x/unnamed_refs.C
  7687213971360103949df277ec9a4982  gcc/testsuite/g++.dg/cpp0x/using-enum-1.C
! e6703a4614bef3d010b5cc8bf620cd8c  gcc/testsuite/g++.dg/cpp0x/using-enum-2.C
! 8618a58fcd10d54e825b7c30f4c6d0b6  gcc/testsuite/g++.dg/cpp0x/using-enum-3.C
  c2935d37441711e00030dd4962af84b5  gcc/testsuite/g++.dg/cpp0x/variadic-104.C
  0fa36631e12ec97e9e0d646888cd43ab  gcc/testsuite/g++.dg/cpp0x/variadic-alias1.C
+ 05f34d2879385095df8946531cb7c747  gcc/testsuite/g++.dg/cpp0x/variadic-alias2.C
  8eb6bba0c4ef3e1b77151f91ce5ddeb3  gcc/testsuite/g++.dg/cpp0x/variadic-bind.C
  5b99491b1ddd285caf57c8d9cc3a52aa  gcc/testsuite/g++.dg/cpp0x/variadic-crash1.C
  487cbd86a6922cf1b1ed0e770dfe74ee  gcc/testsuite/g++.dg/cpp0x/variadic-crash2.C
*************** b6c10f547ba95724b8657987c0cf6e0e  gcc/te
*** 13046,13052 ****
--- 13614,13624 ----
  4542cc2cf2067f1bc159847df2d9b1dc  gcc/testsuite/g++.dg/cpp0x/variadic174.C
  8326be80d48cd2c98e36a5c4855c5efa  gcc/testsuite/g++.dg/cpp0x/variadic175.C
  02221935a5f98b35845a02fb90c8168e  gcc/testsuite/g++.dg/cpp0x/variadic176.C
+ 9f205bd3a567cd16a74930b423d3269f  gcc/testsuite/g++.dg/cpp0x/variadic177.C
+ a1cfbfd1d513943453ec5c392ec8212f  gcc/testsuite/g++.dg/cpp0x/variadic178.C
+ 743f69f470924728ef41def496b9fd96  gcc/testsuite/g++.dg/cpp0x/variadic179.C
  716318ff1db2bdd640b1c6835c0659e3  gcc/testsuite/g++.dg/cpp0x/variadic18.C
+ 45285d93bd88ba5954fe172558a9740a  gcc/testsuite/g++.dg/cpp0x/variadic180.C
  d07d2dff70e4403857f709c6f88dd0d9  gcc/testsuite/g++.dg/cpp0x/variadic19.C
  2fa72711afa172c723554cf582b008c8  gcc/testsuite/g++.dg/cpp0x/variadic2.C
  263ca23f80cf33c1a49a4d4a564e8ac3  gcc/testsuite/g++.dg/cpp0x/variadic20.C
*************** d2e705d9f1219e15107bd104bcaed23f  gcc/te
*** 13068,13074 ****
  6489a8d10da4de0eed472ee88c0f4ab4  gcc/testsuite/g++.dg/cpp0x/variadic35.C
  239fd9ea878832ef61b5d23e777d8467  gcc/testsuite/g++.dg/cpp0x/variadic36.C
  9d67c3ea87784b8527535dd4d9eb6951  gcc/testsuite/g++.dg/cpp0x/variadic37.C
! d0502011577945a98f8a343154297ef3  gcc/testsuite/g++.dg/cpp0x/variadic38.C
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--- 13640,13646 ----
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*************** f7319a26887a2ba156ff389654598514  gcc/te
*** 13148,13154 ****
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--- 13720,13726 ----
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*************** b823b50bc430c6f0253adad46e2b9fea  gcc/te
*** 13188,13193 ****
--- 13760,13768 ----
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*************** f14e5c551fb573045f545479bf77b0d9  gcc/te
*** 13246,13251 ****
--- 13821,13827 ----
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*************** d93e3fd296aeb9e52296327a0f0755cb  gcc/te
*** 13267,13274 ****
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--- 13843,13851 ----
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*************** c31b3bbd5d5198b87b168be79f7471eb  gcc/te
*** 13276,13282 ****
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--- 13853,13859 ----
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*************** c410a0259982426fcc8bf751139fbcd3  gcc/te
*** 13301,13306 ****
--- 13878,13884 ----
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*************** b7ba36048381eed51408ea95cc97cab5  gcc/te
*** 13329,13353 ****
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--- 13907,13972 ----
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*************** f8cacc42b6d0ee02c4ec28b4871b946c  gcc/te
*** 13356,13365 ****
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  2ccf049767734b973a90dea30576d8a8  gcc/testsuite/g++.dg/cpp1y/digit-sep.C
  f76edece5ff5aa3ce9cb5508f587b65c  gcc/testsuite/g++.dg/cpp1y/feat-cxx11-neg.C
  144ddec296f95158abf3660366239e78  gcc/testsuite/g++.dg/cpp1y/feat-cxx11.C
  a3ed2dff5176ed6eef5ae2d57cf13c3c  gcc/testsuite/g++.dg/cpp1y/feat-cxx14-neg.C
! a67b06ec09d1fe75fc3dfff582b19cac  gcc/testsuite/g++.dg/cpp1y/feat-cxx14.C
  780e21a88c3826bf19ae69681b53fa5a  gcc/testsuite/g++.dg/cpp1y/feat-cxx98-neg.C
  6c845bae306091a0871d09eb650f7346  gcc/testsuite/g++.dg/cpp1y/feat-cxx98.C
  8a8b78afcad658910cf21c4e9f8c087b  gcc/testsuite/g++.dg/cpp1y/feat-neg.C
--- 13975,13985 ----
  516d0cef75f4267f67d755a810807bc2  gcc/testsuite/g++.dg/cpp1y/digit-sep-cxx11-neg.C
  72e5ba540e8106a24b1c940578366f90  gcc/testsuite/g++.dg/cpp1y/digit-sep-neg.C
  2ccf049767734b973a90dea30576d8a8  gcc/testsuite/g++.dg/cpp1y/digit-sep.C
+ c4436fb0148cf765eb9ae5580af8f058  gcc/testsuite/g++.dg/cpp1y/dr1560.C
  f76edece5ff5aa3ce9cb5508f587b65c  gcc/testsuite/g++.dg/cpp1y/feat-cxx11-neg.C
  144ddec296f95158abf3660366239e78  gcc/testsuite/g++.dg/cpp1y/feat-cxx11.C
  a3ed2dff5176ed6eef5ae2d57cf13c3c  gcc/testsuite/g++.dg/cpp1y/feat-cxx14-neg.C
! 34f11ea3f7b73182bef821abad7fe1e0  gcc/testsuite/g++.dg/cpp1y/feat-cxx14.C
  780e21a88c3826bf19ae69681b53fa5a  gcc/testsuite/g++.dg/cpp1y/feat-cxx98-neg.C
  6c845bae306091a0871d09eb650f7346  gcc/testsuite/g++.dg/cpp1y/feat-cxx98.C
  8a8b78afcad658910cf21c4e9f8c087b  gcc/testsuite/g++.dg/cpp1y/feat-neg.C
*************** b7edad357bb503949f49802295729019  gcc/te
*** 13368,13374 ****
  fc5875e8af08d0f9488344e80bf6f764  gcc/testsuite/g++.dg/cpp1y/feat-vla.C
  019035e3ac24c4aef8fcd1f1af1590ae  gcc/testsuite/g++.dg/cpp1y/func_constexpr.C
  c3583508c23dbe7bcbfacff859609c12  gcc/testsuite/g++.dg/cpp1y/func_constexpr2.C
! 2cf8b2b7a7dc5ba828766c37a54e2315  gcc/testsuite/g++.dg/cpp1y/lambda-conv1.C
  4734b77212418e40ce4f8965c6017a39  gcc/testsuite/g++.dg/cpp1y/lambda-conv2.C
  5f112fcc57ff57c8e803342bde4e9c25  gcc/testsuite/g++.dg/cpp1y/lambda-deduce-mult-neg.C
  a5fcad1d0708a6218c6fe69c1871df02  gcc/testsuite/g++.dg/cpp1y/lambda-deduce-mult.C
--- 13988,13994 ----
  fc5875e8af08d0f9488344e80bf6f764  gcc/testsuite/g++.dg/cpp1y/feat-vla.C
  019035e3ac24c4aef8fcd1f1af1590ae  gcc/testsuite/g++.dg/cpp1y/func_constexpr.C
  c3583508c23dbe7bcbfacff859609c12  gcc/testsuite/g++.dg/cpp1y/func_constexpr2.C
! 0feb9c08dcb94b20846f8ae40808e303  gcc/testsuite/g++.dg/cpp1y/lambda-conv1.C
  4734b77212418e40ce4f8965c6017a39  gcc/testsuite/g++.dg/cpp1y/lambda-conv2.C
  5f112fcc57ff57c8e803342bde4e9c25  gcc/testsuite/g++.dg/cpp1y/lambda-deduce-mult-neg.C
  a5fcad1d0708a6218c6fe69c1871df02  gcc/testsuite/g++.dg/cpp1y/lambda-deduce-mult.C
*************** e3c04ea33a4074f5cd6955ab214fc656  gcc/te
*** 13389,13399 ****
  c158c48cdc574a61e06922b17254f0d7  gcc/testsuite/g++.dg/cpp1y/lambda-generic-89419.C
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  3d83ad628fa7a413326bf23651c5bb6e  gcc/testsuite/g++.dg/cpp1y/lambda-generic-90548.C
! e5ec20a7dc7d9414a0113b4d2f182408  gcc/testsuite/g++.dg/cpp1y/lambda-generic-90842.C
  87f3d5397981cf431912aae6490ea63a  gcc/testsuite/g++.dg/cpp1y/lambda-generic-auto1.C
  18a2431f49a5d003b8c4af0ee1ee26fb  gcc/testsuite/g++.dg/cpp1y/lambda-generic-cfun.C
  043e19917f87f2b2acd754fc6d7db469  gcc/testsuite/g++.dg/cpp1y/lambda-generic-const1.C
! 508c18dbf853a0b77ee2fc571019a954  gcc/testsuite/g++.dg/cpp1y/lambda-generic-const10.C
  565bd59fb2dca8cbcfbfa5b7e1e94368  gcc/testsuite/g++.dg/cpp1y/lambda-generic-const2.C
  c1704c3068b9b801f6fca80634fa3d1c  gcc/testsuite/g++.dg/cpp1y/lambda-generic-const3.C
  a429d84bc7f4132705bbe16ebbde7773  gcc/testsuite/g++.dg/cpp1y/lambda-generic-const4.C
--- 14009,14019 ----
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  3d83ad628fa7a413326bf23651c5bb6e  gcc/testsuite/g++.dg/cpp1y/lambda-generic-90548.C
! b5a737fba00746ac9bc15993af743991  gcc/testsuite/g++.dg/cpp1y/lambda-generic-90842.C
  87f3d5397981cf431912aae6490ea63a  gcc/testsuite/g++.dg/cpp1y/lambda-generic-auto1.C
  18a2431f49a5d003b8c4af0ee1ee26fb  gcc/testsuite/g++.dg/cpp1y/lambda-generic-cfun.C
  043e19917f87f2b2acd754fc6d7db469  gcc/testsuite/g++.dg/cpp1y/lambda-generic-const1.C
! c790f7e9c4673b5adfaed33d12cf5b0d  gcc/testsuite/g++.dg/cpp1y/lambda-generic-const10.C
  565bd59fb2dca8cbcfbfa5b7e1e94368  gcc/testsuite/g++.dg/cpp1y/lambda-generic-const2.C
  c1704c3068b9b801f6fca80634fa3d1c  gcc/testsuite/g++.dg/cpp1y/lambda-generic-const3.C
  a429d84bc7f4132705bbe16ebbde7773  gcc/testsuite/g++.dg/cpp1y/lambda-generic-const4.C
*************** c0a147006244a6b57ce3f875f94e64bc  gcc/te
*** 13448,13453 ****
--- 14068,14074 ----
  53a8d2745f697c04b4f7684f3bd6da2b  gcc/testsuite/g++.dg/cpp1y/lambda-generic-variadic18.C
  c9ebf7c65d25936f6751b5ecbf146c97  gcc/testsuite/g++.dg/cpp1y/lambda-generic-variadic19.C
  723f502d3b40be6c90106e7124cc9e69  gcc/testsuite/g++.dg/cpp1y/lambda-generic-variadic2.C
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  93fa62fac80c2db40c8540dcc1bb3cb1  gcc/testsuite/g++.dg/cpp1y/lambda-generic-variadic3.C
  3b97ac4e949f2c389ffb4065dc536705  gcc/testsuite/g++.dg/cpp1y/lambda-generic-variadic4.C
  141535a56934b529ba244dc7e7d15d06  gcc/testsuite/g++.dg/cpp1y/lambda-generic-variadic5.C
*************** a0fd7a682321878b07d220b8dae15ac3  gcc/te
*** 13490,13495 ****
--- 14111,14119 ----
  7686aff0777cf041b8454732d1f17d8e  gcc/testsuite/g++.dg/cpp1y/left-shift-1.C
  5905dcf4a0cf928e5f5eef8ea574d3ee  gcc/testsuite/g++.dg/cpp1y/left-shift-2.C
  8505d7bc855e9e02e1d7a75fe803d027  gcc/testsuite/g++.dg/cpp1y/mangle1.C
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  bedfe39f995dd913a1715072975f6a1c  gcc/testsuite/g++.dg/cpp1y/nontype1.C
  4707396951c53026c3f457ecd9db5312  gcc/testsuite/g++.dg/cpp1y/nsdmi-aggr1.C
  5326d1798f69e0f75031ab294cf8dd21  gcc/testsuite/g++.dg/cpp1y/nsdmi-aggr10.C
*************** c008d1c5e0d0e13a914b30aa87836359  gcc/te
*** 13567,13580 ****
  327f5c8103ec847a2cb380cd3ea722d2  gcc/testsuite/g++.dg/cpp1y/pr77591.C
  190a08c25c33280883a13789bf3fbdcd  gcc/testsuite/g++.dg/cpp1y/pr77739.C
  cda4d418155a1ac5ba05c018629e6bc3  gcc/testsuite/g++.dg/cpp1y/pr77786.C
! d60bb4b02083a732e55ff4c255e32a88  gcc/testsuite/g++.dg/cpp1y/pr77830.C
  84325df3395b9dd4bfb519eb8c6d5b7c  gcc/testsuite/g++.dg/cpp1y/pr78523.C
  29d67e262203e2ec874f3cd169d02d57  gcc/testsuite/g++.dg/cpp1y/pr78550.C
  94c88f192b02f065413ec82735d9e520  gcc/testsuite/g++.dg/cpp1y/pr78551.C
  869002c18609fc85dfc92e7dd21b6648  gcc/testsuite/g++.dg/cpp1y/pr78774.C
  d391ba31f4534302c039c9af6be215f5  gcc/testsuite/g++.dg/cpp1y/pr79253.C
  46883c65d30eff2156a2c0d80de33f0d  gcc/testsuite/g++.dg/cpp1y/pr79393-2.C
! 6dabdc618db7187b34fadad266827903  gcc/testsuite/g++.dg/cpp1y/pr79393-3.C
  e498e8a1a8fb8d59ced1bf84781af0c9  gcc/testsuite/g++.dg/cpp1y/pr79393.C
  78f7b6310d849e70f4c919b5ac315cb8  gcc/testsuite/g++.dg/cpp1y/pr79435.C
  9b667c9d516823999474daebc2f8ea26  gcc/testsuite/g++.dg/cpp1y/pr79463.C
--- 14191,14204 ----
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  cda4d418155a1ac5ba05c018629e6bc3  gcc/testsuite/g++.dg/cpp1y/pr77786.C
! 1caca616a7e85ed401c3bf7d9effc478  gcc/testsuite/g++.dg/cpp1y/pr77830.C
  84325df3395b9dd4bfb519eb8c6d5b7c  gcc/testsuite/g++.dg/cpp1y/pr78523.C
  29d67e262203e2ec874f3cd169d02d57  gcc/testsuite/g++.dg/cpp1y/pr78550.C
  94c88f192b02f065413ec82735d9e520  gcc/testsuite/g++.dg/cpp1y/pr78551.C
  869002c18609fc85dfc92e7dd21b6648  gcc/testsuite/g++.dg/cpp1y/pr78774.C
  d391ba31f4534302c039c9af6be215f5  gcc/testsuite/g++.dg/cpp1y/pr79253.C
  46883c65d30eff2156a2c0d80de33f0d  gcc/testsuite/g++.dg/cpp1y/pr79393-2.C
! 138007dc67914c6bbdbf1c07d92b5146  gcc/testsuite/g++.dg/cpp1y/pr79393-3.C
  e498e8a1a8fb8d59ced1bf84781af0c9  gcc/testsuite/g++.dg/cpp1y/pr79393.C
  78f7b6310d849e70f4c919b5ac315cb8  gcc/testsuite/g++.dg/cpp1y/pr79435.C
  9b667c9d516823999474daebc2f8ea26  gcc/testsuite/g++.dg/cpp1y/pr79463.C
*************** e498e8a1a8fb8d59ced1bf84781af0c9  gcc/te
*** 13582,13587 ****
--- 14206,14212 ----
  7ba1a7095d85e93ae6a794f361e10e20  gcc/testsuite/g++.dg/cpp1y/pr79937-2.C
  72ea86a680e93f569f2360134a6abd63  gcc/testsuite/g++.dg/cpp1y/pr79937-3.C
  ef85b0877a37d48d718e93274d150a12  gcc/testsuite/g++.dg/cpp1y/pr79937-4.C
+ 77dea8ad2947cbacf03e03b6db5f3dc7  gcc/testsuite/g++.dg/cpp1y/pr79937-5.C
  8b7bd0b9195eec19b92301cfbb17cebc  gcc/testsuite/g++.dg/cpp1y/pr80194.C
  511f51be2efe86fc6a25d6a6d5423518  gcc/testsuite/g++.dg/cpp1y/pr81574.C
  d7dcd3f45ee6c394c4e684f054bf67ae  gcc/testsuite/g++.dg/cpp1y/pr82373.C
*************** eed72e4e3c9aec24d904cb1baa5f2711  gcc/te
*** 13599,13615 ****
  9c7ee77059363808e261d90cf939ce59  gcc/testsuite/g++.dg/cpp1y/pr84942.C
  11abcca649e7c260d96b20dd2bb71bc7  gcc/testsuite/g++.dg/cpp1y/pr85076.C
  e4968a83309cb7b0ed242d3d6971a6a3  gcc/testsuite/g++.dg/cpp1y/pr87322.C
  76d3c8355d513d753398e1184e4c4ece  gcc/testsuite/g++.dg/cpp1y/pr89767.C
  ac3a3cc471361b1fc9f3e55ad12dd7a8  gcc/testsuite/g++.dg/cpp1y/regress1.C
  9a759de4b7ac375d3c274acdf73c4fbe  gcc/testsuite/g++.dg/cpp1y/sized-dealloc1.C
  aeb199bf9a897359b6d538b5bce4e5ef  gcc/testsuite/g++.dg/cpp1y/sized-dealloc2.C
  8ba5dbf42040b5bdb3d7ce7954bd5e81  gcc/testsuite/g++.dg/cpp1y/sized-dealloc3.C
! 60a86453cec145463457c1cb89bab0bd  gcc/testsuite/g++.dg/cpp1y/static_assert1.C
  eace14ba5140fc5831e3fd2fb3549387  gcc/testsuite/g++.dg/cpp1y/static_assert2.C
  e1e32726206acc805d1033f978255136  gcc/testsuite/g++.dg/cpp1y/static_assert3.C
  cb697dbebf15777f13401f1c939461d2  gcc/testsuite/g++.dg/cpp1y/system-binary-constants-1.C
  d41d8cd98f00b204e9800998ecf8427e  gcc/testsuite/g++.dg/cpp1y/testinc/phoobhar.h
! fe2a8f15402c2461ce8bc4033d873df3  gcc/testsuite/g++.dg/cpp1y/udlit-char-template-neg.C
  45f2b838d7063fd1a73f88697ffb1238  gcc/testsuite/g++.dg/cpp1y/udlit-char-template-sfinae-neg.C
  3204e0d7a6967bb1fa9b56e97b52be00  gcc/testsuite/g++.dg/cpp1y/udlit-char-template-sfinae.C
  f8c6b3b8e59cc2bba77bfc6edcc4f323  gcc/testsuite/g++.dg/cpp1y/udlit-char-template-vs-std-literal-operator.C
--- 14224,14246 ----
  9c7ee77059363808e261d90cf939ce59  gcc/testsuite/g++.dg/cpp1y/pr84942.C
  11abcca649e7c260d96b20dd2bb71bc7  gcc/testsuite/g++.dg/cpp1y/pr85076.C
  e4968a83309cb7b0ed242d3d6971a6a3  gcc/testsuite/g++.dg/cpp1y/pr87322.C
+ 82895ea6b585468afa3ea096948a4f4d  gcc/testsuite/g++.dg/cpp1y/pr87410.C
  76d3c8355d513d753398e1184e4c4ece  gcc/testsuite/g++.dg/cpp1y/pr89767.C
+ d2d0bc874f9c02f4cf129f688184d93c  gcc/testsuite/g++.dg/cpp1y/pr90996.C
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+ 00fd55359af11227a5a4b86e14abbb87  gcc/testsuite/g++.dg/cpp1y/pr94066-2.C
+ b0cb037b3d1369f48884f81384e62dbb  gcc/testsuite/g++.dg/cpp1y/pr94066-3.C
+ bf131a7532349a5471d38a10151a773d  gcc/testsuite/g++.dg/cpp1y/pr94066.C
  ac3a3cc471361b1fc9f3e55ad12dd7a8  gcc/testsuite/g++.dg/cpp1y/regress1.C
  9a759de4b7ac375d3c274acdf73c4fbe  gcc/testsuite/g++.dg/cpp1y/sized-dealloc1.C
  aeb199bf9a897359b6d538b5bce4e5ef  gcc/testsuite/g++.dg/cpp1y/sized-dealloc2.C
  8ba5dbf42040b5bdb3d7ce7954bd5e81  gcc/testsuite/g++.dg/cpp1y/sized-dealloc3.C
! 4f6552f813efc1c594c23f6822ccc6aa  gcc/testsuite/g++.dg/cpp1y/static_assert1.C
  eace14ba5140fc5831e3fd2fb3549387  gcc/testsuite/g++.dg/cpp1y/static_assert2.C
  e1e32726206acc805d1033f978255136  gcc/testsuite/g++.dg/cpp1y/static_assert3.C
  cb697dbebf15777f13401f1c939461d2  gcc/testsuite/g++.dg/cpp1y/system-binary-constants-1.C
  d41d8cd98f00b204e9800998ecf8427e  gcc/testsuite/g++.dg/cpp1y/testinc/phoobhar.h
! 40e1fb90caf3ae2b835a8a4a619455dc  gcc/testsuite/g++.dg/cpp1y/udlit-char-template-neg.C
  45f2b838d7063fd1a73f88697ffb1238  gcc/testsuite/g++.dg/cpp1y/udlit-char-template-sfinae-neg.C
  3204e0d7a6967bb1fa9b56e97b52be00  gcc/testsuite/g++.dg/cpp1y/udlit-char-template-sfinae.C
  f8c6b3b8e59cc2bba77bfc6edcc4f323  gcc/testsuite/g++.dg/cpp1y/udlit-char-template-vs-std-literal-operator.C
*************** d136907a334cc46c10215befc2ca4622  gcc/te
*** 13643,13649 ****
  de6310de81960aec1308c39594226f33  gcc/testsuite/g++.dg/cpp1y/var-templ3.C
  a6b17e53216ceda3fdbc1dc56643ba6a  gcc/testsuite/g++.dg/cpp1y/var-templ30.C
  20fc5340ba7ac632f2ba8dc44e4d29d1  gcc/testsuite/g++.dg/cpp1y/var-templ31.C
! 4b1da9682adbda0c760e24dad8742588  gcc/testsuite/g++.dg/cpp1y/var-templ32.C
  60e7108355ba6169a86ecf213f228a31  gcc/testsuite/g++.dg/cpp1y/var-templ33.C
  801c58b5b095545b4dacda5b8b5eb8de  gcc/testsuite/g++.dg/cpp1y/var-templ34.C
  29e63ce54513294cc5e698abae05a41f  gcc/testsuite/g++.dg/cpp1y/var-templ35.C
--- 14274,14280 ----
  de6310de81960aec1308c39594226f33  gcc/testsuite/g++.dg/cpp1y/var-templ3.C
  a6b17e53216ceda3fdbc1dc56643ba6a  gcc/testsuite/g++.dg/cpp1y/var-templ30.C
  20fc5340ba7ac632f2ba8dc44e4d29d1  gcc/testsuite/g++.dg/cpp1y/var-templ31.C
! 503d250b1f25cc6edac1e15a8007e3be  gcc/testsuite/g++.dg/cpp1y/var-templ32.C
  60e7108355ba6169a86ecf213f228a31  gcc/testsuite/g++.dg/cpp1y/var-templ33.C
  801c58b5b095545b4dacda5b8b5eb8de  gcc/testsuite/g++.dg/cpp1y/var-templ34.C
  29e63ce54513294cc5e698abae05a41f  gcc/testsuite/g++.dg/cpp1y/var-templ35.C
*************** d02a4d5b691aff1357a5f77cf5774190  gcc/te
*** 13679,13684 ****
--- 14310,14317 ----
  d40d9f43eb7820281681023bed02f7ce  gcc/testsuite/g++.dg/cpp1y/var-templ61.C
  dc3178e9e6877534395f10339750116a  gcc/testsuite/g++.dg/cpp1y/var-templ62.C
  f857aeaa600cb3e85cdb97a6e0963bbd  gcc/testsuite/g++.dg/cpp1y/var-templ63.C
+ 991cbb9f56016f3a219a03bb5ad62999  gcc/testsuite/g++.dg/cpp1y/var-templ64.C
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  3c670164f1a7f8f91ef1db2f80526182  gcc/testsuite/g++.dg/cpp1y/var-templ7.C
  7490ba7f2bf9511118a48f52e8c4ceed  gcc/testsuite/g++.dg/cpp1y/var-templ8.C
  c62c3c5ce4dabfb077ffd26896b1d204  gcc/testsuite/g++.dg/cpp1y/var-templ9.C
*************** ca10f046e47ea09ba5b87084372f1ce2  gcc/te
*** 13712,13720 ****
  4dbddfffb31fb9d4ab9b40b6ac489d84  gcc/testsuite/g++.dg/cpp1z/aligned-new6.C
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  1c005f415746635350d5fd1bf3068b93  gcc/testsuite/g++.dg/cpp1z/aligned-new8.C
  34121807f233280bd4b9ceb565c64cf6  gcc/testsuite/g++.dg/cpp1z/attributes-enum-1.C
  e474313e7bab15f973c71282c2c16e26  gcc/testsuite/g++.dg/cpp1z/attributes-enum-1a.C
! 38d617cc53d20469671cfdf068901c53  gcc/testsuite/g++.dg/cpp1z/bool-increment1.C
  daf6a1ab8d18fad76864f7a9c31adc71  gcc/testsuite/g++.dg/cpp1z/byte1.C
  6da7247a3eb4b4c4507555e38efb303e  gcc/testsuite/g++.dg/cpp1z/byte2.C
  6e5c654f918bffb16660300054fe6143  gcc/testsuite/g++.dg/cpp1z/class-deduction1.C
--- 14345,14354 ----
  4dbddfffb31fb9d4ab9b40b6ac489d84  gcc/testsuite/g++.dg/cpp1z/aligned-new6.C
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  1c005f415746635350d5fd1bf3068b93  gcc/testsuite/g++.dg/cpp1z/aligned-new8.C
+ 15f78f24e2133987caada47dbd4501b6  gcc/testsuite/g++.dg/cpp1z/attr-lambda1.C
  34121807f233280bd4b9ceb565c64cf6  gcc/testsuite/g++.dg/cpp1z/attributes-enum-1.C
  e474313e7bab15f973c71282c2c16e26  gcc/testsuite/g++.dg/cpp1z/attributes-enum-1a.C
! 1a8594071bf162a6b7ab2b120a5e43d3  gcc/testsuite/g++.dg/cpp1z/bool-increment1.C
  daf6a1ab8d18fad76864f7a9c31adc71  gcc/testsuite/g++.dg/cpp1z/byte1.C
  6da7247a3eb4b4c4507555e38efb303e  gcc/testsuite/g++.dg/cpp1z/byte2.C
  6e5c654f918bffb16660300054fe6143  gcc/testsuite/g++.dg/cpp1z/class-deduction1.C
*************** b4d2456469bc4d20d3c286f51b78e752  gcc/te
*** 13753,13762 ****
  a1e4f09d18085c224de08ec884913d64  gcc/testsuite/g++.dg/cpp1z/class-deduction40.C
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! 0effa66885c0500376b82110dfb5c032  gcc/testsuite/g++.dg/cpp1z/class-deduction43.C
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! 1456c7f46d415ee7a784b9129291ea08  gcc/testsuite/g++.dg/cpp1z/class-deduction46.C
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  9cbe9b89d8867f8e1d4aac1701590824  gcc/testsuite/g++.dg/cpp1z/class-deduction48.C
  4f04460cb8b7dc38a76269420e5fa92d  gcc/testsuite/g++.dg/cpp1z/class-deduction49.C
--- 14387,14396 ----
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! 14588c674c28898baeb2885902b55749  gcc/testsuite/g++.dg/cpp1z/class-deduction43.C
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! 501a43a228e76342d2d2eebaa55bbe7b  gcc/testsuite/g++.dg/cpp1z/class-deduction46.C
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  9cbe9b89d8867f8e1d4aac1701590824  gcc/testsuite/g++.dg/cpp1z/class-deduction48.C
  4f04460cb8b7dc38a76269420e5fa92d  gcc/testsuite/g++.dg/cpp1z/class-deduction49.C
*************** efc0c9815d4a5ed61ed3840044e07867  gcc/te
*** 13776,13790 ****
  c7186fdb063a075be027a209ee180a5c  gcc/testsuite/g++.dg/cpp1z/class-deduction61.C
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  5009a2927199b8cf161c320bb1fb8801  gcc/testsuite/g++.dg/cpp1z/class-deduction63.C
! 4a31eaf454fdf182ed592dea6cd3b8a9  gcc/testsuite/g++.dg/cpp1z/class-deduction64.C
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  d309961f0255b13605cf111efa2b095a  gcc/testsuite/g++.dg/cpp1z/constexpr-if-lambda1.C
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  1e52ede853069710bb8cc3b5b323de8c  gcc/testsuite/g++.dg/cpp1z/constexpr-if10.C
  6ad161b09218162d754ac9e397dad17c  gcc/testsuite/g++.dg/cpp1z/constexpr-if11.C
--- 14410,14433 ----
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! 9b6d509b9848a27c13b42647d1b70e9a  gcc/testsuite/g++.dg/cpp1z/class-deduction64.C
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  d309961f0255b13605cf111efa2b095a  gcc/testsuite/g++.dg/cpp1z/constexpr-if-lambda1.C
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  b70f4276933d24cd68ae2e047a954ece  gcc/testsuite/g++.dg/cpp1z/constexpr-if1.C
  1e52ede853069710bb8cc3b5b323de8c  gcc/testsuite/g++.dg/cpp1z/constexpr-if10.C
  6ad161b09218162d754ac9e397dad17c  gcc/testsuite/g++.dg/cpp1z/constexpr-if11.C
*************** c9193486bc96a170a4bdddb829cc5b48  gcc/te
*** 13806,13822 ****
  e875a170276740be9277350063efcfb7  gcc/testsuite/g++.dg/cpp1z/constexpr-if26.C
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! a02c2b6b67d061c35cdb50fa03569637  gcc/testsuite/g++.dg/cpp1z/constexpr-if4.C
! 63578861f15440823cca35ea07a0f65f  gcc/testsuite/g++.dg/cpp1z/constexpr-if5.C
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  47362a3bc4d5e9b2c3dfa25cfd8f6c3d  gcc/testsuite/g++.dg/cpp1z/constexpr-if8.C
! 774f8c49c808e1931407ed969942bde2  gcc/testsuite/g++.dg/cpp1z/constexpr-if9.C
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  e080cebe9afed7a55a3555d69608d9fb  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda10.C
  68bb401876284c37eb017348cfc36d3e  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda11.C
! 3c2eeaf5a605c1943128ad42d6868ce7  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda12.C
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  ee6e08d088f8f045102aa525c2ad0fd3  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda15.C
--- 14449,14470 ----
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! e0afea8f31b482e49f193350069eb677  gcc/testsuite/g++.dg/cpp1z/constexpr-if30.C
! 75b3bea8440797006b0d1b962f58c4ee  gcc/testsuite/g++.dg/cpp1z/constexpr-if31.C
! 1d5b594f51f04bb4c8cdd450a24fd9e0  gcc/testsuite/g++.dg/cpp1z/constexpr-if32.C
! eef6b48a8fbf8eddc05a5373a7369c26  gcc/testsuite/g++.dg/cpp1z/constexpr-if33.C
! d32800b4d59baf4fd0d00036181adc4d  gcc/testsuite/g++.dg/cpp1z/constexpr-if4.C
! 8fa44fc4f9f1105ec488f8e5308e62eb  gcc/testsuite/g++.dg/cpp1z/constexpr-if5.C
  dd3fed7a614d71be04ab2475cca10561  gcc/testsuite/g++.dg/cpp1z/constexpr-if6.C
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  47362a3bc4d5e9b2c3dfa25cfd8f6c3d  gcc/testsuite/g++.dg/cpp1z/constexpr-if8.C
! d856b41007ea6fce9b300427ea4f3a6e  gcc/testsuite/g++.dg/cpp1z/constexpr-if9.C
  99f0bc5d508a783de79e0ae3edbf50dd  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda1.C
  e080cebe9afed7a55a3555d69608d9fb  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda10.C
  68bb401876284c37eb017348cfc36d3e  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda11.C
! 021f84a8505d8464417426c0ef9c52f0  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda12.C
  af72d0e033fc90048d45cf71c8c08e97  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda13.C
  c249422d923bfc189a9579b50b33bfe4  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda14.C
  ee6e08d088f8f045102aa525c2ad0fd3  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda15.C
*************** f52bfa10d1639ecf00dde7f41065a8d5  gcc/te
*** 13838,13846 ****
  6bf895beb6f74fabc9674f6ac43f17fa  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda7.C
  0cb6ac9bf693d7e79cc037b8bb03c507  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda8.C
  6eeb4cc38b29ea107311eb709f951bce  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda9.C
  4478fc173d02354483bdb1dd9fdff5b5  gcc/testsuite/g++.dg/cpp1z/cplusplus.C
  ba5e9d24245e572b3aebcc78d67fa0ac  gcc/testsuite/g++.dg/cpp1z/cplusplus_1z.C
! d7d7fd670e9f81f8d7d2e65839966162  gcc/testsuite/g++.dg/cpp1z/decomp-bitfield1.C
  54fceed618c734a72a2d434f2e034c83  gcc/testsuite/g++.dg/cpp1z/decomp-constexpr1.C
  ea7e537a1ad5bc31eef18e636048f90d  gcc/testsuite/g++.dg/cpp1z/decomp-lambda1.C
  84bc152455f2541db49df06bc811b1f3  gcc/testsuite/g++.dg/cpp1z/decomp1.C
--- 14486,14496 ----
  6bf895beb6f74fabc9674f6ac43f17fa  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda7.C
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  6eeb4cc38b29ea107311eb709f951bce  gcc/testsuite/g++.dg/cpp1z/constexpr-lambda9.C
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  4478fc173d02354483bdb1dd9fdff5b5  gcc/testsuite/g++.dg/cpp1z/cplusplus.C
  ba5e9d24245e572b3aebcc78d67fa0ac  gcc/testsuite/g++.dg/cpp1z/cplusplus_1z.C
! 6cb5bd64dee599d4a945e5214571a950  gcc/testsuite/g++.dg/cpp1z/decomp-bitfield1.C
  54fceed618c734a72a2d434f2e034c83  gcc/testsuite/g++.dg/cpp1z/decomp-constexpr1.C
  ea7e537a1ad5bc31eef18e636048f90d  gcc/testsuite/g++.dg/cpp1z/decomp-lambda1.C
  84bc152455f2541db49df06bc811b1f3  gcc/testsuite/g++.dg/cpp1z/decomp1.C
*************** b4ce61356e5a800bbe8625a2fcfb6c47  gcc/te
*** 13865,13871 ****
  db59f36aedce650deacac206df589fcd  gcc/testsuite/g++.dg/cpp1z/decomp27.C
  d169701ab44605d3af4e8903c4fcbb83  gcc/testsuite/g++.dg/cpp1z/decomp28.C
  821af2d2e1f64f648720f2ab287be2ca  gcc/testsuite/g++.dg/cpp1z/decomp29.C
! c86f26dab82ba785de60bdd3a5f00ed6  gcc/testsuite/g++.dg/cpp1z/decomp3.C
  15674db5d82601f6f8c6c925c5fd0421  gcc/testsuite/g++.dg/cpp1z/decomp30.C
  276d2090ec892a3c8ac250318230fe0a  gcc/testsuite/g++.dg/cpp1z/decomp31.C
  cb0c2e23c983029bef65f71444baf22a  gcc/testsuite/g++.dg/cpp1z/decomp32.C
--- 14515,14521 ----
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! 72251c6b4d4572241c643f3ef17ea8a1  gcc/testsuite/g++.dg/cpp1z/decomp3.C
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  cb0c2e23c983029bef65f71444baf22a  gcc/testsuite/g++.dg/cpp1z/decomp32.C
*************** e10b9849a1874dff3e608a49de0c6088  gcc/te
*** 13885,13894 ****
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! b258d9545db271a0090522333d456c2f  gcc/testsuite/g++.dg/cpp1z/decomp48.C
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  09468d9aa8e4fe8ac0677b17a3c509a2  gcc/testsuite/g++.dg/cpp1z/decomp7.C
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--- 14535,14545 ----
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! 0c57425467c13dacad9e6fff588f2288  gcc/testsuite/g++.dg/cpp1z/decomp48.C
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  0d7ba62c8322f4f98a085026e3ac529a  gcc/testsuite/g++.dg/cpp1z/decomp8.C
*************** bb194d9ce590c9e5e69935ebac0f25e4  gcc/te
*** 13902,13909 ****
  89fdd37f4580457e23eeb34adcf4d4e0  gcc/testsuite/g++.dg/cpp1z/eval-order3.C
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  8aee82acb16c495821151939f3d0d794  gcc/testsuite/g++.dg/cpp1z/fallthrough1.C
! 6b68e9e86b9760b5a4c8219b35bbf007  gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C
  ccf8e15dbea694ff2ac1c38763e318b9  gcc/testsuite/g++.dg/cpp1z/fold-ice1.C
  ce2a217eddd91a6985c4920af6223b7f  gcc/testsuite/g++.dg/cpp1z/fold-lambda.C
  d11a817298d2b6e508f52834a1dc54bd  gcc/testsuite/g++.dg/cpp1z/fold-lambda2.C
--- 14553,14563 ----
  89fdd37f4580457e23eeb34adcf4d4e0  gcc/testsuite/g++.dg/cpp1z/eval-order3.C
  6d8d378fedaf65b4cb89952060799280  gcc/testsuite/g++.dg/cpp1z/eval-order4.C
  56af6596678e014cdf3ef38d1427358f  gcc/testsuite/g++.dg/cpp1z/eval-order5.C
+ f6da488c72cf7236fa560fcdd857f03e  gcc/testsuite/g++.dg/cpp1z/eval-order6.C
+ b0b559b7ffc93f41fa89c0810a34700c  gcc/testsuite/g++.dg/cpp1z/eval-order7.C
+ b1d46849077c6ddc0bf882ba4c716533  gcc/testsuite/g++.dg/cpp1z/eval-order8.C
  8aee82acb16c495821151939f3d0d794  gcc/testsuite/g++.dg/cpp1z/fallthrough1.C
! 94fc4260b2d8c506d1ac06cb7d4f1d7f  gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C
  ccf8e15dbea694ff2ac1c38763e318b9  gcc/testsuite/g++.dg/cpp1z/fold-ice1.C
  ce2a217eddd91a6985c4920af6223b7f  gcc/testsuite/g++.dg/cpp1z/fold-lambda.C
  d11a817298d2b6e508f52834a1dc54bd  gcc/testsuite/g++.dg/cpp1z/fold-lambda2.C
*************** d11a817298d2b6e508f52834a1dc54bd  gcc/te
*** 13911,13916 ****
--- 14565,14571 ----
  a53a61e2c3773add424075de3343c370  gcc/testsuite/g++.dg/cpp1z/fold-mangle.C
  948a131387412e7ed7b39e35fce2096a  gcc/testsuite/g++.dg/cpp1z/fold1.C
  c74b2113efcb17ebf1be773837691046  gcc/testsuite/g++.dg/cpp1z/fold10.C
+ ba52c35faa435abd9cb368147dc00857  gcc/testsuite/g++.dg/cpp1z/fold11.C
  5e8f1589e281e551eba15be5ad14bd8b  gcc/testsuite/g++.dg/cpp1z/fold2.C
  a33f917557c76cefc8e7e59dedbf0a4e  gcc/testsuite/g++.dg/cpp1z/fold3.C
  954117a731946951912acd1615190810  gcc/testsuite/g++.dg/cpp1z/fold4.C
*************** d5097890520de2a85ebd837650f33a25  gcc/te
*** 13922,13928 ****
  5cec02eac2db79d2dd3ac9f9d2dbc70f  gcc/testsuite/g++.dg/cpp1z/fold9.C
  fade45a91157c646e6940a215501f1c9  gcc/testsuite/g++.dg/cpp1z/gen-attrs1.C
  ac9f13854ea3e455a1371aaa819ee22a  gcc/testsuite/g++.dg/cpp1z/has-unique-obj-representations1.C
! 0b6df99ef4c5cde87675e86fff8ee1b9  gcc/testsuite/g++.dg/cpp1z/has-unique-obj-representations2.C
  712e0c3f886fdb90e5e03d39bd877f92  gcc/testsuite/g++.dg/cpp1z/inh-ctor1.C
  a5a039fe3394138160509efa1a2212c5  gcc/testsuite/g++.dg/cpp1z/inh-ctor22.C
  b303784bcf07c99011e96f0a6da77c55  gcc/testsuite/g++.dg/cpp1z/inh-ctor23.C
--- 14577,14583 ----
  5cec02eac2db79d2dd3ac9f9d2dbc70f  gcc/testsuite/g++.dg/cpp1z/fold9.C
  fade45a91157c646e6940a215501f1c9  gcc/testsuite/g++.dg/cpp1z/gen-attrs1.C
  ac9f13854ea3e455a1371aaa819ee22a  gcc/testsuite/g++.dg/cpp1z/has-unique-obj-representations1.C
! 5f34b6f6c6b9801ac84fd35a7072c291  gcc/testsuite/g++.dg/cpp1z/has-unique-obj-representations2.C
  712e0c3f886fdb90e5e03d39bd877f92  gcc/testsuite/g++.dg/cpp1z/inh-ctor1.C
  a5a039fe3394138160509efa1a2212c5  gcc/testsuite/g++.dg/cpp1z/inh-ctor22.C
  b303784bcf07c99011e96f0a6da77c55  gcc/testsuite/g++.dg/cpp1z/inh-ctor23.C
*************** d95a7954c2fb5882e812dea5447bc8e2  gcc/te
*** 13943,13948 ****
--- 14598,14604 ----
  e00bd522f82d2142164143e052a19333  gcc/testsuite/g++.dg/cpp1z/inh-ctor37.C
  be0b9dc11980180485123e93ea184fee  gcc/testsuite/g++.dg/cpp1z/inh-ctor38.C
  73bc70a4a9270cd9a335fe4c011dfa67  gcc/testsuite/g++.dg/cpp1z/init-statement1.C
+ e71e6554bb5fba57e95cb9f345190b4e  gcc/testsuite/g++.dg/cpp1z/init-statement10.C
  4163d5fb8483550c98a47bed8b3deb6b  gcc/testsuite/g++.dg/cpp1z/init-statement2.C
  e93d37fcb114e8a801c0c349ed865ad0  gcc/testsuite/g++.dg/cpp1z/init-statement3.C
  0d930dc11e6ad8a3eb32c61b2ad837e9  gcc/testsuite/g++.dg/cpp1z/init-statement4.C
*************** efb0c3ae0359db707086c1750b31b943  gcc/te
*** 13954,13969 ****
  ffdea6bae4a048d4f98ae5a40bf524e4  gcc/testsuite/g++.dg/cpp1z/inline-var1.C
  5fdda464ad6962839138592830f7ad8b  gcc/testsuite/g++.dg/cpp1z/inline-var1.h
  289178cd112b6bcc3886d28022e1b86f  gcc/testsuite/g++.dg/cpp1z/inline-var1a.C
! 32c4b19d9cbd5fa42cc212c68ce65933  gcc/testsuite/g++.dg/cpp1z/inline-var2.C
  d02bac8866e9a3e5c4f19da65dda7c9a  gcc/testsuite/g++.dg/cpp1z/inline-var3.C
  884f46ba9cab5bc751e958318fe14a2d  gcc/testsuite/g++.dg/cpp1z/inline-var4.C
  eb09374f9955af523e3f7767c4ef9b75  gcc/testsuite/g++.dg/cpp1z/inline-var5.C
  30ea7a0df040d49da61f977af41d7ab6  gcc/testsuite/g++.dg/cpp1z/inline-var6.C
  2eb7c8c6899f0df45df9a494fae11bac  gcc/testsuite/g++.dg/cpp1z/lambda-__func__.C
  7a8a15c87abf5409fafc54402d33a274  gcc/testsuite/g++.dg/cpp1z/lambda-inherit1.C
  015fa9d631289b4abe8bd2e5a5af64bf  gcc/testsuite/g++.dg/cpp1z/lambda-this1.C
  4d5397c5628de21a519cdb9d72b6c09c  gcc/testsuite/g++.dg/cpp1z/lambda-this2.C
  479583a9b0a84ad094ffea6491d7d049  gcc/testsuite/g++.dg/cpp1z/lambda-this3.C
  5e200a2d5bf3f215cbed7959057efae1  gcc/testsuite/g++.dg/cpp1z/launder1.C
  53bc478df6abc05a4afccaa39805cab4  gcc/testsuite/g++.dg/cpp1z/launder2.C
  ac1986fd8c7fe4bed9f3610b5c780124  gcc/testsuite/g++.dg/cpp1z/launder3.C
--- 14610,14629 ----
  ffdea6bae4a048d4f98ae5a40bf524e4  gcc/testsuite/g++.dg/cpp1z/inline-var1.C
  5fdda464ad6962839138592830f7ad8b  gcc/testsuite/g++.dg/cpp1z/inline-var1.h
  289178cd112b6bcc3886d28022e1b86f  gcc/testsuite/g++.dg/cpp1z/inline-var1a.C
! 3a8f2f26c3c27f6dc9df8bc59af96db5  gcc/testsuite/g++.dg/cpp1z/inline-var2.C
  d02bac8866e9a3e5c4f19da65dda7c9a  gcc/testsuite/g++.dg/cpp1z/inline-var3.C
  884f46ba9cab5bc751e958318fe14a2d  gcc/testsuite/g++.dg/cpp1z/inline-var4.C
  eb09374f9955af523e3f7767c4ef9b75  gcc/testsuite/g++.dg/cpp1z/inline-var5.C
  30ea7a0df040d49da61f977af41d7ab6  gcc/testsuite/g++.dg/cpp1z/inline-var6.C
+ ccfcd25cc3fcf43345e501263a74dd42  gcc/testsuite/g++.dg/cpp1z/inline-var7.C
  2eb7c8c6899f0df45df9a494fae11bac  gcc/testsuite/g++.dg/cpp1z/lambda-__func__.C
  7a8a15c87abf5409fafc54402d33a274  gcc/testsuite/g++.dg/cpp1z/lambda-inherit1.C
  015fa9d631289b4abe8bd2e5a5af64bf  gcc/testsuite/g++.dg/cpp1z/lambda-this1.C
  4d5397c5628de21a519cdb9d72b6c09c  gcc/testsuite/g++.dg/cpp1z/lambda-this2.C
  479583a9b0a84ad094ffea6491d7d049  gcc/testsuite/g++.dg/cpp1z/lambda-this3.C
+ f0929bbaf568d27f99846551432c2355  gcc/testsuite/g++.dg/cpp1z/lambda-this4.C
+ b2e693257fda5fe10cbb34d955388a18  gcc/testsuite/g++.dg/cpp1z/lambda-this5.C
+ 8eada34c37dd9c88a198df9ad47fe463  gcc/testsuite/g++.dg/cpp1z/lambda-this6.C
  5e200a2d5bf3f215cbed7959057efae1  gcc/testsuite/g++.dg/cpp1z/launder1.C
  53bc478df6abc05a4afccaa39805cab4  gcc/testsuite/g++.dg/cpp1z/launder2.C
  ac1986fd8c7fe4bed9f3610b5c780124  gcc/testsuite/g++.dg/cpp1z/launder3.C
*************** fc7418031e26a28172ef21ddc7c912c4  gcc/te
*** 13977,13984 ****
  487d661499bb066b39b803e765439022  gcc/testsuite/g++.dg/cpp1z/launder7.C
  8c00bb45a9c85ed9405a729bd816a035  gcc/testsuite/g++.dg/cpp1z/launder8.C
  9dcadfa9d20011f3e066495703f8c81a  gcc/testsuite/g++.dg/cpp1z/maybe_unused1.C
! 0b2ddd13b91baac8369a9e662ffac923  gcc/testsuite/g++.dg/cpp1z/namespace-attribs.C
! 818c5ea3efd75347ac86961cecf01a4c  gcc/testsuite/g++.dg/cpp1z/namespace-attribs2.C
  782eceaf43f435ac7c2c0b0f05624647  gcc/testsuite/g++.dg/cpp1z/nested-namespace-def1.C
  4470f18a10da3760c7723a622fd0befa  gcc/testsuite/g++.dg/cpp1z/nested-namespace-def2.C
  db6d80bc5f29d89b66dc0f6ca5cdfd89  gcc/testsuite/g++.dg/cpp1z/nested-namespace-def3.C
--- 14637,14644 ----
  487d661499bb066b39b803e765439022  gcc/testsuite/g++.dg/cpp1z/launder7.C
  8c00bb45a9c85ed9405a729bd816a035  gcc/testsuite/g++.dg/cpp1z/launder8.C
  9dcadfa9d20011f3e066495703f8c81a  gcc/testsuite/g++.dg/cpp1z/maybe_unused1.C
! 70b91464888d2ac03bdef0b9d1602ecb  gcc/testsuite/g++.dg/cpp1z/namespace-attribs.C
! 28b40b660c69bfa1ecd5cb549d5af263  gcc/testsuite/g++.dg/cpp1z/namespace-attribs2.C
  782eceaf43f435ac7c2c0b0f05624647  gcc/testsuite/g++.dg/cpp1z/nested-namespace-def1.C
  4470f18a10da3760c7723a622fd0befa  gcc/testsuite/g++.dg/cpp1z/nested-namespace-def2.C
  db6d80bc5f29d89b66dc0f6ca5cdfd89  gcc/testsuite/g++.dg/cpp1z/nested-namespace-def3.C
*************** db6d80bc5f29d89b66dc0f6ca5cdfd89  gcc/te
*** 13987,13992 ****
--- 14647,14654 ----
  38db595fd6ee6c6498e94ad8412fa322  gcc/testsuite/g++.dg/cpp1z/nodiscard3.C
  83dfccee6bbfeb66341cd2d47be20334  gcc/testsuite/g++.dg/cpp1z/nodiscard4.C
  549516884facf6ccae16b7de38b2931d  gcc/testsuite/g++.dg/cpp1z/nodiscard5.C
+ e9014cdec66bf94006c681e6825cac7f  gcc/testsuite/g++.dg/cpp1z/nodiscard6.C
+ e194031b93147b17a284c4c8d6501ead  gcc/testsuite/g++.dg/cpp1z/nodiscard7.C
  ccacb58d42aa6d504b3629fce8ef518f  gcc/testsuite/g++.dg/cpp1z/noexcept-type1.C
  8fbb465fc69c13a4894d2eb47d00e941  gcc/testsuite/g++.dg/cpp1z/noexcept-type11.C
  1caccdf4e16515c79981341c1b7a9d86  gcc/testsuite/g++.dg/cpp1z/noexcept-type11a.C
*************** a07bd6eee0bbce4f76caa1372e66c614  gcc/te
*** 14007,14013 ****
  a1507d2a44a55f27a0e7109b7c2a2c43  gcc/testsuite/g++.dg/cpp1z/noexcept-type4.C
  2cbc6352072676c50982358370c66f1e  gcc/testsuite/g++.dg/cpp1z/noexcept-type5.C
  af5d7ef6a22d01a5765aa27521838c33  gcc/testsuite/g++.dg/cpp1z/noexcept-type6.C
! c152163882a235eed70794567c8cd8a2  gcc/testsuite/g++.dg/cpp1z/noexcept-type7.C
  0ca3e9171b98c617342c8aa2cad7d9e3  gcc/testsuite/g++.dg/cpp1z/noexcept-type8.C
  3d83b8d411470d194bbc2c047b8b51c7  gcc/testsuite/g++.dg/cpp1z/noexcept-type9.C
  2c5ef56325680ba844ee1a0a7c66c2f3  gcc/testsuite/g++.dg/cpp1z/nontype-auto1.C
--- 14669,14675 ----
  a1507d2a44a55f27a0e7109b7c2a2c43  gcc/testsuite/g++.dg/cpp1z/noexcept-type4.C
  2cbc6352072676c50982358370c66f1e  gcc/testsuite/g++.dg/cpp1z/noexcept-type5.C
  af5d7ef6a22d01a5765aa27521838c33  gcc/testsuite/g++.dg/cpp1z/noexcept-type6.C
! c5181d40824955112930c0cb4e7c3257  gcc/testsuite/g++.dg/cpp1z/noexcept-type7.C
  0ca3e9171b98c617342c8aa2cad7d9e3  gcc/testsuite/g++.dg/cpp1z/noexcept-type8.C
  3d83b8d411470d194bbc2c047b8b51c7  gcc/testsuite/g++.dg/cpp1z/noexcept-type9.C
  2c5ef56325680ba844ee1a0a7c66c2f3  gcc/testsuite/g++.dg/cpp1z/nontype-auto1.C
*************** b7708449a230c66742c4b7273cffd6ff  gcc/te
*** 14027,14050 ****
  b5a776ba4be1f55785284a7421d87fc2  gcc/testsuite/g++.dg/cpp1z/nontype-auto8.C
  a97faaabc3ad077a0c916a25784bae51  gcc/testsuite/g++.dg/cpp1z/nontype-auto9.C
  60dbc607aaeb0f721ef86a2e43d10472  gcc/testsuite/g++.dg/cpp1z/nontype1.C
! 3b97afa4867523bd6fee596d296c3ec7  gcc/testsuite/g++.dg/cpp1z/nontype2.C
  0301a912d713a3f2a8b549eca0a42fef  gcc/testsuite/g++.dg/cpp1z/nontype3.C
  5479076752989317d16e52a175be48d1  gcc/testsuite/g++.dg/cpp1z/nontype3a.C
  e668ace19a2b0d8946e0e19fd8317af1  gcc/testsuite/g++.dg/cpp1z/pr78771.C
  bc5edc17d9b70d77a054dd4736a66223  gcc/testsuite/g++.dg/cpp1z/pr79143.C
  07da6d9fdd2eb774e9b4b1d81aaca836  gcc/testsuite/g++.dg/cpp1z/pr81016.C
  d9c61dc32a1457892b6df30a48dfa700  gcc/testsuite/g++.dg/cpp1z/pr83020.C
  f6ffc70de816e7e603a0d5498e97f07d  gcc/testsuite/g++.dg/cpp1z/pr83644.C
  e4fd2a00b40168e67247f9a0f2e50b71  gcc/testsuite/g++.dg/cpp1z/pr83918.C
  c5b5c1a950ce1e2defbefbf994279e3a  gcc/testsuite/g++.dg/cpp1z/pr84325.C
  8090b267280923a584d953fe87730fe4  gcc/testsuite/g++.dg/cpp1z/pr84533.C
! 681da2715cf5ae8f94b5e73f7618d259  gcc/testsuite/g++.dg/cpp1z/pr85569.C
  6bb9e9f0644cdafb4d68dc573d484d7d  gcc/testsuite/g++.dg/cpp1z/pr86648.C
  1b308c8d2c5bd6aaa400ca37147401ab  gcc/testsuite/g++.dg/cpp1z/pr87814.C
  b333972b880ee4234fb66ca5b658a366  gcc/testsuite/g++.dg/cpp1z/range-for1.C
! 9232c1c4270f108f4f9dcdf731864332  gcc/testsuite/g++.dg/cpp1z/register1.C
! 25a793be6474b42c1143f1be56f897a9  gcc/testsuite/g++.dg/cpp1z/register2.C
! cef2ad2ba8657a6edcfb63e77992b0be  gcc/testsuite/g++.dg/cpp1z/register3.C
  f35c40f9359deda380357490b21bcf4f  gcc/testsuite/g++.dg/cpp1z/regress1.C
  4b6186538f9f700c48d99d65cfe78bbd  gcc/testsuite/g++.dg/cpp1z/regress2.C
  1cec7e8e1ac5999209a00a7fd3e2dbab  gcc/testsuite/g++.dg/cpp1z/static1.C
--- 14689,14714 ----
  b5a776ba4be1f55785284a7421d87fc2  gcc/testsuite/g++.dg/cpp1z/nontype-auto8.C
  a97faaabc3ad077a0c916a25784bae51  gcc/testsuite/g++.dg/cpp1z/nontype-auto9.C
  60dbc607aaeb0f721ef86a2e43d10472  gcc/testsuite/g++.dg/cpp1z/nontype1.C
! ad5f480f1f43de47e1a5e2e810d33318  gcc/testsuite/g++.dg/cpp1z/nontype2.C
  0301a912d713a3f2a8b549eca0a42fef  gcc/testsuite/g++.dg/cpp1z/nontype3.C
  5479076752989317d16e52a175be48d1  gcc/testsuite/g++.dg/cpp1z/nontype3a.C
  e668ace19a2b0d8946e0e19fd8317af1  gcc/testsuite/g++.dg/cpp1z/pr78771.C
  bc5edc17d9b70d77a054dd4736a66223  gcc/testsuite/g++.dg/cpp1z/pr79143.C
  07da6d9fdd2eb774e9b4b1d81aaca836  gcc/testsuite/g++.dg/cpp1z/pr81016.C
+ d87dc7397fe03d75b41fb964195637d0  gcc/testsuite/g++.dg/cpp1z/pr81349.C
  d9c61dc32a1457892b6df30a48dfa700  gcc/testsuite/g++.dg/cpp1z/pr83020.C
  f6ffc70de816e7e603a0d5498e97f07d  gcc/testsuite/g++.dg/cpp1z/pr83644.C
  e4fd2a00b40168e67247f9a0f2e50b71  gcc/testsuite/g++.dg/cpp1z/pr83918.C
  c5b5c1a950ce1e2defbefbf994279e3a  gcc/testsuite/g++.dg/cpp1z/pr84325.C
  8090b267280923a584d953fe87730fe4  gcc/testsuite/g++.dg/cpp1z/pr84533.C
! dc65e28886d5d2ddf2556993e5252efd  gcc/testsuite/g++.dg/cpp1z/pr85569.C
  6bb9e9f0644cdafb4d68dc573d484d7d  gcc/testsuite/g++.dg/cpp1z/pr86648.C
  1b308c8d2c5bd6aaa400ca37147401ab  gcc/testsuite/g++.dg/cpp1z/pr87814.C
+ 4f9ffba3612b44613643f987ded6b130  gcc/testsuite/g++.dg/cpp1z/pr92536.C
  b333972b880ee4234fb66ca5b658a366  gcc/testsuite/g++.dg/cpp1z/range-for1.C
! 5cafd2c77bd36404914decb1342b683f  gcc/testsuite/g++.dg/cpp1z/register1.C
! b1bd2d8ee7197a19db531a7761c34c27  gcc/testsuite/g++.dg/cpp1z/register2.C
! 0d09f32fc78e2abbfeea1f8807fb7125  gcc/testsuite/g++.dg/cpp1z/register3.C
  f35c40f9359deda380357490b21bcf4f  gcc/testsuite/g++.dg/cpp1z/regress1.C
  4b6186538f9f700c48d99d65cfe78bbd  gcc/testsuite/g++.dg/cpp1z/regress2.C
  1cec7e8e1ac5999209a00a7fd3e2dbab  gcc/testsuite/g++.dg/cpp1z/static1.C
*************** c5f6b89265916b0fda61728cb9e20fb8  gcc/te
*** 14062,14077 ****
  f07c4450546fe355a7c675c46750a186  gcc/testsuite/g++.dg/cpp1z/using4.C
  2834ccfc85a651290bb5470175791773  gcc/testsuite/g++.dg/cpp1z/using5.C
  fe69b2dd849cca71544b409a3695f4d5  gcc/testsuite/g++.dg/cpp1z/using6.C
  335634ca6f39db21a4305967e6392c7e  gcc/testsuite/g++.dg/cpp1z/utf8-2.C
  3603315f9eaa807813fd71a585596d9d  gcc/testsuite/g++.dg/cpp1z/utf8-2a.C
! 9b8e6b8a4cb37e7b5488670e075a1433  gcc/testsuite/g++.dg/cpp1z/utf8-neg.C
  c307915525471ee8f08e6059faf237d8  gcc/testsuite/g++.dg/cpp1z/utf8.C
  90304e7077881cbe7081da0b6575dbea  gcc/testsuite/g++.dg/cpp2a/aggr1.C
  4c16f1196fa5b9ac2fd9ba5882eba51c  gcc/testsuite/g++.dg/cpp2a/aggr2.C
  f2e78d3b66c26dddbe62f358e2dfbd05  gcc/testsuite/g++.dg/cpp2a/attr-likely1.C
  948d69f53be2b901feffe3471235ba88  gcc/testsuite/g++.dg/cpp2a/attr-likely2.C
  56ca9ac4b0dd2143a0e1c8217120157f  gcc/testsuite/g++.dg/cpp2a/attr-likely3.C
  3bd91d09350d4cef4cd92526bb838712  gcc/testsuite/g++.dg/cpp2a/attr-likely4.C
  fdfceca1c064eeb01d47f6a29cee1f95  gcc/testsuite/g++.dg/cpp2a/attr-likely6.C
  efde6c8c1860e6796275cd76c0810b5d  gcc/testsuite/g++.dg/cpp2a/bitfield1.C
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--- 14726,14761 ----
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*** 14101,14113 ****
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*************** e4e06994c2abc2f0b15bad63bc84687d  gcc/te
*** 14122,14128 ****
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--- 15121,15127 ----
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*************** ffff1f1e5445186cd85fc18de4595b89  gcc/te
*** 14135,14141 ****
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--- 15134,15140 ----
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*************** eebf7978c51120ae088d13ba7c495396  gcc/te
*** 14148,14153 ****
--- 15147,15153 ----
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*************** bb8d6be95bfb22151d11535f6f528b3d  gcc/te
*** 14155,14160 ****
--- 15155,15163 ----
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*************** bb8d6be95bfb22151d11535f6f528b3d  gcc/te
*** 14162,14179 ****
--- 15165,15193 ----
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*************** e53bc33f76486b8726e49bd9c9f2c8cd  gcc/te
*** 14185,14196 ****
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--- 15199,15217 ----
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*************** c7877307f19ce4174d69e10af3dc2b39  gcc/te
*** 14198,14203 ****
--- 15219,15225 ----
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*************** e214a6e227705189b8298aa5dccd3e2e  gcc/te
*** 14206,14222 ****
--- 15228,15281 ----
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*************** bf80b786a1a4ec9eac5fda8277196264  gcc/te
*** 14237,14242 ****
--- 15296,15359 ----
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  8c5478e2e42361a7e4e981020f2e9f3c  gcc/testsuite/g++.dg/cpp2a/typename11.C
*************** fb1be0bd9733b177390a3f38f6ba644f  gcc/te
*** 14245,14250 ****
--- 15362,15368 ----
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  3825378b5ab0b376980e999134b361e7  gcc/testsuite/g++.dg/cpp2a/typename4.C
*************** b3c6c8b5938eee52a69b07b50478e16c  gcc/te
*** 14253,14264 ****
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--- 15371,15388 ----
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*************** e4aee91d21a8cdbd286094f893319c70  gcc/te
*** 14266,14272 ****
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--- 15390,15396 ----
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*************** f00c28023dea45fb37e147045583baca  gcc/te
*** 14285,14295 ****
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--- 15409,15424 ----
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  e70f88144abfc6a69a1241301a9b5e68  gcc/testsuite/g++.dg/debug/dwarf2/const2.C
! a3b0790d7c7d8a7f32c52e58d6dc6967  gcc/testsuite/g++.dg/debug/dwarf2/const2b.C
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*************** ec3e87dcf0160896056ee89e02f65e4c  gcc/te
*** 14299,14319 ****
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! 2678b035f308ef99812f9d651da706a4  gcc/testsuite/g++.dg/debug/dwarf2/fesd-none.C
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! 732bd4537e65d67adf1952e9052bb367  gcc/testsuite/g++.dg/debug/dwarf2/fesd-reduced.C
  9b015014257af56d73a48e0f2e546d29  gcc/testsuite/g++.dg/debug/dwarf2/fesd-reduced.h
! 2c7aeb6da0718e753892e00c3c8dd6e6  gcc/testsuite/g++.dg/debug/dwarf2/fesd-sys.C
  9b015014257af56d73a48e0f2e546d29  gcc/testsuite/g++.dg/debug/dwarf2/fesd-sys.h
  34941d0e46c36878c4c08a907bcce93f  gcc/testsuite/g++.dg/debug/dwarf2/fesd.h
  ecc49cbd0f2be0ca43c3bc117a7a1a9d  gcc/testsuite/g++.dg/debug/dwarf2/global-used-types-1.C
--- 15428,15448 ----
  b60cdd725e03d3b1d9c56248e0f623f0  gcc/testsuite/g++.dg/debug/dwarf2/deleted-member-function.C
  2d11614b04b4a82a2bd316bf588c7852  gcc/testsuite/g++.dg/debug/dwarf2/dwarf2-1.C
  906b48b71d0ea35137dc20a9fd2f8965  gcc/testsuite/g++.dg/debug/dwarf2/dwarf2-2.C
! 90fa2f4ece0b62472f918ea24b3a4727  gcc/testsuite/g++.dg/debug/dwarf2/dwarf2.exp
  626624da3f5685a0850aad1b683ac3d4  gcc/testsuite/g++.dg/debug/dwarf2/dwarf4-nested.C
  22d59b45b21c13f83b0b24bf88a853bf  gcc/testsuite/g++.dg/debug/dwarf2/dwarf4-typedef.C
  1b130ad10876bc9db6cf83c8fa07435f  gcc/testsuite/g++.dg/debug/dwarf2/enum1.C
  5e41539f76d0ea42725ce29ed3697281  gcc/testsuite/g++.dg/debug/dwarf2/enum2.C
  f744a20fb6a786108f6e1bd8a6331ed5  gcc/testsuite/g++.dg/debug/dwarf2/explicit-constructor.C
! 4478ea96d4240916d71e4e5dab4ca6dd  gcc/testsuite/g++.dg/debug/dwarf2/fesd-any.C
  9b015014257af56d73a48e0f2e546d29  gcc/testsuite/g++.dg/debug/dwarf2/fesd-any.h
! f352bb3b33298ce970790791164cd471  gcc/testsuite/g++.dg/debug/dwarf2/fesd-baseonly.C
  9b015014257af56d73a48e0f2e546d29  gcc/testsuite/g++.dg/debug/dwarf2/fesd-baseonly.h
! 0bb144b9704509638e9171de8c1482c1  gcc/testsuite/g++.dg/debug/dwarf2/fesd-none.C
  9b015014257af56d73a48e0f2e546d29  gcc/testsuite/g++.dg/debug/dwarf2/fesd-none.h
! a71f3905ccbb8e733c9e462be2593849  gcc/testsuite/g++.dg/debug/dwarf2/fesd-reduced.C
  9b015014257af56d73a48e0f2e546d29  gcc/testsuite/g++.dg/debug/dwarf2/fesd-reduced.h
! 2e0014415f7735762faa0771fe26c4e9  gcc/testsuite/g++.dg/debug/dwarf2/fesd-sys.C
  9b015014257af56d73a48e0f2e546d29  gcc/testsuite/g++.dg/debug/dwarf2/fesd-sys.h
  34941d0e46c36878c4c08a907bcce93f  gcc/testsuite/g++.dg/debug/dwarf2/fesd.h
  ecc49cbd0f2be0ca43c3bc117a7a1a9d  gcc/testsuite/g++.dg/debug/dwarf2/global-used-types-1.C
*************** d6a23e0e5a6ec9b1682a91b30d778f71  gcc/te
*** 14326,14332 ****
  93bfc5990594c4c0244151f6fdc98bc7  gcc/testsuite/g++.dg/debug/dwarf2/imported-module.C
  73ac452cd11b5b9c8e3a8e8d4201a15a  gcc/testsuite/g++.dg/debug/dwarf2/inline-ns-1.C
  41510ffdf4c706ab9c8121d8f4485647  gcc/testsuite/g++.dg/debug/dwarf2/inline-ns-2.C
! 434a3478d8c6957ab9c96cfff1d21492  gcc/testsuite/g++.dg/debug/dwarf2/inline-var-1.C
  ef873f60e957c0b68b6fbb4875ec351a  gcc/testsuite/g++.dg/debug/dwarf2/inline-var-2.C
  b35aef275e8c1cc68e99f8801dc846e4  gcc/testsuite/g++.dg/debug/dwarf2/inline1.C
  b2bca0913e4135c3359c9933520119f6  gcc/testsuite/g++.dg/debug/dwarf2/integer-typedef.C
--- 15455,15461 ----
  93bfc5990594c4c0244151f6fdc98bc7  gcc/testsuite/g++.dg/debug/dwarf2/imported-module.C
  73ac452cd11b5b9c8e3a8e8d4201a15a  gcc/testsuite/g++.dg/debug/dwarf2/inline-ns-1.C
  41510ffdf4c706ab9c8121d8f4485647  gcc/testsuite/g++.dg/debug/dwarf2/inline-ns-2.C
! e0036fcbd6e1ec38a9856b2ab0437138  gcc/testsuite/g++.dg/debug/dwarf2/inline-var-1.C
  ef873f60e957c0b68b6fbb4875ec351a  gcc/testsuite/g++.dg/debug/dwarf2/inline-var-2.C
  b35aef275e8c1cc68e99f8801dc846e4  gcc/testsuite/g++.dg/debug/dwarf2/inline1.C
  b2bca0913e4135c3359c9933520119f6  gcc/testsuite/g++.dg/debug/dwarf2/integer-typedef.C
*************** c7ffd1dd0ae40378732be3ac8729a37c  gcc/te
*** 14349,14355 ****
  804b19b7b58e86e4e92d0018c08cf7b7  gcc/testsuite/g++.dg/debug/dwarf2/noreturn-function.C
  b3cbbd79d5ff077a6732280d76b2284e  gcc/testsuite/g++.dg/debug/dwarf2/omp-fesdr.C
  7054dc65c88179389afb9e79cad0df38  gcc/testsuite/g++.dg/debug/dwarf2/pr41063.C
! e9f4d52036740c7a6fa51c597a6dd04b  gcc/testsuite/g++.dg/debug/dwarf2/pr44641.C
  90028c65be83718cb8e154df1b502d99  gcc/testsuite/g++.dg/debug/dwarf2/pr45997-1.C
  443ec5817865fbd9af98771a74a1c93c  gcc/testsuite/g++.dg/debug/dwarf2/pr45997-2.C
  2467bf91081d7210e5e3eaec5f48c1f3  gcc/testsuite/g++.dg/debug/dwarf2/pr46123-2.C
--- 15478,15484 ----
  804b19b7b58e86e4e92d0018c08cf7b7  gcc/testsuite/g++.dg/debug/dwarf2/noreturn-function.C
  b3cbbd79d5ff077a6732280d76b2284e  gcc/testsuite/g++.dg/debug/dwarf2/omp-fesdr.C
  7054dc65c88179389afb9e79cad0df38  gcc/testsuite/g++.dg/debug/dwarf2/pr41063.C
! 9118e81e091fae9d3d9c8c39a846e724  gcc/testsuite/g++.dg/debug/dwarf2/pr44641.C
  90028c65be83718cb8e154df1b502d99  gcc/testsuite/g++.dg/debug/dwarf2/pr45997-1.C
  443ec5817865fbd9af98771a74a1c93c  gcc/testsuite/g++.dg/debug/dwarf2/pr45997-2.C
  2467bf91081d7210e5e3eaec5f48c1f3  gcc/testsuite/g++.dg/debug/dwarf2/pr46123-2.C
*************** e9f4d52036740c7a6fa51c597a6dd04b  gcc/te
*** 14357,14363 ****
  61d7e2de1732fd9c25378d4c85a4bb53  gcc/testsuite/g++.dg/debug/dwarf2/pr46527.C
  77d7e1ad341ac6addc71df4dbb8ec2e2  gcc/testsuite/g++.dg/debug/dwarf2/pr52260.C
  bec26218174ce021c4d89096b9f0c537  gcc/testsuite/g++.dg/debug/dwarf2/pr54508.C
! 55eb4256b24817046cf5777db4afece0  gcc/testsuite/g++.dg/debug/dwarf2/pr61433.C
  3dc0f561c3ebaf29a4f14ee6f25555c1  gcc/testsuite/g++.dg/debug/dwarf2/pr67764.C
  3cfcb26c02f6e51b53e2490df47fc140  gcc/testsuite/g++.dg/debug/dwarf2/pr77363.C
  5530d5c25216033510bd314f7bccbcca  gcc/testsuite/g++.dg/debug/dwarf2/pr78835.C
--- 15486,15492 ----
  61d7e2de1732fd9c25378d4c85a4bb53  gcc/testsuite/g++.dg/debug/dwarf2/pr46527.C
  77d7e1ad341ac6addc71df4dbb8ec2e2  gcc/testsuite/g++.dg/debug/dwarf2/pr52260.C
  bec26218174ce021c4d89096b9f0c537  gcc/testsuite/g++.dg/debug/dwarf2/pr54508.C
! 2d5f72ae99d7dbf7d7dae7e5fa539b2d  gcc/testsuite/g++.dg/debug/dwarf2/pr61433.C
  3dc0f561c3ebaf29a4f14ee6f25555c1  gcc/testsuite/g++.dg/debug/dwarf2/pr67764.C
  3cfcb26c02f6e51b53e2490df47fc140  gcc/testsuite/g++.dg/debug/dwarf2/pr77363.C
  5530d5c25216033510bd314f7bccbcca  gcc/testsuite/g++.dg/debug/dwarf2/pr78835.C
*************** c97b36f101808a4d1b88e966d08df228  gcc/te
*** 14365,14371 ****
  2c571572a5d9948808d5c737071aa994  gcc/testsuite/g++.dg/debug/dwarf2/pr80234-1.C
  faf5c36abd2cfa3ad2cff3321cf391cf  gcc/testsuite/g++.dg/debug/dwarf2/pr80234-2.C
  4ee1bfe8771af7455053744f7fbfacc8  gcc/testsuite/g++.dg/debug/dwarf2/pr85302.C
! 0f874907f5857287c313bccd53771ee0  gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C
  2ccdefbe0960011d93e7b256421df22a  gcc/testsuite/g++.dg/debug/dwarf2/pr86456.C
  d7ed5be36e8ab58d3d73c325b6ec84ab  gcc/testsuite/g++.dg/debug/dwarf2/pr86900.C
  6bacb72669961d72ae42d4e8ef6f3235  gcc/testsuite/g++.dg/debug/dwarf2/pr87295.C
--- 15494,15500 ----
  2c571572a5d9948808d5c737071aa994  gcc/testsuite/g++.dg/debug/dwarf2/pr80234-1.C
  faf5c36abd2cfa3ad2cff3321cf391cf  gcc/testsuite/g++.dg/debug/dwarf2/pr80234-2.C
  4ee1bfe8771af7455053744f7fbfacc8  gcc/testsuite/g++.dg/debug/dwarf2/pr85302.C
! 5de08163e6802415b19e2d6aeb632428  gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C
  2ccdefbe0960011d93e7b256421df22a  gcc/testsuite/g++.dg/debug/dwarf2/pr86456.C
  d7ed5be36e8ab58d3d73c325b6ec84ab  gcc/testsuite/g++.dg/debug/dwarf2/pr86900.C
  6bacb72669961d72ae42d4e8ef6f3235  gcc/testsuite/g++.dg/debug/dwarf2/pr87295.C
*************** a79b4fb3cb7873c05364c263058a7f1a  gcc/te
*** 14424,14431 ****
  32c2c4afd9960daa839e702a7ad2b0ed  gcc/testsuite/g++.dg/debug/dwarf2/typedef4.C
  ddbacc1f20aaa6efbe151f3f8d8b9aa9  gcc/testsuite/g++.dg/debug/dwarf2/typedef5.C
  1bac29a975fef390435bcddbc2f1112b  gcc/testsuite/g++.dg/debug/dwarf2/typedef6.C
! 479930fb5faf8196de02f2765efd234d  gcc/testsuite/g++.dg/debug/enum-1.C
! 7ca1d4c7ad1e18f7eebfa4742477778c  gcc/testsuite/g++.dg/debug/enum-2.C
  a0ac13a0885ee162c972f58ffbd934e7  gcc/testsuite/g++.dg/debug/localclass1.C
  475a95279bcd0b4ccd6e118ead65e106  gcc/testsuite/g++.dg/debug/minimal1.C
  8d1c97a9b811ba8c9a789baf97c48ce4  gcc/testsuite/g++.dg/debug/namespace1.C
--- 15553,15560 ----
  32c2c4afd9960daa839e702a7ad2b0ed  gcc/testsuite/g++.dg/debug/dwarf2/typedef4.C
  ddbacc1f20aaa6efbe151f3f8d8b9aa9  gcc/testsuite/g++.dg/debug/dwarf2/typedef5.C
  1bac29a975fef390435bcddbc2f1112b  gcc/testsuite/g++.dg/debug/dwarf2/typedef6.C
! d11dcc4e37738beb9e8be03ce7630c35  gcc/testsuite/g++.dg/debug/enum-1.C
! ae15f5aa018a04a1250780eca928d27c  gcc/testsuite/g++.dg/debug/enum-2.C
  a0ac13a0885ee162c972f58ffbd934e7  gcc/testsuite/g++.dg/debug/localclass1.C
  475a95279bcd0b4ccd6e118ead65e106  gcc/testsuite/g++.dg/debug/minimal1.C
  8d1c97a9b811ba8c9a789baf97c48ce4  gcc/testsuite/g++.dg/debug/namespace1.C
*************** bf050d057433140d0ed2aeeab122c5be  gcc/te
*** 14445,14452 ****
  6331b60f5ff086abdb1990391e6b4fa9  gcc/testsuite/g++.dg/debug/pr46240.cc
  d3a83dca3a3bea04d76b4bb4e2f85a43  gcc/testsuite/g++.dg/debug/pr46241.C
  8dd40f232ebc9ee935e0a2aa00cf5950  gcc/testsuite/g++.dg/debug/pr46338.C
! b3573c733f86249cc395f17e7bc0d087  gcc/testsuite/g++.dg/debug/pr46583.C
! 0ea6ad627f09eeede6e4c5952caf350c  gcc/testsuite/g++.dg/debug/pr47106.C
  a864ac9ace6ee08b0ae00899e67445f0  gcc/testsuite/g++.dg/debug/pr47209.C
  3982c90f2cbd3107c17140c0b6d8f6b3  gcc/testsuite/g++.dg/debug/pr47283.C
  388712728ce94b3a3628533d73b93f94  gcc/testsuite/g++.dg/debug/pr53466.C
--- 15574,15581 ----
  6331b60f5ff086abdb1990391e6b4fa9  gcc/testsuite/g++.dg/debug/pr46240.cc
  d3a83dca3a3bea04d76b4bb4e2f85a43  gcc/testsuite/g++.dg/debug/pr46241.C
  8dd40f232ebc9ee935e0a2aa00cf5950  gcc/testsuite/g++.dg/debug/pr46338.C
! 5616b4b245c08444651a857fc60e574d  gcc/testsuite/g++.dg/debug/pr46583.C
! d39706069135fe3d08f196910f76fb94  gcc/testsuite/g++.dg/debug/pr47106.C
  a864ac9ace6ee08b0ae00899e67445f0  gcc/testsuite/g++.dg/debug/pr47209.C
  3982c90f2cbd3107c17140c0b6d8f6b3  gcc/testsuite/g++.dg/debug/pr47283.C
  388712728ce94b3a3628533d73b93f94  gcc/testsuite/g++.dg/debug/pr53466.C
*************** a864ac9ace6ee08b0ae00899e67445f0  gcc/te
*** 14454,14473 ****
  3a8f6ee436933eb1c17b19d1645af355  gcc/testsuite/g++.dg/debug/pr54499.C
  21517e22d71d412b5fe08293b2081097  gcc/testsuite/g++.dg/debug/pr54828.C
  5dc7cab98a90e4bc7730b184635619bd  gcc/testsuite/g++.dg/debug/pr54831.C
! 9d78da5e6dec6c0c05e25b98489fe8be  gcc/testsuite/g++.dg/debug/pr56294.C
! 0d1b1a30de5ef0c52bd95f99e1177bf0  gcc/testsuite/g++.dg/debug/pr56819.C
  41269ba367aaa19e5abac5932fdc247c  gcc/testsuite/g++.dg/debug/pr65678.C
  ccda43f2f659360264083e64ebc66d22  gcc/testsuite/g++.dg/debug/pr70271.C
  a3a11fbcbd0dfec7af753731b7dd95a1  gcc/testsuite/g++.dg/debug/pr71057.C
! cbcb3ca2d193fd2869909396fd350d4c  gcc/testsuite/g++.dg/debug/pr71432.C
  271f75e481615831453a65f49baedcd5  gcc/testsuite/g++.dg/debug/pr72808.C
  cb620ecdcf5127492c630c4b2400bbd6  gcc/testsuite/g++.dg/debug/pr80461.C
! dcf67ead0fe2bb68fc518e4789e519f2  gcc/testsuite/g++.dg/debug/pr84704.C
  423c814771cf96308127152a6e56b792  gcc/testsuite/g++.dg/debug/pr84813.C
  ff81bad5bdaf6ebdf3b91953ac3a3e83  gcc/testsuite/g++.dg/debug/pr88181.C
  03aafe60ff9ad349f4207278a1941889  gcc/testsuite/g++.dg/debug/pr89006.C
  b3911c06633a98c7252ef4d4cd357add  gcc/testsuite/g++.dg/debug/pr90914.C
  7ea445d3dffc6b1aa3648e9d5e464e5f  gcc/testsuite/g++.dg/debug/pr92763.C
  a5e8d546d53a780cc3eb41574ea9f263  gcc/testsuite/g++.dg/debug/ra1.C
  c3f392076ad11f8768ef0321b89abd5f  gcc/testsuite/g++.dg/debug/static1.C
  7e13d86d33b17cfb7cdf61b7b8cca961  gcc/testsuite/g++.dg/debug/template1.C
--- 15583,15607 ----
  3a8f6ee436933eb1c17b19d1645af355  gcc/testsuite/g++.dg/debug/pr54499.C
  21517e22d71d412b5fe08293b2081097  gcc/testsuite/g++.dg/debug/pr54828.C
  5dc7cab98a90e4bc7730b184635619bd  gcc/testsuite/g++.dg/debug/pr54831.C
! 6882da3a42d380c184cbe865d79ebd48  gcc/testsuite/g++.dg/debug/pr56294.C
! 2ed3351a3873bcdaa2d9a2642c84efbf  gcc/testsuite/g++.dg/debug/pr56819.C
  41269ba367aaa19e5abac5932fdc247c  gcc/testsuite/g++.dg/debug/pr65678.C
  ccda43f2f659360264083e64ebc66d22  gcc/testsuite/g++.dg/debug/pr70271.C
  a3a11fbcbd0dfec7af753731b7dd95a1  gcc/testsuite/g++.dg/debug/pr71057.C
! da60b5b82bc9e19db3f7eaa2ffda9f19  gcc/testsuite/g++.dg/debug/pr71432.C
  271f75e481615831453a65f49baedcd5  gcc/testsuite/g++.dg/debug/pr72808.C
  cb620ecdcf5127492c630c4b2400bbd6  gcc/testsuite/g++.dg/debug/pr80461.C
! c7498a94a75a947d573088a8f8266215  gcc/testsuite/g++.dg/debug/pr84704.C
  423c814771cf96308127152a6e56b792  gcc/testsuite/g++.dg/debug/pr84813.C
  ff81bad5bdaf6ebdf3b91953ac3a3e83  gcc/testsuite/g++.dg/debug/pr88181.C
  03aafe60ff9ad349f4207278a1941889  gcc/testsuite/g++.dg/debug/pr89006.C
  b3911c06633a98c7252ef4d4cd357add  gcc/testsuite/g++.dg/debug/pr90914.C
  7ea445d3dffc6b1aa3648e9d5e464e5f  gcc/testsuite/g++.dg/debug/pr92763.C
+ c4e32dbfd66eb4f8473c3a4703532572  gcc/testsuite/g++.dg/debug/pr94272.C
+ 29f96a467ca8ab5bea3bc6ffff55775b  gcc/testsuite/g++.dg/debug/pr94273.C
+ feb3502f9ee8e662be1d6ebf5f38b8b2  gcc/testsuite/g++.dg/debug/pr94281.C
+ f551cc33fa6ede0dc5d46ffd1a776c5d  gcc/testsuite/g++.dg/debug/pr94323.C
+ 765ee14b0daaebf0ec11f9a26fdad79b  gcc/testsuite/g++.dg/debug/pr94459.C
  a5e8d546d53a780cc3eb41574ea9f263  gcc/testsuite/g++.dg/debug/ra1.C
  c3f392076ad11f8768ef0321b89abd5f  gcc/testsuite/g++.dg/debug/static1.C
  7e13d86d33b17cfb7cdf61b7b8cca961  gcc/testsuite/g++.dg/debug/template1.C
*************** d4f839df58fe0f7f95cc2bf558eee2ff  gcc/te
*** 14495,14501 ****
  5381563d83a802d89887422d01bc17d1  gcc/testsuite/g++.dg/dfp/44473-1.C
  ca2c3afed1d1ac0b4c3f2b2b82264602  gcc/testsuite/g++.dg/dfp/44473-2.C
  694614d4f71e398dcda11523059a774e  gcc/testsuite/g++.dg/dfp/base.C
! 368ffa37cee06ad657a4af43432b76ae  gcc/testsuite/g++.dg/dfp/dfp.exp
  b98372f1dd5bbd1ea23e2933d4bdf03a  gcc/testsuite/g++.dg/dfp/mangle-1.C
  c0592e7184d9390b10cd93d3b6f1f7a0  gcc/testsuite/g++.dg/dfp/mangle-2.C
  97de1869469f8592b096b761b6a2cceb  gcc/testsuite/g++.dg/dfp/mangle-3.C
--- 15629,15635 ----
  5381563d83a802d89887422d01bc17d1  gcc/testsuite/g++.dg/dfp/44473-1.C
  ca2c3afed1d1ac0b4c3f2b2b82264602  gcc/testsuite/g++.dg/dfp/44473-2.C
  694614d4f71e398dcda11523059a774e  gcc/testsuite/g++.dg/dfp/base.C
! fc3e6e5f2b3af13e727b4623292c514c  gcc/testsuite/g++.dg/dfp/dfp.exp
  b98372f1dd5bbd1ea23e2933d4bdf03a  gcc/testsuite/g++.dg/dfp/mangle-1.C
  c0592e7184d9390b10cd93d3b6f1f7a0  gcc/testsuite/g++.dg/dfp/mangle-2.C
  97de1869469f8592b096b761b6a2cceb  gcc/testsuite/g++.dg/dfp/mangle-3.C
*************** becc0e6f064af285a504ff10eaffc525  gcc/te
*** 14503,14535 ****
  5899dbb591a164000821a0ac993fcd47  gcc/testsuite/g++.dg/dfp/mangle-5.C
  8b4d16a77a1edab85ee4c99fda03eb79  gcc/testsuite/g++.dg/dfp/mangle-mode.C
  3a865b01c504023d0b90b1f055163c6a  gcc/testsuite/g++.dg/dfp/nofields.C
  cd0133a632a541db051ef84d53754ac6  gcc/testsuite/g++.dg/dfp/typeid1.C
! 655f0d73aff50e3cca8b3dc84b806c5e  gcc/testsuite/g++.dg/dg.exp
  acfb4c292cab52af7c96437dfeb91332  gcc/testsuite/g++.dg/diagnostic/aka1.C
  6daf9c84b004ad38b36ca9e885175631  gcc/testsuite/g++.dg/diagnostic/aka2.C
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  424dce5e3d57a2b34afe27e7bbf2592d  gcc/testsuite/g++.dg/diagnostic/bitfld1.C
! f3c789df79994ad5c2e7bf06c592e5aa  gcc/testsuite/g++.dg/diagnostic/bitfld2.C
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  4d21f6027d297038928184dbbcd7b6f3  gcc/testsuite/g++.dg/diagnostic/extern-initialized.C
  dd6972e7b92113e6456388c099d1d0fc  gcc/testsuite/g++.dg/diagnostic/friend1.C
  35450697df4db69677623dcc4bc44bf5  gcc/testsuite/g++.dg/diagnostic/inhibit-warn-1.C
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  4656c9afc261871baeb12bca5d22f022  gcc/testsuite/g++.dg/diagnostic/member-fn-1.C
  f3b416e81c428ee9582715ac61d2b3d7  gcc/testsuite/g++.dg/diagnostic/method1.C
  67ae67c90098a1f9b487a08f6117d69a  gcc/testsuite/g++.dg/diagnostic/missing-default-args.C
  298c689626ea55a13cf693bf016c5aa9  gcc/testsuite/g++.dg/diagnostic/missing-typename.C
  a57099362f24a92fdb8ee593039405ff  gcc/testsuite/g++.dg/diagnostic/nested-name-1.C
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  bd4b7e0e3c910f4e6940a6a7cca5b15b  gcc/testsuite/g++.dg/diagnostic/param-type-mismatch-3.C
--- 15637,15696 ----
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! 42967579b2dda1d86d9ef2d93d3c302e  gcc/testsuite/g++.dg/dg.exp
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  ff860856c2893a017f1f53ffe7a296c7  gcc/testsuite/g++.dg/diagnostic/auto1.C
  eb129992ec5b8849abc98fab070a13b9  gcc/testsuite/g++.dg/diagnostic/bad-binary-ops.C
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! 170456ee0242a2ff4a962bc2fcf6b5b2  gcc/testsuite/g++.dg/diagnostic/bitfld2.C
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  f3b416e81c428ee9582715ac61d2b3d7  gcc/testsuite/g++.dg/diagnostic/method1.C
  67ae67c90098a1f9b487a08f6117d69a  gcc/testsuite/g++.dg/diagnostic/missing-default-args.C
  298c689626ea55a13cf693bf016c5aa9  gcc/testsuite/g++.dg/diagnostic/missing-typename.C
  a57099362f24a92fdb8ee593039405ff  gcc/testsuite/g++.dg/diagnostic/nested-name-1.C
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*************** b925bc078075ee65909b19494337263e  gcc/te
*** 14541,14546 ****
--- 15702,15709 ----
  4a1d7e4cbcc6e8b23b2be621ad06aef0  gcc/testsuite/g++.dg/diagnostic/pr60862.C
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*************** f1fa5cf0ff0d4ecdd2e636f162a3a570  gcc/te
*** 14549,14574 ****
  9708862150e6af526a7566a30ec2fdd1  gcc/testsuite/g++.dg/diagnostic/pr79300.C
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  d84401f4f10886da506d8acbdb74a1d9  gcc/testsuite/g++.dg/diagnostic/typedef-initialized.C
  0afd8f1b85bcfcca0e1fc015e51c70df  gcc/testsuite/g++.dg/diagnostic/unclosed-extern-c.C
  b7f5e1f6b72f1264ce2e8730582cc334  gcc/testsuite/g++.dg/diagnostic/unclosed-function.C
  ba6469f1b782e19346b02d71b3bc296e  gcc/testsuite/g++.dg/diagnostic/unclosed-namespace.C
  570dbb042fd573648e202e46e6f691a3  gcc/testsuite/g++.dg/diagnostic/unclosed-struct.C
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--- 15712,15746 ----
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  570dbb042fd573648e202e46e6f691a3  gcc/testsuite/g++.dg/diagnostic/unclosed-struct.C
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  793d6d70a83796d613da9b245936f84c  gcc/testsuite/g++.dg/diagnostic/virtual-constexpr.C
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*************** c57d00c7e2509174eb67af39ca23acc8  gcc/te
*** 14639,14646 ****
  2fa97d2eb1070b8ff9ed142189631d04  gcc/testsuite/g++.dg/eh/fp-regs.C
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  fa7c4733d09d80ea62bb08bcfe896fbb  gcc/testsuite/g++.dg/eh/goto1.C
! acb5eb6224971a20cf58d918cf380331  gcc/testsuite/g++.dg/eh/goto2.C
! 5ebab5f6b34afd648762ad83dfa5303e  gcc/testsuite/g++.dg/eh/goto3.C
  83a9a4f114479e6635dd508a4994d73d  gcc/testsuite/g++.dg/eh/ia64-1.C
  770672d287d134821ae3d85a07f18e95  gcc/testsuite/g++.dg/eh/ia64-2.C
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--- 15811,15818 ----
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! 3ae0aaa6a440a7b0817b9e38967328ee  gcc/testsuite/g++.dg/eh/goto2.C
! a47d4010143eebc835697a10495e28a2  gcc/testsuite/g++.dg/eh/goto3.C
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*************** a081cebee3412cc144c315a53ce4d824  gcc/te
*** 14663,14670 ****
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  10cee1522872b7a635448041c93abb77  gcc/testsuite/g++.dg/eh/scope1.C
! 547af1555e324b8b3d2a1f0c78b1cb44  gcc/testsuite/g++.dg/eh/shadow1.C
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  83a7ff2264ae46e51ffcca7ca6a7cf8c  gcc/testsuite/g++.dg/eh/simd-1.C
  8ca9b346be7f84c368ac74fd74ad5bbf  gcc/testsuite/g++.dg/eh/simd-2.C
--- 15835,15843 ----
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! 25142fe6cff6b7d981b3267f13c2b8ab  gcc/testsuite/g++.dg/eh/shadow1.C
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*************** bfeb38eba4e729358fcc5f4cb5c9dd13  gcc/te
*** 14715,14732 ****
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--- 15888,15907 ----
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! 1fe630ebe577c273db379ba1fa2e765a  gcc/testsuite/g++.dg/expr/bitfield4.C
! 20be867a29c570fcced5fbc6b95419b4  gcc/testsuite/g++.dg/expr/bitfield5.C
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! 5d212aa1221b038fde4fdbdb6891be1d  gcc/testsuite/g++.dg/expr/bool3.C
! 2819c362fc7add8cbcc557721e4544a3  gcc/testsuite/g++.dg/expr/bool4.C
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  512b0d2bfbf76a594b90cac6c74cc5c1  gcc/testsuite/g++.dg/expr/call2.C
*************** ce7b6234ca0490c5f395644574322ca2  gcc/te
*** 14735,14741 ****
  47ee2e9f4d1f4caaa66273c534a05700  gcc/testsuite/g++.dg/expr/call5.C
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  234b04abbf4ba798c38bda66394b82a7  gcc/testsuite/g++.dg/expr/cast10.C
! ac55f5f9fbcb01e9dc59e3d52a0a6de8  gcc/testsuite/g++.dg/expr/cast11.C
  12be7dc45a455eddda5ccfa91904739c  gcc/testsuite/g++.dg/expr/cast2.C
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--- 15910,15916 ----
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! e81c36105f876d1822c790ae2b655fcc  gcc/testsuite/g++.dg/expr/cast11.C
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*************** f131cd45dc233c5c2aea409de5326ad9  gcc/te
*** 14753,14769 ****
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! bd7af576d8ea0b83fe650a92ee28c08e  gcc/testsuite/g++.dg/expr/cond9.C
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  5943e958df776a88c39dc200ec5d291c  gcc/testsuite/g++.dg/expr/crash-1.C
! 4ddfe508094ae855749b3a8b63fd8063  gcc/testsuite/g++.dg/expr/crash2.C
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--- 15928,15945 ----
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*************** fd680877ab1cfa7b118501bb1e133e2a  gcc/te
*** 14775,14788 ****
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! 8170c37ebaca18b78db20179b171f615  gcc/testsuite/g++.dg/expr/lval3.C
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--- 15951,15964 ----
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! 37a784f394dfd311c58877d862824189  gcc/testsuite/g++.dg/expr/lval1.C
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! 54bb18e8ee0f2b8a220288cd452c82f2  gcc/testsuite/g++.dg/expr/lval3.C
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! d1d6d34f10781c55aeb5890ea6052f5e  gcc/testsuite/g++.dg/expr/pmf-1.C
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*************** fdcee3f5eda44b0547ceaf548bc1c6e9  gcc/te
*** 14798,14806 ****
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! 0aff78a2cc7b554bd2a283f999880d26  gcc/testsuite/g++.dg/expr/sizeof1.C
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--- 15974,15983 ----
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*************** b39edf0129c7b02d40dd1f8360666a7c  gcc/te
*** 14808,14822 ****
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--- 15985,15999 ----
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! c55a9151724d24d8a0090afa88cebf53  gcc/testsuite/g++.dg/expr/static_cast8.C
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  cf7aa114f366559462adbb162c0a071d  gcc/testsuite/g++.dg/expr/stmt-expr-1.C
  a2cb6541b849d8c33282f342e26447ca  gcc/testsuite/g++.dg/expr/string-1.C
! 4dff56d9b4766c94b6dc6a431ad42522  gcc/testsuite/g++.dg/expr/string-2.C
  8f5d773ab2c0fb76d721a88e7936dd2a  gcc/testsuite/g++.dg/expr/unary1.C
! 75708c0b866a6b869841fd43bf4acad0  gcc/testsuite/g++.dg/expr/unary2.C
  50101473c07e54911f512727ba7f6cd4  gcc/testsuite/g++.dg/expr/unary3.C
  ffd75379d11277c314a7c44c9f8a5129  gcc/testsuite/g++.dg/expr/unary4.C
  e639e926667ce8f9dee4e94ea0269323  gcc/testsuite/g++.dg/expr/volatile1.C
*************** f94bcd708feb1a029065a7503b545f54  gcc/te
*** 14840,14846 ****
  ce4ff2095f5aadd1429d75f9964e3068  gcc/testsuite/g++.dg/ext/altivec-12.C
  8269af4690723c041adba936c4db6226  gcc/testsuite/g++.dg/ext/altivec-13.C
  12b4431d53d79d271888051ac7a6c837  gcc/testsuite/g++.dg/ext/altivec-14.C
! 05aa93a27032c47400c1728d165f6aeb  gcc/testsuite/g++.dg/ext/altivec-15.C
  1f347fa1c57370132e750e4fb8b77f9d  gcc/testsuite/g++.dg/ext/altivec-16.C
  e7b8730e35adae22637664edfdba084d  gcc/testsuite/g++.dg/ext/altivec-17.C
  4c612ecdb73822d456d417a307c5969e  gcc/testsuite/g++.dg/ext/altivec-18.C
--- 16017,16023 ----
  ce4ff2095f5aadd1429d75f9964e3068  gcc/testsuite/g++.dg/ext/altivec-12.C
  8269af4690723c041adba936c4db6226  gcc/testsuite/g++.dg/ext/altivec-13.C
  12b4431d53d79d271888051ac7a6c837  gcc/testsuite/g++.dg/ext/altivec-14.C
! e79911e2babacda30b877e71d44e32a4  gcc/testsuite/g++.dg/ext/altivec-15.C
  1f347fa1c57370132e750e4fb8b77f9d  gcc/testsuite/g++.dg/ext/altivec-16.C
  e7b8730e35adae22637664edfdba084d  gcc/testsuite/g++.dg/ext/altivec-17.C
  4c612ecdb73822d456d417a307c5969e  gcc/testsuite/g++.dg/ext/altivec-18.C
*************** af5ab077811439033f9383ef557968f9  gcc/te
*** 14866,14878 ****
  501bf92c734eebe5c5c57a9e64a340e1  gcc/testsuite/g++.dg/ext/always_inline-3.C
  2ac7c8bbdf5a3e29d0fe098818a73c8c  gcc/testsuite/g++.dg/ext/always_inline-4.C
  ffdb526972a39c85890c287c92939515  gcc/testsuite/g++.dg/ext/always_inline-5.C
! 5080c1dcd67db52ba793867cc63ba3a3  gcc/testsuite/g++.dg/ext/anon-struct1.C
  0e1fc7f945fafc3c224a24b23c1c2a76  gcc/testsuite/g++.dg/ext/anon-struct2.C
  5f70b0d4a3b1e3b8a10d06d54d63f427  gcc/testsuite/g++.dg/ext/anon-struct3.C
  3326283e48652640c3c66982c9b8d0ef  gcc/testsuite/g++.dg/ext/anon-struct4.C
  a883399d4251a031b0d761ef41a67f52  gcc/testsuite/g++.dg/ext/anon-struct5.C
! 279d428f16d7874a83fa68c87e922993  gcc/testsuite/g++.dg/ext/anon-struct6.C
  2792f1c8cc3327e23d859e893eac1679  gcc/testsuite/g++.dg/ext/anon-struct7.C
  9ad9eafed83197342bcdbe7afa3a727f  gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-1.C
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--- 16043,16057 ----
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! f0c98c112823b1ebcaa945f17c09d04a  gcc/testsuite/g++.dg/ext/anon-struct6.C
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  7b5b35ce8561ffdc55f1f5d56d436826  gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C
*************** a883399d4251a031b0d761ef41a67f52  gcc/te
*** 14881,14892 ****
  7b3de180584180ecc9cfa5543f4cb88c  gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C
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! c2aabfd0e7da2857b86672bc59174dcf  gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops.h
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  aa12e114942ce574df5e9e8b8591c014  gcc/testsuite/g++.dg/ext/arm-fp16/fp16-overload-1.C
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  f27482d95969ec072f6dc3a9d18c8b21  gcc/testsuite/g++.dg/ext/arm-fp16/fp16-return-1.C
! 691a47a228a5fa12f281a771f2c53825  gcc/testsuite/g++.dg/ext/array1.C
  f1a9da555162b7ed9f63dd442d842c1c  gcc/testsuite/g++.dg/ext/array2.C
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--- 16060,16071 ----
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! 7a2d07ab2ef6a890bd3bd096650d2312  gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops.h
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! 6a6537dca5e2183665f9761920418307  gcc/testsuite/g++.dg/ext/array1.C
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*************** e5f9fb7d1c25afe2ab0823f495d251e5  gcc/te
*** 14914,14924 ****
  7c55adab57f8900b7952c724d9d1ac37  gcc/testsuite/g++.dg/ext/atomic-2.C
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! dac3dc2f2bcb2d6fcb6a43f8be21b0e2  gcc/testsuite/g++.dg/ext/attr-alloc_size.C
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--- 16093,16105 ----
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! 7a2a8a229126f06d897c4b4ec6c37557  gcc/testsuite/g++.dg/ext/attr-alloc_size.C
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*************** c3081546bf4a8a6d5679738f20f2e2e5  gcc/te
*** 14932,14937 ****
--- 16113,16119 ----
  4c9a4160295d6aa1d9a41d5c3becda3d  gcc/testsuite/g++.dg/ext/attr-ifunc-4.C
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*************** ac8e92acc4020cb32c1c3e0a9dff5a30  gcc/te
*** 14947,14955 ****
--- 16129,16139 ----
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*************** cfa7768f73d42eab36aac87a1590768a  gcc/te
*** 15095,15109 ****
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--- 16279,16293 ----
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! 1cbcac6d3f7b0fb5c37a36a05943edd3  gcc/testsuite/g++.dg/ext/cleanup-10.C
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*************** e710a424682710a7b643aeb0875d892d  gcc/te
*** 15133,15140 ****
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! 95dfcb8e89d2fa084984e81e3f62b2bf  gcc/testsuite/g++.dg/ext/constexpr-vla1.C
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--- 16317,16329 ----
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! e6a4da2462b7d9932c6f217b19f03ac9  gcc/testsuite/g++.dg/ext/constexpr-vla1.C
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  f8121f8695bad95db22d9209cbbb40da  gcc/testsuite/g++.dg/ext/constexpr-vla3.C
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*************** b1566206f932f28f1735fbaf347ef172  gcc/te
*** 15144,15154 ****
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! 501a09c28c6401b7eecb049ba7088ea6  gcc/testsuite/g++.dg/ext/desig10.C
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! 8a4d61a92fbee4d0e21986ff6894ae3e  gcc/testsuite/g++.dg/ext/desig4.C
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--- 16333,16343 ----
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! 6617e79b9b6c10c7fc418ca6174e3580  gcc/testsuite/g++.dg/ext/desig4.C
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*************** eb1675a6ae555aabd96820e386de976c  gcc/te
*** 15194,15200 ****
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--- 16383,16389 ----
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*************** f1c4a8c29985318295579ac9077ee176  gcc/te
*** 15205,15224 ****
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--- 16394,16414 ----
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*************** b861e559b4d837b0c6576827bfaf08ec  gcc/te
*** 15234,15239 ****
--- 16424,16430 ----
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*************** f2cf0baaaf489aa15f22210e07d052d1  gcc/te
*** 15267,15272 ****
--- 16458,16464 ----
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*************** f15c22cabbedb731c2f01e04c0fc9309  gcc/te
*** 15294,15325 ****
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--- 16486,16524 ----
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*************** ee824ccb1d507856d211f7e019df9eb0  gcc/te
*** 15333,15340 ****
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--- 16532,16539 ----
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*************** ddac7a382afa64bc6fab7d0e2248ed55  gcc/te
*** 15387,15392 ****
--- 16586,16593 ----
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*************** b1f2237b354111a738a7ac26e40fca77  gcc/te
*** 15404,15417 ****
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--- 16605,16618 ----
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*************** d104145185fba3180b02bfff96944804  gcc/te
*** 15422,15431 ****
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--- 16623,16635 ----
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  96d325d0b1cb729ac3fd1b3d32a6b67b  gcc/testsuite/g++.dg/ext/sync-3.C
! 8c1a53cd9e4e1b9fb0704282cb179e2b  gcc/testsuite/g++.dg/ext/sync-4.C
! fe2b610653d8cfc25626ade10b9f3f7e  gcc/testsuite/g++.dg/ext/temp-extend1.C
  fd488da65b9de81be655103cb823fd46  gcc/testsuite/g++.dg/ext/timevar1.C
  c24cf794da85348840a86c5ccf862b83  gcc/testsuite/g++.dg/ext/timevar2.C
  b0c4b5418bbb0cea1304a888bae68465  gcc/testsuite/g++.dg/ext/tmplattr1.C
*************** a7fce0dd60f863364affd6e56b7f245e  gcc/te
*** 15475,15482 ****
  56fb8e2b89ccd1554be150dc21820262  gcc/testsuite/g++.dg/ext/uow-2.C
  4a9bbd8b307258097b08718cb2af1df3  gcc/testsuite/g++.dg/ext/uow-3.C
  ed785b06528c5ed0fec073ec7ec447d2  gcc/testsuite/g++.dg/ext/uow-4.C
! ef2ce5aa564e08f0aa815ed10a4d6993  gcc/testsuite/g++.dg/ext/utf-array-short-wchar.C
! 24c20458f0230708b3d2c0aaf0cc656c  gcc/testsuite/g++.dg/ext/utf-array.C
  8489bdb85e5446c128b69c25e8731e24  gcc/testsuite/g++.dg/ext/utf-badconcat.C
  4d3e1e2d76aabbc270bb762c8b9aab48  gcc/testsuite/g++.dg/ext/utf-badconcat2.C
  dc07217be8352750ef7e90618d9a0325  gcc/testsuite/g++.dg/ext/utf-cvt-char8_t.C
--- 16679,16686 ----
  56fb8e2b89ccd1554be150dc21820262  gcc/testsuite/g++.dg/ext/uow-2.C
  4a9bbd8b307258097b08718cb2af1df3  gcc/testsuite/g++.dg/ext/uow-3.C
  ed785b06528c5ed0fec073ec7ec447d2  gcc/testsuite/g++.dg/ext/uow-4.C
! 1d3d5107cdf0f451c7645a2733e24901  gcc/testsuite/g++.dg/ext/utf-array-short-wchar.C
! 029ac868cafa47d257b99808f0dd1707  gcc/testsuite/g++.dg/ext/utf-array.C
  8489bdb85e5446c128b69c25e8731e24  gcc/testsuite/g++.dg/ext/utf-badconcat.C
  4d3e1e2d76aabbc270bb762c8b9aab48  gcc/testsuite/g++.dg/ext/utf-badconcat2.C
  dc07217be8352750ef7e90618d9a0325  gcc/testsuite/g++.dg/ext/utf-cvt-char8_t.C
*************** bb128ce7c4aa022f8046c469bbe3faa3  gcc/te
*** 15497,15509 ****
  6686b865a1c599be2e092145038169cf  gcc/testsuite/g++.dg/ext/utf16-1.C
  1f262acf2497c4af664d97e90a6ac7d2  gcc/testsuite/g++.dg/ext/utf16-2.C
  3d413c1a115fc49a6eed047d62327241  gcc/testsuite/g++.dg/ext/utf16-3.C
! f91f3dd72591e9076b8e07576b305909  gcc/testsuite/g++.dg/ext/utf16-4.C
  354a8b4e8e26ca1df2d8e1c4cd4aec1b  gcc/testsuite/g++.dg/ext/utf32-1.C
  0118e635abdac5b319fea36581048d3a  gcc/testsuite/g++.dg/ext/utf32-2.C
  5b7134f50579f9686c1ed0a58b8d936f  gcc/testsuite/g++.dg/ext/utf32-3.C
! b9405f9e69ba93125655233ee721769d  gcc/testsuite/g++.dg/ext/utf32-4.C
  73cf15ff415e0f535480339569d6a68d  gcc/testsuite/g++.dg/ext/utf8-1.C
! 27a347cfacadc4e979313b40db534f31  gcc/testsuite/g++.dg/ext/utf8-2.C
  33d19c269a9e9108be7e58ebb9f5dba4  gcc/testsuite/g++.dg/ext/va-arg-pack-1.C
  95df36aad68d70ccb06176f4d6386b01  gcc/testsuite/g++.dg/ext/va-arg-pack-2.C
  5767d28306995682901a8025cc09bcf5  gcc/testsuite/g++.dg/ext/va-arg-pack-len-1.C
--- 16701,16713 ----
  6686b865a1c599be2e092145038169cf  gcc/testsuite/g++.dg/ext/utf16-1.C
  1f262acf2497c4af664d97e90a6ac7d2  gcc/testsuite/g++.dg/ext/utf16-2.C
  3d413c1a115fc49a6eed047d62327241  gcc/testsuite/g++.dg/ext/utf16-3.C
! 0a6ef4ab71807d0b2205a2066ff0aee2  gcc/testsuite/g++.dg/ext/utf16-4.C
  354a8b4e8e26ca1df2d8e1c4cd4aec1b  gcc/testsuite/g++.dg/ext/utf32-1.C
  0118e635abdac5b319fea36581048d3a  gcc/testsuite/g++.dg/ext/utf32-2.C
  5b7134f50579f9686c1ed0a58b8d936f  gcc/testsuite/g++.dg/ext/utf32-3.C
! 430f2a31c83573e8cc050fdeea00da45  gcc/testsuite/g++.dg/ext/utf32-4.C
  73cf15ff415e0f535480339569d6a68d  gcc/testsuite/g++.dg/ext/utf8-1.C
! 3364a5c5f070567fdc2d0df9cd80bd73  gcc/testsuite/g++.dg/ext/utf8-2.C
  33d19c269a9e9108be7e58ebb9f5dba4  gcc/testsuite/g++.dg/ext/va-arg-pack-1.C
  95df36aad68d70ccb06176f4d6386b01  gcc/testsuite/g++.dg/ext/va-arg-pack-2.C
  5767d28306995682901a8025cc09bcf5  gcc/testsuite/g++.dg/ext/va-arg-pack-len-1.C
*************** b23df01dd6bcf3a8469032ec56f50cca  gcc/te
*** 15528,15534 ****
  1aca5dc21072214b61a23fc146a7973e  gcc/testsuite/g++.dg/ext/vector22.C
  480e69d3b3cfbaf863bf4572ea33adcc  gcc/testsuite/g++.dg/ext/vector23.C
  082d048149f2f298b6ae5f298da8ebe7  gcc/testsuite/g++.dg/ext/vector24.C
! f006e9fbc60cef8755f4653f8255d665  gcc/testsuite/g++.dg/ext/vector25.C
  90e2e9a7d8de41b91b36e73f97d2d368  gcc/testsuite/g++.dg/ext/vector26.C
  3cf136e3fe2bdc443fd4f83b9b2da48e  gcc/testsuite/g++.dg/ext/vector27.C
  abdeb34b11f4d994523c72c30c39e053  gcc/testsuite/g++.dg/ext/vector28.C
--- 16732,16738 ----
  1aca5dc21072214b61a23fc146a7973e  gcc/testsuite/g++.dg/ext/vector22.C
  480e69d3b3cfbaf863bf4572ea33adcc  gcc/testsuite/g++.dg/ext/vector23.C
  082d048149f2f298b6ae5f298da8ebe7  gcc/testsuite/g++.dg/ext/vector24.C
! 0ef4dacbc69d231f805bc247669d5157  gcc/testsuite/g++.dg/ext/vector25.C
  90e2e9a7d8de41b91b36e73f97d2d368  gcc/testsuite/g++.dg/ext/vector26.C
  3cf136e3fe2bdc443fd4f83b9b2da48e  gcc/testsuite/g++.dg/ext/vector27.C
  abdeb34b11f4d994523c72c30c39e053  gcc/testsuite/g++.dg/ext/vector28.C
*************** c8cc6b1ac116455433fc79d5403b3693  gcc/te
*** 15543,15551 ****
  bc898cae3bed874536a1bd98580d68a7  gcc/testsuite/g++.dg/ext/vector35.C
  abeb7f1800f1c5a18e83e13fb0f1d304  gcc/testsuite/g++.dg/ext/vector36.C
  ff1db1bf54183447b20849ac3c27f4ab  gcc/testsuite/g++.dg/ext/vector37.C
  1d6b45dce331a414b31b64c5104ab383  gcc/testsuite/g++.dg/ext/vector4.C
  3231264b4b96091ab8a2351e76707e8d  gcc/testsuite/g++.dg/ext/vector5.C
! 9dca9632e59d179ee1b85a181a34cae7  gcc/testsuite/g++.dg/ext/vector6.C
  499980717843a208168505a264f263e3  gcc/testsuite/g++.dg/ext/vector7.C
  a92b9bb3a1d4737563cf1b160cd4ebd5  gcc/testsuite/g++.dg/ext/vector8.C
  fffe88367e13ff0ced20543de6b299e6  gcc/testsuite/g++.dg/ext/vector9.C
--- 16747,16757 ----
  bc898cae3bed874536a1bd98580d68a7  gcc/testsuite/g++.dg/ext/vector35.C
  abeb7f1800f1c5a18e83e13fb0f1d304  gcc/testsuite/g++.dg/ext/vector36.C
  ff1db1bf54183447b20849ac3c27f4ab  gcc/testsuite/g++.dg/ext/vector37.C
+ 5c11df1535be5ad9f9d71b5736be9c81  gcc/testsuite/g++.dg/ext/vector38.C
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  1d6b45dce331a414b31b64c5104ab383  gcc/testsuite/g++.dg/ext/vector4.C
  3231264b4b96091ab8a2351e76707e8d  gcc/testsuite/g++.dg/ext/vector5.C
! f630b6880676201345d2e753913e064c  gcc/testsuite/g++.dg/ext/vector6.C
  499980717843a208168505a264f263e3  gcc/testsuite/g++.dg/ext/vector7.C
  a92b9bb3a1d4737563cf1b160cd4ebd5  gcc/testsuite/g++.dg/ext/vector8.C
  fffe88367e13ff0ced20543de6b299e6  gcc/testsuite/g++.dg/ext/vector9.C
*************** f898972c4719f3058c25c921c50c6487  gcc/te
*** 15568,15573 ****
--- 16774,16780 ----
  9f6874b06aea35e844ab40f0f69550c5  gcc/testsuite/g++.dg/ext/visibility/fvisibility-inlines-hidden-2.C
  5c8d17e33f840c89b8d56a22d680b9d1  gcc/testsuite/g++.dg/ext/visibility/fvisibility-inlines-hidden-3.C
  bc5e3935f9fd3f5f54ca89ee581b2c03  gcc/testsuite/g++.dg/ext/visibility/fvisibility-inlines-hidden-4.C
+ 3b9b3a714c4150e9b400e976deff30a3  gcc/testsuite/g++.dg/ext/visibility/fvisibility-inlines-hidden-5.C
  18d8a1310b12aec50bcac70a4583e44d  gcc/testsuite/g++.dg/ext/visibility/fvisibility-inlines-hidden.C
  05621e547003978809101724b30f453e  gcc/testsuite/g++.dg/ext/visibility/fvisibility-override1.C
  da4518aa692947ef4c1cc1de9617e5d0  gcc/testsuite/g++.dg/ext/visibility/fvisibility-override2.C
*************** c701eeb2a89e68678d091a7a01b3cbab  gcc/te
*** 15588,15594 ****
  56d8136e642cb24cb4da8e83e4f943f7  gcc/testsuite/g++.dg/ext/visibility/pragma.C
  14ca1521630ef80a83c404dfb225885d  gcc/testsuite/g++.dg/ext/visibility/prop1.C
  e73aef737d1611387dc8acc194cb682f  gcc/testsuite/g++.dg/ext/visibility/redecl1.C
! ba36532f7394bf55a85728b40f79ce17  gcc/testsuite/g++.dg/ext/visibility/ref-temp1.C
  6014ef7f9e80dffce855a18d78bf2212  gcc/testsuite/g++.dg/ext/visibility/staticdatamem.C
  f557224265cdd5e5b63d2ff669e9cabe  gcc/testsuite/g++.dg/ext/visibility/staticmemfuncts.C
  871b12330fdac390784bb00c45740be6  gcc/testsuite/g++.dg/ext/visibility/symbian1.C
--- 16795,16801 ----
  56d8136e642cb24cb4da8e83e4f943f7  gcc/testsuite/g++.dg/ext/visibility/pragma.C
  14ca1521630ef80a83c404dfb225885d  gcc/testsuite/g++.dg/ext/visibility/prop1.C
  e73aef737d1611387dc8acc194cb682f  gcc/testsuite/g++.dg/ext/visibility/redecl1.C
! 8881ed80c72ae252b2a721d2ac297cfe  gcc/testsuite/g++.dg/ext/visibility/ref-temp1.C
  6014ef7f9e80dffce855a18d78bf2212  gcc/testsuite/g++.dg/ext/visibility/staticdatamem.C
  f557224265cdd5e5b63d2ff669e9cabe  gcc/testsuite/g++.dg/ext/visibility/staticmemfuncts.C
  871b12330fdac390784bb00c45740be6  gcc/testsuite/g++.dg/ext/visibility/symbian1.C
*************** f964b5b8563862b3b5de4077cc1fb8e4  gcc/te
*** 15637,15644 ****
  1fd16437142527242ed46024008b3c50  gcc/testsuite/g++.dg/ext/vla19.C
  83bf1823c9e81467f20ea26043a713e9  gcc/testsuite/g++.dg/ext/vla2.C
  d35e3d499f9c61083c8cc1857f8e1c17  gcc/testsuite/g++.dg/ext/vla20.C
  6aaa10f349349a2417e726c48cb7e61e  gcc/testsuite/g++.dg/ext/vla3.C
! ed33dc2d9d15f2684fe9377a6ae1b33d  gcc/testsuite/g++.dg/ext/vla4.C
  cd0140e3425e97d1c4b919a0ef8b54c3  gcc/testsuite/g++.dg/ext/vla5.C
  d79825729049ae3b1dcd9d8d0f86a9c1  gcc/testsuite/g++.dg/ext/vla6.C
  6ccbf45d9e21a406e0533379ab46ed68  gcc/testsuite/g++.dg/ext/vla7.C
--- 16844,16853 ----
  1fd16437142527242ed46024008b3c50  gcc/testsuite/g++.dg/ext/vla19.C
  83bf1823c9e81467f20ea26043a713e9  gcc/testsuite/g++.dg/ext/vla2.C
  d35e3d499f9c61083c8cc1857f8e1c17  gcc/testsuite/g++.dg/ext/vla20.C
+ 9b6080415288de72842bd85208414ade  gcc/testsuite/g++.dg/ext/vla21.C
+ 0ba2afbdaf6e73dfcd5ff164e2020f97  gcc/testsuite/g++.dg/ext/vla22.C
  6aaa10f349349a2417e726c48cb7e61e  gcc/testsuite/g++.dg/ext/vla3.C
! aaa77e556dd365b972bc30be4df0d443  gcc/testsuite/g++.dg/ext/vla4.C
  cd0140e3425e97d1c4b919a0ef8b54c3  gcc/testsuite/g++.dg/ext/vla5.C
  d79825729049ae3b1dcd9d8d0f86a9c1  gcc/testsuite/g++.dg/ext/vla6.C
  6ccbf45d9e21a406e0533379ab46ed68  gcc/testsuite/g++.dg/ext/vla7.C
*************** a7c093e32d8e0cc08e02c3253748979c  gcc/te
*** 15672,15678 ****
  1daf1c411209223b51591e3ac9090bfb  gcc/testsuite/g++.dg/gcov/gcov-dump-1.C
  7def4ed5b129018a31fbca4ad8fd6300  gcc/testsuite/g++.dg/gcov/gcov-dump-2.C
  7c98164def1e3b4af2573a0cde4a581e  gcc/testsuite/g++.dg/gcov/gcov-threads-1.C
! bfe432150d1fc8fc9b392fc7e80baf73  gcc/testsuite/g++.dg/gcov/gcov.exp
  28167c93ffea74cb328ff3cd087d643a  gcc/testsuite/g++.dg/gcov/gcovpart-12b.C
  25de875469d245ed763e16daa6d3e695  gcc/testsuite/g++.dg/gcov/loop.C
  7d9eee67c3f8041f2ddace387e1df1c2  gcc/testsuite/g++.dg/gcov/pr16855-priority.C
--- 16881,16887 ----
  1daf1c411209223b51591e3ac9090bfb  gcc/testsuite/g++.dg/gcov/gcov-dump-1.C
  7def4ed5b129018a31fbca4ad8fd6300  gcc/testsuite/g++.dg/gcov/gcov-dump-2.C
  7c98164def1e3b4af2573a0cde4a581e  gcc/testsuite/g++.dg/gcov/gcov-threads-1.C
! e8016e64b36ea6f92c155227c4f60b5f  gcc/testsuite/g++.dg/gcov/gcov.exp
  28167c93ffea74cb328ff3cd087d643a  gcc/testsuite/g++.dg/gcov/gcovpart-12b.C
  25de875469d245ed763e16daa6d3e695  gcc/testsuite/g++.dg/gcov/loop.C
  7d9eee67c3f8041f2ddace387e1df1c2  gcc/testsuite/g++.dg/gcov/pr16855-priority.C
*************** c8c006792fd429653df69e08d74da961  gcc/te
*** 15683,15692 ****
  4b51d237aa9bfa5af327e60a92ae443d  gcc/testsuite/g++.dg/gcov/pr88263-2.C
  2256e0b8d2be05ed34e75663798e12c1  gcc/testsuite/g++.dg/gcov/pr88263.C
  7ad2f2c71c908fc0a03c6dc6be0bbd06  gcc/testsuite/g++.dg/gcov/ternary.C
! 1c39d10336e08d66531493f8587a4d5a  gcc/testsuite/g++.dg/goacc-gomp/goacc-gomp.exp
  820844228685ed372375612618b6a716  gcc/testsuite/g++.dg/goacc/data-1.C
  2b70bd2b15144e92ee104c07a8e2bc13  gcc/testsuite/g++.dg/goacc/deviceptr-1.C
! 5ea6efa6e035002147cac1ee813ef77d  gcc/testsuite/g++.dg/goacc/goacc.exp
  e2e937b81f60d45e6f0fbe6cdc7207e4  gcc/testsuite/g++.dg/goacc/reference.C
  18b27d379a2a779f530009ced1114ae3  gcc/testsuite/g++.dg/goacc/routine-1.C
  9be1fd00ad32c627f4396d3b564fad56  gcc/testsuite/g++.dg/goacc/routine-2.C
--- 16892,16904 ----
  4b51d237aa9bfa5af327e60a92ae443d  gcc/testsuite/g++.dg/gcov/pr88263-2.C
  2256e0b8d2be05ed34e75663798e12c1  gcc/testsuite/g++.dg/gcov/pr88263.C
  7ad2f2c71c908fc0a03c6dc6be0bbd06  gcc/testsuite/g++.dg/gcov/ternary.C
! c56c9bc96d6ffb74b370972c513e82d0  gcc/testsuite/g++.dg/goacc-gomp/goacc-gomp.exp
  820844228685ed372375612618b6a716  gcc/testsuite/g++.dg/goacc/data-1.C
+ ab5a2e3886c2a5718ee179f9c9a446ce  gcc/testsuite/g++.dg/goacc/declare-pr94120.C
  2b70bd2b15144e92ee104c07a8e2bc13  gcc/testsuite/g++.dg/goacc/deviceptr-1.C
! 50fb26ed859d201ce4b714967a5c4066  gcc/testsuite/g++.dg/goacc/firstprivate-mappings-1.C
! 46bb9ceeee177c041d50a650267e25d2  gcc/testsuite/g++.dg/goacc/goacc.exp
! 4fb843954b38655551a396240e94dda0  gcc/testsuite/g++.dg/goacc/mdc.C
  e2e937b81f60d45e6f0fbe6cdc7207e4  gcc/testsuite/g++.dg/goacc/reference.C
  18b27d379a2a779f530009ced1114ae3  gcc/testsuite/g++.dg/goacc/routine-1.C
  9be1fd00ad32c627f4396d3b564fad56  gcc/testsuite/g++.dg/goacc/routine-2.C
*************** af26fce137579d8a882aa73c2269b690  gcc/te
*** 15694,15700 ****
  63c7a5fb86ca9e170a766952f0dda797  gcc/testsuite/g++.dg/goacc/tile-1.C
  0f8c6d06e1f378355b0404338dbd037b  gcc/testsuite/g++.dg/gomp/atomic-14.C
  4c00b09b19e9a90c9f90d361477d4f07  gcc/testsuite/g++.dg/gomp/atomic-17.C
! a6f52fae5dd8141708b43456679496c4  gcc/testsuite/g++.dg/gomp/atomic-18.C
  606225c1b31c1bfdda9ae0d47152092b  gcc/testsuite/g++.dg/gomp/atomic-19.C
  cc718339c11b871b3e6364a1a4412ffd  gcc/testsuite/g++.dg/gomp/atomic-5.C
  64f007dc7d84cb3393b19e626e175a25  gcc/testsuite/g++.dg/gomp/atomic-6.C
--- 16906,16912 ----
  63c7a5fb86ca9e170a766952f0dda797  gcc/testsuite/g++.dg/goacc/tile-1.C
  0f8c6d06e1f378355b0404338dbd037b  gcc/testsuite/g++.dg/gomp/atomic-14.C
  4c00b09b19e9a90c9f90d361477d4f07  gcc/testsuite/g++.dg/gomp/atomic-17.C
! 1ca861261dd5cdd3c5786a09fbd6c14a  gcc/testsuite/g++.dg/gomp/atomic-18.C
  606225c1b31c1bfdda9ae0d47152092b  gcc/testsuite/g++.dg/gomp/atomic-19.C
  cc718339c11b871b3e6364a1a4412ffd  gcc/testsuite/g++.dg/gomp/atomic-5.C
  64f007dc7d84cb3393b19e626e175a25  gcc/testsuite/g++.dg/gomp/atomic-6.C
*************** d66c2d955608b28091f45938dce39989  gcc/te
*** 15732,15740 ****
  cd6bf0619b43f5bc63b2d8c757532754  gcc/testsuite/g++.dg/gomp/declare-simd-7.C
  634bd3d929883e4c691a682ea0817a3e  gcc/testsuite/g++.dg/gomp/declare-target-1.C
  afbb2c51ce08bb72df769bd10e2948b8  gcc/testsuite/g++.dg/gomp/declare-target-2.C
  c75b0d654d83deb86c542efca3d79c2b  gcc/testsuite/g++.dg/gomp/depend-1.C
  cdd29f4ee662c46448400d10d8f0535c  gcc/testsuite/g++.dg/gomp/depend-2.C
! 93c5bba38fb39d8736ae551c38fe5df5  gcc/testsuite/g++.dg/gomp/depend-iterator-1.C
  55e3a09904888da975d3d4b76f18d294  gcc/testsuite/g++.dg/gomp/depend-iterator-2.C
  3bb931acb0bb9987aa54258180ee8d8b  gcc/testsuite/g++.dg/gomp/depobj-1.C
  b3a64480fb5bca64c20c44719293a088  gcc/testsuite/g++.dg/gomp/doacross-1.C
--- 16944,16960 ----
  cd6bf0619b43f5bc63b2d8c757532754  gcc/testsuite/g++.dg/gomp/declare-simd-7.C
  634bd3d929883e4c691a682ea0817a3e  gcc/testsuite/g++.dg/gomp/declare-target-1.C
  afbb2c51ce08bb72df769bd10e2948b8  gcc/testsuite/g++.dg/gomp/declare-target-2.C
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  c75b0d654d83deb86c542efca3d79c2b  gcc/testsuite/g++.dg/gomp/depend-1.C
  cdd29f4ee662c46448400d10d8f0535c  gcc/testsuite/g++.dg/gomp/depend-2.C
! fb99d6d7d52ead46e97905bf42cf8877  gcc/testsuite/g++.dg/gomp/depend-iterator-1.C
  55e3a09904888da975d3d4b76f18d294  gcc/testsuite/g++.dg/gomp/depend-iterator-2.C
  3bb931acb0bb9987aa54258180ee8d8b  gcc/testsuite/g++.dg/gomp/depobj-1.C
  b3a64480fb5bca64c20c44719293a088  gcc/testsuite/g++.dg/gomp/doacross-1.C
*************** b0c773d45d10c0af972510732dfd12b4  gcc/te
*** 15753,15759 ****
  b5dd1e3c7e6a1c45e25d9fbbcf82dc0c  gcc/testsuite/g++.dg/gomp/for-19.C
  124228411a0289faecf6d140e979971c  gcc/testsuite/g++.dg/gomp/for-2.C
  206a717a3136f8c1885ed7bf8f9de921  gcc/testsuite/g++.dg/gomp/for-20.C
! a7aeb4a04d9d0da56990791202d4822c  gcc/testsuite/g++.dg/gomp/for-21.C
  9181a87e2f994d63d21b965bd8baf5ad  gcc/testsuite/g++.dg/gomp/for-3.C
  896da2f6ca60aa63f9ce91c6e79ed9ca  gcc/testsuite/g++.dg/gomp/for-4.C
  7d0961bb111cfa6957770269166deae7  gcc/testsuite/g++.dg/gomp/for-5.C
--- 16973,16979 ----
  b5dd1e3c7e6a1c45e25d9fbbcf82dc0c  gcc/testsuite/g++.dg/gomp/for-19.C
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  206a717a3136f8c1885ed7bf8f9de921  gcc/testsuite/g++.dg/gomp/for-20.C
! 2ed89975c1935fb25c9490d94d8b4c40  gcc/testsuite/g++.dg/gomp/for-21.C
  9181a87e2f994d63d21b965bd8baf5ad  gcc/testsuite/g++.dg/gomp/for-3.C
  896da2f6ca60aa63f9ce91c6e79ed9ca  gcc/testsuite/g++.dg/gomp/for-4.C
  7d0961bb111cfa6957770269166deae7  gcc/testsuite/g++.dg/gomp/for-5.C
*************** a7aeb4a04d9d0da56990791202d4822c  gcc/te
*** 15761,15778 ****
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  34eb86e893e0bd796aad8d236b5bc215  gcc/testsuite/g++.dg/gomp/for-9.C
! 55ae7081128d5dcca0ab399174948078  gcc/testsuite/g++.dg/gomp/gomp.exp
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! ebea74eb404af2bf8d1133f66ce94af4  gcc/testsuite/g++.dg/gomp/loop-2.C
  af9aa00aecd9c08bb1bacab6e47db24c  gcc/testsuite/g++.dg/gomp/loop-3.C
! 53c060a89a3065af0eaaf7de7bac022d  gcc/testsuite/g++.dg/gomp/loop-4.C
  a4271cf7824f2a837486e7951ee23884  gcc/testsuite/g++.dg/gomp/macro-1.C
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  942f8defe03c25bf08f780cf22c0a1e5  gcc/testsuite/g++.dg/gomp/macro-3.C
! 3f271d462d27f65afbe5003c58002787  gcc/testsuite/g++.dg/gomp/macro-4.C
  9dff449fe2d97c4b3ade07b982e69364  gcc/testsuite/g++.dg/gomp/master-1.C
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  aec913fefeac6132003dfcbe3fd035eb  gcc/testsuite/g++.dg/gomp/master-3.C
--- 16981,16998 ----
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! fe2e9ca60d004cd7764e38938b60bb3e  gcc/testsuite/g++.dg/gomp/gomp.exp
  eb763d050fd680e1a3302fbda441475d  gcc/testsuite/g++.dg/gomp/lastprivate-1.C
  7f682781cd88149270eb73eb44f419f7  gcc/testsuite/g++.dg/gomp/linear-1.C
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  6dcaf2b099c377baab33fe0ad0e0e268  gcc/testsuite/g++.dg/gomp/loop-1.C
! 0db0b5c5ee97400a4061d2ef2ccb3e62  gcc/testsuite/g++.dg/gomp/loop-2.C
  af9aa00aecd9c08bb1bacab6e47db24c  gcc/testsuite/g++.dg/gomp/loop-3.C
! 84c5a2238f80432c8d0755b414a0d9b8  gcc/testsuite/g++.dg/gomp/loop-4.C
  a4271cf7824f2a837486e7951ee23884  gcc/testsuite/g++.dg/gomp/macro-1.C
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  942f8defe03c25bf08f780cf22c0a1e5  gcc/testsuite/g++.dg/gomp/macro-3.C
! 9254a2c9545e874172464af7e042681f  gcc/testsuite/g++.dg/gomp/macro-4.C
  9dff449fe2d97c4b3ade07b982e69364  gcc/testsuite/g++.dg/gomp/master-1.C
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  aec913fefeac6132003dfcbe3fd035eb  gcc/testsuite/g++.dg/gomp/master-3.C
*************** f4af350e7c840b674d4df142d3432e80  gcc/te
*** 15907,15918 ****
--- 17127,17145 ----
  905a581e462fc775cb2be6623fcacf00  gcc/testsuite/g++.dg/gomp/pr88733.C
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  c1464987d35d87dd8f66e42e5434dd87  gcc/testsuite/g++.dg/gomp/pr89796.C
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  3ceb435fbb695a14bdd86c4f3ecd2307  gcc/testsuite/g++.dg/gomp/pr91118-1.C
  bc8b7b694dfa419e9a5ac679bb294b77  gcc/testsuite/g++.dg/gomp/pr91118-2.C
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  32a827a0f114f3ea9fa6a18789870b5a  gcc/testsuite/g++.dg/gomp/pr92504.C
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  a3f91d106380d3bcaf59045bcf7186c6  gcc/testsuite/g++.dg/gomp/predetermined-1.C
  a6479847f9d522f85cbd16a46d7f9698  gcc/testsuite/g++.dg/gomp/private-1.C
  d447246d410ae61ed9f733998e77b958  gcc/testsuite/g++.dg/gomp/reference-1.C
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  536359d59fc418a1570a6d8574a66ca1  gcc/testsuite/g++.dg/gomp/sections-1.C
  c8fdbed05305ecb29a74eae041f265e9  gcc/testsuite/g++.dg/gomp/sections-2.C
  b72fe99f861779472bd3b1cf3587d478  gcc/testsuite/g++.dg/gomp/sections-3.C
*************** e364244678eabb5fde7dbd8cb1a23102  gcc/te
*** 15930,15936 ****
  926d8449d7242be3abf0b04b4f5a0201  gcc/testsuite/g++.dg/gomp/task-1.C
  35893a5f773c2133df70cf6c3b2593a4  gcc/testsuite/g++.dg/gomp/taskgroup-1.C
  104e3fe5ad79c64aa1ed9ae097073285  gcc/testsuite/g++.dg/gomp/teams-1.C
! 70feacf961fc829e02ab582fc68ea99f  gcc/testsuite/g++.dg/gomp/this-1.C
  6c90d0418afc4d79214d65c1c8937352  gcc/testsuite/g++.dg/gomp/this-2.C
  e413a547924c043723b9ade8080ee072  gcc/testsuite/g++.dg/gomp/tls-1.C
  cd8b1db623a07d865bb9a34cd8affe37  gcc/testsuite/g++.dg/gomp/tls-2.C
--- 17157,17163 ----
  926d8449d7242be3abf0b04b4f5a0201  gcc/testsuite/g++.dg/gomp/task-1.C
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  104e3fe5ad79c64aa1ed9ae097073285  gcc/testsuite/g++.dg/gomp/teams-1.C
! 33fc8a878f4414ba039926e6a9849731  gcc/testsuite/g++.dg/gomp/this-1.C
  6c90d0418afc4d79214d65c1c8937352  gcc/testsuite/g++.dg/gomp/this-2.C
  e413a547924c043723b9ade8080ee072  gcc/testsuite/g++.dg/gomp/tls-1.C
  cd8b1db623a07d865bb9a34cd8affe37  gcc/testsuite/g++.dg/gomp/tls-2.C
*************** eda8d6738cae7ebc85e0ebbf152c0f83  gcc/te
*** 15944,15950 ****
  235db3dbdfd40c1ae460a37179f9c9ca  gcc/testsuite/g++.dg/gomp/tls-wrap4.C
  eec42e78d72ac0bdcf1d2801224c4f42  gcc/testsuite/g++.dg/gomp/tls-wrapper-cse.C
  0df681e6b37edac68ef196b88549a3af  gcc/testsuite/g++.dg/gomp/tpl-atomic-1.C
! bdc8af7d9ba4d4ed0a1d29ab61012fb9  gcc/testsuite/g++.dg/gomp/tpl-atomic-2.C
  a37dc2aba240a63836ffe018660b5576  gcc/testsuite/g++.dg/gomp/tpl-barrier-1.C
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  1d61bc720d46fe83c80881e1450f263f  gcc/testsuite/g++.dg/gomp/tpl-for-2.C
--- 17171,17177 ----
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  0df681e6b37edac68ef196b88549a3af  gcc/testsuite/g++.dg/gomp/tpl-atomic-1.C
! 79934e5ca0b36f912a19a28a2bc6684c  gcc/testsuite/g++.dg/gomp/tpl-atomic-2.C
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  4a4bf7fb6d4865db8fa5a4940198eab3  gcc/testsuite/g++.dg/gomp/tpl-for-1.C
  1d61bc720d46fe83c80881e1450f263f  gcc/testsuite/g++.dg/gomp/tpl-for-2.C
*************** b057b654090f4695277d8c1866894100  gcc/te
*** 15953,15965 ****
  3fe09daf99ddda4ea1fef59c61e34f47  gcc/testsuite/g++.dg/gomp/tpl-parallel-1.C
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  9e724e74b65abd98b17d7ce93dd59b9e  gcc/testsuite/g++.dg/gomp/tpl-target-update.C
! 9eefc3427fb4944cb8f6e6894beed6b0  gcc/testsuite/g++.dg/gomp/udr-1.C
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  8f936f92e4618f6d92d63d32189ab5d4  gcc/testsuite/g++.dg/gomp/udr-3.C
  a10dd83ffd8fea8213e9a3713b91277f  gcc/testsuite/g++.dg/gomp/udr-4.C
  cbb9b7e93953b72bbadec7a3dd5d1de0  gcc/testsuite/g++.dg/gomp/udr-5.C
  432e931e22639a849a7183275e9c7582  gcc/testsuite/g++.dg/gomp/udr-6.C
! ff8b4e5fb978afaa89c94dd714beba63  gcc/testsuite/g++.dg/graphite/graphite.exp
  de81689ffe7845348fd7504b61336c82  gcc/testsuite/g++.dg/graphite/id-1.C
  5c6a1178f4fd620e8792644c534c29f8  gcc/testsuite/g++.dg/graphite/pr39447.C
  266d67267efa84e1ec7b55b895fd2442  gcc/testsuite/g++.dg/graphite/pr41305.C
--- 17180,17193 ----
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  9e724e74b65abd98b17d7ce93dd59b9e  gcc/testsuite/g++.dg/gomp/tpl-target-update.C
! 15a026d9ed91a8def01363b77d9ca4a5  gcc/testsuite/g++.dg/gomp/udr-1.C
  d23c7fcb3b560b7b7a925d5ca6fa6100  gcc/testsuite/g++.dg/gomp/udr-2.C
  8f936f92e4618f6d92d63d32189ab5d4  gcc/testsuite/g++.dg/gomp/udr-3.C
  a10dd83ffd8fea8213e9a3713b91277f  gcc/testsuite/g++.dg/gomp/udr-4.C
  cbb9b7e93953b72bbadec7a3dd5d1de0  gcc/testsuite/g++.dg/gomp/udr-5.C
  432e931e22639a849a7183275e9c7582  gcc/testsuite/g++.dg/gomp/udr-6.C
! b143b6294c19bb76e169a4c5c1a3beb5  gcc/testsuite/g++.dg/gomp/unmappable-1.C
! 4b7956577174dd62405ba527e4b4eec9  gcc/testsuite/g++.dg/graphite/graphite.exp
  de81689ffe7845348fd7504b61336c82  gcc/testsuite/g++.dg/graphite/id-1.C
  5c6a1178f4fd620e8792644c534c29f8  gcc/testsuite/g++.dg/graphite/pr39447.C
  266d67267efa84e1ec7b55b895fd2442  gcc/testsuite/g++.dg/graphite/pr41305.C
*************** dcecc8a81073a9824c153ff083f81a4a  gcc/te
*** 15968,15974 ****
  012194f3f4441fc0dc8fb4ba94a8882b  gcc/testsuite/g++.dg/graphite/pr42681.C
  dfe63b7d52f6d97e04da25f267ac330c  gcc/testsuite/g++.dg/graphite/pr42930.C
  4cf735ba9e5b65e201dbbd4ec916b359  gcc/testsuite/g++.dg/graphite/pr43026.C
! b9d3e2bf4835c243ed130b9ffbf333fc  gcc/testsuite/g++.dg/guality/guality.exp
  2e0a2ac35d8a11426ad1e59f818a5d03  gcc/testsuite/g++.dg/guality/guality.h
  9f6bd16255ea79978f41ff1fd8300ddc  gcc/testsuite/g++.dg/guality/pr46815.C
  be57153d0806c5827262dfc205d1ddd5  gcc/testsuite/g++.dg/guality/pr55541.C
--- 17196,17202 ----
  012194f3f4441fc0dc8fb4ba94a8882b  gcc/testsuite/g++.dg/graphite/pr42681.C
  dfe63b7d52f6d97e04da25f267ac330c  gcc/testsuite/g++.dg/graphite/pr42930.C
  4cf735ba9e5b65e201dbbd4ec916b359  gcc/testsuite/g++.dg/graphite/pr43026.C
! c8700f3b3fdd3b41ff1abbf2a2c0186d  gcc/testsuite/g++.dg/guality/guality.exp
  2e0a2ac35d8a11426ad1e59f818a5d03  gcc/testsuite/g++.dg/guality/guality.h
  9f6bd16255ea79978f41ff1fd8300ddc  gcc/testsuite/g++.dg/guality/pr46815.C
  be57153d0806c5827262dfc205d1ddd5  gcc/testsuite/g++.dg/guality/pr55541.C
*************** be57153d0806c5827262dfc205d1ddd5  gcc/te
*** 15976,15981 ****
--- 17204,17210 ----
  1f6434a711b21741e7f18945125f326d  gcc/testsuite/g++.dg/guality/pr67192.C
  0c2592ea712ffdd8518c042cf08c44f6  gcc/testsuite/g++.dg/guality/pr82630.C
  a4cc053c9d17978de8abeaa091606802  gcc/testsuite/g++.dg/guality/pr86687.C
+ a0dca44ebd71904f8aeb3e055b8d94c7  gcc/testsuite/g++.dg/guality/pr93888.C
  8773744d52f1fedc9192c4b6b54678d9  gcc/testsuite/g++.dg/guality/redeclaration1.C
  d4b1aa612cf9b628d986d19617ad2770  gcc/testsuite/g++.dg/header.C
  176e66df5d6aa9dd76c8fe406b78a370  gcc/testsuite/g++.dg/inherit/access1.C
*************** a9833a51cb156e8d3d578bcfb66c9840  gcc/te
*** 16008,16014 ****
  67641f238f80c6383b7ce6110d58ccb3  gcc/testsuite/g++.dg/inherit/covariant19.C
  1a712ed4a3f761571bfe894372a9032b  gcc/testsuite/g++.dg/inherit/covariant2.C
  3f2664dc416902abf3e84a4d95de8f7a  gcc/testsuite/g++.dg/inherit/covariant20.C
! 3b17afe813a33607cf98920580202062  gcc/testsuite/g++.dg/inherit/covariant21.C
  b0fbc509fc3009c704d9abec3ca8be74  gcc/testsuite/g++.dg/inherit/covariant22.C
  24ff947b4da8f1fcee6c7b66d8388009  gcc/testsuite/g++.dg/inherit/covariant3.C
  8c6bb6aaa56fa2bea8b375c52fab5688  gcc/testsuite/g++.dg/inherit/covariant4.C
--- 17237,17243 ----
  67641f238f80c6383b7ce6110d58ccb3  gcc/testsuite/g++.dg/inherit/covariant19.C
  1a712ed4a3f761571bfe894372a9032b  gcc/testsuite/g++.dg/inherit/covariant2.C
  3f2664dc416902abf3e84a4d95de8f7a  gcc/testsuite/g++.dg/inherit/covariant20.C
! 56d1ed6d9e40e8f5de8809e9aeccf1dd  gcc/testsuite/g++.dg/inherit/covariant21.C
  b0fbc509fc3009c704d9abec3ca8be74  gcc/testsuite/g++.dg/inherit/covariant22.C
  24ff947b4da8f1fcee6c7b66d8388009  gcc/testsuite/g++.dg/inherit/covariant3.C
  8c6bb6aaa56fa2bea8b375c52fab5688  gcc/testsuite/g++.dg/inherit/covariant4.C
*************** d6728c160968c11c85593017e8436bec  gcc/te
*** 16081,16086 ****
--- 17310,17316 ----
  599419bfac4cb1eafaf6497066c6361e  gcc/testsuite/g++.dg/inherit/virtual11.C
  388522e6f12ed4b010648b548c66a1b6  gcc/testsuite/g++.dg/inherit/virtual12.C
  cb86e64ab41b8a5f64a68e42134eb849  gcc/testsuite/g++.dg/inherit/virtual13.C
+ 5fdfbd638062b0c6b4b3cecc4948fe33  gcc/testsuite/g++.dg/inherit/virtual14.C
  97a2f1a9fc23a8a008f5567cb6bbefa7  gcc/testsuite/g++.dg/inherit/virtual2.C
  88e3f23768b2dfe530d163660b058796  gcc/testsuite/g++.dg/inherit/virtual3.C
  b7f032736331f1ff851d46fe5aef118a  gcc/testsuite/g++.dg/inherit/virtual4.C
*************** e60e83c6b0fade38651db5ca7efb41c1  gcc/te
*** 16096,16101 ****
--- 17326,17332 ----
  a31e2bf200a372c568a40cc3a4bcfe53  gcc/testsuite/g++.dg/init/aggr11.C
  6cd6ab8e0f69d00cb3e2b7e6e23c5e85  gcc/testsuite/g++.dg/init/aggr12.C
  ffc79e54be3c4de73d41f5506278d717  gcc/testsuite/g++.dg/init/aggr13.C
+ aacbd487f9d3f5d3e89885788e54012c  gcc/testsuite/g++.dg/init/aggr14.C
  a79ad2e50ca8d0ab6dd5b27254f204b5  gcc/testsuite/g++.dg/init/aggr2.C
  9f0814e4f47903c340ece647e3a040fa  gcc/testsuite/g++.dg/init/aggr3.C
  78d872d27441b5eb9867a5feae7ce0f6  gcc/testsuite/g++.dg/init/aggr4.C
*************** cf7a09cc35d90ab53aa78b61324a89ff  gcc/te
*** 16125,16131 ****
  cd3850e151894462d2f417f022f58b7c  gcc/testsuite/g++.dg/init/array25.C
  5f26b794d27564d1f002c6a0cd333681  gcc/testsuite/g++.dg/init/array26.C
  30e0ae9123ab7bb807c4503c3a24b828  gcc/testsuite/g++.dg/init/array27.C
! 93d1f2b22f375dea4f3b14687d2d2b73  gcc/testsuite/g++.dg/init/array28.C
  0212d2961b78684e39260cc7bf7ae66a  gcc/testsuite/g++.dg/init/array3.C
  cf61432d9f6af13d42de3b054c64bb90  gcc/testsuite/g++.dg/init/array30.C
  d66c992a20c3561fa8622cdd1936d442  gcc/testsuite/g++.dg/init/array31.C
--- 17356,17362 ----
  cd3850e151894462d2f417f022f58b7c  gcc/testsuite/g++.dg/init/array25.C
  5f26b794d27564d1f002c6a0cd333681  gcc/testsuite/g++.dg/init/array26.C
  30e0ae9123ab7bb807c4503c3a24b828  gcc/testsuite/g++.dg/init/array27.C
! 31f8d8fbbffb74c0f4ff150f89760941  gcc/testsuite/g++.dg/init/array28.C
  0212d2961b78684e39260cc7bf7ae66a  gcc/testsuite/g++.dg/init/array3.C
  cf61432d9f6af13d42de3b054c64bb90  gcc/testsuite/g++.dg/init/array30.C
  d66c992a20c3561fa8622cdd1936d442  gcc/testsuite/g++.dg/init/array31.C
*************** a701d12a48efcb4c04b1d49b009e3518  gcc/te
*** 16156,16161 ****
--- 17387,17395 ----
  ff481167daacdca90c86f58cab288895  gcc/testsuite/g++.dg/init/array54.C
  7a6b8f6bf545e055ab066cc6bc5e869b  gcc/testsuite/g++.dg/init/array55.C
  e7a4920eaa905e671e74b6482c654721  gcc/testsuite/g++.dg/init/array56.C
+ 0f351bb088edbe4064e046219a7bb9f8  gcc/testsuite/g++.dg/init/array57.C
+ 9f4936c6c43f83107b24fe0d4675180e  gcc/testsuite/g++.dg/init/array58.C
+ 75ec5b148dcbeb2412d88d1fcfb89b82  gcc/testsuite/g++.dg/init/array59.C
  12f516d0ef7088644b46185bbd83ef4d  gcc/testsuite/g++.dg/init/array6.C
  02cf876b0b0d2594118addc046b9112a  gcc/testsuite/g++.dg/init/array7.C
  4ab5bb9dc38b78d749ba584adefbdc33  gcc/testsuite/g++.dg/init/array8.C
*************** ecc9c501210a7d0fcb63a6b4e75e71ee  gcc/te
*** 16215,16225 ****
  2c3e5a9bb93285c3f11607173fad5f0e  gcc/testsuite/g++.dg/init/ctor7.C
  67dca0fc005a3bf84868664f2897a92e  gcc/testsuite/g++.dg/init/ctor8.C
  c55d67e7ef83de8fc0fa30f01b68f5f7  gcc/testsuite/g++.dg/init/ctor9.C
! e7db9840c6dd49e07956eb905e19773e  gcc/testsuite/g++.dg/init/delete1.C
  468ee3e464fecbec120056e490e0ffe4  gcc/testsuite/g++.dg/init/delete2.C
  1e8eac418e9a6794591435e6f4346a97  gcc/testsuite/g++.dg/init/delete3.C
! b34354a9fccb98f99f3ac0bc14d8f157  gcc/testsuite/g++.dg/init/dso_handle1.C
! e951c3480b33e9aad942efea284f5937  gcc/testsuite/g++.dg/init/dso_handle2.C
  0282b33cfb0b201499908c95a2e9b57d  gcc/testsuite/g++.dg/init/dtor1.C
  aa6675ad7ca1b7ce6a63c598c59f89a0  gcc/testsuite/g++.dg/init/dtor2.C
  5f5e01bbe7cb4844fd36654728665aa4  gcc/testsuite/g++.dg/init/dtor3.C
--- 17449,17459 ----
  2c3e5a9bb93285c3f11607173fad5f0e  gcc/testsuite/g++.dg/init/ctor7.C
  67dca0fc005a3bf84868664f2897a92e  gcc/testsuite/g++.dg/init/ctor8.C
  c55d67e7ef83de8fc0fa30f01b68f5f7  gcc/testsuite/g++.dg/init/ctor9.C
! 4252d0c5002398ece95fee29e3cd2c0e  gcc/testsuite/g++.dg/init/delete1.C
  468ee3e464fecbec120056e490e0ffe4  gcc/testsuite/g++.dg/init/delete2.C
  1e8eac418e9a6794591435e6f4346a97  gcc/testsuite/g++.dg/init/delete3.C
! 6397e70e81dad7f42c086d6457110fb8  gcc/testsuite/g++.dg/init/dso_handle1.C
! 247663aa181cc3911b484b28ff590334  gcc/testsuite/g++.dg/init/dso_handle2.C
  0282b33cfb0b201499908c95a2e9b57d  gcc/testsuite/g++.dg/init/dtor1.C
  aa6675ad7ca1b7ce6a63c598c59f89a0  gcc/testsuite/g++.dg/init/dtor2.C
  5f5e01bbe7cb4844fd36654728665aa4  gcc/testsuite/g++.dg/init/dtor3.C
*************** a2c1054568281f6408f992ee29e5680b  gcc/te
*** 16252,16258 ****
  c2e29d2071e0ec0563f5e74c45da4ecd  gcc/testsuite/g++.dg/init/init-ref2.C
  c9be9788e0023890c93cbcdd3e3bcbd1  gcc/testsuite/g++.dg/init/init-ref3.C
  3f1579f55c69e948c03b96707c703c8c  gcc/testsuite/g++.dg/init/init-ref4.C
! 338f5c38e5a3f190b4b5ce661928b840  gcc/testsuite/g++.dg/init/initializer-string-too-long.C
  f9ead90e4d5cffd123ae313927303782  gcc/testsuite/g++.dg/init/inline1.C
  0867c022db8ad55482b727ba001b7cf2  gcc/testsuite/g++.dg/init/lifetime1.C
  9a639b6aec30981f552d544b9c3373f3  gcc/testsuite/g++.dg/init/lifetime2.C
--- 17486,17492 ----
  c2e29d2071e0ec0563f5e74c45da4ecd  gcc/testsuite/g++.dg/init/init-ref2.C
  c9be9788e0023890c93cbcdd3e3bcbd1  gcc/testsuite/g++.dg/init/init-ref3.C
  3f1579f55c69e948c03b96707c703c8c  gcc/testsuite/g++.dg/init/init-ref4.C
! 62c7823a3b5456e0e43a39750ffb4cf5  gcc/testsuite/g++.dg/init/initializer-string-too-long.C
  f9ead90e4d5cffd123ae313927303782  gcc/testsuite/g++.dg/init/inline1.C
  0867c022db8ad55482b727ba001b7cf2  gcc/testsuite/g++.dg/init/lifetime1.C
  9a639b6aec30981f552d544b9c3373f3  gcc/testsuite/g++.dg/init/lifetime2.C
*************** d1771050ed51b5b528a1d2e25c932df1  gcc/te
*** 16296,16302 ****
  5820f2c8665ae379ada4b0966210eb15  gcc/testsuite/g++.dg/init/new40.C
  cbd73e68a7e047fb1fead38045398b76  gcc/testsuite/g++.dg/init/new41.C
  d11503933ddf4a9a5fa720f05ff832e4  gcc/testsuite/g++.dg/init/new42.C
! 238b60214ccd4b8aa2947472a2229602  gcc/testsuite/g++.dg/init/new43.C
  5267004e814a23375247fdcc80a3d987  gcc/testsuite/g++.dg/init/new44.C
  d2d77d6c719441f941b5b510dcb137a2  gcc/testsuite/g++.dg/init/new45.C
  d15f6f1dc25618b84c64325897aefd35  gcc/testsuite/g++.dg/init/new46.C
--- 17530,17536 ----
  5820f2c8665ae379ada4b0966210eb15  gcc/testsuite/g++.dg/init/new40.C
  cbd73e68a7e047fb1fead38045398b76  gcc/testsuite/g++.dg/init/new41.C
  d11503933ddf4a9a5fa720f05ff832e4  gcc/testsuite/g++.dg/init/new42.C
! 4c322b0cc937d75127552f528e31fbab  gcc/testsuite/g++.dg/init/new43.C
  5267004e814a23375247fdcc80a3d987  gcc/testsuite/g++.dg/init/new44.C
  d2d77d6c719441f941b5b510dcb137a2  gcc/testsuite/g++.dg/init/new45.C
  d15f6f1dc25618b84c64325897aefd35  gcc/testsuite/g++.dg/init/new46.C
*************** e6aa309a87de688020673480763c4211  gcc/te
*** 16330,16336 ****
  47bced0af8605e929d7e7f6148cc59e6  gcc/testsuite/g++.dg/init/pr35878_3.C
  130a8c69db344833b83e331574b3fd38  gcc/testsuite/g++.dg/init/pr35878_4.C
  624e9f796f15d614e6a391af843914f4  gcc/testsuite/g++.dg/init/pr42556.C
! 066f1cead171149587cf59897ebf0fb8  gcc/testsuite/g++.dg/init/pr42844.C
  f1538253537779bf466c8d9c117f1ee9  gcc/testsuite/g++.dg/init/pr43064-1.C
  70ed9e061ee1cb44f807f10567f1ff1a  gcc/testsuite/g++.dg/init/pr43064-2.C
  24b4ea9d126b54359f2cc64275eba9a5  gcc/testsuite/g++.dg/init/pr43064-3.C
--- 17564,17570 ----
  47bced0af8605e929d7e7f6148cc59e6  gcc/testsuite/g++.dg/init/pr35878_3.C
  130a8c69db344833b83e331574b3fd38  gcc/testsuite/g++.dg/init/pr35878_4.C
  624e9f796f15d614e6a391af843914f4  gcc/testsuite/g++.dg/init/pr42556.C
! 481b19d9fc272818d50f088ce1bf201c  gcc/testsuite/g++.dg/init/pr42844.C
  f1538253537779bf466c8d9c117f1ee9  gcc/testsuite/g++.dg/init/pr43064-1.C
  70ed9e061ee1cb44f807f10567f1ff1a  gcc/testsuite/g++.dg/init/pr43064-2.C
  24b4ea9d126b54359f2cc64275eba9a5  gcc/testsuite/g++.dg/init/pr43064-3.C
*************** b5056183793160d509fa082d596ab38f  gcc/te
*** 16368,16374 ****
  4e77248465fbd1b66fa4dc5de150451c  gcc/testsuite/g++.dg/init/ref15.C
  f44963a0cd9c1736b28dd8d5a81a4a94  gcc/testsuite/g++.dg/init/ref16.C
  61cc30ef4dd5f1a079dafd8b1d39caea  gcc/testsuite/g++.dg/init/ref17.C
! 414d55614739b2926c1121746254a89a  gcc/testsuite/g++.dg/init/ref18.C
  b94b728d56c18f6b3e612659d5e94b67  gcc/testsuite/g++.dg/init/ref19.C
  753ffddceb5ce125cebb945a65a73cdf  gcc/testsuite/g++.dg/init/ref2.C
  559e18af649d0930e65e2663f043609b  gcc/testsuite/g++.dg/init/ref20.C
--- 17602,17608 ----
  4e77248465fbd1b66fa4dc5de150451c  gcc/testsuite/g++.dg/init/ref15.C
  f44963a0cd9c1736b28dd8d5a81a4a94  gcc/testsuite/g++.dg/init/ref16.C
  61cc30ef4dd5f1a079dafd8b1d39caea  gcc/testsuite/g++.dg/init/ref17.C
! aa9afa43dbff08527b87573c695ece6a  gcc/testsuite/g++.dg/init/ref18.C
  b94b728d56c18f6b3e612659d5e94b67  gcc/testsuite/g++.dg/init/ref19.C
  753ffddceb5ce125cebb945a65a73cdf  gcc/testsuite/g++.dg/init/ref2.C
  559e18af649d0930e65e2663f043609b  gcc/testsuite/g++.dg/init/ref20.C
*************** c83b7aed233d6150603f6551e858ddf3  gcc/te
*** 16383,16389 ****
  9c3b8c9a5fc41b1c5f481bc06906695f  gcc/testsuite/g++.dg/init/ref8.C
  ded575d1c35757dbf89f635e5a86910d  gcc/testsuite/g++.dg/init/ref9.C
  14fd5d851c700287b535c91b481fe0cf  gcc/testsuite/g++.dg/init/reference1.C
! 50714c8215b0dcc5d08994acb9b35232  gcc/testsuite/g++.dg/init/reference2.C
  f6b622b8df1f9be4adbfe05e8d8ddbdc  gcc/testsuite/g++.dg/init/reference3.C
  7d8b7ff14410173fd3e1cb0594f72583  gcc/testsuite/g++.dg/init/save1.C
  a48726a2b65855eb8c52e41df2fe8018  gcc/testsuite/g++.dg/init/self1.C
--- 17617,17623 ----
  9c3b8c9a5fc41b1c5f481bc06906695f  gcc/testsuite/g++.dg/init/ref8.C
  ded575d1c35757dbf89f635e5a86910d  gcc/testsuite/g++.dg/init/ref9.C
  14fd5d851c700287b535c91b481fe0cf  gcc/testsuite/g++.dg/init/reference1.C
! 17e490cb39fc984204cd22db2b70a409  gcc/testsuite/g++.dg/init/reference2.C
  f6b622b8df1f9be4adbfe05e8d8ddbdc  gcc/testsuite/g++.dg/init/reference3.C
  7d8b7ff14410173fd3e1cb0594f72583  gcc/testsuite/g++.dg/init/save1.C
  a48726a2b65855eb8c52e41df2fe8018  gcc/testsuite/g++.dg/init/self1.C
*************** eac75da8029ebf097e358f87837418c2  gcc/te
*** 16394,16399 ****
--- 17628,17634 ----
  5790ab7ca9ca7303a8c59f3dbcb9058e  gcc/testsuite/g++.dg/init/static2.C
  004975a4245800f0c34b34b9565fc427  gcc/testsuite/g++.dg/init/static3.C
  4e0fdfa0a67cd3c3e1f1a9752829fecf  gcc/testsuite/g++.dg/init/static4.C
+ 63731a73e8fc9516a86683fa96522909  gcc/testsuite/g++.dg/init/static5.C
  8b181745d241d484dd529391acd12c57  gcc/testsuite/g++.dg/init/string1.C
  1f2f25119a1894dd17a5a18eddf879f2  gcc/testsuite/g++.dg/init/string2.C
  eb0ab4cca242bde3c7961959702f4e12  gcc/testsuite/g++.dg/init/string3.C
*************** e4ace0ef4caaae06eef685ccaefd464e  gcc/te
*** 16427,16433 ****
  6a507132cbee807fabd3c9dfd0f81093  gcc/testsuite/g++.dg/init/volatile1.C
  f98e7ab2646951eca57b37b0ade8c12a  gcc/testsuite/g++.dg/init/volatile2.C
  181d03bf17027cab97eb47736f11ff30  gcc/testsuite/g++.dg/ipa/20090113-1.C
! 1d89cf17ea9693f5e30feb14873dea5f  gcc/testsuite/g++.dg/ipa/comdat.C
  a24ea6f9a49499ad011b5a9d37c49be4  gcc/testsuite/g++.dg/ipa/devirt-1.C
  ca15311ea1da0659039c9b25689b0b27  gcc/testsuite/g++.dg/ipa/devirt-10.C
  9b5d9c88e0cc585e7445c4377ac387a4  gcc/testsuite/g++.dg/ipa/devirt-11.C
--- 17662,17668 ----
  6a507132cbee807fabd3c9dfd0f81093  gcc/testsuite/g++.dg/init/volatile1.C
  f98e7ab2646951eca57b37b0ade8c12a  gcc/testsuite/g++.dg/init/volatile2.C
  181d03bf17027cab97eb47736f11ff30  gcc/testsuite/g++.dg/ipa/20090113-1.C
! 2f1245a911a2b5cfbd1fc3f646e437f3  gcc/testsuite/g++.dg/ipa/comdat.C
  a24ea6f9a49499ad011b5a9d37c49be4  gcc/testsuite/g++.dg/ipa/devirt-1.C
  ca15311ea1da0659039c9b25689b0b27  gcc/testsuite/g++.dg/ipa/devirt-10.C
  9b5d9c88e0cc585e7445c4377ac387a4  gcc/testsuite/g++.dg/ipa/devirt-11.C
*************** e56f74042aa8aa5dbbb9f60f5673507c  gcc/te
*** 16438,16444 ****
  a3ef5649648039007c89bf5cb9fe814b  gcc/testsuite/g++.dg/ipa/devirt-16.C
  6dcf4578bc9c92f114c8c61ef2660571  gcc/testsuite/g++.dg/ipa/devirt-17.C
  4b23a4e562c19810f0c55f0817916933  gcc/testsuite/g++.dg/ipa/devirt-18.C
! baa239f9850100d3f6bb02dff4eb0b37  gcc/testsuite/g++.dg/ipa/devirt-19.C
  bf854bda030a1dd51eb37b4771a0dcb3  gcc/testsuite/g++.dg/ipa/devirt-2.C
  38cc93e595d53663e7624f3bf745ba39  gcc/testsuite/g++.dg/ipa/devirt-20.C
  67e019ff1f3d279e2c6b5f223b061ebc  gcc/testsuite/g++.dg/ipa/devirt-21.C
--- 17673,17679 ----
  a3ef5649648039007c89bf5cb9fe814b  gcc/testsuite/g++.dg/ipa/devirt-16.C
  6dcf4578bc9c92f114c8c61ef2660571  gcc/testsuite/g++.dg/ipa/devirt-17.C
  4b23a4e562c19810f0c55f0817916933  gcc/testsuite/g++.dg/ipa/devirt-18.C
! 3d9202965ff74415b8d9d5ceecfec714  gcc/testsuite/g++.dg/ipa/devirt-19.C
  bf854bda030a1dd51eb37b4771a0dcb3  gcc/testsuite/g++.dg/ipa/devirt-2.C
  38cc93e595d53663e7624f3bf745ba39  gcc/testsuite/g++.dg/ipa/devirt-20.C
  67e019ff1f3d279e2c6b5f223b061ebc  gcc/testsuite/g++.dg/ipa/devirt-21.C
*************** fc38ff8896f0722b271df69cdb4d61c5  gcc/te
*** 16487,16493 ****
  66fc1acee659c21a80900278dc4e5398  gcc/testsuite/g++.dg/ipa/devirt-c-4.C
  ad089602076d0837c4e1b41303e15c92  gcc/testsuite/g++.dg/ipa/devirt-c-5.C
  f2bb748502e340561bce6eaed7285e91  gcc/testsuite/g++.dg/ipa/devirt-c-6.C
! a1f205898cc7b2a891538d462ccd2ee1  gcc/testsuite/g++.dg/ipa/devirt-c-7.C
  96547d414ddcee7b8c53a3e7bed9e59d  gcc/testsuite/g++.dg/ipa/devirt-c-8.C
  8c656947335d6be6c04696553802a105  gcc/testsuite/g++.dg/ipa/devirt-d-1.C
  4406d59d0f2094c0587885efeadf3625  gcc/testsuite/g++.dg/ipa/devirt-g-1.C
--- 17722,17728 ----
  66fc1acee659c21a80900278dc4e5398  gcc/testsuite/g++.dg/ipa/devirt-c-4.C
  ad089602076d0837c4e1b41303e15c92  gcc/testsuite/g++.dg/ipa/devirt-c-5.C
  f2bb748502e340561bce6eaed7285e91  gcc/testsuite/g++.dg/ipa/devirt-c-6.C
! 1adebcf8df140a84b0799a2454f76f1b  gcc/testsuite/g++.dg/ipa/devirt-c-7.C
  96547d414ddcee7b8c53a3e7bed9e59d  gcc/testsuite/g++.dg/ipa/devirt-c-8.C
  8c656947335d6be6c04696553802a105  gcc/testsuite/g++.dg/ipa/devirt-d-1.C
  4406d59d0f2094c0587885efeadf3625  gcc/testsuite/g++.dg/ipa/devirt-g-1.C
*************** ed2ebadecdee89ff7f0834345b5ae2e8  gcc/te
*** 16500,16520 ****
  dec5937371d1df40c00adcd2a4fe5793  gcc/testsuite/g++.dg/ipa/inline-2.C
  3f7c2518e8312e41b7a0d31455313ef9  gcc/testsuite/g++.dg/ipa/inline-3.C
  af1630ba13bdbd20938ab0c47a373b5a  gcc/testsuite/g++.dg/ipa/ipa-icf-1.C
! ff6c1211f2b8e11b7cd2c39e763ec2ff  gcc/testsuite/g++.dg/ipa/ipa-icf-2.C
! 3826a0cb9444184baa177c523ead264f  gcc/testsuite/g++.dg/ipa/ipa-icf-3.C
! 35a9bd82508a83c2c413e8515466b7ce  gcc/testsuite/g++.dg/ipa/ipa-icf-4.C
  890af13d278e4e0706986dbc2c5a1884  gcc/testsuite/g++.dg/ipa/ipa-icf-5.C
! 97e97070da1c97a8b6352ba2dbe100c3  gcc/testsuite/g++.dg/ipa/ipa-icf-6.C
  baa7a26fbd7f93011660ae486b2d5a03  gcc/testsuite/g++.dg/ipa/ipa-pta-1.C
  10ce8060f456afad572b21a436f24c5c  gcc/testsuite/g++.dg/ipa/ipa-pta-2.C
! dce8034edae4f3ebb13a737d288cc800  gcc/testsuite/g++.dg/ipa/ivinline-1.C
! 394623fa3c8fc8afefe76c7e05bcd23d  gcc/testsuite/g++.dg/ipa/ivinline-2.C
! 4ade5754b9cadd69737394051664462b  gcc/testsuite/g++.dg/ipa/ivinline-3.C
! f0c81f367f9923adc5910994965c4e75  gcc/testsuite/g++.dg/ipa/ivinline-4.C
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--- 17735,17758 ----
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! d006a1cb4b42713f1a4e2c48ea89a5ef  gcc/testsuite/g++.dg/ipa/ivinline-1.C
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! 2b579f9c8cd3abef21905cb01ba2edc8  gcc/testsuite/g++.dg/ipa/ivinline-3.C
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! 8def0aa2239b2d3367a18d8225e1736f  gcc/testsuite/g++.dg/ipa/ivinline-5.C
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  02f3704c0511b2d171c55dbf09c64325  gcc/testsuite/g++.dg/ipa/pr43695.C
*************** b600f6a6c38f9918243512d82a0540ce  gcc/te
*** 16565,16571 ****
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--- 17803,17809 ----
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*************** cd3bfd7464a01a39c5f262829629741b  gcc/te
*** 16607,16613 ****
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! 41efb0acc4defb517c337f66fa617ed6  gcc/testsuite/g++.dg/ipa/pr81248.C
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--- 17845,17851 ----
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*************** d31daabe5d2bb29c818c1bbbe31a5a4b  gcc/te
*** 16618,16630 ****
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--- 17856,17878 ----
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*************** ab5c5a242a635b12bd7f567d048700f4  gcc/te
*** 16670,16694 ****
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  87ac0cba730fa2909e8184bae7c4af1e  gcc/testsuite/g++.dg/lookup/duperr1.C
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  c961035d55063ab35ff011e8098d8ea9  gcc/testsuite/g++.dg/lookup/forscope1.C
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  f095afdbf961d01e5ac006fff4dbda02  gcc/testsuite/g++.dg/lookup/friend1.C
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--- 17918,17944 ----
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  ccab72a94f83e4faee9a4214315c3e87  gcc/testsuite/g++.dg/lookup/empty.h
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  fa4085de6910c10ab0b36d78605a13ba  gcc/testsuite/g++.dg/lookup/exception1.C
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! 16a3850e9d48d6307623ac0730522dd5  gcc/testsuite/g++.dg/lookup/extern-c-redecl6.C
! 8edbcd92c87ea5d2359ce61b0d93f861  gcc/testsuite/g++.dg/lookup/extern-c-static1.C
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  c961035d55063ab35ff011e8098d8ea9  gcc/testsuite/g++.dg/lookup/forscope1.C
  a456249cabb4263894413ab00792e156  gcc/testsuite/g++.dg/lookup/forscope2.C
  f095afdbf961d01e5ac006fff4dbda02  gcc/testsuite/g++.dg/lookup/friend1.C
  6379d610cdb9d3f95e70e88bdbaf87f7  gcc/testsuite/g++.dg/lookup/friend10.C
  20170e184fe22689b9a43c017d45efad  gcc/testsuite/g++.dg/lookup/friend11.C
! 90aa4f6ce3fb1df116b636c510e11af2  gcc/testsuite/g++.dg/lookup/friend12.C
  d5d8f8802b06ec8909b759d46c8931c7  gcc/testsuite/g++.dg/lookup/friend13.C
  12ea946975f9ac153ba628a157f55a5a  gcc/testsuite/g++.dg/lookup/friend14.C
  28e2ce08101f172201fae40376cee3c3  gcc/testsuite/g++.dg/lookup/friend15.C
*************** acece40c5f32aaa3b38f954b91368d3c  gcc/te
*** 16765,16770 ****
--- 18015,18021 ----
  747d4e43728357e44238bb23680126e8  gcc/testsuite/g++.dg/lookup/missing-std-include-6.C
  3d220622c3cf94c2c856e98e299989ef  gcc/testsuite/g++.dg/lookup/missing-std-include-7.C
  e79584d4c910c70ebcefcd854ff0809f  gcc/testsuite/g++.dg/lookup/missing-std-include-8.C
+ 5f6a913bae178177d5d38172197daa0e  gcc/testsuite/g++.dg/lookup/missing-std-include-9.C
  ecb804007c1fa8a878d2197cb35a2d89  gcc/testsuite/g++.dg/lookup/missing-std-include.C
  6c99bf6f0c2260471ad74e39e36cdf71  gcc/testsuite/g++.dg/lookup/name-clash1.C
  51f1b95d6c879739a8fae563ede188d0  gcc/testsuite/g++.dg/lookup/name-clash10.C
*************** f73a831dbfcd6430b723ed4198037c98  gcc/te
*** 16786,16799 ****
  8fad00e146fe0525b4a78080a95a7ca8  gcc/testsuite/g++.dg/lookup/ns2.C
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! 2ddc73877ee8726480b98b6b881569b6  gcc/testsuite/g++.dg/lookup/pr21802.C
  2378e813c805e961b5f594f4a76ec56d  gcc/testsuite/g++.dg/lookup/pr60994.C
  e8c219b570d08e589efca8f832a6b0b3  gcc/testsuite/g++.dg/lookup/pr67074.C
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  2c191df54b26c9a8ae07db9ea72267fc  gcc/testsuite/g++.dg/lookup/pr77549.C
  64b272011bdda1340d422fdc53bc678a  gcc/testsuite/g++.dg/lookup/pr79377.C
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  ed8fbd78bcc2e25f56f4b46841242626  gcc/testsuite/g++.dg/lookup/pr80891-1.C
  f1733e79f7cd811d7c156dc2ca948be1  gcc/testsuite/g++.dg/lookup/pr80891-2.C
  4225629262d07739e4d67b593b2c11fe  gcc/testsuite/g++.dg/lookup/pr80891-3.C
--- 18037,18049 ----
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  326caa0ef916da51fec348c662a91f18  gcc/testsuite/g++.dg/lookup/ns3.C
  b16d2b44bfa0aeed86e99a04f412703d  gcc/testsuite/g++.dg/lookup/ns4.C
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  2c191df54b26c9a8ae07db9ea72267fc  gcc/testsuite/g++.dg/lookup/pr77549.C
  64b272011bdda1340d422fdc53bc678a  gcc/testsuite/g++.dg/lookup/pr79377.C
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  f1733e79f7cd811d7c156dc2ca948be1  gcc/testsuite/g++.dg/lookup/pr80891-2.C
  4225629262d07739e4d67b593b2c11fe  gcc/testsuite/g++.dg/lookup/pr80891-3.C
*************** d342db9fb18156df9393faba58928d3b  gcc/te
*** 16805,16814 ****
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--- 18055,18065 ----
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*************** b0d2b85719be4698bf6dbe4c553cb0fc  gcc/te
*** 16821,16827 ****
--- 18072,18080 ----
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*************** d0e63df38adea95bde4f29a4a8adbd7a  gcc/te
*** 16837,16842 ****
--- 18090,18096 ----
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*************** a37f284dd65a3609bf1db28414d17c25  gcc/te
*** 16888,16894 ****
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--- 18142,18148 ----
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*************** e6b9eddad8d672688c883ca8af446a66  gcc/te
*** 16902,16908 ****
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--- 18156,18162 ----
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*************** c215c3d00f87b59d1c59614eaf8713ea  gcc/te
*** 16911,16917 ****
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--- 18165,18173 ----
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*************** c5ec0fe447ed752a2a467af98347987e  gcc/te
*** 17040,17048 ****
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--- 18296,18314 ----
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*************** bfd98e8d03e6586d60097e11287306c0  gcc/te
*** 17053,17059 ****
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--- 18319,18328 ----
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*************** ae2a21a09162634ab87c5e6c02f1b32a  gcc/te
*** 17064,17069 ****
--- 18333,18344 ----
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*************** d5784b5d151964a0262860b6971b650d  gcc/te
*** 17116,17123 ****
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--- 18391,18398 ----
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*************** db27e1724c0e880da2bfd461b9f5fb91  gcc/te
*** 17147,17152 ****
--- 18422,18429 ----
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*************** ccdae431579a6d857d9b594afc510a82  gcc/te
*** 17160,17166 ****
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--- 18437,18443 ----
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*************** f4601f8837f8226059c6d27ca124f445  gcc/te
*** 17179,17196 ****
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  4f6e362a864f5ac4f9b9b99e660e0674  gcc/testsuite/g++.dg/lto/pr89358_1.C
  71c4e0358186a48bc58fd216bc445a9a  gcc/testsuite/g++.dg/lto/pr90939_0.C
  52ac5c759138b17ea3fb0b5c2ad3e41c  gcc/testsuite/g++.dg/lto/pr90939_1.C
  f4fd4f3ad07ffe64bf370d8927987578  gcc/testsuite/g++.dg/lto/pr91572_0.C
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--- 18456,18482 ----
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  5ddd8396b535cb08306863df28f22bf7  gcc/testsuite/g++.dg/lto/pr88758_1.C
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  4f6e362a864f5ac4f9b9b99e660e0674  gcc/testsuite/g++.dg/lto/pr89358_1.C
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  52ac5c759138b17ea3fb0b5c2ad3e41c  gcc/testsuite/g++.dg/lto/pr90939_1.C
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  f4fd4f3ad07ffe64bf370d8927987578  gcc/testsuite/g++.dg/lto/pr91572_0.C
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  0611288c84e3f846cb789e1b0d0e7706  gcc/testsuite/g++.dg/missing-symbol-2.C
*************** b38ce2cc80cbd8da836a5faae6d33aff  gcc/te
*** 17260,17266 ****
  76e33d670a50db6c3e799393d2903f1b  gcc/testsuite/g++.dg/opt/dtor4-aux.cc
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  1224352d3dfac75031ae528b98238fad  gcc/testsuite/g++.dg/opt/dtor4.h
! 43e1e5c7810d0d20260882a98999c1ba  gcc/testsuite/g++.dg/opt/dump1.C
  c65684013d98188fa96db47010840657  gcc/testsuite/g++.dg/opt/eh1.C
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--- 18546,18552 ----
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  1224352d3dfac75031ae528b98238fad  gcc/testsuite/g++.dg/opt/dtor4.h
! 564b784a12ba92dca47a9a4958428cc8  gcc/testsuite/g++.dg/opt/dump1.C
  c65684013d98188fa96db47010840657  gcc/testsuite/g++.dg/opt/eh1.C
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  18b23691d6af0cdfab89ec422af1cdb1  gcc/testsuite/g++.dg/opt/eh3.C
*************** eb5f705d59dfe97f6ee0739884a4d329  gcc/te
*** 17274,17282 ****
  a46d4940a485effb55a52f27a3660542  gcc/testsuite/g++.dg/opt/expect1.C
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  b5b63cd3c6f555a0f702d932b247aceb  gcc/testsuite/g++.dg/opt/flifetime-dse1.C
! 6647f629d4b2c11a3db7015f35d1a77f  gcc/testsuite/g++.dg/opt/flifetime-dse2.C
  6b28fea971bdae1f538677719e8dcd02  gcc/testsuite/g++.dg/opt/flifetime-dse3.C
! 4f5b3273c995dbeb65a21e90dfe524bc  gcc/testsuite/g++.dg/opt/flifetime-dse4.C
  aebb50b965b9e3fe7a46ed8be7099eb9  gcc/testsuite/g++.dg/opt/flifetime-dse5.C
  db93c1e44055c4c1c91b5d89fef595e3  gcc/testsuite/g++.dg/opt/flifetime-dse6.C
  d48bf743fe7cd2670b77dd76e8fc1714  gcc/testsuite/g++.dg/opt/float1.C
--- 18560,18568 ----
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  b5b63cd3c6f555a0f702d932b247aceb  gcc/testsuite/g++.dg/opt/flifetime-dse1.C
! 0bcef1a3c2e8ea55e1fe4e0544a14df7  gcc/testsuite/g++.dg/opt/flifetime-dse2.C
  6b28fea971bdae1f538677719e8dcd02  gcc/testsuite/g++.dg/opt/flifetime-dse3.C
! 60f8519dd32174df7d646ed0197c21c4  gcc/testsuite/g++.dg/opt/flifetime-dse4.C
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  d48bf743fe7cd2670b77dd76e8fc1714  gcc/testsuite/g++.dg/opt/float1.C
*************** ce12e27bbb9344379eb93fb80a67ab97  gcc/te
*** 17420,17426 ****
  16fdb00e82f91a3d2db5392bf143a395  gcc/testsuite/g++.dg/opt/pr48272.C
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  5d73a18e7b1b6d012190b19dd2ea56b1  gcc/testsuite/g++.dg/opt/pr48302.C
! b45008acd439509020387dea2be7467b  gcc/testsuite/g++.dg/opt/pr48549.C
  55d9596493fd775b8cd9e4078dbff35d  gcc/testsuite/g++.dg/opt/pr48967.C
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--- 18706,18712 ----
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! c6db8de8ec339b77b51d5f32b28bb626  gcc/testsuite/g++.dg/opt/pr48549.C
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*************** b5c6104c29743bbd0bba0fb8c0978bd7  gcc/te
*** 17458,17464 ****
  7082104016064ee6200d6730eea70645  gcc/testsuite/g++.dg/opt/pr59622.C
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  bc581baefa9c2cdf340c7afe5ec42620  gcc/testsuite/g++.dg/opt/pr59947.C
! 391fc482d13050956c9c3db1a62c7cc4  gcc/testsuite/g++.dg/opt/pr60002.C
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  2ca5ee004fc73e412a39de0dd38e1b4c  gcc/testsuite/g++.dg/opt/pr60912.C
--- 18744,18750 ----
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! fcc0cbf12c3c1ff2231451798c2c5d37  gcc/testsuite/g++.dg/opt/pr60002.C
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*************** a9fbf233b631f1d45170b9aacad1f922  gcc/te
*** 17512,17525 ****
  13b71144779d58d731a538c93535bbc5  gcc/testsuite/g++.dg/opt/pr80102.C
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! 52414788e26085656539283064fe42d1  gcc/testsuite/g++.dg/opt/pr80436.C
  2790fce2a0e9448ee4a7971cc6fb2063  gcc/testsuite/g++.dg/opt/pr81715.C
  10c7a1569629659b172e9764c905a3bf  gcc/testsuite/g++.dg/opt/pr82159-2.C
  2ef205fc60b004319bdd85aaab41122a  gcc/testsuite/g++.dg/opt/pr82159.C
  de2c75d60389e1ec0cbe062c8582d2d9  gcc/testsuite/g++.dg/opt/pr82577.C
  d30ca1c821e579353187057dde122039  gcc/testsuite/g++.dg/opt/pr82778.C
  3b97830b162c62ccdbddf6d88cdf1f24  gcc/testsuite/g++.dg/opt/pr82929.C
! 448d3b38f4f483bb318034f7e240f9b8  gcc/testsuite/g++.dg/opt/pr83084.C
  8cabb24bb5cfadb17cb38af5c50fe4d5  gcc/testsuite/g++.dg/opt/pr83187.C
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  8bef6390b11d696847c415f0f5c23f9b  gcc/testsuite/g++.dg/opt/pr83555.C
--- 18798,18811 ----
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! 6f2ff952423a3011c52cacf4acb601f1  gcc/testsuite/g++.dg/opt/pr80436.C
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*************** dd4b362edbe19cdf29a47f7bb90e6e2a  gcc/te
*** 17541,17550 ****
--- 18827,18848 ----
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  1451eba24eea82cbd0c1ab87885c0f77  gcc/testsuite/g++.dg/opt/preinc1.C
  0841088f825be785d32663d712ecf675  gcc/testsuite/g++.dg/opt/ptrintsum1.C
  8ceccf2f02b3f64f372600e32148e146  gcc/testsuite/g++.dg/opt/ptrmem1.C
*************** d314ec5e414fa9ff7becb1b3ec214a79  gcc/te
*** 17574,17585 ****
  da113259afc60dbf3dd7e421650ce386  gcc/testsuite/g++.dg/opt/static4.C
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  f8fa04e44f6fd70dc42a62899c9f64d6  gcc/testsuite/g++.dg/opt/static6.C
  60be25e48eb621d1ff683d818d13b520  gcc/testsuite/g++.dg/opt/strength-reduce.C
  5ed0d3826b9088598be9656c25162529  gcc/testsuite/g++.dg/opt/switch1.C
  61704a5f57c4a5f46b6144e7223f9962  gcc/testsuite/g++.dg/opt/switch2.C
  0cc8575163405751cafdeec02c836cfb  gcc/testsuite/g++.dg/opt/switch3.C
  3f7a508706743fec6408316af296cebd  gcc/testsuite/g++.dg/opt/switch4.C
! b9c612d3d4289676abda6ba55bb98ae9  gcc/testsuite/g++.dg/opt/temp1.C
  3a03380a215b8d907bcfc208d09d5204  gcc/testsuite/g++.dg/opt/temp2.C
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  423a720c5d6fa9172e277e0cd1c91f34  gcc/testsuite/g++.dg/opt/thunk1.C
--- 18872,18887 ----
  da113259afc60dbf3dd7e421650ce386  gcc/testsuite/g++.dg/opt/static4.C
  e6a6097b4d5bd61ae38897f3b753019c  gcc/testsuite/g++.dg/opt/static5.C
  f8fa04e44f6fd70dc42a62899c9f64d6  gcc/testsuite/g++.dg/opt/static6.C
+ a183aae17f1d8c8615291ebf7a5dc391  gcc/testsuite/g++.dg/opt/store-merging-1.C
+ bdeac4f651cc766e9258a3e309a2e083  gcc/testsuite/g++.dg/opt/store-merging-2.C
+ b7ff171a7ea369be5eef1fa7876f131e  gcc/testsuite/g++.dg/opt/store-merging-3.C
+ 12b141d678db6c6a275748357e7fc1d2  gcc/testsuite/g++.dg/opt/store-merging-4.C
  60be25e48eb621d1ff683d818d13b520  gcc/testsuite/g++.dg/opt/strength-reduce.C
  5ed0d3826b9088598be9656c25162529  gcc/testsuite/g++.dg/opt/switch1.C
  61704a5f57c4a5f46b6144e7223f9962  gcc/testsuite/g++.dg/opt/switch2.C
  0cc8575163405751cafdeec02c836cfb  gcc/testsuite/g++.dg/opt/switch3.C
  3f7a508706743fec6408316af296cebd  gcc/testsuite/g++.dg/opt/switch4.C
! fef275baea684e27b49402e946869af7  gcc/testsuite/g++.dg/opt/temp1.C
  3a03380a215b8d907bcfc208d09d5204  gcc/testsuite/g++.dg/opt/temp2.C
  0146d1b3727676ef281dada91e18ba91  gcc/testsuite/g++.dg/opt/template1.C
  423a720c5d6fa9172e277e0cd1c91f34  gcc/testsuite/g++.dg/opt/thunk1.C
*************** c4f8b2aee6bbe8bb7c04aa1a20ed7b46  gcc/te
*** 17596,17602 ****
  5e3168f684c89d164ae6dfad8cb14fda  gcc/testsuite/g++.dg/opt/vrp3-aux.cc
  e384e4ea7483339d564580401d2ca3ab  gcc/testsuite/g++.dg/opt/vrp3.C
  90556a78bbd104a3fbe7928607a64b50  gcc/testsuite/g++.dg/opt/vrp3.h
! f530ceccc3fab953a6618e8c231a4513  gcc/testsuite/g++.dg/opt/vt1.C
  07c218d68fbc642331f671b72bf1cef6  gcc/testsuite/g++.dg/opt/vt2.C
  52fff29b07362fe5d23c4905a7595e39  gcc/testsuite/g++.dg/opt/vt3.C
  a0b34e9a729ff5b2181e421f2d8fb7c4  gcc/testsuite/g++.dg/opt/vt4.C
--- 18898,18904 ----
  5e3168f684c89d164ae6dfad8cb14fda  gcc/testsuite/g++.dg/opt/vrp3-aux.cc
  e384e4ea7483339d564580401d2ca3ab  gcc/testsuite/g++.dg/opt/vrp3.C
  90556a78bbd104a3fbe7928607a64b50  gcc/testsuite/g++.dg/opt/vrp3.h
! c7f48544f74c23480e79a8c68b0ab1a8  gcc/testsuite/g++.dg/opt/vt1.C
  07c218d68fbc642331f671b72bf1cef6  gcc/testsuite/g++.dg/opt/vt2.C
  52fff29b07362fe5d23c4905a7595e39  gcc/testsuite/g++.dg/opt/vt3.C
  a0b34e9a729ff5b2181e421f2d8fb7c4  gcc/testsuite/g++.dg/opt/vt4.C
*************** e6a4785ed0b7c7e727981cc2ee9613cb  gcc/te
*** 17614,17625 ****
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! fd4316c02caafdf6cdbbcfe7f9ff8982  gcc/testsuite/g++.dg/other/anon5.C
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--- 18916,18927 ----
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*************** cf1d166d7294daaa2002192c1cbfd785  gcc/te
*** 17657,17663 ****
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--- 18959,18965 ----
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*************** fdfa290c70a18c73e24a679861f4474f  gcc/te
*** 17678,17684 ****
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--- 18980,18986 ----
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*************** a33b9482e49687df6e3d1d5a9e6802a8  gcc/te
*** 17721,17727 ****
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--- 19023,19029 ----
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*************** fd41e2a884d224845fc1b776df3eb9bd  gcc/te
*** 17739,17745 ****
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--- 19041,19047 ----
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*************** a18683e17081d88a885ade3e18124b8c  gcc/te
*** 17750,17755 ****
--- 19052,19063 ----
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*************** e506264fa45a73c46a7c2dba030ad6b7  gcc/te
*** 17762,17772 ****
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! ca8db13b2a838d168664fb2bb66ae838  gcc/testsuite/g++.dg/other/friend7.C
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--- 19070,19080 ----
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! 46ec79d46506481150bc302c223e7b97  gcc/testsuite/g++.dg/other/friend3.C
! 329e605c6fb92a6c94047dde5308ac09  gcc/testsuite/g++.dg/other/friend4.C
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  95b3acbe1d45c008341d8cb6d3625c5b  gcc/testsuite/g++.dg/other/fsyntax-only1.C
*************** bc5371eb8e8dcf79efb0889828991560  gcc/te
*** 17779,17786 ****
  3ca5017faf45f39326ff4e30a1ec1ba8  gcc/testsuite/g++.dg/other/i386-1.C
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! c8e556f2f50c7d141a7af4bc139ecd6b  gcc/testsuite/g++.dg/other/i386-2.C
! 1c6aa25d2057137dafc4447e71a8c249  gcc/testsuite/g++.dg/other/i386-3.C
  a4ad4c2cb3c1448496351241a77aedb7  gcc/testsuite/g++.dg/other/i386-4.C
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--- 19087,19094 ----
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! b461f0929de1ee7bc0428b6e7f24c47f  gcc/testsuite/g++.dg/other/i386-3.C
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*************** f917991e6dd65d861c6bb45ad931fe8c  gcc/te
*** 17794,17800 ****
  84228402757e3c8e700713d288e64c46  gcc/testsuite/g++.dg/other/init2.C
  74d2dc28c4cfdb8c13ff5a52e4f1924a  gcc/testsuite/g++.dg/other/isnan.C
  6e292e2bc85eea028b21b0cab55522ad  gcc/testsuite/g++.dg/other/label1.C
! 75a505fa8cbe70fc7f3a30806bae4e7f  gcc/testsuite/g++.dg/other/large-size-array.C
  b00a3ef2f2c7c47e551480d60abbc84f  gcc/testsuite/g++.dg/other/linkage1.C
  6ea6e3f49496b4249e769858d36776e6  gcc/testsuite/g++.dg/other/linkage2.C
  2b200dd824bd19e6a1fab2e502b1ce41  gcc/testsuite/g++.dg/other/locations1.C
--- 19102,19108 ----
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*************** f90c8d6149f32ba2d05926d185233e6f  gcc/te
*** 17807,17813 ****
  34552611e0ea3221799b7ea6c572fbc0  gcc/testsuite/g++.dg/other/nested-extern-1.C
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! 3b3d31fa0153e44fca510495c663b718  gcc/testsuite/g++.dg/other/new-size-type.C
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  36156b7bb0f0bbac69e3b368b3b7bb86  gcc/testsuite/g++.dg/other/nontype-1.C
--- 19115,19121 ----
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! 215e6a764d31f0aa51c23be690b977f4  gcc/testsuite/g++.dg/other/new-size-type.C
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*************** cb516f165c38ec2709ca2cb55d0361de  gcc/te
*** 17820,17826 ****
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! bc0fd68902badef5afe9126eef1a958d  gcc/testsuite/g++.dg/other/offsetof9.C
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--- 19128,19134 ----
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*************** cac3a2322a3125e5a823dc9f229c758f  gcc/te
*** 17828,17833 ****
--- 19136,19142 ----
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  972110c0d861ecae87ae8ad4d861dd0f  gcc/testsuite/g++.dg/other/pr22003.C
*************** e7318945c51d3bbaf1fa1d922b1661f3  gcc/te
*** 17856,17862 ****
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--- 19165,19171 ----
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! 17309afbd34e4b010edce7cdf8af0393  gcc/testsuite/g++.dg/other/pr42685.C
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  d1a876567d4315b25ada60d25ecbd98f  gcc/testsuite/g++.dg/other/pr43631.C
*************** edba4dc64424b99c4e6984f1aa7e9507  gcc/te
*** 17883,17888 ****
--- 19192,19198 ----
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*************** b183be29240d792a5096b2eef4b1a111  gcc/te
*** 17892,17927 ****
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! 713d0139b054494df9491738a1fefb6c  gcc/testsuite/g++.dg/other/ptrmem5.C
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! 2191563dd6d02eba9e6ba0c7da490226  gcc/testsuite/g++.dg/other/ptrmem8.C
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  c1ee7e4e5d2dfa36042c3417fffae465  gcc/testsuite/g++.dg/other/qual1.C
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  fa56113db0f4a64e5dd4543612cc1522  gcc/testsuite/g++.dg/other/redecl2.C
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--- 19202,19240 ----
  8a4056fe7245ff5ab2f5fb56ab077f9e  gcc/testsuite/g++.dg/other/pr81355.C
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  c5fc831f4230513b5f02a1aad917c686  gcc/testsuite/g++.dg/other/return1.C
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  a2a80603fcddfe63208d0fe7940f2149  gcc/testsuite/g++.dg/other/semicolon.C
*************** f8dc723a51d7ae25d4c82158123aefaf  gcc/te
*** 17951,17956 ****
--- 19264,19270 ----
  2ae83dd33030d45c71b8674e327b61aa  gcc/testsuite/g++.dg/other/typedef2.C
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  5c2adc76f21ce8f7182fe1930db8db73  gcc/testsuite/g++.dg/other/unreachable1.C
  54c43007c45d973d99536b40a21a0a10  gcc/testsuite/g++.dg/other/unused1.C
*************** e549b742987ea4bf15156f2ff8b335da  gcc/te
*** 17987,17993 ****
  a0b8fd80bfd82adaa23c61a98df112fb  gcc/testsuite/g++.dg/overload/builtin3.C
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  5067a4c6731aae0336243d6867599e99  gcc/testsuite/g++.dg/overload/cond2.C
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--- 19301,19307 ----
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  8ae6c6553dbbee15f45f0a28425dfa81  gcc/testsuite/g++.dg/overload/conv-op3.C
  98a842578a616e44aeceebe22e18afd1  gcc/testsuite/g++.dg/overload/copy1.C
*************** de833d8751ce7fbcf8622b1a3ccd7a5c  gcc/te
*** 18006,18014 ****
--- 19320,19330 ----
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  f0855d927ec9333de2c98f144b697be2  gcc/testsuite/g++.dg/overload/koenig1.C
*************** a436e857943377addaac3203f4d85eb4  gcc/te
*** 18033,18039 ****
  4d59760484bbf6fd355f658032664fa4  gcc/testsuite/g++.dg/overload/reftemp1.C
  f1afe21410b8c9ff2b405c0ea38c466d  gcc/testsuite/g++.dg/overload/reftemp2.C
  14e68b07c04d0b27c8221cd9eeab2703  gcc/testsuite/g++.dg/overload/rvalue1.C
! 2519d84164494a2d9dbd7eecc54ff623  gcc/testsuite/g++.dg/overload/rvalue2.C
  e8d2b5f4633ed5ca39b035852658ba5d  gcc/testsuite/g++.dg/overload/rvalue3.C
  1bd540977a3ebf0e74db36e595b11998  gcc/testsuite/g++.dg/overload/scope1.C
  1e6f1679bedcc11510f7cadcb011cec3  gcc/testsuite/g++.dg/overload/template1.C
--- 19349,19355 ----
  4d59760484bbf6fd355f658032664fa4  gcc/testsuite/g++.dg/overload/reftemp1.C
  f1afe21410b8c9ff2b405c0ea38c466d  gcc/testsuite/g++.dg/overload/reftemp2.C
  14e68b07c04d0b27c8221cd9eeab2703  gcc/testsuite/g++.dg/overload/rvalue1.C
! 768cb60f0767967342a009003ae8be10  gcc/testsuite/g++.dg/overload/rvalue2.C
  e8d2b5f4633ed5ca39b035852658ba5d  gcc/testsuite/g++.dg/overload/rvalue3.C
  1bd540977a3ebf0e74db36e595b11998  gcc/testsuite/g++.dg/overload/scope1.C
  1e6f1679bedcc11510f7cadcb011cec3  gcc/testsuite/g++.dg/overload/template1.C
*************** e8d2b5f4633ed5ca39b035852658ba5d  gcc/te
*** 18044,18050 ****
  d0aceebd661652ccdb057c8c6f6fd73d  gcc/testsuite/g++.dg/overload/template6.C
  539d6c9e97785fe65d88de514cb1e9eb  gcc/testsuite/g++.dg/overload/unknown1.C
  85ece6c01345af5b8d407b8e19d781f9  gcc/testsuite/g++.dg/overload/using1.C
! d5e5bdf2b72155c8375326918e59a891  gcc/testsuite/g++.dg/overload/using2.C
  b056b1147dbd8a1797c665b614c55cca  gcc/testsuite/g++.dg/overload/using3.C
  6f4c92c56af54928e54e1b8adadcbe74  gcc/testsuite/g++.dg/overload/using4.C
  dfb3cd39ebc182dbb4338773db282413  gcc/testsuite/g++.dg/overload/using5.C
--- 19360,19366 ----
  d0aceebd661652ccdb057c8c6f6fd73d  gcc/testsuite/g++.dg/overload/template6.C
  539d6c9e97785fe65d88de514cb1e9eb  gcc/testsuite/g++.dg/overload/unknown1.C
  85ece6c01345af5b8d407b8e19d781f9  gcc/testsuite/g++.dg/overload/using1.C
! 0754a190fef2a21fdbda686ffce41834  gcc/testsuite/g++.dg/overload/using2.C
  b056b1147dbd8a1797c665b614c55cca  gcc/testsuite/g++.dg/overload/using3.C
  6f4c92c56af54928e54e1b8adadcbe74  gcc/testsuite/g++.dg/overload/using4.C
  dfb3cd39ebc182dbb4338773db282413  gcc/testsuite/g++.dg/overload/using5.C
*************** d15089685ef9bec1d6011e43465e0eb2  gcc/te
*** 18062,18068 ****
--- 19378,19386 ----
  d44f99d0f38b43ff740e826c56b2fa80  gcc/testsuite/g++.dg/parse/access7.C
  007a6656ab4b102c88b35d17748f1238  gcc/testsuite/g++.dg/parse/access8.C
  27f68c40068a831ad635de65930c2844  gcc/testsuite/g++.dg/parse/access9.C
+ 1a4356ed33dce1c233f305b885c79fc2  gcc/testsuite/g++.dg/parse/alignas1.C
  6606f920d5b7219bc3178a9025894dc2  gcc/testsuite/g++.dg/parse/ambig1.C
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  3942d08ed7cbdaac837b06646132916e  gcc/testsuite/g++.dg/parse/ambig2.C
  dccd55557e6e7045693056e69f389dc4  gcc/testsuite/g++.dg/parse/ambig3.C
  fae81ce0afd197e10c8c2306551490cd  gcc/testsuite/g++.dg/parse/ambig4.C
*************** fc7bb3a300dd247cd39bd47963487340  gcc/te
*** 18087,18092 ****
--- 19405,19411 ----
  d84032d5d61187d741ca91d1d16ee607  gcc/testsuite/g++.dg/parse/attr1.C
  3d4935439f09d7756194078a14580819  gcc/testsuite/g++.dg/parse/attr2.C
  a2620501321f8a5646f2c9de16693667  gcc/testsuite/g++.dg/parse/attr3.C
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  73272b6d0088d70ce32ad135b8b8bdd1  gcc/testsuite/g++.dg/parse/bitfield1.C
  44f7fcda1355d2713f1553e89b1837b8  gcc/testsuite/g++.dg/parse/bitfield2.C
  8ba3c4b4e1071c4bc6a0af4986fa5735  gcc/testsuite/g++.dg/parse/bitfield3.C
*************** d9621983a7cb4db7ed484bed67203810  gcc/te
*** 18138,18144 ****
  2af76aeb0c88a4458d4439db563e0893  gcc/testsuite/g++.dg/parse/crash10.C
  4435ac4f24fa5731340d43e4ff33bb31  gcc/testsuite/g++.dg/parse/crash11.C
  ba3ce4aeaf342d1d4f96b2f4eb0ce87a  gcc/testsuite/g++.dg/parse/crash12.C
! 3b73d2a22d7abe1b3454cf524a31bd3c  gcc/testsuite/g++.dg/parse/crash13.C
  8fc5d6dab19b9f89401818b0138ffa98  gcc/testsuite/g++.dg/parse/crash14.C
  a61247b0784709761dc6bf67cf0c5a0c  gcc/testsuite/g++.dg/parse/crash15.C
  1715d57823b1ff6a57385e3c29065708  gcc/testsuite/g++.dg/parse/crash16.C
--- 19457,19463 ----
  2af76aeb0c88a4458d4439db563e0893  gcc/testsuite/g++.dg/parse/crash10.C
  4435ac4f24fa5731340d43e4ff33bb31  gcc/testsuite/g++.dg/parse/crash11.C
  ba3ce4aeaf342d1d4f96b2f4eb0ce87a  gcc/testsuite/g++.dg/parse/crash12.C
! 5ff7964a35afa4ce9e2420f621d97746  gcc/testsuite/g++.dg/parse/crash13.C
  8fc5d6dab19b9f89401818b0138ffa98  gcc/testsuite/g++.dg/parse/crash14.C
  a61247b0784709761dc6bf67cf0c5a0c  gcc/testsuite/g++.dg/parse/crash15.C
  1715d57823b1ff6a57385e3c29065708  gcc/testsuite/g++.dg/parse/crash16.C
*************** aef7511bd3c7bf321e247bd64a72f884  gcc/te
*** 18174,18180 ****
  89b8c6bdffaf8f11220b8cb27d5c680a  gcc/testsuite/g++.dg/parse/crash43.C
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  d1b15eaab00475505ee64318f12a9797  gcc/testsuite/g++.dg/parse/crash45.C
! fe7f99f8cf1cf6cdd285ccca275b3564  gcc/testsuite/g++.dg/parse/crash46.C
  16058db49fab91cfff89097d865733fb  gcc/testsuite/g++.dg/parse/crash47.C
  cc7755ac26939556667dd1c6ef348629  gcc/testsuite/g++.dg/parse/crash48.C
  dc0f5d9180d0b99a7fb9e42ce24cc0d2  gcc/testsuite/g++.dg/parse/crash49.C
--- 19493,19499 ----
  89b8c6bdffaf8f11220b8cb27d5c680a  gcc/testsuite/g++.dg/parse/crash43.C
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  d1b15eaab00475505ee64318f12a9797  gcc/testsuite/g++.dg/parse/crash45.C
! 93224e28151577aba846d68028baf37e  gcc/testsuite/g++.dg/parse/crash46.C
  16058db49fab91cfff89097d865733fb  gcc/testsuite/g++.dg/parse/crash47.C
  cc7755ac26939556667dd1c6ef348629  gcc/testsuite/g++.dg/parse/crash48.C
  dc0f5d9180d0b99a7fb9e42ce24cc0d2  gcc/testsuite/g++.dg/parse/crash49.C
*************** bb6ac4a17ab02af350881f64213ce26e  gcc/te
*** 18188,18194 ****
  28ddbaa14692a16c706c5c2beb55f24b  gcc/testsuite/g++.dg/parse/crash56.C
  6fc258bb800a72857ca75dc2832d771d  gcc/testsuite/g++.dg/parse/crash57.C
  71b15313ba16339bb71e8e5d55013108  gcc/testsuite/g++.dg/parse/crash58.C
! 01be7ea2b97a83045196ea78cd77b795  gcc/testsuite/g++.dg/parse/crash59.C
  3cae354cb01ecb5097fe78c4d17c8ccd  gcc/testsuite/g++.dg/parse/crash6.C
  42e40332697734bbf2a5f363a0412b58  gcc/testsuite/g++.dg/parse/crash60.C
  56df7e2152fccb934ef7891103aa596f  gcc/testsuite/g++.dg/parse/crash61.C
--- 19507,19513 ----
  28ddbaa14692a16c706c5c2beb55f24b  gcc/testsuite/g++.dg/parse/crash56.C
  6fc258bb800a72857ca75dc2832d771d  gcc/testsuite/g++.dg/parse/crash57.C
  71b15313ba16339bb71e8e5d55013108  gcc/testsuite/g++.dg/parse/crash58.C
! 28cfa1a043f913bce4272a36002fca8a  gcc/testsuite/g++.dg/parse/crash59.C
  3cae354cb01ecb5097fe78c4d17c8ccd  gcc/testsuite/g++.dg/parse/crash6.C
  42e40332697734bbf2a5f363a0412b58  gcc/testsuite/g++.dg/parse/crash60.C
  56df7e2152fccb934ef7891103aa596f  gcc/testsuite/g++.dg/parse/crash61.C
*************** d2a1c0aeebb2a24b610c23275c77d0b4  gcc/te
*** 18201,18206 ****
--- 19520,19527 ----
  781c7565551294a35c28556fa0b0f31d  gcc/testsuite/g++.dg/parse/crash68.C
  9d029e464a093503e2921a501a313118  gcc/testsuite/g++.dg/parse/crash69.C
  34393b72e5dec85fca930dee15e2f669  gcc/testsuite/g++.dg/parse/crash7.C
+ 73b1cabb6ebba6515fc142024f664fa3  gcc/testsuite/g++.dg/parse/crash70.C
+ 78546442b1a4a93b74bc9a74697998e4  gcc/testsuite/g++.dg/parse/crash71.C
  5818f331167c496db06ad694932a1beb  gcc/testsuite/g++.dg/parse/crash9.C
  5940e29a523673e2c47048c21c11d678  gcc/testsuite/g++.dg/parse/ctor1.C
  6a4d22d64949d622a19d9e79684aad65  gcc/testsuite/g++.dg/parse/ctor10.C
*************** ced832c704713d5dd4581483a10c8a33  gcc/te
*** 18243,18251 ****
  3aba533fbe27c42e1269423ae03a1486  gcc/testsuite/g++.dg/parse/dtor16.C
  836b38edb2c6c3669f71f87e64fe7f27  gcc/testsuite/g++.dg/parse/dtor17.C
  1d7ced46ba93cd282dde965b7f3d48b1  gcc/testsuite/g++.dg/parse/dtor2.C
! 910d21c43d1e636c0d63d98205e45a4a  gcc/testsuite/g++.dg/parse/dtor3.C
  0e5bfee2fe061692451a1e06a97362d4  gcc/testsuite/g++.dg/parse/dtor4.C
! 07c4924bc1a93f3f44905648f906e33c  gcc/testsuite/g++.dg/parse/dtor5.C
  4f0008153fab4493cc20d14cc321950d  gcc/testsuite/g++.dg/parse/dtor6.C
  a2852b8a5379f2ca58b9cfa5f41e4baf  gcc/testsuite/g++.dg/parse/dtor7.C
  a2e4d2c70a76d509bdeab9072587529d  gcc/testsuite/g++.dg/parse/dtor8.C
--- 19564,19572 ----
  3aba533fbe27c42e1269423ae03a1486  gcc/testsuite/g++.dg/parse/dtor16.C
  836b38edb2c6c3669f71f87e64fe7f27  gcc/testsuite/g++.dg/parse/dtor17.C
  1d7ced46ba93cd282dde965b7f3d48b1  gcc/testsuite/g++.dg/parse/dtor2.C
! 558fe9b75c7e9893083e871d54fbf811  gcc/testsuite/g++.dg/parse/dtor3.C
  0e5bfee2fe061692451a1e06a97362d4  gcc/testsuite/g++.dg/parse/dtor4.C
! 68a13da7bcec55954cbe2e2f02f9f4bc  gcc/testsuite/g++.dg/parse/dtor5.C
  4f0008153fab4493cc20d14cc321950d  gcc/testsuite/g++.dg/parse/dtor6.C
  a2852b8a5379f2ca58b9cfa5f41e4baf  gcc/testsuite/g++.dg/parse/dtor7.C
  a2e4d2c70a76d509bdeab9072587529d  gcc/testsuite/g++.dg/parse/dtor8.C
*************** bc3db92c5f319be8107f7a3542359565  gcc/te
*** 18272,18278 ****
  fc78fe78fba2427e541a1c8d2cb5fa07  gcc/testsuite/g++.dg/parse/enum9.C
  a64e620ac0df90a741fe0e470ee25a52  gcc/testsuite/g++.dg/parse/error-column.C
  0f041c482da9fb63f8ffc054da4ca736  gcc/testsuite/g++.dg/parse/error1.C
! 587da25d66f396f8f840154ad261f8f1  gcc/testsuite/g++.dg/parse/error10.C
  5aa114d6002c04c3be5a435f41b03334  gcc/testsuite/g++.dg/parse/error11.C
  278d07900414689dd3933c8bce314e1c  gcc/testsuite/g++.dg/parse/error12.C
  60381da056d6f2263f2135ad61e209f3  gcc/testsuite/g++.dg/parse/error13.C
--- 19593,19599 ----
  fc78fe78fba2427e541a1c8d2cb5fa07  gcc/testsuite/g++.dg/parse/enum9.C
  a64e620ac0df90a741fe0e470ee25a52  gcc/testsuite/g++.dg/parse/error-column.C
  0f041c482da9fb63f8ffc054da4ca736  gcc/testsuite/g++.dg/parse/error1.C
! 1b426326d733469340c3dd64f9c16e00  gcc/testsuite/g++.dg/parse/error10.C
  5aa114d6002c04c3be5a435f41b03334  gcc/testsuite/g++.dg/parse/error11.C
  278d07900414689dd3933c8bce314e1c  gcc/testsuite/g++.dg/parse/error12.C
  60381da056d6f2263f2135ad61e209f3  gcc/testsuite/g++.dg/parse/error13.C
*************** a64e620ac0df90a741fe0e470ee25a52  gcc/te
*** 18287,18314 ****
  4f0df384b1d6aa415cbf47183290687d  gcc/testsuite/g++.dg/parse/error21.C
  cf81b63ad266926de254ac66a72d226f  gcc/testsuite/g++.dg/parse/error22.C
  d3c65e03e45b8a94ef2c3cd8d43afda0  gcc/testsuite/g++.dg/parse/error23.C
! d1117b500d18941d79a25fa0b2689a43  gcc/testsuite/g++.dg/parse/error24.C
  b9ccf94d56a7c35ef00c32c84f4563ae  gcc/testsuite/g++.dg/parse/error25.C
! 32345085883483e93439065264ad1904  gcc/testsuite/g++.dg/parse/error26.C
  04bc8d6ffd02c56a13b207412907c1a9  gcc/testsuite/g++.dg/parse/error27.C
  b14e8b97a8342f70111f73990af8baef  gcc/testsuite/g++.dg/parse/error28.C
! e7346aefeb3e898d171bb325d837d809  gcc/testsuite/g++.dg/parse/error29.C
  14c8e663984ec0f5f28e9402a55d1d3b  gcc/testsuite/g++.dg/parse/error3.C
  2ae7ac29f23156097f82fbafc938565b  gcc/testsuite/g++.dg/parse/error30.C
  4253299be031aa184372343d76b84d72  gcc/testsuite/g++.dg/parse/error31.C
! f2c271a46d6eb35ca4a8228f515fc6b9  gcc/testsuite/g++.dg/parse/error32.C
! 6a46430c88738717689a5fe077b970ca  gcc/testsuite/g++.dg/parse/error33.C
  aa5cf2a4e64629f94de3077bdf380a72  gcc/testsuite/g++.dg/parse/error34.C
  adbc0dcb8db3dcf042a3fc8340a835ef  gcc/testsuite/g++.dg/parse/error35.C
  bc676204e93dcf8837534e35a5bed395  gcc/testsuite/g++.dg/parse/error36.C
  882092dbe71ac5ba94aa530da454dca1  gcc/testsuite/g++.dg/parse/error37.C
! 0b1e4c467ab7c4b8aee1fcaa076266e0  gcc/testsuite/g++.dg/parse/error38.C
! dd7c75650631a559c60b76902bb0f133  gcc/testsuite/g++.dg/parse/error39.C
  36675870861df04d64c29e077ffed5ad  gcc/testsuite/g++.dg/parse/error4.C
  2feadf6bf5d6879bdff0beec6d842793  gcc/testsuite/g++.dg/parse/error40.C
  af8f049fbe98d54c80fc13d2e22b4245  gcc/testsuite/g++.dg/parse/error41.C
  39e6dd88ac530577aaf1363d98ffd541  gcc/testsuite/g++.dg/parse/error42.C
! a5d6305b72c3f438e2b2a34c51c1c1d6  gcc/testsuite/g++.dg/parse/error43.C
  e239b71c7990da088bcfd31703f60698  gcc/testsuite/g++.dg/parse/error44.C
  8fb255415b7882b936372523f4ddf18b  gcc/testsuite/g++.dg/parse/error45.C
  8de67eff0c50f1a370fb7fc74fe6fae5  gcc/testsuite/g++.dg/parse/error47.C
--- 19608,19635 ----
  4f0df384b1d6aa415cbf47183290687d  gcc/testsuite/g++.dg/parse/error21.C
  cf81b63ad266926de254ac66a72d226f  gcc/testsuite/g++.dg/parse/error22.C
  d3c65e03e45b8a94ef2c3cd8d43afda0  gcc/testsuite/g++.dg/parse/error23.C
! b59312a051b264a8b38368ae82e14e66  gcc/testsuite/g++.dg/parse/error24.C
  b9ccf94d56a7c35ef00c32c84f4563ae  gcc/testsuite/g++.dg/parse/error25.C
! 414705571de4a7ff3f80d55ba996b3ef  gcc/testsuite/g++.dg/parse/error26.C
  04bc8d6ffd02c56a13b207412907c1a9  gcc/testsuite/g++.dg/parse/error27.C
  b14e8b97a8342f70111f73990af8baef  gcc/testsuite/g++.dg/parse/error28.C
! 359dfef45d537b56b0bbc14f7ae54298  gcc/testsuite/g++.dg/parse/error29.C
  14c8e663984ec0f5f28e9402a55d1d3b  gcc/testsuite/g++.dg/parse/error3.C
  2ae7ac29f23156097f82fbafc938565b  gcc/testsuite/g++.dg/parse/error30.C
  4253299be031aa184372343d76b84d72  gcc/testsuite/g++.dg/parse/error31.C
! 81aaf9f86b7cb492ef66ae73654e62f7  gcc/testsuite/g++.dg/parse/error32.C
! 7a93dd107ad88a0c6f42c28466e2581e  gcc/testsuite/g++.dg/parse/error33.C
  aa5cf2a4e64629f94de3077bdf380a72  gcc/testsuite/g++.dg/parse/error34.C
  adbc0dcb8db3dcf042a3fc8340a835ef  gcc/testsuite/g++.dg/parse/error35.C
  bc676204e93dcf8837534e35a5bed395  gcc/testsuite/g++.dg/parse/error36.C
  882092dbe71ac5ba94aa530da454dca1  gcc/testsuite/g++.dg/parse/error37.C
! a5c4f0b49b0574ea999f9047daeea726  gcc/testsuite/g++.dg/parse/error38.C
! 9ce4240430acb6de0c83e5272759d9b2  gcc/testsuite/g++.dg/parse/error39.C
  36675870861df04d64c29e077ffed5ad  gcc/testsuite/g++.dg/parse/error4.C
  2feadf6bf5d6879bdff0beec6d842793  gcc/testsuite/g++.dg/parse/error40.C
  af8f049fbe98d54c80fc13d2e22b4245  gcc/testsuite/g++.dg/parse/error41.C
  39e6dd88ac530577aaf1363d98ffd541  gcc/testsuite/g++.dg/parse/error42.C
! 9e18e99957bd34189b3d8c3e910f4ed3  gcc/testsuite/g++.dg/parse/error43.C
  e239b71c7990da088bcfd31703f60698  gcc/testsuite/g++.dg/parse/error44.C
  8fb255415b7882b936372523f4ddf18b  gcc/testsuite/g++.dg/parse/error45.C
  8de67eff0c50f1a370fb7fc74fe6fae5  gcc/testsuite/g++.dg/parse/error47.C
*************** c3815b12d6adb1ac6f7c8f2379deb21d  gcc/te
*** 18328,18337 ****
  8a5fcb827640389e59afca1e423ae355  gcc/testsuite/g++.dg/parse/error6.C
  026aaa79a36259f6c4f9cd79bc47cd46  gcc/testsuite/g++.dg/parse/error60.C
  1770bd4111f50f08d153011b97e0ee41  gcc/testsuite/g++.dg/parse/error61.C
  69f9cb5c7beb27587f6ec060eeafc314  gcc/testsuite/g++.dg/parse/error7.C
! c8ad8b8d3fa554b37206f4fca5ac61f9  gcc/testsuite/g++.dg/parse/error8.C
  645fd7881b9edb38e573c6cc40ee26e9  gcc/testsuite/g++.dg/parse/error9.C
! e338c4b0ed33d2c11d4f6cf0d48ac4c9  gcc/testsuite/g++.dg/parse/explicit1.C
  d5e1867a018baeb589c4bfc1ab21e892  gcc/testsuite/g++.dg/parse/expr1.C
  6babcafae0598fcc1b60b41da5acb465  gcc/testsuite/g++.dg/parse/expr2.C
  6d7be91bc2c8c6e24eeb0e2834b30879  gcc/testsuite/g++.dg/parse/expr3.C
--- 19649,19659 ----
  8a5fcb827640389e59afca1e423ae355  gcc/testsuite/g++.dg/parse/error6.C
  026aaa79a36259f6c4f9cd79bc47cd46  gcc/testsuite/g++.dg/parse/error60.C
  1770bd4111f50f08d153011b97e0ee41  gcc/testsuite/g++.dg/parse/error61.C
+ 1c27b0becdebc68ee67aaab409111d9b  gcc/testsuite/g++.dg/parse/error62.C
  69f9cb5c7beb27587f6ec060eeafc314  gcc/testsuite/g++.dg/parse/error7.C
! a9b4e068ec9bd53e03eab1f20b49779f  gcc/testsuite/g++.dg/parse/error8.C
  645fd7881b9edb38e573c6cc40ee26e9  gcc/testsuite/g++.dg/parse/error9.C
! f290af7231cc5e56195c68bf02c7fc6a  gcc/testsuite/g++.dg/parse/explicit1.C
  d5e1867a018baeb589c4bfc1ab21e892  gcc/testsuite/g++.dg/parse/expr1.C
  6babcafae0598fcc1b60b41da5acb465  gcc/testsuite/g++.dg/parse/expr2.C
  6d7be91bc2c8c6e24eeb0e2834b30879  gcc/testsuite/g++.dg/parse/expr3.C
*************** fcc030c9d8d11fcc0dc0610cd6499a55  gcc/te
*** 18356,18362 ****
  ead8df5d9d4cf435bf4e3cf134c0131c  gcc/testsuite/g++.dg/parse/friend4.C
  11ef58ca2998b51220ffff019f7fcb9c  gcc/testsuite/g++.dg/parse/friend5.C
  6584cf7d43ecae10bf211c65964bfa73  gcc/testsuite/g++.dg/parse/friend6.C
! 27cf8bce1fff883ff791e31209eb310b  gcc/testsuite/g++.dg/parse/friend7.C
  757948645eac8a4e3fcab96194123ce4  gcc/testsuite/g++.dg/parse/friend8.C
  1c99376ee30ece6c8b916ee9974374ed  gcc/testsuite/g++.dg/parse/friend9.C
  e8e9b52687fc710dc5ded14930091f3f  gcc/testsuite/g++.dg/parse/func-def1.C
--- 19678,19684 ----
  ead8df5d9d4cf435bf4e3cf134c0131c  gcc/testsuite/g++.dg/parse/friend4.C
  11ef58ca2998b51220ffff019f7fcb9c  gcc/testsuite/g++.dg/parse/friend5.C
  6584cf7d43ecae10bf211c65964bfa73  gcc/testsuite/g++.dg/parse/friend6.C
! 6d26b232761168bdd40a7a90a26e2cf0  gcc/testsuite/g++.dg/parse/friend7.C
  757948645eac8a4e3fcab96194123ce4  gcc/testsuite/g++.dg/parse/friend8.C
  1c99376ee30ece6c8b916ee9974374ed  gcc/testsuite/g++.dg/parse/friend9.C
  e8e9b52687fc710dc5ded14930091f3f  gcc/testsuite/g++.dg/parse/func-def1.C
*************** d1474e603dfda7a944b4131661d47d65  gcc/te
*** 18383,18389 ****
  4a4f9f20e51d1aee172658f8ba701b5e  gcc/testsuite/g++.dg/parse/lookup5.C
  5b22b337cad26799c54172638713c0f9  gcc/testsuite/g++.dg/parse/memfnquals1.C
  29c2051b05afbf8d987922825eb14d4d  gcc/testsuite/g++.dg/parse/missing-parens-fixit.C
! c4f699b907509893d8feb6eab1a7d201  gcc/testsuite/g++.dg/parse/missing-template1.C
  2a6bb7eee1c4c9ef55c8fb4a46785607  gcc/testsuite/g++.dg/parse/mutable1.C
  fe86870b21fda02350088a1a430beacb  gcc/testsuite/g++.dg/parse/named_ops.C
  c8bbae0b6f18e189ca178daba04b2666  gcc/testsuite/g++.dg/parse/namespace-alias-1.C
--- 19705,19711 ----
  4a4f9f20e51d1aee172658f8ba701b5e  gcc/testsuite/g++.dg/parse/lookup5.C
  5b22b337cad26799c54172638713c0f9  gcc/testsuite/g++.dg/parse/memfnquals1.C
  29c2051b05afbf8d987922825eb14d4d  gcc/testsuite/g++.dg/parse/missing-parens-fixit.C
! c35e4ecd2fbafbe684860b421bf43fbb  gcc/testsuite/g++.dg/parse/missing-template1.C
  2a6bb7eee1c4c9ef55c8fb4a46785607  gcc/testsuite/g++.dg/parse/mutable1.C
  fe86870b21fda02350088a1a430beacb  gcc/testsuite/g++.dg/parse/named_ops.C
  c8bbae0b6f18e189ca178daba04b2666  gcc/testsuite/g++.dg/parse/namespace-alias-1.C
*************** e91f3d3016e1e200ebed1193330b5657  gcc/te
*** 18435,18440 ****
--- 19757,19763 ----
  0578823e3d3e65db335d3144fea8e448  gcc/testsuite/g++.dg/parse/operator6.C
  8a4367896acda2c1db8e321d02d4aa92  gcc/testsuite/g++.dg/parse/operator7.C
  90d5ee3d87668accad2338969cd780c5  gcc/testsuite/g++.dg/parse/operator8.C
+ 97df02de60afc1c8121f12444de25a1a  gcc/testsuite/g++.dg/parse/operator9.C
  b8b60c6b3d20bc77c7acd224354d653f  gcc/testsuite/g++.dg/parse/parameter-declaration-1.C
  e3ddebbe6b42d002375e551ea770cbdf  gcc/testsuite/g++.dg/parse/parameter-declaration-2.C
  de20c30d40f4cceef57124b5828bf816  gcc/testsuite/g++.dg/parse/parens1.C
*************** ce5771924fa5fd60b270c30c11bee489  gcc/te
*** 18455,18461 ****
  f8326578679fecd658e1bec2d3ed7654  gcc/testsuite/g++.dg/parse/pr16696.C
  29f6ba15da1283765b5179abe6707d09  gcc/testsuite/g++.dg/parse/pr18770.C
  7f6e10791d7c1d2556e34458f5dc3067  gcc/testsuite/g++.dg/parse/pr20118.C
! 893f2840af6f1df245145eec652be3cb  gcc/testsuite/g++.dg/parse/pr26997.C
  4a46f444a2adb4fe8e8f944c9e869768  gcc/testsuite/g++.dg/parse/pr29234.C
  16a506601ac68d703bfa4ceeecff45a5  gcc/testsuite/g++.dg/parse/pr31952-1.C
  7e6ff18d87a2c84c1903a94d4b31133b  gcc/testsuite/g++.dg/parse/pr31952-2.C
--- 19778,19784 ----
  f8326578679fecd658e1bec2d3ed7654  gcc/testsuite/g++.dg/parse/pr16696.C
  29f6ba15da1283765b5179abe6707d09  gcc/testsuite/g++.dg/parse/pr18770.C
  7f6e10791d7c1d2556e34458f5dc3067  gcc/testsuite/g++.dg/parse/pr20118.C
! 5279d916726814483a508492a3885935  gcc/testsuite/g++.dg/parse/pr26997.C
  4a46f444a2adb4fe8e8f944c9e869768  gcc/testsuite/g++.dg/parse/pr29234.C
  16a506601ac68d703bfa4ceeecff45a5  gcc/testsuite/g++.dg/parse/pr31952-1.C
  7e6ff18d87a2c84c1903a94d4b31133b  gcc/testsuite/g++.dg/parse/pr31952-2.C
*************** a22ea5750225f2612d7e42c34ccab198  gcc/te
*** 18487,18493 ****
  7e4a18dbdde15d3df2c3ac9c839f0aa2  gcc/testsuite/g++.dg/parse/pr84263.C
  eb26fb436b8f8415a8abc1bccfbe0115  gcc/testsuite/g++.dg/parse/pr88180.C
  5a9d33aff7826f90760a0154af35d9f0  gcc/testsuite/g++.dg/parse/pragma1.C
! b8553036b01aadac9e932e75221336ae  gcc/testsuite/g++.dg/parse/pragma2.C
  d516a5d017b9be02cd665abb61b0fbaf  gcc/testsuite/g++.dg/parse/pragma3.C
  2ec4898222ed00ed700c0d02a75f2d1f  gcc/testsuite/g++.dg/parse/primary-expression-1.C
  a7c7523f78d6f162791c48963beb5abd  gcc/testsuite/g++.dg/parse/ptrmem1.C
--- 19810,19816 ----
  7e4a18dbdde15d3df2c3ac9c839f0aa2  gcc/testsuite/g++.dg/parse/pr84263.C
  eb26fb436b8f8415a8abc1bccfbe0115  gcc/testsuite/g++.dg/parse/pr88180.C
  5a9d33aff7826f90760a0154af35d9f0  gcc/testsuite/g++.dg/parse/pragma1.C
! 1f6123ac6fb8020a2ebda2653a23c5d2  gcc/testsuite/g++.dg/parse/pragma2.C
  d516a5d017b9be02cd665abb61b0fbaf  gcc/testsuite/g++.dg/parse/pragma3.C
  2ec4898222ed00ed700c0d02a75f2d1f  gcc/testsuite/g++.dg/parse/primary-expression-1.C
  a7c7523f78d6f162791c48963beb5abd  gcc/testsuite/g++.dg/parse/ptrmem1.C
*************** f52d554c8ba213f3b2dd46e6ec8cf1e3  gcc/te
*** 18500,18508 ****
  dff028e4d56c0efe2459f89320ef7cb9  gcc/testsuite/g++.dg/parse/ptrmem8.C
  83d63dd38efaf7bc7408deb85bde6d3d  gcc/testsuite/g++.dg/parse/pure1.C
  ee6ac3b84366a978a8fd11d55b342fb7  gcc/testsuite/g++.dg/parse/qualified1.C
! 824f236b15bcc9ff8b13f7275ea14210  gcc/testsuite/g++.dg/parse/qualified2.C
  322abe6d2d840b6218ecf16b70637d21  gcc/testsuite/g++.dg/parse/qualified3.C
! d58864cd4550e9a43e5536d8ea904e26  gcc/testsuite/g++.dg/parse/qualified4.C
  5f4c2303e76572835b5428d77b8b77ec  gcc/testsuite/g++.dg/parse/qualified5.C
  8d6d8891281e77e95edf66cda3bc270f  gcc/testsuite/g++.dg/parse/redef1.C
  ea5aebd8cd9820744d1d08f3b5429dca  gcc/testsuite/g++.dg/parse/redef2.C
--- 19823,19831 ----
  dff028e4d56c0efe2459f89320ef7cb9  gcc/testsuite/g++.dg/parse/ptrmem8.C
  83d63dd38efaf7bc7408deb85bde6d3d  gcc/testsuite/g++.dg/parse/pure1.C
  ee6ac3b84366a978a8fd11d55b342fb7  gcc/testsuite/g++.dg/parse/qualified1.C
! ed8b4046f6c267966d1156016f2f0431  gcc/testsuite/g++.dg/parse/qualified2.C
  322abe6d2d840b6218ecf16b70637d21  gcc/testsuite/g++.dg/parse/qualified3.C
! c6c725343704e95eb7f4ce2862bce46b  gcc/testsuite/g++.dg/parse/qualified4.C
  5f4c2303e76572835b5428d77b8b77ec  gcc/testsuite/g++.dg/parse/qualified5.C
  8d6d8891281e77e95edf66cda3bc270f  gcc/testsuite/g++.dg/parse/redef1.C
  ea5aebd8cd9820744d1d08f3b5429dca  gcc/testsuite/g++.dg/parse/redef2.C
*************** ea5aebd8cd9820744d1d08f3b5429dca  gcc/te
*** 18510,18525 ****
  70d93639ad9e4d1ee8748d9329dfae12  gcc/testsuite/g++.dg/parse/ref-qual2.C
  176cd37bac0e17d41ebe5f535df4a12c  gcc/testsuite/g++.dg/parse/ref1.C
  f9babc052a10c42b02c583bc9286f32e  gcc/testsuite/g++.dg/parse/register1.C
- 1008124642cb50fbc6e32845b1adbbae  gcc/testsuite/g++.dg/parse/repo1.C
  b935282cf7b22d6ccc8bb31b59d7fc4e  gcc/testsuite/g++.dg/parse/ret-type1.C
  13053eb5bb0c2b4dc12f7851ae997d58  gcc/testsuite/g++.dg/parse/ret-type2.C
  36603b3c2926b20a0727d10d5f631e75  gcc/testsuite/g++.dg/parse/ret-type3.C
! e530f64c99db41cc95d651e0d08267bf  gcc/testsuite/g++.dg/parse/saved1.C
  fc1aa1723b96a5b64e903b9a5996746d  gcc/testsuite/g++.dg/parse/semicolon1.C
  c27fbdab5d948932264f8da44d8829bf  gcc/testsuite/g++.dg/parse/semicolon1.h
  2aebfb0ee2389784f14a1423d77f13b6  gcc/testsuite/g++.dg/parse/semicolon2.C
  dbc608a0f63d6d497e34ba23e90b8534  gcc/testsuite/g++.dg/parse/semicolon3.C
! 296d6acfa38d6b077a754229372acdb1  gcc/testsuite/g++.dg/parse/semicolon4.C
  5608a482d876b635a8861d2fcc647c45  gcc/testsuite/g++.dg/parse/specialization1.C
  26b1b9df5ec9177a6c137833bf34a120  gcc/testsuite/g++.dg/parse/stack1.C
  306b5f567acd6eaa85224e96d73ce3b9  gcc/testsuite/g++.dg/parse/stmtexpr1.C
--- 19833,19847 ----
  70d93639ad9e4d1ee8748d9329dfae12  gcc/testsuite/g++.dg/parse/ref-qual2.C
  176cd37bac0e17d41ebe5f535df4a12c  gcc/testsuite/g++.dg/parse/ref1.C
  f9babc052a10c42b02c583bc9286f32e  gcc/testsuite/g++.dg/parse/register1.C
  b935282cf7b22d6ccc8bb31b59d7fc4e  gcc/testsuite/g++.dg/parse/ret-type1.C
  13053eb5bb0c2b4dc12f7851ae997d58  gcc/testsuite/g++.dg/parse/ret-type2.C
  36603b3c2926b20a0727d10d5f631e75  gcc/testsuite/g++.dg/parse/ret-type3.C
! da5f48c91665f5aeac6ba2fb74d3f26b  gcc/testsuite/g++.dg/parse/saved1.C
  fc1aa1723b96a5b64e903b9a5996746d  gcc/testsuite/g++.dg/parse/semicolon1.C
  c27fbdab5d948932264f8da44d8829bf  gcc/testsuite/g++.dg/parse/semicolon1.h
  2aebfb0ee2389784f14a1423d77f13b6  gcc/testsuite/g++.dg/parse/semicolon2.C
  dbc608a0f63d6d497e34ba23e90b8534  gcc/testsuite/g++.dg/parse/semicolon3.C
! 3696d4c9440187236bc90cf761d02873  gcc/testsuite/g++.dg/parse/semicolon4.C
  5608a482d876b635a8861d2fcc647c45  gcc/testsuite/g++.dg/parse/specialization1.C
  26b1b9df5ec9177a6c137833bf34a120  gcc/testsuite/g++.dg/parse/stack1.C
  306b5f567acd6eaa85224e96d73ce3b9  gcc/testsuite/g++.dg/parse/stmtexpr1.C
*************** ccda843a2ca5dc21854ae45c663fcbad  gcc/te
*** 18543,18549 ****
  28909671f33bd21fb848fe0c1fa14d4d  gcc/testsuite/g++.dg/parse/template17.C
  21a7e0a623d36278bd4a022fb38512fb  gcc/testsuite/g++.dg/parse/template18.C
  d9c0c19ed47afc7da8f6bd80eebada3a  gcc/testsuite/g++.dg/parse/template19.C
! a44a3981b4dc5f50bc85416f6cd9db97  gcc/testsuite/g++.dg/parse/template2.C
  b7b8ce1da8b4f096c9bf00a54541b5cc  gcc/testsuite/g++.dg/parse/template20.C
  cdeae758bf6e47b2afe6918f9464d5cd  gcc/testsuite/g++.dg/parse/template21.C
  d78d3545746fb82961904ad1f53e768d  gcc/testsuite/g++.dg/parse/template22.C
--- 19865,19871 ----
  28909671f33bd21fb848fe0c1fa14d4d  gcc/testsuite/g++.dg/parse/template17.C
  21a7e0a623d36278bd4a022fb38512fb  gcc/testsuite/g++.dg/parse/template18.C
  d9c0c19ed47afc7da8f6bd80eebada3a  gcc/testsuite/g++.dg/parse/template19.C
! 6b40568bdbad53032a96cfdb15c0ab9c  gcc/testsuite/g++.dg/parse/template2.C
  b7b8ce1da8b4f096c9bf00a54541b5cc  gcc/testsuite/g++.dg/parse/template20.C
  cdeae758bf6e47b2afe6918f9464d5cd  gcc/testsuite/g++.dg/parse/template21.C
  d78d3545746fb82961904ad1f53e768d  gcc/testsuite/g++.dg/parse/template22.C
*************** ad10de81d76fff3ac6f0d42c5b013580  gcc/te
*** 18552,18560 ****
  273ae361a87c0391ccbbe442c86d676e  gcc/testsuite/g++.dg/parse/template25.C
  24209fc47c8bc3374fae451404dbd2df  gcc/testsuite/g++.dg/parse/template26.C
  ba5fea52e589d10cf797adaaeee748ac  gcc/testsuite/g++.dg/parse/template27.C
! fe811f9a2d970dd98425b038df28962b  gcc/testsuite/g++.dg/parse/template28.C
  152e03aa0bab781e753c83dfb1e3c3cd  gcc/testsuite/g++.dg/parse/template29.C
! e079aef6e66a2f031f6a3098cf5c3d94  gcc/testsuite/g++.dg/parse/template3.C
  17872444c3e507c8ec724d519d4c6457  gcc/testsuite/g++.dg/parse/template4.C
  eb5012efbf2e76d0649338687d64eab1  gcc/testsuite/g++.dg/parse/template5.C
  36ce6bc0b81d40546501089e276c612d  gcc/testsuite/g++.dg/parse/template6.C
--- 19874,19882 ----
  273ae361a87c0391ccbbe442c86d676e  gcc/testsuite/g++.dg/parse/template25.C
  24209fc47c8bc3374fae451404dbd2df  gcc/testsuite/g++.dg/parse/template26.C
  ba5fea52e589d10cf797adaaeee748ac  gcc/testsuite/g++.dg/parse/template27.C
! b317dcf6b71b7e1a1d6798916661f4ff  gcc/testsuite/g++.dg/parse/template28.C
  152e03aa0bab781e753c83dfb1e3c3cd  gcc/testsuite/g++.dg/parse/template29.C
! a31feb6abdee70df8465893bfc01cc3f  gcc/testsuite/g++.dg/parse/template3.C
  17872444c3e507c8ec724d519d4c6457  gcc/testsuite/g++.dg/parse/template4.C
  eb5012efbf2e76d0649338687d64eab1  gcc/testsuite/g++.dg/parse/template5.C
  36ce6bc0b81d40546501089e276c612d  gcc/testsuite/g++.dg/parse/template6.C
*************** f60ae2ded91ec2dc8a237b91d1282751  gcc/te
*** 18575,18587 ****
  174e24e49c802ceec036dddc815a14ff  gcc/testsuite/g++.dg/parse/typedef6.C
  71e8821fc281e76f6affdbe9259cfad2  gcc/testsuite/g++.dg/parse/typedef7.C
  3a7fa2191253cc54b8efb130ada64f4e  gcc/testsuite/g++.dg/parse/typedef8.C
! 81a5a8a38ef087a12d91190b90e80423  gcc/testsuite/g++.dg/parse/typedef9.C
  816e586cce785bd66d07622b7e076afe  gcc/testsuite/g++.dg/parse/typename1.C
  31eb059e3dbe1b34a067aafb14847fb8  gcc/testsuite/g++.dg/parse/typename10.C
  64a5e2233cb17dc3965d138957943c52  gcc/testsuite/g++.dg/parse/typename11.C
  cbccebd52f80be1acc21283b8d2ec373  gcc/testsuite/g++.dg/parse/typename2.C
  395c7fdd493455c7e9ebc3b33b0a1c1c  gcc/testsuite/g++.dg/parse/typename3.C
! 95be08d8904a9272cf1346d3a396852b  gcc/testsuite/g++.dg/parse/typename4.C
  979c20e0b12da5f2d9ab3fc8b1d0e674  gcc/testsuite/g++.dg/parse/typename5.C
  4b927bd8b5a48134a8c3189cc3af28b3  gcc/testsuite/g++.dg/parse/typename6.C
  421915ff4fa7afa0ee5427c10622ecb8  gcc/testsuite/g++.dg/parse/typename7.C
--- 19897,19909 ----
  174e24e49c802ceec036dddc815a14ff  gcc/testsuite/g++.dg/parse/typedef6.C
  71e8821fc281e76f6affdbe9259cfad2  gcc/testsuite/g++.dg/parse/typedef7.C
  3a7fa2191253cc54b8efb130ada64f4e  gcc/testsuite/g++.dg/parse/typedef8.C
! 8d023d15ec15c8c668eeaa5774614087  gcc/testsuite/g++.dg/parse/typedef9.C
  816e586cce785bd66d07622b7e076afe  gcc/testsuite/g++.dg/parse/typename1.C
  31eb059e3dbe1b34a067aafb14847fb8  gcc/testsuite/g++.dg/parse/typename10.C
  64a5e2233cb17dc3965d138957943c52  gcc/testsuite/g++.dg/parse/typename11.C
  cbccebd52f80be1acc21283b8d2ec373  gcc/testsuite/g++.dg/parse/typename2.C
  395c7fdd493455c7e9ebc3b33b0a1c1c  gcc/testsuite/g++.dg/parse/typename3.C
! a7bf52f847dc688d8603b5d1b1ca8521  gcc/testsuite/g++.dg/parse/typename4.C
  979c20e0b12da5f2d9ab3fc8b1d0e674  gcc/testsuite/g++.dg/parse/typename5.C
  4b927bd8b5a48134a8c3189cc3af28b3  gcc/testsuite/g++.dg/parse/typename6.C
  421915ff4fa7afa0ee5427c10622ecb8  gcc/testsuite/g++.dg/parse/typename7.C
*************** fc99557b544b211def78f05030375621  gcc/te
*** 18590,18596 ****
  4d4dcf31f0a26386e361aca8846521cc  gcc/testsuite/g++.dg/parse/typespec1.C
  ad9b24c5c7ea39c6bc5b3c4d8a5e8dee  gcc/testsuite/g++.dg/parse/undefined1.C
  0d9c002feba0c28525ef93144889e786  gcc/testsuite/g++.dg/parse/undefined2.C
! 6e1b295c76607b6498e4d28f8752eeb8  gcc/testsuite/g++.dg/parse/undefined3.C
  be0c14c201a30f9cc491685549d8902d  gcc/testsuite/g++.dg/parse/undefined4.C
  e831cec93609978519f8f94b9c7e0a97  gcc/testsuite/g++.dg/parse/undefined5.C
  3c77b612897459ac063cdd9973cc337f  gcc/testsuite/g++.dg/parse/undefined6.C
--- 19912,19918 ----
  4d4dcf31f0a26386e361aca8846521cc  gcc/testsuite/g++.dg/parse/typespec1.C
  ad9b24c5c7ea39c6bc5b3c4d8a5e8dee  gcc/testsuite/g++.dg/parse/undefined1.C
  0d9c002feba0c28525ef93144889e786  gcc/testsuite/g++.dg/parse/undefined2.C
! 40fdc14129aafe3083d6c0064dcca9b7  gcc/testsuite/g++.dg/parse/undefined3.C
  be0c14c201a30f9cc491685549d8902d  gcc/testsuite/g++.dg/parse/undefined4.C
  e831cec93609978519f8f94b9c7e0a97  gcc/testsuite/g++.dg/parse/undefined5.C
  3c77b612897459ac063cdd9973cc337f  gcc/testsuite/g++.dg/parse/undefined6.C
*************** ac80fae137a8a1ef9021d6e173ca8090  gcc/te
*** 18604,18609 ****
--- 19926,19933 ----
  2b4ab97a787e4e5ab0056f2bb0da4a6d  gcc/testsuite/g++.dg/parse/varmod1.C
  6895221c8d28bc215f1619b23cf1dd6b  gcc/testsuite/g++.dg/parse/virtual1.C
  87484ba10cbb539c4f84ec334125b020  gcc/testsuite/g++.dg/parse/wrong-inline1.C
+ 3b7f93d421f56bd4eaca197e5732bc2a  gcc/testsuite/g++.dg/pch/Wmismatched-tags.C
+ ae429900c7987c641366e269c461650e  gcc/testsuite/g++.dg/pch/Wmismatched-tags.Hs
  d9064b328bf2156a9e67df26156ec572  gcc/testsuite/g++.dg/pch/array-1.C
  83d74bee5cf081cef85c1fe007ee1ae0  gcc/testsuite/g++.dg/pch/array-1.Hs
  15aea326d8b4d518b4dadcac97f9f297  gcc/testsuite/g++.dg/pch/empty.C
*************** d41d8cd98f00b204e9800998ecf8427e  gcc/te
*** 18612,18622 ****
  51038396a6c08ae383fd050b30653dab  gcc/testsuite/g++.dg/pch/externc-1.Hs
  3456d98b10198c0bf9091088ba05d0f0  gcc/testsuite/g++.dg/pch/local-1.C
  1b5d28bf11bae4996001396e1ffe083b  gcc/testsuite/g++.dg/pch/local-1.Hs
  a42f209088bbce8d3650be5966861b6b  gcc/testsuite/g++.dg/pch/pch.C
  95603c8965412870090ed14011f4b123  gcc/testsuite/g++.dg/pch/pch.Hs
! 086a863a57a53b7240140ea068c43fdc  gcc/testsuite/g++.dg/pch/pch.exp
  a79b4c14973bc580e45325abf4c19b72  gcc/testsuite/g++.dg/pch/pr90326.C
  8733db8bb02cf7abd5d7d07601acc332  gcc/testsuite/g++.dg/pch/pr90326.Hs
  73dd9e7d0e0351552a2f49cc0882db47  gcc/testsuite/g++.dg/pch/static-1.C
  4aaad0cfa4436b8cd8b37b1bf218edc8  gcc/testsuite/g++.dg/pch/static-1.Hs
  a5379c2bad433698a01b3bc2d5473a2e  gcc/testsuite/g++.dg/pch/system-1.C
--- 19936,19950 ----
  51038396a6c08ae383fd050b30653dab  gcc/testsuite/g++.dg/pch/externc-1.Hs
  3456d98b10198c0bf9091088ba05d0f0  gcc/testsuite/g++.dg/pch/local-1.C
  1b5d28bf11bae4996001396e1ffe083b  gcc/testsuite/g++.dg/pch/local-1.Hs
+ f9271dce9d7980fa8b426246ec2b9126  gcc/testsuite/g++.dg/pch/operator-1.C
+ 4a61ad56a41cb4cbee40e9821143277c  gcc/testsuite/g++.dg/pch/operator-1.Hs
  a42f209088bbce8d3650be5966861b6b  gcc/testsuite/g++.dg/pch/pch.C
  95603c8965412870090ed14011f4b123  gcc/testsuite/g++.dg/pch/pch.Hs
! 689a9946b16a4ee6a07f717440f6b70c  gcc/testsuite/g++.dg/pch/pch.exp
  a79b4c14973bc580e45325abf4c19b72  gcc/testsuite/g++.dg/pch/pr90326.C
  8733db8bb02cf7abd5d7d07601acc332  gcc/testsuite/g++.dg/pch/pr90326.Hs
+ f820a691997c43f0fd5a910e8712635b  gcc/testsuite/g++.dg/pch/pr92458.C
+ e9ae8a849e2de0433a9a6c5964f76889  gcc/testsuite/g++.dg/pch/pr92458.Hs
  73dd9e7d0e0351552a2f49cc0882db47  gcc/testsuite/g++.dg/pch/static-1.C
  4aaad0cfa4436b8cd8b37b1bf218edc8  gcc/testsuite/g++.dg/pch/static-1.Hs
  a5379c2bad433698a01b3bc2d5473a2e  gcc/testsuite/g++.dg/pch/system-1.C
*************** eee78b3feee80f24a70dface0869a07e  gcc/te
*** 18643,18649 ****
  3f89fe2cf6d913c11fe72de567ff1303  gcc/testsuite/g++.dg/plugin/dumb_plugin.c
  b393922db8d338bed7f3bcf037edd19c  gcc/testsuite/g++.dg/plugin/header-plugin-test.C
  3a80079be7a0bfd6f8efce4de8795fcb  gcc/testsuite/g++.dg/plugin/header_plugin.c
! a6dd577a0f59a5a36eef7bdb89acbf2a  gcc/testsuite/g++.dg/plugin/plugin.exp
  0555e81b1b7c9c8e06b4e9d9ffccb7ff  gcc/testsuite/g++.dg/plugin/pragma_plugin-test-1.C
  bb9719af4ef365b9625ed93e9794b8b2  gcc/testsuite/g++.dg/plugin/pragma_plugin.c
  503f96544096dfaa1ea93338e21923ff  gcc/testsuite/g++.dg/plugin/self-assign-test-1.C
--- 19971,19977 ----
  3f89fe2cf6d913c11fe72de567ff1303  gcc/testsuite/g++.dg/plugin/dumb_plugin.c
  b393922db8d338bed7f3bcf037edd19c  gcc/testsuite/g++.dg/plugin/header-plugin-test.C
  3a80079be7a0bfd6f8efce4de8795fcb  gcc/testsuite/g++.dg/plugin/header_plugin.c
! 0dc5c9d3e973321bd682f09fe9ad86d6  gcc/testsuite/g++.dg/plugin/plugin.exp
  0555e81b1b7c9c8e06b4e9d9ffccb7ff  gcc/testsuite/g++.dg/plugin/pragma_plugin-test-1.C
  bb9719af4ef365b9625ed93e9794b8b2  gcc/testsuite/g++.dg/plugin/pragma_plugin.c
  503f96544096dfaa1ea93338e21923ff  gcc/testsuite/g++.dg/plugin/self-assign-test-1.C
*************** f1579266bed8aff77e6a7423b465785d  gcc/te
*** 18685,18691 ****
  74f88cf4d95a2b57cb0298f30cf43468  gcc/testsuite/g++.dg/pr53037-2.C
  cc6a0609c1ad6e8374611de8a9b5749c  gcc/testsuite/g++.dg/pr53037-3.C
  1fad21ebd3029aa083079a53f62c0826  gcc/testsuite/g++.dg/pr53037-4.C
! acc9f7ed518d3bd847391a849c7741a3  gcc/testsuite/g++.dg/pr53055.C
  602b3ed9ed82ed3733e6a28dadc4d0e6  gcc/testsuite/g++.dg/pr54442.C
  da36360b1eaeaaf6b1adffefc9001717  gcc/testsuite/g++.dg/pr54655.C
  9deb7215258d8ff8a15e52e1fce39338  gcc/testsuite/g++.dg/pr55106.C
--- 20013,20019 ----
  74f88cf4d95a2b57cb0298f30cf43468  gcc/testsuite/g++.dg/pr53037-2.C
  cc6a0609c1ad6e8374611de8a9b5749c  gcc/testsuite/g++.dg/pr53037-3.C
  1fad21ebd3029aa083079a53f62c0826  gcc/testsuite/g++.dg/pr53037-4.C
! 0b9eb0c4f1c54889f863cda45ee97771  gcc/testsuite/g++.dg/pr53055.C
  602b3ed9ed82ed3733e6a28dadc4d0e6  gcc/testsuite/g++.dg/pr54442.C
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  9deb7215258d8ff8a15e52e1fce39338  gcc/testsuite/g++.dg/pr55106.C
*************** f30a79885e763e341eec192a87cfd3ff  gcc/te
*** 18704,18709 ****
--- 20032,20038 ----
  4afad787e09b4874a12312416375d3cb  gcc/testsuite/g++.dg/pr59482.C
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*************** bee8b26ef225678f65e45458f23ce109  gcc/te
*** 18787,18793 ****
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--- 20116,20122 ----
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*************** dcc31f0f329aae582ac1148fb671567d  gcc/te
*** 18820,18825 ****
--- 20149,20155 ----
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*************** d30d77c47257592a098c491dc29a80b1  gcc/te
*** 18836,18843 ****
--- 20166,20189 ----
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*************** df8a805281a95c255d57e5562a0c9c03  gcc/te
*** 18867,18882 ****
  b5e04568d275d9d8237df66b459409ef  gcc/testsuite/g++.dg/rtti/incomplete1.C
  c27356ab2343f10d43b1a2e8626535be  gcc/testsuite/g++.dg/rtti/missing-typeinfo-include.C
  11ddfffc9b05013900dc0f7fcf21274e  gcc/testsuite/g++.dg/rtti/no-rtti-voidptr.C
! 8f46e7645aa4679909b2df4d299e9558  gcc/testsuite/g++.dg/rtti/no-rtti.C
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  daac611a89b8fa8aa874e3b9f2cc9663  gcc/testsuite/g++.dg/rtti/tinfo1.C
  a4ca49fa3677bf87a27b0e961eab1cee  gcc/testsuite/g++.dg/rtti/typeid1.C
  4f9657fbf15f19dc450265533a091434  gcc/testsuite/g++.dg/rtti/typeid10.C
  abb0a844b41427d721a0b921b5335b24  gcc/testsuite/g++.dg/rtti/typeid11.C
  cd6d28f14e82cd6834a0a7c95a1ef1ee  gcc/testsuite/g++.dg/rtti/typeid12.C
  f03a5377eca516c74e77fcf76b40f948  gcc/testsuite/g++.dg/rtti/typeid2.C
  3e23755748cd7e94d3bc13c5d2f78cc9  gcc/testsuite/g++.dg/rtti/typeid3.C
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--- 20213,20229 ----
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  11ddfffc9b05013900dc0f7fcf21274e  gcc/testsuite/g++.dg/rtti/no-rtti-voidptr.C
! 2b60e8322ecfa1d5fc0875888ebb24e2  gcc/testsuite/g++.dg/rtti/no-rtti.C
! e9bf87f7b1f007ecb7dfa626ecb78f6c  gcc/testsuite/g++.dg/rtti/pr83534.C
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  d53958b1de4c01a672e8ec50c3bfa248  gcc/testsuite/g++.dg/rtti/predefined-rtti-macro-2.C
  bce635f684a724553abba95d702b1cb8  gcc/testsuite/g++.dg/rtti/template1.C
  daac611a89b8fa8aa874e3b9f2cc9663  gcc/testsuite/g++.dg/rtti/tinfo1.C
  a4ca49fa3677bf87a27b0e961eab1cee  gcc/testsuite/g++.dg/rtti/typeid1.C
  4f9657fbf15f19dc450265533a091434  gcc/testsuite/g++.dg/rtti/typeid10.C
  abb0a844b41427d721a0b921b5335b24  gcc/testsuite/g++.dg/rtti/typeid11.C
  cd6d28f14e82cd6834a0a7c95a1ef1ee  gcc/testsuite/g++.dg/rtti/typeid12.C
+ 0a59597df37c7c17707fce47de09aef7  gcc/testsuite/g++.dg/rtti/typeid13.C
  f03a5377eca516c74e77fcf76b40f948  gcc/testsuite/g++.dg/rtti/typeid2.C
  3e23755748cd7e94d3bc13c5d2f78cc9  gcc/testsuite/g++.dg/rtti/typeid3.C
  f45226306cb853d7f47a657db3e4f853  gcc/testsuite/g++.dg/rtti/typeid4.C
*************** b0c0786c803eaf05e6755f729c87257e  gcc/te
*** 18888,18896 ****
  9645499a8d417e1ccb227d0c5593c669  gcc/testsuite/g++.dg/semicolon-fixits.C
  358da784b700bf42b91032b2ceb71406  gcc/testsuite/g++.dg/simulate-thread/atomics-1.C
  3357bf9a2204710e948cb278fb4c4266  gcc/testsuite/g++.dg/simulate-thread/atomics-2.C
! 7d0b29b093ebe7e8b1234401b37938d4  gcc/testsuite/g++.dg/simulate-thread/bitfields-2.C
! 7be1021de7b9da9e24c91957574a66c0  gcc/testsuite/g++.dg/simulate-thread/bitfields.C
! b0a6efe35e8f028599fcf5bde65f327d  gcc/testsuite/g++.dg/simulate-thread/simulate-thread.exp
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  8ed1bb09d81129e522f6ac6dce99d52a  gcc/testsuite/g++.dg/simulate-thread/simulate-thread.h
  2a467b197d39f6d623192355bbc4b5d3  gcc/testsuite/g++.dg/special/conpr-1.C
--- 20235,20243 ----
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  3357bf9a2204710e948cb278fb4c4266  gcc/testsuite/g++.dg/simulate-thread/atomics-2.C
! 0f9193c70bd9c12ca05e5645fdd35442  gcc/testsuite/g++.dg/simulate-thread/bitfields-2.C
! f9a70819a6e534b6c462618926ea0a80  gcc/testsuite/g++.dg/simulate-thread/bitfields.C
! 3074d0bcd3f9155983534d8a8c3f4cea  gcc/testsuite/g++.dg/simulate-thread/simulate-thread.exp
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  8ed1bb09d81129e522f6ac6dce99d52a  gcc/testsuite/g++.dg/simulate-thread/simulate-thread.h
  2a467b197d39f6d623192355bbc4b5d3  gcc/testsuite/g++.dg/special/conpr-1.C
*************** ce313483756ae4ae75458a512a089656  gcc/te
*** 18900,18906 ****
  09034a812fccea6ecaa6edd2f8089fc9  gcc/testsuite/g++.dg/special/conpr-3a.cc
  0d5597e1f29008b02b626a0d09bf9c34  gcc/testsuite/g++.dg/special/conpr-3b.cc
  a0eb468046d5e36275ade20495e2f0c4  gcc/testsuite/g++.dg/special/conpr-4.C
! f51b28760b0d5308bc1fd12ae02a0886  gcc/testsuite/g++.dg/special/ecos.exp
  d646642e04b6f7a6bb987dddc08a0268  gcc/testsuite/g++.dg/special/initp1.C
  ae5f6e9b349b6bd54b510d6f4e11eab0  gcc/testsuite/g++.dg/special/initpri1.C
  495d2d9e552898de91e04d1536c2d0bc  gcc/testsuite/g++.dg/special/initpri2.C
--- 20247,20253 ----
  09034a812fccea6ecaa6edd2f8089fc9  gcc/testsuite/g++.dg/special/conpr-3a.cc
  0d5597e1f29008b02b626a0d09bf9c34  gcc/testsuite/g++.dg/special/conpr-3b.cc
  a0eb468046d5e36275ade20495e2f0c4  gcc/testsuite/g++.dg/special/conpr-4.C
! 5e86b2c0ba1c76afe6d7725c8f765b28  gcc/testsuite/g++.dg/special/ecos.exp
  d646642e04b6f7a6bb987dddc08a0268  gcc/testsuite/g++.dg/special/initp1.C
  ae5f6e9b349b6bd54b510d6f4e11eab0  gcc/testsuite/g++.dg/special/initpri1.C
  495d2d9e552898de91e04d1536c2d0bc  gcc/testsuite/g++.dg/special/initpri2.C
*************** f5d8d2f92f0dbaa3ca7558a778137fb3  gcc/te
*** 18920,18926 ****
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  46f61fb2a7c1973c8e816d526bb76ffc  gcc/testsuite/g++.dg/spellcheck-stdlib.C
! 5226a271da12f1e92793dddaf0443429  gcc/testsuite/g++.dg/spellcheck-typenames.C
  9ad7d6448de7763f41feba51662efa9e  gcc/testsuite/g++.dg/sso-1.C
  3effe360372112f0a4945b07676db736  gcc/testsuite/g++.dg/sso-2.C
  bd131607abeb702a0c04932a3e443c5d  gcc/testsuite/g++.dg/stackprotectexplicit2.C
--- 20267,20273 ----
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  46f61fb2a7c1973c8e816d526bb76ffc  gcc/testsuite/g++.dg/spellcheck-stdlib.C
! a347a630d5e9c05f18b4d187be4879a1  gcc/testsuite/g++.dg/spellcheck-typenames.C
  9ad7d6448de7763f41feba51662efa9e  gcc/testsuite/g++.dg/sso-1.C
  3effe360372112f0a4945b07676db736  gcc/testsuite/g++.dg/sso-2.C
  bd131607abeb702a0c04932a3e443c5d  gcc/testsuite/g++.dg/stackprotectexplicit2.C
*************** dd2defc24babdb2f3aa8673df9c6f9ee  gcc/te
*** 18932,18938 ****
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  0af74303a4251b24669c368429e4af91  gcc/testsuite/g++.dg/tc1/dr135.C
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  4293e24bf448b6ddc91f799f06874284  gcc/testsuite/g++.dg/tc1/dr147.C
  db994e5b10fcb3e8ba3d62cd17b3ae65  gcc/testsuite/g++.dg/tc1/dr152.C
--- 20279,20285 ----
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  4293e24bf448b6ddc91f799f06874284  gcc/testsuite/g++.dg/tc1/dr147.C
  db994e5b10fcb3e8ba3d62cd17b3ae65  gcc/testsuite/g++.dg/tc1/dr152.C
*************** cb999728c2f55f8eb566e7b89e2c6991  gcc/te
*** 19037,19042 ****
--- 20384,20391 ----
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  58bf2945c28e88b34cd3972d57fea390  gcc/testsuite/g++.dg/template/array32.C
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  c557bdb58ff52b9fc368185880923627  gcc/testsuite/g++.dg/template/array5.C
  294448858892b33e7116237b86ab785a  gcc/testsuite/g++.dg/template/array6.C
*************** fc503a6c4d63b92622d495b917629877  gcc/te
*** 19055,19060 ****
--- 20404,20410 ----
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  479ce6c62d0ab31928edd3bcef27bd5c  gcc/testsuite/g++.dg/template/builtin1.C
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  11d89720e8ea4a5f11553338c13ffab9  gcc/testsuite/g++.dg/template/call1.C
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  938ec709598c5f0853b88b4eb0ccdebb  gcc/testsuite/g++.dg/template/call3.C
*************** ad0e0128dad7b2d09241fb6a378fc1d5  gcc/te
*** 19067,19072 ****
--- 20417,20423 ----
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  aa7133ad1bbd90029e808f551c0b104d  gcc/testsuite/g++.dg/template/canon-type-12.C
  2362e973e8b912676ccc13f84fcc1ab3  gcc/testsuite/g++.dg/template/canon-type-13.C
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  cb422094173e29b6267dd8e869190b16  gcc/testsuite/g++.dg/template/canon-type-2.C
  6dd8c537054ea8cf4d688cc3066c6c21  gcc/testsuite/g++.dg/template/canon-type-3.C
  6182badf792f2a554489f1b490e70bc3  gcc/testsuite/g++.dg/template/canon-type-4.C
*************** d4dd1fcb5ba5fa6c770548eb750325c0  gcc/te
*** 19078,19084 ****
  dae4547b0ed98c262ad1adff2778e177  gcc/testsuite/g++.dg/template/cast1.C
  e37c2b4d718f2648117dc43cd2edf39d  gcc/testsuite/g++.dg/template/cast2.C
  f715bb7e6f7666f67d1ebfc95f66935e  gcc/testsuite/g++.dg/template/cast3.C
! 00403e2a204e7a49863de00b098c5b1f  gcc/testsuite/g++.dg/template/cast4.C
  f5d2e883a8bc60334451d54c7ef5bef7  gcc/testsuite/g++.dg/template/cast5.C
  bff0337fddd26da8a7224599975ab1ba  gcc/testsuite/g++.dg/template/char1.C
  706f2857327f695c7b984df9d14be0b0  gcc/testsuite/g++.dg/template/class1.C
--- 20429,20435 ----
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  e37c2b4d718f2648117dc43cd2edf39d  gcc/testsuite/g++.dg/template/cast2.C
  f715bb7e6f7666f67d1ebfc95f66935e  gcc/testsuite/g++.dg/template/cast3.C
! ecc63f230e45932f5db42d1a44143758  gcc/testsuite/g++.dg/template/cast4.C
  f5d2e883a8bc60334451d54c7ef5bef7  gcc/testsuite/g++.dg/template/cast5.C
  bff0337fddd26da8a7224599975ab1ba  gcc/testsuite/g++.dg/template/char1.C
  706f2857327f695c7b984df9d14be0b0  gcc/testsuite/g++.dg/template/class1.C
*************** f75072de1c2abdfca708b732cbfafa89  gcc/te
*** 19129,19138 ****
  1225a54926913e691b51137aef8b5d33  gcc/testsuite/g++.dg/template/crash104.C
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  ebe8deab4ad98d26b1d7546c1959a48b  gcc/testsuite/g++.dg/template/crash106.C
! a204ce299df15336913984b550e2db8b  gcc/testsuite/g++.dg/template/crash107.C
  01e34c6dbadd8c372851425abdb78adb  gcc/testsuite/g++.dg/template/crash108.C
  b3167df4bc44e634fce27a27e383e9a4  gcc/testsuite/g++.dg/template/crash109.C
! 5fdda9a20dcbd6e2fccb01f28292529e  gcc/testsuite/g++.dg/template/crash11.C
  bc34a5c1a684295dab662a89dc6697f6  gcc/testsuite/g++.dg/template/crash110.C
  f5c17c8c05a6c2d1d6b29054c88125a1  gcc/testsuite/g++.dg/template/crash111.C
  cafccb8ed409984b3ee5d4f9079957fa  gcc/testsuite/g++.dg/template/crash112.C
--- 20480,20489 ----
  1225a54926913e691b51137aef8b5d33  gcc/testsuite/g++.dg/template/crash104.C
  f07fd8a3820e9db30fbbab54d71dd891  gcc/testsuite/g++.dg/template/crash105.C
  ebe8deab4ad98d26b1d7546c1959a48b  gcc/testsuite/g++.dg/template/crash106.C
! a644730d37dada35a360aa5de1995f15  gcc/testsuite/g++.dg/template/crash107.C
  01e34c6dbadd8c372851425abdb78adb  gcc/testsuite/g++.dg/template/crash108.C
  b3167df4bc44e634fce27a27e383e9a4  gcc/testsuite/g++.dg/template/crash109.C
! b9d6c3e2462b2f141eef9706fb73f7ad  gcc/testsuite/g++.dg/template/crash11.C
  bc34a5c1a684295dab662a89dc6697f6  gcc/testsuite/g++.dg/template/crash110.C
  f5c17c8c05a6c2d1d6b29054c88125a1  gcc/testsuite/g++.dg/template/crash111.C
  cafccb8ed409984b3ee5d4f9079957fa  gcc/testsuite/g++.dg/template/crash112.C
*************** b1116241a73655533d853dad64261e36  gcc/te
*** 19150,19159 ****
  6c76fd060efb8d3d16a5ce603ea37df4  gcc/testsuite/g++.dg/template/crash123.C
  c081ec235535cb35db6b7c0cf3a35a8a  gcc/testsuite/g++.dg/template/crash124.C
  f3479c12a0b2990faeabcc639e8885b8  gcc/testsuite/g++.dg/template/crash125.C
! e2df4755b705d65c5f03e5d7f96d1681  gcc/testsuite/g++.dg/template/crash126.C
  57936c898c1f5b0a70cc981318924dd6  gcc/testsuite/g++.dg/template/crash127.C
  d14caefc036fb29a67deb7bc23946ad0  gcc/testsuite/g++.dg/template/crash128.C
! a19de9e040170e24f1092d33f6fd9739  gcc/testsuite/g++.dg/template/crash129.C
  df27fa537f93cbc7c2d2e1f1d60aee3e  gcc/testsuite/g++.dg/template/crash13.C
  9c6b765ef2765893236204902d1a1e19  gcc/testsuite/g++.dg/template/crash130.C
  89f747766be706a5f5c19c7e4868993b  gcc/testsuite/g++.dg/template/crash131.C
--- 20501,20510 ----
  6c76fd060efb8d3d16a5ce603ea37df4  gcc/testsuite/g++.dg/template/crash123.C
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  f3479c12a0b2990faeabcc639e8885b8  gcc/testsuite/g++.dg/template/crash125.C
! 7453dcdcd734927985213354703f9e57  gcc/testsuite/g++.dg/template/crash126.C
  57936c898c1f5b0a70cc981318924dd6  gcc/testsuite/g++.dg/template/crash127.C
  d14caefc036fb29a67deb7bc23946ad0  gcc/testsuite/g++.dg/template/crash128.C
! 52304a1015e0bac33aaf9df726573896  gcc/testsuite/g++.dg/template/crash129.C
  df27fa537f93cbc7c2d2e1f1d60aee3e  gcc/testsuite/g++.dg/template/crash13.C
  9c6b765ef2765893236204902d1a1e19  gcc/testsuite/g++.dg/template/crash130.C
  89f747766be706a5f5c19c7e4868993b  gcc/testsuite/g++.dg/template/crash131.C
*************** c422942e29cb019f6814e83fa47ae512  gcc/te
*** 19176,19182 ****
  ceec3c489e5f321a136749ba214020ac  gcc/testsuite/g++.dg/template/crash29.C
  18fc9fd079fbcb8ff4e2ad941df67718  gcc/testsuite/g++.dg/template/crash3.C
  4a6fae58852a7d58b5b482d48d97d11f  gcc/testsuite/g++.dg/template/crash30.C
! e3731e3425655eda73d8d1ac61cdadb3  gcc/testsuite/g++.dg/template/crash31.C
  b17b6f8116ba3725c4d80f6dcdfb1f41  gcc/testsuite/g++.dg/template/crash32.C
  204eff887d15d36069d7065b01240cf5  gcc/testsuite/g++.dg/template/crash33.C
  bf6a60d385cff1ad00eb767e73eefd5c  gcc/testsuite/g++.dg/template/crash34.C
--- 20527,20533 ----
  ceec3c489e5f321a136749ba214020ac  gcc/testsuite/g++.dg/template/crash29.C
  18fc9fd079fbcb8ff4e2ad941df67718  gcc/testsuite/g++.dg/template/crash3.C
  4a6fae58852a7d58b5b482d48d97d11f  gcc/testsuite/g++.dg/template/crash30.C
! 71ea8c79319e787eb01e907733721cb4  gcc/testsuite/g++.dg/template/crash31.C
  b17b6f8116ba3725c4d80f6dcdfb1f41  gcc/testsuite/g++.dg/template/crash32.C
  204eff887d15d36069d7065b01240cf5  gcc/testsuite/g++.dg/template/crash33.C
  bf6a60d385cff1ad00eb767e73eefd5c  gcc/testsuite/g++.dg/template/crash34.C
*************** fac18fbcfe10c67843c28437a6b92d3c  gcc/te
*** 19244,19251 ****
  e7ff2129d4e25ee3b9f96c6b85e5ebc9  gcc/testsuite/g++.dg/template/crash92.C
  6ce63664012487deb9533d83bc1200a8  gcc/testsuite/g++.dg/template/crash93.C
  ea031f0eed2506b6add80fa9a5f38b85  gcc/testsuite/g++.dg/template/crash94.C
! 48613c9685760a1851864e5684e9ef37  gcc/testsuite/g++.dg/template/crash95.C
! b80f828624f99069397d41d1df746903  gcc/testsuite/g++.dg/template/crash96.C
  6ba2d7480dc4dfca4ae6e172a79606be  gcc/testsuite/g++.dg/template/crash97.C
  04c7e0cdc041fdd2a9bee1cb186e590a  gcc/testsuite/g++.dg/template/crash98.C
  6fb58c8840c31d10b033d3d47d681397  gcc/testsuite/g++.dg/template/crash99.C
--- 20595,20602 ----
  e7ff2129d4e25ee3b9f96c6b85e5ebc9  gcc/testsuite/g++.dg/template/crash92.C
  6ce63664012487deb9533d83bc1200a8  gcc/testsuite/g++.dg/template/crash93.C
  ea031f0eed2506b6add80fa9a5f38b85  gcc/testsuite/g++.dg/template/crash94.C
! 62aaad56bac8ad0749cfc84832672ef3  gcc/testsuite/g++.dg/template/crash95.C
! 8fbf0ef06e0f56a7ef2367e035173b26  gcc/testsuite/g++.dg/template/crash96.C
  6ba2d7480dc4dfca4ae6e172a79606be  gcc/testsuite/g++.dg/template/crash97.C
  04c7e0cdc041fdd2a9bee1cb186e590a  gcc/testsuite/g++.dg/template/crash98.C
  6fb58c8840c31d10b033d3d47d681397  gcc/testsuite/g++.dg/template/crash99.C
*************** c2f7a35b429490ab54f2fba257ca0dd9  gcc/te
*** 19284,19289 ****
--- 20635,20641 ----
  21ce3e77355010aaab1b59936da8bfbb  gcc/testsuite/g++.dg/template/defarg2.C
  307285b77c17f229ecbeb4c647090190  gcc/testsuite/g++.dg/template/defarg20.C
  c96940bb22962f4c0c4140417e941221  gcc/testsuite/g++.dg/template/defarg21.C
+ 36be74ab38dfc08e2e1dd78b440aebf1  gcc/testsuite/g++.dg/template/defarg22.C
  e55baeaf118c452b9f707b8236ee86b1  gcc/testsuite/g++.dg/template/defarg3.C
  85fedaa782f4c82823c89324e1881131  gcc/testsuite/g++.dg/template/defarg4.C
  84d085b3ed907df1747cc523efd8d714  gcc/testsuite/g++.dg/template/defarg5.C
*************** f64b5dcbfa3d3051a358c8d1c1e8a878  gcc/te
*** 19297,19303 ****
  ba2918f2d50d14da19e142ac392345e1  gcc/testsuite/g++.dg/template/dependent-base1.C
  2cfeba0039a93060ff77245f34166e52  gcc/testsuite/g++.dg/template/dependent-base2.C
  1ea2af4911d47cd67d9e3ab837ef48bc  gcc/testsuite/g++.dg/template/dependent-base3.C
! 4e28ad3da9cf0f80841dd7ac6a9a0233  gcc/testsuite/g++.dg/template/dependent-expr1.C
  10b3f1b7a34c9d4e9be1e9844babd34d  gcc/testsuite/g++.dg/template/dependent-expr10.C
  6b486f8c9b9b318c76811eb21046957f  gcc/testsuite/g++.dg/template/dependent-expr2.C
  c4e64e51072726ff978403b12d3456bd  gcc/testsuite/g++.dg/template/dependent-expr3.C
--- 20649,20655 ----
  ba2918f2d50d14da19e142ac392345e1  gcc/testsuite/g++.dg/template/dependent-base1.C
  2cfeba0039a93060ff77245f34166e52  gcc/testsuite/g++.dg/template/dependent-base2.C
  1ea2af4911d47cd67d9e3ab837ef48bc  gcc/testsuite/g++.dg/template/dependent-base3.C
! d06a8849a0e0df87f9e222f08a6f4852  gcc/testsuite/g++.dg/template/dependent-expr1.C
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  c4e64e51072726ff978403b12d3456bd  gcc/testsuite/g++.dg/template/dependent-expr3.C
*************** a6a855c88d84687abcf1a8a2f07b7474  gcc/te
*** 19308,19331 ****
  4737236e0209f156af2f579c8f812df3  gcc/testsuite/g++.dg/template/dependent-expr8.C
  48741cfd5e6101e39d3729ba9701a900  gcc/testsuite/g++.dg/template/dependent-expr9.C
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! 0a800deadd0e10b850fb00419a74f717  gcc/testsuite/g++.dg/template/dependent-name5.C
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  24d110fcc400ef7bdd0cd7b6baead25e  gcc/testsuite/g++.dg/template/dr1391-1.C
  02af2091a050c58d8318a5ee3b8a4291  gcc/testsuite/g++.dg/template/dr1391-2.C
  5472fd91faffaa4b4851223ae373f7d8  gcc/testsuite/g++.dg/template/dr1391-3.C
  5df8658381333f348754c7590f128994  gcc/testsuite/g++.dg/template/dr408.C
  c10faccbba72797e793c4697fe233f9c  gcc/testsuite/g++.dg/template/dtor1.C
  1884ceace01fa586f2b2e401389c4d6c  gcc/testsuite/g++.dg/template/dtor10.C
! 71d10b5b4cd6cb6cb8f6be930603b8e8  gcc/testsuite/g++.dg/template/dtor2.C
  1a5ba691093323438c61f31621e88355  gcc/testsuite/g++.dg/template/dtor3.C
  6e56714a3e1899ea002e689d9f32a53f  gcc/testsuite/g++.dg/template/dtor4.C
  6df398ccb1fe455e5493303db41ea421  gcc/testsuite/g++.dg/template/dtor5.C
! 7dd092349bfef88439bfb6fe8f98d0e7  gcc/testsuite/g++.dg/template/dtor6.C
  4a814bc6794f74cc5cd4043a45a39370  gcc/testsuite/g++.dg/template/dtor7.C
  742d7a2b91f4f06a277defe5ec77d638  gcc/testsuite/g++.dg/template/dtor8.C
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--- 20660,20695 ----
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  f23d748a70179cdd1a4176b5cf3a3e9b  gcc/testsuite/g++.dg/template/dependent-name1.C
+ 5d3535d3fcf6e7154bcfbc441c633f2d  gcc/testsuite/g++.dg/template/dependent-name10.C
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+ 6497291d8f95dbcaebafb311bcecd4b5  gcc/testsuite/g++.dg/template/dependent-name13.C
+ 014e01792570089773bb7e6bdf655b23  gcc/testsuite/g++.dg/template/dependent-name14.C
  18d61b100652dfe4816b8b9c6cefa923  gcc/testsuite/g++.dg/template/dependent-name2.C
  03c5fb73327b7854a036dd70874ee185  gcc/testsuite/g++.dg/template/dependent-name3.C
  147338e18276d105fca28005404df2a8  gcc/testsuite/g++.dg/template/dependent-name4.C
! b8a3f97f4c5fa12408367f2ffbca371d  gcc/testsuite/g++.dg/template/dependent-name5.C
  a2d8358dfed423c4946dd5255b3cc157  gcc/testsuite/g++.dg/template/dependent-name6.C
+ 304737194f27ba0005e6174fec8e2270  gcc/testsuite/g++.dg/template/dependent-name7.C
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+ 0d70e119838e4a812a49bbd71a56c2fa  gcc/testsuite/g++.dg/template/dependent-name9.C
  613ac0918dbcfb8b08b6918921bf45f6  gcc/testsuite/g++.dg/template/dependent-scope1.C
  cbc02ebab52202016bb66877922a9029  gcc/testsuite/g++.dg/template/double-greater-than-fixit.C
  24d110fcc400ef7bdd0cd7b6baead25e  gcc/testsuite/g++.dg/template/dr1391-1.C
  02af2091a050c58d8318a5ee3b8a4291  gcc/testsuite/g++.dg/template/dr1391-2.C
  5472fd91faffaa4b4851223ae373f7d8  gcc/testsuite/g++.dg/template/dr1391-3.C
+ 1a8e98596f00e25b0ab88d23a824ba4a  gcc/testsuite/g++.dg/template/dr1710-2.C
+ d47d84957b39e391952332bc2c03bc5f  gcc/testsuite/g++.dg/template/dr1710.C
+ da49e3bfe08f2e0003c1ae998fbe1341  gcc/testsuite/g++.dg/template/dr1794.C
+ 50b3b1278dd6195a7b2ea7145da01d96  gcc/testsuite/g++.dg/template/dr314.C
  5df8658381333f348754c7590f128994  gcc/testsuite/g++.dg/template/dr408.C
  c10faccbba72797e793c4697fe233f9c  gcc/testsuite/g++.dg/template/dtor1.C
  1884ceace01fa586f2b2e401389c4d6c  gcc/testsuite/g++.dg/template/dtor10.C
! 9fd7932701e6809fa0bec2f61112a78d  gcc/testsuite/g++.dg/template/dtor2.C
  1a5ba691093323438c61f31621e88355  gcc/testsuite/g++.dg/template/dtor3.C
  6e56714a3e1899ea002e689d9f32a53f  gcc/testsuite/g++.dg/template/dtor4.C
  6df398ccb1fe455e5493303db41ea421  gcc/testsuite/g++.dg/template/dtor5.C
! 7c26bce0e147a736ed5e0ed0993c315e  gcc/testsuite/g++.dg/template/dtor6.C
  4a814bc6794f74cc5cd4043a45a39370  gcc/testsuite/g++.dg/template/dtor7.C
  742d7a2b91f4f06a277defe5ec77d638  gcc/testsuite/g++.dg/template/dtor8.C
  b9b01dec580fb1da9d89837046c6a698  gcc/testsuite/g++.dg/template/dtor9.C
*************** b3e2bbd8608c9f9206f9850201803c3c  gcc/te
*** 19353,19365 ****
  059b8fc25423ba0f718bb1feff4898e7  gcc/testsuite/g++.dg/template/error14.C
  72a66eb8df5214bdc911659c748dfa61  gcc/testsuite/g++.dg/template/error15.C
  709638c9b094e580ab80981a248856e2  gcc/testsuite/g++.dg/template/error16.C
! b6100523c45b3fb6ee58a738fa51eb7f  gcc/testsuite/g++.dg/template/error17.C
  e0e0adf8e99a8d206f7e74340f4b67e5  gcc/testsuite/g++.dg/template/error18.C
  c141fe6a264c757500f6ee4ed30842f6  gcc/testsuite/g++.dg/template/error19.C
  269f5e4cc9b32dd8bffd5303b263175b  gcc/testsuite/g++.dg/template/error2.C
  c76b01c2f7357d4400cd8e049826cc38  gcc/testsuite/g++.dg/template/error20.C
  d8c534ccbad9bbbc650685d274b0d2ca  gcc/testsuite/g++.dg/template/error21.C
! 54b3e85a8d8f9bc805e7795860ec08ba  gcc/testsuite/g++.dg/template/error22.C
  fa7f4116ebf37e2b57813ba48500f497  gcc/testsuite/g++.dg/template/error23.C
  6c54776e760954055280860b689859b0  gcc/testsuite/g++.dg/template/error24.C
  88e5836eca5b1d6a4995747486ad482a  gcc/testsuite/g++.dg/template/error25.C
--- 20717,20729 ----
  059b8fc25423ba0f718bb1feff4898e7  gcc/testsuite/g++.dg/template/error14.C
  72a66eb8df5214bdc911659c748dfa61  gcc/testsuite/g++.dg/template/error15.C
  709638c9b094e580ab80981a248856e2  gcc/testsuite/g++.dg/template/error16.C
! 101ff18fa1379ae7b1288e36ff799343  gcc/testsuite/g++.dg/template/error17.C
  e0e0adf8e99a8d206f7e74340f4b67e5  gcc/testsuite/g++.dg/template/error18.C
  c141fe6a264c757500f6ee4ed30842f6  gcc/testsuite/g++.dg/template/error19.C
  269f5e4cc9b32dd8bffd5303b263175b  gcc/testsuite/g++.dg/template/error2.C
  c76b01c2f7357d4400cd8e049826cc38  gcc/testsuite/g++.dg/template/error20.C
  d8c534ccbad9bbbc650685d274b0d2ca  gcc/testsuite/g++.dg/template/error21.C
! 0410b7c7bd9073553278277bf23f74ff  gcc/testsuite/g++.dg/template/error22.C
  fa7f4116ebf37e2b57813ba48500f497  gcc/testsuite/g++.dg/template/error23.C
  6c54776e760954055280860b689859b0  gcc/testsuite/g++.dg/template/error24.C
  88e5836eca5b1d6a4995747486ad482a  gcc/testsuite/g++.dg/template/error25.C
*************** dbb1788e9f2e9b977e0fb076e036e15d  gcc/te
*** 19378,19384 ****
  34ab2aefdfc2ee66c4a1c5d1830304e9  gcc/testsuite/g++.dg/template/error37.C
  ad5929ca4266aae58691ea1f8fae24e6  gcc/testsuite/g++.dg/template/error38.C
  20b72e33a910404fc40a48eb851375f6  gcc/testsuite/g++.dg/template/error39.C
! 441758a8704950ec9b1ec91b8e092546  gcc/testsuite/g++.dg/template/error4.C
  b9e41ae6abb7bd214530b9d8fee49b42  gcc/testsuite/g++.dg/template/error40.C
  69ccae3809305b08d23a96a1e4730072  gcc/testsuite/g++.dg/template/error41.C
  ab2750d62bfb7afdc283b7fa1c8c2a0a  gcc/testsuite/g++.dg/template/error42.C
--- 20742,20748 ----
  34ab2aefdfc2ee66c4a1c5d1830304e9  gcc/testsuite/g++.dg/template/error37.C
  ad5929ca4266aae58691ea1f8fae24e6  gcc/testsuite/g++.dg/template/error38.C
  20b72e33a910404fc40a48eb851375f6  gcc/testsuite/g++.dg/template/error39.C
! f141cefa67bbe6be0f8ee023996a1fbb  gcc/testsuite/g++.dg/template/error4.C
  b9e41ae6abb7bd214530b9d8fee49b42  gcc/testsuite/g++.dg/template/error40.C
  69ccae3809305b08d23a96a1e4730072  gcc/testsuite/g++.dg/template/error41.C
  ab2750d62bfb7afdc283b7fa1c8c2a0a  gcc/testsuite/g++.dg/template/error42.C
*************** d7dd197474ca91bf31cfac374404267d  gcc/te
*** 19401,19408 ****
  07b03a083081547de28e0a1afd970688  gcc/testsuite/g++.dg/template/error58.C
  8f931fa8690071fcefc2b1d1d7483bfc  gcc/testsuite/g++.dg/template/error6.C
  3eacbecd65bcd0b71a23a9e2127f6e27  gcc/testsuite/g++.dg/template/error7.C
! 087bbcdc150fa765a03be550dd7193ce  gcc/testsuite/g++.dg/template/error8.C
! 6c82c4d5cc4e1f6f70e1b41aa6299b35  gcc/testsuite/g++.dg/template/error9.C
  e55630cc11be91571d5b580292e51090  gcc/testsuite/g++.dg/template/explicit-args1.C
  8c9d021c07761a64a71d7ed3a6cbd9f8  gcc/testsuite/g++.dg/template/explicit-args2.C
  231648bc12e1dfdeee041e3845e82de6  gcc/testsuite/g++.dg/template/explicit-args3.C
--- 20765,20772 ----
  07b03a083081547de28e0a1afd970688  gcc/testsuite/g++.dg/template/error58.C
  8f931fa8690071fcefc2b1d1d7483bfc  gcc/testsuite/g++.dg/template/error6.C
  3eacbecd65bcd0b71a23a9e2127f6e27  gcc/testsuite/g++.dg/template/error7.C
! 2f875903b8471a6a88b171e0dd3303cc  gcc/testsuite/g++.dg/template/error8.C
! 140297b8d72a104b762af1a4e390e9ec  gcc/testsuite/g++.dg/template/error9.C
  e55630cc11be91571d5b580292e51090  gcc/testsuite/g++.dg/template/explicit-args1.C
  8c9d021c07761a64a71d7ed3a6cbd9f8  gcc/testsuite/g++.dg/template/explicit-args2.C
  231648bc12e1dfdeee041e3845e82de6  gcc/testsuite/g++.dg/template/explicit-args3.C
*************** f8aa89e0edae3ef78836a8cc046f0550  gcc/te
*** 19427,19432 ****
--- 20791,20797 ----
  fe166f987dc66815758e22b930f6d98b  gcc/testsuite/g++.dg/template/fn-ptr1.C
  bf4059583f0cb76eb21c8462cd632142  gcc/testsuite/g++.dg/template/fn-ptr2.C
  636ef7c6b9de68376146848db023fb19  gcc/testsuite/g++.dg/template/fn-ref1.C
+ f85ab66eeb2b191e2fee2b0b5013d956  gcc/testsuite/g++.dg/template/fn.C
  1581f9141ad183d6d31a009275ebf7a4  gcc/testsuite/g++.dg/template/fnspec1.C
  8f101d84c90c958381606b762e3df298  gcc/testsuite/g++.dg/template/fntry1.C
  c3025665d58f3b1443b5cbb53b5bd0f6  gcc/testsuite/g++.dg/template/fntype1.C
*************** af3470ca5b94b44392cb92a00a9fb40f  gcc/te
*** 19550,19555 ****
--- 20915,20921 ----
  1b62efdc0a239bb15d76fcf36d229cc0  gcc/testsuite/g++.dg/template/invalid1.C
  6dfc1674746db8a02b5504e177f5aca0  gcc/testsuite/g++.dg/template/koenig1.C
  d57d3d6b5c4c1d0a3fa0910f3184bb28  gcc/testsuite/g++.dg/template/koenig10.C
+ d7b25ce77b1c73d29c031fd124333dbd  gcc/testsuite/g++.dg/template/koenig11.C
  5e527c865bacdb52386cdb2f216a99d4  gcc/testsuite/g++.dg/template/koenig2.C
  84d2678d3ce8241c254dd0501f0e4816  gcc/testsuite/g++.dg/template/koenig3.C
  56c1c2325d188ec369a6eca6c10766b7  gcc/testsuite/g++.dg/template/koenig4.C
*************** b29c5ddfeb79a3077e908d0877024b79  gcc/te
*** 19625,19631 ****
  975bbbbf89c7ed7467afe0db4642b444  gcc/testsuite/g++.dg/template/memfriend8.C
  6602e9e6cba784386891556ebd44b430  gcc/testsuite/g++.dg/template/memfriend9.C
  0b0224d55a5044356c7f55ebe421be94  gcc/testsuite/g++.dg/template/meminit1.C
! b418805da2b07e19a198dabae3e5173c  gcc/testsuite/g++.dg/template/meminit2.C
  2814897eaaeccebed1436472d893ffd3  gcc/testsuite/g++.dg/template/meminit3.C
  a028161f345a592e44b9dd2c85780ba8  gcc/testsuite/g++.dg/template/memtmpl1.C
  742c5d9c3baa52309d717d8a67cb74e7  gcc/testsuite/g++.dg/template/memtmpl2.C
--- 20991,20997 ----
  975bbbbf89c7ed7467afe0db4642b444  gcc/testsuite/g++.dg/template/memfriend8.C
  6602e9e6cba784386891556ebd44b430  gcc/testsuite/g++.dg/template/memfriend9.C
  0b0224d55a5044356c7f55ebe421be94  gcc/testsuite/g++.dg/template/meminit1.C
! 026587e2d51c2680bc52fa4b2ad7bdbc  gcc/testsuite/g++.dg/template/meminit2.C
  2814897eaaeccebed1436472d893ffd3  gcc/testsuite/g++.dg/template/meminit3.C
  a028161f345a592e44b9dd2c85780ba8  gcc/testsuite/g++.dg/template/memtmpl1.C
  742c5d9c3baa52309d717d8a67cb74e7  gcc/testsuite/g++.dg/template/memtmpl2.C
*************** c74bd06e4f01d82b6dffe8568a9f9286  gcc/te
*** 19665,19675 ****
  7e000c3eaeb33b0cda5191bb78ee313d  gcc/testsuite/g++.dg/template/non-dependent5.C
  45dd220f658e86742366772757b041e2  gcc/testsuite/g++.dg/template/non-dependent6.C
  545ef1f20e531a9708266594092c6d03  gcc/testsuite/g++.dg/template/non-dependent7.C
! 663136a11c36aa84d57fc0129b2be73d  gcc/testsuite/g++.dg/template/non-dependent8.C
  d2f711147c60030525ec70290e759fca  gcc/testsuite/g++.dg/template/non-dependent9.C
  30d31ed2484da393d79f5ad4a32e80cf  gcc/testsuite/g++.dg/template/non-type-template-argument-1.C
  c68d85d18e13eca7b98c51e07b278cf0  gcc/testsuite/g++.dg/template/non-type1.C
! e92bd32946724dc8803563547ffb2982  gcc/testsuite/g++.dg/template/nontype-array1.C
  70124329ed68a5623ae87b10ff25d9a9  gcc/testsuite/g++.dg/template/nontype-fn1.C
  0841e0681f53f5792b711984e991f3a8  gcc/testsuite/g++.dg/template/nontype1.C
  e9af055ac6a0774b7565e0722c861adb  gcc/testsuite/g++.dg/template/nontype10.C
--- 21031,21041 ----
  7e000c3eaeb33b0cda5191bb78ee313d  gcc/testsuite/g++.dg/template/non-dependent5.C
  45dd220f658e86742366772757b041e2  gcc/testsuite/g++.dg/template/non-dependent6.C
  545ef1f20e531a9708266594092c6d03  gcc/testsuite/g++.dg/template/non-dependent7.C
! 6956333a03c9b3f02789158b1f79b2c4  gcc/testsuite/g++.dg/template/non-dependent8.C
  d2f711147c60030525ec70290e759fca  gcc/testsuite/g++.dg/template/non-dependent9.C
  30d31ed2484da393d79f5ad4a32e80cf  gcc/testsuite/g++.dg/template/non-type-template-argument-1.C
  c68d85d18e13eca7b98c51e07b278cf0  gcc/testsuite/g++.dg/template/non-type1.C
! 2a8af7d46f2f175c9f1fd57bb87efced  gcc/testsuite/g++.dg/template/nontype-array1.C
  70124329ed68a5623ae87b10ff25d9a9  gcc/testsuite/g++.dg/template/nontype-fn1.C
  0841e0681f53f5792b711984e991f3a8  gcc/testsuite/g++.dg/template/nontype1.C
  e9af055ac6a0774b7565e0722c861adb  gcc/testsuite/g++.dg/template/nontype10.C
*************** d17e17b15018e6bc4a807c47ac6956b7  gcc/te
*** 19693,19704 ****
  9fa0b3b07546b30d6e129c3bdd6ff439  gcc/testsuite/g++.dg/template/nontype27.C
  29426ea06c65ca7c3fa8d5ecd6177ab6  gcc/testsuite/g++.dg/template/nontype28.C
  dd760a40f589eabdc6ad0b0f974eddf2  gcc/testsuite/g++.dg/template/nontype29.C
! a6e414ec38367149b7b9e773db19cee0  gcc/testsuite/g++.dg/template/nontype3.C
  6b7e8b2d3824f0454ad886de81e794a3  gcc/testsuite/g++.dg/template/nontype4.C
  1b9356f2c2f64b75b3145a2a1f0fd55a  gcc/testsuite/g++.dg/template/nontype5.C
  40280792650dbefbd9ff94ba5cc5d03e  gcc/testsuite/g++.dg/template/nontype6.C
  067e989ca8724df7b1bbbef443eb9947  gcc/testsuite/g++.dg/template/nontype7.C
! 37e77168453ca0ef9499acbf0221f5e1  gcc/testsuite/g++.dg/template/nontype8.C
  5345b8ffaffe474e8bf43916398a25ef  gcc/testsuite/g++.dg/template/nontype9.C
  72688e70f855e78a966cd593acf9f923  gcc/testsuite/g++.dg/template/ntp1.C
  506fde7f525665b80bb8ae93c21fa34f  gcc/testsuite/g++.dg/template/ntp2.C
--- 21059,21070 ----
  9fa0b3b07546b30d6e129c3bdd6ff439  gcc/testsuite/g++.dg/template/nontype27.C
  29426ea06c65ca7c3fa8d5ecd6177ab6  gcc/testsuite/g++.dg/template/nontype28.C
  dd760a40f589eabdc6ad0b0f974eddf2  gcc/testsuite/g++.dg/template/nontype29.C
! a90bca38d3ce6988650e843cd4d6cf44  gcc/testsuite/g++.dg/template/nontype3.C
  6b7e8b2d3824f0454ad886de81e794a3  gcc/testsuite/g++.dg/template/nontype4.C
  1b9356f2c2f64b75b3145a2a1f0fd55a  gcc/testsuite/g++.dg/template/nontype5.C
  40280792650dbefbd9ff94ba5cc5d03e  gcc/testsuite/g++.dg/template/nontype6.C
  067e989ca8724df7b1bbbef443eb9947  gcc/testsuite/g++.dg/template/nontype7.C
! 2fa0b5151b9ddce38c818f64b671a73b  gcc/testsuite/g++.dg/template/nontype8.C
  5345b8ffaffe474e8bf43916398a25ef  gcc/testsuite/g++.dg/template/nontype9.C
  72688e70f855e78a966cd593acf9f923  gcc/testsuite/g++.dg/template/ntp1.C
  506fde7f525665b80bb8ae93c21fa34f  gcc/testsuite/g++.dg/template/ntp2.C
*************** eb35e1face3b65b2aae71fc55558b420  gcc/te
*** 19712,19725 ****
  33665504734fdf4b39f0165ee4e84f64  gcc/testsuite/g++.dg/template/operator12.C
  997b3c61e3112d55ee07873992fbec86  gcc/testsuite/g++.dg/template/operator13.C
  5fe3703cb59160fb82cf953a2d646ffb  gcc/testsuite/g++.dg/template/operator14.C
  08eba0ef43fd418e3505a0132a2e9c05  gcc/testsuite/g++.dg/template/operator2.C
  51da64bb1a35e2d4a874ecc36ed30236  gcc/testsuite/g++.dg/template/operator3.C
  7e567ad662951a97d90d67420df1d001  gcc/testsuite/g++.dg/template/operator4.C
  0e11abfb73c96739ad546cd85ff3c2e6  gcc/testsuite/g++.dg/template/operator5.C
! b5bc56bf214d4c012ea8de74a6dea853  gcc/testsuite/g++.dg/template/operator6.C
  98c4cd89cdbe74a78e512f93f452daa8  gcc/testsuite/g++.dg/template/operator7.C
! 73fd1218b3a9721a17fd158f618c638c  gcc/testsuite/g++.dg/template/operator8.C
! d7a7d0e4e1c797d6a9a7cf02e6a48274  gcc/testsuite/g++.dg/template/operator9.C
  6cba2353f6c7917dd350506e390d9379  gcc/testsuite/g++.dg/template/overload1.C
  2e506fd9260fa2ce41127628f924466d  gcc/testsuite/g++.dg/template/overload10.C
  36f046a8855c4966a1c3643a3557e887  gcc/testsuite/g++.dg/template/overload11.C
--- 21078,21092 ----
  33665504734fdf4b39f0165ee4e84f64  gcc/testsuite/g++.dg/template/operator12.C
  997b3c61e3112d55ee07873992fbec86  gcc/testsuite/g++.dg/template/operator13.C
  5fe3703cb59160fb82cf953a2d646ffb  gcc/testsuite/g++.dg/template/operator14.C
+ df382df64c960f4f5c75fdc847fa49d2  gcc/testsuite/g++.dg/template/operator15.C
  08eba0ef43fd418e3505a0132a2e9c05  gcc/testsuite/g++.dg/template/operator2.C
  51da64bb1a35e2d4a874ecc36ed30236  gcc/testsuite/g++.dg/template/operator3.C
  7e567ad662951a97d90d67420df1d001  gcc/testsuite/g++.dg/template/operator4.C
  0e11abfb73c96739ad546cd85ff3c2e6  gcc/testsuite/g++.dg/template/operator5.C
! 5f689311e2d97ce7c9011d935e2ad175  gcc/testsuite/g++.dg/template/operator6.C
  98c4cd89cdbe74a78e512f93f452daa8  gcc/testsuite/g++.dg/template/operator7.C
! 00b4cc1da56bb8b56f9cea1ce734f48c  gcc/testsuite/g++.dg/template/operator8.C
! 9503cbfef3c317227a4df73a15b933e0  gcc/testsuite/g++.dg/template/operator9.C
  6cba2353f6c7917dd350506e390d9379  gcc/testsuite/g++.dg/template/overload1.C
  2e506fd9260fa2ce41127628f924466d  gcc/testsuite/g++.dg/template/overload10.C
  36f046a8855c4966a1c3643a3557e887  gcc/testsuite/g++.dg/template/overload11.C
*************** ed8b9d57a67bc5c5ea55951ca907f5d9  gcc/te
*** 19757,19763 ****
  e2ea27f4d30c89986de472da016881a2  gcc/testsuite/g++.dg/template/partial2.C
  629ba41b72a6f4a573aa2b2fc66bf5c8  gcc/testsuite/g++.dg/template/partial3.C
  dbd288590e967c40dee79909821124df  gcc/testsuite/g++.dg/template/partial4.C
! c5136ad4de7e5b92f6e5f94f191994ee  gcc/testsuite/g++.dg/template/partial5.C
  af2b317af1f920fbca6b70a32297df09  gcc/testsuite/g++.dg/template/partial6.C
  27869f98e951e86a28a79500f1a221da  gcc/testsuite/g++.dg/template/partial7.C
  2b23d416282107a906fcf6e2b3a898e7  gcc/testsuite/g++.dg/template/partial8.C
--- 21124,21130 ----
  e2ea27f4d30c89986de472da016881a2  gcc/testsuite/g++.dg/template/partial2.C
  629ba41b72a6f4a573aa2b2fc66bf5c8  gcc/testsuite/g++.dg/template/partial3.C
  dbd288590e967c40dee79909821124df  gcc/testsuite/g++.dg/template/partial4.C
! 9c48338a379acd2108e67fe63d4d8461  gcc/testsuite/g++.dg/template/partial5.C
  af2b317af1f920fbca6b70a32297df09  gcc/testsuite/g++.dg/template/partial6.C
  27869f98e951e86a28a79500f1a221da  gcc/testsuite/g++.dg/template/partial7.C
  2b23d416282107a906fcf6e2b3a898e7  gcc/testsuite/g++.dg/template/partial8.C
*************** f81a697a6ef5d642b2872758266b754c  gcc/te
*** 19790,19800 ****
  47faeaed8cab37ef90c72d343665de97  gcc/testsuite/g++.dg/template/pr57573.C
  07da54542a03fec0ed57eb6454c15775  gcc/testsuite/g++.dg/template/pr58878.C
  233e6bb1c13e5b31d28a5cd423215957  gcc/testsuite/g++.dg/template/pr59930-1.C
! 21139ef3b0ee7eed154c3f08d7949fe1  gcc/testsuite/g++.dg/template/pr59930-2.C
  759a2d0786ed85f62a797f80321ecdc2  gcc/testsuite/g++.dg/template/pr59930-3.C
  ae27fcfe45fb638bb620109e3d14cecf  gcc/testsuite/g++.dg/template/pr61537.C
  9f83a83eca8bc22cf5852d6ac3fa6e5b  gcc/testsuite/g++.dg/template/pr61670.C
! 8a6afa3fa3b02b8817de6316e5d364a6  gcc/testsuite/g++.dg/template/pr61745.C
  a839a521a0bb4d53f24266ff5962de56  gcc/testsuite/g++.dg/template/pr64100.C
  c61ccad43b8b24c90cac9508e881195a  gcc/testsuite/g++.dg/template/pr65186.C
  89d677f4c2dbe2f99420c2fb7c51abd8  gcc/testsuite/g++.dg/template/pr65390.C
--- 21157,21167 ----
  47faeaed8cab37ef90c72d343665de97  gcc/testsuite/g++.dg/template/pr57573.C
  07da54542a03fec0ed57eb6454c15775  gcc/testsuite/g++.dg/template/pr58878.C
  233e6bb1c13e5b31d28a5cd423215957  gcc/testsuite/g++.dg/template/pr59930-1.C
! f6ea324c95cba0af3bff378448473def  gcc/testsuite/g++.dg/template/pr59930-2.C
  759a2d0786ed85f62a797f80321ecdc2  gcc/testsuite/g++.dg/template/pr59930-3.C
  ae27fcfe45fb638bb620109e3d14cecf  gcc/testsuite/g++.dg/template/pr61537.C
  9f83a83eca8bc22cf5852d6ac3fa6e5b  gcc/testsuite/g++.dg/template/pr61670.C
! dfae2ba822b3b22cef23f3338bc4409f  gcc/testsuite/g++.dg/template/pr61745.C
  a839a521a0bb4d53f24266ff5962de56  gcc/testsuite/g++.dg/template/pr64100.C
  c61ccad43b8b24c90cac9508e881195a  gcc/testsuite/g++.dg/template/pr65186.C
  89d677f4c2dbe2f99420c2fb7c51abd8  gcc/testsuite/g++.dg/template/pr65390.C
*************** a02fabd2632ab8c07600d017af625b9d  gcc/te
*** 19815,19821 ****
  f85232cc2d2ce2406ad9221174563c83  gcc/testsuite/g++.dg/template/pr70610-4.C
  3482ce5b959d0b14f61a0ddfe785b9dd  gcc/testsuite/g++.dg/template/pr70610.C
  949c06bdf670a4d1cd8949ec77ca0c2a  gcc/testsuite/g++.dg/template/pr71406.C
! cfffe0e5a148f305e7da6cd2d9bc46c0  gcc/testsuite/g++.dg/template/pr71710.C
  655840d9d98c03e2ea702b0d6b99d8e3  gcc/testsuite/g++.dg/template/pr71826.C
  f2a730df4b5bb0224d3120077bf8bdef  gcc/testsuite/g++.dg/template/pr79650.C
  ce358495eb96da767724476d23c8fe46  gcc/testsuite/g++.dg/template/pr81899.C
--- 21182,21188 ----
  f85232cc2d2ce2406ad9221174563c83  gcc/testsuite/g++.dg/template/pr70610-4.C
  3482ce5b959d0b14f61a0ddfe785b9dd  gcc/testsuite/g++.dg/template/pr70610.C
  949c06bdf670a4d1cd8949ec77ca0c2a  gcc/testsuite/g++.dg/template/pr71406.C
! a05d9f2c4073e577f0ab01a93faddc8d  gcc/testsuite/g++.dg/template/pr71710.C
  655840d9d98c03e2ea702b0d6b99d8e3  gcc/testsuite/g++.dg/template/pr71826.C
  f2a730df4b5bb0224d3120077bf8bdef  gcc/testsuite/g++.dg/template/pr79650.C
  ce358495eb96da767724476d23c8fe46  gcc/testsuite/g++.dg/template/pr81899.C
*************** d45b71572fb4de15f5f76231a1703560  gcc/te
*** 19835,19840 ****
--- 21202,21209 ----
  e8d40cd108e2f974a3fc10d060390e72  gcc/testsuite/g++.dg/template/pr88699.C
  60a2a8d876ab6b293ad9f28872942166  gcc/testsuite/g++.dg/template/pr88795.C
  58e4366fc2e06fbcebe48e7f053ae773  gcc/testsuite/g++.dg/template/pr90138.C
+ 4415cbfb73a456e4f8771706daa1c8ae  gcc/testsuite/g++.dg/template/pr90916.C
+ 88f54efc4feef5b437c46f16554c427b  gcc/testsuite/g++.dg/template/pr92440.C
  04907f98f8eab7c64ced6646f5140346  gcc/testsuite/g++.dg/template/pretty1.C
  b1805d4b386b8dcd432f41c68e255100  gcc/testsuite/g++.dg/template/pseudodtor1.C
  5bbbdc0bd84a1cf86dd283b16e7aa6ba  gcc/testsuite/g++.dg/template/pseudodtor2.C
*************** adf178bf638c6b871c4bd9abf0c44c53  gcc/te
*** 19850,19856 ****
  372af7481dbb814fd59792b6160a671e  gcc/testsuite/g++.dg/template/ptrmem14.C
  bb20547b52c722a6e10e888f3f6b8bc0  gcc/testsuite/g++.dg/template/ptrmem15.C
  df5cd343f05e3fae16de3ecb28034b53  gcc/testsuite/g++.dg/template/ptrmem16.C
! 4e849ae08c1114a95499c4a59e027a41  gcc/testsuite/g++.dg/template/ptrmem17.C
  c29b186e715b166abc3703fea2205647  gcc/testsuite/g++.dg/template/ptrmem18.C
  0560572d5223bb42d46f697f052023bb  gcc/testsuite/g++.dg/template/ptrmem19.C
  1b6dbef9954f520f4bdd8d206d6b42e6  gcc/testsuite/g++.dg/template/ptrmem2.C
--- 21219,21225 ----
  372af7481dbb814fd59792b6160a671e  gcc/testsuite/g++.dg/template/ptrmem14.C
  bb20547b52c722a6e10e888f3f6b8bc0  gcc/testsuite/g++.dg/template/ptrmem15.C
  df5cd343f05e3fae16de3ecb28034b53  gcc/testsuite/g++.dg/template/ptrmem16.C
! 293b83cbf46aadedf58b73af16060e61  gcc/testsuite/g++.dg/template/ptrmem17.C
  c29b186e715b166abc3703fea2205647  gcc/testsuite/g++.dg/template/ptrmem18.C
  0560572d5223bb42d46f697f052023bb  gcc/testsuite/g++.dg/template/ptrmem19.C
  1b6dbef9954f520f4bdd8d206d6b42e6  gcc/testsuite/g++.dg/template/ptrmem2.C
*************** c8ace1218ccb0299924650338fcf4488  gcc/te
*** 19912,19918 ****
  a5be65b82f1aef08aa55aeaa5da0c8d4  gcc/testsuite/g++.dg/template/recurse3.C
  3e3e16c6c4a27889ab806fcd2bbae879  gcc/testsuite/g++.dg/template/recurse4.C
  c7309345696ac164222361961daab266  gcc/testsuite/g++.dg/template/redecl1.C
! 8c26da9476ca0b8d2908af7ab2348832  gcc/testsuite/g++.dg/template/redecl2.C
  397a393f391e401bd8e5e28d01882ef8  gcc/testsuite/g++.dg/template/redecl3.C
  2fc8ecaf6e21a27a95a25b7e1641c675  gcc/testsuite/g++.dg/template/redecl4.C
  c6c126721707d148ce66066de06c754b  gcc/testsuite/g++.dg/template/ref1.C
--- 21281,21287 ----
  a5be65b82f1aef08aa55aeaa5da0c8d4  gcc/testsuite/g++.dg/template/recurse3.C
  3e3e16c6c4a27889ab806fcd2bbae879  gcc/testsuite/g++.dg/template/recurse4.C
  c7309345696ac164222361961daab266  gcc/testsuite/g++.dg/template/redecl1.C
! 6931ae73eaf26b6f436460259c61e3bb  gcc/testsuite/g++.dg/template/redecl2.C
  397a393f391e401bd8e5e28d01882ef8  gcc/testsuite/g++.dg/template/redecl3.C
  2fc8ecaf6e21a27a95a25b7e1641c675  gcc/testsuite/g++.dg/template/redecl4.C
  c6c126721707d148ce66066de06c754b  gcc/testsuite/g++.dg/template/ref1.C
*************** be5ada7fe947b5c46a81b039d0695560  gcc/te
*** 19925,19941 ****
  db13b42ef3220221c06b57bc736b7714  gcc/testsuite/g++.dg/template/ref7.C
  a83323a3a58fc6939825b82ec71d661a  gcc/testsuite/g++.dg/template/ref8.C
  6ea497194158bc3d800411bd86aacaff  gcc/testsuite/g++.dg/template/ref9.C
- ddd0ed7c788878109a43ff802bc00454  gcc/testsuite/g++.dg/template/repo1.C
- b5ea979c0e21d5b248d576104c7762ae  gcc/testsuite/g++.dg/template/repo10.C
- b62a1b725ea9b5d8b864f37e33647341  gcc/testsuite/g++.dg/template/repo11.C
- bd2793d132b6f733d231dad851b1e948  gcc/testsuite/g++.dg/template/repo2.C
- d9ebb171ee12a7f9723eedfd8ecc6fc1  gcc/testsuite/g++.dg/template/repo3.C
- dc0d242dcc9441416a4d3302956871f5  gcc/testsuite/g++.dg/template/repo4.C
- 77c0d6283d020a0bb24594e80810fcc1  gcc/testsuite/g++.dg/template/repo5.C
- 29f26a3476f3b6eccb541475269ad795  gcc/testsuite/g++.dg/template/repo6.C
- 5ad0b5a478c27bfb763a1d7be26f9d76  gcc/testsuite/g++.dg/template/repo7.C
- 6a72d2086a55c3a35908d168a1a9aebc  gcc/testsuite/g++.dg/template/repo8.C
- 855bc881512d80f695fbd672e796ace2  gcc/testsuite/g++.dg/template/repo9.C
  9e9322d04add76d1f767de02d143704b  gcc/testsuite/g++.dg/template/restrict1.C
  b8b893e1844c502297d1e4e9591779ef  gcc/testsuite/g++.dg/template/scope1.C
  1ffed1eba156ff05925971c1bb91cd3d  gcc/testsuite/g++.dg/template/scope2.C
--- 21294,21299 ----
*************** a9f3ce4ee662be853b285ba58e2dfe52  gcc/te
*** 19981,19990 ****
  d877f1c36160b725fc3f9f90ef621cf5  gcc/testsuite/g++.dg/template/show-template-tree-4.C
  867d87de9574acb1f1fc4a93cc164842  gcc/testsuite/g++.dg/template/show-template-tree-no-elide-type.C
  5e99130628ae881b7184e2f80c2a042f  gcc/testsuite/g++.dg/template/show-template-tree.C
! f23ba0af1fed6ed0d84fb59d38cc32a2  gcc/testsuite/g++.dg/template/sizeof-template-argument.C
  8af3d67f6d9f4dd6cda097137e1aaa5e  gcc/testsuite/g++.dg/template/sizeof1.C
  c3dde08186236701373c41bd64c9338e  gcc/testsuite/g++.dg/template/sizeof10.C
! 2bf35536cb5d6363ce87a1698f385906  gcc/testsuite/g++.dg/template/sizeof11.C
  085b9f955b319ea26fa659b0342a998f  gcc/testsuite/g++.dg/template/sizeof12.C
  52cb6bded099df9ce613e3e3e21f7a8a  gcc/testsuite/g++.dg/template/sizeof13.C
  f3d1c78c98af6fc6f4d1fbc648a31143  gcc/testsuite/g++.dg/template/sizeof14.C
--- 21339,21348 ----
  d877f1c36160b725fc3f9f90ef621cf5  gcc/testsuite/g++.dg/template/show-template-tree-4.C
  867d87de9574acb1f1fc4a93cc164842  gcc/testsuite/g++.dg/template/show-template-tree-no-elide-type.C
  5e99130628ae881b7184e2f80c2a042f  gcc/testsuite/g++.dg/template/show-template-tree.C
! 7c5a9f5b83dd9b578bd8929e6f368d16  gcc/testsuite/g++.dg/template/sizeof-template-argument.C
  8af3d67f6d9f4dd6cda097137e1aaa5e  gcc/testsuite/g++.dg/template/sizeof1.C
  c3dde08186236701373c41bd64c9338e  gcc/testsuite/g++.dg/template/sizeof10.C
! e3638c15767d9302f941629764026e63  gcc/testsuite/g++.dg/template/sizeof11.C
  085b9f955b319ea26fa659b0342a998f  gcc/testsuite/g++.dg/template/sizeof12.C
  52cb6bded099df9ce613e3e3e21f7a8a  gcc/testsuite/g++.dg/template/sizeof13.C
  f3d1c78c98af6fc6f4d1fbc648a31143  gcc/testsuite/g++.dg/template/sizeof14.C
*************** f5581de159c7b5592926840478d5c5fb  gcc/te
*** 20025,20031 ****
  bcc1e7cd1681ae2c1d9e35cde8abbbc4  gcc/testsuite/g++.dg/template/spec30.C
  5f4ca65174fe2a4c7ed7bfb4fa8c89d5  gcc/testsuite/g++.dg/template/spec31.C
  ba4e35f69b255608a16e32de7a97230a  gcc/testsuite/g++.dg/template/spec32.C
! a9180d3ef512a022c9b825693df2bc57  gcc/testsuite/g++.dg/template/spec33.C
  1503455e6bff13911dd306082359dbdf  gcc/testsuite/g++.dg/template/spec34.C
  7329e1ef0392d242e100cbfba6c806a2  gcc/testsuite/g++.dg/template/spec35.C
  2f697a1a392f5f2422fea5586cc96371  gcc/testsuite/g++.dg/template/spec36.C
--- 21383,21389 ----
  bcc1e7cd1681ae2c1d9e35cde8abbbc4  gcc/testsuite/g++.dg/template/spec30.C
  5f4ca65174fe2a4c7ed7bfb4fa8c89d5  gcc/testsuite/g++.dg/template/spec31.C
  ba4e35f69b255608a16e32de7a97230a  gcc/testsuite/g++.dg/template/spec32.C
! 23060020b7161327c8f6e4ccd67b8455  gcc/testsuite/g++.dg/template/spec33.C
  1503455e6bff13911dd306082359dbdf  gcc/testsuite/g++.dg/template/spec34.C
  7329e1ef0392d242e100cbfba6c806a2  gcc/testsuite/g++.dg/template/spec35.C
  2f697a1a392f5f2422fea5586cc96371  gcc/testsuite/g++.dg/template/spec36.C
*************** ecf0de18eacd09d8644abc4030d2c8f0  gcc/te
*** 20088,20093 ****
--- 21446,21452 ----
  e93f073f61a42e3c7ad372625dbf5491  gcc/testsuite/g++.dg/template/template-id-3.C
  3eeb73c9e211131164ee26dc577c50c2  gcc/testsuite/g++.dg/template/template-id-4.C
  8fa3e6c96fba6376bb082c7c80573236  gcc/testsuite/g++.dg/template/template-keyword1.C
+ ce80dbc40069cd081d8488c206d6b2a6  gcc/testsuite/g++.dg/template/template-keyword2.C
  2633475e196e36c058cf618a862c925f  gcc/testsuite/g++.dg/template/this-targ1.C
  f9dface1543c62e1ed5a293679ac47da  gcc/testsuite/g++.dg/template/ttp-derived1.C
  d295175d2a75128bac0554e17b63735a  gcc/testsuite/g++.dg/template/ttp-derived2.C
*************** eb3abfc5e71e3a935092fd52c8240bfb  gcc/te
*** 20162,20168 ****
  e4f31473f3a6029bc780fa422a45de3a  gcc/testsuite/g++.dg/template/typedef39.C
  a9fddca07cb53044811dfe65b1ed8495  gcc/testsuite/g++.dg/template/typedef4.C
  443d701e91eb8625219ca859d1d03f71  gcc/testsuite/g++.dg/template/typedef40.C
! 780a09270b61e706722787bbc8a6e288  gcc/testsuite/g++.dg/template/typedef41.C
  d694943c2cbb1bb1c42b4bd43aa5d196  gcc/testsuite/g++.dg/template/typedef5.C
  9e40b722bd4dd158c2c7e042484339c8  gcc/testsuite/g++.dg/template/typedef6.C
  e5348f6294a6577651589b520086d43e  gcc/testsuite/g++.dg/template/typedef7.C
--- 21521,21527 ----
  e4f31473f3a6029bc780fa422a45de3a  gcc/testsuite/g++.dg/template/typedef39.C
  a9fddca07cb53044811dfe65b1ed8495  gcc/testsuite/g++.dg/template/typedef4.C
  443d701e91eb8625219ca859d1d03f71  gcc/testsuite/g++.dg/template/typedef40.C
! 3d7c6cae043383583128fb310e860c0f  gcc/testsuite/g++.dg/template/typedef41.C
  d694943c2cbb1bb1c42b4bd43aa5d196  gcc/testsuite/g++.dg/template/typedef5.C
  9e40b722bd4dd158c2c7e042484339c8  gcc/testsuite/g++.dg/template/typedef6.C
  e5348f6294a6577651589b520086d43e  gcc/testsuite/g++.dg/template/typedef7.C
*************** c2e897b56a387a0b82db1f4b163a868c  gcc/te
*** 20208,20225 ****
  36bc33b0a7d4f4c6efc1f83c1b6bf13b  gcc/testsuite/g++.dg/template/using1.C
  342a3559277f60c5966b80ac4ea673fa  gcc/testsuite/g++.dg/template/using10.C
  a3ac6b8050e3adf5b98b0e28e64070fc  gcc/testsuite/g++.dg/template/using11.C
! d401bee05fb2dd315aae324d855a8f7a  gcc/testsuite/g++.dg/template/using12.C
  acded0229c96d99f990ffa1d7bc1d123  gcc/testsuite/g++.dg/template/using13.C
  7f48f8eb49ed1566c5a7378abc96b3d8  gcc/testsuite/g++.dg/template/using14.C
  d1497117d36ab359ffab3550670a6ba3  gcc/testsuite/g++.dg/template/using15.C
  c5cbcebaafb803692224b39b01e8f671  gcc/testsuite/g++.dg/template/using16.C
  24be9330d739e4540644e36d6e434557  gcc/testsuite/g++.dg/template/using17.C
! cfc21cabe74fa837433fc899f5f5211c  gcc/testsuite/g++.dg/template/using18.C
  536e84362ae1859fc60fb98478875a43  gcc/testsuite/g++.dg/template/using19.C
  39ab7cfa3b77ae21d0f7e2140e1bc6f7  gcc/testsuite/g++.dg/template/using2.C
  17c5623f7f21b35adf36f14371586cf7  gcc/testsuite/g++.dg/template/using20.C
  8f24a6602645350feb421484b6b3ea57  gcc/testsuite/g++.dg/template/using21.C
! 15875b358b7888d3afb1bb2d41b1be7f  gcc/testsuite/g++.dg/template/using22.C
  b6fd01563ec784b5aec55681183ee573  gcc/testsuite/g++.dg/template/using23.C
  052b106a563f3e99ad99e5b1a509d09b  gcc/testsuite/g++.dg/template/using24.C
  86d0cde4583e0865063c62ed09ffe0da  gcc/testsuite/g++.dg/template/using25.C
--- 21567,21584 ----
  36bc33b0a7d4f4c6efc1f83c1b6bf13b  gcc/testsuite/g++.dg/template/using1.C
  342a3559277f60c5966b80ac4ea673fa  gcc/testsuite/g++.dg/template/using10.C
  a3ac6b8050e3adf5b98b0e28e64070fc  gcc/testsuite/g++.dg/template/using11.C
! a760be9f90e8259a0c6806cee715a6d1  gcc/testsuite/g++.dg/template/using12.C
  acded0229c96d99f990ffa1d7bc1d123  gcc/testsuite/g++.dg/template/using13.C
  7f48f8eb49ed1566c5a7378abc96b3d8  gcc/testsuite/g++.dg/template/using14.C
  d1497117d36ab359ffab3550670a6ba3  gcc/testsuite/g++.dg/template/using15.C
  c5cbcebaafb803692224b39b01e8f671  gcc/testsuite/g++.dg/template/using16.C
  24be9330d739e4540644e36d6e434557  gcc/testsuite/g++.dg/template/using17.C
! 2a9ce5f75d1047ed430375b22e3a701b  gcc/testsuite/g++.dg/template/using18.C
  536e84362ae1859fc60fb98478875a43  gcc/testsuite/g++.dg/template/using19.C
  39ab7cfa3b77ae21d0f7e2140e1bc6f7  gcc/testsuite/g++.dg/template/using2.C
  17c5623f7f21b35adf36f14371586cf7  gcc/testsuite/g++.dg/template/using20.C
  8f24a6602645350feb421484b6b3ea57  gcc/testsuite/g++.dg/template/using21.C
! 309d8164d7c38108be6cad1a9b19d121  gcc/testsuite/g++.dg/template/using22.C
  b6fd01563ec784b5aec55681183ee573  gcc/testsuite/g++.dg/template/using23.C
  052b106a563f3e99ad99e5b1a509d09b  gcc/testsuite/g++.dg/template/using24.C
  86d0cde4583e0865063c62ed09ffe0da  gcc/testsuite/g++.dg/template/using25.C
*************** d7375b6b148303af73024b27635ad7cd  gcc/te
*** 20261,20270 ****
  568762f54a977de73383a34dd88e7c45  gcc/testsuite/g++.dg/template/warn1.C
  577a7a4f76f06bf7384ad303d275f983  gcc/testsuite/g++.dg/template/wrap1.C
  ee5c01dd5d6ee9acf4d49c9a5a3191d0  gcc/testsuite/g++.dg/tls/diag-1.C
! 07973f70a1839cd791704ef767065403  gcc/testsuite/g++.dg/tls/diag-2.C
  f4bf79515fd3464e428da5958531f5d6  gcc/testsuite/g++.dg/tls/diag-3.C
! 298dc40b19f6e8123e410e6efa8f2309  gcc/testsuite/g++.dg/tls/diag-4.C
! 11481d47864021d1e3af511c6b632c29  gcc/testsuite/g++.dg/tls/diag-5.C
  e425d7fc584cf8535f3eee565f58f091  gcc/testsuite/g++.dg/tls/init-1.C
  ec6c7e65d57e2a70cb1a6852131a0f16  gcc/testsuite/g++.dg/tls/init-2.C
  e9afa7cf1ac751d2df40286607549ef0  gcc/testsuite/g++.dg/tls/locations1.C
--- 21620,21629 ----
  568762f54a977de73383a34dd88e7c45  gcc/testsuite/g++.dg/template/warn1.C
  577a7a4f76f06bf7384ad303d275f983  gcc/testsuite/g++.dg/template/wrap1.C
  ee5c01dd5d6ee9acf4d49c9a5a3191d0  gcc/testsuite/g++.dg/tls/diag-1.C
! 63251d840542749d5d034c064aec130b  gcc/testsuite/g++.dg/tls/diag-2.C
  f4bf79515fd3464e428da5958531f5d6  gcc/testsuite/g++.dg/tls/diag-3.C
! a798fea61e1895a5aa5a6d345b4516fb  gcc/testsuite/g++.dg/tls/diag-4.C
! c26c19c6753e65db02ae97efd8a54af2  gcc/testsuite/g++.dg/tls/diag-5.C
  e425d7fc584cf8535f3eee565f58f091  gcc/testsuite/g++.dg/tls/init-1.C
  ec6c7e65d57e2a70cb1a6852131a0f16  gcc/testsuite/g++.dg/tls/init-2.C
  e9afa7cf1ac751d2df40286607549ef0  gcc/testsuite/g++.dg/tls/locations1.C
*************** abcd9d688bd97352cf2201ae04eb0bcd  gcc/te
*** 20272,20278 ****
  5b67d09a03c0a87ddd8fb4065b354311  gcc/testsuite/g++.dg/tls/pr69000.C
  f4ebaa2e9bc5b065a4c81b1ec15efe2c  gcc/testsuite/g++.dg/tls/pr77285-1.C
  f1ca461838c5ae75f6825f6cd92ae307  gcc/testsuite/g++.dg/tls/pr77285-2.C
! 98121ea9f83550dc4f25814e30c3a21d  gcc/testsuite/g++.dg/tls/pr79288.C
  eaa257e5d01462b4484236d4e40a6e81  gcc/testsuite/g++.dg/tls/pr85400.C
  a9720fe58f11ddd0e2a21ab5df5a77bf  gcc/testsuite/g++.dg/tls/static-1.C
  29ba155db4cb83d5330b9a806c2cd296  gcc/testsuite/g++.dg/tls/static-1a.cc
--- 21631,21637 ----
  5b67d09a03c0a87ddd8fb4065b354311  gcc/testsuite/g++.dg/tls/pr69000.C
  f4ebaa2e9bc5b065a4c81b1ec15efe2c  gcc/testsuite/g++.dg/tls/pr77285-1.C
  f1ca461838c5ae75f6825f6cd92ae307  gcc/testsuite/g++.dg/tls/pr77285-2.C
! 9b319b2b3e9145fa2715751a0c8c710e  gcc/testsuite/g++.dg/tls/pr79288.C
  eaa257e5d01462b4484236d4e40a6e81  gcc/testsuite/g++.dg/tls/pr85400.C
  a9720fe58f11ddd0e2a21ab5df5a77bf  gcc/testsuite/g++.dg/tls/static-1.C
  29ba155db4cb83d5330b9a806c2cd296  gcc/testsuite/g++.dg/tls/static-1a.cc
*************** a9720fe58f11ddd0e2a21ab5df5a77bf  gcc/te
*** 20282,20287 ****
--- 21641,21647 ----
  10e30da85bd8e8972c6a85fbb75f82f1  gcc/testsuite/g++.dg/tls/thread_local-ice2.C
  d54d30d3cb7d22ef6dcf853c987684ca  gcc/testsuite/g++.dg/tls/thread_local-ice3.C
  3971bb57343c826f45d6ee9d1ae9426a  gcc/testsuite/g++.dg/tls/thread_local-ice4.C
+ 561a86cb313bd1bff66cba28b1bdabc4  gcc/testsuite/g++.dg/tls/thread_local-ice5.C
  205f16ac56fe213b501ed73b2325eb31  gcc/testsuite/g++.dg/tls/thread_local-order1.C
  cd04ac1aa5870c39d6fdfbc222fb74d0  gcc/testsuite/g++.dg/tls/thread_local-order2.C
  ca282be2e7af69bac998143a70c8e05c  gcc/testsuite/g++.dg/tls/thread_local-wrap1.C
*************** cf26e329259baed2e3c2675d10b71343  gcc/te
*** 20319,20325 ****
  3aecfa587091ae9e3524d10e3013ccf0  gcc/testsuite/g++.dg/tls/thread_local7g.C
  9399e18da7889fb7fc5333e641e339e4  gcc/testsuite/g++.dg/tls/thread_local8.C
  46eb3382c1226c7ec68020221453058a  gcc/testsuite/g++.dg/tls/thread_local9.C
! 6e2c254936ab909e7d4444a3ed1928be  gcc/testsuite/g++.dg/tls/tls.exp
  86479ffee518e8ec862d5e9dcaa9866f  gcc/testsuite/g++.dg/tls/tls_model1.C
  7212556766805451a098e554a8ab648e  gcc/testsuite/g++.dg/tls/trivial.C
  debf53c602437e43da099fa943834a84  gcc/testsuite/g++.dg/tm/20100429.C
--- 21679,21685 ----
  3aecfa587091ae9e3524d10e3013ccf0  gcc/testsuite/g++.dg/tls/thread_local7g.C
  9399e18da7889fb7fc5333e641e339e4  gcc/testsuite/g++.dg/tls/thread_local8.C
  46eb3382c1226c7ec68020221453058a  gcc/testsuite/g++.dg/tls/thread_local9.C
! 635b6436bc0dbe25d3cfe8b7ec1282e7  gcc/testsuite/g++.dg/tls/tls.exp
  86479ffee518e8ec862d5e9dcaa9866f  gcc/testsuite/g++.dg/tls/tls_model1.C
  7212556766805451a098e554a8ab648e  gcc/testsuite/g++.dg/tls/trivial.C
  debf53c602437e43da099fa943834a84  gcc/testsuite/g++.dg/tm/20100429.C
*************** debf53c602437e43da099fa943834a84  gcc/te
*** 20329,20334 ****
--- 21689,21695 ----
  b3c6fad876fb9fbc95733f84b7fb6645  gcc/testsuite/g++.dg/tm/attrib-2.C
  7de0dbf10fd117711f389b7fbc639fe1  gcc/testsuite/g++.dg/tm/attrib-3.C
  118ca6537a61acc3774d0044bb336a87  gcc/testsuite/g++.dg/tm/attrib-4.C
+ b4d9d66549182e06b5e9ff2861010156  gcc/testsuite/g++.dg/tm/attrib-5.C
  225a252590c8499fb3f4aa8d83c36e51  gcc/testsuite/g++.dg/tm/cgraph_edge.C
  26ce6286d392a15b839e7fc7af9bd42c  gcc/testsuite/g++.dg/tm/composite1.C
  4cc09ae741099d64dbfe97781c2f2c5e  gcc/testsuite/g++.dg/tm/dynamic1.C
*************** b8417aa0335eeb4b3381d508ea7f5c38  gcc/te
*** 20398,20404 ****
  8ee54951fa048ab382ca2cdb618a0489  gcc/testsuite/g++.dg/tm/template-3.C
  90fa076ea202f452e01e1b4dcbe98e33  gcc/testsuite/g++.dg/tm/template-4.C
  0b77afa8d842f0a0b08d94321879afc3  gcc/testsuite/g++.dg/tm/template-5.C
! 81c03f8cdc1f5d9e54a3d39847d41b5f  gcc/testsuite/g++.dg/tm/tm.exp
  dd280847415c955ad23236033d5aaf8d  gcc/testsuite/g++.dg/tm/unsafe1.C
  21a5d2c89779740daec0728828afc1e7  gcc/testsuite/g++.dg/tm/unsafe2.C
  6c44d3ee04abacf4b43b2418345ac8d3  gcc/testsuite/g++.dg/tm/vector-1.C
--- 21759,21765 ----
  8ee54951fa048ab382ca2cdb618a0489  gcc/testsuite/g++.dg/tm/template-3.C
  90fa076ea202f452e01e1b4dcbe98e33  gcc/testsuite/g++.dg/tm/template-4.C
  0b77afa8d842f0a0b08d94321879afc3  gcc/testsuite/g++.dg/tm/template-5.C
! 815232899ba7f932ed43435bfdb602df  gcc/testsuite/g++.dg/tm/tm.exp
  dd280847415c955ad23236033d5aaf8d  gcc/testsuite/g++.dg/tm/unsafe1.C
  21a5d2c89779740daec0728828afc1e7  gcc/testsuite/g++.dg/tm/unsafe2.C
  6c44d3ee04abacf4b43b2418345ac8d3  gcc/testsuite/g++.dg/tm/vector-1.C
*************** cf4f053f829cc77941d9499636dba788  gcc/te
*** 20830,20840 ****
--- 22191,22212 ----
  38d5ed9578a5910b56d57c30c896f01f  gcc/testsuite/g++.dg/torture/pr90313.cc
  8f37bcbeb67682110bfb7b989631551a  gcc/testsuite/g++.dg/torture/pr90982.C
  c09ff981d388790529f959a054685551  gcc/testsuite/g++.dg/torture/pr91155.C
+ 25acdead98815c5c152ccee9449f6ab0  gcc/testsuite/g++.dg/torture/pr91270.C
  8512e0d79849c3153a1290024a552a14  gcc/testsuite/g++.dg/torture/pr91280.C
+ 93d55ecf83df005a34b578b2cdbb5930  gcc/testsuite/g++.dg/torture/pr91334.C
  7782e7a66949621445617364c753a54f  gcc/testsuite/g++.dg/torture/pr91355.C
  3d0408f32ee832d98bd0325169fc1951  gcc/testsuite/g++.dg/torture/pr91606.C
+ 012536b5aeeb81c62c942db315ce8848  gcc/testsuite/g++.dg/torture/pr91680.C
+ 176182a6555162b35b97697d2d133df3  gcc/testsuite/g++.dg/torture/pr92152.C
  1779028417f5f8e86e290051fd916516  gcc/testsuite/g++.dg/torture/pr92384.C
+ 9a35859e6e5e4c19eca4b2f529432576  gcc/testsuite/g++.dg/torture/pr92421.C
  128505e31d0c3cfec9b59aafee1a7c1a  gcc/testsuite/g++.dg/torture/pr93246.C
+ 7265e1a5a23e5663d3be632b4f3eb62a  gcc/testsuite/g++.dg/torture/pr93273.C
+ 8069d106d9dc8307faeb5a5bdb4693e8  gcc/testsuite/g++.dg/torture/pr93347.C
+ 73bfb5fbb91194a61d555deea3068d63  gcc/testsuite/g++.dg/torture/pr94202.C
+ 82ba90720d09eac5e4f7c2b54e9ceefa  gcc/testsuite/g++.dg/torture/pr94216.C
+ 36a3b069a153f0060c6f91ebc9823189  gcc/testsuite/g++.dg/torture/pr94303.C
+ 8a54174d92b1f9bb07faa27614358474  gcc/testsuite/g++.dg/torture/pr94582.C
  e47702cb1ff0caccc17257524e8667dc  gcc/testsuite/g++.dg/torture/predcom-1.C
  d28910105d9c9253d94d70eacd5e19d4  gcc/testsuite/g++.dg/torture/pushpop_macro.C
  a1b47b9c3e69d79d1895ebc4fd11032b  gcc/testsuite/g++.dg/torture/stackalign/check.h
*************** cae456330f7461197045e0a2f5fa12ce  gcc/te
*** 20846,20852 ****
  798d1fe29ec407f8783626ddb0d01446  gcc/testsuite/g++.dg/torture/stackalign/eh-thiscall-1.C
  ac2b625997ec285af8b6598167ada1fa  gcc/testsuite/g++.dg/torture/stackalign/eh-vararg-1.C
  5e58161ad482c690ceda702d708037b4  gcc/testsuite/g++.dg/torture/stackalign/eh-vararg-2.C
! 92db2edb6c25c58095e8e8a1f1e4cd90  gcc/testsuite/g++.dg/torture/stackalign/stackalign.exp
  b1433c47f1b3510e41343cb1176ab88e  gcc/testsuite/g++.dg/torture/stackalign/stdcall-1.C
  b01a92d8302c9dc593001dd53f236dcf  gcc/testsuite/g++.dg/torture/stackalign/test-unwind.h
  46c8c72894cd196236d1548df5c8b779  gcc/testsuite/g++.dg/torture/stackalign/throw-1.C
--- 22218,22224 ----
  798d1fe29ec407f8783626ddb0d01446  gcc/testsuite/g++.dg/torture/stackalign/eh-thiscall-1.C
  ac2b625997ec285af8b6598167ada1fa  gcc/testsuite/g++.dg/torture/stackalign/eh-vararg-1.C
  5e58161ad482c690ceda702d708037b4  gcc/testsuite/g++.dg/torture/stackalign/eh-vararg-2.C
! 752074e81b5704a44dc9f2fb10bed7b3  gcc/testsuite/g++.dg/torture/stackalign/stackalign.exp
  b1433c47f1b3510e41343cb1176ab88e  gcc/testsuite/g++.dg/torture/stackalign/stdcall-1.C
  b01a92d8302c9dc593001dd53f236dcf  gcc/testsuite/g++.dg/torture/stackalign/test-unwind.h
  46c8c72894cd196236d1548df5c8b779  gcc/testsuite/g++.dg/torture/stackalign/throw-1.C
*************** d53f4a36bfd00298b6b687881aad6861  gcc/te
*** 20862,20868 ****
  2a4f41d0ba2571b1211bd73b3edb34d4  gcc/testsuite/g++.dg/torture/stackalign/unwind-6.C
  5afe578074ff640a77903318faea8e72  gcc/testsuite/g++.dg/torture/str_empty.C
  42e128b3145495bd2df35c3cdcc684ac  gcc/testsuite/g++.dg/torture/tail-padding1.C
! 9bd2c9172492be8fb6c82174e87bd47e  gcc/testsuite/g++.dg/torture/type-generic-1.C
  164b3eb60b0c717428d0673a23922dfc  gcc/testsuite/g++.dg/torture/vshuf-16.inc
  8fd97d6fa085ab3269af65b200d61e8e  gcc/testsuite/g++.dg/torture/vshuf-2.inc
  b2babbab3621a6f7af5eb2dde02e14e8  gcc/testsuite/g++.dg/torture/vshuf-4.inc
--- 22234,22240 ----
  2a4f41d0ba2571b1211bd73b3edb34d4  gcc/testsuite/g++.dg/torture/stackalign/unwind-6.C
  5afe578074ff640a77903318faea8e72  gcc/testsuite/g++.dg/torture/str_empty.C
  42e128b3145495bd2df35c3cdcc684ac  gcc/testsuite/g++.dg/torture/tail-padding1.C
! 0b01f7feb325a8c1dfd3c796eab53860  gcc/testsuite/g++.dg/torture/type-generic-1.C
  164b3eb60b0c717428d0673a23922dfc  gcc/testsuite/g++.dg/torture/vshuf-16.inc
  8fd97d6fa085ab3269af65b200d61e8e  gcc/testsuite/g++.dg/torture/vshuf-2.inc
  b2babbab3621a6f7af5eb2dde02e14e8  gcc/testsuite/g++.dg/torture/vshuf-4.inc
*************** a6b6c621d64b00088b0f48ed440c6eef  gcc/te
*** 20881,20891 ****
  32deb52456e2c877b19ce1b44739b3e1  gcc/testsuite/g++.dg/torture/vshuf-v8hi.C
  b6c068331ea8c597c13f4878202542bd  gcc/testsuite/g++.dg/torture/vshuf-v8qi.C
  fd3e16a63f00c852c7ac13cbaf5de3b5  gcc/testsuite/g++.dg/torture/vshuf-v8si.C
! 861708a27c776240cb0b1d6844d5b803  gcc/testsuite/g++.dg/tree-prof/devirt.C
  80d09170dea54500770122f27eddf44e  gcc/testsuite/g++.dg/tree-prof/indir-call-prof-2.C
! a8ac3db48c22a7a54522feb6797d420c  gcc/testsuite/g++.dg/tree-prof/indir-call-prof.C
  2d47f898b6bc4eb5afc1d14262819ed9  gcc/testsuite/g++.dg/tree-prof/inline_mismatch_args.C
! 62207dbde96e9badced216370963e35a  gcc/testsuite/g++.dg/tree-prof/morefunc.C
  912d73328c4d61995aa0fc60ff274036  gcc/testsuite/g++.dg/tree-prof/partition1.C
  f2275b14adf17ff6f3e0efb26fefe49b  gcc/testsuite/g++.dg/tree-prof/partition2.C
  f1c8c7969780812c78ada663781cdf94  gcc/testsuite/g++.dg/tree-prof/partition3.C
--- 22253,22263 ----
  32deb52456e2c877b19ce1b44739b3e1  gcc/testsuite/g++.dg/torture/vshuf-v8hi.C
  b6c068331ea8c597c13f4878202542bd  gcc/testsuite/g++.dg/torture/vshuf-v8qi.C
  fd3e16a63f00c852c7ac13cbaf5de3b5  gcc/testsuite/g++.dg/torture/vshuf-v8si.C
! b61be4cebf40ca9123f6df364b96b5ba  gcc/testsuite/g++.dg/tree-prof/devirt.C
  80d09170dea54500770122f27eddf44e  gcc/testsuite/g++.dg/tree-prof/indir-call-prof-2.C
! f6d6af3a33fbd9e143a59990c0a241f2  gcc/testsuite/g++.dg/tree-prof/indir-call-prof.C
  2d47f898b6bc4eb5afc1d14262819ed9  gcc/testsuite/g++.dg/tree-prof/inline_mismatch_args.C
! 3110455f6b8221d5f8a0c4fbb19296ea  gcc/testsuite/g++.dg/tree-prof/morefunc.C
  912d73328c4d61995aa0fc60ff274036  gcc/testsuite/g++.dg/tree-prof/partition1.C
  f2275b14adf17ff6f3e0efb26fefe49b  gcc/testsuite/g++.dg/tree-prof/partition2.C
  f1c8c7969780812c78ada663781cdf94  gcc/testsuite/g++.dg/tree-prof/partition3.C
*************** a54a5070a3789fa2ec977323faa81e1d  gcc/te
*** 20896,20906 ****
  70c6aef0cd7751caa0c6b7ed44aabd8b  gcc/testsuite/g++.dg/tree-prof/pr59255.C
  f3b48aeb86621caf4df1f285501e7a5e  gcc/testsuite/g++.dg/tree-prof/pr63581.C
  e5c358735afed9e9c54950b2b1516563  gcc/testsuite/g++.dg/tree-prof/pr79259.C
! 46c9c15c3ee8bf93da54da9e6ba0ddb0  gcc/testsuite/g++.dg/tree-prof/reorder.C
  45ee371a772198109e5e2acb3f7c0f0b  gcc/testsuite/g++.dg/tree-prof/reorder_class1.h
  3dacd3cf3baf954cf35437e3859e7171  gcc/testsuite/g++.dg/tree-prof/reorder_class2.h
! 68515f39d458c6f1d3fe43b2782fca5a  gcc/testsuite/g++.dg/tree-prof/tree-prof.exp
  2a1f9c8b1ccb241e4745f1e06c56fac3  gcc/testsuite/g++.dg/tree-ssa/20040317-1.C
  2beabec34d757a40497771a8e2204be6  gcc/testsuite/g++.dg/tree-ssa/array-temp1.C
  08d69e786b9ad4d3160a39a0d5e489fa  gcc/testsuite/g++.dg/tree-ssa/block1.C
  92014ea122d687546fe3649560d8b2a7  gcc/testsuite/g++.dg/tree-ssa/builtin1.C
--- 22268,22279 ----
  70c6aef0cd7751caa0c6b7ed44aabd8b  gcc/testsuite/g++.dg/tree-prof/pr59255.C
  f3b48aeb86621caf4df1f285501e7a5e  gcc/testsuite/g++.dg/tree-prof/pr63581.C
  e5c358735afed9e9c54950b2b1516563  gcc/testsuite/g++.dg/tree-prof/pr79259.C
! 4596cc60725cb368fc62ab2b1db48ad4  gcc/testsuite/g++.dg/tree-prof/reorder.C
  45ee371a772198109e5e2acb3f7c0f0b  gcc/testsuite/g++.dg/tree-prof/reorder_class1.h
  3dacd3cf3baf954cf35437e3859e7171  gcc/testsuite/g++.dg/tree-prof/reorder_class2.h
! 28e945d4a1fac2512469e382d0b50f68  gcc/testsuite/g++.dg/tree-prof/tree-prof.exp
  2a1f9c8b1ccb241e4745f1e06c56fac3  gcc/testsuite/g++.dg/tree-ssa/20040317-1.C
+ 9b3694af0b6195c5c10b4b0caa6af5a4  gcc/testsuite/g++.dg/tree-ssa/alias-access-path-1.C
  2beabec34d757a40497771a8e2204be6  gcc/testsuite/g++.dg/tree-ssa/array-temp1.C
  08d69e786b9ad4d3160a39a0d5e489fa  gcc/testsuite/g++.dg/tree-ssa/block1.C
  92014ea122d687546fe3649560d8b2a7  gcc/testsuite/g++.dg/tree-ssa/builtin1.C
*************** e5c358735afed9e9c54950b2b1516563  gcc/te
*** 20908,20918 ****
--- 22281,22297 ----
  96f78e0eceff770431ee91e38866bb06  gcc/testsuite/g++.dg/tree-ssa/copyprop-1.C
  d91b8a641aa0d5f214c5844a6944163c  gcc/testsuite/g++.dg/tree-ssa/copyprop.C
  87d33077dde5db2d1e9e001bd82dc9cd  gcc/testsuite/g++.dg/tree-ssa/counts-1.C
+ 6c20484753d2fb5081463a83f21e1f85  gcc/testsuite/g++.dg/tree-ssa/cprop-vcond.C
  ac99be7ada2631c077352f322dd05ca0  gcc/testsuite/g++.dg/tree-ssa/deleted-label1.C
  ef3a26a28db0f953ec307b6c4c4b973b  gcc/testsuite/g++.dg/tree-ssa/dom-invalid.C
  f47eaa2d8002496a7b4b7724ca81009b  gcc/testsuite/g++.dg/tree-ssa/ehcleanup-1.C
  7a59e09c4cb65bda7874f5d6af01a6f5  gcc/testsuite/g++.dg/tree-ssa/empty-1.C
  6ca719a4fb53798313a64270ae55a047  gcc/testsuite/g++.dg/tree-ssa/empty-2.C
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+ 3c696786eeb4bd40f02526c5787fb676  gcc/testsuite/g++.dg/tree-ssa/final3.C
  bca63426f4323897c7869d093f089d80  gcc/testsuite/g++.dg/tree-ssa/fold-compare.C
  9c918af3cab5a77ccdb922ddbdb9c126  gcc/testsuite/g++.dg/tree-ssa/forwprop-switch.C
  64c09190e248a41f55f2136c28fdea69  gcc/testsuite/g++.dg/tree-ssa/fwprop-align.C
*************** dc09af43ca9827d657db7f2b91897bea  gcc/te
*** 20922,20929 ****
  a2ba7610b48daff8603bb01e4ed7baf9  gcc/testsuite/g++.dg/tree-ssa/inline-4.C
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  d049885f4d053577c545356b2aed7783  gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C
! 2937805ff0bd4436c8dea522bf5c9721  gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C
  e48684fba8399ff995984d71ebc63e26  gcc/testsuite/g++.dg/tree-ssa/lifetime-dse1.C
  c60f58c35051bdf33475572fe6676ded  gcc/testsuite/g++.dg/tree-ssa/new1.C
  15ab0ba34272a9b9cb6f26af6f24d6be  gcc/testsuite/g++.dg/tree-ssa/nonzero-1.C
  7966471926be0c3228b95fecdf1c10bc  gcc/testsuite/g++.dg/tree-ssa/nonzero-2.C
--- 22301,22310 ----
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  d049885f4d053577c545356b2aed7783  gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C
! 76675e93b5dd4eea682fcfa8d0151f77  gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C
! 7f7f7d6d353f34c98889acc527e3e195  gcc/testsuite/g++.dg/tree-ssa/ldist-1.C
  e48684fba8399ff995984d71ebc63e26  gcc/testsuite/g++.dg/tree-ssa/lifetime-dse1.C
+ 9899faa1c78631285ecad43af2fa053d  gcc/testsuite/g++.dg/tree-ssa/loop-cond-split-1.C
  c60f58c35051bdf33475572fe6676ded  gcc/testsuite/g++.dg/tree-ssa/new1.C
  15ab0ba34272a9b9cb6f26af6f24d6be  gcc/testsuite/g++.dg/tree-ssa/nonzero-1.C
  7966471926be0c3228b95fecdf1c10bc  gcc/testsuite/g++.dg/tree-ssa/nonzero-2.C
*************** fc543c41c4e9412257ec7327d35091bd  gcc/te
*** 20955,20963 ****
  aebde03bd95152e23e293110d01cc55f  gcc/testsuite/g++.dg/tree-ssa/pr19476-7.C
  7faa1b335a071fd2ae1fc67590ce21d7  gcc/testsuite/g++.dg/tree-ssa/pr19637.C
  a425019d3ee630ab12baac6d527c530b  gcc/testsuite/g++.dg/tree-ssa/pr19786.C
! 584dd546d8260e8ca8609fcf0c071bb2  gcc/testsuite/g++.dg/tree-ssa/pr19807.C
  f05b30134e85add64a7b367e35828cf5  gcc/testsuite/g++.dg/tree-ssa/pr19952.C
! a9d7f4347bccd1e6029d7c844680a5b4  gcc/testsuite/g++.dg/tree-ssa/pr20280.C
  41846b62265c3bb2f5a736155a172f33  gcc/testsuite/g++.dg/tree-ssa/pr20458.C
  ebc744114f159114473ef7dfa2b07535  gcc/testsuite/g++.dg/tree-ssa/pr20489.C
  40a4cb93d3e506b171fb153b32fdf949  gcc/testsuite/g++.dg/tree-ssa/pr20920.C
--- 22336,22344 ----
  aebde03bd95152e23e293110d01cc55f  gcc/testsuite/g++.dg/tree-ssa/pr19476-7.C
  7faa1b335a071fd2ae1fc67590ce21d7  gcc/testsuite/g++.dg/tree-ssa/pr19637.C
  a425019d3ee630ab12baac6d527c530b  gcc/testsuite/g++.dg/tree-ssa/pr19786.C
! 36bd9beac17d2e8b1b1d232781a1f7e9  gcc/testsuite/g++.dg/tree-ssa/pr19807.C
  f05b30134e85add64a7b367e35828cf5  gcc/testsuite/g++.dg/tree-ssa/pr19952.C
! 22324561762dc41c7dbd5cf1400cfe5b  gcc/testsuite/g++.dg/tree-ssa/pr20280.C
  41846b62265c3bb2f5a736155a172f33  gcc/testsuite/g++.dg/tree-ssa/pr20458.C
  ebc744114f159114473ef7dfa2b07535  gcc/testsuite/g++.dg/tree-ssa/pr20489.C
  40a4cb93d3e506b171fb153b32fdf949  gcc/testsuite/g++.dg/tree-ssa/pr20920.C
*************** afe6c2d5f5fe286db0bf5a59a3834018  gcc/te
*** 20999,21012 ****
  73fb9ccb09fd5339af597037d7192b96  gcc/testsuite/g++.dg/tree-ssa/pr27291.C
  267aeb20b2a1ded7a355eecdb05b69a1  gcc/testsuite/g++.dg/tree-ssa/pr27548.C
  b7fb5b853f7854c141799346f2354a0c  gcc/testsuite/g++.dg/tree-ssa/pr27549.C
! a4395760f907dfae0f2de3099740f694  gcc/testsuite/g++.dg/tree-ssa/pr27830.C
  086db4c922e923a9d5c7b0582a1ba9f5  gcc/testsuite/g++.dg/tree-ssa/pr27894.C
  68f892d0aaa84abba22ecb11810e95ce  gcc/testsuite/g++.dg/tree-ssa/pr28003.C
  8aea640c13c12833067fe21f2796f0ab  gcc/testsuite/g++.dg/tree-ssa/pr28238.C
  376ebc3d295f82c1a09d3726e5adb664  gcc/testsuite/g++.dg/tree-ssa/pr29902.C
  9ba7a3040603a45fb04631498ba8894c  gcc/testsuite/g++.dg/tree-ssa/pr30738.C
  18903dd38f72e9e65b9dc4d3d145bf5a  gcc/testsuite/g++.dg/tree-ssa/pr31146-2.C
! 868fafbbb5360ad48687b0b7c42c1442  gcc/testsuite/g++.dg/tree-ssa/pr31146.C
  b39514536a29fff0b9033f022be8908b  gcc/testsuite/g++.dg/tree-ssa/pr31307.C
  22dcd80f01872c86b3e1268b90f33072  gcc/testsuite/g++.dg/tree-ssa/pr33593.C
  e55c38bdb49e4ebc48f20a03503a526c  gcc/testsuite/g++.dg/tree-ssa/pr33604.C
--- 22380,22393 ----
  73fb9ccb09fd5339af597037d7192b96  gcc/testsuite/g++.dg/tree-ssa/pr27291.C
  267aeb20b2a1ded7a355eecdb05b69a1  gcc/testsuite/g++.dg/tree-ssa/pr27548.C
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! 597fc2a6ee55d98094415cfe6c9afa80  gcc/testsuite/g++.dg/tree-ssa/pr27830.C
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  8aea640c13c12833067fe21f2796f0ab  gcc/testsuite/g++.dg/tree-ssa/pr28238.C
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  9ba7a3040603a45fb04631498ba8894c  gcc/testsuite/g++.dg/tree-ssa/pr30738.C
  18903dd38f72e9e65b9dc4d3d145bf5a  gcc/testsuite/g++.dg/tree-ssa/pr31146-2.C
! 5ecc94721fc6b658cc6ddbdb37dc1489  gcc/testsuite/g++.dg/tree-ssa/pr31146.C
  b39514536a29fff0b9033f022be8908b  gcc/testsuite/g++.dg/tree-ssa/pr31307.C
  22dcd80f01872c86b3e1268b90f33072  gcc/testsuite/g++.dg/tree-ssa/pr33593.C
  e55c38bdb49e4ebc48f20a03503a526c  gcc/testsuite/g++.dg/tree-ssa/pr33604.C
*************** b9485492461c48ebd2bb0ed7c80fca4e  gcc/te
*** 21045,21082 ****
  deec61f943ce8761e57e704eca7387bf  gcc/testsuite/g++.dg/tree-ssa/pr49911.C
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! dac808c169982acff1d3dd48e047ad8d  gcc/testsuite/g++.dg/tree-ssa/pr53844.C
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! 2c62362225182e0ae545ccb7c9a93694  gcc/testsuite/g++.dg/tree-ssa/pr78847.C
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! 442bcb6857ffbcbe494c50e1d85775f6  gcc/testsuite/g++.dg/tree-ssa/pr80293.C
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  99096ec4f30fcdb55089995ea662cded  gcc/testsuite/g++.dg/tree-ssa/pr83523.C
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! 0a76fdd924fd4c13bb8cfcecab0cb88a  gcc/testsuite/g++.dg/tree-ssa/pr8781.C
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  cbfe7d75cb5b5c7850564b006625c5e3  gcc/testsuite/g++.dg/tree-ssa/ptrmemfield.C
  f115b68cd787a27ea9c1c1050f60230c  gcc/testsuite/g++.dg/tree-ssa/restrict1.C
--- 22426,22475 ----
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! 28e3b48a8266ba33af53cb3d6bf4fa32  gcc/testsuite/g++.dg/tree-ssa/pr69336.C
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  f115b68cd787a27ea9c1c1050f60230c  gcc/testsuite/g++.dg/tree-ssa/restrict1.C
*************** d66caabc31972e027155b7fba60994d6  gcc/te
*** 21085,21091 ****
  4b409387c124f6c52a3b106d015e09fa  gcc/testsuite/g++.dg/tree-ssa/sra-1.C
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  bfa02bb1cdb37b00f78df34c92e226a6  gcc/testsuite/g++.dg/tree-ssa/ssa-dom.C
! 44ff672956d28ec4f717a8207b10ae60  gcc/testsuite/g++.dg/tree-ssa/ssa-dse-1.C
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  7a7e045345b1c3cdd598ce2b7982183d  gcc/testsuite/g++.dg/tree-ssa/ssa-sra-1.C
--- 22478,22484 ----
  4b409387c124f6c52a3b106d015e09fa  gcc/testsuite/g++.dg/tree-ssa/sra-1.C
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  bfa02bb1cdb37b00f78df34c92e226a6  gcc/testsuite/g++.dg/tree-ssa/ssa-dom.C
! 9401df0e169651682e318a78fe77863d  gcc/testsuite/g++.dg/tree-ssa/ssa-dse-1.C
  cbba22e9568932c7e9798b4143e8babf  gcc/testsuite/g++.dg/tree-ssa/ssa-dse-2.C
  7bce16fbd63e1571ea200b35c317c28f  gcc/testsuite/g++.dg/tree-ssa/ssa-dse-3.C
  7a7e045345b1c3cdd598ce2b7982183d  gcc/testsuite/g++.dg/tree-ssa/ssa-sra-1.C
*************** cbba22e9568932c7e9798b4143e8babf  gcc/te
*** 21093,21098 ****
--- 22486,22493 ----
  3fc97853b7f5a33a82d43b9c8b97e80a  gcc/testsuite/g++.dg/tree-ssa/ssa-sra-3.C
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  49ee787a379cb6910b9e5718ae694e10  gcc/testsuite/g++.dg/tree-ssa/stabilize1.C
+ 23df56c1ec29f9a5d4f481355d17c3dc  gcc/testsuite/g++.dg/tree-ssa/strlenopt-1.C
+ 948d00fc979cc2bd7b0f86e83a4eb496  gcc/testsuite/g++.dg/tree-ssa/strlenopt-2.C
  2a5935f325533fa199bc7f5e3b2b36d5  gcc/testsuite/g++.dg/tree-ssa/tail-call-1.C
  0fb08fd6d187247ae5872931e884061c  gcc/testsuite/g++.dg/tree-ssa/tmmti.C
  67826d6c8638dba46a4b37835998f34a  gcc/testsuite/g++.dg/tree-ssa/volatile1.C
*************** dc3ef40ef566357c4f0d41f5f42c2bcc  gcc/te
*** 21108,21114 ****
  cd932ca55aa9252a2188bb383ac82ed7  gcc/testsuite/g++.dg/tsan/pr64265.C
  96f255f38a0cb7c1f48e01e6e96d0abf  gcc/testsuite/g++.dg/tsan/pr80110.C
  ba8b56e337f98c3bdfc0402e0dac484a  gcc/testsuite/g++.dg/tsan/pr88018.C
! 5b87bed1e1dac40ad0ab4df1518f9ede  gcc/testsuite/g++.dg/tsan/tsan.exp
  1048d0e6a3ca80d3b4720a445847e7cb  gcc/testsuite/g++.dg/tsan/tsan_barrier.h
  4a8a525549940ddd77b19875ffb1bcc6  gcc/testsuite/g++.dg/tsan/vptr_benign_race.C
  580f9f0da39034a82858b2ac3acfb1dc  gcc/testsuite/g++.dg/tsan/vptr_harmful_race.C
--- 22503,22509 ----
  cd932ca55aa9252a2188bb383ac82ed7  gcc/testsuite/g++.dg/tsan/pr64265.C
  96f255f38a0cb7c1f48e01e6e96d0abf  gcc/testsuite/g++.dg/tsan/pr80110.C
  ba8b56e337f98c3bdfc0402e0dac484a  gcc/testsuite/g++.dg/tsan/pr88018.C
! 9918e1bc64a2cd45a30805e1436ed14d  gcc/testsuite/g++.dg/tsan/tsan.exp
  1048d0e6a3ca80d3b4720a445847e7cb  gcc/testsuite/g++.dg/tsan/tsan_barrier.h
  4a8a525549940ddd77b19875ffb1bcc6  gcc/testsuite/g++.dg/tsan/vptr_benign_race.C
  580f9f0da39034a82858b2ac3acfb1dc  gcc/testsuite/g++.dg/tsan/vptr_harmful_race.C
*************** ebc4dd8d7b9c346d612ab748d0d8bda0  gcc/te
*** 21136,21148 ****
  a654df71119821a4303cc9fe0501191b  gcc/testsuite/g++.dg/ubsan/pr59250.C
  420a6623146bb014dc1310134356d81f  gcc/testsuite/g++.dg/ubsan/pr59306.C
  79755a51c3cbb97ff48bd411272f6b08  gcc/testsuite/g++.dg/ubsan/pr59331.C
! 362dc721b3701a8d4ba53617ee7bbac3  gcc/testsuite/g++.dg/ubsan/pr59415.C
  c01510327223fa5084d138538e05d01f  gcc/testsuite/g++.dg/ubsan/pr59437.C
  f79c5c3fe416583c001d6aaea7674732  gcc/testsuite/g++.dg/ubsan/pr60569.C
  466d1bf6779270f6883dced3f26abd19  gcc/testsuite/g++.dg/ubsan/pr61272.C
  f9e7d9219975e0613b7d53ed55c87efe  gcc/testsuite/g++.dg/ubsan/pr63813.C
  a84e2582a036f0562ca82b54e5c2ead4  gcc/testsuite/g++.dg/ubsan/pr63913.C
! 5f2475ded1b4da28fab809c387122589  gcc/testsuite/g++.dg/ubsan/pr63956.C
  905e96bca11e38275e3c78595acfb8bc  gcc/testsuite/g++.dg/ubsan/pr64632.C
  ce25b7039c57de8705414023fc9b982c  gcc/testsuite/g++.dg/ubsan/pr64717-1.C
  831fc21e28710642f430322c48eabad9  gcc/testsuite/g++.dg/ubsan/pr64717-2.C
--- 22531,22543 ----
  a654df71119821a4303cc9fe0501191b  gcc/testsuite/g++.dg/ubsan/pr59250.C
  420a6623146bb014dc1310134356d81f  gcc/testsuite/g++.dg/ubsan/pr59306.C
  79755a51c3cbb97ff48bd411272f6b08  gcc/testsuite/g++.dg/ubsan/pr59331.C
! 155d46dcdeb22f59fb989789b1e6b3d8  gcc/testsuite/g++.dg/ubsan/pr59415.C
  c01510327223fa5084d138538e05d01f  gcc/testsuite/g++.dg/ubsan/pr59437.C
  f79c5c3fe416583c001d6aaea7674732  gcc/testsuite/g++.dg/ubsan/pr60569.C
  466d1bf6779270f6883dced3f26abd19  gcc/testsuite/g++.dg/ubsan/pr61272.C
  f9e7d9219975e0613b7d53ed55c87efe  gcc/testsuite/g++.dg/ubsan/pr63813.C
  a84e2582a036f0562ca82b54e5c2ead4  gcc/testsuite/g++.dg/ubsan/pr63913.C
! 341f6e40cbb9b1de3fd3286888e58949  gcc/testsuite/g++.dg/ubsan/pr63956.C
  905e96bca11e38275e3c78595acfb8bc  gcc/testsuite/g++.dg/ubsan/pr64632.C
  ce25b7039c57de8705414023fc9b982c  gcc/testsuite/g++.dg/ubsan/pr64717-1.C
  831fc21e28710642f430322c48eabad9  gcc/testsuite/g++.dg/ubsan/pr64717-2.C
*************** ccd812768635f8e01d90fa3320899ee9  gcc/te
*** 21191,21196 ****
--- 22586,22592 ----
  94af237452630bc235b32950ee64cecc  gcc/testsuite/g++.dg/ubsan/pr85029.C
  4b9f781093ad8d786afab10e64079ef9  gcc/testsuite/g++.dg/ubsan/pr86406.C
  b418b9ea8faf4e227b8682929711cea2  gcc/testsuite/g++.dg/ubsan/pr89234.C
+ ca328b27d187715f9ca0336509eb5c8b  gcc/testsuite/g++.dg/ubsan/pr91993.C
  0a28657c9b1173b94a86c1d7bbf0da3c  gcc/testsuite/g++.dg/ubsan/return-1.C
  a87e589225f8d46ff1e842371d5d60b8  gcc/testsuite/g++.dg/ubsan/return-2.C
  c05485082568567a8bc2c41519fc374b  gcc/testsuite/g++.dg/ubsan/return-3.C
*************** ceefdce8629af65f842f11d82ad86264  gcc/te
*** 21202,21218 ****
  a512113af0ac3172f2466ee3a8c93259  gcc/testsuite/g++.dg/ubsan/static-init-1.C
  b1a38b150fef25f02239b481561ad148  gcc/testsuite/g++.dg/ubsan/static-init-2.C
  76c5d965e0f0683fddef3a001be6193c  gcc/testsuite/g++.dg/ubsan/static-init-3.C
! e3595fd0989367db21f8ce8a1744e3f5  gcc/testsuite/g++.dg/ubsan/ubsan.exp
! 16ba7a955f1982e7162e1fb6cdd0e29e  gcc/testsuite/g++.dg/ubsan/vla-1.C
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  5de2b1282f667edcca7c8b102d137b0d  gcc/testsuite/g++.dg/ubsan/vptr-10.C
  7871fdd28f8d26bc692ef38fd24d6573  gcc/testsuite/g++.dg/ubsan/vptr-11.C
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--- 22598,22615 ----
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  eb65a43bfca2604f5a8b2e2f09212f46  gcc/testsuite/g++.dg/ubsan/vptr-14.C
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*************** dc35acb0f3b80c07fb4789cb89eb09b2  gcc/te
*** 21275,21281 ****
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--- 22672,22690 ----
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! f8b252fe5073b3930ea717bc88d9ee44  gcc/testsuite/g++.dg/vect/simd-4.cc
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! 4dd97dd454fd77c364ba563eca02af9a  gcc/testsuite/g++.dg/vect/simd-8.cc
! 4981b5fa451f00ed2e0b434749b78914  gcc/testsuite/g++.dg/vect/simd-9.cc
  bf5c8ee938eb29d9c5f2aad606d6074e  gcc/testsuite/g++.dg/vect/simd-bool-comparison-1.cc
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  60c78be6738c5a1041dce7fc1657bcf0  gcc/testsuite/g++.dg/vect/simd-clone-1.cc
*************** b8fb5b23ece050421d669915c600780b  gcc/te
*** 21292,21338 ****
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! c5f8d177b95311df0a23b28f8373351d  gcc/testsuite/g++.dg/warn/Warray-bounds-4.C
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! eab8765fe78ac7689bde789090548173  gcc/testsuite/g++.dg/warn/Wcatch-value-3.C
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! 3ea384ce70a66de19d8ab92542a57af7  gcc/testsuite/g++.dg/warn/Wconditionally-supported-1.C
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--- 22701,22753 ----
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*************** f7dd0981dd1da24582fb107a2de2d745  gcc/te
*** 21342,21348 ****
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--- 22757,22763 ----
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! 81f664dba5a025cdc726a4ce39403653  gcc/testsuite/g++.dg/warn/Wdelete-incomplete-1.C
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*************** b084f0b1f3769218f6a37cbfa2ed89d4  gcc/te
*** 21357,21371 ****
  8c92a45aa3c76f7c774e05c8cc46453c  gcc/testsuite/g++.dg/warn/Wduplicated-branches3.C
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! 37c21b63185cc6eb45eceb0b75e600a3  gcc/testsuite/g++.dg/warn/Wenum-compare.C
  d267dddcbfdc3e1208a643c82d1c0886  gcc/testsuite/g++.dg/warn/Wextra-1.C
  fd872aba23fcbd09e4b5cb3b61dbaadf  gcc/testsuite/g++.dg/warn/Wextra-2.C
! 7261164c9598bc81ae5d66213779d5d4  gcc/testsuite/g++.dg/warn/Wextra-3.C
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  30a67fe46ead0acff3908a2c07a30489  gcc/testsuite/g++.dg/warn/Wextra-semi.C
! 5eb7ea7761d111befc6050ff4baa1559  gcc/testsuite/g++.dg/warn/Wfloat-equal-1.C
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--- 22772,22787 ----
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*************** a5142c9cd89ebb3502a6adbdb75fa29c  gcc/te
*** 21379,21384 ****
--- 22795,22804 ----
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*************** b383f047a6af35035ecd836253175c30  gcc/te
*** 21394,21405 ****
--- 22814,22834 ----
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*************** d8522883128c1eb223545be773c44b16  gcc/te
*** 21423,21428 ****
--- 22852,22859 ----
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*************** d384bb1bb46e31c69b6a5c612b417019  gcc/te
*** 21460,21471 ****
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--- 22891,22910 ----
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*************** d65c00ca7eab93097380a676907d2243  gcc/te
*** 21479,21487 ****
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--- 22918,22927 ----
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*************** d0d6c5fe9b201bcd8b68523fbf3f0ce2  gcc/te
*** 21498,21503 ****
--- 22938,22944 ----
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*************** dd18ba46a462d680bb62b823872da6b0  gcc/te
*** 21517,21523 ****
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--- 22958,22965 ----
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*************** f345b06fca626501d991adc9447c18e0  gcc/te
*** 21546,21558 ****
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--- 22988,23003 ----
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! ac765247730b2bbd6e40254f091bba3e  gcc/testsuite/g++.dg/warn/Wstringop-truncation-1.C
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*************** b59dc530212e2b55715a884d39fa09dc  gcc/te
*** 21573,21582 ****
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  81432c4786638b6267d11220821c16df  gcc/testsuite/g++.dg/warn/Wterminate1.C
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--- 23018,23028 ----
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! 2222683b91dc91fe15e0d65ad2e003ac  gcc/testsuite/g++.dg/warn/Wtype-limits.C
  3b1a12f11ebbf80f8ab2cf6a03558cbc  gcc/testsuite/g++.dg/warn/Wtype-limits2.C
+ f0d5fa8f13284bd1701b617d1310eef3  gcc/testsuite/g++.dg/warn/Wtype-limits3.C
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  fe4c6303d7ec13423e71cfb150c05d00  gcc/testsuite/g++.dg/warn/Wuninitialized-1.C
*************** e7274165f26fc70eff73fddbd77e3811  gcc/te
*** 21648,21654 ****
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! 715f4e85764653a44e74c60a6624ff13  gcc/testsuite/g++.dg/warn/Wunused-var-26.C
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--- 23094,23100 ----
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! 1830622fd50e9297156ce192fed84881  gcc/testsuite/g++.dg/warn/Wunused-var-26.C
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*************** dd0f2a1889a83658587b5f12c08c0c1c  gcc/te
*** 21659,21664 ****
--- 23105,23111 ----
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*************** b81dd316dd30881afe998cc16667340f  gcc/te
*** 21666,21672 ****
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! 88adcb759fca5a76baa049de4a8b2b25  gcc/testsuite/g++.dg/warn/Wuseless-cast.C
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--- 23113,23119 ----
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*************** ef6b448559dfb55f716baaf60ef6e508  gcc/te
*** 21718,21724 ****
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! d30920f4e6c261179db5d5422da0b398  gcc/testsuite/g++.dg/warn/delete-non-virtual-dtor.C
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--- 23165,23171 ----
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*************** e81d20f2a65cb672129118ceab24cd3e  gcc/te
*** 21754,21760 ****
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! a4df5f71f7276c81c3910ad2fc5b65f7  gcc/testsuite/g++.dg/warn/incomplete1.C
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--- 23201,23207 ----
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! 94ca8d468cd6c83f22a979c88ee9fbd4  gcc/testsuite/g++.dg/warn/incomplete1.C
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*************** d38eae092825c980b4c8c291c3d56273  gcc/te
*** 21769,21779 ****
--- 23216,23228 ----
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*************** de1b2bdd382eea21689902d72c1f4f75  gcc/te
*** 21786,21799 ****
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--- 23235,23252 ----
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*************** e36e0e34c32010c5c54008377dce599e  gcc/te
*** 21806,21812 ****
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--- 23259,23265 ----
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*************** fc8649974dc36ab09d351dd258bf269d  gcc/te
*** 21822,21843 ****
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--- 23275,23296 ----
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*************** d8e09f06f5ec03c8ee79f8a008ae77df  gcc/te
*** 21853,21859 ****
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--- 23306,23312 ----
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*************** ff4b611f28b0870bd5276ac3b01edb5b  gcc/te
*** 21876,21881 ****
--- 23329,23335 ----
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  ad593aaafdf4b211b08e5be6b3abc282  gcc/testsuite/g++.dg/warn/sequence-pt-3.C
+ 4c23099b35e522ed3ec079e76ed303f6  gcc/testsuite/g++.dg/warn/sequence-pt-4.C
  df6eec31c99dfed294a6e4192dd69f3f  gcc/testsuite/g++.dg/warn/sequence-pt-pr17880.C
  67a0e31346c32b568b1d0584a5c6a3bc  gcc/testsuite/g++.dg/warn/skip-1.C
  4bf091c9b94c31660c0d977448470862  gcc/testsuite/g++.dg/warn/skip-2.C
*************** b26256decd4ab491a9039d3ad7f86a6b  gcc/te
*** 21905,21911 ****
  a731807749e8149045d38e9527236cfb  gcc/testsuite/g++.dg/wrappers/pr83799.C
  57f4427405d61c7d4dd9ef56fe302200  gcc/testsuite/g++.dg/wrappers/pr83814.C
  7ee088b6ee11ace2d0d1f03194f7175c  gcc/testsuite/g++.dg/wrappers/pr83902.C
! 4cc1aec1c94a62948e00575e6a59a0b8  gcc/testsuite/g++.dg/wrappers/pr88680.C
  0f50e2f8443a5b2c7ab7d719426284f9  gcc/testsuite/g++.dg/wrappers/sanitizer_coverage_libcdep_new.C
  2024b5c1698566856be470e026d079b3  gcc/testsuite/g++.dg/wrappers/wrapper-around-type-pack-expansion.C
  1cdb371f2e69de6a5ce47c572f798792  gcc/testsuite/g++.old-deja/g++.abi/aggregates.C
--- 23359,23365 ----
  a731807749e8149045d38e9527236cfb  gcc/testsuite/g++.dg/wrappers/pr83799.C
  57f4427405d61c7d4dd9ef56fe302200  gcc/testsuite/g++.dg/wrappers/pr83814.C
  7ee088b6ee11ace2d0d1f03194f7175c  gcc/testsuite/g++.dg/wrappers/pr83902.C
! b7f5a1ba1143dce1dc12328785c4adc2  gcc/testsuite/g++.dg/wrappers/pr88680.C
  0f50e2f8443a5b2c7ab7d719426284f9  gcc/testsuite/g++.dg/wrappers/sanitizer_coverage_libcdep_new.C
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  1cdb371f2e69de6a5ce47c572f798792  gcc/testsuite/g++.old-deja/g++.abi/aggregates.C
*************** e70f6c72d0bdb4e3f855ac85cd751b3f  gcc/te
*** 21925,21931 ****
  9395d9e9e9319220bb7b637faff8c284  gcc/testsuite/g++.old-deja/g++.abi/primary4.C
  6f380830639cca69801edec0c70561f2  gcc/testsuite/g++.old-deja/g++.abi/primary5.C
  57336bb0967886c438b9ee6c25ae18ef  gcc/testsuite/g++.old-deja/g++.abi/ptrflags.C
! 742ebe20c4717dd0f495744d84dc9b09  gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C
  84fee86dc35b4828d76a638ec9084b6d  gcc/testsuite/g++.old-deja/g++.abi/vbase1.C
  7514a6865a786af97664162d7f6693e9  gcc/testsuite/g++.old-deja/g++.abi/vbase2.C
  7e744eb415f839dd8cad69bc77d3950a  gcc/testsuite/g++.old-deja/g++.abi/vbase3.C
--- 23379,23385 ----
  9395d9e9e9319220bb7b637faff8c284  gcc/testsuite/g++.old-deja/g++.abi/primary4.C
  6f380830639cca69801edec0c70561f2  gcc/testsuite/g++.old-deja/g++.abi/primary5.C
  57336bb0967886c438b9ee6c25ae18ef  gcc/testsuite/g++.old-deja/g++.abi/ptrflags.C
! 2272bf3104dfa369c255cf1480de8359  gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C
  84fee86dc35b4828d76a638ec9084b6d  gcc/testsuite/g++.old-deja/g++.abi/vbase1.C
  7514a6865a786af97664162d7f6693e9  gcc/testsuite/g++.old-deja/g++.abi/vbase2.C
  7e744eb415f839dd8cad69bc77d3950a  gcc/testsuite/g++.old-deja/g++.abi/vbase3.C
*************** a89345be22478afb4922d14649cbe8db  gcc/te
*** 21953,21960 ****
  157940bf603a35fc56eb917d13800982  gcc/testsuite/g++.old-deja/g++.benjamin/13523.C
  7c659bbd81a9ba7b33c3ee689255fcb4  gcc/testsuite/g++.old-deja/g++.benjamin/13908.C
  d6f0470ac6fca8cc091e4f0cc4733335  gcc/testsuite/g++.old-deja/g++.benjamin/14139.C
! c59a9517eb45dfc4a9bd3aac3da06f8c  gcc/testsuite/g++.old-deja/g++.benjamin/14664-1.C
! f5ab8f5b3569671c9c11f4da5a9921f4  gcc/testsuite/g++.old-deja/g++.benjamin/14664-2.C
  d5029d042a715327d7d9c5244b1f6ed8  gcc/testsuite/g++.old-deja/g++.benjamin/14687.C
  cd82f5ef71fe2b5c2d726edde7e3f65c  gcc/testsuite/g++.old-deja/g++.benjamin/15054.C
  789ddec926eff48703b703ecafe1fee5  gcc/testsuite/g++.old-deja/g++.benjamin/15071.C
--- 23407,23414 ----
  157940bf603a35fc56eb917d13800982  gcc/testsuite/g++.old-deja/g++.benjamin/13523.C
  7c659bbd81a9ba7b33c3ee689255fcb4  gcc/testsuite/g++.old-deja/g++.benjamin/13908.C
  d6f0470ac6fca8cc091e4f0cc4733335  gcc/testsuite/g++.old-deja/g++.benjamin/14139.C
! 6575a7512577bce1c92a76a29c8582aa  gcc/testsuite/g++.old-deja/g++.benjamin/14664-1.C
! e62c55b6d5bb49ff0c0f8278531c188c  gcc/testsuite/g++.old-deja/g++.benjamin/14664-2.C
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  cd82f5ef71fe2b5c2d726edde7e3f65c  gcc/testsuite/g++.old-deja/g++.benjamin/15054.C
  789ddec926eff48703b703ecafe1fee5  gcc/testsuite/g++.old-deja/g++.benjamin/15071.C
*************** da80b7e97d4e9ee67decc3ead64065ff  gcc/te
*** 22010,22019 ****
  320f3eae6dc6bbd5aa64e7a285f758f7  gcc/testsuite/g++.old-deja/g++.bob/template2.C
  d3aa332b02a50a2c976fd3acd8f16058  gcc/testsuite/g++.old-deja/g++.bob/template3.C
  aeb5818b98767c6df0e85e3dd85f0da7  gcc/testsuite/g++.old-deja/g++.bob/template4.C
! 5db51ba4a794b1c423fcb0eaf77d3925  gcc/testsuite/g++.old-deja/g++.brendan/README
  ae92d366fb4b1fb345a39cf07442d5f1  gcc/testsuite/g++.old-deja/g++.brendan/abstract1.C
  fc6063368e5474a8653856d27762de94  gcc/testsuite/g++.old-deja/g++.brendan/access1.C
! 733594e93bfb4299cc0b06179acc3789  gcc/testsuite/g++.old-deja/g++.brendan/alignof.C
  529f738af77acbccc26b95d45ea05de2  gcc/testsuite/g++.old-deja/g++.brendan/ambiguity1.C
  8f1779bd8e0be9254448d93593ccd35a  gcc/testsuite/g++.old-deja/g++.brendan/anon-union1.C
  bdc4d1d13818def6ccb6fa43c79d8bf5  gcc/testsuite/g++.old-deja/g++.brendan/arm1.C
--- 23464,23473 ----
  320f3eae6dc6bbd5aa64e7a285f758f7  gcc/testsuite/g++.old-deja/g++.bob/template2.C
  d3aa332b02a50a2c976fd3acd8f16058  gcc/testsuite/g++.old-deja/g++.bob/template3.C
  aeb5818b98767c6df0e85e3dd85f0da7  gcc/testsuite/g++.old-deja/g++.bob/template4.C
! 423bef047dc63940d13ee2de061008e0  gcc/testsuite/g++.old-deja/g++.brendan/README
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  fc6063368e5474a8653856d27762de94  gcc/testsuite/g++.old-deja/g++.brendan/access1.C
! cd7e52b4b869a50f1833437935e02700  gcc/testsuite/g++.old-deja/g++.brendan/alignof.C
  529f738af77acbccc26b95d45ea05de2  gcc/testsuite/g++.old-deja/g++.brendan/ambiguity1.C
  8f1779bd8e0be9254448d93593ccd35a  gcc/testsuite/g++.old-deja/g++.brendan/anon-union1.C
  bdc4d1d13818def6ccb6fa43c79d8bf5  gcc/testsuite/g++.old-deja/g++.brendan/arm1.C
*************** c487c2f1d306c4b5ffd996ab598aac07  gcc/te
*** 22047,22059 ****
  440a4666ca3b9be9549267d67d3e2987  gcc/testsuite/g++.old-deja/g++.brendan/crash13.C
  4b3db8cbbfa7bf87638bbbff3162da29  gcc/testsuite/g++.old-deja/g++.brendan/crash14.C
  7529342852a16fca993789714b764021  gcc/testsuite/g++.old-deja/g++.brendan/crash15.C
! 63d187698f719a092db1cc2f96b7e9d1  gcc/testsuite/g++.old-deja/g++.brendan/crash16.C
  bde6a8384e3bb59092d0c83de1fed4cf  gcc/testsuite/g++.old-deja/g++.brendan/crash17.C
  fcffcc0ad91a1fb9bad3181202303e3f  gcc/testsuite/g++.old-deja/g++.brendan/crash18.C
  3f31ad7a3d6312a1259fb61edfad7bec  gcc/testsuite/g++.old-deja/g++.brendan/crash2.C
  53a2dd1bdf710845adc926626d619e59  gcc/testsuite/g++.old-deja/g++.brendan/crash20.C
! 7b2c605c6218e8948fecbe9842677c4b  gcc/testsuite/g++.old-deja/g++.brendan/crash22.C
! 33544868a90fd87dbf29417ea90a49fd  gcc/testsuite/g++.old-deja/g++.brendan/crash23.C
  f1d0f9a4e3705c747965388c45172a52  gcc/testsuite/g++.old-deja/g++.brendan/crash24.C
  bc249c935459f8b928782161b15f47b8  gcc/testsuite/g++.old-deja/g++.brendan/crash25.C
  8205b5bda9e4b98bed0dd54ab9af735b  gcc/testsuite/g++.old-deja/g++.brendan/crash26.C
--- 23501,23513 ----
  440a4666ca3b9be9549267d67d3e2987  gcc/testsuite/g++.old-deja/g++.brendan/crash13.C
  4b3db8cbbfa7bf87638bbbff3162da29  gcc/testsuite/g++.old-deja/g++.brendan/crash14.C
  7529342852a16fca993789714b764021  gcc/testsuite/g++.old-deja/g++.brendan/crash15.C
! e329dd05eed7cc8038f086397f67e997  gcc/testsuite/g++.old-deja/g++.brendan/crash16.C
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  3f31ad7a3d6312a1259fb61edfad7bec  gcc/testsuite/g++.old-deja/g++.brendan/crash2.C
  53a2dd1bdf710845adc926626d619e59  gcc/testsuite/g++.old-deja/g++.brendan/crash20.C
! 8f5a87bc4275f06bf72a82731457722d  gcc/testsuite/g++.old-deja/g++.brendan/crash22.C
! b49b5855846639a3157202180959a35a  gcc/testsuite/g++.old-deja/g++.brendan/crash23.C
  f1d0f9a4e3705c747965388c45172a52  gcc/testsuite/g++.old-deja/g++.brendan/crash24.C
  bc249c935459f8b928782161b15f47b8  gcc/testsuite/g++.old-deja/g++.brendan/crash25.C
  8205b5bda9e4b98bed0dd54ab9af735b  gcc/testsuite/g++.old-deja/g++.brendan/crash26.C
*************** a161c6c5bf5aa66fdbebd524763c816f  gcc/te
*** 22143,22149 ****
  31f487fac028affda10935beee342b67  gcc/testsuite/g++.old-deja/g++.brendan/err-msg2.C
  d467baa58472c5539a8d54137ae9fd90  gcc/testsuite/g++.old-deja/g++.brendan/err-msg3.C
  574b1869eeecbbe7e35891192119aae1  gcc/testsuite/g++.old-deja/g++.brendan/err-msg4.C
! 905514d94e69c283791a395b1caa8949  gcc/testsuite/g++.old-deja/g++.brendan/err-msg5.C
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--- 23597,23603 ----
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! b32d6df87f959a7345d00f8ae908a68d  gcc/testsuite/g++.old-deja/g++.brendan/err-msg5.C
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  a14ce5b47e835ce3d50a055484c37e9a  gcc/testsuite/g++.old-deja/g++.brendan/err-msg8.C
*************** c42688562e8873f0b3d710da92fd0eea  gcc/te
*** 22157,22163 ****
  e03dc940f61f56cd1996bf49e6201eee  gcc/testsuite/g++.old-deja/g++.brendan/init1.C
  4e18b3936e86061811d3dfba8b2c4d31  gcc/testsuite/g++.old-deja/g++.brendan/init10.C
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! 62115c076d63c13cb74234ef6b624704  gcc/testsuite/g++.old-deja/g++.brendan/init12.C
  a305765b5b9a1e0b319b904df2c4a15d  gcc/testsuite/g++.old-deja/g++.brendan/init13.C
  a7d97e82f3eb82db336f6f66c5226612  gcc/testsuite/g++.old-deja/g++.brendan/init2.C
  f2652f181d69d7a6744ebc38c4ae83ed  gcc/testsuite/g++.old-deja/g++.brendan/init3.C
--- 23611,23617 ----
  e03dc940f61f56cd1996bf49e6201eee  gcc/testsuite/g++.old-deja/g++.brendan/init1.C
  4e18b3936e86061811d3dfba8b2c4d31  gcc/testsuite/g++.old-deja/g++.brendan/init10.C
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! 07601e37966301a5099a99407b3fda69  gcc/testsuite/g++.old-deja/g++.brendan/init12.C
  a305765b5b9a1e0b319b904df2c4a15d  gcc/testsuite/g++.old-deja/g++.brendan/init13.C
  a7d97e82f3eb82db336f6f66c5226612  gcc/testsuite/g++.old-deja/g++.brendan/init2.C
  f2652f181d69d7a6744ebc38c4ae83ed  gcc/testsuite/g++.old-deja/g++.brendan/init3.C
*************** a9d5e4eb3d5a79edcae73706ea6bcbdc  gcc/te
*** 22256,22265 ****
  fd539b292de5deffe84b7aca6e365824  gcc/testsuite/g++.old-deja/g++.brendan/scope4.C
  905bd298a5df0d8fc999ae1b0a5c0dcb  gcc/testsuite/g++.old-deja/g++.brendan/scope5.C
  2ae7dc2e9f111a3ddbbb01e5ca479553  gcc/testsuite/g++.old-deja/g++.brendan/shadow1.C
! 469166bbd4c9d9e97114b09c480a39e7  gcc/testsuite/g++.old-deja/g++.brendan/sizeof1.C
! 232bbc492ea7277970b768de8806f2c0  gcc/testsuite/g++.old-deja/g++.brendan/sizeof2.C
! 16179429ab050df3f7e21bf20815e01d  gcc/testsuite/g++.old-deja/g++.brendan/sizeof3.C
! 155582fcdd8e972166db70e5fa5f3f72  gcc/testsuite/g++.old-deja/g++.brendan/sizeof4.C
  30da4846a089e66f7b78cd50474b36e3  gcc/testsuite/g++.old-deja/g++.brendan/sizeof5.C
  5e2033584074585a4562c059d4224b61  gcc/testsuite/g++.old-deja/g++.brendan/sorry1.C
  aa906bf43b597100d7b2c69938ea3534  gcc/testsuite/g++.old-deja/g++.brendan/static1.C
--- 23710,23719 ----
  fd539b292de5deffe84b7aca6e365824  gcc/testsuite/g++.old-deja/g++.brendan/scope4.C
  905bd298a5df0d8fc999ae1b0a5c0dcb  gcc/testsuite/g++.old-deja/g++.brendan/scope5.C
  2ae7dc2e9f111a3ddbbb01e5ca479553  gcc/testsuite/g++.old-deja/g++.brendan/shadow1.C
! abc96e1f5b63661a163e9ba5d9a07628  gcc/testsuite/g++.old-deja/g++.brendan/sizeof1.C
! 7848a52d0c4b0465116082c103910010  gcc/testsuite/g++.old-deja/g++.brendan/sizeof2.C
! 2dd97689da279a83748c05b49e12e10e  gcc/testsuite/g++.old-deja/g++.brendan/sizeof3.C
! b9de4e63f649c476249fdb022ab9c823  gcc/testsuite/g++.old-deja/g++.brendan/sizeof4.C
  30da4846a089e66f7b78cd50474b36e3  gcc/testsuite/g++.old-deja/g++.brendan/sizeof5.C
  5e2033584074585a4562c059d4224b61  gcc/testsuite/g++.old-deja/g++.brendan/sorry1.C
  aa906bf43b597100d7b2c69938ea3534  gcc/testsuite/g++.old-deja/g++.brendan/static1.C
*************** f03ee51aea223ecc3e1d9989152fcd9f  gcc/te
*** 22334,22340 ****
  dbe5da03e409fde6b692fe4fea89a355  gcc/testsuite/g++.old-deja/g++.bugs/900205_04.C
  e93debd4450b4bd4c90f612064b8ce9b  gcc/testsuite/g++.old-deja/g++.bugs/900207_03.C
  de65ccdcb52c011f5be6425612645ce0  gcc/testsuite/g++.old-deja/g++.bugs/900208_02.C
! 61d8cd21ad4d1060a0881672ce1b0133  gcc/testsuite/g++.old-deja/g++.bugs/900208_03.C
  4fb212343fadaeac90f3fbc8f76a766e  gcc/testsuite/g++.old-deja/g++.bugs/900208_04.C
  53a5eae1f920d333696f18640f990961  gcc/testsuite/g++.old-deja/g++.bugs/900209_01.C
  79390ee11aae50f0ebb8f4959b1d1e53  gcc/testsuite/g++.old-deja/g++.bugs/900210_01.C
--- 23788,23794 ----
  dbe5da03e409fde6b692fe4fea89a355  gcc/testsuite/g++.old-deja/g++.bugs/900205_04.C
  e93debd4450b4bd4c90f612064b8ce9b  gcc/testsuite/g++.old-deja/g++.bugs/900207_03.C
  de65ccdcb52c011f5be6425612645ce0  gcc/testsuite/g++.old-deja/g++.bugs/900208_02.C
! a45ae89b15bb1372f2256dd06d5a4721  gcc/testsuite/g++.old-deja/g++.bugs/900208_03.C
  4fb212343fadaeac90f3fbc8f76a766e  gcc/testsuite/g++.old-deja/g++.bugs/900208_04.C
  53a5eae1f920d333696f18640f990961  gcc/testsuite/g++.old-deja/g++.bugs/900209_01.C
  79390ee11aae50f0ebb8f4959b1d1e53  gcc/testsuite/g++.old-deja/g++.bugs/900210_01.C
*************** e9b978752f3e6b3a803beab6d95eb453  gcc/te
*** 22350,22377 ****
  ff07ad9f2a0d93718ca5f6af614604ed  gcc/testsuite/g++.old-deja/g++.bugs/900211_02.C
  6abd890f103a051448d93d9bda74c173  gcc/testsuite/g++.old-deja/g++.bugs/900211_03.C
  f9519950e375f26419d30233dc4b7bcd  gcc/testsuite/g++.old-deja/g++.bugs/900211_04.C
! 1caa62a8fd0034d34fdf5a8e206b8c49  gcc/testsuite/g++.old-deja/g++.bugs/900212_01.C
  c5d3a07860a418caf7cf6c28c8418e87  gcc/testsuite/g++.old-deja/g++.bugs/900212_02.C
  8865095e02ecca4e1b9d6cde406c8498  gcc/testsuite/g++.old-deja/g++.bugs/900212_03.C
  1e112938ddd807224a4e82c5da8c18fc  gcc/testsuite/g++.old-deja/g++.bugs/900213_01.C
! 90ebc12b87eb0d17161cd8bd67b07971  gcc/testsuite/g++.old-deja/g++.bugs/900213_02.C
! 69921538d135ee9fc08350178f124fa7  gcc/testsuite/g++.old-deja/g++.bugs/900213_03.C
  8098297cdeca16564cec0f2a5457af59  gcc/testsuite/g++.old-deja/g++.bugs/900214_01.C
  f2464867a8a1c97f8d6bc0d764230456  gcc/testsuite/g++.old-deja/g++.bugs/900215_01.C
! 25dec57ac8d1643dca7ab54962fdfd06  gcc/testsuite/g++.old-deja/g++.bugs/900215_02.C
  2d580aa45214c9c5624bc6140cf261b8  gcc/testsuite/g++.old-deja/g++.bugs/900220_01.C
  2a8b87bd0b980874491bd21a47307da3  gcc/testsuite/g++.old-deja/g++.bugs/900220_02.C
  581257e0732520f2bf2fdeb02256af41  gcc/testsuite/g++.old-deja/g++.bugs/900220_03.C
  9ca59f87faf9b2f3195d8bc7355cbf0b  gcc/testsuite/g++.old-deja/g++.bugs/900221_01.C
! 2f41c0d40bd81fbd38682c574c358d0a  gcc/testsuite/g++.old-deja/g++.bugs/900227_01.C
! 38428da15106725c9cdeec78d62f9def  gcc/testsuite/g++.old-deja/g++.bugs/900321_01.C
  2edfa97432f7032677694e75adc57ca8  gcc/testsuite/g++.old-deja/g++.bugs/900321_02.C
  b2b96c7ebd782c8f5262719e72124b85  gcc/testsuite/g++.old-deja/g++.bugs/900321_04.C
  1f16211b8272d36ce36562af2f46ab67  gcc/testsuite/g++.old-deja/g++.bugs/900321_05.C
  a733cce01aa0dde2896b12cce5468840  gcc/testsuite/g++.old-deja/g++.bugs/900322_01.C
! 938560630b9e5aa2e8c589d73e29459c  gcc/testsuite/g++.old-deja/g++.bugs/900324_02.C
  9aa66ee213cd895a0d92bb77ba0b9684  gcc/testsuite/g++.old-deja/g++.bugs/900324_03.C
! 4e0e41f367b26289726086977b1713af  gcc/testsuite/g++.old-deja/g++.bugs/900324_04.C
  c79225efeb1b5372067c4742a363bd3b  gcc/testsuite/g++.old-deja/g++.bugs/900324_05.C
  a6ad70bbfac742846a7f5068bc830b87  gcc/testsuite/g++.old-deja/g++.bugs/900324_06.C
  63f3022e6a8a4aa50e06adc840f4717d  gcc/testsuite/g++.old-deja/g++.bugs/900325_01.C
--- 23804,23831 ----
  ff07ad9f2a0d93718ca5f6af614604ed  gcc/testsuite/g++.old-deja/g++.bugs/900211_02.C
  6abd890f103a051448d93d9bda74c173  gcc/testsuite/g++.old-deja/g++.bugs/900211_03.C
  f9519950e375f26419d30233dc4b7bcd  gcc/testsuite/g++.old-deja/g++.bugs/900211_04.C
! 788b587cef17446b05492ed3fb77f288  gcc/testsuite/g++.old-deja/g++.bugs/900212_01.C
  c5d3a07860a418caf7cf6c28c8418e87  gcc/testsuite/g++.old-deja/g++.bugs/900212_02.C
  8865095e02ecca4e1b9d6cde406c8498  gcc/testsuite/g++.old-deja/g++.bugs/900212_03.C
  1e112938ddd807224a4e82c5da8c18fc  gcc/testsuite/g++.old-deja/g++.bugs/900213_01.C
! dc80f0b85bec75ad946450c737d121ac  gcc/testsuite/g++.old-deja/g++.bugs/900213_02.C
! 912b78e3d52ea4ab09b0557c7d8faab1  gcc/testsuite/g++.old-deja/g++.bugs/900213_03.C
  8098297cdeca16564cec0f2a5457af59  gcc/testsuite/g++.old-deja/g++.bugs/900214_01.C
  f2464867a8a1c97f8d6bc0d764230456  gcc/testsuite/g++.old-deja/g++.bugs/900215_01.C
! 488e07602147bded7796356a4aa9cbfc  gcc/testsuite/g++.old-deja/g++.bugs/900215_02.C
  2d580aa45214c9c5624bc6140cf261b8  gcc/testsuite/g++.old-deja/g++.bugs/900220_01.C
  2a8b87bd0b980874491bd21a47307da3  gcc/testsuite/g++.old-deja/g++.bugs/900220_02.C
  581257e0732520f2bf2fdeb02256af41  gcc/testsuite/g++.old-deja/g++.bugs/900220_03.C
  9ca59f87faf9b2f3195d8bc7355cbf0b  gcc/testsuite/g++.old-deja/g++.bugs/900221_01.C
! c909a243922356a5c5951cf3b10652b8  gcc/testsuite/g++.old-deja/g++.bugs/900227_01.C
! 26fe39f1081f43538ee5c334612db22b  gcc/testsuite/g++.old-deja/g++.bugs/900321_01.C
  2edfa97432f7032677694e75adc57ca8  gcc/testsuite/g++.old-deja/g++.bugs/900321_02.C
  b2b96c7ebd782c8f5262719e72124b85  gcc/testsuite/g++.old-deja/g++.bugs/900321_04.C
  1f16211b8272d36ce36562af2f46ab67  gcc/testsuite/g++.old-deja/g++.bugs/900321_05.C
  a733cce01aa0dde2896b12cce5468840  gcc/testsuite/g++.old-deja/g++.bugs/900322_01.C
! 885b556e3314faa5f35a979b38934b04  gcc/testsuite/g++.old-deja/g++.bugs/900324_02.C
  9aa66ee213cd895a0d92bb77ba0b9684  gcc/testsuite/g++.old-deja/g++.bugs/900324_03.C
! 9df6fc959494db29dd6b8fdeb061a9f1  gcc/testsuite/g++.old-deja/g++.bugs/900324_04.C
  c79225efeb1b5372067c4742a363bd3b  gcc/testsuite/g++.old-deja/g++.bugs/900324_05.C
  a6ad70bbfac742846a7f5068bc830b87  gcc/testsuite/g++.old-deja/g++.bugs/900324_06.C
  63f3022e6a8a4aa50e06adc840f4717d  gcc/testsuite/g++.old-deja/g++.bugs/900325_01.C
*************** f94f78525b0f62afaadc1a57a6b875f5  gcc/te
*** 22389,22401 ****
  154a87b721d11ed1738fbab683ce754a  gcc/testsuite/g++.old-deja/g++.bugs/900404_02.C
  aafbe08bde2c86ffa855c88d6df524dc  gcc/testsuite/g++.old-deja/g++.bugs/900404_03.C
  556dbc5118f231ade8f41134ea065eb2  gcc/testsuite/g++.old-deja/g++.bugs/900404_04.C
! 5390282e50e04854bcdcafbf527ddcca  gcc/testsuite/g++.old-deja/g++.bugs/900404_07.C
  4df342af36e75b7594742a38d8d90ee7  gcc/testsuite/g++.old-deja/g++.bugs/900405_01.C
  56b3109f93c4aee9592ddbf3c51a1730  gcc/testsuite/g++.old-deja/g++.bugs/900406_01.C
  91c5f6fa069ce699055f60aff08860cb  gcc/testsuite/g++.old-deja/g++.bugs/900406_02.C
  98b233cef5cf2faa9c7403a4afd54462  gcc/testsuite/g++.old-deja/g++.bugs/900407_01.C
  4254712d86c1247e0bb7a4a557701342  gcc/testsuite/g++.old-deja/g++.bugs/900428_01.C
! 40d55f0463f2346d367636ae29a2483e  gcc/testsuite/g++.old-deja/g++.bugs/900428_02.C
  a7f2e95ba80e6ff7241123560ecebb81  gcc/testsuite/g++.old-deja/g++.bugs/900428_03.C
  b1c7b3e270e0d71b8936cef937980314  gcc/testsuite/g++.old-deja/g++.bugs/900511_01.C
  816e40831e0d42b36ac328d1c140f3b5  gcc/testsuite/g++.old-deja/g++.bugs/900511_02.C
--- 23843,23855 ----
  154a87b721d11ed1738fbab683ce754a  gcc/testsuite/g++.old-deja/g++.bugs/900404_02.C
  aafbe08bde2c86ffa855c88d6df524dc  gcc/testsuite/g++.old-deja/g++.bugs/900404_03.C
  556dbc5118f231ade8f41134ea065eb2  gcc/testsuite/g++.old-deja/g++.bugs/900404_04.C
! 3aa3b22817d9f6db7acec24197a9f449  gcc/testsuite/g++.old-deja/g++.bugs/900404_07.C
  4df342af36e75b7594742a38d8d90ee7  gcc/testsuite/g++.old-deja/g++.bugs/900405_01.C
  56b3109f93c4aee9592ddbf3c51a1730  gcc/testsuite/g++.old-deja/g++.bugs/900406_01.C
  91c5f6fa069ce699055f60aff08860cb  gcc/testsuite/g++.old-deja/g++.bugs/900406_02.C
  98b233cef5cf2faa9c7403a4afd54462  gcc/testsuite/g++.old-deja/g++.bugs/900407_01.C
  4254712d86c1247e0bb7a4a557701342  gcc/testsuite/g++.old-deja/g++.bugs/900428_01.C
! ef11e6253209effe38033f3513d92382  gcc/testsuite/g++.old-deja/g++.bugs/900428_02.C
  a7f2e95ba80e6ff7241123560ecebb81  gcc/testsuite/g++.old-deja/g++.bugs/900428_03.C
  b1c7b3e270e0d71b8936cef937980314  gcc/testsuite/g++.old-deja/g++.bugs/900511_01.C
  816e40831e0d42b36ac328d1c140f3b5  gcc/testsuite/g++.old-deja/g++.bugs/900511_02.C
*************** d02aeec7eaafc8333c72af9f6e048ff0  gcc/te
*** 22406,22412 ****
  a645bf290df2e30cf8156ca9495e95cd  gcc/testsuite/g++.old-deja/g++.bugs/900519_03.C
  126ce9f8d7a9dea25b78727cf1afa373  gcc/testsuite/g++.old-deja/g++.bugs/900519_04.C
  7d3b7aaac399fac800937dd08d251cec  gcc/testsuite/g++.old-deja/g++.bugs/900519_05.C
! e0be39fecdbfe995ba780091f74dcccb  gcc/testsuite/g++.old-deja/g++.bugs/900519_06.C
  0171afa2bbd54b64c0abb778faf7da6b  gcc/testsuite/g++.old-deja/g++.bugs/900519_07.C
  d00253d70a14469314393d169bec2c0e  gcc/testsuite/g++.old-deja/g++.bugs/900519_09.C
  ac9a5240763e641aff84b4edf13031ce  gcc/testsuite/g++.old-deja/g++.bugs/900519_12.C
--- 23860,23866 ----
  a645bf290df2e30cf8156ca9495e95cd  gcc/testsuite/g++.old-deja/g++.bugs/900519_03.C
  126ce9f8d7a9dea25b78727cf1afa373  gcc/testsuite/g++.old-deja/g++.bugs/900519_04.C
  7d3b7aaac399fac800937dd08d251cec  gcc/testsuite/g++.old-deja/g++.bugs/900519_05.C
! 8f70f91f3f1b5c926d4670d9b58c041f  gcc/testsuite/g++.old-deja/g++.bugs/900519_06.C
  0171afa2bbd54b64c0abb778faf7da6b  gcc/testsuite/g++.old-deja/g++.bugs/900519_07.C
  d00253d70a14469314393d169bec2c0e  gcc/testsuite/g++.old-deja/g++.bugs/900519_09.C
  ac9a5240763e641aff84b4edf13031ce  gcc/testsuite/g++.old-deja/g++.bugs/900519_12.C
*************** f53033f53b20e92e0c7776246dec74d0  gcc/te
*** 22441,22454 ****
  e04cf950955ebdaeda17f9fc71317cc7  gcc/testsuite/g++.old-deja/g++.eh/catchptr1.C
  ee2dd570f0862f7f990dbd673349a664  gcc/testsuite/g++.old-deja/g++.eh/cleanup1.C
  9f047d9b60ef3c9ef4c87df19c10b467  gcc/testsuite/g++.old-deja/g++.eh/cleanup2.C
! cdc579ac8c8f4328b5b16917b301b7e8  gcc/testsuite/g++.old-deja/g++.eh/cond1.C
  b903876a0b6ee0eb25737e78430452f6  gcc/testsuite/g++.old-deja/g++.eh/crash1.C
  1604e9f615755f1d4b2fbb38669a2a74  gcc/testsuite/g++.old-deja/g++.eh/crash2.C
  739c732403e3a10677bc952248d7b3cf  gcc/testsuite/g++.old-deja/g++.eh/crash3.C
  328c615c13278b502e18b7a38ea32810  gcc/testsuite/g++.old-deja/g++.eh/crash4.C
  6f112400ec69874c71a11839a262eb16  gcc/testsuite/g++.old-deja/g++.eh/crash5.C
  c80d5660b1728bc2ac055847f51343bc  gcc/testsuite/g++.old-deja/g++.eh/crash6.C
! e3682fd6bb431631fc3f1bfe09cc68f1  gcc/testsuite/g++.old-deja/g++.eh/ctor1.C
  69dc075b8772cb01d011939a1a0896fb  gcc/testsuite/g++.old-deja/g++.eh/flow1.C
  4d9e6f65aec19c778c890a288bae5690  gcc/testsuite/g++.old-deja/g++.eh/fntry1.C
  a9f648d8da78dd871addee9542a65e72  gcc/testsuite/g++.old-deja/g++.eh/ia64-1.C
--- 23895,23908 ----
  e04cf950955ebdaeda17f9fc71317cc7  gcc/testsuite/g++.old-deja/g++.eh/catchptr1.C
  ee2dd570f0862f7f990dbd673349a664  gcc/testsuite/g++.old-deja/g++.eh/cleanup1.C
  9f047d9b60ef3c9ef4c87df19c10b467  gcc/testsuite/g++.old-deja/g++.eh/cleanup2.C
! b0edd89b41436e14c4cc1b2e3012d19c  gcc/testsuite/g++.old-deja/g++.eh/cond1.C
  b903876a0b6ee0eb25737e78430452f6  gcc/testsuite/g++.old-deja/g++.eh/crash1.C
  1604e9f615755f1d4b2fbb38669a2a74  gcc/testsuite/g++.old-deja/g++.eh/crash2.C
  739c732403e3a10677bc952248d7b3cf  gcc/testsuite/g++.old-deja/g++.eh/crash3.C
  328c615c13278b502e18b7a38ea32810  gcc/testsuite/g++.old-deja/g++.eh/crash4.C
  6f112400ec69874c71a11839a262eb16  gcc/testsuite/g++.old-deja/g++.eh/crash5.C
  c80d5660b1728bc2ac055847f51343bc  gcc/testsuite/g++.old-deja/g++.eh/crash6.C
! f5e76e20197d67a7df28b34111dfb855  gcc/testsuite/g++.old-deja/g++.eh/ctor1.C
  69dc075b8772cb01d011939a1a0896fb  gcc/testsuite/g++.old-deja/g++.eh/flow1.C
  4d9e6f65aec19c778c890a288bae5690  gcc/testsuite/g++.old-deja/g++.eh/fntry1.C
  a9f648d8da78dd871addee9542a65e72  gcc/testsuite/g++.old-deja/g++.eh/ia64-1.C
*************** bd0efa0a1fe0ed98636fcebbc5fd05e3  gcc/te
*** 22495,22501 ****
  83dc346ec7b1c2b8d6facdb07c9e5395  gcc/testsuite/g++.old-deja/g++.ext/anon1.C
  6ce37734760abfd9bd961226e88f2716  gcc/testsuite/g++.old-deja/g++.ext/anon2.C
  6dc1c08f311f5bdbef96fd9a1f96e2ea  gcc/testsuite/g++.old-deja/g++.ext/anon3.C
! ad0913538dd7d6e5fa83fb6ba070dcf4  gcc/testsuite/g++.old-deja/g++.ext/array1.C
  6d5e5c16bb1c19ffedd5ac387698d679  gcc/testsuite/g++.old-deja/g++.ext/array2.C
  0358c365e76d6d31e6b0d88db4a8b90b  gcc/testsuite/g++.old-deja/g++.ext/array3.C
  b2f69c1973b3d4b6b9e01df5ce3b43ba  gcc/testsuite/g++.old-deja/g++.ext/array4.C
--- 23949,23955 ----
  83dc346ec7b1c2b8d6facdb07c9e5395  gcc/testsuite/g++.old-deja/g++.ext/anon1.C
  6ce37734760abfd9bd961226e88f2716  gcc/testsuite/g++.old-deja/g++.ext/anon2.C
  6dc1c08f311f5bdbef96fd9a1f96e2ea  gcc/testsuite/g++.old-deja/g++.ext/anon3.C
! 340befe3f02d37b2d57ea1892d46d175  gcc/testsuite/g++.old-deja/g++.ext/array1.C
  6d5e5c16bb1c19ffedd5ac387698d679  gcc/testsuite/g++.old-deja/g++.ext/array2.C
  0358c365e76d6d31e6b0d88db4a8b90b  gcc/testsuite/g++.old-deja/g++.ext/array3.C
  b2f69c1973b3d4b6b9e01df5ce3b43ba  gcc/testsuite/g++.old-deja/g++.ext/array4.C
*************** b7def766ff417373e755c602745a7f45  gcc/te
*** 22572,22578 ****
  52c83307beb05763080ffe916dffc635  gcc/testsuite/g++.old-deja/g++.jason/access8.C
  b809cea88b6deb90f883f62542a22c96  gcc/testsuite/g++.old-deja/g++.jason/access9.C
  40698f8dcb21cc22f4864696f1071eed  gcc/testsuite/g++.old-deja/g++.jason/aggregate.C
! 73989b3452d2816b82b699381496d741  gcc/testsuite/g++.old-deja/g++.jason/ambig1.C
  c241c8b031388288ae124eb72c85b118  gcc/testsuite/g++.old-deja/g++.jason/ambig2.C
  dd61795a3b7287674e730b30bf7d8d37  gcc/testsuite/g++.old-deja/g++.jason/ambig3.C
  8d11cb9a258c08aefb18a70b8e85fd27  gcc/testsuite/g++.old-deja/g++.jason/anon.C
--- 24026,24032 ----
  52c83307beb05763080ffe916dffc635  gcc/testsuite/g++.old-deja/g++.jason/access8.C
  b809cea88b6deb90f883f62542a22c96  gcc/testsuite/g++.old-deja/g++.jason/access9.C
  40698f8dcb21cc22f4864696f1071eed  gcc/testsuite/g++.old-deja/g++.jason/aggregate.C
! e93de2ac8d3a17e3e532f0ed4d57518d  gcc/testsuite/g++.old-deja/g++.jason/ambig1.C
  c241c8b031388288ae124eb72c85b118  gcc/testsuite/g++.old-deja/g++.jason/ambig2.C
  dd61795a3b7287674e730b30bf7d8d37  gcc/testsuite/g++.old-deja/g++.jason/ambig3.C
  8d11cb9a258c08aefb18a70b8e85fd27  gcc/testsuite/g++.old-deja/g++.jason/anon.C
*************** d4d0980614269a0fe95c34ede890fef8  gcc/te
*** 22621,22635 ****
  1e7bb44d3765e5f813c41d5a36ba88cf  gcc/testsuite/g++.old-deja/g++.jason/conversion8.C
  75d3a37da568ed0385b73bc311845a19  gcc/testsuite/g++.old-deja/g++.jason/conversion9.C
  e1f35dc5cdbe0950a3d2f11e2bae3e0d  gcc/testsuite/g++.old-deja/g++.jason/crash1.C
! b908a684a68228cc43c1c82e98f30c15  gcc/testsuite/g++.old-deja/g++.jason/crash10.C
  e801e26cb7bc53d313a1859ca999282f  gcc/testsuite/g++.old-deja/g++.jason/crash11.C
  0cd27db28b5911b4375c2bc740961e81  gcc/testsuite/g++.old-deja/g++.jason/crash12.C
! 65deed696b1e616deab8fb84a5874c99  gcc/testsuite/g++.old-deja/g++.jason/crash3.C
  de4e5a7188efe89dc7462f1435cb70fa  gcc/testsuite/g++.old-deja/g++.jason/crash4.C
  5723e0186bec62dede196f7a356a847b  gcc/testsuite/g++.old-deja/g++.jason/crash5.C
  708d8b60488e8033c68be64bdd4d3a10  gcc/testsuite/g++.old-deja/g++.jason/crash6.C
  da2f1d65ff209286f61f25ae176997af  gcc/testsuite/g++.old-deja/g++.jason/crash7.C
! f1a5d1a491e1458924f43b60cd9f3bbe  gcc/testsuite/g++.old-deja/g++.jason/crash8.C
  475dd57d3a9da91920b33efd76753177  gcc/testsuite/g++.old-deja/g++.jason/crash9.C
  f758c99c01bf1e42fad8ce9ff974dad2  gcc/testsuite/g++.old-deja/g++.jason/ctor1.C
  72eeeca091d298f9f36a3fac59791c23  gcc/testsuite/g++.old-deja/g++.jason/ctor2.C
--- 24075,24089 ----
  1e7bb44d3765e5f813c41d5a36ba88cf  gcc/testsuite/g++.old-deja/g++.jason/conversion8.C
  75d3a37da568ed0385b73bc311845a19  gcc/testsuite/g++.old-deja/g++.jason/conversion9.C
  e1f35dc5cdbe0950a3d2f11e2bae3e0d  gcc/testsuite/g++.old-deja/g++.jason/crash1.C
! 7c5542dbafe87029623ac38e6136b762  gcc/testsuite/g++.old-deja/g++.jason/crash10.C
  e801e26cb7bc53d313a1859ca999282f  gcc/testsuite/g++.old-deja/g++.jason/crash11.C
  0cd27db28b5911b4375c2bc740961e81  gcc/testsuite/g++.old-deja/g++.jason/crash12.C
! de91fdb178cdf71b99fc946f2d905fc0  gcc/testsuite/g++.old-deja/g++.jason/crash3.C
  de4e5a7188efe89dc7462f1435cb70fa  gcc/testsuite/g++.old-deja/g++.jason/crash4.C
  5723e0186bec62dede196f7a356a847b  gcc/testsuite/g++.old-deja/g++.jason/crash5.C
  708d8b60488e8033c68be64bdd4d3a10  gcc/testsuite/g++.old-deja/g++.jason/crash6.C
  da2f1d65ff209286f61f25ae176997af  gcc/testsuite/g++.old-deja/g++.jason/crash7.C
! 7aa2cee7a8fc6a0c96d906c33bcd051b  gcc/testsuite/g++.old-deja/g++.jason/crash8.C
  475dd57d3a9da91920b33efd76753177  gcc/testsuite/g++.old-deja/g++.jason/crash9.C
  f758c99c01bf1e42fad8ce9ff974dad2  gcc/testsuite/g++.old-deja/g++.jason/ctor1.C
  72eeeca091d298f9f36a3fac59791c23  gcc/testsuite/g++.old-deja/g++.jason/ctor2.C
*************** beb07d7e7193d5b20c559e39f9f833bb  gcc/te
*** 22725,22737 ****
  190eaf169c3c8d34166229478918fdae  gcc/testsuite/g++.old-deja/g++.jason/opeq4.C
  5292a09a4c6bef333b385323117453e7  gcc/testsuite/g++.old-deja/g++.jason/opeq5.C
  1477d34b82967d572fc358778ff2b504  gcc/testsuite/g++.old-deja/g++.jason/opeq6.C
! 80b3aaa9c6c08b6a365ca96cd1d36845  gcc/testsuite/g++.old-deja/g++.jason/operator.C
  185eea2532af5023b78f9ce2e69cbacf  gcc/testsuite/g++.old-deja/g++.jason/operator2.C
  fa239349b87333357926a294a44fee03  gcc/testsuite/g++.old-deja/g++.jason/opover.C
  50849d785fd4c47ffa71357f340f5f0e  gcc/testsuite/g++.old-deja/g++.jason/optimize.C
  796c0d119fc65e4ae223644438d7907e  gcc/testsuite/g++.old-deja/g++.jason/optimize2.C
  5a6e60d6b2a9685110ff42cc8db4c7d5  gcc/testsuite/g++.old-deja/g++.jason/overload.C
! 1af3ca24349ac74154f0d4733a757f63  gcc/testsuite/g++.old-deja/g++.jason/overload1.C
  ae5a0dfe48e368790442e81a8b9d8426  gcc/testsuite/g++.old-deja/g++.jason/overload11.C
  6641ce97a2ce97987c1ef099986f9747  gcc/testsuite/g++.old-deja/g++.jason/overload12.C
  39865fb082322c1d2f877e1e31f98ce2  gcc/testsuite/g++.old-deja/g++.jason/overload13.C
--- 24179,24191 ----
  190eaf169c3c8d34166229478918fdae  gcc/testsuite/g++.old-deja/g++.jason/opeq4.C
  5292a09a4c6bef333b385323117453e7  gcc/testsuite/g++.old-deja/g++.jason/opeq5.C
  1477d34b82967d572fc358778ff2b504  gcc/testsuite/g++.old-deja/g++.jason/opeq6.C
! c894615b1093262b28e220a7da0cf53a  gcc/testsuite/g++.old-deja/g++.jason/operator.C
  185eea2532af5023b78f9ce2e69cbacf  gcc/testsuite/g++.old-deja/g++.jason/operator2.C
  fa239349b87333357926a294a44fee03  gcc/testsuite/g++.old-deja/g++.jason/opover.C
  50849d785fd4c47ffa71357f340f5f0e  gcc/testsuite/g++.old-deja/g++.jason/optimize.C
  796c0d119fc65e4ae223644438d7907e  gcc/testsuite/g++.old-deja/g++.jason/optimize2.C
  5a6e60d6b2a9685110ff42cc8db4c7d5  gcc/testsuite/g++.old-deja/g++.jason/overload.C
! a30cb826467b0455eb115c24314a8d2c  gcc/testsuite/g++.old-deja/g++.jason/overload1.C
  ae5a0dfe48e368790442e81a8b9d8426  gcc/testsuite/g++.old-deja/g++.jason/overload11.C
  6641ce97a2ce97987c1ef099986f9747  gcc/testsuite/g++.old-deja/g++.jason/overload12.C
  39865fb082322c1d2f877e1e31f98ce2  gcc/testsuite/g++.old-deja/g++.jason/overload13.C
*************** c107b85655e25ea65c92d3bf5c5f8f9c  gcc/te
*** 22816,22833 ****
  c01631c31e11d4cc9155124ca3be92ad  gcc/testsuite/g++.old-deja/g++.jason/rfg11.C
  b68e6789cb14c6dd5e693b769a6b3afb  gcc/testsuite/g++.old-deja/g++.jason/rfg12.C
  ffde7a25a76a6d04ac637d8dbfedd1be  gcc/testsuite/g++.old-deja/g++.jason/rfg13.C
! 6875f3adb94cd43f54c4abc1a4ad7a96  gcc/testsuite/g++.old-deja/g++.jason/rfg14.C
  d12b5f26d5c767f0038af7fb5c875bc7  gcc/testsuite/g++.old-deja/g++.jason/rfg16.C
! 00dc71ab735085e8af95ef62c58042dd  gcc/testsuite/g++.old-deja/g++.jason/rfg17.C
  e3f5957253643467d6197c84c260a066  gcc/testsuite/g++.old-deja/g++.jason/rfg18.C
  b15a02066349d625ce9871be99587303  gcc/testsuite/g++.old-deja/g++.jason/rfg2.C
! 31f1d32ed45bdf803e58cabd83fd7b90  gcc/testsuite/g++.old-deja/g++.jason/rfg20.C
  13ebf23427fa18f4ee543a709e2a52be  gcc/testsuite/g++.old-deja/g++.jason/rfg21.C
  8875c6edb176eec38e733ab2235a57cc  gcc/testsuite/g++.old-deja/g++.jason/rfg22.C
  33c899e34b73d78a4e367c8ce81771b9  gcc/testsuite/g++.old-deja/g++.jason/rfg23.C
  2cbe5674217be63ecc40b37d229fac84  gcc/testsuite/g++.old-deja/g++.jason/rfg24.C
  6dac5867e70284742950f30fffc05b04  gcc/testsuite/g++.old-deja/g++.jason/rfg25.C
! a6945d529cadafc1ffa77e88d84f2880  gcc/testsuite/g++.old-deja/g++.jason/rfg26.C
  83cda064b7016058bcf01cb9fb202c77  gcc/testsuite/g++.old-deja/g++.jason/rfg27.C
  9be6d3008ce17e1879ba82dc3dbf0f2d  gcc/testsuite/g++.old-deja/g++.jason/rfg28.C
  f09660c79805379617f5d3f5b0e40aab  gcc/testsuite/g++.old-deja/g++.jason/rfg3.C
--- 24270,24287 ----
  c01631c31e11d4cc9155124ca3be92ad  gcc/testsuite/g++.old-deja/g++.jason/rfg11.C
  b68e6789cb14c6dd5e693b769a6b3afb  gcc/testsuite/g++.old-deja/g++.jason/rfg12.C
  ffde7a25a76a6d04ac637d8dbfedd1be  gcc/testsuite/g++.old-deja/g++.jason/rfg13.C
! a9f43289c2b3a8b66695ae957802e7ca  gcc/testsuite/g++.old-deja/g++.jason/rfg14.C
  d12b5f26d5c767f0038af7fb5c875bc7  gcc/testsuite/g++.old-deja/g++.jason/rfg16.C
! 5d2a284016d19ecc525e9e67f66fe435  gcc/testsuite/g++.old-deja/g++.jason/rfg17.C
  e3f5957253643467d6197c84c260a066  gcc/testsuite/g++.old-deja/g++.jason/rfg18.C
  b15a02066349d625ce9871be99587303  gcc/testsuite/g++.old-deja/g++.jason/rfg2.C
! 05edb0b0bb5a24af8e927dedad4d8ac8  gcc/testsuite/g++.old-deja/g++.jason/rfg20.C
  13ebf23427fa18f4ee543a709e2a52be  gcc/testsuite/g++.old-deja/g++.jason/rfg21.C
  8875c6edb176eec38e733ab2235a57cc  gcc/testsuite/g++.old-deja/g++.jason/rfg22.C
  33c899e34b73d78a4e367c8ce81771b9  gcc/testsuite/g++.old-deja/g++.jason/rfg23.C
  2cbe5674217be63ecc40b37d229fac84  gcc/testsuite/g++.old-deja/g++.jason/rfg24.C
  6dac5867e70284742950f30fffc05b04  gcc/testsuite/g++.old-deja/g++.jason/rfg25.C
! 335ef2d4949d3079f7059ca54ec40797  gcc/testsuite/g++.old-deja/g++.jason/rfg26.C
  83cda064b7016058bcf01cb9fb202c77  gcc/testsuite/g++.old-deja/g++.jason/rfg27.C
  9be6d3008ce17e1879ba82dc3dbf0f2d  gcc/testsuite/g++.old-deja/g++.jason/rfg28.C
  f09660c79805379617f5d3f5b0e40aab  gcc/testsuite/g++.old-deja/g++.jason/rfg3.C
*************** f09660c79805379617f5d3f5b0e40aab  gcc/te
*** 22839,22845 ****
  4db6c46266a3c32e83e4b4f8e13f4321  gcc/testsuite/g++.old-deja/g++.jason/rfg9.C
  8d7bfb887f857b536bd49eb6280f1359  gcc/testsuite/g++.old-deja/g++.jason/rvalue1.C
  a7a84efb83b07b626b9173305e6c605d  gcc/testsuite/g++.old-deja/g++.jason/rvalue2.C
! bd2c9ff6e75478ef5092aa30ce900eff  gcc/testsuite/g++.old-deja/g++.jason/rvalue3.C
  647286463ce7ee3841394dc65c3053c9  gcc/testsuite/g++.old-deja/g++.jason/scoping.C
  d662843f32b192516f98c87aba14c1db  gcc/testsuite/g++.old-deja/g++.jason/scoping10.C
  55dc1fca689030b5a494bddbb4c29887  gcc/testsuite/g++.old-deja/g++.jason/scoping11.C
--- 24293,24299 ----
  4db6c46266a3c32e83e4b4f8e13f4321  gcc/testsuite/g++.old-deja/g++.jason/rfg9.C
  8d7bfb887f857b536bd49eb6280f1359  gcc/testsuite/g++.old-deja/g++.jason/rvalue1.C
  a7a84efb83b07b626b9173305e6c605d  gcc/testsuite/g++.old-deja/g++.jason/rvalue2.C
! 83d2df5596b586feab620eede29bd329  gcc/testsuite/g++.old-deja/g++.jason/rvalue3.C
  647286463ce7ee3841394dc65c3053c9  gcc/testsuite/g++.old-deja/g++.jason/scoping.C
  d662843f32b192516f98c87aba14c1db  gcc/testsuite/g++.old-deja/g++.jason/scoping10.C
  55dc1fca689030b5a494bddbb4c29887  gcc/testsuite/g++.old-deja/g++.jason/scoping11.C
*************** e4681da1536da14176b6242aa0cde9a4  gcc/te
*** 22927,22933 ****
  0f465f011856318e4a82bae9e718ca27  gcc/testsuite/g++.old-deja/g++.jason/tempsub.C
  40fcdd9ac5d7df502c6154f385d814a8  gcc/testsuite/g++.old-deja/g++.jason/this.C
  9c846445e2018745dcc34b2f1642858c  gcc/testsuite/g++.old-deja/g++.jason/thunk1.C
! d3fafd3e53eb05ce93ee99b1ae2aa03e  gcc/testsuite/g++.old-deja/g++.jason/thunk2.C
  050d480fa5d286b20bb24dfe16b45512  gcc/testsuite/g++.old-deja/g++.jason/thunk3.C
  776a6eba4666d06b4325a2d0850afe81  gcc/testsuite/g++.old-deja/g++.jason/tredecl.C
  bed2e0f518532685396e3880a1588ea1  gcc/testsuite/g++.old-deja/g++.jason/tredecl2.C
--- 24381,24387 ----
  0f465f011856318e4a82bae9e718ca27  gcc/testsuite/g++.old-deja/g++.jason/tempsub.C
  40fcdd9ac5d7df502c6154f385d814a8  gcc/testsuite/g++.old-deja/g++.jason/this.C
  9c846445e2018745dcc34b2f1642858c  gcc/testsuite/g++.old-deja/g++.jason/thunk1.C
! be291c15304c06200056b75e15bc43e8  gcc/testsuite/g++.old-deja/g++.jason/thunk2.C
  050d480fa5d286b20bb24dfe16b45512  gcc/testsuite/g++.old-deja/g++.jason/thunk3.C
  776a6eba4666d06b4325a2d0850afe81  gcc/testsuite/g++.old-deja/g++.jason/tredecl.C
  bed2e0f518532685396e3880a1588ea1  gcc/testsuite/g++.old-deja/g++.jason/tredecl2.C
*************** e53f8b117ecf4eba5c6610643b9c8d37  gcc/te
*** 22946,22952 ****
  df2e95f2cb604e33043e5e22310ad808  gcc/testsuite/g++.old-deja/g++.jason/virtual2.C
  63811b96a427481ed3e05bb30f3baefd  gcc/testsuite/g++.old-deja/g++.jason/warning1.C
  e75b78d24078dbf9a96ada8194eef893  gcc/testsuite/g++.old-deja/g++.jason/warning10.C
! b9ca30d37fac6acf66c637735809e3f4  gcc/testsuite/g++.old-deja/g++.jason/warning2.C
  6384c745095d306a45f180077d5d781e  gcc/testsuite/g++.old-deja/g++.jason/warning3.C
  75b0ada46a8aed6045f5f3ca90df1184  gcc/testsuite/g++.old-deja/g++.jason/warning4.C
  a527d9d80c0f8b1b8cc068fbe97dd294  gcc/testsuite/g++.old-deja/g++.jason/warning5.C
--- 24400,24406 ----
  df2e95f2cb604e33043e5e22310ad808  gcc/testsuite/g++.old-deja/g++.jason/virtual2.C
  63811b96a427481ed3e05bb30f3baefd  gcc/testsuite/g++.old-deja/g++.jason/warning1.C
  e75b78d24078dbf9a96ada8194eef893  gcc/testsuite/g++.old-deja/g++.jason/warning10.C
! 5ab5b412e37be663eedaeb615a1ea2f2  gcc/testsuite/g++.old-deja/g++.jason/warning2.C
  6384c745095d306a45f180077d5d781e  gcc/testsuite/g++.old-deja/g++.jason/warning3.C
  75b0ada46a8aed6045f5f3ca90df1184  gcc/testsuite/g++.old-deja/g++.jason/warning4.C
  a527d9d80c0f8b1b8cc068fbe97dd294  gcc/testsuite/g++.old-deja/g++.jason/warning5.C
*************** d064abffb69b49b904a86972c9b22300  gcc/te
*** 23008,23014 ****
  29d3471a87868e8920c62fa56566e9ee  gcc/testsuite/g++.old-deja/g++.law/copy2.C
  ddd94f6a966c58c0d4cb276a337f304f  gcc/testsuite/g++.old-deja/g++.law/ctors1.C
  7a3469597d71dca36d051be33105b52a  gcc/testsuite/g++.old-deja/g++.law/ctors10.C
! 3bef65d7cec008fcb2e5d65f04c86dc3  gcc/testsuite/g++.old-deja/g++.law/ctors11.C
  696279d94532f23faaf6dbad6ee673b8  gcc/testsuite/g++.old-deja/g++.law/ctors12.C
  0b0cdcae93cc7c8a064b5678606e0ba0  gcc/testsuite/g++.old-deja/g++.law/ctors13.C
  0ba2fb7388850829ec3b09582a604416  gcc/testsuite/g++.old-deja/g++.law/ctors14.C
--- 24462,24468 ----
  29d3471a87868e8920c62fa56566e9ee  gcc/testsuite/g++.old-deja/g++.law/copy2.C
  ddd94f6a966c58c0d4cb276a337f304f  gcc/testsuite/g++.old-deja/g++.law/ctors1.C
  7a3469597d71dca36d051be33105b52a  gcc/testsuite/g++.old-deja/g++.law/ctors10.C
! a45d391e647a27d74e3e32bd396ae739  gcc/testsuite/g++.old-deja/g++.law/ctors11.C
  696279d94532f23faaf6dbad6ee673b8  gcc/testsuite/g++.old-deja/g++.law/ctors12.C
  0b0cdcae93cc7c8a064b5678606e0ba0  gcc/testsuite/g++.old-deja/g++.law/ctors13.C
  0ba2fb7388850829ec3b09582a604416  gcc/testsuite/g++.old-deja/g++.law/ctors14.C
*************** a3655db48ce5aa14618d4b6b4c59c540  gcc/te
*** 23022,23032 ****
  dc32c6d12d1a1b5cd5bb38c3c95f7d21  gcc/testsuite/g++.old-deja/g++.law/ctors21.C
  7fca46a172e3bee134b4a9f9b5e04bad  gcc/testsuite/g++.old-deja/g++.law/ctors3.C
  06ecb0ea3c8fc37c696d9abb04e7f082  gcc/testsuite/g++.old-deja/g++.law/ctors4.C
! 40e10348f8083817c0cc6b626b261ef2  gcc/testsuite/g++.old-deja/g++.law/ctors5.C
  3c88f551fae35afe3700c32a9b86ba3b  gcc/testsuite/g++.old-deja/g++.law/ctors6.C
  6ccdf846deed077c0368e1979b098c62  gcc/testsuite/g++.old-deja/g++.law/ctors7.C
  1c153aca2432c068fe35c65ebd6b24b9  gcc/testsuite/g++.old-deja/g++.law/ctors8.C
! 188253d7eb4857cea84f635b4602599b  gcc/testsuite/g++.old-deja/g++.law/ctors9.C
  f0df189213175eb2b1bbf550a1c849cc  gcc/testsuite/g++.old-deja/g++.law/cvt1.C
  fcbd9d2e0d2962c61af5769fe885706c  gcc/testsuite/g++.old-deja/g++.law/cvt10.C
  cd57cca9b529c67b67c03c5496ba89fe  gcc/testsuite/g++.old-deja/g++.law/cvt11.C
--- 24476,24486 ----
  dc32c6d12d1a1b5cd5bb38c3c95f7d21  gcc/testsuite/g++.old-deja/g++.law/ctors21.C
  7fca46a172e3bee134b4a9f9b5e04bad  gcc/testsuite/g++.old-deja/g++.law/ctors3.C
  06ecb0ea3c8fc37c696d9abb04e7f082  gcc/testsuite/g++.old-deja/g++.law/ctors4.C
! 9e5674e58e1f4e089d887d719f784045  gcc/testsuite/g++.old-deja/g++.law/ctors5.C
  3c88f551fae35afe3700c32a9b86ba3b  gcc/testsuite/g++.old-deja/g++.law/ctors6.C
  6ccdf846deed077c0368e1979b098c62  gcc/testsuite/g++.old-deja/g++.law/ctors7.C
  1c153aca2432c068fe35c65ebd6b24b9  gcc/testsuite/g++.old-deja/g++.law/ctors8.C
! a8b29a91d8bc8d2b85a1630e2f4a9b4a  gcc/testsuite/g++.old-deja/g++.law/ctors9.C
  f0df189213175eb2b1bbf550a1c849cc  gcc/testsuite/g++.old-deja/g++.law/cvt1.C
  fcbd9d2e0d2962c61af5769fe885706c  gcc/testsuite/g++.old-deja/g++.law/cvt10.C
  cd57cca9b529c67b67c03c5496ba89fe  gcc/testsuite/g++.old-deja/g++.law/cvt11.C
*************** d360b646180a1bddcb974249a70738e5  gcc/te
*** 23160,23173 ****
  c92c5524fc726c394131a8db74797f2e  gcc/testsuite/g++.old-deja/g++.law/static-mem5.C
  391c989429af823aab04d0ac377f0c83  gcc/testsuite/g++.old-deja/g++.law/template1.C
  d23ef9b8d21b1c02e42bdecdf5a495b8  gcc/testsuite/g++.old-deja/g++.law/template3.C
! 394351783245ab6239f7501eeb9fa57b  gcc/testsuite/g++.old-deja/g++.law/temps1.C
  de41c99e37047e7ab7a3c97f25f3d6bb  gcc/testsuite/g++.old-deja/g++.law/temps2.C
  44205740268580d94274eae346c01cbf  gcc/testsuite/g++.old-deja/g++.law/temps3.C
  1faeeecea65546c31c18ebfb052a2ac1  gcc/testsuite/g++.old-deja/g++.law/temps4.C
  c2c8b180a44ba52b34571e512aeeeda8  gcc/testsuite/g++.old-deja/g++.law/temps5.C
  d21b9d4454b6997df2c975e4e771432c  gcc/testsuite/g++.old-deja/g++.law/temps6.C
  8a7dbb074a12d500597c712c544bc6a5  gcc/testsuite/g++.old-deja/g++.law/temps7.C
! 83d40dd19fb328b9dca836c90d3d86c8  gcc/testsuite/g++.old-deja/g++.law/typeck1.C
  f8cb1fe2f91b8dfc0edbec58eee2f6a2  gcc/testsuite/g++.old-deja/g++.law/typeck2.C
  fb72e0d2fea16c73ec4fddda21e15df1  gcc/testsuite/g++.old-deja/g++.law/typeck3.C
  7fabb065dd8c5691fcfa9a14987f3d8a  gcc/testsuite/g++.old-deja/g++.law/typeck4.C
--- 24614,24627 ----
  c92c5524fc726c394131a8db74797f2e  gcc/testsuite/g++.old-deja/g++.law/static-mem5.C
  391c989429af823aab04d0ac377f0c83  gcc/testsuite/g++.old-deja/g++.law/template1.C
  d23ef9b8d21b1c02e42bdecdf5a495b8  gcc/testsuite/g++.old-deja/g++.law/template3.C
! 4ce63db86cafe2394a34fce990fa4de7  gcc/testsuite/g++.old-deja/g++.law/temps1.C
  de41c99e37047e7ab7a3c97f25f3d6bb  gcc/testsuite/g++.old-deja/g++.law/temps2.C
  44205740268580d94274eae346c01cbf  gcc/testsuite/g++.old-deja/g++.law/temps3.C
  1faeeecea65546c31c18ebfb052a2ac1  gcc/testsuite/g++.old-deja/g++.law/temps4.C
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  d21b9d4454b6997df2c975e4e771432c  gcc/testsuite/g++.old-deja/g++.law/temps6.C
  8a7dbb074a12d500597c712c544bc6a5  gcc/testsuite/g++.old-deja/g++.law/temps7.C
! e0a4551329654d31cfb1a4f3e8df2d1f  gcc/testsuite/g++.old-deja/g++.law/typeck1.C
  f8cb1fe2f91b8dfc0edbec58eee2f6a2  gcc/testsuite/g++.old-deja/g++.law/typeck2.C
  fb72e0d2fea16c73ec4fddda21e15df1  gcc/testsuite/g++.old-deja/g++.law/typeck3.C
  7fabb065dd8c5691fcfa9a14987f3d8a  gcc/testsuite/g++.old-deja/g++.law/typeck4.C
*************** b0021e7056bc3ffa8c7abf02d43c8a27  gcc/te
*** 23183,23189 ****
  bf2c9b06556999dd1a62fb7f0b8a0cbc  gcc/testsuite/g++.old-deja/g++.law/virtual3.C
  262bdcf37f1f8e0e4ab1e2307a42eb36  gcc/testsuite/g++.old-deja/g++.law/virtual4.C
  de29ab2e92616aa500d00dccc5c13384  gcc/testsuite/g++.old-deja/g++.law/visibility1.C
! 1678bdf123cde06706d7d39e604f971f  gcc/testsuite/g++.old-deja/g++.law/visibility10.C
  a25826be78810e5dc71078f5af23ec75  gcc/testsuite/g++.old-deja/g++.law/visibility11.C
  272058e75bb7c78065dbfe14a119aae2  gcc/testsuite/g++.old-deja/g++.law/visibility12.C
  078e450db48872ef44e7b3927f9ff1cc  gcc/testsuite/g++.old-deja/g++.law/visibility13.C
--- 24637,24643 ----
  bf2c9b06556999dd1a62fb7f0b8a0cbc  gcc/testsuite/g++.old-deja/g++.law/virtual3.C
  262bdcf37f1f8e0e4ab1e2307a42eb36  gcc/testsuite/g++.old-deja/g++.law/virtual4.C
  de29ab2e92616aa500d00dccc5c13384  gcc/testsuite/g++.old-deja/g++.law/visibility1.C
! f0172f6ae49ffde513b6ca7a5245ae8b  gcc/testsuite/g++.old-deja/g++.law/visibility10.C
  a25826be78810e5dc71078f5af23ec75  gcc/testsuite/g++.old-deja/g++.law/visibility11.C
  272058e75bb7c78065dbfe14a119aae2  gcc/testsuite/g++.old-deja/g++.law/visibility12.C
  078e450db48872ef44e7b3927f9ff1cc  gcc/testsuite/g++.old-deja/g++.law/visibility13.C
*************** ecd65202602b6795f8dbb999d1dd3a75  gcc/te
*** 23244,23252 ****
  ace99590d34eb0094953512378201308  gcc/testsuite/g++.old-deja/g++.mike/dyncast1.C
  86abb12e108b3cedc02dfb1a813ba683  gcc/testsuite/g++.old-deja/g++.mike/dyncast2.C
  6835b0f0050677acc01b699642f4a892  gcc/testsuite/g++.old-deja/g++.mike/dyncast3.C
! 8c9c28389586715ad433496f1ce0c8c0  gcc/testsuite/g++.old-deja/g++.mike/dyncast4.C
  85f0e8d1ccc85a511c10e149de6699ef  gcc/testsuite/g++.old-deja/g++.mike/dyncast5.C
! 069452d36238432ebbfbcdceb8893624  gcc/testsuite/g++.old-deja/g++.mike/dyncast6.C
  fb9b779da9bd2d460c71d8c0f1f6d090  gcc/testsuite/g++.old-deja/g++.mike/dyncast7.C
  cdcf7943e31dae20cf4b2ef4c0f6436c  gcc/testsuite/g++.old-deja/g++.mike/dyncast8.C
  dc0842e0e7b05c40ec3e0d4c4870e146  gcc/testsuite/g++.old-deja/g++.mike/dyncast9.C
--- 24698,24706 ----
  ace99590d34eb0094953512378201308  gcc/testsuite/g++.old-deja/g++.mike/dyncast1.C
  86abb12e108b3cedc02dfb1a813ba683  gcc/testsuite/g++.old-deja/g++.mike/dyncast2.C
  6835b0f0050677acc01b699642f4a892  gcc/testsuite/g++.old-deja/g++.mike/dyncast3.C
! 52c9112b967757746faf0c3e16c2465a  gcc/testsuite/g++.old-deja/g++.mike/dyncast4.C
  85f0e8d1ccc85a511c10e149de6699ef  gcc/testsuite/g++.old-deja/g++.mike/dyncast5.C
! e9b0560fbe893157bec31312a0b9e4a2  gcc/testsuite/g++.old-deja/g++.mike/dyncast6.C
  fb9b779da9bd2d460c71d8c0f1f6d090  gcc/testsuite/g++.old-deja/g++.mike/dyncast7.C
  cdcf7943e31dae20cf4b2ef4c0f6436c  gcc/testsuite/g++.old-deja/g++.mike/dyncast8.C
  dc0842e0e7b05c40ec3e0d4c4870e146  gcc/testsuite/g++.old-deja/g++.mike/dyncast9.C
*************** ab3b14296b0131025ad22d3dcff031e0  gcc/te
*** 23298,23304 ****
  b510dab899ef0bf0c572e31b58dadecb  gcc/testsuite/g++.old-deja/g++.mike/eh52.C
  3f10506613385d154f4f3c9ff3452bb5  gcc/testsuite/g++.old-deja/g++.mike/eh53.C
  262974dca680b7a7debb6d5ed0a3fce1  gcc/testsuite/g++.old-deja/g++.mike/eh54.C
! 483e7e44ebafc85c67375cba848841b3  gcc/testsuite/g++.old-deja/g++.mike/eh55.C
  721631abb8736c7422b3f6ca658cee39  gcc/testsuite/g++.old-deja/g++.mike/eh56.C
  a0354fc7c1799eba103513523b8d4fdb  gcc/testsuite/g++.old-deja/g++.mike/eh57.C
  b820d9ebc457c4c7452aac881a7adfbf  gcc/testsuite/g++.old-deja/g++.mike/eh58.C
--- 24752,24758 ----
  b510dab899ef0bf0c572e31b58dadecb  gcc/testsuite/g++.old-deja/g++.mike/eh52.C
  3f10506613385d154f4f3c9ff3452bb5  gcc/testsuite/g++.old-deja/g++.mike/eh53.C
  262974dca680b7a7debb6d5ed0a3fce1  gcc/testsuite/g++.old-deja/g++.mike/eh54.C
! 5925f7509c05a3c7501d3e69f9f7cb49  gcc/testsuite/g++.old-deja/g++.mike/eh55.C
  721631abb8736c7422b3f6ca658cee39  gcc/testsuite/g++.old-deja/g++.mike/eh56.C
  a0354fc7c1799eba103513523b8d4fdb  gcc/testsuite/g++.old-deja/g++.mike/eh57.C
  b820d9ebc457c4c7452aac881a7adfbf  gcc/testsuite/g++.old-deja/g++.mike/eh58.C
*************** f0b18a96412fba40036c5cc3ed4f11e9  gcc/te
*** 23352,23358 ****
  e6594ec56e3a8194bdddd134459b4e03  gcc/testsuite/g++.old-deja/g++.mike/net2.C
  ed72c29086bebb4ba46634996ad57aa1  gcc/testsuite/g++.old-deja/g++.mike/net20.C
  8a2e6c3fb3f01622359acff267ee1ec3  gcc/testsuite/g++.old-deja/g++.mike/net21.C
! 036c78160c1f4dfbcae9f5909927a931  gcc/testsuite/g++.old-deja/g++.mike/net22.C
  1b1082e7d062b133767d098f62d4b100  gcc/testsuite/g++.old-deja/g++.mike/net23.C
  7ecd808b646274e5020f8058282b5dce  gcc/testsuite/g++.old-deja/g++.mike/net24.C
  1ead8950fec10fb4a339d0b4c07bcc38  gcc/testsuite/g++.old-deja/g++.mike/net25.C
--- 24806,24812 ----
  e6594ec56e3a8194bdddd134459b4e03  gcc/testsuite/g++.old-deja/g++.mike/net2.C
  ed72c29086bebb4ba46634996ad57aa1  gcc/testsuite/g++.old-deja/g++.mike/net20.C
  8a2e6c3fb3f01622359acff267ee1ec3  gcc/testsuite/g++.old-deja/g++.mike/net21.C
! ca9b5cb3e46b03c467aae8a8fffd5dc0  gcc/testsuite/g++.old-deja/g++.mike/net22.C
  1b1082e7d062b133767d098f62d4b100  gcc/testsuite/g++.old-deja/g++.mike/net23.C
  7ecd808b646274e5020f8058282b5dce  gcc/testsuite/g++.old-deja/g++.mike/net24.C
  1ead8950fec10fb4a339d0b4c07bcc38  gcc/testsuite/g++.old-deja/g++.mike/net25.C
*************** bc8ff03ddefd91988689fe1f2a08133b  gcc/te
*** 23411,23417 ****
  e2feac9127adf4e8c8be5089abc9d8de  gcc/testsuite/g++.old-deja/g++.mike/p11110.C
  fbbf837d570b0f07c0c996cdd3246525  gcc/testsuite/g++.old-deja/g++.mike/p11142.C
  b5b4f062ee7ca457204aa955b5a85d9a  gcc/testsuite/g++.old-deja/g++.mike/p11144.C
! 077e9f205b257b42b1b2732d64559c94  gcc/testsuite/g++.old-deja/g++.mike/p11482.C
  30520ec507faa045cd8d09733f3870e7  gcc/testsuite/g++.old-deja/g++.mike/p11667.C
  80d65a0823d659c44ac2db3201ac83cd  gcc/testsuite/g++.old-deja/g++.mike/p12306.C
  c4dcd550948be751ed2cff210eb115fc  gcc/testsuite/g++.old-deja/g++.mike/p12306a.C
--- 24865,24871 ----
  e2feac9127adf4e8c8be5089abc9d8de  gcc/testsuite/g++.old-deja/g++.mike/p11110.C
  fbbf837d570b0f07c0c996cdd3246525  gcc/testsuite/g++.old-deja/g++.mike/p11142.C
  b5b4f062ee7ca457204aa955b5a85d9a  gcc/testsuite/g++.old-deja/g++.mike/p11144.C
! 804e792bd736163a5b79b4ccb2b2b5d6  gcc/testsuite/g++.old-deja/g++.mike/p11482.C
  30520ec507faa045cd8d09733f3870e7  gcc/testsuite/g++.old-deja/g++.mike/p11667.C
  80d65a0823d659c44ac2db3201ac83cd  gcc/testsuite/g++.old-deja/g++.mike/p12306.C
  c4dcd550948be751ed2cff210eb115fc  gcc/testsuite/g++.old-deja/g++.mike/p12306a.C
*************** b66461e3466bfee2d64e7eea6102171f  gcc/te
*** 23422,23428 ****
  6f4ba110bada8b742fdcc2f31b174243  gcc/testsuite/g++.old-deja/g++.mike/p1989.C
  e889e3271509938bfb1799b00e72a841  gcc/testsuite/g++.old-deja/g++.mike/p2394.C
  a2506956134c374b100b47ee83408a71  gcc/testsuite/g++.old-deja/g++.mike/p2431.C
! a082959685370b1e84cf84f6d14e7426  gcc/testsuite/g++.old-deja/g++.mike/p2573.C
  5de470969094eb667c0f4a6dfede0ef5  gcc/testsuite/g++.old-deja/g++.mike/p2736.C
  33ed7eb20af5e6ee2e8a40a2b916922a  gcc/testsuite/g++.old-deja/g++.mike/p2746.C
  6546e7c78bbe751072d6856ff094477f  gcc/testsuite/g++.old-deja/g++.mike/p2793.C
--- 24876,24882 ----
  6f4ba110bada8b742fdcc2f31b174243  gcc/testsuite/g++.old-deja/g++.mike/p1989.C
  e889e3271509938bfb1799b00e72a841  gcc/testsuite/g++.old-deja/g++.mike/p2394.C
  a2506956134c374b100b47ee83408a71  gcc/testsuite/g++.old-deja/g++.mike/p2431.C
! 82f2fad68161828c4fc1139794eeb96b  gcc/testsuite/g++.old-deja/g++.mike/p2573.C
  5de470969094eb667c0f4a6dfede0ef5  gcc/testsuite/g++.old-deja/g++.mike/p2736.C
  33ed7eb20af5e6ee2e8a40a2b916922a  gcc/testsuite/g++.old-deja/g++.mike/p2746.C
  6546e7c78bbe751072d6856ff094477f  gcc/testsuite/g++.old-deja/g++.mike/p2793.C
*************** a374d562febe9e05f5916b22baa7c15a  gcc/te
*** 23430,23436 ****
  d2c99260e4f431ccfe3df52d0417f3e2  gcc/testsuite/g++.old-deja/g++.mike/p2846.C
  d6d68f430bfaba7d33736d647fbc5f9a  gcc/testsuite/g++.old-deja/g++.mike/p2846a.C
  60c4e62b2d4472f11e5d9c1c76530654  gcc/testsuite/g++.old-deja/g++.mike/p2846b.C
! 1cf0cefd0b27e3b8cf977554203da65c  gcc/testsuite/g++.old-deja/g++.mike/p2855.C
  f9eabf76220ab85f7858705f32bf365c  gcc/testsuite/g++.old-deja/g++.mike/p2960.C
  f6372b326346bae5cb43cdbb5908973f  gcc/testsuite/g++.old-deja/g++.mike/p3041.C
  79212786796e431b8283fd5fc49261ff  gcc/testsuite/g++.old-deja/g++.mike/p3060c.C
--- 24884,24890 ----
  d2c99260e4f431ccfe3df52d0417f3e2  gcc/testsuite/g++.old-deja/g++.mike/p2846.C
  d6d68f430bfaba7d33736d647fbc5f9a  gcc/testsuite/g++.old-deja/g++.mike/p2846a.C
  60c4e62b2d4472f11e5d9c1c76530654  gcc/testsuite/g++.old-deja/g++.mike/p2846b.C
! f7dae9fa1a77cf40152391dc7dd9fe57  gcc/testsuite/g++.old-deja/g++.mike/p2855.C
  f9eabf76220ab85f7858705f32bf365c  gcc/testsuite/g++.old-deja/g++.mike/p2960.C
  f6372b326346bae5cb43cdbb5908973f  gcc/testsuite/g++.old-deja/g++.mike/p3041.C
  79212786796e431b8283fd5fc49261ff  gcc/testsuite/g++.old-deja/g++.mike/p3060c.C
*************** d1ef9c53f29b6743afa8e3587d292d27  gcc/te
*** 23496,23502 ****
  f43a0dd80f368bc325088dcdf5b1f017  gcc/testsuite/g++.old-deja/g++.mike/p701.C
  e7b146af94ac9a8c09caf0f119938b97  gcc/testsuite/g++.old-deja/g++.mike/p710.C
  4f1b7fceb4b2604eeaa908c9d14306de  gcc/testsuite/g++.old-deja/g++.mike/p7180.C
! 568923051a6f75c6fddc0d7ab86212bd  gcc/testsuite/g++.old-deja/g++.mike/p7476.C
  8803cf6c10b127dce849e86a3a7fcd39  gcc/testsuite/g++.old-deja/g++.mike/p755.C
  865d8cdaab653563e5f8d54fe8cd99a3  gcc/testsuite/g++.old-deja/g++.mike/p755a.C
  3178d0b0d5cb858eeca888d735f5e861  gcc/testsuite/g++.old-deja/g++.mike/p7626.C
--- 24950,24956 ----
  f43a0dd80f368bc325088dcdf5b1f017  gcc/testsuite/g++.old-deja/g++.mike/p701.C
  e7b146af94ac9a8c09caf0f119938b97  gcc/testsuite/g++.old-deja/g++.mike/p710.C
  4f1b7fceb4b2604eeaa908c9d14306de  gcc/testsuite/g++.old-deja/g++.mike/p7180.C
! afcb13de882f46e5fc73a90a8651b383  gcc/testsuite/g++.old-deja/g++.mike/p7476.C
  8803cf6c10b127dce849e86a3a7fcd39  gcc/testsuite/g++.old-deja/g++.mike/p755.C
  865d8cdaab653563e5f8d54fe8cd99a3  gcc/testsuite/g++.old-deja/g++.mike/p755a.C
  3178d0b0d5cb858eeca888d735f5e861  gcc/testsuite/g++.old-deja/g++.mike/p7626.C
*************** b1814dd4aff2ecf1ced5ab368a1cda10  gcc/te
*** 23514,23520 ****
  5168f29e770030372bd7efbf82620cc6  gcc/testsuite/g++.old-deja/g++.mike/p7912.C
  ea6f77e23475c14b010ae9424b10cf2c  gcc/testsuite/g++.old-deja/g++.mike/p8009.C
  0e89d49104a6c56e8123ffbaf84463ad  gcc/testsuite/g++.old-deja/g++.mike/p8018.C
! 8472419124354902b61c57d6a82f2ee7  gcc/testsuite/g++.old-deja/g++.mike/p8039.C
  45afff2caee269dcedbefd9be511cc46  gcc/testsuite/g++.old-deja/g++.mike/p807.C
  7d7a4a9dca8893c67590fc6203f02948  gcc/testsuite/g++.old-deja/g++.mike/p807a.C
  78496e7d2dcb63754427b878521b8dfe  gcc/testsuite/g++.old-deja/g++.mike/p811.C
--- 24968,24974 ----
  5168f29e770030372bd7efbf82620cc6  gcc/testsuite/g++.old-deja/g++.mike/p7912.C
  ea6f77e23475c14b010ae9424b10cf2c  gcc/testsuite/g++.old-deja/g++.mike/p8009.C
  0e89d49104a6c56e8123ffbaf84463ad  gcc/testsuite/g++.old-deja/g++.mike/p8018.C
! 9652714c748d854dfe7bfb32c4f790f1  gcc/testsuite/g++.old-deja/g++.mike/p8039.C
  45afff2caee269dcedbefd9be511cc46  gcc/testsuite/g++.old-deja/g++.mike/p807.C
  7d7a4a9dca8893c67590fc6203f02948  gcc/testsuite/g++.old-deja/g++.mike/p807a.C
  78496e7d2dcb63754427b878521b8dfe  gcc/testsuite/g++.old-deja/g++.mike/p811.C
*************** c72a798543e6c81aadc0d950380daad4  gcc/te
*** 23531,23537 ****
  9de02e37337fabc87151db56c9f918a8  gcc/testsuite/g++.old-deja/g++.mike/p9068.C
  f91ed64334b058e6d71346ddb0fd2b21  gcc/testsuite/g++.old-deja/g++.mike/p9129.C
  597cdf446ddcb87d616b76140812c601  gcc/testsuite/g++.old-deja/g++.mike/p9206.C
! ffcaf5353c10d9ae2055efaf08adbee1  gcc/testsuite/g++.old-deja/g++.mike/p9506.C
  477e5601067b35a4b0eb32aa141b908c  gcc/testsuite/g++.old-deja/g++.mike/p9706.C
  a0952ba86801c96af79b501d48bc6bba  gcc/testsuite/g++.old-deja/g++.mike/p9732a.C
  2fde43f9124d8f51d94916f78ae76d1a  gcc/testsuite/g++.old-deja/g++.mike/p9732b.C
--- 24985,24991 ----
  9de02e37337fabc87151db56c9f918a8  gcc/testsuite/g++.old-deja/g++.mike/p9068.C
  f91ed64334b058e6d71346ddb0fd2b21  gcc/testsuite/g++.old-deja/g++.mike/p9129.C
  597cdf446ddcb87d616b76140812c601  gcc/testsuite/g++.old-deja/g++.mike/p9206.C
! 2115f5454cb4bb8648c598ba29092659  gcc/testsuite/g++.old-deja/g++.mike/p9506.C
  477e5601067b35a4b0eb32aa141b908c  gcc/testsuite/g++.old-deja/g++.mike/p9706.C
  a0952ba86801c96af79b501d48bc6bba  gcc/testsuite/g++.old-deja/g++.mike/p9732a.C
  2fde43f9124d8f51d94916f78ae76d1a  gcc/testsuite/g++.old-deja/g++.mike/p9732b.C
*************** b602c376ec5ff3d1db7c5a438588de18  gcc/te
*** 23579,23585 ****
  2563256f0551307948cae5bc60102644  gcc/testsuite/g++.old-deja/g++.mike/warn3.C
  c2be7b4febf6a7cd916d3d2cb0f6b56e  gcc/testsuite/g++.old-deja/g++.mike/warn4.C
  05f6513c8595acb8a649e11460843f09  gcc/testsuite/g++.old-deja/g++.mike/warn5.C
! 16346793065565bb593c169af2965c42  gcc/testsuite/g++.old-deja/g++.mike/warn6.C
  c0cce74869cd1549b71d008abc96ecaa  gcc/testsuite/g++.old-deja/g++.mike/warn7.C
  676d0d9db79e163408df1584e178d536  gcc/testsuite/g++.old-deja/g++.mike/warn8.C
  71bab86fd350d355fdaf31d1af688e41  gcc/testsuite/g++.old-deja/g++.niklas/README
--- 25033,25039 ----
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! 6f506463c6048469ba13354a0f241570  gcc/testsuite/g++.old-deja/g++.mike/warn6.C
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  71bab86fd350d355fdaf31d1af688e41  gcc/testsuite/g++.old-deja/g++.niklas/README
*************** d6a54aa05f31a2ecbd2f5231ccf13787  gcc/te
*** 23596,23602 ****
  32ef3d2daa861741f36627abea74253c  gcc/testsuite/g++.old-deja/g++.niklas/t125.C
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--- 25050,25056 ----
  32ef3d2daa861741f36627abea74253c  gcc/testsuite/g++.old-deja/g++.niklas/t125.C
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  e06d77af0ab382304fa4d3092aca707d  gcc/testsuite/g++.old-deja/g++.niklas/t131.C
*************** ff668e97c862ec9d9872e11a1ca7e91f  gcc/te
*** 23620,23626 ****
  1576f73d488f01626d95cc2b893b6fda  gcc/testsuite/g++.old-deja/g++.ns/bogus1.C
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! 09eaee0c15c01d4ecc5f7f840db179fd  gcc/testsuite/g++.old-deja/g++.ns/crash3.C
  e62c91a9ce451cfbd36af63f733470b6  gcc/testsuite/g++.old-deja/g++.ns/crash4.C
  e7ae6c01430fe184836d998bc4619af4  gcc/testsuite/g++.old-deja/g++.ns/extern1.C
  1ac4f8617c42fa9ac34245cdbdf20c7d  gcc/testsuite/g++.old-deja/g++.ns/friend1.C
--- 25074,25080 ----
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  3a95064d597c5a12f6a8fbcb78c86a9f  gcc/testsuite/g++.old-deja/g++.ns/crash2.C
! 50dda260af919caf4b52ad13576ac248  gcc/testsuite/g++.old-deja/g++.ns/crash3.C
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*************** d79eec58cdd08f618d30b9dbb15833d2  gcc/te
*** 23681,23687 ****
  a6d668c517d698af92324c4653d1daa3  gcc/testsuite/g++.old-deja/g++.ns/template4.C
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! 1c6ee0a1bb618267fbe665d645884e8e  gcc/testsuite/g++.old-deja/g++.ns/template7.C
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--- 25135,25141 ----
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*************** e3d968a14c4d5d023f855b46af29bb70  gcc/te
*** 23778,23784 ****
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! 1ac5ba19c1885e9be0e0ca6b9a4c52be  gcc/testsuite/g++.old-deja/g++.other/badarrow.C
  31c33cf79e513b19bb021aa4e593d7b3  gcc/testsuite/g++.old-deja/g++.other/badopt1.C
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  56c6d186238c4423a7d3d97bacd8cd42  gcc/testsuite/g++.old-deja/g++.other/bitfld1.C
--- 25232,25238 ----
  ba720d64a0cf99613a5d491c9d9a9315  gcc/testsuite/g++.old-deja/g++.other/asm1.C
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! 64e23932375fa6d1b7afadb3e4decc59  gcc/testsuite/g++.old-deja/g++.other/badarrow.C
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  56c6d186238c4423a7d3d97bacd8cd42  gcc/testsuite/g++.old-deja/g++.other/bitfld1.C
*************** dfc338f135a8279a02404bc9fe49be59  gcc/te
*** 23798,23805 ****
  29952296a7caacc2b945db5e0b5fe8c3  gcc/testsuite/g++.old-deja/g++.other/builtins9.C
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! 3edf5ed8769c2a52a2ea5cbefce749fc  gcc/testsuite/g++.old-deja/g++.other/cast2.C
! f1cef821ea3ed4921f67bfc6512231f6  gcc/testsuite/g++.old-deja/g++.other/cast3.C
  2b44765fa9d8a7b3098dacd72b224861  gcc/testsuite/g++.old-deja/g++.other/cast4.C
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--- 25252,25259 ----
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*************** e421748ca6191ef379db9252886457f1  gcc/te
*** 23817,23828 ****
  d9b19cd1292a38bce623a404c5c14601  gcc/testsuite/g++.old-deja/g++.other/comdat4-aux.cc
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! 0d8932725f07576d0bbd6e76c26ebc68  gcc/testsuite/g++.old-deja/g++.other/comdat5.C
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--- 25271,25282 ----
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  ac45c51548ac5c0e398a0afcf2e9042b  gcc/testsuite/g++.old-deja/g++.other/cond4.C
! 72c077597215fda90b2848ff3ccac9b7  gcc/testsuite/g++.old-deja/g++.other/cond5.C
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*************** ab2824fdbb485ee469dd6d9cb8f52b3a  gcc/te
*** 23886,23893 ****
  bf34c3dce3754aad3a0364358ced05bb  gcc/testsuite/g++.old-deja/g++.other/ctor1.C
  318c1c72b2da29f5b9e81e957fcbc16e  gcc/testsuite/g++.old-deja/g++.other/cvqual1.C
  3793b7ec7538ca22ef6e87810890ec6d  gcc/testsuite/g++.old-deja/g++.other/cvt1.C
! c747550f76f0c18401c345889e28d956  gcc/testsuite/g++.old-deja/g++.other/dcast1.C
! 76c9f4918ecd1c1a16e2d4a1cfd10a97  gcc/testsuite/g++.old-deja/g++.other/dcast2.C
  561238771ab14ea542b51d0fed719ca1  gcc/testsuite/g++.old-deja/g++.other/debug1.C
  ff25450bb13adebb57a287d4d4c6f1bc  gcc/testsuite/g++.old-deja/g++.other/debug2.C
  dcb71e937d0db05ef4cdd26c5e394656  gcc/testsuite/g++.old-deja/g++.other/debug3.C
--- 25340,25347 ----
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  318c1c72b2da29f5b9e81e957fcbc16e  gcc/testsuite/g++.old-deja/g++.other/cvqual1.C
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! c6937056402a4a941e34d8c42fe9b976  gcc/testsuite/g++.old-deja/g++.other/dcast2.C
  561238771ab14ea542b51d0fed719ca1  gcc/testsuite/g++.old-deja/g++.other/debug1.C
  ff25450bb13adebb57a287d4d4c6f1bc  gcc/testsuite/g++.old-deja/g++.other/debug2.C
  dcb71e937d0db05ef4cdd26c5e394656  gcc/testsuite/g++.old-deja/g++.other/debug3.C
*************** ce3c15e4b9c0fc4646ac8142395acc53  gcc/te
*** 23901,23911 ****
  589daf00ab11a288c7fe3c5d5b24404c  gcc/testsuite/g++.old-deja/g++.other/decl2.C
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  87f1ee2bbfeb5481b12d8c5030343b02  gcc/testsuite/g++.old-deja/g++.other/decl4.C
! 42c5bb3d0bc1719b3713b503e640b75c  gcc/testsuite/g++.old-deja/g++.other/decl5.C
  033a1c9932a565526b522af53e4e58b8  gcc/testsuite/g++.old-deja/g++.other/decl6.C
  b7922b62c66771d84dbb60a4b1b4545c  gcc/testsuite/g++.old-deja/g++.other/decl7.C
  b15c94d17715a47983f0e773d7e3e2c2  gcc/testsuite/g++.old-deja/g++.other/decl8.C
! e132f4eacd09364c6ba47417c0724608  gcc/testsuite/g++.old-deja/g++.other/decl9.C
  92af71277727e3a1f4146b458ce18b9f  gcc/testsuite/g++.old-deja/g++.other/defarg1.C
  e9dc61c83b948a4d158bfdb94b298963  gcc/testsuite/g++.old-deja/g++.other/defarg2.C
  66bed1c478469224297df66607f38744  gcc/testsuite/g++.old-deja/g++.other/defarg3.C
--- 25355,25365 ----
  589daf00ab11a288c7fe3c5d5b24404c  gcc/testsuite/g++.old-deja/g++.other/decl2.C
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  87f1ee2bbfeb5481b12d8c5030343b02  gcc/testsuite/g++.old-deja/g++.other/decl4.C
! 3ccfd73bbc4074f9cb1cf40feeda16de  gcc/testsuite/g++.old-deja/g++.other/decl5.C
  033a1c9932a565526b522af53e4e58b8  gcc/testsuite/g++.old-deja/g++.other/decl6.C
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  b15c94d17715a47983f0e773d7e3e2c2  gcc/testsuite/g++.old-deja/g++.other/decl8.C
! d548942e12e6c46fb92c5ead8f1fb7a7  gcc/testsuite/g++.old-deja/g++.other/decl9.C
  92af71277727e3a1f4146b458ce18b9f  gcc/testsuite/g++.old-deja/g++.other/defarg1.C
  e9dc61c83b948a4d158bfdb94b298963  gcc/testsuite/g++.old-deja/g++.other/defarg2.C
  66bed1c478469224297df66607f38744  gcc/testsuite/g++.old-deja/g++.other/defarg3.C
*************** f2e3e23b1fda185e1f462c9e3bf913e6  gcc/te
*** 23923,23929 ****
  002b9210ec0b57b8244b0909a259b25f  gcc/testsuite/g++.old-deja/g++.other/delete6.C
  db00ad7b8cb4aebea3e6520ea992edfe  gcc/testsuite/g++.old-deja/g++.other/delete7.C
  84bdff781f1a6fd221ea3dfef103b8d4  gcc/testsuite/g++.old-deja/g++.other/delete8.C
! 382473fc6c53960e79489c1e820820b1  gcc/testsuite/g++.old-deja/g++.other/deref1.C
  a9067192357860945ae88185ed54ec2c  gcc/testsuite/g++.old-deja/g++.other/dll-1.C
  d967c7f394d25e627016c2e15ede2890  gcc/testsuite/g++.old-deja/g++.other/dll-2.C
  8b98f2004a966104a390f6cc5bf87729  gcc/testsuite/g++.old-deja/g++.other/dll-3.C
--- 25377,25383 ----
  002b9210ec0b57b8244b0909a259b25f  gcc/testsuite/g++.old-deja/g++.other/delete6.C
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  84bdff781f1a6fd221ea3dfef103b8d4  gcc/testsuite/g++.old-deja/g++.other/delete8.C
! 253dbe9e0bf5dc174a8b76ce5a433857  gcc/testsuite/g++.old-deja/g++.other/deref1.C
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  d967c7f394d25e627016c2e15ede2890  gcc/testsuite/g++.old-deja/g++.other/dll-2.C
  8b98f2004a966104a390f6cc5bf87729  gcc/testsuite/g++.old-deja/g++.other/dll-3.C
*************** d967c7f394d25e627016c2e15ede2890  gcc/te
*** 23936,23942 ****
  49cceaef10e394102fa51c269f289f67  gcc/testsuite/g++.old-deja/g++.other/dtor12.C
  a38327344ea63a8b5d5757b2bd02efc1  gcc/testsuite/g++.old-deja/g++.other/dtor13.C
  573c74f438072a08f4c7e076c4fde80a  gcc/testsuite/g++.old-deja/g++.other/dtor2.C
! 8f3f1d766e7a640091d25ad94a1ffdb5  gcc/testsuite/g++.old-deja/g++.other/dtor3.C
  5b701b32aa6c93b544305a0d0413c164  gcc/testsuite/g++.old-deja/g++.other/dtor4.C
  95142dab2cdf06c9a812ece53a941442  gcc/testsuite/g++.old-deja/g++.other/dtor5.C
  bec7fc1b3e53b667bbfb02f3caa7a751  gcc/testsuite/g++.old-deja/g++.other/dtor6.C
--- 25390,25396 ----
  49cceaef10e394102fa51c269f289f67  gcc/testsuite/g++.old-deja/g++.other/dtor12.C
  a38327344ea63a8b5d5757b2bd02efc1  gcc/testsuite/g++.old-deja/g++.other/dtor13.C
  573c74f438072a08f4c7e076c4fde80a  gcc/testsuite/g++.old-deja/g++.other/dtor2.C
! 0a32e8b6fd4e3cb0cc32133f790ff2ef  gcc/testsuite/g++.old-deja/g++.other/dtor3.C
  5b701b32aa6c93b544305a0d0413c164  gcc/testsuite/g++.old-deja/g++.other/dtor4.C
  95142dab2cdf06c9a812ece53a941442  gcc/testsuite/g++.old-deja/g++.other/dtor5.C
  bec7fc1b3e53b667bbfb02f3caa7a751  gcc/testsuite/g++.old-deja/g++.other/dtor6.C
*************** b822d2c88362af7f0d14e2ef2c0e5a40  gcc/te
*** 24049,24055 ****
  8f5f0bc1ea8aec63ad7e64ec0fb5a60d  gcc/testsuite/g++.old-deja/g++.other/linkage5.C
  031860326d5d4c1b03d2fa8b5333dc2b  gcc/testsuite/g++.old-deja/g++.other/linkage6.C
  9f0e982ef3a2802a121297c93371f22b  gcc/testsuite/g++.old-deja/g++.other/linkage7.C
! 94756f9efff4d23039dfbc70e2ea8e0a  gcc/testsuite/g++.old-deja/g++.other/local-alloc1.C
  f02d7bee1a6e33dff41829b90a2f55e5  gcc/testsuite/g++.old-deja/g++.other/local1.C
  b0c55f20739e7cf716fcd5af1b14be8b  gcc/testsuite/g++.old-deja/g++.other/local2.C
  d66fe3a8dd3fe648291bfe2f4d9cff5d  gcc/testsuite/g++.old-deja/g++.other/local3.C
--- 25503,25509 ----
  8f5f0bc1ea8aec63ad7e64ec0fb5a60d  gcc/testsuite/g++.old-deja/g++.other/linkage5.C
  031860326d5d4c1b03d2fa8b5333dc2b  gcc/testsuite/g++.old-deja/g++.other/linkage6.C
  9f0e982ef3a2802a121297c93371f22b  gcc/testsuite/g++.old-deja/g++.other/linkage7.C
! 08b0493ebead2aa74f709950c2bff1ea  gcc/testsuite/g++.old-deja/g++.other/local-alloc1.C
  f02d7bee1a6e33dff41829b90a2f55e5  gcc/testsuite/g++.old-deja/g++.other/local1.C
  b0c55f20739e7cf716fcd5af1b14be8b  gcc/testsuite/g++.old-deja/g++.other/local2.C
  d66fe3a8dd3fe648291bfe2f4d9cff5d  gcc/testsuite/g++.old-deja/g++.other/local3.C
*************** b76250225ce6553674e4a57a86b2db26  gcc/te
*** 24108,24114 ****
  afe64db314f3527a076f4d80697b77ce  gcc/testsuite/g++.old-deja/g++.other/overcnv2.C
  ed134b735a26a8d28537d1024870f261  gcc/testsuite/g++.old-deja/g++.other/overload1.C
  05e31669787864f1c11b882a62ef8b59  gcc/testsuite/g++.old-deja/g++.other/overload10.C
! 2469b4e0030614035f0fb97ff378a7f2  gcc/testsuite/g++.old-deja/g++.other/overload11.C
  4ce08bd991a3d17e3a64a27b989b2bdb  gcc/testsuite/g++.old-deja/g++.other/overload12.C
  52b8dcde24c324a2d8dc19ecd0d0eb40  gcc/testsuite/g++.old-deja/g++.other/overload13.C
  1814ba09dcbbc9987c90048e924acf14  gcc/testsuite/g++.old-deja/g++.other/overload14.C
--- 25562,25568 ----
  afe64db314f3527a076f4d80697b77ce  gcc/testsuite/g++.old-deja/g++.other/overcnv2.C
  ed134b735a26a8d28537d1024870f261  gcc/testsuite/g++.old-deja/g++.other/overload1.C
  05e31669787864f1c11b882a62ef8b59  gcc/testsuite/g++.old-deja/g++.other/overload10.C
! b1ddb4a7184a06404a214bce41835a5e  gcc/testsuite/g++.old-deja/g++.other/overload11.C
  4ce08bd991a3d17e3a64a27b989b2bdb  gcc/testsuite/g++.old-deja/g++.other/overload12.C
  52b8dcde24c324a2d8dc19ecd0d0eb40  gcc/testsuite/g++.old-deja/g++.other/overload13.C
  1814ba09dcbbc9987c90048e924acf14  gcc/testsuite/g++.old-deja/g++.other/overload14.C
*************** a2272ed46f0dfbf3a43486c9c3083da5  gcc/te
*** 24131,24137 ****
  9a3b6813081867a1df6cba19658db429  gcc/testsuite/g++.old-deja/g++.other/pmf4.C
  d2bcb17f853c43ef64a4867c0150e323  gcc/testsuite/g++.old-deja/g++.other/pmf5.C
  b31a25b82d28a89a3180f169923be884  gcc/testsuite/g++.old-deja/g++.other/pmf6.C
! e8c1b04efac1c3d4b2dc87bc880171ed  gcc/testsuite/g++.old-deja/g++.other/pmf7.C
  b8cb1438215d0abddbda0e8e4d70f10d  gcc/testsuite/g++.old-deja/g++.other/pod1.C
  ceecfe2bb2ab30a7f08b690dee78b96a  gcc/testsuite/g++.old-deja/g++.other/printf1.C
  f75732a46d8496aac3e6fbd99609c316  gcc/testsuite/g++.old-deja/g++.other/ptrmem1.C
--- 25585,25591 ----
  9a3b6813081867a1df6cba19658db429  gcc/testsuite/g++.old-deja/g++.other/pmf4.C
  d2bcb17f853c43ef64a4867c0150e323  gcc/testsuite/g++.old-deja/g++.other/pmf5.C
  b31a25b82d28a89a3180f169923be884  gcc/testsuite/g++.old-deja/g++.other/pmf6.C
! 025cca4514f13c0aefac40093a02ad37  gcc/testsuite/g++.old-deja/g++.other/pmf7.C
  b8cb1438215d0abddbda0e8e4d70f10d  gcc/testsuite/g++.old-deja/g++.other/pod1.C
  ceecfe2bb2ab30a7f08b690dee78b96a  gcc/testsuite/g++.old-deja/g++.other/printf1.C
  f75732a46d8496aac3e6fbd99609c316  gcc/testsuite/g++.old-deja/g++.other/ptrmem1.C
*************** e3f652dc9cfb0d8f1306ed706fdc31ce  gcc/te
*** 24141,24147 ****
  bb327e881454a6a26fa54655b2093d87  gcc/testsuite/g++.old-deja/g++.other/ptrmem4.C
  4bbafe05a45a25868b17dce17c662a22  gcc/testsuite/g++.old-deja/g++.other/ptrmem5.C
  d39d6de8da2a8229f976153f5c63cb57  gcc/testsuite/g++.old-deja/g++.other/ptrmem6.C
! cf9e5972622ceee830b1b633b7b678a1  gcc/testsuite/g++.old-deja/g++.other/ptrmem7.C
  009011b9cd19b98128e3af55e810f0df  gcc/testsuite/g++.old-deja/g++.other/ptrmem8.C
  11aead89d7c9ba7d1d714df900e9e821  gcc/testsuite/g++.old-deja/g++.other/ptrmem9.C
  9a413d6cc2fc61c326d8be31a011267d  gcc/testsuite/g++.old-deja/g++.other/qual1.C
--- 25595,25601 ----
  bb327e881454a6a26fa54655b2093d87  gcc/testsuite/g++.old-deja/g++.other/ptrmem4.C
  4bbafe05a45a25868b17dce17c662a22  gcc/testsuite/g++.old-deja/g++.other/ptrmem5.C
  d39d6de8da2a8229f976153f5c63cb57  gcc/testsuite/g++.old-deja/g++.other/ptrmem6.C
! 427ee772f88f584b903e33db26e4d01e  gcc/testsuite/g++.old-deja/g++.other/ptrmem7.C
  009011b9cd19b98128e3af55e810f0df  gcc/testsuite/g++.old-deja/g++.other/ptrmem8.C
  11aead89d7c9ba7d1d714df900e9e821  gcc/testsuite/g++.old-deja/g++.other/ptrmem9.C
  9a413d6cc2fc61c326d8be31a011267d  gcc/testsuite/g++.old-deja/g++.other/qual1.C
*************** df2e977a7fb4fb0bc14455136a875f07  gcc/te
*** 24177,24183 ****
  a84ac2bbca6e4a347ff10c74435b64dc  gcc/testsuite/g++.old-deja/g++.other/sizeof1.C
  b31eda0e2e2b2a4d007a778a5211d562  gcc/testsuite/g++.old-deja/g++.other/sizeof2.C
  4fc019ae48048136a589dc3fc21ec8b9  gcc/testsuite/g++.old-deja/g++.other/sizeof3.C
! add3c3df9921a070d253f354f2ab7805  gcc/testsuite/g++.old-deja/g++.other/sizeof4.C
  4ca4b75456ba54e283ab183ea72ddd89  gcc/testsuite/g++.old-deja/g++.other/sizeof5.C
  94bc9e6417859abe314b0eb330f97196  gcc/testsuite/g++.old-deja/g++.other/static1.C
  8a674bc4fae54c6f2e6187118ffc8d1f  gcc/testsuite/g++.old-deja/g++.other/static10.C
--- 25631,25637 ----
  a84ac2bbca6e4a347ff10c74435b64dc  gcc/testsuite/g++.old-deja/g++.other/sizeof1.C
  b31eda0e2e2b2a4d007a778a5211d562  gcc/testsuite/g++.old-deja/g++.other/sizeof2.C
  4fc019ae48048136a589dc3fc21ec8b9  gcc/testsuite/g++.old-deja/g++.other/sizeof3.C
! 187ef30f480d412a6384fadc3e976fba  gcc/testsuite/g++.old-deja/g++.other/sizeof4.C
  4ca4b75456ba54e283ab183ea72ddd89  gcc/testsuite/g++.old-deja/g++.other/sizeof5.C
  94bc9e6417859abe314b0eb330f97196  gcc/testsuite/g++.old-deja/g++.other/static1.C
  8a674bc4fae54c6f2e6187118ffc8d1f  gcc/testsuite/g++.old-deja/g++.other/static10.C
*************** b9957a14eef8c9cfa198dafcb46f2a11  gcc/te
*** 24237,24243 ****
  fd1a1050ed74f9d20e346be428209ebf  gcc/testsuite/g++.old-deja/g++.other/using6.C
  555cd6e25e52a5dcd11e63480967cc2e  gcc/testsuite/g++.old-deja/g++.other/using7.C
  dcadc285f1b7a525ad8b9352919eae27  gcc/testsuite/g++.old-deja/g++.other/using8.C
! fde8fa0fc20a3eb83053dd60a55ba33e  gcc/testsuite/g++.old-deja/g++.other/using9.C
  12a6c106f340c7482ff5acff5c3ba0c7  gcc/testsuite/g++.old-deja/g++.other/vaarg1.C
  8c21b5e35109125a2fe0210c85ae1bc6  gcc/testsuite/g++.old-deja/g++.other/vaarg2.C
  a3dd695e73bd5b5ef6d24c2cd673ba81  gcc/testsuite/g++.old-deja/g++.other/vaarg3.C
--- 25691,25697 ----
  fd1a1050ed74f9d20e346be428209ebf  gcc/testsuite/g++.old-deja/g++.other/using6.C
  555cd6e25e52a5dcd11e63480967cc2e  gcc/testsuite/g++.old-deja/g++.other/using7.C
  dcadc285f1b7a525ad8b9352919eae27  gcc/testsuite/g++.old-deja/g++.other/using8.C
! 45222dbf22edc79b6e224698b3663f0a  gcc/testsuite/g++.old-deja/g++.other/using9.C
  12a6c106f340c7482ff5acff5c3ba0c7  gcc/testsuite/g++.old-deja/g++.other/vaarg1.C
  8c21b5e35109125a2fe0210c85ae1bc6  gcc/testsuite/g++.old-deja/g++.other/vaarg2.C
  a3dd695e73bd5b5ef6d24c2cd673ba81  gcc/testsuite/g++.old-deja/g++.other/vaarg3.C
*************** f183acc74794fda2e8a0f2e69d95b26c  gcc/te
*** 24257,24263 ****
  6c07ee47e97d6ed4c53954ac388d1f85  gcc/testsuite/g++.old-deja/g++.other/virtual7.C
  28eb577ae2eb298d335601c4cb3648be  gcc/testsuite/g++.old-deja/g++.other/virtual8.C
  cca0c5a42a9d8567da46895f512d7620  gcc/testsuite/g++.old-deja/g++.other/virtual9.C
! 66ef488664fc6d57fc0c5b54ca6e6de2  gcc/testsuite/g++.old-deja/g++.other/volatile1.C
  d53c4432baa20a0f63dd7f479d478d65  gcc/testsuite/g++.old-deja/g++.other/vtbl1.C
  eb95e5130876ef3196237bb42ac3c02a  gcc/testsuite/g++.old-deja/g++.other/vtbl2.C
  92af271225d9aaa11fbb66029eb292ac  gcc/testsuite/g++.old-deja/g++.other/warn01.C
--- 25711,25717 ----
  6c07ee47e97d6ed4c53954ac388d1f85  gcc/testsuite/g++.old-deja/g++.other/virtual7.C
  28eb577ae2eb298d335601c4cb3648be  gcc/testsuite/g++.old-deja/g++.other/virtual8.C
  cca0c5a42a9d8567da46895f512d7620  gcc/testsuite/g++.old-deja/g++.other/virtual9.C
! 2105cf605979579cc52ea84d62e47edd  gcc/testsuite/g++.old-deja/g++.other/volatile1.C
  d53c4432baa20a0f63dd7f479d478d65  gcc/testsuite/g++.old-deja/g++.other/vtbl1.C
  eb95e5130876ef3196237bb42ac3c02a  gcc/testsuite/g++.old-deja/g++.other/vtbl2.C
  92af271225d9aaa11fbb66029eb292ac  gcc/testsuite/g++.old-deja/g++.other/warn01.C
*************** d54d7f76b19f79dd290e5553a5679f48  gcc/te
*** 24276,24282 ****
  0bf7b9320971f79173514bee96bfc707  gcc/testsuite/g++.old-deja/g++.pt/array7.C
  20f25304c5f86830f4bad8aaef0823cd  gcc/testsuite/g++.old-deja/g++.pt/asm1.C
  a50c1e209893f43959322c9e8e755aef  gcc/testsuite/g++.old-deja/g++.pt/asm2.C
! 5e367a6d46451726ae5272df625f03c8  gcc/testsuite/g++.old-deja/g++.pt/assign1.C
  fe0b4707d1883e16eaabb48968262766  gcc/testsuite/g++.old-deja/g++.pt/auto_ptr.C
  1adb535176b9d881aafd1bb9dc833b29  gcc/testsuite/g++.old-deja/g++.pt/bad-type.C
  f2dc0c4f766e43328cdd36ba323cdfa6  gcc/testsuite/g++.old-deja/g++.pt/builtin.C
--- 25730,25736 ----
  0bf7b9320971f79173514bee96bfc707  gcc/testsuite/g++.old-deja/g++.pt/array7.C
  20f25304c5f86830f4bad8aaef0823cd  gcc/testsuite/g++.old-deja/g++.pt/asm1.C
  a50c1e209893f43959322c9e8e755aef  gcc/testsuite/g++.old-deja/g++.pt/asm2.C
! 87e9f8e57936f6cbdca67a684c928f62  gcc/testsuite/g++.old-deja/g++.pt/assign1.C
  fe0b4707d1883e16eaabb48968262766  gcc/testsuite/g++.old-deja/g++.pt/auto_ptr.C
  1adb535176b9d881aafd1bb9dc833b29  gcc/testsuite/g++.old-deja/g++.pt/bad-type.C
  f2dc0c4f766e43328cdd36ba323cdfa6  gcc/testsuite/g++.old-deja/g++.pt/builtin.C
*************** b8a43da58e14e7b6fd2c0512bd16c158  gcc/te
*** 24324,24330 ****
  55b1abdb1a2e1df7825e673f1b1ac0d6  gcc/testsuite/g++.old-deja/g++.pt/crash35.C
  cf9f23e3db0127ae7173829730e702a5  gcc/testsuite/g++.old-deja/g++.pt/crash36.C
  9d42fed92afdbda595ff8b94f6cbea98  gcc/testsuite/g++.old-deja/g++.pt/crash37.C
! c0dbb36d9aecd2f24386d209a91d9361  gcc/testsuite/g++.old-deja/g++.pt/crash38.C
  5aa83f41d9dd76aac5bd62155f035575  gcc/testsuite/g++.old-deja/g++.pt/crash39.C
  afe8ec8e9a353fb58c292fe0888627c5  gcc/testsuite/g++.old-deja/g++.pt/crash4.C
  536d144e5eab0baecffc0286597ddea1  gcc/testsuite/g++.old-deja/g++.pt/crash40.C
--- 25778,25784 ----
  55b1abdb1a2e1df7825e673f1b1ac0d6  gcc/testsuite/g++.old-deja/g++.pt/crash35.C
  cf9f23e3db0127ae7173829730e702a5  gcc/testsuite/g++.old-deja/g++.pt/crash36.C
  9d42fed92afdbda595ff8b94f6cbea98  gcc/testsuite/g++.old-deja/g++.pt/crash37.C
! 69a1bbdea9f094660c849526032cb83d  gcc/testsuite/g++.old-deja/g++.pt/crash38.C
  5aa83f41d9dd76aac5bd62155f035575  gcc/testsuite/g++.old-deja/g++.pt/crash39.C
  afe8ec8e9a353fb58c292fe0888627c5  gcc/testsuite/g++.old-deja/g++.pt/crash4.C
  536d144e5eab0baecffc0286597ddea1  gcc/testsuite/g++.old-deja/g++.pt/crash40.C
*************** c123d0b9a12303c4b06fb3047614c601  gcc/te
*** 24359,24365 ****
  f22cf44c7dbbb47eb64c9173b3afe6c9  gcc/testsuite/g++.old-deja/g++.pt/crash67.C
  3854df7d687f6b27c1a8728b646f4944  gcc/testsuite/g++.old-deja/g++.pt/crash68.C
  21e63e2b294b7398e7c7f5acd5839428  gcc/testsuite/g++.old-deja/g++.pt/crash7.C
! 57c5d3a84b07c37790b3197eb54fd5f4  gcc/testsuite/g++.old-deja/g++.pt/crash8.C
  bacabf0a4a53038418059a8709d926f4  gcc/testsuite/g++.old-deja/g++.pt/crash9.C
  175bbaa432316cf80ec13fb36b444aff  gcc/testsuite/g++.old-deja/g++.pt/ctor1.C
  a6b4e27547baeda5f7f6c29ad2d456d5  gcc/testsuite/g++.old-deja/g++.pt/ctor2.C
--- 25813,25819 ----
  f22cf44c7dbbb47eb64c9173b3afe6c9  gcc/testsuite/g++.old-deja/g++.pt/crash67.C
  3854df7d687f6b27c1a8728b646f4944  gcc/testsuite/g++.old-deja/g++.pt/crash68.C
  21e63e2b294b7398e7c7f5acd5839428  gcc/testsuite/g++.old-deja/g++.pt/crash7.C
! f32b9eb07f1cae3cb7c21796d41732d3  gcc/testsuite/g++.old-deja/g++.pt/crash8.C
  bacabf0a4a53038418059a8709d926f4  gcc/testsuite/g++.old-deja/g++.pt/crash9.C
  175bbaa432316cf80ec13fb36b444aff  gcc/testsuite/g++.old-deja/g++.pt/ctor1.C
  a6b4e27547baeda5f7f6c29ad2d456d5  gcc/testsuite/g++.old-deja/g++.pt/ctor2.C
*************** e7ee5bb602fee5b34b1fc6b20d8d756c  gcc/te
*** 24563,24573 ****
  d7cca84493aad98aec660bbff1f5b1c5  gcc/testsuite/g++.old-deja/g++.pt/instantiate13.C
  7aec59bb622f42c16476e3d897fb0cb4  gcc/testsuite/g++.old-deja/g++.pt/instantiate2.C
  d312822e3a0567debe161e80a9852c67  gcc/testsuite/g++.old-deja/g++.pt/instantiate3.C
- 825ee583aa674bf21134ae75d138f879  gcc/testsuite/g++.old-deja/g++.pt/instantiate4.C
  b72705507b458d57e4782a54d6d2ee76  gcc/testsuite/g++.old-deja/g++.pt/instantiate5-main.cc
  d9a0eaaa98a929b13cc2a5f883260640  gcc/testsuite/g++.old-deja/g++.pt/instantiate5.C
  4b60596da1a9f558f49d041b04457130  gcc/testsuite/g++.old-deja/g++.pt/instantiate5.cc
- 818d0132cf2f719daaa55cca74152f2b  gcc/testsuite/g++.old-deja/g++.pt/instantiate6.C
  d98d69ee99fb3f74d27827ff24fb8b3c  gcc/testsuite/g++.old-deja/g++.pt/instantiate7.C
  b760cfdba7c16665da061ab5cab1fa55  gcc/testsuite/g++.old-deja/g++.pt/instantiate8.C
  9b52836d0b5cc24477740b8ffda0b8b4  gcc/testsuite/g++.old-deja/g++.pt/instantiate9.C
--- 26017,26025 ----
*************** aad5f3bdb50f6977327b5b218d32526b  gcc/te
*** 24677,24683 ****
  ce141482239d76ab62a6ad4a98a68807  gcc/testsuite/g++.old-deja/g++.pt/memtemp61.C
  b4da1e4647d3a394d7b6d4aea652680d  gcc/testsuite/g++.old-deja/g++.pt/memtemp62.C
  4703ed2bafd93bd240f15e50f461e2f2  gcc/testsuite/g++.old-deja/g++.pt/memtemp63.C
! 38d96a224830c7705b0dffc6e34755ab  gcc/testsuite/g++.old-deja/g++.pt/memtemp64.C
  f4f0157f17dc22f1dd440e652a01fc84  gcc/testsuite/g++.old-deja/g++.pt/memtemp65.C
  ce3df9ae4b9b6b8f504826c9542e10c8  gcc/testsuite/g++.old-deja/g++.pt/memtemp66.C
  0a74c4c76b6fcd8398559155d15ee562  gcc/testsuite/g++.old-deja/g++.pt/memtemp67.C
--- 26129,26135 ----
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*************** ce3df9ae4b9b6b8f504826c9542e10c8  gcc/te
*** 24685,24691 ****
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--- 26137,26143 ----
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*************** e52e6177e655a4986751dbd9747d4dc7  gcc/te
*** 24770,24785 ****
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*************** fa0318448a07e1f2736619aa01d8732d  gcc/te
*** 24798,24805 ****
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--- 26246,26253 ----
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*************** e2acae1babefa4ee3bb8f9db59ab76e3  gcc/te
*** 24814,24820 ****
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--- 26262,26268 ----
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*************** dfc0324b20d7c26de08a9be2bd7d3c72  gcc/te
*** 25006,25018 ****
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--- 26454,26466 ----
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*************** e1cc4c0a26466bcb288ed01f4b1e02c6  gcc/te
*** 25056,25062 ****
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--- 26504,26510 ----
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*************** f0d75f94742cf514d429d51c4d4df58c  gcc/te
*** 25149,25173 ****
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--- 26597,26717 ----
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*************** a4d5da9937e99905b3690c88b7431aa7  gcc/te
*** 25176,25182 ****
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! 7fcf1f19e5e8bdbf6275855b496229d7  gcc/testsuite/g++.target/i386/i386.exp
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--- 26720,26727 ----
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  d9283642c1e353810c049d439e8f3c60  gcc/testsuite/g++.target/i386/mv1.C
*************** d7d81744846ecefe8f7677db1eb870be  gcc/te
*** 25188,25194 ****
  7bd56e010086961d6b148fa238972ab3  gcc/testsuite/g++.target/i386/mv13.C
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--- 26733,26739 ----
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*************** e42b1e4bae5852d02674a9f5a44931b3  gcc/te
*** 25232,25246 ****
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--- 26777,26813 ----
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*** 25254,25260 ****
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*** 25263,25269 ****
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*** 25281,25287 ****
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*** 25289,25295 ****
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*** 25307,25316 ****
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*** 25358,25364 ****
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*** 25370,25379 ****
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*** 25383,25393 ****
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*** 25396,25413 ****
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*** 25419,25425 ****
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*** 25429,25435 ****
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*** 25471,25497 ****
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*** 25501,25507 ****
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*** 25519,25525 ****
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*** 25529,25541 ****
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*** 25544,25550 ****
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*************** a65ce16daad930d2b2cb353a1b698c99  gcc/te
*** 25556,25571 ****
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*************** cd696bb4502a71449edff79a3a650cae  gcc/te
*** 25576,25591 ****
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*** 25621,25627 ****
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*** 25634,25645 ****
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*************** a85165b60bc911474dbe2a530c244ba9  gcc/te
*** 25662,25668 ****
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*** 25680,25686 ****
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*** 25689,25696 ****
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*** 25701,25712 ****
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*** 25718,25724 ****
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*************** eecf565315f5f6b7f87919ef37893a50  gcc/te
*** 25727,25733 ****
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*************** b9e847994b53ca110e153b3b0b77a857  gcc/te
*** 25740,25748 ****
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*************** fbb0365bd4a5e1e85b901d387d74d038  gcc/te
*** 25757,25763 ****
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*************** d5a819c893100ddb0e855fc74d121532  gcc/te
*** 25766,25772 ****
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*** 25788,25794 ****
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*** 25806,25812 ****
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*************** cd593020877c1cde7bee6ad609be12b7  gcc/te
*** 25815,25821 ****
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*** 25825,25831 ****
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*** 25842,25857 ****
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*************** e6cd8327a8ed37632a8a76b6118780ac  gcc/te
*** 25881,25887 ****
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*** 25895,25901 ****
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*** 25906,25912 ****
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*** 25924,25930 ****
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*** 25938,25949 ****
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*** 25957,25963 ****
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*** 25981,25998 ****
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*** 26028,26040 ****
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*************** cb3f23e30b535b53eb30442aaf9f9dd3  gcc/te
*** 26050,26058 ****
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*************** f5766202f628b43d0fac0910adc0eecb  gcc/te
*** 26064,26070 ****
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*************** c8d8d475a18f3a30cab11183f511b25a  gcc/te
*** 26074,26080 ****
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*************** a05c2eeb9dff059cccaf65b45b2cd66c  gcc/te
*** 26109,26114 ****
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*************** afe4aef5d3378c3de0bf57047eb44e18  gcc/te
*** 26157,26163 ****
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*************** b67dbf324c18ccf7e0862dfdbc50d578  gcc/te
*** 26166,26172 ****
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*** 26219,26230 ****
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*** 26273,26279 ****
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*** 26286,26292 ****
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*** 26294,26301 ****
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*** 26346,26357 ****
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*** 26372,26390 ****
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--- 27950,27967 ----
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*************** bfed8319cb606c75dc2da21298bf81ad  gcc/te
*** 26399,26405 ****
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--- 27976,27982 ----
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*************** d97af45824c2d7b84dee31b1899848bf  gcc/te
*** 26415,26427 ****
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*************** eaf8056eb8e9f2c09750d1950b336f96  gcc/te
*** 26430,26445 ****
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--- 28007,28022 ----
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*************** fc0805e512f7c2f452630be53a59aa58  gcc/te
*** 26486,26502 ****
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--- 28063,28079 ----
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*************** a70c7b11edd708f7a16d3d6ee67f7d02  gcc/te
*** 26518,26528 ****
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--- 28095,28105 ----
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*************** dc411f683eea3885c8375e38553d59ec  gcc/te
*** 26560,26578 ****
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--- 28137,28155 ----
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*************** d4428fa0469134923aa7c0bd4422bfdc  gcc/te
*** 26580,26586 ****
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--- 28157,28163 ----
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*************** e7d59dbc8b7b26ec012e63912c55ce82  gcc/te
*** 26629,26635 ****
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*************** e52cdfcf170396785521dec3a2dd2045  gcc/te
*** 26656,26665 ****
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*************** feda9b994070314a189d1c52bc67d249  gcc/te
*** 26699,26710 ****
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--- 28276,28287 ----
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*************** e64bc95a135f8e235fd32f21277cc950  gcc/te
*** 26712,26718 ****
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*************** aac9fa1e0a8f32d26d0b91a6ce4f86c0  gcc/te
*** 26796,26807 ****
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*************** d2abfdabdbeb6670f7a517aaa74714b3  gcc/te
*** 26817,26828 ****
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*************** e62083fe412da5c50c1b5367402c5bb4  gcc/te
*** 26855,26862 ****
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--- 28432,28439 ----
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*************** c0e8c2714ac70d507f78a1178adf86cd  gcc/te
*** 26874,26880 ****
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*************** e7f459c4af5a8e616ac0225605a4c7c0  gcc/te
*** 26887,26937 ****
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--- 28464,28538 ----
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*************** f1396a13185fb3a1a1f5cb14db6e38a7  gcc/te
*** 26965,26976 ****
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--- 28566,28577 ----
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*************** e35cb7965c1f2a5deadf10d8335506ca  gcc/te
*** 26983,26989 ****
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--- 28584,28590 ----
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*************** ce937efab237b195eacc51860fac3366  gcc/te
*** 27010,27016 ****
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--- 28611,28617 ----
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*************** fb4d8e8eeb040ddcd8fe4efccb93678b  gcc/te
*** 27260,27273 ****
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*************** af7944c7866aae21515a5f06750115be  gcc/te
*** 27294,27306 ****
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*************** a580e1ca2b138c4042e0a43bf49da5b0  gcc/te
*** 27473,27479 ****
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*************** a024382373a506e7761148108043c429  gcc/te
*** 27512,27519 ****
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*************** dd03f127a01ee33a3d143c1d1d31d2fc  gcc/te
*** 27688,27694 ****
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*************** ee18345ed511ceff311552d973c6426f  gcc/te
*** 27805,27810 ****
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*************** f60b71cba62f24c87aeeb52ca18cf75c  gcc/te
*** 27829,27836 ****
--- 29432,29442 ----
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*************** caa74354806f94b1777d3d438547d909  gcc/te
*** 27851,27857 ****
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*************** fef8c8e0e438a70ba68e11025e033af6  gcc/te
*** 27923,27928 ****
--- 29529,29537 ----
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*************** f085b9359ce3c84fa1ab085ae3431f33  gcc/te
*** 28017,28027 ****
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--- 29626,29636 ----
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*************** e329c7fca0108570e81273f5b62d90e0  gcc/te
*** 28039,28052 ****
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--- 29648,29661 ----
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! cf2cf60f6413a358f4b1cbee3089e2dd  gcc/testsuite/gcc.c-torture/execute/execute.exp
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*************** d7e5d823095813f4e037fc2146b69922  gcc/te
*** 28055,28068 ****
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--- 29664,29674 ----
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*************** a97c5124480e7231f6d6af194cc220f2  gcc/te
*** 28072,28095 ****
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--- 29678,29699 ----
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*************** fee97375f1852586391d62e54dbf07b6  gcc/te
*** 28099,28115 ****
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--- 29703,29718 ----
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*************** a16df037c76adbc0a3081a51f1770b49  gcc/te
*** 28129,28135 ****
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--- 29732,29738 ----
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*************** fd8619fd30dca66f688bfecaab80d41a  gcc/te
*** 28155,28161 ****
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--- 29758,29764 ----
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*************** a1747d3f25b202a434a5b39127e8ea5f  gcc/te
*** 28194,28199 ****
--- 29797,29803 ----
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*************** f7f3243f94a8f9a130ba68f40d2354a6  gcc/te
*** 28335,28341 ****
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--- 29939,29945 ----
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! 5e8481bf452e6cc88198b29efe517f88  gcc/testsuite/gcc.c-torture/execute/pr39228.c
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*************** f6e1d4bf24853fe1fc1e07c40e0315ec  gcc/te
*** 28536,28542 ****
  3f1f43a4ad97d1d3d97c85b2a17f74c0  gcc/testsuite/gcc.c-torture/execute/pr63659.c
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! bcff5b5c4232d9de0ce25a75579029ac  gcc/testsuite/gcc.c-torture/execute/pr64242.c
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--- 30140,30146 ----
  3f1f43a4ad97d1d3d97c85b2a17f74c0  gcc/testsuite/gcc.c-torture/execute/pr63659.c
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! 63bb31662e218ccfdd672eb93592e5db  gcc/testsuite/gcc.c-torture/execute/pr64242.c
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*************** f8456b721d6a5e0056d6c45e419ec296  gcc/te
*** 28666,28677 ****
  7fc91d19a6216a423bd4d8b82adf4373  gcc/testsuite/gcc.c-torture/execute/pr84169.c
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! cd16d235517336c5392e2241692365ca  gcc/testsuite/gcc.c-torture/execute/pr85331.c
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--- 30270,30282 ----
  7fc91d19a6216a423bd4d8b82adf4373  gcc/testsuite/gcc.c-torture/execute/pr84169.c
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! b4a3047da7d9fa539f8a2dbe3e9fe76a  gcc/testsuite/gcc.c-torture/execute/pr85331.c
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*************** c7f70c7d3f0cf1b55bb6fd43c9215d8c  gcc/te
*** 28680,28686 ****
  6e8477cb0ff3bc19b36452d812c5b7d1  gcc/testsuite/gcc.c-torture/execute/pr85756.c
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! fae43e8bf2e2c0420f081d6fb88baf15  gcc/testsuite/gcc.c-torture/execute/pr86528.c
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--- 30285,30293 ----
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*************** fe9cbf88b57bdd9a5bf9c526284225f4  gcc/te
*** 28695,28701 ****
  1f3dc28ccc619525eeb6120afc4468ac  gcc/testsuite/gcc.c-torture/execute/pr89434.c
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! b218aa552a7d53beb1e047811733490d  gcc/testsuite/gcc.c-torture/execute/pr90025.c
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--- 30302,30308 ----
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! 53efe1f200d3bec24ed00c280584deca  gcc/testsuite/gcc.c-torture/execute/pr90025.c
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*************** d26cfc42f19ac5e3ce4db452fd94f09a  gcc/te
*** 28704,28719 ****
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! c9ea0c1a31433c22b0bdd0a5b832f7e8  gcc/testsuite/gcc.c-torture/execute/printf-2.c
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--- 30311,30341 ----
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*************** a28bd879356d47f1e472aeb9f6dd7b5e  gcc/te
*** 28722,28731 ****
--- 30344,30355 ----
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*************** ba93f0b459fe7321a82190489fff365d  gcc/te
*** 28771,28777 ****
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--- 30395,30401 ----
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*************** f30bf0095addeef700a83f36c598deab  gcc/te
*** 28819,28829 ****
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! cdab8fb6b60968b4321a6932cf1b550d  gcc/testsuite/gcc.c-torture/unsorted/unsorted.exp
! a1134392141e41759004866a284f944c  gcc/testsuite/gcc.dg-selftests/dg-final.exp
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--- 30443,30452 ----
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! 3e1d730839b9bd57de130545fee4c6e7  gcc/testsuite/gcc.c-torture/unsorted/unsorted.exp
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*************** d1a693baca2cba572e7105df5dd48125  gcc/te
*** 28831,28837 ****
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--- 30454,30460 ----
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*************** a7c72bd6aaf9dfbb7dc938acbaa6464d  gcc/te
*** 28870,28884 ****
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*************** fb8e19f630a58be9d2b01baffc65b9c6  gcc/te
*** 28910,28916 ****
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--- 30533,30539 ----
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*************** c98d25247d7774da4966675b06433f10  gcc/te
*** 28947,28953 ****
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--- 30570,30576 ----
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*************** aac5b7dd5982d8ac72db0d6c4bed3939  gcc/te
*** 28955,28961 ****
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--- 30578,30584 ----
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*************** e41c70826d2d2e86d16c489f982a0f1a  gcc/te
*** 28964,28970 ****
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*************** f09bdb3c3c43b669e852ce00fc096a55  gcc/te
*** 28985,28994 ****
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*************** f0b8684a8c3558155b34abc46a79ff50  gcc/te
*** 29004,29010 ****
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--- 30627,30633 ----
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*************** cda741cce59ba0dcd70871f300400003  gcc/te
*** 29043,29049 ****
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--- 30666,30672 ----
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*************** a555e6d5ea6bd1f1a4d69ffbba32dfda  gcc/te
*** 29057,29063 ****
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--- 30680,30686 ----
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*************** f88e1e5fbc4c4286a0cb31defcba1969  gcc/te
*** 29071,29090 ****
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--- 30694,30715 ----
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*************** b6c0291a21f96dc6fcc3ed29eac8c8af  gcc/te
*** 29095,29101 ****
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--- 30720,30726 ----
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*************** dedff38471f8963dc7ff6b71f19af4e2  gcc/te
*** 29108,29136 ****
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--- 30733,30777 ----
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*************** fe25f03fdb469ad245f6cae14480ddad  gcc/te
*** 29144,29150 ****
  dec2067dc6cb85456e910b911face133  gcc/testsuite/gcc.dg/Wbool-operation-1.c
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--- 30785,30794 ----
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*************** f8e0507acf1da471f9078e673cd34f50  gcc/te
*** 29217,29227 ****
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--- 30861,30872 ----
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*************** fadf7514e1bb63b4a5e988ce51700510  gcc/te
*** 29232,29242 ****
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--- 30877,30888 ----
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*************** e1774554778a57412ba37170551b5a8e  gcc/te
*** 29247,29253 ****
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--- 30893,30899 ----
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*************** aef2ea71e6f4f2975f702f53e97d2b41  gcc/te
*** 29255,29261 ****
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*************** f273410ff764324a50afef028667ebe5  gcc/te
*** 29270,29275 ****
--- 30917,30924 ----
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*************** a6fe061e57fc17982a28d9c38591ce09  gcc/te
*** 29322,29346 ****
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*************** ba00dd90a738fcf012b52b2de2803708  gcc/te
*** 29354,29362 ****
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*************** bfc663ffe6e57f766fa3d5ea61094f45  gcc/te
*** 29387,29393 ****
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*************** bb2099f1da2a18a8306bbf5e15b7e411  gcc/te
*** 29395,29410 ****
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*************** b6e551c9441e53cd1be6e84faec996ed  gcc/te
*** 29412,29418 ****
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*************** b3dd7695cafc782eb7786677833eb8d0  gcc/te
*** 29431,29442 ****
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*************** f6407be4600095686ecc96595d2738b5  gcc/te
*** 29457,29473 ****
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--- 31139,31159 ----
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*************** ecaba7c928af85c280e63fa96b9b5e1b  gcc/te
*** 29483,29489 ****
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*************** e9ee98b1c57aa38ee8180ddadb22ca7a  gcc/te
*** 29511,29517 ****
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--- 31405,31411 ----
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*************** f5a2800fc5f21185bd9bdbd69e270c10  gcc/te
*** 29521,29527 ****
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--- 31415,31421 ----
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*************** a2d1ea88dacc70c33faa24147781e0a9  gcc/te
*** 29569,29576 ****
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--- 31463,31470 ----
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*************** bcbbadd260cb26dea44e22620dc945b0  gcc/te
*** 29579,29588 ****
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--- 31473,31483 ----
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*************** b6d936bcef333630cc9629b477556dad  gcc/te
*** 29629,29640 ****
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--- 31524,31535 ----
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*************** cf011205fa8585115ba0b4456ca190b2  gcc/te
*** 29672,29682 ****
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--- 31567,31583 ----
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*************** acc676cc7cbe238cce1cf065706f8c06  gcc/te
*** 29690,29707 ****
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  02d7d6aadac12a028dedd724bb71f324  gcc/testsuite/gcc.dg/attr-assume_aligned-2.c
  381dde82adbf6ab920a6cf273228f01e  gcc/testsuite/gcc.dg/attr-assume_aligned-3.c
! 70023e7cada56d55e2ff9fd49058cd21  gcc/testsuite/gcc.dg/attr-assume_aligned-4.c
! 2e2218e331d96f9aa5f55ea3bac5fe1d  gcc/testsuite/gcc.dg/attr-copy-2.c
  b2c4e769d6b76333376078e568f8eaa8  gcc/testsuite/gcc.dg/attr-copy-3.c
  33bfe432b84ca62b61405f079f342fc2  gcc/testsuite/gcc.dg/attr-copy-4.c
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--- 31591,31608 ----
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  027fba1dfd863548c3847f174d9efa33  gcc/testsuite/gcc.dg/attr-alloc_size-4.c
! 836b93fcecc63143d78e3245441eb8f8  gcc/testsuite/gcc.dg/attr-alloc_size-5.c
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  cc47411b2b3baa583394de250eb7c8ba  gcc/testsuite/gcc.dg/attr-alloc_size-8.c
  52c6f276a374df0f896123bfcbe0aaaa  gcc/testsuite/gcc.dg/attr-alloc_size-9.c
! 905e80d8b2e439cd15ed0597458ce2ec  gcc/testsuite/gcc.dg/attr-alloc_size.c
  bff5bf12c7a752b89f17af335428c788  gcc/testsuite/gcc.dg/attr-alwaysinline.c
  6774f30903239eb0b974c38374bce074  gcc/testsuite/gcc.dg/attr-assume_aligned-1.c
  02d7d6aadac12a028dedd724bb71f324  gcc/testsuite/gcc.dg/attr-assume_aligned-2.c
  381dde82adbf6ab920a6cf273228f01e  gcc/testsuite/gcc.dg/attr-assume_aligned-3.c
! 048f7205c10965fda385b1f6c23fd574  gcc/testsuite/gcc.dg/attr-assume_aligned-4.c
! 98639a922ccd34ef430959327ab91ce7  gcc/testsuite/gcc.dg/attr-copy-2.c
  b2c4e769d6b76333376078e568f8eaa8  gcc/testsuite/gcc.dg/attr-copy-3.c
  33bfe432b84ca62b61405f079f342fc2  gcc/testsuite/gcc.dg/attr-copy-4.c
  b89b2a5e91e59587574b0ef6b1f1b4c7  gcc/testsuite/gcc.dg/attr-copy-5.c
*************** b354bea7c992db9900660e8f86e50619  gcc/te
*** 29712,29717 ****
--- 31613,31619 ----
  2ab690f26f6524b356d114e0c2e001f6  gcc/testsuite/gcc.dg/attr-error-1.c
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  e2c4478123394f5f5dcc53fed1244f90  gcc/testsuite/gcc.dg/attr-externally-visible-2.c
+ 1e3d7e42a41541ec8415eb574e80f32b  gcc/testsuite/gcc.dg/attr-flatten-1.c
  e1bd9aabd944b99886e4caee5bcc3dfc  gcc/testsuite/gcc.dg/attr-hotcold-1.c
  36757d189f681d886aee7b5bc8bc39a8  gcc/testsuite/gcc.dg/attr-ifunc-1.c
  fdff5507603fa1993842a13ecf8090c5  gcc/testsuite/gcc.dg/attr-ifunc-2.c
*************** e427c17eb1d839cc3cf176d262cdffc0  gcc/te
*** 29726,29734 ****
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  2e8d579abde3b50be916cdcd11691f06  gcc/testsuite/gcc.dg/attr-nest.c
! dfe86d72ed84778970010f482aa51568  gcc/testsuite/gcc.dg/attr-noinline.c
! 3256957c833fc7587cbd2c4bbb90f984  gcc/testsuite/gcc.dg/attr-noipa.c
! a141e0b8945f4278077925d37219859c  gcc/testsuite/gcc.dg/attr-nonstring-2.c
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--- 31628,31636 ----
  e02ec6b9f7fd9ab37c02f7efd3c1f1d5  gcc/testsuite/gcc.dg/attr-ms_struct-2.c
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  2e8d579abde3b50be916cdcd11691f06  gcc/testsuite/gcc.dg/attr-nest.c
! 09064ad2ea81b8688ea9d81edf13c136  gcc/testsuite/gcc.dg/attr-noinline.c
! 23420c6eb2e3bb0c1cccb8e5b6e5547c  gcc/testsuite/gcc.dg/attr-noipa.c
! e3c9fe25e18dde2e3ddabab4444ae2dc  gcc/testsuite/gcc.dg/attr-nonstring-2.c
  8d8b342bc89bdc6a55554323f38fb453  gcc/testsuite/gcc.dg/attr-nonstring-3.c
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  64691a187301ec1b2085cd2f40c0d41a  gcc/testsuite/gcc.dg/attr-nonstring.c
*************** db8374eda20551d6cd60bccb85b32576  gcc/te
*** 29740,29751 ****
  d3ad2f245a32e99333ec2c853ab3da93  gcc/testsuite/gcc.dg/attr-weakref-1.c
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! 0e9f1da058d76aa4fbad24a3687c8454  gcc/testsuite/gcc.dg/attr-weakref-2.c
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! ffcdc692a2c13f3bf309de8c7dd8d752  gcc/testsuite/gcc.dg/autopar/autopar.exp
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--- 31642,31654 ----
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! b192f8a885f9deddc53ade0456fd18cb  gcc/testsuite/gcc.dg/attr-weakref-2.c
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  a8b698b276857d272916880be5579a44  gcc/testsuite/gcc.dg/attr-weakref-4.c
+ c42096cdd70af11210a8acce42d72fc4  gcc/testsuite/gcc.dg/attr-weakref-5.c
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! fe22d9b5ec9c2ac950ca8ab8f618b6ab  gcc/testsuite/gcc.dg/autopar/autopar.exp
  aa4d5a35793f7cfe360cd57078e1adc3  gcc/testsuite/gcc.dg/autopar/outer-1.c
  025c98b5845d57489814930464df1724  gcc/testsuite/gcc.dg/autopar/outer-2.c
  89a6c222b7a3ca9428f07d4ea8489cee  gcc/testsuite/gcc.dg/autopar/outer-3.c
*************** ee541acf5138faf020e99a710e071f08  gcc/te
*** 29761,29767 ****
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! 367c92b0ae763b0366d4ae2f926ab13d  gcc/testsuite/gcc.dg/autopar/pr39500-1.c
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--- 31664,31670 ----
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! 815eb13fb915e4bf0ade8ea370f7804a  gcc/testsuite/gcc.dg/autopar/pr39500-1.c
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  17f2566109a89b3dbced8b9b303b2649  gcc/testsuite/gcc.dg/autopar/pr46099-2.c
*************** a15c47e075395d034e4a4f801ac3bbee  gcc/te
*** 29792,29798 ****
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! bd8dcababb2b878b4b2e6a7b44270723  gcc/testsuite/gcc.dg/autopar/reduc-1char.c
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--- 31695,31701 ----
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! 77f69522e732e6dfb7ed7867e14a173f  gcc/testsuite/gcc.dg/autopar/reduc-1char.c
  faacb19babd5a7b53cfd57e60279fa11  gcc/testsuite/gcc.dg/autopar/reduc-1short.c
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  4b33bbf0046d8079f5b231b60493e6fd  gcc/testsuite/gcc.dg/autopar/reduc-2char.c
*************** faacb19babd5a7b53cfd57e60279fa11  gcc/te
*** 29800,29806 ****
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  f36bbd087ac3ea147e58ddaa13c05621  gcc/testsuite/gcc.dg/autopar/reduc-6.c
! e89c552809bbb53d83015a031792ca25  gcc/testsuite/gcc.dg/autopar/reduc-7.c
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--- 31703,31709 ----
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! f4fb130600932752f20fe058b47563f5  gcc/testsuite/gcc.dg/autopar/reduc-7.c
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*************** c9bbd70f3dbd7558a9c1c7a6e5901e7b  gcc/te
*** 29871,29881 ****
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! 22311f26cbdc88195908671a7e0230bf  gcc/testsuite/gcc.dg/builtin-apply2.c
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  e37f4aca281a2c82829d2bf1650d5193  gcc/testsuite/gcc.dg/builtin-bswap-1.c
--- 31774,31785 ----
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! db3123edd0284dc82ac22327d1efab9f  gcc/testsuite/gcc.dg/builtin-apply2.c
  4844379205910806b383dbde4bb6bb59  gcc/testsuite/gcc.dg/builtin-apply3.c
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+ d040792d1dd4c9dd03defd6b33b73ca3  gcc/testsuite/gcc.dg/builtin-arith-overflow-3.c
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  e37f4aca281a2c82829d2bf1650d5193  gcc/testsuite/gcc.dg/builtin-bswap-1.c
*************** b152d7b3044cd4c130385716be2c314d  gcc/te
*** 29896,29904 ****
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  919180fc1760483ded11685f7fb367c7  gcc/testsuite/gcc.dg/builtin-has-attribute.c
! 20c26d8bf644e7a754f887361859730c  gcc/testsuite/gcc.dg/builtin-inf-1.c
  38e3fce76d6a329bdf859566063e041c  gcc/testsuite/gcc.dg/builtin-memchr-2.c
  198907886f9baf1bf3b3a41257261e20  gcc/testsuite/gcc.dg/builtin-memchr-3.c
  297482280bba1db1aca62784fdb79b21  gcc/testsuite/gcc.dg/builtin-memchr.c
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--- 31800,31809 ----
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  919180fc1760483ded11685f7fb367c7  gcc/testsuite/gcc.dg/builtin-has-attribute.c
! accf3598507b8caeb30c44d0552888e4  gcc/testsuite/gcc.dg/builtin-inf-1.c
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  198907886f9baf1bf3b3a41257261e20  gcc/testsuite/gcc.dg/builtin-memchr-3.c
+ 055e540871b62fb5331ed78a77cd4465  gcc/testsuite/gcc.dg/builtin-memchr-4.c
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  8f379b287c70f375ef6c56e42f7b980a  gcc/testsuite/gcc.dg/builtin-memcpy.c
*************** d65c470a9173c5d0f37963aa85d49753  gcc/te
*** 29926,29938 ****
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! a910e6e4dbad39a3e79c8e8fbf87c9ed  gcc/testsuite/gcc.dg/builtin-stringop-chk-5.c
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! 0120029ca2ff2ddfd87d1d5c4b59a423  gcc/testsuite/gcc.dg/builtin-stringop-chk-8.c
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--- 31831,31843 ----
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! 641e02f6eead02fdda4581c9a18073ef  gcc/testsuite/gcc.dg/builtin-stringop-chk-1.c
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  c70331611a8d62854827d12fe83f7428  gcc/testsuite/gcc.dg/builtin-stringop-chk-4.c
! b24ec70e9d186ef80673b135ae63200d  gcc/testsuite/gcc.dg/builtin-stringop-chk-5.c
  1109497a6a7e6e51e3cea141ef370b83  gcc/testsuite/gcc.dg/builtin-stringop-chk-6.c
  824b313a112ab0c34a8cc694d5c78d6c  gcc/testsuite/gcc.dg/builtin-stringop-chk-7.c
! 73225957ae488ada79955632d57b0406  gcc/testsuite/gcc.dg/builtin-stringop-chk-8.c
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*************** e06e75338accc1d77eb96706931ab719  gcc/te
*** 29949,29955 ****
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*************** de826bd2faea31ca3887af383ff62b8f  gcc/te
*** 29958,29967 ****
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*************** a036d780a44abc0e2b5056e6a8c46257  gcc/te
*** 29981,29989 ****
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*************** d356a5f2cacecd4d84c62758c4277dac  gcc/te
*** 29991,29999 ****
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*************** ab158036f2c9da0a0828e28f9822b6b5  gcc/te
*** 30005,30018 ****
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*************** d176e423452b3b1dc2b591de90fb7b79  gcc/te
*** 30032,30040 ****
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*************** edccfa9a6ec4138450a583864191741b  gcc/te
*** 30043,30048 ****
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*************** e2a0227684c75fbd79e6e01a85396388  gcc/te
*** 30062,30075 ****
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*************** bd625f89c30c13d44a25f058b5e576fe  gcc/te
*** 30093,30099 ****
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--- 32040,32046 ----
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*************** a2644f5e88009b09f917160ffe1efff7  gcc/te
*** 30221,30229 ****
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! 1d2f72275b7f9340615240a3485d221b  gcc/testsuite/gcc.dg/c99-math-long-double-1.c
  8f9626b9b37fad39882aaba226bdadd8  gcc/testsuite/gcc.dg/c99-math.h
  7ca67f3f8acb9cefd81e65f2036d6e40  gcc/testsuite/gcc.dg/c99-mixdecl-1.c
  3bfcadfd4a03b619430856ca5d597b47  gcc/testsuite/gcc.dg/c99-noreturn-1.c
--- 32168,32176 ----
  fec78b820c017ed35b0a8525c3c4f719  gcc/testsuite/gcc.dg/c99-longlong-1.c
  99ab0cebc401f42b6e9cffa0cfe3c889  gcc/testsuite/gcc.dg/c99-longlong-2.c
  8637b4538a417c2d58ee5294049e63fc  gcc/testsuite/gcc.dg/c99-main-1.c
! 649067b29492dcb0836908a50c83c921  gcc/testsuite/gcc.dg/c99-math-double-1.c
! d0792e89109ef8dda193f3009c945c03  gcc/testsuite/gcc.dg/c99-math-float-1.c
! 46a1841fb8480b8ad0a44ea4577e2562  gcc/testsuite/gcc.dg/c99-math-long-double-1.c
  8f9626b9b37fad39882aaba226bdadd8  gcc/testsuite/gcc.dg/c99-math.h
  7ca67f3f8acb9cefd81e65f2036d6e40  gcc/testsuite/gcc.dg/c99-mixdecl-1.c
  3bfcadfd4a03b619430856ca5d597b47  gcc/testsuite/gcc.dg/c99-noreturn-1.c
*************** c860222550f269562be7e07154270c46  gcc/te
*** 30249,30258 ****
  7edbbf023f50b286791374498a6a3b29  gcc/testsuite/gcc.dg/c99-tag-1.c
  4ded0fbf4c885a50d6aabe51bc417569  gcc/testsuite/gcc.dg/c99-tag-2.c
  5f7f391e769c6953fb08ffdb542c3481  gcc/testsuite/gcc.dg/c99-tag-3.c
! 5c6aa2f147cc6ee6756948b72afa7673  gcc/testsuite/gcc.dg/c99-tgmath-1.c
! a6ecfa5815f8bb29ef193e82587e1ac0  gcc/testsuite/gcc.dg/c99-tgmath-2.c
! cc8b6d3d19f137bd27e414130a89ae73  gcc/testsuite/gcc.dg/c99-tgmath-3.c
! 349488fb89c9be247e8ed741bf3193ec  gcc/testsuite/gcc.dg/c99-tgmath-4.c
  038fdf5da5fce4b0a38f0ad2d20b1d45  gcc/testsuite/gcc.dg/c99-thread-local-1.c
  4b5cb651177d17b152a4ab42c191b5de  gcc/testsuite/gcc.dg/c99-typedef-1.c
  9ac77a67b2a3e6238d10fab59bc80485  gcc/testsuite/gcc.dg/c99-typespec-1.c
--- 32196,32205 ----
  7edbbf023f50b286791374498a6a3b29  gcc/testsuite/gcc.dg/c99-tag-1.c
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  5f7f391e769c6953fb08ffdb542c3481  gcc/testsuite/gcc.dg/c99-tag-3.c
! ef5388bdf970968ead2d9cae65fa30ee  gcc/testsuite/gcc.dg/c99-tgmath-1.c
! 8311af5c4fbac249bb77f594f30e70e9  gcc/testsuite/gcc.dg/c99-tgmath-2.c
! 00faae5a1ec1401d585225f923b4fef9  gcc/testsuite/gcc.dg/c99-tgmath-3.c
! aefe6fda64bad8d6ce6d860092bdd719  gcc/testsuite/gcc.dg/c99-tgmath-4.c
  038fdf5da5fce4b0a38f0ad2d20b1d45  gcc/testsuite/gcc.dg/c99-thread-local-1.c
  4b5cb651177d17b152a4ab42c191b5de  gcc/testsuite/gcc.dg/c99-typedef-1.c
  9ac77a67b2a3e6238d10fab59bc80485  gcc/testsuite/gcc.dg/c99-typespec-1.c
*************** e78729c56e303315c992707b363e6724  gcc/te
*** 30270,30278 ****
  49439e2403d12792811837f5d084f5d6  gcc/testsuite/gcc.dg/case-const-1.c
  9f50fca2bb570c1249a68d22661a874b  gcc/testsuite/gcc.dg/case-const-2.c
  f58931af8311670f4e7ca6c218de61e8  gcc/testsuite/gcc.dg/case-const-3.c
! 0e2bedef1cc0d9e515ba4c6fae233eed  gcc/testsuite/gcc.dg/cast-1.c
! 27ea0587c676dbf181a228cac679dced  gcc/testsuite/gcc.dg/cast-2.c
! b231ab73f0b7085a5a404da1ef71c189  gcc/testsuite/gcc.dg/cast-3.c
  0820817e68c6e18b2fc1e4b46cce70f9  gcc/testsuite/gcc.dg/cast-4.c
  83e9582f6195874aa67985e3774e3b48  gcc/testsuite/gcc.dg/cast-function-1.c
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--- 32217,32225 ----
  49439e2403d12792811837f5d084f5d6  gcc/testsuite/gcc.dg/case-const-1.c
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  f58931af8311670f4e7ca6c218de61e8  gcc/testsuite/gcc.dg/case-const-3.c
! 53b0ed799954be8a4e71974b140129cc  gcc/testsuite/gcc.dg/cast-1.c
! 24214b7fcdc8d76c4a3777cb6d362a60  gcc/testsuite/gcc.dg/cast-2.c
! 1a0f14eb008f2ba92c5a7a26d2c56282  gcc/testsuite/gcc.dg/cast-3.c
  0820817e68c6e18b2fc1e4b46cce70f9  gcc/testsuite/gcc.dg/cast-4.c
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  244fc61256640916f7aa9f3db53968f7  gcc/testsuite/gcc.dg/cast-lvalue-1.c
*************** b231ab73f0b7085a5a404da1ef71c189  gcc/te
*** 30281,30288 ****
  7cdaaaf3eeef5db1f78cee824ad191e6  gcc/testsuite/gcc.dg/cast-qual-1.c
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! 3b2ac1a0d1bbe7e4bdd326d18b1603ae  gcc/testsuite/gcc.dg/cdce1.c
! c326ec839e4bfbf32616d4044bc9fc80  gcc/testsuite/gcc.dg/cdce2.c
  c8850be7a0e22bf2e52b8e88bb01c409  gcc/testsuite/gcc.dg/char-compare.c
  9c1af6a5f1547d7888309e68fa1e645e  gcc/testsuite/gcc.dg/charset/asm1.c
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--- 32228,32236 ----
  7cdaaaf3eeef5db1f78cee824ad191e6  gcc/testsuite/gcc.dg/cast-qual-1.c
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! 7cf8e5bafba14ba705d72e0297e402d0  gcc/testsuite/gcc.dg/cdce1.c
! 11ec8737ce99297ae6e2f4ec003ccd1f  gcc/testsuite/gcc.dg/cdce2.c
! 71459b30dfb09ee1d1f69f340f80d722  gcc/testsuite/gcc.dg/cdce3.c
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  de11a3779b8f68e37026c0989fe00062  gcc/testsuite/gcc.dg/charset/asm2.c
*************** bd34927c7e8ef0637a91744aa30c8e22  gcc/te
*** 30294,30316 ****
  7bcfb1562ffc5ec66175fdcc52054745  gcc/testsuite/gcc.dg/charset/attribute2.c
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  a00066d47a6f8dc20ebf4861a2541212  gcc/testsuite/gcc.dg/charset/builtin2.c
! 3a83aff2a9b3557cb0effd447e37e656  gcc/testsuite/gcc.dg/charset/charset.exp
  8c029ca8175e4d8995ea0dbac6040733  gcc/testsuite/gcc.dg/charset/extern.c
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! f62e6422575c03197b41abaa50be82e7  gcc/testsuite/gcc.dg/cleanup-10.c
! 9ece71426368fcd5cb02f368207c0143  gcc/testsuite/gcc.dg/cleanup-11.c
  a0ff63bff744b6d65be67afd83b12109  gcc/testsuite/gcc.dg/cleanup-12.c
! 47770cabd81de35de3d1f4da1de30ba4  gcc/testsuite/gcc.dg/cleanup-13.c
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  63f9f4f172f1c35d6e9325335509bbae  gcc/testsuite/gcc.dg/cleanup-7.c
! 0a3c7071d08d47c3756e14e578c54729  gcc/testsuite/gcc.dg/cleanup-8.c
! deb2c1d17975acef3e0a8f80b9927198  gcc/testsuite/gcc.dg/cleanup-9.c
  5ea0b2e2762698a1e297f260e66cba1c  gcc/testsuite/gcc.dg/cold-1.c
  49d4c3b6c4537cb277dd677c007e06a7  gcc/testsuite/gcc.dg/combine-clobber.c
  692ff616829ae420250cb45b76479307  gcc/testsuite/gcc.dg/combine-subregs.c
--- 32242,32264 ----
  7bcfb1562ffc5ec66175fdcc52054745  gcc/testsuite/gcc.dg/charset/attribute2.c
  d256d028f437be7e103b223e7c20fe96  gcc/testsuite/gcc.dg/charset/builtin1.c
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! c5803a443f11e4d11879b06e357344cf  gcc/testsuite/gcc.dg/charset/charset.exp
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  ba82fd5846afa304514b1df1ecbdbf04  gcc/testsuite/gcc.dg/cleanup-1.c
! 0ae922071b912ca26621cc61987c07b6  gcc/testsuite/gcc.dg/cleanup-10.c
! d7691ea78eb37229233915a20b69b353  gcc/testsuite/gcc.dg/cleanup-11.c
  a0ff63bff744b6d65be67afd83b12109  gcc/testsuite/gcc.dg/cleanup-12.c
! ce7d26611551540012f35355f0f9567f  gcc/testsuite/gcc.dg/cleanup-13.c
  78bae3132e2068a254f88515c6bf0640  gcc/testsuite/gcc.dg/cleanup-2.c
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  d9e45b781a97ee5ac71b788011eae52c  gcc/testsuite/gcc.dg/cleanup-6.c
  63f9f4f172f1c35d6e9325335509bbae  gcc/testsuite/gcc.dg/cleanup-7.c
! 4b3f3381c96015f94c259a34b69db093  gcc/testsuite/gcc.dg/cleanup-8.c
! 2b48928f2bd195ac844588f7ca503b99  gcc/testsuite/gcc.dg/cleanup-9.c
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  692ff616829ae420250cb45b76479307  gcc/testsuite/gcc.dg/combine-subregs.c
*************** c7cb5e1831bea1746c3a206e4c26e3ec  gcc/te
*** 30332,30338 ****
  ed52253f6b0d3e0e42d8c7d911691e47  gcc/testsuite/gcc.dg/compare8.c
  e505e91e0c3898015606540b084a3cf3  gcc/testsuite/gcc.dg/compare9.c
  320a670a68ed763f73f02634dc198ac9  gcc/testsuite/gcc.dg/compat/compat-common.h
! 9b7a86cd6fd7c06a0de10e1887b5b946  gcc/testsuite/gcc.dg/compat/compat.exp
  24894b4e4b3498731affefac610f0a05  gcc/testsuite/gcc.dg/compat/fnptr-by-value-1_main.c
  fe9eda5144c4b80c732bde86debf0550  gcc/testsuite/gcc.dg/compat/fnptr-by-value-1_x.c
  564c8abb5b6fdd9d796e4c9983416c75  gcc/testsuite/gcc.dg/compat/fnptr-by-value-1_y.c
--- 32280,32286 ----
  ed52253f6b0d3e0e42d8c7d911691e47  gcc/testsuite/gcc.dg/compare8.c
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  320a670a68ed763f73f02634dc198ac9  gcc/testsuite/gcc.dg/compat/compat-common.h
! 0f6bca7383e41efac0ce3283759591bb  gcc/testsuite/gcc.dg/compat/compat.exp
  24894b4e4b3498731affefac610f0a05  gcc/testsuite/gcc.dg/compat/fnptr-by-value-1_main.c
  fe9eda5144c4b80c732bde86debf0550  gcc/testsuite/gcc.dg/compat/fnptr-by-value-1_x.c
  564c8abb5b6fdd9d796e4c9983416c75  gcc/testsuite/gcc.dg/compat/fnptr-by-value-1_y.c
*************** b13ce33543763e05e497e6e9b0b06afc  gcc/te
*** 30507,30513 ****
  b2ee80d950ef18b6d552d6f80b1ea7ec  gcc/testsuite/gcc.dg/compat/struct-complex-2_main.c
  a03c72d9882332482357735b2b82316a  gcc/testsuite/gcc.dg/compat/struct-complex-2_x.c
  8797a70232b48157299f45876cf6b247  gcc/testsuite/gcc.dg/compat/struct-complex-2_y.c
! 3832035b8ef47c86a7f55ccb9ede2a37  gcc/testsuite/gcc.dg/compat/struct-layout-1.exp
  63acee7a9bb7d9a457beb370e4beede2  gcc/testsuite/gcc.dg/compat/struct-layout-1.h
  b6387e3bbec3d790c42ef44208119615  gcc/testsuite/gcc.dg/compat/struct-layout-1_generate.c
  997082aeb20119519c8c3e77ee7f6cd1  gcc/testsuite/gcc.dg/compat/struct-layout-1_main.c
--- 32455,32461 ----
  b2ee80d950ef18b6d552d6f80b1ea7ec  gcc/testsuite/gcc.dg/compat/struct-complex-2_main.c
  a03c72d9882332482357735b2b82316a  gcc/testsuite/gcc.dg/compat/struct-complex-2_x.c
  8797a70232b48157299f45876cf6b247  gcc/testsuite/gcc.dg/compat/struct-complex-2_y.c
! a740b7aef77d535f9ed5b97c4f5981c4  gcc/testsuite/gcc.dg/compat/struct-layout-1.exp
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  b6387e3bbec3d790c42ef44208119615  gcc/testsuite/gcc.dg/compat/struct-layout-1_generate.c
  997082aeb20119519c8c3e77ee7f6cd1  gcc/testsuite/gcc.dg/compat/struct-layout-1_main.c
*************** c82752836e1d5d6a5f58b9bf26e9abf6  gcc/te
*** 30573,30579 ****
  66b4de358b94a61c9a5ebac5a5372393  gcc/testsuite/gcc.dg/complete-port.c
  d05bdce55447fc39d09a1133e04e88b4  gcc/testsuite/gcc.dg/completion-1.c
  0ecae1a6ee91c5e0f624feb0fe698592  gcc/testsuite/gcc.dg/completion-2.c
! c2a68a24fbec74cceeb7d33458666755  gcc/testsuite/gcc.dg/completion-3.c
  45e735b0d33fac192a119347115d5b0c  gcc/testsuite/gcc.dg/completion-4.c
  649ce6d53eeda31c7cb4947fab7ac38f  gcc/testsuite/gcc.dg/completion-5.c
  a86556f4f0c72c0bee2f104440830505  gcc/testsuite/gcc.dg/complex-1.c
--- 32521,32527 ----
  66b4de358b94a61c9a5ebac5a5372393  gcc/testsuite/gcc.dg/complete-port.c
  d05bdce55447fc39d09a1133e04e88b4  gcc/testsuite/gcc.dg/completion-1.c
  0ecae1a6ee91c5e0f624feb0fe698592  gcc/testsuite/gcc.dg/completion-2.c
! c69c6378c9410227b4af8fe30bcb3f80  gcc/testsuite/gcc.dg/completion-3.c
  45e735b0d33fac192a119347115d5b0c  gcc/testsuite/gcc.dg/completion-4.c
  649ce6d53eeda31c7cb4947fab7ac38f  gcc/testsuite/gcc.dg/completion-5.c
  a86556f4f0c72c0bee2f104440830505  gcc/testsuite/gcc.dg/complex-1.c
*************** da2226add6799fd192e2b367404d1b0b  gcc/te
*** 30582,30596 ****
  7cbd734da9d8330b57f4e78af353b9f2  gcc/testsuite/gcc.dg/complex-3.c
  47685f7f7986540a92dac40dcd9edc3f  gcc/testsuite/gcc.dg/complex-4.c
  40fff02642e5e2ead0c4b58bc10042b7  gcc/testsuite/gcc.dg/complex-5.c
! 20025a221d8aeda33c356ba4d87e0e34  gcc/testsuite/gcc.dg/complex-6.c
! 6d7a8d52267591364abb0cca39fdb412  gcc/testsuite/gcc.dg/complex-7.c
  e4076ab8b4eaeecdcbb527dfc36e6b0a  gcc/testsuite/gcc.dg/compound-literal-1.c
  0f6847b008a2fc6d389626675248c378  gcc/testsuite/gcc.dg/compound-lvalue-1.c
  1446a4d262092084b79d8f6b2b822154  gcc/testsuite/gcc.dg/concat.c
  1514f96c11b1be4f94d4f0cb980865de  gcc/testsuite/gcc.dg/concat2.c
  a135e7633aae73af2316d15cec88e40c  gcc/testsuite/gcc.dg/cond-constqual-1.c
  1c97a6a4590c6eb2e7d9d7b15729539a  gcc/testsuite/gcc.dg/cond-lvalue-1.c
! 1e77dbdb1a2f17c79ae5421293c320fd  gcc/testsuite/gcc.dg/const-1.c
  596a3a673cfe30ee42413e4a7a07e289  gcc/testsuite/gcc.dg/const-2.c
  6ccf395fc674b370645bdd0d50fb25b8  gcc/testsuite/gcc.dg/const-elim-1.c
  6548ddc26ded25bf04201161fd5350a8  gcc/testsuite/gcc.dg/const-elim-2.c
--- 32530,32544 ----
  7cbd734da9d8330b57f4e78af353b9f2  gcc/testsuite/gcc.dg/complex-3.c
  47685f7f7986540a92dac40dcd9edc3f  gcc/testsuite/gcc.dg/complex-4.c
  40fff02642e5e2ead0c4b58bc10042b7  gcc/testsuite/gcc.dg/complex-5.c
! 9de5db7ff7a6ed7515b31df0322b076e  gcc/testsuite/gcc.dg/complex-6.c
! b674b2aeb681aa44d931199aa6db6fd8  gcc/testsuite/gcc.dg/complex-7.c
  e4076ab8b4eaeecdcbb527dfc36e6b0a  gcc/testsuite/gcc.dg/compound-literal-1.c
  0f6847b008a2fc6d389626675248c378  gcc/testsuite/gcc.dg/compound-lvalue-1.c
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  a135e7633aae73af2316d15cec88e40c  gcc/testsuite/gcc.dg/cond-constqual-1.c
  1c97a6a4590c6eb2e7d9d7b15729539a  gcc/testsuite/gcc.dg/cond-lvalue-1.c
! ec1a2cbdf91e1a1313a3574d47d6a323  gcc/testsuite/gcc.dg/const-1.c
  596a3a673cfe30ee42413e4a7a07e289  gcc/testsuite/gcc.dg/const-2.c
  6ccf395fc674b370645bdd0d50fb25b8  gcc/testsuite/gcc.dg/const-elim-1.c
  6548ddc26ded25bf04201161fd5350a8  gcc/testsuite/gcc.dg/const-elim-2.c
*************** d6fdc59bae27f9e3097840361d13c67a  gcc/te
*** 30658,30664 ****
  342b42bbace19c658aff4b38bba906c3  gcc/testsuite/gcc.dg/cpp/_Pragma7.c
  5d435e2d88987bbe8d9e62951d0d9d04  gcc/testsuite/gcc.dg/cpp/arith-1.c
  55fe1a813facb5ba765d096c8e745fa1  gcc/testsuite/gcc.dg/cpp/arith-3.c
! 9f974a3374d786100e6d40560923d3e2  gcc/testsuite/gcc.dg/cpp/assembl2.S
  d2ceecccef1772ada3beff72d6faed3e  gcc/testsuite/gcc.dg/cpp/assembler.S
  9ca3af4c8a508d8e50858641266fef9f  gcc/testsuite/gcc.dg/cpp/assert1.c
  5e115586c68bc98bb44755b93dcf7068  gcc/testsuite/gcc.dg/cpp/assert2.c
--- 32606,32612 ----
  342b42bbace19c658aff4b38bba906c3  gcc/testsuite/gcc.dg/cpp/_Pragma7.c
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*************** c7a189aca9e28ef213e587486efddd56  gcc/te
*** 30669,30686 ****
--- 32617,32641 ----
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*************** dc9eac76c9e4283c4325c2a6c902a00b  gcc/te
*** 30730,30736 ****
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--- 32685,32691 ----
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*************** b28d91565a9d3d3c36d42433a970d0a8  gcc/te
*** 30773,30778 ****
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*************** ff097d6c0a01ad217a3f037659d41ccb  gcc/te
*** 30961,30967 ****
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--- 32920,32926 ----
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*************** dfae84d5692992fcd994d5f23d79f97d  gcc/te
*** 30994,31000 ****
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--- 32953,32959 ----
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*************** fb8d966edc2bb4f9de1858ef3f07c225  gcc/te
*** 31101,31127 ****
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*************** fe82f155f148a27e0e5e22f4daa9c8a9  gcc/te
*** 31129,31135 ****
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--- 33101,33107 ----
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*************** d6455bd7d39e63a6ebb49f2bee334872  gcc/te
*** 31166,31171 ****
--- 33138,33144 ----
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*************** fb2cff7f2512c80434d59d702b80e754  gcc/te
*** 31175,31181 ****
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*************** ee94511375797117140ca777fd1695b1  gcc/te
*** 31199,31207 ****
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  5ca3ca317094442241bdcaf1320473d2  gcc/testsuite/gcc.dg/darwin-minversion-link.c
! 333be43e38c5b8f9c8bde5d01493902a  gcc/testsuite/gcc.dg/darwin-sections.c
  3cfa6daebed9a12884613012f50433e4  gcc/testsuite/gcc.dg/darwin-segaddr.c
! 91dd7afa81d8d5b0e0607ca1adeb791c  gcc/testsuite/gcc.dg/darwin-version-1.c
  9145b589b54240035dacb7540309d62e  gcc/testsuite/gcc.dg/darwin-weakimport-1.c
  bda7de2e2fd6472aa3ffe7873407e58d  gcc/testsuite/gcc.dg/darwin-weakimport-2.c
  616f3eafcf2947e4dd54e569654c0721  gcc/testsuite/gcc.dg/darwin-weakimport-3.c
--- 33172,33180 ----
  5a8b775f8ce1e0cafb8782fbc39b58e4  gcc/testsuite/gcc.dg/darwin-minversion-8.c
  aa9dfa39c42ef65a88c0a708412fb842  gcc/testsuite/gcc.dg/darwin-minversion-9.c
  5ca3ca317094442241bdcaf1320473d2  gcc/testsuite/gcc.dg/darwin-minversion-link.c
! 821637757f5631d14cb79d2312eeba68  gcc/testsuite/gcc.dg/darwin-sections.c
  3cfa6daebed9a12884613012f50433e4  gcc/testsuite/gcc.dg/darwin-segaddr.c
! e3d2d2840d7d23dee7e2cd94e097a114  gcc/testsuite/gcc.dg/darwin-version-1.c
  9145b589b54240035dacb7540309d62e  gcc/testsuite/gcc.dg/darwin-weakimport-1.c
  bda7de2e2fd6472aa3ffe7873407e58d  gcc/testsuite/gcc.dg/darwin-weakimport-2.c
  616f3eafcf2947e4dd54e569654c0721  gcc/testsuite/gcc.dg/darwin-weakimport-3.c
*************** ea7172af490d3fb85bddeb7037fddc2e  gcc/te
*** 31229,31235 ****
  16edfbc8489f8d2648184f4d56272f9a  gcc/testsuite/gcc.dg/debug/debug-5.c
  3a93989c56d211b178b4ce1cb7b8db55  gcc/testsuite/gcc.dg/debug/debug-6.c
  92ca009107fd3047af0ed6bffbcf92f2  gcc/testsuite/gcc.dg/debug/debug-7.c
! 1e09cf446b6844f50e5512cc37dec15d  gcc/testsuite/gcc.dg/debug/debug.exp
  900fe69daa3b56214378610d534c3e53  gcc/testsuite/gcc.dg/debug/dwarf2-1.c
  9cf87b67a0fe641563a13455b49c7154  gcc/testsuite/gcc.dg/debug/dwarf2-2.c
  d3259b89942460cf03b1158fd923a48d  gcc/testsuite/gcc.dg/debug/dwarf2/align-1.c
--- 33202,33208 ----
  16edfbc8489f8d2648184f4d56272f9a  gcc/testsuite/gcc.dg/debug/debug-5.c
  3a93989c56d211b178b4ce1cb7b8db55  gcc/testsuite/gcc.dg/debug/debug-6.c
  92ca009107fd3047af0ed6bffbcf92f2  gcc/testsuite/gcc.dg/debug/debug-7.c
! 94b52bdb30dd953c0873b5d99cb8cc9a  gcc/testsuite/gcc.dg/debug/debug.exp
  900fe69daa3b56214378610d534c3e53  gcc/testsuite/gcc.dg/debug/dwarf2-1.c
  9cf87b67a0fe641563a13455b49c7154  gcc/testsuite/gcc.dg/debug/dwarf2-2.c
  d3259b89942460cf03b1158fd923a48d  gcc/testsuite/gcc.dg/debug/dwarf2/align-1.c
*************** e7756d5b15ebe09f2b877683e2fe9063  gcc/te
*** 31240,31245 ****
--- 33213,33222 ----
  539e627d4b4e5830d219db589112b93b  gcc/testsuite/gcc.dg/debug/dwarf2/align-6.c
  3da74019bd161498c18f72b0cf13544e  gcc/testsuite/gcc.dg/debug/dwarf2/align-as-1.c
  960684a8cdd6ba444e70021a855ed3bc  gcc/testsuite/gcc.dg/debug/dwarf2/aranges-fnsec-1.c
+ 9246faab0f66f1e81e013645ae0d75d4  gcc/testsuite/gcc.dg/debug/dwarf2/array-0.c
+ 1739a83d1b73c28f343a4438c9128988  gcc/testsuite/gcc.dg/debug/dwarf2/array-1.c
+ 5ea4d0d2f795491ea60b41735df2f7a5  gcc/testsuite/gcc.dg/debug/dwarf2/array-2.c
+ 0e64b25190d2e094e866021878f5fbba  gcc/testsuite/gcc.dg/debug/dwarf2/array-3.c
  8cc6fb816730c11f809e5cba3b6d5fd4  gcc/testsuite/gcc.dg/debug/dwarf2/asm-line1.c
  82c2b5501555b8cf310ac6a2ff79d0ca  gcc/testsuite/gcc.dg/debug/dwarf2/atomic.c
  7daec8af89f4336866b06386f75d4bc4  gcc/testsuite/gcc.dg/debug/dwarf2/c99-typedef1.c
*************** fbe375bf9288bf092b7cef1996c14a1f  gcc/te
*** 31264,31280 ****
  41463d28a9bbf97a554feb4c959fed01  gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2-3.h
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! 79368698dabec792181c8c8af03cf97c  gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2.exp
  362aa298514051f8a5b0ce8f2e1ee91a  gcc/testsuite/gcc.dg/debug/dwarf2/enum-loc1.c
! df0398ce911b16a3879ef84b4fb203b7  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-any.c
  f7dc86f08b2d23f2ec144956f62a155d  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-any.h
! f915f7b331d7ac0dcfe492563bb9395a  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-baseonly.c
  f7dc86f08b2d23f2ec144956f62a155d  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-baseonly.h
! 4af842aa9762220dde9d252d8d33d4d6  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-none.c
  f7dc86f08b2d23f2ec144956f62a155d  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-none.h
! ce7dd771326f92548dfdc5da56aab947  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-reduced.c
  f7dc86f08b2d23f2ec144956f62a155d  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-reduced.h
! 16904c87e23c57a6df35b729d88d0fe7  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-sys.c
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  70fb7d2db15a4cf8bf70176e041f380f  gcc/testsuite/gcc.dg/debug/dwarf2/fesd.h
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--- 33241,33257 ----
  41463d28a9bbf97a554feb4c959fed01  gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2-3.h
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! ed0bdc80f99a199f13feb82dff81a1d7  gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2.exp
  362aa298514051f8a5b0ce8f2e1ee91a  gcc/testsuite/gcc.dg/debug/dwarf2/enum-loc1.c
! 59c839cb709f2082c72d622c16f665f4  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-any.c
  f7dc86f08b2d23f2ec144956f62a155d  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-any.h
! e62207c9bcee086e2022ba48d7504d0c  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-baseonly.c
  f7dc86f08b2d23f2ec144956f62a155d  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-baseonly.h
! c13c9503afee9ef6e1de6a4b8fd1f364  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-none.c
  f7dc86f08b2d23f2ec144956f62a155d  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-none.h
! faf82887b5e56be2d56fb8155b035c2f  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-reduced.c
  f7dc86f08b2d23f2ec144956f62a155d  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-reduced.h
! 8af51941cf1a8d5f75f289196dade367  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-sys.c
  f7dc86f08b2d23f2ec144956f62a155d  gcc/testsuite/gcc.dg/debug/dwarf2/fesd-sys.h
  70fb7d2db15a4cf8bf70176e041f380f  gcc/testsuite/gcc.dg/debug/dwarf2/fesd.h
  f30a377973368d1a41bc4f8e2a0e33e9  gcc/testsuite/gcc.dg/debug/dwarf2/global-used-types.c
*************** cfefd61a4eb768d07be5d7d9490c6bd2  gcc/te
*** 31318,31329 ****
  eb3e8d32cc98a65b9bf903f485425719  gcc/testsuite/gcc.dg/debug/dwarf2/pr66482.c
  f03dc9944066917662e80164971b7db3  gcc/testsuite/gcc.dg/debug/dwarf2/pr71855.c
  adcb04100f301278ba60a4cc3b3966e4  gcc/testsuite/gcc.dg/debug/dwarf2/pr80263.c
! c40ede10912fa004a4b7a417b98ff9db  gcc/testsuite/gcc.dg/debug/dwarf2/pr82718-1.c
! de84570955415eead8a296933c9380f6  gcc/testsuite/gcc.dg/debug/dwarf2/pr82718-2.c
  3f29e44d89e997eeb82f5afeb78eae95  gcc/testsuite/gcc.dg/debug/dwarf2/pr82837.c
  0a52355a89828d23137be0ce6f862a91  gcc/testsuite/gcc.dg/debug/dwarf2/pr86964.c
  1bff38cec757d342eff63c6e599cd06a  gcc/testsuite/gcc.dg/debug/dwarf2/pr88635.c
  3fe83570daf6a275058d5254e5811a58  gcc/testsuite/gcc.dg/debug/dwarf2/pr88644.c
  04ed708ea8db6a152acb5ebe98de283b  gcc/testsuite/gcc.dg/debug/dwarf2/prod-options.c
  84c94e8435cec0cb1a4a8e83a9c3633d  gcc/testsuite/gcc.dg/debug/dwarf2/short-circuit.c
  fd5753c0c85e2e3c862b46c2f851ad80  gcc/testsuite/gcc.dg/debug/dwarf2/sso-1.c
--- 33295,33308 ----
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! 1cf911d01bc2c994d2a07f737953584a  gcc/testsuite/gcc.dg/debug/dwarf2/pr82718-1.c
! a0e45b136bc1a3039b9214576e8d8072  gcc/testsuite/gcc.dg/debug/dwarf2/pr82718-2.c
  3f29e44d89e997eeb82f5afeb78eae95  gcc/testsuite/gcc.dg/debug/dwarf2/pr82837.c
  0a52355a89828d23137be0ce6f862a91  gcc/testsuite/gcc.dg/debug/dwarf2/pr86964.c
  1bff38cec757d342eff63c6e599cd06a  gcc/testsuite/gcc.dg/debug/dwarf2/pr88635.c
  3fe83570daf6a275058d5254e5811a58  gcc/testsuite/gcc.dg/debug/dwarf2/pr88644.c
+ 0a9ec3f245a699fc382f6c01f2a0dfc1  gcc/testsuite/gcc.dg/debug/dwarf2/pr93751-1.c
+ 22969d5136ad5d2620d957786d4185b3  gcc/testsuite/gcc.dg/debug/dwarf2/pr93751-2.c
  04ed708ea8db6a152acb5ebe98de283b  gcc/testsuite/gcc.dg/debug/dwarf2/prod-options.c
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  fd5753c0c85e2e3c862b46c2f851ad80  gcc/testsuite/gcc.dg/debug/dwarf2/sso-1.c
*************** cfd09bc6ab94deff89da0b2f33da544d  gcc/te
*** 31336,31342 ****
  ca27b118a8f01285a381ac42b5dcdcaa  gcc/testsuite/gcc.dg/debug/dwarf2/struct-loc1.c
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  69e64f492a931622722ac6c811569e62  gcc/testsuite/gcc.dg/debug/dwarf2/var2.c
! 479930fb5faf8196de02f2765efd234d  gcc/testsuite/gcc.dg/debug/enum-1.c
  bdf39999a5a7a4c7b1459600dff4ff14  gcc/testsuite/gcc.dg/debug/pr16676.c
  6f8e864ca7f9c38a79c3578b2c75101b  gcc/testsuite/gcc.dg/debug/pr26881.c
  feb6dc1d570a59982f88a912985ff2fa  gcc/testsuite/gcc.dg/debug/pr29558.c
--- 33315,33321 ----
  ca27b118a8f01285a381ac42b5dcdcaa  gcc/testsuite/gcc.dg/debug/dwarf2/struct-loc1.c
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! d11dcc4e37738beb9e8be03ce7630c35  gcc/testsuite/gcc.dg/debug/enum-1.c
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  feb6dc1d570a59982f88a912985ff2fa  gcc/testsuite/gcc.dg/debug/pr29558.c
*************** f83af2708ba44addea950f47d1a44c95  gcc/te
*** 31373,31379 ****
  f04843ea87c9c55accf161e9ee241f15  gcc/testsuite/gcc.dg/debug/pr66432.c
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  60c3f3165dda429cbc7646a06969d16c  gcc/testsuite/gcc.dg/debug/redecl-2.c
--- 33352,33358 ----
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! 067b1f11792d11ac95c4950051ac7aac  gcc/testsuite/gcc.dg/debug/pr85252.c
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*************** f50cc26d9a41a3cc4afb62032326372f  gcc/te
*** 31385,31391 ****
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! 5bab5c80196e05f60c7adc814628848f  gcc/testsuite/gcc.dg/decl-1.c
  407c5e9a3a8e6d13d9f6a04e9d1433dc  gcc/testsuite/gcc.dg/decl-10.c
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--- 33364,33370 ----
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  5c592dfc276c2061aab2b00e44dedbbe  gcc/testsuite/gcc.dg/debug/vta-3.c
! fe4f7598fb07f78d4226aeab645c3799  gcc/testsuite/gcc.dg/decl-1.c
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*************** f0ae4245e06f4788c24978a3b8a12df6  gcc/te
*** 31442,31452 ****
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! 1615d851b95e89da4a91edc5146b014a  gcc/testsuite/gcc.dg/dfp/cast-bad.c
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! f033f97e544d92f5e13f8a9eb2a587d8  gcc/testsuite/gcc.dg/dfp/constants-c99.c
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! a79af484d64f4ace22490ef7facb9c69  gcc/testsuite/gcc.dg/dfp/constants-pedantic.c
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--- 33421,33443 ----
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! 542b4e7b047bab0dc3ccb2eb7cd05a9a  gcc/testsuite/gcc.dg/dfp/c11-constants-1.c
! 91ec220473fc03967412473ff58122cc  gcc/testsuite/gcc.dg/dfp/c11-constants-2.c
! 1a562bd8085040570e6cc2e227128694  gcc/testsuite/gcc.dg/dfp/c11-keywords-1.c
! cf8bc786843fa5b2fd0c45ad86131bbb  gcc/testsuite/gcc.dg/dfp/c11-keywords-2.c
! cd4c4e5c57b8677aa612ac108325bec1  gcc/testsuite/gcc.dg/dfp/c2x-builtins-dfp-1.c
! 4a688fd5a3259df491dcdf1f982185e2  gcc/testsuite/gcc.dg/dfp/c2x-constants-1.c
! efe3f3991a7d9f3ec4e1fa44d8e69924  gcc/testsuite/gcc.dg/dfp/c2x-constants-2.c
! 7f6ee6a620379941fa2b8e44acc05ecf  gcc/testsuite/gcc.dg/dfp/c2x-float-dfp-1.c
! df6bbc8f4a494f18ad1e51f53bcfd58c  gcc/testsuite/gcc.dg/dfp/c2x-float-dfp-2.c
! 1387cf7a470c6add4d2d07cc5e58d297  gcc/testsuite/gcc.dg/dfp/c2x-float-dfp-3.c
! 0379e71a7cf1b285ffef8b4dde5594dd  gcc/testsuite/gcc.dg/dfp/c2x-keywords-1.c
! ffc58943af7de130d10bfd3f57045f1e  gcc/testsuite/gcc.dg/dfp/c2x-keywords-2.c
! 8d5e21e8c81c2782dea6a23e88335770  gcc/testsuite/gcc.dg/dfp/cast-bad.c
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! 3c65f46a3ffe17287ae9c6467e54c161  gcc/testsuite/gcc.dg/dfp/constants-c99.c
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! 147e4fc0ca2998ab61a5ea632ce3d638  gcc/testsuite/gcc.dg/dfp/constants-pedantic.c
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  feefe9e10c38db7c27ceff2fee10fa7f  gcc/testsuite/gcc.dg/dfp/convert-complex.c
  677218843476e01173452d6d2085797b  gcc/testsuite/gcc.dg/dfp/convert-dfp-round-thread.c
*************** dfe075c7272c802e4c6f44b1a66f1302  gcc/te
*** 31459,31465 ****
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  aadafbfd9e0540666c99d31e72e91f96  gcc/testsuite/gcc.dg/dfp/dfp-round.h
! 559a5237bbe8898db4cdc11967265ec9  gcc/testsuite/gcc.dg/dfp/dfp.exp
  0daf957dbef663389abca329acc1d74c  gcc/testsuite/gcc.dg/dfp/fe-binop.c
  dc5f56a82263868da11e7d3a3e80a8c8  gcc/testsuite/gcc.dg/dfp/fe-check.h
  e014b3254e79531d97833550fdb2486d  gcc/testsuite/gcc.dg/dfp/fe-convert-1.c
--- 33450,33456 ----
  4004acaaacb54ecad2e0c6ee8e8224d5  gcc/testsuite/gcc.dg/dfp/dfp-dbg.h
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  aadafbfd9e0540666c99d31e72e91f96  gcc/testsuite/gcc.dg/dfp/dfp-round.h
! 4b7e6e79df9551ab2a37c627eac6817c  gcc/testsuite/gcc.dg/dfp/dfp.exp
  0daf957dbef663389abca329acc1d74c  gcc/testsuite/gcc.dg/dfp/fe-binop.c
  dc5f56a82263868da11e7d3a3e80a8c8  gcc/testsuite/gcc.dg/dfp/fe-check.h
  e014b3254e79531d97833550fdb2486d  gcc/testsuite/gcc.dg/dfp/fe-convert-1.c
*************** ae11ecbb18b43c27858d0c6dadfe07d3  gcc/te
*** 31467,31475 ****
  a0ac850750aaa6f8934dd8d86cad48b3  gcc/testsuite/gcc.dg/dfp/fe-convert-3.c
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  9dfa3c1e56f8b505a4ce8023830b3bf1  gcc/testsuite/gcc.dg/dfp/floatn.c
! dadf3ffd264a8aa4075042e754d622a2  gcc/testsuite/gcc.dg/dfp/keywords-c89.c
! 5bb5f0b88aa439d2f1a008ffe35fb88b  gcc/testsuite/gcc.dg/dfp/keywords-c99.c
! 77dd6546ac15e46ce1822a647a4bdd9d  gcc/testsuite/gcc.dg/dfp/keywords-ignored-c99.c
  9d75f75471d15ad9eab797c65fe24337  gcc/testsuite/gcc.dg/dfp/keywords-pedantic.c
  5f9dce48038ce1ba660b96e948792422  gcc/testsuite/gcc.dg/dfp/keywords-reserved.c
  440b3f562b43525babe2c96be973d1be  gcc/testsuite/gcc.dg/dfp/operator-bitwise.c
--- 33458,33465 ----
  a0ac850750aaa6f8934dd8d86cad48b3  gcc/testsuite/gcc.dg/dfp/fe-convert-3.c
  8c93ba27dd3f1398726001c48e3c892d  gcc/testsuite/gcc.dg/dfp/float-constant-double.c
  9dfa3c1e56f8b505a4ce8023830b3bf1  gcc/testsuite/gcc.dg/dfp/floatn.c
! 756b8ddff2151110bae6465f67fe36a7  gcc/testsuite/gcc.dg/dfp/keywords-c89.c
! 41a3316298115612aac250cdc4faaa30  gcc/testsuite/gcc.dg/dfp/keywords-c99.c
  9d75f75471d15ad9eab797c65fe24337  gcc/testsuite/gcc.dg/dfp/keywords-pedantic.c
  5f9dce48038ce1ba660b96e948792422  gcc/testsuite/gcc.dg/dfp/keywords-reserved.c
  440b3f562b43525babe2c96be973d1be  gcc/testsuite/gcc.dg/dfp/operator-bitwise.c
*************** b59fd600db434af135f39c38e21e2d74  gcc/te
*** 31482,31487 ****
--- 33472,33478 ----
  c053aa0fe966658d9b764751ff182aec  gcc/testsuite/gcc.dg/dfp/pr70052.c
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  50575ec38c59c6b980aca7669cc3acd1  gcc/testsuite/gcc.dg/dfp/pr79515.c
+ f521fd59dbf58c0c28181f31c6ad5742  gcc/testsuite/gcc.dg/dfp/pr94111.c
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  f81a9ab3a0212214f904c0cc2fe02024  gcc/testsuite/gcc.dg/dfp/pragma-float-const-decimal64-3.c
*************** c4ae53fbbcd9d3b56331a7c22e10ef30  gcc/te
*** 31491,31515 ****
  b0c7fad30358bd68d369a65e68dfdd27  gcc/testsuite/gcc.dg/dfp/pragma-float-const-decimal64-7.c
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! a672b67ea3d6373cca8ac5aa04130b9e  gcc/testsuite/gcc.dg/dfp/warn-abs-2.c
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! 142b942f0e0d8123e152c4ac61761e48  gcc/testsuite/gcc.dg/dg.exp
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! e9f7798e943e778edb8b21001cfec7f7  gcc/testsuite/gcc.dg/diag-aka-1.c
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  1850e51342e1e31dc6cc8847d0bd4192  gcc/testsuite/gcc.dg/diagnostic-ranges-1.c
! 7770b7dbc80211795e08f3f5fc058a7c  gcc/testsuite/gcc.dg/diagnostic-token-ranges.c
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--- 33482,33513 ----
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! 034e91f8d262e00b27763ec15c59df1d  gcc/testsuite/gcc.dg/diag-aka-1.c
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  1850e51342e1e31dc6cc8847d0bd4192  gcc/testsuite/gcc.dg/diagnostic-ranges-1.c
! 532b50c735d0ca4cdd7c547d51fef8e1  gcc/testsuite/gcc.dg/diagnostic-token-ranges.c
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  acf65d30040d30d5a4ea7bb09731753b  gcc/testsuite/gcc.dg/div-cmp-1.c
*************** b4f00b2d0fc854a9c192873f0ebeeaa5  gcc/te
*** 31573,31584 ****
  e1fe0207f459d8843a756d7853ebc94b  gcc/testsuite/gcc.dg/enum-const-1.c
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! c098ce6d3967a1bd0e4ccb722d146dd8  gcc/testsuite/gcc.dg/enum-incomplete-1.c
  e1a25092b7fa813c201254ce6dea1206  gcc/testsuite/gcc.dg/enum-incomplete-2.c
! 9b340d58dada7443bbab1624892cd608  gcc/testsuite/gcc.dg/enum-incomplete-3.c
  c797d89ab4b78b34bf33208a3b895993  gcc/testsuite/gcc.dg/enum-incomplete-4.c
! 4e37464d96a7d1fe60d8d14ebfc96130  gcc/testsuite/gcc.dg/enum-mode-1.c
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  36d60a18cc2d81c2f3553d9d74463b9e  gcc/testsuite/gcc.dg/enum2.c
  2fced693aa6aaf7f0a1c26e95d86359f  gcc/testsuite/gcc.dg/enum3.c
--- 33571,33583 ----
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! df0f09b63229a909b698c4259603d848  gcc/testsuite/gcc.dg/enum-incomplete-1.c
  e1a25092b7fa813c201254ce6dea1206  gcc/testsuite/gcc.dg/enum-incomplete-2.c
! 371d3b30d57d310a7ae27f30bf1acb77  gcc/testsuite/gcc.dg/enum-incomplete-3.c
  c797d89ab4b78b34bf33208a3b895993  gcc/testsuite/gcc.dg/enum-incomplete-4.c
! 52ca64b538b01c5318d188c0449f6f0e  gcc/testsuite/gcc.dg/enum-mode-1.c
  7fbd36353cc5ef8bd8f3246f29023a37  gcc/testsuite/gcc.dg/enum-mode-2.c
+ 1efd75aa95edcb88e434d94ab7ab5c81  gcc/testsuite/gcc.dg/enum-redef-1.c
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  2fced693aa6aaf7f0a1c26e95d86359f  gcc/testsuite/gcc.dg/enum3.c
*************** c54a3052ec2d03b003a96b460fc1509c  gcc/te
*** 31593,31600 ****
  635a708f0d3160a61cc28f440b7af0d5  gcc/testsuite/gcc.dg/fail_always_inline2.c
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  2bc0342a25d7d1e316ce2fb511a55ca2  gcc/testsuite/gcc.dg/fastmath-1.c
! 7b41a375cde5b5d035434a4e4ad7e13c  gcc/testsuite/gcc.dg/fdata-sections-1.c
! 6c82df0e72ba66b2568b3cc8424d773a  gcc/testsuite/gcc.dg/fdata-sections-2.c
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--- 33592,33599 ----
  635a708f0d3160a61cc28f440b7af0d5  gcc/testsuite/gcc.dg/fail_always_inline2.c
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*************** af315092d026865340052aee7b9849a3  gcc/te
*** 31620,31626 ****
  11f3b667f90a009058a0bbb781d75c33  gcc/testsuite/gcc.dg/fixed-point/convert-sat.c
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  4d465f534ba6b0040d0b907de70eb06d  gcc/testsuite/gcc.dg/fixed-point/define.c
! cfed08cceed41fc43c3626df0a4df6b5  gcc/testsuite/gcc.dg/fixed-point/fixed-point.exp
  7172d69a38fc3346148178e2346509cf  gcc/testsuite/gcc.dg/fixed-point/func-array.c
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--- 33619,33625 ----
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! 4f328ef4e92bd45e5591ef0f666367fe  gcc/testsuite/gcc.dg/fixed-point/fixed-point.exp
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*************** f8e7a49cc4f98c63f2c403f60a4bed9b  gcc/te
*** 31659,31669 ****
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! a0184847dccb98a00a3beaa4beee6911  gcc/testsuite/gcc.dg/float-range-5.c
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--- 33658,33668 ----
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! e323abf76581df8eff2b6dfb0b18f852  gcc/testsuite/gcc.dg/float-range-4.c
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*************** bfaa6b3a6e5de108258c8a51ca88aff8  gcc/te
*** 31686,31692 ****
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! 859b53bbbef4375ed9196243c9a0a3fd  gcc/testsuite/gcc.dg/fltconst-pedantic-dfp.c
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--- 33685,33691 ----
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*************** ef996b86a085ad039dc5e5799132ffe1  gcc/te
*** 31770,31776 ****
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--- 33769,33775 ----
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*************** fd0fed4c372f03e7cb66f4d19c80e7b6  gcc/te
*** 31814,31819 ****
--- 33813,33819 ----
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*************** d48360a30dc24fbd67e388a9848b02d3  gcc/te
*** 31837,31844 ****
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--- 33837,33844 ----
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*************** cc927069618148e60b10281c4a02e41a  gcc/te
*** 31852,31861 ****
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! 25af9ca9d25acd52cb52b35a291cad2c  gcc/testsuite/gcc.dg/format/format.exp
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--- 33852,33862 ----
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! 5bcad5353bd6b19068568807bdda7b7c  gcc/testsuite/gcc.dg/format/format.exp
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*************** d485cdf7af6d505f7224c28e47668766  gcc/te
*** 31927,31933 ****
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--- 33928,33934 ----
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*************** e7a25a12dae650e03485cd984a177acc  gcc/te
*** 31956,31968 ****
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--- 33957,33971 ----
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*************** cfde414df06a7d559244461a11116f3a  gcc/te
*** 31975,31981 ****
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--- 33978,33984 ----
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*************** ca06a5a1882aae4d955d440340256528  gcc/te
*** 31995,32001 ****
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--- 33998,34004 ----
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*************** b0673f5a8ea7f6d8ab94cef37553271a  gcc/te
*** 32030,32036 ****
--- 34033,34047 ----
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*************** f19ba5ec082add7d45bee659e0ca766a  gcc/te
*** 32046,32057 ****
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--- 34057,34074 ----
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*************** ae8f65ff46d5c742b9d555f0c48fdbe3  gcc/te
*** 32067,32075 ****
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--- 34084,34092 ----
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! 4c517cd5d51dacde490134dc952b2349  gcc/testsuite/gcc.dg/goacc-gomp/goacc-gomp.exp
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! 53e112735e46d20018e96b668e991e9f  gcc/testsuite/gcc.dg/goacc/goacc.exp
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*************** dbf4fad9a516a5e21a83632a1bc47d48  gcc/te
*** 32145,32150 ****
--- 34162,34169 ----
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  f27de0628e77fcd4c557b16b4b5e48e7  gcc/testsuite/gcc.dg/gomp/declare-simd-5.c
+ d9fdf9f47a3764723441a571868d9cba  gcc/testsuite/gcc.dg/gomp/declare-variant-1.c
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  4cbde8501b67eb0634877343d20eda34  gcc/testsuite/gcc.dg/gomp/dump-new-function-2.c
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  da3311b0af85a7a45f6b528ac08bee72  gcc/testsuite/gcc.dg/gomp/dump-new-function.c
*************** d04c18e8518877b08e0371599b6643ed  gcc/te
*** 32175,32187 ****
  80a82ac0d4faa464e36b67b133df4697  gcc/testsuite/gcc.dg/gomp/for-7.c
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! 599caa46556a5f79dbb0b05f035b2d34  gcc/testsuite/gcc.dg/gomp/gomp.exp
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  0d468ea6d8d3343f4663748bf3bf83ac  gcc/testsuite/gcc.dg/gomp/macro-3.c
! ba975959f8f25bf92fec71babed9c6cb  gcc/testsuite/gcc.dg/gomp/macro-4.c
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--- 34194,34206 ----
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! d1f9f9182d108dadf774c1c098f4c3d0  gcc/testsuite/gcc.dg/gomp/gomp.exp
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  0d468ea6d8d3343f4663748bf3bf83ac  gcc/testsuite/gcc.dg/gomp/macro-3.c
! d77e47d829660c96c43f189c259292a5  gcc/testsuite/gcc.dg/gomp/macro-4.c
  9dff449fe2d97c4b3ade07b982e69364  gcc/testsuite/gcc.dg/gomp/master-1.c
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*************** ef3626bfd9a01c1b3e4b0d6ca7d55c1a  gcc/te
*** 32290,32298 ****
--- 34309,34319 ----
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  ee48ac12f6aa280cf17765633b31f541  gcc/testsuite/gcc.dg/gomp/reduction-2.c
+ 33c731ef229e9ead8add30118b091469  gcc/testsuite/gcc.dg/gomp/requires-1.c
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*************** d52311b9c131d936e432ecb0ead28e52  gcc/te
*** 32398,32404 ****
  5e3ef65d649f9a7d1c1d6819a2188844  gcc/testsuite/gcc.dg/graphite/block-pr47654.c
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! 9bcca35c0fe6b5b19035d4dcc7be4c2d  gcc/testsuite/gcc.dg/graphite/graphite.exp
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--- 34419,34425 ----
  5e3ef65d649f9a7d1c1d6819a2188844  gcc/testsuite/gcc.dg/graphite/block-pr47654.c
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  63d4a7071763336f82d3784cd09338d4  gcc/testsuite/gcc.dg/graphite/fuse-2.c
! 12cac57428ac6b4aff1022c3ec3ea8ec  gcc/testsuite/gcc.dg/graphite/graphite.exp
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*************** af48655e5f061cbdf9238d301020a18b  gcc/te
*** 32440,32461 ****
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! 68b89bf29e22abcaba2a12b6b3a8856f  gcc/testsuite/gcc.dg/graphite/interchange-7.c
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! 0616bab9bd12028524183a4b13ccaab2  gcc/testsuite/gcc.dg/graphite/interchange-9.c
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--- 34461,34482 ----
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! e3b941c9833555a9a6528de3ab0f6803  gcc/testsuite/gcc.dg/graphite/interchange-10.c
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! e1a06dc641741772d8a53ecec535ed89  gcc/testsuite/gcc.dg/graphite/interchange-3.c
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! 80034d428be7425cb374cdfa478cd828  gcc/testsuite/gcc.dg/graphite/interchange-7.c
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! 9b3cee3a6d3dad9f8877c673ef4ad49f  gcc/testsuite/gcc.dg/graphite/interchange-9.c
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  0203f89b78d5ee94669f5dbe0da89ebc  gcc/testsuite/gcc.dg/graphite/isl-ast-gen-blocks-2.c
*************** a3981933152f6a2099ff09aa69a4a6fb  gcc/te
*** 32620,32625 ****
--- 34641,34647 ----
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  84a75a861553ce658d85018a3ced0a6b  gcc/testsuite/gcc.dg/graphite/run-id-3.c
*************** feac58c07ea88b458d8c4c9d4d390f09  gcc/te
*** 32647,32653 ****
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--- 34669,34675 ----
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*************** fa02fe6e788657000488a0d689776a7c  gcc/te
*** 32670,32676 ****
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--- 34692,34698 ----
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  b84e7258567e417386bb492270b2e4a1  gcc/testsuite/gcc.dg/guality/asm-1.c
*************** b9aafcde73d659e8a8f12aec94a7cb09  gcc/te
*** 32682,32689 ****
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! e14b8630892b46b6b7f30a055f90ae9b  gcc/testsuite/gcc.dg/guality/guality.exp
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--- 34704,34711 ----
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! ad3832865ce6297602ae5c702ff44e94  gcc/testsuite/gcc.dg/guality/guality.exp
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*************** e7dd4b85c878db0844a2af69bc853d37  gcc/te
*** 32742,32748 ****
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--- 34764,34770 ----
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*************** a7fd762dc34522882305feff890fdc31  gcc/te
*** 32759,32764 ****
--- 34781,34787 ----
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*************** bdc8809d518559f6663621234f706c41  gcc/te
*** 32773,32780 ****
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! a977571681cca445a9e5733ba71c5de0  gcc/testsuite/gcc.dg/hex-round-2.c
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--- 34796,34803 ----
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  8362a750404465eb1e33b9cb8cae1881  gcc/testsuite/gcc.dg/header.c
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*************** c686dca1473baeadaf2f166d4c96e4ef  gcc/te
*** 32805,32813 ****
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--- 34828,34836 ----
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*************** c98bd8084443af9809a9b85283a91966  gcc/te
*** 32886,32891 ****
--- 34909,34915 ----
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*************** dbb9508e584dea250f29a4f07a0c7ada  gcc/te
*** 32907,32914 ****
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--- 34931,34939 ----
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*************** b23171d1fac1f82e590a6e196db0996d  gcc/te
*** 32921,32968 ****
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--- 34946,34998 ----
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*************** f18e2b83422d97d0681e4e9f878b894f  gcc/te
*** 32982,33008 ****
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--- 35012,35049 ----
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*************** b30637ee2dfddd2f33e1f6f41de2efa3  gcc/te
*** 33010,33016 ****
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--- 35051,35057 ----
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*************** baad5c5c14597e8920562a8b7b33d1e4  gcc/te
*** 33037,33059 ****
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--- 35078,35100 ----
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*************** c5a982844b74e3d73d7511fd2cb5ce36  gcc/te
*** 33065,33070 ****
--- 35106,35122 ----
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*************** fe61754d682bd3ea724a03bb59912cfc  gcc/te
*** 33073,33083 ****
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--- 35125,35135 ----
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*************** e402d8a4110cdc5175efd8b02599244a  gcc/te
*** 33085,33098 ****
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--- 35137,35150 ----
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*************** ae7bcf6f4a20a62efe1f640c131c15cb  gcc/te
*** 33111,33116 ****
--- 35163,35169 ----
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*************** e7b1fc712a9df56b68ad7360bf67c164  gcc/te
*** 33133,33150 ****
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--- 35186,35203 ----
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*************** e81d04faee8838d4f176f04b73de78ae  gcc/te
*** 33152,33158 ****
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--- 35205,35211 ----
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*************** cce94457b548515e70bc69826b9eed66  gcc/te
*** 33222,33228 ****
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*************** e8dfd64284c72fe324ce46b89c304443  gcc/te
*** 33295,33301 ****
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--- 35348,35354 ----
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*************** a7add68c69c48bffecd543855bc97366  gcc/te
*** 33306,33315 ****
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--- 35359,35369 ----
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*************** e22501e605edeaceeca043b437e49ba9  gcc/te
*** 33322,33328 ****
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*************** f0cc31467a1c670b2da39f6277514bab  gcc/te
*** 33349,33355 ****
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--- 35403,35409 ----
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*************** f2ca7f47966827f94f5a77e51e70d147  gcc/te
*** 33358,33364 ****
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--- 35412,35418 ----
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*************** ebb801f97326701c44c33bb719490703  gcc/te
*** 33423,33439 ****
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--- 35477,35506 ----
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*************** c51c424cae679b65a2dc52ea3ddc96d9  gcc/te
*** 33441,33446 ****
--- 35508,35514 ----
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*************** a9c2bd4786300d7cf805e7ef57335a2c  gcc/te
*** 33454,33460 ****
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--- 35522,35528 ----
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! 8e6769f9d74d9d0099ca1a2532fd72e8  gcc/testsuite/gcc.dg/memcpy-2.c
  d2e1206d26231777e76c9f21d67f4425  gcc/testsuite/gcc.dg/memcpy-3.c
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  a41ae21b628c0476195ce6dac94a92e9  gcc/testsuite/gcc.dg/memcpy-5.c
*************** df86d2e35482e1af461f8b264fb6bbd6  gcc/te
*** 33472,33478 ****
  f95475da948bd44dcc9bae1ad2414546  gcc/testsuite/gcc.dg/misaligned-expand-1.c
  6410d45d6ed38a3521f96d65e24a2af8  gcc/testsuite/gcc.dg/misaligned-expand-2.c
  923683a8c110499ae2eb20741b12c036  gcc/testsuite/gcc.dg/misaligned-expand-3.c
! 2c50e13470c7a68e653e769b73d77757  gcc/testsuite/gcc.dg/misc-column.c
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--- 35540,35546 ----
  f95475da948bd44dcc9bae1ad2414546  gcc/testsuite/gcc.dg/misaligned-expand-1.c
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  923683a8c110499ae2eb20741b12c036  gcc/testsuite/gcc.dg/misaligned-expand-3.c
! 57628fdb5f5ff0b073fc5593a705ec5d  gcc/testsuite/gcc.dg/misc-column.c
  6e919fe3137d37dd15559904d67a97d2  gcc/testsuite/gcc.dg/mismatch-decl-1.c
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  1985016e3939b7a19fcb706dace00051  gcc/testsuite/gcc.dg/missing-field-init-2.c
*************** c277f277d0df3dd537cf20409167e023  gcc/te
*** 33507,33513 ****
  a43584a2eaad726a7d3c7a5adf915002  gcc/testsuite/gcc.dg/nested-func-9.c
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  3c81a033e732e84a3e88876d96ab1aaf  gcc/testsuite/gcc.dg/nextafter-1.c
! e18f5e20a50d23af54cdd712734508e6  gcc/testsuite/gcc.dg/nextafter-2.c
  3ccb5f1eba3e08b1f570b976cd81bc4e  gcc/testsuite/gcc.dg/nextafter-3.c
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--- 35575,35581 ----
  a43584a2eaad726a7d3c7a5adf915002  gcc/testsuite/gcc.dg/nested-func-9.c
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  3c81a033e732e84a3e88876d96ab1aaf  gcc/testsuite/gcc.dg/nextafter-1.c
! e5dd77e4a95f6b53d5c1d74ae5f07ba2  gcc/testsuite/gcc.dg/nextafter-2.c
  3ccb5f1eba3e08b1f570b976cd81bc4e  gcc/testsuite/gcc.dg/nextafter-3.c
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  e8255bac3070048e52262e26f2c7ed89  gcc/testsuite/gcc.dg/no-asm-1.c
*************** a147f3e7709103de771c96fda2d5b9f5  gcc/te
*** 33526,33532 ****
  f6f749bfbd33a9e9e95102c823d14bb8  gcc/testsuite/gcc.dg/no-strict-overflow-6.c
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  5a420286281e2790c2a3c0f4f6987137  gcc/testsuite/gcc.dg/no-strict-overflow-8.c
! 6b18bcb9aaee5809369b743def89dc87  gcc/testsuite/gcc.dg/no_profile_instrument_function-attr-1.c
  4142b2322a75b23f47a3f63e7bf6f75f  gcc/testsuite/gcc.dg/nodfp-1.c
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--- 35594,35600 ----
  f6f749bfbd33a9e9e95102c823d14bb8  gcc/testsuite/gcc.dg/no-strict-overflow-6.c
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! 6aa2bab2227fba96845ccecd6d5391ff  gcc/testsuite/gcc.dg/no_profile_instrument_function-attr-1.c
  4142b2322a75b23f47a3f63e7bf6f75f  gcc/testsuite/gcc.dg/nodfp-1.c
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  ec19a8b1730f75c32f41e4a1b24c99f8  gcc/testsuite/gcc.dg/nofixed-point-2.c
*************** c12474a7bd9d8234bbe400c5fd2be7ad  gcc/te
*** 33570,33576 ****
  1b2bc08a1a268520d0499de7a83200fa  gcc/testsuite/gcc.dg/noncompile/const-ll-1.c
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! b4e6e1127af25431d3d71a0766dd3990  gcc/testsuite/gcc.dg/noncompile/incomplete-3.c
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--- 35638,35644 ----
  1b2bc08a1a268520d0499de7a83200fa  gcc/testsuite/gcc.dg/noncompile/const-ll-1.c
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! c1aa2d30f3e4d1579a26a453fc08fa73  gcc/testsuite/gcc.dg/noncompile/incomplete-3.c
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  d9f2478bdbe9c4a081a38bc37a06293e  gcc/testsuite/gcc.dg/noncompile/init-1.c
*************** b054d23fd7d868a509aeb363dc7e8ffc  gcc/te
*** 33581,33587 ****
  816b6759ae933f803099070549d0e06e  gcc/testsuite/gcc.dg/noncompile/invalid_asm.c
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! 1c0df3e47bbdc2ae0c1e21d9be5ae8ba  gcc/testsuite/gcc.dg/noncompile/noncompile.exp
  415c039abdab8437275df71102cc5113  gcc/testsuite/gcc.dg/noncompile/old-style-parm-1.c
  6ccdd7958d053743fbd68691650b1b61  gcc/testsuite/gcc.dg/noncompile/old-style-parm-2.c
  dc03b56a3d101a6001179c75ccbd6723  gcc/testsuite/gcc.dg/noncompile/old-style-parm-3.c
--- 35649,35655 ----
  816b6759ae933f803099070549d0e06e  gcc/testsuite/gcc.dg/noncompile/invalid_asm.c
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! bf0cbf532df76d6b0bf410af72572445  gcc/testsuite/gcc.dg/noncompile/noncompile.exp
  415c039abdab8437275df71102cc5113  gcc/testsuite/gcc.dg/noncompile/old-style-parm-1.c
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  dc03b56a3d101a6001179c75ccbd6723  gcc/testsuite/gcc.dg/noncompile/old-style-parm-3.c
*************** e65c0aad11135d5f145655fd963b86e6  gcc/te
*** 33614,33624 ****
  22faeecb9b2619b4c2796b8fd40a3a76  gcc/testsuite/gcc.dg/noncompile/voidparam-1.c
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  2fdfffd14d276c562eff1fc18a7208f3  gcc/testsuite/gcc.dg/nonnull-2.c
! 3875a737264f8a8d48300bc5401c5c3a  gcc/testsuite/gcc.dg/nonnull-3.c
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! 556a1b6b25df858dcac194d7b1b91fd0  gcc/testsuite/gcc.dg/noreorder.c
  3e581c5222a4c527b62118185817b783  gcc/testsuite/gcc.dg/noreorder2.c
  1f49ad7e449f869e870f9d233bd1145d  gcc/testsuite/gcc.dg/noreorder3.c
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--- 35682,35692 ----
  22faeecb9b2619b4c2796b8fd40a3a76  gcc/testsuite/gcc.dg/noncompile/voidparam-1.c
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! 1414cb7b6b57874f3c115c7664ea1719  gcc/testsuite/gcc.dg/nonnull-3.c
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  3aaa6f3029122e1bc2b4026e23e9faf0  gcc/testsuite/gcc.dg/nop.h
! dae2d727f3381a38344f95d1d6efde7a  gcc/testsuite/gcc.dg/noreorder.c
  3e581c5222a4c527b62118185817b783  gcc/testsuite/gcc.dg/noreorder2.c
  1f49ad7e449f869e870f9d233bd1145d  gcc/testsuite/gcc.dg/noreorder3.c
  d4f39b14782b9fcbd5b3abc56f255fe6  gcc/testsuite/gcc.dg/noreorder4.c
*************** e69d82c33002bde0bd49c51d4c9f759d  gcc/te
*** 33629,33638 ****
  255513eee17c367ecb2aa180c0b9e301  gcc/testsuite/gcc.dg/noreturn-5.c
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! 6702cb32a8ffd7e29b34d81e985088b4  gcc/testsuite/gcc.dg/noreturn-8.c
  2d7e4bbcbaeb7ffd35b669f8d07385ed  gcc/testsuite/gcc.dg/nrv1.c
  56ce532d34ce2ff684d6b9198cf42c8f  gcc/testsuite/gcc.dg/nrv2.c
! a4565c20c1da2d0e1fcabb63c948a2b0  gcc/testsuite/gcc.dg/nrv3.c
  0eea359c982a9d95bd326933d03fd9b3  gcc/testsuite/gcc.dg/nrv4.c
  dd2a56aa13124f0f1f70039b34eec9a0  gcc/testsuite/gcc.dg/nrv5.c
  fb2a64e28af210271512e32c8451c2f2  gcc/testsuite/gcc.dg/null-pointer-1.c
--- 35697,35706 ----
  255513eee17c367ecb2aa180c0b9e301  gcc/testsuite/gcc.dg/noreturn-5.c
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  50f990ec1fc044dfc8885d8f24c04564  gcc/testsuite/gcc.dg/noreturn-7.c
! 6be068938c89b2b08d92ab913439ad4f  gcc/testsuite/gcc.dg/noreturn-8.c
  2d7e4bbcbaeb7ffd35b669f8d07385ed  gcc/testsuite/gcc.dg/nrv1.c
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! 7f21c4d6dfc536ed4c0b64cad6a68298  gcc/testsuite/gcc.dg/nrv3.c
  0eea359c982a9d95bd326933d03fd9b3  gcc/testsuite/gcc.dg/nrv4.c
  dd2a56aa13124f0f1f70039b34eec9a0  gcc/testsuite/gcc.dg/nrv5.c
  fb2a64e28af210271512e32c8451c2f2  gcc/testsuite/gcc.dg/null-pointer-1.c
*************** a4430e8a6755e6674402bd05861a1795  gcc/te
*** 33645,33661 ****
  9229783a7729cb3f6f4f0b077a88d856  gcc/testsuite/gcc.dg/optimize-bswapdi-1.c
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! b168306cfb2417f8eac54b102fde90bc  gcc/testsuite/gcc.dg/optimize-bswaphi-1.c
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! 5cded322b280112d1cc9959e6aef1a3b  gcc/testsuite/gcc.dg/optimize-bswapsi-2.c
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  bd8139d78717b2c59fb034414884e732  gcc/testsuite/gcc.dg/optimize-bswapsi-4.c
! 86b2a4d442364b20c0f5a21aadaae7a5  gcc/testsuite/gcc.dg/optimize-bswapsi-5.c
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  52af19ae3928ad977bfd497068f37530  gcc/testsuite/gcc.dg/opts-4.c
! e9af8f53937010b4e45122a89b4a3c96  gcc/testsuite/gcc.dg/opts-5.c
  ffa8781680b14dd532248cb588936ef3  gcc/testsuite/gcc.dg/opts-6.c
  ba65f63dbff65b24afbb672acdda5c51  gcc/testsuite/gcc.dg/opts-7.c
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--- 35713,35729 ----
  9229783a7729cb3f6f4f0b077a88d856  gcc/testsuite/gcc.dg/optimize-bswapdi-1.c
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  2411cd50c6b3a2f2c92ef4ec97287013  gcc/testsuite/gcc.dg/optimize-bswapdi-3.c
! 9c8da7720e5bd21617b6c738c4cb4c1e  gcc/testsuite/gcc.dg/optimize-bswaphi-1.c
  038457d7e3469ff3fd101b359915f68d  gcc/testsuite/gcc.dg/optimize-bswapsi-1.c
! d1c5f8043ad0d459a3903165dca712b5  gcc/testsuite/gcc.dg/optimize-bswapsi-2.c
  6e2a2b7d058b4a5c08261e405918da3b  gcc/testsuite/gcc.dg/optimize-bswapsi-3.c
  bd8139d78717b2c59fb034414884e732  gcc/testsuite/gcc.dg/optimize-bswapsi-4.c
! 687cf12bcb23ab00b0bdb39c8293a196  gcc/testsuite/gcc.dg/optimize-bswapsi-5.c
  a8c315968907b6e4af7ba7ac664c3d4d  gcc/testsuite/gcc.dg/opts-1.c
  4d9c904a82fe597f0cd8af7c5de6e850  gcc/testsuite/gcc.dg/opts-2.c
  38a8c929ac7b34d42957355372ae18f5  gcc/testsuite/gcc.dg/opts-3.c
  52af19ae3928ad977bfd497068f37530  gcc/testsuite/gcc.dg/opts-4.c
! 571694a9daa3219555688b40533bce07  gcc/testsuite/gcc.dg/opts-5.c
  ffa8781680b14dd532248cb588936ef3  gcc/testsuite/gcc.dg/opts-6.c
  ba65f63dbff65b24afbb672acdda5c51  gcc/testsuite/gcc.dg/opts-7.c
  e5457066a3fb8a7d2cfd77aab02a105d  gcc/testsuite/gcc.dg/opts-8.c
*************** b817ca627688575b94c9dba877cb008f  gcc/te
*** 33687,33693 ****
  ddeb76cd34e791893c0f539fdab879bb  gcc/testsuite/gcc.dg/params/LICENSE
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  86dede4ba9e425e8357eeabd89e5a7a9  gcc/testsuite/gcc.dg/params/blocksort-part.c
! 8ee6580f913facd606489c7c51619722  gcc/testsuite/gcc.dg/params/params.exp
  2bfe07faa645e00622fecd5d6eb93e5d  gcc/testsuite/gcc.dg/parm-forwdecl-1.c
  64cab05bc7533e03a76ec901dec2853f  gcc/testsuite/gcc.dg/parm-forwdecl-2.c
  acdeeb693086bdb4ca6cdde57d9eb91d  gcc/testsuite/gcc.dg/parm-forwdecl-3.c
--- 35755,35761 ----
  ddeb76cd34e791893c0f539fdab879bb  gcc/testsuite/gcc.dg/params/LICENSE
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! 83678f5582c07e2bc1abd8b407baac82  gcc/testsuite/gcc.dg/params/params.exp
  2bfe07faa645e00622fecd5d6eb93e5d  gcc/testsuite/gcc.dg/parm-forwdecl-1.c
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  acdeeb693086bdb4ca6cdde57d9eb91d  gcc/testsuite/gcc.dg/parm-forwdecl-3.c
*************** acdeeb693086bdb4ca6cdde57d9eb91d  gcc/te
*** 33696,33702 ****
  7e69b60a64c1d1dc0dae6a9c39bd12e9  gcc/testsuite/gcc.dg/parm-impl-decl-2.c
  15859198e4fe3d67c71e1ece95a10f7f  gcc/testsuite/gcc.dg/parm-impl-decl-3.c
  e13b33decc89989d8524adc6f37e6da0  gcc/testsuite/gcc.dg/parm-incomplete-1.c
! f17952869ec8ee68cb6cc7784cb34a7e  gcc/testsuite/gcc.dg/parm-mismatch-1.c
  1ee87658e00ffbf9d7c7c348af6c7dba  gcc/testsuite/gcc.dg/parse-decl-after-if.c
  fa598623a13d041436d645d1ecc87ea1  gcc/testsuite/gcc.dg/parse-decl-after-label.c
  f72962480c7f89db1094a6e142c894f6  gcc/testsuite/gcc.dg/parse-else-error-2.c
--- 35764,35770 ----
  7e69b60a64c1d1dc0dae6a9c39bd12e9  gcc/testsuite/gcc.dg/parm-impl-decl-2.c
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  e13b33decc89989d8524adc6f37e6da0  gcc/testsuite/gcc.dg/parm-incomplete-1.c
! b3a17a1a759dc0417138eefd59b03fe6  gcc/testsuite/gcc.dg/parm-mismatch-1.c
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  fa598623a13d041436d645d1ecc87ea1  gcc/testsuite/gcc.dg/parse-decl-after-label.c
  f72962480c7f89db1094a6e142c894f6  gcc/testsuite/gcc.dg/parse-else-error-2.c
*************** b19f78cc8cfdc1d6a96b2f1f9d2b1da6  gcc/te
*** 33767,33773 ****
  b01e42858e0423266a42ce48f5963765  gcc/testsuite/gcc.dg/pch/macro-3.hs
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  9dfd3f4bded8093e1bd9fe58412b43c6  gcc/testsuite/gcc.dg/pch/macro-4.hs
! b3439e163b3c70b2c772e082f12e22d5  gcc/testsuite/gcc.dg/pch/pch.exp
  d4141b7ac70c28b7c83f42cea80032d1  gcc/testsuite/gcc.dg/pch/pr66343-1.c
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--- 35835,35841 ----
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! 4b24d0a365f2225e98888f204f71be7f  gcc/testsuite/gcc.dg/pch/pch.exp
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*************** df1fb04645820cce9159c1b05e520fc7  gcc/te
*** 33821,33831 ****
--- 35889,35910 ----
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*************** a59c3c55e77b2ab336a32f5ffc9ed6ba  gcc/te
*** 33835,33848 ****
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! 28dde27da3a270fb41768af9a97e1b55  gcc/testsuite/gcc.dg/plugin/diagnostic_group_plugin.c
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--- 35914,35929 ----
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! 64a62a33969a68dabd414a649151bbf0  gcc/testsuite/gcc.dg/plugin/diagnostic_group_plugin.c
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*************** b1a9c2af16dec0d49e4f96f176a99493  gcc/te
*** 33866,33872 ****
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--- 35947,35953 ----
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*************** dfb4077095a9a1767f9d3405363543a5  gcc/te
*** 33886,33892 ****
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--- 35967,35973 ----
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*************** c74da1375203a3b1f93c21f689e6e5b5  gcc/te
*** 33905,33913 ****
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--- 35986,35994 ----
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*************** aeaf144e10fe183cf57364925a2881b4  gcc/te
*** 33944,33950 ****
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--- 36025,36031 ----
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*************** ced7aaee2ed382ba4e4be8a202b00641  gcc/te
*** 34080,34086 ****
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--- 36161,36167 ----
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*************** e4f3145efd6f726eb1a895fc7b30130f  gcc/te
*** 34091,34097 ****
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--- 36172,36178 ----
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*************** f38e89c3a82919f847a667fd3b9cf78b  gcc/te
*** 34104,34112 ****
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--- 36185,36193 ----
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*************** eeb7402398e702c0c6d5fd5907235177  gcc/te
*** 34115,34121 ****
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--- 36196,36202 ----
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*************** ca5e9b5f5a638fa1bf92d74546e76cb6  gcc/te
*** 34143,34153 ****
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--- 36224,36234 ----
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*************** e91a87fa4acb2f525107d83e0e521933  gcc/te
*** 34223,34229 ****
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--- 36304,36310 ----
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*************** ad031ad703a05e5be72cea154da02616  gcc/te
*** 34276,34282 ****
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--- 36357,36363 ----
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*************** d041a0d2eb83f24136dc258b720ecabe  gcc/te
*** 34295,34301 ****
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--- 36376,36382 ----
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*************** f69671bec212d3eb69f7d8932beee7cb  gcc/te
*** 34341,34349 ****
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--- 36422,36430 ----
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*************** bf54b47020c229850882e82035530b8d  gcc/te
*** 34361,34371 ****
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--- 36442,36452 ----
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*************** a5fbef8dc1ac30ffbaa04bb729109b3b  gcc/te
*** 34378,34392 ****
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--- 36459,36473 ----
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*************** b2d7f3df04e25c714b83b275b3977023  gcc/te
*** 34409,34433 ****
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--- 36490,36514 ----
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*************** bdf225977f6fa941dd47201d70740d51  gcc/te
*** 34446,34453 ****
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--- 36527,36534 ----
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*************** c0057c21378b571cccb57351b9ef9acd  gcc/te
*** 34455,34461 ****
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--- 36536,36542 ----
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*************** a85f2b0d69f1437e6fee5a4bcbc3317f  gcc/te
*** 34479,34485 ****
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! 9b981d2f1738047155ab10ace4b876e3  gcc/testsuite/gcc.dg/pr44971.c
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--- 36560,36566 ----
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*************** abca7742fabfd64fef16a64f69b2fe06  gcc/te
*** 34496,34502 ****
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! 84a6899eb2cbc177c70788101995f0dc  gcc/testsuite/gcc.dg/pr45449.c
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--- 36577,36583 ----
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*************** fbce19089fab978e34fea848b036fbcc  gcc/te
*** 34547,34553 ****
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--- 36628,36634 ----
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*************** a30bbbaa786a3accfca64b9ca05d750a  gcc/te
*** 34572,34582 ****
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--- 36653,36663 ----
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*************** ec73976cbaacaf3afa062d5a5bdbad06  gcc/te
*** 34608,34620 ****
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! 2a456844d3bad47b0a4450cb304caaa4  gcc/testsuite/gcc.dg/pr48768.c
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--- 36689,36701 ----
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! 2c6fe79bc359b148b7395443c5f91c55  gcc/testsuite/gcc.dg/pr48768.c
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*************** b850b1e7e2a95e6431f7fe7be385db98  gcc/te
*** 34642,34648 ****
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--- 36723,36729 ----
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*************** ad9efc6ea1fff6fe6aadd886a38482a0  gcc/te
*** 34750,34756 ****
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--- 36831,36837 ----
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*************** a7ae641ae915d4d17cbfa2c497af7191  gcc/te
*** 34798,34804 ****
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--- 36879,36885 ----
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*************** f54ccbe52911af9cf321307f8a5a59f7  gcc/te
*** 34881,34897 ****
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--- 36962,36978 ----
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! 6f87ff2ef0362f8661a9dfdb8619c50a  gcc/testsuite/gcc.dg/pr59846.c
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*************** ce5fef5a5dc2f244c856c04a7817abb5  gcc/te
*** 34905,34911 ****
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--- 36986,36992 ----
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*************** d2c91f0601aece029dd3340da8167e6d  gcc/te
*** 34928,34934 ****
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--- 37009,37015 ----
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*************** c1805b15ade6ad9e612ccb2cf6f42150  gcc/te
*** 34954,34960 ****
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--- 37035,37041 ----
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! 4b82812dec92d8213f8cd8d53032794c  gcc/testsuite/gcc.dg/pr62090.c
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*************** eba48a4b9a2f868a1590aec4efadac87  gcc/te
*** 34967,34973 ****
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! 861ee9a1fc42d88adb1e642edca83d4d  gcc/testsuite/gcc.dg/pr63543.c
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--- 37048,37054 ----
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! 4dec11b7568c159654918ab4fc495636  gcc/testsuite/gcc.dg/pr63543.c
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*************** df9ac0f0b0a90dbfbd85367929e92e16  gcc/te
*** 35027,35034 ****
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! 7303b469b72d13d23401eaa126d66225  gcc/testsuite/gcc.dg/pr64935-1.c
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--- 37108,37115 ----
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! d526334e581a212161787889c4a77fbf  gcc/testsuite/gcc.dg/pr64935-1.c
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*************** d2824c52001fefd4b111672c00e35d59  gcc/te
*** 35039,35053 ****
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! 8f081ba15dfc910ee0b078dc1da327ac  gcc/testsuite/gcc.dg/pr65521.c
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! eefca5cf539f0d9f48d3c27600de1b33  gcc/testsuite/gcc.dg/pr65779.c
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! abb530d6d870f3697e76f0c8fda67bd5  gcc/testsuite/gcc.dg/pr65980.c
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--- 37120,37134 ----
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*************** b823906d4327763b5932ba6d1b19cb10  gcc/te
*** 35059,35065 ****
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! 765d834242bae7020c68a543a464b5e2  gcc/testsuite/gcc.dg/pr66688.c
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--- 37140,37146 ----
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! c9a82b59038b9527c9c9c41958f89b87  gcc/testsuite/gcc.dg/pr66688.c
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*************** c23841d48ac4fbe59ef7a2cd176fd750  gcc/te
*** 35072,35083 ****
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! c92de27a46d04fe5131753e937efcf1a  gcc/testsuite/gcc.dg/pr67089-6.c
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! 070d1832a523a458061217ebe60196e9  gcc/testsuite/gcc.dg/pr67338.c
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--- 37153,37164 ----
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! 28f13c4113cd8f6b8b0aa64fe87a92a5  gcc/testsuite/gcc.dg/pr67089-6.c
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*************** ec6fafa240e762cbf9e1bfcbf4d8257d  gcc/te
*** 35126,35132 ****
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--- 37207,37213 ----
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*************** d0e21aa2dd6245531bfe047aab2a0c78  gcc/te
*** 35171,35177 ****
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--- 37252,37258 ----
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*************** e8fdbe08a6947f6557322a9782cecdbc  gcc/te
*** 35201,35209 ****
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--- 37282,37290 ----
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! 9b876d092c02858272d53c2649401ae8  gcc/testsuite/gcc.dg/pr70405.c
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*************** a45d8a7ea58bf6c772c8fa0d9d6f1ca5  gcc/te
*** 35267,35273 ****
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--- 37348,37354 ----
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*************** b4a62cbbba0365642b3f9855baa89f4e  gcc/te
*** 35288,35297 ****
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--- 37369,37379 ----
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*************** f06508b7bee3369e1dc3a81328ad4c4f  gcc/te
*** 35302,35308 ****
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--- 37384,37390 ----
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*************** e82d485d82c990fc42f2e211d3c7319a  gcc/te
*** 35312,35325 ****
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*************** f8b9e7e40bbdc976061399c74f48e7e0  gcc/te
*** 35346,35353 ****
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--- 37428,37435 ----
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*************** ac9cd43f4966552e06f69dd903586ae5  gcc/te
*** 35358,35364 ****
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*************** c5d86e710565da10cc02dd413d24789e  gcc/te
*** 35392,35401 ****
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*************** d06837b805d5d6e2d9f0bbc2b55d8d8d  gcc/te
*** 35425,35431 ****
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*************** f18c98a6522174d4131ce51bb8396ca6  gcc/te
*** 35447,35452 ****
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*************** dbbddf5823dbcbf2da02f69c174add7a  gcc/te
*** 35517,35522 ****
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*************** d2851550c4c046324732068307e768eb  gcc/te
*** 35531,35551 ****
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*************** ca1430cadf97e2f99470b6f261173b4a  gcc/te
*** 35564,35572 ****
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--- 37650,37659 ----
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*************** bcac07b1acca5a8196371cf13c0b577a  gcc/te
*** 35587,35606 ****
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*************** db531a9355f9326f8fbafbee1a0c4e91  gcc/te
*** 35612,35617 ****
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*************** ecd7d1b355518172cace6c6c1ee6299e  gcc/te
*** 35621,35653 ****
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*************** cd69ccaaeda9135ad00087594e6184dc  gcc/te
*** 35658,35665 ****
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*************** efa6034cc39517afbb457a507e9ce345  gcc/te
*** 35684,35690 ****
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*************** db02424a4c19e49ec9d7f6697aa99832  gcc/te
*** 35697,35703 ****
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--- 37874,37880 ----
  171cce78a4228ac8b270027f6340a2ac  gcc/testsuite/gcc.dg/predict-6.c
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  0aeb02f86ce5f139d072ef1c3322147e  gcc/testsuite/gcc.dg/predict-8.c
! cfce46e9bf0051dc331ec32dff6f49d6  gcc/testsuite/gcc.dg/predict-9.c
  2b2b0e85d6cc15db42ed6106a0ef0e93  gcc/testsuite/gcc.dg/prefetch-loop-arrays-1.c
  43a304205deaf4dc00d6bca3f9c85de7  gcc/testsuite/gcc.dg/profile-dir-1.c
  bae376025f56a65c5687491587f56cf8  gcc/testsuite/gcc.dg/profile-dir-2.c
*************** e09cd293ab0c13450aade5506c69308f  gcc/te
*** 35717,35723 ****
  2490be79cc35ca05482d3a6f564df312  gcc/testsuite/gcc.dg/pubtypes-3.c
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  e91f166b4de92c03f81d916150bf3333  gcc/testsuite/gcc.dg/pure-1.c
! 701b9d5c2eec087c414cba620038d0a6  gcc/testsuite/gcc.dg/pure-2.c
  1ba96c5459efa721e448123e79141819  gcc/testsuite/gcc.dg/pure-3.c
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  f98b23a23376b07500bb22dc9c07a97b  gcc/testsuite/gcc.dg/qual-return-1.c
--- 37894,37900 ----
  2490be79cc35ca05482d3a6f564df312  gcc/testsuite/gcc.dg/pubtypes-3.c
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  e91f166b4de92c03f81d916150bf3333  gcc/testsuite/gcc.dg/pure-1.c
! 7d38699cc36c0e41edf981a8e9f72075  gcc/testsuite/gcc.dg/pure-2.c
  1ba96c5459efa721e448123e79141819  gcc/testsuite/gcc.dg/pure-3.c
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*************** a4b7e92b399e9a3ccddd209524470054  gcc/te
*** 35761,35771 ****
  0d720e1c8f5d6d95b677821c7bae93bb  gcc/testsuite/gcc.dg/return-type-2.c
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  e7055b12b2da73125c471ef6e21aec3d  gcc/testsuite/gcc.dg/rtl/aarch64/asr_div1.c
  82921214d686f1804813b91947084109  gcc/testsuite/gcc.dg/rtl/aarch64/pr71779.c
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  1a862d5804e1cd16507ae8049cf93f0d  gcc/testsuite/gcc.dg/rtl/arm/stl-cond.c
! ce4b7949fa98d479e5f5142c38730e5e  gcc/testsuite/gcc.dg/rtl/rtl.exp
  75dd0c3d9daa8abdd58a0d0eaf55bd9e  gcc/testsuite/gcc.dg/rtl/test.c
  72262a3ad7dd60907c8d3ffad783ba9e  gcc/testsuite/gcc.dg/rtl/truncated-rtl-file.c
  3a9704d0df301152dace95218afa80c6  gcc/testsuite/gcc.dg/rtl/unknown-rtx-code.c
--- 37938,37952 ----
  0d720e1c8f5d6d95b677821c7bae93bb  gcc/testsuite/gcc.dg/return-type-2.c
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  82921214d686f1804813b91947084109  gcc/testsuite/gcc.dg/rtl/aarch64/pr71779.c
+ 043d0b0c264990e6e6ac1f2827823f1b  gcc/testsuite/gcc.dg/rtl/aarch64/rtl-handle-column-numbers.c
  770cae6014d989d238db251906e1d55c  gcc/testsuite/gcc.dg/rtl/aarch64/subs_adds_sp.c
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  a9069345cbc40d488766c1fbf34c5555  gcc/testsuite/gcc.dg/rtl/arm/ldrd-peepholes.c
  1a862d5804e1cd16507ae8049cf93f0d  gcc/testsuite/gcc.dg/rtl/arm/stl-cond.c
! c6a39ddd813b5d6be248e126420ff2c7  gcc/testsuite/gcc.dg/rtl/rtl.exp
  75dd0c3d9daa8abdd58a0d0eaf55bd9e  gcc/testsuite/gcc.dg/rtl/test.c
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  3a9704d0df301152dace95218afa80c6  gcc/testsuite/gcc.dg/rtl/unknown-rtx-code.c
*************** b1af2df249a0e6a4c994bd1ed21dca0d  gcc/te
*** 35791,35797 ****
  c3a18562322c5cc05e7fb2d95a929a8a  gcc/testsuite/gcc.dg/sancov/basic2.c
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  10a9db85b046a8ccc1ebb5e953dedb6d  gcc/testsuite/gcc.dg/sancov/pr80444.c
! 29e45b87dbb1270075f809665009e4e3  gcc/testsuite/gcc.dg/sancov/sancov.exp
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--- 37972,37978 ----
  c3a18562322c5cc05e7fb2d95a929a8a  gcc/testsuite/gcc.dg/sancov/basic2.c
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  10a9db85b046a8ccc1ebb5e953dedb6d  gcc/testsuite/gcc.dg/sancov/pr80444.c
! cda6fdb96feea51b8b82a77c6bfdf4e2  gcc/testsuite/gcc.dg/sancov/sancov.exp
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*************** a4a9d32810747a683dfd61a19a195556  gcc/te
*** 35821,35829 ****
  ffee6308d78dda55af86280534155756  gcc/testsuite/gcc.dg/sibcall-8.c
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! d63b44557884a113ade0383f0301cd99  gcc/testsuite/gcc.dg/simd-1.c
  ab02b1889f7a1a4dc5afd40bb4ecd23e  gcc/testsuite/gcc.dg/simd-1b.c
! d93cbdfb711419cd5138c469e8ea16a6  gcc/testsuite/gcc.dg/simd-2.c
  ae5548f8119d025f73912bf1fe92e4e7  gcc/testsuite/gcc.dg/simd-3.c
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--- 38002,38010 ----
  ffee6308d78dda55af86280534155756  gcc/testsuite/gcc.dg/sibcall-8.c
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! 333e0feef5b858bcbce745edf0d287f9  gcc/testsuite/gcc.dg/simd-1.c
  ab02b1889f7a1a4dc5afd40bb4ecd23e  gcc/testsuite/gcc.dg/simd-1b.c
! e466b023a99975f058c0055638d0b0a4  gcc/testsuite/gcc.dg/simd-2.c
  ae5548f8119d025f73912bf1fe92e4e7  gcc/testsuite/gcc.dg/simd-3.c
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  675c5b6328d7f774de1ee3da92f964b5  gcc/testsuite/gcc.dg/simd-5.c
*************** cdcbfe4963d2fb08c5ca3beee8988a3a  gcc/te
*** 35839,35886 ****
  2cef976581d9a7b739ab4028601cccef  gcc/testsuite/gcc.dg/simulate-thread/atomic-other-int128.c
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! bd3bddfede59eddd1e1900cf641cfeae  gcc/testsuite/gcc.dg/simulate-thread/simulate-thread.exp
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  e01edd8c252c9b0041b4625fb9403160  gcc/testsuite/gcc.dg/simulate-thread/simulate-thread.h
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! 0c69e445fc7448b288efbb468a94727f  gcc/testsuite/gcc.dg/sms-1.c
  4c9e0584d09b608eb01778b029b31c2a  gcc/testsuite/gcc.dg/sms-10.c
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  e5fe4881e15933833fa8b2a30f5c864c  gcc/testsuite/gcc.dg/sms-13.c
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! 43a6a540ce723d375b2702932433a646  gcc/testsuite/gcc.dg/sms-7.c
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! af89a9e79863f1f9c0376bb1ea59b140  gcc/testsuite/gcc.dg/special/mips-abi.exp
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--- 38020,38070 ----
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! d0fc799e84c98be2996e2c2615038baf  gcc/testsuite/gcc.dg/simulate-thread/simulate-thread.exp
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! 6ae36d8179a25095b984d95fa48c73b7  gcc/testsuite/gcc.dg/simulate-thread/speculative-store.c
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! f52e20bd26cb0d0c883db7a82a5eecf8  gcc/testsuite/gcc.dg/special/mips-abi.exp
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*************** d4fdbf76b8ce0a055e73d176eb3bd869  gcc/te
*** 35897,35924 ****
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--- 38081,38109 ----
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*************** c5722da05aa36d4bc2a009327e233223  gcc/te
*** 35953,35958 ****
--- 38138,38144 ----
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*************** dfb751744ae63c43f989ee13f0e517d6  gcc/te
*** 35983,35989 ****
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--- 38169,38175 ----
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*************** b626c83312eea994d97f8f460e6cc56e  gcc/te
*** 36014,36023 ****
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--- 38200,38210 ----
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*************** ff5638c9cb6bd567e0a1a1acee287fe2  gcc/te
*** 36044,36062 ****
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--- 38231,38260 ----
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*************** a448f788a587d5309d6dc1af1e3f5e10  gcc/te
*** 36064,36143 ****
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  984ef97553c0d059b2563ed51439cb62  gcc/testsuite/gcc.dg/strncmp-1.c
! 6a1df0256d47b0a2ef2a7393964f3e39  gcc/testsuite/gcc.dg/strncmp-2.c
  5778a0fbb76227bc62f3513b3543aed6  gcc/testsuite/gcc.dg/strncpy-fix-1.c
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  756d07d22a151e89582543f5a88bda9f  gcc/testsuite/gcc.dg/struct-by-value-1.c
--- 38262,38373 ----
  2bb764a2190a4e903796c05af56be921  gcc/testsuite/gcc.dg/strict-overflow-5.c
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! 0f240ee6230206951654acbf599e3c65  gcc/testsuite/gcc.dg/strlenopt-74.c
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! 0948a71458b0fb3214094a22bfdde7ad  gcc/testsuite/gcc.dg/strlenopt-85.c
! c08e64ecfe54fa64822bfeaeda6d1b03  gcc/testsuite/gcc.dg/strlenopt-86.c
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! 744d04a9e09981af34af5d0d4c88aca9  gcc/testsuite/gcc.dg/strlenopt-88.c
! 5c6f9907795922b3292aff7910acbf7e  gcc/testsuite/gcc.dg/strlenopt-89.c
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! 3ac42e10b5a0c2fc2200c85cb9470548  gcc/testsuite/gcc.dg/strlenopt-90.c
! 2f3b29d7597d6713a742bd1712c2fda0  gcc/testsuite/gcc.dg/strlenopt-91.c
! 7a9eb74d7cdfdbff4aaf7724a1c599f7  gcc/testsuite/gcc.dg/strlenopt-92.c
! 359473db5cdd37f1bf6095e84675f821  gcc/testsuite/gcc.dg/strlenopt-93.c
! 088575aea180cd1ef854fcc43bef2769  gcc/testsuite/gcc.dg/strlenopt-94.c
! b5f70e58553a0938c1120805bb7995ab  gcc/testsuite/gcc.dg/strlenopt.h
  984ef97553c0d059b2563ed51439cb62  gcc/testsuite/gcc.dg/strncmp-1.c
! eed82fa978ce7ae21b8bca895d354559  gcc/testsuite/gcc.dg/strncmp-2.c
  5778a0fbb76227bc62f3513b3543aed6  gcc/testsuite/gcc.dg/strncpy-fix-1.c
  e1737f9100fe39030ff4b356bc6ff29e  gcc/testsuite/gcc.dg/struct-alias-1.c
  756d07d22a151e89582543f5a88bda9f  gcc/testsuite/gcc.dg/struct-by-value-1.c
*************** fee884a4304d29aaa15363cbcd88235e  gcc/te
*** 36149,36157 ****
  d964e9c3d529c43e9ae498a35fdf5775  gcc/testsuite/gcc.dg/struct-incompl-1.c
  9d0ead85da820be9cd29c31ec09d2f73  gcc/testsuite/gcc.dg/struct-parse-1.c
  482db5b6dc708df73cfd2c32df7f1a85  gcc/testsuite/gcc.dg/struct-parse-2.c
! 71292c55dd1485a06682c239f2a42f0a  gcc/testsuite/gcc.dg/struct-ret-1.c
  75f0ab76aad50d990bf2113b93b3fbea  gcc/testsuite/gcc.dg/struct-ret-2.c
! d1dba7cef3eca24fc2d7ec885a102faf  gcc/testsuite/gcc.dg/struct-ret-3.c
  765a678087a365e079632bb3e65e37d4  gcc/testsuite/gcc.dg/struct-ret-libc.c
  6d2b12a78a0af291c8e916cbb0558287  gcc/testsuite/gcc.dg/struct-semi-1.c
  fb287bcce152203dc79c5d39fd9cc40f  gcc/testsuite/gcc.dg/struct-semi-2.c
--- 38379,38387 ----
  d964e9c3d529c43e9ae498a35fdf5775  gcc/testsuite/gcc.dg/struct-incompl-1.c
  9d0ead85da820be9cd29c31ec09d2f73  gcc/testsuite/gcc.dg/struct-parse-1.c
  482db5b6dc708df73cfd2c32df7f1a85  gcc/testsuite/gcc.dg/struct-parse-2.c
! 3f5df5a627c7b189bb0352b3ae646d57  gcc/testsuite/gcc.dg/struct-ret-1.c
  75f0ab76aad50d990bf2113b93b3fbea  gcc/testsuite/gcc.dg/struct-ret-2.c
! 339eea6e75876d4540c664e1209ffff7  gcc/testsuite/gcc.dg/struct-ret-3.c
  765a678087a365e079632bb3e65e37d4  gcc/testsuite/gcc.dg/struct-ret-libc.c
  6d2b12a78a0af291c8e916cbb0558287  gcc/testsuite/gcc.dg/struct-semi-1.c
  fb287bcce152203dc79c5d39fd9cc40f  gcc/testsuite/gcc.dg/struct-semi-2.c
*************** ff05bfaf09ff28888e82d2b9fc85207b  gcc/te
*** 36181,36187 ****
  e365b74306fcc009f9864598bae7a166  gcc/testsuite/gcc.dg/system-binary-constants-1.h
  a55e4206e2dab0fdee9089430a7ce0ac  gcc/testsuite/gcc.dg/tail-merge-store.c
  7b4e445033eff6248e905aaeb2aea3ca  gcc/testsuite/gcc.dg/tg-tests.h
! 0bf9d06295b6f4eff51022aba27cabcb  gcc/testsuite/gcc.dg/titype-1.c
  9407bf5ea124fe12c7b85eb64edd26d4  gcc/testsuite/gcc.dg/tls/alias-1.c
  d3ba9e4ca8835a4c881d04331bc19e75  gcc/testsuite/gcc.dg/tls/alpha-1.c
  1cc4a80c9088f4e403b8d48504f712c5  gcc/testsuite/gcc.dg/tls/asm-1.c
--- 38411,38417 ----
  e365b74306fcc009f9864598bae7a166  gcc/testsuite/gcc.dg/system-binary-constants-1.h
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  7b4e445033eff6248e905aaeb2aea3ca  gcc/testsuite/gcc.dg/tg-tests.h
! 84a918c67a151b12aef9998bc8dff1e1  gcc/testsuite/gcc.dg/titype-1.c
  9407bf5ea124fe12c7b85eb64edd26d4  gcc/testsuite/gcc.dg/tls/alias-1.c
  d3ba9e4ca8835a4c881d04331bc19e75  gcc/testsuite/gcc.dg/tls/alpha-1.c
  1cc4a80c9088f4e403b8d48504f712c5  gcc/testsuite/gcc.dg/tls/asm-1.c
*************** a23e685830713b09d43fa65b1bd2e3e8  gcc/te
*** 36194,36199 ****
--- 38424,38430 ----
  24d0b00ab4054dc6acbcec79e1dc8d4b  gcc/testsuite/gcc.dg/tls/diag-6.c
  f517413d69eee214da4fc3451286e955  gcc/testsuite/gcc.dg/tls/emutls-1.c
  be5528123de014e5af71ed927343d30a  gcc/testsuite/gcc.dg/tls/emutls-2.c
+ dc91bed74dd7f701c8f91ecaacec3141  gcc/testsuite/gcc.dg/tls/emutls-3.c
  f60857e024a3e6b1efbc3d8c46505370  gcc/testsuite/gcc.dg/tls/init-1.c
  f689330767b0df62f02d401e441836c4  gcc/testsuite/gcc.dg/tls/nonpic-1.c
  c1da9029fbd5d7305a2f7ad0f12eca29  gcc/testsuite/gcc.dg/tls/opt-1.c
*************** a831de49f2d41703b35fb1187a5eaacf  gcc/te
*** 36224,36239 ****
  3fb5ccff70fc82da2e2aac8594fb9457  gcc/testsuite/gcc.dg/tls/pr47715-5.c
  7193b5d66103274fe5171afd9347d3b2  gcc/testsuite/gcc.dg/tls/pr58595.c
  f12db64d724ba7ee8005f9b84bbac338  gcc/testsuite/gcc.dg/tls/pr66470.c
! ae692fa875b26ff84dbf9d73d4b87604  gcc/testsuite/gcc.dg/tls/pr78796.c
  8422497541cdde65944aa49f5f92c3a8  gcc/testsuite/gcc.dg/tls/pr82095.c
  237b9cf194db36ab11f01771186e6a0a  gcc/testsuite/gcc.dg/tls/pr83945.c
  796d5642fd9a5bf2871955a7f51a2b2c  gcc/testsuite/gcc.dg/tls/section-1.c
  b6230b3887f6b80a34081478f9506950  gcc/testsuite/gcc.dg/tls/section-2.c
  bd750cfcc2981be8695d1ba87cf4e02d  gcc/testsuite/gcc.dg/tls/struct-1.c
! b4852bb47ecc070f512ba4db3cbfaf46  gcc/testsuite/gcc.dg/tls/thr-cse-1.c
  6a83a2b086c4431c476fd09381897c50  gcc/testsuite/gcc.dg/tls/thr-init-1.c
  622c1bed70cf0fe0a74c0a5ed3602602  gcc/testsuite/gcc.dg/tls/thr-init-2.c
! 2ff4a470009c78e7b10bf0aa306add69  gcc/testsuite/gcc.dg/tls/tls.exp
  972a92c27c38895cc90d496745d8e669  gcc/testsuite/gcc.dg/tls/trivial.c
  25214598e340e56bf7487e493e42c739  gcc/testsuite/gcc.dg/tm/20091013.c
  f9f47372393116a3e58a8470e17cae92  gcc/testsuite/gcc.dg/tm/20091221.c
--- 38455,38470 ----
  3fb5ccff70fc82da2e2aac8594fb9457  gcc/testsuite/gcc.dg/tls/pr47715-5.c
  7193b5d66103274fe5171afd9347d3b2  gcc/testsuite/gcc.dg/tls/pr58595.c
  f12db64d724ba7ee8005f9b84bbac338  gcc/testsuite/gcc.dg/tls/pr66470.c
! f16cbb04b7ab390512b206edfaad586e  gcc/testsuite/gcc.dg/tls/pr78796.c
  8422497541cdde65944aa49f5f92c3a8  gcc/testsuite/gcc.dg/tls/pr82095.c
  237b9cf194db36ab11f01771186e6a0a  gcc/testsuite/gcc.dg/tls/pr83945.c
  796d5642fd9a5bf2871955a7f51a2b2c  gcc/testsuite/gcc.dg/tls/section-1.c
  b6230b3887f6b80a34081478f9506950  gcc/testsuite/gcc.dg/tls/section-2.c
  bd750cfcc2981be8695d1ba87cf4e02d  gcc/testsuite/gcc.dg/tls/struct-1.c
! 115939ec2022a4c63285eb912791111a  gcc/testsuite/gcc.dg/tls/thr-cse-1.c
  6a83a2b086c4431c476fd09381897c50  gcc/testsuite/gcc.dg/tls/thr-init-1.c
  622c1bed70cf0fe0a74c0a5ed3602602  gcc/testsuite/gcc.dg/tls/thr-init-2.c
! 6d61ac22a0505b3f1df41f07de485e32  gcc/testsuite/gcc.dg/tls/tls.exp
  972a92c27c38895cc90d496745d8e669  gcc/testsuite/gcc.dg/tls/trivial.c
  25214598e340e56bf7487e493e42c739  gcc/testsuite/gcc.dg/tm/20091013.c
  f9f47372393116a3e58a8470e17cae92  gcc/testsuite/gcc.dg/tm/20091221.c
*************** cde576929b1b37f0964764c54db538bb  gcc/te
*** 36249,36254 ****
--- 38480,38486 ----
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*************** e88d8d615f9ba9172c0fb47b72dd55cd  gcc/te
*** 36297,36303 ****
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--- 38529,38535 ----
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*************** aa2d5afc08b76af9961fbd0075d3ce6c  gcc/te
*** 36311,36319 ****
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--- 38543,38552 ----
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*************** cbb03afd91bfa22c62842c72551cf41d  gcc/te
*** 36332,36341 ****
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--- 38565,38578 ----
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*************** e05c10e4692341801a9878158cad27d7  gcc/te
*** 36354,36391 ****
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--- 38591,38631 ----
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*************** a6ed3655f340ec98978d6cd922fa78f4  gcc/te
*** 36500,36524 ****
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--- 38740,38764 ----
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! b7ae2bf193984e936d51e73d7e4783e2  gcc/testsuite/gcc.dg/torture/ipa-pta-1.c
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*************** a8e844b5e45570d6708a8da821cdb7ed  gcc/te
*** 36559,36570 ****
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! 2835c12ff05e9f82100f5a3211ccffaf  gcc/testsuite/gcc.dg/torture/pr26515.c
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--- 38799,38810 ----
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*************** b4f3a3f8a82531b70f3c3d61b1921544  gcc/te
*** 36659,36665 ****
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--- 38899,38905 ----
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*************** d5834679f39b7f300600a6d633cb5cbe  gcc/te
*** 36786,36793 ****
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--- 39026,39033 ----
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*************** e19181206a152ea54fd43daaa6278244  gcc/te
*** 36806,36812 ****
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--- 39046,39052 ----
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*************** a3c366ae7818844a5ca45d4ccef993bc  gcc/te
*** 36843,36849 ****
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--- 39083,39089 ----
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*************** e663051a4aa64f47325af53cb2960b18  gcc/te
*** 36855,36861 ****
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--- 39095,39101 ----
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*************** dadc8df99ab8509fcfb1fc6b4af32ed4  gcc/te
*** 36969,36975 ****
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--- 39209,39215 ----
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*************** ba6a8318799042eb31dcfd6ff1f850d0  gcc/te
*** 37102,37108 ****
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--- 39342,39348 ----
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*************** bec958adc64669aae7713bc7b9e9f391  gcc/te
*** 37142,37148 ****
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--- 39382,39388 ----
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*************** e281b38a3466f38c9a2413771cb95374  gcc/te
*** 37214,37220 ****
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--- 39454,39460 ----
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*************** fff303e88793dc27822a867c8150a7c6  gcc/te
*** 37377,37390 ****
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--- 39617,39630 ----
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*** 37413,37419 ****
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*************** d6ca926b2bd7476454d1d2aef6165159  gcc/te
*** 37427,37435 ****
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*************** a56be250f5d8a4a3f63fad5c8624d2bb  gcc/te
*** 37438,37464 ****
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*************** b82f09e52f40b5e142ca17a69421bfad  gcc/te
*** 37468,37478 ****
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--- 39759,39773 ----
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*************** dc476fb6c6fcd7370e5d269c50d72e4f  gcc/te
*** 37480,37486 ****
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--- 39775,39781 ----
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  d902ae1540aab0be308e7ba8052278bf  gcc/testsuite/gcc.dg/torture/stackalign/builtin-return-1.c
*************** eeb7cdfccbec69227ac2915527d61fa3  gcc/te
*** 37513,37519 ****
  0c1806b37db5e92a3ab1c3c51fb22d93  gcc/testsuite/gcc.dg/torture/stackalign/setjmp-3.c
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! f8faa465bae564aafa16e2bd2f764c91  gcc/testsuite/gcc.dg/torture/stackalign/stackalign.exp
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--- 39808,39814 ----
  0c1806b37db5e92a3ab1c3c51fb22d93  gcc/testsuite/gcc.dg/torture/stackalign/setjmp-3.c
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! 1154cab6ae77655663948182aee5b5b0  gcc/testsuite/gcc.dg/torture/stackalign/stackalign.exp
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*************** a7dd8959cd95d178e51f986a468a0a72  gcc/te
*** 37527,37533 ****
  0cca0b22c665af78b56436b3e71b756f  gcc/testsuite/gcc.dg/torture/tls/thr-init-2.c
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! 843c47f738de2619cb543d9d521f5cfe  gcc/testsuite/gcc.dg/torture/tls/tls.exp
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--- 39822,39828 ----
  0cca0b22c665af78b56436b3e71b756f  gcc/testsuite/gcc.dg/torture/tls/thr-init-2.c
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! 8989be204131b3b1ed8a47c4cf6971f5  gcc/testsuite/gcc.dg/torture/tls/tls.exp
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*************** a759d083aeeb716f90190112ebdae9ca  gcc/te
*** 37535,37541 ****
  eca35d969f18af03adc6c88e80e27fac  gcc/testsuite/gcc.dg/torture/transpose-5.c
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! 106ded8dcc9a02d11fbc6d83ef7825b8  gcc/testsuite/gcc.dg/torture/type-generic-1.c
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--- 39830,39836 ----
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! 6970cdcc7bdfd578411b169b161f82cf  gcc/testsuite/gcc.dg/torture/type-generic-1.c
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  70a7b1e7d786a67e8b07f4d2d0baba21  gcc/testsuite/gcc.dg/torture/vect-bool-1.c
*************** deba47b8439d01c869eba7f288c1e8d7  gcc/te
*** 37548,37554 ****
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--- 39843,39849 ----
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*************** d85610312206caa729ac7ee485b19a6b  gcc/te
*** 37585,37595 ****
  dc328569b49093621d4f5d4b641aceb0  gcc/testsuite/gcc.dg/tree-prof/cmpsf-1.c
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! 42fed3eeae017244f6fbe59ce0e85516  gcc/testsuite/gcc.dg/tree-prof/indir-call-prof.c
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--- 39880,39895 ----
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*************** fa7217b4e402db46b1d64ca38eb6f212  gcc/te
*** 37612,37639 ****
  d131f5a0666172175c8cd5182614bc56  gcc/testsuite/gcc.dg/tree-prof/section-attr-2.c
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--- 39912,39939 ----
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! 93db8fd0d1b9f75972c0cecedd2cc5fc  gcc/testsuite/gcc.dg/tree-prof/val-prof-7.c
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*************** e3cb52c10a36521239648f05590d9655  gcc/te
*** 37665,37671 ****
  6d035de373185efe7480d07b6da7eeaf  gcc/testsuite/gcc.dg/tree-ssa/20030807-3.c
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--- 39965,39971 ----
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*************** d64f06b6bc60f2a26df5a85f00b45925  gcc/te
*** 37704,37713 ****
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--- 40004,40013 ----
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! 80d7cab85f020a3b219eba8f19258895  gcc/testsuite/gcc.dg/tree-ssa/20040211-1.c
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*************** ceaa58513e74d5d0f032a741002382f3  gcc/te
*** 37737,37743 ****
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--- 40037,40043 ----
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*************** d30fe487cafc4d4d993a4f0cb4d3abb1  gcc/te
*** 37755,37761 ****
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--- 40055,40061 ----
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*************** ff86f8cafc02bd4b7b7ee673b34d9968  gcc/te
*** 37774,37785 ****
--- 40074,40098 ----
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*************** bd2c59ee2a95d110f018a0a696fdbba8  gcc/te
*** 37827,37833 ****
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--- 40140,40146 ----
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*************** e867184736b513170c0f3bc6ad396d21  gcc/te
*** 37836,37849 ****
--- 40149,40168 ----
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*************** dcbfb0ac8b9b251d20b7196b05527c1a  gcc/te
*** 37867,37873 ****
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--- 40186,40196 ----
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*************** d60687d3346161f39aee81b214d1486d  gcc/te
*** 37887,37896 ****
--- 40210,40224 ----
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*************** c51305b57b6a71a526e50a8fb191e467  gcc/te
*** 37906,37916 ****
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--- 40234,40244 ----
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*************** b51831242139a92b34dbcd60cebb1cd5  gcc/te
*** 37924,37936 ****
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--- 40252,40265 ----
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*************** a2e7a9267052ac4ae19d933a4fe39c12  gcc/te
*** 37940,37952 ****
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! 4e43a9dd7429fdebfb25c440708f3df9  gcc/testsuite/gcc.dg/tree-ssa/evrp4.c
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--- 40269,40284 ----
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  6d8e0fe5d4a6a949bac728d01d0cc15c  gcc/testsuite/gcc.dg/tree-ssa/evrp1.c
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! 7e5008435f58736676123011023e2635  gcc/testsuite/gcc.dg/tree-ssa/evrp4.c
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*************** f538956198f8cfd8efabf61fdedcf966  gcc/te
*** 37988,38000 ****
  cdde25415329017e4f06612e1a50c87c  gcc/testsuite/gcc.dg/tree-ssa/forwprop-29.c
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--- 40320,40333 ----
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! 0aebf34ab5715659a126caa5d6950411  gcc/testsuite/gcc.dg/tree-ssa/forwprop-35.c
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*************** c5da678cf578c57faa40129378929cf4  gcc/te
*** 38006,38016 ****
  8847b784d4afa960614f3abe85f69a6f  gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11a.c
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--- 40339,40349 ----
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*************** f13f933c98b03cde87730a731e3f3ec1  gcc/te
*** 38036,38041 ****
--- 40369,40375 ----
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*************** e1aa4da1fccf6c1381e18889b6eb6b7b  gcc/te
*** 38048,38060 ****
  5b23b073bf0eb14ec16d5475e0244d1f  gcc/testsuite/gcc.dg/tree-ssa/inline_asm-2.c
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--- 40382,40394 ----
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*************** f70137dbabe6fc1f9f3c1a89ebb8bc0b  gcc/te
*** 38076,38088 ****
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--- 40410,40422 ----
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*************** cc6a08eac75910a06313eb596249c7bb  gcc/te
*** 38102,38108 ****
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--- 40436,40442 ----
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*************** e3f1a326d63f28f3be9a8544a60505aa  gcc/te
*** 38114,38119 ****
--- 40448,40455 ----
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*************** b1a8d5459c8ff46dafcc64a866e53283  gcc/te
*** 38144,38158 ****
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--- 40480,40494 ----
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! 18bbd41936b6a09216651a8027db8f4e  gcc/testsuite/gcc.dg/tree-ssa/loop-1.c
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! 3f1dfc6195a7d07fe73f7ecc94050da4  gcc/testsuite/gcc.dg/tree-ssa/loop-15.c
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*************** ce89d25154d5909623400e7fbd68607a  gcc/te
*** 38193,38198 ****
--- 40529,40535 ----
  0f6ec9444d41b9dd8705e8ce33ea1257  gcc/testsuite/gcc.dg/tree-ssa/loop-bound-4.c
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*************** f2fb3151add498ea76d57eb5397270d9  gcc/te
*** 38212,38225 ****
  0b0f06ef0d088201a656eef58febfabf  gcc/testsuite/gcc.dg/tree-ssa/loop-niter-1.c
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--- 40549,40562 ----
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! 0f176d9e4db4a1694abf102a0c8ac46f  gcc/testsuite/gcc.dg/tree-ssa/mult-abs-2.c
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*************** abf36d925f7053c105cfd3f71d64a6a7  gcc/te
*** 38253,38261 ****
--- 40590,40605 ----
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*************** b18ab440316b3b6765604f6672f40d8b  gcc/te
*** 38353,38359 ****
  0b915301cb092e08a955172bdfaee416  gcc/testsuite/gcc.dg/tree-ssa/pr23434.c
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--- 40697,40703 ----
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*************** b306e7eebde7d3ea663a7ac1bbaf212e  gcc/te
*** 38380,38391 ****
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--- 40724,40735 ----
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*************** a2fced1270cbdc50e78585c0f2078558  gcc/te
*** 38438,38444 ****
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--- 40782,40788 ----
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*************** e6986386d8ec85afd7b821cc2f311d1c  gcc/te
*** 38483,38494 ****
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--- 40827,40839 ----
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*************** f9172c76ed973a0ef6eaf1fd3bdcaeda  gcc/te
*** 38552,38558 ****
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--- 40897,40903 ----
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*************** c87ef2993d90c5b6e5dca5262c0a7ff8  gcc/te
*** 38564,38583 ****
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--- 40909,40928 ----
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*************** dbb3bd52ee698a572581470fc02636bb  gcc/te
*** 38618,38624 ****
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--- 40963,40969 ----
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*************** f313676a3bd1def3f52a4a2ad337e5b4  gcc/te
*** 38627,38633 ****
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--- 40972,40978 ----
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*************** fd9a5a83653b17b732084ec857d8b5e2  gcc/te
*** 38637,38642 ****
--- 40982,40988 ----
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*************** bdefd352a304b92e8aa4aae58ad27dd3  gcc/te
*** 38655,38669 ****
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*************** a01af62b0a92d61ae163e5294ef53944  gcc/te
*** 38673,38685 ****
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--- 41069,41081 ----
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*************** f67cefdd25b2088c2124e39bc00cf373  gcc/te
*** 38689,38698 ****
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--- 41085,41094 ----
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*************** edcbca34043637027e3769b565e4b273  gcc/te
*** 38725,38734 ****
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*************** f4bcbafb829540ea32f44a5eb5d1b215  gcc/te
*** 38752,38757 ****
--- 41148,41155 ----
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*** 38762,38770 ****
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*************** d396c36b9f0d747b966a2da9958bc3ac  gcc/te
*** 38774,38781 ****
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*************** b5ebc4dec51696df1663826181f1da91  gcc/te
*** 38797,38805 ****
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*************** cd42b4f614ae2ea57d9c405a7e6d8df8  gcc/te
*** 38814,38819 ****
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*************** a033da229d97e775dc989a1095ff34b8  gcc/te
*** 38826,38832 ****
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*************** ddf9315dbac20ff7fbce56f78fda6731  gcc/te
*** 38838,38845 ****
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*************** c947f7a7b2ab4b92803c522e1e0892ba  gcc/te
*** 38901,38906 ****
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*************** d889f1cc3cc0339a3097fb5ea6337d8a  gcc/te
*** 38941,38949 ****
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*************** c0ca0e94e1ce558f4728360450f8122b  gcc/te
*** 38953,38958 ****
--- 41353,41362 ----
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*************** d8e76aa1a22aab10e268cd387ef24fae  gcc/te
*** 38979,38987 ****
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*************** b1a33369c3e912c4411619ea3acffd32  gcc/te
*** 39011,39017 ****
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--- 41415,41421 ----
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*************** f2d5f6f0cf26422cfdec75c4878c8994  gcc/te
*** 39019,39027 ****
--- 41423,41449 ----
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*************** cb14d497286df49863c83afa886a3a92  gcc/te
*** 39051,39056 ****
--- 41473,41479 ----
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*************** f32d0ce05b3a89e686f494466ba0bfe0  gcc/te
*** 39113,39119 ****
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*************** ef54f7c0b0aaacab1bba5efadd045b5d  gcc/te
*** 39126,39132 ****
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--- 41549,41555 ----
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*************** ac68e635052c49f6b773cb66ed20a1e8  gcc/te
*** 39156,39162 ****
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--- 41579,41585 ----
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*************** f85c8615f3ea51105c4b0deb990f425b  gcc/te
*** 39172,39178 ****
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*************** bb62f82a973334db1c0ebf75b17bcdf8  gcc/te
*** 39306,39312 ****
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--- 41730,41736 ----
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*************** ee666c921ea28ec3cc93df70ecc3d508  gcc/te
*** 39317,39326 ****
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*************** a03c3f43eab7504cac64b70f59c4026c  gcc/te
*** 39363,39382 ****
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--- 41790,41826 ----
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*** 39406,39413 ****
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*** 39424,39431 ****
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*** 39436,39441 ****
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*** 39444,39449 ****
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*** 39511,39518 ****
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*** 39529,39535 ****
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*** 39553,39559 ****
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*** 39574,39584 ****
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*** 39597,39603 ****
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*** 39605,39621 ****
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*************** cc1dd9969065b3ef679c1331eea3b974  gcc/te
*** 39623,39672 ****
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  ac97f8715430e9981d35fdaf30359bcb  gcc/testsuite/gcc.dg/vect/bb-slp-subgroups-3.c
  05fc220f1ddbdb4d47d859b5d07869e2  gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-fast-math-vect-pr29925.c
! 073e8ac3cf8d71ee2f84a33da9428398  gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-31.c
! 7f6bbf8768cd5a8ca9e036e6fd91b70e  gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-33.c
  e8ac43ab8cf8cbf7bfd8167cf04e3b0e  gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-68.c
  460815bb26ae1f6c220e23de56a2d3fd  gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-reduc-1char.c
! dd93c0a5fd88d7c185b42c2ffd7ed60d  gcc/testsuite/gcc.dg/vect/costmodel/i386/i386-costmodel-vect.exp
  a9cb28b1e884170acbaee9d79bf34ff8  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c
  77e9d73da790b2dcc18bc0f22f07f555  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a.c
! c0ef459d834c12e2cb041e9caeb5b881  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-fast-math-vect-pr29925.c
! 598fd76bceefe3765d5da32e07d2cb2d  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-pr37194.c
  2926d53e5e3391b93ff4c3fdf9b102c4  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-12.c
  a9e7ff0eac965a3c7cbff3f3be3fdf77  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-33.c
  50493cebd3df3a5e504c890169d57496  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c
  22ccbb5f325080c594838c3093ae8c53  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c
! 73a9d7a1c0c9f7296025969e2be1f29e  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31b.c
  a3fbdcd8880d2b38ef90333ee846cfb0  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31c.c
! a72a788e9962a5efc383a32bebb48bab  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-33.c
  aa372c1380771801d70b995b93dcfbad  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-68a.c
  77fa92233fb4fc39191191b80d6b5ab6  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-68b.c
  0e412468aec9c2713d05b85058373067  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-68c.c
! 20532b0858dede7da7b2f0ad2b869a45  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76a.c
! 074670f1f8d9964908b192ccd5069819  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76b.c
! 5172c5e4a0dea6a2a6ac4f3b9671d5c6  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76c.c
  9ac66f90cde8ee4865e6773bc02157e1  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-outer-fir.c
  a0cfa86bcfadab7dd7bfdc45d44a30ee  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-reduc-1char.c
! e64ffa90b7b8d96b97f4acbdf19e6ffb  gcc/testsuite/gcc.dg/vect/costmodel/ppc/ppc-costmodel-vect.exp
! e599eca185389feb5e60a627dfe8838c  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-fast-math-vect-pr29925.c
! 84c72c499f584179942db58234c18087  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-31a.c
! 73a9d7a1c0c9f7296025969e2be1f29e  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-31b.c
! a3fbdcd8880d2b38ef90333ee846cfb0  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-31c.c
! 240c1e733772737b298da88481162bba  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-31d.c
! b3cff2274a9a0c2366a60c1dc52d5a30  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-33.c
! aa372c1380771801d70b995b93dcfbad  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-68a.c
! 77fa92233fb4fc39191191b80d6b5ab6  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-68b.c
! 0e412468aec9c2713d05b85058373067  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-68c.c
! af10d95e6f536e902c97d0db4e4e7bac  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-68d.c
! abf0682beb187eaf35a99a2824ca1d61  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-76a.c
! b4d6192dfdaddd25eb128c6bdabe011a  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-76b.c
! b1b6bddc67554d02bd9b86909f6aae7c  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-76c.c
! ebbbf8236e49b01d496361dd75929f3f  gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-iv-9.c
! 114e627bbdb115617785dcd6b6420112  gcc/testsuite/gcc.dg/vect/costmodel/spu/spu-costmodel-vect.exp
  782f0b41429f222276333f508cb8f6be  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-alignpeel.c
  05fc220f1ddbdb4d47d859b5d07869e2  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-fast-math-vect-pr29925.c
  a5291b9137052e38bce189e260b31ad4  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-pr30843.c
--- 42084,42119 ----
  ba61bac9283801e9b73dee15e5669f8a  gcc/testsuite/gcc.dg/vect/bb-slp-pr81635-3.c
  0a3a3c00f359e5410f5697d124bdd5ca  gcc/testsuite/gcc.dg/vect/bb-slp-pr81635-4.c
  a689d9ca07b59620e68b3c142ebeb12e  gcc/testsuite/gcc.dg/vect/bb-slp-pr90006.c
+ 3ac66e7d12525b6746af51507c570d90  gcc/testsuite/gcc.dg/vect/bb-slp-pr92596.c
  5428e4471ece92d28564b1d30192ed87  gcc/testsuite/gcc.dg/vect/bb-slp-subgroups-1.c
  892d0604340291572dec6ee6deee1f79  gcc/testsuite/gcc.dg/vect/bb-slp-subgroups-2.c
  ac97f8715430e9981d35fdaf30359bcb  gcc/testsuite/gcc.dg/vect/bb-slp-subgroups-3.c
  05fc220f1ddbdb4d47d859b5d07869e2  gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-fast-math-vect-pr29925.c
! de7dd1e584604b7bdea2dc13b43ddc14  gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-31.c
! f460536507001609ab3aa91df1c958aa  gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-33.c
  e8ac43ab8cf8cbf7bfd8167cf04e3b0e  gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-68.c
  460815bb26ae1f6c220e23de56a2d3fd  gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-reduc-1char.c
! 7ec2b24728f16089c4ac74c48f634db2  gcc/testsuite/gcc.dg/vect/costmodel/i386/i386-costmodel-vect.exp
  a9cb28b1e884170acbaee9d79bf34ff8  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c
  77e9d73da790b2dcc18bc0f22f07f555  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a.c
! d25dc6b156dd43d1cf5e1224a3abb151  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-fast-math-vect-pr29925.c
! bd8562e8bd66700ee1114f70cbcff47e  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-pr37194.c
  2926d53e5e3391b93ff4c3fdf9b102c4  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-12.c
  a9e7ff0eac965a3c7cbff3f3be3fdf77  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-33.c
  50493cebd3df3a5e504c890169d57496  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c
  22ccbb5f325080c594838c3093ae8c53  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c
! ce405318474685a1fe34d771dea2f82e  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31b.c
  a3fbdcd8880d2b38ef90333ee846cfb0  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31c.c
! f5d642efddbd554383cbaa9e19b68090  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-33.c
  aa372c1380771801d70b995b93dcfbad  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-68a.c
  77fa92233fb4fc39191191b80d6b5ab6  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-68b.c
  0e412468aec9c2713d05b85058373067  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-68c.c
! 5a7ad9d157bf1bb7f8863e07290ff154  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76a.c
! d7e4207d0458ef7d643b113a4d3b67be  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76b.c
! 8f22ac8bc29002f40901ab1712356e3f  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76c.c
  9ac66f90cde8ee4865e6773bc02157e1  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-outer-fir.c
  a0cfa86bcfadab7dd7bfdc45d44a30ee  gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-reduc-1char.c
! ef60dd85dc66ab091bcdf617f2081bf1  gcc/testsuite/gcc.dg/vect/costmodel/ppc/ppc-costmodel-vect.exp
  782f0b41429f222276333f508cb8f6be  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-alignpeel.c
  05fc220f1ddbdb4d47d859b5d07869e2  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-fast-math-vect-pr29925.c
  a5291b9137052e38bce189e260b31ad4  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-pr30843.c
*************** ec5c6a4d5052e20e84aa5eb95742d36f  gcc/te
*** 39674,39685 ****
  0211c977ddd4f83f65ee1b2b0942b85c  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-pr69297.c
  95441d9036c7c6a8ec66097fa438a66b  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-pr83202.c
  48ec02ae594bd65df110f1d4ae1066f9  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-pr84986.c
! 073e8ac3cf8d71ee2f84a33da9428398  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-31.c
! 057db5529adf748a87cf8dd08e71e478  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-33.c
  e8ac43ab8cf8cbf7bfd8167cf04e3b0e  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-68.c
  460815bb26ae1f6c220e23de56a2d3fd  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-reduc-1char.c
  59205db3c659c989e83e01da1fce9db5  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-slp.c
! 24d43fa35dcc76fa484163c93e84fcbd  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/x86_64-costmodel-vect.exp
  4b034817fdfb292a8f13d72e1b0a20eb  gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-1.c
  91643c58fd89919e90dde5e56252b147  gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-2.c
  dba914eb2c6896f87a7a3bb3e0c40c08  gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-3.c
--- 42121,42132 ----
  0211c977ddd4f83f65ee1b2b0942b85c  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-pr69297.c
  95441d9036c7c6a8ec66097fa438a66b  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-pr83202.c
  48ec02ae594bd65df110f1d4ae1066f9  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-pr84986.c
! de7dd1e584604b7bdea2dc13b43ddc14  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-31.c
! afc5dba022f09221fdd72f43f975aa2c  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-33.c
  e8ac43ab8cf8cbf7bfd8167cf04e3b0e  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-68.c
  460815bb26ae1f6c220e23de56a2d3fd  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-reduc-1char.c
  59205db3c659c989e83e01da1fce9db5  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-slp.c
! 9de6fd72fccc838fc3e6832cffb22522  gcc/testsuite/gcc.dg/vect/costmodel/x86_64/x86_64-costmodel-vect.exp
  4b034817fdfb292a8f13d72e1b0a20eb  gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-1.c
  91643c58fd89919e90dde5e56252b147  gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-2.c
  dba914eb2c6896f87a7a3bb3e0c40c08  gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-3.c
*************** ba3ba1417b4b4d7190b32549c4cc480d  gcc/te
*** 39690,39703 ****
  a0e431405b4a231e57edf67833ff2b5e  gcc/testsuite/gcc.dg/vect/fast-math-pr55281.c
  300995981557dfd810e9f01204fd73df  gcc/testsuite/gcc.dg/vect/fast-math-slp-27.c
  5ffb7b2cd3742679d3e39ecab6fad8c8  gcc/testsuite/gcc.dg/vect/fast-math-slp-38.c
! 031e253da02bcfadb0f294fe4b249ffc  gcc/testsuite/gcc.dg/vect/fast-math-vect-call-1.c
  3b1dc406490dfb0ab6492889ec2f3465  gcc/testsuite/gcc.dg/vect/fast-math-vect-call-2.c
  6cc95709f1aa67e7830dce52461e8468  gcc/testsuite/gcc.dg/vect/fast-math-vect-complex-3.c
  d4813c7c6037ade43db3ca011cd64159  gcc/testsuite/gcc.dg/vect/fast-math-vect-outer-7.c
  750d5e431275f271c0ed35bab0126c14  gcc/testsuite/gcc.dg/vect/fast-math-vect-pow-1.c
  aeccb6c4596e9dc997c595bdb09b1715  gcc/testsuite/gcc.dg/vect/fast-math-vect-pow-2.c
  6c52e79e94d7ecb003dbfbf3dfdc1757  gcc/testsuite/gcc.dg/vect/fast-math-vect-pr25911.c
! 8b5c4e1e9b6f76410e8b71701507d509  gcc/testsuite/gcc.dg/vect/fast-math-vect-pr29925.c
  22a95d7359816f452cd3e71380d625d2  gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-5.c
  1ded60c7eb3e5a7994f57c97c0e949b0  gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-7.c
  7f0608980670dad162f7c6dc5445dee0  gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-8.c
--- 42137,42150 ----
  a0e431405b4a231e57edf67833ff2b5e  gcc/testsuite/gcc.dg/vect/fast-math-pr55281.c
  300995981557dfd810e9f01204fd73df  gcc/testsuite/gcc.dg/vect/fast-math-slp-27.c
  5ffb7b2cd3742679d3e39ecab6fad8c8  gcc/testsuite/gcc.dg/vect/fast-math-slp-38.c
! ce6f3b6dd5d189a998d561a6d5104828  gcc/testsuite/gcc.dg/vect/fast-math-vect-call-1.c
  3b1dc406490dfb0ab6492889ec2f3465  gcc/testsuite/gcc.dg/vect/fast-math-vect-call-2.c
  6cc95709f1aa67e7830dce52461e8468  gcc/testsuite/gcc.dg/vect/fast-math-vect-complex-3.c
  d4813c7c6037ade43db3ca011cd64159  gcc/testsuite/gcc.dg/vect/fast-math-vect-outer-7.c
  750d5e431275f271c0ed35bab0126c14  gcc/testsuite/gcc.dg/vect/fast-math-vect-pow-1.c
  aeccb6c4596e9dc997c595bdb09b1715  gcc/testsuite/gcc.dg/vect/fast-math-vect-pow-2.c
  6c52e79e94d7ecb003dbfbf3dfdc1757  gcc/testsuite/gcc.dg/vect/fast-math-vect-pr25911.c
! 0c2e6fa8901e4e23d3eddda9dbd775bb  gcc/testsuite/gcc.dg/vect/fast-math-vect-pr29925.c
  22a95d7359816f452cd3e71380d625d2  gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-5.c
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  7f0608980670dad162f7c6dc5445dee0  gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-8.c
*************** c96ad17d79b357aa3a1fafd4373fa123  gcc/te
*** 39705,39726 ****
  468cb6f8da74e4fcecd69eee085d36b4  gcc/testsuite/gcc.dg/vect/ggc-pr37574.c
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  3ba1ad7e9f05d87d9b64782325c73302  gcc/testsuite/gcc.dg/vect/if-cvt-stores-vect-ifcvt-18.c
! 93d17c65636c7ee0c8bf062504b27f3e  gcc/testsuite/gcc.dg/vect/no-fast-math-vect16.c
  cbd914dd109796186423ddfed675979c  gcc/testsuite/gcc.dg/vect/no-fre-pre-pr50208.c
! f4125ef35368c2a60a34ac1406a2ea1b  gcc/testsuite/gcc.dg/vect/no-math-errno-slp-32.c
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! e10d047e5244efcf431a4cb310f3ca38  gcc/testsuite/gcc.dg/vect/no-scevccp-noreassoc-slp-reduc-7.c
  444765775ff88c35d3dd9a64404c4c9b  gcc/testsuite/gcc.dg/vect/no-scevccp-outer-1.c
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  02c6f0280a3c56481a62e175224f1d0e  gcc/testsuite/gcc.dg/vect/no-scevccp-outer-10b.c
  4d2c57b99a6e72f3b11a591f9b4ce2dc  gcc/testsuite/gcc.dg/vect/no-scevccp-outer-11.c
! 84b89be2ebe9f17cb65b6958588ad349  gcc/testsuite/gcc.dg/vect/no-scevccp-outer-12.c
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  f71692f531d922bbf56a02d45f5624b4  gcc/testsuite/gcc.dg/vect/no-scevccp-outer-14.c
  a1d8b0c6c26cc7830cd2388347259d96  gcc/testsuite/gcc.dg/vect/no-scevccp-outer-15.c
--- 42152,42173 ----
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*************** b52163346c2e53bdf0d289d24f4d137c  gcc/te
*** 39752,39765 ****
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--- 42199,42212 ----
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*************** deb80b9e42227ef9cf3ab1d7f28f3f42  gcc/te
*** 39777,39784 ****
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--- 42224,42231 ----
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*************** cc946be513229c842b441477d742adec  gcc/te
*** 39792,39798 ****
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--- 42239,42245 ----
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*************** f30d407737f2728f358eaa8c48d9305f  gcc/te
*** 39838,39844 ****
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--- 42285,42291 ----
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*************** c2455168a41837341a911785e40a72e5  gcc/te
*** 39887,39897 ****
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--- 42334,42344 ----
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*************** bd34047315934420bc0f9474dadf5f0a  gcc/te
*** 39917,39923 ****
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--- 42364,42370 ----
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*************** c98bdb23f463d98ed1f37c2088b11798  gcc/te
*** 39979,40000 ****
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--- 42426,42449 ----
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*************** d01f8a0347e5cae7456521187b5b512e  gcc/te
*** 40041,40049 ****
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*** 40053,40065 ****
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*************** dec135e959be35a2676395dffb879be7  gcc/te
*** 40081,40105 ****
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*************** d7fccaa610ea11b1a5f271dc2f429653  gcc/te
*** 40124,40133 ****
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*************** a397bfe9f818dafa44b2593952e5c479  gcc/te
*** 40151,40157 ****
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*************** b0dbfa6cdc6dde5390e046d7232b175a  gcc/te
*** 40175,40181 ****
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*************** e9bb13be425e14161749170fa87ec0f6  gcc/te
*** 40185,40203 ****
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--- 42663,42688 ----
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*************** e7af2caa929bde4629f98c1edd91b168  gcc/te
*** 40207,40220 ****
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*************** c7a685bac4232f2ebcaf76c58144db93  gcc/te
*** 40225,40231 ****
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*************** c10cc9fb2ae078eb4c4cd032787de254  gcc/te
*** 40248,40259 ****
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*************** d1bd152f7bb5c25d59cd6d46b0e236bf  gcc/te
*** 40272,40290 ****
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*************** a322eb2a68fb51c6abffabc72d92d382  gcc/te
*** 40295,40314 ****
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*************** ae00234ebf24afba7f4fa942d974637d  gcc/te
*** 40322,40354 ****
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--- 42807,42846 ----
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*************** c98cb887213a527e1e60e0259f21719c  gcc/te
*** 40373,40380 ****
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--- 42865,42874 ----
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*************** e4e0ae2a20f798eba85140061b6a6ad7  gcc/te
*** 40384,40389 ****
--- 42878,42884 ----
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*************** ba24322066c35e10260838062bc30a18  gcc/te
*** 40398,40419 ****
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--- 42893,42923 ----
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*************** ded2842e259fa84e07493315d52f3364  gcc/te
*** 40452,40470 ****
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--- 42956,42978 ----
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*************** c78e329614306ddfd2430617ba82c3e8  gcc/te
*** 40479,40488 ****
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*************** ec640955685882d94ce9bff8c0ce888e  gcc/te
*** 40525,40541 ****
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*************** da0060ee840a879ce7673a4b990e901b  gcc/te
*** 40553,40559 ****
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--- 43062,43068 ----
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*************** ebc132ebf64090b329410885b70adc85  gcc/te
*** 40571,40583 ****
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*************** fbd4824be04c3d1e916edcd2d90246d7  gcc/te
*** 40586,40596 ****
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*************** deb8ecbd7cdb913c066f7d366640b30b  gcc/te
*** 40602,40617 ****
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--- 43119,43135 ----
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*************** a1590cdef29fb480824603e746a7ab80  gcc/te
*** 40620,40634 ****
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--- 43138,43152 ----
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*************** addd4dc2a89deb3989a2263e7c62478f  gcc/te
*** 40638,40644 ****
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--- 43156,43162 ----
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*************** e09d0611313202af9ed401131b732f60  gcc/te
*** 40651,40666 ****
--- 43169,43198 ----
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*************** fd42b513de549850607ae76ac92c51c1  gcc/te
*** 40690,40695 ****
--- 43222,43228 ----
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*************** a59df89b1376b4f03dea39b74f5b0a4b  gcc/te
*** 40715,40721 ****
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--- 43248,43256 ----
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*************** cd7a4bdc7cf64fef843150cf5d2a231f  gcc/te
*** 40725,40751 ****
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--- 43260,43286 ----
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*************** c2396edad56315ee8a5af0140ad73bf7  gcc/te
*** 40796,40801 ****
--- 43331,43337 ----
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*************** d8a13a61fad5116ae169d2bfc88dcaea  gcc/te
*** 40803,40809 ****
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*************** eb7dd9debe1674f5d04a9841461e4954  gcc/te
*** 40911,40917 ****
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--- 43447,43453 ----
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  7ffc513bcccbd7385fc4f45ab3d8d006  gcc/testsuite/gcc.dg/vmx/ops-long-1.c
  0ece5b66996a21bf2abdeba3d4730225  gcc/testsuite/gcc.dg/vmx/ops-long-2.c
! 799e197e1f836140cb338a795e1dfcf2  gcc/testsuite/gcc.dg/vmx/ops.c
  7a3395ea24edb9768321e94484553d23  gcc/testsuite/gcc.dg/vmx/pack.c
  720a825389f2bdbc69225675b554bc5c  gcc/testsuite/gcc.dg/vmx/perm.c
  3b4c24c7f9868d1b2dbf4a0051f1c424  gcc/testsuite/gcc.dg/vmx/pr27006.c
*************** b74b4229263d70abbf112c2c622f29ba  gcc/te
*** 40938,40944 ****
  5cc01078c1f3f451644a44dfdc807444  gcc/testsuite/gcc.dg/vmx/varargs-6.c
  441584a435c20e33e9ba2840da79de7b  gcc/testsuite/gcc.dg/vmx/varargs-7.c
  88d7e6b1c915da50092f2f05e8403f00  gcc/testsuite/gcc.dg/vmx/vec-set.c
! d93cf38ab09993758d4c0fee6611b97f  gcc/testsuite/gcc.dg/vmx/vmx.exp
  7b36f93de20205be4944182fe8222120  gcc/testsuite/gcc.dg/vmx/vsums.c
  0e39fb03e625fd0928ac3568284946cb  gcc/testsuite/gcc.dg/vmx/x-01.c
  780491d8a6964b34313eb871098c1ec6  gcc/testsuite/gcc.dg/vmx/x-02.c
--- 43474,43480 ----
  5cc01078c1f3f451644a44dfdc807444  gcc/testsuite/gcc.dg/vmx/varargs-6.c
  441584a435c20e33e9ba2840da79de7b  gcc/testsuite/gcc.dg/vmx/varargs-7.c
  88d7e6b1c915da50092f2f05e8403f00  gcc/testsuite/gcc.dg/vmx/vec-set.c
! 75864951a510ed33264e7acb64264a75  gcc/testsuite/gcc.dg/vmx/vmx.exp
  7b36f93de20205be4944182fe8222120  gcc/testsuite/gcc.dg/vmx/vsums.c
  0e39fb03e625fd0928ac3568284946cb  gcc/testsuite/gcc.dg/vmx/x-01.c
  780491d8a6964b34313eb871098c1ec6  gcc/testsuite/gcc.dg/vmx/x-02.c
*************** abd4221f53ab773c60a463239646ff13  gcc/te
*** 40963,40981 ****
  8896048465bb020081d36e314ab925aa  gcc/testsuite/gcc.dg/vshift-2.c
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! 304944e87930a4eb1b6bfe9665462274  gcc/testsuite/gcc.dg/vshift-5.c
  667aa8ae0e01aeca6711adeb19a96dc7  gcc/testsuite/gcc.dg/vshift-6.c
  f5b5cb2b526a46cc84be22a60b28910d  gcc/testsuite/gcc.dg/vshift-7.c
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  bfeaf9e0fd9a2f701c3352b80a357589  gcc/testsuite/gcc.dg/vxworks/initpri2.c
! 47eaa256aadee8478af6b197629b2dac  gcc/testsuite/gcc.dg/vxworks/vxworks.exp
  807831bd928d8bca1ad6f704a5f898aa  gcc/testsuite/gcc.dg/warn-1.c
! 1a1f80cc16ad47218a74498f7324c825  gcc/testsuite/gcc.dg/warn-abs-1.c
  be8f7b50176d3cc112e9b45dfbff569c  gcc/testsuite/gcc.dg/warn-addr-cmp.c
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! f8dd371dfed9df220a0819a7c61265f9  gcc/testsuite/gcc.dg/warn-sprintf-no-nul.c
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--- 43499,43517 ----
  8896048465bb020081d36e314ab925aa  gcc/testsuite/gcc.dg/vshift-2.c
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! c2a72555b847a160fe0e6ed226d4d97d  gcc/testsuite/gcc.dg/vshift-5.c
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  9357989e44cd23b5fe7fef931df63976  gcc/testsuite/gcc.dg/vxworks/initpri1.c
  bfeaf9e0fd9a2f701c3352b80a357589  gcc/testsuite/gcc.dg/vxworks/initpri2.c
! eaf2b623c4c4e3ed764c45367e951e99  gcc/testsuite/gcc.dg/vxworks/vxworks.exp
  807831bd928d8bca1ad6f704a5f898aa  gcc/testsuite/gcc.dg/warn-1.c
! 707e0da2129d4bb332c0bf10ea621989  gcc/testsuite/gcc.dg/warn-abs-1.c
  be8f7b50176d3cc112e9b45dfbff569c  gcc/testsuite/gcc.dg/warn-addr-cmp.c
  4fa5ad62e3c2258f30b689370761ebf9  gcc/testsuite/gcc.dg/warn-nsstring.c
  f0fdc63e7032e5a4c3c9b54d04457f14  gcc/testsuite/gcc.dg/warn-sprintf-no-nul-2.c
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! c4c05e988d611839b778bc5b1e7f94a2  gcc/testsuite/gcc.dg/warn-sprintf-no-nul.c
  2abd7451e5546bb5ed64c00e71af68a6  gcc/testsuite/gcc.dg/warn-stpcpy-no-nul.c
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  337cc4c80ee4dae26f1a907d04b933ea  gcc/testsuite/gcc.dg/warn-strlen-no-nul.c
*************** fc79cd4804afe5fc2b7f140f5eae482d  gcc/te
*** 40995,41000 ****
--- 43531,43537 ----
  e0a91183b53de4db07731d70464e0514  gcc/testsuite/gcc.dg/weak/weak-16.c
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  b1053beb6c83d0b7ad775bdb6d738748  gcc/testsuite/gcc.dg/weak/weak-18.c
+ 82d71518bc5f1e36716ed624e8b5b71d  gcc/testsuite/gcc.dg/weak/weak-19.c
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  227fc9b36c4ef2834f15e27c78fcc8e6  gcc/testsuite/gcc.dg/weak/weak-4.c
*************** b7dc9ca29b0c2fb0c11b45350fbe20ac  gcc/te
*** 41003,41023 ****
  bbde9e22b1b903e5ff4a277a65a1cb04  gcc/testsuite/gcc.dg/weak/weak-7.c
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! 6a1038c92ed8d1326c8966137cafb23b  gcc/testsuite/gcc.dg/weak/weak.exp
  4f8d055b663cb38e2bbb352f1cb7a53c  gcc/testsuite/gcc.dg/webizer.c
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! 1fa21f7052553ca6dd42ae79b4e26a0b  gcc/testsuite/gcc.dg/winline-10.c
  a15fd6e57876c1630526049305bb1218  gcc/testsuite/gcc.dg/winline-2.c
  e537e8c4cf99b530eb42ca0a3e870ae4  gcc/testsuite/gcc.dg/winline-3.c
  d33178bb6a6aec3d8484747201cd2df2  gcc/testsuite/gcc.dg/winline-5.c
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! 888069c3c61ce25944c72cd52d7f9ada  gcc/testsuite/gcc.dg/winline-7.c
  7ef3005b6b6a3b98993c34dd4de5feed  gcc/testsuite/gcc.dg/winline-9.c
  59f7a248eb2e13835a3ecc5302c389a2  gcc/testsuite/gcc.dg/wint_t-1.c
  cc0d6bce4f8aa2ee952b215a124a101a  gcc/testsuite/gcc.dg/wmain.c
  6a9b477321a41d850c75a5d52f5c1dd2  gcc/testsuite/gcc.dg/wmul-1.c
  0608c380e23cc21f1a8c8141d8def366  gcc/testsuite/gcc.dg/wtr-aggr-init-1.c
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  81ce4be5f048dad36a72f1239e0b064c  gcc/testsuite/gcc.dg/wtr-escape-1.c
--- 43540,43561 ----
  bbde9e22b1b903e5ff4a277a65a1cb04  gcc/testsuite/gcc.dg/weak/weak-7.c
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! 8f2fc5a88a64558f315e76433db16d40  gcc/testsuite/gcc.dg/weak/weak.exp
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! 55f05c4584b0afa0db6fe31242a296ba  gcc/testsuite/gcc.dg/winline-10.c
  a15fd6e57876c1630526049305bb1218  gcc/testsuite/gcc.dg/winline-2.c
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  d33178bb6a6aec3d8484747201cd2df2  gcc/testsuite/gcc.dg/winline-5.c
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! fd04e1baf5da18c4be47f595e60e491c  gcc/testsuite/gcc.dg/winline-7.c
  7ef3005b6b6a3b98993c34dd4de5feed  gcc/testsuite/gcc.dg/winline-9.c
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  6a9b477321a41d850c75a5d52f5c1dd2  gcc/testsuite/gcc.dg/wmul-1.c
+ a1cf84e73fe8fc39e7322a3d02f2db33  gcc/testsuite/gcc.dg/wrapped-binop-simplify.c
  0608c380e23cc21f1a8c8141d8def366  gcc/testsuite/gcc.dg/wtr-aggr-init-1.c
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  81ce4be5f048dad36a72f1239e0b064c  gcc/testsuite/gcc.dg/wtr-escape-1.c
*************** c34b827a7f28759ebf3d5ebc26e975b8  gcc/te
*** 41037,41051 ****
  ce7181a37e4abd0831a2d47b7a9a11f2  gcc/testsuite/gcc.dg/zero_bits_compound-2.c
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  4e040b1868690b5543136a52a2f030b3  gcc/testsuite/gcc.misc-tests/acker1.c
! 79f64588be5a05827943a5dfcdec829b  gcc/testsuite/gcc.misc-tests/acker1.exp
  71d3ee0645552a8ac482152d2cf671b1  gcc/testsuite/gcc.misc-tests/arm-isr.c
! d43914c217c3c87b8dce2d1da56a9089  gcc/testsuite/gcc.misc-tests/arm-isr.exp
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  769b91c7738037eb489394524ae54796  gcc/testsuite/gcc.misc-tests/bprob-2.c
! 6a5eabcde1ecf24aa56b3dc3540165d9  gcc/testsuite/gcc.misc-tests/bprob.exp
! c4d0a69800848a2a9ab885f0ce284489  gcc/testsuite/gcc.misc-tests/dectest.exp
  a11bded9860644075434da1f07b7f1bf  gcc/testsuite/gcc.misc-tests/dhry.c
! f56508935669fa43ea4f48f40503d446  gcc/testsuite/gcc.misc-tests/dhry.exp
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  02aa6ab9e158e9fa6e94768d75bd86cb  gcc/testsuite/gcc.misc-tests/gcov-1.c
  44d73a2d21081bbe1b4c64084331ec77  gcc/testsuite/gcc.misc-tests/gcov-10.c
--- 43575,43589 ----
  ce7181a37e4abd0831a2d47b7a9a11f2  gcc/testsuite/gcc.dg/zero_bits_compound-2.c
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  4e040b1868690b5543136a52a2f030b3  gcc/testsuite/gcc.misc-tests/acker1.c
! 463b9c522fc88e32154f2060f1055a85  gcc/testsuite/gcc.misc-tests/acker1.exp
  71d3ee0645552a8ac482152d2cf671b1  gcc/testsuite/gcc.misc-tests/arm-isr.c
! c11b02a9a39bb7462075df15388533bc  gcc/testsuite/gcc.misc-tests/arm-isr.exp
  69ee82e02b642cb6edfac2cec4b99756  gcc/testsuite/gcc.misc-tests/bprob-1.c
  769b91c7738037eb489394524ae54796  gcc/testsuite/gcc.misc-tests/bprob-2.c
! 667f4a3146556c0200aead5847b0ac8d  gcc/testsuite/gcc.misc-tests/bprob.exp
! 37489da2bf01b900a63d17c763369513  gcc/testsuite/gcc.misc-tests/dectest.exp
  a11bded9860644075434da1f07b7f1bf  gcc/testsuite/gcc.misc-tests/dhry.c
! a575c77b1d9f82007a4a6922727bf4f0  gcc/testsuite/gcc.misc-tests/dhry.exp
  850c45b3c3b492adf09b115c0d2d2286  gcc/testsuite/gcc.misc-tests/dhry.h
  02aa6ab9e158e9fa6e94768d75bd86cb  gcc/testsuite/gcc.misc-tests/gcov-1.c
  44d73a2d21081bbe1b4c64084331ec77  gcc/testsuite/gcc.misc-tests/gcov-10.c
*************** c80d5a6473bfd6e4b6e87a183c6d05b5  gcc/te
*** 41076,41112 ****
  772680c804fa85a46b0e530f2d7f0bd2  gcc/testsuite/gcc.misc-tests/gcov-pr85350.c
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! f21abc8cdc4e8f206f3223f9681fa0f6  gcc/testsuite/gcc.misc-tests/gcov.exp
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! 66a55cb2a8a837e67d3476ee1bca5530  gcc/testsuite/gcc.misc-tests/godump.exp
! bca11211a1e0b5ec7cd44c15721639fc  gcc/testsuite/gcc.misc-tests/help.exp
  6d43a784cf19762437a5b9baec4d4095  gcc/testsuite/gcc.misc-tests/i386-pf-3dnow-1.c
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! 28edacbe5d71da7ff69f6cc82dfe296c  gcc/testsuite/gcc.misc-tests/i386-prefetch.exp
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  4020995d3b08e117c48c529d5bc0b3ec  gcc/testsuite/gcc.misc-tests/linkage-y.c
! 10c3508a9aab10af641f34d69abea2c3  gcc/testsuite/gcc.misc-tests/linkage.exp
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! a0651f99e031cd5764bb8404100f1a8a  gcc/testsuite/gcc.misc-tests/matrix1.exp
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! 756750b6e8b9e14116dc8e387e2524c6  gcc/testsuite/gcc.misc-tests/mg-2.exp
  fb7a4e029ce05eea8ba0f03f9033caa2  gcc/testsuite/gcc.misc-tests/mg.c
! 978fd1ad54813bcd2746c73d1a5a2407  gcc/testsuite/gcc.misc-tests/mg.exp
! c5ee3a7bd3886ff0a066dd52ce3b5731  gcc/testsuite/gcc.misc-tests/options.exp
! d594d0bcfbec0f2f5da292272c421b58  gcc/testsuite/gcc.misc-tests/output.exp
  37d75aade49dd3329803e520456ae8a6  gcc/testsuite/gcc.misc-tests/sieve.c
! b44c3873110ce0c73540ffbd3ef5b6e8  gcc/testsuite/gcc.misc-tests/sieve.exp
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! 5582767fdafc804e0caf8b29b3a44f2d  gcc/testsuite/gcc.misc-tests/sort2.exp
! 2694a823c2faf419ed6e63aacc920568  gcc/testsuite/gcc.src/maintainers.exp
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  d365d8bf0f5478b04e6451262cf0b804  gcc/testsuite/gcc.target/aarch64/_Float16_3.c
! f820d1e7c801beb04fd7c1767fe2fce5  gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp
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  c708255687954aa3e3174b83b89e4e66  gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h
  ab893b67ef591ba6b84bda6885255075  gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.S
--- 43614,43653 ----
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! ce15b46ef3abd924c340b60b46880630  gcc/testsuite/gcc.misc-tests/gcov-pr90574-1.c
! b4c981ce038b4aba05421ca069c8e20f  gcc/testsuite/gcc.misc-tests/gcov-pr90574-2.c
! a9b5b247c9afa5f3405401c1d53aa392  gcc/testsuite/gcc.misc-tests/gcov-pr94029.c
! 116ad9d64a165ebe7206a84968c24ff6  gcc/testsuite/gcc.misc-tests/gcov.exp
  d0c60992e0ef331502b84f8ee13cb818  gcc/testsuite/gcc.misc-tests/gcovpart-13b.c
  c025e19eef5de6d1113602a62a565bcb  gcc/testsuite/gcc.misc-tests/godump-1.c
! 00d0b8f5d5ebd5e16a8445e601423a71  gcc/testsuite/gcc.misc-tests/godump.exp
! ebd90981856c05c102862c713868edcf  gcc/testsuite/gcc.misc-tests/help.exp
  6d43a784cf19762437a5b9baec4d4095  gcc/testsuite/gcc.misc-tests/i386-pf-3dnow-1.c
  4a06f6c2d9b50ef414030d175fbe9d5c  gcc/testsuite/gcc.misc-tests/i386-pf-athlon-1.c
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  81ac61201db56efd77fdfd14cf2e4266  gcc/testsuite/gcc.misc-tests/i386-pf-sse-1.c
! 6ddaf95b415b75f703cf57e66a378bf3  gcc/testsuite/gcc.misc-tests/i386-prefetch.exp
  51bca646196e93b1c8a68319441e0595  gcc/testsuite/gcc.misc-tests/linkage-x.c
  4020995d3b08e117c48c529d5bc0b3ec  gcc/testsuite/gcc.misc-tests/linkage-y.c
! 4b46a08d3969176e1bbebd5a9b582f33  gcc/testsuite/gcc.misc-tests/linkage.exp
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*************** d63d966901b8e8b51837691645468a2c  gcc/te
*** 41190,41200 ****
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*************** bf28a9ad5feaa7564970d3116eaae230  gcc/te
*** 41203,41208 ****
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*** 41210,41217 ****
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*************** d0067cab29fcc180c3d02bb10cf4733a  gcc/te
*** 41242,41247 ****
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*** 41334,41339 ****
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*** 41366,41371 ****
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*** 41601,41606 ****
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*** 41687,41692 ****
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*** 41708,41745 ****
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*************** f0d278d66f3c6d099e299ada3c0f2f5a  gcc/te
*** 41802,41809 ****
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--- 44389,44394 ----
*************** daa118ed7835c32ea71c32e65d22689f  gcc/te
*** 41813,41818 ****
--- 44398,44404 ----
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*************** bd03ecf6b19690f6dc1bbbd227d20b37  gcc/te
*** 41849,41857 ****
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--- 44435,44443 ----
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*************** c3c69a71f2670cdbe2550868228987d2  gcc/te
*** 41863,41868 ****
--- 44449,44455 ----
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*************** a1212235242dd12baac6ac6d3f0f04ad  gcc/te
*** 41870,41876 ****
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--- 44457,44463 ----
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*************** ed2b38705092e36a5984e33769be3d5a  gcc/te
*** 41897,41903 ****
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--- 44484,44490 ----
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*************** a5cfe0849b43ef498cda6a872be26cb6  gcc/te
*** 41942,41949 ****
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--- 44529,44536 ----
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*************** cb35ae597b395ee5d00d96a082dfbd6a  gcc/te
*** 41957,41962 ****
--- 44544,44550 ----
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*************** fb19dd57034e67da13f2a5b22815fcc5  gcc/te
*** 41973,41985 ****
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--- 44561,44589 ----
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*************** d6e1d0cb7cb44f50985db131c62ba20b  gcc/te
*** 41988,41999 ****
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*************** d8cfefc063686118062e9fc3b774907b  gcc/te
*** 42005,42011 ****
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--- 44612,44618 ----
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*************** c8f85510fcedfd5fda7fe58be4530841  gcc/te
*** 42015,42021 ****
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*************** b28ad75ae030029f6a891f12b81c0ebf  gcc/te
*** 42025,42037 ****
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*************** d1d34ae8edbb84b094c7f011971b77f4  gcc/te
*** 42049,42067 ****
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*************** b452d4c86751bd11bf03b8ca21d25bf4  gcc/te
*** 42084,42089 ****
--- 44717,44724 ----
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*************** fed45a34e01f1c902eebbb4525b2026f  gcc/te
*** 42132,42138 ****
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--- 44767,44775 ----
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*************** a675084fb22386c9d27ff4bd900947af  gcc/te
*** 42186,42191 ****
--- 44823,44829 ----
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*************** deb0f552af79b96da8822d2e2a318406  gcc/te
*** 42321,42327 ****
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*************** bbebb9db67423c357de8f5f58bd02217  gcc/te
*** 42394,42399 ****
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*************** d8cba6fbd72082d21194a1854f6c2dfc  gcc/te
*** 42504,42509 ****
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*************** c54f879c066e04b82029f41822144815  gcc/te
*** 42517,42539 ****
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*************** adb1c4e7d709c64ebafff36700e610bf  gcc/te
*** 42573,42598 ****
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*************** d4b0fcf49dbdac56043aee98347c8ccf  gcc/te
*** 42603,42628 ****
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--- 47140,47313 ----
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*************** ac09afb9d04d8d3255ac30bd518ee86c  gcc/te
*** 42631,42638 ****
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--- 47316,47325 ----
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*************** f18be1e7abbda4855f72a61ca0933ab7  gcc/te
*** 42651,42684 ****
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--- 47338,47420 ----
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*************** ab2c2f8b2b4f63ff5400dfcc4b0cff0a  gcc/te
*** 42687,42713 ****
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--- 47423,47451 ----
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*************** c3c73f67d4a871e058128bdf98c37ce8  gcc/te
*** 42715,42720 ****
--- 47453,47469 ----
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*************** a9b508d7c966ec3fcd19cd8e6508d364  gcc/te
*** 42729,42735 ****
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--- 47478,47484 ----
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*************** bd0ea7412913a5ce083ddea4613bd169  gcc/te
*** 42737,42788 ****
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--- 47486,47735 ----
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! e43559e2d1e3f4501969de6baac08396  gcc/testsuite/gcc.target/aarch64/sve/sel_1.c
! 06ca71f4ad9a00901e2748c697b17f26  gcc/testsuite/gcc.target/aarch64/sve/sel_2.c
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! ea96e0c3148179cba37c3aa8410afe8f  gcc/testsuite/gcc.target/aarch64/sve/single_1.c
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! f7ebb6b139ec5de7aac9309c7c1525fb  gcc/testsuite/gcc.target/aarch64/sve/single_4.c
! bf79046a3aad0fcf1f8a4f5794b74c44  gcc/testsuite/gcc.target/aarch64/sve/single_5.c
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  df29a45b5ee2033132b0a6f7d96ebfe3  gcc/testsuite/gcc.target/aarch64/sve/slp_10_run.c
*************** df29a45b5ee2033132b0a6f7d96ebfe3  gcc/te
*** 42790,42812 ****
  a859ea80596a38af45ac60b162ed9e8a  gcc/testsuite/gcc.target/aarch64/sve/slp_11_run.c
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! 85f8d36d22c3f4498c208ce806bd95df  gcc/testsuite/gcc.target/aarch64/sve/slp_4.c
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--- 47737,47761 ----
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! 7b3f2d7cfa1df13babcf7eb0767a2a1b  gcc/testsuite/gcc.target/aarch64/sve/slp_7.c
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*************** d20b7524d251213c0a38ee4072095889  gcc/te
*** 42818,42830 ****
  00e962f4f434f1a0a41c352a562a2082  gcc/testsuite/gcc.target/aarch64/sve/slp_perm_5.c
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--- 47767,47783 ----
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*************** e46489e97fa0b54c4ca2d629d83b5ae0  gcc/te
*** 42848,42854 ****
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! 22f142d97c8882e0757377e93141b0a7  gcc/testsuite/gcc.target/aarch64/sve/struct_vect_1.c
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--- 47801,47807 ----
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*************** a9c969a56d96703e9c1652d8ad2eb379  gcc/te
*** 42857,42882 ****
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! 4afc18b4e55dc06d6fe1097a0f226cf3  gcc/testsuite/gcc.target/aarch64/sve/struct_vect_20.c
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--- 47810,47837 ----
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+ fa1efebb3448a51087f75dad039f117c  gcc/testsuite/gcc.target/aarch64/sve/struct_vect_25.c
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  e73177f3815fd6df9d8dbb470ff3a8fc  gcc/testsuite/gcc.target/aarch64/sve/struct_vect_3.c
  506898e882d90b53364e1a754b8de11d  gcc/testsuite/gcc.target/aarch64/sve/struct_vect_3_run.c
*************** cc66db52598c3198cc422a997bd1d21a  gcc/te
*** 42886,42904 ****
  eb56da9bd87f2d55c23d889df94ec01d  gcc/testsuite/gcc.target/aarch64/sve/struct_vect_5_run.c
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! dc3d2ce3572bcc8e0fd8bd028c402b08  gcc/testsuite/gcc.target/aarch64/sve/struct_vect_7.c
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! 2fec9a56ba2b9f6f7071c3f34335ed9b  gcc/testsuite/gcc.target/aarch64/sve/tls_1.c
! 46559e16a65cdd0c38d9a6349fb1f08c  gcc/testsuite/gcc.target/aarch64/sve/tls_preserve_1.c
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--- 47841,47862 ----
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  d48fbe456a044db6f77d528c49f340ac  gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c
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  86f81c6caf2f36b49b15df5be29bf154  gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c
*************** b57de878cb338939c71466f3393bfaf2  gcc/te
*** 42907,42929 ****
  e7a3b62d81ab7c0991182b370fdfe06f  gcc/testsuite/gcc.target/aarch64/sve/unpack_float_1_run.c
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! 7a787217330aa9bf19c7bce37ff82bef  gcc/testsuite/gcc.target/aarch64/sve/unroll-1.c
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! 2b953dd8076f08815dc6dc6c9cad864e  gcc/testsuite/gcc.target/aarch64/sve/var_stride_5.c
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--- 47865,47887 ----
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*************** e75b1a176eb77ade401935c1937d86aa  gcc/te
*** 42945,42956 ****
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--- 47903,47927 ----
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*************** dd1e6bbf22f1b03feb2bfdbae38cab23  gcc/te
*** 42962,42968 ****
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--- 47933,47939 ----
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*************** ed24813645562316311675bf8409cfc5  gcc/te
*** 42975,43002 ****
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  c850677a06284224d4f4c40ffd5e4d78  gcc/testsuite/gcc.target/aarch64/target_attr_13.c
--- 47946,48849 ----
  cbb22a935d1768837f5969eca674b5f8  gcc/testsuite/gcc.target/aarch64/sve/vec_perm_const_single_1_run.c
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  c5724f6767410c7983d266d6febb0f89  gcc/testsuite/gcc.target/aarch64/sve/zip2_1.c
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*************** e305e52e017cd5650701a9b9bac24e7e  gcc/te
*** 43046,43067 ****
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--- 48893,48918 ----
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*************** a5b09578629531d465aefeed46ebae10  gcc/te
*** 43077,43083 ****
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*************** bfe5a6a3a53aebcbe2f24517d1b04256  gcc/te
*** 43103,43114 ****
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*************** ee90316f15da27e84e8dc325bd4f951f  gcc/te
*** 43125,43133 ****
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*************** c1dc1c8c4bf53ce9009691cb397b17fb  gcc/te
*** 43146,43152 ****
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*************** df24aaf6990690613ac293de5fa4ddf7  gcc/te
*** 43164,43169 ****
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*************** ae3dcb9a10323462d2895ea14f4c6684  gcc/te
*** 43185,43190 ****
--- 49051,49057 ----
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*************** bdc07c3b7e37cb1f5eca49bd24a3eebb  gcc/te
*** 43210,43216 ****
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*************** a28c8b957006268fb63ac90eaea21d90  gcc/te
*** 43236,43244 ****
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--- 49103,49112 ----
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*************** f3d5bb074433ff2d4f9c3f90f9567173  gcc/te
*** 43249,43268 ****
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  d9d9cdf928da4c195b1a99dad0aeda06  gcc/testsuite/gcc.target/arc/extzv-1.c
--- 49117,49137 ----
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! 65ca7be5ea8689cbdcf92614c6de946b  gcc/testsuite/gcc.target/arc/builtin_special.c
! bb7a791bb8f7d701826fe6c83b5f1134  gcc/testsuite/gcc.target/arc/cmem-1.c
! 2ecd7dba64a9e26909f498d810795595  gcc/testsuite/gcc.target/arc/cmem-2.c
! bd39d7ea4bbdf756f00c64418819d0ae  gcc/testsuite/gcc.target/arc/cmem-3.c
! 3e0f69999e2e2f77eb5c042d6901c307  gcc/testsuite/gcc.target/arc/cmem-4.c
! 2c7bb43f251133cfd44ce5e008b81309  gcc/testsuite/gcc.target/arc/cmem-5.c
! 600ced6e894ecf31bc6a299091c4f43c  gcc/testsuite/gcc.target/arc/cmem-6.c
! aa6ec7f6707a89398a8906edce377481  gcc/testsuite/gcc.target/arc/cmem-7.c
! d07620cd1b0aefd0ce0a68df905f1326  gcc/testsuite/gcc.target/arc/cmem-bit-1.c
! 1741597f8c520b6f74ae4bdbefd0ec9c  gcc/testsuite/gcc.target/arc/cmem-bit-2.c
! 222f4de98ec8055ff626d9a46f44fabd  gcc/testsuite/gcc.target/arc/cmem-bit-3.c
! 8e3a27e131109aaa0ecc9625e8aebfda  gcc/testsuite/gcc.target/arc/cmem-bit-4.c
  2dba2d912122a8f853d97a923bb125e3  gcc/testsuite/gcc.target/arc/cmem-ld.inc
  8b3e31bdfff2b63ce252635b1a1fef0b  gcc/testsuite/gcc.target/arc/cmem-st.inc
+ 093c1c334d43cf719378e187c501d944  gcc/testsuite/gcc.target/arc/code-density-flag.c
  ab3e3c633530b0e2e02f20e76907cab4  gcc/testsuite/gcc.target/arc/cond-set-use.c
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  d9d9cdf928da4c195b1a99dad0aeda06  gcc/testsuite/gcc.target/arc/extzv-1.c
*************** fea7af7c12eb392f30364e1362155d21  gcc/te
*** 43276,43300 ****
  d84b29a4749c8b59782ed7037960886b  gcc/testsuite/gcc.target/arc/ieee_eq.c
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! b97101315961770a5bfbae54b66fb095  gcc/testsuite/gcc.target/arc/interrupt-2.c
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! 284c4cedd9e9e0ed6a221207243da328  gcc/testsuite/gcc.target/arc/interrupt-6.c
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! cae073faa43ba2e88254be94d1d39771  gcc/testsuite/gcc.target/arc/jumptable.c
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  a8139c5c60e1336d6ba8fd0f2cd5b87e  gcc/testsuite/gcc.target/arc/loop-2.cpp
  1fad00abdca4d484b02390b9c329a802  gcc/testsuite/gcc.target/arc/loop-3.c
! b45c8f2c4ae3c4f46070bb3af210950d  gcc/testsuite/gcc.target/arc/loop-4.c
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--- 49145,49172 ----
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! b873d0236afe2211776bd0aadeaad46f  gcc/testsuite/gcc.target/arc/interrupt-1.c
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! fe91b7a5e3e42548ea63eac34802f611  gcc/testsuite/gcc.target/arc/interrupt-11.c
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! 6eeda426d6eb6b6a008ea7873fac75a6  gcc/testsuite/gcc.target/arc/interrupt-2.c
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! 49d68e1fffa52f59b4f27912a5e4b9ad  gcc/testsuite/gcc.target/arc/interrupt-6.c
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! 7bd7a1ae5730df6f4b83af79178fc9ac  gcc/testsuite/gcc.target/arc/jumptable.c
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! 8ea24c8a496a1109505e25a0a0ec5c7d  gcc/testsuite/gcc.target/arc/loop-4.c
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*************** ae51b6b5a108bba0cb65d3dc53bff451  gcc/te
*** 43311,43316 ****
--- 49183,49189 ----
  192440eda1391192d213ce180fce09d2  gcc/testsuite/gcc.target/arc/mlock.c
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  6739e90bc4c37813db369ce1cbdaa285  gcc/testsuite/gcc.target/arc/mno-swape.c
+ 92ea564ed06521579b3aa117d0890dcc  gcc/testsuite/gcc.target/arc/mov-cnst-size.c
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*************** abff871d7facfcd96c4548d2b844d539  gcc/te
*** 43319,43325 ****
  a529c2ffb799aba9d11091bc1d38ee4f  gcc/testsuite/gcc.target/arc/movb_cl-1.c
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! b9e60c3be695ca77b70c23640caf49d6  gcc/testsuite/gcc.target/arc/movh_cl-1.c
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--- 49192,49198 ----
  a529c2ffb799aba9d11091bc1d38ee4f  gcc/testsuite/gcc.target/arc/movb_cl-1.c
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! ea02e52a5a6f8e2ca3e8ad695065812f  gcc/testsuite/gcc.target/arc/movh_cl-1.c
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*************** b443447704f4a7b7a2a5c8b97db22640  gcc/te
*** 43329,43334 ****
--- 49202,49208 ----
  34220358acee31a93fc8c97863057d7f  gcc/testsuite/gcc.target/arc/mtune-ARC700.c
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*************** a55caab34589aaad4b44c2b23036a38a  gcc/te
*** 43336,43344 ****
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--- 49210,49220 ----
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*************** f46cb560bbbdee851a633b3344aff41c  gcc/te
*** 43350,43359 ****
  94045df90a584be70ae8b5c31fc5f8d1  gcc/testsuite/gcc.target/arc/pr9001195952.c
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! 201289f92c06ff98f44dfe1bff65dc38  gcc/testsuite/gcc.target/arc/store-merge-1.c
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--- 49226,49235 ----
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! a5cf816ec09509d297751d31b4352ce6  gcc/testsuite/gcc.target/arc/store-merge-1.c
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*************** f948016cf876549e5e3dcd87acd07370  gcc/te
*** 43366,43381 ****
  0132211f61d93c2298ed30bc70d7f411  gcc/testsuite/gcc.target/arc/tls-ie.c
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! 865a53800c3a49b204bdc5fb750927bd  gcc/testsuite/gcc.target/arc/tmac-1.c
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--- 49242,49263 ----
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! 4aa4bea5182116d7d0462ac78d6f669e  gcc/testsuite/gcc.target/arc/uncached-6.c
! 332845dfd09bbcad8877874819a30ba1  gcc/testsuite/gcc.target/arc/uncached-7.c
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*************** ef9f57aa4598e8037d2f89e8b57c2cae  gcc/te
*** 43383,43393 ****
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--- 49265,49275 ----
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*************** b03843d0bfb6128e2d6e634be21c3021  gcc/te
*** 43441,43447 ****
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--- 49323,49339 ----
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*************** a7f2e5349eb3677d4e532197beb261b8  gcc/te
*** 43452,43458 ****
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--- 49344,49351 ----
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*************** eee783c37d90eef12bf5d89dd9e9f34c  gcc/te
*** 43465,43470 ****
--- 49358,49367 ----
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*************** fc648f69779c2ae9f4075ca8aed84b4f  gcc/te
*** 43472,43497 ****
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--- 49369,49404 ----
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*************** fc8506cad4c77b4468d913131234b8df  gcc/te
*** 43540,43559 ****
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--- 49447,49484 ----
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*************** f842ae48d03fd71d6c4251ee6b88d526  gcc/te
*** 43577,43583 ****
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--- 49502,49509 ----
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*************** a4114cf2b3bd0ac0af3dffbbe0b40004  gcc/te
*** 43592,43600 ****
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--- 49518,49526 ----
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*************** fc541d9ca530164540b9c0bb80ff85ca  gcc/te
*** 43602,43655 ****
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--- 49528,49610 ----
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  37ee43df70f4d07a257b2684561a574c  gcc/testsuite/gcc.target/arm/cond_sub_restrict_it.c
*************** abba2731624485a0118e2059f5e1c67a  gcc/te
*** 43663,43672 ****
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! c97957d5055b769e33db9c2b1b4e6165  gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c
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--- 49618,49627 ----
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*************** e4e7e97477f4d414552607a539ce1961  gcc/te
*** 43675,43689 ****
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--- 49630,49644 ----
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*************** e95ad2780e346935674e8e065a322d1d  gcc/te
*** 43696,43711 ****
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--- 49651,49666 ----
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*************** fa6149240da5ae9d25d5d2d6e93393e0  gcc/te
*** 43718,43724 ****
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--- 49673,49679 ----
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*************** a60c72361842412ed806a9caeafedd5b  gcc/te
*** 43738,43813 ****
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--- 49693,49768 ----
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*************** fb74916eb6e0ebd03586703f23fac8ab  gcc/te
*** 43819,43845 ****
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--- 49774,52272 ----
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*************** dd0827774a767586a558dee375d638d3  gcc/te
*** 43934,43941 ****
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*************** d7019254e0a959946abcf1e603ca08f4  gcc/te
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*************** ae7f616dfc9c4cb975cbf5c12a0f4568  gcc/te
*** 43962,43977 ****
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--- 52389,52404 ----
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*************** d744fbeefa1a3fbcff67f43fc4dddd53  gcc/te
*** 43984,44000 ****
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--- 52411,52427 ----
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*************** db113e481c58caf33310175aa4c066d0  gcc/te
*** 44009,44028 ****
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--- 52436,52455 ----
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*************** ba50e02461bee64efbeb4ab6a3ee0cbb  gcc/te
*** 44034,44050 ****
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--- 52461,52477 ----
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*************** e5aafcaef63ec87ca861c2c3df04f753  gcc/te
*** 44056,44083 ****
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--- 52483,52512 ----
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*************** c6644644f11735f6f9c0967e73bd841d  gcc/te
*** 44092,44131 ****
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--- 52521,52577 ----
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*************** d8c65564dadfe634fbccc16d228dc48d  gcc/te
*** 44159,44164 ****
--- 52605,52611 ----
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*************** ef25288c2b54da64c38a1e366d4bef97  gcc/te
*** 44266,44282 ****
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--- 52713,52730 ----
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*************** c4133ce7c37295b55bc19679306f4e04  gcc/te
*** 44287,44293 ****
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--- 52735,52741 ----
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*************** b4fab83bf7109a1294a6bd49a7d8724a  gcc/te
*** 44297,44304 ****
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--- 52745,52752 ----
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*************** e94286eccc733d11a63447fdd9bada99  gcc/te
*** 44320,44333 ****
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  73e3760e48e9bc177a5f6e0dd330dd67  gcc/testsuite/gcc.target/arm/unaligned-memcpy-3.c
  792dc2802acd07e46a1a21cf396e6868  gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c
  d51794c8e800a1494a43aad0663fc8ec  gcc/testsuite/gcc.target/arm/unsigned-extend-1.c
  46c7f501ed039d63fcee18f5ba757f0c  gcc/testsuite/gcc.target/arm/unsigned-extend-2.c
! db6e7805a03575eaf8f294253b3b7d57  gcc/testsuite/gcc.target/arm/unsigned-float.c
  dd7bfde900d68546e1d3dd468f37370b  gcc/testsuite/gcc.target/arm/va_list.c
  cc0bc7a437b1048adcd2bbb500c8613f  gcc/testsuite/gcc.target/arm/vect-copysignf.c
  fc4b69778fc737ef010c991d12b1dc42  gcc/testsuite/gcc.target/arm/vect-fmaxmin.c
--- 52768,52785 ----
  322a379899bf637c0e26cbe1eb644603  gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-4.c
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  661cd52deb4f860aae4c6c1b1e062e57  gcc/testsuite/gcc.target/arm/tls-disable-literal-pool.c
! 8c4e1adcc09890f586a23b8ae5bcb775  gcc/testsuite/gcc.target/arm/tlscall.c
! bbfeab1d19ae8a86996efa5896bc515a  gcc/testsuite/gcc.target/arm/unaligned-argument-1.c
! 07b58b9d3cae47b57b137b31a0ea472c  gcc/testsuite/gcc.target/arm/unaligned-argument-2.c
! fbe22b395d333c931f6971e0905a0c77  gcc/testsuite/gcc.target/arm/unaligned-argument-3.c
  bdd3a0dd9f0c4286036efac7a3dbaeca  gcc/testsuite/gcc.target/arm/unaligned-memcpy-1.c
  e14b9a30fa811436ecb6aa988c9a5305  gcc/testsuite/gcc.target/arm/unaligned-memcpy-2.c
  73e3760e48e9bc177a5f6e0dd330dd67  gcc/testsuite/gcc.target/arm/unaligned-memcpy-3.c
  792dc2802acd07e46a1a21cf396e6868  gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c
  d51794c8e800a1494a43aad0663fc8ec  gcc/testsuite/gcc.target/arm/unsigned-extend-1.c
  46c7f501ed039d63fcee18f5ba757f0c  gcc/testsuite/gcc.target/arm/unsigned-extend-2.c
! b00b4662ffae7d58b94d4e89e964e8c3  gcc/testsuite/gcc.target/arm/unsigned-float.c
! dafe3f438a1a1630e53458e22dbec6bc  gcc/testsuite/gcc.target/arm/usadv16qi.c
  dd7bfde900d68546e1d3dd468f37370b  gcc/testsuite/gcc.target/arm/va_list.c
  cc0bc7a437b1048adcd2bbb500c8613f  gcc/testsuite/gcc.target/arm/vect-copysignf.c
  fc4b69778fc737ef010c991d12b1dc42  gcc/testsuite/gcc.target/arm/vect-fmaxmin.c
*************** f54354bf39395de458fef63aa726c12c  gcc/te
*** 44341,44370 ****
  a146fdabdb2ad719360157740f40af65  gcc/testsuite/gcc.target/arm/vect-rounding-roundf.c
  96ac2b1029f45a3cc392b052c3cd7cc8  gcc/testsuite/gcc.target/arm/vect-vcvt.c
  f955867badc1233a269b216d0256bd56  gcc/testsuite/gcc.target/arm/vect-vcvtq.c
! 8c5ac0d8e523d83e2c92b0a2d4c8e441  gcc/testsuite/gcc.target/arm/vfp-1.c
! d2ddd9f00aa7a0ad9e2820dc1193f961  gcc/testsuite/gcc.target/arm/vfp-ldmdbd.c
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! ed2ef7c840d9e4d1d48e068265c47830  gcc/testsuite/gcc.target/arm/vfp-ldmiad.c
  87a33317c8651232cbf2e5d43f644e20  gcc/testsuite/gcc.target/arm/vfp-ldmias.c
! b9e9de5096e9a8f5cd08694523c50990  gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c
  bf42171b2503f369299464f1d9f7a8f1  gcc/testsuite/gcc.target/arm/vfp-shift-a2t2.c
! 513a08d8c68e8bd743d34a3725a0eb75  gcc/testsuite/gcc.target/arm/vfp-stmdbd.c
  6e3f1e4ca84fd79ca1e8796a761b92c0  gcc/testsuite/gcc.target/arm/vfp-stmdbs.c
! 555c47f31004ac585fea5b377e38ce85  gcc/testsuite/gcc.target/arm/vfp-stmiad.c
  bc2188a68537cad2525cdffa2300cddd  gcc/testsuite/gcc.target/arm/vfp-stmias.c
  04ade67f5744f8d10fde52c91eb65897  gcc/testsuite/gcc.target/arm/vmaxnmdf.c
  8dec4ac072bfa73e2b0c5e888050b7eb  gcc/testsuite/gcc.target/arm/vmaxnmsf.c
  dd8585fa6a69bc874124f5b7d89d3bba  gcc/testsuite/gcc.target/arm/vminnmdf.c
  c259b498f3ce93031d726eead78cbd0d  gcc/testsuite/gcc.target/arm/vminnmsf.c
! daa04fe1f9f88fd9c9c6a4f32bccaa7b  gcc/testsuite/gcc.target/arm/vnmul-1.c
  6bcf887e4f15974dc875c3222b9ffa69  gcc/testsuite/gcc.target/arm/vnmul-2.c
! 3857da505ac76ac854f174878cba361d  gcc/testsuite/gcc.target/arm/vnmul-3.c
! e92a0af6e01cc56fd2427f58f616f5f3  gcc/testsuite/gcc.target/arm/vnmul-4.c
  ad889dc702c92663961bc564b883d787  gcc/testsuite/gcc.target/arm/volatile-bitfields-1.c
  05c3589a49c42a1f66dba99c2e67575f  gcc/testsuite/gcc.target/arm/volatile-bitfields-2.c
  f0d030e6fbffef2383334d1424090ccf  gcc/testsuite/gcc.target/arm/volatile-bitfields-3.c
  56d8ff7bdf563dcd918699bd8ae01ee9  gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
! 245f8ad63a6a2e1b6fb8d8e3a2b7554f  gcc/testsuite/gcc.target/arm/vrinta-ce.c
  22c159438f9959b6666b395d5c6aecbe  gcc/testsuite/gcc.target/arm/vrintaf32.c
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  7ae924766d744675519935afb228f3db  gcc/testsuite/gcc.target/arm/vrintmf32.c
--- 52793,52822 ----
  a146fdabdb2ad719360157740f40af65  gcc/testsuite/gcc.target/arm/vect-rounding-roundf.c
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! 1f2a4883d08756b5ace27238e8ee9a74  gcc/testsuite/gcc.target/arm/vfp-1.c
! ebbb43e440e5971041834a23169caac0  gcc/testsuite/gcc.target/arm/vfp-ldmdbd.c
  30ab9af6e1b1729e2c1b8413367a3fa4  gcc/testsuite/gcc.target/arm/vfp-ldmdbs.c
! f4b9784160ea0c2e72f63ddd73a913c6  gcc/testsuite/gcc.target/arm/vfp-ldmiad.c
  87a33317c8651232cbf2e5d43f644e20  gcc/testsuite/gcc.target/arm/vfp-ldmias.c
! 6aab555c8ab627770158f9155aaf41ce  gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c
  bf42171b2503f369299464f1d9f7a8f1  gcc/testsuite/gcc.target/arm/vfp-shift-a2t2.c
! c3144262ca8ae51dd8e24aa341583b41  gcc/testsuite/gcc.target/arm/vfp-stmdbd.c
  6e3f1e4ca84fd79ca1e8796a761b92c0  gcc/testsuite/gcc.target/arm/vfp-stmdbs.c
! 387f17be069248d3f80094a94fb70f5b  gcc/testsuite/gcc.target/arm/vfp-stmiad.c
  bc2188a68537cad2525cdffa2300cddd  gcc/testsuite/gcc.target/arm/vfp-stmias.c
  04ade67f5744f8d10fde52c91eb65897  gcc/testsuite/gcc.target/arm/vmaxnmdf.c
  8dec4ac072bfa73e2b0c5e888050b7eb  gcc/testsuite/gcc.target/arm/vmaxnmsf.c
  dd8585fa6a69bc874124f5b7d89d3bba  gcc/testsuite/gcc.target/arm/vminnmdf.c
  c259b498f3ce93031d726eead78cbd0d  gcc/testsuite/gcc.target/arm/vminnmsf.c
! da2672dc543645f70a2b702e3cdc7a27  gcc/testsuite/gcc.target/arm/vnmul-1.c
  6bcf887e4f15974dc875c3222b9ffa69  gcc/testsuite/gcc.target/arm/vnmul-2.c
! a35ae5ce28e7aac03394920bbc3a6c01  gcc/testsuite/gcc.target/arm/vnmul-3.c
! c038e6aca5279322a4f81e3e0870bcdc  gcc/testsuite/gcc.target/arm/vnmul-4.c
  ad889dc702c92663961bc564b883d787  gcc/testsuite/gcc.target/arm/volatile-bitfields-1.c
  05c3589a49c42a1f66dba99c2e67575f  gcc/testsuite/gcc.target/arm/volatile-bitfields-2.c
  f0d030e6fbffef2383334d1424090ccf  gcc/testsuite/gcc.target/arm/volatile-bitfields-3.c
  56d8ff7bdf563dcd918699bd8ae01ee9  gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
! ff14f375f3415d01a476840f37b062b0  gcc/testsuite/gcc.target/arm/vrinta-ce.c
  22c159438f9959b6666b395d5c6aecbe  gcc/testsuite/gcc.target/arm/vrintaf32.c
  c9f286d71ee58c4562f8ce595d9435f7  gcc/testsuite/gcc.target/arm/vrintaf64.c
  7ae924766d744675519935afb228f3db  gcc/testsuite/gcc.target/arm/vrintmf32.c
*************** c31e8b0106f900f8bce4e273cb710835  gcc/te
*** 44377,44398 ****
  969de1e1bf75a0e92f917cd5c2152af9  gcc/testsuite/gcc.target/arm/vrintxf64.c
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  c6c58491d97b8c9256e3ae06f0cf4443  gcc/testsuite/gcc.target/arm/vrintzf64.c
! 2e842ad671f33905c99101398f034870  gcc/testsuite/gcc.target/arm/vseleqdf.c
! 720654b1ef67cb135f957e74fef869d4  gcc/testsuite/gcc.target/arm/vseleqsf.c
! d6be86e089f16db5edd9ee6a31ba96ad  gcc/testsuite/gcc.target/arm/vselgedf.c
! b2e5bf1ff283787e479181d88fe079a8  gcc/testsuite/gcc.target/arm/vselgesf.c
! 9f016b0fac058bf40696e5ba7d12f7c1  gcc/testsuite/gcc.target/arm/vselgtdf.c
! 24bf79acb23d6b0b635e2b8eca94a59e  gcc/testsuite/gcc.target/arm/vselgtsf.c
! 758aa1974ffacf5813d109b4da70cb32  gcc/testsuite/gcc.target/arm/vselledf.c
! eea1cebb335a3cf06b9a0c80523161d0  gcc/testsuite/gcc.target/arm/vsellesf.c
! 3a628b1f112a6f2dbdaac01a244746e7  gcc/testsuite/gcc.target/arm/vselltdf.c
! 4af4ad0909c285838584136cd4a7f97b  gcc/testsuite/gcc.target/arm/vselltsf.c
! daf187fe3974ff7ffdac1c3f06522642  gcc/testsuite/gcc.target/arm/vselnedf.c
! 0a198ee5027722586fe4c521938d953b  gcc/testsuite/gcc.target/arm/vselnesf.c
! 88f258f259b2f9a10f906fe7981b0888  gcc/testsuite/gcc.target/arm/vselvcdf.c
! 4c9f516b25293df101af1c0dd7164c5d  gcc/testsuite/gcc.target/arm/vselvcsf.c
! 7fdd2fdf58fb80afce3559956be7c5bb  gcc/testsuite/gcc.target/arm/vselvsdf.c
! 2b9729bb60b1bf17baa59b0285d0c0e5  gcc/testsuite/gcc.target/arm/vselvssf.c
  c5de64de34bce5c38e28d8d0b9873f6b  gcc/testsuite/gcc.target/arm/vst1Q_laneu64-1.c
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  0aaf975f20a521ee7c274eff95ff69a6  gcc/testsuite/gcc.target/arm/wmul-10.c
--- 52829,52850 ----
  969de1e1bf75a0e92f917cd5c2152af9  gcc/testsuite/gcc.target/arm/vrintxf64.c
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  c6c58491d97b8c9256e3ae06f0cf4443  gcc/testsuite/gcc.target/arm/vrintzf64.c
! c28efda4f101232927dad98f2af99194  gcc/testsuite/gcc.target/arm/vseleqdf.c
! dc5d113d704c8ffbc6250e21699fc4be  gcc/testsuite/gcc.target/arm/vseleqsf.c
! 19f58f8b0585ed11f2fafc441b688ada  gcc/testsuite/gcc.target/arm/vselgedf.c
! cb459c8ed10edac4313514f089d866b7  gcc/testsuite/gcc.target/arm/vselgesf.c
! a1469f8468db517b22876924e0453d23  gcc/testsuite/gcc.target/arm/vselgtdf.c
! aec6d586637084691e9822a74575e426  gcc/testsuite/gcc.target/arm/vselgtsf.c
! 3e586d488a461ee6c21c10318bff0161  gcc/testsuite/gcc.target/arm/vselledf.c
! f5534b9688c54ec7f37fd48bfc69b398  gcc/testsuite/gcc.target/arm/vsellesf.c
! 22740180c3661c510041232817aeeed9  gcc/testsuite/gcc.target/arm/vselltdf.c
! 98b4cff79758742d80ef6108ca7470bc  gcc/testsuite/gcc.target/arm/vselltsf.c
! ace8bcc51bbfae135b6255e2e7ba37c9  gcc/testsuite/gcc.target/arm/vselnedf.c
! f7ddbb02eca21f0153951e77fa18c998  gcc/testsuite/gcc.target/arm/vselnesf.c
! eabea0bdc0a360dd025ac3407a977804  gcc/testsuite/gcc.target/arm/vselvcdf.c
! a1eb3d92e95425b6b3239620babbdf5e  gcc/testsuite/gcc.target/arm/vselvcsf.c
! 1342251aa241832a48cb357fe5ab90d7  gcc/testsuite/gcc.target/arm/vselvsdf.c
! 53aa90dc7dbcbc9553905cf494d4db8e  gcc/testsuite/gcc.target/arm/vselvssf.c
  c5de64de34bce5c38e28d8d0b9873f6b  gcc/testsuite/gcc.target/arm/vst1Q_laneu64-1.c
  0665a6d6110de6db4658cd54498eb35a  gcc/testsuite/gcc.target/arm/wmul-1.c
  0aaf975f20a521ee7c274eff95ff69a6  gcc/testsuite/gcc.target/arm/wmul-10.c
*************** c75ed40c88ef10849c23f953624d1ae2  gcc/te
*** 44411,44421 ****
  5c6680598a83083cd8ee0c39ad5821bf  gcc/testsuite/gcc.target/arm/wmul-bitfield-2.c
  a1131491d67160098e775860b91e3021  gcc/testsuite/gcc.target/arm/xor-and.c
  79a594a642e89de4c3a753867b50cf54  gcc/testsuite/gcc.target/arm/xordi3-opt.c
! 456aa9203d08deb2ee4ffd648fa0f8e3  gcc/testsuite/gcc.target/avr/avr.exp
  a6701935d18c8ed062555c8a48454bc9  gcc/testsuite/gcc.target/avr/dev-specific-rmw.c
  2028ceccf9f97e5e84e9adf6beb7597e  gcc/testsuite/gcc.target/avr/exit-abort.h
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! 9055ea063d515d1a79067791a23baff0  gcc/testsuite/gcc.target/avr/mmcu/avr-mmcu.exp
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  8172209b564aa8049ce5758eac60cc46  gcc/testsuite/gcc.target/avr/mmcu/tiny-caller-save.c
  80cabd0a89ca2c48055ae61bc82b633e  gcc/testsuite/gcc.target/avr/mmcu/tiny-memx.c
--- 52863,52873 ----
  5c6680598a83083cd8ee0c39ad5821bf  gcc/testsuite/gcc.target/arm/wmul-bitfield-2.c
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! 3ef5a326d3d15aeac57a1675746462b2  gcc/testsuite/gcc.target/avr/avr.exp
  a6701935d18c8ed062555c8a48454bc9  gcc/testsuite/gcc.target/avr/dev-specific-rmw.c
  2028ceccf9f97e5e84e9adf6beb7597e  gcc/testsuite/gcc.target/avr/exit-abort.h
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! a83cc83bbd633b6ee5bf09b292dae2b6  gcc/testsuite/gcc.target/avr/mmcu/avr-mmcu.exp
  421d2b9b36fa2496dce05d129d2c352b  gcc/testsuite/gcc.target/avr/mmcu/pr58545.c
  8172209b564aa8049ce5758eac60cc46  gcc/testsuite/gcc.target/avr/mmcu/tiny-caller-save.c
  80cabd0a89ca2c48055ae61bc82b633e  gcc/testsuite/gcc.target/avr/mmcu/tiny-memx.c
*************** d5c8fd29fb9b2ff9d36bac3d01f75b13  gcc/te
*** 44447,44453 ****
  f91d8c4774a3ac3e49934378e0629b52  gcc/testsuite/gcc.target/avr/pr71873.c
  675750e3e482b5f5103d79510bfe2e28  gcc/testsuite/gcc.target/avr/pr88253.c
  881cb1836ddfc3105e0aacacc481aa09  gcc/testsuite/gcc.target/avr/progmem-error-1.c
! e3ffeba102da544a9fa5162047b373ad  gcc/testsuite/gcc.target/avr/progmem-error-1.cpp
  56de611fd29076ce9da389a853476819  gcc/testsuite/gcc.target/avr/progmem-warning-1.c
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  2b06671686db85920f5618751e2f29b6  gcc/testsuite/gcc.target/avr/torture/addr-space-1-0.c
--- 52899,52905 ----
  f91d8c4774a3ac3e49934378e0629b52  gcc/testsuite/gcc.target/avr/pr71873.c
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! 57cf0cd622a50ae70434f57249214c0a  gcc/testsuite/gcc.target/avr/progmem-error-1.cpp
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  2b06671686db85920f5618751e2f29b6  gcc/testsuite/gcc.target/avr/torture/addr-space-1-0.c
*************** e2ddf19981b44595d911d7d384c3824f  gcc/te
*** 44460,44466 ****
  53dfc94573110c2220b0a51c076fda55  gcc/testsuite/gcc.target/avr/torture/addr-space-2-g.c
  6fb32c1fcefb2d5260347dc067759686  gcc/testsuite/gcc.target/avr/torture/addr-space-2-x.c
  a0d24b6b729b3316832b85d84ee2f113  gcc/testsuite/gcc.target/avr/torture/addr-space-2.h
! d60b4c9a4c89689483fd678ede870b12  gcc/testsuite/gcc.target/avr/torture/avr-torture.exp
  8fb103e22590dcf8f557336ecf8d0b5d  gcc/testsuite/gcc.target/avr/torture/builtin_insert_bits-1.c
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--- 52912,52918 ----
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! 3fb68ef56e9bbc9004ef77f635a7e366  gcc/testsuite/gcc.target/avr/torture/avr-torture.exp
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  6f7a316d69505eb726fcfadde1df3047  gcc/testsuite/gcc.target/avr/torture/builtins-1.c
*************** b132d1738c80be39010cd2b0314aba73  gcc/te
*** 44520,44526 ****
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  bf1c248fa1b1520ecdeed5e768375da7  gcc/testsuite/gcc.target/bfin/arith.c
! dfaf3263b1f7ed2c59f049657a49ed77  gcc/testsuite/gcc.target/bfin/bfin.exp
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  9b9ec1d751f1617d55d1098c8c77391b  gcc/testsuite/gcc.target/bfin/builtins/abs_fr1x16-2.c
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--- 52972,52978 ----
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*************** fe4d87c005f4281c70950e298d2332d6  gcc/te
*** 44533,44539 ****
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--- 52985,52991 ----
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*************** b7e44f629992ef6eb090866310307190  gcc/te
*** 44727,44737 ****
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--- 53179,53305 ----
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*************** da811515083d9ddf056500903ebb758b  gcc/te
*** 44740,44758 ****
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--- 53308,53362 ----
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! c49f946c5bf608d1b2b902816143ae30  gcc/testsuite/gcc.target/cris/cris.exp
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! f3ad51748d4588b4b3ed7dac29cbed61  gcc/testsuite/gcc.target/cris/sync-1-v10.c
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*************** b08e4db62a9fb0f97ea3211c38828a92  gcc/te
*** 44762,44768 ****
  15c2184b2d93ca52db7d62e0d1643cc6  gcc/testsuite/gcc.target/cris/sync-4i.c
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! 3eb0d0ddb7d4012d518cf9a0e82339fb  gcc/testsuite/gcc.target/cris/torture/cris-torture.exp
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--- 53366,53372 ----
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! 46a388844603565c93002dcf057ed2bc  gcc/testsuite/gcc.target/cris/torture/cris-torture.exp
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*************** b7155a676b316d828ff12c2c503fd59c  gcc/te
*** 44804,44810 ****
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--- 53408,53414 ----
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*************** d314e10078acacca0634c35cf325bf1f  gcc/te
*** 44817,44823 ****
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--- 53421,53427 ----
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*************** d7f2f60c2c464ec7133704d0b8deb86d  gcc/te
*** 44858,44875 ****
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--- 53462,53480 ----
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*************** ba54f9b0c866b8f8b35145c85e815cee  gcc/te
*** 44890,44896 ****
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--- 53495,53501 ----
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*************** a3e554dab8a93a4d3090e2c2ca07addf  gcc/te
*** 44900,44908 ****
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--- 53505,53513 ----
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*************** ba2b0a148c01cb904bce54c8c192a35b  gcc/te
*** 44918,44928 ****
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--- 53523,53533 ----
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*************** d3f15f077bac4fdd98e262ff70319e29  gcc/te
*** 44990,45004 ****
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--- 53595,53610 ----
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*************** c34fe5a5178e9716c0f68ffb47564686  gcc/te
*** 45013,45027 ****
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--- 53619,53633 ----
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*************** ae728a63491324c9279e2facbffccbb7  gcc/te
*** 45031,45049 ****
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--- 53637,53661 ----
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*************** ab15d222e706bd85c87c037d1e9b6f51  gcc/te
*** 45059,45077 ****
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--- 53671,53690 ----
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*************** f0863fb8f23bebdbacbfd59947bc3392  gcc/te
*** 45108,45115 ****
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--- 53721,53736 ----
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*************** cd5932f7a525e4a13b1b235ef16ce52b  gcc/te
*** 45539,45545 ****
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*************** eff00a81e6cb0010baf6a32b833b0772  gcc/te
*** 45648,45654 ****
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*** 45660,45667 ****
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*************** ac1c6f23df451df8715f98348ab41e7b  gcc/te
*** 45984,45991 ****
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*************** aaef10fa24c4bc67258e89962335eaed  gcc/te
*** 45996,46002 ****
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*************** f55df70acaaa1a05030d45495848eb2b  gcc/te
*** 46015,46020 ****
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*************** c3390538a58df83dc92017cf0b4fd3fb  gcc/te
*** 46087,46095 ****
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*** 46356,46361 ****
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*** 46408,46419 ****
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*************** e6a2d08517354a6475d26db37dba85e2  gcc/te
*** 46520,46532 ****
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--- 55177,55189 ----
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*************** f87a131592c4947fafb6dc93f2da20e6  gcc/te
*** 46541,46553 ****
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--- 55198,55210 ----
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*************** a667779f55bbe4353e3c110dc1ba9d88  gcc/te
*** 46586,46595 ****
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--- 55243,55252 ----
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*************** a940544da86cef217be8f69bb1db86fd  gcc/te
*** 46699,46714 ****
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--- 55356,55374 ----
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*************** d8c6cc28d2c4d257bb954582a66146d4  gcc/te
*** 46748,46753 ****
--- 55408,55414 ----
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*************** db071ed8613b1b2492ad9f75d6fcb5f2  gcc/te
*** 46760,46770 ****
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--- 55421,55432 ----
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*************** cfc57dcbbde8b4d4956d3ef4c768f651  gcc/te
*** 46805,46811 ****
--- 55467,55475 ----
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*************** b5e4cd18a2247fe8c73f3ec6f8f9beb7  gcc/te
*** 46897,46902 ****
--- 55561,55572 ----
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*************** d1a053f1f9637b75161602a5c9712e41  gcc/te
*** 46910,46922 ****
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--- 55580,55592 ----
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*************** e9f4c9cc42db02d2214993bdf2ef8f6c  gcc/te
*** 47031,47039 ****
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--- 55701,55709 ----
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*************** e37e49d4cca1522d9cf91e660ec08113  gcc/te
*** 47389,47398 ****
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--- 56059,56068 ----
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*************** a211ab10a3faac2cd055fdacc95d4e1d  gcc/te
*** 47577,47587 ****
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--- 56247,56264 ----
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*************** b592affd9524490683f039e2abeddc73  gcc/te
*** 47750,47756 ****
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--- 56427,56433 ----
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*************** eabbc544080fb302e2fecc6e142d6fda  gcc/te
*** 47939,47945 ****
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--- 56616,56622 ----
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*************** c292ba048c97e84fe04aa26984af35f1  gcc/te
*** 48267,48272 ****
--- 56944,56954 ----
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*************** a9b1dee6ec200856939709d32118cf4d  gcc/te
*** 48375,48381 ****
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--- 57057,57063 ----
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*************** cea11696ef142db69b8f42a4c09771ed  gcc/te
*** 48388,48393 ****
--- 57070,57078 ----
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*************** f5b6283707f17b1db37120fd03d9ecf7  gcc/te
*** 48450,48456 ****
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--- 57135,57141 ----
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*************** ce70c4a119d14c06b2fe42a33e116033  gcc/te
*** 48459,48464 ****
--- 57144,57150 ----
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  73d516febd7b11c39305fc45aeb62e82  gcc/testsuite/gcc.target/i386/defines-2.c
*************** b70c3474dab5c950386d01ff0714762f  gcc/te
*** 48471,48476 ****
--- 57157,57164 ----
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*************** e92fdec416f1fffea62b5521bede2f6d  gcc/te
*** 48579,48584 ****
--- 57267,57273 ----
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*************** c7969e1cd5d8b5cc915431d457857508  gcc/te
*** 48592,48600 ****
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--- 57281,57289 ----
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*************** e568a5a5a42fe8f2689ee4853ca2b1f6  gcc/te
*** 48615,48621 ****
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--- 57304,57311 ----
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*************** ebc315087303e52034dda4e281f500fd  gcc/te
*** 48636,48643 ****
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  824179ec90e1e4fdb872aed133f8d523  gcc/testsuite/gcc.target/i386/iamcu/args.h
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--- 57326,57333 ----
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! 28780d113a36ada27244d9b405f661f1  gcc/testsuite/gcc.target/i386/i386.exp
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*************** b56cbb83f01d0feeec0ec874e60a703c  gcc/te
*** 48677,48720 ****
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--- 57367,57410 ----
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*************** a09ada0e82af6f6e6522d77d6b3e549d  gcc/te
*** 48724,48730 ****
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--- 57414,57420 ----
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*************** aaf9fa29e6ae7c08a17245ee0ed31402  gcc/te
*** 48751,48758 ****
  e1e94bdb4c71e6af78d1a98fbee98499  gcc/testsuite/gcc.target/i386/interrupt-387-err-2.c
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--- 57441,57448 ----
  e1e94bdb4c71e6af78d1a98fbee98499  gcc/testsuite/gcc.target/i386/interrupt-387-err-2.c
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  84e919a811bf0126248d9ed6ec609a5f  gcc/testsuite/gcc.target/i386/interrupt-5.c
! c730df5f075d47e0709251194392510e  gcc/testsuite/gcc.target/i386/interrupt-6.c
! b717775fdf3fe009b8d77efe1fb114b4  gcc/testsuite/gcc.target/i386/interrupt-7.c
  31f2838c853f3afae9c8caee5a594c4e  gcc/testsuite/gcc.target/i386/interrupt-8.c
  8e995490e0319f3e718a691f9a237941  gcc/testsuite/gcc.target/i386/interrupt-9.c
  acfd195237a4ce2a0cc03304f4873e80  gcc/testsuite/gcc.target/i386/interrupt-iamcu.c
*************** c598c1d2a127be1189b3dfe020919429  gcc/te
*** 48800,48817 ****
  35441e347bb826ad23a3351b9d27ab6e  gcc/testsuite/gcc.target/i386/l_fma_4.h
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  eac1520d63168ec113d984cb604b8417  gcc/testsuite/gcc.target/i386/l_fma_6.h
! 0cf8c37410ad34e6ae881cc44efa446f  gcc/testsuite/gcc.target/i386/l_fma_double_1.c
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! 6b9dd503c7ad0b9b814334542b1d0f5c  gcc/testsuite/gcc.target/i386/l_fma_double_4.c
! 335d517235dc147253b96d8c4f0049aa  gcc/testsuite/gcc.target/i386/l_fma_double_5.c
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! 5815db36c88a750cafa13bb312070faa  gcc/testsuite/gcc.target/i386/l_fma_float_1.c
! dab834653baa5e5778f1307112ee6b1a  gcc/testsuite/gcc.target/i386/l_fma_float_2.c
! fcc05c0789c0d8e2fe563d9534773eb4  gcc/testsuite/gcc.target/i386/l_fma_float_3.c
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! fb726ad2e82f9bce924e8faef86ea29c  gcc/testsuite/gcc.target/i386/l_fma_float_6.c
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  0aa07ff1659ac84aa05c4ae647131787  gcc/testsuite/gcc.target/i386/l_fma_run_double_2.c
--- 57490,57507 ----
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! fc3d323e6cb043547544c6c54532b2ac  gcc/testsuite/gcc.target/i386/l_fma_double_2.c
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! e60ab50fe9363a3681f760929a4d581e  gcc/testsuite/gcc.target/i386/l_fma_double_5.c
! 6ba0ba36fd6d591717ab761ede9ecc30  gcc/testsuite/gcc.target/i386/l_fma_double_6.c
! 604afa026116d58bdca07eae82a90515  gcc/testsuite/gcc.target/i386/l_fma_float_1.c
! c1fe35e400b4fdc5ebdc0ce5cfa494c6  gcc/testsuite/gcc.target/i386/l_fma_float_2.c
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! ecdf0f9c3bcf4973584d4383c8aa0efb  gcc/testsuite/gcc.target/i386/l_fma_float_4.c
! 68fa5a48222d05a35e09be32de7695fc  gcc/testsuite/gcc.target/i386/l_fma_float_5.c
! e6fafe40c467d23612698719b24591d5  gcc/testsuite/gcc.target/i386/l_fma_float_6.c
  2ba947ad943c8a25bd6804f8b7dbd4ea  gcc/testsuite/gcc.target/i386/l_fma_main.h
  bc3bafc23926bd98c116f5db64518ac5  gcc/testsuite/gcc.target/i386/l_fma_run_double_1.c
  0aa07ff1659ac84aa05c4ae647131787  gcc/testsuite/gcc.target/i386/l_fma_run_double_2.c
*************** e5ecd53e0c76cc760ad01be1a9813369  gcc/te
*** 48875,48903 ****
  e259d35e40662e2b47b740df3c6dba01  gcc/testsuite/gcc.target/i386/m256-2.c
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  10899c0994276f068f304098b9a5216f  gcc/testsuite/gcc.target/i386/m512-check.h
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  2b719a429ba467512cb34ad73352ab1f  gcc/testsuite/gcc.target/i386/math-torture/lfloor.c
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! 6dbb540b9d490a151c607172d7ae43b6  gcc/testsuite/gcc.target/i386/mcount_pic.c
  cda0d89452347311cc45a79be2d8f0fc  gcc/testsuite/gcc.target/i386/memcpy-1.c
  6497cb2d22febb00a904f50025d863bd  gcc/testsuite/gcc.target/i386/memcpy-2.c
  536862ceddae932e3d7da830f0866d31  gcc/testsuite/gcc.target/i386/memcpy-3.c
! 39eae588cd264db47b4b4188c56710e7  gcc/testsuite/gcc.target/i386/memcpy-strategy-1.c
! 29f6565471ceb4dea82eb41bb79559df  gcc/testsuite/gcc.target/i386/memcpy-strategy-2.c
! 9724a363e64e9b37caa5ac0cf2159afd  gcc/testsuite/gcc.target/i386/memcpy-strategy-3.c
  6e857b4eb94b8707c380e73efcbc5a51  gcc/testsuite/gcc.target/i386/memcpy-strategy-4.c
! c311ee7acf008e98e58f5984f29e567b  gcc/testsuite/gcc.target/i386/memcpy-vector_loop-1.c
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--- 57565,57594 ----
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  10899c0994276f068f304098b9a5216f  gcc/testsuite/gcc.target/i386/m512-check.h
! 05d056ee8da06b7cd789ad1baf16efb0  gcc/testsuite/gcc.target/i386/mask-pack.c
! 51e6a5e239bab889631495c5d9329866  gcc/testsuite/gcc.target/i386/mask-unpack.c
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! a6b47b9058d94486dc2a38b18f78a62f  gcc/testsuite/gcc.target/i386/math-torture/math-torture.exp
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+ df67a62d776122baa97424f200b31fd5  gcc/testsuite/gcc.target/i386/math_m_pi.h
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! f08c3f5ff2d2d97f5970228622db7e3b  gcc/testsuite/gcc.target/i386/mcount_pic.c
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  536862ceddae932e3d7da830f0866d31  gcc/testsuite/gcc.target/i386/memcpy-3.c
! b5176a7f12717b0fd4c9162a139871e9  gcc/testsuite/gcc.target/i386/memcpy-strategy-1.c
! b001554c0c381f992911b1e7a465a6b8  gcc/testsuite/gcc.target/i386/memcpy-strategy-2.c
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! 5a0fd04cbd019d9f36835345ab0db6ad  gcc/testsuite/gcc.target/i386/memcpy-vector_loop-1.c
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  5d42d8053ea9c0f90ccef1a5662638be  gcc/testsuite/gcc.target/i386/memset-strategy-1.c
*************** e34fc4954adf255e63dd959604f68e95  gcc/te
*** 48905,48912 ****
  abacd2e1491b7c40915d4be18c0229b4  gcc/testsuite/gcc.target/i386/memset-vector_loop-1.c
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! 5901488d802f78cfffd81ab843738bc0  gcc/testsuite/gcc.target/i386/minmax-1.c
! ab7e9b978e011765dd401246a4bcf52f  gcc/testsuite/gcc.target/i386/minmax-2.c
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--- 57596,57608 ----
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! c4570886a9f211d78bbdd2e42072c902  gcc/testsuite/gcc.target/i386/minmax-1.c
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! 5760adec235bd90e28e149784a2dd119  gcc/testsuite/gcc.target/i386/minmax-4.c
! d4c118eef6b8875d77744f1ffe44777e  gcc/testsuite/gcc.target/i386/minmax-5.c
! 036d7236e17ac64b72e0827de729208e  gcc/testsuite/gcc.target/i386/minmax-6.c
! 07ceb25b9f45c41125f7a2b2889a6e5c  gcc/testsuite/gcc.target/i386/minmax-7.c
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  4055fe9aaa6fd07185517c33ca6dbd5b  gcc/testsuite/gcc.target/i386/mmx-3.c
*************** de3950b0d3ffe8898e7b6973a7658470  gcc/te
*** 48917,48922 ****
--- 57613,57619 ----
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*************** f1c5e85f0666bfee3b907279ee87147f  gcc/te
*** 48951,48957 ****
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--- 57648,57654 ----
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  8c4bd037860d3567dcbeae3ff5197511  gcc/testsuite/gcc.target/i386/naked-4.c
*************** f91cf99532e69c383485f6be3f62eb99  gcc/te
*** 49002,49012 ****
  5d062b099437fb64de565760ffa381a8  gcc/testsuite/gcc.target/i386/pieces-memcpy-1.c
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! 4b575ad12fc95ee5c89f0d5e6c4233c9  gcc/testsuite/gcc.target/i386/pieces-memcpy-4.c
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! e03d6e3c25da66db5f070dce7d907a1b  gcc/testsuite/gcc.target/i386/pieces-memcpy-6.c
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! 36b813a940b2c87070255be03db22966  gcc/testsuite/gcc.target/i386/pieces-strcpy-2.c
  13d06bee88f2ccd2a16effe0c243e61e  gcc/testsuite/gcc.target/i386/pow-1.c
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--- 57699,57709 ----
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! 698986063dd5ba005476ca849de14359  gcc/testsuite/gcc.target/i386/pieces-memcpy-4.c
! 5e90eca9009d511850fb8fc840c7e236  gcc/testsuite/gcc.target/i386/pieces-memcpy-5.c
! 592f55f6e3184576f7ecadf1df7171df  gcc/testsuite/gcc.target/i386/pieces-memcpy-6.c
  b1d366c21cfdcfacf9854ed6cbfd7bc3  gcc/testsuite/gcc.target/i386/pieces-strcpy-1.c
! 52e52549556117888f85f13d26ced39b  gcc/testsuite/gcc.target/i386/pieces-strcpy-2.c
  13d06bee88f2ccd2a16effe0c243e61e  gcc/testsuite/gcc.target/i386/pow-1.c
  304b7d185da41754f69656f5bfa7d508  gcc/testsuite/gcc.target/i386/pr11001-memcpy-1.c
  7dbe55f1460795545dd744807466a430  gcc/testsuite/gcc.target/i386/pr11001-memcpy-2.c
*************** a644b45bbd84c706db471958d241d23c  gcc/te
*** 49039,49045 ****
  fdacb6b61a5d36e161500b14166654ae  gcc/testsuite/gcc.target/i386/pr21101.c
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! 873aea068e102b2d11c7796945eba0e6  gcc/testsuite/gcc.target/i386/pr22076.c
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--- 57736,57742 ----
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! 486433461cd9a624886848368977cc4b  gcc/testsuite/gcc.target/i386/pr22076.c
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  8ba2071af1172c3cd6d8259c589bc794  gcc/testsuite/gcc.target/i386/pr22362.c
*************** e9e5f9369a4a36e10da6f34dbcd56fe6  gcc/te
*** 49071,49077 ****
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*************** b377ae5d921fa8f709c57f224660094a  gcc/te
*** 49079,49087 ****
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*************** a07b3ac10c2e8d8960d5f94aacc75325  gcc/te
*** 49092,49098 ****
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*************** cc52fb6e855215f99580b9fa0002669f  gcc/te
*** 49176,49182 ****
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*************** b253a78ddc2f7032eea9f84d43dc8bf7  gcc/te
*** 49194,49200 ****
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*************** d32570c003f58ce2ec08183c2a643b33  gcc/te
*** 49305,49311 ****
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*************** b853e1ca0f109e9670d15ca18915f967  gcc/te
*** 49402,49407 ****
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*************** c7f426034d9df3b9350c1df80138c8dc  gcc/te
*** 49460,49466 ****
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*************** e7fa1acfad0b8a48a5001c624a4c21f1  gcc/te
*** 49469,49475 ****
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*************** a17ccd72f220b8c9cad5ec50f149fc9f  gcc/te
*** 49570,49576 ****
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*************** c2179fbbe68a40ce1e3486b98db6a47f  gcc/te
*** 49583,49589 ****
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*************** e05ae6facbbbf26826893a785e206bc4  gcc/te
*** 49602,49608 ****
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*************** ed977b2e07a2b51f6a0171f6ad454c88  gcc/te
*** 49745,49751 ****
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*************** f6aed10f35c73b007f503bc7420b6c99  gcc/te
*** 49762,49768 ****
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--- 58469,58475 ----
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*************** a9c6395b5501af8f7e41af6ddea5ede0  gcc/te
*** 49889,49902 ****
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*************** c4cb305cf2f30dad2b94791d7bb26ef4  gcc/te
*** 49967,49973 ****
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--- 58674,58680 ----
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*************** e9d6922230050e7efcb4180dddeb82a9  gcc/te
*** 49998,50004 ****
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--- 58705,58711 ----
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*************** b07b394258dbc532fd012fffb78369a7  gcc/te
*** 50006,50012 ****
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--- 58713,58720 ----
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*************** c5d91f720ac19a39b21200b7763ea25f  gcc/te
*** 50040,50048 ****
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--- 58748,58756 ----
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*************** d6e8f07014049c7252f4c148c6810778  gcc/te
*** 50051,50065 ****
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*************** af640e6417bda894b964dcafe04ebb19  gcc/te
*** 50076,50082 ****
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--- 58784,58790 ----
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*************** be4886fc2cd0dbd18a9cbd38f8d6690d  gcc/te
*** 50117,50123 ****
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--- 58825,58831 ----
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*************** c69c3bea82e3b6d7058e5910c4e290f2  gcc/te
*** 50133,50143 ****
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*************** b5540c2e6c4aa6f5730ae17876c12e1f  gcc/te
*** 50423,50435 ****
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--- 59272,59284 ----
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*************** f660e67b22cb44e6a6b38a247b1d78c3  gcc/te
*** 50438,50446 ****
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--- 59287,59295 ----
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*************** d577617bdd4e8a2de2ec9b6e4bde1eb4  gcc/te
*** 50518,50524 ****
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--- 59367,59373 ----
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*************** de64abbae5fd84b85677810337b1ac54  gcc/te
*** 50530,50536 ****
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--- 59379,59385 ----
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*************** a483238e8a216ddeb00c43d4921dd054  gcc/te
*** 50556,50562 ****
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--- 59405,59411 ----
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*************** de4aecf22a8108ad2498b7a0761ed800  gcc/te
*** 50564,50569 ****
--- 59413,59514 ----
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*************** d5b818f965db3f8a6fee907b748785d9  gcc/te
*** 50588,50594 ****
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--- 59533,59539 ----
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*************** ae0d76797c5135e83ce818bce0003cfa  gcc/te
*** 50631,50636 ****
--- 59576,59587 ----
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*************** bc284489629affc959c93b03096c8e25  gcc/te
*** 50668,50675 ****
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--- 59619,59626 ----
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*************** c86c2814d0ff9e3e7807177c93e54cdf  gcc/te
*** 50682,50688 ****
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--- 59633,59639 ----
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  29e42097b8a8d6b6700b13e1bd99e89d  gcc/testsuite/gcc.target/i386/sse2-ucomisd-1.c
*************** dc9066a5a4e2651d9a9a03c5eef62f20  gcc/te
*** 50701,50706 ****
--- 59652,59665 ----
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  cf2e3b0d340c93e5f24fdb8924b47313  gcc/testsuite/gcc.target/i386/sse3-addsubps.c
*************** e74162d2e3d68b7ced7d0745c7adc4f2  gcc/te
*** 50714,50728 ****
  d82d917b914b989a4f437aca582f09a3  gcc/testsuite/gcc.target/i386/sse3-movshdup.c
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  e18bbd1a575dbb964c9953896983e6c4  gcc/testsuite/gcc.target/i386/sse4_1-blendpd.c
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  c8f77182ca7b638d5f7f35990da2e267  gcc/testsuite/gcc.target/i386/sse4_1-blendvpd.c
  fe57d22375ffb7148d4dc74eb9c59bb2  gcc/testsuite/gcc.target/i386/sse4_1-blendvps.c
! 2fd30df4e5eb7f043759f4615bbe8f13  gcc/testsuite/gcc.target/i386/sse4_1-builtin-fp-int-inexact.c
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  f03f1c5c800ade5a67c6bc62e11af9f1  gcc/testsuite/gcc.target/i386/sse4_1-check.h
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  9ddb2e537bb1bb7e004e4a9b9f4811ed  gcc/testsuite/gcc.target/i386/sse4_1-dppd-1.c
--- 59673,59687 ----
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! bb5b589d410f6f0506a3518bacc349ee  gcc/testsuite/gcc.target/i386/sse4_1-ceilf-vec.c
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  9ddb2e537bb1bb7e004e4a9b9f4811ed  gcc/testsuite/gcc.target/i386/sse4_1-dppd-1.c
*************** c02a941c79edb39084bbaf9f960bac57  gcc/te
*** 50730,50739 ****
  85fe7d813bb2272acff7d0b46e242100  gcc/testsuite/gcc.target/i386/sse4_1-dpps-1.c
  66b6c730b921ea3995168077066c87e3  gcc/testsuite/gcc.target/i386/sse4_1-dpps-2.c
  35ce467d38798f3c28597c26ccb59b4d  gcc/testsuite/gcc.target/i386/sse4_1-extractps.c
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! ffc97967e3da1413e3683c4f3e18510b  gcc/testsuite/gcc.target/i386/sse4_1-floorf-vec.c
  3f14907ce2fa5cc9febdb63b89492f7d  gcc/testsuite/gcc.target/i386/sse4_1-init-v16qi-1.c
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  8f3390d1b4b53a23ee7608e2d7647fca  gcc/testsuite/gcc.target/i386/sse4_1-init-v4sf-1.c
--- 59689,59698 ----
  85fe7d813bb2272acff7d0b46e242100  gcc/testsuite/gcc.target/i386/sse4_1-dpps-1.c
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  35ce467d38798f3c28597c26ccb59b4d  gcc/testsuite/gcc.target/i386/sse4_1-extractps.c
! e50f71e1c33a8add2dbb9af08cc5bcc1  gcc/testsuite/gcc.target/i386/sse4_1-floor-sfix-vec.c
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! bdae5ff1d18a830901bb43d664174dd6  gcc/testsuite/gcc.target/i386/sse4_1-floorf-vec.c
  3f14907ce2fa5cc9febdb63b89492f7d  gcc/testsuite/gcc.target/i386/sse4_1-init-v16qi-1.c
  5900f29c5ea41c98405b4f812fb3d908  gcc/testsuite/gcc.target/i386/sse4_1-init-v2di-1.c
  8f3390d1b4b53a23ee7608e2d7647fca  gcc/testsuite/gcc.target/i386/sse4_1-init-v4sf-1.c
*************** d4ab1edd600792f99ba9af1f339877b2  gcc/te
*** 50789,50821 ****
  d6174210a0855a4b9107fb58c0e03942  gcc/testsuite/gcc.target/i386/sse4_1-pr88189-2.c
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  839d2ec94fbd1d01290fff5be102952c  gcc/testsuite/gcc.target/i386/sse4_1-ptest-3.c
! 1165a8369228e2a73f07453bc7149f8b  gcc/testsuite/gcc.target/i386/sse4_1-rint-inline.c
! 9db30f93f19c25f9c553607a2b4dd00c  gcc/testsuite/gcc.target/i386/sse4_1-rint-sfix-vec.c
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! 0fa36e1e1a968f130febd492cf8e9ad2  gcc/testsuite/gcc.target/i386/sse4_1-round-sfix-vec.c
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! fcead79c0d1fa57164ab5fe297fd2928  gcc/testsuite/gcc.target/i386/sse4_1-roundpd-1.c
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! 79c6231dadc438ed7b4ccd357ca72cdd  gcc/testsuite/gcc.target/i386/sse4_1-roundsd-3.c
! 74cfd15e7b6a3ab931a818773a00c0e0  gcc/testsuite/gcc.target/i386/sse4_1-roundsd-4.c
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! 8f6ad05dc54729a62d84391cc2bd6c0c  gcc/testsuite/gcc.target/i386/sse4_1-roundss-4.c
  3780996f94038b72a23c5aed3f15be08  gcc/testsuite/gcc.target/i386/sse4_1-set-epi32-1.c
  963e3faf66328b410f758c7a5c7c850b  gcc/testsuite/gcc.target/i386/sse4_1-set-epi64x-1.c
  4373f42f0f945ec90967f45607801c5a  gcc/testsuite/gcc.target/i386/sse4_1-set-ps-1.c
--- 59748,59784 ----
  d6174210a0855a4b9107fb58c0e03942  gcc/testsuite/gcc.target/i386/sse4_1-pr88189-2.c
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  bb5484db46d5db1bc08e3be71a124faf  gcc/testsuite/gcc.target/i386/sse4_1-pr88547-2.c
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  839d2ec94fbd1d01290fff5be102952c  gcc/testsuite/gcc.target/i386/sse4_1-ptest-3.c
! 6408e72a864871562196b6c57a9cad38  gcc/testsuite/gcc.target/i386/sse4_1-rint-inline.c
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! 96571436fc8c7b9a7f85bd0ad5506772  gcc/testsuite/gcc.target/i386/sse4_1-roundf-sfix-vec.c
! 3f487f917dd440c199852d47237d6990  gcc/testsuite/gcc.target/i386/sse4_1-roundf-vec.c
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! 49b9cd9477d96fa4e0b55dabcedc9e19  gcc/testsuite/gcc.target/i386/sse4_1-roundsd-3.c
! fd3b33fd84346bf0b8d462c1febb06fb  gcc/testsuite/gcc.target/i386/sse4_1-roundsd-4.c
! 7bad23f99a420ebadc75b7ca543fbcd2  gcc/testsuite/gcc.target/i386/sse4_1-roundss-1.c
! 8635659cc14c8dfcf6009e3f37b002a4  gcc/testsuite/gcc.target/i386/sse4_1-roundss-2.c
! 0b39d205615b227b3790655133abacdf  gcc/testsuite/gcc.target/i386/sse4_1-roundss-3.c
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  3780996f94038b72a23c5aed3f15be08  gcc/testsuite/gcc.target/i386/sse4_1-set-epi32-1.c
  963e3faf66328b410f758c7a5c7c850b  gcc/testsuite/gcc.target/i386/sse4_1-set-epi64x-1.c
  4373f42f0f945ec90967f45607801c5a  gcc/testsuite/gcc.target/i386/sse4_1-set-ps-1.c
*************** caaaf4c14670457ed369a39f6c06e9a9  gcc/te
*** 50825,50832 ****
  ff4a381ee5305c9a18c5754c13c12790  gcc/testsuite/gcc.target/i386/sse4_1-set-v16qi-2a.c
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  a2f5b0c7365f7c93751ba3a6aa3eee83  gcc/testsuite/gcc.target/i386/sse4_1-set-v16qi-3a.c
! 79c72314a82b6b2e667ea7a46959f6e6  gcc/testsuite/gcc.target/i386/sse4_1-trunc-vec.c
! 5be3f44e1073128be29793ede501127e  gcc/testsuite/gcc.target/i386/sse4_1-truncf-vec.c
  230f39e76bb95b9a1d8bb7d9bb28cd63  gcc/testsuite/gcc.target/i386/sse4_2-check.h
  78e9bfaad4304fbf531902e93985b629  gcc/testsuite/gcc.target/i386/sse4_2-crc32.h
  24e0c81587a981203de0c814fe1c7ed4  gcc/testsuite/gcc.target/i386/sse4_2-crc32b.c
--- 59788,59795 ----
  ff4a381ee5305c9a18c5754c13c12790  gcc/testsuite/gcc.target/i386/sse4_1-set-v16qi-2a.c
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  a2f5b0c7365f7c93751ba3a6aa3eee83  gcc/testsuite/gcc.target/i386/sse4_1-set-v16qi-3a.c
! 6ce5f7a9e3c9fffe77b1a62fe72e8122  gcc/testsuite/gcc.target/i386/sse4_1-trunc-vec.c
! 73a07de2b59200c14c97da9c1f6888c8  gcc/testsuite/gcc.target/i386/sse4_1-truncf-vec.c
  230f39e76bb95b9a1d8bb7d9bb28cd63  gcc/testsuite/gcc.target/i386/sse4_2-check.h
  78e9bfaad4304fbf531902e93985b629  gcc/testsuite/gcc.target/i386/sse4_2-crc32.h
  24e0c81587a981203de0c814fe1c7ed4  gcc/testsuite/gcc.target/i386/sse4_2-crc32b.c
*************** f2432fa4e94240719fb29b95541fb57b  gcc/te
*** 50905,50917 ****
  1feabd730a99874265b945ee66a92de8  gcc/testsuite/gcc.target/i386/stackalign/longlong-1.c
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  692c477be80a6067954dcbc7313102db  gcc/testsuite/gcc.target/i386/stackalign/pr39146.c
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  22fcf3b6f05e35417473446a6401735c  gcc/testsuite/gcc.target/i386/stackalign/return-4.c
  8276f2c9f0467299ccc2c3bc989ca9cb  gcc/testsuite/gcc.target/i386/stackalign/return-5.c
  67a3c24d3712370ddefd38dcbb853a48  gcc/testsuite/gcc.target/i386/stackalign/return-6.c
! c72ed53e6b40a802c406c71c01ef99d7  gcc/testsuite/gcc.target/i386/stackalign/stackalign.exp
  c43c2ead96b394127d8644ef3360a3dd  gcc/testsuite/gcc.target/i386/strcmpopt_6.c
  caa0a36ffb354dbc6cd84a8137f4aef9  gcc/testsuite/gcc.target/i386/strinline.c
  fc3a18821c52e48c29f54252053988ba  gcc/testsuite/gcc.target/i386/struct-size.c
--- 59868,59882 ----
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  692c477be80a6067954dcbc7313102db  gcc/testsuite/gcc.target/i386/stackalign/pr39146.c
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  e797e3acc17ea660fd93c0911e210be1  gcc/testsuite/gcc.target/i386/stackalign/return-1.c
  6b20a3a861b6c86557247cd210cc9c63  gcc/testsuite/gcc.target/i386/stackalign/return-2.c
  5a8844cbc62a677bfa8d2d8536696a2a  gcc/testsuite/gcc.target/i386/stackalign/return-3.c
  22fcf3b6f05e35417473446a6401735c  gcc/testsuite/gcc.target/i386/stackalign/return-4.c
  8276f2c9f0467299ccc2c3bc989ca9cb  gcc/testsuite/gcc.target/i386/stackalign/return-5.c
  67a3c24d3712370ddefd38dcbb853a48  gcc/testsuite/gcc.target/i386/stackalign/return-6.c
! 6b195e7badd959fb5352f4975f486f41  gcc/testsuite/gcc.target/i386/stackalign/stackalign.exp
  c43c2ead96b394127d8644ef3360a3dd  gcc/testsuite/gcc.target/i386/strcmpopt_6.c
  caa0a36ffb354dbc6cd84a8137f4aef9  gcc/testsuite/gcc.target/i386/strinline.c
  fc3a18821c52e48c29f54252053988ba  gcc/testsuite/gcc.target/i386/struct-size.c
*************** d8a06b42b5d0e429d4de46913e331fbf  gcc/te
*** 50980,50988 ****
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--- 59945,59953 ----
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*************** f2246fb526840289cc94bd7e8b0c994a  gcc/te
*** 50991,50996 ****
--- 59956,59962 ----
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*************** cf807a1a0c9ea4bc99f4a22859d9b829  gcc/te
*** 51010,51016 ****
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--- 59976,59982 ----
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*************** e2efe95152ea6166af9bad8a21af33c4  gcc/te
*** 51066,51072 ****
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--- 60032,60038 ----
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*************** e50239a34975c5fbc852ce8f339c44ea  gcc/te
*** 51109,51115 ****
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--- 60075,60081 ----
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*************** aa59fb938dc80d0bfebfc946cdbfbabf  gcc/te
*** 51148,51154 ****
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! b8049b75d5783900557355b738c8a4e8  gcc/testsuite/gcc.target/m68k/m68k.exp
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--- 60114,60120 ----
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*************** e143618b2c8e9f74a89e408849d5ea9e  gcc/te
*** 51205,51213 ****
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--- 60171,60179 ----
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*************** c5ca09bf6a7d69db3839a49c4fd4facc  gcc/te
*** 51301,51308 ****
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--- 60267,60273 ----
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*************** ca56634a2eac89dd69e61b0be079e31d  gcc/te
*** 51334,51341 ****
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--- 60299,60308 ----
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*************** e7490a676f50b43dff9fbe84ff3bd95e  gcc/te
*** 51454,51460 ****
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--- 60421,60427 ----
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*************** e29cf040ff47381ec220169736b7446a  gcc/te
*** 51502,51508 ****
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--- 60469,60476 ----
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*************** f7db832be6c1f33d30392dc4571ec31a  gcc/te
*** 51519,51525 ****
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--- 60487,60493 ----
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! 39a1ebb6f966a3b25fba9725fb2b40b3  gcc/testsuite/gcc.target/msp430/pr80993.c
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  793308c05b3cd41087c641de34946830  gcc/testsuite/gcc.target/msp430/pr87691.c
+ d1c34b11338a3c32fa83a80fb3677666  gcc/testsuite/gcc.target/msp430/region-attribute-misuse.c
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+ 45da37a1ac7f06accf473114d736dc42  gcc/testsuite/gcc.target/msp430/region-misuse-data.c
+ cf9bc0db560facab526cdb652e694b19  gcc/testsuite/gcc.target/msp430/size-optimized-shifts.c
  6847d9a3332222d5dd957c83ca9b03b5  gcc/testsuite/gcc.target/msp430/special-regs.c
  32c73d6519d6f2b461d7261a3c2055f5  gcc/testsuite/gcc.target/msp430/static-interrupts.c
+ dbcd023c77fc841fccc8deb248a4e2d6  gcc/testsuite/gcc.target/msp430/tiny-printf.c
  82173e7c1c627427f8e71b7496727f05  gcc/testsuite/gcc.target/nds32/basic-main.c
  0e03754fee073e7c8a117d1a11e9f750  gcc/testsuite/gcc.target/nds32/builtin-isb.c
  a76e9bdd8dd768b474700a1307ac151c  gcc/testsuite/gcc.target/nds32/builtin-isync.c
*************** a76e9bdd8dd768b474700a1307ac151c  gcc/te
*** 51838,51844 ****
  15f6a34c31bfccfa2f37f50fbedaa686  gcc/testsuite/gcc.target/nds32/builtin-mfusr-mtusr.c
  2a347ba3731aa3fa17024e865968c3b8  gcc/testsuite/gcc.target/nds32/builtin-setgie-dis.c
  ddaca84e0c321fa88f3cedb3bac1bae5  gcc/testsuite/gcc.target/nds32/builtin-setgie-en.c
! 714c8416f150b24587338daefb8d49ea  gcc/testsuite/gcc.target/nds32/nds32.exp
  267d1f508341cb93b318d1a249e34c19  gcc/testsuite/gcc.target/nios2/andci.c
  b6812a3a7ba3a86a41e0fdc982390c97  gcc/testsuite/gcc.target/nios2/biggot-1.c
  cdbcb03e5a340d5566b6e43e17797f5e  gcc/testsuite/gcc.target/nios2/biggot-2.c
--- 60881,60887 ----
  15f6a34c31bfccfa2f37f50fbedaa686  gcc/testsuite/gcc.target/nds32/builtin-mfusr-mtusr.c
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! d2fb4f02eb12d7e7752916ec9935322a  gcc/testsuite/gcc.target/nds32/nds32.exp
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  cdbcb03e5a340d5566b6e43e17797f5e  gcc/testsuite/gcc.target/nios2/biggot-2.c
*************** a87061df79ea1df98b37173a67798115  gcc/te
*** 51912,51920 ****
  6dbe531363c65af94c9d1cf19e943696  gcc/testsuite/gcc.target/nios2/nios2-wrctl-not-zero.c
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  84c9378417e6cb2069a618430a13661c  gcc/testsuite/gcc.target/nios2/nios2-wrctl.c
! d2cfd1fefaed7c1f552be97b2ca72329  gcc/testsuite/gcc.target/nios2/nios2.exp
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  9debf19ff2edff67a3c15f36802b05cb  gcc/testsuite/gcc.target/nios2/r2-atomic.c
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--- 60955,60966 ----
  6dbe531363c65af94c9d1cf19e943696  gcc/testsuite/gcc.target/nios2/nios2-wrctl-not-zero.c
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  84c9378417e6cb2069a618430a13661c  gcc/testsuite/gcc.target/nios2/nios2-wrctl.c
! c67465952f318f28956d8f6c2d12b8c6  gcc/testsuite/gcc.target/nios2/nios2.exp
  5738a626d052d93dbea37d4d0144d7b8  gcc/testsuite/gcc.target/nios2/pr87079-1.c
  efa2a47188c46b5407f22a2a066118c8  gcc/testsuite/gcc.target/nios2/pr87079-2.c
+ b267f28fe7ecd61569a0c578100b7bea  gcc/testsuite/gcc.target/nios2/pr92499-1.c
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+ 87cadcb6f21ee4071ecc04a5dc1e877f  gcc/testsuite/gcc.target/nios2/pr92499-3.c
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*************** ee7a219079a9befc9911075c0ddf6ec4  gcc/te
*** 51947,51953 ****
  b5bc7203f9caebe44d835739cd6150f6  gcc/testsuite/gcc.target/nvptx/decl.c
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  11c15ebae0aa72ac866acc469a870111  gcc/testsuite/gcc.target/nvptx/label-values.c
! 7c3d0f0c3e9d6e02a0b4fe8d64c44153  gcc/testsuite/gcc.target/nvptx/nvptx.exp
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  ee10a595a6c816802a83d13637d1f4ce  gcc/testsuite/gcc.target/nvptx/pr85056.c
  85d991e87550d6e0750de2b4f0ef4e8d  gcc/testsuite/gcc.target/nvptx/pr85056a.c
--- 60993,60999 ----
  b5bc7203f9caebe44d835739cd6150f6  gcc/testsuite/gcc.target/nvptx/decl.c
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  11c15ebae0aa72ac866acc469a870111  gcc/testsuite/gcc.target/nvptx/label-values.c
! a2b57c4821ce1be8e96881556e912723  gcc/testsuite/gcc.target/nvptx/nvptx.exp
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  ee10a595a6c816802a83d13637d1f4ce  gcc/testsuite/gcc.target/nvptx/pr85056.c
  85d991e87550d6e0750de2b4f0ef4e8d  gcc/testsuite/gcc.target/nvptx/pr85056a.c
*************** d59f1ded63c010f7c70d8914ff035369  gcc/te
*** 51973,51987 ****
  9e49229cfb3a4570a9259ea659772866  gcc/testsuite/gcc.target/or1k/cmov-2.c
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! 1f8be6405a96ad947b82c3e84a84ec48  gcc/testsuite/gcc.target/or1k/or1k.exp
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! 19a50da79764b52ec4c567f7aac53bdd  gcc/testsuite/gcc.target/or1k/return-2.c
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! 9662b60df34cb7689cdf3cee87215613  gcc/testsuite/gcc.target/or1k/shftimm-1.c
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  a03b92350a69b724ce16f3b7aa1803d7  gcc/testsuite/gcc.target/powerpc/20020118-1.c
--- 61019,61033 ----
  9e49229cfb3a4570a9259ea659772866  gcc/testsuite/gcc.target/or1k/cmov-2.c
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! cd2c839a50b775a4bc7279a2bc61998f  gcc/testsuite/gcc.target/or1k/or1k.exp
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! cbc20b748446a09b12e149a14d1dc326  gcc/testsuite/gcc.target/or1k/return-2.c
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! 11fa4323bb0698ed08c441ecf4a9de20  gcc/testsuite/gcc.target/or1k/shftimm-1.c
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  a03b92350a69b724ce16f3b7aa1803d7  gcc/testsuite/gcc.target/powerpc/20020118-1.c
*************** f7e7c3525d555350473e6eaeb20a763c  gcc/te
*** 52136,52198 ****
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! 1c6a59768bdcda7226d3ce75d3597bdc  gcc/testsuite/gcc.target/powerpc/bfp/bfp.exp
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! 2f5f56d41bb6a06b417161fd6fb2f539  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-eq-2.c
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! 2cde7545deb21106f4a675fc65293a80  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-gt-2.c
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! 7e7a6c350195653da92db32f7808ebf1  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-lt-2.c
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! 0015c20d14df9d8d9519b58773e55629  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-2.c
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! 096fd728f683018c6e049be71aeaa3f7  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-1.c
! e8186f7c6242a38d86ddd629a08cadcc  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-2.c
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! ee5dc0b97f88284c61692de9b44c6a4e  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c
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! 2996cb70099d7b7ce2224f117d8c7385  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-1.c
! 4aeb0380c9fc5bb32c95928e681615e6  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-2.c
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! 9f191c1c8e2d210165d4e28caa5cd842  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c
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! 38e5e77a0a2385694cb10e7b5baa21f6  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-1.c
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! cfb17b801a43bfcd1be6502ce0523ccf  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-2.c
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! 4de02ea1d60d4a1edebe85c287b69cf2  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-4.c
! f41f5b91b62f3549f6c1e38039cf4f51  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-5.c
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! a9bf4d57718c043f52aed933f1bc2914  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-7.c
! 5d6df0b9d2cbc8a6f70bc1d93cf10fe8  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-8.c
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! 7dd029e89a243aae8164a09b235fa9d1  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-data-class-11.c
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--- 61182,61244 ----
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! dd56eadc1cb5667610cb93869cf092bc  gcc/testsuite/gcc.target/powerpc/bfp/bfp.exp
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! 9edcc760a84627d628e437142f98fe00  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-eq-2.c
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! 9c516a13dfaf5cc3e4485be519d731ff  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-gt-2.c
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  f210372be003b48b9be26ea5feee3aec  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-lt-0.c
  6a05818b1fb190bc45fb943aaec50a57  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-lt-1.c
! b0385511815fb25a979cd8ff4de304ef  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-lt-2.c
  6c310aa6c58d8c6938112a1dbb9467d6  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-lt-3.c
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  ca21bb9def7990f48987101955bba205  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-1.c
! a21a413c4573e7293cec10e8570e81dc  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-2.c
  6760aca75fd126c5043ff61b318f5faf  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-3.c
  a395db7849f7521757d13b7076de3bf4  gcc/testsuite/gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-4.c
  88c6d01600050991b6c9470a87d97a42  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-0.c
! b19c643f79afa7045f1c13c06f8bf79b  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-1.c
! b748aa512a91c82d4770769a58371dad  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-2.c
  dffafa22f1df544d5e027908706588fa  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-3.c
! 3746290a78c6f678cb2f7d730d0d55eb  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c
  920f018d79814fde1dba2262fabfc93e  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-5.c
  f01634038355cb537ceea155776e32cc  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-6.c
  47d9d99579f3f793b40d85f161d1b909  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-7.c
  d04a82a77cbaac2a88d99b239ec8b19f  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c
! b7e741409f5404bb12984bcd938dd8c5  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-1.c
! 917431183cbf9798e4249ce267d139cd  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-2.c
  7c096e51f3cca308670cd81f18e363df  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-3.c
! 170b5bd2187b5b2617cfcc8b9386c2c4  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c
  662b59207e281451d1fefd42c453a04a  gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-5.c
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  74ec5cc425112c2d08138803668face6  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c
! 8a27ff48cf2c5dbeaa2772876b5ffe93  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-1.c
! daa4ee7cbab5fbc1e59a3199b03078d1  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c
  5c1d8c216e74fe8015423cc24313ee88  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-11.c
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  0fa8670e32f9248c271e7ae4c38f973b  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-13.c
  0e752a1b501c034b208c1e3d49f06616  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-14.c
  08349a2992fbc7e6aad40d5b73773654  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-15.c
! ccd7c748134c13348ca46712668c1eed  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-2.c
  ea53c38e71bb50f3ce00b3349fec4bce  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c
! c3789ea6ee8a22a62a6099095c7d5652  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-4.c
! 97a355378718dffce8ccd7031899ae1c  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-5.c
  3b063d1b88ef22302ebeb4f096689af3  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-6.c
! 4f2725559c58fd41224b2ec41e032304  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-7.c
! f6ff00f2194dcad471beb948df28c663  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-8.c
  17ae124803b9ac32cc90dd5773954bc8  gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-9.c
  e6064234e1ff945f70aea710267ad0fd  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-data-class-0.c
  3aafb56b77b9d6a86fe4f40e1a8aa4d5  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-data-class-1.c
  2ae634089999d6c920ed971de4bb4387  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-data-class-10.c
! c1ae2fed6493b53ca839ee1492f670df  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-data-class-11.c
  7e8619805bfaa018672ad9d3740be480  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-data-class-12.c
  8b151022a0fe9b76fc734fa235c42dd5  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-data-class-13.c
  b778133ecfccc947d6107fe65169e686  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-data-class-14.c
*************** ebbcc3ef7fd001fee8db11cdbd47d0f5  gcc/te
*** 52201,52247 ****
  5d183f35bc572ba086e80e0173f0027d  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-data-class-3.c
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! c96ef9b2d69b49edbcca5c9e9506ff0a  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-data-class-6.c
! 27ed7142caa8077667462575cc66416a  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-data-class-7.c
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! 2abfdc1459e8c0b46778e6ba25b7e7b9  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-neg-2.c
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! e1dbb3d84d7fdc38aedf717d1cf48202  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-neg-5.c
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! 917a7ef803f9b41cd3d7db5789a397db  gcc/testsuite/gcc.target/powerpc/bfp/vec-test-data-class-2.c
! 43f4221023d478da2031a32de14bf095  gcc/testsuite/gcc.target/powerpc/bfp/vec-test-data-class-3.c
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--- 61247,61293 ----
  5d183f35bc572ba086e80e0173f0027d  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-data-class-3.c
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! bd767b817fdf5086a46910dc878683c4  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-neg-3.c
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! a3b905a50bd9a3f0964954bd2cfc5e96  gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-neg-5.c
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  5afb3d1b3050df892764184540c0f215  gcc/testsuite/gcc.target/powerpc/bfp/vec-extract-exp-0.c
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! 350ce82578c5a4bec2b1ad5d1d12b57c  gcc/testsuite/gcc.target/powerpc/bfp/vec-extract-exp-2.c
! b78a1b718b2abc981e19d44d63e9760a  gcc/testsuite/gcc.target/powerpc/bfp/vec-extract-exp-3.c
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! acd0d658cef74bd78577eeb378d68ffb  gcc/testsuite/gcc.target/powerpc/bfp/vec-insert-exp-6.c
! e02475b2eef62c61d2cd3c53a7791a2f  gcc/testsuite/gcc.target/powerpc/bfp/vec-insert-exp-7.c
  cdef3cfa6f1fc28b9394eded23882e43  gcc/testsuite/gcc.target/powerpc/bfp/vec-insert-exp-8.c
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! 323312a08a765b1e6e91b9f465ac1f90  gcc/testsuite/gcc.target/powerpc/bfp/vec-test-data-class-2.c
! ac48998d4de3e7355105041a85fb9ff4  gcc/testsuite/gcc.target/powerpc/bfp/vec-test-data-class-3.c
  38b60ecc153fb338e79fcea5235f3792  gcc/testsuite/gcc.target/powerpc/bfp/vec-test-data-class-4.c
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  a4b4e6485ce3fd2c6f29b83e4d22cef3  gcc/testsuite/gcc.target/powerpc/bfp/vec-test-data-class-6.c
*************** d98190bc7003de5846e7f794a9f2b8ab  gcc/te
*** 52294,52300 ****
  c5b0f341a380052e089b6ab1ff9d3dd6  gcc/testsuite/gcc.target/powerpc/bswap64-1.c
  28a093e56a3b3b438802b7510941c3d7  gcc/testsuite/gcc.target/powerpc/bswap64-2.c
  c5679080166f48cc9f2b7e07db1146c3  gcc/testsuite/gcc.target/powerpc/bswap64-3.c
! 332b3d51f7b08982922122764eeefdd1  gcc/testsuite/gcc.target/powerpc/bswap64-4.c
  660ec5b28bd11c4d01e9d4d45e4670fa  gcc/testsuite/gcc.target/powerpc/builtin-vec-sums-be-int.c
  2185aeb234f1817a5540c86fb962da8a  gcc/testsuite/gcc.target/powerpc/builtins-1-be-folded.c
  01e2e658b164ab1133e268dea77a673b  gcc/testsuite/gcc.target/powerpc/builtins-1-le-folded.c
--- 61340,61346 ----
  c5b0f341a380052e089b6ab1ff9d3dd6  gcc/testsuite/gcc.target/powerpc/bswap64-1.c
  28a093e56a3b3b438802b7510941c3d7  gcc/testsuite/gcc.target/powerpc/bswap64-2.c
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! ee04d0a416bda5cc5ebbd0def15d5994  gcc/testsuite/gcc.target/powerpc/bswap64-4.c
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  01e2e658b164ab1133e268dea77a673b  gcc/testsuite/gcc.target/powerpc/builtins-1-le-folded.c
*************** f50c15901a48e4cbd709055aff82c94c  gcc/te
*** 52326,52337 ****
  6a0869294a2f975212e388f211524c2a  gcc/testsuite/gcc.target/powerpc/builtins-mergew-mergow.c
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  1548ac0ac81513395f471bec3629c51c  gcc/testsuite/gcc.target/powerpc/byte-in-either-range-0.c
! afbccbbe3d9e30638ce36f4ecf3482dc  gcc/testsuite/gcc.target/powerpc/byte-in-either-range-1.c
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! cfbe5114d5c424bce158befb0751737f  gcc/testsuite/gcc.target/powerpc/byte-in-range-1.c
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! b78d30de86dd3f27b4a5a00c0eadd49a  gcc/testsuite/gcc.target/powerpc/byte-in-set-1.c
! a4021abab038846935446d312fd128b5  gcc/testsuite/gcc.target/powerpc/byte-in-set-2.c
  2967ae37e85e61aa7e2d5198922374ad  gcc/testsuite/gcc.target/powerpc/cell_builtin-1.c
  222e0812e626f0e1abf688d71c5afc58  gcc/testsuite/gcc.target/powerpc/cell_builtin-2.c
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--- 61372,61383 ----
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*************** bceca9004faa6729357ac4757f81b563  gcc/te
*** 52344,52350 ****
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--- 61390,61396 ----
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*************** f2eb2bc74f81b523e009fd067f9f627d  gcc/te
*** 52352,52365 ****
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--- 61398,61414 ----
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*************** a3b487e53959665b5ecb0d7ba6138585  gcc/te
*** 52371,52377 ****
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--- 61420,61426 ----
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*************** a034d7a8bf265623a75800f01113e836  gcc/te
*** 52395,52498 ****
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--- 61444,61547 ----
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*************** d8797cd884ad9c03962b8b0e145a570e  gcc/te
*** 52596,52602 ****
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--- 61645,61651 ----
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*************** d166c789e58b419540ab45a26e13bb56  gcc/te
*** 52676,52682 ****
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--- 61725,61731 ----
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*************** dbc411e4c00c190a163bc911484099f8  gcc/te
*** 52731,52747 ****
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--- 61780,61796 ----
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*************** ffc6830a7ab780cfd15ff8582d96a3f7  gcc/te
*** 52791,52805 ****
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*************** f86f87dd7c82f05785a8e530a4718235  gcc/te
*** 52850,52855 ****
--- 61901,61907 ----
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*************** e5741a8821fcabf823c731561f6fe007  gcc/te
*** 52874,52881 ****
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*************** ba3feba26e529ce9069c048e54e60269  gcc/te
*** 52887,52892 ****
--- 61939,61945 ----
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*************** a49cebe820198e98df6e4c433d7270fd  gcc/te
*** 52916,52934 ****
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*************** dbe8b7a61a7368d65f67bfc4131425cf  gcc/te
*** 52936,52942 ****
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--- 61990,61996 ----
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*************** bb11c2a27f43f00c4c0d934335ec3a03  gcc/te
*** 52977,52988 ****
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*************** f7e744d22854f13c66364fe3a722086f  gcc/te
*** 53064,53069 ****
--- 62118,62124 ----
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*** 53082,53088 ****
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*************** faf2ed46677346059dd2b7fd42254985  gcc/te
*** 53090,53097 ****
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*************** d9ccfe0048f3d64bbe5861c9aea6294f  gcc/te
*** 53116,53122 ****
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*************** c8e4d5ccb2226fba0ad28aadabb79509  gcc/te
*** 53131,53137 ****
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--- 62186,62192 ----
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*************** fb131f3896466dcc86b6cb615cf76c79  gcc/te
*** 53142,53148 ****
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--- 62197,62203 ----
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*************** d898a03a0134d7a17ff89a9859557dc9  gcc/te
*** 53164,53173 ****
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--- 62219,62228 ----
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*************** a3fcebbcc49f4e8e80184966262e4f7c  gcc/te
*** 53233,53253 ****
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--- 62288,62326 ----
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*************** bbd1992756a4c4fe9d76f64a98906a99  gcc/te
*** 53280,53288 ****
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--- 62353,62361 ----
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*************** f66a7c7a9b7cdd49a6b9860dbb16d90a  gcc/te
*** 53313,53318 ****
--- 62386,62392 ----
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*************** f138cfa6e387e1bc85747da2fc38e305  gcc/te
*** 53611,53617 ****
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--- 62685,62691 ----
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*************** e95008bad5edfab2ab0eb99d3fba6505  gcc/te
*** 53693,53698 ****
--- 62767,62776 ----
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*************** b558fe15786948ecde81acc46fdba7e6  gcc/te
*** 53706,53711 ****
--- 62784,62790 ----
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*************** d4ac3c389df5e307dc92138f7740f465  gcc/te
*** 53731,53737 ****
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--- 62810,62816 ----
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*************** ba4a8aabd92b7a2570f92e9d2778fc26  gcc/te
*** 53753,53759 ****
  40531b8124885a862863c9ed5100a0a3  gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-4.c
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! 50c43fffb375e0ad33878cf4bc6e7dbc  gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-7.c
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--- 62832,62838 ----
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*************** be7b9ce170ac6f6012073f6c2fee2bb9  gcc/te
*** 53769,53787 ****
  7ed1182fd451c9ecc54430b69812d861  gcc/testsuite/gcc.target/powerpc/vsu/vec-cmpnez-4.c
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! 85f602e1303bab3b150708b274e8c93d  gcc/testsuite/gcc.target/powerpc/vsu/vec-cmpnez-7.c
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--- 62848,62866 ----
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*************** dbe9f75fbad8a2b2e46d3709a71ef7a4  gcc/te
*** 53797,53803 ****
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--- 62876,62882 ----
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*************** fa85a7d8f3325f5e7ebfcf737aee9c6f  gcc/te
*** 53805,53817 ****
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--- 62884,62896 ----
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*************** b88613b767bb0807b1762e8eb526a343  gcc/te
*** 53820,53826 ****
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--- 62899,62905 ----
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! 6a06f0233ae98212fe538e2d8dfa1a8c  gcc/testsuite/gcc.target/powerpc/vsu/vsu.exp
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*************** d128b18a20f2a55978e519508f48f1ae  gcc/te
*** 53873,53879 ****
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--- 62952,62958 ----
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*************** e889263e2ee39a10680e0a6dc47a0f28  gcc/te
*** 53903,53915 ****
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--- 62982,62994 ----
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*************** c7ca2ee789783d9e61ff84fb0468ded2  gcc/te
*** 53920,53931 ****
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--- 62999,63053 ----
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*************** b79d8a974a27ac595558bec1d7d87b54  gcc/te
*** 53934,53941 ****
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--- 63056,63065 ----
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*************** f69ed9814aa0739480a17cf1070d4373  gcc/te
*** 53944,53953 ****
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--- 63068,63080 ----
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*************** d12111264ce68b92da7294ffed1c4dcc  gcc/te
*** 53957,53964 ****
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--- 63084,63098 ----
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*************** c8d42675ec79f56ceeed3c3797669b7c  gcc/te
*** 53973,53979 ****
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--- 63107,63113 ----
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*************** f0737b5115c4a94dc1b2f670de5d83a4  gcc/te
*** 53986,53992 ****
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--- 63120,63126 ----
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*************** f9efcac72c7632def29469b0cbef14cb  gcc/te
*** 54005,54010 ****
--- 63139,63146 ----
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*************** bf08d8ae3952e5a9f6d75de6c60a3a5f  gcc/te
*** 54018,54025 ****
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--- 63154,63163 ----
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*************** e69b1b91153a3bf733d7b911d27f92d1  gcc/te
*** 54035,54041 ****
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--- 63173,63180 ----
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! 4f19702071b04a45e600b052fccf6672  gcc/testsuite/gcc.target/s390/global-array-element-pic2.c
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  82ea28ab074cb45eafa2132c9fd8bd07  gcc/testsuite/gcc.target/s390/global-array-negative-huge-element.c
*************** f13fa958f52666320ebd966fc9530e05  gcc/te
*** 54104,54110 ****
  2b7175e138a756516a334fd03dd56b25  gcc/testsuite/gcc.target/s390/litpool-str-1.c
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--- 63243,63251 ----
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! 39a3f1ac65f6b0dc5d9fe19ba5ed5f96  gcc/testsuite/gcc.target/s390/load-relative-check.c
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*************** c754a4515598fececb1e5306e99940eb  gcc/te
*** 54122,54129 ****
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--- 63263,63272 ----
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*************** b684d45c88d2d681994f187439cd14f4  gcc/te
*** 54142,54148 ****
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--- 63285,63291 ----
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*************** cf959b4c2853c02daae71fd523c3158f  gcc/te
*** 54191,54209 ****
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--- 63334,63355 ----
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*************** ff7d9419a3b2402f3410b0aae024febc  gcc/te
*** 54293,54302 ****
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--- 63439,63449 ----
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*************** f6942a3fba9c800bffade3bb79196479  gcc/te
*** 54330,54336 ****
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--- 63477,63483 ----
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*************** db4e2b1f6b0441e2f2f64b6e141245cd  gcc/te
*** 54341,54346 ****
--- 63488,63543 ----
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*************** c388e8e709c00e2cb14b83a7bcb1db96  gcc/te
*** 54351,54363 ****
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--- 63548,63561 ----
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*************** ca3a119c232d2f9c4175fb19938beae4  gcc/te
*** 54390,54399 ****
--- 63588,63601 ----
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*************** b5f5ce14a315e2e8e07821dd9104b07b  gcc/te
*** 54437,54443 ****
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--- 63639,63645 ----
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*************** edf7b3ac6a922fa0ac818384392a4ae2  gcc/te
*** 54466,54472 ****
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--- 63668,63674 ----
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*************** da2b2748c08b72520151602020e8790b  gcc/te
*** 54507,54513 ****
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--- 63709,63715 ----
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*************** db7a02bef0ea1d74a99297c9ee53c525  gcc/te
*** 54572,54578 ****
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--- 63774,63780 ----
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*************** a2644837d5da1aa36c1bcfeab14bd34b  gcc/te
*** 54611,54617 ****
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*************** e5c267912e5c8f2e18ebb9ce814789ba  gcc/te
*** 54719,54725 ****
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--- 63921,63927 ----
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*************** eb9fea9eb3ccdd5fb4d85ac011c10dc5  gcc/te
*** 54730,54738 ****
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--- 63932,63940 ----
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*************** c743e0cdebd780532edc2e21e3de15e4  gcc/te
*** 54774,54824 ****
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  49f9474b045dc89977e3c1095dd3d397  gcc/testsuite/gcc.target/tic6x/abi-align-1.c
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  880ba4c7bbafa50a3cc6634a50dc02b5  gcc/testsuite/gcc.target/tic6x/builtin-math-7.c
  6189f555f502d05c8cf8f4c22546bdee  gcc/testsuite/gcc.target/tic6x/builtins/arith24.c
! 76258e45e739aeb2bbae12e8e6edbfff  gcc/testsuite/gcc.target/tic6x/builtins/c6x-builtins.exp
  d44d40be94d3b2c409ccde008c52fd47  gcc/testsuite/gcc.target/tic6x/builtins/extclr.c
  199fddda4489c9408a194900b3af00cc  gcc/testsuite/gcc.target/tic6x/builtins/sarith1.c
  2a93c542861f1f7e0f2350f76094d837  gcc/testsuite/gcc.target/tic6x/builtins/smpy.c
--- 63976,63986 ----
  c6e8cea536062af6f23168b438e096e3  gcc/testsuite/gcc.target/sparc/vis4misc.c
  56b799e8f22e02ad94a3b78e432a129c  gcc/testsuite/gcc.target/sparc/wrgsr.c
  8ab1e95b1174d62330ff11c4ce7c22d3  gcc/testsuite/gcc.target/sparc/xmul.c
  49f9474b045dc89977e3c1095dd3d397  gcc/testsuite/gcc.target/tic6x/abi-align-1.c
  cb59fa93f6ec7ffdc7c45b9ffe016270  gcc/testsuite/gcc.target/tic6x/bswapl.c
  880ba4c7bbafa50a3cc6634a50dc02b5  gcc/testsuite/gcc.target/tic6x/builtin-math-7.c
  6189f555f502d05c8cf8f4c22546bdee  gcc/testsuite/gcc.target/tic6x/builtins/arith24.c
! 66b2d64dd280508720e66354988bd649  gcc/testsuite/gcc.target/tic6x/builtins/c6x-builtins.exp
  d44d40be94d3b2c409ccde008c52fd47  gcc/testsuite/gcc.target/tic6x/builtins/extclr.c
  199fddda4489c9408a194900b3af00cc  gcc/testsuite/gcc.target/tic6x/builtins/sarith1.c
  2a93c542861f1f7e0f2350f76094d837  gcc/testsuite/gcc.target/tic6x/builtins/smpy.c
*************** f914e8e604fad0a96e99fb396ea883ad  gcc/te
*** 54834,54844 ****
  baa04394e3ff6b7cba6819b89fb4e822  gcc/testsuite/gcc.target/tic6x/longcalls.c
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  9373dfa296a424e3396f81925fbd59bc  gcc/testsuite/gcc.target/tic6x/rotdi16.c
! b69068096d299bfeac264a4cacf21af4  gcc/testsuite/gcc.target/tic6x/tic6x.exp
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  bce543225b38f67d8c3d77856df8c002  gcc/testsuite/gcc.target/vax/bswapdi-1.c
  303827dc5d4539997ff7a236a7a3f1bf  gcc/testsuite/gcc.target/vax/pr56875.c
! 0fddd3cac71847d7d490720e82b9b13b  gcc/testsuite/gcc.target/vax/vax.exp
  80427f37ed9a9b5949e9525f9049ac5d  gcc/testsuite/gcc.target/visium/bit_shift.c
  8b6e9241f591f13a4ae6f06419b206b4  gcc/testsuite/gcc.target/visium/bit_test.c
  38dfc40b21838f07e0e01202beadfa5c  gcc/testsuite/gcc.target/visium/block_move.c
--- 63996,64006 ----
  baa04394e3ff6b7cba6819b89fb4e822  gcc/testsuite/gcc.target/tic6x/longcalls.c
  f84309613c0a7282e626909d82e4ad41  gcc/testsuite/gcc.target/tic6x/rotdi16-scan.c
  9373dfa296a424e3396f81925fbd59bc  gcc/testsuite/gcc.target/tic6x/rotdi16.c
! 2d0c13412acfaab93cac19b9d66a1851  gcc/testsuite/gcc.target/tic6x/tic6x.exp
  670857f86bef69c76dcf7d725b01b954  gcc/testsuite/gcc.target/tic6x/weak-call.c
  bce543225b38f67d8c3d77856df8c002  gcc/testsuite/gcc.target/vax/bswapdi-1.c
  303827dc5d4539997ff7a236a7a3f1bf  gcc/testsuite/gcc.target/vax/pr56875.c
! f643060cc54562eaaf2cc2c37ad41814  gcc/testsuite/gcc.target/vax/vax.exp
  80427f37ed9a9b5949e9525f9049ac5d  gcc/testsuite/gcc.target/visium/bit_shift.c
  8b6e9241f591f13a4ae6f06419b206b4  gcc/testsuite/gcc.target/visium/bit_test.c
  38dfc40b21838f07e0e01202beadfa5c  gcc/testsuite/gcc.target/visium/block_move.c
*************** da335bd5b7d24260be92152ec43c9c69  gcc/te
*** 54850,54862 ****
  22e4f821af1c93516061d0c9e939e1d1  gcc/testsuite/gcc.target/visium/overflow16.c
  ed48eae7631e0c3fec552abc3abf6370  gcc/testsuite/gcc.target/visium/overflow32.c
  9038dededd39b0c0f41798e290669394  gcc/testsuite/gcc.target/visium/overflow8.c
! 4dd35d0dd3beb3f201a8c9bf8d5a42ae  gcc/testsuite/gcc.target/visium/visium.exp
! e385aed96e60ebb6e8db7bd28d082af7  gcc/testsuite/gcc.target/x86_64/abi/README.gcc
! bb452954483e6c8d0971685e52aa0fad  gcc/testsuite/gcc.target/x86_64/abi/abi-x86_64.exp
  4599244d74ba4aabbd69240d86d2fe79  gcc/testsuite/gcc.target/x86_64/abi/args.h
  2a169afd0fa371ba877780d1e8074c08  gcc/testsuite/gcc.target/x86_64/abi/asm-support-darwin.s
  892eb2ee284fd96557fd507fa0642156  gcc/testsuite/gcc.target/x86_64/abi/asm-support.S
! c5d09bf137cc5d03d2d2a4e9193a9e8f  gcc/testsuite/gcc.target/x86_64/abi/avx/abi-avx.exp
  f559d61e72669fec3c7c3bb1345a001f  gcc/testsuite/gcc.target/x86_64/abi/avx/args.h
  6e43bc6b3d6feb70612d399a677d1c7d  gcc/testsuite/gcc.target/x86_64/abi/avx/asm-support-darwin.s
  0df09e54902b0a238caad6de9dc92c5d  gcc/testsuite/gcc.target/x86_64/abi/avx/asm-support.S
--- 64012,64024 ----
  22e4f821af1c93516061d0c9e939e1d1  gcc/testsuite/gcc.target/visium/overflow16.c
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  9038dededd39b0c0f41798e290669394  gcc/testsuite/gcc.target/visium/overflow8.c
! 41f71d55f66ee7027f610918e5c4f355  gcc/testsuite/gcc.target/visium/visium.exp
! 40d05e893cf3428b9cbcfe131d148352  gcc/testsuite/gcc.target/x86_64/abi/README.gcc
! 307eb3b18c279a9bdaa5cc0cfe600fc4  gcc/testsuite/gcc.target/x86_64/abi/abi-x86_64.exp
  4599244d74ba4aabbd69240d86d2fe79  gcc/testsuite/gcc.target/x86_64/abi/args.h
  2a169afd0fa371ba877780d1e8074c08  gcc/testsuite/gcc.target/x86_64/abi/asm-support-darwin.s
  892eb2ee284fd96557fd507fa0642156  gcc/testsuite/gcc.target/x86_64/abi/asm-support.S
! 344e9a6f25a282dfdf24a7f81ec0c97c  gcc/testsuite/gcc.target/x86_64/abi/avx/abi-avx.exp
  f559d61e72669fec3c7c3bb1345a001f  gcc/testsuite/gcc.target/x86_64/abi/avx/args.h
  6e43bc6b3d6feb70612d399a677d1c7d  gcc/testsuite/gcc.target/x86_64/abi/avx/asm-support-darwin.s
  0df09e54902b0a238caad6de9dc92c5d  gcc/testsuite/gcc.target/x86_64/abi/avx/asm-support.S
*************** d3c71d269c1b4265e86c5ace1089e848  gcc/te
*** 54865,54871 ****
  b43e5e8d171dcdbec5cac42b0b9a298c  gcc/testsuite/gcc.target/x86_64/abi/avx/test_passing_m256.c
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  d02989c16f0d1cd0951fe435483c550e  gcc/testsuite/gcc.target/x86_64/abi/avx/test_passing_unions.c
! 7211dd899f8a3a13bb0ce750d7592aff  gcc/testsuite/gcc.target/x86_64/abi/avx512f/abi-avx512f.exp
  2cf03d73572ce81dab43dcceeeacf5c4  gcc/testsuite/gcc.target/x86_64/abi/avx512f/args.h
  c79ac297933c3dae25e3f797420d1814  gcc/testsuite/gcc.target/x86_64/abi/avx512f/asm-support-darwin.s
  018d5507f0c4c2e50d7895e924a53c1b  gcc/testsuite/gcc.target/x86_64/abi/avx512f/asm-support.S
--- 64027,64034 ----
  b43e5e8d171dcdbec5cac42b0b9a298c  gcc/testsuite/gcc.target/x86_64/abi/avx/test_passing_m256.c
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! 2712f2843274c5262e020aca5e18fc41  gcc/testsuite/gcc.target/x86_64/abi/avx/test_varargs-m256.c
! 3b12071cd6ef87fbca74eafe1f8d69ee  gcc/testsuite/gcc.target/x86_64/abi/avx512f/abi-avx512f.exp
  2cf03d73572ce81dab43dcceeeacf5c4  gcc/testsuite/gcc.target/x86_64/abi/avx512f/args.h
  c79ac297933c3dae25e3f797420d1814  gcc/testsuite/gcc.target/x86_64/abi/avx512f/asm-support-darwin.s
  018d5507f0c4c2e50d7895e924a53c1b  gcc/testsuite/gcc.target/x86_64/abi/avx512f/asm-support.S
*************** c79ac297933c3dae25e3f797420d1814  gcc/te
*** 54874,54880 ****
  9c2b013a549bbd28ac8dbd2c2d9cd181  gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_passing_m512.c
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! 1745eeb2288a9425e49ed6ed90d552c0  gcc/testsuite/gcc.target/x86_64/abi/callabi/callabi.exp
  b52212e25b4fe43a1bda56b50d2cc914  gcc/testsuite/gcc.target/x86_64/abi/callabi/callabi.h
  bd08629b87a61bb1d8bfca958f60b18f  gcc/testsuite/gcc.target/x86_64/abi/callabi/func-1.c
  17951c08530e05273568b3b636fb8a4e  gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2a.c
--- 64037,64044 ----
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! ea57c03627834ae6586c0f2b69bf32bc  gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_varargs-m512.c
! 76c4cad4f0ba493e5123ca8ffe12256f  gcc/testsuite/gcc.target/x86_64/abi/callabi/callabi.exp
  b52212e25b4fe43a1bda56b50d2cc914  gcc/testsuite/gcc.target/x86_64/abi/callabi/callabi.h
  bd08629b87a61bb1d8bfca958f60b18f  gcc/testsuite/gcc.target/x86_64/abi/callabi/func-1.c
  17951c08530e05273568b3b636fb8a4e  gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2a.c
*************** d02a2912e872fd8b7b39b69b74482091  gcc/te
*** 54895,54904 ****
  dfc167e3c82be6261ef045c50a409cf9  gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-6.c
  002286d968abb2e5012ebb83dd44784d  gcc/testsuite/gcc.target/x86_64/abi/defines.h
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! a1403658b61c3f2057e39a3881ed84e1  gcc/testsuite/gcc.target/x86_64/abi/ms-sysv/do-test.S
! ba6fc57124466febe6d63a25e8e14cb2  gcc/testsuite/gcc.target/x86_64/abi/ms-sysv/gen.cc
! a1df9c353e080f136b0c25f19aab882f  gcc/testsuite/gcc.target/x86_64/abi/ms-sysv/ms-sysv.c
! 2129c016b1ae814eed8cb0b3fde664ac  gcc/testsuite/gcc.target/x86_64/abi/ms-sysv/ms-sysv.exp
  df350cc8fc42fcbfb44edc088765d60a  gcc/testsuite/gcc.target/x86_64/abi/test_3_element_struct_and_unions.c
  54a02258e782aaa35101b4f6cddbe300  gcc/testsuite/gcc.target/x86_64/abi/test_basic_alignment.c
  21f9b335d755c74bdef8998aeac98585  gcc/testsuite/gcc.target/x86_64/abi/test_basic_array_size_and_align.c
--- 64059,64068 ----
  dfc167e3c82be6261ef045c50a409cf9  gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-6.c
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! f17ac696f8f58a276faba89720233dea  gcc/testsuite/gcc.target/x86_64/abi/ms-sysv/do-test.S
! cf207cd32f48bf81f1c2ea9397f53856  gcc/testsuite/gcc.target/x86_64/abi/ms-sysv/gen.cc
! b14bf90b9e86d7c81b95cad9c4d55dae  gcc/testsuite/gcc.target/x86_64/abi/ms-sysv/ms-sysv.c
! c10f46752d37f1ee37d4961caf6dbd60  gcc/testsuite/gcc.target/x86_64/abi/ms-sysv/ms-sysv.exp
  df350cc8fc42fcbfb44edc088765d60a  gcc/testsuite/gcc.target/x86_64/abi/test_3_element_struct_and_unions.c
  54a02258e782aaa35101b4f6cddbe300  gcc/testsuite/gcc.target/x86_64/abi/test_basic_alignment.c
  21f9b335d755c74bdef8998aeac98585  gcc/testsuite/gcc.target/x86_64/abi/test_basic_array_size_and_align.c
*************** d1aa3b503894f1728782a16daf8bca83  gcc/te
*** 54916,54921 ****
--- 64080,64086 ----
  83d81ea8d13fe674037de1aacf16063d  gcc/testsuite/gcc.target/x86_64/abi/test_passing_structs_and_unions.c
  2a337f485e6f125f05af1e64111b42b7  gcc/testsuite/gcc.target/x86_64/abi/test_passing_unions.c
  23d0b37c6c019ca5d8aef8fb161955cc  gcc/testsuite/gcc.target/x86_64/abi/test_struct_returning.c
+ 9c0bdc004a7bbb1b72ef0d57d6691f06  gcc/testsuite/gcc.target/x86_64/abi/test_varargs-m128.c
  77a2aaa1772edf65040dc6929b494d8f  gcc/testsuite/gcc.target/x86_64/abi/test_varargs.c
  3283b2c71dc0b49b5a93c00277e1c56f  gcc/testsuite/gcc.target/xstormy16/below100.S
  1594c5c73df84e3d3c12204103dd4c1f  gcc/testsuite/gcc.target/xstormy16/below100.ld
*************** de974d8f497b1ad76694e8f9333fcd26  gcc/te
*** 55123,55130 ****
  92244b620516764d25382b815309419b  gcc/testsuite/gcc.target/xstormy16/sfr/27_if0_sfrw_bitfield_8.c
  292d09294f8beccfa611eb5d5ace3e5d  gcc/testsuite/gcc.target/xstormy16/sfr/27_if0_sfrw_bitfield_b.c
  399545481a5e90f464e00d2cdb3b624f  gcc/testsuite/gcc.target/xstormy16/sfr/27_if0_sfrw_bitfield_f.c
! 3015a0b6be55ee94a6732ba10dd980c5  gcc/testsuite/gcc.target/xstormy16/xstormy16.exp
! 81572b2e024cdf332b892a6eefbe2cea  gcc/testsuite/gcc.test-framework/README
  096a37c4b1e488bdb060872ca7b99862  gcc/testsuite/gcc.test-framework/dg-bogus-exp-P.c
  9f91f73374d446d6b0085730a8104942  gcc/testsuite/gcc.test-framework/dg-bogus-exp-XF.c
  570821aa898995690ac6f67de0840c1a  gcc/testsuite/gcc.test-framework/dg-do-assemble-exp-P.c
--- 64288,64298 ----
  92244b620516764d25382b815309419b  gcc/testsuite/gcc.target/xstormy16/sfr/27_if0_sfrw_bitfield_8.c
  292d09294f8beccfa611eb5d5ace3e5d  gcc/testsuite/gcc.target/xstormy16/sfr/27_if0_sfrw_bitfield_b.c
  399545481a5e90f464e00d2cdb3b624f  gcc/testsuite/gcc.target/xstormy16/sfr/27_if0_sfrw_bitfield_f.c
! aa90d60dade8551187e25e7375328f67  gcc/testsuite/gcc.target/xstormy16/xstormy16.exp
! fc75a0f9bf2050602dba2ff080a220b4  gcc/testsuite/gcc.target/xtensa/pr91880.c
! acfb44b971ca766549ce4e3d2974f084  gcc/testsuite/gcc.target/xtensa/pr94584.c
! 5140da03411196ebe57546d6a316aac3  gcc/testsuite/gcc.target/xtensa/xtensa.exp
! 843838fc35cb88bd164d239b2591a8b9  gcc/testsuite/gcc.test-framework/README
  096a37c4b1e488bdb060872ca7b99862  gcc/testsuite/gcc.test-framework/dg-bogus-exp-P.c
  9f91f73374d446d6b0085730a8104942  gcc/testsuite/gcc.test-framework/dg-bogus-exp-XF.c
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*************** f062cb0a2876f333f28f92446947c4ba  gcc/te
*** 55176,55192 ****
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--- 64344,64362 ----
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*************** d733feb68f910c0d62c7cb454b6accf1  gcc/te
*** 55205,55231 ****
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--- 64375,64418 ----
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*************** c5c7e97bc1737359df54f060aaec7469  gcc/te
*** 55236,55241 ****
--- 64423,64429 ----
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*************** dee0f822a13e4056b5394870a7c74761  gcc/te
*** 55246,55256 ****
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--- 64434,64445 ----
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*************** f3a1a3ccef2dfb9805ab0a3f9233b0a1  gcc/te
*** 55469,55474 ****
--- 64658,64667 ----
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*************** f7eb4505340130cdb2527ff9989b20f3  gcc/te
*** 55492,55497 ****
--- 64685,64691 ----
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*************** e1b2201bb7bef13edd5b1dd62a016069  gcc/te
*** 55545,55555 ****
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--- 64739,64750 ----
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*************** bb9e006cebe601f91fae1b967d929f57  gcc/te
*** 55563,55568 ****
--- 64758,64764 ----
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*************** b32ac2de7289a218e373f46522a7eee5  gcc/te
*** 55581,55587 ****
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*** 55658,55663 ****
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*** 55713,55719 ****
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*** 55746,55751 ****
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*** 55929,55934 ****
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*** 56035,56047 ****
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*************** e3408518b8b4c811d02328352ef87de6  gcc/te
*** 56190,56203 ****
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*************** fb44509087d96cafd81f6b3914fa210d  gcc/te
*** 56215,56220 ****
--- 65451,65457 ----
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*************** c66877e43f14604e03d886630f87827e  gcc/te
*** 56470,56482 ****
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--- 65707,65717 ----
*************** d1920a0ad9ef7df56e67e67aed392ab6  gcc/te
*** 56534,56539 ****
--- 65769,65775 ----
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*************** aac183450c9c9d721b58877055faeff1  gcc/te
*** 56863,56869 ****
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! 670b5d2cd7dc20c2372ef9f645c6267d  gcc/testsuite/gdc.test/fail_compilation/staticarrayoverflow.d
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--- 66099,66108 ----
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! ee53be1c1b62bd1214b310b978732fa1  gcc/testsuite/gdc.test/fail_compilation/staticarrayoverflow.d
! 1fcc8aaa8f4d74a4f1abe57e47cfd353  gcc/testsuite/gdc.test/fail_compilation/staticforeach1.d
! 69da8fec6e17cf06c0720278a97abb96  gcc/testsuite/gdc.test/fail_compilation/staticforeach2.d
! bb6598a0d52b49923b14222dee510692  gcc/testsuite/gdc.test/fail_compilation/staticforeach3.d
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*************** a5f1a7b08026edaba53cf01160cae151  gcc/te
*** 56899,56904 ****
--- 66138,66144 ----
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  b04d3086bfc8fd3a8aa2af8f6ba255b5  gcc/testsuite/gdc.test/fail_compilation/test16589.d
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*************** f79b6d410e2678b3fd39b826e3d92208  gcc/te
*** 56924,56929 ****
--- 66164,66170 ----
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  eb741612728d2cbfb86e3a57b73f09b5  gcc/testsuite/gdc.test/fail_compilation/testscopestatic.d
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*************** ab8bcdd4398caf02791b6a8a5c0a92f7  gcc/te
*** 56931,56937 ****
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--- 66172,66177 ----
*************** c94753459d78c7629a37ddb7b9e7659e  gcc/te
*** 56939,56945 ****
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! 0a1c82151e2988efef28a5fc319cfe57  gcc/testsuite/gdc.test/runnable/arrayop.d
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--- 66179,66185 ----
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! 3dc061aea78005c462247d997510875c  gcc/testsuite/gdc.test/runnable/arrayop.d
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*************** ce25ded6de1d10df50cf50907c7eda7f  gcc/te
*** 56951,56984 ****
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! 834fbe7106e45513f21a7e48c7ecbc23  gcc/testsuite/gdc.test/runnable/ctorpowtests.d
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  02ea8fe985b63cc406b916d3c6ba3484  gcc/testsuite/gdc.test/runnable/extra-files/alice30.txt
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- 60960f74d8a7558c6ffebf02313fa926  gcc/testsuite/gdc.test/runnable/extra-files/cpp_abi_tests.cpp
- ff469626c32c6ea83eda3220c6a80f89  gcc/testsuite/gdc.test/runnable/extra-files/cppb.cpp
- 445bb573a9000f649111882b913e3bc9  gcc/testsuite/gdc.test/runnable/extra-files/externmangle.cpp
- 2fc8bcf6bde9d9e7c0d26ec53c4b5a61  gcc/testsuite/gdc.test/runnable/extra-files/externmangle2.cpp
  6d37d9b9dbd0c7f4c9aac0ccf7a40ddf  gcc/testsuite/gdc.test/runnable/extra-files/foo37.txt
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--- 66191,66215 ----
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  522160a074fb8b5b968ebe153c2436b5  gcc/testsuite/gdc.test/runnable/casting.d
  af85e848ea130104ea5f4cb32d15d20c  gcc/testsuite/gdc.test/runnable/circular.d
  3685129d0a895a1072addc7f7d9d175b  gcc/testsuite/gdc.test/runnable/closure.d
! cadad7e54f827a88d0e880b8479ee2ca  gcc/testsuite/gdc.test/runnable/complex.d
! 039419318e3aff125730b0c926d61bfa  gcc/testsuite/gdc.test/runnable/constfold.d
! d77f33fd26743890ee1c93b3a70e64af  gcc/testsuite/gdc.test/runnable/ctorpowtests.d
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  a916dc46125ed01b449ab2b1ed3a5d5f  gcc/testsuite/gdc.test/runnable/dhry.d
+ e16a173b033d44ac86490e5b91a9a2be  gcc/testsuite/gdc.test/runnable/e7804.d
  a13e36c647ba0bdefcee550b8b20b770  gcc/testsuite/gdc.test/runnable/eh.d
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  02ea8fe985b63cc406b916d3c6ba3484  gcc/testsuite/gdc.test/runnable/extra-files/alice30.txt
  6d37d9b9dbd0c7f4c9aac0ccf7a40ddf  gcc/testsuite/gdc.test/runnable/extra-files/foo37.txt
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  d964a72afe8c1ec8814ea7b333fbc2f5  gcc/testsuite/gdc.test/runnable/extra-files/std14198/conv.d
*************** d1a345bbcd6c3027691c0839be38cd1c  gcc/te
*** 56990,56996 ****
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  ffdf26707f658563246f6f2eb55a1ed9  gcc/testsuite/gdc.test/runnable/foreach3.d
! 7b92666d798139be68a640e312607e10  gcc/testsuite/gdc.test/runnable/foreach4.d
  f05c195ef95d90eefce821474cf9d90b  gcc/testsuite/gdc.test/runnable/foreach5.d
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  3ff1a9215f43376d58880f55d86aeff9  gcc/testsuite/gdc.test/runnable/functype.d
--- 66221,66227 ----
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  ffdf26707f658563246f6f2eb55a1ed9  gcc/testsuite/gdc.test/runnable/foreach3.d
! 54958f02697b235757871bf55160f48a  gcc/testsuite/gdc.test/runnable/foreach4.d
  f05c195ef95d90eefce821474cf9d90b  gcc/testsuite/gdc.test/runnable/foreach5.d
  5eba3216edb07b609a8aca62c4fb5cc6  gcc/testsuite/gdc.test/runnable/funclit.d
  3ff1a9215f43376d58880f55d86aeff9  gcc/testsuite/gdc.test/runnable/functype.d
*************** e2c68cb85bc6e5c362db337fa60853dc  gcc/te
*** 57005,57012 ****
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  e5871ac8d80f4ab28dc0d9900e8c84d4  gcc/testsuite/gdc.test/runnable/ice4481.d
! 48d6a67dab03b87eae0f568004568bee  gcc/testsuite/gdc.test/runnable/ifti.d
! e60b04325bef362f8bc32b807ae742f4  gcc/testsuite/gdc.test/runnable/implicit.d
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  eb8c99722b703fc7a7445bfdb91951ee  gcc/testsuite/gdc.test/runnable/imports/Other.d
  5549289e20c256bd7b6bab2b07484a85  gcc/testsuite/gdc.test/runnable/imports/a11447.d
--- 66236,66243 ----
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  e5871ac8d80f4ab28dc0d9900e8c84d4  gcc/testsuite/gdc.test/runnable/ice4481.d
! c8024a61dd9b2e0aba48a825e6930552  gcc/testsuite/gdc.test/runnable/ifti.d
! 58a3ddd8d0f2508e713971b7b0eb3928  gcc/testsuite/gdc.test/runnable/implicit.d
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  5549289e20c256bd7b6bab2b07484a85  gcc/testsuite/gdc.test/runnable/imports/a11447.d
*************** b593348ba629d95f3e2140b1213d1224  gcc/te
*** 57099,57105 ****
  15d1e917fbc17c549e2b4723b359f7f3  gcc/testsuite/gdc.test/runnable/imports/std15021conv.d
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! 7f05b69978a60480f0dd4d9074125fa1  gcc/testsuite/gdc.test/runnable/imports/template13478a.d
  10bd984d633d36ab903c949cb584bec9  gcc/testsuite/gdc.test/runnable/imports/template13478b.d
  cf75510c3d300ca200d95b6ef649d21b  gcc/testsuite/gdc.test/runnable/imports/template2962a.d
  f0a88a4af2dd65871239e79286e3a4c3  gcc/testsuite/gdc.test/runnable/imports/template_ovs1.d
--- 66330,66336 ----
  15d1e917fbc17c549e2b4723b359f7f3  gcc/testsuite/gdc.test/runnable/imports/std15021conv.d
  7067241491a24372aef9c52a9fc72fd3  gcc/testsuite/gdc.test/runnable/imports/std15021format.d
  0d40bf9565576a0caf96bd6f2c4a4bd4  gcc/testsuite/gdc.test/runnable/imports/std15030algo.d
! 0a4bcc5ab0338be41359c662d96774a5  gcc/testsuite/gdc.test/runnable/imports/template13478a.d
  10bd984d633d36ab903c949cb584bec9  gcc/testsuite/gdc.test/runnable/imports/template13478b.d
  cf75510c3d300ca200d95b6ef649d21b  gcc/testsuite/gdc.test/runnable/imports/template2962a.d
  f0a88a4af2dd65871239e79286e3a4c3  gcc/testsuite/gdc.test/runnable/imports/template_ovs1.d
*************** eca2528a4b2f620d2c38d1abb893652c  gcc/te
*** 57168,57182 ****
  25e6928fcac8b8805188099fa463c745  gcc/testsuite/gdc.test/runnable/imports/ufcs5e.d
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  f7d709d852581fa8afa0dd0d20f5b2a3  gcc/testsuite/gdc.test/runnable/inline14560.d
! 30dac6e3e8387d616ea5c41a8a42ad21  gcc/testsuite/gdc.test/runnable/inner.d
  2135482c9c4e28e5ca5c0cd3f1fa5cf0  gcc/testsuite/gdc.test/runnable/interface.d
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  2407b9b13a96d9a0d1a0ca6c9907aa53  gcc/testsuite/gdc.test/runnable/interface3.d
! 60b277c64c80628d01d1196462ea4fa6  gcc/testsuite/gdc.test/runnable/interpret.d
  44d581e4ea1149f2833ca1c0e41af744  gcc/testsuite/gdc.test/runnable/interpret2.d
! e79189538ca7d1f2dfe50b9c7b3ff71c  gcc/testsuite/gdc.test/runnable/issue8671.d
! 1eff97e81a9a2c1afdc2efe5894baf91  gcc/testsuite/gdc.test/runnable/lazy.d
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--- 66399,66413 ----
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  f7d709d852581fa8afa0dd0d20f5b2a3  gcc/testsuite/gdc.test/runnable/inline14560.d
! 1ce86e2b2367beba6d7f73d218400208  gcc/testsuite/gdc.test/runnable/inner.d
  2135482c9c4e28e5ca5c0cd3f1fa5cf0  gcc/testsuite/gdc.test/runnable/interface.d
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  2407b9b13a96d9a0d1a0ca6c9907aa53  gcc/testsuite/gdc.test/runnable/interface3.d
! 3b109bd27d40e73d8f6f7b6c9e6c823e  gcc/testsuite/gdc.test/runnable/interpret.d
  44d581e4ea1149f2833ca1c0e41af744  gcc/testsuite/gdc.test/runnable/interpret2.d
! ab921221e5ac9c8ade727a921a5c03b9  gcc/testsuite/gdc.test/runnable/issue8671.d
! dae61d44f57b31f459a7cdbb276fa058  gcc/testsuite/gdc.test/runnable/lazy.d
  39e7e24e679fa283298fb63c41528a27  gcc/testsuite/gdc.test/runnable/ldc_github_1677.d
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  256dcf104e7fc7dcd3ae1f3f5ec34eaa  gcc/testsuite/gdc.test/runnable/link10425.d
*************** ca7670be76017ad4ec8d59f894f62a6e  gcc/te
*** 57218,57226 ****
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  faf6669be18e7f1ce7ed6a63b0acd76e  gcc/testsuite/gdc.test/runnable/mangle.d
! c6b47240e31c9bcde2edc05a5f92c133  gcc/testsuite/gdc.test/runnable/mars1.d
! 42958ba272fba56e858e07419b151045  gcc/testsuite/gdc.test/runnable/mixin1.d
! 3fadaa124fa003d7597766c2295bb2ba  gcc/testsuite/gdc.test/runnable/mixin2.d
  909a47df894aefd20f77dfd8a9004146  gcc/testsuite/gdc.test/runnable/mod1.d
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--- 66449,66457 ----
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! 481f0519a109d00282aff011127ab089  gcc/testsuite/gdc.test/runnable/mars1.d
! a4bee21a020ea290806504d1b77743ea  gcc/testsuite/gdc.test/runnable/mixin1.d
! ded76eb1dad4c5dfbc4e9a6ed6ade6a4  gcc/testsuite/gdc.test/runnable/mixin2.d
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*************** ce0513a8a733c1c29954074996a074f3  gcc/te
*** 57237,57263 ****
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  799a79924a4d25ed330a10b03d20ecf7  gcc/testsuite/gdc.test/runnable/statictor.d
! 1f0dbe3b8c14792f97bbbde9f345fff9  gcc/testsuite/gdc.test/runnable/stress.d
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! ce173ac82ec9d83663e1bf1aca79129b  gcc/testsuite/gdc.test/runnable/template2.d
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  5499926d56a003c16b0f8973b17ff6d4  gcc/testsuite/gdc.test/runnable/template3.d
! eb3a5e0b51067a8486669e0c89255939  gcc/testsuite/gdc.test/runnable/template4.d
  025aeb98a1c60f2f97609740c36f62ed  gcc/testsuite/gdc.test/runnable/template8.d
! 08acbbbfb1b4116e6e4b4ce9a0d472a4  gcc/testsuite/gdc.test/runnable/template9.d
  fba2538fa071a27eea05ac9cf3eeed88  gcc/testsuite/gdc.test/runnable/test10.d
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! 66f11a2f4021370e3eb66701e05caf1e  gcc/testsuite/gdc.test/runnable/test10942.d
! 07e27a6bdbfb29926b7850ab5387860f  gcc/testsuite/gdc.test/runnable/test11.d
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--- 66468,66496 ----
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! a127ac15119e72bbca65734687d71bde  gcc/testsuite/gdc.test/runnable/runnable.exp
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! 3c2b7a88e3d5f1ee35a46b76f2849b49  gcc/testsuite/gdc.test/runnable/stress.d
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! e198ed86ba26a47d91d4b5e4db3e55fb  gcc/testsuite/gdc.test/runnable/template2.d
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! 89aeed5ac94ea37ca4988b348d4f1418  gcc/testsuite/gdc.test/runnable/template4.d
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! 73a789f211156c28d6e4776659f56317  gcc/testsuite/gdc.test/runnable/template9.d
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! df13277f0fe7137ea320f3b104b04ba4  gcc/testsuite/gdc.test/runnable/test10942.d
! bf7bec35c09af7f408bfec2897dcaf31  gcc/testsuite/gdc.test/runnable/test11.d
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*************** c950401e8254e2fef34aa7dad20b0ad4  gcc/te
*** 57265,57272 ****
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! a525be17a582a1637080e13471e881a6  gcc/testsuite/gdc.test/runnable/test12.d
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--- 66498,66505 ----
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*************** d6bfcb0ab1afec471863af71a1556923  gcc/te
*** 57276,57282 ****
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! d56d6588f9ae5be5824cf390522f9afb  gcc/testsuite/gdc.test/runnable/test15.d
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--- 66509,66515 ----
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! 9bbca47c2a6b9fc40b6ccf00d93b1709  gcc/testsuite/gdc.test/runnable/test15.d
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*************** d370be7de707dfc75ca94c0574846735  gcc/te
*** 57294,57321 ****
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! 3ecb7355cc03258a738a3ead5daba63c  gcc/testsuite/gdc.test/runnable/test27.d
! 1313e8e298909201f1f017ce9fa7ad01  gcc/testsuite/gdc.test/runnable/test28.d
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--- 66527,66554 ----
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*************** bd25915921a0a9b0607f30be6824601f  gcc/te
*** 57324,57334 ****
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--- 66557,66567 ----
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*************** e6610f573d73232d050bb6527b47eefd  gcc/te
*** 57348,57362 ****
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*************** b5d03efe728963696491f3c036bc8f5c  gcc/te
*** 57365,57383 ****
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--- 66597,66615 ----
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*************** a92fb2b0fbd5c997a6e182a3a3747b83  gcc/te
*** 57387,57404 ****
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--- 66619,66636 ----
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*************** b2c3ced1057b5c1d49ddbadd430eedd1  gcc/te
*** 57408,57425 ****
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--- 66640,66668 ----
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*************** f960ece33e6f461552cdfe23d308516d  gcc/te
*** 57428,57435 ****
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*** 57450,57455 ****
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*** 57458,57464 ****
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*** 57466,57475 ****
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*************** ca8eb6db97f18fddd890561a22a8cfbb  gcc/te
*** 57521,57527 ****
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*************** ce98de1957479e069ab10632545c5afa  gcc/te
*** 57679,57685 ****
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*** 57693,57698 ****
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*** 57702,57716 ****
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*** 57720,57728 ****
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*************** a815d3d0eea1fbd2ee087c99d9a5efd8  gcc/te
*** 57834,57839 ****
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*** 57917,57925 ****
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*** 58322,58328 ****
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*** 58367,58379 ****
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*** 58414,58419 ****
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*** 58472,58477 ****
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*** 58487,58496 ****
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*** 58823,58829 ****
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*** 58832,58837 ****
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*** 58886,58891 ****
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*************** d9bb21b2f1afd9c2ab941b2e00142e60  gcc/te
*** 58923,58930 ****
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--- 68241,68249 ----
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*************** ad1671c9a89b0639af833c746c8e6caf  gcc/te
*** 58986,58992 ****
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--- 68305,68311 ----
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*************** adf3e611b5d9dd41324a93faee4fe2c9  gcc/te
*** 59017,59023 ****
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--- 68336,68342 ----
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*************** f49bca9d2dccbedebe34c595e7e099d0  gcc/te
*** 59026,59034 ****
--- 68345,68381 ----
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*************** c6963f1245c42ce7d7b614a37da312d2  gcc/te
*** 59037,59048 ****
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--- 68384,68398 ----
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*************** ec8381fca3141962496a31ffb461ea8f  gcc/te
*** 59056,59062 ****
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--- 68406,68415 ----
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*************** e2a1e1b15aac566b0fdce1a94c97eea0  gcc/te
*** 59085,59116 ****
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*************** b708a831578a6c876ea16b95695f6103  gcc/te
*** 59231,59237 ****
--- 68585,68595 ----
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*************** fdf6add00f0bd7ce436abe942eb65cf3  gcc/te
*** 59277,59282 ****
--- 68635,68641 ----
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*************** cf5153f1f09bb80f5a964ce90c83a5dc  gcc/te
*** 59288,59297 ****
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--- 68647,68656 ----
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*************** effb75cdb31e3dbcd1a7b85592b84c1f  gcc/te
*** 59360,59370 ****
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--- 68719,68729 ----
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*************** f10c4681bf625e46adae521a3de13a48  gcc/te
*** 59389,59400 ****
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--- 68748,68760 ----
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*************** a0572a1bab68b675e7ec3a07fdfcbf07  gcc/te
*** 59406,59412 ****
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--- 68766,68772 ----
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*************** adae9a19ec811bbf55918625d353631f  gcc/te
*** 59551,59556 ****
--- 68911,68917 ----
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*************** d9dcad9e03bd8c27d5f76eaa4cf71a0e  gcc/te
*** 59570,59577 ****
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*************** db1d5eafd5e70f307b6828e43f43c0b4  gcc/te
*** 59633,59639 ****
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*************** ed0ed90517bd964cce5576312009f30d  gcc/te
*** 59702,59724 ****
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*************** b6b177ba5911d45f74f61515ed3f5040  gcc/te
*** 60086,60137 ****
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--- 69469,69531 ----
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*************** cb1043758b27579bfc73998c460f4449  gcc/te
*** 60149,60161 ****
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--- 69543,69555 ----
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! 331b7b278599a4c1ca8e0773b3988f72  gcc/testsuite/gfortran.dg/goacc/routine-level-of-parallelism-1.f90
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*************** ec44b9b0a39ac8255bb3015ffa1a0a70  gcc/te
*** 60164,60174 ****
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--- 69558,69571 ----
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*************** dd2a54a711f3f1fc2d508534164228f9  gcc/te
*** 60176,60182 ****
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--- 69573,69579 ----
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*************** c8bcf6337f95b605de3d54a7f8e5ab84  gcc/te
*** 60244,60250 ****
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--- 69641,69647 ----
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*************** fa41d6dd0ec4bc45beb3cbce04bf821d  gcc/te
*** 60253,60264 ****
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--- 69650,69662 ----
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*************** ab6d18741860d8f9094676890b96e068  gcc/te
*** 60278,60284 ****
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--- 69676,69682 ----
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*************** bb35c5bd7245c0d5e4e5f3ed549e7fef  gcc/te
*** 60332,60337 ****
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*************** b3d1280c39c6cae9dddab498b1e1eeb4  gcc/te
*** 60369,60375 ****
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*************** b75e4a6eaec211becf176c75768a3f3d  gcc/te
*** 60378,60383 ****
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*************** b668767cebd1d81ba2d2ca1138456cbe  gcc/te
*** 60395,60401 ****
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*************** a4c577f061fc150f215f415ecc0e6bec  gcc/te
*** 60431,60437 ****
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*************** ccb1954a8e334f76679180ff6418e93d  gcc/te
*** 60488,60499 ****
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*************** f9932e22f4bc6baa989154035dbac7c1  gcc/te
*** 60501,60514 ****
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*************** dbee4ce70df4de716a599649b8dec3bf  gcc/te
*** 60535,60553 ****
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*** 60563,60568 ****
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*************** ed9b46b80fba02ea5657d6ed2bf9073a  gcc/te
*** 60600,60605 ****
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*************** a3cc802a819f33ed71f4945553bb4ac6  gcc/te
*** 60616,60622 ****
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*************** d0fdfb1260988468dbfc57fc49c04ccf  gcc/te
*** 60639,60647 ****
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*************** b988918875d857d86496e0e9a3c4b68a  gcc/te
*** 60653,60659 ****
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*************** f6acaa4a3e082cac8858ca2288026cca  gcc/te
*** 60743,60766 ****
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*************** fc2b293a2d13f23c8a72aa82b137a7b1  gcc/te
*** 60815,60824 ****
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*************** b2772a3ab9ea94ecf88b3da0109c1091  gcc/te
*** 60846,60867 ****
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*************** e1470ece82d6d63b2a8eb05aebfedb92  gcc/te
*** 60879,60884 ****
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*************** e8802e8eb3b2f944cc72a425d0f1fafb  gcc/te
*** 60939,60951 ****
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*************** b970e12e9b81e2fa5708fa8924a00c7d  gcc/te
*** 60954,60961 ****
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*** 60966,60983 ****
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*** 61072,61084 ****
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--- 70552,70558 ----
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*************** a9d014274eb56078098dae3d4f9a8fe7  gcc/te
*** 61135,61141 ****
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--- 70576,70582 ----
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*************** a7713918ec13950e8efe9741aec82184  gcc/te
*** 61188,61194 ****
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--- 70629,70635 ----
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*************** de1e98dde053bc067885c05b22d539bb  gcc/te
*** 61202,61210 ****
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--- 70643,70651 ----
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*************** fcb4cc5427acbece895c0e13436e7bda  gcc/te
*** 61214,61219 ****
--- 70655,70662 ----
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*************** e88201894b7f8f5345f56f48a5f3651b  gcc/te
*** 61227,61241 ****
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--- 70670,70684 ----
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! 0b958f2a628bb3984b2aa72803928572  gcc/testsuite/gfortran.dg/minlocval_1.f90
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*************** a8f95eeacd2f66c9e352837a43087369  gcc/te
*** 61244,61249 ****
--- 70687,70693 ----
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*************** e972ad6e0a543eb12481e61ddb341c93  gcc/te
*** 61269,61275 ****
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--- 70713,70720 ----
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*************** cee8f32acb5435cd91e0bf7381211b38  gcc/te
*** 61293,61299 ****
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--- 70738,70744 ----
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*************** caecc4fd8aa5de5428a7b4a6c3ee736b  gcc/te
*** 61302,61307 ****
--- 70747,70753 ----
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*************** ea3c8aeb506b4c30f03aaff80bc6ee7a  gcc/te
*** 61379,61386 ****
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--- 70825,70832 ----
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*************** a296908ecff4ded4e2606e013ec0101c  gcc/te
*** 61428,61434 ****
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--- 70874,70880 ----
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*************** c801fecff5102b3998fcefc3ac399fc3  gcc/te
*** 61447,61462 ****
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*************** ccf25bc57c7fd0870f3fa7fea60340a6  gcc/te
*** 61495,61505 ****
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*************** adbcc21a5778904b9a3a281e08e68479  gcc/te
*** 61541,61548 ****
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*** 61553,61559 ****
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*** 61652,61658 ****
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*** 61677,61682 ****
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*** 61706,61711 ****
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*** 61757,61763 ****
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*** 61789,61795 ****
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*** 61933,61938 ****
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*** 62505,62511 ****
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--- 72275,72281 ----
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*************** b7f6bbbf397c86a8d56e483b51925910  gcc/te
*** 62768,62774 ****
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*** 62782,62787 ****
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*** 62927,62934 ****
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*************** ccb2c405c07377f7654e2eb4d44d2805  gcc/te
*** 63048,63053 ****
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*** 63113,63119 ****
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*************** d92cb848a0308b1bcea693e043de8c76  gcc/te
*** 63157,63164 ****
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*************** bc4473a2aaf28f99551d675fa69f668f  gcc/te
*** 63175,63181 ****
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*************** a0ec0eaa57721661722789d40b59235f  gcc/te
*** 63229,63235 ****
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*** 63284,63291 ****
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*** 63320,63325 ****
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*** 63376,63381 ****
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*************** ad43c4d3cb4733e86d9206b28785afd0  gcc/te
*** 63384,63394 ****
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*************** e0681ebf1cc0d7c0c6333d4894f4bb3d  gcc/te
*** 63441,63446 ****
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*************** bbb6998ea100c6c2039976c6446a0c10  gcc/te
*** 63465,63471 ****
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*************** e908da4224e8c1e801b93e3fde2381b1  gcc/te
*** 63484,63508 ****
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*************** bbc300d5c73a5a93f8c444d724c94f4e  gcc/te
*** 63528,63534 ****
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--- 73056,73061 ----
*************** faef1baec47674d096569b4803422d64  gcc/te
*** 63558,63563 ****
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*************** e2dd8115622860575ce72139d603a847  gcc/te
*** 63584,63590 ****
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*************** a52eb458aaac02f2c3cd8af034b99005  gcc/te
*** 63595,63601 ****
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*** 63634,63643 ****
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*** 63652,63658 ****
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*************** f32f4f6650669a28c4176a48b729c5a7  gcc/te
*** 63674,63679 ****
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*** 63690,63696 ****
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*************** cbd160fa487335a0853797f8c2cdb5b4  gcc/te
*** 63742,63748 ****
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*************** a7cb3bae40054f0bdff89ad3a696a3ab  gcc/te
*** 66636,66642 ****
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--- 76527,76533 ----
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*************** b1da4903f706ba19e2aab9e74a6a0c21  gcc/te
*** 67092,67098 ****
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! 840e92e0074e5764049d6d8a40220ab1  gcc/testsuite/go.test/test/nilptr2.go
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--- 76983,76989 ----
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*************** cd644384eebc8c1b05a70f19e4fc8854  gcc/te
*** 67176,67185 ****
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--- 77067,77077 ----
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*************** da2633ae9e3039a064e79583ac2ed729  gcc/te
*** 67204,67210 ****
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--- 77096,77102 ----
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*************** bb89285767406b5a1889295ccd7f67a3  gcc/te
*** 67222,67234 ****
--- 77114,77131 ----
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*************** b02011c7edbcfca8dfb3bd46815567fc  gcc/te
*** 67269,67274 ****
--- 77166,77172 ----
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  3dd91ef7035565601d335ad5b9e073e4  gcc/testsuite/jit.dg/test-operator-overloading.cc
*************** e309c53b14c724939a1564046c6a5df2  gcc/te
*** 67288,67362 ****
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! 2afbedd60d6f57d23a09f32890f7e01a  gcc/testsuite/lib/brig-dg.exp
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! 05194e4e5bd534e3dc533164ce5bf1d2  gcc/testsuite/lib/gcc-simulate-thread.exp
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! 917bbfa26ee5ea53a98ee9ed5fec6f34  gcc/testsuite/lib/gcov.exp
! 63c45c16f5f6b3f6c4d1f80e6aa3c6ae  gcc/testsuite/lib/gdc-dg.exp
! a207479cb2c3ef4d9321772c324e4261  gcc/testsuite/lib/gdc.exp
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! 1f7a0faa1dca257faf38214af0993709  gcc/testsuite/lib/gnat-dg.exp
! 13abcb54a84a1dc63892c10b5696ee61  gcc/testsuite/lib/gnat.exp
! f105ee49e119ed5e8bdeb9f642b2acc3  gcc/testsuite/lib/go-dg.exp
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! f6be659b2f474327d974d3a87b9aae80  gcc/testsuite/lib/go.exp
! cb8587c350e186db4490409ba05e09bb  gcc/testsuite/lib/lto.exp
! 6ce74025ce7ff77c0ab37175d7993cc2  gcc/testsuite/lib/mike-g++.exp
! c5a5061abf71facd2ad4c561981fb4d2  gcc/testsuite/lib/mike-gcc.exp
! b3f16f87d33217c47105cccfbace83f8  gcc/testsuite/lib/multiline.exp
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! 2abf3465903a8f323f7f801523eac0c3  gcc/testsuite/lib/objc.exp
! b60380636c94bc1c3ac0cfdf088ec315  gcc/testsuite/lib/options.exp
! bafce09477d3be62bb1367b07ddd11b7  gcc/testsuite/lib/plugin-support.exp
! a9a80eac027f289b7b5b174b694807c2  gcc/testsuite/lib/profopt.exp
! fbbf3d79960aea830ece1a3b86279261  gcc/testsuite/lib/prune.exp
! 3788b115da13da4283d156b030c75a66  gcc/testsuite/lib/scanasm.exp
! 3d7d22cd728a7a43dd18bc0433d469bb  gcc/testsuite/lib/scandump.exp
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! 232b79c1d797abde70da8763a486bc07  gcc/testsuite/lib/scanlang.exp
! 5aa9f264747a56bcf701e9bd3cc0380b  gcc/testsuite/lib/scanltranstree.exp
! e6321f166b32aa6358ef91407179cccd  gcc/testsuite/lib/scanoffloadrtl.exp
! 03eb44abca6cef54cc360d6b0d14fe53  gcc/testsuite/lib/scanoffloadtree.exp
! 8830e99aa006898a10576b71244c3f9a  gcc/testsuite/lib/scanrtl.exp
! 9312bdfaedf4fef49da9b601170063f9  gcc/testsuite/lib/scantree.exp
! 7acc2fe528fd93ffd4e5699c381e4683  gcc/testsuite/lib/scanwpaipa.exp
! 030dc615f05eb00335a0b2fd066509b0  gcc/testsuite/lib/target-libpath.exp
! b1611f78cda71099f7cb783fec6036cf  gcc/testsuite/lib/target-supports-dg.exp
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! b85604e4e8dd8de681a31f6c7d59204c  gcc/testsuite/lib/timeout-dg.exp
! 53159c18e733a12fd05a5058f29488d5  gcc/testsuite/lib/timeout.exp
! bdbef4b912783bdd87d681341a38b945  gcc/testsuite/lib/torture-options.exp
! 2df2adfaf47446f745ea3ff5a300bb09  gcc/testsuite/lib/tsan-dg.exp
! 47c53a42468cc54bed207602d7c85777  gcc/testsuite/lib/ubsan-dg.exp
! f21da81407b905f8367cbe34d8779b29  gcc/testsuite/lib/wrapper.exp
  55160ccf08a9b1444b32deb900dac569  gcc/testsuite/obj-c++.dg/Wimplicit-fallthrough-1.mm
  84caaa988ddff2a3ef9a3c9c9bfe6fbf  gcc/testsuite/obj-c++.dg/at-class-1.mm
! 8710830479d8b52291b04ecb094acdef  gcc/testsuite/obj-c++.dg/attributes/attributes.exp
  3ae67bbd6c30272de285ecf52bbe29c4  gcc/testsuite/obj-c++.dg/attributes/categ-attribute-1.mm
  bb7c92f88fdb2a6c371fe4b187f0cebd  gcc/testsuite/obj-c++.dg/attributes/categ-attribute-2.mm
  20e89698b24eeafa990cb80d6777719f  gcc/testsuite/obj-c++.dg/attributes/class-attribute-1.mm
--- 77186,77262 ----
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  97200377fda6e0eacaebef74c6eab900  gcc/testsuite/jit.dg/test-vector-types.cc
+ 5542ebc8aa1b198ad40aeeee64259afb  gcc/testsuite/jit.dg/test-version.c
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  6477c66fcebff4d502d26e2d247251ce  gcc/testsuite/jit.dg/verify-dynamic-library.c
! 1aeefec5e96c04e460d953a796cc0044  gcc/testsuite/lib/asan-dg.exp
! deda3a853143737b3c1f8d839c475756  gcc/testsuite/lib/atomic-dg.exp
! 7d82579bf0cb863692058f0152d89bc9  gcc/testsuite/lib/brig-dg.exp
! 573dbf63439cea9ff64551d146a02f32  gcc/testsuite/lib/brig.exp
! b801ebda07fd4f83b86418570864d9ae  gcc/testsuite/lib/c-compat.exp
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! 16cd0171b48da92b845ab0b5dbe040b5  gcc/testsuite/lib/clearcap.exp
! d02bef0d5f47128de6581847c5344783  gcc/testsuite/lib/compat.exp
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! 2d846cfa16957df03ea0899663ba018c  gcc/testsuite/lib/dg-pch.exp
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! 07ad3dc868b83184251a3fbf0af4b46b  gcc/testsuite/lib/fortran-modules.exp
! 4988802758d9eedd0e3aceed8a2f3b09  gcc/testsuite/lib/fortran-torture.exp
! a93e87185894e1dac7e0d6eb3b6a82d2  gcc/testsuite/lib/g++-dg.exp
! b461431e9b7f6f0cf968de1173a79e35  gcc/testsuite/lib/g++.exp
! c9f1179456d5315fb5621e80f92a4b78  gcc/testsuite/lib/gcc-defs.exp
! 544413331cd71c24608d4b2c729d759c  gcc/testsuite/lib/gcc-dg.exp
! efbcfa4d28f7e53efa7ab58e2c7e1e44  gcc/testsuite/lib/gcc-gdb-test.exp
! d3407b902d0f7b4b9cd90850a7d0b466  gcc/testsuite/lib/gcc-simulate-thread.exp
! 3c2c787fcc8ef5c7700261d7e7b54a7f  gcc/testsuite/lib/gcc.exp
! 674a35e6b0b36228df222d72193bdd05  gcc/testsuite/lib/gcov.exp
! e897eac8f31accc11d53cfae3ae16b0e  gcc/testsuite/lib/gdc-dg.exp
! 857df7607b2b55b633c2ea06e6acc8b1  gcc/testsuite/lib/gdc-utils.exp
! ab23eaa0145abe5e1e3f8db59e1c30f8  gcc/testsuite/lib/gdc.exp
! 1e3b8e945da5c9712a08b670026f2b05  gcc/testsuite/lib/gfortran-dg.exp
! 9f46408d4a5bf5a40fc562067fd252aa  gcc/testsuite/lib/gfortran.exp
! 88d55b88ba6d3d50d983ad21b01abbd4  gcc/testsuite/lib/gnat-dg.exp
! 2f6869a5a2c9d408835dd857c13ad0b7  gcc/testsuite/lib/gnat.exp
! fa0e9c87b4bb5cbbec31c013f106c05b  gcc/testsuite/lib/go-dg.exp
! 24fc5b65239aa599bcd8a360fa686372  gcc/testsuite/lib/go-torture.exp
! 9fb73c74927f136ca96a1650a0afcbee  gcc/testsuite/lib/go.exp
! 181c1deb48766e14cacedce4f54cb10c  gcc/testsuite/lib/lto.exp
! f684b812f5a56badb83daebd4c6b8eb9  gcc/testsuite/lib/mike-g++.exp
! f096fbc7a08f3654b6bfcddaa25889b1  gcc/testsuite/lib/mike-gcc.exp
! 12c4ef671535e7ec4ef84793ca5dbfda  gcc/testsuite/lib/multiline.exp
! c0e9657eb3ff782857d6219786093432  gcc/testsuite/lib/obj-c++-dg.exp
! 1566a8e594fbb3815947d33edce1fd63  gcc/testsuite/lib/obj-c++.exp
! af4d6049c526358b0bced72089af7076  gcc/testsuite/lib/objc-dg.exp
! 806d28b6041ba871e6d4fc726700722c  gcc/testsuite/lib/objc-torture.exp
! 5e09041ce7c4d5b2b52ba5c2287bd0ca  gcc/testsuite/lib/objc.exp
! 798104da27cee008686141a98b520f8b  gcc/testsuite/lib/options.exp
! 9440d87b50965ff5486b551ef11a634a  gcc/testsuite/lib/plugin-support.exp
! cd778530c8ca650e7a6e2de7066010bd  gcc/testsuite/lib/profopt.exp
! e7cfbfe7b4c97294430e789d215cd022  gcc/testsuite/lib/prune.exp
! 2ad9a8996d5e8fa158376c2f08e51439  gcc/testsuite/lib/scanasm.exp
! b0a4036b6c7e5c72770103d9d03169c5  gcc/testsuite/lib/scandump.exp
! 96a8959535595b881ea8a82d0869c90b  gcc/testsuite/lib/scanipa.exp
! a8809419eb55d449249784b4d9b971e2  gcc/testsuite/lib/scanlang.exp
! 3d095238d75b0a143c1ed59dc832f084  gcc/testsuite/lib/scanltranstree.exp
! 10d73a83fbd19c3d74d77ac38bcb7578  gcc/testsuite/lib/scanoffloadrtl.exp
! 67cda6aa9e18eede3a911a54dde7647c  gcc/testsuite/lib/scanoffloadtree.exp
! d632d5568c00760aea7b18467091554c  gcc/testsuite/lib/scanrtl.exp
! 30bb639c80611d9ab5b763b954641ec7  gcc/testsuite/lib/scantree.exp
! de7c3a30aab1a4360904bd68322b8c39  gcc/testsuite/lib/scanwpaipa.exp
! 84d4d1fa2ac6a05232c49ad827939a46  gcc/testsuite/lib/target-libpath.exp
! ca50260c50a30bdb6f74ff883e63b78b  gcc/testsuite/lib/target-supports-dg.exp
! e5c119cf2ae1575232b7bc2c0ce432c2  gcc/testsuite/lib/target-supports.exp
! 201116acbb88a91edc571f6c7b961f79  gcc/testsuite/lib/target-utils.exp
! 2dcea44ea4fe54415e381cfa752f4c4d  gcc/testsuite/lib/timeout-dg.exp
! d4e470f82175a3f3c70c1de64a1e104d  gcc/testsuite/lib/timeout.exp
! 75cb36b753873bad71151d08d84b445d  gcc/testsuite/lib/torture-options.exp
! c9ca7dd7a9c4d2cb891f6273ff70002a  gcc/testsuite/lib/tsan-dg.exp
! a96085f28c6202614a7acbe056c3fcda  gcc/testsuite/lib/ubsan-dg.exp
! da64020c38eb18a3bb6d6a0eb5d26da2  gcc/testsuite/lib/wrapper.exp
  55160ccf08a9b1444b32deb900dac569  gcc/testsuite/obj-c++.dg/Wimplicit-fallthrough-1.mm
  84caaa988ddff2a3ef9a3c9c9bfe6fbf  gcc/testsuite/obj-c++.dg/at-class-1.mm
! 801e2138da098d1d33481961bdff311c  gcc/testsuite/obj-c++.dg/attributes/attributes.exp
  3ae67bbd6c30272de285ecf52bbe29c4  gcc/testsuite/obj-c++.dg/attributes/categ-attribute-1.mm
  bb7c92f88fdb2a6c371fe4b187f0cebd  gcc/testsuite/obj-c++.dg/attributes/categ-attribute-2.mm
  20e89698b24eeafa990cb80d6777719f  gcc/testsuite/obj-c++.dg/attributes/class-attribute-1.mm
*************** d4bd3446d638246d3ff8c9a942389090  gcc/te
*** 67392,67398 ****
  307b13378572a31adb9ae2ae97c104b6  gcc/testsuite/obj-c++.dg/class-extension-2.mm
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  afe4f2845aa2fd2f2fd13504cb3b9c88  gcc/testsuite/obj-c++.dg/class-extension-4.mm
! dcd072df0eb1cf1f0f522f52fefdefa8  gcc/testsuite/obj-c++.dg/class-protocol-1.mm
  a5daa4cd352a54ca8dddf5d18efb629b  gcc/testsuite/obj-c++.dg/comp-types-1.mm
  1a571d256b68d1e25bcfea44eca5a489  gcc/testsuite/obj-c++.dg/comp-types-10.mm
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--- 77292,77298 ----
  307b13378572a31adb9ae2ae97c104b6  gcc/testsuite/obj-c++.dg/class-extension-2.mm
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! cb1800b1558e82907bdd84811bcbfe34  gcc/testsuite/obj-c++.dg/class-protocol-1.mm
  a5daa4cd352a54ca8dddf5d18efb629b  gcc/testsuite/obj-c++.dg/comp-types-1.mm
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  35118720b3d51cd980c0e3993fd8426e  gcc/testsuite/obj-c++.dg/comp-types-11.mm
*************** f6a135d669303e10360f4a9e17664aa7  gcc/te
*** 67416,67422 ****
  e40d4b7e1e14ee92eea55e290a15be06  gcc/testsuite/obj-c++.dg/demangle-1.mm
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! 4e5bd0087937d5a0eb5fedab92ddadac  gcc/testsuite/obj-c++.dg/dg.exp
  4491984172a7df82c5cf29ec107cd3d4  gcc/testsuite/obj-c++.dg/duplicate-class-1.mm
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--- 77316,77322 ----
  e40d4b7e1e14ee92eea55e290a15be06  gcc/testsuite/obj-c++.dg/demangle-1.mm
  a8b37269f50a182ecbfdb84e3054c9df  gcc/testsuite/obj-c++.dg/demangle-2.mm
  c3631f0b5e6d552bec75c75cf5cbe0dd  gcc/testsuite/obj-c++.dg/demangle-3.mm
! a11ab2f2e92d38ec637d8d586d49792e  gcc/testsuite/obj-c++.dg/dg.exp
  4491984172a7df82c5cf29ec107cd3d4  gcc/testsuite/obj-c++.dg/duplicate-class-1.mm
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*************** ae6cf165075aa5d7db18a98e7893869a  gcc/te
*** 67425,67431 ****
  7d7e6fc99c392bf563fae8bf357cc835  gcc/testsuite/obj-c++.dg/encode-10.mm
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! 026f68983871f85020bebbfbdb151fb2  gcc/testsuite/obj-c++.dg/encode-4.mm
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--- 77325,77331 ----
  7d7e6fc99c392bf563fae8bf357cc835  gcc/testsuite/obj-c++.dg/encode-10.mm
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! 3e70d4ed3f63678d5b05f4488150f57b  gcc/testsuite/obj-c++.dg/encode-4.mm
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*************** e5b9f9a44ce01382be2feb246ccb5ad4  gcc/te
*** 67436,67445 ****
  3f2a93d293bef7fad64048537a3de594  gcc/testsuite/obj-c++.dg/except-1.mm
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! dae6d21c9be6dac3c77251a7f32fe4c5  gcc/testsuite/obj-c++.dg/exceptions-4.mm
! fbd099d034343a53fe77fb564d8ff34a  gcc/testsuite/obj-c++.dg/exceptions-5.mm
! 0110458e18c092060cdecc03e9be4252  gcc/testsuite/obj-c++.dg/exceptions-6.mm
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--- 77336,77345 ----
  3f2a93d293bef7fad64048537a3de594  gcc/testsuite/obj-c++.dg/except-1.mm
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! 1c16cf1e6362532d736c5445027d29fe  gcc/testsuite/obj-c++.dg/exceptions-3.mm
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! 1b780eb4d9705d8bb7f2c05f76733e8e  gcc/testsuite/obj-c++.dg/exceptions-6.mm
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*************** e2f09d3bd8c76cb2cc3877eabe1635a2  gcc/te
*** 67478,67490 ****
  e0ee2e0ef377f377a4b6c0f76eb28be4  gcc/testsuite/obj-c++.dg/local-decl-1.mm
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! ebc9275187a73138cab2e053bc658645  gcc/testsuite/obj-c++.dg/lto/lto.exp
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--- 77378,77390 ----
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! e9b9696a2d6213eb2746c16fdb1522c8  gcc/testsuite/obj-c++.dg/lto/lto.exp
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! 8e8dd1bfb71f726c9156ba544a6ad6f0  gcc/testsuite/obj-c++.dg/method-12.mm
! f8aeea9653ae2c13b8486bea666a5e71  gcc/testsuite/obj-c++.dg/method-13.mm
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*************** b48f5ebd0681213adfef4deb609792df  gcc/te
*** 67499,67513 ****
  281137caa8036d7e4160c7b9c449b6e4  gcc/testsuite/obj-c++.dg/method-3.mm
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! 8f76938d87b469c207104bcf02c7f39b  gcc/testsuite/obj-c++.dg/method-7.mm
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! 33715216da20ae929f7de21cf363aa06  gcc/testsuite/obj-c++.dg/method-9.mm
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! 70af39b0f054bd5760af6520dd5858e2  gcc/testsuite/obj-c++.dg/method-lookup-1.mm
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--- 77399,77413 ----
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! 1e675cad09cc9762c98b9799ce5f28e7  gcc/testsuite/obj-c++.dg/method-9.mm
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! 73bd7d1b1242eab391041c7bce7f8854  gcc/testsuite/obj-c++.dg/method-lookup-1.mm
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*************** bb8ccf448c201adbf05356ac551899fb  gcc/te
*** 67519,67525 ****
  89a8d8bbc4cfd9231f6b6ff845399672  gcc/testsuite/obj-c++.dg/objc-gc-3.mm
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! 0cdf331164de84117ca5db26f82156b2  gcc/testsuite/obj-c++.dg/plugin/plugin.exp
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--- 77419,77425 ----
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! 988af69f25b97f3db48a0c0233e531d7  gcc/testsuite/obj-c++.dg/plugin/plugin.exp
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*************** e1fdf07ab7659119e344a5c83b11164d  gcc/te
*** 67570,67576 ****
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  2df60e62315f4652db998c8160b10cff  gcc/testsuite/obj-c++.dg/property/dotsyntax-2.mm
--- 77470,77476 ----
  0336c77d7a0224e31d766f43a3edec3b  gcc/testsuite/obj-c++.dg/property/dotsyntax-14.mm
  6da1b217b0b457272c38bd11595cee55  gcc/testsuite/obj-c++.dg/property/dotsyntax-15.mm
  9051b360a0bdb368580d59c8bb913e71  gcc/testsuite/obj-c++.dg/property/dotsyntax-16.mm
! 33be850795de0ae4ddeb3ae2e3398e9e  gcc/testsuite/obj-c++.dg/property/dotsyntax-17.mm
  183ce73cd72915e34d49c74a9e70b887  gcc/testsuite/obj-c++.dg/property/dotsyntax-18.mm
  eb58d1400102d41ae00928f61acf1e1e  gcc/testsuite/obj-c++.dg/property/dotsyntax-19.mm
  2df60e62315f4652db998c8160b10cff  gcc/testsuite/obj-c++.dg/property/dotsyntax-2.mm
*************** a8c4b8171533defe44e443926dc705ce  gcc/te
*** 67602,67609 ****
  7882bafba8b7796120cc23af5d441202  gcc/testsuite/obj-c++.dg/property/property-neg-4.mm
  46896a53d202d39ebcdefc0f78554362  gcc/testsuite/obj-c++.dg/property/property-neg-5.mm
  2aabf1a0c895ae7fab2963b19790d1d1  gcc/testsuite/obj-c++.dg/property/property-neg-6.mm
! 439fd1724dc34ad0bc2c61e5c837a82d  gcc/testsuite/obj-c++.dg/property/property-neg-7.mm
! 6db1b2bcbea847d9e050f9f80a2356e8  gcc/testsuite/obj-c++.dg/property/property.exp
  810709bcc80423d41b2bda976147cc80  gcc/testsuite/obj-c++.dg/property/synthesize-1.mm
  aecddf447ec5f56ba7c209cb10a65ad6  gcc/testsuite/obj-c++.dg/property/synthesize-10.mm
  6603b6e3c23698004b66a8469e6c3ff6  gcc/testsuite/obj-c++.dg/property/synthesize-11.mm
--- 77502,77509 ----
  7882bafba8b7796120cc23af5d441202  gcc/testsuite/obj-c++.dg/property/property-neg-4.mm
  46896a53d202d39ebcdefc0f78554362  gcc/testsuite/obj-c++.dg/property/property-neg-5.mm
  2aabf1a0c895ae7fab2963b19790d1d1  gcc/testsuite/obj-c++.dg/property/property-neg-6.mm
! b30232e7701d5769f0f353657f947392  gcc/testsuite/obj-c++.dg/property/property-neg-7.mm
! 851646208c24646e27ebc8b181094b0e  gcc/testsuite/obj-c++.dg/property/property.exp
  810709bcc80423d41b2bda976147cc80  gcc/testsuite/obj-c++.dg/property/synthesize-1.mm
  aecddf447ec5f56ba7c209cb10a65ad6  gcc/testsuite/obj-c++.dg/property/synthesize-10.mm
  6603b6e3c23698004b66a8469e6c3ff6  gcc/testsuite/obj-c++.dg/property/synthesize-11.mm
*************** cf6bf1a9bb03b4708b9ee74ec1da6dce  gcc/te
*** 67620,67626 ****
  4d4bd4a6e94f7ca1dcbd85c5c66e8f14  gcc/testsuite/obj-c++.dg/proto-lossage-1.mm
  d165610dbbfad82f6af91eab9b66d300  gcc/testsuite/obj-c++.dg/proto-lossage-2.mm
  e9acacfeddf9f5b3fcc7bd49ae2063e8  gcc/testsuite/obj-c++.dg/proto-lossage-3.mm
! 1dc4342beadfe6f7bc0c6e08dd15ce24  gcc/testsuite/obj-c++.dg/proto-lossage-4.mm
  40b981421154ac96e17299bce5569949  gcc/testsuite/obj-c++.dg/proto-lossage-5.mm
  fd29bc4e26ebfbde2219d16bcd57ff44  gcc/testsuite/obj-c++.dg/proto-lossage-6.mm
  eae4cc9bd17a2b79453bdeeec666557b  gcc/testsuite/obj-c++.dg/proto-lossage-7.mm
--- 77520,77526 ----
  4d4bd4a6e94f7ca1dcbd85c5c66e8f14  gcc/testsuite/obj-c++.dg/proto-lossage-1.mm
  d165610dbbfad82f6af91eab9b66d300  gcc/testsuite/obj-c++.dg/proto-lossage-2.mm
  e9acacfeddf9f5b3fcc7bd49ae2063e8  gcc/testsuite/obj-c++.dg/proto-lossage-3.mm
! 17d3166fd7cd81bb8f84245efb05861a  gcc/testsuite/obj-c++.dg/proto-lossage-4.mm
  40b981421154ac96e17299bce5569949  gcc/testsuite/obj-c++.dg/proto-lossage-5.mm
  fd29bc4e26ebfbde2219d16bcd57ff44  gcc/testsuite/obj-c++.dg/proto-lossage-6.mm
  eae4cc9bd17a2b79453bdeeec666557b  gcc/testsuite/obj-c++.dg/proto-lossage-7.mm
*************** caaf3448e346d63b2c9d138c397e34ea  gcc/te
*** 67631,67637 ****
  66598bd0d8651533ded6434b3ab3ad9c  gcc/testsuite/obj-c++.dg/protocol-inheritance-2.mm
  5e94c540e8c80f67f410219fbbb8290c  gcc/testsuite/obj-c++.dg/protocol-optional-1.mm
  92402d5d0ed140a870d7d3438040c1fa  gcc/testsuite/obj-c++.dg/protocol-qualifier-1.mm
! 3acfbf9e5283f39582515ae6ee0f8bcc  gcc/testsuite/obj-c++.dg/protocol-qualifier-2.mm
  6e84ef17eb796596422af8c47eab548d  gcc/testsuite/obj-c++.dg/qual-types-1.mm
  1a1c40979049410f20a8586a0ba7d7bd  gcc/testsuite/obj-c++.dg/selector-1.mm
  9279cef4a3631f9e5ab0c052ea83de89  gcc/testsuite/obj-c++.dg/selector-2.mm
--- 77531,77537 ----
  66598bd0d8651533ded6434b3ab3ad9c  gcc/testsuite/obj-c++.dg/protocol-inheritance-2.mm
  5e94c540e8c80f67f410219fbbb8290c  gcc/testsuite/obj-c++.dg/protocol-optional-1.mm
  92402d5d0ed140a870d7d3438040c1fa  gcc/testsuite/obj-c++.dg/protocol-qualifier-1.mm
! 4f2d108c340f0b7c6c0cf3e5a783070e  gcc/testsuite/obj-c++.dg/protocol-qualifier-2.mm
  6e84ef17eb796596422af8c47eab548d  gcc/testsuite/obj-c++.dg/qual-types-1.mm
  1a1c40979049410f20a8586a0ba7d7bd  gcc/testsuite/obj-c++.dg/selector-1.mm
  9279cef4a3631f9e5ab0c052ea83de89  gcc/testsuite/obj-c++.dg/selector-2.mm
*************** c2f326ebd57afc69cfee9d8f6b441323  gcc/te
*** 67651,67659 ****
  a9aabe53382bdf1de0612f8bcf7ef0eb  gcc/testsuite/obj-c++.dg/strings/const-str-6.mm
  4a89061dc402adc311f94d3659a6eaa2  gcc/testsuite/obj-c++.dg/strings/strings-1.mm
  acda44b06216ac119f6bf3a2e4b8cb98  gcc/testsuite/obj-c++.dg/strings/strings-2.mm
! 1c9ddf8ebcb389ac0ffe91037d72fa5a  gcc/testsuite/obj-c++.dg/strings/strings.exp
! 054e0ceae2ad0ae2533b291b1f1d50ab  gcc/testsuite/obj-c++.dg/stubify-1.mm
! 562d9abba7e00b15773964756d58bb73  gcc/testsuite/obj-c++.dg/stubify-2.mm
  0827dd859e38ad893f65d76bf7a5b5e1  gcc/testsuite/obj-c++.dg/super-class-1.mm
  348dead166b98af1745eea549652a4e0  gcc/testsuite/obj-c++.dg/super-class-2.mm
  5f7cf7eb1290cd0ac7cc810aca461fcb  gcc/testsuite/obj-c++.dg/super-dealloc-1.mm
--- 77551,77559 ----
  a9aabe53382bdf1de0612f8bcf7ef0eb  gcc/testsuite/obj-c++.dg/strings/const-str-6.mm
  4a89061dc402adc311f94d3659a6eaa2  gcc/testsuite/obj-c++.dg/strings/strings-1.mm
  acda44b06216ac119f6bf3a2e4b8cb98  gcc/testsuite/obj-c++.dg/strings/strings-2.mm
! 151b12802015d573106c4739e1b7093e  gcc/testsuite/obj-c++.dg/strings/strings.exp
! a3865963b786aea8962be491b6c51744  gcc/testsuite/obj-c++.dg/stubify-1.mm
! 9ee0b34288270b2e09477dc8eaa7812b  gcc/testsuite/obj-c++.dg/stubify-2.mm
  0827dd859e38ad893f65d76bf7a5b5e1  gcc/testsuite/obj-c++.dg/super-class-1.mm
  348dead166b98af1745eea549652a4e0  gcc/testsuite/obj-c++.dg/super-class-2.mm
  5f7cf7eb1290cd0ac7cc810aca461fcb  gcc/testsuite/obj-c++.dg/super-dealloc-1.mm
*************** d2c0463e1e05d168d9d004c74cec0610  gcc/te
*** 67703,67709 ****
  69c47926ef31db0bb79c5cd3cea4fa0b  gcc/testsuite/obj-c++.dg/torture/strings/const-str-8.mm
  a826eb6d88698556688b1008a86574a6  gcc/testsuite/obj-c++.dg/torture/strings/const-str-9.mm
  38bba22e495d1876db60c1ae29146fbe  gcc/testsuite/obj-c++.dg/torture/strings/string1.mm
! 76de2cb855d6581f6dd62955c08b14dd  gcc/testsuite/obj-c++.dg/torture/strings/strings.exp
  6f6356dbcb53d22602416e8919a2b428  gcc/testsuite/obj-c++.dg/torture/tls/diag-1.mm
  f1f7032c657f1d2102a3760375786139  gcc/testsuite/obj-c++.dg/torture/tls/thr-init-1.mm
  913caebef1028795e3b0bac01c9a87c0  gcc/testsuite/obj-c++.dg/torture/tls/thr-init-2.mm
--- 77603,77609 ----
  69c47926ef31db0bb79c5cd3cea4fa0b  gcc/testsuite/obj-c++.dg/torture/strings/const-str-8.mm
  a826eb6d88698556688b1008a86574a6  gcc/testsuite/obj-c++.dg/torture/strings/const-str-9.mm
  38bba22e495d1876db60c1ae29146fbe  gcc/testsuite/obj-c++.dg/torture/strings/string1.mm
! db4bb915dcac48e1093e6acc4a001f62  gcc/testsuite/obj-c++.dg/torture/strings/strings.exp
  6f6356dbcb53d22602416e8919a2b428  gcc/testsuite/obj-c++.dg/torture/tls/diag-1.mm
  f1f7032c657f1d2102a3760375786139  gcc/testsuite/obj-c++.dg/torture/tls/thr-init-1.mm
  913caebef1028795e3b0bac01c9a87c0  gcc/testsuite/obj-c++.dg/torture/tls/thr-init-2.mm
*************** dc8c5ec7b9abe64c54eabc2d60a81066  gcc/te
*** 67769,67775 ****
  a08e081524ab6799e394768da76968d3  gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSObject+GNUstepBase.h
  ce8c053d2554352e55b35ae330cd5126  gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSString+GNUstepBase.h
  1aca10b408347876905ccdeb2ec47665  gcc/testsuite/objc-obj-c++-shared/TestsuiteObject.h
! 0bd36611150ad47bcc56d42e0b131871  gcc/testsuite/objc-obj-c++-shared/TestsuiteObject.m
  ac76ddcf9ed6ab3c92c31559244da096  gcc/testsuite/objc-obj-c++-shared/next-abi.h
  f3501304cb4e501ca831a9c4069efbe3  gcc/testsuite/objc-obj-c++-shared/nsconstantstring-class-impl.h
  885a572c6cebc62b2c85d81b1dfdb205  gcc/testsuite/objc-obj-c++-shared/nsconstantstring-class-impl.m
--- 77669,77675 ----
  a08e081524ab6799e394768da76968d3  gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSObject+GNUstepBase.h
  ce8c053d2554352e55b35ae330cd5126  gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSString+GNUstepBase.h
  1aca10b408347876905ccdeb2ec47665  gcc/testsuite/objc-obj-c++-shared/TestsuiteObject.h
! 73b765183bbc8c25e56849dc263aa7ed  gcc/testsuite/objc-obj-c++-shared/TestsuiteObject.m
  ac76ddcf9ed6ab3c92c31559244da096  gcc/testsuite/objc-obj-c++-shared/next-abi.h
  f3501304cb4e501ca831a9c4069efbe3  gcc/testsuite/objc-obj-c++-shared/nsconstantstring-class-impl.h
  885a572c6cebc62b2c85d81b1dfdb205  gcc/testsuite/objc-obj-c++-shared/nsconstantstring-class-impl.m
*************** cb269bc755b2a67364f3313e8faf3f29  gcc/te
*** 67783,67794 ****
  3b8fd8c2ee22e0099d80e4fa89e2befc  gcc/testsuite/objc.dg/alias.m
  a1be9e5501b4997f5240469850890333  gcc/testsuite/objc.dg/anon-1.m
  84caaa988ddff2a3ef9a3c9c9bfe6fbf  gcc/testsuite/objc.dg/at-class-1.m
! 7271cf3a252900072ba57fa4c276992f  gcc/testsuite/objc.dg/attributes/attributes.exp
  fd95a72920339d2253044c54f9ac9ea5  gcc/testsuite/objc.dg/attributes/categ-attribute-1.m
  56f3aac5dbec91275669f63a33cfbf9b  gcc/testsuite/objc.dg/attributes/categ-attribute-2.m
  e1730ed4ad91eefb842782a31a9e8c61  gcc/testsuite/objc.dg/attributes/class-attribute-1.m
  ec3e605020e98fc32329d07d9d85b7f5  gcc/testsuite/objc.dg/attributes/class-attribute-2.m
  696dadebea285deab87dd73de1129aa3  gcc/testsuite/objc.dg/attributes/class-attribute-3.m
  e8b64cc682d08a7772cf42b9896e04dc  gcc/testsuite/objc.dg/attributes/invalid-attribute-1.m
  41977a70fb1d19b1d31adef5b4f246c8  gcc/testsuite/objc.dg/attributes/method-attribute-1.m
  e7f36ede3524b56b226f26f29dca005b  gcc/testsuite/objc.dg/attributes/method-attribute-2.m
--- 77683,77695 ----
  3b8fd8c2ee22e0099d80e4fa89e2befc  gcc/testsuite/objc.dg/alias.m
  a1be9e5501b4997f5240469850890333  gcc/testsuite/objc.dg/anon-1.m
  84caaa988ddff2a3ef9a3c9c9bfe6fbf  gcc/testsuite/objc.dg/at-class-1.m
! b70f40a9e572f06f9172fd155bb192a2  gcc/testsuite/objc.dg/attributes/attributes.exp
  fd95a72920339d2253044c54f9ac9ea5  gcc/testsuite/objc.dg/attributes/categ-attribute-1.m
  56f3aac5dbec91275669f63a33cfbf9b  gcc/testsuite/objc.dg/attributes/categ-attribute-2.m
  e1730ed4ad91eefb842782a31a9e8c61  gcc/testsuite/objc.dg/attributes/class-attribute-1.m
  ec3e605020e98fc32329d07d9d85b7f5  gcc/testsuite/objc.dg/attributes/class-attribute-2.m
  696dadebea285deab87dd73de1129aa3  gcc/testsuite/objc.dg/attributes/class-attribute-3.m
+ fa8cba7f3fa3d157eaf75ed584efc714  gcc/testsuite/objc.dg/attributes/gnu2x-attr-syntax-1.m
  e8b64cc682d08a7772cf42b9896e04dc  gcc/testsuite/objc.dg/attributes/invalid-attribute-1.m
  41977a70fb1d19b1d31adef5b4f246c8  gcc/testsuite/objc.dg/attributes/method-attribute-1.m
  e7f36ede3524b56b226f26f29dca005b  gcc/testsuite/objc.dg/attributes/method-attribute-2.m
*************** dcedbf84975c836b8e3f62c8e74f2cfc  gcc/te
*** 67816,67822 ****
  2db004c178fd7c1d4adb28427369f772  gcc/testsuite/objc.dg/bitfield-5.m
  6d7dd7461922f5f0f277c2ac8f9c63dd  gcc/testsuite/objc.dg/break-in-ifstmt.m
  a3a9688e7af865bc24450fcfecb1d3b7  gcc/testsuite/objc.dg/call-super-1.m
! 4644abe7df4c179a8f55b46da76b3507  gcc/testsuite/objc.dg/call-super-2.m
  e912bbb4b576b8aba80ff033b0f7cc3b  gcc/testsuite/objc.dg/call-super-3.m
  0632e7aa9c84e23212520846e144f459  gcc/testsuite/objc.dg/category-1.m
  052e038811bc7c123d18f6b343b9558f  gcc/testsuite/objc.dg/class-1.m
--- 77717,77723 ----
  2db004c178fd7c1d4adb28427369f772  gcc/testsuite/objc.dg/bitfield-5.m
  6d7dd7461922f5f0f277c2ac8f9c63dd  gcc/testsuite/objc.dg/break-in-ifstmt.m
  a3a9688e7af865bc24450fcfecb1d3b7  gcc/testsuite/objc.dg/call-super-1.m
! 1e1ea40bcf51c8923659d6084683f1b7  gcc/testsuite/objc.dg/call-super-2.m
  e912bbb4b576b8aba80ff033b0f7cc3b  gcc/testsuite/objc.dg/call-super-3.m
  0632e7aa9c84e23212520846e144f459  gcc/testsuite/objc.dg/category-1.m
  052e038811bc7c123d18f6b343b9558f  gcc/testsuite/objc.dg/class-1.m
*************** d4bd3446d638246d3ff8c9a942389090  gcc/te
*** 67825,67831 ****
  307b13378572a31adb9ae2ae97c104b6  gcc/testsuite/objc.dg/class-extension-2.m
  959a8bf5ce99cb1c213b1f6d5f460925  gcc/testsuite/objc.dg/class-extension-3.m
  35e9789439805ea6be87ab1d359a2bcc  gcc/testsuite/objc.dg/class-extension-4.m
! f8ec7cae96c681a19729fb8afc74fba1  gcc/testsuite/objc.dg/class-protocol-1.m
  e56b01a01c0b2a840b4c7861c095d3ca  gcc/testsuite/objc.dg/comp-types-1.m
  35118720b3d51cd980c0e3993fd8426e  gcc/testsuite/objc.dg/comp-types-10.m
  4a97915d5fdbf1a427d5e5e384890924  gcc/testsuite/objc.dg/comp-types-11.m
--- 77726,77732 ----
  307b13378572a31adb9ae2ae97c104b6  gcc/testsuite/objc.dg/class-extension-2.m
  959a8bf5ce99cb1c213b1f6d5f460925  gcc/testsuite/objc.dg/class-extension-3.m
  35e9789439805ea6be87ab1d359a2bcc  gcc/testsuite/objc.dg/class-extension-4.m
! d809d1169adf762962aaaa55e874759d  gcc/testsuite/objc.dg/class-protocol-1.m
  e56b01a01c0b2a840b4c7861c095d3ca  gcc/testsuite/objc.dg/comp-types-1.m
  35118720b3d51cd980c0e3993fd8426e  gcc/testsuite/objc.dg/comp-types-10.m
  4a97915d5fdbf1a427d5e5e384890924  gcc/testsuite/objc.dg/comp-types-11.m
*************** fcbd6d34fab967afc68044cbc6bebd90  gcc/te
*** 67841,67856 ****
  07adde78c76317f383222a3b1cb5b4bc  gcc/testsuite/objc.dg/conditional-1.m
  7a12918cedc5921ac8d2d95f9b874cd8  gcc/testsuite/objc.dg/defs.m
  3653e7170b213177620560b1489ee3c4  gcc/testsuite/objc.dg/demangle-1.m
! 57aa6dd0c3563c95541cf9b6a750d73f  gcc/testsuite/objc.dg/desig-init-1.m
  35496e95171f548a40cf930fea45d49f  gcc/testsuite/objc.dg/desig-init-2.m
! f8b8686e4dfb55d78ba2438ae910c5cc  gcc/testsuite/objc.dg/dg.exp
  d3de59bd591c81e839bddbd2e1ef363e  gcc/testsuite/objc.dg/duplicate-class-1.m
  e93baeeda9bc4b65e5eea748a076d816  gcc/testsuite/objc.dg/dwarf-1.m
  0a836d2fda427c66107feaabe420bcf3  gcc/testsuite/objc.dg/dwarf-2.m
  53443690ca665ae75ecc6ea991307bfc  gcc/testsuite/objc.dg/encode-1.m
  d41bdbf8fd720cd2fb1c999d1e580ba5  gcc/testsuite/objc.dg/encode-10.m
  7c5ab8c1e32dc1b6afe8dba2152db2cd  gcc/testsuite/objc.dg/encode-11.m
! 43af78eb59f24569f33cf62466c6eab4  gcc/testsuite/objc.dg/encode-2.m
  421a0e85cd003b4758c841f69ed150be  gcc/testsuite/objc.dg/encode-3.m
  9786985b6d5812d1e731ec11f8b36708  gcc/testsuite/objc.dg/encode-4.m
  e8f3db69a8847b70c8bc969edd78dbb2  gcc/testsuite/objc.dg/encode-5.m
--- 77742,77757 ----
  07adde78c76317f383222a3b1cb5b4bc  gcc/testsuite/objc.dg/conditional-1.m
  7a12918cedc5921ac8d2d95f9b874cd8  gcc/testsuite/objc.dg/defs.m
  3653e7170b213177620560b1489ee3c4  gcc/testsuite/objc.dg/demangle-1.m
! c0ab0e620febd282b5e9d035d15b3f89  gcc/testsuite/objc.dg/desig-init-1.m
  35496e95171f548a40cf930fea45d49f  gcc/testsuite/objc.dg/desig-init-2.m
! b4a3afdce24ba20e2a9425aead6b11fc  gcc/testsuite/objc.dg/dg.exp
  d3de59bd591c81e839bddbd2e1ef363e  gcc/testsuite/objc.dg/duplicate-class-1.m
  e93baeeda9bc4b65e5eea748a076d816  gcc/testsuite/objc.dg/dwarf-1.m
  0a836d2fda427c66107feaabe420bcf3  gcc/testsuite/objc.dg/dwarf-2.m
  53443690ca665ae75ecc6ea991307bfc  gcc/testsuite/objc.dg/encode-1.m
  d41bdbf8fd720cd2fb1c999d1e580ba5  gcc/testsuite/objc.dg/encode-10.m
  7c5ab8c1e32dc1b6afe8dba2152db2cd  gcc/testsuite/objc.dg/encode-11.m
! f43f0899e9d32c5c144882659699542c  gcc/testsuite/objc.dg/encode-2.m
  421a0e85cd003b4758c841f69ed150be  gcc/testsuite/objc.dg/encode-3.m
  9786985b6d5812d1e731ec11f8b36708  gcc/testsuite/objc.dg/encode-4.m
  e8f3db69a8847b70c8bc969edd78dbb2  gcc/testsuite/objc.dg/encode-5.m
*************** ec13da627de5c7e1d6ffe3b185210717  gcc/te
*** 67866,67875 ****
  edbfca17600aa79dc7ea8e7975c68e88  gcc/testsuite/objc.dg/error-1.m
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  7ff2c21ce93e12bfe6ccee71ca05d457  gcc/testsuite/objc.dg/exceptions-2.m
! 08bd4df4575cb6ed908adc458a483c68  gcc/testsuite/objc.dg/exceptions-3.m
! 440724d9ed9b31cc0ce84da641f06bb9  gcc/testsuite/objc.dg/exceptions-4.m
! 78ede72772b0cd404e2a658d57355e5a  gcc/testsuite/objc.dg/exceptions-5.m
! 76449a3fff9481589a9dda65f4bfb416  gcc/testsuite/objc.dg/exceptions-6.m
  a6aad066984a23da19fb3353abeb2c33  gcc/testsuite/objc.dg/exceptions-7.m
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--- 77767,77776 ----
  edbfca17600aa79dc7ea8e7975c68e88  gcc/testsuite/objc.dg/error-1.m
  873359db94a30e2e7b83394a75ec386f  gcc/testsuite/objc.dg/exceptions-1.m
  7ff2c21ce93e12bfe6ccee71ca05d457  gcc/testsuite/objc.dg/exceptions-2.m
! 48aab7a90479d44e094f1f7d6cfeec43  gcc/testsuite/objc.dg/exceptions-3.m
! 6d212dc5c626ff2f6dd3bc6600bec913  gcc/testsuite/objc.dg/exceptions-4.m
! f59a1204bceb2598bbd908ca446323c6  gcc/testsuite/objc.dg/exceptions-5.m
! c16130be56a34f67373783aafabf4826  gcc/testsuite/objc.dg/exceptions-6.m
  a6aad066984a23da19fb3353abeb2c33  gcc/testsuite/objc.dg/exceptions-7.m
  e7fb320f22d720d1153b22a297d68332  gcc/testsuite/objc.dg/extra-semi.m
  3441c66cc61f0166382e58663017495e  gcc/testsuite/objc.dg/fix-and-continue-1.m
*************** a253e38875bfdb13fd36a19e5f71a790  gcc/te
*** 67907,67913 ****
  db6ac9c4cab360de1e62ae24781a65aa  gcc/testsuite/objc.dg/gnu-encoding/generate-random.c
  a3ac98dcec269f59ea0f7ebc9b8c3297  gcc/testsuite/objc.dg/gnu-encoding/generate-random.h
  73fd2a43073b565b250e87dcce3fb9b1  gcc/testsuite/objc.dg/gnu-encoding/generate-random_r.c
! ae63c5a00c087cd6a9fe68eec4fd825d  gcc/testsuite/objc.dg/gnu-encoding/gnu-encoding.exp
  c41a6661b12b159d108661dd40bac309  gcc/testsuite/objc.dg/gnu-encoding/struct-layout-1.h
  b602f2a3cc56cd39c738d2241938856f  gcc/testsuite/objc.dg/gnu-encoding/struct-layout-1_test.h
  550e608729695dd01ea09faf26f72fd5  gcc/testsuite/objc.dg/gnu-encoding/struct-layout-encoding-1_generate.c
--- 77808,77814 ----
  db6ac9c4cab360de1e62ae24781a65aa  gcc/testsuite/objc.dg/gnu-encoding/generate-random.c
  a3ac98dcec269f59ea0f7ebc9b8c3297  gcc/testsuite/objc.dg/gnu-encoding/generate-random.h
  73fd2a43073b565b250e87dcce3fb9b1  gcc/testsuite/objc.dg/gnu-encoding/generate-random_r.c
! fd2f831ad9ed44bd582e1fec23ecaaeb  gcc/testsuite/objc.dg/gnu-encoding/gnu-encoding.exp
  c41a6661b12b159d108661dd40bac309  gcc/testsuite/objc.dg/gnu-encoding/struct-layout-1.h
  b602f2a3cc56cd39c738d2241938856f  gcc/testsuite/objc.dg/gnu-encoding/struct-layout-1_test.h
  550e608729695dd01ea09faf26f72fd5  gcc/testsuite/objc.dg/gnu-encoding/struct-layout-encoding-1_generate.c
*************** f95bd6372c4bf77d12d57a628fc5bb39  gcc/te
*** 67944,67950 ****
  ef027ba6682833a14c376b2fcb64444e  gcc/testsuite/objc.dg/local-decl-1.m
  1d93e9b716a93515c5ab71dc3394158e  gcc/testsuite/objc.dg/local-decl-2.m
  5f8d8d488322be4a5c33e704a91212ff  gcc/testsuite/objc.dg/lookup-1.m
! e60780e570fdcae3a90d8235106705b9  gcc/testsuite/objc.dg/lto/lto.exp
  6dcc154e9bcfbcb29a13b08669614f81  gcc/testsuite/objc.dg/lto/trivial-1_0.m
  b1a80cc8c0c5d5294699c5aeb20817a4  gcc/testsuite/objc.dg/member-1.m
  654818ea7c74a49a5e08ba69f43984f7  gcc/testsuite/objc.dg/method-1.m
--- 77845,77851 ----
  ef027ba6682833a14c376b2fcb64444e  gcc/testsuite/objc.dg/local-decl-1.m
  1d93e9b716a93515c5ab71dc3394158e  gcc/testsuite/objc.dg/local-decl-2.m
  5f8d8d488322be4a5c33e704a91212ff  gcc/testsuite/objc.dg/lookup-1.m
! 561ab48d80362d8c3f7bd4d8df15f55a  gcc/testsuite/objc.dg/lto/lto.exp
  6dcc154e9bcfbcb29a13b08669614f81  gcc/testsuite/objc.dg/lto/trivial-1_0.m
  b1a80cc8c0c5d5294699c5aeb20817a4  gcc/testsuite/objc.dg/member-1.m
  654818ea7c74a49a5e08ba69f43984f7  gcc/testsuite/objc.dg/method-1.m
*************** c0e3440d87797991072d80bcf576ef1f  gcc/te
*** 67957,67978 ****
  273f998d8039a4cd6a7d4287efa0dbf9  gcc/testsuite/objc.dg/method-16.m
  b34e1563f87bb84e4f043e9a7b2a980b  gcc/testsuite/objc.dg/method-17.m
  f39d99ba8f6fd285831ea92f53205a4f  gcc/testsuite/objc.dg/method-18.m
! 0f0f53dcdc25791a2ab0d73d036a330e  gcc/testsuite/objc.dg/method-19.m
! a0a34ff20eea5cde5cc34cb5d51d4e4f  gcc/testsuite/objc.dg/method-2.m
  8eb815dd7b88ebc64f26628fdd625057  gcc/testsuite/objc.dg/method-20.m
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  9153d82237cc99af905bfcb58426980b  gcc/testsuite/objc.dg/method-3.m
  1857e378233cbdb0ef09315d0ee04fc9  gcc/testsuite/objc.dg/method-4.m
! 8f76938d87b469c207104bcf02c7f39b  gcc/testsuite/objc.dg/method-5.m
! fca76256e166f37586eb06f56a9f0622  gcc/testsuite/objc.dg/method-6.m
! 1d4f49a7f4d9f57ba0929cecbd7a7f28  gcc/testsuite/objc.dg/method-7.m
  172164daa5b2292983d23e0e5d5a94eb  gcc/testsuite/objc.dg/method-8.m
  b534c3ae3ab49fe3be9e7560d558fdf3  gcc/testsuite/objc.dg/method-9.m
  2a7616b9c1cd0cadb5e83a9bfa917a8e  gcc/testsuite/objc.dg/method-conflict-1.m
  a14143ecfb8bf86238a675e92e7ad689  gcc/testsuite/objc.dg/method-conflict-2.m
  377b3707579f2f48b9bc007c87897edc  gcc/testsuite/objc.dg/method-conflict-3.m
  1d638a4bbcbb6b018d892ae2f099e493  gcc/testsuite/objc.dg/method-conflict-4.m
! 70af39b0f054bd5760af6520dd5858e2  gcc/testsuite/objc.dg/method-lookup-1.m
  69bacf80761635c545d87c91cc287531  gcc/testsuite/objc.dg/missing-proto-1.m
  56651a021e1eb7eb1a267d430fca0f45  gcc/testsuite/objc.dg/missing-proto-2.m
  8c8f4be40ef527420131ee0bfad12e64  gcc/testsuite/objc.dg/missing-proto-3.m
--- 77858,77879 ----
  273f998d8039a4cd6a7d4287efa0dbf9  gcc/testsuite/objc.dg/method-16.m
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! 605afd88c600753ae9850dfb64083bdf  gcc/testsuite/objc.dg/method-19.m
! 125bbf17805d3246a3272ad5bce2f826  gcc/testsuite/objc.dg/method-2.m
  8eb815dd7b88ebc64f26628fdd625057  gcc/testsuite/objc.dg/method-20.m
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  9153d82237cc99af905bfcb58426980b  gcc/testsuite/objc.dg/method-3.m
  1857e378233cbdb0ef09315d0ee04fc9  gcc/testsuite/objc.dg/method-4.m
! 9162250b63976fb7a2647d3a69313bc6  gcc/testsuite/objc.dg/method-5.m
! a58120769e75317ed01768bf23e83da1  gcc/testsuite/objc.dg/method-6.m
! 3c07de3ab9a7ff372a84f5b5bed3a7a2  gcc/testsuite/objc.dg/method-7.m
  172164daa5b2292983d23e0e5d5a94eb  gcc/testsuite/objc.dg/method-8.m
  b534c3ae3ab49fe3be9e7560d558fdf3  gcc/testsuite/objc.dg/method-9.m
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  a14143ecfb8bf86238a675e92e7ad689  gcc/testsuite/objc.dg/method-conflict-2.m
  377b3707579f2f48b9bc007c87897edc  gcc/testsuite/objc.dg/method-conflict-3.m
  1d638a4bbcbb6b018d892ae2f099e493  gcc/testsuite/objc.dg/method-conflict-4.m
! 73bd7d1b1242eab391041c7bce7f8854  gcc/testsuite/objc.dg/method-lookup-1.m
  69bacf80761635c545d87c91cc287531  gcc/testsuite/objc.dg/missing-proto-1.m
  56651a021e1eb7eb1a267d430fca0f45  gcc/testsuite/objc.dg/missing-proto-2.m
  8c8f4be40ef527420131ee0bfad12e64  gcc/testsuite/objc.dg/missing-proto-3.m
*************** e2b871afc37f1772b337d989244b97c6  gcc/te
*** 67997,68005 ****
  e813e9eab1b738541a5a77be6a3e194f  gcc/testsuite/objc.dg/param-1.m
  8c15bc469e56fdb17a7b24540bf21491  gcc/testsuite/objc.dg/pch/interface-1.hs
  71da4e106e38b3671b4f4ae8a237e55f  gcc/testsuite/objc.dg/pch/interface-1.m
! 9f61377ea5a2cc43e50efc58051823e1  gcc/testsuite/objc.dg/pch/pch.exp
  5fef9f0c990ff2c42750c2300d343f56  gcc/testsuite/objc.dg/plugin/diagnostic-test-expressions-1.m
! de8a1dae83a6617c0ddf998ced7b1b84  gcc/testsuite/objc.dg/plugin/plugin.exp
  4bde0ee2020d54cbaccb19eddeb1ff93  gcc/testsuite/objc.dg/pr18255.m
  92850ceb26e638315f91054c730aacc8  gcc/testsuite/objc.dg/pr23214.m
  e220e57343bac32bbc315171b87b1bba  gcc/testsuite/objc.dg/pr23709.m
--- 77898,77906 ----
  e813e9eab1b738541a5a77be6a3e194f  gcc/testsuite/objc.dg/param-1.m
  8c15bc469e56fdb17a7b24540bf21491  gcc/testsuite/objc.dg/pch/interface-1.hs
  71da4e106e38b3671b4f4ae8a237e55f  gcc/testsuite/objc.dg/pch/interface-1.m
! f00a11eb512313ae0ba7accf6031ce44  gcc/testsuite/objc.dg/pch/pch.exp
  5fef9f0c990ff2c42750c2300d343f56  gcc/testsuite/objc.dg/plugin/diagnostic-test-expressions-1.m
! 2418c529051ba9468f5ba0fd3db5df0c  gcc/testsuite/objc.dg/plugin/plugin.exp
  4bde0ee2020d54cbaccb19eddeb1ff93  gcc/testsuite/objc.dg/pr18255.m
  92850ceb26e638315f91054c730aacc8  gcc/testsuite/objc.dg/pr23214.m
  e220e57343bac32bbc315171b87b1bba  gcc/testsuite/objc.dg/pr23709.m
*************** f70cc9f14e52a011b880ee463b06a327  gcc/te
*** 68012,68017 ****
--- 77913,77919 ----
  9172f0f2272d475e7386f90076899e02  gcc/testsuite/objc.dg/pr48177.m
  92fe98f02af74123b2687d5d18ddc852  gcc/testsuite/objc.dg/pr48187.m
  1670c1fe0db7ee6f6e39e442f289f23e  gcc/testsuite/objc.dg/pr69844.m
+ 13f3af0a59ffae0f60ff7974ef915e72  gcc/testsuite/objc.dg/pr94637.m
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  fe3ca05ce80d57fadc06b2f9fe6b480c  gcc/testsuite/objc.dg/private-2.m
*************** e1fdf07ab7659119e344a5c83b11164d  gcc/te
*** 68054,68060 ****
  95f6d7161fb55291b3d0179ea0850419  gcc/testsuite/objc.dg/property/dotsyntax-14.m
  4f782d63c7a41e4fdb5cfa974b474eaa  gcc/testsuite/objc.dg/property/dotsyntax-15.m
  9051b360a0bdb368580d59c8bb913e71  gcc/testsuite/objc.dg/property/dotsyntax-16.m
! b6777f933f574be10a8e02387fb0b31e  gcc/testsuite/objc.dg/property/dotsyntax-17.m
  183ce73cd72915e34d49c74a9e70b887  gcc/testsuite/objc.dg/property/dotsyntax-18.m
  eb58d1400102d41ae00928f61acf1e1e  gcc/testsuite/objc.dg/property/dotsyntax-19.m
  2df60e62315f4652db998c8160b10cff  gcc/testsuite/objc.dg/property/dotsyntax-2.m
--- 77956,77962 ----
  95f6d7161fb55291b3d0179ea0850419  gcc/testsuite/objc.dg/property/dotsyntax-14.m
  4f782d63c7a41e4fdb5cfa974b474eaa  gcc/testsuite/objc.dg/property/dotsyntax-15.m
  9051b360a0bdb368580d59c8bb913e71  gcc/testsuite/objc.dg/property/dotsyntax-16.m
! 33be850795de0ae4ddeb3ae2e3398e9e  gcc/testsuite/objc.dg/property/dotsyntax-17.m
  183ce73cd72915e34d49c74a9e70b887  gcc/testsuite/objc.dg/property/dotsyntax-18.m
  eb58d1400102d41ae00928f61acf1e1e  gcc/testsuite/objc.dg/property/dotsyntax-19.m
  2df60e62315f4652db998c8160b10cff  gcc/testsuite/objc.dg/property/dotsyntax-2.m
*************** baf9036868eba04aebdd06e708a665ec  gcc/te
*** 68086,68093 ****
  7882bafba8b7796120cc23af5d441202  gcc/testsuite/objc.dg/property/property-neg-4.m
  46896a53d202d39ebcdefc0f78554362  gcc/testsuite/objc.dg/property/property-neg-5.m
  ea4fb9865bd07122883de2bcf725a13f  gcc/testsuite/objc.dg/property/property-neg-6.m
! 439fd1724dc34ad0bc2c61e5c837a82d  gcc/testsuite/objc.dg/property/property-neg-7.m
! fc89517d5cb8a08b02f2fdaca3cc6978  gcc/testsuite/objc.dg/property/property.exp
  366ec4311c5e9d93dcfbbd560da544a7  gcc/testsuite/objc.dg/property/synthesize-1.m
  aecddf447ec5f56ba7c209cb10a65ad6  gcc/testsuite/objc.dg/property/synthesize-10.m
  23e9117b246f1a4889c17099f6ccf5bf  gcc/testsuite/objc.dg/property/synthesize-11.m
--- 77988,77995 ----
  7882bafba8b7796120cc23af5d441202  gcc/testsuite/objc.dg/property/property-neg-4.m
  46896a53d202d39ebcdefc0f78554362  gcc/testsuite/objc.dg/property/property-neg-5.m
  ea4fb9865bd07122883de2bcf725a13f  gcc/testsuite/objc.dg/property/property-neg-6.m
! b30232e7701d5769f0f353657f947392  gcc/testsuite/objc.dg/property/property-neg-7.m
! 2ee9b6817f46d82a68e8947d0180f3fa  gcc/testsuite/objc.dg/property/property.exp
  366ec4311c5e9d93dcfbbd560da544a7  gcc/testsuite/objc.dg/property/synthesize-1.m
  aecddf447ec5f56ba7c209cb10a65ad6  gcc/testsuite/objc.dg/property/synthesize-10.m
  23e9117b246f1a4889c17099f6ccf5bf  gcc/testsuite/objc.dg/property/synthesize-11.m
*************** adb1cea31483d6cb5fbcada4a76e0da4  gcc/te
*** 68099,68111 ****
  4f3eeaf37c954e5518b294f41379ebd7  gcc/testsuite/objc.dg/property/synthesize-7.m
  9ba2b66f63ce98cbb427462ea2bd3467  gcc/testsuite/objc.dg/property/synthesize-8.m
  63b97d880267a113412eb59c5be9b596  gcc/testsuite/objc.dg/property/synthesize-9.m
! 8084a648bba6bfff480ed4b2c3bd1c56  gcc/testsuite/objc.dg/proto-hier-1.m
  f6d6b7454f0d00e836de017738aaf087  gcc/testsuite/objc.dg/proto-hier-2.m
  cf6bf1a9bb03b4708b9ee74ec1da6dce  gcc/testsuite/objc.dg/proto-init-mimatch-1.m
  4d4bd4a6e94f7ca1dcbd85c5c66e8f14  gcc/testsuite/objc.dg/proto-lossage-1.m
  d165610dbbfad82f6af91eab9b66d300  gcc/testsuite/objc.dg/proto-lossage-2.m
  7816032946ba6eac43f0d60480655dc6  gcc/testsuite/objc.dg/proto-lossage-3.m
! 2891bbb5e156296e3ee3040d4a7c833e  gcc/testsuite/objc.dg/proto-lossage-4.m
  40b981421154ac96e17299bce5569949  gcc/testsuite/objc.dg/proto-lossage-5.m
  d26b84bd4fece35e5ae1ec9a7c6d4f15  gcc/testsuite/objc.dg/proto-lossage-6.m
  43743498fb7683ea796ffd482ace42c9  gcc/testsuite/objc.dg/proto-lossage-7.m
--- 78001,78013 ----
  4f3eeaf37c954e5518b294f41379ebd7  gcc/testsuite/objc.dg/property/synthesize-7.m
  9ba2b66f63ce98cbb427462ea2bd3467  gcc/testsuite/objc.dg/property/synthesize-8.m
  63b97d880267a113412eb59c5be9b596  gcc/testsuite/objc.dg/property/synthesize-9.m
! 0a347709aca0aac3665a252651b4b3b9  gcc/testsuite/objc.dg/proto-hier-1.m
  f6d6b7454f0d00e836de017738aaf087  gcc/testsuite/objc.dg/proto-hier-2.m
  cf6bf1a9bb03b4708b9ee74ec1da6dce  gcc/testsuite/objc.dg/proto-init-mimatch-1.m
  4d4bd4a6e94f7ca1dcbd85c5c66e8f14  gcc/testsuite/objc.dg/proto-lossage-1.m
  d165610dbbfad82f6af91eab9b66d300  gcc/testsuite/objc.dg/proto-lossage-2.m
  7816032946ba6eac43f0d60480655dc6  gcc/testsuite/objc.dg/proto-lossage-3.m
! d323135be6f4b0bce1d76b585d1be3be  gcc/testsuite/objc.dg/proto-lossage-4.m
  40b981421154ac96e17299bce5569949  gcc/testsuite/objc.dg/proto-lossage-5.m
  d26b84bd4fece35e5ae1ec9a7c6d4f15  gcc/testsuite/objc.dg/proto-lossage-6.m
  43743498fb7683ea796ffd482ace42c9  gcc/testsuite/objc.dg/proto-lossage-7.m
*************** caaf3448e346d63b2c9d138c397e34ea  gcc/te
*** 68116,68122 ****
  66598bd0d8651533ded6434b3ab3ad9c  gcc/testsuite/objc.dg/protocol-inheritance-2.m
  5e94c540e8c80f67f410219fbbb8290c  gcc/testsuite/objc.dg/protocol-optional-1.m
  92402d5d0ed140a870d7d3438040c1fa  gcc/testsuite/objc.dg/protocol-qualifier-1.m
! 3acfbf9e5283f39582515ae6ee0f8bcc  gcc/testsuite/objc.dg/protocol-qualifier-2.m
  f6deacf4efe20f4172bc33cf8dcdd81c  gcc/testsuite/objc.dg/selector-1.m
  1c5d1bf12677e29e9f2497fa11fdee29  gcc/testsuite/objc.dg/selector-2.m
  690b1ebfc16dd00a0a7b4692f46f6bee  gcc/testsuite/objc.dg/selector-3.m
--- 78018,78024 ----
  66598bd0d8651533ded6434b3ab3ad9c  gcc/testsuite/objc.dg/protocol-inheritance-2.m
  5e94c540e8c80f67f410219fbbb8290c  gcc/testsuite/objc.dg/protocol-optional-1.m
  92402d5d0ed140a870d7d3438040c1fa  gcc/testsuite/objc.dg/protocol-qualifier-1.m
! 9014fe911e1e3a77b254b43f8a5f640e  gcc/testsuite/objc.dg/protocol-qualifier-2.m
  f6deacf4efe20f4172bc33cf8dcdd81c  gcc/testsuite/objc.dg/selector-1.m
  1c5d1bf12677e29e9f2497fa11fdee29  gcc/testsuite/objc.dg/selector-2.m
  690b1ebfc16dd00a0a7b4692f46f6bee  gcc/testsuite/objc.dg/selector-3.m
*************** c531fbd47d6cd6f34fd4a1161fe41d36  gcc/te
*** 68135,68141 ****
  b5566392b676a4381c9fba425af46d22  gcc/testsuite/objc.dg/special/load-category-3.h
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  84e0d0ac9e785e6c7a2c3961f9fef351  gcc/testsuite/objc.dg/special/load-category-3a.m
! ad91bd56e21287c5c4147120b938baf3  gcc/testsuite/objc.dg/special/special.exp
  8f22f33dddabee33212506ee7b2ef346  gcc/testsuite/objc.dg/special/unclaimed-category-1.h
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--- 78037,78043 ----
  b5566392b676a4381c9fba425af46d22  gcc/testsuite/objc.dg/special/load-category-3.h
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! 113a26a4b3b6058c8af48b033629f8d1  gcc/testsuite/objc.dg/special/special.exp
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*************** d14e2bc0e149efd8ad9b13c9f1e48081  gcc/te
*** 68153,68161 ****
  1b52a4aa3cd0d5062e03b48964ddcb0b  gcc/testsuite/objc.dg/strings/const-str-6.m
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! b7f12e604b0138477a2121a9a6b05323  gcc/testsuite/objc.dg/strings/strings.exp
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! 14f47f9629e885bc51130d3b4d8a5ffb  gcc/testsuite/objc.dg/stubify-2.m
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--- 78055,78063 ----
  1b52a4aa3cd0d5062e03b48964ddcb0b  gcc/testsuite/objc.dg/strings/const-str-6.m
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! 3a2a2de42ff189bb357531444ec005c8  gcc/testsuite/objc.dg/strings/strings.exp
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! e5c3a9745782947ff92168301c2b303a  gcc/testsuite/objc.dg/stubify-2.m
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*************** a8a9f4264b042cb130bb43f35157c620  gcc/te
*** 68191,68197 ****
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! 1e6efc5b1974b78fd815aa2bb6ffd706  gcc/testsuite/objc.dg/torture/strings/strings.exp
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--- 78093,78099 ----
  f559fec747b34a07335a33efaef1d635  gcc/testsuite/objc.dg/torture/strings/string2.m
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! 0fd3ee2bbf6b81a8a3d296d6b44222f6  gcc/testsuite/objc.dg/torture/strings/strings.exp
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*************** f0a85fb06bc40a59b3b67e37b68bf8a9  gcc/te
*** 68225,68231 ****
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! e48033a35b02dbe178a844fe8c13fefe  gcc/testsuite/objc/compile/compile.exp
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--- 78127,78133 ----
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! d532b1cc0ecda3aa2d902f5608254174  gcc/testsuite/objc/compile/compile.exp
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*************** bee60356c32af863f8417a00f203538f  gcc/te
*** 68283,68289 ****
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--- 78185,78191 ----
  0dfc21e690c7625bdcd6ecd58b521009  gcc/testsuite/objc/execute/enumeration-1.m
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! 40e9e57b6c11f653e11a8a77ede4c328  gcc/testsuite/objc/execute/exceptions/exceptions.exp
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*************** e9b8822effadb281ff59150cc70ef17f  gcc/te
*** 68293,68299 ****
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! 0f6a8e2f743932d2592df227b26029b3  gcc/testsuite/objc/execute/execute.exp
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  1a92e165604e454883c8a1a3e560c7a2  gcc/testsuite/objc/execute/formal_protocol-1.m
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--- 78195,78201 ----
  a70e5bfb678efb233f3a7e3aedf20e95  gcc/testsuite/objc/execute/exceptions/pr31281.m
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! c97513f134f59829e9ead64f68ab9dbc  gcc/testsuite/objc/execute/execute.exp
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*************** c0b991692c06f34bf7f8673802e7b155  gcc/te
*** 68355,68559 ****
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! a3a31fa280d8b59896ed7b6dba9ce827  gcc/timevar.def
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! f8048ba5e1363a697fba1638825efdda  gcc/toplev.c
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! c1690c6f804c612c1e6ad8c26b8489d8  gcc/tree-call-cdce.c
! 2b5116d56636e80b59168001d062358e  gcc/tree-cfg.c
! cf3fa5a439726d0e73d0651b14a2dd1b  gcc/tree-cfg.h
! 66487f31b19815125207732d79b55d31  gcc/tree-cfgcleanup.c
! ee6db89124dff9b0bf2e76468c03eb0e  gcc/tree-cfgcleanup.h
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! 7b55d46f115ac2eed2a43554095765e3  gcc/tree-chrec.h
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! ef7aefae53ef39fa14071dd236e0a6c1  gcc/tree-data-ref.h
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! 78547b119f85981a1c0db03f5f9001db  gcc/tree-dump.h
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! b79825083a3ebc55626e8b11536c4ba6  gcc/tree-eh.h
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! b5f8cac4e95ce5662b8305facd72053e  gcc/tree-hasher.h
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! cf23997bede05c81bd2c6b1d88ac4227  gcc/tree-inline.c
! 6715df3b6c3d1a52e89ee84312bb82a4  gcc/tree-inline.h
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! d8db8f29a72806d9ef9a7ce2abf423f6  gcc/tree-into-ssa.h
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! 6eaf3d762fa714f8bdd387112f9040d3  gcc/tree-iterator.h
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! 56d40eabfbf48f28cd7a046c887c64db  gcc/tree-outof-ssa.c
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! 0d7426b0f0e17f2520cdaa847330af7c  gcc/tree-parloops.h
! 8645b61ff48847f16b00836efe389e61  gcc/tree-pass.h
! 9c572480fbeacf491cfa0fc39d259ad3  gcc/tree-phinodes.c
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! a972ba059faad340bcbe01fd547285d7  gcc/tree-scalar-evolution.c
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! c44c82bb6bd01c015ca39ae8b7017287  gcc/tree-ssa-dce.c
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! d4d7445af3374048e91bdee947d748a5  gcc/tree-ssa-dom.h
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! c621d600df58fcb07ad10ec2c2f606c8  gcc/tree-ssa-live.h
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! e8ef6a22fb0610281c8ce491aa42e235  gcc/tree-ssa-loop-im.c
! a3d4f1965d8cb78c3506adbb8cf28893  gcc/tree-ssa-loop-ivcanon.c
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! c6e348e48bc6da0fd54bd84f1400c2ac  gcc/tree-ssa-operands.c
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! 7369613e0e62fe87da239fb56350d918  gcc/tree-ssa-sccvn.c
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! 9068e9426f6249ebadbd13e4ecb249d5  gcc/tree-ssa-uninit.c
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*************** c363a68408b30fe1ae97782cfb8a4ac1  libgcc
*** 69548,69586 ****
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--- 79484,79529 ----
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*************** d4cd30e890b5d772946c79359704fc0b  libgcc
*** 69595,69636 ****
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--- 79538,79579 ----
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*************** e5387e909a3b29458cfdda0150e1f8f6  libgcc
*** 69662,69686 ****
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*************** bbd02bc575b39b813abb3651cde980d7  libgcc
*** 69692,70382 ****
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*************** ad6ae6684d4dec9ddd78efad67d1af4b  libgcc
*** 70385,70463 ****
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  47744edc253a5317caf4e23e6be95c25  libgcc/config/stormy16/ashrsi3.c
  034b60d9d20beab2853732adb70c4de5  libgcc/config/stormy16/clrsbhi2.c
--- 80353,80417 ----
  d7a240410399b38f142973a475855f0b  libgcc/config/rs6000/t-ppc64-fp
  bd7ceb31787a37d9cb144c41d41acfb3  libgcc/config/rs6000/t-ppccomm
  89dc5367808582c503f03a34193e467b  libgcc/config/rs6000/t-savresfgpr
! 0f9c718a98e81cd57e33ab3d77c56464  libgcc/config/rs6000/t-slibgcc-aix
  1d9dab8390b84ff0de504beefb72ce61  libgcc/config/rs6000/t-stack-rs6000
! b4ac6fdcabd92e243c363ca034de620d  libgcc/config/rs6000/tramp.S
! b42aa9a6238fe7f872fb073e993313ad  libgcc/config/rs6000/trunctfkf2-sw.c
! 129567bae53320a05fd57113ec3988a5  libgcc/config/rx/rx-abi-functions.c
! 165bc6ac5947bc732927a0539a4a4122  libgcc/config/rx/rx-abi.h
  da7bc70013c60be91cf9f085fed52f1a  libgcc/config/rx/rx-lib.h
! 881692430f9be3407d45194e6c0cd67c  libgcc/config/rx/t-rx
! abc7153e8f3a09c6a503a279e93f227a  libgcc/config/s390/32/_fixdfdi.c
! 34dfb551eeb7bc60486e10b2e929de97  libgcc/config/s390/32/_fixsfdi.c
! 8f018a35c1c11214a1b7e782e03f1547  libgcc/config/s390/32/_fixtfdi.c
! 9db9968bbbd22d8062b42c557666612d  libgcc/config/s390/32/_fixunsdfdi.c
! ec6388b196294cd7737613cde06c44bf  libgcc/config/s390/32/_fixunssfdi.c
! e604f35cf3f0a52e0bf046b61c82b559  libgcc/config/s390/32/_fixunstfdi.c
  6101649604e2b3fdd6179e1aa53066bf  libgcc/config/s390/32/t-floattodi
! 216631d83544254de5a59cf909c5d315  libgcc/config/s390/gthr-tpf.h
! 639b2134df52e7679a8805b3e49e3d45  libgcc/config/s390/libgcc-glibc.ver
! 675bc50dd03b92c58fb524cd29e716f5  libgcc/config/s390/linux-unwind.h
! 05001902b8b768bb964bfcd8a4fe57c8  libgcc/config/s390/morestack.S
  c150e28c734710584eba8e77d2ff5105  libgcc/config/s390/t-crtstuff
  35a77f8c50ecf16802e00e647ad94026  libgcc/config/s390/t-linux
  26d353eea9229af01124cc46b2e0cebd  libgcc/config/s390/t-stack-s390
! a5218871642ae69c55b0e826c41f3798  libgcc/config/s390/t-tpf
! 807723c672cc5d741e8fc5e670a301ee  libgcc/config/s390/tpf-unwind.h
! 6c778fe61ed0a1fcb7216d6ffdf31a92  libgcc/config/score/crti.S
! 771fa16b98ff34565bd43f34a50ea7ab  libgcc/config/score/crtn.S
  5d570ff5cd40fc6fba8876bdebd59a6b  libgcc/config/score/sfp-machine.h
! 4cfa727811b20989dc93b1f82531f17b  libgcc/config/sh/crt.h
! 4ade3312203a9da7ac0e58d6a5d5e38a  libgcc/config/sh/crt1.S
! 28e8689348449842db88ef7ee18e6c24  libgcc/config/sh/crti.S
! 33658379044f4a778bb23cf7f135a957  libgcc/config/sh/crtn.S
! 9a01a553395e7d4e521c9250a7bae509  libgcc/config/sh/lib1funcs-4-300.S
! 0ef8dd6f5058b02a217344ba68509781  libgcc/config/sh/lib1funcs-Os-4-200.S
! 2d7928ff153931b2524680a9cfe9904a  libgcc/config/sh/lib1funcs.S
! 0581a991448b9e2824daa82c58590abd  libgcc/config/sh/lib1funcs.h
  68ddef94ef228a2e500c6f84ca5c5f73  libgcc/config/sh/libgcc-excl.ver
! dcb30232658f73934221a534264d588a  libgcc/config/sh/libgcc-glibc.ver
! 45682918075893af0861988ae69f788a  libgcc/config/sh/linux-atomic.c
! f6d9d1183d93aa6a7806ca1dc21d92b6  libgcc/config/sh/linux-unwind.h
  d915cb58faa1ad2108733b662853057e  libgcc/config/sh/t-linux
  be1b06de574a22c34d2cf93d2d68a4f1  libgcc/config/sh/t-netbsd
! 5bbbb7cb84419dcba77541fb9ac1930e  libgcc/config/sh/t-sh
  00d4a30e4ed4a68cd6ec53feb398914b  libgcc/config/sh/t-superh
! 9727c64ead1a90589735cbd2dee185d7  libgcc/config/sol2/crtp.c
! a7a8ced15bd2ee4eab99c712cf244c27  libgcc/config/sol2/crtpg.c
  5e87cfc189f02028b142950527a73c54  libgcc/config/sol2/gmon.c
! 99c6512572c2382107ee09d07b42b46f  libgcc/config/sol2/t-sol2
! 882e1bdd0856406792ca75bf00f6d5ae  libgcc/config/sparc/crtfastmath.c
! 933d2e305019303ddb2cc24a077384f0  libgcc/config/sparc/crti.S
! 3f2a0f89c99d65462e02a8314e748c58  libgcc/config/sparc/crtn.S
  b2a26791cd6002e4af29a7fa32510b3b  libgcc/config/sparc/lb1spc.S
! cf8f9d89901d7340abc724caa2b9f4fe  libgcc/config/sparc/libgcc-glibc.ver
! a30ab9b25f0f6cbf295bf1eaa29cb301  libgcc/config/sparc/linux-unwind.h
! c7b5e0d7108fb30ddfa47fafd1df4451  libgcc/config/sparc/sol2-c1.S
! 368aba71c8e2540de94027ba3236b926  libgcc/config/sparc/sol2-unwind.h
  ef153c3f92e3dee09716d833736683eb  libgcc/config/sparc/t-linux
  180e9bc0e471bafa1c561931dc073ebe  libgcc/config/sparc/t-linux64
  dccc96847305efc8c465f1dedc591c23  libgcc/config/sparc/t-softmul
  efbaa48f2cdd756a3e953deca1bd19c9  libgcc/config/sparc/t-sol2
  68562e9ac6ce0883779dcc3aa21d758e  libgcc/config/stormy16/ashlsi3.c
  47744edc253a5317caf4e23e6be95c25  libgcc/config/stormy16/ashrsi3.c
  034b60d9d20beab2853732adb70c4de5  libgcc/config/stormy16/clrsbhi2.c
*************** bb51c4cdf671719b46c8ab800378ccbb  libgcc
*** 70466,70477 ****
  6cb0675d48c7276d43aa201bcc2fd60c  libgcc/config/stormy16/ctzhi2.c
  5bc65cdd345cb629c202f3e96a0410dd  libgcc/config/stormy16/divsi3.c
  3e736ac64edb45dddbedbcc751674354  libgcc/config/stormy16/ffshi2.c
! 4b4d4493e71bc49444ce4395f8af8a15  libgcc/config/stormy16/lib2funcs.c
  5620256715f30f1eeeb4bdf614b346a6  libgcc/config/stormy16/lshrsi3.c
  27b26d13ffac636e5de0fccdcb2b4515  libgcc/config/stormy16/modsi3.c
  514e4e067379e1bef2b0baac58a21afc  libgcc/config/stormy16/parityhi2.c
  a071c36e5256dc1e154c400ef3055556  libgcc/config/stormy16/popcounthi2.c
! 1a76c72b35a3656a179c82730272a9f5  libgcc/config/stormy16/t-stormy16
  ada9a39786da3b2e999f7440a17a1ed7  libgcc/config/stormy16/ucmpsi2.c
  0db895a315f3ea78e45253f9c2c8e7f8  libgcc/config/stormy16/udivmodsi4.c
  6dca6fc4737c716575c264f3934bb6d9  libgcc/config/stormy16/udivsi3.c
--- 80420,80431 ----
  6cb0675d48c7276d43aa201bcc2fd60c  libgcc/config/stormy16/ctzhi2.c
  5bc65cdd345cb629c202f3e96a0410dd  libgcc/config/stormy16/divsi3.c
  3e736ac64edb45dddbedbcc751674354  libgcc/config/stormy16/ffshi2.c
! 89e939e7650a72c059ec4f3896682e55  libgcc/config/stormy16/lib2funcs.c
  5620256715f30f1eeeb4bdf614b346a6  libgcc/config/stormy16/lshrsi3.c
  27b26d13ffac636e5de0fccdcb2b4515  libgcc/config/stormy16/modsi3.c
  514e4e067379e1bef2b0baac58a21afc  libgcc/config/stormy16/parityhi2.c
  a071c36e5256dc1e154c400ef3055556  libgcc/config/stormy16/popcounthi2.c
! 60071bd8f400a107b3bad3d859b312d1  libgcc/config/stormy16/t-stormy16
  ada9a39786da3b2e999f7440a17a1ed7  libgcc/config/stormy16/ucmpsi2.c
  0db895a315f3ea78e45253f9c2c8e7f8  libgcc/config/stormy16/udivmodsi4.c
  6dca6fc4737c716575c264f3934bb6d9  libgcc/config/stormy16/udivsi3.c
*************** e70c5d58ebf79fd5741ec98848df7f6f  libgcc
*** 70486,70511 ****
  3f230948d2b7453224d6a6dc08d40674  libgcc/config/t-fpbit
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! 44f8986180621720c4dfa1738424c30a  libgcc/config/t-hardfp
! 4f455774696c383e83f55c5c633b0e80  libgcc/config/t-hardfp-sfdf
  5b1981686da4ef8b1b62a20f10b3e715  libgcc/config/t-libgcc-pic
  5c40347f0b1274c8b5759d0ed9d1ccf8  libgcc/config/t-libunwind
! 5ff11694efb7c7421d206b02ccba2a37  libgcc/config/t-libunwind-elf
  397d06701a9c354f5606477c578c9efb  libgcc/config/t-linux
  eb3161bf886026cdcf8a78cea885fdd2  libgcc/config/t-openbsd-thread
  474d97884b393e08b0ce416dd09493bc  libgcc/config/t-rtems
! e2fe8cfb0ca1df8abfff21073c313dd8  libgcc/config/t-slibgcc
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  57f27c60e5d8c572d2645821ec5935e0  libgcc/config/t-slibgcc-elf-ver
! 510958fd5e35a4391d052cdf0b99a3b6  libgcc/config/t-slibgcc-fuchsia
  57e4154cb283fd7d9f323f5d85d534d9  libgcc/config/t-slibgcc-gld
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  429659ae1ff2531e3ba2fd0c676a320d  libgcc/config/t-slibgcc-hpux
! 660df1e3fc1825141ecbb7df72c9fd88  libgcc/config/t-slibgcc-libgcc
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  bb217aa78bbf6b6a7c7844f73152110d  libgcc/config/t-slibgcc-sld
  39082f76e7ff28af867afdb6b93b1891  libgcc/config/t-slibgcc-vms
! 4889fa60c59cb1c90a3168239cb109cc  libgcc/config/t-softfp
  1ec9425eada0171d381f5f9b47b613a9  libgcc/config/t-softfp-compat
  72f41afb67b3c3c67809819763244452  libgcc/config/t-softfp-excl
  14ecf481060b3893ba43c6e09ff40eab  libgcc/config/t-softfp-sfdf
--- 80440,80468 ----
  3f230948d2b7453224d6a6dc08d40674  libgcc/config/t-fpbit
  3041aeb5427a9c4af20f03d4d32bbe7c  libgcc/config/t-freebsd-thread
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! a5670d0218ee8d5011882573b6bd224b  libgcc/config/t-gthr-noweak
! 925527af5cc046b48ad621a96e896dd3  libgcc/config/t-gthr-vxworks
! 37f29328813c5ec6c35276b87457f6b8  libgcc/config/t-gthr-vxworksae
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! b299c997005377fb09d0bad235d59691  libgcc/config/t-hardfp-sfdf
  5b1981686da4ef8b1b62a20f10b3e715  libgcc/config/t-libgcc-pic
  5c40347f0b1274c8b5759d0ed9d1ccf8  libgcc/config/t-libunwind
! fb114fc474e86040a446fa90766e8f56  libgcc/config/t-libunwind-elf
  397d06701a9c354f5606477c578c9efb  libgcc/config/t-linux
  eb3161bf886026cdcf8a78cea885fdd2  libgcc/config/t-openbsd-thread
  474d97884b393e08b0ce416dd09493bc  libgcc/config/t-rtems
! c719c44114540927ecf2555f7fb8475b  libgcc/config/t-slibgcc
  4b78cd38aff781bc4f8087e2813bcccf  libgcc/config/t-slibgcc-darwin
  57f27c60e5d8c572d2645821ec5935e0  libgcc/config/t-slibgcc-elf-ver
! fa4305a341c2d0a5f01867ee0abe6504  libgcc/config/t-slibgcc-fuchsia
  57e4154cb283fd7d9f323f5d85d534d9  libgcc/config/t-slibgcc-gld
  226b6f10bc32786901a79b070ed13468  libgcc/config/t-slibgcc-gld-nover
  429659ae1ff2531e3ba2fd0c676a320d  libgcc/config/t-slibgcc-hpux
! 591093b6168a0527eba3473d3e46110e  libgcc/config/t-slibgcc-libgcc
  b5d3fe85dff400a82befa6b901b438ec  libgcc/config/t-slibgcc-nolc-override
  bb217aa78bbf6b6a7c7844f73152110d  libgcc/config/t-slibgcc-sld
  39082f76e7ff28af867afdb6b93b1891  libgcc/config/t-slibgcc-vms
! 3f4a36c5f3ef03bf18b3837bf8acb45d  libgcc/config/t-softfp
  1ec9425eada0171d381f5f9b47b613a9  libgcc/config/t-softfp-compat
  72f41afb67b3c3c67809819763244452  libgcc/config/t-softfp-excl
  14ecf481060b3893ba43c6e09ff40eab  libgcc/config/t-softfp-sfdf
*************** aa5fd95cba7a4d8329be007695e43d15  libgcc
*** 70513,70737 ****
  981f25965afcab131261c8bfc6c90e2f  libgcc/config/t-softfp-tf
  94681cc09c7ff0bb9a14356eff90be51  libgcc/config/t-stack
  685f35f0db36731a13637c087658e7a9  libgcc/config/t-tls
! 86424fdf8397801eee3647aa7163f600  libgcc/config/t-vxworks
! 6e4a7aacf9632907efed6e68c5f80cd1  libgcc/config/t-vxworks7
  0e57ca5d22e3d1095f2c0cfebd41a073  libgcc/config/tilegx/sfp-machine.h
  77fba27019d1cad2a0737fada3162555  libgcc/config/tilegx/sfp-machine32.h
  6db84064a9c59eacc33fca015d1b35a3  libgcc/config/tilegx/sfp-machine64.h
  16c22b80e53f817334a19c0b48ad554d  libgcc/config/tilegx/t-crtstuff
  5e2260f13769a960c8e1f24b0c9847e4  libgcc/config/tilegx/t-softfp
  94fecaba2fa3fca31d038d5739e45e51  libgcc/config/tilegx/t-tilegx
! da19a86aa42b52c66e811835fe92cd36  libgcc/config/tilepro/atomic.c
! a36705d23e76eb09794907f0f03dc7e0  libgcc/config/tilepro/atomic.h
! c98f3c9dc7d63bc8c7c4fa90cd10d009  libgcc/config/tilepro/linux-unwind.h
  c319c87cee2bc57b33cd850fb03731b5  libgcc/config/tilepro/sfp-machine.h
! b4103eecd4757d815f08e599f64f73ed  libgcc/config/tilepro/softdivide.c
! 00be54e94b448f6993d6401cd75836ae  libgcc/config/tilepro/softmpy.S
  4927dec2e58bebc9fec4d0405177eaea  libgcc/config/tilepro/t-crtstuff
  a6ca3e93e70a2a92d62823faefdc072f  libgcc/config/tilepro/t-tilepro
! a6dee7e89f6b7c3039c6f33249bef675  libgcc/config/unwind-dw2-fde-darwin.c
! 14221b09891a209b749b3aa301e8eedf  libgcc/config/v850/lib1funcs.S
  015fdb6e6a2a23f553dc5105691f7a6a  libgcc/config/v850/t-v850
! ef257eb29d3b85ba62576cc257d1a399  libgcc/config/vax/lib1funcs.S
  c668e63cf08f878538a0db39860696dc  libgcc/config/vax/t-linux
! 0e63e18c41a16fa5c653a072254e96e9  libgcc/config/visium/crti.S
! 66018ddc8c5bc63df4420aa931536eba  libgcc/config/visium/crtn.S
! 3072338762174a16410f5c724d30d59b  libgcc/config/visium/divdi3.c
! ad1e342087680b141767fa75bfc2f064  libgcc/config/visium/lib2funcs.c
! d0962902e1706a05da6846d9c0abf9b7  libgcc/config/visium/memcpy.c
! 4995dcd1c0ee3fd9d837bd27b2983003  libgcc/config/visium/memcpy.h
! feeacc9f3a265eea331d6b12131ae099  libgcc/config/visium/memset.c
! 7a0190f9a51c08c64d2d547c9bba8ebb  libgcc/config/visium/memset.h
! 9c6c7f26b1612b5a34a4488e92b7ab6b  libgcc/config/visium/moddi3.c
! 06b90bf49ca75b39e52bab8809c1d0c9  libgcc/config/visium/set_trampoline_parity.c
! 4173d669386e8349b957e82b6c22d79b  libgcc/config/visium/t-visium
! c8297593708b5135984ddfbf37a82351  libgcc/config/visium/udivdi3.c
! a95d23e368679e03fd711b28a556d656  libgcc/config/visium/udivmoddi4.c
! aab5b829b3af4df6dba184e717b0c369  libgcc/config/visium/umoddi3.c
  9383115b20d4126cf07541b5d7bf6c2a  libgcc/config/vms/t-vms
! 663dabc836bf2270269f9a4cea6c1e1a  libgcc/config/vms/vms-ucrt0.c
! fa07fd565ae1342dc5dec1eb6311cbf7  libgcc/config/vxcache.c
! ef7985a796fb1b10edee67cbf112aa28  libgcc/config/vxlib-tls.c
! dd7084c38b8812378ebff843dfdd70db  libgcc/config/vxlib.c
! 181b31937447daa14355d6f0abfc77fd  libgcc/config/xtensa/crti.S
! bb7dac1931c0ff4b580f30c547fab7f0  libgcc/config/xtensa/crtn.S
! da607b1a568b46621bc82024b629f416  libgcc/config/xtensa/ieee754-df.S
! 5ce368e68ab7b86cd28cbb4144fd6b6a  libgcc/config/xtensa/ieee754-sf.S
! 32f5f6354706ef6541b4d70a6955cd23  libgcc/config/xtensa/lib1funcs.S
! 6e0337f51866fe8a07a304699e22267d  libgcc/config/xtensa/lib2funcs.S
  8074695f5eea7b961c59ee9608973dac  libgcc/config/xtensa/libgcc-glibc.ver
! dd26825dbc0f832cf26d37f27f496c60  libgcc/config/xtensa/linux-unwind.h
  d437dc5394da39dbe1ece64723e90a76  libgcc/config/xtensa/t-elf
  4f2c91d0f57a675cc91b287ce2ad76aa  libgcc/config/xtensa/t-linux
  ce614fa17d52c2d7121d7e2d6f80b02d  libgcc/config/xtensa/t-windowed
  9acbec9b3406a3560d608714300a7edf  libgcc/config/xtensa/t-xtensa
! 0f03d5b712f3f134ce989152235935ae  libgcc/config/xtensa/unwind-dw2-xtensa.c
! 629c585c8cbc178cf47fe8701f876011  libgcc/config/xtensa/unwind-dw2-xtensa.h
! a0e94e3a3f372c46c1ae3fd66ae74c3d  libgcc/configure
! 0a3eedad10261bde5bbdc4bfc687345b  libgcc/configure.ac
! d307499cb0d26ff6ee5725d93d90b520  libgcc/crtstuff.c
! f8a37b2a8cf261075b2fd5e7ab74ff0d  libgcc/dfp-bit.c
! af507273b9c0ce1f05d1279fe6341800  libgcc/dfp-bit.h
! 5d4070ec81b7d3e77bb5bee395bd7adb  libgcc/divmod.c
  b9a5bcda72f7b8809010f38227353353  libgcc/empty.mk
! 00443b3dc8dbc6492d4d006bc73e4608  libgcc/emutls.c
  aa52a8f7cb881c00c125ed5fd04ed4df  libgcc/enable-execute-stack-empty.c
! 952dddb4c61787b4a04027939e83bcf2  libgcc/enable-execute-stack-mprotect.c
! d3e79b2ee259bac3f8ceb9c0a7fafdf7  libgcc/find-symver.awk
! 7801f845ab294d09d4a42d743e3a41c9  libgcc/fixed-bit.c
! 8dce55c5fec413ab1c4892b4d86ac7b3  libgcc/fixed-bit.h
  064f7220d5fd5127bd136e8e2a9d62e7  libgcc/fixed-obj.mk
  651caf13863ec6f313b467d1d8531cd4  libgcc/floatunsidf.c
  6ca2d25d30233e6c7c94aa94c266cb72  libgcc/floatunsisf.c
  faedd2248586a9d50451e03d502eb147  libgcc/floatunsitf.c
  56fa552ac2ef58f6b1563d9c11fd3548  libgcc/floatunsixf.c
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*** 71496,71571 ****
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*** 71574,71590 ****
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*** 71632,71644 ****
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--- 81627,81765 ----
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*************** f97613467ea0f2d75c3e23d86bfb5250  libgo/
*** 71798,71948 ****
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--- 81778,81948 ----
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  41d505886281aa923652cde0a9ee68d7  libgo/go/cmd/go/testdata/script/mod_case_cgo.txt
! 004ef4e288668009daec51de9660a07f  libgo/go/cmd/go/testdata/script/mod_convert_dep.txt
! 1df4aa7ea149b7c0ee31c8f6a2e8267c  libgo/go/cmd/go/testdata/script/mod_convert_git.txt
! 40e81c4955cd1dc3055450fb21f1d209  libgo/go/cmd/go/testdata/script/mod_convert_glide.txt
! 43d45d15ffe0ce0951c9e4ae5dea4105  libgo/go/cmd/go/testdata/script/mod_convert_glockfile.txt
! e210500e5775aa39cee6c44e1eb976b2  libgo/go/cmd/go/testdata/script/mod_convert_godeps.txt
! 163ddcb3f8091b85a8727e6cdded9518  libgo/go/cmd/go/testdata/script/mod_convert_tsv.txt
! 397a91f6dd80a4541d7d4ab8ae14480a  libgo/go/cmd/go/testdata/script/mod_convert_vendor_conf.txt
! 685bff8a4a4cfb98364f205aadce083e  libgo/go/cmd/go/testdata/script/mod_convert_vendor_json.txt
! 48f8a081132890f407c7ffec70fcf502  libgo/go/cmd/go/testdata/script/mod_convert_vendor_manifest.txt
! 32f8236481d66126d1f34db94e6fb436  libgo/go/cmd/go/testdata/script/mod_convert_vendor_yml.txt
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  3eb47b455434484b28f23ce5f19e6fe9  libgo/go/cmd/go/testdata/script/mod_domain_root.txt
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  110cd56e10d6e6fc294039d0e091166b  libgo/go/cmd/go/testdata/script/mod_get_incompatible.txt
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--- 82001,82274 ----
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! c284c8b8f14a239fd99ae9d953873d7a  libgo/go/cmd/go/testdata/script/list_linkshared.txt
! bea7c7e7201f51ba39eb22c9a0896110  libgo/go/cmd/go/testdata/script/list_parse_err.txt
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! 00b12c59098b1bc4d5420b57b510db64  libgo/go/cmd/go/testdata/script/list_test_e.txt
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*************** a12f3d9b328d17da302678def9e9c9d7  libgo/
*** 72142,72151 ****
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--- 82285,82290 ----
*************** ece39f757fb0881fddadab76f785e9d5  libgo/
*** 72163,72210 ****
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--- 82302,82314 ----
*************** cfc8eb0d9a477d3d3d04e7ba48b64723  libgo/
*** 72238,72248 ****
--- 82342,82355 ----
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*************** de834fca939fb2530d1269d53ef8393a  libgo/
*** 72265,72278 ****
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--- 82372,82385 ----
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*************** f6519a680c20f0432811ee6cbf45c86d  libgo/
*** 72282,72293 ****
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--- 82389,82406 ----
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*************** fac1bd13789f21c54d08d20a1d8862e4  libgo/
*** 72302,72307 ****
--- 82415,82422 ----
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*************** d983cd097582ed0127066af052e92347  libgo/
*** 72318,72354 ****
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--- 82433,82473 ----
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*************** c80442d73970e48153ce5f5e654b2179  libgo/
*** 72371,72377 ****
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--- 82490,82495 ----
*************** ad06276384ebc339e1931751e52b24ce  libgo/
*** 72419,72451 ****
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--- 82537,82569 ----
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*************** cfe1a1da12d6559463c5474e79847aa6  libgo/
*** 72461,72474 ****
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--- 82579,82592 ----
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*************** bc1906600d9696359786593b02e64d5b  libgo/
*** 72529,72542 ****
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--- 82647,82660 ----
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  69e09f5cf0bb31a15d8e83d6adc93e07  libgo/go/compress/lzw/writer_test.go
*************** a86e4036a41bd0e9d3ad17cec6ef8bc9  libgo/
*** 72551,72565 ****
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! 11dff35e4a13cb46033bc6609bb979ef  libgo/go/context/example_test.go
  6292e417f26ba5bb4a6dc5cbd34f2635  libgo/go/context/net_test.go
! d349b29d798d435a90de863193f26b4f  libgo/go/context/x_test.go
  590927177ab19da6e4ac9adf84c602fe  libgo/go/crypto/aes/aes_gcm.go
  9186a301659a85c1dd290f3ec7aaf4f7  libgo/go/crypto/aes/aes_test.go
  52bc400d4ddc5195f9eba3ea93646be5  libgo/go/crypto/aes/block.go
--- 82669,82683 ----
  3442cea2ff783d4c4e1a941aaf0e58b4  libgo/go/container/heap/heap_test.go
  febbe53d5f54b67e4e86fa8ddda9115c  libgo/go/container/list/list.go
  7cb4aca0766678d1d5ccf4d04908ce45  libgo/go/container/list/list_test.go
! 7d91d123d2b51105c8904031531704f7  libgo/go/container/ring/example_test.go
  04f808f97d2480ea07eb40b3a54bf51b  libgo/go/container/ring/ring.go
! 16f6189a98042add423d1e11cb050900  libgo/go/container/ring/ring_test.go
  d768e501b478241fda6eba25c889e1f2  libgo/go/context/benchmark_test.go
! 03150e910be0126caf961039440763e7  libgo/go/context/context.go
! 72508f16420754825da780cce1af138f  libgo/go/context/context_test.go
! d2bc73f423338ccbf9e6faad0aaa2d64  libgo/go/context/example_test.go
  6292e417f26ba5bb4a6dc5cbd34f2635  libgo/go/context/net_test.go
! 764851ce64a06acb2990c2e61928ecb9  libgo/go/context/x_test.go
  590927177ab19da6e4ac9adf84c602fe  libgo/go/crypto/aes/aes_gcm.go
  9186a301659a85c1dd290f3ec7aaf4f7  libgo/go/crypto/aes/aes_test.go
  52bc400d4ddc5195f9eba3ea93646be5  libgo/go/crypto/aes/block.go
*************** c3cfcb0bc9d93f89f4b8e5c2cc3fcc1d  libgo/
*** 72571,72576 ****
--- 82689,82695 ----
  57725487df8de01ff4b156caafbf30d6  libgo/go/crypto/aes/cipher_s390x.go
  789b23068b9ad1048e01b09b15e821e3  libgo/go/crypto/aes/const.go
  d1e946ae77454a4e2133bcf361533ec3  libgo/go/crypto/aes/ctr_s390x.go
+ a5239da391c4abb6fa13116362010ea1  libgo/go/crypto/aes/gcm_ppc64le.go
  e373f96266e61afe5bba2b6ce432c9a5  libgo/go/crypto/aes/gcm_s390x.go
  94e6b6568f8eb10b2961a3f05189ace8  libgo/go/crypto/aes/modes.go
  9388e452f99fd69ecb3ce300313be051  libgo/go/crypto/aes/modes_test.go
*************** a641f1ce40eaabaa6963c125d4945014  libgo/
*** 72578,72584 ****
  ff164cc25f0a7a281db479992b200557  libgo/go/crypto/cipher/cbc.go
  2f1635814518f21d34a2654122de6351  libgo/go/crypto/cipher/cbc_aes_test.go
  79438ff4fccbaf90491106dfde53785b  libgo/go/crypto/cipher/cfb.go
! f52a0480310dd0a60079e5d57a8daacf  libgo/go/crypto/cipher/cfb_test.go
  3d01d8ddfb289557618a7b80aabd0cb8  libgo/go/crypto/cipher/cipher.go
  a2eeb6a8efe129b4123853606ee29820  libgo/go/crypto/cipher/cipher_test.go
  81d8d687d1fabfecb21a90f9182cfe3e  libgo/go/crypto/cipher/common_test.go
--- 82697,82703 ----
  ff164cc25f0a7a281db479992b200557  libgo/go/crypto/cipher/cbc.go
  2f1635814518f21d34a2654122de6351  libgo/go/crypto/cipher/cbc_aes_test.go
  79438ff4fccbaf90491106dfde53785b  libgo/go/crypto/cipher/cfb.go
! b86e6ea5b20b75fec7e135df1a020108  libgo/go/crypto/cipher/cfb_test.go
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  81d8d687d1fabfecb21a90f9182cfe3e  libgo/go/crypto/cipher/common_test.go
*************** b271cef78c34fc4ea2859b963aff6149  libgo/
*** 72587,72621 ****
  682518f3b62dc36547871e6d3f8de3e5  libgo/go/crypto/cipher/ctr_test.go
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  f1d18f1bda09f5ef87f68366f8ef9783  libgo/go/crypto/cipher/export_test.go
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! 7e501a7732bc85609df717e6b14be4d3  libgo/go/crypto/des/block.go
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  0029cd1da64f60898b152b066ced6605  libgo/go/crypto/ecdsa/testdata/SigVer.rsp.bz2
! 3daa05036ef10ef8822bbdcde8a0a2d0  libgo/go/crypto/elliptic/elliptic.go
  efcf3b0b90ceca4770fa2b2fbb5def61  libgo/go/crypto/elliptic/elliptic_test.go
! d909118e74c566243f0f45a9aa717f53  libgo/go/crypto/elliptic/fuzz_test.go
  4c76be5ef590f2ca3178dc34b4cbd853  libgo/go/crypto/elliptic/p224.go
  dc67e4ed0c45d557134ef9df1bc21811  libgo/go/crypto/elliptic/p224_test.go
! 513383b5027dddd9dbd92706c8326d02  libgo/go/crypto/elliptic/p256.go
  e1cbb9bf22b8a11a1d017ebce22c6c32  libgo/go/crypto/elliptic/p256_asm.go
! 2eab3cdae94f6b2422581e4a2002cfa4  libgo/go/crypto/elliptic/p256_generic.go
! 2a067f976e8686081386dde0ebfd455e  libgo/go/crypto/elliptic/p256_s390x.go
  b25d9e1d601799080138f4922826921c  libgo/go/crypto/hmac/hmac.go
  e436442d00bbedf26b0ac9dcc651ed0d  libgo/go/crypto/hmac/hmac_test.go
  40b515143722f2248d7e52d256a97006  libgo/go/crypto/internal/randutil/randutil.go
--- 82706,82746 ----
  682518f3b62dc36547871e6d3f8de3e5  libgo/go/crypto/cipher/ctr_test.go
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  f1d18f1bda09f5ef87f68366f8ef9783  libgo/go/crypto/cipher/export_test.go
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! 2b284bbff9a1766d7d1f831511ff701d  libgo/go/crypto/cipher/gcm_test.go
  ed80fb436d52d58edc59c787f0cb29a8  libgo/go/crypto/cipher/io.go
  77f940f1c6de211c8043f5e2877635ff  libgo/go/crypto/cipher/ofb.go
  4d22c5a31ed3d5a3827c3c74a203d991  libgo/go/crypto/cipher/ofb_test.go
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  b1c2a583020acc4dfe7580dfe4ff46fb  libgo/go/crypto/crypto.go
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  20cc7cd917ce51716b99383088e00040  libgo/go/crypto/des/cipher.go
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! 207ffc7b62d27fd39df4688dddbf4859  libgo/go/crypto/dsa/dsa.go
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  0029cd1da64f60898b152b066ced6605  libgo/go/crypto/ecdsa/testdata/SigVer.rsp.bz2
! 09c12752c1d84c2686331b84804c54dc  libgo/go/crypto/ed25519/ed25519.go
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! 7d7d579cae9aa68ee288df719b2be675  libgo/go/crypto/ed25519/internal/edwards25519/const.go
! 7351f56555c0f74406c03baa8b2bb44e  libgo/go/crypto/ed25519/internal/edwards25519/edwards25519.go
! a9b19ad79ebc3c5ae2eadacf03a7b4d7  libgo/go/crypto/ed25519/testdata/sign.input.gz
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  40b515143722f2248d7e52d256a97006  libgo/go/crypto/internal/randutil/randutil.go
*************** e44f4d4a74bff971d55f1b6251f9042f  libgo/
*** 72625,72887 ****
  669523c34b97d66daa84c79e43853b86  libgo/go/crypto/issue21104_test.go
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! 7deaca5269dad7eb8ba62cf6a2c03374  libgo/go/crypto/tls/handshake_client.go
! 9fa03d331ceb1ec9c323e488713c446d  libgo/go/crypto/tls/handshake_client_test.go
! ca5f6f0593db30e002e5de43a4be8b5a  libgo/go/crypto/tls/handshake_client_tls13.go
! b67ebba27c9283540b88285a0752b470  libgo/go/crypto/tls/handshake_messages.go
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! 3f34194034da31fe5576bd84816e33ce  libgo/go/crypto/tls/handshake_server.go
! 5cf8f7fb6d90c2ed5bf9f1aeaaae1521  libgo/go/crypto/tls/handshake_server_test.go
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! 14c1dbdcad34bd462d014507c7a8d667  libgo/go/crypto/tls/handshake_test.go
! 4bfca7e1ab8ff0bd10ca2114421e5707  libgo/go/crypto/tls/key_agreement.go
! f871dca364cc0a42990653556e370ae7  libgo/go/crypto/tls/key_schedule.go
  b98cc62e868e434daafbce170d3d29d4  libgo/go/crypto/tls/key_schedule_test.go
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! 7ff8e9e75e624ccb7cbf85c11acd8788  libgo/go/crypto/tls/prf_test.go
! 1607162e62effec7c38a7d74c6f751ce  libgo/go/crypto/tls/testdata/Client-TLSv10-ClientCert-ECDSA-ECDSA
! 23bcf078437347a785cbd8e1b813f57d  libgo/go/crypto/tls/testdata/Client-TLSv10-ClientCert-ECDSA-RSA
! fafc3bd5b918fc5358a02824f681d25e  libgo/go/crypto/tls/testdata/Client-TLSv10-ClientCert-RSA-ECDSA
! 4631fa82b48b1e25edca5975ce90f29d  libgo/go/crypto/tls/testdata/Client-TLSv10-ClientCert-RSA-RSA
! b4129812ab0af3d97544c25a0b6b700c  libgo/go/crypto/tls/testdata/Client-TLSv10-ECDHE-ECDSA-AES
! a976b24ddda09fd172ca9d0fde27247a  libgo/go/crypto/tls/testdata/Client-TLSv10-ECDHE-RSA-AES
! 49f9da93aa2b35da1db2e964a78dea95  libgo/go/crypto/tls/testdata/Client-TLSv10-ExportKeyingMaterial
! 080fedf11917a110ad920675f07a21b9  libgo/go/crypto/tls/testdata/Client-TLSv10-RSA-RC4
! 35d7ba74250ca236e1ba5060d98511c3  libgo/go/crypto/tls/testdata/Client-TLSv11-ECDHE-ECDSA-AES
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  2f28864b82258ed5eaf4bbec2254a0d6  libgo/go/crypto/tls/testdata/example-cert.pem
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  681f5dfeb443451336a44d340f2bf987  libgo/go/crypto/x509/pkix/pkix.go
  8f84b6b3f205bddb014d54b141d921bc  libgo/go/crypto/x509/root.go
  21a97b9dfdc6ebd3752f373c8c07a8f7  libgo/go/crypto/x509/root_aix.go
  88c5798b2d7468ea7b8aef13b2f48eaf  libgo/go/crypto/x509/root_bsd.go
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  f78f92a5d37cdf312d66e075cc381368  libgo/go/crypto/x509/root_darwin_arm_gen.go
  25c9edb50a5e21a551dd74dfc6d91280  libgo/go/crypto/x509/root_darwin_armx.go
  c922aa217fd40a409bf56d9aeb31db55  libgo/go/crypto/x509/root_hurd.go
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! 103db7c70dd94aaf0410bcb44d728c44  libgo/go/crypto/x509/root_windows.go
! 444dcd31188d02acf157527e22dfc199  libgo/go/crypto/x509/sec1.go
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  18202f8d63fb43e053de6458d55872ad  libgo/go/crypto/x509/test-file.crt
  53c378bcca2793c3fa7a4df52707eb56  libgo/go/crypto/x509/testdata/test-dir.crt
! da8fabd4d9be2cb5f706a07f66647454  libgo/go/crypto/x509/verify.go
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! 87a63b69a6b0b1a5fbc4d53aebb48bc4  libgo/go/database/sql/convert.go
! fc64de069b1dc7d46b273e116a8862c1  libgo/go/database/sql/convert_test.go
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! 39a3c12d59b4eea4de41f422feb46c51  libgo/go/database/sql/driver/driver.go
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! ed6cf3497047d768956ad65e7358bd49  libgo/go/database/sql/sql.go
! 67916ec670380f4af58c6a833d369e0a  libgo/go/database/sql/sql_test.go
! fcfd81f4e9b912bb5192ceeb8b351ae1  libgo/go/debug/dwarf/attr_string.go
! 1d8842a6e32cac7cb54269d83219bc1c  libgo/go/debug/dwarf/buf.go
! 41d32673634c0b34c09f8293075fa058  libgo/go/debug/dwarf/class_string.go
! b276a800cc0196a95e76ff81cbfb862c  libgo/go/debug/dwarf/const.go
! b6b9ad4ac75eebcc4ab72552a1812a18  libgo/go/debug/dwarf/entry.go
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  248287fbc820cab5a4276928ff9d7209  libgo/go/debug/dwarf/export_test.go
! 1b797429dd3927d0f2a066fcd1eba61e  libgo/go/debug/dwarf/line.go
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! bbca69ae176905ac6f5db24af2601a21  libgo/go/debug/dwarf/open.go
! 435fc95ce91db0b63af4cdade726a9f7  libgo/go/debug/dwarf/tag_string.go
  c48488233d6ad5097bba0895351ae989  libgo/go/debug/dwarf/testdata/cycle.c
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  53be9821e20d51fc576404ee0d0cdb3b  libgo/go/debug/dwarf/testdata/line-clang.elf
--- 82750,83015 ----
  669523c34b97d66daa84c79e43853b86  libgo/go/crypto/issue21104_test.go
  ebc0d2d2ef9f621d567c9f14aa1f240b  libgo/go/crypto/md5/gen.go
  77482dca8a16b8ed34ff0bbb0a814bae  libgo/go/crypto/md5/md5.go
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! b7c1e3948e6b96dc8ef794ee411a07c3  libgo/go/crypto/md5/md5block_generic.go
! 9a25950ae22d42cd133fb3ca4ca1091b  libgo/go/crypto/rand/eagain.go
  5c6e5327de8c8ce9b359987acacafbb6  libgo/go/crypto/rand/rand.go
  c6ec91bcf16b412cfb637c18cfb68ace  libgo/go/crypto/rand/rand_batched.go
  655ad0c2849557ce31036c60948fe7b3  libgo/go/crypto/rand/rand_batched_test.go
  54c4c1fef2097f42406db46f45c99490  libgo/go/crypto/rand/rand_freebsd.go
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  54f5cab340aff2d5aca2ff32f39e0331  libgo/go/crypto/rand/rand_linux.go
  056f9af0010c1093db173851d879797c  libgo/go/crypto/rand/rand_openbsd.go
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*************** b92b510ef6d88424dd0d9c8a4bc4dbb5  libgo/
*** 72898,72913 ****
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--- 83026,83041 ----
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*************** f115382738e2c8f0308ae9592e7bec47  libgo/
*** 72934,72964 ****
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--- 83062,83092 ----
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*************** e88b744b2c8799bfed6f3a8b13f20c44  libgo/
*** 72969,72974 ****
--- 83097,83103 ----
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*************** d141fe4ce073e954a739c2e351360bd7  libgo/
*** 72987,73107 ****
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  b741a56a102065decc52ff0a9295eda8  libgo/go/encoding/gob/encoder.go
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  dfa08fd6d3fdf33eddcc3dbe126d0926  libgo/go/encoding/gob/error.go
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  58f5d1e91674343e771e58571daa2fca  libgo/go/encoding/gob/timing_test.go
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! e9e733560cf5ae1cc1d62573a8621ffd  libgo/go/encoding/hex/hex_test.go
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! 81e3f2c115072555cc240b27ee20a57c  libgo/go/encoding/json/decode.go
! 48056f6bb2ed307168efaf289428d134  libgo/go/encoding/json/decode_test.go
! d00665d3765a5f2693cce2a71d32f7d9  libgo/go/encoding/json/encode.go
! d7e954d1f3f7db8e63a4d777878d175e  libgo/go/encoding/json/encode_test.go
! a8b7bfd44b9f814edbff88c2b2f7e724  libgo/go/encoding/json/example_marshaling_test.go
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  7cc305f2f6cf1de1cc99724a1748a7bc  libgo/go/encoding/json/fold_test.go
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  4668675f4c4b18c8f639cd78bb4eafae  libgo/go/encoding/json/number_test.go
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--- 83116,83245 ----
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! 854e345232f051b0d17f482f9261586c  libgo/go/encoding/csv/reader.go
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! 69cec3ad76693af3e50d004ea7c7025a  libgo/go/expvar/expvar.go
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--- 83446,83524 ----
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*************** f2a5574eb1b0300d377550415b4f39f1  libgo/
*** 73385,73507 ****
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--- 83530,83830 ----
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--- 83838,83877 ----
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*************** a46f120c4fe91c189acfa4fc4c146242  libgo/
*** 73558,73563 ****
--- 83882,83888 ----
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*************** e4451d4233de3574bd2728193f2c9f24  libgo/
*** 73632,73638 ****
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--- 83957,83963 ----
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*************** a37c029e52bd96f9d2bc7dfb49555287  libgo/
*** 73671,73744 ****
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--- 83996,84087 ----
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! b37d21c6d3a50abd066c81778cc8eee0  libgo/go/internal/poll/fcntl_js.go
! f2c6fad9ee90b573b5fd3798ebb40349  libgo/go/internal/poll/fcntl_libc.go
! 7cca42cee0122e69b6f9603cd28a0f4f  libgo/go/internal/poll/fcntl_syscall.go
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! 8e9edd4314c251fa74b6654f83b528d8  libgo/go/internal/poll/fd_poll_runtime.go
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! 62917de05a5514c4998b28bd61d81f6b  libgo/go/internal/poll/fd_unix.go
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! 03e18719c64d62fa7a53911815af99ca  libgo/go/internal/poll/hook_unix.go
  f9e203c47c3495141cef11d4c2af02c9  libgo/go/internal/poll/hook_windows.go
+ 5ee1f269aa412284b7ca1193339fbc5d  libgo/go/internal/poll/read_test.go
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*************** a63c6dd4bc5f02088c1dc3158d68bb07  libgo/
*** 73747,73760 ****
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  9f5de450f2e892494c8afc527e054f31  libgo/go/internal/syscall/unix/at_freebsd.go
--- 84090,84113 ----
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*************** fcb24324edaa58254a9fc1038122e0f0  libgo/
*** 73776,73782 ****
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--- 84129,84135 ----
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*************** fd79b2ebfa3daf7a2c6496008027f36f  libgo/
*** 73788,73827 ****
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! cd7b0e89ec82d51719bb7451e0ce6a47  libgo/go/internal/syscall/windows/registry/mksyscall.go
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--- 84141,84179 ----
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*************** c4fbaf5d300d81134153d78fe396039a  libgo/
*** 73840,73990 ****
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  9eafe6bbde7780843386dcad5da0f729  libgo/go/internal/xcoff/testdata/bigar-ppc64
--- 84192,84200 ----
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*************** d141fe4ce073e954a739c2e351360bd7  libgo/
*** 73994,74023 ****
  8e157c18afb0e5f0344a6f0997267ac2  libgo/go/internal/xcoff/testdata/printbye.c
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--- 84204,84234 ----
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  ee47bed0f44643a86454d881fa472627  libgo/go/math/asin.go
*************** ee47bed0f44643a86454d881fa472627  libgo/
*** 74026,74119 ****
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--- 84237,84333 ----
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! b2d54ba768d8b7f3343854b69a633cd3  libgo/go/math/j0.go
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  6d248032462e296f305c0b8c9b14b355  libgo/go/math/log.go
*************** ebf25f782cfb20da855daf4cc040fbb8  libgo/
*** 74129,74177 ****
  f0a2035e6576998cb08c75753901c152  libgo/go/math/rand/gen_cooked.go
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  9c64d71fb6f2a342b61f3600248d5d4d  libgo/go/mime/encodedword.go
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  1f1d4d216b731ae23f58fbb610ed3f3c  libgo/go/mime/multipart/formdata.go
! b6a2baa764cc7849d34101c48c80260e  libgo/go/mime/multipart/formdata_test.go
! 9c26120b6ac67ff24720aaf41008d084  libgo/go/mime/multipart/multipart.go
! 5d06d393b4681906672e17523d22ca64  libgo/go/mime/multipart/multipart_test.go
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  199eb9e41958de1d5c8553068e86f66c  libgo/go/mime/multipart/writer_test.go
! 3612f09d2d1ecc54db8b0fbea8ede97f  libgo/go/mime/quotedprintable/example_test.go
  4be366c0b9637966fe48a68be687ecb0  libgo/go/mime/quotedprintable/reader.go
! 41b41cadd0726d2820498036315740bd  libgo/go/mime/quotedprintable/reader_test.go
  9a7a8fa0c7feea3bba71fb7f409edf6a  libgo/go/mime/quotedprintable/writer.go
  d1970eb1a59aeceb1c32c049a6a2b6fd  libgo/go/mime/quotedprintable/writer_test.go
  d7c2d693b83d74f542553f24afe3d013  libgo/go/mime/test.types
  d7c2d693b83d74f542553f24afe3d013  libgo/go/mime/testdata/test.types
  452e5eefd1071c8538b9315a6439994f  libgo/go/mime/testdata/test.types.plan9
! f37ee876020ed1db7d5fd3f112ee4b0a  libgo/go/mime/type.go
  38cd804ecac4484ac521d769afedbefb  libgo/go/mime/type_dragonfly.go
  38cd804ecac4484ac521d769afedbefb  libgo/go/mime/type_freebsd.go
  eaef28a4e56cbee96692095f999e83f8  libgo/go/mime/type_openbsd.go
  5decf13646968cfa0292bce1e80d78da  libgo/go/mime/type_plan9.go
  2b3e1d5d4f9d10216ec911eb6a95c663  libgo/go/mime/type_test.go
! 4d8147cc66f6dcc6e4691fa37d23cb27  libgo/go/mime/type_unix.go
  1a352a7ae6c8d9a9af3e85230e27c578  libgo/go/mime/type_windows.go
  e2058cbdab21bb5cf65d266969706e0e  libgo/go/net/addrselect.go
  e18e6a1c6d22dee80fae58407386579f  libgo/go/net/addrselect_test.go
--- 84343,84391 ----
  f0a2035e6576998cb08c75753901c152  libgo/go/math/rand/gen_cooked.go
  cd375b5752b3094726a21a5d7732b5e1  libgo/go/math/rand/normal.go
  8073c269d6f074828a9db5f28229f721  libgo/go/math/rand/race_test.go
! ca3f837cf3ecfbae0da5af3cba36565c  libgo/go/math/rand/rand.go
! 11025d9b2a53a65f05f0f4c7d72315cf  libgo/go/math/rand/rand_test.go
  c428ebc4b7899a835672ad9aea7d25f7  libgo/go/math/rand/regress_test.go
  4444c401b5103a0852eadd57d6374050  libgo/go/math/rand/rng.go
  c59029181577bcda5df58a7de276fa63  libgo/go/math/rand/zipf.go
! 307a817863a24bfde9d3125b5290be42  libgo/go/math/remainder.go
  a029fa437e4ae151a70522e359e9c3d0  libgo/go/math/signbit.go
! 6d6c1b19605d63cd740405980a088e36  libgo/go/math/sin.go
! c557575561d914fb0897682f2026c02d  libgo/go/math/sincos.go
  fc62755ca43927185173b4d1d80c02c7  libgo/go/math/sinh.go
  ad97db28333c0a8d0a47314dcfcdb7cd  libgo/go/math/sqrt.go
! 44bb39c6347c24333768ec52a8c551b2  libgo/go/math/tan.go
! 4be00347ccb57c3cae5c45bec3537471  libgo/go/math/tanh.go
  c8f896388d421222d3c6d8d9c363b258  libgo/go/math/trig_reduce.go
  75063090695c29e729302c292798d6b8  libgo/go/math/unsafe.go
  9c64d71fb6f2a342b61f3600248d5d4d  libgo/go/mime/encodedword.go
  1e5eb3e828b05d4b7b9dfce0b37a7a6e  libgo/go/mime/encodedword_test.go
! 0fe2b70579af2cdb1850873409bcbc25  libgo/go/mime/example_test.go
  e646cecd5158e36054301b0bb6704adf  libgo/go/mime/grammar.go
! ea55e25b2312e99c226e5a273c4266db  libgo/go/mime/mediatype.go
! 6ed1263c400cfb229322b863e98e30b1  libgo/go/mime/mediatype_test.go
  1f1d4d216b731ae23f58fbb610ed3f3c  libgo/go/mime/multipart/formdata.go
! 607690d75129c63da029e238d2d2c5f7  libgo/go/mime/multipart/formdata_test.go
! 80ecbed23c9086b2dd3354255d63faf5  libgo/go/mime/multipart/multipart.go
! 947e0f889ee6bd92f12c59dddcbdaef7  libgo/go/mime/multipart/multipart_test.go
  ea13f3c87e9a921a7368f85cd6ae67d3  libgo/go/mime/multipart/testdata/nested-mime
  29d0c21fd543ed7cd2aa15cc6c447899  libgo/go/mime/multipart/writer.go
  199eb9e41958de1d5c8553068e86f66c  libgo/go/mime/multipart/writer_test.go
! 5d8d3ea50411258b34a32bfeaf070362  libgo/go/mime/quotedprintable/example_test.go
  4be366c0b9637966fe48a68be687ecb0  libgo/go/mime/quotedprintable/reader.go
! 5ee4624e8a954ae45009209c028f3843  libgo/go/mime/quotedprintable/reader_test.go
  9a7a8fa0c7feea3bba71fb7f409edf6a  libgo/go/mime/quotedprintable/writer.go
  d1970eb1a59aeceb1c32c049a6a2b6fd  libgo/go/mime/quotedprintable/writer_test.go
  d7c2d693b83d74f542553f24afe3d013  libgo/go/mime/test.types
  d7c2d693b83d74f542553f24afe3d013  libgo/go/mime/testdata/test.types
  452e5eefd1071c8538b9315a6439994f  libgo/go/mime/testdata/test.types.plan9
! ccf3dc229f67e1942a70dfa20c59d6b9  libgo/go/mime/type.go
  38cd804ecac4484ac521d769afedbefb  libgo/go/mime/type_dragonfly.go
  38cd804ecac4484ac521d769afedbefb  libgo/go/mime/type_freebsd.go
  eaef28a4e56cbee96692095f999e83f8  libgo/go/mime/type_openbsd.go
  5decf13646968cfa0292bce1e80d78da  libgo/go/mime/type_plan9.go
  2b3e1d5d4f9d10216ec911eb6a95c663  libgo/go/mime/type_test.go
! 37a4d20412a711e92f958332b4fed464  libgo/go/mime/type_unix.go
  1a352a7ae6c8d9a9af3e85230e27c578  libgo/go/mime/type_windows.go
  e2058cbdab21bb5cf65d266969706e0e  libgo/go/net/addrselect.go
  e18e6a1c6d22dee80fae58407386579f  libgo/go/net/addrselect_test.go
*************** a40b11b7e620d7da9f650f3c85e94228  libgo/
*** 74188,74251 ****
  1701cea6528eed41eb29138cf52c0d2f  libgo/go/net/cgo_sockold.go
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  3262e51971b1cb74478bcca6acfb9275  libgo/go/net/cgo_stub.go
! c98091d940dc80e097c89e4a1a6b5080  libgo/go/net/cgo_unix.go
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  1ae0c51bf7a5c7e6cc4577b948752c13  libgo/go/net/cgo_windows.go
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  5ac9aff1490640627a495d3645b2d715  libgo/go/net/conf_netcgo.go
  bfc3bf63490c4404f9da6f5052e48d53  libgo/go/net/conf_test.go
  fb2c1e23f8863e4bd16002f1363630e8  libgo/go/net/conn_test.go
! f14cdd39b8e616091ab6e4e7a2767ad4  libgo/go/net/dial.go
! f2c76db9696cdba059da7ff3abfc94e2  libgo/go/net/dial_test.go
  72ec733a48ddc2c97a8db850236817b0  libgo/go/net/dial_unix_test.go
! ac88d6e17bef491ca2c38044e5a7afe5  libgo/go/net/dnsclient.go
  87994ae2396825c052b9426cf53d676d  libgo/go/net/dnsclient_test.go
! ee6d93ce5271f7fcd9c8dc91c8608eca  libgo/go/net/dnsclient_unix.go
! 108892c53894e20eee71a450076a720e  libgo/go/net/dnsclient_unix_test.go
! 31073044941ca55172f00aa7d762ca57  libgo/go/net/dnsconfig_unix.go
! 8f24874a2e9aa999bdaaa1c674286d89  libgo/go/net/dnsconfig_unix_test.go
  e19c81108b1510936f59e0fc23923503  libgo/go/net/dnsname_test.go
- 2a09c424c0d8d80ffe611262a6e281a8  libgo/go/net/error_nacl.go
  2a09c424c0d8d80ffe611262a6e281a8  libgo/go/net/error_plan9.go
  b8b3b08358f6c9491bd4480a65429bdb  libgo/go/net/error_plan9_test.go
! 9e54bff4044723b9985eb53912a573ee  libgo/go/net/error_posix.go
  56b5bea56d7c6395d2494e5f8ae5fcaf  libgo/go/net/error_posix_test.go
! cea463bbd8a27ec500281a4c204405a4  libgo/go/net/error_test.go
  041d6ec8861d0caccee9fd2efc78cb00  libgo/go/net/error_unix.go
  8d6e3589f7b3eb6ee9a5f60053166e9a  libgo/go/net/error_unix_test.go
  074802dcbd0d547811a910e495d18a14  libgo/go/net/error_windows.go
  63f0353da8d8fce76096c47f4d2d6441  libgo/go/net/error_windows_test.go
  8ce695e5626036ec9a966858f13c23ed  libgo/go/net/external_test.go
  365593e80afb253f235bba55f42b21d1  libgo/go/net/fd_plan9.go
! 280b0b1799f73828b4a722bb963f42e2  libgo/go/net/fd_unix.go
  9ad4691b48ec2a9d52ce912e220af2d1  libgo/go/net/fd_windows.go
! 7f3e19ec268f9a0746a07c4c712101bb  libgo/go/net/file.go
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! 36c3775f71498ef81ad785901e959900  libgo/go/net/file_stub.go
! e383be377bb368d4f1b9de7f2eca89a7  libgo/go/net/file_test.go
! af1767b19e17314d301eeb32a265fdcb  libgo/go/net/file_unix.go
  30876c1c5f58de3543d36ef2d38f4825  libgo/go/net/file_windows.go
  2ca32936d37eee699023f6a5089472cc  libgo/go/net/hook.go
  ab6b66c47d7fc39618c8a400cd48a24e  libgo/go/net/hook_plan9.go
! 9be0a126016ebe57b9c0871bd892aa71  libgo/go/net/hook_unix.go
  f2e6fabae4c9d246bdbd8ff254f4e096  libgo/go/net/hook_windows.go
  928fe4840b0c4214c7d43682f59446a8  libgo/go/net/hosts.go
  9a2343dbaa644fdbac9d74a72d812cf8  libgo/go/net/hosts_test.go
  77e1fec0f3af1cf49701683f11039637  libgo/go/net/hosts_testdata
! 8142729032a164b53396714c76e26384  libgo/go/net/http/cgi/child.go
  896d96bfbe8932bb87f8f91e61d2d4f7  libgo/go/net/http/cgi/child_test.go
  2f07c6f437396b1cd4f097a1efdddd8e  libgo/go/net/http/cgi/host.go
! ff4f61e64abf49a36d54c7d26b33eec0  libgo/go/net/http/cgi/host_test.go
! 55235ba80956fbb63247fbd3ef035e72  libgo/go/net/http/cgi/matryoshka_test.go
  e4400fedaf2630813552e8b089eab560  libgo/go/net/http/cgi/posix_test.go
  d7e85fa43c940035f4594614307de77a  libgo/go/net/http/cgi/testdata/test.cgi
! ea23485285ffa23ff76367766c82db76  libgo/go/net/http/client.go
! b16270d626ea243531b16083483c093a  libgo/go/net/http/client_test.go
! 1653561cd197d635a3e2723e835a1d94  libgo/go/net/http/clientserver_test.go
! 3e01332d985ddadcdc37deecd3012f11  libgo/go/net/http/cookie.go
! 2660bea8059282650b4c5ef2dcec0bf0  libgo/go/net/http/cookie_test.go
! 803cd7a603598327094e9145d83224e1  libgo/go/net/http/cookiejar/dummy_publicsuffix_test.go
! bf105227a44b4517dc01599b5ba37d94  libgo/go/net/http/cookiejar/example_test.go
  0552a5ee0d1b3a56a3712a00dc5918cb  libgo/go/net/http/cookiejar/jar.go
  8c7a7c09f9bae622b62ae1560f37fdef  libgo/go/net/http/cookiejar/jar_test.go
  7aea102b9b4298e12caa878e7e70f330  libgo/go/net/http/cookiejar/punycode.go
--- 84402,84467 ----
  1701cea6528eed41eb29138cf52c0d2f  libgo/go/net/cgo_sockold.go
  45143e812d7fea77d7cba8db0a5634a1  libgo/go/net/cgo_solaris.go
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  1ae0c51bf7a5c7e6cc4577b948752c13  libgo/go/net/cgo_windows.go
  167a99aadf9ba395a6a5d361954555ec  libgo/go/net/conf.go
  5ac9aff1490640627a495d3645b2d715  libgo/go/net/conf_netcgo.go
  bfc3bf63490c4404f9da6f5052e48d53  libgo/go/net/conf_test.go
  fb2c1e23f8863e4bd16002f1363630e8  libgo/go/net/conn_test.go
! 51483b293b903d87efafc3f8e7586ee7  libgo/go/net/dial.go
! 548e1b7b8bd79c40d6cc2cd23f97b5bd  libgo/go/net/dial_test.go
  72ec733a48ddc2c97a8db850236817b0  libgo/go/net/dial_unix_test.go
! d2622b228e7714f94cbe62e71e3eb12a  libgo/go/net/dnsclient.go
  87994ae2396825c052b9426cf53d676d  libgo/go/net/dnsclient_test.go
! 063b227037f03e95cbbc1c61fd172d51  libgo/go/net/dnsclient_unix.go
! d8fbb3cadab50ebbc5e640dc7f1ffa1d  libgo/go/net/dnsclient_unix_test.go
! 84d9bd9121afb272a4d6031b65f60279  libgo/go/net/dnsconfig_unix.go
! 0499c0a0011840039dfee685c0862ef7  libgo/go/net/dnsconfig_unix_test.go
  e19c81108b1510936f59e0fc23923503  libgo/go/net/dnsname_test.go
  2a09c424c0d8d80ffe611262a6e281a8  libgo/go/net/error_plan9.go
  b8b3b08358f6c9491bd4480a65429bdb  libgo/go/net/error_plan9_test.go
! 42d0b841630fe9035f765a328c60518e  libgo/go/net/error_posix.go
  56b5bea56d7c6395d2494e5f8ae5fcaf  libgo/go/net/error_posix_test.go
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  041d6ec8861d0caccee9fd2efc78cb00  libgo/go/net/error_unix.go
  8d6e3589f7b3eb6ee9a5f60053166e9a  libgo/go/net/error_unix_test.go
  074802dcbd0d547811a910e495d18a14  libgo/go/net/error_windows.go
  63f0353da8d8fce76096c47f4d2d6441  libgo/go/net/error_windows_test.go
+ 56d36b7521b6e41a897062f99acaba1e  libgo/go/net/example_test.go
  8ce695e5626036ec9a966858f13c23ed  libgo/go/net/external_test.go
  365593e80afb253f235bba55f42b21d1  libgo/go/net/fd_plan9.go
! f8de7d88139c3282b8a482a271bf8f22  libgo/go/net/fd_unix.go
  9ad4691b48ec2a9d52ce912e220af2d1  libgo/go/net/fd_windows.go
! fa04cee92dab65f8128b73a7a36408ae  libgo/go/net/file.go
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! 292ba0400cddbd99c3ec814eec243ba3  libgo/go/net/file_stub.go
! 8fb455c3f964ed1fda7992f2e960623a  libgo/go/net/file_test.go
! 1a89ea75d3a8750e8da0d9858152b2a6  libgo/go/net/file_unix.go
  30876c1c5f58de3543d36ef2d38f4825  libgo/go/net/file_windows.go
  2ca32936d37eee699023f6a5089472cc  libgo/go/net/hook.go
  ab6b66c47d7fc39618c8a400cd48a24e  libgo/go/net/hook_plan9.go
! d9d33dac8ab0eca1d78bb423823752c2  libgo/go/net/hook_unix.go
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  928fe4840b0c4214c7d43682f59446a8  libgo/go/net/hosts.go
  9a2343dbaa644fdbac9d74a72d812cf8  libgo/go/net/hosts_test.go
  77e1fec0f3af1cf49701683f11039637  libgo/go/net/hosts_testdata
! 3abcd3590b8166ca70ef6ad10851a7fe  libgo/go/net/http/alpn_test.go
! f71b28db2b8516ab2d96d3e845d22fbf  libgo/go/net/http/cgi/child.go
  896d96bfbe8932bb87f8f91e61d2d4f7  libgo/go/net/http/cgi/child_test.go
  2f07c6f437396b1cd4f097a1efdddd8e  libgo/go/net/http/cgi/host.go
! 3840d3572518856a8ada5173d9811715  libgo/go/net/http/cgi/host_test.go
! 55235ba80956fbb63247fbd3ef035e72  libgo/go/net/http/cgi/integration_test.go
  e4400fedaf2630813552e8b089eab560  libgo/go/net/http/cgi/posix_test.go
  d7e85fa43c940035f4594614307de77a  libgo/go/net/http/cgi/testdata/test.cgi
! af682e050b72385b139257d3ae41919f  libgo/go/net/http/client.go
! 36a51f3ff07f95e2ccfcb734bdec9324  libgo/go/net/http/client_test.go
! 09b45e1b24b88105476c5faf568db0ad  libgo/go/net/http/clientserver_test.go
! 32dab4fc96751b3b271a3658a6b16d69  libgo/go/net/http/clone.go
! 6b99a5dc7666ae9f0bbc06524379217e  libgo/go/net/http/cookie.go
! a5baa614c4bab9d1aa7e012c39f167ec  libgo/go/net/http/cookie_test.go
! 42a80d5d3ffd56144396086e16a507bd  libgo/go/net/http/cookiejar/dummy_publicsuffix_test.go
! 989022b325e93055d5d7ca0fe4e5ebb7  libgo/go/net/http/cookiejar/example_test.go
  0552a5ee0d1b3a56a3712a00dc5918cb  libgo/go/net/http/cookiejar/jar.go
  8c7a7c09f9bae622b62ae1560f37fdef  libgo/go/net/http/cookiejar/jar_test.go
  7aea102b9b4298e12caa878e7e70f330  libgo/go/net/http/cookiejar/punycode.go
*************** fabfb997332db4db285c4a3beaa6d742  libgo/
*** 74253,74381 ****
  b50423cb8972e513fc81006625211254  libgo/go/net/http/doc.go
  93b8ea058445b1a65b354c0df8202014  libgo/go/net/http/example_filesystem_test.go
  e79282f8a2abf5d53e71a8b587b0ad95  libgo/go/net/http/example_handle_test.go
! b3d8e83cb6fd8c02c57e1c4e4d1478f3  libgo/go/net/http/example_test.go
! 960b6114ae359bc3c80d9932d09f50e2  libgo/go/net/http/export_test.go
  c569eb9686d3933bc9a8555f65135897  libgo/go/net/http/fcgi/child.go
  47202d325ac9d95c70abeaaaffc8dd61  libgo/go/net/http/fcgi/fcgi.go
  24f24cc41353df388b8c81592622fbd9  libgo/go/net/http/fcgi/fcgi_test.go
  8f307dd7176f148925a44be015c37dba  libgo/go/net/http/filetransport.go
  0e1a9ae7ece248077c9fad98299e4483  libgo/go/net/http/filetransport_test.go
! a5ea5c320cdcdde9c610c560bf210ccf  libgo/go/net/http/fs.go
! ff1ab412ce3ed260d0e5222a5cd3bd89  libgo/go/net/http/fs_test.go
! 481016971d4b9a1498ae40690ac588f6  libgo/go/net/http/h2_bundle.go
! 96c675b84582edae0f5b5bcd1c55f3c0  libgo/go/net/http/header.go
! 0a2da2c78d4ab70726fdf9c33508ca17  libgo/go/net/http/header_test.go
! 4caa9c55179e5b0f680feb4993805add  libgo/go/net/http/http.go
! cc03bc0eab3ced6dae94768106c7dff0  libgo/go/net/http/http_test.go
  753b35f46ca755bbee4f49c46550bd56  libgo/go/net/http/httptest/httptest.go
  af4c14bfc69278f4d55dec879eadf5e6  libgo/go/net/http/httptest/httptest_test.go
! 3f0ba1e95fc677168051c044aa61bd2d  libgo/go/net/http/httptest/recorder.go
  af709cd6db51db84c8993888fe64f362  libgo/go/net/http/httptest/recorder_test.go
! 342925d8f49523d9c9fd3819b377b120  libgo/go/net/http/httptest/server.go
! c89870b391b5a74e4b617267be944685  libgo/go/net/http/httptest/server_test.go
! 55f477ffc1c0f1b304584410a0feb720  libgo/go/net/http/httptrace/example_test.go
! a29073a2d07bf26a3a22237ee0bd9ee5  libgo/go/net/http/httptrace/trace.go
  bb2a61d61c614a20bfdef885c91bb578  libgo/go/net/http/httptrace/trace_test.go
! 804067d0622c038d5ce3aba387374778  libgo/go/net/http/httputil/dump.go
! 0d946a17c2307d73e851b728b516a054  libgo/go/net/http/httputil/dump_test.go
! 666ad46f0df15ca49f1e27e140e96b57  libgo/go/net/http/httputil/example_test.go
  621fc522707bcfe96838d2f35ff32e29  libgo/go/net/http/httputil/httputil.go
! dbe85aba81ce0f44dbad46e06bd1a307  libgo/go/net/http/httputil/persist.go
! eb0e07f30395e06bc9902d73e792fd78  libgo/go/net/http/httputil/reverseproxy.go
! 686886b540d158e0aafd5b1023abf80f  libgo/go/net/http/httputil/reverseproxy_test.go
  f41563affc303e804d128880491ffd58  libgo/go/net/http/internal/chunked.go
  9b9252666bb5bfc6b6bd22b8ed065237  libgo/go/net/http/internal/chunked_test.go
! 6841203c1c36fa4fe4f17657eb2147a9  libgo/go/net/http/internal/testcert.go
  0f1b2ae9b087721dc8d532479b919c2e  libgo/go/net/http/jar.go
! cf463b03ed2bb2d4b638d5aa3ad328ef  libgo/go/net/http/main_test.go
  5b196501ffa7d98bd91bcb0561952a22  libgo/go/net/http/method.go
! 3abcd3590b8166ca70ef6ad10851a7fe  libgo/go/net/http/npn_test.go
! 3f3661f0bdd2060a7ea19ab4ba78c42a  libgo/go/net/http/pprof/pprof.go
  fa1022533c76a2198844f5c7e263eb3f  libgo/go/net/http/pprof/pprof_test.go
  f41a4a4d2d2387f202e30fa290bff01f  libgo/go/net/http/proxy_test.go
  9a78c894b9046071d6fd6ecaaaa1537b  libgo/go/net/http/range_test.go
! 33f9025d7f299bf3469e90453652f7cb  libgo/go/net/http/readrequest_test.go
! fa3810dd277a76c7cc3059d4d34a66b3  libgo/go/net/http/request.go
! f078a9cbafcb660c701ce875e24a309b  libgo/go/net/http/request_test.go
  1ffb45e5f59a01b7a5dc9e34af75b1c8  libgo/go/net/http/requestwrite_test.go
! 2bec07fc3225feae2b4cf4ce0841459a  libgo/go/net/http/response.go
! e3f9be95c756482d76b0722f49cdf8c7  libgo/go/net/http/response_test.go
  06f5252495a364cbb74825a589b7467c  libgo/go/net/http/responsewrite_test.go
  46994b44d2940614c609ba98688e7a3f  libgo/go/net/http/roundtrip.go
! ab925641572967b5c3db68721c2c0e51  libgo/go/net/http/roundtrip_js.go
! e7fc1b686a8d5f0a091b10ab27c7860d  libgo/go/net/http/serve_test.go
! 87763e7b6ba760d9d69e3eedf3ab7c11  libgo/go/net/http/server.go
  a7586db3651650d075f8fa4151a5f579  libgo/go/net/http/server_test.go
! a82bc26baecf5fa02fdf16329633daab  libgo/go/net/http/sniff.go
! 43bb44f72aba252e828167f6c6135d81  libgo/go/net/http/sniff_test.go
! e30ee04f4014e6ddcb75c71df446f122  libgo/go/net/http/socks_bundle.go
! 90a841baa339366e8f7c18b87eec1fa3  libgo/go/net/http/status.go
  3749f52bb326ae96782b42dc0a97b4c1  libgo/go/net/http/testdata/file
  39bf3a5cbcd978e0d9a9bab0f27787b4  libgo/go/net/http/testdata/index.html
  746f7bd76da133c7035108d0053a7e79  libgo/go/net/http/testdata/style.css
! 4ab43aaa4ddaa4fecd54d269d88cc038  libgo/go/net/http/transfer.go
! 791f50682a26f8a1557456bb4144a033  libgo/go/net/http/transfer_test.go
! f66593d0db2efc64fefafc09cbb5f40e  libgo/go/net/http/transport.go
  cd93f24f598e8bca4fcdd70b8bfc1512  libgo/go/net/http/transport_internal_test.go
! 3629e97ec3265c616ad88bc08b215bd0  libgo/go/net/http/transport_test.go
  1cc2a86545b9a3ad083398fd0eb443de  libgo/go/net/http/triv.go
! 3d08603a295586015d67c0301f6fb901  libgo/go/net/interface.go
! 254d94b3845abbc3f97341bc8673b852  libgo/go/net/interface_aix.go
! f7e2a5ab59affd0aadf5b95614028419  libgo/go/net/interface_bsd.go
! c7d7603ad91cb40ea012a57cacc3b5d6  libgo/go/net/interface_bsdvar.go
! d0520a9cf6f732d9ad503929f0771687  libgo/go/net/interface_darwin.go
! 01b6ebcfc614c3c07c27490dc94626ff  libgo/go/net/interface_freebsd.go
  477b4e2fff4f36318811b100f7cfcac9  libgo/go/net/interface_linux.go
! 0e4be9e09440a8bdba95badf9d7061fa  libgo/go/net/interface_plan9.go
! 7ff464b5a275d8e9a2e4a830f48f8424  libgo/go/net/interface_solaris.go
! 205de9f3303ce3ab5d2cf0af3c9b9e05  libgo/go/net/interface_stub.go
! 39ceec327ee6c51c99257985c2d373d5  libgo/go/net/interface_test.go
! d06f12b7cfa2c19a74b4ec82bbada0f4  libgo/go/net/interface_windows.go
  4938aae8d8c4b20a144745c62fd03807  libgo/go/net/internal/socktest/main_test.go
  0e56ac4ee38729db3b2be1ecaabdc830  libgo/go/net/internal/socktest/main_unix_test.go
  2cfc75a60347ce6dc6ec6e2bbbbdf587  libgo/go/net/internal/socktest/main_windows_test.go
  7191d08be01ea5c2171a415596ae18e9  libgo/go/net/internal/socktest/switch.go
  d533a96d403af07716cce570e7894e7f  libgo/go/net/internal/socktest/switch_posix.go
  210a4961c356382d8caa578085bdbdad  libgo/go/net/internal/socktest/switch_stub.go
! f8e55e53b992a07b32e27c3c5dc30769  libgo/go/net/internal/socktest/switch_unix.go
  e545fc02b83eb3d301779219574da8e8  libgo/go/net/internal/socktest/switch_windows.go
  793e389ae252b0857053c2153d178f5e  libgo/go/net/internal/socktest/sys_cloexec.go
! 9d452fe5508aa768393fd1f4fb1785e7  libgo/go/net/internal/socktest/sys_unix.go
  a9793c2001dcdbae6de26c3126bfc146  libgo/go/net/internal/socktest/sys_windows.go
! 06c51e8d94989fe2d824e3ca6415239c  libgo/go/net/ip.go
  fea86d1cbbdea760b8dcf7ea47b934a4  libgo/go/net/ip_test.go
! 17594cfa54fa9fc0aedbd95c39a43bd9  libgo/go/net/iprawsock.go
  5ddf25949204389f7e9f8cf2aafc14bc  libgo/go/net/iprawsock_plan9.go
! d5cd31076a443741c8a6d41948e0bbfc  libgo/go/net/iprawsock_posix.go
  7cd1b291592446506c82c1c52d97bc84  libgo/go/net/iprawsock_test.go
  f0dee4365510b930764c8499fa387b82  libgo/go/net/ipsock.go
! 2d60ed357e0f2e160a0c9b8fd5db4776  libgo/go/net/ipsock_plan9.go
! 558dccdcb56ce57eec048e8080b8f881  libgo/go/net/ipsock_posix.go
  07e3ace72b261ace00842ec4e545cca4  libgo/go/net/ipsock_test.go
! 23968d20abf633dbff8e291561be1c1d  libgo/go/net/listen_test.go
! 95ef4a9ef5d4ce4153953243f6bedd06  libgo/go/net/lookup.go
! 22cf089fc65448c3bb4528438db801d0  libgo/go/net/lookup_fake.go
! dd05bc1267d42ce160c924e80fa09829  libgo/go/net/lookup_plan9.go
! 390de21c72613730878693f27139d687  libgo/go/net/lookup_test.go
! 53da46a70c42745e3202afb67076d654  libgo/go/net/lookup_unix.go
! 60045d7ba32a3ceb9342eebab89268c5  libgo/go/net/lookup_windows.go
! b5320c987ef9e63f1aae21d2499bdef6  libgo/go/net/mac.go
! 6ce995d9b53c914a9c23ea837c12c486  libgo/go/net/mac_test.go
! e40a563149e083a1ea90d86f4214ccc2  libgo/go/net/mail/example_test.go
! 313d120175dc6c221ceba13e4a3df9e8  libgo/go/net/mail/message.go
! 98b3ce48a5127769da7a863ad8d24eda  libgo/go/net/mail/message_test.go
  04201c17cd693613159de31d9917c594  libgo/go/net/main_cloexec_test.go
! 77d9e81620840056a80d936b1407ad6a  libgo/go/net/main_conf_test.go
! 42ca87a2244b6cd4326ec8643c57777f  libgo/go/net/main_noconf_test.go
  eda73809fd6152fe3ad6d2d02e53b5a2  libgo/go/net/main_plan9_test.go
  c915459d5ed65674b20dcd2f185bcceb  libgo/go/net/main_posix_test.go
  9b92bf2f5ecb798ac752508f48e5e476  libgo/go/net/main_test.go
! c3577bb7e5d5c528b67d6d6acf25a2ad  libgo/go/net/main_unix_test.go
  843c1a9e232c2fedc1f7c555559b8dc9  libgo/go/net/main_windows_test.go
  8c335e3b500065e9445e98352c63779e  libgo/go/net/mockserver_test.go
! 4a54651087378d17a9d246837fb7865d  libgo/go/net/net.go
  c57b6d8fec004b20287e061c7a12806b  libgo/go/net/net_fake.go
! 41329cc49e23a8fabf76dfa6ff0f09de  libgo/go/net/net_test.go
  d20ac26330c1e6fa5c87a58b79711acf  libgo/go/net/newpollserver_rtems.go
  6be4dc522d68c3da3f17b58c7e516494  libgo/go/net/nss.go
  9468475a1e672be361eae05bd6d14cca  libgo/go/net/nss_test.go
--- 84469,84602 ----
  b50423cb8972e513fc81006625211254  libgo/go/net/http/doc.go
  93b8ea058445b1a65b354c0df8202014  libgo/go/net/http/example_filesystem_test.go
  e79282f8a2abf5d53e71a8b587b0ad95  libgo/go/net/http/example_handle_test.go
! 135709e5a5e13c9bb760ae99a4ef2c9d  libgo/go/net/http/example_test.go
! 6d86636e058c30f9f4990f970673856d  libgo/go/net/http/export_test.go
  c569eb9686d3933bc9a8555f65135897  libgo/go/net/http/fcgi/child.go
  47202d325ac9d95c70abeaaaffc8dd61  libgo/go/net/http/fcgi/fcgi.go
  24f24cc41353df388b8c81592622fbd9  libgo/go/net/http/fcgi/fcgi_test.go
  8f307dd7176f148925a44be015c37dba  libgo/go/net/http/filetransport.go
  0e1a9ae7ece248077c9fad98299e4483  libgo/go/net/http/filetransport_test.go
! 49d0254a7ff885a2bcff67534e15d1bb  libgo/go/net/http/fs.go
! 257274a8846d18e9023dcaeda3cb5a45  libgo/go/net/http/fs_test.go
! d462c8646cf3a7a1f4eeb19679d74fa0  libgo/go/net/http/h2_bundle.go
! 4d4601fac859fd8a72db73438a7668c5  libgo/go/net/http/header.go
! 33d6be154b87bdf0f213bcab064b5f00  libgo/go/net/http/header_test.go
! f394bc1b266364e6092a71551232a7b7  libgo/go/net/http/http.go
! ce1afbc372fc4981ed7fc56a1aced98c  libgo/go/net/http/http_test.go
! 00c9695690472614a25c1350d3e43beb  libgo/go/net/http/httptest/example_test.go
  753b35f46ca755bbee4f49c46550bd56  libgo/go/net/http/httptest/httptest.go
  af4c14bfc69278f4d55dec879eadf5e6  libgo/go/net/http/httptest/httptest_test.go
! b39e7481c75e0ecbd96f3895dd8aa6ed  libgo/go/net/http/httptest/recorder.go
  af709cd6db51db84c8993888fe64f362  libgo/go/net/http/httptest/recorder_test.go
! d01b4313ea3995f7adaa945cdb68e102  libgo/go/net/http/httptest/server.go
! 8a35b364624cb82893df7c887323a671  libgo/go/net/http/httptest/server_test.go
! e6dc64cdeb8c4ccdf9e88fdb0d4587ef  libgo/go/net/http/httptrace/example_test.go
! 5a3eac540df1900a44d08f7a9f9d85d1  libgo/go/net/http/httptrace/trace.go
  bb2a61d61c614a20bfdef885c91bb578  libgo/go/net/http/httptrace/trace_test.go
! f1409690da40c57e52e31ac5fa95cf1b  libgo/go/net/http/httputil/dump.go
! ed4d752a1c4f45f95d3d38893612a372  libgo/go/net/http/httputil/dump_test.go
! bf6fbd9583e3dfba760cf2e37f18b3fb  libgo/go/net/http/httputil/example_test.go
  621fc522707bcfe96838d2f35ff32e29  libgo/go/net/http/httputil/httputil.go
! 8fcb758f622f8024b45c670f5c214f6a  libgo/go/net/http/httputil/persist.go
! 3c4a764c327038cf2a38e28bf0092c27  libgo/go/net/http/httputil/reverseproxy.go
! 04c8044616a1594ece1550545ee11ead  libgo/go/net/http/httputil/reverseproxy_test.go
  f41563affc303e804d128880491ffd58  libgo/go/net/http/internal/chunked.go
  9b9252666bb5bfc6b6bd22b8ed065237  libgo/go/net/http/internal/chunked_test.go
! d8dfb99ddffa4bb63870288bdf1b9fe8  libgo/go/net/http/internal/testcert.go
  0f1b2ae9b087721dc8d532479b919c2e  libgo/go/net/http/jar.go
! fe5775e8fd8ba986e84cd281cdbafa46  libgo/go/net/http/main_test.go
  5b196501ffa7d98bd91bcb0561952a22  libgo/go/net/http/method.go
! 031baecfa54efdc46f351fb7469f539e  libgo/go/net/http/omithttp2.go
! 890c40fdbb24bcbb9df7c78fd1da15bd  libgo/go/net/http/pprof/pprof.go
  fa1022533c76a2198844f5c7e263eb3f  libgo/go/net/http/pprof/pprof_test.go
  f41a4a4d2d2387f202e30fa290bff01f  libgo/go/net/http/proxy_test.go
  9a78c894b9046071d6fd6ecaaaa1537b  libgo/go/net/http/range_test.go
! 01586643b9393067a8d919bf80cd6dfc  libgo/go/net/http/readrequest_test.go
! 1f69b13583d9f3567409301998ce53d5  libgo/go/net/http/request.go
! a0873969151e452713f28b06c882161c  libgo/go/net/http/request_test.go
  1ffb45e5f59a01b7a5dc9e34af75b1c8  libgo/go/net/http/requestwrite_test.go
! 489170b5049b7c44ed96626419411ea4  libgo/go/net/http/response.go
! e77f4656370d07b193522273c189525c  libgo/go/net/http/response_test.go
  06f5252495a364cbb74825a589b7467c  libgo/go/net/http/responsewrite_test.go
  46994b44d2940614c609ba98688e7a3f  libgo/go/net/http/roundtrip.go
! 497607d7446b5da8c51b64626d3e0f9f  libgo/go/net/http/roundtrip_js.go
! 9870906c6c026278663115bf36c2272b  libgo/go/net/http/serve_test.go
! 593fb25e13c32ae294e116e222ac76b7  libgo/go/net/http/server.go
  a7586db3651650d075f8fa4151a5f579  libgo/go/net/http/server_test.go
! ddf3c49d88c56a8d67fb809980cb20b6  libgo/go/net/http/sniff.go
! fb6a03dd1b0fcfdcc97f49bced933658  libgo/go/net/http/sniff_test.go
! 743834de0c5c3afe182870b421463ea7  libgo/go/net/http/socks_bundle.go
! 959838655df79dd1948d8a7e1e954196  libgo/go/net/http/status.go
  3749f52bb326ae96782b42dc0a97b4c1  libgo/go/net/http/testdata/file
  39bf3a5cbcd978e0d9a9bab0f27787b4  libgo/go/net/http/testdata/index.html
  746f7bd76da133c7035108d0053a7e79  libgo/go/net/http/testdata/style.css
! f2e6f07289d59034477d0f9ff8e13619  libgo/go/net/http/transfer.go
! af9529304c62bdfb808b7f4d2c92e3e5  libgo/go/net/http/transfer_test.go
! 0bfc5ac67338a72f64ec66e43c06aa4b  libgo/go/net/http/transport.go
  cd93f24f598e8bca4fcdd70b8bfc1512  libgo/go/net/http/transport_internal_test.go
! ba84060454f297b5b9f63eff1746af29  libgo/go/net/http/transport_test.go
  1cc2a86545b9a3ad083398fd0eb443de  libgo/go/net/http/triv.go
! 1de2210361240cb1b3b237a4bb5bdbf1  libgo/go/net/interface.go
! caa877eb9b42bfd54e336d3c18538b8d  libgo/go/net/interface_aix.go
! 55dbd9d74d3b73535e827df0056bae1e  libgo/go/net/interface_bsd.go
! 77ada80f92003ee97ea83618ee47fa4e  libgo/go/net/interface_bsd_test.go
! 82469630fe461a0b90c1242ea1c06145  libgo/go/net/interface_bsdvar.go
! dc7ca7365edbede73daa0b1b5b4891c7  libgo/go/net/interface_darwin.go
! 3e55fb7a3a7d5189b393a50069faa756  libgo/go/net/interface_freebsd.go
  477b4e2fff4f36318811b100f7cfcac9  libgo/go/net/interface_linux.go
! bd00334720a282bfa3655af3d4587339  libgo/go/net/interface_linux_test.go
! 0af3cd99fdc3edcfdfb39e20cddd1cb6  libgo/go/net/interface_plan9.go
! f75680fadd64ee951a7814b629c7b12a  libgo/go/net/interface_solaris.go
! 8d3de81cca9651cde9463f4d8fedb02e  libgo/go/net/interface_stub.go
! 033a0386e631592f479a4b8e476b121e  libgo/go/net/interface_test.go
! f1607d1980081646c9c087694a405afd  libgo/go/net/interface_unix_test.go
! 1c89f1dfe87b1137f2d0fb526accbff6  libgo/go/net/interface_windows.go
  4938aae8d8c4b20a144745c62fd03807  libgo/go/net/internal/socktest/main_test.go
  0e56ac4ee38729db3b2be1ecaabdc830  libgo/go/net/internal/socktest/main_unix_test.go
  2cfc75a60347ce6dc6ec6e2bbbbdf587  libgo/go/net/internal/socktest/main_windows_test.go
  7191d08be01ea5c2171a415596ae18e9  libgo/go/net/internal/socktest/switch.go
  d533a96d403af07716cce570e7894e7f  libgo/go/net/internal/socktest/switch_posix.go
  210a4961c356382d8caa578085bdbdad  libgo/go/net/internal/socktest/switch_stub.go
! f5e2be14e840535ee3b2a79ed4272c43  libgo/go/net/internal/socktest/switch_unix.go
  e545fc02b83eb3d301779219574da8e8  libgo/go/net/internal/socktest/switch_windows.go
  793e389ae252b0857053c2153d178f5e  libgo/go/net/internal/socktest/sys_cloexec.go
! 3ab157716994aa4830b4d0e43246db1e  libgo/go/net/internal/socktest/sys_unix.go
  a9793c2001dcdbae6de26c3126bfc146  libgo/go/net/internal/socktest/sys_windows.go
! bfeeaf353ed4318e6567a2e4b64b573c  libgo/go/net/ip.go
  fea86d1cbbdea760b8dcf7ea47b934a4  libgo/go/net/ip_test.go
! 998f95960c278185cc6ef75d037c1066  libgo/go/net/iprawsock.go
  5ddf25949204389f7e9f8cf2aafc14bc  libgo/go/net/iprawsock_plan9.go
! 702c73b17e7b2f6bbc81fcd80e2380d2  libgo/go/net/iprawsock_posix.go
  7cd1b291592446506c82c1c52d97bc84  libgo/go/net/iprawsock_test.go
  f0dee4365510b930764c8499fa387b82  libgo/go/net/ipsock.go
! 0e912bdf8bac43fd471a5ea4fdf0a059  libgo/go/net/ipsock_plan9.go
! e73106463a2641ed1ad960c03d87580f  libgo/go/net/ipsock_posix.go
  07e3ace72b261ace00842ec4e545cca4  libgo/go/net/ipsock_test.go
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! 1dc32428198c6df0766452c6dc3038ee  libgo/go/net/mail/message_test.go
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! c9c42a3c6017943f8dbe5123a6d42594  libgo/go/net/net_test.go
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*************** c15f35d8f2d9ef5129c08b325da26f8d  libgo/
*** 74383,74424 ****
  c2f0dcd463ece472ebd0dfd0c3fbdb38  libgo/go/net/parse.go
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! 3f103c6787bc08cbd15f440cef3b7e1f  libgo/go/net/smtp/smtp_test.go
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  8f28ceaeb7fc96f283f045789e8112e5  libgo/go/net/sock_linux.go
  1745a4c17a11526e5b5264cf29f14a19  libgo/go/net/sock_plan9.go
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  586c6c2dbd46b409eaa254d4303aa799  libgo/go/net/sock_windows.go
! 96bc9881350315851af9c52b37f8a07a  libgo/go/net/sockaddr_posix.go
  78e3546c36e076b63f983bb51ef5091f  libgo/go/net/sockopt_aix.go
  c0b5f2c3ce1dce59fee93fcd04d2d6aa  libgo/go/net/sockopt_bsd.go
  4fa5f3d74893806406fe9266c7e8201d  libgo/go/net/sockopt_hurd.go
--- 84604,84645 ----
  c2f0dcd463ece472ebd0dfd0c3fbdb38  libgo/go/net/parse.go
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  3b2ec0b74e493285720eeea9a9bb8961  libgo/go/net/protoconn_test.go
! 9687c28f5dc92a1da123e0e1274acc81  libgo/go/net/rawconn.go
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  ff795877f97b65357aa503243b45d315  libgo/go/net/rpc/jsonrpc/client.go
  8c6fdfad63d6c4d640fbfd035195cf67  libgo/go/net/rpc/jsonrpc/server.go
! 16da175ff093948a388f398205db6672  libgo/go/net/rpc/server.go
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! c3f090ca76294fc08be9c5c634ac5d89  libgo/go/net/server_test.go
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! f81ba586e4253ece86e31f3474b8e65d  libgo/go/net/smtp/smtp_test.go
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  8f28ceaeb7fc96f283f045789e8112e5  libgo/go/net/sock_linux.go
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! a8cac3be8de9c88ef61a9f81d2c0a3cb  libgo/go/net/sockaddr_posix.go
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  c0b5f2c3ce1dce59fee93fcd04d2d6aa  libgo/go/net/sockopt_bsd.go
  4fa5f3d74893806406fe9266c7e8201d  libgo/go/net/sockopt_hurd.go
*************** b3d3070c05591ca14e669733d519a05f  libgo/
*** 74426,74459 ****
  144c11ac9965aac68530e61d45bc93d7  libgo/go/net/sockopt_plan9.go
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! d8d90d4960726d5e287ab57f85d1827d  libgo/go/net/tcpsockopt_darwin.go
! c907a136c4e9ce930a49a94734c6e85c  libgo/go/net/tcpsockopt_dragonfly.go
  dacd4b8cac046d51733a60b7993760bc  libgo/go/net/tcpsockopt_openbsd.go
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! bf6884301f0e854b948fc7a1059af9b0  libgo/go/net/tcpsockopt_solaris.go
! c0ff3406a0cd7b19cd2ca0f24d5145b6  libgo/go/net/tcpsockopt_stub.go
! aac38ecc0ca19ad383c4f2d0365a8513  libgo/go/net/tcpsockopt_unix.go
! 921eb4a886027d3f80f8e0fae90ab71d  libgo/go/net/tcpsockopt_windows.go
  f7acb47d9b57c691e05f51045394b28a  libgo/go/net/testdata/case-hosts
  15f42fa12b09b82e46f6c34644fca530  libgo/go/net/testdata/domain-resolv.conf
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  4ca5ca6c6cf9c8266e4abc3d86130b88  libgo/go/net/testdata/hosts
  2ed3fc440e799eb489bd3308adff0e57  libgo/go/net/testdata/igmp
  4ffe1a59695f13c8a17af741b859aa19  libgo/go/net/testdata/igmp6
--- 84647,84681 ----
  144c11ac9965aac68530e61d45bc93d7  libgo/go/net/sockopt_plan9.go
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  48590a90b3d81d9c93872de1f1d83f9c  libgo/go/net/sockoptip_bsdvar.go
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  af9eda9f2808fabb678e4f42d90c4a07  libgo/go/net/sockoptip_posix.go
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  bcaaea0fe67ed1bc11479f252d3b02ff  libgo/go/net/splice_linux.go
  93c509c784d56231a1e03612d699f559  libgo/go/net/splice_stub.go
! b77301d9d7468f375e2a3cdc6772a8c1  libgo/go/net/splice_test.go
! 0c70ea9eeeabb207e600ba8e5af48117  libgo/go/net/sys_cloexec.go
! 220a5518ac3ade85bca414ae4a215b6b  libgo/go/net/tcpsock.go
! 590c0b4812a9fca1e6b798b2ac528eb2  libgo/go/net/tcpsock_plan9.go
! 37848e5543b5b61e84499ad0bb070786  libgo/go/net/tcpsock_posix.go
! 19653ee824e3158db4d0566dd49d2653  libgo/go/net/tcpsock_test.go
  e0523ac7f05df4c5d316c09da7fd8ee1  libgo/go/net/tcpsock_unix_test.go
! b4c87ff0d2bd706fcee868a0365d87e2  libgo/go/net/tcpsockopt_darwin.go
! bac7765c9de9a68ea328de1d96e6093c  libgo/go/net/tcpsockopt_dragonfly.go
  dacd4b8cac046d51733a60b7993760bc  libgo/go/net/tcpsockopt_openbsd.go
  d2149b637c507484fa56de79cf9a24a9  libgo/go/net/tcpsockopt_plan9.go
  a4c6626210a2f0d52ebbdf9c993ccefe  libgo/go/net/tcpsockopt_posix.go
! e526323509d64c80d7cddd8d5794b86b  libgo/go/net/tcpsockopt_solaris.go
! 8c63ac01a3561121f603db37cb29a6d7  libgo/go/net/tcpsockopt_stub.go
! 6cc9bb6abba17bc26a9eaa4c9af3d3fc  libgo/go/net/tcpsockopt_unix.go
! ff96bd74553ff3df0429fdc30e0bb074  libgo/go/net/tcpsockopt_windows.go
  f7acb47d9b57c691e05f51045394b28a  libgo/go/net/testdata/case-hosts
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  e7c1c6cf342a50bccdd8fc3f3633d48e  libgo/go/net/testdata/empty-resolv.conf
+ 0864dcac1817adb41b2907140bff3068  libgo/go/net/testdata/freebsd-usevc-resolv.conf
  4ca5ca6c6cf9c8266e4abc3d86130b88  libgo/go/net/testdata/hosts
  2ed3fc440e799eb489bd3308adff0e57  libgo/go/net/testdata/igmp
  4ffe1a59695f13c8a17af741b859aa19  libgo/go/net/testdata/igmp6
*************** e7c1c6cf342a50bccdd8fc3f3633d48e  libgo/
*** 74461,74498 ****
  454806711db2c79c01eddf2a14455e89  libgo/go/net/testdata/ipv4-hosts
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  ab0cb6078f2ef064ab47539f886f8271  libgo/go/net/testdata/large-ndots-resolv.conf
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  25c14e123980a1cfe92bd96e300b9cdc  libgo/go/net/testdata/openbsd-resolv.conf
  a5ec50dad8232b18a7a8390ee2ae60f1  libgo/go/net/testdata/resolv.conf
  26e97eef9c2ac45837fa954228e9d8f1  libgo/go/net/testdata/search-resolv.conf
  1e50713af550a622ccac96715544e530  libgo/go/net/testdata/singleline-hosts
! 9dbc8afb7a2a7b31e934094c4bedfc2a  libgo/go/net/textproto/header.go
  1943646963304a31dcf10d5a53d39a9a  libgo/go/net/textproto/pipeline.go
! b0959174ba8cf55ace4d01a73bbf3e1b  libgo/go/net/textproto/reader.go
! 5a514f54f95b4ac94444c0e49ea6e68a  libgo/go/net/textproto/reader_test.go
  4129d0642056114957236c93c22da284  libgo/go/net/textproto/textproto.go
! 2a8a6cb2b7a73465b2c75a8c37f3f8d6  libgo/go/net/textproto/writer.go
! 1071ff120c2e9ff6f1f7416732593705  libgo/go/net/textproto/writer_test.go
! 3105948fb2443b9813acccaf4048c0ee  libgo/go/net/timeout_test.go
! 51915aa7179401cc5d063e37fb6f4b48  libgo/go/net/udpsock.go
! 4d8b5887bdef29dbd04c151e2cef7f5d  libgo/go/net/udpsock_plan9.go
! 1ca693f2711eadf9601689cab90dc4b1  libgo/go/net/udpsock_plan9_test.go
! 1c245fd7560ff910c1c934da86b4a6af  libgo/go/net/udpsock_posix.go
! be0430bf4e69149e7e6b7878bc79c0ef  libgo/go/net/udpsock_test.go
! 380b7c486cbc1b64771a924c0a943395  libgo/go/net/unixsock.go
  3e9fbd3d3c9a4def683ac7883c6ee147  libgo/go/net/unixsock_linux_test.go
  781514566fecf6fcd07ae118be60fa47  libgo/go/net/unixsock_plan9.go
! 940448ca656c377e279fc6d3c2f481e7  libgo/go/net/unixsock_posix.go
! 48899c5e42fc015457e1c156a4711878  libgo/go/net/unixsock_test.go
  199a4e85dfa65f1cc5901d3b04f2f6dd  libgo/go/net/unixsock_windows_test.go
! 49a0bf5eb696541da0cabc93da81079f  libgo/go/net/url/url.go
! 67a2ec1075bfbd5181882cdbc920cf86  libgo/go/net/url/url_test.go
  01c834d311c610d1b73b61b2d9f41f3e  libgo/go/net/write_unix_test.go
  7daef506a7851e250217b12230bf8f8e  libgo/go/net/writev_test.go
  7f8311d51134aeee941d582c770e68e9  libgo/go/net/writev_unix.go
! 66ab26acccc3ba5e7537a9ff11f07d94  libgo/go/os/dir.go
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--- 84683,84724 ----
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*************** d3cfe6799a6a88601cd99a34802996f0  libgo/
*** 74501,74604 ****
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--- 84727,84832 ----
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! f6a0f852e64d6b7cacbdeafc18ee39be  libgo/go/os/path_unix.go
  07eddf0ade79736627b79606534072a3  libgo/go/os/path_windows.go
! 89126173687e945f47ee21bafadf1566  libgo/go/os/path_windows_test.go
  6c80d6c0ac41d5aadf6259521395f543  libgo/go/os/pipe2_bsd.go
! 3a1c4591348f9a20d06dd0cbb456f071  libgo/go/os/pipe_bsd.go
  62e073cfad6b7be1fa723966438a32a6  libgo/go/os/pipe_glibc.go
! 7026f34265856bddb389e1368bf02af9  libgo/go/os/pipe_test.go
! 48e4869aab8b160cc1a0dbdce15df809  libgo/go/os/proc.go
  ecfb560f067c5e85c62904e8993ebd20  libgo/go/os/rawconn.go
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*************** a984b4be3dd307b894d0192e7df2413e  libgo/
*** 74609,74677 ****
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--- 84837,84906 ----
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  44a4773a582d6477197072e1b45cc367  libgo/go/regexp/testdata/README
*************** ce4d01bc256482203dedba6c2e6827df  libgo/
*** 74681,74896 ****
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--- 84910,85164 ----
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*************** f19e84cec09c98ef97a5220583b92976  libgo/
*** 74898,74904 ****
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  4aaaef9d2cf35e4eabd0f3ee96f907bb  libgo/go/runtime/testdata/testprog/syscalls.go
--- 85166,85174 ----
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*************** fded806b73aca60b027a84870a6c5d07  libgo/
*** 74906,74931 ****
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--- 85176,85203 ----
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*************** f8fc0effb485a49c8a192369654d9fea  libgo/
*** 74942,74968 ****
  5af43c8e3a18016d151097514c73ce7b  libgo/go/runtime/testdata/testprogcxx/traceback.go
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--- 85214,85243 ----
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*************** b89a87e51c9a8363066de856ef127981  libgo/
*** 74973,75023 ****
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--- 85248,85301 ----
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! 67fa00fb82b08eecf932cf68191de714  libgo/go/strings/builder.go
! 34746af114e8c97e99d0950515f46af6  libgo/go/strings/builder_test.go
  5fc7909f4a161bb1377a9841315a6285  libgo/go/strings/compare.go
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! a138cc57ced2c51385dc7e09482735b2  libgo/go/strings/replace.go
  3f8a61dbea1b3788851a32c3836f266c  libgo/go/strings/replace_test.go
  5be401c63806185ee237c0bb137c44b4  libgo/go/strings/search.go
  4244a4944e6adcdd4876875c45b9d73a  libgo/go/strings/search_test.go
! 2ab5a715bc0b738d66fd068bac478879  libgo/go/strings/strings.go
! d025bbd26120132714ba47c503acfcff  libgo/go/strings/strings_test.go
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! ea97f3f93fbc00815ab2a9b08e06af1b  libgo/go/sync/atomic/atomic_test.go
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  81c084116d0d8145dde5ce2ffbc6ac3b  libgo/go/sync/atomic/value.go
*************** bce2e5ddfc7d396f523e03e136b571fc  libgo/
*** 75026,75085 ****
  5c75ed9eab887083e7cac13e1ceae8da  libgo/go/sync/cond_test.go
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  2c3240d310641137172167ba79ac92de  libgo/go/sync/once_test.go
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! 2fa07e945fcf4b416d0bf5f9bb5aafc1  libgo/go/syscall/exec_unix.go
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! 5b3d254c30ae7fff452e1e41f6da8c5e  libgo/go/syscall/exec_windows.go
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! e458695bacbb4841268caa237a938fb3  libgo/go/syscall/export_unix_test.go
  c0c22c4f29e8103f803487e806626353  libgo/go/syscall/flock_darwin.go
  ceccc326b879cdcf064237f4d3ca0195  libgo/go/syscall/forkpipe.go
  450142be47b9f19cc8df995ce851361b  libgo/go/syscall/forkpipe2.go
! 48bac81724ad4e7b05423f485036ffa7  libgo/go/syscall/fs_js.go
! ea3c78199271be44d208fb023775d967  libgo/go/syscall/js/func.go
! db884b2b9742ff9d668ca3cdfddbd1d0  libgo/go/syscall/js/js.go
! 12fb6815c85db0678db87fa42c97e87b  libgo/go/syscall/js/js_test.go
! 65f7b50b9806d4e3fc29f72d7ffe7943  libgo/go/syscall/js/typedarray.go
  c9ea292c219f47e862a684991abd2bc0  libgo/go/syscall/libcall_aix.go
  d346327ce79c4e4bc1e5b21fe71cec93  libgo/go/syscall/libcall_bsd.go
  8d3d53322b2783b898c415ba37a16dd9  libgo/go/syscall/libcall_bsd_largefile.go
--- 85304,85365 ----
  5c75ed9eab887083e7cac13e1ceae8da  libgo/go/sync/cond_test.go
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! 5d9408fdbfc3e7d6d198b46c07064d94  libgo/go/sync/export_test.go
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! 9b53f4408d7ac3aa4e730ad81e55a742  libgo/go/sync/once.go
  2c3240d310641137172167ba79ac92de  libgo/go/sync/once_test.go
! 3d4f99144a02673383f3f89f68775837  libgo/go/sync/pool.go
! 70ce4bae1704966ee184600d3dbc3996  libgo/go/sync/pool_test.go
! 3f6493d1ed39bcae070d15f4f02eae27  libgo/go/sync/poolqueue.go
! 116eacc5f220e74e20e42ea2fa281ea1  libgo/go/sync/runtime.go
! 72ceac3d1895eef5f4e9ed1a4181478e  libgo/go/sync/runtime_sema_test.go
! 3e394e7469d230893d4c4dc31dd9c937  libgo/go/sync/rwmutex.go
  1eaba9dbfbc3a8734f20ea74d3e57a86  libgo/go/sync/rwmutex_test.go
! ecc0f5669d668369b39ae3fc191e93e5  libgo/go/sync/waitgroup.go
! 0565e2113baf9c59f317d6f38670f9e4  libgo/go/sync/waitgroup_test.go
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! a00662e475fe9d459295430953886ad2  libgo/go/syscall/dirent.go
! 9e5138123906ac5220391ac51afb6b24  libgo/go/syscall/dirent_test.go
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! 65de915c2e2d8b1485b132ffeedd00f9  libgo/go/syscall/env_plan9.go
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! 5f6b5abccbf7bca2b8b87205c079a730  libgo/go/syscall/exec_unix.go
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! 2d81875a29915e82bef242671e870cdc  libgo/go/syscall/exec_windows.go
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! 0c6e0af447ef0ad70b23147af426ae22  libgo/go/syscall/export_unix_test.go
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! b2c9671cd8ac0dfd578b8c8ea54157bd  libgo/go/syscall/fs_js.go
! da0fd45fa88a61361d696e7146bed4e1  libgo/go/syscall/getdirentries_test.go
! 3029f758f3b668d233e4f073af7ba3eb  libgo/go/syscall/js/export_test.go
! 185f8f2f139857ef20f58807230178b9  libgo/go/syscall/js/func.go
! 371ce861618bacee9ea0c4db57cb751a  libgo/go/syscall/js/js.go
! 1bb116f21e74a3c555bfbaca54d3d30a  libgo/go/syscall/js/js_test.go
  c9ea292c219f47e862a684991abd2bc0  libgo/go/syscall/libcall_aix.go
  d346327ce79c4e4bc1e5b21fe71cec93  libgo/go/syscall/libcall_bsd.go
  8d3d53322b2783b898c415ba37a16dd9  libgo/go/syscall/libcall_bsd_largefile.go
*************** db8674dc2f974e11a4dbb83d3538ef72  libgo/
*** 75110,75141 ****
  4a419aa6ee84d47246c4eee7e7e11188  libgo/go/syscall/libcall_uname.go
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  73dcd12ca6934aebc04c3e66ec372805  libgo/go/syscall/route_freebsd_32bit.go
! b1b65b8e87aa3666fcaf807a9022009f  libgo/go/syscall/route_freebsd_64bit.go
  df8a551c956bc3737301c2d5a3700579  libgo/go/syscall/route_netbsd.go
  d13db977a1f8b505c859367325c65687  libgo/go/syscall/route_openbsd.go
! 562fb5f45a9fdc49d211ae33cd0d7c6e  libgo/go/syscall/security_windows.go
  683a3640fbaa7c9ef0458b2f809d3265  libgo/go/syscall/setuidgid_32_linux.go
  9e91781375f8f01e8e474c1d4736f37d  libgo/go/syscall/setuidgid_linux.go
  301318f4cf3fbe695dacff8c8aaa3390  libgo/go/syscall/signame.c
  f6198757bf750b2e86c9f7f4920828a9  libgo/go/syscall/sleep_rtems.go
  b30e4fd94e74d91b5252cfd8eccad3cf  libgo/go/syscall/sleep_select.go
! e939aba3b7f84fd1a7a43effa86f2ae6  libgo/go/syscall/sockcmsg_linux.go
! e0a86dca0551f1d4201cf139c8e8d607  libgo/go/syscall/sockcmsg_unix.go
! ea4885da75bbc620ba5e0be4cf264c3b  libgo/go/syscall/socket.go
  c43e9f9fd83b7f82926c7fdab24fc53d  libgo/go/syscall/socket_aix.go
  9792ba4161a5a5391402b9888d37ad33  libgo/go/syscall/socket_bsd.go
  91b198a36357fdf64b728fcc898b62b0  libgo/go/syscall/socket_irix.go
--- 85390,85424 ----
  4a419aa6ee84d47246c4eee7e7e11188  libgo/go/syscall/libcall_uname.go
  1f3faef7b5f08c81787d0faa2588cec3  libgo/go/syscall/libcall_wait4.go
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  84caaf6601fe2492731e0aaa08d5dae8  libgo/go/syscall/net.go
! d04d2e357aa9727921aae85d0c76a7e1  libgo/go/syscall/net_js.go
! 2c7ce5b469b485c93b8b0ff3f41ab578  libgo/go/syscall/netlink_linux.go
  6a6dcc85d1a2d05d3e3d1174dcf8066a  libgo/go/syscall/pwd_plan9.go
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  73dcd12ca6934aebc04c3e66ec372805  libgo/go/syscall/route_freebsd_32bit.go
! 1fa9a87313d79c057ca1b5a730eefa05  libgo/go/syscall/route_freebsd_64bit.go
  df8a551c956bc3737301c2d5a3700579  libgo/go/syscall/route_netbsd.go
  d13db977a1f8b505c859367325c65687  libgo/go/syscall/route_openbsd.go
! c2eb1da23c04de0308406b570aeb860b  libgo/go/syscall/security_windows.go
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  f6198757bf750b2e86c9f7f4920828a9  libgo/go/syscall/sleep_rtems.go
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! 930ac3cd3c8a42dd414b1a24125658e8  libgo/go/syscall/sock_cloexec_linux.go
! 1f16c7eba73e816c7cd9458eb1b017ea  libgo/go/syscall/sockcmsg_dragonfly.go
! ac6ea144ae2aa14415fe0681812fb135  libgo/go/syscall/sockcmsg_linux.go
! 2c7a8993930231b05be90691c1c4713f  libgo/go/syscall/sockcmsg_unix.go
! 948bc68b562ddca4355f35348f1936f3  libgo/go/syscall/sockcmsg_unix_other.go
! b7f206a5ea4e302476061105275f8c6c  libgo/go/syscall/socket.go
  c43e9f9fd83b7f82926c7fdab24fc53d  libgo/go/syscall/socket_aix.go
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  91b198a36357fdf64b728fcc898b62b0  libgo/go/syscall/socket_irix.go
*************** a32c8f38aef86961c1bfd750e18d94a1  libgo/
*** 75146,75252 ****
  57ed75694a025e8553fe2ba1de10d658  libgo/go/syscall/socket_solaris.go
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  21b5a484bcf7f42415dfc0d1c2da3be5  libgo/go/syscall/str.go
! 60963acdabc6b7223c4cc93dbb91995d  libgo/go/syscall/syscall.go
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! 7beb5060a486bb38353f27f6cfb9b956  libgo/go/syscall/syscall_dragonfly.go
! 0bd8244879fc967baad61ff1265ac449  libgo/go/syscall/syscall_errno.go
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! 13a0c463e0debfb79345e7322bf9a52f  libgo/go/syscall/syscall_test.go
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! c2f0ea9929dee5f41764a77df5daad48  libgo/go/syscall/syscall_unix_test.go
! 1751515dd92dab6d237e103bbd39cfe9  libgo/go/syscall/tables_nacljs.go
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! e4afd16a3e3784a364fc503b814a3114  libgo/go/text/scanner/scanner.go
! 5c297653b6a630d4fade552ffd11ddee  libgo/go/text/scanner/scanner_test.go
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! ae39cd3ba0adc13a4185b03700dd74a5  libgo/go/text/tabwriter/tabwriter.go
! e928a237faa321aadcb36367cf91cda6  libgo/go/text/tabwriter/tabwriter_test.go
! da1ab8cc48d54a5c4b2b08851e767b17  libgo/go/text/template/doc.go
! eb9d51d3a7a0de8cfbfa3f2e35c50a47  libgo/go/text/template/exec.go
! 0525d9255ea5c57782e160bbb6f0a900  libgo/go/text/template/exec_test.go
! c5176ed0e67c8dcaa37bbdcb534ae754  libgo/go/text/template/funcs.go
! 072bb470b946c54a0acd093d622047a1  libgo/go/text/template/helper.go
  b252869c9182047e04a09120c453ba53  libgo/go/text/template/multi_test.go
  f3066faeb273231ca51b072c3b55aa4e  libgo/go/text/template/option.go
! b58e4c0e7625e8d257927a1ef5c1e059  libgo/go/text/template/parse/lex.go
! 412c8a73802e02a4f823c5764e522664  libgo/go/text/template/parse/lex_test.go
! 638fd6e16527bc804f6527bf73e101a6  libgo/go/text/template/parse/node.go
! dd5037905b802bda87b9cf05aec38886  libgo/go/text/template/parse/parse.go
! c6d2ab7136da0d2adf055ade5645e7d9  libgo/go/text/template/parse/parse_test.go
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  d6b6ff8eb45b5d3c6559c70664f2f9f3  libgo/go/text/template/testdata/file1.tmpl
  30ae547a79cfdc1dc838a5a0d9ed8198  libgo/go/text/template/testdata/file2.tmpl
  3bb3b4e20658955000386362214b8246  libgo/go/text/template/testdata/tmpl1.tmpl
  1fd8ef440f5fd08e0117c3c00500294b  libgo/go/text/template/testdata/tmpl2.tmpl
! d3ffe8976edc7b4e9e32cecfbfc9f1a5  libgo/go/time/example_test.go
  f7096f0422dcb77d03e56eb3fb2f2f12  libgo/go/time/export_android_test.go
! bdd9eab2d4720706fe3c59d8691d3fa1  libgo/go/time/export_test.go
! bb2815f3dbd126d011965cd95c15cab8  libgo/go/time/format.go
! 8daccca0c6507681e3d40a2a7dab2bba  libgo/go/time/format_test.go
! 1ffd3999f39cd30fc66c63641ce8c8c3  libgo/go/time/genzabbrs.go
! f7e448f975cded4ba14c71bda6cb183c  libgo/go/time/internal_test.go
  ef4b3752a38e904365f7b901d1a78aa4  libgo/go/time/mono_test.go
! 95aa8356dcf237ddd5cb5a3783fb6970  libgo/go/time/sleep.go
! d538bdc62b75bb0437e0de49c051ad8b  libgo/go/time/sleep_test.go
  5dbbfa399e9a3b3f215b5eb60054f52f  libgo/go/time/sys_plan9.go
! db08086e9c08a7aed21895fc087bda0c  libgo/go/time/sys_unix.go
  bb0750db9ecbdac55664d532e548111d  libgo/go/time/sys_windows.go
  b6436cc0dd1dccad013ebe6d2dca3e8a  libgo/go/time/tick.go
! 7d5550c08219b62d2eca6ca974b02819  libgo/go/time/tick_test.go
! 640693423cbec8631007e15ce3103bb4  libgo/go/time/time.go
! cf44189eec1b1e884932d5ce272d1865  libgo/go/time/time_test.go
! 2fcd325fca83ff7ea29fe92d76d50a51  libgo/go/time/zoneinfo.go
! c2b19908f9e3e05eab498152d402a82e  libgo/go/time/zoneinfo_abbrs_windows.go
  d4a1098abc233868e45ed49030f3f189  libgo/go/time/zoneinfo_android.go
  805c52a6dfd07be8e0d5c805ef8c0180  libgo/go/time/zoneinfo_android_test.go
! a60ccce0e11714e82dcd2296ae340de9  libgo/go/time/zoneinfo_ios.go
  d3966960ae0149012d9a7e4ed8e09343  libgo/go/time/zoneinfo_js.go
  3d248aad631a78cbd82f8b2106d19181  libgo/go/time/zoneinfo_plan9.go
! 90716602e405e718cc8980afcc04a629  libgo/go/time/zoneinfo_read.go
! 714a0aa204c2e09f945b1c23d6e3b5c1  libgo/go/time/zoneinfo_test.go
! fd6ba1be4438a25577828a6d6a595d16  libgo/go/time/zoneinfo_unix.go
  7a7152396cbf0954f24e857050b53781  libgo/go/time/zoneinfo_windows.go
  20462663527bbc31aa3bdf3fba3f978a  libgo/go/unicode/casetables.go
  06fbe90f41e9b74f0bd79e5303d67d2d  libgo/go/unicode/digit.go
--- 85429,85548 ----
  57ed75694a025e8553fe2ba1de10d658  libgo/go/syscall/socket_solaris.go
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  21b5a484bcf7f42415dfc0d1c2da3be5  libgo/go/syscall/str.go
! 53a21a130b7579a6658d047b88480f53  libgo/go/syscall/syscall.go
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  ba4c03de9f8e4f01b7e68cd654298b1b  libgo/go/syscall/syscall_darwin.go
! 8abaea48f434c80b6330ce22fbdbb1ce  libgo/go/syscall/syscall_dragonfly.go
! 4c555e514b94acb1605163db1fb21961  libgo/go/syscall/syscall_errno.go
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! e61ef5d6d57ba58f408157c9c14626e2  libgo/go/testing/quick/quick_test.go
! 967ff6b926fb077a58a312088276d6f5  libgo/go/testing/run_example.go
! 8be9f0015491732ab42977afc6140f6e  libgo/go/testing/run_example_js.go
! ff42570fb40153599b352a2bfca0bb6b  libgo/go/testing/sub_test.go
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! aa9987f61437c585e160b2482b9c4f7f  libgo/go/text/tabwriter/tabwriter.go
! f79a232980197afa51e21a79f2961fcb  libgo/go/text/tabwriter/tabwriter_test.go
! 5716ea43b3e103a6040895a7877c0205  libgo/go/text/template/doc.go
! 40a3ea2ec0be48104f7a5863bcc77c1a  libgo/go/text/template/exec.go
! 41ee934c7297d4c4c26e438bb27f4cd1  libgo/go/text/template/exec_test.go
! 629e936fd700fdfe82293de4e2c649e9  libgo/go/text/template/funcs.go
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! cb680ce300e5cfbf681f4524403ce17e  libgo/go/text/template/parse/lex.go
! ddbc9337581fac3a760fe358b8361c6b  libgo/go/text/template/parse/lex_test.go
! 4162d83b5f5837e5c559fbd396db2905  libgo/go/text/template/parse/node.go
! 71526feb2fc6caac586c81b52b412be3  libgo/go/text/template/parse/parse.go
! 9e0bcb64dbb03696508f634b4909c9c7  libgo/go/text/template/parse/parse_test.go
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  3bb3b4e20658955000386362214b8246  libgo/go/text/template/testdata/tmpl1.tmpl
  1fd8ef440f5fd08e0117c3c00500294b  libgo/go/text/template/testdata/tmpl2.tmpl
! 166a70ab24dee0bc3bb361f562b35908  libgo/go/time/example_test.go
  f7096f0422dcb77d03e56eb3fb2f2f12  libgo/go/time/export_android_test.go
! 25bf2adb2e30c72725277640e05dddca  libgo/go/time/export_test.go
! f7ce6fbc026a2c45ce9f89479efd5b7b  libgo/go/time/format.go
! db680dcbb580739fee1a718ca828cdd6  libgo/go/time/format_test.go
! d7e1888f177b024af9524d6b7884221a  libgo/go/time/genzabbrs.go
! c6110914f3a4b3a3bdfcd03195a840fe  libgo/go/time/internal_test.go
  ef4b3752a38e904365f7b901d1a78aa4  libgo/go/time/mono_test.go
! 21635bbf3f637842803cb8e3db4e9ac3  libgo/go/time/sleep.go
! c4f5c2741832245fff1511beed1c9880  libgo/go/time/sleep_test.go
  5dbbfa399e9a3b3f215b5eb60054f52f  libgo/go/time/sys_plan9.go
! 383a565b424663f1f701dc1918dbd84b  libgo/go/time/sys_unix.go
  bb0750db9ecbdac55664d532e548111d  libgo/go/time/sys_windows.go
  b6436cc0dd1dccad013ebe6d2dca3e8a  libgo/go/time/tick.go
! fa7f47478f080d2689ec15cdc26902ab  libgo/go/time/tick_test.go
! 4dafc5a222f906b80dc43d54b6351a89  libgo/go/time/time.go
! c67a39be1a415c831cdaf64f8c78dd45  libgo/go/time/time_test.go
! 1a0831fdbd8e52d65e996b38b9b10574  libgo/go/time/zoneinfo.go
! f4b087362ae55fe6e4011d8bf2d16d4f  libgo/go/time/zoneinfo_abbrs_windows.go
  d4a1098abc233868e45ed49030f3f189  libgo/go/time/zoneinfo_android.go
  805c52a6dfd07be8e0d5c805ef8c0180  libgo/go/time/zoneinfo_android_test.go
! fc22380739f9ba9597075d396b4f01b8  libgo/go/time/zoneinfo_ios.go
  d3966960ae0149012d9a7e4ed8e09343  libgo/go/time/zoneinfo_js.go
  3d248aad631a78cbd82f8b2106d19181  libgo/go/time/zoneinfo_plan9.go
! e468ebe513462d1d6ca6947addb2d006  libgo/go/time/zoneinfo_read.go
! fcf52a3f66678c086e4820093c474181  libgo/go/time/zoneinfo_test.go
! 729bbdf0f74430fc35a0b01453fd66f2  libgo/go/time/zoneinfo_unix.go
  7a7152396cbf0954f24e857050b53781  libgo/go/time/zoneinfo_windows.go
  20462663527bbc31aa3bdf3fba3f978a  libgo/go/unicode/casetables.go
  06fbe90f41e9b74f0bd79e5303d67d2d  libgo/go/unicode/digit.go
*************** fd6ba1be4438a25577828a6d6a595d16  libgo/
*** 75254,75879 ****
  82119e53d20f26b8a56ae2944e7663d5  libgo/go/unicode/example_test.go
  f5a0b22c681da7633cf7c31a08f3eb6b  libgo/go/unicode/graphic.go
  f21fa9794cb8a8f6a8340fd13ebd9029  libgo/go/unicode/graphic_test.go
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*************** a255ea680f411888de34b07ee4819455  libgom
*** 75941,75951 ****
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*************** e05799ca0fb925e4de120a002da662ed  libgom
*** 75993,75998 ****
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*************** ea7582b52459bee267a5af375cca9630  libgom
*** 76006,76011 ****
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*************** a7edc8ba5a137d69a617a4d3675b5b01  libgom
*** 76036,76045 ****
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*************** ee0115a370a5b6a9e6990b3d15bdd431  libgom
*** 76128,76133 ****
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*************** bf98adf4221cad6e7da7bfc5a26395d4  libgom
*** 76193,76200 ****
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--- 86460,86468 ----
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*************** dfaa61e4059d184085b04f03c6c34868  libgom
*** 76392,76400 ****
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*************** fbaa429fdd38498866cb27eca67eb819  libgom
*** 76427,76437 ****
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*************** bec2e246a29d581f6ebc16d2674347cb  libgom
*** 76447,76452 ****
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*************** a2fe1187196581f584947961e875b325  libgom
*** 76467,76473 ****
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--- 86761,86767 ----
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*************** b100c329df163acfa97656a24a5c1bb9  libgom
*** 76477,76483 ****
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*************** bccccd438324ee9e479d4e3a0bdb6d81  libgom
*** 76497,76502 ****
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*************** a9b2ad991bd60cd4cd6ef4a68071bee6  libgom
*** 76505,76516 ****
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*************** edfe0cd950eb6d29688ffe6e38c87d10  libgom
*** 76527,76548 ****
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--- 86824,86845 ----
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*************** bd04341d551c4748375396181adc8677  libgom
*** 76556,76562 ****
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*************** c41b35e438ba2e9b553b7a8b4ab48ae1  libgom
*** 76567,76810 ****
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*************** bc89329871a4063322c6c6a75033c327  libgom
*** 76815,76821 ****
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--- 87132,87138 ----
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*************** bfac6d74739b95deba27861d2be18215  libgom
*** 76840,76848 ****
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--- 87157,87169 ----
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*************** c3cc3d873e54843cfbb40f4c262b6b98  libgom
*** 76861,76878 ****
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--- 87182,87225 ----
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*************** a4310590c76fb5671abb7e599593076d  libgom
*** 76880,76889 ****
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--- 87227,87236 ----
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*************** a0826470352b3d00ca5ad532634a1535  libgom
*** 76894,76914 ****
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--- 87241,87275 ----
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*************** ef7560d8ddc45ef6327ec11fe016d337  libgom
*** 76917,76922 ****
--- 87278,87285 ----
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*************** e1b79fe7d88ce8a97093e7e691d677be  libgom
*** 76970,76995 ****
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*************** f64d3ef8bf6b155a353fdf363b887b62  libgom
*** 77002,77016 ****
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--- 87358,87369 ----
*************** bea7f634308d0f614e4ef988346104fa  libgom
*** 77042,77048 ****
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*************** ec819f812621c258b1eeb4a156ec1f42  libgom
*** 77052,77092 ****
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--- 87405,87451 ----
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*************** f4b077ed86c2694e71f3b739b8acc39a  libgom
*** 77100,77105 ****
--- 87459,87465 ----
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*************** d317991e6bfc08636d3f79a7be1fc671  libgom
*** 77115,77120 ****
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*************** ad168cfedf92ebb1f18d0b4e037fec4c  libgom
*** 77135,77151 ****
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*************** e65c44041c15898765a99f6782a191d2  libgom
*** 77165,77186 ****
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--- 87559,87588 ----
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*************** ce55f5feea92469a28e9d13fb2a2835d  libgom
*** 77192,77231 ****
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*************** a099f8b746cc1ce623241a11dce9e31f  libgom
*** 77233,77264 ****
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--- 87803,88022 ----
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*************** b4e503ecfdccc9f13da8f73eeb6f23a9  libitm
*** 77603,77673 ****
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*************** ab8a94519bfb382c40efaf24609f813a  liboff
*** 77689,77698 ****
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--- 88128,88137 ----
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*************** b1def68202639bd452fb59aea3371fe4  liboff
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--- 88189,88257 ----
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*************** f9fb574f0baa909bf159bb8d4823ef96  libpho
*** 77826,77844 ****
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--- 88266,88286 ----
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*************** d45630fa4eae2334c1017e90da6181b4  libpho
*** 77846,77851 ****
--- 88288,88294 ----
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*************** aebec2abbff9264fe5fb8fe7f0742f3e  libpho
*** 77856,77880 ****
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--- 88299,88325 ----
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*************** d63865d7d79d1b19c39998cc5aeab177  libpho
*** 77882,77970 ****
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--- 88327,88426 ----
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*************** c3229aa87b4f60c3d6fd21347ffa2426  libpho
*** 78003,78009 ****
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--- 88459,88465 ----
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*************** b83b22c6c057175ba37f39a4ce88767d  libpho
*** 78136,78142 ****
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--- 88592,88598 ----
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*************** d6b7c67683234af6a273a3d4932e52c0  libpho
*** 78146,78184 ****
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--- 88602,88639 ----
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*************** f151c72274ebba5d0c7e154de741bc13  libpho
*** 78191,78202 ****
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--- 88646,88657 ----
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*************** cb673fe348c18d72ce4a2757adfc228b  libpho
*** 78249,78265 ****
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--- 88704,88720 ----
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*************** bea08d206672098f5b66b07740dbb497  libpho
*** 78268,78280 ****
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--- 88723,88735 ----
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*************** dfc19eabde984f92952cef4aa53f2e8a  libpho
*** 78319,78325 ****
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--- 88774,88780 ----
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*************** f36ecd6944cbf2a1b92c449a33839d11  libpho
*** 78358,78364 ****
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--- 88813,88819 ----
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! 2fa0f3370dec50995de358441506af9d  libphobos/src/std/math.d
  d64e7c6f9f940e7d7f14d7d36c358989  libphobos/src/std/mathspecial.d
  67828c841f9f6ada962fea66bb268d33  libphobos/src/std/meta.d
  0399473cfd9632b309d72c0040489531  libphobos/src/std/mmfile.d
*************** fb2ab68236e21bf3840a53b15043cac4  libpho
*** 78372,78378 ****
  592b96acd85b7ae34760c56d2e1af9f7  libphobos/src/std/random.d
  1d5f5bfe4477f509753c7242be1c9583  libphobos/src/std/range/interfaces.d
  8d10dd10b03c425714911f6873b9493a  libphobos/src/std/range/package.d
! bbb9f150390306da621525c277866fc1  libphobos/src/std/range/primitives.d
  f1c1a6b3c7a2ae3529faf5dd24fa3837  libphobos/src/std/regex/internal/backtracking.d
  26a9d95cdcd55fa4d7006787f114bee9  libphobos/src/std/regex/internal/generator.d
  62bc465827acb96232b4132a60f05a36  libphobos/src/std/regex/internal/ir.d
--- 88827,88833 ----
  592b96acd85b7ae34760c56d2e1af9f7  libphobos/src/std/random.d
  1d5f5bfe4477f509753c7242be1c9583  libphobos/src/std/range/interfaces.d
  8d10dd10b03c425714911f6873b9493a  libphobos/src/std/range/package.d
! 977bc68925d2e5a24972dfec11d6d245  libphobos/src/std/range/primitives.d
  f1c1a6b3c7a2ae3529faf5dd24fa3837  libphobos/src/std/regex/internal/backtracking.d
  26a9d95cdcd55fa4d7006787f114bee9  libphobos/src/std/regex/internal/generator.d
  62bc465827acb96232b4132a60f05a36  libphobos/src/std/regex/internal/ir.d
*************** b32344931154c0949d91ea5977b128e8  libpho
*** 78382,78390 ****
  b99f626316273c3daf2953bfd822609c  libphobos/src/std/regex/internal/thompson.d
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  df4f18ae8c7b1188ceb25cebc8cdbfad  libphobos/src/std/signals.d
! fdda6397766e5ec38621168801c777ad  libphobos/src/std/socket.d
  6a33097edd4ad1e0309cbf45449a8d4e  libphobos/src/std/stdint.d
! 17351c6ebdda59c7f2b242ca8ad592dd  libphobos/src/std/stdio.d
  085d44aff64496b59aa3e7a785af5074  libphobos/src/std/string.d
  174fcd8c187f1e134773b4439e9d5ef4  libphobos/src/std/system.d
  7ec31ac728ed4fdf60d84e5c1e139b6c  libphobos/src/std/traits.d
--- 88837,88845 ----
  b99f626316273c3daf2953bfd822609c  libphobos/src/std/regex/internal/thompson.d
  9331982b3979f24025c8d01a02eaae41  libphobos/src/std/regex/package.d
  df4f18ae8c7b1188ceb25cebc8cdbfad  libphobos/src/std/signals.d
! 50e8f943c45048bda343c13c5ea8f6c2  libphobos/src/std/socket.d
  6a33097edd4ad1e0309cbf45449a8d4e  libphobos/src/std/stdint.d
! da34a709cc539e4cd81f4100d93b17c9  libphobos/src/std/stdio.d
  085d44aff64496b59aa3e7a785af5074  libphobos/src/std/string.d
  174fcd8c187f1e134773b4439e9d5ef4  libphobos/src/std/system.d
  7ec31ac728ed4fdf60d84e5c1e139b6c  libphobos/src/std/traits.d
*************** ee1fa3514e0cedfb7488e2be873ec9fd  libpho
*** 78401,78438 ****
  ed6622a6fa6da3b41e47f072aacdcccb  libphobos/src/std/xml.d
  cbd0a987b1d5f4cd266e841d44925c4b  libphobos/src/std/zip.d
  e286530c1673eab67616befb2f26f1a7  libphobos/src/std/zlib.d
! 4669acb0e5b9735d399d841e501891f3  libphobos/testsuite/Makefile.am
! 759b4120c236756d432abefcd2490546  libphobos/testsuite/Makefile.in
! ada84264d633b7a6efc7406c7f14d833  libphobos/testsuite/config/default.exp
! d935c59358372092300cc5c5d5660547  libphobos/testsuite/lib/libphobos-dg.exp
! 094f512d775d18e33e63d4b6c471d1f7  libphobos/testsuite/lib/libphobos.exp
! 3bfe0f9c10561eb84fb1bf6f955f49fe  libphobos/testsuite/libphobos.aa/aa.exp
  bc5e4ff02f931c6e4092411c492a23eb  libphobos/testsuite/libphobos.aa/test_aa.d
! be293a36c3d9678d428d5ff9b4f5c5fa  libphobos/testsuite/libphobos.allocations/allocations.exp
  7dfee0831ce08cfd971056dee5ce8519  libphobos/testsuite/libphobos.allocations/overflow_from_existing.d
  39b50d25dc11230fd4d61a9d7c8cf7a0  libphobos/testsuite/libphobos.allocations/overflow_from_zero.d
  eb23a46380d7854189331a38e1b260b3  libphobos/testsuite/libphobos.allocations/tls_gc_integration.d
! d5dd2eb681f3c6a8314b6cd193363512  libphobos/testsuite/libphobos.cycles/cycles.exp
  1d8fc1ccfee07e211685dad723c7c5ef  libphobos/testsuite/libphobos.cycles/mod1.d
  504ac65b81c5b13426dbccb387e5ea96  libphobos/testsuite/libphobos.cycles/mod2.d
  8fd2e066de9b173803c23766ec268bc6  libphobos/testsuite/libphobos.cycles/mod3.d
! 9abff365220a316321a92c3737265e16  libphobos/testsuite/libphobos.druntime/druntime.exp
! 894227fbf355e98f608ff264cebf8bc9  libphobos/testsuite/libphobos.druntime_shared/druntime_shared.exp
  19a83daac4a74719662b0bafbd5ee07d  libphobos/testsuite/libphobos.exceptions/chain.d
! be293a36c3d9678d428d5ff9b4f5c5fa  libphobos/testsuite/libphobos.exceptions/exceptions.exp
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  79ad9406d3677f68903d7e1a4f7cdbad  libphobos/testsuite/libphobos.exceptions/line_trace.d
  bf5b834c84dce34c411728d08e740501  libphobos/testsuite/libphobos.exceptions/static_dtor.d
  31f5d626ceb6296159b2ba424ee49c32  libphobos/testsuite/libphobos.exceptions/stderr_msg.d
  1f17216ed3cb74970b34edf1fe76623d  libphobos/testsuite/libphobos.exceptions/unittest_assert.d
  71bea904d6761af4063877c668a8fe49  libphobos/testsuite/libphobos.exceptions/unknown_gc.d
! 3bfe0f9c10561eb84fb1bf6f955f49fe  libphobos/testsuite/libphobos.hash/hash.exp
  23008e0ae50c9c076a539d22ebcd0b49  libphobos/testsuite/libphobos.hash/test_hash.d
! 76010271744c121fab0096a61bb8f014  libphobos/testsuite/libphobos.init_fini/init_fini.exp
  b6bbf47234f6bdb61c628cae44fb04f9  libphobos/testsuite/libphobos.init_fini/runtime_args.d
  6cf643d2e05d4806362cf62c56562e5e  libphobos/testsuite/libphobos.init_fini/thread_join.d
! 1b44b788da2a4264b7a589d7a09b83d0  libphobos/testsuite/libphobos.phobos/phobos.exp
! 9038763b15e4c010bae68b27cfe348f1  libphobos/testsuite/libphobos.phobos_shared/phobos_shared.exp
  dc9924675718952b484eadd2d458553a  libphobos/testsuite/libphobos.shared/finalize.d
  31e8bf46746f3f04a617d6a88183d6df  libphobos/testsuite/libphobos.shared/host.c
  568552f233800fa4522238fe4c907fb7  libphobos/testsuite/libphobos.shared/lib.d
--- 88856,88893 ----
  ed6622a6fa6da3b41e47f072aacdcccb  libphobos/src/std/xml.d
  cbd0a987b1d5f4cd266e841d44925c4b  libphobos/src/std/zip.d
  e286530c1673eab67616befb2f26f1a7  libphobos/src/std/zlib.d
! eda1ddbf394b618b7488efde98c0ef46  libphobos/testsuite/Makefile.am
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! b21826cc6daed1066d2b7a42f2476b60  libphobos/testsuite/config/default.exp
! 74eb333f63aab72ebf727c7768c48728  libphobos/testsuite/lib/libphobos-dg.exp
! 752b7cdf153b006b16e4b0ef007f3aa0  libphobos/testsuite/lib/libphobos.exp
! b4be67485d7faade311c9061561af23e  libphobos/testsuite/libphobos.aa/aa.exp
  bc5e4ff02f931c6e4092411c492a23eb  libphobos/testsuite/libphobos.aa/test_aa.d
! 560b7c676aa6374d975048ed0d3dea42  libphobos/testsuite/libphobos.allocations/allocations.exp
  7dfee0831ce08cfd971056dee5ce8519  libphobos/testsuite/libphobos.allocations/overflow_from_existing.d
  39b50d25dc11230fd4d61a9d7c8cf7a0  libphobos/testsuite/libphobos.allocations/overflow_from_zero.d
  eb23a46380d7854189331a38e1b260b3  libphobos/testsuite/libphobos.allocations/tls_gc_integration.d
! 4d862b7d6a9c37026387462d2f18baf9  libphobos/testsuite/libphobos.cycles/cycles.exp
  1d8fc1ccfee07e211685dad723c7c5ef  libphobos/testsuite/libphobos.cycles/mod1.d
  504ac65b81c5b13426dbccb387e5ea96  libphobos/testsuite/libphobos.cycles/mod2.d
  8fd2e066de9b173803c23766ec268bc6  libphobos/testsuite/libphobos.cycles/mod3.d
! aaba486567e0b3d139a6f9b0d2ba6d0f  libphobos/testsuite/libphobos.druntime/druntime.exp
! b6eb5b23b95505aace8c3495af61c96e  libphobos/testsuite/libphobos.druntime_shared/druntime_shared.exp
  19a83daac4a74719662b0bafbd5ee07d  libphobos/testsuite/libphobos.exceptions/chain.d
! 560b7c676aa6374d975048ed0d3dea42  libphobos/testsuite/libphobos.exceptions/exceptions.exp
  17d3680e349b715f2c8ae4cd23ab5dc5  libphobos/testsuite/libphobos.exceptions/invalid_memory_operation.d
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  bf5b834c84dce34c411728d08e740501  libphobos/testsuite/libphobos.exceptions/static_dtor.d
  31f5d626ceb6296159b2ba424ee49c32  libphobos/testsuite/libphobos.exceptions/stderr_msg.d
  1f17216ed3cb74970b34edf1fe76623d  libphobos/testsuite/libphobos.exceptions/unittest_assert.d
  71bea904d6761af4063877c668a8fe49  libphobos/testsuite/libphobos.exceptions/unknown_gc.d
! b4be67485d7faade311c9061561af23e  libphobos/testsuite/libphobos.hash/hash.exp
  23008e0ae50c9c076a539d22ebcd0b49  libphobos/testsuite/libphobos.hash/test_hash.d
! 35a8e616fdcbacb81b4451aafb732c93  libphobos/testsuite/libphobos.init_fini/init_fini.exp
  b6bbf47234f6bdb61c628cae44fb04f9  libphobos/testsuite/libphobos.init_fini/runtime_args.d
  6cf643d2e05d4806362cf62c56562e5e  libphobos/testsuite/libphobos.init_fini/thread_join.d
! 24fc4148ed34d61f8bb26ecf0205bec3  libphobos/testsuite/libphobos.phobos/phobos.exp
! c3a0a097f19904145efb300dd537f612  libphobos/testsuite/libphobos.phobos_shared/phobos_shared.exp
  dc9924675718952b484eadd2d458553a  libphobos/testsuite/libphobos.shared/finalize.d
  31e8bf46746f3f04a617d6a88183d6df  libphobos/testsuite/libphobos.shared/host.c
  568552f233800fa4522238fe4c907fb7  libphobos/testsuite/libphobos.shared/lib.d
*************** c2d7d8743684246c1910e1f5b7886bf4  libpho
*** 78452,78476 ****
  d3c9a66f75a4c0e9517bb616aa64dbf0  libphobos/testsuite/libphobos.shared/load_loaddep.d
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  7208bfcc87f14bf3c973fd0046246456  libphobos/testsuite/libphobos.shared/plugin.d
! cae99660b8cb06cb277c2decacc6c561  libphobos/testsuite/libphobos.shared/shared.exp
! 975e85ee8bfd90da3223ee211bb37869  libphobos/testsuite/libphobos.thread/fiber_guard_page.d
! be293a36c3d9678d428d5ff9b4f5c5fa  libphobos/testsuite/libphobos.thread/thread.exp
  47f6734418d71269ebe08d8f12ec205f  libphobos/testsuite/libphobos.thread/tlsgc_sections.d
  78729aa84444a843eaada3c2e3a17e43  libphobos/testsuite/libphobos.typeinfo/comparison.d
  7d73c130e62a20e51195ca1c51bf2b2f  libphobos/testsuite/libphobos.typeinfo/struct-align.d
! 76010271744c121fab0096a61bb8f014  libphobos/testsuite/libphobos.typeinfo/typeinfo.exp
! 668bf1021ddcdd98e1a3977a43a339ff  libphobos/testsuite/testsuite_flags.in
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! 047ff5b53cac1c909a0a0897db128e25  libquadmath/ChangeLog
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! 9fadb501b88c2f0e9444ac7d2a1d61f9  libquadmath/Makefile.in
  d9afbc1f1e04c7e461265ff9323cc6f4  libquadmath/acinclude.m4
! 726ee2974d31d5c3cfbbac4c683ef23f  libquadmath/aclocal.m4
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! 16d831db28611056e014d31318ebb45a  libquadmath/libquadmath.info
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  77280bb7ee423875e03d9c0d34527df6  libquadmath/libtool-version
  452fee0ef153d65eb7413a5103c63a23  libquadmath/math/acoshq.c
  c4c7d5ffedb33360fdfb16dc037faf46  libquadmath/math/acosq.c
--- 88907,88931 ----
  d3c9a66f75a4c0e9517bb616aa64dbf0  libphobos/testsuite/libphobos.shared/load_loaddep.d
  7296c8b58a8ecd96b9e356bc9b48f141  libphobos/testsuite/libphobos.shared/load_mod_collision.d
  7208bfcc87f14bf3c973fd0046246456  libphobos/testsuite/libphobos.shared/plugin.d
! e36d56c030504444e9f43a67de69388e  libphobos/testsuite/libphobos.shared/shared.exp
! d6d76c43d490a2c9d8addee8eee021b8  libphobos/testsuite/libphobos.thread/fiber_guard_page.d
! 560b7c676aa6374d975048ed0d3dea42  libphobos/testsuite/libphobos.thread/thread.exp
  47f6734418d71269ebe08d8f12ec205f  libphobos/testsuite/libphobos.thread/tlsgc_sections.d
  78729aa84444a843eaada3c2e3a17e43  libphobos/testsuite/libphobos.typeinfo/comparison.d
  7d73c130e62a20e51195ca1c51bf2b2f  libphobos/testsuite/libphobos.typeinfo/struct-align.d
! 35a8e616fdcbacb81b4451aafb732c93  libphobos/testsuite/libphobos.typeinfo/typeinfo.exp
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  d9afbc1f1e04c7e461265ff9323cc6f4  libquadmath/acinclude.m4
! 1a1d1b5a61d685d544d98ec2e4b86d5a  libquadmath/aclocal.m4
  cf5a7864ff15ab4dd1604e0f6fe4e501  libquadmath/config.h.in
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! 279cb151e8c43d5af048eb1a9608a435  libquadmath/configure.ac
! 0ea1ff3d84c35811520698429b2d0aa7  libquadmath/libquadmath.info
! 8442a7234a31a9e0c384bc6376ae9724  libquadmath/libquadmath.texi
  77280bb7ee423875e03d9c0d34527df6  libquadmath/libtool-version
  452fee0ef153d65eb7413a5103c63a23  libquadmath/math/acoshq.c
  c4c7d5ffedb33360fdfb16dc037faf46  libquadmath/math/acosq.c
*************** a81cc82679e80c86cfbd5575867450d0  libqua
*** 78601,78700 ****
  af84fa5118f4adec8393614994e1c4d6  libquadmath/strtod/strtoflt128.c
  d15a18f7c46ba2add6148edc5b7563c0  libquadmath/strtod/tens_in_limb.c
  12c73a846f7668d29de720bd79502bef  libquadmath/update-quadmath.py
! d5565ce3aa01bd810f896262292968ea  libsanitizer/ChangeLog
  0e35a2dc2727acc707a3f5ead45c8e12  libsanitizer/HOWTO_MERGE
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! 29e53043f571f04aa9b3f478225a7cce  libsanitizer/asan/asan_allocator.cc
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! 83921b07676bf9154ec595d2bb13d2ab  libsanitizer/asan/asan_debugging.cc
! 494ac79fcf83b5f2799d1b8748c40b3c  libsanitizer/asan/asan_descriptions.cc
! 0d08ed60a58561dcaad6431cdb3d8847  libsanitizer/asan/asan_descriptions.h
! 9e3e7f9407a75c7e4cb72c323eba1ea7  libsanitizer/asan/asan_errors.cc
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! 1522f80c68522fba57182337bc553866  libsanitizer/asan/asan_fake_stack.cc
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! 0514caa3e5b347747c8bbcd5ffc1ac29  libsanitizer/asan/asan_flags.cc
! 749c40bd86f1f8c8c05241630b9d42ab  libsanitizer/asan/asan_flags.h
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! dba403395f0645ea153ea6ffad6628b3  libsanitizer/asan/asan_fuchsia.cc
! 2b76f3c8efa73f0de02ff0e0384f58c8  libsanitizer/asan/asan_globals.cc
! 0d89953ffb150d0b8496d96fdf6ee734  libsanitizer/asan/asan_globals_win.cc
! 15b2b3b6333646c0365a30c200e68cfa  libsanitizer/asan/asan_init_version.h
! 865b9f377aa29ce5901cfdc83ba625a6  libsanitizer/asan/asan_interceptors.cc
! 05787b5e8e4ceaaba333769a2022626d  libsanitizer/asan/asan_interceptors.h
! c2f7fad2ce0beb6ccbf3fae74cbf3d9e  libsanitizer/asan/asan_interceptors_memintrinsics.cc
! ac94f07fb2b3f0f5520f9d94bf64478a  libsanitizer/asan/asan_interceptors_memintrinsics.h
! a2db438d49e9555d94a2a31d7a32441e  libsanitizer/asan/asan_interface.inc
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--- 89056,89156 ----
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*************** e0f26bb761d75b6aac187f2c8d755c0b  libsan
*** 78702,79046 ****
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! 044b757ee8bade6c908820a513f37e82  libstdc++-v3/include/ext/pb_ds/detail/bin_search_tree_/split_join_fn_imps.hpp
! 55e16aecd4cda75ec71cee0459a7bba7  libstdc++-v3/include/ext/pb_ds/detail/bin_search_tree_/traits.hpp
! 1702278b2c2acaeb4fa2993e5a4cdaf1  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/binary_heap_.hpp
! 047882a057f8a02a8cc50b0c827a031d  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/const_iterator.hpp
! 44cf40bfe528624d519169af68321677  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/constructors_destructor_fn_imps.hpp
! df72d63f24720b699b236354e8938faf  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/debug_fn_imps.hpp
! fdf9fd85c102bc599a1dcc622b0dd9c9  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/entry_cmp.hpp
! 4d5923ca27eeb66756c067a078c45cce  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/entry_pred.hpp
! 2e84592a8a83df1e7421082f5f1d714d  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/erase_fn_imps.hpp
! bf196045aca51e6c8e01a2f163bb6925  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/find_fn_imps.hpp
! 81e887abaf8375535066a7d557ff3700  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/info_fn_imps.hpp
! 99216834c07b9eb1927943124773659f  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/insert_fn_imps.hpp
! 1a084de6b6298caf3e575bec324ae238  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/iterators_fn_imps.hpp
! 60e3220eaf8373068911def3b1d61cd0  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/point_const_iterator.hpp
! dc6356e7fa12ba8bf332848db02c2e9b  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/policy_access_fn_imps.hpp
! eb5ee1b83ea051d7d753d6c420bd77ce  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/resize_policy.hpp
! e2fcad7374f3ce90c706403a0222f335  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/split_join_fn_imps.hpp
! 14bbf20783cae6c033cd80253d98ef39  libstdc++-v3/include/ext/pb_ds/detail/binary_heap_/trace_fn_imps.hpp
! f9ebbc70450d832b7bfd318184194cf8  libstdc++-v3/include/ext/pb_ds/detail/binomial_heap_/binomial_heap_.hpp
! 892796bc4fb6d33f3c6fa8ad39a2b949  libstdc++-v3/include/ext/pb_ds/detail/binomial_heap_/constructors_destructor_fn_imps.hpp
! 869ab562c6ad0d637332776956bcfb55  libstdc++-v3/include/ext/pb_ds/detail/binomial_heap_/debug_fn_imps.hpp
! 19e244f448e640148a51ff02efea1aea  libstdc++-v3/include/ext/pb_ds/detail/binomial_heap_base_/binomial_heap_base_.hpp
! 546f6c9f682470c74ef69e8247d37e63  libstdc++-v3/include/ext/pb_ds/detail/binomial_heap_base_/constructors_destructor_fn_imps.hpp
! a0ed60c1a94ffda506cd3684ad50cf11  libstdc++-v3/include/ext/pb_ds/detail/binomial_heap_base_/debug_fn_imps.hpp
! 84778b76e3a22f6f33491e01e8b0d9f0  libstdc++-v3/include/ext/pb_ds/detail/binomial_heap_base_/erase_fn_imps.hpp
! c8b5ad3a81f4b77fafbb9a405403e8b9  libstdc++-v3/include/ext/pb_ds/detail/binomial_heap_base_/find_fn_imps.hpp
! 9b68230d6a84860e26249ce8ae65428c  libstdc++-v3/include/ext/pb_ds/detail/binomial_heap_base_/insert_fn_imps.hpp
! 62806599d1c6d4f8d5469cb5f58a4d12  libstdc++-v3/include/ext/pb_ds/detail/binomial_heap_base_/split_join_fn_imps.hpp
! 44058fa28b3a1033cf933d62290753e3  libstdc++-v3/include/ext/pb_ds/detail/branch_policy/branch_policy.hpp
! e2615efbff0e41200ed09ae1ef6c28cf  libstdc++-v3/include/ext/pb_ds/detail/branch_policy/null_node_metadata.hpp
! 055b0762888a6403ca6c2bd9fad8df91  libstdc++-v3/include/ext/pb_ds/detail/branch_policy/traits.hpp
! 9cae023f9e313b7c9a1e872647d922d7  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/cc_ht_map_.hpp
! d5fccf0b9ec09afb4a49745e7a77aa46  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/cmp_fn_imps.hpp
! d4110a39c600631e8f6e3b429167e9b2  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/cond_key_dtor_entry_dealtor.hpp
! 0fab82d218f8db3fe55bdef1f553e74b  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/constructor_destructor_fn_imps.hpp
! 889572cf33abf3ef623b52dc22c2d64c  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/constructor_destructor_no_store_hash_fn_imps.hpp
! b43e3234cb5fafd930daa1ecc4625300  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/constructor_destructor_store_hash_fn_imps.hpp
! e92f571e5be52495ef03ece584a9b68d  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/debug_fn_imps.hpp
! 4c9be46d0216f2b9d8bd191f3e0d46a2  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/debug_no_store_hash_fn_imps.hpp
! 03243e001aac4f104cf92a9c09eb609a  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/debug_store_hash_fn_imps.hpp
! c5b8f9758ef7abbdb220b8e76501f4f3  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/entry_list_fn_imps.hpp
! 429737c36309f95e7427b435812ede5a  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/erase_fn_imps.hpp
! c128d0ce9fb84b0c0a8ff0eb3af2f369  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/erase_no_store_hash_fn_imps.hpp
! 593b87184619167ea3d7850195e1b4c3  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/erase_store_hash_fn_imps.hpp
! a9df168f1fd1474f70835666617bded2  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/find_fn_imps.hpp
! ae79eb83644a19616dcaeb46814eb759  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/find_store_hash_fn_imps.hpp
! 97e1a8549b6cb4bf01fbc79afc7c6de1  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/info_fn_imps.hpp
! 3eb352062bff7932c0c0b64f00c5aa6e  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/insert_fn_imps.hpp
! 987a0a85df27dda75fb23628e9bb7c2c  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/insert_no_store_hash_fn_imps.hpp
! e5f42f98ea31f6313d3d7239f841f53b  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/insert_store_hash_fn_imps.hpp
! 6a7f50711ca4b7a991fec1639f7b0823  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/iterators_fn_imps.hpp
! 78f46249dee13e314c5e26ceb000e980  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/policy_access_fn_imps.hpp
! 53b4244a8bac8cf7b6949e20e07c88a3  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/resize_fn_imps.hpp
! 020f8060ba97527094f0f9ddd24e33b4  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/resize_no_store_hash_fn_imps.hpp
! 5754f04b48dbc4da8b49a4dff2c67e48  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/resize_store_hash_fn_imps.hpp
! abea65e1a3dc6dfb3f1703ee097acc93  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/size_fn_imps.hpp
! 7122b46969195c86b88749fc998e0989  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/trace_fn_imps.hpp
! b644f2fd23314e4cccc5b8f896e4036e  libstdc++-v3/include/ext/pb_ds/detail/cond_dealtor.hpp
! 543cc3389af84b6b28482f50f4dfe54a  libstdc++-v3/include/ext/pb_ds/detail/container_base_dispatch.hpp
! 67cb1bba4a73fdcd5eca1ff0c874d694  libstdc++-v3/include/ext/pb_ds/detail/debug_map_base.hpp
! 1f200b227b0c7a4bbf64bbf06c09afd6  libstdc++-v3/include/ext/pb_ds/detail/eq_fn/eq_by_less.hpp
! f39bab9cf1aa636212beb8688e76e6fd  libstdc++-v3/include/ext/pb_ds/detail/eq_fn/hash_eq_fn.hpp
! 9b5b4a3954225b27e45fd5f7c64127f5  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/constructor_destructor_fn_imps.hpp
! a5a4760b72c165cd296c40bbd68a1cce  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/constructor_destructor_no_store_hash_fn_imps.hpp
! f69e079887b2bd233ff5239d745dcc9c  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/constructor_destructor_store_hash_fn_imps.hpp
! 681e1c5ce80ea313b66aa8bc473a2cce  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/debug_fn_imps.hpp
! 6e756ebe0467ff073418a2d75b95ee36  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/debug_no_store_hash_fn_imps.hpp
! d9a7840a6c6ab29fd94b960db3ed5e91  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/debug_store_hash_fn_imps.hpp
! 46b2c1e06f0079da400fd12ecd757ffe  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/erase_fn_imps.hpp
! 69e30d68bf0a0fe3f754c74850f8e233  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/erase_no_store_hash_fn_imps.hpp
! b22aa67714e994500b9445fef6911a90  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/erase_store_hash_fn_imps.hpp
! b61aad4eb750ae0037991095bbf91ff4  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/find_fn_imps.hpp
! fedb2aebbf11f57837589b175d37dd01  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/find_no_store_hash_fn_imps.hpp
! 9b4495ec42e832b2b35e90b6022f665b  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/find_store_hash_fn_imps.hpp
! ee51100476db6f611b098b7878a0eacc  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/gp_ht_map_.hpp
! d4427108e1b327aa498e54a8ebb833dd  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/info_fn_imps.hpp
! 3974a3327de38caece1d60a999612e36  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/insert_fn_imps.hpp
! 82fd9455ab6a3736d7f05508fb5d3fa9  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/insert_no_store_hash_fn_imps.hpp
! 27f0b12527e6d6be1d13b5c437d2985f  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/insert_store_hash_fn_imps.hpp
! a3c03048986b2edce11ccb0558a0cce9  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/iterator_fn_imps.hpp
! 247226e3bb2e1379ff2500df69f72abe  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/policy_access_fn_imps.hpp
! a3d10dc422439c9ece90fb244e812538  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/resize_fn_imps.hpp
! 328b96e581a8f597a3f344cd367e41a3  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/resize_no_store_hash_fn_imps.hpp
! 65eeb21b95fcf88040154448103ae4d1  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/resize_store_hash_fn_imps.hpp
! c435b24a561bdbefc0acd8b824491931  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/trace_fn_imps.hpp
! c3de2a0bfa537b195dc4488dfda349f0  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/direct_mask_range_hashing_imp.hpp
! b235bf6d600e9a7f1b74346393721c78  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/direct_mod_range_hashing_imp.hpp
! 1d46e3401915b658aa6460d19c1c1031  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/linear_probe_fn_imp.hpp
! 6a52f30be3d927adf2b15919a3a87d15  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/mask_based_range_hashing.hpp
! 2c9f7a12de10cc74a68fb17ac898141b  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/mod_based_range_hashing.hpp
! 9dd7a96269714b05758456e7aa8f62a4  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/probe_fn_base.hpp
! 21765523e4004e9f97d5087f7469202b  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/quadratic_probe_fn_imp.hpp
! 86f1eefbe993ef9af4b5890118d11f2f  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/ranged_hash_fn.hpp
! bf77be4ec3839fd55bae36ebf28f252a  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/ranged_probe_fn.hpp
! 14c5ff386bae5dd736387ddea227c5d9  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/sample_probe_fn.hpp
! 4787622a90cdc87d0a293f66242aeeba  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/sample_range_hashing.hpp
! f84431de1d29e2f0a3b1f61739144639  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/sample_ranged_hash_fn.hpp
! 702a214e01f9637811a5463dadffedee  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/sample_ranged_probe_fn.hpp
! 1a42e75f26c17854379b9c3ce6aefbc8  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/const_iterator.hpp
! 2351e7611a13f5db742046ce2a92d332  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/constructors_destructor_fn_imps.hpp
! f0aa2987f717cf91dfa0f4456982a457  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/debug_fn_imps.hpp
! 3b577940d8b50ae0fbaa19fd3f132f58  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/erase_fn_imps.hpp
! f3f75619dd259b92828a68cbdfe2f704  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/info_fn_imps.hpp
! 4ac4a3624fd73adbdd4b35b8a7fb693e  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/insert_fn_imps.hpp
! c3da9fd7e4742551c0a6981170e1031f  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/iterators_fn_imps.hpp
! af94b10122a4fa5a930d8c9fc44d5d70  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/left_child_next_sibling_heap_.hpp
! 377d2a3f240decb6b94625ac48c3b386  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/node.hpp
! cf1c6b471528ae8f6236f8b320d831a9  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/point_const_iterator.hpp
! f6a459250c85d97b79ad8c9b1893ff24  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/policy_access_fn_imps.hpp
! acf8a326594d3bf389ae15efa8b33185  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/trace_fn_imps.hpp
! e179192328e943e39ec22cc8883e4743  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/constructor_destructor_fn_imps.hpp
! b6140fe816575df495db0ac9d7718f50  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/debug_fn_imps.hpp
! 39756c6e38ede23e2f5ff177e90bb1f3  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/entry_metadata_base.hpp
! 54e9b10140185ea910f7fb04ad5a1cb2  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/erase_fn_imps.hpp
! cb3b4eb3495739bbec47542f8a40b3cf  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/find_fn_imps.hpp
! 940b3f2b664a2f526b82e80720ec8eed  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/info_fn_imps.hpp
! 07c459ad5b60ada8ec1ada30bfdb6679  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/insert_fn_imps.hpp
! e2cfd8420152471342530d6278215cb8  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/iterators_fn_imps.hpp
! 14915fd13b747018444d3da79e0bf2e2  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/lu_map_.hpp
! 96a05b491eb470c5cc1bcab53085a7e4  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/trace_fn_imps.hpp
! 456b4e82d56688e321b79d975c600eb5  libstdc++-v3/include/ext/pb_ds/detail/list_update_policy/lu_counter_metadata.hpp
! 8e63827fa1abd4254af00715809918d5  libstdc++-v3/include/ext/pb_ds/detail/list_update_policy/sample_update_policy.hpp
! 405d841e2b1bf561a1132c5b43c2eee0  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/constructors_destructor_fn_imps.hpp
! 49fef3a6e333bdf64d140c1232b21b7e  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/debug_fn_imps.hpp
! cfc4708b38c59d1097fc4360442b9519  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/erase_fn_imps.hpp
! ce0159944c360f82d44f58c3d361af83  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/info_fn_imps.hpp
! 628bd83f8e66fff6215fa69f9f477817  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/insert_fn_imps.hpp
! a1c9692c03c16601831e6fa0680ad28e  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/iterators_fn_imps.hpp
! 45d0d35666b6ef7ed8f32900c4ca8545  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/node_iterators.hpp
! f28a79648586d31d5813cbe2844c1cad  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/ov_tree_map_.hpp
! 4c8feb25adbe8ba55cb4187debde8f86  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/policy_access_fn_imps.hpp
! b5aa927b65c63d789e55dc5e6e1d0eb9  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/split_join_fn_imps.hpp
! 9c62beb828ad0f8827602dc9f9701853  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/traits.hpp
! 58791f06babe487e6df3c34cf6ae1c03  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/constructors_destructor_fn_imps.hpp
! 71afb26988d7b9745fab54184a36785f  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/debug_fn_imps.hpp
! 6fe2053378bbfcedccb98a79c9dde3d4  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/erase_fn_imps.hpp
! d0829ff9cfc4e90380ceb6329252cbd8  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/find_fn_imps.hpp
! 6145bfd199cd41a3f6331d60fc36a805  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/insert_fn_imps.hpp
! ea5ebde1cee75c655938e8a29daeeb37  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/pairing_heap_.hpp
! 735ad147cdfc3762e3466d7688c02536  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/split_join_fn_imps.hpp
! 11844f846c2f2defc7e98ea871159ed8  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/constructors_destructor_fn_imps.hpp
! d6a0dfa8581e59f500622f7830035b71  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/debug_fn_imps.hpp
! 948285e78340f5ff7110b32032697469  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/erase_fn_imps.hpp
! 532160182cd978cf24bd3c587f85efc3  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/find_fn_imps.hpp
! 25ba3e58f08bf9089f5be4671af40200  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/info_fn_imps.hpp
! ffb9e2f40a348effe1b68c826151db8a  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/insert_join_fn_imps.hpp
! a139ef6c951087bf1f37005ba9e9bc47  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/iterators_fn_imps.hpp
! 06d67b1242f5bfb160d3a6841b462f27  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/pat_trie_.hpp
! 5c8370f835dda7ecdede0abe5c7750a2  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/pat_trie_base.hpp
! 20465246c9c06386c2d591685cc9b720  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/policy_access_fn_imps.hpp
! 3335305544f169529224380a13e4f8a5  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/r_erase_fn_imps.hpp
! 134b388b720623eb6d0f3413ed839f79  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/rotate_fn_imps.hpp
! fae87d81efc4e828ef6f0b0e3c3f4fcb  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/split_fn_imps.hpp
! 54b01d819949bce2b741326d626bdf7d  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/synth_access_traits.hpp
! dc45a28d92aca3d7c8a1c1f0fadf3472  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/trace_fn_imps.hpp
! befb61345b0680956e200ae3ad31bcf0  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/traits.hpp
! c78f09070085f15e6879adaed3a5a2b6  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/update_fn_imps.hpp
! 6919f8c9ea32da292f6db106dc4c5890  libstdc++-v3/include/ext/pb_ds/detail/priority_queue_base_dispatch.hpp
! 6591640883f9ce9cb4ff8be880b63660  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/constructors_destructor_fn_imps.hpp
! 1d13c8454fff0fc624d199f4c2874035  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/debug_fn_imps.hpp
! d20820b868ea9357fd1fd2f0b4d5dfca  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/erase_fn_imps.hpp
! b565f97cbcf3d398cb5957731e1eaa7a  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/find_fn_imps.hpp
! e6a0057708765d8144689aec94a87f8d  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/info_fn_imps.hpp
! 97a3e7576b2cfabaacca50cccdcc7824  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/insert_fn_imps.hpp
! 97492020d3e2075fb9b7b83dfbbf2c0d  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/node.hpp
! 4876fce7a21a3d1c834fe997378ab3b9  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/rb_tree_.hpp
! 3e12cd3c7a69cfd04400fa81855970f6  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/split_join_fn_imps.hpp
! e3374ef3b0446a255aea591200f18ef8  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/traits.hpp
! 1e8d3dcafd40c35453fd50c8ab22455e  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/constructors_destructor_fn_imps.hpp
! c8585d23e259649b11fc567e1eaa9833  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/debug_fn_imps.hpp
! 2548ca94f2bdfb16952623cb78792ef5  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/erase_fn_imps.hpp
! 36fb0683f0d51d6937471626f8e05478  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/insert_fn_imps.hpp
! 089a6b1ed5d67783e611223ab9227524  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/rc.hpp
! 100c6f33bf00902e3938e98b46b9ca23  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/rc_binomial_heap_.hpp
! d12c11cfc7d63fea4d03448f7ec5c269  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/split_join_fn_imps.hpp
! cad58778459a86905a1a7bd2e972cb0d  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/trace_fn_imps.hpp
! f4423bf7a6ef819f8590e6ac2834b652  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/cc_hash_max_collision_check_resize_trigger_imp.hpp
! 1c5a19164ccf991638efa2fde1d01539  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/hash_exponential_size_policy_imp.hpp
! 1d1b90018bbb7df17beb6d92e5a17a65  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/hash_load_check_resize_trigger_imp.hpp
! c69749089e0f628e6e1cfb193441fa21  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/hash_load_check_resize_trigger_size_base.hpp
! 1838f0f8cb19d535205c2317a9d1ffd4  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/hash_prime_size_policy_imp.hpp
! 238d644af01736dd955adfd0c7da9116  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/hash_standard_resize_policy_imp.hpp
! b111fdffaacc79be05e9ff881c26a8e4  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/sample_resize_policy.hpp
! 4a12ba0fcfc75a2258387788b16e5600  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/sample_resize_trigger.hpp
! fd87e9d1be78fec401892527dd6e2d4a  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/sample_size_policy.hpp
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! b1a5a421e1f130b1154a3241c0bb4dcf  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/debug_fn_imps.hpp
! 9400def50bc8ed291caed5f0781bfd7d  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/erase_fn_imps.hpp
! baeb8aaaa484b8f4e2e1f9e96cd26f77  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/find_fn_imps.hpp
! 0cfdb250beea738870896a34665cf137  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/info_fn_imps.hpp
! 3be765a5686711b5e718f9028ea708d5  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/insert_fn_imps.hpp
! 2179850130449d4215924cbec2d26325  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/node.hpp
! de999dcdb7c14f0635aeed16a9529b18  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/splay_fn_imps.hpp
! d53e6416d704d4cca4c9bd079abca126  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/splay_tree_.hpp
! 8fbb8cef307db08ee98f8a133cf4bc10  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/split_join_fn_imps.hpp
! 2f079fe1266dc5c9863b0cde1d31f0f0  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/traits.hpp
! 5ac872a0e5a592db91e01b3dc66c6b56  libstdc++-v3/include/ext/pb_ds/detail/standard_policies.hpp
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! e677b33ea53ade8f4fc7e1978c60f21e  libstdc++-v3/include/ext/pb_ds/detail/thin_heap_/debug_fn_imps.hpp
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! 9b9d8bf88f42f2b5cfd28004a1153cd1  libstdc++-v3/include/ext/pb_ds/detail/thin_heap_/trace_fn_imps.hpp
! a92efeba321a450260a9509f295ef143  libstdc++-v3/include/ext/pb_ds/detail/tree_policy/node_metadata_selector.hpp
! c682edb2e65e8525ad52c41e1d219692  libstdc++-v3/include/ext/pb_ds/detail/tree_policy/order_statistics_imp.hpp
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! 92ef6d118ac180ec1504947692d4c70f  libstdc++-v3/include/ext/pb_ds/detail/tree_trace_base.hpp
! 7b570c105b23670a2b8a2b9e22063ffd  libstdc++-v3/include/ext/pb_ds/detail/trie_policy/node_metadata_selector.hpp
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! f7a87f85290e7c6c49d89df329ee0cbb  libstdc++-v3/include/ext/pb_ds/detail/trie_policy/prefix_search_node_update_imp.hpp
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! 5c571f08cc62e28d03cc9a4b94716d96  libstdc++-v3/include/ext/pb_ds/detail/trie_policy/trie_policy_base.hpp
! 9d7c8f1eac032b530983090f4a0ee1ab  libstdc++-v3/include/ext/pb_ds/detail/trie_policy/trie_string_access_traits_imp.hpp
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! e80dc32a72c36d03c0dbf6c2d189770c  libstdc++-v3/include/ext/pb_ds/detail/types_traits.hpp
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! 7654786f2fdb80884a22b2dca82784c5  libstdc++-v3/include/ext/pb_ds/detail/unordered_iterator/point_const_iterator.hpp
! c0de00a636a7fbe22dcc9bb95846d431  libstdc++-v3/include/ext/pb_ds/detail/unordered_iterator/point_iterator.hpp
! e784e988ad553f90ccb5b9fa33fa3bf1  libstdc++-v3/include/ext/pb_ds/exception.hpp
! a6fe48fbe7f72c2a316e1203d42a58db  libstdc++-v3/include/ext/pb_ds/hash_policy.hpp
! bfa6013fed4c11884c802465727da1de  libstdc++-v3/include/ext/pb_ds/list_update_policy.hpp
! d3a2e3b7498d841598157f1b93f5dc7c  libstdc++-v3/include/ext/pb_ds/priority_queue.hpp
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! 9b03de7da450e72aa19a513e5fe3f007  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/cc_ht_map_.hpp
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! 21fb97511637d181e7104bae3ec20032  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/cond_key_dtor_entry_dealtor.hpp
! 8282ed12f9c6322c1e9bfa57636403a4  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/constructor_destructor_fn_imps.hpp
! 5dfd0f0137e05e5a859dc22a921207dd  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/constructor_destructor_no_store_hash_fn_imps.hpp
! b2552975ba8513aa640b8c1067bfb2fb  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/constructor_destructor_store_hash_fn_imps.hpp
! 17452f00c2c56a8b339951637b173339  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/debug_fn_imps.hpp
! fb3f8ff354969d3cbd3e4c79e09de62c  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/debug_no_store_hash_fn_imps.hpp
! 32cf1b6cb42433408f16e98dc17f4ece  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/debug_store_hash_fn_imps.hpp
! d7f6cab8c1100e186b343a820b535304  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/entry_list_fn_imps.hpp
! ba19717c52a13930bb33abcba8df04d5  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/erase_fn_imps.hpp
! bdb2ab2210c36e79c6591244cc60d121  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/erase_no_store_hash_fn_imps.hpp
! 2be4bc4253fe96082655c5f419278259  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/erase_store_hash_fn_imps.hpp
! f3025b84f331aa6f7899491a6e749b5e  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/find_fn_imps.hpp
! e5d8ccfbb1f2bde744135016144ab357  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/find_store_hash_fn_imps.hpp
! 3892105846c1daf242db33832d947564  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/info_fn_imps.hpp
! 7a34d4e27361f962f19c7845e7cad229  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/insert_fn_imps.hpp
! 14bc83c380d9f89dfad9122d31ceaefc  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/insert_no_store_hash_fn_imps.hpp
! 87e8c1e6aa8915aa3a4f3fbfee8666d5  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/insert_store_hash_fn_imps.hpp
! e525b89cf65e4834985c2b49af9560b2  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/iterators_fn_imps.hpp
! 7c7d9035a7d40213f0c70986df6d1f14  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/policy_access_fn_imps.hpp
! 6fe0238e7c6172ece2693f9757229c37  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/resize_fn_imps.hpp
! 02128e57e07e7f0c51ad356ab460fd2f  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/resize_no_store_hash_fn_imps.hpp
! 6948c385504e5d9e8c1662ca489c5854  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/resize_store_hash_fn_imps.hpp
! cb7db286138b328a138f75306c6d5fc9  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/size_fn_imps.hpp
! 610137989852c7ef63ac538c30565d7d  libstdc++-v3/include/ext/pb_ds/detail/cc_hash_table_map_/trace_fn_imps.hpp
! 3bf5d458d4972102215af48a58553485  libstdc++-v3/include/ext/pb_ds/detail/cond_dealtor.hpp
! 1a650f1aad160d5afa93f99e38da0fb7  libstdc++-v3/include/ext/pb_ds/detail/container_base_dispatch.hpp
! 4a0f9d6905c053d1ac9c3cf44d3f666f  libstdc++-v3/include/ext/pb_ds/detail/debug_map_base.hpp
! d5d73ee380f3f354243b7caeeb8f2ecc  libstdc++-v3/include/ext/pb_ds/detail/eq_fn/eq_by_less.hpp
! 940aeb53ecd2582f975911cf11e53cd4  libstdc++-v3/include/ext/pb_ds/detail/eq_fn/hash_eq_fn.hpp
! cbbd22f663f74be095c95643a2086b95  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/constructor_destructor_fn_imps.hpp
! 2d4ab34d4b3ed5fdb2058c7cec986971  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/constructor_destructor_no_store_hash_fn_imps.hpp
! ee0779d64f1d1cf51d1d9efb9dbc6872  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/constructor_destructor_store_hash_fn_imps.hpp
! 13da24280c04fc841220b9ddabc580df  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/debug_fn_imps.hpp
! 5058eb481eac81c2a16f630675924604  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/debug_no_store_hash_fn_imps.hpp
! 007e0a6051c39faabb216179b435d085  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/debug_store_hash_fn_imps.hpp
! 88aff7aeaa75bba21c8c31d7d9cbbe8e  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/erase_fn_imps.hpp
! 2cef0d87fdf529ab254830d780e6e7ef  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/erase_no_store_hash_fn_imps.hpp
! 1d1a0ce747a8e32e7f7cedc417234cf8  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/erase_store_hash_fn_imps.hpp
! dc85f2364a3791fa50d28e6736b73c4f  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/find_fn_imps.hpp
! 4463e6abf8e7183e851b94fc15dd51e4  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/find_no_store_hash_fn_imps.hpp
! dd0195305ca79aa112fb02b0dfa354d8  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/find_store_hash_fn_imps.hpp
! 3a4f41f96d2411ceccfe1eb065f88bf5  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/gp_ht_map_.hpp
! d1a4a3774d3adbd8ea38080bf2d64d07  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/info_fn_imps.hpp
! ae32694075d67715a329cb9d1a6b83fc  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/insert_fn_imps.hpp
! 6d43245172ded4429a783cfb75b5fb98  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/insert_no_store_hash_fn_imps.hpp
! 1dce04d44dd228d22b2a8c3854464b48  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/insert_store_hash_fn_imps.hpp
! 85ba10fbfbfa485017ebaa05c48db93a  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/iterator_fn_imps.hpp
! 4c4bb2d8484bd309cac74dbbd79755a0  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/policy_access_fn_imps.hpp
! 8e0901af20eb02c375ffe26e13e19959  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/resize_fn_imps.hpp
! 443bf104eacdfa961bb4e50f2aa1e9e2  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/resize_no_store_hash_fn_imps.hpp
! b3a5ad61e1ccb5b41c48e45cea9a1ef1  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/resize_store_hash_fn_imps.hpp
! c4082cc096e8eb2b99f38cd16571795f  libstdc++-v3/include/ext/pb_ds/detail/gp_hash_table_map_/trace_fn_imps.hpp
! cdaa822ef79574d9b3d2f7551876205e  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/direct_mask_range_hashing_imp.hpp
! 599f63d579bffde9f2999cde5e811a47  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/direct_mod_range_hashing_imp.hpp
! 3f9f2392b36f2964a70957c676b6cc46  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/linear_probe_fn_imp.hpp
! 7c26ad889d7c1b1f8ea191990882ea5b  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/mask_based_range_hashing.hpp
! cdf9aead2d4da6e52c3c9716c0722866  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/mod_based_range_hashing.hpp
! f0ecddd3b1aeb3fa3540abaa2169a2a3  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/probe_fn_base.hpp
! 68f319e7e48f192868aaf32a194a4530  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/quadratic_probe_fn_imp.hpp
! c36eebd05bb1e0cbbb5233d135ee1f59  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/ranged_hash_fn.hpp
! a80036a605103aef16f0f258fdeabefb  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/ranged_probe_fn.hpp
! 6e1c3f2d12b1e28e1f112051cbe352f0  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/sample_probe_fn.hpp
! 2e59edf53c582b14ddfd44ab4947768a  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/sample_range_hashing.hpp
! f110cbde27af14481113eab0068bbc5c  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/sample_ranged_hash_fn.hpp
! 23f4d6ca616391fee0e50b82ee4e7141  libstdc++-v3/include/ext/pb_ds/detail/hash_fn/sample_ranged_probe_fn.hpp
! 7b9a9ea6f967924674fb22b27ceb6952  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/const_iterator.hpp
! 0cf1223f8e194eb032af1b7d25c8d085  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/constructors_destructor_fn_imps.hpp
! a9eb5f0bbf33d2b88f1264341132d258  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/debug_fn_imps.hpp
! 2320a629375f8d96da9032c849a054c7  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/erase_fn_imps.hpp
! 99f426a288f4cee25915c4313b32f316  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/info_fn_imps.hpp
! e078e5e7dabc47d934c15e35305a378a  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/insert_fn_imps.hpp
! 38d9d842b99ee52789186a0e32329782  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/iterators_fn_imps.hpp
! 58bfd4876376fce05a2cb548bc9d8cb6  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/left_child_next_sibling_heap_.hpp
! 38e2f5b3db48fd90b3f9949b328cc4b8  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/node.hpp
! 211a7b8563c796558463cfc7558e3f7e  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/point_const_iterator.hpp
! 8e723b6cde64e2d7fc57c9331277da88  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/policy_access_fn_imps.hpp
! 1849b4fadb8db2f1021d0da414f9f4ff  libstdc++-v3/include/ext/pb_ds/detail/left_child_next_sibling_heap_/trace_fn_imps.hpp
! b7ed84ec9fe999a10705499b41391f8a  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/constructor_destructor_fn_imps.hpp
! 761ec9fce0fcee85c342557e15b83399  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/debug_fn_imps.hpp
! 3f3daf3e561e0fc7ba319752654bb180  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/entry_metadata_base.hpp
! a4a1a93b271f7043341855a4f0508b71  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/erase_fn_imps.hpp
! 9d75a0135640cc219bab37c11be41ddb  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/find_fn_imps.hpp
! 524c0de86a22ddafc92366d8b18f603c  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/info_fn_imps.hpp
! adb507c1582ded32a13146a64e436cc5  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/insert_fn_imps.hpp
! f095a8468740d174cb558702f1f42e77  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/iterators_fn_imps.hpp
! 2c87d9dd1590f50fa0c06b316999d1b2  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/lu_map_.hpp
! 8ec65c44f878b0bac7209672f211b1f0  libstdc++-v3/include/ext/pb_ds/detail/list_update_map_/trace_fn_imps.hpp
! 32d4a82d5316f3b936cbb2589bd768a0  libstdc++-v3/include/ext/pb_ds/detail/list_update_policy/lu_counter_metadata.hpp
! 70eb1c1bb8999ca3f98eb2dfb1da1663  libstdc++-v3/include/ext/pb_ds/detail/list_update_policy/sample_update_policy.hpp
! a95a318d77d92aba4b5d1e40021c5881  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/constructors_destructor_fn_imps.hpp
! d82b98be0166359f646edb91c3ed1242  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/debug_fn_imps.hpp
! ec607253c8f566e56296356992749fba  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/erase_fn_imps.hpp
! d7e64f36a414c6bd7c3966185c1a2f9f  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/info_fn_imps.hpp
! e4bfe4ac62036d79e4893cd09574a56c  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/insert_fn_imps.hpp
! 2202fb1bb18f7ff130427550ca74330d  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/iterators_fn_imps.hpp
! 09430a15653827836d90f955792b7067  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/node_iterators.hpp
! 156b155d90d3576ca03d1a960317701c  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/ov_tree_map_.hpp
! 5fcd7e56be4993427d46085b374676ad  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/policy_access_fn_imps.hpp
! fd6e1630f93c5aab96ddbe171b6de7c3  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/split_join_fn_imps.hpp
! e2f23c8210a9bf95bcda52311af103a7  libstdc++-v3/include/ext/pb_ds/detail/ov_tree_map_/traits.hpp
! cac37612407fe67952e187109a418293  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/constructors_destructor_fn_imps.hpp
! b01c43ec19f0a75753903064ad920d2f  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/debug_fn_imps.hpp
! b898edff9c5a695a76c56e083a801f80  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/erase_fn_imps.hpp
! 376e51213e6e93cac1205314307330d3  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/find_fn_imps.hpp
! 5799787eb66520f4df73a2c833520e6c  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/insert_fn_imps.hpp
! 18192e144b1a96bea05fa31b42c2d1f7  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/pairing_heap_.hpp
! 50d097f64a9c9ea5c846ed9af579aab9  libstdc++-v3/include/ext/pb_ds/detail/pairing_heap_/split_join_fn_imps.hpp
! cc5a3cc6ef2ee6e165136a02b4848675  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/constructors_destructor_fn_imps.hpp
! 6568f973d181bb2c54fa4467733dd8ed  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/debug_fn_imps.hpp
! 352320497ad198ba9f1b68b1a143c530  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/erase_fn_imps.hpp
! 176978c901bcdf60b79083fe161e4594  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/find_fn_imps.hpp
! 38b9c6bd35b452ddffdd1a089fdb6bb0  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/info_fn_imps.hpp
! 900c911538266335e9841dbfcb625309  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/insert_join_fn_imps.hpp
! 1a757b81f631fa01057b19215862f776  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/iterators_fn_imps.hpp
! 28ddb759d2724668bbfc1d705d66c8d4  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/pat_trie_.hpp
! 8f56fdb56b0d38165d47eca4befedf08  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/pat_trie_base.hpp
! aca9b3d1cb91130ad81b174bb00bd97f  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/policy_access_fn_imps.hpp
! 24ef2c4e44b7e42a07c3133369078fcc  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/r_erase_fn_imps.hpp
! 74f8322e8aa8f84fda8aa68958e7a3ca  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/rotate_fn_imps.hpp
! a022a65437a22da9c2babe43d0477a7e  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/split_fn_imps.hpp
! 5f5f32f9ed34ea6147498b94d2a68c69  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/synth_access_traits.hpp
! 872301811c50ffb3e025d5d1fc5d09e5  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/trace_fn_imps.hpp
! fa308146db463b3654f9a21a7e18c95e  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/traits.hpp
! 4f193f427b95b34ba0c0be677734658e  libstdc++-v3/include/ext/pb_ds/detail/pat_trie_/update_fn_imps.hpp
! 5ef784db231c332584c922e05574eb65  libstdc++-v3/include/ext/pb_ds/detail/priority_queue_base_dispatch.hpp
! af9b49ff3d2ca10fece69e7e5bc7d345  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/constructors_destructor_fn_imps.hpp
! 4881b0949abb734a7f899f1ba0cbd76b  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/debug_fn_imps.hpp
! 0a048e06f76904d239b1f5930ee64c1b  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/erase_fn_imps.hpp
! 5a67f3933e480deeb31b3c4c1bf8897e  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/find_fn_imps.hpp
! 919f87b918c7e09204d008c532c9b3a1  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/info_fn_imps.hpp
! 67a5c8ce99a100ccf3edc19d37d53291  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/insert_fn_imps.hpp
! c45e00bea606e108c2cf3c3486fc2855  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/node.hpp
! 4b294076610a4d533f56cea0afed9260  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/rb_tree_.hpp
! c28b2959d6b59ab2236897d7736f46c4  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/split_join_fn_imps.hpp
! 780cd5788d159da5551e139277215707  libstdc++-v3/include/ext/pb_ds/detail/rb_tree_map_/traits.hpp
! 98fe6cc6961a7ff8d840512591afb2fd  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/constructors_destructor_fn_imps.hpp
! 0cb6734b2dd3653a648721d93508939c  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/debug_fn_imps.hpp
! c6a4cb999fb5457b2065afb941ce35cd  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/erase_fn_imps.hpp
! faea8a5a0563aa742ed78559f0398826  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/insert_fn_imps.hpp
! 233a96f9b79ceeed9c7b93b69800ea4e  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/rc.hpp
! f9f5ab5929d890f8c02e864d8b1a5d38  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/rc_binomial_heap_.hpp
! b90f34cace7d206cb2515a481cdbcac0  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/split_join_fn_imps.hpp
! c8853fa379eda40d10b671b107fd64a8  libstdc++-v3/include/ext/pb_ds/detail/rc_binomial_heap_/trace_fn_imps.hpp
! 23ad56e8f307d676dec39959b3b928ea  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/cc_hash_max_collision_check_resize_trigger_imp.hpp
! 94ec69d527011dab6b531c8ca1ec2e00  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/hash_exponential_size_policy_imp.hpp
! a042e359c591ad9a3edef184dcdb2245  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/hash_load_check_resize_trigger_imp.hpp
! 025a31c788d6e5d4c0f45468a2562fc4  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/hash_load_check_resize_trigger_size_base.hpp
! 0d5ba9c32ca44c6debc22558fbd8d83f  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/hash_prime_size_policy_imp.hpp
! b2640ee3c98deb8d15fefb769d4c5e59  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/hash_standard_resize_policy_imp.hpp
! 06fb6f8c5b2e201d6f219f8178121e53  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/sample_resize_policy.hpp
! 123c1a369b5fbd3da5da3d2f9fc48289  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/sample_resize_trigger.hpp
! bb3a98f43b20fab06ba02bacbf8c2be3  libstdc++-v3/include/ext/pb_ds/detail/resize_policy/sample_size_policy.hpp
! d58e71b7ebeeff20c5c0c139da9e1877  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/constructors_destructor_fn_imps.hpp
! 57b56835540d7423c51f803ddb493dc6  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/debug_fn_imps.hpp
! 20eb0f703cc1e4ba47e0c1ff5472e354  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/erase_fn_imps.hpp
! 27647a8589e5233112c9aed689a35c6d  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/find_fn_imps.hpp
! 49bb217af7c92e4607317559cc63e484  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/info_fn_imps.hpp
! bce521f459304675c9ba247c195c41ba  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/insert_fn_imps.hpp
! a80e4c9ccd1ecb0480e664043efc5d87  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/node.hpp
! 8167a17e79761294d3d30ed8270fe4bc  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/splay_fn_imps.hpp
! 868fd42f3d1f67da49ea52c577d94b9a  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/splay_tree_.hpp
! 87b84fd47db236ecead789658c9fe22a  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/split_join_fn_imps.hpp
! c51fbf35bfb2ed6bca2b9bd0d36c38e2  libstdc++-v3/include/ext/pb_ds/detail/splay_tree_/traits.hpp
! e5d851bd9eb817cd312361eda9186c09  libstdc++-v3/include/ext/pb_ds/detail/standard_policies.hpp
! d6bcf0aaf62910d6555ef28e4e8dcc48  libstdc++-v3/include/ext/pb_ds/detail/thin_heap_/constructors_destructor_fn_imps.hpp
! 8c207145f8f3701ad1440fe625704e20  libstdc++-v3/include/ext/pb_ds/detail/thin_heap_/debug_fn_imps.hpp
! 6e2fc6eb82794a6d43c4405d49c3b97b  libstdc++-v3/include/ext/pb_ds/detail/thin_heap_/erase_fn_imps.hpp
! 6c31767d0bf88c45835c8a000efe5962  libstdc++-v3/include/ext/pb_ds/detail/thin_heap_/find_fn_imps.hpp
! 6729bd63c9d2e43bc1d38f4cd1f7e6b7  libstdc++-v3/include/ext/pb_ds/detail/thin_heap_/insert_fn_imps.hpp
! b507495f18712ee7c187c78d0bfa7af1  libstdc++-v3/include/ext/pb_ds/detail/thin_heap_/split_join_fn_imps.hpp
! a1f4e5ad7687c7e52ed58a15ec0d7d74  libstdc++-v3/include/ext/pb_ds/detail/thin_heap_/thin_heap_.hpp
! aafffe56cd3e27114f5ec53b8ca0a9f6  libstdc++-v3/include/ext/pb_ds/detail/thin_heap_/trace_fn_imps.hpp
! f7e3aea46adee0c2a51e1c78b1cb7abd  libstdc++-v3/include/ext/pb_ds/detail/tree_policy/node_metadata_selector.hpp
! 387a92150c8cf19de2fe19691670f6a5  libstdc++-v3/include/ext/pb_ds/detail/tree_policy/order_statistics_imp.hpp
! 749ac3d646fe51ee40dd1a97c1463b29  libstdc++-v3/include/ext/pb_ds/detail/tree_policy/sample_tree_node_update.hpp
! 9727467c1602d3d7165626a6fdc3a815  libstdc++-v3/include/ext/pb_ds/detail/tree_trace_base.hpp
! 6b006c807bb1fbbc9221607152666d3c  libstdc++-v3/include/ext/pb_ds/detail/trie_policy/node_metadata_selector.hpp
! 4c5ee3b8a4a1d2d156daf15c4a373bcc  libstdc++-v3/include/ext/pb_ds/detail/trie_policy/order_statistics_imp.hpp
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! 6e88fdbb76b9d296216979867d57a827  libstdc++-v3/testsuite/tr1/5_numerical_facilities/random/subtract_with_carry/operators/serialize.cc
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! 974b9e1c227c011d59e2b9bcd1a3f2b5  libstdc++-v3/testsuite/tr1/5_numerical_facilities/random/subtract_with_carry_01/operators/equal.cc
! 1ad71ef2b703e8e235e170a3f2fb8121  libstdc++-v3/testsuite/tr1/5_numerical_facilities/random/subtract_with_carry_01/operators/not_equal.cc
! 5c301db44f92eb9f8e11aee37ae65228  libstdc++-v3/testsuite/tr1/5_numerical_facilities/random/subtract_with_carry_01/operators/serialize.cc
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! bddce709e27b45be272357c520398137  libstdc++-v3/testsuite/tr1/5_numerical_facilities/random/subtract_with_carry_01/requirements/typedefs.cc
! 1a8cf4a285a4ff972ebe33d97bffd613  libstdc++-v3/testsuite/tr1/5_numerical_facilities/random/uniform_int/33128.cc
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! 2f3f39bff685b1e524af12aa5dc6b473  libstdc++-v3/testsuite/tr1/5_numerical_facilities/random/uniform_int/cons/range.cc
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! 343c1c6603facc0eda27c234ec5c3285  libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions/08_cyl_bessel_i/pr56216.cc
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! 0161e162edcaa91a076cc12b828ba486  libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions/10_cyl_bessel_k/airy.cc
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--- 98198,99956 ----
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! 1bb97ed3fbbde890e7468ce522d97149  libstdc++-v3/testsuite/tr1/5_numerical_facilities/random/subtract_with_carry_01/cons/seed1.cc
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! 9bb8389f460fce517bb4b4e19943f384  libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions/08_cyl_bessel_i/pr56216.cc
! 46cdd24f6e6f350b20cc23058b4de11f  libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions/09_cyl_bessel_j/check_nan.cc
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! 2b51bb80cb126792378adf750d81aa35  libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions/10_cyl_bessel_k/airy.cc
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! a87c22dc42b89c5e3d89ae23cb64628f  libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions/10_cyl_bessel_k/check_value.cc
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! 4c166d78310cb811f1e158cc13de87b8  libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions/22_sph_legendre/pr86655.cc
! 7da32d1b9791916569c1895daf93860c  libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions/23_sph_neumann/check_nan.cc
! d2de8c6cf1fd232931e41ada022c7918  libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions/23_sph_neumann/check_value.cc
! 991e282b1f3e6b98428e31256814a328  libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions/23_sph_neumann/compile.cc
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! 23e146f8e094ffa226b68393a51e19ea  libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions/testcase.h
! 4f41d0a6ba2d8d3166246a1a1c10d78e  libstdc++-v3/testsuite/tr1/6_containers/array/capacity/empty.cc
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! 181751850934437a6c1eff96aba5573a  libvtv/configure.tgt
  2caccd848c579fcddd2a8c8106cfaff9  libvtv/scripts/run-testsuite.sh
  09a6150d1619f2508d7844f860b3382c  libvtv/scripts/sum-vtv-counts.c
  4835ec70e1fbcd9acd3c280c0060afa4  libvtv/testsuite/Makefile.am
! fda4739e0005be93900b671246d786ff  libvtv/testsuite/Makefile.in
! 76111a54e591159d4e60db5cd1d2081a  libvtv/testsuite/config/default.exp
  c3135c06118981205f468524e15716be  libvtv/testsuite/lib/libvtv-dg.exp
  b01596489f4e825c77d9429f5bd51424  libvtv/testsuite/lib/libvtv.exp
  dc26824f08dd227e0cba7e7ebc8f4d3a  libvtv/testsuite/libvtv.cc/bb_tests.cc
*************** e18c427700b2de867318b8dfb4ccdc4e  libvtv
*** 88903,88909 ****
  1af090cb318f05dcac1de1af35049bf3  libvtv/testsuite/libvtv.cc/thunk.cc
  4342d1f35d7a127cbf072aea14c40ca4  libvtv/testsuite/libvtv.cc/thunk_vtable_map_attack.cc
  af622745e9d1ebd1a80806c6a477adda  libvtv/testsuite/libvtv.cc/v8-test-2.cc
! 52786749b5555a734d1168d6cd549cf2  libvtv/testsuite/libvtv.cc/virtfunc-test.cc
  02687d81e25b3d8b61f75737f0a618a9  libvtv/testsuite/libvtv.cc/virtual_inheritance.cc
  85e4bee8e57399ebf8c098da2a829dd0  libvtv/testsuite/libvtv.cc/vtv.exp
  85942493419912cb30bceeaf62d53da8  libvtv/testsuite/libvtv.cc/xlan-test.cc
--- 99986,99992 ----
  1af090cb318f05dcac1de1af35049bf3  libvtv/testsuite/libvtv.cc/thunk.cc
  4342d1f35d7a127cbf072aea14c40ca4  libvtv/testsuite/libvtv.cc/thunk_vtable_map_attack.cc
  af622745e9d1ebd1a80806c6a477adda  libvtv/testsuite/libvtv.cc/v8-test-2.cc
! c4e631e29a53fe986188426c2287221f  libvtv/testsuite/libvtv.cc/virtfunc-test.cc
  02687d81e25b3d8b61f75737f0a618a9  libvtv/testsuite/libvtv.cc/virtual_inheritance.cc
  85e4bee8e57399ebf8c098da2a829dd0  libvtv/testsuite/libvtv.cc/vtv.exp
  85942493419912cb30bceeaf62d53da8  libvtv/testsuite/libvtv.cc/xlan-test.cc
*************** dc2332c7582cf3d236d0ee930f63eca3  libvtv
*** 88913,88919 ****
  8ef0aa7efe1764eeb6f68dbd51e6d4b5  libvtv/testsuite/libvtv.mt.cc/mt.exp
  bb4ece037690dc6ecdd0c04662562123  libvtv/testsuite/libvtv.mt.cc/register_set_pair_inserts_mt.cc
  4028191848aead5f1025ef6d51d6460e  libvtv/testsuite/libvtv.mt.cc/register_set_pair_mt.cc
! 8e809d26a2669f7635aace7b3faff492  libvtv/testsuite/other-tests/Makefile.am
  481aa959d973aa72ca282a2b6db129e3  libvtv/testsuite/other-tests/Makefile.in
  ed7bc4ea169d6384a32fd76063d7af7f  libvtv/testsuite/other-tests/README
  32bbdc8e2683c298b41d8d68281dd6ea  libvtv/testsuite/other-tests/dlopen.cc
--- 99996,100002 ----
  8ef0aa7efe1764eeb6f68dbd51e6d4b5  libvtv/testsuite/libvtv.mt.cc/mt.exp
  bb4ece037690dc6ecdd0c04662562123  libvtv/testsuite/libvtv.mt.cc/register_set_pair_inserts_mt.cc
  4028191848aead5f1025ef6d51d6460e  libvtv/testsuite/libvtv.mt.cc/register_set_pair_mt.cc
! e073eb22d2508bce8c8d2b863c7c9a6b  libvtv/testsuite/other-tests/Makefile.am
  481aa959d973aa72ca282a2b6db129e3  libvtv/testsuite/other-tests/Makefile.in
  ed7bc4ea169d6384a32fd76063d7af7f  libvtv/testsuite/other-tests/README
  32bbdc8e2683c298b41d8d68281dd6ea  libvtv/testsuite/other-tests/dlopen.cc
*************** a39c1926ca0a1bac2ffa3e5389fe2eb2  libvtv
*** 88926,88966 ****
  fd1ee5c194e5759320643df81103775d  libvtv/testsuite/other-tests/temp_deriv.cc
  a28f0d44162e9d978de21ea4c82b411e  libvtv/testsuite/other-tests/temp_deriv2.cc
  fd44dfd4ba421163f0a14a74988ea97a  libvtv/testsuite/other-tests/temp_deriv3.cc
! 4f87d21bed9683f9ca9e1901deeadfea  libvtv/vtv_fail.cc
! e294c6c4ec795c9ccf2a4b530b0ed408  libvtv/vtv_fail.h
! 30f45ae3b29e3a4d11e34a389e4f8140  libvtv/vtv_malloc.cc
! 803df7acdab2d89b54009eb7a6eadefa  libvtv/vtv_malloc.h
! 12f7b64229b04285a30978ff3ac52a74  libvtv/vtv_map.h
! 891003575f85f0b8de53c3f2bb816343  libvtv/vtv_rts.cc
! a317e957f6643aa8ccea2dc901b5cdb4  libvtv/vtv_rts.h
! 5489cd61d7e71d8b3793adb387ce4935  libvtv/vtv_set.h
! 07be9ae5a061b1704e19be77a93b3eec  libvtv/vtv_utils.cc
! e9f5d4b7990250a14c410038615b7897  libvtv/vtv_utils.h
  247597a3fcc5b5aa8bd923351c59d853  ltgcc.m4
! 87f3355387aff1fb857503a8aa3a0900  ltmain.sh
! f59907839a3101c6b9907fc724cdda63  lto-plugin/ChangeLog
! 1d51b0f01f4db0f88d302ab0d691514e  lto-plugin/Makefile.am
! 80423554a39cbd842c3d9464b3723033  lto-plugin/Makefile.in
! e60b1443b7156a65450aa31b80bb99fe  lto-plugin/aclocal.m4
  de4c999b99ec1e3d1bcb8a340bd8d5fd  lto-plugin/config.h.in
! 6c867cf58837ede9762b82e678704965  lto-plugin/configure
! 78f70104a4d85245fe64bc96937fab66  lto-plugin/configure.ac
! 2e733a4c86b85fdc118e1d98f7cdae1d  lto-plugin/lto-plugin.c
  dee72a6a60e99528b0d17bf3ff9a1e15  ltoptions.m4
  bc2f6032c98896249eadb56177c7d357  ltsugar.m4
  c30cd33c496505f13d9fbdb6970c7c33  ltversion.m4
  293853a13b7e218e3a4342cf85fbbf25  lt~obsolete.m4
! 008c087d32c7a31acb531dc556f64ec6  maintainer-scripts/ChangeLog
  33c7bc2d2c55956dfac85a05d8a80eff  maintainer-scripts/README
  e70ffb6559f8817db41ee1e69bc60287  maintainer-scripts/branch_changer.py
  1c3f2c7d87d076b4209a2a03844292e5  maintainer-scripts/bugzilla-close-candidate.py
! c5ab0e8e81e81d0d367d5ee595214eb5  maintainer-scripts/crontab
! 620ae3c62e6c74ccb247213dc969810e  maintainer-scripts/gcc_release
  4b085aa82b5f2fe789828063eed76560  maintainer-scripts/generate_libstdcxx_web_docs
  33d97164a8610c7abf67eff7d28f47ff  maintainer-scripts/maintainer-addresses
! 9277094fc32569de284ee22055219dbd  maintainer-scripts/update_version_svn
! c8dfca01bf19508e40afff1dcd255211  maintainer-scripts/update_web_docs_libstdcxx_svn
! 373d5509f5793e70220367f0fb2c94b0  maintainer-scripts/update_web_docs_svn
  5f2a276ee7b8decec541391229d03591  missing
  fbe2467afef81c41c166173adeb0ee20  mkdep
  82b7b70a9845ee61a01f20b29dd2df2c  mkinstalldirs
--- 100009,100049 ----
  fd1ee5c194e5759320643df81103775d  libvtv/testsuite/other-tests/temp_deriv.cc
  a28f0d44162e9d978de21ea4c82b411e  libvtv/testsuite/other-tests/temp_deriv2.cc
  fd44dfd4ba421163f0a14a74988ea97a  libvtv/testsuite/other-tests/temp_deriv3.cc
! 0aba91225d7dee651d64e984016debfa  libvtv/vtv_fail.cc
! 6c571fa3c4c337c1d398b0f740a4f3cf  libvtv/vtv_fail.h
! 82a7d51fef33fff5f3aa15e7f3d5663b  libvtv/vtv_malloc.cc
! 4af5fc628525a6de293034484c0d5abf  libvtv/vtv_malloc.h
! 9b48afb11e9e44388a31a53584b58459  libvtv/vtv_map.h
! 90a1672a9f63f6c22b651b23afe76d73  libvtv/vtv_rts.cc
! 70999a0ec1f5ac82e966be6b96e17a3b  libvtv/vtv_rts.h
! a82059e4cf6d1733664ef9a8ac817f42  libvtv/vtv_set.h
! 1602ba13934ec1d95d37bb6203bdacdf  libvtv/vtv_utils.cc
! f1ea2b13357bfe01c43d3b6fbf31fd48  libvtv/vtv_utils.h
  247597a3fcc5b5aa8bd923351c59d853  ltgcc.m4
! 06c2854f9cfe5864b2885e0d0e9c512f  ltmain.sh
! 7097ae4c1fe9779962ba793384dfee88  lto-plugin/ChangeLog
! 48ea87886a6a768ab6024edccc8e1e31  lto-plugin/Makefile.am
! 9113360bfd397d09dc99413406c60ad4  lto-plugin/Makefile.in
! 75fc65b35d0a47ac098f7a278d37060b  lto-plugin/aclocal.m4
  de4c999b99ec1e3d1bcb8a340bd8d5fd  lto-plugin/config.h.in
! 662f9677f9908970341df230d554725f  lto-plugin/configure
! 94b1550691bec5ce21db143723d02984  lto-plugin/configure.ac
! 5cddfbef2711e18d36f2a275c365c824  lto-plugin/lto-plugin.c
  dee72a6a60e99528b0d17bf3ff9a1e15  ltoptions.m4
  bc2f6032c98896249eadb56177c7d357  ltsugar.m4
  c30cd33c496505f13d9fbdb6970c7c33  ltversion.m4
  293853a13b7e218e3a4342cf85fbbf25  lt~obsolete.m4
! 927474efa200663a7bc198235bdd0ffb  maintainer-scripts/ChangeLog
  33c7bc2d2c55956dfac85a05d8a80eff  maintainer-scripts/README
  e70ffb6559f8817db41ee1e69bc60287  maintainer-scripts/branch_changer.py
  1c3f2c7d87d076b4209a2a03844292e5  maintainer-scripts/bugzilla-close-candidate.py
! 5ff187bd37be8a647a82b6a2d1ac321a  maintainer-scripts/crontab
! 1777fbf3e6a3232bd6898ce857cdf2fd  maintainer-scripts/gcc_release
  4b085aa82b5f2fe789828063eed76560  maintainer-scripts/generate_libstdcxx_web_docs
  33d97164a8610c7abf67eff7d28f47ff  maintainer-scripts/maintainer-addresses
! e310820d0266ff02d41632dca1290258  maintainer-scripts/update_version_git
! 4c0406d5444d6d2dc128b2d342d9e0ad  maintainer-scripts/update_web_docs_git
! 89960da3ee98bea76c62bf0bf235d1f9  maintainer-scripts/update_web_docs_libstdcxx_git
  5f2a276ee7b8decec541391229d03591  missing
  fbe2467afef81c41c166173adeb0ee20  mkdep
  82b7b70a9845ee61a01f20b29dd2df2c  mkinstalldirs
*************** cf2baa0854f564a7785307e79f155efc  symlin
*** 88970,88991 ****
  40bb1f4ce4a60a36d1ec50d66aeed4d1  test-driver
  cb06c1be6a41d68b0a65e0c1a91752bc  ylwrap
  03bf3ba8089f4bf475ef4035cf316a47  zlib/CMakeLists.txt
! c8b4d7fe4fa0b5836971dc592bc92cde  zlib/ChangeLog
! 969dcade0d3b806b7eaf5f16573a528d  zlib/ChangeLog.gcj
  0e9a37be8e3b85cc0ccf60504064c297  zlib/ChangeLog.jit
  b7a1991f01daea3efe108a215c5514a5  zlib/FAQ
  3b6b6f9e88f2319b75e6ccb8c2823b13  zlib/INDEX
  25047d2620ec967dac4c119856046247  zlib/Makefile.am
! 97d4189b2804b76a8dcceab68b05057c  zlib/Makefile.in
  26a915e4bc7d8d65872c524a4716e51e  zlib/README
  004a8c34eba1b805f836a09dd4759f34  zlib/acinclude.m4
! 7b64b28d6109d665486b10daa1cc5386  zlib/aclocal.m4
  088f835e49176d2c289162fe277f1433  zlib/adler32.c
  f16cd4621f5561cf147b5e56a8af1946  zlib/amiga/Makefile.pup
  315c9e3e7dd1d24aeb9d6bc55b7de5fd  zlib/amiga/Makefile.sas
  68c4c1f6c737d307d372130351b123a6  zlib/compress.c
! aa61475cb2800c89d4f44ed4d862dc73  zlib/configure
! c1bb97a9d6520df89e9390c353b9a9bd  zlib/configure.ac
  417c6b266549b949b958733f95d075ef  zlib/contrib/README.contrib
  cd14a97dd8a0613bb1244a68c0c764d6  zlib/contrib/ada/buffer_demo.adb
  20f2b8d64f3507ea0eb67bf4be048599  zlib/contrib/ada/mtest.adb
--- 100053,100074 ----
  40bb1f4ce4a60a36d1ec50d66aeed4d1  test-driver
  cb06c1be6a41d68b0a65e0c1a91752bc  ylwrap
  03bf3ba8089f4bf475ef4035cf316a47  zlib/CMakeLists.txt
! a9f6f61771e32ee3fc8a72278e7c4b94  zlib/ChangeLog
! 25f33f86e95b8478cd142323485efc71  zlib/ChangeLog.gcj
  0e9a37be8e3b85cc0ccf60504064c297  zlib/ChangeLog.jit
  b7a1991f01daea3efe108a215c5514a5  zlib/FAQ
  3b6b6f9e88f2319b75e6ccb8c2823b13  zlib/INDEX
  25047d2620ec967dac4c119856046247  zlib/Makefile.am
! a1afc9bc4fa1a74bc70e7e21cab261c7  zlib/Makefile.in
  26a915e4bc7d8d65872c524a4716e51e  zlib/README
  004a8c34eba1b805f836a09dd4759f34  zlib/acinclude.m4
! 289526b193c827263e64831c2e0a9e59  zlib/aclocal.m4
  088f835e49176d2c289162fe277f1433  zlib/adler32.c
  f16cd4621f5561cf147b5e56a8af1946  zlib/amiga/Makefile.pup
  315c9e3e7dd1d24aeb9d6bc55b7de5fd  zlib/amiga/Makefile.sas
  68c4c1f6c737d307d372130351b123a6  zlib/compress.c
! 2c9cad787ecc2e70aedcb455660fe65e  zlib/configure
! d49a63cde18e27f7df4064042988efe2  zlib/configure.ac
  417c6b266549b949b958733f95d075ef  zlib/contrib/README.contrib
  cd14a97dd8a0613bb1244a68c0c764d6  zlib/contrib/ada/buffer_demo.adb
  20f2b8d64f3507ea0eb67bf4be048599  zlib/contrib/ada/mtest.adb
diff -Nrcpad gcc-9.3.0/Makefile.def gcc-10.1.0/Makefile.def
*** gcc-9.3.0/Makefile.def	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/Makefile.def	Thu May  7 10:49:58 2020
*************** AutoGen definitions Makefile.tpl;
*** 4,10 ****
  // Makefile.in is generated from Makefile.tpl by 'autogen Makefile.def'.
  // This file was originally written by Nathanael Nerode.
  //
! //   Copyright 2002-2013 Free Software Foundation
  //
  // This file is free software; you can redistribute it and/or modify
  // it under the terms of the GNU General Public License as published by
--- 4,10 ----
  // Makefile.in is generated from Makefile.tpl by 'autogen Makefile.def'.
  // This file was originally written by Nathanael Nerode.
  //
! //   Copyright 2002-2019 Free Software Foundation
  //
  // This file is free software; you can redistribute it and/or modify
  // it under the terms of the GNU General Public License as published by
*************** host_modules= { module= texinfo; no_inst
*** 112,117 ****
--- 112,120 ----
  host_modules= { module= zlib; no_install=true; no_check=true;
  		bootstrap=true;
  	        extra_configure_flags='@extra_host_zlib_configure_flags@';};
+ host_modules= { module= gnulib; };
+ host_modules= { module= gdbsupport; };
+ host_modules= { module= gdbserver; };
  host_modules= { module= gdb; };
  host_modules= { module= expect; };
  host_modules= { module= guile; };
*************** host_modules= { module= lto-plugin; boot
*** 128,133 ****
--- 131,138 ----
  		extra_make_flags='@extra_linker_plugin_flags@'; };
  host_modules= { module= libcc1; extra_configure_flags=--enable-shared; };
  host_modules= { module= gotools; };
+ host_modules= { module= libctf; no_install=true; no_check=true;
+ 		bootstrap=true; };
  
  target_modules = { module= libstdc++-v3;
  		   bootstrap=true;
*************** dependencies = { module=all-intl; on=all
*** 390,406 ****
--- 395,422 ----
  dependencies = { module=configure-gdb; on=all-intl; };
  dependencies = { module=configure-gdb; on=configure-sim; };
  dependencies = { module=configure-gdb; on=all-bfd; };
+ dependencies = { module=configure-gdb; on=all-gnulib; };
+ dependencies = { module=configure-gdb; on=all-gdbsupport; };
  // Depend on all-libiconv so that configure checks for iconv
  // functions will work.
  dependencies = { module=configure-gdb; on=all-libiconv; };
  dependencies = { module=all-gdb; on=all-libiberty; };
  dependencies = { module=all-gdb; on=all-libiconv; };
+ dependencies = { module=all-gdb; on=all-gnulib; };
+ dependencies = { module=all-gdb; on=all-gdbsupport; };
  dependencies = { module=all-gdb; on=all-opcodes; };
  dependencies = { module=all-gdb; on=all-readline; };
  dependencies = { module=all-gdb; on=all-build-bison; };
  dependencies = { module=all-gdb; on=all-sim; };
  dependencies = { module=all-gdb; on=all-libdecnumber; };
  dependencies = { module=all-gdb; on=all-libtermcap; };
+ dependencies = { module=all-gdb; on=all-libctf; };
+ 
+ // Host modules specific to gdbserver.
+ dependencies = { module=configure-gdbserver; on=all-gnulib; };
+ dependencies = { module=all-gdbserver; on=all-gdbsupport; };
+ dependencies = { module=all-gdbserver; on=all-gnulib; };
+ dependencies = { module=all-gdbserver; on=all-libiberty; };
  
  dependencies = { module=configure-libgui; on=configure-tcl; };
  dependencies = { module=configure-libgui; on=configure-tk; };
*************** dependencies = { module=all-libgui; on=a
*** 408,413 ****
--- 424,434 ----
  dependencies = { module=all-libgui; on=all-tk; };
  dependencies = { module=all-libgui; on=all-itcl; };
  
+ dependencies = { module=configure-gdbsupport; on=configure-gnulib; };
+ dependencies = { module=configure-gdbsupport; on=configure-intl; };
+ dependencies = { module=all-gdbsupport; on=all-gnulib; };
+ dependencies = { module=all-gdbsupport; on=all-intl; };
+ 
  // Host modules specific to binutils.
  dependencies = { module=configure-bfd; on=configure-libiberty; hard=true; };
  dependencies = { module=configure-bfd; on=configure-intl; };
*************** dependencies = { module=all-binutils; on
*** 428,433 ****
--- 449,455 ----
  dependencies = { module=all-binutils; on=all-build-bison; };
  dependencies = { module=all-binutils; on=all-intl; };
  dependencies = { module=all-binutils; on=all-gas; };
+ dependencies = { module=all-binutils; on=all-libctf; };
  
  // We put install-opcodes before install-binutils because the installed
  // binutils might be on PATH, and they might need the shared opcodes
*************** dependencies = { module=all-sim; on=conf
*** 518,523 ****
--- 540,553 ----
  dependencies = { module=all-fastjar; on=all-zlib; };
  dependencies = { module=all-fastjar; on=all-build-texinfo; };
  dependencies = { module=all-fastjar; on=all-libiberty; };
+ dependencies = { module=all-libctf; on=all-libiberty; hard=true; };
+ dependencies = { module=all-libctf; on=all-bfd; };
+ dependencies = { module=all-libctf; on=all-zlib; };
+ // So that checking for ELF support in BFD from libctf configure is possible.
+ dependencies = { module=configure-libctf; on=all-bfd; };
+ dependencies = { module=configure-libctf; on=all-intl; };
+ dependencies = { module=configure-libctf; on=all-zlib; };
+ dependencies = { module=configure-libctf; on=all-libiconv; };
  
  // Warning, these are not well tested.
  dependencies = { module=all-bison; on=all-intl; };
diff -Nrcpad gcc-9.3.0/Makefile.in gcc-10.1.0/Makefile.in
*** gcc-9.3.0/Makefile.in	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/Makefile.in	Thu May  7 10:49:58 2020
*************** HOST_EXPORTS = \
*** 198,203 ****
--- 198,204 ----
  	AR="$(AR)"; export AR; \
  	AS="$(AS)"; export AS; \
  	CC_FOR_BUILD="$(CC_FOR_BUILD)"; export CC_FOR_BUILD; \
+ 	CXX_FOR_BUILD="$(CXX_FOR_BUILD)"; export CXX_FOR_BUILD; \
  	DLLTOOL="$(DLLTOOL)"; export DLLTOOL; \
  	LD="$(LD)"; export LD; \
  	LDFLAGS="$(STAGE1_LDFLAGS) $(LDFLAGS)"; export LDFLAGS; \
*************** configure-host:  \
*** 1027,1032 ****
--- 1028,1036 ----
      maybe-configure-sim \
      maybe-configure-texinfo \
      maybe-configure-zlib \
+     maybe-configure-gnulib \
+     maybe-configure-gdbsupport \
+     maybe-configure-gdbserver \
      maybe-configure-gdb \
      maybe-configure-expect \
      maybe-configure-guile \
*************** configure-host:  \
*** 1036,1042 ****
      maybe-configure-gnattools \
      maybe-configure-lto-plugin \
      maybe-configure-libcc1 \
!     maybe-configure-gotools
  .PHONY: configure-target
  configure-target:  \
      maybe-configure-target-libstdc++-v3 \
--- 1040,1047 ----
      maybe-configure-gnattools \
      maybe-configure-lto-plugin \
      maybe-configure-libcc1 \
!     maybe-configure-gotools \
!     maybe-configure-libctf
  .PHONY: configure-target
  configure-target:  \
      maybe-configure-target-libstdc++-v3 \
*************** all-host: maybe-all-texinfo
*** 1179,1184 ****
--- 1184,1192 ----
  @if zlib-no-bootstrap
  all-host: maybe-all-zlib
  @endif zlib-no-bootstrap
+ all-host: maybe-all-gnulib
+ all-host: maybe-all-gdbsupport
+ all-host: maybe-all-gdbserver
  all-host: maybe-all-gdb
  all-host: maybe-all-expect
  all-host: maybe-all-guile
*************** all-host: maybe-all-lto-plugin
*** 1191,1196 ****
--- 1199,1207 ----
  @endif lto-plugin-no-bootstrap
  all-host: maybe-all-libcc1
  all-host: maybe-all-gotools
+ @if libctf-no-bootstrap
+ all-host: maybe-all-libctf
+ @endif libctf-no-bootstrap
  
  .PHONY: all-target
  
*************** info-host: maybe-info-sid
*** 1281,1286 ****
--- 1292,1300 ----
  info-host: maybe-info-sim
  info-host: maybe-info-texinfo
  info-host: maybe-info-zlib
+ info-host: maybe-info-gnulib
+ info-host: maybe-info-gdbsupport
+ info-host: maybe-info-gdbserver
  info-host: maybe-info-gdb
  info-host: maybe-info-expect
  info-host: maybe-info-guile
*************** info-host: maybe-info-gnattools
*** 1291,1296 ****
--- 1305,1311 ----
  info-host: maybe-info-lto-plugin
  info-host: maybe-info-libcc1
  info-host: maybe-info-gotools
+ info-host: maybe-info-libctf
  
  .PHONY: info-target
  
*************** dvi-host: maybe-dvi-sid
*** 1366,1371 ****
--- 1381,1389 ----
  dvi-host: maybe-dvi-sim
  dvi-host: maybe-dvi-texinfo
  dvi-host: maybe-dvi-zlib
+ dvi-host: maybe-dvi-gnulib
+ dvi-host: maybe-dvi-gdbsupport
+ dvi-host: maybe-dvi-gdbserver
  dvi-host: maybe-dvi-gdb
  dvi-host: maybe-dvi-expect
  dvi-host: maybe-dvi-guile
*************** dvi-host: maybe-dvi-gnattools
*** 1376,1381 ****
--- 1394,1400 ----
  dvi-host: maybe-dvi-lto-plugin
  dvi-host: maybe-dvi-libcc1
  dvi-host: maybe-dvi-gotools
+ dvi-host: maybe-dvi-libctf
  
  .PHONY: dvi-target
  
*************** pdf-host: maybe-pdf-sid
*** 1451,1456 ****
--- 1470,1478 ----
  pdf-host: maybe-pdf-sim
  pdf-host: maybe-pdf-texinfo
  pdf-host: maybe-pdf-zlib
+ pdf-host: maybe-pdf-gnulib
+ pdf-host: maybe-pdf-gdbsupport
+ pdf-host: maybe-pdf-gdbserver
  pdf-host: maybe-pdf-gdb
  pdf-host: maybe-pdf-expect
  pdf-host: maybe-pdf-guile
*************** pdf-host: maybe-pdf-gnattools
*** 1461,1466 ****
--- 1483,1489 ----
  pdf-host: maybe-pdf-lto-plugin
  pdf-host: maybe-pdf-libcc1
  pdf-host: maybe-pdf-gotools
+ pdf-host: maybe-pdf-libctf
  
  .PHONY: pdf-target
  
*************** html-host: maybe-html-sid
*** 1536,1541 ****
--- 1559,1567 ----
  html-host: maybe-html-sim
  html-host: maybe-html-texinfo
  html-host: maybe-html-zlib
+ html-host: maybe-html-gnulib
+ html-host: maybe-html-gdbsupport
+ html-host: maybe-html-gdbserver
  html-host: maybe-html-gdb
  html-host: maybe-html-expect
  html-host: maybe-html-guile
*************** html-host: maybe-html-gnattools
*** 1546,1551 ****
--- 1572,1578 ----
  html-host: maybe-html-lto-plugin
  html-host: maybe-html-libcc1
  html-host: maybe-html-gotools
+ html-host: maybe-html-libctf
  
  .PHONY: html-target
  
*************** TAGS-host: maybe-TAGS-sid
*** 1621,1626 ****
--- 1648,1656 ----
  TAGS-host: maybe-TAGS-sim
  TAGS-host: maybe-TAGS-texinfo
  TAGS-host: maybe-TAGS-zlib
+ TAGS-host: maybe-TAGS-gnulib
+ TAGS-host: maybe-TAGS-gdbsupport
+ TAGS-host: maybe-TAGS-gdbserver
  TAGS-host: maybe-TAGS-gdb
  TAGS-host: maybe-TAGS-expect
  TAGS-host: maybe-TAGS-guile
*************** TAGS-host: maybe-TAGS-gnattools
*** 1631,1636 ****
--- 1661,1667 ----
  TAGS-host: maybe-TAGS-lto-plugin
  TAGS-host: maybe-TAGS-libcc1
  TAGS-host: maybe-TAGS-gotools
+ TAGS-host: maybe-TAGS-libctf
  
  .PHONY: TAGS-target
  
*************** install-info-host: maybe-install-info-si
*** 1706,1711 ****
--- 1737,1745 ----
  install-info-host: maybe-install-info-sim
  install-info-host: maybe-install-info-texinfo
  install-info-host: maybe-install-info-zlib
+ install-info-host: maybe-install-info-gnulib
+ install-info-host: maybe-install-info-gdbsupport
+ install-info-host: maybe-install-info-gdbserver
  install-info-host: maybe-install-info-gdb
  install-info-host: maybe-install-info-expect
  install-info-host: maybe-install-info-guile
*************** install-info-host: maybe-install-info-gn
*** 1716,1721 ****
--- 1750,1756 ----
  install-info-host: maybe-install-info-lto-plugin
  install-info-host: maybe-install-info-libcc1
  install-info-host: maybe-install-info-gotools
+ install-info-host: maybe-install-info-libctf
  
  .PHONY: install-info-target
  
*************** install-pdf-host: maybe-install-pdf-sid
*** 1791,1796 ****
--- 1826,1834 ----
  install-pdf-host: maybe-install-pdf-sim
  install-pdf-host: maybe-install-pdf-texinfo
  install-pdf-host: maybe-install-pdf-zlib
+ install-pdf-host: maybe-install-pdf-gnulib
+ install-pdf-host: maybe-install-pdf-gdbsupport
+ install-pdf-host: maybe-install-pdf-gdbserver
  install-pdf-host: maybe-install-pdf-gdb
  install-pdf-host: maybe-install-pdf-expect
  install-pdf-host: maybe-install-pdf-guile
*************** install-pdf-host: maybe-install-pdf-gnat
*** 1801,1806 ****
--- 1839,1845 ----
  install-pdf-host: maybe-install-pdf-lto-plugin
  install-pdf-host: maybe-install-pdf-libcc1
  install-pdf-host: maybe-install-pdf-gotools
+ install-pdf-host: maybe-install-pdf-libctf
  
  .PHONY: install-pdf-target
  
*************** install-html-host: maybe-install-html-si
*** 1876,1881 ****
--- 1915,1923 ----
  install-html-host: maybe-install-html-sim
  install-html-host: maybe-install-html-texinfo
  install-html-host: maybe-install-html-zlib
+ install-html-host: maybe-install-html-gnulib
+ install-html-host: maybe-install-html-gdbsupport
+ install-html-host: maybe-install-html-gdbserver
  install-html-host: maybe-install-html-gdb
  install-html-host: maybe-install-html-expect
  install-html-host: maybe-install-html-guile
*************** install-html-host: maybe-install-html-gn
*** 1886,1891 ****
--- 1928,1934 ----
  install-html-host: maybe-install-html-lto-plugin
  install-html-host: maybe-install-html-libcc1
  install-html-host: maybe-install-html-gotools
+ install-html-host: maybe-install-html-libctf
  
  .PHONY: install-html-target
  
*************** installcheck-host: maybe-installcheck-si
*** 1961,1966 ****
--- 2004,2012 ----
  installcheck-host: maybe-installcheck-sim
  installcheck-host: maybe-installcheck-texinfo
  installcheck-host: maybe-installcheck-zlib
+ installcheck-host: maybe-installcheck-gnulib
+ installcheck-host: maybe-installcheck-gdbsupport
+ installcheck-host: maybe-installcheck-gdbserver
  installcheck-host: maybe-installcheck-gdb
  installcheck-host: maybe-installcheck-expect
  installcheck-host: maybe-installcheck-guile
*************** installcheck-host: maybe-installcheck-gn
*** 1971,1976 ****
--- 2017,2023 ----
  installcheck-host: maybe-installcheck-lto-plugin
  installcheck-host: maybe-installcheck-libcc1
  installcheck-host: maybe-installcheck-gotools
+ installcheck-host: maybe-installcheck-libctf
  
  .PHONY: installcheck-target
  
*************** mostlyclean-host: maybe-mostlyclean-sid
*** 2046,2051 ****
--- 2093,2101 ----
  mostlyclean-host: maybe-mostlyclean-sim
  mostlyclean-host: maybe-mostlyclean-texinfo
  mostlyclean-host: maybe-mostlyclean-zlib
+ mostlyclean-host: maybe-mostlyclean-gnulib
+ mostlyclean-host: maybe-mostlyclean-gdbsupport
+ mostlyclean-host: maybe-mostlyclean-gdbserver
  mostlyclean-host: maybe-mostlyclean-gdb
  mostlyclean-host: maybe-mostlyclean-expect
  mostlyclean-host: maybe-mostlyclean-guile
*************** mostlyclean-host: maybe-mostlyclean-gnat
*** 2056,2061 ****
--- 2106,2112 ----
  mostlyclean-host: maybe-mostlyclean-lto-plugin
  mostlyclean-host: maybe-mostlyclean-libcc1
  mostlyclean-host: maybe-mostlyclean-gotools
+ mostlyclean-host: maybe-mostlyclean-libctf
  
  .PHONY: mostlyclean-target
  
*************** clean-host: maybe-clean-sid
*** 2131,2136 ****
--- 2182,2190 ----
  clean-host: maybe-clean-sim
  clean-host: maybe-clean-texinfo
  clean-host: maybe-clean-zlib
+ clean-host: maybe-clean-gnulib
+ clean-host: maybe-clean-gdbsupport
+ clean-host: maybe-clean-gdbserver
  clean-host: maybe-clean-gdb
  clean-host: maybe-clean-expect
  clean-host: maybe-clean-guile
*************** clean-host: maybe-clean-gnattools
*** 2141,2146 ****
--- 2195,2201 ----
  clean-host: maybe-clean-lto-plugin
  clean-host: maybe-clean-libcc1
  clean-host: maybe-clean-gotools
+ clean-host: maybe-clean-libctf
  
  .PHONY: clean-target
  
*************** distclean-host: maybe-distclean-sid
*** 2216,2221 ****
--- 2271,2279 ----
  distclean-host: maybe-distclean-sim
  distclean-host: maybe-distclean-texinfo
  distclean-host: maybe-distclean-zlib
+ distclean-host: maybe-distclean-gnulib
+ distclean-host: maybe-distclean-gdbsupport
+ distclean-host: maybe-distclean-gdbserver
  distclean-host: maybe-distclean-gdb
  distclean-host: maybe-distclean-expect
  distclean-host: maybe-distclean-guile
*************** distclean-host: maybe-distclean-gnattool
*** 2226,2231 ****
--- 2284,2290 ----
  distclean-host: maybe-distclean-lto-plugin
  distclean-host: maybe-distclean-libcc1
  distclean-host: maybe-distclean-gotools
+ distclean-host: maybe-distclean-libctf
  
  .PHONY: distclean-target
  
*************** maintainer-clean-host: maybe-maintainer-
*** 2301,2306 ****
--- 2360,2368 ----
  maintainer-clean-host: maybe-maintainer-clean-sim
  maintainer-clean-host: maybe-maintainer-clean-texinfo
  maintainer-clean-host: maybe-maintainer-clean-zlib
+ maintainer-clean-host: maybe-maintainer-clean-gnulib
+ maintainer-clean-host: maybe-maintainer-clean-gdbsupport
+ maintainer-clean-host: maybe-maintainer-clean-gdbserver
  maintainer-clean-host: maybe-maintainer-clean-gdb
  maintainer-clean-host: maybe-maintainer-clean-expect
  maintainer-clean-host: maybe-maintainer-clean-guile
*************** maintainer-clean-host: maybe-maintainer-
*** 2311,2316 ****
--- 2373,2379 ----
  maintainer-clean-host: maybe-maintainer-clean-lto-plugin
  maintainer-clean-host: maybe-maintainer-clean-libcc1
  maintainer-clean-host: maybe-maintainer-clean-gotools
+ maintainer-clean-host: maybe-maintainer-clean-libctf
  
  .PHONY: maintainer-clean-target
  
*************** check-host:  \
*** 2442,2447 ****
--- 2505,2513 ----
      maybe-check-sim \
      maybe-check-texinfo \
      maybe-check-zlib \
+     maybe-check-gnulib \
+     maybe-check-gdbsupport \
+     maybe-check-gdbserver \
      maybe-check-gdb \
      maybe-check-expect \
      maybe-check-guile \
*************** check-host:  \
*** 2451,2457 ****
      maybe-check-gnattools \
      maybe-check-lto-plugin \
      maybe-check-libcc1 \
!     maybe-check-gotools
  
  .PHONY: check-target
  check-target:  \
--- 2517,2524 ----
      maybe-check-gnattools \
      maybe-check-lto-plugin \
      maybe-check-libcc1 \
!     maybe-check-gotools \
!     maybe-check-libctf
  
  .PHONY: check-target
  check-target:  \
*************** install-host-nogcc:  \
*** 2574,2579 ****
--- 2641,2649 ----
      maybe-install-sim \
      maybe-install-texinfo \
      maybe-install-zlib \
+     maybe-install-gnulib \
+     maybe-install-gdbsupport \
+     maybe-install-gdbserver \
      maybe-install-gdb \
      maybe-install-expect \
      maybe-install-guile \
*************** install-host-nogcc:  \
*** 2583,2589 ****
      maybe-install-gnattools \
      maybe-install-lto-plugin \
      maybe-install-libcc1 \
!     maybe-install-gotools
  
  .PHONY: install-host
  install-host:  \
--- 2653,2660 ----
      maybe-install-gnattools \
      maybe-install-lto-plugin \
      maybe-install-libcc1 \
!     maybe-install-gotools \
!     maybe-install-libctf
  
  .PHONY: install-host
  install-host:  \
*************** install-host:  \
*** 2623,2628 ****
--- 2694,2702 ----
      maybe-install-sim \
      maybe-install-texinfo \
      maybe-install-zlib \
+     maybe-install-gnulib \
+     maybe-install-gdbsupport \
+     maybe-install-gdbserver \
      maybe-install-gdb \
      maybe-install-expect \
      maybe-install-guile \
*************** install-host:  \
*** 2632,2638 ****
      maybe-install-gnattools \
      maybe-install-lto-plugin \
      maybe-install-libcc1 \
!     maybe-install-gotools
  
  .PHONY: install-target
  install-target:  \
--- 2706,2713 ----
      maybe-install-gnattools \
      maybe-install-lto-plugin \
      maybe-install-libcc1 \
!     maybe-install-gotools \
!     maybe-install-libctf
  
  .PHONY: install-target
  install-target:  \
*************** install-strip-host:  \
*** 2728,2733 ****
--- 2803,2811 ----
      maybe-install-strip-sim \
      maybe-install-strip-texinfo \
      maybe-install-strip-zlib \
+     maybe-install-strip-gnulib \
+     maybe-install-strip-gdbsupport \
+     maybe-install-strip-gdbserver \
      maybe-install-strip-gdb \
      maybe-install-strip-expect \
      maybe-install-strip-guile \
*************** install-strip-host:  \
*** 2737,2743 ****
      maybe-install-strip-gnattools \
      maybe-install-strip-lto-plugin \
      maybe-install-strip-libcc1 \
!     maybe-install-strip-gotools
  
  .PHONY: install-strip-target
  install-strip-target:  \
--- 2815,2822 ----
      maybe-install-strip-gnattools \
      maybe-install-strip-lto-plugin \
      maybe-install-strip-libcc1 \
!     maybe-install-strip-gotools \
!     maybe-install-strip-libctf
  
  .PHONY: install-strip-target
  install-strip-target:  \
*************** maintainer-clean-zlib:
*** 33088,33093 ****
--- 33167,34495 ----
  
  
  
+ .PHONY: configure-gnulib maybe-configure-gnulib
+ maybe-configure-gnulib:
+ @if gcc-bootstrap
+ configure-gnulib: stage_current
+ @endif gcc-bootstrap
+ @if gnulib
+ maybe-configure-gnulib: configure-gnulib
+ configure-gnulib: 
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	test ! -f $(HOST_SUBDIR)/gnulib/Makefile || exit 0; \
+ 	$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gnulib; \
+ 	$(HOST_EXPORTS)  \
+ 	echo Configuring in $(HOST_SUBDIR)/gnulib; \
+ 	cd "$(HOST_SUBDIR)/gnulib" || exit 1; \
+ 	case $(srcdir) in \
+ 	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ 	  *) topdir=`echo $(HOST_SUBDIR)/gnulib/ | \
+ 		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ 	esac; \
+ 	module_srcdir=gnulib; \
+ 	$(SHELL) \
+ 	  $$s/$$module_srcdir/configure \
+ 	  --srcdir=$${topdir}/$$module_srcdir \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias}  \
+ 	  || exit 1
+ @endif gnulib
+ 
+ 
+ 
+ 
+ 
+ .PHONY: all-gnulib maybe-all-gnulib
+ maybe-all-gnulib:
+ @if gcc-bootstrap
+ all-gnulib: stage_current
+ @endif gcc-bootstrap
+ @if gnulib
+ TARGET-gnulib=all
+ maybe-all-gnulib: all-gnulib
+ all-gnulib: configure-gnulib
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS)  \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) $(STAGE1_FLAGS_TO_PASS)  \
+ 		$(TARGET-gnulib))
+ @endif gnulib
+ 
+ 
+ 
+ 
+ .PHONY: check-gnulib maybe-check-gnulib
+ maybe-check-gnulib:
+ @if gnulib
+ maybe-check-gnulib: check-gnulib
+ 
+ check-gnulib:
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS)  \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(FLAGS_TO_PASS)  check)
+ 
+ @endif gnulib
+ 
+ .PHONY: install-gnulib maybe-install-gnulib
+ maybe-install-gnulib:
+ @if gnulib
+ maybe-install-gnulib: install-gnulib
+ 
+ install-gnulib: installdirs
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(FLAGS_TO_PASS)  install)
+ 
+ @endif gnulib
+ 
+ .PHONY: install-strip-gnulib maybe-install-strip-gnulib
+ maybe-install-strip-gnulib:
+ @if gnulib
+ maybe-install-strip-gnulib: install-strip-gnulib
+ 
+ install-strip-gnulib: installdirs
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(FLAGS_TO_PASS)  install-strip)
+ 
+ @endif gnulib
+ 
+ # Other targets (info, dvi, pdf, etc.)
+ 
+ .PHONY: maybe-info-gnulib info-gnulib
+ maybe-info-gnulib:
+ @if gnulib
+ maybe-info-gnulib: info-gnulib
+ 
+ info-gnulib: \
+     configure-gnulib 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gnulib/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing info in gnulib"; \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          info) \
+ 	  || exit 1
+ 
+ @endif gnulib
+ 
+ .PHONY: maybe-dvi-gnulib dvi-gnulib
+ maybe-dvi-gnulib:
+ @if gnulib
+ maybe-dvi-gnulib: dvi-gnulib
+ 
+ dvi-gnulib: \
+     configure-gnulib 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gnulib/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing dvi in gnulib"; \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          dvi) \
+ 	  || exit 1
+ 
+ @endif gnulib
+ 
+ .PHONY: maybe-pdf-gnulib pdf-gnulib
+ maybe-pdf-gnulib:
+ @if gnulib
+ maybe-pdf-gnulib: pdf-gnulib
+ 
+ pdf-gnulib: \
+     configure-gnulib 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gnulib/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing pdf in gnulib"; \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          pdf) \
+ 	  || exit 1
+ 
+ @endif gnulib
+ 
+ .PHONY: maybe-html-gnulib html-gnulib
+ maybe-html-gnulib:
+ @if gnulib
+ maybe-html-gnulib: html-gnulib
+ 
+ html-gnulib: \
+     configure-gnulib 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gnulib/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing html in gnulib"; \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          html) \
+ 	  || exit 1
+ 
+ @endif gnulib
+ 
+ .PHONY: maybe-TAGS-gnulib TAGS-gnulib
+ maybe-TAGS-gnulib:
+ @if gnulib
+ maybe-TAGS-gnulib: TAGS-gnulib
+ 
+ TAGS-gnulib: \
+     configure-gnulib 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gnulib/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing TAGS in gnulib"; \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          TAGS) \
+ 	  || exit 1
+ 
+ @endif gnulib
+ 
+ .PHONY: maybe-install-info-gnulib install-info-gnulib
+ maybe-install-info-gnulib:
+ @if gnulib
+ maybe-install-info-gnulib: install-info-gnulib
+ 
+ install-info-gnulib: \
+     configure-gnulib \
+     info-gnulib 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gnulib/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing install-info in gnulib"; \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          install-info) \
+ 	  || exit 1
+ 
+ @endif gnulib
+ 
+ .PHONY: maybe-install-pdf-gnulib install-pdf-gnulib
+ maybe-install-pdf-gnulib:
+ @if gnulib
+ maybe-install-pdf-gnulib: install-pdf-gnulib
+ 
+ install-pdf-gnulib: \
+     configure-gnulib \
+     pdf-gnulib 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gnulib/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing install-pdf in gnulib"; \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          install-pdf) \
+ 	  || exit 1
+ 
+ @endif gnulib
+ 
+ .PHONY: maybe-install-html-gnulib install-html-gnulib
+ maybe-install-html-gnulib:
+ @if gnulib
+ maybe-install-html-gnulib: install-html-gnulib
+ 
+ install-html-gnulib: \
+     configure-gnulib \
+     html-gnulib 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gnulib/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing install-html in gnulib"; \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          install-html) \
+ 	  || exit 1
+ 
+ @endif gnulib
+ 
+ .PHONY: maybe-installcheck-gnulib installcheck-gnulib
+ maybe-installcheck-gnulib:
+ @if gnulib
+ maybe-installcheck-gnulib: installcheck-gnulib
+ 
+ installcheck-gnulib: \
+     configure-gnulib 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gnulib/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing installcheck in gnulib"; \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          installcheck) \
+ 	  || exit 1
+ 
+ @endif gnulib
+ 
+ .PHONY: maybe-mostlyclean-gnulib mostlyclean-gnulib
+ maybe-mostlyclean-gnulib:
+ @if gnulib
+ maybe-mostlyclean-gnulib: mostlyclean-gnulib
+ 
+ mostlyclean-gnulib: 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gnulib/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing mostlyclean in gnulib"; \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          mostlyclean) \
+ 	  || exit 1
+ 
+ @endif gnulib
+ 
+ .PHONY: maybe-clean-gnulib clean-gnulib
+ maybe-clean-gnulib:
+ @if gnulib
+ maybe-clean-gnulib: clean-gnulib
+ 
+ clean-gnulib: 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gnulib/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing clean in gnulib"; \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          clean) \
+ 	  || exit 1
+ 
+ @endif gnulib
+ 
+ .PHONY: maybe-distclean-gnulib distclean-gnulib
+ maybe-distclean-gnulib:
+ @if gnulib
+ maybe-distclean-gnulib: distclean-gnulib
+ 
+ distclean-gnulib: 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gnulib/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing distclean in gnulib"; \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          distclean) \
+ 	  || exit 1
+ 
+ @endif gnulib
+ 
+ .PHONY: maybe-maintainer-clean-gnulib maintainer-clean-gnulib
+ maybe-maintainer-clean-gnulib:
+ @if gnulib
+ maybe-maintainer-clean-gnulib: maintainer-clean-gnulib
+ 
+ maintainer-clean-gnulib: 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gnulib/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing maintainer-clean in gnulib"; \
+ 	(cd $(HOST_SUBDIR)/gnulib && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          maintainer-clean) \
+ 	  || exit 1
+ 
+ @endif gnulib
+ 
+ 
+ 
+ .PHONY: configure-gdbsupport maybe-configure-gdbsupport
+ maybe-configure-gdbsupport:
+ @if gcc-bootstrap
+ configure-gdbsupport: stage_current
+ @endif gcc-bootstrap
+ @if gdbsupport
+ maybe-configure-gdbsupport: configure-gdbsupport
+ configure-gdbsupport: 
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	test ! -f $(HOST_SUBDIR)/gdbsupport/Makefile || exit 0; \
+ 	$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gdbsupport; \
+ 	$(HOST_EXPORTS)  \
+ 	echo Configuring in $(HOST_SUBDIR)/gdbsupport; \
+ 	cd "$(HOST_SUBDIR)/gdbsupport" || exit 1; \
+ 	case $(srcdir) in \
+ 	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ 	  *) topdir=`echo $(HOST_SUBDIR)/gdbsupport/ | \
+ 		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ 	esac; \
+ 	module_srcdir=gdbsupport; \
+ 	$(SHELL) \
+ 	  $$s/$$module_srcdir/configure \
+ 	  --srcdir=$${topdir}/$$module_srcdir \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias}  \
+ 	  || exit 1
+ @endif gdbsupport
+ 
+ 
+ 
+ 
+ 
+ .PHONY: all-gdbsupport maybe-all-gdbsupport
+ maybe-all-gdbsupport:
+ @if gcc-bootstrap
+ all-gdbsupport: stage_current
+ @endif gcc-bootstrap
+ @if gdbsupport
+ TARGET-gdbsupport=all
+ maybe-all-gdbsupport: all-gdbsupport
+ all-gdbsupport: configure-gdbsupport
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS)  \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) $(STAGE1_FLAGS_TO_PASS)  \
+ 		$(TARGET-gdbsupport))
+ @endif gdbsupport
+ 
+ 
+ 
+ 
+ .PHONY: check-gdbsupport maybe-check-gdbsupport
+ maybe-check-gdbsupport:
+ @if gdbsupport
+ maybe-check-gdbsupport: check-gdbsupport
+ 
+ check-gdbsupport:
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS)  \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(FLAGS_TO_PASS)  check)
+ 
+ @endif gdbsupport
+ 
+ .PHONY: install-gdbsupport maybe-install-gdbsupport
+ maybe-install-gdbsupport:
+ @if gdbsupport
+ maybe-install-gdbsupport: install-gdbsupport
+ 
+ install-gdbsupport: installdirs
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(FLAGS_TO_PASS)  install)
+ 
+ @endif gdbsupport
+ 
+ .PHONY: install-strip-gdbsupport maybe-install-strip-gdbsupport
+ maybe-install-strip-gdbsupport:
+ @if gdbsupport
+ maybe-install-strip-gdbsupport: install-strip-gdbsupport
+ 
+ install-strip-gdbsupport: installdirs
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(FLAGS_TO_PASS)  install-strip)
+ 
+ @endif gdbsupport
+ 
+ # Other targets (info, dvi, pdf, etc.)
+ 
+ .PHONY: maybe-info-gdbsupport info-gdbsupport
+ maybe-info-gdbsupport:
+ @if gdbsupport
+ maybe-info-gdbsupport: info-gdbsupport
+ 
+ info-gdbsupport: \
+     configure-gdbsupport 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbsupport/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing info in gdbsupport"; \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          info) \
+ 	  || exit 1
+ 
+ @endif gdbsupport
+ 
+ .PHONY: maybe-dvi-gdbsupport dvi-gdbsupport
+ maybe-dvi-gdbsupport:
+ @if gdbsupport
+ maybe-dvi-gdbsupport: dvi-gdbsupport
+ 
+ dvi-gdbsupport: \
+     configure-gdbsupport 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbsupport/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing dvi in gdbsupport"; \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          dvi) \
+ 	  || exit 1
+ 
+ @endif gdbsupport
+ 
+ .PHONY: maybe-pdf-gdbsupport pdf-gdbsupport
+ maybe-pdf-gdbsupport:
+ @if gdbsupport
+ maybe-pdf-gdbsupport: pdf-gdbsupport
+ 
+ pdf-gdbsupport: \
+     configure-gdbsupport 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbsupport/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing pdf in gdbsupport"; \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          pdf) \
+ 	  || exit 1
+ 
+ @endif gdbsupport
+ 
+ .PHONY: maybe-html-gdbsupport html-gdbsupport
+ maybe-html-gdbsupport:
+ @if gdbsupport
+ maybe-html-gdbsupport: html-gdbsupport
+ 
+ html-gdbsupport: \
+     configure-gdbsupport 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbsupport/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing html in gdbsupport"; \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          html) \
+ 	  || exit 1
+ 
+ @endif gdbsupport
+ 
+ .PHONY: maybe-TAGS-gdbsupport TAGS-gdbsupport
+ maybe-TAGS-gdbsupport:
+ @if gdbsupport
+ maybe-TAGS-gdbsupport: TAGS-gdbsupport
+ 
+ TAGS-gdbsupport: \
+     configure-gdbsupport 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbsupport/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing TAGS in gdbsupport"; \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          TAGS) \
+ 	  || exit 1
+ 
+ @endif gdbsupport
+ 
+ .PHONY: maybe-install-info-gdbsupport install-info-gdbsupport
+ maybe-install-info-gdbsupport:
+ @if gdbsupport
+ maybe-install-info-gdbsupport: install-info-gdbsupport
+ 
+ install-info-gdbsupport: \
+     configure-gdbsupport \
+     info-gdbsupport 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbsupport/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing install-info in gdbsupport"; \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          install-info) \
+ 	  || exit 1
+ 
+ @endif gdbsupport
+ 
+ .PHONY: maybe-install-pdf-gdbsupport install-pdf-gdbsupport
+ maybe-install-pdf-gdbsupport:
+ @if gdbsupport
+ maybe-install-pdf-gdbsupport: install-pdf-gdbsupport
+ 
+ install-pdf-gdbsupport: \
+     configure-gdbsupport \
+     pdf-gdbsupport 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbsupport/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing install-pdf in gdbsupport"; \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          install-pdf) \
+ 	  || exit 1
+ 
+ @endif gdbsupport
+ 
+ .PHONY: maybe-install-html-gdbsupport install-html-gdbsupport
+ maybe-install-html-gdbsupport:
+ @if gdbsupport
+ maybe-install-html-gdbsupport: install-html-gdbsupport
+ 
+ install-html-gdbsupport: \
+     configure-gdbsupport \
+     html-gdbsupport 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbsupport/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing install-html in gdbsupport"; \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          install-html) \
+ 	  || exit 1
+ 
+ @endif gdbsupport
+ 
+ .PHONY: maybe-installcheck-gdbsupport installcheck-gdbsupport
+ maybe-installcheck-gdbsupport:
+ @if gdbsupport
+ maybe-installcheck-gdbsupport: installcheck-gdbsupport
+ 
+ installcheck-gdbsupport: \
+     configure-gdbsupport 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbsupport/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing installcheck in gdbsupport"; \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          installcheck) \
+ 	  || exit 1
+ 
+ @endif gdbsupport
+ 
+ .PHONY: maybe-mostlyclean-gdbsupport mostlyclean-gdbsupport
+ maybe-mostlyclean-gdbsupport:
+ @if gdbsupport
+ maybe-mostlyclean-gdbsupport: mostlyclean-gdbsupport
+ 
+ mostlyclean-gdbsupport: 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbsupport/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing mostlyclean in gdbsupport"; \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          mostlyclean) \
+ 	  || exit 1
+ 
+ @endif gdbsupport
+ 
+ .PHONY: maybe-clean-gdbsupport clean-gdbsupport
+ maybe-clean-gdbsupport:
+ @if gdbsupport
+ maybe-clean-gdbsupport: clean-gdbsupport
+ 
+ clean-gdbsupport: 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbsupport/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing clean in gdbsupport"; \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          clean) \
+ 	  || exit 1
+ 
+ @endif gdbsupport
+ 
+ .PHONY: maybe-distclean-gdbsupport distclean-gdbsupport
+ maybe-distclean-gdbsupport:
+ @if gdbsupport
+ maybe-distclean-gdbsupport: distclean-gdbsupport
+ 
+ distclean-gdbsupport: 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbsupport/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing distclean in gdbsupport"; \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          distclean) \
+ 	  || exit 1
+ 
+ @endif gdbsupport
+ 
+ .PHONY: maybe-maintainer-clean-gdbsupport maintainer-clean-gdbsupport
+ maybe-maintainer-clean-gdbsupport:
+ @if gdbsupport
+ maybe-maintainer-clean-gdbsupport: maintainer-clean-gdbsupport
+ 
+ maintainer-clean-gdbsupport: 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbsupport/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing maintainer-clean in gdbsupport"; \
+ 	(cd $(HOST_SUBDIR)/gdbsupport && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          maintainer-clean) \
+ 	  || exit 1
+ 
+ @endif gdbsupport
+ 
+ 
+ 
+ .PHONY: configure-gdbserver maybe-configure-gdbserver
+ maybe-configure-gdbserver:
+ @if gcc-bootstrap
+ configure-gdbserver: stage_current
+ @endif gcc-bootstrap
+ @if gdbserver
+ maybe-configure-gdbserver: configure-gdbserver
+ configure-gdbserver: 
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	test ! -f $(HOST_SUBDIR)/gdbserver/Makefile || exit 0; \
+ 	$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gdbserver; \
+ 	$(HOST_EXPORTS)  \
+ 	echo Configuring in $(HOST_SUBDIR)/gdbserver; \
+ 	cd "$(HOST_SUBDIR)/gdbserver" || exit 1; \
+ 	case $(srcdir) in \
+ 	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ 	  *) topdir=`echo $(HOST_SUBDIR)/gdbserver/ | \
+ 		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ 	esac; \
+ 	module_srcdir=gdbserver; \
+ 	$(SHELL) \
+ 	  $$s/$$module_srcdir/configure \
+ 	  --srcdir=$${topdir}/$$module_srcdir \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias}  \
+ 	  || exit 1
+ @endif gdbserver
+ 
+ 
+ 
+ 
+ 
+ .PHONY: all-gdbserver maybe-all-gdbserver
+ maybe-all-gdbserver:
+ @if gcc-bootstrap
+ all-gdbserver: stage_current
+ @endif gcc-bootstrap
+ @if gdbserver
+ TARGET-gdbserver=all
+ maybe-all-gdbserver: all-gdbserver
+ all-gdbserver: configure-gdbserver
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS)  \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) $(STAGE1_FLAGS_TO_PASS)  \
+ 		$(TARGET-gdbserver))
+ @endif gdbserver
+ 
+ 
+ 
+ 
+ .PHONY: check-gdbserver maybe-check-gdbserver
+ maybe-check-gdbserver:
+ @if gdbserver
+ maybe-check-gdbserver: check-gdbserver
+ 
+ check-gdbserver:
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS)  \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(FLAGS_TO_PASS)  check)
+ 
+ @endif gdbserver
+ 
+ .PHONY: install-gdbserver maybe-install-gdbserver
+ maybe-install-gdbserver:
+ @if gdbserver
+ maybe-install-gdbserver: install-gdbserver
+ 
+ install-gdbserver: installdirs
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(FLAGS_TO_PASS)  install)
+ 
+ @endif gdbserver
+ 
+ .PHONY: install-strip-gdbserver maybe-install-strip-gdbserver
+ maybe-install-strip-gdbserver:
+ @if gdbserver
+ maybe-install-strip-gdbserver: install-strip-gdbserver
+ 
+ install-strip-gdbserver: installdirs
+ 	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(FLAGS_TO_PASS)  install-strip)
+ 
+ @endif gdbserver
+ 
+ # Other targets (info, dvi, pdf, etc.)
+ 
+ .PHONY: maybe-info-gdbserver info-gdbserver
+ maybe-info-gdbserver:
+ @if gdbserver
+ maybe-info-gdbserver: info-gdbserver
+ 
+ info-gdbserver: \
+     configure-gdbserver 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbserver/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing info in gdbserver"; \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          info) \
+ 	  || exit 1
+ 
+ @endif gdbserver
+ 
+ .PHONY: maybe-dvi-gdbserver dvi-gdbserver
+ maybe-dvi-gdbserver:
+ @if gdbserver
+ maybe-dvi-gdbserver: dvi-gdbserver
+ 
+ dvi-gdbserver: \
+     configure-gdbserver 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbserver/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing dvi in gdbserver"; \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          dvi) \
+ 	  || exit 1
+ 
+ @endif gdbserver
+ 
+ .PHONY: maybe-pdf-gdbserver pdf-gdbserver
+ maybe-pdf-gdbserver:
+ @if gdbserver
+ maybe-pdf-gdbserver: pdf-gdbserver
+ 
+ pdf-gdbserver: \
+     configure-gdbserver 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbserver/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing pdf in gdbserver"; \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          pdf) \
+ 	  || exit 1
+ 
+ @endif gdbserver
+ 
+ .PHONY: maybe-html-gdbserver html-gdbserver
+ maybe-html-gdbserver:
+ @if gdbserver
+ maybe-html-gdbserver: html-gdbserver
+ 
+ html-gdbserver: \
+     configure-gdbserver 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbserver/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing html in gdbserver"; \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          html) \
+ 	  || exit 1
+ 
+ @endif gdbserver
+ 
+ .PHONY: maybe-TAGS-gdbserver TAGS-gdbserver
+ maybe-TAGS-gdbserver:
+ @if gdbserver
+ maybe-TAGS-gdbserver: TAGS-gdbserver
+ 
+ TAGS-gdbserver: \
+     configure-gdbserver 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbserver/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing TAGS in gdbserver"; \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          TAGS) \
+ 	  || exit 1
+ 
+ @endif gdbserver
+ 
+ .PHONY: maybe-install-info-gdbserver install-info-gdbserver
+ maybe-install-info-gdbserver:
+ @if gdbserver
+ maybe-install-info-gdbserver: install-info-gdbserver
+ 
+ install-info-gdbserver: \
+     configure-gdbserver \
+     info-gdbserver 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbserver/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing install-info in gdbserver"; \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          install-info) \
+ 	  || exit 1
+ 
+ @endif gdbserver
+ 
+ .PHONY: maybe-install-pdf-gdbserver install-pdf-gdbserver
+ maybe-install-pdf-gdbserver:
+ @if gdbserver
+ maybe-install-pdf-gdbserver: install-pdf-gdbserver
+ 
+ install-pdf-gdbserver: \
+     configure-gdbserver \
+     pdf-gdbserver 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbserver/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing install-pdf in gdbserver"; \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          install-pdf) \
+ 	  || exit 1
+ 
+ @endif gdbserver
+ 
+ .PHONY: maybe-install-html-gdbserver install-html-gdbserver
+ maybe-install-html-gdbserver:
+ @if gdbserver
+ maybe-install-html-gdbserver: install-html-gdbserver
+ 
+ install-html-gdbserver: \
+     configure-gdbserver \
+     html-gdbserver 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbserver/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing install-html in gdbserver"; \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          install-html) \
+ 	  || exit 1
+ 
+ @endif gdbserver
+ 
+ .PHONY: maybe-installcheck-gdbserver installcheck-gdbserver
+ maybe-installcheck-gdbserver:
+ @if gdbserver
+ maybe-installcheck-gdbserver: installcheck-gdbserver
+ 
+ installcheck-gdbserver: \
+     configure-gdbserver 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbserver/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing installcheck in gdbserver"; \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          installcheck) \
+ 	  || exit 1
+ 
+ @endif gdbserver
+ 
+ .PHONY: maybe-mostlyclean-gdbserver mostlyclean-gdbserver
+ maybe-mostlyclean-gdbserver:
+ @if gdbserver
+ maybe-mostlyclean-gdbserver: mostlyclean-gdbserver
+ 
+ mostlyclean-gdbserver: 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbserver/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing mostlyclean in gdbserver"; \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          mostlyclean) \
+ 	  || exit 1
+ 
+ @endif gdbserver
+ 
+ .PHONY: maybe-clean-gdbserver clean-gdbserver
+ maybe-clean-gdbserver:
+ @if gdbserver
+ maybe-clean-gdbserver: clean-gdbserver
+ 
+ clean-gdbserver: 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbserver/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing clean in gdbserver"; \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          clean) \
+ 	  || exit 1
+ 
+ @endif gdbserver
+ 
+ .PHONY: maybe-distclean-gdbserver distclean-gdbserver
+ maybe-distclean-gdbserver:
+ @if gdbserver
+ maybe-distclean-gdbserver: distclean-gdbserver
+ 
+ distclean-gdbserver: 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbserver/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing distclean in gdbserver"; \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          distclean) \
+ 	  || exit 1
+ 
+ @endif gdbserver
+ 
+ .PHONY: maybe-maintainer-clean-gdbserver maintainer-clean-gdbserver
+ maybe-maintainer-clean-gdbserver:
+ @if gdbserver
+ maybe-maintainer-clean-gdbserver: maintainer-clean-gdbserver
+ 
+ maintainer-clean-gdbserver: 
+ 	@: $(MAKE); $(unstage)
+ 	@[ -f ./gdbserver/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing maintainer-clean in gdbserver"; \
+ 	(cd $(HOST_SUBDIR)/gdbserver && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          maintainer-clean) \
+ 	  || exit 1
+ 
+ @endif gdbserver
+ 
+ 
+ 
  .PHONY: configure-gdb maybe-configure-gdb
  maybe-configure-gdb:
  @if gcc-bootstrap
*************** maintainer-clean-gotools:
*** 38108,38113 ****
--- 39510,40611 ----
  
  
  
+ .PHONY: configure-libctf maybe-configure-libctf
+ maybe-configure-libctf:
+ @if gcc-bootstrap
+ configure-libctf: stage_current
+ @endif gcc-bootstrap
+ @if libctf
+ maybe-configure-libctf: configure-libctf
+ configure-libctf: 
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	test ! -f $(HOST_SUBDIR)/libctf/Makefile || exit 0; \
+ 	$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf; \
+ 	$(HOST_EXPORTS)  \
+ 	echo Configuring in $(HOST_SUBDIR)/libctf; \
+ 	cd "$(HOST_SUBDIR)/libctf" || exit 1; \
+ 	case $(srcdir) in \
+ 	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ 	  *) topdir=`echo $(HOST_SUBDIR)/libctf/ | \
+ 		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ 	esac; \
+ 	module_srcdir=libctf; \
+ 	$(SHELL) \
+ 	  $$s/$$module_srcdir/configure \
+ 	  --srcdir=$${topdir}/$$module_srcdir \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias}  \
+ 	  || exit 1
+ @endif libctf
+ 
+ 
+ 
+ .PHONY: configure-stage1-libctf maybe-configure-stage1-libctf
+ maybe-configure-stage1-libctf:
+ @if libctf-bootstrap
+ maybe-configure-stage1-libctf: configure-stage1-libctf
+ configure-stage1-libctf:
+ 	@[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
+ 	@$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGE1_TFLAGS)"; \
+ 	test ! -f $(HOST_SUBDIR)/libctf/Makefile || exit 0; \
+ 	$(HOST_EXPORTS) \
+ 	CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \
+ 	CXXFLAGS="$(STAGE1_CXXFLAGS)"; export CXXFLAGS; \
+ 	LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS;  \
+ 	echo Configuring stage 1 in $(HOST_SUBDIR)/libctf; \
+ 	$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf; \
+ 	cd $(HOST_SUBDIR)/libctf || exit 1; \
+ 	case $(srcdir) in \
+ 	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ 	  *) topdir=`echo $(HOST_SUBDIR)/libctf/ | \
+ 		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ 	esac; \
+ 	module_srcdir=libctf; \
+ 	$(SHELL) $$s/$$module_srcdir/configure \
+ 	  --srcdir=$${topdir}/$$module_srcdir \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} \
+ 	   \
+ 	  $(STAGE1_CONFIGURE_FLAGS)
+ @endif libctf-bootstrap
+ 
+ .PHONY: configure-stage2-libctf maybe-configure-stage2-libctf
+ maybe-configure-stage2-libctf:
+ @if libctf-bootstrap
+ maybe-configure-stage2-libctf: configure-stage2-libctf
+ configure-stage2-libctf:
+ 	@[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
+ 	@$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGE2_TFLAGS)"; \
+ 	test ! -f $(HOST_SUBDIR)/libctf/Makefile || exit 0; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS) \
+ 	CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \
+ 	CXXFLAGS="$(STAGE2_CXXFLAGS)"; export CXXFLAGS; \
+ 	LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS;  \
+ 	echo Configuring stage 2 in $(HOST_SUBDIR)/libctf; \
+ 	$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf; \
+ 	cd $(HOST_SUBDIR)/libctf || exit 1; \
+ 	case $(srcdir) in \
+ 	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ 	  *) topdir=`echo $(HOST_SUBDIR)/libctf/ | \
+ 		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ 	esac; \
+ 	module_srcdir=libctf; \
+ 	$(SHELL) $$s/$$module_srcdir/configure \
+ 	  --srcdir=$${topdir}/$$module_srcdir \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE2_CONFIGURE_FLAGS)
+ @endif libctf-bootstrap
+ 
+ .PHONY: configure-stage3-libctf maybe-configure-stage3-libctf
+ maybe-configure-stage3-libctf:
+ @if libctf-bootstrap
+ maybe-configure-stage3-libctf: configure-stage3-libctf
+ configure-stage3-libctf:
+ 	@[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
+ 	@$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGE3_TFLAGS)"; \
+ 	test ! -f $(HOST_SUBDIR)/libctf/Makefile || exit 0; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS) \
+ 	CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \
+ 	CXXFLAGS="$(STAGE3_CXXFLAGS)"; export CXXFLAGS; \
+ 	LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS;  \
+ 	echo Configuring stage 3 in $(HOST_SUBDIR)/libctf; \
+ 	$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf; \
+ 	cd $(HOST_SUBDIR)/libctf || exit 1; \
+ 	case $(srcdir) in \
+ 	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ 	  *) topdir=`echo $(HOST_SUBDIR)/libctf/ | \
+ 		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ 	esac; \
+ 	module_srcdir=libctf; \
+ 	$(SHELL) $$s/$$module_srcdir/configure \
+ 	  --srcdir=$${topdir}/$$module_srcdir \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE3_CONFIGURE_FLAGS)
+ @endif libctf-bootstrap
+ 
+ .PHONY: configure-stage4-libctf maybe-configure-stage4-libctf
+ maybe-configure-stage4-libctf:
+ @if libctf-bootstrap
+ maybe-configure-stage4-libctf: configure-stage4-libctf
+ configure-stage4-libctf:
+ 	@[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
+ 	@$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGE4_TFLAGS)"; \
+ 	test ! -f $(HOST_SUBDIR)/libctf/Makefile || exit 0; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS) \
+ 	CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \
+ 	CXXFLAGS="$(STAGE4_CXXFLAGS)"; export CXXFLAGS; \
+ 	LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS;  \
+ 	echo Configuring stage 4 in $(HOST_SUBDIR)/libctf; \
+ 	$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf; \
+ 	cd $(HOST_SUBDIR)/libctf || exit 1; \
+ 	case $(srcdir) in \
+ 	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ 	  *) topdir=`echo $(HOST_SUBDIR)/libctf/ | \
+ 		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ 	esac; \
+ 	module_srcdir=libctf; \
+ 	$(SHELL) $$s/$$module_srcdir/configure \
+ 	  --srcdir=$${topdir}/$$module_srcdir \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE4_CONFIGURE_FLAGS)
+ @endif libctf-bootstrap
+ 
+ .PHONY: configure-stageprofile-libctf maybe-configure-stageprofile-libctf
+ maybe-configure-stageprofile-libctf:
+ @if libctf-bootstrap
+ maybe-configure-stageprofile-libctf: configure-stageprofile-libctf
+ configure-stageprofile-libctf:
+ 	@[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
+ 	@$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGEprofile_TFLAGS)"; \
+ 	test ! -f $(HOST_SUBDIR)/libctf/Makefile || exit 0; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS) \
+ 	CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \
+ 	CXXFLAGS="$(STAGEprofile_CXXFLAGS)"; export CXXFLAGS; \
+ 	LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS;  \
+ 	echo Configuring stage profile in $(HOST_SUBDIR)/libctf; \
+ 	$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf; \
+ 	cd $(HOST_SUBDIR)/libctf || exit 1; \
+ 	case $(srcdir) in \
+ 	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ 	  *) topdir=`echo $(HOST_SUBDIR)/libctf/ | \
+ 		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ 	esac; \
+ 	module_srcdir=libctf; \
+ 	$(SHELL) $$s/$$module_srcdir/configure \
+ 	  --srcdir=$${topdir}/$$module_srcdir \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEprofile_CONFIGURE_FLAGS)
+ @endif libctf-bootstrap
+ 
+ .PHONY: configure-stagetrain-libctf maybe-configure-stagetrain-libctf
+ maybe-configure-stagetrain-libctf:
+ @if libctf-bootstrap
+ maybe-configure-stagetrain-libctf: configure-stagetrain-libctf
+ configure-stagetrain-libctf:
+ 	@[ $(current_stage) = stagetrain ] || $(MAKE) stagetrain-start
+ 	@$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGEtrain_TFLAGS)"; \
+ 	test ! -f $(HOST_SUBDIR)/libctf/Makefile || exit 0; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS) \
+ 	CFLAGS="$(STAGEtrain_CFLAGS)"; export CFLAGS; \
+ 	CXXFLAGS="$(STAGEtrain_CXXFLAGS)"; export CXXFLAGS; \
+ 	LIBCFLAGS="$(STAGEtrain_CFLAGS)"; export LIBCFLAGS;  \
+ 	echo Configuring stage train in $(HOST_SUBDIR)/libctf; \
+ 	$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf; \
+ 	cd $(HOST_SUBDIR)/libctf || exit 1; \
+ 	case $(srcdir) in \
+ 	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ 	  *) topdir=`echo $(HOST_SUBDIR)/libctf/ | \
+ 		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ 	esac; \
+ 	module_srcdir=libctf; \
+ 	$(SHELL) $$s/$$module_srcdir/configure \
+ 	  --srcdir=$${topdir}/$$module_srcdir \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEtrain_CONFIGURE_FLAGS)
+ @endif libctf-bootstrap
+ 
+ .PHONY: configure-stagefeedback-libctf maybe-configure-stagefeedback-libctf
+ maybe-configure-stagefeedback-libctf:
+ @if libctf-bootstrap
+ maybe-configure-stagefeedback-libctf: configure-stagefeedback-libctf
+ configure-stagefeedback-libctf:
+ 	@[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
+ 	@$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGEfeedback_TFLAGS)"; \
+ 	test ! -f $(HOST_SUBDIR)/libctf/Makefile || exit 0; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS) \
+ 	CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \
+ 	CXXFLAGS="$(STAGEfeedback_CXXFLAGS)"; export CXXFLAGS; \
+ 	LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS;  \
+ 	echo Configuring stage feedback in $(HOST_SUBDIR)/libctf; \
+ 	$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf; \
+ 	cd $(HOST_SUBDIR)/libctf || exit 1; \
+ 	case $(srcdir) in \
+ 	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ 	  *) topdir=`echo $(HOST_SUBDIR)/libctf/ | \
+ 		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ 	esac; \
+ 	module_srcdir=libctf; \
+ 	$(SHELL) $$s/$$module_srcdir/configure \
+ 	  --srcdir=$${topdir}/$$module_srcdir \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEfeedback_CONFIGURE_FLAGS)
+ @endif libctf-bootstrap
+ 
+ .PHONY: configure-stageautoprofile-libctf maybe-configure-stageautoprofile-libctf
+ maybe-configure-stageautoprofile-libctf:
+ @if libctf-bootstrap
+ maybe-configure-stageautoprofile-libctf: configure-stageautoprofile-libctf
+ configure-stageautoprofile-libctf:
+ 	@[ $(current_stage) = stageautoprofile ] || $(MAKE) stageautoprofile-start
+ 	@$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGEautoprofile_TFLAGS)"; \
+ 	test ! -f $(HOST_SUBDIR)/libctf/Makefile || exit 0; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS) \
+ 	CFLAGS="$(STAGEautoprofile_CFLAGS)"; export CFLAGS; \
+ 	CXXFLAGS="$(STAGEautoprofile_CXXFLAGS)"; export CXXFLAGS; \
+ 	LIBCFLAGS="$(STAGEautoprofile_CFLAGS)"; export LIBCFLAGS;  \
+ 	echo Configuring stage autoprofile in $(HOST_SUBDIR)/libctf; \
+ 	$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf; \
+ 	cd $(HOST_SUBDIR)/libctf || exit 1; \
+ 	case $(srcdir) in \
+ 	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ 	  *) topdir=`echo $(HOST_SUBDIR)/libctf/ | \
+ 		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ 	esac; \
+ 	module_srcdir=libctf; \
+ 	$(SHELL) $$s/$$module_srcdir/configure \
+ 	  --srcdir=$${topdir}/$$module_srcdir \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEautoprofile_CONFIGURE_FLAGS)
+ @endif libctf-bootstrap
+ 
+ .PHONY: configure-stageautofeedback-libctf maybe-configure-stageautofeedback-libctf
+ maybe-configure-stageautofeedback-libctf:
+ @if libctf-bootstrap
+ maybe-configure-stageautofeedback-libctf: configure-stageautofeedback-libctf
+ configure-stageautofeedback-libctf:
+ 	@[ $(current_stage) = stageautofeedback ] || $(MAKE) stageautofeedback-start
+ 	@$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGEautofeedback_TFLAGS)"; \
+ 	test ! -f $(HOST_SUBDIR)/libctf/Makefile || exit 0; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS) \
+ 	CFLAGS="$(STAGEautofeedback_CFLAGS)"; export CFLAGS; \
+ 	CXXFLAGS="$(STAGEautofeedback_CXXFLAGS)"; export CXXFLAGS; \
+ 	LIBCFLAGS="$(STAGEautofeedback_CFLAGS)"; export LIBCFLAGS;  \
+ 	echo Configuring stage autofeedback in $(HOST_SUBDIR)/libctf; \
+ 	$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libctf; \
+ 	cd $(HOST_SUBDIR)/libctf || exit 1; \
+ 	case $(srcdir) in \
+ 	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ 	  *) topdir=`echo $(HOST_SUBDIR)/libctf/ | \
+ 		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ 	esac; \
+ 	module_srcdir=libctf; \
+ 	$(SHELL) $$s/$$module_srcdir/configure \
+ 	  --srcdir=$${topdir}/$$module_srcdir \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEautofeedback_CONFIGURE_FLAGS)
+ @endif libctf-bootstrap
+ 
+ 
+ 
+ 
+ 
+ .PHONY: all-libctf maybe-all-libctf
+ maybe-all-libctf:
+ @if gcc-bootstrap
+ all-libctf: stage_current
+ @endif gcc-bootstrap
+ @if libctf
+ TARGET-libctf=all
+ maybe-all-libctf: all-libctf
+ all-libctf: configure-libctf
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS)  \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) $(STAGE1_FLAGS_TO_PASS)  \
+ 		$(TARGET-libctf))
+ @endif libctf
+ 
+ 
+ 
+ .PHONY: all-stage1-libctf maybe-all-stage1-libctf
+ .PHONY: clean-stage1-libctf maybe-clean-stage1-libctf
+ maybe-all-stage1-libctf:
+ maybe-clean-stage1-libctf:
+ @if libctf-bootstrap
+ maybe-all-stage1-libctf: all-stage1-libctf
+ all-stage1: all-stage1-libctf
+ TARGET-stage1-libctf = $(TARGET-libctf)
+ all-stage1-libctf: configure-stage1-libctf
+ 	@[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGE1_TFLAGS)"; \
+ 	$(HOST_EXPORTS)  \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	 \
+ 	$(MAKE) $(BASE_FLAGS_TO_PASS) \
+ 		CFLAGS="$(STAGE1_CFLAGS)" \
+ 		GENERATOR_CFLAGS="$(STAGE1_GENERATOR_CFLAGS)" \
+ 		CXXFLAGS="$(STAGE1_CXXFLAGS)" \
+ 		LIBCFLAGS="$(LIBCFLAGS)" \
+ 		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
+ 		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
+ 		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
+ 		$(EXTRA_HOST_FLAGS)  \
+ 		$(STAGE1_FLAGS_TO_PASS)  \
+ 		TFLAGS="$(STAGE1_TFLAGS)"  \
+ 		$(TARGET-stage1-libctf)
+ 
+ maybe-clean-stage1-libctf: clean-stage1-libctf
+ clean-stage1: clean-stage1-libctf
+ clean-stage1-libctf:
+ 	@if [ $(current_stage) = stage1 ]; then \
+ 	  [ -f $(HOST_SUBDIR)/libctf/Makefile ] || exit 0; \
+ 	else \
+ 	  [ -f $(HOST_SUBDIR)/stage1-libctf/Makefile ] || exit 0; \
+ 	  $(MAKE) stage1-start; \
+ 	fi; \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	$(MAKE) $(EXTRA_HOST_FLAGS)  \
+ 	$(STAGE1_FLAGS_TO_PASS)  clean
+ @endif libctf-bootstrap
+ 
+ 
+ .PHONY: all-stage2-libctf maybe-all-stage2-libctf
+ .PHONY: clean-stage2-libctf maybe-clean-stage2-libctf
+ maybe-all-stage2-libctf:
+ maybe-clean-stage2-libctf:
+ @if libctf-bootstrap
+ maybe-all-stage2-libctf: all-stage2-libctf
+ all-stage2: all-stage2-libctf
+ TARGET-stage2-libctf = $(TARGET-libctf)
+ all-stage2-libctf: configure-stage2-libctf
+ 	@[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGE2_TFLAGS)"; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS)  \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	 \
+ 	$(MAKE) $(BASE_FLAGS_TO_PASS) \
+ 		CFLAGS="$(STAGE2_CFLAGS)" \
+ 		GENERATOR_CFLAGS="$(STAGE2_GENERATOR_CFLAGS)" \
+ 		CXXFLAGS="$(STAGE2_CXXFLAGS)" \
+ 		LIBCFLAGS="$(STAGE2_CFLAGS)" \
+ 		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
+ 		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
+ 		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
+ 		$(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  \
+ 		TFLAGS="$(STAGE2_TFLAGS)"  \
+ 		$(TARGET-stage2-libctf)
+ 
+ maybe-clean-stage2-libctf: clean-stage2-libctf
+ clean-stage2: clean-stage2-libctf
+ clean-stage2-libctf:
+ 	@if [ $(current_stage) = stage2 ]; then \
+ 	  [ -f $(HOST_SUBDIR)/libctf/Makefile ] || exit 0; \
+ 	else \
+ 	  [ -f $(HOST_SUBDIR)/stage2-libctf/Makefile ] || exit 0; \
+ 	  $(MAKE) stage2-start; \
+ 	fi; \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	$(MAKE) $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  clean
+ @endif libctf-bootstrap
+ 
+ 
+ .PHONY: all-stage3-libctf maybe-all-stage3-libctf
+ .PHONY: clean-stage3-libctf maybe-clean-stage3-libctf
+ maybe-all-stage3-libctf:
+ maybe-clean-stage3-libctf:
+ @if libctf-bootstrap
+ maybe-all-stage3-libctf: all-stage3-libctf
+ all-stage3: all-stage3-libctf
+ TARGET-stage3-libctf = $(TARGET-libctf)
+ all-stage3-libctf: configure-stage3-libctf
+ 	@[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGE3_TFLAGS)"; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS)  \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	 \
+ 	$(MAKE) $(BASE_FLAGS_TO_PASS) \
+ 		CFLAGS="$(STAGE3_CFLAGS)" \
+ 		GENERATOR_CFLAGS="$(STAGE3_GENERATOR_CFLAGS)" \
+ 		CXXFLAGS="$(STAGE3_CXXFLAGS)" \
+ 		LIBCFLAGS="$(STAGE3_CFLAGS)" \
+ 		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
+ 		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
+ 		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
+ 		$(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  \
+ 		TFLAGS="$(STAGE3_TFLAGS)"  \
+ 		$(TARGET-stage3-libctf)
+ 
+ maybe-clean-stage3-libctf: clean-stage3-libctf
+ clean-stage3: clean-stage3-libctf
+ clean-stage3-libctf:
+ 	@if [ $(current_stage) = stage3 ]; then \
+ 	  [ -f $(HOST_SUBDIR)/libctf/Makefile ] || exit 0; \
+ 	else \
+ 	  [ -f $(HOST_SUBDIR)/stage3-libctf/Makefile ] || exit 0; \
+ 	  $(MAKE) stage3-start; \
+ 	fi; \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	$(MAKE) $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  clean
+ @endif libctf-bootstrap
+ 
+ 
+ .PHONY: all-stage4-libctf maybe-all-stage4-libctf
+ .PHONY: clean-stage4-libctf maybe-clean-stage4-libctf
+ maybe-all-stage4-libctf:
+ maybe-clean-stage4-libctf:
+ @if libctf-bootstrap
+ maybe-all-stage4-libctf: all-stage4-libctf
+ all-stage4: all-stage4-libctf
+ TARGET-stage4-libctf = $(TARGET-libctf)
+ all-stage4-libctf: configure-stage4-libctf
+ 	@[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGE4_TFLAGS)"; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS)  \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	 \
+ 	$(MAKE) $(BASE_FLAGS_TO_PASS) \
+ 		CFLAGS="$(STAGE4_CFLAGS)" \
+ 		GENERATOR_CFLAGS="$(STAGE4_GENERATOR_CFLAGS)" \
+ 		CXXFLAGS="$(STAGE4_CXXFLAGS)" \
+ 		LIBCFLAGS="$(STAGE4_CFLAGS)" \
+ 		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
+ 		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
+ 		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
+ 		$(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  \
+ 		TFLAGS="$(STAGE4_TFLAGS)"  \
+ 		$(TARGET-stage4-libctf)
+ 
+ maybe-clean-stage4-libctf: clean-stage4-libctf
+ clean-stage4: clean-stage4-libctf
+ clean-stage4-libctf:
+ 	@if [ $(current_stage) = stage4 ]; then \
+ 	  [ -f $(HOST_SUBDIR)/libctf/Makefile ] || exit 0; \
+ 	else \
+ 	  [ -f $(HOST_SUBDIR)/stage4-libctf/Makefile ] || exit 0; \
+ 	  $(MAKE) stage4-start; \
+ 	fi; \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	$(MAKE) $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  clean
+ @endif libctf-bootstrap
+ 
+ 
+ .PHONY: all-stageprofile-libctf maybe-all-stageprofile-libctf
+ .PHONY: clean-stageprofile-libctf maybe-clean-stageprofile-libctf
+ maybe-all-stageprofile-libctf:
+ maybe-clean-stageprofile-libctf:
+ @if libctf-bootstrap
+ maybe-all-stageprofile-libctf: all-stageprofile-libctf
+ all-stageprofile: all-stageprofile-libctf
+ TARGET-stageprofile-libctf = $(TARGET-libctf)
+ all-stageprofile-libctf: configure-stageprofile-libctf
+ 	@[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGEprofile_TFLAGS)"; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS)  \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	 \
+ 	$(MAKE) $(BASE_FLAGS_TO_PASS) \
+ 		CFLAGS="$(STAGEprofile_CFLAGS)" \
+ 		GENERATOR_CFLAGS="$(STAGEprofile_GENERATOR_CFLAGS)" \
+ 		CXXFLAGS="$(STAGEprofile_CXXFLAGS)" \
+ 		LIBCFLAGS="$(STAGEprofile_CFLAGS)" \
+ 		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
+ 		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
+ 		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
+ 		$(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  \
+ 		TFLAGS="$(STAGEprofile_TFLAGS)"  \
+ 		$(TARGET-stageprofile-libctf)
+ 
+ maybe-clean-stageprofile-libctf: clean-stageprofile-libctf
+ clean-stageprofile: clean-stageprofile-libctf
+ clean-stageprofile-libctf:
+ 	@if [ $(current_stage) = stageprofile ]; then \
+ 	  [ -f $(HOST_SUBDIR)/libctf/Makefile ] || exit 0; \
+ 	else \
+ 	  [ -f $(HOST_SUBDIR)/stageprofile-libctf/Makefile ] || exit 0; \
+ 	  $(MAKE) stageprofile-start; \
+ 	fi; \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	$(MAKE) $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  clean
+ @endif libctf-bootstrap
+ 
+ 
+ .PHONY: all-stagetrain-libctf maybe-all-stagetrain-libctf
+ .PHONY: clean-stagetrain-libctf maybe-clean-stagetrain-libctf
+ maybe-all-stagetrain-libctf:
+ maybe-clean-stagetrain-libctf:
+ @if libctf-bootstrap
+ maybe-all-stagetrain-libctf: all-stagetrain-libctf
+ all-stagetrain: all-stagetrain-libctf
+ TARGET-stagetrain-libctf = $(TARGET-libctf)
+ all-stagetrain-libctf: configure-stagetrain-libctf
+ 	@[ $(current_stage) = stagetrain ] || $(MAKE) stagetrain-start
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGEtrain_TFLAGS)"; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS)  \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	 \
+ 	$(MAKE) $(BASE_FLAGS_TO_PASS) \
+ 		CFLAGS="$(STAGEtrain_CFLAGS)" \
+ 		GENERATOR_CFLAGS="$(STAGEtrain_GENERATOR_CFLAGS)" \
+ 		CXXFLAGS="$(STAGEtrain_CXXFLAGS)" \
+ 		LIBCFLAGS="$(STAGEtrain_CFLAGS)" \
+ 		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
+ 		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
+ 		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
+ 		$(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  \
+ 		TFLAGS="$(STAGEtrain_TFLAGS)"  \
+ 		$(TARGET-stagetrain-libctf)
+ 
+ maybe-clean-stagetrain-libctf: clean-stagetrain-libctf
+ clean-stagetrain: clean-stagetrain-libctf
+ clean-stagetrain-libctf:
+ 	@if [ $(current_stage) = stagetrain ]; then \
+ 	  [ -f $(HOST_SUBDIR)/libctf/Makefile ] || exit 0; \
+ 	else \
+ 	  [ -f $(HOST_SUBDIR)/stagetrain-libctf/Makefile ] || exit 0; \
+ 	  $(MAKE) stagetrain-start; \
+ 	fi; \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	$(MAKE) $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  clean
+ @endif libctf-bootstrap
+ 
+ 
+ .PHONY: all-stagefeedback-libctf maybe-all-stagefeedback-libctf
+ .PHONY: clean-stagefeedback-libctf maybe-clean-stagefeedback-libctf
+ maybe-all-stagefeedback-libctf:
+ maybe-clean-stagefeedback-libctf:
+ @if libctf-bootstrap
+ maybe-all-stagefeedback-libctf: all-stagefeedback-libctf
+ all-stagefeedback: all-stagefeedback-libctf
+ TARGET-stagefeedback-libctf = $(TARGET-libctf)
+ all-stagefeedback-libctf: configure-stagefeedback-libctf
+ 	@[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGEfeedback_TFLAGS)"; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS)  \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	 \
+ 	$(MAKE) $(BASE_FLAGS_TO_PASS) \
+ 		CFLAGS="$(STAGEfeedback_CFLAGS)" \
+ 		GENERATOR_CFLAGS="$(STAGEfeedback_GENERATOR_CFLAGS)" \
+ 		CXXFLAGS="$(STAGEfeedback_CXXFLAGS)" \
+ 		LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \
+ 		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
+ 		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
+ 		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
+ 		$(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  \
+ 		TFLAGS="$(STAGEfeedback_TFLAGS)"  \
+ 		$(TARGET-stagefeedback-libctf)
+ 
+ maybe-clean-stagefeedback-libctf: clean-stagefeedback-libctf
+ clean-stagefeedback: clean-stagefeedback-libctf
+ clean-stagefeedback-libctf:
+ 	@if [ $(current_stage) = stagefeedback ]; then \
+ 	  [ -f $(HOST_SUBDIR)/libctf/Makefile ] || exit 0; \
+ 	else \
+ 	  [ -f $(HOST_SUBDIR)/stagefeedback-libctf/Makefile ] || exit 0; \
+ 	  $(MAKE) stagefeedback-start; \
+ 	fi; \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	$(MAKE) $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  clean
+ @endif libctf-bootstrap
+ 
+ 
+ .PHONY: all-stageautoprofile-libctf maybe-all-stageautoprofile-libctf
+ .PHONY: clean-stageautoprofile-libctf maybe-clean-stageautoprofile-libctf
+ maybe-all-stageautoprofile-libctf:
+ maybe-clean-stageautoprofile-libctf:
+ @if libctf-bootstrap
+ maybe-all-stageautoprofile-libctf: all-stageautoprofile-libctf
+ all-stageautoprofile: all-stageautoprofile-libctf
+ TARGET-stageautoprofile-libctf = $(TARGET-libctf)
+ all-stageautoprofile-libctf: configure-stageautoprofile-libctf
+ 	@[ $(current_stage) = stageautoprofile ] || $(MAKE) stageautoprofile-start
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGEautoprofile_TFLAGS)"; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS)  \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	$$s/gcc/config/i386/$(AUTO_PROFILE) \
+ 	$(MAKE) $(BASE_FLAGS_TO_PASS) \
+ 		CFLAGS="$(STAGEautoprofile_CFLAGS)" \
+ 		GENERATOR_CFLAGS="$(STAGEautoprofile_GENERATOR_CFLAGS)" \
+ 		CXXFLAGS="$(STAGEautoprofile_CXXFLAGS)" \
+ 		LIBCFLAGS="$(STAGEautoprofile_CFLAGS)" \
+ 		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
+ 		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
+ 		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
+ 		$(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  \
+ 		TFLAGS="$(STAGEautoprofile_TFLAGS)"  \
+ 		$(TARGET-stageautoprofile-libctf)
+ 
+ maybe-clean-stageautoprofile-libctf: clean-stageautoprofile-libctf
+ clean-stageautoprofile: clean-stageautoprofile-libctf
+ clean-stageautoprofile-libctf:
+ 	@if [ $(current_stage) = stageautoprofile ]; then \
+ 	  [ -f $(HOST_SUBDIR)/libctf/Makefile ] || exit 0; \
+ 	else \
+ 	  [ -f $(HOST_SUBDIR)/stageautoprofile-libctf/Makefile ] || exit 0; \
+ 	  $(MAKE) stageautoprofile-start; \
+ 	fi; \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	$(MAKE) $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  clean
+ @endif libctf-bootstrap
+ 
+ 
+ .PHONY: all-stageautofeedback-libctf maybe-all-stageautofeedback-libctf
+ .PHONY: clean-stageautofeedback-libctf maybe-clean-stageautofeedback-libctf
+ maybe-all-stageautofeedback-libctf:
+ maybe-clean-stageautofeedback-libctf:
+ @if libctf-bootstrap
+ maybe-all-stageautofeedback-libctf: all-stageautofeedback-libctf
+ all-stageautofeedback: all-stageautofeedback-libctf
+ TARGET-stageautofeedback-libctf = $(TARGET-libctf)
+ all-stageautofeedback-libctf: configure-stageautofeedback-libctf
+ 	@[ $(current_stage) = stageautofeedback ] || $(MAKE) stageautofeedback-start
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	TFLAGS="$(STAGEautofeedback_TFLAGS)"; \
+ 	$(HOST_EXPORTS) \
+ 	$(POSTSTAGE1_HOST_EXPORTS)  \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	 \
+ 	$(MAKE) $(BASE_FLAGS_TO_PASS) \
+ 		CFLAGS="$(STAGEautofeedback_CFLAGS)" \
+ 		GENERATOR_CFLAGS="$(STAGEautofeedback_GENERATOR_CFLAGS)" \
+ 		CXXFLAGS="$(STAGEautofeedback_CXXFLAGS)" \
+ 		LIBCFLAGS="$(STAGEautofeedback_CFLAGS)" \
+ 		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
+ 		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
+ 		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
+ 		$(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  \
+ 		TFLAGS="$(STAGEautofeedback_TFLAGS)" PERF_DATA=perf.data \
+ 		$(TARGET-stageautofeedback-libctf)
+ 
+ maybe-clean-stageautofeedback-libctf: clean-stageautofeedback-libctf
+ clean-stageautofeedback: clean-stageautofeedback-libctf
+ clean-stageautofeedback-libctf:
+ 	@if [ $(current_stage) = stageautofeedback ]; then \
+ 	  [ -f $(HOST_SUBDIR)/libctf/Makefile ] || exit 0; \
+ 	else \
+ 	  [ -f $(HOST_SUBDIR)/stageautofeedback-libctf/Makefile ] || exit 0; \
+ 	  $(MAKE) stageautofeedback-start; \
+ 	fi; \
+ 	cd $(HOST_SUBDIR)/libctf && \
+ 	$(MAKE) $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS)  clean
+ @endif libctf-bootstrap
+ 
+ 
+ 
+ 
+ 
+ .PHONY: check-libctf maybe-check-libctf
+ maybe-check-libctf:
+ @if libctf
+ maybe-check-libctf: check-libctf
+ 
+ check-libctf:
+ 
+ @endif libctf
+ 
+ .PHONY: install-libctf maybe-install-libctf
+ maybe-install-libctf:
+ @if libctf
+ maybe-install-libctf: install-libctf
+ 
+ install-libctf:
+ 
+ @endif libctf
+ 
+ .PHONY: install-strip-libctf maybe-install-strip-libctf
+ maybe-install-strip-libctf:
+ @if libctf
+ maybe-install-strip-libctf: install-strip-libctf
+ 
+ install-strip-libctf:
+ 
+ @endif libctf
+ 
+ # Other targets (info, dvi, pdf, etc.)
+ 
+ .PHONY: maybe-info-libctf info-libctf
+ maybe-info-libctf:
+ @if libctf
+ maybe-info-libctf: info-libctf
+ 
+ info-libctf: \
+     configure-libctf 
+ 	@[ -f ./libctf/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing info in libctf"; \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          info) \
+ 	  || exit 1
+ 
+ @endif libctf
+ 
+ .PHONY: maybe-dvi-libctf dvi-libctf
+ maybe-dvi-libctf:
+ @if libctf
+ maybe-dvi-libctf: dvi-libctf
+ 
+ dvi-libctf: \
+     configure-libctf 
+ 	@[ -f ./libctf/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing dvi in libctf"; \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          dvi) \
+ 	  || exit 1
+ 
+ @endif libctf
+ 
+ .PHONY: maybe-pdf-libctf pdf-libctf
+ maybe-pdf-libctf:
+ @if libctf
+ maybe-pdf-libctf: pdf-libctf
+ 
+ pdf-libctf: \
+     configure-libctf 
+ 	@[ -f ./libctf/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing pdf in libctf"; \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          pdf) \
+ 	  || exit 1
+ 
+ @endif libctf
+ 
+ .PHONY: maybe-html-libctf html-libctf
+ maybe-html-libctf:
+ @if libctf
+ maybe-html-libctf: html-libctf
+ 
+ html-libctf: \
+     configure-libctf 
+ 	@[ -f ./libctf/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing html in libctf"; \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          html) \
+ 	  || exit 1
+ 
+ @endif libctf
+ 
+ .PHONY: maybe-TAGS-libctf TAGS-libctf
+ maybe-TAGS-libctf:
+ @if libctf
+ maybe-TAGS-libctf: TAGS-libctf
+ 
+ TAGS-libctf: \
+     configure-libctf 
+ 	@[ -f ./libctf/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing TAGS in libctf"; \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          TAGS) \
+ 	  || exit 1
+ 
+ @endif libctf
+ 
+ .PHONY: maybe-install-info-libctf install-info-libctf
+ maybe-install-info-libctf:
+ @if libctf
+ maybe-install-info-libctf: install-info-libctf
+ 
+ install-info-libctf: \
+     configure-libctf \
+     info-libctf 
+ 	@[ -f ./libctf/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing install-info in libctf"; \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          install-info) \
+ 	  || exit 1
+ 
+ @endif libctf
+ 
+ .PHONY: maybe-install-pdf-libctf install-pdf-libctf
+ maybe-install-pdf-libctf:
+ @if libctf
+ maybe-install-pdf-libctf: install-pdf-libctf
+ 
+ install-pdf-libctf: \
+     configure-libctf \
+     pdf-libctf 
+ 	@[ -f ./libctf/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing install-pdf in libctf"; \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          install-pdf) \
+ 	  || exit 1
+ 
+ @endif libctf
+ 
+ .PHONY: maybe-install-html-libctf install-html-libctf
+ maybe-install-html-libctf:
+ @if libctf
+ maybe-install-html-libctf: install-html-libctf
+ 
+ install-html-libctf: \
+     configure-libctf \
+     html-libctf 
+ 	@[ -f ./libctf/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing install-html in libctf"; \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          install-html) \
+ 	  || exit 1
+ 
+ @endif libctf
+ 
+ .PHONY: maybe-installcheck-libctf installcheck-libctf
+ maybe-installcheck-libctf:
+ @if libctf
+ maybe-installcheck-libctf: installcheck-libctf
+ 
+ installcheck-libctf: \
+     configure-libctf 
+ 	@[ -f ./libctf/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing installcheck in libctf"; \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          installcheck) \
+ 	  || exit 1
+ 
+ @endif libctf
+ 
+ .PHONY: maybe-mostlyclean-libctf mostlyclean-libctf
+ maybe-mostlyclean-libctf:
+ @if libctf
+ maybe-mostlyclean-libctf: mostlyclean-libctf
+ 
+ mostlyclean-libctf: 
+ 	@[ -f ./libctf/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing mostlyclean in libctf"; \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          mostlyclean) \
+ 	  || exit 1
+ 
+ @endif libctf
+ 
+ .PHONY: maybe-clean-libctf clean-libctf
+ maybe-clean-libctf:
+ @if libctf
+ maybe-clean-libctf: clean-libctf
+ 
+ clean-libctf: 
+ 	@[ -f ./libctf/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing clean in libctf"; \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          clean) \
+ 	  || exit 1
+ 
+ @endif libctf
+ 
+ .PHONY: maybe-distclean-libctf distclean-libctf
+ maybe-distclean-libctf:
+ @if libctf
+ maybe-distclean-libctf: distclean-libctf
+ 
+ distclean-libctf: 
+ 	@[ -f ./libctf/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing distclean in libctf"; \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          distclean) \
+ 	  || exit 1
+ 
+ @endif libctf
+ 
+ .PHONY: maybe-maintainer-clean-libctf maintainer-clean-libctf
+ maybe-maintainer-clean-libctf:
+ @if libctf
+ maybe-maintainer-clean-libctf: maintainer-clean-libctf
+ 
+ maintainer-clean-libctf: 
+ 	@[ -f ./libctf/Makefile ] || exit 0; \
+ 	r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(HOST_EXPORTS) \
+ 	for flag in $(EXTRA_HOST_FLAGS) ; do \
+ 	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ 	done; \
+ 	echo "Doing maintainer-clean in libctf"; \
+ 	(cd $(HOST_SUBDIR)/libctf && \
+ 	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ 	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ 	          "RANLIB=$${RANLIB}" \
+ 	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+ 	          maintainer-clean) \
+ 	  || exit 1
+ 
+ @endif libctf
+ 
+ 
+ 
  # ---------------------------------------
  # Modules which run on the target machine
  # ---------------------------------------
*************** stage1-start::
*** 53237,53242 ****
--- 55735,55745 ----
  	  mkdir stage1-lto-plugin; \
  	mv stage1-lto-plugin lto-plugin
  @endif lto-plugin
+ @if libctf
+ 	@cd $(HOST_SUBDIR); [ -d stage1-libctf ] || \
+ 	  mkdir stage1-libctf; \
+ 	mv stage1-libctf libctf
+ @endif libctf
  	@[ -d stage1-$(TARGET_SUBDIR) ] || \
  	  mkdir stage1-$(TARGET_SUBDIR); \
  	mv stage1-$(TARGET_SUBDIR) $(TARGET_SUBDIR)
*************** stage1-end::
*** 53352,53357 ****
--- 55855,55865 ----
  	  cd $(HOST_SUBDIR); mv lto-plugin stage1-lto-plugin; \
  	fi
  @endif lto-plugin
+ @if libctf
+ 	@if test -d $(HOST_SUBDIR)/libctf; then \
+ 	  cd $(HOST_SUBDIR); mv libctf stage1-libctf; \
+ 	fi
+ @endif libctf
  	@if test -d $(TARGET_SUBDIR); then \
  	  mv $(TARGET_SUBDIR) stage1-$(TARGET_SUBDIR); \
  	fi
*************** stage2-start::
*** 53532,53537 ****
--- 56040,56051 ----
  	mv stage2-lto-plugin lto-plugin; \
  	mv stage1-lto-plugin prev-lto-plugin || test -f stage1-lean 
  @endif lto-plugin
+ @if libctf
+ 	@cd $(HOST_SUBDIR); [ -d stage2-libctf ] || \
+ 	  mkdir stage2-libctf; \
+ 	mv stage2-libctf libctf; \
+ 	mv stage1-libctf prev-libctf || test -f stage1-lean 
+ @endif libctf
  	@[ -d stage2-$(TARGET_SUBDIR) ] || \
  	  mkdir stage2-$(TARGET_SUBDIR); \
  	mv stage2-$(TARGET_SUBDIR) $(TARGET_SUBDIR); \
*************** stage2-end::
*** 53670,53675 ****
--- 56184,56195 ----
  	  mv prev-lto-plugin stage1-lto-plugin; : ; \
  	fi
  @endif lto-plugin
+ @if libctf
+ 	@if test -d $(HOST_SUBDIR)/libctf; then \
+ 	  cd $(HOST_SUBDIR); mv libctf stage2-libctf; \
+ 	  mv prev-libctf stage1-libctf; : ; \
+ 	fi
+ @endif libctf
  	@if test -d $(TARGET_SUBDIR); then \
  	  mv $(TARGET_SUBDIR) stage2-$(TARGET_SUBDIR); \
  	  mv prev-$(TARGET_SUBDIR) stage1-$(TARGET_SUBDIR); : ; \
*************** stage3-start::
*** 53874,53879 ****
--- 56394,56405 ----
  	mv stage3-lto-plugin lto-plugin; \
  	mv stage2-lto-plugin prev-lto-plugin || test -f stage2-lean 
  @endif lto-plugin
+ @if libctf
+ 	@cd $(HOST_SUBDIR); [ -d stage3-libctf ] || \
+ 	  mkdir stage3-libctf; \
+ 	mv stage3-libctf libctf; \
+ 	mv stage2-libctf prev-libctf || test -f stage2-lean 
+ @endif libctf
  	@[ -d stage3-$(TARGET_SUBDIR) ] || \
  	  mkdir stage3-$(TARGET_SUBDIR); \
  	mv stage3-$(TARGET_SUBDIR) $(TARGET_SUBDIR); \
*************** stage3-end::
*** 54012,54017 ****
--- 56538,56549 ----
  	  mv prev-lto-plugin stage2-lto-plugin; : ; \
  	fi
  @endif lto-plugin
+ @if libctf
+ 	@if test -d $(HOST_SUBDIR)/libctf; then \
+ 	  cd $(HOST_SUBDIR); mv libctf stage3-libctf; \
+ 	  mv prev-libctf stage2-libctf; : ; \
+ 	fi
+ @endif libctf
  	@if test -d $(TARGET_SUBDIR); then \
  	  mv $(TARGET_SUBDIR) stage3-$(TARGET_SUBDIR); \
  	  mv prev-$(TARGET_SUBDIR) stage2-$(TARGET_SUBDIR); : ; \
*************** compare:
*** 54057,54063 ****
          sed=`echo stage3 | sed 's,^stage,,;s,.,.,g'`; \
  	files=`find stage3-* -name "*$(objext)" -print | \
  		 sed -n s,^stage$$sed-,,p`; \
! 	for file in $${files}; do \
  	  f1=$$r/stage2-$$file; f2=$$r/stage3-$$file; \
  	  if test ! -f $$f1; then continue; fi; \
  	  $(do-compare) > /dev/null 2>&1; \
--- 56589,56595 ----
          sed=`echo stage3 | sed 's,^stage,,;s,.,.,g'`; \
  	files=`find stage3-* -name "*$(objext)" -print | \
  		 sed -n s,^stage$$sed-,,p`; \
! 	for file in $${files} ${extra-compare}; do \
  	  f1=$$r/stage2-$$file; f2=$$r/stage3-$$file; \
  	  if test ! -f $$f1; then continue; fi; \
  	  $(do-compare) > /dev/null 2>&1; \
*************** stage4-start::
*** 54272,54277 ****
--- 56804,56815 ----
  	mv stage4-lto-plugin lto-plugin; \
  	mv stage3-lto-plugin prev-lto-plugin || test -f stage3-lean 
  @endif lto-plugin
+ @if libctf
+ 	@cd $(HOST_SUBDIR); [ -d stage4-libctf ] || \
+ 	  mkdir stage4-libctf; \
+ 	mv stage4-libctf libctf; \
+ 	mv stage3-libctf prev-libctf || test -f stage3-lean 
+ @endif libctf
  	@[ -d stage4-$(TARGET_SUBDIR) ] || \
  	  mkdir stage4-$(TARGET_SUBDIR); \
  	mv stage4-$(TARGET_SUBDIR) $(TARGET_SUBDIR); \
*************** stage4-end::
*** 54410,54415 ****
--- 56948,56959 ----
  	  mv prev-lto-plugin stage3-lto-plugin; : ; \
  	fi
  @endif lto-plugin
+ @if libctf
+ 	@if test -d $(HOST_SUBDIR)/libctf; then \
+ 	  cd $(HOST_SUBDIR); mv libctf stage4-libctf; \
+ 	  mv prev-libctf stage3-libctf; : ; \
+ 	fi
+ @endif libctf
  	@if test -d $(TARGET_SUBDIR); then \
  	  mv $(TARGET_SUBDIR) stage4-$(TARGET_SUBDIR); \
  	  mv prev-$(TARGET_SUBDIR) stage3-$(TARGET_SUBDIR); : ; \
*************** compare3:
*** 54455,54461 ****
          sed=`echo stage4 | sed 's,^stage,,;s,.,.,g'`; \
  	files=`find stage4-* -name "*$(objext)" -print | \
  		 sed -n s,^stage$$sed-,,p`; \
! 	for file in $${files}; do \
  	  f1=$$r/stage3-$$file; f2=$$r/stage4-$$file; \
  	  if test ! -f $$f1; then continue; fi; \
  	  $(do-compare3) > /dev/null 2>&1; \
--- 56999,57005 ----
          sed=`echo stage4 | sed 's,^stage,,;s,.,.,g'`; \
  	files=`find stage4-* -name "*$(objext)" -print | \
  		 sed -n s,^stage$$sed-,,p`; \
! 	for file in $${files} ${extra-compare}; do \
  	  f1=$$r/stage3-$$file; f2=$$r/stage4-$$file; \
  	  if test ! -f $$f1; then continue; fi; \
  	  $(do-compare3) > /dev/null 2>&1; \
*************** stageprofile-start::
*** 54658,54663 ****
--- 57202,57213 ----
  	mv stageprofile-lto-plugin lto-plugin; \
  	mv stage1-lto-plugin prev-lto-plugin || test -f stage1-lean 
  @endif lto-plugin
+ @if libctf
+ 	@cd $(HOST_SUBDIR); [ -d stageprofile-libctf ] || \
+ 	  mkdir stageprofile-libctf; \
+ 	mv stageprofile-libctf libctf; \
+ 	mv stage1-libctf prev-libctf || test -f stage1-lean 
+ @endif libctf
  	@[ -d stageprofile-$(TARGET_SUBDIR) ] || \
  	  mkdir stageprofile-$(TARGET_SUBDIR); \
  	mv stageprofile-$(TARGET_SUBDIR) $(TARGET_SUBDIR); \
*************** stageprofile-end::
*** 54796,54801 ****
--- 57346,57357 ----
  	  mv prev-lto-plugin stage1-lto-plugin; : ; \
  	fi
  @endif lto-plugin
+ @if libctf
+ 	@if test -d $(HOST_SUBDIR)/libctf; then \
+ 	  cd $(HOST_SUBDIR); mv libctf stageprofile-libctf; \
+ 	  mv prev-libctf stage1-libctf; : ; \
+ 	fi
+ @endif libctf
  	@if test -d $(TARGET_SUBDIR); then \
  	  mv $(TARGET_SUBDIR) stageprofile-$(TARGET_SUBDIR); \
  	  mv prev-$(TARGET_SUBDIR) stage1-$(TARGET_SUBDIR); : ; \
*************** stagetrain-start::
*** 54977,54982 ****
--- 57533,57544 ----
  	mv stagetrain-lto-plugin lto-plugin; \
  	mv stageprofile-lto-plugin prev-lto-plugin || test -f stageprofile-lean 
  @endif lto-plugin
+ @if libctf
+ 	@cd $(HOST_SUBDIR); [ -d stagetrain-libctf ] || \
+ 	  mkdir stagetrain-libctf; \
+ 	mv stagetrain-libctf libctf; \
+ 	mv stageprofile-libctf prev-libctf || test -f stageprofile-lean 
+ @endif libctf
  	@[ -d stagetrain-$(TARGET_SUBDIR) ] || \
  	  mkdir stagetrain-$(TARGET_SUBDIR); \
  	mv stagetrain-$(TARGET_SUBDIR) $(TARGET_SUBDIR); \
*************** stagetrain-end::
*** 55115,55120 ****
--- 57677,57688 ----
  	  mv prev-lto-plugin stageprofile-lto-plugin; : ; \
  	fi
  @endif lto-plugin
+ @if libctf
+ 	@if test -d $(HOST_SUBDIR)/libctf; then \
+ 	  cd $(HOST_SUBDIR); mv libctf stagetrain-libctf; \
+ 	  mv prev-libctf stageprofile-libctf; : ; \
+ 	fi
+ @endif libctf
  	@if test -d $(TARGET_SUBDIR); then \
  	  mv $(TARGET_SUBDIR) stagetrain-$(TARGET_SUBDIR); \
  	  mv prev-$(TARGET_SUBDIR) stageprofile-$(TARGET_SUBDIR); : ; \
*************** stagefeedback-start::
*** 55296,55301 ****
--- 57864,57875 ----
  	mv stagefeedback-lto-plugin lto-plugin; \
  	mv stagetrain-lto-plugin prev-lto-plugin || test -f stagetrain-lean 
  @endif lto-plugin
+ @if libctf
+ 	@cd $(HOST_SUBDIR); [ -d stagefeedback-libctf ] || \
+ 	  mkdir stagefeedback-libctf; \
+ 	mv stagefeedback-libctf libctf; \
+ 	mv stagetrain-libctf prev-libctf || test -f stagetrain-lean 
+ @endif libctf
  	@[ -d stagefeedback-$(TARGET_SUBDIR) ] || \
  	  mkdir stagefeedback-$(TARGET_SUBDIR); \
  	mv stagefeedback-$(TARGET_SUBDIR) $(TARGET_SUBDIR); \
*************** stagefeedback-end::
*** 55434,55439 ****
--- 58008,58019 ----
  	  mv prev-lto-plugin stagetrain-lto-plugin; : ; \
  	fi
  @endif lto-plugin
+ @if libctf
+ 	@if test -d $(HOST_SUBDIR)/libctf; then \
+ 	  cd $(HOST_SUBDIR); mv libctf stagefeedback-libctf; \
+ 	  mv prev-libctf stagetrain-libctf; : ; \
+ 	fi
+ @endif libctf
  	@if test -d $(TARGET_SUBDIR); then \
  	  mv $(TARGET_SUBDIR) stagefeedback-$(TARGET_SUBDIR); \
  	  mv prev-$(TARGET_SUBDIR) stagetrain-$(TARGET_SUBDIR); : ; \
*************** stageautoprofile-start::
*** 55638,55643 ****
--- 58218,58229 ----
  	mv stageautoprofile-lto-plugin lto-plugin; \
  	mv stage1-lto-plugin prev-lto-plugin || test -f stage1-lean 
  @endif lto-plugin
+ @if libctf
+ 	@cd $(HOST_SUBDIR); [ -d stageautoprofile-libctf ] || \
+ 	  mkdir stageautoprofile-libctf; \
+ 	mv stageautoprofile-libctf libctf; \
+ 	mv stage1-libctf prev-libctf || test -f stage1-lean 
+ @endif libctf
  	@[ -d stageautoprofile-$(TARGET_SUBDIR) ] || \
  	  mkdir stageautoprofile-$(TARGET_SUBDIR); \
  	mv stageautoprofile-$(TARGET_SUBDIR) $(TARGET_SUBDIR); \
*************** stageautoprofile-end::
*** 55776,55781 ****
--- 58362,58373 ----
  	  mv prev-lto-plugin stage1-lto-plugin; : ; \
  	fi
  @endif lto-plugin
+ @if libctf
+ 	@if test -d $(HOST_SUBDIR)/libctf; then \
+ 	  cd $(HOST_SUBDIR); mv libctf stageautoprofile-libctf; \
+ 	  mv prev-libctf stage1-libctf; : ; \
+ 	fi
+ @endif libctf
  	@if test -d $(TARGET_SUBDIR); then \
  	  mv $(TARGET_SUBDIR) stageautoprofile-$(TARGET_SUBDIR); \
  	  mv prev-$(TARGET_SUBDIR) stage1-$(TARGET_SUBDIR); : ; \
*************** stageautofeedback-start::
*** 55957,55962 ****
--- 58549,58560 ----
  	mv stageautofeedback-lto-plugin lto-plugin; \
  	mv stageautoprofile-lto-plugin prev-lto-plugin || test -f stageautoprofile-lean 
  @endif lto-plugin
+ @if libctf
+ 	@cd $(HOST_SUBDIR); [ -d stageautofeedback-libctf ] || \
+ 	  mkdir stageautofeedback-libctf; \
+ 	mv stageautofeedback-libctf libctf; \
+ 	mv stageautoprofile-libctf prev-libctf || test -f stageautoprofile-lean 
+ @endif libctf
  	@[ -d stageautofeedback-$(TARGET_SUBDIR) ] || \
  	  mkdir stageautofeedback-$(TARGET_SUBDIR); \
  	mv stageautofeedback-$(TARGET_SUBDIR) $(TARGET_SUBDIR); \
*************** stageautofeedback-end::
*** 56095,56100 ****
--- 58693,58704 ----
  	  mv prev-lto-plugin stageautoprofile-lto-plugin; : ; \
  	fi
  @endif lto-plugin
+ @if libctf
+ 	@if test -d $(HOST_SUBDIR)/libctf; then \
+ 	  cd $(HOST_SUBDIR); mv libctf stageautofeedback-libctf; \
+ 	  mv prev-libctf stageautoprofile-libctf; : ; \
+ 	fi
+ @endif libctf
  	@if test -d $(TARGET_SUBDIR); then \
  	  mv $(TARGET_SUBDIR) stageautofeedback-$(TARGET_SUBDIR); \
  	  mv prev-$(TARGET_SUBDIR) stageautoprofile-$(TARGET_SUBDIR); : ; \
*************** all-stagefeedback-intl: maybe-all-stagef
*** 56818,56832 ****
--- 59422,59445 ----
  all-stageautoprofile-intl: maybe-all-stageautoprofile-libiconv
  all-stageautofeedback-intl: maybe-all-stageautofeedback-libiconv
  configure-gdb: maybe-configure-sim
+ configure-gdb: maybe-all-gnulib
+ configure-gdb: maybe-all-gdbsupport
+ all-gdb: maybe-all-gnulib
+ all-gdb: maybe-all-gdbsupport
  all-gdb: maybe-all-readline
  all-gdb: maybe-all-build-bison
  all-gdb: maybe-all-sim
  all-gdb: maybe-all-libtermcap
+ configure-gdbserver: maybe-all-gnulib
+ all-gdbserver: maybe-all-gdbsupport
+ all-gdbserver: maybe-all-gnulib
  configure-libgui: maybe-configure-tcl
  configure-libgui: maybe-configure-tk
  all-libgui: maybe-all-tcl
  all-libgui: maybe-all-tk
  all-libgui: maybe-all-itcl
+ configure-gdbsupport: maybe-configure-gnulib
+ all-gdbsupport: maybe-all-gnulib
  configure-bfd: configure-libiberty
  configure-stage1-bfd: configure-stage1-libiberty
  configure-stage2-bfd: configure-stage2-libiberty
*************** all-stagetrain-binutils: maybe-all-stage
*** 56977,56982 ****
--- 59590,59605 ----
  all-stagefeedback-binutils: maybe-all-stagefeedback-gas
  all-stageautoprofile-binutils: maybe-all-stageautoprofile-gas
  all-stageautofeedback-binutils: maybe-all-stageautofeedback-gas
+ all-binutils: maybe-all-libctf
+ all-stage1-binutils: maybe-all-stage1-libctf
+ all-stage2-binutils: maybe-all-stage2-libctf
+ all-stage3-binutils: maybe-all-stage3-libctf
+ all-stage4-binutils: maybe-all-stage4-libctf
+ all-stageprofile-binutils: maybe-all-stageprofile-libctf
+ all-stagetrain-binutils: maybe-all-stagetrain-libctf
+ all-stagefeedback-binutils: maybe-all-stagefeedback-libctf
+ all-stageautoprofile-binutils: maybe-all-stageautoprofile-libctf
+ all-stageautofeedback-binutils: maybe-all-stageautofeedback-libctf
  install-binutils: maybe-install-opcodes
  install-strip-binutils: maybe-install-strip-opcodes
  install-opcodes: maybe-install-bfd
*************** install-strip-sid: maybe-install-strip-t
*** 57267,57272 ****
--- 59890,59965 ----
  all-sim: maybe-all-readline
  all-sim: maybe-configure-gdb
  all-fastjar: maybe-all-build-texinfo
+ all-libctf: all-libiberty
+ all-stage1-libctf: all-stage1-libiberty
+ all-stage2-libctf: all-stage2-libiberty
+ all-stage3-libctf: all-stage3-libiberty
+ all-stage4-libctf: all-stage4-libiberty
+ all-stageprofile-libctf: all-stageprofile-libiberty
+ all-stagetrain-libctf: all-stagetrain-libiberty
+ all-stagefeedback-libctf: all-stagefeedback-libiberty
+ all-stageautoprofile-libctf: all-stageautoprofile-libiberty
+ all-stageautofeedback-libctf: all-stageautofeedback-libiberty
+ all-libctf: maybe-all-bfd
+ all-stage1-libctf: maybe-all-stage1-bfd
+ all-stage2-libctf: maybe-all-stage2-bfd
+ all-stage3-libctf: maybe-all-stage3-bfd
+ all-stage4-libctf: maybe-all-stage4-bfd
+ all-stageprofile-libctf: maybe-all-stageprofile-bfd
+ all-stagetrain-libctf: maybe-all-stagetrain-bfd
+ all-stagefeedback-libctf: maybe-all-stagefeedback-bfd
+ all-stageautoprofile-libctf: maybe-all-stageautoprofile-bfd
+ all-stageautofeedback-libctf: maybe-all-stageautofeedback-bfd
+ all-libctf: maybe-all-zlib
+ all-stage1-libctf: maybe-all-stage1-zlib
+ all-stage2-libctf: maybe-all-stage2-zlib
+ all-stage3-libctf: maybe-all-stage3-zlib
+ all-stage4-libctf: maybe-all-stage4-zlib
+ all-stageprofile-libctf: maybe-all-stageprofile-zlib
+ all-stagetrain-libctf: maybe-all-stagetrain-zlib
+ all-stagefeedback-libctf: maybe-all-stagefeedback-zlib
+ all-stageautoprofile-libctf: maybe-all-stageautoprofile-zlib
+ all-stageautofeedback-libctf: maybe-all-stageautofeedback-zlib
+ configure-libctf: maybe-all-bfd
+ configure-stage1-libctf: maybe-all-stage1-bfd
+ configure-stage2-libctf: maybe-all-stage2-bfd
+ configure-stage3-libctf: maybe-all-stage3-bfd
+ configure-stage4-libctf: maybe-all-stage4-bfd
+ configure-stageprofile-libctf: maybe-all-stageprofile-bfd
+ configure-stagetrain-libctf: maybe-all-stagetrain-bfd
+ configure-stagefeedback-libctf: maybe-all-stagefeedback-bfd
+ configure-stageautoprofile-libctf: maybe-all-stageautoprofile-bfd
+ configure-stageautofeedback-libctf: maybe-all-stageautofeedback-bfd
+ configure-libctf: maybe-all-intl
+ configure-stage1-libctf: maybe-all-stage1-intl
+ configure-stage2-libctf: maybe-all-stage2-intl
+ configure-stage3-libctf: maybe-all-stage3-intl
+ configure-stage4-libctf: maybe-all-stage4-intl
+ configure-stageprofile-libctf: maybe-all-stageprofile-intl
+ configure-stagetrain-libctf: maybe-all-stagetrain-intl
+ configure-stagefeedback-libctf: maybe-all-stagefeedback-intl
+ configure-stageautoprofile-libctf: maybe-all-stageautoprofile-intl
+ configure-stageautofeedback-libctf: maybe-all-stageautofeedback-intl
+ configure-libctf: maybe-all-zlib
+ configure-stage1-libctf: maybe-all-stage1-zlib
+ configure-stage2-libctf: maybe-all-stage2-zlib
+ configure-stage3-libctf: maybe-all-stage3-zlib
+ configure-stage4-libctf: maybe-all-stage4-zlib
+ configure-stageprofile-libctf: maybe-all-stageprofile-zlib
+ configure-stagetrain-libctf: maybe-all-stagetrain-zlib
+ configure-stagefeedback-libctf: maybe-all-stagefeedback-zlib
+ configure-stageautoprofile-libctf: maybe-all-stageautoprofile-zlib
+ configure-stageautofeedback-libctf: maybe-all-stageautofeedback-zlib
+ configure-libctf: maybe-all-libiconv
+ configure-stage1-libctf: maybe-all-stage1-libiconv
+ configure-stage2-libctf: maybe-all-stage2-libiconv
+ configure-stage3-libctf: maybe-all-stage3-libiconv
+ configure-stage4-libctf: maybe-all-stage4-libiconv
+ configure-stageprofile-libctf: maybe-all-stageprofile-libiconv
+ configure-stagetrain-libctf: maybe-all-stagetrain-libiconv
+ configure-stagefeedback-libctf: maybe-all-stagefeedback-libiconv
+ configure-stageautoprofile-libctf: maybe-all-stageautoprofile-libiconv
+ configure-stageautofeedback-libctf: maybe-all-stageautofeedback-libiconv
  all-bison: maybe-all-build-texinfo
  all-flex: maybe-all-build-bison
  all-flex: maybe-all-m4
*************** configure-gnattools: stage_last
*** 57347,57352 ****
--- 60040,60047 ----
  configure-libcc1: stage_last
  configure-utils: stage_last
  configure-gdb: stage_last
+ configure-gdbserver: stage_last
+ configure-gdbsupport: stage_last
  configure-gprof: stage_last
  configure-sid: stage_last
  configure-sim: stage_last
*************** all-gdb: maybe-all-libiberty
*** 57368,57373 ****
--- 60063,60072 ----
  all-gdb: maybe-all-libiconv
  all-gdb: maybe-all-opcodes
  all-gdb: maybe-all-libdecnumber
+ all-gdb: maybe-all-libctf
+ all-gdbserver: maybe-all-libiberty
+ configure-gdbsupport: maybe-configure-intl
+ all-gdbsupport: maybe-all-intl
  configure-gprof: maybe-configure-intl
  all-gprof: maybe-all-libiberty
  all-gprof: maybe-all-bfd
diff -Nrcpad gcc-9.3.0/Makefile.tpl gcc-10.1.0/Makefile.tpl
*** gcc-9.3.0/Makefile.tpl	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/Makefile.tpl	Thu May  7 10:49:58 2020
*************** HOST_EXPORTS = \
*** 201,206 ****
--- 201,207 ----
  	AR="$(AR)"; export AR; \
  	AS="$(AS)"; export AS; \
  	CC_FOR_BUILD="$(CC_FOR_BUILD)"; export CC_FOR_BUILD; \
+ 	CXX_FOR_BUILD="$(CXX_FOR_BUILD)"; export CXX_FOR_BUILD; \
  	DLLTOOL="$(DLLTOOL)"; export DLLTOOL; \
  	LD="$(LD)"; export LD; \
  	LDFLAGS="$(STAGE1_LDFLAGS) $(LDFLAGS)"; export LDFLAGS; \
*************** do-clean: clean-stage[+id+]
*** 1677,1683 ****
          sed=`echo stage[+id+] | sed 's,^stage,,;s,.,.,g'`; \
  	files=`find stage[+id+]-* -name "*$(objext)" -print | \
  		 sed -n s,^stage$$sed-,,p`; \
! 	for file in $${files}; do \
  	  f1=$$r/stage[+prev+]-$$file; f2=$$r/stage[+id+]-$$file; \
  	  if test ! -f $$f1; then continue; fi; \
  	  $(do-[+compare-target+]) > /dev/null 2>&1; \
--- 1678,1684 ----
          sed=`echo stage[+id+] | sed 's,^stage,,;s,.,.,g'`; \
  	files=`find stage[+id+]-* -name "*$(objext)" -print | \
  		 sed -n s,^stage$$sed-,,p`; \
! 	for file in $${files} ${extra-compare}; do \
  	  f1=$$r/stage[+prev+]-$$file; f2=$$r/stage[+id+]-$$file; \
  	  if test ! -f $$f1; then continue; fi; \
  	  $(do-[+compare-target+]) > /dev/null 2>&1; \
diff -Nrcpad gcc-9.3.0/NEWS gcc-10.1.0/NEWS
*** gcc-9.3.0/NEWS	Thu Mar 12 11:08:55 2020
--- gcc-10.1.0/NEWS	Thu May  7 10:51:18 2020
*************** that led to GCC 3. For information on GC
*** 5,10 ****
--- 5,767 ----
  see ONEWS.
  
  ======================================================================
+ http://gcc.gnu.org/gcc-10/index.html
+                              GCC 10 Release Series
+ 
+    May 7, 2020
+ 
+    The [1]GNU project and the GCC developers are pleased to announce the
+    release of GCC 10.1.
+ 
+    This release is a major release, containing new features (as well as
+    many other improvements) relative to GCC 9.x.
+ 
+ Release History
+ 
+    GCC 10.1
+           May 7, 2020 ([2]changes, [3]documentation)
+ 
+ References and Acknowledgements
+ 
+    GCC used to stand for the GNU C Compiler, but since the compiler
+    supports several other languages aside from C, it now stands for the
+    GNU Compiler Collection.
+ 
+    A list of [4]successful builds is updated as new information becomes
+    available.
+ 
+    The GCC developers would like to thank the numerous people that have
+    contributed new features, improvements, bug fixes, and other changes as
+    well as test results to GCC. This [5]amazing group of volunteers is
+    what makes GCC successful.
+ 
+    For additional information about GCC please refer to the [6]GCC project
+    web site or contact the [7]GCC development mailing list.
+ 
+    To obtain GCC please use [8]our mirror sites or [9]our version control
+    system.
+ 
+ 
+     For questions related to the use of GCC, please consult these web
+     pages and the [10]GCC manuals. If that fails, the
+     [11]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+     web pages and the development of GCC are welcome on our developer
+     list at [12]gcc@gcc.gnu.org. All of [13]our lists have public
+     archives.
+ 
+    Copyright (C) [14]Free Software Foundation, Inc. Verbatim copying and
+    distribution of this entire article is permitted in any medium,
+    provided this notice is preserved.
+ 
+    These pages are [15]maintained by the GCC team. Last modified
+    2020-05-07[16].
+ 
+ References
+ 
+    1. http://www.gnu.org/
+    2. http://gcc.gnu.org/gcc-10/changes.html
+    3. http://gcc.gnu.org/onlinedocs/10.1.0/
+    4. http://gcc.gnu.org/gcc-10/buildstat.html
+    5. http://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Contributors.html
+    6. http://gcc.gnu.org/index.html
+    7. mailto:gcc@gcc.gnu.org
+    8. http://gcc.gnu.org/mirrors.html
+    9. http://gcc.gnu.org/git.html
+   10. https://gcc.gnu.org/onlinedocs/
+   11. mailto:gcc-help@gcc.gnu.org
+   12. mailto:gcc@gcc.gnu.org
+   13. https://gcc.gnu.org/lists.html
+   14. https://www.fsf.org/
+   15. https://gcc.gnu.org/about.html
+   16. http://validator.w3.org/check/referer
+ ======================================================================
+ http://gcc.gnu.org/gcc-10/changes.html
+                              GCC 10 Release Series
+                         Changes, New Features, and Fixes
+ 
+    This page is a "brief" summary of some of the huge number of
+    improvements in GCC 10. You may also want to check out our [1]Porting
+    to GCC 10 page and the [2]full GCC documentation.
+ 
+ Caveats
+ 
+      * An ABI incompatibility between C++14 and C++17 has been fixed. On
+        some targets a class with a zero-sized subobject would be passed
+        incorrectly when compiled as C++17 or C++20. See the [3]C++ notes
+        below for more details.
+      * The deprecated Profile Mode and array_allocator extensions have
+        been removed from libstdc++.
+      * The non-standard std::__is_nullptr_t type trait is deprecated and
+        will be removed from libstdc++ in a future release. The standard
+        trait std::is_null_pointer should be instead.
+      * The minimum version of the [4]MPFR library required for building
+        GCC has been increased to version 3.1.0 (released 2011-10-03).
+      * The automatic template instantiation at link time (-frepo) has been
+        removed.
+      * The --param allow-store-data-races internal parameter has been
+        removed in favor of a new official option -fallow-store-data-races.
+        While default behavior is unchanged and the new option allows to
+        correctly maintain a per compilation unit setting across link-time
+        optimization, alteration of the default via --param
+        allow-store-data-races will now be diagnosed and build systems have
+        to be adjusted accordingly.
+      * Offloading to Heterogeneous System Architecture Intermediate
+        Language (HSAIL) has been deprecated and will likely be removed in
+        a future release.
+ 
+ General Improvements
+ 
+      * New built-in functions:
+           + The [5]__has_builtin built-in preprocessor operator can be
+             used to query support for built-in functions provided by GCC
+             and other compilers that support it.
+           + __builtin_roundeven for the corresponding function from
+             ISO/IEC TS 18661.
+      * New command-line options:
+           + [6]-fallocation-dce removes unneeded pairs of new and delete
+             operators.
+           + [7]-fprofile-partial-training can now be used to inform the
+             compiler that code paths not covered by the training run
+             should not be optimized for size.
+           + [8]-fprofile-reproducible controls level of reproducibility of
+             profile gathered by [9]-fprofile-generate. This makes it
+             possible to rebuild program with same outcome which is useful,
+             for example, for distribution packages.
+           + [10]-fprofile-prefix-path can be used in combination with
+             -fprofile-generate=profile_dir and -fprofile-use=profile_dir
+             to inform GCC where the base directory of build source tree is
+             in case it differs between instrumentation and optimized
+             builds.
+           + [11]-fanalyzer enables a new static analysis pass and
+             associated warnings. This pass performs a time-consuming
+             exploration of paths through the code in the hope of detecting
+             various common errors, such as double-free bugs. This option
+             should be regarded as experimental in this release. In
+             particular, analysis of non-C code is unlikely to work.
+      * Inter-procedural optimization improvements:
+           + The inter-procedural scalar replacement of aggregates
+             (IPA-SRA) pass was re-implemented to work at link-time and can
+             now also remove computing and returning unused return values.
+           + [12]-finline-functions is now enabled at -O2 and was retuned
+             for better code size versus runtime performance trade-offs.
+             Inliner heuristics was also significantly sped up to avoid
+             negative impact to -flto -O2 compile times.
+           + Inliner heuristics and function cloning can now use
+             value-range information to predict effectivity of individual
+             transformations.
+           + During link-time optimization the C++ One Definition Rule is
+             used to increase precision of type based alias analysis.
+      * Link-time optimization improvements:
+           + A new binary [13]lto-dump has been added. The program can dump
+             various information about a LTO bytecode object file.
+           + Parallel phase of the LTO can automatically detect a running
+             make's jobserver or can fall back to number of available
+             cores.
+           + The LTO bytecode can be compressed with [14]zstd algorithm.
+             Configure script can automatically detect the zstd support.
+           + Most --param values can now be specified at translation unit
+             granularity. This includes all parameters controlling the
+             inliner and other inter-procedural optimizations. Unlike
+             earlier releases, GCC 10 will ignore parameters controlling
+             optimizations specified at link-time and apply parameters
+             specified at compile-time in the same manner as done for
+             optimization flags.
+      * Profile driven optimization improvements:
+           + Profile maintenance during compilation and hot/cold code
+             partitioning have been improved.
+           + Using [15]-fprofile-values, an instrumented binary can track
+             multiple values (up to 4) for e.g. indirect calls and provide
+             more precise profile information.
+ 
+ New Languages and Language-Specific Improvements
+ 
+      * Version 2.6 of the [16]OpenACC specification is now supported in
+        the C, C++ and Fortran compilers. See the [17]implementation status
+        section on the OpenACC wiki page and the [18]run-time library
+        documentation for further information.
+      * GCC 10 adds a number of newly implemented [19]OpenMP 5.0 features
+        on top of the GCC 9 release such as conditional lastprivate clause,
+        scan and loop directives, order(concurrent) and use_device_addr
+        clauses support, if clause on simd construct or partial support for
+        the declare variant directive, getting closer to full support of
+        the OpenMP 5.0 standard.
+      * OpenMP and OpenACC now support [20]offloading to AMD Radeon (GCN)
+        GPUs; supported are the third-generation Fiji (fiji) and the
+        fifth-generation VEGA 10/VEGA 20 (gfx900 or gfx906).
+ 
+   C family
+ 
+      * New attributes:
+           + The access function and type attribute has been added to
+             describe how a function accesses objects passed to it by
+             pointer or reference, and to associate such arguments with
+             integer arguments denoting the objects' sizes. The attribute
+             is used to enable the detection of invalid accesses by
+             user-defined functions, such as those diagnosed by
+             -Wstringop-overflow.
+           + The symver attribute can be used to bind symbols to specific
+             version nodes on ELF platforms. This is preferred to using
+             inline assembly with GNU as symver directive because the
+             latter is not compatible with link-time optimizations.
+      * New warnings:
+           + [21]-Wstring-compare, enabled by -Wextra, warns about equality
+             and inequality expressions between zero and the result of a
+             call to either strcmp and strncmp that evaluate to a constant
+             as a result of the length of one argument being greater than
+             the size of the array pointed to by the other.
+           + [22]-Wzero-length-bounds, enabled by -Warray-bounds, warns
+             about accesses to elements of zero-length arrays that might
+             overlap other members of the same object.
+      * Enhancements to existing warnings:
+           + [23]-Warray-bounds detects more out-of-bounds accesses to
+             member arrays as well as accesses to elements of zero-length
+             arrays.
+           + [24]-Wformat-overflow makes full use of string length
+             information computed by the strlen optimization pass.
+           + [25]-Wrestrict detects overlapping accesses to dynamically
+             allocated objects.
+           + [26]-Wreturn-local-addr diagnoses more instances of return
+             statements returning addresses of automatic variables.
+           + [27]-Wstringop-overflow detects more out-of-bounds stores to
+             member arrays including zero-length arrays, dynamically
+             allocated objects and variable length arrays, as well as more
+             instances of reads of unterminated character arrays by string
+             built-in functions. The warning also detects out-of-bounds
+             accesses by calls to user-defined functions declared with the
+             new attribute access.
+      * Extended characters in identifiers may now be specified directly in
+        the input encoding (UTF-8, by default), in addition to the UCN
+        syntax (\uNNNN or \UNNNNNNNN) that is already supported:
+ 
+ static const int π = 3;
+ int get_naïve_pi() {
+   return π;
+ }
+ 
+   C
+ 
+      * Several new features from the upcoming C2X revision of the ISO C
+        standard are supported with -std=c2x and -std=gnu2x. Some of these
+        features are also supported as extensions when compiling for older
+        language versions. In addition to the features listed, some
+        features previously supported as extensions and now added to the C
+        standard are enabled by default in C2X mode and not diagnosed with
+        -std=c2x -Wpedantic.
+           + The [[]] attribute syntax is supported, as in C++. Existing
+             attributes can be used with this syntax in forms such as
+             [[gnu::const]]. The standard attributes [[deprecated]],
+             [[fallthrough]] and [[maybe_unused]] are supported.
+           + UTF-8 character constants using the u8'' syntax are supported.
+           + <float.h> defines macros FLT_NORM_MAX, DBL_NORM_MAX and
+             LDBL_NORM_MAX.
+           + When decimal floating-point arithmetic is supported, <float.h>
+             defines macros DEC32_TRUE_MIN, DEC64_TRUE_MIN and
+             DEC128_TRUE_MIN, in addition to the macros that were
+             previously only defined if __STDC_WANT_DEC_FP__ was defined
+             before including <float.h>.
+           + In C2X mode, empty parentheses in a function definition give
+             that function a type with a prototype for subsequent calls;
+             other old-style function definitions are diagnosed by default
+             in C2X mode.
+           + The strftime format checking supports the %OB and %Ob formats.
+           + In C2X mode, -fno-fp-int-builtin-inexact is enabled by
+             default.
+      * GCC now defaults to -fno-common. As a result, global variable
+        accesses are more efficient on various targets. In C, global
+        variables with multiple tentative definitions now result in linker
+        errors. With -fcommon such definitions are silently merged during
+        linking.
+ 
+   C++
+ 
+      * Several C++20 features have been implemented:
+           + P1668R1, Permitting Unevaluated inline-assembly in constexpr
+             Functions
+           + P1161R3, Deprecate a[b,c]
+           + P0848R3, Conditionally Trivial Special Member Functions
+           + P1091R3, Extending structured bindings
+           + P1143R2, Adding the constinit keyword
+           + P1152R4, Deprecating volatile
+           + P0388R4, Permit conversions to arrays of unknown bound
+           + P0784R7, constexpr new
+           + Concepts, including P0734R0, P0857R0, P1084R2, P1141R2,
+             P0848R3, P1616R1, P1452R2
+           + P1301R4, [[nodiscard("with reason")]]
+           + P1814R0, class template argument deduction for alias templates
+           + P1816R0, class template argument deduction for aggregates
+           + P0960R3, Parenthesized initialization of aggregates
+           + P1331R2, Allow trivial default initialization in constexpr
+             contexts
+           + P1327R1, Allowing dynamic_cast and polymorphic typeid in
+             constexpr contexts
+           + P0912R5, Coroutines (requires -fcoroutines)
+      * Several C++ Defect Reports have been resolved, e.g.:
+           + DR 1560, lvalue-to-rvalue conversion in ?:
+           + DR 1813, __is_standard_layout for a class with repeated bases
+           + DR 2094, volatile scalars are trivially copyable,
+           + DR 2096, constraints on literal unions
+           + DR 2413, typename in conversion-function-ids
+           + DR 2352, Similar types and reference binding
+           + DR 1601, Promotion of enumeration with fixed underlying type
+           + DR 330, Qualification conversions and pointers to arrays of
+             pointers
+           + DR 1307, Overload resolution based on size of array
+             initializer-list
+           + DR 1710, Missing template keyword in class-or-decltype
+      * New warnings:
+           + [28]-Wmismatched-tags, disabled by default, warns about
+             declarations of structs, classes, and class templates and
+             their specializations with a class-key that does not match
+             either the definition or the first declaration if no
+             definition is provided. The option is provided to ease
+             portability to Windows-based compilers.
+           + [29]-Wredundant-tags, disabled by default, warns about
+             redundant class-key and enum-key in contexts where the key can
+             be eliminated without causing an syntactic ambiguity.
+      * G++ can now detect modifying constant objects in constexpr
+        evaluation (which is undefined behavior).
+      * G++ no longer emits bogus -Wsign-conversion warnings with explicit
+        casts.
+      * Narrowing is now detected in more contexts (e.g., case values).
+      * Memory consumption of the compiler has been reduced in constexpr
+        evaluation.
+      * The noexcept-specifier is now properly treated as a complete-class
+        context as per [30][class.mem].
+      * The attribute deprecated can now be used on namespaces too.
+      * The ABI of passing and returning certain C++ classes by value
+        changed on several targets in GCC 10, including [31]AArch64,
+        [32]ARM, [33]PowerPC ELFv2, [34]S/390 and [35]Itanium. These
+        changes affect classes with a zero-sized subobject (an empty base
+        class, or data member with the [[no_unique_address]] attribute)
+        where all other non-static data members have the same type (this is
+        called a "homogeneous aggregate" in some ABI specifications, or if
+        there is only one such member, a "single element"). In -std=c++17
+        and -std=c++20 modes, classes with an empty base class were not
+        considered to have a single element or to be a homogeneous
+        aggregate, and so could be passed differently (in the wrong
+        registers or at the wrong stack address). This could make code
+        compiled with -std=c++17 and -std=c++14 ABI incompatible. This has
+        been corrected and the empty bases are ignored in those ABI
+        decisions, so functions compiled with -std=c++14 and -std=c++17 are
+        now ABI compatible again. Example: struct empty {}; struct S :
+        empty { float f; }; void f(S);. Similarly, in classes containing
+        non-static data members with empty class types using the C++20
+        [[no_unique_address]] attribute, those members weren't ignored in
+        the ABI argument passing decisions as they should be. Both of these
+        ABI changes are now diagnosed with -Wpsabi.
+ 
+     Runtime Library (libstdc++)
+ 
+      * Improved experimental C++2a support, including:
+           + Library concepts in <concepts> and <iterator>.
+           + Constrained algorithms in <ranges>, <algorithm>, and <memory>
+             (thanks to Patrick Palka).
+           + New algorithms shift_left and shift_right (thanks to Patrick
+             Palka).
+           + std::span (thanks to JeanHeyd Meneide).
+           + Three-way comparisons in <compare> and throughout the library.
+           + Constexpr support in <algorithm> and elsewhere (thanks to
+             Edward Smith-Rowland).
+           + <stop_token> and std::jthread (thanks to Thomas Rodgers).
+           + std::atomic_ref and std::atomic<floating point>.
+           + Integer comparison functions (cmp_equal, cmp_less etc.).
+           + std::ssize, std::to_array.
+           + std::construct_at, std::destroy, constexpr std::allocator.
+           + Mathematical constants in <numbers>.
+      * Support for RDSEED in std::random_device.
+      * Reduced header dependencies, leading to faster compilation for some
+        code.
+ 
+   Fortran
+ 
+      * use_device_addr of version 5.0 of the [36]OpenMP specification is
+        now supported. Note that otherwise OpenMP 4.5 is partially
+        supported in the Fortran compiler; the largest missing item is
+        structure element mapping.
+      * The default buffer size for I/O using unformatted files has been
+        increased to 1048576. The buffer size for can now be set at runtime
+        via the environment variables GFORTRAN_FORMATTED_BUFFER_SIZE and
+        GFORTRAN_UNFORMATTED_BUFFER_SIZE for formatted and unformatted
+        files, respectively.
+      * Mismatches between actual and dummy argument lists in a single file
+        are now rejected with an error. Use the new option
+        -fallow-argument-mismatch to turn these errors into warnings; this
+        option is implied with -std=legacy. -Wargument-mismatch has been
+        removed.
+      * The handling of a BOZ literal constant has been reworked to provide
+        better conformance to the Fortran 2008 and 2018 standards. In these
+        Fortran standards, a BOZ literal constant is a typeless and
+        kindless entity. As a part of the rework, documented and
+        undocumented extensions to the Fortran standard now emit errors
+        during compilation. Some of these extensions are permitted with the
+        -fallow-invalid-boz, where the error is degraded to a warning and
+        the code is compiled as with older gfortran.
+      * At any optimization level except-Os, gfortran now uses inline
+        packing for arguments instead of calling a library routine. If the
+        source contains a large number of arguments that need to be
+        repacked, code size or time for compilation can become excessive.
+        If that is the case, -fno-inline-arg-packing can be used to disable
+        inline argument packing.
+      * Legacy extensions:
+           + For formatted input/output, if the explicit widths after the
+             data-edit descriptors I, F and G have been omitted, default
+             widths are used.
+           + A blank format item at the end of a format specification, i.e.
+             nothing following the final comma, is allowed. Use the option
+             -fdec-blank-format-item; this option is implied with -fdec.
+           + The existing support for AUTOMATIC and STATIC attributes has
+             been extended to allow variables with the AUTOMATIC attribute
+             to be used in EQUIVALENCE statements. Use -fdec-static; this
+             option is implied by -fdec.
+           + Allow character literals in assignments and DATA statements
+             for numeric (INTEGER, REAL, or COMPLEX) or LOGICAL variables.
+             Use the option -fdec-char-conversions; this option is implied
+             with -fdec.
+           + DEC comparisons, i.e. allow Hollerith constants to be used in
+             comparisons with INTEGER, REAL, COMPLEX and CHARACTER
+             expressions. Use the option -fdec.
+      * Character type names in errors and warnings now include len in
+        addition to kind; * is used for assumed length. The kind is omitted
+        if it is the default kind. Examples: CHARACTER(12), CHARACTER(6,4).
+      * CO_BROADCAST now supports derived type variables including objects
+        with allocatable components. In this case, the optional arguments
+        STAT= and ERRMSG= are currently ignored.
+      * The handling of module and submodule names has been reworked to
+        allow the full 63-character length mandated by the standard.
+        Previously symbol names were truncated if the combined length of
+        module, submodule, and function name exceeded 126 characters. This
+        change therefore breaks the ABI, but only for cases where this 126
+        character limit was exceeded.
+ 
+ New Targets and Target Specific Improvements
+ 
+   AArch64 & arm
+ 
+      * The AArch64 and arm ports now support condition flag output
+        constraints in inline assembly, as indicated by the
+        __GCC_ASM_FLAG_OUTPUTS__. On arm this feature is only available for
+        A32 and T32 targets. Please refer to the documentation for more
+        details.
+ 
+   AArch64
+ 
+      * There have been several improvements related to the Scalable Vector
+        Extension (SVE):
+           + The SVE ACLE types and intrinsics are now supported. They can
+             be accessed using the header file arm_sve.h.
+           + It is now possible to create fixed-length SVE types using the
+             arm_sve_vector_bits attribute. For example:
+ #if __ARM_FEATURE_SVE_BITS==512
+ typedef svint32_t vec512 __attribute__((arm_sve_vector_bits(512)));
+ typedef svbool_t pred512 __attribute__((arm_sve_vector_bits(512)));
+ #endif
+           + -mlow-precision-div, -mlow-precision-sqrt and
+             -mlow-precision-recip-sqrt now work for SVE.
+           + -msve-vector-bits=128 now generates vector-length-specific
+             code for little-endian targets. It continues to generate
+             vector-length-agnostic code for big-endian targets, just as
+             previous releases did for all targets.
+           + The vectorizer is now able to use extending loads and
+             truncating stores, including gather loads and scatter stores.
+           + The vectorizer now compares the cost of vectorizing with SVE
+             and vectorizing with Advanced SIMD and tries to pick the best
+             one. Previously it would always use SVE if possible.
+           + If a vector loop uses Advanced SIMD rather than SVE, the
+             vectorizer now considers using SVE to vectorize the left-over
+             elements (the “scalar tail” or “epilog”).
+           + Besides these specific points, there have been many general
+             improvements to the way that the vectorizer uses SVE.
+      * The -mbranch-protection=pac-ret option now accepts the optional
+        argument +b-key extension to perform return address signing with
+        the B-key instead of the A-key.
+      * The option -moutline-atomics has been added to aid deployment of
+        the Large System Extensions (LSE) on GNU/Linux systems built with a
+        baseline architecture targeting Armv8-A. When the option is
+        specified code is emitted to detect the presence of LSE
+        instructions at runtime and use them for standard atomic
+        operations. For more information please refer to the documentation.
+      * The Transactional Memory Extension is now supported through ACLE
+        intrinsics. It can be enabled through the +tme option extension
+        (for example, -march=armv8.5-a+tme).
+      * A number of features from Armv8.5-A are now supported through ACLE
+        intrinsics. These include:
+           + The random number instructions that can be enabled through the
+             (already present in GCC 9.1) +rng option extension.
+           + Floating-point intrinsics to round to integer instructions
+             from Armv8.5-A when targeting -march=armv8.5-a or later.
+           + Memory Tagging Extension intrinsics enabled through the
+             +memtag option extension.
+      * Similarly, the following Armv8.6-A features are now supported
+        through ACLE intrinsics:
+           + The bfloat16 extension. This extension is enabled
+             automatically when Armv8.6-A is selected (such as by
+             -march=armv8.6-a). It can also be enabled for Armv8.2-A and
+             later using the +bf16 option extension.
+           + The Matrix Multiply extension. This extension is split into
+             three parts, one for each supported data type:
+                o Support for 8-bit integer matrix multiply instructions.
+                  This extension is enabled automatically when Armv8.6-A is
+                  selected. It can also be enabled for Armv8.2-A and later
+                  using the +i8mm option extension.
+                o Support for 32-bit floating-point matrix multiply
+                  instructions. This extension can be enabled using the
+                  +f32mm option extension, which also has the effect of
+                  enabling SVE.
+                o Support for 64-bit floating-point matrix multiply
+                  instructions. This extension can be enabled using the
+                  +f64mm option extension, which likewise has the effect of
+                  enabling SVE.
+      * SVE2 is now supported through ACLE intrinsics and (to a limited
+        extent) through autovectorization. It can be enabled through the
+        +sve2 option extension (for example, -march=armv8.5-a+sve2).
+        Additional extensions can be enabled through +sve2-sm4, +sve2-aes,
+        +sve2-sha3 and +sve2-bitperm.
+      * Support has been added for the following processors (GCC
+        identifiers in parentheses):
+           + Arm Cortex-A77 (cortex-a77).
+           + Arm Cortex-A76AE (cortex-a76ae).
+           + Arm Cortex-A65 (cortex-a65).
+           + Arm Cortex-A65AE (cortex-a65ae).
+           + Arm Cortex-A34 (cortex-a34).
+           + Marvell ThunderX3 (thunderx3t110).
+        The GCC identifiers can be used as arguments to the -mcpu or -mtune
+        options, for example: -mcpu=cortex-a77 or -mtune=cortex-a65ae or as
+        arguments to the equivalent target attributes and pragmas.
+ 
+   arm
+ 
+      * Support for the FDPIC ABI has been added. It uses 64-bit function
+        descriptors to represent pointers to functions, and enables code
+        sharing on MMU-less systems. The corresponding target triple is
+        arm-uclinuxfdpiceabi, and the C library is uclibc-ng.
+      * Support has been added for the Arm EABI on NetBSD through the
+        arm*-*-netbsdelf-*eabi* triplet.
+      * The handling of 64-bit integer operations has been significantly
+        reworked and improved leading to improved performance and reduced
+        stack usage when using 64-bit integral data types. The option
+        -mneon-for-64bits is now deprecated and will be removed in a future
+        release.
+      * Support has been added for the following processors (GCC
+        identifiers in parentheses):
+           + Arm Cortex-A77 (cortex-a77).
+           + Arm Cortex-A76AE (cortex-a76ae).
+           + Arm Cortex-M35P (cortex-m35p).
+        The GCC identifiers can be used as arguments to the -mcpu or -mtune
+        options, for example: -mcpu=cortex-a77 or -mtune=cortex-m35p.
+      * Support has been extended for the ACLE [37]data-processing
+        intrinsics to include 32-bit SIMD, saturating arithmetic, 16-bit
+        multiplication and other related intrinsics aimed at DSP algorithm
+        optimization.
+      * Support for -mpure-code in Thumb-1 (v6m) has been added: this
+        M-profile feature is no longer restricted to targets with MOVT. For
+        example, -mcpu=cortex-m0 now supports this option.
+      * Support for the Custom Datapath Extension beta ACLE [38]intrinsics
+        has been added.
+ 
+   AMD Radeon (GCN)
+ 
+      * The code generation and in particular the vectorization support has
+        been much improved.
+ 
+   ARC
+ 
+      * The interrupt service routine functions save all used registers,
+        including extension registers and auxiliary registers used by Zero
+        Overhead Loops.
+      * Improve code size by using multiple short instructions instead of a
+        single long mov or ior instruction when its long immediate constant
+        is known.
+      * Fix usage of the accumulator register for ARC600.
+      * Fix issues with uncached attribute.
+      * Remove -mq-class option.
+      * Improve 64-bit integer addition and subtraction operations.
+ 
+   AVR
+ 
+      * Support for the XMEGA-like devices
+ 
+      ATtiny202, ATtiny204, ATtiny402, ATtiny404, ATtiny406, ATtiny804,
+      ATtiny806, ATtiny807, ATtiny1604, ATtiny1606, ATtiny1607, ATmega808,
+      ATmega809, ATmega1608, ATmega1609, ATmega3208, ATmega3209,
+      ATmega4808, ATmega4809
+        has been added.
+      * A new command-line option -nodevicespecs has been added. It allows
+        to provide a custom device-specs file by means of
+ 
+      avr-gcc -nodevicespecs -specs=my-spec-file <options>
+        and without the need to provide options -B and -mmcu=. See [39]AVR
+        command-line options for details. This feature is also available in
+        GCC 9.3+ and GCC 8.4+.
+      * New command-line options -mdouble=[32,64] and -mlong-double=[32,64]
+        have been added. They allow to choose the size (in bits) of the
+        double and long double types, respectively. Whether or not the
+        mentioned layouts are available, whether the options act as a
+        multilib option, and the default for either option are controlled
+        by the new [40]AVR configure options --with-double= and
+        --with-long-double=.
+      * A new configure option --with-libf7= has been added. It controls to
+        which level avr-libgcc provides 64-bit floating point support by
+        means of [41]Libf7.
+      * A new configure option --with-double-comparison= has been added.
+        It's unlikely you need to set this option by hand.
+ 
+   IA-32/x86-64
+ 
+      * Support to expand __builtin_roundeven into the appropriate SSE 4.1
+        instruction has been added.
+      * New ISA extension support for Intel ENQCMD was added to GCC. ENQCMD
+        intrinsics are available via the -menqcmd compiler switch.
+      * GCC now supports the Intel CPU named Cooperlake through
+        -march=cooperlake. The switch enables the AVX512BF16 ISA
+        extensions.
+      * GCC now supports the Intel CPU named Tigerlake through
+        -march=tigerlake. The switch enables the MOVDIRI MOVDIR64B
+        AVX512VP2INTERSECT ISA extensions.
+ 
+   MIPS
+ 
+      * The mips*-*-linux* targets now mark object files with appropriate
+        GNU-stack note, facilitating use of non-executable stack hardening
+        on GNU/Linux. The soft-float targets have this feature enabled by
+        default, while for hard-float targets it is required for GCC to be
+        configured with --with-glibc-version=2.31 against glibc 2.31 or
+        later.
+ 
+   PowerPC / PowerPC64 / RS6000
+ 
+      * Many vector builtins have been listed as deprecated in the
+        [42]64-Bit ELF V2 ABI Specification for quite a number of years.
+        The vector builtins listed in Tables A.8 through A.10 are now
+        deprecated for GCC 10, and will likely be removed from support in
+        GCC 11.
+ 
+   PRU
+ 
+      * A new back end targeting TI PRU I/O processors has been contributed
+        to GCC.
+ 
+   RISC-V
+ 
+      * The riscv*-*-* targets now require GNU binutils version 2.30 or
+        later, to support new assembly instructions produced by GCC.
+ 
+   V850
+ 
+      * The ABI for V850 nested functions has been changed. Previously the
+        V850 port used %r20 for the static chain pointer, now the port uses
+        %r19. This corrects a long standing latent bug in the v850 port
+        where a call to a nested function would unexpectedly change the
+        value in %r20.
+ 
+ Operating Systems
+ 
+ Improvements for plugin authors
+ 
+      * GCC diagnostics can now have a chain of events associated with
+        them, describing a path through the code that triggers the problem.
+        These can be printed by the diagnostics subsystem in various ways,
+        controlled by the [43]-fdiagnostics-path-format option, or captured
+        in JSON form via [44]-fdiagnostics-format=json.
+      * GCC diagnostics can now be associated with [45]CWE weakness
+        identifiers, which will appear on the standard error stream, and in
+        the JSON output from [46]-fdiagnostics-format=json.
+ 
+ Other significant improvements
+ 
+      * To allow inline expansion of both memcpy and memmove, the existing
+        movmem instruction patterns used for non-overlapping memory copies
+        have been renamed to cpymem. The movmem name is now used for
+        overlapping memory moves, consistent with the library functions
+        memcpy and memmove.
+      * For many releases, when GCC emits a warning it prints the option
+        controlling that warning. As of GCC 10, that option text is now a
+        clickable hyperlink for the documentation of that option (assuming
+        a [47]sufficiently capable terminal). This behavior can be
+        controlled via a new [48]-fdiagnostics-urls option (along with
+        various environment variables and heuristics documented with that
+        option).
+ 
+ GCC 10.1
+ 
+    This is the [49]list of problem reports (PRs) from GCC's bug tracking
+    system that are known to be fixed in the 10.1 release. This list might
+    not be complete (that is, it is possible that some PRs that have been
+    fixed are not listed here).
+ 
+ 
+     For questions related to the use of GCC, please consult these web
+     pages and the [50]GCC manuals. If that fails, the
+     [51]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+     web pages and the development of GCC are welcome on our developer
+     list at [52]gcc@gcc.gnu.org. All of [53]our lists have public
+     archives.
+ 
+    Copyright (C) [54]Free Software Foundation, Inc. Verbatim copying and
+    distribution of this entire article is permitted in any medium,
+    provided this notice is preserved.
+ 
+    These pages are [55]maintained by the GCC team. Last modified
+    2020-05-07[56].
+ 
+ References
+ 
+    1. http://gcc.gnu.org/gcc-10/porting_to.html
+    2. http://gcc.gnu.org/onlinedocs/index.html#current
+    3. http://gcc.gnu.org/gcc-10/changes.html#empty_base
+    4. https://www.mpfr.org/
+    5. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/cpp/_005f_005fhas_005fbuiltin.html#g_t_005f_005fhas_005fbuiltin
+    6. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fno-allocation-dce
+    7. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fprofile-partial-training
+    8. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fprofile-reproducible
+    9. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fprofile-generate
+   10. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fprofile-prefix-path
+   11. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Static-Analyzer-Options.html
+   12. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-finline-functions
+   13. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/lto-dump.html
+   14. https://facebook.github.io/zstd/
+   15. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fprofile-values
+   16. https://www.openacc.org/
+   17. https://gcc.gnu.org/wiki/OpenACC#status-10
+   18. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/libgomp/#toc-Enabling-OpenACC-1
+   19. https://www.openmp.org/specifications/
+   20. https://gcc.gnu.org/wiki/Offloading
+   21. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Warning-Options.html#index-Wstring-compare
+   22. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Warning-Options.html#index-Wzero-length-bounds
+   23. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Warning-Options.html#index-Warray-bounds
+   24. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Warning-Options.html#index-Wformat-overflow
+   25. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Warning-Options.html#index-Wrestrict
+   26. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Warning-Options.html#index-Wreturn-local-addr
+   27. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Warning-Options.html#index-Wstringop-overflow
+   28. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wmismatched-tags
+   29. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wredundant-tags
+   30. http://eel.is/c++draft/class.mem#def:complete-class_context
+   31. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94383
+   32. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94711
+   33. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94707
+   34. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94704
+   35. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94706
+   36. https://www.openmp.org/specifications/
+   37. https://developer.arm.com/docs/101028/0009/data-processing-intrinsics
+   38. https://developer.arm.com/docs/101028/0010/custom-datapath-extension
+   39. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/AVR-Options.html#index-nodevicespecs
+   40. https://gcc.gnu.org/install/configure.html#avr
+   41. https://gcc.gnu.org/wiki/avr-gcc#Libf7
+   42. https://openpowerfoundation.org/?resource_lib=64-bit-elf-v2-abi-specification-power-architecture
+   43. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Diagnostic-Message-Formatting-Options.html#index-fdiagnostics-path-format
+   44. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Diagnostic-Message-Formatting-Options.html#index-fdiagnostics-format
+   45. https://cwe.mitre.org/
+   46. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Diagnostic-Message-Formatting-Options.html#index-fdiagnostics-format
+   47. https://gist.github.com/egmontkob/eb114294efbcd5adb1944c9f3cb5feda
+   48. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Diagnostic-Message-Formatting-Options.html#index-fdiagnostics-urls
+   49. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.0
+   50. https://gcc.gnu.org/onlinedocs/
+   51. mailto:gcc-help@gcc.gnu.org
+   52. mailto:gcc@gcc.gnu.org
+   53. https://gcc.gnu.org/lists.html
+   54. https://www.fsf.org/
+   55. https://gcc.gnu.org/about.html
+   56. http://validator.w3.org/check/referer
+ ======================================================================
  http://gcc.gnu.org/gcc-9/index.html
                                GCC 9 Release Series
  
*************** GCC 9.3
*** 818,823 ****
--- 1575,1593 ----
     not be complete (that is, it is possible that some PRs that have been
     fixed are not listed here).
  
+ GCC 9.4
+ 
+   Target Specific Changes
+ 
+     AArch64
+ 
+      * The option -moutline-atomics has been added to aid deployment of
+        the Large System Extensions (LSE) on GNU/Linux systems built with a
+        baseline architecture targeting Armv8-A. When the option is
+        specified code is emitted to detect the presence of LSE
+        instructions at runtime and use them for standard atomic
+        operations. For more information please refer to the documentation.
+ 
  
      For questions related to the use of GCC, please consult these web
      pages and the [68]GCC manuals. If that fails, the
*************** GCC 9.3
*** 831,837 ****
     provided this notice is preserved.
  
     These pages are [73]maintained by the GCC team. Last modified
!    2020-03-12[74].
  
  References
  
--- 1601,1607 ----
     provided this notice is preserved.
  
     These pages are [73]maintained by the GCC team. Last modified
!    2020-04-24[74].
  
  References
  
*************** References
*** 889,895 ****
    52. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wclass-conversion
    53. http://gcc.gnu.org/projects/cxx-status.html#cxx2a
    54. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Warning-Options.html#index-Wformat
!   55. https://github.com/intel/tbb
    56. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gfortran/Fortran-Dialect-Options.html#index-fdec-include
    57. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gfortran/Fortran-Dialect-Options.html#index-fdec
    58. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gfortran/BUILTIN-directive.html#BUILTIN-directive
--- 1659,1665 ----
    52. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wclass-conversion
    53. http://gcc.gnu.org/projects/cxx-status.html#cxx2a
    54. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Warning-Options.html#index-Wformat
!   55. https://github.com/oneapi-src/oneTBB
    56. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gfortran/Fortran-Dialect-Options.html#index-fdec-include
    57. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gfortran/Fortran-Dialect-Options.html#index-fdec
    58. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gfortran/BUILTIN-directive.html#BUILTIN-directive
*************** GCC 8.4
*** 2044,2049 ****
--- 2814,2832 ----
     not be complete (that is, it is possible that some PRs that have been
     fixed are not listed here).
  
+ GCC 8.5
+ 
+   Target Specific Changes
+ 
+     AArch64
+ 
+      * The option -moutline-atomics has been added to aid deployment of
+        the Large System Extensions (LSE) on GNU/Linux systems built with a
+        baseline architecture targeting Armv8-A. When the option is
+        specified code is emitted to detect the presence of LSE
+        instructions at runtime and use them for standard atomic
+        operations. For more information please refer to the documentation.
+ 
  
      For questions related to the use of GCC, please consult these web
      pages and the [38]GCC manuals. If that fails, the
*************** GCC 8.4
*** 2057,2063 ****
     provided this notice is preserved.
  
     These pages are [43]maintained by the GCC team. Last modified
!    2020-03-04[44].
  
  References
  
--- 2840,2846 ----
     provided this notice is preserved.
  
     These pages are [43]maintained by the GCC team. Last modified
!    2020-04-24[44].
  
  References
  
*************** GCC 7.5
*** 3264,3270 ****
     provided this notice is preserved.
  
     These pages are [34]maintained by the GCC team. Last modified
!    2019-11-28[35].
  
  References
  
--- 4047,4053 ----
     provided this notice is preserved.
  
     These pages are [34]maintained by the GCC team. Last modified
!    2020-04-07[35].
  
  References
  
*************** References
*** 3278,3284 ****
     8. https://gcc.gnu.org/wiki/Offloading
     9. https://gcc.gnu.org/onlinedocs/gcc-7.1.0/gcc/Object-Size-Checking.html
    10. https://gcc.gnu.org/projects/cxx-status.html#cxx1z
!   11. http://wg21.link/p0136
    12. https://gcc.gnu.org/onlinedocs/gcc-7.1.0/libstdc++/manual/using_dual_abi.html
    13. https://www.openmp.org/specifications/
    14. https://gcc.gnu.org/onlinedocs/gcc-7.1.0/jit/topics/expressions.html#gcc_jit_rvalue_set_bool_require_tail_call
--- 4061,4067 ----
     8. https://gcc.gnu.org/wiki/Offloading
     9. https://gcc.gnu.org/onlinedocs/gcc-7.1.0/gcc/Object-Size-Checking.html
    10. https://gcc.gnu.org/projects/cxx-status.html#cxx1z
!   11. https://wg21.link/p0136
    12. https://gcc.gnu.org/onlinedocs/gcc-7.1.0/libstdc++/manual/using_dual_abi.html
    13. https://www.openmp.org/specifications/
    14. https://gcc.gnu.org/onlinedocs/gcc-7.1.0/jit/topics/expressions.html#gcc_jit_rvalue_set_bool_require_tail_call
*************** GCC 4.8.5
*** 6736,6742 ****
     provided this notice is preserved.
  
     These pages are [43]maintained by the GCC team. Last modified
!    2019-11-28[44].
  
  References
  
--- 7519,7525 ----
     provided this notice is preserved.
  
     These pages are [43]maintained by the GCC team. Last modified
!    2020-03-26[44].
  
  References
  
*************** References
*** 6765,6771 ****
    23. https://gcc.gnu.org/onlinedocs/gfortran/TMPDIR.html
    24. https://gcc.gnu.org/wiki/Fortran2003Status
    25. https://gcc.gnu.org/wiki/TS29113Status
!   26. https://gcc.gnu.org/viewcvs/trunk/libgfortran/libgfortran.h?content-type=text/plain&view=co
    27. http://chasm-interop.sourceforge.net/
    28. https://gcc.gnu.org/wiki/avr-gcc#Fixed-Point_Support
    29. https://gcc.gnu.org/onlinedocs/gcc/Fixed-Point.html
--- 7548,7554 ----
    23. https://gcc.gnu.org/onlinedocs/gfortran/TMPDIR.html
    24. https://gcc.gnu.org/wiki/Fortran2003Status
    25. https://gcc.gnu.org/wiki/TS29113Status
!   26. https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=libgfortran/libgfortran.h
    27. http://chasm-interop.sourceforge.net/
    28. https://gcc.gnu.org/wiki/avr-gcc#Fixed-Point_Support
    29. https://gcc.gnu.org/onlinedocs/gcc/Fixed-Point.html
diff -Nrcpad gcc-9.3.0/config/ChangeLog gcc-10.1.0/config/ChangeLog
*** gcc-9.3.0/config/ChangeLog	Thu Mar 12 11:08:03 2020
--- gcc-10.1.0/config/ChangeLog	Thu May  7 10:50:31 2020
***************
*** 1,14 ****
! 2020-03-12  Release Manager
  
! 	* GCC 9.3.0 released.
  
! 2019-08-12  Release Manager
  
! 	* GCC 9.2.0 released.
  
! 2019-05-03  Release Manager
  
! 	* GCC 9.1.0 released.
  
  2019-04-16  Martin Liska  <mliska@suse.cz>
  
--- 1,74 ----
! 2020-05-07  Release Manager
  
! 	* GCC 10.1.0 released.
  
! 2020-04-28  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR bootstrap/94739
! 	* cet.m4 (GCC_CET_HOST_FLAGS): Add -fcf-protection=none to
! 	-Wl,-z,ibt,-z,shstk.  Check whether -fcf-protection=none
! 	-Wl,-z,ibt,-z,shstk works first.
  
! 2020-04-25  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR bootstrap/94739
! 	* cet.m4 (GCC_CET_HOST_FLAGS): New.
! 
! 2020-04-22  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR libfortran/94694
! 	PR libfortran/94586
! 	* math.m4 (GCC_CHECK_MATH_INLINE_BUILTIN_FALLBACK1,
! 	GCC_CHECK_MATH_INLINE_BUILTIN_FALLBACK2): New.
! 
! 2020-02-12  Sandra Loosemore  <sandra@codesourcery.com>
! 
! 	PR libstdc++/79193
! 	PR libstdc++/88999
! 	* no-executables.m4: Use a non-empty program to test for linker
! 	support.
! 
! 2020-02-01  Andrew Burgess  <andrew.burgess@embecosm.com>
! 
! 	* lib-link.m4 (AC_LIB_LINKFLAGS_BODY): Update shell syntax.
! 
! 2020-01-27  Andrew Burgess  <andrew.burgess@embecosm.com>
! 
! 	* lib-link.m4 (AC_LIB_LINKFLAGS_BODY): Add new
! 	--with-libXXX-type=... option.  Use this to guide the selection of
! 	either a shared library or a static library.
! 
! 2020-01-24  Maciej W. Rozycki  <macro@wdc.com>
! 
! 	* toolexeclibdir.m4: New file.
! 
! 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
! 
! 	* futex.m4: Handle *-uclinux*.
! 	* tls.m4 (GCC_CHECK_TLS): Likewise.
! 
! 2019-09-06  Florian Weimer  <fweimer@redhat.com>
! 
! 	* futex.m4 (GCC_LINUX_FUTEX): Include <unistd.h> for the syscall
! 	function.
! 
! 2019-07-08  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* bootstrap-Og.mk: New file.
! 
! 2019-06-25  Kwok Cheung Yeung  <kcy@codesourcery.com>
!             Andrew Stubbs  <ams@codesourcery.com>
! 
! 	* gthr.m4 (GCC_AC_THREAD_HEADER): Add case for gcn.
! 
! 2019-05-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
! 
! 	* ax_count_cpus.m4: New file.
! 
! 2019-05-02  Richard Biener  <rguenther@suse.de>
! 
! 	PR bootstrap/85574
! 	* bootstrap-lto.mk (extra-compare): Set to gcc/lto1$(exeext).
  
  2019-04-16  Martin Liska  <mliska@suse.cz>
  
diff -Nrcpad gcc-9.3.0/config/ax_count_cpus.m4 gcc-10.1.0/config/ax_count_cpus.m4
*** gcc-9.3.0/config/ax_count_cpus.m4	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/config/ax_count_cpus.m4	Thu May  7 10:49:58 2020
***************
*** 0 ****
--- 1,101 ----
+ # ===========================================================================
+ #      https://www.gnu.org/software/autoconf-archive/ax_count_cpus.html
+ # ===========================================================================
+ #
+ # SYNOPSIS
+ #
+ #   AX_COUNT_CPUS([ACTION-IF-DETECTED],[ACTION-IF-NOT-DETECTED])
+ #
+ # DESCRIPTION
+ #
+ #   Attempt to count the number of logical processor cores (including
+ #   virtual and HT cores) currently available to use on the machine and
+ #   place detected value in CPU_COUNT variable.
+ #
+ #   On successful detection, ACTION-IF-DETECTED is executed if present. If
+ #   the detection fails, then ACTION-IF-NOT-DETECTED is triggered. The
+ #   default ACTION-IF-NOT-DETECTED is to set CPU_COUNT to 1.
+ #
+ # LICENSE
+ #
+ #   Copyright (c) 2014,2016 Karlson2k (Evgeny Grin) <k2k@narod.ru>
+ #   Copyright (c) 2012 Brian Aker <brian@tangent.org>
+ #   Copyright (c) 2008 Michael Paul Bailey <jinxidoru@byu.net>
+ #   Copyright (c) 2008 Christophe Tournayre <turn3r@users.sourceforge.net>
+ #
+ #   Copying and distribution of this file, with or without modification, are
+ #   permitted in any medium without royalty provided the copyright notice
+ #   and this notice are preserved. This file is offered as-is, without any
+ #   warranty.
+ 
+ #serial 22
+ 
+   AC_DEFUN([AX_COUNT_CPUS],[dnl
+       AC_REQUIRE([AC_CANONICAL_HOST])dnl
+       AC_REQUIRE([AC_PROG_EGREP])dnl
+       AC_MSG_CHECKING([the number of available CPUs])
+       CPU_COUNT="0"
+ 
+       # Try generic methods
+ 
+       # 'getconf' is POSIX utility, but '_NPROCESSORS_ONLN' and
+       # 'NPROCESSORS_ONLN' are platform-specific
+       command -v getconf >/dev/null 2>&1 && \
+         CPU_COUNT=`getconf _NPROCESSORS_ONLN 2>/dev/null || getconf NPROCESSORS_ONLN 2>/dev/null` || CPU_COUNT="0"
+       AS_IF([[test "$CPU_COUNT" -gt "0" 2>/dev/null || ! command -v nproc >/dev/null 2>&1]],[[: # empty]],[dnl
+         # 'nproc' is part of GNU Coreutils and is widely available
+         CPU_COUNT=`OMP_NUM_THREADS='' nproc 2>/dev/null` || CPU_COUNT=`nproc 2>/dev/null` || CPU_COUNT="0"
+       ])dnl
+ 
+       AS_IF([[test "$CPU_COUNT" -gt "0" 2>/dev/null]],[[: # empty]],[dnl
+         # Try platform-specific preferred methods
+         AS_CASE([[$host_os]],dnl
+           [[*linux*]],[[CPU_COUNT=`lscpu -p 2>/dev/null | $EGREP -e '^@<:@0-9@:>@+,' -c` || CPU_COUNT="0"]],dnl
+           [[*darwin*]],[[CPU_COUNT=`sysctl -n hw.logicalcpu 2>/dev/null` || CPU_COUNT="0"]],dnl
+           [[freebsd*]],[[command -v sysctl >/dev/null 2>&1 && CPU_COUNT=`sysctl -n kern.smp.cpus 2>/dev/null` || CPU_COUNT="0"]],dnl
+           [[netbsd*]], [[command -v sysctl >/dev/null 2>&1 && CPU_COUNT=`sysctl -n hw.ncpuonline 2>/dev/null` || CPU_COUNT="0"]],dnl
+           [[solaris*]],[[command -v psrinfo >/dev/null 2>&1 && CPU_COUNT=`psrinfo 2>/dev/null | $EGREP -e '^@<:@0-9@:>@.*on-line' -c 2>/dev/null` || CPU_COUNT="0"]],dnl
+           [[mingw*]],[[CPU_COUNT=`ls -qpU1 /proc/registry/HKEY_LOCAL_MACHINE/HARDWARE/DESCRIPTION/System/CentralProcessor/ 2>/dev/null | $EGREP -e '^@<:@0-9@:>@+/' -c` || CPU_COUNT="0"]],dnl
+           [[msys*]],[[CPU_COUNT=`ls -qpU1 /proc/registry/HKEY_LOCAL_MACHINE/HARDWARE/DESCRIPTION/System/CentralProcessor/ 2>/dev/null | $EGREP -e '^@<:@0-9@:>@+/' -c` || CPU_COUNT="0"]],dnl
+           [[cygwin*]],[[CPU_COUNT=`ls -qpU1 /proc/registry/HKEY_LOCAL_MACHINE/HARDWARE/DESCRIPTION/System/CentralProcessor/ 2>/dev/null | $EGREP -e '^@<:@0-9@:>@+/' -c` || CPU_COUNT="0"]]dnl
+         )dnl
+       ])dnl
+ 
+       AS_IF([[test "$CPU_COUNT" -gt "0" 2>/dev/null || ! command -v sysctl >/dev/null 2>&1]],[[: # empty]],[dnl
+         # Try less preferred generic method
+         # 'hw.ncpu' exist on many platforms, but not on GNU/Linux
+         CPU_COUNT=`sysctl -n hw.ncpu 2>/dev/null` || CPU_COUNT="0"
+       ])dnl
+ 
+       AS_IF([[test "$CPU_COUNT" -gt "0" 2>/dev/null]],[[: # empty]],[dnl
+       # Try platform-specific fallback methods
+       # They can be less accurate and slower then preferred methods
+         AS_CASE([[$host_os]],dnl
+           [[*linux*]],[[CPU_COUNT=`$EGREP -e '^processor' -c /proc/cpuinfo 2>/dev/null` || CPU_COUNT="0"]],dnl
+           [[*darwin*]],[[CPU_COUNT=`system_profiler SPHardwareDataType 2>/dev/null | $EGREP -i -e 'number of cores:'|cut -d : -f 2 -s|tr -d ' '` || CPU_COUNT="0"]],dnl
+           [[freebsd*]],[[CPU_COUNT=`dmesg 2>/dev/null| $EGREP -e '^cpu@<:@0-9@:>@+: '|sort -u|$EGREP -e '^' -c` || CPU_COUNT="0"]],dnl
+           [[netbsd*]], [[CPU_COUNT=`command -v cpuctl >/dev/null 2>&1 && cpuctl list 2>/dev/null| $EGREP -e '^@<:@0-9@:>@+ .* online ' -c` || \
+                            CPU_COUNT=`dmesg 2>/dev/null| $EGREP -e '^cpu@<:@0-9@:>@+ at'|sort -u|$EGREP -e '^' -c` || CPU_COUNT="0"]],dnl
+           [[solaris*]],[[command -v kstat >/dev/null 2>&1 && CPU_COUNT=`kstat -m cpu_info -s state -p 2>/dev/null | $EGREP -c -e 'on-line'` || \
+                            CPU_COUNT=`kstat -m cpu_info 2>/dev/null | $EGREP -c -e 'module: cpu_info'` || CPU_COUNT="0"]],dnl
+           [[mingw*]],[AS_IF([[CPU_COUNT=`reg query 'HKLM\\Hardware\\Description\\System\\CentralProcessor' 2>/dev/null | $EGREP -e '\\\\@<:@0-9@:>@+$' -c`]],dnl
+                         [[: # empty]],[[test "$NUMBER_OF_PROCESSORS" -gt "0" 2>/dev/null && CPU_COUNT="$NUMBER_OF_PROCESSORS"]])],dnl
+           [[msys*]],[[test "$NUMBER_OF_PROCESSORS" -gt "0" 2>/dev/null && CPU_COUNT="$NUMBER_OF_PROCESSORS"]],dnl
+           [[cygwin*]],[[test "$NUMBER_OF_PROCESSORS" -gt "0" 2>/dev/null && CPU_COUNT="$NUMBER_OF_PROCESSORS"]]dnl
+         )dnl
+       ])dnl
+ 
+       AS_IF([[test "x$CPU_COUNT" != "x0" && test "$CPU_COUNT" -gt 0 2>/dev/null]],[dnl
+           AC_MSG_RESULT([[$CPU_COUNT]])
+           m4_ifvaln([$1],[$1],)dnl
+         ],[dnl
+           m4_ifval([$2],[dnl
+             AS_UNSET([[CPU_COUNT]])
+             AC_MSG_RESULT([[unable to detect]])
+             $2
+           ], [dnl
+             CPU_COUNT="1"
+             AC_MSG_RESULT([[unable to detect (assuming 1)]])
+           ])dnl
+         ])dnl
+       ])dnl
diff -Nrcpad gcc-9.3.0/config/bootstrap-Og.mk gcc-10.1.0/config/bootstrap-Og.mk
*** gcc-9.3.0/config/bootstrap-Og.mk	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/config/bootstrap-Og.mk	Thu May  7 10:49:58 2020
***************
*** 0 ****
--- 1 ----
+ BOOT_CFLAGS := -Og $(filter-out -O%, $(BOOT_CFLAGS))
diff -Nrcpad gcc-9.3.0/config/bootstrap-lto.mk gcc-10.1.0/config/bootstrap-lto.mk
*** gcc-9.3.0/config/bootstrap-lto.mk	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/config/bootstrap-lto.mk	Thu May  7 10:49:58 2020
*************** LTO_EXPORTS = AR="$(LTO_AR)"; export AR;
*** 15,17 ****
--- 15,18 ----
  LTO_FLAGS_TO_PASS = AR="$(LTO_AR)" RANLIB="$(LTO_RANLIB)"
  
  do-compare = $(SHELL) $(srcdir)/contrib/compare-lto $$f1 $$f2
+ extra-compare = gcc/lto1$(exeext)
diff -Nrcpad gcc-9.3.0/config/cet.m4 gcc-10.1.0/config/cet.m4
*** gcc-9.3.0/config/cet.m4	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/config/cet.m4	Thu May  7 10:49:58 2020
*************** else
*** 48,50 ****
--- 48,155 ----
    AC_MSG_RESULT([no])
  fi
  ])
+ 
+ dnl
+ dnl GCC_CET_HOST_FLAGS
+ dnl    (SHELL-CODE_HANDLER)
+ dnl
+ AC_DEFUN([GCC_CET_HOST_FLAGS],[dnl
+ GCC_ENABLE(cet, auto, ,[enable Intel CET in host libraries],
+ 	   permit yes|no|auto)
+ AC_MSG_CHECKING([for CET support])
+ 
+ case "$host" in
+   i[[34567]]86-*-linux* | x86_64-*-linux*)
+     may_have_cet=yes
+     save_CFLAGS="$CFLAGS"
+     CFLAGS="$CFLAGS -fcf-protection"
+     case "$enable_cet" in
+       auto)
+ 	# Check if target supports multi-byte NOPs
+ 	# and if assembler supports CET insn.
+ 	AC_COMPILE_IFELSE(
+ 	 [AC_LANG_PROGRAM(
+ 	  [],
+ 	  [
+ #if !defined(__SSE2__)
+ #error target does not support multi-byte NOPs
+ #else
+ asm ("setssbsy");
+ #endif
+ 	  ])],
+ 	 [enable_cet=yes],
+ 	 [enable_cet=no])
+ 	;;
+       yes)
+ 	# Check if assembler supports CET.
+ 	AC_COMPILE_IFELSE(
+ 	 [AC_LANG_PROGRAM(
+ 	  [],
+ 	  [asm ("setssbsy");])],
+ 	 [],
+ 	 [AC_MSG_ERROR([assembler with CET support is required for --enable-cet])])
+ 	;;
+     esac
+     CFLAGS="$save_CFLAGS"
+     ;;
+   *)
+     may_have_cet=no
+     enable_cet=no
+     ;;
+ esac
+ 
+ save_CFLAGS="$CFLAGS"
+ CFLAGS="$CFLAGS -fcf-protection=none"
+ save_LDFLAGS="$LDFLAGS"
+ LDFLAGS="$LDFLAGS -Wl,-z,ibt,-z,shstk"
+ if test x$may_have_cet = xyes; then
+   # Check whether -fcf-protection=none -Wl,-z,ibt,-z,shstk work.
+   AC_TRY_LINK(
+     [],[return 0;],
+     [may_have_cet=yes],
+     [may_have_cet=no])
+ fi
+ 
+ if test x$may_have_cet = xyes; then
+   AC_TRY_RUN([
+ static void
+ foo (void)
+ {
+ }
+ 
+ static void
+ __attribute__ ((noinline, noclone))
+ xxx (void (*f) (void))
+ {
+   f ();
+ }
+ 
+ static void
+ __attribute__ ((noinline, noclone))
+ bar (void)
+ {
+   xxx (foo);
+ }
+ 
+ int
+ main ()
+ {
+   bar ();
+   return 0;
+ }
+   ],
+   [have_cet=no],
+   [have_cet=yes])
+   if test x$enable_cet = xno -a x$have_cet = xyes; then
+     AC_MSG_ERROR([Intel CET must be enabled on Intel CET enabled host])
+   fi
+ fi
+ if test x$enable_cet = xyes; then
+   $1="-fcf-protection"
+   AC_MSG_RESULT([yes])
+ else
+   AC_MSG_RESULT([no])
+ fi
+ CFLAGS="$save_CFLAGS"
+ LDFLAGS="$save_LDFLAGS"
+ ])
diff -Nrcpad gcc-9.3.0/config/futex.m4 gcc-10.1.0/config/futex.m4
*** gcc-9.3.0/config/futex.m4	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/config/futex.m4	Thu May  7 10:49:58 2020
*************** AC_DEFUN([GCC_LINUX_FUTEX],[dnl
*** 9,15 ****
  GCC_ENABLE(linux-futex,default, ,[use the Linux futex system call],
  	   permit yes|no|default)
  case "$target" in
!   *-linux*)
      case "$enable_linux_futex" in
        default)
  	# If headers don't have gettid/futex syscalls definition, then
--- 9,15 ----
  GCC_ENABLE(linux-futex,default, ,[use the Linux futex system call],
  	   permit yes|no|default)
  case "$target" in
!   *-linux* | *-uclinux*)
      case "$enable_linux_futex" in
        default)
  	# If headers don't have gettid/futex syscalls definition, then
*************** case "$target" in
*** 22,27 ****
--- 22,28 ----
  	AC_LINK_IFELSE(
  	 [AC_LANG_PROGRAM(
  	  [#include <sys/syscall.h>
+ 	   #include <unistd.h>
  	   int lk;],
  	  [syscall (SYS_gettid); syscall (SYS_futex, &lk, 0, 0, 0);])],
  	  [save_LIBS="$LIBS"
*************** If so, please configure with --disable-l
*** 48,53 ****
--- 49,55 ----
  	AC_LINK_IFELSE(
  	 [AC_LANG_PROGRAM(
  	  [#include <sys/syscall.h>
+ 	   #include <unistd.h>
  	   int lk;],
  	  [syscall (SYS_gettid); syscall (SYS_futex, &lk, 0, 0, 0);])],[],
  	  [AC_MSG_ERROR([SYS_gettid and SYS_futex required for --enable-linux-futex])])
diff -Nrcpad gcc-9.3.0/config/gthr.m4 gcc-10.1.0/config/gthr.m4
*** gcc-9.3.0/config/gthr.m4	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/config/gthr.m4	Thu May  7 10:49:58 2020
*************** AC_DEFUN([GCC_AC_THREAD_HEADER],
*** 13,18 ****
--- 13,19 ----
  case $1 in
      aix)	thread_header=config/rs6000/gthr-aix.h ;;
      dce)	thread_header=config/pa/gthr-dce.h ;;
+     gcn)	thread_header=config/gcn/gthr-gcn.h ;;
      lynx)	thread_header=config/gthr-lynx.h ;;
      mipssde)	thread_header=config/mips/gthr-mipssde.h ;;
      posix)	thread_header=gthr-posix.h ;;
diff -Nrcpad gcc-9.3.0/config/lib-link.m4 gcc-10.1.0/config/lib-link.m4
*** gcc-9.3.0/config/lib-link.m4	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/config/lib-link.m4	Thu May  7 10:49:58 2020
*************** AC_DEFUN([AC_LIB_LINKFLAGS_BODY],
*** 150,155 ****
--- 150,160 ----
        fi
      fi
  ])
+   AC_LIB_ARG_WITH([lib$1-type],
+ [  --with-lib$1-type=TYPE     type of library to search for (auto/static/shared) ],
+   [ with_lib$1_type=$withval ], [ with_lib$1_type=auto ])
+   lib_type=`eval echo \$with_lib$1_type`
+ 
    dnl Search the library and its dependencies in $additional_libdir and
    dnl $LDFLAGS. Using breadth-first-seach.
    LIB[]NAME=
*************** AC_DEFUN([AC_LIB_LINKFLAGS_BODY],
*** 195,207 ****
            found_so=
            found_a=
            if test $use_additional = yes; then
!             if test -n "$shlibext" && test -f "$additional_libdir/lib$name.$shlibext"; then
                found_dir="$additional_libdir"
                found_so="$additional_libdir/lib$name.$shlibext"
                if test -f "$additional_libdir/lib$name.la"; then
                  found_la="$additional_libdir/lib$name.la"
                fi
!             else
                if test -f "$additional_libdir/lib$name.$libext"; then
                  found_dir="$additional_libdir"
                  found_a="$additional_libdir/lib$name.$libext"
--- 200,212 ----
            found_so=
            found_a=
            if test $use_additional = yes; then
!             if test -n "$shlibext" && test -f "$additional_libdir/lib$name.$shlibext" && test x$lib_type != xstatic; then
                found_dir="$additional_libdir"
                found_so="$additional_libdir/lib$name.$shlibext"
                if test -f "$additional_libdir/lib$name.la"; then
                  found_la="$additional_libdir/lib$name.la"
                fi
!             elif test x$lib_type != xshared; then
                if test -f "$additional_libdir/lib$name.$libext"; then
                  found_dir="$additional_libdir"
                  found_a="$additional_libdir/lib$name.$libext"
*************** AC_DEFUN([AC_LIB_LINKFLAGS_BODY],
*** 217,229 ****
                case "$x" in
                  -L*)
                    dir=`echo "X$x" | sed -e 's/^X-L//'`
!                   if test -n "$shlibext" && test -f "$dir/lib$name.$shlibext"; then
                      found_dir="$dir"
                      found_so="$dir/lib$name.$shlibext"
                      if test -f "$dir/lib$name.la"; then
                        found_la="$dir/lib$name.la"
                      fi
!                   else
                      if test -f "$dir/lib$name.$libext"; then
                        found_dir="$dir"
                        found_a="$dir/lib$name.$libext"
--- 222,234 ----
                case "$x" in
                  -L*)
                    dir=`echo "X$x" | sed -e 's/^X-L//'`
!                   if test -n "$shlibext" && test -f "$dir/lib$name.$shlibext" && test x$lib_type != xstatic; then
                      found_dir="$dir"
                      found_so="$dir/lib$name.$shlibext"
                      if test -f "$dir/lib$name.la"; then
                        found_la="$dir/lib$name.la"
                      fi
!                   elif test x$lib_type != xshared; then
                      if test -f "$dir/lib$name.$libext"; then
                        found_dir="$dir"
                        found_a="$dir/lib$name.$libext"
*************** AC_DEFUN([AC_LIB_LINKFLAGS_BODY],
*** 487,494 ****
              dnl known to the linker and runtime loader. (All the system
              dnl directories known to the linker should also be known to the
              dnl runtime loader, otherwise the system is severely misconfigured.)
!             LIB[]NAME="${LIB[]NAME}${LIB[]NAME:+ }-l$name"
!             LTLIB[]NAME="${LTLIB[]NAME}${LTLIB[]NAME:+ }-l$name"
            fi
          fi
        fi
--- 492,504 ----
              dnl known to the linker and runtime loader. (All the system
              dnl directories known to the linker should also be known to the
              dnl runtime loader, otherwise the system is severely misconfigured.)
!             if test "x$lib_type" = "xauto" || test "x$lib_type" = "xshared"; then
!               LIB[]NAME="${LIB[]NAME}${LIB[]NAME:+ }-l$name"
!               LTLIB[]NAME="${LTLIB[]NAME}${LTLIB[]NAME:+ }-l$name"
!             else
!               LIB[]NAME="${LIB[]NAME}${LIB[]NAME:+ }-l:lib$name.$libext"
!               LTLIB[]NAME="${LTLIB[]NAME}${LTLIB[]NAME:+ }-l:lib$name.$libext"
!             fi
            fi
          fi
        fi
diff -Nrcpad gcc-9.3.0/config/math.m4 gcc-10.1.0/config/math.m4
*** gcc-9.3.0/config/math.m4	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/config/math.m4	Thu May  7 10:49:58 2020
*************** main ()
*** 48,50 ****
--- 48,114 ----
                         [Define to 1 if you have the `$1' function.])
    fi
  ])
+ 
+ dnl GCC_CHECK_MATH_INLINE_BUILTIN_FALLBACK1([name], [type])
+ dnl
+ dnl Check if math function NAME fallback for function with single
+ dnl TYPE argument and TYPE result can be implemented using
+ dnl __builtin_NAME expanded inline without needing unavailable math
+ dnl library function.
+ AC_DEFUN([GCC_CHECK_MATH_INLINE_BUILTIN_FALLBACK1],
+ [
+   AC_REQUIRE([GCC_CHECK_LIBM])
+ if test $gcc_cv_math_func_$1 = no; then
+   AC_CACHE_CHECK([for inline __builtin_$1], [gcc_cv_math_inline_builtin_$1],
+ 		 [AC_LINK_IFELSE([AC_LANG_SOURCE([
+ $2
+ $1_fallback ($2 x)
+ {
+   return __builtin_$1 (x);
+ }
+ 
+ int
+ main ()
+ {
+   return 0;
+ }
+ ])],
+ [gcc_cv_math_inline_builtin_$1=yes],
+ [gcc_cv_math_inline_builtin_$1=no])])
+   if test $gcc_cv_math_inline_builtin_$1 = yes; then
+     AC_DEFINE_UNQUOTED(AS_TR_CPP(HAVE_INLINE_BUILTIN_$1),[1],
+ 	      [Define to 1 if `__builtin_$1' is expanded inline.])
+   fi
+ fi])
+ 
+ dnl GCC_CHECK_MATH_INLINE_BUILTIN_FALLBACK2([name], [type])
+ dnl
+ dnl Check if math function NAME fallback for function with two
+ dnl TYPE arguments and TYPE result can be implemented using
+ dnl __builtin_NAME expanded inline without needing unavailable math
+ dnl library function.
+ AC_DEFUN([GCC_CHECK_MATH_INLINE_BUILTIN_FALLBACK2],
+ [
+   AC_REQUIRE([GCC_CHECK_LIBM])
+ if test $gcc_cv_math_func_$1 = no; then
+   AC_CACHE_CHECK([for inline __builtin_$1], [gcc_cv_math_inline_builtin_$1],
+ 		 [AC_LINK_IFELSE([AC_LANG_SOURCE([
+ $2
+ $1_fallback ($2 x, $2 y)
+ {
+   return __builtin_$1 (x, y);
+ }
+ 
+ int
+ main ()
+ {
+   return 0;
+ }
+ ])],
+ [gcc_cv_math_inline_builtin_$1=yes],
+ [gcc_cv_math_inline_builtin_$1=no])])
+   if test $gcc_cv_math_inline_builtin_$1 = yes; then
+     AC_DEFINE_UNQUOTED(AS_TR_CPP(HAVE_INLINE_BUILTIN_$1),[1],
+ 	      [Define to 1 if `__builtin_$1' is expanded inline.])
+   fi
+ fi])
diff -Nrcpad gcc-9.3.0/config/no-executables.m4 gcc-10.1.0/config/no-executables.m4
*** gcc-9.3.0/config/no-executables.m4	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/config/no-executables.m4	Thu May  7 10:49:58 2020
*************** AC_BEFORE([$0], [_AC_COMPILER_EXEEXT])
*** 25,31 ****
  AC_BEFORE([$0], [AC_LINK_IFELSE])
  
  m4_define([_AC_COMPILER_EXEEXT],
! [AC_LANG_CONFTEST([AC_LANG_PROGRAM()])
  # FIXME: Cleanup?
  AS_IF([AC_TRY_EVAL(ac_link)], [gcc_no_link=no], [gcc_no_link=yes])
  if test x$gcc_no_link = xyes; then
--- 25,33 ----
  AC_BEFORE([$0], [AC_LINK_IFELSE])
  
  m4_define([_AC_COMPILER_EXEEXT],
! [AC_LANG_CONFTEST([AC_LANG_PROGRAM(
! 		     [#include <stdio.h>],
! 		     [printf ("hello world\n");])])
  # FIXME: Cleanup?
  AS_IF([AC_TRY_EVAL(ac_link)], [gcc_no_link=no], [gcc_no_link=yes])
  if test x$gcc_no_link = xyes; then
diff -Nrcpad gcc-9.3.0/config/tls.m4 gcc-10.1.0/config/tls.m4
*** gcc-9.3.0/config/tls.m4	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/config/tls.m4	Thu May  7 10:49:58 2020
*************** AC_DEFUN([GCC_CHECK_TLS], [
*** 76,82 ****
  	  dnl Shared library options may depend on the host; this check
  	  dnl is only known to be needed for GNU/Linux.
  	  case $host in
! 	    *-*-linux*)
  	      LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
  	      ;;
  	  esac
--- 76,82 ----
  	  dnl Shared library options may depend on the host; this check
  	  dnl is only known to be needed for GNU/Linux.
  	  case $host in
! 	    *-*-linux* | -*-uclinuxfdpic*)
  	      LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
  	      ;;
  	  esac
diff -Nrcpad gcc-9.3.0/config/toolexeclibdir.m4 gcc-10.1.0/config/toolexeclibdir.m4
*** gcc-9.3.0/config/toolexeclibdir.m4	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/config/toolexeclibdir.m4	Thu May  7 10:49:58 2020
***************
*** 0 ****
--- 1,31 ----
+ dnl toolexeclibdir override support.
+ dnl Copyright (C) 2020  Free Software Foundation, Inc.
+ dnl
+ dnl This program is free software; you can redistribute it and/or modify
+ dnl it under the terms of the GNU General Public License as published by
+ dnl the Free Software Foundation; either version 3, or (at your option)
+ dnl any later version.
+ dnl
+ dnl This program is distributed in the hope that it will be useful,
+ dnl but WITHOUT ANY WARRANTY; without even the implied warranty of
+ dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ dnl GNU General Public License for more details.
+ dnl
+ dnl You should have received a copy of the GNU General Public License
+ dnl along with this program; see the file COPYING3.  If not see
+ dnl <http://www.gnu.org/licenses/>.
+ 
+ AC_DEFUN([GCC_WITH_TOOLEXECLIBDIR],
+ [AC_ARG_WITH(toolexeclibdir,
+   [AS_HELP_STRING([--with-toolexeclibdir=DIR],
+ 		  [install libraries built with a cross compiler within DIR])],
+   [dnl
+ case ${with_toolexeclibdir} in
+   /)
+     ;;
+   */)
+     with_toolexeclibdir=`echo $with_toolexeclibdir | sed 's,/$,,'`
+     ;;
+ esac],
+   [with_toolexeclibdir=no])
+ ])
diff -Nrcpad gcc-9.3.0/config-ml.in gcc-10.1.0/config-ml.in
*** gcc-9.3.0/config-ml.in	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/config-ml.in	Thu May  7 10:49:58 2020
*************** mips*-*-*)
*** 383,388 ****
--- 383,401 ----
  	  done
  	fi
  	;;
+ msp430-*-*)
+ 	if [ x$enable_no_exceptions = xno ]
+ 	then
+ 	  old_multidirs="${multidirs}"
+ 	  multidirs=""
+ 	  for x in ${old_multidirs}; do
+ 	    case "$x" in
+ 	      *no-exceptions* ) : ;;
+ 	      *) multidirs="${multidirs} ${x}" ;;
+ 	    esac
+ 	  done
+ 	fi
+ 	;;
  powerpc*-*-* | rs6000*-*-*)
  	if [ x$enable_aix64 = xno ]
  	then
diff -Nrcpad gcc-9.3.0/config.guess gcc-10.1.0/config.guess
*** gcc-9.3.0/config.guess	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/config.guess	Thu May  7 10:49:58 2020
***************
*** 2,8 ****
  # Attempt to guess a canonical system name.
  #   Copyright 1992-2019 Free Software Foundation, Inc.
  
! timestamp='2019-01-03'
  
  # This file is free software; you can redistribute it and/or modify it
  # under the terms of the GNU General Public License as published by
--- 2,8 ----
  # Attempt to guess a canonical system name.
  #   Copyright 1992-2019 Free Software Foundation, Inc.
  
! timestamp='2019-07-24'
  
  # This file is free software; you can redistribute it and/or modify it
  # under the terms of the GNU General Public License as published by
*************** case "$UNAME_MACHINE:$UNAME_SYSTEM:$UNAM
*** 262,267 ****
--- 262,270 ----
      *:SolidBSD:*:*)
  	echo "$UNAME_MACHINE"-unknown-solidbsd"$UNAME_RELEASE"
  	exit ;;
+     *:OS108:*:*)
+ 	echo "$UNAME_MACHINE"-unknown-os108_"$UNAME_RELEASE"
+ 	exit ;;
      macppc:MirBSD:*:*)
  	echo powerpc-unknown-mirbsd"$UNAME_RELEASE"
  	exit ;;
*************** case "$UNAME_MACHINE:$UNAME_SYSTEM:$UNAM
*** 275,282 ****
  	echo "$UNAME_MACHINE"-unknown-redox
  	exit ;;
      mips:OSF1:*.*)
!         echo mips-dec-osf1
!         exit ;;
      alpha:OSF1:*:*)
  	case $UNAME_RELEASE in
  	*4.0)
--- 278,285 ----
  	echo "$UNAME_MACHINE"-unknown-redox
  	exit ;;
      mips:OSF1:*.*)
! 	echo mips-dec-osf1
! 	exit ;;
      alpha:OSF1:*:*)
  	case $UNAME_RELEASE in
  	*4.0)
*************** case "$UNAME_MACHINE:$UNAME_SYSTEM:$UNAM
*** 385,404 ****
  	echo sparc-hal-solaris2"`echo "$UNAME_RELEASE"|sed -e 's/[^.]*//'`"
  	exit ;;
      sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*)
! 	set_cc_for_build
! 	SUN_ARCH=sparc
! 	# If there is a compiler, see if it is configured for 64-bit objects.
! 	# Note that the Sun cc does not turn __LP64__ into 1 like gcc does.
! 	# This test works for both compilers.
! 	if [ "$CC_FOR_BUILD" != no_compiler_found ]; then
! 	    if (echo '#ifdef __sparcv9'; echo IS_64BIT_ARCH; echo '#endif') | \
! 		(CCOPTS="" $CC_FOR_BUILD -E - 2>/dev/null) | \
! 		grep IS_64BIT_ARCH >/dev/null
! 	    then
! 		SUN_ARCH=sparcv9
! 	    fi
! 	fi
! 	echo "$SUN_ARCH"-sun-solaris2"`echo "$UNAME_RELEASE"|sed -e 's/[^.]*//'`"
  	exit ;;
      i86pc:AuroraUX:5.*:* | i86xen:AuroraUX:5.*:*)
  	echo i386-pc-auroraux"$UNAME_RELEASE"
--- 388,394 ----
  	echo sparc-hal-solaris2"`echo "$UNAME_RELEASE"|sed -e 's/[^.]*//'`"
  	exit ;;
      sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*)
! 	echo sparc-sun-solaris2"`echo "$UNAME_RELEASE" | sed -e 's/[^.]*//'`"
  	exit ;;
      i86pc:AuroraUX:5.*:* | i86xen:AuroraUX:5.*:*)
  	echo i386-pc-auroraux"$UNAME_RELEASE"
*************** EOF
*** 998,1019 ****
  	exit ;;
      mips:Linux:*:* | mips64:Linux:*:*)
  	set_cc_for_build
  	sed 's/^	//' << EOF > "$dummy.c"
  	#undef CPU
! 	#undef ${UNAME_MACHINE}
! 	#undef ${UNAME_MACHINE}el
  	#if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL)
! 	CPU=${UNAME_MACHINE}el
  	#else
  	#if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB)
! 	CPU=${UNAME_MACHINE}
  	#else
! 	CPU=
  	#endif
  	#endif
  EOF
! 	eval "`$CC_FOR_BUILD -E "$dummy.c" 2>/dev/null | grep '^CPU'`"
! 	test "x$CPU" != x && { echo "$CPU-unknown-linux-$LIBC"; exit; }
  	;;
      mips64el:Linux:*:*)
  	echo "$UNAME_MACHINE"-unknown-linux-"$LIBC"
--- 988,1037 ----
  	exit ;;
      mips:Linux:*:* | mips64:Linux:*:*)
  	set_cc_for_build
+ 	IS_GLIBC=0
+ 	test x"${LIBC}" = xgnu && IS_GLIBC=1
  	sed 's/^	//' << EOF > "$dummy.c"
  	#undef CPU
! 	#undef mips
! 	#undef mipsel
! 	#undef mips64
! 	#undef mips64el
! 	#if ${IS_GLIBC} && defined(_ABI64)
! 	LIBCABI=gnuabi64
! 	#else
! 	#if ${IS_GLIBC} && defined(_ABIN32)
! 	LIBCABI=gnuabin32
! 	#else
! 	LIBCABI=${LIBC}
! 	#endif
! 	#endif
! 
! 	#if ${IS_GLIBC} && defined(__mips64) && defined(__mips_isa_rev) && __mips_isa_rev>=6
! 	CPU=mipsisa64r6
! 	#else
! 	#if ${IS_GLIBC} && !defined(__mips64) && defined(__mips_isa_rev) && __mips_isa_rev>=6
! 	CPU=mipsisa32r6
! 	#else
! 	#if defined(__mips64)
! 	CPU=mips64
! 	#else
! 	CPU=mips
! 	#endif
! 	#endif
! 	#endif
! 
  	#if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL)
! 	MIPS_ENDIAN=el
  	#else
  	#if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB)
! 	MIPS_ENDIAN=
  	#else
! 	MIPS_ENDIAN=
  	#endif
  	#endif
  EOF
! 	eval "`$CC_FOR_BUILD -E "$dummy.c" 2>/dev/null | grep '^CPU\|^MIPS_ENDIAN\|^LIBCABI'`"
! 	test "x$CPU" != x && { echo "$CPU${MIPS_ENDIAN}-unknown-linux-$LIBCABI"; exit; }
  	;;
      mips64el:Linux:*:*)
  	echo "$UNAME_MACHINE"-unknown-linux-"$LIBC"
*************** EOF
*** 1126,1132 ****
  	    *Pentium)	     UNAME_MACHINE=i586 ;;
  	    *Pent*|*Celeron) UNAME_MACHINE=i686 ;;
  	esac
! 	echo "$UNAME_MACHINE-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}{$UNAME_VERSION}"
  	exit ;;
      i*86:*:3.2:*)
  	if test -f /usr/options/cb.name; then
--- 1144,1150 ----
  	    *Pentium)	     UNAME_MACHINE=i586 ;;
  	    *Pent*|*Celeron) UNAME_MACHINE=i686 ;;
  	esac
! 	echo "$UNAME_MACHINE-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION}"
  	exit ;;
      i*86:*:3.2:*)
  	if test -f /usr/options/cb.name; then
*************** EOF
*** 1310,1347 ****
  	echo "$UNAME_MACHINE"-apple-rhapsody"$UNAME_RELEASE"
  	exit ;;
      *:Darwin:*:*)
! 	UNAME_PROCESSOR=`uname -p` || UNAME_PROCESSOR=unknown
! 	set_cc_for_build
! 	if test "$UNAME_PROCESSOR" = unknown ; then
! 	    UNAME_PROCESSOR=powerpc
  	fi
! 	if test "`echo "$UNAME_RELEASE" | sed -e 's/\..*//'`" -le 10 ; then
! 	    if [ "$CC_FOR_BUILD" != no_compiler_found ]; then
! 		if (echo '#ifdef __LP64__'; echo IS_64BIT_ARCH; echo '#endif') | \
! 		       (CCOPTS="" $CC_FOR_BUILD -E - 2>/dev/null) | \
! 		       grep IS_64BIT_ARCH >/dev/null
! 		then
! 		    case $UNAME_PROCESSOR in
! 			i386) UNAME_PROCESSOR=x86_64 ;;
! 			powerpc) UNAME_PROCESSOR=powerpc64 ;;
! 		    esac
! 		fi
! 		# On 10.4-10.6 one might compile for PowerPC via gcc -arch ppc
! 		if (echo '#ifdef __POWERPC__'; echo IS_PPC; echo '#endif') | \
! 		       (CCOPTS="" $CC_FOR_BUILD -E - 2>/dev/null) | \
! 		       grep IS_PPC >/dev/null
! 		then
! 		    UNAME_PROCESSOR=powerpc
! 		fi
  	    fi
  	elif test "$UNAME_PROCESSOR" = i386 ; then
! 	    # Avoid executing cc on OS X 10.9, as it ships with a stub
! 	    # that puts up a graphical alert prompting to install
! 	    # developer tools.  Any system running Mac OS X 10.7 or
! 	    # later (Darwin 11 and later) is required to have a 64-bit
! 	    # processor. This is not true of the ARM version of Darwin
! 	    # that Apple uses in portable devices.
! 	    UNAME_PROCESSOR=x86_64
  	fi
  	echo "$UNAME_PROCESSOR"-apple-darwin"$UNAME_RELEASE"
  	exit ;;
--- 1328,1366 ----
  	echo "$UNAME_MACHINE"-apple-rhapsody"$UNAME_RELEASE"
  	exit ;;
      *:Darwin:*:*)
! 	UNAME_PROCESSOR=`uname -p`
! 	case $UNAME_PROCESSOR in
! 	    unknown) UNAME_PROCESSOR=powerpc ;;
! 	esac
! 	if command -v xcode-select > /dev/null 2> /dev/null && \
! 		! xcode-select --print-path > /dev/null 2> /dev/null ; then
! 	    # Avoid executing cc if there is no toolchain installed as
! 	    # cc will be a stub that puts up a graphical alert
! 	    # prompting the user to install developer tools.
! 	    CC_FOR_BUILD=no_compiler_found
! 	else
! 	    set_cc_for_build
  	fi
! 	if [ "$CC_FOR_BUILD" != no_compiler_found ]; then
! 	    if (echo '#ifdef __LP64__'; echo IS_64BIT_ARCH; echo '#endif') | \
! 		   (CCOPTS="" $CC_FOR_BUILD -E - 2>/dev/null) | \
! 		   grep IS_64BIT_ARCH >/dev/null
! 	    then
! 		case $UNAME_PROCESSOR in
! 		    i386) UNAME_PROCESSOR=x86_64 ;;
! 		    powerpc) UNAME_PROCESSOR=powerpc64 ;;
! 		esac
! 	    fi
! 	    # On 10.4-10.6 one might compile for PowerPC via gcc -arch ppc
! 	    if (echo '#ifdef __POWERPC__'; echo IS_PPC; echo '#endif') | \
! 		   (CCOPTS="" $CC_FOR_BUILD -E - 2>/dev/null) | \
! 		   grep IS_PPC >/dev/null
! 	    then
! 		UNAME_PROCESSOR=powerpc
  	    fi
  	elif test "$UNAME_PROCESSOR" = i386 ; then
! 	    # uname -m returns i386 or x86_64
! 	    UNAME_PROCESSOR=$UNAME_MACHINE
  	fi
  	echo "$UNAME_PROCESSOR"-apple-darwin"$UNAME_RELEASE"
  	exit ;;
*************** EOF
*** 1446,1451 ****
--- 1465,1607 ----
  	exit ;;
  esac
  
+ # No uname command or uname output not recognized.
+ set_cc_for_build
+ cat > "$dummy.c" <<EOF
+ #ifdef _SEQUENT_
+ #include <sys/types.h>
+ #include <sys/utsname.h>
+ #endif
+ #if defined(ultrix) || defined(_ultrix) || defined(__ultrix) || defined(__ultrix__)
+ #if defined (vax) || defined (__vax) || defined (__vax__) || defined(mips) || defined(__mips) || defined(__mips__) || defined(MIPS) || defined(__MIPS__)
+ #include <signal.h>
+ #if defined(_SIZE_T_) || defined(SIGLOST)
+ #include <sys/utsname.h>
+ #endif
+ #endif
+ #endif
+ main ()
+ {
+ #if defined (sony)
+ #if defined (MIPSEB)
+   /* BFD wants "bsd" instead of "newsos".  Perhaps BFD should be changed,
+      I don't know....  */
+   printf ("mips-sony-bsd\n"); exit (0);
+ #else
+ #include <sys/param.h>
+   printf ("m68k-sony-newsos%s\n",
+ #ifdef NEWSOS4
+   "4"
+ #else
+   ""
+ #endif
+   ); exit (0);
+ #endif
+ #endif
+ 
+ #if defined (NeXT)
+ #if !defined (__ARCHITECTURE__)
+ #define __ARCHITECTURE__ "m68k"
+ #endif
+   int version;
+   version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`;
+   if (version < 4)
+     printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version);
+   else
+     printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version);
+   exit (0);
+ #endif
+ 
+ #if defined (MULTIMAX) || defined (n16)
+ #if defined (UMAXV)
+   printf ("ns32k-encore-sysv\n"); exit (0);
+ #else
+ #if defined (CMU)
+   printf ("ns32k-encore-mach\n"); exit (0);
+ #else
+   printf ("ns32k-encore-bsd\n"); exit (0);
+ #endif
+ #endif
+ #endif
+ 
+ #if defined (__386BSD__)
+   printf ("i386-pc-bsd\n"); exit (0);
+ #endif
+ 
+ #if defined (sequent)
+ #if defined (i386)
+   printf ("i386-sequent-dynix\n"); exit (0);
+ #endif
+ #if defined (ns32000)
+   printf ("ns32k-sequent-dynix\n"); exit (0);
+ #endif
+ #endif
+ 
+ #if defined (_SEQUENT_)
+   struct utsname un;
+ 
+   uname(&un);
+   if (strncmp(un.version, "V2", 2) == 0) {
+     printf ("i386-sequent-ptx2\n"); exit (0);
+   }
+   if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */
+     printf ("i386-sequent-ptx1\n"); exit (0);
+   }
+   printf ("i386-sequent-ptx\n"); exit (0);
+ #endif
+ 
+ #if defined (vax)
+ #if !defined (ultrix)
+ #include <sys/param.h>
+ #if defined (BSD)
+ #if BSD == 43
+   printf ("vax-dec-bsd4.3\n"); exit (0);
+ #else
+ #if BSD == 199006
+   printf ("vax-dec-bsd4.3reno\n"); exit (0);
+ #else
+   printf ("vax-dec-bsd\n"); exit (0);
+ #endif
+ #endif
+ #else
+   printf ("vax-dec-bsd\n"); exit (0);
+ #endif
+ #else
+ #if defined(_SIZE_T_) || defined(SIGLOST)
+   struct utsname un;
+   uname (&un);
+   printf ("vax-dec-ultrix%s\n", un.release); exit (0);
+ #else
+   printf ("vax-dec-ultrix\n"); exit (0);
+ #endif
+ #endif
+ #endif
+ #if defined(ultrix) || defined(_ultrix) || defined(__ultrix) || defined(__ultrix__)
+ #if defined(mips) || defined(__mips) || defined(__mips__) || defined(MIPS) || defined(__MIPS__)
+ #if defined(_SIZE_T_) || defined(SIGLOST)
+   struct utsname *un;
+   uname (&un);
+   printf ("mips-dec-ultrix%s\n", un.release); exit (0);
+ #else
+   printf ("mips-dec-ultrix\n"); exit (0);
+ #endif
+ #endif
+ #endif
+ 
+ #if defined (alliant) && defined (i860)
+   printf ("i860-alliant-bsd\n"); exit (0);
+ #endif
+ 
+   exit (1);
+ }
+ EOF
+ 
+ $CC_FOR_BUILD -o "$dummy" "$dummy.c" 2>/dev/null && SYSTEM_NAME=`$dummy` &&
+ 	{ echo "$SYSTEM_NAME"; exit; }
+ 
+ # Apollos put the system type in the environment.
+ test -d /usr/apollo && { echo "$ISP-apollo-$SYSTYPE"; exit; }
+ 
  echo "$0: unable to guess system type" >&2
  
  case "$UNAME_MACHINE:$UNAME_SYSTEM" in
diff -Nrcpad gcc-9.3.0/config.sub gcc-10.1.0/config.sub
*** gcc-9.3.0/config.sub	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/config.sub	Thu May  7 10:49:58 2020
***************
*** 2,8 ****
  # Configuration validation subroutine script.
  #   Copyright 1992-2019 Free Software Foundation, Inc.
  
! timestamp='2019-01-01'
  
  # This file is free software; you can redistribute it and/or modify it
  # under the terms of the GNU General Public License as published by
--- 2,8 ----
  # Configuration validation subroutine script.
  #   Copyright 1992-2019 Free Software Foundation, Inc.
  
! timestamp='2019-06-30'
  
  # This file is free software; you can redistribute it and/or modify it
  # under the terms of the GNU General Public License as published by
*************** case $1 in
*** 337,353 ****
  				basic_machine=m88k-harris
  				os=sysv3
  				;;
! 			hp300)
  				basic_machine=m68k-hp
  				;;
  			hp300bsd)
  				basic_machine=m68k-hp
  				os=bsd
  				;;
- 			hp300hpux)
- 				basic_machine=m68k-hp
- 				os=hpux
- 				;;
  			hppaosf)
  				basic_machine=hppa1.1-hp
  				os=osf
--- 337,350 ----
  				basic_machine=m88k-harris
  				os=sysv3
  				;;
! 			hp300 | hp300hpux)
  				basic_machine=m68k-hp
+ 				os=hpux
  				;;
  			hp300bsd)
  				basic_machine=m68k-hp
  				os=bsd
  				;;
  			hppaosf)
  				basic_machine=hppa1.1-hp
  				os=osf
*************** case $1 in
*** 360,369 ****
  				basic_machine=i386-mach
  				os=mach
  				;;
- 			vsta)
- 				basic_machine=i386-pc
- 				os=vsta
- 				;;
  			isi68 | isi)
  				basic_machine=m68k-isi
  				os=sysv
--- 357,362 ----
*************** case $1 in
*** 612,617 ****
--- 605,614 ----
  				basic_machine=vax-dec
  				os=vms
  				;;
+ 			vsta)
+ 				basic_machine=i386-pc
+ 				os=vsta
+ 				;;
  			vxworks960)
  				basic_machine=i960-wrs
  				os=vxworks
*************** case $basic_machine in
*** 822,828 ****
  		cpu=m68k
  		vendor=next
  		case $os in
! 		    nextstep* )
  			;;
  		    ns2*)
  		      os=nextstep2
--- 819,827 ----
  		cpu=m68k
  		vendor=next
  		case $os in
! 		    openstep*)
! 		        ;;
! 		    nextstep*)
  			;;
  		    ns2*)
  		      os=nextstep2
*************** case $basic_machine in
*** 919,925 ****
  		;;
  
  	*-*)
! 	    	# shellcheck disable=SC2162
  		IFS="-" read cpu vendor <<EOF
  $basic_machine
  EOF
--- 918,924 ----
  		;;
  
  	*-*)
! 		# shellcheck disable=SC2162
  		IFS="-" read cpu vendor <<EOF
  $basic_machine
  EOF
*************** case $cpu-$vendor in
*** 1170,1176 ****
  			| asmjs \
  			| ba \
  			| be32 | be64 \
! 			| bfin | bs2000 \
  			| c[123]* | c30 | [cjt]90 | c4x \
  			| c8051 | clipper | craynv | csky | cydra \
  			| d10v | d30v | dlx | dsp16xx \
--- 1169,1175 ----
  			| asmjs \
  			| ba \
  			| be32 | be64 \
! 			| bfin | bpf | bs2000 \
  			| c[123]* | c30 | [cjt]90 | c4x \
  			| c8051 | clipper | craynv | csky | cydra \
  			| d10v | d30v | dlx | dsp16xx \
*************** case $cpu-$vendor in
*** 1185,1197 ****
  			| le32 | le64 \
  			| lm32 \
  			| m32c | m32r | m32rle \
! 			| m5200 | m68000 | m680[012346]0 | m68360 | m683?2 | m68k | v70 | w65 \
! 			| m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x | nvptx | picochip \
  			| m88110 | m88k | maxq | mb | mcore | mep | metag \
  			| microblaze | microblazeel \
  			| mips | mipsbe | mipseb | mipsel | mipsle \
  			| mips16 \
! 			| mips64 | mips64el \
  			| mips64octeon | mips64octeonel \
  			| mips64orion | mips64orionel \
  			| mips64r5900 | mips64r5900el \
--- 1184,1196 ----
  			| le32 | le64 \
  			| lm32 \
  			| m32c | m32r | m32rle \
! 			| m5200 | m68000 | m680[012346]0 | m68360 | m683?2 | m68k \
! 			| m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x \
  			| m88110 | m88k | maxq | mb | mcore | mep | metag \
  			| microblaze | microblazeel \
  			| mips | mipsbe | mipseb | mipsel | mipsle \
  			| mips16 \
! 			| mips64 | mips64eb | mips64el \
  			| mips64octeon | mips64octeonel \
  			| mips64orion | mips64orionel \
  			| mips64r5900 | mips64r5900el \
*************** case $cpu-$vendor in
*** 1218,1228 ****
  			| nds32 | nds32le | nds32be \
  			| nfp \
  			| nios | nios2 | nios2eb | nios2el \
! 			| none | np1 | ns16k | ns32k \
  			| open8 \
  			| or1k* \
  			| or32 \
  			| orion \
  			| pdp10 | pdp11 | pj | pjl | pn | power \
  			| powerpc | powerpc64 | powerpc64le | powerpcle | powerpcspe \
  			| pru \
--- 1217,1228 ----
  			| nds32 | nds32le | nds32be \
  			| nfp \
  			| nios | nios2 | nios2eb | nios2el \
! 			| none | np1 | ns16k | ns32k | nvptx \
  			| open8 \
  			| or1k* \
  			| or32 \
  			| orion \
+ 			| picochip \
  			| pdp10 | pdp11 | pj | pjl | pn | power \
  			| powerpc | powerpc64 | powerpc64le | powerpcle | powerpcspe \
  			| pru \
*************** case $cpu-$vendor in
*** 1230,1236 ****
  			| riscv | riscv32 | riscv64 \
  			| rl78 | romp | rs6000 | rx \
  			| score \
! 			| sh | sh[1234] | sh[24]a | sh[24]ae[lb] | sh[23]e | she[lb] | sh[lb]e \
  			| sh[1234]e[lb] |  sh[12345][lb]e | sh[23]ele | sh64 | sh64le \
  			| sparc | sparc64 | sparc64b | sparc64v | sparc86x | sparclet \
  			| sparclite \
--- 1230,1237 ----
  			| riscv | riscv32 | riscv64 \
  			| rl78 | romp | rs6000 | rx \
  			| score \
! 			| sh | shl \
! 			| sh[1234] | sh[24]a | sh[24]ae[lb] | sh[23]e | she[lb] | sh[lb]e \
  			| sh[1234]e[lb] |  sh[12345][lb]e | sh[23]ele | sh64 | sh64le \
  			| sparc | sparc64 | sparc64b | sparc64v | sparc86x | sparclet \
  			| sparclite \
*************** case $cpu-$vendor in
*** 1240,1249 ****
  			| tic30 | tic4x | tic54x | tic55x | tic6x | tic80 \
  			| tron \
  			| ubicom32 \
! 			| v850 | v850e | v850e1 | v850es | v850e2 | v850e2v3 \
  			| vax \
  			| visium \
! 			| wasm32 \
  			| we32k \
  			| x86 | x86_64 | xc16x | xgate | xps100 \
  			| xstormy16 | xtensa* \
--- 1241,1251 ----
  			| tic30 | tic4x | tic54x | tic55x | tic6x | tic80 \
  			| tron \
  			| ubicom32 \
! 			| v70 | v850 | v850e | v850e1 | v850es | v850e2 | v850e2v3 \
  			| vax \
  			| visium \
! 			| w65 \
! 			| wasm32 | wasm64 \
  			| we32k \
  			| x86 | x86_64 | xc16x | xgate | xps100 \
  			| xstormy16 | xtensa* \
*************** case $os in
*** 1345,1351 ****
  	     | nindy* | vxsim* | vxworks* | ebmon* | hms* | mvs* \
  	     | clix* | riscos* | uniplus* | iris* | isc* | rtu* | xenix* \
  	     | knetbsd* | mirbsd* | netbsd* \
! 	     | bitrig* | openbsd* | solidbsd* | libertybsd* \
  	     | ekkobsd* | kfreebsd* | freebsd* | riscix* | lynxos* \
  	     | bosx* | nextstep* | cxux* | aout* | elf* | oabi* \
  	     | ptx* | coff* | ecoff* | winnt* | domain* | vsta* \
--- 1347,1353 ----
  	     | nindy* | vxsim* | vxworks* | ebmon* | hms* | mvs* \
  	     | clix* | riscos* | uniplus* | iris* | isc* | rtu* | xenix* \
  	     | knetbsd* | mirbsd* | netbsd* \
! 	     | bitrig* | openbsd* | solidbsd* | libertybsd* | os108* \
  	     | ekkobsd* | kfreebsd* | freebsd* | riscix* | lynxos* \
  	     | bosx* | nextstep* | cxux* | aout* | elf* | oabi* \
  	     | ptx* | coff* | ecoff* | winnt* | domain* | vsta* \
*************** case $os in
*** 1363,1369 ****
  	     | powermax* | dnix* | nx6 | nx7 | sei* | dragonfly* \
  	     | skyos* | haiku* | rdos* | toppers* | drops* | es* \
  	     | onefs* | tirtos* | phoenix* | fuchsia* | redox* | bme* \
! 	     | midnightbsd* | amdhsa* | unleashed* | emscripten*)
  	# Remember, each alternative MUST END IN *, to match a version number.
  		;;
  	qnx*)
--- 1365,1372 ----
  	     | powermax* | dnix* | nx6 | nx7 | sei* | dragonfly* \
  	     | skyos* | haiku* | rdos* | toppers* | drops* | es* \
  	     | onefs* | tirtos* | phoenix* | fuchsia* | redox* | bme* \
! 	     | midnightbsd* | amdhsa* | unleashed* | emscripten* | wasi* \
! 	     | nsk* | powerunix)
  	# Remember, each alternative MUST END IN *, to match a version number.
  		;;
  	qnx*)
*************** case $os in
*** 1447,1455 ****
  	ns2)
  		os=nextstep2
  		;;
- 	nsk*)
- 		os=nsk
- 		;;
  	# Preserve the version number of sinix5.
  	sinix5.*)
  		os=`echo $os | sed -e 's|sinix|sysv|'`
--- 1450,1455 ----
diff -Nrcpad gcc-9.3.0/configure gcc-10.1.0/configure
*** gcc-9.3.0/configure	Thu Mar 12 11:08:30 2020
--- gcc-10.1.0/configure	Thu May  7 10:49:58 2020
*************** with_gmp
*** 806,811 ****
--- 806,812 ----
  with_gmp_include
  with_gmp_lib
  with_stage1_libs
+ with_static_standard_libraries
  with_stage1_ldflags
  with_boot_libs
  with_boot_ldflags
*************** Optional Packages:
*** 1579,1584 ****
--- 1580,1588 ----
    --with-gmp-include=PATH specify directory for installed GMP include files
    --with-gmp-lib=PATH     specify directory for the installed GMP library
    --with-stage1-libs=LIBS libraries for stage1
+   --with-static-standard-libraries
+                           use -static-libstdc++ and -static-libgcc
+                           (default=auto)
    --with-stage1-ldflags=FLAGS
                            linker flags for stage1
    --with-boot-libs=LIBS   libraries for stage2 and later
*************** build_tools="build-texinfo build-flex bu
*** 2781,2787 ****
  
  # these libraries are used by various programs built for the host environment
  #f
! host_libs="intl libiberty opcodes bfd readline tcl tk itcl libgui zlib libbacktrace libcpp libdecnumber gmp mpfr mpc isl libelf libiconv"
  
  # these tools are built for the host environment
  # Note, the powerpc-eabi build depends on sim occurring before gdb in order to
--- 2785,2791 ----
  
  # these libraries are used by various programs built for the host environment
  #f
! host_libs="intl libiberty opcodes bfd readline tcl tk itcl libgui zlib libbacktrace libcpp libdecnumber gmp mpfr mpc isl libelf libiconv libctf"
  
  # these tools are built for the host environment
  # Note, the powerpc-eabi build depends on sim occurring before gdb in order to
*************** host_libs="intl libiberty opcodes bfd re
*** 2789,2795 ****
  # binutils, gas and ld appear in that order because it makes sense to run
  # "make check" in that particular order.
  # If --enable-gold is used, "gold" may replace "ld".
! host_tools="texinfo flex bison binutils gas ld fixincludes gcc cgen sid sim gdb gprof etc expect dejagnu m4 utils guile fastjar gnattools libcc1 gotools"
  
  # these libraries are built for the target environment, and are built after
  # the host libraries and the host tools (which may be a cross compiler)
--- 2793,2799 ----
  # binutils, gas and ld appear in that order because it makes sense to run
  # "make check" in that particular order.
  # If --enable-gold is used, "gold" may replace "ld".
! host_tools="texinfo flex bison binutils gas ld fixincludes gcc cgen sid sim gdb gdbserver gprof etc expect dejagnu m4 utils guile fastjar gnattools libcc1 gotools"
  
  # these libraries are built for the target environment, and are built after
  # the host libraries and the host tools (which may be a cross compiler)
*************** if test x$enable_libgomp = x ; then
*** 3209,3215 ****
  	;;
      *-*-darwin* | *-*-aix*)
  	;;
!     nvptx*-*-*)
  	;;
      *)
  	noconfigdirs="$noconfigdirs target-libgomp"
--- 3213,3219 ----
  	;;
      *-*-darwin* | *-*-aix*)
  	;;
!     nvptx*-*-* | amdgcn*-*-*)
  	;;
      *)
  	noconfigdirs="$noconfigdirs target-libgomp"
*************** case "${target}" in
*** 3353,3361 ****
--- 3357,3372 ----
      # No hosted I/O support.
      noconfigdirs="$noconfigdirs target-libssp"
      ;;
+   bpf-*-*)
+     noconfigdirs="$noconfigdirs target-libssp"
+     ;;
    powerpc-*-aix* | rs6000-*-aix*)
      noconfigdirs="$noconfigdirs target-libssp"
      ;;
+   pru-*-*)
+     # No hosted I/O support.
+     noconfigdirs="$noconfigdirs target-libssp"
+     ;;
    rl78-*-*)
      # libssp uses a misaligned load to trigger a fault, but the RL78
      # doesn't fault for those - instead, it gives a build-time error
*************** if test "${ENABLE_LIBSTDCXX}" = "default
*** 3376,3381 ****
--- 3387,3396 ----
        # VxWorks uses the Dinkumware C++ library.
        noconfigdirs="$noconfigdirs target-libstdc++-v3"
        ;;
+     amdgcn*-*-*)
+       # Not ported/fails to build when using newlib.
+       noconfigdirs="$noconfigdirs target-libstdc++-v3"
+       ;;
      arm*-wince-pe*)
        # the C++ libraries don't build on top of CE's C libraries
        noconfigdirs="$noconfigdirs target-libstdc++-v3"
*************** if test "${ENABLE_LIBSTDCXX}" = "default
*** 3383,3394 ****
--- 3398,3440 ----
      avr-*-*)
        noconfigdirs="$noconfigdirs target-libstdc++-v3"
        ;;
+     bpf-*-*)
+       noconfigdirs="$noconfigdirs target-libstdc++-v3"
+       ;;
      ft32-*-*)
        noconfigdirs="$noconfigdirs target-libstdc++-v3"
        ;;
    esac
  fi
  
+ # Disable C++ on systems where it is known to not work.
+ # For testing, you can override this with --enable-languages=c++.
+ case ,${enable_languages}, in
+   *,c++,*)
+     ;;
+   *)
+       case "${target}" in
+         bpf-*-*)
+           unsupported_languages="$unsupported_languages c++"
+           ;;
+       esac
+       ;;
+ esac
+ 
+ # Disable Objc on systems where it is known to not work.
+ # For testing, you can override this with --enable-languages=objc.
+ case ,${enable_languages}, in
+   *,objc,*)
+     ;;
+   *)
+       case "${target}" in
+         bpf-*-*)
+           unsupported_languages="$unsupported_languages objc"
+           ;;
+       esac
+       ;;
+ esac
+ 
  # Disable D on systems where it is known to not work.
  # For testing, you can override this with --enable-languages=d.
  case ,${enable_languages}, in
*************** case ,${enable_languages}, in
*** 3398,3403 ****
--- 3444,3452 ----
      case "${target}" in
        *-*-darwin*)
  	unsupported_languages="$unsupported_languages d"
+         ;;
+       bpf-*-*)
+ 	unsupported_languages="$unsupported_languages d"
  	;;
      esac
      ;;
*************** case "${target}" in
*** 3429,3434 ****
--- 3478,3486 ----
      # See <http://gcc.gnu.org/ml/gcc-patches/2004-11/msg00572.html>.
      unsupported_languages="$unsupported_languages fortran"
      ;;
+   bpf-*-*)
+     unsupported_languages="$unsupported_languages fortran"
+     ;;
  esac
  
  # Disable libffi for some systems.
*************** case "${target}" in
*** 3475,3480 ****
--- 3527,3535 ----
    arm*-*-symbianelf*)
      noconfigdirs="$noconfigdirs target-libffi"
      ;;
+   bpf-*-*)
+     noconfigdirs="$noconfigdirs target-libffi"
+     ;;
    cris-*-* | crisv32-*-*)
      case "${target}" in
        *-*-linux*)
*************** esac
*** 3521,3531 ****
  # Disable the go frontend on systems where it is known to not work. Please keep
  # this in sync with contrib/config-list.mk.
  case "${target}" in
! *-*-darwin* | *-*-cygwin* | *-*-mingw*)
      unsupported_languages="$unsupported_languages go"
      ;;
  esac
  
  # Disable libgo for some systems where it is known to not work.
  # For testing, you can easily override this with --enable-libgo.
  if test x$enable_libgo = x; then
--- 3576,3605 ----
  # Disable the go frontend on systems where it is known to not work. Please keep
  # this in sync with contrib/config-list.mk.
  case "${target}" in
! *-*-darwin* | *-*-cygwin* | *-*-mingw* | bpf-* )
      unsupported_languages="$unsupported_languages go"
      ;;
  esac
  
+ # Only allow gdbserver on some systems.
+ if test -d ${srcdir}/gdbserver; then
+     if test x$enable_gdbserver = x; then
+ 	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for gdbserver support" >&5
+ $as_echo_n "checking for gdbserver support... " >&6; }
+ 	if (srcdir=${srcdir}/gdbserver; \
+ 		. ${srcdir}/configure.srv; \
+ 		test -n "$UNSUPPORTED")
+ 	then
+ 	    { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ 	    noconfigdirs="$noconfigdirs gdbserver"
+ 	else
+ 	    { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+ $as_echo "yes" >&6; }
+ 	fi
+     fi
+ fi
+ 
  # Disable libgo for some systems where it is known to not work.
  # For testing, you can easily override this with --enable-libgo.
  if test x$enable_libgo = x; then
*************** if test x$enable_libgo = x; then
*** 3537,3542 ****
--- 3611,3619 ----
      *-*-cygwin* | *-*-mingw*)
  	noconfigdirs="$noconfigdirs target-libgo"
  	;;
+     bpf-*-*)
+         noconfigdirs="$noconfigdirs target-libgo"
+         ;;
      esac
  fi
  
*************** case "${target}" in
*** 3574,3579 ****
--- 3651,3659 ----
    powerpc*-*-*)
      libgloss_dir=rs6000
      ;;
+   pru-*-*)
+     libgloss_dir=pru
+     ;;
    sparc*-*-*)
      libgloss_dir=sparc
      ;;
*************** case "${target}" in
*** 3605,3610 ****
--- 3685,3693 ----
    sparc-*-sunos4*)
      noconfigdirs="$noconfigdirs target-newlib target-libgloss"
      ;;
+   bpf-*-*)
+     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
+     ;;
    *-*-aix*)
      noconfigdirs="$noconfigdirs target-newlib target-libgloss"
      ;;
*************** case "${target}" in
*** 3718,3723 ****
--- 3801,3809 ----
      # newlib is not 64 bit ready
      noconfigdirs="$noconfigdirs target-newlib target-libgloss"
      ;;
+   bpf-*-*)
+     noconfigdirs="$noconfigdirs target-libobjc target-libbacktrace"
+     ;;
    sh*-*-pe|mips*-*-pe|*arm-wince-pe)
      noconfigdirs="$noconfigdirs tcl tk itcl libgui sim"
      ;;
*************** case "${target}" in
*** 3847,3852 ****
--- 3933,3941 ----
      noconfigdirs="$noconfigdirs ld gas gdb gprof sim"
      noconfigdirs="$noconfigdirs $target_libraries"
      ;;
+   pdp11-*-*)
+     noconfigdirs="$noconfigdirs gdb gprof"
+     ;;
    powerpc-*-aix*)
      # copied from rs6000-*-* entry
      noconfigdirs="$noconfigdirs gprof"
*************** int
*** 5692,5698 ****
  main ()
  {
  
!     #if MPFR_VERSION < MPFR_VERSION_NUM(2,4,0)
      choke me
      #endif
  
--- 5781,5787 ----
  main ()
  {
  
!     #if MPFR_VERSION < MPFR_VERSION_NUM(3,1,0)
      choke me
      #endif
  
*************** int
*** 5709,5715 ****
  main ()
  {
  
!     #if MPFR_VERSION < MPFR_VERSION_NUM(2,4,2)
      choke me
      #endif
  
--- 5798,5804 ----
  main ()
  {
  
!     #if MPFR_VERSION < MPFR_VERSION_NUM(3,1,6)
      choke me
      #endif
  
*************** main ()
*** 5802,5810 ****
      int t;
      mpfr_init (n);
      mpfr_init (x);
!     mpfr_atan2 (n, n, x, GMP_RNDN);
!     mpfr_erfc (n, x, GMP_RNDN);
!     mpfr_subnormalize (x, t, GMP_RNDN);
      mpfr_clear(n);
      mpfr_clear(x);
      mpc_init2 (c, 53);
--- 5891,5899 ----
      int t;
      mpfr_init (n);
      mpfr_init (x);
!     mpfr_atan2 (n, n, x, MPFR_RNDN);
!     mpfr_erfc (n, x, MPFR_RNDN);
!     mpfr_subnormalize (x, t, MPFR_RNDN);
      mpfr_clear(n);
      mpfr_clear(x);
      mpc_init2 (c, 53);
*************** rm -f core conftest.err conftest.$ac_obj
*** 5835,5845 ****
  # The library versions listed in the error message below should match
  # the HARD-minimums enforced above.
    if test x$have_gmp != xyes; then
!     as_fn_error $? "Building GCC requires GMP 4.2+, MPFR 2.4.0+ and MPC 0.8.0+.
  Try the --with-gmp, --with-mpfr and/or --with-mpc options to specify
  their locations.  Source code for these libraries can be found at
  their respective hosting sites as well as at
! ftp://gcc.gnu.org/pub/gcc/infrastructure/.  See also
  http://gcc.gnu.org/install/prerequisites.html for additional info.  If
  you obtained GMP, MPFR and/or MPC from a vendor distribution package,
  make sure that you have installed both the libraries and the header
--- 5924,5934 ----
  # The library versions listed in the error message below should match
  # the HARD-minimums enforced above.
    if test x$have_gmp != xyes; then
!     as_fn_error $? "Building GCC requires GMP 4.2+, MPFR 3.1.0+ and MPC 0.8.0+.
  Try the --with-gmp, --with-mpfr and/or --with-mpc options to specify
  their locations.  Source code for these libraries can be found at
  their respective hosting sites as well as at
! https://gcc.gnu.org/pub/gcc/infrastructure/.  See also
  http://gcc.gnu.org/install/prerequisites.html for additional info.  If
  you obtained GMP, MPFR and/or MPC from a vendor distribution package,
  make sure that you have installed both the libraries and the header
*************** fi
*** 5870,5875 ****
--- 5959,5981 ----
  
  
  
+ # Whether or not to use -static-libstdc++ and -static-libgcc.  The
+ # default is yes if gcc is being built; no otherwise.  The reason for
+ # this default is that gdb is sometimes linked against GNU Source
+ # Highlight, which is a shared library that uses C++ exceptions.  In
+ # this case, -static-libstdc++ will cause crashes.
+ 
+ # Check whether --with-static-standard-libraries was given.
+ if test "${with_static_standard_libraries+set}" = set; then :
+   withval=$with_static_standard_libraries;
+ else
+   with_static_standard_libraries=auto
+ fi
+ 
+ if test "$with_static_standard_libraries" = auto; then
+   with_static_standard_libraries=$have_compiler
+ fi
+ 
  # Linker flags to use for stage1 or when not bootstrapping.
  
  # Check whether --with-stage1-ldflags was given.
*************** else
*** 5884,5890 ****
   # In stage 1, default to linking libstdc++ and libgcc statically with GCC
   # if supported.  But if the user explicitly specified the libraries to use,
   # trust that they are doing what they want.
!  if test "$stage1_libs" = "" -a "$have_static_libs" = yes; then
     stage1_ldflags="-static-libstdc++ -static-libgcc"
   fi
  fi
--- 5990,5997 ----
   # In stage 1, default to linking libstdc++ and libgcc statically with GCC
   # if supported.  But if the user explicitly specified the libraries to use,
   # trust that they are doing what they want.
!  if test "$with_static_standard_libraries" = yes -a "$stage1_libs" = "" \
!      -a "$have_static_libs" = yes; then
     stage1_ldflags="-static-libstdc++ -static-libgcc"
   fi
  fi
*************** esac
*** 7230,7235 ****
--- 7337,7354 ----
  CONFIGURE_GDB_TK=`echo ${GDB_TK} | sed s/-all-/-configure-/g`
  INSTALL_GDB_TK=`echo ${GDB_TK} | sed s/-all-/-install-/g`
  
+ # gdb and gdbserver depend on gnulib and gdbsupport, but as nothing
+ # else does, only include them if one of these is built.  The Makefile
+ # provides the ordering, so it's enough here to add to the list.
+ case " ${configdirs} " in
+   *\ gdb\ *)
+     configdirs="${configdirs} gnulib gdbsupport"
+     ;;
+   *\ gdbserver\ *)
+     configdirs="${configdirs} gnulib gdbsupport"
+     ;;
+ esac
+ 
  # Strip out unwanted targets.
  
  # While at that, we remove Makefiles if we were started for recursive
*************** fi
*** 15353,15360 ****
  compare_exclusions="gcc/cc*-checksum\$(objext) | gcc/ada/*tools/*"
  case "$target" in
    hppa*64*-*-hpux*) ;;
!   hppa*-*-hpux*) compare_exclusions="gcc/cc*-checksum\$(objext) | */libgcc/lib2funcs* | gcc/ada/*tools/* | gcc/function-tests.o" ;;
!   powerpc*-ibm-aix*) compare_exclusions="gcc/cc*-checksum\$(objext) | gcc/ada/*tools/* | *libgomp*\$(objext)" ;;
  esac
  
  
--- 15472,15479 ----
  compare_exclusions="gcc/cc*-checksum\$(objext) | gcc/ada/*tools/*"
  case "$target" in
    hppa*64*-*-hpux*) ;;
!   hppa*-*-hpux*) compare_exclusions="$compare_exclusions | */libgcc/lib2funcs* | gcc/function-tests.o" ;;
!   powerpc*-ibm-aix*) compare_exclusions="$compare_exclusions | *libgomp*\$(objext)" ;;
  esac
  
  
diff -Nrcpad gcc-9.3.0/configure.ac gcc-10.1.0/configure.ac
*** gcc-9.3.0/configure.ac	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/configure.ac	Thu May  7 10:49:58 2020
***************
*** 1,6 ****
  #   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
  #   2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012,
! #   2014, 2015, 2016 Free Software Foundation, Inc.
  #
  # This file is free software; you can redistribute it and/or modify it
  # under the terms of the GNU General Public License as published by
--- 1,6 ----
  #   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
  #   2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012,
! #   2014, 2015, 2016, 2019 Free Software Foundation, Inc.
  #
  # This file is free software; you can redistribute it and/or modify it
  # under the terms of the GNU General Public License as published by
*************** build_tools="build-texinfo build-flex bu
*** 131,137 ****
  
  # these libraries are used by various programs built for the host environment
  #f
! host_libs="intl libiberty opcodes bfd readline tcl tk itcl libgui zlib libbacktrace libcpp libdecnumber gmp mpfr mpc isl libelf libiconv"
  
  # these tools are built for the host environment
  # Note, the powerpc-eabi build depends on sim occurring before gdb in order to
--- 131,137 ----
  
  # these libraries are used by various programs built for the host environment
  #f
! host_libs="intl libiberty opcodes bfd readline tcl tk itcl libgui zlib libbacktrace libcpp libdecnumber gmp mpfr mpc isl libelf libiconv libctf"
  
  # these tools are built for the host environment
  # Note, the powerpc-eabi build depends on sim occurring before gdb in order to
*************** host_libs="intl libiberty opcodes bfd re
*** 139,145 ****
  # binutils, gas and ld appear in that order because it makes sense to run
  # "make check" in that particular order.
  # If --enable-gold is used, "gold" may replace "ld".
! host_tools="texinfo flex bison binutils gas ld fixincludes gcc cgen sid sim gdb gprof etc expect dejagnu m4 utils guile fastjar gnattools libcc1 gotools"
  
  # these libraries are built for the target environment, and are built after
  # the host libraries and the host tools (which may be a cross compiler)
--- 139,145 ----
  # binutils, gas and ld appear in that order because it makes sense to run
  # "make check" in that particular order.
  # If --enable-gold is used, "gold" may replace "ld".
! host_tools="texinfo flex bison binutils gas ld fixincludes gcc cgen sid sim gdb gdbserver gprof etc expect dejagnu m4 utils guile fastjar gnattools libcc1 gotools"
  
  # these libraries are built for the target environment, and are built after
  # the host libraries and the host tools (which may be a cross compiler)
*************** if test x$enable_libgomp = x ; then
*** 512,518 ****
  	;;
      *-*-darwin* | *-*-aix*)
  	;;
!     nvptx*-*-*)
  	;;
      *)
  	noconfigdirs="$noconfigdirs target-libgomp"
--- 512,518 ----
  	;;
      *-*-darwin* | *-*-aix*)
  	;;
!     nvptx*-*-* | amdgcn*-*-*)
  	;;
      *)
  	noconfigdirs="$noconfigdirs target-libgomp"
*************** case "${target}" in
*** 638,646 ****
--- 638,653 ----
      # No hosted I/O support.
      noconfigdirs="$noconfigdirs target-libssp"
      ;;
+   bpf-*-*)
+     noconfigdirs="$noconfigdirs target-libssp"
+     ;;
    powerpc-*-aix* | rs6000-*-aix*)
      noconfigdirs="$noconfigdirs target-libssp"
      ;;
+   pru-*-*)
+     # No hosted I/O support.
+     noconfigdirs="$noconfigdirs target-libssp"
+     ;;
    rl78-*-*)
      # libssp uses a misaligned load to trigger a fault, but the RL78
      # doesn't fault for those - instead, it gives a build-time error
*************** if test "${ENABLE_LIBSTDCXX}" = "default
*** 661,666 ****
--- 668,677 ----
        # VxWorks uses the Dinkumware C++ library.
        noconfigdirs="$noconfigdirs target-libstdc++-v3"
        ;;
+     amdgcn*-*-*)
+       # Not ported/fails to build when using newlib.
+       noconfigdirs="$noconfigdirs target-libstdc++-v3"
+       ;;
      arm*-wince-pe*)
        # the C++ libraries don't build on top of CE's C libraries
        noconfigdirs="$noconfigdirs target-libstdc++-v3"
*************** if test "${ENABLE_LIBSTDCXX}" = "default
*** 668,679 ****
--- 679,721 ----
      avr-*-*)
        noconfigdirs="$noconfigdirs target-libstdc++-v3"
        ;;
+     bpf-*-*)
+       noconfigdirs="$noconfigdirs target-libstdc++-v3"
+       ;;
      ft32-*-*)
        noconfigdirs="$noconfigdirs target-libstdc++-v3"
        ;;
    esac
  fi
  
+ # Disable C++ on systems where it is known to not work.
+ # For testing, you can override this with --enable-languages=c++.
+ case ,${enable_languages}, in
+   *,c++,*)
+     ;;
+   *)
+       case "${target}" in
+         bpf-*-*)
+           unsupported_languages="$unsupported_languages c++"
+           ;;
+       esac
+       ;;
+ esac
+ 
+ # Disable Objc on systems where it is known to not work.
+ # For testing, you can override this with --enable-languages=objc.
+ case ,${enable_languages}, in
+   *,objc,*)
+     ;;
+   *)
+       case "${target}" in
+         bpf-*-*)
+           unsupported_languages="$unsupported_languages objc"
+           ;;
+       esac
+       ;;
+ esac
+ 
  # Disable D on systems where it is known to not work.
  # For testing, you can override this with --enable-languages=d.
  case ,${enable_languages}, in
*************** case ,${enable_languages}, in
*** 683,688 ****
--- 725,733 ----
      case "${target}" in
        *-*-darwin*)
  	unsupported_languages="$unsupported_languages d"
+         ;;
+       bpf-*-*)
+ 	unsupported_languages="$unsupported_languages d"
  	;;
      esac
      ;;
*************** case "${target}" in
*** 711,716 ****
--- 756,764 ----
      # See <http://gcc.gnu.org/ml/gcc-patches/2004-11/msg00572.html>.
      unsupported_languages="$unsupported_languages fortran"
      ;;
+   bpf-*-*)
+     unsupported_languages="$unsupported_languages fortran"
+     ;;
  esac
  
  # Disable libffi for some systems.
*************** case "${target}" in
*** 757,762 ****
--- 805,813 ----
    arm*-*-symbianelf*)
      noconfigdirs="$noconfigdirs target-libffi"
      ;;
+   bpf-*-*)
+     noconfigdirs="$noconfigdirs target-libffi"
+     ;;
    cris-*-* | crisv32-*-*)
      case "${target}" in
        *-*-linux*)
*************** esac
*** 803,813 ****
  # Disable the go frontend on systems where it is known to not work. Please keep
  # this in sync with contrib/config-list.mk.
  case "${target}" in
! *-*-darwin* | *-*-cygwin* | *-*-mingw*)
      unsupported_languages="$unsupported_languages go"
      ;;
  esac
  
  # Disable libgo for some systems where it is known to not work.
  # For testing, you can easily override this with --enable-libgo.
  if test x$enable_libgo = x; then
--- 854,880 ----
  # Disable the go frontend on systems where it is known to not work. Please keep
  # this in sync with contrib/config-list.mk.
  case "${target}" in
! *-*-darwin* | *-*-cygwin* | *-*-mingw* | bpf-* )
      unsupported_languages="$unsupported_languages go"
      ;;
  esac
  
+ # Only allow gdbserver on some systems.
+ if test -d ${srcdir}/gdbserver; then
+     if test x$enable_gdbserver = x; then
+ 	AC_MSG_CHECKING([for gdbserver support])
+ 	if (srcdir=${srcdir}/gdbserver; \
+ 		. ${srcdir}/configure.srv; \
+ 		test -n "$UNSUPPORTED")
+ 	then
+ 	    AC_MSG_RESULT([no])
+ 	    noconfigdirs="$noconfigdirs gdbserver"
+ 	else
+ 	    AC_MSG_RESULT([yes])
+ 	fi
+     fi
+ fi
+ 
  # Disable libgo for some systems where it is known to not work.
  # For testing, you can easily override this with --enable-libgo.
  if test x$enable_libgo = x; then
*************** if test x$enable_libgo = x; then
*** 819,824 ****
--- 886,894 ----
      *-*-cygwin* | *-*-mingw*)
  	noconfigdirs="$noconfigdirs target-libgo"
  	;;
+     bpf-*-*)
+         noconfigdirs="$noconfigdirs target-libgo"
+         ;;
      esac
  fi
  
*************** case "${target}" in
*** 856,861 ****
--- 926,934 ----
    powerpc*-*-*)
      libgloss_dir=rs6000
      ;;
+   pru-*-*)
+     libgloss_dir=pru
+     ;;
    sparc*-*-*)
      libgloss_dir=sparc
      ;;
*************** case "${target}" in
*** 887,892 ****
--- 960,968 ----
    sparc-*-sunos4*)
      noconfigdirs="$noconfigdirs target-newlib target-libgloss"
      ;;
+   bpf-*-*)
+     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
+     ;;
    *-*-aix*)
      noconfigdirs="$noconfigdirs target-newlib target-libgloss"
      ;;
*************** case "${target}" in
*** 1000,1005 ****
--- 1076,1084 ----
      # newlib is not 64 bit ready
      noconfigdirs="$noconfigdirs target-newlib target-libgloss"
      ;;
+   bpf-*-*)
+     noconfigdirs="$noconfigdirs target-libobjc target-libbacktrace"
+     ;;
    sh*-*-pe|mips*-*-pe|*arm-wince-pe)
      noconfigdirs="$noconfigdirs tcl tk itcl libgui sim"
      ;;
*************** case "${target}" in
*** 1129,1134 ****
--- 1208,1216 ----
      noconfigdirs="$noconfigdirs ld gas gdb gprof sim"
      noconfigdirs="$noconfigdirs $target_libraries"
      ;;
+   pdp11-*-*)
+     noconfigdirs="$noconfigdirs gdb gprof"
+     ;;
    powerpc-*-aix*)
      # copied from rs6000-*-* entry
      noconfigdirs="$noconfigdirs gprof"
*************** if test -d ${srcdir}/gcc && test "x$have
*** 1542,1553 ****
      AC_MSG_CHECKING([for the correct version of mpfr.h])
      AC_TRY_COMPILE([#include <gmp.h>
      #include <mpfr.h>],[
!     #if MPFR_VERSION < MPFR_VERSION_NUM(2,4,0)
      choke me
      #endif
      ], [AC_TRY_COMPILE([#include <gmp.h>
      #include <mpfr.h>],[
!     #if MPFR_VERSION < MPFR_VERSION_NUM(2,4,2)
      choke me
      #endif
      ], [AC_MSG_RESULT([yes])], [AC_MSG_RESULT([buggy but acceptable])])],
--- 1624,1635 ----
      AC_MSG_CHECKING([for the correct version of mpfr.h])
      AC_TRY_COMPILE([#include <gmp.h>
      #include <mpfr.h>],[
!     #if MPFR_VERSION < MPFR_VERSION_NUM(3,1,0)
      choke me
      #endif
      ], [AC_TRY_COMPILE([#include <gmp.h>
      #include <mpfr.h>],[
!     #if MPFR_VERSION < MPFR_VERSION_NUM(3,1,6)
      choke me
      #endif
      ], [AC_MSG_RESULT([yes])], [AC_MSG_RESULT([buggy but acceptable])])],
*************** if test -d ${srcdir}/gcc && test "x$have
*** 1582,1590 ****
      int t;
      mpfr_init (n);
      mpfr_init (x);
!     mpfr_atan2 (n, n, x, GMP_RNDN);
!     mpfr_erfc (n, x, GMP_RNDN);
!     mpfr_subnormalize (x, t, GMP_RNDN);
      mpfr_clear(n);
      mpfr_clear(x);
      mpc_init2 (c, 53);
--- 1664,1672 ----
      int t;
      mpfr_init (n);
      mpfr_init (x);
!     mpfr_atan2 (n, n, x, MPFR_RNDN);
!     mpfr_erfc (n, x, MPFR_RNDN);
!     mpfr_subnormalize (x, t, MPFR_RNDN);
      mpfr_clear(n);
      mpfr_clear(x);
      mpc_init2 (c, 53);
*************** if test -d ${srcdir}/gcc && test "x$have
*** 1602,1612 ****
  # The library versions listed in the error message below should match
  # the HARD-minimums enforced above.
    if test x$have_gmp != xyes; then
!     AC_MSG_ERROR([Building GCC requires GMP 4.2+, MPFR 2.4.0+ and MPC 0.8.0+.
  Try the --with-gmp, --with-mpfr and/or --with-mpc options to specify
  their locations.  Source code for these libraries can be found at
  their respective hosting sites as well as at
! ftp://gcc.gnu.org/pub/gcc/infrastructure/.  See also
  http://gcc.gnu.org/install/prerequisites.html for additional info.  If
  you obtained GMP, MPFR and/or MPC from a vendor distribution package,
  make sure that you have installed both the libraries and the header
--- 1684,1694 ----
  # The library versions listed in the error message below should match
  # the HARD-minimums enforced above.
    if test x$have_gmp != xyes; then
!     AC_MSG_ERROR([Building GCC requires GMP 4.2+, MPFR 3.1.0+ and MPC 0.8.0+.
  Try the --with-gmp, --with-mpfr and/or --with-mpc options to specify
  their locations.  Source code for these libraries can be found at
  their respective hosting sites as well as at
! https://gcc.gnu.org/pub/gcc/infrastructure/.  See also
  http://gcc.gnu.org/install/prerequisites.html for additional info.  If
  you obtained GMP, MPFR and/or MPC from a vendor distribution package,
  make sure that you have installed both the libraries and the header
*************** AC_ARG_WITH(stage1-libs,
*** 1633,1638 ****
--- 1715,1733 ----
  [stage1_libs=])
  AC_SUBST(stage1_libs)
  
+ # Whether or not to use -static-libstdc++ and -static-libgcc.  The
+ # default is yes if gcc is being built; no otherwise.  The reason for
+ # this default is that gdb is sometimes linked against GNU Source
+ # Highlight, which is a shared library that uses C++ exceptions.  In
+ # this case, -static-libstdc++ will cause crashes.
+ AC_ARG_WITH(static-standard-libraries,
+ [AS_HELP_STRING([--with-static-standard-libraries],
+                 [use -static-libstdc++ and -static-libgcc (default=auto)])],
+ [], [with_static_standard_libraries=auto])
+ if test "$with_static_standard_libraries" = auto; then
+   with_static_standard_libraries=$have_compiler
+ fi
+ 
  # Linker flags to use for stage1 or when not bootstrapping.
  AC_ARG_WITH(stage1-ldflags,
  [AS_HELP_STRING([--with-stage1-ldflags=FLAGS], [linker flags for stage1])],
*************** AC_ARG_WITH(stage1-ldflags,
*** 1645,1651 ****
   # In stage 1, default to linking libstdc++ and libgcc statically with GCC
   # if supported.  But if the user explicitly specified the libraries to use,
   # trust that they are doing what they want.
!  if test "$stage1_libs" = "" -a "$have_static_libs" = yes; then
     stage1_ldflags="-static-libstdc++ -static-libgcc"
   fi])
  AC_SUBST(stage1_ldflags)
--- 1740,1747 ----
   # In stage 1, default to linking libstdc++ and libgcc statically with GCC
   # if supported.  But if the user explicitly specified the libraries to use,
   # trust that they are doing what they want.
!  if test "$with_static_standard_libraries" = yes -a "$stage1_libs" = "" \
!      -a "$have_static_libs" = yes; then
     stage1_ldflags="-static-libstdc++ -static-libgcc"
   fi])
  AC_SUBST(stage1_ldflags)
*************** esac
*** 2743,2748 ****
--- 2839,2856 ----
  CONFIGURE_GDB_TK=`echo ${GDB_TK} | sed s/-all-/-configure-/g`
  INSTALL_GDB_TK=`echo ${GDB_TK} | sed s/-all-/-install-/g`
  
+ # gdb and gdbserver depend on gnulib and gdbsupport, but as nothing
+ # else does, only include them if one of these is built.  The Makefile
+ # provides the ordering, so it's enough here to add to the list.
+ case " ${configdirs} " in
+   *\ gdb\ *)
+     configdirs="${configdirs} gnulib gdbsupport"
+     ;;
+   *\ gdbserver\ *)
+     configdirs="${configdirs} gnulib gdbsupport"
+     ;;
+ esac
+ 
  # Strip out unwanted targets.
  
  # While at that, we remove Makefiles if we were started for recursive
*************** AC_SUBST(stage2_werror_flag)
*** 3547,3554 ****
  compare_exclusions="gcc/cc*-checksum\$(objext) | gcc/ada/*tools/*"
  case "$target" in
    hppa*64*-*-hpux*) ;;
!   hppa*-*-hpux*) compare_exclusions="gcc/cc*-checksum\$(objext) | */libgcc/lib2funcs* | gcc/ada/*tools/* | gcc/function-tests.o" ;;
!   powerpc*-ibm-aix*) compare_exclusions="gcc/cc*-checksum\$(objext) | gcc/ada/*tools/* | *libgomp*\$(objext)" ;;
  esac
  AC_SUBST(compare_exclusions)
  
--- 3655,3662 ----
  compare_exclusions="gcc/cc*-checksum\$(objext) | gcc/ada/*tools/*"
  case "$target" in
    hppa*64*-*-hpux*) ;;
!   hppa*-*-hpux*) compare_exclusions="$compare_exclusions | */libgcc/lib2funcs* | gcc/function-tests.o" ;;
!   powerpc*-ibm-aix*) compare_exclusions="$compare_exclusions | *libgomp*\$(objext)" ;;
  esac
  AC_SUBST(compare_exclusions)
  
diff -Nrcpad gcc-9.3.0/contrib/ChangeLog gcc-10.1.0/contrib/ChangeLog
*** gcc-9.3.0/contrib/ChangeLog	Thu Mar 12 11:08:03 2020
--- gcc-10.1.0/contrib/ChangeLog	Thu May  7 10:50:32 2020
***************
*** 1,23 ****
! 2020-03-12  Release Manager
  
! 	* GCC 9.3.0 released.
  
! 2019-08-16  Uros Bizjak  <ubizjak@gmail.com>
  
  	* test_summary: Do not escape "=".
  
! 2019-08-12  Release Manager
  
! 	* GCC 9.2.0 released.
  
! 2019-05-03  Release Manager
  
! 	* GCC 9.1.0 released.
  
  2019-05-03  Jakub Jelinek  <jakub@redhat.com>
  
  	* gennews (files): Add files for GCC 9.
  
  2019-04-19  Christophe Lyon  <christophe.lyon@linaro.org>
  
  	PR translation/90118
--- 1,219 ----
! 2020-05-07  Release Manager
  
! 	* GCC 10.1.0 released.
  
! 2020-05-07  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* gennews (files): Add files for GCC 10.
! 
! 2020-04-17  Martin Liska  <mliska@suse.cz>
! 
! 	* vimrc: We do not want to modify tab options
! 	for Python files.
! 
! 2020-04-16  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR bootstrap/92008
! 	* gcc_update: Add intl/plural.y dependency for intl/plural-config.h.
! 
! 2020-04-03  Martin Liska  <mliska@suse.cz>
! 
! 	* gcc-git-customization.sh: Search for the pattern
! 	at line beginning only.
! 
! 2020-01-24  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	* gcc-git-customization.sh: Use users/<pfx> for the personal remote
! 	rather than just <pfx>.  Convert existing personal branches to the
! 	new remote.
! 	* git-add-user-branch.sh: New file.
! 
! 2020-01-22  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	* git-add-vendor-branch.sh: New file.
! 
! 2020-01-20  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	* gcc-git-customization.sh: Check that user-supplied remote
! 	name exists before continuting.  Use a separate remotes for the
! 	personal commit area.  Convert existing personal and vendor
! 	fetch rules to new layout.
! 	* git-fetch-vendor.sh: New vendor layout.  Add --enable-push
! 	option.
! 
! 2020-01-17  Hans-Peter Nilsson  <hp@axis.com>
! 
! 	* gcc_update <git revision>: Use git log "--pretty=tformat:%p:%t:%H",
! 	not "--pretty=%p:%t:%H".
! 
! 2020-01-16  Andreas Schwab  <schwab@linux-m68k.org>
! 
! 	* gcc-git-customization.sh: Avoid double expansion.
! 
! 2020-01-16  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	* gcc-git-customization.sh: Check that user.name and user.email
! 	are set.  Use $(cmd) instead of `cmd`.  Fix variable quoting when
! 	using eval.
! 
! 2020-01-16  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* gcc-git-customization.sh: Verify the id to be printed is ancestor of
! 	the corresponding remote release branch (or master), otherwise print
! 	nothing.
! 
! 2020-01-15  Segher Boessenkool  <segher@kernel.crashing.org>
! 	    Jakub Jelinek  <jakub@redhat.com>
! 
! 	* gcc-git-customization.sh: Change uses to use in comment.
! 
! 2020-01-15  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* gcc-git-customization.sh: Handle output of older git which doesn't
! 	print tags/ prefixes before branchpoint/gcc-.
! 
! 2010-01-15  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	* gcc-git-customization.sh: Explain why we want the user's
! 	upstream account name.  Don't add push rules.  Check if push rules
! 	have been added and suggest that they should be removed.
! 	* git-fetch-vendor.sh: Don't add push rules.
! 
! 2010-01-13  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	Revert:
! 	2010-01-13  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	* gcc-git-customization.sh: Add back the default rule that
! 	is lost by adding a custom push rule.
! 	* git-fetch-vendor.sh: Likewise, also remove '+' from push specs.
! 
! 2010-01-13  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	* gcc-git-customization.sh: Add back the default rule that
! 	is lost by adding a custom push rule.
! 	* git-fetch-vendor.sh: Likewise, also remove '+' from push specs.
! 
! 2010-01-13  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	* contrib/git-fetch-vendor.sh: New file.
! 
! 2020-01-13  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* contrib/gcc-git-customization.sh: Add git gcc-descr and gcc-undescr
! 	aliases.
! 
! 2010-01-13  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	* gcc-git-customization.sh: New file.
! 
! 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* update-copyright.py: Add Mentor Graphics Corporation and Yoshinori
! 	Sato as external authors.  Skip LICENSE.txt files.
! 
! 2019-12-16  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
! 
! 	* config-list.mk: Add msp430-elfbare.
! 
! 2019-12-09  Lewis Hyatt  <lhyatt@gmail.com>
! 
! 	PR preprocessor/49973
! 	* unicode/from_glibc/unicode_utils.py: Support script from
! 	glibc (commit 464cd3) to extract character widths from Unicode data
! 	files.
! 	* unicode/from_glibc/utf8_gen.py: Likewise.
! 	* unicode/UnicodeData.txt: Unicode v. 12.1.0 data file.
! 	* unicode/EastAsianWidth.txt: Likewise.
! 	* unicode/PropList.txt: Likewise.
! 	* unicode/gen_wcwidth.py: New utility to generate
! 	libcpp/generated_cpp_wcwidth.h with help from the glibc support
! 	scripts and the Unicode data files.
! 	* unicode/unicode-license.txt: Added.
! 	* unicode/README: New explanatory file.
! 
! 2019-12-07  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* texi2pod.pl: Handle @headitems in @multitables, printing them
! 	in italics.  Push an empty item code onto the stack.
! 
! 2019-11-13  Janne Blomqvist  <jb@gcc.gnu.org>
! 
! 	* download_prerequisites: Use http instead of ftp for downloading.
! 
! 2019-11-08  Martin Liska  <mliska@suse.cz>
! 
! 	* mklog: The script fails for patches that contain:
! 	'---param=foo=bar xyz'.
! 
! 2019-09-18  Martin Liska  <mliska@suse.cz>
! 
! 	* clang-format: Tweak configuration based on new
! 	options offered.
! 
! 2019-09-09  Jose E. Marchesi  <jemarch@gnu.org>
! 
! 	* config-list.mk (LIST): Disable go in bpf-*-* targets.
! 
! 2019-09-04  Martin Liska  <mliska@suse.cz>
! 
! 	* mklog: Do not print changed functions for
! 	testsuite files.
! 
! 2019-09-04  Martin Liska  <mliska@suse.cz>
! 
! 	* mklog: Parse PR references from newly added
! 	test files.
! 
! 2019-09-04  Martin Liska  <mliska@suse.cz>
! 
! 	* mklog: Use argparse instead of getopt.
! 
! 2019-09-03  Ulrich Weigand  <uweigand@de.ibm.com>
! 
! 	* compare-all-tests (all_targets): Remove references to spu.
! 	* config-list.mk (LIST): Likewise.
! 
! 2019-09-02  Alexander Monakov  <amonakov@ispras.ru>
! 
! 	* vim-gcc-dev/syntax/gcc-match.vim: Do not override 'tabstop' here.
! 	* vimrc: Set preferred values for 'tabstop', 'softtabstop',
! 	'shiftwidth', 'noexpandtab', 'textwidth', 'formatoptions' for all
! 	files, not just C-like files.
! 
! 2019-09-02  Martin Liska  <mliska@suse.cz>
! 
! 	* vim-gcc-dev/syntax/gcc-match.vim: Set tabstop=8.
! 
! 2019-08-13  Uros Bizjak  <ubizjak@gmail.com>
  
  	* test_summary: Do not escape "=".
  
! 2019-07-02  Janne Blomqvist  <jb@gcc.gnu.org>
  
! 	PR other/91048
! 	* mklog (read_user_info): Open ~/.mklog in string mode.
  
! 2019-06-19  Martin Liska  <mliska@suse.cz>
  
! 	* bench-stringop: New file.
! 
! 2019-05-21  Janne Blomqvist  <jb@gcc.gnu.org>
! 
! 	* mklog: Open files in text mode.
! 
! 2019-05-21  Janne Blomqvist  <jb@gcc.gnu.org>
! 
!         * mklog: Convert to Python 3.
  
  2019-05-03  Jakub Jelinek  <jakub@redhat.com>
  
  	* gennews (files): Add files for GCC 9.
  
+ 2019-04-30  Roland Illig  <roland.illig@gmx.de>
+ 
+ 	* check-internal-format-escaping.py: New version using polib.
+ 
  2019-04-19  Christophe Lyon  <christophe.lyon@linaro.org>
  
  	PR translation/90118
diff -Nrcpad gcc-9.3.0/contrib/bench-stringop gcc-10.1.0/contrib/bench-stringop
*** gcc-9.3.0/contrib/bench-stringop	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/bench-stringop	Thu May  7 10:49:58 2020
***************
*** 0 ****
--- 1,158 ----
+ #!/bin/bash
+ 
+ # Script to measure memset and memcpy for different sizes and strategies.
+ #
+ # Contributed by Jan Hubicka <jh@suse.cz>
+ #
+ # Copyright (C) 2019 Free Software Foundation, Inc.
+ #
+ # This file is part of GCC.
+ #
+ # GCC is free software; you can redistribute it and/or modify
+ # it under the terms of the GNU General Public License as published by
+ # the Free Software Foundation; either version 3, or (at your option)
+ # any later version.
+ #
+ # GCC is distributed in the hope that it will be useful,
+ # but WITHOUT ANY WARRANTY; without even the implied warranty of
+ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ # GNU General Public License for more details.
+ #
+ # You should have received a copy of the GNU General Public License
+ # along with GCC; see the file COPYING.  If not, write to
+ # the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+ # Boston, MA 02110-1301, USA.
+ 
+ # This script will search a line starting with 'spawn' that includes the
+ # pattern you are looking for (typically a source file name).
+ #
+ # Once it finds that pattern, it re-executes the whole command
+ # in the spawn line.  If the pattern matches more than one spawn
+ # command, it asks which one you want.
+ 
+ test()
+ {
+ rm -f a.out
+ cat <<END | $1 -x c -O3 $3 -DAVG_SIZE=$2 $STRINGOP -DMEMORY_COPIES=$memsize -
+ #define BUFFER_SIZE (16*1024*1024 + AVG_SIZE*2)
+ /*#define MEMORY_COPIES (1024*1024*64*(long long)10)*/
+ $type t[BUFFER_SIZE];
+ int main()
+ {
+   unsigned int i;
+   for (i=0;i<((long long)MEMORY_COPIES + AVG_SIZE * 2 - 1)/AVG_SIZE*2;i++)
+ #ifdef test_memset
+     __builtin_memset (t+(i*1024*1024+i*1)%(BUFFER_SIZE - AVG_SIZE*2), i, (AVG_SIZE + i) % (AVG_SIZE * 2 + 0));
+ #else
+     __builtin_memcpy (t+(i*1024*1024+i*1)%(BUFFER_SIZE - AVG_SIZE*2), t+((i+1)*1024*1024*4+i*1)%(BUFFER_SIZE - AVG_SIZE *2), (AVG_SIZE + i) % (AVG_SIZE * 2 + 0));
+ #endif
+   return 0;
+ }
+ END
+ TIME=`/usr/bin/time -f "%E" ./a.out 2>&1`
+ echo -n " "$TIME
+ echo $TIME $4 >>/tmp/accum
+ }
+ 
+ test2()
+ {
+ rm -f a.out
+ cat <<END | clang -x c -O3 $3 -DAVG_SIZE=$2 $STRINGOP -DMEMORY_COPIES=$memsize 2>/dev/null -
+ #define BUFFER_SIZE (16*1024*1024 + AVG_SIZE*2)
+ /*#define MEMORY_COPIES (1024*1024*64*(long long)10)*/
+ $type t[BUFFER_SIZE];
+ int main()
+ {
+   unsigned int i;
+   for (i=0;i<((long long)MEMORY_COPIES + AVG_SIZE * 2 - 1)/AVG_SIZE*2;i++)
+ #ifdef test_memset
+     __builtin_memset (t+(i*1024*1024+i*1)%(BUFFER_SIZE - AVG_SIZE*2), i, (AVG_SIZE + i) % (AVG_SIZE * 2 + 0));
+ #else
+     __builtin_memcpy (t+(i*1024*1024+i*1)%(BUFFER_SIZE - AVG_SIZE*2), t+((i+1)*1024*1024*4+i*1)%(BUFFER_SIZE - AVG_SIZE *2), (AVG_SIZE + i) % (AVG_SIZE * 2 + 0));
+ #endif
+   return 0;
+ }
+ END
+ TIME=`/usr/bin/time -f "%E" ./a.out 2>&1`
+ echo -n " "$TIME
+ echo $TIME $4 >>/tmp/accum
+ }
+ 
+ testrow()
+ {
+ echo -n "" >/tmp/accum
+ printf "%12i " $3
+ test "$2" "$3" "-mstringop-strategy=libcall" libcall
+ test "$2" "$3" "-mstringop-strategy=rep_byte -malign-stringops" rep1
+ test "$2" "$3" "-mstringop-strategy=rep_byte -mno-align-stringops" rep1noalign
+ test "$2" "$3" "-mstringop-strategy=rep_4byte -malign-stringops" rep4
+ test "$2" "$3" "-mstringop-strategy=rep_4byte -mno-align-stringops" rep4noalign
+ if [ "$mode" == 64 ]
+ then
+ test "$2" "$3" "-mstringop-strategy=rep_8byte -malign-stringops" rep8
+ test "$2" "$3" "-mstringop-strategy=rep_8byte -mno-align-stringops" rep8noalign
+ fi
+ test "$2" "$3" "-mstringop-strategy=loop -malign-stringops"  loop
+ test "$2" "$3" "-mstringop-strategy=loop -mno-align-stringops"  loopnoalign
+ test "$2" "$3" "-mstringop-strategy=unrolled_loop -malign-stringops" unrl
+ test "$2" "$3" "-mstringop-strategy=unrolled_loop -mno-align-stringops" unrlnoalign
+ test "$2" "$3" "-mstringop-strategy=vector_loop -malign-stringops" sse
+ test "$2" "$3" "-mstringop-strategy=vector_loop -mno-align-stringops -msse2" ssenoalign
+ #test2 "$2" "$3" "" 
+ test "$2" "$3" "-mstringop-strategy=byte_loop" byte
+ best=`cat /tmp/accum | sort | head -1`
+ test "$2" "$3" " -fprofile-generate" >/dev/null 2>&1
+ test "$2" "$3" " -fprofile-use"
+ test "$2" "$3" " -minline-stringops-dynamically"
+ echo "    $best"
+ }
+ 
+ test_all_sizes()
+ {
+ if [ "$mode" == 64 ]
+ then
+ echo "  block size  libcall rep1    noalg   rep4    noalg   rep8    noalg   loop    noalg   unrl    noalg   sse     noalg   byte    PGO     dynamic    BEST"
+ else
+ echo "  block size  libcall rep1    noalg   rep4    noalg   loop    noalg   unrl    noalg   sse     noalg   byte    PGO     dynamic    BEST"
+ fi
+ #for size in 1 2 3 4 6 8 10 12 14 16 24 32 48 64 128 256 512 1024 4096 8192 81920 819200 8192000
+ #for size in 8192000 819200 81920 8192 4096 2048 1024 512 256 128 64 48 32 24 16 14 12 10 8 6 5 4 3 2 1
+ for size in 8192000 819200 81920 20480 8192 4096 2048 1024 512 256 128 64 48 32 24 16 14 12 10 8 6 4 1
+ #for size in 128 256 1024 4096 8192 81920 819200
+ do
+ testrow "$1" "$2" $size
+ done
+ }
+ 
+ mode=$1
+ shift
+ export memsize=$1
+ shift
+ cmdline=$*
+ if [ "$mode" != 32 ]
+ then
+   if [ "$mode" != 64 ]
+   then
+     echo "Usage:"
+     echo "test_stringop mode size cmdline"
+     echo "mode is either 32 or 64"
+     echo "size is amount of memory copied in each test.  Should be chosed small enough so runtime is less than minute for each test and sorting works"
+     echo "Example: test_stringop 32 640000000 ./xgcc -B ./ -march=pentium3"
+     exit
+   fi
+ fi
+ 
+ echo "memcpy"
+ export STRINGOP=""
+ type=char
+ test_all_sizes $mode "$cmdline -m$mode"
+ echo "Aligned"
+ type=long
+ test_all_sizes $mode "$cmdline -m$mode"
+ echo "memset"
+ export STRINGOP="-Dtest_memset=1"
+ type=char
+ test_all_sizes $mode "$cmdline -m$mode"
+ echo "Aligned"
+ type=long
+ test_all_sizes $mode "$cmdline -m$mode"
diff -Nrcpad gcc-9.3.0/contrib/check-internal-format-escaping.py gcc-10.1.0/contrib/check-internal-format-escaping.py
*** gcc-9.3.0/contrib/check-internal-format-escaping.py	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/check-internal-format-escaping.py	Thu May  7 10:49:58 2020
***************
*** 1,7 ****
  #!/usr/bin/env python3
  #
! # Check gcc.pot file for gcc-internal-format and print all strings
! # that contain an option that is not wrapped by %<-option_name%>.
  #
  # This file is part of GCC.
  #
--- 1,8 ----
  #!/usr/bin/env python3
  #
! # Check gcc.pot file for stylistic issues as described in
! # https://gcc.gnu.org/onlinedocs/gccint/Guidelines-for-Diagnostics.html,
! # especially in gcc-internal-format messages.
  #
  # This file is part of GCC.
  #
***************
*** 17,68 ****
  #
  # You should have received a copy of the GNU General Public License
  # along with GCC; see the file COPYING3.  If not see
! # <http://www.gnu.org/licenses/>.  */
! #
! #
! #
  
  import argparse
  import re
  
! parser = argparse.ArgumentParser(description='')
! parser.add_argument('file', help = 'pot file')
  
! args = parser.parse_args()
  
- origin = None
- internal = False
  
! lines = open(args.file).readlines()
! for i, l in enumerate(lines):
!     l = l.strip()
!     s = 'msgid '
!     if l.startswith('#: '):
!         origin = l
!     elif '#, gcc-internal-format' in l:
!         internal = True
!     if l.startswith(s) and origin and internal:
!         j = 0
!         while not lines[i + j].startswith('msgstr'):
!             l = lines[i + j]
!             if l.startswith(s):
!                 l = l[len(s):]
!             text = l.strip('"').strip()
!             if text:
!                 parts = text.split(' ')
!                 for p in parts:
!                     if p.startswith('-'):
!                         if len(p) >= 2 and (p[1].isalpha() and p != '-INF'):
!                             print('%s: %s' % (origin, text))
!                     elif p.startswith('__builtin_'):
!                         print('%s: %s' % (origin, text))
!                     if re.search("[^%]'", p):
!                         print('%s: %s' % (origin, text))
!                     # %< should not be preceded by a non-punctuation
!                     # %character.
!                     if re.search("[a-zA-Z0-9]%<", p):
!                         print('%s: %s' % (origin, text))
!             j += 1
  
!         origin = None
!         internal = False
--- 18,266 ----
  #
  # You should have received a copy of the GNU General Public License
  # along with GCC; see the file COPYING3.  If not see
! # <http://www.gnu.org/licenses/>.
  
  import argparse
  import re
+ from collections import Counter
+ from typing import Dict, Match
  
! import polib
  
! seen_warnings = Counter()
  
  
! def location(msg: polib.POEntry):
!     if msg.occurrences:
!         occ = msg.occurrences[0]
!         return f'{occ[0]}:{occ[1]}'
!     return '<unknown location>'
  
! 
! def warn(msg: polib.POEntry,
!          diagnostic_id: str, diagnostic: str, include_msgid=True):
!     """
!     To suppress a warning for a particular message,
!     add a line "#, gcclint:ignore:{diagnostic_id}" to the message.
!     """
! 
!     if f'gcclint:ignore:{diagnostic_id}' in msg.flags:
!         return
! 
!     seen_warnings[diagnostic] += 1
! 
!     if include_msgid:
!         print(f'{location(msg)}: {diagnostic} in {repr(msg.msgid)}')
!     else:
!         print(f'{location(msg)}: {diagnostic}')
! 
! 
! def lint_gcc_internal_format(msg: polib.POEntry):
!     """
!     Checks a single message that has the gcc-internal-format. These
!     messages use a variety of placeholders like %qs, %<quotes%> and
!     %q#E.
!     """
! 
!     msgid: str = msg.msgid
! 
!     def outside_quotes(m: Match[str]):
!         before = msgid[:m.start(0)]
!         return before.count("%<") == before.count("%>")
! 
!     def lint_matching_placeholders():
!         """
!         Warns when literal values in placeholders are not exactly equal
!         in the translation. This can happen when doing copy-and-paste
!         translations of similar messages.
! 
!         To avoid these mismatches in the first place,
!         structurally equal messages are found by
!         lint_diagnostics_differing_only_in_placeholders.
! 
!         This check only applies when checking a finished translation
!         such as de.po, not gcc.pot.
!         """
! 
!         if not msg.translated():
!             return
! 
!         in_msgid = re.findall('%<[^%]+%>', msgid)
!         in_msgstr = re.findall('%<[^%]+%>', msg.msgstr)
! 
!         if set(in_msgid) != set(in_msgstr):
!             warn(msg,
!                  'placeholder-mismatch',
!                  f'placeholder mismatch: msgid has {in_msgid}, '
!                  f'msgstr has {in_msgstr}',
!                  include_msgid=False)
! 
!     def lint_option_outside_quotes():
!         for match in re.finditer(r'\S+', msgid):
!             part = match.group()
!             if not outside_quotes(match):
!                 continue
! 
!             if part.startswith('-'):
!                 if len(part) >= 2 and part[1].isalpha():
!                     if part == '-INF':
!                         continue
! 
!                     warn(msg,
!                          'option-outside-quotes',
!                          'command line option outside %<quotes%>')
! 
!             if part.startswith('__builtin_'):
!                 warn(msg,
!                      'builtin-outside-quotes',
!                      'builtin function outside %<quotes%>')
! 
!     def lint_plain_apostrophe():
!         for match in re.finditer("[^%]'", msgid):
!             if outside_quotes(match):
!                 warn(msg, 'apostrophe', 'apostrophe without leading %')
! 
!     def lint_space_before_quote():
!         """
!         A space before %< is often the result of string literals that
!         are joined by the C compiler and neither literal has a space
!         to separate the words.
!         """
! 
!         for match in re.finditer("(.?[a-zA-Z0-9])%<", msgid):
!             if match.group(1) != '%s':
!                 warn(msg,
!                      'no-space-before-quote',
!                      '%< directly following a letter or digit')
! 
!     def lint_underscore_outside_quotes():
!         """
!         An underscore outside of quotes is used in several contexts,
!         and many of them violate the GCC Guidelines for Diagnostics:
! 
!         * names of GCC-internal compiler functions
!         * names of GCC-internal data structures
!         * static_cast and the like (which are legitimate)
!         """
! 
!         for match in re.finditer("_", msgid):
!             if outside_quotes(match):
!                 warn(msg,
!                      'underscore-outside-quotes',
!                      'underscore outside of %<quotes%>')
!                 return
! 
!     def lint_may_not():
!         """
!         The term "may not" may either mean "it could be the case"
!         or "should not". These two different meanings are sometimes
!         hard to tell apart.
!         """
! 
!         if re.search(r'\bmay not\b', msgid):
!             warn(msg,
!                  'ambiguous-may-not',
!                  'the term "may not" is ambiguous')
! 
!     def lint_unbalanced_quotes():
!         if msgid.count("%<") != msgid.count("%>"):
!             warn(msg,
!                  'unbalanced-quotes',
!                  'unbalanced %< and %> quotes')
! 
!         if msg.translated():
!             if msg.msgstr.count("%<") != msg.msgstr.count("%>"):
!                 warn(msg,
!                      'unbalanced-quotes',
!                      'unbalanced %< and %> quotes')
! 
!     def lint_single_space_after_sentence():
!         """
!         After a sentence there should be two spaces.
!         """
! 
!         if re.search(r'[.] [A-Z]', msgid):
!             warn(msg,
!                  'single-space-after-sentence',
!                  'single space after sentence')
! 
!     def lint_non_canonical_quotes():
!         """
!         Catches %<%s%>, which can be written in the shorter form %qs.
!         """
!         match = re.search("%<%s%>|'%s'|\"%s\"|`%s'", msgid)
!         if match:
!             warn(msg,
!                  'non-canonical-quotes',
!                  f'placeholder {match.group()} should be written as %qs')
! 
!     lint_option_outside_quotes()
!     lint_plain_apostrophe()
!     lint_space_before_quote()
!     lint_underscore_outside_quotes()
!     lint_may_not()
!     lint_unbalanced_quotes()
!     lint_matching_placeholders()
!     lint_single_space_after_sentence()
!     lint_non_canonical_quotes()
! 
! 
! def lint_diagnostics_differing_only_in_placeholders(po: polib.POFile):
!     """
!     Detects messages that are structurally the same, except that they
!     use different plain strings inside %<quotes%>. These messages can
!     be merged in order to prevent copy-and-paste mistakes by the
!     translators.
! 
!     See bug 90119.
!     """
! 
!     seen: Dict[str, polib.POEntry] = {}
! 
!     for msg in po:
!         msg: polib.POEntry
!         msgid = msg.msgid
! 
!         normalized = re.sub('%<[^%]+%>', '%qs', msgid)
!         if normalized not in seen:
!             seen[normalized] = msg
!             seen[msgid] = msg
!             continue
! 
!         prev = seen[normalized]
!         warn(msg,
!              'same-pattern',
!              f'same pattern for {repr(msgid)} and '
!              f'{repr(prev.msgid)} in {location(prev)}',
!              include_msgid=False)
! 
! 
! def lint_file(po: polib.POFile):
!     for msg in po:
!         msg: polib.POEntry
! 
!         if not msg.obsolete and not msg.fuzzy:
!             if 'gcc-internal-format' in msg.flags:
!                 lint_gcc_internal_format(msg)
! 
!     lint_diagnostics_differing_only_in_placeholders(po)
! 
! 
! def main():
!     parser = argparse.ArgumentParser(description='')
!     parser.add_argument('file', help='pot file')
! 
!     args = parser.parse_args()
! 
!     po = polib.pofile(args.file)
!     lint_file(po)
! 
!     print()
!     print('summary:')
!     for entry in seen_warnings.most_common():
!         if entry[1] > 1:
!             print(f'{entry[1]}\t{entry[0]}')
! 
! 
! if __name__ == '__main__':
!     main()
diff -Nrcpad gcc-9.3.0/contrib/clang-format gcc-10.1.0/contrib/clang-format
*** gcc-9.3.0/contrib/clang-format	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/clang-format	Thu May  7 10:49:58 2020
***************
*** 13,28 ****
  # You should have received a copy of the GNU General Public License
  # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  
! # clang-format 3.8+ (Mon Nov 16) is required
  #
  # To utilize the tool to lines just touched by a patch, use
! # clang-format-diff.py script, which can be downloaded here:
! # https://llvm.org/svn/llvm-project/cfe/trunk/tools/clang-format/clang-format-diff.py
  
  ---
  Language: Cpp
  AccessModifierOffset: -2
! AlwaysBreakAfterDefinitionReturnType: All
  BinPackArguments: true
  BinPackParameters: true
  BraceWrapping:
--- 13,33 ----
  # You should have received a copy of the GNU General Public License
  # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  
! # clang-format 7.0.1 is required
  #
  # To utilize the tool to lines just touched by a patch, use
! # clang-format-diff script that is usually also packaged with clang-format.
! #
! # Example of usage:
! # git diff -U0 --no-color | clang-format-diff -p1
! # (here the tool will generate a patch)
! # git diff -U0 --no-color | clang-format-diff -p1 -i
! # (modifications are applied)
  
  ---
  Language: Cpp
  AccessModifierOffset: -2
! AlwaysBreakAfterReturnType: TopLevel
  BinPackArguments: true
  BinPackParameters: true
  BraceWrapping:
*************** BraceWrapping:
*** 37,42 ****
--- 42,48 ----
    BeforeCatch: true
    BeforeElse: true
    IndentBraces: true
+   SplitEmptyFunction: false
  BreakBeforeBinaryOperators: All
  BreakBeforeBraces: Custom
  BreakBeforeTernaryOperators: true
*************** SpaceAfterCStyleCast: true
*** 136,138 ****
--- 142,150 ----
  SpaceBeforeParens: Always
  SpacesBeforeTrailingComments: 1
  UseTab: Always
+ AlignEscapedNewlines: Right
+ AlignTrailingComments: true
+ AllowShortFunctionsOnASingleLine: All
+ AlwaysBreakTemplateDeclarations: MultiLine
+ KeepEmptyLinesAtTheStartOfBlocks: false
+ Standard: Cpp03
diff -Nrcpad gcc-9.3.0/contrib/compare-all-tests gcc-10.1.0/contrib/compare-all-tests
*** gcc-9.3.0/contrib/compare-all-tests	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/compare-all-tests	Thu May  7 10:49:58 2020
*************** s390_opts='-m31 -m31/-mzarch -m64'
*** 34,40 ****
  sh_opts='-m3 -m3e -m4 -m4a -m4al -m4/-mieee -m1 -m1/-mno-cbranchdi -m2a -m2a/-mieee -m2e -m2e/-mieee'
  sparc_opts='-mcpu=v8/-m32 -mcpu=v9/-m32 -m64'
  
! all_targets='alpha arm avr bfin cris fr30 frv h8300 ia64 iq2000 m32c m32r m68k mcore mips mmix mn10300 pa pdp11 ppc sh sparc spu v850 vax xstormy16 xtensa' # e500 
  
  test_one_file ()
  {
--- 34,40 ----
  sh_opts='-m3 -m3e -m4 -m4a -m4al -m4/-mieee -m1 -m1/-mno-cbranchdi -m2a -m2a/-mieee -m2e -m2e/-mieee'
  sparc_opts='-mcpu=v8/-m32 -mcpu=v9/-m32 -m64'
  
! all_targets='alpha arm avr bfin cris fr30 frv h8300 ia64 iq2000 m32c m32r m68k mcore mips mmix mn10300 pa pdp11 ppc sh sparc v850 vax xstormy16 xtensa' # e500 
  
  test_one_file ()
  {
diff -Nrcpad gcc-9.3.0/contrib/config-list.mk gcc-10.1.0/contrib/config-list.mk
*** gcc-9.3.0/contrib/config-list.mk	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/config-list.mk	Thu May  7 10:49:58 2020
*************** LIST = aarch64-elf aarch64-linux-gnu aar
*** 40,45 ****
--- 40,46 ----
    arm-linux-androideabi arm-uclinux_eabi arm-eabi arm-rtems \
    arm-symbianelf avr-elf \
    bfin-elf bfin-uclinux bfin-linux-uclibc bfin-rtems bfin-openbsd \
+   bpf-unknown-none \
    c6x-elf c6x-uclinux cr16-elf cris-elf cris-linux crisv32-elf crisv32-linux \
    csky-elf csky-linux-gnu \
    epiphany-elf epiphany-elfOPT-with-stack-offset=16 fido-elf \
*************** LIST = aarch64-elf aarch64-linux-gnu aar
*** 67,73 ****
    mipsel-elf mips64-elf mips64vr-elf mips64orion-elf mips-rtems \
    mips-wrs-vxworks mipstx39-elf mmix-knuth-mmixware mn10300-elf moxie-elf \
    moxie-uclinux moxie-rtems \
!   msp430-elf \
    nds32le-elf nds32be-elf \
    nios2-elf nios2-linux-gnu nios2-rtems \
    nvptx-none \
--- 68,74 ----
    mipsel-elf mips64-elf mips64vr-elf mips64orion-elf mips-rtems \
    mips-wrs-vxworks mipstx39-elf mmix-knuth-mmixware mn10300-elf moxie-elf \
    moxie-uclinux moxie-rtems \
!   msp430-elf msp430-elfbare \
    nds32le-elf nds32be-elf \
    nios2-elf nios2-linux-gnu nios2-rtems \
    nvptx-none \
*************** LIST = aarch64-elf aarch64-linux-gnu aar
*** 90,96 ****
    sparc-leon3-linux-gnuOPT-enable-target=all sparc-netbsdelf \
    sparc64-sun-solaris2.11OPT-with-gnu-ldOPT-with-gnu-asOPT-enable-threads=posix \
    sparc-wrs-vxworks sparc64-elf sparc64-rtems sparc64-linux sparc64-freebsd6 \
!   sparc64-netbsd sparc64-openbsd spu-elf \
    tilegx-linux-gnu tilegxbe-linux-gnu tilepro-linux-gnu \
    v850e-elf v850-elf v850-rtems vax-linux-gnu \
    vax-netbsdelf vax-openbsd visium-elf x86_64-apple-darwin \
--- 91,97 ----
    sparc-leon3-linux-gnuOPT-enable-target=all sparc-netbsdelf \
    sparc64-sun-solaris2.11OPT-with-gnu-ldOPT-with-gnu-asOPT-enable-threads=posix \
    sparc-wrs-vxworks sparc64-elf sparc64-rtems sparc64-linux sparc64-freebsd6 \
!   sparc64-netbsd sparc64-openbsd \
    tilegx-linux-gnu tilegxbe-linux-gnu tilepro-linux-gnu \
    v850e-elf v850-elf v850-rtems vax-linux-gnu \
    vax-netbsdelf vax-openbsd visium-elf x86_64-apple-darwin \
*************** $(LIST): make-log-dir
*** 123,129 ****
  		TGT=`echo $@ | awk 'BEGIN { FS = "OPT" }; { print $$1 }'` &&			\
  		TGT=`$(GCC_SRC_DIR)/config.sub $$TGT` &&					\
  		case $$TGT in									\
! 			*-*-darwin* | *-*-cygwin* | *-*-mingw* | *-*-aix*)			\
  				ADDITIONAL_LANGUAGES="";					\
  				;;								\
  			*)									\
--- 124,130 ----
  		TGT=`echo $@ | awk 'BEGIN { FS = "OPT" }; { print $$1 }'` &&			\
  		TGT=`$(GCC_SRC_DIR)/config.sub $$TGT` &&					\
  		case $$TGT in									\
! 			*-*-darwin* | *-*-cygwin* | *-*-mingw* | *-*-aix* | bpf-*-*)			\
  				ADDITIONAL_LANGUAGES="";					\
  				;;								\
  			*)									\
diff -Nrcpad gcc-9.3.0/contrib/dg-extract-results.py gcc-10.1.0/contrib/dg-extract-results.py
*** gcc-9.3.0/contrib/dg-extract-results.py	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/dg-extract-results.py	Thu May  7 10:49:58 2020
*************** class Prog:
*** 117,123 ****
          self.tool_re = re.compile (r'^\t\t=== (.*) tests ===$')
          self.result_re = re.compile (r'^(PASS|XPASS|FAIL|XFAIL|UNRESOLVED'
                                       r'|WARNING|ERROR|UNSUPPORTED|UNTESTED'
!                                      r'|KFAIL):\s*(.+)')
          self.completed_re = re.compile (r'.* completed at (.*)')
          # Pieces of text to write at the head of the output.
          # start_line is a pair in which the first element is a datetime
--- 117,123 ----
          self.tool_re = re.compile (r'^\t\t=== (.*) tests ===$')
          self.result_re = re.compile (r'^(PASS|XPASS|FAIL|XFAIL|UNRESOLVED'
                                       r'|WARNING|ERROR|UNSUPPORTED|UNTESTED'
!                                      r'|KFAIL|KPASS):\s*(.+)')
          self.completed_re = re.compile (r'.* completed at (.*)')
          # Pieces of text to write at the head of the output.
          # start_line is a pair in which the first element is a datetime
diff -Nrcpad gcc-9.3.0/contrib/dg-extract-results.sh gcc-10.1.0/contrib/dg-extract-results.sh
*** gcc-9.3.0/contrib/dg-extract-results.sh	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/dg-extract-results.sh	Thu May  7 10:49:58 2020
*************** BEGIN {
*** 326,332 ****
    }
  }
  /^\t\t=== .* ===$/ { curvar = ""; next }
! /^(PASS|XPASS|FAIL|XFAIL|UNRESOLVED|WARNING|ERROR|UNSUPPORTED|UNTESTED|KFAIL):/ {
    testname=\$2
    # Ugly hack for gfortran.dg/dg.exp
    if ("$TOOL" == "gfortran" && testname ~ /^gfortran.dg\/g77\//)
--- 326,332 ----
    }
  }
  /^\t\t=== .* ===$/ { curvar = ""; next }
! /^(PASS|XPASS|FAIL|XFAIL|UNRESOLVED|WARNING|ERROR|UNSUPPORTED|UNTESTED|KFAIL|KPASS):/ {
    testname=\$2
    # Ugly hack for gfortran.dg/dg.exp
    if ("$TOOL" == "gfortran" && testname ~ /^gfortran.dg\/g77\//)
diff -Nrcpad gcc-9.3.0/contrib/download_prerequisites gcc-10.1.0/contrib/download_prerequisites
*** gcc-9.3.0/contrib/download_prerequisites	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/download_prerequisites	Thu May  7 10:49:58 2020
*************** mpfr='mpfr-3.1.4.tar.bz2'
*** 32,38 ****
  mpc='mpc-1.0.3.tar.gz'
  isl='isl-0.18.tar.bz2'
  
! base_url='ftp://gcc.gnu.org/pub/gcc/infrastructure/'
  
  echo_archives() {
      echo "${gmp}"
--- 32,38 ----
  mpc='mpc-1.0.3.tar.gz'
  isl='isl-0.18.tar.bz2'
  
! base_url='http://gcc.gnu.org/pub/gcc/infrastructure/'
  
  echo_archives() {
      echo "${gmp}"
*************** esac
*** 58,64 ****
  if type wget > /dev/null ; then
    fetch='wget'
  else
!   fetch='curl -LO -u anonymous:'
  fi
  chksum_extension='sha512'
  directory='.'
--- 58,64 ----
  if type wget > /dev/null ; then
    fetch='wget'
  else
!   fetch='curl -LO'
  fi
  chksum_extension='sha512'
  directory='.'
diff -Nrcpad gcc-9.3.0/contrib/filter-clang-warnings.py gcc-10.1.0/contrib/filter-clang-warnings.py
*** gcc-9.3.0/contrib/filter-clang-warnings.py	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/filter-clang-warnings.py	Thu May  7 10:49:58 2020
***************
*** 0 ****
--- 1,72 ----
+ #!/usr/bin/env python3
+ #
+ # Script to analyze warnings produced by clang.
+ #
+ # This file is part of GCC.
+ #
+ # GCC is free software; you can redistribute it and/or modify it under
+ # the terms of the GNU General Public License as published by the Free
+ # Software Foundation; either version 3, or (at your option) any later
+ # version.
+ #
+ # GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+ # WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ # FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ # for more details.
+ #
+ # You should have received a copy of the GNU General Public License
+ # along with GCC; see the file COPYING3.  If not see
+ # <http://www.gnu.org/licenses/>.  */
+ #
+ #
+ #
+ 
+ import sys
+ import argparse
+ 
+ def skip_warning(filename, message):
+     ignores = {
+             '': ['-Warray-bounds', '-Wmismatched-tags', 'gcc_gfc: -Wignored-attributes', '-Wchar-subscripts',
+                 'string literal (potentially insecure): -Wformat-security', '-Wdeprecated-register',
+                 '-Wvarargs', 'keyword is hidden by macro definition', "but the argument has type 'char *': -Wformat-pedantic",
+                 '-Wnested-anon-types', 'qualifier in explicit instantiation of', 'attribute argument not supported: asm_fprintf',
+                 'when in C++ mode, this behavior is deprecated', '-Wignored-attributes', '-Wgnu-zero-variadic-macro-arguments',
+                 '-Wformat-security'],
+             'insn-modes.c': ['-Wshift-count-overflow'],
+             'insn-emit.c': ['-Wtautological-compare'],
+             'insn-attrtab.c': ['-Wparentheses-equality'],
+             'gimple-match.c': ['-Wunused-', '-Wtautological-compare'],
+             'generic-match.c': ['-Wunused-', '-Wtautological-compare'],
+             'i386.md': ['-Wparentheses-equality', '-Wtautological-compare'],
+             'sse.md': ['-Wparentheses-equality', '-Wtautological-compare'],
+             'genautomata.c': ['-Wstring-plus-int']
+ 
+     }
+ 
+     for name, ignores in ignores.items():
+         for i in ignores:
+             if name in filename and i in message:
+                 return True
+ 
+     return False
+ 
+ parser = argparse.ArgumentParser()
+ parser.add_argument('log', help = 'Log file with clang warnings')
+ args = parser.parse_args()
+ 
+ lines = [l.strip() for l in open(args.log)]
+ total = 0
+ messages = []
+ for l in lines:
+     token = ': warning: '
+     i = l.find(token)
+     if i != -1:
+         location = l[:i]
+         message = l[i + len(token):]
+         if not skip_warning(location, message):
+             total += 1
+             messages.append(l)
+ 
+ for l in sorted(messages):
+     print(l)
+ print('\nTotal warnings: %d' % total)
diff -Nrcpad gcc-9.3.0/contrib/filter-rtags-warnings.py gcc-10.1.0/contrib/filter-rtags-warnings.py
*** gcc-9.3.0/contrib/filter-rtags-warnings.py	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/filter-rtags-warnings.py	Thu Jan  1 00:00:00 1970
***************
*** 1,71 ****
- #!/usr/bin/env python3
- #
- # Script to analyze warnings produced by rtags command (using LLVM):
- # rc --diagnose-all --synchronous-diagnostics --json
- #
- # This file is part of GCC.
- #
- # GCC is free software; you can redistribute it and/or modify it under
- # the terms of the GNU General Public License as published by the Free
- # Software Foundation; either version 3, or (at your option) any later
- # version.
- #
- # GCC is distributed in the hope that it will be useful, but WITHOUT ANY
- # WARRANTY; without even the implied warranty of MERCHANTABILITY or
- # FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- # for more details.
- #
- # You should have received a copy of the GNU General Public License
- # along with GCC; see the file COPYING3.  If not see
- # <http://www.gnu.org/licenses/>.  */
- #
- #
- #
- 
- import sys
- import json
- import argparse
- 
- def skip_warning(filename, warning):
-     ignores = {
-             '': ['-Warray-bounds', '-Wmismatched-tags', 'gcc_gfc: -Wignored-attributes', '-Wchar-subscripts',
-                 'string literal (potentially insecure): -Wformat-security', '-Wdeprecated-register',
-                 '-Wvarargs', 'keyword is hidden by macro definition', "but the argument has type 'char *': -Wformat-pedantic",
-                 '-Wnested-anon-types', 'qualifier in explicit instantiation of', 'attribute argument not supported: asm_fprintf'],
-             'insn-modes.c': ['-Wshift-count-overflow'],
-             'insn-emit.c': ['-Wtautological-compare'],
-             'insn-attrtab.c': ['-Wparentheses-equality'],
-             'gimple-match.c': ['-Wunused-', '-Wtautological-compare'],
-             'generic-match.c': ['-Wunused-', '-Wtautological-compare'],
-     }
- 
-     message = warning['message']
- 
-     if warning['type'] == 'fixit':
-         return True
- 
-     for name, ignores in ignores.items():
-         for i in ignores:
-             if name in filename and i in message:
-                 return True
- 
-     return False
- 
- parser = argparse.ArgumentParser()
- parser.add_argument('json_file', help = 'Rtags JSON file with diagnostics')
- parser.add_argument('-n', '--no-filter', action = 'store_true', help = 'No filter')
- 
- args = parser.parse_args()
- 
- data = json.load(open(args.json_file))
- file_warnings = data['checkStyle']
- 
- total = 0
- for filename, warnings in file_warnings.items():
-     if warnings:
-         for w in warnings:
-             if args.no_filter or not skip_warning(filename, w):
-                 total += 1
-                 print('%s:%d:%d:%s' % (filename, w['line'], w['column'], w['message']))
- 
- print('Total: %d' % total)
--- 0 ----
diff -Nrcpad gcc-9.3.0/contrib/gcc-git-customization.sh gcc-10.1.0/contrib/gcc-git-customization.sh
*** gcc-9.3.0/contrib/gcc-git-customization.sh	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/gcc-git-customization.sh	Thu May  7 10:49:58 2020
***************
*** 0 ****
--- 1,182 ----
+ #!/bin/sh
+ 
+ # Script to add some local git customizations suitable for working
+ # with the GCC git repository
+ 
+ ask () {
+     question=$1
+     default=$2
+     var=$3
+     echo -n $question "["$default"]? "
+     read answer
+     if [ "x$answer" = "x" ]
+     then
+ 	eval $var=\$default
+     else
+ 	eval $var=\$answer
+     fi
+ }
+ 
+ # Add a git command to find the git commit equivalent to legacy SVN revision NNN
+ git config alias.svn-rev '!f() { rev=$1; shift; git log --all --grep="^From-SVN: r\\?$rev\\b" "${@}"; } ; f'
+ 
+ # Add git commands to convert git commit to monotonically increasing revision number
+ # and vice versa
+ git config alias.gcc-descr \!"f() { if test \${1:-no} = --full; then c=\${2:-master}; r=\$(git describe --all --abbrev=40 --match 'basepoints/gcc-[0-9]*' \$c | sed -n 's,^\\(tags/\\)\\?basepoints/gcc-,r,p'); expr match \${r:-no} '^r[0-9]\\+\$' >/dev/null && r=\${r}-0-g\$(git rev-parse \${2:-master}); else c=\${1:-master}; r=\$(git describe --all --match 'basepoints/gcc-[0-9]*' \$c | sed -n 's,^\\(tags/\\)\\?basepoints/gcc-\\([0-9]\\+\\)-\\([0-9]\\+\\)-g[0-9a-f]*\$,r\\2-\\3,p;s,^\\(tags/\\)\\?basepoints/gcc-\\([0-9]\\+\\)\$,r\\2-0,p'); fi; if test -n \$r; then o=\$(git config --get gcc-config.upstream); rr=\$(echo \$r | sed -n 's,^r\\([0-9]\\+\\)-[0-9]\\+\\(-g[0-9a-f]\\+\\)\\?\$,\\1,p'); if git rev-parse --verify --quiet \${o:-origin}/releases/gcc-\$rr >/dev/null; then m=releases/gcc-\$rr; else m=master; fi; git merge-base --is-ancestor \$c \${o:-origin}/\$m && \echo \${r}; fi; }; f"
+ git config alias.gcc-undescr \!"f() { o=\$(git config --get gcc-config.upstream); r=\$(echo \$1 | sed -n 's,^r\\([0-9]\\+\\)-[0-9]\\+\$,\\1,p'); n=\$(echo \$1 | sed -n 's,^r[0-9]\\+-\\([0-9]\\+\\)\$,\\1,p'); test -z \$r && echo Invalid id \$1 && exit 1; h=\$(git rev-parse --verify --quiet \${o:-origin}/releases/gcc-\$r); test -z \$h && h=\$(git rev-parse --verify --quiet \${o:-origin}/master); p=\$(git describe --all --match 'basepoints/gcc-'\$r \$h | sed -n 's,^\\(tags/\\)\\?basepoints/gcc-[0-9]\\+-\\([0-9]\\+\\)-g[0-9a-f]*\$,\\2,p;s,^\\(tags/\\)\\?basepoints/gcc-[0-9]\\+\$,0,p'); git rev-parse --verify \$h~\$(expr \$p - \$n); }; f"
+ 
+ # Make diff on MD files use "(define" as a function marker.
+ # Use this in conjunction with a .gitattributes file containing
+ # *.md    diff=md
+ git config diff.md.xfuncname '^\(define.*$'
+ 
+ set_user=$(git config --get "user.name")
+ set_email=$(git config --get "user.email")
+ 
+ if [ "x$set_user" = "x" ]
+ then
+     # Try to guess the user's name by looking it up in the password file
+     new_user=$(getent passwd $(whoami) | awk -F: '{ print $5 }')
+     if [ "x$new_user" = "x" ]
+     then
+        new_user="(no default)"
+     fi
+ else
+     new_user=$set_user
+ fi
+ ask "Your name" "${new_user}" new_user
+ if [ "x$new_user" = "x(no default)" ]
+ then
+     echo "Cannot continue, git needs to record your name against commits"
+     exit 1
+ fi
+ 
+ if [ "x$set_email" = "x" ]
+ then
+     new_email="(no_default)"
+ else
+     new_email=$set_email
+ fi
+ 
+ ask "Your email address (for git commits)" "${new_email}" new_email
+ if [ "x$new_email" = "x(no default)" ]
+ then
+     echo "Cannot continue, git needs to record your email address against commits"
+     exit 1
+ fi
+ 
+ if [ "x$set_user" != "x$new_user" ]
+ then
+     git config "user.name" "$new_user"
+ fi
+ 
+ if [ "x$set_email" != "x$new_email" ]
+ then
+     git config "user.email" "$new_email"
+ fi
+ 
+ upstream=$(git config --get "gcc-config.upstream")
+ if [ "x$upstream" = "x" ]
+ then
+     upstream="origin"
+ fi
+ ask "Local name for upstream repository" "origin" upstream
+ 
+ v=$(git config --get-all "remote.${upstream}.fetch")
+ if [ "x$v" = "x" ]
+ then
+     echo "Remote $upstream does not seem to exist as a remote"
+     exit 1
+ fi
+ git config "gcc-config.upstream" "$upstream"
+ 
+ remote_id=$(git config --get "gcc-config.user")
+ if [ "x$remote_id" = "x" ]
+ then
+     # See if the url specifies the remote user name.
+     url=$(git config --get "remote.$upstream.url")
+     if [ "x$url" = "x" ]
+     then
+ 	# This is a pure guess, but for many people it might be OK.
+ 	remote_id=$(whoami)
+     else
+ 	remote_id=$(echo $url | sed -r "s|^.*ssh://(.+)@gcc.gnu.org.*$|\1|")
+ 	if [ x$remote_id = x$url ]
+ 	then
+ 	    remote_id=$(whoami)
+ 	fi
+     fi
+ fi
+ 
+ ask "Account name on gcc.gnu.org (for your personal branches area)" $remote_id remote_id
+ git config "gcc-config.user" "$remote_id"
+ 
+ old_pfx=$(git config --get "gcc-config.userpfx")
+ if [ "x$old_pfx" = "x" ]
+ then
+     old_pfx="me"
+ fi
+ echo
+ echo "Local branch prefix for personal branches you want to share"
+ echo "(local branches starting <prefix>/ can be pushed directly to your"
+ ask "personal area on the gcc server)" $old_pfx new_pfx
+ git config "gcc-config.userpfx" "$new_pfx"
+ 
+ # Scan the existing settings to see if there are any we need to rewrite.
+ vendors=$(git config --get-all "remote.${upstream}.fetch" "refs/vendors/" | sed -r "s:.*refs/vendors/([^/]+)/.*:\1:" | sort | uniq)
+ url=$(git config --get "remote.${upstream}.url")
+ pushurl=$(git config --get "remote.${upstream}.pushurl")
+ for v in $vendors
+ do
+     echo "Migrating vendor \"$v\" to new remote \"vendors/$v\""
+     git config --unset-all "remote.${upstream}.fetch" "refs/vendors/$v/"
+     git config --unset-all "remote.${upstream}.push" "refs/vendors/$v/"
+     git config "remote.vendors/${v}.url" "${url}"
+     if [ "x$pushurl" != "x" ]
+     then
+ 	git config "remote.vendors/${v}.pushurl" "${pushurl}"
+     fi
+     git config --add "remote.vendors/${v}.fetch" "+refs/vendors/$v/heads/*:refs/remotes/vendors/${v}/*"
+     git config --add "remote.vendors/${v}.fetch" "+refs/vendors/$v/tags/*:refs/tags/vendors/${v}/*"
+ done
+ 
+ # Convert the remote 'pfx' to users/pfx to avoid problems with ambiguous refs
+ # on user branches
+ old_remote=$(git config --get "remote.${old_pfx}.url")
+ if [ -n "${old_remote}" ]
+ then
+     echo "Migrating remote \"${old_pfx}\" to new remote \"users/${new_pfx}\""
+     # Create a dummy fetch rule that will cause the subsequent prune to remove the old remote refs.
+     git config --replace-all "remote.${old_pfx}.fetch" "+refs/empty/*:refs/remotes/${old_pfx}/*"
+     # Remove any remotes
+     git remote prune ${old_pfx}
+     git config --remove-section "remote.${old_pfx}"
+     for br in $(git branch --list "${old_pfx}/*")
+     do
+ 	old_remote=$(git config --get "branch.${br}.remote")
+ 	if [ "${old_remote}" = "${old_pfx}" ]
+ 	then
+ 	    git config "branch.${br}.remote" "users/${new_pfx}"
+ 	fi
+     done
+ fi
+ 
+ echo "Setting up tracking for personal namespace $remote_id in remotes/users/${new_pfx}"
+ git config "remote.users/${new_pfx}.url" "${url}"
+ if [ "x$pushurl" != "x" ]
+ then
+     git config "remote.users/${new_pfx}.pushurl" "${pushurl}"
+ fi
+ git config --replace-all "remote.users/${new_pfx}.fetch" "+refs/users/${remote_id}/heads/*:refs/remotes/users/${new_pfx}/*" "refs/users/${remote_id}/heads/"
+ git config --replace-all "remote.users/${new_pfx}.fetch" "+refs/users/${remote_id}/tags/*:refs/tags/users/${new_pfx}/*" "refs/users/${remote_id}/tags/"
+ git config --replace-all "remote.users/${new_pfx}.push" "refs/heads/${new_pfx}/*:refs/users/${remote_id}/heads/*" "refs/users/${remote_id}"
+ 
+ if [ "$old_pfx" != "$new_pfx" -a "$old_pfx" != "${upstream}" ]
+ then
+     git config --remove-section "remote.${old_pfx}"
+ fi
+ 
+ git config --unset-all "remote.${upstream}.fetch" "refs/users/${remote_id}/"
+ git config --unset-all "remote.${upstream}.push" "refs/users/${remote_id}/"
+ 
+ git fetch "users/${new_pfx}"
diff -Nrcpad gcc-9.3.0/contrib/gcc_update gcc-10.1.0/contrib/gcc_update
*** gcc-9.3.0/contrib/gcc_update	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/gcc_update	Thu May  7 10:49:59 2020
*************** fixincludes/configure: fixincludes/confi
*** 72,77 ****
--- 72,78 ----
  fixincludes/config.h.in: fixincludes/configure.ac fixincludes/aclocal.m4
  # intl library
  intl/plural.c: intl/plural.y
+ intl/plural-config.h: intl/plural.y
  intl/configure: intl/configure.ac intl/aclocal.m4
  intl/config.h.in: intl/configure.ac intl/aclocal.m4
  # Now, proceed to gcc automatically generated files
*************** gcc/fixinc/fixincl.x: gcc/fixinc/fixincl
*** 82,88 ****
  gcc/config/aarch64/aarch64-tune.md: gcc/config/aarch64/aarch64-cores.def gcc/config/aarch64/gentune.sh
  gcc/config/arm/arm-tune.md: gcc/config/arm/arm-cpus.in gcc/config/arm/parsecpu.awk
  gcc/config/arm/arm-tables.opt: gcc/config/arm/arm-cpus.in gcc/config/arm/parsecpu.awk
- gcc/config/avr/t-multilib: gcc/config/avr/avr-mcus.def gcc/config/avr/genmultilib.awk
  gcc/config/c6x/c6x-tables.opt: gcc/config/c6x/c6x-isas.def gcc/config/c6x/genopt.sh
  gcc/config/c6x/c6x-sched.md: gcc/config/c6x/c6x-sched.md.in gcc/config/c6x/gensched.sh
  gcc/config/c6x/c6x-mult.md: gcc/config/c6x/c6x-mult.md.in gcc/config/c6x/genmult.sh
--- 83,88 ----
*************** case $vcs_type in
*** 331,337 ****
              exit 1
  	fi
  
! 	revision=`$GCC_GIT log -n1 --pretty=%p:%t:%H`
  	branch=`$GCC_GIT name-rev --name-only HEAD || :`
  	;;    
  
--- 331,337 ----
              exit 1
  	fi
  
! 	revision=`$GCC_GIT log -n1 --pretty=tformat:%p:%t:%H`
  	branch=`$GCC_GIT name-rev --name-only HEAD || :`
  	;;    
  
diff -Nrcpad gcc-9.3.0/contrib/gennews gcc-10.1.0/contrib/gennews
*** gcc-9.3.0/contrib/gennews	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/gennews	Thu May  7 10:49:59 2020
***************
*** 3,9 ****
  # Script to generate the NEWS file from online release notes.
  # Contributed by Joseph Myers <jsm28@cam.ac.uk>.
  #
! # Copyright (C) 2000-2019 Free Software Foundation, Inc.
  # This file is part of GCC.
  #
  # GCC is free software; you can redistribute it and/or modify
--- 3,9 ----
  # Script to generate the NEWS file from online release notes.
  # Contributed by Joseph Myers <jsm28@cam.ac.uk>.
  #
! # Copyright (C) 2000-2020 Free Software Foundation, Inc.
  # This file is part of GCC.
  #
  # GCC is free software; you can redistribute it and/or modify
***************
*** 23,28 ****
--- 23,29 ----
  
  website=http://gcc.gnu.org/
  files="
+     gcc-10/index.html gcc-10/changes.html
      gcc-9/index.html gcc-9/changes.html
      gcc-8/index.html gcc-8/changes.html
      gcc-7/index.html gcc-7/changes.html
diff -Nrcpad gcc-9.3.0/contrib/git-add-user-branch.sh gcc-10.1.0/contrib/git-add-user-branch.sh
*** gcc-9.3.0/contrib/git-add-user-branch.sh	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/git-add-user-branch.sh	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,46 ----
+ #! /bin/sh -e
+ 
+ # Create a new upstream user branch.
+ 
+ # Usage:
+ #  contrib/git-add-user-branch.sh [<personal-prefix>/]<branch-name> <base>
+ 
+ usage ()
+ {
+     echo "Usage:"
+     echo "  $0 [<personal-prefix>/]<branch-name> <start-point>"
+     echo
+     echo "personal space must already have been set up using"
+     echo "contrib/gcc-git-customization.sh"
+     exit 1
+ }
+ 
+ if [ $# != 2 ]
+ then
+     usage
+ fi
+ 
+ userpfx=$(git config --get "gcc-config.userpfx")
+ user=$(git config --get "gcc-config.user")
+ 
+ if [ -z "$userpfx" -o -z "$user" ]
+ then
+     usage
+ fi
+ 
+ branch=$(echo "$1" | sed -r "s:(${userpfx}/)?(.*)$:\2:")
+ start=$2
+ 
+ # Sanity check the new branch argument.  If there is no '/', then the
+ # vendor will be the same as the entire first argument.
+ if [ -z "$branch" ]
+ then
+     usage
+ fi
+ 
+ git push users/${userpfx} ${start}:refs/users/${user}/heads/${branch}
+ git fetch -q users/${userpfx}
+ git branch ${userpfx}/${branch} remotes/users/${userpfx}/${branch}
+ echo "You are now ready to check out ${userpfx}/${branch}"
+ echo "To push the branch upstream use:"
+ echo "  git push users/${userpfx} ${userpfx}/${branch}"
diff -Nrcpad gcc-9.3.0/contrib/git-add-vendor-branch.sh gcc-10.1.0/contrib/git-add-vendor-branch.sh
*** gcc-9.3.0/contrib/git-add-vendor-branch.sh	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/git-add-vendor-branch.sh	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,48 ----
+ #! /bin/sh -e
+ 
+ # Create a new upstream vendor branch.
+ 
+ # Usage:
+ #  contrib/git-add-vendor-branch.sh <vendor>/<branch-name> <base>
+ 
+ usage ()
+ {
+     echo "Usage:"
+     echo "  $0 <vendor>/<branch-name> <start-point>"
+     echo
+     echo "<vendor> must have already been set up using contrib/git-fetch-vendor.sh"
+     exit 1
+ }
+ 
+ if [ $# != 2 ]
+ then
+     usage
+ fi
+ 
+ vendor=$(echo "$1" | sed -r "s:([^/]*)/.*$:\1:")
+ branch=$(echo "$1" | sed -r "s:[^/]*/(.*)$:\1:")
+ start=$2
+ 
+ # Sanity check the new branch argument.  If there is no '/', then the
+ # vendor will be the same as the entire first argument.
+ if [ -z "$vendor" -o -z "$branch" -o ${vendor} = $1 ]
+ then
+     usage
+ fi
+ 
+ # Check that we know about the vendor
+ url=$(git config --get "remote.vendors/${vendor}.url"||true)
+ if [ -z "$url" ]
+ then
+     echo "Cannot locate remote data for vendor ${vendor}.  Have you set it up?"
+     exit 1
+ fi
+ 
+ git branch --no-track ${vendor}/${branch} ${start}
+ git push vendors/${vendor} ${vendor}/${branch}:refs/vendors/${vendor}/heads/${branch}
+ git fetch -q vendors/${vendor}
+ git branch --set-upstream-to=remotes/vendors/${vendor}/${branch} ${vendor}/$branch
+ echo "You are now ready to check out ${vendor}/${branch}"
+ echo "To push the branch upstream, use:"
+ echo
+ echo "git push vendors/${vendor} ${vendor}/${branch}"
diff -Nrcpad gcc-9.3.0/contrib/git-fetch-vendor.sh gcc-10.1.0/contrib/git-fetch-vendor.sh
*** gcc-9.3.0/contrib/git-fetch-vendor.sh	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/git-fetch-vendor.sh	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,66 ----
+ #!/bin/sh
+ 
+ usage ()
+ {
+     echo "Usage: $0 [--enable-push] <vendor>"
+     echo "The following vendors are already known:"
+     git ls-remote ${upstream} "*/vendors/*" | sed -r "s:.*/vendors/([^/]+)/.*:\1:"|sort|uniq
+     exit 1
+ }
+ 
+ # Should we insert a "push" refspec to enable pushing to the vendor branch?
+ enable_push=no
+ 
+ upstream=`git config --get "gcc-config.upstream"`
+ if [ x"$upstream" = x ]
+ then
+     echo "Config gcc-config.upstream not set, run contrib/gcc-git-customization"
+     exit 1
+ fi
+ 
+ case $# in
+     1)
+ 	# vendor names never start with -, so catch this in case user wrote something like --help.
+ 	case "$1" in
+ 	    -*)
+ 		usage
+ 		;;
+ 	    *)
+ 		vendor=$1
+ 		;;
+ 	esac
+ 	;;
+     2)
+ 	vendor=$2
+ 	if [ "$1" = "--enable-push" ]
+ 	then
+ 	    enable_push=yes
+ 	else
+ 	    usage
+ 	fi
+ 	;;
+     *)
+ 	usage
+ 	;;
+ esac
+ 
+ 
+ echo "setting up git to fetch vendor ${vendor} to remotes/vendors/${vendor}"
+ url=$(git config --get "remote.${upstream}.url")
+ pushurl=$(git config --get "remote.${upstream}.pushurl")
+ git config "remote.vendors/${vendor}.url" "${url}"
+ if [ "x$pushurl" != "x" ]
+ then
+     git config "remote.vendors/${vendor}.pushurl" "${pushurl}"
+ fi
+ git config --replace-all "remote.vendors/${vendor}.fetch" "+refs/vendors/${vendor}/heads/*:refs/remotes/vendors/${vendor}/*" "refs/vendors/${vendor}/heads"
+ git config --replace-all "remote.vendors/${vendor}.fetch" "+refs/vendors/${vendor}/tags/*:refs/tags/vendors/${vendor}/*" "refs/vendors/${vendor}/tags"
+ if [ "$enable_push" = "yes" ]
+ then
+     echo "Warning: take care when pushing that you only push the changes you intend."
+     echo "E.g. use \"git push vendors/${vendor} HEAD\" to push the current branch"
+     git config --replace-all "remote.vendors/${vendor}.push" "refs/heads/${vendor}/*:refs/vendors/${vendor}/heads/*"
+ else
+     git config --unset-all "remote.vendors/${vendor}.push"
+ fi
+ git fetch vendors/${vendor}
diff -Nrcpad gcc-9.3.0/contrib/header-tools/ChangeLog gcc-10.1.0/contrib/header-tools/ChangeLog
*** gcc-9.3.0/contrib/header-tools/ChangeLog	Thu Mar 12 11:08:03 2020
--- gcc-10.1.0/contrib/header-tools/ChangeLog	Thu May  7 10:50:32 2020
***************
*** 1,14 ****
! 2020-03-12  Release Manager
! 
! 	* GCC 9.3.0 released.
! 
! 2019-08-12  Release Manager
  
! 	* GCC 9.2.0 released.
  
! 2019-05-03  Release Manager
  
! 	* GCC 9.1.0 released.
  
  2017-07-02  Richard Sandiford  <richard.sandiford@linaro.org>
  	    Alan Hayward  <alan.hayward@arm.com>
--- 1,11 ----
! 2020-05-07  Release Manager
  
! 	* GCC 10.1.0 released.
  
! 2019-09-03  Ulrich Weigand  <uweigand@de.ibm.com>
  
! 	* README: Remove references to spu.
! 	* reduce-headers: Likewise.
  
  2017-07-02  Richard Sandiford  <richard.sandiford@linaro.org>
  	    Alan Hayward  <alan.hayward@arm.com>
diff -Nrcpad gcc-9.3.0/contrib/header-tools/README gcc-10.1.0/contrib/header-tools/README
*** gcc-9.3.0/contrib/header-tools/README	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/header-tools/README	Thu May  7 10:49:59 2020
*************** reduce-headers
*** 203,209 ****
    these targets.  They are also known to the tool.  When building targets it
    will check those targets before the rest.  
    This coverage can be achieved by building config-list.mk with :
!   LIST="aarch64-linux-gnu arm-netbsdelf c6x-elf epiphany-elf hppa2.0-hpux10.1 i686-mingw32crt i686-pc-msdosdjgpp mipsel-elf powerpc-eabisimaltivec rs6000-ibm-aix5.1.0 sh-superh-elf sparc64-elf spu-elf"
  
    -b specifies the native bootstrapped build root directory
    -t specifies a target build root directory that config-list.mk was run from
--- 203,209 ----
    these targets.  They are also known to the tool.  When building targets it
    will check those targets before the rest.  
    This coverage can be achieved by building config-list.mk with :
!   LIST="aarch64-linux-gnu arm-netbsdelf c6x-elf epiphany-elf hppa2.0-hpux10.1 i686-mingw32crt i686-pc-msdosdjgpp mipsel-elf powerpc-eabisimaltivec rs6000-ibm-aix5.1.0 sh-superh-elf sparc64-elf"
  
    -b specifies the native bootstrapped build root directory
    -t specifies a target build root directory that config-list.mk was run from
diff -Nrcpad gcc-9.3.0/contrib/header-tools/reduce-headers gcc-10.1.0/contrib/header-tools/reduce-headers
*** gcc-9.3.0/contrib/header-tools/reduce-headers	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/header-tools/reduce-headers	Thu May  7 10:49:59 2020
*************** target_priority = [
*** 32,39 ****
      "powerpc-eabisimaltivec",
      "rs6000-ibm-aix5.1.0",
      "sh-superh-elf",
!     "sparc64-elf",
!     "spu-elf"
  ]
  
  
--- 32,38 ----
      "powerpc-eabisimaltivec",
      "rs6000-ibm-aix5.1.0",
      "sh-superh-elf",
!     "sparc64-elf"
  ]
  
  
diff -Nrcpad gcc-9.3.0/contrib/mklog gcc-10.1.0/contrib/mklog
*** gcc-9.3.0/contrib/mklog	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/mklog	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
! #!/usr/bin/python
  
! # Copyright (C) 2017 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,6 ----
! #!/usr/bin/env python3
  
! # Copyright (C) 2017-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
***************
*** 28,38 ****
  #
  # Author: Yury Gribov <tetra2005@gmail.com>
  
  import sys
  import re
  import os.path
  import os
- import getopt
  import tempfile
  import time
  import shutil
--- 28,38 ----
  #
  # Author: Yury Gribov <tetra2005@gmail.com>
  
+ import argparse
  import sys
  import re
  import os.path
  import os
  import tempfile
  import time
  import shutil
*************** from subprocess import Popen, PIPE
*** 40,45 ****
--- 40,47 ----
  
  me = os.path.basename(sys.argv[0])
  
+ pr_regex = re.compile('\+(\/(\/|\*)|[Cc*!])\s+(PR [a-z+-]+\/[0-9]+)')
+ 
  def error(msg):
    sys.stderr.write("%s: error: %s\n" % (me, msg))
    sys.exit(1)
*************** class RegexCache(object):
*** 66,93 ****
  
  cache = RegexCache()
  
- def print_help_and_exit():
-     print """\
- Usage: %s [-i | --inline] [PATCH]
- Generate ChangeLog template for PATCH.
- PATCH must be generated using diff(1)'s -up or -cp options
- (or their equivalent in Subversion/git).
- 
- When PATCH is - or missing, read standard input.
- 
- When -i is used, prepends ChangeLog to PATCH.
- If PATCH is not stdin, modifies PATCH in-place, otherwise writes
- to stdout.
- """ % me
-     sys.exit(1)
- 
  def run(cmd, die_on_error):
    """Simple wrapper for Popen."""
    proc = Popen(cmd.split(' '), stderr = PIPE, stdout = PIPE)
    (out, err) = proc.communicate()
    if die_on_error and proc.returncode != 0:
      error("`%s` failed:\n" % (cmd, proc.stderr))
!   return proc.returncode, out, err
  
  def read_user_info():
    dot_mklog_format_msg = """\
--- 68,80 ----
  
  cache = RegexCache()
  
  def run(cmd, die_on_error):
    """Simple wrapper for Popen."""
    proc = Popen(cmd.split(' '), stderr = PIPE, stdout = PIPE)
    (out, err) = proc.communicate()
    if die_on_error and proc.returncode != 0:
      error("`%s` failed:\n" % (cmd, proc.stderr))
!   return proc.returncode, out.decode(), err
  
  def read_user_info():
    dot_mklog_format_msg = """\
*************** EMAIL = ...
*** 100,106 ****
    mklog_conf = os.path.expanduser('~/.mklog')
    if os.path.exists(mklog_conf):
      attrs = {}
!     f = open(mklog_conf, 'rb')
      for s in f:
        if cache.match(r'^\s*([a-zA-Z0-9_]+)\s*=\s*(.*?)\s*$', s):
          attrs[cache.group(1)] = cache.group(2)
--- 87,93 ----
    mklog_conf = os.path.expanduser('~/.mklog')
    if os.path.exists(mklog_conf):
      attrs = {}
!     f = open(mklog_conf)
      for s in f:
        if cache.match(r'^\s*([a-zA-Z0-9_]+)\s*=\s*(.*?)\s*$', s):
          attrs[cache.group(1)] = cache.group(2)
*************** class FileDiff:
*** 153,161 ****
      self.clname, self.relname = get_parent_changelog(filename);
  
    def dump(self):
!     print "Diff for %s:\n  ChangeLog = %s\n  rel name = %s\n" % (self.filename, self.clname, self.relname)
      for i, h in enumerate(self.hunks):
!       print "Next hunk %d:" % i
        h.dump()
  
  class Hunk:
--- 140,148 ----
      self.clname, self.relname = get_parent_changelog(filename);
  
    def dump(self):
!     print("Diff for %s:\n  ChangeLog = %s\n  rel name = %s\n" % (self.filename, self.clname, self.relname))
      for i, h in enumerate(self.hunks):
!       print("Next hunk %d:" % i)
        h.dump()
  
  class Hunk:
*************** class Hunk:
*** 167,174 ****
      self.ctx_diff = is_ctx_hunk_start(hdr)
  
    def dump(self):
!     print '%s' % self.hdr
!     print '%s' % '\n'.join(self.lines)
  
    def is_file_addition(self):
      """Does hunk describe addition of file?"""
--- 154,161 ----
      self.ctx_diff = is_ctx_hunk_start(hdr)
  
    def dump(self):
!     print('%s' % self.hdr)
!     print('%s' % '\n'.join(self.lines))
  
    def is_file_addition(self):
      """Does hunk describe addition of file?"""
*************** class Hunk:
*** 191,198 ****
  def is_file_diff_start(s):
    # Don't be fooled by context diff line markers:
    #   *** 385,391 ****
!   return ((s.startswith('***') and not s.endswith('***'))
!           or (s.startswith('---') and not s.endswith('---')))
  
  def is_ctx_hunk_start(s):
    return re.match(r'^\*\*\*\*\*\**', s)
--- 178,185 ----
  def is_file_diff_start(s):
    # Don't be fooled by context diff line markers:
    #   *** 385,391 ****
!   return ((s.startswith('*** ') and not s.endswith('***'))
!           or (s.startswith('--- ') and not s.endswith('---')))
  
  def is_ctx_hunk_start(s):
    return re.match(r'^\*\*\*\*\*\**', s)
*************** def parse_patch(contents):
*** 314,320 ****
          if l != r:
            break
          comps.append(l)
!     
        if not comps:
          error("failed to extract common name for %s and %s" % (left, right))
  
--- 301,307 ----
          if l != r:
            break
          comps.append(l)
! 
        if not comps:
          error("failed to extract common name for %s and %s" % (left, right))
  
*************** def parse_patch(contents):
*** 353,400 ****
  
    return diffs
  
- def main():
-   name, email = read_user_info()
  
!   try:
!     opts, args = getopt.getopt(sys.argv[1:], 'hiv', ['help', 'verbose', 'inline'])
!   except getopt.GetoptError, err:
!     error(str(err))
! 
!   inline = False
!   verbose = 0
! 
!   for o, a in opts:
!     if o in ('-h', '--help'):
!       print_help_and_exit()
!     elif o in ('-i', '--inline'):
!       inline = True
!     elif o in ('-v', '--verbose'):
!       verbose += 1
      else:
!       assert False, "unhandled option"
  
!   if len(args) == 0:
!     args = ['-']
  
!   if len(args) == 1 and args[0] == '-':
!     input = sys.stdin
!   elif len(args) == 1:
!     input = open(args[0], 'rb')
!   else:
!     error("too many arguments; for more details run with -h")
  
    contents = input.read()
    diffs = parse_patch(contents)
  
!   if verbose:
!     print "Parse results:"
      for d in diffs:
        d.dump()
  
    # Generate template ChangeLog.
  
    logs = {}
    for d in diffs:
      log_name = d.clname
  
--- 340,388 ----
  
    return diffs
  
  
! def get_pr_from_testcase(line):
!     r = pr_regex.search(line)
!     if r != None:
!         return r.group(3)
      else:
!         return None
  
! def main():
!   name, email = read_user_info()
  
!   help_message =  """\
! Generate ChangeLog template for PATCH.
! PATCH must be generated using diff(1)'s -up or -cp options
! (or their equivalent in Subversion/git).
! """
! 
!   inline_message = """\
! Prepends ChangeLog to PATCH.
! If PATCH is not stdin, modifies PATCH in-place,
! otherwise writes to stdout.'
! """
  
+   parser = argparse.ArgumentParser(description = help_message)
+   parser.add_argument('-v', '--verbose', action = 'store_true', help = 'Verbose messages')
+   parser.add_argument('-i', '--inline', action = 'store_true', help = inline_message)
+   parser.add_argument('input', nargs = '?', help = 'Patch file (or missing, read standard input)')
+   args = parser.parse_args()
+   if args.input == '-':
+       args.input = None
+   input = open(args.input) if args.input else sys.stdin
    contents = input.read()
    diffs = parse_patch(contents)
  
!   if args.verbose:
!     print("Parse results:")
      for d in diffs:
        d.dump()
  
    # Generate template ChangeLog.
  
    logs = {}
+   prs = []
    for d in diffs:
      log_name = d.clname
  
*************** def main():
*** 410,422 ****
        if hunk0.is_file_addition():
          if re.search(r'testsuite.*(?<!\.exp)$', d.filename):
            change_msg = ': New test.\n'
          else:
            change_msg = ": New file.\n"
        elif hunk0.is_file_removal():
          change_msg = ": Remove.\n"
  
      _, ext = os.path.splitext(d.filename)
!     if not change_msg and ext in ['.c', '.cpp', '.C', '.cc', '.h', '.inc', '.def']:
        fns = []
        for hunk in d.hunks:
          for fn in find_changed_funs(hunk):
--- 398,414 ----
        if hunk0.is_file_addition():
          if re.search(r'testsuite.*(?<!\.exp)$', d.filename):
            change_msg = ': New test.\n'
+           pr = get_pr_from_testcase(hunk0.lines[0])
+           if pr and pr not in prs:
+               prs.append(pr)
          else:
            change_msg = ": New file.\n"
        elif hunk0.is_file_removal():
          change_msg = ": Remove.\n"
  
      _, ext = os.path.splitext(d.filename)
!     if (not change_msg and ext in ['.c', '.cpp', '.C', '.cc', '.h', '.inc', '.def']
!         and not 'testsuite' in d.filename):
        fns = []
        for hunk in d.hunks:
          for fn in find_changed_funs(hunk):
*************** def main():
*** 431,437 ****
  
      logs[log_name] += change_msg if change_msg else ":\n"
  
!   if inline and args[0] != '-':
      # Get a temp filename, rather than an open filehandle, because we use
      # the open to truncate.
      fd, tmp = tempfile.mkstemp("tmp.XXXXXXXX")
--- 423,429 ----
  
      logs[log_name] += change_msg if change_msg else ":\n"
  
!   if args.inline and args.input:
      # Get a temp filename, rather than an open filehandle, because we use
      # the open to truncate.
      fd, tmp = tempfile.mkstemp("tmp.XXXXXXXX")
*************** def main():
*** 439,470 ****
  
      # Copy permissions to temp file
      # (old Pythons do not support shutil.copymode)
!     shutil.copymode(args[0], tmp)
  
      # Open the temp file, clearing contents.
!     out = open(tmp, 'wb')
    else:
      tmp = None
      out = sys.stdout
  
    # Print log
    date = time.strftime('%Y-%m-%d')
!   for log_name, msg in sorted(logs.iteritems()):
      out.write("""\
  %s:
  
  %s  %s  <%s>
  
! %s\n""" % (log_name, date, name, email, msg))
  
!   if inline:
      # Append patch body
      out.write(contents)
  
!     if args[0] != '-':
        # Write new contents atomically
        out.close()
!       shutil.move(tmp, args[0])
  
  if __name__ == '__main__':
      main()
--- 431,466 ----
  
      # Copy permissions to temp file
      # (old Pythons do not support shutil.copymode)
!     shutil.copymode(args.input, tmp)
  
      # Open the temp file, clearing contents.
!     out = open(tmp, 'w')
    else:
      tmp = None
      out = sys.stdout
  
    # Print log
    date = time.strftime('%Y-%m-%d')
!   bugmsg = ''
!   if len(prs):
!     bugmsg = '\n'.join(['\t' + pr for pr in prs]) + '\n'
! 
!   for log_name, msg in sorted(logs.items()):
      out.write("""\
  %s:
  
  %s  %s  <%s>
  
! %s%s\n""" % (log_name, date, name, email, bugmsg, msg))
  
!   if args.inline:
      # Append patch body
      out.write(contents)
  
!     if args.input:
        # Write new contents atomically
        out.close()
!       shutil.move(tmp, args.input)
  
  if __name__ == '__main__':
      main()
diff -Nrcpad gcc-9.3.0/contrib/reghunt/ChangeLog gcc-10.1.0/contrib/reghunt/ChangeLog
*** gcc-9.3.0/contrib/reghunt/ChangeLog	Thu Mar 12 11:08:03 2020
--- gcc-10.1.0/contrib/reghunt/ChangeLog	Thu May  7 10:50:32 2020
***************
*** 1,14 ****
! 2020-03-12  Release Manager
! 
! 	* GCC 9.3.0 released.
! 
! 2019-08-12  Release Manager
! 
! 	* GCC 9.2.0 released.
! 
! 2019-05-03  Release Manager
  
! 	* GCC 9.1.0 released.
  
  2010-06-27  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  
--- 1,6 ----
! 2020-05-07  Release Manager
  
! 	* GCC 10.1.0 released.
  
  2010-06-27  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  
diff -Nrcpad gcc-9.3.0/contrib/regression/ChangeLog gcc-10.1.0/contrib/regression/ChangeLog
*** gcc-9.3.0/contrib/regression/ChangeLog	Thu Mar 12 11:08:03 2020
--- gcc-10.1.0/contrib/regression/ChangeLog	Thu May  7 10:50:32 2020
***************
*** 1,14 ****
! 2020-03-12  Release Manager
! 
! 	* GCC 9.3.0 released.
! 
! 2019-08-12  Release Manager
! 
! 	* GCC 9.2.0 released.
! 
! 2019-05-03  Release Manager
  
! 	* GCC 9.1.0 released.
  
  2012-08-26  Hans-Peter Nilsson  <hp@axis.com>
  
--- 1,6 ----
! 2020-05-07  Release Manager
  
! 	* GCC 10.1.0 released.
  
  2012-08-26  Hans-Peter Nilsson  <hp@axis.com>
  
diff -Nrcpad gcc-9.3.0/contrib/texi2pod.pl gcc-10.1.0/contrib/texi2pod.pl
*** gcc-9.3.0/contrib/texi2pod.pl	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/texi2pod.pl	Thu May  7 10:49:59 2020
*************** while(<$inf>) {
*** 164,169 ****
--- 164,170 ----
  	    $ic = pop @icstack;
  	} elsif ($ended eq "multitable") {
  	    $_ = "\n=back\n";
+ 	    $ic = pop @icstack;
  	} else {
  	    die "unknown command \@end $ended at line $.\n";
  	}
*************** while(<$inf>) {
*** 288,294 ****
--- 289,297 ----
  
      /^\@multitable\s.*/ and do {
  	push @endwstack, $endw;
+ 	push @icstack, $ic;
  	$endw = "multitable";
+ 	$ic = "";
  	$_ = "\n=over 4\n";
      };
  
*************** while(<$inf>) {
*** 312,322 ****
  	$_ = "";	# need a paragraph break
      };
  
!     /^\@item\s+(.*\S)\s*$/ and $endw eq "multitable" and do {
  	@columns = ();
! 	for $column (split (/\s*\@tab\s*/, $1)) {
  	    # @strong{...} is used a @headitem work-alike
  	    $column =~ s/^\@strong\{(.*)\}$/$1/;
  	    push @columns, $column;
  	}
  	$_ = "\n=item ".join (" : ", @columns)."\n";
--- 315,327 ----
  	$_ = "";	# need a paragraph break
      };
  
!     /^\@(headitem|item)\s+(.*\S)\s*$/ and $endw eq "multitable" and do {
  	@columns = ();
! 	$item = $1;
! 	for $column (split (/\s*\@tab\s*/, $2)) {
  	    # @strong{...} is used a @headitem work-alike
  	    $column =~ s/^\@strong\{(.*)\}$/$1/;
+ 	    $column = "I<$column>" if $item eq "headitem";
  	    push @columns, $column;
  	}
  	$_ = "\n=item ".join (" : ", @columns)."\n";
diff -Nrcpad gcc-9.3.0/contrib/unicode/EastAsianWidth.txt gcc-10.1.0/contrib/unicode/EastAsianWidth.txt
*** gcc-9.3.0/contrib/unicode/EastAsianWidth.txt	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/unicode/EastAsianWidth.txt	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,2473 ----
+ # EastAsianWidth-12.1.0.txt
+ # Date: 2019-03-31, 22:01:58 GMT [KW, LI]
+ # © 2019 Unicode®, Inc.
+ # Unicode and the Unicode Logo are registered trademarks of Unicode, Inc. in the U.S. and other countries.
+ # For terms of use, see http://www.unicode.org/terms_of_use.html
+ #
+ # Unicode Character Database
+ # For documentation, see http://www.unicode.org/reports/tr44/
+ #
+ # East_Asian_Width Property
+ #
+ # This file is an informative contributory data file in the
+ # Unicode Character Database.
+ #
+ # The format is two fields separated by a semicolon.
+ # Field 0: Unicode code point value or range of code point values
+ # Field 1: East_Asian_Width property, consisting of one of the following values:
+ #         "A", "F", "H", "N", "Na", "W"
+ #  - All code points, assigned or unassigned, that are not listed
+ #      explicitly are given the value "N".
+ #  - The unassigned code points in the following blocks default to "W":
+ #         CJK Unified Ideographs Extension A: U+3400..U+4DBF
+ #         CJK Unified Ideographs:             U+4E00..U+9FFF
+ #         CJK Compatibility Ideographs:       U+F900..U+FAFF
+ #  - All undesignated code points in Planes 2 and 3, whether inside or
+ #      outside of allocated blocks, default to "W":
+ #         Plane 2:                            U+20000..U+2FFFD
+ #         Plane 3:                            U+30000..U+3FFFD
+ #
+ # Character ranges are specified as for other property files in the
+ # Unicode Character Database.
+ #
+ # For legacy reasons, there are no spaces before or after the semicolon
+ # which separates the two fields. The comments following the number sign
+ # "#" list the General_Category property value or the L& alias of the
+ # derived value LC, the Unicode character name or names, and, in lines
+ # with ranges of code points, the code point count in square brackets.
+ #
+ # For more information, see UAX #11: East Asian Width,
+ # at http://www.unicode.org/reports/tr11/
+ #
+ # @missing: 0000..10FFFF; N
+ 0000..001F;N     # Cc    [32] <control-0000>..<control-001F>
+ 0020;Na          # Zs         SPACE
+ 0021..0023;Na    # Po     [3] EXCLAMATION MARK..NUMBER SIGN
+ 0024;Na          # Sc         DOLLAR SIGN
+ 0025..0027;Na    # Po     [3] PERCENT SIGN..APOSTROPHE
+ 0028;Na          # Ps         LEFT PARENTHESIS
+ 0029;Na          # Pe         RIGHT PARENTHESIS
+ 002A;Na          # Po         ASTERISK
+ 002B;Na          # Sm         PLUS SIGN
+ 002C;Na          # Po         COMMA
+ 002D;Na          # Pd         HYPHEN-MINUS
+ 002E..002F;Na    # Po     [2] FULL STOP..SOLIDUS
+ 0030..0039;Na    # Nd    [10] DIGIT ZERO..DIGIT NINE
+ 003A..003B;Na    # Po     [2] COLON..SEMICOLON
+ 003C..003E;Na    # Sm     [3] LESS-THAN SIGN..GREATER-THAN SIGN
+ 003F..0040;Na    # Po     [2] QUESTION MARK..COMMERCIAL AT
+ 0041..005A;Na    # Lu    [26] LATIN CAPITAL LETTER A..LATIN CAPITAL LETTER Z
+ 005B;Na          # Ps         LEFT SQUARE BRACKET
+ 005C;Na          # Po         REVERSE SOLIDUS
+ 005D;Na          # Pe         RIGHT SQUARE BRACKET
+ 005E;Na          # Sk         CIRCUMFLEX ACCENT
+ 005F;Na          # Pc         LOW LINE
+ 0060;Na          # Sk         GRAVE ACCENT
+ 0061..007A;Na    # Ll    [26] LATIN SMALL LETTER A..LATIN SMALL LETTER Z
+ 007B;Na          # Ps         LEFT CURLY BRACKET
+ 007C;Na          # Sm         VERTICAL LINE
+ 007D;Na          # Pe         RIGHT CURLY BRACKET
+ 007E;Na          # Sm         TILDE
+ 007F;N           # Cc         <control-007F>
+ 0080..009F;N     # Cc    [32] <control-0080>..<control-009F>
+ 00A0;N           # Zs         NO-BREAK SPACE
+ 00A1;A           # Po         INVERTED EXCLAMATION MARK
+ 00A2..00A3;Na    # Sc     [2] CENT SIGN..POUND SIGN
+ 00A4;A           # Sc         CURRENCY SIGN
+ 00A5;Na          # Sc         YEN SIGN
+ 00A6;Na          # So         BROKEN BAR
+ 00A7;A           # Po         SECTION SIGN
+ 00A8;A           # Sk         DIAERESIS
+ 00A9;N           # So         COPYRIGHT SIGN
+ 00AA;A           # Lo         FEMININE ORDINAL INDICATOR
+ 00AB;N           # Pi         LEFT-POINTING DOUBLE ANGLE QUOTATION MARK
+ 00AC;Na          # Sm         NOT SIGN
+ 00AD;A           # Cf         SOFT HYPHEN
+ 00AE;A           # So         REGISTERED SIGN
+ 00AF;Na          # Sk         MACRON
+ 00B0;A           # So         DEGREE SIGN
+ 00B1;A           # Sm         PLUS-MINUS SIGN
+ 00B2..00B3;A     # No     [2] SUPERSCRIPT TWO..SUPERSCRIPT THREE
+ 00B4;A           # Sk         ACUTE ACCENT
+ 00B5;N           # Ll         MICRO SIGN
+ 00B6..00B7;A     # Po     [2] PILCROW SIGN..MIDDLE DOT
+ 00B8;A           # Sk         CEDILLA
+ 00B9;A           # No         SUPERSCRIPT ONE
+ 00BA;A           # Lo         MASCULINE ORDINAL INDICATOR
+ 00BB;N           # Pf         RIGHT-POINTING DOUBLE ANGLE QUOTATION MARK
+ 00BC..00BE;A     # No     [3] VULGAR FRACTION ONE QUARTER..VULGAR FRACTION THREE QUARTERS
+ 00BF;A           # Po         INVERTED QUESTION MARK
+ 00C0..00C5;N     # Lu     [6] LATIN CAPITAL LETTER A WITH GRAVE..LATIN CAPITAL LETTER A WITH RING ABOVE
+ 00C6;A           # Lu         LATIN CAPITAL LETTER AE
+ 00C7..00CF;N     # Lu     [9] LATIN CAPITAL LETTER C WITH CEDILLA..LATIN CAPITAL LETTER I WITH DIAERESIS
+ 00D0;A           # Lu         LATIN CAPITAL LETTER ETH
+ 00D1..00D6;N     # Lu     [6] LATIN CAPITAL LETTER N WITH TILDE..LATIN CAPITAL LETTER O WITH DIAERESIS
+ 00D7;A           # Sm         MULTIPLICATION SIGN
+ 00D8;A           # Lu         LATIN CAPITAL LETTER O WITH STROKE
+ 00D9..00DD;N     # Lu     [5] LATIN CAPITAL LETTER U WITH GRAVE..LATIN CAPITAL LETTER Y WITH ACUTE
+ 00DE..00E1;A     # L&     [4] LATIN CAPITAL LETTER THORN..LATIN SMALL LETTER A WITH ACUTE
+ 00E2..00E5;N     # Ll     [4] LATIN SMALL LETTER A WITH CIRCUMFLEX..LATIN SMALL LETTER A WITH RING ABOVE
+ 00E6;A           # Ll         LATIN SMALL LETTER AE
+ 00E7;N           # Ll         LATIN SMALL LETTER C WITH CEDILLA
+ 00E8..00EA;A     # Ll     [3] LATIN SMALL LETTER E WITH GRAVE..LATIN SMALL LETTER E WITH CIRCUMFLEX
+ 00EB;N           # Ll         LATIN SMALL LETTER E WITH DIAERESIS
+ 00EC..00ED;A     # Ll     [2] LATIN SMALL LETTER I WITH GRAVE..LATIN SMALL LETTER I WITH ACUTE
+ 00EE..00EF;N     # Ll     [2] LATIN SMALL LETTER I WITH CIRCUMFLEX..LATIN SMALL LETTER I WITH DIAERESIS
+ 00F0;A           # Ll         LATIN SMALL LETTER ETH
+ 00F1;N           # Ll         LATIN SMALL LETTER N WITH TILDE
+ 00F2..00F3;A     # Ll     [2] LATIN SMALL LETTER O WITH GRAVE..LATIN SMALL LETTER O WITH ACUTE
+ 00F4..00F6;N     # Ll     [3] LATIN SMALL LETTER O WITH CIRCUMFLEX..LATIN SMALL LETTER O WITH DIAERESIS
+ 00F7;A           # Sm         DIVISION SIGN
+ 00F8..00FA;A     # Ll     [3] LATIN SMALL LETTER O WITH STROKE..LATIN SMALL LETTER U WITH ACUTE
+ 00FB;N           # Ll         LATIN SMALL LETTER U WITH CIRCUMFLEX
+ 00FC;A           # Ll         LATIN SMALL LETTER U WITH DIAERESIS
+ 00FD;N           # Ll         LATIN SMALL LETTER Y WITH ACUTE
+ 00FE;A           # Ll         LATIN SMALL LETTER THORN
+ 00FF;N           # Ll         LATIN SMALL LETTER Y WITH DIAERESIS
+ 0100;N           # Lu         LATIN CAPITAL LETTER A WITH MACRON
+ 0101;A           # Ll         LATIN SMALL LETTER A WITH MACRON
+ 0102..0110;N     # L&    [15] LATIN CAPITAL LETTER A WITH BREVE..LATIN CAPITAL LETTER D WITH STROKE
+ 0111;A           # Ll         LATIN SMALL LETTER D WITH STROKE
+ 0112;N           # Lu         LATIN CAPITAL LETTER E WITH MACRON
+ 0113;A           # Ll         LATIN SMALL LETTER E WITH MACRON
+ 0114..011A;N     # L&     [7] LATIN CAPITAL LETTER E WITH BREVE..LATIN CAPITAL LETTER E WITH CARON
+ 011B;A           # Ll         LATIN SMALL LETTER E WITH CARON
+ 011C..0125;N     # L&    [10] LATIN CAPITAL LETTER G WITH CIRCUMFLEX..LATIN SMALL LETTER H WITH CIRCUMFLEX
+ 0126..0127;A     # L&     [2] LATIN CAPITAL LETTER H WITH STROKE..LATIN SMALL LETTER H WITH STROKE
+ 0128..012A;N     # L&     [3] LATIN CAPITAL LETTER I WITH TILDE..LATIN CAPITAL LETTER I WITH MACRON
+ 012B;A           # Ll         LATIN SMALL LETTER I WITH MACRON
+ 012C..0130;N     # L&     [5] LATIN CAPITAL LETTER I WITH BREVE..LATIN CAPITAL LETTER I WITH DOT ABOVE
+ 0131..0133;A     # L&     [3] LATIN SMALL LETTER DOTLESS I..LATIN SMALL LIGATURE IJ
+ 0134..0137;N     # L&     [4] LATIN CAPITAL LETTER J WITH CIRCUMFLEX..LATIN SMALL LETTER K WITH CEDILLA
+ 0138;A           # Ll         LATIN SMALL LETTER KRA
+ 0139..013E;N     # L&     [6] LATIN CAPITAL LETTER L WITH ACUTE..LATIN SMALL LETTER L WITH CARON
+ 013F..0142;A     # L&     [4] LATIN CAPITAL LETTER L WITH MIDDLE DOT..LATIN SMALL LETTER L WITH STROKE
+ 0143;N           # Lu         LATIN CAPITAL LETTER N WITH ACUTE
+ 0144;A           # Ll         LATIN SMALL LETTER N WITH ACUTE
+ 0145..0147;N     # L&     [3] LATIN CAPITAL LETTER N WITH CEDILLA..LATIN CAPITAL LETTER N WITH CARON
+ 0148..014B;A     # L&     [4] LATIN SMALL LETTER N WITH CARON..LATIN SMALL LETTER ENG
+ 014C;N           # Lu         LATIN CAPITAL LETTER O WITH MACRON
+ 014D;A           # Ll         LATIN SMALL LETTER O WITH MACRON
+ 014E..0151;N     # L&     [4] LATIN CAPITAL LETTER O WITH BREVE..LATIN SMALL LETTER O WITH DOUBLE ACUTE
+ 0152..0153;A     # L&     [2] LATIN CAPITAL LIGATURE OE..LATIN SMALL LIGATURE OE
+ 0154..0165;N     # L&    [18] LATIN CAPITAL LETTER R WITH ACUTE..LATIN SMALL LETTER T WITH CARON
+ 0166..0167;A     # L&     [2] LATIN CAPITAL LETTER T WITH STROKE..LATIN SMALL LETTER T WITH STROKE
+ 0168..016A;N     # L&     [3] LATIN CAPITAL LETTER U WITH TILDE..LATIN CAPITAL LETTER U WITH MACRON
+ 016B;A           # Ll         LATIN SMALL LETTER U WITH MACRON
+ 016C..017F;N     # L&    [20] LATIN CAPITAL LETTER U WITH BREVE..LATIN SMALL LETTER LONG S
+ 0180..01BA;N     # L&    [59] LATIN SMALL LETTER B WITH STROKE..LATIN SMALL LETTER EZH WITH TAIL
+ 01BB;N           # Lo         LATIN LETTER TWO WITH STROKE
+ 01BC..01BF;N     # L&     [4] LATIN CAPITAL LETTER TONE FIVE..LATIN LETTER WYNN
+ 01C0..01C3;N     # Lo     [4] LATIN LETTER DENTAL CLICK..LATIN LETTER RETROFLEX CLICK
+ 01C4..01CD;N     # L&    [10] LATIN CAPITAL LETTER DZ WITH CARON..LATIN CAPITAL LETTER A WITH CARON
+ 01CE;A           # Ll         LATIN SMALL LETTER A WITH CARON
+ 01CF;N           # Lu         LATIN CAPITAL LETTER I WITH CARON
+ 01D0;A           # Ll         LATIN SMALL LETTER I WITH CARON
+ 01D1;N           # Lu         LATIN CAPITAL LETTER O WITH CARON
+ 01D2;A           # Ll         LATIN SMALL LETTER O WITH CARON
+ 01D3;N           # Lu         LATIN CAPITAL LETTER U WITH CARON
+ 01D4;A           # Ll         LATIN SMALL LETTER U WITH CARON
+ 01D5;N           # Lu         LATIN CAPITAL LETTER U WITH DIAERESIS AND MACRON
+ 01D6;A           # Ll         LATIN SMALL LETTER U WITH DIAERESIS AND MACRON
+ 01D7;N           # Lu         LATIN CAPITAL LETTER U WITH DIAERESIS AND ACUTE
+ 01D8;A           # Ll         LATIN SMALL LETTER U WITH DIAERESIS AND ACUTE
+ 01D9;N           # Lu         LATIN CAPITAL LETTER U WITH DIAERESIS AND CARON
+ 01DA;A           # Ll         LATIN SMALL LETTER U WITH DIAERESIS AND CARON
+ 01DB;N           # Lu         LATIN CAPITAL LETTER U WITH DIAERESIS AND GRAVE
+ 01DC;A           # Ll         LATIN SMALL LETTER U WITH DIAERESIS AND GRAVE
+ 01DD..024F;N     # L&   [115] LATIN SMALL LETTER TURNED E..LATIN SMALL LETTER Y WITH STROKE
+ 0250;N           # Ll         LATIN SMALL LETTER TURNED A
+ 0251;A           # Ll         LATIN SMALL LETTER ALPHA
+ 0252..0260;N     # Ll    [15] LATIN SMALL LETTER TURNED ALPHA..LATIN SMALL LETTER G WITH HOOK
+ 0261;A           # Ll         LATIN SMALL LETTER SCRIPT G
+ 0262..0293;N     # Ll    [50] LATIN LETTER SMALL CAPITAL G..LATIN SMALL LETTER EZH WITH CURL
+ 0294;N           # Lo         LATIN LETTER GLOTTAL STOP
+ 0295..02AF;N     # Ll    [27] LATIN LETTER PHARYNGEAL VOICED FRICATIVE..LATIN SMALL LETTER TURNED H WITH FISHHOOK AND TAIL
+ 02B0..02C1;N     # Lm    [18] MODIFIER LETTER SMALL H..MODIFIER LETTER REVERSED GLOTTAL STOP
+ 02C2..02C3;N     # Sk     [2] MODIFIER LETTER LEFT ARROWHEAD..MODIFIER LETTER RIGHT ARROWHEAD
+ 02C4;A           # Sk         MODIFIER LETTER UP ARROWHEAD
+ 02C5;N           # Sk         MODIFIER LETTER DOWN ARROWHEAD
+ 02C6;N           # Lm         MODIFIER LETTER CIRCUMFLEX ACCENT
+ 02C7;A           # Lm         CARON
+ 02C8;N           # Lm         MODIFIER LETTER VERTICAL LINE
+ 02C9..02CB;A     # Lm     [3] MODIFIER LETTER MACRON..MODIFIER LETTER GRAVE ACCENT
+ 02CC;N           # Lm         MODIFIER LETTER LOW VERTICAL LINE
+ 02CD;A           # Lm         MODIFIER LETTER LOW MACRON
+ 02CE..02CF;N     # Lm     [2] MODIFIER LETTER LOW GRAVE ACCENT..MODIFIER LETTER LOW ACUTE ACCENT
+ 02D0;A           # Lm         MODIFIER LETTER TRIANGULAR COLON
+ 02D1;N           # Lm         MODIFIER LETTER HALF TRIANGULAR COLON
+ 02D2..02D7;N     # Sk     [6] MODIFIER LETTER CENTRED RIGHT HALF RING..MODIFIER LETTER MINUS SIGN
+ 02D8..02DB;A     # Sk     [4] BREVE..OGONEK
+ 02DC;N           # Sk         SMALL TILDE
+ 02DD;A           # Sk         DOUBLE ACUTE ACCENT
+ 02DE;N           # Sk         MODIFIER LETTER RHOTIC HOOK
+ 02DF;A           # Sk         MODIFIER LETTER CROSS ACCENT
+ 02E0..02E4;N     # Lm     [5] MODIFIER LETTER SMALL GAMMA..MODIFIER LETTER SMALL REVERSED GLOTTAL STOP
+ 02E5..02EB;N     # Sk     [7] MODIFIER LETTER EXTRA-HIGH TONE BAR..MODIFIER LETTER YANG DEPARTING TONE MARK
+ 02EC;N           # Lm         MODIFIER LETTER VOICING
+ 02ED;N           # Sk         MODIFIER LETTER UNASPIRATED
+ 02EE;N           # Lm         MODIFIER LETTER DOUBLE APOSTROPHE
+ 02EF..02FF;N     # Sk    [17] MODIFIER LETTER LOW DOWN ARROWHEAD..MODIFIER LETTER LOW LEFT ARROW
+ 0300..036F;A     # Mn   [112] COMBINING GRAVE ACCENT..COMBINING LATIN SMALL LETTER X
+ 0370..0373;N     # L&     [4] GREEK CAPITAL LETTER HETA..GREEK SMALL LETTER ARCHAIC SAMPI
+ 0374;N           # Lm         GREEK NUMERAL SIGN
+ 0375;N           # Sk         GREEK LOWER NUMERAL SIGN
+ 0376..0377;N     # L&     [2] GREEK CAPITAL LETTER PAMPHYLIAN DIGAMMA..GREEK SMALL LETTER PAMPHYLIAN DIGAMMA
+ 037A;N           # Lm         GREEK YPOGEGRAMMENI
+ 037B..037D;N     # Ll     [3] GREEK SMALL REVERSED LUNATE SIGMA SYMBOL..GREEK SMALL REVERSED DOTTED LUNATE SIGMA SYMBOL
+ 037E;N           # Po         GREEK QUESTION MARK
+ 037F;N           # Lu         GREEK CAPITAL LETTER YOT
+ 0384..0385;N     # Sk     [2] GREEK TONOS..GREEK DIALYTIKA TONOS
+ 0386;N           # Lu         GREEK CAPITAL LETTER ALPHA WITH TONOS
+ 0387;N           # Po         GREEK ANO TELEIA
+ 0388..038A;N     # Lu     [3] GREEK CAPITAL LETTER EPSILON WITH TONOS..GREEK CAPITAL LETTER IOTA WITH TONOS
+ 038C;N           # Lu         GREEK CAPITAL LETTER OMICRON WITH TONOS
+ 038E..0390;N     # L&     [3] GREEK CAPITAL LETTER UPSILON WITH TONOS..GREEK SMALL LETTER IOTA WITH DIALYTIKA AND TONOS
+ 0391..03A1;A     # Lu    [17] GREEK CAPITAL LETTER ALPHA..GREEK CAPITAL LETTER RHO
+ 03A3..03A9;A     # Lu     [7] GREEK CAPITAL LETTER SIGMA..GREEK CAPITAL LETTER OMEGA
+ 03AA..03B0;N     # L&     [7] GREEK CAPITAL LETTER IOTA WITH DIALYTIKA..GREEK SMALL LETTER UPSILON WITH DIALYTIKA AND TONOS
+ 03B1..03C1;A     # Ll    [17] GREEK SMALL LETTER ALPHA..GREEK SMALL LETTER RHO
+ 03C2;N           # Ll         GREEK SMALL LETTER FINAL SIGMA
+ 03C3..03C9;A     # Ll     [7] GREEK SMALL LETTER SIGMA..GREEK SMALL LETTER OMEGA
+ 03CA..03F5;N     # L&    [44] GREEK SMALL LETTER IOTA WITH DIALYTIKA..GREEK LUNATE EPSILON SYMBOL
+ 03F6;N           # Sm         GREEK REVERSED LUNATE EPSILON SYMBOL
+ 03F7..03FF;N     # L&     [9] GREEK CAPITAL LETTER SHO..GREEK CAPITAL REVERSED DOTTED LUNATE SIGMA SYMBOL
+ 0400;N           # Lu         CYRILLIC CAPITAL LETTER IE WITH GRAVE
+ 0401;A           # Lu         CYRILLIC CAPITAL LETTER IO
+ 0402..040F;N     # Lu    [14] CYRILLIC CAPITAL LETTER DJE..CYRILLIC CAPITAL LETTER DZHE
+ 0410..044F;A     # L&    [64] CYRILLIC CAPITAL LETTER A..CYRILLIC SMALL LETTER YA
+ 0450;N           # Ll         CYRILLIC SMALL LETTER IE WITH GRAVE
+ 0451;A           # Ll         CYRILLIC SMALL LETTER IO
+ 0452..0481;N     # L&    [48] CYRILLIC SMALL LETTER DJE..CYRILLIC SMALL LETTER KOPPA
+ 0482;N           # So         CYRILLIC THOUSANDS SIGN
+ 0483..0487;N     # Mn     [5] COMBINING CYRILLIC TITLO..COMBINING CYRILLIC POKRYTIE
+ 0488..0489;N     # Me     [2] COMBINING CYRILLIC HUNDRED THOUSANDS SIGN..COMBINING CYRILLIC MILLIONS SIGN
+ 048A..04FF;N     # L&   [118] CYRILLIC CAPITAL LETTER SHORT I WITH TAIL..CYRILLIC SMALL LETTER HA WITH STROKE
+ 0500..052F;N     # L&    [48] CYRILLIC CAPITAL LETTER KOMI DE..CYRILLIC SMALL LETTER EL WITH DESCENDER
+ 0531..0556;N     # Lu    [38] ARMENIAN CAPITAL LETTER AYB..ARMENIAN CAPITAL LETTER FEH
+ 0559;N           # Lm         ARMENIAN MODIFIER LETTER LEFT HALF RING
+ 055A..055F;N     # Po     [6] ARMENIAN APOSTROPHE..ARMENIAN ABBREVIATION MARK
+ 0560..0588;N     # Ll    [41] ARMENIAN SMALL LETTER TURNED AYB..ARMENIAN SMALL LETTER YI WITH STROKE
+ 0589;N           # Po         ARMENIAN FULL STOP
+ 058A;N           # Pd         ARMENIAN HYPHEN
+ 058D..058E;N     # So     [2] RIGHT-FACING ARMENIAN ETERNITY SIGN..LEFT-FACING ARMENIAN ETERNITY SIGN
+ 058F;N           # Sc         ARMENIAN DRAM SIGN
+ 0591..05BD;N     # Mn    [45] HEBREW ACCENT ETNAHTA..HEBREW POINT METEG
+ 05BE;N           # Pd         HEBREW PUNCTUATION MAQAF
+ 05BF;N           # Mn         HEBREW POINT RAFE
+ 05C0;N           # Po         HEBREW PUNCTUATION PASEQ
+ 05C1..05C2;N     # Mn     [2] HEBREW POINT SHIN DOT..HEBREW POINT SIN DOT
+ 05C3;N           # Po         HEBREW PUNCTUATION SOF PASUQ
+ 05C4..05C5;N     # Mn     [2] HEBREW MARK UPPER DOT..HEBREW MARK LOWER DOT
+ 05C6;N           # Po         HEBREW PUNCTUATION NUN HAFUKHA
+ 05C7;N           # Mn         HEBREW POINT QAMATS QATAN
+ 05D0..05EA;N     # Lo    [27] HEBREW LETTER ALEF..HEBREW LETTER TAV
+ 05EF..05F2;N     # Lo     [4] HEBREW YOD TRIANGLE..HEBREW LIGATURE YIDDISH DOUBLE YOD
+ 05F3..05F4;N     # Po     [2] HEBREW PUNCTUATION GERESH..HEBREW PUNCTUATION GERSHAYIM
+ 0600..0605;N     # Cf     [6] ARABIC NUMBER SIGN..ARABIC NUMBER MARK ABOVE
+ 0606..0608;N     # Sm     [3] ARABIC-INDIC CUBE ROOT..ARABIC RAY
+ 0609..060A;N     # Po     [2] ARABIC-INDIC PER MILLE SIGN..ARABIC-INDIC PER TEN THOUSAND SIGN
+ 060B;N           # Sc         AFGHANI SIGN
+ 060C..060D;N     # Po     [2] ARABIC COMMA..ARABIC DATE SEPARATOR
+ 060E..060F;N     # So     [2] ARABIC POETIC VERSE SIGN..ARABIC SIGN MISRA
+ 0610..061A;N     # Mn    [11] ARABIC SIGN SALLALLAHOU ALAYHE WASSALLAM..ARABIC SMALL KASRA
+ 061B;N           # Po         ARABIC SEMICOLON
+ 061C;N           # Cf         ARABIC LETTER MARK
+ 061E..061F;N     # Po     [2] ARABIC TRIPLE DOT PUNCTUATION MARK..ARABIC QUESTION MARK
+ 0620..063F;N     # Lo    [32] ARABIC LETTER KASHMIRI YEH..ARABIC LETTER FARSI YEH WITH THREE DOTS ABOVE
+ 0640;N           # Lm         ARABIC TATWEEL
+ 0641..064A;N     # Lo    [10] ARABIC LETTER FEH..ARABIC LETTER YEH
+ 064B..065F;N     # Mn    [21] ARABIC FATHATAN..ARABIC WAVY HAMZA BELOW
+ 0660..0669;N     # Nd    [10] ARABIC-INDIC DIGIT ZERO..ARABIC-INDIC DIGIT NINE
+ 066A..066D;N     # Po     [4] ARABIC PERCENT SIGN..ARABIC FIVE POINTED STAR
+ 066E..066F;N     # Lo     [2] ARABIC LETTER DOTLESS BEH..ARABIC LETTER DOTLESS QAF
+ 0670;N           # Mn         ARABIC LETTER SUPERSCRIPT ALEF
+ 0671..06D3;N     # Lo    [99] ARABIC LETTER ALEF WASLA..ARABIC LETTER YEH BARREE WITH HAMZA ABOVE
+ 06D4;N           # Po         ARABIC FULL STOP
+ 06D5;N           # Lo         ARABIC LETTER AE
+ 06D6..06DC;N     # Mn     [7] ARABIC SMALL HIGH LIGATURE SAD WITH LAM WITH ALEF MAKSURA..ARABIC SMALL HIGH SEEN
+ 06DD;N           # Cf         ARABIC END OF AYAH
+ 06DE;N           # So         ARABIC START OF RUB EL HIZB
+ 06DF..06E4;N     # Mn     [6] ARABIC SMALL HIGH ROUNDED ZERO..ARABIC SMALL HIGH MADDA
+ 06E5..06E6;N     # Lm     [2] ARABIC SMALL WAW..ARABIC SMALL YEH
+ 06E7..06E8;N     # Mn     [2] ARABIC SMALL HIGH YEH..ARABIC SMALL HIGH NOON
+ 06E9;N           # So         ARABIC PLACE OF SAJDAH
+ 06EA..06ED;N     # Mn     [4] ARABIC EMPTY CENTRE LOW STOP..ARABIC SMALL LOW MEEM
+ 06EE..06EF;N     # Lo     [2] ARABIC LETTER DAL WITH INVERTED V..ARABIC LETTER REH WITH INVERTED V
+ 06F0..06F9;N     # Nd    [10] EXTENDED ARABIC-INDIC DIGIT ZERO..EXTENDED ARABIC-INDIC DIGIT NINE
+ 06FA..06FC;N     # Lo     [3] ARABIC LETTER SHEEN WITH DOT BELOW..ARABIC LETTER GHAIN WITH DOT BELOW
+ 06FD..06FE;N     # So     [2] ARABIC SIGN SINDHI AMPERSAND..ARABIC SIGN SINDHI POSTPOSITION MEN
+ 06FF;N           # Lo         ARABIC LETTER HEH WITH INVERTED V
+ 0700..070D;N     # Po    [14] SYRIAC END OF PARAGRAPH..SYRIAC HARKLEAN ASTERISCUS
+ 070F;N           # Cf         SYRIAC ABBREVIATION MARK
+ 0710;N           # Lo         SYRIAC LETTER ALAPH
+ 0711;N           # Mn         SYRIAC LETTER SUPERSCRIPT ALAPH
+ 0712..072F;N     # Lo    [30] SYRIAC LETTER BETH..SYRIAC LETTER PERSIAN DHALATH
+ 0730..074A;N     # Mn    [27] SYRIAC PTHAHA ABOVE..SYRIAC BARREKH
+ 074D..074F;N     # Lo     [3] SYRIAC LETTER SOGDIAN ZHAIN..SYRIAC LETTER SOGDIAN FE
+ 0750..077F;N     # Lo    [48] ARABIC LETTER BEH WITH THREE DOTS HORIZONTALLY BELOW..ARABIC LETTER KAF WITH TWO DOTS ABOVE
+ 0780..07A5;N     # Lo    [38] THAANA LETTER HAA..THAANA LETTER WAAVU
+ 07A6..07B0;N     # Mn    [11] THAANA ABAFILI..THAANA SUKUN
+ 07B1;N           # Lo         THAANA LETTER NAA
+ 07C0..07C9;N     # Nd    [10] NKO DIGIT ZERO..NKO DIGIT NINE
+ 07CA..07EA;N     # Lo    [33] NKO LETTER A..NKO LETTER JONA RA
+ 07EB..07F3;N     # Mn     [9] NKO COMBINING SHORT HIGH TONE..NKO COMBINING DOUBLE DOT ABOVE
+ 07F4..07F5;N     # Lm     [2] NKO HIGH TONE APOSTROPHE..NKO LOW TONE APOSTROPHE
+ 07F6;N           # So         NKO SYMBOL OO DENNEN
+ 07F7..07F9;N     # Po     [3] NKO SYMBOL GBAKURUNEN..NKO EXCLAMATION MARK
+ 07FA;N           # Lm         NKO LAJANYALAN
+ 07FD;N           # Mn         NKO DANTAYALAN
+ 07FE..07FF;N     # Sc     [2] NKO DOROME SIGN..NKO TAMAN SIGN
+ 0800..0815;N     # Lo    [22] SAMARITAN LETTER ALAF..SAMARITAN LETTER TAAF
+ 0816..0819;N     # Mn     [4] SAMARITAN MARK IN..SAMARITAN MARK DAGESH
+ 081A;N           # Lm         SAMARITAN MODIFIER LETTER EPENTHETIC YUT
+ 081B..0823;N     # Mn     [9] SAMARITAN MARK EPENTHETIC YUT..SAMARITAN VOWEL SIGN A
+ 0824;N           # Lm         SAMARITAN MODIFIER LETTER SHORT A
+ 0825..0827;N     # Mn     [3] SAMARITAN VOWEL SIGN SHORT A..SAMARITAN VOWEL SIGN U
+ 0828;N           # Lm         SAMARITAN MODIFIER LETTER I
+ 0829..082D;N     # Mn     [5] SAMARITAN VOWEL SIGN LONG I..SAMARITAN MARK NEQUDAA
+ 0830..083E;N     # Po    [15] SAMARITAN PUNCTUATION NEQUDAA..SAMARITAN PUNCTUATION ANNAAU
+ 0840..0858;N     # Lo    [25] MANDAIC LETTER HALQA..MANDAIC LETTER AIN
+ 0859..085B;N     # Mn     [3] MANDAIC AFFRICATION MARK..MANDAIC GEMINATION MARK
+ 085E;N           # Po         MANDAIC PUNCTUATION
+ 0860..086A;N     # Lo    [11] SYRIAC LETTER MALAYALAM NGA..SYRIAC LETTER MALAYALAM SSA
+ 08A0..08B4;N     # Lo    [21] ARABIC LETTER BEH WITH SMALL V BELOW..ARABIC LETTER KAF WITH DOT BELOW
+ 08B6..08BD;N     # Lo     [8] ARABIC LETTER BEH WITH SMALL MEEM ABOVE..ARABIC LETTER AFRICAN NOON
+ 08D3..08E1;N     # Mn    [15] ARABIC SMALL LOW WAW..ARABIC SMALL HIGH SIGN SAFHA
+ 08E2;N           # Cf         ARABIC DISPUTED END OF AYAH
+ 08E3..08FF;N     # Mn    [29] ARABIC TURNED DAMMA BELOW..ARABIC MARK SIDEWAYS NOON GHUNNA
+ 0900..0902;N     # Mn     [3] DEVANAGARI SIGN INVERTED CANDRABINDU..DEVANAGARI SIGN ANUSVARA
+ 0903;N           # Mc         DEVANAGARI SIGN VISARGA
+ 0904..0939;N     # Lo    [54] DEVANAGARI LETTER SHORT A..DEVANAGARI LETTER HA
+ 093A;N           # Mn         DEVANAGARI VOWEL SIGN OE
+ 093B;N           # Mc         DEVANAGARI VOWEL SIGN OOE
+ 093C;N           # Mn         DEVANAGARI SIGN NUKTA
+ 093D;N           # Lo         DEVANAGARI SIGN AVAGRAHA
+ 093E..0940;N     # Mc     [3] DEVANAGARI VOWEL SIGN AA..DEVANAGARI VOWEL SIGN II
+ 0941..0948;N     # Mn     [8] DEVANAGARI VOWEL SIGN U..DEVANAGARI VOWEL SIGN AI
+ 0949..094C;N     # Mc     [4] DEVANAGARI VOWEL SIGN CANDRA O..DEVANAGARI VOWEL SIGN AU
+ 094D;N           # Mn         DEVANAGARI SIGN VIRAMA
+ 094E..094F;N     # Mc     [2] DEVANAGARI VOWEL SIGN PRISHTHAMATRA E..DEVANAGARI VOWEL SIGN AW
+ 0950;N           # Lo         DEVANAGARI OM
+ 0951..0957;N     # Mn     [7] DEVANAGARI STRESS SIGN UDATTA..DEVANAGARI VOWEL SIGN UUE
+ 0958..0961;N     # Lo    [10] DEVANAGARI LETTER QA..DEVANAGARI LETTER VOCALIC LL
+ 0962..0963;N     # Mn     [2] DEVANAGARI VOWEL SIGN VOCALIC L..DEVANAGARI VOWEL SIGN VOCALIC LL
+ 0964..0965;N     # Po     [2] DEVANAGARI DANDA..DEVANAGARI DOUBLE DANDA
+ 0966..096F;N     # Nd    [10] DEVANAGARI DIGIT ZERO..DEVANAGARI DIGIT NINE
+ 0970;N           # Po         DEVANAGARI ABBREVIATION SIGN
+ 0971;N           # Lm         DEVANAGARI SIGN HIGH SPACING DOT
+ 0972..097F;N     # Lo    [14] DEVANAGARI LETTER CANDRA A..DEVANAGARI LETTER BBA
+ 0980;N           # Lo         BENGALI ANJI
+ 0981;N           # Mn         BENGALI SIGN CANDRABINDU
+ 0982..0983;N     # Mc     [2] BENGALI SIGN ANUSVARA..BENGALI SIGN VISARGA
+ 0985..098C;N     # Lo     [8] BENGALI LETTER A..BENGALI LETTER VOCALIC L
+ 098F..0990;N     # Lo     [2] BENGALI LETTER E..BENGALI LETTER AI
+ 0993..09A8;N     # Lo    [22] BENGALI LETTER O..BENGALI LETTER NA
+ 09AA..09B0;N     # Lo     [7] BENGALI LETTER PA..BENGALI LETTER RA
+ 09B2;N           # Lo         BENGALI LETTER LA
+ 09B6..09B9;N     # Lo     [4] BENGALI LETTER SHA..BENGALI LETTER HA
+ 09BC;N           # Mn         BENGALI SIGN NUKTA
+ 09BD;N           # Lo         BENGALI SIGN AVAGRAHA
+ 09BE..09C0;N     # Mc     [3] BENGALI VOWEL SIGN AA..BENGALI VOWEL SIGN II
+ 09C1..09C4;N     # Mn     [4] BENGALI VOWEL SIGN U..BENGALI VOWEL SIGN VOCALIC RR
+ 09C7..09C8;N     # Mc     [2] BENGALI VOWEL SIGN E..BENGALI VOWEL SIGN AI
+ 09CB..09CC;N     # Mc     [2] BENGALI VOWEL SIGN O..BENGALI VOWEL SIGN AU
+ 09CD;N           # Mn         BENGALI SIGN VIRAMA
+ 09CE;N           # Lo         BENGALI LETTER KHANDA TA
+ 09D7;N           # Mc         BENGALI AU LENGTH MARK
+ 09DC..09DD;N     # Lo     [2] BENGALI LETTER RRA..BENGALI LETTER RHA
+ 09DF..09E1;N     # Lo     [3] BENGALI LETTER YYA..BENGALI LETTER VOCALIC LL
+ 09E2..09E3;N     # Mn     [2] BENGALI VOWEL SIGN VOCALIC L..BENGALI VOWEL SIGN VOCALIC LL
+ 09E6..09EF;N     # Nd    [10] BENGALI DIGIT ZERO..BENGALI DIGIT NINE
+ 09F0..09F1;N     # Lo     [2] BENGALI LETTER RA WITH MIDDLE DIAGONAL..BENGALI LETTER RA WITH LOWER DIAGONAL
+ 09F2..09F3;N     # Sc     [2] BENGALI RUPEE MARK..BENGALI RUPEE SIGN
+ 09F4..09F9;N     # No     [6] BENGALI CURRENCY NUMERATOR ONE..BENGALI CURRENCY DENOMINATOR SIXTEEN
+ 09FA;N           # So         BENGALI ISSHAR
+ 09FB;N           # Sc         BENGALI GANDA MARK
+ 09FC;N           # Lo         BENGALI LETTER VEDIC ANUSVARA
+ 09FD;N           # Po         BENGALI ABBREVIATION SIGN
+ 09FE;N           # Mn         BENGALI SANDHI MARK
+ 0A01..0A02;N     # Mn     [2] GURMUKHI SIGN ADAK BINDI..GURMUKHI SIGN BINDI
+ 0A03;N           # Mc         GURMUKHI SIGN VISARGA
+ 0A05..0A0A;N     # Lo     [6] GURMUKHI LETTER A..GURMUKHI LETTER UU
+ 0A0F..0A10;N     # Lo     [2] GURMUKHI LETTER EE..GURMUKHI LETTER AI
+ 0A13..0A28;N     # Lo    [22] GURMUKHI LETTER OO..GURMUKHI LETTER NA
+ 0A2A..0A30;N     # Lo     [7] GURMUKHI LETTER PA..GURMUKHI LETTER RA
+ 0A32..0A33;N     # Lo     [2] GURMUKHI LETTER LA..GURMUKHI LETTER LLA
+ 0A35..0A36;N     # Lo     [2] GURMUKHI LETTER VA..GURMUKHI LETTER SHA
+ 0A38..0A39;N     # Lo     [2] GURMUKHI LETTER SA..GURMUKHI LETTER HA
+ 0A3C;N           # Mn         GURMUKHI SIGN NUKTA
+ 0A3E..0A40;N     # Mc     [3] GURMUKHI VOWEL SIGN AA..GURMUKHI VOWEL SIGN II
+ 0A41..0A42;N     # Mn     [2] GURMUKHI VOWEL SIGN U..GURMUKHI VOWEL SIGN UU
+ 0A47..0A48;N     # Mn     [2] GURMUKHI VOWEL SIGN EE..GURMUKHI VOWEL SIGN AI
+ 0A4B..0A4D;N     # Mn     [3] GURMUKHI VOWEL SIGN OO..GURMUKHI SIGN VIRAMA
+ 0A51;N           # Mn         GURMUKHI SIGN UDAAT
+ 0A59..0A5C;N     # Lo     [4] GURMUKHI LETTER KHHA..GURMUKHI LETTER RRA
+ 0A5E;N           # Lo         GURMUKHI LETTER FA
+ 0A66..0A6F;N     # Nd    [10] GURMUKHI DIGIT ZERO..GURMUKHI DIGIT NINE
+ 0A70..0A71;N     # Mn     [2] GURMUKHI TIPPI..GURMUKHI ADDAK
+ 0A72..0A74;N     # Lo     [3] GURMUKHI IRI..GURMUKHI EK ONKAR
+ 0A75;N           # Mn         GURMUKHI SIGN YAKASH
+ 0A76;N           # Po         GURMUKHI ABBREVIATION SIGN
+ 0A81..0A82;N     # Mn     [2] GUJARATI SIGN CANDRABINDU..GUJARATI SIGN ANUSVARA
+ 0A83;N           # Mc         GUJARATI SIGN VISARGA
+ 0A85..0A8D;N     # Lo     [9] GUJARATI LETTER A..GUJARATI VOWEL CANDRA E
+ 0A8F..0A91;N     # Lo     [3] GUJARATI LETTER E..GUJARATI VOWEL CANDRA O
+ 0A93..0AA8;N     # Lo    [22] GUJARATI LETTER O..GUJARATI LETTER NA
+ 0AAA..0AB0;N     # Lo     [7] GUJARATI LETTER PA..GUJARATI LETTER RA
+ 0AB2..0AB3;N     # Lo     [2] GUJARATI LETTER LA..GUJARATI LETTER LLA
+ 0AB5..0AB9;N     # Lo     [5] GUJARATI LETTER VA..GUJARATI LETTER HA
+ 0ABC;N           # Mn         GUJARATI SIGN NUKTA
+ 0ABD;N           # Lo         GUJARATI SIGN AVAGRAHA
+ 0ABE..0AC0;N     # Mc     [3] GUJARATI VOWEL SIGN AA..GUJARATI VOWEL SIGN II
+ 0AC1..0AC5;N     # Mn     [5] GUJARATI VOWEL SIGN U..GUJARATI VOWEL SIGN CANDRA E
+ 0AC7..0AC8;N     # Mn     [2] GUJARATI VOWEL SIGN E..GUJARATI VOWEL SIGN AI
+ 0AC9;N           # Mc         GUJARATI VOWEL SIGN CANDRA O
+ 0ACB..0ACC;N     # Mc     [2] GUJARATI VOWEL SIGN O..GUJARATI VOWEL SIGN AU
+ 0ACD;N           # Mn         GUJARATI SIGN VIRAMA
+ 0AD0;N           # Lo         GUJARATI OM
+ 0AE0..0AE1;N     # Lo     [2] GUJARATI LETTER VOCALIC RR..GUJARATI LETTER VOCALIC LL
+ 0AE2..0AE3;N     # Mn     [2] GUJARATI VOWEL SIGN VOCALIC L..GUJARATI VOWEL SIGN VOCALIC LL
+ 0AE6..0AEF;N     # Nd    [10] GUJARATI DIGIT ZERO..GUJARATI DIGIT NINE
+ 0AF0;N           # Po         GUJARATI ABBREVIATION SIGN
+ 0AF1;N           # Sc         GUJARATI RUPEE SIGN
+ 0AF9;N           # Lo         GUJARATI LETTER ZHA
+ 0AFA..0AFF;N     # Mn     [6] GUJARATI SIGN SUKUN..GUJARATI SIGN TWO-CIRCLE NUKTA ABOVE
+ 0B01;N           # Mn         ORIYA SIGN CANDRABINDU
+ 0B02..0B03;N     # Mc     [2] ORIYA SIGN ANUSVARA..ORIYA SIGN VISARGA
+ 0B05..0B0C;N     # Lo     [8] ORIYA LETTER A..ORIYA LETTER VOCALIC L
+ 0B0F..0B10;N     # Lo     [2] ORIYA LETTER E..ORIYA LETTER AI
+ 0B13..0B28;N     # Lo    [22] ORIYA LETTER O..ORIYA LETTER NA
+ 0B2A..0B30;N     # Lo     [7] ORIYA LETTER PA..ORIYA LETTER RA
+ 0B32..0B33;N     # Lo     [2] ORIYA LETTER LA..ORIYA LETTER LLA
+ 0B35..0B39;N     # Lo     [5] ORIYA LETTER VA..ORIYA LETTER HA
+ 0B3C;N           # Mn         ORIYA SIGN NUKTA
+ 0B3D;N           # Lo         ORIYA SIGN AVAGRAHA
+ 0B3E;N           # Mc         ORIYA VOWEL SIGN AA
+ 0B3F;N           # Mn         ORIYA VOWEL SIGN I
+ 0B40;N           # Mc         ORIYA VOWEL SIGN II
+ 0B41..0B44;N     # Mn     [4] ORIYA VOWEL SIGN U..ORIYA VOWEL SIGN VOCALIC RR
+ 0B47..0B48;N     # Mc     [2] ORIYA VOWEL SIGN E..ORIYA VOWEL SIGN AI
+ 0B4B..0B4C;N     # Mc     [2] ORIYA VOWEL SIGN O..ORIYA VOWEL SIGN AU
+ 0B4D;N           # Mn         ORIYA SIGN VIRAMA
+ 0B56;N           # Mn         ORIYA AI LENGTH MARK
+ 0B57;N           # Mc         ORIYA AU LENGTH MARK
+ 0B5C..0B5D;N     # Lo     [2] ORIYA LETTER RRA..ORIYA LETTER RHA
+ 0B5F..0B61;N     # Lo     [3] ORIYA LETTER YYA..ORIYA LETTER VOCALIC LL
+ 0B62..0B63;N     # Mn     [2] ORIYA VOWEL SIGN VOCALIC L..ORIYA VOWEL SIGN VOCALIC LL
+ 0B66..0B6F;N     # Nd    [10] ORIYA DIGIT ZERO..ORIYA DIGIT NINE
+ 0B70;N           # So         ORIYA ISSHAR
+ 0B71;N           # Lo         ORIYA LETTER WA
+ 0B72..0B77;N     # No     [6] ORIYA FRACTION ONE QUARTER..ORIYA FRACTION THREE SIXTEENTHS
+ 0B82;N           # Mn         TAMIL SIGN ANUSVARA
+ 0B83;N           # Lo         TAMIL SIGN VISARGA
+ 0B85..0B8A;N     # Lo     [6] TAMIL LETTER A..TAMIL LETTER UU
+ 0B8E..0B90;N     # Lo     [3] TAMIL LETTER E..TAMIL LETTER AI
+ 0B92..0B95;N     # Lo     [4] TAMIL LETTER O..TAMIL LETTER KA
+ 0B99..0B9A;N     # Lo     [2] TAMIL LETTER NGA..TAMIL LETTER CA
+ 0B9C;N           # Lo         TAMIL LETTER JA
+ 0B9E..0B9F;N     # Lo     [2] TAMIL LETTER NYA..TAMIL LETTER TTA
+ 0BA3..0BA4;N     # Lo     [2] TAMIL LETTER NNA..TAMIL LETTER TA
+ 0BA8..0BAA;N     # Lo     [3] TAMIL LETTER NA..TAMIL LETTER PA
+ 0BAE..0BB9;N     # Lo    [12] TAMIL LETTER MA..TAMIL LETTER HA
+ 0BBE..0BBF;N     # Mc     [2] TAMIL VOWEL SIGN AA..TAMIL VOWEL SIGN I
+ 0BC0;N           # Mn         TAMIL VOWEL SIGN II
+ 0BC1..0BC2;N     # Mc     [2] TAMIL VOWEL SIGN U..TAMIL VOWEL SIGN UU
+ 0BC6..0BC8;N     # Mc     [3] TAMIL VOWEL SIGN E..TAMIL VOWEL SIGN AI
+ 0BCA..0BCC;N     # Mc     [3] TAMIL VOWEL SIGN O..TAMIL VOWEL SIGN AU
+ 0BCD;N           # Mn         TAMIL SIGN VIRAMA
+ 0BD0;N           # Lo         TAMIL OM
+ 0BD7;N           # Mc         TAMIL AU LENGTH MARK
+ 0BE6..0BEF;N     # Nd    [10] TAMIL DIGIT ZERO..TAMIL DIGIT NINE
+ 0BF0..0BF2;N     # No     [3] TAMIL NUMBER TEN..TAMIL NUMBER ONE THOUSAND
+ 0BF3..0BF8;N     # So     [6] TAMIL DAY SIGN..TAMIL AS ABOVE SIGN
+ 0BF9;N           # Sc         TAMIL RUPEE SIGN
+ 0BFA;N           # So         TAMIL NUMBER SIGN
+ 0C00;N           # Mn         TELUGU SIGN COMBINING CANDRABINDU ABOVE
+ 0C01..0C03;N     # Mc     [3] TELUGU SIGN CANDRABINDU..TELUGU SIGN VISARGA
+ 0C04;N           # Mn         TELUGU SIGN COMBINING ANUSVARA ABOVE
+ 0C05..0C0C;N     # Lo     [8] TELUGU LETTER A..TELUGU LETTER VOCALIC L
+ 0C0E..0C10;N     # Lo     [3] TELUGU LETTER E..TELUGU LETTER AI
+ 0C12..0C28;N     # Lo    [23] TELUGU LETTER O..TELUGU LETTER NA
+ 0C2A..0C39;N     # Lo    [16] TELUGU LETTER PA..TELUGU LETTER HA
+ 0C3D;N           # Lo         TELUGU SIGN AVAGRAHA
+ 0C3E..0C40;N     # Mn     [3] TELUGU VOWEL SIGN AA..TELUGU VOWEL SIGN II
+ 0C41..0C44;N     # Mc     [4] TELUGU VOWEL SIGN U..TELUGU VOWEL SIGN VOCALIC RR
+ 0C46..0C48;N     # Mn     [3] TELUGU VOWEL SIGN E..TELUGU VOWEL SIGN AI
+ 0C4A..0C4D;N     # Mn     [4] TELUGU VOWEL SIGN O..TELUGU SIGN VIRAMA
+ 0C55..0C56;N     # Mn     [2] TELUGU LENGTH MARK..TELUGU AI LENGTH MARK
+ 0C58..0C5A;N     # Lo     [3] TELUGU LETTER TSA..TELUGU LETTER RRRA
+ 0C60..0C61;N     # Lo     [2] TELUGU LETTER VOCALIC RR..TELUGU LETTER VOCALIC LL
+ 0C62..0C63;N     # Mn     [2] TELUGU VOWEL SIGN VOCALIC L..TELUGU VOWEL SIGN VOCALIC LL
+ 0C66..0C6F;N     # Nd    [10] TELUGU DIGIT ZERO..TELUGU DIGIT NINE
+ 0C77;N           # Po         TELUGU SIGN SIDDHAM
+ 0C78..0C7E;N     # No     [7] TELUGU FRACTION DIGIT ZERO FOR ODD POWERS OF FOUR..TELUGU FRACTION DIGIT THREE FOR EVEN POWERS OF FOUR
+ 0C7F;N           # So         TELUGU SIGN TUUMU
+ 0C80;N           # Lo         KANNADA SIGN SPACING CANDRABINDU
+ 0C81;N           # Mn         KANNADA SIGN CANDRABINDU
+ 0C82..0C83;N     # Mc     [2] KANNADA SIGN ANUSVARA..KANNADA SIGN VISARGA
+ 0C84;N           # Po         KANNADA SIGN SIDDHAM
+ 0C85..0C8C;N     # Lo     [8] KANNADA LETTER A..KANNADA LETTER VOCALIC L
+ 0C8E..0C90;N     # Lo     [3] KANNADA LETTER E..KANNADA LETTER AI
+ 0C92..0CA8;N     # Lo    [23] KANNADA LETTER O..KANNADA LETTER NA
+ 0CAA..0CB3;N     # Lo    [10] KANNADA LETTER PA..KANNADA LETTER LLA
+ 0CB5..0CB9;N     # Lo     [5] KANNADA LETTER VA..KANNADA LETTER HA
+ 0CBC;N           # Mn         KANNADA SIGN NUKTA
+ 0CBD;N           # Lo         KANNADA SIGN AVAGRAHA
+ 0CBE;N           # Mc         KANNADA VOWEL SIGN AA
+ 0CBF;N           # Mn         KANNADA VOWEL SIGN I
+ 0CC0..0CC4;N     # Mc     [5] KANNADA VOWEL SIGN II..KANNADA VOWEL SIGN VOCALIC RR
+ 0CC6;N           # Mn         KANNADA VOWEL SIGN E
+ 0CC7..0CC8;N     # Mc     [2] KANNADA VOWEL SIGN EE..KANNADA VOWEL SIGN AI
+ 0CCA..0CCB;N     # Mc     [2] KANNADA VOWEL SIGN O..KANNADA VOWEL SIGN OO
+ 0CCC..0CCD;N     # Mn     [2] KANNADA VOWEL SIGN AU..KANNADA SIGN VIRAMA
+ 0CD5..0CD6;N     # Mc     [2] KANNADA LENGTH MARK..KANNADA AI LENGTH MARK
+ 0CDE;N           # Lo         KANNADA LETTER FA
+ 0CE0..0CE1;N     # Lo     [2] KANNADA LETTER VOCALIC RR..KANNADA LETTER VOCALIC LL
+ 0CE2..0CE3;N     # Mn     [2] KANNADA VOWEL SIGN VOCALIC L..KANNADA VOWEL SIGN VOCALIC LL
+ 0CE6..0CEF;N     # Nd    [10] KANNADA DIGIT ZERO..KANNADA DIGIT NINE
+ 0CF1..0CF2;N     # Lo     [2] KANNADA SIGN JIHVAMULIYA..KANNADA SIGN UPADHMANIYA
+ 0D00..0D01;N     # Mn     [2] MALAYALAM SIGN COMBINING ANUSVARA ABOVE..MALAYALAM SIGN CANDRABINDU
+ 0D02..0D03;N     # Mc     [2] MALAYALAM SIGN ANUSVARA..MALAYALAM SIGN VISARGA
+ 0D05..0D0C;N     # Lo     [8] MALAYALAM LETTER A..MALAYALAM LETTER VOCALIC L
+ 0D0E..0D10;N     # Lo     [3] MALAYALAM LETTER E..MALAYALAM LETTER AI
+ 0D12..0D3A;N     # Lo    [41] MALAYALAM LETTER O..MALAYALAM LETTER TTTA
+ 0D3B..0D3C;N     # Mn     [2] MALAYALAM SIGN VERTICAL BAR VIRAMA..MALAYALAM SIGN CIRCULAR VIRAMA
+ 0D3D;N           # Lo         MALAYALAM SIGN AVAGRAHA
+ 0D3E..0D40;N     # Mc     [3] MALAYALAM VOWEL SIGN AA..MALAYALAM VOWEL SIGN II
+ 0D41..0D44;N     # Mn     [4] MALAYALAM VOWEL SIGN U..MALAYALAM VOWEL SIGN VOCALIC RR
+ 0D46..0D48;N     # Mc     [3] MALAYALAM VOWEL SIGN E..MALAYALAM VOWEL SIGN AI
+ 0D4A..0D4C;N     # Mc     [3] MALAYALAM VOWEL SIGN O..MALAYALAM VOWEL SIGN AU
+ 0D4D;N           # Mn         MALAYALAM SIGN VIRAMA
+ 0D4E;N           # Lo         MALAYALAM LETTER DOT REPH
+ 0D4F;N           # So         MALAYALAM SIGN PARA
+ 0D54..0D56;N     # Lo     [3] MALAYALAM LETTER CHILLU M..MALAYALAM LETTER CHILLU LLL
+ 0D57;N           # Mc         MALAYALAM AU LENGTH MARK
+ 0D58..0D5E;N     # No     [7] MALAYALAM FRACTION ONE ONE-HUNDRED-AND-SIXTIETH..MALAYALAM FRACTION ONE FIFTH
+ 0D5F..0D61;N     # Lo     [3] MALAYALAM LETTER ARCHAIC II..MALAYALAM LETTER VOCALIC LL
+ 0D62..0D63;N     # Mn     [2] MALAYALAM VOWEL SIGN VOCALIC L..MALAYALAM VOWEL SIGN VOCALIC LL
+ 0D66..0D6F;N     # Nd    [10] MALAYALAM DIGIT ZERO..MALAYALAM DIGIT NINE
+ 0D70..0D78;N     # No     [9] MALAYALAM NUMBER TEN..MALAYALAM FRACTION THREE SIXTEENTHS
+ 0D79;N           # So         MALAYALAM DATE MARK
+ 0D7A..0D7F;N     # Lo     [6] MALAYALAM LETTER CHILLU NN..MALAYALAM LETTER CHILLU K
+ 0D82..0D83;N     # Mc     [2] SINHALA SIGN ANUSVARAYA..SINHALA SIGN VISARGAYA
+ 0D85..0D96;N     # Lo    [18] SINHALA LETTER AYANNA..SINHALA LETTER AUYANNA
+ 0D9A..0DB1;N     # Lo    [24] SINHALA LETTER ALPAPRAANA KAYANNA..SINHALA LETTER DANTAJA NAYANNA
+ 0DB3..0DBB;N     # Lo     [9] SINHALA LETTER SANYAKA DAYANNA..SINHALA LETTER RAYANNA
+ 0DBD;N           # Lo         SINHALA LETTER DANTAJA LAYANNA
+ 0DC0..0DC6;N     # Lo     [7] SINHALA LETTER VAYANNA..SINHALA LETTER FAYANNA
+ 0DCA;N           # Mn         SINHALA SIGN AL-LAKUNA
+ 0DCF..0DD1;N     # Mc     [3] SINHALA VOWEL SIGN AELA-PILLA..SINHALA VOWEL SIGN DIGA AEDA-PILLA
+ 0DD2..0DD4;N     # Mn     [3] SINHALA VOWEL SIGN KETTI IS-PILLA..SINHALA VOWEL SIGN KETTI PAA-PILLA
+ 0DD6;N           # Mn         SINHALA VOWEL SIGN DIGA PAA-PILLA
+ 0DD8..0DDF;N     # Mc     [8] SINHALA VOWEL SIGN GAETTA-PILLA..SINHALA VOWEL SIGN GAYANUKITTA
+ 0DE6..0DEF;N     # Nd    [10] SINHALA LITH DIGIT ZERO..SINHALA LITH DIGIT NINE
+ 0DF2..0DF3;N     # Mc     [2] SINHALA VOWEL SIGN DIGA GAETTA-PILLA..SINHALA VOWEL SIGN DIGA GAYANUKITTA
+ 0DF4;N           # Po         SINHALA PUNCTUATION KUNDDALIYA
+ 0E01..0E30;N     # Lo    [48] THAI CHARACTER KO KAI..THAI CHARACTER SARA A
+ 0E31;N           # Mn         THAI CHARACTER MAI HAN-AKAT
+ 0E32..0E33;N     # Lo     [2] THAI CHARACTER SARA AA..THAI CHARACTER SARA AM
+ 0E34..0E3A;N     # Mn     [7] THAI CHARACTER SARA I..THAI CHARACTER PHINTHU
+ 0E3F;N           # Sc         THAI CURRENCY SYMBOL BAHT
+ 0E40..0E45;N     # Lo     [6] THAI CHARACTER SARA E..THAI CHARACTER LAKKHANGYAO
+ 0E46;N           # Lm         THAI CHARACTER MAIYAMOK
+ 0E47..0E4E;N     # Mn     [8] THAI CHARACTER MAITAIKHU..THAI CHARACTER YAMAKKAN
+ 0E4F;N           # Po         THAI CHARACTER FONGMAN
+ 0E50..0E59;N     # Nd    [10] THAI DIGIT ZERO..THAI DIGIT NINE
+ 0E5A..0E5B;N     # Po     [2] THAI CHARACTER ANGKHANKHU..THAI CHARACTER KHOMUT
+ 0E81..0E82;N     # Lo     [2] LAO LETTER KO..LAO LETTER KHO SUNG
+ 0E84;N           # Lo         LAO LETTER KHO TAM
+ 0E86..0E8A;N     # Lo     [5] LAO LETTER PALI GHA..LAO LETTER SO TAM
+ 0E8C..0EA3;N     # Lo    [24] LAO LETTER PALI JHA..LAO LETTER LO LING
+ 0EA5;N           # Lo         LAO LETTER LO LOOT
+ 0EA7..0EB0;N     # Lo    [10] LAO LETTER WO..LAO VOWEL SIGN A
+ 0EB1;N           # Mn         LAO VOWEL SIGN MAI KAN
+ 0EB2..0EB3;N     # Lo     [2] LAO VOWEL SIGN AA..LAO VOWEL SIGN AM
+ 0EB4..0EBC;N     # Mn     [9] LAO VOWEL SIGN I..LAO SEMIVOWEL SIGN LO
+ 0EBD;N           # Lo         LAO SEMIVOWEL SIGN NYO
+ 0EC0..0EC4;N     # Lo     [5] LAO VOWEL SIGN E..LAO VOWEL SIGN AI
+ 0EC6;N           # Lm         LAO KO LA
+ 0EC8..0ECD;N     # Mn     [6] LAO TONE MAI EK..LAO NIGGAHITA
+ 0ED0..0ED9;N     # Nd    [10] LAO DIGIT ZERO..LAO DIGIT NINE
+ 0EDC..0EDF;N     # Lo     [4] LAO HO NO..LAO LETTER KHMU NYO
+ 0F00;N           # Lo         TIBETAN SYLLABLE OM
+ 0F01..0F03;N     # So     [3] TIBETAN MARK GTER YIG MGO TRUNCATED A..TIBETAN MARK GTER YIG MGO -UM GTER TSHEG MA
+ 0F04..0F12;N     # Po    [15] TIBETAN MARK INITIAL YIG MGO MDUN MA..TIBETAN MARK RGYA GRAM SHAD
+ 0F13;N           # So         TIBETAN MARK CARET -DZUD RTAGS ME LONG CAN
+ 0F14;N           # Po         TIBETAN MARK GTER TSHEG
+ 0F15..0F17;N     # So     [3] TIBETAN LOGOTYPE SIGN CHAD RTAGS..TIBETAN ASTROLOGICAL SIGN SGRA GCAN -CHAR RTAGS
+ 0F18..0F19;N     # Mn     [2] TIBETAN ASTROLOGICAL SIGN -KHYUD PA..TIBETAN ASTROLOGICAL SIGN SDONG TSHUGS
+ 0F1A..0F1F;N     # So     [6] TIBETAN SIGN RDEL DKAR GCIG..TIBETAN SIGN RDEL DKAR RDEL NAG
+ 0F20..0F29;N     # Nd    [10] TIBETAN DIGIT ZERO..TIBETAN DIGIT NINE
+ 0F2A..0F33;N     # No    [10] TIBETAN DIGIT HALF ONE..TIBETAN DIGIT HALF ZERO
+ 0F34;N           # So         TIBETAN MARK BSDUS RTAGS
+ 0F35;N           # Mn         TIBETAN MARK NGAS BZUNG NYI ZLA
+ 0F36;N           # So         TIBETAN MARK CARET -DZUD RTAGS BZHI MIG CAN
+ 0F37;N           # Mn         TIBETAN MARK NGAS BZUNG SGOR RTAGS
+ 0F38;N           # So         TIBETAN MARK CHE MGO
+ 0F39;N           # Mn         TIBETAN MARK TSA -PHRU
+ 0F3A;N           # Ps         TIBETAN MARK GUG RTAGS GYON
+ 0F3B;N           # Pe         TIBETAN MARK GUG RTAGS GYAS
+ 0F3C;N           # Ps         TIBETAN MARK ANG KHANG GYON
+ 0F3D;N           # Pe         TIBETAN MARK ANG KHANG GYAS
+ 0F3E..0F3F;N     # Mc     [2] TIBETAN SIGN YAR TSHES..TIBETAN SIGN MAR TSHES
+ 0F40..0F47;N     # Lo     [8] TIBETAN LETTER KA..TIBETAN LETTER JA
+ 0F49..0F6C;N     # Lo    [36] TIBETAN LETTER NYA..TIBETAN LETTER RRA
+ 0F71..0F7E;N     # Mn    [14] TIBETAN VOWEL SIGN AA..TIBETAN SIGN RJES SU NGA RO
+ 0F7F;N           # Mc         TIBETAN SIGN RNAM BCAD
+ 0F80..0F84;N     # Mn     [5] TIBETAN VOWEL SIGN REVERSED I..TIBETAN MARK HALANTA
+ 0F85;N           # Po         TIBETAN MARK PALUTA
+ 0F86..0F87;N     # Mn     [2] TIBETAN SIGN LCI RTAGS..TIBETAN SIGN YANG RTAGS
+ 0F88..0F8C;N     # Lo     [5] TIBETAN SIGN LCE TSA CAN..TIBETAN SIGN INVERTED MCHU CAN
+ 0F8D..0F97;N     # Mn    [11] TIBETAN SUBJOINED SIGN LCE TSA CAN..TIBETAN SUBJOINED LETTER JA
+ 0F99..0FBC;N     # Mn    [36] TIBETAN SUBJOINED LETTER NYA..TIBETAN SUBJOINED LETTER FIXED-FORM RA
+ 0FBE..0FC5;N     # So     [8] TIBETAN KU RU KHA..TIBETAN SYMBOL RDO RJE
+ 0FC6;N           # Mn         TIBETAN SYMBOL PADMA GDAN
+ 0FC7..0FCC;N     # So     [6] TIBETAN SYMBOL RDO RJE RGYA GRAM..TIBETAN SYMBOL NOR BU BZHI -KHYIL
+ 0FCE..0FCF;N     # So     [2] TIBETAN SIGN RDEL NAG RDEL DKAR..TIBETAN SIGN RDEL NAG GSUM
+ 0FD0..0FD4;N     # Po     [5] TIBETAN MARK BSKA- SHOG GI MGO RGYAN..TIBETAN MARK CLOSING BRDA RNYING YIG MGO SGAB MA
+ 0FD5..0FD8;N     # So     [4] RIGHT-FACING SVASTI SIGN..LEFT-FACING SVASTI SIGN WITH DOTS
+ 0FD9..0FDA;N     # Po     [2] TIBETAN MARK LEADING MCHAN RTAGS..TIBETAN MARK TRAILING MCHAN RTAGS
+ 1000..102A;N     # Lo    [43] MYANMAR LETTER KA..MYANMAR LETTER AU
+ 102B..102C;N     # Mc     [2] MYANMAR VOWEL SIGN TALL AA..MYANMAR VOWEL SIGN AA
+ 102D..1030;N     # Mn     [4] MYANMAR VOWEL SIGN I..MYANMAR VOWEL SIGN UU
+ 1031;N           # Mc         MYANMAR VOWEL SIGN E
+ 1032..1037;N     # Mn     [6] MYANMAR VOWEL SIGN AI..MYANMAR SIGN DOT BELOW
+ 1038;N           # Mc         MYANMAR SIGN VISARGA
+ 1039..103A;N     # Mn     [2] MYANMAR SIGN VIRAMA..MYANMAR SIGN ASAT
+ 103B..103C;N     # Mc     [2] MYANMAR CONSONANT SIGN MEDIAL YA..MYANMAR CONSONANT SIGN MEDIAL RA
+ 103D..103E;N     # Mn     [2] MYANMAR CONSONANT SIGN MEDIAL WA..MYANMAR CONSONANT SIGN MEDIAL HA
+ 103F;N           # Lo         MYANMAR LETTER GREAT SA
+ 1040..1049;N     # Nd    [10] MYANMAR DIGIT ZERO..MYANMAR DIGIT NINE
+ 104A..104F;N     # Po     [6] MYANMAR SIGN LITTLE SECTION..MYANMAR SYMBOL GENITIVE
+ 1050..1055;N     # Lo     [6] MYANMAR LETTER SHA..MYANMAR LETTER VOCALIC LL
+ 1056..1057;N     # Mc     [2] MYANMAR VOWEL SIGN VOCALIC R..MYANMAR VOWEL SIGN VOCALIC RR
+ 1058..1059;N     # Mn     [2] MYANMAR VOWEL SIGN VOCALIC L..MYANMAR VOWEL SIGN VOCALIC LL
+ 105A..105D;N     # Lo     [4] MYANMAR LETTER MON NGA..MYANMAR LETTER MON BBE
+ 105E..1060;N     # Mn     [3] MYANMAR CONSONANT SIGN MON MEDIAL NA..MYANMAR CONSONANT SIGN MON MEDIAL LA
+ 1061;N           # Lo         MYANMAR LETTER SGAW KAREN SHA
+ 1062..1064;N     # Mc     [3] MYANMAR VOWEL SIGN SGAW KAREN EU..MYANMAR TONE MARK SGAW KAREN KE PHO
+ 1065..1066;N     # Lo     [2] MYANMAR LETTER WESTERN PWO KAREN THA..MYANMAR LETTER WESTERN PWO KAREN PWA
+ 1067..106D;N     # Mc     [7] MYANMAR VOWEL SIGN WESTERN PWO KAREN EU..MYANMAR SIGN WESTERN PWO KAREN TONE-5
+ 106E..1070;N     # Lo     [3] MYANMAR LETTER EASTERN PWO KAREN NNA..MYANMAR LETTER EASTERN PWO KAREN GHWA
+ 1071..1074;N     # Mn     [4] MYANMAR VOWEL SIGN GEBA KAREN I..MYANMAR VOWEL SIGN KAYAH EE
+ 1075..1081;N     # Lo    [13] MYANMAR LETTER SHAN KA..MYANMAR LETTER SHAN HA
+ 1082;N           # Mn         MYANMAR CONSONANT SIGN SHAN MEDIAL WA
+ 1083..1084;N     # Mc     [2] MYANMAR VOWEL SIGN SHAN AA..MYANMAR VOWEL SIGN SHAN E
+ 1085..1086;N     # Mn     [2] MYANMAR VOWEL SIGN SHAN E ABOVE..MYANMAR VOWEL SIGN SHAN FINAL Y
+ 1087..108C;N     # Mc     [6] MYANMAR SIGN SHAN TONE-2..MYANMAR SIGN SHAN COUNCIL TONE-3
+ 108D;N           # Mn         MYANMAR SIGN SHAN COUNCIL EMPHATIC TONE
+ 108E;N           # Lo         MYANMAR LETTER RUMAI PALAUNG FA
+ 108F;N           # Mc         MYANMAR SIGN RUMAI PALAUNG TONE-5
+ 1090..1099;N     # Nd    [10] MYANMAR SHAN DIGIT ZERO..MYANMAR SHAN DIGIT NINE
+ 109A..109C;N     # Mc     [3] MYANMAR SIGN KHAMTI TONE-1..MYANMAR VOWEL SIGN AITON A
+ 109D;N           # Mn         MYANMAR VOWEL SIGN AITON AI
+ 109E..109F;N     # So     [2] MYANMAR SYMBOL SHAN ONE..MYANMAR SYMBOL SHAN EXCLAMATION
+ 10A0..10C5;N     # Lu    [38] GEORGIAN CAPITAL LETTER AN..GEORGIAN CAPITAL LETTER HOE
+ 10C7;N           # Lu         GEORGIAN CAPITAL LETTER YN
+ 10CD;N           # Lu         GEORGIAN CAPITAL LETTER AEN
+ 10D0..10FA;N     # Ll    [43] GEORGIAN LETTER AN..GEORGIAN LETTER AIN
+ 10FB;N           # Po         GEORGIAN PARAGRAPH SEPARATOR
+ 10FC;N           # Lm         MODIFIER LETTER GEORGIAN NAR
+ 10FD..10FF;N     # Ll     [3] GEORGIAN LETTER AEN..GEORGIAN LETTER LABIAL SIGN
+ 1100..115F;W     # Lo    [96] HANGUL CHOSEONG KIYEOK..HANGUL CHOSEONG FILLER
+ 1160..11FF;N     # Lo   [160] HANGUL JUNGSEONG FILLER..HANGUL JONGSEONG SSANGNIEUN
+ 1200..1248;N     # Lo    [73] ETHIOPIC SYLLABLE HA..ETHIOPIC SYLLABLE QWA
+ 124A..124D;N     # Lo     [4] ETHIOPIC SYLLABLE QWI..ETHIOPIC SYLLABLE QWE
+ 1250..1256;N     # Lo     [7] ETHIOPIC SYLLABLE QHA..ETHIOPIC SYLLABLE QHO
+ 1258;N           # Lo         ETHIOPIC SYLLABLE QHWA
+ 125A..125D;N     # Lo     [4] ETHIOPIC SYLLABLE QHWI..ETHIOPIC SYLLABLE QHWE
+ 1260..1288;N     # Lo    [41] ETHIOPIC SYLLABLE BA..ETHIOPIC SYLLABLE XWA
+ 128A..128D;N     # Lo     [4] ETHIOPIC SYLLABLE XWI..ETHIOPIC SYLLABLE XWE
+ 1290..12B0;N     # Lo    [33] ETHIOPIC SYLLABLE NA..ETHIOPIC SYLLABLE KWA
+ 12B2..12B5;N     # Lo     [4] ETHIOPIC SYLLABLE KWI..ETHIOPIC SYLLABLE KWE
+ 12B8..12BE;N     # Lo     [7] ETHIOPIC SYLLABLE KXA..ETHIOPIC SYLLABLE KXO
+ 12C0;N           # Lo         ETHIOPIC SYLLABLE KXWA
+ 12C2..12C5;N     # Lo     [4] ETHIOPIC SYLLABLE KXWI..ETHIOPIC SYLLABLE KXWE
+ 12C8..12D6;N     # Lo    [15] ETHIOPIC SYLLABLE WA..ETHIOPIC SYLLABLE PHARYNGEAL O
+ 12D8..1310;N     # Lo    [57] ETHIOPIC SYLLABLE ZA..ETHIOPIC SYLLABLE GWA
+ 1312..1315;N     # Lo     [4] ETHIOPIC SYLLABLE GWI..ETHIOPIC SYLLABLE GWE
+ 1318..135A;N     # Lo    [67] ETHIOPIC SYLLABLE GGA..ETHIOPIC SYLLABLE FYA
+ 135D..135F;N     # Mn     [3] ETHIOPIC COMBINING GEMINATION AND VOWEL LENGTH MARK..ETHIOPIC COMBINING GEMINATION MARK
+ 1360..1368;N     # Po     [9] ETHIOPIC SECTION MARK..ETHIOPIC PARAGRAPH SEPARATOR
+ 1369..137C;N     # No    [20] ETHIOPIC DIGIT ONE..ETHIOPIC NUMBER TEN THOUSAND
+ 1380..138F;N     # Lo    [16] ETHIOPIC SYLLABLE SEBATBEIT MWA..ETHIOPIC SYLLABLE PWE
+ 1390..1399;N     # So    [10] ETHIOPIC TONAL MARK YIZET..ETHIOPIC TONAL MARK KURT
+ 13A0..13F5;N     # Lu    [86] CHEROKEE LETTER A..CHEROKEE LETTER MV
+ 13F8..13FD;N     # Ll     [6] CHEROKEE SMALL LETTER YE..CHEROKEE SMALL LETTER MV
+ 1400;N           # Pd         CANADIAN SYLLABICS HYPHEN
+ 1401..166C;N     # Lo   [620] CANADIAN SYLLABICS E..CANADIAN SYLLABICS CARRIER TTSA
+ 166D;N           # So         CANADIAN SYLLABICS CHI SIGN
+ 166E;N           # Po         CANADIAN SYLLABICS FULL STOP
+ 166F..167F;N     # Lo    [17] CANADIAN SYLLABICS QAI..CANADIAN SYLLABICS BLACKFOOT W
+ 1680;N           # Zs         OGHAM SPACE MARK
+ 1681..169A;N     # Lo    [26] OGHAM LETTER BEITH..OGHAM LETTER PEITH
+ 169B;N           # Ps         OGHAM FEATHER MARK
+ 169C;N           # Pe         OGHAM REVERSED FEATHER MARK
+ 16A0..16EA;N     # Lo    [75] RUNIC LETTER FEHU FEOH FE F..RUNIC LETTER X
+ 16EB..16ED;N     # Po     [3] RUNIC SINGLE PUNCTUATION..RUNIC CROSS PUNCTUATION
+ 16EE..16F0;N     # Nl     [3] RUNIC ARLAUG SYMBOL..RUNIC BELGTHOR SYMBOL
+ 16F1..16F8;N     # Lo     [8] RUNIC LETTER K..RUNIC LETTER FRANKS CASKET AESC
+ 1700..170C;N     # Lo    [13] TAGALOG LETTER A..TAGALOG LETTER YA
+ 170E..1711;N     # Lo     [4] TAGALOG LETTER LA..TAGALOG LETTER HA
+ 1712..1714;N     # Mn     [3] TAGALOG VOWEL SIGN I..TAGALOG SIGN VIRAMA
+ 1720..1731;N     # Lo    [18] HANUNOO LETTER A..HANUNOO LETTER HA
+ 1732..1734;N     # Mn     [3] HANUNOO VOWEL SIGN I..HANUNOO SIGN PAMUDPOD
+ 1735..1736;N     # Po     [2] PHILIPPINE SINGLE PUNCTUATION..PHILIPPINE DOUBLE PUNCTUATION
+ 1740..1751;N     # Lo    [18] BUHID LETTER A..BUHID LETTER HA
+ 1752..1753;N     # Mn     [2] BUHID VOWEL SIGN I..BUHID VOWEL SIGN U
+ 1760..176C;N     # Lo    [13] TAGBANWA LETTER A..TAGBANWA LETTER YA
+ 176E..1770;N     # Lo     [3] TAGBANWA LETTER LA..TAGBANWA LETTER SA
+ 1772..1773;N     # Mn     [2] TAGBANWA VOWEL SIGN I..TAGBANWA VOWEL SIGN U
+ 1780..17B3;N     # Lo    [52] KHMER LETTER KA..KHMER INDEPENDENT VOWEL QAU
+ 17B4..17B5;N     # Mn     [2] KHMER VOWEL INHERENT AQ..KHMER VOWEL INHERENT AA
+ 17B6;N           # Mc         KHMER VOWEL SIGN AA
+ 17B7..17BD;N     # Mn     [7] KHMER VOWEL SIGN I..KHMER VOWEL SIGN UA
+ 17BE..17C5;N     # Mc     [8] KHMER VOWEL SIGN OE..KHMER VOWEL SIGN AU
+ 17C6;N           # Mn         KHMER SIGN NIKAHIT
+ 17C7..17C8;N     # Mc     [2] KHMER SIGN REAHMUK..KHMER SIGN YUUKALEAPINTU
+ 17C9..17D3;N     # Mn    [11] KHMER SIGN MUUSIKATOAN..KHMER SIGN BATHAMASAT
+ 17D4..17D6;N     # Po     [3] KHMER SIGN KHAN..KHMER SIGN CAMNUC PII KUUH
+ 17D7;N           # Lm         KHMER SIGN LEK TOO
+ 17D8..17DA;N     # Po     [3] KHMER SIGN BEYYAL..KHMER SIGN KOOMUUT
+ 17DB;N           # Sc         KHMER CURRENCY SYMBOL RIEL
+ 17DC;N           # Lo         KHMER SIGN AVAKRAHASANYA
+ 17DD;N           # Mn         KHMER SIGN ATTHACAN
+ 17E0..17E9;N     # Nd    [10] KHMER DIGIT ZERO..KHMER DIGIT NINE
+ 17F0..17F9;N     # No    [10] KHMER SYMBOL LEK ATTAK SON..KHMER SYMBOL LEK ATTAK PRAM-BUON
+ 1800..1805;N     # Po     [6] MONGOLIAN BIRGA..MONGOLIAN FOUR DOTS
+ 1806;N           # Pd         MONGOLIAN TODO SOFT HYPHEN
+ 1807..180A;N     # Po     [4] MONGOLIAN SIBE SYLLABLE BOUNDARY MARKER..MONGOLIAN NIRUGU
+ 180B..180D;N     # Mn     [3] MONGOLIAN FREE VARIATION SELECTOR ONE..MONGOLIAN FREE VARIATION SELECTOR THREE
+ 180E;N           # Cf         MONGOLIAN VOWEL SEPARATOR
+ 1810..1819;N     # Nd    [10] MONGOLIAN DIGIT ZERO..MONGOLIAN DIGIT NINE
+ 1820..1842;N     # Lo    [35] MONGOLIAN LETTER A..MONGOLIAN LETTER CHI
+ 1843;N           # Lm         MONGOLIAN LETTER TODO LONG VOWEL SIGN
+ 1844..1878;N     # Lo    [53] MONGOLIAN LETTER TODO E..MONGOLIAN LETTER CHA WITH TWO DOTS
+ 1880..1884;N     # Lo     [5] MONGOLIAN LETTER ALI GALI ANUSVARA ONE..MONGOLIAN LETTER ALI GALI INVERTED UBADAMA
+ 1885..1886;N     # Mn     [2] MONGOLIAN LETTER ALI GALI BALUDA..MONGOLIAN LETTER ALI GALI THREE BALUDA
+ 1887..18A8;N     # Lo    [34] MONGOLIAN LETTER ALI GALI A..MONGOLIAN LETTER MANCHU ALI GALI BHA
+ 18A9;N           # Mn         MONGOLIAN LETTER ALI GALI DAGALGA
+ 18AA;N           # Lo         MONGOLIAN LETTER MANCHU ALI GALI LHA
+ 18B0..18F5;N     # Lo    [70] CANADIAN SYLLABICS OY..CANADIAN SYLLABICS CARRIER DENTAL S
+ 1900..191E;N     # Lo    [31] LIMBU VOWEL-CARRIER LETTER..LIMBU LETTER TRA
+ 1920..1922;N     # Mn     [3] LIMBU VOWEL SIGN A..LIMBU VOWEL SIGN U
+ 1923..1926;N     # Mc     [4] LIMBU VOWEL SIGN EE..LIMBU VOWEL SIGN AU
+ 1927..1928;N     # Mn     [2] LIMBU VOWEL SIGN E..LIMBU VOWEL SIGN O
+ 1929..192B;N     # Mc     [3] LIMBU SUBJOINED LETTER YA..LIMBU SUBJOINED LETTER WA
+ 1930..1931;N     # Mc     [2] LIMBU SMALL LETTER KA..LIMBU SMALL LETTER NGA
+ 1932;N           # Mn         LIMBU SMALL LETTER ANUSVARA
+ 1933..1938;N     # Mc     [6] LIMBU SMALL LETTER TA..LIMBU SMALL LETTER LA
+ 1939..193B;N     # Mn     [3] LIMBU SIGN MUKPHRENG..LIMBU SIGN SA-I
+ 1940;N           # So         LIMBU SIGN LOO
+ 1944..1945;N     # Po     [2] LIMBU EXCLAMATION MARK..LIMBU QUESTION MARK
+ 1946..194F;N     # Nd    [10] LIMBU DIGIT ZERO..LIMBU DIGIT NINE
+ 1950..196D;N     # Lo    [30] TAI LE LETTER KA..TAI LE LETTER AI
+ 1970..1974;N     # Lo     [5] TAI LE LETTER TONE-2..TAI LE LETTER TONE-6
+ 1980..19AB;N     # Lo    [44] NEW TAI LUE LETTER HIGH QA..NEW TAI LUE LETTER LOW SUA
+ 19B0..19C9;N     # Lo    [26] NEW TAI LUE VOWEL SIGN VOWEL SHORTENER..NEW TAI LUE TONE MARK-2
+ 19D0..19D9;N     # Nd    [10] NEW TAI LUE DIGIT ZERO..NEW TAI LUE DIGIT NINE
+ 19DA;N           # No         NEW TAI LUE THAM DIGIT ONE
+ 19DE..19DF;N     # So     [2] NEW TAI LUE SIGN LAE..NEW TAI LUE SIGN LAEV
+ 19E0..19FF;N     # So    [32] KHMER SYMBOL PATHAMASAT..KHMER SYMBOL DAP-PRAM ROC
+ 1A00..1A16;N     # Lo    [23] BUGINESE LETTER KA..BUGINESE LETTER HA
+ 1A17..1A18;N     # Mn     [2] BUGINESE VOWEL SIGN I..BUGINESE VOWEL SIGN U
+ 1A19..1A1A;N     # Mc     [2] BUGINESE VOWEL SIGN E..BUGINESE VOWEL SIGN O
+ 1A1B;N           # Mn         BUGINESE VOWEL SIGN AE
+ 1A1E..1A1F;N     # Po     [2] BUGINESE PALLAWA..BUGINESE END OF SECTION
+ 1A20..1A54;N     # Lo    [53] TAI THAM LETTER HIGH KA..TAI THAM LETTER GREAT SA
+ 1A55;N           # Mc         TAI THAM CONSONANT SIGN MEDIAL RA
+ 1A56;N           # Mn         TAI THAM CONSONANT SIGN MEDIAL LA
+ 1A57;N           # Mc         TAI THAM CONSONANT SIGN LA TANG LAI
+ 1A58..1A5E;N     # Mn     [7] TAI THAM SIGN MAI KANG LAI..TAI THAM CONSONANT SIGN SA
+ 1A60;N           # Mn         TAI THAM SIGN SAKOT
+ 1A61;N           # Mc         TAI THAM VOWEL SIGN A
+ 1A62;N           # Mn         TAI THAM VOWEL SIGN MAI SAT
+ 1A63..1A64;N     # Mc     [2] TAI THAM VOWEL SIGN AA..TAI THAM VOWEL SIGN TALL AA
+ 1A65..1A6C;N     # Mn     [8] TAI THAM VOWEL SIGN I..TAI THAM VOWEL SIGN OA BELOW
+ 1A6D..1A72;N     # Mc     [6] TAI THAM VOWEL SIGN OY..TAI THAM VOWEL SIGN THAM AI
+ 1A73..1A7C;N     # Mn    [10] TAI THAM VOWEL SIGN OA ABOVE..TAI THAM SIGN KHUEN-LUE KARAN
+ 1A7F;N           # Mn         TAI THAM COMBINING CRYPTOGRAMMIC DOT
+ 1A80..1A89;N     # Nd    [10] TAI THAM HORA DIGIT ZERO..TAI THAM HORA DIGIT NINE
+ 1A90..1A99;N     # Nd    [10] TAI THAM THAM DIGIT ZERO..TAI THAM THAM DIGIT NINE
+ 1AA0..1AA6;N     # Po     [7] TAI THAM SIGN WIANG..TAI THAM SIGN REVERSED ROTATED RANA
+ 1AA7;N           # Lm         TAI THAM SIGN MAI YAMOK
+ 1AA8..1AAD;N     # Po     [6] TAI THAM SIGN KAAN..TAI THAM SIGN CAANG
+ 1AB0..1ABD;N     # Mn    [14] COMBINING DOUBLED CIRCUMFLEX ACCENT..COMBINING PARENTHESES BELOW
+ 1ABE;N           # Me         COMBINING PARENTHESES OVERLAY
+ 1B00..1B03;N     # Mn     [4] BALINESE SIGN ULU RICEM..BALINESE SIGN SURANG
+ 1B04;N           # Mc         BALINESE SIGN BISAH
+ 1B05..1B33;N     # Lo    [47] BALINESE LETTER AKARA..BALINESE LETTER HA
+ 1B34;N           # Mn         BALINESE SIGN REREKAN
+ 1B35;N           # Mc         BALINESE VOWEL SIGN TEDUNG
+ 1B36..1B3A;N     # Mn     [5] BALINESE VOWEL SIGN ULU..BALINESE VOWEL SIGN RA REPA
+ 1B3B;N           # Mc         BALINESE VOWEL SIGN RA REPA TEDUNG
+ 1B3C;N           # Mn         BALINESE VOWEL SIGN LA LENGA
+ 1B3D..1B41;N     # Mc     [5] BALINESE VOWEL SIGN LA LENGA TEDUNG..BALINESE VOWEL SIGN TALING REPA TEDUNG
+ 1B42;N           # Mn         BALINESE VOWEL SIGN PEPET
+ 1B43..1B44;N     # Mc     [2] BALINESE VOWEL SIGN PEPET TEDUNG..BALINESE ADEG ADEG
+ 1B45..1B4B;N     # Lo     [7] BALINESE LETTER KAF SASAK..BALINESE LETTER ASYURA SASAK
+ 1B50..1B59;N     # Nd    [10] BALINESE DIGIT ZERO..BALINESE DIGIT NINE
+ 1B5A..1B60;N     # Po     [7] BALINESE PANTI..BALINESE PAMENENG
+ 1B61..1B6A;N     # So    [10] BALINESE MUSICAL SYMBOL DONG..BALINESE MUSICAL SYMBOL DANG GEDE
+ 1B6B..1B73;N     # Mn     [9] BALINESE MUSICAL SYMBOL COMBINING TEGEH..BALINESE MUSICAL SYMBOL COMBINING GONG
+ 1B74..1B7C;N     # So     [9] BALINESE MUSICAL SYMBOL RIGHT-HAND OPEN DUG..BALINESE MUSICAL SYMBOL LEFT-HAND OPEN PING
+ 1B80..1B81;N     # Mn     [2] SUNDANESE SIGN PANYECEK..SUNDANESE SIGN PANGLAYAR
+ 1B82;N           # Mc         SUNDANESE SIGN PANGWISAD
+ 1B83..1BA0;N     # Lo    [30] SUNDANESE LETTER A..SUNDANESE LETTER HA
+ 1BA1;N           # Mc         SUNDANESE CONSONANT SIGN PAMINGKAL
+ 1BA2..1BA5;N     # Mn     [4] SUNDANESE CONSONANT SIGN PANYAKRA..SUNDANESE VOWEL SIGN PANYUKU
+ 1BA6..1BA7;N     # Mc     [2] SUNDANESE VOWEL SIGN PANAELAENG..SUNDANESE VOWEL SIGN PANOLONG
+ 1BA8..1BA9;N     # Mn     [2] SUNDANESE VOWEL SIGN PAMEPET..SUNDANESE VOWEL SIGN PANEULEUNG
+ 1BAA;N           # Mc         SUNDANESE SIGN PAMAAEH
+ 1BAB..1BAD;N     # Mn     [3] SUNDANESE SIGN VIRAMA..SUNDANESE CONSONANT SIGN PASANGAN WA
+ 1BAE..1BAF;N     # Lo     [2] SUNDANESE LETTER KHA..SUNDANESE LETTER SYA
+ 1BB0..1BB9;N     # Nd    [10] SUNDANESE DIGIT ZERO..SUNDANESE DIGIT NINE
+ 1BBA..1BBF;N     # Lo     [6] SUNDANESE AVAGRAHA..SUNDANESE LETTER FINAL M
+ 1BC0..1BE5;N     # Lo    [38] BATAK LETTER A..BATAK LETTER U
+ 1BE6;N           # Mn         BATAK SIGN TOMPI
+ 1BE7;N           # Mc         BATAK VOWEL SIGN E
+ 1BE8..1BE9;N     # Mn     [2] BATAK VOWEL SIGN PAKPAK E..BATAK VOWEL SIGN EE
+ 1BEA..1BEC;N     # Mc     [3] BATAK VOWEL SIGN I..BATAK VOWEL SIGN O
+ 1BED;N           # Mn         BATAK VOWEL SIGN KARO O
+ 1BEE;N           # Mc         BATAK VOWEL SIGN U
+ 1BEF..1BF1;N     # Mn     [3] BATAK VOWEL SIGN U FOR SIMALUNGUN SA..BATAK CONSONANT SIGN H
+ 1BF2..1BF3;N     # Mc     [2] BATAK PANGOLAT..BATAK PANONGONAN
+ 1BFC..1BFF;N     # Po     [4] BATAK SYMBOL BINDU NA METEK..BATAK SYMBOL BINDU PANGOLAT
+ 1C00..1C23;N     # Lo    [36] LEPCHA LETTER KA..LEPCHA LETTER A
+ 1C24..1C2B;N     # Mc     [8] LEPCHA SUBJOINED LETTER YA..LEPCHA VOWEL SIGN UU
+ 1C2C..1C33;N     # Mn     [8] LEPCHA VOWEL SIGN E..LEPCHA CONSONANT SIGN T
+ 1C34..1C35;N     # Mc     [2] LEPCHA CONSONANT SIGN NYIN-DO..LEPCHA CONSONANT SIGN KANG
+ 1C36..1C37;N     # Mn     [2] LEPCHA SIGN RAN..LEPCHA SIGN NUKTA
+ 1C3B..1C3F;N     # Po     [5] LEPCHA PUNCTUATION TA-ROL..LEPCHA PUNCTUATION TSHOOK
+ 1C40..1C49;N     # Nd    [10] LEPCHA DIGIT ZERO..LEPCHA DIGIT NINE
+ 1C4D..1C4F;N     # Lo     [3] LEPCHA LETTER TTA..LEPCHA LETTER DDA
+ 1C50..1C59;N     # Nd    [10] OL CHIKI DIGIT ZERO..OL CHIKI DIGIT NINE
+ 1C5A..1C77;N     # Lo    [30] OL CHIKI LETTER LA..OL CHIKI LETTER OH
+ 1C78..1C7D;N     # Lm     [6] OL CHIKI MU TTUDDAG..OL CHIKI AHAD
+ 1C7E..1C7F;N     # Po     [2] OL CHIKI PUNCTUATION MUCAAD..OL CHIKI PUNCTUATION DOUBLE MUCAAD
+ 1C80..1C88;N     # Ll     [9] CYRILLIC SMALL LETTER ROUNDED VE..CYRILLIC SMALL LETTER UNBLENDED UK
+ 1C90..1CBA;N     # Lu    [43] GEORGIAN MTAVRULI CAPITAL LETTER AN..GEORGIAN MTAVRULI CAPITAL LETTER AIN
+ 1CBD..1CBF;N     # Lu     [3] GEORGIAN MTAVRULI CAPITAL LETTER AEN..GEORGIAN MTAVRULI CAPITAL LETTER LABIAL SIGN
+ 1CC0..1CC7;N     # Po     [8] SUNDANESE PUNCTUATION BINDU SURYA..SUNDANESE PUNCTUATION BINDU BA SATANGA
+ 1CD0..1CD2;N     # Mn     [3] VEDIC TONE KARSHANA..VEDIC TONE PRENKHA
+ 1CD3;N           # Po         VEDIC SIGN NIHSHVASA
+ 1CD4..1CE0;N     # Mn    [13] VEDIC SIGN YAJURVEDIC MIDLINE SVARITA..VEDIC TONE RIGVEDIC KASHMIRI INDEPENDENT SVARITA
+ 1CE1;N           # Mc         VEDIC TONE ATHARVAVEDIC INDEPENDENT SVARITA
+ 1CE2..1CE8;N     # Mn     [7] VEDIC SIGN VISARGA SVARITA..VEDIC SIGN VISARGA ANUDATTA WITH TAIL
+ 1CE9..1CEC;N     # Lo     [4] VEDIC SIGN ANUSVARA ANTARGOMUKHA..VEDIC SIGN ANUSVARA VAMAGOMUKHA WITH TAIL
+ 1CED;N           # Mn         VEDIC SIGN TIRYAK
+ 1CEE..1CF3;N     # Lo     [6] VEDIC SIGN HEXIFORM LONG ANUSVARA..VEDIC SIGN ROTATED ARDHAVISARGA
+ 1CF4;N           # Mn         VEDIC TONE CANDRA ABOVE
+ 1CF5..1CF6;N     # Lo     [2] VEDIC SIGN JIHVAMULIYA..VEDIC SIGN UPADHMANIYA
+ 1CF7;N           # Mc         VEDIC SIGN ATIKRAMA
+ 1CF8..1CF9;N     # Mn     [2] VEDIC TONE RING ABOVE..VEDIC TONE DOUBLE RING ABOVE
+ 1CFA;N           # Lo         VEDIC SIGN DOUBLE ANUSVARA ANTARGOMUKHA
+ 1D00..1D2B;N     # Ll    [44] LATIN LETTER SMALL CAPITAL A..CYRILLIC LETTER SMALL CAPITAL EL
+ 1D2C..1D6A;N     # Lm    [63] MODIFIER LETTER CAPITAL A..GREEK SUBSCRIPT SMALL LETTER CHI
+ 1D6B..1D77;N     # Ll    [13] LATIN SMALL LETTER UE..LATIN SMALL LETTER TURNED G
+ 1D78;N           # Lm         MODIFIER LETTER CYRILLIC EN
+ 1D79..1D7F;N     # Ll     [7] LATIN SMALL LETTER INSULAR G..LATIN SMALL LETTER UPSILON WITH STROKE
+ 1D80..1D9A;N     # Ll    [27] LATIN SMALL LETTER B WITH PALATAL HOOK..LATIN SMALL LETTER EZH WITH RETROFLEX HOOK
+ 1D9B..1DBF;N     # Lm    [37] MODIFIER LETTER SMALL TURNED ALPHA..MODIFIER LETTER SMALL THETA
+ 1DC0..1DF9;N     # Mn    [58] COMBINING DOTTED GRAVE ACCENT..COMBINING WIDE INVERTED BRIDGE BELOW
+ 1DFB..1DFF;N     # Mn     [5] COMBINING DELETION MARK..COMBINING RIGHT ARROWHEAD AND DOWN ARROWHEAD BELOW
+ 1E00..1EFF;N     # L&   [256] LATIN CAPITAL LETTER A WITH RING BELOW..LATIN SMALL LETTER Y WITH LOOP
+ 1F00..1F15;N     # L&    [22] GREEK SMALL LETTER ALPHA WITH PSILI..GREEK SMALL LETTER EPSILON WITH DASIA AND OXIA
+ 1F18..1F1D;N     # Lu     [6] GREEK CAPITAL LETTER EPSILON WITH PSILI..GREEK CAPITAL LETTER EPSILON WITH DASIA AND OXIA
+ 1F20..1F45;N     # L&    [38] GREEK SMALL LETTER ETA WITH PSILI..GREEK SMALL LETTER OMICRON WITH DASIA AND OXIA
+ 1F48..1F4D;N     # Lu     [6] GREEK CAPITAL LETTER OMICRON WITH PSILI..GREEK CAPITAL LETTER OMICRON WITH DASIA AND OXIA
+ 1F50..1F57;N     # Ll     [8] GREEK SMALL LETTER UPSILON WITH PSILI..GREEK SMALL LETTER UPSILON WITH DASIA AND PERISPOMENI
+ 1F59;N           # Lu         GREEK CAPITAL LETTER UPSILON WITH DASIA
+ 1F5B;N           # Lu         GREEK CAPITAL LETTER UPSILON WITH DASIA AND VARIA
+ 1F5D;N           # Lu         GREEK CAPITAL LETTER UPSILON WITH DASIA AND OXIA
+ 1F5F..1F7D;N     # L&    [31] GREEK CAPITAL LETTER UPSILON WITH DASIA AND PERISPOMENI..GREEK SMALL LETTER OMEGA WITH OXIA
+ 1F80..1FB4;N     # L&    [53] GREEK SMALL LETTER ALPHA WITH PSILI AND YPOGEGRAMMENI..GREEK SMALL LETTER ALPHA WITH OXIA AND YPOGEGRAMMENI
+ 1FB6..1FBC;N     # L&     [7] GREEK SMALL LETTER ALPHA WITH PERISPOMENI..GREEK CAPITAL LETTER ALPHA WITH PROSGEGRAMMENI
+ 1FBD;N           # Sk         GREEK KORONIS
+ 1FBE;N           # Ll         GREEK PROSGEGRAMMENI
+ 1FBF..1FC1;N     # Sk     [3] GREEK PSILI..GREEK DIALYTIKA AND PERISPOMENI
+ 1FC2..1FC4;N     # Ll     [3] GREEK SMALL LETTER ETA WITH VARIA AND YPOGEGRAMMENI..GREEK SMALL LETTER ETA WITH OXIA AND YPOGEGRAMMENI
+ 1FC6..1FCC;N     # L&     [7] GREEK SMALL LETTER ETA WITH PERISPOMENI..GREEK CAPITAL LETTER ETA WITH PROSGEGRAMMENI
+ 1FCD..1FCF;N     # Sk     [3] GREEK PSILI AND VARIA..GREEK PSILI AND PERISPOMENI
+ 1FD0..1FD3;N     # Ll     [4] GREEK SMALL LETTER IOTA WITH VRACHY..GREEK SMALL LETTER IOTA WITH DIALYTIKA AND OXIA
+ 1FD6..1FDB;N     # L&     [6] GREEK SMALL LETTER IOTA WITH PERISPOMENI..GREEK CAPITAL LETTER IOTA WITH OXIA
+ 1FDD..1FDF;N     # Sk     [3] GREEK DASIA AND VARIA..GREEK DASIA AND PERISPOMENI
+ 1FE0..1FEC;N     # L&    [13] GREEK SMALL LETTER UPSILON WITH VRACHY..GREEK CAPITAL LETTER RHO WITH DASIA
+ 1FED..1FEF;N     # Sk     [3] GREEK DIALYTIKA AND VARIA..GREEK VARIA
+ 1FF2..1FF4;N     # Ll     [3] GREEK SMALL LETTER OMEGA WITH VARIA AND YPOGEGRAMMENI..GREEK SMALL LETTER OMEGA WITH OXIA AND YPOGEGRAMMENI
+ 1FF6..1FFC;N     # L&     [7] GREEK SMALL LETTER OMEGA WITH PERISPOMENI..GREEK CAPITAL LETTER OMEGA WITH PROSGEGRAMMENI
+ 1FFD..1FFE;N     # Sk     [2] GREEK OXIA..GREEK DASIA
+ 2000..200A;N     # Zs    [11] EN QUAD..HAIR SPACE
+ 200B..200F;N     # Cf     [5] ZERO WIDTH SPACE..RIGHT-TO-LEFT MARK
+ 2010;A           # Pd         HYPHEN
+ 2011..2012;N     # Pd     [2] NON-BREAKING HYPHEN..FIGURE DASH
+ 2013..2015;A     # Pd     [3] EN DASH..HORIZONTAL BAR
+ 2016;A           # Po         DOUBLE VERTICAL LINE
+ 2017;N           # Po         DOUBLE LOW LINE
+ 2018;A           # Pi         LEFT SINGLE QUOTATION MARK
+ 2019;A           # Pf         RIGHT SINGLE QUOTATION MARK
+ 201A;N           # Ps         SINGLE LOW-9 QUOTATION MARK
+ 201B;N           # Pi         SINGLE HIGH-REVERSED-9 QUOTATION MARK
+ 201C;A           # Pi         LEFT DOUBLE QUOTATION MARK
+ 201D;A           # Pf         RIGHT DOUBLE QUOTATION MARK
+ 201E;N           # Ps         DOUBLE LOW-9 QUOTATION MARK
+ 201F;N           # Pi         DOUBLE HIGH-REVERSED-9 QUOTATION MARK
+ 2020..2022;A     # Po     [3] DAGGER..BULLET
+ 2023;N           # Po         TRIANGULAR BULLET
+ 2024..2027;A     # Po     [4] ONE DOT LEADER..HYPHENATION POINT
+ 2028;N           # Zl         LINE SEPARATOR
+ 2029;N           # Zp         PARAGRAPH SEPARATOR
+ 202A..202E;N     # Cf     [5] LEFT-TO-RIGHT EMBEDDING..RIGHT-TO-LEFT OVERRIDE
+ 202F;N           # Zs         NARROW NO-BREAK SPACE
+ 2030;A           # Po         PER MILLE SIGN
+ 2031;N           # Po         PER TEN THOUSAND SIGN
+ 2032..2033;A     # Po     [2] PRIME..DOUBLE PRIME
+ 2034;N           # Po         TRIPLE PRIME
+ 2035;A           # Po         REVERSED PRIME
+ 2036..2038;N     # Po     [3] REVERSED DOUBLE PRIME..CARET
+ 2039;N           # Pi         SINGLE LEFT-POINTING ANGLE QUOTATION MARK
+ 203A;N           # Pf         SINGLE RIGHT-POINTING ANGLE QUOTATION MARK
+ 203B;A           # Po         REFERENCE MARK
+ 203C..203D;N     # Po     [2] DOUBLE EXCLAMATION MARK..INTERROBANG
+ 203E;A           # Po         OVERLINE
+ 203F..2040;N     # Pc     [2] UNDERTIE..CHARACTER TIE
+ 2041..2043;N     # Po     [3] CARET INSERTION POINT..HYPHEN BULLET
+ 2044;N           # Sm         FRACTION SLASH
+ 2045;N           # Ps         LEFT SQUARE BRACKET WITH QUILL
+ 2046;N           # Pe         RIGHT SQUARE BRACKET WITH QUILL
+ 2047..2051;N     # Po    [11] DOUBLE QUESTION MARK..TWO ASTERISKS ALIGNED VERTICALLY
+ 2052;N           # Sm         COMMERCIAL MINUS SIGN
+ 2053;N           # Po         SWUNG DASH
+ 2054;N           # Pc         INVERTED UNDERTIE
+ 2055..205E;N     # Po    [10] FLOWER PUNCTUATION MARK..VERTICAL FOUR DOTS
+ 205F;N           # Zs         MEDIUM MATHEMATICAL SPACE
+ 2060..2064;N     # Cf     [5] WORD JOINER..INVISIBLE PLUS
+ 2066..206F;N     # Cf    [10] LEFT-TO-RIGHT ISOLATE..NOMINAL DIGIT SHAPES
+ 2070;N           # No         SUPERSCRIPT ZERO
+ 2071;N           # Lm         SUPERSCRIPT LATIN SMALL LETTER I
+ 2074;A           # No         SUPERSCRIPT FOUR
+ 2075..2079;N     # No     [5] SUPERSCRIPT FIVE..SUPERSCRIPT NINE
+ 207A..207C;N     # Sm     [3] SUPERSCRIPT PLUS SIGN..SUPERSCRIPT EQUALS SIGN
+ 207D;N           # Ps         SUPERSCRIPT LEFT PARENTHESIS
+ 207E;N           # Pe         SUPERSCRIPT RIGHT PARENTHESIS
+ 207F;A           # Lm         SUPERSCRIPT LATIN SMALL LETTER N
+ 2080;N           # No         SUBSCRIPT ZERO
+ 2081..2084;A     # No     [4] SUBSCRIPT ONE..SUBSCRIPT FOUR
+ 2085..2089;N     # No     [5] SUBSCRIPT FIVE..SUBSCRIPT NINE
+ 208A..208C;N     # Sm     [3] SUBSCRIPT PLUS SIGN..SUBSCRIPT EQUALS SIGN
+ 208D;N           # Ps         SUBSCRIPT LEFT PARENTHESIS
+ 208E;N           # Pe         SUBSCRIPT RIGHT PARENTHESIS
+ 2090..209C;N     # Lm    [13] LATIN SUBSCRIPT SMALL LETTER A..LATIN SUBSCRIPT SMALL LETTER T
+ 20A0..20A8;N     # Sc     [9] EURO-CURRENCY SIGN..RUPEE SIGN
+ 20A9;H           # Sc         WON SIGN
+ 20AA..20AB;N     # Sc     [2] NEW SHEQEL SIGN..DONG SIGN
+ 20AC;A           # Sc         EURO SIGN
+ 20AD..20BF;N     # Sc    [19] KIP SIGN..BITCOIN SIGN
+ 20D0..20DC;N     # Mn    [13] COMBINING LEFT HARPOON ABOVE..COMBINING FOUR DOTS ABOVE
+ 20DD..20E0;N     # Me     [4] COMBINING ENCLOSING CIRCLE..COMBINING ENCLOSING CIRCLE BACKSLASH
+ 20E1;N           # Mn         COMBINING LEFT RIGHT ARROW ABOVE
+ 20E2..20E4;N     # Me     [3] COMBINING ENCLOSING SCREEN..COMBINING ENCLOSING UPWARD POINTING TRIANGLE
+ 20E5..20F0;N     # Mn    [12] COMBINING REVERSE SOLIDUS OVERLAY..COMBINING ASTERISK ABOVE
+ 2100..2101;N     # So     [2] ACCOUNT OF..ADDRESSED TO THE SUBJECT
+ 2102;N           # Lu         DOUBLE-STRUCK CAPITAL C
+ 2103;A           # So         DEGREE CELSIUS
+ 2104;N           # So         CENTRE LINE SYMBOL
+ 2105;A           # So         CARE OF
+ 2106;N           # So         CADA UNA
+ 2107;N           # Lu         EULER CONSTANT
+ 2108;N           # So         SCRUPLE
+ 2109;A           # So         DEGREE FAHRENHEIT
+ 210A..2112;N     # L&     [9] SCRIPT SMALL G..SCRIPT CAPITAL L
+ 2113;A           # Ll         SCRIPT SMALL L
+ 2114;N           # So         L B BAR SYMBOL
+ 2115;N           # Lu         DOUBLE-STRUCK CAPITAL N
+ 2116;A           # So         NUMERO SIGN
+ 2117;N           # So         SOUND RECORDING COPYRIGHT
+ 2118;N           # Sm         SCRIPT CAPITAL P
+ 2119..211D;N     # Lu     [5] DOUBLE-STRUCK CAPITAL P..DOUBLE-STRUCK CAPITAL R
+ 211E..2120;N     # So     [3] PRESCRIPTION TAKE..SERVICE MARK
+ 2121..2122;A     # So     [2] TELEPHONE SIGN..TRADE MARK SIGN
+ 2123;N           # So         VERSICLE
+ 2124;N           # Lu         DOUBLE-STRUCK CAPITAL Z
+ 2125;N           # So         OUNCE SIGN
+ 2126;A           # Lu         OHM SIGN
+ 2127;N           # So         INVERTED OHM SIGN
+ 2128;N           # Lu         BLACK-LETTER CAPITAL Z
+ 2129;N           # So         TURNED GREEK SMALL LETTER IOTA
+ 212A;N           # Lu         KELVIN SIGN
+ 212B;A           # Lu         ANGSTROM SIGN
+ 212C..212D;N     # Lu     [2] SCRIPT CAPITAL B..BLACK-LETTER CAPITAL C
+ 212E;N           # So         ESTIMATED SYMBOL
+ 212F..2134;N     # L&     [6] SCRIPT SMALL E..SCRIPT SMALL O
+ 2135..2138;N     # Lo     [4] ALEF SYMBOL..DALET SYMBOL
+ 2139;N           # Ll         INFORMATION SOURCE
+ 213A..213B;N     # So     [2] ROTATED CAPITAL Q..FACSIMILE SIGN
+ 213C..213F;N     # L&     [4] DOUBLE-STRUCK SMALL PI..DOUBLE-STRUCK CAPITAL PI
+ 2140..2144;N     # Sm     [5] DOUBLE-STRUCK N-ARY SUMMATION..TURNED SANS-SERIF CAPITAL Y
+ 2145..2149;N     # L&     [5] DOUBLE-STRUCK ITALIC CAPITAL D..DOUBLE-STRUCK ITALIC SMALL J
+ 214A;N           # So         PROPERTY LINE
+ 214B;N           # Sm         TURNED AMPERSAND
+ 214C..214D;N     # So     [2] PER SIGN..AKTIESELSKAB
+ 214E;N           # Ll         TURNED SMALL F
+ 214F;N           # So         SYMBOL FOR SAMARITAN SOURCE
+ 2150..2152;N     # No     [3] VULGAR FRACTION ONE SEVENTH..VULGAR FRACTION ONE TENTH
+ 2153..2154;A     # No     [2] VULGAR FRACTION ONE THIRD..VULGAR FRACTION TWO THIRDS
+ 2155..215A;N     # No     [6] VULGAR FRACTION ONE FIFTH..VULGAR FRACTION FIVE SIXTHS
+ 215B..215E;A     # No     [4] VULGAR FRACTION ONE EIGHTH..VULGAR FRACTION SEVEN EIGHTHS
+ 215F;N           # No         FRACTION NUMERATOR ONE
+ 2160..216B;A     # Nl    [12] ROMAN NUMERAL ONE..ROMAN NUMERAL TWELVE
+ 216C..216F;N     # Nl     [4] ROMAN NUMERAL FIFTY..ROMAN NUMERAL ONE THOUSAND
+ 2170..2179;A     # Nl    [10] SMALL ROMAN NUMERAL ONE..SMALL ROMAN NUMERAL TEN
+ 217A..2182;N     # Nl     [9] SMALL ROMAN NUMERAL ELEVEN..ROMAN NUMERAL TEN THOUSAND
+ 2183..2184;N     # L&     [2] ROMAN NUMERAL REVERSED ONE HUNDRED..LATIN SMALL LETTER REVERSED C
+ 2185..2188;N     # Nl     [4] ROMAN NUMERAL SIX LATE FORM..ROMAN NUMERAL ONE HUNDRED THOUSAND
+ 2189;A           # No         VULGAR FRACTION ZERO THIRDS
+ 218A..218B;N     # So     [2] TURNED DIGIT TWO..TURNED DIGIT THREE
+ 2190..2194;A     # Sm     [5] LEFTWARDS ARROW..LEFT RIGHT ARROW
+ 2195..2199;A     # So     [5] UP DOWN ARROW..SOUTH WEST ARROW
+ 219A..219B;N     # Sm     [2] LEFTWARDS ARROW WITH STROKE..RIGHTWARDS ARROW WITH STROKE
+ 219C..219F;N     # So     [4] LEFTWARDS WAVE ARROW..UPWARDS TWO HEADED ARROW
+ 21A0;N           # Sm         RIGHTWARDS TWO HEADED ARROW
+ 21A1..21A2;N     # So     [2] DOWNWARDS TWO HEADED ARROW..LEFTWARDS ARROW WITH TAIL
+ 21A3;N           # Sm         RIGHTWARDS ARROW WITH TAIL
+ 21A4..21A5;N     # So     [2] LEFTWARDS ARROW FROM BAR..UPWARDS ARROW FROM BAR
+ 21A6;N           # Sm         RIGHTWARDS ARROW FROM BAR
+ 21A7..21AD;N     # So     [7] DOWNWARDS ARROW FROM BAR..LEFT RIGHT WAVE ARROW
+ 21AE;N           # Sm         LEFT RIGHT ARROW WITH STROKE
+ 21AF..21B7;N     # So     [9] DOWNWARDS ZIGZAG ARROW..CLOCKWISE TOP SEMICIRCLE ARROW
+ 21B8..21B9;A     # So     [2] NORTH WEST ARROW TO LONG BAR..LEFTWARDS ARROW TO BAR OVER RIGHTWARDS ARROW TO BAR
+ 21BA..21CD;N     # So    [20] ANTICLOCKWISE OPEN CIRCLE ARROW..LEFTWARDS DOUBLE ARROW WITH STROKE
+ 21CE..21CF;N     # Sm     [2] LEFT RIGHT DOUBLE ARROW WITH STROKE..RIGHTWARDS DOUBLE ARROW WITH STROKE
+ 21D0..21D1;N     # So     [2] LEFTWARDS DOUBLE ARROW..UPWARDS DOUBLE ARROW
+ 21D2;A           # Sm         RIGHTWARDS DOUBLE ARROW
+ 21D3;N           # So         DOWNWARDS DOUBLE ARROW
+ 21D4;A           # Sm         LEFT RIGHT DOUBLE ARROW
+ 21D5..21E6;N     # So    [18] UP DOWN DOUBLE ARROW..LEFTWARDS WHITE ARROW
+ 21E7;A           # So         UPWARDS WHITE ARROW
+ 21E8..21F3;N     # So    [12] RIGHTWARDS WHITE ARROW..UP DOWN WHITE ARROW
+ 21F4..21FF;N     # Sm    [12] RIGHT ARROW WITH SMALL CIRCLE..LEFT RIGHT OPEN-HEADED ARROW
+ 2200;A           # Sm         FOR ALL
+ 2201;N           # Sm         COMPLEMENT
+ 2202..2203;A     # Sm     [2] PARTIAL DIFFERENTIAL..THERE EXISTS
+ 2204..2206;N     # Sm     [3] THERE DOES NOT EXIST..INCREMENT
+ 2207..2208;A     # Sm     [2] NABLA..ELEMENT OF
+ 2209..220A;N     # Sm     [2] NOT AN ELEMENT OF..SMALL ELEMENT OF
+ 220B;A           # Sm         CONTAINS AS MEMBER
+ 220C..220E;N     # Sm     [3] DOES NOT CONTAIN AS MEMBER..END OF PROOF
+ 220F;A           # Sm         N-ARY PRODUCT
+ 2210;N           # Sm         N-ARY COPRODUCT
+ 2211;A           # Sm         N-ARY SUMMATION
+ 2212..2214;N     # Sm     [3] MINUS SIGN..DOT PLUS
+ 2215;A           # Sm         DIVISION SLASH
+ 2216..2219;N     # Sm     [4] SET MINUS..BULLET OPERATOR
+ 221A;A           # Sm         SQUARE ROOT
+ 221B..221C;N     # Sm     [2] CUBE ROOT..FOURTH ROOT
+ 221D..2220;A     # Sm     [4] PROPORTIONAL TO..ANGLE
+ 2221..2222;N     # Sm     [2] MEASURED ANGLE..SPHERICAL ANGLE
+ 2223;A           # Sm         DIVIDES
+ 2224;N           # Sm         DOES NOT DIVIDE
+ 2225;A           # Sm         PARALLEL TO
+ 2226;N           # Sm         NOT PARALLEL TO
+ 2227..222C;A     # Sm     [6] LOGICAL AND..DOUBLE INTEGRAL
+ 222D;N           # Sm         TRIPLE INTEGRAL
+ 222E;A           # Sm         CONTOUR INTEGRAL
+ 222F..2233;N     # Sm     [5] SURFACE INTEGRAL..ANTICLOCKWISE CONTOUR INTEGRAL
+ 2234..2237;A     # Sm     [4] THEREFORE..PROPORTION
+ 2238..223B;N     # Sm     [4] DOT MINUS..HOMOTHETIC
+ 223C..223D;A     # Sm     [2] TILDE OPERATOR..REVERSED TILDE
+ 223E..2247;N     # Sm    [10] INVERTED LAZY S..NEITHER APPROXIMATELY NOR ACTUALLY EQUAL TO
+ 2248;A           # Sm         ALMOST EQUAL TO
+ 2249..224B;N     # Sm     [3] NOT ALMOST EQUAL TO..TRIPLE TILDE
+ 224C;A           # Sm         ALL EQUAL TO
+ 224D..2251;N     # Sm     [5] EQUIVALENT TO..GEOMETRICALLY EQUAL TO
+ 2252;A           # Sm         APPROXIMATELY EQUAL TO OR THE IMAGE OF
+ 2253..225F;N     # Sm    [13] IMAGE OF OR APPROXIMATELY EQUAL TO..QUESTIONED EQUAL TO
+ 2260..2261;A     # Sm     [2] NOT EQUAL TO..IDENTICAL TO
+ 2262..2263;N     # Sm     [2] NOT IDENTICAL TO..STRICTLY EQUIVALENT TO
+ 2264..2267;A     # Sm     [4] LESS-THAN OR EQUAL TO..GREATER-THAN OVER EQUAL TO
+ 2268..2269;N     # Sm     [2] LESS-THAN BUT NOT EQUAL TO..GREATER-THAN BUT NOT EQUAL TO
+ 226A..226B;A     # Sm     [2] MUCH LESS-THAN..MUCH GREATER-THAN
+ 226C..226D;N     # Sm     [2] BETWEEN..NOT EQUIVALENT TO
+ 226E..226F;A     # Sm     [2] NOT LESS-THAN..NOT GREATER-THAN
+ 2270..2281;N     # Sm    [18] NEITHER LESS-THAN NOR EQUAL TO..DOES NOT SUCCEED
+ 2282..2283;A     # Sm     [2] SUBSET OF..SUPERSET OF
+ 2284..2285;N     # Sm     [2] NOT A SUBSET OF..NOT A SUPERSET OF
+ 2286..2287;A     # Sm     [2] SUBSET OF OR EQUAL TO..SUPERSET OF OR EQUAL TO
+ 2288..2294;N     # Sm    [13] NEITHER A SUBSET OF NOR EQUAL TO..SQUARE CUP
+ 2295;A           # Sm         CIRCLED PLUS
+ 2296..2298;N     # Sm     [3] CIRCLED MINUS..CIRCLED DIVISION SLASH
+ 2299;A           # Sm         CIRCLED DOT OPERATOR
+ 229A..22A4;N     # Sm    [11] CIRCLED RING OPERATOR..DOWN TACK
+ 22A5;A           # Sm         UP TACK
+ 22A6..22BE;N     # Sm    [25] ASSERTION..RIGHT ANGLE WITH ARC
+ 22BF;A           # Sm         RIGHT TRIANGLE
+ 22C0..22FF;N     # Sm    [64] N-ARY LOGICAL AND..Z NOTATION BAG MEMBERSHIP
+ 2300..2307;N     # So     [8] DIAMETER SIGN..WAVY LINE
+ 2308;N           # Ps         LEFT CEILING
+ 2309;N           # Pe         RIGHT CEILING
+ 230A;N           # Ps         LEFT FLOOR
+ 230B;N           # Pe         RIGHT FLOOR
+ 230C..2311;N     # So     [6] BOTTOM RIGHT CROP..SQUARE LOZENGE
+ 2312;A           # So         ARC
+ 2313..2319;N     # So     [7] SEGMENT..TURNED NOT SIGN
+ 231A..231B;W     # So     [2] WATCH..HOURGLASS
+ 231C..231F;N     # So     [4] TOP LEFT CORNER..BOTTOM RIGHT CORNER
+ 2320..2321;N     # Sm     [2] TOP HALF INTEGRAL..BOTTOM HALF INTEGRAL
+ 2322..2328;N     # So     [7] FROWN..KEYBOARD
+ 2329;W           # Ps         LEFT-POINTING ANGLE BRACKET
+ 232A;W           # Pe         RIGHT-POINTING ANGLE BRACKET
+ 232B..237B;N     # So    [81] ERASE TO THE LEFT..NOT CHECK MARK
+ 237C;N           # Sm         RIGHT ANGLE WITH DOWNWARDS ZIGZAG ARROW
+ 237D..239A;N     # So    [30] SHOULDERED OPEN BOX..CLEAR SCREEN SYMBOL
+ 239B..23B3;N     # Sm    [25] LEFT PARENTHESIS UPPER HOOK..SUMMATION BOTTOM
+ 23B4..23DB;N     # So    [40] TOP SQUARE BRACKET..FUSE
+ 23DC..23E1;N     # Sm     [6] TOP PARENTHESIS..BOTTOM TORTOISE SHELL BRACKET
+ 23E2..23E8;N     # So     [7] WHITE TRAPEZIUM..DECIMAL EXPONENT SYMBOL
+ 23E9..23EC;W     # So     [4] BLACK RIGHT-POINTING DOUBLE TRIANGLE..BLACK DOWN-POINTING DOUBLE TRIANGLE
+ 23ED..23EF;N     # So     [3] BLACK RIGHT-POINTING DOUBLE TRIANGLE WITH VERTICAL BAR..BLACK RIGHT-POINTING TRIANGLE WITH DOUBLE VERTICAL BAR
+ 23F0;W           # So         ALARM CLOCK
+ 23F1..23F2;N     # So     [2] STOPWATCH..TIMER CLOCK
+ 23F3;W           # So         HOURGLASS WITH FLOWING SAND
+ 23F4..23FF;N     # So    [12] BLACK MEDIUM LEFT-POINTING TRIANGLE..OBSERVER EYE SYMBOL
+ 2400..2426;N     # So    [39] SYMBOL FOR NULL..SYMBOL FOR SUBSTITUTE FORM TWO
+ 2440..244A;N     # So    [11] OCR HOOK..OCR DOUBLE BACKSLASH
+ 2460..249B;A     # No    [60] CIRCLED DIGIT ONE..NUMBER TWENTY FULL STOP
+ 249C..24E9;A     # So    [78] PARENTHESIZED LATIN SMALL LETTER A..CIRCLED LATIN SMALL LETTER Z
+ 24EA;N           # No         CIRCLED DIGIT ZERO
+ 24EB..24FF;A     # No    [21] NEGATIVE CIRCLED NUMBER ELEVEN..NEGATIVE CIRCLED DIGIT ZERO
+ 2500..254B;A     # So    [76] BOX DRAWINGS LIGHT HORIZONTAL..BOX DRAWINGS HEAVY VERTICAL AND HORIZONTAL
+ 254C..254F;N     # So     [4] BOX DRAWINGS LIGHT DOUBLE DASH HORIZONTAL..BOX DRAWINGS HEAVY DOUBLE DASH VERTICAL
+ 2550..2573;A     # So    [36] BOX DRAWINGS DOUBLE HORIZONTAL..BOX DRAWINGS LIGHT DIAGONAL CROSS
+ 2574..257F;N     # So    [12] BOX DRAWINGS LIGHT LEFT..BOX DRAWINGS HEAVY UP AND LIGHT DOWN
+ 2580..258F;A     # So    [16] UPPER HALF BLOCK..LEFT ONE EIGHTH BLOCK
+ 2590..2591;N     # So     [2] RIGHT HALF BLOCK..LIGHT SHADE
+ 2592..2595;A     # So     [4] MEDIUM SHADE..RIGHT ONE EIGHTH BLOCK
+ 2596..259F;N     # So    [10] QUADRANT LOWER LEFT..QUADRANT UPPER RIGHT AND LOWER LEFT AND LOWER RIGHT
+ 25A0..25A1;A     # So     [2] BLACK SQUARE..WHITE SQUARE
+ 25A2;N           # So         WHITE SQUARE WITH ROUNDED CORNERS
+ 25A3..25A9;A     # So     [7] WHITE SQUARE CONTAINING BLACK SMALL SQUARE..SQUARE WITH DIAGONAL CROSSHATCH FILL
+ 25AA..25B1;N     # So     [8] BLACK SMALL SQUARE..WHITE PARALLELOGRAM
+ 25B2..25B3;A     # So     [2] BLACK UP-POINTING TRIANGLE..WHITE UP-POINTING TRIANGLE
+ 25B4..25B5;N     # So     [2] BLACK UP-POINTING SMALL TRIANGLE..WHITE UP-POINTING SMALL TRIANGLE
+ 25B6;A           # So         BLACK RIGHT-POINTING TRIANGLE
+ 25B7;A           # Sm         WHITE RIGHT-POINTING TRIANGLE
+ 25B8..25BB;N     # So     [4] BLACK RIGHT-POINTING SMALL TRIANGLE..WHITE RIGHT-POINTING POINTER
+ 25BC..25BD;A     # So     [2] BLACK DOWN-POINTING TRIANGLE..WHITE DOWN-POINTING TRIANGLE
+ 25BE..25BF;N     # So     [2] BLACK DOWN-POINTING SMALL TRIANGLE..WHITE DOWN-POINTING SMALL TRIANGLE
+ 25C0;A           # So         BLACK LEFT-POINTING TRIANGLE
+ 25C1;A           # Sm         WHITE LEFT-POINTING TRIANGLE
+ 25C2..25C5;N     # So     [4] BLACK LEFT-POINTING SMALL TRIANGLE..WHITE LEFT-POINTING POINTER
+ 25C6..25C8;A     # So     [3] BLACK DIAMOND..WHITE DIAMOND CONTAINING BLACK SMALL DIAMOND
+ 25C9..25CA;N     # So     [2] FISHEYE..LOZENGE
+ 25CB;A           # So         WHITE CIRCLE
+ 25CC..25CD;N     # So     [2] DOTTED CIRCLE..CIRCLE WITH VERTICAL FILL
+ 25CE..25D1;A     # So     [4] BULLSEYE..CIRCLE WITH RIGHT HALF BLACK
+ 25D2..25E1;N     # So    [16] CIRCLE WITH LOWER HALF BLACK..LOWER HALF CIRCLE
+ 25E2..25E5;A     # So     [4] BLACK LOWER RIGHT TRIANGLE..BLACK UPPER RIGHT TRIANGLE
+ 25E6..25EE;N     # So     [9] WHITE BULLET..UP-POINTING TRIANGLE WITH RIGHT HALF BLACK
+ 25EF;A           # So         LARGE CIRCLE
+ 25F0..25F7;N     # So     [8] WHITE SQUARE WITH UPPER LEFT QUADRANT..WHITE CIRCLE WITH UPPER RIGHT QUADRANT
+ 25F8..25FC;N     # Sm     [5] UPPER LEFT TRIANGLE..BLACK MEDIUM SQUARE
+ 25FD..25FE;W     # Sm     [2] WHITE MEDIUM SMALL SQUARE..BLACK MEDIUM SMALL SQUARE
+ 25FF;N           # Sm         LOWER RIGHT TRIANGLE
+ 2600..2604;N     # So     [5] BLACK SUN WITH RAYS..COMET
+ 2605..2606;A     # So     [2] BLACK STAR..WHITE STAR
+ 2607..2608;N     # So     [2] LIGHTNING..THUNDERSTORM
+ 2609;A           # So         SUN
+ 260A..260D;N     # So     [4] ASCENDING NODE..OPPOSITION
+ 260E..260F;A     # So     [2] BLACK TELEPHONE..WHITE TELEPHONE
+ 2610..2613;N     # So     [4] BALLOT BOX..SALTIRE
+ 2614..2615;W     # So     [2] UMBRELLA WITH RAIN DROPS..HOT BEVERAGE
+ 2616..261B;N     # So     [6] WHITE SHOGI PIECE..BLACK RIGHT POINTING INDEX
+ 261C;A           # So         WHITE LEFT POINTING INDEX
+ 261D;N           # So         WHITE UP POINTING INDEX
+ 261E;A           # So         WHITE RIGHT POINTING INDEX
+ 261F..263F;N     # So    [33] WHITE DOWN POINTING INDEX..MERCURY
+ 2640;A           # So         FEMALE SIGN
+ 2641;N           # So         EARTH
+ 2642;A           # So         MALE SIGN
+ 2643..2647;N     # So     [5] JUPITER..PLUTO
+ 2648..2653;W     # So    [12] ARIES..PISCES
+ 2654..265F;N     # So    [12] WHITE CHESS KING..BLACK CHESS PAWN
+ 2660..2661;A     # So     [2] BLACK SPADE SUIT..WHITE HEART SUIT
+ 2662;N           # So         WHITE DIAMOND SUIT
+ 2663..2665;A     # So     [3] BLACK CLUB SUIT..BLACK HEART SUIT
+ 2666;N           # So         BLACK DIAMOND SUIT
+ 2667..266A;A     # So     [4] WHITE CLUB SUIT..EIGHTH NOTE
+ 266B;N           # So         BEAMED EIGHTH NOTES
+ 266C..266D;A     # So     [2] BEAMED SIXTEENTH NOTES..MUSIC FLAT SIGN
+ 266E;N           # So         MUSIC NATURAL SIGN
+ 266F;A           # Sm         MUSIC SHARP SIGN
+ 2670..267E;N     # So    [15] WEST SYRIAC CROSS..PERMANENT PAPER SIGN
+ 267F;W           # So         WHEELCHAIR SYMBOL
+ 2680..2692;N     # So    [19] DIE FACE-1..HAMMER AND PICK
+ 2693;W           # So         ANCHOR
+ 2694..269D;N     # So    [10] CROSSED SWORDS..OUTLINED WHITE STAR
+ 269E..269F;A     # So     [2] THREE LINES CONVERGING RIGHT..THREE LINES CONVERGING LEFT
+ 26A0;N           # So         WARNING SIGN
+ 26A1;W           # So         HIGH VOLTAGE SIGN
+ 26A2..26A9;N     # So     [8] DOUBLED FEMALE SIGN..HORIZONTAL MALE WITH STROKE SIGN
+ 26AA..26AB;W     # So     [2] MEDIUM WHITE CIRCLE..MEDIUM BLACK CIRCLE
+ 26AC..26BC;N     # So    [17] MEDIUM SMALL WHITE CIRCLE..SESQUIQUADRATE
+ 26BD..26BE;W     # So     [2] SOCCER BALL..BASEBALL
+ 26BF;A           # So         SQUARED KEY
+ 26C0..26C3;N     # So     [4] WHITE DRAUGHTS MAN..BLACK DRAUGHTS KING
+ 26C4..26C5;W     # So     [2] SNOWMAN WITHOUT SNOW..SUN BEHIND CLOUD
+ 26C6..26CD;A     # So     [8] RAIN..DISABLED CAR
+ 26CE;W           # So         OPHIUCHUS
+ 26CF..26D3;A     # So     [5] PICK..CHAINS
+ 26D4;W           # So         NO ENTRY
+ 26D5..26E1;A     # So    [13] ALTERNATE ONE-WAY LEFT WAY TRAFFIC..RESTRICTED LEFT ENTRY-2
+ 26E2;N           # So         ASTRONOMICAL SYMBOL FOR URANUS
+ 26E3;A           # So         HEAVY CIRCLE WITH STROKE AND TWO DOTS ABOVE
+ 26E4..26E7;N     # So     [4] PENTAGRAM..INVERTED PENTAGRAM
+ 26E8..26E9;A     # So     [2] BLACK CROSS ON SHIELD..SHINTO SHRINE
+ 26EA;W           # So         CHURCH
+ 26EB..26F1;A     # So     [7] CASTLE..UMBRELLA ON GROUND
+ 26F2..26F3;W     # So     [2] FOUNTAIN..FLAG IN HOLE
+ 26F4;A           # So         FERRY
+ 26F5;W           # So         SAILBOAT
+ 26F6..26F9;A     # So     [4] SQUARE FOUR CORNERS..PERSON WITH BALL
+ 26FA;W           # So         TENT
+ 26FB..26FC;A     # So     [2] JAPANESE BANK SYMBOL..HEADSTONE GRAVEYARD SYMBOL
+ 26FD;W           # So         FUEL PUMP
+ 26FE..26FF;A     # So     [2] CUP ON BLACK SQUARE..WHITE FLAG WITH HORIZONTAL MIDDLE BLACK STRIPE
+ 2700..2704;N     # So     [5] BLACK SAFETY SCISSORS..WHITE SCISSORS
+ 2705;W           # So         WHITE HEAVY CHECK MARK
+ 2706..2709;N     # So     [4] TELEPHONE LOCATION SIGN..ENVELOPE
+ 270A..270B;W     # So     [2] RAISED FIST..RAISED HAND
+ 270C..2727;N     # So    [28] VICTORY HAND..WHITE FOUR POINTED STAR
+ 2728;W           # So         SPARKLES
+ 2729..273C;N     # So    [20] STRESS OUTLINED WHITE STAR..OPEN CENTRE TEARDROP-SPOKED ASTERISK
+ 273D;A           # So         HEAVY TEARDROP-SPOKED ASTERISK
+ 273E..274B;N     # So    [14] SIX PETALLED BLACK AND WHITE FLORETTE..HEAVY EIGHT TEARDROP-SPOKED PROPELLER ASTERISK
+ 274C;W           # So         CROSS MARK
+ 274D;N           # So         SHADOWED WHITE CIRCLE
+ 274E;W           # So         NEGATIVE SQUARED CROSS MARK
+ 274F..2752;N     # So     [4] LOWER RIGHT DROP-SHADOWED WHITE SQUARE..UPPER RIGHT SHADOWED WHITE SQUARE
+ 2753..2755;W     # So     [3] BLACK QUESTION MARK ORNAMENT..WHITE EXCLAMATION MARK ORNAMENT
+ 2756;N           # So         BLACK DIAMOND MINUS WHITE X
+ 2757;W           # So         HEAVY EXCLAMATION MARK SYMBOL
+ 2758..2767;N     # So    [16] LIGHT VERTICAL BAR..ROTATED FLORAL HEART BULLET
+ 2768;N           # Ps         MEDIUM LEFT PARENTHESIS ORNAMENT
+ 2769;N           # Pe         MEDIUM RIGHT PARENTHESIS ORNAMENT
+ 276A;N           # Ps         MEDIUM FLATTENED LEFT PARENTHESIS ORNAMENT
+ 276B;N           # Pe         MEDIUM FLATTENED RIGHT PARENTHESIS ORNAMENT
+ 276C;N           # Ps         MEDIUM LEFT-POINTING ANGLE BRACKET ORNAMENT
+ 276D;N           # Pe         MEDIUM RIGHT-POINTING ANGLE BRACKET ORNAMENT
+ 276E;N           # Ps         HEAVY LEFT-POINTING ANGLE QUOTATION MARK ORNAMENT
+ 276F;N           # Pe         HEAVY RIGHT-POINTING ANGLE QUOTATION MARK ORNAMENT
+ 2770;N           # Ps         HEAVY LEFT-POINTING ANGLE BRACKET ORNAMENT
+ 2771;N           # Pe         HEAVY RIGHT-POINTING ANGLE BRACKET ORNAMENT
+ 2772;N           # Ps         LIGHT LEFT TORTOISE SHELL BRACKET ORNAMENT
+ 2773;N           # Pe         LIGHT RIGHT TORTOISE SHELL BRACKET ORNAMENT
+ 2774;N           # Ps         MEDIUM LEFT CURLY BRACKET ORNAMENT
+ 2775;N           # Pe         MEDIUM RIGHT CURLY BRACKET ORNAMENT
+ 2776..277F;A     # No    [10] DINGBAT NEGATIVE CIRCLED DIGIT ONE..DINGBAT NEGATIVE CIRCLED NUMBER TEN
+ 2780..2793;N     # No    [20] DINGBAT CIRCLED SANS-SERIF DIGIT ONE..DINGBAT NEGATIVE CIRCLED SANS-SERIF NUMBER TEN
+ 2794;N           # So         HEAVY WIDE-HEADED RIGHTWARDS ARROW
+ 2795..2797;W     # So     [3] HEAVY PLUS SIGN..HEAVY DIVISION SIGN
+ 2798..27AF;N     # So    [24] HEAVY SOUTH EAST ARROW..NOTCHED LOWER RIGHT-SHADOWED WHITE RIGHTWARDS ARROW
+ 27B0;W           # So         CURLY LOOP
+ 27B1..27BE;N     # So    [14] NOTCHED UPPER RIGHT-SHADOWED WHITE RIGHTWARDS ARROW..OPEN-OUTLINED RIGHTWARDS ARROW
+ 27BF;W           # So         DOUBLE CURLY LOOP
+ 27C0..27C4;N     # Sm     [5] THREE DIMENSIONAL ANGLE..OPEN SUPERSET
+ 27C5;N           # Ps         LEFT S-SHAPED BAG DELIMITER
+ 27C6;N           # Pe         RIGHT S-SHAPED BAG DELIMITER
+ 27C7..27E5;N     # Sm    [31] OR WITH DOT INSIDE..WHITE SQUARE WITH RIGHTWARDS TICK
+ 27E6;Na          # Ps         MATHEMATICAL LEFT WHITE SQUARE BRACKET
+ 27E7;Na          # Pe         MATHEMATICAL RIGHT WHITE SQUARE BRACKET
+ 27E8;Na          # Ps         MATHEMATICAL LEFT ANGLE BRACKET
+ 27E9;Na          # Pe         MATHEMATICAL RIGHT ANGLE BRACKET
+ 27EA;Na          # Ps         MATHEMATICAL LEFT DOUBLE ANGLE BRACKET
+ 27EB;Na          # Pe         MATHEMATICAL RIGHT DOUBLE ANGLE BRACKET
+ 27EC;Na          # Ps         MATHEMATICAL LEFT WHITE TORTOISE SHELL BRACKET
+ 27ED;Na          # Pe         MATHEMATICAL RIGHT WHITE TORTOISE SHELL BRACKET
+ 27EE;N           # Ps         MATHEMATICAL LEFT FLATTENED PARENTHESIS
+ 27EF;N           # Pe         MATHEMATICAL RIGHT FLATTENED PARENTHESIS
+ 27F0..27FF;N     # Sm    [16] UPWARDS QUADRUPLE ARROW..LONG RIGHTWARDS SQUIGGLE ARROW
+ 2800..28FF;N     # So   [256] BRAILLE PATTERN BLANK..BRAILLE PATTERN DOTS-12345678
+ 2900..297F;N     # Sm   [128] RIGHTWARDS TWO-HEADED ARROW WITH VERTICAL STROKE..DOWN FISH TAIL
+ 2980..2982;N     # Sm     [3] TRIPLE VERTICAL BAR DELIMITER..Z NOTATION TYPE COLON
+ 2983;N           # Ps         LEFT WHITE CURLY BRACKET
+ 2984;N           # Pe         RIGHT WHITE CURLY BRACKET
+ 2985;Na          # Ps         LEFT WHITE PARENTHESIS
+ 2986;Na          # Pe         RIGHT WHITE PARENTHESIS
+ 2987;N           # Ps         Z NOTATION LEFT IMAGE BRACKET
+ 2988;N           # Pe         Z NOTATION RIGHT IMAGE BRACKET
+ 2989;N           # Ps         Z NOTATION LEFT BINDING BRACKET
+ 298A;N           # Pe         Z NOTATION RIGHT BINDING BRACKET
+ 298B;N           # Ps         LEFT SQUARE BRACKET WITH UNDERBAR
+ 298C;N           # Pe         RIGHT SQUARE BRACKET WITH UNDERBAR
+ 298D;N           # Ps         LEFT SQUARE BRACKET WITH TICK IN TOP CORNER
+ 298E;N           # Pe         RIGHT SQUARE BRACKET WITH TICK IN BOTTOM CORNER
+ 298F;N           # Ps         LEFT SQUARE BRACKET WITH TICK IN BOTTOM CORNER
+ 2990;N           # Pe         RIGHT SQUARE BRACKET WITH TICK IN TOP CORNER
+ 2991;N           # Ps         LEFT ANGLE BRACKET WITH DOT
+ 2992;N           # Pe         RIGHT ANGLE BRACKET WITH DOT
+ 2993;N           # Ps         LEFT ARC LESS-THAN BRACKET
+ 2994;N           # Pe         RIGHT ARC GREATER-THAN BRACKET
+ 2995;N           # Ps         DOUBLE LEFT ARC GREATER-THAN BRACKET
+ 2996;N           # Pe         DOUBLE RIGHT ARC LESS-THAN BRACKET
+ 2997;N           # Ps         LEFT BLACK TORTOISE SHELL BRACKET
+ 2998;N           # Pe         RIGHT BLACK TORTOISE SHELL BRACKET
+ 2999..29D7;N     # Sm    [63] DOTTED FENCE..BLACK HOURGLASS
+ 29D8;N           # Ps         LEFT WIGGLY FENCE
+ 29D9;N           # Pe         RIGHT WIGGLY FENCE
+ 29DA;N           # Ps         LEFT DOUBLE WIGGLY FENCE
+ 29DB;N           # Pe         RIGHT DOUBLE WIGGLY FENCE
+ 29DC..29FB;N     # Sm    [32] INCOMPLETE INFINITY..TRIPLE PLUS
+ 29FC;N           # Ps         LEFT-POINTING CURVED ANGLE BRACKET
+ 29FD;N           # Pe         RIGHT-POINTING CURVED ANGLE BRACKET
+ 29FE..29FF;N     # Sm     [2] TINY..MINY
+ 2A00..2AFF;N     # Sm   [256] N-ARY CIRCLED DOT OPERATOR..N-ARY WHITE VERTICAL BAR
+ 2B00..2B1A;N     # So    [27] NORTH EAST WHITE ARROW..DOTTED SQUARE
+ 2B1B..2B1C;W     # So     [2] BLACK LARGE SQUARE..WHITE LARGE SQUARE
+ 2B1D..2B2F;N     # So    [19] BLACK VERY SMALL SQUARE..WHITE VERTICAL ELLIPSE
+ 2B30..2B44;N     # Sm    [21] LEFT ARROW WITH SMALL CIRCLE..RIGHTWARDS ARROW THROUGH SUPERSET
+ 2B45..2B46;N     # So     [2] LEFTWARDS QUADRUPLE ARROW..RIGHTWARDS QUADRUPLE ARROW
+ 2B47..2B4C;N     # Sm     [6] REVERSE TILDE OPERATOR ABOVE RIGHTWARDS ARROW..RIGHTWARDS ARROW ABOVE REVERSE TILDE OPERATOR
+ 2B4D..2B4F;N     # So     [3] DOWNWARDS TRIANGLE-HEADED ZIGZAG ARROW..SHORT BACKSLANTED SOUTH ARROW
+ 2B50;W           # So         WHITE MEDIUM STAR
+ 2B51..2B54;N     # So     [4] BLACK SMALL STAR..WHITE RIGHT-POINTING PENTAGON
+ 2B55;W           # So         HEAVY LARGE CIRCLE
+ 2B56..2B59;A     # So     [4] HEAVY OVAL WITH OVAL INSIDE..HEAVY CIRCLED SALTIRE
+ 2B5A..2B73;N     # So    [26] SLANTED NORTH ARROW WITH HOOKED HEAD..DOWNWARDS TRIANGLE-HEADED ARROW TO BAR
+ 2B76..2B95;N     # So    [32] NORTH WEST TRIANGLE-HEADED ARROW TO BAR..RIGHTWARDS BLACK ARROW
+ 2B98..2BFF;N     # So   [104] THREE-D TOP-LIGHTED LEFTWARDS EQUILATERAL ARROWHEAD..HELLSCHREIBER PAUSE SYMBOL
+ 2C00..2C2E;N     # Lu    [47] GLAGOLITIC CAPITAL LETTER AZU..GLAGOLITIC CAPITAL LETTER LATINATE MYSLITE
+ 2C30..2C5E;N     # Ll    [47] GLAGOLITIC SMALL LETTER AZU..GLAGOLITIC SMALL LETTER LATINATE MYSLITE
+ 2C60..2C7B;N     # L&    [28] LATIN CAPITAL LETTER L WITH DOUBLE BAR..LATIN LETTER SMALL CAPITAL TURNED E
+ 2C7C..2C7D;N     # Lm     [2] LATIN SUBSCRIPT SMALL LETTER J..MODIFIER LETTER CAPITAL V
+ 2C7E..2C7F;N     # Lu     [2] LATIN CAPITAL LETTER S WITH SWASH TAIL..LATIN CAPITAL LETTER Z WITH SWASH TAIL
+ 2C80..2CE4;N     # L&   [101] COPTIC CAPITAL LETTER ALFA..COPTIC SYMBOL KAI
+ 2CE5..2CEA;N     # So     [6] COPTIC SYMBOL MI RO..COPTIC SYMBOL SHIMA SIMA
+ 2CEB..2CEE;N     # L&     [4] COPTIC CAPITAL LETTER CRYPTOGRAMMIC SHEI..COPTIC SMALL LETTER CRYPTOGRAMMIC GANGIA
+ 2CEF..2CF1;N     # Mn     [3] COPTIC COMBINING NI ABOVE..COPTIC COMBINING SPIRITUS LENIS
+ 2CF2..2CF3;N     # L&     [2] COPTIC CAPITAL LETTER BOHAIRIC KHEI..COPTIC SMALL LETTER BOHAIRIC KHEI
+ 2CF9..2CFC;N     # Po     [4] COPTIC OLD NUBIAN FULL STOP..COPTIC OLD NUBIAN VERSE DIVIDER
+ 2CFD;N           # No         COPTIC FRACTION ONE HALF
+ 2CFE..2CFF;N     # Po     [2] COPTIC FULL STOP..COPTIC MORPHOLOGICAL DIVIDER
+ 2D00..2D25;N     # Ll    [38] GEORGIAN SMALL LETTER AN..GEORGIAN SMALL LETTER HOE
+ 2D27;N           # Ll         GEORGIAN SMALL LETTER YN
+ 2D2D;N           # Ll         GEORGIAN SMALL LETTER AEN
+ 2D30..2D67;N     # Lo    [56] TIFINAGH LETTER YA..TIFINAGH LETTER YO
+ 2D6F;N           # Lm         TIFINAGH MODIFIER LETTER LABIALIZATION MARK
+ 2D70;N           # Po         TIFINAGH SEPARATOR MARK
+ 2D7F;N           # Mn         TIFINAGH CONSONANT JOINER
+ 2D80..2D96;N     # Lo    [23] ETHIOPIC SYLLABLE LOA..ETHIOPIC SYLLABLE GGWE
+ 2DA0..2DA6;N     # Lo     [7] ETHIOPIC SYLLABLE SSA..ETHIOPIC SYLLABLE SSO
+ 2DA8..2DAE;N     # Lo     [7] ETHIOPIC SYLLABLE CCA..ETHIOPIC SYLLABLE CCO
+ 2DB0..2DB6;N     # Lo     [7] ETHIOPIC SYLLABLE ZZA..ETHIOPIC SYLLABLE ZZO
+ 2DB8..2DBE;N     # Lo     [7] ETHIOPIC SYLLABLE CCHA..ETHIOPIC SYLLABLE CCHO
+ 2DC0..2DC6;N     # Lo     [7] ETHIOPIC SYLLABLE QYA..ETHIOPIC SYLLABLE QYO
+ 2DC8..2DCE;N     # Lo     [7] ETHIOPIC SYLLABLE KYA..ETHIOPIC SYLLABLE KYO
+ 2DD0..2DD6;N     # Lo     [7] ETHIOPIC SYLLABLE XYA..ETHIOPIC SYLLABLE XYO
+ 2DD8..2DDE;N     # Lo     [7] ETHIOPIC SYLLABLE GYA..ETHIOPIC SYLLABLE GYO
+ 2DE0..2DFF;N     # Mn    [32] COMBINING CYRILLIC LETTER BE..COMBINING CYRILLIC LETTER IOTIFIED BIG YUS
+ 2E00..2E01;N     # Po     [2] RIGHT ANGLE SUBSTITUTION MARKER..RIGHT ANGLE DOTTED SUBSTITUTION MARKER
+ 2E02;N           # Pi         LEFT SUBSTITUTION BRACKET
+ 2E03;N           # Pf         RIGHT SUBSTITUTION BRACKET
+ 2E04;N           # Pi         LEFT DOTTED SUBSTITUTION BRACKET
+ 2E05;N           # Pf         RIGHT DOTTED SUBSTITUTION BRACKET
+ 2E06..2E08;N     # Po     [3] RAISED INTERPOLATION MARKER..DOTTED TRANSPOSITION MARKER
+ 2E09;N           # Pi         LEFT TRANSPOSITION BRACKET
+ 2E0A;N           # Pf         RIGHT TRANSPOSITION BRACKET
+ 2E0B;N           # Po         RAISED SQUARE
+ 2E0C;N           # Pi         LEFT RAISED OMISSION BRACKET
+ 2E0D;N           # Pf         RIGHT RAISED OMISSION BRACKET
+ 2E0E..2E16;N     # Po     [9] EDITORIAL CORONIS..DOTTED RIGHT-POINTING ANGLE
+ 2E17;N           # Pd         DOUBLE OBLIQUE HYPHEN
+ 2E18..2E19;N     # Po     [2] INVERTED INTERROBANG..PALM BRANCH
+ 2E1A;N           # Pd         HYPHEN WITH DIAERESIS
+ 2E1B;N           # Po         TILDE WITH RING ABOVE
+ 2E1C;N           # Pi         LEFT LOW PARAPHRASE BRACKET
+ 2E1D;N           # Pf         RIGHT LOW PARAPHRASE BRACKET
+ 2E1E..2E1F;N     # Po     [2] TILDE WITH DOT ABOVE..TILDE WITH DOT BELOW
+ 2E20;N           # Pi         LEFT VERTICAL BAR WITH QUILL
+ 2E21;N           # Pf         RIGHT VERTICAL BAR WITH QUILL
+ 2E22;N           # Ps         TOP LEFT HALF BRACKET
+ 2E23;N           # Pe         TOP RIGHT HALF BRACKET
+ 2E24;N           # Ps         BOTTOM LEFT HALF BRACKET
+ 2E25;N           # Pe         BOTTOM RIGHT HALF BRACKET
+ 2E26;N           # Ps         LEFT SIDEWAYS U BRACKET
+ 2E27;N           # Pe         RIGHT SIDEWAYS U BRACKET
+ 2E28;N           # Ps         LEFT DOUBLE PARENTHESIS
+ 2E29;N           # Pe         RIGHT DOUBLE PARENTHESIS
+ 2E2A..2E2E;N     # Po     [5] TWO DOTS OVER ONE DOT PUNCTUATION..REVERSED QUESTION MARK
+ 2E2F;N           # Lm         VERTICAL TILDE
+ 2E30..2E39;N     # Po    [10] RING POINT..TOP HALF SECTION SIGN
+ 2E3A..2E3B;N     # Pd     [2] TWO-EM DASH..THREE-EM DASH
+ 2E3C..2E3F;N     # Po     [4] STENOGRAPHIC FULL STOP..CAPITULUM
+ 2E40;N           # Pd         DOUBLE HYPHEN
+ 2E41;N           # Po         REVERSED COMMA
+ 2E42;N           # Ps         DOUBLE LOW-REVERSED-9 QUOTATION MARK
+ 2E43..2E4F;N     # Po    [13] DASH WITH LEFT UPTURN..CORNISH VERSE DIVIDER
+ 2E80..2E99;W     # So    [26] CJK RADICAL REPEAT..CJK RADICAL RAP
+ 2E9B..2EF3;W     # So    [89] CJK RADICAL CHOKE..CJK RADICAL C-SIMPLIFIED TURTLE
+ 2F00..2FD5;W     # So   [214] KANGXI RADICAL ONE..KANGXI RADICAL FLUTE
+ 2FF0..2FFB;W     # So    [12] IDEOGRAPHIC DESCRIPTION CHARACTER LEFT TO RIGHT..IDEOGRAPHIC DESCRIPTION CHARACTER OVERLAID
+ 3000;F           # Zs         IDEOGRAPHIC SPACE
+ 3001..3003;W     # Po     [3] IDEOGRAPHIC COMMA..DITTO MARK
+ 3004;W           # So         JAPANESE INDUSTRIAL STANDARD SYMBOL
+ 3005;W           # Lm         IDEOGRAPHIC ITERATION MARK
+ 3006;W           # Lo         IDEOGRAPHIC CLOSING MARK
+ 3007;W           # Nl         IDEOGRAPHIC NUMBER ZERO
+ 3008;W           # Ps         LEFT ANGLE BRACKET
+ 3009;W           # Pe         RIGHT ANGLE BRACKET
+ 300A;W           # Ps         LEFT DOUBLE ANGLE BRACKET
+ 300B;W           # Pe         RIGHT DOUBLE ANGLE BRACKET
+ 300C;W           # Ps         LEFT CORNER BRACKET
+ 300D;W           # Pe         RIGHT CORNER BRACKET
+ 300E;W           # Ps         LEFT WHITE CORNER BRACKET
+ 300F;W           # Pe         RIGHT WHITE CORNER BRACKET
+ 3010;W           # Ps         LEFT BLACK LENTICULAR BRACKET
+ 3011;W           # Pe         RIGHT BLACK LENTICULAR BRACKET
+ 3012..3013;W     # So     [2] POSTAL MARK..GETA MARK
+ 3014;W           # Ps         LEFT TORTOISE SHELL BRACKET
+ 3015;W           # Pe         RIGHT TORTOISE SHELL BRACKET
+ 3016;W           # Ps         LEFT WHITE LENTICULAR BRACKET
+ 3017;W           # Pe         RIGHT WHITE LENTICULAR BRACKET
+ 3018;W           # Ps         LEFT WHITE TORTOISE SHELL BRACKET
+ 3019;W           # Pe         RIGHT WHITE TORTOISE SHELL BRACKET
+ 301A;W           # Ps         LEFT WHITE SQUARE BRACKET
+ 301B;W           # Pe         RIGHT WHITE SQUARE BRACKET
+ 301C;W           # Pd         WAVE DASH
+ 301D;W           # Ps         REVERSED DOUBLE PRIME QUOTATION MARK
+ 301E..301F;W     # Pe     [2] DOUBLE PRIME QUOTATION MARK..LOW DOUBLE PRIME QUOTATION MARK
+ 3020;W           # So         POSTAL MARK FACE
+ 3021..3029;W     # Nl     [9] HANGZHOU NUMERAL ONE..HANGZHOU NUMERAL NINE
+ 302A..302D;W     # Mn     [4] IDEOGRAPHIC LEVEL TONE MARK..IDEOGRAPHIC ENTERING TONE MARK
+ 302E..302F;W     # Mc     [2] HANGUL SINGLE DOT TONE MARK..HANGUL DOUBLE DOT TONE MARK
+ 3030;W           # Pd         WAVY DASH
+ 3031..3035;W     # Lm     [5] VERTICAL KANA REPEAT MARK..VERTICAL KANA REPEAT MARK LOWER HALF
+ 3036..3037;W     # So     [2] CIRCLED POSTAL MARK..IDEOGRAPHIC TELEGRAPH LINE FEED SEPARATOR SYMBOL
+ 3038..303A;W     # Nl     [3] HANGZHOU NUMERAL TEN..HANGZHOU NUMERAL THIRTY
+ 303B;W           # Lm         VERTICAL IDEOGRAPHIC ITERATION MARK
+ 303C;W           # Lo         MASU MARK
+ 303D;W           # Po         PART ALTERNATION MARK
+ 303E;W           # So         IDEOGRAPHIC VARIATION INDICATOR
+ 303F;N           # So         IDEOGRAPHIC HALF FILL SPACE
+ 3041..3096;W     # Lo    [86] HIRAGANA LETTER SMALL A..HIRAGANA LETTER SMALL KE
+ 3099..309A;W     # Mn     [2] COMBINING KATAKANA-HIRAGANA VOICED SOUND MARK..COMBINING KATAKANA-HIRAGANA SEMI-VOICED SOUND MARK
+ 309B..309C;W     # Sk     [2] KATAKANA-HIRAGANA VOICED SOUND MARK..KATAKANA-HIRAGANA SEMI-VOICED SOUND MARK
+ 309D..309E;W     # Lm     [2] HIRAGANA ITERATION MARK..HIRAGANA VOICED ITERATION MARK
+ 309F;W           # Lo         HIRAGANA DIGRAPH YORI
+ 30A0;W           # Pd         KATAKANA-HIRAGANA DOUBLE HYPHEN
+ 30A1..30FA;W     # Lo    [90] KATAKANA LETTER SMALL A..KATAKANA LETTER VO
+ 30FB;W           # Po         KATAKANA MIDDLE DOT
+ 30FC..30FE;W     # Lm     [3] KATAKANA-HIRAGANA PROLONGED SOUND MARK..KATAKANA VOICED ITERATION MARK
+ 30FF;W           # Lo         KATAKANA DIGRAPH KOTO
+ 3105..312F;W     # Lo    [43] BOPOMOFO LETTER B..BOPOMOFO LETTER NN
+ 3131..318E;W     # Lo    [94] HANGUL LETTER KIYEOK..HANGUL LETTER ARAEAE
+ 3190..3191;W     # So     [2] IDEOGRAPHIC ANNOTATION LINKING MARK..IDEOGRAPHIC ANNOTATION REVERSE MARK
+ 3192..3195;W     # No     [4] IDEOGRAPHIC ANNOTATION ONE MARK..IDEOGRAPHIC ANNOTATION FOUR MARK
+ 3196..319F;W     # So    [10] IDEOGRAPHIC ANNOTATION TOP MARK..IDEOGRAPHIC ANNOTATION MAN MARK
+ 31A0..31BA;W     # Lo    [27] BOPOMOFO LETTER BU..BOPOMOFO LETTER ZY
+ 31C0..31E3;W     # So    [36] CJK STROKE T..CJK STROKE Q
+ 31F0..31FF;W     # Lo    [16] KATAKANA LETTER SMALL KU..KATAKANA LETTER SMALL RO
+ 3200..321E;W     # So    [31] PARENTHESIZED HANGUL KIYEOK..PARENTHESIZED KOREAN CHARACTER O HU
+ 3220..3229;W     # No    [10] PARENTHESIZED IDEOGRAPH ONE..PARENTHESIZED IDEOGRAPH TEN
+ 322A..3247;W     # So    [30] PARENTHESIZED IDEOGRAPH MOON..CIRCLED IDEOGRAPH KOTO
+ 3248..324F;A     # No     [8] CIRCLED NUMBER TEN ON BLACK SQUARE..CIRCLED NUMBER EIGHTY ON BLACK SQUARE
+ 3250;W           # So         PARTNERSHIP SIGN
+ 3251..325F;W     # No    [15] CIRCLED NUMBER TWENTY ONE..CIRCLED NUMBER THIRTY FIVE
+ 3260..327F;W     # So    [32] CIRCLED HANGUL KIYEOK..KOREAN STANDARD SYMBOL
+ 3280..3289;W     # No    [10] CIRCLED IDEOGRAPH ONE..CIRCLED IDEOGRAPH TEN
+ 328A..32B0;W     # So    [39] CIRCLED IDEOGRAPH MOON..CIRCLED IDEOGRAPH NIGHT
+ 32B1..32BF;W     # No    [15] CIRCLED NUMBER THIRTY SIX..CIRCLED NUMBER FIFTY
+ 32C0..32FF;W     # So    [64] IDEOGRAPHIC TELEGRAPH SYMBOL FOR JANUARY..SQUARE ERA NAME REIWA
+ 3300..33FF;W     # So   [256] SQUARE APAATO..SQUARE GAL
+ 3400..4DB5;W     # Lo  [6582] CJK UNIFIED IDEOGRAPH-3400..CJK UNIFIED IDEOGRAPH-4DB5
+ 4DB6..4DBF;W     # Cn    [10] <reserved-4DB6>..<reserved-4DBF>
+ 4DC0..4DFF;N     # So    [64] HEXAGRAM FOR THE CREATIVE HEAVEN..HEXAGRAM FOR BEFORE COMPLETION
+ 4E00..9FEF;W     # Lo [20976] CJK UNIFIED IDEOGRAPH-4E00..CJK UNIFIED IDEOGRAPH-9FEF
+ 9FF0..9FFF;W     # Cn    [16] <reserved-9FF0>..<reserved-9FFF>
+ A000..A014;W     # Lo    [21] YI SYLLABLE IT..YI SYLLABLE E
+ A015;W           # Lm         YI SYLLABLE WU
+ A016..A48C;W     # Lo  [1143] YI SYLLABLE BIT..YI SYLLABLE YYR
+ A490..A4C6;W     # So    [55] YI RADICAL QOT..YI RADICAL KE
+ A4D0..A4F7;N     # Lo    [40] LISU LETTER BA..LISU LETTER OE
+ A4F8..A4FD;N     # Lm     [6] LISU LETTER TONE MYA TI..LISU LETTER TONE MYA JEU
+ A4FE..A4FF;N     # Po     [2] LISU PUNCTUATION COMMA..LISU PUNCTUATION FULL STOP
+ A500..A60B;N     # Lo   [268] VAI SYLLABLE EE..VAI SYLLABLE NG
+ A60C;N           # Lm         VAI SYLLABLE LENGTHENER
+ A60D..A60F;N     # Po     [3] VAI COMMA..VAI QUESTION MARK
+ A610..A61F;N     # Lo    [16] VAI SYLLABLE NDOLE FA..VAI SYMBOL JONG
+ A620..A629;N     # Nd    [10] VAI DIGIT ZERO..VAI DIGIT NINE
+ A62A..A62B;N     # Lo     [2] VAI SYLLABLE NDOLE MA..VAI SYLLABLE NDOLE DO
+ A640..A66D;N     # L&    [46] CYRILLIC CAPITAL LETTER ZEMLYA..CYRILLIC SMALL LETTER DOUBLE MONOCULAR O
+ A66E;N           # Lo         CYRILLIC LETTER MULTIOCULAR O
+ A66F;N           # Mn         COMBINING CYRILLIC VZMET
+ A670..A672;N     # Me     [3] COMBINING CYRILLIC TEN MILLIONS SIGN..COMBINING CYRILLIC THOUSAND MILLIONS SIGN
+ A673;N           # Po         SLAVONIC ASTERISK
+ A674..A67D;N     # Mn    [10] COMBINING CYRILLIC LETTER UKRAINIAN IE..COMBINING CYRILLIC PAYEROK
+ A67E;N           # Po         CYRILLIC KAVYKA
+ A67F;N           # Lm         CYRILLIC PAYEROK
+ A680..A69B;N     # L&    [28] CYRILLIC CAPITAL LETTER DWE..CYRILLIC SMALL LETTER CROSSED O
+ A69C..A69D;N     # Lm     [2] MODIFIER LETTER CYRILLIC HARD SIGN..MODIFIER LETTER CYRILLIC SOFT SIGN
+ A69E..A69F;N     # Mn     [2] COMBINING CYRILLIC LETTER EF..COMBINING CYRILLIC LETTER IOTIFIED E
+ A6A0..A6E5;N     # Lo    [70] BAMUM LETTER A..BAMUM LETTER KI
+ A6E6..A6EF;N     # Nl    [10] BAMUM LETTER MO..BAMUM LETTER KOGHOM
+ A6F0..A6F1;N     # Mn     [2] BAMUM COMBINING MARK KOQNDON..BAMUM COMBINING MARK TUKWENTIS
+ A6F2..A6F7;N     # Po     [6] BAMUM NJAEMLI..BAMUM QUESTION MARK
+ A700..A716;N     # Sk    [23] MODIFIER LETTER CHINESE TONE YIN PING..MODIFIER LETTER EXTRA-LOW LEFT-STEM TONE BAR
+ A717..A71F;N     # Lm     [9] MODIFIER LETTER DOT VERTICAL BAR..MODIFIER LETTER LOW INVERTED EXCLAMATION MARK
+ A720..A721;N     # Sk     [2] MODIFIER LETTER STRESS AND HIGH TONE..MODIFIER LETTER STRESS AND LOW TONE
+ A722..A76F;N     # L&    [78] LATIN CAPITAL LETTER EGYPTOLOGICAL ALEF..LATIN SMALL LETTER CON
+ A770;N           # Lm         MODIFIER LETTER US
+ A771..A787;N     # L&    [23] LATIN SMALL LETTER DUM..LATIN SMALL LETTER INSULAR T
+ A788;N           # Lm         MODIFIER LETTER LOW CIRCUMFLEX ACCENT
+ A789..A78A;N     # Sk     [2] MODIFIER LETTER COLON..MODIFIER LETTER SHORT EQUALS SIGN
+ A78B..A78E;N     # L&     [4] LATIN CAPITAL LETTER SALTILLO..LATIN SMALL LETTER L WITH RETROFLEX HOOK AND BELT
+ A78F;N           # Lo         LATIN LETTER SINOLOGICAL DOT
+ A790..A7BF;N     # L&    [48] LATIN CAPITAL LETTER N WITH DESCENDER..LATIN SMALL LETTER GLOTTAL U
+ A7C2..A7C6;N     # L&     [5] LATIN CAPITAL LETTER ANGLICANA W..LATIN CAPITAL LETTER Z WITH PALATAL HOOK
+ A7F7;N           # Lo         LATIN EPIGRAPHIC LETTER SIDEWAYS I
+ A7F8..A7F9;N     # Lm     [2] MODIFIER LETTER CAPITAL H WITH STROKE..MODIFIER LETTER SMALL LIGATURE OE
+ A7FA;N           # Ll         LATIN LETTER SMALL CAPITAL TURNED M
+ A7FB..A7FF;N     # Lo     [5] LATIN EPIGRAPHIC LETTER REVERSED F..LATIN EPIGRAPHIC LETTER ARCHAIC M
+ A800..A801;N     # Lo     [2] SYLOTI NAGRI LETTER A..SYLOTI NAGRI LETTER I
+ A802;N           # Mn         SYLOTI NAGRI SIGN DVISVARA
+ A803..A805;N     # Lo     [3] SYLOTI NAGRI LETTER U..SYLOTI NAGRI LETTER O
+ A806;N           # Mn         SYLOTI NAGRI SIGN HASANTA
+ A807..A80A;N     # Lo     [4] SYLOTI NAGRI LETTER KO..SYLOTI NAGRI LETTER GHO
+ A80B;N           # Mn         SYLOTI NAGRI SIGN ANUSVARA
+ A80C..A822;N     # Lo    [23] SYLOTI NAGRI LETTER CO..SYLOTI NAGRI LETTER HO
+ A823..A824;N     # Mc     [2] SYLOTI NAGRI VOWEL SIGN A..SYLOTI NAGRI VOWEL SIGN I
+ A825..A826;N     # Mn     [2] SYLOTI NAGRI VOWEL SIGN U..SYLOTI NAGRI VOWEL SIGN E
+ A827;N           # Mc         SYLOTI NAGRI VOWEL SIGN OO
+ A828..A82B;N     # So     [4] SYLOTI NAGRI POETRY MARK-1..SYLOTI NAGRI POETRY MARK-4
+ A830..A835;N     # No     [6] NORTH INDIC FRACTION ONE QUARTER..NORTH INDIC FRACTION THREE SIXTEENTHS
+ A836..A837;N     # So     [2] NORTH INDIC QUARTER MARK..NORTH INDIC PLACEHOLDER MARK
+ A838;N           # Sc         NORTH INDIC RUPEE MARK
+ A839;N           # So         NORTH INDIC QUANTITY MARK
+ A840..A873;N     # Lo    [52] PHAGS-PA LETTER KA..PHAGS-PA LETTER CANDRABINDU
+ A874..A877;N     # Po     [4] PHAGS-PA SINGLE HEAD MARK..PHAGS-PA MARK DOUBLE SHAD
+ A880..A881;N     # Mc     [2] SAURASHTRA SIGN ANUSVARA..SAURASHTRA SIGN VISARGA
+ A882..A8B3;N     # Lo    [50] SAURASHTRA LETTER A..SAURASHTRA LETTER LLA
+ A8B4..A8C3;N     # Mc    [16] SAURASHTRA CONSONANT SIGN HAARU..SAURASHTRA VOWEL SIGN AU
+ A8C4..A8C5;N     # Mn     [2] SAURASHTRA SIGN VIRAMA..SAURASHTRA SIGN CANDRABINDU
+ A8CE..A8CF;N     # Po     [2] SAURASHTRA DANDA..SAURASHTRA DOUBLE DANDA
+ A8D0..A8D9;N     # Nd    [10] SAURASHTRA DIGIT ZERO..SAURASHTRA DIGIT NINE
+ A8E0..A8F1;N     # Mn    [18] COMBINING DEVANAGARI DIGIT ZERO..COMBINING DEVANAGARI SIGN AVAGRAHA
+ A8F2..A8F7;N     # Lo     [6] DEVANAGARI SIGN SPACING CANDRABINDU..DEVANAGARI SIGN CANDRABINDU AVAGRAHA
+ A8F8..A8FA;N     # Po     [3] DEVANAGARI SIGN PUSHPIKA..DEVANAGARI CARET
+ A8FB;N           # Lo         DEVANAGARI HEADSTROKE
+ A8FC;N           # Po         DEVANAGARI SIGN SIDDHAM
+ A8FD..A8FE;N     # Lo     [2] DEVANAGARI JAIN OM..DEVANAGARI LETTER AY
+ A8FF;N           # Mn         DEVANAGARI VOWEL SIGN AY
+ A900..A909;N     # Nd    [10] KAYAH LI DIGIT ZERO..KAYAH LI DIGIT NINE
+ A90A..A925;N     # Lo    [28] KAYAH LI LETTER KA..KAYAH LI LETTER OO
+ A926..A92D;N     # Mn     [8] KAYAH LI VOWEL UE..KAYAH LI TONE CALYA PLOPHU
+ A92E..A92F;N     # Po     [2] KAYAH LI SIGN CWI..KAYAH LI SIGN SHYA
+ A930..A946;N     # Lo    [23] REJANG LETTER KA..REJANG LETTER A
+ A947..A951;N     # Mn    [11] REJANG VOWEL SIGN I..REJANG CONSONANT SIGN R
+ A952..A953;N     # Mc     [2] REJANG CONSONANT SIGN H..REJANG VIRAMA
+ A95F;N           # Po         REJANG SECTION MARK
+ A960..A97C;W     # Lo    [29] HANGUL CHOSEONG TIKEUT-MIEUM..HANGUL CHOSEONG SSANGYEORINHIEUH
+ A980..A982;N     # Mn     [3] JAVANESE SIGN PANYANGGA..JAVANESE SIGN LAYAR
+ A983;N           # Mc         JAVANESE SIGN WIGNYAN
+ A984..A9B2;N     # Lo    [47] JAVANESE LETTER A..JAVANESE LETTER HA
+ A9B3;N           # Mn         JAVANESE SIGN CECAK TELU
+ A9B4..A9B5;N     # Mc     [2] JAVANESE VOWEL SIGN TARUNG..JAVANESE VOWEL SIGN TOLONG
+ A9B6..A9B9;N     # Mn     [4] JAVANESE VOWEL SIGN WULU..JAVANESE VOWEL SIGN SUKU MENDUT
+ A9BA..A9BB;N     # Mc     [2] JAVANESE VOWEL SIGN TALING..JAVANESE VOWEL SIGN DIRGA MURE
+ A9BC..A9BD;N     # Mn     [2] JAVANESE VOWEL SIGN PEPET..JAVANESE CONSONANT SIGN KERET
+ A9BE..A9C0;N     # Mc     [3] JAVANESE CONSONANT SIGN PENGKAL..JAVANESE PANGKON
+ A9C1..A9CD;N     # Po    [13] JAVANESE LEFT RERENGGAN..JAVANESE TURNED PADA PISELEH
+ A9CF;N           # Lm         JAVANESE PANGRANGKEP
+ A9D0..A9D9;N     # Nd    [10] JAVANESE DIGIT ZERO..JAVANESE DIGIT NINE
+ A9DE..A9DF;N     # Po     [2] JAVANESE PADA TIRTA TUMETES..JAVANESE PADA ISEN-ISEN
+ A9E0..A9E4;N     # Lo     [5] MYANMAR LETTER SHAN GHA..MYANMAR LETTER SHAN BHA
+ A9E5;N           # Mn         MYANMAR SIGN SHAN SAW
+ A9E6;N           # Lm         MYANMAR MODIFIER LETTER SHAN REDUPLICATION
+ A9E7..A9EF;N     # Lo     [9] MYANMAR LETTER TAI LAING NYA..MYANMAR LETTER TAI LAING NNA
+ A9F0..A9F9;N     # Nd    [10] MYANMAR TAI LAING DIGIT ZERO..MYANMAR TAI LAING DIGIT NINE
+ A9FA..A9FE;N     # Lo     [5] MYANMAR LETTER TAI LAING LLA..MYANMAR LETTER TAI LAING BHA
+ AA00..AA28;N     # Lo    [41] CHAM LETTER A..CHAM LETTER HA
+ AA29..AA2E;N     # Mn     [6] CHAM VOWEL SIGN AA..CHAM VOWEL SIGN OE
+ AA2F..AA30;N     # Mc     [2] CHAM VOWEL SIGN O..CHAM VOWEL SIGN AI
+ AA31..AA32;N     # Mn     [2] CHAM VOWEL SIGN AU..CHAM VOWEL SIGN UE
+ AA33..AA34;N     # Mc     [2] CHAM CONSONANT SIGN YA..CHAM CONSONANT SIGN RA
+ AA35..AA36;N     # Mn     [2] CHAM CONSONANT SIGN LA..CHAM CONSONANT SIGN WA
+ AA40..AA42;N     # Lo     [3] CHAM LETTER FINAL K..CHAM LETTER FINAL NG
+ AA43;N           # Mn         CHAM CONSONANT SIGN FINAL NG
+ AA44..AA4B;N     # Lo     [8] CHAM LETTER FINAL CH..CHAM LETTER FINAL SS
+ AA4C;N           # Mn         CHAM CONSONANT SIGN FINAL M
+ AA4D;N           # Mc         CHAM CONSONANT SIGN FINAL H
+ AA50..AA59;N     # Nd    [10] CHAM DIGIT ZERO..CHAM DIGIT NINE
+ AA5C..AA5F;N     # Po     [4] CHAM PUNCTUATION SPIRAL..CHAM PUNCTUATION TRIPLE DANDA
+ AA60..AA6F;N     # Lo    [16] MYANMAR LETTER KHAMTI GA..MYANMAR LETTER KHAMTI FA
+ AA70;N           # Lm         MYANMAR MODIFIER LETTER KHAMTI REDUPLICATION
+ AA71..AA76;N     # Lo     [6] MYANMAR LETTER KHAMTI XA..MYANMAR LOGOGRAM KHAMTI HM
+ AA77..AA79;N     # So     [3] MYANMAR SYMBOL AITON EXCLAMATION..MYANMAR SYMBOL AITON TWO
+ AA7A;N           # Lo         MYANMAR LETTER AITON RA
+ AA7B;N           # Mc         MYANMAR SIGN PAO KAREN TONE
+ AA7C;N           # Mn         MYANMAR SIGN TAI LAING TONE-2
+ AA7D;N           # Mc         MYANMAR SIGN TAI LAING TONE-5
+ AA7E..AA7F;N     # Lo     [2] MYANMAR LETTER SHWE PALAUNG CHA..MYANMAR LETTER SHWE PALAUNG SHA
+ AA80..AAAF;N     # Lo    [48] TAI VIET LETTER LOW KO..TAI VIET LETTER HIGH O
+ AAB0;N           # Mn         TAI VIET MAI KANG
+ AAB1;N           # Lo         TAI VIET VOWEL AA
+ AAB2..AAB4;N     # Mn     [3] TAI VIET VOWEL I..TAI VIET VOWEL U
+ AAB5..AAB6;N     # Lo     [2] TAI VIET VOWEL E..TAI VIET VOWEL O
+ AAB7..AAB8;N     # Mn     [2] TAI VIET MAI KHIT..TAI VIET VOWEL IA
+ AAB9..AABD;N     # Lo     [5] TAI VIET VOWEL UEA..TAI VIET VOWEL AN
+ AABE..AABF;N     # Mn     [2] TAI VIET VOWEL AM..TAI VIET TONE MAI EK
+ AAC0;N           # Lo         TAI VIET TONE MAI NUENG
+ AAC1;N           # Mn         TAI VIET TONE MAI THO
+ AAC2;N           # Lo         TAI VIET TONE MAI SONG
+ AADB..AADC;N     # Lo     [2] TAI VIET SYMBOL KON..TAI VIET SYMBOL NUENG
+ AADD;N           # Lm         TAI VIET SYMBOL SAM
+ AADE..AADF;N     # Po     [2] TAI VIET SYMBOL HO HOI..TAI VIET SYMBOL KOI KOI
+ AAE0..AAEA;N     # Lo    [11] MEETEI MAYEK LETTER E..MEETEI MAYEK LETTER SSA
+ AAEB;N           # Mc         MEETEI MAYEK VOWEL SIGN II
+ AAEC..AAED;N     # Mn     [2] MEETEI MAYEK VOWEL SIGN UU..MEETEI MAYEK VOWEL SIGN AAI
+ AAEE..AAEF;N     # Mc     [2] MEETEI MAYEK VOWEL SIGN AU..MEETEI MAYEK VOWEL SIGN AAU
+ AAF0..AAF1;N     # Po     [2] MEETEI MAYEK CHEIKHAN..MEETEI MAYEK AHANG KHUDAM
+ AAF2;N           # Lo         MEETEI MAYEK ANJI
+ AAF3..AAF4;N     # Lm     [2] MEETEI MAYEK SYLLABLE REPETITION MARK..MEETEI MAYEK WORD REPETITION MARK
+ AAF5;N           # Mc         MEETEI MAYEK VOWEL SIGN VISARGA
+ AAF6;N           # Mn         MEETEI MAYEK VIRAMA
+ AB01..AB06;N     # Lo     [6] ETHIOPIC SYLLABLE TTHU..ETHIOPIC SYLLABLE TTHO
+ AB09..AB0E;N     # Lo     [6] ETHIOPIC SYLLABLE DDHU..ETHIOPIC SYLLABLE DDHO
+ AB11..AB16;N     # Lo     [6] ETHIOPIC SYLLABLE DZU..ETHIOPIC SYLLABLE DZO
+ AB20..AB26;N     # Lo     [7] ETHIOPIC SYLLABLE CCHHA..ETHIOPIC SYLLABLE CCHHO
+ AB28..AB2E;N     # Lo     [7] ETHIOPIC SYLLABLE BBA..ETHIOPIC SYLLABLE BBO
+ AB30..AB5A;N     # Ll    [43] LATIN SMALL LETTER BARRED ALPHA..LATIN SMALL LETTER Y WITH SHORT RIGHT LEG
+ AB5B;N           # Sk         MODIFIER BREVE WITH INVERTED BREVE
+ AB5C..AB5F;N     # Lm     [4] MODIFIER LETTER SMALL HENG..MODIFIER LETTER SMALL U WITH LEFT HOOK
+ AB60..AB67;N     # Ll     [8] LATIN SMALL LETTER SAKHA YAT..LATIN SMALL LETTER TS DIGRAPH WITH RETROFLEX HOOK
+ AB70..ABBF;N     # Ll    [80] CHEROKEE SMALL LETTER A..CHEROKEE SMALL LETTER YA
+ ABC0..ABE2;N     # Lo    [35] MEETEI MAYEK LETTER KOK..MEETEI MAYEK LETTER I LONSUM
+ ABE3..ABE4;N     # Mc     [2] MEETEI MAYEK VOWEL SIGN ONAP..MEETEI MAYEK VOWEL SIGN INAP
+ ABE5;N           # Mn         MEETEI MAYEK VOWEL SIGN ANAP
+ ABE6..ABE7;N     # Mc     [2] MEETEI MAYEK VOWEL SIGN YENAP..MEETEI MAYEK VOWEL SIGN SOUNAP
+ ABE8;N           # Mn         MEETEI MAYEK VOWEL SIGN UNAP
+ ABE9..ABEA;N     # Mc     [2] MEETEI MAYEK VOWEL SIGN CHEINAP..MEETEI MAYEK VOWEL SIGN NUNG
+ ABEB;N           # Po         MEETEI MAYEK CHEIKHEI
+ ABEC;N           # Mc         MEETEI MAYEK LUM IYEK
+ ABED;N           # Mn         MEETEI MAYEK APUN IYEK
+ ABF0..ABF9;N     # Nd    [10] MEETEI MAYEK DIGIT ZERO..MEETEI MAYEK DIGIT NINE
+ AC00..D7A3;W     # Lo [11172] HANGUL SYLLABLE GA..HANGUL SYLLABLE HIH
+ D7B0..D7C6;N     # Lo    [23] HANGUL JUNGSEONG O-YEO..HANGUL JUNGSEONG ARAEA-E
+ D7CB..D7FB;N     # Lo    [49] HANGUL JONGSEONG NIEUN-RIEUL..HANGUL JONGSEONG PHIEUPH-THIEUTH
+ D800..DB7F;N     # Cs   [896] <surrogate-D800>..<surrogate-DB7F>
+ DB80..DBFF;N     # Cs   [128] <surrogate-DB80>..<surrogate-DBFF>
+ DC00..DFFF;N     # Cs  [1024] <surrogate-DC00>..<surrogate-DFFF>
+ E000..F8FF;A     # Co  [6400] <private-use-E000>..<private-use-F8FF>
+ F900..FA6D;W     # Lo   [366] CJK COMPATIBILITY IDEOGRAPH-F900..CJK COMPATIBILITY IDEOGRAPH-FA6D
+ FA6E..FA6F;W     # Cn     [2] <reserved-FA6E>..<reserved-FA6F>
+ FA70..FAD9;W     # Lo   [106] CJK COMPATIBILITY IDEOGRAPH-FA70..CJK COMPATIBILITY IDEOGRAPH-FAD9
+ FADA..FAFF;W     # Cn    [38] <reserved-FADA>..<reserved-FAFF>
+ FB00..FB06;N     # Ll     [7] LATIN SMALL LIGATURE FF..LATIN SMALL LIGATURE ST
+ FB13..FB17;N     # Ll     [5] ARMENIAN SMALL LIGATURE MEN NOW..ARMENIAN SMALL LIGATURE MEN XEH
+ FB1D;N           # Lo         HEBREW LETTER YOD WITH HIRIQ
+ FB1E;N           # Mn         HEBREW POINT JUDEO-SPANISH VARIKA
+ FB1F..FB28;N     # Lo    [10] HEBREW LIGATURE YIDDISH YOD YOD PATAH..HEBREW LETTER WIDE TAV
+ FB29;N           # Sm         HEBREW LETTER ALTERNATIVE PLUS SIGN
+ FB2A..FB36;N     # Lo    [13] HEBREW LETTER SHIN WITH SHIN DOT..HEBREW LETTER ZAYIN WITH DAGESH
+ FB38..FB3C;N     # Lo     [5] HEBREW LETTER TET WITH DAGESH..HEBREW LETTER LAMED WITH DAGESH
+ FB3E;N           # Lo         HEBREW LETTER MEM WITH DAGESH
+ FB40..FB41;N     # Lo     [2] HEBREW LETTER NUN WITH DAGESH..HEBREW LETTER SAMEKH WITH DAGESH
+ FB43..FB44;N     # Lo     [2] HEBREW LETTER FINAL PE WITH DAGESH..HEBREW LETTER PE WITH DAGESH
+ FB46..FB4F;N     # Lo    [10] HEBREW LETTER TSADI WITH DAGESH..HEBREW LIGATURE ALEF LAMED
+ FB50..FBB1;N     # Lo    [98] ARABIC LETTER ALEF WASLA ISOLATED FORM..ARABIC LETTER YEH BARREE WITH HAMZA ABOVE FINAL FORM
+ FBB2..FBC1;N     # Sk    [16] ARABIC SYMBOL DOT ABOVE..ARABIC SYMBOL SMALL TAH BELOW
+ FBD3..FD3D;N     # Lo   [363] ARABIC LETTER NG ISOLATED FORM..ARABIC LIGATURE ALEF WITH FATHATAN ISOLATED FORM
+ FD3E;N           # Pe         ORNATE LEFT PARENTHESIS
+ FD3F;N           # Ps         ORNATE RIGHT PARENTHESIS
+ FD50..FD8F;N     # Lo    [64] ARABIC LIGATURE TEH WITH JEEM WITH MEEM INITIAL FORM..ARABIC LIGATURE MEEM WITH KHAH WITH MEEM INITIAL FORM
+ FD92..FDC7;N     # Lo    [54] ARABIC LIGATURE MEEM WITH JEEM WITH KHAH INITIAL FORM..ARABIC LIGATURE NOON WITH JEEM WITH YEH FINAL FORM
+ FDF0..FDFB;N     # Lo    [12] ARABIC LIGATURE SALLA USED AS KORANIC STOP SIGN ISOLATED FORM..ARABIC LIGATURE JALLAJALALOUHOU
+ FDFC;N           # Sc         RIAL SIGN
+ FDFD;N           # So         ARABIC LIGATURE BISMILLAH AR-RAHMAN AR-RAHEEM
+ FE00..FE0F;A     # Mn    [16] VARIATION SELECTOR-1..VARIATION SELECTOR-16
+ FE10..FE16;W     # Po     [7] PRESENTATION FORM FOR VERTICAL COMMA..PRESENTATION FORM FOR VERTICAL QUESTION MARK
+ FE17;W           # Ps         PRESENTATION FORM FOR VERTICAL LEFT WHITE LENTICULAR BRACKET
+ FE18;W           # Pe         PRESENTATION FORM FOR VERTICAL RIGHT WHITE LENTICULAR BRAKCET
+ FE19;W           # Po         PRESENTATION FORM FOR VERTICAL HORIZONTAL ELLIPSIS
+ FE20..FE2F;N     # Mn    [16] COMBINING LIGATURE LEFT HALF..COMBINING CYRILLIC TITLO RIGHT HALF
+ FE30;W           # Po         PRESENTATION FORM FOR VERTICAL TWO DOT LEADER
+ FE31..FE32;W     # Pd     [2] PRESENTATION FORM FOR VERTICAL EM DASH..PRESENTATION FORM FOR VERTICAL EN DASH
+ FE33..FE34;W     # Pc     [2] PRESENTATION FORM FOR VERTICAL LOW LINE..PRESENTATION FORM FOR VERTICAL WAVY LOW LINE
+ FE35;W           # Ps         PRESENTATION FORM FOR VERTICAL LEFT PARENTHESIS
+ FE36;W           # Pe         PRESENTATION FORM FOR VERTICAL RIGHT PARENTHESIS
+ FE37;W           # Ps         PRESENTATION FORM FOR VERTICAL LEFT CURLY BRACKET
+ FE38;W           # Pe         PRESENTATION FORM FOR VERTICAL RIGHT CURLY BRACKET
+ FE39;W           # Ps         PRESENTATION FORM FOR VERTICAL LEFT TORTOISE SHELL BRACKET
+ FE3A;W           # Pe         PRESENTATION FORM FOR VERTICAL RIGHT TORTOISE SHELL BRACKET
+ FE3B;W           # Ps         PRESENTATION FORM FOR VERTICAL LEFT BLACK LENTICULAR BRACKET
+ FE3C;W           # Pe         PRESENTATION FORM FOR VERTICAL RIGHT BLACK LENTICULAR BRACKET
+ FE3D;W           # Ps         PRESENTATION FORM FOR VERTICAL LEFT DOUBLE ANGLE BRACKET
+ FE3E;W           # Pe         PRESENTATION FORM FOR VERTICAL RIGHT DOUBLE ANGLE BRACKET
+ FE3F;W           # Ps         PRESENTATION FORM FOR VERTICAL LEFT ANGLE BRACKET
+ FE40;W           # Pe         PRESENTATION FORM FOR VERTICAL RIGHT ANGLE BRACKET
+ FE41;W           # Ps         PRESENTATION FORM FOR VERTICAL LEFT CORNER BRACKET
+ FE42;W           # Pe         PRESENTATION FORM FOR VERTICAL RIGHT CORNER BRACKET
+ FE43;W           # Ps         PRESENTATION FORM FOR VERTICAL LEFT WHITE CORNER BRACKET
+ FE44;W           # Pe         PRESENTATION FORM FOR VERTICAL RIGHT WHITE CORNER BRACKET
+ FE45..FE46;W     # Po     [2] SESAME DOT..WHITE SESAME DOT
+ FE47;W           # Ps         PRESENTATION FORM FOR VERTICAL LEFT SQUARE BRACKET
+ FE48;W           # Pe         PRESENTATION FORM FOR VERTICAL RIGHT SQUARE BRACKET
+ FE49..FE4C;W     # Po     [4] DASHED OVERLINE..DOUBLE WAVY OVERLINE
+ FE4D..FE4F;W     # Pc     [3] DASHED LOW LINE..WAVY LOW LINE
+ FE50..FE52;W     # Po     [3] SMALL COMMA..SMALL FULL STOP
+ FE54..FE57;W     # Po     [4] SMALL SEMICOLON..SMALL EXCLAMATION MARK
+ FE58;W           # Pd         SMALL EM DASH
+ FE59;W           # Ps         SMALL LEFT PARENTHESIS
+ FE5A;W           # Pe         SMALL RIGHT PARENTHESIS
+ FE5B;W           # Ps         SMALL LEFT CURLY BRACKET
+ FE5C;W           # Pe         SMALL RIGHT CURLY BRACKET
+ FE5D;W           # Ps         SMALL LEFT TORTOISE SHELL BRACKET
+ FE5E;W           # Pe         SMALL RIGHT TORTOISE SHELL BRACKET
+ FE5F..FE61;W     # Po     [3] SMALL NUMBER SIGN..SMALL ASTERISK
+ FE62;W           # Sm         SMALL PLUS SIGN
+ FE63;W           # Pd         SMALL HYPHEN-MINUS
+ FE64..FE66;W     # Sm     [3] SMALL LESS-THAN SIGN..SMALL EQUALS SIGN
+ FE68;W           # Po         SMALL REVERSE SOLIDUS
+ FE69;W           # Sc         SMALL DOLLAR SIGN
+ FE6A..FE6B;W     # Po     [2] SMALL PERCENT SIGN..SMALL COMMERCIAL AT
+ FE70..FE74;N     # Lo     [5] ARABIC FATHATAN ISOLATED FORM..ARABIC KASRATAN ISOLATED FORM
+ FE76..FEFC;N     # Lo   [135] ARABIC FATHA ISOLATED FORM..ARABIC LIGATURE LAM WITH ALEF FINAL FORM
+ FEFF;N           # Cf         ZERO WIDTH NO-BREAK SPACE
+ FF01..FF03;F     # Po     [3] FULLWIDTH EXCLAMATION MARK..FULLWIDTH NUMBER SIGN
+ FF04;F           # Sc         FULLWIDTH DOLLAR SIGN
+ FF05..FF07;F     # Po     [3] FULLWIDTH PERCENT SIGN..FULLWIDTH APOSTROPHE
+ FF08;F           # Ps         FULLWIDTH LEFT PARENTHESIS
+ FF09;F           # Pe         FULLWIDTH RIGHT PARENTHESIS
+ FF0A;F           # Po         FULLWIDTH ASTERISK
+ FF0B;F           # Sm         FULLWIDTH PLUS SIGN
+ FF0C;F           # Po         FULLWIDTH COMMA
+ FF0D;F           # Pd         FULLWIDTH HYPHEN-MINUS
+ FF0E..FF0F;F     # Po     [2] FULLWIDTH FULL STOP..FULLWIDTH SOLIDUS
+ FF10..FF19;F     # Nd    [10] FULLWIDTH DIGIT ZERO..FULLWIDTH DIGIT NINE
+ FF1A..FF1B;F     # Po     [2] FULLWIDTH COLON..FULLWIDTH SEMICOLON
+ FF1C..FF1E;F     # Sm     [3] FULLWIDTH LESS-THAN SIGN..FULLWIDTH GREATER-THAN SIGN
+ FF1F..FF20;F     # Po     [2] FULLWIDTH QUESTION MARK..FULLWIDTH COMMERCIAL AT
+ FF21..FF3A;F     # Lu    [26] FULLWIDTH LATIN CAPITAL LETTER A..FULLWIDTH LATIN CAPITAL LETTER Z
+ FF3B;F           # Ps         FULLWIDTH LEFT SQUARE BRACKET
+ FF3C;F           # Po         FULLWIDTH REVERSE SOLIDUS
+ FF3D;F           # Pe         FULLWIDTH RIGHT SQUARE BRACKET
+ FF3E;F           # Sk         FULLWIDTH CIRCUMFLEX ACCENT
+ FF3F;F           # Pc         FULLWIDTH LOW LINE
+ FF40;F           # Sk         FULLWIDTH GRAVE ACCENT
+ FF41..FF5A;F     # Ll    [26] FULLWIDTH LATIN SMALL LETTER A..FULLWIDTH LATIN SMALL LETTER Z
+ FF5B;F           # Ps         FULLWIDTH LEFT CURLY BRACKET
+ FF5C;F           # Sm         FULLWIDTH VERTICAL LINE
+ FF5D;F           # Pe         FULLWIDTH RIGHT CURLY BRACKET
+ FF5E;F           # Sm         FULLWIDTH TILDE
+ FF5F;F           # Ps         FULLWIDTH LEFT WHITE PARENTHESIS
+ FF60;F           # Pe         FULLWIDTH RIGHT WHITE PARENTHESIS
+ FF61;H           # Po         HALFWIDTH IDEOGRAPHIC FULL STOP
+ FF62;H           # Ps         HALFWIDTH LEFT CORNER BRACKET
+ FF63;H           # Pe         HALFWIDTH RIGHT CORNER BRACKET
+ FF64..FF65;H     # Po     [2] HALFWIDTH IDEOGRAPHIC COMMA..HALFWIDTH KATAKANA MIDDLE DOT
+ FF66..FF6F;H     # Lo    [10] HALFWIDTH KATAKANA LETTER WO..HALFWIDTH KATAKANA LETTER SMALL TU
+ FF70;H           # Lm         HALFWIDTH KATAKANA-HIRAGANA PROLONGED SOUND MARK
+ FF71..FF9D;H     # Lo    [45] HALFWIDTH KATAKANA LETTER A..HALFWIDTH KATAKANA LETTER N
+ FF9E..FF9F;H     # Lm     [2] HALFWIDTH KATAKANA VOICED SOUND MARK..HALFWIDTH KATAKANA SEMI-VOICED SOUND MARK
+ FFA0..FFBE;H     # Lo    [31] HALFWIDTH HANGUL FILLER..HALFWIDTH HANGUL LETTER HIEUH
+ FFC2..FFC7;H     # Lo     [6] HALFWIDTH HANGUL LETTER A..HALFWIDTH HANGUL LETTER E
+ FFCA..FFCF;H     # Lo     [6] HALFWIDTH HANGUL LETTER YEO..HALFWIDTH HANGUL LETTER OE
+ FFD2..FFD7;H     # Lo     [6] HALFWIDTH HANGUL LETTER YO..HALFWIDTH HANGUL LETTER YU
+ FFDA..FFDC;H     # Lo     [3] HALFWIDTH HANGUL LETTER EU..HALFWIDTH HANGUL LETTER I
+ FFE0..FFE1;F     # Sc     [2] FULLWIDTH CENT SIGN..FULLWIDTH POUND SIGN
+ FFE2;F           # Sm         FULLWIDTH NOT SIGN
+ FFE3;F           # Sk         FULLWIDTH MACRON
+ FFE4;F           # So         FULLWIDTH BROKEN BAR
+ FFE5..FFE6;F     # Sc     [2] FULLWIDTH YEN SIGN..FULLWIDTH WON SIGN
+ FFE8;H           # So         HALFWIDTH FORMS LIGHT VERTICAL
+ FFE9..FFEC;H     # Sm     [4] HALFWIDTH LEFTWARDS ARROW..HALFWIDTH DOWNWARDS ARROW
+ FFED..FFEE;H     # So     [2] HALFWIDTH BLACK SQUARE..HALFWIDTH WHITE CIRCLE
+ FFF9..FFFB;N     # Cf     [3] INTERLINEAR ANNOTATION ANCHOR..INTERLINEAR ANNOTATION TERMINATOR
+ FFFC;N           # So         OBJECT REPLACEMENT CHARACTER
+ FFFD;A           # So         REPLACEMENT CHARACTER
+ 10000..1000B;N   # Lo    [12] LINEAR B SYLLABLE B008 A..LINEAR B SYLLABLE B046 JE
+ 1000D..10026;N   # Lo    [26] LINEAR B SYLLABLE B036 JO..LINEAR B SYLLABLE B032 QO
+ 10028..1003A;N   # Lo    [19] LINEAR B SYLLABLE B060 RA..LINEAR B SYLLABLE B042 WO
+ 1003C..1003D;N   # Lo     [2] LINEAR B SYLLABLE B017 ZA..LINEAR B SYLLABLE B074 ZE
+ 1003F..1004D;N   # Lo    [15] LINEAR B SYLLABLE B020 ZO..LINEAR B SYLLABLE B091 TWO
+ 10050..1005D;N   # Lo    [14] LINEAR B SYMBOL B018..LINEAR B SYMBOL B089
+ 10080..100FA;N   # Lo   [123] LINEAR B IDEOGRAM B100 MAN..LINEAR B IDEOGRAM VESSEL B305
+ 10100..10102;N   # Po     [3] AEGEAN WORD SEPARATOR LINE..AEGEAN CHECK MARK
+ 10107..10133;N   # No    [45] AEGEAN NUMBER ONE..AEGEAN NUMBER NINETY THOUSAND
+ 10137..1013F;N   # So     [9] AEGEAN WEIGHT BASE UNIT..AEGEAN MEASURE THIRD SUBUNIT
+ 10140..10174;N   # Nl    [53] GREEK ACROPHONIC ATTIC ONE QUARTER..GREEK ACROPHONIC STRATIAN FIFTY MNAS
+ 10175..10178;N   # No     [4] GREEK ONE HALF SIGN..GREEK THREE QUARTERS SIGN
+ 10179..10189;N   # So    [17] GREEK YEAR SIGN..GREEK TRYBLION BASE SIGN
+ 1018A..1018B;N   # No     [2] GREEK ZERO SIGN..GREEK ONE QUARTER SIGN
+ 1018C..1018E;N   # So     [3] GREEK SINUSOID SIGN..NOMISMA SIGN
+ 10190..1019B;N   # So    [12] ROMAN SEXTANS SIGN..ROMAN CENTURIAL SIGN
+ 101A0;N          # So         GREEK SYMBOL TAU RHO
+ 101D0..101FC;N   # So    [45] PHAISTOS DISC SIGN PEDESTRIAN..PHAISTOS DISC SIGN WAVY BAND
+ 101FD;N          # Mn         PHAISTOS DISC SIGN COMBINING OBLIQUE STROKE
+ 10280..1029C;N   # Lo    [29] LYCIAN LETTER A..LYCIAN LETTER X
+ 102A0..102D0;N   # Lo    [49] CARIAN LETTER A..CARIAN LETTER UUU3
+ 102E0;N          # Mn         COPTIC EPACT THOUSANDS MARK
+ 102E1..102FB;N   # No    [27] COPTIC EPACT DIGIT ONE..COPTIC EPACT NUMBER NINE HUNDRED
+ 10300..1031F;N   # Lo    [32] OLD ITALIC LETTER A..OLD ITALIC LETTER ESS
+ 10320..10323;N   # No     [4] OLD ITALIC NUMERAL ONE..OLD ITALIC NUMERAL FIFTY
+ 1032D..1032F;N   # Lo     [3] OLD ITALIC LETTER YE..OLD ITALIC LETTER SOUTHERN TSE
+ 10330..10340;N   # Lo    [17] GOTHIC LETTER AHSA..GOTHIC LETTER PAIRTHRA
+ 10341;N          # Nl         GOTHIC LETTER NINETY
+ 10342..10349;N   # Lo     [8] GOTHIC LETTER RAIDA..GOTHIC LETTER OTHAL
+ 1034A;N          # Nl         GOTHIC LETTER NINE HUNDRED
+ 10350..10375;N   # Lo    [38] OLD PERMIC LETTER AN..OLD PERMIC LETTER IA
+ 10376..1037A;N   # Mn     [5] COMBINING OLD PERMIC LETTER AN..COMBINING OLD PERMIC LETTER SII
+ 10380..1039D;N   # Lo    [30] UGARITIC LETTER ALPA..UGARITIC LETTER SSU
+ 1039F;N          # Po         UGARITIC WORD DIVIDER
+ 103A0..103C3;N   # Lo    [36] OLD PERSIAN SIGN A..OLD PERSIAN SIGN HA
+ 103C8..103CF;N   # Lo     [8] OLD PERSIAN SIGN AURAMAZDAA..OLD PERSIAN SIGN BUUMISH
+ 103D0;N          # Po         OLD PERSIAN WORD DIVIDER
+ 103D1..103D5;N   # Nl     [5] OLD PERSIAN NUMBER ONE..OLD PERSIAN NUMBER HUNDRED
+ 10400..1044F;N   # L&    [80] DESERET CAPITAL LETTER LONG I..DESERET SMALL LETTER EW
+ 10450..1047F;N   # Lo    [48] SHAVIAN LETTER PEEP..SHAVIAN LETTER YEW
+ 10480..1049D;N   # Lo    [30] OSMANYA LETTER ALEF..OSMANYA LETTER OO
+ 104A0..104A9;N   # Nd    [10] OSMANYA DIGIT ZERO..OSMANYA DIGIT NINE
+ 104B0..104D3;N   # Lu    [36] OSAGE CAPITAL LETTER A..OSAGE CAPITAL LETTER ZHA
+ 104D8..104FB;N   # Ll    [36] OSAGE SMALL LETTER A..OSAGE SMALL LETTER ZHA
+ 10500..10527;N   # Lo    [40] ELBASAN LETTER A..ELBASAN LETTER KHE
+ 10530..10563;N   # Lo    [52] CAUCASIAN ALBANIAN LETTER ALT..CAUCASIAN ALBANIAN LETTER KIW
+ 1056F;N          # Po         CAUCASIAN ALBANIAN CITATION MARK
+ 10600..10736;N   # Lo   [311] LINEAR A SIGN AB001..LINEAR A SIGN A664
+ 10740..10755;N   # Lo    [22] LINEAR A SIGN A701 A..LINEAR A SIGN A732 JE
+ 10760..10767;N   # Lo     [8] LINEAR A SIGN A800..LINEAR A SIGN A807
+ 10800..10805;N   # Lo     [6] CYPRIOT SYLLABLE A..CYPRIOT SYLLABLE JA
+ 10808;N          # Lo         CYPRIOT SYLLABLE JO
+ 1080A..10835;N   # Lo    [44] CYPRIOT SYLLABLE KA..CYPRIOT SYLLABLE WO
+ 10837..10838;N   # Lo     [2] CYPRIOT SYLLABLE XA..CYPRIOT SYLLABLE XE
+ 1083C;N          # Lo         CYPRIOT SYLLABLE ZA
+ 1083F;N          # Lo         CYPRIOT SYLLABLE ZO
+ 10840..10855;N   # Lo    [22] IMPERIAL ARAMAIC LETTER ALEPH..IMPERIAL ARAMAIC LETTER TAW
+ 10857;N          # Po         IMPERIAL ARAMAIC SECTION SIGN
+ 10858..1085F;N   # No     [8] IMPERIAL ARAMAIC NUMBER ONE..IMPERIAL ARAMAIC NUMBER TEN THOUSAND
+ 10860..10876;N   # Lo    [23] PALMYRENE LETTER ALEPH..PALMYRENE LETTER TAW
+ 10877..10878;N   # So     [2] PALMYRENE LEFT-POINTING FLEURON..PALMYRENE RIGHT-POINTING FLEURON
+ 10879..1087F;N   # No     [7] PALMYRENE NUMBER ONE..PALMYRENE NUMBER TWENTY
+ 10880..1089E;N   # Lo    [31] NABATAEAN LETTER FINAL ALEPH..NABATAEAN LETTER TAW
+ 108A7..108AF;N   # No     [9] NABATAEAN NUMBER ONE..NABATAEAN NUMBER ONE HUNDRED
+ 108E0..108F2;N   # Lo    [19] HATRAN LETTER ALEPH..HATRAN LETTER QOPH
+ 108F4..108F5;N   # Lo     [2] HATRAN LETTER SHIN..HATRAN LETTER TAW
+ 108FB..108FF;N   # No     [5] HATRAN NUMBER ONE..HATRAN NUMBER ONE HUNDRED
+ 10900..10915;N   # Lo    [22] PHOENICIAN LETTER ALF..PHOENICIAN LETTER TAU
+ 10916..1091B;N   # No     [6] PHOENICIAN NUMBER ONE..PHOENICIAN NUMBER THREE
+ 1091F;N          # Po         PHOENICIAN WORD SEPARATOR
+ 10920..10939;N   # Lo    [26] LYDIAN LETTER A..LYDIAN LETTER C
+ 1093F;N          # Po         LYDIAN TRIANGULAR MARK
+ 10980..1099F;N   # Lo    [32] MEROITIC HIEROGLYPHIC LETTER A..MEROITIC HIEROGLYPHIC SYMBOL VIDJ-2
+ 109A0..109B7;N   # Lo    [24] MEROITIC CURSIVE LETTER A..MEROITIC CURSIVE LETTER DA
+ 109BC..109BD;N   # No     [2] MEROITIC CURSIVE FRACTION ELEVEN TWELFTHS..MEROITIC CURSIVE FRACTION ONE HALF
+ 109BE..109BF;N   # Lo     [2] MEROITIC CURSIVE LOGOGRAM RMT..MEROITIC CURSIVE LOGOGRAM IMN
+ 109C0..109CF;N   # No    [16] MEROITIC CURSIVE NUMBER ONE..MEROITIC CURSIVE NUMBER SEVENTY
+ 109D2..109FF;N   # No    [46] MEROITIC CURSIVE NUMBER ONE HUNDRED..MEROITIC CURSIVE FRACTION TEN TWELFTHS
+ 10A00;N          # Lo         KHAROSHTHI LETTER A
+ 10A01..10A03;N   # Mn     [3] KHAROSHTHI VOWEL SIGN I..KHAROSHTHI VOWEL SIGN VOCALIC R
+ 10A05..10A06;N   # Mn     [2] KHAROSHTHI VOWEL SIGN E..KHAROSHTHI VOWEL SIGN O
+ 10A0C..10A0F;N   # Mn     [4] KHAROSHTHI VOWEL LENGTH MARK..KHAROSHTHI SIGN VISARGA
+ 10A10..10A13;N   # Lo     [4] KHAROSHTHI LETTER KA..KHAROSHTHI LETTER GHA
+ 10A15..10A17;N   # Lo     [3] KHAROSHTHI LETTER CA..KHAROSHTHI LETTER JA
+ 10A19..10A35;N   # Lo    [29] KHAROSHTHI LETTER NYA..KHAROSHTHI LETTER VHA
+ 10A38..10A3A;N   # Mn     [3] KHAROSHTHI SIGN BAR ABOVE..KHAROSHTHI SIGN DOT BELOW
+ 10A3F;N          # Mn         KHAROSHTHI VIRAMA
+ 10A40..10A48;N   # No     [9] KHAROSHTHI DIGIT ONE..KHAROSHTHI FRACTION ONE HALF
+ 10A50..10A58;N   # Po     [9] KHAROSHTHI PUNCTUATION DOT..KHAROSHTHI PUNCTUATION LINES
+ 10A60..10A7C;N   # Lo    [29] OLD SOUTH ARABIAN LETTER HE..OLD SOUTH ARABIAN LETTER THETH
+ 10A7D..10A7E;N   # No     [2] OLD SOUTH ARABIAN NUMBER ONE..OLD SOUTH ARABIAN NUMBER FIFTY
+ 10A7F;N          # Po         OLD SOUTH ARABIAN NUMERIC INDICATOR
+ 10A80..10A9C;N   # Lo    [29] OLD NORTH ARABIAN LETTER HEH..OLD NORTH ARABIAN LETTER ZAH
+ 10A9D..10A9F;N   # No     [3] OLD NORTH ARABIAN NUMBER ONE..OLD NORTH ARABIAN NUMBER TWENTY
+ 10AC0..10AC7;N   # Lo     [8] MANICHAEAN LETTER ALEPH..MANICHAEAN LETTER WAW
+ 10AC8;N          # So         MANICHAEAN SIGN UD
+ 10AC9..10AE4;N   # Lo    [28] MANICHAEAN LETTER ZAYIN..MANICHAEAN LETTER TAW
+ 10AE5..10AE6;N   # Mn     [2] MANICHAEAN ABBREVIATION MARK ABOVE..MANICHAEAN ABBREVIATION MARK BELOW
+ 10AEB..10AEF;N   # No     [5] MANICHAEAN NUMBER ONE..MANICHAEAN NUMBER ONE HUNDRED
+ 10AF0..10AF6;N   # Po     [7] MANICHAEAN PUNCTUATION STAR..MANICHAEAN PUNCTUATION LINE FILLER
+ 10B00..10B35;N   # Lo    [54] AVESTAN LETTER A..AVESTAN LETTER HE
+ 10B39..10B3F;N   # Po     [7] AVESTAN ABBREVIATION MARK..LARGE ONE RING OVER TWO RINGS PUNCTUATION
+ 10B40..10B55;N   # Lo    [22] INSCRIPTIONAL PARTHIAN LETTER ALEPH..INSCRIPTIONAL PARTHIAN LETTER TAW
+ 10B58..10B5F;N   # No     [8] INSCRIPTIONAL PARTHIAN NUMBER ONE..INSCRIPTIONAL PARTHIAN NUMBER ONE THOUSAND
+ 10B60..10B72;N   # Lo    [19] INSCRIPTIONAL PAHLAVI LETTER ALEPH..INSCRIPTIONAL PAHLAVI LETTER TAW
+ 10B78..10B7F;N   # No     [8] INSCRIPTIONAL PAHLAVI NUMBER ONE..INSCRIPTIONAL PAHLAVI NUMBER ONE THOUSAND
+ 10B80..10B91;N   # Lo    [18] PSALTER PAHLAVI LETTER ALEPH..PSALTER PAHLAVI LETTER TAW
+ 10B99..10B9C;N   # Po     [4] PSALTER PAHLAVI SECTION MARK..PSALTER PAHLAVI FOUR DOTS WITH DOT
+ 10BA9..10BAF;N   # No     [7] PSALTER PAHLAVI NUMBER ONE..PSALTER PAHLAVI NUMBER ONE HUNDRED
+ 10C00..10C48;N   # Lo    [73] OLD TURKIC LETTER ORKHON A..OLD TURKIC LETTER ORKHON BASH
+ 10C80..10CB2;N   # Lu    [51] OLD HUNGARIAN CAPITAL LETTER A..OLD HUNGARIAN CAPITAL LETTER US
+ 10CC0..10CF2;N   # Ll    [51] OLD HUNGARIAN SMALL LETTER A..OLD HUNGARIAN SMALL LETTER US
+ 10CFA..10CFF;N   # No     [6] OLD HUNGARIAN NUMBER ONE..OLD HUNGARIAN NUMBER ONE THOUSAND
+ 10D00..10D23;N   # Lo    [36] HANIFI ROHINGYA LETTER A..HANIFI ROHINGYA MARK NA KHONNA
+ 10D24..10D27;N   # Mn     [4] HANIFI ROHINGYA SIGN HARBAHAY..HANIFI ROHINGYA SIGN TASSI
+ 10D30..10D39;N   # Nd    [10] HANIFI ROHINGYA DIGIT ZERO..HANIFI ROHINGYA DIGIT NINE
+ 10E60..10E7E;N   # No    [31] RUMI DIGIT ONE..RUMI FRACTION TWO THIRDS
+ 10F00..10F1C;N   # Lo    [29] OLD SOGDIAN LETTER ALEPH..OLD SOGDIAN LETTER FINAL TAW WITH VERTICAL TAIL
+ 10F1D..10F26;N   # No    [10] OLD SOGDIAN NUMBER ONE..OLD SOGDIAN FRACTION ONE HALF
+ 10F27;N          # Lo         OLD SOGDIAN LIGATURE AYIN-DALETH
+ 10F30..10F45;N   # Lo    [22] SOGDIAN LETTER ALEPH..SOGDIAN INDEPENDENT SHIN
+ 10F46..10F50;N   # Mn    [11] SOGDIAN COMBINING DOT BELOW..SOGDIAN COMBINING STROKE BELOW
+ 10F51..10F54;N   # No     [4] SOGDIAN NUMBER ONE..SOGDIAN NUMBER ONE HUNDRED
+ 10F55..10F59;N   # Po     [5] SOGDIAN PUNCTUATION TWO VERTICAL BARS..SOGDIAN PUNCTUATION HALF CIRCLE WITH DOT
+ 10FE0..10FF6;N   # Lo    [23] ELYMAIC LETTER ALEPH..ELYMAIC LIGATURE ZAYIN-YODH
+ 11000;N          # Mc         BRAHMI SIGN CANDRABINDU
+ 11001;N          # Mn         BRAHMI SIGN ANUSVARA
+ 11002;N          # Mc         BRAHMI SIGN VISARGA
+ 11003..11037;N   # Lo    [53] BRAHMI SIGN JIHVAMULIYA..BRAHMI LETTER OLD TAMIL NNNA
+ 11038..11046;N   # Mn    [15] BRAHMI VOWEL SIGN AA..BRAHMI VIRAMA
+ 11047..1104D;N   # Po     [7] BRAHMI DANDA..BRAHMI PUNCTUATION LOTUS
+ 11052..11065;N   # No    [20] BRAHMI NUMBER ONE..BRAHMI NUMBER ONE THOUSAND
+ 11066..1106F;N   # Nd    [10] BRAHMI DIGIT ZERO..BRAHMI DIGIT NINE
+ 1107F;N          # Mn         BRAHMI NUMBER JOINER
+ 11080..11081;N   # Mn     [2] KAITHI SIGN CANDRABINDU..KAITHI SIGN ANUSVARA
+ 11082;N          # Mc         KAITHI SIGN VISARGA
+ 11083..110AF;N   # Lo    [45] KAITHI LETTER A..KAITHI LETTER HA
+ 110B0..110B2;N   # Mc     [3] KAITHI VOWEL SIGN AA..KAITHI VOWEL SIGN II
+ 110B3..110B6;N   # Mn     [4] KAITHI VOWEL SIGN U..KAITHI VOWEL SIGN AI
+ 110B7..110B8;N   # Mc     [2] KAITHI VOWEL SIGN O..KAITHI VOWEL SIGN AU
+ 110B9..110BA;N   # Mn     [2] KAITHI SIGN VIRAMA..KAITHI SIGN NUKTA
+ 110BB..110BC;N   # Po     [2] KAITHI ABBREVIATION SIGN..KAITHI ENUMERATION SIGN
+ 110BD;N          # Cf         KAITHI NUMBER SIGN
+ 110BE..110C1;N   # Po     [4] KAITHI SECTION MARK..KAITHI DOUBLE DANDA
+ 110CD;N          # Cf         KAITHI NUMBER SIGN ABOVE
+ 110D0..110E8;N   # Lo    [25] SORA SOMPENG LETTER SAH..SORA SOMPENG LETTER MAE
+ 110F0..110F9;N   # Nd    [10] SORA SOMPENG DIGIT ZERO..SORA SOMPENG DIGIT NINE
+ 11100..11102;N   # Mn     [3] CHAKMA SIGN CANDRABINDU..CHAKMA SIGN VISARGA
+ 11103..11126;N   # Lo    [36] CHAKMA LETTER AA..CHAKMA LETTER HAA
+ 11127..1112B;N   # Mn     [5] CHAKMA VOWEL SIGN A..CHAKMA VOWEL SIGN UU
+ 1112C;N          # Mc         CHAKMA VOWEL SIGN E
+ 1112D..11134;N   # Mn     [8] CHAKMA VOWEL SIGN AI..CHAKMA MAAYYAA
+ 11136..1113F;N   # Nd    [10] CHAKMA DIGIT ZERO..CHAKMA DIGIT NINE
+ 11140..11143;N   # Po     [4] CHAKMA SECTION MARK..CHAKMA QUESTION MARK
+ 11144;N          # Lo         CHAKMA LETTER LHAA
+ 11145..11146;N   # Mc     [2] CHAKMA VOWEL SIGN AA..CHAKMA VOWEL SIGN EI
+ 11150..11172;N   # Lo    [35] MAHAJANI LETTER A..MAHAJANI LETTER RRA
+ 11173;N          # Mn         MAHAJANI SIGN NUKTA
+ 11174..11175;N   # Po     [2] MAHAJANI ABBREVIATION SIGN..MAHAJANI SECTION MARK
+ 11176;N          # Lo         MAHAJANI LIGATURE SHRI
+ 11180..11181;N   # Mn     [2] SHARADA SIGN CANDRABINDU..SHARADA SIGN ANUSVARA
+ 11182;N          # Mc         SHARADA SIGN VISARGA
+ 11183..111B2;N   # Lo    [48] SHARADA LETTER A..SHARADA LETTER HA
+ 111B3..111B5;N   # Mc     [3] SHARADA VOWEL SIGN AA..SHARADA VOWEL SIGN II
+ 111B6..111BE;N   # Mn     [9] SHARADA VOWEL SIGN U..SHARADA VOWEL SIGN O
+ 111BF..111C0;N   # Mc     [2] SHARADA VOWEL SIGN AU..SHARADA SIGN VIRAMA
+ 111C1..111C4;N   # Lo     [4] SHARADA SIGN AVAGRAHA..SHARADA OM
+ 111C5..111C8;N   # Po     [4] SHARADA DANDA..SHARADA SEPARATOR
+ 111C9..111CC;N   # Mn     [4] SHARADA SANDHI MARK..SHARADA EXTRA SHORT VOWEL MARK
+ 111CD;N          # Po         SHARADA SUTRA MARK
+ 111D0..111D9;N   # Nd    [10] SHARADA DIGIT ZERO..SHARADA DIGIT NINE
+ 111DA;N          # Lo         SHARADA EKAM
+ 111DB;N          # Po         SHARADA SIGN SIDDHAM
+ 111DC;N          # Lo         SHARADA HEADSTROKE
+ 111DD..111DF;N   # Po     [3] SHARADA CONTINUATION SIGN..SHARADA SECTION MARK-2
+ 111E1..111F4;N   # No    [20] SINHALA ARCHAIC DIGIT ONE..SINHALA ARCHAIC NUMBER ONE THOUSAND
+ 11200..11211;N   # Lo    [18] KHOJKI LETTER A..KHOJKI LETTER JJA
+ 11213..1122B;N   # Lo    [25] KHOJKI LETTER NYA..KHOJKI LETTER LLA
+ 1122C..1122E;N   # Mc     [3] KHOJKI VOWEL SIGN AA..KHOJKI VOWEL SIGN II
+ 1122F..11231;N   # Mn     [3] KHOJKI VOWEL SIGN U..KHOJKI VOWEL SIGN AI
+ 11232..11233;N   # Mc     [2] KHOJKI VOWEL SIGN O..KHOJKI VOWEL SIGN AU
+ 11234;N          # Mn         KHOJKI SIGN ANUSVARA
+ 11235;N          # Mc         KHOJKI SIGN VIRAMA
+ 11236..11237;N   # Mn     [2] KHOJKI SIGN NUKTA..KHOJKI SIGN SHADDA
+ 11238..1123D;N   # Po     [6] KHOJKI DANDA..KHOJKI ABBREVIATION SIGN
+ 1123E;N          # Mn         KHOJKI SIGN SUKUN
+ 11280..11286;N   # Lo     [7] MULTANI LETTER A..MULTANI LETTER GA
+ 11288;N          # Lo         MULTANI LETTER GHA
+ 1128A..1128D;N   # Lo     [4] MULTANI LETTER CA..MULTANI LETTER JJA
+ 1128F..1129D;N   # Lo    [15] MULTANI LETTER NYA..MULTANI LETTER BA
+ 1129F..112A8;N   # Lo    [10] MULTANI LETTER BHA..MULTANI LETTER RHA
+ 112A9;N          # Po         MULTANI SECTION MARK
+ 112B0..112DE;N   # Lo    [47] KHUDAWADI LETTER A..KHUDAWADI LETTER HA
+ 112DF;N          # Mn         KHUDAWADI SIGN ANUSVARA
+ 112E0..112E2;N   # Mc     [3] KHUDAWADI VOWEL SIGN AA..KHUDAWADI VOWEL SIGN II
+ 112E3..112EA;N   # Mn     [8] KHUDAWADI VOWEL SIGN U..KHUDAWADI SIGN VIRAMA
+ 112F0..112F9;N   # Nd    [10] KHUDAWADI DIGIT ZERO..KHUDAWADI DIGIT NINE
+ 11300..11301;N   # Mn     [2] GRANTHA SIGN COMBINING ANUSVARA ABOVE..GRANTHA SIGN CANDRABINDU
+ 11302..11303;N   # Mc     [2] GRANTHA SIGN ANUSVARA..GRANTHA SIGN VISARGA
+ 11305..1130C;N   # Lo     [8] GRANTHA LETTER A..GRANTHA LETTER VOCALIC L
+ 1130F..11310;N   # Lo     [2] GRANTHA LETTER EE..GRANTHA LETTER AI
+ 11313..11328;N   # Lo    [22] GRANTHA LETTER OO..GRANTHA LETTER NA
+ 1132A..11330;N   # Lo     [7] GRANTHA LETTER PA..GRANTHA LETTER RA
+ 11332..11333;N   # Lo     [2] GRANTHA LETTER LA..GRANTHA LETTER LLA
+ 11335..11339;N   # Lo     [5] GRANTHA LETTER VA..GRANTHA LETTER HA
+ 1133B..1133C;N   # Mn     [2] COMBINING BINDU BELOW..GRANTHA SIGN NUKTA
+ 1133D;N          # Lo         GRANTHA SIGN AVAGRAHA
+ 1133E..1133F;N   # Mc     [2] GRANTHA VOWEL SIGN AA..GRANTHA VOWEL SIGN I
+ 11340;N          # Mn         GRANTHA VOWEL SIGN II
+ 11341..11344;N   # Mc     [4] GRANTHA VOWEL SIGN U..GRANTHA VOWEL SIGN VOCALIC RR
+ 11347..11348;N   # Mc     [2] GRANTHA VOWEL SIGN EE..GRANTHA VOWEL SIGN AI
+ 1134B..1134D;N   # Mc     [3] GRANTHA VOWEL SIGN OO..GRANTHA SIGN VIRAMA
+ 11350;N          # Lo         GRANTHA OM
+ 11357;N          # Mc         GRANTHA AU LENGTH MARK
+ 1135D..11361;N   # Lo     [5] GRANTHA SIGN PLUTA..GRANTHA LETTER VOCALIC LL
+ 11362..11363;N   # Mc     [2] GRANTHA VOWEL SIGN VOCALIC L..GRANTHA VOWEL SIGN VOCALIC LL
+ 11366..1136C;N   # Mn     [7] COMBINING GRANTHA DIGIT ZERO..COMBINING GRANTHA DIGIT SIX
+ 11370..11374;N   # Mn     [5] COMBINING GRANTHA LETTER A..COMBINING GRANTHA LETTER PA
+ 11400..11434;N   # Lo    [53] NEWA LETTER A..NEWA LETTER HA
+ 11435..11437;N   # Mc     [3] NEWA VOWEL SIGN AA..NEWA VOWEL SIGN II
+ 11438..1143F;N   # Mn     [8] NEWA VOWEL SIGN U..NEWA VOWEL SIGN AI
+ 11440..11441;N   # Mc     [2] NEWA VOWEL SIGN O..NEWA VOWEL SIGN AU
+ 11442..11444;N   # Mn     [3] NEWA SIGN VIRAMA..NEWA SIGN ANUSVARA
+ 11445;N          # Mc         NEWA SIGN VISARGA
+ 11446;N          # Mn         NEWA SIGN NUKTA
+ 11447..1144A;N   # Lo     [4] NEWA SIGN AVAGRAHA..NEWA SIDDHI
+ 1144B..1144F;N   # Po     [5] NEWA DANDA..NEWA ABBREVIATION SIGN
+ 11450..11459;N   # Nd    [10] NEWA DIGIT ZERO..NEWA DIGIT NINE
+ 1145B;N          # Po         NEWA PLACEHOLDER MARK
+ 1145D;N          # Po         NEWA INSERTION SIGN
+ 1145E;N          # Mn         NEWA SANDHI MARK
+ 1145F;N          # Lo         NEWA LETTER VEDIC ANUSVARA
+ 11480..114AF;N   # Lo    [48] TIRHUTA ANJI..TIRHUTA LETTER HA
+ 114B0..114B2;N   # Mc     [3] TIRHUTA VOWEL SIGN AA..TIRHUTA VOWEL SIGN II
+ 114B3..114B8;N   # Mn     [6] TIRHUTA VOWEL SIGN U..TIRHUTA VOWEL SIGN VOCALIC LL
+ 114B9;N          # Mc         TIRHUTA VOWEL SIGN E
+ 114BA;N          # Mn         TIRHUTA VOWEL SIGN SHORT E
+ 114BB..114BE;N   # Mc     [4] TIRHUTA VOWEL SIGN AI..TIRHUTA VOWEL SIGN AU
+ 114BF..114C0;N   # Mn     [2] TIRHUTA SIGN CANDRABINDU..TIRHUTA SIGN ANUSVARA
+ 114C1;N          # Mc         TIRHUTA SIGN VISARGA
+ 114C2..114C3;N   # Mn     [2] TIRHUTA SIGN VIRAMA..TIRHUTA SIGN NUKTA
+ 114C4..114C5;N   # Lo     [2] TIRHUTA SIGN AVAGRAHA..TIRHUTA GVANG
+ 114C6;N          # Po         TIRHUTA ABBREVIATION SIGN
+ 114C7;N          # Lo         TIRHUTA OM
+ 114D0..114D9;N   # Nd    [10] TIRHUTA DIGIT ZERO..TIRHUTA DIGIT NINE
+ 11580..115AE;N   # Lo    [47] SIDDHAM LETTER A..SIDDHAM LETTER HA
+ 115AF..115B1;N   # Mc     [3] SIDDHAM VOWEL SIGN AA..SIDDHAM VOWEL SIGN II
+ 115B2..115B5;N   # Mn     [4] SIDDHAM VOWEL SIGN U..SIDDHAM VOWEL SIGN VOCALIC RR
+ 115B8..115BB;N   # Mc     [4] SIDDHAM VOWEL SIGN E..SIDDHAM VOWEL SIGN AU
+ 115BC..115BD;N   # Mn     [2] SIDDHAM SIGN CANDRABINDU..SIDDHAM SIGN ANUSVARA
+ 115BE;N          # Mc         SIDDHAM SIGN VISARGA
+ 115BF..115C0;N   # Mn     [2] SIDDHAM SIGN VIRAMA..SIDDHAM SIGN NUKTA
+ 115C1..115D7;N   # Po    [23] SIDDHAM SIGN SIDDHAM..SIDDHAM SECTION MARK WITH CIRCLES AND FOUR ENCLOSURES
+ 115D8..115DB;N   # Lo     [4] SIDDHAM LETTER THREE-CIRCLE ALTERNATE I..SIDDHAM LETTER ALTERNATE U
+ 115DC..115DD;N   # Mn     [2] SIDDHAM VOWEL SIGN ALTERNATE U..SIDDHAM VOWEL SIGN ALTERNATE UU
+ 11600..1162F;N   # Lo    [48] MODI LETTER A..MODI LETTER LLA
+ 11630..11632;N   # Mc     [3] MODI VOWEL SIGN AA..MODI VOWEL SIGN II
+ 11633..1163A;N   # Mn     [8] MODI VOWEL SIGN U..MODI VOWEL SIGN AI
+ 1163B..1163C;N   # Mc     [2] MODI VOWEL SIGN O..MODI VOWEL SIGN AU
+ 1163D;N          # Mn         MODI SIGN ANUSVARA
+ 1163E;N          # Mc         MODI SIGN VISARGA
+ 1163F..11640;N   # Mn     [2] MODI SIGN VIRAMA..MODI SIGN ARDHACANDRA
+ 11641..11643;N   # Po     [3] MODI DANDA..MODI ABBREVIATION SIGN
+ 11644;N          # Lo         MODI SIGN HUVA
+ 11650..11659;N   # Nd    [10] MODI DIGIT ZERO..MODI DIGIT NINE
+ 11660..1166C;N   # Po    [13] MONGOLIAN BIRGA WITH ORNAMENT..MONGOLIAN TURNED SWIRL BIRGA WITH DOUBLE ORNAMENT
+ 11680..116AA;N   # Lo    [43] TAKRI LETTER A..TAKRI LETTER RRA
+ 116AB;N          # Mn         TAKRI SIGN ANUSVARA
+ 116AC;N          # Mc         TAKRI SIGN VISARGA
+ 116AD;N          # Mn         TAKRI VOWEL SIGN AA
+ 116AE..116AF;N   # Mc     [2] TAKRI VOWEL SIGN I..TAKRI VOWEL SIGN II
+ 116B0..116B5;N   # Mn     [6] TAKRI VOWEL SIGN U..TAKRI VOWEL SIGN AU
+ 116B6;N          # Mc         TAKRI SIGN VIRAMA
+ 116B7;N          # Mn         TAKRI SIGN NUKTA
+ 116B8;N          # Lo         TAKRI LETTER ARCHAIC KHA
+ 116C0..116C9;N   # Nd    [10] TAKRI DIGIT ZERO..TAKRI DIGIT NINE
+ 11700..1171A;N   # Lo    [27] AHOM LETTER KA..AHOM LETTER ALTERNATE BA
+ 1171D..1171F;N   # Mn     [3] AHOM CONSONANT SIGN MEDIAL LA..AHOM CONSONANT SIGN MEDIAL LIGATING RA
+ 11720..11721;N   # Mc     [2] AHOM VOWEL SIGN A..AHOM VOWEL SIGN AA
+ 11722..11725;N   # Mn     [4] AHOM VOWEL SIGN I..AHOM VOWEL SIGN UU
+ 11726;N          # Mc         AHOM VOWEL SIGN E
+ 11727..1172B;N   # Mn     [5] AHOM VOWEL SIGN AW..AHOM SIGN KILLER
+ 11730..11739;N   # Nd    [10] AHOM DIGIT ZERO..AHOM DIGIT NINE
+ 1173A..1173B;N   # No     [2] AHOM NUMBER TEN..AHOM NUMBER TWENTY
+ 1173C..1173E;N   # Po     [3] AHOM SIGN SMALL SECTION..AHOM SIGN RULAI
+ 1173F;N          # So         AHOM SYMBOL VI
+ 11800..1182B;N   # Lo    [44] DOGRA LETTER A..DOGRA LETTER RRA
+ 1182C..1182E;N   # Mc     [3] DOGRA VOWEL SIGN AA..DOGRA VOWEL SIGN II
+ 1182F..11837;N   # Mn     [9] DOGRA VOWEL SIGN U..DOGRA SIGN ANUSVARA
+ 11838;N          # Mc         DOGRA SIGN VISARGA
+ 11839..1183A;N   # Mn     [2] DOGRA SIGN VIRAMA..DOGRA SIGN NUKTA
+ 1183B;N          # Po         DOGRA ABBREVIATION SIGN
+ 118A0..118DF;N   # L&    [64] WARANG CITI CAPITAL LETTER NGAA..WARANG CITI SMALL LETTER VIYO
+ 118E0..118E9;N   # Nd    [10] WARANG CITI DIGIT ZERO..WARANG CITI DIGIT NINE
+ 118EA..118F2;N   # No     [9] WARANG CITI NUMBER TEN..WARANG CITI NUMBER NINETY
+ 118FF;N          # Lo         WARANG CITI OM
+ 119A0..119A7;N   # Lo     [8] NANDINAGARI LETTER A..NANDINAGARI LETTER VOCALIC RR
+ 119AA..119D0;N   # Lo    [39] NANDINAGARI LETTER E..NANDINAGARI LETTER RRA
+ 119D1..119D3;N   # Mc     [3] NANDINAGARI VOWEL SIGN AA..NANDINAGARI VOWEL SIGN II
+ 119D4..119D7;N   # Mn     [4] NANDINAGARI VOWEL SIGN U..NANDINAGARI VOWEL SIGN VOCALIC RR
+ 119DA..119DB;N   # Mn     [2] NANDINAGARI VOWEL SIGN E..NANDINAGARI VOWEL SIGN AI
+ 119DC..119DF;N   # Mc     [4] NANDINAGARI VOWEL SIGN O..NANDINAGARI SIGN VISARGA
+ 119E0;N          # Mn         NANDINAGARI SIGN VIRAMA
+ 119E1;N          # Lo         NANDINAGARI SIGN AVAGRAHA
+ 119E2;N          # Po         NANDINAGARI SIGN SIDDHAM
+ 119E3;N          # Lo         NANDINAGARI HEADSTROKE
+ 119E4;N          # Mc         NANDINAGARI VOWEL SIGN PRISHTHAMATRA E
+ 11A00;N          # Lo         ZANABAZAR SQUARE LETTER A
+ 11A01..11A0A;N   # Mn    [10] ZANABAZAR SQUARE VOWEL SIGN I..ZANABAZAR SQUARE VOWEL LENGTH MARK
+ 11A0B..11A32;N   # Lo    [40] ZANABAZAR SQUARE LETTER KA..ZANABAZAR SQUARE LETTER KSSA
+ 11A33..11A38;N   # Mn     [6] ZANABAZAR SQUARE FINAL CONSONANT MARK..ZANABAZAR SQUARE SIGN ANUSVARA
+ 11A39;N          # Mc         ZANABAZAR SQUARE SIGN VISARGA
+ 11A3A;N          # Lo         ZANABAZAR SQUARE CLUSTER-INITIAL LETTER RA
+ 11A3B..11A3E;N   # Mn     [4] ZANABAZAR SQUARE CLUSTER-FINAL LETTER YA..ZANABAZAR SQUARE CLUSTER-FINAL LETTER VA
+ 11A3F..11A46;N   # Po     [8] ZANABAZAR SQUARE INITIAL HEAD MARK..ZANABAZAR SQUARE CLOSING DOUBLE-LINED HEAD MARK
+ 11A47;N          # Mn         ZANABAZAR SQUARE SUBJOINER
+ 11A50;N          # Lo         SOYOMBO LETTER A
+ 11A51..11A56;N   # Mn     [6] SOYOMBO VOWEL SIGN I..SOYOMBO VOWEL SIGN OE
+ 11A57..11A58;N   # Mc     [2] SOYOMBO VOWEL SIGN AI..SOYOMBO VOWEL SIGN AU
+ 11A59..11A5B;N   # Mn     [3] SOYOMBO VOWEL SIGN VOCALIC R..SOYOMBO VOWEL LENGTH MARK
+ 11A5C..11A89;N   # Lo    [46] SOYOMBO LETTER KA..SOYOMBO CLUSTER-INITIAL LETTER SA
+ 11A8A..11A96;N   # Mn    [13] SOYOMBO FINAL CONSONANT SIGN G..SOYOMBO SIGN ANUSVARA
+ 11A97;N          # Mc         SOYOMBO SIGN VISARGA
+ 11A98..11A99;N   # Mn     [2] SOYOMBO GEMINATION MARK..SOYOMBO SUBJOINER
+ 11A9A..11A9C;N   # Po     [3] SOYOMBO MARK TSHEG..SOYOMBO MARK DOUBLE SHAD
+ 11A9D;N          # Lo         SOYOMBO MARK PLUTA
+ 11A9E..11AA2;N   # Po     [5] SOYOMBO HEAD MARK WITH MOON AND SUN AND TRIPLE FLAME..SOYOMBO TERMINAL MARK-2
+ 11AC0..11AF8;N   # Lo    [57] PAU CIN HAU LETTER PA..PAU CIN HAU GLOTTAL STOP FINAL
+ 11C00..11C08;N   # Lo     [9] BHAIKSUKI LETTER A..BHAIKSUKI LETTER VOCALIC L
+ 11C0A..11C2E;N   # Lo    [37] BHAIKSUKI LETTER E..BHAIKSUKI LETTER HA
+ 11C2F;N          # Mc         BHAIKSUKI VOWEL SIGN AA
+ 11C30..11C36;N   # Mn     [7] BHAIKSUKI VOWEL SIGN I..BHAIKSUKI VOWEL SIGN VOCALIC L
+ 11C38..11C3D;N   # Mn     [6] BHAIKSUKI VOWEL SIGN E..BHAIKSUKI SIGN ANUSVARA
+ 11C3E;N          # Mc         BHAIKSUKI SIGN VISARGA
+ 11C3F;N          # Mn         BHAIKSUKI SIGN VIRAMA
+ 11C40;N          # Lo         BHAIKSUKI SIGN AVAGRAHA
+ 11C41..11C45;N   # Po     [5] BHAIKSUKI DANDA..BHAIKSUKI GAP FILLER-2
+ 11C50..11C59;N   # Nd    [10] BHAIKSUKI DIGIT ZERO..BHAIKSUKI DIGIT NINE
+ 11C5A..11C6C;N   # No    [19] BHAIKSUKI NUMBER ONE..BHAIKSUKI HUNDREDS UNIT MARK
+ 11C70..11C71;N   # Po     [2] MARCHEN HEAD MARK..MARCHEN MARK SHAD
+ 11C72..11C8F;N   # Lo    [30] MARCHEN LETTER KA..MARCHEN LETTER A
+ 11C92..11CA7;N   # Mn    [22] MARCHEN SUBJOINED LETTER KA..MARCHEN SUBJOINED LETTER ZA
+ 11CA9;N          # Mc         MARCHEN SUBJOINED LETTER YA
+ 11CAA..11CB0;N   # Mn     [7] MARCHEN SUBJOINED LETTER RA..MARCHEN VOWEL SIGN AA
+ 11CB1;N          # Mc         MARCHEN VOWEL SIGN I
+ 11CB2..11CB3;N   # Mn     [2] MARCHEN VOWEL SIGN U..MARCHEN VOWEL SIGN E
+ 11CB4;N          # Mc         MARCHEN VOWEL SIGN O
+ 11CB5..11CB6;N   # Mn     [2] MARCHEN SIGN ANUSVARA..MARCHEN SIGN CANDRABINDU
+ 11D00..11D06;N   # Lo     [7] MASARAM GONDI LETTER A..MASARAM GONDI LETTER E
+ 11D08..11D09;N   # Lo     [2] MASARAM GONDI LETTER AI..MASARAM GONDI LETTER O
+ 11D0B..11D30;N   # Lo    [38] MASARAM GONDI LETTER AU..MASARAM GONDI LETTER TRA
+ 11D31..11D36;N   # Mn     [6] MASARAM GONDI VOWEL SIGN AA..MASARAM GONDI VOWEL SIGN VOCALIC R
+ 11D3A;N          # Mn         MASARAM GONDI VOWEL SIGN E
+ 11D3C..11D3D;N   # Mn     [2] MASARAM GONDI VOWEL SIGN AI..MASARAM GONDI VOWEL SIGN O
+ 11D3F..11D45;N   # Mn     [7] MASARAM GONDI VOWEL SIGN AU..MASARAM GONDI VIRAMA
+ 11D46;N          # Lo         MASARAM GONDI REPHA
+ 11D47;N          # Mn         MASARAM GONDI RA-KARA
+ 11D50..11D59;N   # Nd    [10] MASARAM GONDI DIGIT ZERO..MASARAM GONDI DIGIT NINE
+ 11D60..11D65;N   # Lo     [6] GUNJALA GONDI LETTER A..GUNJALA GONDI LETTER UU
+ 11D67..11D68;N   # Lo     [2] GUNJALA GONDI LETTER EE..GUNJALA GONDI LETTER AI
+ 11D6A..11D89;N   # Lo    [32] GUNJALA GONDI LETTER OO..GUNJALA GONDI LETTER SA
+ 11D8A..11D8E;N   # Mc     [5] GUNJALA GONDI VOWEL SIGN AA..GUNJALA GONDI VOWEL SIGN UU
+ 11D90..11D91;N   # Mn     [2] GUNJALA GONDI VOWEL SIGN EE..GUNJALA GONDI VOWEL SIGN AI
+ 11D93..11D94;N   # Mc     [2] GUNJALA GONDI VOWEL SIGN OO..GUNJALA GONDI VOWEL SIGN AU
+ 11D95;N          # Mn         GUNJALA GONDI SIGN ANUSVARA
+ 11D96;N          # Mc         GUNJALA GONDI SIGN VISARGA
+ 11D97;N          # Mn         GUNJALA GONDI VIRAMA
+ 11D98;N          # Lo         GUNJALA GONDI OM
+ 11DA0..11DA9;N   # Nd    [10] GUNJALA GONDI DIGIT ZERO..GUNJALA GONDI DIGIT NINE
+ 11EE0..11EF2;N   # Lo    [19] MAKASAR LETTER KA..MAKASAR ANGKA
+ 11EF3..11EF4;N   # Mn     [2] MAKASAR VOWEL SIGN I..MAKASAR VOWEL SIGN U
+ 11EF5..11EF6;N   # Mc     [2] MAKASAR VOWEL SIGN E..MAKASAR VOWEL SIGN O
+ 11EF7..11EF8;N   # Po     [2] MAKASAR PASSIMBANG..MAKASAR END OF SECTION
+ 11FC0..11FD4;N   # No    [21] TAMIL FRACTION ONE THREE-HUNDRED-AND-TWENTIETH..TAMIL FRACTION DOWNSCALING FACTOR KIIZH
+ 11FD5..11FDC;N   # So     [8] TAMIL SIGN NEL..TAMIL SIGN MUKKURUNI
+ 11FDD..11FE0;N   # Sc     [4] TAMIL SIGN KAACU..TAMIL SIGN VARAAKAN
+ 11FE1..11FF1;N   # So    [17] TAMIL SIGN PAARAM..TAMIL SIGN VAKAIYARAA
+ 11FFF;N          # Po         TAMIL PUNCTUATION END OF TEXT
+ 12000..12399;N   # Lo   [922] CUNEIFORM SIGN A..CUNEIFORM SIGN U U
+ 12400..1246E;N   # Nl   [111] CUNEIFORM NUMERIC SIGN TWO ASH..CUNEIFORM NUMERIC SIGN NINE U VARIANT FORM
+ 12470..12474;N   # Po     [5] CUNEIFORM PUNCTUATION SIGN OLD ASSYRIAN WORD DIVIDER..CUNEIFORM PUNCTUATION SIGN DIAGONAL QUADCOLON
+ 12480..12543;N   # Lo   [196] CUNEIFORM SIGN AB TIMES NUN TENU..CUNEIFORM SIGN ZU5 TIMES THREE DISH TENU
+ 13000..1342E;N   # Lo  [1071] EGYPTIAN HIEROGLYPH A001..EGYPTIAN HIEROGLYPH AA032
+ 13430..13438;N   # Cf     [9] EGYPTIAN HIEROGLYPH VERTICAL JOINER..EGYPTIAN HIEROGLYPH END SEGMENT
+ 14400..14646;N   # Lo   [583] ANATOLIAN HIEROGLYPH A001..ANATOLIAN HIEROGLYPH A530
+ 16800..16A38;N   # Lo   [569] BAMUM LETTER PHASE-A NGKUE MFON..BAMUM LETTER PHASE-F VUEQ
+ 16A40..16A5E;N   # Lo    [31] MRO LETTER TA..MRO LETTER TEK
+ 16A60..16A69;N   # Nd    [10] MRO DIGIT ZERO..MRO DIGIT NINE
+ 16A6E..16A6F;N   # Po     [2] MRO DANDA..MRO DOUBLE DANDA
+ 16AD0..16AED;N   # Lo    [30] BASSA VAH LETTER ENNI..BASSA VAH LETTER I
+ 16AF0..16AF4;N   # Mn     [5] BASSA VAH COMBINING HIGH TONE..BASSA VAH COMBINING HIGH-LOW TONE
+ 16AF5;N          # Po         BASSA VAH FULL STOP
+ 16B00..16B2F;N   # Lo    [48] PAHAWH HMONG VOWEL KEEB..PAHAWH HMONG CONSONANT CAU
+ 16B30..16B36;N   # Mn     [7] PAHAWH HMONG MARK CIM TUB..PAHAWH HMONG MARK CIM TAUM
+ 16B37..16B3B;N   # Po     [5] PAHAWH HMONG SIGN VOS THOM..PAHAWH HMONG SIGN VOS FEEM
+ 16B3C..16B3F;N   # So     [4] PAHAWH HMONG SIGN XYEEM NTXIV..PAHAWH HMONG SIGN XYEEM FAIB
+ 16B40..16B43;N   # Lm     [4] PAHAWH HMONG SIGN VOS SEEV..PAHAWH HMONG SIGN IB YAM
+ 16B44;N          # Po         PAHAWH HMONG SIGN XAUS
+ 16B45;N          # So         PAHAWH HMONG SIGN CIM TSOV ROG
+ 16B50..16B59;N   # Nd    [10] PAHAWH HMONG DIGIT ZERO..PAHAWH HMONG DIGIT NINE
+ 16B5B..16B61;N   # No     [7] PAHAWH HMONG NUMBER TENS..PAHAWH HMONG NUMBER TRILLIONS
+ 16B63..16B77;N   # Lo    [21] PAHAWH HMONG SIGN VOS LUB..PAHAWH HMONG SIGN CIM NRES TOS
+ 16B7D..16B8F;N   # Lo    [19] PAHAWH HMONG CLAN SIGN TSHEEJ..PAHAWH HMONG CLAN SIGN VWJ
+ 16E40..16E7F;N   # L&    [64] MEDEFAIDRIN CAPITAL LETTER M..MEDEFAIDRIN SMALL LETTER Y
+ 16E80..16E96;N   # No    [23] MEDEFAIDRIN DIGIT ZERO..MEDEFAIDRIN DIGIT THREE ALTERNATE FORM
+ 16E97..16E9A;N   # Po     [4] MEDEFAIDRIN COMMA..MEDEFAIDRIN EXCLAMATION OH
+ 16F00..16F4A;N   # Lo    [75] MIAO LETTER PA..MIAO LETTER RTE
+ 16F4F;N          # Mn         MIAO SIGN CONSONANT MODIFIER BAR
+ 16F50;N          # Lo         MIAO LETTER NASALIZATION
+ 16F51..16F87;N   # Mc    [55] MIAO SIGN ASPIRATION..MIAO VOWEL SIGN UI
+ 16F8F..16F92;N   # Mn     [4] MIAO TONE RIGHT..MIAO TONE BELOW
+ 16F93..16F9F;N   # Lm    [13] MIAO LETTER TONE-2..MIAO LETTER REFORMED TONE-8
+ 16FE0..16FE1;W   # Lm     [2] TANGUT ITERATION MARK..NUSHU ITERATION MARK
+ 16FE2;W          # Po         OLD CHINESE HOOK MARK
+ 16FE3;W          # Lm         OLD CHINESE ITERATION MARK
+ 17000..187F7;W   # Lo  [6136] TANGUT IDEOGRAPH-17000..TANGUT IDEOGRAPH-187F7
+ 18800..18AF2;W   # Lo   [755] TANGUT COMPONENT-001..TANGUT COMPONENT-755
+ 1B000..1B0FF;W   # Lo   [256] KATAKANA LETTER ARCHAIC E..HENTAIGANA LETTER RE-2
+ 1B100..1B11E;W   # Lo    [31] HENTAIGANA LETTER RE-3..HENTAIGANA LETTER N-MU-MO-2
+ 1B150..1B152;W   # Lo     [3] HIRAGANA LETTER SMALL WI..HIRAGANA LETTER SMALL WO
+ 1B164..1B167;W   # Lo     [4] KATAKANA LETTER SMALL WI..KATAKANA LETTER SMALL N
+ 1B170..1B2FB;W   # Lo   [396] NUSHU CHARACTER-1B170..NUSHU CHARACTER-1B2FB
+ 1BC00..1BC6A;N   # Lo   [107] DUPLOYAN LETTER H..DUPLOYAN LETTER VOCALIC M
+ 1BC70..1BC7C;N   # Lo    [13] DUPLOYAN AFFIX LEFT HORIZONTAL SECANT..DUPLOYAN AFFIX ATTACHED TANGENT HOOK
+ 1BC80..1BC88;N   # Lo     [9] DUPLOYAN AFFIX HIGH ACUTE..DUPLOYAN AFFIX HIGH VERTICAL
+ 1BC90..1BC99;N   # Lo    [10] DUPLOYAN AFFIX LOW ACUTE..DUPLOYAN AFFIX LOW ARROW
+ 1BC9C;N          # So         DUPLOYAN SIGN O WITH CROSS
+ 1BC9D..1BC9E;N   # Mn     [2] DUPLOYAN THICK LETTER SELECTOR..DUPLOYAN DOUBLE MARK
+ 1BC9F;N          # Po         DUPLOYAN PUNCTUATION CHINOOK FULL STOP
+ 1BCA0..1BCA3;N   # Cf     [4] SHORTHAND FORMAT LETTER OVERLAP..SHORTHAND FORMAT UP STEP
+ 1D000..1D0F5;N   # So   [246] BYZANTINE MUSICAL SYMBOL PSILI..BYZANTINE MUSICAL SYMBOL GORGON NEO KATO
+ 1D100..1D126;N   # So    [39] MUSICAL SYMBOL SINGLE BARLINE..MUSICAL SYMBOL DRUM CLEF-2
+ 1D129..1D164;N   # So    [60] MUSICAL SYMBOL MULTIPLE MEASURE REST..MUSICAL SYMBOL ONE HUNDRED TWENTY-EIGHTH NOTE
+ 1D165..1D166;N   # Mc     [2] MUSICAL SYMBOL COMBINING STEM..MUSICAL SYMBOL COMBINING SPRECHGESANG STEM
+ 1D167..1D169;N   # Mn     [3] MUSICAL SYMBOL COMBINING TREMOLO-1..MUSICAL SYMBOL COMBINING TREMOLO-3
+ 1D16A..1D16C;N   # So     [3] MUSICAL SYMBOL FINGERED TREMOLO-1..MUSICAL SYMBOL FINGERED TREMOLO-3
+ 1D16D..1D172;N   # Mc     [6] MUSICAL SYMBOL COMBINING AUGMENTATION DOT..MUSICAL SYMBOL COMBINING FLAG-5
+ 1D173..1D17A;N   # Cf     [8] MUSICAL SYMBOL BEGIN BEAM..MUSICAL SYMBOL END PHRASE
+ 1D17B..1D182;N   # Mn     [8] MUSICAL SYMBOL COMBINING ACCENT..MUSICAL SYMBOL COMBINING LOURE
+ 1D183..1D184;N   # So     [2] MUSICAL SYMBOL ARPEGGIATO UP..MUSICAL SYMBOL ARPEGGIATO DOWN
+ 1D185..1D18B;N   # Mn     [7] MUSICAL SYMBOL COMBINING DOIT..MUSICAL SYMBOL COMBINING TRIPLE TONGUE
+ 1D18C..1D1A9;N   # So    [30] MUSICAL SYMBOL RINFORZANDO..MUSICAL SYMBOL DEGREE SLASH
+ 1D1AA..1D1AD;N   # Mn     [4] MUSICAL SYMBOL COMBINING DOWN BOW..MUSICAL SYMBOL COMBINING SNAP PIZZICATO
+ 1D1AE..1D1E8;N   # So    [59] MUSICAL SYMBOL PEDAL MARK..MUSICAL SYMBOL KIEVAN FLAT SIGN
+ 1D200..1D241;N   # So    [66] GREEK VOCAL NOTATION SYMBOL-1..GREEK INSTRUMENTAL NOTATION SYMBOL-54
+ 1D242..1D244;N   # Mn     [3] COMBINING GREEK MUSICAL TRISEME..COMBINING GREEK MUSICAL PENTASEME
+ 1D245;N          # So         GREEK MUSICAL LEIMMA
+ 1D2E0..1D2F3;N   # No    [20] MAYAN NUMERAL ZERO..MAYAN NUMERAL NINETEEN
+ 1D300..1D356;N   # So    [87] MONOGRAM FOR EARTH..TETRAGRAM FOR FOSTERING
+ 1D360..1D378;N   # No    [25] COUNTING ROD UNIT DIGIT ONE..TALLY MARK FIVE
+ 1D400..1D454;N   # L&    [85] MATHEMATICAL BOLD CAPITAL A..MATHEMATICAL ITALIC SMALL G
+ 1D456..1D49C;N   # L&    [71] MATHEMATICAL ITALIC SMALL I..MATHEMATICAL SCRIPT CAPITAL A
+ 1D49E..1D49F;N   # Lu     [2] MATHEMATICAL SCRIPT CAPITAL C..MATHEMATICAL SCRIPT CAPITAL D
+ 1D4A2;N          # Lu         MATHEMATICAL SCRIPT CAPITAL G
+ 1D4A5..1D4A6;N   # Lu     [2] MATHEMATICAL SCRIPT CAPITAL J..MATHEMATICAL SCRIPT CAPITAL K
+ 1D4A9..1D4AC;N   # Lu     [4] MATHEMATICAL SCRIPT CAPITAL N..MATHEMATICAL SCRIPT CAPITAL Q
+ 1D4AE..1D4B9;N   # L&    [12] MATHEMATICAL SCRIPT CAPITAL S..MATHEMATICAL SCRIPT SMALL D
+ 1D4BB;N          # Ll         MATHEMATICAL SCRIPT SMALL F
+ 1D4BD..1D4C3;N   # Ll     [7] MATHEMATICAL SCRIPT SMALL H..MATHEMATICAL SCRIPT SMALL N
+ 1D4C5..1D505;N   # L&    [65] MATHEMATICAL SCRIPT SMALL P..MATHEMATICAL FRAKTUR CAPITAL B
+ 1D507..1D50A;N   # Lu     [4] MATHEMATICAL FRAKTUR CAPITAL D..MATHEMATICAL FRAKTUR CAPITAL G
+ 1D50D..1D514;N   # Lu     [8] MATHEMATICAL FRAKTUR CAPITAL J..MATHEMATICAL FRAKTUR CAPITAL Q
+ 1D516..1D51C;N   # Lu     [7] MATHEMATICAL FRAKTUR CAPITAL S..MATHEMATICAL FRAKTUR CAPITAL Y
+ 1D51E..1D539;N   # L&    [28] MATHEMATICAL FRAKTUR SMALL A..MATHEMATICAL DOUBLE-STRUCK CAPITAL B
+ 1D53B..1D53E;N   # Lu     [4] MATHEMATICAL DOUBLE-STRUCK CAPITAL D..MATHEMATICAL DOUBLE-STRUCK CAPITAL G
+ 1D540..1D544;N   # Lu     [5] MATHEMATICAL DOUBLE-STRUCK CAPITAL I..MATHEMATICAL DOUBLE-STRUCK CAPITAL M
+ 1D546;N          # Lu         MATHEMATICAL DOUBLE-STRUCK CAPITAL O
+ 1D54A..1D550;N   # Lu     [7] MATHEMATICAL DOUBLE-STRUCK CAPITAL S..MATHEMATICAL DOUBLE-STRUCK CAPITAL Y
+ 1D552..1D6A5;N   # L&   [340] MATHEMATICAL DOUBLE-STRUCK SMALL A..MATHEMATICAL ITALIC SMALL DOTLESS J
+ 1D6A8..1D6C0;N   # Lu    [25] MATHEMATICAL BOLD CAPITAL ALPHA..MATHEMATICAL BOLD CAPITAL OMEGA
+ 1D6C1;N          # Sm         MATHEMATICAL BOLD NABLA
+ 1D6C2..1D6DA;N   # Ll    [25] MATHEMATICAL BOLD SMALL ALPHA..MATHEMATICAL BOLD SMALL OMEGA
+ 1D6DB;N          # Sm         MATHEMATICAL BOLD PARTIAL DIFFERENTIAL
+ 1D6DC..1D6FA;N   # L&    [31] MATHEMATICAL BOLD EPSILON SYMBOL..MATHEMATICAL ITALIC CAPITAL OMEGA
+ 1D6FB;N          # Sm         MATHEMATICAL ITALIC NABLA
+ 1D6FC..1D714;N   # Ll    [25] MATHEMATICAL ITALIC SMALL ALPHA..MATHEMATICAL ITALIC SMALL OMEGA
+ 1D715;N          # Sm         MATHEMATICAL ITALIC PARTIAL DIFFERENTIAL
+ 1D716..1D734;N   # L&    [31] MATHEMATICAL ITALIC EPSILON SYMBOL..MATHEMATICAL BOLD ITALIC CAPITAL OMEGA
+ 1D735;N          # Sm         MATHEMATICAL BOLD ITALIC NABLA
+ 1D736..1D74E;N   # Ll    [25] MATHEMATICAL BOLD ITALIC SMALL ALPHA..MATHEMATICAL BOLD ITALIC SMALL OMEGA
+ 1D74F;N          # Sm         MATHEMATICAL BOLD ITALIC PARTIAL DIFFERENTIAL
+ 1D750..1D76E;N   # L&    [31] MATHEMATICAL BOLD ITALIC EPSILON SYMBOL..MATHEMATICAL SANS-SERIF BOLD CAPITAL OMEGA
+ 1D76F;N          # Sm         MATHEMATICAL SANS-SERIF BOLD NABLA
+ 1D770..1D788;N   # Ll    [25] MATHEMATICAL SANS-SERIF BOLD SMALL ALPHA..MATHEMATICAL SANS-SERIF BOLD SMALL OMEGA
+ 1D789;N          # Sm         MATHEMATICAL SANS-SERIF BOLD PARTIAL DIFFERENTIAL
+ 1D78A..1D7A8;N   # L&    [31] MATHEMATICAL SANS-SERIF BOLD EPSILON SYMBOL..MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL OMEGA
+ 1D7A9;N          # Sm         MATHEMATICAL SANS-SERIF BOLD ITALIC NABLA
+ 1D7AA..1D7C2;N   # Ll    [25] MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL ALPHA..MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL OMEGA
+ 1D7C3;N          # Sm         MATHEMATICAL SANS-SERIF BOLD ITALIC PARTIAL DIFFERENTIAL
+ 1D7C4..1D7CB;N   # L&     [8] MATHEMATICAL SANS-SERIF BOLD ITALIC EPSILON SYMBOL..MATHEMATICAL BOLD SMALL DIGAMMA
+ 1D7CE..1D7FF;N   # Nd    [50] MATHEMATICAL BOLD DIGIT ZERO..MATHEMATICAL MONOSPACE DIGIT NINE
+ 1D800..1D9FF;N   # So   [512] SIGNWRITING HAND-FIST INDEX..SIGNWRITING HEAD
+ 1DA00..1DA36;N   # Mn    [55] SIGNWRITING HEAD RIM..SIGNWRITING AIR SUCKING IN
+ 1DA37..1DA3A;N   # So     [4] SIGNWRITING AIR BLOW SMALL ROTATIONS..SIGNWRITING BREATH EXHALE
+ 1DA3B..1DA6C;N   # Mn    [50] SIGNWRITING MOUTH CLOSED NEUTRAL..SIGNWRITING EXCITEMENT
+ 1DA6D..1DA74;N   # So     [8] SIGNWRITING SHOULDER HIP SPINE..SIGNWRITING TORSO-FLOORPLANE TWISTING
+ 1DA75;N          # Mn         SIGNWRITING UPPER BODY TILTING FROM HIP JOINTS
+ 1DA76..1DA83;N   # So    [14] SIGNWRITING LIMB COMBINATION..SIGNWRITING LOCATION DEPTH
+ 1DA84;N          # Mn         SIGNWRITING LOCATION HEAD NECK
+ 1DA85..1DA86;N   # So     [2] SIGNWRITING LOCATION TORSO..SIGNWRITING LOCATION LIMBS DIGITS
+ 1DA87..1DA8B;N   # Po     [5] SIGNWRITING COMMA..SIGNWRITING PARENTHESIS
+ 1DA9B..1DA9F;N   # Mn     [5] SIGNWRITING FILL MODIFIER-2..SIGNWRITING FILL MODIFIER-6
+ 1DAA1..1DAAF;N   # Mn    [15] SIGNWRITING ROTATION MODIFIER-2..SIGNWRITING ROTATION MODIFIER-16
+ 1E000..1E006;N   # Mn     [7] COMBINING GLAGOLITIC LETTER AZU..COMBINING GLAGOLITIC LETTER ZHIVETE
+ 1E008..1E018;N   # Mn    [17] COMBINING GLAGOLITIC LETTER ZEMLJA..COMBINING GLAGOLITIC LETTER HERU
+ 1E01B..1E021;N   # Mn     [7] COMBINING GLAGOLITIC LETTER SHTA..COMBINING GLAGOLITIC LETTER YATI
+ 1E023..1E024;N   # Mn     [2] COMBINING GLAGOLITIC LETTER YU..COMBINING GLAGOLITIC LETTER SMALL YUS
+ 1E026..1E02A;N   # Mn     [5] COMBINING GLAGOLITIC LETTER YO..COMBINING GLAGOLITIC LETTER FITA
+ 1E100..1E12C;N   # Lo    [45] NYIAKENG PUACHUE HMONG LETTER MA..NYIAKENG PUACHUE HMONG LETTER W
+ 1E130..1E136;N   # Mn     [7] NYIAKENG PUACHUE HMONG TONE-B..NYIAKENG PUACHUE HMONG TONE-D
+ 1E137..1E13D;N   # Lm     [7] NYIAKENG PUACHUE HMONG SIGN FOR PERSON..NYIAKENG PUACHUE HMONG SYLLABLE LENGTHENER
+ 1E140..1E149;N   # Nd    [10] NYIAKENG PUACHUE HMONG DIGIT ZERO..NYIAKENG PUACHUE HMONG DIGIT NINE
+ 1E14E;N          # Lo         NYIAKENG PUACHUE HMONG LOGOGRAM NYAJ
+ 1E14F;N          # So         NYIAKENG PUACHUE HMONG CIRCLED CA
+ 1E2C0..1E2EB;N   # Lo    [44] WANCHO LETTER AA..WANCHO LETTER YIH
+ 1E2EC..1E2EF;N   # Mn     [4] WANCHO TONE TUP..WANCHO TONE KOINI
+ 1E2F0..1E2F9;N   # Nd    [10] WANCHO DIGIT ZERO..WANCHO DIGIT NINE
+ 1E2FF;N          # Sc         WANCHO NGUN SIGN
+ 1E800..1E8C4;N   # Lo   [197] MENDE KIKAKUI SYLLABLE M001 KI..MENDE KIKAKUI SYLLABLE M060 NYON
+ 1E8C7..1E8CF;N   # No     [9] MENDE KIKAKUI DIGIT ONE..MENDE KIKAKUI DIGIT NINE
+ 1E8D0..1E8D6;N   # Mn     [7] MENDE KIKAKUI COMBINING NUMBER TEENS..MENDE KIKAKUI COMBINING NUMBER MILLIONS
+ 1E900..1E943;N   # L&    [68] ADLAM CAPITAL LETTER ALIF..ADLAM SMALL LETTER SHA
+ 1E944..1E94A;N   # Mn     [7] ADLAM ALIF LENGTHENER..ADLAM NUKTA
+ 1E94B;N          # Lm         ADLAM NASALIZATION MARK
+ 1E950..1E959;N   # Nd    [10] ADLAM DIGIT ZERO..ADLAM DIGIT NINE
+ 1E95E..1E95F;N   # Po     [2] ADLAM INITIAL EXCLAMATION MARK..ADLAM INITIAL QUESTION MARK
+ 1EC71..1ECAB;N   # No    [59] INDIC SIYAQ NUMBER ONE..INDIC SIYAQ NUMBER PREFIXED NINE
+ 1ECAC;N          # So         INDIC SIYAQ PLACEHOLDER
+ 1ECAD..1ECAF;N   # No     [3] INDIC SIYAQ FRACTION ONE QUARTER..INDIC SIYAQ FRACTION THREE QUARTERS
+ 1ECB0;N          # Sc         INDIC SIYAQ RUPEE MARK
+ 1ECB1..1ECB4;N   # No     [4] INDIC SIYAQ NUMBER ALTERNATE ONE..INDIC SIYAQ ALTERNATE LAKH MARK
+ 1ED01..1ED2D;N   # No    [45] OTTOMAN SIYAQ NUMBER ONE..OTTOMAN SIYAQ NUMBER NINETY THOUSAND
+ 1ED2E;N          # So         OTTOMAN SIYAQ MARRATAN
+ 1ED2F..1ED3D;N   # No    [15] OTTOMAN SIYAQ ALTERNATE NUMBER TWO..OTTOMAN SIYAQ FRACTION ONE SIXTH
+ 1EE00..1EE03;N   # Lo     [4] ARABIC MATHEMATICAL ALEF..ARABIC MATHEMATICAL DAL
+ 1EE05..1EE1F;N   # Lo    [27] ARABIC MATHEMATICAL WAW..ARABIC MATHEMATICAL DOTLESS QAF
+ 1EE21..1EE22;N   # Lo     [2] ARABIC MATHEMATICAL INITIAL BEH..ARABIC MATHEMATICAL INITIAL JEEM
+ 1EE24;N          # Lo         ARABIC MATHEMATICAL INITIAL HEH
+ 1EE27;N          # Lo         ARABIC MATHEMATICAL INITIAL HAH
+ 1EE29..1EE32;N   # Lo    [10] ARABIC MATHEMATICAL INITIAL YEH..ARABIC MATHEMATICAL INITIAL QAF
+ 1EE34..1EE37;N   # Lo     [4] ARABIC MATHEMATICAL INITIAL SHEEN..ARABIC MATHEMATICAL INITIAL KHAH
+ 1EE39;N          # Lo         ARABIC MATHEMATICAL INITIAL DAD
+ 1EE3B;N          # Lo         ARABIC MATHEMATICAL INITIAL GHAIN
+ 1EE42;N          # Lo         ARABIC MATHEMATICAL TAILED JEEM
+ 1EE47;N          # Lo         ARABIC MATHEMATICAL TAILED HAH
+ 1EE49;N          # Lo         ARABIC MATHEMATICAL TAILED YEH
+ 1EE4B;N          # Lo         ARABIC MATHEMATICAL TAILED LAM
+ 1EE4D..1EE4F;N   # Lo     [3] ARABIC MATHEMATICAL TAILED NOON..ARABIC MATHEMATICAL TAILED AIN
+ 1EE51..1EE52;N   # Lo     [2] ARABIC MATHEMATICAL TAILED SAD..ARABIC MATHEMATICAL TAILED QAF
+ 1EE54;N          # Lo         ARABIC MATHEMATICAL TAILED SHEEN
+ 1EE57;N          # Lo         ARABIC MATHEMATICAL TAILED KHAH
+ 1EE59;N          # Lo         ARABIC MATHEMATICAL TAILED DAD
+ 1EE5B;N          # Lo         ARABIC MATHEMATICAL TAILED GHAIN
+ 1EE5D;N          # Lo         ARABIC MATHEMATICAL TAILED DOTLESS NOON
+ 1EE5F;N          # Lo         ARABIC MATHEMATICAL TAILED DOTLESS QAF
+ 1EE61..1EE62;N   # Lo     [2] ARABIC MATHEMATICAL STRETCHED BEH..ARABIC MATHEMATICAL STRETCHED JEEM
+ 1EE64;N          # Lo         ARABIC MATHEMATICAL STRETCHED HEH
+ 1EE67..1EE6A;N   # Lo     [4] ARABIC MATHEMATICAL STRETCHED HAH..ARABIC MATHEMATICAL STRETCHED KAF
+ 1EE6C..1EE72;N   # Lo     [7] ARABIC MATHEMATICAL STRETCHED MEEM..ARABIC MATHEMATICAL STRETCHED QAF
+ 1EE74..1EE77;N   # Lo     [4] ARABIC MATHEMATICAL STRETCHED SHEEN..ARABIC MATHEMATICAL STRETCHED KHAH
+ 1EE79..1EE7C;N   # Lo     [4] ARABIC MATHEMATICAL STRETCHED DAD..ARABIC MATHEMATICAL STRETCHED DOTLESS BEH
+ 1EE7E;N          # Lo         ARABIC MATHEMATICAL STRETCHED DOTLESS FEH
+ 1EE80..1EE89;N   # Lo    [10] ARABIC MATHEMATICAL LOOPED ALEF..ARABIC MATHEMATICAL LOOPED YEH
+ 1EE8B..1EE9B;N   # Lo    [17] ARABIC MATHEMATICAL LOOPED LAM..ARABIC MATHEMATICAL LOOPED GHAIN
+ 1EEA1..1EEA3;N   # Lo     [3] ARABIC MATHEMATICAL DOUBLE-STRUCK BEH..ARABIC MATHEMATICAL DOUBLE-STRUCK DAL
+ 1EEA5..1EEA9;N   # Lo     [5] ARABIC MATHEMATICAL DOUBLE-STRUCK WAW..ARABIC MATHEMATICAL DOUBLE-STRUCK YEH
+ 1EEAB..1EEBB;N   # Lo    [17] ARABIC MATHEMATICAL DOUBLE-STRUCK LAM..ARABIC MATHEMATICAL DOUBLE-STRUCK GHAIN
+ 1EEF0..1EEF1;N   # Sm     [2] ARABIC MATHEMATICAL OPERATOR MEEM WITH HAH WITH TATWEEL..ARABIC MATHEMATICAL OPERATOR HAH WITH DAL
+ 1F000..1F003;N   # So     [4] MAHJONG TILE EAST WIND..MAHJONG TILE NORTH WIND
+ 1F004;W          # So         MAHJONG TILE RED DRAGON
+ 1F005..1F02B;N   # So    [39] MAHJONG TILE GREEN DRAGON..MAHJONG TILE BACK
+ 1F030..1F093;N   # So   [100] DOMINO TILE HORIZONTAL BACK..DOMINO TILE VERTICAL-06-06
+ 1F0A0..1F0AE;N   # So    [15] PLAYING CARD BACK..PLAYING CARD KING OF SPADES
+ 1F0B1..1F0BF;N   # So    [15] PLAYING CARD ACE OF HEARTS..PLAYING CARD RED JOKER
+ 1F0C1..1F0CE;N   # So    [14] PLAYING CARD ACE OF DIAMONDS..PLAYING CARD KING OF DIAMONDS
+ 1F0CF;W          # So         PLAYING CARD BLACK JOKER
+ 1F0D1..1F0F5;N   # So    [37] PLAYING CARD ACE OF CLUBS..PLAYING CARD TRUMP-21
+ 1F100..1F10A;A   # No    [11] DIGIT ZERO FULL STOP..DIGIT NINE COMMA
+ 1F10B..1F10C;N   # No     [2] DINGBAT CIRCLED SANS-SERIF DIGIT ZERO..DINGBAT NEGATIVE CIRCLED SANS-SERIF DIGIT ZERO
+ 1F110..1F12D;A   # So    [30] PARENTHESIZED LATIN CAPITAL LETTER A..CIRCLED CD
+ 1F12E..1F12F;N   # So     [2] CIRCLED WZ..COPYLEFT SYMBOL
+ 1F130..1F169;A   # So    [58] SQUARED LATIN CAPITAL LETTER A..NEGATIVE CIRCLED LATIN CAPITAL LETTER Z
+ 1F16A..1F16C;N   # So     [3] RAISED MC SIGN..RAISED MR SIGN
+ 1F170..1F18D;A   # So    [30] NEGATIVE SQUARED LATIN CAPITAL LETTER A..NEGATIVE SQUARED SA
+ 1F18E;W          # So         NEGATIVE SQUARED AB
+ 1F18F..1F190;A   # So     [2] NEGATIVE SQUARED WC..SQUARE DJ
+ 1F191..1F19A;W   # So    [10] SQUARED CL..SQUARED VS
+ 1F19B..1F1AC;A   # So    [18] SQUARED THREE D..SQUARED VOD
+ 1F1E6..1F1FF;N   # So    [26] REGIONAL INDICATOR SYMBOL LETTER A..REGIONAL INDICATOR SYMBOL LETTER Z
+ 1F200..1F202;W   # So     [3] SQUARE HIRAGANA HOKA..SQUARED KATAKANA SA
+ 1F210..1F23B;W   # So    [44] SQUARED CJK UNIFIED IDEOGRAPH-624B..SQUARED CJK UNIFIED IDEOGRAPH-914D
+ 1F240..1F248;W   # So     [9] TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-672C..TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-6557
+ 1F250..1F251;W   # So     [2] CIRCLED IDEOGRAPH ADVANTAGE..CIRCLED IDEOGRAPH ACCEPT
+ 1F260..1F265;W   # So     [6] ROUNDED SYMBOL FOR FU..ROUNDED SYMBOL FOR CAI
+ 1F300..1F320;W   # So    [33] CYCLONE..SHOOTING STAR
+ 1F321..1F32C;N   # So    [12] THERMOMETER..WIND BLOWING FACE
+ 1F32D..1F335;W   # So     [9] HOT DOG..CACTUS
+ 1F336;N          # So         HOT PEPPER
+ 1F337..1F37C;W   # So    [70] TULIP..BABY BOTTLE
+ 1F37D;N          # So         FORK AND KNIFE WITH PLATE
+ 1F37E..1F393;W   # So    [22] BOTTLE WITH POPPING CORK..GRADUATION CAP
+ 1F394..1F39F;N   # So    [12] HEART WITH TIP ON THE LEFT..ADMISSION TICKETS
+ 1F3A0..1F3CA;W   # So    [43] CAROUSEL HORSE..SWIMMER
+ 1F3CB..1F3CE;N   # So     [4] WEIGHT LIFTER..RACING CAR
+ 1F3CF..1F3D3;W   # So     [5] CRICKET BAT AND BALL..TABLE TENNIS PADDLE AND BALL
+ 1F3D4..1F3DF;N   # So    [12] SNOW CAPPED MOUNTAIN..STADIUM
+ 1F3E0..1F3F0;W   # So    [17] HOUSE BUILDING..EUROPEAN CASTLE
+ 1F3F1..1F3F3;N   # So     [3] WHITE PENNANT..WAVING WHITE FLAG
+ 1F3F4;W          # So         WAVING BLACK FLAG
+ 1F3F5..1F3F7;N   # So     [3] ROSETTE..LABEL
+ 1F3F8..1F3FA;W   # So     [3] BADMINTON RACQUET AND SHUTTLECOCK..AMPHORA
+ 1F3FB..1F3FF;W   # Sk     [5] EMOJI MODIFIER FITZPATRICK TYPE-1-2..EMOJI MODIFIER FITZPATRICK TYPE-6
+ 1F400..1F43E;W   # So    [63] RAT..PAW PRINTS
+ 1F43F;N          # So         CHIPMUNK
+ 1F440;W          # So         EYES
+ 1F441;N          # So         EYE
+ 1F442..1F4FC;W   # So   [187] EAR..VIDEOCASSETTE
+ 1F4FD..1F4FE;N   # So     [2] FILM PROJECTOR..PORTABLE STEREO
+ 1F4FF..1F53D;W   # So    [63] PRAYER BEADS..DOWN-POINTING SMALL RED TRIANGLE
+ 1F53E..1F54A;N   # So    [13] LOWER RIGHT SHADOWED WHITE CIRCLE..DOVE OF PEACE
+ 1F54B..1F54E;W   # So     [4] KAABA..MENORAH WITH NINE BRANCHES
+ 1F54F;N          # So         BOWL OF HYGIEIA
+ 1F550..1F567;W   # So    [24] CLOCK FACE ONE OCLOCK..CLOCK FACE TWELVE-THIRTY
+ 1F568..1F579;N   # So    [18] RIGHT SPEAKER..JOYSTICK
+ 1F57A;W          # So         MAN DANCING
+ 1F57B..1F594;N   # So    [26] LEFT HAND TELEPHONE RECEIVER..REVERSED VICTORY HAND
+ 1F595..1F596;W   # So     [2] REVERSED HAND WITH MIDDLE FINGER EXTENDED..RAISED HAND WITH PART BETWEEN MIDDLE AND RING FINGERS
+ 1F597..1F5A3;N   # So    [13] WHITE DOWN POINTING LEFT HAND INDEX..BLACK DOWN POINTING BACKHAND INDEX
+ 1F5A4;W          # So         BLACK HEART
+ 1F5A5..1F5FA;N   # So    [86] DESKTOP COMPUTER..WORLD MAP
+ 1F5FB..1F5FF;W   # So     [5] MOUNT FUJI..MOYAI
+ 1F600..1F64F;W   # So    [80] GRINNING FACE..PERSON WITH FOLDED HANDS
+ 1F650..1F67F;N   # So    [48] NORTH WEST POINTING LEAF..REVERSE CHECKER BOARD
+ 1F680..1F6C5;W   # So    [70] ROCKET..LEFT LUGGAGE
+ 1F6C6..1F6CB;N   # So     [6] TRIANGLE WITH ROUNDED CORNERS..COUCH AND LAMP
+ 1F6CC;W          # So         SLEEPING ACCOMMODATION
+ 1F6CD..1F6CF;N   # So     [3] SHOPPING BAGS..BED
+ 1F6D0..1F6D2;W   # So     [3] PLACE OF WORSHIP..SHOPPING TROLLEY
+ 1F6D3..1F6D4;N   # So     [2] STUPA..PAGODA
+ 1F6D5;W          # So         HINDU TEMPLE
+ 1F6E0..1F6EA;N   # So    [11] HAMMER AND WRENCH..NORTHEAST-POINTING AIRPLANE
+ 1F6EB..1F6EC;W   # So     [2] AIRPLANE DEPARTURE..AIRPLANE ARRIVING
+ 1F6F0..1F6F3;N   # So     [4] SATELLITE..PASSENGER SHIP
+ 1F6F4..1F6FA;W   # So     [7] SCOOTER..AUTO RICKSHAW
+ 1F700..1F773;N   # So   [116] ALCHEMICAL SYMBOL FOR QUINTESSENCE..ALCHEMICAL SYMBOL FOR HALF OUNCE
+ 1F780..1F7D8;N   # So    [89] BLACK LEFT-POINTING ISOSCELES RIGHT TRIANGLE..NEGATIVE CIRCLED SQUARE
+ 1F7E0..1F7EB;W   # So    [12] LARGE ORANGE CIRCLE..LARGE BROWN SQUARE
+ 1F800..1F80B;N   # So    [12] LEFTWARDS ARROW WITH SMALL TRIANGLE ARROWHEAD..DOWNWARDS ARROW WITH LARGE TRIANGLE ARROWHEAD
+ 1F810..1F847;N   # So    [56] LEFTWARDS ARROW WITH SMALL EQUILATERAL ARROWHEAD..DOWNWARDS HEAVY ARROW
+ 1F850..1F859;N   # So    [10] LEFTWARDS SANS-SERIF ARROW..UP DOWN SANS-SERIF ARROW
+ 1F860..1F887;N   # So    [40] WIDE-HEADED LEFTWARDS LIGHT BARB ARROW..WIDE-HEADED SOUTH WEST VERY HEAVY BARB ARROW
+ 1F890..1F8AD;N   # So    [30] LEFTWARDS TRIANGLE ARROWHEAD..WHITE ARROW SHAFT WIDTH TWO THIRDS
+ 1F900..1F90B;N   # So    [12] CIRCLED CROSS FORMEE WITH FOUR DOTS..DOWNWARD FACING NOTCHED HOOK WITH DOT
+ 1F90D..1F971;W   # So   [101] WHITE HEART..YAWNING FACE
+ 1F973..1F976;W   # So     [4] FACE WITH PARTY HORN AND PARTY HAT..FREEZING FACE
+ 1F97A..1F9A2;W   # So    [41] FACE WITH PLEADING EYES..SWAN
+ 1F9A5..1F9AA;W   # So     [6] SLOTH..OYSTER
+ 1F9AE..1F9CA;W   # So    [29] GUIDE DOG..ICE CUBE
+ 1F9CD..1F9FF;W   # So    [51] STANDING PERSON..NAZAR AMULET
+ 1FA00..1FA53;N   # So    [84] NEUTRAL CHESS KING..BLACK CHESS KNIGHT-BISHOP
+ 1FA60..1FA6D;N   # So    [14] XIANGQI RED GENERAL..XIANGQI BLACK SOLDIER
+ 1FA70..1FA73;W   # So     [4] BALLET SHOES..SHORTS
+ 1FA78..1FA7A;W   # So     [3] DROP OF BLOOD..STETHOSCOPE
+ 1FA80..1FA82;W   # So     [3] YO-YO..PARACHUTE
+ 1FA90..1FA95;W   # So     [6] RINGED PLANET..BANJO
+ 20000..2A6D6;W   # Lo [42711] CJK UNIFIED IDEOGRAPH-20000..CJK UNIFIED IDEOGRAPH-2A6D6
+ 2A6D7..2A6FF;W   # Cn    [41] <reserved-2A6D7>..<reserved-2A6FF>
+ 2A700..2B734;W   # Lo  [4149] CJK UNIFIED IDEOGRAPH-2A700..CJK UNIFIED IDEOGRAPH-2B734
+ 2B735..2B73F;W   # Cn    [11] <reserved-2B735>..<reserved-2B73F>
+ 2B740..2B81D;W   # Lo   [222] CJK UNIFIED IDEOGRAPH-2B740..CJK UNIFIED IDEOGRAPH-2B81D
+ 2B81E..2B81F;W   # Cn     [2] <reserved-2B81E>..<reserved-2B81F>
+ 2B820..2CEA1;W   # Lo  [5762] CJK UNIFIED IDEOGRAPH-2B820..CJK UNIFIED IDEOGRAPH-2CEA1
+ 2CEA2..2CEAF;W   # Cn    [14] <reserved-2CEA2>..<reserved-2CEAF>
+ 2CEB0..2EBE0;W   # Lo  [7473] CJK UNIFIED IDEOGRAPH-2CEB0..CJK UNIFIED IDEOGRAPH-2EBE0
+ 2EBE1..2F7FF;W   # Cn  [3103] <reserved-2EBE1>..<reserved-2F7FF>
+ 2F800..2FA1D;W   # Lo   [542] CJK COMPATIBILITY IDEOGRAPH-2F800..CJK COMPATIBILITY IDEOGRAPH-2FA1D
+ 2FA1E..2FA1F;W   # Cn     [2] <reserved-2FA1E>..<reserved-2FA1F>
+ 2FA20..2FFFD;W   # Cn  [1502] <reserved-2FA20>..<reserved-2FFFD>
+ 30000..3FFFD;W   # Cn [65534] <reserved-30000>..<reserved-3FFFD>
+ E0001;N          # Cf         LANGUAGE TAG
+ E0020..E007F;N   # Cf    [96] TAG SPACE..CANCEL TAG
+ E0100..E01EF;A   # Mn   [240] VARIATION SELECTOR-17..VARIATION SELECTOR-256
+ F0000..FFFFD;A   # Co [65534] <private-use-F0000>..<private-use-FFFFD>
+ 100000..10FFFD;A # Co [65534] <private-use-100000>..<private-use-10FFFD>
+ 
+ # EOF
diff -Nrcpad gcc-9.3.0/contrib/unicode/PropList.txt gcc-10.1.0/contrib/unicode/PropList.txt
*** gcc-9.3.0/contrib/unicode/PropList.txt	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/unicode/PropList.txt	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,1666 ----
+ # PropList-12.1.0.txt
+ # Date: 2019-03-10, 10:53:16 GMT
+ # © 2019 Unicode®, Inc.
+ # Unicode and the Unicode Logo are registered trademarks of Unicode, Inc. in the U.S. and other countries.
+ # For terms of use, see http://www.unicode.org/terms_of_use.html
+ #
+ # Unicode Character Database
+ #   For documentation, see http://www.unicode.org/reports/tr44/
+ 
+ # ================================================
+ 
+ 0009..000D    ; White_Space # Cc   [5] <control-0009>..<control-000D>
+ 0020          ; White_Space # Zs       SPACE
+ 0085          ; White_Space # Cc       <control-0085>
+ 00A0          ; White_Space # Zs       NO-BREAK SPACE
+ 1680          ; White_Space # Zs       OGHAM SPACE MARK
+ 2000..200A    ; White_Space # Zs  [11] EN QUAD..HAIR SPACE
+ 2028          ; White_Space # Zl       LINE SEPARATOR
+ 2029          ; White_Space # Zp       PARAGRAPH SEPARATOR
+ 202F          ; White_Space # Zs       NARROW NO-BREAK SPACE
+ 205F          ; White_Space # Zs       MEDIUM MATHEMATICAL SPACE
+ 3000          ; White_Space # Zs       IDEOGRAPHIC SPACE
+ 
+ # Total code points: 25
+ 
+ # ================================================
+ 
+ 061C          ; Bidi_Control # Cf       ARABIC LETTER MARK
+ 200E..200F    ; Bidi_Control # Cf   [2] LEFT-TO-RIGHT MARK..RIGHT-TO-LEFT MARK
+ 202A..202E    ; Bidi_Control # Cf   [5] LEFT-TO-RIGHT EMBEDDING..RIGHT-TO-LEFT OVERRIDE
+ 2066..2069    ; Bidi_Control # Cf   [4] LEFT-TO-RIGHT ISOLATE..POP DIRECTIONAL ISOLATE
+ 
+ # Total code points: 12
+ 
+ # ================================================
+ 
+ 200C..200D    ; Join_Control # Cf   [2] ZERO WIDTH NON-JOINER..ZERO WIDTH JOINER
+ 
+ # Total code points: 2
+ 
+ # ================================================
+ 
+ 002D          ; Dash # Pd       HYPHEN-MINUS
+ 058A          ; Dash # Pd       ARMENIAN HYPHEN
+ 05BE          ; Dash # Pd       HEBREW PUNCTUATION MAQAF
+ 1400          ; Dash # Pd       CANADIAN SYLLABICS HYPHEN
+ 1806          ; Dash # Pd       MONGOLIAN TODO SOFT HYPHEN
+ 2010..2015    ; Dash # Pd   [6] HYPHEN..HORIZONTAL BAR
+ 2053          ; Dash # Po       SWUNG DASH
+ 207B          ; Dash # Sm       SUPERSCRIPT MINUS
+ 208B          ; Dash # Sm       SUBSCRIPT MINUS
+ 2212          ; Dash # Sm       MINUS SIGN
+ 2E17          ; Dash # Pd       DOUBLE OBLIQUE HYPHEN
+ 2E1A          ; Dash # Pd       HYPHEN WITH DIAERESIS
+ 2E3A..2E3B    ; Dash # Pd   [2] TWO-EM DASH..THREE-EM DASH
+ 2E40          ; Dash # Pd       DOUBLE HYPHEN
+ 301C          ; Dash # Pd       WAVE DASH
+ 3030          ; Dash # Pd       WAVY DASH
+ 30A0          ; Dash # Pd       KATAKANA-HIRAGANA DOUBLE HYPHEN
+ FE31..FE32    ; Dash # Pd   [2] PRESENTATION FORM FOR VERTICAL EM DASH..PRESENTATION FORM FOR VERTICAL EN DASH
+ FE58          ; Dash # Pd       SMALL EM DASH
+ FE63          ; Dash # Pd       SMALL HYPHEN-MINUS
+ FF0D          ; Dash # Pd       FULLWIDTH HYPHEN-MINUS
+ 
+ # Total code points: 28
+ 
+ # ================================================
+ 
+ 002D          ; Hyphen # Pd       HYPHEN-MINUS
+ 00AD          ; Hyphen # Cf       SOFT HYPHEN
+ 058A          ; Hyphen # Pd       ARMENIAN HYPHEN
+ 1806          ; Hyphen # Pd       MONGOLIAN TODO SOFT HYPHEN
+ 2010..2011    ; Hyphen # Pd   [2] HYPHEN..NON-BREAKING HYPHEN
+ 2E17          ; Hyphen # Pd       DOUBLE OBLIQUE HYPHEN
+ 30FB          ; Hyphen # Po       KATAKANA MIDDLE DOT
+ FE63          ; Hyphen # Pd       SMALL HYPHEN-MINUS
+ FF0D          ; Hyphen # Pd       FULLWIDTH HYPHEN-MINUS
+ FF65          ; Hyphen # Po       HALFWIDTH KATAKANA MIDDLE DOT
+ 
+ # Total code points: 11
+ 
+ # ================================================
+ 
+ 0022          ; Quotation_Mark # Po       QUOTATION MARK
+ 0027          ; Quotation_Mark # Po       APOSTROPHE
+ 00AB          ; Quotation_Mark # Pi       LEFT-POINTING DOUBLE ANGLE QUOTATION MARK
+ 00BB          ; Quotation_Mark # Pf       RIGHT-POINTING DOUBLE ANGLE QUOTATION MARK
+ 2018          ; Quotation_Mark # Pi       LEFT SINGLE QUOTATION MARK
+ 2019          ; Quotation_Mark # Pf       RIGHT SINGLE QUOTATION MARK
+ 201A          ; Quotation_Mark # Ps       SINGLE LOW-9 QUOTATION MARK
+ 201B..201C    ; Quotation_Mark # Pi   [2] SINGLE HIGH-REVERSED-9 QUOTATION MARK..LEFT DOUBLE QUOTATION MARK
+ 201D          ; Quotation_Mark # Pf       RIGHT DOUBLE QUOTATION MARK
+ 201E          ; Quotation_Mark # Ps       DOUBLE LOW-9 QUOTATION MARK
+ 201F          ; Quotation_Mark # Pi       DOUBLE HIGH-REVERSED-9 QUOTATION MARK
+ 2039          ; Quotation_Mark # Pi       SINGLE LEFT-POINTING ANGLE QUOTATION MARK
+ 203A          ; Quotation_Mark # Pf       SINGLE RIGHT-POINTING ANGLE QUOTATION MARK
+ 2E42          ; Quotation_Mark # Ps       DOUBLE LOW-REVERSED-9 QUOTATION MARK
+ 300C          ; Quotation_Mark # Ps       LEFT CORNER BRACKET
+ 300D          ; Quotation_Mark # Pe       RIGHT CORNER BRACKET
+ 300E          ; Quotation_Mark # Ps       LEFT WHITE CORNER BRACKET
+ 300F          ; Quotation_Mark # Pe       RIGHT WHITE CORNER BRACKET
+ 301D          ; Quotation_Mark # Ps       REVERSED DOUBLE PRIME QUOTATION MARK
+ 301E..301F    ; Quotation_Mark # Pe   [2] DOUBLE PRIME QUOTATION MARK..LOW DOUBLE PRIME QUOTATION MARK
+ FE41          ; Quotation_Mark # Ps       PRESENTATION FORM FOR VERTICAL LEFT CORNER BRACKET
+ FE42          ; Quotation_Mark # Pe       PRESENTATION FORM FOR VERTICAL RIGHT CORNER BRACKET
+ FE43          ; Quotation_Mark # Ps       PRESENTATION FORM FOR VERTICAL LEFT WHITE CORNER BRACKET
+ FE44          ; Quotation_Mark # Pe       PRESENTATION FORM FOR VERTICAL RIGHT WHITE CORNER BRACKET
+ FF02          ; Quotation_Mark # Po       FULLWIDTH QUOTATION MARK
+ FF07          ; Quotation_Mark # Po       FULLWIDTH APOSTROPHE
+ FF62          ; Quotation_Mark # Ps       HALFWIDTH LEFT CORNER BRACKET
+ FF63          ; Quotation_Mark # Pe       HALFWIDTH RIGHT CORNER BRACKET
+ 
+ # Total code points: 30
+ 
+ # ================================================
+ 
+ 0021          ; Terminal_Punctuation # Po       EXCLAMATION MARK
+ 002C          ; Terminal_Punctuation # Po       COMMA
+ 002E          ; Terminal_Punctuation # Po       FULL STOP
+ 003A..003B    ; Terminal_Punctuation # Po   [2] COLON..SEMICOLON
+ 003F          ; Terminal_Punctuation # Po       QUESTION MARK
+ 037E          ; Terminal_Punctuation # Po       GREEK QUESTION MARK
+ 0387          ; Terminal_Punctuation # Po       GREEK ANO TELEIA
+ 0589          ; Terminal_Punctuation # Po       ARMENIAN FULL STOP
+ 05C3          ; Terminal_Punctuation # Po       HEBREW PUNCTUATION SOF PASUQ
+ 060C          ; Terminal_Punctuation # Po       ARABIC COMMA
+ 061B          ; Terminal_Punctuation # Po       ARABIC SEMICOLON
+ 061E..061F    ; Terminal_Punctuation # Po   [2] ARABIC TRIPLE DOT PUNCTUATION MARK..ARABIC QUESTION MARK
+ 06D4          ; Terminal_Punctuation # Po       ARABIC FULL STOP
+ 0700..070A    ; Terminal_Punctuation # Po  [11] SYRIAC END OF PARAGRAPH..SYRIAC CONTRACTION
+ 070C          ; Terminal_Punctuation # Po       SYRIAC HARKLEAN METOBELUS
+ 07F8..07F9    ; Terminal_Punctuation # Po   [2] NKO COMMA..NKO EXCLAMATION MARK
+ 0830..083E    ; Terminal_Punctuation # Po  [15] SAMARITAN PUNCTUATION NEQUDAA..SAMARITAN PUNCTUATION ANNAAU
+ 085E          ; Terminal_Punctuation # Po       MANDAIC PUNCTUATION
+ 0964..0965    ; Terminal_Punctuation # Po   [2] DEVANAGARI DANDA..DEVANAGARI DOUBLE DANDA
+ 0E5A..0E5B    ; Terminal_Punctuation # Po   [2] THAI CHARACTER ANGKHANKHU..THAI CHARACTER KHOMUT
+ 0F08          ; Terminal_Punctuation # Po       TIBETAN MARK SBRUL SHAD
+ 0F0D..0F12    ; Terminal_Punctuation # Po   [6] TIBETAN MARK SHAD..TIBETAN MARK RGYA GRAM SHAD
+ 104A..104B    ; Terminal_Punctuation # Po   [2] MYANMAR SIGN LITTLE SECTION..MYANMAR SIGN SECTION
+ 1361..1368    ; Terminal_Punctuation # Po   [8] ETHIOPIC WORDSPACE..ETHIOPIC PARAGRAPH SEPARATOR
+ 166E          ; Terminal_Punctuation # Po       CANADIAN SYLLABICS FULL STOP
+ 16EB..16ED    ; Terminal_Punctuation # Po   [3] RUNIC SINGLE PUNCTUATION..RUNIC CROSS PUNCTUATION
+ 1735..1736    ; Terminal_Punctuation # Po   [2] PHILIPPINE SINGLE PUNCTUATION..PHILIPPINE DOUBLE PUNCTUATION
+ 17D4..17D6    ; Terminal_Punctuation # Po   [3] KHMER SIGN KHAN..KHMER SIGN CAMNUC PII KUUH
+ 17DA          ; Terminal_Punctuation # Po       KHMER SIGN KOOMUUT
+ 1802..1805    ; Terminal_Punctuation # Po   [4] MONGOLIAN COMMA..MONGOLIAN FOUR DOTS
+ 1808..1809    ; Terminal_Punctuation # Po   [2] MONGOLIAN MANCHU COMMA..MONGOLIAN MANCHU FULL STOP
+ 1944..1945    ; Terminal_Punctuation # Po   [2] LIMBU EXCLAMATION MARK..LIMBU QUESTION MARK
+ 1AA8..1AAB    ; Terminal_Punctuation # Po   [4] TAI THAM SIGN KAAN..TAI THAM SIGN SATKAANKUU
+ 1B5A..1B5B    ; Terminal_Punctuation # Po   [2] BALINESE PANTI..BALINESE PAMADA
+ 1B5D..1B5F    ; Terminal_Punctuation # Po   [3] BALINESE CARIK PAMUNGKAH..BALINESE CARIK PAREREN
+ 1C3B..1C3F    ; Terminal_Punctuation # Po   [5] LEPCHA PUNCTUATION TA-ROL..LEPCHA PUNCTUATION TSHOOK
+ 1C7E..1C7F    ; Terminal_Punctuation # Po   [2] OL CHIKI PUNCTUATION MUCAAD..OL CHIKI PUNCTUATION DOUBLE MUCAAD
+ 203C..203D    ; Terminal_Punctuation # Po   [2] DOUBLE EXCLAMATION MARK..INTERROBANG
+ 2047..2049    ; Terminal_Punctuation # Po   [3] DOUBLE QUESTION MARK..EXCLAMATION QUESTION MARK
+ 2E2E          ; Terminal_Punctuation # Po       REVERSED QUESTION MARK
+ 2E3C          ; Terminal_Punctuation # Po       STENOGRAPHIC FULL STOP
+ 2E41          ; Terminal_Punctuation # Po       REVERSED COMMA
+ 2E4C          ; Terminal_Punctuation # Po       MEDIEVAL COMMA
+ 2E4E..2E4F    ; Terminal_Punctuation # Po   [2] PUNCTUS ELEVATUS MARK..CORNISH VERSE DIVIDER
+ 3001..3002    ; Terminal_Punctuation # Po   [2] IDEOGRAPHIC COMMA..IDEOGRAPHIC FULL STOP
+ A4FE..A4FF    ; Terminal_Punctuation # Po   [2] LISU PUNCTUATION COMMA..LISU PUNCTUATION FULL STOP
+ A60D..A60F    ; Terminal_Punctuation # Po   [3] VAI COMMA..VAI QUESTION MARK
+ A6F3..A6F7    ; Terminal_Punctuation # Po   [5] BAMUM FULL STOP..BAMUM QUESTION MARK
+ A876..A877    ; Terminal_Punctuation # Po   [2] PHAGS-PA MARK SHAD..PHAGS-PA MARK DOUBLE SHAD
+ A8CE..A8CF    ; Terminal_Punctuation # Po   [2] SAURASHTRA DANDA..SAURASHTRA DOUBLE DANDA
+ A92F          ; Terminal_Punctuation # Po       KAYAH LI SIGN SHYA
+ A9C7..A9C9    ; Terminal_Punctuation # Po   [3] JAVANESE PADA PANGKAT..JAVANESE PADA LUNGSI
+ AA5D..AA5F    ; Terminal_Punctuation # Po   [3] CHAM PUNCTUATION DANDA..CHAM PUNCTUATION TRIPLE DANDA
+ AADF          ; Terminal_Punctuation # Po       TAI VIET SYMBOL KOI KOI
+ AAF0..AAF1    ; Terminal_Punctuation # Po   [2] MEETEI MAYEK CHEIKHAN..MEETEI MAYEK AHANG KHUDAM
+ ABEB          ; Terminal_Punctuation # Po       MEETEI MAYEK CHEIKHEI
+ FE50..FE52    ; Terminal_Punctuation # Po   [3] SMALL COMMA..SMALL FULL STOP
+ FE54..FE57    ; Terminal_Punctuation # Po   [4] SMALL SEMICOLON..SMALL EXCLAMATION MARK
+ FF01          ; Terminal_Punctuation # Po       FULLWIDTH EXCLAMATION MARK
+ FF0C          ; Terminal_Punctuation # Po       FULLWIDTH COMMA
+ FF0E          ; Terminal_Punctuation # Po       FULLWIDTH FULL STOP
+ FF1A..FF1B    ; Terminal_Punctuation # Po   [2] FULLWIDTH COLON..FULLWIDTH SEMICOLON
+ FF1F          ; Terminal_Punctuation # Po       FULLWIDTH QUESTION MARK
+ FF61          ; Terminal_Punctuation # Po       HALFWIDTH IDEOGRAPHIC FULL STOP
+ FF64          ; Terminal_Punctuation # Po       HALFWIDTH IDEOGRAPHIC COMMA
+ 1039F         ; Terminal_Punctuation # Po       UGARITIC WORD DIVIDER
+ 103D0         ; Terminal_Punctuation # Po       OLD PERSIAN WORD DIVIDER
+ 10857         ; Terminal_Punctuation # Po       IMPERIAL ARAMAIC SECTION SIGN
+ 1091F         ; Terminal_Punctuation # Po       PHOENICIAN WORD SEPARATOR
+ 10A56..10A57  ; Terminal_Punctuation # Po   [2] KHAROSHTHI PUNCTUATION DANDA..KHAROSHTHI PUNCTUATION DOUBLE DANDA
+ 10AF0..10AF5  ; Terminal_Punctuation # Po   [6] MANICHAEAN PUNCTUATION STAR..MANICHAEAN PUNCTUATION TWO DOTS
+ 10B3A..10B3F  ; Terminal_Punctuation # Po   [6] TINY TWO DOTS OVER ONE DOT PUNCTUATION..LARGE ONE RING OVER TWO RINGS PUNCTUATION
+ 10B99..10B9C  ; Terminal_Punctuation # Po   [4] PSALTER PAHLAVI SECTION MARK..PSALTER PAHLAVI FOUR DOTS WITH DOT
+ 10F55..10F59  ; Terminal_Punctuation # Po   [5] SOGDIAN PUNCTUATION TWO VERTICAL BARS..SOGDIAN PUNCTUATION HALF CIRCLE WITH DOT
+ 11047..1104D  ; Terminal_Punctuation # Po   [7] BRAHMI DANDA..BRAHMI PUNCTUATION LOTUS
+ 110BE..110C1  ; Terminal_Punctuation # Po   [4] KAITHI SECTION MARK..KAITHI DOUBLE DANDA
+ 11141..11143  ; Terminal_Punctuation # Po   [3] CHAKMA DANDA..CHAKMA QUESTION MARK
+ 111C5..111C6  ; Terminal_Punctuation # Po   [2] SHARADA DANDA..SHARADA DOUBLE DANDA
+ 111CD         ; Terminal_Punctuation # Po       SHARADA SUTRA MARK
+ 111DE..111DF  ; Terminal_Punctuation # Po   [2] SHARADA SECTION MARK-1..SHARADA SECTION MARK-2
+ 11238..1123C  ; Terminal_Punctuation # Po   [5] KHOJKI DANDA..KHOJKI DOUBLE SECTION MARK
+ 112A9         ; Terminal_Punctuation # Po       MULTANI SECTION MARK
+ 1144B..1144D  ; Terminal_Punctuation # Po   [3] NEWA DANDA..NEWA COMMA
+ 1145B         ; Terminal_Punctuation # Po       NEWA PLACEHOLDER MARK
+ 115C2..115C5  ; Terminal_Punctuation # Po   [4] SIDDHAM DANDA..SIDDHAM SEPARATOR BAR
+ 115C9..115D7  ; Terminal_Punctuation # Po  [15] SIDDHAM END OF TEXT MARK..SIDDHAM SECTION MARK WITH CIRCLES AND FOUR ENCLOSURES
+ 11641..11642  ; Terminal_Punctuation # Po   [2] MODI DANDA..MODI DOUBLE DANDA
+ 1173C..1173E  ; Terminal_Punctuation # Po   [3] AHOM SIGN SMALL SECTION..AHOM SIGN RULAI
+ 11A42..11A43  ; Terminal_Punctuation # Po   [2] ZANABAZAR SQUARE MARK SHAD..ZANABAZAR SQUARE MARK DOUBLE SHAD
+ 11A9B..11A9C  ; Terminal_Punctuation # Po   [2] SOYOMBO MARK SHAD..SOYOMBO MARK DOUBLE SHAD
+ 11AA1..11AA2  ; Terminal_Punctuation # Po   [2] SOYOMBO TERMINAL MARK-1..SOYOMBO TERMINAL MARK-2
+ 11C41..11C43  ; Terminal_Punctuation # Po   [3] BHAIKSUKI DANDA..BHAIKSUKI WORD SEPARATOR
+ 11C71         ; Terminal_Punctuation # Po       MARCHEN MARK SHAD
+ 11EF7..11EF8  ; Terminal_Punctuation # Po   [2] MAKASAR PASSIMBANG..MAKASAR END OF SECTION
+ 12470..12474  ; Terminal_Punctuation # Po   [5] CUNEIFORM PUNCTUATION SIGN OLD ASSYRIAN WORD DIVIDER..CUNEIFORM PUNCTUATION SIGN DIAGONAL QUADCOLON
+ 16A6E..16A6F  ; Terminal_Punctuation # Po   [2] MRO DANDA..MRO DOUBLE DANDA
+ 16AF5         ; Terminal_Punctuation # Po       BASSA VAH FULL STOP
+ 16B37..16B39  ; Terminal_Punctuation # Po   [3] PAHAWH HMONG SIGN VOS THOM..PAHAWH HMONG SIGN CIM CHEEM
+ 16B44         ; Terminal_Punctuation # Po       PAHAWH HMONG SIGN XAUS
+ 16E97..16E98  ; Terminal_Punctuation # Po   [2] MEDEFAIDRIN COMMA..MEDEFAIDRIN FULL STOP
+ 1BC9F         ; Terminal_Punctuation # Po       DUPLOYAN PUNCTUATION CHINOOK FULL STOP
+ 1DA87..1DA8A  ; Terminal_Punctuation # Po   [4] SIGNWRITING COMMA..SIGNWRITING COLON
+ 
+ # Total code points: 264
+ 
+ # ================================================
+ 
+ 005E          ; Other_Math # Sk       CIRCUMFLEX ACCENT
+ 03D0..03D2    ; Other_Math # L&   [3] GREEK BETA SYMBOL..GREEK UPSILON WITH HOOK SYMBOL
+ 03D5          ; Other_Math # L&       GREEK PHI SYMBOL
+ 03F0..03F1    ; Other_Math # L&   [2] GREEK KAPPA SYMBOL..GREEK RHO SYMBOL
+ 03F4..03F5    ; Other_Math # L&   [2] GREEK CAPITAL THETA SYMBOL..GREEK LUNATE EPSILON SYMBOL
+ 2016          ; Other_Math # Po       DOUBLE VERTICAL LINE
+ 2032..2034    ; Other_Math # Po   [3] PRIME..TRIPLE PRIME
+ 2040          ; Other_Math # Pc       CHARACTER TIE
+ 2061..2064    ; Other_Math # Cf   [4] FUNCTION APPLICATION..INVISIBLE PLUS
+ 207D          ; Other_Math # Ps       SUPERSCRIPT LEFT PARENTHESIS
+ 207E          ; Other_Math # Pe       SUPERSCRIPT RIGHT PARENTHESIS
+ 208D          ; Other_Math # Ps       SUBSCRIPT LEFT PARENTHESIS
+ 208E          ; Other_Math # Pe       SUBSCRIPT RIGHT PARENTHESIS
+ 20D0..20DC    ; Other_Math # Mn  [13] COMBINING LEFT HARPOON ABOVE..COMBINING FOUR DOTS ABOVE
+ 20E1          ; Other_Math # Mn       COMBINING LEFT RIGHT ARROW ABOVE
+ 20E5..20E6    ; Other_Math # Mn   [2] COMBINING REVERSE SOLIDUS OVERLAY..COMBINING DOUBLE VERTICAL STROKE OVERLAY
+ 20EB..20EF    ; Other_Math # Mn   [5] COMBINING LONG DOUBLE SOLIDUS OVERLAY..COMBINING RIGHT ARROW BELOW
+ 2102          ; Other_Math # L&       DOUBLE-STRUCK CAPITAL C
+ 2107          ; Other_Math # L&       EULER CONSTANT
+ 210A..2113    ; Other_Math # L&  [10] SCRIPT SMALL G..SCRIPT SMALL L
+ 2115          ; Other_Math # L&       DOUBLE-STRUCK CAPITAL N
+ 2119..211D    ; Other_Math # L&   [5] DOUBLE-STRUCK CAPITAL P..DOUBLE-STRUCK CAPITAL R
+ 2124          ; Other_Math # L&       DOUBLE-STRUCK CAPITAL Z
+ 2128          ; Other_Math # L&       BLACK-LETTER CAPITAL Z
+ 2129          ; Other_Math # So       TURNED GREEK SMALL LETTER IOTA
+ 212C..212D    ; Other_Math # L&   [2] SCRIPT CAPITAL B..BLACK-LETTER CAPITAL C
+ 212F..2131    ; Other_Math # L&   [3] SCRIPT SMALL E..SCRIPT CAPITAL F
+ 2133..2134    ; Other_Math # L&   [2] SCRIPT CAPITAL M..SCRIPT SMALL O
+ 2135..2138    ; Other_Math # Lo   [4] ALEF SYMBOL..DALET SYMBOL
+ 213C..213F    ; Other_Math # L&   [4] DOUBLE-STRUCK SMALL PI..DOUBLE-STRUCK CAPITAL PI
+ 2145..2149    ; Other_Math # L&   [5] DOUBLE-STRUCK ITALIC CAPITAL D..DOUBLE-STRUCK ITALIC SMALL J
+ 2195..2199    ; Other_Math # So   [5] UP DOWN ARROW..SOUTH WEST ARROW
+ 219C..219F    ; Other_Math # So   [4] LEFTWARDS WAVE ARROW..UPWARDS TWO HEADED ARROW
+ 21A1..21A2    ; Other_Math # So   [2] DOWNWARDS TWO HEADED ARROW..LEFTWARDS ARROW WITH TAIL
+ 21A4..21A5    ; Other_Math # So   [2] LEFTWARDS ARROW FROM BAR..UPWARDS ARROW FROM BAR
+ 21A7          ; Other_Math # So       DOWNWARDS ARROW FROM BAR
+ 21A9..21AD    ; Other_Math # So   [5] LEFTWARDS ARROW WITH HOOK..LEFT RIGHT WAVE ARROW
+ 21B0..21B1    ; Other_Math # So   [2] UPWARDS ARROW WITH TIP LEFTWARDS..UPWARDS ARROW WITH TIP RIGHTWARDS
+ 21B6..21B7    ; Other_Math # So   [2] ANTICLOCKWISE TOP SEMICIRCLE ARROW..CLOCKWISE TOP SEMICIRCLE ARROW
+ 21BC..21CD    ; Other_Math # So  [18] LEFTWARDS HARPOON WITH BARB UPWARDS..LEFTWARDS DOUBLE ARROW WITH STROKE
+ 21D0..21D1    ; Other_Math # So   [2] LEFTWARDS DOUBLE ARROW..UPWARDS DOUBLE ARROW
+ 21D3          ; Other_Math # So       DOWNWARDS DOUBLE ARROW
+ 21D5..21DB    ; Other_Math # So   [7] UP DOWN DOUBLE ARROW..RIGHTWARDS TRIPLE ARROW
+ 21DD          ; Other_Math # So       RIGHTWARDS SQUIGGLE ARROW
+ 21E4..21E5    ; Other_Math # So   [2] LEFTWARDS ARROW TO BAR..RIGHTWARDS ARROW TO BAR
+ 2308          ; Other_Math # Ps       LEFT CEILING
+ 2309          ; Other_Math # Pe       RIGHT CEILING
+ 230A          ; Other_Math # Ps       LEFT FLOOR
+ 230B          ; Other_Math # Pe       RIGHT FLOOR
+ 23B4..23B5    ; Other_Math # So   [2] TOP SQUARE BRACKET..BOTTOM SQUARE BRACKET
+ 23B7          ; Other_Math # So       RADICAL SYMBOL BOTTOM
+ 23D0          ; Other_Math # So       VERTICAL LINE EXTENSION
+ 23E2          ; Other_Math # So       WHITE TRAPEZIUM
+ 25A0..25A1    ; Other_Math # So   [2] BLACK SQUARE..WHITE SQUARE
+ 25AE..25B6    ; Other_Math # So   [9] BLACK VERTICAL RECTANGLE..BLACK RIGHT-POINTING TRIANGLE
+ 25BC..25C0    ; Other_Math # So   [5] BLACK DOWN-POINTING TRIANGLE..BLACK LEFT-POINTING TRIANGLE
+ 25C6..25C7    ; Other_Math # So   [2] BLACK DIAMOND..WHITE DIAMOND
+ 25CA..25CB    ; Other_Math # So   [2] LOZENGE..WHITE CIRCLE
+ 25CF..25D3    ; Other_Math # So   [5] BLACK CIRCLE..CIRCLE WITH UPPER HALF BLACK
+ 25E2          ; Other_Math # So       BLACK LOWER RIGHT TRIANGLE
+ 25E4          ; Other_Math # So       BLACK UPPER LEFT TRIANGLE
+ 25E7..25EC    ; Other_Math # So   [6] SQUARE WITH LEFT HALF BLACK..WHITE UP-POINTING TRIANGLE WITH DOT
+ 2605..2606    ; Other_Math # So   [2] BLACK STAR..WHITE STAR
+ 2640          ; Other_Math # So       FEMALE SIGN
+ 2642          ; Other_Math # So       MALE SIGN
+ 2660..2663    ; Other_Math # So   [4] BLACK SPADE SUIT..BLACK CLUB SUIT
+ 266D..266E    ; Other_Math # So   [2] MUSIC FLAT SIGN..MUSIC NATURAL SIGN
+ 27C5          ; Other_Math # Ps       LEFT S-SHAPED BAG DELIMITER
+ 27C6          ; Other_Math # Pe       RIGHT S-SHAPED BAG DELIMITER
+ 27E6          ; Other_Math # Ps       MATHEMATICAL LEFT WHITE SQUARE BRACKET
+ 27E7          ; Other_Math # Pe       MATHEMATICAL RIGHT WHITE SQUARE BRACKET
+ 27E8          ; Other_Math # Ps       MATHEMATICAL LEFT ANGLE BRACKET
+ 27E9          ; Other_Math # Pe       MATHEMATICAL RIGHT ANGLE BRACKET
+ 27EA          ; Other_Math # Ps       MATHEMATICAL LEFT DOUBLE ANGLE BRACKET
+ 27EB          ; Other_Math # Pe       MATHEMATICAL RIGHT DOUBLE ANGLE BRACKET
+ 27EC          ; Other_Math # Ps       MATHEMATICAL LEFT WHITE TORTOISE SHELL BRACKET
+ 27ED          ; Other_Math # Pe       MATHEMATICAL RIGHT WHITE TORTOISE SHELL BRACKET
+ 27EE          ; Other_Math # Ps       MATHEMATICAL LEFT FLATTENED PARENTHESIS
+ 27EF          ; Other_Math # Pe       MATHEMATICAL RIGHT FLATTENED PARENTHESIS
+ 2983          ; Other_Math # Ps       LEFT WHITE CURLY BRACKET
+ 2984          ; Other_Math # Pe       RIGHT WHITE CURLY BRACKET
+ 2985          ; Other_Math # Ps       LEFT WHITE PARENTHESIS
+ 2986          ; Other_Math # Pe       RIGHT WHITE PARENTHESIS
+ 2987          ; Other_Math # Ps       Z NOTATION LEFT IMAGE BRACKET
+ 2988          ; Other_Math # Pe       Z NOTATION RIGHT IMAGE BRACKET
+ 2989          ; Other_Math # Ps       Z NOTATION LEFT BINDING BRACKET
+ 298A          ; Other_Math # Pe       Z NOTATION RIGHT BINDING BRACKET
+ 298B          ; Other_Math # Ps       LEFT SQUARE BRACKET WITH UNDERBAR
+ 298C          ; Other_Math # Pe       RIGHT SQUARE BRACKET WITH UNDERBAR
+ 298D          ; Other_Math # Ps       LEFT SQUARE BRACKET WITH TICK IN TOP CORNER
+ 298E          ; Other_Math # Pe       RIGHT SQUARE BRACKET WITH TICK IN BOTTOM CORNER
+ 298F          ; Other_Math # Ps       LEFT SQUARE BRACKET WITH TICK IN BOTTOM CORNER
+ 2990          ; Other_Math # Pe       RIGHT SQUARE BRACKET WITH TICK IN TOP CORNER
+ 2991          ; Other_Math # Ps       LEFT ANGLE BRACKET WITH DOT
+ 2992          ; Other_Math # Pe       RIGHT ANGLE BRACKET WITH DOT
+ 2993          ; Other_Math # Ps       LEFT ARC LESS-THAN BRACKET
+ 2994          ; Other_Math # Pe       RIGHT ARC GREATER-THAN BRACKET
+ 2995          ; Other_Math # Ps       DOUBLE LEFT ARC GREATER-THAN BRACKET
+ 2996          ; Other_Math # Pe       DOUBLE RIGHT ARC LESS-THAN BRACKET
+ 2997          ; Other_Math # Ps       LEFT BLACK TORTOISE SHELL BRACKET
+ 2998          ; Other_Math # Pe       RIGHT BLACK TORTOISE SHELL BRACKET
+ 29D8          ; Other_Math # Ps       LEFT WIGGLY FENCE
+ 29D9          ; Other_Math # Pe       RIGHT WIGGLY FENCE
+ 29DA          ; Other_Math # Ps       LEFT DOUBLE WIGGLY FENCE
+ 29DB          ; Other_Math # Pe       RIGHT DOUBLE WIGGLY FENCE
+ 29FC          ; Other_Math # Ps       LEFT-POINTING CURVED ANGLE BRACKET
+ 29FD          ; Other_Math # Pe       RIGHT-POINTING CURVED ANGLE BRACKET
+ FE61          ; Other_Math # Po       SMALL ASTERISK
+ FE63          ; Other_Math # Pd       SMALL HYPHEN-MINUS
+ FE68          ; Other_Math # Po       SMALL REVERSE SOLIDUS
+ FF3C          ; Other_Math # Po       FULLWIDTH REVERSE SOLIDUS
+ FF3E          ; Other_Math # Sk       FULLWIDTH CIRCUMFLEX ACCENT
+ 1D400..1D454  ; Other_Math # L&  [85] MATHEMATICAL BOLD CAPITAL A..MATHEMATICAL ITALIC SMALL G
+ 1D456..1D49C  ; Other_Math # L&  [71] MATHEMATICAL ITALIC SMALL I..MATHEMATICAL SCRIPT CAPITAL A
+ 1D49E..1D49F  ; Other_Math # L&   [2] MATHEMATICAL SCRIPT CAPITAL C..MATHEMATICAL SCRIPT CAPITAL D
+ 1D4A2         ; Other_Math # L&       MATHEMATICAL SCRIPT CAPITAL G
+ 1D4A5..1D4A6  ; Other_Math # L&   [2] MATHEMATICAL SCRIPT CAPITAL J..MATHEMATICAL SCRIPT CAPITAL K
+ 1D4A9..1D4AC  ; Other_Math # L&   [4] MATHEMATICAL SCRIPT CAPITAL N..MATHEMATICAL SCRIPT CAPITAL Q
+ 1D4AE..1D4B9  ; Other_Math # L&  [12] MATHEMATICAL SCRIPT CAPITAL S..MATHEMATICAL SCRIPT SMALL D
+ 1D4BB         ; Other_Math # L&       MATHEMATICAL SCRIPT SMALL F
+ 1D4BD..1D4C3  ; Other_Math # L&   [7] MATHEMATICAL SCRIPT SMALL H..MATHEMATICAL SCRIPT SMALL N
+ 1D4C5..1D505  ; Other_Math # L&  [65] MATHEMATICAL SCRIPT SMALL P..MATHEMATICAL FRAKTUR CAPITAL B
+ 1D507..1D50A  ; Other_Math # L&   [4] MATHEMATICAL FRAKTUR CAPITAL D..MATHEMATICAL FRAKTUR CAPITAL G
+ 1D50D..1D514  ; Other_Math # L&   [8] MATHEMATICAL FRAKTUR CAPITAL J..MATHEMATICAL FRAKTUR CAPITAL Q
+ 1D516..1D51C  ; Other_Math # L&   [7] MATHEMATICAL FRAKTUR CAPITAL S..MATHEMATICAL FRAKTUR CAPITAL Y
+ 1D51E..1D539  ; Other_Math # L&  [28] MATHEMATICAL FRAKTUR SMALL A..MATHEMATICAL DOUBLE-STRUCK CAPITAL B
+ 1D53B..1D53E  ; Other_Math # L&   [4] MATHEMATICAL DOUBLE-STRUCK CAPITAL D..MATHEMATICAL DOUBLE-STRUCK CAPITAL G
+ 1D540..1D544  ; Other_Math # L&   [5] MATHEMATICAL DOUBLE-STRUCK CAPITAL I..MATHEMATICAL DOUBLE-STRUCK CAPITAL M
+ 1D546         ; Other_Math # L&       MATHEMATICAL DOUBLE-STRUCK CAPITAL O
+ 1D54A..1D550  ; Other_Math # L&   [7] MATHEMATICAL DOUBLE-STRUCK CAPITAL S..MATHEMATICAL DOUBLE-STRUCK CAPITAL Y
+ 1D552..1D6A5  ; Other_Math # L& [340] MATHEMATICAL DOUBLE-STRUCK SMALL A..MATHEMATICAL ITALIC SMALL DOTLESS J
+ 1D6A8..1D6C0  ; Other_Math # L&  [25] MATHEMATICAL BOLD CAPITAL ALPHA..MATHEMATICAL BOLD CAPITAL OMEGA
+ 1D6C2..1D6DA  ; Other_Math # L&  [25] MATHEMATICAL BOLD SMALL ALPHA..MATHEMATICAL BOLD SMALL OMEGA
+ 1D6DC..1D6FA  ; Other_Math # L&  [31] MATHEMATICAL BOLD EPSILON SYMBOL..MATHEMATICAL ITALIC CAPITAL OMEGA
+ 1D6FC..1D714  ; Other_Math # L&  [25] MATHEMATICAL ITALIC SMALL ALPHA..MATHEMATICAL ITALIC SMALL OMEGA
+ 1D716..1D734  ; Other_Math # L&  [31] MATHEMATICAL ITALIC EPSILON SYMBOL..MATHEMATICAL BOLD ITALIC CAPITAL OMEGA
+ 1D736..1D74E  ; Other_Math # L&  [25] MATHEMATICAL BOLD ITALIC SMALL ALPHA..MATHEMATICAL BOLD ITALIC SMALL OMEGA
+ 1D750..1D76E  ; Other_Math # L&  [31] MATHEMATICAL BOLD ITALIC EPSILON SYMBOL..MATHEMATICAL SANS-SERIF BOLD CAPITAL OMEGA
+ 1D770..1D788  ; Other_Math # L&  [25] MATHEMATICAL SANS-SERIF BOLD SMALL ALPHA..MATHEMATICAL SANS-SERIF BOLD SMALL OMEGA
+ 1D78A..1D7A8  ; Other_Math # L&  [31] MATHEMATICAL SANS-SERIF BOLD EPSILON SYMBOL..MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL OMEGA
+ 1D7AA..1D7C2  ; Other_Math # L&  [25] MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL ALPHA..MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL OMEGA
+ 1D7C4..1D7CB  ; Other_Math # L&   [8] MATHEMATICAL SANS-SERIF BOLD ITALIC EPSILON SYMBOL..MATHEMATICAL BOLD SMALL DIGAMMA
+ 1D7CE..1D7FF  ; Other_Math # Nd  [50] MATHEMATICAL BOLD DIGIT ZERO..MATHEMATICAL MONOSPACE DIGIT NINE
+ 1EE00..1EE03  ; Other_Math # Lo   [4] ARABIC MATHEMATICAL ALEF..ARABIC MATHEMATICAL DAL
+ 1EE05..1EE1F  ; Other_Math # Lo  [27] ARABIC MATHEMATICAL WAW..ARABIC MATHEMATICAL DOTLESS QAF
+ 1EE21..1EE22  ; Other_Math # Lo   [2] ARABIC MATHEMATICAL INITIAL BEH..ARABIC MATHEMATICAL INITIAL JEEM
+ 1EE24         ; Other_Math # Lo       ARABIC MATHEMATICAL INITIAL HEH
+ 1EE27         ; Other_Math # Lo       ARABIC MATHEMATICAL INITIAL HAH
+ 1EE29..1EE32  ; Other_Math # Lo  [10] ARABIC MATHEMATICAL INITIAL YEH..ARABIC MATHEMATICAL INITIAL QAF
+ 1EE34..1EE37  ; Other_Math # Lo   [4] ARABIC MATHEMATICAL INITIAL SHEEN..ARABIC MATHEMATICAL INITIAL KHAH
+ 1EE39         ; Other_Math # Lo       ARABIC MATHEMATICAL INITIAL DAD
+ 1EE3B         ; Other_Math # Lo       ARABIC MATHEMATICAL INITIAL GHAIN
+ 1EE42         ; Other_Math # Lo       ARABIC MATHEMATICAL TAILED JEEM
+ 1EE47         ; Other_Math # Lo       ARABIC MATHEMATICAL TAILED HAH
+ 1EE49         ; Other_Math # Lo       ARABIC MATHEMATICAL TAILED YEH
+ 1EE4B         ; Other_Math # Lo       ARABIC MATHEMATICAL TAILED LAM
+ 1EE4D..1EE4F  ; Other_Math # Lo   [3] ARABIC MATHEMATICAL TAILED NOON..ARABIC MATHEMATICAL TAILED AIN
+ 1EE51..1EE52  ; Other_Math # Lo   [2] ARABIC MATHEMATICAL TAILED SAD..ARABIC MATHEMATICAL TAILED QAF
+ 1EE54         ; Other_Math # Lo       ARABIC MATHEMATICAL TAILED SHEEN
+ 1EE57         ; Other_Math # Lo       ARABIC MATHEMATICAL TAILED KHAH
+ 1EE59         ; Other_Math # Lo       ARABIC MATHEMATICAL TAILED DAD
+ 1EE5B         ; Other_Math # Lo       ARABIC MATHEMATICAL TAILED GHAIN
+ 1EE5D         ; Other_Math # Lo       ARABIC MATHEMATICAL TAILED DOTLESS NOON
+ 1EE5F         ; Other_Math # Lo       ARABIC MATHEMATICAL TAILED DOTLESS QAF
+ 1EE61..1EE62  ; Other_Math # Lo   [2] ARABIC MATHEMATICAL STRETCHED BEH..ARABIC MATHEMATICAL STRETCHED JEEM
+ 1EE64         ; Other_Math # Lo       ARABIC MATHEMATICAL STRETCHED HEH
+ 1EE67..1EE6A  ; Other_Math # Lo   [4] ARABIC MATHEMATICAL STRETCHED HAH..ARABIC MATHEMATICAL STRETCHED KAF
+ 1EE6C..1EE72  ; Other_Math # Lo   [7] ARABIC MATHEMATICAL STRETCHED MEEM..ARABIC MATHEMATICAL STRETCHED QAF
+ 1EE74..1EE77  ; Other_Math # Lo   [4] ARABIC MATHEMATICAL STRETCHED SHEEN..ARABIC MATHEMATICAL STRETCHED KHAH
+ 1EE79..1EE7C  ; Other_Math # Lo   [4] ARABIC MATHEMATICAL STRETCHED DAD..ARABIC MATHEMATICAL STRETCHED DOTLESS BEH
+ 1EE7E         ; Other_Math # Lo       ARABIC MATHEMATICAL STRETCHED DOTLESS FEH
+ 1EE80..1EE89  ; Other_Math # Lo  [10] ARABIC MATHEMATICAL LOOPED ALEF..ARABIC MATHEMATICAL LOOPED YEH
+ 1EE8B..1EE9B  ; Other_Math # Lo  [17] ARABIC MATHEMATICAL LOOPED LAM..ARABIC MATHEMATICAL LOOPED GHAIN
+ 1EEA1..1EEA3  ; Other_Math # Lo   [3] ARABIC MATHEMATICAL DOUBLE-STRUCK BEH..ARABIC MATHEMATICAL DOUBLE-STRUCK DAL
+ 1EEA5..1EEA9  ; Other_Math # Lo   [5] ARABIC MATHEMATICAL DOUBLE-STRUCK WAW..ARABIC MATHEMATICAL DOUBLE-STRUCK YEH
+ 1EEAB..1EEBB  ; Other_Math # Lo  [17] ARABIC MATHEMATICAL DOUBLE-STRUCK LAM..ARABIC MATHEMATICAL DOUBLE-STRUCK GHAIN
+ 
+ # Total code points: 1362
+ 
+ # ================================================
+ 
+ 0030..0039    ; Hex_Digit # Nd  [10] DIGIT ZERO..DIGIT NINE
+ 0041..0046    ; Hex_Digit # L&   [6] LATIN CAPITAL LETTER A..LATIN CAPITAL LETTER F
+ 0061..0066    ; Hex_Digit # L&   [6] LATIN SMALL LETTER A..LATIN SMALL LETTER F
+ FF10..FF19    ; Hex_Digit # Nd  [10] FULLWIDTH DIGIT ZERO..FULLWIDTH DIGIT NINE
+ FF21..FF26    ; Hex_Digit # L&   [6] FULLWIDTH LATIN CAPITAL LETTER A..FULLWIDTH LATIN CAPITAL LETTER F
+ FF41..FF46    ; Hex_Digit # L&   [6] FULLWIDTH LATIN SMALL LETTER A..FULLWIDTH LATIN SMALL LETTER F
+ 
+ # Total code points: 44
+ 
+ # ================================================
+ 
+ 0030..0039    ; ASCII_Hex_Digit # Nd  [10] DIGIT ZERO..DIGIT NINE
+ 0041..0046    ; ASCII_Hex_Digit # L&   [6] LATIN CAPITAL LETTER A..LATIN CAPITAL LETTER F
+ 0061..0066    ; ASCII_Hex_Digit # L&   [6] LATIN SMALL LETTER A..LATIN SMALL LETTER F
+ 
+ # Total code points: 22
+ 
+ # ================================================
+ 
+ 0345          ; Other_Alphabetic # Mn       COMBINING GREEK YPOGEGRAMMENI
+ 05B0..05BD    ; Other_Alphabetic # Mn  [14] HEBREW POINT SHEVA..HEBREW POINT METEG
+ 05BF          ; Other_Alphabetic # Mn       HEBREW POINT RAFE
+ 05C1..05C2    ; Other_Alphabetic # Mn   [2] HEBREW POINT SHIN DOT..HEBREW POINT SIN DOT
+ 05C4..05C5    ; Other_Alphabetic # Mn   [2] HEBREW MARK UPPER DOT..HEBREW MARK LOWER DOT
+ 05C7          ; Other_Alphabetic # Mn       HEBREW POINT QAMATS QATAN
+ 0610..061A    ; Other_Alphabetic # Mn  [11] ARABIC SIGN SALLALLAHOU ALAYHE WASSALLAM..ARABIC SMALL KASRA
+ 064B..0657    ; Other_Alphabetic # Mn  [13] ARABIC FATHATAN..ARABIC INVERTED DAMMA
+ 0659..065F    ; Other_Alphabetic # Mn   [7] ARABIC ZWARAKAY..ARABIC WAVY HAMZA BELOW
+ 0670          ; Other_Alphabetic # Mn       ARABIC LETTER SUPERSCRIPT ALEF
+ 06D6..06DC    ; Other_Alphabetic # Mn   [7] ARABIC SMALL HIGH LIGATURE SAD WITH LAM WITH ALEF MAKSURA..ARABIC SMALL HIGH SEEN
+ 06E1..06E4    ; Other_Alphabetic # Mn   [4] ARABIC SMALL HIGH DOTLESS HEAD OF KHAH..ARABIC SMALL HIGH MADDA
+ 06E7..06E8    ; Other_Alphabetic # Mn   [2] ARABIC SMALL HIGH YEH..ARABIC SMALL HIGH NOON
+ 06ED          ; Other_Alphabetic # Mn       ARABIC SMALL LOW MEEM
+ 0711          ; Other_Alphabetic # Mn       SYRIAC LETTER SUPERSCRIPT ALAPH
+ 0730..073F    ; Other_Alphabetic # Mn  [16] SYRIAC PTHAHA ABOVE..SYRIAC RWAHA
+ 07A6..07B0    ; Other_Alphabetic # Mn  [11] THAANA ABAFILI..THAANA SUKUN
+ 0816..0817    ; Other_Alphabetic # Mn   [2] SAMARITAN MARK IN..SAMARITAN MARK IN-ALAF
+ 081B..0823    ; Other_Alphabetic # Mn   [9] SAMARITAN MARK EPENTHETIC YUT..SAMARITAN VOWEL SIGN A
+ 0825..0827    ; Other_Alphabetic # Mn   [3] SAMARITAN VOWEL SIGN SHORT A..SAMARITAN VOWEL SIGN U
+ 0829..082C    ; Other_Alphabetic # Mn   [4] SAMARITAN VOWEL SIGN LONG I..SAMARITAN VOWEL SIGN SUKUN
+ 08D4..08DF    ; Other_Alphabetic # Mn  [12] ARABIC SMALL HIGH WORD AR-RUB..ARABIC SMALL HIGH WORD WAQFA
+ 08E3..08E9    ; Other_Alphabetic # Mn   [7] ARABIC TURNED DAMMA BELOW..ARABIC CURLY KASRATAN
+ 08F0..0902    ; Other_Alphabetic # Mn  [19] ARABIC OPEN FATHATAN..DEVANAGARI SIGN ANUSVARA
+ 0903          ; Other_Alphabetic # Mc       DEVANAGARI SIGN VISARGA
+ 093A          ; Other_Alphabetic # Mn       DEVANAGARI VOWEL SIGN OE
+ 093B          ; Other_Alphabetic # Mc       DEVANAGARI VOWEL SIGN OOE
+ 093E..0940    ; Other_Alphabetic # Mc   [3] DEVANAGARI VOWEL SIGN AA..DEVANAGARI VOWEL SIGN II
+ 0941..0948    ; Other_Alphabetic # Mn   [8] DEVANAGARI VOWEL SIGN U..DEVANAGARI VOWEL SIGN AI
+ 0949..094C    ; Other_Alphabetic # Mc   [4] DEVANAGARI VOWEL SIGN CANDRA O..DEVANAGARI VOWEL SIGN AU
+ 094E..094F    ; Other_Alphabetic # Mc   [2] DEVANAGARI VOWEL SIGN PRISHTHAMATRA E..DEVANAGARI VOWEL SIGN AW
+ 0955..0957    ; Other_Alphabetic # Mn   [3] DEVANAGARI VOWEL SIGN CANDRA LONG E..DEVANAGARI VOWEL SIGN UUE
+ 0962..0963    ; Other_Alphabetic # Mn   [2] DEVANAGARI VOWEL SIGN VOCALIC L..DEVANAGARI VOWEL SIGN VOCALIC LL
+ 0981          ; Other_Alphabetic # Mn       BENGALI SIGN CANDRABINDU
+ 0982..0983    ; Other_Alphabetic # Mc   [2] BENGALI SIGN ANUSVARA..BENGALI SIGN VISARGA
+ 09BE..09C0    ; Other_Alphabetic # Mc   [3] BENGALI VOWEL SIGN AA..BENGALI VOWEL SIGN II
+ 09C1..09C4    ; Other_Alphabetic # Mn   [4] BENGALI VOWEL SIGN U..BENGALI VOWEL SIGN VOCALIC RR
+ 09C7..09C8    ; Other_Alphabetic # Mc   [2] BENGALI VOWEL SIGN E..BENGALI VOWEL SIGN AI
+ 09CB..09CC    ; Other_Alphabetic # Mc   [2] BENGALI VOWEL SIGN O..BENGALI VOWEL SIGN AU
+ 09D7          ; Other_Alphabetic # Mc       BENGALI AU LENGTH MARK
+ 09E2..09E3    ; Other_Alphabetic # Mn   [2] BENGALI VOWEL SIGN VOCALIC L..BENGALI VOWEL SIGN VOCALIC LL
+ 0A01..0A02    ; Other_Alphabetic # Mn   [2] GURMUKHI SIGN ADAK BINDI..GURMUKHI SIGN BINDI
+ 0A03          ; Other_Alphabetic # Mc       GURMUKHI SIGN VISARGA
+ 0A3E..0A40    ; Other_Alphabetic # Mc   [3] GURMUKHI VOWEL SIGN AA..GURMUKHI VOWEL SIGN II
+ 0A41..0A42    ; Other_Alphabetic # Mn   [2] GURMUKHI VOWEL SIGN U..GURMUKHI VOWEL SIGN UU
+ 0A47..0A48    ; Other_Alphabetic # Mn   [2] GURMUKHI VOWEL SIGN EE..GURMUKHI VOWEL SIGN AI
+ 0A4B..0A4C    ; Other_Alphabetic # Mn   [2] GURMUKHI VOWEL SIGN OO..GURMUKHI VOWEL SIGN AU
+ 0A51          ; Other_Alphabetic # Mn       GURMUKHI SIGN UDAAT
+ 0A70..0A71    ; Other_Alphabetic # Mn   [2] GURMUKHI TIPPI..GURMUKHI ADDAK
+ 0A75          ; Other_Alphabetic # Mn       GURMUKHI SIGN YAKASH
+ 0A81..0A82    ; Other_Alphabetic # Mn   [2] GUJARATI SIGN CANDRABINDU..GUJARATI SIGN ANUSVARA
+ 0A83          ; Other_Alphabetic # Mc       GUJARATI SIGN VISARGA
+ 0ABE..0AC0    ; Other_Alphabetic # Mc   [3] GUJARATI VOWEL SIGN AA..GUJARATI VOWEL SIGN II
+ 0AC1..0AC5    ; Other_Alphabetic # Mn   [5] GUJARATI VOWEL SIGN U..GUJARATI VOWEL SIGN CANDRA E
+ 0AC7..0AC8    ; Other_Alphabetic # Mn   [2] GUJARATI VOWEL SIGN E..GUJARATI VOWEL SIGN AI
+ 0AC9          ; Other_Alphabetic # Mc       GUJARATI VOWEL SIGN CANDRA O
+ 0ACB..0ACC    ; Other_Alphabetic # Mc   [2] GUJARATI VOWEL SIGN O..GUJARATI VOWEL SIGN AU
+ 0AE2..0AE3    ; Other_Alphabetic # Mn   [2] GUJARATI VOWEL SIGN VOCALIC L..GUJARATI VOWEL SIGN VOCALIC LL
+ 0AFA..0AFC    ; Other_Alphabetic # Mn   [3] GUJARATI SIGN SUKUN..GUJARATI SIGN MADDAH
+ 0B01          ; Other_Alphabetic # Mn       ORIYA SIGN CANDRABINDU
+ 0B02..0B03    ; Other_Alphabetic # Mc   [2] ORIYA SIGN ANUSVARA..ORIYA SIGN VISARGA
+ 0B3E          ; Other_Alphabetic # Mc       ORIYA VOWEL SIGN AA
+ 0B3F          ; Other_Alphabetic # Mn       ORIYA VOWEL SIGN I
+ 0B40          ; Other_Alphabetic # Mc       ORIYA VOWEL SIGN II
+ 0B41..0B44    ; Other_Alphabetic # Mn   [4] ORIYA VOWEL SIGN U..ORIYA VOWEL SIGN VOCALIC RR
+ 0B47..0B48    ; Other_Alphabetic # Mc   [2] ORIYA VOWEL SIGN E..ORIYA VOWEL SIGN AI
+ 0B4B..0B4C    ; Other_Alphabetic # Mc   [2] ORIYA VOWEL SIGN O..ORIYA VOWEL SIGN AU
+ 0B56          ; Other_Alphabetic # Mn       ORIYA AI LENGTH MARK
+ 0B57          ; Other_Alphabetic # Mc       ORIYA AU LENGTH MARK
+ 0B62..0B63    ; Other_Alphabetic # Mn   [2] ORIYA VOWEL SIGN VOCALIC L..ORIYA VOWEL SIGN VOCALIC LL
+ 0B82          ; Other_Alphabetic # Mn       TAMIL SIGN ANUSVARA
+ 0BBE..0BBF    ; Other_Alphabetic # Mc   [2] TAMIL VOWEL SIGN AA..TAMIL VOWEL SIGN I
+ 0BC0          ; Other_Alphabetic # Mn       TAMIL VOWEL SIGN II
+ 0BC1..0BC2    ; Other_Alphabetic # Mc   [2] TAMIL VOWEL SIGN U..TAMIL VOWEL SIGN UU
+ 0BC6..0BC8    ; Other_Alphabetic # Mc   [3] TAMIL VOWEL SIGN E..TAMIL VOWEL SIGN AI
+ 0BCA..0BCC    ; Other_Alphabetic # Mc   [3] TAMIL VOWEL SIGN O..TAMIL VOWEL SIGN AU
+ 0BD7          ; Other_Alphabetic # Mc       TAMIL AU LENGTH MARK
+ 0C00          ; Other_Alphabetic # Mn       TELUGU SIGN COMBINING CANDRABINDU ABOVE
+ 0C01..0C03    ; Other_Alphabetic # Mc   [3] TELUGU SIGN CANDRABINDU..TELUGU SIGN VISARGA
+ 0C3E..0C40    ; Other_Alphabetic # Mn   [3] TELUGU VOWEL SIGN AA..TELUGU VOWEL SIGN II
+ 0C41..0C44    ; Other_Alphabetic # Mc   [4] TELUGU VOWEL SIGN U..TELUGU VOWEL SIGN VOCALIC RR
+ 0C46..0C48    ; Other_Alphabetic # Mn   [3] TELUGU VOWEL SIGN E..TELUGU VOWEL SIGN AI
+ 0C4A..0C4C    ; Other_Alphabetic # Mn   [3] TELUGU VOWEL SIGN O..TELUGU VOWEL SIGN AU
+ 0C55..0C56    ; Other_Alphabetic # Mn   [2] TELUGU LENGTH MARK..TELUGU AI LENGTH MARK
+ 0C62..0C63    ; Other_Alphabetic # Mn   [2] TELUGU VOWEL SIGN VOCALIC L..TELUGU VOWEL SIGN VOCALIC LL
+ 0C81          ; Other_Alphabetic # Mn       KANNADA SIGN CANDRABINDU
+ 0C82..0C83    ; Other_Alphabetic # Mc   [2] KANNADA SIGN ANUSVARA..KANNADA SIGN VISARGA
+ 0CBE          ; Other_Alphabetic # Mc       KANNADA VOWEL SIGN AA
+ 0CBF          ; Other_Alphabetic # Mn       KANNADA VOWEL SIGN I
+ 0CC0..0CC4    ; Other_Alphabetic # Mc   [5] KANNADA VOWEL SIGN II..KANNADA VOWEL SIGN VOCALIC RR
+ 0CC6          ; Other_Alphabetic # Mn       KANNADA VOWEL SIGN E
+ 0CC7..0CC8    ; Other_Alphabetic # Mc   [2] KANNADA VOWEL SIGN EE..KANNADA VOWEL SIGN AI
+ 0CCA..0CCB    ; Other_Alphabetic # Mc   [2] KANNADA VOWEL SIGN O..KANNADA VOWEL SIGN OO
+ 0CCC          ; Other_Alphabetic # Mn       KANNADA VOWEL SIGN AU
+ 0CD5..0CD6    ; Other_Alphabetic # Mc   [2] KANNADA LENGTH MARK..KANNADA AI LENGTH MARK
+ 0CE2..0CE3    ; Other_Alphabetic # Mn   [2] KANNADA VOWEL SIGN VOCALIC L..KANNADA VOWEL SIGN VOCALIC LL
+ 0D00..0D01    ; Other_Alphabetic # Mn   [2] MALAYALAM SIGN COMBINING ANUSVARA ABOVE..MALAYALAM SIGN CANDRABINDU
+ 0D02..0D03    ; Other_Alphabetic # Mc   [2] MALAYALAM SIGN ANUSVARA..MALAYALAM SIGN VISARGA
+ 0D3E..0D40    ; Other_Alphabetic # Mc   [3] MALAYALAM VOWEL SIGN AA..MALAYALAM VOWEL SIGN II
+ 0D41..0D44    ; Other_Alphabetic # Mn   [4] MALAYALAM VOWEL SIGN U..MALAYALAM VOWEL SIGN VOCALIC RR
+ 0D46..0D48    ; Other_Alphabetic # Mc   [3] MALAYALAM VOWEL SIGN E..MALAYALAM VOWEL SIGN AI
+ 0D4A..0D4C    ; Other_Alphabetic # Mc   [3] MALAYALAM VOWEL SIGN O..MALAYALAM VOWEL SIGN AU
+ 0D57          ; Other_Alphabetic # Mc       MALAYALAM AU LENGTH MARK
+ 0D62..0D63    ; Other_Alphabetic # Mn   [2] MALAYALAM VOWEL SIGN VOCALIC L..MALAYALAM VOWEL SIGN VOCALIC LL
+ 0D82..0D83    ; Other_Alphabetic # Mc   [2] SINHALA SIGN ANUSVARAYA..SINHALA SIGN VISARGAYA
+ 0DCF..0DD1    ; Other_Alphabetic # Mc   [3] SINHALA VOWEL SIGN AELA-PILLA..SINHALA VOWEL SIGN DIGA AEDA-PILLA
+ 0DD2..0DD4    ; Other_Alphabetic # Mn   [3] SINHALA VOWEL SIGN KETTI IS-PILLA..SINHALA VOWEL SIGN KETTI PAA-PILLA
+ 0DD6          ; Other_Alphabetic # Mn       SINHALA VOWEL SIGN DIGA PAA-PILLA
+ 0DD8..0DDF    ; Other_Alphabetic # Mc   [8] SINHALA VOWEL SIGN GAETTA-PILLA..SINHALA VOWEL SIGN GAYANUKITTA
+ 0DF2..0DF3    ; Other_Alphabetic # Mc   [2] SINHALA VOWEL SIGN DIGA GAETTA-PILLA..SINHALA VOWEL SIGN DIGA GAYANUKITTA
+ 0E31          ; Other_Alphabetic # Mn       THAI CHARACTER MAI HAN-AKAT
+ 0E34..0E3A    ; Other_Alphabetic # Mn   [7] THAI CHARACTER SARA I..THAI CHARACTER PHINTHU
+ 0E4D          ; Other_Alphabetic # Mn       THAI CHARACTER NIKHAHIT
+ 0EB1          ; Other_Alphabetic # Mn       LAO VOWEL SIGN MAI KAN
+ 0EB4..0EB9    ; Other_Alphabetic # Mn   [6] LAO VOWEL SIGN I..LAO VOWEL SIGN UU
+ 0EBB..0EBC    ; Other_Alphabetic # Mn   [2] LAO VOWEL SIGN MAI KON..LAO SEMIVOWEL SIGN LO
+ 0ECD          ; Other_Alphabetic # Mn       LAO NIGGAHITA
+ 0F71..0F7E    ; Other_Alphabetic # Mn  [14] TIBETAN VOWEL SIGN AA..TIBETAN SIGN RJES SU NGA RO
+ 0F7F          ; Other_Alphabetic # Mc       TIBETAN SIGN RNAM BCAD
+ 0F80..0F81    ; Other_Alphabetic # Mn   [2] TIBETAN VOWEL SIGN REVERSED I..TIBETAN VOWEL SIGN REVERSED II
+ 0F8D..0F97    ; Other_Alphabetic # Mn  [11] TIBETAN SUBJOINED SIGN LCE TSA CAN..TIBETAN SUBJOINED LETTER JA
+ 0F99..0FBC    ; Other_Alphabetic # Mn  [36] TIBETAN SUBJOINED LETTER NYA..TIBETAN SUBJOINED LETTER FIXED-FORM RA
+ 102B..102C    ; Other_Alphabetic # Mc   [2] MYANMAR VOWEL SIGN TALL AA..MYANMAR VOWEL SIGN AA
+ 102D..1030    ; Other_Alphabetic # Mn   [4] MYANMAR VOWEL SIGN I..MYANMAR VOWEL SIGN UU
+ 1031          ; Other_Alphabetic # Mc       MYANMAR VOWEL SIGN E
+ 1032..1036    ; Other_Alphabetic # Mn   [5] MYANMAR VOWEL SIGN AI..MYANMAR SIGN ANUSVARA
+ 1038          ; Other_Alphabetic # Mc       MYANMAR SIGN VISARGA
+ 103B..103C    ; Other_Alphabetic # Mc   [2] MYANMAR CONSONANT SIGN MEDIAL YA..MYANMAR CONSONANT SIGN MEDIAL RA
+ 103D..103E    ; Other_Alphabetic # Mn   [2] MYANMAR CONSONANT SIGN MEDIAL WA..MYANMAR CONSONANT SIGN MEDIAL HA
+ 1056..1057    ; Other_Alphabetic # Mc   [2] MYANMAR VOWEL SIGN VOCALIC R..MYANMAR VOWEL SIGN VOCALIC RR
+ 1058..1059    ; Other_Alphabetic # Mn   [2] MYANMAR VOWEL SIGN VOCALIC L..MYANMAR VOWEL SIGN VOCALIC LL
+ 105E..1060    ; Other_Alphabetic # Mn   [3] MYANMAR CONSONANT SIGN MON MEDIAL NA..MYANMAR CONSONANT SIGN MON MEDIAL LA
+ 1062..1064    ; Other_Alphabetic # Mc   [3] MYANMAR VOWEL SIGN SGAW KAREN EU..MYANMAR TONE MARK SGAW KAREN KE PHO
+ 1067..106D    ; Other_Alphabetic # Mc   [7] MYANMAR VOWEL SIGN WESTERN PWO KAREN EU..MYANMAR SIGN WESTERN PWO KAREN TONE-5
+ 1071..1074    ; Other_Alphabetic # Mn   [4] MYANMAR VOWEL SIGN GEBA KAREN I..MYANMAR VOWEL SIGN KAYAH EE
+ 1082          ; Other_Alphabetic # Mn       MYANMAR CONSONANT SIGN SHAN MEDIAL WA
+ 1083..1084    ; Other_Alphabetic # Mc   [2] MYANMAR VOWEL SIGN SHAN AA..MYANMAR VOWEL SIGN SHAN E
+ 1085..1086    ; Other_Alphabetic # Mn   [2] MYANMAR VOWEL SIGN SHAN E ABOVE..MYANMAR VOWEL SIGN SHAN FINAL Y
+ 1087..108C    ; Other_Alphabetic # Mc   [6] MYANMAR SIGN SHAN TONE-2..MYANMAR SIGN SHAN COUNCIL TONE-3
+ 108D          ; Other_Alphabetic # Mn       MYANMAR SIGN SHAN COUNCIL EMPHATIC TONE
+ 108F          ; Other_Alphabetic # Mc       MYANMAR SIGN RUMAI PALAUNG TONE-5
+ 109A..109C    ; Other_Alphabetic # Mc   [3] MYANMAR SIGN KHAMTI TONE-1..MYANMAR VOWEL SIGN AITON A
+ 109D          ; Other_Alphabetic # Mn       MYANMAR VOWEL SIGN AITON AI
+ 1712..1713    ; Other_Alphabetic # Mn   [2] TAGALOG VOWEL SIGN I..TAGALOG VOWEL SIGN U
+ 1732..1733    ; Other_Alphabetic # Mn   [2] HANUNOO VOWEL SIGN I..HANUNOO VOWEL SIGN U
+ 1752..1753    ; Other_Alphabetic # Mn   [2] BUHID VOWEL SIGN I..BUHID VOWEL SIGN U
+ 1772..1773    ; Other_Alphabetic # Mn   [2] TAGBANWA VOWEL SIGN I..TAGBANWA VOWEL SIGN U
+ 17B6          ; Other_Alphabetic # Mc       KHMER VOWEL SIGN AA
+ 17B7..17BD    ; Other_Alphabetic # Mn   [7] KHMER VOWEL SIGN I..KHMER VOWEL SIGN UA
+ 17BE..17C5    ; Other_Alphabetic # Mc   [8] KHMER VOWEL SIGN OE..KHMER VOWEL SIGN AU
+ 17C6          ; Other_Alphabetic # Mn       KHMER SIGN NIKAHIT
+ 17C7..17C8    ; Other_Alphabetic # Mc   [2] KHMER SIGN REAHMUK..KHMER SIGN YUUKALEAPINTU
+ 1885..1886    ; Other_Alphabetic # Mn   [2] MONGOLIAN LETTER ALI GALI BALUDA..MONGOLIAN LETTER ALI GALI THREE BALUDA
+ 18A9          ; Other_Alphabetic # Mn       MONGOLIAN LETTER ALI GALI DAGALGA
+ 1920..1922    ; Other_Alphabetic # Mn   [3] LIMBU VOWEL SIGN A..LIMBU VOWEL SIGN U
+ 1923..1926    ; Other_Alphabetic # Mc   [4] LIMBU VOWEL SIGN EE..LIMBU VOWEL SIGN AU
+ 1927..1928    ; Other_Alphabetic # Mn   [2] LIMBU VOWEL SIGN E..LIMBU VOWEL SIGN O
+ 1929..192B    ; Other_Alphabetic # Mc   [3] LIMBU SUBJOINED LETTER YA..LIMBU SUBJOINED LETTER WA
+ 1930..1931    ; Other_Alphabetic # Mc   [2] LIMBU SMALL LETTER KA..LIMBU SMALL LETTER NGA
+ 1932          ; Other_Alphabetic # Mn       LIMBU SMALL LETTER ANUSVARA
+ 1933..1938    ; Other_Alphabetic # Mc   [6] LIMBU SMALL LETTER TA..LIMBU SMALL LETTER LA
+ 1A17..1A18    ; Other_Alphabetic # Mn   [2] BUGINESE VOWEL SIGN I..BUGINESE VOWEL SIGN U
+ 1A19..1A1A    ; Other_Alphabetic # Mc   [2] BUGINESE VOWEL SIGN E..BUGINESE VOWEL SIGN O
+ 1A1B          ; Other_Alphabetic # Mn       BUGINESE VOWEL SIGN AE
+ 1A55          ; Other_Alphabetic # Mc       TAI THAM CONSONANT SIGN MEDIAL RA
+ 1A56          ; Other_Alphabetic # Mn       TAI THAM CONSONANT SIGN MEDIAL LA
+ 1A57          ; Other_Alphabetic # Mc       TAI THAM CONSONANT SIGN LA TANG LAI
+ 1A58..1A5E    ; Other_Alphabetic # Mn   [7] TAI THAM SIGN MAI KANG LAI..TAI THAM CONSONANT SIGN SA
+ 1A61          ; Other_Alphabetic # Mc       TAI THAM VOWEL SIGN A
+ 1A62          ; Other_Alphabetic # Mn       TAI THAM VOWEL SIGN MAI SAT
+ 1A63..1A64    ; Other_Alphabetic # Mc   [2] TAI THAM VOWEL SIGN AA..TAI THAM VOWEL SIGN TALL AA
+ 1A65..1A6C    ; Other_Alphabetic # Mn   [8] TAI THAM VOWEL SIGN I..TAI THAM VOWEL SIGN OA BELOW
+ 1A6D..1A72    ; Other_Alphabetic # Mc   [6] TAI THAM VOWEL SIGN OY..TAI THAM VOWEL SIGN THAM AI
+ 1A73..1A74    ; Other_Alphabetic # Mn   [2] TAI THAM VOWEL SIGN OA ABOVE..TAI THAM SIGN MAI KANG
+ 1B00..1B03    ; Other_Alphabetic # Mn   [4] BALINESE SIGN ULU RICEM..BALINESE SIGN SURANG
+ 1B04          ; Other_Alphabetic # Mc       BALINESE SIGN BISAH
+ 1B35          ; Other_Alphabetic # Mc       BALINESE VOWEL SIGN TEDUNG
+ 1B36..1B3A    ; Other_Alphabetic # Mn   [5] BALINESE VOWEL SIGN ULU..BALINESE VOWEL SIGN RA REPA
+ 1B3B          ; Other_Alphabetic # Mc       BALINESE VOWEL SIGN RA REPA TEDUNG
+ 1B3C          ; Other_Alphabetic # Mn       BALINESE VOWEL SIGN LA LENGA
+ 1B3D..1B41    ; Other_Alphabetic # Mc   [5] BALINESE VOWEL SIGN LA LENGA TEDUNG..BALINESE VOWEL SIGN TALING REPA TEDUNG
+ 1B42          ; Other_Alphabetic # Mn       BALINESE VOWEL SIGN PEPET
+ 1B43          ; Other_Alphabetic # Mc       BALINESE VOWEL SIGN PEPET TEDUNG
+ 1B80..1B81    ; Other_Alphabetic # Mn   [2] SUNDANESE SIGN PANYECEK..SUNDANESE SIGN PANGLAYAR
+ 1B82          ; Other_Alphabetic # Mc       SUNDANESE SIGN PANGWISAD
+ 1BA1          ; Other_Alphabetic # Mc       SUNDANESE CONSONANT SIGN PAMINGKAL
+ 1BA2..1BA5    ; Other_Alphabetic # Mn   [4] SUNDANESE CONSONANT SIGN PANYAKRA..SUNDANESE VOWEL SIGN PANYUKU
+ 1BA6..1BA7    ; Other_Alphabetic # Mc   [2] SUNDANESE VOWEL SIGN PANAELAENG..SUNDANESE VOWEL SIGN PANOLONG
+ 1BA8..1BA9    ; Other_Alphabetic # Mn   [2] SUNDANESE VOWEL SIGN PAMEPET..SUNDANESE VOWEL SIGN PANEULEUNG
+ 1BAC..1BAD    ; Other_Alphabetic # Mn   [2] SUNDANESE CONSONANT SIGN PASANGAN MA..SUNDANESE CONSONANT SIGN PASANGAN WA
+ 1BE7          ; Other_Alphabetic # Mc       BATAK VOWEL SIGN E
+ 1BE8..1BE9    ; Other_Alphabetic # Mn   [2] BATAK VOWEL SIGN PAKPAK E..BATAK VOWEL SIGN EE
+ 1BEA..1BEC    ; Other_Alphabetic # Mc   [3] BATAK VOWEL SIGN I..BATAK VOWEL SIGN O
+ 1BED          ; Other_Alphabetic # Mn       BATAK VOWEL SIGN KARO O
+ 1BEE          ; Other_Alphabetic # Mc       BATAK VOWEL SIGN U
+ 1BEF..1BF1    ; Other_Alphabetic # Mn   [3] BATAK VOWEL SIGN U FOR SIMALUNGUN SA..BATAK CONSONANT SIGN H
+ 1C24..1C2B    ; Other_Alphabetic # Mc   [8] LEPCHA SUBJOINED LETTER YA..LEPCHA VOWEL SIGN UU
+ 1C2C..1C33    ; Other_Alphabetic # Mn   [8] LEPCHA VOWEL SIGN E..LEPCHA CONSONANT SIGN T
+ 1C34..1C35    ; Other_Alphabetic # Mc   [2] LEPCHA CONSONANT SIGN NYIN-DO..LEPCHA CONSONANT SIGN KANG
+ 1C36          ; Other_Alphabetic # Mn       LEPCHA SIGN RAN
+ 1DE7..1DF4    ; Other_Alphabetic # Mn  [14] COMBINING LATIN SMALL LETTER ALPHA..COMBINING LATIN SMALL LETTER U WITH DIAERESIS
+ 24B6..24E9    ; Other_Alphabetic # So  [52] CIRCLED LATIN CAPITAL LETTER A..CIRCLED LATIN SMALL LETTER Z
+ 2DE0..2DFF    ; Other_Alphabetic # Mn  [32] COMBINING CYRILLIC LETTER BE..COMBINING CYRILLIC LETTER IOTIFIED BIG YUS
+ A674..A67B    ; Other_Alphabetic # Mn   [8] COMBINING CYRILLIC LETTER UKRAINIAN IE..COMBINING CYRILLIC LETTER OMEGA
+ A69E..A69F    ; Other_Alphabetic # Mn   [2] COMBINING CYRILLIC LETTER EF..COMBINING CYRILLIC LETTER IOTIFIED E
+ A802          ; Other_Alphabetic # Mn       SYLOTI NAGRI SIGN DVISVARA
+ A80B          ; Other_Alphabetic # Mn       SYLOTI NAGRI SIGN ANUSVARA
+ A823..A824    ; Other_Alphabetic # Mc   [2] SYLOTI NAGRI VOWEL SIGN A..SYLOTI NAGRI VOWEL SIGN I
+ A825..A826    ; Other_Alphabetic # Mn   [2] SYLOTI NAGRI VOWEL SIGN U..SYLOTI NAGRI VOWEL SIGN E
+ A827          ; Other_Alphabetic # Mc       SYLOTI NAGRI VOWEL SIGN OO
+ A880..A881    ; Other_Alphabetic # Mc   [2] SAURASHTRA SIGN ANUSVARA..SAURASHTRA SIGN VISARGA
+ A8B4..A8C3    ; Other_Alphabetic # Mc  [16] SAURASHTRA CONSONANT SIGN HAARU..SAURASHTRA VOWEL SIGN AU
+ A8C5          ; Other_Alphabetic # Mn       SAURASHTRA SIGN CANDRABINDU
+ A8FF          ; Other_Alphabetic # Mn       DEVANAGARI VOWEL SIGN AY
+ A926..A92A    ; Other_Alphabetic # Mn   [5] KAYAH LI VOWEL UE..KAYAH LI VOWEL O
+ A947..A951    ; Other_Alphabetic # Mn  [11] REJANG VOWEL SIGN I..REJANG CONSONANT SIGN R
+ A952          ; Other_Alphabetic # Mc       REJANG CONSONANT SIGN H
+ A980..A982    ; Other_Alphabetic # Mn   [3] JAVANESE SIGN PANYANGGA..JAVANESE SIGN LAYAR
+ A983          ; Other_Alphabetic # Mc       JAVANESE SIGN WIGNYAN
+ A9B4..A9B5    ; Other_Alphabetic # Mc   [2] JAVANESE VOWEL SIGN TARUNG..JAVANESE VOWEL SIGN TOLONG
+ A9B6..A9B9    ; Other_Alphabetic # Mn   [4] JAVANESE VOWEL SIGN WULU..JAVANESE VOWEL SIGN SUKU MENDUT
+ A9BA..A9BB    ; Other_Alphabetic # Mc   [2] JAVANESE VOWEL SIGN TALING..JAVANESE VOWEL SIGN DIRGA MURE
+ A9BC..A9BD    ; Other_Alphabetic # Mn   [2] JAVANESE VOWEL SIGN PEPET..JAVANESE CONSONANT SIGN KERET
+ A9BE..A9BF    ; Other_Alphabetic # Mc   [2] JAVANESE CONSONANT SIGN PENGKAL..JAVANESE CONSONANT SIGN CAKRA
+ A9E5          ; Other_Alphabetic # Mn       MYANMAR SIGN SHAN SAW
+ AA29..AA2E    ; Other_Alphabetic # Mn   [6] CHAM VOWEL SIGN AA..CHAM VOWEL SIGN OE
+ AA2F..AA30    ; Other_Alphabetic # Mc   [2] CHAM VOWEL SIGN O..CHAM VOWEL SIGN AI
+ AA31..AA32    ; Other_Alphabetic # Mn   [2] CHAM VOWEL SIGN AU..CHAM VOWEL SIGN UE
+ AA33..AA34    ; Other_Alphabetic # Mc   [2] CHAM CONSONANT SIGN YA..CHAM CONSONANT SIGN RA
+ AA35..AA36    ; Other_Alphabetic # Mn   [2] CHAM CONSONANT SIGN LA..CHAM CONSONANT SIGN WA
+ AA43          ; Other_Alphabetic # Mn       CHAM CONSONANT SIGN FINAL NG
+ AA4C          ; Other_Alphabetic # Mn       CHAM CONSONANT SIGN FINAL M
+ AA4D          ; Other_Alphabetic # Mc       CHAM CONSONANT SIGN FINAL H
+ AA7B          ; Other_Alphabetic # Mc       MYANMAR SIGN PAO KAREN TONE
+ AA7C          ; Other_Alphabetic # Mn       MYANMAR SIGN TAI LAING TONE-2
+ AA7D          ; Other_Alphabetic # Mc       MYANMAR SIGN TAI LAING TONE-5
+ AAB0          ; Other_Alphabetic # Mn       TAI VIET MAI KANG
+ AAB2..AAB4    ; Other_Alphabetic # Mn   [3] TAI VIET VOWEL I..TAI VIET VOWEL U
+ AAB7..AAB8    ; Other_Alphabetic # Mn   [2] TAI VIET MAI KHIT..TAI VIET VOWEL IA
+ AABE          ; Other_Alphabetic # Mn       TAI VIET VOWEL AM
+ AAEB          ; Other_Alphabetic # Mc       MEETEI MAYEK VOWEL SIGN II
+ AAEC..AAED    ; Other_Alphabetic # Mn   [2] MEETEI MAYEK VOWEL SIGN UU..MEETEI MAYEK VOWEL SIGN AAI
+ AAEE..AAEF    ; Other_Alphabetic # Mc   [2] MEETEI MAYEK VOWEL SIGN AU..MEETEI MAYEK VOWEL SIGN AAU
+ AAF5          ; Other_Alphabetic # Mc       MEETEI MAYEK VOWEL SIGN VISARGA
+ ABE3..ABE4    ; Other_Alphabetic # Mc   [2] MEETEI MAYEK VOWEL SIGN ONAP..MEETEI MAYEK VOWEL SIGN INAP
+ ABE5          ; Other_Alphabetic # Mn       MEETEI MAYEK VOWEL SIGN ANAP
+ ABE6..ABE7    ; Other_Alphabetic # Mc   [2] MEETEI MAYEK VOWEL SIGN YENAP..MEETEI MAYEK VOWEL SIGN SOUNAP
+ ABE8          ; Other_Alphabetic # Mn       MEETEI MAYEK VOWEL SIGN UNAP
+ ABE9..ABEA    ; Other_Alphabetic # Mc   [2] MEETEI MAYEK VOWEL SIGN CHEINAP..MEETEI MAYEK VOWEL SIGN NUNG
+ FB1E          ; Other_Alphabetic # Mn       HEBREW POINT JUDEO-SPANISH VARIKA
+ 10376..1037A  ; Other_Alphabetic # Mn   [5] COMBINING OLD PERMIC LETTER AN..COMBINING OLD PERMIC LETTER SII
+ 10A01..10A03  ; Other_Alphabetic # Mn   [3] KHAROSHTHI VOWEL SIGN I..KHAROSHTHI VOWEL SIGN VOCALIC R
+ 10A05..10A06  ; Other_Alphabetic # Mn   [2] KHAROSHTHI VOWEL SIGN E..KHAROSHTHI VOWEL SIGN O
+ 10A0C..10A0F  ; Other_Alphabetic # Mn   [4] KHAROSHTHI VOWEL LENGTH MARK..KHAROSHTHI SIGN VISARGA
+ 10D24..10D27  ; Other_Alphabetic # Mn   [4] HANIFI ROHINGYA SIGN HARBAHAY..HANIFI ROHINGYA SIGN TASSI
+ 11000         ; Other_Alphabetic # Mc       BRAHMI SIGN CANDRABINDU
+ 11001         ; Other_Alphabetic # Mn       BRAHMI SIGN ANUSVARA
+ 11002         ; Other_Alphabetic # Mc       BRAHMI SIGN VISARGA
+ 11038..11045  ; Other_Alphabetic # Mn  [14] BRAHMI VOWEL SIGN AA..BRAHMI VOWEL SIGN AU
+ 11082         ; Other_Alphabetic # Mc       KAITHI SIGN VISARGA
+ 110B0..110B2  ; Other_Alphabetic # Mc   [3] KAITHI VOWEL SIGN AA..KAITHI VOWEL SIGN II
+ 110B3..110B6  ; Other_Alphabetic # Mn   [4] KAITHI VOWEL SIGN U..KAITHI VOWEL SIGN AI
+ 110B7..110B8  ; Other_Alphabetic # Mc   [2] KAITHI VOWEL SIGN O..KAITHI VOWEL SIGN AU
+ 11100..11102  ; Other_Alphabetic # Mn   [3] CHAKMA SIGN CANDRABINDU..CHAKMA SIGN VISARGA
+ 11127..1112B  ; Other_Alphabetic # Mn   [5] CHAKMA VOWEL SIGN A..CHAKMA VOWEL SIGN UU
+ 1112C         ; Other_Alphabetic # Mc       CHAKMA VOWEL SIGN E
+ 1112D..11132  ; Other_Alphabetic # Mn   [6] CHAKMA VOWEL SIGN AI..CHAKMA AU MARK
+ 11145..11146  ; Other_Alphabetic # Mc   [2] CHAKMA VOWEL SIGN AA..CHAKMA VOWEL SIGN EI
+ 11180..11181  ; Other_Alphabetic # Mn   [2] SHARADA SIGN CANDRABINDU..SHARADA SIGN ANUSVARA
+ 11182         ; Other_Alphabetic # Mc       SHARADA SIGN VISARGA
+ 111B3..111B5  ; Other_Alphabetic # Mc   [3] SHARADA VOWEL SIGN AA..SHARADA VOWEL SIGN II
+ 111B6..111BE  ; Other_Alphabetic # Mn   [9] SHARADA VOWEL SIGN U..SHARADA VOWEL SIGN O
+ 111BF         ; Other_Alphabetic # Mc       SHARADA VOWEL SIGN AU
+ 1122C..1122E  ; Other_Alphabetic # Mc   [3] KHOJKI VOWEL SIGN AA..KHOJKI VOWEL SIGN II
+ 1122F..11231  ; Other_Alphabetic # Mn   [3] KHOJKI VOWEL SIGN U..KHOJKI VOWEL SIGN AI
+ 11232..11233  ; Other_Alphabetic # Mc   [2] KHOJKI VOWEL SIGN O..KHOJKI VOWEL SIGN AU
+ 11234         ; Other_Alphabetic # Mn       KHOJKI SIGN ANUSVARA
+ 11237         ; Other_Alphabetic # Mn       KHOJKI SIGN SHADDA
+ 1123E         ; Other_Alphabetic # Mn       KHOJKI SIGN SUKUN
+ 112DF         ; Other_Alphabetic # Mn       KHUDAWADI SIGN ANUSVARA
+ 112E0..112E2  ; Other_Alphabetic # Mc   [3] KHUDAWADI VOWEL SIGN AA..KHUDAWADI VOWEL SIGN II
+ 112E3..112E8  ; Other_Alphabetic # Mn   [6] KHUDAWADI VOWEL SIGN U..KHUDAWADI VOWEL SIGN AU
+ 11300..11301  ; Other_Alphabetic # Mn   [2] GRANTHA SIGN COMBINING ANUSVARA ABOVE..GRANTHA SIGN CANDRABINDU
+ 11302..11303  ; Other_Alphabetic # Mc   [2] GRANTHA SIGN ANUSVARA..GRANTHA SIGN VISARGA
+ 1133E..1133F  ; Other_Alphabetic # Mc   [2] GRANTHA VOWEL SIGN AA..GRANTHA VOWEL SIGN I
+ 11340         ; Other_Alphabetic # Mn       GRANTHA VOWEL SIGN II
+ 11341..11344  ; Other_Alphabetic # Mc   [4] GRANTHA VOWEL SIGN U..GRANTHA VOWEL SIGN VOCALIC RR
+ 11347..11348  ; Other_Alphabetic # Mc   [2] GRANTHA VOWEL SIGN EE..GRANTHA VOWEL SIGN AI
+ 1134B..1134C  ; Other_Alphabetic # Mc   [2] GRANTHA VOWEL SIGN OO..GRANTHA VOWEL SIGN AU
+ 11357         ; Other_Alphabetic # Mc       GRANTHA AU LENGTH MARK
+ 11362..11363  ; Other_Alphabetic # Mc   [2] GRANTHA VOWEL SIGN VOCALIC L..GRANTHA VOWEL SIGN VOCALIC LL
+ 11435..11437  ; Other_Alphabetic # Mc   [3] NEWA VOWEL SIGN AA..NEWA VOWEL SIGN II
+ 11438..1143F  ; Other_Alphabetic # Mn   [8] NEWA VOWEL SIGN U..NEWA VOWEL SIGN AI
+ 11440..11441  ; Other_Alphabetic # Mc   [2] NEWA VOWEL SIGN O..NEWA VOWEL SIGN AU
+ 11443..11444  ; Other_Alphabetic # Mn   [2] NEWA SIGN CANDRABINDU..NEWA SIGN ANUSVARA
+ 11445         ; Other_Alphabetic # Mc       NEWA SIGN VISARGA
+ 114B0..114B2  ; Other_Alphabetic # Mc   [3] TIRHUTA VOWEL SIGN AA..TIRHUTA VOWEL SIGN II
+ 114B3..114B8  ; Other_Alphabetic # Mn   [6] TIRHUTA VOWEL SIGN U..TIRHUTA VOWEL SIGN VOCALIC LL
+ 114B9         ; Other_Alphabetic # Mc       TIRHUTA VOWEL SIGN E
+ 114BA         ; Other_Alphabetic # Mn       TIRHUTA VOWEL SIGN SHORT E
+ 114BB..114BE  ; Other_Alphabetic # Mc   [4] TIRHUTA VOWEL SIGN AI..TIRHUTA VOWEL SIGN AU
+ 114BF..114C0  ; Other_Alphabetic # Mn   [2] TIRHUTA SIGN CANDRABINDU..TIRHUTA SIGN ANUSVARA
+ 114C1         ; Other_Alphabetic # Mc       TIRHUTA SIGN VISARGA
+ 115AF..115B1  ; Other_Alphabetic # Mc   [3] SIDDHAM VOWEL SIGN AA..SIDDHAM VOWEL SIGN II
+ 115B2..115B5  ; Other_Alphabetic # Mn   [4] SIDDHAM VOWEL SIGN U..SIDDHAM VOWEL SIGN VOCALIC RR
+ 115B8..115BB  ; Other_Alphabetic # Mc   [4] SIDDHAM VOWEL SIGN E..SIDDHAM VOWEL SIGN AU
+ 115BC..115BD  ; Other_Alphabetic # Mn   [2] SIDDHAM SIGN CANDRABINDU..SIDDHAM SIGN ANUSVARA
+ 115BE         ; Other_Alphabetic # Mc       SIDDHAM SIGN VISARGA
+ 115DC..115DD  ; Other_Alphabetic # Mn   [2] SIDDHAM VOWEL SIGN ALTERNATE U..SIDDHAM VOWEL SIGN ALTERNATE UU
+ 11630..11632  ; Other_Alphabetic # Mc   [3] MODI VOWEL SIGN AA..MODI VOWEL SIGN II
+ 11633..1163A  ; Other_Alphabetic # Mn   [8] MODI VOWEL SIGN U..MODI VOWEL SIGN AI
+ 1163B..1163C  ; Other_Alphabetic # Mc   [2] MODI VOWEL SIGN O..MODI VOWEL SIGN AU
+ 1163D         ; Other_Alphabetic # Mn       MODI SIGN ANUSVARA
+ 1163E         ; Other_Alphabetic # Mc       MODI SIGN VISARGA
+ 11640         ; Other_Alphabetic # Mn       MODI SIGN ARDHACANDRA
+ 116AB         ; Other_Alphabetic # Mn       TAKRI SIGN ANUSVARA
+ 116AC         ; Other_Alphabetic # Mc       TAKRI SIGN VISARGA
+ 116AD         ; Other_Alphabetic # Mn       TAKRI VOWEL SIGN AA
+ 116AE..116AF  ; Other_Alphabetic # Mc   [2] TAKRI VOWEL SIGN I..TAKRI VOWEL SIGN II
+ 116B0..116B5  ; Other_Alphabetic # Mn   [6] TAKRI VOWEL SIGN U..TAKRI VOWEL SIGN AU
+ 1171D..1171F  ; Other_Alphabetic # Mn   [3] AHOM CONSONANT SIGN MEDIAL LA..AHOM CONSONANT SIGN MEDIAL LIGATING RA
+ 11720..11721  ; Other_Alphabetic # Mc   [2] AHOM VOWEL SIGN A..AHOM VOWEL SIGN AA
+ 11722..11725  ; Other_Alphabetic # Mn   [4] AHOM VOWEL SIGN I..AHOM VOWEL SIGN UU
+ 11726         ; Other_Alphabetic # Mc       AHOM VOWEL SIGN E
+ 11727..1172A  ; Other_Alphabetic # Mn   [4] AHOM VOWEL SIGN AW..AHOM VOWEL SIGN AM
+ 1182C..1182E  ; Other_Alphabetic # Mc   [3] DOGRA VOWEL SIGN AA..DOGRA VOWEL SIGN II
+ 1182F..11837  ; Other_Alphabetic # Mn   [9] DOGRA VOWEL SIGN U..DOGRA SIGN ANUSVARA
+ 11838         ; Other_Alphabetic # Mc       DOGRA SIGN VISARGA
+ 119D1..119D3  ; Other_Alphabetic # Mc   [3] NANDINAGARI VOWEL SIGN AA..NANDINAGARI VOWEL SIGN II
+ 119D4..119D7  ; Other_Alphabetic # Mn   [4] NANDINAGARI VOWEL SIGN U..NANDINAGARI VOWEL SIGN VOCALIC RR
+ 119DA..119DB  ; Other_Alphabetic # Mn   [2] NANDINAGARI VOWEL SIGN E..NANDINAGARI VOWEL SIGN AI
+ 119DC..119DF  ; Other_Alphabetic # Mc   [4] NANDINAGARI VOWEL SIGN O..NANDINAGARI SIGN VISARGA
+ 119E4         ; Other_Alphabetic # Mc       NANDINAGARI VOWEL SIGN PRISHTHAMATRA E
+ 11A01..11A0A  ; Other_Alphabetic # Mn  [10] ZANABAZAR SQUARE VOWEL SIGN I..ZANABAZAR SQUARE VOWEL LENGTH MARK
+ 11A35..11A38  ; Other_Alphabetic # Mn   [4] ZANABAZAR SQUARE SIGN CANDRABINDU..ZANABAZAR SQUARE SIGN ANUSVARA
+ 11A39         ; Other_Alphabetic # Mc       ZANABAZAR SQUARE SIGN VISARGA
+ 11A3B..11A3E  ; Other_Alphabetic # Mn   [4] ZANABAZAR SQUARE CLUSTER-FINAL LETTER YA..ZANABAZAR SQUARE CLUSTER-FINAL LETTER VA
+ 11A51..11A56  ; Other_Alphabetic # Mn   [6] SOYOMBO VOWEL SIGN I..SOYOMBO VOWEL SIGN OE
+ 11A57..11A58  ; Other_Alphabetic # Mc   [2] SOYOMBO VOWEL SIGN AI..SOYOMBO VOWEL SIGN AU
+ 11A59..11A5B  ; Other_Alphabetic # Mn   [3] SOYOMBO VOWEL SIGN VOCALIC R..SOYOMBO VOWEL LENGTH MARK
+ 11A8A..11A96  ; Other_Alphabetic # Mn  [13] SOYOMBO FINAL CONSONANT SIGN G..SOYOMBO SIGN ANUSVARA
+ 11A97         ; Other_Alphabetic # Mc       SOYOMBO SIGN VISARGA
+ 11C2F         ; Other_Alphabetic # Mc       BHAIKSUKI VOWEL SIGN AA
+ 11C30..11C36  ; Other_Alphabetic # Mn   [7] BHAIKSUKI VOWEL SIGN I..BHAIKSUKI VOWEL SIGN VOCALIC L
+ 11C38..11C3D  ; Other_Alphabetic # Mn   [6] BHAIKSUKI VOWEL SIGN E..BHAIKSUKI SIGN ANUSVARA
+ 11C3E         ; Other_Alphabetic # Mc       BHAIKSUKI SIGN VISARGA
+ 11C92..11CA7  ; Other_Alphabetic # Mn  [22] MARCHEN SUBJOINED LETTER KA..MARCHEN SUBJOINED LETTER ZA
+ 11CA9         ; Other_Alphabetic # Mc       MARCHEN SUBJOINED LETTER YA
+ 11CAA..11CB0  ; Other_Alphabetic # Mn   [7] MARCHEN SUBJOINED LETTER RA..MARCHEN VOWEL SIGN AA
+ 11CB1         ; Other_Alphabetic # Mc       MARCHEN VOWEL SIGN I
+ 11CB2..11CB3  ; Other_Alphabetic # Mn   [2] MARCHEN VOWEL SIGN U..MARCHEN VOWEL SIGN E
+ 11CB4         ; Other_Alphabetic # Mc       MARCHEN VOWEL SIGN O
+ 11CB5..11CB6  ; Other_Alphabetic # Mn   [2] MARCHEN SIGN ANUSVARA..MARCHEN SIGN CANDRABINDU
+ 11D31..11D36  ; Other_Alphabetic # Mn   [6] MASARAM GONDI VOWEL SIGN AA..MASARAM GONDI VOWEL SIGN VOCALIC R
+ 11D3A         ; Other_Alphabetic # Mn       MASARAM GONDI VOWEL SIGN E
+ 11D3C..11D3D  ; Other_Alphabetic # Mn   [2] MASARAM GONDI VOWEL SIGN AI..MASARAM GONDI VOWEL SIGN O
+ 11D3F..11D41  ; Other_Alphabetic # Mn   [3] MASARAM GONDI VOWEL SIGN AU..MASARAM GONDI SIGN VISARGA
+ 11D43         ; Other_Alphabetic # Mn       MASARAM GONDI SIGN CANDRA
+ 11D47         ; Other_Alphabetic # Mn       MASARAM GONDI RA-KARA
+ 11D8A..11D8E  ; Other_Alphabetic # Mc   [5] GUNJALA GONDI VOWEL SIGN AA..GUNJALA GONDI VOWEL SIGN UU
+ 11D90..11D91  ; Other_Alphabetic # Mn   [2] GUNJALA GONDI VOWEL SIGN EE..GUNJALA GONDI VOWEL SIGN AI
+ 11D93..11D94  ; Other_Alphabetic # Mc   [2] GUNJALA GONDI VOWEL SIGN OO..GUNJALA GONDI VOWEL SIGN AU
+ 11D95         ; Other_Alphabetic # Mn       GUNJALA GONDI SIGN ANUSVARA
+ 11D96         ; Other_Alphabetic # Mc       GUNJALA GONDI SIGN VISARGA
+ 11EF3..11EF4  ; Other_Alphabetic # Mn   [2] MAKASAR VOWEL SIGN I..MAKASAR VOWEL SIGN U
+ 11EF5..11EF6  ; Other_Alphabetic # Mc   [2] MAKASAR VOWEL SIGN E..MAKASAR VOWEL SIGN O
+ 16F4F         ; Other_Alphabetic # Mn       MIAO SIGN CONSONANT MODIFIER BAR
+ 16F51..16F87  ; Other_Alphabetic # Mc  [55] MIAO SIGN ASPIRATION..MIAO VOWEL SIGN UI
+ 16F8F..16F92  ; Other_Alphabetic # Mn   [4] MIAO TONE RIGHT..MIAO TONE BELOW
+ 1BC9E         ; Other_Alphabetic # Mn       DUPLOYAN DOUBLE MARK
+ 1E000..1E006  ; Other_Alphabetic # Mn   [7] COMBINING GLAGOLITIC LETTER AZU..COMBINING GLAGOLITIC LETTER ZHIVETE
+ 1E008..1E018  ; Other_Alphabetic # Mn  [17] COMBINING GLAGOLITIC LETTER ZEMLJA..COMBINING GLAGOLITIC LETTER HERU
+ 1E01B..1E021  ; Other_Alphabetic # Mn   [7] COMBINING GLAGOLITIC LETTER SHTA..COMBINING GLAGOLITIC LETTER YATI
+ 1E023..1E024  ; Other_Alphabetic # Mn   [2] COMBINING GLAGOLITIC LETTER YU..COMBINING GLAGOLITIC LETTER SMALL YUS
+ 1E026..1E02A  ; Other_Alphabetic # Mn   [5] COMBINING GLAGOLITIC LETTER YO..COMBINING GLAGOLITIC LETTER FITA
+ 1E947         ; Other_Alphabetic # Mn       ADLAM HAMZA
+ 1F130..1F149  ; Other_Alphabetic # So  [26] SQUARED LATIN CAPITAL LETTER A..SQUARED LATIN CAPITAL LETTER Z
+ 1F150..1F169  ; Other_Alphabetic # So  [26] NEGATIVE CIRCLED LATIN CAPITAL LETTER A..NEGATIVE CIRCLED LATIN CAPITAL LETTER Z
+ 1F170..1F189  ; Other_Alphabetic # So  [26] NEGATIVE SQUARED LATIN CAPITAL LETTER A..NEGATIVE SQUARED LATIN CAPITAL LETTER Z
+ 
+ # Total code points: 1377
+ 
+ # ================================================
+ 
+ 3006          ; Ideographic # Lo       IDEOGRAPHIC CLOSING MARK
+ 3007          ; Ideographic # Nl       IDEOGRAPHIC NUMBER ZERO
+ 3021..3029    ; Ideographic # Nl   [9] HANGZHOU NUMERAL ONE..HANGZHOU NUMERAL NINE
+ 3038..303A    ; Ideographic # Nl   [3] HANGZHOU NUMERAL TEN..HANGZHOU NUMERAL THIRTY
+ 3400..4DB5    ; Ideographic # Lo [6582] CJK UNIFIED IDEOGRAPH-3400..CJK UNIFIED IDEOGRAPH-4DB5
+ 4E00..9FEF    ; Ideographic # Lo [20976] CJK UNIFIED IDEOGRAPH-4E00..CJK UNIFIED IDEOGRAPH-9FEF
+ F900..FA6D    ; Ideographic # Lo [366] CJK COMPATIBILITY IDEOGRAPH-F900..CJK COMPATIBILITY IDEOGRAPH-FA6D
+ FA70..FAD9    ; Ideographic # Lo [106] CJK COMPATIBILITY IDEOGRAPH-FA70..CJK COMPATIBILITY IDEOGRAPH-FAD9
+ 17000..187F7  ; Ideographic # Lo [6136] TANGUT IDEOGRAPH-17000..TANGUT IDEOGRAPH-187F7
+ 18800..18AF2  ; Ideographic # Lo [755] TANGUT COMPONENT-001..TANGUT COMPONENT-755
+ 1B170..1B2FB  ; Ideographic # Lo [396] NUSHU CHARACTER-1B170..NUSHU CHARACTER-1B2FB
+ 20000..2A6D6  ; Ideographic # Lo [42711] CJK UNIFIED IDEOGRAPH-20000..CJK UNIFIED IDEOGRAPH-2A6D6
+ 2A700..2B734  ; Ideographic # Lo [4149] CJK UNIFIED IDEOGRAPH-2A700..CJK UNIFIED IDEOGRAPH-2B734
+ 2B740..2B81D  ; Ideographic # Lo [222] CJK UNIFIED IDEOGRAPH-2B740..CJK UNIFIED IDEOGRAPH-2B81D
+ 2B820..2CEA1  ; Ideographic # Lo [5762] CJK UNIFIED IDEOGRAPH-2B820..CJK UNIFIED IDEOGRAPH-2CEA1
+ 2CEB0..2EBE0  ; Ideographic # Lo [7473] CJK UNIFIED IDEOGRAPH-2CEB0..CJK UNIFIED IDEOGRAPH-2EBE0
+ 2F800..2FA1D  ; Ideographic # Lo [542] CJK COMPATIBILITY IDEOGRAPH-2F800..CJK COMPATIBILITY IDEOGRAPH-2FA1D
+ 
+ # Total code points: 96190
+ 
+ # ================================================
+ 
+ 005E          ; Diacritic # Sk       CIRCUMFLEX ACCENT
+ 0060          ; Diacritic # Sk       GRAVE ACCENT
+ 00A8          ; Diacritic # Sk       DIAERESIS
+ 00AF          ; Diacritic # Sk       MACRON
+ 00B4          ; Diacritic # Sk       ACUTE ACCENT
+ 00B7          ; Diacritic # Po       MIDDLE DOT
+ 00B8          ; Diacritic # Sk       CEDILLA
+ 02B0..02C1    ; Diacritic # Lm  [18] MODIFIER LETTER SMALL H..MODIFIER LETTER REVERSED GLOTTAL STOP
+ 02C2..02C5    ; Diacritic # Sk   [4] MODIFIER LETTER LEFT ARROWHEAD..MODIFIER LETTER DOWN ARROWHEAD
+ 02C6..02D1    ; Diacritic # Lm  [12] MODIFIER LETTER CIRCUMFLEX ACCENT..MODIFIER LETTER HALF TRIANGULAR COLON
+ 02D2..02DF    ; Diacritic # Sk  [14] MODIFIER LETTER CENTRED RIGHT HALF RING..MODIFIER LETTER CROSS ACCENT
+ 02E0..02E4    ; Diacritic # Lm   [5] MODIFIER LETTER SMALL GAMMA..MODIFIER LETTER SMALL REVERSED GLOTTAL STOP
+ 02E5..02EB    ; Diacritic # Sk   [7] MODIFIER LETTER EXTRA-HIGH TONE BAR..MODIFIER LETTER YANG DEPARTING TONE MARK
+ 02EC          ; Diacritic # Lm       MODIFIER LETTER VOICING
+ 02ED          ; Diacritic # Sk       MODIFIER LETTER UNASPIRATED
+ 02EE          ; Diacritic # Lm       MODIFIER LETTER DOUBLE APOSTROPHE
+ 02EF..02FF    ; Diacritic # Sk  [17] MODIFIER LETTER LOW DOWN ARROWHEAD..MODIFIER LETTER LOW LEFT ARROW
+ 0300..034E    ; Diacritic # Mn  [79] COMBINING GRAVE ACCENT..COMBINING UPWARDS ARROW BELOW
+ 0350..0357    ; Diacritic # Mn   [8] COMBINING RIGHT ARROWHEAD ABOVE..COMBINING RIGHT HALF RING ABOVE
+ 035D..0362    ; Diacritic # Mn   [6] COMBINING DOUBLE BREVE..COMBINING DOUBLE RIGHTWARDS ARROW BELOW
+ 0374          ; Diacritic # Lm       GREEK NUMERAL SIGN
+ 0375          ; Diacritic # Sk       GREEK LOWER NUMERAL SIGN
+ 037A          ; Diacritic # Lm       GREEK YPOGEGRAMMENI
+ 0384..0385    ; Diacritic # Sk   [2] GREEK TONOS..GREEK DIALYTIKA TONOS
+ 0483..0487    ; Diacritic # Mn   [5] COMBINING CYRILLIC TITLO..COMBINING CYRILLIC POKRYTIE
+ 0559          ; Diacritic # Lm       ARMENIAN MODIFIER LETTER LEFT HALF RING
+ 0591..05A1    ; Diacritic # Mn  [17] HEBREW ACCENT ETNAHTA..HEBREW ACCENT PAZER
+ 05A3..05BD    ; Diacritic # Mn  [27] HEBREW ACCENT MUNAH..HEBREW POINT METEG
+ 05BF          ; Diacritic # Mn       HEBREW POINT RAFE
+ 05C1..05C2    ; Diacritic # Mn   [2] HEBREW POINT SHIN DOT..HEBREW POINT SIN DOT
+ 05C4          ; Diacritic # Mn       HEBREW MARK UPPER DOT
+ 064B..0652    ; Diacritic # Mn   [8] ARABIC FATHATAN..ARABIC SUKUN
+ 0657..0658    ; Diacritic # Mn   [2] ARABIC INVERTED DAMMA..ARABIC MARK NOON GHUNNA
+ 06DF..06E0    ; Diacritic # Mn   [2] ARABIC SMALL HIGH ROUNDED ZERO..ARABIC SMALL HIGH UPRIGHT RECTANGULAR ZERO
+ 06E5..06E6    ; Diacritic # Lm   [2] ARABIC SMALL WAW..ARABIC SMALL YEH
+ 06EA..06EC    ; Diacritic # Mn   [3] ARABIC EMPTY CENTRE LOW STOP..ARABIC ROUNDED HIGH STOP WITH FILLED CENTRE
+ 0730..074A    ; Diacritic # Mn  [27] SYRIAC PTHAHA ABOVE..SYRIAC BARREKH
+ 07A6..07B0    ; Diacritic # Mn  [11] THAANA ABAFILI..THAANA SUKUN
+ 07EB..07F3    ; Diacritic # Mn   [9] NKO COMBINING SHORT HIGH TONE..NKO COMBINING DOUBLE DOT ABOVE
+ 07F4..07F5    ; Diacritic # Lm   [2] NKO HIGH TONE APOSTROPHE..NKO LOW TONE APOSTROPHE
+ 0818..0819    ; Diacritic # Mn   [2] SAMARITAN MARK OCCLUSION..SAMARITAN MARK DAGESH
+ 08E3..08FE    ; Diacritic # Mn  [28] ARABIC TURNED DAMMA BELOW..ARABIC DAMMA WITH DOT
+ 093C          ; Diacritic # Mn       DEVANAGARI SIGN NUKTA
+ 094D          ; Diacritic # Mn       DEVANAGARI SIGN VIRAMA
+ 0951..0954    ; Diacritic # Mn   [4] DEVANAGARI STRESS SIGN UDATTA..DEVANAGARI ACUTE ACCENT
+ 0971          ; Diacritic # Lm       DEVANAGARI SIGN HIGH SPACING DOT
+ 09BC          ; Diacritic # Mn       BENGALI SIGN NUKTA
+ 09CD          ; Diacritic # Mn       BENGALI SIGN VIRAMA
+ 0A3C          ; Diacritic # Mn       GURMUKHI SIGN NUKTA
+ 0A4D          ; Diacritic # Mn       GURMUKHI SIGN VIRAMA
+ 0ABC          ; Diacritic # Mn       GUJARATI SIGN NUKTA
+ 0ACD          ; Diacritic # Mn       GUJARATI SIGN VIRAMA
+ 0AFD..0AFF    ; Diacritic # Mn   [3] GUJARATI SIGN THREE-DOT NUKTA ABOVE..GUJARATI SIGN TWO-CIRCLE NUKTA ABOVE
+ 0B3C          ; Diacritic # Mn       ORIYA SIGN NUKTA
+ 0B4D          ; Diacritic # Mn       ORIYA SIGN VIRAMA
+ 0BCD          ; Diacritic # Mn       TAMIL SIGN VIRAMA
+ 0C4D          ; Diacritic # Mn       TELUGU SIGN VIRAMA
+ 0CBC          ; Diacritic # Mn       KANNADA SIGN NUKTA
+ 0CCD          ; Diacritic # Mn       KANNADA SIGN VIRAMA
+ 0D3B..0D3C    ; Diacritic # Mn   [2] MALAYALAM SIGN VERTICAL BAR VIRAMA..MALAYALAM SIGN CIRCULAR VIRAMA
+ 0D4D          ; Diacritic # Mn       MALAYALAM SIGN VIRAMA
+ 0DCA          ; Diacritic # Mn       SINHALA SIGN AL-LAKUNA
+ 0E47..0E4C    ; Diacritic # Mn   [6] THAI CHARACTER MAITAIKHU..THAI CHARACTER THANTHAKHAT
+ 0E4E          ; Diacritic # Mn       THAI CHARACTER YAMAKKAN
+ 0EBA          ; Diacritic # Mn       LAO SIGN PALI VIRAMA
+ 0EC8..0ECC    ; Diacritic # Mn   [5] LAO TONE MAI EK..LAO CANCELLATION MARK
+ 0F18..0F19    ; Diacritic # Mn   [2] TIBETAN ASTROLOGICAL SIGN -KHYUD PA..TIBETAN ASTROLOGICAL SIGN SDONG TSHUGS
+ 0F35          ; Diacritic # Mn       TIBETAN MARK NGAS BZUNG NYI ZLA
+ 0F37          ; Diacritic # Mn       TIBETAN MARK NGAS BZUNG SGOR RTAGS
+ 0F39          ; Diacritic # Mn       TIBETAN MARK TSA -PHRU
+ 0F3E..0F3F    ; Diacritic # Mc   [2] TIBETAN SIGN YAR TSHES..TIBETAN SIGN MAR TSHES
+ 0F82..0F84    ; Diacritic # Mn   [3] TIBETAN SIGN NYI ZLA NAA DA..TIBETAN MARK HALANTA
+ 0F86..0F87    ; Diacritic # Mn   [2] TIBETAN SIGN LCI RTAGS..TIBETAN SIGN YANG RTAGS
+ 0FC6          ; Diacritic # Mn       TIBETAN SYMBOL PADMA GDAN
+ 1037          ; Diacritic # Mn       MYANMAR SIGN DOT BELOW
+ 1039..103A    ; Diacritic # Mn   [2] MYANMAR SIGN VIRAMA..MYANMAR SIGN ASAT
+ 1063..1064    ; Diacritic # Mc   [2] MYANMAR TONE MARK SGAW KAREN HATHI..MYANMAR TONE MARK SGAW KAREN KE PHO
+ 1069..106D    ; Diacritic # Mc   [5] MYANMAR SIGN WESTERN PWO KAREN TONE-1..MYANMAR SIGN WESTERN PWO KAREN TONE-5
+ 1087..108C    ; Diacritic # Mc   [6] MYANMAR SIGN SHAN TONE-2..MYANMAR SIGN SHAN COUNCIL TONE-3
+ 108D          ; Diacritic # Mn       MYANMAR SIGN SHAN COUNCIL EMPHATIC TONE
+ 108F          ; Diacritic # Mc       MYANMAR SIGN RUMAI PALAUNG TONE-5
+ 109A..109B    ; Diacritic # Mc   [2] MYANMAR SIGN KHAMTI TONE-1..MYANMAR SIGN KHAMTI TONE-3
+ 135D..135F    ; Diacritic # Mn   [3] ETHIOPIC COMBINING GEMINATION AND VOWEL LENGTH MARK..ETHIOPIC COMBINING GEMINATION MARK
+ 17C9..17D3    ; Diacritic # Mn  [11] KHMER SIGN MUUSIKATOAN..KHMER SIGN BATHAMASAT
+ 17DD          ; Diacritic # Mn       KHMER SIGN ATTHACAN
+ 1939..193B    ; Diacritic # Mn   [3] LIMBU SIGN MUKPHRENG..LIMBU SIGN SA-I
+ 1A75..1A7C    ; Diacritic # Mn   [8] TAI THAM SIGN TONE-1..TAI THAM SIGN KHUEN-LUE KARAN
+ 1A7F          ; Diacritic # Mn       TAI THAM COMBINING CRYPTOGRAMMIC DOT
+ 1AB0..1ABD    ; Diacritic # Mn  [14] COMBINING DOUBLED CIRCUMFLEX ACCENT..COMBINING PARENTHESES BELOW
+ 1B34          ; Diacritic # Mn       BALINESE SIGN REREKAN
+ 1B44          ; Diacritic # Mc       BALINESE ADEG ADEG
+ 1B6B..1B73    ; Diacritic # Mn   [9] BALINESE MUSICAL SYMBOL COMBINING TEGEH..BALINESE MUSICAL SYMBOL COMBINING GONG
+ 1BAA          ; Diacritic # Mc       SUNDANESE SIGN PAMAAEH
+ 1BAB          ; Diacritic # Mn       SUNDANESE SIGN VIRAMA
+ 1C36..1C37    ; Diacritic # Mn   [2] LEPCHA SIGN RAN..LEPCHA SIGN NUKTA
+ 1C78..1C7D    ; Diacritic # Lm   [6] OL CHIKI MU TTUDDAG..OL CHIKI AHAD
+ 1CD0..1CD2    ; Diacritic # Mn   [3] VEDIC TONE KARSHANA..VEDIC TONE PRENKHA
+ 1CD3          ; Diacritic # Po       VEDIC SIGN NIHSHVASA
+ 1CD4..1CE0    ; Diacritic # Mn  [13] VEDIC SIGN YAJURVEDIC MIDLINE SVARITA..VEDIC TONE RIGVEDIC KASHMIRI INDEPENDENT SVARITA
+ 1CE1          ; Diacritic # Mc       VEDIC TONE ATHARVAVEDIC INDEPENDENT SVARITA
+ 1CE2..1CE8    ; Diacritic # Mn   [7] VEDIC SIGN VISARGA SVARITA..VEDIC SIGN VISARGA ANUDATTA WITH TAIL
+ 1CED          ; Diacritic # Mn       VEDIC SIGN TIRYAK
+ 1CF4          ; Diacritic # Mn       VEDIC TONE CANDRA ABOVE
+ 1CF7          ; Diacritic # Mc       VEDIC SIGN ATIKRAMA
+ 1CF8..1CF9    ; Diacritic # Mn   [2] VEDIC TONE RING ABOVE..VEDIC TONE DOUBLE RING ABOVE
+ 1D2C..1D6A    ; Diacritic # Lm  [63] MODIFIER LETTER CAPITAL A..GREEK SUBSCRIPT SMALL LETTER CHI
+ 1DC4..1DCF    ; Diacritic # Mn  [12] COMBINING MACRON-ACUTE..COMBINING ZIGZAG BELOW
+ 1DF5..1DF9    ; Diacritic # Mn   [5] COMBINING UP TACK ABOVE..COMBINING WIDE INVERTED BRIDGE BELOW
+ 1DFD..1DFF    ; Diacritic # Mn   [3] COMBINING ALMOST EQUAL TO BELOW..COMBINING RIGHT ARROWHEAD AND DOWN ARROWHEAD BELOW
+ 1FBD          ; Diacritic # Sk       GREEK KORONIS
+ 1FBF..1FC1    ; Diacritic # Sk   [3] GREEK PSILI..GREEK DIALYTIKA AND PERISPOMENI
+ 1FCD..1FCF    ; Diacritic # Sk   [3] GREEK PSILI AND VARIA..GREEK PSILI AND PERISPOMENI
+ 1FDD..1FDF    ; Diacritic # Sk   [3] GREEK DASIA AND VARIA..GREEK DASIA AND PERISPOMENI
+ 1FED..1FEF    ; Diacritic # Sk   [3] GREEK DIALYTIKA AND VARIA..GREEK VARIA
+ 1FFD..1FFE    ; Diacritic # Sk   [2] GREEK OXIA..GREEK DASIA
+ 2CEF..2CF1    ; Diacritic # Mn   [3] COPTIC COMBINING NI ABOVE..COPTIC COMBINING SPIRITUS LENIS
+ 2E2F          ; Diacritic # Lm       VERTICAL TILDE
+ 302A..302D    ; Diacritic # Mn   [4] IDEOGRAPHIC LEVEL TONE MARK..IDEOGRAPHIC ENTERING TONE MARK
+ 302E..302F    ; Diacritic # Mc   [2] HANGUL SINGLE DOT TONE MARK..HANGUL DOUBLE DOT TONE MARK
+ 3099..309A    ; Diacritic # Mn   [2] COMBINING KATAKANA-HIRAGANA VOICED SOUND MARK..COMBINING KATAKANA-HIRAGANA SEMI-VOICED SOUND MARK
+ 309B..309C    ; Diacritic # Sk   [2] KATAKANA-HIRAGANA VOICED SOUND MARK..KATAKANA-HIRAGANA SEMI-VOICED SOUND MARK
+ 30FC          ; Diacritic # Lm       KATAKANA-HIRAGANA PROLONGED SOUND MARK
+ A66F          ; Diacritic # Mn       COMBINING CYRILLIC VZMET
+ A67C..A67D    ; Diacritic # Mn   [2] COMBINING CYRILLIC KAVYKA..COMBINING CYRILLIC PAYEROK
+ A67F          ; Diacritic # Lm       CYRILLIC PAYEROK
+ A69C..A69D    ; Diacritic # Lm   [2] MODIFIER LETTER CYRILLIC HARD SIGN..MODIFIER LETTER CYRILLIC SOFT SIGN
+ A6F0..A6F1    ; Diacritic # Mn   [2] BAMUM COMBINING MARK KOQNDON..BAMUM COMBINING MARK TUKWENTIS
+ A700..A716    ; Diacritic # Sk  [23] MODIFIER LETTER CHINESE TONE YIN PING..MODIFIER LETTER EXTRA-LOW LEFT-STEM TONE BAR
+ A717..A71F    ; Diacritic # Lm   [9] MODIFIER LETTER DOT VERTICAL BAR..MODIFIER LETTER LOW INVERTED EXCLAMATION MARK
+ A720..A721    ; Diacritic # Sk   [2] MODIFIER LETTER STRESS AND HIGH TONE..MODIFIER LETTER STRESS AND LOW TONE
+ A788          ; Diacritic # Lm       MODIFIER LETTER LOW CIRCUMFLEX ACCENT
+ A789..A78A    ; Diacritic # Sk   [2] MODIFIER LETTER COLON..MODIFIER LETTER SHORT EQUALS SIGN
+ A7F8..A7F9    ; Diacritic # Lm   [2] MODIFIER LETTER CAPITAL H WITH STROKE..MODIFIER LETTER SMALL LIGATURE OE
+ A8C4          ; Diacritic # Mn       SAURASHTRA SIGN VIRAMA
+ A8E0..A8F1    ; Diacritic # Mn  [18] COMBINING DEVANAGARI DIGIT ZERO..COMBINING DEVANAGARI SIGN AVAGRAHA
+ A92B..A92D    ; Diacritic # Mn   [3] KAYAH LI TONE PLOPHU..KAYAH LI TONE CALYA PLOPHU
+ A92E          ; Diacritic # Po       KAYAH LI SIGN CWI
+ A953          ; Diacritic # Mc       REJANG VIRAMA
+ A9B3          ; Diacritic # Mn       JAVANESE SIGN CECAK TELU
+ A9C0          ; Diacritic # Mc       JAVANESE PANGKON
+ A9E5          ; Diacritic # Mn       MYANMAR SIGN SHAN SAW
+ AA7B          ; Diacritic # Mc       MYANMAR SIGN PAO KAREN TONE
+ AA7C          ; Diacritic # Mn       MYANMAR SIGN TAI LAING TONE-2
+ AA7D          ; Diacritic # Mc       MYANMAR SIGN TAI LAING TONE-5
+ AABF          ; Diacritic # Mn       TAI VIET TONE MAI EK
+ AAC0          ; Diacritic # Lo       TAI VIET TONE MAI NUENG
+ AAC1          ; Diacritic # Mn       TAI VIET TONE MAI THO
+ AAC2          ; Diacritic # Lo       TAI VIET TONE MAI SONG
+ AAF6          ; Diacritic # Mn       MEETEI MAYEK VIRAMA
+ AB5B          ; Diacritic # Sk       MODIFIER BREVE WITH INVERTED BREVE
+ AB5C..AB5F    ; Diacritic # Lm   [4] MODIFIER LETTER SMALL HENG..MODIFIER LETTER SMALL U WITH LEFT HOOK
+ ABEC          ; Diacritic # Mc       MEETEI MAYEK LUM IYEK
+ ABED          ; Diacritic # Mn       MEETEI MAYEK APUN IYEK
+ FB1E          ; Diacritic # Mn       HEBREW POINT JUDEO-SPANISH VARIKA
+ FE20..FE2F    ; Diacritic # Mn  [16] COMBINING LIGATURE LEFT HALF..COMBINING CYRILLIC TITLO RIGHT HALF
+ FF3E          ; Diacritic # Sk       FULLWIDTH CIRCUMFLEX ACCENT
+ FF40          ; Diacritic # Sk       FULLWIDTH GRAVE ACCENT
+ FF70          ; Diacritic # Lm       HALFWIDTH KATAKANA-HIRAGANA PROLONGED SOUND MARK
+ FF9E..FF9F    ; Diacritic # Lm   [2] HALFWIDTH KATAKANA VOICED SOUND MARK..HALFWIDTH KATAKANA SEMI-VOICED SOUND MARK
+ FFE3          ; Diacritic # Sk       FULLWIDTH MACRON
+ 102E0         ; Diacritic # Mn       COPTIC EPACT THOUSANDS MARK
+ 10AE5..10AE6  ; Diacritic # Mn   [2] MANICHAEAN ABBREVIATION MARK ABOVE..MANICHAEAN ABBREVIATION MARK BELOW
+ 10D22..10D23  ; Diacritic # Lo   [2] HANIFI ROHINGYA MARK SAKIN..HANIFI ROHINGYA MARK NA KHONNA
+ 10D24..10D27  ; Diacritic # Mn   [4] HANIFI ROHINGYA SIGN HARBAHAY..HANIFI ROHINGYA SIGN TASSI
+ 10F46..10F50  ; Diacritic # Mn  [11] SOGDIAN COMBINING DOT BELOW..SOGDIAN COMBINING STROKE BELOW
+ 110B9..110BA  ; Diacritic # Mn   [2] KAITHI SIGN VIRAMA..KAITHI SIGN NUKTA
+ 11133..11134  ; Diacritic # Mn   [2] CHAKMA VIRAMA..CHAKMA MAAYYAA
+ 11173         ; Diacritic # Mn       MAHAJANI SIGN NUKTA
+ 111C0         ; Diacritic # Mc       SHARADA SIGN VIRAMA
+ 111CA..111CC  ; Diacritic # Mn   [3] SHARADA SIGN NUKTA..SHARADA EXTRA SHORT VOWEL MARK
+ 11235         ; Diacritic # Mc       KHOJKI SIGN VIRAMA
+ 11236         ; Diacritic # Mn       KHOJKI SIGN NUKTA
+ 112E9..112EA  ; Diacritic # Mn   [2] KHUDAWADI SIGN NUKTA..KHUDAWADI SIGN VIRAMA
+ 1133C         ; Diacritic # Mn       GRANTHA SIGN NUKTA
+ 1134D         ; Diacritic # Mc       GRANTHA SIGN VIRAMA
+ 11366..1136C  ; Diacritic # Mn   [7] COMBINING GRANTHA DIGIT ZERO..COMBINING GRANTHA DIGIT SIX
+ 11370..11374  ; Diacritic # Mn   [5] COMBINING GRANTHA LETTER A..COMBINING GRANTHA LETTER PA
+ 11442         ; Diacritic # Mn       NEWA SIGN VIRAMA
+ 11446         ; Diacritic # Mn       NEWA SIGN NUKTA
+ 114C2..114C3  ; Diacritic # Mn   [2] TIRHUTA SIGN VIRAMA..TIRHUTA SIGN NUKTA
+ 115BF..115C0  ; Diacritic # Mn   [2] SIDDHAM SIGN VIRAMA..SIDDHAM SIGN NUKTA
+ 1163F         ; Diacritic # Mn       MODI SIGN VIRAMA
+ 116B6         ; Diacritic # Mc       TAKRI SIGN VIRAMA
+ 116B7         ; Diacritic # Mn       TAKRI SIGN NUKTA
+ 1172B         ; Diacritic # Mn       AHOM SIGN KILLER
+ 11839..1183A  ; Diacritic # Mn   [2] DOGRA SIGN VIRAMA..DOGRA SIGN NUKTA
+ 119E0         ; Diacritic # Mn       NANDINAGARI SIGN VIRAMA
+ 11A34         ; Diacritic # Mn       ZANABAZAR SQUARE SIGN VIRAMA
+ 11A47         ; Diacritic # Mn       ZANABAZAR SQUARE SUBJOINER
+ 11A99         ; Diacritic # Mn       SOYOMBO SUBJOINER
+ 11C3F         ; Diacritic # Mn       BHAIKSUKI SIGN VIRAMA
+ 11D42         ; Diacritic # Mn       MASARAM GONDI SIGN NUKTA
+ 11D44..11D45  ; Diacritic # Mn   [2] MASARAM GONDI SIGN HALANTA..MASARAM GONDI VIRAMA
+ 11D97         ; Diacritic # Mn       GUNJALA GONDI VIRAMA
+ 16AF0..16AF4  ; Diacritic # Mn   [5] BASSA VAH COMBINING HIGH TONE..BASSA VAH COMBINING HIGH-LOW TONE
+ 16B30..16B36  ; Diacritic # Mn   [7] PAHAWH HMONG MARK CIM TUB..PAHAWH HMONG MARK CIM TAUM
+ 16F8F..16F92  ; Diacritic # Mn   [4] MIAO TONE RIGHT..MIAO TONE BELOW
+ 16F93..16F9F  ; Diacritic # Lm  [13] MIAO LETTER TONE-2..MIAO LETTER REFORMED TONE-8
+ 1D167..1D169  ; Diacritic # Mn   [3] MUSICAL SYMBOL COMBINING TREMOLO-1..MUSICAL SYMBOL COMBINING TREMOLO-3
+ 1D16D..1D172  ; Diacritic # Mc   [6] MUSICAL SYMBOL COMBINING AUGMENTATION DOT..MUSICAL SYMBOL COMBINING FLAG-5
+ 1D17B..1D182  ; Diacritic # Mn   [8] MUSICAL SYMBOL COMBINING ACCENT..MUSICAL SYMBOL COMBINING LOURE
+ 1D185..1D18B  ; Diacritic # Mn   [7] MUSICAL SYMBOL COMBINING DOIT..MUSICAL SYMBOL COMBINING TRIPLE TONGUE
+ 1D1AA..1D1AD  ; Diacritic # Mn   [4] MUSICAL SYMBOL COMBINING DOWN BOW..MUSICAL SYMBOL COMBINING SNAP PIZZICATO
+ 1E130..1E136  ; Diacritic # Mn   [7] NYIAKENG PUACHUE HMONG TONE-B..NYIAKENG PUACHUE HMONG TONE-D
+ 1E2EC..1E2EF  ; Diacritic # Mn   [4] WANCHO TONE TUP..WANCHO TONE KOINI
+ 1E8D0..1E8D6  ; Diacritic # Mn   [7] MENDE KIKAKUI COMBINING NUMBER TEENS..MENDE KIKAKUI COMBINING NUMBER MILLIONS
+ 1E944..1E946  ; Diacritic # Mn   [3] ADLAM ALIF LENGTHENER..ADLAM GEMINATION MARK
+ 1E948..1E94A  ; Diacritic # Mn   [3] ADLAM CONSONANT MODIFIER..ADLAM NUKTA
+ 
+ # Total code points: 873
+ 
+ # ================================================
+ 
+ 00B7          ; Extender # Po       MIDDLE DOT
+ 02D0..02D1    ; Extender # Lm   [2] MODIFIER LETTER TRIANGULAR COLON..MODIFIER LETTER HALF TRIANGULAR COLON
+ 0640          ; Extender # Lm       ARABIC TATWEEL
+ 07FA          ; Extender # Lm       NKO LAJANYALAN
+ 0E46          ; Extender # Lm       THAI CHARACTER MAIYAMOK
+ 0EC6          ; Extender # Lm       LAO KO LA
+ 180A          ; Extender # Po       MONGOLIAN NIRUGU
+ 1843          ; Extender # Lm       MONGOLIAN LETTER TODO LONG VOWEL SIGN
+ 1AA7          ; Extender # Lm       TAI THAM SIGN MAI YAMOK
+ 1C36          ; Extender # Mn       LEPCHA SIGN RAN
+ 1C7B          ; Extender # Lm       OL CHIKI RELAA
+ 3005          ; Extender # Lm       IDEOGRAPHIC ITERATION MARK
+ 3031..3035    ; Extender # Lm   [5] VERTICAL KANA REPEAT MARK..VERTICAL KANA REPEAT MARK LOWER HALF
+ 309D..309E    ; Extender # Lm   [2] HIRAGANA ITERATION MARK..HIRAGANA VOICED ITERATION MARK
+ 30FC..30FE    ; Extender # Lm   [3] KATAKANA-HIRAGANA PROLONGED SOUND MARK..KATAKANA VOICED ITERATION MARK
+ A015          ; Extender # Lm       YI SYLLABLE WU
+ A60C          ; Extender # Lm       VAI SYLLABLE LENGTHENER
+ A9CF          ; Extender # Lm       JAVANESE PANGRANGKEP
+ A9E6          ; Extender # Lm       MYANMAR MODIFIER LETTER SHAN REDUPLICATION
+ AA70          ; Extender # Lm       MYANMAR MODIFIER LETTER KHAMTI REDUPLICATION
+ AADD          ; Extender # Lm       TAI VIET SYMBOL SAM
+ AAF3..AAF4    ; Extender # Lm   [2] MEETEI MAYEK SYLLABLE REPETITION MARK..MEETEI MAYEK WORD REPETITION MARK
+ FF70          ; Extender # Lm       HALFWIDTH KATAKANA-HIRAGANA PROLONGED SOUND MARK
+ 1135D         ; Extender # Lo       GRANTHA SIGN PLUTA
+ 115C6..115C8  ; Extender # Po   [3] SIDDHAM REPETITION MARK-1..SIDDHAM REPETITION MARK-3
+ 11A98         ; Extender # Mn       SOYOMBO GEMINATION MARK
+ 16B42..16B43  ; Extender # Lm   [2] PAHAWH HMONG SIGN VOS NRUA..PAHAWH HMONG SIGN IB YAM
+ 16FE0..16FE1  ; Extender # Lm   [2] TANGUT ITERATION MARK..NUSHU ITERATION MARK
+ 16FE3         ; Extender # Lm       OLD CHINESE ITERATION MARK
+ 1E13C..1E13D  ; Extender # Lm   [2] NYIAKENG PUACHUE HMONG SIGN XW XW..NYIAKENG PUACHUE HMONG SYLLABLE LENGTHENER
+ 1E944..1E946  ; Extender # Mn   [3] ADLAM ALIF LENGTHENER..ADLAM GEMINATION MARK
+ 
+ # Total code points: 47
+ 
+ # ================================================
+ 
+ 00AA          ; Other_Lowercase # Lo       FEMININE ORDINAL INDICATOR
+ 00BA          ; Other_Lowercase # Lo       MASCULINE ORDINAL INDICATOR
+ 02B0..02B8    ; Other_Lowercase # Lm   [9] MODIFIER LETTER SMALL H..MODIFIER LETTER SMALL Y
+ 02C0..02C1    ; Other_Lowercase # Lm   [2] MODIFIER LETTER GLOTTAL STOP..MODIFIER LETTER REVERSED GLOTTAL STOP
+ 02E0..02E4    ; Other_Lowercase # Lm   [5] MODIFIER LETTER SMALL GAMMA..MODIFIER LETTER SMALL REVERSED GLOTTAL STOP
+ 0345          ; Other_Lowercase # Mn       COMBINING GREEK YPOGEGRAMMENI
+ 037A          ; Other_Lowercase # Lm       GREEK YPOGEGRAMMENI
+ 1D2C..1D6A    ; Other_Lowercase # Lm  [63] MODIFIER LETTER CAPITAL A..GREEK SUBSCRIPT SMALL LETTER CHI
+ 1D78          ; Other_Lowercase # Lm       MODIFIER LETTER CYRILLIC EN
+ 1D9B..1DBF    ; Other_Lowercase # Lm  [37] MODIFIER LETTER SMALL TURNED ALPHA..MODIFIER LETTER SMALL THETA
+ 2071          ; Other_Lowercase # Lm       SUPERSCRIPT LATIN SMALL LETTER I
+ 207F          ; Other_Lowercase # Lm       SUPERSCRIPT LATIN SMALL LETTER N
+ 2090..209C    ; Other_Lowercase # Lm  [13] LATIN SUBSCRIPT SMALL LETTER A..LATIN SUBSCRIPT SMALL LETTER T
+ 2170..217F    ; Other_Lowercase # Nl  [16] SMALL ROMAN NUMERAL ONE..SMALL ROMAN NUMERAL ONE THOUSAND
+ 24D0..24E9    ; Other_Lowercase # So  [26] CIRCLED LATIN SMALL LETTER A..CIRCLED LATIN SMALL LETTER Z
+ 2C7C..2C7D    ; Other_Lowercase # Lm   [2] LATIN SUBSCRIPT SMALL LETTER J..MODIFIER LETTER CAPITAL V
+ A69C..A69D    ; Other_Lowercase # Lm   [2] MODIFIER LETTER CYRILLIC HARD SIGN..MODIFIER LETTER CYRILLIC SOFT SIGN
+ A770          ; Other_Lowercase # Lm       MODIFIER LETTER US
+ A7F8..A7F9    ; Other_Lowercase # Lm   [2] MODIFIER LETTER CAPITAL H WITH STROKE..MODIFIER LETTER SMALL LIGATURE OE
+ AB5C..AB5F    ; Other_Lowercase # Lm   [4] MODIFIER LETTER SMALL HENG..MODIFIER LETTER SMALL U WITH LEFT HOOK
+ 
+ # Total code points: 189
+ 
+ # ================================================
+ 
+ 2160..216F    ; Other_Uppercase # Nl  [16] ROMAN NUMERAL ONE..ROMAN NUMERAL ONE THOUSAND
+ 24B6..24CF    ; Other_Uppercase # So  [26] CIRCLED LATIN CAPITAL LETTER A..CIRCLED LATIN CAPITAL LETTER Z
+ 1F130..1F149  ; Other_Uppercase # So  [26] SQUARED LATIN CAPITAL LETTER A..SQUARED LATIN CAPITAL LETTER Z
+ 1F150..1F169  ; Other_Uppercase # So  [26] NEGATIVE CIRCLED LATIN CAPITAL LETTER A..NEGATIVE CIRCLED LATIN CAPITAL LETTER Z
+ 1F170..1F189  ; Other_Uppercase # So  [26] NEGATIVE SQUARED LATIN CAPITAL LETTER A..NEGATIVE SQUARED LATIN CAPITAL LETTER Z
+ 
+ # Total code points: 120
+ 
+ # ================================================
+ 
+ FDD0..FDEF    ; Noncharacter_Code_Point # Cn  [32] <noncharacter-FDD0>..<noncharacter-FDEF>
+ FFFE..FFFF    ; Noncharacter_Code_Point # Cn   [2] <noncharacter-FFFE>..<noncharacter-FFFF>
+ 1FFFE..1FFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-1FFFE>..<noncharacter-1FFFF>
+ 2FFFE..2FFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-2FFFE>..<noncharacter-2FFFF>
+ 3FFFE..3FFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-3FFFE>..<noncharacter-3FFFF>
+ 4FFFE..4FFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-4FFFE>..<noncharacter-4FFFF>
+ 5FFFE..5FFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-5FFFE>..<noncharacter-5FFFF>
+ 6FFFE..6FFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-6FFFE>..<noncharacter-6FFFF>
+ 7FFFE..7FFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-7FFFE>..<noncharacter-7FFFF>
+ 8FFFE..8FFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-8FFFE>..<noncharacter-8FFFF>
+ 9FFFE..9FFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-9FFFE>..<noncharacter-9FFFF>
+ AFFFE..AFFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-AFFFE>..<noncharacter-AFFFF>
+ BFFFE..BFFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-BFFFE>..<noncharacter-BFFFF>
+ CFFFE..CFFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-CFFFE>..<noncharacter-CFFFF>
+ DFFFE..DFFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-DFFFE>..<noncharacter-DFFFF>
+ EFFFE..EFFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-EFFFE>..<noncharacter-EFFFF>
+ FFFFE..FFFFF  ; Noncharacter_Code_Point # Cn   [2] <noncharacter-FFFFE>..<noncharacter-FFFFF>
+ 10FFFE..10FFFF; Noncharacter_Code_Point # Cn   [2] <noncharacter-10FFFE>..<noncharacter-10FFFF>
+ 
+ # Total code points: 66
+ 
+ # ================================================
+ 
+ 09BE          ; Other_Grapheme_Extend # Mc       BENGALI VOWEL SIGN AA
+ 09D7          ; Other_Grapheme_Extend # Mc       BENGALI AU LENGTH MARK
+ 0B3E          ; Other_Grapheme_Extend # Mc       ORIYA VOWEL SIGN AA
+ 0B57          ; Other_Grapheme_Extend # Mc       ORIYA AU LENGTH MARK
+ 0BBE          ; Other_Grapheme_Extend # Mc       TAMIL VOWEL SIGN AA
+ 0BD7          ; Other_Grapheme_Extend # Mc       TAMIL AU LENGTH MARK
+ 0CC2          ; Other_Grapheme_Extend # Mc       KANNADA VOWEL SIGN UU
+ 0CD5..0CD6    ; Other_Grapheme_Extend # Mc   [2] KANNADA LENGTH MARK..KANNADA AI LENGTH MARK
+ 0D3E          ; Other_Grapheme_Extend # Mc       MALAYALAM VOWEL SIGN AA
+ 0D57          ; Other_Grapheme_Extend # Mc       MALAYALAM AU LENGTH MARK
+ 0DCF          ; Other_Grapheme_Extend # Mc       SINHALA VOWEL SIGN AELA-PILLA
+ 0DDF          ; Other_Grapheme_Extend # Mc       SINHALA VOWEL SIGN GAYANUKITTA
+ 1B35          ; Other_Grapheme_Extend # Mc       BALINESE VOWEL SIGN TEDUNG
+ 200C          ; Other_Grapheme_Extend # Cf       ZERO WIDTH NON-JOINER
+ 302E..302F    ; Other_Grapheme_Extend # Mc   [2] HANGUL SINGLE DOT TONE MARK..HANGUL DOUBLE DOT TONE MARK
+ FF9E..FF9F    ; Other_Grapheme_Extend # Lm   [2] HALFWIDTH KATAKANA VOICED SOUND MARK..HALFWIDTH KATAKANA SEMI-VOICED SOUND MARK
+ 1133E         ; Other_Grapheme_Extend # Mc       GRANTHA VOWEL SIGN AA
+ 11357         ; Other_Grapheme_Extend # Mc       GRANTHA AU LENGTH MARK
+ 114B0         ; Other_Grapheme_Extend # Mc       TIRHUTA VOWEL SIGN AA
+ 114BD         ; Other_Grapheme_Extend # Mc       TIRHUTA VOWEL SIGN SHORT O
+ 115AF         ; Other_Grapheme_Extend # Mc       SIDDHAM VOWEL SIGN AA
+ 1D165         ; Other_Grapheme_Extend # Mc       MUSICAL SYMBOL COMBINING STEM
+ 1D16E..1D172  ; Other_Grapheme_Extend # Mc   [5] MUSICAL SYMBOL COMBINING FLAG-1..MUSICAL SYMBOL COMBINING FLAG-5
+ E0020..E007F  ; Other_Grapheme_Extend # Cf  [96] TAG SPACE..CANCEL TAG
+ 
+ # Total code points: 126
+ 
+ # ================================================
+ 
+ 2FF0..2FF1    ; IDS_Binary_Operator # So   [2] IDEOGRAPHIC DESCRIPTION CHARACTER LEFT TO RIGHT..IDEOGRAPHIC DESCRIPTION CHARACTER ABOVE TO BELOW
+ 2FF4..2FFB    ; IDS_Binary_Operator # So   [8] IDEOGRAPHIC DESCRIPTION CHARACTER FULL SURROUND..IDEOGRAPHIC DESCRIPTION CHARACTER OVERLAID
+ 
+ # Total code points: 10
+ 
+ # ================================================
+ 
+ 2FF2..2FF3    ; IDS_Trinary_Operator # So   [2] IDEOGRAPHIC DESCRIPTION CHARACTER LEFT TO MIDDLE AND RIGHT..IDEOGRAPHIC DESCRIPTION CHARACTER ABOVE TO MIDDLE AND BELOW
+ 
+ # Total code points: 2
+ 
+ # ================================================
+ 
+ 2E80..2E99    ; Radical # So  [26] CJK RADICAL REPEAT..CJK RADICAL RAP
+ 2E9B..2EF3    ; Radical # So  [89] CJK RADICAL CHOKE..CJK RADICAL C-SIMPLIFIED TURTLE
+ 2F00..2FD5    ; Radical # So [214] KANGXI RADICAL ONE..KANGXI RADICAL FLUTE
+ 
+ # Total code points: 329
+ 
+ # ================================================
+ 
+ 3400..4DB5    ; Unified_Ideograph # Lo [6582] CJK UNIFIED IDEOGRAPH-3400..CJK UNIFIED IDEOGRAPH-4DB5
+ 4E00..9FEF    ; Unified_Ideograph # Lo [20976] CJK UNIFIED IDEOGRAPH-4E00..CJK UNIFIED IDEOGRAPH-9FEF
+ FA0E..FA0F    ; Unified_Ideograph # Lo   [2] CJK COMPATIBILITY IDEOGRAPH-FA0E..CJK COMPATIBILITY IDEOGRAPH-FA0F
+ FA11          ; Unified_Ideograph # Lo       CJK COMPATIBILITY IDEOGRAPH-FA11
+ FA13..FA14    ; Unified_Ideograph # Lo   [2] CJK COMPATIBILITY IDEOGRAPH-FA13..CJK COMPATIBILITY IDEOGRAPH-FA14
+ FA1F          ; Unified_Ideograph # Lo       CJK COMPATIBILITY IDEOGRAPH-FA1F
+ FA21          ; Unified_Ideograph # Lo       CJK COMPATIBILITY IDEOGRAPH-FA21
+ FA23..FA24    ; Unified_Ideograph # Lo   [2] CJK COMPATIBILITY IDEOGRAPH-FA23..CJK COMPATIBILITY IDEOGRAPH-FA24
+ FA27..FA29    ; Unified_Ideograph # Lo   [3] CJK COMPATIBILITY IDEOGRAPH-FA27..CJK COMPATIBILITY IDEOGRAPH-FA29
+ 20000..2A6D6  ; Unified_Ideograph # Lo [42711] CJK UNIFIED IDEOGRAPH-20000..CJK UNIFIED IDEOGRAPH-2A6D6
+ 2A700..2B734  ; Unified_Ideograph # Lo [4149] CJK UNIFIED IDEOGRAPH-2A700..CJK UNIFIED IDEOGRAPH-2B734
+ 2B740..2B81D  ; Unified_Ideograph # Lo [222] CJK UNIFIED IDEOGRAPH-2B740..CJK UNIFIED IDEOGRAPH-2B81D
+ 2B820..2CEA1  ; Unified_Ideograph # Lo [5762] CJK UNIFIED IDEOGRAPH-2B820..CJK UNIFIED IDEOGRAPH-2CEA1
+ 2CEB0..2EBE0  ; Unified_Ideograph # Lo [7473] CJK UNIFIED IDEOGRAPH-2CEB0..CJK UNIFIED IDEOGRAPH-2EBE0
+ 
+ # Total code points: 87887
+ 
+ # ================================================
+ 
+ 034F          ; Other_Default_Ignorable_Code_Point # Mn       COMBINING GRAPHEME JOINER
+ 115F..1160    ; Other_Default_Ignorable_Code_Point # Lo   [2] HANGUL CHOSEONG FILLER..HANGUL JUNGSEONG FILLER
+ 17B4..17B5    ; Other_Default_Ignorable_Code_Point # Mn   [2] KHMER VOWEL INHERENT AQ..KHMER VOWEL INHERENT AA
+ 2065          ; Other_Default_Ignorable_Code_Point # Cn       <reserved-2065>
+ 3164          ; Other_Default_Ignorable_Code_Point # Lo       HANGUL FILLER
+ FFA0          ; Other_Default_Ignorable_Code_Point # Lo       HALFWIDTH HANGUL FILLER
+ FFF0..FFF8    ; Other_Default_Ignorable_Code_Point # Cn   [9] <reserved-FFF0>..<reserved-FFF8>
+ E0000         ; Other_Default_Ignorable_Code_Point # Cn       <reserved-E0000>
+ E0002..E001F  ; Other_Default_Ignorable_Code_Point # Cn  [30] <reserved-E0002>..<reserved-E001F>
+ E0080..E00FF  ; Other_Default_Ignorable_Code_Point # Cn [128] <reserved-E0080>..<reserved-E00FF>
+ E01F0..E0FFF  ; Other_Default_Ignorable_Code_Point # Cn [3600] <reserved-E01F0>..<reserved-E0FFF>
+ 
+ # Total code points: 3776
+ 
+ # ================================================
+ 
+ 0149          ; Deprecated # L&       LATIN SMALL LETTER N PRECEDED BY APOSTROPHE
+ 0673          ; Deprecated # Lo       ARABIC LETTER ALEF WITH WAVY HAMZA BELOW
+ 0F77          ; Deprecated # Mn       TIBETAN VOWEL SIGN VOCALIC RR
+ 0F79          ; Deprecated # Mn       TIBETAN VOWEL SIGN VOCALIC LL
+ 17A3..17A4    ; Deprecated # Lo   [2] KHMER INDEPENDENT VOWEL QAQ..KHMER INDEPENDENT VOWEL QAA
+ 206A..206F    ; Deprecated # Cf   [6] INHIBIT SYMMETRIC SWAPPING..NOMINAL DIGIT SHAPES
+ 2329          ; Deprecated # Ps       LEFT-POINTING ANGLE BRACKET
+ 232A          ; Deprecated # Pe       RIGHT-POINTING ANGLE BRACKET
+ E0001         ; Deprecated # Cf       LANGUAGE TAG
+ 
+ # Total code points: 15
+ 
+ # ================================================
+ 
+ 0069..006A    ; Soft_Dotted # L&   [2] LATIN SMALL LETTER I..LATIN SMALL LETTER J
+ 012F          ; Soft_Dotted # L&       LATIN SMALL LETTER I WITH OGONEK
+ 0249          ; Soft_Dotted # L&       LATIN SMALL LETTER J WITH STROKE
+ 0268          ; Soft_Dotted # L&       LATIN SMALL LETTER I WITH STROKE
+ 029D          ; Soft_Dotted # L&       LATIN SMALL LETTER J WITH CROSSED-TAIL
+ 02B2          ; Soft_Dotted # Lm       MODIFIER LETTER SMALL J
+ 03F3          ; Soft_Dotted # L&       GREEK LETTER YOT
+ 0456          ; Soft_Dotted # L&       CYRILLIC SMALL LETTER BYELORUSSIAN-UKRAINIAN I
+ 0458          ; Soft_Dotted # L&       CYRILLIC SMALL LETTER JE
+ 1D62          ; Soft_Dotted # Lm       LATIN SUBSCRIPT SMALL LETTER I
+ 1D96          ; Soft_Dotted # L&       LATIN SMALL LETTER I WITH RETROFLEX HOOK
+ 1DA4          ; Soft_Dotted # Lm       MODIFIER LETTER SMALL I WITH STROKE
+ 1DA8          ; Soft_Dotted # Lm       MODIFIER LETTER SMALL J WITH CROSSED-TAIL
+ 1E2D          ; Soft_Dotted # L&       LATIN SMALL LETTER I WITH TILDE BELOW
+ 1ECB          ; Soft_Dotted # L&       LATIN SMALL LETTER I WITH DOT BELOW
+ 2071          ; Soft_Dotted # Lm       SUPERSCRIPT LATIN SMALL LETTER I
+ 2148..2149    ; Soft_Dotted # L&   [2] DOUBLE-STRUCK ITALIC SMALL I..DOUBLE-STRUCK ITALIC SMALL J
+ 2C7C          ; Soft_Dotted # Lm       LATIN SUBSCRIPT SMALL LETTER J
+ 1D422..1D423  ; Soft_Dotted # L&   [2] MATHEMATICAL BOLD SMALL I..MATHEMATICAL BOLD SMALL J
+ 1D456..1D457  ; Soft_Dotted # L&   [2] MATHEMATICAL ITALIC SMALL I..MATHEMATICAL ITALIC SMALL J
+ 1D48A..1D48B  ; Soft_Dotted # L&   [2] MATHEMATICAL BOLD ITALIC SMALL I..MATHEMATICAL BOLD ITALIC SMALL J
+ 1D4BE..1D4BF  ; Soft_Dotted # L&   [2] MATHEMATICAL SCRIPT SMALL I..MATHEMATICAL SCRIPT SMALL J
+ 1D4F2..1D4F3  ; Soft_Dotted # L&   [2] MATHEMATICAL BOLD SCRIPT SMALL I..MATHEMATICAL BOLD SCRIPT SMALL J
+ 1D526..1D527  ; Soft_Dotted # L&   [2] MATHEMATICAL FRAKTUR SMALL I..MATHEMATICAL FRAKTUR SMALL J
+ 1D55A..1D55B  ; Soft_Dotted # L&   [2] MATHEMATICAL DOUBLE-STRUCK SMALL I..MATHEMATICAL DOUBLE-STRUCK SMALL J
+ 1D58E..1D58F  ; Soft_Dotted # L&   [2] MATHEMATICAL BOLD FRAKTUR SMALL I..MATHEMATICAL BOLD FRAKTUR SMALL J
+ 1D5C2..1D5C3  ; Soft_Dotted # L&   [2] MATHEMATICAL SANS-SERIF SMALL I..MATHEMATICAL SANS-SERIF SMALL J
+ 1D5F6..1D5F7  ; Soft_Dotted # L&   [2] MATHEMATICAL SANS-SERIF BOLD SMALL I..MATHEMATICAL SANS-SERIF BOLD SMALL J
+ 1D62A..1D62B  ; Soft_Dotted # L&   [2] MATHEMATICAL SANS-SERIF ITALIC SMALL I..MATHEMATICAL SANS-SERIF ITALIC SMALL J
+ 1D65E..1D65F  ; Soft_Dotted # L&   [2] MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL I..MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL J
+ 1D692..1D693  ; Soft_Dotted # L&   [2] MATHEMATICAL MONOSPACE SMALL I..MATHEMATICAL MONOSPACE SMALL J
+ 
+ # Total code points: 46
+ 
+ # ================================================
+ 
+ 0E40..0E44    ; Logical_Order_Exception # Lo   [5] THAI CHARACTER SARA E..THAI CHARACTER SARA AI MAIMALAI
+ 0EC0..0EC4    ; Logical_Order_Exception # Lo   [5] LAO VOWEL SIGN E..LAO VOWEL SIGN AI
+ 19B5..19B7    ; Logical_Order_Exception # Lo   [3] NEW TAI LUE VOWEL SIGN E..NEW TAI LUE VOWEL SIGN O
+ 19BA          ; Logical_Order_Exception # Lo       NEW TAI LUE VOWEL SIGN AY
+ AAB5..AAB6    ; Logical_Order_Exception # Lo   [2] TAI VIET VOWEL E..TAI VIET VOWEL O
+ AAB9          ; Logical_Order_Exception # Lo       TAI VIET VOWEL UEA
+ AABB..AABC    ; Logical_Order_Exception # Lo   [2] TAI VIET VOWEL AUE..TAI VIET VOWEL AY
+ 
+ # Total code points: 19
+ 
+ # ================================================
+ 
+ 1885..1886    ; Other_ID_Start # Mn   [2] MONGOLIAN LETTER ALI GALI BALUDA..MONGOLIAN LETTER ALI GALI THREE BALUDA
+ 2118          ; Other_ID_Start # Sm       SCRIPT CAPITAL P
+ 212E          ; Other_ID_Start # So       ESTIMATED SYMBOL
+ 309B..309C    ; Other_ID_Start # Sk   [2] KATAKANA-HIRAGANA VOICED SOUND MARK..KATAKANA-HIRAGANA SEMI-VOICED SOUND MARK
+ 
+ # Total code points: 6
+ 
+ # ================================================
+ 
+ 00B7          ; Other_ID_Continue # Po       MIDDLE DOT
+ 0387          ; Other_ID_Continue # Po       GREEK ANO TELEIA
+ 1369..1371    ; Other_ID_Continue # No   [9] ETHIOPIC DIGIT ONE..ETHIOPIC DIGIT NINE
+ 19DA          ; Other_ID_Continue # No       NEW TAI LUE THAM DIGIT ONE
+ 
+ # Total code points: 12
+ 
+ # ================================================
+ 
+ 0021          ; Sentence_Terminal # Po       EXCLAMATION MARK
+ 002E          ; Sentence_Terminal # Po       FULL STOP
+ 003F          ; Sentence_Terminal # Po       QUESTION MARK
+ 0589          ; Sentence_Terminal # Po       ARMENIAN FULL STOP
+ 061E..061F    ; Sentence_Terminal # Po   [2] ARABIC TRIPLE DOT PUNCTUATION MARK..ARABIC QUESTION MARK
+ 06D4          ; Sentence_Terminal # Po       ARABIC FULL STOP
+ 0700..0702    ; Sentence_Terminal # Po   [3] SYRIAC END OF PARAGRAPH..SYRIAC SUBLINEAR FULL STOP
+ 07F9          ; Sentence_Terminal # Po       NKO EXCLAMATION MARK
+ 0837          ; Sentence_Terminal # Po       SAMARITAN PUNCTUATION MELODIC QITSA
+ 0839          ; Sentence_Terminal # Po       SAMARITAN PUNCTUATION QITSA
+ 083D..083E    ; Sentence_Terminal # Po   [2] SAMARITAN PUNCTUATION SOF MASHFAAT..SAMARITAN PUNCTUATION ANNAAU
+ 0964..0965    ; Sentence_Terminal # Po   [2] DEVANAGARI DANDA..DEVANAGARI DOUBLE DANDA
+ 104A..104B    ; Sentence_Terminal # Po   [2] MYANMAR SIGN LITTLE SECTION..MYANMAR SIGN SECTION
+ 1362          ; Sentence_Terminal # Po       ETHIOPIC FULL STOP
+ 1367..1368    ; Sentence_Terminal # Po   [2] ETHIOPIC QUESTION MARK..ETHIOPIC PARAGRAPH SEPARATOR
+ 166E          ; Sentence_Terminal # Po       CANADIAN SYLLABICS FULL STOP
+ 1735..1736    ; Sentence_Terminal # Po   [2] PHILIPPINE SINGLE PUNCTUATION..PHILIPPINE DOUBLE PUNCTUATION
+ 1803          ; Sentence_Terminal # Po       MONGOLIAN FULL STOP
+ 1809          ; Sentence_Terminal # Po       MONGOLIAN MANCHU FULL STOP
+ 1944..1945    ; Sentence_Terminal # Po   [2] LIMBU EXCLAMATION MARK..LIMBU QUESTION MARK
+ 1AA8..1AAB    ; Sentence_Terminal # Po   [4] TAI THAM SIGN KAAN..TAI THAM SIGN SATKAANKUU
+ 1B5A..1B5B    ; Sentence_Terminal # Po   [2] BALINESE PANTI..BALINESE PAMADA
+ 1B5E..1B5F    ; Sentence_Terminal # Po   [2] BALINESE CARIK SIKI..BALINESE CARIK PAREREN
+ 1C3B..1C3C    ; Sentence_Terminal # Po   [2] LEPCHA PUNCTUATION TA-ROL..LEPCHA PUNCTUATION NYET THYOOM TA-ROL
+ 1C7E..1C7F    ; Sentence_Terminal # Po   [2] OL CHIKI PUNCTUATION MUCAAD..OL CHIKI PUNCTUATION DOUBLE MUCAAD
+ 203C..203D    ; Sentence_Terminal # Po   [2] DOUBLE EXCLAMATION MARK..INTERROBANG
+ 2047..2049    ; Sentence_Terminal # Po   [3] DOUBLE QUESTION MARK..EXCLAMATION QUESTION MARK
+ 2E2E          ; Sentence_Terminal # Po       REVERSED QUESTION MARK
+ 2E3C          ; Sentence_Terminal # Po       STENOGRAPHIC FULL STOP
+ 3002          ; Sentence_Terminal # Po       IDEOGRAPHIC FULL STOP
+ A4FF          ; Sentence_Terminal # Po       LISU PUNCTUATION FULL STOP
+ A60E..A60F    ; Sentence_Terminal # Po   [2] VAI FULL STOP..VAI QUESTION MARK
+ A6F3          ; Sentence_Terminal # Po       BAMUM FULL STOP
+ A6F7          ; Sentence_Terminal # Po       BAMUM QUESTION MARK
+ A876..A877    ; Sentence_Terminal # Po   [2] PHAGS-PA MARK SHAD..PHAGS-PA MARK DOUBLE SHAD
+ A8CE..A8CF    ; Sentence_Terminal # Po   [2] SAURASHTRA DANDA..SAURASHTRA DOUBLE DANDA
+ A92F          ; Sentence_Terminal # Po       KAYAH LI SIGN SHYA
+ A9C8..A9C9    ; Sentence_Terminal # Po   [2] JAVANESE PADA LINGSA..JAVANESE PADA LUNGSI
+ AA5D..AA5F    ; Sentence_Terminal # Po   [3] CHAM PUNCTUATION DANDA..CHAM PUNCTUATION TRIPLE DANDA
+ AAF0..AAF1    ; Sentence_Terminal # Po   [2] MEETEI MAYEK CHEIKHAN..MEETEI MAYEK AHANG KHUDAM
+ ABEB          ; Sentence_Terminal # Po       MEETEI MAYEK CHEIKHEI
+ FE52          ; Sentence_Terminal # Po       SMALL FULL STOP
+ FE56..FE57    ; Sentence_Terminal # Po   [2] SMALL QUESTION MARK..SMALL EXCLAMATION MARK
+ FF01          ; Sentence_Terminal # Po       FULLWIDTH EXCLAMATION MARK
+ FF0E          ; Sentence_Terminal # Po       FULLWIDTH FULL STOP
+ FF1F          ; Sentence_Terminal # Po       FULLWIDTH QUESTION MARK
+ FF61          ; Sentence_Terminal # Po       HALFWIDTH IDEOGRAPHIC FULL STOP
+ 10A56..10A57  ; Sentence_Terminal # Po   [2] KHAROSHTHI PUNCTUATION DANDA..KHAROSHTHI PUNCTUATION DOUBLE DANDA
+ 10F55..10F59  ; Sentence_Terminal # Po   [5] SOGDIAN PUNCTUATION TWO VERTICAL BARS..SOGDIAN PUNCTUATION HALF CIRCLE WITH DOT
+ 11047..11048  ; Sentence_Terminal # Po   [2] BRAHMI DANDA..BRAHMI DOUBLE DANDA
+ 110BE..110C1  ; Sentence_Terminal # Po   [4] KAITHI SECTION MARK..KAITHI DOUBLE DANDA
+ 11141..11143  ; Sentence_Terminal # Po   [3] CHAKMA DANDA..CHAKMA QUESTION MARK
+ 111C5..111C6  ; Sentence_Terminal # Po   [2] SHARADA DANDA..SHARADA DOUBLE DANDA
+ 111CD         ; Sentence_Terminal # Po       SHARADA SUTRA MARK
+ 111DE..111DF  ; Sentence_Terminal # Po   [2] SHARADA SECTION MARK-1..SHARADA SECTION MARK-2
+ 11238..11239  ; Sentence_Terminal # Po   [2] KHOJKI DANDA..KHOJKI DOUBLE DANDA
+ 1123B..1123C  ; Sentence_Terminal # Po   [2] KHOJKI SECTION MARK..KHOJKI DOUBLE SECTION MARK
+ 112A9         ; Sentence_Terminal # Po       MULTANI SECTION MARK
+ 1144B..1144C  ; Sentence_Terminal # Po   [2] NEWA DANDA..NEWA DOUBLE DANDA
+ 115C2..115C3  ; Sentence_Terminal # Po   [2] SIDDHAM DANDA..SIDDHAM DOUBLE DANDA
+ 115C9..115D7  ; Sentence_Terminal # Po  [15] SIDDHAM END OF TEXT MARK..SIDDHAM SECTION MARK WITH CIRCLES AND FOUR ENCLOSURES
+ 11641..11642  ; Sentence_Terminal # Po   [2] MODI DANDA..MODI DOUBLE DANDA
+ 1173C..1173E  ; Sentence_Terminal # Po   [3] AHOM SIGN SMALL SECTION..AHOM SIGN RULAI
+ 11A42..11A43  ; Sentence_Terminal # Po   [2] ZANABAZAR SQUARE MARK SHAD..ZANABAZAR SQUARE MARK DOUBLE SHAD
+ 11A9B..11A9C  ; Sentence_Terminal # Po   [2] SOYOMBO MARK SHAD..SOYOMBO MARK DOUBLE SHAD
+ 11C41..11C42  ; Sentence_Terminal # Po   [2] BHAIKSUKI DANDA..BHAIKSUKI DOUBLE DANDA
+ 11EF7..11EF8  ; Sentence_Terminal # Po   [2] MAKASAR PASSIMBANG..MAKASAR END OF SECTION
+ 16A6E..16A6F  ; Sentence_Terminal # Po   [2] MRO DANDA..MRO DOUBLE DANDA
+ 16AF5         ; Sentence_Terminal # Po       BASSA VAH FULL STOP
+ 16B37..16B38  ; Sentence_Terminal # Po   [2] PAHAWH HMONG SIGN VOS THOM..PAHAWH HMONG SIGN VOS TSHAB CEEB
+ 16B44         ; Sentence_Terminal # Po       PAHAWH HMONG SIGN XAUS
+ 16E98         ; Sentence_Terminal # Po       MEDEFAIDRIN FULL STOP
+ 1BC9F         ; Sentence_Terminal # Po       DUPLOYAN PUNCTUATION CHINOOK FULL STOP
+ 1DA88         ; Sentence_Terminal # Po       SIGNWRITING FULL STOP
+ 
+ # Total code points: 141
+ 
+ # ================================================
+ 
+ 180B..180D    ; Variation_Selector # Mn   [3] MONGOLIAN FREE VARIATION SELECTOR ONE..MONGOLIAN FREE VARIATION SELECTOR THREE
+ FE00..FE0F    ; Variation_Selector # Mn  [16] VARIATION SELECTOR-1..VARIATION SELECTOR-16
+ E0100..E01EF  ; Variation_Selector # Mn [240] VARIATION SELECTOR-17..VARIATION SELECTOR-256
+ 
+ # Total code points: 259
+ 
+ # ================================================
+ 
+ 0009..000D    ; Pattern_White_Space # Cc   [5] <control-0009>..<control-000D>
+ 0020          ; Pattern_White_Space # Zs       SPACE
+ 0085          ; Pattern_White_Space # Cc       <control-0085>
+ 200E..200F    ; Pattern_White_Space # Cf   [2] LEFT-TO-RIGHT MARK..RIGHT-TO-LEFT MARK
+ 2028          ; Pattern_White_Space # Zl       LINE SEPARATOR
+ 2029          ; Pattern_White_Space # Zp       PARAGRAPH SEPARATOR
+ 
+ # Total code points: 11
+ 
+ # ================================================
+ 
+ 0021..0023    ; Pattern_Syntax # Po   [3] EXCLAMATION MARK..NUMBER SIGN
+ 0024          ; Pattern_Syntax # Sc       DOLLAR SIGN
+ 0025..0027    ; Pattern_Syntax # Po   [3] PERCENT SIGN..APOSTROPHE
+ 0028          ; Pattern_Syntax # Ps       LEFT PARENTHESIS
+ 0029          ; Pattern_Syntax # Pe       RIGHT PARENTHESIS
+ 002A          ; Pattern_Syntax # Po       ASTERISK
+ 002B          ; Pattern_Syntax # Sm       PLUS SIGN
+ 002C          ; Pattern_Syntax # Po       COMMA
+ 002D          ; Pattern_Syntax # Pd       HYPHEN-MINUS
+ 002E..002F    ; Pattern_Syntax # Po   [2] FULL STOP..SOLIDUS
+ 003A..003B    ; Pattern_Syntax # Po   [2] COLON..SEMICOLON
+ 003C..003E    ; Pattern_Syntax # Sm   [3] LESS-THAN SIGN..GREATER-THAN SIGN
+ 003F..0040    ; Pattern_Syntax # Po   [2] QUESTION MARK..COMMERCIAL AT
+ 005B          ; Pattern_Syntax # Ps       LEFT SQUARE BRACKET
+ 005C          ; Pattern_Syntax # Po       REVERSE SOLIDUS
+ 005D          ; Pattern_Syntax # Pe       RIGHT SQUARE BRACKET
+ 005E          ; Pattern_Syntax # Sk       CIRCUMFLEX ACCENT
+ 0060          ; Pattern_Syntax # Sk       GRAVE ACCENT
+ 007B          ; Pattern_Syntax # Ps       LEFT CURLY BRACKET
+ 007C          ; Pattern_Syntax # Sm       VERTICAL LINE
+ 007D          ; Pattern_Syntax # Pe       RIGHT CURLY BRACKET
+ 007E          ; Pattern_Syntax # Sm       TILDE
+ 00A1          ; Pattern_Syntax # Po       INVERTED EXCLAMATION MARK
+ 00A2..00A5    ; Pattern_Syntax # Sc   [4] CENT SIGN..YEN SIGN
+ 00A6          ; Pattern_Syntax # So       BROKEN BAR
+ 00A7          ; Pattern_Syntax # Po       SECTION SIGN
+ 00A9          ; Pattern_Syntax # So       COPYRIGHT SIGN
+ 00AB          ; Pattern_Syntax # Pi       LEFT-POINTING DOUBLE ANGLE QUOTATION MARK
+ 00AC          ; Pattern_Syntax # Sm       NOT SIGN
+ 00AE          ; Pattern_Syntax # So       REGISTERED SIGN
+ 00B0          ; Pattern_Syntax # So       DEGREE SIGN
+ 00B1          ; Pattern_Syntax # Sm       PLUS-MINUS SIGN
+ 00B6          ; Pattern_Syntax # Po       PILCROW SIGN
+ 00BB          ; Pattern_Syntax # Pf       RIGHT-POINTING DOUBLE ANGLE QUOTATION MARK
+ 00BF          ; Pattern_Syntax # Po       INVERTED QUESTION MARK
+ 00D7          ; Pattern_Syntax # Sm       MULTIPLICATION SIGN
+ 00F7          ; Pattern_Syntax # Sm       DIVISION SIGN
+ 2010..2015    ; Pattern_Syntax # Pd   [6] HYPHEN..HORIZONTAL BAR
+ 2016..2017    ; Pattern_Syntax # Po   [2] DOUBLE VERTICAL LINE..DOUBLE LOW LINE
+ 2018          ; Pattern_Syntax # Pi       LEFT SINGLE QUOTATION MARK
+ 2019          ; Pattern_Syntax # Pf       RIGHT SINGLE QUOTATION MARK
+ 201A          ; Pattern_Syntax # Ps       SINGLE LOW-9 QUOTATION MARK
+ 201B..201C    ; Pattern_Syntax # Pi   [2] SINGLE HIGH-REVERSED-9 QUOTATION MARK..LEFT DOUBLE QUOTATION MARK
+ 201D          ; Pattern_Syntax # Pf       RIGHT DOUBLE QUOTATION MARK
+ 201E          ; Pattern_Syntax # Ps       DOUBLE LOW-9 QUOTATION MARK
+ 201F          ; Pattern_Syntax # Pi       DOUBLE HIGH-REVERSED-9 QUOTATION MARK
+ 2020..2027    ; Pattern_Syntax # Po   [8] DAGGER..HYPHENATION POINT
+ 2030..2038    ; Pattern_Syntax # Po   [9] PER MILLE SIGN..CARET
+ 2039          ; Pattern_Syntax # Pi       SINGLE LEFT-POINTING ANGLE QUOTATION MARK
+ 203A          ; Pattern_Syntax # Pf       SINGLE RIGHT-POINTING ANGLE QUOTATION MARK
+ 203B..203E    ; Pattern_Syntax # Po   [4] REFERENCE MARK..OVERLINE
+ 2041..2043    ; Pattern_Syntax # Po   [3] CARET INSERTION POINT..HYPHEN BULLET
+ 2044          ; Pattern_Syntax # Sm       FRACTION SLASH
+ 2045          ; Pattern_Syntax # Ps       LEFT SQUARE BRACKET WITH QUILL
+ 2046          ; Pattern_Syntax # Pe       RIGHT SQUARE BRACKET WITH QUILL
+ 2047..2051    ; Pattern_Syntax # Po  [11] DOUBLE QUESTION MARK..TWO ASTERISKS ALIGNED VERTICALLY
+ 2052          ; Pattern_Syntax # Sm       COMMERCIAL MINUS SIGN
+ 2053          ; Pattern_Syntax # Po       SWUNG DASH
+ 2055..205E    ; Pattern_Syntax # Po  [10] FLOWER PUNCTUATION MARK..VERTICAL FOUR DOTS
+ 2190..2194    ; Pattern_Syntax # Sm   [5] LEFTWARDS ARROW..LEFT RIGHT ARROW
+ 2195..2199    ; Pattern_Syntax # So   [5] UP DOWN ARROW..SOUTH WEST ARROW
+ 219A..219B    ; Pattern_Syntax # Sm   [2] LEFTWARDS ARROW WITH STROKE..RIGHTWARDS ARROW WITH STROKE
+ 219C..219F    ; Pattern_Syntax # So   [4] LEFTWARDS WAVE ARROW..UPWARDS TWO HEADED ARROW
+ 21A0          ; Pattern_Syntax # Sm       RIGHTWARDS TWO HEADED ARROW
+ 21A1..21A2    ; Pattern_Syntax # So   [2] DOWNWARDS TWO HEADED ARROW..LEFTWARDS ARROW WITH TAIL
+ 21A3          ; Pattern_Syntax # Sm       RIGHTWARDS ARROW WITH TAIL
+ 21A4..21A5    ; Pattern_Syntax # So   [2] LEFTWARDS ARROW FROM BAR..UPWARDS ARROW FROM BAR
+ 21A6          ; Pattern_Syntax # Sm       RIGHTWARDS ARROW FROM BAR
+ 21A7..21AD    ; Pattern_Syntax # So   [7] DOWNWARDS ARROW FROM BAR..LEFT RIGHT WAVE ARROW
+ 21AE          ; Pattern_Syntax # Sm       LEFT RIGHT ARROW WITH STROKE
+ 21AF..21CD    ; Pattern_Syntax # So  [31] DOWNWARDS ZIGZAG ARROW..LEFTWARDS DOUBLE ARROW WITH STROKE
+ 21CE..21CF    ; Pattern_Syntax # Sm   [2] LEFT RIGHT DOUBLE ARROW WITH STROKE..RIGHTWARDS DOUBLE ARROW WITH STROKE
+ 21D0..21D1    ; Pattern_Syntax # So   [2] LEFTWARDS DOUBLE ARROW..UPWARDS DOUBLE ARROW
+ 21D2          ; Pattern_Syntax # Sm       RIGHTWARDS DOUBLE ARROW
+ 21D3          ; Pattern_Syntax # So       DOWNWARDS DOUBLE ARROW
+ 21D4          ; Pattern_Syntax # Sm       LEFT RIGHT DOUBLE ARROW
+ 21D5..21F3    ; Pattern_Syntax # So  [31] UP DOWN DOUBLE ARROW..UP DOWN WHITE ARROW
+ 21F4..22FF    ; Pattern_Syntax # Sm [268] RIGHT ARROW WITH SMALL CIRCLE..Z NOTATION BAG MEMBERSHIP
+ 2300..2307    ; Pattern_Syntax # So   [8] DIAMETER SIGN..WAVY LINE
+ 2308          ; Pattern_Syntax # Ps       LEFT CEILING
+ 2309          ; Pattern_Syntax # Pe       RIGHT CEILING
+ 230A          ; Pattern_Syntax # Ps       LEFT FLOOR
+ 230B          ; Pattern_Syntax # Pe       RIGHT FLOOR
+ 230C..231F    ; Pattern_Syntax # So  [20] BOTTOM RIGHT CROP..BOTTOM RIGHT CORNER
+ 2320..2321    ; Pattern_Syntax # Sm   [2] TOP HALF INTEGRAL..BOTTOM HALF INTEGRAL
+ 2322..2328    ; Pattern_Syntax # So   [7] FROWN..KEYBOARD
+ 2329          ; Pattern_Syntax # Ps       LEFT-POINTING ANGLE BRACKET
+ 232A          ; Pattern_Syntax # Pe       RIGHT-POINTING ANGLE BRACKET
+ 232B..237B    ; Pattern_Syntax # So  [81] ERASE TO THE LEFT..NOT CHECK MARK
+ 237C          ; Pattern_Syntax # Sm       RIGHT ANGLE WITH DOWNWARDS ZIGZAG ARROW
+ 237D..239A    ; Pattern_Syntax # So  [30] SHOULDERED OPEN BOX..CLEAR SCREEN SYMBOL
+ 239B..23B3    ; Pattern_Syntax # Sm  [25] LEFT PARENTHESIS UPPER HOOK..SUMMATION BOTTOM
+ 23B4..23DB    ; Pattern_Syntax # So  [40] TOP SQUARE BRACKET..FUSE
+ 23DC..23E1    ; Pattern_Syntax # Sm   [6] TOP PARENTHESIS..BOTTOM TORTOISE SHELL BRACKET
+ 23E2..2426    ; Pattern_Syntax # So  [69] WHITE TRAPEZIUM..SYMBOL FOR SUBSTITUTE FORM TWO
+ 2427..243F    ; Pattern_Syntax # Cn  [25] <reserved-2427>..<reserved-243F>
+ 2440..244A    ; Pattern_Syntax # So  [11] OCR HOOK..OCR DOUBLE BACKSLASH
+ 244B..245F    ; Pattern_Syntax # Cn  [21] <reserved-244B>..<reserved-245F>
+ 2500..25B6    ; Pattern_Syntax # So [183] BOX DRAWINGS LIGHT HORIZONTAL..BLACK RIGHT-POINTING TRIANGLE
+ 25B7          ; Pattern_Syntax # Sm       WHITE RIGHT-POINTING TRIANGLE
+ 25B8..25C0    ; Pattern_Syntax # So   [9] BLACK RIGHT-POINTING SMALL TRIANGLE..BLACK LEFT-POINTING TRIANGLE
+ 25C1          ; Pattern_Syntax # Sm       WHITE LEFT-POINTING TRIANGLE
+ 25C2..25F7    ; Pattern_Syntax # So  [54] BLACK LEFT-POINTING SMALL TRIANGLE..WHITE CIRCLE WITH UPPER RIGHT QUADRANT
+ 25F8..25FF    ; Pattern_Syntax # Sm   [8] UPPER LEFT TRIANGLE..LOWER RIGHT TRIANGLE
+ 2600..266E    ; Pattern_Syntax # So [111] BLACK SUN WITH RAYS..MUSIC NATURAL SIGN
+ 266F          ; Pattern_Syntax # Sm       MUSIC SHARP SIGN
+ 2670..2767    ; Pattern_Syntax # So [248] WEST SYRIAC CROSS..ROTATED FLORAL HEART BULLET
+ 2768          ; Pattern_Syntax # Ps       MEDIUM LEFT PARENTHESIS ORNAMENT
+ 2769          ; Pattern_Syntax # Pe       MEDIUM RIGHT PARENTHESIS ORNAMENT
+ 276A          ; Pattern_Syntax # Ps       MEDIUM FLATTENED LEFT PARENTHESIS ORNAMENT
+ 276B          ; Pattern_Syntax # Pe       MEDIUM FLATTENED RIGHT PARENTHESIS ORNAMENT
+ 276C          ; Pattern_Syntax # Ps       MEDIUM LEFT-POINTING ANGLE BRACKET ORNAMENT
+ 276D          ; Pattern_Syntax # Pe       MEDIUM RIGHT-POINTING ANGLE BRACKET ORNAMENT
+ 276E          ; Pattern_Syntax # Ps       HEAVY LEFT-POINTING ANGLE QUOTATION MARK ORNAMENT
+ 276F          ; Pattern_Syntax # Pe       HEAVY RIGHT-POINTING ANGLE QUOTATION MARK ORNAMENT
+ 2770          ; Pattern_Syntax # Ps       HEAVY LEFT-POINTING ANGLE BRACKET ORNAMENT
+ 2771          ; Pattern_Syntax # Pe       HEAVY RIGHT-POINTING ANGLE BRACKET ORNAMENT
+ 2772          ; Pattern_Syntax # Ps       LIGHT LEFT TORTOISE SHELL BRACKET ORNAMENT
+ 2773          ; Pattern_Syntax # Pe       LIGHT RIGHT TORTOISE SHELL BRACKET ORNAMENT
+ 2774          ; Pattern_Syntax # Ps       MEDIUM LEFT CURLY BRACKET ORNAMENT
+ 2775          ; Pattern_Syntax # Pe       MEDIUM RIGHT CURLY BRACKET ORNAMENT
+ 2794..27BF    ; Pattern_Syntax # So  [44] HEAVY WIDE-HEADED RIGHTWARDS ARROW..DOUBLE CURLY LOOP
+ 27C0..27C4    ; Pattern_Syntax # Sm   [5] THREE DIMENSIONAL ANGLE..OPEN SUPERSET
+ 27C5          ; Pattern_Syntax # Ps       LEFT S-SHAPED BAG DELIMITER
+ 27C6          ; Pattern_Syntax # Pe       RIGHT S-SHAPED BAG DELIMITER
+ 27C7..27E5    ; Pattern_Syntax # Sm  [31] OR WITH DOT INSIDE..WHITE SQUARE WITH RIGHTWARDS TICK
+ 27E6          ; Pattern_Syntax # Ps       MATHEMATICAL LEFT WHITE SQUARE BRACKET
+ 27E7          ; Pattern_Syntax # Pe       MATHEMATICAL RIGHT WHITE SQUARE BRACKET
+ 27E8          ; Pattern_Syntax # Ps       MATHEMATICAL LEFT ANGLE BRACKET
+ 27E9          ; Pattern_Syntax # Pe       MATHEMATICAL RIGHT ANGLE BRACKET
+ 27EA          ; Pattern_Syntax # Ps       MATHEMATICAL LEFT DOUBLE ANGLE BRACKET
+ 27EB          ; Pattern_Syntax # Pe       MATHEMATICAL RIGHT DOUBLE ANGLE BRACKET
+ 27EC          ; Pattern_Syntax # Ps       MATHEMATICAL LEFT WHITE TORTOISE SHELL BRACKET
+ 27ED          ; Pattern_Syntax # Pe       MATHEMATICAL RIGHT WHITE TORTOISE SHELL BRACKET
+ 27EE          ; Pattern_Syntax # Ps       MATHEMATICAL LEFT FLATTENED PARENTHESIS
+ 27EF          ; Pattern_Syntax # Pe       MATHEMATICAL RIGHT FLATTENED PARENTHESIS
+ 27F0..27FF    ; Pattern_Syntax # Sm  [16] UPWARDS QUADRUPLE ARROW..LONG RIGHTWARDS SQUIGGLE ARROW
+ 2800..28FF    ; Pattern_Syntax # So [256] BRAILLE PATTERN BLANK..BRAILLE PATTERN DOTS-12345678
+ 2900..2982    ; Pattern_Syntax # Sm [131] RIGHTWARDS TWO-HEADED ARROW WITH VERTICAL STROKE..Z NOTATION TYPE COLON
+ 2983          ; Pattern_Syntax # Ps       LEFT WHITE CURLY BRACKET
+ 2984          ; Pattern_Syntax # Pe       RIGHT WHITE CURLY BRACKET
+ 2985          ; Pattern_Syntax # Ps       LEFT WHITE PARENTHESIS
+ 2986          ; Pattern_Syntax # Pe       RIGHT WHITE PARENTHESIS
+ 2987          ; Pattern_Syntax # Ps       Z NOTATION LEFT IMAGE BRACKET
+ 2988          ; Pattern_Syntax # Pe       Z NOTATION RIGHT IMAGE BRACKET
+ 2989          ; Pattern_Syntax # Ps       Z NOTATION LEFT BINDING BRACKET
+ 298A          ; Pattern_Syntax # Pe       Z NOTATION RIGHT BINDING BRACKET
+ 298B          ; Pattern_Syntax # Ps       LEFT SQUARE BRACKET WITH UNDERBAR
+ 298C          ; Pattern_Syntax # Pe       RIGHT SQUARE BRACKET WITH UNDERBAR
+ 298D          ; Pattern_Syntax # Ps       LEFT SQUARE BRACKET WITH TICK IN TOP CORNER
+ 298E          ; Pattern_Syntax # Pe       RIGHT SQUARE BRACKET WITH TICK IN BOTTOM CORNER
+ 298F          ; Pattern_Syntax # Ps       LEFT SQUARE BRACKET WITH TICK IN BOTTOM CORNER
+ 2990          ; Pattern_Syntax # Pe       RIGHT SQUARE BRACKET WITH TICK IN TOP CORNER
+ 2991          ; Pattern_Syntax # Ps       LEFT ANGLE BRACKET WITH DOT
+ 2992          ; Pattern_Syntax # Pe       RIGHT ANGLE BRACKET WITH DOT
+ 2993          ; Pattern_Syntax # Ps       LEFT ARC LESS-THAN BRACKET
+ 2994          ; Pattern_Syntax # Pe       RIGHT ARC GREATER-THAN BRACKET
+ 2995          ; Pattern_Syntax # Ps       DOUBLE LEFT ARC GREATER-THAN BRACKET
+ 2996          ; Pattern_Syntax # Pe       DOUBLE RIGHT ARC LESS-THAN BRACKET
+ 2997          ; Pattern_Syntax # Ps       LEFT BLACK TORTOISE SHELL BRACKET
+ 2998          ; Pattern_Syntax # Pe       RIGHT BLACK TORTOISE SHELL BRACKET
+ 2999..29D7    ; Pattern_Syntax # Sm  [63] DOTTED FENCE..BLACK HOURGLASS
+ 29D8          ; Pattern_Syntax # Ps       LEFT WIGGLY FENCE
+ 29D9          ; Pattern_Syntax # Pe       RIGHT WIGGLY FENCE
+ 29DA          ; Pattern_Syntax # Ps       LEFT DOUBLE WIGGLY FENCE
+ 29DB          ; Pattern_Syntax # Pe       RIGHT DOUBLE WIGGLY FENCE
+ 29DC..29FB    ; Pattern_Syntax # Sm  [32] INCOMPLETE INFINITY..TRIPLE PLUS
+ 29FC          ; Pattern_Syntax # Ps       LEFT-POINTING CURVED ANGLE BRACKET
+ 29FD          ; Pattern_Syntax # Pe       RIGHT-POINTING CURVED ANGLE BRACKET
+ 29FE..2AFF    ; Pattern_Syntax # Sm [258] TINY..N-ARY WHITE VERTICAL BAR
+ 2B00..2B2F    ; Pattern_Syntax # So  [48] NORTH EAST WHITE ARROW..WHITE VERTICAL ELLIPSE
+ 2B30..2B44    ; Pattern_Syntax # Sm  [21] LEFT ARROW WITH SMALL CIRCLE..RIGHTWARDS ARROW THROUGH SUPERSET
+ 2B45..2B46    ; Pattern_Syntax # So   [2] LEFTWARDS QUADRUPLE ARROW..RIGHTWARDS QUADRUPLE ARROW
+ 2B47..2B4C    ; Pattern_Syntax # Sm   [6] REVERSE TILDE OPERATOR ABOVE RIGHTWARDS ARROW..RIGHTWARDS ARROW ABOVE REVERSE TILDE OPERATOR
+ 2B4D..2B73    ; Pattern_Syntax # So  [39] DOWNWARDS TRIANGLE-HEADED ZIGZAG ARROW..DOWNWARDS TRIANGLE-HEADED ARROW TO BAR
+ 2B74..2B75    ; Pattern_Syntax # Cn   [2] <reserved-2B74>..<reserved-2B75>
+ 2B76..2B95    ; Pattern_Syntax # So  [32] NORTH WEST TRIANGLE-HEADED ARROW TO BAR..RIGHTWARDS BLACK ARROW
+ 2B96..2B97    ; Pattern_Syntax # Cn   [2] <reserved-2B96>..<reserved-2B97>
+ 2B98..2BFF    ; Pattern_Syntax # So [104] THREE-D TOP-LIGHTED LEFTWARDS EQUILATERAL ARROWHEAD..HELLSCHREIBER PAUSE SYMBOL
+ 2E00..2E01    ; Pattern_Syntax # Po   [2] RIGHT ANGLE SUBSTITUTION MARKER..RIGHT ANGLE DOTTED SUBSTITUTION MARKER
+ 2E02          ; Pattern_Syntax # Pi       LEFT SUBSTITUTION BRACKET
+ 2E03          ; Pattern_Syntax # Pf       RIGHT SUBSTITUTION BRACKET
+ 2E04          ; Pattern_Syntax # Pi       LEFT DOTTED SUBSTITUTION BRACKET
+ 2E05          ; Pattern_Syntax # Pf       RIGHT DOTTED SUBSTITUTION BRACKET
+ 2E06..2E08    ; Pattern_Syntax # Po   [3] RAISED INTERPOLATION MARKER..DOTTED TRANSPOSITION MARKER
+ 2E09          ; Pattern_Syntax # Pi       LEFT TRANSPOSITION BRACKET
+ 2E0A          ; Pattern_Syntax # Pf       RIGHT TRANSPOSITION BRACKET
+ 2E0B          ; Pattern_Syntax # Po       RAISED SQUARE
+ 2E0C          ; Pattern_Syntax # Pi       LEFT RAISED OMISSION BRACKET
+ 2E0D          ; Pattern_Syntax # Pf       RIGHT RAISED OMISSION BRACKET
+ 2E0E..2E16    ; Pattern_Syntax # Po   [9] EDITORIAL CORONIS..DOTTED RIGHT-POINTING ANGLE
+ 2E17          ; Pattern_Syntax # Pd       DOUBLE OBLIQUE HYPHEN
+ 2E18..2E19    ; Pattern_Syntax # Po   [2] INVERTED INTERROBANG..PALM BRANCH
+ 2E1A          ; Pattern_Syntax # Pd       HYPHEN WITH DIAERESIS
+ 2E1B          ; Pattern_Syntax # Po       TILDE WITH RING ABOVE
+ 2E1C          ; Pattern_Syntax # Pi       LEFT LOW PARAPHRASE BRACKET
+ 2E1D          ; Pattern_Syntax # Pf       RIGHT LOW PARAPHRASE BRACKET
+ 2E1E..2E1F    ; Pattern_Syntax # Po   [2] TILDE WITH DOT ABOVE..TILDE WITH DOT BELOW
+ 2E20          ; Pattern_Syntax # Pi       LEFT VERTICAL BAR WITH QUILL
+ 2E21          ; Pattern_Syntax # Pf       RIGHT VERTICAL BAR WITH QUILL
+ 2E22          ; Pattern_Syntax # Ps       TOP LEFT HALF BRACKET
+ 2E23          ; Pattern_Syntax # Pe       TOP RIGHT HALF BRACKET
+ 2E24          ; Pattern_Syntax # Ps       BOTTOM LEFT HALF BRACKET
+ 2E25          ; Pattern_Syntax # Pe       BOTTOM RIGHT HALF BRACKET
+ 2E26          ; Pattern_Syntax # Ps       LEFT SIDEWAYS U BRACKET
+ 2E27          ; Pattern_Syntax # Pe       RIGHT SIDEWAYS U BRACKET
+ 2E28          ; Pattern_Syntax # Ps       LEFT DOUBLE PARENTHESIS
+ 2E29          ; Pattern_Syntax # Pe       RIGHT DOUBLE PARENTHESIS
+ 2E2A..2E2E    ; Pattern_Syntax # Po   [5] TWO DOTS OVER ONE DOT PUNCTUATION..REVERSED QUESTION MARK
+ 2E2F          ; Pattern_Syntax # Lm       VERTICAL TILDE
+ 2E30..2E39    ; Pattern_Syntax # Po  [10] RING POINT..TOP HALF SECTION SIGN
+ 2E3A..2E3B    ; Pattern_Syntax # Pd   [2] TWO-EM DASH..THREE-EM DASH
+ 2E3C..2E3F    ; Pattern_Syntax # Po   [4] STENOGRAPHIC FULL STOP..CAPITULUM
+ 2E40          ; Pattern_Syntax # Pd       DOUBLE HYPHEN
+ 2E41          ; Pattern_Syntax # Po       REVERSED COMMA
+ 2E42          ; Pattern_Syntax # Ps       DOUBLE LOW-REVERSED-9 QUOTATION MARK
+ 2E43..2E4F    ; Pattern_Syntax # Po  [13] DASH WITH LEFT UPTURN..CORNISH VERSE DIVIDER
+ 2E50..2E7F    ; Pattern_Syntax # Cn  [48] <reserved-2E50>..<reserved-2E7F>
+ 3001..3003    ; Pattern_Syntax # Po   [3] IDEOGRAPHIC COMMA..DITTO MARK
+ 3008          ; Pattern_Syntax # Ps       LEFT ANGLE BRACKET
+ 3009          ; Pattern_Syntax # Pe       RIGHT ANGLE BRACKET
+ 300A          ; Pattern_Syntax # Ps       LEFT DOUBLE ANGLE BRACKET
+ 300B          ; Pattern_Syntax # Pe       RIGHT DOUBLE ANGLE BRACKET
+ 300C          ; Pattern_Syntax # Ps       LEFT CORNER BRACKET
+ 300D          ; Pattern_Syntax # Pe       RIGHT CORNER BRACKET
+ 300E          ; Pattern_Syntax # Ps       LEFT WHITE CORNER BRACKET
+ 300F          ; Pattern_Syntax # Pe       RIGHT WHITE CORNER BRACKET
+ 3010          ; Pattern_Syntax # Ps       LEFT BLACK LENTICULAR BRACKET
+ 3011          ; Pattern_Syntax # Pe       RIGHT BLACK LENTICULAR BRACKET
+ 3012..3013    ; Pattern_Syntax # So   [2] POSTAL MARK..GETA MARK
+ 3014          ; Pattern_Syntax # Ps       LEFT TORTOISE SHELL BRACKET
+ 3015          ; Pattern_Syntax # Pe       RIGHT TORTOISE SHELL BRACKET
+ 3016          ; Pattern_Syntax # Ps       LEFT WHITE LENTICULAR BRACKET
+ 3017          ; Pattern_Syntax # Pe       RIGHT WHITE LENTICULAR BRACKET
+ 3018          ; Pattern_Syntax # Ps       LEFT WHITE TORTOISE SHELL BRACKET
+ 3019          ; Pattern_Syntax # Pe       RIGHT WHITE TORTOISE SHELL BRACKET
+ 301A          ; Pattern_Syntax # Ps       LEFT WHITE SQUARE BRACKET
+ 301B          ; Pattern_Syntax # Pe       RIGHT WHITE SQUARE BRACKET
+ 301C          ; Pattern_Syntax # Pd       WAVE DASH
+ 301D          ; Pattern_Syntax # Ps       REVERSED DOUBLE PRIME QUOTATION MARK
+ 301E..301F    ; Pattern_Syntax # Pe   [2] DOUBLE PRIME QUOTATION MARK..LOW DOUBLE PRIME QUOTATION MARK
+ 3020          ; Pattern_Syntax # So       POSTAL MARK FACE
+ 3030          ; Pattern_Syntax # Pd       WAVY DASH
+ FD3E          ; Pattern_Syntax # Pe       ORNATE LEFT PARENTHESIS
+ FD3F          ; Pattern_Syntax # Ps       ORNATE RIGHT PARENTHESIS
+ FE45..FE46    ; Pattern_Syntax # Po   [2] SESAME DOT..WHITE SESAME DOT
+ 
+ # Total code points: 2760
+ 
+ # ================================================
+ 
+ 0600..0605    ; Prepended_Concatenation_Mark # Cf   [6] ARABIC NUMBER SIGN..ARABIC NUMBER MARK ABOVE
+ 06DD          ; Prepended_Concatenation_Mark # Cf       ARABIC END OF AYAH
+ 070F          ; Prepended_Concatenation_Mark # Cf       SYRIAC ABBREVIATION MARK
+ 08E2          ; Prepended_Concatenation_Mark # Cf       ARABIC DISPUTED END OF AYAH
+ 110BD         ; Prepended_Concatenation_Mark # Cf       KAITHI NUMBER SIGN
+ 110CD         ; Prepended_Concatenation_Mark # Cf       KAITHI NUMBER SIGN ABOVE
+ 
+ # Total code points: 11
+ 
+ # ================================================
+ 
+ 1F1E6..1F1FF  ; Regional_Indicator # So  [26] REGIONAL INDICATOR SYMBOL LETTER A..REGIONAL INDICATOR SYMBOL LETTER Z
+ 
+ # Total code points: 26
+ 
+ # EOF
diff -Nrcpad gcc-9.3.0/contrib/unicode/README gcc-10.1.0/contrib/unicode/README
*** gcc-9.3.0/contrib/unicode/README	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/unicode/README	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,44 ----
+ This directory contains a mechanism for GCC to have its own internal
+ implementation of wcwidth functionality.  (cpp_wcwidth () in libcpp/charset.c).
+ 
+ The idea is to produce the necessary lookup table
+ (../../libcpp/generated_cpp_wcwidth.h) in a reproducible way, starting from the
+ following files that are distributed by the Unicode Consortium:
+ 
+ ftp://ftp.unicode.org/Public/UNIDATA/UnicodeData.txt
+ ftp://ftp.unicode.org/Public/UNIDATA/EastAsianWidth.txt
+ ftp://ftp.unicode.org/Public/UNIDATA/PropList.txt
+ 
+ These three files have been added to source control in this directory;
+ please see unicode-license.txt for the relevant copyright information.
+ 
+ In order to keep in sync with glibc's wcwidth as much as possible, it is
+ desirable for the logic that processes the Unicode data to be the same as
+ glibc's.  To that end, we also put in this directory, in the from_glibc/
+ directory, the glibc python code that implements their logic.  This code was
+ copied verbatim from glibc, and it can be updated at any time from the glibc
+ source code repository.  The files copied from that respository are:
+ 
+ localedata/unicode-gen/unicode_utils.py
+ localedata/unicode-gen/utf8_gen.py
+ 
+ And the most recent versions added to GCC are from glibc git commit:
+ 2a764c6ee848dfe92cb2921ed3b14085f15d9e79
+ 
+ Finally, the script gen_wcwidth.py found here contains the GCC-specific code to
+ map glibc's output to the lookup tables we require.  This script should not need
+ to change, unless there are structural changes to the Unicode data files or to
+ the glibc code.
+ 
+ The procedure to update GCC's wcwidth tables is the following:
+ 
+ 1.  Update the three Unicode data files from the above URLs.
+ 
+ 2.  Update the two glibc files in from_glibc/ from glibc's git.  Update
+     the commit number above in this README.
+ 
+ 3.  Run ./gen_wcwidth.py X.Y > ../../libcpp/generated_cpp_wcwidth.h
+     (where X.Y is the version of the Unicode standard corresponding to the
+     Unicode data files being used, most recently, 12.1).
+ 
+ After that, GCC's wcwidth will match the most recent glibc.
diff -Nrcpad gcc-9.3.0/contrib/unicode/UnicodeData.txt gcc-10.1.0/contrib/unicode/UnicodeData.txt
*** gcc-9.3.0/contrib/unicode/UnicodeData.txt	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/unicode/UnicodeData.txt	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,32841 ----
+ 0000;<control>;Cc;0;BN;;;;;N;NULL;;;;
+ 0001;<control>;Cc;0;BN;;;;;N;START OF HEADING;;;;
+ 0002;<control>;Cc;0;BN;;;;;N;START OF TEXT;;;;
+ 0003;<control>;Cc;0;BN;;;;;N;END OF TEXT;;;;
+ 0004;<control>;Cc;0;BN;;;;;N;END OF TRANSMISSION;;;;
+ 0005;<control>;Cc;0;BN;;;;;N;ENQUIRY;;;;
+ 0006;<control>;Cc;0;BN;;;;;N;ACKNOWLEDGE;;;;
+ 0007;<control>;Cc;0;BN;;;;;N;BELL;;;;
+ 0008;<control>;Cc;0;BN;;;;;N;BACKSPACE;;;;
+ 0009;<control>;Cc;0;S;;;;;N;CHARACTER TABULATION;;;;
+ 000A;<control>;Cc;0;B;;;;;N;LINE FEED (LF);;;;
+ 000B;<control>;Cc;0;S;;;;;N;LINE TABULATION;;;;
+ 000C;<control>;Cc;0;WS;;;;;N;FORM FEED (FF);;;;
+ 000D;<control>;Cc;0;B;;;;;N;CARRIAGE RETURN (CR);;;;
+ 000E;<control>;Cc;0;BN;;;;;N;SHIFT OUT;;;;
+ 000F;<control>;Cc;0;BN;;;;;N;SHIFT IN;;;;
+ 0010;<control>;Cc;0;BN;;;;;N;DATA LINK ESCAPE;;;;
+ 0011;<control>;Cc;0;BN;;;;;N;DEVICE CONTROL ONE;;;;
+ 0012;<control>;Cc;0;BN;;;;;N;DEVICE CONTROL TWO;;;;
+ 0013;<control>;Cc;0;BN;;;;;N;DEVICE CONTROL THREE;;;;
+ 0014;<control>;Cc;0;BN;;;;;N;DEVICE CONTROL FOUR;;;;
+ 0015;<control>;Cc;0;BN;;;;;N;NEGATIVE ACKNOWLEDGE;;;;
+ 0016;<control>;Cc;0;BN;;;;;N;SYNCHRONOUS IDLE;;;;
+ 0017;<control>;Cc;0;BN;;;;;N;END OF TRANSMISSION BLOCK;;;;
+ 0018;<control>;Cc;0;BN;;;;;N;CANCEL;;;;
+ 0019;<control>;Cc;0;BN;;;;;N;END OF MEDIUM;;;;
+ 001A;<control>;Cc;0;BN;;;;;N;SUBSTITUTE;;;;
+ 001B;<control>;Cc;0;BN;;;;;N;ESCAPE;;;;
+ 001C;<control>;Cc;0;B;;;;;N;INFORMATION SEPARATOR FOUR;;;;
+ 001D;<control>;Cc;0;B;;;;;N;INFORMATION SEPARATOR THREE;;;;
+ 001E;<control>;Cc;0;B;;;;;N;INFORMATION SEPARATOR TWO;;;;
+ 001F;<control>;Cc;0;S;;;;;N;INFORMATION SEPARATOR ONE;;;;
+ 0020;SPACE;Zs;0;WS;;;;;N;;;;;
+ 0021;EXCLAMATION MARK;Po;0;ON;;;;;N;;;;;
+ 0022;QUOTATION MARK;Po;0;ON;;;;;N;;;;;
+ 0023;NUMBER SIGN;Po;0;ET;;;;;N;;;;;
+ 0024;DOLLAR SIGN;Sc;0;ET;;;;;N;;;;;
+ 0025;PERCENT SIGN;Po;0;ET;;;;;N;;;;;
+ 0026;AMPERSAND;Po;0;ON;;;;;N;;;;;
+ 0027;APOSTROPHE;Po;0;ON;;;;;N;APOSTROPHE-QUOTE;;;;
+ 0028;LEFT PARENTHESIS;Ps;0;ON;;;;;Y;OPENING PARENTHESIS;;;;
+ 0029;RIGHT PARENTHESIS;Pe;0;ON;;;;;Y;CLOSING PARENTHESIS;;;;
+ 002A;ASTERISK;Po;0;ON;;;;;N;;;;;
+ 002B;PLUS SIGN;Sm;0;ES;;;;;N;;;;;
+ 002C;COMMA;Po;0;CS;;;;;N;;;;;
+ 002D;HYPHEN-MINUS;Pd;0;ES;;;;;N;;;;;
+ 002E;FULL STOP;Po;0;CS;;;;;N;PERIOD;;;;
+ 002F;SOLIDUS;Po;0;CS;;;;;N;SLASH;;;;
+ 0030;DIGIT ZERO;Nd;0;EN;;0;0;0;N;;;;;
+ 0031;DIGIT ONE;Nd;0;EN;;1;1;1;N;;;;;
+ 0032;DIGIT TWO;Nd;0;EN;;2;2;2;N;;;;;
+ 0033;DIGIT THREE;Nd;0;EN;;3;3;3;N;;;;;
+ 0034;DIGIT FOUR;Nd;0;EN;;4;4;4;N;;;;;
+ 0035;DIGIT FIVE;Nd;0;EN;;5;5;5;N;;;;;
+ 0036;DIGIT SIX;Nd;0;EN;;6;6;6;N;;;;;
+ 0037;DIGIT SEVEN;Nd;0;EN;;7;7;7;N;;;;;
+ 0038;DIGIT EIGHT;Nd;0;EN;;8;8;8;N;;;;;
+ 0039;DIGIT NINE;Nd;0;EN;;9;9;9;N;;;;;
+ 003A;COLON;Po;0;CS;;;;;N;;;;;
+ 003B;SEMICOLON;Po;0;ON;;;;;N;;;;;
+ 003C;LESS-THAN SIGN;Sm;0;ON;;;;;Y;;;;;
+ 003D;EQUALS SIGN;Sm;0;ON;;;;;N;;;;;
+ 003E;GREATER-THAN SIGN;Sm;0;ON;;;;;Y;;;;;
+ 003F;QUESTION MARK;Po;0;ON;;;;;N;;;;;
+ 0040;COMMERCIAL AT;Po;0;ON;;;;;N;;;;;
+ 0041;LATIN CAPITAL LETTER A;Lu;0;L;;;;;N;;;;0061;
+ 0042;LATIN CAPITAL LETTER B;Lu;0;L;;;;;N;;;;0062;
+ 0043;LATIN CAPITAL LETTER C;Lu;0;L;;;;;N;;;;0063;
+ 0044;LATIN CAPITAL LETTER D;Lu;0;L;;;;;N;;;;0064;
+ 0045;LATIN CAPITAL LETTER E;Lu;0;L;;;;;N;;;;0065;
+ 0046;LATIN CAPITAL LETTER F;Lu;0;L;;;;;N;;;;0066;
+ 0047;LATIN CAPITAL LETTER G;Lu;0;L;;;;;N;;;;0067;
+ 0048;LATIN CAPITAL LETTER H;Lu;0;L;;;;;N;;;;0068;
+ 0049;LATIN CAPITAL LETTER I;Lu;0;L;;;;;N;;;;0069;
+ 004A;LATIN CAPITAL LETTER J;Lu;0;L;;;;;N;;;;006A;
+ 004B;LATIN CAPITAL LETTER K;Lu;0;L;;;;;N;;;;006B;
+ 004C;LATIN CAPITAL LETTER L;Lu;0;L;;;;;N;;;;006C;
+ 004D;LATIN CAPITAL LETTER M;Lu;0;L;;;;;N;;;;006D;
+ 004E;LATIN CAPITAL LETTER N;Lu;0;L;;;;;N;;;;006E;
+ 004F;LATIN CAPITAL LETTER O;Lu;0;L;;;;;N;;;;006F;
+ 0050;LATIN CAPITAL LETTER P;Lu;0;L;;;;;N;;;;0070;
+ 0051;LATIN CAPITAL LETTER Q;Lu;0;L;;;;;N;;;;0071;
+ 0052;LATIN CAPITAL LETTER R;Lu;0;L;;;;;N;;;;0072;
+ 0053;LATIN CAPITAL LETTER S;Lu;0;L;;;;;N;;;;0073;
+ 0054;LATIN CAPITAL LETTER T;Lu;0;L;;;;;N;;;;0074;
+ 0055;LATIN CAPITAL LETTER U;Lu;0;L;;;;;N;;;;0075;
+ 0056;LATIN CAPITAL LETTER V;Lu;0;L;;;;;N;;;;0076;
+ 0057;LATIN CAPITAL LETTER W;Lu;0;L;;;;;N;;;;0077;
+ 0058;LATIN CAPITAL LETTER X;Lu;0;L;;;;;N;;;;0078;
+ 0059;LATIN CAPITAL LETTER Y;Lu;0;L;;;;;N;;;;0079;
+ 005A;LATIN CAPITAL LETTER Z;Lu;0;L;;;;;N;;;;007A;
+ 005B;LEFT SQUARE BRACKET;Ps;0;ON;;;;;Y;OPENING SQUARE BRACKET;;;;
+ 005C;REVERSE SOLIDUS;Po;0;ON;;;;;N;BACKSLASH;;;;
+ 005D;RIGHT SQUARE BRACKET;Pe;0;ON;;;;;Y;CLOSING SQUARE BRACKET;;;;
+ 005E;CIRCUMFLEX ACCENT;Sk;0;ON;;;;;N;SPACING CIRCUMFLEX;;;;
+ 005F;LOW LINE;Pc;0;ON;;;;;N;SPACING UNDERSCORE;;;;
+ 0060;GRAVE ACCENT;Sk;0;ON;;;;;N;SPACING GRAVE;;;;
+ 0061;LATIN SMALL LETTER A;Ll;0;L;;;;;N;;;0041;;0041
+ 0062;LATIN SMALL LETTER B;Ll;0;L;;;;;N;;;0042;;0042
+ 0063;LATIN SMALL LETTER C;Ll;0;L;;;;;N;;;0043;;0043
+ 0064;LATIN SMALL LETTER D;Ll;0;L;;;;;N;;;0044;;0044
+ 0065;LATIN SMALL LETTER E;Ll;0;L;;;;;N;;;0045;;0045
+ 0066;LATIN SMALL LETTER F;Ll;0;L;;;;;N;;;0046;;0046
+ 0067;LATIN SMALL LETTER G;Ll;0;L;;;;;N;;;0047;;0047
+ 0068;LATIN SMALL LETTER H;Ll;0;L;;;;;N;;;0048;;0048
+ 0069;LATIN SMALL LETTER I;Ll;0;L;;;;;N;;;0049;;0049
+ 006A;LATIN SMALL LETTER J;Ll;0;L;;;;;N;;;004A;;004A
+ 006B;LATIN SMALL LETTER K;Ll;0;L;;;;;N;;;004B;;004B
+ 006C;LATIN SMALL LETTER L;Ll;0;L;;;;;N;;;004C;;004C
+ 006D;LATIN SMALL LETTER M;Ll;0;L;;;;;N;;;004D;;004D
+ 006E;LATIN SMALL LETTER N;Ll;0;L;;;;;N;;;004E;;004E
+ 006F;LATIN SMALL LETTER O;Ll;0;L;;;;;N;;;004F;;004F
+ 0070;LATIN SMALL LETTER P;Ll;0;L;;;;;N;;;0050;;0050
+ 0071;LATIN SMALL LETTER Q;Ll;0;L;;;;;N;;;0051;;0051
+ 0072;LATIN SMALL LETTER R;Ll;0;L;;;;;N;;;0052;;0052
+ 0073;LATIN SMALL LETTER S;Ll;0;L;;;;;N;;;0053;;0053
+ 0074;LATIN SMALL LETTER T;Ll;0;L;;;;;N;;;0054;;0054
+ 0075;LATIN SMALL LETTER U;Ll;0;L;;;;;N;;;0055;;0055
+ 0076;LATIN SMALL LETTER V;Ll;0;L;;;;;N;;;0056;;0056
+ 0077;LATIN SMALL LETTER W;Ll;0;L;;;;;N;;;0057;;0057
+ 0078;LATIN SMALL LETTER X;Ll;0;L;;;;;N;;;0058;;0058
+ 0079;LATIN SMALL LETTER Y;Ll;0;L;;;;;N;;;0059;;0059
+ 007A;LATIN SMALL LETTER Z;Ll;0;L;;;;;N;;;005A;;005A
+ 007B;LEFT CURLY BRACKET;Ps;0;ON;;;;;Y;OPENING CURLY BRACKET;;;;
+ 007C;VERTICAL LINE;Sm;0;ON;;;;;N;VERTICAL BAR;;;;
+ 007D;RIGHT CURLY BRACKET;Pe;0;ON;;;;;Y;CLOSING CURLY BRACKET;;;;
+ 007E;TILDE;Sm;0;ON;;;;;N;;;;;
+ 007F;<control>;Cc;0;BN;;;;;N;DELETE;;;;
+ 0080;<control>;Cc;0;BN;;;;;N;;;;;
+ 0081;<control>;Cc;0;BN;;;;;N;;;;;
+ 0082;<control>;Cc;0;BN;;;;;N;BREAK PERMITTED HERE;;;;
+ 0083;<control>;Cc;0;BN;;;;;N;NO BREAK HERE;;;;
+ 0084;<control>;Cc;0;BN;;;;;N;;;;;
+ 0085;<control>;Cc;0;B;;;;;N;NEXT LINE (NEL);;;;
+ 0086;<control>;Cc;0;BN;;;;;N;START OF SELECTED AREA;;;;
+ 0087;<control>;Cc;0;BN;;;;;N;END OF SELECTED AREA;;;;
+ 0088;<control>;Cc;0;BN;;;;;N;CHARACTER TABULATION SET;;;;
+ 0089;<control>;Cc;0;BN;;;;;N;CHARACTER TABULATION WITH JUSTIFICATION;;;;
+ 008A;<control>;Cc;0;BN;;;;;N;LINE TABULATION SET;;;;
+ 008B;<control>;Cc;0;BN;;;;;N;PARTIAL LINE FORWARD;;;;
+ 008C;<control>;Cc;0;BN;;;;;N;PARTIAL LINE BACKWARD;;;;
+ 008D;<control>;Cc;0;BN;;;;;N;REVERSE LINE FEED;;;;
+ 008E;<control>;Cc;0;BN;;;;;N;SINGLE SHIFT TWO;;;;
+ 008F;<control>;Cc;0;BN;;;;;N;SINGLE SHIFT THREE;;;;
+ 0090;<control>;Cc;0;BN;;;;;N;DEVICE CONTROL STRING;;;;
+ 0091;<control>;Cc;0;BN;;;;;N;PRIVATE USE ONE;;;;
+ 0092;<control>;Cc;0;BN;;;;;N;PRIVATE USE TWO;;;;
+ 0093;<control>;Cc;0;BN;;;;;N;SET TRANSMIT STATE;;;;
+ 0094;<control>;Cc;0;BN;;;;;N;CANCEL CHARACTER;;;;
+ 0095;<control>;Cc;0;BN;;;;;N;MESSAGE WAITING;;;;
+ 0096;<control>;Cc;0;BN;;;;;N;START OF GUARDED AREA;;;;
+ 0097;<control>;Cc;0;BN;;;;;N;END OF GUARDED AREA;;;;
+ 0098;<control>;Cc;0;BN;;;;;N;START OF STRING;;;;
+ 0099;<control>;Cc;0;BN;;;;;N;;;;;
+ 009A;<control>;Cc;0;BN;;;;;N;SINGLE CHARACTER INTRODUCER;;;;
+ 009B;<control>;Cc;0;BN;;;;;N;CONTROL SEQUENCE INTRODUCER;;;;
+ 009C;<control>;Cc;0;BN;;;;;N;STRING TERMINATOR;;;;
+ 009D;<control>;Cc;0;BN;;;;;N;OPERATING SYSTEM COMMAND;;;;
+ 009E;<control>;Cc;0;BN;;;;;N;PRIVACY MESSAGE;;;;
+ 009F;<control>;Cc;0;BN;;;;;N;APPLICATION PROGRAM COMMAND;;;;
+ 00A0;NO-BREAK SPACE;Zs;0;CS;<noBreak> 0020;;;;N;NON-BREAKING SPACE;;;;
+ 00A1;INVERTED EXCLAMATION MARK;Po;0;ON;;;;;N;;;;;
+ 00A2;CENT SIGN;Sc;0;ET;;;;;N;;;;;
+ 00A3;POUND SIGN;Sc;0;ET;;;;;N;;;;;
+ 00A4;CURRENCY SIGN;Sc;0;ET;;;;;N;;;;;
+ 00A5;YEN SIGN;Sc;0;ET;;;;;N;;;;;
+ 00A6;BROKEN BAR;So;0;ON;;;;;N;BROKEN VERTICAL BAR;;;;
+ 00A7;SECTION SIGN;Po;0;ON;;;;;N;;;;;
+ 00A8;DIAERESIS;Sk;0;ON;<compat> 0020 0308;;;;N;SPACING DIAERESIS;;;;
+ 00A9;COPYRIGHT SIGN;So;0;ON;;;;;N;;;;;
+ 00AA;FEMININE ORDINAL INDICATOR;Lo;0;L;<super> 0061;;;;N;;;;;
+ 00AB;LEFT-POINTING DOUBLE ANGLE QUOTATION MARK;Pi;0;ON;;;;;Y;LEFT POINTING GUILLEMET;;;;
+ 00AC;NOT SIGN;Sm;0;ON;;;;;N;;;;;
+ 00AD;SOFT HYPHEN;Cf;0;BN;;;;;N;;;;;
+ 00AE;REGISTERED SIGN;So;0;ON;;;;;N;REGISTERED TRADE MARK SIGN;;;;
+ 00AF;MACRON;Sk;0;ON;<compat> 0020 0304;;;;N;SPACING MACRON;;;;
+ 00B0;DEGREE SIGN;So;0;ET;;;;;N;;;;;
+ 00B1;PLUS-MINUS SIGN;Sm;0;ET;;;;;N;PLUS-OR-MINUS SIGN;;;;
+ 00B2;SUPERSCRIPT TWO;No;0;EN;<super> 0032;;2;2;N;SUPERSCRIPT DIGIT TWO;;;;
+ 00B3;SUPERSCRIPT THREE;No;0;EN;<super> 0033;;3;3;N;SUPERSCRIPT DIGIT THREE;;;;
+ 00B4;ACUTE ACCENT;Sk;0;ON;<compat> 0020 0301;;;;N;SPACING ACUTE;;;;
+ 00B5;MICRO SIGN;Ll;0;L;<compat> 03BC;;;;N;;;039C;;039C
+ 00B6;PILCROW SIGN;Po;0;ON;;;;;N;PARAGRAPH SIGN;;;;
+ 00B7;MIDDLE DOT;Po;0;ON;;;;;N;;;;;
+ 00B8;CEDILLA;Sk;0;ON;<compat> 0020 0327;;;;N;SPACING CEDILLA;;;;
+ 00B9;SUPERSCRIPT ONE;No;0;EN;<super> 0031;;1;1;N;SUPERSCRIPT DIGIT ONE;;;;
+ 00BA;MASCULINE ORDINAL INDICATOR;Lo;0;L;<super> 006F;;;;N;;;;;
+ 00BB;RIGHT-POINTING DOUBLE ANGLE QUOTATION MARK;Pf;0;ON;;;;;Y;RIGHT POINTING GUILLEMET;;;;
+ 00BC;VULGAR FRACTION ONE QUARTER;No;0;ON;<fraction> 0031 2044 0034;;;1/4;N;FRACTION ONE QUARTER;;;;
+ 00BD;VULGAR FRACTION ONE HALF;No;0;ON;<fraction> 0031 2044 0032;;;1/2;N;FRACTION ONE HALF;;;;
+ 00BE;VULGAR FRACTION THREE QUARTERS;No;0;ON;<fraction> 0033 2044 0034;;;3/4;N;FRACTION THREE QUARTERS;;;;
+ 00BF;INVERTED QUESTION MARK;Po;0;ON;;;;;N;;;;;
+ 00C0;LATIN CAPITAL LETTER A WITH GRAVE;Lu;0;L;0041 0300;;;;N;LATIN CAPITAL LETTER A GRAVE;;;00E0;
+ 00C1;LATIN CAPITAL LETTER A WITH ACUTE;Lu;0;L;0041 0301;;;;N;LATIN CAPITAL LETTER A ACUTE;;;00E1;
+ 00C2;LATIN CAPITAL LETTER A WITH CIRCUMFLEX;Lu;0;L;0041 0302;;;;N;LATIN CAPITAL LETTER A CIRCUMFLEX;;;00E2;
+ 00C3;LATIN CAPITAL LETTER A WITH TILDE;Lu;0;L;0041 0303;;;;N;LATIN CAPITAL LETTER A TILDE;;;00E3;
+ 00C4;LATIN CAPITAL LETTER A WITH DIAERESIS;Lu;0;L;0041 0308;;;;N;LATIN CAPITAL LETTER A DIAERESIS;;;00E4;
+ 00C5;LATIN CAPITAL LETTER A WITH RING ABOVE;Lu;0;L;0041 030A;;;;N;LATIN CAPITAL LETTER A RING;;;00E5;
+ 00C6;LATIN CAPITAL LETTER AE;Lu;0;L;;;;;N;LATIN CAPITAL LETTER A E;;;00E6;
+ 00C7;LATIN CAPITAL LETTER C WITH CEDILLA;Lu;0;L;0043 0327;;;;N;LATIN CAPITAL LETTER C CEDILLA;;;00E7;
+ 00C8;LATIN CAPITAL LETTER E WITH GRAVE;Lu;0;L;0045 0300;;;;N;LATIN CAPITAL LETTER E GRAVE;;;00E8;
+ 00C9;LATIN CAPITAL LETTER E WITH ACUTE;Lu;0;L;0045 0301;;;;N;LATIN CAPITAL LETTER E ACUTE;;;00E9;
+ 00CA;LATIN CAPITAL LETTER E WITH CIRCUMFLEX;Lu;0;L;0045 0302;;;;N;LATIN CAPITAL LETTER E CIRCUMFLEX;;;00EA;
+ 00CB;LATIN CAPITAL LETTER E WITH DIAERESIS;Lu;0;L;0045 0308;;;;N;LATIN CAPITAL LETTER E DIAERESIS;;;00EB;
+ 00CC;LATIN CAPITAL LETTER I WITH GRAVE;Lu;0;L;0049 0300;;;;N;LATIN CAPITAL LETTER I GRAVE;;;00EC;
+ 00CD;LATIN CAPITAL LETTER I WITH ACUTE;Lu;0;L;0049 0301;;;;N;LATIN CAPITAL LETTER I ACUTE;;;00ED;
+ 00CE;LATIN CAPITAL LETTER I WITH CIRCUMFLEX;Lu;0;L;0049 0302;;;;N;LATIN CAPITAL LETTER I CIRCUMFLEX;;;00EE;
+ 00CF;LATIN CAPITAL LETTER I WITH DIAERESIS;Lu;0;L;0049 0308;;;;N;LATIN CAPITAL LETTER I DIAERESIS;;;00EF;
+ 00D0;LATIN CAPITAL LETTER ETH;Lu;0;L;;;;;N;;;;00F0;
+ 00D1;LATIN CAPITAL LETTER N WITH TILDE;Lu;0;L;004E 0303;;;;N;LATIN CAPITAL LETTER N TILDE;;;00F1;
+ 00D2;LATIN CAPITAL LETTER O WITH GRAVE;Lu;0;L;004F 0300;;;;N;LATIN CAPITAL LETTER O GRAVE;;;00F2;
+ 00D3;LATIN CAPITAL LETTER O WITH ACUTE;Lu;0;L;004F 0301;;;;N;LATIN CAPITAL LETTER O ACUTE;;;00F3;
+ 00D4;LATIN CAPITAL LETTER O WITH CIRCUMFLEX;Lu;0;L;004F 0302;;;;N;LATIN CAPITAL LETTER O CIRCUMFLEX;;;00F4;
+ 00D5;LATIN CAPITAL LETTER O WITH TILDE;Lu;0;L;004F 0303;;;;N;LATIN CAPITAL LETTER O TILDE;;;00F5;
+ 00D6;LATIN CAPITAL LETTER O WITH DIAERESIS;Lu;0;L;004F 0308;;;;N;LATIN CAPITAL LETTER O DIAERESIS;;;00F6;
+ 00D7;MULTIPLICATION SIGN;Sm;0;ON;;;;;N;;;;;
+ 00D8;LATIN CAPITAL LETTER O WITH STROKE;Lu;0;L;;;;;N;LATIN CAPITAL LETTER O SLASH;;;00F8;
+ 00D9;LATIN CAPITAL LETTER U WITH GRAVE;Lu;0;L;0055 0300;;;;N;LATIN CAPITAL LETTER U GRAVE;;;00F9;
+ 00DA;LATIN CAPITAL LETTER U WITH ACUTE;Lu;0;L;0055 0301;;;;N;LATIN CAPITAL LETTER U ACUTE;;;00FA;
+ 00DB;LATIN CAPITAL LETTER U WITH CIRCUMFLEX;Lu;0;L;0055 0302;;;;N;LATIN CAPITAL LETTER U CIRCUMFLEX;;;00FB;
+ 00DC;LATIN CAPITAL LETTER U WITH DIAERESIS;Lu;0;L;0055 0308;;;;N;LATIN CAPITAL LETTER U DIAERESIS;;;00FC;
+ 00DD;LATIN CAPITAL LETTER Y WITH ACUTE;Lu;0;L;0059 0301;;;;N;LATIN CAPITAL LETTER Y ACUTE;;;00FD;
+ 00DE;LATIN CAPITAL LETTER THORN;Lu;0;L;;;;;N;;;;00FE;
+ 00DF;LATIN SMALL LETTER SHARP S;Ll;0;L;;;;;N;;;;;
+ 00E0;LATIN SMALL LETTER A WITH GRAVE;Ll;0;L;0061 0300;;;;N;LATIN SMALL LETTER A GRAVE;;00C0;;00C0
+ 00E1;LATIN SMALL LETTER A WITH ACUTE;Ll;0;L;0061 0301;;;;N;LATIN SMALL LETTER A ACUTE;;00C1;;00C1
+ 00E2;LATIN SMALL LETTER A WITH CIRCUMFLEX;Ll;0;L;0061 0302;;;;N;LATIN SMALL LETTER A CIRCUMFLEX;;00C2;;00C2
+ 00E3;LATIN SMALL LETTER A WITH TILDE;Ll;0;L;0061 0303;;;;N;LATIN SMALL LETTER A TILDE;;00C3;;00C3
+ 00E4;LATIN SMALL LETTER A WITH DIAERESIS;Ll;0;L;0061 0308;;;;N;LATIN SMALL LETTER A DIAERESIS;;00C4;;00C4
+ 00E5;LATIN SMALL LETTER A WITH RING ABOVE;Ll;0;L;0061 030A;;;;N;LATIN SMALL LETTER A RING;;00C5;;00C5
+ 00E6;LATIN SMALL LETTER AE;Ll;0;L;;;;;N;LATIN SMALL LETTER A E;;00C6;;00C6
+ 00E7;LATIN SMALL LETTER C WITH CEDILLA;Ll;0;L;0063 0327;;;;N;LATIN SMALL LETTER C CEDILLA;;00C7;;00C7
+ 00E8;LATIN SMALL LETTER E WITH GRAVE;Ll;0;L;0065 0300;;;;N;LATIN SMALL LETTER E GRAVE;;00C8;;00C8
+ 00E9;LATIN SMALL LETTER E WITH ACUTE;Ll;0;L;0065 0301;;;;N;LATIN SMALL LETTER E ACUTE;;00C9;;00C9
+ 00EA;LATIN SMALL LETTER E WITH CIRCUMFLEX;Ll;0;L;0065 0302;;;;N;LATIN SMALL LETTER E CIRCUMFLEX;;00CA;;00CA
+ 00EB;LATIN SMALL LETTER E WITH DIAERESIS;Ll;0;L;0065 0308;;;;N;LATIN SMALL LETTER E DIAERESIS;;00CB;;00CB
+ 00EC;LATIN SMALL LETTER I WITH GRAVE;Ll;0;L;0069 0300;;;;N;LATIN SMALL LETTER I GRAVE;;00CC;;00CC
+ 00ED;LATIN SMALL LETTER I WITH ACUTE;Ll;0;L;0069 0301;;;;N;LATIN SMALL LETTER I ACUTE;;00CD;;00CD
+ 00EE;LATIN SMALL LETTER I WITH CIRCUMFLEX;Ll;0;L;0069 0302;;;;N;LATIN SMALL LETTER I CIRCUMFLEX;;00CE;;00CE
+ 00EF;LATIN SMALL LETTER I WITH DIAERESIS;Ll;0;L;0069 0308;;;;N;LATIN SMALL LETTER I DIAERESIS;;00CF;;00CF
+ 00F0;LATIN SMALL LETTER ETH;Ll;0;L;;;;;N;;;00D0;;00D0
+ 00F1;LATIN SMALL LETTER N WITH TILDE;Ll;0;L;006E 0303;;;;N;LATIN SMALL LETTER N TILDE;;00D1;;00D1
+ 00F2;LATIN SMALL LETTER O WITH GRAVE;Ll;0;L;006F 0300;;;;N;LATIN SMALL LETTER O GRAVE;;00D2;;00D2
+ 00F3;LATIN SMALL LETTER O WITH ACUTE;Ll;0;L;006F 0301;;;;N;LATIN SMALL LETTER O ACUTE;;00D3;;00D3
+ 00F4;LATIN SMALL LETTER O WITH CIRCUMFLEX;Ll;0;L;006F 0302;;;;N;LATIN SMALL LETTER O CIRCUMFLEX;;00D4;;00D4
+ 00F5;LATIN SMALL LETTER O WITH TILDE;Ll;0;L;006F 0303;;;;N;LATIN SMALL LETTER O TILDE;;00D5;;00D5
+ 00F6;LATIN SMALL LETTER O WITH DIAERESIS;Ll;0;L;006F 0308;;;;N;LATIN SMALL LETTER O DIAERESIS;;00D6;;00D6
+ 00F7;DIVISION SIGN;Sm;0;ON;;;;;N;;;;;
+ 00F8;LATIN SMALL LETTER O WITH STROKE;Ll;0;L;;;;;N;LATIN SMALL LETTER O SLASH;;00D8;;00D8
+ 00F9;LATIN SMALL LETTER U WITH GRAVE;Ll;0;L;0075 0300;;;;N;LATIN SMALL LETTER U GRAVE;;00D9;;00D9
+ 00FA;LATIN SMALL LETTER U WITH ACUTE;Ll;0;L;0075 0301;;;;N;LATIN SMALL LETTER U ACUTE;;00DA;;00DA
+ 00FB;LATIN SMALL LETTER U WITH CIRCUMFLEX;Ll;0;L;0075 0302;;;;N;LATIN SMALL LETTER U CIRCUMFLEX;;00DB;;00DB
+ 00FC;LATIN SMALL LETTER U WITH DIAERESIS;Ll;0;L;0075 0308;;;;N;LATIN SMALL LETTER U DIAERESIS;;00DC;;00DC
+ 00FD;LATIN SMALL LETTER Y WITH ACUTE;Ll;0;L;0079 0301;;;;N;LATIN SMALL LETTER Y ACUTE;;00DD;;00DD
+ 00FE;LATIN SMALL LETTER THORN;Ll;0;L;;;;;N;;;00DE;;00DE
+ 00FF;LATIN SMALL LETTER Y WITH DIAERESIS;Ll;0;L;0079 0308;;;;N;LATIN SMALL LETTER Y DIAERESIS;;0178;;0178
+ 0100;LATIN CAPITAL LETTER A WITH MACRON;Lu;0;L;0041 0304;;;;N;LATIN CAPITAL LETTER A MACRON;;;0101;
+ 0101;LATIN SMALL LETTER A WITH MACRON;Ll;0;L;0061 0304;;;;N;LATIN SMALL LETTER A MACRON;;0100;;0100
+ 0102;LATIN CAPITAL LETTER A WITH BREVE;Lu;0;L;0041 0306;;;;N;LATIN CAPITAL LETTER A BREVE;;;0103;
+ 0103;LATIN SMALL LETTER A WITH BREVE;Ll;0;L;0061 0306;;;;N;LATIN SMALL LETTER A BREVE;;0102;;0102
+ 0104;LATIN CAPITAL LETTER A WITH OGONEK;Lu;0;L;0041 0328;;;;N;LATIN CAPITAL LETTER A OGONEK;;;0105;
+ 0105;LATIN SMALL LETTER A WITH OGONEK;Ll;0;L;0061 0328;;;;N;LATIN SMALL LETTER A OGONEK;;0104;;0104
+ 0106;LATIN CAPITAL LETTER C WITH ACUTE;Lu;0;L;0043 0301;;;;N;LATIN CAPITAL LETTER C ACUTE;;;0107;
+ 0107;LATIN SMALL LETTER C WITH ACUTE;Ll;0;L;0063 0301;;;;N;LATIN SMALL LETTER C ACUTE;;0106;;0106
+ 0108;LATIN CAPITAL LETTER C WITH CIRCUMFLEX;Lu;0;L;0043 0302;;;;N;LATIN CAPITAL LETTER C CIRCUMFLEX;;;0109;
+ 0109;LATIN SMALL LETTER C WITH CIRCUMFLEX;Ll;0;L;0063 0302;;;;N;LATIN SMALL LETTER C CIRCUMFLEX;;0108;;0108
+ 010A;LATIN CAPITAL LETTER C WITH DOT ABOVE;Lu;0;L;0043 0307;;;;N;LATIN CAPITAL LETTER C DOT;;;010B;
+ 010B;LATIN SMALL LETTER C WITH DOT ABOVE;Ll;0;L;0063 0307;;;;N;LATIN SMALL LETTER C DOT;;010A;;010A
+ 010C;LATIN CAPITAL LETTER C WITH CARON;Lu;0;L;0043 030C;;;;N;LATIN CAPITAL LETTER C HACEK;;;010D;
+ 010D;LATIN SMALL LETTER C WITH CARON;Ll;0;L;0063 030C;;;;N;LATIN SMALL LETTER C HACEK;;010C;;010C
+ 010E;LATIN CAPITAL LETTER D WITH CARON;Lu;0;L;0044 030C;;;;N;LATIN CAPITAL LETTER D HACEK;;;010F;
+ 010F;LATIN SMALL LETTER D WITH CARON;Ll;0;L;0064 030C;;;;N;LATIN SMALL LETTER D HACEK;;010E;;010E
+ 0110;LATIN CAPITAL LETTER D WITH STROKE;Lu;0;L;;;;;N;LATIN CAPITAL LETTER D BAR;;;0111;
+ 0111;LATIN SMALL LETTER D WITH STROKE;Ll;0;L;;;;;N;LATIN SMALL LETTER D BAR;;0110;;0110
+ 0112;LATIN CAPITAL LETTER E WITH MACRON;Lu;0;L;0045 0304;;;;N;LATIN CAPITAL LETTER E MACRON;;;0113;
+ 0113;LATIN SMALL LETTER E WITH MACRON;Ll;0;L;0065 0304;;;;N;LATIN SMALL LETTER E MACRON;;0112;;0112
+ 0114;LATIN CAPITAL LETTER E WITH BREVE;Lu;0;L;0045 0306;;;;N;LATIN CAPITAL LETTER E BREVE;;;0115;
+ 0115;LATIN SMALL LETTER E WITH BREVE;Ll;0;L;0065 0306;;;;N;LATIN SMALL LETTER E BREVE;;0114;;0114
+ 0116;LATIN CAPITAL LETTER E WITH DOT ABOVE;Lu;0;L;0045 0307;;;;N;LATIN CAPITAL LETTER E DOT;;;0117;
+ 0117;LATIN SMALL LETTER E WITH DOT ABOVE;Ll;0;L;0065 0307;;;;N;LATIN SMALL LETTER E DOT;;0116;;0116
+ 0118;LATIN CAPITAL LETTER E WITH OGONEK;Lu;0;L;0045 0328;;;;N;LATIN CAPITAL LETTER E OGONEK;;;0119;
+ 0119;LATIN SMALL LETTER E WITH OGONEK;Ll;0;L;0065 0328;;;;N;LATIN SMALL LETTER E OGONEK;;0118;;0118
+ 011A;LATIN CAPITAL LETTER E WITH CARON;Lu;0;L;0045 030C;;;;N;LATIN CAPITAL LETTER E HACEK;;;011B;
+ 011B;LATIN SMALL LETTER E WITH CARON;Ll;0;L;0065 030C;;;;N;LATIN SMALL LETTER E HACEK;;011A;;011A
+ 011C;LATIN CAPITAL LETTER G WITH CIRCUMFLEX;Lu;0;L;0047 0302;;;;N;LATIN CAPITAL LETTER G CIRCUMFLEX;;;011D;
+ 011D;LATIN SMALL LETTER G WITH CIRCUMFLEX;Ll;0;L;0067 0302;;;;N;LATIN SMALL LETTER G CIRCUMFLEX;;011C;;011C
+ 011E;LATIN CAPITAL LETTER G WITH BREVE;Lu;0;L;0047 0306;;;;N;LATIN CAPITAL LETTER G BREVE;;;011F;
+ 011F;LATIN SMALL LETTER G WITH BREVE;Ll;0;L;0067 0306;;;;N;LATIN SMALL LETTER G BREVE;;011E;;011E
+ 0120;LATIN CAPITAL LETTER G WITH DOT ABOVE;Lu;0;L;0047 0307;;;;N;LATIN CAPITAL LETTER G DOT;;;0121;
+ 0121;LATIN SMALL LETTER G WITH DOT ABOVE;Ll;0;L;0067 0307;;;;N;LATIN SMALL LETTER G DOT;;0120;;0120
+ 0122;LATIN CAPITAL LETTER G WITH CEDILLA;Lu;0;L;0047 0327;;;;N;LATIN CAPITAL LETTER G CEDILLA;;;0123;
+ 0123;LATIN SMALL LETTER G WITH CEDILLA;Ll;0;L;0067 0327;;;;N;LATIN SMALL LETTER G CEDILLA;;0122;;0122
+ 0124;LATIN CAPITAL LETTER H WITH CIRCUMFLEX;Lu;0;L;0048 0302;;;;N;LATIN CAPITAL LETTER H CIRCUMFLEX;;;0125;
+ 0125;LATIN SMALL LETTER H WITH CIRCUMFLEX;Ll;0;L;0068 0302;;;;N;LATIN SMALL LETTER H CIRCUMFLEX;;0124;;0124
+ 0126;LATIN CAPITAL LETTER H WITH STROKE;Lu;0;L;;;;;N;LATIN CAPITAL LETTER H BAR;;;0127;
+ 0127;LATIN SMALL LETTER H WITH STROKE;Ll;0;L;;;;;N;LATIN SMALL LETTER H BAR;;0126;;0126
+ 0128;LATIN CAPITAL LETTER I WITH TILDE;Lu;0;L;0049 0303;;;;N;LATIN CAPITAL LETTER I TILDE;;;0129;
+ 0129;LATIN SMALL LETTER I WITH TILDE;Ll;0;L;0069 0303;;;;N;LATIN SMALL LETTER I TILDE;;0128;;0128
+ 012A;LATIN CAPITAL LETTER I WITH MACRON;Lu;0;L;0049 0304;;;;N;LATIN CAPITAL LETTER I MACRON;;;012B;
+ 012B;LATIN SMALL LETTER I WITH MACRON;Ll;0;L;0069 0304;;;;N;LATIN SMALL LETTER I MACRON;;012A;;012A
+ 012C;LATIN CAPITAL LETTER I WITH BREVE;Lu;0;L;0049 0306;;;;N;LATIN CAPITAL LETTER I BREVE;;;012D;
+ 012D;LATIN SMALL LETTER I WITH BREVE;Ll;0;L;0069 0306;;;;N;LATIN SMALL LETTER I BREVE;;012C;;012C
+ 012E;LATIN CAPITAL LETTER I WITH OGONEK;Lu;0;L;0049 0328;;;;N;LATIN CAPITAL LETTER I OGONEK;;;012F;
+ 012F;LATIN SMALL LETTER I WITH OGONEK;Ll;0;L;0069 0328;;;;N;LATIN SMALL LETTER I OGONEK;;012E;;012E
+ 0130;LATIN CAPITAL LETTER I WITH DOT ABOVE;Lu;0;L;0049 0307;;;;N;LATIN CAPITAL LETTER I DOT;;;0069;
+ 0131;LATIN SMALL LETTER DOTLESS I;Ll;0;L;;;;;N;;;0049;;0049
+ 0132;LATIN CAPITAL LIGATURE IJ;Lu;0;L;<compat> 0049 004A;;;;N;LATIN CAPITAL LETTER I J;;;0133;
+ 0133;LATIN SMALL LIGATURE IJ;Ll;0;L;<compat> 0069 006A;;;;N;LATIN SMALL LETTER I J;;0132;;0132
+ 0134;LATIN CAPITAL LETTER J WITH CIRCUMFLEX;Lu;0;L;004A 0302;;;;N;LATIN CAPITAL LETTER J CIRCUMFLEX;;;0135;
+ 0135;LATIN SMALL LETTER J WITH CIRCUMFLEX;Ll;0;L;006A 0302;;;;N;LATIN SMALL LETTER J CIRCUMFLEX;;0134;;0134
+ 0136;LATIN CAPITAL LETTER K WITH CEDILLA;Lu;0;L;004B 0327;;;;N;LATIN CAPITAL LETTER K CEDILLA;;;0137;
+ 0137;LATIN SMALL LETTER K WITH CEDILLA;Ll;0;L;006B 0327;;;;N;LATIN SMALL LETTER K CEDILLA;;0136;;0136
+ 0138;LATIN SMALL LETTER KRA;Ll;0;L;;;;;N;;;;;
+ 0139;LATIN CAPITAL LETTER L WITH ACUTE;Lu;0;L;004C 0301;;;;N;LATIN CAPITAL LETTER L ACUTE;;;013A;
+ 013A;LATIN SMALL LETTER L WITH ACUTE;Ll;0;L;006C 0301;;;;N;LATIN SMALL LETTER L ACUTE;;0139;;0139
+ 013B;LATIN CAPITAL LETTER L WITH CEDILLA;Lu;0;L;004C 0327;;;;N;LATIN CAPITAL LETTER L CEDILLA;;;013C;
+ 013C;LATIN SMALL LETTER L WITH CEDILLA;Ll;0;L;006C 0327;;;;N;LATIN SMALL LETTER L CEDILLA;;013B;;013B
+ 013D;LATIN CAPITAL LETTER L WITH CARON;Lu;0;L;004C 030C;;;;N;LATIN CAPITAL LETTER L HACEK;;;013E;
+ 013E;LATIN SMALL LETTER L WITH CARON;Ll;0;L;006C 030C;;;;N;LATIN SMALL LETTER L HACEK;;013D;;013D
+ 013F;LATIN CAPITAL LETTER L WITH MIDDLE DOT;Lu;0;L;<compat> 004C 00B7;;;;N;;;;0140;
+ 0140;LATIN SMALL LETTER L WITH MIDDLE DOT;Ll;0;L;<compat> 006C 00B7;;;;N;;;013F;;013F
+ 0141;LATIN CAPITAL LETTER L WITH STROKE;Lu;0;L;;;;;N;LATIN CAPITAL LETTER L SLASH;;;0142;
+ 0142;LATIN SMALL LETTER L WITH STROKE;Ll;0;L;;;;;N;LATIN SMALL LETTER L SLASH;;0141;;0141
+ 0143;LATIN CAPITAL LETTER N WITH ACUTE;Lu;0;L;004E 0301;;;;N;LATIN CAPITAL LETTER N ACUTE;;;0144;
+ 0144;LATIN SMALL LETTER N WITH ACUTE;Ll;0;L;006E 0301;;;;N;LATIN SMALL LETTER N ACUTE;;0143;;0143
+ 0145;LATIN CAPITAL LETTER N WITH CEDILLA;Lu;0;L;004E 0327;;;;N;LATIN CAPITAL LETTER N CEDILLA;;;0146;
+ 0146;LATIN SMALL LETTER N WITH CEDILLA;Ll;0;L;006E 0327;;;;N;LATIN SMALL LETTER N CEDILLA;;0145;;0145
+ 0147;LATIN CAPITAL LETTER N WITH CARON;Lu;0;L;004E 030C;;;;N;LATIN CAPITAL LETTER N HACEK;;;0148;
+ 0148;LATIN SMALL LETTER N WITH CARON;Ll;0;L;006E 030C;;;;N;LATIN SMALL LETTER N HACEK;;0147;;0147
+ 0149;LATIN SMALL LETTER N PRECEDED BY APOSTROPHE;Ll;0;L;<compat> 02BC 006E;;;;N;LATIN SMALL LETTER APOSTROPHE N;;;;
+ 014A;LATIN CAPITAL LETTER ENG;Lu;0;L;;;;;N;;;;014B;
+ 014B;LATIN SMALL LETTER ENG;Ll;0;L;;;;;N;;;014A;;014A
+ 014C;LATIN CAPITAL LETTER O WITH MACRON;Lu;0;L;004F 0304;;;;N;LATIN CAPITAL LETTER O MACRON;;;014D;
+ 014D;LATIN SMALL LETTER O WITH MACRON;Ll;0;L;006F 0304;;;;N;LATIN SMALL LETTER O MACRON;;014C;;014C
+ 014E;LATIN CAPITAL LETTER O WITH BREVE;Lu;0;L;004F 0306;;;;N;LATIN CAPITAL LETTER O BREVE;;;014F;
+ 014F;LATIN SMALL LETTER O WITH BREVE;Ll;0;L;006F 0306;;;;N;LATIN SMALL LETTER O BREVE;;014E;;014E
+ 0150;LATIN CAPITAL LETTER O WITH DOUBLE ACUTE;Lu;0;L;004F 030B;;;;N;LATIN CAPITAL LETTER O DOUBLE ACUTE;;;0151;
+ 0151;LATIN SMALL LETTER O WITH DOUBLE ACUTE;Ll;0;L;006F 030B;;;;N;LATIN SMALL LETTER O DOUBLE ACUTE;;0150;;0150
+ 0152;LATIN CAPITAL LIGATURE OE;Lu;0;L;;;;;N;LATIN CAPITAL LETTER O E;;;0153;
+ 0153;LATIN SMALL LIGATURE OE;Ll;0;L;;;;;N;LATIN SMALL LETTER O E;;0152;;0152
+ 0154;LATIN CAPITAL LETTER R WITH ACUTE;Lu;0;L;0052 0301;;;;N;LATIN CAPITAL LETTER R ACUTE;;;0155;
+ 0155;LATIN SMALL LETTER R WITH ACUTE;Ll;0;L;0072 0301;;;;N;LATIN SMALL LETTER R ACUTE;;0154;;0154
+ 0156;LATIN CAPITAL LETTER R WITH CEDILLA;Lu;0;L;0052 0327;;;;N;LATIN CAPITAL LETTER R CEDILLA;;;0157;
+ 0157;LATIN SMALL LETTER R WITH CEDILLA;Ll;0;L;0072 0327;;;;N;LATIN SMALL LETTER R CEDILLA;;0156;;0156
+ 0158;LATIN CAPITAL LETTER R WITH CARON;Lu;0;L;0052 030C;;;;N;LATIN CAPITAL LETTER R HACEK;;;0159;
+ 0159;LATIN SMALL LETTER R WITH CARON;Ll;0;L;0072 030C;;;;N;LATIN SMALL LETTER R HACEK;;0158;;0158
+ 015A;LATIN CAPITAL LETTER S WITH ACUTE;Lu;0;L;0053 0301;;;;N;LATIN CAPITAL LETTER S ACUTE;;;015B;
+ 015B;LATIN SMALL LETTER S WITH ACUTE;Ll;0;L;0073 0301;;;;N;LATIN SMALL LETTER S ACUTE;;015A;;015A
+ 015C;LATIN CAPITAL LETTER S WITH CIRCUMFLEX;Lu;0;L;0053 0302;;;;N;LATIN CAPITAL LETTER S CIRCUMFLEX;;;015D;
+ 015D;LATIN SMALL LETTER S WITH CIRCUMFLEX;Ll;0;L;0073 0302;;;;N;LATIN SMALL LETTER S CIRCUMFLEX;;015C;;015C
+ 015E;LATIN CAPITAL LETTER S WITH CEDILLA;Lu;0;L;0053 0327;;;;N;LATIN CAPITAL LETTER S CEDILLA;;;015F;
+ 015F;LATIN SMALL LETTER S WITH CEDILLA;Ll;0;L;0073 0327;;;;N;LATIN SMALL LETTER S CEDILLA;;015E;;015E
+ 0160;LATIN CAPITAL LETTER S WITH CARON;Lu;0;L;0053 030C;;;;N;LATIN CAPITAL LETTER S HACEK;;;0161;
+ 0161;LATIN SMALL LETTER S WITH CARON;Ll;0;L;0073 030C;;;;N;LATIN SMALL LETTER S HACEK;;0160;;0160
+ 0162;LATIN CAPITAL LETTER T WITH CEDILLA;Lu;0;L;0054 0327;;;;N;LATIN CAPITAL LETTER T CEDILLA;;;0163;
+ 0163;LATIN SMALL LETTER T WITH CEDILLA;Ll;0;L;0074 0327;;;;N;LATIN SMALL LETTER T CEDILLA;;0162;;0162
+ 0164;LATIN CAPITAL LETTER T WITH CARON;Lu;0;L;0054 030C;;;;N;LATIN CAPITAL LETTER T HACEK;;;0165;
+ 0165;LATIN SMALL LETTER T WITH CARON;Ll;0;L;0074 030C;;;;N;LATIN SMALL LETTER T HACEK;;0164;;0164
+ 0166;LATIN CAPITAL LETTER T WITH STROKE;Lu;0;L;;;;;N;LATIN CAPITAL LETTER T BAR;;;0167;
+ 0167;LATIN SMALL LETTER T WITH STROKE;Ll;0;L;;;;;N;LATIN SMALL LETTER T BAR;;0166;;0166
+ 0168;LATIN CAPITAL LETTER U WITH TILDE;Lu;0;L;0055 0303;;;;N;LATIN CAPITAL LETTER U TILDE;;;0169;
+ 0169;LATIN SMALL LETTER U WITH TILDE;Ll;0;L;0075 0303;;;;N;LATIN SMALL LETTER U TILDE;;0168;;0168
+ 016A;LATIN CAPITAL LETTER U WITH MACRON;Lu;0;L;0055 0304;;;;N;LATIN CAPITAL LETTER U MACRON;;;016B;
+ 016B;LATIN SMALL LETTER U WITH MACRON;Ll;0;L;0075 0304;;;;N;LATIN SMALL LETTER U MACRON;;016A;;016A
+ 016C;LATIN CAPITAL LETTER U WITH BREVE;Lu;0;L;0055 0306;;;;N;LATIN CAPITAL LETTER U BREVE;;;016D;
+ 016D;LATIN SMALL LETTER U WITH BREVE;Ll;0;L;0075 0306;;;;N;LATIN SMALL LETTER U BREVE;;016C;;016C
+ 016E;LATIN CAPITAL LETTER U WITH RING ABOVE;Lu;0;L;0055 030A;;;;N;LATIN CAPITAL LETTER U RING;;;016F;
+ 016F;LATIN SMALL LETTER U WITH RING ABOVE;Ll;0;L;0075 030A;;;;N;LATIN SMALL LETTER U RING;;016E;;016E
+ 0170;LATIN CAPITAL LETTER U WITH DOUBLE ACUTE;Lu;0;L;0055 030B;;;;N;LATIN CAPITAL LETTER U DOUBLE ACUTE;;;0171;
+ 0171;LATIN SMALL LETTER U WITH DOUBLE ACUTE;Ll;0;L;0075 030B;;;;N;LATIN SMALL LETTER U DOUBLE ACUTE;;0170;;0170
+ 0172;LATIN CAPITAL LETTER U WITH OGONEK;Lu;0;L;0055 0328;;;;N;LATIN CAPITAL LETTER U OGONEK;;;0173;
+ 0173;LATIN SMALL LETTER U WITH OGONEK;Ll;0;L;0075 0328;;;;N;LATIN SMALL LETTER U OGONEK;;0172;;0172
+ 0174;LATIN CAPITAL LETTER W WITH CIRCUMFLEX;Lu;0;L;0057 0302;;;;N;LATIN CAPITAL LETTER W CIRCUMFLEX;;;0175;
+ 0175;LATIN SMALL LETTER W WITH CIRCUMFLEX;Ll;0;L;0077 0302;;;;N;LATIN SMALL LETTER W CIRCUMFLEX;;0174;;0174
+ 0176;LATIN CAPITAL LETTER Y WITH CIRCUMFLEX;Lu;0;L;0059 0302;;;;N;LATIN CAPITAL LETTER Y CIRCUMFLEX;;;0177;
+ 0177;LATIN SMALL LETTER Y WITH CIRCUMFLEX;Ll;0;L;0079 0302;;;;N;LATIN SMALL LETTER Y CIRCUMFLEX;;0176;;0176
+ 0178;LATIN CAPITAL LETTER Y WITH DIAERESIS;Lu;0;L;0059 0308;;;;N;LATIN CAPITAL LETTER Y DIAERESIS;;;00FF;
+ 0179;LATIN CAPITAL LETTER Z WITH ACUTE;Lu;0;L;005A 0301;;;;N;LATIN CAPITAL LETTER Z ACUTE;;;017A;
+ 017A;LATIN SMALL LETTER Z WITH ACUTE;Ll;0;L;007A 0301;;;;N;LATIN SMALL LETTER Z ACUTE;;0179;;0179
+ 017B;LATIN CAPITAL LETTER Z WITH DOT ABOVE;Lu;0;L;005A 0307;;;;N;LATIN CAPITAL LETTER Z DOT;;;017C;
+ 017C;LATIN SMALL LETTER Z WITH DOT ABOVE;Ll;0;L;007A 0307;;;;N;LATIN SMALL LETTER Z DOT;;017B;;017B
+ 017D;LATIN CAPITAL LETTER Z WITH CARON;Lu;0;L;005A 030C;;;;N;LATIN CAPITAL LETTER Z HACEK;;;017E;
+ 017E;LATIN SMALL LETTER Z WITH CARON;Ll;0;L;007A 030C;;;;N;LATIN SMALL LETTER Z HACEK;;017D;;017D
+ 017F;LATIN SMALL LETTER LONG S;Ll;0;L;<compat> 0073;;;;N;;;0053;;0053
+ 0180;LATIN SMALL LETTER B WITH STROKE;Ll;0;L;;;;;N;LATIN SMALL LETTER B BAR;;0243;;0243
+ 0181;LATIN CAPITAL LETTER B WITH HOOK;Lu;0;L;;;;;N;LATIN CAPITAL LETTER B HOOK;;;0253;
+ 0182;LATIN CAPITAL LETTER B WITH TOPBAR;Lu;0;L;;;;;N;LATIN CAPITAL LETTER B TOPBAR;;;0183;
+ 0183;LATIN SMALL LETTER B WITH TOPBAR;Ll;0;L;;;;;N;LATIN SMALL LETTER B TOPBAR;;0182;;0182
+ 0184;LATIN CAPITAL LETTER TONE SIX;Lu;0;L;;;;;N;;;;0185;
+ 0185;LATIN SMALL LETTER TONE SIX;Ll;0;L;;;;;N;;;0184;;0184
+ 0186;LATIN CAPITAL LETTER OPEN O;Lu;0;L;;;;;N;;;;0254;
+ 0187;LATIN CAPITAL LETTER C WITH HOOK;Lu;0;L;;;;;N;LATIN CAPITAL LETTER C HOOK;;;0188;
+ 0188;LATIN SMALL LETTER C WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER C HOOK;;0187;;0187
+ 0189;LATIN CAPITAL LETTER AFRICAN D;Lu;0;L;;;;;N;;;;0256;
+ 018A;LATIN CAPITAL LETTER D WITH HOOK;Lu;0;L;;;;;N;LATIN CAPITAL LETTER D HOOK;;;0257;
+ 018B;LATIN CAPITAL LETTER D WITH TOPBAR;Lu;0;L;;;;;N;LATIN CAPITAL LETTER D TOPBAR;;;018C;
+ 018C;LATIN SMALL LETTER D WITH TOPBAR;Ll;0;L;;;;;N;LATIN SMALL LETTER D TOPBAR;;018B;;018B
+ 018D;LATIN SMALL LETTER TURNED DELTA;Ll;0;L;;;;;N;;;;;
+ 018E;LATIN CAPITAL LETTER REVERSED E;Lu;0;L;;;;;N;LATIN CAPITAL LETTER TURNED E;;;01DD;
+ 018F;LATIN CAPITAL LETTER SCHWA;Lu;0;L;;;;;N;;;;0259;
+ 0190;LATIN CAPITAL LETTER OPEN E;Lu;0;L;;;;;N;LATIN CAPITAL LETTER EPSILON;;;025B;
+ 0191;LATIN CAPITAL LETTER F WITH HOOK;Lu;0;L;;;;;N;LATIN CAPITAL LETTER F HOOK;;;0192;
+ 0192;LATIN SMALL LETTER F WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER SCRIPT F;;0191;;0191
+ 0193;LATIN CAPITAL LETTER G WITH HOOK;Lu;0;L;;;;;N;LATIN CAPITAL LETTER G HOOK;;;0260;
+ 0194;LATIN CAPITAL LETTER GAMMA;Lu;0;L;;;;;N;;;;0263;
+ 0195;LATIN SMALL LETTER HV;Ll;0;L;;;;;N;LATIN SMALL LETTER H V;;01F6;;01F6
+ 0196;LATIN CAPITAL LETTER IOTA;Lu;0;L;;;;;N;;;;0269;
+ 0197;LATIN CAPITAL LETTER I WITH STROKE;Lu;0;L;;;;;N;LATIN CAPITAL LETTER BARRED I;;;0268;
+ 0198;LATIN CAPITAL LETTER K WITH HOOK;Lu;0;L;;;;;N;LATIN CAPITAL LETTER K HOOK;;;0199;
+ 0199;LATIN SMALL LETTER K WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER K HOOK;;0198;;0198
+ 019A;LATIN SMALL LETTER L WITH BAR;Ll;0;L;;;;;N;LATIN SMALL LETTER BARRED L;;023D;;023D
+ 019B;LATIN SMALL LETTER LAMBDA WITH STROKE;Ll;0;L;;;;;N;LATIN SMALL LETTER BARRED LAMBDA;;;;
+ 019C;LATIN CAPITAL LETTER TURNED M;Lu;0;L;;;;;N;;;;026F;
+ 019D;LATIN CAPITAL LETTER N WITH LEFT HOOK;Lu;0;L;;;;;N;LATIN CAPITAL LETTER N HOOK;;;0272;
+ 019E;LATIN SMALL LETTER N WITH LONG RIGHT LEG;Ll;0;L;;;;;N;;;0220;;0220
+ 019F;LATIN CAPITAL LETTER O WITH MIDDLE TILDE;Lu;0;L;;;;;N;LATIN CAPITAL LETTER BARRED O;;;0275;
+ 01A0;LATIN CAPITAL LETTER O WITH HORN;Lu;0;L;004F 031B;;;;N;LATIN CAPITAL LETTER O HORN;;;01A1;
+ 01A1;LATIN SMALL LETTER O WITH HORN;Ll;0;L;006F 031B;;;;N;LATIN SMALL LETTER O HORN;;01A0;;01A0
+ 01A2;LATIN CAPITAL LETTER OI;Lu;0;L;;;;;N;LATIN CAPITAL LETTER O I;;;01A3;
+ 01A3;LATIN SMALL LETTER OI;Ll;0;L;;;;;N;LATIN SMALL LETTER O I;;01A2;;01A2
+ 01A4;LATIN CAPITAL LETTER P WITH HOOK;Lu;0;L;;;;;N;LATIN CAPITAL LETTER P HOOK;;;01A5;
+ 01A5;LATIN SMALL LETTER P WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER P HOOK;;01A4;;01A4
+ 01A6;LATIN LETTER YR;Lu;0;L;;;;;N;LATIN LETTER Y R;;;0280;
+ 01A7;LATIN CAPITAL LETTER TONE TWO;Lu;0;L;;;;;N;;;;01A8;
+ 01A8;LATIN SMALL LETTER TONE TWO;Ll;0;L;;;;;N;;;01A7;;01A7
+ 01A9;LATIN CAPITAL LETTER ESH;Lu;0;L;;;;;N;;;;0283;
+ 01AA;LATIN LETTER REVERSED ESH LOOP;Ll;0;L;;;;;N;;;;;
+ 01AB;LATIN SMALL LETTER T WITH PALATAL HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER T PALATAL HOOK;;;;
+ 01AC;LATIN CAPITAL LETTER T WITH HOOK;Lu;0;L;;;;;N;LATIN CAPITAL LETTER T HOOK;;;01AD;
+ 01AD;LATIN SMALL LETTER T WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER T HOOK;;01AC;;01AC
+ 01AE;LATIN CAPITAL LETTER T WITH RETROFLEX HOOK;Lu;0;L;;;;;N;LATIN CAPITAL LETTER T RETROFLEX HOOK;;;0288;
+ 01AF;LATIN CAPITAL LETTER U WITH HORN;Lu;0;L;0055 031B;;;;N;LATIN CAPITAL LETTER U HORN;;;01B0;
+ 01B0;LATIN SMALL LETTER U WITH HORN;Ll;0;L;0075 031B;;;;N;LATIN SMALL LETTER U HORN;;01AF;;01AF
+ 01B1;LATIN CAPITAL LETTER UPSILON;Lu;0;L;;;;;N;;;;028A;
+ 01B2;LATIN CAPITAL LETTER V WITH HOOK;Lu;0;L;;;;;N;LATIN CAPITAL LETTER SCRIPT V;;;028B;
+ 01B3;LATIN CAPITAL LETTER Y WITH HOOK;Lu;0;L;;;;;N;LATIN CAPITAL LETTER Y HOOK;;;01B4;
+ 01B4;LATIN SMALL LETTER Y WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER Y HOOK;;01B3;;01B3
+ 01B5;LATIN CAPITAL LETTER Z WITH STROKE;Lu;0;L;;;;;N;LATIN CAPITAL LETTER Z BAR;;;01B6;
+ 01B6;LATIN SMALL LETTER Z WITH STROKE;Ll;0;L;;;;;N;LATIN SMALL LETTER Z BAR;;01B5;;01B5
+ 01B7;LATIN CAPITAL LETTER EZH;Lu;0;L;;;;;N;LATIN CAPITAL LETTER YOGH;;;0292;
+ 01B8;LATIN CAPITAL LETTER EZH REVERSED;Lu;0;L;;;;;N;LATIN CAPITAL LETTER REVERSED YOGH;;;01B9;
+ 01B9;LATIN SMALL LETTER EZH REVERSED;Ll;0;L;;;;;N;LATIN SMALL LETTER REVERSED YOGH;;01B8;;01B8
+ 01BA;LATIN SMALL LETTER EZH WITH TAIL;Ll;0;L;;;;;N;LATIN SMALL LETTER YOGH WITH TAIL;;;;
+ 01BB;LATIN LETTER TWO WITH STROKE;Lo;0;L;;;;;N;LATIN LETTER TWO BAR;;;;
+ 01BC;LATIN CAPITAL LETTER TONE FIVE;Lu;0;L;;;;;N;;;;01BD;
+ 01BD;LATIN SMALL LETTER TONE FIVE;Ll;0;L;;;;;N;;;01BC;;01BC
+ 01BE;LATIN LETTER INVERTED GLOTTAL STOP WITH STROKE;Ll;0;L;;;;;N;LATIN LETTER INVERTED GLOTTAL STOP BAR;;;;
+ 01BF;LATIN LETTER WYNN;Ll;0;L;;;;;N;;;01F7;;01F7
+ 01C0;LATIN LETTER DENTAL CLICK;Lo;0;L;;;;;N;LATIN LETTER PIPE;;;;
+ 01C1;LATIN LETTER LATERAL CLICK;Lo;0;L;;;;;N;LATIN LETTER DOUBLE PIPE;;;;
+ 01C2;LATIN LETTER ALVEOLAR CLICK;Lo;0;L;;;;;N;LATIN LETTER PIPE DOUBLE BAR;;;;
+ 01C3;LATIN LETTER RETROFLEX CLICK;Lo;0;L;;;;;N;LATIN LETTER EXCLAMATION MARK;;;;
+ 01C4;LATIN CAPITAL LETTER DZ WITH CARON;Lu;0;L;<compat> 0044 017D;;;;N;LATIN CAPITAL LETTER D Z HACEK;;;01C6;01C5
+ 01C5;LATIN CAPITAL LETTER D WITH SMALL LETTER Z WITH CARON;Lt;0;L;<compat> 0044 017E;;;;N;LATIN LETTER CAPITAL D SMALL Z HACEK;;01C4;01C6;01C5
+ 01C6;LATIN SMALL LETTER DZ WITH CARON;Ll;0;L;<compat> 0064 017E;;;;N;LATIN SMALL LETTER D Z HACEK;;01C4;;01C5
+ 01C7;LATIN CAPITAL LETTER LJ;Lu;0;L;<compat> 004C 004A;;;;N;LATIN CAPITAL LETTER L J;;;01C9;01C8
+ 01C8;LATIN CAPITAL LETTER L WITH SMALL LETTER J;Lt;0;L;<compat> 004C 006A;;;;N;LATIN LETTER CAPITAL L SMALL J;;01C7;01C9;01C8
+ 01C9;LATIN SMALL LETTER LJ;Ll;0;L;<compat> 006C 006A;;;;N;LATIN SMALL LETTER L J;;01C7;;01C8
+ 01CA;LATIN CAPITAL LETTER NJ;Lu;0;L;<compat> 004E 004A;;;;N;LATIN CAPITAL LETTER N J;;;01CC;01CB
+ 01CB;LATIN CAPITAL LETTER N WITH SMALL LETTER J;Lt;0;L;<compat> 004E 006A;;;;N;LATIN LETTER CAPITAL N SMALL J;;01CA;01CC;01CB
+ 01CC;LATIN SMALL LETTER NJ;Ll;0;L;<compat> 006E 006A;;;;N;LATIN SMALL LETTER N J;;01CA;;01CB
+ 01CD;LATIN CAPITAL LETTER A WITH CARON;Lu;0;L;0041 030C;;;;N;LATIN CAPITAL LETTER A HACEK;;;01CE;
+ 01CE;LATIN SMALL LETTER A WITH CARON;Ll;0;L;0061 030C;;;;N;LATIN SMALL LETTER A HACEK;;01CD;;01CD
+ 01CF;LATIN CAPITAL LETTER I WITH CARON;Lu;0;L;0049 030C;;;;N;LATIN CAPITAL LETTER I HACEK;;;01D0;
+ 01D0;LATIN SMALL LETTER I WITH CARON;Ll;0;L;0069 030C;;;;N;LATIN SMALL LETTER I HACEK;;01CF;;01CF
+ 01D1;LATIN CAPITAL LETTER O WITH CARON;Lu;0;L;004F 030C;;;;N;LATIN CAPITAL LETTER O HACEK;;;01D2;
+ 01D2;LATIN SMALL LETTER O WITH CARON;Ll;0;L;006F 030C;;;;N;LATIN SMALL LETTER O HACEK;;01D1;;01D1
+ 01D3;LATIN CAPITAL LETTER U WITH CARON;Lu;0;L;0055 030C;;;;N;LATIN CAPITAL LETTER U HACEK;;;01D4;
+ 01D4;LATIN SMALL LETTER U WITH CARON;Ll;0;L;0075 030C;;;;N;LATIN SMALL LETTER U HACEK;;01D3;;01D3
+ 01D5;LATIN CAPITAL LETTER U WITH DIAERESIS AND MACRON;Lu;0;L;00DC 0304;;;;N;LATIN CAPITAL LETTER U DIAERESIS MACRON;;;01D6;
+ 01D6;LATIN SMALL LETTER U WITH DIAERESIS AND MACRON;Ll;0;L;00FC 0304;;;;N;LATIN SMALL LETTER U DIAERESIS MACRON;;01D5;;01D5
+ 01D7;LATIN CAPITAL LETTER U WITH DIAERESIS AND ACUTE;Lu;0;L;00DC 0301;;;;N;LATIN CAPITAL LETTER U DIAERESIS ACUTE;;;01D8;
+ 01D8;LATIN SMALL LETTER U WITH DIAERESIS AND ACUTE;Ll;0;L;00FC 0301;;;;N;LATIN SMALL LETTER U DIAERESIS ACUTE;;01D7;;01D7
+ 01D9;LATIN CAPITAL LETTER U WITH DIAERESIS AND CARON;Lu;0;L;00DC 030C;;;;N;LATIN CAPITAL LETTER U DIAERESIS HACEK;;;01DA;
+ 01DA;LATIN SMALL LETTER U WITH DIAERESIS AND CARON;Ll;0;L;00FC 030C;;;;N;LATIN SMALL LETTER U DIAERESIS HACEK;;01D9;;01D9
+ 01DB;LATIN CAPITAL LETTER U WITH DIAERESIS AND GRAVE;Lu;0;L;00DC 0300;;;;N;LATIN CAPITAL LETTER U DIAERESIS GRAVE;;;01DC;
+ 01DC;LATIN SMALL LETTER U WITH DIAERESIS AND GRAVE;Ll;0;L;00FC 0300;;;;N;LATIN SMALL LETTER U DIAERESIS GRAVE;;01DB;;01DB
+ 01DD;LATIN SMALL LETTER TURNED E;Ll;0;L;;;;;N;;;018E;;018E
+ 01DE;LATIN CAPITAL LETTER A WITH DIAERESIS AND MACRON;Lu;0;L;00C4 0304;;;;N;LATIN CAPITAL LETTER A DIAERESIS MACRON;;;01DF;
+ 01DF;LATIN SMALL LETTER A WITH DIAERESIS AND MACRON;Ll;0;L;00E4 0304;;;;N;LATIN SMALL LETTER A DIAERESIS MACRON;;01DE;;01DE
+ 01E0;LATIN CAPITAL LETTER A WITH DOT ABOVE AND MACRON;Lu;0;L;0226 0304;;;;N;LATIN CAPITAL LETTER A DOT MACRON;;;01E1;
+ 01E1;LATIN SMALL LETTER A WITH DOT ABOVE AND MACRON;Ll;0;L;0227 0304;;;;N;LATIN SMALL LETTER A DOT MACRON;;01E0;;01E0
+ 01E2;LATIN CAPITAL LETTER AE WITH MACRON;Lu;0;L;00C6 0304;;;;N;LATIN CAPITAL LETTER A E MACRON;;;01E3;
+ 01E3;LATIN SMALL LETTER AE WITH MACRON;Ll;0;L;00E6 0304;;;;N;LATIN SMALL LETTER A E MACRON;;01E2;;01E2
+ 01E4;LATIN CAPITAL LETTER G WITH STROKE;Lu;0;L;;;;;N;LATIN CAPITAL LETTER G BAR;;;01E5;
+ 01E5;LATIN SMALL LETTER G WITH STROKE;Ll;0;L;;;;;N;LATIN SMALL LETTER G BAR;;01E4;;01E4
+ 01E6;LATIN CAPITAL LETTER G WITH CARON;Lu;0;L;0047 030C;;;;N;LATIN CAPITAL LETTER G HACEK;;;01E7;
+ 01E7;LATIN SMALL LETTER G WITH CARON;Ll;0;L;0067 030C;;;;N;LATIN SMALL LETTER G HACEK;;01E6;;01E6
+ 01E8;LATIN CAPITAL LETTER K WITH CARON;Lu;0;L;004B 030C;;;;N;LATIN CAPITAL LETTER K HACEK;;;01E9;
+ 01E9;LATIN SMALL LETTER K WITH CARON;Ll;0;L;006B 030C;;;;N;LATIN SMALL LETTER K HACEK;;01E8;;01E8
+ 01EA;LATIN CAPITAL LETTER O WITH OGONEK;Lu;0;L;004F 0328;;;;N;LATIN CAPITAL LETTER O OGONEK;;;01EB;
+ 01EB;LATIN SMALL LETTER O WITH OGONEK;Ll;0;L;006F 0328;;;;N;LATIN SMALL LETTER O OGONEK;;01EA;;01EA
+ 01EC;LATIN CAPITAL LETTER O WITH OGONEK AND MACRON;Lu;0;L;01EA 0304;;;;N;LATIN CAPITAL LETTER O OGONEK MACRON;;;01ED;
+ 01ED;LATIN SMALL LETTER O WITH OGONEK AND MACRON;Ll;0;L;01EB 0304;;;;N;LATIN SMALL LETTER O OGONEK MACRON;;01EC;;01EC
+ 01EE;LATIN CAPITAL LETTER EZH WITH CARON;Lu;0;L;01B7 030C;;;;N;LATIN CAPITAL LETTER YOGH HACEK;;;01EF;
+ 01EF;LATIN SMALL LETTER EZH WITH CARON;Ll;0;L;0292 030C;;;;N;LATIN SMALL LETTER YOGH HACEK;;01EE;;01EE
+ 01F0;LATIN SMALL LETTER J WITH CARON;Ll;0;L;006A 030C;;;;N;LATIN SMALL LETTER J HACEK;;;;
+ 01F1;LATIN CAPITAL LETTER DZ;Lu;0;L;<compat> 0044 005A;;;;N;;;;01F3;01F2
+ 01F2;LATIN CAPITAL LETTER D WITH SMALL LETTER Z;Lt;0;L;<compat> 0044 007A;;;;N;;;01F1;01F3;01F2
+ 01F3;LATIN SMALL LETTER DZ;Ll;0;L;<compat> 0064 007A;;;;N;;;01F1;;01F2
+ 01F4;LATIN CAPITAL LETTER G WITH ACUTE;Lu;0;L;0047 0301;;;;N;;;;01F5;
+ 01F5;LATIN SMALL LETTER G WITH ACUTE;Ll;0;L;0067 0301;;;;N;;;01F4;;01F4
+ 01F6;LATIN CAPITAL LETTER HWAIR;Lu;0;L;;;;;N;;;;0195;
+ 01F7;LATIN CAPITAL LETTER WYNN;Lu;0;L;;;;;N;;;;01BF;
+ 01F8;LATIN CAPITAL LETTER N WITH GRAVE;Lu;0;L;004E 0300;;;;N;;;;01F9;
+ 01F9;LATIN SMALL LETTER N WITH GRAVE;Ll;0;L;006E 0300;;;;N;;;01F8;;01F8
+ 01FA;LATIN CAPITAL LETTER A WITH RING ABOVE AND ACUTE;Lu;0;L;00C5 0301;;;;N;;;;01FB;
+ 01FB;LATIN SMALL LETTER A WITH RING ABOVE AND ACUTE;Ll;0;L;00E5 0301;;;;N;;;01FA;;01FA
+ 01FC;LATIN CAPITAL LETTER AE WITH ACUTE;Lu;0;L;00C6 0301;;;;N;;;;01FD;
+ 01FD;LATIN SMALL LETTER AE WITH ACUTE;Ll;0;L;00E6 0301;;;;N;;;01FC;;01FC
+ 01FE;LATIN CAPITAL LETTER O WITH STROKE AND ACUTE;Lu;0;L;00D8 0301;;;;N;;;;01FF;
+ 01FF;LATIN SMALL LETTER O WITH STROKE AND ACUTE;Ll;0;L;00F8 0301;;;;N;;;01FE;;01FE
+ 0200;LATIN CAPITAL LETTER A WITH DOUBLE GRAVE;Lu;0;L;0041 030F;;;;N;;;;0201;
+ 0201;LATIN SMALL LETTER A WITH DOUBLE GRAVE;Ll;0;L;0061 030F;;;;N;;;0200;;0200
+ 0202;LATIN CAPITAL LETTER A WITH INVERTED BREVE;Lu;0;L;0041 0311;;;;N;;;;0203;
+ 0203;LATIN SMALL LETTER A WITH INVERTED BREVE;Ll;0;L;0061 0311;;;;N;;;0202;;0202
+ 0204;LATIN CAPITAL LETTER E WITH DOUBLE GRAVE;Lu;0;L;0045 030F;;;;N;;;;0205;
+ 0205;LATIN SMALL LETTER E WITH DOUBLE GRAVE;Ll;0;L;0065 030F;;;;N;;;0204;;0204
+ 0206;LATIN CAPITAL LETTER E WITH INVERTED BREVE;Lu;0;L;0045 0311;;;;N;;;;0207;
+ 0207;LATIN SMALL LETTER E WITH INVERTED BREVE;Ll;0;L;0065 0311;;;;N;;;0206;;0206
+ 0208;LATIN CAPITAL LETTER I WITH DOUBLE GRAVE;Lu;0;L;0049 030F;;;;N;;;;0209;
+ 0209;LATIN SMALL LETTER I WITH DOUBLE GRAVE;Ll;0;L;0069 030F;;;;N;;;0208;;0208
+ 020A;LATIN CAPITAL LETTER I WITH INVERTED BREVE;Lu;0;L;0049 0311;;;;N;;;;020B;
+ 020B;LATIN SMALL LETTER I WITH INVERTED BREVE;Ll;0;L;0069 0311;;;;N;;;020A;;020A
+ 020C;LATIN CAPITAL LETTER O WITH DOUBLE GRAVE;Lu;0;L;004F 030F;;;;N;;;;020D;
+ 020D;LATIN SMALL LETTER O WITH DOUBLE GRAVE;Ll;0;L;006F 030F;;;;N;;;020C;;020C
+ 020E;LATIN CAPITAL LETTER O WITH INVERTED BREVE;Lu;0;L;004F 0311;;;;N;;;;020F;
+ 020F;LATIN SMALL LETTER O WITH INVERTED BREVE;Ll;0;L;006F 0311;;;;N;;;020E;;020E
+ 0210;LATIN CAPITAL LETTER R WITH DOUBLE GRAVE;Lu;0;L;0052 030F;;;;N;;;;0211;
+ 0211;LATIN SMALL LETTER R WITH DOUBLE GRAVE;Ll;0;L;0072 030F;;;;N;;;0210;;0210
+ 0212;LATIN CAPITAL LETTER R WITH INVERTED BREVE;Lu;0;L;0052 0311;;;;N;;;;0213;
+ 0213;LATIN SMALL LETTER R WITH INVERTED BREVE;Ll;0;L;0072 0311;;;;N;;;0212;;0212
+ 0214;LATIN CAPITAL LETTER U WITH DOUBLE GRAVE;Lu;0;L;0055 030F;;;;N;;;;0215;
+ 0215;LATIN SMALL LETTER U WITH DOUBLE GRAVE;Ll;0;L;0075 030F;;;;N;;;0214;;0214
+ 0216;LATIN CAPITAL LETTER U WITH INVERTED BREVE;Lu;0;L;0055 0311;;;;N;;;;0217;
+ 0217;LATIN SMALL LETTER U WITH INVERTED BREVE;Ll;0;L;0075 0311;;;;N;;;0216;;0216
+ 0218;LATIN CAPITAL LETTER S WITH COMMA BELOW;Lu;0;L;0053 0326;;;;N;;;;0219;
+ 0219;LATIN SMALL LETTER S WITH COMMA BELOW;Ll;0;L;0073 0326;;;;N;;;0218;;0218
+ 021A;LATIN CAPITAL LETTER T WITH COMMA BELOW;Lu;0;L;0054 0326;;;;N;;;;021B;
+ 021B;LATIN SMALL LETTER T WITH COMMA BELOW;Ll;0;L;0074 0326;;;;N;;;021A;;021A
+ 021C;LATIN CAPITAL LETTER YOGH;Lu;0;L;;;;;N;;;;021D;
+ 021D;LATIN SMALL LETTER YOGH;Ll;0;L;;;;;N;;;021C;;021C
+ 021E;LATIN CAPITAL LETTER H WITH CARON;Lu;0;L;0048 030C;;;;N;;;;021F;
+ 021F;LATIN SMALL LETTER H WITH CARON;Ll;0;L;0068 030C;;;;N;;;021E;;021E
+ 0220;LATIN CAPITAL LETTER N WITH LONG RIGHT LEG;Lu;0;L;;;;;N;;;;019E;
+ 0221;LATIN SMALL LETTER D WITH CURL;Ll;0;L;;;;;N;;;;;
+ 0222;LATIN CAPITAL LETTER OU;Lu;0;L;;;;;N;;;;0223;
+ 0223;LATIN SMALL LETTER OU;Ll;0;L;;;;;N;;;0222;;0222
+ 0224;LATIN CAPITAL LETTER Z WITH HOOK;Lu;0;L;;;;;N;;;;0225;
+ 0225;LATIN SMALL LETTER Z WITH HOOK;Ll;0;L;;;;;N;;;0224;;0224
+ 0226;LATIN CAPITAL LETTER A WITH DOT ABOVE;Lu;0;L;0041 0307;;;;N;;;;0227;
+ 0227;LATIN SMALL LETTER A WITH DOT ABOVE;Ll;0;L;0061 0307;;;;N;;;0226;;0226
+ 0228;LATIN CAPITAL LETTER E WITH CEDILLA;Lu;0;L;0045 0327;;;;N;;;;0229;
+ 0229;LATIN SMALL LETTER E WITH CEDILLA;Ll;0;L;0065 0327;;;;N;;;0228;;0228
+ 022A;LATIN CAPITAL LETTER O WITH DIAERESIS AND MACRON;Lu;0;L;00D6 0304;;;;N;;;;022B;
+ 022B;LATIN SMALL LETTER O WITH DIAERESIS AND MACRON;Ll;0;L;00F6 0304;;;;N;;;022A;;022A
+ 022C;LATIN CAPITAL LETTER O WITH TILDE AND MACRON;Lu;0;L;00D5 0304;;;;N;;;;022D;
+ 022D;LATIN SMALL LETTER O WITH TILDE AND MACRON;Ll;0;L;00F5 0304;;;;N;;;022C;;022C
+ 022E;LATIN CAPITAL LETTER O WITH DOT ABOVE;Lu;0;L;004F 0307;;;;N;;;;022F;
+ 022F;LATIN SMALL LETTER O WITH DOT ABOVE;Ll;0;L;006F 0307;;;;N;;;022E;;022E
+ 0230;LATIN CAPITAL LETTER O WITH DOT ABOVE AND MACRON;Lu;0;L;022E 0304;;;;N;;;;0231;
+ 0231;LATIN SMALL LETTER O WITH DOT ABOVE AND MACRON;Ll;0;L;022F 0304;;;;N;;;0230;;0230
+ 0232;LATIN CAPITAL LETTER Y WITH MACRON;Lu;0;L;0059 0304;;;;N;;;;0233;
+ 0233;LATIN SMALL LETTER Y WITH MACRON;Ll;0;L;0079 0304;;;;N;;;0232;;0232
+ 0234;LATIN SMALL LETTER L WITH CURL;Ll;0;L;;;;;N;;;;;
+ 0235;LATIN SMALL LETTER N WITH CURL;Ll;0;L;;;;;N;;;;;
+ 0236;LATIN SMALL LETTER T WITH CURL;Ll;0;L;;;;;N;;;;;
+ 0237;LATIN SMALL LETTER DOTLESS J;Ll;0;L;;;;;N;;;;;
+ 0238;LATIN SMALL LETTER DB DIGRAPH;Ll;0;L;;;;;N;;;;;
+ 0239;LATIN SMALL LETTER QP DIGRAPH;Ll;0;L;;;;;N;;;;;
+ 023A;LATIN CAPITAL LETTER A WITH STROKE;Lu;0;L;;;;;N;;;;2C65;
+ 023B;LATIN CAPITAL LETTER C WITH STROKE;Lu;0;L;;;;;N;;;;023C;
+ 023C;LATIN SMALL LETTER C WITH STROKE;Ll;0;L;;;;;N;;;023B;;023B
+ 023D;LATIN CAPITAL LETTER L WITH BAR;Lu;0;L;;;;;N;;;;019A;
+ 023E;LATIN CAPITAL LETTER T WITH DIAGONAL STROKE;Lu;0;L;;;;;N;;;;2C66;
+ 023F;LATIN SMALL LETTER S WITH SWASH TAIL;Ll;0;L;;;;;N;;;2C7E;;2C7E
+ 0240;LATIN SMALL LETTER Z WITH SWASH TAIL;Ll;0;L;;;;;N;;;2C7F;;2C7F
+ 0241;LATIN CAPITAL LETTER GLOTTAL STOP;Lu;0;L;;;;;N;;;;0242;
+ 0242;LATIN SMALL LETTER GLOTTAL STOP;Ll;0;L;;;;;N;;;0241;;0241
+ 0243;LATIN CAPITAL LETTER B WITH STROKE;Lu;0;L;;;;;N;;;;0180;
+ 0244;LATIN CAPITAL LETTER U BAR;Lu;0;L;;;;;N;;;;0289;
+ 0245;LATIN CAPITAL LETTER TURNED V;Lu;0;L;;;;;N;;;;028C;
+ 0246;LATIN CAPITAL LETTER E WITH STROKE;Lu;0;L;;;;;N;;;;0247;
+ 0247;LATIN SMALL LETTER E WITH STROKE;Ll;0;L;;;;;N;;;0246;;0246
+ 0248;LATIN CAPITAL LETTER J WITH STROKE;Lu;0;L;;;;;N;;;;0249;
+ 0249;LATIN SMALL LETTER J WITH STROKE;Ll;0;L;;;;;N;;;0248;;0248
+ 024A;LATIN CAPITAL LETTER SMALL Q WITH HOOK TAIL;Lu;0;L;;;;;N;;;;024B;
+ 024B;LATIN SMALL LETTER Q WITH HOOK TAIL;Ll;0;L;;;;;N;;;024A;;024A
+ 024C;LATIN CAPITAL LETTER R WITH STROKE;Lu;0;L;;;;;N;;;;024D;
+ 024D;LATIN SMALL LETTER R WITH STROKE;Ll;0;L;;;;;N;;;024C;;024C
+ 024E;LATIN CAPITAL LETTER Y WITH STROKE;Lu;0;L;;;;;N;;;;024F;
+ 024F;LATIN SMALL LETTER Y WITH STROKE;Ll;0;L;;;;;N;;;024E;;024E
+ 0250;LATIN SMALL LETTER TURNED A;Ll;0;L;;;;;N;;;2C6F;;2C6F
+ 0251;LATIN SMALL LETTER ALPHA;Ll;0;L;;;;;N;LATIN SMALL LETTER SCRIPT A;;2C6D;;2C6D
+ 0252;LATIN SMALL LETTER TURNED ALPHA;Ll;0;L;;;;;N;LATIN SMALL LETTER TURNED SCRIPT A;;2C70;;2C70
+ 0253;LATIN SMALL LETTER B WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER B HOOK;;0181;;0181
+ 0254;LATIN SMALL LETTER OPEN O;Ll;0;L;;;;;N;;;0186;;0186
+ 0255;LATIN SMALL LETTER C WITH CURL;Ll;0;L;;;;;N;LATIN SMALL LETTER C CURL;;;;
+ 0256;LATIN SMALL LETTER D WITH TAIL;Ll;0;L;;;;;N;LATIN SMALL LETTER D RETROFLEX HOOK;;0189;;0189
+ 0257;LATIN SMALL LETTER D WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER D HOOK;;018A;;018A
+ 0258;LATIN SMALL LETTER REVERSED E;Ll;0;L;;;;;N;;;;;
+ 0259;LATIN SMALL LETTER SCHWA;Ll;0;L;;;;;N;;;018F;;018F
+ 025A;LATIN SMALL LETTER SCHWA WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER SCHWA HOOK;;;;
+ 025B;LATIN SMALL LETTER OPEN E;Ll;0;L;;;;;N;LATIN SMALL LETTER EPSILON;;0190;;0190
+ 025C;LATIN SMALL LETTER REVERSED OPEN E;Ll;0;L;;;;;N;LATIN SMALL LETTER REVERSED EPSILON;;A7AB;;A7AB
+ 025D;LATIN SMALL LETTER REVERSED OPEN E WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER REVERSED EPSILON HOOK;;;;
+ 025E;LATIN SMALL LETTER CLOSED REVERSED OPEN E;Ll;0;L;;;;;N;LATIN SMALL LETTER CLOSED REVERSED EPSILON;;;;
+ 025F;LATIN SMALL LETTER DOTLESS J WITH STROKE;Ll;0;L;;;;;N;LATIN SMALL LETTER DOTLESS J BAR;;;;
+ 0260;LATIN SMALL LETTER G WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER G HOOK;;0193;;0193
+ 0261;LATIN SMALL LETTER SCRIPT G;Ll;0;L;;;;;N;;;A7AC;;A7AC
+ 0262;LATIN LETTER SMALL CAPITAL G;Ll;0;L;;;;;N;;;;;
+ 0263;LATIN SMALL LETTER GAMMA;Ll;0;L;;;;;N;;;0194;;0194
+ 0264;LATIN SMALL LETTER RAMS HORN;Ll;0;L;;;;;N;LATIN SMALL LETTER BABY GAMMA;;;;
+ 0265;LATIN SMALL LETTER TURNED H;Ll;0;L;;;;;N;;;A78D;;A78D
+ 0266;LATIN SMALL LETTER H WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER H HOOK;;A7AA;;A7AA
+ 0267;LATIN SMALL LETTER HENG WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER HENG HOOK;;;;
+ 0268;LATIN SMALL LETTER I WITH STROKE;Ll;0;L;;;;;N;LATIN SMALL LETTER BARRED I;;0197;;0197
+ 0269;LATIN SMALL LETTER IOTA;Ll;0;L;;;;;N;;;0196;;0196
+ 026A;LATIN LETTER SMALL CAPITAL I;Ll;0;L;;;;;N;;;A7AE;;A7AE
+ 026B;LATIN SMALL LETTER L WITH MIDDLE TILDE;Ll;0;L;;;;;N;;;2C62;;2C62
+ 026C;LATIN SMALL LETTER L WITH BELT;Ll;0;L;;;;;N;LATIN SMALL LETTER L BELT;;A7AD;;A7AD
+ 026D;LATIN SMALL LETTER L WITH RETROFLEX HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER L RETROFLEX HOOK;;;;
+ 026E;LATIN SMALL LETTER LEZH;Ll;0;L;;;;;N;LATIN SMALL LETTER L YOGH;;;;
+ 026F;LATIN SMALL LETTER TURNED M;Ll;0;L;;;;;N;;;019C;;019C
+ 0270;LATIN SMALL LETTER TURNED M WITH LONG LEG;Ll;0;L;;;;;N;;;;;
+ 0271;LATIN SMALL LETTER M WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER M HOOK;;2C6E;;2C6E
+ 0272;LATIN SMALL LETTER N WITH LEFT HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER N HOOK;;019D;;019D
+ 0273;LATIN SMALL LETTER N WITH RETROFLEX HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER N RETROFLEX HOOK;;;;
+ 0274;LATIN LETTER SMALL CAPITAL N;Ll;0;L;;;;;N;;;;;
+ 0275;LATIN SMALL LETTER BARRED O;Ll;0;L;;;;;N;;;019F;;019F
+ 0276;LATIN LETTER SMALL CAPITAL OE;Ll;0;L;;;;;N;LATIN LETTER SMALL CAPITAL O E;;;;
+ 0277;LATIN SMALL LETTER CLOSED OMEGA;Ll;0;L;;;;;N;;;;;
+ 0278;LATIN SMALL LETTER PHI;Ll;0;L;;;;;N;;;;;
+ 0279;LATIN SMALL LETTER TURNED R;Ll;0;L;;;;;N;;;;;
+ 027A;LATIN SMALL LETTER TURNED R WITH LONG LEG;Ll;0;L;;;;;N;;;;;
+ 027B;LATIN SMALL LETTER TURNED R WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER TURNED R HOOK;;;;
+ 027C;LATIN SMALL LETTER R WITH LONG LEG;Ll;0;L;;;;;N;;;;;
+ 027D;LATIN SMALL LETTER R WITH TAIL;Ll;0;L;;;;;N;LATIN SMALL LETTER R HOOK;;2C64;;2C64
+ 027E;LATIN SMALL LETTER R WITH FISHHOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER FISHHOOK R;;;;
+ 027F;LATIN SMALL LETTER REVERSED R WITH FISHHOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER REVERSED FISHHOOK R;;;;
+ 0280;LATIN LETTER SMALL CAPITAL R;Ll;0;L;;;;;N;;;01A6;;01A6
+ 0281;LATIN LETTER SMALL CAPITAL INVERTED R;Ll;0;L;;;;;N;;;;;
+ 0282;LATIN SMALL LETTER S WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER S HOOK;;A7C5;;A7C5
+ 0283;LATIN SMALL LETTER ESH;Ll;0;L;;;;;N;;;01A9;;01A9
+ 0284;LATIN SMALL LETTER DOTLESS J WITH STROKE AND HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER DOTLESS J BAR HOOK;;;;
+ 0285;LATIN SMALL LETTER SQUAT REVERSED ESH;Ll;0;L;;;;;N;;;;;
+ 0286;LATIN SMALL LETTER ESH WITH CURL;Ll;0;L;;;;;N;LATIN SMALL LETTER ESH CURL;;;;
+ 0287;LATIN SMALL LETTER TURNED T;Ll;0;L;;;;;N;;;A7B1;;A7B1
+ 0288;LATIN SMALL LETTER T WITH RETROFLEX HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER T RETROFLEX HOOK;;01AE;;01AE
+ 0289;LATIN SMALL LETTER U BAR;Ll;0;L;;;;;N;;;0244;;0244
+ 028A;LATIN SMALL LETTER UPSILON;Ll;0;L;;;;;N;;;01B1;;01B1
+ 028B;LATIN SMALL LETTER V WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER SCRIPT V;;01B2;;01B2
+ 028C;LATIN SMALL LETTER TURNED V;Ll;0;L;;;;;N;;;0245;;0245
+ 028D;LATIN SMALL LETTER TURNED W;Ll;0;L;;;;;N;;;;;
+ 028E;LATIN SMALL LETTER TURNED Y;Ll;0;L;;;;;N;;;;;
+ 028F;LATIN LETTER SMALL CAPITAL Y;Ll;0;L;;;;;N;;;;;
+ 0290;LATIN SMALL LETTER Z WITH RETROFLEX HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER Z RETROFLEX HOOK;;;;
+ 0291;LATIN SMALL LETTER Z WITH CURL;Ll;0;L;;;;;N;LATIN SMALL LETTER Z CURL;;;;
+ 0292;LATIN SMALL LETTER EZH;Ll;0;L;;;;;N;LATIN SMALL LETTER YOGH;;01B7;;01B7
+ 0293;LATIN SMALL LETTER EZH WITH CURL;Ll;0;L;;;;;N;LATIN SMALL LETTER YOGH CURL;;;;
+ 0294;LATIN LETTER GLOTTAL STOP;Lo;0;L;;;;;N;;;;;
+ 0295;LATIN LETTER PHARYNGEAL VOICED FRICATIVE;Ll;0;L;;;;;N;LATIN LETTER REVERSED GLOTTAL STOP;;;;
+ 0296;LATIN LETTER INVERTED GLOTTAL STOP;Ll;0;L;;;;;N;;;;;
+ 0297;LATIN LETTER STRETCHED C;Ll;0;L;;;;;N;;;;;
+ 0298;LATIN LETTER BILABIAL CLICK;Ll;0;L;;;;;N;LATIN LETTER BULLSEYE;;;;
+ 0299;LATIN LETTER SMALL CAPITAL B;Ll;0;L;;;;;N;;;;;
+ 029A;LATIN SMALL LETTER CLOSED OPEN E;Ll;0;L;;;;;N;LATIN SMALL LETTER CLOSED EPSILON;;;;
+ 029B;LATIN LETTER SMALL CAPITAL G WITH HOOK;Ll;0;L;;;;;N;LATIN LETTER SMALL CAPITAL G HOOK;;;;
+ 029C;LATIN LETTER SMALL CAPITAL H;Ll;0;L;;;;;N;;;;;
+ 029D;LATIN SMALL LETTER J WITH CROSSED-TAIL;Ll;0;L;;;;;N;LATIN SMALL LETTER CROSSED-TAIL J;;A7B2;;A7B2
+ 029E;LATIN SMALL LETTER TURNED K;Ll;0;L;;;;;N;;;A7B0;;A7B0
+ 029F;LATIN LETTER SMALL CAPITAL L;Ll;0;L;;;;;N;;;;;
+ 02A0;LATIN SMALL LETTER Q WITH HOOK;Ll;0;L;;;;;N;LATIN SMALL LETTER Q HOOK;;;;
+ 02A1;LATIN LETTER GLOTTAL STOP WITH STROKE;Ll;0;L;;;;;N;LATIN LETTER GLOTTAL STOP BAR;;;;
+ 02A2;LATIN LETTER REVERSED GLOTTAL STOP WITH STROKE;Ll;0;L;;;;;N;LATIN LETTER REVERSED GLOTTAL STOP BAR;;;;
+ 02A3;LATIN SMALL LETTER DZ DIGRAPH;Ll;0;L;;;;;N;LATIN SMALL LETTER D Z;;;;
+ 02A4;LATIN SMALL LETTER DEZH DIGRAPH;Ll;0;L;;;;;N;LATIN SMALL LETTER D YOGH;;;;
+ 02A5;LATIN SMALL LETTER DZ DIGRAPH WITH CURL;Ll;0;L;;;;;N;LATIN SMALL LETTER D Z CURL;;;;
+ 02A6;LATIN SMALL LETTER TS DIGRAPH;Ll;0;L;;;;;N;LATIN SMALL LETTER T S;;;;
+ 02A7;LATIN SMALL LETTER TESH DIGRAPH;Ll;0;L;;;;;N;LATIN SMALL LETTER T ESH;;;;
+ 02A8;LATIN SMALL LETTER TC DIGRAPH WITH CURL;Ll;0;L;;;;;N;LATIN SMALL LETTER T C CURL;;;;
+ 02A9;LATIN SMALL LETTER FENG DIGRAPH;Ll;0;L;;;;;N;;;;;
+ 02AA;LATIN SMALL LETTER LS DIGRAPH;Ll;0;L;;;;;N;;;;;
+ 02AB;LATIN SMALL LETTER LZ DIGRAPH;Ll;0;L;;;;;N;;;;;
+ 02AC;LATIN LETTER BILABIAL PERCUSSIVE;Ll;0;L;;;;;N;;;;;
+ 02AD;LATIN LETTER BIDENTAL PERCUSSIVE;Ll;0;L;;;;;N;;;;;
+ 02AE;LATIN SMALL LETTER TURNED H WITH FISHHOOK;Ll;0;L;;;;;N;;;;;
+ 02AF;LATIN SMALL LETTER TURNED H WITH FISHHOOK AND TAIL;Ll;0;L;;;;;N;;;;;
+ 02B0;MODIFIER LETTER SMALL H;Lm;0;L;<super> 0068;;;;N;;;;;
+ 02B1;MODIFIER LETTER SMALL H WITH HOOK;Lm;0;L;<super> 0266;;;;N;MODIFIER LETTER SMALL H HOOK;;;;
+ 02B2;MODIFIER LETTER SMALL J;Lm;0;L;<super> 006A;;;;N;;;;;
+ 02B3;MODIFIER LETTER SMALL R;Lm;0;L;<super> 0072;;;;N;;;;;
+ 02B4;MODIFIER LETTER SMALL TURNED R;Lm;0;L;<super> 0279;;;;N;;;;;
+ 02B5;MODIFIER LETTER SMALL TURNED R WITH HOOK;Lm;0;L;<super> 027B;;;;N;MODIFIER LETTER SMALL TURNED R HOOK;;;;
+ 02B6;MODIFIER LETTER SMALL CAPITAL INVERTED R;Lm;0;L;<super> 0281;;;;N;;;;;
+ 02B7;MODIFIER LETTER SMALL W;Lm;0;L;<super> 0077;;;;N;;;;;
+ 02B8;MODIFIER LETTER SMALL Y;Lm;0;L;<super> 0079;;;;N;;;;;
+ 02B9;MODIFIER LETTER PRIME;Lm;0;ON;;;;;N;;;;;
+ 02BA;MODIFIER LETTER DOUBLE PRIME;Lm;0;ON;;;;;N;;;;;
+ 02BB;MODIFIER LETTER TURNED COMMA;Lm;0;L;;;;;N;;;;;
+ 02BC;MODIFIER LETTER APOSTROPHE;Lm;0;L;;;;;N;;;;;
+ 02BD;MODIFIER LETTER REVERSED COMMA;Lm;0;L;;;;;N;;;;;
+ 02BE;MODIFIER LETTER RIGHT HALF RING;Lm;0;L;;;;;N;;;;;
+ 02BF;MODIFIER LETTER LEFT HALF RING;Lm;0;L;;;;;N;;;;;
+ 02C0;MODIFIER LETTER GLOTTAL STOP;Lm;0;L;;;;;N;;;;;
+ 02C1;MODIFIER LETTER REVERSED GLOTTAL STOP;Lm;0;L;;;;;N;;;;;
+ 02C2;MODIFIER LETTER LEFT ARROWHEAD;Sk;0;ON;;;;;N;;;;;
+ 02C3;MODIFIER LETTER RIGHT ARROWHEAD;Sk;0;ON;;;;;N;;;;;
+ 02C4;MODIFIER LETTER UP ARROWHEAD;Sk;0;ON;;;;;N;;;;;
+ 02C5;MODIFIER LETTER DOWN ARROWHEAD;Sk;0;ON;;;;;N;;;;;
+ 02C6;MODIFIER LETTER CIRCUMFLEX ACCENT;Lm;0;ON;;;;;N;MODIFIER LETTER CIRCUMFLEX;;;;
+ 02C7;CARON;Lm;0;ON;;;;;N;MODIFIER LETTER HACEK;;;;
+ 02C8;MODIFIER LETTER VERTICAL LINE;Lm;0;ON;;;;;N;;;;;
+ 02C9;MODIFIER LETTER MACRON;Lm;0;ON;;;;;N;;;;;
+ 02CA;MODIFIER LETTER ACUTE ACCENT;Lm;0;ON;;;;;N;MODIFIER LETTER ACUTE;;;;
+ 02CB;MODIFIER LETTER GRAVE ACCENT;Lm;0;ON;;;;;N;MODIFIER LETTER GRAVE;;;;
+ 02CC;MODIFIER LETTER LOW VERTICAL LINE;Lm;0;ON;;;;;N;;;;;
+ 02CD;MODIFIER LETTER LOW MACRON;Lm;0;ON;;;;;N;;;;;
+ 02CE;MODIFIER LETTER LOW GRAVE ACCENT;Lm;0;ON;;;;;N;MODIFIER LETTER LOW GRAVE;;;;
+ 02CF;MODIFIER LETTER LOW ACUTE ACCENT;Lm;0;ON;;;;;N;MODIFIER LETTER LOW ACUTE;;;;
+ 02D0;MODIFIER LETTER TRIANGULAR COLON;Lm;0;L;;;;;N;;;;;
+ 02D1;MODIFIER LETTER HALF TRIANGULAR COLON;Lm;0;L;;;;;N;;;;;
+ 02D2;MODIFIER LETTER CENTRED RIGHT HALF RING;Sk;0;ON;;;;;N;MODIFIER LETTER CENTERED RIGHT HALF RING;;;;
+ 02D3;MODIFIER LETTER CENTRED LEFT HALF RING;Sk;0;ON;;;;;N;MODIFIER LETTER CENTERED LEFT HALF RING;;;;
+ 02D4;MODIFIER LETTER UP TACK;Sk;0;ON;;;;;N;;;;;
+ 02D5;MODIFIER LETTER DOWN TACK;Sk;0;ON;;;;;N;;;;;
+ 02D6;MODIFIER LETTER PLUS SIGN;Sk;0;ON;;;;;N;;;;;
+ 02D7;MODIFIER LETTER MINUS SIGN;Sk;0;ON;;;;;N;;;;;
+ 02D8;BREVE;Sk;0;ON;<compat> 0020 0306;;;;N;SPACING BREVE;;;;
+ 02D9;DOT ABOVE;Sk;0;ON;<compat> 0020 0307;;;;N;SPACING DOT ABOVE;;;;
+ 02DA;RING ABOVE;Sk;0;ON;<compat> 0020 030A;;;;N;SPACING RING ABOVE;;;;
+ 02DB;OGONEK;Sk;0;ON;<compat> 0020 0328;;;;N;SPACING OGONEK;;;;
+ 02DC;SMALL TILDE;Sk;0;ON;<compat> 0020 0303;;;;N;SPACING TILDE;;;;
+ 02DD;DOUBLE ACUTE ACCENT;Sk;0;ON;<compat> 0020 030B;;;;N;SPACING DOUBLE ACUTE;;;;
+ 02DE;MODIFIER LETTER RHOTIC HOOK;Sk;0;ON;;;;;N;;;;;
+ 02DF;MODIFIER LETTER CROSS ACCENT;Sk;0;ON;;;;;N;;;;;
+ 02E0;MODIFIER LETTER SMALL GAMMA;Lm;0;L;<super> 0263;;;;N;;;;;
+ 02E1;MODIFIER LETTER SMALL L;Lm;0;L;<super> 006C;;;;N;;;;;
+ 02E2;MODIFIER LETTER SMALL S;Lm;0;L;<super> 0073;;;;N;;;;;
+ 02E3;MODIFIER LETTER SMALL X;Lm;0;L;<super> 0078;;;;N;;;;;
+ 02E4;MODIFIER LETTER SMALL REVERSED GLOTTAL STOP;Lm;0;L;<super> 0295;;;;N;;;;;
+ 02E5;MODIFIER LETTER EXTRA-HIGH TONE BAR;Sk;0;ON;;;;;N;;;;;
+ 02E6;MODIFIER LETTER HIGH TONE BAR;Sk;0;ON;;;;;N;;;;;
+ 02E7;MODIFIER LETTER MID TONE BAR;Sk;0;ON;;;;;N;;;;;
+ 02E8;MODIFIER LETTER LOW TONE BAR;Sk;0;ON;;;;;N;;;;;
+ 02E9;MODIFIER LETTER EXTRA-LOW TONE BAR;Sk;0;ON;;;;;N;;;;;
+ 02EA;MODIFIER LETTER YIN DEPARTING TONE MARK;Sk;0;ON;;;;;N;;;;;
+ 02EB;MODIFIER LETTER YANG DEPARTING TONE MARK;Sk;0;ON;;;;;N;;;;;
+ 02EC;MODIFIER LETTER VOICING;Lm;0;ON;;;;;N;;;;;
+ 02ED;MODIFIER LETTER UNASPIRATED;Sk;0;ON;;;;;N;;;;;
+ 02EE;MODIFIER LETTER DOUBLE APOSTROPHE;Lm;0;L;;;;;N;;;;;
+ 02EF;MODIFIER LETTER LOW DOWN ARROWHEAD;Sk;0;ON;;;;;N;;;;;
+ 02F0;MODIFIER LETTER LOW UP ARROWHEAD;Sk;0;ON;;;;;N;;;;;
+ 02F1;MODIFIER LETTER LOW LEFT ARROWHEAD;Sk;0;ON;;;;;N;;;;;
+ 02F2;MODIFIER LETTER LOW RIGHT ARROWHEAD;Sk;0;ON;;;;;N;;;;;
+ 02F3;MODIFIER LETTER LOW RING;Sk;0;ON;;;;;N;;;;;
+ 02F4;MODIFIER LETTER MIDDLE GRAVE ACCENT;Sk;0;ON;;;;;N;;;;;
+ 02F5;MODIFIER LETTER MIDDLE DOUBLE GRAVE ACCENT;Sk;0;ON;;;;;N;;;;;
+ 02F6;MODIFIER LETTER MIDDLE DOUBLE ACUTE ACCENT;Sk;0;ON;;;;;N;;;;;
+ 02F7;MODIFIER LETTER LOW TILDE;Sk;0;ON;;;;;N;;;;;
+ 02F8;MODIFIER LETTER RAISED COLON;Sk;0;ON;;;;;N;;;;;
+ 02F9;MODIFIER LETTER BEGIN HIGH TONE;Sk;0;ON;;;;;N;;;;;
+ 02FA;MODIFIER LETTER END HIGH TONE;Sk;0;ON;;;;;N;;;;;
+ 02FB;MODIFIER LETTER BEGIN LOW TONE;Sk;0;ON;;;;;N;;;;;
+ 02FC;MODIFIER LETTER END LOW TONE;Sk;0;ON;;;;;N;;;;;
+ 02FD;MODIFIER LETTER SHELF;Sk;0;ON;;;;;N;;;;;
+ 02FE;MODIFIER LETTER OPEN SHELF;Sk;0;ON;;;;;N;;;;;
+ 02FF;MODIFIER LETTER LOW LEFT ARROW;Sk;0;ON;;;;;N;;;;;
+ 0300;COMBINING GRAVE ACCENT;Mn;230;NSM;;;;;N;NON-SPACING GRAVE;;;;
+ 0301;COMBINING ACUTE ACCENT;Mn;230;NSM;;;;;N;NON-SPACING ACUTE;;;;
+ 0302;COMBINING CIRCUMFLEX ACCENT;Mn;230;NSM;;;;;N;NON-SPACING CIRCUMFLEX;;;;
+ 0303;COMBINING TILDE;Mn;230;NSM;;;;;N;NON-SPACING TILDE;;;;
+ 0304;COMBINING MACRON;Mn;230;NSM;;;;;N;NON-SPACING MACRON;;;;
+ 0305;COMBINING OVERLINE;Mn;230;NSM;;;;;N;NON-SPACING OVERSCORE;;;;
+ 0306;COMBINING BREVE;Mn;230;NSM;;;;;N;NON-SPACING BREVE;;;;
+ 0307;COMBINING DOT ABOVE;Mn;230;NSM;;;;;N;NON-SPACING DOT ABOVE;;;;
+ 0308;COMBINING DIAERESIS;Mn;230;NSM;;;;;N;NON-SPACING DIAERESIS;;;;
+ 0309;COMBINING HOOK ABOVE;Mn;230;NSM;;;;;N;NON-SPACING HOOK ABOVE;;;;
+ 030A;COMBINING RING ABOVE;Mn;230;NSM;;;;;N;NON-SPACING RING ABOVE;;;;
+ 030B;COMBINING DOUBLE ACUTE ACCENT;Mn;230;NSM;;;;;N;NON-SPACING DOUBLE ACUTE;;;;
+ 030C;COMBINING CARON;Mn;230;NSM;;;;;N;NON-SPACING HACEK;;;;
+ 030D;COMBINING VERTICAL LINE ABOVE;Mn;230;NSM;;;;;N;NON-SPACING VERTICAL LINE ABOVE;;;;
+ 030E;COMBINING DOUBLE VERTICAL LINE ABOVE;Mn;230;NSM;;;;;N;NON-SPACING DOUBLE VERTICAL LINE ABOVE;;;;
+ 030F;COMBINING DOUBLE GRAVE ACCENT;Mn;230;NSM;;;;;N;NON-SPACING DOUBLE GRAVE;;;;
+ 0310;COMBINING CANDRABINDU;Mn;230;NSM;;;;;N;NON-SPACING CANDRABINDU;;;;
+ 0311;COMBINING INVERTED BREVE;Mn;230;NSM;;;;;N;NON-SPACING INVERTED BREVE;;;;
+ 0312;COMBINING TURNED COMMA ABOVE;Mn;230;NSM;;;;;N;NON-SPACING TURNED COMMA ABOVE;;;;
+ 0313;COMBINING COMMA ABOVE;Mn;230;NSM;;;;;N;NON-SPACING COMMA ABOVE;;;;
+ 0314;COMBINING REVERSED COMMA ABOVE;Mn;230;NSM;;;;;N;NON-SPACING REVERSED COMMA ABOVE;;;;
+ 0315;COMBINING COMMA ABOVE RIGHT;Mn;232;NSM;;;;;N;NON-SPACING COMMA ABOVE RIGHT;;;;
+ 0316;COMBINING GRAVE ACCENT BELOW;Mn;220;NSM;;;;;N;NON-SPACING GRAVE BELOW;;;;
+ 0317;COMBINING ACUTE ACCENT BELOW;Mn;220;NSM;;;;;N;NON-SPACING ACUTE BELOW;;;;
+ 0318;COMBINING LEFT TACK BELOW;Mn;220;NSM;;;;;N;NON-SPACING LEFT TACK BELOW;;;;
+ 0319;COMBINING RIGHT TACK BELOW;Mn;220;NSM;;;;;N;NON-SPACING RIGHT TACK BELOW;;;;
+ 031A;COMBINING LEFT ANGLE ABOVE;Mn;232;NSM;;;;;N;NON-SPACING LEFT ANGLE ABOVE;;;;
+ 031B;COMBINING HORN;Mn;216;NSM;;;;;N;NON-SPACING HORN;;;;
+ 031C;COMBINING LEFT HALF RING BELOW;Mn;220;NSM;;;;;N;NON-SPACING LEFT HALF RING BELOW;;;;
+ 031D;COMBINING UP TACK BELOW;Mn;220;NSM;;;;;N;NON-SPACING UP TACK BELOW;;;;
+ 031E;COMBINING DOWN TACK BELOW;Mn;220;NSM;;;;;N;NON-SPACING DOWN TACK BELOW;;;;
+ 031F;COMBINING PLUS SIGN BELOW;Mn;220;NSM;;;;;N;NON-SPACING PLUS SIGN BELOW;;;;
+ 0320;COMBINING MINUS SIGN BELOW;Mn;220;NSM;;;;;N;NON-SPACING MINUS SIGN BELOW;;;;
+ 0321;COMBINING PALATALIZED HOOK BELOW;Mn;202;NSM;;;;;N;NON-SPACING PALATALIZED HOOK BELOW;;;;
+ 0322;COMBINING RETROFLEX HOOK BELOW;Mn;202;NSM;;;;;N;NON-SPACING RETROFLEX HOOK BELOW;;;;
+ 0323;COMBINING DOT BELOW;Mn;220;NSM;;;;;N;NON-SPACING DOT BELOW;;;;
+ 0324;COMBINING DIAERESIS BELOW;Mn;220;NSM;;;;;N;NON-SPACING DOUBLE DOT BELOW;;;;
+ 0325;COMBINING RING BELOW;Mn;220;NSM;;;;;N;NON-SPACING RING BELOW;;;;
+ 0326;COMBINING COMMA BELOW;Mn;220;NSM;;;;;N;NON-SPACING COMMA BELOW;;;;
+ 0327;COMBINING CEDILLA;Mn;202;NSM;;;;;N;NON-SPACING CEDILLA;;;;
+ 0328;COMBINING OGONEK;Mn;202;NSM;;;;;N;NON-SPACING OGONEK;;;;
+ 0329;COMBINING VERTICAL LINE BELOW;Mn;220;NSM;;;;;N;NON-SPACING VERTICAL LINE BELOW;;;;
+ 032A;COMBINING BRIDGE BELOW;Mn;220;NSM;;;;;N;NON-SPACING BRIDGE BELOW;;;;
+ 032B;COMBINING INVERTED DOUBLE ARCH BELOW;Mn;220;NSM;;;;;N;NON-SPACING INVERTED DOUBLE ARCH BELOW;;;;
+ 032C;COMBINING CARON BELOW;Mn;220;NSM;;;;;N;NON-SPACING HACEK BELOW;;;;
+ 032D;COMBINING CIRCUMFLEX ACCENT BELOW;Mn;220;NSM;;;;;N;NON-SPACING CIRCUMFLEX BELOW;;;;
+ 032E;COMBINING BREVE BELOW;Mn;220;NSM;;;;;N;NON-SPACING BREVE BELOW;;;;
+ 032F;COMBINING INVERTED BREVE BELOW;Mn;220;NSM;;;;;N;NON-SPACING INVERTED BREVE BELOW;;;;
+ 0330;COMBINING TILDE BELOW;Mn;220;NSM;;;;;N;NON-SPACING TILDE BELOW;;;;
+ 0331;COMBINING MACRON BELOW;Mn;220;NSM;;;;;N;NON-SPACING MACRON BELOW;;;;
+ 0332;COMBINING LOW LINE;Mn;220;NSM;;;;;N;NON-SPACING UNDERSCORE;;;;
+ 0333;COMBINING DOUBLE LOW LINE;Mn;220;NSM;;;;;N;NON-SPACING DOUBLE UNDERSCORE;;;;
+ 0334;COMBINING TILDE OVERLAY;Mn;1;NSM;;;;;N;NON-SPACING TILDE OVERLAY;;;;
+ 0335;COMBINING SHORT STROKE OVERLAY;Mn;1;NSM;;;;;N;NON-SPACING SHORT BAR OVERLAY;;;;
+ 0336;COMBINING LONG STROKE OVERLAY;Mn;1;NSM;;;;;N;NON-SPACING LONG BAR OVERLAY;;;;
+ 0337;COMBINING SHORT SOLIDUS OVERLAY;Mn;1;NSM;;;;;N;NON-SPACING SHORT SLASH OVERLAY;;;;
+ 0338;COMBINING LONG SOLIDUS OVERLAY;Mn;1;NSM;;;;;N;NON-SPACING LONG SLASH OVERLAY;;;;
+ 0339;COMBINING RIGHT HALF RING BELOW;Mn;220;NSM;;;;;N;NON-SPACING RIGHT HALF RING BELOW;;;;
+ 033A;COMBINING INVERTED BRIDGE BELOW;Mn;220;NSM;;;;;N;NON-SPACING INVERTED BRIDGE BELOW;;;;
+ 033B;COMBINING SQUARE BELOW;Mn;220;NSM;;;;;N;NON-SPACING SQUARE BELOW;;;;
+ 033C;COMBINING SEAGULL BELOW;Mn;220;NSM;;;;;N;NON-SPACING SEAGULL BELOW;;;;
+ 033D;COMBINING X ABOVE;Mn;230;NSM;;;;;N;NON-SPACING X ABOVE;;;;
+ 033E;COMBINING VERTICAL TILDE;Mn;230;NSM;;;;;N;NON-SPACING VERTICAL TILDE;;;;
+ 033F;COMBINING DOUBLE OVERLINE;Mn;230;NSM;;;;;N;NON-SPACING DOUBLE OVERSCORE;;;;
+ 0340;COMBINING GRAVE TONE MARK;Mn;230;NSM;0300;;;;N;NON-SPACING GRAVE TONE MARK;;;;
+ 0341;COMBINING ACUTE TONE MARK;Mn;230;NSM;0301;;;;N;NON-SPACING ACUTE TONE MARK;;;;
+ 0342;COMBINING GREEK PERISPOMENI;Mn;230;NSM;;;;;N;;;;;
+ 0343;COMBINING GREEK KORONIS;Mn;230;NSM;0313;;;;N;;;;;
+ 0344;COMBINING GREEK DIALYTIKA TONOS;Mn;230;NSM;0308 0301;;;;N;GREEK NON-SPACING DIAERESIS TONOS;;;;
+ 0345;COMBINING GREEK YPOGEGRAMMENI;Mn;240;NSM;;;;;N;GREEK NON-SPACING IOTA BELOW;;0399;;0399
+ 0346;COMBINING BRIDGE ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 0347;COMBINING EQUALS SIGN BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0348;COMBINING DOUBLE VERTICAL LINE BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0349;COMBINING LEFT ANGLE BELOW;Mn;220;NSM;;;;;N;;;;;
+ 034A;COMBINING NOT TILDE ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 034B;COMBINING HOMOTHETIC ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 034C;COMBINING ALMOST EQUAL TO ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 034D;COMBINING LEFT RIGHT ARROW BELOW;Mn;220;NSM;;;;;N;;;;;
+ 034E;COMBINING UPWARDS ARROW BELOW;Mn;220;NSM;;;;;N;;;;;
+ 034F;COMBINING GRAPHEME JOINER;Mn;0;NSM;;;;;N;;;;;
+ 0350;COMBINING RIGHT ARROWHEAD ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 0351;COMBINING LEFT HALF RING ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 0352;COMBINING FERMATA;Mn;230;NSM;;;;;N;;;;;
+ 0353;COMBINING X BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0354;COMBINING LEFT ARROWHEAD BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0355;COMBINING RIGHT ARROWHEAD BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0356;COMBINING RIGHT ARROWHEAD AND UP ARROWHEAD BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0357;COMBINING RIGHT HALF RING ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 0358;COMBINING DOT ABOVE RIGHT;Mn;232;NSM;;;;;N;;;;;
+ 0359;COMBINING ASTERISK BELOW;Mn;220;NSM;;;;;N;;;;;
+ 035A;COMBINING DOUBLE RING BELOW;Mn;220;NSM;;;;;N;;;;;
+ 035B;COMBINING ZIGZAG ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 035C;COMBINING DOUBLE BREVE BELOW;Mn;233;NSM;;;;;N;;;;;
+ 035D;COMBINING DOUBLE BREVE;Mn;234;NSM;;;;;N;;;;;
+ 035E;COMBINING DOUBLE MACRON;Mn;234;NSM;;;;;N;;;;;
+ 035F;COMBINING DOUBLE MACRON BELOW;Mn;233;NSM;;;;;N;;;;;
+ 0360;COMBINING DOUBLE TILDE;Mn;234;NSM;;;;;N;;;;;
+ 0361;COMBINING DOUBLE INVERTED BREVE;Mn;234;NSM;;;;;N;;;;;
+ 0362;COMBINING DOUBLE RIGHTWARDS ARROW BELOW;Mn;233;NSM;;;;;N;;;;;
+ 0363;COMBINING LATIN SMALL LETTER A;Mn;230;NSM;;;;;N;;;;;
+ 0364;COMBINING LATIN SMALL LETTER E;Mn;230;NSM;;;;;N;;;;;
+ 0365;COMBINING LATIN SMALL LETTER I;Mn;230;NSM;;;;;N;;;;;
+ 0366;COMBINING LATIN SMALL LETTER O;Mn;230;NSM;;;;;N;;;;;
+ 0367;COMBINING LATIN SMALL LETTER U;Mn;230;NSM;;;;;N;;;;;
+ 0368;COMBINING LATIN SMALL LETTER C;Mn;230;NSM;;;;;N;;;;;
+ 0369;COMBINING LATIN SMALL LETTER D;Mn;230;NSM;;;;;N;;;;;
+ 036A;COMBINING LATIN SMALL LETTER H;Mn;230;NSM;;;;;N;;;;;
+ 036B;COMBINING LATIN SMALL LETTER M;Mn;230;NSM;;;;;N;;;;;
+ 036C;COMBINING LATIN SMALL LETTER R;Mn;230;NSM;;;;;N;;;;;
+ 036D;COMBINING LATIN SMALL LETTER T;Mn;230;NSM;;;;;N;;;;;
+ 036E;COMBINING LATIN SMALL LETTER V;Mn;230;NSM;;;;;N;;;;;
+ 036F;COMBINING LATIN SMALL LETTER X;Mn;230;NSM;;;;;N;;;;;
+ 0370;GREEK CAPITAL LETTER HETA;Lu;0;L;;;;;N;;;;0371;
+ 0371;GREEK SMALL LETTER HETA;Ll;0;L;;;;;N;;;0370;;0370
+ 0372;GREEK CAPITAL LETTER ARCHAIC SAMPI;Lu;0;L;;;;;N;;;;0373;
+ 0373;GREEK SMALL LETTER ARCHAIC SAMPI;Ll;0;L;;;;;N;;;0372;;0372
+ 0374;GREEK NUMERAL SIGN;Lm;0;ON;02B9;;;;N;GREEK UPPER NUMERAL SIGN;;;;
+ 0375;GREEK LOWER NUMERAL SIGN;Sk;0;ON;;;;;N;;;;;
+ 0376;GREEK CAPITAL LETTER PAMPHYLIAN DIGAMMA;Lu;0;L;;;;;N;;;;0377;
+ 0377;GREEK SMALL LETTER PAMPHYLIAN DIGAMMA;Ll;0;L;;;;;N;;;0376;;0376
+ 037A;GREEK YPOGEGRAMMENI;Lm;0;L;<compat> 0020 0345;;;;N;GREEK SPACING IOTA BELOW;;;;
+ 037B;GREEK SMALL REVERSED LUNATE SIGMA SYMBOL;Ll;0;L;;;;;N;;;03FD;;03FD
+ 037C;GREEK SMALL DOTTED LUNATE SIGMA SYMBOL;Ll;0;L;;;;;N;;;03FE;;03FE
+ 037D;GREEK SMALL REVERSED DOTTED LUNATE SIGMA SYMBOL;Ll;0;L;;;;;N;;;03FF;;03FF
+ 037E;GREEK QUESTION MARK;Po;0;ON;003B;;;;N;;;;;
+ 037F;GREEK CAPITAL LETTER YOT;Lu;0;L;;;;;N;;;;03F3;
+ 0384;GREEK TONOS;Sk;0;ON;<compat> 0020 0301;;;;N;GREEK SPACING TONOS;;;;
+ 0385;GREEK DIALYTIKA TONOS;Sk;0;ON;00A8 0301;;;;N;GREEK SPACING DIAERESIS TONOS;;;;
+ 0386;GREEK CAPITAL LETTER ALPHA WITH TONOS;Lu;0;L;0391 0301;;;;N;GREEK CAPITAL LETTER ALPHA TONOS;;;03AC;
+ 0387;GREEK ANO TELEIA;Po;0;ON;00B7;;;;N;;;;;
+ 0388;GREEK CAPITAL LETTER EPSILON WITH TONOS;Lu;0;L;0395 0301;;;;N;GREEK CAPITAL LETTER EPSILON TONOS;;;03AD;
+ 0389;GREEK CAPITAL LETTER ETA WITH TONOS;Lu;0;L;0397 0301;;;;N;GREEK CAPITAL LETTER ETA TONOS;;;03AE;
+ 038A;GREEK CAPITAL LETTER IOTA WITH TONOS;Lu;0;L;0399 0301;;;;N;GREEK CAPITAL LETTER IOTA TONOS;;;03AF;
+ 038C;GREEK CAPITAL LETTER OMICRON WITH TONOS;Lu;0;L;039F 0301;;;;N;GREEK CAPITAL LETTER OMICRON TONOS;;;03CC;
+ 038E;GREEK CAPITAL LETTER UPSILON WITH TONOS;Lu;0;L;03A5 0301;;;;N;GREEK CAPITAL LETTER UPSILON TONOS;;;03CD;
+ 038F;GREEK CAPITAL LETTER OMEGA WITH TONOS;Lu;0;L;03A9 0301;;;;N;GREEK CAPITAL LETTER OMEGA TONOS;;;03CE;
+ 0390;GREEK SMALL LETTER IOTA WITH DIALYTIKA AND TONOS;Ll;0;L;03CA 0301;;;;N;GREEK SMALL LETTER IOTA DIAERESIS TONOS;;;;
+ 0391;GREEK CAPITAL LETTER ALPHA;Lu;0;L;;;;;N;;;;03B1;
+ 0392;GREEK CAPITAL LETTER BETA;Lu;0;L;;;;;N;;;;03B2;
+ 0393;GREEK CAPITAL LETTER GAMMA;Lu;0;L;;;;;N;;;;03B3;
+ 0394;GREEK CAPITAL LETTER DELTA;Lu;0;L;;;;;N;;;;03B4;
+ 0395;GREEK CAPITAL LETTER EPSILON;Lu;0;L;;;;;N;;;;03B5;
+ 0396;GREEK CAPITAL LETTER ZETA;Lu;0;L;;;;;N;;;;03B6;
+ 0397;GREEK CAPITAL LETTER ETA;Lu;0;L;;;;;N;;;;03B7;
+ 0398;GREEK CAPITAL LETTER THETA;Lu;0;L;;;;;N;;;;03B8;
+ 0399;GREEK CAPITAL LETTER IOTA;Lu;0;L;;;;;N;;;;03B9;
+ 039A;GREEK CAPITAL LETTER KAPPA;Lu;0;L;;;;;N;;;;03BA;
+ 039B;GREEK CAPITAL LETTER LAMDA;Lu;0;L;;;;;N;GREEK CAPITAL LETTER LAMBDA;;;03BB;
+ 039C;GREEK CAPITAL LETTER MU;Lu;0;L;;;;;N;;;;03BC;
+ 039D;GREEK CAPITAL LETTER NU;Lu;0;L;;;;;N;;;;03BD;
+ 039E;GREEK CAPITAL LETTER XI;Lu;0;L;;;;;N;;;;03BE;
+ 039F;GREEK CAPITAL LETTER OMICRON;Lu;0;L;;;;;N;;;;03BF;
+ 03A0;GREEK CAPITAL LETTER PI;Lu;0;L;;;;;N;;;;03C0;
+ 03A1;GREEK CAPITAL LETTER RHO;Lu;0;L;;;;;N;;;;03C1;
+ 03A3;GREEK CAPITAL LETTER SIGMA;Lu;0;L;;;;;N;;;;03C3;
+ 03A4;GREEK CAPITAL LETTER TAU;Lu;0;L;;;;;N;;;;03C4;
+ 03A5;GREEK CAPITAL LETTER UPSILON;Lu;0;L;;;;;N;;;;03C5;
+ 03A6;GREEK CAPITAL LETTER PHI;Lu;0;L;;;;;N;;;;03C6;
+ 03A7;GREEK CAPITAL LETTER CHI;Lu;0;L;;;;;N;;;;03C7;
+ 03A8;GREEK CAPITAL LETTER PSI;Lu;0;L;;;;;N;;;;03C8;
+ 03A9;GREEK CAPITAL LETTER OMEGA;Lu;0;L;;;;;N;;;;03C9;
+ 03AA;GREEK CAPITAL LETTER IOTA WITH DIALYTIKA;Lu;0;L;0399 0308;;;;N;GREEK CAPITAL LETTER IOTA DIAERESIS;;;03CA;
+ 03AB;GREEK CAPITAL LETTER UPSILON WITH DIALYTIKA;Lu;0;L;03A5 0308;;;;N;GREEK CAPITAL LETTER UPSILON DIAERESIS;;;03CB;
+ 03AC;GREEK SMALL LETTER ALPHA WITH TONOS;Ll;0;L;03B1 0301;;;;N;GREEK SMALL LETTER ALPHA TONOS;;0386;;0386
+ 03AD;GREEK SMALL LETTER EPSILON WITH TONOS;Ll;0;L;03B5 0301;;;;N;GREEK SMALL LETTER EPSILON TONOS;;0388;;0388
+ 03AE;GREEK SMALL LETTER ETA WITH TONOS;Ll;0;L;03B7 0301;;;;N;GREEK SMALL LETTER ETA TONOS;;0389;;0389
+ 03AF;GREEK SMALL LETTER IOTA WITH TONOS;Ll;0;L;03B9 0301;;;;N;GREEK SMALL LETTER IOTA TONOS;;038A;;038A
+ 03B0;GREEK SMALL LETTER UPSILON WITH DIALYTIKA AND TONOS;Ll;0;L;03CB 0301;;;;N;GREEK SMALL LETTER UPSILON DIAERESIS TONOS;;;;
+ 03B1;GREEK SMALL LETTER ALPHA;Ll;0;L;;;;;N;;;0391;;0391
+ 03B2;GREEK SMALL LETTER BETA;Ll;0;L;;;;;N;;;0392;;0392
+ 03B3;GREEK SMALL LETTER GAMMA;Ll;0;L;;;;;N;;;0393;;0393
+ 03B4;GREEK SMALL LETTER DELTA;Ll;0;L;;;;;N;;;0394;;0394
+ 03B5;GREEK SMALL LETTER EPSILON;Ll;0;L;;;;;N;;;0395;;0395
+ 03B6;GREEK SMALL LETTER ZETA;Ll;0;L;;;;;N;;;0396;;0396
+ 03B7;GREEK SMALL LETTER ETA;Ll;0;L;;;;;N;;;0397;;0397
+ 03B8;GREEK SMALL LETTER THETA;Ll;0;L;;;;;N;;;0398;;0398
+ 03B9;GREEK SMALL LETTER IOTA;Ll;0;L;;;;;N;;;0399;;0399
+ 03BA;GREEK SMALL LETTER KAPPA;Ll;0;L;;;;;N;;;039A;;039A
+ 03BB;GREEK SMALL LETTER LAMDA;Ll;0;L;;;;;N;GREEK SMALL LETTER LAMBDA;;039B;;039B
+ 03BC;GREEK SMALL LETTER MU;Ll;0;L;;;;;N;;;039C;;039C
+ 03BD;GREEK SMALL LETTER NU;Ll;0;L;;;;;N;;;039D;;039D
+ 03BE;GREEK SMALL LETTER XI;Ll;0;L;;;;;N;;;039E;;039E
+ 03BF;GREEK SMALL LETTER OMICRON;Ll;0;L;;;;;N;;;039F;;039F
+ 03C0;GREEK SMALL LETTER PI;Ll;0;L;;;;;N;;;03A0;;03A0
+ 03C1;GREEK SMALL LETTER RHO;Ll;0;L;;;;;N;;;03A1;;03A1
+ 03C2;GREEK SMALL LETTER FINAL SIGMA;Ll;0;L;;;;;N;;;03A3;;03A3
+ 03C3;GREEK SMALL LETTER SIGMA;Ll;0;L;;;;;N;;;03A3;;03A3
+ 03C4;GREEK SMALL LETTER TAU;Ll;0;L;;;;;N;;;03A4;;03A4
+ 03C5;GREEK SMALL LETTER UPSILON;Ll;0;L;;;;;N;;;03A5;;03A5
+ 03C6;GREEK SMALL LETTER PHI;Ll;0;L;;;;;N;;;03A6;;03A6
+ 03C7;GREEK SMALL LETTER CHI;Ll;0;L;;;;;N;;;03A7;;03A7
+ 03C8;GREEK SMALL LETTER PSI;Ll;0;L;;;;;N;;;03A8;;03A8
+ 03C9;GREEK SMALL LETTER OMEGA;Ll;0;L;;;;;N;;;03A9;;03A9
+ 03CA;GREEK SMALL LETTER IOTA WITH DIALYTIKA;Ll;0;L;03B9 0308;;;;N;GREEK SMALL LETTER IOTA DIAERESIS;;03AA;;03AA
+ 03CB;GREEK SMALL LETTER UPSILON WITH DIALYTIKA;Ll;0;L;03C5 0308;;;;N;GREEK SMALL LETTER UPSILON DIAERESIS;;03AB;;03AB
+ 03CC;GREEK SMALL LETTER OMICRON WITH TONOS;Ll;0;L;03BF 0301;;;;N;GREEK SMALL LETTER OMICRON TONOS;;038C;;038C
+ 03CD;GREEK SMALL LETTER UPSILON WITH TONOS;Ll;0;L;03C5 0301;;;;N;GREEK SMALL LETTER UPSILON TONOS;;038E;;038E
+ 03CE;GREEK SMALL LETTER OMEGA WITH TONOS;Ll;0;L;03C9 0301;;;;N;GREEK SMALL LETTER OMEGA TONOS;;038F;;038F
+ 03CF;GREEK CAPITAL KAI SYMBOL;Lu;0;L;;;;;N;;;;03D7;
+ 03D0;GREEK BETA SYMBOL;Ll;0;L;<compat> 03B2;;;;N;GREEK SMALL LETTER CURLED BETA;;0392;;0392
+ 03D1;GREEK THETA SYMBOL;Ll;0;L;<compat> 03B8;;;;N;GREEK SMALL LETTER SCRIPT THETA;;0398;;0398
+ 03D2;GREEK UPSILON WITH HOOK SYMBOL;Lu;0;L;<compat> 03A5;;;;N;GREEK CAPITAL LETTER UPSILON HOOK;;;;
+ 03D3;GREEK UPSILON WITH ACUTE AND HOOK SYMBOL;Lu;0;L;03D2 0301;;;;N;GREEK CAPITAL LETTER UPSILON HOOK TONOS;;;;
+ 03D4;GREEK UPSILON WITH DIAERESIS AND HOOK SYMBOL;Lu;0;L;03D2 0308;;;;N;GREEK CAPITAL LETTER UPSILON HOOK DIAERESIS;;;;
+ 03D5;GREEK PHI SYMBOL;Ll;0;L;<compat> 03C6;;;;N;GREEK SMALL LETTER SCRIPT PHI;;03A6;;03A6
+ 03D6;GREEK PI SYMBOL;Ll;0;L;<compat> 03C0;;;;N;GREEK SMALL LETTER OMEGA PI;;03A0;;03A0
+ 03D7;GREEK KAI SYMBOL;Ll;0;L;;;;;N;;;03CF;;03CF
+ 03D8;GREEK LETTER ARCHAIC KOPPA;Lu;0;L;;;;;N;;;;03D9;
+ 03D9;GREEK SMALL LETTER ARCHAIC KOPPA;Ll;0;L;;;;;N;;;03D8;;03D8
+ 03DA;GREEK LETTER STIGMA;Lu;0;L;;;;;N;GREEK CAPITAL LETTER STIGMA;;;03DB;
+ 03DB;GREEK SMALL LETTER STIGMA;Ll;0;L;;;;;N;;;03DA;;03DA
+ 03DC;GREEK LETTER DIGAMMA;Lu;0;L;;;;;N;GREEK CAPITAL LETTER DIGAMMA;;;03DD;
+ 03DD;GREEK SMALL LETTER DIGAMMA;Ll;0;L;;;;;N;;;03DC;;03DC
+ 03DE;GREEK LETTER KOPPA;Lu;0;L;;;;;N;GREEK CAPITAL LETTER KOPPA;;;03DF;
+ 03DF;GREEK SMALL LETTER KOPPA;Ll;0;L;;;;;N;;;03DE;;03DE
+ 03E0;GREEK LETTER SAMPI;Lu;0;L;;;;;N;GREEK CAPITAL LETTER SAMPI;;;03E1;
+ 03E1;GREEK SMALL LETTER SAMPI;Ll;0;L;;;;;N;;;03E0;;03E0
+ 03E2;COPTIC CAPITAL LETTER SHEI;Lu;0;L;;;;;N;GREEK CAPITAL LETTER SHEI;;;03E3;
+ 03E3;COPTIC SMALL LETTER SHEI;Ll;0;L;;;;;N;GREEK SMALL LETTER SHEI;;03E2;;03E2
+ 03E4;COPTIC CAPITAL LETTER FEI;Lu;0;L;;;;;N;GREEK CAPITAL LETTER FEI;;;03E5;
+ 03E5;COPTIC SMALL LETTER FEI;Ll;0;L;;;;;N;GREEK SMALL LETTER FEI;;03E4;;03E4
+ 03E6;COPTIC CAPITAL LETTER KHEI;Lu;0;L;;;;;N;GREEK CAPITAL LETTER KHEI;;;03E7;
+ 03E7;COPTIC SMALL LETTER KHEI;Ll;0;L;;;;;N;GREEK SMALL LETTER KHEI;;03E6;;03E6
+ 03E8;COPTIC CAPITAL LETTER HORI;Lu;0;L;;;;;N;GREEK CAPITAL LETTER HORI;;;03E9;
+ 03E9;COPTIC SMALL LETTER HORI;Ll;0;L;;;;;N;GREEK SMALL LETTER HORI;;03E8;;03E8
+ 03EA;COPTIC CAPITAL LETTER GANGIA;Lu;0;L;;;;;N;GREEK CAPITAL LETTER GANGIA;;;03EB;
+ 03EB;COPTIC SMALL LETTER GANGIA;Ll;0;L;;;;;N;GREEK SMALL LETTER GANGIA;;03EA;;03EA
+ 03EC;COPTIC CAPITAL LETTER SHIMA;Lu;0;L;;;;;N;GREEK CAPITAL LETTER SHIMA;;;03ED;
+ 03ED;COPTIC SMALL LETTER SHIMA;Ll;0;L;;;;;N;GREEK SMALL LETTER SHIMA;;03EC;;03EC
+ 03EE;COPTIC CAPITAL LETTER DEI;Lu;0;L;;;;;N;GREEK CAPITAL LETTER DEI;;;03EF;
+ 03EF;COPTIC SMALL LETTER DEI;Ll;0;L;;;;;N;GREEK SMALL LETTER DEI;;03EE;;03EE
+ 03F0;GREEK KAPPA SYMBOL;Ll;0;L;<compat> 03BA;;;;N;GREEK SMALL LETTER SCRIPT KAPPA;;039A;;039A
+ 03F1;GREEK RHO SYMBOL;Ll;0;L;<compat> 03C1;;;;N;GREEK SMALL LETTER TAILED RHO;;03A1;;03A1
+ 03F2;GREEK LUNATE SIGMA SYMBOL;Ll;0;L;<compat> 03C2;;;;N;GREEK SMALL LETTER LUNATE SIGMA;;03F9;;03F9
+ 03F3;GREEK LETTER YOT;Ll;0;L;;;;;N;;;037F;;037F
+ 03F4;GREEK CAPITAL THETA SYMBOL;Lu;0;L;<compat> 0398;;;;N;;;;03B8;
+ 03F5;GREEK LUNATE EPSILON SYMBOL;Ll;0;L;<compat> 03B5;;;;N;;;0395;;0395
+ 03F6;GREEK REVERSED LUNATE EPSILON SYMBOL;Sm;0;ON;;;;;N;;;;;
+ 03F7;GREEK CAPITAL LETTER SHO;Lu;0;L;;;;;N;;;;03F8;
+ 03F8;GREEK SMALL LETTER SHO;Ll;0;L;;;;;N;;;03F7;;03F7
+ 03F9;GREEK CAPITAL LUNATE SIGMA SYMBOL;Lu;0;L;<compat> 03A3;;;;N;;;;03F2;
+ 03FA;GREEK CAPITAL LETTER SAN;Lu;0;L;;;;;N;;;;03FB;
+ 03FB;GREEK SMALL LETTER SAN;Ll;0;L;;;;;N;;;03FA;;03FA
+ 03FC;GREEK RHO WITH STROKE SYMBOL;Ll;0;L;;;;;N;;;;;
+ 03FD;GREEK CAPITAL REVERSED LUNATE SIGMA SYMBOL;Lu;0;L;;;;;N;;;;037B;
+ 03FE;GREEK CAPITAL DOTTED LUNATE SIGMA SYMBOL;Lu;0;L;;;;;N;;;;037C;
+ 03FF;GREEK CAPITAL REVERSED DOTTED LUNATE SIGMA SYMBOL;Lu;0;L;;;;;N;;;;037D;
+ 0400;CYRILLIC CAPITAL LETTER IE WITH GRAVE;Lu;0;L;0415 0300;;;;N;;;;0450;
+ 0401;CYRILLIC CAPITAL LETTER IO;Lu;0;L;0415 0308;;;;N;;;;0451;
+ 0402;CYRILLIC CAPITAL LETTER DJE;Lu;0;L;;;;;N;;;;0452;
+ 0403;CYRILLIC CAPITAL LETTER GJE;Lu;0;L;0413 0301;;;;N;;;;0453;
+ 0404;CYRILLIC CAPITAL LETTER UKRAINIAN IE;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER E;;;0454;
+ 0405;CYRILLIC CAPITAL LETTER DZE;Lu;0;L;;;;;N;;;;0455;
+ 0406;CYRILLIC CAPITAL LETTER BYELORUSSIAN-UKRAINIAN I;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER I;;;0456;
+ 0407;CYRILLIC CAPITAL LETTER YI;Lu;0;L;0406 0308;;;;N;;;;0457;
+ 0408;CYRILLIC CAPITAL LETTER JE;Lu;0;L;;;;;N;;;;0458;
+ 0409;CYRILLIC CAPITAL LETTER LJE;Lu;0;L;;;;;N;;;;0459;
+ 040A;CYRILLIC CAPITAL LETTER NJE;Lu;0;L;;;;;N;;;;045A;
+ 040B;CYRILLIC CAPITAL LETTER TSHE;Lu;0;L;;;;;N;;;;045B;
+ 040C;CYRILLIC CAPITAL LETTER KJE;Lu;0;L;041A 0301;;;;N;;;;045C;
+ 040D;CYRILLIC CAPITAL LETTER I WITH GRAVE;Lu;0;L;0418 0300;;;;N;;;;045D;
+ 040E;CYRILLIC CAPITAL LETTER SHORT U;Lu;0;L;0423 0306;;;;N;;;;045E;
+ 040F;CYRILLIC CAPITAL LETTER DZHE;Lu;0;L;;;;;N;;;;045F;
+ 0410;CYRILLIC CAPITAL LETTER A;Lu;0;L;;;;;N;;;;0430;
+ 0411;CYRILLIC CAPITAL LETTER BE;Lu;0;L;;;;;N;;;;0431;
+ 0412;CYRILLIC CAPITAL LETTER VE;Lu;0;L;;;;;N;;;;0432;
+ 0413;CYRILLIC CAPITAL LETTER GHE;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER GE;;;0433;
+ 0414;CYRILLIC CAPITAL LETTER DE;Lu;0;L;;;;;N;;;;0434;
+ 0415;CYRILLIC CAPITAL LETTER IE;Lu;0;L;;;;;N;;;;0435;
+ 0416;CYRILLIC CAPITAL LETTER ZHE;Lu;0;L;;;;;N;;;;0436;
+ 0417;CYRILLIC CAPITAL LETTER ZE;Lu;0;L;;;;;N;;;;0437;
+ 0418;CYRILLIC CAPITAL LETTER I;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER II;;;0438;
+ 0419;CYRILLIC CAPITAL LETTER SHORT I;Lu;0;L;0418 0306;;;;N;CYRILLIC CAPITAL LETTER SHORT II;;;0439;
+ 041A;CYRILLIC CAPITAL LETTER KA;Lu;0;L;;;;;N;;;;043A;
+ 041B;CYRILLIC CAPITAL LETTER EL;Lu;0;L;;;;;N;;;;043B;
+ 041C;CYRILLIC CAPITAL LETTER EM;Lu;0;L;;;;;N;;;;043C;
+ 041D;CYRILLIC CAPITAL LETTER EN;Lu;0;L;;;;;N;;;;043D;
+ 041E;CYRILLIC CAPITAL LETTER O;Lu;0;L;;;;;N;;;;043E;
+ 041F;CYRILLIC CAPITAL LETTER PE;Lu;0;L;;;;;N;;;;043F;
+ 0420;CYRILLIC CAPITAL LETTER ER;Lu;0;L;;;;;N;;;;0440;
+ 0421;CYRILLIC CAPITAL LETTER ES;Lu;0;L;;;;;N;;;;0441;
+ 0422;CYRILLIC CAPITAL LETTER TE;Lu;0;L;;;;;N;;;;0442;
+ 0423;CYRILLIC CAPITAL LETTER U;Lu;0;L;;;;;N;;;;0443;
+ 0424;CYRILLIC CAPITAL LETTER EF;Lu;0;L;;;;;N;;;;0444;
+ 0425;CYRILLIC CAPITAL LETTER HA;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER KHA;;;0445;
+ 0426;CYRILLIC CAPITAL LETTER TSE;Lu;0;L;;;;;N;;;;0446;
+ 0427;CYRILLIC CAPITAL LETTER CHE;Lu;0;L;;;;;N;;;;0447;
+ 0428;CYRILLIC CAPITAL LETTER SHA;Lu;0;L;;;;;N;;;;0448;
+ 0429;CYRILLIC CAPITAL LETTER SHCHA;Lu;0;L;;;;;N;;;;0449;
+ 042A;CYRILLIC CAPITAL LETTER HARD SIGN;Lu;0;L;;;;;N;;;;044A;
+ 042B;CYRILLIC CAPITAL LETTER YERU;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER YERI;;;044B;
+ 042C;CYRILLIC CAPITAL LETTER SOFT SIGN;Lu;0;L;;;;;N;;;;044C;
+ 042D;CYRILLIC CAPITAL LETTER E;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER REVERSED E;;;044D;
+ 042E;CYRILLIC CAPITAL LETTER YU;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER IU;;;044E;
+ 042F;CYRILLIC CAPITAL LETTER YA;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER IA;;;044F;
+ 0430;CYRILLIC SMALL LETTER A;Ll;0;L;;;;;N;;;0410;;0410
+ 0431;CYRILLIC SMALL LETTER BE;Ll;0;L;;;;;N;;;0411;;0411
+ 0432;CYRILLIC SMALL LETTER VE;Ll;0;L;;;;;N;;;0412;;0412
+ 0433;CYRILLIC SMALL LETTER GHE;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER GE;;0413;;0413
+ 0434;CYRILLIC SMALL LETTER DE;Ll;0;L;;;;;N;;;0414;;0414
+ 0435;CYRILLIC SMALL LETTER IE;Ll;0;L;;;;;N;;;0415;;0415
+ 0436;CYRILLIC SMALL LETTER ZHE;Ll;0;L;;;;;N;;;0416;;0416
+ 0437;CYRILLIC SMALL LETTER ZE;Ll;0;L;;;;;N;;;0417;;0417
+ 0438;CYRILLIC SMALL LETTER I;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER II;;0418;;0418
+ 0439;CYRILLIC SMALL LETTER SHORT I;Ll;0;L;0438 0306;;;;N;CYRILLIC SMALL LETTER SHORT II;;0419;;0419
+ 043A;CYRILLIC SMALL LETTER KA;Ll;0;L;;;;;N;;;041A;;041A
+ 043B;CYRILLIC SMALL LETTER EL;Ll;0;L;;;;;N;;;041B;;041B
+ 043C;CYRILLIC SMALL LETTER EM;Ll;0;L;;;;;N;;;041C;;041C
+ 043D;CYRILLIC SMALL LETTER EN;Ll;0;L;;;;;N;;;041D;;041D
+ 043E;CYRILLIC SMALL LETTER O;Ll;0;L;;;;;N;;;041E;;041E
+ 043F;CYRILLIC SMALL LETTER PE;Ll;0;L;;;;;N;;;041F;;041F
+ 0440;CYRILLIC SMALL LETTER ER;Ll;0;L;;;;;N;;;0420;;0420
+ 0441;CYRILLIC SMALL LETTER ES;Ll;0;L;;;;;N;;;0421;;0421
+ 0442;CYRILLIC SMALL LETTER TE;Ll;0;L;;;;;N;;;0422;;0422
+ 0443;CYRILLIC SMALL LETTER U;Ll;0;L;;;;;N;;;0423;;0423
+ 0444;CYRILLIC SMALL LETTER EF;Ll;0;L;;;;;N;;;0424;;0424
+ 0445;CYRILLIC SMALL LETTER HA;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER KHA;;0425;;0425
+ 0446;CYRILLIC SMALL LETTER TSE;Ll;0;L;;;;;N;;;0426;;0426
+ 0447;CYRILLIC SMALL LETTER CHE;Ll;0;L;;;;;N;;;0427;;0427
+ 0448;CYRILLIC SMALL LETTER SHA;Ll;0;L;;;;;N;;;0428;;0428
+ 0449;CYRILLIC SMALL LETTER SHCHA;Ll;0;L;;;;;N;;;0429;;0429
+ 044A;CYRILLIC SMALL LETTER HARD SIGN;Ll;0;L;;;;;N;;;042A;;042A
+ 044B;CYRILLIC SMALL LETTER YERU;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER YERI;;042B;;042B
+ 044C;CYRILLIC SMALL LETTER SOFT SIGN;Ll;0;L;;;;;N;;;042C;;042C
+ 044D;CYRILLIC SMALL LETTER E;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER REVERSED E;;042D;;042D
+ 044E;CYRILLIC SMALL LETTER YU;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER IU;;042E;;042E
+ 044F;CYRILLIC SMALL LETTER YA;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER IA;;042F;;042F
+ 0450;CYRILLIC SMALL LETTER IE WITH GRAVE;Ll;0;L;0435 0300;;;;N;;;0400;;0400
+ 0451;CYRILLIC SMALL LETTER IO;Ll;0;L;0435 0308;;;;N;;;0401;;0401
+ 0452;CYRILLIC SMALL LETTER DJE;Ll;0;L;;;;;N;;;0402;;0402
+ 0453;CYRILLIC SMALL LETTER GJE;Ll;0;L;0433 0301;;;;N;;;0403;;0403
+ 0454;CYRILLIC SMALL LETTER UKRAINIAN IE;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER E;;0404;;0404
+ 0455;CYRILLIC SMALL LETTER DZE;Ll;0;L;;;;;N;;;0405;;0405
+ 0456;CYRILLIC SMALL LETTER BYELORUSSIAN-UKRAINIAN I;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER I;;0406;;0406
+ 0457;CYRILLIC SMALL LETTER YI;Ll;0;L;0456 0308;;;;N;;;0407;;0407
+ 0458;CYRILLIC SMALL LETTER JE;Ll;0;L;;;;;N;;;0408;;0408
+ 0459;CYRILLIC SMALL LETTER LJE;Ll;0;L;;;;;N;;;0409;;0409
+ 045A;CYRILLIC SMALL LETTER NJE;Ll;0;L;;;;;N;;;040A;;040A
+ 045B;CYRILLIC SMALL LETTER TSHE;Ll;0;L;;;;;N;;;040B;;040B
+ 045C;CYRILLIC SMALL LETTER KJE;Ll;0;L;043A 0301;;;;N;;;040C;;040C
+ 045D;CYRILLIC SMALL LETTER I WITH GRAVE;Ll;0;L;0438 0300;;;;N;;;040D;;040D
+ 045E;CYRILLIC SMALL LETTER SHORT U;Ll;0;L;0443 0306;;;;N;;;040E;;040E
+ 045F;CYRILLIC SMALL LETTER DZHE;Ll;0;L;;;;;N;;;040F;;040F
+ 0460;CYRILLIC CAPITAL LETTER OMEGA;Lu;0;L;;;;;N;;;;0461;
+ 0461;CYRILLIC SMALL LETTER OMEGA;Ll;0;L;;;;;N;;;0460;;0460
+ 0462;CYRILLIC CAPITAL LETTER YAT;Lu;0;L;;;;;N;;;;0463;
+ 0463;CYRILLIC SMALL LETTER YAT;Ll;0;L;;;;;N;;;0462;;0462
+ 0464;CYRILLIC CAPITAL LETTER IOTIFIED E;Lu;0;L;;;;;N;;;;0465;
+ 0465;CYRILLIC SMALL LETTER IOTIFIED E;Ll;0;L;;;;;N;;;0464;;0464
+ 0466;CYRILLIC CAPITAL LETTER LITTLE YUS;Lu;0;L;;;;;N;;;;0467;
+ 0467;CYRILLIC SMALL LETTER LITTLE YUS;Ll;0;L;;;;;N;;;0466;;0466
+ 0468;CYRILLIC CAPITAL LETTER IOTIFIED LITTLE YUS;Lu;0;L;;;;;N;;;;0469;
+ 0469;CYRILLIC SMALL LETTER IOTIFIED LITTLE YUS;Ll;0;L;;;;;N;;;0468;;0468
+ 046A;CYRILLIC CAPITAL LETTER BIG YUS;Lu;0;L;;;;;N;;;;046B;
+ 046B;CYRILLIC SMALL LETTER BIG YUS;Ll;0;L;;;;;N;;;046A;;046A
+ 046C;CYRILLIC CAPITAL LETTER IOTIFIED BIG YUS;Lu;0;L;;;;;N;;;;046D;
+ 046D;CYRILLIC SMALL LETTER IOTIFIED BIG YUS;Ll;0;L;;;;;N;;;046C;;046C
+ 046E;CYRILLIC CAPITAL LETTER KSI;Lu;0;L;;;;;N;;;;046F;
+ 046F;CYRILLIC SMALL LETTER KSI;Ll;0;L;;;;;N;;;046E;;046E
+ 0470;CYRILLIC CAPITAL LETTER PSI;Lu;0;L;;;;;N;;;;0471;
+ 0471;CYRILLIC SMALL LETTER PSI;Ll;0;L;;;;;N;;;0470;;0470
+ 0472;CYRILLIC CAPITAL LETTER FITA;Lu;0;L;;;;;N;;;;0473;
+ 0473;CYRILLIC SMALL LETTER FITA;Ll;0;L;;;;;N;;;0472;;0472
+ 0474;CYRILLIC CAPITAL LETTER IZHITSA;Lu;0;L;;;;;N;;;;0475;
+ 0475;CYRILLIC SMALL LETTER IZHITSA;Ll;0;L;;;;;N;;;0474;;0474
+ 0476;CYRILLIC CAPITAL LETTER IZHITSA WITH DOUBLE GRAVE ACCENT;Lu;0;L;0474 030F;;;;N;CYRILLIC CAPITAL LETTER IZHITSA DOUBLE GRAVE;;;0477;
+ 0477;CYRILLIC SMALL LETTER IZHITSA WITH DOUBLE GRAVE ACCENT;Ll;0;L;0475 030F;;;;N;CYRILLIC SMALL LETTER IZHITSA DOUBLE GRAVE;;0476;;0476
+ 0478;CYRILLIC CAPITAL LETTER UK;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER UK DIGRAPH;;;0479;
+ 0479;CYRILLIC SMALL LETTER UK;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER UK DIGRAPH;;0478;;0478
+ 047A;CYRILLIC CAPITAL LETTER ROUND OMEGA;Lu;0;L;;;;;N;;;;047B;
+ 047B;CYRILLIC SMALL LETTER ROUND OMEGA;Ll;0;L;;;;;N;;;047A;;047A
+ 047C;CYRILLIC CAPITAL LETTER OMEGA WITH TITLO;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER OMEGA TITLO;;;047D;
+ 047D;CYRILLIC SMALL LETTER OMEGA WITH TITLO;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER OMEGA TITLO;;047C;;047C
+ 047E;CYRILLIC CAPITAL LETTER OT;Lu;0;L;;;;;N;;;;047F;
+ 047F;CYRILLIC SMALL LETTER OT;Ll;0;L;;;;;N;;;047E;;047E
+ 0480;CYRILLIC CAPITAL LETTER KOPPA;Lu;0;L;;;;;N;;;;0481;
+ 0481;CYRILLIC SMALL LETTER KOPPA;Ll;0;L;;;;;N;;;0480;;0480
+ 0482;CYRILLIC THOUSANDS SIGN;So;0;L;;;;;N;;;;;
+ 0483;COMBINING CYRILLIC TITLO;Mn;230;NSM;;;;;N;CYRILLIC NON-SPACING TITLO;;;;
+ 0484;COMBINING CYRILLIC PALATALIZATION;Mn;230;NSM;;;;;N;CYRILLIC NON-SPACING PALATALIZATION;;;;
+ 0485;COMBINING CYRILLIC DASIA PNEUMATA;Mn;230;NSM;;;;;N;CYRILLIC NON-SPACING DASIA PNEUMATA;;;;
+ 0486;COMBINING CYRILLIC PSILI PNEUMATA;Mn;230;NSM;;;;;N;CYRILLIC NON-SPACING PSILI PNEUMATA;;;;
+ 0487;COMBINING CYRILLIC POKRYTIE;Mn;230;NSM;;;;;N;;;;;
+ 0488;COMBINING CYRILLIC HUNDRED THOUSANDS SIGN;Me;0;NSM;;;;;N;;;;;
+ 0489;COMBINING CYRILLIC MILLIONS SIGN;Me;0;NSM;;;;;N;;;;;
+ 048A;CYRILLIC CAPITAL LETTER SHORT I WITH TAIL;Lu;0;L;;;;;N;;;;048B;
+ 048B;CYRILLIC SMALL LETTER SHORT I WITH TAIL;Ll;0;L;;;;;N;;;048A;;048A
+ 048C;CYRILLIC CAPITAL LETTER SEMISOFT SIGN;Lu;0;L;;;;;N;;;;048D;
+ 048D;CYRILLIC SMALL LETTER SEMISOFT SIGN;Ll;0;L;;;;;N;;;048C;;048C
+ 048E;CYRILLIC CAPITAL LETTER ER WITH TICK;Lu;0;L;;;;;N;;;;048F;
+ 048F;CYRILLIC SMALL LETTER ER WITH TICK;Ll;0;L;;;;;N;;;048E;;048E
+ 0490;CYRILLIC CAPITAL LETTER GHE WITH UPTURN;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER GE WITH UPTURN;;;0491;
+ 0491;CYRILLIC SMALL LETTER GHE WITH UPTURN;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER GE WITH UPTURN;;0490;;0490
+ 0492;CYRILLIC CAPITAL LETTER GHE WITH STROKE;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER GE BAR;;;0493;
+ 0493;CYRILLIC SMALL LETTER GHE WITH STROKE;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER GE BAR;;0492;;0492
+ 0494;CYRILLIC CAPITAL LETTER GHE WITH MIDDLE HOOK;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER GE HOOK;;;0495;
+ 0495;CYRILLIC SMALL LETTER GHE WITH MIDDLE HOOK;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER GE HOOK;;0494;;0494
+ 0496;CYRILLIC CAPITAL LETTER ZHE WITH DESCENDER;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER ZHE WITH RIGHT DESCENDER;;;0497;
+ 0497;CYRILLIC SMALL LETTER ZHE WITH DESCENDER;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER ZHE WITH RIGHT DESCENDER;;0496;;0496
+ 0498;CYRILLIC CAPITAL LETTER ZE WITH DESCENDER;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER ZE CEDILLA;;;0499;
+ 0499;CYRILLIC SMALL LETTER ZE WITH DESCENDER;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER ZE CEDILLA;;0498;;0498
+ 049A;CYRILLIC CAPITAL LETTER KA WITH DESCENDER;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER KA WITH RIGHT DESCENDER;;;049B;
+ 049B;CYRILLIC SMALL LETTER KA WITH DESCENDER;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER KA WITH RIGHT DESCENDER;;049A;;049A
+ 049C;CYRILLIC CAPITAL LETTER KA WITH VERTICAL STROKE;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER KA VERTICAL BAR;;;049D;
+ 049D;CYRILLIC SMALL LETTER KA WITH VERTICAL STROKE;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER KA VERTICAL BAR;;049C;;049C
+ 049E;CYRILLIC CAPITAL LETTER KA WITH STROKE;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER KA BAR;;;049F;
+ 049F;CYRILLIC SMALL LETTER KA WITH STROKE;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER KA BAR;;049E;;049E
+ 04A0;CYRILLIC CAPITAL LETTER BASHKIR KA;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER REVERSED GE KA;;;04A1;
+ 04A1;CYRILLIC SMALL LETTER BASHKIR KA;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER REVERSED GE KA;;04A0;;04A0
+ 04A2;CYRILLIC CAPITAL LETTER EN WITH DESCENDER;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER EN WITH RIGHT DESCENDER;;;04A3;
+ 04A3;CYRILLIC SMALL LETTER EN WITH DESCENDER;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER EN WITH RIGHT DESCENDER;;04A2;;04A2
+ 04A4;CYRILLIC CAPITAL LIGATURE EN GHE;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER EN GE;;;04A5;
+ 04A5;CYRILLIC SMALL LIGATURE EN GHE;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER EN GE;;04A4;;04A4
+ 04A6;CYRILLIC CAPITAL LETTER PE WITH MIDDLE HOOK;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER PE HOOK;;;04A7;
+ 04A7;CYRILLIC SMALL LETTER PE WITH MIDDLE HOOK;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER PE HOOK;;04A6;;04A6
+ 04A8;CYRILLIC CAPITAL LETTER ABKHASIAN HA;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER O HOOK;;;04A9;
+ 04A9;CYRILLIC SMALL LETTER ABKHASIAN HA;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER O HOOK;;04A8;;04A8
+ 04AA;CYRILLIC CAPITAL LETTER ES WITH DESCENDER;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER ES CEDILLA;;;04AB;
+ 04AB;CYRILLIC SMALL LETTER ES WITH DESCENDER;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER ES CEDILLA;;04AA;;04AA
+ 04AC;CYRILLIC CAPITAL LETTER TE WITH DESCENDER;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER TE WITH RIGHT DESCENDER;;;04AD;
+ 04AD;CYRILLIC SMALL LETTER TE WITH DESCENDER;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER TE WITH RIGHT DESCENDER;;04AC;;04AC
+ 04AE;CYRILLIC CAPITAL LETTER STRAIGHT U;Lu;0;L;;;;;N;;;;04AF;
+ 04AF;CYRILLIC SMALL LETTER STRAIGHT U;Ll;0;L;;;;;N;;;04AE;;04AE
+ 04B0;CYRILLIC CAPITAL LETTER STRAIGHT U WITH STROKE;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER STRAIGHT U BAR;;;04B1;
+ 04B1;CYRILLIC SMALL LETTER STRAIGHT U WITH STROKE;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER STRAIGHT U BAR;;04B0;;04B0
+ 04B2;CYRILLIC CAPITAL LETTER HA WITH DESCENDER;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER KHA WITH RIGHT DESCENDER;;;04B3;
+ 04B3;CYRILLIC SMALL LETTER HA WITH DESCENDER;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER KHA WITH RIGHT DESCENDER;;04B2;;04B2
+ 04B4;CYRILLIC CAPITAL LIGATURE TE TSE;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER TE TSE;;;04B5;
+ 04B5;CYRILLIC SMALL LIGATURE TE TSE;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER TE TSE;;04B4;;04B4
+ 04B6;CYRILLIC CAPITAL LETTER CHE WITH DESCENDER;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER CHE WITH RIGHT DESCENDER;;;04B7;
+ 04B7;CYRILLIC SMALL LETTER CHE WITH DESCENDER;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER CHE WITH RIGHT DESCENDER;;04B6;;04B6
+ 04B8;CYRILLIC CAPITAL LETTER CHE WITH VERTICAL STROKE;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER CHE VERTICAL BAR;;;04B9;
+ 04B9;CYRILLIC SMALL LETTER CHE WITH VERTICAL STROKE;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER CHE VERTICAL BAR;;04B8;;04B8
+ 04BA;CYRILLIC CAPITAL LETTER SHHA;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER H;;;04BB;
+ 04BB;CYRILLIC SMALL LETTER SHHA;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER H;;04BA;;04BA
+ 04BC;CYRILLIC CAPITAL LETTER ABKHASIAN CHE;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER IE HOOK;;;04BD;
+ 04BD;CYRILLIC SMALL LETTER ABKHASIAN CHE;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER IE HOOK;;04BC;;04BC
+ 04BE;CYRILLIC CAPITAL LETTER ABKHASIAN CHE WITH DESCENDER;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER IE HOOK OGONEK;;;04BF;
+ 04BF;CYRILLIC SMALL LETTER ABKHASIAN CHE WITH DESCENDER;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER IE HOOK OGONEK;;04BE;;04BE
+ 04C0;CYRILLIC LETTER PALOCHKA;Lu;0;L;;;;;N;CYRILLIC LETTER I;;;04CF;
+ 04C1;CYRILLIC CAPITAL LETTER ZHE WITH BREVE;Lu;0;L;0416 0306;;;;N;CYRILLIC CAPITAL LETTER SHORT ZHE;;;04C2;
+ 04C2;CYRILLIC SMALL LETTER ZHE WITH BREVE;Ll;0;L;0436 0306;;;;N;CYRILLIC SMALL LETTER SHORT ZHE;;04C1;;04C1
+ 04C3;CYRILLIC CAPITAL LETTER KA WITH HOOK;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER KA HOOK;;;04C4;
+ 04C4;CYRILLIC SMALL LETTER KA WITH HOOK;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER KA HOOK;;04C3;;04C3
+ 04C5;CYRILLIC CAPITAL LETTER EL WITH TAIL;Lu;0;L;;;;;N;;;;04C6;
+ 04C6;CYRILLIC SMALL LETTER EL WITH TAIL;Ll;0;L;;;;;N;;;04C5;;04C5
+ 04C7;CYRILLIC CAPITAL LETTER EN WITH HOOK;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER EN HOOK;;;04C8;
+ 04C8;CYRILLIC SMALL LETTER EN WITH HOOK;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER EN HOOK;;04C7;;04C7
+ 04C9;CYRILLIC CAPITAL LETTER EN WITH TAIL;Lu;0;L;;;;;N;;;;04CA;
+ 04CA;CYRILLIC SMALL LETTER EN WITH TAIL;Ll;0;L;;;;;N;;;04C9;;04C9
+ 04CB;CYRILLIC CAPITAL LETTER KHAKASSIAN CHE;Lu;0;L;;;;;N;CYRILLIC CAPITAL LETTER CHE WITH LEFT DESCENDER;;;04CC;
+ 04CC;CYRILLIC SMALL LETTER KHAKASSIAN CHE;Ll;0;L;;;;;N;CYRILLIC SMALL LETTER CHE WITH LEFT DESCENDER;;04CB;;04CB
+ 04CD;CYRILLIC CAPITAL LETTER EM WITH TAIL;Lu;0;L;;;;;N;;;;04CE;
+ 04CE;CYRILLIC SMALL LETTER EM WITH TAIL;Ll;0;L;;;;;N;;;04CD;;04CD
+ 04CF;CYRILLIC SMALL LETTER PALOCHKA;Ll;0;L;;;;;N;;;04C0;;04C0
+ 04D0;CYRILLIC CAPITAL LETTER A WITH BREVE;Lu;0;L;0410 0306;;;;N;;;;04D1;
+ 04D1;CYRILLIC SMALL LETTER A WITH BREVE;Ll;0;L;0430 0306;;;;N;;;04D0;;04D0
+ 04D2;CYRILLIC CAPITAL LETTER A WITH DIAERESIS;Lu;0;L;0410 0308;;;;N;;;;04D3;
+ 04D3;CYRILLIC SMALL LETTER A WITH DIAERESIS;Ll;0;L;0430 0308;;;;N;;;04D2;;04D2
+ 04D4;CYRILLIC CAPITAL LIGATURE A IE;Lu;0;L;;;;;N;;;;04D5;
+ 04D5;CYRILLIC SMALL LIGATURE A IE;Ll;0;L;;;;;N;;;04D4;;04D4
+ 04D6;CYRILLIC CAPITAL LETTER IE WITH BREVE;Lu;0;L;0415 0306;;;;N;;;;04D7;
+ 04D7;CYRILLIC SMALL LETTER IE WITH BREVE;Ll;0;L;0435 0306;;;;N;;;04D6;;04D6
+ 04D8;CYRILLIC CAPITAL LETTER SCHWA;Lu;0;L;;;;;N;;;;04D9;
+ 04D9;CYRILLIC SMALL LETTER SCHWA;Ll;0;L;;;;;N;;;04D8;;04D8
+ 04DA;CYRILLIC CAPITAL LETTER SCHWA WITH DIAERESIS;Lu;0;L;04D8 0308;;;;N;;;;04DB;
+ 04DB;CYRILLIC SMALL LETTER SCHWA WITH DIAERESIS;Ll;0;L;04D9 0308;;;;N;;;04DA;;04DA
+ 04DC;CYRILLIC CAPITAL LETTER ZHE WITH DIAERESIS;Lu;0;L;0416 0308;;;;N;;;;04DD;
+ 04DD;CYRILLIC SMALL LETTER ZHE WITH DIAERESIS;Ll;0;L;0436 0308;;;;N;;;04DC;;04DC
+ 04DE;CYRILLIC CAPITAL LETTER ZE WITH DIAERESIS;Lu;0;L;0417 0308;;;;N;;;;04DF;
+ 04DF;CYRILLIC SMALL LETTER ZE WITH DIAERESIS;Ll;0;L;0437 0308;;;;N;;;04DE;;04DE
+ 04E0;CYRILLIC CAPITAL LETTER ABKHASIAN DZE;Lu;0;L;;;;;N;;;;04E1;
+ 04E1;CYRILLIC SMALL LETTER ABKHASIAN DZE;Ll;0;L;;;;;N;;;04E0;;04E0
+ 04E2;CYRILLIC CAPITAL LETTER I WITH MACRON;Lu;0;L;0418 0304;;;;N;;;;04E3;
+ 04E3;CYRILLIC SMALL LETTER I WITH MACRON;Ll;0;L;0438 0304;;;;N;;;04E2;;04E2
+ 04E4;CYRILLIC CAPITAL LETTER I WITH DIAERESIS;Lu;0;L;0418 0308;;;;N;;;;04E5;
+ 04E5;CYRILLIC SMALL LETTER I WITH DIAERESIS;Ll;0;L;0438 0308;;;;N;;;04E4;;04E4
+ 04E6;CYRILLIC CAPITAL LETTER O WITH DIAERESIS;Lu;0;L;041E 0308;;;;N;;;;04E7;
+ 04E7;CYRILLIC SMALL LETTER O WITH DIAERESIS;Ll;0;L;043E 0308;;;;N;;;04E6;;04E6
+ 04E8;CYRILLIC CAPITAL LETTER BARRED O;Lu;0;L;;;;;N;;;;04E9;
+ 04E9;CYRILLIC SMALL LETTER BARRED O;Ll;0;L;;;;;N;;;04E8;;04E8
+ 04EA;CYRILLIC CAPITAL LETTER BARRED O WITH DIAERESIS;Lu;0;L;04E8 0308;;;;N;;;;04EB;
+ 04EB;CYRILLIC SMALL LETTER BARRED O WITH DIAERESIS;Ll;0;L;04E9 0308;;;;N;;;04EA;;04EA
+ 04EC;CYRILLIC CAPITAL LETTER E WITH DIAERESIS;Lu;0;L;042D 0308;;;;N;;;;04ED;
+ 04ED;CYRILLIC SMALL LETTER E WITH DIAERESIS;Ll;0;L;044D 0308;;;;N;;;04EC;;04EC
+ 04EE;CYRILLIC CAPITAL LETTER U WITH MACRON;Lu;0;L;0423 0304;;;;N;;;;04EF;
+ 04EF;CYRILLIC SMALL LETTER U WITH MACRON;Ll;0;L;0443 0304;;;;N;;;04EE;;04EE
+ 04F0;CYRILLIC CAPITAL LETTER U WITH DIAERESIS;Lu;0;L;0423 0308;;;;N;;;;04F1;
+ 04F1;CYRILLIC SMALL LETTER U WITH DIAERESIS;Ll;0;L;0443 0308;;;;N;;;04F0;;04F0
+ 04F2;CYRILLIC CAPITAL LETTER U WITH DOUBLE ACUTE;Lu;0;L;0423 030B;;;;N;;;;04F3;
+ 04F3;CYRILLIC SMALL LETTER U WITH DOUBLE ACUTE;Ll;0;L;0443 030B;;;;N;;;04F2;;04F2
+ 04F4;CYRILLIC CAPITAL LETTER CHE WITH DIAERESIS;Lu;0;L;0427 0308;;;;N;;;;04F5;
+ 04F5;CYRILLIC SMALL LETTER CHE WITH DIAERESIS;Ll;0;L;0447 0308;;;;N;;;04F4;;04F4
+ 04F6;CYRILLIC CAPITAL LETTER GHE WITH DESCENDER;Lu;0;L;;;;;N;;;;04F7;
+ 04F7;CYRILLIC SMALL LETTER GHE WITH DESCENDER;Ll;0;L;;;;;N;;;04F6;;04F6
+ 04F8;CYRILLIC CAPITAL LETTER YERU WITH DIAERESIS;Lu;0;L;042B 0308;;;;N;;;;04F9;
+ 04F9;CYRILLIC SMALL LETTER YERU WITH DIAERESIS;Ll;0;L;044B 0308;;;;N;;;04F8;;04F8
+ 04FA;CYRILLIC CAPITAL LETTER GHE WITH STROKE AND HOOK;Lu;0;L;;;;;N;;;;04FB;
+ 04FB;CYRILLIC SMALL LETTER GHE WITH STROKE AND HOOK;Ll;0;L;;;;;N;;;04FA;;04FA
+ 04FC;CYRILLIC CAPITAL LETTER HA WITH HOOK;Lu;0;L;;;;;N;;;;04FD;
+ 04FD;CYRILLIC SMALL LETTER HA WITH HOOK;Ll;0;L;;;;;N;;;04FC;;04FC
+ 04FE;CYRILLIC CAPITAL LETTER HA WITH STROKE;Lu;0;L;;;;;N;;;;04FF;
+ 04FF;CYRILLIC SMALL LETTER HA WITH STROKE;Ll;0;L;;;;;N;;;04FE;;04FE
+ 0500;CYRILLIC CAPITAL LETTER KOMI DE;Lu;0;L;;;;;N;;;;0501;
+ 0501;CYRILLIC SMALL LETTER KOMI DE;Ll;0;L;;;;;N;;;0500;;0500
+ 0502;CYRILLIC CAPITAL LETTER KOMI DJE;Lu;0;L;;;;;N;;;;0503;
+ 0503;CYRILLIC SMALL LETTER KOMI DJE;Ll;0;L;;;;;N;;;0502;;0502
+ 0504;CYRILLIC CAPITAL LETTER KOMI ZJE;Lu;0;L;;;;;N;;;;0505;
+ 0505;CYRILLIC SMALL LETTER KOMI ZJE;Ll;0;L;;;;;N;;;0504;;0504
+ 0506;CYRILLIC CAPITAL LETTER KOMI DZJE;Lu;0;L;;;;;N;;;;0507;
+ 0507;CYRILLIC SMALL LETTER KOMI DZJE;Ll;0;L;;;;;N;;;0506;;0506
+ 0508;CYRILLIC CAPITAL LETTER KOMI LJE;Lu;0;L;;;;;N;;;;0509;
+ 0509;CYRILLIC SMALL LETTER KOMI LJE;Ll;0;L;;;;;N;;;0508;;0508
+ 050A;CYRILLIC CAPITAL LETTER KOMI NJE;Lu;0;L;;;;;N;;;;050B;
+ 050B;CYRILLIC SMALL LETTER KOMI NJE;Ll;0;L;;;;;N;;;050A;;050A
+ 050C;CYRILLIC CAPITAL LETTER KOMI SJE;Lu;0;L;;;;;N;;;;050D;
+ 050D;CYRILLIC SMALL LETTER KOMI SJE;Ll;0;L;;;;;N;;;050C;;050C
+ 050E;CYRILLIC CAPITAL LETTER KOMI TJE;Lu;0;L;;;;;N;;;;050F;
+ 050F;CYRILLIC SMALL LETTER KOMI TJE;Ll;0;L;;;;;N;;;050E;;050E
+ 0510;CYRILLIC CAPITAL LETTER REVERSED ZE;Lu;0;L;;;;;N;;;;0511;
+ 0511;CYRILLIC SMALL LETTER REVERSED ZE;Ll;0;L;;;;;N;;;0510;;0510
+ 0512;CYRILLIC CAPITAL LETTER EL WITH HOOK;Lu;0;L;;;;;N;;;;0513;
+ 0513;CYRILLIC SMALL LETTER EL WITH HOOK;Ll;0;L;;;;;N;;;0512;;0512
+ 0514;CYRILLIC CAPITAL LETTER LHA;Lu;0;L;;;;;N;;;;0515;
+ 0515;CYRILLIC SMALL LETTER LHA;Ll;0;L;;;;;N;;;0514;;0514
+ 0516;CYRILLIC CAPITAL LETTER RHA;Lu;0;L;;;;;N;;;;0517;
+ 0517;CYRILLIC SMALL LETTER RHA;Ll;0;L;;;;;N;;;0516;;0516
+ 0518;CYRILLIC CAPITAL LETTER YAE;Lu;0;L;;;;;N;;;;0519;
+ 0519;CYRILLIC SMALL LETTER YAE;Ll;0;L;;;;;N;;;0518;;0518
+ 051A;CYRILLIC CAPITAL LETTER QA;Lu;0;L;;;;;N;;;;051B;
+ 051B;CYRILLIC SMALL LETTER QA;Ll;0;L;;;;;N;;;051A;;051A
+ 051C;CYRILLIC CAPITAL LETTER WE;Lu;0;L;;;;;N;;;;051D;
+ 051D;CYRILLIC SMALL LETTER WE;Ll;0;L;;;;;N;;;051C;;051C
+ 051E;CYRILLIC CAPITAL LETTER ALEUT KA;Lu;0;L;;;;;N;;;;051F;
+ 051F;CYRILLIC SMALL LETTER ALEUT KA;Ll;0;L;;;;;N;;;051E;;051E
+ 0520;CYRILLIC CAPITAL LETTER EL WITH MIDDLE HOOK;Lu;0;L;;;;;N;;;;0521;
+ 0521;CYRILLIC SMALL LETTER EL WITH MIDDLE HOOK;Ll;0;L;;;;;N;;;0520;;0520
+ 0522;CYRILLIC CAPITAL LETTER EN WITH MIDDLE HOOK;Lu;0;L;;;;;N;;;;0523;
+ 0523;CYRILLIC SMALL LETTER EN WITH MIDDLE HOOK;Ll;0;L;;;;;N;;;0522;;0522
+ 0524;CYRILLIC CAPITAL LETTER PE WITH DESCENDER;Lu;0;L;;;;;N;;;;0525;
+ 0525;CYRILLIC SMALL LETTER PE WITH DESCENDER;Ll;0;L;;;;;N;;;0524;;0524
+ 0526;CYRILLIC CAPITAL LETTER SHHA WITH DESCENDER;Lu;0;L;;;;;N;;;;0527;
+ 0527;CYRILLIC SMALL LETTER SHHA WITH DESCENDER;Ll;0;L;;;;;N;;;0526;;0526
+ 0528;CYRILLIC CAPITAL LETTER EN WITH LEFT HOOK;Lu;0;L;;;;;N;;;;0529;
+ 0529;CYRILLIC SMALL LETTER EN WITH LEFT HOOK;Ll;0;L;;;;;N;;;0528;;0528
+ 052A;CYRILLIC CAPITAL LETTER DZZHE;Lu;0;L;;;;;N;;;;052B;
+ 052B;CYRILLIC SMALL LETTER DZZHE;Ll;0;L;;;;;N;;;052A;;052A
+ 052C;CYRILLIC CAPITAL LETTER DCHE;Lu;0;L;;;;;N;;;;052D;
+ 052D;CYRILLIC SMALL LETTER DCHE;Ll;0;L;;;;;N;;;052C;;052C
+ 052E;CYRILLIC CAPITAL LETTER EL WITH DESCENDER;Lu;0;L;;;;;N;;;;052F;
+ 052F;CYRILLIC SMALL LETTER EL WITH DESCENDER;Ll;0;L;;;;;N;;;052E;;052E
+ 0531;ARMENIAN CAPITAL LETTER AYB;Lu;0;L;;;;;N;;;;0561;
+ 0532;ARMENIAN CAPITAL LETTER BEN;Lu;0;L;;;;;N;;;;0562;
+ 0533;ARMENIAN CAPITAL LETTER GIM;Lu;0;L;;;;;N;;;;0563;
+ 0534;ARMENIAN CAPITAL LETTER DA;Lu;0;L;;;;;N;;;;0564;
+ 0535;ARMENIAN CAPITAL LETTER ECH;Lu;0;L;;;;;N;;;;0565;
+ 0536;ARMENIAN CAPITAL LETTER ZA;Lu;0;L;;;;;N;;;;0566;
+ 0537;ARMENIAN CAPITAL LETTER EH;Lu;0;L;;;;;N;;;;0567;
+ 0538;ARMENIAN CAPITAL LETTER ET;Lu;0;L;;;;;N;;;;0568;
+ 0539;ARMENIAN CAPITAL LETTER TO;Lu;0;L;;;;;N;;;;0569;
+ 053A;ARMENIAN CAPITAL LETTER ZHE;Lu;0;L;;;;;N;;;;056A;
+ 053B;ARMENIAN CAPITAL LETTER INI;Lu;0;L;;;;;N;;;;056B;
+ 053C;ARMENIAN CAPITAL LETTER LIWN;Lu;0;L;;;;;N;;;;056C;
+ 053D;ARMENIAN CAPITAL LETTER XEH;Lu;0;L;;;;;N;;;;056D;
+ 053E;ARMENIAN CAPITAL LETTER CA;Lu;0;L;;;;;N;;;;056E;
+ 053F;ARMENIAN CAPITAL LETTER KEN;Lu;0;L;;;;;N;;;;056F;
+ 0540;ARMENIAN CAPITAL LETTER HO;Lu;0;L;;;;;N;;;;0570;
+ 0541;ARMENIAN CAPITAL LETTER JA;Lu;0;L;;;;;N;;;;0571;
+ 0542;ARMENIAN CAPITAL LETTER GHAD;Lu;0;L;;;;;N;ARMENIAN CAPITAL LETTER LAD;;;0572;
+ 0543;ARMENIAN CAPITAL LETTER CHEH;Lu;0;L;;;;;N;;;;0573;
+ 0544;ARMENIAN CAPITAL LETTER MEN;Lu;0;L;;;;;N;;;;0574;
+ 0545;ARMENIAN CAPITAL LETTER YI;Lu;0;L;;;;;N;;;;0575;
+ 0546;ARMENIAN CAPITAL LETTER NOW;Lu;0;L;;;;;N;;;;0576;
+ 0547;ARMENIAN CAPITAL LETTER SHA;Lu;0;L;;;;;N;;;;0577;
+ 0548;ARMENIAN CAPITAL LETTER VO;Lu;0;L;;;;;N;;;;0578;
+ 0549;ARMENIAN CAPITAL LETTER CHA;Lu;0;L;;;;;N;;;;0579;
+ 054A;ARMENIAN CAPITAL LETTER PEH;Lu;0;L;;;;;N;;;;057A;
+ 054B;ARMENIAN CAPITAL LETTER JHEH;Lu;0;L;;;;;N;;;;057B;
+ 054C;ARMENIAN CAPITAL LETTER RA;Lu;0;L;;;;;N;;;;057C;
+ 054D;ARMENIAN CAPITAL LETTER SEH;Lu;0;L;;;;;N;;;;057D;
+ 054E;ARMENIAN CAPITAL LETTER VEW;Lu;0;L;;;;;N;;;;057E;
+ 054F;ARMENIAN CAPITAL LETTER TIWN;Lu;0;L;;;;;N;;;;057F;
+ 0550;ARMENIAN CAPITAL LETTER REH;Lu;0;L;;;;;N;;;;0580;
+ 0551;ARMENIAN CAPITAL LETTER CO;Lu;0;L;;;;;N;;;;0581;
+ 0552;ARMENIAN CAPITAL LETTER YIWN;Lu;0;L;;;;;N;;;;0582;
+ 0553;ARMENIAN CAPITAL LETTER PIWR;Lu;0;L;;;;;N;;;;0583;
+ 0554;ARMENIAN CAPITAL LETTER KEH;Lu;0;L;;;;;N;;;;0584;
+ 0555;ARMENIAN CAPITAL LETTER OH;Lu;0;L;;;;;N;;;;0585;
+ 0556;ARMENIAN CAPITAL LETTER FEH;Lu;0;L;;;;;N;;;;0586;
+ 0559;ARMENIAN MODIFIER LETTER LEFT HALF RING;Lm;0;L;;;;;N;;;;;
+ 055A;ARMENIAN APOSTROPHE;Po;0;L;;;;;N;ARMENIAN MODIFIER LETTER RIGHT HALF RING;;;;
+ 055B;ARMENIAN EMPHASIS MARK;Po;0;L;;;;;N;;;;;
+ 055C;ARMENIAN EXCLAMATION MARK;Po;0;L;;;;;N;;;;;
+ 055D;ARMENIAN COMMA;Po;0;L;;;;;N;;;;;
+ 055E;ARMENIAN QUESTION MARK;Po;0;L;;;;;N;;;;;
+ 055F;ARMENIAN ABBREVIATION MARK;Po;0;L;;;;;N;;;;;
+ 0560;ARMENIAN SMALL LETTER TURNED AYB;Ll;0;L;;;;;N;;;;;
+ 0561;ARMENIAN SMALL LETTER AYB;Ll;0;L;;;;;N;;;0531;;0531
+ 0562;ARMENIAN SMALL LETTER BEN;Ll;0;L;;;;;N;;;0532;;0532
+ 0563;ARMENIAN SMALL LETTER GIM;Ll;0;L;;;;;N;;;0533;;0533
+ 0564;ARMENIAN SMALL LETTER DA;Ll;0;L;;;;;N;;;0534;;0534
+ 0565;ARMENIAN SMALL LETTER ECH;Ll;0;L;;;;;N;;;0535;;0535
+ 0566;ARMENIAN SMALL LETTER ZA;Ll;0;L;;;;;N;;;0536;;0536
+ 0567;ARMENIAN SMALL LETTER EH;Ll;0;L;;;;;N;;;0537;;0537
+ 0568;ARMENIAN SMALL LETTER ET;Ll;0;L;;;;;N;;;0538;;0538
+ 0569;ARMENIAN SMALL LETTER TO;Ll;0;L;;;;;N;;;0539;;0539
+ 056A;ARMENIAN SMALL LETTER ZHE;Ll;0;L;;;;;N;;;053A;;053A
+ 056B;ARMENIAN SMALL LETTER INI;Ll;0;L;;;;;N;;;053B;;053B
+ 056C;ARMENIAN SMALL LETTER LIWN;Ll;0;L;;;;;N;;;053C;;053C
+ 056D;ARMENIAN SMALL LETTER XEH;Ll;0;L;;;;;N;;;053D;;053D
+ 056E;ARMENIAN SMALL LETTER CA;Ll;0;L;;;;;N;;;053E;;053E
+ 056F;ARMENIAN SMALL LETTER KEN;Ll;0;L;;;;;N;;;053F;;053F
+ 0570;ARMENIAN SMALL LETTER HO;Ll;0;L;;;;;N;;;0540;;0540
+ 0571;ARMENIAN SMALL LETTER JA;Ll;0;L;;;;;N;;;0541;;0541
+ 0572;ARMENIAN SMALL LETTER GHAD;Ll;0;L;;;;;N;ARMENIAN SMALL LETTER LAD;;0542;;0542
+ 0573;ARMENIAN SMALL LETTER CHEH;Ll;0;L;;;;;N;;;0543;;0543
+ 0574;ARMENIAN SMALL LETTER MEN;Ll;0;L;;;;;N;;;0544;;0544
+ 0575;ARMENIAN SMALL LETTER YI;Ll;0;L;;;;;N;;;0545;;0545
+ 0576;ARMENIAN SMALL LETTER NOW;Ll;0;L;;;;;N;;;0546;;0546
+ 0577;ARMENIAN SMALL LETTER SHA;Ll;0;L;;;;;N;;;0547;;0547
+ 0578;ARMENIAN SMALL LETTER VO;Ll;0;L;;;;;N;;;0548;;0548
+ 0579;ARMENIAN SMALL LETTER CHA;Ll;0;L;;;;;N;;;0549;;0549
+ 057A;ARMENIAN SMALL LETTER PEH;Ll;0;L;;;;;N;;;054A;;054A
+ 057B;ARMENIAN SMALL LETTER JHEH;Ll;0;L;;;;;N;;;054B;;054B
+ 057C;ARMENIAN SMALL LETTER RA;Ll;0;L;;;;;N;;;054C;;054C
+ 057D;ARMENIAN SMALL LETTER SEH;Ll;0;L;;;;;N;;;054D;;054D
+ 057E;ARMENIAN SMALL LETTER VEW;Ll;0;L;;;;;N;;;054E;;054E
+ 057F;ARMENIAN SMALL LETTER TIWN;Ll;0;L;;;;;N;;;054F;;054F
+ 0580;ARMENIAN SMALL LETTER REH;Ll;0;L;;;;;N;;;0550;;0550
+ 0581;ARMENIAN SMALL LETTER CO;Ll;0;L;;;;;N;;;0551;;0551
+ 0582;ARMENIAN SMALL LETTER YIWN;Ll;0;L;;;;;N;;;0552;;0552
+ 0583;ARMENIAN SMALL LETTER PIWR;Ll;0;L;;;;;N;;;0553;;0553
+ 0584;ARMENIAN SMALL LETTER KEH;Ll;0;L;;;;;N;;;0554;;0554
+ 0585;ARMENIAN SMALL LETTER OH;Ll;0;L;;;;;N;;;0555;;0555
+ 0586;ARMENIAN SMALL LETTER FEH;Ll;0;L;;;;;N;;;0556;;0556
+ 0587;ARMENIAN SMALL LIGATURE ECH YIWN;Ll;0;L;<compat> 0565 0582;;;;N;;;;;
+ 0588;ARMENIAN SMALL LETTER YI WITH STROKE;Ll;0;L;;;;;N;;;;;
+ 0589;ARMENIAN FULL STOP;Po;0;L;;;;;N;ARMENIAN PERIOD;;;;
+ 058A;ARMENIAN HYPHEN;Pd;0;ON;;;;;N;;;;;
+ 058D;RIGHT-FACING ARMENIAN ETERNITY SIGN;So;0;ON;;;;;N;;;;;
+ 058E;LEFT-FACING ARMENIAN ETERNITY SIGN;So;0;ON;;;;;N;;;;;
+ 058F;ARMENIAN DRAM SIGN;Sc;0;ET;;;;;N;;;;;
+ 0591;HEBREW ACCENT ETNAHTA;Mn;220;NSM;;;;;N;;;;;
+ 0592;HEBREW ACCENT SEGOL;Mn;230;NSM;;;;;N;;;;;
+ 0593;HEBREW ACCENT SHALSHELET;Mn;230;NSM;;;;;N;;;;;
+ 0594;HEBREW ACCENT ZAQEF QATAN;Mn;230;NSM;;;;;N;;;;;
+ 0595;HEBREW ACCENT ZAQEF GADOL;Mn;230;NSM;;;;;N;;;;;
+ 0596;HEBREW ACCENT TIPEHA;Mn;220;NSM;;;;;N;;;;;
+ 0597;HEBREW ACCENT REVIA;Mn;230;NSM;;;;;N;;;;;
+ 0598;HEBREW ACCENT ZARQA;Mn;230;NSM;;;;;N;;;;;
+ 0599;HEBREW ACCENT PASHTA;Mn;230;NSM;;;;;N;;;;;
+ 059A;HEBREW ACCENT YETIV;Mn;222;NSM;;;;;N;;;;;
+ 059B;HEBREW ACCENT TEVIR;Mn;220;NSM;;;;;N;;;;;
+ 059C;HEBREW ACCENT GERESH;Mn;230;NSM;;;;;N;;;;;
+ 059D;HEBREW ACCENT GERESH MUQDAM;Mn;230;NSM;;;;;N;;;;;
+ 059E;HEBREW ACCENT GERSHAYIM;Mn;230;NSM;;;;;N;;;;;
+ 059F;HEBREW ACCENT QARNEY PARA;Mn;230;NSM;;;;;N;;;;;
+ 05A0;HEBREW ACCENT TELISHA GEDOLA;Mn;230;NSM;;;;;N;;;;;
+ 05A1;HEBREW ACCENT PAZER;Mn;230;NSM;;;;;N;;;;;
+ 05A2;HEBREW ACCENT ATNAH HAFUKH;Mn;220;NSM;;;;;N;;;;;
+ 05A3;HEBREW ACCENT MUNAH;Mn;220;NSM;;;;;N;;;;;
+ 05A4;HEBREW ACCENT MAHAPAKH;Mn;220;NSM;;;;;N;;;;;
+ 05A5;HEBREW ACCENT MERKHA;Mn;220;NSM;;;;;N;;;;;
+ 05A6;HEBREW ACCENT MERKHA KEFULA;Mn;220;NSM;;;;;N;;;;;
+ 05A7;HEBREW ACCENT DARGA;Mn;220;NSM;;;;;N;;;;;
+ 05A8;HEBREW ACCENT QADMA;Mn;230;NSM;;;;;N;;;;;
+ 05A9;HEBREW ACCENT TELISHA QETANA;Mn;230;NSM;;;;;N;;;;;
+ 05AA;HEBREW ACCENT YERAH BEN YOMO;Mn;220;NSM;;;;;N;;;;;
+ 05AB;HEBREW ACCENT OLE;Mn;230;NSM;;;;;N;;;;;
+ 05AC;HEBREW ACCENT ILUY;Mn;230;NSM;;;;;N;;;;;
+ 05AD;HEBREW ACCENT DEHI;Mn;222;NSM;;;;;N;;;;;
+ 05AE;HEBREW ACCENT ZINOR;Mn;228;NSM;;;;;N;;;;;
+ 05AF;HEBREW MARK MASORA CIRCLE;Mn;230;NSM;;;;;N;;;;;
+ 05B0;HEBREW POINT SHEVA;Mn;10;NSM;;;;;N;;;;;
+ 05B1;HEBREW POINT HATAF SEGOL;Mn;11;NSM;;;;;N;;;;;
+ 05B2;HEBREW POINT HATAF PATAH;Mn;12;NSM;;;;;N;;;;;
+ 05B3;HEBREW POINT HATAF QAMATS;Mn;13;NSM;;;;;N;;;;;
+ 05B4;HEBREW POINT HIRIQ;Mn;14;NSM;;;;;N;;;;;
+ 05B5;HEBREW POINT TSERE;Mn;15;NSM;;;;;N;;;;;
+ 05B6;HEBREW POINT SEGOL;Mn;16;NSM;;;;;N;;;;;
+ 05B7;HEBREW POINT PATAH;Mn;17;NSM;;;;;N;;;;;
+ 05B8;HEBREW POINT QAMATS;Mn;18;NSM;;;;;N;;;;;
+ 05B9;HEBREW POINT HOLAM;Mn;19;NSM;;;;;N;;;;;
+ 05BA;HEBREW POINT HOLAM HASER FOR VAV;Mn;19;NSM;;;;;N;;;;;
+ 05BB;HEBREW POINT QUBUTS;Mn;20;NSM;;;;;N;;;;;
+ 05BC;HEBREW POINT DAGESH OR MAPIQ;Mn;21;NSM;;;;;N;HEBREW POINT DAGESH;;;;
+ 05BD;HEBREW POINT METEG;Mn;22;NSM;;;;;N;;;;;
+ 05BE;HEBREW PUNCTUATION MAQAF;Pd;0;R;;;;;N;;;;;
+ 05BF;HEBREW POINT RAFE;Mn;23;NSM;;;;;N;;;;;
+ 05C0;HEBREW PUNCTUATION PASEQ;Po;0;R;;;;;N;HEBREW POINT PASEQ;;;;
+ 05C1;HEBREW POINT SHIN DOT;Mn;24;NSM;;;;;N;;;;;
+ 05C2;HEBREW POINT SIN DOT;Mn;25;NSM;;;;;N;;;;;
+ 05C3;HEBREW PUNCTUATION SOF PASUQ;Po;0;R;;;;;N;;;;;
+ 05C4;HEBREW MARK UPPER DOT;Mn;230;NSM;;;;;N;;;;;
+ 05C5;HEBREW MARK LOWER DOT;Mn;220;NSM;;;;;N;;;;;
+ 05C6;HEBREW PUNCTUATION NUN HAFUKHA;Po;0;R;;;;;N;;;;;
+ 05C7;HEBREW POINT QAMATS QATAN;Mn;18;NSM;;;;;N;;;;;
+ 05D0;HEBREW LETTER ALEF;Lo;0;R;;;;;N;;;;;
+ 05D1;HEBREW LETTER BET;Lo;0;R;;;;;N;;;;;
+ 05D2;HEBREW LETTER GIMEL;Lo;0;R;;;;;N;;;;;
+ 05D3;HEBREW LETTER DALET;Lo;0;R;;;;;N;;;;;
+ 05D4;HEBREW LETTER HE;Lo;0;R;;;;;N;;;;;
+ 05D5;HEBREW LETTER VAV;Lo;0;R;;;;;N;;;;;
+ 05D6;HEBREW LETTER ZAYIN;Lo;0;R;;;;;N;;;;;
+ 05D7;HEBREW LETTER HET;Lo;0;R;;;;;N;;;;;
+ 05D8;HEBREW LETTER TET;Lo;0;R;;;;;N;;;;;
+ 05D9;HEBREW LETTER YOD;Lo;0;R;;;;;N;;;;;
+ 05DA;HEBREW LETTER FINAL KAF;Lo;0;R;;;;;N;;;;;
+ 05DB;HEBREW LETTER KAF;Lo;0;R;;;;;N;;;;;
+ 05DC;HEBREW LETTER LAMED;Lo;0;R;;;;;N;;;;;
+ 05DD;HEBREW LETTER FINAL MEM;Lo;0;R;;;;;N;;;;;
+ 05DE;HEBREW LETTER MEM;Lo;0;R;;;;;N;;;;;
+ 05DF;HEBREW LETTER FINAL NUN;Lo;0;R;;;;;N;;;;;
+ 05E0;HEBREW LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 05E1;HEBREW LETTER SAMEKH;Lo;0;R;;;;;N;;;;;
+ 05E2;HEBREW LETTER AYIN;Lo;0;R;;;;;N;;;;;
+ 05E3;HEBREW LETTER FINAL PE;Lo;0;R;;;;;N;;;;;
+ 05E4;HEBREW LETTER PE;Lo;0;R;;;;;N;;;;;
+ 05E5;HEBREW LETTER FINAL TSADI;Lo;0;R;;;;;N;;;;;
+ 05E6;HEBREW LETTER TSADI;Lo;0;R;;;;;N;;;;;
+ 05E7;HEBREW LETTER QOF;Lo;0;R;;;;;N;;;;;
+ 05E8;HEBREW LETTER RESH;Lo;0;R;;;;;N;;;;;
+ 05E9;HEBREW LETTER SHIN;Lo;0;R;;;;;N;;;;;
+ 05EA;HEBREW LETTER TAV;Lo;0;R;;;;;N;;;;;
+ 05EF;HEBREW YOD TRIANGLE;Lo;0;R;;;;;N;;;;;
+ 05F0;HEBREW LIGATURE YIDDISH DOUBLE VAV;Lo;0;R;;;;;N;HEBREW LETTER DOUBLE VAV;;;;
+ 05F1;HEBREW LIGATURE YIDDISH VAV YOD;Lo;0;R;;;;;N;HEBREW LETTER VAV YOD;;;;
+ 05F2;HEBREW LIGATURE YIDDISH DOUBLE YOD;Lo;0;R;;;;;N;HEBREW LETTER DOUBLE YOD;;;;
+ 05F3;HEBREW PUNCTUATION GERESH;Po;0;R;;;;;N;;;;;
+ 05F4;HEBREW PUNCTUATION GERSHAYIM;Po;0;R;;;;;N;;;;;
+ 0600;ARABIC NUMBER SIGN;Cf;0;AN;;;;;N;;;;;
+ 0601;ARABIC SIGN SANAH;Cf;0;AN;;;;;N;;;;;
+ 0602;ARABIC FOOTNOTE MARKER;Cf;0;AN;;;;;N;;;;;
+ 0603;ARABIC SIGN SAFHA;Cf;0;AN;;;;;N;;;;;
+ 0604;ARABIC SIGN SAMVAT;Cf;0;AN;;;;;N;;;;;
+ 0605;ARABIC NUMBER MARK ABOVE;Cf;0;AN;;;;;N;;;;;
+ 0606;ARABIC-INDIC CUBE ROOT;Sm;0;ON;;;;;N;;;;;
+ 0607;ARABIC-INDIC FOURTH ROOT;Sm;0;ON;;;;;N;;;;;
+ 0608;ARABIC RAY;Sm;0;AL;;;;;N;;;;;
+ 0609;ARABIC-INDIC PER MILLE SIGN;Po;0;ET;;;;;N;;;;;
+ 060A;ARABIC-INDIC PER TEN THOUSAND SIGN;Po;0;ET;;;;;N;;;;;
+ 060B;AFGHANI SIGN;Sc;0;AL;;;;;N;;;;;
+ 060C;ARABIC COMMA;Po;0;CS;;;;;N;;;;;
+ 060D;ARABIC DATE SEPARATOR;Po;0;AL;;;;;N;;;;;
+ 060E;ARABIC POETIC VERSE SIGN;So;0;ON;;;;;N;;;;;
+ 060F;ARABIC SIGN MISRA;So;0;ON;;;;;N;;;;;
+ 0610;ARABIC SIGN SALLALLAHOU ALAYHE WASSALLAM;Mn;230;NSM;;;;;N;;;;;
+ 0611;ARABIC SIGN ALAYHE ASSALLAM;Mn;230;NSM;;;;;N;;;;;
+ 0612;ARABIC SIGN RAHMATULLAH ALAYHE;Mn;230;NSM;;;;;N;;;;;
+ 0613;ARABIC SIGN RADI ALLAHOU ANHU;Mn;230;NSM;;;;;N;;;;;
+ 0614;ARABIC SIGN TAKHALLUS;Mn;230;NSM;;;;;N;;;;;
+ 0615;ARABIC SMALL HIGH TAH;Mn;230;NSM;;;;;N;;;;;
+ 0616;ARABIC SMALL HIGH LIGATURE ALEF WITH LAM WITH YEH;Mn;230;NSM;;;;;N;;;;;
+ 0617;ARABIC SMALL HIGH ZAIN;Mn;230;NSM;;;;;N;;;;;
+ 0618;ARABIC SMALL FATHA;Mn;30;NSM;;;;;N;;;;;
+ 0619;ARABIC SMALL DAMMA;Mn;31;NSM;;;;;N;;;;;
+ 061A;ARABIC SMALL KASRA;Mn;32;NSM;;;;;N;;;;;
+ 061B;ARABIC SEMICOLON;Po;0;AL;;;;;N;;;;;
+ 061C;ARABIC LETTER MARK;Cf;0;AL;;;;;N;;;;;
+ 061E;ARABIC TRIPLE DOT PUNCTUATION MARK;Po;0;AL;;;;;N;;;;;
+ 061F;ARABIC QUESTION MARK;Po;0;AL;;;;;N;;;;;
+ 0620;ARABIC LETTER KASHMIRI YEH;Lo;0;AL;;;;;N;;;;;
+ 0621;ARABIC LETTER HAMZA;Lo;0;AL;;;;;N;ARABIC LETTER HAMZAH;;;;
+ 0622;ARABIC LETTER ALEF WITH MADDA ABOVE;Lo;0;AL;0627 0653;;;;N;ARABIC LETTER MADDAH ON ALEF;;;;
+ 0623;ARABIC LETTER ALEF WITH HAMZA ABOVE;Lo;0;AL;0627 0654;;;;N;ARABIC LETTER HAMZAH ON ALEF;;;;
+ 0624;ARABIC LETTER WAW WITH HAMZA ABOVE;Lo;0;AL;0648 0654;;;;N;ARABIC LETTER HAMZAH ON WAW;;;;
+ 0625;ARABIC LETTER ALEF WITH HAMZA BELOW;Lo;0;AL;0627 0655;;;;N;ARABIC LETTER HAMZAH UNDER ALEF;;;;
+ 0626;ARABIC LETTER YEH WITH HAMZA ABOVE;Lo;0;AL;064A 0654;;;;N;ARABIC LETTER HAMZAH ON YA;;;;
+ 0627;ARABIC LETTER ALEF;Lo;0;AL;;;;;N;;;;;
+ 0628;ARABIC LETTER BEH;Lo;0;AL;;;;;N;ARABIC LETTER BAA;;;;
+ 0629;ARABIC LETTER TEH MARBUTA;Lo;0;AL;;;;;N;ARABIC LETTER TAA MARBUTAH;;;;
+ 062A;ARABIC LETTER TEH;Lo;0;AL;;;;;N;ARABIC LETTER TAA;;;;
+ 062B;ARABIC LETTER THEH;Lo;0;AL;;;;;N;ARABIC LETTER THAA;;;;
+ 062C;ARABIC LETTER JEEM;Lo;0;AL;;;;;N;;;;;
+ 062D;ARABIC LETTER HAH;Lo;0;AL;;;;;N;ARABIC LETTER HAA;;;;
+ 062E;ARABIC LETTER KHAH;Lo;0;AL;;;;;N;ARABIC LETTER KHAA;;;;
+ 062F;ARABIC LETTER DAL;Lo;0;AL;;;;;N;;;;;
+ 0630;ARABIC LETTER THAL;Lo;0;AL;;;;;N;;;;;
+ 0631;ARABIC LETTER REH;Lo;0;AL;;;;;N;ARABIC LETTER RA;;;;
+ 0632;ARABIC LETTER ZAIN;Lo;0;AL;;;;;N;;;;;
+ 0633;ARABIC LETTER SEEN;Lo;0;AL;;;;;N;;;;;
+ 0634;ARABIC LETTER SHEEN;Lo;0;AL;;;;;N;;;;;
+ 0635;ARABIC LETTER SAD;Lo;0;AL;;;;;N;;;;;
+ 0636;ARABIC LETTER DAD;Lo;0;AL;;;;;N;;;;;
+ 0637;ARABIC LETTER TAH;Lo;0;AL;;;;;N;;;;;
+ 0638;ARABIC LETTER ZAH;Lo;0;AL;;;;;N;ARABIC LETTER DHAH;;;;
+ 0639;ARABIC LETTER AIN;Lo;0;AL;;;;;N;;;;;
+ 063A;ARABIC LETTER GHAIN;Lo;0;AL;;;;;N;;;;;
+ 063B;ARABIC LETTER KEHEH WITH TWO DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 063C;ARABIC LETTER KEHEH WITH THREE DOTS BELOW;Lo;0;AL;;;;;N;;;;;
+ 063D;ARABIC LETTER FARSI YEH WITH INVERTED V;Lo;0;AL;;;;;N;;;;;
+ 063E;ARABIC LETTER FARSI YEH WITH TWO DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 063F;ARABIC LETTER FARSI YEH WITH THREE DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0640;ARABIC TATWEEL;Lm;0;AL;;;;;N;;;;;
+ 0641;ARABIC LETTER FEH;Lo;0;AL;;;;;N;ARABIC LETTER FA;;;;
+ 0642;ARABIC LETTER QAF;Lo;0;AL;;;;;N;;;;;
+ 0643;ARABIC LETTER KAF;Lo;0;AL;;;;;N;ARABIC LETTER CAF;;;;
+ 0644;ARABIC LETTER LAM;Lo;0;AL;;;;;N;;;;;
+ 0645;ARABIC LETTER MEEM;Lo;0;AL;;;;;N;;;;;
+ 0646;ARABIC LETTER NOON;Lo;0;AL;;;;;N;;;;;
+ 0647;ARABIC LETTER HEH;Lo;0;AL;;;;;N;ARABIC LETTER HA;;;;
+ 0648;ARABIC LETTER WAW;Lo;0;AL;;;;;N;;;;;
+ 0649;ARABIC LETTER ALEF MAKSURA;Lo;0;AL;;;;;N;ARABIC LETTER ALEF MAQSURAH;;;;
+ 064A;ARABIC LETTER YEH;Lo;0;AL;;;;;N;ARABIC LETTER YA;;;;
+ 064B;ARABIC FATHATAN;Mn;27;NSM;;;;;N;;;;;
+ 064C;ARABIC DAMMATAN;Mn;28;NSM;;;;;N;;;;;
+ 064D;ARABIC KASRATAN;Mn;29;NSM;;;;;N;;;;;
+ 064E;ARABIC FATHA;Mn;30;NSM;;;;;N;ARABIC FATHAH;;;;
+ 064F;ARABIC DAMMA;Mn;31;NSM;;;;;N;ARABIC DAMMAH;;;;
+ 0650;ARABIC KASRA;Mn;32;NSM;;;;;N;ARABIC KASRAH;;;;
+ 0651;ARABIC SHADDA;Mn;33;NSM;;;;;N;ARABIC SHADDAH;;;;
+ 0652;ARABIC SUKUN;Mn;34;NSM;;;;;N;;;;;
+ 0653;ARABIC MADDAH ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 0654;ARABIC HAMZA ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 0655;ARABIC HAMZA BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0656;ARABIC SUBSCRIPT ALEF;Mn;220;NSM;;;;;N;;;;;
+ 0657;ARABIC INVERTED DAMMA;Mn;230;NSM;;;;;N;;;;;
+ 0658;ARABIC MARK NOON GHUNNA;Mn;230;NSM;;;;;N;;;;;
+ 0659;ARABIC ZWARAKAY;Mn;230;NSM;;;;;N;;;;;
+ 065A;ARABIC VOWEL SIGN SMALL V ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 065B;ARABIC VOWEL SIGN INVERTED SMALL V ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 065C;ARABIC VOWEL SIGN DOT BELOW;Mn;220;NSM;;;;;N;;;;;
+ 065D;ARABIC REVERSED DAMMA;Mn;230;NSM;;;;;N;;;;;
+ 065E;ARABIC FATHA WITH TWO DOTS;Mn;230;NSM;;;;;N;;;;;
+ 065F;ARABIC WAVY HAMZA BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0660;ARABIC-INDIC DIGIT ZERO;Nd;0;AN;;0;0;0;N;;;;;
+ 0661;ARABIC-INDIC DIGIT ONE;Nd;0;AN;;1;1;1;N;;;;;
+ 0662;ARABIC-INDIC DIGIT TWO;Nd;0;AN;;2;2;2;N;;;;;
+ 0663;ARABIC-INDIC DIGIT THREE;Nd;0;AN;;3;3;3;N;;;;;
+ 0664;ARABIC-INDIC DIGIT FOUR;Nd;0;AN;;4;4;4;N;;;;;
+ 0665;ARABIC-INDIC DIGIT FIVE;Nd;0;AN;;5;5;5;N;;;;;
+ 0666;ARABIC-INDIC DIGIT SIX;Nd;0;AN;;6;6;6;N;;;;;
+ 0667;ARABIC-INDIC DIGIT SEVEN;Nd;0;AN;;7;7;7;N;;;;;
+ 0668;ARABIC-INDIC DIGIT EIGHT;Nd;0;AN;;8;8;8;N;;;;;
+ 0669;ARABIC-INDIC DIGIT NINE;Nd;0;AN;;9;9;9;N;;;;;
+ 066A;ARABIC PERCENT SIGN;Po;0;ET;;;;;N;;;;;
+ 066B;ARABIC DECIMAL SEPARATOR;Po;0;AN;;;;;N;;;;;
+ 066C;ARABIC THOUSANDS SEPARATOR;Po;0;AN;;;;;N;;;;;
+ 066D;ARABIC FIVE POINTED STAR;Po;0;AL;;;;;N;;;;;
+ 066E;ARABIC LETTER DOTLESS BEH;Lo;0;AL;;;;;N;;;;;
+ 066F;ARABIC LETTER DOTLESS QAF;Lo;0;AL;;;;;N;;;;;
+ 0670;ARABIC LETTER SUPERSCRIPT ALEF;Mn;35;NSM;;;;;N;ARABIC ALEF ABOVE;;;;
+ 0671;ARABIC LETTER ALEF WASLA;Lo;0;AL;;;;;N;ARABIC LETTER HAMZAT WASL ON ALEF;;;;
+ 0672;ARABIC LETTER ALEF WITH WAVY HAMZA ABOVE;Lo;0;AL;;;;;N;ARABIC LETTER WAVY HAMZAH ON ALEF;;;;
+ 0673;ARABIC LETTER ALEF WITH WAVY HAMZA BELOW;Lo;0;AL;;;;;N;ARABIC LETTER WAVY HAMZAH UNDER ALEF;;;;
+ 0674;ARABIC LETTER HIGH HAMZA;Lo;0;AL;;;;;N;ARABIC LETTER HIGH HAMZAH;;;;
+ 0675;ARABIC LETTER HIGH HAMZA ALEF;Lo;0;AL;<compat> 0627 0674;;;;N;ARABIC LETTER HIGH HAMZAH ALEF;;;;
+ 0676;ARABIC LETTER HIGH HAMZA WAW;Lo;0;AL;<compat> 0648 0674;;;;N;ARABIC LETTER HIGH HAMZAH WAW;;;;
+ 0677;ARABIC LETTER U WITH HAMZA ABOVE;Lo;0;AL;<compat> 06C7 0674;;;;N;ARABIC LETTER HIGH HAMZAH WAW WITH DAMMAH;;;;
+ 0678;ARABIC LETTER HIGH HAMZA YEH;Lo;0;AL;<compat> 064A 0674;;;;N;ARABIC LETTER HIGH HAMZAH YA;;;;
+ 0679;ARABIC LETTER TTEH;Lo;0;AL;;;;;N;ARABIC LETTER TAA WITH SMALL TAH;;;;
+ 067A;ARABIC LETTER TTEHEH;Lo;0;AL;;;;;N;ARABIC LETTER TAA WITH TWO DOTS VERTICAL ABOVE;;;;
+ 067B;ARABIC LETTER BEEH;Lo;0;AL;;;;;N;ARABIC LETTER BAA WITH TWO DOTS VERTICAL BELOW;;;;
+ 067C;ARABIC LETTER TEH WITH RING;Lo;0;AL;;;;;N;ARABIC LETTER TAA WITH RING;;;;
+ 067D;ARABIC LETTER TEH WITH THREE DOTS ABOVE DOWNWARDS;Lo;0;AL;;;;;N;ARABIC LETTER TAA WITH THREE DOTS ABOVE DOWNWARD;;;;
+ 067E;ARABIC LETTER PEH;Lo;0;AL;;;;;N;ARABIC LETTER TAA WITH THREE DOTS BELOW;;;;
+ 067F;ARABIC LETTER TEHEH;Lo;0;AL;;;;;N;ARABIC LETTER TAA WITH FOUR DOTS ABOVE;;;;
+ 0680;ARABIC LETTER BEHEH;Lo;0;AL;;;;;N;ARABIC LETTER BAA WITH FOUR DOTS BELOW;;;;
+ 0681;ARABIC LETTER HAH WITH HAMZA ABOVE;Lo;0;AL;;;;;N;ARABIC LETTER HAMZAH ON HAA;;;;
+ 0682;ARABIC LETTER HAH WITH TWO DOTS VERTICAL ABOVE;Lo;0;AL;;;;;N;ARABIC LETTER HAA WITH TWO DOTS VERTICAL ABOVE;;;;
+ 0683;ARABIC LETTER NYEH;Lo;0;AL;;;;;N;ARABIC LETTER HAA WITH MIDDLE TWO DOTS;;;;
+ 0684;ARABIC LETTER DYEH;Lo;0;AL;;;;;N;ARABIC LETTER HAA WITH MIDDLE TWO DOTS VERTICAL;;;;
+ 0685;ARABIC LETTER HAH WITH THREE DOTS ABOVE;Lo;0;AL;;;;;N;ARABIC LETTER HAA WITH THREE DOTS ABOVE;;;;
+ 0686;ARABIC LETTER TCHEH;Lo;0;AL;;;;;N;ARABIC LETTER HAA WITH MIDDLE THREE DOTS DOWNWARD;;;;
+ 0687;ARABIC LETTER TCHEHEH;Lo;0;AL;;;;;N;ARABIC LETTER HAA WITH MIDDLE FOUR DOTS;;;;
+ 0688;ARABIC LETTER DDAL;Lo;0;AL;;;;;N;ARABIC LETTER DAL WITH SMALL TAH;;;;
+ 0689;ARABIC LETTER DAL WITH RING;Lo;0;AL;;;;;N;;;;;
+ 068A;ARABIC LETTER DAL WITH DOT BELOW;Lo;0;AL;;;;;N;;;;;
+ 068B;ARABIC LETTER DAL WITH DOT BELOW AND SMALL TAH;Lo;0;AL;;;;;N;;;;;
+ 068C;ARABIC LETTER DAHAL;Lo;0;AL;;;;;N;ARABIC LETTER DAL WITH TWO DOTS ABOVE;;;;
+ 068D;ARABIC LETTER DDAHAL;Lo;0;AL;;;;;N;ARABIC LETTER DAL WITH TWO DOTS BELOW;;;;
+ 068E;ARABIC LETTER DUL;Lo;0;AL;;;;;N;ARABIC LETTER DAL WITH THREE DOTS ABOVE;;;;
+ 068F;ARABIC LETTER DAL WITH THREE DOTS ABOVE DOWNWARDS;Lo;0;AL;;;;;N;ARABIC LETTER DAL WITH THREE DOTS ABOVE DOWNWARD;;;;
+ 0690;ARABIC LETTER DAL WITH FOUR DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0691;ARABIC LETTER RREH;Lo;0;AL;;;;;N;ARABIC LETTER RA WITH SMALL TAH;;;;
+ 0692;ARABIC LETTER REH WITH SMALL V;Lo;0;AL;;;;;N;ARABIC LETTER RA WITH SMALL V;;;;
+ 0693;ARABIC LETTER REH WITH RING;Lo;0;AL;;;;;N;ARABIC LETTER RA WITH RING;;;;
+ 0694;ARABIC LETTER REH WITH DOT BELOW;Lo;0;AL;;;;;N;ARABIC LETTER RA WITH DOT BELOW;;;;
+ 0695;ARABIC LETTER REH WITH SMALL V BELOW;Lo;0;AL;;;;;N;ARABIC LETTER RA WITH SMALL V BELOW;;;;
+ 0696;ARABIC LETTER REH WITH DOT BELOW AND DOT ABOVE;Lo;0;AL;;;;;N;ARABIC LETTER RA WITH DOT BELOW AND DOT ABOVE;;;;
+ 0697;ARABIC LETTER REH WITH TWO DOTS ABOVE;Lo;0;AL;;;;;N;ARABIC LETTER RA WITH TWO DOTS ABOVE;;;;
+ 0698;ARABIC LETTER JEH;Lo;0;AL;;;;;N;ARABIC LETTER RA WITH THREE DOTS ABOVE;;;;
+ 0699;ARABIC LETTER REH WITH FOUR DOTS ABOVE;Lo;0;AL;;;;;N;ARABIC LETTER RA WITH FOUR DOTS ABOVE;;;;
+ 069A;ARABIC LETTER SEEN WITH DOT BELOW AND DOT ABOVE;Lo;0;AL;;;;;N;;;;;
+ 069B;ARABIC LETTER SEEN WITH THREE DOTS BELOW;Lo;0;AL;;;;;N;;;;;
+ 069C;ARABIC LETTER SEEN WITH THREE DOTS BELOW AND THREE DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 069D;ARABIC LETTER SAD WITH TWO DOTS BELOW;Lo;0;AL;;;;;N;;;;;
+ 069E;ARABIC LETTER SAD WITH THREE DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 069F;ARABIC LETTER TAH WITH THREE DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 06A0;ARABIC LETTER AIN WITH THREE DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 06A1;ARABIC LETTER DOTLESS FEH;Lo;0;AL;;;;;N;ARABIC LETTER DOTLESS FA;;;;
+ 06A2;ARABIC LETTER FEH WITH DOT MOVED BELOW;Lo;0;AL;;;;;N;ARABIC LETTER FA WITH DOT MOVED BELOW;;;;
+ 06A3;ARABIC LETTER FEH WITH DOT BELOW;Lo;0;AL;;;;;N;ARABIC LETTER FA WITH DOT BELOW;;;;
+ 06A4;ARABIC LETTER VEH;Lo;0;AL;;;;;N;ARABIC LETTER FA WITH THREE DOTS ABOVE;;;;
+ 06A5;ARABIC LETTER FEH WITH THREE DOTS BELOW;Lo;0;AL;;;;;N;ARABIC LETTER FA WITH THREE DOTS BELOW;;;;
+ 06A6;ARABIC LETTER PEHEH;Lo;0;AL;;;;;N;ARABIC LETTER FA WITH FOUR DOTS ABOVE;;;;
+ 06A7;ARABIC LETTER QAF WITH DOT ABOVE;Lo;0;AL;;;;;N;;;;;
+ 06A8;ARABIC LETTER QAF WITH THREE DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 06A9;ARABIC LETTER KEHEH;Lo;0;AL;;;;;N;ARABIC LETTER OPEN CAF;;;;
+ 06AA;ARABIC LETTER SWASH KAF;Lo;0;AL;;;;;N;ARABIC LETTER SWASH CAF;;;;
+ 06AB;ARABIC LETTER KAF WITH RING;Lo;0;AL;;;;;N;ARABIC LETTER CAF WITH RING;;;;
+ 06AC;ARABIC LETTER KAF WITH DOT ABOVE;Lo;0;AL;;;;;N;ARABIC LETTER CAF WITH DOT ABOVE;;;;
+ 06AD;ARABIC LETTER NG;Lo;0;AL;;;;;N;ARABIC LETTER CAF WITH THREE DOTS ABOVE;;;;
+ 06AE;ARABIC LETTER KAF WITH THREE DOTS BELOW;Lo;0;AL;;;;;N;ARABIC LETTER CAF WITH THREE DOTS BELOW;;;;
+ 06AF;ARABIC LETTER GAF;Lo;0;AL;;;;;N;;;;;
+ 06B0;ARABIC LETTER GAF WITH RING;Lo;0;AL;;;;;N;;;;;
+ 06B1;ARABIC LETTER NGOEH;Lo;0;AL;;;;;N;ARABIC LETTER GAF WITH TWO DOTS ABOVE;;;;
+ 06B2;ARABIC LETTER GAF WITH TWO DOTS BELOW;Lo;0;AL;;;;;N;;;;;
+ 06B3;ARABIC LETTER GUEH;Lo;0;AL;;;;;N;ARABIC LETTER GAF WITH TWO DOTS VERTICAL BELOW;;;;
+ 06B4;ARABIC LETTER GAF WITH THREE DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 06B5;ARABIC LETTER LAM WITH SMALL V;Lo;0;AL;;;;;N;;;;;
+ 06B6;ARABIC LETTER LAM WITH DOT ABOVE;Lo;0;AL;;;;;N;;;;;
+ 06B7;ARABIC LETTER LAM WITH THREE DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 06B8;ARABIC LETTER LAM WITH THREE DOTS BELOW;Lo;0;AL;;;;;N;;;;;
+ 06B9;ARABIC LETTER NOON WITH DOT BELOW;Lo;0;AL;;;;;N;;;;;
+ 06BA;ARABIC LETTER NOON GHUNNA;Lo;0;AL;;;;;N;ARABIC LETTER DOTLESS NOON;;;;
+ 06BB;ARABIC LETTER RNOON;Lo;0;AL;;;;;N;ARABIC LETTER DOTLESS NOON WITH SMALL TAH;;;;
+ 06BC;ARABIC LETTER NOON WITH RING;Lo;0;AL;;;;;N;;;;;
+ 06BD;ARABIC LETTER NOON WITH THREE DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 06BE;ARABIC LETTER HEH DOACHASHMEE;Lo;0;AL;;;;;N;ARABIC LETTER KNOTTED HA;;;;
+ 06BF;ARABIC LETTER TCHEH WITH DOT ABOVE;Lo;0;AL;;;;;N;;;;;
+ 06C0;ARABIC LETTER HEH WITH YEH ABOVE;Lo;0;AL;06D5 0654;;;;N;ARABIC LETTER HAMZAH ON HA;;;;
+ 06C1;ARABIC LETTER HEH GOAL;Lo;0;AL;;;;;N;ARABIC LETTER HA GOAL;;;;
+ 06C2;ARABIC LETTER HEH GOAL WITH HAMZA ABOVE;Lo;0;AL;06C1 0654;;;;N;ARABIC LETTER HAMZAH ON HA GOAL;;;;
+ 06C3;ARABIC LETTER TEH MARBUTA GOAL;Lo;0;AL;;;;;N;ARABIC LETTER TAA MARBUTAH GOAL;;;;
+ 06C4;ARABIC LETTER WAW WITH RING;Lo;0;AL;;;;;N;;;;;
+ 06C5;ARABIC LETTER KIRGHIZ OE;Lo;0;AL;;;;;N;ARABIC LETTER WAW WITH BAR;;;;
+ 06C6;ARABIC LETTER OE;Lo;0;AL;;;;;N;ARABIC LETTER WAW WITH SMALL V;;;;
+ 06C7;ARABIC LETTER U;Lo;0;AL;;;;;N;ARABIC LETTER WAW WITH DAMMAH;;;;
+ 06C8;ARABIC LETTER YU;Lo;0;AL;;;;;N;ARABIC LETTER WAW WITH ALEF ABOVE;;;;
+ 06C9;ARABIC LETTER KIRGHIZ YU;Lo;0;AL;;;;;N;ARABIC LETTER WAW WITH INVERTED SMALL V;;;;
+ 06CA;ARABIC LETTER WAW WITH TWO DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 06CB;ARABIC LETTER VE;Lo;0;AL;;;;;N;ARABIC LETTER WAW WITH THREE DOTS ABOVE;;;;
+ 06CC;ARABIC LETTER FARSI YEH;Lo;0;AL;;;;;N;ARABIC LETTER DOTLESS YA;;;;
+ 06CD;ARABIC LETTER YEH WITH TAIL;Lo;0;AL;;;;;N;ARABIC LETTER YA WITH TAIL;;;;
+ 06CE;ARABIC LETTER YEH WITH SMALL V;Lo;0;AL;;;;;N;ARABIC LETTER YA WITH SMALL V;;;;
+ 06CF;ARABIC LETTER WAW WITH DOT ABOVE;Lo;0;AL;;;;;N;;;;;
+ 06D0;ARABIC LETTER E;Lo;0;AL;;;;;N;ARABIC LETTER YA WITH TWO DOTS VERTICAL BELOW;;;;
+ 06D1;ARABIC LETTER YEH WITH THREE DOTS BELOW;Lo;0;AL;;;;;N;ARABIC LETTER YA WITH THREE DOTS BELOW;;;;
+ 06D2;ARABIC LETTER YEH BARREE;Lo;0;AL;;;;;N;ARABIC LETTER YA BARREE;;;;
+ 06D3;ARABIC LETTER YEH BARREE WITH HAMZA ABOVE;Lo;0;AL;06D2 0654;;;;N;ARABIC LETTER HAMZAH ON YA BARREE;;;;
+ 06D4;ARABIC FULL STOP;Po;0;AL;;;;;N;ARABIC PERIOD;;;;
+ 06D5;ARABIC LETTER AE;Lo;0;AL;;;;;N;;;;;
+ 06D6;ARABIC SMALL HIGH LIGATURE SAD WITH LAM WITH ALEF MAKSURA;Mn;230;NSM;;;;;N;;;;;
+ 06D7;ARABIC SMALL HIGH LIGATURE QAF WITH LAM WITH ALEF MAKSURA;Mn;230;NSM;;;;;N;;;;;
+ 06D8;ARABIC SMALL HIGH MEEM INITIAL FORM;Mn;230;NSM;;;;;N;;;;;
+ 06D9;ARABIC SMALL HIGH LAM ALEF;Mn;230;NSM;;;;;N;;;;;
+ 06DA;ARABIC SMALL HIGH JEEM;Mn;230;NSM;;;;;N;;;;;
+ 06DB;ARABIC SMALL HIGH THREE DOTS;Mn;230;NSM;;;;;N;;;;;
+ 06DC;ARABIC SMALL HIGH SEEN;Mn;230;NSM;;;;;N;;;;;
+ 06DD;ARABIC END OF AYAH;Cf;0;AN;;;;;N;;;;;
+ 06DE;ARABIC START OF RUB EL HIZB;So;0;ON;;;;;N;;;;;
+ 06DF;ARABIC SMALL HIGH ROUNDED ZERO;Mn;230;NSM;;;;;N;;;;;
+ 06E0;ARABIC SMALL HIGH UPRIGHT RECTANGULAR ZERO;Mn;230;NSM;;;;;N;;;;;
+ 06E1;ARABIC SMALL HIGH DOTLESS HEAD OF KHAH;Mn;230;NSM;;;;;N;;;;;
+ 06E2;ARABIC SMALL HIGH MEEM ISOLATED FORM;Mn;230;NSM;;;;;N;;;;;
+ 06E3;ARABIC SMALL LOW SEEN;Mn;220;NSM;;;;;N;;;;;
+ 06E4;ARABIC SMALL HIGH MADDA;Mn;230;NSM;;;;;N;;;;;
+ 06E5;ARABIC SMALL WAW;Lm;0;AL;;;;;N;;;;;
+ 06E6;ARABIC SMALL YEH;Lm;0;AL;;;;;N;;;;;
+ 06E7;ARABIC SMALL HIGH YEH;Mn;230;NSM;;;;;N;;;;;
+ 06E8;ARABIC SMALL HIGH NOON;Mn;230;NSM;;;;;N;;;;;
+ 06E9;ARABIC PLACE OF SAJDAH;So;0;ON;;;;;N;;;;;
+ 06EA;ARABIC EMPTY CENTRE LOW STOP;Mn;220;NSM;;;;;N;;;;;
+ 06EB;ARABIC EMPTY CENTRE HIGH STOP;Mn;230;NSM;;;;;N;;;;;
+ 06EC;ARABIC ROUNDED HIGH STOP WITH FILLED CENTRE;Mn;230;NSM;;;;;N;;;;;
+ 06ED;ARABIC SMALL LOW MEEM;Mn;220;NSM;;;;;N;;;;;
+ 06EE;ARABIC LETTER DAL WITH INVERTED V;Lo;0;AL;;;;;N;;;;;
+ 06EF;ARABIC LETTER REH WITH INVERTED V;Lo;0;AL;;;;;N;;;;;
+ 06F0;EXTENDED ARABIC-INDIC DIGIT ZERO;Nd;0;EN;;0;0;0;N;EASTERN ARABIC-INDIC DIGIT ZERO;;;;
+ 06F1;EXTENDED ARABIC-INDIC DIGIT ONE;Nd;0;EN;;1;1;1;N;EASTERN ARABIC-INDIC DIGIT ONE;;;;
+ 06F2;EXTENDED ARABIC-INDIC DIGIT TWO;Nd;0;EN;;2;2;2;N;EASTERN ARABIC-INDIC DIGIT TWO;;;;
+ 06F3;EXTENDED ARABIC-INDIC DIGIT THREE;Nd;0;EN;;3;3;3;N;EASTERN ARABIC-INDIC DIGIT THREE;;;;
+ 06F4;EXTENDED ARABIC-INDIC DIGIT FOUR;Nd;0;EN;;4;4;4;N;EASTERN ARABIC-INDIC DIGIT FOUR;;;;
+ 06F5;EXTENDED ARABIC-INDIC DIGIT FIVE;Nd;0;EN;;5;5;5;N;EASTERN ARABIC-INDIC DIGIT FIVE;;;;
+ 06F6;EXTENDED ARABIC-INDIC DIGIT SIX;Nd;0;EN;;6;6;6;N;EASTERN ARABIC-INDIC DIGIT SIX;;;;
+ 06F7;EXTENDED ARABIC-INDIC DIGIT SEVEN;Nd;0;EN;;7;7;7;N;EASTERN ARABIC-INDIC DIGIT SEVEN;;;;
+ 06F8;EXTENDED ARABIC-INDIC DIGIT EIGHT;Nd;0;EN;;8;8;8;N;EASTERN ARABIC-INDIC DIGIT EIGHT;;;;
+ 06F9;EXTENDED ARABIC-INDIC DIGIT NINE;Nd;0;EN;;9;9;9;N;EASTERN ARABIC-INDIC DIGIT NINE;;;;
+ 06FA;ARABIC LETTER SHEEN WITH DOT BELOW;Lo;0;AL;;;;;N;;;;;
+ 06FB;ARABIC LETTER DAD WITH DOT BELOW;Lo;0;AL;;;;;N;;;;;
+ 06FC;ARABIC LETTER GHAIN WITH DOT BELOW;Lo;0;AL;;;;;N;;;;;
+ 06FD;ARABIC SIGN SINDHI AMPERSAND;So;0;AL;;;;;N;;;;;
+ 06FE;ARABIC SIGN SINDHI POSTPOSITION MEN;So;0;AL;;;;;N;;;;;
+ 06FF;ARABIC LETTER HEH WITH INVERTED V;Lo;0;AL;;;;;N;;;;;
+ 0700;SYRIAC END OF PARAGRAPH;Po;0;AL;;;;;N;;;;;
+ 0701;SYRIAC SUPRALINEAR FULL STOP;Po;0;AL;;;;;N;;;;;
+ 0702;SYRIAC SUBLINEAR FULL STOP;Po;0;AL;;;;;N;;;;;
+ 0703;SYRIAC SUPRALINEAR COLON;Po;0;AL;;;;;N;;;;;
+ 0704;SYRIAC SUBLINEAR COLON;Po;0;AL;;;;;N;;;;;
+ 0705;SYRIAC HORIZONTAL COLON;Po;0;AL;;;;;N;;;;;
+ 0706;SYRIAC COLON SKEWED LEFT;Po;0;AL;;;;;N;;;;;
+ 0707;SYRIAC COLON SKEWED RIGHT;Po;0;AL;;;;;N;;;;;
+ 0708;SYRIAC SUPRALINEAR COLON SKEWED LEFT;Po;0;AL;;;;;N;;;;;
+ 0709;SYRIAC SUBLINEAR COLON SKEWED RIGHT;Po;0;AL;;;;;N;;;;;
+ 070A;SYRIAC CONTRACTION;Po;0;AL;;;;;N;;;;;
+ 070B;SYRIAC HARKLEAN OBELUS;Po;0;AL;;;;;N;;;;;
+ 070C;SYRIAC HARKLEAN METOBELUS;Po;0;AL;;;;;N;;;;;
+ 070D;SYRIAC HARKLEAN ASTERISCUS;Po;0;AL;;;;;N;;;;;
+ 070F;SYRIAC ABBREVIATION MARK;Cf;0;AL;;;;;N;;;;;
+ 0710;SYRIAC LETTER ALAPH;Lo;0;AL;;;;;N;;;;;
+ 0711;SYRIAC LETTER SUPERSCRIPT ALAPH;Mn;36;NSM;;;;;N;;;;;
+ 0712;SYRIAC LETTER BETH;Lo;0;AL;;;;;N;;;;;
+ 0713;SYRIAC LETTER GAMAL;Lo;0;AL;;;;;N;;;;;
+ 0714;SYRIAC LETTER GAMAL GARSHUNI;Lo;0;AL;;;;;N;;;;;
+ 0715;SYRIAC LETTER DALATH;Lo;0;AL;;;;;N;;;;;
+ 0716;SYRIAC LETTER DOTLESS DALATH RISH;Lo;0;AL;;;;;N;;;;;
+ 0717;SYRIAC LETTER HE;Lo;0;AL;;;;;N;;;;;
+ 0718;SYRIAC LETTER WAW;Lo;0;AL;;;;;N;;;;;
+ 0719;SYRIAC LETTER ZAIN;Lo;0;AL;;;;;N;;;;;
+ 071A;SYRIAC LETTER HETH;Lo;0;AL;;;;;N;;;;;
+ 071B;SYRIAC LETTER TETH;Lo;0;AL;;;;;N;;;;;
+ 071C;SYRIAC LETTER TETH GARSHUNI;Lo;0;AL;;;;;N;;;;;
+ 071D;SYRIAC LETTER YUDH;Lo;0;AL;;;;;N;;;;;
+ 071E;SYRIAC LETTER YUDH HE;Lo;0;AL;;;;;N;;;;;
+ 071F;SYRIAC LETTER KAPH;Lo;0;AL;;;;;N;;;;;
+ 0720;SYRIAC LETTER LAMADH;Lo;0;AL;;;;;N;;;;;
+ 0721;SYRIAC LETTER MIM;Lo;0;AL;;;;;N;;;;;
+ 0722;SYRIAC LETTER NUN;Lo;0;AL;;;;;N;;;;;
+ 0723;SYRIAC LETTER SEMKATH;Lo;0;AL;;;;;N;;;;;
+ 0724;SYRIAC LETTER FINAL SEMKATH;Lo;0;AL;;;;;N;;;;;
+ 0725;SYRIAC LETTER E;Lo;0;AL;;;;;N;;;;;
+ 0726;SYRIAC LETTER PE;Lo;0;AL;;;;;N;;;;;
+ 0727;SYRIAC LETTER REVERSED PE;Lo;0;AL;;;;;N;;;;;
+ 0728;SYRIAC LETTER SADHE;Lo;0;AL;;;;;N;;;;;
+ 0729;SYRIAC LETTER QAPH;Lo;0;AL;;;;;N;;;;;
+ 072A;SYRIAC LETTER RISH;Lo;0;AL;;;;;N;;;;;
+ 072B;SYRIAC LETTER SHIN;Lo;0;AL;;;;;N;;;;;
+ 072C;SYRIAC LETTER TAW;Lo;0;AL;;;;;N;;;;;
+ 072D;SYRIAC LETTER PERSIAN BHETH;Lo;0;AL;;;;;N;;;;;
+ 072E;SYRIAC LETTER PERSIAN GHAMAL;Lo;0;AL;;;;;N;;;;;
+ 072F;SYRIAC LETTER PERSIAN DHALATH;Lo;0;AL;;;;;N;;;;;
+ 0730;SYRIAC PTHAHA ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 0731;SYRIAC PTHAHA BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0732;SYRIAC PTHAHA DOTTED;Mn;230;NSM;;;;;N;;;;;
+ 0733;SYRIAC ZQAPHA ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 0734;SYRIAC ZQAPHA BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0735;SYRIAC ZQAPHA DOTTED;Mn;230;NSM;;;;;N;;;;;
+ 0736;SYRIAC RBASA ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 0737;SYRIAC RBASA BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0738;SYRIAC DOTTED ZLAMA HORIZONTAL;Mn;220;NSM;;;;;N;;;;;
+ 0739;SYRIAC DOTTED ZLAMA ANGULAR;Mn;220;NSM;;;;;N;;;;;
+ 073A;SYRIAC HBASA ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 073B;SYRIAC HBASA BELOW;Mn;220;NSM;;;;;N;;;;;
+ 073C;SYRIAC HBASA-ESASA DOTTED;Mn;220;NSM;;;;;N;;;;;
+ 073D;SYRIAC ESASA ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 073E;SYRIAC ESASA BELOW;Mn;220;NSM;;;;;N;;;;;
+ 073F;SYRIAC RWAHA;Mn;230;NSM;;;;;N;;;;;
+ 0740;SYRIAC FEMININE DOT;Mn;230;NSM;;;;;N;;;;;
+ 0741;SYRIAC QUSHSHAYA;Mn;230;NSM;;;;;N;;;;;
+ 0742;SYRIAC RUKKAKHA;Mn;220;NSM;;;;;N;;;;;
+ 0743;SYRIAC TWO VERTICAL DOTS ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 0744;SYRIAC TWO VERTICAL DOTS BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0745;SYRIAC THREE DOTS ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 0746;SYRIAC THREE DOTS BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0747;SYRIAC OBLIQUE LINE ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 0748;SYRIAC OBLIQUE LINE BELOW;Mn;220;NSM;;;;;N;;;;;
+ 0749;SYRIAC MUSIC;Mn;230;NSM;;;;;N;;;;;
+ 074A;SYRIAC BARREKH;Mn;230;NSM;;;;;N;;;;;
+ 074D;SYRIAC LETTER SOGDIAN ZHAIN;Lo;0;AL;;;;;N;;;;;
+ 074E;SYRIAC LETTER SOGDIAN KHAPH;Lo;0;AL;;;;;N;;;;;
+ 074F;SYRIAC LETTER SOGDIAN FE;Lo;0;AL;;;;;N;;;;;
+ 0750;ARABIC LETTER BEH WITH THREE DOTS HORIZONTALLY BELOW;Lo;0;AL;;;;;N;;;;;
+ 0751;ARABIC LETTER BEH WITH DOT BELOW AND THREE DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0752;ARABIC LETTER BEH WITH THREE DOTS POINTING UPWARDS BELOW;Lo;0;AL;;;;;N;;;;;
+ 0753;ARABIC LETTER BEH WITH THREE DOTS POINTING UPWARDS BELOW AND TWO DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0754;ARABIC LETTER BEH WITH TWO DOTS BELOW AND DOT ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0755;ARABIC LETTER BEH WITH INVERTED SMALL V BELOW;Lo;0;AL;;;;;N;;;;;
+ 0756;ARABIC LETTER BEH WITH SMALL V;Lo;0;AL;;;;;N;;;;;
+ 0757;ARABIC LETTER HAH WITH TWO DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0758;ARABIC LETTER HAH WITH THREE DOTS POINTING UPWARDS BELOW;Lo;0;AL;;;;;N;;;;;
+ 0759;ARABIC LETTER DAL WITH TWO DOTS VERTICALLY BELOW AND SMALL TAH;Lo;0;AL;;;;;N;;;;;
+ 075A;ARABIC LETTER DAL WITH INVERTED SMALL V BELOW;Lo;0;AL;;;;;N;;;;;
+ 075B;ARABIC LETTER REH WITH STROKE;Lo;0;AL;;;;;N;;;;;
+ 075C;ARABIC LETTER SEEN WITH FOUR DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 075D;ARABIC LETTER AIN WITH TWO DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 075E;ARABIC LETTER AIN WITH THREE DOTS POINTING DOWNWARDS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 075F;ARABIC LETTER AIN WITH TWO DOTS VERTICALLY ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0760;ARABIC LETTER FEH WITH TWO DOTS BELOW;Lo;0;AL;;;;;N;;;;;
+ 0761;ARABIC LETTER FEH WITH THREE DOTS POINTING UPWARDS BELOW;Lo;0;AL;;;;;N;;;;;
+ 0762;ARABIC LETTER KEHEH WITH DOT ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0763;ARABIC LETTER KEHEH WITH THREE DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0764;ARABIC LETTER KEHEH WITH THREE DOTS POINTING UPWARDS BELOW;Lo;0;AL;;;;;N;;;;;
+ 0765;ARABIC LETTER MEEM WITH DOT ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0766;ARABIC LETTER MEEM WITH DOT BELOW;Lo;0;AL;;;;;N;;;;;
+ 0767;ARABIC LETTER NOON WITH TWO DOTS BELOW;Lo;0;AL;;;;;N;;;;;
+ 0768;ARABIC LETTER NOON WITH SMALL TAH;Lo;0;AL;;;;;N;;;;;
+ 0769;ARABIC LETTER NOON WITH SMALL V;Lo;0;AL;;;;;N;;;;;
+ 076A;ARABIC LETTER LAM WITH BAR;Lo;0;AL;;;;;N;;;;;
+ 076B;ARABIC LETTER REH WITH TWO DOTS VERTICALLY ABOVE;Lo;0;AL;;;;;N;;;;;
+ 076C;ARABIC LETTER REH WITH HAMZA ABOVE;Lo;0;AL;;;;;N;;;;;
+ 076D;ARABIC LETTER SEEN WITH TWO DOTS VERTICALLY ABOVE;Lo;0;AL;;;;;N;;;;;
+ 076E;ARABIC LETTER HAH WITH SMALL ARABIC LETTER TAH BELOW;Lo;0;AL;;;;;N;;;;;
+ 076F;ARABIC LETTER HAH WITH SMALL ARABIC LETTER TAH AND TWO DOTS;Lo;0;AL;;;;;N;;;;;
+ 0770;ARABIC LETTER SEEN WITH SMALL ARABIC LETTER TAH AND TWO DOTS;Lo;0;AL;;;;;N;;;;;
+ 0771;ARABIC LETTER REH WITH SMALL ARABIC LETTER TAH AND TWO DOTS;Lo;0;AL;;;;;N;;;;;
+ 0772;ARABIC LETTER HAH WITH SMALL ARABIC LETTER TAH ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0773;ARABIC LETTER ALEF WITH EXTENDED ARABIC-INDIC DIGIT TWO ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0774;ARABIC LETTER ALEF WITH EXTENDED ARABIC-INDIC DIGIT THREE ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0775;ARABIC LETTER FARSI YEH WITH EXTENDED ARABIC-INDIC DIGIT TWO ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0776;ARABIC LETTER FARSI YEH WITH EXTENDED ARABIC-INDIC DIGIT THREE ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0777;ARABIC LETTER FARSI YEH WITH EXTENDED ARABIC-INDIC DIGIT FOUR BELOW;Lo;0;AL;;;;;N;;;;;
+ 0778;ARABIC LETTER WAW WITH EXTENDED ARABIC-INDIC DIGIT TWO ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0779;ARABIC LETTER WAW WITH EXTENDED ARABIC-INDIC DIGIT THREE ABOVE;Lo;0;AL;;;;;N;;;;;
+ 077A;ARABIC LETTER YEH BARREE WITH EXTENDED ARABIC-INDIC DIGIT TWO ABOVE;Lo;0;AL;;;;;N;;;;;
+ 077B;ARABIC LETTER YEH BARREE WITH EXTENDED ARABIC-INDIC DIGIT THREE ABOVE;Lo;0;AL;;;;;N;;;;;
+ 077C;ARABIC LETTER HAH WITH EXTENDED ARABIC-INDIC DIGIT FOUR BELOW;Lo;0;AL;;;;;N;;;;;
+ 077D;ARABIC LETTER SEEN WITH EXTENDED ARABIC-INDIC DIGIT FOUR ABOVE;Lo;0;AL;;;;;N;;;;;
+ 077E;ARABIC LETTER SEEN WITH INVERTED V;Lo;0;AL;;;;;N;;;;;
+ 077F;ARABIC LETTER KAF WITH TWO DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 0780;THAANA LETTER HAA;Lo;0;AL;;;;;N;;;;;
+ 0781;THAANA LETTER SHAVIYANI;Lo;0;AL;;;;;N;;;;;
+ 0782;THAANA LETTER NOONU;Lo;0;AL;;;;;N;;;;;
+ 0783;THAANA LETTER RAA;Lo;0;AL;;;;;N;;;;;
+ 0784;THAANA LETTER BAA;Lo;0;AL;;;;;N;;;;;
+ 0785;THAANA LETTER LHAVIYANI;Lo;0;AL;;;;;N;;;;;
+ 0786;THAANA LETTER KAAFU;Lo;0;AL;;;;;N;;;;;
+ 0787;THAANA LETTER ALIFU;Lo;0;AL;;;;;N;;;;;
+ 0788;THAANA LETTER VAAVU;Lo;0;AL;;;;;N;;;;;
+ 0789;THAANA LETTER MEEMU;Lo;0;AL;;;;;N;;;;;
+ 078A;THAANA LETTER FAAFU;Lo;0;AL;;;;;N;;;;;
+ 078B;THAANA LETTER DHAALU;Lo;0;AL;;;;;N;;;;;
+ 078C;THAANA LETTER THAA;Lo;0;AL;;;;;N;;;;;
+ 078D;THAANA LETTER LAAMU;Lo;0;AL;;;;;N;;;;;
+ 078E;THAANA LETTER GAAFU;Lo;0;AL;;;;;N;;;;;
+ 078F;THAANA LETTER GNAVIYANI;Lo;0;AL;;;;;N;;;;;
+ 0790;THAANA LETTER SEENU;Lo;0;AL;;;;;N;;;;;
+ 0791;THAANA LETTER DAVIYANI;Lo;0;AL;;;;;N;;;;;
+ 0792;THAANA LETTER ZAVIYANI;Lo;0;AL;;;;;N;;;;;
+ 0793;THAANA LETTER TAVIYANI;Lo;0;AL;;;;;N;;;;;
+ 0794;THAANA LETTER YAA;Lo;0;AL;;;;;N;;;;;
+ 0795;THAANA LETTER PAVIYANI;Lo;0;AL;;;;;N;;;;;
+ 0796;THAANA LETTER JAVIYANI;Lo;0;AL;;;;;N;;;;;
+ 0797;THAANA LETTER CHAVIYANI;Lo;0;AL;;;;;N;;;;;
+ 0798;THAANA LETTER TTAA;Lo;0;AL;;;;;N;;;;;
+ 0799;THAANA LETTER HHAA;Lo;0;AL;;;;;N;;;;;
+ 079A;THAANA LETTER KHAA;Lo;0;AL;;;;;N;;;;;
+ 079B;THAANA LETTER THAALU;Lo;0;AL;;;;;N;;;;;
+ 079C;THAANA LETTER ZAA;Lo;0;AL;;;;;N;;;;;
+ 079D;THAANA LETTER SHEENU;Lo;0;AL;;;;;N;;;;;
+ 079E;THAANA LETTER SAADHU;Lo;0;AL;;;;;N;;;;;
+ 079F;THAANA LETTER DAADHU;Lo;0;AL;;;;;N;;;;;
+ 07A0;THAANA LETTER TO;Lo;0;AL;;;;;N;;;;;
+ 07A1;THAANA LETTER ZO;Lo;0;AL;;;;;N;;;;;
+ 07A2;THAANA LETTER AINU;Lo;0;AL;;;;;N;;;;;
+ 07A3;THAANA LETTER GHAINU;Lo;0;AL;;;;;N;;;;;
+ 07A4;THAANA LETTER QAAFU;Lo;0;AL;;;;;N;;;;;
+ 07A5;THAANA LETTER WAAVU;Lo;0;AL;;;;;N;;;;;
+ 07A6;THAANA ABAFILI;Mn;0;NSM;;;;;N;;;;;
+ 07A7;THAANA AABAAFILI;Mn;0;NSM;;;;;N;;;;;
+ 07A8;THAANA IBIFILI;Mn;0;NSM;;;;;N;;;;;
+ 07A9;THAANA EEBEEFILI;Mn;0;NSM;;;;;N;;;;;
+ 07AA;THAANA UBUFILI;Mn;0;NSM;;;;;N;;;;;
+ 07AB;THAANA OOBOOFILI;Mn;0;NSM;;;;;N;;;;;
+ 07AC;THAANA EBEFILI;Mn;0;NSM;;;;;N;;;;;
+ 07AD;THAANA EYBEYFILI;Mn;0;NSM;;;;;N;;;;;
+ 07AE;THAANA OBOFILI;Mn;0;NSM;;;;;N;;;;;
+ 07AF;THAANA OABOAFILI;Mn;0;NSM;;;;;N;;;;;
+ 07B0;THAANA SUKUN;Mn;0;NSM;;;;;N;;;;;
+ 07B1;THAANA LETTER NAA;Lo;0;AL;;;;;N;;;;;
+ 07C0;NKO DIGIT ZERO;Nd;0;R;;0;0;0;N;;;;;
+ 07C1;NKO DIGIT ONE;Nd;0;R;;1;1;1;N;;;;;
+ 07C2;NKO DIGIT TWO;Nd;0;R;;2;2;2;N;;;;;
+ 07C3;NKO DIGIT THREE;Nd;0;R;;3;3;3;N;;;;;
+ 07C4;NKO DIGIT FOUR;Nd;0;R;;4;4;4;N;;;;;
+ 07C5;NKO DIGIT FIVE;Nd;0;R;;5;5;5;N;;;;;
+ 07C6;NKO DIGIT SIX;Nd;0;R;;6;6;6;N;;;;;
+ 07C7;NKO DIGIT SEVEN;Nd;0;R;;7;7;7;N;;;;;
+ 07C8;NKO DIGIT EIGHT;Nd;0;R;;8;8;8;N;;;;;
+ 07C9;NKO DIGIT NINE;Nd;0;R;;9;9;9;N;;;;;
+ 07CA;NKO LETTER A;Lo;0;R;;;;;N;;;;;
+ 07CB;NKO LETTER EE;Lo;0;R;;;;;N;;;;;
+ 07CC;NKO LETTER I;Lo;0;R;;;;;N;;;;;
+ 07CD;NKO LETTER E;Lo;0;R;;;;;N;;;;;
+ 07CE;NKO LETTER U;Lo;0;R;;;;;N;;;;;
+ 07CF;NKO LETTER OO;Lo;0;R;;;;;N;;;;;
+ 07D0;NKO LETTER O;Lo;0;R;;;;;N;;;;;
+ 07D1;NKO LETTER DAGBASINNA;Lo;0;R;;;;;N;;;;;
+ 07D2;NKO LETTER N;Lo;0;R;;;;;N;;;;;
+ 07D3;NKO LETTER BA;Lo;0;R;;;;;N;;;;;
+ 07D4;NKO LETTER PA;Lo;0;R;;;;;N;;;;;
+ 07D5;NKO LETTER TA;Lo;0;R;;;;;N;;;;;
+ 07D6;NKO LETTER JA;Lo;0;R;;;;;N;;;;;
+ 07D7;NKO LETTER CHA;Lo;0;R;;;;;N;;;;;
+ 07D8;NKO LETTER DA;Lo;0;R;;;;;N;;;;;
+ 07D9;NKO LETTER RA;Lo;0;R;;;;;N;;;;;
+ 07DA;NKO LETTER RRA;Lo;0;R;;;;;N;;;;;
+ 07DB;NKO LETTER SA;Lo;0;R;;;;;N;;;;;
+ 07DC;NKO LETTER GBA;Lo;0;R;;;;;N;;;;;
+ 07DD;NKO LETTER FA;Lo;0;R;;;;;N;;;;;
+ 07DE;NKO LETTER KA;Lo;0;R;;;;;N;;;;;
+ 07DF;NKO LETTER LA;Lo;0;R;;;;;N;;;;;
+ 07E0;NKO LETTER NA WOLOSO;Lo;0;R;;;;;N;;;;;
+ 07E1;NKO LETTER MA;Lo;0;R;;;;;N;;;;;
+ 07E2;NKO LETTER NYA;Lo;0;R;;;;;N;;;;;
+ 07E3;NKO LETTER NA;Lo;0;R;;;;;N;;;;;
+ 07E4;NKO LETTER HA;Lo;0;R;;;;;N;;;;;
+ 07E5;NKO LETTER WA;Lo;0;R;;;;;N;;;;;
+ 07E6;NKO LETTER YA;Lo;0;R;;;;;N;;;;;
+ 07E7;NKO LETTER NYA WOLOSO;Lo;0;R;;;;;N;;;;;
+ 07E8;NKO LETTER JONA JA;Lo;0;R;;;;;N;;;;;
+ 07E9;NKO LETTER JONA CHA;Lo;0;R;;;;;N;;;;;
+ 07EA;NKO LETTER JONA RA;Lo;0;R;;;;;N;;;;;
+ 07EB;NKO COMBINING SHORT HIGH TONE;Mn;230;NSM;;;;;N;;;;;
+ 07EC;NKO COMBINING SHORT LOW TONE;Mn;230;NSM;;;;;N;;;;;
+ 07ED;NKO COMBINING SHORT RISING TONE;Mn;230;NSM;;;;;N;;;;;
+ 07EE;NKO COMBINING LONG DESCENDING TONE;Mn;230;NSM;;;;;N;;;;;
+ 07EF;NKO COMBINING LONG HIGH TONE;Mn;230;NSM;;;;;N;;;;;
+ 07F0;NKO COMBINING LONG LOW TONE;Mn;230;NSM;;;;;N;;;;;
+ 07F1;NKO COMBINING LONG RISING TONE;Mn;230;NSM;;;;;N;;;;;
+ 07F2;NKO COMBINING NASALIZATION MARK;Mn;220;NSM;;;;;N;;;;;
+ 07F3;NKO COMBINING DOUBLE DOT ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 07F4;NKO HIGH TONE APOSTROPHE;Lm;0;R;;;;;N;;;;;
+ 07F5;NKO LOW TONE APOSTROPHE;Lm;0;R;;;;;N;;;;;
+ 07F6;NKO SYMBOL OO DENNEN;So;0;ON;;;;;N;;;;;
+ 07F7;NKO SYMBOL GBAKURUNEN;Po;0;ON;;;;;N;;;;;
+ 07F8;NKO COMMA;Po;0;ON;;;;;N;;;;;
+ 07F9;NKO EXCLAMATION MARK;Po;0;ON;;;;;N;;;;;
+ 07FA;NKO LAJANYALAN;Lm;0;R;;;;;N;;;;;
+ 07FD;NKO DANTAYALAN;Mn;220;NSM;;;;;N;;;;;
+ 07FE;NKO DOROME SIGN;Sc;0;R;;;;;N;;;;;
+ 07FF;NKO TAMAN SIGN;Sc;0;R;;;;;N;;;;;
+ 0800;SAMARITAN LETTER ALAF;Lo;0;R;;;;;N;;;;;
+ 0801;SAMARITAN LETTER BIT;Lo;0;R;;;;;N;;;;;
+ 0802;SAMARITAN LETTER GAMAN;Lo;0;R;;;;;N;;;;;
+ 0803;SAMARITAN LETTER DALAT;Lo;0;R;;;;;N;;;;;
+ 0804;SAMARITAN LETTER IY;Lo;0;R;;;;;N;;;;;
+ 0805;SAMARITAN LETTER BAA;Lo;0;R;;;;;N;;;;;
+ 0806;SAMARITAN LETTER ZEN;Lo;0;R;;;;;N;;;;;
+ 0807;SAMARITAN LETTER IT;Lo;0;R;;;;;N;;;;;
+ 0808;SAMARITAN LETTER TIT;Lo;0;R;;;;;N;;;;;
+ 0809;SAMARITAN LETTER YUT;Lo;0;R;;;;;N;;;;;
+ 080A;SAMARITAN LETTER KAAF;Lo;0;R;;;;;N;;;;;
+ 080B;SAMARITAN LETTER LABAT;Lo;0;R;;;;;N;;;;;
+ 080C;SAMARITAN LETTER MIM;Lo;0;R;;;;;N;;;;;
+ 080D;SAMARITAN LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 080E;SAMARITAN LETTER SINGAAT;Lo;0;R;;;;;N;;;;;
+ 080F;SAMARITAN LETTER IN;Lo;0;R;;;;;N;;;;;
+ 0810;SAMARITAN LETTER FI;Lo;0;R;;;;;N;;;;;
+ 0811;SAMARITAN LETTER TSAADIY;Lo;0;R;;;;;N;;;;;
+ 0812;SAMARITAN LETTER QUF;Lo;0;R;;;;;N;;;;;
+ 0813;SAMARITAN LETTER RISH;Lo;0;R;;;;;N;;;;;
+ 0814;SAMARITAN LETTER SHAN;Lo;0;R;;;;;N;;;;;
+ 0815;SAMARITAN LETTER TAAF;Lo;0;R;;;;;N;;;;;
+ 0816;SAMARITAN MARK IN;Mn;230;NSM;;;;;N;;;;;
+ 0817;SAMARITAN MARK IN-ALAF;Mn;230;NSM;;;;;N;;;;;
+ 0818;SAMARITAN MARK OCCLUSION;Mn;230;NSM;;;;;N;;;;;
+ 0819;SAMARITAN MARK DAGESH;Mn;230;NSM;;;;;N;;;;;
+ 081A;SAMARITAN MODIFIER LETTER EPENTHETIC YUT;Lm;0;R;;;;;N;;;;;
+ 081B;SAMARITAN MARK EPENTHETIC YUT;Mn;230;NSM;;;;;N;;;;;
+ 081C;SAMARITAN VOWEL SIGN LONG E;Mn;230;NSM;;;;;N;;;;;
+ 081D;SAMARITAN VOWEL SIGN E;Mn;230;NSM;;;;;N;;;;;
+ 081E;SAMARITAN VOWEL SIGN OVERLONG AA;Mn;230;NSM;;;;;N;;;;;
+ 081F;SAMARITAN VOWEL SIGN LONG AA;Mn;230;NSM;;;;;N;;;;;
+ 0820;SAMARITAN VOWEL SIGN AA;Mn;230;NSM;;;;;N;;;;;
+ 0821;SAMARITAN VOWEL SIGN OVERLONG A;Mn;230;NSM;;;;;N;;;;;
+ 0822;SAMARITAN VOWEL SIGN LONG A;Mn;230;NSM;;;;;N;;;;;
+ 0823;SAMARITAN VOWEL SIGN A;Mn;230;NSM;;;;;N;;;;;
+ 0824;SAMARITAN MODIFIER LETTER SHORT A;Lm;0;R;;;;;N;;;;;
+ 0825;SAMARITAN VOWEL SIGN SHORT A;Mn;230;NSM;;;;;N;;;;;
+ 0826;SAMARITAN VOWEL SIGN LONG U;Mn;230;NSM;;;;;N;;;;;
+ 0827;SAMARITAN VOWEL SIGN U;Mn;230;NSM;;;;;N;;;;;
+ 0828;SAMARITAN MODIFIER LETTER I;Lm;0;R;;;;;N;;;;;
+ 0829;SAMARITAN VOWEL SIGN LONG I;Mn;230;NSM;;;;;N;;;;;
+ 082A;SAMARITAN VOWEL SIGN I;Mn;230;NSM;;;;;N;;;;;
+ 082B;SAMARITAN VOWEL SIGN O;Mn;230;NSM;;;;;N;;;;;
+ 082C;SAMARITAN VOWEL SIGN SUKUN;Mn;230;NSM;;;;;N;;;;;
+ 082D;SAMARITAN MARK NEQUDAA;Mn;230;NSM;;;;;N;;;;;
+ 0830;SAMARITAN PUNCTUATION NEQUDAA;Po;0;R;;;;;N;;;;;
+ 0831;SAMARITAN PUNCTUATION AFSAAQ;Po;0;R;;;;;N;;;;;
+ 0832;SAMARITAN PUNCTUATION ANGED;Po;0;R;;;;;N;;;;;
+ 0833;SAMARITAN PUNCTUATION BAU;Po;0;R;;;;;N;;;;;
+ 0834;SAMARITAN PUNCTUATION ATMAAU;Po;0;R;;;;;N;;;;;
+ 0835;SAMARITAN PUNCTUATION SHIYYAALAA;Po;0;R;;;;;N;;;;;
+ 0836;SAMARITAN ABBREVIATION MARK;Po;0;R;;;;;N;;;;;
+ 0837;SAMARITAN PUNCTUATION MELODIC QITSA;Po;0;R;;;;;N;;;;;
+ 0838;SAMARITAN PUNCTUATION ZIQAA;Po;0;R;;;;;N;;;;;
+ 0839;SAMARITAN PUNCTUATION QITSA;Po;0;R;;;;;N;;;;;
+ 083A;SAMARITAN PUNCTUATION ZAEF;Po;0;R;;;;;N;;;;;
+ 083B;SAMARITAN PUNCTUATION TURU;Po;0;R;;;;;N;;;;;
+ 083C;SAMARITAN PUNCTUATION ARKAANU;Po;0;R;;;;;N;;;;;
+ 083D;SAMARITAN PUNCTUATION SOF MASHFAAT;Po;0;R;;;;;N;;;;;
+ 083E;SAMARITAN PUNCTUATION ANNAAU;Po;0;R;;;;;N;;;;;
+ 0840;MANDAIC LETTER HALQA;Lo;0;R;;;;;N;;;;;
+ 0841;MANDAIC LETTER AB;Lo;0;R;;;;;N;;;;;
+ 0842;MANDAIC LETTER AG;Lo;0;R;;;;;N;;;;;
+ 0843;MANDAIC LETTER AD;Lo;0;R;;;;;N;;;;;
+ 0844;MANDAIC LETTER AH;Lo;0;R;;;;;N;;;;;
+ 0845;MANDAIC LETTER USHENNA;Lo;0;R;;;;;N;;;;;
+ 0846;MANDAIC LETTER AZ;Lo;0;R;;;;;N;;;;;
+ 0847;MANDAIC LETTER IT;Lo;0;R;;;;;N;;;;;
+ 0848;MANDAIC LETTER ATT;Lo;0;R;;;;;N;;;;;
+ 0849;MANDAIC LETTER AKSA;Lo;0;R;;;;;N;;;;;
+ 084A;MANDAIC LETTER AK;Lo;0;R;;;;;N;;;;;
+ 084B;MANDAIC LETTER AL;Lo;0;R;;;;;N;;;;;
+ 084C;MANDAIC LETTER AM;Lo;0;R;;;;;N;;;;;
+ 084D;MANDAIC LETTER AN;Lo;0;R;;;;;N;;;;;
+ 084E;MANDAIC LETTER AS;Lo;0;R;;;;;N;;;;;
+ 084F;MANDAIC LETTER IN;Lo;0;R;;;;;N;;;;;
+ 0850;MANDAIC LETTER AP;Lo;0;R;;;;;N;;;;;
+ 0851;MANDAIC LETTER ASZ;Lo;0;R;;;;;N;;;;;
+ 0852;MANDAIC LETTER AQ;Lo;0;R;;;;;N;;;;;
+ 0853;MANDAIC LETTER AR;Lo;0;R;;;;;N;;;;;
+ 0854;MANDAIC LETTER ASH;Lo;0;R;;;;;N;;;;;
+ 0855;MANDAIC LETTER AT;Lo;0;R;;;;;N;;;;;
+ 0856;MANDAIC LETTER DUSHENNA;Lo;0;R;;;;;N;;;;;
+ 0857;MANDAIC LETTER KAD;Lo;0;R;;;;;N;;;;;
+ 0858;MANDAIC LETTER AIN;Lo;0;R;;;;;N;;;;;
+ 0859;MANDAIC AFFRICATION MARK;Mn;220;NSM;;;;;N;;;;;
+ 085A;MANDAIC VOCALIZATION MARK;Mn;220;NSM;;;;;N;;;;;
+ 085B;MANDAIC GEMINATION MARK;Mn;220;NSM;;;;;N;;;;;
+ 085E;MANDAIC PUNCTUATION;Po;0;R;;;;;N;;;;;
+ 0860;SYRIAC LETTER MALAYALAM NGA;Lo;0;AL;;;;;N;;;;;
+ 0861;SYRIAC LETTER MALAYALAM JA;Lo;0;AL;;;;;N;;;;;
+ 0862;SYRIAC LETTER MALAYALAM NYA;Lo;0;AL;;;;;N;;;;;
+ 0863;SYRIAC LETTER MALAYALAM TTA;Lo;0;AL;;;;;N;;;;;
+ 0864;SYRIAC LETTER MALAYALAM NNA;Lo;0;AL;;;;;N;;;;;
+ 0865;SYRIAC LETTER MALAYALAM NNNA;Lo;0;AL;;;;;N;;;;;
+ 0866;SYRIAC LETTER MALAYALAM BHA;Lo;0;AL;;;;;N;;;;;
+ 0867;SYRIAC LETTER MALAYALAM RA;Lo;0;AL;;;;;N;;;;;
+ 0868;SYRIAC LETTER MALAYALAM LLA;Lo;0;AL;;;;;N;;;;;
+ 0869;SYRIAC LETTER MALAYALAM LLLA;Lo;0;AL;;;;;N;;;;;
+ 086A;SYRIAC LETTER MALAYALAM SSA;Lo;0;AL;;;;;N;;;;;
+ 08A0;ARABIC LETTER BEH WITH SMALL V BELOW;Lo;0;AL;;;;;N;;;;;
+ 08A1;ARABIC LETTER BEH WITH HAMZA ABOVE;Lo;0;AL;;;;;N;;;;;
+ 08A2;ARABIC LETTER JEEM WITH TWO DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 08A3;ARABIC LETTER TAH WITH TWO DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 08A4;ARABIC LETTER FEH WITH DOT BELOW AND THREE DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 08A5;ARABIC LETTER QAF WITH DOT BELOW;Lo;0;AL;;;;;N;;;;;
+ 08A6;ARABIC LETTER LAM WITH DOUBLE BAR;Lo;0;AL;;;;;N;;;;;
+ 08A7;ARABIC LETTER MEEM WITH THREE DOTS ABOVE;Lo;0;AL;;;;;N;;;;;
+ 08A8;ARABIC LETTER YEH WITH TWO DOTS BELOW AND HAMZA ABOVE;Lo;0;AL;;;;;N;;;;;
+ 08A9;ARABIC LETTER YEH WITH TWO DOTS BELOW AND DOT ABOVE;Lo;0;AL;;;;;N;;;;;
+ 08AA;ARABIC LETTER REH WITH LOOP;Lo;0;AL;;;;;N;;;;;
+ 08AB;ARABIC LETTER WAW WITH DOT WITHIN;Lo;0;AL;;;;;N;;;;;
+ 08AC;ARABIC LETTER ROHINGYA YEH;Lo;0;AL;;;;;N;;;;;
+ 08AD;ARABIC LETTER LOW ALEF;Lo;0;AL;;;;;N;;;;;
+ 08AE;ARABIC LETTER DAL WITH THREE DOTS BELOW;Lo;0;AL;;;;;N;;;;;
+ 08AF;ARABIC LETTER SAD WITH THREE DOTS BELOW;Lo;0;AL;;;;;N;;;;;
+ 08B0;ARABIC LETTER GAF WITH INVERTED STROKE;Lo;0;AL;;;;;N;;;;;
+ 08B1;ARABIC LETTER STRAIGHT WAW;Lo;0;AL;;;;;N;;;;;
+ 08B2;ARABIC LETTER ZAIN WITH INVERTED V ABOVE;Lo;0;AL;;;;;N;;;;;
+ 08B3;ARABIC LETTER AIN WITH THREE DOTS BELOW;Lo;0;AL;;;;;N;;;;;
+ 08B4;ARABIC LETTER KAF WITH DOT BELOW;Lo;0;AL;;;;;N;;;;;
+ 08B6;ARABIC LETTER BEH WITH SMALL MEEM ABOVE;Lo;0;AL;;;;;N;;;;;
+ 08B7;ARABIC LETTER PEH WITH SMALL MEEM ABOVE;Lo;0;AL;;;;;N;;;;;
+ 08B8;ARABIC LETTER TEH WITH SMALL TEH ABOVE;Lo;0;AL;;;;;N;;;;;
+ 08B9;ARABIC LETTER REH WITH SMALL NOON ABOVE;Lo;0;AL;;;;;N;;;;;
+ 08BA;ARABIC LETTER YEH WITH TWO DOTS BELOW AND SMALL NOON ABOVE;Lo;0;AL;;;;;N;;;;;
+ 08BB;ARABIC LETTER AFRICAN FEH;Lo;0;AL;;;;;N;;;;;
+ 08BC;ARABIC LETTER AFRICAN QAF;Lo;0;AL;;;;;N;;;;;
+ 08BD;ARABIC LETTER AFRICAN NOON;Lo;0;AL;;;;;N;;;;;
+ 08D3;ARABIC SMALL LOW WAW;Mn;220;NSM;;;;;N;;;;;
+ 08D4;ARABIC SMALL HIGH WORD AR-RUB;Mn;230;NSM;;;;;N;;;;;
+ 08D5;ARABIC SMALL HIGH SAD;Mn;230;NSM;;;;;N;;;;;
+ 08D6;ARABIC SMALL HIGH AIN;Mn;230;NSM;;;;;N;;;;;
+ 08D7;ARABIC SMALL HIGH QAF;Mn;230;NSM;;;;;N;;;;;
+ 08D8;ARABIC SMALL HIGH NOON WITH KASRA;Mn;230;NSM;;;;;N;;;;;
+ 08D9;ARABIC SMALL LOW NOON WITH KASRA;Mn;230;NSM;;;;;N;;;;;
+ 08DA;ARABIC SMALL HIGH WORD ATH-THALATHA;Mn;230;NSM;;;;;N;;;;;
+ 08DB;ARABIC SMALL HIGH WORD AS-SAJDA;Mn;230;NSM;;;;;N;;;;;
+ 08DC;ARABIC SMALL HIGH WORD AN-NISF;Mn;230;NSM;;;;;N;;;;;
+ 08DD;ARABIC SMALL HIGH WORD SAKTA;Mn;230;NSM;;;;;N;;;;;
+ 08DE;ARABIC SMALL HIGH WORD QIF;Mn;230;NSM;;;;;N;;;;;
+ 08DF;ARABIC SMALL HIGH WORD WAQFA;Mn;230;NSM;;;;;N;;;;;
+ 08E0;ARABIC SMALL HIGH FOOTNOTE MARKER;Mn;230;NSM;;;;;N;;;;;
+ 08E1;ARABIC SMALL HIGH SIGN SAFHA;Mn;230;NSM;;;;;N;;;;;
+ 08E2;ARABIC DISPUTED END OF AYAH;Cf;0;AN;;;;;N;;;;;
+ 08E3;ARABIC TURNED DAMMA BELOW;Mn;220;NSM;;;;;N;;;;;
+ 08E4;ARABIC CURLY FATHA;Mn;230;NSM;;;;;N;;;;;
+ 08E5;ARABIC CURLY DAMMA;Mn;230;NSM;;;;;N;;;;;
+ 08E6;ARABIC CURLY KASRA;Mn;220;NSM;;;;;N;;;;;
+ 08E7;ARABIC CURLY FATHATAN;Mn;230;NSM;;;;;N;;;;;
+ 08E8;ARABIC CURLY DAMMATAN;Mn;230;NSM;;;;;N;;;;;
+ 08E9;ARABIC CURLY KASRATAN;Mn;220;NSM;;;;;N;;;;;
+ 08EA;ARABIC TONE ONE DOT ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 08EB;ARABIC TONE TWO DOTS ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 08EC;ARABIC TONE LOOP ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 08ED;ARABIC TONE ONE DOT BELOW;Mn;220;NSM;;;;;N;;;;;
+ 08EE;ARABIC TONE TWO DOTS BELOW;Mn;220;NSM;;;;;N;;;;;
+ 08EF;ARABIC TONE LOOP BELOW;Mn;220;NSM;;;;;N;;;;;
+ 08F0;ARABIC OPEN FATHATAN;Mn;27;NSM;;;;;N;;;;;
+ 08F1;ARABIC OPEN DAMMATAN;Mn;28;NSM;;;;;N;;;;;
+ 08F2;ARABIC OPEN KASRATAN;Mn;29;NSM;;;;;N;;;;;
+ 08F3;ARABIC SMALL HIGH WAW;Mn;230;NSM;;;;;N;;;;;
+ 08F4;ARABIC FATHA WITH RING;Mn;230;NSM;;;;;N;;;;;
+ 08F5;ARABIC FATHA WITH DOT ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 08F6;ARABIC KASRA WITH DOT BELOW;Mn;220;NSM;;;;;N;;;;;
+ 08F7;ARABIC LEFT ARROWHEAD ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 08F8;ARABIC RIGHT ARROWHEAD ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 08F9;ARABIC LEFT ARROWHEAD BELOW;Mn;220;NSM;;;;;N;;;;;
+ 08FA;ARABIC RIGHT ARROWHEAD BELOW;Mn;220;NSM;;;;;N;;;;;
+ 08FB;ARABIC DOUBLE RIGHT ARROWHEAD ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 08FC;ARABIC DOUBLE RIGHT ARROWHEAD ABOVE WITH DOT;Mn;230;NSM;;;;;N;;;;;
+ 08FD;ARABIC RIGHT ARROWHEAD ABOVE WITH DOT;Mn;230;NSM;;;;;N;;;;;
+ 08FE;ARABIC DAMMA WITH DOT;Mn;230;NSM;;;;;N;;;;;
+ 08FF;ARABIC MARK SIDEWAYS NOON GHUNNA;Mn;230;NSM;;;;;N;;;;;
+ 0900;DEVANAGARI SIGN INVERTED CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 0901;DEVANAGARI SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 0902;DEVANAGARI SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 0903;DEVANAGARI SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 0904;DEVANAGARI LETTER SHORT A;Lo;0;L;;;;;N;;;;;
+ 0905;DEVANAGARI LETTER A;Lo;0;L;;;;;N;;;;;
+ 0906;DEVANAGARI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 0907;DEVANAGARI LETTER I;Lo;0;L;;;;;N;;;;;
+ 0908;DEVANAGARI LETTER II;Lo;0;L;;;;;N;;;;;
+ 0909;DEVANAGARI LETTER U;Lo;0;L;;;;;N;;;;;
+ 090A;DEVANAGARI LETTER UU;Lo;0;L;;;;;N;;;;;
+ 090B;DEVANAGARI LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 090C;DEVANAGARI LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 090D;DEVANAGARI LETTER CANDRA E;Lo;0;L;;;;;N;;;;;
+ 090E;DEVANAGARI LETTER SHORT E;Lo;0;L;;;;;N;;;;;
+ 090F;DEVANAGARI LETTER E;Lo;0;L;;;;;N;;;;;
+ 0910;DEVANAGARI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 0911;DEVANAGARI LETTER CANDRA O;Lo;0;L;;;;;N;;;;;
+ 0912;DEVANAGARI LETTER SHORT O;Lo;0;L;;;;;N;;;;;
+ 0913;DEVANAGARI LETTER O;Lo;0;L;;;;;N;;;;;
+ 0914;DEVANAGARI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 0915;DEVANAGARI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 0916;DEVANAGARI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 0917;DEVANAGARI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 0918;DEVANAGARI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 0919;DEVANAGARI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 091A;DEVANAGARI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 091B;DEVANAGARI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 091C;DEVANAGARI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 091D;DEVANAGARI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 091E;DEVANAGARI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 091F;DEVANAGARI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 0920;DEVANAGARI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 0921;DEVANAGARI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 0922;DEVANAGARI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 0923;DEVANAGARI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 0924;DEVANAGARI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 0925;DEVANAGARI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 0926;DEVANAGARI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 0927;DEVANAGARI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 0928;DEVANAGARI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 0929;DEVANAGARI LETTER NNNA;Lo;0;L;0928 093C;;;;N;;;;;
+ 092A;DEVANAGARI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 092B;DEVANAGARI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 092C;DEVANAGARI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 092D;DEVANAGARI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 092E;DEVANAGARI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 092F;DEVANAGARI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 0930;DEVANAGARI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 0931;DEVANAGARI LETTER RRA;Lo;0;L;0930 093C;;;;N;;;;;
+ 0932;DEVANAGARI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 0933;DEVANAGARI LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 0934;DEVANAGARI LETTER LLLA;Lo;0;L;0933 093C;;;;N;;;;;
+ 0935;DEVANAGARI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 0936;DEVANAGARI LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 0937;DEVANAGARI LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 0938;DEVANAGARI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 0939;DEVANAGARI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 093A;DEVANAGARI VOWEL SIGN OE;Mn;0;NSM;;;;;N;;;;;
+ 093B;DEVANAGARI VOWEL SIGN OOE;Mc;0;L;;;;;N;;;;;
+ 093C;DEVANAGARI SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 093D;DEVANAGARI SIGN AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 093E;DEVANAGARI VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 093F;DEVANAGARI VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 0940;DEVANAGARI VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 0941;DEVANAGARI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 0942;DEVANAGARI VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 0943;DEVANAGARI VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 0944;DEVANAGARI VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 0945;DEVANAGARI VOWEL SIGN CANDRA E;Mn;0;NSM;;;;;N;;;;;
+ 0946;DEVANAGARI VOWEL SIGN SHORT E;Mn;0;NSM;;;;;N;;;;;
+ 0947;DEVANAGARI VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 0948;DEVANAGARI VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 0949;DEVANAGARI VOWEL SIGN CANDRA O;Mc;0;L;;;;;N;;;;;
+ 094A;DEVANAGARI VOWEL SIGN SHORT O;Mc;0;L;;;;;N;;;;;
+ 094B;DEVANAGARI VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ 094C;DEVANAGARI VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ 094D;DEVANAGARI SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 094E;DEVANAGARI VOWEL SIGN PRISHTHAMATRA E;Mc;0;L;;;;;N;;;;;
+ 094F;DEVANAGARI VOWEL SIGN AW;Mc;0;L;;;;;N;;;;;
+ 0950;DEVANAGARI OM;Lo;0;L;;;;;N;;;;;
+ 0951;DEVANAGARI STRESS SIGN UDATTA;Mn;230;NSM;;;;;N;;;;;
+ 0952;DEVANAGARI STRESS SIGN ANUDATTA;Mn;220;NSM;;;;;N;;;;;
+ 0953;DEVANAGARI GRAVE ACCENT;Mn;230;NSM;;;;;N;;;;;
+ 0954;DEVANAGARI ACUTE ACCENT;Mn;230;NSM;;;;;N;;;;;
+ 0955;DEVANAGARI VOWEL SIGN CANDRA LONG E;Mn;0;NSM;;;;;N;;;;;
+ 0956;DEVANAGARI VOWEL SIGN UE;Mn;0;NSM;;;;;N;;;;;
+ 0957;DEVANAGARI VOWEL SIGN UUE;Mn;0;NSM;;;;;N;;;;;
+ 0958;DEVANAGARI LETTER QA;Lo;0;L;0915 093C;;;;N;;;;;
+ 0959;DEVANAGARI LETTER KHHA;Lo;0;L;0916 093C;;;;N;;;;;
+ 095A;DEVANAGARI LETTER GHHA;Lo;0;L;0917 093C;;;;N;;;;;
+ 095B;DEVANAGARI LETTER ZA;Lo;0;L;091C 093C;;;;N;;;;;
+ 095C;DEVANAGARI LETTER DDDHA;Lo;0;L;0921 093C;;;;N;;;;;
+ 095D;DEVANAGARI LETTER RHA;Lo;0;L;0922 093C;;;;N;;;;;
+ 095E;DEVANAGARI LETTER FA;Lo;0;L;092B 093C;;;;N;;;;;
+ 095F;DEVANAGARI LETTER YYA;Lo;0;L;092F 093C;;;;N;;;;;
+ 0960;DEVANAGARI LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 0961;DEVANAGARI LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 0962;DEVANAGARI VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 0963;DEVANAGARI VOWEL SIGN VOCALIC LL;Mn;0;NSM;;;;;N;;;;;
+ 0964;DEVANAGARI DANDA;Po;0;L;;;;;N;;;;;
+ 0965;DEVANAGARI DOUBLE DANDA;Po;0;L;;;;;N;;;;;
+ 0966;DEVANAGARI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 0967;DEVANAGARI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 0968;DEVANAGARI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 0969;DEVANAGARI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 096A;DEVANAGARI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 096B;DEVANAGARI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 096C;DEVANAGARI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 096D;DEVANAGARI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 096E;DEVANAGARI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 096F;DEVANAGARI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 0970;DEVANAGARI ABBREVIATION SIGN;Po;0;L;;;;;N;;;;;
+ 0971;DEVANAGARI SIGN HIGH SPACING DOT;Lm;0;L;;;;;N;;;;;
+ 0972;DEVANAGARI LETTER CANDRA A;Lo;0;L;;;;;N;;;;;
+ 0973;DEVANAGARI LETTER OE;Lo;0;L;;;;;N;;;;;
+ 0974;DEVANAGARI LETTER OOE;Lo;0;L;;;;;N;;;;;
+ 0975;DEVANAGARI LETTER AW;Lo;0;L;;;;;N;;;;;
+ 0976;DEVANAGARI LETTER UE;Lo;0;L;;;;;N;;;;;
+ 0977;DEVANAGARI LETTER UUE;Lo;0;L;;;;;N;;;;;
+ 0978;DEVANAGARI LETTER MARWARI DDA;Lo;0;L;;;;;N;;;;;
+ 0979;DEVANAGARI LETTER ZHA;Lo;0;L;;;;;N;;;;;
+ 097A;DEVANAGARI LETTER HEAVY YA;Lo;0;L;;;;;N;;;;;
+ 097B;DEVANAGARI LETTER GGA;Lo;0;L;;;;;N;;;;;
+ 097C;DEVANAGARI LETTER JJA;Lo;0;L;;;;;N;;;;;
+ 097D;DEVANAGARI LETTER GLOTTAL STOP;Lo;0;L;;;;;N;;;;;
+ 097E;DEVANAGARI LETTER DDDA;Lo;0;L;;;;;N;;;;;
+ 097F;DEVANAGARI LETTER BBA;Lo;0;L;;;;;N;;;;;
+ 0980;BENGALI ANJI;Lo;0;L;;;;;N;;;;;
+ 0981;BENGALI SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 0982;BENGALI SIGN ANUSVARA;Mc;0;L;;;;;N;;;;;
+ 0983;BENGALI SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 0985;BENGALI LETTER A;Lo;0;L;;;;;N;;;;;
+ 0986;BENGALI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 0987;BENGALI LETTER I;Lo;0;L;;;;;N;;;;;
+ 0988;BENGALI LETTER II;Lo;0;L;;;;;N;;;;;
+ 0989;BENGALI LETTER U;Lo;0;L;;;;;N;;;;;
+ 098A;BENGALI LETTER UU;Lo;0;L;;;;;N;;;;;
+ 098B;BENGALI LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 098C;BENGALI LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 098F;BENGALI LETTER E;Lo;0;L;;;;;N;;;;;
+ 0990;BENGALI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 0993;BENGALI LETTER O;Lo;0;L;;;;;N;;;;;
+ 0994;BENGALI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 0995;BENGALI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 0996;BENGALI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 0997;BENGALI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 0998;BENGALI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 0999;BENGALI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 099A;BENGALI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 099B;BENGALI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 099C;BENGALI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 099D;BENGALI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 099E;BENGALI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 099F;BENGALI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 09A0;BENGALI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 09A1;BENGALI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 09A2;BENGALI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 09A3;BENGALI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 09A4;BENGALI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 09A5;BENGALI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 09A6;BENGALI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 09A7;BENGALI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 09A8;BENGALI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 09AA;BENGALI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 09AB;BENGALI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 09AC;BENGALI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 09AD;BENGALI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 09AE;BENGALI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 09AF;BENGALI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 09B0;BENGALI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 09B2;BENGALI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 09B6;BENGALI LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 09B7;BENGALI LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 09B8;BENGALI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 09B9;BENGALI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 09BC;BENGALI SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 09BD;BENGALI SIGN AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 09BE;BENGALI VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 09BF;BENGALI VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 09C0;BENGALI VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 09C1;BENGALI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 09C2;BENGALI VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 09C3;BENGALI VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 09C4;BENGALI VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 09C7;BENGALI VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 09C8;BENGALI VOWEL SIGN AI;Mc;0;L;;;;;N;;;;;
+ 09CB;BENGALI VOWEL SIGN O;Mc;0;L;09C7 09BE;;;;N;;;;;
+ 09CC;BENGALI VOWEL SIGN AU;Mc;0;L;09C7 09D7;;;;N;;;;;
+ 09CD;BENGALI SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 09CE;BENGALI LETTER KHANDA TA;Lo;0;L;;;;;N;;;;;
+ 09D7;BENGALI AU LENGTH MARK;Mc;0;L;;;;;N;;;;;
+ 09DC;BENGALI LETTER RRA;Lo;0;L;09A1 09BC;;;;N;;;;;
+ 09DD;BENGALI LETTER RHA;Lo;0;L;09A2 09BC;;;;N;;;;;
+ 09DF;BENGALI LETTER YYA;Lo;0;L;09AF 09BC;;;;N;;;;;
+ 09E0;BENGALI LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 09E1;BENGALI LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 09E2;BENGALI VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 09E3;BENGALI VOWEL SIGN VOCALIC LL;Mn;0;NSM;;;;;N;;;;;
+ 09E6;BENGALI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 09E7;BENGALI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 09E8;BENGALI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 09E9;BENGALI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 09EA;BENGALI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 09EB;BENGALI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 09EC;BENGALI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 09ED;BENGALI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 09EE;BENGALI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 09EF;BENGALI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 09F0;BENGALI LETTER RA WITH MIDDLE DIAGONAL;Lo;0;L;;;;;N;;;;;
+ 09F1;BENGALI LETTER RA WITH LOWER DIAGONAL;Lo;0;L;;;;;N;BENGALI LETTER VA WITH LOWER DIAGONAL;;;;
+ 09F2;BENGALI RUPEE MARK;Sc;0;ET;;;;;N;;;;;
+ 09F3;BENGALI RUPEE SIGN;Sc;0;ET;;;;;N;;;;;
+ 09F4;BENGALI CURRENCY NUMERATOR ONE;No;0;L;;;;1/16;N;;;;;
+ 09F5;BENGALI CURRENCY NUMERATOR TWO;No;0;L;;;;1/8;N;;;;;
+ 09F6;BENGALI CURRENCY NUMERATOR THREE;No;0;L;;;;3/16;N;;;;;
+ 09F7;BENGALI CURRENCY NUMERATOR FOUR;No;0;L;;;;1/4;N;;;;;
+ 09F8;BENGALI CURRENCY NUMERATOR ONE LESS THAN THE DENOMINATOR;No;0;L;;;;3/4;N;;;;;
+ 09F9;BENGALI CURRENCY DENOMINATOR SIXTEEN;No;0;L;;;;16;N;;;;;
+ 09FA;BENGALI ISSHAR;So;0;L;;;;;N;;;;;
+ 09FB;BENGALI GANDA MARK;Sc;0;ET;;;;;N;;;;;
+ 09FC;BENGALI LETTER VEDIC ANUSVARA;Lo;0;L;;;;;N;;;;;
+ 09FD;BENGALI ABBREVIATION SIGN;Po;0;L;;;;;N;;;;;
+ 09FE;BENGALI SANDHI MARK;Mn;230;NSM;;;;;N;;;;;
+ 0A01;GURMUKHI SIGN ADAK BINDI;Mn;0;NSM;;;;;N;;;;;
+ 0A02;GURMUKHI SIGN BINDI;Mn;0;NSM;;;;;N;;;;;
+ 0A03;GURMUKHI SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 0A05;GURMUKHI LETTER A;Lo;0;L;;;;;N;;;;;
+ 0A06;GURMUKHI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 0A07;GURMUKHI LETTER I;Lo;0;L;;;;;N;;;;;
+ 0A08;GURMUKHI LETTER II;Lo;0;L;;;;;N;;;;;
+ 0A09;GURMUKHI LETTER U;Lo;0;L;;;;;N;;;;;
+ 0A0A;GURMUKHI LETTER UU;Lo;0;L;;;;;N;;;;;
+ 0A0F;GURMUKHI LETTER EE;Lo;0;L;;;;;N;;;;;
+ 0A10;GURMUKHI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 0A13;GURMUKHI LETTER OO;Lo;0;L;;;;;N;;;;;
+ 0A14;GURMUKHI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 0A15;GURMUKHI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 0A16;GURMUKHI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 0A17;GURMUKHI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 0A18;GURMUKHI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 0A19;GURMUKHI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 0A1A;GURMUKHI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 0A1B;GURMUKHI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 0A1C;GURMUKHI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 0A1D;GURMUKHI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 0A1E;GURMUKHI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 0A1F;GURMUKHI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 0A20;GURMUKHI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 0A21;GURMUKHI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 0A22;GURMUKHI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 0A23;GURMUKHI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 0A24;GURMUKHI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 0A25;GURMUKHI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 0A26;GURMUKHI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 0A27;GURMUKHI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 0A28;GURMUKHI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 0A2A;GURMUKHI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 0A2B;GURMUKHI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 0A2C;GURMUKHI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 0A2D;GURMUKHI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 0A2E;GURMUKHI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 0A2F;GURMUKHI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 0A30;GURMUKHI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 0A32;GURMUKHI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 0A33;GURMUKHI LETTER LLA;Lo;0;L;0A32 0A3C;;;;N;;;;;
+ 0A35;GURMUKHI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 0A36;GURMUKHI LETTER SHA;Lo;0;L;0A38 0A3C;;;;N;;;;;
+ 0A38;GURMUKHI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 0A39;GURMUKHI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 0A3C;GURMUKHI SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 0A3E;GURMUKHI VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 0A3F;GURMUKHI VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 0A40;GURMUKHI VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 0A41;GURMUKHI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 0A42;GURMUKHI VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 0A47;GURMUKHI VOWEL SIGN EE;Mn;0;NSM;;;;;N;;;;;
+ 0A48;GURMUKHI VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 0A4B;GURMUKHI VOWEL SIGN OO;Mn;0;NSM;;;;;N;;;;;
+ 0A4C;GURMUKHI VOWEL SIGN AU;Mn;0;NSM;;;;;N;;;;;
+ 0A4D;GURMUKHI SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 0A51;GURMUKHI SIGN UDAAT;Mn;0;NSM;;;;;N;;;;;
+ 0A59;GURMUKHI LETTER KHHA;Lo;0;L;0A16 0A3C;;;;N;;;;;
+ 0A5A;GURMUKHI LETTER GHHA;Lo;0;L;0A17 0A3C;;;;N;;;;;
+ 0A5B;GURMUKHI LETTER ZA;Lo;0;L;0A1C 0A3C;;;;N;;;;;
+ 0A5C;GURMUKHI LETTER RRA;Lo;0;L;;;;;N;;;;;
+ 0A5E;GURMUKHI LETTER FA;Lo;0;L;0A2B 0A3C;;;;N;;;;;
+ 0A66;GURMUKHI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 0A67;GURMUKHI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 0A68;GURMUKHI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 0A69;GURMUKHI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 0A6A;GURMUKHI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 0A6B;GURMUKHI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 0A6C;GURMUKHI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 0A6D;GURMUKHI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 0A6E;GURMUKHI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 0A6F;GURMUKHI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 0A70;GURMUKHI TIPPI;Mn;0;NSM;;;;;N;;;;;
+ 0A71;GURMUKHI ADDAK;Mn;0;NSM;;;;;N;;;;;
+ 0A72;GURMUKHI IRI;Lo;0;L;;;;;N;;;;;
+ 0A73;GURMUKHI URA;Lo;0;L;;;;;N;;;;;
+ 0A74;GURMUKHI EK ONKAR;Lo;0;L;;;;;N;;;;;
+ 0A75;GURMUKHI SIGN YAKASH;Mn;0;NSM;;;;;N;;;;;
+ 0A76;GURMUKHI ABBREVIATION SIGN;Po;0;L;;;;;N;;;;;
+ 0A81;GUJARATI SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 0A82;GUJARATI SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 0A83;GUJARATI SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 0A85;GUJARATI LETTER A;Lo;0;L;;;;;N;;;;;
+ 0A86;GUJARATI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 0A87;GUJARATI LETTER I;Lo;0;L;;;;;N;;;;;
+ 0A88;GUJARATI LETTER II;Lo;0;L;;;;;N;;;;;
+ 0A89;GUJARATI LETTER U;Lo;0;L;;;;;N;;;;;
+ 0A8A;GUJARATI LETTER UU;Lo;0;L;;;;;N;;;;;
+ 0A8B;GUJARATI LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 0A8C;GUJARATI LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 0A8D;GUJARATI VOWEL CANDRA E;Lo;0;L;;;;;N;;;;;
+ 0A8F;GUJARATI LETTER E;Lo;0;L;;;;;N;;;;;
+ 0A90;GUJARATI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 0A91;GUJARATI VOWEL CANDRA O;Lo;0;L;;;;;N;;;;;
+ 0A93;GUJARATI LETTER O;Lo;0;L;;;;;N;;;;;
+ 0A94;GUJARATI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 0A95;GUJARATI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 0A96;GUJARATI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 0A97;GUJARATI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 0A98;GUJARATI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 0A99;GUJARATI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 0A9A;GUJARATI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 0A9B;GUJARATI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 0A9C;GUJARATI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 0A9D;GUJARATI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 0A9E;GUJARATI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 0A9F;GUJARATI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 0AA0;GUJARATI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 0AA1;GUJARATI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 0AA2;GUJARATI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 0AA3;GUJARATI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 0AA4;GUJARATI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 0AA5;GUJARATI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 0AA6;GUJARATI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 0AA7;GUJARATI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 0AA8;GUJARATI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 0AAA;GUJARATI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 0AAB;GUJARATI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 0AAC;GUJARATI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 0AAD;GUJARATI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 0AAE;GUJARATI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 0AAF;GUJARATI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 0AB0;GUJARATI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 0AB2;GUJARATI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 0AB3;GUJARATI LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 0AB5;GUJARATI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 0AB6;GUJARATI LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 0AB7;GUJARATI LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 0AB8;GUJARATI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 0AB9;GUJARATI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 0ABC;GUJARATI SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 0ABD;GUJARATI SIGN AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 0ABE;GUJARATI VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 0ABF;GUJARATI VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 0AC0;GUJARATI VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 0AC1;GUJARATI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 0AC2;GUJARATI VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 0AC3;GUJARATI VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 0AC4;GUJARATI VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 0AC5;GUJARATI VOWEL SIGN CANDRA E;Mn;0;NSM;;;;;N;;;;;
+ 0AC7;GUJARATI VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 0AC8;GUJARATI VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 0AC9;GUJARATI VOWEL SIGN CANDRA O;Mc;0;L;;;;;N;;;;;
+ 0ACB;GUJARATI VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ 0ACC;GUJARATI VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ 0ACD;GUJARATI SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 0AD0;GUJARATI OM;Lo;0;L;;;;;N;;;;;
+ 0AE0;GUJARATI LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 0AE1;GUJARATI LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 0AE2;GUJARATI VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 0AE3;GUJARATI VOWEL SIGN VOCALIC LL;Mn;0;NSM;;;;;N;;;;;
+ 0AE6;GUJARATI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 0AE7;GUJARATI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 0AE8;GUJARATI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 0AE9;GUJARATI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 0AEA;GUJARATI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 0AEB;GUJARATI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 0AEC;GUJARATI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 0AED;GUJARATI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 0AEE;GUJARATI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 0AEF;GUJARATI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 0AF0;GUJARATI ABBREVIATION SIGN;Po;0;L;;;;;N;;;;;
+ 0AF1;GUJARATI RUPEE SIGN;Sc;0;ET;;;;;N;;;;;
+ 0AF9;GUJARATI LETTER ZHA;Lo;0;L;;;;;N;;;;;
+ 0AFA;GUJARATI SIGN SUKUN;Mn;0;NSM;;;;;N;;;;;
+ 0AFB;GUJARATI SIGN SHADDA;Mn;0;NSM;;;;;N;;;;;
+ 0AFC;GUJARATI SIGN MADDAH;Mn;0;NSM;;;;;N;;;;;
+ 0AFD;GUJARATI SIGN THREE-DOT NUKTA ABOVE;Mn;0;NSM;;;;;N;;;;;
+ 0AFE;GUJARATI SIGN CIRCLE NUKTA ABOVE;Mn;0;NSM;;;;;N;;;;;
+ 0AFF;GUJARATI SIGN TWO-CIRCLE NUKTA ABOVE;Mn;0;NSM;;;;;N;;;;;
+ 0B01;ORIYA SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 0B02;ORIYA SIGN ANUSVARA;Mc;0;L;;;;;N;;;;;
+ 0B03;ORIYA SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 0B05;ORIYA LETTER A;Lo;0;L;;;;;N;;;;;
+ 0B06;ORIYA LETTER AA;Lo;0;L;;;;;N;;;;;
+ 0B07;ORIYA LETTER I;Lo;0;L;;;;;N;;;;;
+ 0B08;ORIYA LETTER II;Lo;0;L;;;;;N;;;;;
+ 0B09;ORIYA LETTER U;Lo;0;L;;;;;N;;;;;
+ 0B0A;ORIYA LETTER UU;Lo;0;L;;;;;N;;;;;
+ 0B0B;ORIYA LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 0B0C;ORIYA LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 0B0F;ORIYA LETTER E;Lo;0;L;;;;;N;;;;;
+ 0B10;ORIYA LETTER AI;Lo;0;L;;;;;N;;;;;
+ 0B13;ORIYA LETTER O;Lo;0;L;;;;;N;;;;;
+ 0B14;ORIYA LETTER AU;Lo;0;L;;;;;N;;;;;
+ 0B15;ORIYA LETTER KA;Lo;0;L;;;;;N;;;;;
+ 0B16;ORIYA LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 0B17;ORIYA LETTER GA;Lo;0;L;;;;;N;;;;;
+ 0B18;ORIYA LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 0B19;ORIYA LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 0B1A;ORIYA LETTER CA;Lo;0;L;;;;;N;;;;;
+ 0B1B;ORIYA LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 0B1C;ORIYA LETTER JA;Lo;0;L;;;;;N;;;;;
+ 0B1D;ORIYA LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 0B1E;ORIYA LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 0B1F;ORIYA LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 0B20;ORIYA LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 0B21;ORIYA LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 0B22;ORIYA LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 0B23;ORIYA LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 0B24;ORIYA LETTER TA;Lo;0;L;;;;;N;;;;;
+ 0B25;ORIYA LETTER THA;Lo;0;L;;;;;N;;;;;
+ 0B26;ORIYA LETTER DA;Lo;0;L;;;;;N;;;;;
+ 0B27;ORIYA LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 0B28;ORIYA LETTER NA;Lo;0;L;;;;;N;;;;;
+ 0B2A;ORIYA LETTER PA;Lo;0;L;;;;;N;;;;;
+ 0B2B;ORIYA LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 0B2C;ORIYA LETTER BA;Lo;0;L;;;;;N;;;;;
+ 0B2D;ORIYA LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 0B2E;ORIYA LETTER MA;Lo;0;L;;;;;N;;;;;
+ 0B2F;ORIYA LETTER YA;Lo;0;L;;;;;N;;;;;
+ 0B30;ORIYA LETTER RA;Lo;0;L;;;;;N;;;;;
+ 0B32;ORIYA LETTER LA;Lo;0;L;;;;;N;;;;;
+ 0B33;ORIYA LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 0B35;ORIYA LETTER VA;Lo;0;L;;;;;N;;;;;
+ 0B36;ORIYA LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 0B37;ORIYA LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 0B38;ORIYA LETTER SA;Lo;0;L;;;;;N;;;;;
+ 0B39;ORIYA LETTER HA;Lo;0;L;;;;;N;;;;;
+ 0B3C;ORIYA SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 0B3D;ORIYA SIGN AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 0B3E;ORIYA VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 0B3F;ORIYA VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 0B40;ORIYA VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 0B41;ORIYA VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 0B42;ORIYA VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 0B43;ORIYA VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 0B44;ORIYA VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 0B47;ORIYA VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 0B48;ORIYA VOWEL SIGN AI;Mc;0;L;0B47 0B56;;;;N;;;;;
+ 0B4B;ORIYA VOWEL SIGN O;Mc;0;L;0B47 0B3E;;;;N;;;;;
+ 0B4C;ORIYA VOWEL SIGN AU;Mc;0;L;0B47 0B57;;;;N;;;;;
+ 0B4D;ORIYA SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 0B56;ORIYA AI LENGTH MARK;Mn;0;NSM;;;;;N;;;;;
+ 0B57;ORIYA AU LENGTH MARK;Mc;0;L;;;;;N;;;;;
+ 0B5C;ORIYA LETTER RRA;Lo;0;L;0B21 0B3C;;;;N;;;;;
+ 0B5D;ORIYA LETTER RHA;Lo;0;L;0B22 0B3C;;;;N;;;;;
+ 0B5F;ORIYA LETTER YYA;Lo;0;L;;;;;N;;;;;
+ 0B60;ORIYA LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 0B61;ORIYA LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 0B62;ORIYA VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 0B63;ORIYA VOWEL SIGN VOCALIC LL;Mn;0;NSM;;;;;N;;;;;
+ 0B66;ORIYA DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 0B67;ORIYA DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 0B68;ORIYA DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 0B69;ORIYA DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 0B6A;ORIYA DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 0B6B;ORIYA DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 0B6C;ORIYA DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 0B6D;ORIYA DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 0B6E;ORIYA DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 0B6F;ORIYA DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 0B70;ORIYA ISSHAR;So;0;L;;;;;N;;;;;
+ 0B71;ORIYA LETTER WA;Lo;0;L;;;;;N;;;;;
+ 0B72;ORIYA FRACTION ONE QUARTER;No;0;L;;;;1/4;N;;;;;
+ 0B73;ORIYA FRACTION ONE HALF;No;0;L;;;;1/2;N;;;;;
+ 0B74;ORIYA FRACTION THREE QUARTERS;No;0;L;;;;3/4;N;;;;;
+ 0B75;ORIYA FRACTION ONE SIXTEENTH;No;0;L;;;;1/16;N;;;;;
+ 0B76;ORIYA FRACTION ONE EIGHTH;No;0;L;;;;1/8;N;;;;;
+ 0B77;ORIYA FRACTION THREE SIXTEENTHS;No;0;L;;;;3/16;N;;;;;
+ 0B82;TAMIL SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 0B83;TAMIL SIGN VISARGA;Lo;0;L;;;;;N;;;;;
+ 0B85;TAMIL LETTER A;Lo;0;L;;;;;N;;;;;
+ 0B86;TAMIL LETTER AA;Lo;0;L;;;;;N;;;;;
+ 0B87;TAMIL LETTER I;Lo;0;L;;;;;N;;;;;
+ 0B88;TAMIL LETTER II;Lo;0;L;;;;;N;;;;;
+ 0B89;TAMIL LETTER U;Lo;0;L;;;;;N;;;;;
+ 0B8A;TAMIL LETTER UU;Lo;0;L;;;;;N;;;;;
+ 0B8E;TAMIL LETTER E;Lo;0;L;;;;;N;;;;;
+ 0B8F;TAMIL LETTER EE;Lo;0;L;;;;;N;;;;;
+ 0B90;TAMIL LETTER AI;Lo;0;L;;;;;N;;;;;
+ 0B92;TAMIL LETTER O;Lo;0;L;;;;;N;;;;;
+ 0B93;TAMIL LETTER OO;Lo;0;L;;;;;N;;;;;
+ 0B94;TAMIL LETTER AU;Lo;0;L;0B92 0BD7;;;;N;;;;;
+ 0B95;TAMIL LETTER KA;Lo;0;L;;;;;N;;;;;
+ 0B99;TAMIL LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 0B9A;TAMIL LETTER CA;Lo;0;L;;;;;N;;;;;
+ 0B9C;TAMIL LETTER JA;Lo;0;L;;;;;N;;;;;
+ 0B9E;TAMIL LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 0B9F;TAMIL LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 0BA3;TAMIL LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 0BA4;TAMIL LETTER TA;Lo;0;L;;;;;N;;;;;
+ 0BA8;TAMIL LETTER NA;Lo;0;L;;;;;N;;;;;
+ 0BA9;TAMIL LETTER NNNA;Lo;0;L;;;;;N;;;;;
+ 0BAA;TAMIL LETTER PA;Lo;0;L;;;;;N;;;;;
+ 0BAE;TAMIL LETTER MA;Lo;0;L;;;;;N;;;;;
+ 0BAF;TAMIL LETTER YA;Lo;0;L;;;;;N;;;;;
+ 0BB0;TAMIL LETTER RA;Lo;0;L;;;;;N;;;;;
+ 0BB1;TAMIL LETTER RRA;Lo;0;L;;;;;N;;;;;
+ 0BB2;TAMIL LETTER LA;Lo;0;L;;;;;N;;;;;
+ 0BB3;TAMIL LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 0BB4;TAMIL LETTER LLLA;Lo;0;L;;;;;N;;;;;
+ 0BB5;TAMIL LETTER VA;Lo;0;L;;;;;N;;;;;
+ 0BB6;TAMIL LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 0BB7;TAMIL LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 0BB8;TAMIL LETTER SA;Lo;0;L;;;;;N;;;;;
+ 0BB9;TAMIL LETTER HA;Lo;0;L;;;;;N;;;;;
+ 0BBE;TAMIL VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 0BBF;TAMIL VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 0BC0;TAMIL VOWEL SIGN II;Mn;0;NSM;;;;;N;;;;;
+ 0BC1;TAMIL VOWEL SIGN U;Mc;0;L;;;;;N;;;;;
+ 0BC2;TAMIL VOWEL SIGN UU;Mc;0;L;;;;;N;;;;;
+ 0BC6;TAMIL VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 0BC7;TAMIL VOWEL SIGN EE;Mc;0;L;;;;;N;;;;;
+ 0BC8;TAMIL VOWEL SIGN AI;Mc;0;L;;;;;N;;;;;
+ 0BCA;TAMIL VOWEL SIGN O;Mc;0;L;0BC6 0BBE;;;;N;;;;;
+ 0BCB;TAMIL VOWEL SIGN OO;Mc;0;L;0BC7 0BBE;;;;N;;;;;
+ 0BCC;TAMIL VOWEL SIGN AU;Mc;0;L;0BC6 0BD7;;;;N;;;;;
+ 0BCD;TAMIL SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 0BD0;TAMIL OM;Lo;0;L;;;;;N;;;;;
+ 0BD7;TAMIL AU LENGTH MARK;Mc;0;L;;;;;N;;;;;
+ 0BE6;TAMIL DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 0BE7;TAMIL DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 0BE8;TAMIL DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 0BE9;TAMIL DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 0BEA;TAMIL DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 0BEB;TAMIL DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 0BEC;TAMIL DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 0BED;TAMIL DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 0BEE;TAMIL DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 0BEF;TAMIL DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 0BF0;TAMIL NUMBER TEN;No;0;L;;;;10;N;;;;;
+ 0BF1;TAMIL NUMBER ONE HUNDRED;No;0;L;;;;100;N;;;;;
+ 0BF2;TAMIL NUMBER ONE THOUSAND;No;0;L;;;;1000;N;;;;;
+ 0BF3;TAMIL DAY SIGN;So;0;ON;;;;;N;;;;;
+ 0BF4;TAMIL MONTH SIGN;So;0;ON;;;;;N;;;;;
+ 0BF5;TAMIL YEAR SIGN;So;0;ON;;;;;N;;;;;
+ 0BF6;TAMIL DEBIT SIGN;So;0;ON;;;;;N;;;;;
+ 0BF7;TAMIL CREDIT SIGN;So;0;ON;;;;;N;;;;;
+ 0BF8;TAMIL AS ABOVE SIGN;So;0;ON;;;;;N;;;;;
+ 0BF9;TAMIL RUPEE SIGN;Sc;0;ET;;;;;N;;;;;
+ 0BFA;TAMIL NUMBER SIGN;So;0;ON;;;;;N;;;;;
+ 0C00;TELUGU SIGN COMBINING CANDRABINDU ABOVE;Mn;0;NSM;;;;;N;;;;;
+ 0C01;TELUGU SIGN CANDRABINDU;Mc;0;L;;;;;N;;;;;
+ 0C02;TELUGU SIGN ANUSVARA;Mc;0;L;;;;;N;;;;;
+ 0C03;TELUGU SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 0C04;TELUGU SIGN COMBINING ANUSVARA ABOVE;Mn;0;NSM;;;;;N;;;;;
+ 0C05;TELUGU LETTER A;Lo;0;L;;;;;N;;;;;
+ 0C06;TELUGU LETTER AA;Lo;0;L;;;;;N;;;;;
+ 0C07;TELUGU LETTER I;Lo;0;L;;;;;N;;;;;
+ 0C08;TELUGU LETTER II;Lo;0;L;;;;;N;;;;;
+ 0C09;TELUGU LETTER U;Lo;0;L;;;;;N;;;;;
+ 0C0A;TELUGU LETTER UU;Lo;0;L;;;;;N;;;;;
+ 0C0B;TELUGU LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 0C0C;TELUGU LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 0C0E;TELUGU LETTER E;Lo;0;L;;;;;N;;;;;
+ 0C0F;TELUGU LETTER EE;Lo;0;L;;;;;N;;;;;
+ 0C10;TELUGU LETTER AI;Lo;0;L;;;;;N;;;;;
+ 0C12;TELUGU LETTER O;Lo;0;L;;;;;N;;;;;
+ 0C13;TELUGU LETTER OO;Lo;0;L;;;;;N;;;;;
+ 0C14;TELUGU LETTER AU;Lo;0;L;;;;;N;;;;;
+ 0C15;TELUGU LETTER KA;Lo;0;L;;;;;N;;;;;
+ 0C16;TELUGU LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 0C17;TELUGU LETTER GA;Lo;0;L;;;;;N;;;;;
+ 0C18;TELUGU LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 0C19;TELUGU LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 0C1A;TELUGU LETTER CA;Lo;0;L;;;;;N;;;;;
+ 0C1B;TELUGU LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 0C1C;TELUGU LETTER JA;Lo;0;L;;;;;N;;;;;
+ 0C1D;TELUGU LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 0C1E;TELUGU LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 0C1F;TELUGU LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 0C20;TELUGU LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 0C21;TELUGU LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 0C22;TELUGU LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 0C23;TELUGU LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 0C24;TELUGU LETTER TA;Lo;0;L;;;;;N;;;;;
+ 0C25;TELUGU LETTER THA;Lo;0;L;;;;;N;;;;;
+ 0C26;TELUGU LETTER DA;Lo;0;L;;;;;N;;;;;
+ 0C27;TELUGU LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 0C28;TELUGU LETTER NA;Lo;0;L;;;;;N;;;;;
+ 0C2A;TELUGU LETTER PA;Lo;0;L;;;;;N;;;;;
+ 0C2B;TELUGU LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 0C2C;TELUGU LETTER BA;Lo;0;L;;;;;N;;;;;
+ 0C2D;TELUGU LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 0C2E;TELUGU LETTER MA;Lo;0;L;;;;;N;;;;;
+ 0C2F;TELUGU LETTER YA;Lo;0;L;;;;;N;;;;;
+ 0C30;TELUGU LETTER RA;Lo;0;L;;;;;N;;;;;
+ 0C31;TELUGU LETTER RRA;Lo;0;L;;;;;N;;;;;
+ 0C32;TELUGU LETTER LA;Lo;0;L;;;;;N;;;;;
+ 0C33;TELUGU LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 0C34;TELUGU LETTER LLLA;Lo;0;L;;;;;N;;;;;
+ 0C35;TELUGU LETTER VA;Lo;0;L;;;;;N;;;;;
+ 0C36;TELUGU LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 0C37;TELUGU LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 0C38;TELUGU LETTER SA;Lo;0;L;;;;;N;;;;;
+ 0C39;TELUGU LETTER HA;Lo;0;L;;;;;N;;;;;
+ 0C3D;TELUGU SIGN AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 0C3E;TELUGU VOWEL SIGN AA;Mn;0;NSM;;;;;N;;;;;
+ 0C3F;TELUGU VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 0C40;TELUGU VOWEL SIGN II;Mn;0;NSM;;;;;N;;;;;
+ 0C41;TELUGU VOWEL SIGN U;Mc;0;L;;;;;N;;;;;
+ 0C42;TELUGU VOWEL SIGN UU;Mc;0;L;;;;;N;;;;;
+ 0C43;TELUGU VOWEL SIGN VOCALIC R;Mc;0;L;;;;;N;;;;;
+ 0C44;TELUGU VOWEL SIGN VOCALIC RR;Mc;0;L;;;;;N;;;;;
+ 0C46;TELUGU VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 0C47;TELUGU VOWEL SIGN EE;Mn;0;NSM;;;;;N;;;;;
+ 0C48;TELUGU VOWEL SIGN AI;Mn;0;NSM;0C46 0C56;;;;N;;;;;
+ 0C4A;TELUGU VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 0C4B;TELUGU VOWEL SIGN OO;Mn;0;NSM;;;;;N;;;;;
+ 0C4C;TELUGU VOWEL SIGN AU;Mn;0;NSM;;;;;N;;;;;
+ 0C4D;TELUGU SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 0C55;TELUGU LENGTH MARK;Mn;84;NSM;;;;;N;;;;;
+ 0C56;TELUGU AI LENGTH MARK;Mn;91;NSM;;;;;N;;;;;
+ 0C58;TELUGU LETTER TSA;Lo;0;L;;;;;N;;;;;
+ 0C59;TELUGU LETTER DZA;Lo;0;L;;;;;N;;;;;
+ 0C5A;TELUGU LETTER RRRA;Lo;0;L;;;;;N;;;;;
+ 0C60;TELUGU LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 0C61;TELUGU LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 0C62;TELUGU VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 0C63;TELUGU VOWEL SIGN VOCALIC LL;Mn;0;NSM;;;;;N;;;;;
+ 0C66;TELUGU DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 0C67;TELUGU DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 0C68;TELUGU DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 0C69;TELUGU DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 0C6A;TELUGU DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 0C6B;TELUGU DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 0C6C;TELUGU DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 0C6D;TELUGU DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 0C6E;TELUGU DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 0C6F;TELUGU DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 0C77;TELUGU SIGN SIDDHAM;Po;0;L;;;;;N;;;;;
+ 0C78;TELUGU FRACTION DIGIT ZERO FOR ODD POWERS OF FOUR;No;0;ON;;;;0;N;;;;;
+ 0C79;TELUGU FRACTION DIGIT ONE FOR ODD POWERS OF FOUR;No;0;ON;;;;1;N;;;;;
+ 0C7A;TELUGU FRACTION DIGIT TWO FOR ODD POWERS OF FOUR;No;0;ON;;;;2;N;;;;;
+ 0C7B;TELUGU FRACTION DIGIT THREE FOR ODD POWERS OF FOUR;No;0;ON;;;;3;N;;;;;
+ 0C7C;TELUGU FRACTION DIGIT ONE FOR EVEN POWERS OF FOUR;No;0;ON;;;;1;N;;;;;
+ 0C7D;TELUGU FRACTION DIGIT TWO FOR EVEN POWERS OF FOUR;No;0;ON;;;;2;N;;;;;
+ 0C7E;TELUGU FRACTION DIGIT THREE FOR EVEN POWERS OF FOUR;No;0;ON;;;;3;N;;;;;
+ 0C7F;TELUGU SIGN TUUMU;So;0;L;;;;;N;;;;;
+ 0C80;KANNADA SIGN SPACING CANDRABINDU;Lo;0;L;;;;;N;;;;;
+ 0C81;KANNADA SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 0C82;KANNADA SIGN ANUSVARA;Mc;0;L;;;;;N;;;;;
+ 0C83;KANNADA SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 0C84;KANNADA SIGN SIDDHAM;Po;0;L;;;;;N;;;;;
+ 0C85;KANNADA LETTER A;Lo;0;L;;;;;N;;;;;
+ 0C86;KANNADA LETTER AA;Lo;0;L;;;;;N;;;;;
+ 0C87;KANNADA LETTER I;Lo;0;L;;;;;N;;;;;
+ 0C88;KANNADA LETTER II;Lo;0;L;;;;;N;;;;;
+ 0C89;KANNADA LETTER U;Lo;0;L;;;;;N;;;;;
+ 0C8A;KANNADA LETTER UU;Lo;0;L;;;;;N;;;;;
+ 0C8B;KANNADA LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 0C8C;KANNADA LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 0C8E;KANNADA LETTER E;Lo;0;L;;;;;N;;;;;
+ 0C8F;KANNADA LETTER EE;Lo;0;L;;;;;N;;;;;
+ 0C90;KANNADA LETTER AI;Lo;0;L;;;;;N;;;;;
+ 0C92;KANNADA LETTER O;Lo;0;L;;;;;N;;;;;
+ 0C93;KANNADA LETTER OO;Lo;0;L;;;;;N;;;;;
+ 0C94;KANNADA LETTER AU;Lo;0;L;;;;;N;;;;;
+ 0C95;KANNADA LETTER KA;Lo;0;L;;;;;N;;;;;
+ 0C96;KANNADA LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 0C97;KANNADA LETTER GA;Lo;0;L;;;;;N;;;;;
+ 0C98;KANNADA LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 0C99;KANNADA LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 0C9A;KANNADA LETTER CA;Lo;0;L;;;;;N;;;;;
+ 0C9B;KANNADA LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 0C9C;KANNADA LETTER JA;Lo;0;L;;;;;N;;;;;
+ 0C9D;KANNADA LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 0C9E;KANNADA LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 0C9F;KANNADA LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 0CA0;KANNADA LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 0CA1;KANNADA LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 0CA2;KANNADA LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 0CA3;KANNADA LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 0CA4;KANNADA LETTER TA;Lo;0;L;;;;;N;;;;;
+ 0CA5;KANNADA LETTER THA;Lo;0;L;;;;;N;;;;;
+ 0CA6;KANNADA LETTER DA;Lo;0;L;;;;;N;;;;;
+ 0CA7;KANNADA LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 0CA8;KANNADA LETTER NA;Lo;0;L;;;;;N;;;;;
+ 0CAA;KANNADA LETTER PA;Lo;0;L;;;;;N;;;;;
+ 0CAB;KANNADA LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 0CAC;KANNADA LETTER BA;Lo;0;L;;;;;N;;;;;
+ 0CAD;KANNADA LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 0CAE;KANNADA LETTER MA;Lo;0;L;;;;;N;;;;;
+ 0CAF;KANNADA LETTER YA;Lo;0;L;;;;;N;;;;;
+ 0CB0;KANNADA LETTER RA;Lo;0;L;;;;;N;;;;;
+ 0CB1;KANNADA LETTER RRA;Lo;0;L;;;;;N;;;;;
+ 0CB2;KANNADA LETTER LA;Lo;0;L;;;;;N;;;;;
+ 0CB3;KANNADA LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 0CB5;KANNADA LETTER VA;Lo;0;L;;;;;N;;;;;
+ 0CB6;KANNADA LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 0CB7;KANNADA LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 0CB8;KANNADA LETTER SA;Lo;0;L;;;;;N;;;;;
+ 0CB9;KANNADA LETTER HA;Lo;0;L;;;;;N;;;;;
+ 0CBC;KANNADA SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 0CBD;KANNADA SIGN AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 0CBE;KANNADA VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 0CBF;KANNADA VOWEL SIGN I;Mn;0;L;;;;;N;;;;;
+ 0CC0;KANNADA VOWEL SIGN II;Mc;0;L;0CBF 0CD5;;;;N;;;;;
+ 0CC1;KANNADA VOWEL SIGN U;Mc;0;L;;;;;N;;;;;
+ 0CC2;KANNADA VOWEL SIGN UU;Mc;0;L;;;;;N;;;;;
+ 0CC3;KANNADA VOWEL SIGN VOCALIC R;Mc;0;L;;;;;N;;;;;
+ 0CC4;KANNADA VOWEL SIGN VOCALIC RR;Mc;0;L;;;;;N;;;;;
+ 0CC6;KANNADA VOWEL SIGN E;Mn;0;L;;;;;N;;;;;
+ 0CC7;KANNADA VOWEL SIGN EE;Mc;0;L;0CC6 0CD5;;;;N;;;;;
+ 0CC8;KANNADA VOWEL SIGN AI;Mc;0;L;0CC6 0CD6;;;;N;;;;;
+ 0CCA;KANNADA VOWEL SIGN O;Mc;0;L;0CC6 0CC2;;;;N;;;;;
+ 0CCB;KANNADA VOWEL SIGN OO;Mc;0;L;0CCA 0CD5;;;;N;;;;;
+ 0CCC;KANNADA VOWEL SIGN AU;Mn;0;NSM;;;;;N;;;;;
+ 0CCD;KANNADA SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 0CD5;KANNADA LENGTH MARK;Mc;0;L;;;;;N;;;;;
+ 0CD6;KANNADA AI LENGTH MARK;Mc;0;L;;;;;N;;;;;
+ 0CDE;KANNADA LETTER FA;Lo;0;L;;;;;N;;;;;
+ 0CE0;KANNADA LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 0CE1;KANNADA LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 0CE2;KANNADA VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 0CE3;KANNADA VOWEL SIGN VOCALIC LL;Mn;0;NSM;;;;;N;;;;;
+ 0CE6;KANNADA DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 0CE7;KANNADA DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 0CE8;KANNADA DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 0CE9;KANNADA DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 0CEA;KANNADA DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 0CEB;KANNADA DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 0CEC;KANNADA DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 0CED;KANNADA DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 0CEE;KANNADA DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 0CEF;KANNADA DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 0CF1;KANNADA SIGN JIHVAMULIYA;Lo;0;L;;;;;N;;;;;
+ 0CF2;KANNADA SIGN UPADHMANIYA;Lo;0;L;;;;;N;;;;;
+ 0D00;MALAYALAM SIGN COMBINING ANUSVARA ABOVE;Mn;0;NSM;;;;;N;;;;;
+ 0D01;MALAYALAM SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 0D02;MALAYALAM SIGN ANUSVARA;Mc;0;L;;;;;N;;;;;
+ 0D03;MALAYALAM SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 0D05;MALAYALAM LETTER A;Lo;0;L;;;;;N;;;;;
+ 0D06;MALAYALAM LETTER AA;Lo;0;L;;;;;N;;;;;
+ 0D07;MALAYALAM LETTER I;Lo;0;L;;;;;N;;;;;
+ 0D08;MALAYALAM LETTER II;Lo;0;L;;;;;N;;;;;
+ 0D09;MALAYALAM LETTER U;Lo;0;L;;;;;N;;;;;
+ 0D0A;MALAYALAM LETTER UU;Lo;0;L;;;;;N;;;;;
+ 0D0B;MALAYALAM LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 0D0C;MALAYALAM LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 0D0E;MALAYALAM LETTER E;Lo;0;L;;;;;N;;;;;
+ 0D0F;MALAYALAM LETTER EE;Lo;0;L;;;;;N;;;;;
+ 0D10;MALAYALAM LETTER AI;Lo;0;L;;;;;N;;;;;
+ 0D12;MALAYALAM LETTER O;Lo;0;L;;;;;N;;;;;
+ 0D13;MALAYALAM LETTER OO;Lo;0;L;;;;;N;;;;;
+ 0D14;MALAYALAM LETTER AU;Lo;0;L;;;;;N;;;;;
+ 0D15;MALAYALAM LETTER KA;Lo;0;L;;;;;N;;;;;
+ 0D16;MALAYALAM LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 0D17;MALAYALAM LETTER GA;Lo;0;L;;;;;N;;;;;
+ 0D18;MALAYALAM LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 0D19;MALAYALAM LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 0D1A;MALAYALAM LETTER CA;Lo;0;L;;;;;N;;;;;
+ 0D1B;MALAYALAM LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 0D1C;MALAYALAM LETTER JA;Lo;0;L;;;;;N;;;;;
+ 0D1D;MALAYALAM LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 0D1E;MALAYALAM LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 0D1F;MALAYALAM LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 0D20;MALAYALAM LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 0D21;MALAYALAM LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 0D22;MALAYALAM LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 0D23;MALAYALAM LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 0D24;MALAYALAM LETTER TA;Lo;0;L;;;;;N;;;;;
+ 0D25;MALAYALAM LETTER THA;Lo;0;L;;;;;N;;;;;
+ 0D26;MALAYALAM LETTER DA;Lo;0;L;;;;;N;;;;;
+ 0D27;MALAYALAM LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 0D28;MALAYALAM LETTER NA;Lo;0;L;;;;;N;;;;;
+ 0D29;MALAYALAM LETTER NNNA;Lo;0;L;;;;;N;;;;;
+ 0D2A;MALAYALAM LETTER PA;Lo;0;L;;;;;N;;;;;
+ 0D2B;MALAYALAM LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 0D2C;MALAYALAM LETTER BA;Lo;0;L;;;;;N;;;;;
+ 0D2D;MALAYALAM LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 0D2E;MALAYALAM LETTER MA;Lo;0;L;;;;;N;;;;;
+ 0D2F;MALAYALAM LETTER YA;Lo;0;L;;;;;N;;;;;
+ 0D30;MALAYALAM LETTER RA;Lo;0;L;;;;;N;;;;;
+ 0D31;MALAYALAM LETTER RRA;Lo;0;L;;;;;N;;;;;
+ 0D32;MALAYALAM LETTER LA;Lo;0;L;;;;;N;;;;;
+ 0D33;MALAYALAM LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 0D34;MALAYALAM LETTER LLLA;Lo;0;L;;;;;N;;;;;
+ 0D35;MALAYALAM LETTER VA;Lo;0;L;;;;;N;;;;;
+ 0D36;MALAYALAM LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 0D37;MALAYALAM LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 0D38;MALAYALAM LETTER SA;Lo;0;L;;;;;N;;;;;
+ 0D39;MALAYALAM LETTER HA;Lo;0;L;;;;;N;;;;;
+ 0D3A;MALAYALAM LETTER TTTA;Lo;0;L;;;;;N;;;;;
+ 0D3B;MALAYALAM SIGN VERTICAL BAR VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 0D3C;MALAYALAM SIGN CIRCULAR VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 0D3D;MALAYALAM SIGN AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 0D3E;MALAYALAM VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 0D3F;MALAYALAM VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 0D40;MALAYALAM VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 0D41;MALAYALAM VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 0D42;MALAYALAM VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 0D43;MALAYALAM VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 0D44;MALAYALAM VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 0D46;MALAYALAM VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 0D47;MALAYALAM VOWEL SIGN EE;Mc;0;L;;;;;N;;;;;
+ 0D48;MALAYALAM VOWEL SIGN AI;Mc;0;L;;;;;N;;;;;
+ 0D4A;MALAYALAM VOWEL SIGN O;Mc;0;L;0D46 0D3E;;;;N;;;;;
+ 0D4B;MALAYALAM VOWEL SIGN OO;Mc;0;L;0D47 0D3E;;;;N;;;;;
+ 0D4C;MALAYALAM VOWEL SIGN AU;Mc;0;L;0D46 0D57;;;;N;;;;;
+ 0D4D;MALAYALAM SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 0D4E;MALAYALAM LETTER DOT REPH;Lo;0;L;;;;;N;;;;;
+ 0D4F;MALAYALAM SIGN PARA;So;0;L;;;;;N;;;;;
+ 0D54;MALAYALAM LETTER CHILLU M;Lo;0;L;;;;;N;;;;;
+ 0D55;MALAYALAM LETTER CHILLU Y;Lo;0;L;;;;;N;;;;;
+ 0D56;MALAYALAM LETTER CHILLU LLL;Lo;0;L;;;;;N;;;;;
+ 0D57;MALAYALAM AU LENGTH MARK;Mc;0;L;;;;;N;;;;;
+ 0D58;MALAYALAM FRACTION ONE ONE-HUNDRED-AND-SIXTIETH;No;0;L;;;;1/160;N;;;;;
+ 0D59;MALAYALAM FRACTION ONE FORTIETH;No;0;L;;;;1/40;N;;;;;
+ 0D5A;MALAYALAM FRACTION THREE EIGHTIETHS;No;0;L;;;;3/80;N;;;;;
+ 0D5B;MALAYALAM FRACTION ONE TWENTIETH;No;0;L;;;;1/20;N;;;;;
+ 0D5C;MALAYALAM FRACTION ONE TENTH;No;0;L;;;;1/10;N;;;;;
+ 0D5D;MALAYALAM FRACTION THREE TWENTIETHS;No;0;L;;;;3/20;N;;;;;
+ 0D5E;MALAYALAM FRACTION ONE FIFTH;No;0;L;;;;1/5;N;;;;;
+ 0D5F;MALAYALAM LETTER ARCHAIC II;Lo;0;L;;;;;N;;;;;
+ 0D60;MALAYALAM LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 0D61;MALAYALAM LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 0D62;MALAYALAM VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 0D63;MALAYALAM VOWEL SIGN VOCALIC LL;Mn;0;NSM;;;;;N;;;;;
+ 0D66;MALAYALAM DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 0D67;MALAYALAM DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 0D68;MALAYALAM DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 0D69;MALAYALAM DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 0D6A;MALAYALAM DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 0D6B;MALAYALAM DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 0D6C;MALAYALAM DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 0D6D;MALAYALAM DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 0D6E;MALAYALAM DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 0D6F;MALAYALAM DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 0D70;MALAYALAM NUMBER TEN;No;0;L;;;;10;N;;;;;
+ 0D71;MALAYALAM NUMBER ONE HUNDRED;No;0;L;;;;100;N;;;;;
+ 0D72;MALAYALAM NUMBER ONE THOUSAND;No;0;L;;;;1000;N;;;;;
+ 0D73;MALAYALAM FRACTION ONE QUARTER;No;0;L;;;;1/4;N;;;;;
+ 0D74;MALAYALAM FRACTION ONE HALF;No;0;L;;;;1/2;N;;;;;
+ 0D75;MALAYALAM FRACTION THREE QUARTERS;No;0;L;;;;3/4;N;;;;;
+ 0D76;MALAYALAM FRACTION ONE SIXTEENTH;No;0;L;;;;1/16;N;;;;;
+ 0D77;MALAYALAM FRACTION ONE EIGHTH;No;0;L;;;;1/8;N;;;;;
+ 0D78;MALAYALAM FRACTION THREE SIXTEENTHS;No;0;L;;;;3/16;N;;;;;
+ 0D79;MALAYALAM DATE MARK;So;0;L;;;;;N;;;;;
+ 0D7A;MALAYALAM LETTER CHILLU NN;Lo;0;L;;;;;N;;;;;
+ 0D7B;MALAYALAM LETTER CHILLU N;Lo;0;L;;;;;N;;;;;
+ 0D7C;MALAYALAM LETTER CHILLU RR;Lo;0;L;;;;;N;;;;;
+ 0D7D;MALAYALAM LETTER CHILLU L;Lo;0;L;;;;;N;;;;;
+ 0D7E;MALAYALAM LETTER CHILLU LL;Lo;0;L;;;;;N;;;;;
+ 0D7F;MALAYALAM LETTER CHILLU K;Lo;0;L;;;;;N;;;;;
+ 0D82;SINHALA SIGN ANUSVARAYA;Mc;0;L;;;;;N;;;;;
+ 0D83;SINHALA SIGN VISARGAYA;Mc;0;L;;;;;N;;;;;
+ 0D85;SINHALA LETTER AYANNA;Lo;0;L;;;;;N;;;;;
+ 0D86;SINHALA LETTER AAYANNA;Lo;0;L;;;;;N;;;;;
+ 0D87;SINHALA LETTER AEYANNA;Lo;0;L;;;;;N;;;;;
+ 0D88;SINHALA LETTER AEEYANNA;Lo;0;L;;;;;N;;;;;
+ 0D89;SINHALA LETTER IYANNA;Lo;0;L;;;;;N;;;;;
+ 0D8A;SINHALA LETTER IIYANNA;Lo;0;L;;;;;N;;;;;
+ 0D8B;SINHALA LETTER UYANNA;Lo;0;L;;;;;N;;;;;
+ 0D8C;SINHALA LETTER UUYANNA;Lo;0;L;;;;;N;;;;;
+ 0D8D;SINHALA LETTER IRUYANNA;Lo;0;L;;;;;N;;;;;
+ 0D8E;SINHALA LETTER IRUUYANNA;Lo;0;L;;;;;N;;;;;
+ 0D8F;SINHALA LETTER ILUYANNA;Lo;0;L;;;;;N;;;;;
+ 0D90;SINHALA LETTER ILUUYANNA;Lo;0;L;;;;;N;;;;;
+ 0D91;SINHALA LETTER EYANNA;Lo;0;L;;;;;N;;;;;
+ 0D92;SINHALA LETTER EEYANNA;Lo;0;L;;;;;N;;;;;
+ 0D93;SINHALA LETTER AIYANNA;Lo;0;L;;;;;N;;;;;
+ 0D94;SINHALA LETTER OYANNA;Lo;0;L;;;;;N;;;;;
+ 0D95;SINHALA LETTER OOYANNA;Lo;0;L;;;;;N;;;;;
+ 0D96;SINHALA LETTER AUYANNA;Lo;0;L;;;;;N;;;;;
+ 0D9A;SINHALA LETTER ALPAPRAANA KAYANNA;Lo;0;L;;;;;N;;;;;
+ 0D9B;SINHALA LETTER MAHAAPRAANA KAYANNA;Lo;0;L;;;;;N;;;;;
+ 0D9C;SINHALA LETTER ALPAPRAANA GAYANNA;Lo;0;L;;;;;N;;;;;
+ 0D9D;SINHALA LETTER MAHAAPRAANA GAYANNA;Lo;0;L;;;;;N;;;;;
+ 0D9E;SINHALA LETTER KANTAJA NAASIKYAYA;Lo;0;L;;;;;N;;;;;
+ 0D9F;SINHALA LETTER SANYAKA GAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DA0;SINHALA LETTER ALPAPRAANA CAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DA1;SINHALA LETTER MAHAAPRAANA CAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DA2;SINHALA LETTER ALPAPRAANA JAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DA3;SINHALA LETTER MAHAAPRAANA JAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DA4;SINHALA LETTER TAALUJA NAASIKYAYA;Lo;0;L;;;;;N;;;;;
+ 0DA5;SINHALA LETTER TAALUJA SANYOOGA NAAKSIKYAYA;Lo;0;L;;;;;N;;;;;
+ 0DA6;SINHALA LETTER SANYAKA JAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DA7;SINHALA LETTER ALPAPRAANA TTAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DA8;SINHALA LETTER MAHAAPRAANA TTAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DA9;SINHALA LETTER ALPAPRAANA DDAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DAA;SINHALA LETTER MAHAAPRAANA DDAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DAB;SINHALA LETTER MUURDHAJA NAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DAC;SINHALA LETTER SANYAKA DDAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DAD;SINHALA LETTER ALPAPRAANA TAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DAE;SINHALA LETTER MAHAAPRAANA TAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DAF;SINHALA LETTER ALPAPRAANA DAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DB0;SINHALA LETTER MAHAAPRAANA DAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DB1;SINHALA LETTER DANTAJA NAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DB3;SINHALA LETTER SANYAKA DAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DB4;SINHALA LETTER ALPAPRAANA PAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DB5;SINHALA LETTER MAHAAPRAANA PAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DB6;SINHALA LETTER ALPAPRAANA BAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DB7;SINHALA LETTER MAHAAPRAANA BAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DB8;SINHALA LETTER MAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DB9;SINHALA LETTER AMBA BAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DBA;SINHALA LETTER YAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DBB;SINHALA LETTER RAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DBD;SINHALA LETTER DANTAJA LAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DC0;SINHALA LETTER VAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DC1;SINHALA LETTER TAALUJA SAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DC2;SINHALA LETTER MUURDHAJA SAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DC3;SINHALA LETTER DANTAJA SAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DC4;SINHALA LETTER HAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DC5;SINHALA LETTER MUURDHAJA LAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DC6;SINHALA LETTER FAYANNA;Lo;0;L;;;;;N;;;;;
+ 0DCA;SINHALA SIGN AL-LAKUNA;Mn;9;NSM;;;;;N;;;;;
+ 0DCF;SINHALA VOWEL SIGN AELA-PILLA;Mc;0;L;;;;;N;;;;;
+ 0DD0;SINHALA VOWEL SIGN KETTI AEDA-PILLA;Mc;0;L;;;;;N;;;;;
+ 0DD1;SINHALA VOWEL SIGN DIGA AEDA-PILLA;Mc;0;L;;;;;N;;;;;
+ 0DD2;SINHALA VOWEL SIGN KETTI IS-PILLA;Mn;0;NSM;;;;;N;;;;;
+ 0DD3;SINHALA VOWEL SIGN DIGA IS-PILLA;Mn;0;NSM;;;;;N;;;;;
+ 0DD4;SINHALA VOWEL SIGN KETTI PAA-PILLA;Mn;0;NSM;;;;;N;;;;;
+ 0DD6;SINHALA VOWEL SIGN DIGA PAA-PILLA;Mn;0;NSM;;;;;N;;;;;
+ 0DD8;SINHALA VOWEL SIGN GAETTA-PILLA;Mc;0;L;;;;;N;;;;;
+ 0DD9;SINHALA VOWEL SIGN KOMBUVA;Mc;0;L;;;;;N;;;;;
+ 0DDA;SINHALA VOWEL SIGN DIGA KOMBUVA;Mc;0;L;0DD9 0DCA;;;;N;;;;;
+ 0DDB;SINHALA VOWEL SIGN KOMBU DEKA;Mc;0;L;;;;;N;;;;;
+ 0DDC;SINHALA VOWEL SIGN KOMBUVA HAA AELA-PILLA;Mc;0;L;0DD9 0DCF;;;;N;;;;;
+ 0DDD;SINHALA VOWEL SIGN KOMBUVA HAA DIGA AELA-PILLA;Mc;0;L;0DDC 0DCA;;;;N;;;;;
+ 0DDE;SINHALA VOWEL SIGN KOMBUVA HAA GAYANUKITTA;Mc;0;L;0DD9 0DDF;;;;N;;;;;
+ 0DDF;SINHALA VOWEL SIGN GAYANUKITTA;Mc;0;L;;;;;N;;;;;
+ 0DE6;SINHALA LITH DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 0DE7;SINHALA LITH DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 0DE8;SINHALA LITH DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 0DE9;SINHALA LITH DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 0DEA;SINHALA LITH DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 0DEB;SINHALA LITH DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 0DEC;SINHALA LITH DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 0DED;SINHALA LITH DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 0DEE;SINHALA LITH DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 0DEF;SINHALA LITH DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 0DF2;SINHALA VOWEL SIGN DIGA GAETTA-PILLA;Mc;0;L;;;;;N;;;;;
+ 0DF3;SINHALA VOWEL SIGN DIGA GAYANUKITTA;Mc;0;L;;;;;N;;;;;
+ 0DF4;SINHALA PUNCTUATION KUNDDALIYA;Po;0;L;;;;;N;;;;;
+ 0E01;THAI CHARACTER KO KAI;Lo;0;L;;;;;N;THAI LETTER KO KAI;;;;
+ 0E02;THAI CHARACTER KHO KHAI;Lo;0;L;;;;;N;THAI LETTER KHO KHAI;;;;
+ 0E03;THAI CHARACTER KHO KHUAT;Lo;0;L;;;;;N;THAI LETTER KHO KHUAT;;;;
+ 0E04;THAI CHARACTER KHO KHWAI;Lo;0;L;;;;;N;THAI LETTER KHO KHWAI;;;;
+ 0E05;THAI CHARACTER KHO KHON;Lo;0;L;;;;;N;THAI LETTER KHO KHON;;;;
+ 0E06;THAI CHARACTER KHO RAKHANG;Lo;0;L;;;;;N;THAI LETTER KHO RAKHANG;;;;
+ 0E07;THAI CHARACTER NGO NGU;Lo;0;L;;;;;N;THAI LETTER NGO NGU;;;;
+ 0E08;THAI CHARACTER CHO CHAN;Lo;0;L;;;;;N;THAI LETTER CHO CHAN;;;;
+ 0E09;THAI CHARACTER CHO CHING;Lo;0;L;;;;;N;THAI LETTER CHO CHING;;;;
+ 0E0A;THAI CHARACTER CHO CHANG;Lo;0;L;;;;;N;THAI LETTER CHO CHANG;;;;
+ 0E0B;THAI CHARACTER SO SO;Lo;0;L;;;;;N;THAI LETTER SO SO;;;;
+ 0E0C;THAI CHARACTER CHO CHOE;Lo;0;L;;;;;N;THAI LETTER CHO CHOE;;;;
+ 0E0D;THAI CHARACTER YO YING;Lo;0;L;;;;;N;THAI LETTER YO YING;;;;
+ 0E0E;THAI CHARACTER DO CHADA;Lo;0;L;;;;;N;THAI LETTER DO CHADA;;;;
+ 0E0F;THAI CHARACTER TO PATAK;Lo;0;L;;;;;N;THAI LETTER TO PATAK;;;;
+ 0E10;THAI CHARACTER THO THAN;Lo;0;L;;;;;N;THAI LETTER THO THAN;;;;
+ 0E11;THAI CHARACTER THO NANGMONTHO;Lo;0;L;;;;;N;THAI LETTER THO NANGMONTHO;;;;
+ 0E12;THAI CHARACTER THO PHUTHAO;Lo;0;L;;;;;N;THAI LETTER THO PHUTHAO;;;;
+ 0E13;THAI CHARACTER NO NEN;Lo;0;L;;;;;N;THAI LETTER NO NEN;;;;
+ 0E14;THAI CHARACTER DO DEK;Lo;0;L;;;;;N;THAI LETTER DO DEK;;;;
+ 0E15;THAI CHARACTER TO TAO;Lo;0;L;;;;;N;THAI LETTER TO TAO;;;;
+ 0E16;THAI CHARACTER THO THUNG;Lo;0;L;;;;;N;THAI LETTER THO THUNG;;;;
+ 0E17;THAI CHARACTER THO THAHAN;Lo;0;L;;;;;N;THAI LETTER THO THAHAN;;;;
+ 0E18;THAI CHARACTER THO THONG;Lo;0;L;;;;;N;THAI LETTER THO THONG;;;;
+ 0E19;THAI CHARACTER NO NU;Lo;0;L;;;;;N;THAI LETTER NO NU;;;;
+ 0E1A;THAI CHARACTER BO BAIMAI;Lo;0;L;;;;;N;THAI LETTER BO BAIMAI;;;;
+ 0E1B;THAI CHARACTER PO PLA;Lo;0;L;;;;;N;THAI LETTER PO PLA;;;;
+ 0E1C;THAI CHARACTER PHO PHUNG;Lo;0;L;;;;;N;THAI LETTER PHO PHUNG;;;;
+ 0E1D;THAI CHARACTER FO FA;Lo;0;L;;;;;N;THAI LETTER FO FA;;;;
+ 0E1E;THAI CHARACTER PHO PHAN;Lo;0;L;;;;;N;THAI LETTER PHO PHAN;;;;
+ 0E1F;THAI CHARACTER FO FAN;Lo;0;L;;;;;N;THAI LETTER FO FAN;;;;
+ 0E20;THAI CHARACTER PHO SAMPHAO;Lo;0;L;;;;;N;THAI LETTER PHO SAMPHAO;;;;
+ 0E21;THAI CHARACTER MO MA;Lo;0;L;;;;;N;THAI LETTER MO MA;;;;
+ 0E22;THAI CHARACTER YO YAK;Lo;0;L;;;;;N;THAI LETTER YO YAK;;;;
+ 0E23;THAI CHARACTER RO RUA;Lo;0;L;;;;;N;THAI LETTER RO RUA;;;;
+ 0E24;THAI CHARACTER RU;Lo;0;L;;;;;N;THAI LETTER RU;;;;
+ 0E25;THAI CHARACTER LO LING;Lo;0;L;;;;;N;THAI LETTER LO LING;;;;
+ 0E26;THAI CHARACTER LU;Lo;0;L;;;;;N;THAI LETTER LU;;;;
+ 0E27;THAI CHARACTER WO WAEN;Lo;0;L;;;;;N;THAI LETTER WO WAEN;;;;
+ 0E28;THAI CHARACTER SO SALA;Lo;0;L;;;;;N;THAI LETTER SO SALA;;;;
+ 0E29;THAI CHARACTER SO RUSI;Lo;0;L;;;;;N;THAI LETTER SO RUSI;;;;
+ 0E2A;THAI CHARACTER SO SUA;Lo;0;L;;;;;N;THAI LETTER SO SUA;;;;
+ 0E2B;THAI CHARACTER HO HIP;Lo;0;L;;;;;N;THAI LETTER HO HIP;;;;
+ 0E2C;THAI CHARACTER LO CHULA;Lo;0;L;;;;;N;THAI LETTER LO CHULA;;;;
+ 0E2D;THAI CHARACTER O ANG;Lo;0;L;;;;;N;THAI LETTER O ANG;;;;
+ 0E2E;THAI CHARACTER HO NOKHUK;Lo;0;L;;;;;N;THAI LETTER HO NOK HUK;;;;
+ 0E2F;THAI CHARACTER PAIYANNOI;Lo;0;L;;;;;N;THAI PAI YAN NOI;;;;
+ 0E30;THAI CHARACTER SARA A;Lo;0;L;;;;;N;THAI VOWEL SIGN SARA A;;;;
+ 0E31;THAI CHARACTER MAI HAN-AKAT;Mn;0;NSM;;;;;N;THAI VOWEL SIGN MAI HAN-AKAT;;;;
+ 0E32;THAI CHARACTER SARA AA;Lo;0;L;;;;;N;THAI VOWEL SIGN SARA AA;;;;
+ 0E33;THAI CHARACTER SARA AM;Lo;0;L;<compat> 0E4D 0E32;;;;N;THAI VOWEL SIGN SARA AM;;;;
+ 0E34;THAI CHARACTER SARA I;Mn;0;NSM;;;;;N;THAI VOWEL SIGN SARA I;;;;
+ 0E35;THAI CHARACTER SARA II;Mn;0;NSM;;;;;N;THAI VOWEL SIGN SARA II;;;;
+ 0E36;THAI CHARACTER SARA UE;Mn;0;NSM;;;;;N;THAI VOWEL SIGN SARA UE;;;;
+ 0E37;THAI CHARACTER SARA UEE;Mn;0;NSM;;;;;N;THAI VOWEL SIGN SARA UEE;;;;
+ 0E38;THAI CHARACTER SARA U;Mn;103;NSM;;;;;N;THAI VOWEL SIGN SARA U;;;;
+ 0E39;THAI CHARACTER SARA UU;Mn;103;NSM;;;;;N;THAI VOWEL SIGN SARA UU;;;;
+ 0E3A;THAI CHARACTER PHINTHU;Mn;9;NSM;;;;;N;THAI VOWEL SIGN PHINTHU;;;;
+ 0E3F;THAI CURRENCY SYMBOL BAHT;Sc;0;ET;;;;;N;THAI BAHT SIGN;;;;
+ 0E40;THAI CHARACTER SARA E;Lo;0;L;;;;;N;THAI VOWEL SIGN SARA E;;;;
+ 0E41;THAI CHARACTER SARA AE;Lo;0;L;;;;;N;THAI VOWEL SIGN SARA AE;;;;
+ 0E42;THAI CHARACTER SARA O;Lo;0;L;;;;;N;THAI VOWEL SIGN SARA O;;;;
+ 0E43;THAI CHARACTER SARA AI MAIMUAN;Lo;0;L;;;;;N;THAI VOWEL SIGN SARA MAI MUAN;;;;
+ 0E44;THAI CHARACTER SARA AI MAIMALAI;Lo;0;L;;;;;N;THAI VOWEL SIGN SARA MAI MALAI;;;;
+ 0E45;THAI CHARACTER LAKKHANGYAO;Lo;0;L;;;;;N;THAI LAK KHANG YAO;;;;
+ 0E46;THAI CHARACTER MAIYAMOK;Lm;0;L;;;;;N;THAI MAI YAMOK;;;;
+ 0E47;THAI CHARACTER MAITAIKHU;Mn;0;NSM;;;;;N;THAI VOWEL SIGN MAI TAI KHU;;;;
+ 0E48;THAI CHARACTER MAI EK;Mn;107;NSM;;;;;N;THAI TONE MAI EK;;;;
+ 0E49;THAI CHARACTER MAI THO;Mn;107;NSM;;;;;N;THAI TONE MAI THO;;;;
+ 0E4A;THAI CHARACTER MAI TRI;Mn;107;NSM;;;;;N;THAI TONE MAI TRI;;;;
+ 0E4B;THAI CHARACTER MAI CHATTAWA;Mn;107;NSM;;;;;N;THAI TONE MAI CHATTAWA;;;;
+ 0E4C;THAI CHARACTER THANTHAKHAT;Mn;0;NSM;;;;;N;THAI THANTHAKHAT;;;;
+ 0E4D;THAI CHARACTER NIKHAHIT;Mn;0;NSM;;;;;N;THAI NIKKHAHIT;;;;
+ 0E4E;THAI CHARACTER YAMAKKAN;Mn;0;NSM;;;;;N;THAI YAMAKKAN;;;;
+ 0E4F;THAI CHARACTER FONGMAN;Po;0;L;;;;;N;THAI FONGMAN;;;;
+ 0E50;THAI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 0E51;THAI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 0E52;THAI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 0E53;THAI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 0E54;THAI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 0E55;THAI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 0E56;THAI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 0E57;THAI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 0E58;THAI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 0E59;THAI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 0E5A;THAI CHARACTER ANGKHANKHU;Po;0;L;;;;;N;THAI ANGKHANKHU;;;;
+ 0E5B;THAI CHARACTER KHOMUT;Po;0;L;;;;;N;THAI KHOMUT;;;;
+ 0E81;LAO LETTER KO;Lo;0;L;;;;;N;;;;;
+ 0E82;LAO LETTER KHO SUNG;Lo;0;L;;;;;N;;;;;
+ 0E84;LAO LETTER KHO TAM;Lo;0;L;;;;;N;;;;;
+ 0E86;LAO LETTER PALI GHA;Lo;0;L;;;;;N;;;;;
+ 0E87;LAO LETTER NGO;Lo;0;L;;;;;N;;;;;
+ 0E88;LAO LETTER CO;Lo;0;L;;;;;N;;;;;
+ 0E89;LAO LETTER PALI CHA;Lo;0;L;;;;;N;;;;;
+ 0E8A;LAO LETTER SO TAM;Lo;0;L;;;;;N;;;;;
+ 0E8C;LAO LETTER PALI JHA;Lo;0;L;;;;;N;;;;;
+ 0E8D;LAO LETTER NYO;Lo;0;L;;;;;N;;;;;
+ 0E8E;LAO LETTER PALI NYA;Lo;0;L;;;;;N;;;;;
+ 0E8F;LAO LETTER PALI TTA;Lo;0;L;;;;;N;;;;;
+ 0E90;LAO LETTER PALI TTHA;Lo;0;L;;;;;N;;;;;
+ 0E91;LAO LETTER PALI DDA;Lo;0;L;;;;;N;;;;;
+ 0E92;LAO LETTER PALI DDHA;Lo;0;L;;;;;N;;;;;
+ 0E93;LAO LETTER PALI NNA;Lo;0;L;;;;;N;;;;;
+ 0E94;LAO LETTER DO;Lo;0;L;;;;;N;;;;;
+ 0E95;LAO LETTER TO;Lo;0;L;;;;;N;;;;;
+ 0E96;LAO LETTER THO SUNG;Lo;0;L;;;;;N;;;;;
+ 0E97;LAO LETTER THO TAM;Lo;0;L;;;;;N;;;;;
+ 0E98;LAO LETTER PALI DHA;Lo;0;L;;;;;N;;;;;
+ 0E99;LAO LETTER NO;Lo;0;L;;;;;N;;;;;
+ 0E9A;LAO LETTER BO;Lo;0;L;;;;;N;;;;;
+ 0E9B;LAO LETTER PO;Lo;0;L;;;;;N;;;;;
+ 0E9C;LAO LETTER PHO SUNG;Lo;0;L;;;;;N;;;;;
+ 0E9D;LAO LETTER FO TAM;Lo;0;L;;;;;N;;;;;
+ 0E9E;LAO LETTER PHO TAM;Lo;0;L;;;;;N;;;;;
+ 0E9F;LAO LETTER FO SUNG;Lo;0;L;;;;;N;;;;;
+ 0EA0;LAO LETTER PALI BHA;Lo;0;L;;;;;N;;;;;
+ 0EA1;LAO LETTER MO;Lo;0;L;;;;;N;;;;;
+ 0EA2;LAO LETTER YO;Lo;0;L;;;;;N;;;;;
+ 0EA3;LAO LETTER LO LING;Lo;0;L;;;;;N;;;;;
+ 0EA5;LAO LETTER LO LOOT;Lo;0;L;;;;;N;;;;;
+ 0EA7;LAO LETTER WO;Lo;0;L;;;;;N;;;;;
+ 0EA8;LAO LETTER SANSKRIT SHA;Lo;0;L;;;;;N;;;;;
+ 0EA9;LAO LETTER SANSKRIT SSA;Lo;0;L;;;;;N;;;;;
+ 0EAA;LAO LETTER SO SUNG;Lo;0;L;;;;;N;;;;;
+ 0EAB;LAO LETTER HO SUNG;Lo;0;L;;;;;N;;;;;
+ 0EAC;LAO LETTER PALI LLA;Lo;0;L;;;;;N;;;;;
+ 0EAD;LAO LETTER O;Lo;0;L;;;;;N;;;;;
+ 0EAE;LAO LETTER HO TAM;Lo;0;L;;;;;N;;;;;
+ 0EAF;LAO ELLIPSIS;Lo;0;L;;;;;N;;;;;
+ 0EB0;LAO VOWEL SIGN A;Lo;0;L;;;;;N;;;;;
+ 0EB1;LAO VOWEL SIGN MAI KAN;Mn;0;NSM;;;;;N;;;;;
+ 0EB2;LAO VOWEL SIGN AA;Lo;0;L;;;;;N;;;;;
+ 0EB3;LAO VOWEL SIGN AM;Lo;0;L;<compat> 0ECD 0EB2;;;;N;;;;;
+ 0EB4;LAO VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 0EB5;LAO VOWEL SIGN II;Mn;0;NSM;;;;;N;;;;;
+ 0EB6;LAO VOWEL SIGN Y;Mn;0;NSM;;;;;N;;;;;
+ 0EB7;LAO VOWEL SIGN YY;Mn;0;NSM;;;;;N;;;;;
+ 0EB8;LAO VOWEL SIGN U;Mn;118;NSM;;;;;N;;;;;
+ 0EB9;LAO VOWEL SIGN UU;Mn;118;NSM;;;;;N;;;;;
+ 0EBA;LAO SIGN PALI VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 0EBB;LAO VOWEL SIGN MAI KON;Mn;0;NSM;;;;;N;;;;;
+ 0EBC;LAO SEMIVOWEL SIGN LO;Mn;0;NSM;;;;;N;;;;;
+ 0EBD;LAO SEMIVOWEL SIGN NYO;Lo;0;L;;;;;N;;;;;
+ 0EC0;LAO VOWEL SIGN E;Lo;0;L;;;;;N;;;;;
+ 0EC1;LAO VOWEL SIGN EI;Lo;0;L;;;;;N;;;;;
+ 0EC2;LAO VOWEL SIGN O;Lo;0;L;;;;;N;;;;;
+ 0EC3;LAO VOWEL SIGN AY;Lo;0;L;;;;;N;;;;;
+ 0EC4;LAO VOWEL SIGN AI;Lo;0;L;;;;;N;;;;;
+ 0EC6;LAO KO LA;Lm;0;L;;;;;N;;;;;
+ 0EC8;LAO TONE MAI EK;Mn;122;NSM;;;;;N;;;;;
+ 0EC9;LAO TONE MAI THO;Mn;122;NSM;;;;;N;;;;;
+ 0ECA;LAO TONE MAI TI;Mn;122;NSM;;;;;N;;;;;
+ 0ECB;LAO TONE MAI CATAWA;Mn;122;NSM;;;;;N;;;;;
+ 0ECC;LAO CANCELLATION MARK;Mn;0;NSM;;;;;N;;;;;
+ 0ECD;LAO NIGGAHITA;Mn;0;NSM;;;;;N;;;;;
+ 0ED0;LAO DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 0ED1;LAO DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 0ED2;LAO DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 0ED3;LAO DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 0ED4;LAO DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 0ED5;LAO DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 0ED6;LAO DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 0ED7;LAO DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 0ED8;LAO DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 0ED9;LAO DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 0EDC;LAO HO NO;Lo;0;L;<compat> 0EAB 0E99;;;;N;;;;;
+ 0EDD;LAO HO MO;Lo;0;L;<compat> 0EAB 0EA1;;;;N;;;;;
+ 0EDE;LAO LETTER KHMU GO;Lo;0;L;;;;;N;;;;;
+ 0EDF;LAO LETTER KHMU NYO;Lo;0;L;;;;;N;;;;;
+ 0F00;TIBETAN SYLLABLE OM;Lo;0;L;;;;;N;;;;;
+ 0F01;TIBETAN MARK GTER YIG MGO TRUNCATED A;So;0;L;;;;;N;;;;;
+ 0F02;TIBETAN MARK GTER YIG MGO -UM RNAM BCAD MA;So;0;L;;;;;N;;;;;
+ 0F03;TIBETAN MARK GTER YIG MGO -UM GTER TSHEG MA;So;0;L;;;;;N;;;;;
+ 0F04;TIBETAN MARK INITIAL YIG MGO MDUN MA;Po;0;L;;;;;N;TIBETAN SINGLE ORNAMENT;;;;
+ 0F05;TIBETAN MARK CLOSING YIG MGO SGAB MA;Po;0;L;;;;;N;;;;;
+ 0F06;TIBETAN MARK CARET YIG MGO PHUR SHAD MA;Po;0;L;;;;;N;;;;;
+ 0F07;TIBETAN MARK YIG MGO TSHEG SHAD MA;Po;0;L;;;;;N;;;;;
+ 0F08;TIBETAN MARK SBRUL SHAD;Po;0;L;;;;;N;TIBETAN RGYANSHAD;;;;
+ 0F09;TIBETAN MARK BSKUR YIG MGO;Po;0;L;;;;;N;;;;;
+ 0F0A;TIBETAN MARK BKA- SHOG YIG MGO;Po;0;L;;;;;N;;;;;
+ 0F0B;TIBETAN MARK INTERSYLLABIC TSHEG;Po;0;L;;;;;N;TIBETAN TSEG;;;;
+ 0F0C;TIBETAN MARK DELIMITER TSHEG BSTAR;Po;0;L;<noBreak> 0F0B;;;;N;;;;;
+ 0F0D;TIBETAN MARK SHAD;Po;0;L;;;;;N;TIBETAN SHAD;;;;
+ 0F0E;TIBETAN MARK NYIS SHAD;Po;0;L;;;;;N;TIBETAN DOUBLE SHAD;;;;
+ 0F0F;TIBETAN MARK TSHEG SHAD;Po;0;L;;;;;N;;;;;
+ 0F10;TIBETAN MARK NYIS TSHEG SHAD;Po;0;L;;;;;N;;;;;
+ 0F11;TIBETAN MARK RIN CHEN SPUNGS SHAD;Po;0;L;;;;;N;TIBETAN RINCHANPHUNGSHAD;;;;
+ 0F12;TIBETAN MARK RGYA GRAM SHAD;Po;0;L;;;;;N;;;;;
+ 0F13;TIBETAN MARK CARET -DZUD RTAGS ME LONG CAN;So;0;L;;;;;N;;;;;
+ 0F14;TIBETAN MARK GTER TSHEG;Po;0;L;;;;;N;TIBETAN COMMA;;;;
+ 0F15;TIBETAN LOGOTYPE SIGN CHAD RTAGS;So;0;L;;;;;N;;;;;
+ 0F16;TIBETAN LOGOTYPE SIGN LHAG RTAGS;So;0;L;;;;;N;;;;;
+ 0F17;TIBETAN ASTROLOGICAL SIGN SGRA GCAN -CHAR RTAGS;So;0;L;;;;;N;;;;;
+ 0F18;TIBETAN ASTROLOGICAL SIGN -KHYUD PA;Mn;220;NSM;;;;;N;;;;;
+ 0F19;TIBETAN ASTROLOGICAL SIGN SDONG TSHUGS;Mn;220;NSM;;;;;N;;;;;
+ 0F1A;TIBETAN SIGN RDEL DKAR GCIG;So;0;L;;;;;N;;;;;
+ 0F1B;TIBETAN SIGN RDEL DKAR GNYIS;So;0;L;;;;;N;;;;;
+ 0F1C;TIBETAN SIGN RDEL DKAR GSUM;So;0;L;;;;;N;;;;;
+ 0F1D;TIBETAN SIGN RDEL NAG GCIG;So;0;L;;;;;N;;;;;
+ 0F1E;TIBETAN SIGN RDEL NAG GNYIS;So;0;L;;;;;N;;;;;
+ 0F1F;TIBETAN SIGN RDEL DKAR RDEL NAG;So;0;L;;;;;N;;;;;
+ 0F20;TIBETAN DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 0F21;TIBETAN DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 0F22;TIBETAN DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 0F23;TIBETAN DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 0F24;TIBETAN DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 0F25;TIBETAN DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 0F26;TIBETAN DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 0F27;TIBETAN DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 0F28;TIBETAN DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 0F29;TIBETAN DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 0F2A;TIBETAN DIGIT HALF ONE;No;0;L;;;;1/2;N;;;;;
+ 0F2B;TIBETAN DIGIT HALF TWO;No;0;L;;;;3/2;N;;;;;
+ 0F2C;TIBETAN DIGIT HALF THREE;No;0;L;;;;5/2;N;;;;;
+ 0F2D;TIBETAN DIGIT HALF FOUR;No;0;L;;;;7/2;N;;;;;
+ 0F2E;TIBETAN DIGIT HALF FIVE;No;0;L;;;;9/2;N;;;;;
+ 0F2F;TIBETAN DIGIT HALF SIX;No;0;L;;;;11/2;N;;;;;
+ 0F30;TIBETAN DIGIT HALF SEVEN;No;0;L;;;;13/2;N;;;;;
+ 0F31;TIBETAN DIGIT HALF EIGHT;No;0;L;;;;15/2;N;;;;;
+ 0F32;TIBETAN DIGIT HALF NINE;No;0;L;;;;17/2;N;;;;;
+ 0F33;TIBETAN DIGIT HALF ZERO;No;0;L;;;;-1/2;N;;;;;
+ 0F34;TIBETAN MARK BSDUS RTAGS;So;0;L;;;;;N;;;;;
+ 0F35;TIBETAN MARK NGAS BZUNG NYI ZLA;Mn;220;NSM;;;;;N;TIBETAN HONORIFIC UNDER RING;;;;
+ 0F36;TIBETAN MARK CARET -DZUD RTAGS BZHI MIG CAN;So;0;L;;;;;N;;;;;
+ 0F37;TIBETAN MARK NGAS BZUNG SGOR RTAGS;Mn;220;NSM;;;;;N;TIBETAN UNDER RING;;;;
+ 0F38;TIBETAN MARK CHE MGO;So;0;L;;;;;N;;;;;
+ 0F39;TIBETAN MARK TSA -PHRU;Mn;216;NSM;;;;;N;TIBETAN LENITION MARK;;;;
+ 0F3A;TIBETAN MARK GUG RTAGS GYON;Ps;0;ON;;;;;Y;;;;;
+ 0F3B;TIBETAN MARK GUG RTAGS GYAS;Pe;0;ON;;;;;Y;;;;;
+ 0F3C;TIBETAN MARK ANG KHANG GYON;Ps;0;ON;;;;;Y;TIBETAN LEFT BRACE;;;;
+ 0F3D;TIBETAN MARK ANG KHANG GYAS;Pe;0;ON;;;;;Y;TIBETAN RIGHT BRACE;;;;
+ 0F3E;TIBETAN SIGN YAR TSHES;Mc;0;L;;;;;N;;;;;
+ 0F3F;TIBETAN SIGN MAR TSHES;Mc;0;L;;;;;N;;;;;
+ 0F40;TIBETAN LETTER KA;Lo;0;L;;;;;N;;;;;
+ 0F41;TIBETAN LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 0F42;TIBETAN LETTER GA;Lo;0;L;;;;;N;;;;;
+ 0F43;TIBETAN LETTER GHA;Lo;0;L;0F42 0FB7;;;;N;;;;;
+ 0F44;TIBETAN LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 0F45;TIBETAN LETTER CA;Lo;0;L;;;;;N;;;;;
+ 0F46;TIBETAN LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 0F47;TIBETAN LETTER JA;Lo;0;L;;;;;N;;;;;
+ 0F49;TIBETAN LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 0F4A;TIBETAN LETTER TTA;Lo;0;L;;;;;N;TIBETAN LETTER REVERSED TA;;;;
+ 0F4B;TIBETAN LETTER TTHA;Lo;0;L;;;;;N;TIBETAN LETTER REVERSED THA;;;;
+ 0F4C;TIBETAN LETTER DDA;Lo;0;L;;;;;N;TIBETAN LETTER REVERSED DA;;;;
+ 0F4D;TIBETAN LETTER DDHA;Lo;0;L;0F4C 0FB7;;;;N;;;;;
+ 0F4E;TIBETAN LETTER NNA;Lo;0;L;;;;;N;TIBETAN LETTER REVERSED NA;;;;
+ 0F4F;TIBETAN LETTER TA;Lo;0;L;;;;;N;;;;;
+ 0F50;TIBETAN LETTER THA;Lo;0;L;;;;;N;;;;;
+ 0F51;TIBETAN LETTER DA;Lo;0;L;;;;;N;;;;;
+ 0F52;TIBETAN LETTER DHA;Lo;0;L;0F51 0FB7;;;;N;;;;;
+ 0F53;TIBETAN LETTER NA;Lo;0;L;;;;;N;;;;;
+ 0F54;TIBETAN LETTER PA;Lo;0;L;;;;;N;;;;;
+ 0F55;TIBETAN LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 0F56;TIBETAN LETTER BA;Lo;0;L;;;;;N;;;;;
+ 0F57;TIBETAN LETTER BHA;Lo;0;L;0F56 0FB7;;;;N;;;;;
+ 0F58;TIBETAN LETTER MA;Lo;0;L;;;;;N;;;;;
+ 0F59;TIBETAN LETTER TSA;Lo;0;L;;;;;N;;;;;
+ 0F5A;TIBETAN LETTER TSHA;Lo;0;L;;;;;N;;;;;
+ 0F5B;TIBETAN LETTER DZA;Lo;0;L;;;;;N;;;;;
+ 0F5C;TIBETAN LETTER DZHA;Lo;0;L;0F5B 0FB7;;;;N;;;;;
+ 0F5D;TIBETAN LETTER WA;Lo;0;L;;;;;N;;;;;
+ 0F5E;TIBETAN LETTER ZHA;Lo;0;L;;;;;N;;;;;
+ 0F5F;TIBETAN LETTER ZA;Lo;0;L;;;;;N;;;;;
+ 0F60;TIBETAN LETTER -A;Lo;0;L;;;;;N;TIBETAN LETTER AA;;;;
+ 0F61;TIBETAN LETTER YA;Lo;0;L;;;;;N;;;;;
+ 0F62;TIBETAN LETTER RA;Lo;0;L;;;;;N;;;;;
+ 0F63;TIBETAN LETTER LA;Lo;0;L;;;;;N;;;;;
+ 0F64;TIBETAN LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 0F65;TIBETAN LETTER SSA;Lo;0;L;;;;;N;TIBETAN LETTER REVERSED SHA;;;;
+ 0F66;TIBETAN LETTER SA;Lo;0;L;;;;;N;;;;;
+ 0F67;TIBETAN LETTER HA;Lo;0;L;;;;;N;;;;;
+ 0F68;TIBETAN LETTER A;Lo;0;L;;;;;N;;;;;
+ 0F69;TIBETAN LETTER KSSA;Lo;0;L;0F40 0FB5;;;;N;;;;;
+ 0F6A;TIBETAN LETTER FIXED-FORM RA;Lo;0;L;;;;;N;;;;;
+ 0F6B;TIBETAN LETTER KKA;Lo;0;L;;;;;N;;;;;
+ 0F6C;TIBETAN LETTER RRA;Lo;0;L;;;;;N;;;;;
+ 0F71;TIBETAN VOWEL SIGN AA;Mn;129;NSM;;;;;N;;;;;
+ 0F72;TIBETAN VOWEL SIGN I;Mn;130;NSM;;;;;N;;;;;
+ 0F73;TIBETAN VOWEL SIGN II;Mn;0;NSM;0F71 0F72;;;;N;;;;;
+ 0F74;TIBETAN VOWEL SIGN U;Mn;132;NSM;;;;;N;;;;;
+ 0F75;TIBETAN VOWEL SIGN UU;Mn;0;NSM;0F71 0F74;;;;N;;;;;
+ 0F76;TIBETAN VOWEL SIGN VOCALIC R;Mn;0;NSM;0FB2 0F80;;;;N;;;;;
+ 0F77;TIBETAN VOWEL SIGN VOCALIC RR;Mn;0;NSM;<compat> 0FB2 0F81;;;;N;;;;;
+ 0F78;TIBETAN VOWEL SIGN VOCALIC L;Mn;0;NSM;0FB3 0F80;;;;N;;;;;
+ 0F79;TIBETAN VOWEL SIGN VOCALIC LL;Mn;0;NSM;<compat> 0FB3 0F81;;;;N;;;;;
+ 0F7A;TIBETAN VOWEL SIGN E;Mn;130;NSM;;;;;N;;;;;
+ 0F7B;TIBETAN VOWEL SIGN EE;Mn;130;NSM;;;;;N;TIBETAN VOWEL SIGN AI;;;;
+ 0F7C;TIBETAN VOWEL SIGN O;Mn;130;NSM;;;;;N;;;;;
+ 0F7D;TIBETAN VOWEL SIGN OO;Mn;130;NSM;;;;;N;TIBETAN VOWEL SIGN AU;;;;
+ 0F7E;TIBETAN SIGN RJES SU NGA RO;Mn;0;NSM;;;;;N;TIBETAN ANUSVARA;;;;
+ 0F7F;TIBETAN SIGN RNAM BCAD;Mc;0;L;;;;;N;TIBETAN VISARGA;;;;
+ 0F80;TIBETAN VOWEL SIGN REVERSED I;Mn;130;NSM;;;;;N;TIBETAN VOWEL SIGN SHORT I;;;;
+ 0F81;TIBETAN VOWEL SIGN REVERSED II;Mn;0;NSM;0F71 0F80;;;;N;;;;;
+ 0F82;TIBETAN SIGN NYI ZLA NAA DA;Mn;230;NSM;;;;;N;TIBETAN CANDRABINDU WITH ORNAMENT;;;;
+ 0F83;TIBETAN SIGN SNA LDAN;Mn;230;NSM;;;;;N;TIBETAN CANDRABINDU;;;;
+ 0F84;TIBETAN MARK HALANTA;Mn;9;NSM;;;;;N;TIBETAN VIRAMA;;;;
+ 0F85;TIBETAN MARK PALUTA;Po;0;L;;;;;N;TIBETAN CHUCHENYIGE;;;;
+ 0F86;TIBETAN SIGN LCI RTAGS;Mn;230;NSM;;;;;N;;;;;
+ 0F87;TIBETAN SIGN YANG RTAGS;Mn;230;NSM;;;;;N;;;;;
+ 0F88;TIBETAN SIGN LCE TSA CAN;Lo;0;L;;;;;N;;;;;
+ 0F89;TIBETAN SIGN MCHU CAN;Lo;0;L;;;;;N;;;;;
+ 0F8A;TIBETAN SIGN GRU CAN RGYINGS;Lo;0;L;;;;;N;;;;;
+ 0F8B;TIBETAN SIGN GRU MED RGYINGS;Lo;0;L;;;;;N;;;;;
+ 0F8C;TIBETAN SIGN INVERTED MCHU CAN;Lo;0;L;;;;;N;;;;;
+ 0F8D;TIBETAN SUBJOINED SIGN LCE TSA CAN;Mn;0;NSM;;;;;N;;;;;
+ 0F8E;TIBETAN SUBJOINED SIGN MCHU CAN;Mn;0;NSM;;;;;N;;;;;
+ 0F8F;TIBETAN SUBJOINED SIGN INVERTED MCHU CAN;Mn;0;NSM;;;;;N;;;;;
+ 0F90;TIBETAN SUBJOINED LETTER KA;Mn;0;NSM;;;;;N;;;;;
+ 0F91;TIBETAN SUBJOINED LETTER KHA;Mn;0;NSM;;;;;N;;;;;
+ 0F92;TIBETAN SUBJOINED LETTER GA;Mn;0;NSM;;;;;N;;;;;
+ 0F93;TIBETAN SUBJOINED LETTER GHA;Mn;0;NSM;0F92 0FB7;;;;N;;;;;
+ 0F94;TIBETAN SUBJOINED LETTER NGA;Mn;0;NSM;;;;;N;;;;;
+ 0F95;TIBETAN SUBJOINED LETTER CA;Mn;0;NSM;;;;;N;;;;;
+ 0F96;TIBETAN SUBJOINED LETTER CHA;Mn;0;NSM;;;;;N;;;;;
+ 0F97;TIBETAN SUBJOINED LETTER JA;Mn;0;NSM;;;;;N;;;;;
+ 0F99;TIBETAN SUBJOINED LETTER NYA;Mn;0;NSM;;;;;N;;;;;
+ 0F9A;TIBETAN SUBJOINED LETTER TTA;Mn;0;NSM;;;;;N;;;;;
+ 0F9B;TIBETAN SUBJOINED LETTER TTHA;Mn;0;NSM;;;;;N;;;;;
+ 0F9C;TIBETAN SUBJOINED LETTER DDA;Mn;0;NSM;;;;;N;;;;;
+ 0F9D;TIBETAN SUBJOINED LETTER DDHA;Mn;0;NSM;0F9C 0FB7;;;;N;;;;;
+ 0F9E;TIBETAN SUBJOINED LETTER NNA;Mn;0;NSM;;;;;N;;;;;
+ 0F9F;TIBETAN SUBJOINED LETTER TA;Mn;0;NSM;;;;;N;;;;;
+ 0FA0;TIBETAN SUBJOINED LETTER THA;Mn;0;NSM;;;;;N;;;;;
+ 0FA1;TIBETAN SUBJOINED LETTER DA;Mn;0;NSM;;;;;N;;;;;
+ 0FA2;TIBETAN SUBJOINED LETTER DHA;Mn;0;NSM;0FA1 0FB7;;;;N;;;;;
+ 0FA3;TIBETAN SUBJOINED LETTER NA;Mn;0;NSM;;;;;N;;;;;
+ 0FA4;TIBETAN SUBJOINED LETTER PA;Mn;0;NSM;;;;;N;;;;;
+ 0FA5;TIBETAN SUBJOINED LETTER PHA;Mn;0;NSM;;;;;N;;;;;
+ 0FA6;TIBETAN SUBJOINED LETTER BA;Mn;0;NSM;;;;;N;;;;;
+ 0FA7;TIBETAN SUBJOINED LETTER BHA;Mn;0;NSM;0FA6 0FB7;;;;N;;;;;
+ 0FA8;TIBETAN SUBJOINED LETTER MA;Mn;0;NSM;;;;;N;;;;;
+ 0FA9;TIBETAN SUBJOINED LETTER TSA;Mn;0;NSM;;;;;N;;;;;
+ 0FAA;TIBETAN SUBJOINED LETTER TSHA;Mn;0;NSM;;;;;N;;;;;
+ 0FAB;TIBETAN SUBJOINED LETTER DZA;Mn;0;NSM;;;;;N;;;;;
+ 0FAC;TIBETAN SUBJOINED LETTER DZHA;Mn;0;NSM;0FAB 0FB7;;;;N;;;;;
+ 0FAD;TIBETAN SUBJOINED LETTER WA;Mn;0;NSM;;;;;N;;;;;
+ 0FAE;TIBETAN SUBJOINED LETTER ZHA;Mn;0;NSM;;;;;N;;;;;
+ 0FAF;TIBETAN SUBJOINED LETTER ZA;Mn;0;NSM;;;;;N;;;;;
+ 0FB0;TIBETAN SUBJOINED LETTER -A;Mn;0;NSM;;;;;N;;;;;
+ 0FB1;TIBETAN SUBJOINED LETTER YA;Mn;0;NSM;;;;;N;;;;;
+ 0FB2;TIBETAN SUBJOINED LETTER RA;Mn;0;NSM;;;;;N;;;;;
+ 0FB3;TIBETAN SUBJOINED LETTER LA;Mn;0;NSM;;;;;N;;;;;
+ 0FB4;TIBETAN SUBJOINED LETTER SHA;Mn;0;NSM;;;;;N;;;;;
+ 0FB5;TIBETAN SUBJOINED LETTER SSA;Mn;0;NSM;;;;;N;;;;;
+ 0FB6;TIBETAN SUBJOINED LETTER SA;Mn;0;NSM;;;;;N;;;;;
+ 0FB7;TIBETAN SUBJOINED LETTER HA;Mn;0;NSM;;;;;N;;;;;
+ 0FB8;TIBETAN SUBJOINED LETTER A;Mn;0;NSM;;;;;N;;;;;
+ 0FB9;TIBETAN SUBJOINED LETTER KSSA;Mn;0;NSM;0F90 0FB5;;;;N;;;;;
+ 0FBA;TIBETAN SUBJOINED LETTER FIXED-FORM WA;Mn;0;NSM;;;;;N;;;;;
+ 0FBB;TIBETAN SUBJOINED LETTER FIXED-FORM YA;Mn;0;NSM;;;;;N;;;;;
+ 0FBC;TIBETAN SUBJOINED LETTER FIXED-FORM RA;Mn;0;NSM;;;;;N;;;;;
+ 0FBE;TIBETAN KU RU KHA;So;0;L;;;;;N;;;;;
+ 0FBF;TIBETAN KU RU KHA BZHI MIG CAN;So;0;L;;;;;N;;;;;
+ 0FC0;TIBETAN CANTILLATION SIGN HEAVY BEAT;So;0;L;;;;;N;;;;;
+ 0FC1;TIBETAN CANTILLATION SIGN LIGHT BEAT;So;0;L;;;;;N;;;;;
+ 0FC2;TIBETAN CANTILLATION SIGN CANG TE-U;So;0;L;;;;;N;;;;;
+ 0FC3;TIBETAN CANTILLATION SIGN SBUB -CHAL;So;0;L;;;;;N;;;;;
+ 0FC4;TIBETAN SYMBOL DRIL BU;So;0;L;;;;;N;;;;;
+ 0FC5;TIBETAN SYMBOL RDO RJE;So;0;L;;;;;N;;;;;
+ 0FC6;TIBETAN SYMBOL PADMA GDAN;Mn;220;NSM;;;;;N;;;;;
+ 0FC7;TIBETAN SYMBOL RDO RJE RGYA GRAM;So;0;L;;;;;N;;;;;
+ 0FC8;TIBETAN SYMBOL PHUR PA;So;0;L;;;;;N;;;;;
+ 0FC9;TIBETAN SYMBOL NOR BU;So;0;L;;;;;N;;;;;
+ 0FCA;TIBETAN SYMBOL NOR BU NYIS -KHYIL;So;0;L;;;;;N;;;;;
+ 0FCB;TIBETAN SYMBOL NOR BU GSUM -KHYIL;So;0;L;;;;;N;;;;;
+ 0FCC;TIBETAN SYMBOL NOR BU BZHI -KHYIL;So;0;L;;;;;N;;;;;
+ 0FCE;TIBETAN SIGN RDEL NAG RDEL DKAR;So;0;L;;;;;N;;;;;
+ 0FCF;TIBETAN SIGN RDEL NAG GSUM;So;0;L;;;;;N;;;;;
+ 0FD0;TIBETAN MARK BSKA- SHOG GI MGO RGYAN;Po;0;L;;;;;N;;;;;
+ 0FD1;TIBETAN MARK MNYAM YIG GI MGO RGYAN;Po;0;L;;;;;N;;;;;
+ 0FD2;TIBETAN MARK NYIS TSHEG;Po;0;L;;;;;N;;;;;
+ 0FD3;TIBETAN MARK INITIAL BRDA RNYING YIG MGO MDUN MA;Po;0;L;;;;;N;;;;;
+ 0FD4;TIBETAN MARK CLOSING BRDA RNYING YIG MGO SGAB MA;Po;0;L;;;;;N;;;;;
+ 0FD5;RIGHT-FACING SVASTI SIGN;So;0;L;;;;;N;;;;;
+ 0FD6;LEFT-FACING SVASTI SIGN;So;0;L;;;;;N;;;;;
+ 0FD7;RIGHT-FACING SVASTI SIGN WITH DOTS;So;0;L;;;;;N;;;;;
+ 0FD8;LEFT-FACING SVASTI SIGN WITH DOTS;So;0;L;;;;;N;;;;;
+ 0FD9;TIBETAN MARK LEADING MCHAN RTAGS;Po;0;L;;;;;N;;;;;
+ 0FDA;TIBETAN MARK TRAILING MCHAN RTAGS;Po;0;L;;;;;N;;;;;
+ 1000;MYANMAR LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1001;MYANMAR LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 1002;MYANMAR LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1003;MYANMAR LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 1004;MYANMAR LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1005;MYANMAR LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1006;MYANMAR LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 1007;MYANMAR LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1008;MYANMAR LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 1009;MYANMAR LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 100A;MYANMAR LETTER NNYA;Lo;0;L;;;;;N;;;;;
+ 100B;MYANMAR LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 100C;MYANMAR LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 100D;MYANMAR LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 100E;MYANMAR LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 100F;MYANMAR LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 1010;MYANMAR LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1011;MYANMAR LETTER THA;Lo;0;L;;;;;N;;;;;
+ 1012;MYANMAR LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1013;MYANMAR LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 1014;MYANMAR LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1015;MYANMAR LETTER PA;Lo;0;L;;;;;N;;;;;
+ 1016;MYANMAR LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 1017;MYANMAR LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1018;MYANMAR LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 1019;MYANMAR LETTER MA;Lo;0;L;;;;;N;;;;;
+ 101A;MYANMAR LETTER YA;Lo;0;L;;;;;N;;;;;
+ 101B;MYANMAR LETTER RA;Lo;0;L;;;;;N;;;;;
+ 101C;MYANMAR LETTER LA;Lo;0;L;;;;;N;;;;;
+ 101D;MYANMAR LETTER WA;Lo;0;L;;;;;N;;;;;
+ 101E;MYANMAR LETTER SA;Lo;0;L;;;;;N;;;;;
+ 101F;MYANMAR LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1020;MYANMAR LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 1021;MYANMAR LETTER A;Lo;0;L;;;;;N;;;;;
+ 1022;MYANMAR LETTER SHAN A;Lo;0;L;;;;;N;;;;;
+ 1023;MYANMAR LETTER I;Lo;0;L;;;;;N;;;;;
+ 1024;MYANMAR LETTER II;Lo;0;L;;;;;N;;;;;
+ 1025;MYANMAR LETTER U;Lo;0;L;;;;;N;;;;;
+ 1026;MYANMAR LETTER UU;Lo;0;L;1025 102E;;;;N;;;;;
+ 1027;MYANMAR LETTER E;Lo;0;L;;;;;N;;;;;
+ 1028;MYANMAR LETTER MON E;Lo;0;L;;;;;N;;;;;
+ 1029;MYANMAR LETTER O;Lo;0;L;;;;;N;;;;;
+ 102A;MYANMAR LETTER AU;Lo;0;L;;;;;N;;;;;
+ 102B;MYANMAR VOWEL SIGN TALL AA;Mc;0;L;;;;;N;;;;;
+ 102C;MYANMAR VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 102D;MYANMAR VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 102E;MYANMAR VOWEL SIGN II;Mn;0;NSM;;;;;N;;;;;
+ 102F;MYANMAR VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 1030;MYANMAR VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 1031;MYANMAR VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 1032;MYANMAR VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 1033;MYANMAR VOWEL SIGN MON II;Mn;0;NSM;;;;;N;;;;;
+ 1034;MYANMAR VOWEL SIGN MON O;Mn;0;NSM;;;;;N;;;;;
+ 1035;MYANMAR VOWEL SIGN E ABOVE;Mn;0;NSM;;;;;N;;;;;
+ 1036;MYANMAR SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 1037;MYANMAR SIGN DOT BELOW;Mn;7;NSM;;;;;N;;;;;
+ 1038;MYANMAR SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 1039;MYANMAR SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 103A;MYANMAR SIGN ASAT;Mn;9;NSM;;;;;N;;;;;
+ 103B;MYANMAR CONSONANT SIGN MEDIAL YA;Mc;0;L;;;;;N;;;;;
+ 103C;MYANMAR CONSONANT SIGN MEDIAL RA;Mc;0;L;;;;;N;;;;;
+ 103D;MYANMAR CONSONANT SIGN MEDIAL WA;Mn;0;NSM;;;;;N;;;;;
+ 103E;MYANMAR CONSONANT SIGN MEDIAL HA;Mn;0;NSM;;;;;N;;;;;
+ 103F;MYANMAR LETTER GREAT SA;Lo;0;L;;;;;N;;;;;
+ 1040;MYANMAR DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 1041;MYANMAR DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 1042;MYANMAR DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 1043;MYANMAR DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 1044;MYANMAR DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 1045;MYANMAR DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 1046;MYANMAR DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 1047;MYANMAR DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 1048;MYANMAR DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 1049;MYANMAR DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 104A;MYANMAR SIGN LITTLE SECTION;Po;0;L;;;;;N;;;;;
+ 104B;MYANMAR SIGN SECTION;Po;0;L;;;;;N;;;;;
+ 104C;MYANMAR SYMBOL LOCATIVE;Po;0;L;;;;;N;;;;;
+ 104D;MYANMAR SYMBOL COMPLETED;Po;0;L;;;;;N;;;;;
+ 104E;MYANMAR SYMBOL AFOREMENTIONED;Po;0;L;;;;;N;;;;;
+ 104F;MYANMAR SYMBOL GENITIVE;Po;0;L;;;;;N;;;;;
+ 1050;MYANMAR LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 1051;MYANMAR LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 1052;MYANMAR LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 1053;MYANMAR LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 1054;MYANMAR LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 1055;MYANMAR LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 1056;MYANMAR VOWEL SIGN VOCALIC R;Mc;0;L;;;;;N;;;;;
+ 1057;MYANMAR VOWEL SIGN VOCALIC RR;Mc;0;L;;;;;N;;;;;
+ 1058;MYANMAR VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 1059;MYANMAR VOWEL SIGN VOCALIC LL;Mn;0;NSM;;;;;N;;;;;
+ 105A;MYANMAR LETTER MON NGA;Lo;0;L;;;;;N;;;;;
+ 105B;MYANMAR LETTER MON JHA;Lo;0;L;;;;;N;;;;;
+ 105C;MYANMAR LETTER MON BBA;Lo;0;L;;;;;N;;;;;
+ 105D;MYANMAR LETTER MON BBE;Lo;0;L;;;;;N;;;;;
+ 105E;MYANMAR CONSONANT SIGN MON MEDIAL NA;Mn;0;NSM;;;;;N;;;;;
+ 105F;MYANMAR CONSONANT SIGN MON MEDIAL MA;Mn;0;NSM;;;;;N;;;;;
+ 1060;MYANMAR CONSONANT SIGN MON MEDIAL LA;Mn;0;NSM;;;;;N;;;;;
+ 1061;MYANMAR LETTER SGAW KAREN SHA;Lo;0;L;;;;;N;;;;;
+ 1062;MYANMAR VOWEL SIGN SGAW KAREN EU;Mc;0;L;;;;;N;;;;;
+ 1063;MYANMAR TONE MARK SGAW KAREN HATHI;Mc;0;L;;;;;N;;;;;
+ 1064;MYANMAR TONE MARK SGAW KAREN KE PHO;Mc;0;L;;;;;N;;;;;
+ 1065;MYANMAR LETTER WESTERN PWO KAREN THA;Lo;0;L;;;;;N;;;;;
+ 1066;MYANMAR LETTER WESTERN PWO KAREN PWA;Lo;0;L;;;;;N;;;;;
+ 1067;MYANMAR VOWEL SIGN WESTERN PWO KAREN EU;Mc;0;L;;;;;N;;;;;
+ 1068;MYANMAR VOWEL SIGN WESTERN PWO KAREN UE;Mc;0;L;;;;;N;;;;;
+ 1069;MYANMAR SIGN WESTERN PWO KAREN TONE-1;Mc;0;L;;;;;N;;;;;
+ 106A;MYANMAR SIGN WESTERN PWO KAREN TONE-2;Mc;0;L;;;;;N;;;;;
+ 106B;MYANMAR SIGN WESTERN PWO KAREN TONE-3;Mc;0;L;;;;;N;;;;;
+ 106C;MYANMAR SIGN WESTERN PWO KAREN TONE-4;Mc;0;L;;;;;N;;;;;
+ 106D;MYANMAR SIGN WESTERN PWO KAREN TONE-5;Mc;0;L;;;;;N;;;;;
+ 106E;MYANMAR LETTER EASTERN PWO KAREN NNA;Lo;0;L;;;;;N;;;;;
+ 106F;MYANMAR LETTER EASTERN PWO KAREN YWA;Lo;0;L;;;;;N;;;;;
+ 1070;MYANMAR LETTER EASTERN PWO KAREN GHWA;Lo;0;L;;;;;N;;;;;
+ 1071;MYANMAR VOWEL SIGN GEBA KAREN I;Mn;0;NSM;;;;;N;;;;;
+ 1072;MYANMAR VOWEL SIGN KAYAH OE;Mn;0;NSM;;;;;N;;;;;
+ 1073;MYANMAR VOWEL SIGN KAYAH U;Mn;0;NSM;;;;;N;;;;;
+ 1074;MYANMAR VOWEL SIGN KAYAH EE;Mn;0;NSM;;;;;N;;;;;
+ 1075;MYANMAR LETTER SHAN KA;Lo;0;L;;;;;N;;;;;
+ 1076;MYANMAR LETTER SHAN KHA;Lo;0;L;;;;;N;;;;;
+ 1077;MYANMAR LETTER SHAN GA;Lo;0;L;;;;;N;;;;;
+ 1078;MYANMAR LETTER SHAN CA;Lo;0;L;;;;;N;;;;;
+ 1079;MYANMAR LETTER SHAN ZA;Lo;0;L;;;;;N;;;;;
+ 107A;MYANMAR LETTER SHAN NYA;Lo;0;L;;;;;N;;;;;
+ 107B;MYANMAR LETTER SHAN DA;Lo;0;L;;;;;N;;;;;
+ 107C;MYANMAR LETTER SHAN NA;Lo;0;L;;;;;N;;;;;
+ 107D;MYANMAR LETTER SHAN PHA;Lo;0;L;;;;;N;;;;;
+ 107E;MYANMAR LETTER SHAN FA;Lo;0;L;;;;;N;;;;;
+ 107F;MYANMAR LETTER SHAN BA;Lo;0;L;;;;;N;;;;;
+ 1080;MYANMAR LETTER SHAN THA;Lo;0;L;;;;;N;;;;;
+ 1081;MYANMAR LETTER SHAN HA;Lo;0;L;;;;;N;;;;;
+ 1082;MYANMAR CONSONANT SIGN SHAN MEDIAL WA;Mn;0;NSM;;;;;N;;;;;
+ 1083;MYANMAR VOWEL SIGN SHAN AA;Mc;0;L;;;;;N;;;;;
+ 1084;MYANMAR VOWEL SIGN SHAN E;Mc;0;L;;;;;N;;;;;
+ 1085;MYANMAR VOWEL SIGN SHAN E ABOVE;Mn;0;NSM;;;;;N;;;;;
+ 1086;MYANMAR VOWEL SIGN SHAN FINAL Y;Mn;0;NSM;;;;;N;;;;;
+ 1087;MYANMAR SIGN SHAN TONE-2;Mc;0;L;;;;;N;;;;;
+ 1088;MYANMAR SIGN SHAN TONE-3;Mc;0;L;;;;;N;;;;;
+ 1089;MYANMAR SIGN SHAN TONE-5;Mc;0;L;;;;;N;;;;;
+ 108A;MYANMAR SIGN SHAN TONE-6;Mc;0;L;;;;;N;;;;;
+ 108B;MYANMAR SIGN SHAN COUNCIL TONE-2;Mc;0;L;;;;;N;;;;;
+ 108C;MYANMAR SIGN SHAN COUNCIL TONE-3;Mc;0;L;;;;;N;;;;;
+ 108D;MYANMAR SIGN SHAN COUNCIL EMPHATIC TONE;Mn;220;NSM;;;;;N;;;;;
+ 108E;MYANMAR LETTER RUMAI PALAUNG FA;Lo;0;L;;;;;N;;;;;
+ 108F;MYANMAR SIGN RUMAI PALAUNG TONE-5;Mc;0;L;;;;;N;;;;;
+ 1090;MYANMAR SHAN DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 1091;MYANMAR SHAN DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 1092;MYANMAR SHAN DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 1093;MYANMAR SHAN DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 1094;MYANMAR SHAN DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 1095;MYANMAR SHAN DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 1096;MYANMAR SHAN DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 1097;MYANMAR SHAN DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 1098;MYANMAR SHAN DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 1099;MYANMAR SHAN DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 109A;MYANMAR SIGN KHAMTI TONE-1;Mc;0;L;;;;;N;;;;;
+ 109B;MYANMAR SIGN KHAMTI TONE-3;Mc;0;L;;;;;N;;;;;
+ 109C;MYANMAR VOWEL SIGN AITON A;Mc;0;L;;;;;N;;;;;
+ 109D;MYANMAR VOWEL SIGN AITON AI;Mn;0;NSM;;;;;N;;;;;
+ 109E;MYANMAR SYMBOL SHAN ONE;So;0;L;;;;;N;;;;;
+ 109F;MYANMAR SYMBOL SHAN EXCLAMATION;So;0;L;;;;;N;;;;;
+ 10A0;GEORGIAN CAPITAL LETTER AN;Lu;0;L;;;;;N;;;;2D00;
+ 10A1;GEORGIAN CAPITAL LETTER BAN;Lu;0;L;;;;;N;;;;2D01;
+ 10A2;GEORGIAN CAPITAL LETTER GAN;Lu;0;L;;;;;N;;;;2D02;
+ 10A3;GEORGIAN CAPITAL LETTER DON;Lu;0;L;;;;;N;;;;2D03;
+ 10A4;GEORGIAN CAPITAL LETTER EN;Lu;0;L;;;;;N;;;;2D04;
+ 10A5;GEORGIAN CAPITAL LETTER VIN;Lu;0;L;;;;;N;;;;2D05;
+ 10A6;GEORGIAN CAPITAL LETTER ZEN;Lu;0;L;;;;;N;;;;2D06;
+ 10A7;GEORGIAN CAPITAL LETTER TAN;Lu;0;L;;;;;N;;;;2D07;
+ 10A8;GEORGIAN CAPITAL LETTER IN;Lu;0;L;;;;;N;;;;2D08;
+ 10A9;GEORGIAN CAPITAL LETTER KAN;Lu;0;L;;;;;N;;;;2D09;
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+ 13A2;CHEROKEE LETTER I;Lu;0;L;;;;;N;;;;AB72;
+ 13A3;CHEROKEE LETTER O;Lu;0;L;;;;;N;;;;AB73;
+ 13A4;CHEROKEE LETTER U;Lu;0;L;;;;;N;;;;AB74;
+ 13A5;CHEROKEE LETTER V;Lu;0;L;;;;;N;;;;AB75;
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+ 13A7;CHEROKEE LETTER KA;Lu;0;L;;;;;N;;;;AB77;
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+ 13A9;CHEROKEE LETTER GI;Lu;0;L;;;;;N;;;;AB79;
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+ 13AB;CHEROKEE LETTER GU;Lu;0;L;;;;;N;;;;AB7B;
+ 13AC;CHEROKEE LETTER GV;Lu;0;L;;;;;N;;;;AB7C;
+ 13AD;CHEROKEE LETTER HA;Lu;0;L;;;;;N;;;;AB7D;
+ 13AE;CHEROKEE LETTER HE;Lu;0;L;;;;;N;;;;AB7E;
+ 13AF;CHEROKEE LETTER HI;Lu;0;L;;;;;N;;;;AB7F;
+ 13B0;CHEROKEE LETTER HO;Lu;0;L;;;;;N;;;;AB80;
+ 13B1;CHEROKEE LETTER HU;Lu;0;L;;;;;N;;;;AB81;
+ 13B2;CHEROKEE LETTER HV;Lu;0;L;;;;;N;;;;AB82;
+ 13B3;CHEROKEE LETTER LA;Lu;0;L;;;;;N;;;;AB83;
+ 13B4;CHEROKEE LETTER LE;Lu;0;L;;;;;N;;;;AB84;
+ 13B5;CHEROKEE LETTER LI;Lu;0;L;;;;;N;;;;AB85;
+ 13B6;CHEROKEE LETTER LO;Lu;0;L;;;;;N;;;;AB86;
+ 13B7;CHEROKEE LETTER LU;Lu;0;L;;;;;N;;;;AB87;
+ 13B8;CHEROKEE LETTER LV;Lu;0;L;;;;;N;;;;AB88;
+ 13B9;CHEROKEE LETTER MA;Lu;0;L;;;;;N;;;;AB89;
+ 13BA;CHEROKEE LETTER ME;Lu;0;L;;;;;N;;;;AB8A;
+ 13BB;CHEROKEE LETTER MI;Lu;0;L;;;;;N;;;;AB8B;
+ 13BC;CHEROKEE LETTER MO;Lu;0;L;;;;;N;;;;AB8C;
+ 13BD;CHEROKEE LETTER MU;Lu;0;L;;;;;N;;;;AB8D;
+ 13BE;CHEROKEE LETTER NA;Lu;0;L;;;;;N;;;;AB8E;
+ 13BF;CHEROKEE LETTER HNA;Lu;0;L;;;;;N;;;;AB8F;
+ 13C0;CHEROKEE LETTER NAH;Lu;0;L;;;;;N;;;;AB90;
+ 13C1;CHEROKEE LETTER NE;Lu;0;L;;;;;N;;;;AB91;
+ 13C2;CHEROKEE LETTER NI;Lu;0;L;;;;;N;;;;AB92;
+ 13C3;CHEROKEE LETTER NO;Lu;0;L;;;;;N;;;;AB93;
+ 13C4;CHEROKEE LETTER NU;Lu;0;L;;;;;N;;;;AB94;
+ 13C5;CHEROKEE LETTER NV;Lu;0;L;;;;;N;;;;AB95;
+ 13C6;CHEROKEE LETTER QUA;Lu;0;L;;;;;N;;;;AB96;
+ 13C7;CHEROKEE LETTER QUE;Lu;0;L;;;;;N;;;;AB97;
+ 13C8;CHEROKEE LETTER QUI;Lu;0;L;;;;;N;;;;AB98;
+ 13C9;CHEROKEE LETTER QUO;Lu;0;L;;;;;N;;;;AB99;
+ 13CA;CHEROKEE LETTER QUU;Lu;0;L;;;;;N;;;;AB9A;
+ 13CB;CHEROKEE LETTER QUV;Lu;0;L;;;;;N;;;;AB9B;
+ 13CC;CHEROKEE LETTER SA;Lu;0;L;;;;;N;;;;AB9C;
+ 13CD;CHEROKEE LETTER S;Lu;0;L;;;;;N;;;;AB9D;
+ 13CE;CHEROKEE LETTER SE;Lu;0;L;;;;;N;;;;AB9E;
+ 13CF;CHEROKEE LETTER SI;Lu;0;L;;;;;N;;;;AB9F;
+ 13D0;CHEROKEE LETTER SO;Lu;0;L;;;;;N;;;;ABA0;
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+ 13D2;CHEROKEE LETTER SV;Lu;0;L;;;;;N;;;;ABA2;
+ 13D3;CHEROKEE LETTER DA;Lu;0;L;;;;;N;;;;ABA3;
+ 13D4;CHEROKEE LETTER TA;Lu;0;L;;;;;N;;;;ABA4;
+ 13D5;CHEROKEE LETTER DE;Lu;0;L;;;;;N;;;;ABA5;
+ 13D6;CHEROKEE LETTER TE;Lu;0;L;;;;;N;;;;ABA6;
+ 13D7;CHEROKEE LETTER DI;Lu;0;L;;;;;N;;;;ABA7;
+ 13D8;CHEROKEE LETTER TI;Lu;0;L;;;;;N;;;;ABA8;
+ 13D9;CHEROKEE LETTER DO;Lu;0;L;;;;;N;;;;ABA9;
+ 13DA;CHEROKEE LETTER DU;Lu;0;L;;;;;N;;;;ABAA;
+ 13DB;CHEROKEE LETTER DV;Lu;0;L;;;;;N;;;;ABAB;
+ 13DC;CHEROKEE LETTER DLA;Lu;0;L;;;;;N;;;;ABAC;
+ 13DD;CHEROKEE LETTER TLA;Lu;0;L;;;;;N;;;;ABAD;
+ 13DE;CHEROKEE LETTER TLE;Lu;0;L;;;;;N;;;;ABAE;
+ 13DF;CHEROKEE LETTER TLI;Lu;0;L;;;;;N;;;;ABAF;
+ 13E0;CHEROKEE LETTER TLO;Lu;0;L;;;;;N;;;;ABB0;
+ 13E1;CHEROKEE LETTER TLU;Lu;0;L;;;;;N;;;;ABB1;
+ 13E2;CHEROKEE LETTER TLV;Lu;0;L;;;;;N;;;;ABB2;
+ 13E3;CHEROKEE LETTER TSA;Lu;0;L;;;;;N;;;;ABB3;
+ 13E4;CHEROKEE LETTER TSE;Lu;0;L;;;;;N;;;;ABB4;
+ 13E5;CHEROKEE LETTER TSI;Lu;0;L;;;;;N;;;;ABB5;
+ 13E6;CHEROKEE LETTER TSO;Lu;0;L;;;;;N;;;;ABB6;
+ 13E7;CHEROKEE LETTER TSU;Lu;0;L;;;;;N;;;;ABB7;
+ 13E8;CHEROKEE LETTER TSV;Lu;0;L;;;;;N;;;;ABB8;
+ 13E9;CHEROKEE LETTER WA;Lu;0;L;;;;;N;;;;ABB9;
+ 13EA;CHEROKEE LETTER WE;Lu;0;L;;;;;N;;;;ABBA;
+ 13EB;CHEROKEE LETTER WI;Lu;0;L;;;;;N;;;;ABBB;
+ 13EC;CHEROKEE LETTER WO;Lu;0;L;;;;;N;;;;ABBC;
+ 13ED;CHEROKEE LETTER WU;Lu;0;L;;;;;N;;;;ABBD;
+ 13EE;CHEROKEE LETTER WV;Lu;0;L;;;;;N;;;;ABBE;
+ 13EF;CHEROKEE LETTER YA;Lu;0;L;;;;;N;;;;ABBF;
+ 13F0;CHEROKEE LETTER YE;Lu;0;L;;;;;N;;;;13F8;
+ 13F1;CHEROKEE LETTER YI;Lu;0;L;;;;;N;;;;13F9;
+ 13F2;CHEROKEE LETTER YO;Lu;0;L;;;;;N;;;;13FA;
+ 13F3;CHEROKEE LETTER YU;Lu;0;L;;;;;N;;;;13FB;
+ 13F4;CHEROKEE LETTER YV;Lu;0;L;;;;;N;;;;13FC;
+ 13F5;CHEROKEE LETTER MV;Lu;0;L;;;;;N;;;;13FD;
+ 13F8;CHEROKEE SMALL LETTER YE;Ll;0;L;;;;;N;;;13F0;;13F0
+ 13F9;CHEROKEE SMALL LETTER YI;Ll;0;L;;;;;N;;;13F1;;13F1
+ 13FA;CHEROKEE SMALL LETTER YO;Ll;0;L;;;;;N;;;13F2;;13F2
+ 13FB;CHEROKEE SMALL LETTER YU;Ll;0;L;;;;;N;;;13F3;;13F3
+ 13FC;CHEROKEE SMALL LETTER YV;Ll;0;L;;;;;N;;;13F4;;13F4
+ 13FD;CHEROKEE SMALL LETTER MV;Ll;0;L;;;;;N;;;13F5;;13F5
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+ 1404;CANADIAN SYLLABICS II;Lo;0;L;;;;;N;;;;;
+ 1405;CANADIAN SYLLABICS O;Lo;0;L;;;;;N;;;;;
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+ 1425;CANADIAN SYLLABICS FINAL DOUBLE ACUTE;Lo;0;L;;;;;N;;;;;
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+ 1427;CANADIAN SYLLABICS FINAL MIDDLE DOT;Lo;0;L;;;;;N;;;;;
+ 1428;CANADIAN SYLLABICS FINAL SHORT HORIZONTAL STROKE;Lo;0;L;;;;;N;;;;;
+ 1429;CANADIAN SYLLABICS FINAL PLUS;Lo;0;L;;;;;N;;;;;
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+ 165D;CANADIAN SYLLABICS CARRIER TSE;Lo;0;L;;;;;N;;;;;
+ 165E;CANADIAN SYLLABICS CARRIER TSEE;Lo;0;L;;;;;N;;;;;
+ 165F;CANADIAN SYLLABICS CARRIER TSI;Lo;0;L;;;;;N;;;;;
+ 1660;CANADIAN SYLLABICS CARRIER TSA;Lo;0;L;;;;;N;;;;;
+ 1661;CANADIAN SYLLABICS CARRIER CHU;Lo;0;L;;;;;N;;;;;
+ 1662;CANADIAN SYLLABICS CARRIER CHO;Lo;0;L;;;;;N;;;;;
+ 1663;CANADIAN SYLLABICS CARRIER CHE;Lo;0;L;;;;;N;;;;;
+ 1664;CANADIAN SYLLABICS CARRIER CHEE;Lo;0;L;;;;;N;;;;;
+ 1665;CANADIAN SYLLABICS CARRIER CHI;Lo;0;L;;;;;N;;;;;
+ 1666;CANADIAN SYLLABICS CARRIER CHA;Lo;0;L;;;;;N;;;;;
+ 1667;CANADIAN SYLLABICS CARRIER TTSU;Lo;0;L;;;;;N;;;;;
+ 1668;CANADIAN SYLLABICS CARRIER TTSO;Lo;0;L;;;;;N;;;;;
+ 1669;CANADIAN SYLLABICS CARRIER TTSE;Lo;0;L;;;;;N;;;;;
+ 166A;CANADIAN SYLLABICS CARRIER TTSEE;Lo;0;L;;;;;N;;;;;
+ 166B;CANADIAN SYLLABICS CARRIER TTSI;Lo;0;L;;;;;N;;;;;
+ 166C;CANADIAN SYLLABICS CARRIER TTSA;Lo;0;L;;;;;N;;;;;
+ 166D;CANADIAN SYLLABICS CHI SIGN;So;0;L;;;;;N;;;;;
+ 166E;CANADIAN SYLLABICS FULL STOP;Po;0;L;;;;;N;;;;;
+ 166F;CANADIAN SYLLABICS QAI;Lo;0;L;;;;;N;;;;;
+ 1670;CANADIAN SYLLABICS NGAI;Lo;0;L;;;;;N;;;;;
+ 1671;CANADIAN SYLLABICS NNGI;Lo;0;L;;;;;N;;;;;
+ 1672;CANADIAN SYLLABICS NNGII;Lo;0;L;;;;;N;;;;;
+ 1673;CANADIAN SYLLABICS NNGO;Lo;0;L;;;;;N;;;;;
+ 1674;CANADIAN SYLLABICS NNGOO;Lo;0;L;;;;;N;;;;;
+ 1675;CANADIAN SYLLABICS NNGA;Lo;0;L;;;;;N;;;;;
+ 1676;CANADIAN SYLLABICS NNGAA;Lo;0;L;;;;;N;;;;;
+ 1677;CANADIAN SYLLABICS WOODS-CREE THWEE;Lo;0;L;;;;;N;;;;;
+ 1678;CANADIAN SYLLABICS WOODS-CREE THWI;Lo;0;L;;;;;N;;;;;
+ 1679;CANADIAN SYLLABICS WOODS-CREE THWII;Lo;0;L;;;;;N;;;;;
+ 167A;CANADIAN SYLLABICS WOODS-CREE THWO;Lo;0;L;;;;;N;;;;;
+ 167B;CANADIAN SYLLABICS WOODS-CREE THWOO;Lo;0;L;;;;;N;;;;;
+ 167C;CANADIAN SYLLABICS WOODS-CREE THWA;Lo;0;L;;;;;N;;;;;
+ 167D;CANADIAN SYLLABICS WOODS-CREE THWAA;Lo;0;L;;;;;N;;;;;
+ 167E;CANADIAN SYLLABICS WOODS-CREE FINAL TH;Lo;0;L;;;;;N;;;;;
+ 167F;CANADIAN SYLLABICS BLACKFOOT W;Lo;0;L;;;;;N;;;;;
+ 1680;OGHAM SPACE MARK;Zs;0;WS;;;;;N;;;;;
+ 1681;OGHAM LETTER BEITH;Lo;0;L;;;;;N;;;;;
+ 1682;OGHAM LETTER LUIS;Lo;0;L;;;;;N;;;;;
+ 1683;OGHAM LETTER FEARN;Lo;0;L;;;;;N;;;;;
+ 1684;OGHAM LETTER SAIL;Lo;0;L;;;;;N;;;;;
+ 1685;OGHAM LETTER NION;Lo;0;L;;;;;N;;;;;
+ 1686;OGHAM LETTER UATH;Lo;0;L;;;;;N;;;;;
+ 1687;OGHAM LETTER DAIR;Lo;0;L;;;;;N;;;;;
+ 1688;OGHAM LETTER TINNE;Lo;0;L;;;;;N;;;;;
+ 1689;OGHAM LETTER COLL;Lo;0;L;;;;;N;;;;;
+ 168A;OGHAM LETTER CEIRT;Lo;0;L;;;;;N;;;;;
+ 168B;OGHAM LETTER MUIN;Lo;0;L;;;;;N;;;;;
+ 168C;OGHAM LETTER GORT;Lo;0;L;;;;;N;;;;;
+ 168D;OGHAM LETTER NGEADAL;Lo;0;L;;;;;N;;;;;
+ 168E;OGHAM LETTER STRAIF;Lo;0;L;;;;;N;;;;;
+ 168F;OGHAM LETTER RUIS;Lo;0;L;;;;;N;;;;;
+ 1690;OGHAM LETTER AILM;Lo;0;L;;;;;N;;;;;
+ 1691;OGHAM LETTER ONN;Lo;0;L;;;;;N;;;;;
+ 1692;OGHAM LETTER UR;Lo;0;L;;;;;N;;;;;
+ 1693;OGHAM LETTER EADHADH;Lo;0;L;;;;;N;;;;;
+ 1694;OGHAM LETTER IODHADH;Lo;0;L;;;;;N;;;;;
+ 1695;OGHAM LETTER EABHADH;Lo;0;L;;;;;N;;;;;
+ 1696;OGHAM LETTER OR;Lo;0;L;;;;;N;;;;;
+ 1697;OGHAM LETTER UILLEANN;Lo;0;L;;;;;N;;;;;
+ 1698;OGHAM LETTER IFIN;Lo;0;L;;;;;N;;;;;
+ 1699;OGHAM LETTER EAMHANCHOLL;Lo;0;L;;;;;N;;;;;
+ 169A;OGHAM LETTER PEITH;Lo;0;L;;;;;N;;;;;
+ 169B;OGHAM FEATHER MARK;Ps;0;ON;;;;;Y;;;;;
+ 169C;OGHAM REVERSED FEATHER MARK;Pe;0;ON;;;;;Y;;;;;
+ 16A0;RUNIC LETTER FEHU FEOH FE F;Lo;0;L;;;;;N;;;;;
+ 16A1;RUNIC LETTER V;Lo;0;L;;;;;N;;;;;
+ 16A2;RUNIC LETTER URUZ UR U;Lo;0;L;;;;;N;;;;;
+ 16A3;RUNIC LETTER YR;Lo;0;L;;;;;N;;;;;
+ 16A4;RUNIC LETTER Y;Lo;0;L;;;;;N;;;;;
+ 16A5;RUNIC LETTER W;Lo;0;L;;;;;N;;;;;
+ 16A6;RUNIC LETTER THURISAZ THURS THORN;Lo;0;L;;;;;N;;;;;
+ 16A7;RUNIC LETTER ETH;Lo;0;L;;;;;N;;;;;
+ 16A8;RUNIC LETTER ANSUZ A;Lo;0;L;;;;;N;;;;;
+ 16A9;RUNIC LETTER OS O;Lo;0;L;;;;;N;;;;;
+ 16AA;RUNIC LETTER AC A;Lo;0;L;;;;;N;;;;;
+ 16AB;RUNIC LETTER AESC;Lo;0;L;;;;;N;;;;;
+ 16AC;RUNIC LETTER LONG-BRANCH-OSS O;Lo;0;L;;;;;N;;;;;
+ 16AD;RUNIC LETTER SHORT-TWIG-OSS O;Lo;0;L;;;;;N;;;;;
+ 16AE;RUNIC LETTER O;Lo;0;L;;;;;N;;;;;
+ 16AF;RUNIC LETTER OE;Lo;0;L;;;;;N;;;;;
+ 16B0;RUNIC LETTER ON;Lo;0;L;;;;;N;;;;;
+ 16B1;RUNIC LETTER RAIDO RAD REID R;Lo;0;L;;;;;N;;;;;
+ 16B2;RUNIC LETTER KAUNA;Lo;0;L;;;;;N;;;;;
+ 16B3;RUNIC LETTER CEN;Lo;0;L;;;;;N;;;;;
+ 16B4;RUNIC LETTER KAUN K;Lo;0;L;;;;;N;;;;;
+ 16B5;RUNIC LETTER G;Lo;0;L;;;;;N;;;;;
+ 16B6;RUNIC LETTER ENG;Lo;0;L;;;;;N;;;;;
+ 16B7;RUNIC LETTER GEBO GYFU G;Lo;0;L;;;;;N;;;;;
+ 16B8;RUNIC LETTER GAR;Lo;0;L;;;;;N;;;;;
+ 16B9;RUNIC LETTER WUNJO WYNN W;Lo;0;L;;;;;N;;;;;
+ 16BA;RUNIC LETTER HAGLAZ H;Lo;0;L;;;;;N;;;;;
+ 16BB;RUNIC LETTER HAEGL H;Lo;0;L;;;;;N;;;;;
+ 16BC;RUNIC LETTER LONG-BRANCH-HAGALL H;Lo;0;L;;;;;N;;;;;
+ 16BD;RUNIC LETTER SHORT-TWIG-HAGALL H;Lo;0;L;;;;;N;;;;;
+ 16BE;RUNIC LETTER NAUDIZ NYD NAUD N;Lo;0;L;;;;;N;;;;;
+ 16BF;RUNIC LETTER SHORT-TWIG-NAUD N;Lo;0;L;;;;;N;;;;;
+ 16C0;RUNIC LETTER DOTTED-N;Lo;0;L;;;;;N;;;;;
+ 16C1;RUNIC LETTER ISAZ IS ISS I;Lo;0;L;;;;;N;;;;;
+ 16C2;RUNIC LETTER E;Lo;0;L;;;;;N;;;;;
+ 16C3;RUNIC LETTER JERAN J;Lo;0;L;;;;;N;;;;;
+ 16C4;RUNIC LETTER GER;Lo;0;L;;;;;N;;;;;
+ 16C5;RUNIC LETTER LONG-BRANCH-AR AE;Lo;0;L;;;;;N;;;;;
+ 16C6;RUNIC LETTER SHORT-TWIG-AR A;Lo;0;L;;;;;N;;;;;
+ 16C7;RUNIC LETTER IWAZ EOH;Lo;0;L;;;;;N;;;;;
+ 16C8;RUNIC LETTER PERTHO PEORTH P;Lo;0;L;;;;;N;;;;;
+ 16C9;RUNIC LETTER ALGIZ EOLHX;Lo;0;L;;;;;N;;;;;
+ 16CA;RUNIC LETTER SOWILO S;Lo;0;L;;;;;N;;;;;
+ 16CB;RUNIC LETTER SIGEL LONG-BRANCH-SOL S;Lo;0;L;;;;;N;;;;;
+ 16CC;RUNIC LETTER SHORT-TWIG-SOL S;Lo;0;L;;;;;N;;;;;
+ 16CD;RUNIC LETTER C;Lo;0;L;;;;;N;;;;;
+ 16CE;RUNIC LETTER Z;Lo;0;L;;;;;N;;;;;
+ 16CF;RUNIC LETTER TIWAZ TIR TYR T;Lo;0;L;;;;;N;;;;;
+ 16D0;RUNIC LETTER SHORT-TWIG-TYR T;Lo;0;L;;;;;N;;;;;
+ 16D1;RUNIC LETTER D;Lo;0;L;;;;;N;;;;;
+ 16D2;RUNIC LETTER BERKANAN BEORC BJARKAN B;Lo;0;L;;;;;N;;;;;
+ 16D3;RUNIC LETTER SHORT-TWIG-BJARKAN B;Lo;0;L;;;;;N;;;;;
+ 16D4;RUNIC LETTER DOTTED-P;Lo;0;L;;;;;N;;;;;
+ 16D5;RUNIC LETTER OPEN-P;Lo;0;L;;;;;N;;;;;
+ 16D6;RUNIC LETTER EHWAZ EH E;Lo;0;L;;;;;N;;;;;
+ 16D7;RUNIC LETTER MANNAZ MAN M;Lo;0;L;;;;;N;;;;;
+ 16D8;RUNIC LETTER LONG-BRANCH-MADR M;Lo;0;L;;;;;N;;;;;
+ 16D9;RUNIC LETTER SHORT-TWIG-MADR M;Lo;0;L;;;;;N;;;;;
+ 16DA;RUNIC LETTER LAUKAZ LAGU LOGR L;Lo;0;L;;;;;N;;;;;
+ 16DB;RUNIC LETTER DOTTED-L;Lo;0;L;;;;;N;;;;;
+ 16DC;RUNIC LETTER INGWAZ;Lo;0;L;;;;;N;;;;;
+ 16DD;RUNIC LETTER ING;Lo;0;L;;;;;N;;;;;
+ 16DE;RUNIC LETTER DAGAZ DAEG D;Lo;0;L;;;;;N;;;;;
+ 16DF;RUNIC LETTER OTHALAN ETHEL O;Lo;0;L;;;;;N;;;;;
+ 16E0;RUNIC LETTER EAR;Lo;0;L;;;;;N;;;;;
+ 16E1;RUNIC LETTER IOR;Lo;0;L;;;;;N;;;;;
+ 16E2;RUNIC LETTER CWEORTH;Lo;0;L;;;;;N;;;;;
+ 16E3;RUNIC LETTER CALC;Lo;0;L;;;;;N;;;;;
+ 16E4;RUNIC LETTER CEALC;Lo;0;L;;;;;N;;;;;
+ 16E5;RUNIC LETTER STAN;Lo;0;L;;;;;N;;;;;
+ 16E6;RUNIC LETTER LONG-BRANCH-YR;Lo;0;L;;;;;N;;;;;
+ 16E7;RUNIC LETTER SHORT-TWIG-YR;Lo;0;L;;;;;N;;;;;
+ 16E8;RUNIC LETTER ICELANDIC-YR;Lo;0;L;;;;;N;;;;;
+ 16E9;RUNIC LETTER Q;Lo;0;L;;;;;N;;;;;
+ 16EA;RUNIC LETTER X;Lo;0;L;;;;;N;;;;;
+ 16EB;RUNIC SINGLE PUNCTUATION;Po;0;L;;;;;N;;;;;
+ 16EC;RUNIC MULTIPLE PUNCTUATION;Po;0;L;;;;;N;;;;;
+ 16ED;RUNIC CROSS PUNCTUATION;Po;0;L;;;;;N;;;;;
+ 16EE;RUNIC ARLAUG SYMBOL;Nl;0;L;;;;17;N;;;;;
+ 16EF;RUNIC TVIMADUR SYMBOL;Nl;0;L;;;;18;N;;;;;
+ 16F0;RUNIC BELGTHOR SYMBOL;Nl;0;L;;;;19;N;;;;;
+ 16F1;RUNIC LETTER K;Lo;0;L;;;;;N;;;;;
+ 16F2;RUNIC LETTER SH;Lo;0;L;;;;;N;;;;;
+ 16F3;RUNIC LETTER OO;Lo;0;L;;;;;N;;;;;
+ 16F4;RUNIC LETTER FRANKS CASKET OS;Lo;0;L;;;;;N;;;;;
+ 16F5;RUNIC LETTER FRANKS CASKET IS;Lo;0;L;;;;;N;;;;;
+ 16F6;RUNIC LETTER FRANKS CASKET EH;Lo;0;L;;;;;N;;;;;
+ 16F7;RUNIC LETTER FRANKS CASKET AC;Lo;0;L;;;;;N;;;;;
+ 16F8;RUNIC LETTER FRANKS CASKET AESC;Lo;0;L;;;;;N;;;;;
+ 1700;TAGALOG LETTER A;Lo;0;L;;;;;N;;;;;
+ 1701;TAGALOG LETTER I;Lo;0;L;;;;;N;;;;;
+ 1702;TAGALOG LETTER U;Lo;0;L;;;;;N;;;;;
+ 1703;TAGALOG LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1704;TAGALOG LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1705;TAGALOG LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1706;TAGALOG LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1707;TAGALOG LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1708;TAGALOG LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1709;TAGALOG LETTER PA;Lo;0;L;;;;;N;;;;;
+ 170A;TAGALOG LETTER BA;Lo;0;L;;;;;N;;;;;
+ 170B;TAGALOG LETTER MA;Lo;0;L;;;;;N;;;;;
+ 170C;TAGALOG LETTER YA;Lo;0;L;;;;;N;;;;;
+ 170E;TAGALOG LETTER LA;Lo;0;L;;;;;N;;;;;
+ 170F;TAGALOG LETTER WA;Lo;0;L;;;;;N;;;;;
+ 1710;TAGALOG LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1711;TAGALOG LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1712;TAGALOG VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 1713;TAGALOG VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 1714;TAGALOG SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 1720;HANUNOO LETTER A;Lo;0;L;;;;;N;;;;;
+ 1721;HANUNOO LETTER I;Lo;0;L;;;;;N;;;;;
+ 1722;HANUNOO LETTER U;Lo;0;L;;;;;N;;;;;
+ 1723;HANUNOO LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1724;HANUNOO LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1725;HANUNOO LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1726;HANUNOO LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1727;HANUNOO LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1728;HANUNOO LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1729;HANUNOO LETTER PA;Lo;0;L;;;;;N;;;;;
+ 172A;HANUNOO LETTER BA;Lo;0;L;;;;;N;;;;;
+ 172B;HANUNOO LETTER MA;Lo;0;L;;;;;N;;;;;
+ 172C;HANUNOO LETTER YA;Lo;0;L;;;;;N;;;;;
+ 172D;HANUNOO LETTER RA;Lo;0;L;;;;;N;;;;;
+ 172E;HANUNOO LETTER LA;Lo;0;L;;;;;N;;;;;
+ 172F;HANUNOO LETTER WA;Lo;0;L;;;;;N;;;;;
+ 1730;HANUNOO LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1731;HANUNOO LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1732;HANUNOO VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 1733;HANUNOO VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 1734;HANUNOO SIGN PAMUDPOD;Mn;9;NSM;;;;;N;;;;;
+ 1735;PHILIPPINE SINGLE PUNCTUATION;Po;0;L;;;;;N;;;;;
+ 1736;PHILIPPINE DOUBLE PUNCTUATION;Po;0;L;;;;;N;;;;;
+ 1740;BUHID LETTER A;Lo;0;L;;;;;N;;;;;
+ 1741;BUHID LETTER I;Lo;0;L;;;;;N;;;;;
+ 1742;BUHID LETTER U;Lo;0;L;;;;;N;;;;;
+ 1743;BUHID LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1744;BUHID LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1745;BUHID LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1746;BUHID LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1747;BUHID LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1748;BUHID LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1749;BUHID LETTER PA;Lo;0;L;;;;;N;;;;;
+ 174A;BUHID LETTER BA;Lo;0;L;;;;;N;;;;;
+ 174B;BUHID LETTER MA;Lo;0;L;;;;;N;;;;;
+ 174C;BUHID LETTER YA;Lo;0;L;;;;;N;;;;;
+ 174D;BUHID LETTER RA;Lo;0;L;;;;;N;;;;;
+ 174E;BUHID LETTER LA;Lo;0;L;;;;;N;;;;;
+ 174F;BUHID LETTER WA;Lo;0;L;;;;;N;;;;;
+ 1750;BUHID LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1751;BUHID LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1752;BUHID VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 1753;BUHID VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 1760;TAGBANWA LETTER A;Lo;0;L;;;;;N;;;;;
+ 1761;TAGBANWA LETTER I;Lo;0;L;;;;;N;;;;;
+ 1762;TAGBANWA LETTER U;Lo;0;L;;;;;N;;;;;
+ 1763;TAGBANWA LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1764;TAGBANWA LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1765;TAGBANWA LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1766;TAGBANWA LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1767;TAGBANWA LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1768;TAGBANWA LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1769;TAGBANWA LETTER PA;Lo;0;L;;;;;N;;;;;
+ 176A;TAGBANWA LETTER BA;Lo;0;L;;;;;N;;;;;
+ 176B;TAGBANWA LETTER MA;Lo;0;L;;;;;N;;;;;
+ 176C;TAGBANWA LETTER YA;Lo;0;L;;;;;N;;;;;
+ 176E;TAGBANWA LETTER LA;Lo;0;L;;;;;N;;;;;
+ 176F;TAGBANWA LETTER WA;Lo;0;L;;;;;N;;;;;
+ 1770;TAGBANWA LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1772;TAGBANWA VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 1773;TAGBANWA VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 1780;KHMER LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1781;KHMER LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 1782;KHMER LETTER KO;Lo;0;L;;;;;N;;;;;
+ 1783;KHMER LETTER KHO;Lo;0;L;;;;;N;;;;;
+ 1784;KHMER LETTER NGO;Lo;0;L;;;;;N;;;;;
+ 1785;KHMER LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1786;KHMER LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 1787;KHMER LETTER CO;Lo;0;L;;;;;N;;;;;
+ 1788;KHMER LETTER CHO;Lo;0;L;;;;;N;;;;;
+ 1789;KHMER LETTER NYO;Lo;0;L;;;;;N;;;;;
+ 178A;KHMER LETTER DA;Lo;0;L;;;;;N;;;;;
+ 178B;KHMER LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 178C;KHMER LETTER DO;Lo;0;L;;;;;N;;;;;
+ 178D;KHMER LETTER TTHO;Lo;0;L;;;;;N;;;;;
+ 178E;KHMER LETTER NNO;Lo;0;L;;;;;N;;;;;
+ 178F;KHMER LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1790;KHMER LETTER THA;Lo;0;L;;;;;N;;;;;
+ 1791;KHMER LETTER TO;Lo;0;L;;;;;N;;;;;
+ 1792;KHMER LETTER THO;Lo;0;L;;;;;N;;;;;
+ 1793;KHMER LETTER NO;Lo;0;L;;;;;N;;;;;
+ 1794;KHMER LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1795;KHMER LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 1796;KHMER LETTER PO;Lo;0;L;;;;;N;;;;;
+ 1797;KHMER LETTER PHO;Lo;0;L;;;;;N;;;;;
+ 1798;KHMER LETTER MO;Lo;0;L;;;;;N;;;;;
+ 1799;KHMER LETTER YO;Lo;0;L;;;;;N;;;;;
+ 179A;KHMER LETTER RO;Lo;0;L;;;;;N;;;;;
+ 179B;KHMER LETTER LO;Lo;0;L;;;;;N;;;;;
+ 179C;KHMER LETTER VO;Lo;0;L;;;;;N;;;;;
+ 179D;KHMER LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 179E;KHMER LETTER SSO;Lo;0;L;;;;;N;;;;;
+ 179F;KHMER LETTER SA;Lo;0;L;;;;;N;;;;;
+ 17A0;KHMER LETTER HA;Lo;0;L;;;;;N;;;;;
+ 17A1;KHMER LETTER LA;Lo;0;L;;;;;N;;;;;
+ 17A2;KHMER LETTER QA;Lo;0;L;;;;;N;;;;;
+ 17A3;KHMER INDEPENDENT VOWEL QAQ;Lo;0;L;;;;;N;;;;;
+ 17A4;KHMER INDEPENDENT VOWEL QAA;Lo;0;L;;;;;N;;;;;
+ 17A5;KHMER INDEPENDENT VOWEL QI;Lo;0;L;;;;;N;;;;;
+ 17A6;KHMER INDEPENDENT VOWEL QII;Lo;0;L;;;;;N;;;;;
+ 17A7;KHMER INDEPENDENT VOWEL QU;Lo;0;L;;;;;N;;;;;
+ 17A8;KHMER INDEPENDENT VOWEL QUK;Lo;0;L;;;;;N;;;;;
+ 17A9;KHMER INDEPENDENT VOWEL QUU;Lo;0;L;;;;;N;;;;;
+ 17AA;KHMER INDEPENDENT VOWEL QUUV;Lo;0;L;;;;;N;;;;;
+ 17AB;KHMER INDEPENDENT VOWEL RY;Lo;0;L;;;;;N;;;;;
+ 17AC;KHMER INDEPENDENT VOWEL RYY;Lo;0;L;;;;;N;;;;;
+ 17AD;KHMER INDEPENDENT VOWEL LY;Lo;0;L;;;;;N;;;;;
+ 17AE;KHMER INDEPENDENT VOWEL LYY;Lo;0;L;;;;;N;;;;;
+ 17AF;KHMER INDEPENDENT VOWEL QE;Lo;0;L;;;;;N;;;;;
+ 17B0;KHMER INDEPENDENT VOWEL QAI;Lo;0;L;;;;;N;;;;;
+ 17B1;KHMER INDEPENDENT VOWEL QOO TYPE ONE;Lo;0;L;;;;;N;;;;;
+ 17B2;KHMER INDEPENDENT VOWEL QOO TYPE TWO;Lo;0;L;;;;;N;;;;;
+ 17B3;KHMER INDEPENDENT VOWEL QAU;Lo;0;L;;;;;N;;;;;
+ 17B4;KHMER VOWEL INHERENT AQ;Mn;0;NSM;;;;;N;;;;;
+ 17B5;KHMER VOWEL INHERENT AA;Mn;0;NSM;;;;;N;;;;;
+ 17B6;KHMER VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 17B7;KHMER VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 17B8;KHMER VOWEL SIGN II;Mn;0;NSM;;;;;N;;;;;
+ 17B9;KHMER VOWEL SIGN Y;Mn;0;NSM;;;;;N;;;;;
+ 17BA;KHMER VOWEL SIGN YY;Mn;0;NSM;;;;;N;;;;;
+ 17BB;KHMER VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 17BC;KHMER VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 17BD;KHMER VOWEL SIGN UA;Mn;0;NSM;;;;;N;;;;;
+ 17BE;KHMER VOWEL SIGN OE;Mc;0;L;;;;;N;;;;;
+ 17BF;KHMER VOWEL SIGN YA;Mc;0;L;;;;;N;;;;;
+ 17C0;KHMER VOWEL SIGN IE;Mc;0;L;;;;;N;;;;;
+ 17C1;KHMER VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 17C2;KHMER VOWEL SIGN AE;Mc;0;L;;;;;N;;;;;
+ 17C3;KHMER VOWEL SIGN AI;Mc;0;L;;;;;N;;;;;
+ 17C4;KHMER VOWEL SIGN OO;Mc;0;L;;;;;N;;;;;
+ 17C5;KHMER VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ 17C6;KHMER SIGN NIKAHIT;Mn;0;NSM;;;;;N;;;;;
+ 17C7;KHMER SIGN REAHMUK;Mc;0;L;;;;;N;;;;;
+ 17C8;KHMER SIGN YUUKALEAPINTU;Mc;0;L;;;;;N;;;;;
+ 17C9;KHMER SIGN MUUSIKATOAN;Mn;0;NSM;;;;;N;;;;;
+ 17CA;KHMER SIGN TRIISAP;Mn;0;NSM;;;;;N;;;;;
+ 17CB;KHMER SIGN BANTOC;Mn;0;NSM;;;;;N;;;;;
+ 17CC;KHMER SIGN ROBAT;Mn;0;NSM;;;;;N;;;;;
+ 17CD;KHMER SIGN TOANDAKHIAT;Mn;0;NSM;;;;;N;;;;;
+ 17CE;KHMER SIGN KAKABAT;Mn;0;NSM;;;;;N;;;;;
+ 17CF;KHMER SIGN AHSDA;Mn;0;NSM;;;;;N;;;;;
+ 17D0;KHMER SIGN SAMYOK SANNYA;Mn;0;NSM;;;;;N;;;;;
+ 17D1;KHMER SIGN VIRIAM;Mn;0;NSM;;;;;N;;;;;
+ 17D2;KHMER SIGN COENG;Mn;9;NSM;;;;;N;;;;;
+ 17D3;KHMER SIGN BATHAMASAT;Mn;0;NSM;;;;;N;;;;;
+ 17D4;KHMER SIGN KHAN;Po;0;L;;;;;N;;;;;
+ 17D5;KHMER SIGN BARIYOOSAN;Po;0;L;;;;;N;;;;;
+ 17D6;KHMER SIGN CAMNUC PII KUUH;Po;0;L;;;;;N;;;;;
+ 17D7;KHMER SIGN LEK TOO;Lm;0;L;;;;;N;;;;;
+ 17D8;KHMER SIGN BEYYAL;Po;0;L;;;;;N;;;;;
+ 17D9;KHMER SIGN PHNAEK MUAN;Po;0;L;;;;;N;;;;;
+ 17DA;KHMER SIGN KOOMUUT;Po;0;L;;;;;N;;;;;
+ 17DB;KHMER CURRENCY SYMBOL RIEL;Sc;0;ET;;;;;N;;;;;
+ 17DC;KHMER SIGN AVAKRAHASANYA;Lo;0;L;;;;;N;;;;;
+ 17DD;KHMER SIGN ATTHACAN;Mn;230;NSM;;;;;N;;;;;
+ 17E0;KHMER DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 17E1;KHMER DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 17E2;KHMER DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 17E3;KHMER DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 17E4;KHMER DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 17E5;KHMER DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 17E6;KHMER DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 17E7;KHMER DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 17E8;KHMER DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 17E9;KHMER DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 17F0;KHMER SYMBOL LEK ATTAK SON;No;0;ON;;;;0;N;;;;;
+ 17F1;KHMER SYMBOL LEK ATTAK MUOY;No;0;ON;;;;1;N;;;;;
+ 17F2;KHMER SYMBOL LEK ATTAK PII;No;0;ON;;;;2;N;;;;;
+ 17F3;KHMER SYMBOL LEK ATTAK BEI;No;0;ON;;;;3;N;;;;;
+ 17F4;KHMER SYMBOL LEK ATTAK BUON;No;0;ON;;;;4;N;;;;;
+ 17F5;KHMER SYMBOL LEK ATTAK PRAM;No;0;ON;;;;5;N;;;;;
+ 17F6;KHMER SYMBOL LEK ATTAK PRAM-MUOY;No;0;ON;;;;6;N;;;;;
+ 17F7;KHMER SYMBOL LEK ATTAK PRAM-PII;No;0;ON;;;;7;N;;;;;
+ 17F8;KHMER SYMBOL LEK ATTAK PRAM-BEI;No;0;ON;;;;8;N;;;;;
+ 17F9;KHMER SYMBOL LEK ATTAK PRAM-BUON;No;0;ON;;;;9;N;;;;;
+ 1800;MONGOLIAN BIRGA;Po;0;ON;;;;;N;;;;;
+ 1801;MONGOLIAN ELLIPSIS;Po;0;ON;;;;;N;;;;;
+ 1802;MONGOLIAN COMMA;Po;0;ON;;;;;N;;;;;
+ 1803;MONGOLIAN FULL STOP;Po;0;ON;;;;;N;;;;;
+ 1804;MONGOLIAN COLON;Po;0;ON;;;;;N;;;;;
+ 1805;MONGOLIAN FOUR DOTS;Po;0;ON;;;;;N;;;;;
+ 1806;MONGOLIAN TODO SOFT HYPHEN;Pd;0;ON;;;;;N;;;;;
+ 1807;MONGOLIAN SIBE SYLLABLE BOUNDARY MARKER;Po;0;ON;;;;;N;;;;;
+ 1808;MONGOLIAN MANCHU COMMA;Po;0;ON;;;;;N;;;;;
+ 1809;MONGOLIAN MANCHU FULL STOP;Po;0;ON;;;;;N;;;;;
+ 180A;MONGOLIAN NIRUGU;Po;0;ON;;;;;N;;;;;
+ 180B;MONGOLIAN FREE VARIATION SELECTOR ONE;Mn;0;NSM;;;;;N;;;;;
+ 180C;MONGOLIAN FREE VARIATION SELECTOR TWO;Mn;0;NSM;;;;;N;;;;;
+ 180D;MONGOLIAN FREE VARIATION SELECTOR THREE;Mn;0;NSM;;;;;N;;;;;
+ 180E;MONGOLIAN VOWEL SEPARATOR;Cf;0;BN;;;;;N;;;;;
+ 1810;MONGOLIAN DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 1811;MONGOLIAN DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 1812;MONGOLIAN DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 1813;MONGOLIAN DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 1814;MONGOLIAN DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 1815;MONGOLIAN DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 1816;MONGOLIAN DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 1817;MONGOLIAN DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 1818;MONGOLIAN DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 1819;MONGOLIAN DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 1820;MONGOLIAN LETTER A;Lo;0;L;;;;;N;;;;;
+ 1821;MONGOLIAN LETTER E;Lo;0;L;;;;;N;;;;;
+ 1822;MONGOLIAN LETTER I;Lo;0;L;;;;;N;;;;;
+ 1823;MONGOLIAN LETTER O;Lo;0;L;;;;;N;;;;;
+ 1824;MONGOLIAN LETTER U;Lo;0;L;;;;;N;;;;;
+ 1825;MONGOLIAN LETTER OE;Lo;0;L;;;;;N;;;;;
+ 1826;MONGOLIAN LETTER UE;Lo;0;L;;;;;N;;;;;
+ 1827;MONGOLIAN LETTER EE;Lo;0;L;;;;;N;;;;;
+ 1828;MONGOLIAN LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1829;MONGOLIAN LETTER ANG;Lo;0;L;;;;;N;;;;;
+ 182A;MONGOLIAN LETTER BA;Lo;0;L;;;;;N;;;;;
+ 182B;MONGOLIAN LETTER PA;Lo;0;L;;;;;N;;;;;
+ 182C;MONGOLIAN LETTER QA;Lo;0;L;;;;;N;;;;;
+ 182D;MONGOLIAN LETTER GA;Lo;0;L;;;;;N;;;;;
+ 182E;MONGOLIAN LETTER MA;Lo;0;L;;;;;N;;;;;
+ 182F;MONGOLIAN LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1830;MONGOLIAN LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1831;MONGOLIAN LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 1832;MONGOLIAN LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1833;MONGOLIAN LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1834;MONGOLIAN LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 1835;MONGOLIAN LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1836;MONGOLIAN LETTER YA;Lo;0;L;;;;;N;;;;;
+ 1837;MONGOLIAN LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1838;MONGOLIAN LETTER WA;Lo;0;L;;;;;N;;;;;
+ 1839;MONGOLIAN LETTER FA;Lo;0;L;;;;;N;;;;;
+ 183A;MONGOLIAN LETTER KA;Lo;0;L;;;;;N;;;;;
+ 183B;MONGOLIAN LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 183C;MONGOLIAN LETTER TSA;Lo;0;L;;;;;N;;;;;
+ 183D;MONGOLIAN LETTER ZA;Lo;0;L;;;;;N;;;;;
+ 183E;MONGOLIAN LETTER HAA;Lo;0;L;;;;;N;;;;;
+ 183F;MONGOLIAN LETTER ZRA;Lo;0;L;;;;;N;;;;;
+ 1840;MONGOLIAN LETTER LHA;Lo;0;L;;;;;N;;;;;
+ 1841;MONGOLIAN LETTER ZHI;Lo;0;L;;;;;N;;;;;
+ 1842;MONGOLIAN LETTER CHI;Lo;0;L;;;;;N;;;;;
+ 1843;MONGOLIAN LETTER TODO LONG VOWEL SIGN;Lm;0;L;;;;;N;;;;;
+ 1844;MONGOLIAN LETTER TODO E;Lo;0;L;;;;;N;;;;;
+ 1845;MONGOLIAN LETTER TODO I;Lo;0;L;;;;;N;;;;;
+ 1846;MONGOLIAN LETTER TODO O;Lo;0;L;;;;;N;;;;;
+ 1847;MONGOLIAN LETTER TODO U;Lo;0;L;;;;;N;;;;;
+ 1848;MONGOLIAN LETTER TODO OE;Lo;0;L;;;;;N;;;;;
+ 1849;MONGOLIAN LETTER TODO UE;Lo;0;L;;;;;N;;;;;
+ 184A;MONGOLIAN LETTER TODO ANG;Lo;0;L;;;;;N;;;;;
+ 184B;MONGOLIAN LETTER TODO BA;Lo;0;L;;;;;N;;;;;
+ 184C;MONGOLIAN LETTER TODO PA;Lo;0;L;;;;;N;;;;;
+ 184D;MONGOLIAN LETTER TODO QA;Lo;0;L;;;;;N;;;;;
+ 184E;MONGOLIAN LETTER TODO GA;Lo;0;L;;;;;N;;;;;
+ 184F;MONGOLIAN LETTER TODO MA;Lo;0;L;;;;;N;;;;;
+ 1850;MONGOLIAN LETTER TODO TA;Lo;0;L;;;;;N;;;;;
+ 1851;MONGOLIAN LETTER TODO DA;Lo;0;L;;;;;N;;;;;
+ 1852;MONGOLIAN LETTER TODO CHA;Lo;0;L;;;;;N;;;;;
+ 1853;MONGOLIAN LETTER TODO JA;Lo;0;L;;;;;N;;;;;
+ 1854;MONGOLIAN LETTER TODO TSA;Lo;0;L;;;;;N;;;;;
+ 1855;MONGOLIAN LETTER TODO YA;Lo;0;L;;;;;N;;;;;
+ 1856;MONGOLIAN LETTER TODO WA;Lo;0;L;;;;;N;;;;;
+ 1857;MONGOLIAN LETTER TODO KA;Lo;0;L;;;;;N;;;;;
+ 1858;MONGOLIAN LETTER TODO GAA;Lo;0;L;;;;;N;;;;;
+ 1859;MONGOLIAN LETTER TODO HAA;Lo;0;L;;;;;N;;;;;
+ 185A;MONGOLIAN LETTER TODO JIA;Lo;0;L;;;;;N;;;;;
+ 185B;MONGOLIAN LETTER TODO NIA;Lo;0;L;;;;;N;;;;;
+ 185C;MONGOLIAN LETTER TODO DZA;Lo;0;L;;;;;N;;;;;
+ 185D;MONGOLIAN LETTER SIBE E;Lo;0;L;;;;;N;;;;;
+ 185E;MONGOLIAN LETTER SIBE I;Lo;0;L;;;;;N;;;;;
+ 185F;MONGOLIAN LETTER SIBE IY;Lo;0;L;;;;;N;;;;;
+ 1860;MONGOLIAN LETTER SIBE UE;Lo;0;L;;;;;N;;;;;
+ 1861;MONGOLIAN LETTER SIBE U;Lo;0;L;;;;;N;;;;;
+ 1862;MONGOLIAN LETTER SIBE ANG;Lo;0;L;;;;;N;;;;;
+ 1863;MONGOLIAN LETTER SIBE KA;Lo;0;L;;;;;N;;;;;
+ 1864;MONGOLIAN LETTER SIBE GA;Lo;0;L;;;;;N;;;;;
+ 1865;MONGOLIAN LETTER SIBE HA;Lo;0;L;;;;;N;;;;;
+ 1866;MONGOLIAN LETTER SIBE PA;Lo;0;L;;;;;N;;;;;
+ 1867;MONGOLIAN LETTER SIBE SHA;Lo;0;L;;;;;N;;;;;
+ 1868;MONGOLIAN LETTER SIBE TA;Lo;0;L;;;;;N;;;;;
+ 1869;MONGOLIAN LETTER SIBE DA;Lo;0;L;;;;;N;;;;;
+ 186A;MONGOLIAN LETTER SIBE JA;Lo;0;L;;;;;N;;;;;
+ 186B;MONGOLIAN LETTER SIBE FA;Lo;0;L;;;;;N;;;;;
+ 186C;MONGOLIAN LETTER SIBE GAA;Lo;0;L;;;;;N;;;;;
+ 186D;MONGOLIAN LETTER SIBE HAA;Lo;0;L;;;;;N;;;;;
+ 186E;MONGOLIAN LETTER SIBE TSA;Lo;0;L;;;;;N;;;;;
+ 186F;MONGOLIAN LETTER SIBE ZA;Lo;0;L;;;;;N;;;;;
+ 1870;MONGOLIAN LETTER SIBE RAA;Lo;0;L;;;;;N;;;;;
+ 1871;MONGOLIAN LETTER SIBE CHA;Lo;0;L;;;;;N;;;;;
+ 1872;MONGOLIAN LETTER SIBE ZHA;Lo;0;L;;;;;N;;;;;
+ 1873;MONGOLIAN LETTER MANCHU I;Lo;0;L;;;;;N;;;;;
+ 1874;MONGOLIAN LETTER MANCHU KA;Lo;0;L;;;;;N;;;;;
+ 1875;MONGOLIAN LETTER MANCHU RA;Lo;0;L;;;;;N;;;;;
+ 1876;MONGOLIAN LETTER MANCHU FA;Lo;0;L;;;;;N;;;;;
+ 1877;MONGOLIAN LETTER MANCHU ZHA;Lo;0;L;;;;;N;;;;;
+ 1878;MONGOLIAN LETTER CHA WITH TWO DOTS;Lo;0;L;;;;;N;;;;;
+ 1880;MONGOLIAN LETTER ALI GALI ANUSVARA ONE;Lo;0;L;;;;;N;;;;;
+ 1881;MONGOLIAN LETTER ALI GALI VISARGA ONE;Lo;0;L;;;;;N;;;;;
+ 1882;MONGOLIAN LETTER ALI GALI DAMARU;Lo;0;L;;;;;N;;;;;
+ 1883;MONGOLIAN LETTER ALI GALI UBADAMA;Lo;0;L;;;;;N;;;;;
+ 1884;MONGOLIAN LETTER ALI GALI INVERTED UBADAMA;Lo;0;L;;;;;N;;;;;
+ 1885;MONGOLIAN LETTER ALI GALI BALUDA;Mn;0;NSM;;;;;N;;;;;
+ 1886;MONGOLIAN LETTER ALI GALI THREE BALUDA;Mn;0;NSM;;;;;N;;;;;
+ 1887;MONGOLIAN LETTER ALI GALI A;Lo;0;L;;;;;N;;;;;
+ 1888;MONGOLIAN LETTER ALI GALI I;Lo;0;L;;;;;N;;;;;
+ 1889;MONGOLIAN LETTER ALI GALI KA;Lo;0;L;;;;;N;;;;;
+ 188A;MONGOLIAN LETTER ALI GALI NGA;Lo;0;L;;;;;N;;;;;
+ 188B;MONGOLIAN LETTER ALI GALI CA;Lo;0;L;;;;;N;;;;;
+ 188C;MONGOLIAN LETTER ALI GALI TTA;Lo;0;L;;;;;N;;;;;
+ 188D;MONGOLIAN LETTER ALI GALI TTHA;Lo;0;L;;;;;N;;;;;
+ 188E;MONGOLIAN LETTER ALI GALI DDA;Lo;0;L;;;;;N;;;;;
+ 188F;MONGOLIAN LETTER ALI GALI NNA;Lo;0;L;;;;;N;;;;;
+ 1890;MONGOLIAN LETTER ALI GALI TA;Lo;0;L;;;;;N;;;;;
+ 1891;MONGOLIAN LETTER ALI GALI DA;Lo;0;L;;;;;N;;;;;
+ 1892;MONGOLIAN LETTER ALI GALI PA;Lo;0;L;;;;;N;;;;;
+ 1893;MONGOLIAN LETTER ALI GALI PHA;Lo;0;L;;;;;N;;;;;
+ 1894;MONGOLIAN LETTER ALI GALI SSA;Lo;0;L;;;;;N;;;;;
+ 1895;MONGOLIAN LETTER ALI GALI ZHA;Lo;0;L;;;;;N;;;;;
+ 1896;MONGOLIAN LETTER ALI GALI ZA;Lo;0;L;;;;;N;;;;;
+ 1897;MONGOLIAN LETTER ALI GALI AH;Lo;0;L;;;;;N;;;;;
+ 1898;MONGOLIAN LETTER TODO ALI GALI TA;Lo;0;L;;;;;N;;;;;
+ 1899;MONGOLIAN LETTER TODO ALI GALI ZHA;Lo;0;L;;;;;N;;;;;
+ 189A;MONGOLIAN LETTER MANCHU ALI GALI GHA;Lo;0;L;;;;;N;;;;;
+ 189B;MONGOLIAN LETTER MANCHU ALI GALI NGA;Lo;0;L;;;;;N;;;;;
+ 189C;MONGOLIAN LETTER MANCHU ALI GALI CA;Lo;0;L;;;;;N;;;;;
+ 189D;MONGOLIAN LETTER MANCHU ALI GALI JHA;Lo;0;L;;;;;N;;;;;
+ 189E;MONGOLIAN LETTER MANCHU ALI GALI TTA;Lo;0;L;;;;;N;;;;;
+ 189F;MONGOLIAN LETTER MANCHU ALI GALI DDHA;Lo;0;L;;;;;N;;;;;
+ 18A0;MONGOLIAN LETTER MANCHU ALI GALI TA;Lo;0;L;;;;;N;;;;;
+ 18A1;MONGOLIAN LETTER MANCHU ALI GALI DHA;Lo;0;L;;;;;N;;;;;
+ 18A2;MONGOLIAN LETTER MANCHU ALI GALI SSA;Lo;0;L;;;;;N;;;;;
+ 18A3;MONGOLIAN LETTER MANCHU ALI GALI CYA;Lo;0;L;;;;;N;;;;;
+ 18A4;MONGOLIAN LETTER MANCHU ALI GALI ZHA;Lo;0;L;;;;;N;;;;;
+ 18A5;MONGOLIAN LETTER MANCHU ALI GALI ZA;Lo;0;L;;;;;N;;;;;
+ 18A6;MONGOLIAN LETTER ALI GALI HALF U;Lo;0;L;;;;;N;;;;;
+ 18A7;MONGOLIAN LETTER ALI GALI HALF YA;Lo;0;L;;;;;N;;;;;
+ 18A8;MONGOLIAN LETTER MANCHU ALI GALI BHA;Lo;0;L;;;;;N;;;;;
+ 18A9;MONGOLIAN LETTER ALI GALI DAGALGA;Mn;228;NSM;;;;;N;;;;;
+ 18AA;MONGOLIAN LETTER MANCHU ALI GALI LHA;Lo;0;L;;;;;N;;;;;
+ 18B0;CANADIAN SYLLABICS OY;Lo;0;L;;;;;N;;;;;
+ 18B1;CANADIAN SYLLABICS AY;Lo;0;L;;;;;N;;;;;
+ 18B2;CANADIAN SYLLABICS AAY;Lo;0;L;;;;;N;;;;;
+ 18B3;CANADIAN SYLLABICS WAY;Lo;0;L;;;;;N;;;;;
+ 18B4;CANADIAN SYLLABICS POY;Lo;0;L;;;;;N;;;;;
+ 18B5;CANADIAN SYLLABICS PAY;Lo;0;L;;;;;N;;;;;
+ 18B6;CANADIAN SYLLABICS PWOY;Lo;0;L;;;;;N;;;;;
+ 18B7;CANADIAN SYLLABICS TAY;Lo;0;L;;;;;N;;;;;
+ 18B8;CANADIAN SYLLABICS KAY;Lo;0;L;;;;;N;;;;;
+ 18B9;CANADIAN SYLLABICS KWAY;Lo;0;L;;;;;N;;;;;
+ 18BA;CANADIAN SYLLABICS MAY;Lo;0;L;;;;;N;;;;;
+ 18BB;CANADIAN SYLLABICS NOY;Lo;0;L;;;;;N;;;;;
+ 18BC;CANADIAN SYLLABICS NAY;Lo;0;L;;;;;N;;;;;
+ 18BD;CANADIAN SYLLABICS LAY;Lo;0;L;;;;;N;;;;;
+ 18BE;CANADIAN SYLLABICS SOY;Lo;0;L;;;;;N;;;;;
+ 18BF;CANADIAN SYLLABICS SAY;Lo;0;L;;;;;N;;;;;
+ 18C0;CANADIAN SYLLABICS SHOY;Lo;0;L;;;;;N;;;;;
+ 18C1;CANADIAN SYLLABICS SHAY;Lo;0;L;;;;;N;;;;;
+ 18C2;CANADIAN SYLLABICS SHWOY;Lo;0;L;;;;;N;;;;;
+ 18C3;CANADIAN SYLLABICS YOY;Lo;0;L;;;;;N;;;;;
+ 18C4;CANADIAN SYLLABICS YAY;Lo;0;L;;;;;N;;;;;
+ 18C5;CANADIAN SYLLABICS RAY;Lo;0;L;;;;;N;;;;;
+ 18C6;CANADIAN SYLLABICS NWI;Lo;0;L;;;;;N;;;;;
+ 18C7;CANADIAN SYLLABICS OJIBWAY NWI;Lo;0;L;;;;;N;;;;;
+ 18C8;CANADIAN SYLLABICS NWII;Lo;0;L;;;;;N;;;;;
+ 18C9;CANADIAN SYLLABICS OJIBWAY NWII;Lo;0;L;;;;;N;;;;;
+ 18CA;CANADIAN SYLLABICS NWO;Lo;0;L;;;;;N;;;;;
+ 18CB;CANADIAN SYLLABICS OJIBWAY NWO;Lo;0;L;;;;;N;;;;;
+ 18CC;CANADIAN SYLLABICS NWOO;Lo;0;L;;;;;N;;;;;
+ 18CD;CANADIAN SYLLABICS OJIBWAY NWOO;Lo;0;L;;;;;N;;;;;
+ 18CE;CANADIAN SYLLABICS RWEE;Lo;0;L;;;;;N;;;;;
+ 18CF;CANADIAN SYLLABICS RWI;Lo;0;L;;;;;N;;;;;
+ 18D0;CANADIAN SYLLABICS RWII;Lo;0;L;;;;;N;;;;;
+ 18D1;CANADIAN SYLLABICS RWO;Lo;0;L;;;;;N;;;;;
+ 18D2;CANADIAN SYLLABICS RWOO;Lo;0;L;;;;;N;;;;;
+ 18D3;CANADIAN SYLLABICS RWA;Lo;0;L;;;;;N;;;;;
+ 18D4;CANADIAN SYLLABICS OJIBWAY P;Lo;0;L;;;;;N;;;;;
+ 18D5;CANADIAN SYLLABICS OJIBWAY T;Lo;0;L;;;;;N;;;;;
+ 18D6;CANADIAN SYLLABICS OJIBWAY K;Lo;0;L;;;;;N;;;;;
+ 18D7;CANADIAN SYLLABICS OJIBWAY C;Lo;0;L;;;;;N;;;;;
+ 18D8;CANADIAN SYLLABICS OJIBWAY M;Lo;0;L;;;;;N;;;;;
+ 18D9;CANADIAN SYLLABICS OJIBWAY N;Lo;0;L;;;;;N;;;;;
+ 18DA;CANADIAN SYLLABICS OJIBWAY S;Lo;0;L;;;;;N;;;;;
+ 18DB;CANADIAN SYLLABICS OJIBWAY SH;Lo;0;L;;;;;N;;;;;
+ 18DC;CANADIAN SYLLABICS EASTERN W;Lo;0;L;;;;;N;;;;;
+ 18DD;CANADIAN SYLLABICS WESTERN W;Lo;0;L;;;;;N;;;;;
+ 18DE;CANADIAN SYLLABICS FINAL SMALL RING;Lo;0;L;;;;;N;;;;;
+ 18DF;CANADIAN SYLLABICS FINAL RAISED DOT;Lo;0;L;;;;;N;;;;;
+ 18E0;CANADIAN SYLLABICS R-CREE RWE;Lo;0;L;;;;;N;;;;;
+ 18E1;CANADIAN SYLLABICS WEST-CREE LOO;Lo;0;L;;;;;N;;;;;
+ 18E2;CANADIAN SYLLABICS WEST-CREE LAA;Lo;0;L;;;;;N;;;;;
+ 18E3;CANADIAN SYLLABICS THWE;Lo;0;L;;;;;N;;;;;
+ 18E4;CANADIAN SYLLABICS THWA;Lo;0;L;;;;;N;;;;;
+ 18E5;CANADIAN SYLLABICS TTHWE;Lo;0;L;;;;;N;;;;;
+ 18E6;CANADIAN SYLLABICS TTHOO;Lo;0;L;;;;;N;;;;;
+ 18E7;CANADIAN SYLLABICS TTHAA;Lo;0;L;;;;;N;;;;;
+ 18E8;CANADIAN SYLLABICS TLHWE;Lo;0;L;;;;;N;;;;;
+ 18E9;CANADIAN SYLLABICS TLHOO;Lo;0;L;;;;;N;;;;;
+ 18EA;CANADIAN SYLLABICS SAYISI SHWE;Lo;0;L;;;;;N;;;;;
+ 18EB;CANADIAN SYLLABICS SAYISI SHOO;Lo;0;L;;;;;N;;;;;
+ 18EC;CANADIAN SYLLABICS SAYISI HOO;Lo;0;L;;;;;N;;;;;
+ 18ED;CANADIAN SYLLABICS CARRIER GWU;Lo;0;L;;;;;N;;;;;
+ 18EE;CANADIAN SYLLABICS CARRIER DENE GEE;Lo;0;L;;;;;N;;;;;
+ 18EF;CANADIAN SYLLABICS CARRIER GAA;Lo;0;L;;;;;N;;;;;
+ 18F0;CANADIAN SYLLABICS CARRIER GWA;Lo;0;L;;;;;N;;;;;
+ 18F1;CANADIAN SYLLABICS SAYISI JUU;Lo;0;L;;;;;N;;;;;
+ 18F2;CANADIAN SYLLABICS CARRIER JWA;Lo;0;L;;;;;N;;;;;
+ 18F3;CANADIAN SYLLABICS BEAVER DENE L;Lo;0;L;;;;;N;;;;;
+ 18F4;CANADIAN SYLLABICS BEAVER DENE R;Lo;0;L;;;;;N;;;;;
+ 18F5;CANADIAN SYLLABICS CARRIER DENTAL S;Lo;0;L;;;;;N;;;;;
+ 1900;LIMBU VOWEL-CARRIER LETTER;Lo;0;L;;;;;N;;;;;
+ 1901;LIMBU LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1902;LIMBU LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 1903;LIMBU LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1904;LIMBU LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 1905;LIMBU LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1906;LIMBU LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1907;LIMBU LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 1908;LIMBU LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1909;LIMBU LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 190A;LIMBU LETTER YAN;Lo;0;L;;;;;N;;;;;
+ 190B;LIMBU LETTER TA;Lo;0;L;;;;;N;;;;;
+ 190C;LIMBU LETTER THA;Lo;0;L;;;;;N;;;;;
+ 190D;LIMBU LETTER DA;Lo;0;L;;;;;N;;;;;
+ 190E;LIMBU LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 190F;LIMBU LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1910;LIMBU LETTER PA;Lo;0;L;;;;;N;;;;;
+ 1911;LIMBU LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 1912;LIMBU LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1913;LIMBU LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 1914;LIMBU LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1915;LIMBU LETTER YA;Lo;0;L;;;;;N;;;;;
+ 1916;LIMBU LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1917;LIMBU LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1918;LIMBU LETTER WA;Lo;0;L;;;;;N;;;;;
+ 1919;LIMBU LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 191A;LIMBU LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 191B;LIMBU LETTER SA;Lo;0;L;;;;;N;;;;;
+ 191C;LIMBU LETTER HA;Lo;0;L;;;;;N;;;;;
+ 191D;LIMBU LETTER GYAN;Lo;0;L;;;;;N;;;;;
+ 191E;LIMBU LETTER TRA;Lo;0;L;;;;;N;;;;;
+ 1920;LIMBU VOWEL SIGN A;Mn;0;NSM;;;;;N;;;;;
+ 1921;LIMBU VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 1922;LIMBU VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 1923;LIMBU VOWEL SIGN EE;Mc;0;L;;;;;N;;;;;
+ 1924;LIMBU VOWEL SIGN AI;Mc;0;L;;;;;N;;;;;
+ 1925;LIMBU VOWEL SIGN OO;Mc;0;L;;;;;N;;;;;
+ 1926;LIMBU VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ 1927;LIMBU VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 1928;LIMBU VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 1929;LIMBU SUBJOINED LETTER YA;Mc;0;L;;;;;N;;;;;
+ 192A;LIMBU SUBJOINED LETTER RA;Mc;0;L;;;;;N;;;;;
+ 192B;LIMBU SUBJOINED LETTER WA;Mc;0;L;;;;;N;;;;;
+ 1930;LIMBU SMALL LETTER KA;Mc;0;L;;;;;N;;;;;
+ 1931;LIMBU SMALL LETTER NGA;Mc;0;L;;;;;N;;;;;
+ 1932;LIMBU SMALL LETTER ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 1933;LIMBU SMALL LETTER TA;Mc;0;L;;;;;N;;;;;
+ 1934;LIMBU SMALL LETTER NA;Mc;0;L;;;;;N;;;;;
+ 1935;LIMBU SMALL LETTER PA;Mc;0;L;;;;;N;;;;;
+ 1936;LIMBU SMALL LETTER MA;Mc;0;L;;;;;N;;;;;
+ 1937;LIMBU SMALL LETTER RA;Mc;0;L;;;;;N;;;;;
+ 1938;LIMBU SMALL LETTER LA;Mc;0;L;;;;;N;;;;;
+ 1939;LIMBU SIGN MUKPHRENG;Mn;222;NSM;;;;;N;;;;;
+ 193A;LIMBU SIGN KEMPHRENG;Mn;230;NSM;;;;;N;;;;;
+ 193B;LIMBU SIGN SA-I;Mn;220;NSM;;;;;N;;;;;
+ 1940;LIMBU SIGN LOO;So;0;ON;;;;;N;;;;;
+ 1944;LIMBU EXCLAMATION MARK;Po;0;ON;;;;;N;;;;;
+ 1945;LIMBU QUESTION MARK;Po;0;ON;;;;;N;;;;;
+ 1946;LIMBU DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 1947;LIMBU DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 1948;LIMBU DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 1949;LIMBU DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 194A;LIMBU DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 194B;LIMBU DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 194C;LIMBU DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 194D;LIMBU DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 194E;LIMBU DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 194F;LIMBU DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 1950;TAI LE LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1951;TAI LE LETTER XA;Lo;0;L;;;;;N;;;;;
+ 1952;TAI LE LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1953;TAI LE LETTER TSA;Lo;0;L;;;;;N;;;;;
+ 1954;TAI LE LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1955;TAI LE LETTER YA;Lo;0;L;;;;;N;;;;;
+ 1956;TAI LE LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1957;TAI LE LETTER THA;Lo;0;L;;;;;N;;;;;
+ 1958;TAI LE LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1959;TAI LE LETTER PA;Lo;0;L;;;;;N;;;;;
+ 195A;TAI LE LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 195B;TAI LE LETTER MA;Lo;0;L;;;;;N;;;;;
+ 195C;TAI LE LETTER FA;Lo;0;L;;;;;N;;;;;
+ 195D;TAI LE LETTER VA;Lo;0;L;;;;;N;;;;;
+ 195E;TAI LE LETTER HA;Lo;0;L;;;;;N;;;;;
+ 195F;TAI LE LETTER QA;Lo;0;L;;;;;N;;;;;
+ 1960;TAI LE LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 1961;TAI LE LETTER TSHA;Lo;0;L;;;;;N;;;;;
+ 1962;TAI LE LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1963;TAI LE LETTER A;Lo;0;L;;;;;N;;;;;
+ 1964;TAI LE LETTER I;Lo;0;L;;;;;N;;;;;
+ 1965;TAI LE LETTER EE;Lo;0;L;;;;;N;;;;;
+ 1966;TAI LE LETTER EH;Lo;0;L;;;;;N;;;;;
+ 1967;TAI LE LETTER U;Lo;0;L;;;;;N;;;;;
+ 1968;TAI LE LETTER OO;Lo;0;L;;;;;N;;;;;
+ 1969;TAI LE LETTER O;Lo;0;L;;;;;N;;;;;
+ 196A;TAI LE LETTER UE;Lo;0;L;;;;;N;;;;;
+ 196B;TAI LE LETTER E;Lo;0;L;;;;;N;;;;;
+ 196C;TAI LE LETTER AUE;Lo;0;L;;;;;N;;;;;
+ 196D;TAI LE LETTER AI;Lo;0;L;;;;;N;;;;;
+ 1970;TAI LE LETTER TONE-2;Lo;0;L;;;;;N;;;;;
+ 1971;TAI LE LETTER TONE-3;Lo;0;L;;;;;N;;;;;
+ 1972;TAI LE LETTER TONE-4;Lo;0;L;;;;;N;;;;;
+ 1973;TAI LE LETTER TONE-5;Lo;0;L;;;;;N;;;;;
+ 1974;TAI LE LETTER TONE-6;Lo;0;L;;;;;N;;;;;
+ 1980;NEW TAI LUE LETTER HIGH QA;Lo;0;L;;;;;N;;;;;
+ 1981;NEW TAI LUE LETTER LOW QA;Lo;0;L;;;;;N;;;;;
+ 1982;NEW TAI LUE LETTER HIGH KA;Lo;0;L;;;;;N;;;;;
+ 1983;NEW TAI LUE LETTER HIGH XA;Lo;0;L;;;;;N;;;;;
+ 1984;NEW TAI LUE LETTER HIGH NGA;Lo;0;L;;;;;N;;;;;
+ 1985;NEW TAI LUE LETTER LOW KA;Lo;0;L;;;;;N;;;;;
+ 1986;NEW TAI LUE LETTER LOW XA;Lo;0;L;;;;;N;;;;;
+ 1987;NEW TAI LUE LETTER LOW NGA;Lo;0;L;;;;;N;;;;;
+ 1988;NEW TAI LUE LETTER HIGH TSA;Lo;0;L;;;;;N;;;;;
+ 1989;NEW TAI LUE LETTER HIGH SA;Lo;0;L;;;;;N;;;;;
+ 198A;NEW TAI LUE LETTER HIGH YA;Lo;0;L;;;;;N;;;;;
+ 198B;NEW TAI LUE LETTER LOW TSA;Lo;0;L;;;;;N;;;;;
+ 198C;NEW TAI LUE LETTER LOW SA;Lo;0;L;;;;;N;;;;;
+ 198D;NEW TAI LUE LETTER LOW YA;Lo;0;L;;;;;N;;;;;
+ 198E;NEW TAI LUE LETTER HIGH TA;Lo;0;L;;;;;N;;;;;
+ 198F;NEW TAI LUE LETTER HIGH THA;Lo;0;L;;;;;N;;;;;
+ 1990;NEW TAI LUE LETTER HIGH NA;Lo;0;L;;;;;N;;;;;
+ 1991;NEW TAI LUE LETTER LOW TA;Lo;0;L;;;;;N;;;;;
+ 1992;NEW TAI LUE LETTER LOW THA;Lo;0;L;;;;;N;;;;;
+ 1993;NEW TAI LUE LETTER LOW NA;Lo;0;L;;;;;N;;;;;
+ 1994;NEW TAI LUE LETTER HIGH PA;Lo;0;L;;;;;N;;;;;
+ 1995;NEW TAI LUE LETTER HIGH PHA;Lo;0;L;;;;;N;;;;;
+ 1996;NEW TAI LUE LETTER HIGH MA;Lo;0;L;;;;;N;;;;;
+ 1997;NEW TAI LUE LETTER LOW PA;Lo;0;L;;;;;N;;;;;
+ 1998;NEW TAI LUE LETTER LOW PHA;Lo;0;L;;;;;N;;;;;
+ 1999;NEW TAI LUE LETTER LOW MA;Lo;0;L;;;;;N;;;;;
+ 199A;NEW TAI LUE LETTER HIGH FA;Lo;0;L;;;;;N;;;;;
+ 199B;NEW TAI LUE LETTER HIGH VA;Lo;0;L;;;;;N;;;;;
+ 199C;NEW TAI LUE LETTER HIGH LA;Lo;0;L;;;;;N;;;;;
+ 199D;NEW TAI LUE LETTER LOW FA;Lo;0;L;;;;;N;;;;;
+ 199E;NEW TAI LUE LETTER LOW VA;Lo;0;L;;;;;N;;;;;
+ 199F;NEW TAI LUE LETTER LOW LA;Lo;0;L;;;;;N;;;;;
+ 19A0;NEW TAI LUE LETTER HIGH HA;Lo;0;L;;;;;N;;;;;
+ 19A1;NEW TAI LUE LETTER HIGH DA;Lo;0;L;;;;;N;;;;;
+ 19A2;NEW TAI LUE LETTER HIGH BA;Lo;0;L;;;;;N;;;;;
+ 19A3;NEW TAI LUE LETTER LOW HA;Lo;0;L;;;;;N;;;;;
+ 19A4;NEW TAI LUE LETTER LOW DA;Lo;0;L;;;;;N;;;;;
+ 19A5;NEW TAI LUE LETTER LOW BA;Lo;0;L;;;;;N;;;;;
+ 19A6;NEW TAI LUE LETTER HIGH KVA;Lo;0;L;;;;;N;;;;;
+ 19A7;NEW TAI LUE LETTER HIGH XVA;Lo;0;L;;;;;N;;;;;
+ 19A8;NEW TAI LUE LETTER LOW KVA;Lo;0;L;;;;;N;;;;;
+ 19A9;NEW TAI LUE LETTER LOW XVA;Lo;0;L;;;;;N;;;;;
+ 19AA;NEW TAI LUE LETTER HIGH SUA;Lo;0;L;;;;;N;;;;;
+ 19AB;NEW TAI LUE LETTER LOW SUA;Lo;0;L;;;;;N;;;;;
+ 19B0;NEW TAI LUE VOWEL SIGN VOWEL SHORTENER;Lo;0;L;;;;;N;;;;;
+ 19B1;NEW TAI LUE VOWEL SIGN AA;Lo;0;L;;;;;N;;;;;
+ 19B2;NEW TAI LUE VOWEL SIGN II;Lo;0;L;;;;;N;;;;;
+ 19B3;NEW TAI LUE VOWEL SIGN U;Lo;0;L;;;;;N;;;;;
+ 19B4;NEW TAI LUE VOWEL SIGN UU;Lo;0;L;;;;;N;;;;;
+ 19B5;NEW TAI LUE VOWEL SIGN E;Lo;0;L;;;;;N;;;;;
+ 19B6;NEW TAI LUE VOWEL SIGN AE;Lo;0;L;;;;;N;;;;;
+ 19B7;NEW TAI LUE VOWEL SIGN O;Lo;0;L;;;;;N;;;;;
+ 19B8;NEW TAI LUE VOWEL SIGN OA;Lo;0;L;;;;;N;;;;;
+ 19B9;NEW TAI LUE VOWEL SIGN UE;Lo;0;L;;;;;N;;;;;
+ 19BA;NEW TAI LUE VOWEL SIGN AY;Lo;0;L;;;;;N;;;;;
+ 19BB;NEW TAI LUE VOWEL SIGN AAY;Lo;0;L;;;;;N;;;;;
+ 19BC;NEW TAI LUE VOWEL SIGN UY;Lo;0;L;;;;;N;;;;;
+ 19BD;NEW TAI LUE VOWEL SIGN OY;Lo;0;L;;;;;N;;;;;
+ 19BE;NEW TAI LUE VOWEL SIGN OAY;Lo;0;L;;;;;N;;;;;
+ 19BF;NEW TAI LUE VOWEL SIGN UEY;Lo;0;L;;;;;N;;;;;
+ 19C0;NEW TAI LUE VOWEL SIGN IY;Lo;0;L;;;;;N;;;;;
+ 19C1;NEW TAI LUE LETTER FINAL V;Lo;0;L;;;;;N;;;;;
+ 19C2;NEW TAI LUE LETTER FINAL NG;Lo;0;L;;;;;N;;;;;
+ 19C3;NEW TAI LUE LETTER FINAL N;Lo;0;L;;;;;N;;;;;
+ 19C4;NEW TAI LUE LETTER FINAL M;Lo;0;L;;;;;N;;;;;
+ 19C5;NEW TAI LUE LETTER FINAL K;Lo;0;L;;;;;N;;;;;
+ 19C6;NEW TAI LUE LETTER FINAL D;Lo;0;L;;;;;N;;;;;
+ 19C7;NEW TAI LUE LETTER FINAL B;Lo;0;L;;;;;N;;;;;
+ 19C8;NEW TAI LUE TONE MARK-1;Lo;0;L;;;;;N;;;;;
+ 19C9;NEW TAI LUE TONE MARK-2;Lo;0;L;;;;;N;;;;;
+ 19D0;NEW TAI LUE DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 19D1;NEW TAI LUE DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 19D2;NEW TAI LUE DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 19D3;NEW TAI LUE DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 19D4;NEW TAI LUE DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 19D5;NEW TAI LUE DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 19D6;NEW TAI LUE DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 19D7;NEW TAI LUE DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 19D8;NEW TAI LUE DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 19D9;NEW TAI LUE DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 19DA;NEW TAI LUE THAM DIGIT ONE;No;0;L;;;1;1;N;;;;;
+ 19DE;NEW TAI LUE SIGN LAE;So;0;ON;;;;;N;;;;;
+ 19DF;NEW TAI LUE SIGN LAEV;So;0;ON;;;;;N;;;;;
+ 19E0;KHMER SYMBOL PATHAMASAT;So;0;ON;;;;;N;;;;;
+ 19E1;KHMER SYMBOL MUOY KOET;So;0;ON;;;;;N;;;;;
+ 19E2;KHMER SYMBOL PII KOET;So;0;ON;;;;;N;;;;;
+ 19E3;KHMER SYMBOL BEI KOET;So;0;ON;;;;;N;;;;;
+ 19E4;KHMER SYMBOL BUON KOET;So;0;ON;;;;;N;;;;;
+ 19E5;KHMER SYMBOL PRAM KOET;So;0;ON;;;;;N;;;;;
+ 19E6;KHMER SYMBOL PRAM-MUOY KOET;So;0;ON;;;;;N;;;;;
+ 19E7;KHMER SYMBOL PRAM-PII KOET;So;0;ON;;;;;N;;;;;
+ 19E8;KHMER SYMBOL PRAM-BEI KOET;So;0;ON;;;;;N;;;;;
+ 19E9;KHMER SYMBOL PRAM-BUON KOET;So;0;ON;;;;;N;;;;;
+ 19EA;KHMER SYMBOL DAP KOET;So;0;ON;;;;;N;;;;;
+ 19EB;KHMER SYMBOL DAP-MUOY KOET;So;0;ON;;;;;N;;;;;
+ 19EC;KHMER SYMBOL DAP-PII KOET;So;0;ON;;;;;N;;;;;
+ 19ED;KHMER SYMBOL DAP-BEI KOET;So;0;ON;;;;;N;;;;;
+ 19EE;KHMER SYMBOL DAP-BUON KOET;So;0;ON;;;;;N;;;;;
+ 19EF;KHMER SYMBOL DAP-PRAM KOET;So;0;ON;;;;;N;;;;;
+ 19F0;KHMER SYMBOL TUTEYASAT;So;0;ON;;;;;N;;;;;
+ 19F1;KHMER SYMBOL MUOY ROC;So;0;ON;;;;;N;;;;;
+ 19F2;KHMER SYMBOL PII ROC;So;0;ON;;;;;N;;;;;
+ 19F3;KHMER SYMBOL BEI ROC;So;0;ON;;;;;N;;;;;
+ 19F4;KHMER SYMBOL BUON ROC;So;0;ON;;;;;N;;;;;
+ 19F5;KHMER SYMBOL PRAM ROC;So;0;ON;;;;;N;;;;;
+ 19F6;KHMER SYMBOL PRAM-MUOY ROC;So;0;ON;;;;;N;;;;;
+ 19F7;KHMER SYMBOL PRAM-PII ROC;So;0;ON;;;;;N;;;;;
+ 19F8;KHMER SYMBOL PRAM-BEI ROC;So;0;ON;;;;;N;;;;;
+ 19F9;KHMER SYMBOL PRAM-BUON ROC;So;0;ON;;;;;N;;;;;
+ 19FA;KHMER SYMBOL DAP ROC;So;0;ON;;;;;N;;;;;
+ 19FB;KHMER SYMBOL DAP-MUOY ROC;So;0;ON;;;;;N;;;;;
+ 19FC;KHMER SYMBOL DAP-PII ROC;So;0;ON;;;;;N;;;;;
+ 19FD;KHMER SYMBOL DAP-BEI ROC;So;0;ON;;;;;N;;;;;
+ 19FE;KHMER SYMBOL DAP-BUON ROC;So;0;ON;;;;;N;;;;;
+ 19FF;KHMER SYMBOL DAP-PRAM ROC;So;0;ON;;;;;N;;;;;
+ 1A00;BUGINESE LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1A01;BUGINESE LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1A02;BUGINESE LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1A03;BUGINESE LETTER NGKA;Lo;0;L;;;;;N;;;;;
+ 1A04;BUGINESE LETTER PA;Lo;0;L;;;;;N;;;;;
+ 1A05;BUGINESE LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1A06;BUGINESE LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1A07;BUGINESE LETTER MPA;Lo;0;L;;;;;N;;;;;
+ 1A08;BUGINESE LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1A09;BUGINESE LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1A0A;BUGINESE LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1A0B;BUGINESE LETTER NRA;Lo;0;L;;;;;N;;;;;
+ 1A0C;BUGINESE LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1A0D;BUGINESE LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1A0E;BUGINESE LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 1A0F;BUGINESE LETTER NYCA;Lo;0;L;;;;;N;;;;;
+ 1A10;BUGINESE LETTER YA;Lo;0;L;;;;;N;;;;;
+ 1A11;BUGINESE LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1A12;BUGINESE LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1A13;BUGINESE LETTER VA;Lo;0;L;;;;;N;;;;;
+ 1A14;BUGINESE LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1A15;BUGINESE LETTER A;Lo;0;L;;;;;N;;;;;
+ 1A16;BUGINESE LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1A17;BUGINESE VOWEL SIGN I;Mn;230;NSM;;;;;N;;;;;
+ 1A18;BUGINESE VOWEL SIGN U;Mn;220;NSM;;;;;N;;;;;
+ 1A19;BUGINESE VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 1A1A;BUGINESE VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ 1A1B;BUGINESE VOWEL SIGN AE;Mn;0;NSM;;;;;N;;;;;
+ 1A1E;BUGINESE PALLAWA;Po;0;L;;;;;N;;;;;
+ 1A1F;BUGINESE END OF SECTION;Po;0;L;;;;;N;;;;;
+ 1A20;TAI THAM LETTER HIGH KA;Lo;0;L;;;;;N;;;;;
+ 1A21;TAI THAM LETTER HIGH KHA;Lo;0;L;;;;;N;;;;;
+ 1A22;TAI THAM LETTER HIGH KXA;Lo;0;L;;;;;N;;;;;
+ 1A23;TAI THAM LETTER LOW KA;Lo;0;L;;;;;N;;;;;
+ 1A24;TAI THAM LETTER LOW KXA;Lo;0;L;;;;;N;;;;;
+ 1A25;TAI THAM LETTER LOW KHA;Lo;0;L;;;;;N;;;;;
+ 1A26;TAI THAM LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1A27;TAI THAM LETTER HIGH CA;Lo;0;L;;;;;N;;;;;
+ 1A28;TAI THAM LETTER HIGH CHA;Lo;0;L;;;;;N;;;;;
+ 1A29;TAI THAM LETTER LOW CA;Lo;0;L;;;;;N;;;;;
+ 1A2A;TAI THAM LETTER LOW SA;Lo;0;L;;;;;N;;;;;
+ 1A2B;TAI THAM LETTER LOW CHA;Lo;0;L;;;;;N;;;;;
+ 1A2C;TAI THAM LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 1A2D;TAI THAM LETTER RATA;Lo;0;L;;;;;N;;;;;
+ 1A2E;TAI THAM LETTER HIGH RATHA;Lo;0;L;;;;;N;;;;;
+ 1A2F;TAI THAM LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1A30;TAI THAM LETTER LOW RATHA;Lo;0;L;;;;;N;;;;;
+ 1A31;TAI THAM LETTER RANA;Lo;0;L;;;;;N;;;;;
+ 1A32;TAI THAM LETTER HIGH TA;Lo;0;L;;;;;N;;;;;
+ 1A33;TAI THAM LETTER HIGH THA;Lo;0;L;;;;;N;;;;;
+ 1A34;TAI THAM LETTER LOW TA;Lo;0;L;;;;;N;;;;;
+ 1A35;TAI THAM LETTER LOW THA;Lo;0;L;;;;;N;;;;;
+ 1A36;TAI THAM LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1A37;TAI THAM LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1A38;TAI THAM LETTER HIGH PA;Lo;0;L;;;;;N;;;;;
+ 1A39;TAI THAM LETTER HIGH PHA;Lo;0;L;;;;;N;;;;;
+ 1A3A;TAI THAM LETTER HIGH FA;Lo;0;L;;;;;N;;;;;
+ 1A3B;TAI THAM LETTER LOW PA;Lo;0;L;;;;;N;;;;;
+ 1A3C;TAI THAM LETTER LOW FA;Lo;0;L;;;;;N;;;;;
+ 1A3D;TAI THAM LETTER LOW PHA;Lo;0;L;;;;;N;;;;;
+ 1A3E;TAI THAM LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1A3F;TAI THAM LETTER LOW YA;Lo;0;L;;;;;N;;;;;
+ 1A40;TAI THAM LETTER HIGH YA;Lo;0;L;;;;;N;;;;;
+ 1A41;TAI THAM LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1A42;TAI THAM LETTER RUE;Lo;0;L;;;;;N;;;;;
+ 1A43;TAI THAM LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1A44;TAI THAM LETTER LUE;Lo;0;L;;;;;N;;;;;
+ 1A45;TAI THAM LETTER WA;Lo;0;L;;;;;N;;;;;
+ 1A46;TAI THAM LETTER HIGH SHA;Lo;0;L;;;;;N;;;;;
+ 1A47;TAI THAM LETTER HIGH SSA;Lo;0;L;;;;;N;;;;;
+ 1A48;TAI THAM LETTER HIGH SA;Lo;0;L;;;;;N;;;;;
+ 1A49;TAI THAM LETTER HIGH HA;Lo;0;L;;;;;N;;;;;
+ 1A4A;TAI THAM LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 1A4B;TAI THAM LETTER A;Lo;0;L;;;;;N;;;;;
+ 1A4C;TAI THAM LETTER LOW HA;Lo;0;L;;;;;N;;;;;
+ 1A4D;TAI THAM LETTER I;Lo;0;L;;;;;N;;;;;
+ 1A4E;TAI THAM LETTER II;Lo;0;L;;;;;N;;;;;
+ 1A4F;TAI THAM LETTER U;Lo;0;L;;;;;N;;;;;
+ 1A50;TAI THAM LETTER UU;Lo;0;L;;;;;N;;;;;
+ 1A51;TAI THAM LETTER EE;Lo;0;L;;;;;N;;;;;
+ 1A52;TAI THAM LETTER OO;Lo;0;L;;;;;N;;;;;
+ 1A53;TAI THAM LETTER LAE;Lo;0;L;;;;;N;;;;;
+ 1A54;TAI THAM LETTER GREAT SA;Lo;0;L;;;;;N;;;;;
+ 1A55;TAI THAM CONSONANT SIGN MEDIAL RA;Mc;0;L;;;;;N;;;;;
+ 1A56;TAI THAM CONSONANT SIGN MEDIAL LA;Mn;0;NSM;;;;;N;;;;;
+ 1A57;TAI THAM CONSONANT SIGN LA TANG LAI;Mc;0;L;;;;;N;;;;;
+ 1A58;TAI THAM SIGN MAI KANG LAI;Mn;0;NSM;;;;;N;;;;;
+ 1A59;TAI THAM CONSONANT SIGN FINAL NGA;Mn;0;NSM;;;;;N;;;;;
+ 1A5A;TAI THAM CONSONANT SIGN LOW PA;Mn;0;NSM;;;;;N;;;;;
+ 1A5B;TAI THAM CONSONANT SIGN HIGH RATHA OR LOW PA;Mn;0;NSM;;;;;N;;;;;
+ 1A5C;TAI THAM CONSONANT SIGN MA;Mn;0;NSM;;;;;N;;;;;
+ 1A5D;TAI THAM CONSONANT SIGN BA;Mn;0;NSM;;;;;N;;;;;
+ 1A5E;TAI THAM CONSONANT SIGN SA;Mn;0;NSM;;;;;N;;;;;
+ 1A60;TAI THAM SIGN SAKOT;Mn;9;NSM;;;;;N;;;;;
+ 1A61;TAI THAM VOWEL SIGN A;Mc;0;L;;;;;N;;;;;
+ 1A62;TAI THAM VOWEL SIGN MAI SAT;Mn;0;NSM;;;;;N;;;;;
+ 1A63;TAI THAM VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 1A64;TAI THAM VOWEL SIGN TALL AA;Mc;0;L;;;;;N;;;;;
+ 1A65;TAI THAM VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 1A66;TAI THAM VOWEL SIGN II;Mn;0;NSM;;;;;N;;;;;
+ 1A67;TAI THAM VOWEL SIGN UE;Mn;0;NSM;;;;;N;;;;;
+ 1A68;TAI THAM VOWEL SIGN UUE;Mn;0;NSM;;;;;N;;;;;
+ 1A69;TAI THAM VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 1A6A;TAI THAM VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 1A6B;TAI THAM VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 1A6C;TAI THAM VOWEL SIGN OA BELOW;Mn;0;NSM;;;;;N;;;;;
+ 1A6D;TAI THAM VOWEL SIGN OY;Mc;0;L;;;;;N;;;;;
+ 1A6E;TAI THAM VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 1A6F;TAI THAM VOWEL SIGN AE;Mc;0;L;;;;;N;;;;;
+ 1A70;TAI THAM VOWEL SIGN OO;Mc;0;L;;;;;N;;;;;
+ 1A71;TAI THAM VOWEL SIGN AI;Mc;0;L;;;;;N;;;;;
+ 1A72;TAI THAM VOWEL SIGN THAM AI;Mc;0;L;;;;;N;;;;;
+ 1A73;TAI THAM VOWEL SIGN OA ABOVE;Mn;0;NSM;;;;;N;;;;;
+ 1A74;TAI THAM SIGN MAI KANG;Mn;0;NSM;;;;;N;;;;;
+ 1A75;TAI THAM SIGN TONE-1;Mn;230;NSM;;;;;N;;;;;
+ 1A76;TAI THAM SIGN TONE-2;Mn;230;NSM;;;;;N;;;;;
+ 1A77;TAI THAM SIGN KHUEN TONE-3;Mn;230;NSM;;;;;N;;;;;
+ 1A78;TAI THAM SIGN KHUEN TONE-4;Mn;230;NSM;;;;;N;;;;;
+ 1A79;TAI THAM SIGN KHUEN TONE-5;Mn;230;NSM;;;;;N;;;;;
+ 1A7A;TAI THAM SIGN RA HAAM;Mn;230;NSM;;;;;N;;;;;
+ 1A7B;TAI THAM SIGN MAI SAM;Mn;230;NSM;;;;;N;;;;;
+ 1A7C;TAI THAM SIGN KHUEN-LUE KARAN;Mn;230;NSM;;;;;N;;;;;
+ 1A7F;TAI THAM COMBINING CRYPTOGRAMMIC DOT;Mn;220;NSM;;;;;N;;;;;
+ 1A80;TAI THAM HORA DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 1A81;TAI THAM HORA DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 1A82;TAI THAM HORA DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 1A83;TAI THAM HORA DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 1A84;TAI THAM HORA DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 1A85;TAI THAM HORA DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 1A86;TAI THAM HORA DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 1A87;TAI THAM HORA DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 1A88;TAI THAM HORA DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 1A89;TAI THAM HORA DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 1A90;TAI THAM THAM DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 1A91;TAI THAM THAM DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 1A92;TAI THAM THAM DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 1A93;TAI THAM THAM DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 1A94;TAI THAM THAM DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 1A95;TAI THAM THAM DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 1A96;TAI THAM THAM DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 1A97;TAI THAM THAM DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 1A98;TAI THAM THAM DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 1A99;TAI THAM THAM DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 1AA0;TAI THAM SIGN WIANG;Po;0;L;;;;;N;;;;;
+ 1AA1;TAI THAM SIGN WIANGWAAK;Po;0;L;;;;;N;;;;;
+ 1AA2;TAI THAM SIGN SAWAN;Po;0;L;;;;;N;;;;;
+ 1AA3;TAI THAM SIGN KEOW;Po;0;L;;;;;N;;;;;
+ 1AA4;TAI THAM SIGN HOY;Po;0;L;;;;;N;;;;;
+ 1AA5;TAI THAM SIGN DOKMAI;Po;0;L;;;;;N;;;;;
+ 1AA6;TAI THAM SIGN REVERSED ROTATED RANA;Po;0;L;;;;;N;;;;;
+ 1AA7;TAI THAM SIGN MAI YAMOK;Lm;0;L;;;;;N;;;;;
+ 1AA8;TAI THAM SIGN KAAN;Po;0;L;;;;;N;;;;;
+ 1AA9;TAI THAM SIGN KAANKUU;Po;0;L;;;;;N;;;;;
+ 1AAA;TAI THAM SIGN SATKAAN;Po;0;L;;;;;N;;;;;
+ 1AAB;TAI THAM SIGN SATKAANKUU;Po;0;L;;;;;N;;;;;
+ 1AAC;TAI THAM SIGN HANG;Po;0;L;;;;;N;;;;;
+ 1AAD;TAI THAM SIGN CAANG;Po;0;L;;;;;N;;;;;
+ 1AB0;COMBINING DOUBLED CIRCUMFLEX ACCENT;Mn;230;NSM;;;;;N;;;;;
+ 1AB1;COMBINING DIAERESIS-RING;Mn;230;NSM;;;;;N;;;;;
+ 1AB2;COMBINING INFINITY;Mn;230;NSM;;;;;N;;;;;
+ 1AB3;COMBINING DOWNWARDS ARROW;Mn;230;NSM;;;;;N;;;;;
+ 1AB4;COMBINING TRIPLE DOT;Mn;230;NSM;;;;;N;;;;;
+ 1AB5;COMBINING X-X BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1AB6;COMBINING WIGGLY LINE BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1AB7;COMBINING OPEN MARK BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1AB8;COMBINING DOUBLE OPEN MARK BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1AB9;COMBINING LIGHT CENTRALIZATION STROKE BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1ABA;COMBINING STRONG CENTRALIZATION STROKE BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1ABB;COMBINING PARENTHESES ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 1ABC;COMBINING DOUBLE PARENTHESES ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 1ABD;COMBINING PARENTHESES BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1ABE;COMBINING PARENTHESES OVERLAY;Me;0;NSM;;;;;N;;;;;
+ 1B00;BALINESE SIGN ULU RICEM;Mn;0;NSM;;;;;N;;;;;
+ 1B01;BALINESE SIGN ULU CANDRA;Mn;0;NSM;;;;;N;;;;;
+ 1B02;BALINESE SIGN CECEK;Mn;0;NSM;;;;;N;;;;;
+ 1B03;BALINESE SIGN SURANG;Mn;0;NSM;;;;;N;;;;;
+ 1B04;BALINESE SIGN BISAH;Mc;0;L;;;;;N;;;;;
+ 1B05;BALINESE LETTER AKARA;Lo;0;L;;;;;N;;;;;
+ 1B06;BALINESE LETTER AKARA TEDUNG;Lo;0;L;1B05 1B35;;;;N;;;;;
+ 1B07;BALINESE LETTER IKARA;Lo;0;L;;;;;N;;;;;
+ 1B08;BALINESE LETTER IKARA TEDUNG;Lo;0;L;1B07 1B35;;;;N;;;;;
+ 1B09;BALINESE LETTER UKARA;Lo;0;L;;;;;N;;;;;
+ 1B0A;BALINESE LETTER UKARA TEDUNG;Lo;0;L;1B09 1B35;;;;N;;;;;
+ 1B0B;BALINESE LETTER RA REPA;Lo;0;L;;;;;N;;;;;
+ 1B0C;BALINESE LETTER RA REPA TEDUNG;Lo;0;L;1B0B 1B35;;;;N;;;;;
+ 1B0D;BALINESE LETTER LA LENGA;Lo;0;L;;;;;N;;;;;
+ 1B0E;BALINESE LETTER LA LENGA TEDUNG;Lo;0;L;1B0D 1B35;;;;N;;;;;
+ 1B0F;BALINESE LETTER EKARA;Lo;0;L;;;;;N;;;;;
+ 1B10;BALINESE LETTER AIKARA;Lo;0;L;;;;;N;;;;;
+ 1B11;BALINESE LETTER OKARA;Lo;0;L;;;;;N;;;;;
+ 1B12;BALINESE LETTER OKARA TEDUNG;Lo;0;L;1B11 1B35;;;;N;;;;;
+ 1B13;BALINESE LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1B14;BALINESE LETTER KA MAHAPRANA;Lo;0;L;;;;;N;;;;;
+ 1B15;BALINESE LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1B16;BALINESE LETTER GA GORA;Lo;0;L;;;;;N;;;;;
+ 1B17;BALINESE LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1B18;BALINESE LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1B19;BALINESE LETTER CA LACA;Lo;0;L;;;;;N;;;;;
+ 1B1A;BALINESE LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1B1B;BALINESE LETTER JA JERA;Lo;0;L;;;;;N;;;;;
+ 1B1C;BALINESE LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 1B1D;BALINESE LETTER TA LATIK;Lo;0;L;;;;;N;;;;;
+ 1B1E;BALINESE LETTER TA MURDA MAHAPRANA;Lo;0;L;;;;;N;;;;;
+ 1B1F;BALINESE LETTER DA MURDA ALPAPRANA;Lo;0;L;;;;;N;;;;;
+ 1B20;BALINESE LETTER DA MURDA MAHAPRANA;Lo;0;L;;;;;N;;;;;
+ 1B21;BALINESE LETTER NA RAMBAT;Lo;0;L;;;;;N;;;;;
+ 1B22;BALINESE LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1B23;BALINESE LETTER TA TAWA;Lo;0;L;;;;;N;;;;;
+ 1B24;BALINESE LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1B25;BALINESE LETTER DA MADU;Lo;0;L;;;;;N;;;;;
+ 1B26;BALINESE LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1B27;BALINESE LETTER PA;Lo;0;L;;;;;N;;;;;
+ 1B28;BALINESE LETTER PA KAPAL;Lo;0;L;;;;;N;;;;;
+ 1B29;BALINESE LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1B2A;BALINESE LETTER BA KEMBANG;Lo;0;L;;;;;N;;;;;
+ 1B2B;BALINESE LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1B2C;BALINESE LETTER YA;Lo;0;L;;;;;N;;;;;
+ 1B2D;BALINESE LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1B2E;BALINESE LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1B2F;BALINESE LETTER WA;Lo;0;L;;;;;N;;;;;
+ 1B30;BALINESE LETTER SA SAGA;Lo;0;L;;;;;N;;;;;
+ 1B31;BALINESE LETTER SA SAPA;Lo;0;L;;;;;N;;;;;
+ 1B32;BALINESE LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1B33;BALINESE LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1B34;BALINESE SIGN REREKAN;Mn;7;NSM;;;;;N;;;;;
+ 1B35;BALINESE VOWEL SIGN TEDUNG;Mc;0;L;;;;;N;;;;;
+ 1B36;BALINESE VOWEL SIGN ULU;Mn;0;NSM;;;;;N;;;;;
+ 1B37;BALINESE VOWEL SIGN ULU SARI;Mn;0;NSM;;;;;N;;;;;
+ 1B38;BALINESE VOWEL SIGN SUKU;Mn;0;NSM;;;;;N;;;;;
+ 1B39;BALINESE VOWEL SIGN SUKU ILUT;Mn;0;NSM;;;;;N;;;;;
+ 1B3A;BALINESE VOWEL SIGN RA REPA;Mn;0;NSM;;;;;N;;;;;
+ 1B3B;BALINESE VOWEL SIGN RA REPA TEDUNG;Mc;0;L;1B3A 1B35;;;;N;;;;;
+ 1B3C;BALINESE VOWEL SIGN LA LENGA;Mn;0;NSM;;;;;N;;;;;
+ 1B3D;BALINESE VOWEL SIGN LA LENGA TEDUNG;Mc;0;L;1B3C 1B35;;;;N;;;;;
+ 1B3E;BALINESE VOWEL SIGN TALING;Mc;0;L;;;;;N;;;;;
+ 1B3F;BALINESE VOWEL SIGN TALING REPA;Mc;0;L;;;;;N;;;;;
+ 1B40;BALINESE VOWEL SIGN TALING TEDUNG;Mc;0;L;1B3E 1B35;;;;N;;;;;
+ 1B41;BALINESE VOWEL SIGN TALING REPA TEDUNG;Mc;0;L;1B3F 1B35;;;;N;;;;;
+ 1B42;BALINESE VOWEL SIGN PEPET;Mn;0;NSM;;;;;N;;;;;
+ 1B43;BALINESE VOWEL SIGN PEPET TEDUNG;Mc;0;L;1B42 1B35;;;;N;;;;;
+ 1B44;BALINESE ADEG ADEG;Mc;9;L;;;;;N;;;;;
+ 1B45;BALINESE LETTER KAF SASAK;Lo;0;L;;;;;N;;;;;
+ 1B46;BALINESE LETTER KHOT SASAK;Lo;0;L;;;;;N;;;;;
+ 1B47;BALINESE LETTER TZIR SASAK;Lo;0;L;;;;;N;;;;;
+ 1B48;BALINESE LETTER EF SASAK;Lo;0;L;;;;;N;;;;;
+ 1B49;BALINESE LETTER VE SASAK;Lo;0;L;;;;;N;;;;;
+ 1B4A;BALINESE LETTER ZAL SASAK;Lo;0;L;;;;;N;;;;;
+ 1B4B;BALINESE LETTER ASYURA SASAK;Lo;0;L;;;;;N;;;;;
+ 1B50;BALINESE DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 1B51;BALINESE DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 1B52;BALINESE DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 1B53;BALINESE DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 1B54;BALINESE DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 1B55;BALINESE DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 1B56;BALINESE DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 1B57;BALINESE DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 1B58;BALINESE DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 1B59;BALINESE DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 1B5A;BALINESE PANTI;Po;0;L;;;;;N;;;;;
+ 1B5B;BALINESE PAMADA;Po;0;L;;;;;N;;;;;
+ 1B5C;BALINESE WINDU;Po;0;L;;;;;N;;;;;
+ 1B5D;BALINESE CARIK PAMUNGKAH;Po;0;L;;;;;N;;;;;
+ 1B5E;BALINESE CARIK SIKI;Po;0;L;;;;;N;;;;;
+ 1B5F;BALINESE CARIK PAREREN;Po;0;L;;;;;N;;;;;
+ 1B60;BALINESE PAMENENG;Po;0;L;;;;;N;;;;;
+ 1B61;BALINESE MUSICAL SYMBOL DONG;So;0;L;;;;;N;;;;;
+ 1B62;BALINESE MUSICAL SYMBOL DENG;So;0;L;;;;;N;;;;;
+ 1B63;BALINESE MUSICAL SYMBOL DUNG;So;0;L;;;;;N;;;;;
+ 1B64;BALINESE MUSICAL SYMBOL DANG;So;0;L;;;;;N;;;;;
+ 1B65;BALINESE MUSICAL SYMBOL DANG SURANG;So;0;L;;;;;N;;;;;
+ 1B66;BALINESE MUSICAL SYMBOL DING;So;0;L;;;;;N;;;;;
+ 1B67;BALINESE MUSICAL SYMBOL DAENG;So;0;L;;;;;N;;;;;
+ 1B68;BALINESE MUSICAL SYMBOL DEUNG;So;0;L;;;;;N;;;;;
+ 1B69;BALINESE MUSICAL SYMBOL DAING;So;0;L;;;;;N;;;;;
+ 1B6A;BALINESE MUSICAL SYMBOL DANG GEDE;So;0;L;;;;;N;;;;;
+ 1B6B;BALINESE MUSICAL SYMBOL COMBINING TEGEH;Mn;230;NSM;;;;;N;;;;;
+ 1B6C;BALINESE MUSICAL SYMBOL COMBINING ENDEP;Mn;220;NSM;;;;;N;;;;;
+ 1B6D;BALINESE MUSICAL SYMBOL COMBINING KEMPUL;Mn;230;NSM;;;;;N;;;;;
+ 1B6E;BALINESE MUSICAL SYMBOL COMBINING KEMPLI;Mn;230;NSM;;;;;N;;;;;
+ 1B6F;BALINESE MUSICAL SYMBOL COMBINING JEGOGAN;Mn;230;NSM;;;;;N;;;;;
+ 1B70;BALINESE MUSICAL SYMBOL COMBINING KEMPUL WITH JEGOGAN;Mn;230;NSM;;;;;N;;;;;
+ 1B71;BALINESE MUSICAL SYMBOL COMBINING KEMPLI WITH JEGOGAN;Mn;230;NSM;;;;;N;;;;;
+ 1B72;BALINESE MUSICAL SYMBOL COMBINING BENDE;Mn;230;NSM;;;;;N;;;;;
+ 1B73;BALINESE MUSICAL SYMBOL COMBINING GONG;Mn;230;NSM;;;;;N;;;;;
+ 1B74;BALINESE MUSICAL SYMBOL RIGHT-HAND OPEN DUG;So;0;L;;;;;N;;;;;
+ 1B75;BALINESE MUSICAL SYMBOL RIGHT-HAND OPEN DAG;So;0;L;;;;;N;;;;;
+ 1B76;BALINESE MUSICAL SYMBOL RIGHT-HAND CLOSED TUK;So;0;L;;;;;N;;;;;
+ 1B77;BALINESE MUSICAL SYMBOL RIGHT-HAND CLOSED TAK;So;0;L;;;;;N;;;;;
+ 1B78;BALINESE MUSICAL SYMBOL LEFT-HAND OPEN PANG;So;0;L;;;;;N;;;;;
+ 1B79;BALINESE MUSICAL SYMBOL LEFT-HAND OPEN PUNG;So;0;L;;;;;N;;;;;
+ 1B7A;BALINESE MUSICAL SYMBOL LEFT-HAND CLOSED PLAK;So;0;L;;;;;N;;;;;
+ 1B7B;BALINESE MUSICAL SYMBOL LEFT-HAND CLOSED PLUK;So;0;L;;;;;N;;;;;
+ 1B7C;BALINESE MUSICAL SYMBOL LEFT-HAND OPEN PING;So;0;L;;;;;N;;;;;
+ 1B80;SUNDANESE SIGN PANYECEK;Mn;0;NSM;;;;;N;;;;;
+ 1B81;SUNDANESE SIGN PANGLAYAR;Mn;0;NSM;;;;;N;;;;;
+ 1B82;SUNDANESE SIGN PANGWISAD;Mc;0;L;;;;;N;;;;;
+ 1B83;SUNDANESE LETTER A;Lo;0;L;;;;;N;;;;;
+ 1B84;SUNDANESE LETTER I;Lo;0;L;;;;;N;;;;;
+ 1B85;SUNDANESE LETTER U;Lo;0;L;;;;;N;;;;;
+ 1B86;SUNDANESE LETTER AE;Lo;0;L;;;;;N;;;;;
+ 1B87;SUNDANESE LETTER O;Lo;0;L;;;;;N;;;;;
+ 1B88;SUNDANESE LETTER E;Lo;0;L;;;;;N;;;;;
+ 1B89;SUNDANESE LETTER EU;Lo;0;L;;;;;N;;;;;
+ 1B8A;SUNDANESE LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1B8B;SUNDANESE LETTER QA;Lo;0;L;;;;;N;;;;;
+ 1B8C;SUNDANESE LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1B8D;SUNDANESE LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1B8E;SUNDANESE LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1B8F;SUNDANESE LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1B90;SUNDANESE LETTER ZA;Lo;0;L;;;;;N;;;;;
+ 1B91;SUNDANESE LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 1B92;SUNDANESE LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1B93;SUNDANESE LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1B94;SUNDANESE LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1B95;SUNDANESE LETTER PA;Lo;0;L;;;;;N;;;;;
+ 1B96;SUNDANESE LETTER FA;Lo;0;L;;;;;N;;;;;
+ 1B97;SUNDANESE LETTER VA;Lo;0;L;;;;;N;;;;;
+ 1B98;SUNDANESE LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1B99;SUNDANESE LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1B9A;SUNDANESE LETTER YA;Lo;0;L;;;;;N;;;;;
+ 1B9B;SUNDANESE LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1B9C;SUNDANESE LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1B9D;SUNDANESE LETTER WA;Lo;0;L;;;;;N;;;;;
+ 1B9E;SUNDANESE LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1B9F;SUNDANESE LETTER XA;Lo;0;L;;;;;N;;;;;
+ 1BA0;SUNDANESE LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1BA1;SUNDANESE CONSONANT SIGN PAMINGKAL;Mc;0;L;;;;;N;;;;;
+ 1BA2;SUNDANESE CONSONANT SIGN PANYAKRA;Mn;0;NSM;;;;;N;;;;;
+ 1BA3;SUNDANESE CONSONANT SIGN PANYIKU;Mn;0;NSM;;;;;N;;;;;
+ 1BA4;SUNDANESE VOWEL SIGN PANGHULU;Mn;0;NSM;;;;;N;;;;;
+ 1BA5;SUNDANESE VOWEL SIGN PANYUKU;Mn;0;NSM;;;;;N;;;;;
+ 1BA6;SUNDANESE VOWEL SIGN PANAELAENG;Mc;0;L;;;;;N;;;;;
+ 1BA7;SUNDANESE VOWEL SIGN PANOLONG;Mc;0;L;;;;;N;;;;;
+ 1BA8;SUNDANESE VOWEL SIGN PAMEPET;Mn;0;NSM;;;;;N;;;;;
+ 1BA9;SUNDANESE VOWEL SIGN PANEULEUNG;Mn;0;NSM;;;;;N;;;;;
+ 1BAA;SUNDANESE SIGN PAMAAEH;Mc;9;L;;;;;N;;;;;
+ 1BAB;SUNDANESE SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 1BAC;SUNDANESE CONSONANT SIGN PASANGAN MA;Mn;0;NSM;;;;;N;;;;;
+ 1BAD;SUNDANESE CONSONANT SIGN PASANGAN WA;Mn;0;NSM;;;;;N;;;;;
+ 1BAE;SUNDANESE LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 1BAF;SUNDANESE LETTER SYA;Lo;0;L;;;;;N;;;;;
+ 1BB0;SUNDANESE DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 1BB1;SUNDANESE DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 1BB2;SUNDANESE DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 1BB3;SUNDANESE DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 1BB4;SUNDANESE DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 1BB5;SUNDANESE DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 1BB6;SUNDANESE DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 1BB7;SUNDANESE DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 1BB8;SUNDANESE DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 1BB9;SUNDANESE DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 1BBA;SUNDANESE AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 1BBB;SUNDANESE LETTER REU;Lo;0;L;;;;;N;;;;;
+ 1BBC;SUNDANESE LETTER LEU;Lo;0;L;;;;;N;;;;;
+ 1BBD;SUNDANESE LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 1BBE;SUNDANESE LETTER FINAL K;Lo;0;L;;;;;N;;;;;
+ 1BBF;SUNDANESE LETTER FINAL M;Lo;0;L;;;;;N;;;;;
+ 1BC0;BATAK LETTER A;Lo;0;L;;;;;N;;;;;
+ 1BC1;BATAK LETTER SIMALUNGUN A;Lo;0;L;;;;;N;;;;;
+ 1BC2;BATAK LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1BC3;BATAK LETTER SIMALUNGUN HA;Lo;0;L;;;;;N;;;;;
+ 1BC4;BATAK LETTER MANDAILING HA;Lo;0;L;;;;;N;;;;;
+ 1BC5;BATAK LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1BC6;BATAK LETTER KARO BA;Lo;0;L;;;;;N;;;;;
+ 1BC7;BATAK LETTER PA;Lo;0;L;;;;;N;;;;;
+ 1BC8;BATAK LETTER SIMALUNGUN PA;Lo;0;L;;;;;N;;;;;
+ 1BC9;BATAK LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1BCA;BATAK LETTER MANDAILING NA;Lo;0;L;;;;;N;;;;;
+ 1BCB;BATAK LETTER WA;Lo;0;L;;;;;N;;;;;
+ 1BCC;BATAK LETTER SIMALUNGUN WA;Lo;0;L;;;;;N;;;;;
+ 1BCD;BATAK LETTER PAKPAK WA;Lo;0;L;;;;;N;;;;;
+ 1BCE;BATAK LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1BCF;BATAK LETTER SIMALUNGUN GA;Lo;0;L;;;;;N;;;;;
+ 1BD0;BATAK LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1BD1;BATAK LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1BD2;BATAK LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1BD3;BATAK LETTER SIMALUNGUN RA;Lo;0;L;;;;;N;;;;;
+ 1BD4;BATAK LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1BD5;BATAK LETTER SIMALUNGUN MA;Lo;0;L;;;;;N;;;;;
+ 1BD6;BATAK LETTER SOUTHERN TA;Lo;0;L;;;;;N;;;;;
+ 1BD7;BATAK LETTER NORTHERN TA;Lo;0;L;;;;;N;;;;;
+ 1BD8;BATAK LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1BD9;BATAK LETTER SIMALUNGUN SA;Lo;0;L;;;;;N;;;;;
+ 1BDA;BATAK LETTER MANDAILING SA;Lo;0;L;;;;;N;;;;;
+ 1BDB;BATAK LETTER YA;Lo;0;L;;;;;N;;;;;
+ 1BDC;BATAK LETTER SIMALUNGUN YA;Lo;0;L;;;;;N;;;;;
+ 1BDD;BATAK LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1BDE;BATAK LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1BDF;BATAK LETTER SIMALUNGUN LA;Lo;0;L;;;;;N;;;;;
+ 1BE0;BATAK LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 1BE1;BATAK LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1BE2;BATAK LETTER NDA;Lo;0;L;;;;;N;;;;;
+ 1BE3;BATAK LETTER MBA;Lo;0;L;;;;;N;;;;;
+ 1BE4;BATAK LETTER I;Lo;0;L;;;;;N;;;;;
+ 1BE5;BATAK LETTER U;Lo;0;L;;;;;N;;;;;
+ 1BE6;BATAK SIGN TOMPI;Mn;7;NSM;;;;;N;;;;;
+ 1BE7;BATAK VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 1BE8;BATAK VOWEL SIGN PAKPAK E;Mn;0;NSM;;;;;N;;;;;
+ 1BE9;BATAK VOWEL SIGN EE;Mn;0;NSM;;;;;N;;;;;
+ 1BEA;BATAK VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 1BEB;BATAK VOWEL SIGN KARO I;Mc;0;L;;;;;N;;;;;
+ 1BEC;BATAK VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ 1BED;BATAK VOWEL SIGN KARO O;Mn;0;NSM;;;;;N;;;;;
+ 1BEE;BATAK VOWEL SIGN U;Mc;0;L;;;;;N;;;;;
+ 1BEF;BATAK VOWEL SIGN U FOR SIMALUNGUN SA;Mn;0;NSM;;;;;N;;;;;
+ 1BF0;BATAK CONSONANT SIGN NG;Mn;0;NSM;;;;;N;;;;;
+ 1BF1;BATAK CONSONANT SIGN H;Mn;0;NSM;;;;;N;;;;;
+ 1BF2;BATAK PANGOLAT;Mc;9;L;;;;;N;;;;;
+ 1BF3;BATAK PANONGONAN;Mc;9;L;;;;;N;;;;;
+ 1BFC;BATAK SYMBOL BINDU NA METEK;Po;0;L;;;;;N;;;;;
+ 1BFD;BATAK SYMBOL BINDU PINARBORAS;Po;0;L;;;;;N;;;;;
+ 1BFE;BATAK SYMBOL BINDU JUDUL;Po;0;L;;;;;N;;;;;
+ 1BFF;BATAK SYMBOL BINDU PANGOLAT;Po;0;L;;;;;N;;;;;
+ 1C00;LEPCHA LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1C01;LEPCHA LETTER KLA;Lo;0;L;;;;;N;;;;;
+ 1C02;LEPCHA LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 1C03;LEPCHA LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1C04;LEPCHA LETTER GLA;Lo;0;L;;;;;N;;;;;
+ 1C05;LEPCHA LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1C06;LEPCHA LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1C07;LEPCHA LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 1C08;LEPCHA LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1C09;LEPCHA LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 1C0A;LEPCHA LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1C0B;LEPCHA LETTER THA;Lo;0;L;;;;;N;;;;;
+ 1C0C;LEPCHA LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1C0D;LEPCHA LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1C0E;LEPCHA LETTER PA;Lo;0;L;;;;;N;;;;;
+ 1C0F;LEPCHA LETTER PLA;Lo;0;L;;;;;N;;;;;
+ 1C10;LEPCHA LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 1C11;LEPCHA LETTER FA;Lo;0;L;;;;;N;;;;;
+ 1C12;LEPCHA LETTER FLA;Lo;0;L;;;;;N;;;;;
+ 1C13;LEPCHA LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1C14;LEPCHA LETTER BLA;Lo;0;L;;;;;N;;;;;
+ 1C15;LEPCHA LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1C16;LEPCHA LETTER MLA;Lo;0;L;;;;;N;;;;;
+ 1C17;LEPCHA LETTER TSA;Lo;0;L;;;;;N;;;;;
+ 1C18;LEPCHA LETTER TSHA;Lo;0;L;;;;;N;;;;;
+ 1C19;LEPCHA LETTER DZA;Lo;0;L;;;;;N;;;;;
+ 1C1A;LEPCHA LETTER YA;Lo;0;L;;;;;N;;;;;
+ 1C1B;LEPCHA LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1C1C;LEPCHA LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1C1D;LEPCHA LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1C1E;LEPCHA LETTER HLA;Lo;0;L;;;;;N;;;;;
+ 1C1F;LEPCHA LETTER VA;Lo;0;L;;;;;N;;;;;
+ 1C20;LEPCHA LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1C21;LEPCHA LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 1C22;LEPCHA LETTER WA;Lo;0;L;;;;;N;;;;;
+ 1C23;LEPCHA LETTER A;Lo;0;L;;;;;N;;;;;
+ 1C24;LEPCHA SUBJOINED LETTER YA;Mc;0;L;;;;;N;;;;;
+ 1C25;LEPCHA SUBJOINED LETTER RA;Mc;0;L;;;;;N;;;;;
+ 1C26;LEPCHA VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 1C27;LEPCHA VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 1C28;LEPCHA VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ 1C29;LEPCHA VOWEL SIGN OO;Mc;0;L;;;;;N;;;;;
+ 1C2A;LEPCHA VOWEL SIGN U;Mc;0;L;;;;;N;;;;;
+ 1C2B;LEPCHA VOWEL SIGN UU;Mc;0;L;;;;;N;;;;;
+ 1C2C;LEPCHA VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 1C2D;LEPCHA CONSONANT SIGN K;Mn;0;NSM;;;;;N;;;;;
+ 1C2E;LEPCHA CONSONANT SIGN M;Mn;0;NSM;;;;;N;;;;;
+ 1C2F;LEPCHA CONSONANT SIGN L;Mn;0;NSM;;;;;N;;;;;
+ 1C30;LEPCHA CONSONANT SIGN N;Mn;0;NSM;;;;;N;;;;;
+ 1C31;LEPCHA CONSONANT SIGN P;Mn;0;NSM;;;;;N;;;;;
+ 1C32;LEPCHA CONSONANT SIGN R;Mn;0;NSM;;;;;N;;;;;
+ 1C33;LEPCHA CONSONANT SIGN T;Mn;0;NSM;;;;;N;;;;;
+ 1C34;LEPCHA CONSONANT SIGN NYIN-DO;Mc;0;L;;;;;N;;;;;
+ 1C35;LEPCHA CONSONANT SIGN KANG;Mc;0;L;;;;;N;;;;;
+ 1C36;LEPCHA SIGN RAN;Mn;0;NSM;;;;;N;;;;;
+ 1C37;LEPCHA SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 1C3B;LEPCHA PUNCTUATION TA-ROL;Po;0;L;;;;;N;;;;;
+ 1C3C;LEPCHA PUNCTUATION NYET THYOOM TA-ROL;Po;0;L;;;;;N;;;;;
+ 1C3D;LEPCHA PUNCTUATION CER-WA;Po;0;L;;;;;N;;;;;
+ 1C3E;LEPCHA PUNCTUATION TSHOOK CER-WA;Po;0;L;;;;;N;;;;;
+ 1C3F;LEPCHA PUNCTUATION TSHOOK;Po;0;L;;;;;N;;;;;
+ 1C40;LEPCHA DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 1C41;LEPCHA DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 1C42;LEPCHA DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 1C43;LEPCHA DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 1C44;LEPCHA DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 1C45;LEPCHA DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 1C46;LEPCHA DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 1C47;LEPCHA DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 1C48;LEPCHA DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 1C49;LEPCHA DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 1C4D;LEPCHA LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 1C4E;LEPCHA LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 1C4F;LEPCHA LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 1C50;OL CHIKI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 1C51;OL CHIKI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 1C52;OL CHIKI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 1C53;OL CHIKI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 1C54;OL CHIKI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 1C55;OL CHIKI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 1C56;OL CHIKI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 1C57;OL CHIKI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 1C58;OL CHIKI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 1C59;OL CHIKI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 1C5A;OL CHIKI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1C5B;OL CHIKI LETTER AT;Lo;0;L;;;;;N;;;;;
+ 1C5C;OL CHIKI LETTER AG;Lo;0;L;;;;;N;;;;;
+ 1C5D;OL CHIKI LETTER ANG;Lo;0;L;;;;;N;;;;;
+ 1C5E;OL CHIKI LETTER AL;Lo;0;L;;;;;N;;;;;
+ 1C5F;OL CHIKI LETTER LAA;Lo;0;L;;;;;N;;;;;
+ 1C60;OL CHIKI LETTER AAK;Lo;0;L;;;;;N;;;;;
+ 1C61;OL CHIKI LETTER AAJ;Lo;0;L;;;;;N;;;;;
+ 1C62;OL CHIKI LETTER AAM;Lo;0;L;;;;;N;;;;;
+ 1C63;OL CHIKI LETTER AAW;Lo;0;L;;;;;N;;;;;
+ 1C64;OL CHIKI LETTER LI;Lo;0;L;;;;;N;;;;;
+ 1C65;OL CHIKI LETTER IS;Lo;0;L;;;;;N;;;;;
+ 1C66;OL CHIKI LETTER IH;Lo;0;L;;;;;N;;;;;
+ 1C67;OL CHIKI LETTER INY;Lo;0;L;;;;;N;;;;;
+ 1C68;OL CHIKI LETTER IR;Lo;0;L;;;;;N;;;;;
+ 1C69;OL CHIKI LETTER LU;Lo;0;L;;;;;N;;;;;
+ 1C6A;OL CHIKI LETTER UC;Lo;0;L;;;;;N;;;;;
+ 1C6B;OL CHIKI LETTER UD;Lo;0;L;;;;;N;;;;;
+ 1C6C;OL CHIKI LETTER UNN;Lo;0;L;;;;;N;;;;;
+ 1C6D;OL CHIKI LETTER UY;Lo;0;L;;;;;N;;;;;
+ 1C6E;OL CHIKI LETTER LE;Lo;0;L;;;;;N;;;;;
+ 1C6F;OL CHIKI LETTER EP;Lo;0;L;;;;;N;;;;;
+ 1C70;OL CHIKI LETTER EDD;Lo;0;L;;;;;N;;;;;
+ 1C71;OL CHIKI LETTER EN;Lo;0;L;;;;;N;;;;;
+ 1C72;OL CHIKI LETTER ERR;Lo;0;L;;;;;N;;;;;
+ 1C73;OL CHIKI LETTER LO;Lo;0;L;;;;;N;;;;;
+ 1C74;OL CHIKI LETTER OTT;Lo;0;L;;;;;N;;;;;
+ 1C75;OL CHIKI LETTER OB;Lo;0;L;;;;;N;;;;;
+ 1C76;OL CHIKI LETTER OV;Lo;0;L;;;;;N;;;;;
+ 1C77;OL CHIKI LETTER OH;Lo;0;L;;;;;N;;;;;
+ 1C78;OL CHIKI MU TTUDDAG;Lm;0;L;;;;;N;;;;;
+ 1C79;OL CHIKI GAAHLAA TTUDDAAG;Lm;0;L;;;;;N;;;;;
+ 1C7A;OL CHIKI MU-GAAHLAA TTUDDAAG;Lm;0;L;;;;;N;;;;;
+ 1C7B;OL CHIKI RELAA;Lm;0;L;;;;;N;;;;;
+ 1C7C;OL CHIKI PHAARKAA;Lm;0;L;;;;;N;;;;;
+ 1C7D;OL CHIKI AHAD;Lm;0;L;;;;;N;;;;;
+ 1C7E;OL CHIKI PUNCTUATION MUCAAD;Po;0;L;;;;;N;;;;;
+ 1C7F;OL CHIKI PUNCTUATION DOUBLE MUCAAD;Po;0;L;;;;;N;;;;;
+ 1C80;CYRILLIC SMALL LETTER ROUNDED VE;Ll;0;L;;;;;N;;;0412;;0412
+ 1C81;CYRILLIC SMALL LETTER LONG-LEGGED DE;Ll;0;L;;;;;N;;;0414;;0414
+ 1C82;CYRILLIC SMALL LETTER NARROW O;Ll;0;L;;;;;N;;;041E;;041E
+ 1C83;CYRILLIC SMALL LETTER WIDE ES;Ll;0;L;;;;;N;;;0421;;0421
+ 1C84;CYRILLIC SMALL LETTER TALL TE;Ll;0;L;;;;;N;;;0422;;0422
+ 1C85;CYRILLIC SMALL LETTER THREE-LEGGED TE;Ll;0;L;;;;;N;;;0422;;0422
+ 1C86;CYRILLIC SMALL LETTER TALL HARD SIGN;Ll;0;L;;;;;N;;;042A;;042A
+ 1C87;CYRILLIC SMALL LETTER TALL YAT;Ll;0;L;;;;;N;;;0462;;0462
+ 1C88;CYRILLIC SMALL LETTER UNBLENDED UK;Ll;0;L;;;;;N;;;A64A;;A64A
+ 1C90;GEORGIAN MTAVRULI CAPITAL LETTER AN;Lu;0;L;;;;;N;;;;10D0;
+ 1C91;GEORGIAN MTAVRULI CAPITAL LETTER BAN;Lu;0;L;;;;;N;;;;10D1;
+ 1C92;GEORGIAN MTAVRULI CAPITAL LETTER GAN;Lu;0;L;;;;;N;;;;10D2;
+ 1C93;GEORGIAN MTAVRULI CAPITAL LETTER DON;Lu;0;L;;;;;N;;;;10D3;
+ 1C94;GEORGIAN MTAVRULI CAPITAL LETTER EN;Lu;0;L;;;;;N;;;;10D4;
+ 1C95;GEORGIAN MTAVRULI CAPITAL LETTER VIN;Lu;0;L;;;;;N;;;;10D5;
+ 1C96;GEORGIAN MTAVRULI CAPITAL LETTER ZEN;Lu;0;L;;;;;N;;;;10D6;
+ 1C97;GEORGIAN MTAVRULI CAPITAL LETTER TAN;Lu;0;L;;;;;N;;;;10D7;
+ 1C98;GEORGIAN MTAVRULI CAPITAL LETTER IN;Lu;0;L;;;;;N;;;;10D8;
+ 1C99;GEORGIAN MTAVRULI CAPITAL LETTER KAN;Lu;0;L;;;;;N;;;;10D9;
+ 1C9A;GEORGIAN MTAVRULI CAPITAL LETTER LAS;Lu;0;L;;;;;N;;;;10DA;
+ 1C9B;GEORGIAN MTAVRULI CAPITAL LETTER MAN;Lu;0;L;;;;;N;;;;10DB;
+ 1C9C;GEORGIAN MTAVRULI CAPITAL LETTER NAR;Lu;0;L;;;;;N;;;;10DC;
+ 1C9D;GEORGIAN MTAVRULI CAPITAL LETTER ON;Lu;0;L;;;;;N;;;;10DD;
+ 1C9E;GEORGIAN MTAVRULI CAPITAL LETTER PAR;Lu;0;L;;;;;N;;;;10DE;
+ 1C9F;GEORGIAN MTAVRULI CAPITAL LETTER ZHAR;Lu;0;L;;;;;N;;;;10DF;
+ 1CA0;GEORGIAN MTAVRULI CAPITAL LETTER RAE;Lu;0;L;;;;;N;;;;10E0;
+ 1CA1;GEORGIAN MTAVRULI CAPITAL LETTER SAN;Lu;0;L;;;;;N;;;;10E1;
+ 1CA2;GEORGIAN MTAVRULI CAPITAL LETTER TAR;Lu;0;L;;;;;N;;;;10E2;
+ 1CA3;GEORGIAN MTAVRULI CAPITAL LETTER UN;Lu;0;L;;;;;N;;;;10E3;
+ 1CA4;GEORGIAN MTAVRULI CAPITAL LETTER PHAR;Lu;0;L;;;;;N;;;;10E4;
+ 1CA5;GEORGIAN MTAVRULI CAPITAL LETTER KHAR;Lu;0;L;;;;;N;;;;10E5;
+ 1CA6;GEORGIAN MTAVRULI CAPITAL LETTER GHAN;Lu;0;L;;;;;N;;;;10E6;
+ 1CA7;GEORGIAN MTAVRULI CAPITAL LETTER QAR;Lu;0;L;;;;;N;;;;10E7;
+ 1CA8;GEORGIAN MTAVRULI CAPITAL LETTER SHIN;Lu;0;L;;;;;N;;;;10E8;
+ 1CA9;GEORGIAN MTAVRULI CAPITAL LETTER CHIN;Lu;0;L;;;;;N;;;;10E9;
+ 1CAA;GEORGIAN MTAVRULI CAPITAL LETTER CAN;Lu;0;L;;;;;N;;;;10EA;
+ 1CAB;GEORGIAN MTAVRULI CAPITAL LETTER JIL;Lu;0;L;;;;;N;;;;10EB;
+ 1CAC;GEORGIAN MTAVRULI CAPITAL LETTER CIL;Lu;0;L;;;;;N;;;;10EC;
+ 1CAD;GEORGIAN MTAVRULI CAPITAL LETTER CHAR;Lu;0;L;;;;;N;;;;10ED;
+ 1CAE;GEORGIAN MTAVRULI CAPITAL LETTER XAN;Lu;0;L;;;;;N;;;;10EE;
+ 1CAF;GEORGIAN MTAVRULI CAPITAL LETTER JHAN;Lu;0;L;;;;;N;;;;10EF;
+ 1CB0;GEORGIAN MTAVRULI CAPITAL LETTER HAE;Lu;0;L;;;;;N;;;;10F0;
+ 1CB1;GEORGIAN MTAVRULI CAPITAL LETTER HE;Lu;0;L;;;;;N;;;;10F1;
+ 1CB2;GEORGIAN MTAVRULI CAPITAL LETTER HIE;Lu;0;L;;;;;N;;;;10F2;
+ 1CB3;GEORGIAN MTAVRULI CAPITAL LETTER WE;Lu;0;L;;;;;N;;;;10F3;
+ 1CB4;GEORGIAN MTAVRULI CAPITAL LETTER HAR;Lu;0;L;;;;;N;;;;10F4;
+ 1CB5;GEORGIAN MTAVRULI CAPITAL LETTER HOE;Lu;0;L;;;;;N;;;;10F5;
+ 1CB6;GEORGIAN MTAVRULI CAPITAL LETTER FI;Lu;0;L;;;;;N;;;;10F6;
+ 1CB7;GEORGIAN MTAVRULI CAPITAL LETTER YN;Lu;0;L;;;;;N;;;;10F7;
+ 1CB8;GEORGIAN MTAVRULI CAPITAL LETTER ELIFI;Lu;0;L;;;;;N;;;;10F8;
+ 1CB9;GEORGIAN MTAVRULI CAPITAL LETTER TURNED GAN;Lu;0;L;;;;;N;;;;10F9;
+ 1CBA;GEORGIAN MTAVRULI CAPITAL LETTER AIN;Lu;0;L;;;;;N;;;;10FA;
+ 1CBD;GEORGIAN MTAVRULI CAPITAL LETTER AEN;Lu;0;L;;;;;N;;;;10FD;
+ 1CBE;GEORGIAN MTAVRULI CAPITAL LETTER HARD SIGN;Lu;0;L;;;;;N;;;;10FE;
+ 1CBF;GEORGIAN MTAVRULI CAPITAL LETTER LABIAL SIGN;Lu;0;L;;;;;N;;;;10FF;
+ 1CC0;SUNDANESE PUNCTUATION BINDU SURYA;Po;0;L;;;;;N;;;;;
+ 1CC1;SUNDANESE PUNCTUATION BINDU PANGLONG;Po;0;L;;;;;N;;;;;
+ 1CC2;SUNDANESE PUNCTUATION BINDU PURNAMA;Po;0;L;;;;;N;;;;;
+ 1CC3;SUNDANESE PUNCTUATION BINDU CAKRA;Po;0;L;;;;;N;;;;;
+ 1CC4;SUNDANESE PUNCTUATION BINDU LEU SATANGA;Po;0;L;;;;;N;;;;;
+ 1CC5;SUNDANESE PUNCTUATION BINDU KA SATANGA;Po;0;L;;;;;N;;;;;
+ 1CC6;SUNDANESE PUNCTUATION BINDU DA SATANGA;Po;0;L;;;;;N;;;;;
+ 1CC7;SUNDANESE PUNCTUATION BINDU BA SATANGA;Po;0;L;;;;;N;;;;;
+ 1CD0;VEDIC TONE KARSHANA;Mn;230;NSM;;;;;N;;;;;
+ 1CD1;VEDIC TONE SHARA;Mn;230;NSM;;;;;N;;;;;
+ 1CD2;VEDIC TONE PRENKHA;Mn;230;NSM;;;;;N;;;;;
+ 1CD3;VEDIC SIGN NIHSHVASA;Po;0;L;;;;;N;;;;;
+ 1CD4;VEDIC SIGN YAJURVEDIC MIDLINE SVARITA;Mn;1;NSM;;;;;N;;;;;
+ 1CD5;VEDIC TONE YAJURVEDIC AGGRAVATED INDEPENDENT SVARITA;Mn;220;NSM;;;;;N;;;;;
+ 1CD6;VEDIC TONE YAJURVEDIC INDEPENDENT SVARITA;Mn;220;NSM;;;;;N;;;;;
+ 1CD7;VEDIC TONE YAJURVEDIC KATHAKA INDEPENDENT SVARITA;Mn;220;NSM;;;;;N;;;;;
+ 1CD8;VEDIC TONE CANDRA BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1CD9;VEDIC TONE YAJURVEDIC KATHAKA INDEPENDENT SVARITA SCHROEDER;Mn;220;NSM;;;;;N;;;;;
+ 1CDA;VEDIC TONE DOUBLE SVARITA;Mn;230;NSM;;;;;N;;;;;
+ 1CDB;VEDIC TONE TRIPLE SVARITA;Mn;230;NSM;;;;;N;;;;;
+ 1CDC;VEDIC TONE KATHAKA ANUDATTA;Mn;220;NSM;;;;;N;;;;;
+ 1CDD;VEDIC TONE DOT BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1CDE;VEDIC TONE TWO DOTS BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1CDF;VEDIC TONE THREE DOTS BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1CE0;VEDIC TONE RIGVEDIC KASHMIRI INDEPENDENT SVARITA;Mn;230;NSM;;;;;N;;;;;
+ 1CE1;VEDIC TONE ATHARVAVEDIC INDEPENDENT SVARITA;Mc;0;L;;;;;N;;;;;
+ 1CE2;VEDIC SIGN VISARGA SVARITA;Mn;1;NSM;;;;;N;;;;;
+ 1CE3;VEDIC SIGN VISARGA UDATTA;Mn;1;NSM;;;;;N;;;;;
+ 1CE4;VEDIC SIGN REVERSED VISARGA UDATTA;Mn;1;NSM;;;;;N;;;;;
+ 1CE5;VEDIC SIGN VISARGA ANUDATTA;Mn;1;NSM;;;;;N;;;;;
+ 1CE6;VEDIC SIGN REVERSED VISARGA ANUDATTA;Mn;1;NSM;;;;;N;;;;;
+ 1CE7;VEDIC SIGN VISARGA UDATTA WITH TAIL;Mn;1;NSM;;;;;N;;;;;
+ 1CE8;VEDIC SIGN VISARGA ANUDATTA WITH TAIL;Mn;1;NSM;;;;;N;;;;;
+ 1CE9;VEDIC SIGN ANUSVARA ANTARGOMUKHA;Lo;0;L;;;;;N;;;;;
+ 1CEA;VEDIC SIGN ANUSVARA BAHIRGOMUKHA;Lo;0;L;;;;;N;;;;;
+ 1CEB;VEDIC SIGN ANUSVARA VAMAGOMUKHA;Lo;0;L;;;;;N;;;;;
+ 1CEC;VEDIC SIGN ANUSVARA VAMAGOMUKHA WITH TAIL;Lo;0;L;;;;;N;;;;;
+ 1CED;VEDIC SIGN TIRYAK;Mn;220;NSM;;;;;N;;;;;
+ 1CEE;VEDIC SIGN HEXIFORM LONG ANUSVARA;Lo;0;L;;;;;N;;;;;
+ 1CEF;VEDIC SIGN LONG ANUSVARA;Lo;0;L;;;;;N;;;;;
+ 1CF0;VEDIC SIGN RTHANG LONG ANUSVARA;Lo;0;L;;;;;N;;;;;
+ 1CF1;VEDIC SIGN ANUSVARA UBHAYATO MUKHA;Lo;0;L;;;;;N;;;;;
+ 1CF2;VEDIC SIGN ARDHAVISARGA;Lo;0;L;;;;;N;;;;;
+ 1CF3;VEDIC SIGN ROTATED ARDHAVISARGA;Lo;0;L;;;;;N;;;;;
+ 1CF4;VEDIC TONE CANDRA ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 1CF5;VEDIC SIGN JIHVAMULIYA;Lo;0;L;;;;;N;;;;;
+ 1CF6;VEDIC SIGN UPADHMANIYA;Lo;0;L;;;;;N;;;;;
+ 1CF7;VEDIC SIGN ATIKRAMA;Mc;0;L;;;;;N;;;;;
+ 1CF8;VEDIC TONE RING ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 1CF9;VEDIC TONE DOUBLE RING ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 1CFA;VEDIC SIGN DOUBLE ANUSVARA ANTARGOMUKHA;Lo;0;L;;;;;N;;;;;
+ 1D00;LATIN LETTER SMALL CAPITAL A;Ll;0;L;;;;;N;;;;;
+ 1D01;LATIN LETTER SMALL CAPITAL AE;Ll;0;L;;;;;N;;;;;
+ 1D02;LATIN SMALL LETTER TURNED AE;Ll;0;L;;;;;N;;;;;
+ 1D03;LATIN LETTER SMALL CAPITAL BARRED B;Ll;0;L;;;;;N;;;;;
+ 1D04;LATIN LETTER SMALL CAPITAL C;Ll;0;L;;;;;N;;;;;
+ 1D05;LATIN LETTER SMALL CAPITAL D;Ll;0;L;;;;;N;;;;;
+ 1D06;LATIN LETTER SMALL CAPITAL ETH;Ll;0;L;;;;;N;;;;;
+ 1D07;LATIN LETTER SMALL CAPITAL E;Ll;0;L;;;;;N;;;;;
+ 1D08;LATIN SMALL LETTER TURNED OPEN E;Ll;0;L;;;;;N;;;;;
+ 1D09;LATIN SMALL LETTER TURNED I;Ll;0;L;;;;;N;;;;;
+ 1D0A;LATIN LETTER SMALL CAPITAL J;Ll;0;L;;;;;N;;;;;
+ 1D0B;LATIN LETTER SMALL CAPITAL K;Ll;0;L;;;;;N;;;;;
+ 1D0C;LATIN LETTER SMALL CAPITAL L WITH STROKE;Ll;0;L;;;;;N;;;;;
+ 1D0D;LATIN LETTER SMALL CAPITAL M;Ll;0;L;;;;;N;;;;;
+ 1D0E;LATIN LETTER SMALL CAPITAL REVERSED N;Ll;0;L;;;;;N;;;;;
+ 1D0F;LATIN LETTER SMALL CAPITAL O;Ll;0;L;;;;;N;;;;;
+ 1D10;LATIN LETTER SMALL CAPITAL OPEN O;Ll;0;L;;;;;N;;;;;
+ 1D11;LATIN SMALL LETTER SIDEWAYS O;Ll;0;L;;;;;N;;;;;
+ 1D12;LATIN SMALL LETTER SIDEWAYS OPEN O;Ll;0;L;;;;;N;;;;;
+ 1D13;LATIN SMALL LETTER SIDEWAYS O WITH STROKE;Ll;0;L;;;;;N;;;;;
+ 1D14;LATIN SMALL LETTER TURNED OE;Ll;0;L;;;;;N;;;;;
+ 1D15;LATIN LETTER SMALL CAPITAL OU;Ll;0;L;;;;;N;;;;;
+ 1D16;LATIN SMALL LETTER TOP HALF O;Ll;0;L;;;;;N;;;;;
+ 1D17;LATIN SMALL LETTER BOTTOM HALF O;Ll;0;L;;;;;N;;;;;
+ 1D18;LATIN LETTER SMALL CAPITAL P;Ll;0;L;;;;;N;;;;;
+ 1D19;LATIN LETTER SMALL CAPITAL REVERSED R;Ll;0;L;;;;;N;;;;;
+ 1D1A;LATIN LETTER SMALL CAPITAL TURNED R;Ll;0;L;;;;;N;;;;;
+ 1D1B;LATIN LETTER SMALL CAPITAL T;Ll;0;L;;;;;N;;;;;
+ 1D1C;LATIN LETTER SMALL CAPITAL U;Ll;0;L;;;;;N;;;;;
+ 1D1D;LATIN SMALL LETTER SIDEWAYS U;Ll;0;L;;;;;N;;;;;
+ 1D1E;LATIN SMALL LETTER SIDEWAYS DIAERESIZED U;Ll;0;L;;;;;N;;;;;
+ 1D1F;LATIN SMALL LETTER SIDEWAYS TURNED M;Ll;0;L;;;;;N;;;;;
+ 1D20;LATIN LETTER SMALL CAPITAL V;Ll;0;L;;;;;N;;;;;
+ 1D21;LATIN LETTER SMALL CAPITAL W;Ll;0;L;;;;;N;;;;;
+ 1D22;LATIN LETTER SMALL CAPITAL Z;Ll;0;L;;;;;N;;;;;
+ 1D23;LATIN LETTER SMALL CAPITAL EZH;Ll;0;L;;;;;N;;;;;
+ 1D24;LATIN LETTER VOICED LARYNGEAL SPIRANT;Ll;0;L;;;;;N;;;;;
+ 1D25;LATIN LETTER AIN;Ll;0;L;;;;;N;;;;;
+ 1D26;GREEK LETTER SMALL CAPITAL GAMMA;Ll;0;L;;;;;N;;;;;
+ 1D27;GREEK LETTER SMALL CAPITAL LAMDA;Ll;0;L;;;;;N;;;;;
+ 1D28;GREEK LETTER SMALL CAPITAL PI;Ll;0;L;;;;;N;;;;;
+ 1D29;GREEK LETTER SMALL CAPITAL RHO;Ll;0;L;;;;;N;;;;;
+ 1D2A;GREEK LETTER SMALL CAPITAL PSI;Ll;0;L;;;;;N;;;;;
+ 1D2B;CYRILLIC LETTER SMALL CAPITAL EL;Ll;0;L;;;;;N;;;;;
+ 1D2C;MODIFIER LETTER CAPITAL A;Lm;0;L;<super> 0041;;;;N;;;;;
+ 1D2D;MODIFIER LETTER CAPITAL AE;Lm;0;L;<super> 00C6;;;;N;;;;;
+ 1D2E;MODIFIER LETTER CAPITAL B;Lm;0;L;<super> 0042;;;;N;;;;;
+ 1D2F;MODIFIER LETTER CAPITAL BARRED B;Lm;0;L;;;;;N;;;;;
+ 1D30;MODIFIER LETTER CAPITAL D;Lm;0;L;<super> 0044;;;;N;;;;;
+ 1D31;MODIFIER LETTER CAPITAL E;Lm;0;L;<super> 0045;;;;N;;;;;
+ 1D32;MODIFIER LETTER CAPITAL REVERSED E;Lm;0;L;<super> 018E;;;;N;;;;;
+ 1D33;MODIFIER LETTER CAPITAL G;Lm;0;L;<super> 0047;;;;N;;;;;
+ 1D34;MODIFIER LETTER CAPITAL H;Lm;0;L;<super> 0048;;;;N;;;;;
+ 1D35;MODIFIER LETTER CAPITAL I;Lm;0;L;<super> 0049;;;;N;;;;;
+ 1D36;MODIFIER LETTER CAPITAL J;Lm;0;L;<super> 004A;;;;N;;;;;
+ 1D37;MODIFIER LETTER CAPITAL K;Lm;0;L;<super> 004B;;;;N;;;;;
+ 1D38;MODIFIER LETTER CAPITAL L;Lm;0;L;<super> 004C;;;;N;;;;;
+ 1D39;MODIFIER LETTER CAPITAL M;Lm;0;L;<super> 004D;;;;N;;;;;
+ 1D3A;MODIFIER LETTER CAPITAL N;Lm;0;L;<super> 004E;;;;N;;;;;
+ 1D3B;MODIFIER LETTER CAPITAL REVERSED N;Lm;0;L;;;;;N;;;;;
+ 1D3C;MODIFIER LETTER CAPITAL O;Lm;0;L;<super> 004F;;;;N;;;;;
+ 1D3D;MODIFIER LETTER CAPITAL OU;Lm;0;L;<super> 0222;;;;N;;;;;
+ 1D3E;MODIFIER LETTER CAPITAL P;Lm;0;L;<super> 0050;;;;N;;;;;
+ 1D3F;MODIFIER LETTER CAPITAL R;Lm;0;L;<super> 0052;;;;N;;;;;
+ 1D40;MODIFIER LETTER CAPITAL T;Lm;0;L;<super> 0054;;;;N;;;;;
+ 1D41;MODIFIER LETTER CAPITAL U;Lm;0;L;<super> 0055;;;;N;;;;;
+ 1D42;MODIFIER LETTER CAPITAL W;Lm;0;L;<super> 0057;;;;N;;;;;
+ 1D43;MODIFIER LETTER SMALL A;Lm;0;L;<super> 0061;;;;N;;;;;
+ 1D44;MODIFIER LETTER SMALL TURNED A;Lm;0;L;<super> 0250;;;;N;;;;;
+ 1D45;MODIFIER LETTER SMALL ALPHA;Lm;0;L;<super> 0251;;;;N;;;;;
+ 1D46;MODIFIER LETTER SMALL TURNED AE;Lm;0;L;<super> 1D02;;;;N;;;;;
+ 1D47;MODIFIER LETTER SMALL B;Lm;0;L;<super> 0062;;;;N;;;;;
+ 1D48;MODIFIER LETTER SMALL D;Lm;0;L;<super> 0064;;;;N;;;;;
+ 1D49;MODIFIER LETTER SMALL E;Lm;0;L;<super> 0065;;;;N;;;;;
+ 1D4A;MODIFIER LETTER SMALL SCHWA;Lm;0;L;<super> 0259;;;;N;;;;;
+ 1D4B;MODIFIER LETTER SMALL OPEN E;Lm;0;L;<super> 025B;;;;N;;;;;
+ 1D4C;MODIFIER LETTER SMALL TURNED OPEN E;Lm;0;L;<super> 025C;;;;N;;;;;
+ 1D4D;MODIFIER LETTER SMALL G;Lm;0;L;<super> 0067;;;;N;;;;;
+ 1D4E;MODIFIER LETTER SMALL TURNED I;Lm;0;L;;;;;N;;;;;
+ 1D4F;MODIFIER LETTER SMALL K;Lm;0;L;<super> 006B;;;;N;;;;;
+ 1D50;MODIFIER LETTER SMALL M;Lm;0;L;<super> 006D;;;;N;;;;;
+ 1D51;MODIFIER LETTER SMALL ENG;Lm;0;L;<super> 014B;;;;N;;;;;
+ 1D52;MODIFIER LETTER SMALL O;Lm;0;L;<super> 006F;;;;N;;;;;
+ 1D53;MODIFIER LETTER SMALL OPEN O;Lm;0;L;<super> 0254;;;;N;;;;;
+ 1D54;MODIFIER LETTER SMALL TOP HALF O;Lm;0;L;<super> 1D16;;;;N;;;;;
+ 1D55;MODIFIER LETTER SMALL BOTTOM HALF O;Lm;0;L;<super> 1D17;;;;N;;;;;
+ 1D56;MODIFIER LETTER SMALL P;Lm;0;L;<super> 0070;;;;N;;;;;
+ 1D57;MODIFIER LETTER SMALL T;Lm;0;L;<super> 0074;;;;N;;;;;
+ 1D58;MODIFIER LETTER SMALL U;Lm;0;L;<super> 0075;;;;N;;;;;
+ 1D59;MODIFIER LETTER SMALL SIDEWAYS U;Lm;0;L;<super> 1D1D;;;;N;;;;;
+ 1D5A;MODIFIER LETTER SMALL TURNED M;Lm;0;L;<super> 026F;;;;N;;;;;
+ 1D5B;MODIFIER LETTER SMALL V;Lm;0;L;<super> 0076;;;;N;;;;;
+ 1D5C;MODIFIER LETTER SMALL AIN;Lm;0;L;<super> 1D25;;;;N;;;;;
+ 1D5D;MODIFIER LETTER SMALL BETA;Lm;0;L;<super> 03B2;;;;N;;;;;
+ 1D5E;MODIFIER LETTER SMALL GREEK GAMMA;Lm;0;L;<super> 03B3;;;;N;;;;;
+ 1D5F;MODIFIER LETTER SMALL DELTA;Lm;0;L;<super> 03B4;;;;N;;;;;
+ 1D60;MODIFIER LETTER SMALL GREEK PHI;Lm;0;L;<super> 03C6;;;;N;;;;;
+ 1D61;MODIFIER LETTER SMALL CHI;Lm;0;L;<super> 03C7;;;;N;;;;;
+ 1D62;LATIN SUBSCRIPT SMALL LETTER I;Lm;0;L;<sub> 0069;;;;N;;;;;
+ 1D63;LATIN SUBSCRIPT SMALL LETTER R;Lm;0;L;<sub> 0072;;;;N;;;;;
+ 1D64;LATIN SUBSCRIPT SMALL LETTER U;Lm;0;L;<sub> 0075;;;;N;;;;;
+ 1D65;LATIN SUBSCRIPT SMALL LETTER V;Lm;0;L;<sub> 0076;;;;N;;;;;
+ 1D66;GREEK SUBSCRIPT SMALL LETTER BETA;Lm;0;L;<sub> 03B2;;;;N;;;;;
+ 1D67;GREEK SUBSCRIPT SMALL LETTER GAMMA;Lm;0;L;<sub> 03B3;;;;N;;;;;
+ 1D68;GREEK SUBSCRIPT SMALL LETTER RHO;Lm;0;L;<sub> 03C1;;;;N;;;;;
+ 1D69;GREEK SUBSCRIPT SMALL LETTER PHI;Lm;0;L;<sub> 03C6;;;;N;;;;;
+ 1D6A;GREEK SUBSCRIPT SMALL LETTER CHI;Lm;0;L;<sub> 03C7;;;;N;;;;;
+ 1D6B;LATIN SMALL LETTER UE;Ll;0;L;;;;;N;;;;;
+ 1D6C;LATIN SMALL LETTER B WITH MIDDLE TILDE;Ll;0;L;;;;;N;;;;;
+ 1D6D;LATIN SMALL LETTER D WITH MIDDLE TILDE;Ll;0;L;;;;;N;;;;;
+ 1D6E;LATIN SMALL LETTER F WITH MIDDLE TILDE;Ll;0;L;;;;;N;;;;;
+ 1D6F;LATIN SMALL LETTER M WITH MIDDLE TILDE;Ll;0;L;;;;;N;;;;;
+ 1D70;LATIN SMALL LETTER N WITH MIDDLE TILDE;Ll;0;L;;;;;N;;;;;
+ 1D71;LATIN SMALL LETTER P WITH MIDDLE TILDE;Ll;0;L;;;;;N;;;;;
+ 1D72;LATIN SMALL LETTER R WITH MIDDLE TILDE;Ll;0;L;;;;;N;;;;;
+ 1D73;LATIN SMALL LETTER R WITH FISHHOOK AND MIDDLE TILDE;Ll;0;L;;;;;N;;;;;
+ 1D74;LATIN SMALL LETTER S WITH MIDDLE TILDE;Ll;0;L;;;;;N;;;;;
+ 1D75;LATIN SMALL LETTER T WITH MIDDLE TILDE;Ll;0;L;;;;;N;;;;;
+ 1D76;LATIN SMALL LETTER Z WITH MIDDLE TILDE;Ll;0;L;;;;;N;;;;;
+ 1D77;LATIN SMALL LETTER TURNED G;Ll;0;L;;;;;N;;;;;
+ 1D78;MODIFIER LETTER CYRILLIC EN;Lm;0;L;<super> 043D;;;;N;;;;;
+ 1D79;LATIN SMALL LETTER INSULAR G;Ll;0;L;;;;;N;;;A77D;;A77D
+ 1D7A;LATIN SMALL LETTER TH WITH STRIKETHROUGH;Ll;0;L;;;;;N;;;;;
+ 1D7B;LATIN SMALL CAPITAL LETTER I WITH STROKE;Ll;0;L;;;;;N;;;;;
+ 1D7C;LATIN SMALL LETTER IOTA WITH STROKE;Ll;0;L;;;;;N;;;;;
+ 1D7D;LATIN SMALL LETTER P WITH STROKE;Ll;0;L;;;;;N;;;2C63;;2C63
+ 1D7E;LATIN SMALL CAPITAL LETTER U WITH STROKE;Ll;0;L;;;;;N;;;;;
+ 1D7F;LATIN SMALL LETTER UPSILON WITH STROKE;Ll;0;L;;;;;N;;;;;
+ 1D80;LATIN SMALL LETTER B WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D81;LATIN SMALL LETTER D WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D82;LATIN SMALL LETTER F WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D83;LATIN SMALL LETTER G WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D84;LATIN SMALL LETTER K WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D85;LATIN SMALL LETTER L WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D86;LATIN SMALL LETTER M WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D87;LATIN SMALL LETTER N WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D88;LATIN SMALL LETTER P WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D89;LATIN SMALL LETTER R WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D8A;LATIN SMALL LETTER S WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D8B;LATIN SMALL LETTER ESH WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D8C;LATIN SMALL LETTER V WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D8D;LATIN SMALL LETTER X WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ 1D8E;LATIN SMALL LETTER Z WITH PALATAL HOOK;Ll;0;L;;;;;N;;;A7C6;;A7C6
+ 1D8F;LATIN SMALL LETTER A WITH RETROFLEX HOOK;Ll;0;L;;;;;N;;;;;
+ 1D90;LATIN SMALL LETTER ALPHA WITH RETROFLEX HOOK;Ll;0;L;;;;;N;;;;;
+ 1D91;LATIN SMALL LETTER D WITH HOOK AND TAIL;Ll;0;L;;;;;N;;;;;
+ 1D92;LATIN SMALL LETTER E WITH RETROFLEX HOOK;Ll;0;L;;;;;N;;;;;
+ 1D93;LATIN SMALL LETTER OPEN E WITH RETROFLEX HOOK;Ll;0;L;;;;;N;;;;;
+ 1D94;LATIN SMALL LETTER REVERSED OPEN E WITH RETROFLEX HOOK;Ll;0;L;;;;;N;;;;;
+ 1D95;LATIN SMALL LETTER SCHWA WITH RETROFLEX HOOK;Ll;0;L;;;;;N;;;;;
+ 1D96;LATIN SMALL LETTER I WITH RETROFLEX HOOK;Ll;0;L;;;;;N;;;;;
+ 1D97;LATIN SMALL LETTER OPEN O WITH RETROFLEX HOOK;Ll;0;L;;;;;N;;;;;
+ 1D98;LATIN SMALL LETTER ESH WITH RETROFLEX HOOK;Ll;0;L;;;;;N;;;;;
+ 1D99;LATIN SMALL LETTER U WITH RETROFLEX HOOK;Ll;0;L;;;;;N;;;;;
+ 1D9A;LATIN SMALL LETTER EZH WITH RETROFLEX HOOK;Ll;0;L;;;;;N;;;;;
+ 1D9B;MODIFIER LETTER SMALL TURNED ALPHA;Lm;0;L;<super> 0252;;;;N;;;;;
+ 1D9C;MODIFIER LETTER SMALL C;Lm;0;L;<super> 0063;;;;N;;;;;
+ 1D9D;MODIFIER LETTER SMALL C WITH CURL;Lm;0;L;<super> 0255;;;;N;;;;;
+ 1D9E;MODIFIER LETTER SMALL ETH;Lm;0;L;<super> 00F0;;;;N;;;;;
+ 1D9F;MODIFIER LETTER SMALL REVERSED OPEN E;Lm;0;L;<super> 025C;;;;N;;;;;
+ 1DA0;MODIFIER LETTER SMALL F;Lm;0;L;<super> 0066;;;;N;;;;;
+ 1DA1;MODIFIER LETTER SMALL DOTLESS J WITH STROKE;Lm;0;L;<super> 025F;;;;N;;;;;
+ 1DA2;MODIFIER LETTER SMALL SCRIPT G;Lm;0;L;<super> 0261;;;;N;;;;;
+ 1DA3;MODIFIER LETTER SMALL TURNED H;Lm;0;L;<super> 0265;;;;N;;;;;
+ 1DA4;MODIFIER LETTER SMALL I WITH STROKE;Lm;0;L;<super> 0268;;;;N;;;;;
+ 1DA5;MODIFIER LETTER SMALL IOTA;Lm;0;L;<super> 0269;;;;N;;;;;
+ 1DA6;MODIFIER LETTER SMALL CAPITAL I;Lm;0;L;<super> 026A;;;;N;;;;;
+ 1DA7;MODIFIER LETTER SMALL CAPITAL I WITH STROKE;Lm;0;L;<super> 1D7B;;;;N;;;;;
+ 1DA8;MODIFIER LETTER SMALL J WITH CROSSED-TAIL;Lm;0;L;<super> 029D;;;;N;;;;;
+ 1DA9;MODIFIER LETTER SMALL L WITH RETROFLEX HOOK;Lm;0;L;<super> 026D;;;;N;;;;;
+ 1DAA;MODIFIER LETTER SMALL L WITH PALATAL HOOK;Lm;0;L;<super> 1D85;;;;N;;;;;
+ 1DAB;MODIFIER LETTER SMALL CAPITAL L;Lm;0;L;<super> 029F;;;;N;;;;;
+ 1DAC;MODIFIER LETTER SMALL M WITH HOOK;Lm;0;L;<super> 0271;;;;N;;;;;
+ 1DAD;MODIFIER LETTER SMALL TURNED M WITH LONG LEG;Lm;0;L;<super> 0270;;;;N;;;;;
+ 1DAE;MODIFIER LETTER SMALL N WITH LEFT HOOK;Lm;0;L;<super> 0272;;;;N;;;;;
+ 1DAF;MODIFIER LETTER SMALL N WITH RETROFLEX HOOK;Lm;0;L;<super> 0273;;;;N;;;;;
+ 1DB0;MODIFIER LETTER SMALL CAPITAL N;Lm;0;L;<super> 0274;;;;N;;;;;
+ 1DB1;MODIFIER LETTER SMALL BARRED O;Lm;0;L;<super> 0275;;;;N;;;;;
+ 1DB2;MODIFIER LETTER SMALL PHI;Lm;0;L;<super> 0278;;;;N;;;;;
+ 1DB3;MODIFIER LETTER SMALL S WITH HOOK;Lm;0;L;<super> 0282;;;;N;;;;;
+ 1DB4;MODIFIER LETTER SMALL ESH;Lm;0;L;<super> 0283;;;;N;;;;;
+ 1DB5;MODIFIER LETTER SMALL T WITH PALATAL HOOK;Lm;0;L;<super> 01AB;;;;N;;;;;
+ 1DB6;MODIFIER LETTER SMALL U BAR;Lm;0;L;<super> 0289;;;;N;;;;;
+ 1DB7;MODIFIER LETTER SMALL UPSILON;Lm;0;L;<super> 028A;;;;N;;;;;
+ 1DB8;MODIFIER LETTER SMALL CAPITAL U;Lm;0;L;<super> 1D1C;;;;N;;;;;
+ 1DB9;MODIFIER LETTER SMALL V WITH HOOK;Lm;0;L;<super> 028B;;;;N;;;;;
+ 1DBA;MODIFIER LETTER SMALL TURNED V;Lm;0;L;<super> 028C;;;;N;;;;;
+ 1DBB;MODIFIER LETTER SMALL Z;Lm;0;L;<super> 007A;;;;N;;;;;
+ 1DBC;MODIFIER LETTER SMALL Z WITH RETROFLEX HOOK;Lm;0;L;<super> 0290;;;;N;;;;;
+ 1DBD;MODIFIER LETTER SMALL Z WITH CURL;Lm;0;L;<super> 0291;;;;N;;;;;
+ 1DBE;MODIFIER LETTER SMALL EZH;Lm;0;L;<super> 0292;;;;N;;;;;
+ 1DBF;MODIFIER LETTER SMALL THETA;Lm;0;L;<super> 03B8;;;;N;;;;;
+ 1DC0;COMBINING DOTTED GRAVE ACCENT;Mn;230;NSM;;;;;N;;;;;
+ 1DC1;COMBINING DOTTED ACUTE ACCENT;Mn;230;NSM;;;;;N;;;;;
+ 1DC2;COMBINING SNAKE BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1DC3;COMBINING SUSPENSION MARK;Mn;230;NSM;;;;;N;;;;;
+ 1DC4;COMBINING MACRON-ACUTE;Mn;230;NSM;;;;;N;;;;;
+ 1DC5;COMBINING GRAVE-MACRON;Mn;230;NSM;;;;;N;;;;;
+ 1DC6;COMBINING MACRON-GRAVE;Mn;230;NSM;;;;;N;;;;;
+ 1DC7;COMBINING ACUTE-MACRON;Mn;230;NSM;;;;;N;;;;;
+ 1DC8;COMBINING GRAVE-ACUTE-GRAVE;Mn;230;NSM;;;;;N;;;;;
+ 1DC9;COMBINING ACUTE-GRAVE-ACUTE;Mn;230;NSM;;;;;N;;;;;
+ 1DCA;COMBINING LATIN SMALL LETTER R BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1DCB;COMBINING BREVE-MACRON;Mn;230;NSM;;;;;N;;;;;
+ 1DCC;COMBINING MACRON-BREVE;Mn;230;NSM;;;;;N;;;;;
+ 1DCD;COMBINING DOUBLE CIRCUMFLEX ABOVE;Mn;234;NSM;;;;;N;;;;;
+ 1DCE;COMBINING OGONEK ABOVE;Mn;214;NSM;;;;;N;;;;;
+ 1DCF;COMBINING ZIGZAG BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1DD0;COMBINING IS BELOW;Mn;202;NSM;;;;;N;;;;;
+ 1DD1;COMBINING UR ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 1DD2;COMBINING US ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 1DD3;COMBINING LATIN SMALL LETTER FLATTENED OPEN A ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 1DD4;COMBINING LATIN SMALL LETTER AE;Mn;230;NSM;;;;;N;;;;;
+ 1DD5;COMBINING LATIN SMALL LETTER AO;Mn;230;NSM;;;;;N;;;;;
+ 1DD6;COMBINING LATIN SMALL LETTER AV;Mn;230;NSM;;;;;N;;;;;
+ 1DD7;COMBINING LATIN SMALL LETTER C CEDILLA;Mn;230;NSM;;;;;N;;;;;
+ 1DD8;COMBINING LATIN SMALL LETTER INSULAR D;Mn;230;NSM;;;;;N;;;;;
+ 1DD9;COMBINING LATIN SMALL LETTER ETH;Mn;230;NSM;;;;;N;;;;;
+ 1DDA;COMBINING LATIN SMALL LETTER G;Mn;230;NSM;;;;;N;;;;;
+ 1DDB;COMBINING LATIN LETTER SMALL CAPITAL G;Mn;230;NSM;;;;;N;;;;;
+ 1DDC;COMBINING LATIN SMALL LETTER K;Mn;230;NSM;;;;;N;;;;;
+ 1DDD;COMBINING LATIN SMALL LETTER L;Mn;230;NSM;;;;;N;;;;;
+ 1DDE;COMBINING LATIN LETTER SMALL CAPITAL L;Mn;230;NSM;;;;;N;;;;;
+ 1DDF;COMBINING LATIN LETTER SMALL CAPITAL M;Mn;230;NSM;;;;;N;;;;;
+ 1DE0;COMBINING LATIN SMALL LETTER N;Mn;230;NSM;;;;;N;;;;;
+ 1DE1;COMBINING LATIN LETTER SMALL CAPITAL N;Mn;230;NSM;;;;;N;;;;;
+ 1DE2;COMBINING LATIN LETTER SMALL CAPITAL R;Mn;230;NSM;;;;;N;;;;;
+ 1DE3;COMBINING LATIN SMALL LETTER R ROTUNDA;Mn;230;NSM;;;;;N;;;;;
+ 1DE4;COMBINING LATIN SMALL LETTER S;Mn;230;NSM;;;;;N;;;;;
+ 1DE5;COMBINING LATIN SMALL LETTER LONG S;Mn;230;NSM;;;;;N;;;;;
+ 1DE6;COMBINING LATIN SMALL LETTER Z;Mn;230;NSM;;;;;N;;;;;
+ 1DE7;COMBINING LATIN SMALL LETTER ALPHA;Mn;230;NSM;;;;;N;;;;;
+ 1DE8;COMBINING LATIN SMALL LETTER B;Mn;230;NSM;;;;;N;;;;;
+ 1DE9;COMBINING LATIN SMALL LETTER BETA;Mn;230;NSM;;;;;N;;;;;
+ 1DEA;COMBINING LATIN SMALL LETTER SCHWA;Mn;230;NSM;;;;;N;;;;;
+ 1DEB;COMBINING LATIN SMALL LETTER F;Mn;230;NSM;;;;;N;;;;;
+ 1DEC;COMBINING LATIN SMALL LETTER L WITH DOUBLE MIDDLE TILDE;Mn;230;NSM;;;;;N;;;;;
+ 1DED;COMBINING LATIN SMALL LETTER O WITH LIGHT CENTRALIZATION STROKE;Mn;230;NSM;;;;;N;;;;;
+ 1DEE;COMBINING LATIN SMALL LETTER P;Mn;230;NSM;;;;;N;;;;;
+ 1DEF;COMBINING LATIN SMALL LETTER ESH;Mn;230;NSM;;;;;N;;;;;
+ 1DF0;COMBINING LATIN SMALL LETTER U WITH LIGHT CENTRALIZATION STROKE;Mn;230;NSM;;;;;N;;;;;
+ 1DF1;COMBINING LATIN SMALL LETTER W;Mn;230;NSM;;;;;N;;;;;
+ 1DF2;COMBINING LATIN SMALL LETTER A WITH DIAERESIS;Mn;230;NSM;;;;;N;;;;;
+ 1DF3;COMBINING LATIN SMALL LETTER O WITH DIAERESIS;Mn;230;NSM;;;;;N;;;;;
+ 1DF4;COMBINING LATIN SMALL LETTER U WITH DIAERESIS;Mn;230;NSM;;;;;N;;;;;
+ 1DF5;COMBINING UP TACK ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 1DF6;COMBINING KAVYKA ABOVE RIGHT;Mn;232;NSM;;;;;N;;;;;
+ 1DF7;COMBINING KAVYKA ABOVE LEFT;Mn;228;NSM;;;;;N;;;;;
+ 1DF8;COMBINING DOT ABOVE LEFT;Mn;228;NSM;;;;;N;;;;;
+ 1DF9;COMBINING WIDE INVERTED BRIDGE BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1DFB;COMBINING DELETION MARK;Mn;230;NSM;;;;;N;;;;;
+ 1DFC;COMBINING DOUBLE INVERTED BREVE BELOW;Mn;233;NSM;;;;;N;;;;;
+ 1DFD;COMBINING ALMOST EQUAL TO BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1DFE;COMBINING LEFT ARROWHEAD ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 1DFF;COMBINING RIGHT ARROWHEAD AND DOWN ARROWHEAD BELOW;Mn;220;NSM;;;;;N;;;;;
+ 1E00;LATIN CAPITAL LETTER A WITH RING BELOW;Lu;0;L;0041 0325;;;;N;;;;1E01;
+ 1E01;LATIN SMALL LETTER A WITH RING BELOW;Ll;0;L;0061 0325;;;;N;;;1E00;;1E00
+ 1E02;LATIN CAPITAL LETTER B WITH DOT ABOVE;Lu;0;L;0042 0307;;;;N;;;;1E03;
+ 1E03;LATIN SMALL LETTER B WITH DOT ABOVE;Ll;0;L;0062 0307;;;;N;;;1E02;;1E02
+ 1E04;LATIN CAPITAL LETTER B WITH DOT BELOW;Lu;0;L;0042 0323;;;;N;;;;1E05;
+ 1E05;LATIN SMALL LETTER B WITH DOT BELOW;Ll;0;L;0062 0323;;;;N;;;1E04;;1E04
+ 1E06;LATIN CAPITAL LETTER B WITH LINE BELOW;Lu;0;L;0042 0331;;;;N;;;;1E07;
+ 1E07;LATIN SMALL LETTER B WITH LINE BELOW;Ll;0;L;0062 0331;;;;N;;;1E06;;1E06
+ 1E08;LATIN CAPITAL LETTER C WITH CEDILLA AND ACUTE;Lu;0;L;00C7 0301;;;;N;;;;1E09;
+ 1E09;LATIN SMALL LETTER C WITH CEDILLA AND ACUTE;Ll;0;L;00E7 0301;;;;N;;;1E08;;1E08
+ 1E0A;LATIN CAPITAL LETTER D WITH DOT ABOVE;Lu;0;L;0044 0307;;;;N;;;;1E0B;
+ 1E0B;LATIN SMALL LETTER D WITH DOT ABOVE;Ll;0;L;0064 0307;;;;N;;;1E0A;;1E0A
+ 1E0C;LATIN CAPITAL LETTER D WITH DOT BELOW;Lu;0;L;0044 0323;;;;N;;;;1E0D;
+ 1E0D;LATIN SMALL LETTER D WITH DOT BELOW;Ll;0;L;0064 0323;;;;N;;;1E0C;;1E0C
+ 1E0E;LATIN CAPITAL LETTER D WITH LINE BELOW;Lu;0;L;0044 0331;;;;N;;;;1E0F;
+ 1E0F;LATIN SMALL LETTER D WITH LINE BELOW;Ll;0;L;0064 0331;;;;N;;;1E0E;;1E0E
+ 1E10;LATIN CAPITAL LETTER D WITH CEDILLA;Lu;0;L;0044 0327;;;;N;;;;1E11;
+ 1E11;LATIN SMALL LETTER D WITH CEDILLA;Ll;0;L;0064 0327;;;;N;;;1E10;;1E10
+ 1E12;LATIN CAPITAL LETTER D WITH CIRCUMFLEX BELOW;Lu;0;L;0044 032D;;;;N;;;;1E13;
+ 1E13;LATIN SMALL LETTER D WITH CIRCUMFLEX BELOW;Ll;0;L;0064 032D;;;;N;;;1E12;;1E12
+ 1E14;LATIN CAPITAL LETTER E WITH MACRON AND GRAVE;Lu;0;L;0112 0300;;;;N;;;;1E15;
+ 1E15;LATIN SMALL LETTER E WITH MACRON AND GRAVE;Ll;0;L;0113 0300;;;;N;;;1E14;;1E14
+ 1E16;LATIN CAPITAL LETTER E WITH MACRON AND ACUTE;Lu;0;L;0112 0301;;;;N;;;;1E17;
+ 1E17;LATIN SMALL LETTER E WITH MACRON AND ACUTE;Ll;0;L;0113 0301;;;;N;;;1E16;;1E16
+ 1E18;LATIN CAPITAL LETTER E WITH CIRCUMFLEX BELOW;Lu;0;L;0045 032D;;;;N;;;;1E19;
+ 1E19;LATIN SMALL LETTER E WITH CIRCUMFLEX BELOW;Ll;0;L;0065 032D;;;;N;;;1E18;;1E18
+ 1E1A;LATIN CAPITAL LETTER E WITH TILDE BELOW;Lu;0;L;0045 0330;;;;N;;;;1E1B;
+ 1E1B;LATIN SMALL LETTER E WITH TILDE BELOW;Ll;0;L;0065 0330;;;;N;;;1E1A;;1E1A
+ 1E1C;LATIN CAPITAL LETTER E WITH CEDILLA AND BREVE;Lu;0;L;0228 0306;;;;N;;;;1E1D;
+ 1E1D;LATIN SMALL LETTER E WITH CEDILLA AND BREVE;Ll;0;L;0229 0306;;;;N;;;1E1C;;1E1C
+ 1E1E;LATIN CAPITAL LETTER F WITH DOT ABOVE;Lu;0;L;0046 0307;;;;N;;;;1E1F;
+ 1E1F;LATIN SMALL LETTER F WITH DOT ABOVE;Ll;0;L;0066 0307;;;;N;;;1E1E;;1E1E
+ 1E20;LATIN CAPITAL LETTER G WITH MACRON;Lu;0;L;0047 0304;;;;N;;;;1E21;
+ 1E21;LATIN SMALL LETTER G WITH MACRON;Ll;0;L;0067 0304;;;;N;;;1E20;;1E20
+ 1E22;LATIN CAPITAL LETTER H WITH DOT ABOVE;Lu;0;L;0048 0307;;;;N;;;;1E23;
+ 1E23;LATIN SMALL LETTER H WITH DOT ABOVE;Ll;0;L;0068 0307;;;;N;;;1E22;;1E22
+ 1E24;LATIN CAPITAL LETTER H WITH DOT BELOW;Lu;0;L;0048 0323;;;;N;;;;1E25;
+ 1E25;LATIN SMALL LETTER H WITH DOT BELOW;Ll;0;L;0068 0323;;;;N;;;1E24;;1E24
+ 1E26;LATIN CAPITAL LETTER H WITH DIAERESIS;Lu;0;L;0048 0308;;;;N;;;;1E27;
+ 1E27;LATIN SMALL LETTER H WITH DIAERESIS;Ll;0;L;0068 0308;;;;N;;;1E26;;1E26
+ 1E28;LATIN CAPITAL LETTER H WITH CEDILLA;Lu;0;L;0048 0327;;;;N;;;;1E29;
+ 1E29;LATIN SMALL LETTER H WITH CEDILLA;Ll;0;L;0068 0327;;;;N;;;1E28;;1E28
+ 1E2A;LATIN CAPITAL LETTER H WITH BREVE BELOW;Lu;0;L;0048 032E;;;;N;;;;1E2B;
+ 1E2B;LATIN SMALL LETTER H WITH BREVE BELOW;Ll;0;L;0068 032E;;;;N;;;1E2A;;1E2A
+ 1E2C;LATIN CAPITAL LETTER I WITH TILDE BELOW;Lu;0;L;0049 0330;;;;N;;;;1E2D;
+ 1E2D;LATIN SMALL LETTER I WITH TILDE BELOW;Ll;0;L;0069 0330;;;;N;;;1E2C;;1E2C
+ 1E2E;LATIN CAPITAL LETTER I WITH DIAERESIS AND ACUTE;Lu;0;L;00CF 0301;;;;N;;;;1E2F;
+ 1E2F;LATIN SMALL LETTER I WITH DIAERESIS AND ACUTE;Ll;0;L;00EF 0301;;;;N;;;1E2E;;1E2E
+ 1E30;LATIN CAPITAL LETTER K WITH ACUTE;Lu;0;L;004B 0301;;;;N;;;;1E31;
+ 1E31;LATIN SMALL LETTER K WITH ACUTE;Ll;0;L;006B 0301;;;;N;;;1E30;;1E30
+ 1E32;LATIN CAPITAL LETTER K WITH DOT BELOW;Lu;0;L;004B 0323;;;;N;;;;1E33;
+ 1E33;LATIN SMALL LETTER K WITH DOT BELOW;Ll;0;L;006B 0323;;;;N;;;1E32;;1E32
+ 1E34;LATIN CAPITAL LETTER K WITH LINE BELOW;Lu;0;L;004B 0331;;;;N;;;;1E35;
+ 1E35;LATIN SMALL LETTER K WITH LINE BELOW;Ll;0;L;006B 0331;;;;N;;;1E34;;1E34
+ 1E36;LATIN CAPITAL LETTER L WITH DOT BELOW;Lu;0;L;004C 0323;;;;N;;;;1E37;
+ 1E37;LATIN SMALL LETTER L WITH DOT BELOW;Ll;0;L;006C 0323;;;;N;;;1E36;;1E36
+ 1E38;LATIN CAPITAL LETTER L WITH DOT BELOW AND MACRON;Lu;0;L;1E36 0304;;;;N;;;;1E39;
+ 1E39;LATIN SMALL LETTER L WITH DOT BELOW AND MACRON;Ll;0;L;1E37 0304;;;;N;;;1E38;;1E38
+ 1E3A;LATIN CAPITAL LETTER L WITH LINE BELOW;Lu;0;L;004C 0331;;;;N;;;;1E3B;
+ 1E3B;LATIN SMALL LETTER L WITH LINE BELOW;Ll;0;L;006C 0331;;;;N;;;1E3A;;1E3A
+ 1E3C;LATIN CAPITAL LETTER L WITH CIRCUMFLEX BELOW;Lu;0;L;004C 032D;;;;N;;;;1E3D;
+ 1E3D;LATIN SMALL LETTER L WITH CIRCUMFLEX BELOW;Ll;0;L;006C 032D;;;;N;;;1E3C;;1E3C
+ 1E3E;LATIN CAPITAL LETTER M WITH ACUTE;Lu;0;L;004D 0301;;;;N;;;;1E3F;
+ 1E3F;LATIN SMALL LETTER M WITH ACUTE;Ll;0;L;006D 0301;;;;N;;;1E3E;;1E3E
+ 1E40;LATIN CAPITAL LETTER M WITH DOT ABOVE;Lu;0;L;004D 0307;;;;N;;;;1E41;
+ 1E41;LATIN SMALL LETTER M WITH DOT ABOVE;Ll;0;L;006D 0307;;;;N;;;1E40;;1E40
+ 1E42;LATIN CAPITAL LETTER M WITH DOT BELOW;Lu;0;L;004D 0323;;;;N;;;;1E43;
+ 1E43;LATIN SMALL LETTER M WITH DOT BELOW;Ll;0;L;006D 0323;;;;N;;;1E42;;1E42
+ 1E44;LATIN CAPITAL LETTER N WITH DOT ABOVE;Lu;0;L;004E 0307;;;;N;;;;1E45;
+ 1E45;LATIN SMALL LETTER N WITH DOT ABOVE;Ll;0;L;006E 0307;;;;N;;;1E44;;1E44
+ 1E46;LATIN CAPITAL LETTER N WITH DOT BELOW;Lu;0;L;004E 0323;;;;N;;;;1E47;
+ 1E47;LATIN SMALL LETTER N WITH DOT BELOW;Ll;0;L;006E 0323;;;;N;;;1E46;;1E46
+ 1E48;LATIN CAPITAL LETTER N WITH LINE BELOW;Lu;0;L;004E 0331;;;;N;;;;1E49;
+ 1E49;LATIN SMALL LETTER N WITH LINE BELOW;Ll;0;L;006E 0331;;;;N;;;1E48;;1E48
+ 1E4A;LATIN CAPITAL LETTER N WITH CIRCUMFLEX BELOW;Lu;0;L;004E 032D;;;;N;;;;1E4B;
+ 1E4B;LATIN SMALL LETTER N WITH CIRCUMFLEX BELOW;Ll;0;L;006E 032D;;;;N;;;1E4A;;1E4A
+ 1E4C;LATIN CAPITAL LETTER O WITH TILDE AND ACUTE;Lu;0;L;00D5 0301;;;;N;;;;1E4D;
+ 1E4D;LATIN SMALL LETTER O WITH TILDE AND ACUTE;Ll;0;L;00F5 0301;;;;N;;;1E4C;;1E4C
+ 1E4E;LATIN CAPITAL LETTER O WITH TILDE AND DIAERESIS;Lu;0;L;00D5 0308;;;;N;;;;1E4F;
+ 1E4F;LATIN SMALL LETTER O WITH TILDE AND DIAERESIS;Ll;0;L;00F5 0308;;;;N;;;1E4E;;1E4E
+ 1E50;LATIN CAPITAL LETTER O WITH MACRON AND GRAVE;Lu;0;L;014C 0300;;;;N;;;;1E51;
+ 1E51;LATIN SMALL LETTER O WITH MACRON AND GRAVE;Ll;0;L;014D 0300;;;;N;;;1E50;;1E50
+ 1E52;LATIN CAPITAL LETTER O WITH MACRON AND ACUTE;Lu;0;L;014C 0301;;;;N;;;;1E53;
+ 1E53;LATIN SMALL LETTER O WITH MACRON AND ACUTE;Ll;0;L;014D 0301;;;;N;;;1E52;;1E52
+ 1E54;LATIN CAPITAL LETTER P WITH ACUTE;Lu;0;L;0050 0301;;;;N;;;;1E55;
+ 1E55;LATIN SMALL LETTER P WITH ACUTE;Ll;0;L;0070 0301;;;;N;;;1E54;;1E54
+ 1E56;LATIN CAPITAL LETTER P WITH DOT ABOVE;Lu;0;L;0050 0307;;;;N;;;;1E57;
+ 1E57;LATIN SMALL LETTER P WITH DOT ABOVE;Ll;0;L;0070 0307;;;;N;;;1E56;;1E56
+ 1E58;LATIN CAPITAL LETTER R WITH DOT ABOVE;Lu;0;L;0052 0307;;;;N;;;;1E59;
+ 1E59;LATIN SMALL LETTER R WITH DOT ABOVE;Ll;0;L;0072 0307;;;;N;;;1E58;;1E58
+ 1E5A;LATIN CAPITAL LETTER R WITH DOT BELOW;Lu;0;L;0052 0323;;;;N;;;;1E5B;
+ 1E5B;LATIN SMALL LETTER R WITH DOT BELOW;Ll;0;L;0072 0323;;;;N;;;1E5A;;1E5A
+ 1E5C;LATIN CAPITAL LETTER R WITH DOT BELOW AND MACRON;Lu;0;L;1E5A 0304;;;;N;;;;1E5D;
+ 1E5D;LATIN SMALL LETTER R WITH DOT BELOW AND MACRON;Ll;0;L;1E5B 0304;;;;N;;;1E5C;;1E5C
+ 1E5E;LATIN CAPITAL LETTER R WITH LINE BELOW;Lu;0;L;0052 0331;;;;N;;;;1E5F;
+ 1E5F;LATIN SMALL LETTER R WITH LINE BELOW;Ll;0;L;0072 0331;;;;N;;;1E5E;;1E5E
+ 1E60;LATIN CAPITAL LETTER S WITH DOT ABOVE;Lu;0;L;0053 0307;;;;N;;;;1E61;
+ 1E61;LATIN SMALL LETTER S WITH DOT ABOVE;Ll;0;L;0073 0307;;;;N;;;1E60;;1E60
+ 1E62;LATIN CAPITAL LETTER S WITH DOT BELOW;Lu;0;L;0053 0323;;;;N;;;;1E63;
+ 1E63;LATIN SMALL LETTER S WITH DOT BELOW;Ll;0;L;0073 0323;;;;N;;;1E62;;1E62
+ 1E64;LATIN CAPITAL LETTER S WITH ACUTE AND DOT ABOVE;Lu;0;L;015A 0307;;;;N;;;;1E65;
+ 1E65;LATIN SMALL LETTER S WITH ACUTE AND DOT ABOVE;Ll;0;L;015B 0307;;;;N;;;1E64;;1E64
+ 1E66;LATIN CAPITAL LETTER S WITH CARON AND DOT ABOVE;Lu;0;L;0160 0307;;;;N;;;;1E67;
+ 1E67;LATIN SMALL LETTER S WITH CARON AND DOT ABOVE;Ll;0;L;0161 0307;;;;N;;;1E66;;1E66
+ 1E68;LATIN CAPITAL LETTER S WITH DOT BELOW AND DOT ABOVE;Lu;0;L;1E62 0307;;;;N;;;;1E69;
+ 1E69;LATIN SMALL LETTER S WITH DOT BELOW AND DOT ABOVE;Ll;0;L;1E63 0307;;;;N;;;1E68;;1E68
+ 1E6A;LATIN CAPITAL LETTER T WITH DOT ABOVE;Lu;0;L;0054 0307;;;;N;;;;1E6B;
+ 1E6B;LATIN SMALL LETTER T WITH DOT ABOVE;Ll;0;L;0074 0307;;;;N;;;1E6A;;1E6A
+ 1E6C;LATIN CAPITAL LETTER T WITH DOT BELOW;Lu;0;L;0054 0323;;;;N;;;;1E6D;
+ 1E6D;LATIN SMALL LETTER T WITH DOT BELOW;Ll;0;L;0074 0323;;;;N;;;1E6C;;1E6C
+ 1E6E;LATIN CAPITAL LETTER T WITH LINE BELOW;Lu;0;L;0054 0331;;;;N;;;;1E6F;
+ 1E6F;LATIN SMALL LETTER T WITH LINE BELOW;Ll;0;L;0074 0331;;;;N;;;1E6E;;1E6E
+ 1E70;LATIN CAPITAL LETTER T WITH CIRCUMFLEX BELOW;Lu;0;L;0054 032D;;;;N;;;;1E71;
+ 1E71;LATIN SMALL LETTER T WITH CIRCUMFLEX BELOW;Ll;0;L;0074 032D;;;;N;;;1E70;;1E70
+ 1E72;LATIN CAPITAL LETTER U WITH DIAERESIS BELOW;Lu;0;L;0055 0324;;;;N;;;;1E73;
+ 1E73;LATIN SMALL LETTER U WITH DIAERESIS BELOW;Ll;0;L;0075 0324;;;;N;;;1E72;;1E72
+ 1E74;LATIN CAPITAL LETTER U WITH TILDE BELOW;Lu;0;L;0055 0330;;;;N;;;;1E75;
+ 1E75;LATIN SMALL LETTER U WITH TILDE BELOW;Ll;0;L;0075 0330;;;;N;;;1E74;;1E74
+ 1E76;LATIN CAPITAL LETTER U WITH CIRCUMFLEX BELOW;Lu;0;L;0055 032D;;;;N;;;;1E77;
+ 1E77;LATIN SMALL LETTER U WITH CIRCUMFLEX BELOW;Ll;0;L;0075 032D;;;;N;;;1E76;;1E76
+ 1E78;LATIN CAPITAL LETTER U WITH TILDE AND ACUTE;Lu;0;L;0168 0301;;;;N;;;;1E79;
+ 1E79;LATIN SMALL LETTER U WITH TILDE AND ACUTE;Ll;0;L;0169 0301;;;;N;;;1E78;;1E78
+ 1E7A;LATIN CAPITAL LETTER U WITH MACRON AND DIAERESIS;Lu;0;L;016A 0308;;;;N;;;;1E7B;
+ 1E7B;LATIN SMALL LETTER U WITH MACRON AND DIAERESIS;Ll;0;L;016B 0308;;;;N;;;1E7A;;1E7A
+ 1E7C;LATIN CAPITAL LETTER V WITH TILDE;Lu;0;L;0056 0303;;;;N;;;;1E7D;
+ 1E7D;LATIN SMALL LETTER V WITH TILDE;Ll;0;L;0076 0303;;;;N;;;1E7C;;1E7C
+ 1E7E;LATIN CAPITAL LETTER V WITH DOT BELOW;Lu;0;L;0056 0323;;;;N;;;;1E7F;
+ 1E7F;LATIN SMALL LETTER V WITH DOT BELOW;Ll;0;L;0076 0323;;;;N;;;1E7E;;1E7E
+ 1E80;LATIN CAPITAL LETTER W WITH GRAVE;Lu;0;L;0057 0300;;;;N;;;;1E81;
+ 1E81;LATIN SMALL LETTER W WITH GRAVE;Ll;0;L;0077 0300;;;;N;;;1E80;;1E80
+ 1E82;LATIN CAPITAL LETTER W WITH ACUTE;Lu;0;L;0057 0301;;;;N;;;;1E83;
+ 1E83;LATIN SMALL LETTER W WITH ACUTE;Ll;0;L;0077 0301;;;;N;;;1E82;;1E82
+ 1E84;LATIN CAPITAL LETTER W WITH DIAERESIS;Lu;0;L;0057 0308;;;;N;;;;1E85;
+ 1E85;LATIN SMALL LETTER W WITH DIAERESIS;Ll;0;L;0077 0308;;;;N;;;1E84;;1E84
+ 1E86;LATIN CAPITAL LETTER W WITH DOT ABOVE;Lu;0;L;0057 0307;;;;N;;;;1E87;
+ 1E87;LATIN SMALL LETTER W WITH DOT ABOVE;Ll;0;L;0077 0307;;;;N;;;1E86;;1E86
+ 1E88;LATIN CAPITAL LETTER W WITH DOT BELOW;Lu;0;L;0057 0323;;;;N;;;;1E89;
+ 1E89;LATIN SMALL LETTER W WITH DOT BELOW;Ll;0;L;0077 0323;;;;N;;;1E88;;1E88
+ 1E8A;LATIN CAPITAL LETTER X WITH DOT ABOVE;Lu;0;L;0058 0307;;;;N;;;;1E8B;
+ 1E8B;LATIN SMALL LETTER X WITH DOT ABOVE;Ll;0;L;0078 0307;;;;N;;;1E8A;;1E8A
+ 1E8C;LATIN CAPITAL LETTER X WITH DIAERESIS;Lu;0;L;0058 0308;;;;N;;;;1E8D;
+ 1E8D;LATIN SMALL LETTER X WITH DIAERESIS;Ll;0;L;0078 0308;;;;N;;;1E8C;;1E8C
+ 1E8E;LATIN CAPITAL LETTER Y WITH DOT ABOVE;Lu;0;L;0059 0307;;;;N;;;;1E8F;
+ 1E8F;LATIN SMALL LETTER Y WITH DOT ABOVE;Ll;0;L;0079 0307;;;;N;;;1E8E;;1E8E
+ 1E90;LATIN CAPITAL LETTER Z WITH CIRCUMFLEX;Lu;0;L;005A 0302;;;;N;;;;1E91;
+ 1E91;LATIN SMALL LETTER Z WITH CIRCUMFLEX;Ll;0;L;007A 0302;;;;N;;;1E90;;1E90
+ 1E92;LATIN CAPITAL LETTER Z WITH DOT BELOW;Lu;0;L;005A 0323;;;;N;;;;1E93;
+ 1E93;LATIN SMALL LETTER Z WITH DOT BELOW;Ll;0;L;007A 0323;;;;N;;;1E92;;1E92
+ 1E94;LATIN CAPITAL LETTER Z WITH LINE BELOW;Lu;0;L;005A 0331;;;;N;;;;1E95;
+ 1E95;LATIN SMALL LETTER Z WITH LINE BELOW;Ll;0;L;007A 0331;;;;N;;;1E94;;1E94
+ 1E96;LATIN SMALL LETTER H WITH LINE BELOW;Ll;0;L;0068 0331;;;;N;;;;;
+ 1E97;LATIN SMALL LETTER T WITH DIAERESIS;Ll;0;L;0074 0308;;;;N;;;;;
+ 1E98;LATIN SMALL LETTER W WITH RING ABOVE;Ll;0;L;0077 030A;;;;N;;;;;
+ 1E99;LATIN SMALL LETTER Y WITH RING ABOVE;Ll;0;L;0079 030A;;;;N;;;;;
+ 1E9A;LATIN SMALL LETTER A WITH RIGHT HALF RING;Ll;0;L;<compat> 0061 02BE;;;;N;;;;;
+ 1E9B;LATIN SMALL LETTER LONG S WITH DOT ABOVE;Ll;0;L;017F 0307;;;;N;;;1E60;;1E60
+ 1E9C;LATIN SMALL LETTER LONG S WITH DIAGONAL STROKE;Ll;0;L;;;;;N;;;;;
+ 1E9D;LATIN SMALL LETTER LONG S WITH HIGH STROKE;Ll;0;L;;;;;N;;;;;
+ 1E9E;LATIN CAPITAL LETTER SHARP S;Lu;0;L;;;;;N;;;;00DF;
+ 1E9F;LATIN SMALL LETTER DELTA;Ll;0;L;;;;;N;;;;;
+ 1EA0;LATIN CAPITAL LETTER A WITH DOT BELOW;Lu;0;L;0041 0323;;;;N;;;;1EA1;
+ 1EA1;LATIN SMALL LETTER A WITH DOT BELOW;Ll;0;L;0061 0323;;;;N;;;1EA0;;1EA0
+ 1EA2;LATIN CAPITAL LETTER A WITH HOOK ABOVE;Lu;0;L;0041 0309;;;;N;;;;1EA3;
+ 1EA3;LATIN SMALL LETTER A WITH HOOK ABOVE;Ll;0;L;0061 0309;;;;N;;;1EA2;;1EA2
+ 1EA4;LATIN CAPITAL LETTER A WITH CIRCUMFLEX AND ACUTE;Lu;0;L;00C2 0301;;;;N;;;;1EA5;
+ 1EA5;LATIN SMALL LETTER A WITH CIRCUMFLEX AND ACUTE;Ll;0;L;00E2 0301;;;;N;;;1EA4;;1EA4
+ 1EA6;LATIN CAPITAL LETTER A WITH CIRCUMFLEX AND GRAVE;Lu;0;L;00C2 0300;;;;N;;;;1EA7;
+ 1EA7;LATIN SMALL LETTER A WITH CIRCUMFLEX AND GRAVE;Ll;0;L;00E2 0300;;;;N;;;1EA6;;1EA6
+ 1EA8;LATIN CAPITAL LETTER A WITH CIRCUMFLEX AND HOOK ABOVE;Lu;0;L;00C2 0309;;;;N;;;;1EA9;
+ 1EA9;LATIN SMALL LETTER A WITH CIRCUMFLEX AND HOOK ABOVE;Ll;0;L;00E2 0309;;;;N;;;1EA8;;1EA8
+ 1EAA;LATIN CAPITAL LETTER A WITH CIRCUMFLEX AND TILDE;Lu;0;L;00C2 0303;;;;N;;;;1EAB;
+ 1EAB;LATIN SMALL LETTER A WITH CIRCUMFLEX AND TILDE;Ll;0;L;00E2 0303;;;;N;;;1EAA;;1EAA
+ 1EAC;LATIN CAPITAL LETTER A WITH CIRCUMFLEX AND DOT BELOW;Lu;0;L;1EA0 0302;;;;N;;;;1EAD;
+ 1EAD;LATIN SMALL LETTER A WITH CIRCUMFLEX AND DOT BELOW;Ll;0;L;1EA1 0302;;;;N;;;1EAC;;1EAC
+ 1EAE;LATIN CAPITAL LETTER A WITH BREVE AND ACUTE;Lu;0;L;0102 0301;;;;N;;;;1EAF;
+ 1EAF;LATIN SMALL LETTER A WITH BREVE AND ACUTE;Ll;0;L;0103 0301;;;;N;;;1EAE;;1EAE
+ 1EB0;LATIN CAPITAL LETTER A WITH BREVE AND GRAVE;Lu;0;L;0102 0300;;;;N;;;;1EB1;
+ 1EB1;LATIN SMALL LETTER A WITH BREVE AND GRAVE;Ll;0;L;0103 0300;;;;N;;;1EB0;;1EB0
+ 1EB2;LATIN CAPITAL LETTER A WITH BREVE AND HOOK ABOVE;Lu;0;L;0102 0309;;;;N;;;;1EB3;
+ 1EB3;LATIN SMALL LETTER A WITH BREVE AND HOOK ABOVE;Ll;0;L;0103 0309;;;;N;;;1EB2;;1EB2
+ 1EB4;LATIN CAPITAL LETTER A WITH BREVE AND TILDE;Lu;0;L;0102 0303;;;;N;;;;1EB5;
+ 1EB5;LATIN SMALL LETTER A WITH BREVE AND TILDE;Ll;0;L;0103 0303;;;;N;;;1EB4;;1EB4
+ 1EB6;LATIN CAPITAL LETTER A WITH BREVE AND DOT BELOW;Lu;0;L;1EA0 0306;;;;N;;;;1EB7;
+ 1EB7;LATIN SMALL LETTER A WITH BREVE AND DOT BELOW;Ll;0;L;1EA1 0306;;;;N;;;1EB6;;1EB6
+ 1EB8;LATIN CAPITAL LETTER E WITH DOT BELOW;Lu;0;L;0045 0323;;;;N;;;;1EB9;
+ 1EB9;LATIN SMALL LETTER E WITH DOT BELOW;Ll;0;L;0065 0323;;;;N;;;1EB8;;1EB8
+ 1EBA;LATIN CAPITAL LETTER E WITH HOOK ABOVE;Lu;0;L;0045 0309;;;;N;;;;1EBB;
+ 1EBB;LATIN SMALL LETTER E WITH HOOK ABOVE;Ll;0;L;0065 0309;;;;N;;;1EBA;;1EBA
+ 1EBC;LATIN CAPITAL LETTER E WITH TILDE;Lu;0;L;0045 0303;;;;N;;;;1EBD;
+ 1EBD;LATIN SMALL LETTER E WITH TILDE;Ll;0;L;0065 0303;;;;N;;;1EBC;;1EBC
+ 1EBE;LATIN CAPITAL LETTER E WITH CIRCUMFLEX AND ACUTE;Lu;0;L;00CA 0301;;;;N;;;;1EBF;
+ 1EBF;LATIN SMALL LETTER E WITH CIRCUMFLEX AND ACUTE;Ll;0;L;00EA 0301;;;;N;;;1EBE;;1EBE
+ 1EC0;LATIN CAPITAL LETTER E WITH CIRCUMFLEX AND GRAVE;Lu;0;L;00CA 0300;;;;N;;;;1EC1;
+ 1EC1;LATIN SMALL LETTER E WITH CIRCUMFLEX AND GRAVE;Ll;0;L;00EA 0300;;;;N;;;1EC0;;1EC0
+ 1EC2;LATIN CAPITAL LETTER E WITH CIRCUMFLEX AND HOOK ABOVE;Lu;0;L;00CA 0309;;;;N;;;;1EC3;
+ 1EC3;LATIN SMALL LETTER E WITH CIRCUMFLEX AND HOOK ABOVE;Ll;0;L;00EA 0309;;;;N;;;1EC2;;1EC2
+ 1EC4;LATIN CAPITAL LETTER E WITH CIRCUMFLEX AND TILDE;Lu;0;L;00CA 0303;;;;N;;;;1EC5;
+ 1EC5;LATIN SMALL LETTER E WITH CIRCUMFLEX AND TILDE;Ll;0;L;00EA 0303;;;;N;;;1EC4;;1EC4
+ 1EC6;LATIN CAPITAL LETTER E WITH CIRCUMFLEX AND DOT BELOW;Lu;0;L;1EB8 0302;;;;N;;;;1EC7;
+ 1EC7;LATIN SMALL LETTER E WITH CIRCUMFLEX AND DOT BELOW;Ll;0;L;1EB9 0302;;;;N;;;1EC6;;1EC6
+ 1EC8;LATIN CAPITAL LETTER I WITH HOOK ABOVE;Lu;0;L;0049 0309;;;;N;;;;1EC9;
+ 1EC9;LATIN SMALL LETTER I WITH HOOK ABOVE;Ll;0;L;0069 0309;;;;N;;;1EC8;;1EC8
+ 1ECA;LATIN CAPITAL LETTER I WITH DOT BELOW;Lu;0;L;0049 0323;;;;N;;;;1ECB;
+ 1ECB;LATIN SMALL LETTER I WITH DOT BELOW;Ll;0;L;0069 0323;;;;N;;;1ECA;;1ECA
+ 1ECC;LATIN CAPITAL LETTER O WITH DOT BELOW;Lu;0;L;004F 0323;;;;N;;;;1ECD;
+ 1ECD;LATIN SMALL LETTER O WITH DOT BELOW;Ll;0;L;006F 0323;;;;N;;;1ECC;;1ECC
+ 1ECE;LATIN CAPITAL LETTER O WITH HOOK ABOVE;Lu;0;L;004F 0309;;;;N;;;;1ECF;
+ 1ECF;LATIN SMALL LETTER O WITH HOOK ABOVE;Ll;0;L;006F 0309;;;;N;;;1ECE;;1ECE
+ 1ED0;LATIN CAPITAL LETTER O WITH CIRCUMFLEX AND ACUTE;Lu;0;L;00D4 0301;;;;N;;;;1ED1;
+ 1ED1;LATIN SMALL LETTER O WITH CIRCUMFLEX AND ACUTE;Ll;0;L;00F4 0301;;;;N;;;1ED0;;1ED0
+ 1ED2;LATIN CAPITAL LETTER O WITH CIRCUMFLEX AND GRAVE;Lu;0;L;00D4 0300;;;;N;;;;1ED3;
+ 1ED3;LATIN SMALL LETTER O WITH CIRCUMFLEX AND GRAVE;Ll;0;L;00F4 0300;;;;N;;;1ED2;;1ED2
+ 1ED4;LATIN CAPITAL LETTER O WITH CIRCUMFLEX AND HOOK ABOVE;Lu;0;L;00D4 0309;;;;N;;;;1ED5;
+ 1ED5;LATIN SMALL LETTER O WITH CIRCUMFLEX AND HOOK ABOVE;Ll;0;L;00F4 0309;;;;N;;;1ED4;;1ED4
+ 1ED6;LATIN CAPITAL LETTER O WITH CIRCUMFLEX AND TILDE;Lu;0;L;00D4 0303;;;;N;;;;1ED7;
+ 1ED7;LATIN SMALL LETTER O WITH CIRCUMFLEX AND TILDE;Ll;0;L;00F4 0303;;;;N;;;1ED6;;1ED6
+ 1ED8;LATIN CAPITAL LETTER O WITH CIRCUMFLEX AND DOT BELOW;Lu;0;L;1ECC 0302;;;;N;;;;1ED9;
+ 1ED9;LATIN SMALL LETTER O WITH CIRCUMFLEX AND DOT BELOW;Ll;0;L;1ECD 0302;;;;N;;;1ED8;;1ED8
+ 1EDA;LATIN CAPITAL LETTER O WITH HORN AND ACUTE;Lu;0;L;01A0 0301;;;;N;;;;1EDB;
+ 1EDB;LATIN SMALL LETTER O WITH HORN AND ACUTE;Ll;0;L;01A1 0301;;;;N;;;1EDA;;1EDA
+ 1EDC;LATIN CAPITAL LETTER O WITH HORN AND GRAVE;Lu;0;L;01A0 0300;;;;N;;;;1EDD;
+ 1EDD;LATIN SMALL LETTER O WITH HORN AND GRAVE;Ll;0;L;01A1 0300;;;;N;;;1EDC;;1EDC
+ 1EDE;LATIN CAPITAL LETTER O WITH HORN AND HOOK ABOVE;Lu;0;L;01A0 0309;;;;N;;;;1EDF;
+ 1EDF;LATIN SMALL LETTER O WITH HORN AND HOOK ABOVE;Ll;0;L;01A1 0309;;;;N;;;1EDE;;1EDE
+ 1EE0;LATIN CAPITAL LETTER O WITH HORN AND TILDE;Lu;0;L;01A0 0303;;;;N;;;;1EE1;
+ 1EE1;LATIN SMALL LETTER O WITH HORN AND TILDE;Ll;0;L;01A1 0303;;;;N;;;1EE0;;1EE0
+ 1EE2;LATIN CAPITAL LETTER O WITH HORN AND DOT BELOW;Lu;0;L;01A0 0323;;;;N;;;;1EE3;
+ 1EE3;LATIN SMALL LETTER O WITH HORN AND DOT BELOW;Ll;0;L;01A1 0323;;;;N;;;1EE2;;1EE2
+ 1EE4;LATIN CAPITAL LETTER U WITH DOT BELOW;Lu;0;L;0055 0323;;;;N;;;;1EE5;
+ 1EE5;LATIN SMALL LETTER U WITH DOT BELOW;Ll;0;L;0075 0323;;;;N;;;1EE4;;1EE4
+ 1EE6;LATIN CAPITAL LETTER U WITH HOOK ABOVE;Lu;0;L;0055 0309;;;;N;;;;1EE7;
+ 1EE7;LATIN SMALL LETTER U WITH HOOK ABOVE;Ll;0;L;0075 0309;;;;N;;;1EE6;;1EE6
+ 1EE8;LATIN CAPITAL LETTER U WITH HORN AND ACUTE;Lu;0;L;01AF 0301;;;;N;;;;1EE9;
+ 1EE9;LATIN SMALL LETTER U WITH HORN AND ACUTE;Ll;0;L;01B0 0301;;;;N;;;1EE8;;1EE8
+ 1EEA;LATIN CAPITAL LETTER U WITH HORN AND GRAVE;Lu;0;L;01AF 0300;;;;N;;;;1EEB;
+ 1EEB;LATIN SMALL LETTER U WITH HORN AND GRAVE;Ll;0;L;01B0 0300;;;;N;;;1EEA;;1EEA
+ 1EEC;LATIN CAPITAL LETTER U WITH HORN AND HOOK ABOVE;Lu;0;L;01AF 0309;;;;N;;;;1EED;
+ 1EED;LATIN SMALL LETTER U WITH HORN AND HOOK ABOVE;Ll;0;L;01B0 0309;;;;N;;;1EEC;;1EEC
+ 1EEE;LATIN CAPITAL LETTER U WITH HORN AND TILDE;Lu;0;L;01AF 0303;;;;N;;;;1EEF;
+ 1EEF;LATIN SMALL LETTER U WITH HORN AND TILDE;Ll;0;L;01B0 0303;;;;N;;;1EEE;;1EEE
+ 1EF0;LATIN CAPITAL LETTER U WITH HORN AND DOT BELOW;Lu;0;L;01AF 0323;;;;N;;;;1EF1;
+ 1EF1;LATIN SMALL LETTER U WITH HORN AND DOT BELOW;Ll;0;L;01B0 0323;;;;N;;;1EF0;;1EF0
+ 1EF2;LATIN CAPITAL LETTER Y WITH GRAVE;Lu;0;L;0059 0300;;;;N;;;;1EF3;
+ 1EF3;LATIN SMALL LETTER Y WITH GRAVE;Ll;0;L;0079 0300;;;;N;;;1EF2;;1EF2
+ 1EF4;LATIN CAPITAL LETTER Y WITH DOT BELOW;Lu;0;L;0059 0323;;;;N;;;;1EF5;
+ 1EF5;LATIN SMALL LETTER Y WITH DOT BELOW;Ll;0;L;0079 0323;;;;N;;;1EF4;;1EF4
+ 1EF6;LATIN CAPITAL LETTER Y WITH HOOK ABOVE;Lu;0;L;0059 0309;;;;N;;;;1EF7;
+ 1EF7;LATIN SMALL LETTER Y WITH HOOK ABOVE;Ll;0;L;0079 0309;;;;N;;;1EF6;;1EF6
+ 1EF8;LATIN CAPITAL LETTER Y WITH TILDE;Lu;0;L;0059 0303;;;;N;;;;1EF9;
+ 1EF9;LATIN SMALL LETTER Y WITH TILDE;Ll;0;L;0079 0303;;;;N;;;1EF8;;1EF8
+ 1EFA;LATIN CAPITAL LETTER MIDDLE-WELSH LL;Lu;0;L;;;;;N;;;;1EFB;
+ 1EFB;LATIN SMALL LETTER MIDDLE-WELSH LL;Ll;0;L;;;;;N;;;1EFA;;1EFA
+ 1EFC;LATIN CAPITAL LETTER MIDDLE-WELSH V;Lu;0;L;;;;;N;;;;1EFD;
+ 1EFD;LATIN SMALL LETTER MIDDLE-WELSH V;Ll;0;L;;;;;N;;;1EFC;;1EFC
+ 1EFE;LATIN CAPITAL LETTER Y WITH LOOP;Lu;0;L;;;;;N;;;;1EFF;
+ 1EFF;LATIN SMALL LETTER Y WITH LOOP;Ll;0;L;;;;;N;;;1EFE;;1EFE
+ 1F00;GREEK SMALL LETTER ALPHA WITH PSILI;Ll;0;L;03B1 0313;;;;N;;;1F08;;1F08
+ 1F01;GREEK SMALL LETTER ALPHA WITH DASIA;Ll;0;L;03B1 0314;;;;N;;;1F09;;1F09
+ 1F02;GREEK SMALL LETTER ALPHA WITH PSILI AND VARIA;Ll;0;L;1F00 0300;;;;N;;;1F0A;;1F0A
+ 1F03;GREEK SMALL LETTER ALPHA WITH DASIA AND VARIA;Ll;0;L;1F01 0300;;;;N;;;1F0B;;1F0B
+ 1F04;GREEK SMALL LETTER ALPHA WITH PSILI AND OXIA;Ll;0;L;1F00 0301;;;;N;;;1F0C;;1F0C
+ 1F05;GREEK SMALL LETTER ALPHA WITH DASIA AND OXIA;Ll;0;L;1F01 0301;;;;N;;;1F0D;;1F0D
+ 1F06;GREEK SMALL LETTER ALPHA WITH PSILI AND PERISPOMENI;Ll;0;L;1F00 0342;;;;N;;;1F0E;;1F0E
+ 1F07;GREEK SMALL LETTER ALPHA WITH DASIA AND PERISPOMENI;Ll;0;L;1F01 0342;;;;N;;;1F0F;;1F0F
+ 1F08;GREEK CAPITAL LETTER ALPHA WITH PSILI;Lu;0;L;0391 0313;;;;N;;;;1F00;
+ 1F09;GREEK CAPITAL LETTER ALPHA WITH DASIA;Lu;0;L;0391 0314;;;;N;;;;1F01;
+ 1F0A;GREEK CAPITAL LETTER ALPHA WITH PSILI AND VARIA;Lu;0;L;1F08 0300;;;;N;;;;1F02;
+ 1F0B;GREEK CAPITAL LETTER ALPHA WITH DASIA AND VARIA;Lu;0;L;1F09 0300;;;;N;;;;1F03;
+ 1F0C;GREEK CAPITAL LETTER ALPHA WITH PSILI AND OXIA;Lu;0;L;1F08 0301;;;;N;;;;1F04;
+ 1F0D;GREEK CAPITAL LETTER ALPHA WITH DASIA AND OXIA;Lu;0;L;1F09 0301;;;;N;;;;1F05;
+ 1F0E;GREEK CAPITAL LETTER ALPHA WITH PSILI AND PERISPOMENI;Lu;0;L;1F08 0342;;;;N;;;;1F06;
+ 1F0F;GREEK CAPITAL LETTER ALPHA WITH DASIA AND PERISPOMENI;Lu;0;L;1F09 0342;;;;N;;;;1F07;
+ 1F10;GREEK SMALL LETTER EPSILON WITH PSILI;Ll;0;L;03B5 0313;;;;N;;;1F18;;1F18
+ 1F11;GREEK SMALL LETTER EPSILON WITH DASIA;Ll;0;L;03B5 0314;;;;N;;;1F19;;1F19
+ 1F12;GREEK SMALL LETTER EPSILON WITH PSILI AND VARIA;Ll;0;L;1F10 0300;;;;N;;;1F1A;;1F1A
+ 1F13;GREEK SMALL LETTER EPSILON WITH DASIA AND VARIA;Ll;0;L;1F11 0300;;;;N;;;1F1B;;1F1B
+ 1F14;GREEK SMALL LETTER EPSILON WITH PSILI AND OXIA;Ll;0;L;1F10 0301;;;;N;;;1F1C;;1F1C
+ 1F15;GREEK SMALL LETTER EPSILON WITH DASIA AND OXIA;Ll;0;L;1F11 0301;;;;N;;;1F1D;;1F1D
+ 1F18;GREEK CAPITAL LETTER EPSILON WITH PSILI;Lu;0;L;0395 0313;;;;N;;;;1F10;
+ 1F19;GREEK CAPITAL LETTER EPSILON WITH DASIA;Lu;0;L;0395 0314;;;;N;;;;1F11;
+ 1F1A;GREEK CAPITAL LETTER EPSILON WITH PSILI AND VARIA;Lu;0;L;1F18 0300;;;;N;;;;1F12;
+ 1F1B;GREEK CAPITAL LETTER EPSILON WITH DASIA AND VARIA;Lu;0;L;1F19 0300;;;;N;;;;1F13;
+ 1F1C;GREEK CAPITAL LETTER EPSILON WITH PSILI AND OXIA;Lu;0;L;1F18 0301;;;;N;;;;1F14;
+ 1F1D;GREEK CAPITAL LETTER EPSILON WITH DASIA AND OXIA;Lu;0;L;1F19 0301;;;;N;;;;1F15;
+ 1F20;GREEK SMALL LETTER ETA WITH PSILI;Ll;0;L;03B7 0313;;;;N;;;1F28;;1F28
+ 1F21;GREEK SMALL LETTER ETA WITH DASIA;Ll;0;L;03B7 0314;;;;N;;;1F29;;1F29
+ 1F22;GREEK SMALL LETTER ETA WITH PSILI AND VARIA;Ll;0;L;1F20 0300;;;;N;;;1F2A;;1F2A
+ 1F23;GREEK SMALL LETTER ETA WITH DASIA AND VARIA;Ll;0;L;1F21 0300;;;;N;;;1F2B;;1F2B
+ 1F24;GREEK SMALL LETTER ETA WITH PSILI AND OXIA;Ll;0;L;1F20 0301;;;;N;;;1F2C;;1F2C
+ 1F25;GREEK SMALL LETTER ETA WITH DASIA AND OXIA;Ll;0;L;1F21 0301;;;;N;;;1F2D;;1F2D
+ 1F26;GREEK SMALL LETTER ETA WITH PSILI AND PERISPOMENI;Ll;0;L;1F20 0342;;;;N;;;1F2E;;1F2E
+ 1F27;GREEK SMALL LETTER ETA WITH DASIA AND PERISPOMENI;Ll;0;L;1F21 0342;;;;N;;;1F2F;;1F2F
+ 1F28;GREEK CAPITAL LETTER ETA WITH PSILI;Lu;0;L;0397 0313;;;;N;;;;1F20;
+ 1F29;GREEK CAPITAL LETTER ETA WITH DASIA;Lu;0;L;0397 0314;;;;N;;;;1F21;
+ 1F2A;GREEK CAPITAL LETTER ETA WITH PSILI AND VARIA;Lu;0;L;1F28 0300;;;;N;;;;1F22;
+ 1F2B;GREEK CAPITAL LETTER ETA WITH DASIA AND VARIA;Lu;0;L;1F29 0300;;;;N;;;;1F23;
+ 1F2C;GREEK CAPITAL LETTER ETA WITH PSILI AND OXIA;Lu;0;L;1F28 0301;;;;N;;;;1F24;
+ 1F2D;GREEK CAPITAL LETTER ETA WITH DASIA AND OXIA;Lu;0;L;1F29 0301;;;;N;;;;1F25;
+ 1F2E;GREEK CAPITAL LETTER ETA WITH PSILI AND PERISPOMENI;Lu;0;L;1F28 0342;;;;N;;;;1F26;
+ 1F2F;GREEK CAPITAL LETTER ETA WITH DASIA AND PERISPOMENI;Lu;0;L;1F29 0342;;;;N;;;;1F27;
+ 1F30;GREEK SMALL LETTER IOTA WITH PSILI;Ll;0;L;03B9 0313;;;;N;;;1F38;;1F38
+ 1F31;GREEK SMALL LETTER IOTA WITH DASIA;Ll;0;L;03B9 0314;;;;N;;;1F39;;1F39
+ 1F32;GREEK SMALL LETTER IOTA WITH PSILI AND VARIA;Ll;0;L;1F30 0300;;;;N;;;1F3A;;1F3A
+ 1F33;GREEK SMALL LETTER IOTA WITH DASIA AND VARIA;Ll;0;L;1F31 0300;;;;N;;;1F3B;;1F3B
+ 1F34;GREEK SMALL LETTER IOTA WITH PSILI AND OXIA;Ll;0;L;1F30 0301;;;;N;;;1F3C;;1F3C
+ 1F35;GREEK SMALL LETTER IOTA WITH DASIA AND OXIA;Ll;0;L;1F31 0301;;;;N;;;1F3D;;1F3D
+ 1F36;GREEK SMALL LETTER IOTA WITH PSILI AND PERISPOMENI;Ll;0;L;1F30 0342;;;;N;;;1F3E;;1F3E
+ 1F37;GREEK SMALL LETTER IOTA WITH DASIA AND PERISPOMENI;Ll;0;L;1F31 0342;;;;N;;;1F3F;;1F3F
+ 1F38;GREEK CAPITAL LETTER IOTA WITH PSILI;Lu;0;L;0399 0313;;;;N;;;;1F30;
+ 1F39;GREEK CAPITAL LETTER IOTA WITH DASIA;Lu;0;L;0399 0314;;;;N;;;;1F31;
+ 1F3A;GREEK CAPITAL LETTER IOTA WITH PSILI AND VARIA;Lu;0;L;1F38 0300;;;;N;;;;1F32;
+ 1F3B;GREEK CAPITAL LETTER IOTA WITH DASIA AND VARIA;Lu;0;L;1F39 0300;;;;N;;;;1F33;
+ 1F3C;GREEK CAPITAL LETTER IOTA WITH PSILI AND OXIA;Lu;0;L;1F38 0301;;;;N;;;;1F34;
+ 1F3D;GREEK CAPITAL LETTER IOTA WITH DASIA AND OXIA;Lu;0;L;1F39 0301;;;;N;;;;1F35;
+ 1F3E;GREEK CAPITAL LETTER IOTA WITH PSILI AND PERISPOMENI;Lu;0;L;1F38 0342;;;;N;;;;1F36;
+ 1F3F;GREEK CAPITAL LETTER IOTA WITH DASIA AND PERISPOMENI;Lu;0;L;1F39 0342;;;;N;;;;1F37;
+ 1F40;GREEK SMALL LETTER OMICRON WITH PSILI;Ll;0;L;03BF 0313;;;;N;;;1F48;;1F48
+ 1F41;GREEK SMALL LETTER OMICRON WITH DASIA;Ll;0;L;03BF 0314;;;;N;;;1F49;;1F49
+ 1F42;GREEK SMALL LETTER OMICRON WITH PSILI AND VARIA;Ll;0;L;1F40 0300;;;;N;;;1F4A;;1F4A
+ 1F43;GREEK SMALL LETTER OMICRON WITH DASIA AND VARIA;Ll;0;L;1F41 0300;;;;N;;;1F4B;;1F4B
+ 1F44;GREEK SMALL LETTER OMICRON WITH PSILI AND OXIA;Ll;0;L;1F40 0301;;;;N;;;1F4C;;1F4C
+ 1F45;GREEK SMALL LETTER OMICRON WITH DASIA AND OXIA;Ll;0;L;1F41 0301;;;;N;;;1F4D;;1F4D
+ 1F48;GREEK CAPITAL LETTER OMICRON WITH PSILI;Lu;0;L;039F 0313;;;;N;;;;1F40;
+ 1F49;GREEK CAPITAL LETTER OMICRON WITH DASIA;Lu;0;L;039F 0314;;;;N;;;;1F41;
+ 1F4A;GREEK CAPITAL LETTER OMICRON WITH PSILI AND VARIA;Lu;0;L;1F48 0300;;;;N;;;;1F42;
+ 1F4B;GREEK CAPITAL LETTER OMICRON WITH DASIA AND VARIA;Lu;0;L;1F49 0300;;;;N;;;;1F43;
+ 1F4C;GREEK CAPITAL LETTER OMICRON WITH PSILI AND OXIA;Lu;0;L;1F48 0301;;;;N;;;;1F44;
+ 1F4D;GREEK CAPITAL LETTER OMICRON WITH DASIA AND OXIA;Lu;0;L;1F49 0301;;;;N;;;;1F45;
+ 1F50;GREEK SMALL LETTER UPSILON WITH PSILI;Ll;0;L;03C5 0313;;;;N;;;;;
+ 1F51;GREEK SMALL LETTER UPSILON WITH DASIA;Ll;0;L;03C5 0314;;;;N;;;1F59;;1F59
+ 1F52;GREEK SMALL LETTER UPSILON WITH PSILI AND VARIA;Ll;0;L;1F50 0300;;;;N;;;;;
+ 1F53;GREEK SMALL LETTER UPSILON WITH DASIA AND VARIA;Ll;0;L;1F51 0300;;;;N;;;1F5B;;1F5B
+ 1F54;GREEK SMALL LETTER UPSILON WITH PSILI AND OXIA;Ll;0;L;1F50 0301;;;;N;;;;;
+ 1F55;GREEK SMALL LETTER UPSILON WITH DASIA AND OXIA;Ll;0;L;1F51 0301;;;;N;;;1F5D;;1F5D
+ 1F56;GREEK SMALL LETTER UPSILON WITH PSILI AND PERISPOMENI;Ll;0;L;1F50 0342;;;;N;;;;;
+ 1F57;GREEK SMALL LETTER UPSILON WITH DASIA AND PERISPOMENI;Ll;0;L;1F51 0342;;;;N;;;1F5F;;1F5F
+ 1F59;GREEK CAPITAL LETTER UPSILON WITH DASIA;Lu;0;L;03A5 0314;;;;N;;;;1F51;
+ 1F5B;GREEK CAPITAL LETTER UPSILON WITH DASIA AND VARIA;Lu;0;L;1F59 0300;;;;N;;;;1F53;
+ 1F5D;GREEK CAPITAL LETTER UPSILON WITH DASIA AND OXIA;Lu;0;L;1F59 0301;;;;N;;;;1F55;
+ 1F5F;GREEK CAPITAL LETTER UPSILON WITH DASIA AND PERISPOMENI;Lu;0;L;1F59 0342;;;;N;;;;1F57;
+ 1F60;GREEK SMALL LETTER OMEGA WITH PSILI;Ll;0;L;03C9 0313;;;;N;;;1F68;;1F68
+ 1F61;GREEK SMALL LETTER OMEGA WITH DASIA;Ll;0;L;03C9 0314;;;;N;;;1F69;;1F69
+ 1F62;GREEK SMALL LETTER OMEGA WITH PSILI AND VARIA;Ll;0;L;1F60 0300;;;;N;;;1F6A;;1F6A
+ 1F63;GREEK SMALL LETTER OMEGA WITH DASIA AND VARIA;Ll;0;L;1F61 0300;;;;N;;;1F6B;;1F6B
+ 1F64;GREEK SMALL LETTER OMEGA WITH PSILI AND OXIA;Ll;0;L;1F60 0301;;;;N;;;1F6C;;1F6C
+ 1F65;GREEK SMALL LETTER OMEGA WITH DASIA AND OXIA;Ll;0;L;1F61 0301;;;;N;;;1F6D;;1F6D
+ 1F66;GREEK SMALL LETTER OMEGA WITH PSILI AND PERISPOMENI;Ll;0;L;1F60 0342;;;;N;;;1F6E;;1F6E
+ 1F67;GREEK SMALL LETTER OMEGA WITH DASIA AND PERISPOMENI;Ll;0;L;1F61 0342;;;;N;;;1F6F;;1F6F
+ 1F68;GREEK CAPITAL LETTER OMEGA WITH PSILI;Lu;0;L;03A9 0313;;;;N;;;;1F60;
+ 1F69;GREEK CAPITAL LETTER OMEGA WITH DASIA;Lu;0;L;03A9 0314;;;;N;;;;1F61;
+ 1F6A;GREEK CAPITAL LETTER OMEGA WITH PSILI AND VARIA;Lu;0;L;1F68 0300;;;;N;;;;1F62;
+ 1F6B;GREEK CAPITAL LETTER OMEGA WITH DASIA AND VARIA;Lu;0;L;1F69 0300;;;;N;;;;1F63;
+ 1F6C;GREEK CAPITAL LETTER OMEGA WITH PSILI AND OXIA;Lu;0;L;1F68 0301;;;;N;;;;1F64;
+ 1F6D;GREEK CAPITAL LETTER OMEGA WITH DASIA AND OXIA;Lu;0;L;1F69 0301;;;;N;;;;1F65;
+ 1F6E;GREEK CAPITAL LETTER OMEGA WITH PSILI AND PERISPOMENI;Lu;0;L;1F68 0342;;;;N;;;;1F66;
+ 1F6F;GREEK CAPITAL LETTER OMEGA WITH DASIA AND PERISPOMENI;Lu;0;L;1F69 0342;;;;N;;;;1F67;
+ 1F70;GREEK SMALL LETTER ALPHA WITH VARIA;Ll;0;L;03B1 0300;;;;N;;;1FBA;;1FBA
+ 1F71;GREEK SMALL LETTER ALPHA WITH OXIA;Ll;0;L;03AC;;;;N;;;1FBB;;1FBB
+ 1F72;GREEK SMALL LETTER EPSILON WITH VARIA;Ll;0;L;03B5 0300;;;;N;;;1FC8;;1FC8
+ 1F73;GREEK SMALL LETTER EPSILON WITH OXIA;Ll;0;L;03AD;;;;N;;;1FC9;;1FC9
+ 1F74;GREEK SMALL LETTER ETA WITH VARIA;Ll;0;L;03B7 0300;;;;N;;;1FCA;;1FCA
+ 1F75;GREEK SMALL LETTER ETA WITH OXIA;Ll;0;L;03AE;;;;N;;;1FCB;;1FCB
+ 1F76;GREEK SMALL LETTER IOTA WITH VARIA;Ll;0;L;03B9 0300;;;;N;;;1FDA;;1FDA
+ 1F77;GREEK SMALL LETTER IOTA WITH OXIA;Ll;0;L;03AF;;;;N;;;1FDB;;1FDB
+ 1F78;GREEK SMALL LETTER OMICRON WITH VARIA;Ll;0;L;03BF 0300;;;;N;;;1FF8;;1FF8
+ 1F79;GREEK SMALL LETTER OMICRON WITH OXIA;Ll;0;L;03CC;;;;N;;;1FF9;;1FF9
+ 1F7A;GREEK SMALL LETTER UPSILON WITH VARIA;Ll;0;L;03C5 0300;;;;N;;;1FEA;;1FEA
+ 1F7B;GREEK SMALL LETTER UPSILON WITH OXIA;Ll;0;L;03CD;;;;N;;;1FEB;;1FEB
+ 1F7C;GREEK SMALL LETTER OMEGA WITH VARIA;Ll;0;L;03C9 0300;;;;N;;;1FFA;;1FFA
+ 1F7D;GREEK SMALL LETTER OMEGA WITH OXIA;Ll;0;L;03CE;;;;N;;;1FFB;;1FFB
+ 1F80;GREEK SMALL LETTER ALPHA WITH PSILI AND YPOGEGRAMMENI;Ll;0;L;1F00 0345;;;;N;;;1F88;;1F88
+ 1F81;GREEK SMALL LETTER ALPHA WITH DASIA AND YPOGEGRAMMENI;Ll;0;L;1F01 0345;;;;N;;;1F89;;1F89
+ 1F82;GREEK SMALL LETTER ALPHA WITH PSILI AND VARIA AND YPOGEGRAMMENI;Ll;0;L;1F02 0345;;;;N;;;1F8A;;1F8A
+ 1F83;GREEK SMALL LETTER ALPHA WITH DASIA AND VARIA AND YPOGEGRAMMENI;Ll;0;L;1F03 0345;;;;N;;;1F8B;;1F8B
+ 1F84;GREEK SMALL LETTER ALPHA WITH PSILI AND OXIA AND YPOGEGRAMMENI;Ll;0;L;1F04 0345;;;;N;;;1F8C;;1F8C
+ 1F85;GREEK SMALL LETTER ALPHA WITH DASIA AND OXIA AND YPOGEGRAMMENI;Ll;0;L;1F05 0345;;;;N;;;1F8D;;1F8D
+ 1F86;GREEK SMALL LETTER ALPHA WITH PSILI AND PERISPOMENI AND YPOGEGRAMMENI;Ll;0;L;1F06 0345;;;;N;;;1F8E;;1F8E
+ 1F87;GREEK SMALL LETTER ALPHA WITH DASIA AND PERISPOMENI AND YPOGEGRAMMENI;Ll;0;L;1F07 0345;;;;N;;;1F8F;;1F8F
+ 1F88;GREEK CAPITAL LETTER ALPHA WITH PSILI AND PROSGEGRAMMENI;Lt;0;L;1F08 0345;;;;N;;;;1F80;
+ 1F89;GREEK CAPITAL LETTER ALPHA WITH DASIA AND PROSGEGRAMMENI;Lt;0;L;1F09 0345;;;;N;;;;1F81;
+ 1F8A;GREEK CAPITAL LETTER ALPHA WITH PSILI AND VARIA AND PROSGEGRAMMENI;Lt;0;L;1F0A 0345;;;;N;;;;1F82;
+ 1F8B;GREEK CAPITAL LETTER ALPHA WITH DASIA AND VARIA AND PROSGEGRAMMENI;Lt;0;L;1F0B 0345;;;;N;;;;1F83;
+ 1F8C;GREEK CAPITAL LETTER ALPHA WITH PSILI AND OXIA AND PROSGEGRAMMENI;Lt;0;L;1F0C 0345;;;;N;;;;1F84;
+ 1F8D;GREEK CAPITAL LETTER ALPHA WITH DASIA AND OXIA AND PROSGEGRAMMENI;Lt;0;L;1F0D 0345;;;;N;;;;1F85;
+ 1F8E;GREEK CAPITAL LETTER ALPHA WITH PSILI AND PERISPOMENI AND PROSGEGRAMMENI;Lt;0;L;1F0E 0345;;;;N;;;;1F86;
+ 1F8F;GREEK CAPITAL LETTER ALPHA WITH DASIA AND PERISPOMENI AND PROSGEGRAMMENI;Lt;0;L;1F0F 0345;;;;N;;;;1F87;
+ 1F90;GREEK SMALL LETTER ETA WITH PSILI AND YPOGEGRAMMENI;Ll;0;L;1F20 0345;;;;N;;;1F98;;1F98
+ 1F91;GREEK SMALL LETTER ETA WITH DASIA AND YPOGEGRAMMENI;Ll;0;L;1F21 0345;;;;N;;;1F99;;1F99
+ 1F92;GREEK SMALL LETTER ETA WITH PSILI AND VARIA AND YPOGEGRAMMENI;Ll;0;L;1F22 0345;;;;N;;;1F9A;;1F9A
+ 1F93;GREEK SMALL LETTER ETA WITH DASIA AND VARIA AND YPOGEGRAMMENI;Ll;0;L;1F23 0345;;;;N;;;1F9B;;1F9B
+ 1F94;GREEK SMALL LETTER ETA WITH PSILI AND OXIA AND YPOGEGRAMMENI;Ll;0;L;1F24 0345;;;;N;;;1F9C;;1F9C
+ 1F95;GREEK SMALL LETTER ETA WITH DASIA AND OXIA AND YPOGEGRAMMENI;Ll;0;L;1F25 0345;;;;N;;;1F9D;;1F9D
+ 1F96;GREEK SMALL LETTER ETA WITH PSILI AND PERISPOMENI AND YPOGEGRAMMENI;Ll;0;L;1F26 0345;;;;N;;;1F9E;;1F9E
+ 1F97;GREEK SMALL LETTER ETA WITH DASIA AND PERISPOMENI AND YPOGEGRAMMENI;Ll;0;L;1F27 0345;;;;N;;;1F9F;;1F9F
+ 1F98;GREEK CAPITAL LETTER ETA WITH PSILI AND PROSGEGRAMMENI;Lt;0;L;1F28 0345;;;;N;;;;1F90;
+ 1F99;GREEK CAPITAL LETTER ETA WITH DASIA AND PROSGEGRAMMENI;Lt;0;L;1F29 0345;;;;N;;;;1F91;
+ 1F9A;GREEK CAPITAL LETTER ETA WITH PSILI AND VARIA AND PROSGEGRAMMENI;Lt;0;L;1F2A 0345;;;;N;;;;1F92;
+ 1F9B;GREEK CAPITAL LETTER ETA WITH DASIA AND VARIA AND PROSGEGRAMMENI;Lt;0;L;1F2B 0345;;;;N;;;;1F93;
+ 1F9C;GREEK CAPITAL LETTER ETA WITH PSILI AND OXIA AND PROSGEGRAMMENI;Lt;0;L;1F2C 0345;;;;N;;;;1F94;
+ 1F9D;GREEK CAPITAL LETTER ETA WITH DASIA AND OXIA AND PROSGEGRAMMENI;Lt;0;L;1F2D 0345;;;;N;;;;1F95;
+ 1F9E;GREEK CAPITAL LETTER ETA WITH PSILI AND PERISPOMENI AND PROSGEGRAMMENI;Lt;0;L;1F2E 0345;;;;N;;;;1F96;
+ 1F9F;GREEK CAPITAL LETTER ETA WITH DASIA AND PERISPOMENI AND PROSGEGRAMMENI;Lt;0;L;1F2F 0345;;;;N;;;;1F97;
+ 1FA0;GREEK SMALL LETTER OMEGA WITH PSILI AND YPOGEGRAMMENI;Ll;0;L;1F60 0345;;;;N;;;1FA8;;1FA8
+ 1FA1;GREEK SMALL LETTER OMEGA WITH DASIA AND YPOGEGRAMMENI;Ll;0;L;1F61 0345;;;;N;;;1FA9;;1FA9
+ 1FA2;GREEK SMALL LETTER OMEGA WITH PSILI AND VARIA AND YPOGEGRAMMENI;Ll;0;L;1F62 0345;;;;N;;;1FAA;;1FAA
+ 1FA3;GREEK SMALL LETTER OMEGA WITH DASIA AND VARIA AND YPOGEGRAMMENI;Ll;0;L;1F63 0345;;;;N;;;1FAB;;1FAB
+ 1FA4;GREEK SMALL LETTER OMEGA WITH PSILI AND OXIA AND YPOGEGRAMMENI;Ll;0;L;1F64 0345;;;;N;;;1FAC;;1FAC
+ 1FA5;GREEK SMALL LETTER OMEGA WITH DASIA AND OXIA AND YPOGEGRAMMENI;Ll;0;L;1F65 0345;;;;N;;;1FAD;;1FAD
+ 1FA6;GREEK SMALL LETTER OMEGA WITH PSILI AND PERISPOMENI AND YPOGEGRAMMENI;Ll;0;L;1F66 0345;;;;N;;;1FAE;;1FAE
+ 1FA7;GREEK SMALL LETTER OMEGA WITH DASIA AND PERISPOMENI AND YPOGEGRAMMENI;Ll;0;L;1F67 0345;;;;N;;;1FAF;;1FAF
+ 1FA8;GREEK CAPITAL LETTER OMEGA WITH PSILI AND PROSGEGRAMMENI;Lt;0;L;1F68 0345;;;;N;;;;1FA0;
+ 1FA9;GREEK CAPITAL LETTER OMEGA WITH DASIA AND PROSGEGRAMMENI;Lt;0;L;1F69 0345;;;;N;;;;1FA1;
+ 1FAA;GREEK CAPITAL LETTER OMEGA WITH PSILI AND VARIA AND PROSGEGRAMMENI;Lt;0;L;1F6A 0345;;;;N;;;;1FA2;
+ 1FAB;GREEK CAPITAL LETTER OMEGA WITH DASIA AND VARIA AND PROSGEGRAMMENI;Lt;0;L;1F6B 0345;;;;N;;;;1FA3;
+ 1FAC;GREEK CAPITAL LETTER OMEGA WITH PSILI AND OXIA AND PROSGEGRAMMENI;Lt;0;L;1F6C 0345;;;;N;;;;1FA4;
+ 1FAD;GREEK CAPITAL LETTER OMEGA WITH DASIA AND OXIA AND PROSGEGRAMMENI;Lt;0;L;1F6D 0345;;;;N;;;;1FA5;
+ 1FAE;GREEK CAPITAL LETTER OMEGA WITH PSILI AND PERISPOMENI AND PROSGEGRAMMENI;Lt;0;L;1F6E 0345;;;;N;;;;1FA6;
+ 1FAF;GREEK CAPITAL LETTER OMEGA WITH DASIA AND PERISPOMENI AND PROSGEGRAMMENI;Lt;0;L;1F6F 0345;;;;N;;;;1FA7;
+ 1FB0;GREEK SMALL LETTER ALPHA WITH VRACHY;Ll;0;L;03B1 0306;;;;N;;;1FB8;;1FB8
+ 1FB1;GREEK SMALL LETTER ALPHA WITH MACRON;Ll;0;L;03B1 0304;;;;N;;;1FB9;;1FB9
+ 1FB2;GREEK SMALL LETTER ALPHA WITH VARIA AND YPOGEGRAMMENI;Ll;0;L;1F70 0345;;;;N;;;;;
+ 1FB3;GREEK SMALL LETTER ALPHA WITH YPOGEGRAMMENI;Ll;0;L;03B1 0345;;;;N;;;1FBC;;1FBC
+ 1FB4;GREEK SMALL LETTER ALPHA WITH OXIA AND YPOGEGRAMMENI;Ll;0;L;03AC 0345;;;;N;;;;;
+ 1FB6;GREEK SMALL LETTER ALPHA WITH PERISPOMENI;Ll;0;L;03B1 0342;;;;N;;;;;
+ 1FB7;GREEK SMALL LETTER ALPHA WITH PERISPOMENI AND YPOGEGRAMMENI;Ll;0;L;1FB6 0345;;;;N;;;;;
+ 1FB8;GREEK CAPITAL LETTER ALPHA WITH VRACHY;Lu;0;L;0391 0306;;;;N;;;;1FB0;
+ 1FB9;GREEK CAPITAL LETTER ALPHA WITH MACRON;Lu;0;L;0391 0304;;;;N;;;;1FB1;
+ 1FBA;GREEK CAPITAL LETTER ALPHA WITH VARIA;Lu;0;L;0391 0300;;;;N;;;;1F70;
+ 1FBB;GREEK CAPITAL LETTER ALPHA WITH OXIA;Lu;0;L;0386;;;;N;;;;1F71;
+ 1FBC;GREEK CAPITAL LETTER ALPHA WITH PROSGEGRAMMENI;Lt;0;L;0391 0345;;;;N;;;;1FB3;
+ 1FBD;GREEK KORONIS;Sk;0;ON;<compat> 0020 0313;;;;N;;;;;
+ 1FBE;GREEK PROSGEGRAMMENI;Ll;0;L;03B9;;;;N;;;0399;;0399
+ 1FBF;GREEK PSILI;Sk;0;ON;<compat> 0020 0313;;;;N;;;;;
+ 1FC0;GREEK PERISPOMENI;Sk;0;ON;<compat> 0020 0342;;;;N;;;;;
+ 1FC1;GREEK DIALYTIKA AND PERISPOMENI;Sk;0;ON;00A8 0342;;;;N;;;;;
+ 1FC2;GREEK SMALL LETTER ETA WITH VARIA AND YPOGEGRAMMENI;Ll;0;L;1F74 0345;;;;N;;;;;
+ 1FC3;GREEK SMALL LETTER ETA WITH YPOGEGRAMMENI;Ll;0;L;03B7 0345;;;;N;;;1FCC;;1FCC
+ 1FC4;GREEK SMALL LETTER ETA WITH OXIA AND YPOGEGRAMMENI;Ll;0;L;03AE 0345;;;;N;;;;;
+ 1FC6;GREEK SMALL LETTER ETA WITH PERISPOMENI;Ll;0;L;03B7 0342;;;;N;;;;;
+ 1FC7;GREEK SMALL LETTER ETA WITH PERISPOMENI AND YPOGEGRAMMENI;Ll;0;L;1FC6 0345;;;;N;;;;;
+ 1FC8;GREEK CAPITAL LETTER EPSILON WITH VARIA;Lu;0;L;0395 0300;;;;N;;;;1F72;
+ 1FC9;GREEK CAPITAL LETTER EPSILON WITH OXIA;Lu;0;L;0388;;;;N;;;;1F73;
+ 1FCA;GREEK CAPITAL LETTER ETA WITH VARIA;Lu;0;L;0397 0300;;;;N;;;;1F74;
+ 1FCB;GREEK CAPITAL LETTER ETA WITH OXIA;Lu;0;L;0389;;;;N;;;;1F75;
+ 1FCC;GREEK CAPITAL LETTER ETA WITH PROSGEGRAMMENI;Lt;0;L;0397 0345;;;;N;;;;1FC3;
+ 1FCD;GREEK PSILI AND VARIA;Sk;0;ON;1FBF 0300;;;;N;;;;;
+ 1FCE;GREEK PSILI AND OXIA;Sk;0;ON;1FBF 0301;;;;N;;;;;
+ 1FCF;GREEK PSILI AND PERISPOMENI;Sk;0;ON;1FBF 0342;;;;N;;;;;
+ 1FD0;GREEK SMALL LETTER IOTA WITH VRACHY;Ll;0;L;03B9 0306;;;;N;;;1FD8;;1FD8
+ 1FD1;GREEK SMALL LETTER IOTA WITH MACRON;Ll;0;L;03B9 0304;;;;N;;;1FD9;;1FD9
+ 1FD2;GREEK SMALL LETTER IOTA WITH DIALYTIKA AND VARIA;Ll;0;L;03CA 0300;;;;N;;;;;
+ 1FD3;GREEK SMALL LETTER IOTA WITH DIALYTIKA AND OXIA;Ll;0;L;0390;;;;N;;;;;
+ 1FD6;GREEK SMALL LETTER IOTA WITH PERISPOMENI;Ll;0;L;03B9 0342;;;;N;;;;;
+ 1FD7;GREEK SMALL LETTER IOTA WITH DIALYTIKA AND PERISPOMENI;Ll;0;L;03CA 0342;;;;N;;;;;
+ 1FD8;GREEK CAPITAL LETTER IOTA WITH VRACHY;Lu;0;L;0399 0306;;;;N;;;;1FD0;
+ 1FD9;GREEK CAPITAL LETTER IOTA WITH MACRON;Lu;0;L;0399 0304;;;;N;;;;1FD1;
+ 1FDA;GREEK CAPITAL LETTER IOTA WITH VARIA;Lu;0;L;0399 0300;;;;N;;;;1F76;
+ 1FDB;GREEK CAPITAL LETTER IOTA WITH OXIA;Lu;0;L;038A;;;;N;;;;1F77;
+ 1FDD;GREEK DASIA AND VARIA;Sk;0;ON;1FFE 0300;;;;N;;;;;
+ 1FDE;GREEK DASIA AND OXIA;Sk;0;ON;1FFE 0301;;;;N;;;;;
+ 1FDF;GREEK DASIA AND PERISPOMENI;Sk;0;ON;1FFE 0342;;;;N;;;;;
+ 1FE0;GREEK SMALL LETTER UPSILON WITH VRACHY;Ll;0;L;03C5 0306;;;;N;;;1FE8;;1FE8
+ 1FE1;GREEK SMALL LETTER UPSILON WITH MACRON;Ll;0;L;03C5 0304;;;;N;;;1FE9;;1FE9
+ 1FE2;GREEK SMALL LETTER UPSILON WITH DIALYTIKA AND VARIA;Ll;0;L;03CB 0300;;;;N;;;;;
+ 1FE3;GREEK SMALL LETTER UPSILON WITH DIALYTIKA AND OXIA;Ll;0;L;03B0;;;;N;;;;;
+ 1FE4;GREEK SMALL LETTER RHO WITH PSILI;Ll;0;L;03C1 0313;;;;N;;;;;
+ 1FE5;GREEK SMALL LETTER RHO WITH DASIA;Ll;0;L;03C1 0314;;;;N;;;1FEC;;1FEC
+ 1FE6;GREEK SMALL LETTER UPSILON WITH PERISPOMENI;Ll;0;L;03C5 0342;;;;N;;;;;
+ 1FE7;GREEK SMALL LETTER UPSILON WITH DIALYTIKA AND PERISPOMENI;Ll;0;L;03CB 0342;;;;N;;;;;
+ 1FE8;GREEK CAPITAL LETTER UPSILON WITH VRACHY;Lu;0;L;03A5 0306;;;;N;;;;1FE0;
+ 1FE9;GREEK CAPITAL LETTER UPSILON WITH MACRON;Lu;0;L;03A5 0304;;;;N;;;;1FE1;
+ 1FEA;GREEK CAPITAL LETTER UPSILON WITH VARIA;Lu;0;L;03A5 0300;;;;N;;;;1F7A;
+ 1FEB;GREEK CAPITAL LETTER UPSILON WITH OXIA;Lu;0;L;038E;;;;N;;;;1F7B;
+ 1FEC;GREEK CAPITAL LETTER RHO WITH DASIA;Lu;0;L;03A1 0314;;;;N;;;;1FE5;
+ 1FED;GREEK DIALYTIKA AND VARIA;Sk;0;ON;00A8 0300;;;;N;;;;;
+ 1FEE;GREEK DIALYTIKA AND OXIA;Sk;0;ON;0385;;;;N;;;;;
+ 1FEF;GREEK VARIA;Sk;0;ON;0060;;;;N;;;;;
+ 1FF2;GREEK SMALL LETTER OMEGA WITH VARIA AND YPOGEGRAMMENI;Ll;0;L;1F7C 0345;;;;N;;;;;
+ 1FF3;GREEK SMALL LETTER OMEGA WITH YPOGEGRAMMENI;Ll;0;L;03C9 0345;;;;N;;;1FFC;;1FFC
+ 1FF4;GREEK SMALL LETTER OMEGA WITH OXIA AND YPOGEGRAMMENI;Ll;0;L;03CE 0345;;;;N;;;;;
+ 1FF6;GREEK SMALL LETTER OMEGA WITH PERISPOMENI;Ll;0;L;03C9 0342;;;;N;;;;;
+ 1FF7;GREEK SMALL LETTER OMEGA WITH PERISPOMENI AND YPOGEGRAMMENI;Ll;0;L;1FF6 0345;;;;N;;;;;
+ 1FF8;GREEK CAPITAL LETTER OMICRON WITH VARIA;Lu;0;L;039F 0300;;;;N;;;;1F78;
+ 1FF9;GREEK CAPITAL LETTER OMICRON WITH OXIA;Lu;0;L;038C;;;;N;;;;1F79;
+ 1FFA;GREEK CAPITAL LETTER OMEGA WITH VARIA;Lu;0;L;03A9 0300;;;;N;;;;1F7C;
+ 1FFB;GREEK CAPITAL LETTER OMEGA WITH OXIA;Lu;0;L;038F;;;;N;;;;1F7D;
+ 1FFC;GREEK CAPITAL LETTER OMEGA WITH PROSGEGRAMMENI;Lt;0;L;03A9 0345;;;;N;;;;1FF3;
+ 1FFD;GREEK OXIA;Sk;0;ON;00B4;;;;N;;;;;
+ 1FFE;GREEK DASIA;Sk;0;ON;<compat> 0020 0314;;;;N;;;;;
+ 2000;EN QUAD;Zs;0;WS;2002;;;;N;;;;;
+ 2001;EM QUAD;Zs;0;WS;2003;;;;N;;;;;
+ 2002;EN SPACE;Zs;0;WS;<compat> 0020;;;;N;;;;;
+ 2003;EM SPACE;Zs;0;WS;<compat> 0020;;;;N;;;;;
+ 2004;THREE-PER-EM SPACE;Zs;0;WS;<compat> 0020;;;;N;;;;;
+ 2005;FOUR-PER-EM SPACE;Zs;0;WS;<compat> 0020;;;;N;;;;;
+ 2006;SIX-PER-EM SPACE;Zs;0;WS;<compat> 0020;;;;N;;;;;
+ 2007;FIGURE SPACE;Zs;0;WS;<noBreak> 0020;;;;N;;;;;
+ 2008;PUNCTUATION SPACE;Zs;0;WS;<compat> 0020;;;;N;;;;;
+ 2009;THIN SPACE;Zs;0;WS;<compat> 0020;;;;N;;;;;
+ 200A;HAIR SPACE;Zs;0;WS;<compat> 0020;;;;N;;;;;
+ 200B;ZERO WIDTH SPACE;Cf;0;BN;;;;;N;;;;;
+ 200C;ZERO WIDTH NON-JOINER;Cf;0;BN;;;;;N;;;;;
+ 200D;ZERO WIDTH JOINER;Cf;0;BN;;;;;N;;;;;
+ 200E;LEFT-TO-RIGHT MARK;Cf;0;L;;;;;N;;;;;
+ 200F;RIGHT-TO-LEFT MARK;Cf;0;R;;;;;N;;;;;
+ 2010;HYPHEN;Pd;0;ON;;;;;N;;;;;
+ 2011;NON-BREAKING HYPHEN;Pd;0;ON;<noBreak> 2010;;;;N;;;;;
+ 2012;FIGURE DASH;Pd;0;ON;;;;;N;;;;;
+ 2013;EN DASH;Pd;0;ON;;;;;N;;;;;
+ 2014;EM DASH;Pd;0;ON;;;;;N;;;;;
+ 2015;HORIZONTAL BAR;Pd;0;ON;;;;;N;QUOTATION DASH;;;;
+ 2016;DOUBLE VERTICAL LINE;Po;0;ON;;;;;N;DOUBLE VERTICAL BAR;;;;
+ 2017;DOUBLE LOW LINE;Po;0;ON;<compat> 0020 0333;;;;N;SPACING DOUBLE UNDERSCORE;;;;
+ 2018;LEFT SINGLE QUOTATION MARK;Pi;0;ON;;;;;N;SINGLE TURNED COMMA QUOTATION MARK;;;;
+ 2019;RIGHT SINGLE QUOTATION MARK;Pf;0;ON;;;;;N;SINGLE COMMA QUOTATION MARK;;;;
+ 201A;SINGLE LOW-9 QUOTATION MARK;Ps;0;ON;;;;;N;LOW SINGLE COMMA QUOTATION MARK;;;;
+ 201B;SINGLE HIGH-REVERSED-9 QUOTATION MARK;Pi;0;ON;;;;;N;SINGLE REVERSED COMMA QUOTATION MARK;;;;
+ 201C;LEFT DOUBLE QUOTATION MARK;Pi;0;ON;;;;;N;DOUBLE TURNED COMMA QUOTATION MARK;;;;
+ 201D;RIGHT DOUBLE QUOTATION MARK;Pf;0;ON;;;;;N;DOUBLE COMMA QUOTATION MARK;;;;
+ 201E;DOUBLE LOW-9 QUOTATION MARK;Ps;0;ON;;;;;N;LOW DOUBLE COMMA QUOTATION MARK;;;;
+ 201F;DOUBLE HIGH-REVERSED-9 QUOTATION MARK;Pi;0;ON;;;;;N;DOUBLE REVERSED COMMA QUOTATION MARK;;;;
+ 2020;DAGGER;Po;0;ON;;;;;N;;;;;
+ 2021;DOUBLE DAGGER;Po;0;ON;;;;;N;;;;;
+ 2022;BULLET;Po;0;ON;;;;;N;;;;;
+ 2023;TRIANGULAR BULLET;Po;0;ON;;;;;N;;;;;
+ 2024;ONE DOT LEADER;Po;0;ON;<compat> 002E;;;;N;;;;;
+ 2025;TWO DOT LEADER;Po;0;ON;<compat> 002E 002E;;;;N;;;;;
+ 2026;HORIZONTAL ELLIPSIS;Po;0;ON;<compat> 002E 002E 002E;;;;N;;;;;
+ 2027;HYPHENATION POINT;Po;0;ON;;;;;N;;;;;
+ 2028;LINE SEPARATOR;Zl;0;WS;;;;;N;;;;;
+ 2029;PARAGRAPH SEPARATOR;Zp;0;B;;;;;N;;;;;
+ 202A;LEFT-TO-RIGHT EMBEDDING;Cf;0;LRE;;;;;N;;;;;
+ 202B;RIGHT-TO-LEFT EMBEDDING;Cf;0;RLE;;;;;N;;;;;
+ 202C;POP DIRECTIONAL FORMATTING;Cf;0;PDF;;;;;N;;;;;
+ 202D;LEFT-TO-RIGHT OVERRIDE;Cf;0;LRO;;;;;N;;;;;
+ 202E;RIGHT-TO-LEFT OVERRIDE;Cf;0;RLO;;;;;N;;;;;
+ 202F;NARROW NO-BREAK SPACE;Zs;0;CS;<noBreak> 0020;;;;N;;;;;
+ 2030;PER MILLE SIGN;Po;0;ET;;;;;N;;;;;
+ 2031;PER TEN THOUSAND SIGN;Po;0;ET;;;;;N;;;;;
+ 2032;PRIME;Po;0;ET;;;;;N;;;;;
+ 2033;DOUBLE PRIME;Po;0;ET;<compat> 2032 2032;;;;N;;;;;
+ 2034;TRIPLE PRIME;Po;0;ET;<compat> 2032 2032 2032;;;;N;;;;;
+ 2035;REVERSED PRIME;Po;0;ON;;;;;N;;;;;
+ 2036;REVERSED DOUBLE PRIME;Po;0;ON;<compat> 2035 2035;;;;N;;;;;
+ 2037;REVERSED TRIPLE PRIME;Po;0;ON;<compat> 2035 2035 2035;;;;N;;;;;
+ 2038;CARET;Po;0;ON;;;;;N;;;;;
+ 2039;SINGLE LEFT-POINTING ANGLE QUOTATION MARK;Pi;0;ON;;;;;Y;LEFT POINTING SINGLE GUILLEMET;;;;
+ 203A;SINGLE RIGHT-POINTING ANGLE QUOTATION MARK;Pf;0;ON;;;;;Y;RIGHT POINTING SINGLE GUILLEMET;;;;
+ 203B;REFERENCE MARK;Po;0;ON;;;;;N;;;;;
+ 203C;DOUBLE EXCLAMATION MARK;Po;0;ON;<compat> 0021 0021;;;;N;;;;;
+ 203D;INTERROBANG;Po;0;ON;;;;;N;;;;;
+ 203E;OVERLINE;Po;0;ON;<compat> 0020 0305;;;;N;SPACING OVERSCORE;;;;
+ 203F;UNDERTIE;Pc;0;ON;;;;;N;;;;;
+ 2040;CHARACTER TIE;Pc;0;ON;;;;;N;;;;;
+ 2041;CARET INSERTION POINT;Po;0;ON;;;;;N;;;;;
+ 2042;ASTERISM;Po;0;ON;;;;;N;;;;;
+ 2043;HYPHEN BULLET;Po;0;ON;;;;;N;;;;;
+ 2044;FRACTION SLASH;Sm;0;CS;;;;;N;;;;;
+ 2045;LEFT SQUARE BRACKET WITH QUILL;Ps;0;ON;;;;;Y;;;;;
+ 2046;RIGHT SQUARE BRACKET WITH QUILL;Pe;0;ON;;;;;Y;;;;;
+ 2047;DOUBLE QUESTION MARK;Po;0;ON;<compat> 003F 003F;;;;N;;;;;
+ 2048;QUESTION EXCLAMATION MARK;Po;0;ON;<compat> 003F 0021;;;;N;;;;;
+ 2049;EXCLAMATION QUESTION MARK;Po;0;ON;<compat> 0021 003F;;;;N;;;;;
+ 204A;TIRONIAN SIGN ET;Po;0;ON;;;;;N;;;;;
+ 204B;REVERSED PILCROW SIGN;Po;0;ON;;;;;N;;;;;
+ 204C;BLACK LEFTWARDS BULLET;Po;0;ON;;;;;N;;;;;
+ 204D;BLACK RIGHTWARDS BULLET;Po;0;ON;;;;;N;;;;;
+ 204E;LOW ASTERISK;Po;0;ON;;;;;N;;;;;
+ 204F;REVERSED SEMICOLON;Po;0;ON;;;;;N;;;;;
+ 2050;CLOSE UP;Po;0;ON;;;;;N;;;;;
+ 2051;TWO ASTERISKS ALIGNED VERTICALLY;Po;0;ON;;;;;N;;;;;
+ 2052;COMMERCIAL MINUS SIGN;Sm;0;ON;;;;;N;;;;;
+ 2053;SWUNG DASH;Po;0;ON;;;;;N;;;;;
+ 2054;INVERTED UNDERTIE;Pc;0;ON;;;;;N;;;;;
+ 2055;FLOWER PUNCTUATION MARK;Po;0;ON;;;;;N;;;;;
+ 2056;THREE DOT PUNCTUATION;Po;0;ON;;;;;N;;;;;
+ 2057;QUADRUPLE PRIME;Po;0;ON;<compat> 2032 2032 2032 2032;;;;N;;;;;
+ 2058;FOUR DOT PUNCTUATION;Po;0;ON;;;;;N;;;;;
+ 2059;FIVE DOT PUNCTUATION;Po;0;ON;;;;;N;;;;;
+ 205A;TWO DOT PUNCTUATION;Po;0;ON;;;;;N;;;;;
+ 205B;FOUR DOT MARK;Po;0;ON;;;;;N;;;;;
+ 205C;DOTTED CROSS;Po;0;ON;;;;;N;;;;;
+ 205D;TRICOLON;Po;0;ON;;;;;N;;;;;
+ 205E;VERTICAL FOUR DOTS;Po;0;ON;;;;;N;;;;;
+ 205F;MEDIUM MATHEMATICAL SPACE;Zs;0;WS;<compat> 0020;;;;N;;;;;
+ 2060;WORD JOINER;Cf;0;BN;;;;;N;;;;;
+ 2061;FUNCTION APPLICATION;Cf;0;BN;;;;;N;;;;;
+ 2062;INVISIBLE TIMES;Cf;0;BN;;;;;N;;;;;
+ 2063;INVISIBLE SEPARATOR;Cf;0;BN;;;;;N;;;;;
+ 2064;INVISIBLE PLUS;Cf;0;BN;;;;;N;;;;;
+ 2066;LEFT-TO-RIGHT ISOLATE;Cf;0;LRI;;;;;N;;;;;
+ 2067;RIGHT-TO-LEFT ISOLATE;Cf;0;RLI;;;;;N;;;;;
+ 2068;FIRST STRONG ISOLATE;Cf;0;FSI;;;;;N;;;;;
+ 2069;POP DIRECTIONAL ISOLATE;Cf;0;PDI;;;;;N;;;;;
+ 206A;INHIBIT SYMMETRIC SWAPPING;Cf;0;BN;;;;;N;;;;;
+ 206B;ACTIVATE SYMMETRIC SWAPPING;Cf;0;BN;;;;;N;;;;;
+ 206C;INHIBIT ARABIC FORM SHAPING;Cf;0;BN;;;;;N;;;;;
+ 206D;ACTIVATE ARABIC FORM SHAPING;Cf;0;BN;;;;;N;;;;;
+ 206E;NATIONAL DIGIT SHAPES;Cf;0;BN;;;;;N;;;;;
+ 206F;NOMINAL DIGIT SHAPES;Cf;0;BN;;;;;N;;;;;
+ 2070;SUPERSCRIPT ZERO;No;0;EN;<super> 0030;;0;0;N;SUPERSCRIPT DIGIT ZERO;;;;
+ 2071;SUPERSCRIPT LATIN SMALL LETTER I;Lm;0;L;<super> 0069;;;;N;;;;;
+ 2074;SUPERSCRIPT FOUR;No;0;EN;<super> 0034;;4;4;N;SUPERSCRIPT DIGIT FOUR;;;;
+ 2075;SUPERSCRIPT FIVE;No;0;EN;<super> 0035;;5;5;N;SUPERSCRIPT DIGIT FIVE;;;;
+ 2076;SUPERSCRIPT SIX;No;0;EN;<super> 0036;;6;6;N;SUPERSCRIPT DIGIT SIX;;;;
+ 2077;SUPERSCRIPT SEVEN;No;0;EN;<super> 0037;;7;7;N;SUPERSCRIPT DIGIT SEVEN;;;;
+ 2078;SUPERSCRIPT EIGHT;No;0;EN;<super> 0038;;8;8;N;SUPERSCRIPT DIGIT EIGHT;;;;
+ 2079;SUPERSCRIPT NINE;No;0;EN;<super> 0039;;9;9;N;SUPERSCRIPT DIGIT NINE;;;;
+ 207A;SUPERSCRIPT PLUS SIGN;Sm;0;ES;<super> 002B;;;;N;;;;;
+ 207B;SUPERSCRIPT MINUS;Sm;0;ES;<super> 2212;;;;N;SUPERSCRIPT HYPHEN-MINUS;;;;
+ 207C;SUPERSCRIPT EQUALS SIGN;Sm;0;ON;<super> 003D;;;;N;;;;;
+ 207D;SUPERSCRIPT LEFT PARENTHESIS;Ps;0;ON;<super> 0028;;;;Y;SUPERSCRIPT OPENING PARENTHESIS;;;;
+ 207E;SUPERSCRIPT RIGHT PARENTHESIS;Pe;0;ON;<super> 0029;;;;Y;SUPERSCRIPT CLOSING PARENTHESIS;;;;
+ 207F;SUPERSCRIPT LATIN SMALL LETTER N;Lm;0;L;<super> 006E;;;;N;;;;;
+ 2080;SUBSCRIPT ZERO;No;0;EN;<sub> 0030;;0;0;N;SUBSCRIPT DIGIT ZERO;;;;
+ 2081;SUBSCRIPT ONE;No;0;EN;<sub> 0031;;1;1;N;SUBSCRIPT DIGIT ONE;;;;
+ 2082;SUBSCRIPT TWO;No;0;EN;<sub> 0032;;2;2;N;SUBSCRIPT DIGIT TWO;;;;
+ 2083;SUBSCRIPT THREE;No;0;EN;<sub> 0033;;3;3;N;SUBSCRIPT DIGIT THREE;;;;
+ 2084;SUBSCRIPT FOUR;No;0;EN;<sub> 0034;;4;4;N;SUBSCRIPT DIGIT FOUR;;;;
+ 2085;SUBSCRIPT FIVE;No;0;EN;<sub> 0035;;5;5;N;SUBSCRIPT DIGIT FIVE;;;;
+ 2086;SUBSCRIPT SIX;No;0;EN;<sub> 0036;;6;6;N;SUBSCRIPT DIGIT SIX;;;;
+ 2087;SUBSCRIPT SEVEN;No;0;EN;<sub> 0037;;7;7;N;SUBSCRIPT DIGIT SEVEN;;;;
+ 2088;SUBSCRIPT EIGHT;No;0;EN;<sub> 0038;;8;8;N;SUBSCRIPT DIGIT EIGHT;;;;
+ 2089;SUBSCRIPT NINE;No;0;EN;<sub> 0039;;9;9;N;SUBSCRIPT DIGIT NINE;;;;
+ 208A;SUBSCRIPT PLUS SIGN;Sm;0;ES;<sub> 002B;;;;N;;;;;
+ 208B;SUBSCRIPT MINUS;Sm;0;ES;<sub> 2212;;;;N;SUBSCRIPT HYPHEN-MINUS;;;;
+ 208C;SUBSCRIPT EQUALS SIGN;Sm;0;ON;<sub> 003D;;;;N;;;;;
+ 208D;SUBSCRIPT LEFT PARENTHESIS;Ps;0;ON;<sub> 0028;;;;Y;SUBSCRIPT OPENING PARENTHESIS;;;;
+ 208E;SUBSCRIPT RIGHT PARENTHESIS;Pe;0;ON;<sub> 0029;;;;Y;SUBSCRIPT CLOSING PARENTHESIS;;;;
+ 2090;LATIN SUBSCRIPT SMALL LETTER A;Lm;0;L;<sub> 0061;;;;N;;;;;
+ 2091;LATIN SUBSCRIPT SMALL LETTER E;Lm;0;L;<sub> 0065;;;;N;;;;;
+ 2092;LATIN SUBSCRIPT SMALL LETTER O;Lm;0;L;<sub> 006F;;;;N;;;;;
+ 2093;LATIN SUBSCRIPT SMALL LETTER X;Lm;0;L;<sub> 0078;;;;N;;;;;
+ 2094;LATIN SUBSCRIPT SMALL LETTER SCHWA;Lm;0;L;<sub> 0259;;;;N;;;;;
+ 2095;LATIN SUBSCRIPT SMALL LETTER H;Lm;0;L;<sub> 0068;;;;N;;;;;
+ 2096;LATIN SUBSCRIPT SMALL LETTER K;Lm;0;L;<sub> 006B;;;;N;;;;;
+ 2097;LATIN SUBSCRIPT SMALL LETTER L;Lm;0;L;<sub> 006C;;;;N;;;;;
+ 2098;LATIN SUBSCRIPT SMALL LETTER M;Lm;0;L;<sub> 006D;;;;N;;;;;
+ 2099;LATIN SUBSCRIPT SMALL LETTER N;Lm;0;L;<sub> 006E;;;;N;;;;;
+ 209A;LATIN SUBSCRIPT SMALL LETTER P;Lm;0;L;<sub> 0070;;;;N;;;;;
+ 209B;LATIN SUBSCRIPT SMALL LETTER S;Lm;0;L;<sub> 0073;;;;N;;;;;
+ 209C;LATIN SUBSCRIPT SMALL LETTER T;Lm;0;L;<sub> 0074;;;;N;;;;;
+ 20A0;EURO-CURRENCY SIGN;Sc;0;ET;;;;;N;;;;;
+ 20A1;COLON SIGN;Sc;0;ET;;;;;N;;;;;
+ 20A2;CRUZEIRO SIGN;Sc;0;ET;;;;;N;;;;;
+ 20A3;FRENCH FRANC SIGN;Sc;0;ET;;;;;N;;;;;
+ 20A4;LIRA SIGN;Sc;0;ET;;;;;N;;;;;
+ 20A5;MILL SIGN;Sc;0;ET;;;;;N;;;;;
+ 20A6;NAIRA SIGN;Sc;0;ET;;;;;N;;;;;
+ 20A7;PESETA SIGN;Sc;0;ET;;;;;N;;;;;
+ 20A8;RUPEE SIGN;Sc;0;ET;<compat> 0052 0073;;;;N;;;;;
+ 20A9;WON SIGN;Sc;0;ET;;;;;N;;;;;
+ 20AA;NEW SHEQEL SIGN;Sc;0;ET;;;;;N;;;;;
+ 20AB;DONG SIGN;Sc;0;ET;;;;;N;;;;;
+ 20AC;EURO SIGN;Sc;0;ET;;;;;N;;;;;
+ 20AD;KIP SIGN;Sc;0;ET;;;;;N;;;;;
+ 20AE;TUGRIK SIGN;Sc;0;ET;;;;;N;;;;;
+ 20AF;DRACHMA SIGN;Sc;0;ET;;;;;N;;;;;
+ 20B0;GERMAN PENNY SIGN;Sc;0;ET;;;;;N;;;;;
+ 20B1;PESO SIGN;Sc;0;ET;;;;;N;;;;;
+ 20B2;GUARANI SIGN;Sc;0;ET;;;;;N;;;;;
+ 20B3;AUSTRAL SIGN;Sc;0;ET;;;;;N;;;;;
+ 20B4;HRYVNIA SIGN;Sc;0;ET;;;;;N;;;;;
+ 20B5;CEDI SIGN;Sc;0;ET;;;;;N;;;;;
+ 20B6;LIVRE TOURNOIS SIGN;Sc;0;ET;;;;;N;;;;;
+ 20B7;SPESMILO SIGN;Sc;0;ET;;;;;N;;;;;
+ 20B8;TENGE SIGN;Sc;0;ET;;;;;N;;;;;
+ 20B9;INDIAN RUPEE SIGN;Sc;0;ET;;;;;N;;;;;
+ 20BA;TURKISH LIRA SIGN;Sc;0;ET;;;;;N;;;;;
+ 20BB;NORDIC MARK SIGN;Sc;0;ET;;;;;N;;;;;
+ 20BC;MANAT SIGN;Sc;0;ET;;;;;N;;;;;
+ 20BD;RUBLE SIGN;Sc;0;ET;;;;;N;;;;;
+ 20BE;LARI SIGN;Sc;0;ET;;;;;N;;;;;
+ 20BF;BITCOIN SIGN;Sc;0;ET;;;;;N;;;;;
+ 20D0;COMBINING LEFT HARPOON ABOVE;Mn;230;NSM;;;;;N;NON-SPACING LEFT HARPOON ABOVE;;;;
+ 20D1;COMBINING RIGHT HARPOON ABOVE;Mn;230;NSM;;;;;N;NON-SPACING RIGHT HARPOON ABOVE;;;;
+ 20D2;COMBINING LONG VERTICAL LINE OVERLAY;Mn;1;NSM;;;;;N;NON-SPACING LONG VERTICAL BAR OVERLAY;;;;
+ 20D3;COMBINING SHORT VERTICAL LINE OVERLAY;Mn;1;NSM;;;;;N;NON-SPACING SHORT VERTICAL BAR OVERLAY;;;;
+ 20D4;COMBINING ANTICLOCKWISE ARROW ABOVE;Mn;230;NSM;;;;;N;NON-SPACING ANTICLOCKWISE ARROW ABOVE;;;;
+ 20D5;COMBINING CLOCKWISE ARROW ABOVE;Mn;230;NSM;;;;;N;NON-SPACING CLOCKWISE ARROW ABOVE;;;;
+ 20D6;COMBINING LEFT ARROW ABOVE;Mn;230;NSM;;;;;N;NON-SPACING LEFT ARROW ABOVE;;;;
+ 20D7;COMBINING RIGHT ARROW ABOVE;Mn;230;NSM;;;;;N;NON-SPACING RIGHT ARROW ABOVE;;;;
+ 20D8;COMBINING RING OVERLAY;Mn;1;NSM;;;;;N;NON-SPACING RING OVERLAY;;;;
+ 20D9;COMBINING CLOCKWISE RING OVERLAY;Mn;1;NSM;;;;;N;NON-SPACING CLOCKWISE RING OVERLAY;;;;
+ 20DA;COMBINING ANTICLOCKWISE RING OVERLAY;Mn;1;NSM;;;;;N;NON-SPACING ANTICLOCKWISE RING OVERLAY;;;;
+ 20DB;COMBINING THREE DOTS ABOVE;Mn;230;NSM;;;;;N;NON-SPACING THREE DOTS ABOVE;;;;
+ 20DC;COMBINING FOUR DOTS ABOVE;Mn;230;NSM;;;;;N;NON-SPACING FOUR DOTS ABOVE;;;;
+ 20DD;COMBINING ENCLOSING CIRCLE;Me;0;NSM;;;;;N;ENCLOSING CIRCLE;;;;
+ 20DE;COMBINING ENCLOSING SQUARE;Me;0;NSM;;;;;N;ENCLOSING SQUARE;;;;
+ 20DF;COMBINING ENCLOSING DIAMOND;Me;0;NSM;;;;;N;ENCLOSING DIAMOND;;;;
+ 20E0;COMBINING ENCLOSING CIRCLE BACKSLASH;Me;0;NSM;;;;;N;ENCLOSING CIRCLE SLASH;;;;
+ 20E1;COMBINING LEFT RIGHT ARROW ABOVE;Mn;230;NSM;;;;;N;NON-SPACING LEFT RIGHT ARROW ABOVE;;;;
+ 20E2;COMBINING ENCLOSING SCREEN;Me;0;NSM;;;;;N;;;;;
+ 20E3;COMBINING ENCLOSING KEYCAP;Me;0;NSM;;;;;N;;;;;
+ 20E4;COMBINING ENCLOSING UPWARD POINTING TRIANGLE;Me;0;NSM;;;;;N;;;;;
+ 20E5;COMBINING REVERSE SOLIDUS OVERLAY;Mn;1;NSM;;;;;N;;;;;
+ 20E6;COMBINING DOUBLE VERTICAL STROKE OVERLAY;Mn;1;NSM;;;;;N;;;;;
+ 20E7;COMBINING ANNUITY SYMBOL;Mn;230;NSM;;;;;N;;;;;
+ 20E8;COMBINING TRIPLE UNDERDOT;Mn;220;NSM;;;;;N;;;;;
+ 20E9;COMBINING WIDE BRIDGE ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 20EA;COMBINING LEFTWARDS ARROW OVERLAY;Mn;1;NSM;;;;;N;;;;;
+ 20EB;COMBINING LONG DOUBLE SOLIDUS OVERLAY;Mn;1;NSM;;;;;N;;;;;
+ 20EC;COMBINING RIGHTWARDS HARPOON WITH BARB DOWNWARDS;Mn;220;NSM;;;;;N;;;;;
+ 20ED;COMBINING LEFTWARDS HARPOON WITH BARB DOWNWARDS;Mn;220;NSM;;;;;N;;;;;
+ 20EE;COMBINING LEFT ARROW BELOW;Mn;220;NSM;;;;;N;;;;;
+ 20EF;COMBINING RIGHT ARROW BELOW;Mn;220;NSM;;;;;N;;;;;
+ 20F0;COMBINING ASTERISK ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 2100;ACCOUNT OF;So;0;ON;<compat> 0061 002F 0063;;;;N;;;;;
+ 2101;ADDRESSED TO THE SUBJECT;So;0;ON;<compat> 0061 002F 0073;;;;N;;;;;
+ 2102;DOUBLE-STRUCK CAPITAL C;Lu;0;L;<font> 0043;;;;N;DOUBLE-STRUCK C;;;;
+ 2103;DEGREE CELSIUS;So;0;ON;<compat> 00B0 0043;;;;N;DEGREES CENTIGRADE;;;;
+ 2104;CENTRE LINE SYMBOL;So;0;ON;;;;;N;C L SYMBOL;;;;
+ 2105;CARE OF;So;0;ON;<compat> 0063 002F 006F;;;;N;;;;;
+ 2106;CADA UNA;So;0;ON;<compat> 0063 002F 0075;;;;N;;;;;
+ 2107;EULER CONSTANT;Lu;0;L;<compat> 0190;;;;N;EULERS;;;;
+ 2108;SCRUPLE;So;0;ON;;;;;N;;;;;
+ 2109;DEGREE FAHRENHEIT;So;0;ON;<compat> 00B0 0046;;;;N;DEGREES FAHRENHEIT;;;;
+ 210A;SCRIPT SMALL G;Ll;0;L;<font> 0067;;;;N;;;;;
+ 210B;SCRIPT CAPITAL H;Lu;0;L;<font> 0048;;;;N;SCRIPT H;;;;
+ 210C;BLACK-LETTER CAPITAL H;Lu;0;L;<font> 0048;;;;N;BLACK-LETTER H;;;;
+ 210D;DOUBLE-STRUCK CAPITAL H;Lu;0;L;<font> 0048;;;;N;DOUBLE-STRUCK H;;;;
+ 210E;PLANCK CONSTANT;Ll;0;L;<font> 0068;;;;N;;;;;
+ 210F;PLANCK CONSTANT OVER TWO PI;Ll;0;L;<font> 0127;;;;N;PLANCK CONSTANT OVER 2 PI;;;;
+ 2110;SCRIPT CAPITAL I;Lu;0;L;<font> 0049;;;;N;SCRIPT I;;;;
+ 2111;BLACK-LETTER CAPITAL I;Lu;0;L;<font> 0049;;;;N;BLACK-LETTER I;;;;
+ 2112;SCRIPT CAPITAL L;Lu;0;L;<font> 004C;;;;N;SCRIPT L;;;;
+ 2113;SCRIPT SMALL L;Ll;0;L;<font> 006C;;;;N;;;;;
+ 2114;L B BAR SYMBOL;So;0;ON;;;;;N;;;;;
+ 2115;DOUBLE-STRUCK CAPITAL N;Lu;0;L;<font> 004E;;;;N;DOUBLE-STRUCK N;;;;
+ 2116;NUMERO SIGN;So;0;ON;<compat> 004E 006F;;;;N;NUMERO;;;;
+ 2117;SOUND RECORDING COPYRIGHT;So;0;ON;;;;;N;;;;;
+ 2118;SCRIPT CAPITAL P;Sm;0;ON;;;;;N;SCRIPT P;;;;
+ 2119;DOUBLE-STRUCK CAPITAL P;Lu;0;L;<font> 0050;;;;N;DOUBLE-STRUCK P;;;;
+ 211A;DOUBLE-STRUCK CAPITAL Q;Lu;0;L;<font> 0051;;;;N;DOUBLE-STRUCK Q;;;;
+ 211B;SCRIPT CAPITAL R;Lu;0;L;<font> 0052;;;;N;SCRIPT R;;;;
+ 211C;BLACK-LETTER CAPITAL R;Lu;0;L;<font> 0052;;;;N;BLACK-LETTER R;;;;
+ 211D;DOUBLE-STRUCK CAPITAL R;Lu;0;L;<font> 0052;;;;N;DOUBLE-STRUCK R;;;;
+ 211E;PRESCRIPTION TAKE;So;0;ON;;;;;N;;;;;
+ 211F;RESPONSE;So;0;ON;;;;;N;;;;;
+ 2120;SERVICE MARK;So;0;ON;<super> 0053 004D;;;;N;;;;;
+ 2121;TELEPHONE SIGN;So;0;ON;<compat> 0054 0045 004C;;;;N;T E L SYMBOL;;;;
+ 2122;TRADE MARK SIGN;So;0;ON;<super> 0054 004D;;;;N;TRADEMARK;;;;
+ 2123;VERSICLE;So;0;ON;;;;;N;;;;;
+ 2124;DOUBLE-STRUCK CAPITAL Z;Lu;0;L;<font> 005A;;;;N;DOUBLE-STRUCK Z;;;;
+ 2125;OUNCE SIGN;So;0;ON;;;;;N;OUNCE;;;;
+ 2126;OHM SIGN;Lu;0;L;03A9;;;;N;OHM;;;03C9;
+ 2127;INVERTED OHM SIGN;So;0;ON;;;;;N;MHO;;;;
+ 2128;BLACK-LETTER CAPITAL Z;Lu;0;L;<font> 005A;;;;N;BLACK-LETTER Z;;;;
+ 2129;TURNED GREEK SMALL LETTER IOTA;So;0;ON;;;;;N;;;;;
+ 212A;KELVIN SIGN;Lu;0;L;004B;;;;N;DEGREES KELVIN;;;006B;
+ 212B;ANGSTROM SIGN;Lu;0;L;00C5;;;;N;ANGSTROM UNIT;;;00E5;
+ 212C;SCRIPT CAPITAL B;Lu;0;L;<font> 0042;;;;N;SCRIPT B;;;;
+ 212D;BLACK-LETTER CAPITAL C;Lu;0;L;<font> 0043;;;;N;BLACK-LETTER C;;;;
+ 212E;ESTIMATED SYMBOL;So;0;ET;;;;;N;;;;;
+ 212F;SCRIPT SMALL E;Ll;0;L;<font> 0065;;;;N;;;;;
+ 2130;SCRIPT CAPITAL E;Lu;0;L;<font> 0045;;;;N;SCRIPT E;;;;
+ 2131;SCRIPT CAPITAL F;Lu;0;L;<font> 0046;;;;N;SCRIPT F;;;;
+ 2132;TURNED CAPITAL F;Lu;0;L;;;;;N;TURNED F;;;214E;
+ 2133;SCRIPT CAPITAL M;Lu;0;L;<font> 004D;;;;N;SCRIPT M;;;;
+ 2134;SCRIPT SMALL O;Ll;0;L;<font> 006F;;;;N;;;;;
+ 2135;ALEF SYMBOL;Lo;0;L;<compat> 05D0;;;;N;FIRST TRANSFINITE CARDINAL;;;;
+ 2136;BET SYMBOL;Lo;0;L;<compat> 05D1;;;;N;SECOND TRANSFINITE CARDINAL;;;;
+ 2137;GIMEL SYMBOL;Lo;0;L;<compat> 05D2;;;;N;THIRD TRANSFINITE CARDINAL;;;;
+ 2138;DALET SYMBOL;Lo;0;L;<compat> 05D3;;;;N;FOURTH TRANSFINITE CARDINAL;;;;
+ 2139;INFORMATION SOURCE;Ll;0;L;<font> 0069;;;;N;;;;;
+ 213A;ROTATED CAPITAL Q;So;0;ON;;;;;N;;;;;
+ 213B;FACSIMILE SIGN;So;0;ON;<compat> 0046 0041 0058;;;;N;;;;;
+ 213C;DOUBLE-STRUCK SMALL PI;Ll;0;L;<font> 03C0;;;;N;;;;;
+ 213D;DOUBLE-STRUCK SMALL GAMMA;Ll;0;L;<font> 03B3;;;;N;;;;;
+ 213E;DOUBLE-STRUCK CAPITAL GAMMA;Lu;0;L;<font> 0393;;;;N;;;;;
+ 213F;DOUBLE-STRUCK CAPITAL PI;Lu;0;L;<font> 03A0;;;;N;;;;;
+ 2140;DOUBLE-STRUCK N-ARY SUMMATION;Sm;0;ON;<font> 2211;;;;Y;;;;;
+ 2141;TURNED SANS-SERIF CAPITAL G;Sm;0;ON;;;;;N;;;;;
+ 2142;TURNED SANS-SERIF CAPITAL L;Sm;0;ON;;;;;N;;;;;
+ 2143;REVERSED SANS-SERIF CAPITAL L;Sm;0;ON;;;;;N;;;;;
+ 2144;TURNED SANS-SERIF CAPITAL Y;Sm;0;ON;;;;;N;;;;;
+ 2145;DOUBLE-STRUCK ITALIC CAPITAL D;Lu;0;L;<font> 0044;;;;N;;;;;
+ 2146;DOUBLE-STRUCK ITALIC SMALL D;Ll;0;L;<font> 0064;;;;N;;;;;
+ 2147;DOUBLE-STRUCK ITALIC SMALL E;Ll;0;L;<font> 0065;;;;N;;;;;
+ 2148;DOUBLE-STRUCK ITALIC SMALL I;Ll;0;L;<font> 0069;;;;N;;;;;
+ 2149;DOUBLE-STRUCK ITALIC SMALL J;Ll;0;L;<font> 006A;;;;N;;;;;
+ 214A;PROPERTY LINE;So;0;ON;;;;;N;;;;;
+ 214B;TURNED AMPERSAND;Sm;0;ON;;;;;N;;;;;
+ 214C;PER SIGN;So;0;ON;;;;;N;;;;;
+ 214D;AKTIESELSKAB;So;0;ON;;;;;N;;;;;
+ 214E;TURNED SMALL F;Ll;0;L;;;;;N;;;2132;;2132
+ 214F;SYMBOL FOR SAMARITAN SOURCE;So;0;L;;;;;N;;;;;
+ 2150;VULGAR FRACTION ONE SEVENTH;No;0;ON;<fraction> 0031 2044 0037;;;1/7;N;;;;;
+ 2151;VULGAR FRACTION ONE NINTH;No;0;ON;<fraction> 0031 2044 0039;;;1/9;N;;;;;
+ 2152;VULGAR FRACTION ONE TENTH;No;0;ON;<fraction> 0031 2044 0031 0030;;;1/10;N;;;;;
+ 2153;VULGAR FRACTION ONE THIRD;No;0;ON;<fraction> 0031 2044 0033;;;1/3;N;FRACTION ONE THIRD;;;;
+ 2154;VULGAR FRACTION TWO THIRDS;No;0;ON;<fraction> 0032 2044 0033;;;2/3;N;FRACTION TWO THIRDS;;;;
+ 2155;VULGAR FRACTION ONE FIFTH;No;0;ON;<fraction> 0031 2044 0035;;;1/5;N;FRACTION ONE FIFTH;;;;
+ 2156;VULGAR FRACTION TWO FIFTHS;No;0;ON;<fraction> 0032 2044 0035;;;2/5;N;FRACTION TWO FIFTHS;;;;
+ 2157;VULGAR FRACTION THREE FIFTHS;No;0;ON;<fraction> 0033 2044 0035;;;3/5;N;FRACTION THREE FIFTHS;;;;
+ 2158;VULGAR FRACTION FOUR FIFTHS;No;0;ON;<fraction> 0034 2044 0035;;;4/5;N;FRACTION FOUR FIFTHS;;;;
+ 2159;VULGAR FRACTION ONE SIXTH;No;0;ON;<fraction> 0031 2044 0036;;;1/6;N;FRACTION ONE SIXTH;;;;
+ 215A;VULGAR FRACTION FIVE SIXTHS;No;0;ON;<fraction> 0035 2044 0036;;;5/6;N;FRACTION FIVE SIXTHS;;;;
+ 215B;VULGAR FRACTION ONE EIGHTH;No;0;ON;<fraction> 0031 2044 0038;;;1/8;N;FRACTION ONE EIGHTH;;;;
+ 215C;VULGAR FRACTION THREE EIGHTHS;No;0;ON;<fraction> 0033 2044 0038;;;3/8;N;FRACTION THREE EIGHTHS;;;;
+ 215D;VULGAR FRACTION FIVE EIGHTHS;No;0;ON;<fraction> 0035 2044 0038;;;5/8;N;FRACTION FIVE EIGHTHS;;;;
+ 215E;VULGAR FRACTION SEVEN EIGHTHS;No;0;ON;<fraction> 0037 2044 0038;;;7/8;N;FRACTION SEVEN EIGHTHS;;;;
+ 215F;FRACTION NUMERATOR ONE;No;0;ON;<fraction> 0031 2044;;;1;N;;;;;
+ 2160;ROMAN NUMERAL ONE;Nl;0;L;<compat> 0049;;;1;N;;;;2170;
+ 2161;ROMAN NUMERAL TWO;Nl;0;L;<compat> 0049 0049;;;2;N;;;;2171;
+ 2162;ROMAN NUMERAL THREE;Nl;0;L;<compat> 0049 0049 0049;;;3;N;;;;2172;
+ 2163;ROMAN NUMERAL FOUR;Nl;0;L;<compat> 0049 0056;;;4;N;;;;2173;
+ 2164;ROMAN NUMERAL FIVE;Nl;0;L;<compat> 0056;;;5;N;;;;2174;
+ 2165;ROMAN NUMERAL SIX;Nl;0;L;<compat> 0056 0049;;;6;N;;;;2175;
+ 2166;ROMAN NUMERAL SEVEN;Nl;0;L;<compat> 0056 0049 0049;;;7;N;;;;2176;
+ 2167;ROMAN NUMERAL EIGHT;Nl;0;L;<compat> 0056 0049 0049 0049;;;8;N;;;;2177;
+ 2168;ROMAN NUMERAL NINE;Nl;0;L;<compat> 0049 0058;;;9;N;;;;2178;
+ 2169;ROMAN NUMERAL TEN;Nl;0;L;<compat> 0058;;;10;N;;;;2179;
+ 216A;ROMAN NUMERAL ELEVEN;Nl;0;L;<compat> 0058 0049;;;11;N;;;;217A;
+ 216B;ROMAN NUMERAL TWELVE;Nl;0;L;<compat> 0058 0049 0049;;;12;N;;;;217B;
+ 216C;ROMAN NUMERAL FIFTY;Nl;0;L;<compat> 004C;;;50;N;;;;217C;
+ 216D;ROMAN NUMERAL ONE HUNDRED;Nl;0;L;<compat> 0043;;;100;N;;;;217D;
+ 216E;ROMAN NUMERAL FIVE HUNDRED;Nl;0;L;<compat> 0044;;;500;N;;;;217E;
+ 216F;ROMAN NUMERAL ONE THOUSAND;Nl;0;L;<compat> 004D;;;1000;N;;;;217F;
+ 2170;SMALL ROMAN NUMERAL ONE;Nl;0;L;<compat> 0069;;;1;N;;;2160;;2160
+ 2171;SMALL ROMAN NUMERAL TWO;Nl;0;L;<compat> 0069 0069;;;2;N;;;2161;;2161
+ 2172;SMALL ROMAN NUMERAL THREE;Nl;0;L;<compat> 0069 0069 0069;;;3;N;;;2162;;2162
+ 2173;SMALL ROMAN NUMERAL FOUR;Nl;0;L;<compat> 0069 0076;;;4;N;;;2163;;2163
+ 2174;SMALL ROMAN NUMERAL FIVE;Nl;0;L;<compat> 0076;;;5;N;;;2164;;2164
+ 2175;SMALL ROMAN NUMERAL SIX;Nl;0;L;<compat> 0076 0069;;;6;N;;;2165;;2165
+ 2176;SMALL ROMAN NUMERAL SEVEN;Nl;0;L;<compat> 0076 0069 0069;;;7;N;;;2166;;2166
+ 2177;SMALL ROMAN NUMERAL EIGHT;Nl;0;L;<compat> 0076 0069 0069 0069;;;8;N;;;2167;;2167
+ 2178;SMALL ROMAN NUMERAL NINE;Nl;0;L;<compat> 0069 0078;;;9;N;;;2168;;2168
+ 2179;SMALL ROMAN NUMERAL TEN;Nl;0;L;<compat> 0078;;;10;N;;;2169;;2169
+ 217A;SMALL ROMAN NUMERAL ELEVEN;Nl;0;L;<compat> 0078 0069;;;11;N;;;216A;;216A
+ 217B;SMALL ROMAN NUMERAL TWELVE;Nl;0;L;<compat> 0078 0069 0069;;;12;N;;;216B;;216B
+ 217C;SMALL ROMAN NUMERAL FIFTY;Nl;0;L;<compat> 006C;;;50;N;;;216C;;216C
+ 217D;SMALL ROMAN NUMERAL ONE HUNDRED;Nl;0;L;<compat> 0063;;;100;N;;;216D;;216D
+ 217E;SMALL ROMAN NUMERAL FIVE HUNDRED;Nl;0;L;<compat> 0064;;;500;N;;;216E;;216E
+ 217F;SMALL ROMAN NUMERAL ONE THOUSAND;Nl;0;L;<compat> 006D;;;1000;N;;;216F;;216F
+ 2180;ROMAN NUMERAL ONE THOUSAND C D;Nl;0;L;;;;1000;N;;;;;
+ 2181;ROMAN NUMERAL FIVE THOUSAND;Nl;0;L;;;;5000;N;;;;;
+ 2182;ROMAN NUMERAL TEN THOUSAND;Nl;0;L;;;;10000;N;;;;;
+ 2183;ROMAN NUMERAL REVERSED ONE HUNDRED;Lu;0;L;;;;;N;;;;2184;
+ 2184;LATIN SMALL LETTER REVERSED C;Ll;0;L;;;;;N;;;2183;;2183
+ 2185;ROMAN NUMERAL SIX LATE FORM;Nl;0;L;;;;6;N;;;;;
+ 2186;ROMAN NUMERAL FIFTY EARLY FORM;Nl;0;L;;;;50;N;;;;;
+ 2187;ROMAN NUMERAL FIFTY THOUSAND;Nl;0;L;;;;50000;N;;;;;
+ 2188;ROMAN NUMERAL ONE HUNDRED THOUSAND;Nl;0;L;;;;100000;N;;;;;
+ 2189;VULGAR FRACTION ZERO THIRDS;No;0;ON;<fraction> 0030 2044 0033;;;0;N;;;;;
+ 218A;TURNED DIGIT TWO;So;0;ON;;;;;N;;;;;
+ 218B;TURNED DIGIT THREE;So;0;ON;;;;;N;;;;;
+ 2190;LEFTWARDS ARROW;Sm;0;ON;;;;;N;LEFT ARROW;;;;
+ 2191;UPWARDS ARROW;Sm;0;ON;;;;;N;UP ARROW;;;;
+ 2192;RIGHTWARDS ARROW;Sm;0;ON;;;;;N;RIGHT ARROW;;;;
+ 2193;DOWNWARDS ARROW;Sm;0;ON;;;;;N;DOWN ARROW;;;;
+ 2194;LEFT RIGHT ARROW;Sm;0;ON;;;;;N;;;;;
+ 2195;UP DOWN ARROW;So;0;ON;;;;;N;;;;;
+ 2196;NORTH WEST ARROW;So;0;ON;;;;;N;UPPER LEFT ARROW;;;;
+ 2197;NORTH EAST ARROW;So;0;ON;;;;;N;UPPER RIGHT ARROW;;;;
+ 2198;SOUTH EAST ARROW;So;0;ON;;;;;N;LOWER RIGHT ARROW;;;;
+ 2199;SOUTH WEST ARROW;So;0;ON;;;;;N;LOWER LEFT ARROW;;;;
+ 219A;LEFTWARDS ARROW WITH STROKE;Sm;0;ON;2190 0338;;;;N;LEFT ARROW WITH STROKE;;;;
+ 219B;RIGHTWARDS ARROW WITH STROKE;Sm;0;ON;2192 0338;;;;N;RIGHT ARROW WITH STROKE;;;;
+ 219C;LEFTWARDS WAVE ARROW;So;0;ON;;;;;N;LEFT WAVE ARROW;;;;
+ 219D;RIGHTWARDS WAVE ARROW;So;0;ON;;;;;N;RIGHT WAVE ARROW;;;;
+ 219E;LEFTWARDS TWO HEADED ARROW;So;0;ON;;;;;N;LEFT TWO HEADED ARROW;;;;
+ 219F;UPWARDS TWO HEADED ARROW;So;0;ON;;;;;N;UP TWO HEADED ARROW;;;;
+ 21A0;RIGHTWARDS TWO HEADED ARROW;Sm;0;ON;;;;;N;RIGHT TWO HEADED ARROW;;;;
+ 21A1;DOWNWARDS TWO HEADED ARROW;So;0;ON;;;;;N;DOWN TWO HEADED ARROW;;;;
+ 21A2;LEFTWARDS ARROW WITH TAIL;So;0;ON;;;;;N;LEFT ARROW WITH TAIL;;;;
+ 21A3;RIGHTWARDS ARROW WITH TAIL;Sm;0;ON;;;;;N;RIGHT ARROW WITH TAIL;;;;
+ 21A4;LEFTWARDS ARROW FROM BAR;So;0;ON;;;;;N;LEFT ARROW FROM BAR;;;;
+ 21A5;UPWARDS ARROW FROM BAR;So;0;ON;;;;;N;UP ARROW FROM BAR;;;;
+ 21A6;RIGHTWARDS ARROW FROM BAR;Sm;0;ON;;;;;N;RIGHT ARROW FROM BAR;;;;
+ 21A7;DOWNWARDS ARROW FROM BAR;So;0;ON;;;;;N;DOWN ARROW FROM BAR;;;;
+ 21A8;UP DOWN ARROW WITH BASE;So;0;ON;;;;;N;;;;;
+ 21A9;LEFTWARDS ARROW WITH HOOK;So;0;ON;;;;;N;LEFT ARROW WITH HOOK;;;;
+ 21AA;RIGHTWARDS ARROW WITH HOOK;So;0;ON;;;;;N;RIGHT ARROW WITH HOOK;;;;
+ 21AB;LEFTWARDS ARROW WITH LOOP;So;0;ON;;;;;N;LEFT ARROW WITH LOOP;;;;
+ 21AC;RIGHTWARDS ARROW WITH LOOP;So;0;ON;;;;;N;RIGHT ARROW WITH LOOP;;;;
+ 21AD;LEFT RIGHT WAVE ARROW;So;0;ON;;;;;N;;;;;
+ 21AE;LEFT RIGHT ARROW WITH STROKE;Sm;0;ON;2194 0338;;;;N;;;;;
+ 21AF;DOWNWARDS ZIGZAG ARROW;So;0;ON;;;;;N;DOWN ZIGZAG ARROW;;;;
+ 21B0;UPWARDS ARROW WITH TIP LEFTWARDS;So;0;ON;;;;;N;UP ARROW WITH TIP LEFT;;;;
+ 21B1;UPWARDS ARROW WITH TIP RIGHTWARDS;So;0;ON;;;;;N;UP ARROW WITH TIP RIGHT;;;;
+ 21B2;DOWNWARDS ARROW WITH TIP LEFTWARDS;So;0;ON;;;;;N;DOWN ARROW WITH TIP LEFT;;;;
+ 21B3;DOWNWARDS ARROW WITH TIP RIGHTWARDS;So;0;ON;;;;;N;DOWN ARROW WITH TIP RIGHT;;;;
+ 21B4;RIGHTWARDS ARROW WITH CORNER DOWNWARDS;So;0;ON;;;;;N;RIGHT ARROW WITH CORNER DOWN;;;;
+ 21B5;DOWNWARDS ARROW WITH CORNER LEFTWARDS;So;0;ON;;;;;N;DOWN ARROW WITH CORNER LEFT;;;;
+ 21B6;ANTICLOCKWISE TOP SEMICIRCLE ARROW;So;0;ON;;;;;N;;;;;
+ 21B7;CLOCKWISE TOP SEMICIRCLE ARROW;So;0;ON;;;;;N;;;;;
+ 21B8;NORTH WEST ARROW TO LONG BAR;So;0;ON;;;;;N;UPPER LEFT ARROW TO LONG BAR;;;;
+ 21B9;LEFTWARDS ARROW TO BAR OVER RIGHTWARDS ARROW TO BAR;So;0;ON;;;;;N;LEFT ARROW TO BAR OVER RIGHT ARROW TO BAR;;;;
+ 21BA;ANTICLOCKWISE OPEN CIRCLE ARROW;So;0;ON;;;;;N;;;;;
+ 21BB;CLOCKWISE OPEN CIRCLE ARROW;So;0;ON;;;;;N;;;;;
+ 21BC;LEFTWARDS HARPOON WITH BARB UPWARDS;So;0;ON;;;;;N;LEFT HARPOON WITH BARB UP;;;;
+ 21BD;LEFTWARDS HARPOON WITH BARB DOWNWARDS;So;0;ON;;;;;N;LEFT HARPOON WITH BARB DOWN;;;;
+ 21BE;UPWARDS HARPOON WITH BARB RIGHTWARDS;So;0;ON;;;;;N;UP HARPOON WITH BARB RIGHT;;;;
+ 21BF;UPWARDS HARPOON WITH BARB LEFTWARDS;So;0;ON;;;;;N;UP HARPOON WITH BARB LEFT;;;;
+ 21C0;RIGHTWARDS HARPOON WITH BARB UPWARDS;So;0;ON;;;;;N;RIGHT HARPOON WITH BARB UP;;;;
+ 21C1;RIGHTWARDS HARPOON WITH BARB DOWNWARDS;So;0;ON;;;;;N;RIGHT HARPOON WITH BARB DOWN;;;;
+ 21C2;DOWNWARDS HARPOON WITH BARB RIGHTWARDS;So;0;ON;;;;;N;DOWN HARPOON WITH BARB RIGHT;;;;
+ 21C3;DOWNWARDS HARPOON WITH BARB LEFTWARDS;So;0;ON;;;;;N;DOWN HARPOON WITH BARB LEFT;;;;
+ 21C4;RIGHTWARDS ARROW OVER LEFTWARDS ARROW;So;0;ON;;;;;N;RIGHT ARROW OVER LEFT ARROW;;;;
+ 21C5;UPWARDS ARROW LEFTWARDS OF DOWNWARDS ARROW;So;0;ON;;;;;N;UP ARROW LEFT OF DOWN ARROW;;;;
+ 21C6;LEFTWARDS ARROW OVER RIGHTWARDS ARROW;So;0;ON;;;;;N;LEFT ARROW OVER RIGHT ARROW;;;;
+ 21C7;LEFTWARDS PAIRED ARROWS;So;0;ON;;;;;N;LEFT PAIRED ARROWS;;;;
+ 21C8;UPWARDS PAIRED ARROWS;So;0;ON;;;;;N;UP PAIRED ARROWS;;;;
+ 21C9;RIGHTWARDS PAIRED ARROWS;So;0;ON;;;;;N;RIGHT PAIRED ARROWS;;;;
+ 21CA;DOWNWARDS PAIRED ARROWS;So;0;ON;;;;;N;DOWN PAIRED ARROWS;;;;
+ 21CB;LEFTWARDS HARPOON OVER RIGHTWARDS HARPOON;So;0;ON;;;;;N;LEFT HARPOON OVER RIGHT HARPOON;;;;
+ 21CC;RIGHTWARDS HARPOON OVER LEFTWARDS HARPOON;So;0;ON;;;;;N;RIGHT HARPOON OVER LEFT HARPOON;;;;
+ 21CD;LEFTWARDS DOUBLE ARROW WITH STROKE;So;0;ON;21D0 0338;;;;N;LEFT DOUBLE ARROW WITH STROKE;;;;
+ 21CE;LEFT RIGHT DOUBLE ARROW WITH STROKE;Sm;0;ON;21D4 0338;;;;N;;;;;
+ 21CF;RIGHTWARDS DOUBLE ARROW WITH STROKE;Sm;0;ON;21D2 0338;;;;N;RIGHT DOUBLE ARROW WITH STROKE;;;;
+ 21D0;LEFTWARDS DOUBLE ARROW;So;0;ON;;;;;N;LEFT DOUBLE ARROW;;;;
+ 21D1;UPWARDS DOUBLE ARROW;So;0;ON;;;;;N;UP DOUBLE ARROW;;;;
+ 21D2;RIGHTWARDS DOUBLE ARROW;Sm;0;ON;;;;;N;RIGHT DOUBLE ARROW;;;;
+ 21D3;DOWNWARDS DOUBLE ARROW;So;0;ON;;;;;N;DOWN DOUBLE ARROW;;;;
+ 21D4;LEFT RIGHT DOUBLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 21D5;UP DOWN DOUBLE ARROW;So;0;ON;;;;;N;;;;;
+ 21D6;NORTH WEST DOUBLE ARROW;So;0;ON;;;;;N;UPPER LEFT DOUBLE ARROW;;;;
+ 21D7;NORTH EAST DOUBLE ARROW;So;0;ON;;;;;N;UPPER RIGHT DOUBLE ARROW;;;;
+ 21D8;SOUTH EAST DOUBLE ARROW;So;0;ON;;;;;N;LOWER RIGHT DOUBLE ARROW;;;;
+ 21D9;SOUTH WEST DOUBLE ARROW;So;0;ON;;;;;N;LOWER LEFT DOUBLE ARROW;;;;
+ 21DA;LEFTWARDS TRIPLE ARROW;So;0;ON;;;;;N;LEFT TRIPLE ARROW;;;;
+ 21DB;RIGHTWARDS TRIPLE ARROW;So;0;ON;;;;;N;RIGHT TRIPLE ARROW;;;;
+ 21DC;LEFTWARDS SQUIGGLE ARROW;So;0;ON;;;;;N;LEFT SQUIGGLE ARROW;;;;
+ 21DD;RIGHTWARDS SQUIGGLE ARROW;So;0;ON;;;;;N;RIGHT SQUIGGLE ARROW;;;;
+ 21DE;UPWARDS ARROW WITH DOUBLE STROKE;So;0;ON;;;;;N;UP ARROW WITH DOUBLE STROKE;;;;
+ 21DF;DOWNWARDS ARROW WITH DOUBLE STROKE;So;0;ON;;;;;N;DOWN ARROW WITH DOUBLE STROKE;;;;
+ 21E0;LEFTWARDS DASHED ARROW;So;0;ON;;;;;N;LEFT DASHED ARROW;;;;
+ 21E1;UPWARDS DASHED ARROW;So;0;ON;;;;;N;UP DASHED ARROW;;;;
+ 21E2;RIGHTWARDS DASHED ARROW;So;0;ON;;;;;N;RIGHT DASHED ARROW;;;;
+ 21E3;DOWNWARDS DASHED ARROW;So;0;ON;;;;;N;DOWN DASHED ARROW;;;;
+ 21E4;LEFTWARDS ARROW TO BAR;So;0;ON;;;;;N;LEFT ARROW TO BAR;;;;
+ 21E5;RIGHTWARDS ARROW TO BAR;So;0;ON;;;;;N;RIGHT ARROW TO BAR;;;;
+ 21E6;LEFTWARDS WHITE ARROW;So;0;ON;;;;;N;WHITE LEFT ARROW;;;;
+ 21E7;UPWARDS WHITE ARROW;So;0;ON;;;;;N;WHITE UP ARROW;;;;
+ 21E8;RIGHTWARDS WHITE ARROW;So;0;ON;;;;;N;WHITE RIGHT ARROW;;;;
+ 21E9;DOWNWARDS WHITE ARROW;So;0;ON;;;;;N;WHITE DOWN ARROW;;;;
+ 21EA;UPWARDS WHITE ARROW FROM BAR;So;0;ON;;;;;N;WHITE UP ARROW FROM BAR;;;;
+ 21EB;UPWARDS WHITE ARROW ON PEDESTAL;So;0;ON;;;;;N;;;;;
+ 21EC;UPWARDS WHITE ARROW ON PEDESTAL WITH HORIZONTAL BAR;So;0;ON;;;;;N;;;;;
+ 21ED;UPWARDS WHITE ARROW ON PEDESTAL WITH VERTICAL BAR;So;0;ON;;;;;N;;;;;
+ 21EE;UPWARDS WHITE DOUBLE ARROW;So;0;ON;;;;;N;;;;;
+ 21EF;UPWARDS WHITE DOUBLE ARROW ON PEDESTAL;So;0;ON;;;;;N;;;;;
+ 21F0;RIGHTWARDS WHITE ARROW FROM WALL;So;0;ON;;;;;N;;;;;
+ 21F1;NORTH WEST ARROW TO CORNER;So;0;ON;;;;;N;;;;;
+ 21F2;SOUTH EAST ARROW TO CORNER;So;0;ON;;;;;N;;;;;
+ 21F3;UP DOWN WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 21F4;RIGHT ARROW WITH SMALL CIRCLE;Sm;0;ON;;;;;N;;;;;
+ 21F5;DOWNWARDS ARROW LEFTWARDS OF UPWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 21F6;THREE RIGHTWARDS ARROWS;Sm;0;ON;;;;;N;;;;;
+ 21F7;LEFTWARDS ARROW WITH VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 21F8;RIGHTWARDS ARROW WITH VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
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+ 2332;CONICAL TAPER;So;0;ON;;;;;N;;;;;
+ 2333;SLOPE;So;0;ON;;;;;N;;;;;
+ 2334;COUNTERBORE;So;0;ON;;;;;N;;;;;
+ 2335;COUNTERSINK;So;0;ON;;;;;N;;;;;
+ 2336;APL FUNCTIONAL SYMBOL I-BEAM;So;0;L;;;;;N;;;;;
+ 2337;APL FUNCTIONAL SYMBOL SQUISH QUAD;So;0;L;;;;;N;;;;;
+ 2338;APL FUNCTIONAL SYMBOL QUAD EQUAL;So;0;L;;;;;N;;;;;
+ 2339;APL FUNCTIONAL SYMBOL QUAD DIVIDE;So;0;L;;;;;N;;;;;
+ 233A;APL FUNCTIONAL SYMBOL QUAD DIAMOND;So;0;L;;;;;N;;;;;
+ 233B;APL FUNCTIONAL SYMBOL QUAD JOT;So;0;L;;;;;N;;;;;
+ 233C;APL FUNCTIONAL SYMBOL QUAD CIRCLE;So;0;L;;;;;N;;;;;
+ 233D;APL FUNCTIONAL SYMBOL CIRCLE STILE;So;0;L;;;;;N;;;;;
+ 233E;APL FUNCTIONAL SYMBOL CIRCLE JOT;So;0;L;;;;;N;;;;;
+ 233F;APL FUNCTIONAL SYMBOL SLASH BAR;So;0;L;;;;;N;;;;;
+ 2340;APL FUNCTIONAL SYMBOL BACKSLASH BAR;So;0;L;;;;;N;;;;;
+ 2341;APL FUNCTIONAL SYMBOL QUAD SLASH;So;0;L;;;;;N;;;;;
+ 2342;APL FUNCTIONAL SYMBOL QUAD BACKSLASH;So;0;L;;;;;N;;;;;
+ 2343;APL FUNCTIONAL SYMBOL QUAD LESS-THAN;So;0;L;;;;;N;;;;;
+ 2344;APL FUNCTIONAL SYMBOL QUAD GREATER-THAN;So;0;L;;;;;N;;;;;
+ 2345;APL FUNCTIONAL SYMBOL LEFTWARDS VANE;So;0;L;;;;;N;;;;;
+ 2346;APL FUNCTIONAL SYMBOL RIGHTWARDS VANE;So;0;L;;;;;N;;;;;
+ 2347;APL FUNCTIONAL SYMBOL QUAD LEFTWARDS ARROW;So;0;L;;;;;N;;;;;
+ 2348;APL FUNCTIONAL SYMBOL QUAD RIGHTWARDS ARROW;So;0;L;;;;;N;;;;;
+ 2349;APL FUNCTIONAL SYMBOL CIRCLE BACKSLASH;So;0;L;;;;;N;;;;;
+ 234A;APL FUNCTIONAL SYMBOL DOWN TACK UNDERBAR;So;0;L;;;;;N;;;;;
+ 234B;APL FUNCTIONAL SYMBOL DELTA STILE;So;0;L;;;;;N;;;;;
+ 234C;APL FUNCTIONAL SYMBOL QUAD DOWN CARET;So;0;L;;;;;N;;;;;
+ 234D;APL FUNCTIONAL SYMBOL QUAD DELTA;So;0;L;;;;;N;;;;;
+ 234E;APL FUNCTIONAL SYMBOL DOWN TACK JOT;So;0;L;;;;;N;;;;;
+ 234F;APL FUNCTIONAL SYMBOL UPWARDS VANE;So;0;L;;;;;N;;;;;
+ 2350;APL FUNCTIONAL SYMBOL QUAD UPWARDS ARROW;So;0;L;;;;;N;;;;;
+ 2351;APL FUNCTIONAL SYMBOL UP TACK OVERBAR;So;0;L;;;;;N;;;;;
+ 2352;APL FUNCTIONAL SYMBOL DEL STILE;So;0;L;;;;;N;;;;;
+ 2353;APL FUNCTIONAL SYMBOL QUAD UP CARET;So;0;L;;;;;N;;;;;
+ 2354;APL FUNCTIONAL SYMBOL QUAD DEL;So;0;L;;;;;N;;;;;
+ 2355;APL FUNCTIONAL SYMBOL UP TACK JOT;So;0;L;;;;;N;;;;;
+ 2356;APL FUNCTIONAL SYMBOL DOWNWARDS VANE;So;0;L;;;;;N;;;;;
+ 2357;APL FUNCTIONAL SYMBOL QUAD DOWNWARDS ARROW;So;0;L;;;;;N;;;;;
+ 2358;APL FUNCTIONAL SYMBOL QUOTE UNDERBAR;So;0;L;;;;;N;;;;;
+ 2359;APL FUNCTIONAL SYMBOL DELTA UNDERBAR;So;0;L;;;;;N;;;;;
+ 235A;APL FUNCTIONAL SYMBOL DIAMOND UNDERBAR;So;0;L;;;;;N;;;;;
+ 235B;APL FUNCTIONAL SYMBOL JOT UNDERBAR;So;0;L;;;;;N;;;;;
+ 235C;APL FUNCTIONAL SYMBOL CIRCLE UNDERBAR;So;0;L;;;;;N;;;;;
+ 235D;APL FUNCTIONAL SYMBOL UP SHOE JOT;So;0;L;;;;;N;;;;;
+ 235E;APL FUNCTIONAL SYMBOL QUOTE QUAD;So;0;L;;;;;N;;;;;
+ 235F;APL FUNCTIONAL SYMBOL CIRCLE STAR;So;0;L;;;;;N;;;;;
+ 2360;APL FUNCTIONAL SYMBOL QUAD COLON;So;0;L;;;;;N;;;;;
+ 2361;APL FUNCTIONAL SYMBOL UP TACK DIAERESIS;So;0;L;;;;;N;;;;;
+ 2362;APL FUNCTIONAL SYMBOL DEL DIAERESIS;So;0;L;;;;;N;;;;;
+ 2363;APL FUNCTIONAL SYMBOL STAR DIAERESIS;So;0;L;;;;;N;;;;;
+ 2364;APL FUNCTIONAL SYMBOL JOT DIAERESIS;So;0;L;;;;;N;;;;;
+ 2365;APL FUNCTIONAL SYMBOL CIRCLE DIAERESIS;So;0;L;;;;;N;;;;;
+ 2366;APL FUNCTIONAL SYMBOL DOWN SHOE STILE;So;0;L;;;;;N;;;;;
+ 2367;APL FUNCTIONAL SYMBOL LEFT SHOE STILE;So;0;L;;;;;N;;;;;
+ 2368;APL FUNCTIONAL SYMBOL TILDE DIAERESIS;So;0;L;;;;;N;;;;;
+ 2369;APL FUNCTIONAL SYMBOL GREATER-THAN DIAERESIS;So;0;L;;;;;N;;;;;
+ 236A;APL FUNCTIONAL SYMBOL COMMA BAR;So;0;L;;;;;N;;;;;
+ 236B;APL FUNCTIONAL SYMBOL DEL TILDE;So;0;L;;;;;N;;;;;
+ 236C;APL FUNCTIONAL SYMBOL ZILDE;So;0;L;;;;;N;;;;;
+ 236D;APL FUNCTIONAL SYMBOL STILE TILDE;So;0;L;;;;;N;;;;;
+ 236E;APL FUNCTIONAL SYMBOL SEMICOLON UNDERBAR;So;0;L;;;;;N;;;;;
+ 236F;APL FUNCTIONAL SYMBOL QUAD NOT EQUAL;So;0;L;;;;;N;;;;;
+ 2370;APL FUNCTIONAL SYMBOL QUAD QUESTION;So;0;L;;;;;N;;;;;
+ 2371;APL FUNCTIONAL SYMBOL DOWN CARET TILDE;So;0;L;;;;;N;;;;;
+ 2372;APL FUNCTIONAL SYMBOL UP CARET TILDE;So;0;L;;;;;N;;;;;
+ 2373;APL FUNCTIONAL SYMBOL IOTA;So;0;L;;;;;N;;;;;
+ 2374;APL FUNCTIONAL SYMBOL RHO;So;0;L;;;;;N;;;;;
+ 2375;APL FUNCTIONAL SYMBOL OMEGA;So;0;L;;;;;N;;;;;
+ 2376;APL FUNCTIONAL SYMBOL ALPHA UNDERBAR;So;0;L;;;;;N;;;;;
+ 2377;APL FUNCTIONAL SYMBOL EPSILON UNDERBAR;So;0;L;;;;;N;;;;;
+ 2378;APL FUNCTIONAL SYMBOL IOTA UNDERBAR;So;0;L;;;;;N;;;;;
+ 2379;APL FUNCTIONAL SYMBOL OMEGA UNDERBAR;So;0;L;;;;;N;;;;;
+ 237A;APL FUNCTIONAL SYMBOL ALPHA;So;0;L;;;;;N;;;;;
+ 237B;NOT CHECK MARK;So;0;ON;;;;;N;;;;;
+ 237C;RIGHT ANGLE WITH DOWNWARDS ZIGZAG ARROW;Sm;0;ON;;;;;N;;;;;
+ 237D;SHOULDERED OPEN BOX;So;0;ON;;;;;N;;;;;
+ 237E;BELL SYMBOL;So;0;ON;;;;;N;;;;;
+ 237F;VERTICAL LINE WITH MIDDLE DOT;So;0;ON;;;;;N;;;;;
+ 2380;INSERTION SYMBOL;So;0;ON;;;;;N;;;;;
+ 2381;CONTINUOUS UNDERLINE SYMBOL;So;0;ON;;;;;N;;;;;
+ 2382;DISCONTINUOUS UNDERLINE SYMBOL;So;0;ON;;;;;N;;;;;
+ 2383;EMPHASIS SYMBOL;So;0;ON;;;;;N;;;;;
+ 2384;COMPOSITION SYMBOL;So;0;ON;;;;;N;;;;;
+ 2385;WHITE SQUARE WITH CENTRE VERTICAL LINE;So;0;ON;;;;;N;;;;;
+ 2386;ENTER SYMBOL;So;0;ON;;;;;N;;;;;
+ 2387;ALTERNATIVE KEY SYMBOL;So;0;ON;;;;;N;;;;;
+ 2388;HELM SYMBOL;So;0;ON;;;;;N;;;;;
+ 2389;CIRCLED HORIZONTAL BAR WITH NOTCH;So;0;ON;;;;;N;;;;;
+ 238A;CIRCLED TRIANGLE DOWN;So;0;ON;;;;;N;;;;;
+ 238B;BROKEN CIRCLE WITH NORTHWEST ARROW;So;0;ON;;;;;N;;;;;
+ 238C;UNDO SYMBOL;So;0;ON;;;;;N;;;;;
+ 238D;MONOSTABLE SYMBOL;So;0;ON;;;;;N;;;;;
+ 238E;HYSTERESIS SYMBOL;So;0;ON;;;;;N;;;;;
+ 238F;OPEN-CIRCUIT-OUTPUT H-TYPE SYMBOL;So;0;ON;;;;;N;;;;;
+ 2390;OPEN-CIRCUIT-OUTPUT L-TYPE SYMBOL;So;0;ON;;;;;N;;;;;
+ 2391;PASSIVE-PULL-DOWN-OUTPUT SYMBOL;So;0;ON;;;;;N;;;;;
+ 2392;PASSIVE-PULL-UP-OUTPUT SYMBOL;So;0;ON;;;;;N;;;;;
+ 2393;DIRECT CURRENT SYMBOL FORM TWO;So;0;ON;;;;;N;;;;;
+ 2394;SOFTWARE-FUNCTION SYMBOL;So;0;ON;;;;;N;;;;;
+ 2395;APL FUNCTIONAL SYMBOL QUAD;So;0;L;;;;;N;;;;;
+ 2396;DECIMAL SEPARATOR KEY SYMBOL;So;0;ON;;;;;N;;;;;
+ 2397;PREVIOUS PAGE;So;0;ON;;;;;N;;;;;
+ 2398;NEXT PAGE;So;0;ON;;;;;N;;;;;
+ 2399;PRINT SCREEN SYMBOL;So;0;ON;;;;;N;;;;;
+ 239A;CLEAR SCREEN SYMBOL;So;0;ON;;;;;N;;;;;
+ 239B;LEFT PARENTHESIS UPPER HOOK;Sm;0;ON;;;;;N;;;;;
+ 239C;LEFT PARENTHESIS EXTENSION;Sm;0;ON;;;;;N;;;;;
+ 239D;LEFT PARENTHESIS LOWER HOOK;Sm;0;ON;;;;;N;;;;;
+ 239E;RIGHT PARENTHESIS UPPER HOOK;Sm;0;ON;;;;;N;;;;;
+ 239F;RIGHT PARENTHESIS EXTENSION;Sm;0;ON;;;;;N;;;;;
+ 23A0;RIGHT PARENTHESIS LOWER HOOK;Sm;0;ON;;;;;N;;;;;
+ 23A1;LEFT SQUARE BRACKET UPPER CORNER;Sm;0;ON;;;;;N;;;;;
+ 23A2;LEFT SQUARE BRACKET EXTENSION;Sm;0;ON;;;;;N;;;;;
+ 23A3;LEFT SQUARE BRACKET LOWER CORNER;Sm;0;ON;;;;;N;;;;;
+ 23A4;RIGHT SQUARE BRACKET UPPER CORNER;Sm;0;ON;;;;;N;;;;;
+ 23A5;RIGHT SQUARE BRACKET EXTENSION;Sm;0;ON;;;;;N;;;;;
+ 23A6;RIGHT SQUARE BRACKET LOWER CORNER;Sm;0;ON;;;;;N;;;;;
+ 23A7;LEFT CURLY BRACKET UPPER HOOK;Sm;0;ON;;;;;N;;;;;
+ 23A8;LEFT CURLY BRACKET MIDDLE PIECE;Sm;0;ON;;;;;N;;;;;
+ 23A9;LEFT CURLY BRACKET LOWER HOOK;Sm;0;ON;;;;;N;;;;;
+ 23AA;CURLY BRACKET EXTENSION;Sm;0;ON;;;;;N;;;;;
+ 23AB;RIGHT CURLY BRACKET UPPER HOOK;Sm;0;ON;;;;;N;;;;;
+ 23AC;RIGHT CURLY BRACKET MIDDLE PIECE;Sm;0;ON;;;;;N;;;;;
+ 23AD;RIGHT CURLY BRACKET LOWER HOOK;Sm;0;ON;;;;;N;;;;;
+ 23AE;INTEGRAL EXTENSION;Sm;0;ON;;;;;N;;;;;
+ 23AF;HORIZONTAL LINE EXTENSION;Sm;0;ON;;;;;N;;;;;
+ 23B0;UPPER LEFT OR LOWER RIGHT CURLY BRACKET SECTION;Sm;0;ON;;;;;N;;;;;
+ 23B1;UPPER RIGHT OR LOWER LEFT CURLY BRACKET SECTION;Sm;0;ON;;;;;N;;;;;
+ 23B2;SUMMATION TOP;Sm;0;ON;;;;;N;;;;;
+ 23B3;SUMMATION BOTTOM;Sm;0;ON;;;;;N;;;;;
+ 23B4;TOP SQUARE BRACKET;So;0;ON;;;;;N;;;;;
+ 23B5;BOTTOM SQUARE BRACKET;So;0;ON;;;;;N;;;;;
+ 23B6;BOTTOM SQUARE BRACKET OVER TOP SQUARE BRACKET;So;0;ON;;;;;N;;;;;
+ 23B7;RADICAL SYMBOL BOTTOM;So;0;ON;;;;;N;;;;;
+ 23B8;LEFT VERTICAL BOX LINE;So;0;ON;;;;;N;;;;;
+ 23B9;RIGHT VERTICAL BOX LINE;So;0;ON;;;;;N;;;;;
+ 23BA;HORIZONTAL SCAN LINE-1;So;0;ON;;;;;N;;;;;
+ 23BB;HORIZONTAL SCAN LINE-3;So;0;ON;;;;;N;;;;;
+ 23BC;HORIZONTAL SCAN LINE-7;So;0;ON;;;;;N;;;;;
+ 23BD;HORIZONTAL SCAN LINE-9;So;0;ON;;;;;N;;;;;
+ 23BE;DENTISTRY SYMBOL LIGHT VERTICAL AND TOP RIGHT;So;0;ON;;;;;N;;;;;
+ 23BF;DENTISTRY SYMBOL LIGHT VERTICAL AND BOTTOM RIGHT;So;0;ON;;;;;N;;;;;
+ 23C0;DENTISTRY SYMBOL LIGHT VERTICAL WITH CIRCLE;So;0;ON;;;;;N;;;;;
+ 23C1;DENTISTRY SYMBOL LIGHT DOWN AND HORIZONTAL WITH CIRCLE;So;0;ON;;;;;N;;;;;
+ 23C2;DENTISTRY SYMBOL LIGHT UP AND HORIZONTAL WITH CIRCLE;So;0;ON;;;;;N;;;;;
+ 23C3;DENTISTRY SYMBOL LIGHT VERTICAL WITH TRIANGLE;So;0;ON;;;;;N;;;;;
+ 23C4;DENTISTRY SYMBOL LIGHT DOWN AND HORIZONTAL WITH TRIANGLE;So;0;ON;;;;;N;;;;;
+ 23C5;DENTISTRY SYMBOL LIGHT UP AND HORIZONTAL WITH TRIANGLE;So;0;ON;;;;;N;;;;;
+ 23C6;DENTISTRY SYMBOL LIGHT VERTICAL AND WAVE;So;0;ON;;;;;N;;;;;
+ 23C7;DENTISTRY SYMBOL LIGHT DOWN AND HORIZONTAL WITH WAVE;So;0;ON;;;;;N;;;;;
+ 23C8;DENTISTRY SYMBOL LIGHT UP AND HORIZONTAL WITH WAVE;So;0;ON;;;;;N;;;;;
+ 23C9;DENTISTRY SYMBOL LIGHT DOWN AND HORIZONTAL;So;0;ON;;;;;N;;;;;
+ 23CA;DENTISTRY SYMBOL LIGHT UP AND HORIZONTAL;So;0;ON;;;;;N;;;;;
+ 23CB;DENTISTRY SYMBOL LIGHT VERTICAL AND TOP LEFT;So;0;ON;;;;;N;;;;;
+ 23CC;DENTISTRY SYMBOL LIGHT VERTICAL AND BOTTOM LEFT;So;0;ON;;;;;N;;;;;
+ 23CD;SQUARE FOOT;So;0;ON;;;;;N;;;;;
+ 23CE;RETURN SYMBOL;So;0;ON;;;;;N;;;;;
+ 23CF;EJECT SYMBOL;So;0;ON;;;;;N;;;;;
+ 23D0;VERTICAL LINE EXTENSION;So;0;ON;;;;;N;;;;;
+ 23D1;METRICAL BREVE;So;0;ON;;;;;N;;;;;
+ 23D2;METRICAL LONG OVER SHORT;So;0;ON;;;;;N;;;;;
+ 23D3;METRICAL SHORT OVER LONG;So;0;ON;;;;;N;;;;;
+ 23D4;METRICAL LONG OVER TWO SHORTS;So;0;ON;;;;;N;;;;;
+ 23D5;METRICAL TWO SHORTS OVER LONG;So;0;ON;;;;;N;;;;;
+ 23D6;METRICAL TWO SHORTS JOINED;So;0;ON;;;;;N;;;;;
+ 23D7;METRICAL TRISEME;So;0;ON;;;;;N;;;;;
+ 23D8;METRICAL TETRASEME;So;0;ON;;;;;N;;;;;
+ 23D9;METRICAL PENTASEME;So;0;ON;;;;;N;;;;;
+ 23DA;EARTH GROUND;So;0;ON;;;;;N;;;;;
+ 23DB;FUSE;So;0;ON;;;;;N;;;;;
+ 23DC;TOP PARENTHESIS;Sm;0;ON;;;;;N;;;;;
+ 23DD;BOTTOM PARENTHESIS;Sm;0;ON;;;;;N;;;;;
+ 23DE;TOP CURLY BRACKET;Sm;0;ON;;;;;N;;;;;
+ 23DF;BOTTOM CURLY BRACKET;Sm;0;ON;;;;;N;;;;;
+ 23E0;TOP TORTOISE SHELL BRACKET;Sm;0;ON;;;;;N;;;;;
+ 23E1;BOTTOM TORTOISE SHELL BRACKET;Sm;0;ON;;;;;N;;;;;
+ 23E2;WHITE TRAPEZIUM;So;0;ON;;;;;N;;;;;
+ 23E3;BENZENE RING WITH CIRCLE;So;0;ON;;;;;N;;;;;
+ 23E4;STRAIGHTNESS;So;0;ON;;;;;N;;;;;
+ 23E5;FLATNESS;So;0;ON;;;;;N;;;;;
+ 23E6;AC CURRENT;So;0;ON;;;;;N;;;;;
+ 23E7;ELECTRICAL INTERSECTION;So;0;ON;;;;;N;;;;;
+ 23E8;DECIMAL EXPONENT SYMBOL;So;0;ON;;;;;N;;;;;
+ 23E9;BLACK RIGHT-POINTING DOUBLE TRIANGLE;So;0;ON;;;;;N;;;;;
+ 23EA;BLACK LEFT-POINTING DOUBLE TRIANGLE;So;0;ON;;;;;N;;;;;
+ 23EB;BLACK UP-POINTING DOUBLE TRIANGLE;So;0;ON;;;;;N;;;;;
+ 23EC;BLACK DOWN-POINTING DOUBLE TRIANGLE;So;0;ON;;;;;N;;;;;
+ 23ED;BLACK RIGHT-POINTING DOUBLE TRIANGLE WITH VERTICAL BAR;So;0;ON;;;;;N;;;;;
+ 23EE;BLACK LEFT-POINTING DOUBLE TRIANGLE WITH VERTICAL BAR;So;0;ON;;;;;N;;;;;
+ 23EF;BLACK RIGHT-POINTING TRIANGLE WITH DOUBLE VERTICAL BAR;So;0;ON;;;;;N;;;;;
+ 23F0;ALARM CLOCK;So;0;ON;;;;;N;;;;;
+ 23F1;STOPWATCH;So;0;ON;;;;;N;;;;;
+ 23F2;TIMER CLOCK;So;0;ON;;;;;N;;;;;
+ 23F3;HOURGLASS WITH FLOWING SAND;So;0;ON;;;;;N;;;;;
+ 23F4;BLACK MEDIUM LEFT-POINTING TRIANGLE;So;0;ON;;;;;N;;;;;
+ 23F5;BLACK MEDIUM RIGHT-POINTING TRIANGLE;So;0;ON;;;;;N;;;;;
+ 23F6;BLACK MEDIUM UP-POINTING TRIANGLE;So;0;ON;;;;;N;;;;;
+ 23F7;BLACK MEDIUM DOWN-POINTING TRIANGLE;So;0;ON;;;;;N;;;;;
+ 23F8;DOUBLE VERTICAL BAR;So;0;ON;;;;;N;;;;;
+ 23F9;BLACK SQUARE FOR STOP;So;0;ON;;;;;N;;;;;
+ 23FA;BLACK CIRCLE FOR RECORD;So;0;ON;;;;;N;;;;;
+ 23FB;POWER SYMBOL;So;0;ON;;;;;N;;;;;
+ 23FC;POWER ON-OFF SYMBOL;So;0;ON;;;;;N;;;;;
+ 23FD;POWER ON SYMBOL;So;0;ON;;;;;N;;;;;
+ 23FE;POWER SLEEP SYMBOL;So;0;ON;;;;;N;;;;;
+ 23FF;OBSERVER EYE SYMBOL;So;0;ON;;;;;N;;;;;
+ 2400;SYMBOL FOR NULL;So;0;ON;;;;;N;GRAPHIC FOR NULL;;;;
+ 2401;SYMBOL FOR START OF HEADING;So;0;ON;;;;;N;GRAPHIC FOR START OF HEADING;;;;
+ 2402;SYMBOL FOR START OF TEXT;So;0;ON;;;;;N;GRAPHIC FOR START OF TEXT;;;;
+ 2403;SYMBOL FOR END OF TEXT;So;0;ON;;;;;N;GRAPHIC FOR END OF TEXT;;;;
+ 2404;SYMBOL FOR END OF TRANSMISSION;So;0;ON;;;;;N;GRAPHIC FOR END OF TRANSMISSION;;;;
+ 2405;SYMBOL FOR ENQUIRY;So;0;ON;;;;;N;GRAPHIC FOR ENQUIRY;;;;
+ 2406;SYMBOL FOR ACKNOWLEDGE;So;0;ON;;;;;N;GRAPHIC FOR ACKNOWLEDGE;;;;
+ 2407;SYMBOL FOR BELL;So;0;ON;;;;;N;GRAPHIC FOR BELL;;;;
+ 2408;SYMBOL FOR BACKSPACE;So;0;ON;;;;;N;GRAPHIC FOR BACKSPACE;;;;
+ 2409;SYMBOL FOR HORIZONTAL TABULATION;So;0;ON;;;;;N;GRAPHIC FOR HORIZONTAL TABULATION;;;;
+ 240A;SYMBOL FOR LINE FEED;So;0;ON;;;;;N;GRAPHIC FOR LINE FEED;;;;
+ 240B;SYMBOL FOR VERTICAL TABULATION;So;0;ON;;;;;N;GRAPHIC FOR VERTICAL TABULATION;;;;
+ 240C;SYMBOL FOR FORM FEED;So;0;ON;;;;;N;GRAPHIC FOR FORM FEED;;;;
+ 240D;SYMBOL FOR CARRIAGE RETURN;So;0;ON;;;;;N;GRAPHIC FOR CARRIAGE RETURN;;;;
+ 240E;SYMBOL FOR SHIFT OUT;So;0;ON;;;;;N;GRAPHIC FOR SHIFT OUT;;;;
+ 240F;SYMBOL FOR SHIFT IN;So;0;ON;;;;;N;GRAPHIC FOR SHIFT IN;;;;
+ 2410;SYMBOL FOR DATA LINK ESCAPE;So;0;ON;;;;;N;GRAPHIC FOR DATA LINK ESCAPE;;;;
+ 2411;SYMBOL FOR DEVICE CONTROL ONE;So;0;ON;;;;;N;GRAPHIC FOR DEVICE CONTROL ONE;;;;
+ 2412;SYMBOL FOR DEVICE CONTROL TWO;So;0;ON;;;;;N;GRAPHIC FOR DEVICE CONTROL TWO;;;;
+ 2413;SYMBOL FOR DEVICE CONTROL THREE;So;0;ON;;;;;N;GRAPHIC FOR DEVICE CONTROL THREE;;;;
+ 2414;SYMBOL FOR DEVICE CONTROL FOUR;So;0;ON;;;;;N;GRAPHIC FOR DEVICE CONTROL FOUR;;;;
+ 2415;SYMBOL FOR NEGATIVE ACKNOWLEDGE;So;0;ON;;;;;N;GRAPHIC FOR NEGATIVE ACKNOWLEDGE;;;;
+ 2416;SYMBOL FOR SYNCHRONOUS IDLE;So;0;ON;;;;;N;GRAPHIC FOR SYNCHRONOUS IDLE;;;;
+ 2417;SYMBOL FOR END OF TRANSMISSION BLOCK;So;0;ON;;;;;N;GRAPHIC FOR END OF TRANSMISSION BLOCK;;;;
+ 2418;SYMBOL FOR CANCEL;So;0;ON;;;;;N;GRAPHIC FOR CANCEL;;;;
+ 2419;SYMBOL FOR END OF MEDIUM;So;0;ON;;;;;N;GRAPHIC FOR END OF MEDIUM;;;;
+ 241A;SYMBOL FOR SUBSTITUTE;So;0;ON;;;;;N;GRAPHIC FOR SUBSTITUTE;;;;
+ 241B;SYMBOL FOR ESCAPE;So;0;ON;;;;;N;GRAPHIC FOR ESCAPE;;;;
+ 241C;SYMBOL FOR FILE SEPARATOR;So;0;ON;;;;;N;GRAPHIC FOR FILE SEPARATOR;;;;
+ 241D;SYMBOL FOR GROUP SEPARATOR;So;0;ON;;;;;N;GRAPHIC FOR GROUP SEPARATOR;;;;
+ 241E;SYMBOL FOR RECORD SEPARATOR;So;0;ON;;;;;N;GRAPHIC FOR RECORD SEPARATOR;;;;
+ 241F;SYMBOL FOR UNIT SEPARATOR;So;0;ON;;;;;N;GRAPHIC FOR UNIT SEPARATOR;;;;
+ 2420;SYMBOL FOR SPACE;So;0;ON;;;;;N;GRAPHIC FOR SPACE;;;;
+ 2421;SYMBOL FOR DELETE;So;0;ON;;;;;N;GRAPHIC FOR DELETE;;;;
+ 2422;BLANK SYMBOL;So;0;ON;;;;;N;BLANK;;;;
+ 2423;OPEN BOX;So;0;ON;;;;;N;;;;;
+ 2424;SYMBOL FOR NEWLINE;So;0;ON;;;;;N;GRAPHIC FOR NEWLINE;;;;
+ 2425;SYMBOL FOR DELETE FORM TWO;So;0;ON;;;;;N;;;;;
+ 2426;SYMBOL FOR SUBSTITUTE FORM TWO;So;0;ON;;;;;N;;;;;
+ 2440;OCR HOOK;So;0;ON;;;;;N;;;;;
+ 2441;OCR CHAIR;So;0;ON;;;;;N;;;;;
+ 2442;OCR FORK;So;0;ON;;;;;N;;;;;
+ 2443;OCR INVERTED FORK;So;0;ON;;;;;N;;;;;
+ 2444;OCR BELT BUCKLE;So;0;ON;;;;;N;;;;;
+ 2445;OCR BOW TIE;So;0;ON;;;;;N;;;;;
+ 2446;OCR BRANCH BANK IDENTIFICATION;So;0;ON;;;;;N;;;;;
+ 2447;OCR AMOUNT OF CHECK;So;0;ON;;;;;N;;;;;
+ 2448;OCR DASH;So;0;ON;;;;;N;;;;;
+ 2449;OCR CUSTOMER ACCOUNT NUMBER;So;0;ON;;;;;N;;;;;
+ 244A;OCR DOUBLE BACKSLASH;So;0;ON;;;;;N;;;;;
+ 2460;CIRCLED DIGIT ONE;No;0;ON;<circle> 0031;;1;1;N;;;;;
+ 2461;CIRCLED DIGIT TWO;No;0;ON;<circle> 0032;;2;2;N;;;;;
+ 2462;CIRCLED DIGIT THREE;No;0;ON;<circle> 0033;;3;3;N;;;;;
+ 2463;CIRCLED DIGIT FOUR;No;0;ON;<circle> 0034;;4;4;N;;;;;
+ 2464;CIRCLED DIGIT FIVE;No;0;ON;<circle> 0035;;5;5;N;;;;;
+ 2465;CIRCLED DIGIT SIX;No;0;ON;<circle> 0036;;6;6;N;;;;;
+ 2466;CIRCLED DIGIT SEVEN;No;0;ON;<circle> 0037;;7;7;N;;;;;
+ 2467;CIRCLED DIGIT EIGHT;No;0;ON;<circle> 0038;;8;8;N;;;;;
+ 2468;CIRCLED DIGIT NINE;No;0;ON;<circle> 0039;;9;9;N;;;;;
+ 2469;CIRCLED NUMBER TEN;No;0;ON;<circle> 0031 0030;;;10;N;;;;;
+ 246A;CIRCLED NUMBER ELEVEN;No;0;ON;<circle> 0031 0031;;;11;N;;;;;
+ 246B;CIRCLED NUMBER TWELVE;No;0;ON;<circle> 0031 0032;;;12;N;;;;;
+ 246C;CIRCLED NUMBER THIRTEEN;No;0;ON;<circle> 0031 0033;;;13;N;;;;;
+ 246D;CIRCLED NUMBER FOURTEEN;No;0;ON;<circle> 0031 0034;;;14;N;;;;;
+ 246E;CIRCLED NUMBER FIFTEEN;No;0;ON;<circle> 0031 0035;;;15;N;;;;;
+ 246F;CIRCLED NUMBER SIXTEEN;No;0;ON;<circle> 0031 0036;;;16;N;;;;;
+ 2470;CIRCLED NUMBER SEVENTEEN;No;0;ON;<circle> 0031 0037;;;17;N;;;;;
+ 2471;CIRCLED NUMBER EIGHTEEN;No;0;ON;<circle> 0031 0038;;;18;N;;;;;
+ 2472;CIRCLED NUMBER NINETEEN;No;0;ON;<circle> 0031 0039;;;19;N;;;;;
+ 2473;CIRCLED NUMBER TWENTY;No;0;ON;<circle> 0032 0030;;;20;N;;;;;
+ 2474;PARENTHESIZED DIGIT ONE;No;0;ON;<compat> 0028 0031 0029;;1;1;N;;;;;
+ 2475;PARENTHESIZED DIGIT TWO;No;0;ON;<compat> 0028 0032 0029;;2;2;N;;;;;
+ 2476;PARENTHESIZED DIGIT THREE;No;0;ON;<compat> 0028 0033 0029;;3;3;N;;;;;
+ 2477;PARENTHESIZED DIGIT FOUR;No;0;ON;<compat> 0028 0034 0029;;4;4;N;;;;;
+ 2478;PARENTHESIZED DIGIT FIVE;No;0;ON;<compat> 0028 0035 0029;;5;5;N;;;;;
+ 2479;PARENTHESIZED DIGIT SIX;No;0;ON;<compat> 0028 0036 0029;;6;6;N;;;;;
+ 247A;PARENTHESIZED DIGIT SEVEN;No;0;ON;<compat> 0028 0037 0029;;7;7;N;;;;;
+ 247B;PARENTHESIZED DIGIT EIGHT;No;0;ON;<compat> 0028 0038 0029;;8;8;N;;;;;
+ 247C;PARENTHESIZED DIGIT NINE;No;0;ON;<compat> 0028 0039 0029;;9;9;N;;;;;
+ 247D;PARENTHESIZED NUMBER TEN;No;0;ON;<compat> 0028 0031 0030 0029;;;10;N;;;;;
+ 247E;PARENTHESIZED NUMBER ELEVEN;No;0;ON;<compat> 0028 0031 0031 0029;;;11;N;;;;;
+ 247F;PARENTHESIZED NUMBER TWELVE;No;0;ON;<compat> 0028 0031 0032 0029;;;12;N;;;;;
+ 2480;PARENTHESIZED NUMBER THIRTEEN;No;0;ON;<compat> 0028 0031 0033 0029;;;13;N;;;;;
+ 2481;PARENTHESIZED NUMBER FOURTEEN;No;0;ON;<compat> 0028 0031 0034 0029;;;14;N;;;;;
+ 2482;PARENTHESIZED NUMBER FIFTEEN;No;0;ON;<compat> 0028 0031 0035 0029;;;15;N;;;;;
+ 2483;PARENTHESIZED NUMBER SIXTEEN;No;0;ON;<compat> 0028 0031 0036 0029;;;16;N;;;;;
+ 2484;PARENTHESIZED NUMBER SEVENTEEN;No;0;ON;<compat> 0028 0031 0037 0029;;;17;N;;;;;
+ 2485;PARENTHESIZED NUMBER EIGHTEEN;No;0;ON;<compat> 0028 0031 0038 0029;;;18;N;;;;;
+ 2486;PARENTHESIZED NUMBER NINETEEN;No;0;ON;<compat> 0028 0031 0039 0029;;;19;N;;;;;
+ 2487;PARENTHESIZED NUMBER TWENTY;No;0;ON;<compat> 0028 0032 0030 0029;;;20;N;;;;;
+ 2488;DIGIT ONE FULL STOP;No;0;EN;<compat> 0031 002E;;1;1;N;DIGIT ONE PERIOD;;;;
+ 2489;DIGIT TWO FULL STOP;No;0;EN;<compat> 0032 002E;;2;2;N;DIGIT TWO PERIOD;;;;
+ 248A;DIGIT THREE FULL STOP;No;0;EN;<compat> 0033 002E;;3;3;N;DIGIT THREE PERIOD;;;;
+ 248B;DIGIT FOUR FULL STOP;No;0;EN;<compat> 0034 002E;;4;4;N;DIGIT FOUR PERIOD;;;;
+ 248C;DIGIT FIVE FULL STOP;No;0;EN;<compat> 0035 002E;;5;5;N;DIGIT FIVE PERIOD;;;;
+ 248D;DIGIT SIX FULL STOP;No;0;EN;<compat> 0036 002E;;6;6;N;DIGIT SIX PERIOD;;;;
+ 248E;DIGIT SEVEN FULL STOP;No;0;EN;<compat> 0037 002E;;7;7;N;DIGIT SEVEN PERIOD;;;;
+ 248F;DIGIT EIGHT FULL STOP;No;0;EN;<compat> 0038 002E;;8;8;N;DIGIT EIGHT PERIOD;;;;
+ 2490;DIGIT NINE FULL STOP;No;0;EN;<compat> 0039 002E;;9;9;N;DIGIT NINE PERIOD;;;;
+ 2491;NUMBER TEN FULL STOP;No;0;EN;<compat> 0031 0030 002E;;;10;N;NUMBER TEN PERIOD;;;;
+ 2492;NUMBER ELEVEN FULL STOP;No;0;EN;<compat> 0031 0031 002E;;;11;N;NUMBER ELEVEN PERIOD;;;;
+ 2493;NUMBER TWELVE FULL STOP;No;0;EN;<compat> 0031 0032 002E;;;12;N;NUMBER TWELVE PERIOD;;;;
+ 2494;NUMBER THIRTEEN FULL STOP;No;0;EN;<compat> 0031 0033 002E;;;13;N;NUMBER THIRTEEN PERIOD;;;;
+ 2495;NUMBER FOURTEEN FULL STOP;No;0;EN;<compat> 0031 0034 002E;;;14;N;NUMBER FOURTEEN PERIOD;;;;
+ 2496;NUMBER FIFTEEN FULL STOP;No;0;EN;<compat> 0031 0035 002E;;;15;N;NUMBER FIFTEEN PERIOD;;;;
+ 2497;NUMBER SIXTEEN FULL STOP;No;0;EN;<compat> 0031 0036 002E;;;16;N;NUMBER SIXTEEN PERIOD;;;;
+ 2498;NUMBER SEVENTEEN FULL STOP;No;0;EN;<compat> 0031 0037 002E;;;17;N;NUMBER SEVENTEEN PERIOD;;;;
+ 2499;NUMBER EIGHTEEN FULL STOP;No;0;EN;<compat> 0031 0038 002E;;;18;N;NUMBER EIGHTEEN PERIOD;;;;
+ 249A;NUMBER NINETEEN FULL STOP;No;0;EN;<compat> 0031 0039 002E;;;19;N;NUMBER NINETEEN PERIOD;;;;
+ 249B;NUMBER TWENTY FULL STOP;No;0;EN;<compat> 0032 0030 002E;;;20;N;NUMBER TWENTY PERIOD;;;;
+ 249C;PARENTHESIZED LATIN SMALL LETTER A;So;0;L;<compat> 0028 0061 0029;;;;N;;;;;
+ 249D;PARENTHESIZED LATIN SMALL LETTER B;So;0;L;<compat> 0028 0062 0029;;;;N;;;;;
+ 249E;PARENTHESIZED LATIN SMALL LETTER C;So;0;L;<compat> 0028 0063 0029;;;;N;;;;;
+ 249F;PARENTHESIZED LATIN SMALL LETTER D;So;0;L;<compat> 0028 0064 0029;;;;N;;;;;
+ 24A0;PARENTHESIZED LATIN SMALL LETTER E;So;0;L;<compat> 0028 0065 0029;;;;N;;;;;
+ 24A1;PARENTHESIZED LATIN SMALL LETTER F;So;0;L;<compat> 0028 0066 0029;;;;N;;;;;
+ 24A2;PARENTHESIZED LATIN SMALL LETTER G;So;0;L;<compat> 0028 0067 0029;;;;N;;;;;
+ 24A3;PARENTHESIZED LATIN SMALL LETTER H;So;0;L;<compat> 0028 0068 0029;;;;N;;;;;
+ 24A4;PARENTHESIZED LATIN SMALL LETTER I;So;0;L;<compat> 0028 0069 0029;;;;N;;;;;
+ 24A5;PARENTHESIZED LATIN SMALL LETTER J;So;0;L;<compat> 0028 006A 0029;;;;N;;;;;
+ 24A6;PARENTHESIZED LATIN SMALL LETTER K;So;0;L;<compat> 0028 006B 0029;;;;N;;;;;
+ 24A7;PARENTHESIZED LATIN SMALL LETTER L;So;0;L;<compat> 0028 006C 0029;;;;N;;;;;
+ 24A8;PARENTHESIZED LATIN SMALL LETTER M;So;0;L;<compat> 0028 006D 0029;;;;N;;;;;
+ 24A9;PARENTHESIZED LATIN SMALL LETTER N;So;0;L;<compat> 0028 006E 0029;;;;N;;;;;
+ 24AA;PARENTHESIZED LATIN SMALL LETTER O;So;0;L;<compat> 0028 006F 0029;;;;N;;;;;
+ 24AB;PARENTHESIZED LATIN SMALL LETTER P;So;0;L;<compat> 0028 0070 0029;;;;N;;;;;
+ 24AC;PARENTHESIZED LATIN SMALL LETTER Q;So;0;L;<compat> 0028 0071 0029;;;;N;;;;;
+ 24AD;PARENTHESIZED LATIN SMALL LETTER R;So;0;L;<compat> 0028 0072 0029;;;;N;;;;;
+ 24AE;PARENTHESIZED LATIN SMALL LETTER S;So;0;L;<compat> 0028 0073 0029;;;;N;;;;;
+ 24AF;PARENTHESIZED LATIN SMALL LETTER T;So;0;L;<compat> 0028 0074 0029;;;;N;;;;;
+ 24B0;PARENTHESIZED LATIN SMALL LETTER U;So;0;L;<compat> 0028 0075 0029;;;;N;;;;;
+ 24B1;PARENTHESIZED LATIN SMALL LETTER V;So;0;L;<compat> 0028 0076 0029;;;;N;;;;;
+ 24B2;PARENTHESIZED LATIN SMALL LETTER W;So;0;L;<compat> 0028 0077 0029;;;;N;;;;;
+ 24B3;PARENTHESIZED LATIN SMALL LETTER X;So;0;L;<compat> 0028 0078 0029;;;;N;;;;;
+ 24B4;PARENTHESIZED LATIN SMALL LETTER Y;So;0;L;<compat> 0028 0079 0029;;;;N;;;;;
+ 24B5;PARENTHESIZED LATIN SMALL LETTER Z;So;0;L;<compat> 0028 007A 0029;;;;N;;;;;
+ 24B6;CIRCLED LATIN CAPITAL LETTER A;So;0;L;<circle> 0041;;;;N;;;;24D0;
+ 24B7;CIRCLED LATIN CAPITAL LETTER B;So;0;L;<circle> 0042;;;;N;;;;24D1;
+ 24B8;CIRCLED LATIN CAPITAL LETTER C;So;0;L;<circle> 0043;;;;N;;;;24D2;
+ 24B9;CIRCLED LATIN CAPITAL LETTER D;So;0;L;<circle> 0044;;;;N;;;;24D3;
+ 24BA;CIRCLED LATIN CAPITAL LETTER E;So;0;L;<circle> 0045;;;;N;;;;24D4;
+ 24BB;CIRCLED LATIN CAPITAL LETTER F;So;0;L;<circle> 0046;;;;N;;;;24D5;
+ 24BC;CIRCLED LATIN CAPITAL LETTER G;So;0;L;<circle> 0047;;;;N;;;;24D6;
+ 24BD;CIRCLED LATIN CAPITAL LETTER H;So;0;L;<circle> 0048;;;;N;;;;24D7;
+ 24BE;CIRCLED LATIN CAPITAL LETTER I;So;0;L;<circle> 0049;;;;N;;;;24D8;
+ 24BF;CIRCLED LATIN CAPITAL LETTER J;So;0;L;<circle> 004A;;;;N;;;;24D9;
+ 24C0;CIRCLED LATIN CAPITAL LETTER K;So;0;L;<circle> 004B;;;;N;;;;24DA;
+ 24C1;CIRCLED LATIN CAPITAL LETTER L;So;0;L;<circle> 004C;;;;N;;;;24DB;
+ 24C2;CIRCLED LATIN CAPITAL LETTER M;So;0;L;<circle> 004D;;;;N;;;;24DC;
+ 24C3;CIRCLED LATIN CAPITAL LETTER N;So;0;L;<circle> 004E;;;;N;;;;24DD;
+ 24C4;CIRCLED LATIN CAPITAL LETTER O;So;0;L;<circle> 004F;;;;N;;;;24DE;
+ 24C5;CIRCLED LATIN CAPITAL LETTER P;So;0;L;<circle> 0050;;;;N;;;;24DF;
+ 24C6;CIRCLED LATIN CAPITAL LETTER Q;So;0;L;<circle> 0051;;;;N;;;;24E0;
+ 24C7;CIRCLED LATIN CAPITAL LETTER R;So;0;L;<circle> 0052;;;;N;;;;24E1;
+ 24C8;CIRCLED LATIN CAPITAL LETTER S;So;0;L;<circle> 0053;;;;N;;;;24E2;
+ 24C9;CIRCLED LATIN CAPITAL LETTER T;So;0;L;<circle> 0054;;;;N;;;;24E3;
+ 24CA;CIRCLED LATIN CAPITAL LETTER U;So;0;L;<circle> 0055;;;;N;;;;24E4;
+ 24CB;CIRCLED LATIN CAPITAL LETTER V;So;0;L;<circle> 0056;;;;N;;;;24E5;
+ 24CC;CIRCLED LATIN CAPITAL LETTER W;So;0;L;<circle> 0057;;;;N;;;;24E6;
+ 24CD;CIRCLED LATIN CAPITAL LETTER X;So;0;L;<circle> 0058;;;;N;;;;24E7;
+ 24CE;CIRCLED LATIN CAPITAL LETTER Y;So;0;L;<circle> 0059;;;;N;;;;24E8;
+ 24CF;CIRCLED LATIN CAPITAL LETTER Z;So;0;L;<circle> 005A;;;;N;;;;24E9;
+ 24D0;CIRCLED LATIN SMALL LETTER A;So;0;L;<circle> 0061;;;;N;;;24B6;;24B6
+ 24D1;CIRCLED LATIN SMALL LETTER B;So;0;L;<circle> 0062;;;;N;;;24B7;;24B7
+ 24D2;CIRCLED LATIN SMALL LETTER C;So;0;L;<circle> 0063;;;;N;;;24B8;;24B8
+ 24D3;CIRCLED LATIN SMALL LETTER D;So;0;L;<circle> 0064;;;;N;;;24B9;;24B9
+ 24D4;CIRCLED LATIN SMALL LETTER E;So;0;L;<circle> 0065;;;;N;;;24BA;;24BA
+ 24D5;CIRCLED LATIN SMALL LETTER F;So;0;L;<circle> 0066;;;;N;;;24BB;;24BB
+ 24D6;CIRCLED LATIN SMALL LETTER G;So;0;L;<circle> 0067;;;;N;;;24BC;;24BC
+ 24D7;CIRCLED LATIN SMALL LETTER H;So;0;L;<circle> 0068;;;;N;;;24BD;;24BD
+ 24D8;CIRCLED LATIN SMALL LETTER I;So;0;L;<circle> 0069;;;;N;;;24BE;;24BE
+ 24D9;CIRCLED LATIN SMALL LETTER J;So;0;L;<circle> 006A;;;;N;;;24BF;;24BF
+ 24DA;CIRCLED LATIN SMALL LETTER K;So;0;L;<circle> 006B;;;;N;;;24C0;;24C0
+ 24DB;CIRCLED LATIN SMALL LETTER L;So;0;L;<circle> 006C;;;;N;;;24C1;;24C1
+ 24DC;CIRCLED LATIN SMALL LETTER M;So;0;L;<circle> 006D;;;;N;;;24C2;;24C2
+ 24DD;CIRCLED LATIN SMALL LETTER N;So;0;L;<circle> 006E;;;;N;;;24C3;;24C3
+ 24DE;CIRCLED LATIN SMALL LETTER O;So;0;L;<circle> 006F;;;;N;;;24C4;;24C4
+ 24DF;CIRCLED LATIN SMALL LETTER P;So;0;L;<circle> 0070;;;;N;;;24C5;;24C5
+ 24E0;CIRCLED LATIN SMALL LETTER Q;So;0;L;<circle> 0071;;;;N;;;24C6;;24C6
+ 24E1;CIRCLED LATIN SMALL LETTER R;So;0;L;<circle> 0072;;;;N;;;24C7;;24C7
+ 24E2;CIRCLED LATIN SMALL LETTER S;So;0;L;<circle> 0073;;;;N;;;24C8;;24C8
+ 24E3;CIRCLED LATIN SMALL LETTER T;So;0;L;<circle> 0074;;;;N;;;24C9;;24C9
+ 24E4;CIRCLED LATIN SMALL LETTER U;So;0;L;<circle> 0075;;;;N;;;24CA;;24CA
+ 24E5;CIRCLED LATIN SMALL LETTER V;So;0;L;<circle> 0076;;;;N;;;24CB;;24CB
+ 24E6;CIRCLED LATIN SMALL LETTER W;So;0;L;<circle> 0077;;;;N;;;24CC;;24CC
+ 24E7;CIRCLED LATIN SMALL LETTER X;So;0;L;<circle> 0078;;;;N;;;24CD;;24CD
+ 24E8;CIRCLED LATIN SMALL LETTER Y;So;0;L;<circle> 0079;;;;N;;;24CE;;24CE
+ 24E9;CIRCLED LATIN SMALL LETTER Z;So;0;L;<circle> 007A;;;;N;;;24CF;;24CF
+ 24EA;CIRCLED DIGIT ZERO;No;0;ON;<circle> 0030;;0;0;N;;;;;
+ 24EB;NEGATIVE CIRCLED NUMBER ELEVEN;No;0;ON;;;;11;N;;;;;
+ 24EC;NEGATIVE CIRCLED NUMBER TWELVE;No;0;ON;;;;12;N;;;;;
+ 24ED;NEGATIVE CIRCLED NUMBER THIRTEEN;No;0;ON;;;;13;N;;;;;
+ 24EE;NEGATIVE CIRCLED NUMBER FOURTEEN;No;0;ON;;;;14;N;;;;;
+ 24EF;NEGATIVE CIRCLED NUMBER FIFTEEN;No;0;ON;;;;15;N;;;;;
+ 24F0;NEGATIVE CIRCLED NUMBER SIXTEEN;No;0;ON;;;;16;N;;;;;
+ 24F1;NEGATIVE CIRCLED NUMBER SEVENTEEN;No;0;ON;;;;17;N;;;;;
+ 24F2;NEGATIVE CIRCLED NUMBER EIGHTEEN;No;0;ON;;;;18;N;;;;;
+ 24F3;NEGATIVE CIRCLED NUMBER NINETEEN;No;0;ON;;;;19;N;;;;;
+ 24F4;NEGATIVE CIRCLED NUMBER TWENTY;No;0;ON;;;;20;N;;;;;
+ 24F5;DOUBLE CIRCLED DIGIT ONE;No;0;ON;;;1;1;N;;;;;
+ 24F6;DOUBLE CIRCLED DIGIT TWO;No;0;ON;;;2;2;N;;;;;
+ 24F7;DOUBLE CIRCLED DIGIT THREE;No;0;ON;;;3;3;N;;;;;
+ 24F8;DOUBLE CIRCLED DIGIT FOUR;No;0;ON;;;4;4;N;;;;;
+ 24F9;DOUBLE CIRCLED DIGIT FIVE;No;0;ON;;;5;5;N;;;;;
+ 24FA;DOUBLE CIRCLED DIGIT SIX;No;0;ON;;;6;6;N;;;;;
+ 24FB;DOUBLE CIRCLED DIGIT SEVEN;No;0;ON;;;7;7;N;;;;;
+ 24FC;DOUBLE CIRCLED DIGIT EIGHT;No;0;ON;;;8;8;N;;;;;
+ 24FD;DOUBLE CIRCLED DIGIT NINE;No;0;ON;;;9;9;N;;;;;
+ 24FE;DOUBLE CIRCLED NUMBER TEN;No;0;ON;;;;10;N;;;;;
+ 24FF;NEGATIVE CIRCLED DIGIT ZERO;No;0;ON;;;0;0;N;;;;;
+ 2500;BOX DRAWINGS LIGHT HORIZONTAL;So;0;ON;;;;;N;FORMS LIGHT HORIZONTAL;;;;
+ 2501;BOX DRAWINGS HEAVY HORIZONTAL;So;0;ON;;;;;N;FORMS HEAVY HORIZONTAL;;;;
+ 2502;BOX DRAWINGS LIGHT VERTICAL;So;0;ON;;;;;N;FORMS LIGHT VERTICAL;;;;
+ 2503;BOX DRAWINGS HEAVY VERTICAL;So;0;ON;;;;;N;FORMS HEAVY VERTICAL;;;;
+ 2504;BOX DRAWINGS LIGHT TRIPLE DASH HORIZONTAL;So;0;ON;;;;;N;FORMS LIGHT TRIPLE DASH HORIZONTAL;;;;
+ 2505;BOX DRAWINGS HEAVY TRIPLE DASH HORIZONTAL;So;0;ON;;;;;N;FORMS HEAVY TRIPLE DASH HORIZONTAL;;;;
+ 2506;BOX DRAWINGS LIGHT TRIPLE DASH VERTICAL;So;0;ON;;;;;N;FORMS LIGHT TRIPLE DASH VERTICAL;;;;
+ 2507;BOX DRAWINGS HEAVY TRIPLE DASH VERTICAL;So;0;ON;;;;;N;FORMS HEAVY TRIPLE DASH VERTICAL;;;;
+ 2508;BOX DRAWINGS LIGHT QUADRUPLE DASH HORIZONTAL;So;0;ON;;;;;N;FORMS LIGHT QUADRUPLE DASH HORIZONTAL;;;;
+ 2509;BOX DRAWINGS HEAVY QUADRUPLE DASH HORIZONTAL;So;0;ON;;;;;N;FORMS HEAVY QUADRUPLE DASH HORIZONTAL;;;;
+ 250A;BOX DRAWINGS LIGHT QUADRUPLE DASH VERTICAL;So;0;ON;;;;;N;FORMS LIGHT QUADRUPLE DASH VERTICAL;;;;
+ 250B;BOX DRAWINGS HEAVY QUADRUPLE DASH VERTICAL;So;0;ON;;;;;N;FORMS HEAVY QUADRUPLE DASH VERTICAL;;;;
+ 250C;BOX DRAWINGS LIGHT DOWN AND RIGHT;So;0;ON;;;;;N;FORMS LIGHT DOWN AND RIGHT;;;;
+ 250D;BOX DRAWINGS DOWN LIGHT AND RIGHT HEAVY;So;0;ON;;;;;N;FORMS DOWN LIGHT AND RIGHT HEAVY;;;;
+ 250E;BOX DRAWINGS DOWN HEAVY AND RIGHT LIGHT;So;0;ON;;;;;N;FORMS DOWN HEAVY AND RIGHT LIGHT;;;;
+ 250F;BOX DRAWINGS HEAVY DOWN AND RIGHT;So;0;ON;;;;;N;FORMS HEAVY DOWN AND RIGHT;;;;
+ 2510;BOX DRAWINGS LIGHT DOWN AND LEFT;So;0;ON;;;;;N;FORMS LIGHT DOWN AND LEFT;;;;
+ 2511;BOX DRAWINGS DOWN LIGHT AND LEFT HEAVY;So;0;ON;;;;;N;FORMS DOWN LIGHT AND LEFT HEAVY;;;;
+ 2512;BOX DRAWINGS DOWN HEAVY AND LEFT LIGHT;So;0;ON;;;;;N;FORMS DOWN HEAVY AND LEFT LIGHT;;;;
+ 2513;BOX DRAWINGS HEAVY DOWN AND LEFT;So;0;ON;;;;;N;FORMS HEAVY DOWN AND LEFT;;;;
+ 2514;BOX DRAWINGS LIGHT UP AND RIGHT;So;0;ON;;;;;N;FORMS LIGHT UP AND RIGHT;;;;
+ 2515;BOX DRAWINGS UP LIGHT AND RIGHT HEAVY;So;0;ON;;;;;N;FORMS UP LIGHT AND RIGHT HEAVY;;;;
+ 2516;BOX DRAWINGS UP HEAVY AND RIGHT LIGHT;So;0;ON;;;;;N;FORMS UP HEAVY AND RIGHT LIGHT;;;;
+ 2517;BOX DRAWINGS HEAVY UP AND RIGHT;So;0;ON;;;;;N;FORMS HEAVY UP AND RIGHT;;;;
+ 2518;BOX DRAWINGS LIGHT UP AND LEFT;So;0;ON;;;;;N;FORMS LIGHT UP AND LEFT;;;;
+ 2519;BOX DRAWINGS UP LIGHT AND LEFT HEAVY;So;0;ON;;;;;N;FORMS UP LIGHT AND LEFT HEAVY;;;;
+ 251A;BOX DRAWINGS UP HEAVY AND LEFT LIGHT;So;0;ON;;;;;N;FORMS UP HEAVY AND LEFT LIGHT;;;;
+ 251B;BOX DRAWINGS HEAVY UP AND LEFT;So;0;ON;;;;;N;FORMS HEAVY UP AND LEFT;;;;
+ 251C;BOX DRAWINGS LIGHT VERTICAL AND RIGHT;So;0;ON;;;;;N;FORMS LIGHT VERTICAL AND RIGHT;;;;
+ 251D;BOX DRAWINGS VERTICAL LIGHT AND RIGHT HEAVY;So;0;ON;;;;;N;FORMS VERTICAL LIGHT AND RIGHT HEAVY;;;;
+ 251E;BOX DRAWINGS UP HEAVY AND RIGHT DOWN LIGHT;So;0;ON;;;;;N;FORMS UP HEAVY AND RIGHT DOWN LIGHT;;;;
+ 251F;BOX DRAWINGS DOWN HEAVY AND RIGHT UP LIGHT;So;0;ON;;;;;N;FORMS DOWN HEAVY AND RIGHT UP LIGHT;;;;
+ 2520;BOX DRAWINGS VERTICAL HEAVY AND RIGHT LIGHT;So;0;ON;;;;;N;FORMS VERTICAL HEAVY AND RIGHT LIGHT;;;;
+ 2521;BOX DRAWINGS DOWN LIGHT AND RIGHT UP HEAVY;So;0;ON;;;;;N;FORMS DOWN LIGHT AND RIGHT UP HEAVY;;;;
+ 2522;BOX DRAWINGS UP LIGHT AND RIGHT DOWN HEAVY;So;0;ON;;;;;N;FORMS UP LIGHT AND RIGHT DOWN HEAVY;;;;
+ 2523;BOX DRAWINGS HEAVY VERTICAL AND RIGHT;So;0;ON;;;;;N;FORMS HEAVY VERTICAL AND RIGHT;;;;
+ 2524;BOX DRAWINGS LIGHT VERTICAL AND LEFT;So;0;ON;;;;;N;FORMS LIGHT VERTICAL AND LEFT;;;;
+ 2525;BOX DRAWINGS VERTICAL LIGHT AND LEFT HEAVY;So;0;ON;;;;;N;FORMS VERTICAL LIGHT AND LEFT HEAVY;;;;
+ 2526;BOX DRAWINGS UP HEAVY AND LEFT DOWN LIGHT;So;0;ON;;;;;N;FORMS UP HEAVY AND LEFT DOWN LIGHT;;;;
+ 2527;BOX DRAWINGS DOWN HEAVY AND LEFT UP LIGHT;So;0;ON;;;;;N;FORMS DOWN HEAVY AND LEFT UP LIGHT;;;;
+ 2528;BOX DRAWINGS VERTICAL HEAVY AND LEFT LIGHT;So;0;ON;;;;;N;FORMS VERTICAL HEAVY AND LEFT LIGHT;;;;
+ 2529;BOX DRAWINGS DOWN LIGHT AND LEFT UP HEAVY;So;0;ON;;;;;N;FORMS DOWN LIGHT AND LEFT UP HEAVY;;;;
+ 252A;BOX DRAWINGS UP LIGHT AND LEFT DOWN HEAVY;So;0;ON;;;;;N;FORMS UP LIGHT AND LEFT DOWN HEAVY;;;;
+ 252B;BOX DRAWINGS HEAVY VERTICAL AND LEFT;So;0;ON;;;;;N;FORMS HEAVY VERTICAL AND LEFT;;;;
+ 252C;BOX DRAWINGS LIGHT DOWN AND HORIZONTAL;So;0;ON;;;;;N;FORMS LIGHT DOWN AND HORIZONTAL;;;;
+ 252D;BOX DRAWINGS LEFT HEAVY AND RIGHT DOWN LIGHT;So;0;ON;;;;;N;FORMS LEFT HEAVY AND RIGHT DOWN LIGHT;;;;
+ 252E;BOX DRAWINGS RIGHT HEAVY AND LEFT DOWN LIGHT;So;0;ON;;;;;N;FORMS RIGHT HEAVY AND LEFT DOWN LIGHT;;;;
+ 252F;BOX DRAWINGS DOWN LIGHT AND HORIZONTAL HEAVY;So;0;ON;;;;;N;FORMS DOWN LIGHT AND HORIZONTAL HEAVY;;;;
+ 2530;BOX DRAWINGS DOWN HEAVY AND HORIZONTAL LIGHT;So;0;ON;;;;;N;FORMS DOWN HEAVY AND HORIZONTAL LIGHT;;;;
+ 2531;BOX DRAWINGS RIGHT LIGHT AND LEFT DOWN HEAVY;So;0;ON;;;;;N;FORMS RIGHT LIGHT AND LEFT DOWN HEAVY;;;;
+ 2532;BOX DRAWINGS LEFT LIGHT AND RIGHT DOWN HEAVY;So;0;ON;;;;;N;FORMS LEFT LIGHT AND RIGHT DOWN HEAVY;;;;
+ 2533;BOX DRAWINGS HEAVY DOWN AND HORIZONTAL;So;0;ON;;;;;N;FORMS HEAVY DOWN AND HORIZONTAL;;;;
+ 2534;BOX DRAWINGS LIGHT UP AND HORIZONTAL;So;0;ON;;;;;N;FORMS LIGHT UP AND HORIZONTAL;;;;
+ 2535;BOX DRAWINGS LEFT HEAVY AND RIGHT UP LIGHT;So;0;ON;;;;;N;FORMS LEFT HEAVY AND RIGHT UP LIGHT;;;;
+ 2536;BOX DRAWINGS RIGHT HEAVY AND LEFT UP LIGHT;So;0;ON;;;;;N;FORMS RIGHT HEAVY AND LEFT UP LIGHT;;;;
+ 2537;BOX DRAWINGS UP LIGHT AND HORIZONTAL HEAVY;So;0;ON;;;;;N;FORMS UP LIGHT AND HORIZONTAL HEAVY;;;;
+ 2538;BOX DRAWINGS UP HEAVY AND HORIZONTAL LIGHT;So;0;ON;;;;;N;FORMS UP HEAVY AND HORIZONTAL LIGHT;;;;
+ 2539;BOX DRAWINGS RIGHT LIGHT AND LEFT UP HEAVY;So;0;ON;;;;;N;FORMS RIGHT LIGHT AND LEFT UP HEAVY;;;;
+ 253A;BOX DRAWINGS LEFT LIGHT AND RIGHT UP HEAVY;So;0;ON;;;;;N;FORMS LEFT LIGHT AND RIGHT UP HEAVY;;;;
+ 253B;BOX DRAWINGS HEAVY UP AND HORIZONTAL;So;0;ON;;;;;N;FORMS HEAVY UP AND HORIZONTAL;;;;
+ 253C;BOX DRAWINGS LIGHT VERTICAL AND HORIZONTAL;So;0;ON;;;;;N;FORMS LIGHT VERTICAL AND HORIZONTAL;;;;
+ 253D;BOX DRAWINGS LEFT HEAVY AND RIGHT VERTICAL LIGHT;So;0;ON;;;;;N;FORMS LEFT HEAVY AND RIGHT VERTICAL LIGHT;;;;
+ 253E;BOX DRAWINGS RIGHT HEAVY AND LEFT VERTICAL LIGHT;So;0;ON;;;;;N;FORMS RIGHT HEAVY AND LEFT VERTICAL LIGHT;;;;
+ 253F;BOX DRAWINGS VERTICAL LIGHT AND HORIZONTAL HEAVY;So;0;ON;;;;;N;FORMS VERTICAL LIGHT AND HORIZONTAL HEAVY;;;;
+ 2540;BOX DRAWINGS UP HEAVY AND DOWN HORIZONTAL LIGHT;So;0;ON;;;;;N;FORMS UP HEAVY AND DOWN HORIZONTAL LIGHT;;;;
+ 2541;BOX DRAWINGS DOWN HEAVY AND UP HORIZONTAL LIGHT;So;0;ON;;;;;N;FORMS DOWN HEAVY AND UP HORIZONTAL LIGHT;;;;
+ 2542;BOX DRAWINGS VERTICAL HEAVY AND HORIZONTAL LIGHT;So;0;ON;;;;;N;FORMS VERTICAL HEAVY AND HORIZONTAL LIGHT;;;;
+ 2543;BOX DRAWINGS LEFT UP HEAVY AND RIGHT DOWN LIGHT;So;0;ON;;;;;N;FORMS LEFT UP HEAVY AND RIGHT DOWN LIGHT;;;;
+ 2544;BOX DRAWINGS RIGHT UP HEAVY AND LEFT DOWN LIGHT;So;0;ON;;;;;N;FORMS RIGHT UP HEAVY AND LEFT DOWN LIGHT;;;;
+ 2545;BOX DRAWINGS LEFT DOWN HEAVY AND RIGHT UP LIGHT;So;0;ON;;;;;N;FORMS LEFT DOWN HEAVY AND RIGHT UP LIGHT;;;;
+ 2546;BOX DRAWINGS RIGHT DOWN HEAVY AND LEFT UP LIGHT;So;0;ON;;;;;N;FORMS RIGHT DOWN HEAVY AND LEFT UP LIGHT;;;;
+ 2547;BOX DRAWINGS DOWN LIGHT AND UP HORIZONTAL HEAVY;So;0;ON;;;;;N;FORMS DOWN LIGHT AND UP HORIZONTAL HEAVY;;;;
+ 2548;BOX DRAWINGS UP LIGHT AND DOWN HORIZONTAL HEAVY;So;0;ON;;;;;N;FORMS UP LIGHT AND DOWN HORIZONTAL HEAVY;;;;
+ 2549;BOX DRAWINGS RIGHT LIGHT AND LEFT VERTICAL HEAVY;So;0;ON;;;;;N;FORMS RIGHT LIGHT AND LEFT VERTICAL HEAVY;;;;
+ 254A;BOX DRAWINGS LEFT LIGHT AND RIGHT VERTICAL HEAVY;So;0;ON;;;;;N;FORMS LEFT LIGHT AND RIGHT VERTICAL HEAVY;;;;
+ 254B;BOX DRAWINGS HEAVY VERTICAL AND HORIZONTAL;So;0;ON;;;;;N;FORMS HEAVY VERTICAL AND HORIZONTAL;;;;
+ 254C;BOX DRAWINGS LIGHT DOUBLE DASH HORIZONTAL;So;0;ON;;;;;N;FORMS LIGHT DOUBLE DASH HORIZONTAL;;;;
+ 254D;BOX DRAWINGS HEAVY DOUBLE DASH HORIZONTAL;So;0;ON;;;;;N;FORMS HEAVY DOUBLE DASH HORIZONTAL;;;;
+ 254E;BOX DRAWINGS LIGHT DOUBLE DASH VERTICAL;So;0;ON;;;;;N;FORMS LIGHT DOUBLE DASH VERTICAL;;;;
+ 254F;BOX DRAWINGS HEAVY DOUBLE DASH VERTICAL;So;0;ON;;;;;N;FORMS HEAVY DOUBLE DASH VERTICAL;;;;
+ 2550;BOX DRAWINGS DOUBLE HORIZONTAL;So;0;ON;;;;;N;FORMS DOUBLE HORIZONTAL;;;;
+ 2551;BOX DRAWINGS DOUBLE VERTICAL;So;0;ON;;;;;N;FORMS DOUBLE VERTICAL;;;;
+ 2552;BOX DRAWINGS DOWN SINGLE AND RIGHT DOUBLE;So;0;ON;;;;;N;FORMS DOWN SINGLE AND RIGHT DOUBLE;;;;
+ 2553;BOX DRAWINGS DOWN DOUBLE AND RIGHT SINGLE;So;0;ON;;;;;N;FORMS DOWN DOUBLE AND RIGHT SINGLE;;;;
+ 2554;BOX DRAWINGS DOUBLE DOWN AND RIGHT;So;0;ON;;;;;N;FORMS DOUBLE DOWN AND RIGHT;;;;
+ 2555;BOX DRAWINGS DOWN SINGLE AND LEFT DOUBLE;So;0;ON;;;;;N;FORMS DOWN SINGLE AND LEFT DOUBLE;;;;
+ 2556;BOX DRAWINGS DOWN DOUBLE AND LEFT SINGLE;So;0;ON;;;;;N;FORMS DOWN DOUBLE AND LEFT SINGLE;;;;
+ 2557;BOX DRAWINGS DOUBLE DOWN AND LEFT;So;0;ON;;;;;N;FORMS DOUBLE DOWN AND LEFT;;;;
+ 2558;BOX DRAWINGS UP SINGLE AND RIGHT DOUBLE;So;0;ON;;;;;N;FORMS UP SINGLE AND RIGHT DOUBLE;;;;
+ 2559;BOX DRAWINGS UP DOUBLE AND RIGHT SINGLE;So;0;ON;;;;;N;FORMS UP DOUBLE AND RIGHT SINGLE;;;;
+ 255A;BOX DRAWINGS DOUBLE UP AND RIGHT;So;0;ON;;;;;N;FORMS DOUBLE UP AND RIGHT;;;;
+ 255B;BOX DRAWINGS UP SINGLE AND LEFT DOUBLE;So;0;ON;;;;;N;FORMS UP SINGLE AND LEFT DOUBLE;;;;
+ 255C;BOX DRAWINGS UP DOUBLE AND LEFT SINGLE;So;0;ON;;;;;N;FORMS UP DOUBLE AND LEFT SINGLE;;;;
+ 255D;BOX DRAWINGS DOUBLE UP AND LEFT;So;0;ON;;;;;N;FORMS DOUBLE UP AND LEFT;;;;
+ 255E;BOX DRAWINGS VERTICAL SINGLE AND RIGHT DOUBLE;So;0;ON;;;;;N;FORMS VERTICAL SINGLE AND RIGHT DOUBLE;;;;
+ 255F;BOX DRAWINGS VERTICAL DOUBLE AND RIGHT SINGLE;So;0;ON;;;;;N;FORMS VERTICAL DOUBLE AND RIGHT SINGLE;;;;
+ 2560;BOX DRAWINGS DOUBLE VERTICAL AND RIGHT;So;0;ON;;;;;N;FORMS DOUBLE VERTICAL AND RIGHT;;;;
+ 2561;BOX DRAWINGS VERTICAL SINGLE AND LEFT DOUBLE;So;0;ON;;;;;N;FORMS VERTICAL SINGLE AND LEFT DOUBLE;;;;
+ 2562;BOX DRAWINGS VERTICAL DOUBLE AND LEFT SINGLE;So;0;ON;;;;;N;FORMS VERTICAL DOUBLE AND LEFT SINGLE;;;;
+ 2563;BOX DRAWINGS DOUBLE VERTICAL AND LEFT;So;0;ON;;;;;N;FORMS DOUBLE VERTICAL AND LEFT;;;;
+ 2564;BOX DRAWINGS DOWN SINGLE AND HORIZONTAL DOUBLE;So;0;ON;;;;;N;FORMS DOWN SINGLE AND HORIZONTAL DOUBLE;;;;
+ 2565;BOX DRAWINGS DOWN DOUBLE AND HORIZONTAL SINGLE;So;0;ON;;;;;N;FORMS DOWN DOUBLE AND HORIZONTAL SINGLE;;;;
+ 2566;BOX DRAWINGS DOUBLE DOWN AND HORIZONTAL;So;0;ON;;;;;N;FORMS DOUBLE DOWN AND HORIZONTAL;;;;
+ 2567;BOX DRAWINGS UP SINGLE AND HORIZONTAL DOUBLE;So;0;ON;;;;;N;FORMS UP SINGLE AND HORIZONTAL DOUBLE;;;;
+ 2568;BOX DRAWINGS UP DOUBLE AND HORIZONTAL SINGLE;So;0;ON;;;;;N;FORMS UP DOUBLE AND HORIZONTAL SINGLE;;;;
+ 2569;BOX DRAWINGS DOUBLE UP AND HORIZONTAL;So;0;ON;;;;;N;FORMS DOUBLE UP AND HORIZONTAL;;;;
+ 256A;BOX DRAWINGS VERTICAL SINGLE AND HORIZONTAL DOUBLE;So;0;ON;;;;;N;FORMS VERTICAL SINGLE AND HORIZONTAL DOUBLE;;;;
+ 256B;BOX DRAWINGS VERTICAL DOUBLE AND HORIZONTAL SINGLE;So;0;ON;;;;;N;FORMS VERTICAL DOUBLE AND HORIZONTAL SINGLE;;;;
+ 256C;BOX DRAWINGS DOUBLE VERTICAL AND HORIZONTAL;So;0;ON;;;;;N;FORMS DOUBLE VERTICAL AND HORIZONTAL;;;;
+ 256D;BOX DRAWINGS LIGHT ARC DOWN AND RIGHT;So;0;ON;;;;;N;FORMS LIGHT ARC DOWN AND RIGHT;;;;
+ 256E;BOX DRAWINGS LIGHT ARC DOWN AND LEFT;So;0;ON;;;;;N;FORMS LIGHT ARC DOWN AND LEFT;;;;
+ 256F;BOX DRAWINGS LIGHT ARC UP AND LEFT;So;0;ON;;;;;N;FORMS LIGHT ARC UP AND LEFT;;;;
+ 2570;BOX DRAWINGS LIGHT ARC UP AND RIGHT;So;0;ON;;;;;N;FORMS LIGHT ARC UP AND RIGHT;;;;
+ 2571;BOX DRAWINGS LIGHT DIAGONAL UPPER RIGHT TO LOWER LEFT;So;0;ON;;;;;N;FORMS LIGHT DIAGONAL UPPER RIGHT TO LOWER LEFT;;;;
+ 2572;BOX DRAWINGS LIGHT DIAGONAL UPPER LEFT TO LOWER RIGHT;So;0;ON;;;;;N;FORMS LIGHT DIAGONAL UPPER LEFT TO LOWER RIGHT;;;;
+ 2573;BOX DRAWINGS LIGHT DIAGONAL CROSS;So;0;ON;;;;;N;FORMS LIGHT DIAGONAL CROSS;;;;
+ 2574;BOX DRAWINGS LIGHT LEFT;So;0;ON;;;;;N;FORMS LIGHT LEFT;;;;
+ 2575;BOX DRAWINGS LIGHT UP;So;0;ON;;;;;N;FORMS LIGHT UP;;;;
+ 2576;BOX DRAWINGS LIGHT RIGHT;So;0;ON;;;;;N;FORMS LIGHT RIGHT;;;;
+ 2577;BOX DRAWINGS LIGHT DOWN;So;0;ON;;;;;N;FORMS LIGHT DOWN;;;;
+ 2578;BOX DRAWINGS HEAVY LEFT;So;0;ON;;;;;N;FORMS HEAVY LEFT;;;;
+ 2579;BOX DRAWINGS HEAVY UP;So;0;ON;;;;;N;FORMS HEAVY UP;;;;
+ 257A;BOX DRAWINGS HEAVY RIGHT;So;0;ON;;;;;N;FORMS HEAVY RIGHT;;;;
+ 257B;BOX DRAWINGS HEAVY DOWN;So;0;ON;;;;;N;FORMS HEAVY DOWN;;;;
+ 257C;BOX DRAWINGS LIGHT LEFT AND HEAVY RIGHT;So;0;ON;;;;;N;FORMS LIGHT LEFT AND HEAVY RIGHT;;;;
+ 257D;BOX DRAWINGS LIGHT UP AND HEAVY DOWN;So;0;ON;;;;;N;FORMS LIGHT UP AND HEAVY DOWN;;;;
+ 257E;BOX DRAWINGS HEAVY LEFT AND LIGHT RIGHT;So;0;ON;;;;;N;FORMS HEAVY LEFT AND LIGHT RIGHT;;;;
+ 257F;BOX DRAWINGS HEAVY UP AND LIGHT DOWN;So;0;ON;;;;;N;FORMS HEAVY UP AND LIGHT DOWN;;;;
+ 2580;UPPER HALF BLOCK;So;0;ON;;;;;N;;;;;
+ 2581;LOWER ONE EIGHTH BLOCK;So;0;ON;;;;;N;;;;;
+ 2582;LOWER ONE QUARTER BLOCK;So;0;ON;;;;;N;;;;;
+ 2583;LOWER THREE EIGHTHS BLOCK;So;0;ON;;;;;N;;;;;
+ 2584;LOWER HALF BLOCK;So;0;ON;;;;;N;;;;;
+ 2585;LOWER FIVE EIGHTHS BLOCK;So;0;ON;;;;;N;;;;;
+ 2586;LOWER THREE QUARTERS BLOCK;So;0;ON;;;;;N;LOWER THREE QUARTER BLOCK;;;;
+ 2587;LOWER SEVEN EIGHTHS BLOCK;So;0;ON;;;;;N;;;;;
+ 2588;FULL BLOCK;So;0;ON;;;;;N;;;;;
+ 2589;LEFT SEVEN EIGHTHS BLOCK;So;0;ON;;;;;N;;;;;
+ 258A;LEFT THREE QUARTERS BLOCK;So;0;ON;;;;;N;LEFT THREE QUARTER BLOCK;;;;
+ 258B;LEFT FIVE EIGHTHS BLOCK;So;0;ON;;;;;N;;;;;
+ 258C;LEFT HALF BLOCK;So;0;ON;;;;;N;;;;;
+ 258D;LEFT THREE EIGHTHS BLOCK;So;0;ON;;;;;N;;;;;
+ 258E;LEFT ONE QUARTER BLOCK;So;0;ON;;;;;N;;;;;
+ 258F;LEFT ONE EIGHTH BLOCK;So;0;ON;;;;;N;;;;;
+ 2590;RIGHT HALF BLOCK;So;0;ON;;;;;N;;;;;
+ 2591;LIGHT SHADE;So;0;ON;;;;;N;;;;;
+ 2592;MEDIUM SHADE;So;0;ON;;;;;N;;;;;
+ 2593;DARK SHADE;So;0;ON;;;;;N;;;;;
+ 2594;UPPER ONE EIGHTH BLOCK;So;0;ON;;;;;N;;;;;
+ 2595;RIGHT ONE EIGHTH BLOCK;So;0;ON;;;;;N;;;;;
+ 2596;QUADRANT LOWER LEFT;So;0;ON;;;;;N;;;;;
+ 2597;QUADRANT LOWER RIGHT;So;0;ON;;;;;N;;;;;
+ 2598;QUADRANT UPPER LEFT;So;0;ON;;;;;N;;;;;
+ 2599;QUADRANT UPPER LEFT AND LOWER LEFT AND LOWER RIGHT;So;0;ON;;;;;N;;;;;
+ 259A;QUADRANT UPPER LEFT AND LOWER RIGHT;So;0;ON;;;;;N;;;;;
+ 259B;QUADRANT UPPER LEFT AND UPPER RIGHT AND LOWER LEFT;So;0;ON;;;;;N;;;;;
+ 259C;QUADRANT UPPER LEFT AND UPPER RIGHT AND LOWER RIGHT;So;0;ON;;;;;N;;;;;
+ 259D;QUADRANT UPPER RIGHT;So;0;ON;;;;;N;;;;;
+ 259E;QUADRANT UPPER RIGHT AND LOWER LEFT;So;0;ON;;;;;N;;;;;
+ 259F;QUADRANT UPPER RIGHT AND LOWER LEFT AND LOWER RIGHT;So;0;ON;;;;;N;;;;;
+ 25A0;BLACK SQUARE;So;0;ON;;;;;N;;;;;
+ 25A1;WHITE SQUARE;So;0;ON;;;;;N;;;;;
+ 25A2;WHITE SQUARE WITH ROUNDED CORNERS;So;0;ON;;;;;N;;;;;
+ 25A3;WHITE SQUARE CONTAINING BLACK SMALL SQUARE;So;0;ON;;;;;N;;;;;
+ 25A4;SQUARE WITH HORIZONTAL FILL;So;0;ON;;;;;N;;;;;
+ 25A5;SQUARE WITH VERTICAL FILL;So;0;ON;;;;;N;;;;;
+ 25A6;SQUARE WITH ORTHOGONAL CROSSHATCH FILL;So;0;ON;;;;;N;;;;;
+ 25A7;SQUARE WITH UPPER LEFT TO LOWER RIGHT FILL;So;0;ON;;;;;N;;;;;
+ 25A8;SQUARE WITH UPPER RIGHT TO LOWER LEFT FILL;So;0;ON;;;;;N;;;;;
+ 25A9;SQUARE WITH DIAGONAL CROSSHATCH FILL;So;0;ON;;;;;N;;;;;
+ 25AA;BLACK SMALL SQUARE;So;0;ON;;;;;N;;;;;
+ 25AB;WHITE SMALL SQUARE;So;0;ON;;;;;N;;;;;
+ 25AC;BLACK RECTANGLE;So;0;ON;;;;;N;;;;;
+ 25AD;WHITE RECTANGLE;So;0;ON;;;;;N;;;;;
+ 25AE;BLACK VERTICAL RECTANGLE;So;0;ON;;;;;N;;;;;
+ 25AF;WHITE VERTICAL RECTANGLE;So;0;ON;;;;;N;;;;;
+ 25B0;BLACK PARALLELOGRAM;So;0;ON;;;;;N;;;;;
+ 25B1;WHITE PARALLELOGRAM;So;0;ON;;;;;N;;;;;
+ 25B2;BLACK UP-POINTING TRIANGLE;So;0;ON;;;;;N;BLACK UP POINTING TRIANGLE;;;;
+ 25B3;WHITE UP-POINTING TRIANGLE;So;0;ON;;;;;N;WHITE UP POINTING TRIANGLE;;;;
+ 25B4;BLACK UP-POINTING SMALL TRIANGLE;So;0;ON;;;;;N;BLACK UP POINTING SMALL TRIANGLE;;;;
+ 25B5;WHITE UP-POINTING SMALL TRIANGLE;So;0;ON;;;;;N;WHITE UP POINTING SMALL TRIANGLE;;;;
+ 25B6;BLACK RIGHT-POINTING TRIANGLE;So;0;ON;;;;;N;BLACK RIGHT POINTING TRIANGLE;;;;
+ 25B7;WHITE RIGHT-POINTING TRIANGLE;Sm;0;ON;;;;;N;WHITE RIGHT POINTING TRIANGLE;;;;
+ 25B8;BLACK RIGHT-POINTING SMALL TRIANGLE;So;0;ON;;;;;N;BLACK RIGHT POINTING SMALL TRIANGLE;;;;
+ 25B9;WHITE RIGHT-POINTING SMALL TRIANGLE;So;0;ON;;;;;N;WHITE RIGHT POINTING SMALL TRIANGLE;;;;
+ 25BA;BLACK RIGHT-POINTING POINTER;So;0;ON;;;;;N;BLACK RIGHT POINTING POINTER;;;;
+ 25BB;WHITE RIGHT-POINTING POINTER;So;0;ON;;;;;N;WHITE RIGHT POINTING POINTER;;;;
+ 25BC;BLACK DOWN-POINTING TRIANGLE;So;0;ON;;;;;N;BLACK DOWN POINTING TRIANGLE;;;;
+ 25BD;WHITE DOWN-POINTING TRIANGLE;So;0;ON;;;;;N;WHITE DOWN POINTING TRIANGLE;;;;
+ 25BE;BLACK DOWN-POINTING SMALL TRIANGLE;So;0;ON;;;;;N;BLACK DOWN POINTING SMALL TRIANGLE;;;;
+ 25BF;WHITE DOWN-POINTING SMALL TRIANGLE;So;0;ON;;;;;N;WHITE DOWN POINTING SMALL TRIANGLE;;;;
+ 25C0;BLACK LEFT-POINTING TRIANGLE;So;0;ON;;;;;N;BLACK LEFT POINTING TRIANGLE;;;;
+ 25C1;WHITE LEFT-POINTING TRIANGLE;Sm;0;ON;;;;;N;WHITE LEFT POINTING TRIANGLE;;;;
+ 25C2;BLACK LEFT-POINTING SMALL TRIANGLE;So;0;ON;;;;;N;BLACK LEFT POINTING SMALL TRIANGLE;;;;
+ 25C3;WHITE LEFT-POINTING SMALL TRIANGLE;So;0;ON;;;;;N;WHITE LEFT POINTING SMALL TRIANGLE;;;;
+ 25C4;BLACK LEFT-POINTING POINTER;So;0;ON;;;;;N;BLACK LEFT POINTING POINTER;;;;
+ 25C5;WHITE LEFT-POINTING POINTER;So;0;ON;;;;;N;WHITE LEFT POINTING POINTER;;;;
+ 25C6;BLACK DIAMOND;So;0;ON;;;;;N;;;;;
+ 25C7;WHITE DIAMOND;So;0;ON;;;;;N;;;;;
+ 25C8;WHITE DIAMOND CONTAINING BLACK SMALL DIAMOND;So;0;ON;;;;;N;;;;;
+ 25C9;FISHEYE;So;0;ON;;;;;N;;;;;
+ 25CA;LOZENGE;So;0;ON;;;;;N;;;;;
+ 25CB;WHITE CIRCLE;So;0;ON;;;;;N;;;;;
+ 25CC;DOTTED CIRCLE;So;0;ON;;;;;N;;;;;
+ 25CD;CIRCLE WITH VERTICAL FILL;So;0;ON;;;;;N;;;;;
+ 25CE;BULLSEYE;So;0;ON;;;;;N;;;;;
+ 25CF;BLACK CIRCLE;So;0;ON;;;;;N;;;;;
+ 25D0;CIRCLE WITH LEFT HALF BLACK;So;0;ON;;;;;N;;;;;
+ 25D1;CIRCLE WITH RIGHT HALF BLACK;So;0;ON;;;;;N;;;;;
+ 25D2;CIRCLE WITH LOWER HALF BLACK;So;0;ON;;;;;N;;;;;
+ 25D3;CIRCLE WITH UPPER HALF BLACK;So;0;ON;;;;;N;;;;;
+ 25D4;CIRCLE WITH UPPER RIGHT QUADRANT BLACK;So;0;ON;;;;;N;;;;;
+ 25D5;CIRCLE WITH ALL BUT UPPER LEFT QUADRANT BLACK;So;0;ON;;;;;N;;;;;
+ 25D6;LEFT HALF BLACK CIRCLE;So;0;ON;;;;;N;;;;;
+ 25D7;RIGHT HALF BLACK CIRCLE;So;0;ON;;;;;N;;;;;
+ 25D8;INVERSE BULLET;So;0;ON;;;;;N;;;;;
+ 25D9;INVERSE WHITE CIRCLE;So;0;ON;;;;;N;;;;;
+ 25DA;UPPER HALF INVERSE WHITE CIRCLE;So;0;ON;;;;;N;;;;;
+ 25DB;LOWER HALF INVERSE WHITE CIRCLE;So;0;ON;;;;;N;;;;;
+ 25DC;UPPER LEFT QUADRANT CIRCULAR ARC;So;0;ON;;;;;N;;;;;
+ 25DD;UPPER RIGHT QUADRANT CIRCULAR ARC;So;0;ON;;;;;N;;;;;
+ 25DE;LOWER RIGHT QUADRANT CIRCULAR ARC;So;0;ON;;;;;N;;;;;
+ 25DF;LOWER LEFT QUADRANT CIRCULAR ARC;So;0;ON;;;;;N;;;;;
+ 25E0;UPPER HALF CIRCLE;So;0;ON;;;;;N;;;;;
+ 25E1;LOWER HALF CIRCLE;So;0;ON;;;;;N;;;;;
+ 25E2;BLACK LOWER RIGHT TRIANGLE;So;0;ON;;;;;N;;;;;
+ 25E3;BLACK LOWER LEFT TRIANGLE;So;0;ON;;;;;N;;;;;
+ 25E4;BLACK UPPER LEFT TRIANGLE;So;0;ON;;;;;N;;;;;
+ 25E5;BLACK UPPER RIGHT TRIANGLE;So;0;ON;;;;;N;;;;;
+ 25E6;WHITE BULLET;So;0;ON;;;;;N;;;;;
+ 25E7;SQUARE WITH LEFT HALF BLACK;So;0;ON;;;;;N;;;;;
+ 25E8;SQUARE WITH RIGHT HALF BLACK;So;0;ON;;;;;N;;;;;
+ 25E9;SQUARE WITH UPPER LEFT DIAGONAL HALF BLACK;So;0;ON;;;;;N;;;;;
+ 25EA;SQUARE WITH LOWER RIGHT DIAGONAL HALF BLACK;So;0;ON;;;;;N;;;;;
+ 25EB;WHITE SQUARE WITH VERTICAL BISECTING LINE;So;0;ON;;;;;N;;;;;
+ 25EC;WHITE UP-POINTING TRIANGLE WITH DOT;So;0;ON;;;;;N;WHITE UP POINTING TRIANGLE WITH DOT;;;;
+ 25ED;UP-POINTING TRIANGLE WITH LEFT HALF BLACK;So;0;ON;;;;;N;UP POINTING TRIANGLE WITH LEFT HALF BLACK;;;;
+ 25EE;UP-POINTING TRIANGLE WITH RIGHT HALF BLACK;So;0;ON;;;;;N;UP POINTING TRIANGLE WITH RIGHT HALF BLACK;;;;
+ 25EF;LARGE CIRCLE;So;0;ON;;;;;N;;;;;
+ 25F0;WHITE SQUARE WITH UPPER LEFT QUADRANT;So;0;ON;;;;;N;;;;;
+ 25F1;WHITE SQUARE WITH LOWER LEFT QUADRANT;So;0;ON;;;;;N;;;;;
+ 25F2;WHITE SQUARE WITH LOWER RIGHT QUADRANT;So;0;ON;;;;;N;;;;;
+ 25F3;WHITE SQUARE WITH UPPER RIGHT QUADRANT;So;0;ON;;;;;N;;;;;
+ 25F4;WHITE CIRCLE WITH UPPER LEFT QUADRANT;So;0;ON;;;;;N;;;;;
+ 25F5;WHITE CIRCLE WITH LOWER LEFT QUADRANT;So;0;ON;;;;;N;;;;;
+ 25F6;WHITE CIRCLE WITH LOWER RIGHT QUADRANT;So;0;ON;;;;;N;;;;;
+ 25F7;WHITE CIRCLE WITH UPPER RIGHT QUADRANT;So;0;ON;;;;;N;;;;;
+ 25F8;UPPER LEFT TRIANGLE;Sm;0;ON;;;;;N;;;;;
+ 25F9;UPPER RIGHT TRIANGLE;Sm;0;ON;;;;;N;;;;;
+ 25FA;LOWER LEFT TRIANGLE;Sm;0;ON;;;;;N;;;;;
+ 25FB;WHITE MEDIUM SQUARE;Sm;0;ON;;;;;N;;;;;
+ 25FC;BLACK MEDIUM SQUARE;Sm;0;ON;;;;;N;;;;;
+ 25FD;WHITE MEDIUM SMALL SQUARE;Sm;0;ON;;;;;N;;;;;
+ 25FE;BLACK MEDIUM SMALL SQUARE;Sm;0;ON;;;;;N;;;;;
+ 25FF;LOWER RIGHT TRIANGLE;Sm;0;ON;;;;;N;;;;;
+ 2600;BLACK SUN WITH RAYS;So;0;ON;;;;;N;;;;;
+ 2601;CLOUD;So;0;ON;;;;;N;;;;;
+ 2602;UMBRELLA;So;0;ON;;;;;N;;;;;
+ 2603;SNOWMAN;So;0;ON;;;;;N;;;;;
+ 2604;COMET;So;0;ON;;;;;N;;;;;
+ 2605;BLACK STAR;So;0;ON;;;;;N;;;;;
+ 2606;WHITE STAR;So;0;ON;;;;;N;;;;;
+ 2607;LIGHTNING;So;0;ON;;;;;N;;;;;
+ 2608;THUNDERSTORM;So;0;ON;;;;;N;;;;;
+ 2609;SUN;So;0;ON;;;;;N;;;;;
+ 260A;ASCENDING NODE;So;0;ON;;;;;N;;;;;
+ 260B;DESCENDING NODE;So;0;ON;;;;;N;;;;;
+ 260C;CONJUNCTION;So;0;ON;;;;;N;;;;;
+ 260D;OPPOSITION;So;0;ON;;;;;N;;;;;
+ 260E;BLACK TELEPHONE;So;0;ON;;;;;N;;;;;
+ 260F;WHITE TELEPHONE;So;0;ON;;;;;N;;;;;
+ 2610;BALLOT BOX;So;0;ON;;;;;N;;;;;
+ 2611;BALLOT BOX WITH CHECK;So;0;ON;;;;;N;;;;;
+ 2612;BALLOT BOX WITH X;So;0;ON;;;;;N;;;;;
+ 2613;SALTIRE;So;0;ON;;;;;N;;;;;
+ 2614;UMBRELLA WITH RAIN DROPS;So;0;ON;;;;;N;;;;;
+ 2615;HOT BEVERAGE;So;0;ON;;;;;N;;;;;
+ 2616;WHITE SHOGI PIECE;So;0;ON;;;;;N;;;;;
+ 2617;BLACK SHOGI PIECE;So;0;ON;;;;;N;;;;;
+ 2618;SHAMROCK;So;0;ON;;;;;N;;;;;
+ 2619;REVERSED ROTATED FLORAL HEART BULLET;So;0;ON;;;;;N;;;;;
+ 261A;BLACK LEFT POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 261B;BLACK RIGHT POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 261C;WHITE LEFT POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 261D;WHITE UP POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 261E;WHITE RIGHT POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 261F;WHITE DOWN POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 2620;SKULL AND CROSSBONES;So;0;ON;;;;;N;;;;;
+ 2621;CAUTION SIGN;So;0;ON;;;;;N;;;;;
+ 2622;RADIOACTIVE SIGN;So;0;ON;;;;;N;;;;;
+ 2623;BIOHAZARD SIGN;So;0;ON;;;;;N;;;;;
+ 2624;CADUCEUS;So;0;ON;;;;;N;;;;;
+ 2625;ANKH;So;0;ON;;;;;N;;;;;
+ 2626;ORTHODOX CROSS;So;0;ON;;;;;N;;;;;
+ 2627;CHI RHO;So;0;ON;;;;;N;;;;;
+ 2628;CROSS OF LORRAINE;So;0;ON;;;;;N;;;;;
+ 2629;CROSS OF JERUSALEM;So;0;ON;;;;;N;;;;;
+ 262A;STAR AND CRESCENT;So;0;ON;;;;;N;;;;;
+ 262B;FARSI SYMBOL;So;0;ON;;;;;N;SYMBOL OF IRAN;;;;
+ 262C;ADI SHAKTI;So;0;ON;;;;;N;;;;;
+ 262D;HAMMER AND SICKLE;So;0;ON;;;;;N;;;;;
+ 262E;PEACE SYMBOL;So;0;ON;;;;;N;;;;;
+ 262F;YIN YANG;So;0;ON;;;;;N;;;;;
+ 2630;TRIGRAM FOR HEAVEN;So;0;ON;;;;;N;;;;;
+ 2631;TRIGRAM FOR LAKE;So;0;ON;;;;;N;;;;;
+ 2632;TRIGRAM FOR FIRE;So;0;ON;;;;;N;;;;;
+ 2633;TRIGRAM FOR THUNDER;So;0;ON;;;;;N;;;;;
+ 2634;TRIGRAM FOR WIND;So;0;ON;;;;;N;;;;;
+ 2635;TRIGRAM FOR WATER;So;0;ON;;;;;N;;;;;
+ 2636;TRIGRAM FOR MOUNTAIN;So;0;ON;;;;;N;;;;;
+ 2637;TRIGRAM FOR EARTH;So;0;ON;;;;;N;;;;;
+ 2638;WHEEL OF DHARMA;So;0;ON;;;;;N;;;;;
+ 2639;WHITE FROWNING FACE;So;0;ON;;;;;N;;;;;
+ 263A;WHITE SMILING FACE;So;0;ON;;;;;N;;;;;
+ 263B;BLACK SMILING FACE;So;0;ON;;;;;N;;;;;
+ 263C;WHITE SUN WITH RAYS;So;0;ON;;;;;N;;;;;
+ 263D;FIRST QUARTER MOON;So;0;ON;;;;;N;;;;;
+ 263E;LAST QUARTER MOON;So;0;ON;;;;;N;;;;;
+ 263F;MERCURY;So;0;ON;;;;;N;;;;;
+ 2640;FEMALE SIGN;So;0;ON;;;;;N;;;;;
+ 2641;EARTH;So;0;ON;;;;;N;;;;;
+ 2642;MALE SIGN;So;0;ON;;;;;N;;;;;
+ 2643;JUPITER;So;0;ON;;;;;N;;;;;
+ 2644;SATURN;So;0;ON;;;;;N;;;;;
+ 2645;URANUS;So;0;ON;;;;;N;;;;;
+ 2646;NEPTUNE;So;0;ON;;;;;N;;;;;
+ 2647;PLUTO;So;0;ON;;;;;N;;;;;
+ 2648;ARIES;So;0;ON;;;;;N;;;;;
+ 2649;TAURUS;So;0;ON;;;;;N;;;;;
+ 264A;GEMINI;So;0;ON;;;;;N;;;;;
+ 264B;CANCER;So;0;ON;;;;;N;;;;;
+ 264C;LEO;So;0;ON;;;;;N;;;;;
+ 264D;VIRGO;So;0;ON;;;;;N;;;;;
+ 264E;LIBRA;So;0;ON;;;;;N;;;;;
+ 264F;SCORPIUS;So;0;ON;;;;;N;;;;;
+ 2650;SAGITTARIUS;So;0;ON;;;;;N;;;;;
+ 2651;CAPRICORN;So;0;ON;;;;;N;;;;;
+ 2652;AQUARIUS;So;0;ON;;;;;N;;;;;
+ 2653;PISCES;So;0;ON;;;;;N;;;;;
+ 2654;WHITE CHESS KING;So;0;ON;;;;;N;;;;;
+ 2655;WHITE CHESS QUEEN;So;0;ON;;;;;N;;;;;
+ 2656;WHITE CHESS ROOK;So;0;ON;;;;;N;;;;;
+ 2657;WHITE CHESS BISHOP;So;0;ON;;;;;N;;;;;
+ 2658;WHITE CHESS KNIGHT;So;0;ON;;;;;N;;;;;
+ 2659;WHITE CHESS PAWN;So;0;ON;;;;;N;;;;;
+ 265A;BLACK CHESS KING;So;0;ON;;;;;N;;;;;
+ 265B;BLACK CHESS QUEEN;So;0;ON;;;;;N;;;;;
+ 265C;BLACK CHESS ROOK;So;0;ON;;;;;N;;;;;
+ 265D;BLACK CHESS BISHOP;So;0;ON;;;;;N;;;;;
+ 265E;BLACK CHESS KNIGHT;So;0;ON;;;;;N;;;;;
+ 265F;BLACK CHESS PAWN;So;0;ON;;;;;N;;;;;
+ 2660;BLACK SPADE SUIT;So;0;ON;;;;;N;;;;;
+ 2661;WHITE HEART SUIT;So;0;ON;;;;;N;;;;;
+ 2662;WHITE DIAMOND SUIT;So;0;ON;;;;;N;;;;;
+ 2663;BLACK CLUB SUIT;So;0;ON;;;;;N;;;;;
+ 2664;WHITE SPADE SUIT;So;0;ON;;;;;N;;;;;
+ 2665;BLACK HEART SUIT;So;0;ON;;;;;N;;;;;
+ 2666;BLACK DIAMOND SUIT;So;0;ON;;;;;N;;;;;
+ 2667;WHITE CLUB SUIT;So;0;ON;;;;;N;;;;;
+ 2668;HOT SPRINGS;So;0;ON;;;;;N;;;;;
+ 2669;QUARTER NOTE;So;0;ON;;;;;N;;;;;
+ 266A;EIGHTH NOTE;So;0;ON;;;;;N;;;;;
+ 266B;BEAMED EIGHTH NOTES;So;0;ON;;;;;N;BARRED EIGHTH NOTES;;;;
+ 266C;BEAMED SIXTEENTH NOTES;So;0;ON;;;;;N;BARRED SIXTEENTH NOTES;;;;
+ 266D;MUSIC FLAT SIGN;So;0;ON;;;;;N;FLAT;;;;
+ 266E;MUSIC NATURAL SIGN;So;0;ON;;;;;N;NATURAL;;;;
+ 266F;MUSIC SHARP SIGN;Sm;0;ON;;;;;N;SHARP;;;;
+ 2670;WEST SYRIAC CROSS;So;0;ON;;;;;N;;;;;
+ 2671;EAST SYRIAC CROSS;So;0;ON;;;;;N;;;;;
+ 2672;UNIVERSAL RECYCLING SYMBOL;So;0;ON;;;;;N;;;;;
+ 2673;RECYCLING SYMBOL FOR TYPE-1 PLASTICS;So;0;ON;;;;;N;;;;;
+ 2674;RECYCLING SYMBOL FOR TYPE-2 PLASTICS;So;0;ON;;;;;N;;;;;
+ 2675;RECYCLING SYMBOL FOR TYPE-3 PLASTICS;So;0;ON;;;;;N;;;;;
+ 2676;RECYCLING SYMBOL FOR TYPE-4 PLASTICS;So;0;ON;;;;;N;;;;;
+ 2677;RECYCLING SYMBOL FOR TYPE-5 PLASTICS;So;0;ON;;;;;N;;;;;
+ 2678;RECYCLING SYMBOL FOR TYPE-6 PLASTICS;So;0;ON;;;;;N;;;;;
+ 2679;RECYCLING SYMBOL FOR TYPE-7 PLASTICS;So;0;ON;;;;;N;;;;;
+ 267A;RECYCLING SYMBOL FOR GENERIC MATERIALS;So;0;ON;;;;;N;;;;;
+ 267B;BLACK UNIVERSAL RECYCLING SYMBOL;So;0;ON;;;;;N;;;;;
+ 267C;RECYCLED PAPER SYMBOL;So;0;ON;;;;;N;;;;;
+ 267D;PARTIALLY-RECYCLED PAPER SYMBOL;So;0;ON;;;;;N;;;;;
+ 267E;PERMANENT PAPER SIGN;So;0;ON;;;;;N;;;;;
+ 267F;WHEELCHAIR SYMBOL;So;0;ON;;;;;N;;;;;
+ 2680;DIE FACE-1;So;0;ON;;;;;N;;;;;
+ 2681;DIE FACE-2;So;0;ON;;;;;N;;;;;
+ 2682;DIE FACE-3;So;0;ON;;;;;N;;;;;
+ 2683;DIE FACE-4;So;0;ON;;;;;N;;;;;
+ 2684;DIE FACE-5;So;0;ON;;;;;N;;;;;
+ 2685;DIE FACE-6;So;0;ON;;;;;N;;;;;
+ 2686;WHITE CIRCLE WITH DOT RIGHT;So;0;ON;;;;;N;;;;;
+ 2687;WHITE CIRCLE WITH TWO DOTS;So;0;ON;;;;;N;;;;;
+ 2688;BLACK CIRCLE WITH WHITE DOT RIGHT;So;0;ON;;;;;N;;;;;
+ 2689;BLACK CIRCLE WITH TWO WHITE DOTS;So;0;ON;;;;;N;;;;;
+ 268A;MONOGRAM FOR YANG;So;0;ON;;;;;N;;;;;
+ 268B;MONOGRAM FOR YIN;So;0;ON;;;;;N;;;;;
+ 268C;DIGRAM FOR GREATER YANG;So;0;ON;;;;;N;;;;;
+ 268D;DIGRAM FOR LESSER YIN;So;0;ON;;;;;N;;;;;
+ 268E;DIGRAM FOR LESSER YANG;So;0;ON;;;;;N;;;;;
+ 268F;DIGRAM FOR GREATER YIN;So;0;ON;;;;;N;;;;;
+ 2690;WHITE FLAG;So;0;ON;;;;;N;;;;;
+ 2691;BLACK FLAG;So;0;ON;;;;;N;;;;;
+ 2692;HAMMER AND PICK;So;0;ON;;;;;N;;;;;
+ 2693;ANCHOR;So;0;ON;;;;;N;;;;;
+ 2694;CROSSED SWORDS;So;0;ON;;;;;N;;;;;
+ 2695;STAFF OF AESCULAPIUS;So;0;ON;;;;;N;;;;;
+ 2696;SCALES;So;0;ON;;;;;N;;;;;
+ 2697;ALEMBIC;So;0;ON;;;;;N;;;;;
+ 2698;FLOWER;So;0;ON;;;;;N;;;;;
+ 2699;GEAR;So;0;ON;;;;;N;;;;;
+ 269A;STAFF OF HERMES;So;0;ON;;;;;N;;;;;
+ 269B;ATOM SYMBOL;So;0;ON;;;;;N;;;;;
+ 269C;FLEUR-DE-LIS;So;0;ON;;;;;N;;;;;
+ 269D;OUTLINED WHITE STAR;So;0;ON;;;;;N;;;;;
+ 269E;THREE LINES CONVERGING RIGHT;So;0;ON;;;;;N;;;;;
+ 269F;THREE LINES CONVERGING LEFT;So;0;ON;;;;;N;;;;;
+ 26A0;WARNING SIGN;So;0;ON;;;;;N;;;;;
+ 26A1;HIGH VOLTAGE SIGN;So;0;ON;;;;;N;;;;;
+ 26A2;DOUBLED FEMALE SIGN;So;0;ON;;;;;N;;;;;
+ 26A3;DOUBLED MALE SIGN;So;0;ON;;;;;N;;;;;
+ 26A4;INTERLOCKED FEMALE AND MALE SIGN;So;0;ON;;;;;N;;;;;
+ 26A5;MALE AND FEMALE SIGN;So;0;ON;;;;;N;;;;;
+ 26A6;MALE WITH STROKE SIGN;So;0;ON;;;;;N;;;;;
+ 26A7;MALE WITH STROKE AND MALE AND FEMALE SIGN;So;0;ON;;;;;N;;;;;
+ 26A8;VERTICAL MALE WITH STROKE SIGN;So;0;ON;;;;;N;;;;;
+ 26A9;HORIZONTAL MALE WITH STROKE SIGN;So;0;ON;;;;;N;;;;;
+ 26AA;MEDIUM WHITE CIRCLE;So;0;ON;;;;;N;;;;;
+ 26AB;MEDIUM BLACK CIRCLE;So;0;ON;;;;;N;;;;;
+ 26AC;MEDIUM SMALL WHITE CIRCLE;So;0;L;;;;;N;;;;;
+ 26AD;MARRIAGE SYMBOL;So;0;ON;;;;;N;;;;;
+ 26AE;DIVORCE SYMBOL;So;0;ON;;;;;N;;;;;
+ 26AF;UNMARRIED PARTNERSHIP SYMBOL;So;0;ON;;;;;N;;;;;
+ 26B0;COFFIN;So;0;ON;;;;;N;;;;;
+ 26B1;FUNERAL URN;So;0;ON;;;;;N;;;;;
+ 26B2;NEUTER;So;0;ON;;;;;N;;;;;
+ 26B3;CERES;So;0;ON;;;;;N;;;;;
+ 26B4;PALLAS;So;0;ON;;;;;N;;;;;
+ 26B5;JUNO;So;0;ON;;;;;N;;;;;
+ 26B6;VESTA;So;0;ON;;;;;N;;;;;
+ 26B7;CHIRON;So;0;ON;;;;;N;;;;;
+ 26B8;BLACK MOON LILITH;So;0;ON;;;;;N;;;;;
+ 26B9;SEXTILE;So;0;ON;;;;;N;;;;;
+ 26BA;SEMISEXTILE;So;0;ON;;;;;N;;;;;
+ 26BB;QUINCUNX;So;0;ON;;;;;N;;;;;
+ 26BC;SESQUIQUADRATE;So;0;ON;;;;;N;;;;;
+ 26BD;SOCCER BALL;So;0;ON;;;;;N;;;;;
+ 26BE;BASEBALL;So;0;ON;;;;;N;;;;;
+ 26BF;SQUARED KEY;So;0;ON;;;;;N;;;;;
+ 26C0;WHITE DRAUGHTS MAN;So;0;ON;;;;;N;;;;;
+ 26C1;WHITE DRAUGHTS KING;So;0;ON;;;;;N;;;;;
+ 26C2;BLACK DRAUGHTS MAN;So;0;ON;;;;;N;;;;;
+ 26C3;BLACK DRAUGHTS KING;So;0;ON;;;;;N;;;;;
+ 26C4;SNOWMAN WITHOUT SNOW;So;0;ON;;;;;N;;;;;
+ 26C5;SUN BEHIND CLOUD;So;0;ON;;;;;N;;;;;
+ 26C6;RAIN;So;0;ON;;;;;N;;;;;
+ 26C7;BLACK SNOWMAN;So;0;ON;;;;;N;;;;;
+ 26C8;THUNDER CLOUD AND RAIN;So;0;ON;;;;;N;;;;;
+ 26C9;TURNED WHITE SHOGI PIECE;So;0;ON;;;;;N;;;;;
+ 26CA;TURNED BLACK SHOGI PIECE;So;0;ON;;;;;N;;;;;
+ 26CB;WHITE DIAMOND IN SQUARE;So;0;ON;;;;;N;;;;;
+ 26CC;CROSSING LANES;So;0;ON;;;;;N;;;;;
+ 26CD;DISABLED CAR;So;0;ON;;;;;N;;;;;
+ 26CE;OPHIUCHUS;So;0;ON;;;;;N;;;;;
+ 26CF;PICK;So;0;ON;;;;;N;;;;;
+ 26D0;CAR SLIDING;So;0;ON;;;;;N;;;;;
+ 26D1;HELMET WITH WHITE CROSS;So;0;ON;;;;;N;;;;;
+ 26D2;CIRCLED CROSSING LANES;So;0;ON;;;;;N;;;;;
+ 26D3;CHAINS;So;0;ON;;;;;N;;;;;
+ 26D4;NO ENTRY;So;0;ON;;;;;N;;;;;
+ 26D5;ALTERNATE ONE-WAY LEFT WAY TRAFFIC;So;0;ON;;;;;N;;;;;
+ 26D6;BLACK TWO-WAY LEFT WAY TRAFFIC;So;0;ON;;;;;N;;;;;
+ 26D7;WHITE TWO-WAY LEFT WAY TRAFFIC;So;0;ON;;;;;N;;;;;
+ 26D8;BLACK LEFT LANE MERGE;So;0;ON;;;;;N;;;;;
+ 26D9;WHITE LEFT LANE MERGE;So;0;ON;;;;;N;;;;;
+ 26DA;DRIVE SLOW SIGN;So;0;ON;;;;;N;;;;;
+ 26DB;HEAVY WHITE DOWN-POINTING TRIANGLE;So;0;ON;;;;;N;;;;;
+ 26DC;LEFT CLOSED ENTRY;So;0;ON;;;;;N;;;;;
+ 26DD;SQUARED SALTIRE;So;0;ON;;;;;N;;;;;
+ 26DE;FALLING DIAGONAL IN WHITE CIRCLE IN BLACK SQUARE;So;0;ON;;;;;N;;;;;
+ 26DF;BLACK TRUCK;So;0;ON;;;;;N;;;;;
+ 26E0;RESTRICTED LEFT ENTRY-1;So;0;ON;;;;;N;;;;;
+ 26E1;RESTRICTED LEFT ENTRY-2;So;0;ON;;;;;N;;;;;
+ 26E2;ASTRONOMICAL SYMBOL FOR URANUS;So;0;ON;;;;;N;;;;;
+ 26E3;HEAVY CIRCLE WITH STROKE AND TWO DOTS ABOVE;So;0;ON;;;;;N;;;;;
+ 26E4;PENTAGRAM;So;0;ON;;;;;N;;;;;
+ 26E5;RIGHT-HANDED INTERLACED PENTAGRAM;So;0;ON;;;;;N;;;;;
+ 26E6;LEFT-HANDED INTERLACED PENTAGRAM;So;0;ON;;;;;N;;;;;
+ 26E7;INVERTED PENTAGRAM;So;0;ON;;;;;N;;;;;
+ 26E8;BLACK CROSS ON SHIELD;So;0;ON;;;;;N;;;;;
+ 26E9;SHINTO SHRINE;So;0;ON;;;;;N;;;;;
+ 26EA;CHURCH;So;0;ON;;;;;N;;;;;
+ 26EB;CASTLE;So;0;ON;;;;;N;;;;;
+ 26EC;HISTORIC SITE;So;0;ON;;;;;N;;;;;
+ 26ED;GEAR WITHOUT HUB;So;0;ON;;;;;N;;;;;
+ 26EE;GEAR WITH HANDLES;So;0;ON;;;;;N;;;;;
+ 26EF;MAP SYMBOL FOR LIGHTHOUSE;So;0;ON;;;;;N;;;;;
+ 26F0;MOUNTAIN;So;0;ON;;;;;N;;;;;
+ 26F1;UMBRELLA ON GROUND;So;0;ON;;;;;N;;;;;
+ 26F2;FOUNTAIN;So;0;ON;;;;;N;;;;;
+ 26F3;FLAG IN HOLE;So;0;ON;;;;;N;;;;;
+ 26F4;FERRY;So;0;ON;;;;;N;;;;;
+ 26F5;SAILBOAT;So;0;ON;;;;;N;;;;;
+ 26F6;SQUARE FOUR CORNERS;So;0;ON;;;;;N;;;;;
+ 26F7;SKIER;So;0;ON;;;;;N;;;;;
+ 26F8;ICE SKATE;So;0;ON;;;;;N;;;;;
+ 26F9;PERSON WITH BALL;So;0;ON;;;;;N;;;;;
+ 26FA;TENT;So;0;ON;;;;;N;;;;;
+ 26FB;JAPANESE BANK SYMBOL;So;0;ON;;;;;N;;;;;
+ 26FC;HEADSTONE GRAVEYARD SYMBOL;So;0;ON;;;;;N;;;;;
+ 26FD;FUEL PUMP;So;0;ON;;;;;N;;;;;
+ 26FE;CUP ON BLACK SQUARE;So;0;ON;;;;;N;;;;;
+ 26FF;WHITE FLAG WITH HORIZONTAL MIDDLE BLACK STRIPE;So;0;ON;;;;;N;;;;;
+ 2700;BLACK SAFETY SCISSORS;So;0;ON;;;;;N;;;;;
+ 2701;UPPER BLADE SCISSORS;So;0;ON;;;;;N;;;;;
+ 2702;BLACK SCISSORS;So;0;ON;;;;;N;;;;;
+ 2703;LOWER BLADE SCISSORS;So;0;ON;;;;;N;;;;;
+ 2704;WHITE SCISSORS;So;0;ON;;;;;N;;;;;
+ 2705;WHITE HEAVY CHECK MARK;So;0;ON;;;;;N;;;;;
+ 2706;TELEPHONE LOCATION SIGN;So;0;ON;;;;;N;;;;;
+ 2707;TAPE DRIVE;So;0;ON;;;;;N;;;;;
+ 2708;AIRPLANE;So;0;ON;;;;;N;;;;;
+ 2709;ENVELOPE;So;0;ON;;;;;N;;;;;
+ 270A;RAISED FIST;So;0;ON;;;;;N;;;;;
+ 270B;RAISED HAND;So;0;ON;;;;;N;;;;;
+ 270C;VICTORY HAND;So;0;ON;;;;;N;;;;;
+ 270D;WRITING HAND;So;0;ON;;;;;N;;;;;
+ 270E;LOWER RIGHT PENCIL;So;0;ON;;;;;N;;;;;
+ 270F;PENCIL;So;0;ON;;;;;N;;;;;
+ 2710;UPPER RIGHT PENCIL;So;0;ON;;;;;N;;;;;
+ 2711;WHITE NIB;So;0;ON;;;;;N;;;;;
+ 2712;BLACK NIB;So;0;ON;;;;;N;;;;;
+ 2713;CHECK MARK;So;0;ON;;;;;N;;;;;
+ 2714;HEAVY CHECK MARK;So;0;ON;;;;;N;;;;;
+ 2715;MULTIPLICATION X;So;0;ON;;;;;N;;;;;
+ 2716;HEAVY MULTIPLICATION X;So;0;ON;;;;;N;;;;;
+ 2717;BALLOT X;So;0;ON;;;;;N;;;;;
+ 2718;HEAVY BALLOT X;So;0;ON;;;;;N;;;;;
+ 2719;OUTLINED GREEK CROSS;So;0;ON;;;;;N;;;;;
+ 271A;HEAVY GREEK CROSS;So;0;ON;;;;;N;;;;;
+ 271B;OPEN CENTRE CROSS;So;0;ON;;;;;N;OPEN CENTER CROSS;;;;
+ 271C;HEAVY OPEN CENTRE CROSS;So;0;ON;;;;;N;HEAVY OPEN CENTER CROSS;;;;
+ 271D;LATIN CROSS;So;0;ON;;;;;N;;;;;
+ 271E;SHADOWED WHITE LATIN CROSS;So;0;ON;;;;;N;;;;;
+ 271F;OUTLINED LATIN CROSS;So;0;ON;;;;;N;;;;;
+ 2720;MALTESE CROSS;So;0;ON;;;;;N;;;;;
+ 2721;STAR OF DAVID;So;0;ON;;;;;N;;;;;
+ 2722;FOUR TEARDROP-SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 2723;FOUR BALLOON-SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 2724;HEAVY FOUR BALLOON-SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 2725;FOUR CLUB-SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 2726;BLACK FOUR POINTED STAR;So;0;ON;;;;;N;;;;;
+ 2727;WHITE FOUR POINTED STAR;So;0;ON;;;;;N;;;;;
+ 2728;SPARKLES;So;0;ON;;;;;N;;;;;
+ 2729;STRESS OUTLINED WHITE STAR;So;0;ON;;;;;N;;;;;
+ 272A;CIRCLED WHITE STAR;So;0;ON;;;;;N;;;;;
+ 272B;OPEN CENTRE BLACK STAR;So;0;ON;;;;;N;OPEN CENTER BLACK STAR;;;;
+ 272C;BLACK CENTRE WHITE STAR;So;0;ON;;;;;N;BLACK CENTER WHITE STAR;;;;
+ 272D;OUTLINED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 272E;HEAVY OUTLINED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 272F;PINWHEEL STAR;So;0;ON;;;;;N;;;;;
+ 2730;SHADOWED WHITE STAR;So;0;ON;;;;;N;;;;;
+ 2731;HEAVY ASTERISK;So;0;ON;;;;;N;;;;;
+ 2732;OPEN CENTRE ASTERISK;So;0;ON;;;;;N;OPEN CENTER ASTERISK;;;;
+ 2733;EIGHT SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 2734;EIGHT POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 2735;EIGHT POINTED PINWHEEL STAR;So;0;ON;;;;;N;;;;;
+ 2736;SIX POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 2737;EIGHT POINTED RECTILINEAR BLACK STAR;So;0;ON;;;;;N;;;;;
+ 2738;HEAVY EIGHT POINTED RECTILINEAR BLACK STAR;So;0;ON;;;;;N;;;;;
+ 2739;TWELVE POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 273A;SIXTEEN POINTED ASTERISK;So;0;ON;;;;;N;;;;;
+ 273B;TEARDROP-SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 273C;OPEN CENTRE TEARDROP-SPOKED ASTERISK;So;0;ON;;;;;N;OPEN CENTER TEARDROP-SPOKED ASTERISK;;;;
+ 273D;HEAVY TEARDROP-SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 273E;SIX PETALLED BLACK AND WHITE FLORETTE;So;0;ON;;;;;N;;;;;
+ 273F;BLACK FLORETTE;So;0;ON;;;;;N;;;;;
+ 2740;WHITE FLORETTE;So;0;ON;;;;;N;;;;;
+ 2741;EIGHT PETALLED OUTLINED BLACK FLORETTE;So;0;ON;;;;;N;;;;;
+ 2742;CIRCLED OPEN CENTRE EIGHT POINTED STAR;So;0;ON;;;;;N;CIRCLED OPEN CENTER EIGHT POINTED STAR;;;;
+ 2743;HEAVY TEARDROP-SPOKED PINWHEEL ASTERISK;So;0;ON;;;;;N;;;;;
+ 2744;SNOWFLAKE;So;0;ON;;;;;N;;;;;
+ 2745;TIGHT TRIFOLIATE SNOWFLAKE;So;0;ON;;;;;N;;;;;
+ 2746;HEAVY CHEVRON SNOWFLAKE;So;0;ON;;;;;N;;;;;
+ 2747;SPARKLE;So;0;ON;;;;;N;;;;;
+ 2748;HEAVY SPARKLE;So;0;ON;;;;;N;;;;;
+ 2749;BALLOON-SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 274A;EIGHT TEARDROP-SPOKED PROPELLER ASTERISK;So;0;ON;;;;;N;;;;;
+ 274B;HEAVY EIGHT TEARDROP-SPOKED PROPELLER ASTERISK;So;0;ON;;;;;N;;;;;
+ 274C;CROSS MARK;So;0;ON;;;;;N;;;;;
+ 274D;SHADOWED WHITE CIRCLE;So;0;ON;;;;;N;;;;;
+ 274E;NEGATIVE SQUARED CROSS MARK;So;0;ON;;;;;N;;;;;
+ 274F;LOWER RIGHT DROP-SHADOWED WHITE SQUARE;So;0;ON;;;;;N;;;;;
+ 2750;UPPER RIGHT DROP-SHADOWED WHITE SQUARE;So;0;ON;;;;;N;;;;;
+ 2751;LOWER RIGHT SHADOWED WHITE SQUARE;So;0;ON;;;;;N;;;;;
+ 2752;UPPER RIGHT SHADOWED WHITE SQUARE;So;0;ON;;;;;N;;;;;
+ 2753;BLACK QUESTION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 2754;WHITE QUESTION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 2755;WHITE EXCLAMATION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 2756;BLACK DIAMOND MINUS WHITE X;So;0;ON;;;;;N;;;;;
+ 2757;HEAVY EXCLAMATION MARK SYMBOL;So;0;ON;;;;;N;;;;;
+ 2758;LIGHT VERTICAL BAR;So;0;ON;;;;;N;;;;;
+ 2759;MEDIUM VERTICAL BAR;So;0;ON;;;;;N;;;;;
+ 275A;HEAVY VERTICAL BAR;So;0;ON;;;;;N;;;;;
+ 275B;HEAVY SINGLE TURNED COMMA QUOTATION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 275C;HEAVY SINGLE COMMA QUOTATION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 275D;HEAVY DOUBLE TURNED COMMA QUOTATION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 275E;HEAVY DOUBLE COMMA QUOTATION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 275F;HEAVY LOW SINGLE COMMA QUOTATION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 2760;HEAVY LOW DOUBLE COMMA QUOTATION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 2761;CURVED STEM PARAGRAPH SIGN ORNAMENT;So;0;ON;;;;;N;;;;;
+ 2762;HEAVY EXCLAMATION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 2763;HEAVY HEART EXCLAMATION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 2764;HEAVY BLACK HEART;So;0;ON;;;;;N;;;;;
+ 2765;ROTATED HEAVY BLACK HEART BULLET;So;0;ON;;;;;N;;;;;
+ 2766;FLORAL HEART;So;0;ON;;;;;N;;;;;
+ 2767;ROTATED FLORAL HEART BULLET;So;0;ON;;;;;N;;;;;
+ 2768;MEDIUM LEFT PARENTHESIS ORNAMENT;Ps;0;ON;;;;;Y;;;;;
+ 2769;MEDIUM RIGHT PARENTHESIS ORNAMENT;Pe;0;ON;;;;;Y;;;;;
+ 276A;MEDIUM FLATTENED LEFT PARENTHESIS ORNAMENT;Ps;0;ON;;;;;Y;;;;;
+ 276B;MEDIUM FLATTENED RIGHT PARENTHESIS ORNAMENT;Pe;0;ON;;;;;Y;;;;;
+ 276C;MEDIUM LEFT-POINTING ANGLE BRACKET ORNAMENT;Ps;0;ON;;;;;Y;;;;;
+ 276D;MEDIUM RIGHT-POINTING ANGLE BRACKET ORNAMENT;Pe;0;ON;;;;;Y;;;;;
+ 276E;HEAVY LEFT-POINTING ANGLE QUOTATION MARK ORNAMENT;Ps;0;ON;;;;;Y;;;;;
+ 276F;HEAVY RIGHT-POINTING ANGLE QUOTATION MARK ORNAMENT;Pe;0;ON;;;;;Y;;;;;
+ 2770;HEAVY LEFT-POINTING ANGLE BRACKET ORNAMENT;Ps;0;ON;;;;;Y;;;;;
+ 2771;HEAVY RIGHT-POINTING ANGLE BRACKET ORNAMENT;Pe;0;ON;;;;;Y;;;;;
+ 2772;LIGHT LEFT TORTOISE SHELL BRACKET ORNAMENT;Ps;0;ON;;;;;Y;;;;;
+ 2773;LIGHT RIGHT TORTOISE SHELL BRACKET ORNAMENT;Pe;0;ON;;;;;Y;;;;;
+ 2774;MEDIUM LEFT CURLY BRACKET ORNAMENT;Ps;0;ON;;;;;Y;;;;;
+ 2775;MEDIUM RIGHT CURLY BRACKET ORNAMENT;Pe;0;ON;;;;;Y;;;;;
+ 2776;DINGBAT NEGATIVE CIRCLED DIGIT ONE;No;0;ON;;;1;1;N;INVERSE CIRCLED DIGIT ONE;;;;
+ 2777;DINGBAT NEGATIVE CIRCLED DIGIT TWO;No;0;ON;;;2;2;N;INVERSE CIRCLED DIGIT TWO;;;;
+ 2778;DINGBAT NEGATIVE CIRCLED DIGIT THREE;No;0;ON;;;3;3;N;INVERSE CIRCLED DIGIT THREE;;;;
+ 2779;DINGBAT NEGATIVE CIRCLED DIGIT FOUR;No;0;ON;;;4;4;N;INVERSE CIRCLED DIGIT FOUR;;;;
+ 277A;DINGBAT NEGATIVE CIRCLED DIGIT FIVE;No;0;ON;;;5;5;N;INVERSE CIRCLED DIGIT FIVE;;;;
+ 277B;DINGBAT NEGATIVE CIRCLED DIGIT SIX;No;0;ON;;;6;6;N;INVERSE CIRCLED DIGIT SIX;;;;
+ 277C;DINGBAT NEGATIVE CIRCLED DIGIT SEVEN;No;0;ON;;;7;7;N;INVERSE CIRCLED DIGIT SEVEN;;;;
+ 277D;DINGBAT NEGATIVE CIRCLED DIGIT EIGHT;No;0;ON;;;8;8;N;INVERSE CIRCLED DIGIT EIGHT;;;;
+ 277E;DINGBAT NEGATIVE CIRCLED DIGIT NINE;No;0;ON;;;9;9;N;INVERSE CIRCLED DIGIT NINE;;;;
+ 277F;DINGBAT NEGATIVE CIRCLED NUMBER TEN;No;0;ON;;;;10;N;INVERSE CIRCLED NUMBER TEN;;;;
+ 2780;DINGBAT CIRCLED SANS-SERIF DIGIT ONE;No;0;ON;;;1;1;N;CIRCLED SANS-SERIF DIGIT ONE;;;;
+ 2781;DINGBAT CIRCLED SANS-SERIF DIGIT TWO;No;0;ON;;;2;2;N;CIRCLED SANS-SERIF DIGIT TWO;;;;
+ 2782;DINGBAT CIRCLED SANS-SERIF DIGIT THREE;No;0;ON;;;3;3;N;CIRCLED SANS-SERIF DIGIT THREE;;;;
+ 2783;DINGBAT CIRCLED SANS-SERIF DIGIT FOUR;No;0;ON;;;4;4;N;CIRCLED SANS-SERIF DIGIT FOUR;;;;
+ 2784;DINGBAT CIRCLED SANS-SERIF DIGIT FIVE;No;0;ON;;;5;5;N;CIRCLED SANS-SERIF DIGIT FIVE;;;;
+ 2785;DINGBAT CIRCLED SANS-SERIF DIGIT SIX;No;0;ON;;;6;6;N;CIRCLED SANS-SERIF DIGIT SIX;;;;
+ 2786;DINGBAT CIRCLED SANS-SERIF DIGIT SEVEN;No;0;ON;;;7;7;N;CIRCLED SANS-SERIF DIGIT SEVEN;;;;
+ 2787;DINGBAT CIRCLED SANS-SERIF DIGIT EIGHT;No;0;ON;;;8;8;N;CIRCLED SANS-SERIF DIGIT EIGHT;;;;
+ 2788;DINGBAT CIRCLED SANS-SERIF DIGIT NINE;No;0;ON;;;9;9;N;CIRCLED SANS-SERIF DIGIT NINE;;;;
+ 2789;DINGBAT CIRCLED SANS-SERIF NUMBER TEN;No;0;ON;;;;10;N;CIRCLED SANS-SERIF NUMBER TEN;;;;
+ 278A;DINGBAT NEGATIVE CIRCLED SANS-SERIF DIGIT ONE;No;0;ON;;;1;1;N;INVERSE CIRCLED SANS-SERIF DIGIT ONE;;;;
+ 278B;DINGBAT NEGATIVE CIRCLED SANS-SERIF DIGIT TWO;No;0;ON;;;2;2;N;INVERSE CIRCLED SANS-SERIF DIGIT TWO;;;;
+ 278C;DINGBAT NEGATIVE CIRCLED SANS-SERIF DIGIT THREE;No;0;ON;;;3;3;N;INVERSE CIRCLED SANS-SERIF DIGIT THREE;;;;
+ 278D;DINGBAT NEGATIVE CIRCLED SANS-SERIF DIGIT FOUR;No;0;ON;;;4;4;N;INVERSE CIRCLED SANS-SERIF DIGIT FOUR;;;;
+ 278E;DINGBAT NEGATIVE CIRCLED SANS-SERIF DIGIT FIVE;No;0;ON;;;5;5;N;INVERSE CIRCLED SANS-SERIF DIGIT FIVE;;;;
+ 278F;DINGBAT NEGATIVE CIRCLED SANS-SERIF DIGIT SIX;No;0;ON;;;6;6;N;INVERSE CIRCLED SANS-SERIF DIGIT SIX;;;;
+ 2790;DINGBAT NEGATIVE CIRCLED SANS-SERIF DIGIT SEVEN;No;0;ON;;;7;7;N;INVERSE CIRCLED SANS-SERIF DIGIT SEVEN;;;;
+ 2791;DINGBAT NEGATIVE CIRCLED SANS-SERIF DIGIT EIGHT;No;0;ON;;;8;8;N;INVERSE CIRCLED SANS-SERIF DIGIT EIGHT;;;;
+ 2792;DINGBAT NEGATIVE CIRCLED SANS-SERIF DIGIT NINE;No;0;ON;;;9;9;N;INVERSE CIRCLED SANS-SERIF DIGIT NINE;;;;
+ 2793;DINGBAT NEGATIVE CIRCLED SANS-SERIF NUMBER TEN;No;0;ON;;;;10;N;INVERSE CIRCLED SANS-SERIF NUMBER TEN;;;;
+ 2794;HEAVY WIDE-HEADED RIGHTWARDS ARROW;So;0;ON;;;;;N;HEAVY WIDE-HEADED RIGHT ARROW;;;;
+ 2795;HEAVY PLUS SIGN;So;0;ON;;;;;N;;;;;
+ 2796;HEAVY MINUS SIGN;So;0;ON;;;;;N;;;;;
+ 2797;HEAVY DIVISION SIGN;So;0;ON;;;;;N;;;;;
+ 2798;HEAVY SOUTH EAST ARROW;So;0;ON;;;;;N;HEAVY LOWER RIGHT ARROW;;;;
+ 2799;HEAVY RIGHTWARDS ARROW;So;0;ON;;;;;N;HEAVY RIGHT ARROW;;;;
+ 279A;HEAVY NORTH EAST ARROW;So;0;ON;;;;;N;HEAVY UPPER RIGHT ARROW;;;;
+ 279B;DRAFTING POINT RIGHTWARDS ARROW;So;0;ON;;;;;N;DRAFTING POINT RIGHT ARROW;;;;
+ 279C;HEAVY ROUND-TIPPED RIGHTWARDS ARROW;So;0;ON;;;;;N;HEAVY ROUND-TIPPED RIGHT ARROW;;;;
+ 279D;TRIANGLE-HEADED RIGHTWARDS ARROW;So;0;ON;;;;;N;TRIANGLE-HEADED RIGHT ARROW;;;;
+ 279E;HEAVY TRIANGLE-HEADED RIGHTWARDS ARROW;So;0;ON;;;;;N;HEAVY TRIANGLE-HEADED RIGHT ARROW;;;;
+ 279F;DASHED TRIANGLE-HEADED RIGHTWARDS ARROW;So;0;ON;;;;;N;DASHED TRIANGLE-HEADED RIGHT ARROW;;;;
+ 27A0;HEAVY DASHED TRIANGLE-HEADED RIGHTWARDS ARROW;So;0;ON;;;;;N;HEAVY DASHED TRIANGLE-HEADED RIGHT ARROW;;;;
+ 27A1;BLACK RIGHTWARDS ARROW;So;0;ON;;;;;N;BLACK RIGHT ARROW;;;;
+ 27A2;THREE-D TOP-LIGHTED RIGHTWARDS ARROWHEAD;So;0;ON;;;;;N;THREE-D TOP-LIGHTED RIGHT ARROWHEAD;;;;
+ 27A3;THREE-D BOTTOM-LIGHTED RIGHTWARDS ARROWHEAD;So;0;ON;;;;;N;THREE-D BOTTOM-LIGHTED RIGHT ARROWHEAD;;;;
+ 27A4;BLACK RIGHTWARDS ARROWHEAD;So;0;ON;;;;;N;BLACK RIGHT ARROWHEAD;;;;
+ 27A5;HEAVY BLACK CURVED DOWNWARDS AND RIGHTWARDS ARROW;So;0;ON;;;;;N;HEAVY BLACK CURVED DOWN AND RIGHT ARROW;;;;
+ 27A6;HEAVY BLACK CURVED UPWARDS AND RIGHTWARDS ARROW;So;0;ON;;;;;N;HEAVY BLACK CURVED UP AND RIGHT ARROW;;;;
+ 27A7;SQUAT BLACK RIGHTWARDS ARROW;So;0;ON;;;;;N;SQUAT BLACK RIGHT ARROW;;;;
+ 27A8;HEAVY CONCAVE-POINTED BLACK RIGHTWARDS ARROW;So;0;ON;;;;;N;HEAVY CONCAVE-POINTED BLACK RIGHT ARROW;;;;
+ 27A9;RIGHT-SHADED WHITE RIGHTWARDS ARROW;So;0;ON;;;;;N;RIGHT-SHADED WHITE RIGHT ARROW;;;;
+ 27AA;LEFT-SHADED WHITE RIGHTWARDS ARROW;So;0;ON;;;;;N;LEFT-SHADED WHITE RIGHT ARROW;;;;
+ 27AB;BACK-TILTED SHADOWED WHITE RIGHTWARDS ARROW;So;0;ON;;;;;N;BACK-TILTED SHADOWED WHITE RIGHT ARROW;;;;
+ 27AC;FRONT-TILTED SHADOWED WHITE RIGHTWARDS ARROW;So;0;ON;;;;;N;FRONT-TILTED SHADOWED WHITE RIGHT ARROW;;;;
+ 27AD;HEAVY LOWER RIGHT-SHADOWED WHITE RIGHTWARDS ARROW;So;0;ON;;;;;N;HEAVY LOWER RIGHT-SHADOWED WHITE RIGHT ARROW;;;;
+ 27AE;HEAVY UPPER RIGHT-SHADOWED WHITE RIGHTWARDS ARROW;So;0;ON;;;;;N;HEAVY UPPER RIGHT-SHADOWED WHITE RIGHT ARROW;;;;
+ 27AF;NOTCHED LOWER RIGHT-SHADOWED WHITE RIGHTWARDS ARROW;So;0;ON;;;;;N;NOTCHED LOWER RIGHT-SHADOWED WHITE RIGHT ARROW;;;;
+ 27B0;CURLY LOOP;So;0;ON;;;;;N;;;;;
+ 27B1;NOTCHED UPPER RIGHT-SHADOWED WHITE RIGHTWARDS ARROW;So;0;ON;;;;;N;NOTCHED UPPER RIGHT-SHADOWED WHITE RIGHT ARROW;;;;
+ 27B2;CIRCLED HEAVY WHITE RIGHTWARDS ARROW;So;0;ON;;;;;N;CIRCLED HEAVY WHITE RIGHT ARROW;;;;
+ 27B3;WHITE-FEATHERED RIGHTWARDS ARROW;So;0;ON;;;;;N;WHITE-FEATHERED RIGHT ARROW;;;;
+ 27B4;BLACK-FEATHERED SOUTH EAST ARROW;So;0;ON;;;;;N;BLACK-FEATHERED LOWER RIGHT ARROW;;;;
+ 27B5;BLACK-FEATHERED RIGHTWARDS ARROW;So;0;ON;;;;;N;BLACK-FEATHERED RIGHT ARROW;;;;
+ 27B6;BLACK-FEATHERED NORTH EAST ARROW;So;0;ON;;;;;N;BLACK-FEATHERED UPPER RIGHT ARROW;;;;
+ 27B7;HEAVY BLACK-FEATHERED SOUTH EAST ARROW;So;0;ON;;;;;N;HEAVY BLACK-FEATHERED LOWER RIGHT ARROW;;;;
+ 27B8;HEAVY BLACK-FEATHERED RIGHTWARDS ARROW;So;0;ON;;;;;N;HEAVY BLACK-FEATHERED RIGHT ARROW;;;;
+ 27B9;HEAVY BLACK-FEATHERED NORTH EAST ARROW;So;0;ON;;;;;N;HEAVY BLACK-FEATHERED UPPER RIGHT ARROW;;;;
+ 27BA;TEARDROP-BARBED RIGHTWARDS ARROW;So;0;ON;;;;;N;TEARDROP-BARBED RIGHT ARROW;;;;
+ 27BB;HEAVY TEARDROP-SHANKED RIGHTWARDS ARROW;So;0;ON;;;;;N;HEAVY TEARDROP-SHANKED RIGHT ARROW;;;;
+ 27BC;WEDGE-TAILED RIGHTWARDS ARROW;So;0;ON;;;;;N;WEDGE-TAILED RIGHT ARROW;;;;
+ 27BD;HEAVY WEDGE-TAILED RIGHTWARDS ARROW;So;0;ON;;;;;N;HEAVY WEDGE-TAILED RIGHT ARROW;;;;
+ 27BE;OPEN-OUTLINED RIGHTWARDS ARROW;So;0;ON;;;;;N;OPEN-OUTLINED RIGHT ARROW;;;;
+ 27BF;DOUBLE CURLY LOOP;So;0;ON;;;;;N;;;;;
+ 27C0;THREE DIMENSIONAL ANGLE;Sm;0;ON;;;;;Y;;;;;
+ 27C1;WHITE TRIANGLE CONTAINING SMALL WHITE TRIANGLE;Sm;0;ON;;;;;N;;;;;
+ 27C2;PERPENDICULAR;Sm;0;ON;;;;;N;;;;;
+ 27C3;OPEN SUBSET;Sm;0;ON;;;;;Y;;;;;
+ 27C4;OPEN SUPERSET;Sm;0;ON;;;;;Y;;;;;
+ 27C5;LEFT S-SHAPED BAG DELIMITER;Ps;0;ON;;;;;Y;;;;;
+ 27C6;RIGHT S-SHAPED BAG DELIMITER;Pe;0;ON;;;;;Y;;;;;
+ 27C7;OR WITH DOT INSIDE;Sm;0;ON;;;;;N;;;;;
+ 27C8;REVERSE SOLIDUS PRECEDING SUBSET;Sm;0;ON;;;;;Y;;;;;
+ 27C9;SUPERSET PRECEDING SOLIDUS;Sm;0;ON;;;;;Y;;;;;
+ 27CA;VERTICAL BAR WITH HORIZONTAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 27CB;MATHEMATICAL RISING DIAGONAL;Sm;0;ON;;;;;Y;;;;;
+ 27CC;LONG DIVISION;Sm;0;ON;;;;;Y;;;;;
+ 27CD;MATHEMATICAL FALLING DIAGONAL;Sm;0;ON;;;;;Y;;;;;
+ 27CE;SQUARED LOGICAL AND;Sm;0;ON;;;;;N;;;;;
+ 27CF;SQUARED LOGICAL OR;Sm;0;ON;;;;;N;;;;;
+ 27D0;WHITE DIAMOND WITH CENTRED DOT;Sm;0;ON;;;;;N;;;;;
+ 27D1;AND WITH DOT;Sm;0;ON;;;;;N;;;;;
+ 27D2;ELEMENT OF OPENING UPWARDS;Sm;0;ON;;;;;N;;;;;
+ 27D3;LOWER RIGHT CORNER WITH DOT;Sm;0;ON;;;;;Y;;;;;
+ 27D4;UPPER LEFT CORNER WITH DOT;Sm;0;ON;;;;;Y;;;;;
+ 27D5;LEFT OUTER JOIN;Sm;0;ON;;;;;Y;;;;;
+ 27D6;RIGHT OUTER JOIN;Sm;0;ON;;;;;Y;;;;;
+ 27D7;FULL OUTER JOIN;Sm;0;ON;;;;;N;;;;;
+ 27D8;LARGE UP TACK;Sm;0;ON;;;;;N;;;;;
+ 27D9;LARGE DOWN TACK;Sm;0;ON;;;;;N;;;;;
+ 27DA;LEFT AND RIGHT DOUBLE TURNSTILE;Sm;0;ON;;;;;N;;;;;
+ 27DB;LEFT AND RIGHT TACK;Sm;0;ON;;;;;N;;;;;
+ 27DC;LEFT MULTIMAP;Sm;0;ON;;;;;Y;;;;;
+ 27DD;LONG RIGHT TACK;Sm;0;ON;;;;;Y;;;;;
+ 27DE;LONG LEFT TACK;Sm;0;ON;;;;;Y;;;;;
+ 27DF;UP TACK WITH CIRCLE ABOVE;Sm;0;ON;;;;;N;;;;;
+ 27E0;LOZENGE DIVIDED BY HORIZONTAL RULE;Sm;0;ON;;;;;N;;;;;
+ 27E1;WHITE CONCAVE-SIDED DIAMOND;Sm;0;ON;;;;;N;;;;;
+ 27E2;WHITE CONCAVE-SIDED DIAMOND WITH LEFTWARDS TICK;Sm;0;ON;;;;;Y;;;;;
+ 27E3;WHITE CONCAVE-SIDED DIAMOND WITH RIGHTWARDS TICK;Sm;0;ON;;;;;Y;;;;;
+ 27E4;WHITE SQUARE WITH LEFTWARDS TICK;Sm;0;ON;;;;;Y;;;;;
+ 27E5;WHITE SQUARE WITH RIGHTWARDS TICK;Sm;0;ON;;;;;Y;;;;;
+ 27E6;MATHEMATICAL LEFT WHITE SQUARE BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 27E7;MATHEMATICAL RIGHT WHITE SQUARE BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 27E8;MATHEMATICAL LEFT ANGLE BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 27E9;MATHEMATICAL RIGHT ANGLE BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 27EA;MATHEMATICAL LEFT DOUBLE ANGLE BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 27EB;MATHEMATICAL RIGHT DOUBLE ANGLE BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 27EC;MATHEMATICAL LEFT WHITE TORTOISE SHELL BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 27ED;MATHEMATICAL RIGHT WHITE TORTOISE SHELL BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 27EE;MATHEMATICAL LEFT FLATTENED PARENTHESIS;Ps;0;ON;;;;;Y;;;;;
+ 27EF;MATHEMATICAL RIGHT FLATTENED PARENTHESIS;Pe;0;ON;;;;;Y;;;;;
+ 27F0;UPWARDS QUADRUPLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 27F1;DOWNWARDS QUADRUPLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 27F2;ANTICLOCKWISE GAPPED CIRCLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 27F3;CLOCKWISE GAPPED CIRCLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 27F4;RIGHT ARROW WITH CIRCLED PLUS;Sm;0;ON;;;;;N;;;;;
+ 27F5;LONG LEFTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 27F6;LONG RIGHTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 27F7;LONG LEFT RIGHT ARROW;Sm;0;ON;;;;;N;;;;;
+ 27F8;LONG LEFTWARDS DOUBLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 27F9;LONG RIGHTWARDS DOUBLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 27FA;LONG LEFT RIGHT DOUBLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 27FB;LONG LEFTWARDS ARROW FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 27FC;LONG RIGHTWARDS ARROW FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 27FD;LONG LEFTWARDS DOUBLE ARROW FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 27FE;LONG RIGHTWARDS DOUBLE ARROW FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 27FF;LONG RIGHTWARDS SQUIGGLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 2800;BRAILLE PATTERN BLANK;So;0;L;;;;;N;;;;;
+ 2801;BRAILLE PATTERN DOTS-1;So;0;L;;;;;N;;;;;
+ 2802;BRAILLE PATTERN DOTS-2;So;0;L;;;;;N;;;;;
+ 2803;BRAILLE PATTERN DOTS-12;So;0;L;;;;;N;;;;;
+ 2804;BRAILLE PATTERN DOTS-3;So;0;L;;;;;N;;;;;
+ 2805;BRAILLE PATTERN DOTS-13;So;0;L;;;;;N;;;;;
+ 2806;BRAILLE PATTERN DOTS-23;So;0;L;;;;;N;;;;;
+ 2807;BRAILLE PATTERN DOTS-123;So;0;L;;;;;N;;;;;
+ 2808;BRAILLE PATTERN DOTS-4;So;0;L;;;;;N;;;;;
+ 2809;BRAILLE PATTERN DOTS-14;So;0;L;;;;;N;;;;;
+ 280A;BRAILLE PATTERN DOTS-24;So;0;L;;;;;N;;;;;
+ 280B;BRAILLE PATTERN DOTS-124;So;0;L;;;;;N;;;;;
+ 280C;BRAILLE PATTERN DOTS-34;So;0;L;;;;;N;;;;;
+ 280D;BRAILLE PATTERN DOTS-134;So;0;L;;;;;N;;;;;
+ 280E;BRAILLE PATTERN DOTS-234;So;0;L;;;;;N;;;;;
+ 280F;BRAILLE PATTERN DOTS-1234;So;0;L;;;;;N;;;;;
+ 2810;BRAILLE PATTERN DOTS-5;So;0;L;;;;;N;;;;;
+ 2811;BRAILLE PATTERN DOTS-15;So;0;L;;;;;N;;;;;
+ 2812;BRAILLE PATTERN DOTS-25;So;0;L;;;;;N;;;;;
+ 2813;BRAILLE PATTERN DOTS-125;So;0;L;;;;;N;;;;;
+ 2814;BRAILLE PATTERN DOTS-35;So;0;L;;;;;N;;;;;
+ 2815;BRAILLE PATTERN DOTS-135;So;0;L;;;;;N;;;;;
+ 2816;BRAILLE PATTERN DOTS-235;So;0;L;;;;;N;;;;;
+ 2817;BRAILLE PATTERN DOTS-1235;So;0;L;;;;;N;;;;;
+ 2818;BRAILLE PATTERN DOTS-45;So;0;L;;;;;N;;;;;
+ 2819;BRAILLE PATTERN DOTS-145;So;0;L;;;;;N;;;;;
+ 281A;BRAILLE PATTERN DOTS-245;So;0;L;;;;;N;;;;;
+ 281B;BRAILLE PATTERN DOTS-1245;So;0;L;;;;;N;;;;;
+ 281C;BRAILLE PATTERN DOTS-345;So;0;L;;;;;N;;;;;
+ 281D;BRAILLE PATTERN DOTS-1345;So;0;L;;;;;N;;;;;
+ 281E;BRAILLE PATTERN DOTS-2345;So;0;L;;;;;N;;;;;
+ 281F;BRAILLE PATTERN DOTS-12345;So;0;L;;;;;N;;;;;
+ 2820;BRAILLE PATTERN DOTS-6;So;0;L;;;;;N;;;;;
+ 2821;BRAILLE PATTERN DOTS-16;So;0;L;;;;;N;;;;;
+ 2822;BRAILLE PATTERN DOTS-26;So;0;L;;;;;N;;;;;
+ 2823;BRAILLE PATTERN DOTS-126;So;0;L;;;;;N;;;;;
+ 2824;BRAILLE PATTERN DOTS-36;So;0;L;;;;;N;;;;;
+ 2825;BRAILLE PATTERN DOTS-136;So;0;L;;;;;N;;;;;
+ 2826;BRAILLE PATTERN DOTS-236;So;0;L;;;;;N;;;;;
+ 2827;BRAILLE PATTERN DOTS-1236;So;0;L;;;;;N;;;;;
+ 2828;BRAILLE PATTERN DOTS-46;So;0;L;;;;;N;;;;;
+ 2829;BRAILLE PATTERN DOTS-146;So;0;L;;;;;N;;;;;
+ 282A;BRAILLE PATTERN DOTS-246;So;0;L;;;;;N;;;;;
+ 282B;BRAILLE PATTERN DOTS-1246;So;0;L;;;;;N;;;;;
+ 282C;BRAILLE PATTERN DOTS-346;So;0;L;;;;;N;;;;;
+ 282D;BRAILLE PATTERN DOTS-1346;So;0;L;;;;;N;;;;;
+ 282E;BRAILLE PATTERN DOTS-2346;So;0;L;;;;;N;;;;;
+ 282F;BRAILLE PATTERN DOTS-12346;So;0;L;;;;;N;;;;;
+ 2830;BRAILLE PATTERN DOTS-56;So;0;L;;;;;N;;;;;
+ 2831;BRAILLE PATTERN DOTS-156;So;0;L;;;;;N;;;;;
+ 2832;BRAILLE PATTERN DOTS-256;So;0;L;;;;;N;;;;;
+ 2833;BRAILLE PATTERN DOTS-1256;So;0;L;;;;;N;;;;;
+ 2834;BRAILLE PATTERN DOTS-356;So;0;L;;;;;N;;;;;
+ 2835;BRAILLE PATTERN DOTS-1356;So;0;L;;;;;N;;;;;
+ 2836;BRAILLE PATTERN DOTS-2356;So;0;L;;;;;N;;;;;
+ 2837;BRAILLE PATTERN DOTS-12356;So;0;L;;;;;N;;;;;
+ 2838;BRAILLE PATTERN DOTS-456;So;0;L;;;;;N;;;;;
+ 2839;BRAILLE PATTERN DOTS-1456;So;0;L;;;;;N;;;;;
+ 283A;BRAILLE PATTERN DOTS-2456;So;0;L;;;;;N;;;;;
+ 283B;BRAILLE PATTERN DOTS-12456;So;0;L;;;;;N;;;;;
+ 283C;BRAILLE PATTERN DOTS-3456;So;0;L;;;;;N;;;;;
+ 283D;BRAILLE PATTERN DOTS-13456;So;0;L;;;;;N;;;;;
+ 283E;BRAILLE PATTERN DOTS-23456;So;0;L;;;;;N;;;;;
+ 283F;BRAILLE PATTERN DOTS-123456;So;0;L;;;;;N;;;;;
+ 2840;BRAILLE PATTERN DOTS-7;So;0;L;;;;;N;;;;;
+ 2841;BRAILLE PATTERN DOTS-17;So;0;L;;;;;N;;;;;
+ 2842;BRAILLE PATTERN DOTS-27;So;0;L;;;;;N;;;;;
+ 2843;BRAILLE PATTERN DOTS-127;So;0;L;;;;;N;;;;;
+ 2844;BRAILLE PATTERN DOTS-37;So;0;L;;;;;N;;;;;
+ 2845;BRAILLE PATTERN DOTS-137;So;0;L;;;;;N;;;;;
+ 2846;BRAILLE PATTERN DOTS-237;So;0;L;;;;;N;;;;;
+ 2847;BRAILLE PATTERN DOTS-1237;So;0;L;;;;;N;;;;;
+ 2848;BRAILLE PATTERN DOTS-47;So;0;L;;;;;N;;;;;
+ 2849;BRAILLE PATTERN DOTS-147;So;0;L;;;;;N;;;;;
+ 284A;BRAILLE PATTERN DOTS-247;So;0;L;;;;;N;;;;;
+ 284B;BRAILLE PATTERN DOTS-1247;So;0;L;;;;;N;;;;;
+ 284C;BRAILLE PATTERN DOTS-347;So;0;L;;;;;N;;;;;
+ 284D;BRAILLE PATTERN DOTS-1347;So;0;L;;;;;N;;;;;
+ 284E;BRAILLE PATTERN DOTS-2347;So;0;L;;;;;N;;;;;
+ 284F;BRAILLE PATTERN DOTS-12347;So;0;L;;;;;N;;;;;
+ 2850;BRAILLE PATTERN DOTS-57;So;0;L;;;;;N;;;;;
+ 2851;BRAILLE PATTERN DOTS-157;So;0;L;;;;;N;;;;;
+ 2852;BRAILLE PATTERN DOTS-257;So;0;L;;;;;N;;;;;
+ 2853;BRAILLE PATTERN DOTS-1257;So;0;L;;;;;N;;;;;
+ 2854;BRAILLE PATTERN DOTS-357;So;0;L;;;;;N;;;;;
+ 2855;BRAILLE PATTERN DOTS-1357;So;0;L;;;;;N;;;;;
+ 2856;BRAILLE PATTERN DOTS-2357;So;0;L;;;;;N;;;;;
+ 2857;BRAILLE PATTERN DOTS-12357;So;0;L;;;;;N;;;;;
+ 2858;BRAILLE PATTERN DOTS-457;So;0;L;;;;;N;;;;;
+ 2859;BRAILLE PATTERN DOTS-1457;So;0;L;;;;;N;;;;;
+ 285A;BRAILLE PATTERN DOTS-2457;So;0;L;;;;;N;;;;;
+ 285B;BRAILLE PATTERN DOTS-12457;So;0;L;;;;;N;;;;;
+ 285C;BRAILLE PATTERN DOTS-3457;So;0;L;;;;;N;;;;;
+ 285D;BRAILLE PATTERN DOTS-13457;So;0;L;;;;;N;;;;;
+ 285E;BRAILLE PATTERN DOTS-23457;So;0;L;;;;;N;;;;;
+ 285F;BRAILLE PATTERN DOTS-123457;So;0;L;;;;;N;;;;;
+ 2860;BRAILLE PATTERN DOTS-67;So;0;L;;;;;N;;;;;
+ 2861;BRAILLE PATTERN DOTS-167;So;0;L;;;;;N;;;;;
+ 2862;BRAILLE PATTERN DOTS-267;So;0;L;;;;;N;;;;;
+ 2863;BRAILLE PATTERN DOTS-1267;So;0;L;;;;;N;;;;;
+ 2864;BRAILLE PATTERN DOTS-367;So;0;L;;;;;N;;;;;
+ 2865;BRAILLE PATTERN DOTS-1367;So;0;L;;;;;N;;;;;
+ 2866;BRAILLE PATTERN DOTS-2367;So;0;L;;;;;N;;;;;
+ 2867;BRAILLE PATTERN DOTS-12367;So;0;L;;;;;N;;;;;
+ 2868;BRAILLE PATTERN DOTS-467;So;0;L;;;;;N;;;;;
+ 2869;BRAILLE PATTERN DOTS-1467;So;0;L;;;;;N;;;;;
+ 286A;BRAILLE PATTERN DOTS-2467;So;0;L;;;;;N;;;;;
+ 286B;BRAILLE PATTERN DOTS-12467;So;0;L;;;;;N;;;;;
+ 286C;BRAILLE PATTERN DOTS-3467;So;0;L;;;;;N;;;;;
+ 286D;BRAILLE PATTERN DOTS-13467;So;0;L;;;;;N;;;;;
+ 286E;BRAILLE PATTERN DOTS-23467;So;0;L;;;;;N;;;;;
+ 286F;BRAILLE PATTERN DOTS-123467;So;0;L;;;;;N;;;;;
+ 2870;BRAILLE PATTERN DOTS-567;So;0;L;;;;;N;;;;;
+ 2871;BRAILLE PATTERN DOTS-1567;So;0;L;;;;;N;;;;;
+ 2872;BRAILLE PATTERN DOTS-2567;So;0;L;;;;;N;;;;;
+ 2873;BRAILLE PATTERN DOTS-12567;So;0;L;;;;;N;;;;;
+ 2874;BRAILLE PATTERN DOTS-3567;So;0;L;;;;;N;;;;;
+ 2875;BRAILLE PATTERN DOTS-13567;So;0;L;;;;;N;;;;;
+ 2876;BRAILLE PATTERN DOTS-23567;So;0;L;;;;;N;;;;;
+ 2877;BRAILLE PATTERN DOTS-123567;So;0;L;;;;;N;;;;;
+ 2878;BRAILLE PATTERN DOTS-4567;So;0;L;;;;;N;;;;;
+ 2879;BRAILLE PATTERN DOTS-14567;So;0;L;;;;;N;;;;;
+ 287A;BRAILLE PATTERN DOTS-24567;So;0;L;;;;;N;;;;;
+ 287B;BRAILLE PATTERN DOTS-124567;So;0;L;;;;;N;;;;;
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+ 287D;BRAILLE PATTERN DOTS-134567;So;0;L;;;;;N;;;;;
+ 287E;BRAILLE PATTERN DOTS-234567;So;0;L;;;;;N;;;;;
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+ 2880;BRAILLE PATTERN DOTS-8;So;0;L;;;;;N;;;;;
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+ 2895;BRAILLE PATTERN DOTS-1358;So;0;L;;;;;N;;;;;
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+ 2898;BRAILLE PATTERN DOTS-458;So;0;L;;;;;N;;;;;
+ 2899;BRAILLE PATTERN DOTS-1458;So;0;L;;;;;N;;;;;
+ 289A;BRAILLE PATTERN DOTS-2458;So;0;L;;;;;N;;;;;
+ 289B;BRAILLE PATTERN DOTS-12458;So;0;L;;;;;N;;;;;
+ 289C;BRAILLE PATTERN DOTS-3458;So;0;L;;;;;N;;;;;
+ 289D;BRAILLE PATTERN DOTS-13458;So;0;L;;;;;N;;;;;
+ 289E;BRAILLE PATTERN DOTS-23458;So;0;L;;;;;N;;;;;
+ 289F;BRAILLE PATTERN DOTS-123458;So;0;L;;;;;N;;;;;
+ 28A0;BRAILLE PATTERN DOTS-68;So;0;L;;;;;N;;;;;
+ 28A1;BRAILLE PATTERN DOTS-168;So;0;L;;;;;N;;;;;
+ 28A2;BRAILLE PATTERN DOTS-268;So;0;L;;;;;N;;;;;
+ 28A3;BRAILLE PATTERN DOTS-1268;So;0;L;;;;;N;;;;;
+ 28A4;BRAILLE PATTERN DOTS-368;So;0;L;;;;;N;;;;;
+ 28A5;BRAILLE PATTERN DOTS-1368;So;0;L;;;;;N;;;;;
+ 28A6;BRAILLE PATTERN DOTS-2368;So;0;L;;;;;N;;;;;
+ 28A7;BRAILLE PATTERN DOTS-12368;So;0;L;;;;;N;;;;;
+ 28A8;BRAILLE PATTERN DOTS-468;So;0;L;;;;;N;;;;;
+ 28A9;BRAILLE PATTERN DOTS-1468;So;0;L;;;;;N;;;;;
+ 28AA;BRAILLE PATTERN DOTS-2468;So;0;L;;;;;N;;;;;
+ 28AB;BRAILLE PATTERN DOTS-12468;So;0;L;;;;;N;;;;;
+ 28AC;BRAILLE PATTERN DOTS-3468;So;0;L;;;;;N;;;;;
+ 28AD;BRAILLE PATTERN DOTS-13468;So;0;L;;;;;N;;;;;
+ 28AE;BRAILLE PATTERN DOTS-23468;So;0;L;;;;;N;;;;;
+ 28AF;BRAILLE PATTERN DOTS-123468;So;0;L;;;;;N;;;;;
+ 28B0;BRAILLE PATTERN DOTS-568;So;0;L;;;;;N;;;;;
+ 28B1;BRAILLE PATTERN DOTS-1568;So;0;L;;;;;N;;;;;
+ 28B2;BRAILLE PATTERN DOTS-2568;So;0;L;;;;;N;;;;;
+ 28B3;BRAILLE PATTERN DOTS-12568;So;0;L;;;;;N;;;;;
+ 28B4;BRAILLE PATTERN DOTS-3568;So;0;L;;;;;N;;;;;
+ 28B5;BRAILLE PATTERN DOTS-13568;So;0;L;;;;;N;;;;;
+ 28B6;BRAILLE PATTERN DOTS-23568;So;0;L;;;;;N;;;;;
+ 28B7;BRAILLE PATTERN DOTS-123568;So;0;L;;;;;N;;;;;
+ 28B8;BRAILLE PATTERN DOTS-4568;So;0;L;;;;;N;;;;;
+ 28B9;BRAILLE PATTERN DOTS-14568;So;0;L;;;;;N;;;;;
+ 28BA;BRAILLE PATTERN DOTS-24568;So;0;L;;;;;N;;;;;
+ 28BB;BRAILLE PATTERN DOTS-124568;So;0;L;;;;;N;;;;;
+ 28BC;BRAILLE PATTERN DOTS-34568;So;0;L;;;;;N;;;;;
+ 28BD;BRAILLE PATTERN DOTS-134568;So;0;L;;;;;N;;;;;
+ 28BE;BRAILLE PATTERN DOTS-234568;So;0;L;;;;;N;;;;;
+ 28BF;BRAILLE PATTERN DOTS-1234568;So;0;L;;;;;N;;;;;
+ 28C0;BRAILLE PATTERN DOTS-78;So;0;L;;;;;N;;;;;
+ 28C1;BRAILLE PATTERN DOTS-178;So;0;L;;;;;N;;;;;
+ 28C2;BRAILLE PATTERN DOTS-278;So;0;L;;;;;N;;;;;
+ 28C3;BRAILLE PATTERN DOTS-1278;So;0;L;;;;;N;;;;;
+ 28C4;BRAILLE PATTERN DOTS-378;So;0;L;;;;;N;;;;;
+ 28C5;BRAILLE PATTERN DOTS-1378;So;0;L;;;;;N;;;;;
+ 28C6;BRAILLE PATTERN DOTS-2378;So;0;L;;;;;N;;;;;
+ 28C7;BRAILLE PATTERN DOTS-12378;So;0;L;;;;;N;;;;;
+ 28C8;BRAILLE PATTERN DOTS-478;So;0;L;;;;;N;;;;;
+ 28C9;BRAILLE PATTERN DOTS-1478;So;0;L;;;;;N;;;;;
+ 28CA;BRAILLE PATTERN DOTS-2478;So;0;L;;;;;N;;;;;
+ 28CB;BRAILLE PATTERN DOTS-12478;So;0;L;;;;;N;;;;;
+ 28CC;BRAILLE PATTERN DOTS-3478;So;0;L;;;;;N;;;;;
+ 28CD;BRAILLE PATTERN DOTS-13478;So;0;L;;;;;N;;;;;
+ 28CE;BRAILLE PATTERN DOTS-23478;So;0;L;;;;;N;;;;;
+ 28CF;BRAILLE PATTERN DOTS-123478;So;0;L;;;;;N;;;;;
+ 28D0;BRAILLE PATTERN DOTS-578;So;0;L;;;;;N;;;;;
+ 28D1;BRAILLE PATTERN DOTS-1578;So;0;L;;;;;N;;;;;
+ 28D2;BRAILLE PATTERN DOTS-2578;So;0;L;;;;;N;;;;;
+ 28D3;BRAILLE PATTERN DOTS-12578;So;0;L;;;;;N;;;;;
+ 28D4;BRAILLE PATTERN DOTS-3578;So;0;L;;;;;N;;;;;
+ 28D5;BRAILLE PATTERN DOTS-13578;So;0;L;;;;;N;;;;;
+ 28D6;BRAILLE PATTERN DOTS-23578;So;0;L;;;;;N;;;;;
+ 28D7;BRAILLE PATTERN DOTS-123578;So;0;L;;;;;N;;;;;
+ 28D8;BRAILLE PATTERN DOTS-4578;So;0;L;;;;;N;;;;;
+ 28D9;BRAILLE PATTERN DOTS-14578;So;0;L;;;;;N;;;;;
+ 28DA;BRAILLE PATTERN DOTS-24578;So;0;L;;;;;N;;;;;
+ 28DB;BRAILLE PATTERN DOTS-124578;So;0;L;;;;;N;;;;;
+ 28DC;BRAILLE PATTERN DOTS-34578;So;0;L;;;;;N;;;;;
+ 28DD;BRAILLE PATTERN DOTS-134578;So;0;L;;;;;N;;;;;
+ 28DE;BRAILLE PATTERN DOTS-234578;So;0;L;;;;;N;;;;;
+ 28DF;BRAILLE PATTERN DOTS-1234578;So;0;L;;;;;N;;;;;
+ 28E0;BRAILLE PATTERN DOTS-678;So;0;L;;;;;N;;;;;
+ 28E1;BRAILLE PATTERN DOTS-1678;So;0;L;;;;;N;;;;;
+ 28E2;BRAILLE PATTERN DOTS-2678;So;0;L;;;;;N;;;;;
+ 28E3;BRAILLE PATTERN DOTS-12678;So;0;L;;;;;N;;;;;
+ 28E4;BRAILLE PATTERN DOTS-3678;So;0;L;;;;;N;;;;;
+ 28E5;BRAILLE PATTERN DOTS-13678;So;0;L;;;;;N;;;;;
+ 28E6;BRAILLE PATTERN DOTS-23678;So;0;L;;;;;N;;;;;
+ 28E7;BRAILLE PATTERN DOTS-123678;So;0;L;;;;;N;;;;;
+ 28E8;BRAILLE PATTERN DOTS-4678;So;0;L;;;;;N;;;;;
+ 28E9;BRAILLE PATTERN DOTS-14678;So;0;L;;;;;N;;;;;
+ 28EA;BRAILLE PATTERN DOTS-24678;So;0;L;;;;;N;;;;;
+ 28EB;BRAILLE PATTERN DOTS-124678;So;0;L;;;;;N;;;;;
+ 28EC;BRAILLE PATTERN DOTS-34678;So;0;L;;;;;N;;;;;
+ 28ED;BRAILLE PATTERN DOTS-134678;So;0;L;;;;;N;;;;;
+ 28EE;BRAILLE PATTERN DOTS-234678;So;0;L;;;;;N;;;;;
+ 28EF;BRAILLE PATTERN DOTS-1234678;So;0;L;;;;;N;;;;;
+ 28F0;BRAILLE PATTERN DOTS-5678;So;0;L;;;;;N;;;;;
+ 28F1;BRAILLE PATTERN DOTS-15678;So;0;L;;;;;N;;;;;
+ 28F2;BRAILLE PATTERN DOTS-25678;So;0;L;;;;;N;;;;;
+ 28F3;BRAILLE PATTERN DOTS-125678;So;0;L;;;;;N;;;;;
+ 28F4;BRAILLE PATTERN DOTS-35678;So;0;L;;;;;N;;;;;
+ 28F5;BRAILLE PATTERN DOTS-135678;So;0;L;;;;;N;;;;;
+ 28F6;BRAILLE PATTERN DOTS-235678;So;0;L;;;;;N;;;;;
+ 28F7;BRAILLE PATTERN DOTS-1235678;So;0;L;;;;;N;;;;;
+ 28F8;BRAILLE PATTERN DOTS-45678;So;0;L;;;;;N;;;;;
+ 28F9;BRAILLE PATTERN DOTS-145678;So;0;L;;;;;N;;;;;
+ 28FA;BRAILLE PATTERN DOTS-245678;So;0;L;;;;;N;;;;;
+ 28FB;BRAILLE PATTERN DOTS-1245678;So;0;L;;;;;N;;;;;
+ 28FC;BRAILLE PATTERN DOTS-345678;So;0;L;;;;;N;;;;;
+ 28FD;BRAILLE PATTERN DOTS-1345678;So;0;L;;;;;N;;;;;
+ 28FE;BRAILLE PATTERN DOTS-2345678;So;0;L;;;;;N;;;;;
+ 28FF;BRAILLE PATTERN DOTS-12345678;So;0;L;;;;;N;;;;;
+ 2900;RIGHTWARDS TWO-HEADED ARROW WITH VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2901;RIGHTWARDS TWO-HEADED ARROW WITH DOUBLE VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2902;LEFTWARDS DOUBLE ARROW WITH VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2903;RIGHTWARDS DOUBLE ARROW WITH VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2904;LEFT RIGHT DOUBLE ARROW WITH VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2905;RIGHTWARDS TWO-HEADED ARROW FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 2906;LEFTWARDS DOUBLE ARROW FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 2907;RIGHTWARDS DOUBLE ARROW FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 2908;DOWNWARDS ARROW WITH HORIZONTAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2909;UPWARDS ARROW WITH HORIZONTAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 290A;UPWARDS TRIPLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 290B;DOWNWARDS TRIPLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 290C;LEFTWARDS DOUBLE DASH ARROW;Sm;0;ON;;;;;N;;;;;
+ 290D;RIGHTWARDS DOUBLE DASH ARROW;Sm;0;ON;;;;;N;;;;;
+ 290E;LEFTWARDS TRIPLE DASH ARROW;Sm;0;ON;;;;;N;;;;;
+ 290F;RIGHTWARDS TRIPLE DASH ARROW;Sm;0;ON;;;;;N;;;;;
+ 2910;RIGHTWARDS TWO-HEADED TRIPLE DASH ARROW;Sm;0;ON;;;;;N;;;;;
+ 2911;RIGHTWARDS ARROW WITH DOTTED STEM;Sm;0;ON;;;;;N;;;;;
+ 2912;UPWARDS ARROW TO BAR;Sm;0;ON;;;;;N;;;;;
+ 2913;DOWNWARDS ARROW TO BAR;Sm;0;ON;;;;;N;;;;;
+ 2914;RIGHTWARDS ARROW WITH TAIL WITH VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2915;RIGHTWARDS ARROW WITH TAIL WITH DOUBLE VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2916;RIGHTWARDS TWO-HEADED ARROW WITH TAIL;Sm;0;ON;;;;;N;;;;;
+ 2917;RIGHTWARDS TWO-HEADED ARROW WITH TAIL WITH VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2918;RIGHTWARDS TWO-HEADED ARROW WITH TAIL WITH DOUBLE VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2919;LEFTWARDS ARROW-TAIL;Sm;0;ON;;;;;N;;;;;
+ 291A;RIGHTWARDS ARROW-TAIL;Sm;0;ON;;;;;N;;;;;
+ 291B;LEFTWARDS DOUBLE ARROW-TAIL;Sm;0;ON;;;;;N;;;;;
+ 291C;RIGHTWARDS DOUBLE ARROW-TAIL;Sm;0;ON;;;;;N;;;;;
+ 291D;LEFTWARDS ARROW TO BLACK DIAMOND;Sm;0;ON;;;;;N;;;;;
+ 291E;RIGHTWARDS ARROW TO BLACK DIAMOND;Sm;0;ON;;;;;N;;;;;
+ 291F;LEFTWARDS ARROW FROM BAR TO BLACK DIAMOND;Sm;0;ON;;;;;N;;;;;
+ 2920;RIGHTWARDS ARROW FROM BAR TO BLACK DIAMOND;Sm;0;ON;;;;;N;;;;;
+ 2921;NORTH WEST AND SOUTH EAST ARROW;Sm;0;ON;;;;;N;;;;;
+ 2922;NORTH EAST AND SOUTH WEST ARROW;Sm;0;ON;;;;;N;;;;;
+ 2923;NORTH WEST ARROW WITH HOOK;Sm;0;ON;;;;;N;;;;;
+ 2924;NORTH EAST ARROW WITH HOOK;Sm;0;ON;;;;;N;;;;;
+ 2925;SOUTH EAST ARROW WITH HOOK;Sm;0;ON;;;;;N;;;;;
+ 2926;SOUTH WEST ARROW WITH HOOK;Sm;0;ON;;;;;N;;;;;
+ 2927;NORTH WEST ARROW AND NORTH EAST ARROW;Sm;0;ON;;;;;N;;;;;
+ 2928;NORTH EAST ARROW AND SOUTH EAST ARROW;Sm;0;ON;;;;;N;;;;;
+ 2929;SOUTH EAST ARROW AND SOUTH WEST ARROW;Sm;0;ON;;;;;N;;;;;
+ 292A;SOUTH WEST ARROW AND NORTH WEST ARROW;Sm;0;ON;;;;;N;;;;;
+ 292B;RISING DIAGONAL CROSSING FALLING DIAGONAL;Sm;0;ON;;;;;N;;;;;
+ 292C;FALLING DIAGONAL CROSSING RISING DIAGONAL;Sm;0;ON;;;;;N;;;;;
+ 292D;SOUTH EAST ARROW CROSSING NORTH EAST ARROW;Sm;0;ON;;;;;N;;;;;
+ 292E;NORTH EAST ARROW CROSSING SOUTH EAST ARROW;Sm;0;ON;;;;;N;;;;;
+ 292F;FALLING DIAGONAL CROSSING NORTH EAST ARROW;Sm;0;ON;;;;;N;;;;;
+ 2930;RISING DIAGONAL CROSSING SOUTH EAST ARROW;Sm;0;ON;;;;;N;;;;;
+ 2931;NORTH EAST ARROW CROSSING NORTH WEST ARROW;Sm;0;ON;;;;;N;;;;;
+ 2932;NORTH WEST ARROW CROSSING NORTH EAST ARROW;Sm;0;ON;;;;;N;;;;;
+ 2933;WAVE ARROW POINTING DIRECTLY RIGHT;Sm;0;ON;;;;;N;;;;;
+ 2934;ARROW POINTING RIGHTWARDS THEN CURVING UPWARDS;Sm;0;ON;;;;;N;;;;;
+ 2935;ARROW POINTING RIGHTWARDS THEN CURVING DOWNWARDS;Sm;0;ON;;;;;N;;;;;
+ 2936;ARROW POINTING DOWNWARDS THEN CURVING LEFTWARDS;Sm;0;ON;;;;;N;;;;;
+ 2937;ARROW POINTING DOWNWARDS THEN CURVING RIGHTWARDS;Sm;0;ON;;;;;N;;;;;
+ 2938;RIGHT-SIDE ARC CLOCKWISE ARROW;Sm;0;ON;;;;;N;;;;;
+ 2939;LEFT-SIDE ARC ANTICLOCKWISE ARROW;Sm;0;ON;;;;;N;;;;;
+ 293A;TOP ARC ANTICLOCKWISE ARROW;Sm;0;ON;;;;;N;;;;;
+ 293B;BOTTOM ARC ANTICLOCKWISE ARROW;Sm;0;ON;;;;;N;;;;;
+ 293C;TOP ARC CLOCKWISE ARROW WITH MINUS;Sm;0;ON;;;;;N;;;;;
+ 293D;TOP ARC ANTICLOCKWISE ARROW WITH PLUS;Sm;0;ON;;;;;N;;;;;
+ 293E;LOWER RIGHT SEMICIRCULAR CLOCKWISE ARROW;Sm;0;ON;;;;;N;;;;;
+ 293F;LOWER LEFT SEMICIRCULAR ANTICLOCKWISE ARROW;Sm;0;ON;;;;;N;;;;;
+ 2940;ANTICLOCKWISE CLOSED CIRCLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 2941;CLOCKWISE CLOSED CIRCLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 2942;RIGHTWARDS ARROW ABOVE SHORT LEFTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 2943;LEFTWARDS ARROW ABOVE SHORT RIGHTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 2944;SHORT RIGHTWARDS ARROW ABOVE LEFTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 2945;RIGHTWARDS ARROW WITH PLUS BELOW;Sm;0;ON;;;;;N;;;;;
+ 2946;LEFTWARDS ARROW WITH PLUS BELOW;Sm;0;ON;;;;;N;;;;;
+ 2947;RIGHTWARDS ARROW THROUGH X;Sm;0;ON;;;;;N;;;;;
+ 2948;LEFT RIGHT ARROW THROUGH SMALL CIRCLE;Sm;0;ON;;;;;N;;;;;
+ 2949;UPWARDS TWO-HEADED ARROW FROM SMALL CIRCLE;Sm;0;ON;;;;;N;;;;;
+ 294A;LEFT BARB UP RIGHT BARB DOWN HARPOON;Sm;0;ON;;;;;N;;;;;
+ 294B;LEFT BARB DOWN RIGHT BARB UP HARPOON;Sm;0;ON;;;;;N;;;;;
+ 294C;UP BARB RIGHT DOWN BARB LEFT HARPOON;Sm;0;ON;;;;;N;;;;;
+ 294D;UP BARB LEFT DOWN BARB RIGHT HARPOON;Sm;0;ON;;;;;N;;;;;
+ 294E;LEFT BARB UP RIGHT BARB UP HARPOON;Sm;0;ON;;;;;N;;;;;
+ 294F;UP BARB RIGHT DOWN BARB RIGHT HARPOON;Sm;0;ON;;;;;N;;;;;
+ 2950;LEFT BARB DOWN RIGHT BARB DOWN HARPOON;Sm;0;ON;;;;;N;;;;;
+ 2951;UP BARB LEFT DOWN BARB LEFT HARPOON;Sm;0;ON;;;;;N;;;;;
+ 2952;LEFTWARDS HARPOON WITH BARB UP TO BAR;Sm;0;ON;;;;;N;;;;;
+ 2953;RIGHTWARDS HARPOON WITH BARB UP TO BAR;Sm;0;ON;;;;;N;;;;;
+ 2954;UPWARDS HARPOON WITH BARB RIGHT TO BAR;Sm;0;ON;;;;;N;;;;;
+ 2955;DOWNWARDS HARPOON WITH BARB RIGHT TO BAR;Sm;0;ON;;;;;N;;;;;
+ 2956;LEFTWARDS HARPOON WITH BARB DOWN TO BAR;Sm;0;ON;;;;;N;;;;;
+ 2957;RIGHTWARDS HARPOON WITH BARB DOWN TO BAR;Sm;0;ON;;;;;N;;;;;
+ 2958;UPWARDS HARPOON WITH BARB LEFT TO BAR;Sm;0;ON;;;;;N;;;;;
+ 2959;DOWNWARDS HARPOON WITH BARB LEFT TO BAR;Sm;0;ON;;;;;N;;;;;
+ 295A;LEFTWARDS HARPOON WITH BARB UP FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 295B;RIGHTWARDS HARPOON WITH BARB UP FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 295C;UPWARDS HARPOON WITH BARB RIGHT FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 295D;DOWNWARDS HARPOON WITH BARB RIGHT FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 295E;LEFTWARDS HARPOON WITH BARB DOWN FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 295F;RIGHTWARDS HARPOON WITH BARB DOWN FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 2960;UPWARDS HARPOON WITH BARB LEFT FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 2961;DOWNWARDS HARPOON WITH BARB LEFT FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 2962;LEFTWARDS HARPOON WITH BARB UP ABOVE LEFTWARDS HARPOON WITH BARB DOWN;Sm;0;ON;;;;;N;;;;;
+ 2963;UPWARDS HARPOON WITH BARB LEFT BESIDE UPWARDS HARPOON WITH BARB RIGHT;Sm;0;ON;;;;;N;;;;;
+ 2964;RIGHTWARDS HARPOON WITH BARB UP ABOVE RIGHTWARDS HARPOON WITH BARB DOWN;Sm;0;ON;;;;;N;;;;;
+ 2965;DOWNWARDS HARPOON WITH BARB LEFT BESIDE DOWNWARDS HARPOON WITH BARB RIGHT;Sm;0;ON;;;;;N;;;;;
+ 2966;LEFTWARDS HARPOON WITH BARB UP ABOVE RIGHTWARDS HARPOON WITH BARB UP;Sm;0;ON;;;;;N;;;;;
+ 2967;LEFTWARDS HARPOON WITH BARB DOWN ABOVE RIGHTWARDS HARPOON WITH BARB DOWN;Sm;0;ON;;;;;N;;;;;
+ 2968;RIGHTWARDS HARPOON WITH BARB UP ABOVE LEFTWARDS HARPOON WITH BARB UP;Sm;0;ON;;;;;N;;;;;
+ 2969;RIGHTWARDS HARPOON WITH BARB DOWN ABOVE LEFTWARDS HARPOON WITH BARB DOWN;Sm;0;ON;;;;;N;;;;;
+ 296A;LEFTWARDS HARPOON WITH BARB UP ABOVE LONG DASH;Sm;0;ON;;;;;N;;;;;
+ 296B;LEFTWARDS HARPOON WITH BARB DOWN BELOW LONG DASH;Sm;0;ON;;;;;N;;;;;
+ 296C;RIGHTWARDS HARPOON WITH BARB UP ABOVE LONG DASH;Sm;0;ON;;;;;N;;;;;
+ 296D;RIGHTWARDS HARPOON WITH BARB DOWN BELOW LONG DASH;Sm;0;ON;;;;;N;;;;;
+ 296E;UPWARDS HARPOON WITH BARB LEFT BESIDE DOWNWARDS HARPOON WITH BARB RIGHT;Sm;0;ON;;;;;N;;;;;
+ 296F;DOWNWARDS HARPOON WITH BARB LEFT BESIDE UPWARDS HARPOON WITH BARB RIGHT;Sm;0;ON;;;;;N;;;;;
+ 2970;RIGHT DOUBLE ARROW WITH ROUNDED HEAD;Sm;0;ON;;;;;N;;;;;
+ 2971;EQUALS SIGN ABOVE RIGHTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 2972;TILDE OPERATOR ABOVE RIGHTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 2973;LEFTWARDS ARROW ABOVE TILDE OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2974;RIGHTWARDS ARROW ABOVE TILDE OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2975;RIGHTWARDS ARROW ABOVE ALMOST EQUAL TO;Sm;0;ON;;;;;N;;;;;
+ 2976;LESS-THAN ABOVE LEFTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 2977;LEFTWARDS ARROW THROUGH LESS-THAN;Sm;0;ON;;;;;N;;;;;
+ 2978;GREATER-THAN ABOVE RIGHTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 2979;SUBSET ABOVE RIGHTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 297A;LEFTWARDS ARROW THROUGH SUBSET;Sm;0;ON;;;;;N;;;;;
+ 297B;SUPERSET ABOVE LEFTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 297C;LEFT FISH TAIL;Sm;0;ON;;;;;N;;;;;
+ 297D;RIGHT FISH TAIL;Sm;0;ON;;;;;N;;;;;
+ 297E;UP FISH TAIL;Sm;0;ON;;;;;N;;;;;
+ 297F;DOWN FISH TAIL;Sm;0;ON;;;;;N;;;;;
+ 2980;TRIPLE VERTICAL BAR DELIMITER;Sm;0;ON;;;;;N;;;;;
+ 2981;Z NOTATION SPOT;Sm;0;ON;;;;;N;;;;;
+ 2982;Z NOTATION TYPE COLON;Sm;0;ON;;;;;N;;;;;
+ 2983;LEFT WHITE CURLY BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 2984;RIGHT WHITE CURLY BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 2985;LEFT WHITE PARENTHESIS;Ps;0;ON;;;;;Y;;;;;
+ 2986;RIGHT WHITE PARENTHESIS;Pe;0;ON;;;;;Y;;;;;
+ 2987;Z NOTATION LEFT IMAGE BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 2988;Z NOTATION RIGHT IMAGE BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 2989;Z NOTATION LEFT BINDING BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 298A;Z NOTATION RIGHT BINDING BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 298B;LEFT SQUARE BRACKET WITH UNDERBAR;Ps;0;ON;;;;;Y;;;;;
+ 298C;RIGHT SQUARE BRACKET WITH UNDERBAR;Pe;0;ON;;;;;Y;;;;;
+ 298D;LEFT SQUARE BRACKET WITH TICK IN TOP CORNER;Ps;0;ON;;;;;Y;;;;;
+ 298E;RIGHT SQUARE BRACKET WITH TICK IN BOTTOM CORNER;Pe;0;ON;;;;;Y;;;;;
+ 298F;LEFT SQUARE BRACKET WITH TICK IN BOTTOM CORNER;Ps;0;ON;;;;;Y;;;;;
+ 2990;RIGHT SQUARE BRACKET WITH TICK IN TOP CORNER;Pe;0;ON;;;;;Y;;;;;
+ 2991;LEFT ANGLE BRACKET WITH DOT;Ps;0;ON;;;;;Y;;;;;
+ 2992;RIGHT ANGLE BRACKET WITH DOT;Pe;0;ON;;;;;Y;;;;;
+ 2993;LEFT ARC LESS-THAN BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 2994;RIGHT ARC GREATER-THAN BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 2995;DOUBLE LEFT ARC GREATER-THAN BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 2996;DOUBLE RIGHT ARC LESS-THAN BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 2997;LEFT BLACK TORTOISE SHELL BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 2998;RIGHT BLACK TORTOISE SHELL BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 2999;DOTTED FENCE;Sm;0;ON;;;;;N;;;;;
+ 299A;VERTICAL ZIGZAG LINE;Sm;0;ON;;;;;N;;;;;
+ 299B;MEASURED ANGLE OPENING LEFT;Sm;0;ON;;;;;Y;;;;;
+ 299C;RIGHT ANGLE VARIANT WITH SQUARE;Sm;0;ON;;;;;Y;;;;;
+ 299D;MEASURED RIGHT ANGLE WITH DOT;Sm;0;ON;;;;;Y;;;;;
+ 299E;ANGLE WITH S INSIDE;Sm;0;ON;;;;;Y;;;;;
+ 299F;ACUTE ANGLE;Sm;0;ON;;;;;Y;;;;;
+ 29A0;SPHERICAL ANGLE OPENING LEFT;Sm;0;ON;;;;;Y;;;;;
+ 29A1;SPHERICAL ANGLE OPENING UP;Sm;0;ON;;;;;N;;;;;
+ 29A2;TURNED ANGLE;Sm;0;ON;;;;;Y;;;;;
+ 29A3;REVERSED ANGLE;Sm;0;ON;;;;;Y;;;;;
+ 29A4;ANGLE WITH UNDERBAR;Sm;0;ON;;;;;Y;;;;;
+ 29A5;REVERSED ANGLE WITH UNDERBAR;Sm;0;ON;;;;;Y;;;;;
+ 29A6;OBLIQUE ANGLE OPENING UP;Sm;0;ON;;;;;Y;;;;;
+ 29A7;OBLIQUE ANGLE OPENING DOWN;Sm;0;ON;;;;;Y;;;;;
+ 29A8;MEASURED ANGLE WITH OPEN ARM ENDING IN ARROW POINTING UP AND RIGHT;Sm;0;ON;;;;;Y;;;;;
+ 29A9;MEASURED ANGLE WITH OPEN ARM ENDING IN ARROW POINTING UP AND LEFT;Sm;0;ON;;;;;Y;;;;;
+ 29AA;MEASURED ANGLE WITH OPEN ARM ENDING IN ARROW POINTING DOWN AND RIGHT;Sm;0;ON;;;;;Y;;;;;
+ 29AB;MEASURED ANGLE WITH OPEN ARM ENDING IN ARROW POINTING DOWN AND LEFT;Sm;0;ON;;;;;Y;;;;;
+ 29AC;MEASURED ANGLE WITH OPEN ARM ENDING IN ARROW POINTING RIGHT AND UP;Sm;0;ON;;;;;Y;;;;;
+ 29AD;MEASURED ANGLE WITH OPEN ARM ENDING IN ARROW POINTING LEFT AND UP;Sm;0;ON;;;;;Y;;;;;
+ 29AE;MEASURED ANGLE WITH OPEN ARM ENDING IN ARROW POINTING RIGHT AND DOWN;Sm;0;ON;;;;;Y;;;;;
+ 29AF;MEASURED ANGLE WITH OPEN ARM ENDING IN ARROW POINTING LEFT AND DOWN;Sm;0;ON;;;;;Y;;;;;
+ 29B0;REVERSED EMPTY SET;Sm;0;ON;;;;;N;;;;;
+ 29B1;EMPTY SET WITH OVERBAR;Sm;0;ON;;;;;N;;;;;
+ 29B2;EMPTY SET WITH SMALL CIRCLE ABOVE;Sm;0;ON;;;;;N;;;;;
+ 29B3;EMPTY SET WITH RIGHT ARROW ABOVE;Sm;0;ON;;;;;N;;;;;
+ 29B4;EMPTY SET WITH LEFT ARROW ABOVE;Sm;0;ON;;;;;N;;;;;
+ 29B5;CIRCLE WITH HORIZONTAL BAR;Sm;0;ON;;;;;N;;;;;
+ 29B6;CIRCLED VERTICAL BAR;Sm;0;ON;;;;;N;;;;;
+ 29B7;CIRCLED PARALLEL;Sm;0;ON;;;;;N;;;;;
+ 29B8;CIRCLED REVERSE SOLIDUS;Sm;0;ON;;;;;Y;;;;;
+ 29B9;CIRCLED PERPENDICULAR;Sm;0;ON;;;;;N;;;;;
+ 29BA;CIRCLE DIVIDED BY HORIZONTAL BAR AND TOP HALF DIVIDED BY VERTICAL BAR;Sm;0;ON;;;;;N;;;;;
+ 29BB;CIRCLE WITH SUPERIMPOSED X;Sm;0;ON;;;;;N;;;;;
+ 29BC;CIRCLED ANTICLOCKWISE-ROTATED DIVISION SIGN;Sm;0;ON;;;;;N;;;;;
+ 29BD;UP ARROW THROUGH CIRCLE;Sm;0;ON;;;;;N;;;;;
+ 29BE;CIRCLED WHITE BULLET;Sm;0;ON;;;;;N;;;;;
+ 29BF;CIRCLED BULLET;Sm;0;ON;;;;;N;;;;;
+ 29C0;CIRCLED LESS-THAN;Sm;0;ON;;;;;Y;;;;;
+ 29C1;CIRCLED GREATER-THAN;Sm;0;ON;;;;;Y;;;;;
+ 29C2;CIRCLE WITH SMALL CIRCLE TO THE RIGHT;Sm;0;ON;;;;;Y;;;;;
+ 29C3;CIRCLE WITH TWO HORIZONTAL STROKES TO THE RIGHT;Sm;0;ON;;;;;Y;;;;;
+ 29C4;SQUARED RISING DIAGONAL SLASH;Sm;0;ON;;;;;Y;;;;;
+ 29C5;SQUARED FALLING DIAGONAL SLASH;Sm;0;ON;;;;;Y;;;;;
+ 29C6;SQUARED ASTERISK;Sm;0;ON;;;;;N;;;;;
+ 29C7;SQUARED SMALL CIRCLE;Sm;0;ON;;;;;N;;;;;
+ 29C8;SQUARED SQUARE;Sm;0;ON;;;;;N;;;;;
+ 29C9;TWO JOINED SQUARES;Sm;0;ON;;;;;Y;;;;;
+ 29CA;TRIANGLE WITH DOT ABOVE;Sm;0;ON;;;;;N;;;;;
+ 29CB;TRIANGLE WITH UNDERBAR;Sm;0;ON;;;;;N;;;;;
+ 29CC;S IN TRIANGLE;Sm;0;ON;;;;;N;;;;;
+ 29CD;TRIANGLE WITH SERIFS AT BOTTOM;Sm;0;ON;;;;;N;;;;;
+ 29CE;RIGHT TRIANGLE ABOVE LEFT TRIANGLE;Sm;0;ON;;;;;Y;;;;;
+ 29CF;LEFT TRIANGLE BESIDE VERTICAL BAR;Sm;0;ON;;;;;Y;;;;;
+ 29D0;VERTICAL BAR BESIDE RIGHT TRIANGLE;Sm;0;ON;;;;;Y;;;;;
+ 29D1;BOWTIE WITH LEFT HALF BLACK;Sm;0;ON;;;;;Y;;;;;
+ 29D2;BOWTIE WITH RIGHT HALF BLACK;Sm;0;ON;;;;;Y;;;;;
+ 29D3;BLACK BOWTIE;Sm;0;ON;;;;;N;;;;;
+ 29D4;TIMES WITH LEFT HALF BLACK;Sm;0;ON;;;;;Y;;;;;
+ 29D5;TIMES WITH RIGHT HALF BLACK;Sm;0;ON;;;;;Y;;;;;
+ 29D6;WHITE HOURGLASS;Sm;0;ON;;;;;N;;;;;
+ 29D7;BLACK HOURGLASS;Sm;0;ON;;;;;N;;;;;
+ 29D8;LEFT WIGGLY FENCE;Ps;0;ON;;;;;Y;;;;;
+ 29D9;RIGHT WIGGLY FENCE;Pe;0;ON;;;;;Y;;;;;
+ 29DA;LEFT DOUBLE WIGGLY FENCE;Ps;0;ON;;;;;Y;;;;;
+ 29DB;RIGHT DOUBLE WIGGLY FENCE;Pe;0;ON;;;;;Y;;;;;
+ 29DC;INCOMPLETE INFINITY;Sm;0;ON;;;;;Y;;;;;
+ 29DD;TIE OVER INFINITY;Sm;0;ON;;;;;N;;;;;
+ 29DE;INFINITY NEGATED WITH VERTICAL BAR;Sm;0;ON;;;;;N;;;;;
+ 29DF;DOUBLE-ENDED MULTIMAP;Sm;0;ON;;;;;N;;;;;
+ 29E0;SQUARE WITH CONTOURED OUTLINE;Sm;0;ON;;;;;N;;;;;
+ 29E1;INCREASES AS;Sm;0;ON;;;;;Y;;;;;
+ 29E2;SHUFFLE PRODUCT;Sm;0;ON;;;;;N;;;;;
+ 29E3;EQUALS SIGN AND SLANTED PARALLEL;Sm;0;ON;;;;;Y;;;;;
+ 29E4;EQUALS SIGN AND SLANTED PARALLEL WITH TILDE ABOVE;Sm;0;ON;;;;;Y;;;;;
+ 29E5;IDENTICAL TO AND SLANTED PARALLEL;Sm;0;ON;;;;;Y;;;;;
+ 29E6;GLEICH STARK;Sm;0;ON;;;;;N;;;;;
+ 29E7;THERMODYNAMIC;Sm;0;ON;;;;;N;;;;;
+ 29E8;DOWN-POINTING TRIANGLE WITH LEFT HALF BLACK;Sm;0;ON;;;;;Y;;;;;
+ 29E9;DOWN-POINTING TRIANGLE WITH RIGHT HALF BLACK;Sm;0;ON;;;;;Y;;;;;
+ 29EA;BLACK DIAMOND WITH DOWN ARROW;Sm;0;ON;;;;;N;;;;;
+ 29EB;BLACK LOZENGE;Sm;0;ON;;;;;N;;;;;
+ 29EC;WHITE CIRCLE WITH DOWN ARROW;Sm;0;ON;;;;;N;;;;;
+ 29ED;BLACK CIRCLE WITH DOWN ARROW;Sm;0;ON;;;;;N;;;;;
+ 29EE;ERROR-BARRED WHITE SQUARE;Sm;0;ON;;;;;N;;;;;
+ 29EF;ERROR-BARRED BLACK SQUARE;Sm;0;ON;;;;;N;;;;;
+ 29F0;ERROR-BARRED WHITE DIAMOND;Sm;0;ON;;;;;N;;;;;
+ 29F1;ERROR-BARRED BLACK DIAMOND;Sm;0;ON;;;;;N;;;;;
+ 29F2;ERROR-BARRED WHITE CIRCLE;Sm;0;ON;;;;;N;;;;;
+ 29F3;ERROR-BARRED BLACK CIRCLE;Sm;0;ON;;;;;N;;;;;
+ 29F4;RULE-DELAYED;Sm;0;ON;;;;;Y;;;;;
+ 29F5;REVERSE SOLIDUS OPERATOR;Sm;0;ON;;;;;Y;;;;;
+ 29F6;SOLIDUS WITH OVERBAR;Sm;0;ON;;;;;Y;;;;;
+ 29F7;REVERSE SOLIDUS WITH HORIZONTAL STROKE;Sm;0;ON;;;;;Y;;;;;
+ 29F8;BIG SOLIDUS;Sm;0;ON;;;;;Y;;;;;
+ 29F9;BIG REVERSE SOLIDUS;Sm;0;ON;;;;;Y;;;;;
+ 29FA;DOUBLE PLUS;Sm;0;ON;;;;;N;;;;;
+ 29FB;TRIPLE PLUS;Sm;0;ON;;;;;N;;;;;
+ 29FC;LEFT-POINTING CURVED ANGLE BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 29FD;RIGHT-POINTING CURVED ANGLE BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 29FE;TINY;Sm;0;ON;;;;;N;;;;;
+ 29FF;MINY;Sm;0;ON;;;;;N;;;;;
+ 2A00;N-ARY CIRCLED DOT OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2A01;N-ARY CIRCLED PLUS OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2A02;N-ARY CIRCLED TIMES OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2A03;N-ARY UNION OPERATOR WITH DOT;Sm;0;ON;;;;;N;;;;;
+ 2A04;N-ARY UNION OPERATOR WITH PLUS;Sm;0;ON;;;;;N;;;;;
+ 2A05;N-ARY SQUARE INTERSECTION OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2A06;N-ARY SQUARE UNION OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2A07;TWO LOGICAL AND OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2A08;TWO LOGICAL OR OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2A09;N-ARY TIMES OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2A0A;MODULO TWO SUM;Sm;0;ON;;;;;Y;;;;;
+ 2A0B;SUMMATION WITH INTEGRAL;Sm;0;ON;;;;;Y;;;;;
+ 2A0C;QUADRUPLE INTEGRAL OPERATOR;Sm;0;ON;<compat> 222B 222B 222B 222B;;;;Y;;;;;
+ 2A0D;FINITE PART INTEGRAL;Sm;0;ON;;;;;Y;;;;;
+ 2A0E;INTEGRAL WITH DOUBLE STROKE;Sm;0;ON;;;;;Y;;;;;
+ 2A0F;INTEGRAL AVERAGE WITH SLASH;Sm;0;ON;;;;;Y;;;;;
+ 2A10;CIRCULATION FUNCTION;Sm;0;ON;;;;;Y;;;;;
+ 2A11;ANTICLOCKWISE INTEGRATION;Sm;0;ON;;;;;Y;;;;;
+ 2A12;LINE INTEGRATION WITH RECTANGULAR PATH AROUND POLE;Sm;0;ON;;;;;Y;;;;;
+ 2A13;LINE INTEGRATION WITH SEMICIRCULAR PATH AROUND POLE;Sm;0;ON;;;;;Y;;;;;
+ 2A14;LINE INTEGRATION NOT INCLUDING THE POLE;Sm;0;ON;;;;;Y;;;;;
+ 2A15;INTEGRAL AROUND A POINT OPERATOR;Sm;0;ON;;;;;Y;;;;;
+ 2A16;QUATERNION INTEGRAL OPERATOR;Sm;0;ON;;;;;Y;;;;;
+ 2A17;INTEGRAL WITH LEFTWARDS ARROW WITH HOOK;Sm;0;ON;;;;;Y;;;;;
+ 2A18;INTEGRAL WITH TIMES SIGN;Sm;0;ON;;;;;Y;;;;;
+ 2A19;INTEGRAL WITH INTERSECTION;Sm;0;ON;;;;;Y;;;;;
+ 2A1A;INTEGRAL WITH UNION;Sm;0;ON;;;;;Y;;;;;
+ 2A1B;INTEGRAL WITH OVERBAR;Sm;0;ON;;;;;Y;;;;;
+ 2A1C;INTEGRAL WITH UNDERBAR;Sm;0;ON;;;;;Y;;;;;
+ 2A1D;JOIN;Sm;0;ON;;;;;N;;;;;
+ 2A1E;LARGE LEFT TRIANGLE OPERATOR;Sm;0;ON;;;;;Y;;;;;
+ 2A1F;Z NOTATION SCHEMA COMPOSITION;Sm;0;ON;;;;;Y;;;;;
+ 2A20;Z NOTATION SCHEMA PIPING;Sm;0;ON;;;;;Y;;;;;
+ 2A21;Z NOTATION SCHEMA PROJECTION;Sm;0;ON;;;;;Y;;;;;
+ 2A22;PLUS SIGN WITH SMALL CIRCLE ABOVE;Sm;0;ON;;;;;N;;;;;
+ 2A23;PLUS SIGN WITH CIRCUMFLEX ACCENT ABOVE;Sm;0;ON;;;;;N;;;;;
+ 2A24;PLUS SIGN WITH TILDE ABOVE;Sm;0;ON;;;;;Y;;;;;
+ 2A25;PLUS SIGN WITH DOT BELOW;Sm;0;ON;;;;;N;;;;;
+ 2A26;PLUS SIGN WITH TILDE BELOW;Sm;0;ON;;;;;Y;;;;;
+ 2A27;PLUS SIGN WITH SUBSCRIPT TWO;Sm;0;ON;;;;;N;;;;;
+ 2A28;PLUS SIGN WITH BLACK TRIANGLE;Sm;0;ON;;;;;N;;;;;
+ 2A29;MINUS SIGN WITH COMMA ABOVE;Sm;0;ON;;;;;Y;;;;;
+ 2A2A;MINUS SIGN WITH DOT BELOW;Sm;0;ON;;;;;N;;;;;
+ 2A2B;MINUS SIGN WITH FALLING DOTS;Sm;0;ON;;;;;Y;;;;;
+ 2A2C;MINUS SIGN WITH RISING DOTS;Sm;0;ON;;;;;Y;;;;;
+ 2A2D;PLUS SIGN IN LEFT HALF CIRCLE;Sm;0;ON;;;;;Y;;;;;
+ 2A2E;PLUS SIGN IN RIGHT HALF CIRCLE;Sm;0;ON;;;;;Y;;;;;
+ 2A2F;VECTOR OR CROSS PRODUCT;Sm;0;ON;;;;;N;;;;;
+ 2A30;MULTIPLICATION SIGN WITH DOT ABOVE;Sm;0;ON;;;;;N;;;;;
+ 2A31;MULTIPLICATION SIGN WITH UNDERBAR;Sm;0;ON;;;;;N;;;;;
+ 2A32;SEMIDIRECT PRODUCT WITH BOTTOM CLOSED;Sm;0;ON;;;;;N;;;;;
+ 2A33;SMASH PRODUCT;Sm;0;ON;;;;;N;;;;;
+ 2A34;MULTIPLICATION SIGN IN LEFT HALF CIRCLE;Sm;0;ON;;;;;Y;;;;;
+ 2A35;MULTIPLICATION SIGN IN RIGHT HALF CIRCLE;Sm;0;ON;;;;;Y;;;;;
+ 2A36;CIRCLED MULTIPLICATION SIGN WITH CIRCUMFLEX ACCENT;Sm;0;ON;;;;;N;;;;;
+ 2A37;MULTIPLICATION SIGN IN DOUBLE CIRCLE;Sm;0;ON;;;;;N;;;;;
+ 2A38;CIRCLED DIVISION SIGN;Sm;0;ON;;;;;N;;;;;
+ 2A39;PLUS SIGN IN TRIANGLE;Sm;0;ON;;;;;N;;;;;
+ 2A3A;MINUS SIGN IN TRIANGLE;Sm;0;ON;;;;;N;;;;;
+ 2A3B;MULTIPLICATION SIGN IN TRIANGLE;Sm;0;ON;;;;;N;;;;;
+ 2A3C;INTERIOR PRODUCT;Sm;0;ON;;;;;Y;;;;;
+ 2A3D;RIGHTHAND INTERIOR PRODUCT;Sm;0;ON;;;;;Y;;;;;
+ 2A3E;Z NOTATION RELATIONAL COMPOSITION;Sm;0;ON;;;;;Y;;;;;
+ 2A3F;AMALGAMATION OR COPRODUCT;Sm;0;ON;;;;;N;;;;;
+ 2A40;INTERSECTION WITH DOT;Sm;0;ON;;;;;N;;;;;
+ 2A41;UNION WITH MINUS SIGN;Sm;0;ON;;;;;N;;;;;
+ 2A42;UNION WITH OVERBAR;Sm;0;ON;;;;;N;;;;;
+ 2A43;INTERSECTION WITH OVERBAR;Sm;0;ON;;;;;N;;;;;
+ 2A44;INTERSECTION WITH LOGICAL AND;Sm;0;ON;;;;;N;;;;;
+ 2A45;UNION WITH LOGICAL OR;Sm;0;ON;;;;;N;;;;;
+ 2A46;UNION ABOVE INTERSECTION;Sm;0;ON;;;;;N;;;;;
+ 2A47;INTERSECTION ABOVE UNION;Sm;0;ON;;;;;N;;;;;
+ 2A48;UNION ABOVE BAR ABOVE INTERSECTION;Sm;0;ON;;;;;N;;;;;
+ 2A49;INTERSECTION ABOVE BAR ABOVE UNION;Sm;0;ON;;;;;N;;;;;
+ 2A4A;UNION BESIDE AND JOINED WITH UNION;Sm;0;ON;;;;;N;;;;;
+ 2A4B;INTERSECTION BESIDE AND JOINED WITH INTERSECTION;Sm;0;ON;;;;;N;;;;;
+ 2A4C;CLOSED UNION WITH SERIFS;Sm;0;ON;;;;;N;;;;;
+ 2A4D;CLOSED INTERSECTION WITH SERIFS;Sm;0;ON;;;;;N;;;;;
+ 2A4E;DOUBLE SQUARE INTERSECTION;Sm;0;ON;;;;;N;;;;;
+ 2A4F;DOUBLE SQUARE UNION;Sm;0;ON;;;;;N;;;;;
+ 2A50;CLOSED UNION WITH SERIFS AND SMASH PRODUCT;Sm;0;ON;;;;;N;;;;;
+ 2A51;LOGICAL AND WITH DOT ABOVE;Sm;0;ON;;;;;N;;;;;
+ 2A52;LOGICAL OR WITH DOT ABOVE;Sm;0;ON;;;;;N;;;;;
+ 2A53;DOUBLE LOGICAL AND;Sm;0;ON;;;;;N;;;;;
+ 2A54;DOUBLE LOGICAL OR;Sm;0;ON;;;;;N;;;;;
+ 2A55;TWO INTERSECTING LOGICAL AND;Sm;0;ON;;;;;N;;;;;
+ 2A56;TWO INTERSECTING LOGICAL OR;Sm;0;ON;;;;;N;;;;;
+ 2A57;SLOPING LARGE OR;Sm;0;ON;;;;;Y;;;;;
+ 2A58;SLOPING LARGE AND;Sm;0;ON;;;;;Y;;;;;
+ 2A59;LOGICAL OR OVERLAPPING LOGICAL AND;Sm;0;ON;;;;;N;;;;;
+ 2A5A;LOGICAL AND WITH MIDDLE STEM;Sm;0;ON;;;;;N;;;;;
+ 2A5B;LOGICAL OR WITH MIDDLE STEM;Sm;0;ON;;;;;N;;;;;
+ 2A5C;LOGICAL AND WITH HORIZONTAL DASH;Sm;0;ON;;;;;N;;;;;
+ 2A5D;LOGICAL OR WITH HORIZONTAL DASH;Sm;0;ON;;;;;N;;;;;
+ 2A5E;LOGICAL AND WITH DOUBLE OVERBAR;Sm;0;ON;;;;;N;;;;;
+ 2A5F;LOGICAL AND WITH UNDERBAR;Sm;0;ON;;;;;N;;;;;
+ 2A60;LOGICAL AND WITH DOUBLE UNDERBAR;Sm;0;ON;;;;;N;;;;;
+ 2A61;SMALL VEE WITH UNDERBAR;Sm;0;ON;;;;;N;;;;;
+ 2A62;LOGICAL OR WITH DOUBLE OVERBAR;Sm;0;ON;;;;;N;;;;;
+ 2A63;LOGICAL OR WITH DOUBLE UNDERBAR;Sm;0;ON;;;;;N;;;;;
+ 2A64;Z NOTATION DOMAIN ANTIRESTRICTION;Sm;0;ON;;;;;Y;;;;;
+ 2A65;Z NOTATION RANGE ANTIRESTRICTION;Sm;0;ON;;;;;Y;;;;;
+ 2A66;EQUALS SIGN WITH DOT BELOW;Sm;0;ON;;;;;N;;;;;
+ 2A67;IDENTICAL WITH DOT ABOVE;Sm;0;ON;;;;;N;;;;;
+ 2A68;TRIPLE HORIZONTAL BAR WITH DOUBLE VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2A69;TRIPLE HORIZONTAL BAR WITH TRIPLE VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2A6A;TILDE OPERATOR WITH DOT ABOVE;Sm;0;ON;;;;;Y;;;;;
+ 2A6B;TILDE OPERATOR WITH RISING DOTS;Sm;0;ON;;;;;Y;;;;;
+ 2A6C;SIMILAR MINUS SIMILAR;Sm;0;ON;;;;;Y;;;;;
+ 2A6D;CONGRUENT WITH DOT ABOVE;Sm;0;ON;;;;;Y;;;;;
+ 2A6E;EQUALS WITH ASTERISK;Sm;0;ON;;;;;N;;;;;
+ 2A6F;ALMOST EQUAL TO WITH CIRCUMFLEX ACCENT;Sm;0;ON;;;;;Y;;;;;
+ 2A70;APPROXIMATELY EQUAL OR EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2A71;EQUALS SIGN ABOVE PLUS SIGN;Sm;0;ON;;;;;N;;;;;
+ 2A72;PLUS SIGN ABOVE EQUALS SIGN;Sm;0;ON;;;;;N;;;;;
+ 2A73;EQUALS SIGN ABOVE TILDE OPERATOR;Sm;0;ON;;;;;Y;;;;;
+ 2A74;DOUBLE COLON EQUAL;Sm;0;ON;<compat> 003A 003A 003D;;;;Y;;;;;
+ 2A75;TWO CONSECUTIVE EQUALS SIGNS;Sm;0;ON;<compat> 003D 003D;;;;N;;;;;
+ 2A76;THREE CONSECUTIVE EQUALS SIGNS;Sm;0;ON;<compat> 003D 003D 003D;;;;N;;;;;
+ 2A77;EQUALS SIGN WITH TWO DOTS ABOVE AND TWO DOTS BELOW;Sm;0;ON;;;;;N;;;;;
+ 2A78;EQUIVALENT WITH FOUR DOTS ABOVE;Sm;0;ON;;;;;N;;;;;
+ 2A79;LESS-THAN WITH CIRCLE INSIDE;Sm;0;ON;;;;;Y;;;;;
+ 2A7A;GREATER-THAN WITH CIRCLE INSIDE;Sm;0;ON;;;;;Y;;;;;
+ 2A7B;LESS-THAN WITH QUESTION MARK ABOVE;Sm;0;ON;;;;;Y;;;;;
+ 2A7C;GREATER-THAN WITH QUESTION MARK ABOVE;Sm;0;ON;;;;;Y;;;;;
+ 2A7D;LESS-THAN OR SLANTED EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2A7E;GREATER-THAN OR SLANTED EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2A7F;LESS-THAN OR SLANTED EQUAL TO WITH DOT INSIDE;Sm;0;ON;;;;;Y;;;;;
+ 2A80;GREATER-THAN OR SLANTED EQUAL TO WITH DOT INSIDE;Sm;0;ON;;;;;Y;;;;;
+ 2A81;LESS-THAN OR SLANTED EQUAL TO WITH DOT ABOVE;Sm;0;ON;;;;;Y;;;;;
+ 2A82;GREATER-THAN OR SLANTED EQUAL TO WITH DOT ABOVE;Sm;0;ON;;;;;Y;;;;;
+ 2A83;LESS-THAN OR SLANTED EQUAL TO WITH DOT ABOVE RIGHT;Sm;0;ON;;;;;Y;;;;;
+ 2A84;GREATER-THAN OR SLANTED EQUAL TO WITH DOT ABOVE LEFT;Sm;0;ON;;;;;Y;;;;;
+ 2A85;LESS-THAN OR APPROXIMATE;Sm;0;ON;;;;;Y;;;;;
+ 2A86;GREATER-THAN OR APPROXIMATE;Sm;0;ON;;;;;Y;;;;;
+ 2A87;LESS-THAN AND SINGLE-LINE NOT EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2A88;GREATER-THAN AND SINGLE-LINE NOT EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2A89;LESS-THAN AND NOT APPROXIMATE;Sm;0;ON;;;;;Y;;;;;
+ 2A8A;GREATER-THAN AND NOT APPROXIMATE;Sm;0;ON;;;;;Y;;;;;
+ 2A8B;LESS-THAN ABOVE DOUBLE-LINE EQUAL ABOVE GREATER-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2A8C;GREATER-THAN ABOVE DOUBLE-LINE EQUAL ABOVE LESS-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2A8D;LESS-THAN ABOVE SIMILAR OR EQUAL;Sm;0;ON;;;;;Y;;;;;
+ 2A8E;GREATER-THAN ABOVE SIMILAR OR EQUAL;Sm;0;ON;;;;;Y;;;;;
+ 2A8F;LESS-THAN ABOVE SIMILAR ABOVE GREATER-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2A90;GREATER-THAN ABOVE SIMILAR ABOVE LESS-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2A91;LESS-THAN ABOVE GREATER-THAN ABOVE DOUBLE-LINE EQUAL;Sm;0;ON;;;;;Y;;;;;
+ 2A92;GREATER-THAN ABOVE LESS-THAN ABOVE DOUBLE-LINE EQUAL;Sm;0;ON;;;;;Y;;;;;
+ 2A93;LESS-THAN ABOVE SLANTED EQUAL ABOVE GREATER-THAN ABOVE SLANTED EQUAL;Sm;0;ON;;;;;Y;;;;;
+ 2A94;GREATER-THAN ABOVE SLANTED EQUAL ABOVE LESS-THAN ABOVE SLANTED EQUAL;Sm;0;ON;;;;;Y;;;;;
+ 2A95;SLANTED EQUAL TO OR LESS-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2A96;SLANTED EQUAL TO OR GREATER-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2A97;SLANTED EQUAL TO OR LESS-THAN WITH DOT INSIDE;Sm;0;ON;;;;;Y;;;;;
+ 2A98;SLANTED EQUAL TO OR GREATER-THAN WITH DOT INSIDE;Sm;0;ON;;;;;Y;;;;;
+ 2A99;DOUBLE-LINE EQUAL TO OR LESS-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2A9A;DOUBLE-LINE EQUAL TO OR GREATER-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2A9B;DOUBLE-LINE SLANTED EQUAL TO OR LESS-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2A9C;DOUBLE-LINE SLANTED EQUAL TO OR GREATER-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2A9D;SIMILAR OR LESS-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2A9E;SIMILAR OR GREATER-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2A9F;SIMILAR ABOVE LESS-THAN ABOVE EQUALS SIGN;Sm;0;ON;;;;;Y;;;;;
+ 2AA0;SIMILAR ABOVE GREATER-THAN ABOVE EQUALS SIGN;Sm;0;ON;;;;;Y;;;;;
+ 2AA1;DOUBLE NESTED LESS-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2AA2;DOUBLE NESTED GREATER-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2AA3;DOUBLE NESTED LESS-THAN WITH UNDERBAR;Sm;0;ON;;;;;Y;;;;;
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+ 2AA5;GREATER-THAN BESIDE LESS-THAN;Sm;0;ON;;;;;N;;;;;
+ 2AA6;LESS-THAN CLOSED BY CURVE;Sm;0;ON;;;;;Y;;;;;
+ 2AA7;GREATER-THAN CLOSED BY CURVE;Sm;0;ON;;;;;Y;;;;;
+ 2AA8;LESS-THAN CLOSED BY CURVE ABOVE SLANTED EQUAL;Sm;0;ON;;;;;Y;;;;;
+ 2AA9;GREATER-THAN CLOSED BY CURVE ABOVE SLANTED EQUAL;Sm;0;ON;;;;;Y;;;;;
+ 2AAA;SMALLER THAN;Sm;0;ON;;;;;Y;;;;;
+ 2AAB;LARGER THAN;Sm;0;ON;;;;;Y;;;;;
+ 2AAC;SMALLER THAN OR EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2AAD;LARGER THAN OR EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2AAE;EQUALS SIGN WITH BUMPY ABOVE;Sm;0;ON;;;;;N;;;;;
+ 2AAF;PRECEDES ABOVE SINGLE-LINE EQUALS SIGN;Sm;0;ON;;;;;Y;;;;;
+ 2AB0;SUCCEEDS ABOVE SINGLE-LINE EQUALS SIGN;Sm;0;ON;;;;;Y;;;;;
+ 2AB1;PRECEDES ABOVE SINGLE-LINE NOT EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2AB2;SUCCEEDS ABOVE SINGLE-LINE NOT EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2AB3;PRECEDES ABOVE EQUALS SIGN;Sm;0;ON;;;;;Y;;;;;
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+ 2AB7;PRECEDES ABOVE ALMOST EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2AB8;SUCCEEDS ABOVE ALMOST EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2AB9;PRECEDES ABOVE NOT ALMOST EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2ABA;SUCCEEDS ABOVE NOT ALMOST EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2ABB;DOUBLE PRECEDES;Sm;0;ON;;;;;Y;;;;;
+ 2ABC;DOUBLE SUCCEEDS;Sm;0;ON;;;;;Y;;;;;
+ 2ABD;SUBSET WITH DOT;Sm;0;ON;;;;;Y;;;;;
+ 2ABE;SUPERSET WITH DOT;Sm;0;ON;;;;;Y;;;;;
+ 2ABF;SUBSET WITH PLUS SIGN BELOW;Sm;0;ON;;;;;Y;;;;;
+ 2AC0;SUPERSET WITH PLUS SIGN BELOW;Sm;0;ON;;;;;Y;;;;;
+ 2AC1;SUBSET WITH MULTIPLICATION SIGN BELOW;Sm;0;ON;;;;;Y;;;;;
+ 2AC2;SUPERSET WITH MULTIPLICATION SIGN BELOW;Sm;0;ON;;;;;Y;;;;;
+ 2AC3;SUBSET OF OR EQUAL TO WITH DOT ABOVE;Sm;0;ON;;;;;Y;;;;;
+ 2AC4;SUPERSET OF OR EQUAL TO WITH DOT ABOVE;Sm;0;ON;;;;;Y;;;;;
+ 2AC5;SUBSET OF ABOVE EQUALS SIGN;Sm;0;ON;;;;;Y;;;;;
+ 2AC6;SUPERSET OF ABOVE EQUALS SIGN;Sm;0;ON;;;;;Y;;;;;
+ 2AC7;SUBSET OF ABOVE TILDE OPERATOR;Sm;0;ON;;;;;Y;;;;;
+ 2AC8;SUPERSET OF ABOVE TILDE OPERATOR;Sm;0;ON;;;;;Y;;;;;
+ 2AC9;SUBSET OF ABOVE ALMOST EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2ACA;SUPERSET OF ABOVE ALMOST EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2ACB;SUBSET OF ABOVE NOT EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2ACC;SUPERSET OF ABOVE NOT EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2ACD;SQUARE LEFT OPEN BOX OPERATOR;Sm;0;ON;;;;;Y;;;;;
+ 2ACE;SQUARE RIGHT OPEN BOX OPERATOR;Sm;0;ON;;;;;Y;;;;;
+ 2ACF;CLOSED SUBSET;Sm;0;ON;;;;;Y;;;;;
+ 2AD0;CLOSED SUPERSET;Sm;0;ON;;;;;Y;;;;;
+ 2AD1;CLOSED SUBSET OR EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2AD2;CLOSED SUPERSET OR EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2AD3;SUBSET ABOVE SUPERSET;Sm;0;ON;;;;;Y;;;;;
+ 2AD4;SUPERSET ABOVE SUBSET;Sm;0;ON;;;;;Y;;;;;
+ 2AD5;SUBSET ABOVE SUBSET;Sm;0;ON;;;;;Y;;;;;
+ 2AD6;SUPERSET ABOVE SUPERSET;Sm;0;ON;;;;;Y;;;;;
+ 2AD7;SUPERSET BESIDE SUBSET;Sm;0;ON;;;;;N;;;;;
+ 2AD8;SUPERSET BESIDE AND JOINED BY DASH WITH SUBSET;Sm;0;ON;;;;;N;;;;;
+ 2AD9;ELEMENT OF OPENING DOWNWARDS;Sm;0;ON;;;;;N;;;;;
+ 2ADA;PITCHFORK WITH TEE TOP;Sm;0;ON;;;;;N;;;;;
+ 2ADB;TRANSVERSAL INTERSECTION;Sm;0;ON;;;;;N;;;;;
+ 2ADC;FORKING;Sm;0;ON;2ADD 0338;;;;Y;;;;;
+ 2ADD;NONFORKING;Sm;0;ON;;;;;N;;;;;
+ 2ADE;SHORT LEFT TACK;Sm;0;ON;;;;;Y;;;;;
+ 2ADF;SHORT DOWN TACK;Sm;0;ON;;;;;N;;;;;
+ 2AE0;SHORT UP TACK;Sm;0;ON;;;;;N;;;;;
+ 2AE1;PERPENDICULAR WITH S;Sm;0;ON;;;;;N;;;;;
+ 2AE2;VERTICAL BAR TRIPLE RIGHT TURNSTILE;Sm;0;ON;;;;;Y;;;;;
+ 2AE3;DOUBLE VERTICAL BAR LEFT TURNSTILE;Sm;0;ON;;;;;Y;;;;;
+ 2AE4;VERTICAL BAR DOUBLE LEFT TURNSTILE;Sm;0;ON;;;;;Y;;;;;
+ 2AE5;DOUBLE VERTICAL BAR DOUBLE LEFT TURNSTILE;Sm;0;ON;;;;;Y;;;;;
+ 2AE6;LONG DASH FROM LEFT MEMBER OF DOUBLE VERTICAL;Sm;0;ON;;;;;Y;;;;;
+ 2AE7;SHORT DOWN TACK WITH OVERBAR;Sm;0;ON;;;;;N;;;;;
+ 2AE8;SHORT UP TACK WITH UNDERBAR;Sm;0;ON;;;;;N;;;;;
+ 2AE9;SHORT UP TACK ABOVE SHORT DOWN TACK;Sm;0;ON;;;;;N;;;;;
+ 2AEA;DOUBLE DOWN TACK;Sm;0;ON;;;;;N;;;;;
+ 2AEB;DOUBLE UP TACK;Sm;0;ON;;;;;N;;;;;
+ 2AEC;DOUBLE STROKE NOT SIGN;Sm;0;ON;;;;;Y;;;;;
+ 2AED;REVERSED DOUBLE STROKE NOT SIGN;Sm;0;ON;;;;;Y;;;;;
+ 2AEE;DOES NOT DIVIDE WITH REVERSED NEGATION SLASH;Sm;0;ON;;;;;Y;;;;;
+ 2AEF;VERTICAL LINE WITH CIRCLE ABOVE;Sm;0;ON;;;;;N;;;;;
+ 2AF0;VERTICAL LINE WITH CIRCLE BELOW;Sm;0;ON;;;;;N;;;;;
+ 2AF1;DOWN TACK WITH CIRCLE BELOW;Sm;0;ON;;;;;N;;;;;
+ 2AF2;PARALLEL WITH HORIZONTAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2AF3;PARALLEL WITH TILDE OPERATOR;Sm;0;ON;;;;;Y;;;;;
+ 2AF4;TRIPLE VERTICAL BAR BINARY RELATION;Sm;0;ON;;;;;N;;;;;
+ 2AF5;TRIPLE VERTICAL BAR WITH HORIZONTAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2AF6;TRIPLE COLON OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2AF7;TRIPLE NESTED LESS-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2AF8;TRIPLE NESTED GREATER-THAN;Sm;0;ON;;;;;Y;;;;;
+ 2AF9;DOUBLE-LINE SLANTED LESS-THAN OR EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2AFA;DOUBLE-LINE SLANTED GREATER-THAN OR EQUAL TO;Sm;0;ON;;;;;Y;;;;;
+ 2AFB;TRIPLE SOLIDUS BINARY RELATION;Sm;0;ON;;;;;Y;;;;;
+ 2AFC;LARGE TRIPLE VERTICAL BAR OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2AFD;DOUBLE SOLIDUS OPERATOR;Sm;0;ON;;;;;Y;;;;;
+ 2AFE;WHITE VERTICAL BAR;Sm;0;ON;;;;;N;;;;;
+ 2AFF;N-ARY WHITE VERTICAL BAR;Sm;0;ON;;;;;N;;;;;
+ 2B00;NORTH EAST WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 2B01;NORTH WEST WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 2B02;SOUTH EAST WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 2B03;SOUTH WEST WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 2B04;LEFT RIGHT WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 2B05;LEFTWARDS BLACK ARROW;So;0;ON;;;;;N;;;;;
+ 2B06;UPWARDS BLACK ARROW;So;0;ON;;;;;N;;;;;
+ 2B07;DOWNWARDS BLACK ARROW;So;0;ON;;;;;N;;;;;
+ 2B08;NORTH EAST BLACK ARROW;So;0;ON;;;;;N;;;;;
+ 2B09;NORTH WEST BLACK ARROW;So;0;ON;;;;;N;;;;;
+ 2B0A;SOUTH EAST BLACK ARROW;So;0;ON;;;;;N;;;;;
+ 2B0B;SOUTH WEST BLACK ARROW;So;0;ON;;;;;N;;;;;
+ 2B0C;LEFT RIGHT BLACK ARROW;So;0;ON;;;;;N;;;;;
+ 2B0D;UP DOWN BLACK ARROW;So;0;ON;;;;;N;;;;;
+ 2B0E;RIGHTWARDS ARROW WITH TIP DOWNWARDS;So;0;ON;;;;;N;;;;;
+ 2B0F;RIGHTWARDS ARROW WITH TIP UPWARDS;So;0;ON;;;;;N;;;;;
+ 2B10;LEFTWARDS ARROW WITH TIP DOWNWARDS;So;0;ON;;;;;N;;;;;
+ 2B11;LEFTWARDS ARROW WITH TIP UPWARDS;So;0;ON;;;;;N;;;;;
+ 2B12;SQUARE WITH TOP HALF BLACK;So;0;ON;;;;;N;;;;;
+ 2B13;SQUARE WITH BOTTOM HALF BLACK;So;0;ON;;;;;N;;;;;
+ 2B14;SQUARE WITH UPPER RIGHT DIAGONAL HALF BLACK;So;0;ON;;;;;N;;;;;
+ 2B15;SQUARE WITH LOWER LEFT DIAGONAL HALF BLACK;So;0;ON;;;;;N;;;;;
+ 2B16;DIAMOND WITH LEFT HALF BLACK;So;0;ON;;;;;N;;;;;
+ 2B17;DIAMOND WITH RIGHT HALF BLACK;So;0;ON;;;;;N;;;;;
+ 2B18;DIAMOND WITH TOP HALF BLACK;So;0;ON;;;;;N;;;;;
+ 2B19;DIAMOND WITH BOTTOM HALF BLACK;So;0;ON;;;;;N;;;;;
+ 2B1A;DOTTED SQUARE;So;0;ON;;;;;N;;;;;
+ 2B1B;BLACK LARGE SQUARE;So;0;ON;;;;;N;;;;;
+ 2B1C;WHITE LARGE SQUARE;So;0;ON;;;;;N;;;;;
+ 2B1D;BLACK VERY SMALL SQUARE;So;0;ON;;;;;N;;;;;
+ 2B1E;WHITE VERY SMALL SQUARE;So;0;ON;;;;;N;;;;;
+ 2B1F;BLACK PENTAGON;So;0;ON;;;;;N;;;;;
+ 2B20;WHITE PENTAGON;So;0;ON;;;;;N;;;;;
+ 2B21;WHITE HEXAGON;So;0;ON;;;;;N;;;;;
+ 2B22;BLACK HEXAGON;So;0;ON;;;;;N;;;;;
+ 2B23;HORIZONTAL BLACK HEXAGON;So;0;ON;;;;;N;;;;;
+ 2B24;BLACK LARGE CIRCLE;So;0;ON;;;;;N;;;;;
+ 2B25;BLACK MEDIUM DIAMOND;So;0;ON;;;;;N;;;;;
+ 2B26;WHITE MEDIUM DIAMOND;So;0;ON;;;;;N;;;;;
+ 2B27;BLACK MEDIUM LOZENGE;So;0;ON;;;;;N;;;;;
+ 2B28;WHITE MEDIUM LOZENGE;So;0;ON;;;;;N;;;;;
+ 2B29;BLACK SMALL DIAMOND;So;0;ON;;;;;N;;;;;
+ 2B2A;BLACK SMALL LOZENGE;So;0;ON;;;;;N;;;;;
+ 2B2B;WHITE SMALL LOZENGE;So;0;ON;;;;;N;;;;;
+ 2B2C;BLACK HORIZONTAL ELLIPSE;So;0;ON;;;;;N;;;;;
+ 2B2D;WHITE HORIZONTAL ELLIPSE;So;0;ON;;;;;N;;;;;
+ 2B2E;BLACK VERTICAL ELLIPSE;So;0;ON;;;;;N;;;;;
+ 2B2F;WHITE VERTICAL ELLIPSE;So;0;ON;;;;;N;;;;;
+ 2B30;LEFT ARROW WITH SMALL CIRCLE;Sm;0;ON;;;;;N;;;;;
+ 2B31;THREE LEFTWARDS ARROWS;Sm;0;ON;;;;;N;;;;;
+ 2B32;LEFT ARROW WITH CIRCLED PLUS;Sm;0;ON;;;;;N;;;;;
+ 2B33;LONG LEFTWARDS SQUIGGLE ARROW;Sm;0;ON;;;;;N;;;;;
+ 2B34;LEFTWARDS TWO-HEADED ARROW WITH VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2B35;LEFTWARDS TWO-HEADED ARROW WITH DOUBLE VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2B36;LEFTWARDS TWO-HEADED ARROW FROM BAR;Sm;0;ON;;;;;N;;;;;
+ 2B37;LEFTWARDS TWO-HEADED TRIPLE DASH ARROW;Sm;0;ON;;;;;N;;;;;
+ 2B38;LEFTWARDS ARROW WITH DOTTED STEM;Sm;0;ON;;;;;N;;;;;
+ 2B39;LEFTWARDS ARROW WITH TAIL WITH VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2B3A;LEFTWARDS ARROW WITH TAIL WITH DOUBLE VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2B3B;LEFTWARDS TWO-HEADED ARROW WITH TAIL;Sm;0;ON;;;;;N;;;;;
+ 2B3C;LEFTWARDS TWO-HEADED ARROW WITH TAIL WITH VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2B3D;LEFTWARDS TWO-HEADED ARROW WITH TAIL WITH DOUBLE VERTICAL STROKE;Sm;0;ON;;;;;N;;;;;
+ 2B3E;LEFTWARDS ARROW THROUGH X;Sm;0;ON;;;;;N;;;;;
+ 2B3F;WAVE ARROW POINTING DIRECTLY LEFT;Sm;0;ON;;;;;N;;;;;
+ 2B40;EQUALS SIGN ABOVE LEFTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 2B41;REVERSE TILDE OPERATOR ABOVE LEFTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 2B42;LEFTWARDS ARROW ABOVE REVERSE ALMOST EQUAL TO;Sm;0;ON;;;;;N;;;;;
+ 2B43;RIGHTWARDS ARROW THROUGH GREATER-THAN;Sm;0;ON;;;;;N;;;;;
+ 2B44;RIGHTWARDS ARROW THROUGH SUPERSET;Sm;0;ON;;;;;N;;;;;
+ 2B45;LEFTWARDS QUADRUPLE ARROW;So;0;ON;;;;;N;;;;;
+ 2B46;RIGHTWARDS QUADRUPLE ARROW;So;0;ON;;;;;N;;;;;
+ 2B47;REVERSE TILDE OPERATOR ABOVE RIGHTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 2B48;RIGHTWARDS ARROW ABOVE REVERSE ALMOST EQUAL TO;Sm;0;ON;;;;;N;;;;;
+ 2B49;TILDE OPERATOR ABOVE LEFTWARDS ARROW;Sm;0;ON;;;;;N;;;;;
+ 2B4A;LEFTWARDS ARROW ABOVE ALMOST EQUAL TO;Sm;0;ON;;;;;N;;;;;
+ 2B4B;LEFTWARDS ARROW ABOVE REVERSE TILDE OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2B4C;RIGHTWARDS ARROW ABOVE REVERSE TILDE OPERATOR;Sm;0;ON;;;;;N;;;;;
+ 2B4D;DOWNWARDS TRIANGLE-HEADED ZIGZAG ARROW;So;0;ON;;;;;N;;;;;
+ 2B4E;SHORT SLANTED NORTH ARROW;So;0;ON;;;;;N;;;;;
+ 2B4F;SHORT BACKSLANTED SOUTH ARROW;So;0;ON;;;;;N;;;;;
+ 2B50;WHITE MEDIUM STAR;So;0;ON;;;;;N;;;;;
+ 2B51;BLACK SMALL STAR;So;0;ON;;;;;N;;;;;
+ 2B52;WHITE SMALL STAR;So;0;ON;;;;;N;;;;;
+ 2B53;BLACK RIGHT-POINTING PENTAGON;So;0;ON;;;;;N;;;;;
+ 2B54;WHITE RIGHT-POINTING PENTAGON;So;0;ON;;;;;N;;;;;
+ 2B55;HEAVY LARGE CIRCLE;So;0;ON;;;;;N;;;;;
+ 2B56;HEAVY OVAL WITH OVAL INSIDE;So;0;ON;;;;;N;;;;;
+ 2B57;HEAVY CIRCLE WITH CIRCLE INSIDE;So;0;ON;;;;;N;;;;;
+ 2B58;HEAVY CIRCLE;So;0;ON;;;;;N;;;;;
+ 2B59;HEAVY CIRCLED SALTIRE;So;0;ON;;;;;N;;;;;
+ 2B5A;SLANTED NORTH ARROW WITH HOOKED HEAD;So;0;ON;;;;;N;;;;;
+ 2B5B;BACKSLANTED SOUTH ARROW WITH HOOKED TAIL;So;0;ON;;;;;N;;;;;
+ 2B5C;SLANTED NORTH ARROW WITH HORIZONTAL TAIL;So;0;ON;;;;;N;;;;;
+ 2B5D;BACKSLANTED SOUTH ARROW WITH HORIZONTAL TAIL;So;0;ON;;;;;N;;;;;
+ 2B5E;BENT ARROW POINTING DOWNWARDS THEN NORTH EAST;So;0;ON;;;;;N;;;;;
+ 2B5F;SHORT BENT ARROW POINTING DOWNWARDS THEN NORTH EAST;So;0;ON;;;;;N;;;;;
+ 2B60;LEFTWARDS TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B61;UPWARDS TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B62;RIGHTWARDS TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B63;DOWNWARDS TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B64;LEFT RIGHT TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B65;UP DOWN TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B66;NORTH WEST TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B67;NORTH EAST TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B68;SOUTH EAST TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B69;SOUTH WEST TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B6A;LEFTWARDS TRIANGLE-HEADED DASHED ARROW;So;0;ON;;;;;N;;;;;
+ 2B6B;UPWARDS TRIANGLE-HEADED DASHED ARROW;So;0;ON;;;;;N;;;;;
+ 2B6C;RIGHTWARDS TRIANGLE-HEADED DASHED ARROW;So;0;ON;;;;;N;;;;;
+ 2B6D;DOWNWARDS TRIANGLE-HEADED DASHED ARROW;So;0;ON;;;;;N;;;;;
+ 2B6E;CLOCKWISE TRIANGLE-HEADED OPEN CIRCLE ARROW;So;0;ON;;;;;N;;;;;
+ 2B6F;ANTICLOCKWISE TRIANGLE-HEADED OPEN CIRCLE ARROW;So;0;ON;;;;;N;;;;;
+ 2B70;LEFTWARDS TRIANGLE-HEADED ARROW TO BAR;So;0;ON;;;;;N;;;;;
+ 2B71;UPWARDS TRIANGLE-HEADED ARROW TO BAR;So;0;ON;;;;;N;;;;;
+ 2B72;RIGHTWARDS TRIANGLE-HEADED ARROW TO BAR;So;0;ON;;;;;N;;;;;
+ 2B73;DOWNWARDS TRIANGLE-HEADED ARROW TO BAR;So;0;ON;;;;;N;;;;;
+ 2B76;NORTH WEST TRIANGLE-HEADED ARROW TO BAR;So;0;ON;;;;;N;;;;;
+ 2B77;NORTH EAST TRIANGLE-HEADED ARROW TO BAR;So;0;ON;;;;;N;;;;;
+ 2B78;SOUTH EAST TRIANGLE-HEADED ARROW TO BAR;So;0;ON;;;;;N;;;;;
+ 2B79;SOUTH WEST TRIANGLE-HEADED ARROW TO BAR;So;0;ON;;;;;N;;;;;
+ 2B7A;LEFTWARDS TRIANGLE-HEADED ARROW WITH DOUBLE HORIZONTAL STROKE;So;0;ON;;;;;N;;;;;
+ 2B7B;UPWARDS TRIANGLE-HEADED ARROW WITH DOUBLE HORIZONTAL STROKE;So;0;ON;;;;;N;;;;;
+ 2B7C;RIGHTWARDS TRIANGLE-HEADED ARROW WITH DOUBLE HORIZONTAL STROKE;So;0;ON;;;;;N;;;;;
+ 2B7D;DOWNWARDS TRIANGLE-HEADED ARROW WITH DOUBLE HORIZONTAL STROKE;So;0;ON;;;;;N;;;;;
+ 2B7E;HORIZONTAL TAB KEY;So;0;ON;;;;;N;;;;;
+ 2B7F;VERTICAL TAB KEY;So;0;ON;;;;;N;;;;;
+ 2B80;LEFTWARDS TRIANGLE-HEADED ARROW OVER RIGHTWARDS TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B81;UPWARDS TRIANGLE-HEADED ARROW LEFTWARDS OF DOWNWARDS TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B82;RIGHTWARDS TRIANGLE-HEADED ARROW OVER LEFTWARDS TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B83;DOWNWARDS TRIANGLE-HEADED ARROW LEFTWARDS OF UPWARDS TRIANGLE-HEADED ARROW;So;0;ON;;;;;N;;;;;
+ 2B84;LEFTWARDS TRIANGLE-HEADED PAIRED ARROWS;So;0;ON;;;;;N;;;;;
+ 2B85;UPWARDS TRIANGLE-HEADED PAIRED ARROWS;So;0;ON;;;;;N;;;;;
+ 2B86;RIGHTWARDS TRIANGLE-HEADED PAIRED ARROWS;So;0;ON;;;;;N;;;;;
+ 2B87;DOWNWARDS TRIANGLE-HEADED PAIRED ARROWS;So;0;ON;;;;;N;;;;;
+ 2B88;LEFTWARDS BLACK CIRCLED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 2B89;UPWARDS BLACK CIRCLED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 2B8A;RIGHTWARDS BLACK CIRCLED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 2B8B;DOWNWARDS BLACK CIRCLED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 2B8C;ANTICLOCKWISE TRIANGLE-HEADED RIGHT U-SHAPED ARROW;So;0;ON;;;;;N;;;;;
+ 2B8D;ANTICLOCKWISE TRIANGLE-HEADED BOTTOM U-SHAPED ARROW;So;0;ON;;;;;N;;;;;
+ 2B8E;ANTICLOCKWISE TRIANGLE-HEADED LEFT U-SHAPED ARROW;So;0;ON;;;;;N;;;;;
+ 2B8F;ANTICLOCKWISE TRIANGLE-HEADED TOP U-SHAPED ARROW;So;0;ON;;;;;N;;;;;
+ 2B90;RETURN LEFT;So;0;ON;;;;;N;;;;;
+ 2B91;RETURN RIGHT;So;0;ON;;;;;N;;;;;
+ 2B92;NEWLINE LEFT;So;0;ON;;;;;N;;;;;
+ 2B93;NEWLINE RIGHT;So;0;ON;;;;;N;;;;;
+ 2B94;FOUR CORNER ARROWS CIRCLING ANTICLOCKWISE;So;0;ON;;;;;N;;;;;
+ 2B95;RIGHTWARDS BLACK ARROW;So;0;ON;;;;;N;;;;;
+ 2B98;THREE-D TOP-LIGHTED LEFTWARDS EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 2B99;THREE-D RIGHT-LIGHTED UPWARDS EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 2B9A;THREE-D TOP-LIGHTED RIGHTWARDS EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 2B9B;THREE-D LEFT-LIGHTED DOWNWARDS EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 2B9C;BLACK LEFTWARDS EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 2B9D;BLACK UPWARDS EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 2B9E;BLACK RIGHTWARDS EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 2B9F;BLACK DOWNWARDS EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 2BA0;DOWNWARDS TRIANGLE-HEADED ARROW WITH LONG TIP LEFTWARDS;So;0;ON;;;;;N;;;;;
+ 2BA1;DOWNWARDS TRIANGLE-HEADED ARROW WITH LONG TIP RIGHTWARDS;So;0;ON;;;;;N;;;;;
+ 2BA2;UPWARDS TRIANGLE-HEADED ARROW WITH LONG TIP LEFTWARDS;So;0;ON;;;;;N;;;;;
+ 2BA3;UPWARDS TRIANGLE-HEADED ARROW WITH LONG TIP RIGHTWARDS;So;0;ON;;;;;N;;;;;
+ 2BA4;LEFTWARDS TRIANGLE-HEADED ARROW WITH LONG TIP UPWARDS;So;0;ON;;;;;N;;;;;
+ 2BA5;RIGHTWARDS TRIANGLE-HEADED ARROW WITH LONG TIP UPWARDS;So;0;ON;;;;;N;;;;;
+ 2BA6;LEFTWARDS TRIANGLE-HEADED ARROW WITH LONG TIP DOWNWARDS;So;0;ON;;;;;N;;;;;
+ 2BA7;RIGHTWARDS TRIANGLE-HEADED ARROW WITH LONG TIP DOWNWARDS;So;0;ON;;;;;N;;;;;
+ 2BA8;BLACK CURVED DOWNWARDS AND LEFTWARDS ARROW;So;0;ON;;;;;N;;;;;
+ 2BA9;BLACK CURVED DOWNWARDS AND RIGHTWARDS ARROW;So;0;ON;;;;;N;;;;;
+ 2BAA;BLACK CURVED UPWARDS AND LEFTWARDS ARROW;So;0;ON;;;;;N;;;;;
+ 2BAB;BLACK CURVED UPWARDS AND RIGHTWARDS ARROW;So;0;ON;;;;;N;;;;;
+ 2BAC;BLACK CURVED LEFTWARDS AND UPWARDS ARROW;So;0;ON;;;;;N;;;;;
+ 2BAD;BLACK CURVED RIGHTWARDS AND UPWARDS ARROW;So;0;ON;;;;;N;;;;;
+ 2BAE;BLACK CURVED LEFTWARDS AND DOWNWARDS ARROW;So;0;ON;;;;;N;;;;;
+ 2BAF;BLACK CURVED RIGHTWARDS AND DOWNWARDS ARROW;So;0;ON;;;;;N;;;;;
+ 2BB0;RIBBON ARROW DOWN LEFT;So;0;ON;;;;;N;;;;;
+ 2BB1;RIBBON ARROW DOWN RIGHT;So;0;ON;;;;;N;;;;;
+ 2BB2;RIBBON ARROW UP LEFT;So;0;ON;;;;;N;;;;;
+ 2BB3;RIBBON ARROW UP RIGHT;So;0;ON;;;;;N;;;;;
+ 2BB4;RIBBON ARROW LEFT UP;So;0;ON;;;;;N;;;;;
+ 2BB5;RIBBON ARROW RIGHT UP;So;0;ON;;;;;N;;;;;
+ 2BB6;RIBBON ARROW LEFT DOWN;So;0;ON;;;;;N;;;;;
+ 2BB7;RIBBON ARROW RIGHT DOWN;So;0;ON;;;;;N;;;;;
+ 2BB8;UPWARDS WHITE ARROW FROM BAR WITH HORIZONTAL BAR;So;0;ON;;;;;N;;;;;
+ 2BB9;UP ARROWHEAD IN A RECTANGLE BOX;So;0;ON;;;;;N;;;;;
+ 2BBA;OVERLAPPING WHITE SQUARES;So;0;ON;;;;;N;;;;;
+ 2BBB;OVERLAPPING WHITE AND BLACK SQUARES;So;0;ON;;;;;N;;;;;
+ 2BBC;OVERLAPPING BLACK SQUARES;So;0;ON;;;;;N;;;;;
+ 2BBD;BALLOT BOX WITH LIGHT X;So;0;ON;;;;;N;;;;;
+ 2BBE;CIRCLED X;So;0;ON;;;;;N;;;;;
+ 2BBF;CIRCLED BOLD X;So;0;ON;;;;;N;;;;;
+ 2BC0;BLACK SQUARE CENTRED;So;0;ON;;;;;N;;;;;
+ 2BC1;BLACK DIAMOND CENTRED;So;0;ON;;;;;N;;;;;
+ 2BC2;TURNED BLACK PENTAGON;So;0;ON;;;;;N;;;;;
+ 2BC3;HORIZONTAL BLACK OCTAGON;So;0;ON;;;;;N;;;;;
+ 2BC4;BLACK OCTAGON;So;0;ON;;;;;N;;;;;
+ 2BC5;BLACK MEDIUM UP-POINTING TRIANGLE CENTRED;So;0;ON;;;;;N;;;;;
+ 2BC6;BLACK MEDIUM DOWN-POINTING TRIANGLE CENTRED;So;0;ON;;;;;N;;;;;
+ 2BC7;BLACK MEDIUM LEFT-POINTING TRIANGLE CENTRED;So;0;ON;;;;;N;;;;;
+ 2BC8;BLACK MEDIUM RIGHT-POINTING TRIANGLE CENTRED;So;0;ON;;;;;N;;;;;
+ 2BC9;NEPTUNE FORM TWO;So;0;ON;;;;;N;;;;;
+ 2BCA;TOP HALF BLACK CIRCLE;So;0;ON;;;;;N;;;;;
+ 2BCB;BOTTOM HALF BLACK CIRCLE;So;0;ON;;;;;N;;;;;
+ 2BCC;LIGHT FOUR POINTED BLACK CUSP;So;0;ON;;;;;N;;;;;
+ 2BCD;ROTATED LIGHT FOUR POINTED BLACK CUSP;So;0;ON;;;;;N;;;;;
+ 2BCE;WHITE FOUR POINTED CUSP;So;0;ON;;;;;N;;;;;
+ 2BCF;ROTATED WHITE FOUR POINTED CUSP;So;0;ON;;;;;N;;;;;
+ 2BD0;SQUARE POSITION INDICATOR;So;0;ON;;;;;N;;;;;
+ 2BD1;UNCERTAINTY SIGN;So;0;ON;;;;;N;;;;;
+ 2BD2;GROUP MARK;So;0;ON;;;;;N;;;;;
+ 2BD3;PLUTO FORM TWO;So;0;ON;;;;;N;;;;;
+ 2BD4;PLUTO FORM THREE;So;0;ON;;;;;N;;;;;
+ 2BD5;PLUTO FORM FOUR;So;0;ON;;;;;N;;;;;
+ 2BD6;PLUTO FORM FIVE;So;0;ON;;;;;N;;;;;
+ 2BD7;TRANSPLUTO;So;0;ON;;;;;N;;;;;
+ 2BD8;PROSERPINA;So;0;ON;;;;;N;;;;;
+ 2BD9;ASTRAEA;So;0;ON;;;;;N;;;;;
+ 2BDA;HYGIEA;So;0;ON;;;;;N;;;;;
+ 2BDB;PHOLUS;So;0;ON;;;;;N;;;;;
+ 2BDC;NESSUS;So;0;ON;;;;;N;;;;;
+ 2BDD;WHITE MOON SELENA;So;0;ON;;;;;N;;;;;
+ 2BDE;BLACK DIAMOND ON CROSS;So;0;ON;;;;;N;;;;;
+ 2BDF;TRUE LIGHT MOON ARTA;So;0;ON;;;;;N;;;;;
+ 2BE0;CUPIDO;So;0;ON;;;;;N;;;;;
+ 2BE1;HADES;So;0;ON;;;;;N;;;;;
+ 2BE2;ZEUS;So;0;ON;;;;;N;;;;;
+ 2BE3;KRONOS;So;0;ON;;;;;N;;;;;
+ 2BE4;APOLLON;So;0;ON;;;;;N;;;;;
+ 2BE5;ADMETOS;So;0;ON;;;;;N;;;;;
+ 2BE6;VULCANUS;So;0;ON;;;;;N;;;;;
+ 2BE7;POSEIDON;So;0;ON;;;;;N;;;;;
+ 2BE8;LEFT HALF BLACK STAR;So;0;ON;;;;;N;;;;;
+ 2BE9;RIGHT HALF BLACK STAR;So;0;ON;;;;;N;;;;;
+ 2BEA;STAR WITH LEFT HALF BLACK;So;0;ON;;;;;N;;;;;
+ 2BEB;STAR WITH RIGHT HALF BLACK;So;0;ON;;;;;N;;;;;
+ 2BEC;LEFTWARDS TWO-HEADED ARROW WITH TRIANGLE ARROWHEADS;So;0;ON;;;;;N;;;;;
+ 2BED;UPWARDS TWO-HEADED ARROW WITH TRIANGLE ARROWHEADS;So;0;ON;;;;;N;;;;;
+ 2BEE;RIGHTWARDS TWO-HEADED ARROW WITH TRIANGLE ARROWHEADS;So;0;ON;;;;;N;;;;;
+ 2BEF;DOWNWARDS TWO-HEADED ARROW WITH TRIANGLE ARROWHEADS;So;0;ON;;;;;N;;;;;
+ 2BF0;ERIS FORM ONE;So;0;ON;;;;;N;;;;;
+ 2BF1;ERIS FORM TWO;So;0;ON;;;;;N;;;;;
+ 2BF2;SEDNA;So;0;ON;;;;;N;;;;;
+ 2BF3;RUSSIAN ASTROLOGICAL SYMBOL VIGINTILE;So;0;ON;;;;;N;;;;;
+ 2BF4;RUSSIAN ASTROLOGICAL SYMBOL NOVILE;So;0;ON;;;;;N;;;;;
+ 2BF5;RUSSIAN ASTROLOGICAL SYMBOL QUINTILE;So;0;ON;;;;;N;;;;;
+ 2BF6;RUSSIAN ASTROLOGICAL SYMBOL BINOVILE;So;0;ON;;;;;N;;;;;
+ 2BF7;RUSSIAN ASTROLOGICAL SYMBOL SENTAGON;So;0;ON;;;;;N;;;;;
+ 2BF8;RUSSIAN ASTROLOGICAL SYMBOL TREDECILE;So;0;ON;;;;;N;;;;;
+ 2BF9;EQUALS SIGN WITH INFINITY BELOW;So;0;ON;;;;;N;;;;;
+ 2BFA;UNITED SYMBOL;So;0;ON;;;;;N;;;;;
+ 2BFB;SEPARATED SYMBOL;So;0;ON;;;;;N;;;;;
+ 2BFC;DOUBLED SYMBOL;So;0;ON;;;;;N;;;;;
+ 2BFD;PASSED SYMBOL;So;0;ON;;;;;N;;;;;
+ 2BFE;REVERSED RIGHT ANGLE;So;0;ON;;;;;Y;;;;;
+ 2BFF;HELLSCHREIBER PAUSE SYMBOL;So;0;ON;;;;;N;;;;;
+ 2C00;GLAGOLITIC CAPITAL LETTER AZU;Lu;0;L;;;;;N;;;;2C30;
+ 2C01;GLAGOLITIC CAPITAL LETTER BUKY;Lu;0;L;;;;;N;;;;2C31;
+ 2C02;GLAGOLITIC CAPITAL LETTER VEDE;Lu;0;L;;;;;N;;;;2C32;
+ 2C03;GLAGOLITIC CAPITAL LETTER GLAGOLI;Lu;0;L;;;;;N;;;;2C33;
+ 2C04;GLAGOLITIC CAPITAL LETTER DOBRO;Lu;0;L;;;;;N;;;;2C34;
+ 2C05;GLAGOLITIC CAPITAL LETTER YESTU;Lu;0;L;;;;;N;;;;2C35;
+ 2C06;GLAGOLITIC CAPITAL LETTER ZHIVETE;Lu;0;L;;;;;N;;;;2C36;
+ 2C07;GLAGOLITIC CAPITAL LETTER DZELO;Lu;0;L;;;;;N;;;;2C37;
+ 2C08;GLAGOLITIC CAPITAL LETTER ZEMLJA;Lu;0;L;;;;;N;;;;2C38;
+ 2C09;GLAGOLITIC CAPITAL LETTER IZHE;Lu;0;L;;;;;N;;;;2C39;
+ 2C0A;GLAGOLITIC CAPITAL LETTER INITIAL IZHE;Lu;0;L;;;;;N;;;;2C3A;
+ 2C0B;GLAGOLITIC CAPITAL LETTER I;Lu;0;L;;;;;N;;;;2C3B;
+ 2C0C;GLAGOLITIC CAPITAL LETTER DJERVI;Lu;0;L;;;;;N;;;;2C3C;
+ 2C0D;GLAGOLITIC CAPITAL LETTER KAKO;Lu;0;L;;;;;N;;;;2C3D;
+ 2C0E;GLAGOLITIC CAPITAL LETTER LJUDIJE;Lu;0;L;;;;;N;;;;2C3E;
+ 2C0F;GLAGOLITIC CAPITAL LETTER MYSLITE;Lu;0;L;;;;;N;;;;2C3F;
+ 2C10;GLAGOLITIC CAPITAL LETTER NASHI;Lu;0;L;;;;;N;;;;2C40;
+ 2C11;GLAGOLITIC CAPITAL LETTER ONU;Lu;0;L;;;;;N;;;;2C41;
+ 2C12;GLAGOLITIC CAPITAL LETTER POKOJI;Lu;0;L;;;;;N;;;;2C42;
+ 2C13;GLAGOLITIC CAPITAL LETTER RITSI;Lu;0;L;;;;;N;;;;2C43;
+ 2C14;GLAGOLITIC CAPITAL LETTER SLOVO;Lu;0;L;;;;;N;;;;2C44;
+ 2C15;GLAGOLITIC CAPITAL LETTER TVRIDO;Lu;0;L;;;;;N;;;;2C45;
+ 2C16;GLAGOLITIC CAPITAL LETTER UKU;Lu;0;L;;;;;N;;;;2C46;
+ 2C17;GLAGOLITIC CAPITAL LETTER FRITU;Lu;0;L;;;;;N;;;;2C47;
+ 2C18;GLAGOLITIC CAPITAL LETTER HERU;Lu;0;L;;;;;N;;;;2C48;
+ 2C19;GLAGOLITIC CAPITAL LETTER OTU;Lu;0;L;;;;;N;;;;2C49;
+ 2C1A;GLAGOLITIC CAPITAL LETTER PE;Lu;0;L;;;;;N;;;;2C4A;
+ 2C1B;GLAGOLITIC CAPITAL LETTER SHTA;Lu;0;L;;;;;N;;;;2C4B;
+ 2C1C;GLAGOLITIC CAPITAL LETTER TSI;Lu;0;L;;;;;N;;;;2C4C;
+ 2C1D;GLAGOLITIC CAPITAL LETTER CHRIVI;Lu;0;L;;;;;N;;;;2C4D;
+ 2C1E;GLAGOLITIC CAPITAL LETTER SHA;Lu;0;L;;;;;N;;;;2C4E;
+ 2C1F;GLAGOLITIC CAPITAL LETTER YERU;Lu;0;L;;;;;N;;;;2C4F;
+ 2C20;GLAGOLITIC CAPITAL LETTER YERI;Lu;0;L;;;;;N;;;;2C50;
+ 2C21;GLAGOLITIC CAPITAL LETTER YATI;Lu;0;L;;;;;N;;;;2C51;
+ 2C22;GLAGOLITIC CAPITAL LETTER SPIDERY HA;Lu;0;L;;;;;N;;;;2C52;
+ 2C23;GLAGOLITIC CAPITAL LETTER YU;Lu;0;L;;;;;N;;;;2C53;
+ 2C24;GLAGOLITIC CAPITAL LETTER SMALL YUS;Lu;0;L;;;;;N;;;;2C54;
+ 2C25;GLAGOLITIC CAPITAL LETTER SMALL YUS WITH TAIL;Lu;0;L;;;;;N;;;;2C55;
+ 2C26;GLAGOLITIC CAPITAL LETTER YO;Lu;0;L;;;;;N;;;;2C56;
+ 2C27;GLAGOLITIC CAPITAL LETTER IOTATED SMALL YUS;Lu;0;L;;;;;N;;;;2C57;
+ 2C28;GLAGOLITIC CAPITAL LETTER BIG YUS;Lu;0;L;;;;;N;;;;2C58;
+ 2C29;GLAGOLITIC CAPITAL LETTER IOTATED BIG YUS;Lu;0;L;;;;;N;;;;2C59;
+ 2C2A;GLAGOLITIC CAPITAL LETTER FITA;Lu;0;L;;;;;N;;;;2C5A;
+ 2C2B;GLAGOLITIC CAPITAL LETTER IZHITSA;Lu;0;L;;;;;N;;;;2C5B;
+ 2C2C;GLAGOLITIC CAPITAL LETTER SHTAPIC;Lu;0;L;;;;;N;;;;2C5C;
+ 2C2D;GLAGOLITIC CAPITAL LETTER TROKUTASTI A;Lu;0;L;;;;;N;;;;2C5D;
+ 2C2E;GLAGOLITIC CAPITAL LETTER LATINATE MYSLITE;Lu;0;L;;;;;N;;;;2C5E;
+ 2C30;GLAGOLITIC SMALL LETTER AZU;Ll;0;L;;;;;N;;;2C00;;2C00
+ 2C31;GLAGOLITIC SMALL LETTER BUKY;Ll;0;L;;;;;N;;;2C01;;2C01
+ 2C32;GLAGOLITIC SMALL LETTER VEDE;Ll;0;L;;;;;N;;;2C02;;2C02
+ 2C33;GLAGOLITIC SMALL LETTER GLAGOLI;Ll;0;L;;;;;N;;;2C03;;2C03
+ 2C34;GLAGOLITIC SMALL LETTER DOBRO;Ll;0;L;;;;;N;;;2C04;;2C04
+ 2C35;GLAGOLITIC SMALL LETTER YESTU;Ll;0;L;;;;;N;;;2C05;;2C05
+ 2C36;GLAGOLITIC SMALL LETTER ZHIVETE;Ll;0;L;;;;;N;;;2C06;;2C06
+ 2C37;GLAGOLITIC SMALL LETTER DZELO;Ll;0;L;;;;;N;;;2C07;;2C07
+ 2C38;GLAGOLITIC SMALL LETTER ZEMLJA;Ll;0;L;;;;;N;;;2C08;;2C08
+ 2C39;GLAGOLITIC SMALL LETTER IZHE;Ll;0;L;;;;;N;;;2C09;;2C09
+ 2C3A;GLAGOLITIC SMALL LETTER INITIAL IZHE;Ll;0;L;;;;;N;;;2C0A;;2C0A
+ 2C3B;GLAGOLITIC SMALL LETTER I;Ll;0;L;;;;;N;;;2C0B;;2C0B
+ 2C3C;GLAGOLITIC SMALL LETTER DJERVI;Ll;0;L;;;;;N;;;2C0C;;2C0C
+ 2C3D;GLAGOLITIC SMALL LETTER KAKO;Ll;0;L;;;;;N;;;2C0D;;2C0D
+ 2C3E;GLAGOLITIC SMALL LETTER LJUDIJE;Ll;0;L;;;;;N;;;2C0E;;2C0E
+ 2C3F;GLAGOLITIC SMALL LETTER MYSLITE;Ll;0;L;;;;;N;;;2C0F;;2C0F
+ 2C40;GLAGOLITIC SMALL LETTER NASHI;Ll;0;L;;;;;N;;;2C10;;2C10
+ 2C41;GLAGOLITIC SMALL LETTER ONU;Ll;0;L;;;;;N;;;2C11;;2C11
+ 2C42;GLAGOLITIC SMALL LETTER POKOJI;Ll;0;L;;;;;N;;;2C12;;2C12
+ 2C43;GLAGOLITIC SMALL LETTER RITSI;Ll;0;L;;;;;N;;;2C13;;2C13
+ 2C44;GLAGOLITIC SMALL LETTER SLOVO;Ll;0;L;;;;;N;;;2C14;;2C14
+ 2C45;GLAGOLITIC SMALL LETTER TVRIDO;Ll;0;L;;;;;N;;;2C15;;2C15
+ 2C46;GLAGOLITIC SMALL LETTER UKU;Ll;0;L;;;;;N;;;2C16;;2C16
+ 2C47;GLAGOLITIC SMALL LETTER FRITU;Ll;0;L;;;;;N;;;2C17;;2C17
+ 2C48;GLAGOLITIC SMALL LETTER HERU;Ll;0;L;;;;;N;;;2C18;;2C18
+ 2C49;GLAGOLITIC SMALL LETTER OTU;Ll;0;L;;;;;N;;;2C19;;2C19
+ 2C4A;GLAGOLITIC SMALL LETTER PE;Ll;0;L;;;;;N;;;2C1A;;2C1A
+ 2C4B;GLAGOLITIC SMALL LETTER SHTA;Ll;0;L;;;;;N;;;2C1B;;2C1B
+ 2C4C;GLAGOLITIC SMALL LETTER TSI;Ll;0;L;;;;;N;;;2C1C;;2C1C
+ 2C4D;GLAGOLITIC SMALL LETTER CHRIVI;Ll;0;L;;;;;N;;;2C1D;;2C1D
+ 2C4E;GLAGOLITIC SMALL LETTER SHA;Ll;0;L;;;;;N;;;2C1E;;2C1E
+ 2C4F;GLAGOLITIC SMALL LETTER YERU;Ll;0;L;;;;;N;;;2C1F;;2C1F
+ 2C50;GLAGOLITIC SMALL LETTER YERI;Ll;0;L;;;;;N;;;2C20;;2C20
+ 2C51;GLAGOLITIC SMALL LETTER YATI;Ll;0;L;;;;;N;;;2C21;;2C21
+ 2C52;GLAGOLITIC SMALL LETTER SPIDERY HA;Ll;0;L;;;;;N;;;2C22;;2C22
+ 2C53;GLAGOLITIC SMALL LETTER YU;Ll;0;L;;;;;N;;;2C23;;2C23
+ 2C54;GLAGOLITIC SMALL LETTER SMALL YUS;Ll;0;L;;;;;N;;;2C24;;2C24
+ 2C55;GLAGOLITIC SMALL LETTER SMALL YUS WITH TAIL;Ll;0;L;;;;;N;;;2C25;;2C25
+ 2C56;GLAGOLITIC SMALL LETTER YO;Ll;0;L;;;;;N;;;2C26;;2C26
+ 2C57;GLAGOLITIC SMALL LETTER IOTATED SMALL YUS;Ll;0;L;;;;;N;;;2C27;;2C27
+ 2C58;GLAGOLITIC SMALL LETTER BIG YUS;Ll;0;L;;;;;N;;;2C28;;2C28
+ 2C59;GLAGOLITIC SMALL LETTER IOTATED BIG YUS;Ll;0;L;;;;;N;;;2C29;;2C29
+ 2C5A;GLAGOLITIC SMALL LETTER FITA;Ll;0;L;;;;;N;;;2C2A;;2C2A
+ 2C5B;GLAGOLITIC SMALL LETTER IZHITSA;Ll;0;L;;;;;N;;;2C2B;;2C2B
+ 2C5C;GLAGOLITIC SMALL LETTER SHTAPIC;Ll;0;L;;;;;N;;;2C2C;;2C2C
+ 2C5D;GLAGOLITIC SMALL LETTER TROKUTASTI A;Ll;0;L;;;;;N;;;2C2D;;2C2D
+ 2C5E;GLAGOLITIC SMALL LETTER LATINATE MYSLITE;Ll;0;L;;;;;N;;;2C2E;;2C2E
+ 2C60;LATIN CAPITAL LETTER L WITH DOUBLE BAR;Lu;0;L;;;;;N;;;;2C61;
+ 2C61;LATIN SMALL LETTER L WITH DOUBLE BAR;Ll;0;L;;;;;N;;;2C60;;2C60
+ 2C62;LATIN CAPITAL LETTER L WITH MIDDLE TILDE;Lu;0;L;;;;;N;;;;026B;
+ 2C63;LATIN CAPITAL LETTER P WITH STROKE;Lu;0;L;;;;;N;;;;1D7D;
+ 2C64;LATIN CAPITAL LETTER R WITH TAIL;Lu;0;L;;;;;N;;;;027D;
+ 2C65;LATIN SMALL LETTER A WITH STROKE;Ll;0;L;;;;;N;;;023A;;023A
+ 2C66;LATIN SMALL LETTER T WITH DIAGONAL STROKE;Ll;0;L;;;;;N;;;023E;;023E
+ 2C67;LATIN CAPITAL LETTER H WITH DESCENDER;Lu;0;L;;;;;N;;;;2C68;
+ 2C68;LATIN SMALL LETTER H WITH DESCENDER;Ll;0;L;;;;;N;;;2C67;;2C67
+ 2C69;LATIN CAPITAL LETTER K WITH DESCENDER;Lu;0;L;;;;;N;;;;2C6A;
+ 2C6A;LATIN SMALL LETTER K WITH DESCENDER;Ll;0;L;;;;;N;;;2C69;;2C69
+ 2C6B;LATIN CAPITAL LETTER Z WITH DESCENDER;Lu;0;L;;;;;N;;;;2C6C;
+ 2C6C;LATIN SMALL LETTER Z WITH DESCENDER;Ll;0;L;;;;;N;;;2C6B;;2C6B
+ 2C6D;LATIN CAPITAL LETTER ALPHA;Lu;0;L;;;;;N;;;;0251;
+ 2C6E;LATIN CAPITAL LETTER M WITH HOOK;Lu;0;L;;;;;N;;;;0271;
+ 2C6F;LATIN CAPITAL LETTER TURNED A;Lu;0;L;;;;;N;;;;0250;
+ 2C70;LATIN CAPITAL LETTER TURNED ALPHA;Lu;0;L;;;;;N;;;;0252;
+ 2C71;LATIN SMALL LETTER V WITH RIGHT HOOK;Ll;0;L;;;;;N;;;;;
+ 2C72;LATIN CAPITAL LETTER W WITH HOOK;Lu;0;L;;;;;N;;;;2C73;
+ 2C73;LATIN SMALL LETTER W WITH HOOK;Ll;0;L;;;;;N;;;2C72;;2C72
+ 2C74;LATIN SMALL LETTER V WITH CURL;Ll;0;L;;;;;N;;;;;
+ 2C75;LATIN CAPITAL LETTER HALF H;Lu;0;L;;;;;N;;;;2C76;
+ 2C76;LATIN SMALL LETTER HALF H;Ll;0;L;;;;;N;;;2C75;;2C75
+ 2C77;LATIN SMALL LETTER TAILLESS PHI;Ll;0;L;;;;;N;;;;;
+ 2C78;LATIN SMALL LETTER E WITH NOTCH;Ll;0;L;;;;;N;;;;;
+ 2C79;LATIN SMALL LETTER TURNED R WITH TAIL;Ll;0;L;;;;;N;;;;;
+ 2C7A;LATIN SMALL LETTER O WITH LOW RING INSIDE;Ll;0;L;;;;;N;;;;;
+ 2C7B;LATIN LETTER SMALL CAPITAL TURNED E;Ll;0;L;;;;;N;;;;;
+ 2C7C;LATIN SUBSCRIPT SMALL LETTER J;Lm;0;L;<sub> 006A;;;;N;;;;;
+ 2C7D;MODIFIER LETTER CAPITAL V;Lm;0;L;<super> 0056;;;;N;;;;;
+ 2C7E;LATIN CAPITAL LETTER S WITH SWASH TAIL;Lu;0;L;;;;;N;;;;023F;
+ 2C7F;LATIN CAPITAL LETTER Z WITH SWASH TAIL;Lu;0;L;;;;;N;;;;0240;
+ 2C80;COPTIC CAPITAL LETTER ALFA;Lu;0;L;;;;;N;;;;2C81;
+ 2C81;COPTIC SMALL LETTER ALFA;Ll;0;L;;;;;N;;;2C80;;2C80
+ 2C82;COPTIC CAPITAL LETTER VIDA;Lu;0;L;;;;;N;;;;2C83;
+ 2C83;COPTIC SMALL LETTER VIDA;Ll;0;L;;;;;N;;;2C82;;2C82
+ 2C84;COPTIC CAPITAL LETTER GAMMA;Lu;0;L;;;;;N;;;;2C85;
+ 2C85;COPTIC SMALL LETTER GAMMA;Ll;0;L;;;;;N;;;2C84;;2C84
+ 2C86;COPTIC CAPITAL LETTER DALDA;Lu;0;L;;;;;N;;;;2C87;
+ 2C87;COPTIC SMALL LETTER DALDA;Ll;0;L;;;;;N;;;2C86;;2C86
+ 2C88;COPTIC CAPITAL LETTER EIE;Lu;0;L;;;;;N;;;;2C89;
+ 2C89;COPTIC SMALL LETTER EIE;Ll;0;L;;;;;N;;;2C88;;2C88
+ 2C8A;COPTIC CAPITAL LETTER SOU;Lu;0;L;;;;;N;;;;2C8B;
+ 2C8B;COPTIC SMALL LETTER SOU;Ll;0;L;;;;;N;;;2C8A;;2C8A
+ 2C8C;COPTIC CAPITAL LETTER ZATA;Lu;0;L;;;;;N;;;;2C8D;
+ 2C8D;COPTIC SMALL LETTER ZATA;Ll;0;L;;;;;N;;;2C8C;;2C8C
+ 2C8E;COPTIC CAPITAL LETTER HATE;Lu;0;L;;;;;N;;;;2C8F;
+ 2C8F;COPTIC SMALL LETTER HATE;Ll;0;L;;;;;N;;;2C8E;;2C8E
+ 2C90;COPTIC CAPITAL LETTER THETHE;Lu;0;L;;;;;N;;;;2C91;
+ 2C91;COPTIC SMALL LETTER THETHE;Ll;0;L;;;;;N;;;2C90;;2C90
+ 2C92;COPTIC CAPITAL LETTER IAUDA;Lu;0;L;;;;;N;;;;2C93;
+ 2C93;COPTIC SMALL LETTER IAUDA;Ll;0;L;;;;;N;;;2C92;;2C92
+ 2C94;COPTIC CAPITAL LETTER KAPA;Lu;0;L;;;;;N;;;;2C95;
+ 2C95;COPTIC SMALL LETTER KAPA;Ll;0;L;;;;;N;;;2C94;;2C94
+ 2C96;COPTIC CAPITAL LETTER LAULA;Lu;0;L;;;;;N;;;;2C97;
+ 2C97;COPTIC SMALL LETTER LAULA;Ll;0;L;;;;;N;;;2C96;;2C96
+ 2C98;COPTIC CAPITAL LETTER MI;Lu;0;L;;;;;N;;;;2C99;
+ 2C99;COPTIC SMALL LETTER MI;Ll;0;L;;;;;N;;;2C98;;2C98
+ 2C9A;COPTIC CAPITAL LETTER NI;Lu;0;L;;;;;N;;;;2C9B;
+ 2C9B;COPTIC SMALL LETTER NI;Ll;0;L;;;;;N;;;2C9A;;2C9A
+ 2C9C;COPTIC CAPITAL LETTER KSI;Lu;0;L;;;;;N;;;;2C9D;
+ 2C9D;COPTIC SMALL LETTER KSI;Ll;0;L;;;;;N;;;2C9C;;2C9C
+ 2C9E;COPTIC CAPITAL LETTER O;Lu;0;L;;;;;N;;;;2C9F;
+ 2C9F;COPTIC SMALL LETTER O;Ll;0;L;;;;;N;;;2C9E;;2C9E
+ 2CA0;COPTIC CAPITAL LETTER PI;Lu;0;L;;;;;N;;;;2CA1;
+ 2CA1;COPTIC SMALL LETTER PI;Ll;0;L;;;;;N;;;2CA0;;2CA0
+ 2CA2;COPTIC CAPITAL LETTER RO;Lu;0;L;;;;;N;;;;2CA3;
+ 2CA3;COPTIC SMALL LETTER RO;Ll;0;L;;;;;N;;;2CA2;;2CA2
+ 2CA4;COPTIC CAPITAL LETTER SIMA;Lu;0;L;;;;;N;;;;2CA5;
+ 2CA5;COPTIC SMALL LETTER SIMA;Ll;0;L;;;;;N;;;2CA4;;2CA4
+ 2CA6;COPTIC CAPITAL LETTER TAU;Lu;0;L;;;;;N;;;;2CA7;
+ 2CA7;COPTIC SMALL LETTER TAU;Ll;0;L;;;;;N;;;2CA6;;2CA6
+ 2CA8;COPTIC CAPITAL LETTER UA;Lu;0;L;;;;;N;;;;2CA9;
+ 2CA9;COPTIC SMALL LETTER UA;Ll;0;L;;;;;N;;;2CA8;;2CA8
+ 2CAA;COPTIC CAPITAL LETTER FI;Lu;0;L;;;;;N;;;;2CAB;
+ 2CAB;COPTIC SMALL LETTER FI;Ll;0;L;;;;;N;;;2CAA;;2CAA
+ 2CAC;COPTIC CAPITAL LETTER KHI;Lu;0;L;;;;;N;;;;2CAD;
+ 2CAD;COPTIC SMALL LETTER KHI;Ll;0;L;;;;;N;;;2CAC;;2CAC
+ 2CAE;COPTIC CAPITAL LETTER PSI;Lu;0;L;;;;;N;;;;2CAF;
+ 2CAF;COPTIC SMALL LETTER PSI;Ll;0;L;;;;;N;;;2CAE;;2CAE
+ 2CB0;COPTIC CAPITAL LETTER OOU;Lu;0;L;;;;;N;;;;2CB1;
+ 2CB1;COPTIC SMALL LETTER OOU;Ll;0;L;;;;;N;;;2CB0;;2CB0
+ 2CB2;COPTIC CAPITAL LETTER DIALECT-P ALEF;Lu;0;L;;;;;N;;;;2CB3;
+ 2CB3;COPTIC SMALL LETTER DIALECT-P ALEF;Ll;0;L;;;;;N;;;2CB2;;2CB2
+ 2CB4;COPTIC CAPITAL LETTER OLD COPTIC AIN;Lu;0;L;;;;;N;;;;2CB5;
+ 2CB5;COPTIC SMALL LETTER OLD COPTIC AIN;Ll;0;L;;;;;N;;;2CB4;;2CB4
+ 2CB6;COPTIC CAPITAL LETTER CRYPTOGRAMMIC EIE;Lu;0;L;;;;;N;;;;2CB7;
+ 2CB7;COPTIC SMALL LETTER CRYPTOGRAMMIC EIE;Ll;0;L;;;;;N;;;2CB6;;2CB6
+ 2CB8;COPTIC CAPITAL LETTER DIALECT-P KAPA;Lu;0;L;;;;;N;;;;2CB9;
+ 2CB9;COPTIC SMALL LETTER DIALECT-P KAPA;Ll;0;L;;;;;N;;;2CB8;;2CB8
+ 2CBA;COPTIC CAPITAL LETTER DIALECT-P NI;Lu;0;L;;;;;N;;;;2CBB;
+ 2CBB;COPTIC SMALL LETTER DIALECT-P NI;Ll;0;L;;;;;N;;;2CBA;;2CBA
+ 2CBC;COPTIC CAPITAL LETTER CRYPTOGRAMMIC NI;Lu;0;L;;;;;N;;;;2CBD;
+ 2CBD;COPTIC SMALL LETTER CRYPTOGRAMMIC NI;Ll;0;L;;;;;N;;;2CBC;;2CBC
+ 2CBE;COPTIC CAPITAL LETTER OLD COPTIC OOU;Lu;0;L;;;;;N;;;;2CBF;
+ 2CBF;COPTIC SMALL LETTER OLD COPTIC OOU;Ll;0;L;;;;;N;;;2CBE;;2CBE
+ 2CC0;COPTIC CAPITAL LETTER SAMPI;Lu;0;L;;;;;N;;;;2CC1;
+ 2CC1;COPTIC SMALL LETTER SAMPI;Ll;0;L;;;;;N;;;2CC0;;2CC0
+ 2CC2;COPTIC CAPITAL LETTER CROSSED SHEI;Lu;0;L;;;;;N;;;;2CC3;
+ 2CC3;COPTIC SMALL LETTER CROSSED SHEI;Ll;0;L;;;;;N;;;2CC2;;2CC2
+ 2CC4;COPTIC CAPITAL LETTER OLD COPTIC SHEI;Lu;0;L;;;;;N;;;;2CC5;
+ 2CC5;COPTIC SMALL LETTER OLD COPTIC SHEI;Ll;0;L;;;;;N;;;2CC4;;2CC4
+ 2CC6;COPTIC CAPITAL LETTER OLD COPTIC ESH;Lu;0;L;;;;;N;;;;2CC7;
+ 2CC7;COPTIC SMALL LETTER OLD COPTIC ESH;Ll;0;L;;;;;N;;;2CC6;;2CC6
+ 2CC8;COPTIC CAPITAL LETTER AKHMIMIC KHEI;Lu;0;L;;;;;N;;;;2CC9;
+ 2CC9;COPTIC SMALL LETTER AKHMIMIC KHEI;Ll;0;L;;;;;N;;;2CC8;;2CC8
+ 2CCA;COPTIC CAPITAL LETTER DIALECT-P HORI;Lu;0;L;;;;;N;;;;2CCB;
+ 2CCB;COPTIC SMALL LETTER DIALECT-P HORI;Ll;0;L;;;;;N;;;2CCA;;2CCA
+ 2CCC;COPTIC CAPITAL LETTER OLD COPTIC HORI;Lu;0;L;;;;;N;;;;2CCD;
+ 2CCD;COPTIC SMALL LETTER OLD COPTIC HORI;Ll;0;L;;;;;N;;;2CCC;;2CCC
+ 2CCE;COPTIC CAPITAL LETTER OLD COPTIC HA;Lu;0;L;;;;;N;;;;2CCF;
+ 2CCF;COPTIC SMALL LETTER OLD COPTIC HA;Ll;0;L;;;;;N;;;2CCE;;2CCE
+ 2CD0;COPTIC CAPITAL LETTER L-SHAPED HA;Lu;0;L;;;;;N;;;;2CD1;
+ 2CD1;COPTIC SMALL LETTER L-SHAPED HA;Ll;0;L;;;;;N;;;2CD0;;2CD0
+ 2CD2;COPTIC CAPITAL LETTER OLD COPTIC HEI;Lu;0;L;;;;;N;;;;2CD3;
+ 2CD3;COPTIC SMALL LETTER OLD COPTIC HEI;Ll;0;L;;;;;N;;;2CD2;;2CD2
+ 2CD4;COPTIC CAPITAL LETTER OLD COPTIC HAT;Lu;0;L;;;;;N;;;;2CD5;
+ 2CD5;COPTIC SMALL LETTER OLD COPTIC HAT;Ll;0;L;;;;;N;;;2CD4;;2CD4
+ 2CD6;COPTIC CAPITAL LETTER OLD COPTIC GANGIA;Lu;0;L;;;;;N;;;;2CD7;
+ 2CD7;COPTIC SMALL LETTER OLD COPTIC GANGIA;Ll;0;L;;;;;N;;;2CD6;;2CD6
+ 2CD8;COPTIC CAPITAL LETTER OLD COPTIC DJA;Lu;0;L;;;;;N;;;;2CD9;
+ 2CD9;COPTIC SMALL LETTER OLD COPTIC DJA;Ll;0;L;;;;;N;;;2CD8;;2CD8
+ 2CDA;COPTIC CAPITAL LETTER OLD COPTIC SHIMA;Lu;0;L;;;;;N;;;;2CDB;
+ 2CDB;COPTIC SMALL LETTER OLD COPTIC SHIMA;Ll;0;L;;;;;N;;;2CDA;;2CDA
+ 2CDC;COPTIC CAPITAL LETTER OLD NUBIAN SHIMA;Lu;0;L;;;;;N;;;;2CDD;
+ 2CDD;COPTIC SMALL LETTER OLD NUBIAN SHIMA;Ll;0;L;;;;;N;;;2CDC;;2CDC
+ 2CDE;COPTIC CAPITAL LETTER OLD NUBIAN NGI;Lu;0;L;;;;;N;;;;2CDF;
+ 2CDF;COPTIC SMALL LETTER OLD NUBIAN NGI;Ll;0;L;;;;;N;;;2CDE;;2CDE
+ 2CE0;COPTIC CAPITAL LETTER OLD NUBIAN NYI;Lu;0;L;;;;;N;;;;2CE1;
+ 2CE1;COPTIC SMALL LETTER OLD NUBIAN NYI;Ll;0;L;;;;;N;;;2CE0;;2CE0
+ 2CE2;COPTIC CAPITAL LETTER OLD NUBIAN WAU;Lu;0;L;;;;;N;;;;2CE3;
+ 2CE3;COPTIC SMALL LETTER OLD NUBIAN WAU;Ll;0;L;;;;;N;;;2CE2;;2CE2
+ 2CE4;COPTIC SYMBOL KAI;Ll;0;L;;;;;N;;;;;
+ 2CE5;COPTIC SYMBOL MI RO;So;0;ON;;;;;N;;;;;
+ 2CE6;COPTIC SYMBOL PI RO;So;0;ON;;;;;N;;;;;
+ 2CE7;COPTIC SYMBOL STAUROS;So;0;ON;;;;;N;;;;;
+ 2CE8;COPTIC SYMBOL TAU RO;So;0;ON;;;;;N;;;;;
+ 2CE9;COPTIC SYMBOL KHI RO;So;0;ON;;;;;N;;;;;
+ 2CEA;COPTIC SYMBOL SHIMA SIMA;So;0;ON;;;;;N;;;;;
+ 2CEB;COPTIC CAPITAL LETTER CRYPTOGRAMMIC SHEI;Lu;0;L;;;;;N;;;;2CEC;
+ 2CEC;COPTIC SMALL LETTER CRYPTOGRAMMIC SHEI;Ll;0;L;;;;;N;;;2CEB;;2CEB
+ 2CED;COPTIC CAPITAL LETTER CRYPTOGRAMMIC GANGIA;Lu;0;L;;;;;N;;;;2CEE;
+ 2CEE;COPTIC SMALL LETTER CRYPTOGRAMMIC GANGIA;Ll;0;L;;;;;N;;;2CED;;2CED
+ 2CEF;COPTIC COMBINING NI ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 2CF0;COPTIC COMBINING SPIRITUS ASPER;Mn;230;NSM;;;;;N;;;;;
+ 2CF1;COPTIC COMBINING SPIRITUS LENIS;Mn;230;NSM;;;;;N;;;;;
+ 2CF2;COPTIC CAPITAL LETTER BOHAIRIC KHEI;Lu;0;L;;;;;N;;;;2CF3;
+ 2CF3;COPTIC SMALL LETTER BOHAIRIC KHEI;Ll;0;L;;;;;N;;;2CF2;;2CF2
+ 2CF9;COPTIC OLD NUBIAN FULL STOP;Po;0;ON;;;;;N;;;;;
+ 2CFA;COPTIC OLD NUBIAN DIRECT QUESTION MARK;Po;0;ON;;;;;N;;;;;
+ 2CFB;COPTIC OLD NUBIAN INDIRECT QUESTION MARK;Po;0;ON;;;;;N;;;;;
+ 2CFC;COPTIC OLD NUBIAN VERSE DIVIDER;Po;0;ON;;;;;N;;;;;
+ 2CFD;COPTIC FRACTION ONE HALF;No;0;ON;;;;1/2;N;;;;;
+ 2CFE;COPTIC FULL STOP;Po;0;ON;;;;;N;;;;;
+ 2CFF;COPTIC MORPHOLOGICAL DIVIDER;Po;0;ON;;;;;N;;;;;
+ 2D00;GEORGIAN SMALL LETTER AN;Ll;0;L;;;;;N;;;10A0;;10A0
+ 2D01;GEORGIAN SMALL LETTER BAN;Ll;0;L;;;;;N;;;10A1;;10A1
+ 2D02;GEORGIAN SMALL LETTER GAN;Ll;0;L;;;;;N;;;10A2;;10A2
+ 2D03;GEORGIAN SMALL LETTER DON;Ll;0;L;;;;;N;;;10A3;;10A3
+ 2D04;GEORGIAN SMALL LETTER EN;Ll;0;L;;;;;N;;;10A4;;10A4
+ 2D05;GEORGIAN SMALL LETTER VIN;Ll;0;L;;;;;N;;;10A5;;10A5
+ 2D06;GEORGIAN SMALL LETTER ZEN;Ll;0;L;;;;;N;;;10A6;;10A6
+ 2D07;GEORGIAN SMALL LETTER TAN;Ll;0;L;;;;;N;;;10A7;;10A7
+ 2D08;GEORGIAN SMALL LETTER IN;Ll;0;L;;;;;N;;;10A8;;10A8
+ 2D09;GEORGIAN SMALL LETTER KAN;Ll;0;L;;;;;N;;;10A9;;10A9
+ 2D0A;GEORGIAN SMALL LETTER LAS;Ll;0;L;;;;;N;;;10AA;;10AA
+ 2D0B;GEORGIAN SMALL LETTER MAN;Ll;0;L;;;;;N;;;10AB;;10AB
+ 2D0C;GEORGIAN SMALL LETTER NAR;Ll;0;L;;;;;N;;;10AC;;10AC
+ 2D0D;GEORGIAN SMALL LETTER ON;Ll;0;L;;;;;N;;;10AD;;10AD
+ 2D0E;GEORGIAN SMALL LETTER PAR;Ll;0;L;;;;;N;;;10AE;;10AE
+ 2D0F;GEORGIAN SMALL LETTER ZHAR;Ll;0;L;;;;;N;;;10AF;;10AF
+ 2D10;GEORGIAN SMALL LETTER RAE;Ll;0;L;;;;;N;;;10B0;;10B0
+ 2D11;GEORGIAN SMALL LETTER SAN;Ll;0;L;;;;;N;;;10B1;;10B1
+ 2D12;GEORGIAN SMALL LETTER TAR;Ll;0;L;;;;;N;;;10B2;;10B2
+ 2D13;GEORGIAN SMALL LETTER UN;Ll;0;L;;;;;N;;;10B3;;10B3
+ 2D14;GEORGIAN SMALL LETTER PHAR;Ll;0;L;;;;;N;;;10B4;;10B4
+ 2D15;GEORGIAN SMALL LETTER KHAR;Ll;0;L;;;;;N;;;10B5;;10B5
+ 2D16;GEORGIAN SMALL LETTER GHAN;Ll;0;L;;;;;N;;;10B6;;10B6
+ 2D17;GEORGIAN SMALL LETTER QAR;Ll;0;L;;;;;N;;;10B7;;10B7
+ 2D18;GEORGIAN SMALL LETTER SHIN;Ll;0;L;;;;;N;;;10B8;;10B8
+ 2D19;GEORGIAN SMALL LETTER CHIN;Ll;0;L;;;;;N;;;10B9;;10B9
+ 2D1A;GEORGIAN SMALL LETTER CAN;Ll;0;L;;;;;N;;;10BA;;10BA
+ 2D1B;GEORGIAN SMALL LETTER JIL;Ll;0;L;;;;;N;;;10BB;;10BB
+ 2D1C;GEORGIAN SMALL LETTER CIL;Ll;0;L;;;;;N;;;10BC;;10BC
+ 2D1D;GEORGIAN SMALL LETTER CHAR;Ll;0;L;;;;;N;;;10BD;;10BD
+ 2D1E;GEORGIAN SMALL LETTER XAN;Ll;0;L;;;;;N;;;10BE;;10BE
+ 2D1F;GEORGIAN SMALL LETTER JHAN;Ll;0;L;;;;;N;;;10BF;;10BF
+ 2D20;GEORGIAN SMALL LETTER HAE;Ll;0;L;;;;;N;;;10C0;;10C0
+ 2D21;GEORGIAN SMALL LETTER HE;Ll;0;L;;;;;N;;;10C1;;10C1
+ 2D22;GEORGIAN SMALL LETTER HIE;Ll;0;L;;;;;N;;;10C2;;10C2
+ 2D23;GEORGIAN SMALL LETTER WE;Ll;0;L;;;;;N;;;10C3;;10C3
+ 2D24;GEORGIAN SMALL LETTER HAR;Ll;0;L;;;;;N;;;10C4;;10C4
+ 2D25;GEORGIAN SMALL LETTER HOE;Ll;0;L;;;;;N;;;10C5;;10C5
+ 2D27;GEORGIAN SMALL LETTER YN;Ll;0;L;;;;;N;;;10C7;;10C7
+ 2D2D;GEORGIAN SMALL LETTER AEN;Ll;0;L;;;;;N;;;10CD;;10CD
+ 2D30;TIFINAGH LETTER YA;Lo;0;L;;;;;N;;;;;
+ 2D31;TIFINAGH LETTER YAB;Lo;0;L;;;;;N;;;;;
+ 2D32;TIFINAGH LETTER YABH;Lo;0;L;;;;;N;;;;;
+ 2D33;TIFINAGH LETTER YAG;Lo;0;L;;;;;N;;;;;
+ 2D34;TIFINAGH LETTER YAGHH;Lo;0;L;;;;;N;;;;;
+ 2D35;TIFINAGH LETTER BERBER ACADEMY YAJ;Lo;0;L;;;;;N;;;;;
+ 2D36;TIFINAGH LETTER YAJ;Lo;0;L;;;;;N;;;;;
+ 2D37;TIFINAGH LETTER YAD;Lo;0;L;;;;;N;;;;;
+ 2D38;TIFINAGH LETTER YADH;Lo;0;L;;;;;N;;;;;
+ 2D39;TIFINAGH LETTER YADD;Lo;0;L;;;;;N;;;;;
+ 2D3A;TIFINAGH LETTER YADDH;Lo;0;L;;;;;N;;;;;
+ 2D3B;TIFINAGH LETTER YEY;Lo;0;L;;;;;N;;;;;
+ 2D3C;TIFINAGH LETTER YAF;Lo;0;L;;;;;N;;;;;
+ 2D3D;TIFINAGH LETTER YAK;Lo;0;L;;;;;N;;;;;
+ 2D3E;TIFINAGH LETTER TUAREG YAK;Lo;0;L;;;;;N;;;;;
+ 2D3F;TIFINAGH LETTER YAKHH;Lo;0;L;;;;;N;;;;;
+ 2D40;TIFINAGH LETTER YAH;Lo;0;L;;;;;N;;;;;
+ 2D41;TIFINAGH LETTER BERBER ACADEMY YAH;Lo;0;L;;;;;N;;;;;
+ 2D42;TIFINAGH LETTER TUAREG YAH;Lo;0;L;;;;;N;;;;;
+ 2D43;TIFINAGH LETTER YAHH;Lo;0;L;;;;;N;;;;;
+ 2D44;TIFINAGH LETTER YAA;Lo;0;L;;;;;N;;;;;
+ 2D45;TIFINAGH LETTER YAKH;Lo;0;L;;;;;N;;;;;
+ 2D46;TIFINAGH LETTER TUAREG YAKH;Lo;0;L;;;;;N;;;;;
+ 2D47;TIFINAGH LETTER YAQ;Lo;0;L;;;;;N;;;;;
+ 2D48;TIFINAGH LETTER TUAREG YAQ;Lo;0;L;;;;;N;;;;;
+ 2D49;TIFINAGH LETTER YI;Lo;0;L;;;;;N;;;;;
+ 2D4A;TIFINAGH LETTER YAZH;Lo;0;L;;;;;N;;;;;
+ 2D4B;TIFINAGH LETTER AHAGGAR YAZH;Lo;0;L;;;;;N;;;;;
+ 2D4C;TIFINAGH LETTER TUAREG YAZH;Lo;0;L;;;;;N;;;;;
+ 2D4D;TIFINAGH LETTER YAL;Lo;0;L;;;;;N;;;;;
+ 2D4E;TIFINAGH LETTER YAM;Lo;0;L;;;;;N;;;;;
+ 2D4F;TIFINAGH LETTER YAN;Lo;0;L;;;;;N;;;;;
+ 2D50;TIFINAGH LETTER TUAREG YAGN;Lo;0;L;;;;;N;;;;;
+ 2D51;TIFINAGH LETTER TUAREG YANG;Lo;0;L;;;;;N;;;;;
+ 2D52;TIFINAGH LETTER YAP;Lo;0;L;;;;;N;;;;;
+ 2D53;TIFINAGH LETTER YU;Lo;0;L;;;;;N;;;;;
+ 2D54;TIFINAGH LETTER YAR;Lo;0;L;;;;;N;;;;;
+ 2D55;TIFINAGH LETTER YARR;Lo;0;L;;;;;N;;;;;
+ 2D56;TIFINAGH LETTER YAGH;Lo;0;L;;;;;N;;;;;
+ 2D57;TIFINAGH LETTER TUAREG YAGH;Lo;0;L;;;;;N;;;;;
+ 2D58;TIFINAGH LETTER AYER YAGH;Lo;0;L;;;;;N;;;;;
+ 2D59;TIFINAGH LETTER YAS;Lo;0;L;;;;;N;;;;;
+ 2D5A;TIFINAGH LETTER YASS;Lo;0;L;;;;;N;;;;;
+ 2D5B;TIFINAGH LETTER YASH;Lo;0;L;;;;;N;;;;;
+ 2D5C;TIFINAGH LETTER YAT;Lo;0;L;;;;;N;;;;;
+ 2D5D;TIFINAGH LETTER YATH;Lo;0;L;;;;;N;;;;;
+ 2D5E;TIFINAGH LETTER YACH;Lo;0;L;;;;;N;;;;;
+ 2D5F;TIFINAGH LETTER YATT;Lo;0;L;;;;;N;;;;;
+ 2D60;TIFINAGH LETTER YAV;Lo;0;L;;;;;N;;;;;
+ 2D61;TIFINAGH LETTER YAW;Lo;0;L;;;;;N;;;;;
+ 2D62;TIFINAGH LETTER YAY;Lo;0;L;;;;;N;;;;;
+ 2D63;TIFINAGH LETTER YAZ;Lo;0;L;;;;;N;;;;;
+ 2D64;TIFINAGH LETTER TAWELLEMET YAZ;Lo;0;L;;;;;N;;;;;
+ 2D65;TIFINAGH LETTER YAZZ;Lo;0;L;;;;;N;;;;;
+ 2D66;TIFINAGH LETTER YE;Lo;0;L;;;;;N;;;;;
+ 2D67;TIFINAGH LETTER YO;Lo;0;L;;;;;N;;;;;
+ 2D6F;TIFINAGH MODIFIER LETTER LABIALIZATION MARK;Lm;0;L;<super> 2D61;;;;N;;;;;
+ 2D70;TIFINAGH SEPARATOR MARK;Po;0;L;;;;;N;;;;;
+ 2D7F;TIFINAGH CONSONANT JOINER;Mn;9;NSM;;;;;N;;;;;
+ 2D80;ETHIOPIC SYLLABLE LOA;Lo;0;L;;;;;N;;;;;
+ 2D81;ETHIOPIC SYLLABLE MOA;Lo;0;L;;;;;N;;;;;
+ 2D82;ETHIOPIC SYLLABLE ROA;Lo;0;L;;;;;N;;;;;
+ 2D83;ETHIOPIC SYLLABLE SOA;Lo;0;L;;;;;N;;;;;
+ 2D84;ETHIOPIC SYLLABLE SHOA;Lo;0;L;;;;;N;;;;;
+ 2D85;ETHIOPIC SYLLABLE BOA;Lo;0;L;;;;;N;;;;;
+ 2D86;ETHIOPIC SYLLABLE TOA;Lo;0;L;;;;;N;;;;;
+ 2D87;ETHIOPIC SYLLABLE COA;Lo;0;L;;;;;N;;;;;
+ 2D88;ETHIOPIC SYLLABLE NOA;Lo;0;L;;;;;N;;;;;
+ 2D89;ETHIOPIC SYLLABLE NYOA;Lo;0;L;;;;;N;;;;;
+ 2D8A;ETHIOPIC SYLLABLE GLOTTAL OA;Lo;0;L;;;;;N;;;;;
+ 2D8B;ETHIOPIC SYLLABLE ZOA;Lo;0;L;;;;;N;;;;;
+ 2D8C;ETHIOPIC SYLLABLE DOA;Lo;0;L;;;;;N;;;;;
+ 2D8D;ETHIOPIC SYLLABLE DDOA;Lo;0;L;;;;;N;;;;;
+ 2D8E;ETHIOPIC SYLLABLE JOA;Lo;0;L;;;;;N;;;;;
+ 2D8F;ETHIOPIC SYLLABLE THOA;Lo;0;L;;;;;N;;;;;
+ 2D90;ETHIOPIC SYLLABLE CHOA;Lo;0;L;;;;;N;;;;;
+ 2D91;ETHIOPIC SYLLABLE PHOA;Lo;0;L;;;;;N;;;;;
+ 2D92;ETHIOPIC SYLLABLE POA;Lo;0;L;;;;;N;;;;;
+ 2D93;ETHIOPIC SYLLABLE GGWA;Lo;0;L;;;;;N;;;;;
+ 2D94;ETHIOPIC SYLLABLE GGWI;Lo;0;L;;;;;N;;;;;
+ 2D95;ETHIOPIC SYLLABLE GGWEE;Lo;0;L;;;;;N;;;;;
+ 2D96;ETHIOPIC SYLLABLE GGWE;Lo;0;L;;;;;N;;;;;
+ 2DA0;ETHIOPIC SYLLABLE SSA;Lo;0;L;;;;;N;;;;;
+ 2DA1;ETHIOPIC SYLLABLE SSU;Lo;0;L;;;;;N;;;;;
+ 2DA2;ETHIOPIC SYLLABLE SSI;Lo;0;L;;;;;N;;;;;
+ 2DA3;ETHIOPIC SYLLABLE SSAA;Lo;0;L;;;;;N;;;;;
+ 2DA4;ETHIOPIC SYLLABLE SSEE;Lo;0;L;;;;;N;;;;;
+ 2DA5;ETHIOPIC SYLLABLE SSE;Lo;0;L;;;;;N;;;;;
+ 2DA6;ETHIOPIC SYLLABLE SSO;Lo;0;L;;;;;N;;;;;
+ 2DA8;ETHIOPIC SYLLABLE CCA;Lo;0;L;;;;;N;;;;;
+ 2DA9;ETHIOPIC SYLLABLE CCU;Lo;0;L;;;;;N;;;;;
+ 2DAA;ETHIOPIC SYLLABLE CCI;Lo;0;L;;;;;N;;;;;
+ 2DAB;ETHIOPIC SYLLABLE CCAA;Lo;0;L;;;;;N;;;;;
+ 2DAC;ETHIOPIC SYLLABLE CCEE;Lo;0;L;;;;;N;;;;;
+ 2DAD;ETHIOPIC SYLLABLE CCE;Lo;0;L;;;;;N;;;;;
+ 2DAE;ETHIOPIC SYLLABLE CCO;Lo;0;L;;;;;N;;;;;
+ 2DB0;ETHIOPIC SYLLABLE ZZA;Lo;0;L;;;;;N;;;;;
+ 2DB1;ETHIOPIC SYLLABLE ZZU;Lo;0;L;;;;;N;;;;;
+ 2DB2;ETHIOPIC SYLLABLE ZZI;Lo;0;L;;;;;N;;;;;
+ 2DB3;ETHIOPIC SYLLABLE ZZAA;Lo;0;L;;;;;N;;;;;
+ 2DB4;ETHIOPIC SYLLABLE ZZEE;Lo;0;L;;;;;N;;;;;
+ 2DB5;ETHIOPIC SYLLABLE ZZE;Lo;0;L;;;;;N;;;;;
+ 2DB6;ETHIOPIC SYLLABLE ZZO;Lo;0;L;;;;;N;;;;;
+ 2DB8;ETHIOPIC SYLLABLE CCHA;Lo;0;L;;;;;N;;;;;
+ 2DB9;ETHIOPIC SYLLABLE CCHU;Lo;0;L;;;;;N;;;;;
+ 2DBA;ETHIOPIC SYLLABLE CCHI;Lo;0;L;;;;;N;;;;;
+ 2DBB;ETHIOPIC SYLLABLE CCHAA;Lo;0;L;;;;;N;;;;;
+ 2DBC;ETHIOPIC SYLLABLE CCHEE;Lo;0;L;;;;;N;;;;;
+ 2DBD;ETHIOPIC SYLLABLE CCHE;Lo;0;L;;;;;N;;;;;
+ 2DBE;ETHIOPIC SYLLABLE CCHO;Lo;0;L;;;;;N;;;;;
+ 2DC0;ETHIOPIC SYLLABLE QYA;Lo;0;L;;;;;N;;;;;
+ 2DC1;ETHIOPIC SYLLABLE QYU;Lo;0;L;;;;;N;;;;;
+ 2DC2;ETHIOPIC SYLLABLE QYI;Lo;0;L;;;;;N;;;;;
+ 2DC3;ETHIOPIC SYLLABLE QYAA;Lo;0;L;;;;;N;;;;;
+ 2DC4;ETHIOPIC SYLLABLE QYEE;Lo;0;L;;;;;N;;;;;
+ 2DC5;ETHIOPIC SYLLABLE QYE;Lo;0;L;;;;;N;;;;;
+ 2DC6;ETHIOPIC SYLLABLE QYO;Lo;0;L;;;;;N;;;;;
+ 2DC8;ETHIOPIC SYLLABLE KYA;Lo;0;L;;;;;N;;;;;
+ 2DC9;ETHIOPIC SYLLABLE KYU;Lo;0;L;;;;;N;;;;;
+ 2DCA;ETHIOPIC SYLLABLE KYI;Lo;0;L;;;;;N;;;;;
+ 2DCB;ETHIOPIC SYLLABLE KYAA;Lo;0;L;;;;;N;;;;;
+ 2DCC;ETHIOPIC SYLLABLE KYEE;Lo;0;L;;;;;N;;;;;
+ 2DCD;ETHIOPIC SYLLABLE KYE;Lo;0;L;;;;;N;;;;;
+ 2DCE;ETHIOPIC SYLLABLE KYO;Lo;0;L;;;;;N;;;;;
+ 2DD0;ETHIOPIC SYLLABLE XYA;Lo;0;L;;;;;N;;;;;
+ 2DD1;ETHIOPIC SYLLABLE XYU;Lo;0;L;;;;;N;;;;;
+ 2DD2;ETHIOPIC SYLLABLE XYI;Lo;0;L;;;;;N;;;;;
+ 2DD3;ETHIOPIC SYLLABLE XYAA;Lo;0;L;;;;;N;;;;;
+ 2DD4;ETHIOPIC SYLLABLE XYEE;Lo;0;L;;;;;N;;;;;
+ 2DD5;ETHIOPIC SYLLABLE XYE;Lo;0;L;;;;;N;;;;;
+ 2DD6;ETHIOPIC SYLLABLE XYO;Lo;0;L;;;;;N;;;;;
+ 2DD8;ETHIOPIC SYLLABLE GYA;Lo;0;L;;;;;N;;;;;
+ 2DD9;ETHIOPIC SYLLABLE GYU;Lo;0;L;;;;;N;;;;;
+ 2DDA;ETHIOPIC SYLLABLE GYI;Lo;0;L;;;;;N;;;;;
+ 2DDB;ETHIOPIC SYLLABLE GYAA;Lo;0;L;;;;;N;;;;;
+ 2DDC;ETHIOPIC SYLLABLE GYEE;Lo;0;L;;;;;N;;;;;
+ 2DDD;ETHIOPIC SYLLABLE GYE;Lo;0;L;;;;;N;;;;;
+ 2DDE;ETHIOPIC SYLLABLE GYO;Lo;0;L;;;;;N;;;;;
+ 2DE0;COMBINING CYRILLIC LETTER BE;Mn;230;NSM;;;;;N;;;;;
+ 2DE1;COMBINING CYRILLIC LETTER VE;Mn;230;NSM;;;;;N;;;;;
+ 2DE2;COMBINING CYRILLIC LETTER GHE;Mn;230;NSM;;;;;N;;;;;
+ 2DE3;COMBINING CYRILLIC LETTER DE;Mn;230;NSM;;;;;N;;;;;
+ 2DE4;COMBINING CYRILLIC LETTER ZHE;Mn;230;NSM;;;;;N;;;;;
+ 2DE5;COMBINING CYRILLIC LETTER ZE;Mn;230;NSM;;;;;N;;;;;
+ 2DE6;COMBINING CYRILLIC LETTER KA;Mn;230;NSM;;;;;N;;;;;
+ 2DE7;COMBINING CYRILLIC LETTER EL;Mn;230;NSM;;;;;N;;;;;
+ 2DE8;COMBINING CYRILLIC LETTER EM;Mn;230;NSM;;;;;N;;;;;
+ 2DE9;COMBINING CYRILLIC LETTER EN;Mn;230;NSM;;;;;N;;;;;
+ 2DEA;COMBINING CYRILLIC LETTER O;Mn;230;NSM;;;;;N;;;;;
+ 2DEB;COMBINING CYRILLIC LETTER PE;Mn;230;NSM;;;;;N;;;;;
+ 2DEC;COMBINING CYRILLIC LETTER ER;Mn;230;NSM;;;;;N;;;;;
+ 2DED;COMBINING CYRILLIC LETTER ES;Mn;230;NSM;;;;;N;;;;;
+ 2DEE;COMBINING CYRILLIC LETTER TE;Mn;230;NSM;;;;;N;;;;;
+ 2DEF;COMBINING CYRILLIC LETTER HA;Mn;230;NSM;;;;;N;;;;;
+ 2DF0;COMBINING CYRILLIC LETTER TSE;Mn;230;NSM;;;;;N;;;;;
+ 2DF1;COMBINING CYRILLIC LETTER CHE;Mn;230;NSM;;;;;N;;;;;
+ 2DF2;COMBINING CYRILLIC LETTER SHA;Mn;230;NSM;;;;;N;;;;;
+ 2DF3;COMBINING CYRILLIC LETTER SHCHA;Mn;230;NSM;;;;;N;;;;;
+ 2DF4;COMBINING CYRILLIC LETTER FITA;Mn;230;NSM;;;;;N;;;;;
+ 2DF5;COMBINING CYRILLIC LETTER ES-TE;Mn;230;NSM;;;;;N;;;;;
+ 2DF6;COMBINING CYRILLIC LETTER A;Mn;230;NSM;;;;;N;;;;;
+ 2DF7;COMBINING CYRILLIC LETTER IE;Mn;230;NSM;;;;;N;;;;;
+ 2DF8;COMBINING CYRILLIC LETTER DJERV;Mn;230;NSM;;;;;N;;;;;
+ 2DF9;COMBINING CYRILLIC LETTER MONOGRAPH UK;Mn;230;NSM;;;;;N;;;;;
+ 2DFA;COMBINING CYRILLIC LETTER YAT;Mn;230;NSM;;;;;N;;;;;
+ 2DFB;COMBINING CYRILLIC LETTER YU;Mn;230;NSM;;;;;N;;;;;
+ 2DFC;COMBINING CYRILLIC LETTER IOTIFIED A;Mn;230;NSM;;;;;N;;;;;
+ 2DFD;COMBINING CYRILLIC LETTER LITTLE YUS;Mn;230;NSM;;;;;N;;;;;
+ 2DFE;COMBINING CYRILLIC LETTER BIG YUS;Mn;230;NSM;;;;;N;;;;;
+ 2DFF;COMBINING CYRILLIC LETTER IOTIFIED BIG YUS;Mn;230;NSM;;;;;N;;;;;
+ 2E00;RIGHT ANGLE SUBSTITUTION MARKER;Po;0;ON;;;;;N;;;;;
+ 2E01;RIGHT ANGLE DOTTED SUBSTITUTION MARKER;Po;0;ON;;;;;N;;;;;
+ 2E02;LEFT SUBSTITUTION BRACKET;Pi;0;ON;;;;;Y;;;;;
+ 2E03;RIGHT SUBSTITUTION BRACKET;Pf;0;ON;;;;;Y;;;;;
+ 2E04;LEFT DOTTED SUBSTITUTION BRACKET;Pi;0;ON;;;;;Y;;;;;
+ 2E05;RIGHT DOTTED SUBSTITUTION BRACKET;Pf;0;ON;;;;;Y;;;;;
+ 2E06;RAISED INTERPOLATION MARKER;Po;0;ON;;;;;N;;;;;
+ 2E07;RAISED DOTTED INTERPOLATION MARKER;Po;0;ON;;;;;N;;;;;
+ 2E08;DOTTED TRANSPOSITION MARKER;Po;0;ON;;;;;N;;;;;
+ 2E09;LEFT TRANSPOSITION BRACKET;Pi;0;ON;;;;;Y;;;;;
+ 2E0A;RIGHT TRANSPOSITION BRACKET;Pf;0;ON;;;;;Y;;;;;
+ 2E0B;RAISED SQUARE;Po;0;ON;;;;;N;;;;;
+ 2E0C;LEFT RAISED OMISSION BRACKET;Pi;0;ON;;;;;Y;;;;;
+ 2E0D;RIGHT RAISED OMISSION BRACKET;Pf;0;ON;;;;;Y;;;;;
+ 2E0E;EDITORIAL CORONIS;Po;0;ON;;;;;N;;;;;
+ 2E0F;PARAGRAPHOS;Po;0;ON;;;;;N;;;;;
+ 2E10;FORKED PARAGRAPHOS;Po;0;ON;;;;;N;;;;;
+ 2E11;REVERSED FORKED PARAGRAPHOS;Po;0;ON;;;;;N;;;;;
+ 2E12;HYPODIASTOLE;Po;0;ON;;;;;N;;;;;
+ 2E13;DOTTED OBELOS;Po;0;ON;;;;;N;;;;;
+ 2E14;DOWNWARDS ANCORA;Po;0;ON;;;;;N;;;;;
+ 2E15;UPWARDS ANCORA;Po;0;ON;;;;;N;;;;;
+ 2E16;DOTTED RIGHT-POINTING ANGLE;Po;0;ON;;;;;N;;;;;
+ 2E17;DOUBLE OBLIQUE HYPHEN;Pd;0;ON;;;;;N;;;;;
+ 2E18;INVERTED INTERROBANG;Po;0;ON;;;;;N;;;;;
+ 2E19;PALM BRANCH;Po;0;ON;;;;;N;;;;;
+ 2E1A;HYPHEN WITH DIAERESIS;Pd;0;ON;;;;;N;;;;;
+ 2E1B;TILDE WITH RING ABOVE;Po;0;ON;;;;;N;;;;;
+ 2E1C;LEFT LOW PARAPHRASE BRACKET;Pi;0;ON;;;;;Y;;;;;
+ 2E1D;RIGHT LOW PARAPHRASE BRACKET;Pf;0;ON;;;;;Y;;;;;
+ 2E1E;TILDE WITH DOT ABOVE;Po;0;ON;;;;;N;;;;;
+ 2E1F;TILDE WITH DOT BELOW;Po;0;ON;;;;;N;;;;;
+ 2E20;LEFT VERTICAL BAR WITH QUILL;Pi;0;ON;;;;;Y;;;;;
+ 2E21;RIGHT VERTICAL BAR WITH QUILL;Pf;0;ON;;;;;Y;;;;;
+ 2E22;TOP LEFT HALF BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 2E23;TOP RIGHT HALF BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 2E24;BOTTOM LEFT HALF BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 2E25;BOTTOM RIGHT HALF BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 2E26;LEFT SIDEWAYS U BRACKET;Ps;0;ON;;;;;Y;;;;;
+ 2E27;RIGHT SIDEWAYS U BRACKET;Pe;0;ON;;;;;Y;;;;;
+ 2E28;LEFT DOUBLE PARENTHESIS;Ps;0;ON;;;;;Y;;;;;
+ 2E29;RIGHT DOUBLE PARENTHESIS;Pe;0;ON;;;;;Y;;;;;
+ 2E2A;TWO DOTS OVER ONE DOT PUNCTUATION;Po;0;ON;;;;;N;;;;;
+ 2E2B;ONE DOT OVER TWO DOTS PUNCTUATION;Po;0;ON;;;;;N;;;;;
+ 2E2C;SQUARED FOUR DOT PUNCTUATION;Po;0;ON;;;;;N;;;;;
+ 2E2D;FIVE DOT MARK;Po;0;ON;;;;;N;;;;;
+ 2E2E;REVERSED QUESTION MARK;Po;0;ON;;;;;N;;;;;
+ 2E2F;VERTICAL TILDE;Lm;0;ON;;;;;N;;;;;
+ 2E30;RING POINT;Po;0;ON;;;;;N;;;;;
+ 2E31;WORD SEPARATOR MIDDLE DOT;Po;0;ON;;;;;N;;;;;
+ 2E32;TURNED COMMA;Po;0;ON;;;;;N;;;;;
+ 2E33;RAISED DOT;Po;0;ON;;;;;N;;;;;
+ 2E34;RAISED COMMA;Po;0;ON;;;;;N;;;;;
+ 2E35;TURNED SEMICOLON;Po;0;ON;;;;;N;;;;;
+ 2E36;DAGGER WITH LEFT GUARD;Po;0;ON;;;;;N;;;;;
+ 2E37;DAGGER WITH RIGHT GUARD;Po;0;ON;;;;;N;;;;;
+ 2E38;TURNED DAGGER;Po;0;ON;;;;;N;;;;;
+ 2E39;TOP HALF SECTION SIGN;Po;0;ON;;;;;N;;;;;
+ 2E3A;TWO-EM DASH;Pd;0;ON;;;;;N;;;;;
+ 2E3B;THREE-EM DASH;Pd;0;ON;;;;;N;;;;;
+ 2E3C;STENOGRAPHIC FULL STOP;Po;0;ON;;;;;N;;;;;
+ 2E3D;VERTICAL SIX DOTS;Po;0;ON;;;;;N;;;;;
+ 2E3E;WIGGLY VERTICAL LINE;Po;0;ON;;;;;N;;;;;
+ 2E3F;CAPITULUM;Po;0;ON;;;;;N;;;;;
+ 2E40;DOUBLE HYPHEN;Pd;0;ON;;;;;N;;;;;
+ 2E41;REVERSED COMMA;Po;0;ON;;;;;N;;;;;
+ 2E42;DOUBLE LOW-REVERSED-9 QUOTATION MARK;Ps;0;ON;;;;;N;;;;;
+ 2E43;DASH WITH LEFT UPTURN;Po;0;ON;;;;;N;;;;;
+ 2E44;DOUBLE SUSPENSION MARK;Po;0;ON;;;;;N;;;;;
+ 2E45;INVERTED LOW KAVYKA;Po;0;ON;;;;;N;;;;;
+ 2E46;INVERTED LOW KAVYKA WITH KAVYKA ABOVE;Po;0;ON;;;;;N;;;;;
+ 2E47;LOW KAVYKA;Po;0;ON;;;;;N;;;;;
+ 2E48;LOW KAVYKA WITH DOT;Po;0;ON;;;;;N;;;;;
+ 2E49;DOUBLE STACKED COMMA;Po;0;ON;;;;;N;;;;;
+ 2E4A;DOTTED SOLIDUS;Po;0;ON;;;;;N;;;;;
+ 2E4B;TRIPLE DAGGER;Po;0;ON;;;;;N;;;;;
+ 2E4C;MEDIEVAL COMMA;Po;0;ON;;;;;N;;;;;
+ 2E4D;PARAGRAPHUS MARK;Po;0;ON;;;;;N;;;;;
+ 2E4E;PUNCTUS ELEVATUS MARK;Po;0;ON;;;;;N;;;;;
+ 2E4F;CORNISH VERSE DIVIDER;Po;0;ON;;;;;N;;;;;
+ 2E80;CJK RADICAL REPEAT;So;0;ON;;;;;N;;;;;
+ 2E81;CJK RADICAL CLIFF;So;0;ON;;;;;N;;;;;
+ 2E82;CJK RADICAL SECOND ONE;So;0;ON;;;;;N;;;;;
+ 2E83;CJK RADICAL SECOND TWO;So;0;ON;;;;;N;;;;;
+ 2E84;CJK RADICAL SECOND THREE;So;0;ON;;;;;N;;;;;
+ 2E85;CJK RADICAL PERSON;So;0;ON;;;;;N;;;;;
+ 2E86;CJK RADICAL BOX;So;0;ON;;;;;N;;;;;
+ 2E87;CJK RADICAL TABLE;So;0;ON;;;;;N;;;;;
+ 2E88;CJK RADICAL KNIFE ONE;So;0;ON;;;;;N;;;;;
+ 2E89;CJK RADICAL KNIFE TWO;So;0;ON;;;;;N;;;;;
+ 2E8A;CJK RADICAL DIVINATION;So;0;ON;;;;;N;;;;;
+ 2E8B;CJK RADICAL SEAL;So;0;ON;;;;;N;;;;;
+ 2E8C;CJK RADICAL SMALL ONE;So;0;ON;;;;;N;;;;;
+ 2E8D;CJK RADICAL SMALL TWO;So;0;ON;;;;;N;;;;;
+ 2E8E;CJK RADICAL LAME ONE;So;0;ON;;;;;N;;;;;
+ 2E8F;CJK RADICAL LAME TWO;So;0;ON;;;;;N;;;;;
+ 2E90;CJK RADICAL LAME THREE;So;0;ON;;;;;N;;;;;
+ 2E91;CJK RADICAL LAME FOUR;So;0;ON;;;;;N;;;;;
+ 2E92;CJK RADICAL SNAKE;So;0;ON;;;;;N;;;;;
+ 2E93;CJK RADICAL THREAD;So;0;ON;;;;;N;;;;;
+ 2E94;CJK RADICAL SNOUT ONE;So;0;ON;;;;;N;;;;;
+ 2E95;CJK RADICAL SNOUT TWO;So;0;ON;;;;;N;;;;;
+ 2E96;CJK RADICAL HEART ONE;So;0;ON;;;;;N;;;;;
+ 2E97;CJK RADICAL HEART TWO;So;0;ON;;;;;N;;;;;
+ 2E98;CJK RADICAL HAND;So;0;ON;;;;;N;;;;;
+ 2E99;CJK RADICAL RAP;So;0;ON;;;;;N;;;;;
+ 2E9B;CJK RADICAL CHOKE;So;0;ON;;;;;N;;;;;
+ 2E9C;CJK RADICAL SUN;So;0;ON;;;;;N;;;;;
+ 2E9D;CJK RADICAL MOON;So;0;ON;;;;;N;;;;;
+ 2E9E;CJK RADICAL DEATH;So;0;ON;;;;;N;;;;;
+ 2E9F;CJK RADICAL MOTHER;So;0;ON;<compat> 6BCD;;;;N;;;;;
+ 2EA0;CJK RADICAL CIVILIAN;So;0;ON;;;;;N;;;;;
+ 2EA1;CJK RADICAL WATER ONE;So;0;ON;;;;;N;;;;;
+ 2EA2;CJK RADICAL WATER TWO;So;0;ON;;;;;N;;;;;
+ 2EA3;CJK RADICAL FIRE;So;0;ON;;;;;N;;;;;
+ 2EA4;CJK RADICAL PAW ONE;So;0;ON;;;;;N;;;;;
+ 2EA5;CJK RADICAL PAW TWO;So;0;ON;;;;;N;;;;;
+ 2EA6;CJK RADICAL SIMPLIFIED HALF TREE TRUNK;So;0;ON;;;;;N;;;;;
+ 2EA7;CJK RADICAL COW;So;0;ON;;;;;N;;;;;
+ 2EA8;CJK RADICAL DOG;So;0;ON;;;;;N;;;;;
+ 2EA9;CJK RADICAL JADE;So;0;ON;;;;;N;;;;;
+ 2EAA;CJK RADICAL BOLT OF CLOTH;So;0;ON;;;;;N;;;;;
+ 2EAB;CJK RADICAL EYE;So;0;ON;;;;;N;;;;;
+ 2EAC;CJK RADICAL SPIRIT ONE;So;0;ON;;;;;N;;;;;
+ 2EAD;CJK RADICAL SPIRIT TWO;So;0;ON;;;;;N;;;;;
+ 2EAE;CJK RADICAL BAMBOO;So;0;ON;;;;;N;;;;;
+ 2EAF;CJK RADICAL SILK;So;0;ON;;;;;N;;;;;
+ 2EB0;CJK RADICAL C-SIMPLIFIED SILK;So;0;ON;;;;;N;;;;;
+ 2EB1;CJK RADICAL NET ONE;So;0;ON;;;;;N;;;;;
+ 2EB2;CJK RADICAL NET TWO;So;0;ON;;;;;N;;;;;
+ 2EB3;CJK RADICAL NET THREE;So;0;ON;;;;;N;;;;;
+ 2EB4;CJK RADICAL NET FOUR;So;0;ON;;;;;N;;;;;
+ 2EB5;CJK RADICAL MESH;So;0;ON;;;;;N;;;;;
+ 2EB6;CJK RADICAL SHEEP;So;0;ON;;;;;N;;;;;
+ 2EB7;CJK RADICAL RAM;So;0;ON;;;;;N;;;;;
+ 2EB8;CJK RADICAL EWE;So;0;ON;;;;;N;;;;;
+ 2EB9;CJK RADICAL OLD;So;0;ON;;;;;N;;;;;
+ 2EBA;CJK RADICAL BRUSH ONE;So;0;ON;;;;;N;;;;;
+ 2EBB;CJK RADICAL BRUSH TWO;So;0;ON;;;;;N;;;;;
+ 2EBC;CJK RADICAL MEAT;So;0;ON;;;;;N;;;;;
+ 2EBD;CJK RADICAL MORTAR;So;0;ON;;;;;N;;;;;
+ 2EBE;CJK RADICAL GRASS ONE;So;0;ON;;;;;N;;;;;
+ 2EBF;CJK RADICAL GRASS TWO;So;0;ON;;;;;N;;;;;
+ 2EC0;CJK RADICAL GRASS THREE;So;0;ON;;;;;N;;;;;
+ 2EC1;CJK RADICAL TIGER;So;0;ON;;;;;N;;;;;
+ 2EC2;CJK RADICAL CLOTHES;So;0;ON;;;;;N;;;;;
+ 2EC3;CJK RADICAL WEST ONE;So;0;ON;;;;;N;;;;;
+ 2EC4;CJK RADICAL WEST TWO;So;0;ON;;;;;N;;;;;
+ 2EC5;CJK RADICAL C-SIMPLIFIED SEE;So;0;ON;;;;;N;;;;;
+ 2EC6;CJK RADICAL SIMPLIFIED HORN;So;0;ON;;;;;N;;;;;
+ 2EC7;CJK RADICAL HORN;So;0;ON;;;;;N;;;;;
+ 2EC8;CJK RADICAL C-SIMPLIFIED SPEECH;So;0;ON;;;;;N;;;;;
+ 2EC9;CJK RADICAL C-SIMPLIFIED SHELL;So;0;ON;;;;;N;;;;;
+ 2ECA;CJK RADICAL FOOT;So;0;ON;;;;;N;;;;;
+ 2ECB;CJK RADICAL C-SIMPLIFIED CART;So;0;ON;;;;;N;;;;;
+ 2ECC;CJK RADICAL SIMPLIFIED WALK;So;0;ON;;;;;N;;;;;
+ 2ECD;CJK RADICAL WALK ONE;So;0;ON;;;;;N;;;;;
+ 2ECE;CJK RADICAL WALK TWO;So;0;ON;;;;;N;;;;;
+ 2ECF;CJK RADICAL CITY;So;0;ON;;;;;N;;;;;
+ 2ED0;CJK RADICAL C-SIMPLIFIED GOLD;So;0;ON;;;;;N;;;;;
+ 2ED1;CJK RADICAL LONG ONE;So;0;ON;;;;;N;;;;;
+ 2ED2;CJK RADICAL LONG TWO;So;0;ON;;;;;N;;;;;
+ 2ED3;CJK RADICAL C-SIMPLIFIED LONG;So;0;ON;;;;;N;;;;;
+ 2ED4;CJK RADICAL C-SIMPLIFIED GATE;So;0;ON;;;;;N;;;;;
+ 2ED5;CJK RADICAL MOUND ONE;So;0;ON;;;;;N;;;;;
+ 2ED6;CJK RADICAL MOUND TWO;So;0;ON;;;;;N;;;;;
+ 2ED7;CJK RADICAL RAIN;So;0;ON;;;;;N;;;;;
+ 2ED8;CJK RADICAL BLUE;So;0;ON;;;;;N;;;;;
+ 2ED9;CJK RADICAL C-SIMPLIFIED TANNED LEATHER;So;0;ON;;;;;N;;;;;
+ 2EDA;CJK RADICAL C-SIMPLIFIED LEAF;So;0;ON;;;;;N;;;;;
+ 2EDB;CJK RADICAL C-SIMPLIFIED WIND;So;0;ON;;;;;N;;;;;
+ 2EDC;CJK RADICAL C-SIMPLIFIED FLY;So;0;ON;;;;;N;;;;;
+ 2EDD;CJK RADICAL EAT ONE;So;0;ON;;;;;N;;;;;
+ 2EDE;CJK RADICAL EAT TWO;So;0;ON;;;;;N;;;;;
+ 2EDF;CJK RADICAL EAT THREE;So;0;ON;;;;;N;;;;;
+ 2EE0;CJK RADICAL C-SIMPLIFIED EAT;So;0;ON;;;;;N;;;;;
+ 2EE1;CJK RADICAL HEAD;So;0;ON;;;;;N;;;;;
+ 2EE2;CJK RADICAL C-SIMPLIFIED HORSE;So;0;ON;;;;;N;;;;;
+ 2EE3;CJK RADICAL BONE;So;0;ON;;;;;N;;;;;
+ 2EE4;CJK RADICAL GHOST;So;0;ON;;;;;N;;;;;
+ 2EE5;CJK RADICAL C-SIMPLIFIED FISH;So;0;ON;;;;;N;;;;;
+ 2EE6;CJK RADICAL C-SIMPLIFIED BIRD;So;0;ON;;;;;N;;;;;
+ 2EE7;CJK RADICAL C-SIMPLIFIED SALT;So;0;ON;;;;;N;;;;;
+ 2EE8;CJK RADICAL SIMPLIFIED WHEAT;So;0;ON;;;;;N;;;;;
+ 2EE9;CJK RADICAL SIMPLIFIED YELLOW;So;0;ON;;;;;N;;;;;
+ 2EEA;CJK RADICAL C-SIMPLIFIED FROG;So;0;ON;;;;;N;;;;;
+ 2EEB;CJK RADICAL J-SIMPLIFIED EVEN;So;0;ON;;;;;N;;;;;
+ 2EEC;CJK RADICAL C-SIMPLIFIED EVEN;So;0;ON;;;;;N;;;;;
+ 2EED;CJK RADICAL J-SIMPLIFIED TOOTH;So;0;ON;;;;;N;;;;;
+ 2EEE;CJK RADICAL C-SIMPLIFIED TOOTH;So;0;ON;;;;;N;;;;;
+ 2EEF;CJK RADICAL J-SIMPLIFIED DRAGON;So;0;ON;;;;;N;;;;;
+ 2EF0;CJK RADICAL C-SIMPLIFIED DRAGON;So;0;ON;;;;;N;;;;;
+ 2EF1;CJK RADICAL TURTLE;So;0;ON;;;;;N;;;;;
+ 2EF2;CJK RADICAL J-SIMPLIFIED TURTLE;So;0;ON;;;;;N;;;;;
+ 2EF3;CJK RADICAL C-SIMPLIFIED TURTLE;So;0;ON;<compat> 9F9F;;;;N;;;;;
+ 2F00;KANGXI RADICAL ONE;So;0;ON;<compat> 4E00;;;;N;;;;;
+ 2F01;KANGXI RADICAL LINE;So;0;ON;<compat> 4E28;;;;N;;;;;
+ 2F02;KANGXI RADICAL DOT;So;0;ON;<compat> 4E36;;;;N;;;;;
+ 2F03;KANGXI RADICAL SLASH;So;0;ON;<compat> 4E3F;;;;N;;;;;
+ 2F04;KANGXI RADICAL SECOND;So;0;ON;<compat> 4E59;;;;N;;;;;
+ 2F05;KANGXI RADICAL HOOK;So;0;ON;<compat> 4E85;;;;N;;;;;
+ 2F06;KANGXI RADICAL TWO;So;0;ON;<compat> 4E8C;;;;N;;;;;
+ 2F07;KANGXI RADICAL LID;So;0;ON;<compat> 4EA0;;;;N;;;;;
+ 2F08;KANGXI RADICAL MAN;So;0;ON;<compat> 4EBA;;;;N;;;;;
+ 2F09;KANGXI RADICAL LEGS;So;0;ON;<compat> 513F;;;;N;;;;;
+ 2F0A;KANGXI RADICAL ENTER;So;0;ON;<compat> 5165;;;;N;;;;;
+ 2F0B;KANGXI RADICAL EIGHT;So;0;ON;<compat> 516B;;;;N;;;;;
+ 2F0C;KANGXI RADICAL DOWN BOX;So;0;ON;<compat> 5182;;;;N;;;;;
+ 2F0D;KANGXI RADICAL COVER;So;0;ON;<compat> 5196;;;;N;;;;;
+ 2F0E;KANGXI RADICAL ICE;So;0;ON;<compat> 51AB;;;;N;;;;;
+ 2F0F;KANGXI RADICAL TABLE;So;0;ON;<compat> 51E0;;;;N;;;;;
+ 2F10;KANGXI RADICAL OPEN BOX;So;0;ON;<compat> 51F5;;;;N;;;;;
+ 2F11;KANGXI RADICAL KNIFE;So;0;ON;<compat> 5200;;;;N;;;;;
+ 2F12;KANGXI RADICAL POWER;So;0;ON;<compat> 529B;;;;N;;;;;
+ 2F13;KANGXI RADICAL WRAP;So;0;ON;<compat> 52F9;;;;N;;;;;
+ 2F14;KANGXI RADICAL SPOON;So;0;ON;<compat> 5315;;;;N;;;;;
+ 2F15;KANGXI RADICAL RIGHT OPEN BOX;So;0;ON;<compat> 531A;;;;N;;;;;
+ 2F16;KANGXI RADICAL HIDING ENCLOSURE;So;0;ON;<compat> 5338;;;;N;;;;;
+ 2F17;KANGXI RADICAL TEN;So;0;ON;<compat> 5341;;;;N;;;;;
+ 2F18;KANGXI RADICAL DIVINATION;So;0;ON;<compat> 535C;;;;N;;;;;
+ 2F19;KANGXI RADICAL SEAL;So;0;ON;<compat> 5369;;;;N;;;;;
+ 2F1A;KANGXI RADICAL CLIFF;So;0;ON;<compat> 5382;;;;N;;;;;
+ 2F1B;KANGXI RADICAL PRIVATE;So;0;ON;<compat> 53B6;;;;N;;;;;
+ 2F1C;KANGXI RADICAL AGAIN;So;0;ON;<compat> 53C8;;;;N;;;;;
+ 2F1D;KANGXI RADICAL MOUTH;So;0;ON;<compat> 53E3;;;;N;;;;;
+ 2F1E;KANGXI RADICAL ENCLOSURE;So;0;ON;<compat> 56D7;;;;N;;;;;
+ 2F1F;KANGXI RADICAL EARTH;So;0;ON;<compat> 571F;;;;N;;;;;
+ 2F20;KANGXI RADICAL SCHOLAR;So;0;ON;<compat> 58EB;;;;N;;;;;
+ 2F21;KANGXI RADICAL GO;So;0;ON;<compat> 5902;;;;N;;;;;
+ 2F22;KANGXI RADICAL GO SLOWLY;So;0;ON;<compat> 590A;;;;N;;;;;
+ 2F23;KANGXI RADICAL EVENING;So;0;ON;<compat> 5915;;;;N;;;;;
+ 2F24;KANGXI RADICAL BIG;So;0;ON;<compat> 5927;;;;N;;;;;
+ 2F25;KANGXI RADICAL WOMAN;So;0;ON;<compat> 5973;;;;N;;;;;
+ 2F26;KANGXI RADICAL CHILD;So;0;ON;<compat> 5B50;;;;N;;;;;
+ 2F27;KANGXI RADICAL ROOF;So;0;ON;<compat> 5B80;;;;N;;;;;
+ 2F28;KANGXI RADICAL INCH;So;0;ON;<compat> 5BF8;;;;N;;;;;
+ 2F29;KANGXI RADICAL SMALL;So;0;ON;<compat> 5C0F;;;;N;;;;;
+ 2F2A;KANGXI RADICAL LAME;So;0;ON;<compat> 5C22;;;;N;;;;;
+ 2F2B;KANGXI RADICAL CORPSE;So;0;ON;<compat> 5C38;;;;N;;;;;
+ 2F2C;KANGXI RADICAL SPROUT;So;0;ON;<compat> 5C6E;;;;N;;;;;
+ 2F2D;KANGXI RADICAL MOUNTAIN;So;0;ON;<compat> 5C71;;;;N;;;;;
+ 2F2E;KANGXI RADICAL RIVER;So;0;ON;<compat> 5DDB;;;;N;;;;;
+ 2F2F;KANGXI RADICAL WORK;So;0;ON;<compat> 5DE5;;;;N;;;;;
+ 2F30;KANGXI RADICAL ONESELF;So;0;ON;<compat> 5DF1;;;;N;;;;;
+ 2F31;KANGXI RADICAL TURBAN;So;0;ON;<compat> 5DFE;;;;N;;;;;
+ 2F32;KANGXI RADICAL DRY;So;0;ON;<compat> 5E72;;;;N;;;;;
+ 2F33;KANGXI RADICAL SHORT THREAD;So;0;ON;<compat> 5E7A;;;;N;;;;;
+ 2F34;KANGXI RADICAL DOTTED CLIFF;So;0;ON;<compat> 5E7F;;;;N;;;;;
+ 2F35;KANGXI RADICAL LONG STRIDE;So;0;ON;<compat> 5EF4;;;;N;;;;;
+ 2F36;KANGXI RADICAL TWO HANDS;So;0;ON;<compat> 5EFE;;;;N;;;;;
+ 2F37;KANGXI RADICAL SHOOT;So;0;ON;<compat> 5F0B;;;;N;;;;;
+ 2F38;KANGXI RADICAL BOW;So;0;ON;<compat> 5F13;;;;N;;;;;
+ 2F39;KANGXI RADICAL SNOUT;So;0;ON;<compat> 5F50;;;;N;;;;;
+ 2F3A;KANGXI RADICAL BRISTLE;So;0;ON;<compat> 5F61;;;;N;;;;;
+ 2F3B;KANGXI RADICAL STEP;So;0;ON;<compat> 5F73;;;;N;;;;;
+ 2F3C;KANGXI RADICAL HEART;So;0;ON;<compat> 5FC3;;;;N;;;;;
+ 2F3D;KANGXI RADICAL HALBERD;So;0;ON;<compat> 6208;;;;N;;;;;
+ 2F3E;KANGXI RADICAL DOOR;So;0;ON;<compat> 6236;;;;N;;;;;
+ 2F3F;KANGXI RADICAL HAND;So;0;ON;<compat> 624B;;;;N;;;;;
+ 2F40;KANGXI RADICAL BRANCH;So;0;ON;<compat> 652F;;;;N;;;;;
+ 2F41;KANGXI RADICAL RAP;So;0;ON;<compat> 6534;;;;N;;;;;
+ 2F42;KANGXI RADICAL SCRIPT;So;0;ON;<compat> 6587;;;;N;;;;;
+ 2F43;KANGXI RADICAL DIPPER;So;0;ON;<compat> 6597;;;;N;;;;;
+ 2F44;KANGXI RADICAL AXE;So;0;ON;<compat> 65A4;;;;N;;;;;
+ 2F45;KANGXI RADICAL SQUARE;So;0;ON;<compat> 65B9;;;;N;;;;;
+ 2F46;KANGXI RADICAL NOT;So;0;ON;<compat> 65E0;;;;N;;;;;
+ 2F47;KANGXI RADICAL SUN;So;0;ON;<compat> 65E5;;;;N;;;;;
+ 2F48;KANGXI RADICAL SAY;So;0;ON;<compat> 66F0;;;;N;;;;;
+ 2F49;KANGXI RADICAL MOON;So;0;ON;<compat> 6708;;;;N;;;;;
+ 2F4A;KANGXI RADICAL TREE;So;0;ON;<compat> 6728;;;;N;;;;;
+ 2F4B;KANGXI RADICAL LACK;So;0;ON;<compat> 6B20;;;;N;;;;;
+ 2F4C;KANGXI RADICAL STOP;So;0;ON;<compat> 6B62;;;;N;;;;;
+ 2F4D;KANGXI RADICAL DEATH;So;0;ON;<compat> 6B79;;;;N;;;;;
+ 2F4E;KANGXI RADICAL WEAPON;So;0;ON;<compat> 6BB3;;;;N;;;;;
+ 2F4F;KANGXI RADICAL DO NOT;So;0;ON;<compat> 6BCB;;;;N;;;;;
+ 2F50;KANGXI RADICAL COMPARE;So;0;ON;<compat> 6BD4;;;;N;;;;;
+ 2F51;KANGXI RADICAL FUR;So;0;ON;<compat> 6BDB;;;;N;;;;;
+ 2F52;KANGXI RADICAL CLAN;So;0;ON;<compat> 6C0F;;;;N;;;;;
+ 2F53;KANGXI RADICAL STEAM;So;0;ON;<compat> 6C14;;;;N;;;;;
+ 2F54;KANGXI RADICAL WATER;So;0;ON;<compat> 6C34;;;;N;;;;;
+ 2F55;KANGXI RADICAL FIRE;So;0;ON;<compat> 706B;;;;N;;;;;
+ 2F56;KANGXI RADICAL CLAW;So;0;ON;<compat> 722A;;;;N;;;;;
+ 2F57;KANGXI RADICAL FATHER;So;0;ON;<compat> 7236;;;;N;;;;;
+ 2F58;KANGXI RADICAL DOUBLE X;So;0;ON;<compat> 723B;;;;N;;;;;
+ 2F59;KANGXI RADICAL HALF TREE TRUNK;So;0;ON;<compat> 723F;;;;N;;;;;
+ 2F5A;KANGXI RADICAL SLICE;So;0;ON;<compat> 7247;;;;N;;;;;
+ 2F5B;KANGXI RADICAL FANG;So;0;ON;<compat> 7259;;;;N;;;;;
+ 2F5C;KANGXI RADICAL COW;So;0;ON;<compat> 725B;;;;N;;;;;
+ 2F5D;KANGXI RADICAL DOG;So;0;ON;<compat> 72AC;;;;N;;;;;
+ 2F5E;KANGXI RADICAL PROFOUND;So;0;ON;<compat> 7384;;;;N;;;;;
+ 2F5F;KANGXI RADICAL JADE;So;0;ON;<compat> 7389;;;;N;;;;;
+ 2F60;KANGXI RADICAL MELON;So;0;ON;<compat> 74DC;;;;N;;;;;
+ 2F61;KANGXI RADICAL TILE;So;0;ON;<compat> 74E6;;;;N;;;;;
+ 2F62;KANGXI RADICAL SWEET;So;0;ON;<compat> 7518;;;;N;;;;;
+ 2F63;KANGXI RADICAL LIFE;So;0;ON;<compat> 751F;;;;N;;;;;
+ 2F64;KANGXI RADICAL USE;So;0;ON;<compat> 7528;;;;N;;;;;
+ 2F65;KANGXI RADICAL FIELD;So;0;ON;<compat> 7530;;;;N;;;;;
+ 2F66;KANGXI RADICAL BOLT OF CLOTH;So;0;ON;<compat> 758B;;;;N;;;;;
+ 2F67;KANGXI RADICAL SICKNESS;So;0;ON;<compat> 7592;;;;N;;;;;
+ 2F68;KANGXI RADICAL DOTTED TENT;So;0;ON;<compat> 7676;;;;N;;;;;
+ 2F69;KANGXI RADICAL WHITE;So;0;ON;<compat> 767D;;;;N;;;;;
+ 2F6A;KANGXI RADICAL SKIN;So;0;ON;<compat> 76AE;;;;N;;;;;
+ 2F6B;KANGXI RADICAL DISH;So;0;ON;<compat> 76BF;;;;N;;;;;
+ 2F6C;KANGXI RADICAL EYE;So;0;ON;<compat> 76EE;;;;N;;;;;
+ 2F6D;KANGXI RADICAL SPEAR;So;0;ON;<compat> 77DB;;;;N;;;;;
+ 2F6E;KANGXI RADICAL ARROW;So;0;ON;<compat> 77E2;;;;N;;;;;
+ 2F6F;KANGXI RADICAL STONE;So;0;ON;<compat> 77F3;;;;N;;;;;
+ 2F70;KANGXI RADICAL SPIRIT;So;0;ON;<compat> 793A;;;;N;;;;;
+ 2F71;KANGXI RADICAL TRACK;So;0;ON;<compat> 79B8;;;;N;;;;;
+ 2F72;KANGXI RADICAL GRAIN;So;0;ON;<compat> 79BE;;;;N;;;;;
+ 2F73;KANGXI RADICAL CAVE;So;0;ON;<compat> 7A74;;;;N;;;;;
+ 2F74;KANGXI RADICAL STAND;So;0;ON;<compat> 7ACB;;;;N;;;;;
+ 2F75;KANGXI RADICAL BAMBOO;So;0;ON;<compat> 7AF9;;;;N;;;;;
+ 2F76;KANGXI RADICAL RICE;So;0;ON;<compat> 7C73;;;;N;;;;;
+ 2F77;KANGXI RADICAL SILK;So;0;ON;<compat> 7CF8;;;;N;;;;;
+ 2F78;KANGXI RADICAL JAR;So;0;ON;<compat> 7F36;;;;N;;;;;
+ 2F79;KANGXI RADICAL NET;So;0;ON;<compat> 7F51;;;;N;;;;;
+ 2F7A;KANGXI RADICAL SHEEP;So;0;ON;<compat> 7F8A;;;;N;;;;;
+ 2F7B;KANGXI RADICAL FEATHER;So;0;ON;<compat> 7FBD;;;;N;;;;;
+ 2F7C;KANGXI RADICAL OLD;So;0;ON;<compat> 8001;;;;N;;;;;
+ 2F7D;KANGXI RADICAL AND;So;0;ON;<compat> 800C;;;;N;;;;;
+ 2F7E;KANGXI RADICAL PLOW;So;0;ON;<compat> 8012;;;;N;;;;;
+ 2F7F;KANGXI RADICAL EAR;So;0;ON;<compat> 8033;;;;N;;;;;
+ 2F80;KANGXI RADICAL BRUSH;So;0;ON;<compat> 807F;;;;N;;;;;
+ 2F81;KANGXI RADICAL MEAT;So;0;ON;<compat> 8089;;;;N;;;;;
+ 2F82;KANGXI RADICAL MINISTER;So;0;ON;<compat> 81E3;;;;N;;;;;
+ 2F83;KANGXI RADICAL SELF;So;0;ON;<compat> 81EA;;;;N;;;;;
+ 2F84;KANGXI RADICAL ARRIVE;So;0;ON;<compat> 81F3;;;;N;;;;;
+ 2F85;KANGXI RADICAL MORTAR;So;0;ON;<compat> 81FC;;;;N;;;;;
+ 2F86;KANGXI RADICAL TONGUE;So;0;ON;<compat> 820C;;;;N;;;;;
+ 2F87;KANGXI RADICAL OPPOSE;So;0;ON;<compat> 821B;;;;N;;;;;
+ 2F88;KANGXI RADICAL BOAT;So;0;ON;<compat> 821F;;;;N;;;;;
+ 2F89;KANGXI RADICAL STOPPING;So;0;ON;<compat> 826E;;;;N;;;;;
+ 2F8A;KANGXI RADICAL COLOR;So;0;ON;<compat> 8272;;;;N;;;;;
+ 2F8B;KANGXI RADICAL GRASS;So;0;ON;<compat> 8278;;;;N;;;;;
+ 2F8C;KANGXI RADICAL TIGER;So;0;ON;<compat> 864D;;;;N;;;;;
+ 2F8D;KANGXI RADICAL INSECT;So;0;ON;<compat> 866B;;;;N;;;;;
+ 2F8E;KANGXI RADICAL BLOOD;So;0;ON;<compat> 8840;;;;N;;;;;
+ 2F8F;KANGXI RADICAL WALK ENCLOSURE;So;0;ON;<compat> 884C;;;;N;;;;;
+ 2F90;KANGXI RADICAL CLOTHES;So;0;ON;<compat> 8863;;;;N;;;;;
+ 2F91;KANGXI RADICAL WEST;So;0;ON;<compat> 897E;;;;N;;;;;
+ 2F92;KANGXI RADICAL SEE;So;0;ON;<compat> 898B;;;;N;;;;;
+ 2F93;KANGXI RADICAL HORN;So;0;ON;<compat> 89D2;;;;N;;;;;
+ 2F94;KANGXI RADICAL SPEECH;So;0;ON;<compat> 8A00;;;;N;;;;;
+ 2F95;KANGXI RADICAL VALLEY;So;0;ON;<compat> 8C37;;;;N;;;;;
+ 2F96;KANGXI RADICAL BEAN;So;0;ON;<compat> 8C46;;;;N;;;;;
+ 2F97;KANGXI RADICAL PIG;So;0;ON;<compat> 8C55;;;;N;;;;;
+ 2F98;KANGXI RADICAL BADGER;So;0;ON;<compat> 8C78;;;;N;;;;;
+ 2F99;KANGXI RADICAL SHELL;So;0;ON;<compat> 8C9D;;;;N;;;;;
+ 2F9A;KANGXI RADICAL RED;So;0;ON;<compat> 8D64;;;;N;;;;;
+ 2F9B;KANGXI RADICAL RUN;So;0;ON;<compat> 8D70;;;;N;;;;;
+ 2F9C;KANGXI RADICAL FOOT;So;0;ON;<compat> 8DB3;;;;N;;;;;
+ 2F9D;KANGXI RADICAL BODY;So;0;ON;<compat> 8EAB;;;;N;;;;;
+ 2F9E;KANGXI RADICAL CART;So;0;ON;<compat> 8ECA;;;;N;;;;;
+ 2F9F;KANGXI RADICAL BITTER;So;0;ON;<compat> 8F9B;;;;N;;;;;
+ 2FA0;KANGXI RADICAL MORNING;So;0;ON;<compat> 8FB0;;;;N;;;;;
+ 2FA1;KANGXI RADICAL WALK;So;0;ON;<compat> 8FB5;;;;N;;;;;
+ 2FA2;KANGXI RADICAL CITY;So;0;ON;<compat> 9091;;;;N;;;;;
+ 2FA3;KANGXI RADICAL WINE;So;0;ON;<compat> 9149;;;;N;;;;;
+ 2FA4;KANGXI RADICAL DISTINGUISH;So;0;ON;<compat> 91C6;;;;N;;;;;
+ 2FA5;KANGXI RADICAL VILLAGE;So;0;ON;<compat> 91CC;;;;N;;;;;
+ 2FA6;KANGXI RADICAL GOLD;So;0;ON;<compat> 91D1;;;;N;;;;;
+ 2FA7;KANGXI RADICAL LONG;So;0;ON;<compat> 9577;;;;N;;;;;
+ 2FA8;KANGXI RADICAL GATE;So;0;ON;<compat> 9580;;;;N;;;;;
+ 2FA9;KANGXI RADICAL MOUND;So;0;ON;<compat> 961C;;;;N;;;;;
+ 2FAA;KANGXI RADICAL SLAVE;So;0;ON;<compat> 96B6;;;;N;;;;;
+ 2FAB;KANGXI RADICAL SHORT TAILED BIRD;So;0;ON;<compat> 96B9;;;;N;;;;;
+ 2FAC;KANGXI RADICAL RAIN;So;0;ON;<compat> 96E8;;;;N;;;;;
+ 2FAD;KANGXI RADICAL BLUE;So;0;ON;<compat> 9751;;;;N;;;;;
+ 2FAE;KANGXI RADICAL WRONG;So;0;ON;<compat> 975E;;;;N;;;;;
+ 2FAF;KANGXI RADICAL FACE;So;0;ON;<compat> 9762;;;;N;;;;;
+ 2FB0;KANGXI RADICAL LEATHER;So;0;ON;<compat> 9769;;;;N;;;;;
+ 2FB1;KANGXI RADICAL TANNED LEATHER;So;0;ON;<compat> 97CB;;;;N;;;;;
+ 2FB2;KANGXI RADICAL LEEK;So;0;ON;<compat> 97ED;;;;N;;;;;
+ 2FB3;KANGXI RADICAL SOUND;So;0;ON;<compat> 97F3;;;;N;;;;;
+ 2FB4;KANGXI RADICAL LEAF;So;0;ON;<compat> 9801;;;;N;;;;;
+ 2FB5;KANGXI RADICAL WIND;So;0;ON;<compat> 98A8;;;;N;;;;;
+ 2FB6;KANGXI RADICAL FLY;So;0;ON;<compat> 98DB;;;;N;;;;;
+ 2FB7;KANGXI RADICAL EAT;So;0;ON;<compat> 98DF;;;;N;;;;;
+ 2FB8;KANGXI RADICAL HEAD;So;0;ON;<compat> 9996;;;;N;;;;;
+ 2FB9;KANGXI RADICAL FRAGRANT;So;0;ON;<compat> 9999;;;;N;;;;;
+ 2FBA;KANGXI RADICAL HORSE;So;0;ON;<compat> 99AC;;;;N;;;;;
+ 2FBB;KANGXI RADICAL BONE;So;0;ON;<compat> 9AA8;;;;N;;;;;
+ 2FBC;KANGXI RADICAL TALL;So;0;ON;<compat> 9AD8;;;;N;;;;;
+ 2FBD;KANGXI RADICAL HAIR;So;0;ON;<compat> 9ADF;;;;N;;;;;
+ 2FBE;KANGXI RADICAL FIGHT;So;0;ON;<compat> 9B25;;;;N;;;;;
+ 2FBF;KANGXI RADICAL SACRIFICIAL WINE;So;0;ON;<compat> 9B2F;;;;N;;;;;
+ 2FC0;KANGXI RADICAL CAULDRON;So;0;ON;<compat> 9B32;;;;N;;;;;
+ 2FC1;KANGXI RADICAL GHOST;So;0;ON;<compat> 9B3C;;;;N;;;;;
+ 2FC2;KANGXI RADICAL FISH;So;0;ON;<compat> 9B5A;;;;N;;;;;
+ 2FC3;KANGXI RADICAL BIRD;So;0;ON;<compat> 9CE5;;;;N;;;;;
+ 2FC4;KANGXI RADICAL SALT;So;0;ON;<compat> 9E75;;;;N;;;;;
+ 2FC5;KANGXI RADICAL DEER;So;0;ON;<compat> 9E7F;;;;N;;;;;
+ 2FC6;KANGXI RADICAL WHEAT;So;0;ON;<compat> 9EA5;;;;N;;;;;
+ 2FC7;KANGXI RADICAL HEMP;So;0;ON;<compat> 9EBB;;;;N;;;;;
+ 2FC8;KANGXI RADICAL YELLOW;So;0;ON;<compat> 9EC3;;;;N;;;;;
+ 2FC9;KANGXI RADICAL MILLET;So;0;ON;<compat> 9ECD;;;;N;;;;;
+ 2FCA;KANGXI RADICAL BLACK;So;0;ON;<compat> 9ED1;;;;N;;;;;
+ 2FCB;KANGXI RADICAL EMBROIDERY;So;0;ON;<compat> 9EF9;;;;N;;;;;
+ 2FCC;KANGXI RADICAL FROG;So;0;ON;<compat> 9EFD;;;;N;;;;;
+ 2FCD;KANGXI RADICAL TRIPOD;So;0;ON;<compat> 9F0E;;;;N;;;;;
+ 2FCE;KANGXI RADICAL DRUM;So;0;ON;<compat> 9F13;;;;N;;;;;
+ 2FCF;KANGXI RADICAL RAT;So;0;ON;<compat> 9F20;;;;N;;;;;
+ 2FD0;KANGXI RADICAL NOSE;So;0;ON;<compat> 9F3B;;;;N;;;;;
+ 2FD1;KANGXI RADICAL EVEN;So;0;ON;<compat> 9F4A;;;;N;;;;;
+ 2FD2;KANGXI RADICAL TOOTH;So;0;ON;<compat> 9F52;;;;N;;;;;
+ 2FD3;KANGXI RADICAL DRAGON;So;0;ON;<compat> 9F8D;;;;N;;;;;
+ 2FD4;KANGXI RADICAL TURTLE;So;0;ON;<compat> 9F9C;;;;N;;;;;
+ 2FD5;KANGXI RADICAL FLUTE;So;0;ON;<compat> 9FA0;;;;N;;;;;
+ 2FF0;IDEOGRAPHIC DESCRIPTION CHARACTER LEFT TO RIGHT;So;0;ON;;;;;N;;;;;
+ 2FF1;IDEOGRAPHIC DESCRIPTION CHARACTER ABOVE TO BELOW;So;0;ON;;;;;N;;;;;
+ 2FF2;IDEOGRAPHIC DESCRIPTION CHARACTER LEFT TO MIDDLE AND RIGHT;So;0;ON;;;;;N;;;;;
+ 2FF3;IDEOGRAPHIC DESCRIPTION CHARACTER ABOVE TO MIDDLE AND BELOW;So;0;ON;;;;;N;;;;;
+ 2FF4;IDEOGRAPHIC DESCRIPTION CHARACTER FULL SURROUND;So;0;ON;;;;;N;;;;;
+ 2FF5;IDEOGRAPHIC DESCRIPTION CHARACTER SURROUND FROM ABOVE;So;0;ON;;;;;N;;;;;
+ 2FF6;IDEOGRAPHIC DESCRIPTION CHARACTER SURROUND FROM BELOW;So;0;ON;;;;;N;;;;;
+ 2FF7;IDEOGRAPHIC DESCRIPTION CHARACTER SURROUND FROM LEFT;So;0;ON;;;;;N;;;;;
+ 2FF8;IDEOGRAPHIC DESCRIPTION CHARACTER SURROUND FROM UPPER LEFT;So;0;ON;;;;;N;;;;;
+ 2FF9;IDEOGRAPHIC DESCRIPTION CHARACTER SURROUND FROM UPPER RIGHT;So;0;ON;;;;;N;;;;;
+ 2FFA;IDEOGRAPHIC DESCRIPTION CHARACTER SURROUND FROM LOWER LEFT;So;0;ON;;;;;N;;;;;
+ 2FFB;IDEOGRAPHIC DESCRIPTION CHARACTER OVERLAID;So;0;ON;;;;;N;;;;;
+ 3000;IDEOGRAPHIC SPACE;Zs;0;WS;<wide> 0020;;;;N;;;;;
+ 3001;IDEOGRAPHIC COMMA;Po;0;ON;;;;;N;;;;;
+ 3002;IDEOGRAPHIC FULL STOP;Po;0;ON;;;;;N;IDEOGRAPHIC PERIOD;;;;
+ 3003;DITTO MARK;Po;0;ON;;;;;N;;;;;
+ 3004;JAPANESE INDUSTRIAL STANDARD SYMBOL;So;0;ON;;;;;N;;;;;
+ 3005;IDEOGRAPHIC ITERATION MARK;Lm;0;L;;;;;N;;;;;
+ 3006;IDEOGRAPHIC CLOSING MARK;Lo;0;L;;;;;N;;;;;
+ 3007;IDEOGRAPHIC NUMBER ZERO;Nl;0;L;;;;0;N;;;;;
+ 3008;LEFT ANGLE BRACKET;Ps;0;ON;;;;;Y;OPENING ANGLE BRACKET;;;;
+ 3009;RIGHT ANGLE BRACKET;Pe;0;ON;;;;;Y;CLOSING ANGLE BRACKET;;;;
+ 300A;LEFT DOUBLE ANGLE BRACKET;Ps;0;ON;;;;;Y;OPENING DOUBLE ANGLE BRACKET;;;;
+ 300B;RIGHT DOUBLE ANGLE BRACKET;Pe;0;ON;;;;;Y;CLOSING DOUBLE ANGLE BRACKET;;;;
+ 300C;LEFT CORNER BRACKET;Ps;0;ON;;;;;Y;OPENING CORNER BRACKET;;;;
+ 300D;RIGHT CORNER BRACKET;Pe;0;ON;;;;;Y;CLOSING CORNER BRACKET;;;;
+ 300E;LEFT WHITE CORNER BRACKET;Ps;0;ON;;;;;Y;OPENING WHITE CORNER BRACKET;;;;
+ 300F;RIGHT WHITE CORNER BRACKET;Pe;0;ON;;;;;Y;CLOSING WHITE CORNER BRACKET;;;;
+ 3010;LEFT BLACK LENTICULAR BRACKET;Ps;0;ON;;;;;Y;OPENING BLACK LENTICULAR BRACKET;;;;
+ 3011;RIGHT BLACK LENTICULAR BRACKET;Pe;0;ON;;;;;Y;CLOSING BLACK LENTICULAR BRACKET;;;;
+ 3012;POSTAL MARK;So;0;ON;;;;;N;;;;;
+ 3013;GETA MARK;So;0;ON;;;;;N;;;;;
+ 3014;LEFT TORTOISE SHELL BRACKET;Ps;0;ON;;;;;Y;OPENING TORTOISE SHELL BRACKET;;;;
+ 3015;RIGHT TORTOISE SHELL BRACKET;Pe;0;ON;;;;;Y;CLOSING TORTOISE SHELL BRACKET;;;;
+ 3016;LEFT WHITE LENTICULAR BRACKET;Ps;0;ON;;;;;Y;OPENING WHITE LENTICULAR BRACKET;;;;
+ 3017;RIGHT WHITE LENTICULAR BRACKET;Pe;0;ON;;;;;Y;CLOSING WHITE LENTICULAR BRACKET;;;;
+ 3018;LEFT WHITE TORTOISE SHELL BRACKET;Ps;0;ON;;;;;Y;OPENING WHITE TORTOISE SHELL BRACKET;;;;
+ 3019;RIGHT WHITE TORTOISE SHELL BRACKET;Pe;0;ON;;;;;Y;CLOSING WHITE TORTOISE SHELL BRACKET;;;;
+ 301A;LEFT WHITE SQUARE BRACKET;Ps;0;ON;;;;;Y;OPENING WHITE SQUARE BRACKET;;;;
+ 301B;RIGHT WHITE SQUARE BRACKET;Pe;0;ON;;;;;Y;CLOSING WHITE SQUARE BRACKET;;;;
+ 301C;WAVE DASH;Pd;0;ON;;;;;N;;;;;
+ 301D;REVERSED DOUBLE PRIME QUOTATION MARK;Ps;0;ON;;;;;N;;;;;
+ 301E;DOUBLE PRIME QUOTATION MARK;Pe;0;ON;;;;;N;;;;;
+ 301F;LOW DOUBLE PRIME QUOTATION MARK;Pe;0;ON;;;;;N;;;;;
+ 3020;POSTAL MARK FACE;So;0;ON;;;;;N;;;;;
+ 3021;HANGZHOU NUMERAL ONE;Nl;0;L;;;;1;N;;;;;
+ 3022;HANGZHOU NUMERAL TWO;Nl;0;L;;;;2;N;;;;;
+ 3023;HANGZHOU NUMERAL THREE;Nl;0;L;;;;3;N;;;;;
+ 3024;HANGZHOU NUMERAL FOUR;Nl;0;L;;;;4;N;;;;;
+ 3025;HANGZHOU NUMERAL FIVE;Nl;0;L;;;;5;N;;;;;
+ 3026;HANGZHOU NUMERAL SIX;Nl;0;L;;;;6;N;;;;;
+ 3027;HANGZHOU NUMERAL SEVEN;Nl;0;L;;;;7;N;;;;;
+ 3028;HANGZHOU NUMERAL EIGHT;Nl;0;L;;;;8;N;;;;;
+ 3029;HANGZHOU NUMERAL NINE;Nl;0;L;;;;9;N;;;;;
+ 302A;IDEOGRAPHIC LEVEL TONE MARK;Mn;218;NSM;;;;;N;;;;;
+ 302B;IDEOGRAPHIC RISING TONE MARK;Mn;228;NSM;;;;;N;;;;;
+ 302C;IDEOGRAPHIC DEPARTING TONE MARK;Mn;232;NSM;;;;;N;;;;;
+ 302D;IDEOGRAPHIC ENTERING TONE MARK;Mn;222;NSM;;;;;N;;;;;
+ 302E;HANGUL SINGLE DOT TONE MARK;Mc;224;L;;;;;N;;;;;
+ 302F;HANGUL DOUBLE DOT TONE MARK;Mc;224;L;;;;;N;;;;;
+ 3030;WAVY DASH;Pd;0;ON;;;;;N;;;;;
+ 3031;VERTICAL KANA REPEAT MARK;Lm;0;L;;;;;N;;;;;
+ 3032;VERTICAL KANA REPEAT WITH VOICED SOUND MARK;Lm;0;L;;;;;N;;;;;
+ 3033;VERTICAL KANA REPEAT MARK UPPER HALF;Lm;0;L;;;;;N;;;;;
+ 3034;VERTICAL KANA REPEAT WITH VOICED SOUND MARK UPPER HALF;Lm;0;L;;;;;N;;;;;
+ 3035;VERTICAL KANA REPEAT MARK LOWER HALF;Lm;0;L;;;;;N;;;;;
+ 3036;CIRCLED POSTAL MARK;So;0;ON;<compat> 3012;;;;N;;;;;
+ 3037;IDEOGRAPHIC TELEGRAPH LINE FEED SEPARATOR SYMBOL;So;0;ON;;;;;N;;;;;
+ 3038;HANGZHOU NUMERAL TEN;Nl;0;L;<compat> 5341;;;10;N;;;;;
+ 3039;HANGZHOU NUMERAL TWENTY;Nl;0;L;<compat> 5344;;;20;N;;;;;
+ 303A;HANGZHOU NUMERAL THIRTY;Nl;0;L;<compat> 5345;;;30;N;;;;;
+ 303B;VERTICAL IDEOGRAPHIC ITERATION MARK;Lm;0;L;;;;;N;;;;;
+ 303C;MASU MARK;Lo;0;L;;;;;N;;;;;
+ 303D;PART ALTERNATION MARK;Po;0;ON;;;;;N;;;;;
+ 303E;IDEOGRAPHIC VARIATION INDICATOR;So;0;ON;;;;;N;;;;;
+ 303F;IDEOGRAPHIC HALF FILL SPACE;So;0;ON;;;;;N;;;;;
+ 3041;HIRAGANA LETTER SMALL A;Lo;0;L;;;;;N;;;;;
+ 3042;HIRAGANA LETTER A;Lo;0;L;;;;;N;;;;;
+ 3043;HIRAGANA LETTER SMALL I;Lo;0;L;;;;;N;;;;;
+ 3044;HIRAGANA LETTER I;Lo;0;L;;;;;N;;;;;
+ 3045;HIRAGANA LETTER SMALL U;Lo;0;L;;;;;N;;;;;
+ 3046;HIRAGANA LETTER U;Lo;0;L;;;;;N;;;;;
+ 3047;HIRAGANA LETTER SMALL E;Lo;0;L;;;;;N;;;;;
+ 3048;HIRAGANA LETTER E;Lo;0;L;;;;;N;;;;;
+ 3049;HIRAGANA LETTER SMALL O;Lo;0;L;;;;;N;;;;;
+ 304A;HIRAGANA LETTER O;Lo;0;L;;;;;N;;;;;
+ 304B;HIRAGANA LETTER KA;Lo;0;L;;;;;N;;;;;
+ 304C;HIRAGANA LETTER GA;Lo;0;L;304B 3099;;;;N;;;;;
+ 304D;HIRAGANA LETTER KI;Lo;0;L;;;;;N;;;;;
+ 304E;HIRAGANA LETTER GI;Lo;0;L;304D 3099;;;;N;;;;;
+ 304F;HIRAGANA LETTER KU;Lo;0;L;;;;;N;;;;;
+ 3050;HIRAGANA LETTER GU;Lo;0;L;304F 3099;;;;N;;;;;
+ 3051;HIRAGANA LETTER KE;Lo;0;L;;;;;N;;;;;
+ 3052;HIRAGANA LETTER GE;Lo;0;L;3051 3099;;;;N;;;;;
+ 3053;HIRAGANA LETTER KO;Lo;0;L;;;;;N;;;;;
+ 3054;HIRAGANA LETTER GO;Lo;0;L;3053 3099;;;;N;;;;;
+ 3055;HIRAGANA LETTER SA;Lo;0;L;;;;;N;;;;;
+ 3056;HIRAGANA LETTER ZA;Lo;0;L;3055 3099;;;;N;;;;;
+ 3057;HIRAGANA LETTER SI;Lo;0;L;;;;;N;;;;;
+ 3058;HIRAGANA LETTER ZI;Lo;0;L;3057 3099;;;;N;;;;;
+ 3059;HIRAGANA LETTER SU;Lo;0;L;;;;;N;;;;;
+ 305A;HIRAGANA LETTER ZU;Lo;0;L;3059 3099;;;;N;;;;;
+ 305B;HIRAGANA LETTER SE;Lo;0;L;;;;;N;;;;;
+ 305C;HIRAGANA LETTER ZE;Lo;0;L;305B 3099;;;;N;;;;;
+ 305D;HIRAGANA LETTER SO;Lo;0;L;;;;;N;;;;;
+ 305E;HIRAGANA LETTER ZO;Lo;0;L;305D 3099;;;;N;;;;;
+ 305F;HIRAGANA LETTER TA;Lo;0;L;;;;;N;;;;;
+ 3060;HIRAGANA LETTER DA;Lo;0;L;305F 3099;;;;N;;;;;
+ 3061;HIRAGANA LETTER TI;Lo;0;L;;;;;N;;;;;
+ 3062;HIRAGANA LETTER DI;Lo;0;L;3061 3099;;;;N;;;;;
+ 3063;HIRAGANA LETTER SMALL TU;Lo;0;L;;;;;N;;;;;
+ 3064;HIRAGANA LETTER TU;Lo;0;L;;;;;N;;;;;
+ 3065;HIRAGANA LETTER DU;Lo;0;L;3064 3099;;;;N;;;;;
+ 3066;HIRAGANA LETTER TE;Lo;0;L;;;;;N;;;;;
+ 3067;HIRAGANA LETTER DE;Lo;0;L;3066 3099;;;;N;;;;;
+ 3068;HIRAGANA LETTER TO;Lo;0;L;;;;;N;;;;;
+ 3069;HIRAGANA LETTER DO;Lo;0;L;3068 3099;;;;N;;;;;
+ 306A;HIRAGANA LETTER NA;Lo;0;L;;;;;N;;;;;
+ 306B;HIRAGANA LETTER NI;Lo;0;L;;;;;N;;;;;
+ 306C;HIRAGANA LETTER NU;Lo;0;L;;;;;N;;;;;
+ 306D;HIRAGANA LETTER NE;Lo;0;L;;;;;N;;;;;
+ 306E;HIRAGANA LETTER NO;Lo;0;L;;;;;N;;;;;
+ 306F;HIRAGANA LETTER HA;Lo;0;L;;;;;N;;;;;
+ 3070;HIRAGANA LETTER BA;Lo;0;L;306F 3099;;;;N;;;;;
+ 3071;HIRAGANA LETTER PA;Lo;0;L;306F 309A;;;;N;;;;;
+ 3072;HIRAGANA LETTER HI;Lo;0;L;;;;;N;;;;;
+ 3073;HIRAGANA LETTER BI;Lo;0;L;3072 3099;;;;N;;;;;
+ 3074;HIRAGANA LETTER PI;Lo;0;L;3072 309A;;;;N;;;;;
+ 3075;HIRAGANA LETTER HU;Lo;0;L;;;;;N;;;;;
+ 3076;HIRAGANA LETTER BU;Lo;0;L;3075 3099;;;;N;;;;;
+ 3077;HIRAGANA LETTER PU;Lo;0;L;3075 309A;;;;N;;;;;
+ 3078;HIRAGANA LETTER HE;Lo;0;L;;;;;N;;;;;
+ 3079;HIRAGANA LETTER BE;Lo;0;L;3078 3099;;;;N;;;;;
+ 307A;HIRAGANA LETTER PE;Lo;0;L;3078 309A;;;;N;;;;;
+ 307B;HIRAGANA LETTER HO;Lo;0;L;;;;;N;;;;;
+ 307C;HIRAGANA LETTER BO;Lo;0;L;307B 3099;;;;N;;;;;
+ 307D;HIRAGANA LETTER PO;Lo;0;L;307B 309A;;;;N;;;;;
+ 307E;HIRAGANA LETTER MA;Lo;0;L;;;;;N;;;;;
+ 307F;HIRAGANA LETTER MI;Lo;0;L;;;;;N;;;;;
+ 3080;HIRAGANA LETTER MU;Lo;0;L;;;;;N;;;;;
+ 3081;HIRAGANA LETTER ME;Lo;0;L;;;;;N;;;;;
+ 3082;HIRAGANA LETTER MO;Lo;0;L;;;;;N;;;;;
+ 3083;HIRAGANA LETTER SMALL YA;Lo;0;L;;;;;N;;;;;
+ 3084;HIRAGANA LETTER YA;Lo;0;L;;;;;N;;;;;
+ 3085;HIRAGANA LETTER SMALL YU;Lo;0;L;;;;;N;;;;;
+ 3086;HIRAGANA LETTER YU;Lo;0;L;;;;;N;;;;;
+ 3087;HIRAGANA LETTER SMALL YO;Lo;0;L;;;;;N;;;;;
+ 3088;HIRAGANA LETTER YO;Lo;0;L;;;;;N;;;;;
+ 3089;HIRAGANA LETTER RA;Lo;0;L;;;;;N;;;;;
+ 308A;HIRAGANA LETTER RI;Lo;0;L;;;;;N;;;;;
+ 308B;HIRAGANA LETTER RU;Lo;0;L;;;;;N;;;;;
+ 308C;HIRAGANA LETTER RE;Lo;0;L;;;;;N;;;;;
+ 308D;HIRAGANA LETTER RO;Lo;0;L;;;;;N;;;;;
+ 308E;HIRAGANA LETTER SMALL WA;Lo;0;L;;;;;N;;;;;
+ 308F;HIRAGANA LETTER WA;Lo;0;L;;;;;N;;;;;
+ 3090;HIRAGANA LETTER WI;Lo;0;L;;;;;N;;;;;
+ 3091;HIRAGANA LETTER WE;Lo;0;L;;;;;N;;;;;
+ 3092;HIRAGANA LETTER WO;Lo;0;L;;;;;N;;;;;
+ 3093;HIRAGANA LETTER N;Lo;0;L;;;;;N;;;;;
+ 3094;HIRAGANA LETTER VU;Lo;0;L;3046 3099;;;;N;;;;;
+ 3095;HIRAGANA LETTER SMALL KA;Lo;0;L;;;;;N;;;;;
+ 3096;HIRAGANA LETTER SMALL KE;Lo;0;L;;;;;N;;;;;
+ 3099;COMBINING KATAKANA-HIRAGANA VOICED SOUND MARK;Mn;8;NSM;;;;;N;NON-SPACING KATAKANA-HIRAGANA VOICED SOUND MARK;;;;
+ 309A;COMBINING KATAKANA-HIRAGANA SEMI-VOICED SOUND MARK;Mn;8;NSM;;;;;N;NON-SPACING KATAKANA-HIRAGANA SEMI-VOICED SOUND MARK;;;;
+ 309B;KATAKANA-HIRAGANA VOICED SOUND MARK;Sk;0;ON;<compat> 0020 3099;;;;N;;;;;
+ 309C;KATAKANA-HIRAGANA SEMI-VOICED SOUND MARK;Sk;0;ON;<compat> 0020 309A;;;;N;;;;;
+ 309D;HIRAGANA ITERATION MARK;Lm;0;L;;;;;N;;;;;
+ 309E;HIRAGANA VOICED ITERATION MARK;Lm;0;L;309D 3099;;;;N;;;;;
+ 309F;HIRAGANA DIGRAPH YORI;Lo;0;L;<vertical> 3088 308A;;;;N;;;;;
+ 30A0;KATAKANA-HIRAGANA DOUBLE HYPHEN;Pd;0;ON;;;;;N;;;;;
+ 30A1;KATAKANA LETTER SMALL A;Lo;0;L;;;;;N;;;;;
+ 30A2;KATAKANA LETTER A;Lo;0;L;;;;;N;;;;;
+ 30A3;KATAKANA LETTER SMALL I;Lo;0;L;;;;;N;;;;;
+ 30A4;KATAKANA LETTER I;Lo;0;L;;;;;N;;;;;
+ 30A5;KATAKANA LETTER SMALL U;Lo;0;L;;;;;N;;;;;
+ 30A6;KATAKANA LETTER U;Lo;0;L;;;;;N;;;;;
+ 30A7;KATAKANA LETTER SMALL E;Lo;0;L;;;;;N;;;;;
+ 30A8;KATAKANA LETTER E;Lo;0;L;;;;;N;;;;;
+ 30A9;KATAKANA LETTER SMALL O;Lo;0;L;;;;;N;;;;;
+ 30AA;KATAKANA LETTER O;Lo;0;L;;;;;N;;;;;
+ 30AB;KATAKANA LETTER KA;Lo;0;L;;;;;N;;;;;
+ 30AC;KATAKANA LETTER GA;Lo;0;L;30AB 3099;;;;N;;;;;
+ 30AD;KATAKANA LETTER KI;Lo;0;L;;;;;N;;;;;
+ 30AE;KATAKANA LETTER GI;Lo;0;L;30AD 3099;;;;N;;;;;
+ 30AF;KATAKANA LETTER KU;Lo;0;L;;;;;N;;;;;
+ 30B0;KATAKANA LETTER GU;Lo;0;L;30AF 3099;;;;N;;;;;
+ 30B1;KATAKANA LETTER KE;Lo;0;L;;;;;N;;;;;
+ 30B2;KATAKANA LETTER GE;Lo;0;L;30B1 3099;;;;N;;;;;
+ 30B3;KATAKANA LETTER KO;Lo;0;L;;;;;N;;;;;
+ 30B4;KATAKANA LETTER GO;Lo;0;L;30B3 3099;;;;N;;;;;
+ 30B5;KATAKANA LETTER SA;Lo;0;L;;;;;N;;;;;
+ 30B6;KATAKANA LETTER ZA;Lo;0;L;30B5 3099;;;;N;;;;;
+ 30B7;KATAKANA LETTER SI;Lo;0;L;;;;;N;;;;;
+ 30B8;KATAKANA LETTER ZI;Lo;0;L;30B7 3099;;;;N;;;;;
+ 30B9;KATAKANA LETTER SU;Lo;0;L;;;;;N;;;;;
+ 30BA;KATAKANA LETTER ZU;Lo;0;L;30B9 3099;;;;N;;;;;
+ 30BB;KATAKANA LETTER SE;Lo;0;L;;;;;N;;;;;
+ 30BC;KATAKANA LETTER ZE;Lo;0;L;30BB 3099;;;;N;;;;;
+ 30BD;KATAKANA LETTER SO;Lo;0;L;;;;;N;;;;;
+ 30BE;KATAKANA LETTER ZO;Lo;0;L;30BD 3099;;;;N;;;;;
+ 30BF;KATAKANA LETTER TA;Lo;0;L;;;;;N;;;;;
+ 30C0;KATAKANA LETTER DA;Lo;0;L;30BF 3099;;;;N;;;;;
+ 30C1;KATAKANA LETTER TI;Lo;0;L;;;;;N;;;;;
+ 30C2;KATAKANA LETTER DI;Lo;0;L;30C1 3099;;;;N;;;;;
+ 30C3;KATAKANA LETTER SMALL TU;Lo;0;L;;;;;N;;;;;
+ 30C4;KATAKANA LETTER TU;Lo;0;L;;;;;N;;;;;
+ 30C5;KATAKANA LETTER DU;Lo;0;L;30C4 3099;;;;N;;;;;
+ 30C6;KATAKANA LETTER TE;Lo;0;L;;;;;N;;;;;
+ 30C7;KATAKANA LETTER DE;Lo;0;L;30C6 3099;;;;N;;;;;
+ 30C8;KATAKANA LETTER TO;Lo;0;L;;;;;N;;;;;
+ 30C9;KATAKANA LETTER DO;Lo;0;L;30C8 3099;;;;N;;;;;
+ 30CA;KATAKANA LETTER NA;Lo;0;L;;;;;N;;;;;
+ 30CB;KATAKANA LETTER NI;Lo;0;L;;;;;N;;;;;
+ 30CC;KATAKANA LETTER NU;Lo;0;L;;;;;N;;;;;
+ 30CD;KATAKANA LETTER NE;Lo;0;L;;;;;N;;;;;
+ 30CE;KATAKANA LETTER NO;Lo;0;L;;;;;N;;;;;
+ 30CF;KATAKANA LETTER HA;Lo;0;L;;;;;N;;;;;
+ 30D0;KATAKANA LETTER BA;Lo;0;L;30CF 3099;;;;N;;;;;
+ 30D1;KATAKANA LETTER PA;Lo;0;L;30CF 309A;;;;N;;;;;
+ 30D2;KATAKANA LETTER HI;Lo;0;L;;;;;N;;;;;
+ 30D3;KATAKANA LETTER BI;Lo;0;L;30D2 3099;;;;N;;;;;
+ 30D4;KATAKANA LETTER PI;Lo;0;L;30D2 309A;;;;N;;;;;
+ 30D5;KATAKANA LETTER HU;Lo;0;L;;;;;N;;;;;
+ 30D6;KATAKANA LETTER BU;Lo;0;L;30D5 3099;;;;N;;;;;
+ 30D7;KATAKANA LETTER PU;Lo;0;L;30D5 309A;;;;N;;;;;
+ 30D8;KATAKANA LETTER HE;Lo;0;L;;;;;N;;;;;
+ 30D9;KATAKANA LETTER BE;Lo;0;L;30D8 3099;;;;N;;;;;
+ 30DA;KATAKANA LETTER PE;Lo;0;L;30D8 309A;;;;N;;;;;
+ 30DB;KATAKANA LETTER HO;Lo;0;L;;;;;N;;;;;
+ 30DC;KATAKANA LETTER BO;Lo;0;L;30DB 3099;;;;N;;;;;
+ 30DD;KATAKANA LETTER PO;Lo;0;L;30DB 309A;;;;N;;;;;
+ 30DE;KATAKANA LETTER MA;Lo;0;L;;;;;N;;;;;
+ 30DF;KATAKANA LETTER MI;Lo;0;L;;;;;N;;;;;
+ 30E0;KATAKANA LETTER MU;Lo;0;L;;;;;N;;;;;
+ 30E1;KATAKANA LETTER ME;Lo;0;L;;;;;N;;;;;
+ 30E2;KATAKANA LETTER MO;Lo;0;L;;;;;N;;;;;
+ 30E3;KATAKANA LETTER SMALL YA;Lo;0;L;;;;;N;;;;;
+ 30E4;KATAKANA LETTER YA;Lo;0;L;;;;;N;;;;;
+ 30E5;KATAKANA LETTER SMALL YU;Lo;0;L;;;;;N;;;;;
+ 30E6;KATAKANA LETTER YU;Lo;0;L;;;;;N;;;;;
+ 30E7;KATAKANA LETTER SMALL YO;Lo;0;L;;;;;N;;;;;
+ 30E8;KATAKANA LETTER YO;Lo;0;L;;;;;N;;;;;
+ 30E9;KATAKANA LETTER RA;Lo;0;L;;;;;N;;;;;
+ 30EA;KATAKANA LETTER RI;Lo;0;L;;;;;N;;;;;
+ 30EB;KATAKANA LETTER RU;Lo;0;L;;;;;N;;;;;
+ 30EC;KATAKANA LETTER RE;Lo;0;L;;;;;N;;;;;
+ 30ED;KATAKANA LETTER RO;Lo;0;L;;;;;N;;;;;
+ 30EE;KATAKANA LETTER SMALL WA;Lo;0;L;;;;;N;;;;;
+ 30EF;KATAKANA LETTER WA;Lo;0;L;;;;;N;;;;;
+ 30F0;KATAKANA LETTER WI;Lo;0;L;;;;;N;;;;;
+ 30F1;KATAKANA LETTER WE;Lo;0;L;;;;;N;;;;;
+ 30F2;KATAKANA LETTER WO;Lo;0;L;;;;;N;;;;;
+ 30F3;KATAKANA LETTER N;Lo;0;L;;;;;N;;;;;
+ 30F4;KATAKANA LETTER VU;Lo;0;L;30A6 3099;;;;N;;;;;
+ 30F5;KATAKANA LETTER SMALL KA;Lo;0;L;;;;;N;;;;;
+ 30F6;KATAKANA LETTER SMALL KE;Lo;0;L;;;;;N;;;;;
+ 30F7;KATAKANA LETTER VA;Lo;0;L;30EF 3099;;;;N;;;;;
+ 30F8;KATAKANA LETTER VI;Lo;0;L;30F0 3099;;;;N;;;;;
+ 30F9;KATAKANA LETTER VE;Lo;0;L;30F1 3099;;;;N;;;;;
+ 30FA;KATAKANA LETTER VO;Lo;0;L;30F2 3099;;;;N;;;;;
+ 30FB;KATAKANA MIDDLE DOT;Po;0;ON;;;;;N;;;;;
+ 30FC;KATAKANA-HIRAGANA PROLONGED SOUND MARK;Lm;0;L;;;;;N;;;;;
+ 30FD;KATAKANA ITERATION MARK;Lm;0;L;;;;;N;;;;;
+ 30FE;KATAKANA VOICED ITERATION MARK;Lm;0;L;30FD 3099;;;;N;;;;;
+ 30FF;KATAKANA DIGRAPH KOTO;Lo;0;L;<vertical> 30B3 30C8;;;;N;;;;;
+ 3105;BOPOMOFO LETTER B;Lo;0;L;;;;;N;;;;;
+ 3106;BOPOMOFO LETTER P;Lo;0;L;;;;;N;;;;;
+ 3107;BOPOMOFO LETTER M;Lo;0;L;;;;;N;;;;;
+ 3108;BOPOMOFO LETTER F;Lo;0;L;;;;;N;;;;;
+ 3109;BOPOMOFO LETTER D;Lo;0;L;;;;;N;;;;;
+ 310A;BOPOMOFO LETTER T;Lo;0;L;;;;;N;;;;;
+ 310B;BOPOMOFO LETTER N;Lo;0;L;;;;;N;;;;;
+ 310C;BOPOMOFO LETTER L;Lo;0;L;;;;;N;;;;;
+ 310D;BOPOMOFO LETTER G;Lo;0;L;;;;;N;;;;;
+ 310E;BOPOMOFO LETTER K;Lo;0;L;;;;;N;;;;;
+ 310F;BOPOMOFO LETTER H;Lo;0;L;;;;;N;;;;;
+ 3110;BOPOMOFO LETTER J;Lo;0;L;;;;;N;;;;;
+ 3111;BOPOMOFO LETTER Q;Lo;0;L;;;;;N;;;;;
+ 3112;BOPOMOFO LETTER X;Lo;0;L;;;;;N;;;;;
+ 3113;BOPOMOFO LETTER ZH;Lo;0;L;;;;;N;;;;;
+ 3114;BOPOMOFO LETTER CH;Lo;0;L;;;;;N;;;;;
+ 3115;BOPOMOFO LETTER SH;Lo;0;L;;;;;N;;;;;
+ 3116;BOPOMOFO LETTER R;Lo;0;L;;;;;N;;;;;
+ 3117;BOPOMOFO LETTER Z;Lo;0;L;;;;;N;;;;;
+ 3118;BOPOMOFO LETTER C;Lo;0;L;;;;;N;;;;;
+ 3119;BOPOMOFO LETTER S;Lo;0;L;;;;;N;;;;;
+ 311A;BOPOMOFO LETTER A;Lo;0;L;;;;;N;;;;;
+ 311B;BOPOMOFO LETTER O;Lo;0;L;;;;;N;;;;;
+ 311C;BOPOMOFO LETTER E;Lo;0;L;;;;;N;;;;;
+ 311D;BOPOMOFO LETTER EH;Lo;0;L;;;;;N;;;;;
+ 311E;BOPOMOFO LETTER AI;Lo;0;L;;;;;N;;;;;
+ 311F;BOPOMOFO LETTER EI;Lo;0;L;;;;;N;;;;;
+ 3120;BOPOMOFO LETTER AU;Lo;0;L;;;;;N;;;;;
+ 3121;BOPOMOFO LETTER OU;Lo;0;L;;;;;N;;;;;
+ 3122;BOPOMOFO LETTER AN;Lo;0;L;;;;;N;;;;;
+ 3123;BOPOMOFO LETTER EN;Lo;0;L;;;;;N;;;;;
+ 3124;BOPOMOFO LETTER ANG;Lo;0;L;;;;;N;;;;;
+ 3125;BOPOMOFO LETTER ENG;Lo;0;L;;;;;N;;;;;
+ 3126;BOPOMOFO LETTER ER;Lo;0;L;;;;;N;;;;;
+ 3127;BOPOMOFO LETTER I;Lo;0;L;;;;;N;;;;;
+ 3128;BOPOMOFO LETTER U;Lo;0;L;;;;;N;;;;;
+ 3129;BOPOMOFO LETTER IU;Lo;0;L;;;;;N;;;;;
+ 312A;BOPOMOFO LETTER V;Lo;0;L;;;;;N;;;;;
+ 312B;BOPOMOFO LETTER NG;Lo;0;L;;;;;N;;;;;
+ 312C;BOPOMOFO LETTER GN;Lo;0;L;;;;;N;;;;;
+ 312D;BOPOMOFO LETTER IH;Lo;0;L;;;;;N;;;;;
+ 312E;BOPOMOFO LETTER O WITH DOT ABOVE;Lo;0;L;;;;;N;;;;;
+ 312F;BOPOMOFO LETTER NN;Lo;0;L;;;;;N;;;;;
+ 3131;HANGUL LETTER KIYEOK;Lo;0;L;<compat> 1100;;;;N;HANGUL LETTER GIYEOG;;;;
+ 3132;HANGUL LETTER SSANGKIYEOK;Lo;0;L;<compat> 1101;;;;N;HANGUL LETTER SSANG GIYEOG;;;;
+ 3133;HANGUL LETTER KIYEOK-SIOS;Lo;0;L;<compat> 11AA;;;;N;HANGUL LETTER GIYEOG SIOS;;;;
+ 3134;HANGUL LETTER NIEUN;Lo;0;L;<compat> 1102;;;;N;;;;;
+ 3135;HANGUL LETTER NIEUN-CIEUC;Lo;0;L;<compat> 11AC;;;;N;HANGUL LETTER NIEUN JIEUJ;;;;
+ 3136;HANGUL LETTER NIEUN-HIEUH;Lo;0;L;<compat> 11AD;;;;N;HANGUL LETTER NIEUN HIEUH;;;;
+ 3137;HANGUL LETTER TIKEUT;Lo;0;L;<compat> 1103;;;;N;HANGUL LETTER DIGEUD;;;;
+ 3138;HANGUL LETTER SSANGTIKEUT;Lo;0;L;<compat> 1104;;;;N;HANGUL LETTER SSANG DIGEUD;;;;
+ 3139;HANGUL LETTER RIEUL;Lo;0;L;<compat> 1105;;;;N;HANGUL LETTER LIEUL;;;;
+ 313A;HANGUL LETTER RIEUL-KIYEOK;Lo;0;L;<compat> 11B0;;;;N;HANGUL LETTER LIEUL GIYEOG;;;;
+ 313B;HANGUL LETTER RIEUL-MIEUM;Lo;0;L;<compat> 11B1;;;;N;HANGUL LETTER LIEUL MIEUM;;;;
+ 313C;HANGUL LETTER RIEUL-PIEUP;Lo;0;L;<compat> 11B2;;;;N;HANGUL LETTER LIEUL BIEUB;;;;
+ 313D;HANGUL LETTER RIEUL-SIOS;Lo;0;L;<compat> 11B3;;;;N;HANGUL LETTER LIEUL SIOS;;;;
+ 313E;HANGUL LETTER RIEUL-THIEUTH;Lo;0;L;<compat> 11B4;;;;N;HANGUL LETTER LIEUL TIEUT;;;;
+ 313F;HANGUL LETTER RIEUL-PHIEUPH;Lo;0;L;<compat> 11B5;;;;N;HANGUL LETTER LIEUL PIEUP;;;;
+ 3140;HANGUL LETTER RIEUL-HIEUH;Lo;0;L;<compat> 111A;;;;N;HANGUL LETTER LIEUL HIEUH;;;;
+ 3141;HANGUL LETTER MIEUM;Lo;0;L;<compat> 1106;;;;N;;;;;
+ 3142;HANGUL LETTER PIEUP;Lo;0;L;<compat> 1107;;;;N;HANGUL LETTER BIEUB;;;;
+ 3143;HANGUL LETTER SSANGPIEUP;Lo;0;L;<compat> 1108;;;;N;HANGUL LETTER SSANG BIEUB;;;;
+ 3144;HANGUL LETTER PIEUP-SIOS;Lo;0;L;<compat> 1121;;;;N;HANGUL LETTER BIEUB SIOS;;;;
+ 3145;HANGUL LETTER SIOS;Lo;0;L;<compat> 1109;;;;N;;;;;
+ 3146;HANGUL LETTER SSANGSIOS;Lo;0;L;<compat> 110A;;;;N;HANGUL LETTER SSANG SIOS;;;;
+ 3147;HANGUL LETTER IEUNG;Lo;0;L;<compat> 110B;;;;N;;;;;
+ 3148;HANGUL LETTER CIEUC;Lo;0;L;<compat> 110C;;;;N;HANGUL LETTER JIEUJ;;;;
+ 3149;HANGUL LETTER SSANGCIEUC;Lo;0;L;<compat> 110D;;;;N;HANGUL LETTER SSANG JIEUJ;;;;
+ 314A;HANGUL LETTER CHIEUCH;Lo;0;L;<compat> 110E;;;;N;HANGUL LETTER CIEUC;;;;
+ 314B;HANGUL LETTER KHIEUKH;Lo;0;L;<compat> 110F;;;;N;HANGUL LETTER KIYEOK;;;;
+ 314C;HANGUL LETTER THIEUTH;Lo;0;L;<compat> 1110;;;;N;HANGUL LETTER TIEUT;;;;
+ 314D;HANGUL LETTER PHIEUPH;Lo;0;L;<compat> 1111;;;;N;HANGUL LETTER PIEUP;;;;
+ 314E;HANGUL LETTER HIEUH;Lo;0;L;<compat> 1112;;;;N;;;;;
+ 314F;HANGUL LETTER A;Lo;0;L;<compat> 1161;;;;N;;;;;
+ 3150;HANGUL LETTER AE;Lo;0;L;<compat> 1162;;;;N;;;;;
+ 3151;HANGUL LETTER YA;Lo;0;L;<compat> 1163;;;;N;;;;;
+ 3152;HANGUL LETTER YAE;Lo;0;L;<compat> 1164;;;;N;;;;;
+ 3153;HANGUL LETTER EO;Lo;0;L;<compat> 1165;;;;N;;;;;
+ 3154;HANGUL LETTER E;Lo;0;L;<compat> 1166;;;;N;;;;;
+ 3155;HANGUL LETTER YEO;Lo;0;L;<compat> 1167;;;;N;;;;;
+ 3156;HANGUL LETTER YE;Lo;0;L;<compat> 1168;;;;N;;;;;
+ 3157;HANGUL LETTER O;Lo;0;L;<compat> 1169;;;;N;;;;;
+ 3158;HANGUL LETTER WA;Lo;0;L;<compat> 116A;;;;N;;;;;
+ 3159;HANGUL LETTER WAE;Lo;0;L;<compat> 116B;;;;N;;;;;
+ 315A;HANGUL LETTER OE;Lo;0;L;<compat> 116C;;;;N;;;;;
+ 315B;HANGUL LETTER YO;Lo;0;L;<compat> 116D;;;;N;;;;;
+ 315C;HANGUL LETTER U;Lo;0;L;<compat> 116E;;;;N;;;;;
+ 315D;HANGUL LETTER WEO;Lo;0;L;<compat> 116F;;;;N;;;;;
+ 315E;HANGUL LETTER WE;Lo;0;L;<compat> 1170;;;;N;;;;;
+ 315F;HANGUL LETTER WI;Lo;0;L;<compat> 1171;;;;N;;;;;
+ 3160;HANGUL LETTER YU;Lo;0;L;<compat> 1172;;;;N;;;;;
+ 3161;HANGUL LETTER EU;Lo;0;L;<compat> 1173;;;;N;;;;;
+ 3162;HANGUL LETTER YI;Lo;0;L;<compat> 1174;;;;N;;;;;
+ 3163;HANGUL LETTER I;Lo;0;L;<compat> 1175;;;;N;;;;;
+ 3164;HANGUL FILLER;Lo;0;L;<compat> 1160;;;;N;HANGUL CAE OM;;;;
+ 3165;HANGUL LETTER SSANGNIEUN;Lo;0;L;<compat> 1114;;;;N;HANGUL LETTER SSANG NIEUN;;;;
+ 3166;HANGUL LETTER NIEUN-TIKEUT;Lo;0;L;<compat> 1115;;;;N;HANGUL LETTER NIEUN DIGEUD;;;;
+ 3167;HANGUL LETTER NIEUN-SIOS;Lo;0;L;<compat> 11C7;;;;N;HANGUL LETTER NIEUN SIOS;;;;
+ 3168;HANGUL LETTER NIEUN-PANSIOS;Lo;0;L;<compat> 11C8;;;;N;HANGUL LETTER NIEUN BAN CHI EUM;;;;
+ 3169;HANGUL LETTER RIEUL-KIYEOK-SIOS;Lo;0;L;<compat> 11CC;;;;N;HANGUL LETTER LIEUL GIYEOG SIOS;;;;
+ 316A;HANGUL LETTER RIEUL-TIKEUT;Lo;0;L;<compat> 11CE;;;;N;HANGUL LETTER LIEUL DIGEUD;;;;
+ 316B;HANGUL LETTER RIEUL-PIEUP-SIOS;Lo;0;L;<compat> 11D3;;;;N;HANGUL LETTER LIEUL BIEUB SIOS;;;;
+ 316C;HANGUL LETTER RIEUL-PANSIOS;Lo;0;L;<compat> 11D7;;;;N;HANGUL LETTER LIEUL BAN CHI EUM;;;;
+ 316D;HANGUL LETTER RIEUL-YEORINHIEUH;Lo;0;L;<compat> 11D9;;;;N;HANGUL LETTER LIEUL YEOLIN HIEUH;;;;
+ 316E;HANGUL LETTER MIEUM-PIEUP;Lo;0;L;<compat> 111C;;;;N;HANGUL LETTER MIEUM BIEUB;;;;
+ 316F;HANGUL LETTER MIEUM-SIOS;Lo;0;L;<compat> 11DD;;;;N;HANGUL LETTER MIEUM SIOS;;;;
+ 3170;HANGUL LETTER MIEUM-PANSIOS;Lo;0;L;<compat> 11DF;;;;N;HANGUL LETTER BIEUB BAN CHI EUM;;;;
+ 3171;HANGUL LETTER KAPYEOUNMIEUM;Lo;0;L;<compat> 111D;;;;N;HANGUL LETTER MIEUM SUN GYEONG EUM;;;;
+ 3172;HANGUL LETTER PIEUP-KIYEOK;Lo;0;L;<compat> 111E;;;;N;HANGUL LETTER BIEUB GIYEOG;;;;
+ 3173;HANGUL LETTER PIEUP-TIKEUT;Lo;0;L;<compat> 1120;;;;N;HANGUL LETTER BIEUB DIGEUD;;;;
+ 3174;HANGUL LETTER PIEUP-SIOS-KIYEOK;Lo;0;L;<compat> 1122;;;;N;HANGUL LETTER BIEUB SIOS GIYEOG;;;;
+ 3175;HANGUL LETTER PIEUP-SIOS-TIKEUT;Lo;0;L;<compat> 1123;;;;N;HANGUL LETTER BIEUB SIOS DIGEUD;;;;
+ 3176;HANGUL LETTER PIEUP-CIEUC;Lo;0;L;<compat> 1127;;;;N;HANGUL LETTER BIEUB JIEUJ;;;;
+ 3177;HANGUL LETTER PIEUP-THIEUTH;Lo;0;L;<compat> 1129;;;;N;HANGUL LETTER BIEUB TIEUT;;;;
+ 3178;HANGUL LETTER KAPYEOUNPIEUP;Lo;0;L;<compat> 112B;;;;N;HANGUL LETTER BIEUB SUN GYEONG EUM;;;;
+ 3179;HANGUL LETTER KAPYEOUNSSANGPIEUP;Lo;0;L;<compat> 112C;;;;N;HANGUL LETTER SSANG BIEUB SUN GYEONG EUM;;;;
+ 317A;HANGUL LETTER SIOS-KIYEOK;Lo;0;L;<compat> 112D;;;;N;HANGUL LETTER SIOS GIYEOG;;;;
+ 317B;HANGUL LETTER SIOS-NIEUN;Lo;0;L;<compat> 112E;;;;N;HANGUL LETTER SIOS NIEUN;;;;
+ 317C;HANGUL LETTER SIOS-TIKEUT;Lo;0;L;<compat> 112F;;;;N;HANGUL LETTER SIOS DIGEUD;;;;
+ 317D;HANGUL LETTER SIOS-PIEUP;Lo;0;L;<compat> 1132;;;;N;HANGUL LETTER SIOS BIEUB;;;;
+ 317E;HANGUL LETTER SIOS-CIEUC;Lo;0;L;<compat> 1136;;;;N;HANGUL LETTER SIOS JIEUJ;;;;
+ 317F;HANGUL LETTER PANSIOS;Lo;0;L;<compat> 1140;;;;N;HANGUL LETTER BAN CHI EUM;;;;
+ 3180;HANGUL LETTER SSANGIEUNG;Lo;0;L;<compat> 1147;;;;N;HANGUL LETTER SSANG IEUNG;;;;
+ 3181;HANGUL LETTER YESIEUNG;Lo;0;L;<compat> 114C;;;;N;HANGUL LETTER NGIEUNG;;;;
+ 3182;HANGUL LETTER YESIEUNG-SIOS;Lo;0;L;<compat> 11F1;;;;N;HANGUL LETTER NGIEUNG SIOS;;;;
+ 3183;HANGUL LETTER YESIEUNG-PANSIOS;Lo;0;L;<compat> 11F2;;;;N;HANGUL LETTER NGIEUNG BAN CHI EUM;;;;
+ 3184;HANGUL LETTER KAPYEOUNPHIEUPH;Lo;0;L;<compat> 1157;;;;N;HANGUL LETTER PIEUP SUN GYEONG EUM;;;;
+ 3185;HANGUL LETTER SSANGHIEUH;Lo;0;L;<compat> 1158;;;;N;HANGUL LETTER SSANG HIEUH;;;;
+ 3186;HANGUL LETTER YEORINHIEUH;Lo;0;L;<compat> 1159;;;;N;HANGUL LETTER YEOLIN HIEUH;;;;
+ 3187;HANGUL LETTER YO-YA;Lo;0;L;<compat> 1184;;;;N;HANGUL LETTER YOYA;;;;
+ 3188;HANGUL LETTER YO-YAE;Lo;0;L;<compat> 1185;;;;N;HANGUL LETTER YOYAE;;;;
+ 3189;HANGUL LETTER YO-I;Lo;0;L;<compat> 1188;;;;N;HANGUL LETTER YOI;;;;
+ 318A;HANGUL LETTER YU-YEO;Lo;0;L;<compat> 1191;;;;N;HANGUL LETTER YUYEO;;;;
+ 318B;HANGUL LETTER YU-YE;Lo;0;L;<compat> 1192;;;;N;HANGUL LETTER YUYE;;;;
+ 318C;HANGUL LETTER YU-I;Lo;0;L;<compat> 1194;;;;N;HANGUL LETTER YUI;;;;
+ 318D;HANGUL LETTER ARAEA;Lo;0;L;<compat> 119E;;;;N;HANGUL LETTER ALAE A;;;;
+ 318E;HANGUL LETTER ARAEAE;Lo;0;L;<compat> 11A1;;;;N;HANGUL LETTER ALAE AE;;;;
+ 3190;IDEOGRAPHIC ANNOTATION LINKING MARK;So;0;L;;;;;N;KANBUN TATETEN;;;;
+ 3191;IDEOGRAPHIC ANNOTATION REVERSE MARK;So;0;L;;;;;N;KAERITEN RE;;;;
+ 3192;IDEOGRAPHIC ANNOTATION ONE MARK;No;0;L;<super> 4E00;;;1;N;KAERITEN ITI;;;;
+ 3193;IDEOGRAPHIC ANNOTATION TWO MARK;No;0;L;<super> 4E8C;;;2;N;KAERITEN NI;;;;
+ 3194;IDEOGRAPHIC ANNOTATION THREE MARK;No;0;L;<super> 4E09;;;3;N;KAERITEN SAN;;;;
+ 3195;IDEOGRAPHIC ANNOTATION FOUR MARK;No;0;L;<super> 56DB;;;4;N;KAERITEN SI;;;;
+ 3196;IDEOGRAPHIC ANNOTATION TOP MARK;So;0;L;<super> 4E0A;;;;N;KAERITEN ZYOU;;;;
+ 3197;IDEOGRAPHIC ANNOTATION MIDDLE MARK;So;0;L;<super> 4E2D;;;;N;KAERITEN TYUU;;;;
+ 3198;IDEOGRAPHIC ANNOTATION BOTTOM MARK;So;0;L;<super> 4E0B;;;;N;KAERITEN GE;;;;
+ 3199;IDEOGRAPHIC ANNOTATION FIRST MARK;So;0;L;<super> 7532;;;;N;KAERITEN KOU;;;;
+ 319A;IDEOGRAPHIC ANNOTATION SECOND MARK;So;0;L;<super> 4E59;;;;N;KAERITEN OTU;;;;
+ 319B;IDEOGRAPHIC ANNOTATION THIRD MARK;So;0;L;<super> 4E19;;;;N;KAERITEN HEI;;;;
+ 319C;IDEOGRAPHIC ANNOTATION FOURTH MARK;So;0;L;<super> 4E01;;;;N;KAERITEN TEI;;;;
+ 319D;IDEOGRAPHIC ANNOTATION HEAVEN MARK;So;0;L;<super> 5929;;;;N;KAERITEN TEN;;;;
+ 319E;IDEOGRAPHIC ANNOTATION EARTH MARK;So;0;L;<super> 5730;;;;N;KAERITEN TI;;;;
+ 319F;IDEOGRAPHIC ANNOTATION MAN MARK;So;0;L;<super> 4EBA;;;;N;KAERITEN ZIN;;;;
+ 31A0;BOPOMOFO LETTER BU;Lo;0;L;;;;;N;;;;;
+ 31A1;BOPOMOFO LETTER ZI;Lo;0;L;;;;;N;;;;;
+ 31A2;BOPOMOFO LETTER JI;Lo;0;L;;;;;N;;;;;
+ 31A3;BOPOMOFO LETTER GU;Lo;0;L;;;;;N;;;;;
+ 31A4;BOPOMOFO LETTER EE;Lo;0;L;;;;;N;;;;;
+ 31A5;BOPOMOFO LETTER ENN;Lo;0;L;;;;;N;;;;;
+ 31A6;BOPOMOFO LETTER OO;Lo;0;L;;;;;N;;;;;
+ 31A7;BOPOMOFO LETTER ONN;Lo;0;L;;;;;N;;;;;
+ 31A8;BOPOMOFO LETTER IR;Lo;0;L;;;;;N;;;;;
+ 31A9;BOPOMOFO LETTER ANN;Lo;0;L;;;;;N;;;;;
+ 31AA;BOPOMOFO LETTER INN;Lo;0;L;;;;;N;;;;;
+ 31AB;BOPOMOFO LETTER UNN;Lo;0;L;;;;;N;;;;;
+ 31AC;BOPOMOFO LETTER IM;Lo;0;L;;;;;N;;;;;
+ 31AD;BOPOMOFO LETTER NGG;Lo;0;L;;;;;N;;;;;
+ 31AE;BOPOMOFO LETTER AINN;Lo;0;L;;;;;N;;;;;
+ 31AF;BOPOMOFO LETTER AUNN;Lo;0;L;;;;;N;;;;;
+ 31B0;BOPOMOFO LETTER AM;Lo;0;L;;;;;N;;;;;
+ 31B1;BOPOMOFO LETTER OM;Lo;0;L;;;;;N;;;;;
+ 31B2;BOPOMOFO LETTER ONG;Lo;0;L;;;;;N;;;;;
+ 31B3;BOPOMOFO LETTER INNN;Lo;0;L;;;;;N;;;;;
+ 31B4;BOPOMOFO FINAL LETTER P;Lo;0;L;;;;;N;;;;;
+ 31B5;BOPOMOFO FINAL LETTER T;Lo;0;L;;;;;N;;;;;
+ 31B6;BOPOMOFO FINAL LETTER K;Lo;0;L;;;;;N;;;;;
+ 31B7;BOPOMOFO FINAL LETTER H;Lo;0;L;;;;;N;;;;;
+ 31B8;BOPOMOFO LETTER GH;Lo;0;L;;;;;N;;;;;
+ 31B9;BOPOMOFO LETTER LH;Lo;0;L;;;;;N;;;;;
+ 31BA;BOPOMOFO LETTER ZY;Lo;0;L;;;;;N;;;;;
+ 31C0;CJK STROKE T;So;0;ON;;;;;N;;;;;
+ 31C1;CJK STROKE WG;So;0;ON;;;;;N;;;;;
+ 31C2;CJK STROKE XG;So;0;ON;;;;;N;;;;;
+ 31C3;CJK STROKE BXG;So;0;ON;;;;;N;;;;;
+ 31C4;CJK STROKE SW;So;0;ON;;;;;N;;;;;
+ 31C5;CJK STROKE HZZ;So;0;ON;;;;;N;;;;;
+ 31C6;CJK STROKE HZG;So;0;ON;;;;;N;;;;;
+ 31C7;CJK STROKE HP;So;0;ON;;;;;N;;;;;
+ 31C8;CJK STROKE HZWG;So;0;ON;;;;;N;;;;;
+ 31C9;CJK STROKE SZWG;So;0;ON;;;;;N;;;;;
+ 31CA;CJK STROKE HZT;So;0;ON;;;;;N;;;;;
+ 31CB;CJK STROKE HZZP;So;0;ON;;;;;N;;;;;
+ 31CC;CJK STROKE HPWG;So;0;ON;;;;;N;;;;;
+ 31CD;CJK STROKE HZW;So;0;ON;;;;;N;;;;;
+ 31CE;CJK STROKE HZZZ;So;0;ON;;;;;N;;;;;
+ 31CF;CJK STROKE N;So;0;ON;;;;;N;;;;;
+ 31D0;CJK STROKE H;So;0;ON;;;;;N;;;;;
+ 31D1;CJK STROKE S;So;0;ON;;;;;N;;;;;
+ 31D2;CJK STROKE P;So;0;ON;;;;;N;;;;;
+ 31D3;CJK STROKE SP;So;0;ON;;;;;N;;;;;
+ 31D4;CJK STROKE D;So;0;ON;;;;;N;;;;;
+ 31D5;CJK STROKE HZ;So;0;ON;;;;;N;;;;;
+ 31D6;CJK STROKE HG;So;0;ON;;;;;N;;;;;
+ 31D7;CJK STROKE SZ;So;0;ON;;;;;N;;;;;
+ 31D8;CJK STROKE SWZ;So;0;ON;;;;;N;;;;;
+ 31D9;CJK STROKE ST;So;0;ON;;;;;N;;;;;
+ 31DA;CJK STROKE SG;So;0;ON;;;;;N;;;;;
+ 31DB;CJK STROKE PD;So;0;ON;;;;;N;;;;;
+ 31DC;CJK STROKE PZ;So;0;ON;;;;;N;;;;;
+ 31DD;CJK STROKE TN;So;0;ON;;;;;N;;;;;
+ 31DE;CJK STROKE SZZ;So;0;ON;;;;;N;;;;;
+ 31DF;CJK STROKE SWG;So;0;ON;;;;;N;;;;;
+ 31E0;CJK STROKE HXWG;So;0;ON;;;;;N;;;;;
+ 31E1;CJK STROKE HZZZG;So;0;ON;;;;;N;;;;;
+ 31E2;CJK STROKE PG;So;0;ON;;;;;N;;;;;
+ 31E3;CJK STROKE Q;So;0;ON;;;;;N;;;;;
+ 31F0;KATAKANA LETTER SMALL KU;Lo;0;L;;;;;N;;;;;
+ 31F1;KATAKANA LETTER SMALL SI;Lo;0;L;;;;;N;;;;;
+ 31F2;KATAKANA LETTER SMALL SU;Lo;0;L;;;;;N;;;;;
+ 31F3;KATAKANA LETTER SMALL TO;Lo;0;L;;;;;N;;;;;
+ 31F4;KATAKANA LETTER SMALL NU;Lo;0;L;;;;;N;;;;;
+ 31F5;KATAKANA LETTER SMALL HA;Lo;0;L;;;;;N;;;;;
+ 31F6;KATAKANA LETTER SMALL HI;Lo;0;L;;;;;N;;;;;
+ 31F7;KATAKANA LETTER SMALL HU;Lo;0;L;;;;;N;;;;;
+ 31F8;KATAKANA LETTER SMALL HE;Lo;0;L;;;;;N;;;;;
+ 31F9;KATAKANA LETTER SMALL HO;Lo;0;L;;;;;N;;;;;
+ 31FA;KATAKANA LETTER SMALL MU;Lo;0;L;;;;;N;;;;;
+ 31FB;KATAKANA LETTER SMALL RA;Lo;0;L;;;;;N;;;;;
+ 31FC;KATAKANA LETTER SMALL RI;Lo;0;L;;;;;N;;;;;
+ 31FD;KATAKANA LETTER SMALL RU;Lo;0;L;;;;;N;;;;;
+ 31FE;KATAKANA LETTER SMALL RE;Lo;0;L;;;;;N;;;;;
+ 31FF;KATAKANA LETTER SMALL RO;Lo;0;L;;;;;N;;;;;
+ 3200;PARENTHESIZED HANGUL KIYEOK;So;0;L;<compat> 0028 1100 0029;;;;N;PARENTHESIZED HANGUL GIYEOG;;;;
+ 3201;PARENTHESIZED HANGUL NIEUN;So;0;L;<compat> 0028 1102 0029;;;;N;;;;;
+ 3202;PARENTHESIZED HANGUL TIKEUT;So;0;L;<compat> 0028 1103 0029;;;;N;PARENTHESIZED HANGUL DIGEUD;;;;
+ 3203;PARENTHESIZED HANGUL RIEUL;So;0;L;<compat> 0028 1105 0029;;;;N;PARENTHESIZED HANGUL LIEUL;;;;
+ 3204;PARENTHESIZED HANGUL MIEUM;So;0;L;<compat> 0028 1106 0029;;;;N;;;;;
+ 3205;PARENTHESIZED HANGUL PIEUP;So;0;L;<compat> 0028 1107 0029;;;;N;PARENTHESIZED HANGUL BIEUB;;;;
+ 3206;PARENTHESIZED HANGUL SIOS;So;0;L;<compat> 0028 1109 0029;;;;N;;;;;
+ 3207;PARENTHESIZED HANGUL IEUNG;So;0;L;<compat> 0028 110B 0029;;;;N;;;;;
+ 3208;PARENTHESIZED HANGUL CIEUC;So;0;L;<compat> 0028 110C 0029;;;;N;PARENTHESIZED HANGUL JIEUJ;;;;
+ 3209;PARENTHESIZED HANGUL CHIEUCH;So;0;L;<compat> 0028 110E 0029;;;;N;PARENTHESIZED HANGUL CIEUC;;;;
+ 320A;PARENTHESIZED HANGUL KHIEUKH;So;0;L;<compat> 0028 110F 0029;;;;N;PARENTHESIZED HANGUL KIYEOK;;;;
+ 320B;PARENTHESIZED HANGUL THIEUTH;So;0;L;<compat> 0028 1110 0029;;;;N;PARENTHESIZED HANGUL TIEUT;;;;
+ 320C;PARENTHESIZED HANGUL PHIEUPH;So;0;L;<compat> 0028 1111 0029;;;;N;PARENTHESIZED HANGUL PIEUP;;;;
+ 320D;PARENTHESIZED HANGUL HIEUH;So;0;L;<compat> 0028 1112 0029;;;;N;;;;;
+ 320E;PARENTHESIZED HANGUL KIYEOK A;So;0;L;<compat> 0028 1100 1161 0029;;;;N;PARENTHESIZED HANGUL GA;;;;
+ 320F;PARENTHESIZED HANGUL NIEUN A;So;0;L;<compat> 0028 1102 1161 0029;;;;N;PARENTHESIZED HANGUL NA;;;;
+ 3210;PARENTHESIZED HANGUL TIKEUT A;So;0;L;<compat> 0028 1103 1161 0029;;;;N;PARENTHESIZED HANGUL DA;;;;
+ 3211;PARENTHESIZED HANGUL RIEUL A;So;0;L;<compat> 0028 1105 1161 0029;;;;N;PARENTHESIZED HANGUL LA;;;;
+ 3212;PARENTHESIZED HANGUL MIEUM A;So;0;L;<compat> 0028 1106 1161 0029;;;;N;PARENTHESIZED HANGUL MA;;;;
+ 3213;PARENTHESIZED HANGUL PIEUP A;So;0;L;<compat> 0028 1107 1161 0029;;;;N;PARENTHESIZED HANGUL BA;;;;
+ 3214;PARENTHESIZED HANGUL SIOS A;So;0;L;<compat> 0028 1109 1161 0029;;;;N;PARENTHESIZED HANGUL SA;;;;
+ 3215;PARENTHESIZED HANGUL IEUNG A;So;0;L;<compat> 0028 110B 1161 0029;;;;N;PARENTHESIZED HANGUL A;;;;
+ 3216;PARENTHESIZED HANGUL CIEUC A;So;0;L;<compat> 0028 110C 1161 0029;;;;N;PARENTHESIZED HANGUL JA;;;;
+ 3217;PARENTHESIZED HANGUL CHIEUCH A;So;0;L;<compat> 0028 110E 1161 0029;;;;N;PARENTHESIZED HANGUL CA;;;;
+ 3218;PARENTHESIZED HANGUL KHIEUKH A;So;0;L;<compat> 0028 110F 1161 0029;;;;N;PARENTHESIZED HANGUL KA;;;;
+ 3219;PARENTHESIZED HANGUL THIEUTH A;So;0;L;<compat> 0028 1110 1161 0029;;;;N;PARENTHESIZED HANGUL TA;;;;
+ 321A;PARENTHESIZED HANGUL PHIEUPH A;So;0;L;<compat> 0028 1111 1161 0029;;;;N;PARENTHESIZED HANGUL PA;;;;
+ 321B;PARENTHESIZED HANGUL HIEUH A;So;0;L;<compat> 0028 1112 1161 0029;;;;N;PARENTHESIZED HANGUL HA;;;;
+ 321C;PARENTHESIZED HANGUL CIEUC U;So;0;L;<compat> 0028 110C 116E 0029;;;;N;PARENTHESIZED HANGUL JU;;;;
+ 321D;PARENTHESIZED KOREAN CHARACTER OJEON;So;0;ON;<compat> 0028 110B 1169 110C 1165 11AB 0029;;;;N;;;;;
+ 321E;PARENTHESIZED KOREAN CHARACTER O HU;So;0;ON;<compat> 0028 110B 1169 1112 116E 0029;;;;N;;;;;
+ 3220;PARENTHESIZED IDEOGRAPH ONE;No;0;L;<compat> 0028 4E00 0029;;;1;N;;;;;
+ 3221;PARENTHESIZED IDEOGRAPH TWO;No;0;L;<compat> 0028 4E8C 0029;;;2;N;;;;;
+ 3222;PARENTHESIZED IDEOGRAPH THREE;No;0;L;<compat> 0028 4E09 0029;;;3;N;;;;;
+ 3223;PARENTHESIZED IDEOGRAPH FOUR;No;0;L;<compat> 0028 56DB 0029;;;4;N;;;;;
+ 3224;PARENTHESIZED IDEOGRAPH FIVE;No;0;L;<compat> 0028 4E94 0029;;;5;N;;;;;
+ 3225;PARENTHESIZED IDEOGRAPH SIX;No;0;L;<compat> 0028 516D 0029;;;6;N;;;;;
+ 3226;PARENTHESIZED IDEOGRAPH SEVEN;No;0;L;<compat> 0028 4E03 0029;;;7;N;;;;;
+ 3227;PARENTHESIZED IDEOGRAPH EIGHT;No;0;L;<compat> 0028 516B 0029;;;8;N;;;;;
+ 3228;PARENTHESIZED IDEOGRAPH NINE;No;0;L;<compat> 0028 4E5D 0029;;;9;N;;;;;
+ 3229;PARENTHESIZED IDEOGRAPH TEN;No;0;L;<compat> 0028 5341 0029;;;10;N;;;;;
+ 322A;PARENTHESIZED IDEOGRAPH MOON;So;0;L;<compat> 0028 6708 0029;;;;N;;;;;
+ 322B;PARENTHESIZED IDEOGRAPH FIRE;So;0;L;<compat> 0028 706B 0029;;;;N;;;;;
+ 322C;PARENTHESIZED IDEOGRAPH WATER;So;0;L;<compat> 0028 6C34 0029;;;;N;;;;;
+ 322D;PARENTHESIZED IDEOGRAPH WOOD;So;0;L;<compat> 0028 6728 0029;;;;N;;;;;
+ 322E;PARENTHESIZED IDEOGRAPH METAL;So;0;L;<compat> 0028 91D1 0029;;;;N;;;;;
+ 322F;PARENTHESIZED IDEOGRAPH EARTH;So;0;L;<compat> 0028 571F 0029;;;;N;;;;;
+ 3230;PARENTHESIZED IDEOGRAPH SUN;So;0;L;<compat> 0028 65E5 0029;;;;N;;;;;
+ 3231;PARENTHESIZED IDEOGRAPH STOCK;So;0;L;<compat> 0028 682A 0029;;;;N;;;;;
+ 3232;PARENTHESIZED IDEOGRAPH HAVE;So;0;L;<compat> 0028 6709 0029;;;;N;;;;;
+ 3233;PARENTHESIZED IDEOGRAPH SOCIETY;So;0;L;<compat> 0028 793E 0029;;;;N;;;;;
+ 3234;PARENTHESIZED IDEOGRAPH NAME;So;0;L;<compat> 0028 540D 0029;;;;N;;;;;
+ 3235;PARENTHESIZED IDEOGRAPH SPECIAL;So;0;L;<compat> 0028 7279 0029;;;;N;;;;;
+ 3236;PARENTHESIZED IDEOGRAPH FINANCIAL;So;0;L;<compat> 0028 8CA1 0029;;;;N;;;;;
+ 3237;PARENTHESIZED IDEOGRAPH CONGRATULATION;So;0;L;<compat> 0028 795D 0029;;;;N;;;;;
+ 3238;PARENTHESIZED IDEOGRAPH LABOR;So;0;L;<compat> 0028 52B4 0029;;;;N;;;;;
+ 3239;PARENTHESIZED IDEOGRAPH REPRESENT;So;0;L;<compat> 0028 4EE3 0029;;;;N;;;;;
+ 323A;PARENTHESIZED IDEOGRAPH CALL;So;0;L;<compat> 0028 547C 0029;;;;N;;;;;
+ 323B;PARENTHESIZED IDEOGRAPH STUDY;So;0;L;<compat> 0028 5B66 0029;;;;N;;;;;
+ 323C;PARENTHESIZED IDEOGRAPH SUPERVISE;So;0;L;<compat> 0028 76E3 0029;;;;N;;;;;
+ 323D;PARENTHESIZED IDEOGRAPH ENTERPRISE;So;0;L;<compat> 0028 4F01 0029;;;;N;;;;;
+ 323E;PARENTHESIZED IDEOGRAPH RESOURCE;So;0;L;<compat> 0028 8CC7 0029;;;;N;;;;;
+ 323F;PARENTHESIZED IDEOGRAPH ALLIANCE;So;0;L;<compat> 0028 5354 0029;;;;N;;;;;
+ 3240;PARENTHESIZED IDEOGRAPH FESTIVAL;So;0;L;<compat> 0028 796D 0029;;;;N;;;;;
+ 3241;PARENTHESIZED IDEOGRAPH REST;So;0;L;<compat> 0028 4F11 0029;;;;N;;;;;
+ 3242;PARENTHESIZED IDEOGRAPH SELF;So;0;L;<compat> 0028 81EA 0029;;;;N;;;;;
+ 3243;PARENTHESIZED IDEOGRAPH REACH;So;0;L;<compat> 0028 81F3 0029;;;;N;;;;;
+ 3244;CIRCLED IDEOGRAPH QUESTION;So;0;L;<circle> 554F;;;;N;;;;;
+ 3245;CIRCLED IDEOGRAPH KINDERGARTEN;So;0;L;<circle> 5E7C;;;;N;;;;;
+ 3246;CIRCLED IDEOGRAPH SCHOOL;So;0;L;<circle> 6587;;;;N;;;;;
+ 3247;CIRCLED IDEOGRAPH KOTO;So;0;L;<circle> 7B8F;;;;N;;;;;
+ 3248;CIRCLED NUMBER TEN ON BLACK SQUARE;No;0;L;;;;10;N;;;;;
+ 3249;CIRCLED NUMBER TWENTY ON BLACK SQUARE;No;0;L;;;;20;N;;;;;
+ 324A;CIRCLED NUMBER THIRTY ON BLACK SQUARE;No;0;L;;;;30;N;;;;;
+ 324B;CIRCLED NUMBER FORTY ON BLACK SQUARE;No;0;L;;;;40;N;;;;;
+ 324C;CIRCLED NUMBER FIFTY ON BLACK SQUARE;No;0;L;;;;50;N;;;;;
+ 324D;CIRCLED NUMBER SIXTY ON BLACK SQUARE;No;0;L;;;;60;N;;;;;
+ 324E;CIRCLED NUMBER SEVENTY ON BLACK SQUARE;No;0;L;;;;70;N;;;;;
+ 324F;CIRCLED NUMBER EIGHTY ON BLACK SQUARE;No;0;L;;;;80;N;;;;;
+ 3250;PARTNERSHIP SIGN;So;0;ON;<square> 0050 0054 0045;;;;N;;;;;
+ 3251;CIRCLED NUMBER TWENTY ONE;No;0;ON;<circle> 0032 0031;;;21;N;;;;;
+ 3252;CIRCLED NUMBER TWENTY TWO;No;0;ON;<circle> 0032 0032;;;22;N;;;;;
+ 3253;CIRCLED NUMBER TWENTY THREE;No;0;ON;<circle> 0032 0033;;;23;N;;;;;
+ 3254;CIRCLED NUMBER TWENTY FOUR;No;0;ON;<circle> 0032 0034;;;24;N;;;;;
+ 3255;CIRCLED NUMBER TWENTY FIVE;No;0;ON;<circle> 0032 0035;;;25;N;;;;;
+ 3256;CIRCLED NUMBER TWENTY SIX;No;0;ON;<circle> 0032 0036;;;26;N;;;;;
+ 3257;CIRCLED NUMBER TWENTY SEVEN;No;0;ON;<circle> 0032 0037;;;27;N;;;;;
+ 3258;CIRCLED NUMBER TWENTY EIGHT;No;0;ON;<circle> 0032 0038;;;28;N;;;;;
+ 3259;CIRCLED NUMBER TWENTY NINE;No;0;ON;<circle> 0032 0039;;;29;N;;;;;
+ 325A;CIRCLED NUMBER THIRTY;No;0;ON;<circle> 0033 0030;;;30;N;;;;;
+ 325B;CIRCLED NUMBER THIRTY ONE;No;0;ON;<circle> 0033 0031;;;31;N;;;;;
+ 325C;CIRCLED NUMBER THIRTY TWO;No;0;ON;<circle> 0033 0032;;;32;N;;;;;
+ 325D;CIRCLED NUMBER THIRTY THREE;No;0;ON;<circle> 0033 0033;;;33;N;;;;;
+ 325E;CIRCLED NUMBER THIRTY FOUR;No;0;ON;<circle> 0033 0034;;;34;N;;;;;
+ 325F;CIRCLED NUMBER THIRTY FIVE;No;0;ON;<circle> 0033 0035;;;35;N;;;;;
+ 3260;CIRCLED HANGUL KIYEOK;So;0;L;<circle> 1100;;;;N;CIRCLED HANGUL GIYEOG;;;;
+ 3261;CIRCLED HANGUL NIEUN;So;0;L;<circle> 1102;;;;N;;;;;
+ 3262;CIRCLED HANGUL TIKEUT;So;0;L;<circle> 1103;;;;N;CIRCLED HANGUL DIGEUD;;;;
+ 3263;CIRCLED HANGUL RIEUL;So;0;L;<circle> 1105;;;;N;CIRCLED HANGUL LIEUL;;;;
+ 3264;CIRCLED HANGUL MIEUM;So;0;L;<circle> 1106;;;;N;;;;;
+ 3265;CIRCLED HANGUL PIEUP;So;0;L;<circle> 1107;;;;N;CIRCLED HANGUL BIEUB;;;;
+ 3266;CIRCLED HANGUL SIOS;So;0;L;<circle> 1109;;;;N;;;;;
+ 3267;CIRCLED HANGUL IEUNG;So;0;L;<circle> 110B;;;;N;;;;;
+ 3268;CIRCLED HANGUL CIEUC;So;0;L;<circle> 110C;;;;N;CIRCLED HANGUL JIEUJ;;;;
+ 3269;CIRCLED HANGUL CHIEUCH;So;0;L;<circle> 110E;;;;N;CIRCLED HANGUL CIEUC;;;;
+ 326A;CIRCLED HANGUL KHIEUKH;So;0;L;<circle> 110F;;;;N;CIRCLED HANGUL KIYEOK;;;;
+ 326B;CIRCLED HANGUL THIEUTH;So;0;L;<circle> 1110;;;;N;CIRCLED HANGUL TIEUT;;;;
+ 326C;CIRCLED HANGUL PHIEUPH;So;0;L;<circle> 1111;;;;N;CIRCLED HANGUL PIEUP;;;;
+ 326D;CIRCLED HANGUL HIEUH;So;0;L;<circle> 1112;;;;N;;;;;
+ 326E;CIRCLED HANGUL KIYEOK A;So;0;L;<circle> 1100 1161;;;;N;CIRCLED HANGUL GA;;;;
+ 326F;CIRCLED HANGUL NIEUN A;So;0;L;<circle> 1102 1161;;;;N;CIRCLED HANGUL NA;;;;
+ 3270;CIRCLED HANGUL TIKEUT A;So;0;L;<circle> 1103 1161;;;;N;CIRCLED HANGUL DA;;;;
+ 3271;CIRCLED HANGUL RIEUL A;So;0;L;<circle> 1105 1161;;;;N;CIRCLED HANGUL LA;;;;
+ 3272;CIRCLED HANGUL MIEUM A;So;0;L;<circle> 1106 1161;;;;N;CIRCLED HANGUL MA;;;;
+ 3273;CIRCLED HANGUL PIEUP A;So;0;L;<circle> 1107 1161;;;;N;CIRCLED HANGUL BA;;;;
+ 3274;CIRCLED HANGUL SIOS A;So;0;L;<circle> 1109 1161;;;;N;CIRCLED HANGUL SA;;;;
+ 3275;CIRCLED HANGUL IEUNG A;So;0;L;<circle> 110B 1161;;;;N;CIRCLED HANGUL A;;;;
+ 3276;CIRCLED HANGUL CIEUC A;So;0;L;<circle> 110C 1161;;;;N;CIRCLED HANGUL JA;;;;
+ 3277;CIRCLED HANGUL CHIEUCH A;So;0;L;<circle> 110E 1161;;;;N;CIRCLED HANGUL CA;;;;
+ 3278;CIRCLED HANGUL KHIEUKH A;So;0;L;<circle> 110F 1161;;;;N;CIRCLED HANGUL KA;;;;
+ 3279;CIRCLED HANGUL THIEUTH A;So;0;L;<circle> 1110 1161;;;;N;CIRCLED HANGUL TA;;;;
+ 327A;CIRCLED HANGUL PHIEUPH A;So;0;L;<circle> 1111 1161;;;;N;CIRCLED HANGUL PA;;;;
+ 327B;CIRCLED HANGUL HIEUH A;So;0;L;<circle> 1112 1161;;;;N;CIRCLED HANGUL HA;;;;
+ 327C;CIRCLED KOREAN CHARACTER CHAMKO;So;0;ON;<circle> 110E 1161 11B7 1100 1169;;;;N;;;;;
+ 327D;CIRCLED KOREAN CHARACTER JUEUI;So;0;ON;<circle> 110C 116E 110B 1174;;;;N;;;;;
+ 327E;CIRCLED HANGUL IEUNG U;So;0;ON;<circle> 110B 116E;;;;N;;;;;
+ 327F;KOREAN STANDARD SYMBOL;So;0;L;;;;;N;;;;;
+ 3280;CIRCLED IDEOGRAPH ONE;No;0;L;<circle> 4E00;;;1;N;;;;;
+ 3281;CIRCLED IDEOGRAPH TWO;No;0;L;<circle> 4E8C;;;2;N;;;;;
+ 3282;CIRCLED IDEOGRAPH THREE;No;0;L;<circle> 4E09;;;3;N;;;;;
+ 3283;CIRCLED IDEOGRAPH FOUR;No;0;L;<circle> 56DB;;;4;N;;;;;
+ 3284;CIRCLED IDEOGRAPH FIVE;No;0;L;<circle> 4E94;;;5;N;;;;;
+ 3285;CIRCLED IDEOGRAPH SIX;No;0;L;<circle> 516D;;;6;N;;;;;
+ 3286;CIRCLED IDEOGRAPH SEVEN;No;0;L;<circle> 4E03;;;7;N;;;;;
+ 3287;CIRCLED IDEOGRAPH EIGHT;No;0;L;<circle> 516B;;;8;N;;;;;
+ 3288;CIRCLED IDEOGRAPH NINE;No;0;L;<circle> 4E5D;;;9;N;;;;;
+ 3289;CIRCLED IDEOGRAPH TEN;No;0;L;<circle> 5341;;;10;N;;;;;
+ 328A;CIRCLED IDEOGRAPH MOON;So;0;L;<circle> 6708;;;;N;;;;;
+ 328B;CIRCLED IDEOGRAPH FIRE;So;0;L;<circle> 706B;;;;N;;;;;
+ 328C;CIRCLED IDEOGRAPH WATER;So;0;L;<circle> 6C34;;;;N;;;;;
+ 328D;CIRCLED IDEOGRAPH WOOD;So;0;L;<circle> 6728;;;;N;;;;;
+ 328E;CIRCLED IDEOGRAPH METAL;So;0;L;<circle> 91D1;;;;N;;;;;
+ 328F;CIRCLED IDEOGRAPH EARTH;So;0;L;<circle> 571F;;;;N;;;;;
+ 3290;CIRCLED IDEOGRAPH SUN;So;0;L;<circle> 65E5;;;;N;;;;;
+ 3291;CIRCLED IDEOGRAPH STOCK;So;0;L;<circle> 682A;;;;N;;;;;
+ 3292;CIRCLED IDEOGRAPH HAVE;So;0;L;<circle> 6709;;;;N;;;;;
+ 3293;CIRCLED IDEOGRAPH SOCIETY;So;0;L;<circle> 793E;;;;N;;;;;
+ 3294;CIRCLED IDEOGRAPH NAME;So;0;L;<circle> 540D;;;;N;;;;;
+ 3295;CIRCLED IDEOGRAPH SPECIAL;So;0;L;<circle> 7279;;;;N;;;;;
+ 3296;CIRCLED IDEOGRAPH FINANCIAL;So;0;L;<circle> 8CA1;;;;N;;;;;
+ 3297;CIRCLED IDEOGRAPH CONGRATULATION;So;0;L;<circle> 795D;;;;N;;;;;
+ 3298;CIRCLED IDEOGRAPH LABOR;So;0;L;<circle> 52B4;;;;N;;;;;
+ 3299;CIRCLED IDEOGRAPH SECRET;So;0;L;<circle> 79D8;;;;N;;;;;
+ 329A;CIRCLED IDEOGRAPH MALE;So;0;L;<circle> 7537;;;;N;;;;;
+ 329B;CIRCLED IDEOGRAPH FEMALE;So;0;L;<circle> 5973;;;;N;;;;;
+ 329C;CIRCLED IDEOGRAPH SUITABLE;So;0;L;<circle> 9069;;;;N;;;;;
+ 329D;CIRCLED IDEOGRAPH EXCELLENT;So;0;L;<circle> 512A;;;;N;;;;;
+ 329E;CIRCLED IDEOGRAPH PRINT;So;0;L;<circle> 5370;;;;N;;;;;
+ 329F;CIRCLED IDEOGRAPH ATTENTION;So;0;L;<circle> 6CE8;;;;N;;;;;
+ 32A0;CIRCLED IDEOGRAPH ITEM;So;0;L;<circle> 9805;;;;N;;;;;
+ 32A1;CIRCLED IDEOGRAPH REST;So;0;L;<circle> 4F11;;;;N;;;;;
+ 32A2;CIRCLED IDEOGRAPH COPY;So;0;L;<circle> 5199;;;;N;;;;;
+ 32A3;CIRCLED IDEOGRAPH CORRECT;So;0;L;<circle> 6B63;;;;N;;;;;
+ 32A4;CIRCLED IDEOGRAPH HIGH;So;0;L;<circle> 4E0A;;;;N;;;;;
+ 32A5;CIRCLED IDEOGRAPH CENTRE;So;0;L;<circle> 4E2D;;;;N;CIRCLED IDEOGRAPH CENTER;;;;
+ 32A6;CIRCLED IDEOGRAPH LOW;So;0;L;<circle> 4E0B;;;;N;;;;;
+ 32A7;CIRCLED IDEOGRAPH LEFT;So;0;L;<circle> 5DE6;;;;N;;;;;
+ 32A8;CIRCLED IDEOGRAPH RIGHT;So;0;L;<circle> 53F3;;;;N;;;;;
+ 32A9;CIRCLED IDEOGRAPH MEDICINE;So;0;L;<circle> 533B;;;;N;;;;;
+ 32AA;CIRCLED IDEOGRAPH RELIGION;So;0;L;<circle> 5B97;;;;N;;;;;
+ 32AB;CIRCLED IDEOGRAPH STUDY;So;0;L;<circle> 5B66;;;;N;;;;;
+ 32AC;CIRCLED IDEOGRAPH SUPERVISE;So;0;L;<circle> 76E3;;;;N;;;;;
+ 32AD;CIRCLED IDEOGRAPH ENTERPRISE;So;0;L;<circle> 4F01;;;;N;;;;;
+ 32AE;CIRCLED IDEOGRAPH RESOURCE;So;0;L;<circle> 8CC7;;;;N;;;;;
+ 32AF;CIRCLED IDEOGRAPH ALLIANCE;So;0;L;<circle> 5354;;;;N;;;;;
+ 32B0;CIRCLED IDEOGRAPH NIGHT;So;0;L;<circle> 591C;;;;N;;;;;
+ 32B1;CIRCLED NUMBER THIRTY SIX;No;0;ON;<circle> 0033 0036;;;36;N;;;;;
+ 32B2;CIRCLED NUMBER THIRTY SEVEN;No;0;ON;<circle> 0033 0037;;;37;N;;;;;
+ 32B3;CIRCLED NUMBER THIRTY EIGHT;No;0;ON;<circle> 0033 0038;;;38;N;;;;;
+ 32B4;CIRCLED NUMBER THIRTY NINE;No;0;ON;<circle> 0033 0039;;;39;N;;;;;
+ 32B5;CIRCLED NUMBER FORTY;No;0;ON;<circle> 0034 0030;;;40;N;;;;;
+ 32B6;CIRCLED NUMBER FORTY ONE;No;0;ON;<circle> 0034 0031;;;41;N;;;;;
+ 32B7;CIRCLED NUMBER FORTY TWO;No;0;ON;<circle> 0034 0032;;;42;N;;;;;
+ 32B8;CIRCLED NUMBER FORTY THREE;No;0;ON;<circle> 0034 0033;;;43;N;;;;;
+ 32B9;CIRCLED NUMBER FORTY FOUR;No;0;ON;<circle> 0034 0034;;;44;N;;;;;
+ 32BA;CIRCLED NUMBER FORTY FIVE;No;0;ON;<circle> 0034 0035;;;45;N;;;;;
+ 32BB;CIRCLED NUMBER FORTY SIX;No;0;ON;<circle> 0034 0036;;;46;N;;;;;
+ 32BC;CIRCLED NUMBER FORTY SEVEN;No;0;ON;<circle> 0034 0037;;;47;N;;;;;
+ 32BD;CIRCLED NUMBER FORTY EIGHT;No;0;ON;<circle> 0034 0038;;;48;N;;;;;
+ 32BE;CIRCLED NUMBER FORTY NINE;No;0;ON;<circle> 0034 0039;;;49;N;;;;;
+ 32BF;CIRCLED NUMBER FIFTY;No;0;ON;<circle> 0035 0030;;;50;N;;;;;
+ 32C0;IDEOGRAPHIC TELEGRAPH SYMBOL FOR JANUARY;So;0;L;<compat> 0031 6708;;;;N;;;;;
+ 32C1;IDEOGRAPHIC TELEGRAPH SYMBOL FOR FEBRUARY;So;0;L;<compat> 0032 6708;;;;N;;;;;
+ 32C2;IDEOGRAPHIC TELEGRAPH SYMBOL FOR MARCH;So;0;L;<compat> 0033 6708;;;;N;;;;;
+ 32C3;IDEOGRAPHIC TELEGRAPH SYMBOL FOR APRIL;So;0;L;<compat> 0034 6708;;;;N;;;;;
+ 32C4;IDEOGRAPHIC TELEGRAPH SYMBOL FOR MAY;So;0;L;<compat> 0035 6708;;;;N;;;;;
+ 32C5;IDEOGRAPHIC TELEGRAPH SYMBOL FOR JUNE;So;0;L;<compat> 0036 6708;;;;N;;;;;
+ 32C6;IDEOGRAPHIC TELEGRAPH SYMBOL FOR JULY;So;0;L;<compat> 0037 6708;;;;N;;;;;
+ 32C7;IDEOGRAPHIC TELEGRAPH SYMBOL FOR AUGUST;So;0;L;<compat> 0038 6708;;;;N;;;;;
+ 32C8;IDEOGRAPHIC TELEGRAPH SYMBOL FOR SEPTEMBER;So;0;L;<compat> 0039 6708;;;;N;;;;;
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+ 3358;IDEOGRAPHIC TELEGRAPH SYMBOL FOR HOUR ZERO;So;0;L;<compat> 0030 70B9;;;;N;;;;;
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+ A067;YI SYLLABLE BBO;Lo;0;L;;;;;N;;;;;
+ A068;YI SYLLABLE BBOP;Lo;0;L;;;;;N;;;;;
+ A069;YI SYLLABLE BBEX;Lo;0;L;;;;;N;;;;;
+ A06A;YI SYLLABLE BBE;Lo;0;L;;;;;N;;;;;
+ A06B;YI SYLLABLE BBEP;Lo;0;L;;;;;N;;;;;
+ A06C;YI SYLLABLE BBUT;Lo;0;L;;;;;N;;;;;
+ A06D;YI SYLLABLE BBUX;Lo;0;L;;;;;N;;;;;
+ A06E;YI SYLLABLE BBU;Lo;0;L;;;;;N;;;;;
+ A06F;YI SYLLABLE BBUP;Lo;0;L;;;;;N;;;;;
+ A070;YI SYLLABLE BBURX;Lo;0;L;;;;;N;;;;;
+ A071;YI SYLLABLE BBUR;Lo;0;L;;;;;N;;;;;
+ A072;YI SYLLABLE BBYT;Lo;0;L;;;;;N;;;;;
+ A073;YI SYLLABLE BBYX;Lo;0;L;;;;;N;;;;;
+ A074;YI SYLLABLE BBY;Lo;0;L;;;;;N;;;;;
+ A075;YI SYLLABLE BBYP;Lo;0;L;;;;;N;;;;;
+ A076;YI SYLLABLE NBIT;Lo;0;L;;;;;N;;;;;
+ A077;YI SYLLABLE NBIX;Lo;0;L;;;;;N;;;;;
+ A078;YI SYLLABLE NBI;Lo;0;L;;;;;N;;;;;
+ A079;YI SYLLABLE NBIP;Lo;0;L;;;;;N;;;;;
+ A07A;YI SYLLABLE NBIEX;Lo;0;L;;;;;N;;;;;
+ A07B;YI SYLLABLE NBIE;Lo;0;L;;;;;N;;;;;
+ A07C;YI SYLLABLE NBIEP;Lo;0;L;;;;;N;;;;;
+ A07D;YI SYLLABLE NBAT;Lo;0;L;;;;;N;;;;;
+ A07E;YI SYLLABLE NBAX;Lo;0;L;;;;;N;;;;;
+ A07F;YI SYLLABLE NBA;Lo;0;L;;;;;N;;;;;
+ A080;YI SYLLABLE NBAP;Lo;0;L;;;;;N;;;;;
+ A081;YI SYLLABLE NBOT;Lo;0;L;;;;;N;;;;;
+ A082;YI SYLLABLE NBOX;Lo;0;L;;;;;N;;;;;
+ A083;YI SYLLABLE NBO;Lo;0;L;;;;;N;;;;;
+ A084;YI SYLLABLE NBOP;Lo;0;L;;;;;N;;;;;
+ A085;YI SYLLABLE NBUT;Lo;0;L;;;;;N;;;;;
+ A086;YI SYLLABLE NBUX;Lo;0;L;;;;;N;;;;;
+ A087;YI SYLLABLE NBU;Lo;0;L;;;;;N;;;;;
+ A088;YI SYLLABLE NBUP;Lo;0;L;;;;;N;;;;;
+ A089;YI SYLLABLE NBURX;Lo;0;L;;;;;N;;;;;
+ A08A;YI SYLLABLE NBUR;Lo;0;L;;;;;N;;;;;
+ A08B;YI SYLLABLE NBYT;Lo;0;L;;;;;N;;;;;
+ A08C;YI SYLLABLE NBYX;Lo;0;L;;;;;N;;;;;
+ A08D;YI SYLLABLE NBY;Lo;0;L;;;;;N;;;;;
+ A08E;YI SYLLABLE NBYP;Lo;0;L;;;;;N;;;;;
+ A08F;YI SYLLABLE NBYRX;Lo;0;L;;;;;N;;;;;
+ A090;YI SYLLABLE NBYR;Lo;0;L;;;;;N;;;;;
+ A091;YI SYLLABLE HMIT;Lo;0;L;;;;;N;;;;;
+ A092;YI SYLLABLE HMIX;Lo;0;L;;;;;N;;;;;
+ A093;YI SYLLABLE HMI;Lo;0;L;;;;;N;;;;;
+ A094;YI SYLLABLE HMIP;Lo;0;L;;;;;N;;;;;
+ A095;YI SYLLABLE HMIEX;Lo;0;L;;;;;N;;;;;
+ A096;YI SYLLABLE HMIE;Lo;0;L;;;;;N;;;;;
+ A097;YI SYLLABLE HMIEP;Lo;0;L;;;;;N;;;;;
+ A098;YI SYLLABLE HMAT;Lo;0;L;;;;;N;;;;;
+ A099;YI SYLLABLE HMAX;Lo;0;L;;;;;N;;;;;
+ A09A;YI SYLLABLE HMA;Lo;0;L;;;;;N;;;;;
+ A09B;YI SYLLABLE HMAP;Lo;0;L;;;;;N;;;;;
+ A09C;YI SYLLABLE HMUOX;Lo;0;L;;;;;N;;;;;
+ A09D;YI SYLLABLE HMUO;Lo;0;L;;;;;N;;;;;
+ A09E;YI SYLLABLE HMUOP;Lo;0;L;;;;;N;;;;;
+ A09F;YI SYLLABLE HMOT;Lo;0;L;;;;;N;;;;;
+ A0A0;YI SYLLABLE HMOX;Lo;0;L;;;;;N;;;;;
+ A0A1;YI SYLLABLE HMO;Lo;0;L;;;;;N;;;;;
+ A0A2;YI SYLLABLE HMOP;Lo;0;L;;;;;N;;;;;
+ A0A3;YI SYLLABLE HMUT;Lo;0;L;;;;;N;;;;;
+ A0A4;YI SYLLABLE HMUX;Lo;0;L;;;;;N;;;;;
+ A0A5;YI SYLLABLE HMU;Lo;0;L;;;;;N;;;;;
+ A0A6;YI SYLLABLE HMUP;Lo;0;L;;;;;N;;;;;
+ A0A7;YI SYLLABLE HMURX;Lo;0;L;;;;;N;;;;;
+ A0A8;YI SYLLABLE HMUR;Lo;0;L;;;;;N;;;;;
+ A0A9;YI SYLLABLE HMYX;Lo;0;L;;;;;N;;;;;
+ A0AA;YI SYLLABLE HMY;Lo;0;L;;;;;N;;;;;
+ A0AB;YI SYLLABLE HMYP;Lo;0;L;;;;;N;;;;;
+ A0AC;YI SYLLABLE HMYRX;Lo;0;L;;;;;N;;;;;
+ A0AD;YI SYLLABLE HMYR;Lo;0;L;;;;;N;;;;;
+ A0AE;YI SYLLABLE MIT;Lo;0;L;;;;;N;;;;;
+ A0AF;YI SYLLABLE MIX;Lo;0;L;;;;;N;;;;;
+ A0B0;YI SYLLABLE MI;Lo;0;L;;;;;N;;;;;
+ A0B1;YI SYLLABLE MIP;Lo;0;L;;;;;N;;;;;
+ A0B2;YI SYLLABLE MIEX;Lo;0;L;;;;;N;;;;;
+ A0B3;YI SYLLABLE MIE;Lo;0;L;;;;;N;;;;;
+ A0B4;YI SYLLABLE MIEP;Lo;0;L;;;;;N;;;;;
+ A0B5;YI SYLLABLE MAT;Lo;0;L;;;;;N;;;;;
+ A0B6;YI SYLLABLE MAX;Lo;0;L;;;;;N;;;;;
+ A0B7;YI SYLLABLE MA;Lo;0;L;;;;;N;;;;;
+ A0B8;YI SYLLABLE MAP;Lo;0;L;;;;;N;;;;;
+ A0B9;YI SYLLABLE MUOT;Lo;0;L;;;;;N;;;;;
+ A0BA;YI SYLLABLE MUOX;Lo;0;L;;;;;N;;;;;
+ A0BB;YI SYLLABLE MUO;Lo;0;L;;;;;N;;;;;
+ A0BC;YI SYLLABLE MUOP;Lo;0;L;;;;;N;;;;;
+ A0BD;YI SYLLABLE MOT;Lo;0;L;;;;;N;;;;;
+ A0BE;YI SYLLABLE MOX;Lo;0;L;;;;;N;;;;;
+ A0BF;YI SYLLABLE MO;Lo;0;L;;;;;N;;;;;
+ A0C0;YI SYLLABLE MOP;Lo;0;L;;;;;N;;;;;
+ A0C1;YI SYLLABLE MEX;Lo;0;L;;;;;N;;;;;
+ A0C2;YI SYLLABLE ME;Lo;0;L;;;;;N;;;;;
+ A0C3;YI SYLLABLE MUT;Lo;0;L;;;;;N;;;;;
+ A0C4;YI SYLLABLE MUX;Lo;0;L;;;;;N;;;;;
+ A0C5;YI SYLLABLE MU;Lo;0;L;;;;;N;;;;;
+ A0C6;YI SYLLABLE MUP;Lo;0;L;;;;;N;;;;;
+ A0C7;YI SYLLABLE MURX;Lo;0;L;;;;;N;;;;;
+ A0C8;YI SYLLABLE MUR;Lo;0;L;;;;;N;;;;;
+ A0C9;YI SYLLABLE MYT;Lo;0;L;;;;;N;;;;;
+ A0CA;YI SYLLABLE MYX;Lo;0;L;;;;;N;;;;;
+ A0CB;YI SYLLABLE MY;Lo;0;L;;;;;N;;;;;
+ A0CC;YI SYLLABLE MYP;Lo;0;L;;;;;N;;;;;
+ A0CD;YI SYLLABLE FIT;Lo;0;L;;;;;N;;;;;
+ A0CE;YI SYLLABLE FIX;Lo;0;L;;;;;N;;;;;
+ A0CF;YI SYLLABLE FI;Lo;0;L;;;;;N;;;;;
+ A0D0;YI SYLLABLE FIP;Lo;0;L;;;;;N;;;;;
+ A0D1;YI SYLLABLE FAT;Lo;0;L;;;;;N;;;;;
+ A0D2;YI SYLLABLE FAX;Lo;0;L;;;;;N;;;;;
+ A0D3;YI SYLLABLE FA;Lo;0;L;;;;;N;;;;;
+ A0D4;YI SYLLABLE FAP;Lo;0;L;;;;;N;;;;;
+ A0D5;YI SYLLABLE FOX;Lo;0;L;;;;;N;;;;;
+ A0D6;YI SYLLABLE FO;Lo;0;L;;;;;N;;;;;
+ A0D7;YI SYLLABLE FOP;Lo;0;L;;;;;N;;;;;
+ A0D8;YI SYLLABLE FUT;Lo;0;L;;;;;N;;;;;
+ A0D9;YI SYLLABLE FUX;Lo;0;L;;;;;N;;;;;
+ A0DA;YI SYLLABLE FU;Lo;0;L;;;;;N;;;;;
+ A0DB;YI SYLLABLE FUP;Lo;0;L;;;;;N;;;;;
+ A0DC;YI SYLLABLE FURX;Lo;0;L;;;;;N;;;;;
+ A0DD;YI SYLLABLE FUR;Lo;0;L;;;;;N;;;;;
+ A0DE;YI SYLLABLE FYT;Lo;0;L;;;;;N;;;;;
+ A0DF;YI SYLLABLE FYX;Lo;0;L;;;;;N;;;;;
+ A0E0;YI SYLLABLE FY;Lo;0;L;;;;;N;;;;;
+ A0E1;YI SYLLABLE FYP;Lo;0;L;;;;;N;;;;;
+ A0E2;YI SYLLABLE VIT;Lo;0;L;;;;;N;;;;;
+ A0E3;YI SYLLABLE VIX;Lo;0;L;;;;;N;;;;;
+ A0E4;YI SYLLABLE VI;Lo;0;L;;;;;N;;;;;
+ A0E5;YI SYLLABLE VIP;Lo;0;L;;;;;N;;;;;
+ A0E6;YI SYLLABLE VIET;Lo;0;L;;;;;N;;;;;
+ A0E7;YI SYLLABLE VIEX;Lo;0;L;;;;;N;;;;;
+ A0E8;YI SYLLABLE VIE;Lo;0;L;;;;;N;;;;;
+ A0E9;YI SYLLABLE VIEP;Lo;0;L;;;;;N;;;;;
+ A0EA;YI SYLLABLE VAT;Lo;0;L;;;;;N;;;;;
+ A0EB;YI SYLLABLE VAX;Lo;0;L;;;;;N;;;;;
+ A0EC;YI SYLLABLE VA;Lo;0;L;;;;;N;;;;;
+ A0ED;YI SYLLABLE VAP;Lo;0;L;;;;;N;;;;;
+ A0EE;YI SYLLABLE VOT;Lo;0;L;;;;;N;;;;;
+ A0EF;YI SYLLABLE VOX;Lo;0;L;;;;;N;;;;;
+ A0F0;YI SYLLABLE VO;Lo;0;L;;;;;N;;;;;
+ A0F1;YI SYLLABLE VOP;Lo;0;L;;;;;N;;;;;
+ A0F2;YI SYLLABLE VEX;Lo;0;L;;;;;N;;;;;
+ A0F3;YI SYLLABLE VEP;Lo;0;L;;;;;N;;;;;
+ A0F4;YI SYLLABLE VUT;Lo;0;L;;;;;N;;;;;
+ A0F5;YI SYLLABLE VUX;Lo;0;L;;;;;N;;;;;
+ A0F6;YI SYLLABLE VU;Lo;0;L;;;;;N;;;;;
+ A0F7;YI SYLLABLE VUP;Lo;0;L;;;;;N;;;;;
+ A0F8;YI SYLLABLE VURX;Lo;0;L;;;;;N;;;;;
+ A0F9;YI SYLLABLE VUR;Lo;0;L;;;;;N;;;;;
+ A0FA;YI SYLLABLE VYT;Lo;0;L;;;;;N;;;;;
+ A0FB;YI SYLLABLE VYX;Lo;0;L;;;;;N;;;;;
+ A0FC;YI SYLLABLE VY;Lo;0;L;;;;;N;;;;;
+ A0FD;YI SYLLABLE VYP;Lo;0;L;;;;;N;;;;;
+ A0FE;YI SYLLABLE VYRX;Lo;0;L;;;;;N;;;;;
+ A0FF;YI SYLLABLE VYR;Lo;0;L;;;;;N;;;;;
+ A100;YI SYLLABLE DIT;Lo;0;L;;;;;N;;;;;
+ A101;YI SYLLABLE DIX;Lo;0;L;;;;;N;;;;;
+ A102;YI SYLLABLE DI;Lo;0;L;;;;;N;;;;;
+ A103;YI SYLLABLE DIP;Lo;0;L;;;;;N;;;;;
+ A104;YI SYLLABLE DIEX;Lo;0;L;;;;;N;;;;;
+ A105;YI SYLLABLE DIE;Lo;0;L;;;;;N;;;;;
+ A106;YI SYLLABLE DIEP;Lo;0;L;;;;;N;;;;;
+ A107;YI SYLLABLE DAT;Lo;0;L;;;;;N;;;;;
+ A108;YI SYLLABLE DAX;Lo;0;L;;;;;N;;;;;
+ A109;YI SYLLABLE DA;Lo;0;L;;;;;N;;;;;
+ A10A;YI SYLLABLE DAP;Lo;0;L;;;;;N;;;;;
+ A10B;YI SYLLABLE DUOX;Lo;0;L;;;;;N;;;;;
+ A10C;YI SYLLABLE DUO;Lo;0;L;;;;;N;;;;;
+ A10D;YI SYLLABLE DOT;Lo;0;L;;;;;N;;;;;
+ A10E;YI SYLLABLE DOX;Lo;0;L;;;;;N;;;;;
+ A10F;YI SYLLABLE DO;Lo;0;L;;;;;N;;;;;
+ A110;YI SYLLABLE DOP;Lo;0;L;;;;;N;;;;;
+ A111;YI SYLLABLE DEX;Lo;0;L;;;;;N;;;;;
+ A112;YI SYLLABLE DE;Lo;0;L;;;;;N;;;;;
+ A113;YI SYLLABLE DEP;Lo;0;L;;;;;N;;;;;
+ A114;YI SYLLABLE DUT;Lo;0;L;;;;;N;;;;;
+ A115;YI SYLLABLE DUX;Lo;0;L;;;;;N;;;;;
+ A116;YI SYLLABLE DU;Lo;0;L;;;;;N;;;;;
+ A117;YI SYLLABLE DUP;Lo;0;L;;;;;N;;;;;
+ A118;YI SYLLABLE DURX;Lo;0;L;;;;;N;;;;;
+ A119;YI SYLLABLE DUR;Lo;0;L;;;;;N;;;;;
+ A11A;YI SYLLABLE TIT;Lo;0;L;;;;;N;;;;;
+ A11B;YI SYLLABLE TIX;Lo;0;L;;;;;N;;;;;
+ A11C;YI SYLLABLE TI;Lo;0;L;;;;;N;;;;;
+ A11D;YI SYLLABLE TIP;Lo;0;L;;;;;N;;;;;
+ A11E;YI SYLLABLE TIEX;Lo;0;L;;;;;N;;;;;
+ A11F;YI SYLLABLE TIE;Lo;0;L;;;;;N;;;;;
+ A120;YI SYLLABLE TIEP;Lo;0;L;;;;;N;;;;;
+ A121;YI SYLLABLE TAT;Lo;0;L;;;;;N;;;;;
+ A122;YI SYLLABLE TAX;Lo;0;L;;;;;N;;;;;
+ A123;YI SYLLABLE TA;Lo;0;L;;;;;N;;;;;
+ A124;YI SYLLABLE TAP;Lo;0;L;;;;;N;;;;;
+ A125;YI SYLLABLE TUOT;Lo;0;L;;;;;N;;;;;
+ A126;YI SYLLABLE TUOX;Lo;0;L;;;;;N;;;;;
+ A127;YI SYLLABLE TUO;Lo;0;L;;;;;N;;;;;
+ A128;YI SYLLABLE TUOP;Lo;0;L;;;;;N;;;;;
+ A129;YI SYLLABLE TOT;Lo;0;L;;;;;N;;;;;
+ A12A;YI SYLLABLE TOX;Lo;0;L;;;;;N;;;;;
+ A12B;YI SYLLABLE TO;Lo;0;L;;;;;N;;;;;
+ A12C;YI SYLLABLE TOP;Lo;0;L;;;;;N;;;;;
+ A12D;YI SYLLABLE TEX;Lo;0;L;;;;;N;;;;;
+ A12E;YI SYLLABLE TE;Lo;0;L;;;;;N;;;;;
+ A12F;YI SYLLABLE TEP;Lo;0;L;;;;;N;;;;;
+ A130;YI SYLLABLE TUT;Lo;0;L;;;;;N;;;;;
+ A131;YI SYLLABLE TUX;Lo;0;L;;;;;N;;;;;
+ A132;YI SYLLABLE TU;Lo;0;L;;;;;N;;;;;
+ A133;YI SYLLABLE TUP;Lo;0;L;;;;;N;;;;;
+ A134;YI SYLLABLE TURX;Lo;0;L;;;;;N;;;;;
+ A135;YI SYLLABLE TUR;Lo;0;L;;;;;N;;;;;
+ A136;YI SYLLABLE DDIT;Lo;0;L;;;;;N;;;;;
+ A137;YI SYLLABLE DDIX;Lo;0;L;;;;;N;;;;;
+ A138;YI SYLLABLE DDI;Lo;0;L;;;;;N;;;;;
+ A139;YI SYLLABLE DDIP;Lo;0;L;;;;;N;;;;;
+ A13A;YI SYLLABLE DDIEX;Lo;0;L;;;;;N;;;;;
+ A13B;YI SYLLABLE DDIE;Lo;0;L;;;;;N;;;;;
+ A13C;YI SYLLABLE DDIEP;Lo;0;L;;;;;N;;;;;
+ A13D;YI SYLLABLE DDAT;Lo;0;L;;;;;N;;;;;
+ A13E;YI SYLLABLE DDAX;Lo;0;L;;;;;N;;;;;
+ A13F;YI SYLLABLE DDA;Lo;0;L;;;;;N;;;;;
+ A140;YI SYLLABLE DDAP;Lo;0;L;;;;;N;;;;;
+ A141;YI SYLLABLE DDUOX;Lo;0;L;;;;;N;;;;;
+ A142;YI SYLLABLE DDUO;Lo;0;L;;;;;N;;;;;
+ A143;YI SYLLABLE DDUOP;Lo;0;L;;;;;N;;;;;
+ A144;YI SYLLABLE DDOT;Lo;0;L;;;;;N;;;;;
+ A145;YI SYLLABLE DDOX;Lo;0;L;;;;;N;;;;;
+ A146;YI SYLLABLE DDO;Lo;0;L;;;;;N;;;;;
+ A147;YI SYLLABLE DDOP;Lo;0;L;;;;;N;;;;;
+ A148;YI SYLLABLE DDEX;Lo;0;L;;;;;N;;;;;
+ A149;YI SYLLABLE DDE;Lo;0;L;;;;;N;;;;;
+ A14A;YI SYLLABLE DDEP;Lo;0;L;;;;;N;;;;;
+ A14B;YI SYLLABLE DDUT;Lo;0;L;;;;;N;;;;;
+ A14C;YI SYLLABLE DDUX;Lo;0;L;;;;;N;;;;;
+ A14D;YI SYLLABLE DDU;Lo;0;L;;;;;N;;;;;
+ A14E;YI SYLLABLE DDUP;Lo;0;L;;;;;N;;;;;
+ A14F;YI SYLLABLE DDURX;Lo;0;L;;;;;N;;;;;
+ A150;YI SYLLABLE DDUR;Lo;0;L;;;;;N;;;;;
+ A151;YI SYLLABLE NDIT;Lo;0;L;;;;;N;;;;;
+ A152;YI SYLLABLE NDIX;Lo;0;L;;;;;N;;;;;
+ A153;YI SYLLABLE NDI;Lo;0;L;;;;;N;;;;;
+ A154;YI SYLLABLE NDIP;Lo;0;L;;;;;N;;;;;
+ A155;YI SYLLABLE NDIEX;Lo;0;L;;;;;N;;;;;
+ A156;YI SYLLABLE NDIE;Lo;0;L;;;;;N;;;;;
+ A157;YI SYLLABLE NDAT;Lo;0;L;;;;;N;;;;;
+ A158;YI SYLLABLE NDAX;Lo;0;L;;;;;N;;;;;
+ A159;YI SYLLABLE NDA;Lo;0;L;;;;;N;;;;;
+ A15A;YI SYLLABLE NDAP;Lo;0;L;;;;;N;;;;;
+ A15B;YI SYLLABLE NDOT;Lo;0;L;;;;;N;;;;;
+ A15C;YI SYLLABLE NDOX;Lo;0;L;;;;;N;;;;;
+ A15D;YI SYLLABLE NDO;Lo;0;L;;;;;N;;;;;
+ A15E;YI SYLLABLE NDOP;Lo;0;L;;;;;N;;;;;
+ A15F;YI SYLLABLE NDEX;Lo;0;L;;;;;N;;;;;
+ A160;YI SYLLABLE NDE;Lo;0;L;;;;;N;;;;;
+ A161;YI SYLLABLE NDEP;Lo;0;L;;;;;N;;;;;
+ A162;YI SYLLABLE NDUT;Lo;0;L;;;;;N;;;;;
+ A163;YI SYLLABLE NDUX;Lo;0;L;;;;;N;;;;;
+ A164;YI SYLLABLE NDU;Lo;0;L;;;;;N;;;;;
+ A165;YI SYLLABLE NDUP;Lo;0;L;;;;;N;;;;;
+ A166;YI SYLLABLE NDURX;Lo;0;L;;;;;N;;;;;
+ A167;YI SYLLABLE NDUR;Lo;0;L;;;;;N;;;;;
+ A168;YI SYLLABLE HNIT;Lo;0;L;;;;;N;;;;;
+ A169;YI SYLLABLE HNIX;Lo;0;L;;;;;N;;;;;
+ A16A;YI SYLLABLE HNI;Lo;0;L;;;;;N;;;;;
+ A16B;YI SYLLABLE HNIP;Lo;0;L;;;;;N;;;;;
+ A16C;YI SYLLABLE HNIET;Lo;0;L;;;;;N;;;;;
+ A16D;YI SYLLABLE HNIEX;Lo;0;L;;;;;N;;;;;
+ A16E;YI SYLLABLE HNIE;Lo;0;L;;;;;N;;;;;
+ A16F;YI SYLLABLE HNIEP;Lo;0;L;;;;;N;;;;;
+ A170;YI SYLLABLE HNAT;Lo;0;L;;;;;N;;;;;
+ A171;YI SYLLABLE HNAX;Lo;0;L;;;;;N;;;;;
+ A172;YI SYLLABLE HNA;Lo;0;L;;;;;N;;;;;
+ A173;YI SYLLABLE HNAP;Lo;0;L;;;;;N;;;;;
+ A174;YI SYLLABLE HNUOX;Lo;0;L;;;;;N;;;;;
+ A175;YI SYLLABLE HNUO;Lo;0;L;;;;;N;;;;;
+ A176;YI SYLLABLE HNOT;Lo;0;L;;;;;N;;;;;
+ A177;YI SYLLABLE HNOX;Lo;0;L;;;;;N;;;;;
+ A178;YI SYLLABLE HNOP;Lo;0;L;;;;;N;;;;;
+ A179;YI SYLLABLE HNEX;Lo;0;L;;;;;N;;;;;
+ A17A;YI SYLLABLE HNE;Lo;0;L;;;;;N;;;;;
+ A17B;YI SYLLABLE HNEP;Lo;0;L;;;;;N;;;;;
+ A17C;YI SYLLABLE HNUT;Lo;0;L;;;;;N;;;;;
+ A17D;YI SYLLABLE NIT;Lo;0;L;;;;;N;;;;;
+ A17E;YI SYLLABLE NIX;Lo;0;L;;;;;N;;;;;
+ A17F;YI SYLLABLE NI;Lo;0;L;;;;;N;;;;;
+ A180;YI SYLLABLE NIP;Lo;0;L;;;;;N;;;;;
+ A181;YI SYLLABLE NIEX;Lo;0;L;;;;;N;;;;;
+ A182;YI SYLLABLE NIE;Lo;0;L;;;;;N;;;;;
+ A183;YI SYLLABLE NIEP;Lo;0;L;;;;;N;;;;;
+ A184;YI SYLLABLE NAX;Lo;0;L;;;;;N;;;;;
+ A185;YI SYLLABLE NA;Lo;0;L;;;;;N;;;;;
+ A186;YI SYLLABLE NAP;Lo;0;L;;;;;N;;;;;
+ A187;YI SYLLABLE NUOX;Lo;0;L;;;;;N;;;;;
+ A188;YI SYLLABLE NUO;Lo;0;L;;;;;N;;;;;
+ A189;YI SYLLABLE NUOP;Lo;0;L;;;;;N;;;;;
+ A18A;YI SYLLABLE NOT;Lo;0;L;;;;;N;;;;;
+ A18B;YI SYLLABLE NOX;Lo;0;L;;;;;N;;;;;
+ A18C;YI SYLLABLE NO;Lo;0;L;;;;;N;;;;;
+ A18D;YI SYLLABLE NOP;Lo;0;L;;;;;N;;;;;
+ A18E;YI SYLLABLE NEX;Lo;0;L;;;;;N;;;;;
+ A18F;YI SYLLABLE NE;Lo;0;L;;;;;N;;;;;
+ A190;YI SYLLABLE NEP;Lo;0;L;;;;;N;;;;;
+ A191;YI SYLLABLE NUT;Lo;0;L;;;;;N;;;;;
+ A192;YI SYLLABLE NUX;Lo;0;L;;;;;N;;;;;
+ A193;YI SYLLABLE NU;Lo;0;L;;;;;N;;;;;
+ A194;YI SYLLABLE NUP;Lo;0;L;;;;;N;;;;;
+ A195;YI SYLLABLE NURX;Lo;0;L;;;;;N;;;;;
+ A196;YI SYLLABLE NUR;Lo;0;L;;;;;N;;;;;
+ A197;YI SYLLABLE HLIT;Lo;0;L;;;;;N;;;;;
+ A198;YI SYLLABLE HLIX;Lo;0;L;;;;;N;;;;;
+ A199;YI SYLLABLE HLI;Lo;0;L;;;;;N;;;;;
+ A19A;YI SYLLABLE HLIP;Lo;0;L;;;;;N;;;;;
+ A19B;YI SYLLABLE HLIEX;Lo;0;L;;;;;N;;;;;
+ A19C;YI SYLLABLE HLIE;Lo;0;L;;;;;N;;;;;
+ A19D;YI SYLLABLE HLIEP;Lo;0;L;;;;;N;;;;;
+ A19E;YI SYLLABLE HLAT;Lo;0;L;;;;;N;;;;;
+ A19F;YI SYLLABLE HLAX;Lo;0;L;;;;;N;;;;;
+ A1A0;YI SYLLABLE HLA;Lo;0;L;;;;;N;;;;;
+ A1A1;YI SYLLABLE HLAP;Lo;0;L;;;;;N;;;;;
+ A1A2;YI SYLLABLE HLUOX;Lo;0;L;;;;;N;;;;;
+ A1A3;YI SYLLABLE HLUO;Lo;0;L;;;;;N;;;;;
+ A1A4;YI SYLLABLE HLUOP;Lo;0;L;;;;;N;;;;;
+ A1A5;YI SYLLABLE HLOX;Lo;0;L;;;;;N;;;;;
+ A1A6;YI SYLLABLE HLO;Lo;0;L;;;;;N;;;;;
+ A1A7;YI SYLLABLE HLOP;Lo;0;L;;;;;N;;;;;
+ A1A8;YI SYLLABLE HLEX;Lo;0;L;;;;;N;;;;;
+ A1A9;YI SYLLABLE HLE;Lo;0;L;;;;;N;;;;;
+ A1AA;YI SYLLABLE HLEP;Lo;0;L;;;;;N;;;;;
+ A1AB;YI SYLLABLE HLUT;Lo;0;L;;;;;N;;;;;
+ A1AC;YI SYLLABLE HLUX;Lo;0;L;;;;;N;;;;;
+ A1AD;YI SYLLABLE HLU;Lo;0;L;;;;;N;;;;;
+ A1AE;YI SYLLABLE HLUP;Lo;0;L;;;;;N;;;;;
+ A1AF;YI SYLLABLE HLURX;Lo;0;L;;;;;N;;;;;
+ A1B0;YI SYLLABLE HLUR;Lo;0;L;;;;;N;;;;;
+ A1B1;YI SYLLABLE HLYT;Lo;0;L;;;;;N;;;;;
+ A1B2;YI SYLLABLE HLYX;Lo;0;L;;;;;N;;;;;
+ A1B3;YI SYLLABLE HLY;Lo;0;L;;;;;N;;;;;
+ A1B4;YI SYLLABLE HLYP;Lo;0;L;;;;;N;;;;;
+ A1B5;YI SYLLABLE HLYRX;Lo;0;L;;;;;N;;;;;
+ A1B6;YI SYLLABLE HLYR;Lo;0;L;;;;;N;;;;;
+ A1B7;YI SYLLABLE LIT;Lo;0;L;;;;;N;;;;;
+ A1B8;YI SYLLABLE LIX;Lo;0;L;;;;;N;;;;;
+ A1B9;YI SYLLABLE LI;Lo;0;L;;;;;N;;;;;
+ A1BA;YI SYLLABLE LIP;Lo;0;L;;;;;N;;;;;
+ A1BB;YI SYLLABLE LIET;Lo;0;L;;;;;N;;;;;
+ A1BC;YI SYLLABLE LIEX;Lo;0;L;;;;;N;;;;;
+ A1BD;YI SYLLABLE LIE;Lo;0;L;;;;;N;;;;;
+ A1BE;YI SYLLABLE LIEP;Lo;0;L;;;;;N;;;;;
+ A1BF;YI SYLLABLE LAT;Lo;0;L;;;;;N;;;;;
+ A1C0;YI SYLLABLE LAX;Lo;0;L;;;;;N;;;;;
+ A1C1;YI SYLLABLE LA;Lo;0;L;;;;;N;;;;;
+ A1C2;YI SYLLABLE LAP;Lo;0;L;;;;;N;;;;;
+ A1C3;YI SYLLABLE LUOT;Lo;0;L;;;;;N;;;;;
+ A1C4;YI SYLLABLE LUOX;Lo;0;L;;;;;N;;;;;
+ A1C5;YI SYLLABLE LUO;Lo;0;L;;;;;N;;;;;
+ A1C6;YI SYLLABLE LUOP;Lo;0;L;;;;;N;;;;;
+ A1C7;YI SYLLABLE LOT;Lo;0;L;;;;;N;;;;;
+ A1C8;YI SYLLABLE LOX;Lo;0;L;;;;;N;;;;;
+ A1C9;YI SYLLABLE LO;Lo;0;L;;;;;N;;;;;
+ A1CA;YI SYLLABLE LOP;Lo;0;L;;;;;N;;;;;
+ A1CB;YI SYLLABLE LEX;Lo;0;L;;;;;N;;;;;
+ A1CC;YI SYLLABLE LE;Lo;0;L;;;;;N;;;;;
+ A1CD;YI SYLLABLE LEP;Lo;0;L;;;;;N;;;;;
+ A1CE;YI SYLLABLE LUT;Lo;0;L;;;;;N;;;;;
+ A1CF;YI SYLLABLE LUX;Lo;0;L;;;;;N;;;;;
+ A1D0;YI SYLLABLE LU;Lo;0;L;;;;;N;;;;;
+ A1D1;YI SYLLABLE LUP;Lo;0;L;;;;;N;;;;;
+ A1D2;YI SYLLABLE LURX;Lo;0;L;;;;;N;;;;;
+ A1D3;YI SYLLABLE LUR;Lo;0;L;;;;;N;;;;;
+ A1D4;YI SYLLABLE LYT;Lo;0;L;;;;;N;;;;;
+ A1D5;YI SYLLABLE LYX;Lo;0;L;;;;;N;;;;;
+ A1D6;YI SYLLABLE LY;Lo;0;L;;;;;N;;;;;
+ A1D7;YI SYLLABLE LYP;Lo;0;L;;;;;N;;;;;
+ A1D8;YI SYLLABLE LYRX;Lo;0;L;;;;;N;;;;;
+ A1D9;YI SYLLABLE LYR;Lo;0;L;;;;;N;;;;;
+ A1DA;YI SYLLABLE GIT;Lo;0;L;;;;;N;;;;;
+ A1DB;YI SYLLABLE GIX;Lo;0;L;;;;;N;;;;;
+ A1DC;YI SYLLABLE GI;Lo;0;L;;;;;N;;;;;
+ A1DD;YI SYLLABLE GIP;Lo;0;L;;;;;N;;;;;
+ A1DE;YI SYLLABLE GIET;Lo;0;L;;;;;N;;;;;
+ A1DF;YI SYLLABLE GIEX;Lo;0;L;;;;;N;;;;;
+ A1E0;YI SYLLABLE GIE;Lo;0;L;;;;;N;;;;;
+ A1E1;YI SYLLABLE GIEP;Lo;0;L;;;;;N;;;;;
+ A1E2;YI SYLLABLE GAT;Lo;0;L;;;;;N;;;;;
+ A1E3;YI SYLLABLE GAX;Lo;0;L;;;;;N;;;;;
+ A1E4;YI SYLLABLE GA;Lo;0;L;;;;;N;;;;;
+ A1E5;YI SYLLABLE GAP;Lo;0;L;;;;;N;;;;;
+ A1E6;YI SYLLABLE GUOT;Lo;0;L;;;;;N;;;;;
+ A1E7;YI SYLLABLE GUOX;Lo;0;L;;;;;N;;;;;
+ A1E8;YI SYLLABLE GUO;Lo;0;L;;;;;N;;;;;
+ A1E9;YI SYLLABLE GUOP;Lo;0;L;;;;;N;;;;;
+ A1EA;YI SYLLABLE GOT;Lo;0;L;;;;;N;;;;;
+ A1EB;YI SYLLABLE GOX;Lo;0;L;;;;;N;;;;;
+ A1EC;YI SYLLABLE GO;Lo;0;L;;;;;N;;;;;
+ A1ED;YI SYLLABLE GOP;Lo;0;L;;;;;N;;;;;
+ A1EE;YI SYLLABLE GET;Lo;0;L;;;;;N;;;;;
+ A1EF;YI SYLLABLE GEX;Lo;0;L;;;;;N;;;;;
+ A1F0;YI SYLLABLE GE;Lo;0;L;;;;;N;;;;;
+ A1F1;YI SYLLABLE GEP;Lo;0;L;;;;;N;;;;;
+ A1F2;YI SYLLABLE GUT;Lo;0;L;;;;;N;;;;;
+ A1F3;YI SYLLABLE GUX;Lo;0;L;;;;;N;;;;;
+ A1F4;YI SYLLABLE GU;Lo;0;L;;;;;N;;;;;
+ A1F5;YI SYLLABLE GUP;Lo;0;L;;;;;N;;;;;
+ A1F6;YI SYLLABLE GURX;Lo;0;L;;;;;N;;;;;
+ A1F7;YI SYLLABLE GUR;Lo;0;L;;;;;N;;;;;
+ A1F8;YI SYLLABLE KIT;Lo;0;L;;;;;N;;;;;
+ A1F9;YI SYLLABLE KIX;Lo;0;L;;;;;N;;;;;
+ A1FA;YI SYLLABLE KI;Lo;0;L;;;;;N;;;;;
+ A1FB;YI SYLLABLE KIP;Lo;0;L;;;;;N;;;;;
+ A1FC;YI SYLLABLE KIEX;Lo;0;L;;;;;N;;;;;
+ A1FD;YI SYLLABLE KIE;Lo;0;L;;;;;N;;;;;
+ A1FE;YI SYLLABLE KIEP;Lo;0;L;;;;;N;;;;;
+ A1FF;YI SYLLABLE KAT;Lo;0;L;;;;;N;;;;;
+ A200;YI SYLLABLE KAX;Lo;0;L;;;;;N;;;;;
+ A201;YI SYLLABLE KA;Lo;0;L;;;;;N;;;;;
+ A202;YI SYLLABLE KAP;Lo;0;L;;;;;N;;;;;
+ A203;YI SYLLABLE KUOX;Lo;0;L;;;;;N;;;;;
+ A204;YI SYLLABLE KUO;Lo;0;L;;;;;N;;;;;
+ A205;YI SYLLABLE KUOP;Lo;0;L;;;;;N;;;;;
+ A206;YI SYLLABLE KOT;Lo;0;L;;;;;N;;;;;
+ A207;YI SYLLABLE KOX;Lo;0;L;;;;;N;;;;;
+ A208;YI SYLLABLE KO;Lo;0;L;;;;;N;;;;;
+ A209;YI SYLLABLE KOP;Lo;0;L;;;;;N;;;;;
+ A20A;YI SYLLABLE KET;Lo;0;L;;;;;N;;;;;
+ A20B;YI SYLLABLE KEX;Lo;0;L;;;;;N;;;;;
+ A20C;YI SYLLABLE KE;Lo;0;L;;;;;N;;;;;
+ A20D;YI SYLLABLE KEP;Lo;0;L;;;;;N;;;;;
+ A20E;YI SYLLABLE KUT;Lo;0;L;;;;;N;;;;;
+ A20F;YI SYLLABLE KUX;Lo;0;L;;;;;N;;;;;
+ A210;YI SYLLABLE KU;Lo;0;L;;;;;N;;;;;
+ A211;YI SYLLABLE KUP;Lo;0;L;;;;;N;;;;;
+ A212;YI SYLLABLE KURX;Lo;0;L;;;;;N;;;;;
+ A213;YI SYLLABLE KUR;Lo;0;L;;;;;N;;;;;
+ A214;YI SYLLABLE GGIT;Lo;0;L;;;;;N;;;;;
+ A215;YI SYLLABLE GGIX;Lo;0;L;;;;;N;;;;;
+ A216;YI SYLLABLE GGI;Lo;0;L;;;;;N;;;;;
+ A217;YI SYLLABLE GGIEX;Lo;0;L;;;;;N;;;;;
+ A218;YI SYLLABLE GGIE;Lo;0;L;;;;;N;;;;;
+ A219;YI SYLLABLE GGIEP;Lo;0;L;;;;;N;;;;;
+ A21A;YI SYLLABLE GGAT;Lo;0;L;;;;;N;;;;;
+ A21B;YI SYLLABLE GGAX;Lo;0;L;;;;;N;;;;;
+ A21C;YI SYLLABLE GGA;Lo;0;L;;;;;N;;;;;
+ A21D;YI SYLLABLE GGAP;Lo;0;L;;;;;N;;;;;
+ A21E;YI SYLLABLE GGUOT;Lo;0;L;;;;;N;;;;;
+ A21F;YI SYLLABLE GGUOX;Lo;0;L;;;;;N;;;;;
+ A220;YI SYLLABLE GGUO;Lo;0;L;;;;;N;;;;;
+ A221;YI SYLLABLE GGUOP;Lo;0;L;;;;;N;;;;;
+ A222;YI SYLLABLE GGOT;Lo;0;L;;;;;N;;;;;
+ A223;YI SYLLABLE GGOX;Lo;0;L;;;;;N;;;;;
+ A224;YI SYLLABLE GGO;Lo;0;L;;;;;N;;;;;
+ A225;YI SYLLABLE GGOP;Lo;0;L;;;;;N;;;;;
+ A226;YI SYLLABLE GGET;Lo;0;L;;;;;N;;;;;
+ A227;YI SYLLABLE GGEX;Lo;0;L;;;;;N;;;;;
+ A228;YI SYLLABLE GGE;Lo;0;L;;;;;N;;;;;
+ A229;YI SYLLABLE GGEP;Lo;0;L;;;;;N;;;;;
+ A22A;YI SYLLABLE GGUT;Lo;0;L;;;;;N;;;;;
+ A22B;YI SYLLABLE GGUX;Lo;0;L;;;;;N;;;;;
+ A22C;YI SYLLABLE GGU;Lo;0;L;;;;;N;;;;;
+ A22D;YI SYLLABLE GGUP;Lo;0;L;;;;;N;;;;;
+ A22E;YI SYLLABLE GGURX;Lo;0;L;;;;;N;;;;;
+ A22F;YI SYLLABLE GGUR;Lo;0;L;;;;;N;;;;;
+ A230;YI SYLLABLE MGIEX;Lo;0;L;;;;;N;;;;;
+ A231;YI SYLLABLE MGIE;Lo;0;L;;;;;N;;;;;
+ A232;YI SYLLABLE MGAT;Lo;0;L;;;;;N;;;;;
+ A233;YI SYLLABLE MGAX;Lo;0;L;;;;;N;;;;;
+ A234;YI SYLLABLE MGA;Lo;0;L;;;;;N;;;;;
+ A235;YI SYLLABLE MGAP;Lo;0;L;;;;;N;;;;;
+ A236;YI SYLLABLE MGUOX;Lo;0;L;;;;;N;;;;;
+ A237;YI SYLLABLE MGUO;Lo;0;L;;;;;N;;;;;
+ A238;YI SYLLABLE MGUOP;Lo;0;L;;;;;N;;;;;
+ A239;YI SYLLABLE MGOT;Lo;0;L;;;;;N;;;;;
+ A23A;YI SYLLABLE MGOX;Lo;0;L;;;;;N;;;;;
+ A23B;YI SYLLABLE MGO;Lo;0;L;;;;;N;;;;;
+ A23C;YI SYLLABLE MGOP;Lo;0;L;;;;;N;;;;;
+ A23D;YI SYLLABLE MGEX;Lo;0;L;;;;;N;;;;;
+ A23E;YI SYLLABLE MGE;Lo;0;L;;;;;N;;;;;
+ A23F;YI SYLLABLE MGEP;Lo;0;L;;;;;N;;;;;
+ A240;YI SYLLABLE MGUT;Lo;0;L;;;;;N;;;;;
+ A241;YI SYLLABLE MGUX;Lo;0;L;;;;;N;;;;;
+ A242;YI SYLLABLE MGU;Lo;0;L;;;;;N;;;;;
+ A243;YI SYLLABLE MGUP;Lo;0;L;;;;;N;;;;;
+ A244;YI SYLLABLE MGURX;Lo;0;L;;;;;N;;;;;
+ A245;YI SYLLABLE MGUR;Lo;0;L;;;;;N;;;;;
+ A246;YI SYLLABLE HXIT;Lo;0;L;;;;;N;;;;;
+ A247;YI SYLLABLE HXIX;Lo;0;L;;;;;N;;;;;
+ A248;YI SYLLABLE HXI;Lo;0;L;;;;;N;;;;;
+ A249;YI SYLLABLE HXIP;Lo;0;L;;;;;N;;;;;
+ A24A;YI SYLLABLE HXIET;Lo;0;L;;;;;N;;;;;
+ A24B;YI SYLLABLE HXIEX;Lo;0;L;;;;;N;;;;;
+ A24C;YI SYLLABLE HXIE;Lo;0;L;;;;;N;;;;;
+ A24D;YI SYLLABLE HXIEP;Lo;0;L;;;;;N;;;;;
+ A24E;YI SYLLABLE HXAT;Lo;0;L;;;;;N;;;;;
+ A24F;YI SYLLABLE HXAX;Lo;0;L;;;;;N;;;;;
+ A250;YI SYLLABLE HXA;Lo;0;L;;;;;N;;;;;
+ A251;YI SYLLABLE HXAP;Lo;0;L;;;;;N;;;;;
+ A252;YI SYLLABLE HXUOT;Lo;0;L;;;;;N;;;;;
+ A253;YI SYLLABLE HXUOX;Lo;0;L;;;;;N;;;;;
+ A254;YI SYLLABLE HXUO;Lo;0;L;;;;;N;;;;;
+ A255;YI SYLLABLE HXUOP;Lo;0;L;;;;;N;;;;;
+ A256;YI SYLLABLE HXOT;Lo;0;L;;;;;N;;;;;
+ A257;YI SYLLABLE HXOX;Lo;0;L;;;;;N;;;;;
+ A258;YI SYLLABLE HXO;Lo;0;L;;;;;N;;;;;
+ A259;YI SYLLABLE HXOP;Lo;0;L;;;;;N;;;;;
+ A25A;YI SYLLABLE HXEX;Lo;0;L;;;;;N;;;;;
+ A25B;YI SYLLABLE HXE;Lo;0;L;;;;;N;;;;;
+ A25C;YI SYLLABLE HXEP;Lo;0;L;;;;;N;;;;;
+ A25D;YI SYLLABLE NGIEX;Lo;0;L;;;;;N;;;;;
+ A25E;YI SYLLABLE NGIE;Lo;0;L;;;;;N;;;;;
+ A25F;YI SYLLABLE NGIEP;Lo;0;L;;;;;N;;;;;
+ A260;YI SYLLABLE NGAT;Lo;0;L;;;;;N;;;;;
+ A261;YI SYLLABLE NGAX;Lo;0;L;;;;;N;;;;;
+ A262;YI SYLLABLE NGA;Lo;0;L;;;;;N;;;;;
+ A263;YI SYLLABLE NGAP;Lo;0;L;;;;;N;;;;;
+ A264;YI SYLLABLE NGUOT;Lo;0;L;;;;;N;;;;;
+ A265;YI SYLLABLE NGUOX;Lo;0;L;;;;;N;;;;;
+ A266;YI SYLLABLE NGUO;Lo;0;L;;;;;N;;;;;
+ A267;YI SYLLABLE NGOT;Lo;0;L;;;;;N;;;;;
+ A268;YI SYLLABLE NGOX;Lo;0;L;;;;;N;;;;;
+ A269;YI SYLLABLE NGO;Lo;0;L;;;;;N;;;;;
+ A26A;YI SYLLABLE NGOP;Lo;0;L;;;;;N;;;;;
+ A26B;YI SYLLABLE NGEX;Lo;0;L;;;;;N;;;;;
+ A26C;YI SYLLABLE NGE;Lo;0;L;;;;;N;;;;;
+ A26D;YI SYLLABLE NGEP;Lo;0;L;;;;;N;;;;;
+ A26E;YI SYLLABLE HIT;Lo;0;L;;;;;N;;;;;
+ A26F;YI SYLLABLE HIEX;Lo;0;L;;;;;N;;;;;
+ A270;YI SYLLABLE HIE;Lo;0;L;;;;;N;;;;;
+ A271;YI SYLLABLE HAT;Lo;0;L;;;;;N;;;;;
+ A272;YI SYLLABLE HAX;Lo;0;L;;;;;N;;;;;
+ A273;YI SYLLABLE HA;Lo;0;L;;;;;N;;;;;
+ A274;YI SYLLABLE HAP;Lo;0;L;;;;;N;;;;;
+ A275;YI SYLLABLE HUOT;Lo;0;L;;;;;N;;;;;
+ A276;YI SYLLABLE HUOX;Lo;0;L;;;;;N;;;;;
+ A277;YI SYLLABLE HUO;Lo;0;L;;;;;N;;;;;
+ A278;YI SYLLABLE HUOP;Lo;0;L;;;;;N;;;;;
+ A279;YI SYLLABLE HOT;Lo;0;L;;;;;N;;;;;
+ A27A;YI SYLLABLE HOX;Lo;0;L;;;;;N;;;;;
+ A27B;YI SYLLABLE HO;Lo;0;L;;;;;N;;;;;
+ A27C;YI SYLLABLE HOP;Lo;0;L;;;;;N;;;;;
+ A27D;YI SYLLABLE HEX;Lo;0;L;;;;;N;;;;;
+ A27E;YI SYLLABLE HE;Lo;0;L;;;;;N;;;;;
+ A27F;YI SYLLABLE HEP;Lo;0;L;;;;;N;;;;;
+ A280;YI SYLLABLE WAT;Lo;0;L;;;;;N;;;;;
+ A281;YI SYLLABLE WAX;Lo;0;L;;;;;N;;;;;
+ A282;YI SYLLABLE WA;Lo;0;L;;;;;N;;;;;
+ A283;YI SYLLABLE WAP;Lo;0;L;;;;;N;;;;;
+ A284;YI SYLLABLE WUOX;Lo;0;L;;;;;N;;;;;
+ A285;YI SYLLABLE WUO;Lo;0;L;;;;;N;;;;;
+ A286;YI SYLLABLE WUOP;Lo;0;L;;;;;N;;;;;
+ A287;YI SYLLABLE WOX;Lo;0;L;;;;;N;;;;;
+ A288;YI SYLLABLE WO;Lo;0;L;;;;;N;;;;;
+ A289;YI SYLLABLE WOP;Lo;0;L;;;;;N;;;;;
+ A28A;YI SYLLABLE WEX;Lo;0;L;;;;;N;;;;;
+ A28B;YI SYLLABLE WE;Lo;0;L;;;;;N;;;;;
+ A28C;YI SYLLABLE WEP;Lo;0;L;;;;;N;;;;;
+ A28D;YI SYLLABLE ZIT;Lo;0;L;;;;;N;;;;;
+ A28E;YI SYLLABLE ZIX;Lo;0;L;;;;;N;;;;;
+ A28F;YI SYLLABLE ZI;Lo;0;L;;;;;N;;;;;
+ A290;YI SYLLABLE ZIP;Lo;0;L;;;;;N;;;;;
+ A291;YI SYLLABLE ZIEX;Lo;0;L;;;;;N;;;;;
+ A292;YI SYLLABLE ZIE;Lo;0;L;;;;;N;;;;;
+ A293;YI SYLLABLE ZIEP;Lo;0;L;;;;;N;;;;;
+ A294;YI SYLLABLE ZAT;Lo;0;L;;;;;N;;;;;
+ A295;YI SYLLABLE ZAX;Lo;0;L;;;;;N;;;;;
+ A296;YI SYLLABLE ZA;Lo;0;L;;;;;N;;;;;
+ A297;YI SYLLABLE ZAP;Lo;0;L;;;;;N;;;;;
+ A298;YI SYLLABLE ZUOX;Lo;0;L;;;;;N;;;;;
+ A299;YI SYLLABLE ZUO;Lo;0;L;;;;;N;;;;;
+ A29A;YI SYLLABLE ZUOP;Lo;0;L;;;;;N;;;;;
+ A29B;YI SYLLABLE ZOT;Lo;0;L;;;;;N;;;;;
+ A29C;YI SYLLABLE ZOX;Lo;0;L;;;;;N;;;;;
+ A29D;YI SYLLABLE ZO;Lo;0;L;;;;;N;;;;;
+ A29E;YI SYLLABLE ZOP;Lo;0;L;;;;;N;;;;;
+ A29F;YI SYLLABLE ZEX;Lo;0;L;;;;;N;;;;;
+ A2A0;YI SYLLABLE ZE;Lo;0;L;;;;;N;;;;;
+ A2A1;YI SYLLABLE ZEP;Lo;0;L;;;;;N;;;;;
+ A2A2;YI SYLLABLE ZUT;Lo;0;L;;;;;N;;;;;
+ A2A3;YI SYLLABLE ZUX;Lo;0;L;;;;;N;;;;;
+ A2A4;YI SYLLABLE ZU;Lo;0;L;;;;;N;;;;;
+ A2A5;YI SYLLABLE ZUP;Lo;0;L;;;;;N;;;;;
+ A2A6;YI SYLLABLE ZURX;Lo;0;L;;;;;N;;;;;
+ A2A7;YI SYLLABLE ZUR;Lo;0;L;;;;;N;;;;;
+ A2A8;YI SYLLABLE ZYT;Lo;0;L;;;;;N;;;;;
+ A2A9;YI SYLLABLE ZYX;Lo;0;L;;;;;N;;;;;
+ A2AA;YI SYLLABLE ZY;Lo;0;L;;;;;N;;;;;
+ A2AB;YI SYLLABLE ZYP;Lo;0;L;;;;;N;;;;;
+ A2AC;YI SYLLABLE ZYRX;Lo;0;L;;;;;N;;;;;
+ A2AD;YI SYLLABLE ZYR;Lo;0;L;;;;;N;;;;;
+ A2AE;YI SYLLABLE CIT;Lo;0;L;;;;;N;;;;;
+ A2AF;YI SYLLABLE CIX;Lo;0;L;;;;;N;;;;;
+ A2B0;YI SYLLABLE CI;Lo;0;L;;;;;N;;;;;
+ A2B1;YI SYLLABLE CIP;Lo;0;L;;;;;N;;;;;
+ A2B2;YI SYLLABLE CIET;Lo;0;L;;;;;N;;;;;
+ A2B3;YI SYLLABLE CIEX;Lo;0;L;;;;;N;;;;;
+ A2B4;YI SYLLABLE CIE;Lo;0;L;;;;;N;;;;;
+ A2B5;YI SYLLABLE CIEP;Lo;0;L;;;;;N;;;;;
+ A2B6;YI SYLLABLE CAT;Lo;0;L;;;;;N;;;;;
+ A2B7;YI SYLLABLE CAX;Lo;0;L;;;;;N;;;;;
+ A2B8;YI SYLLABLE CA;Lo;0;L;;;;;N;;;;;
+ A2B9;YI SYLLABLE CAP;Lo;0;L;;;;;N;;;;;
+ A2BA;YI SYLLABLE CUOX;Lo;0;L;;;;;N;;;;;
+ A2BB;YI SYLLABLE CUO;Lo;0;L;;;;;N;;;;;
+ A2BC;YI SYLLABLE CUOP;Lo;0;L;;;;;N;;;;;
+ A2BD;YI SYLLABLE COT;Lo;0;L;;;;;N;;;;;
+ A2BE;YI SYLLABLE COX;Lo;0;L;;;;;N;;;;;
+ A2BF;YI SYLLABLE CO;Lo;0;L;;;;;N;;;;;
+ A2C0;YI SYLLABLE COP;Lo;0;L;;;;;N;;;;;
+ A2C1;YI SYLLABLE CEX;Lo;0;L;;;;;N;;;;;
+ A2C2;YI SYLLABLE CE;Lo;0;L;;;;;N;;;;;
+ A2C3;YI SYLLABLE CEP;Lo;0;L;;;;;N;;;;;
+ A2C4;YI SYLLABLE CUT;Lo;0;L;;;;;N;;;;;
+ A2C5;YI SYLLABLE CUX;Lo;0;L;;;;;N;;;;;
+ A2C6;YI SYLLABLE CU;Lo;0;L;;;;;N;;;;;
+ A2C7;YI SYLLABLE CUP;Lo;0;L;;;;;N;;;;;
+ A2C8;YI SYLLABLE CURX;Lo;0;L;;;;;N;;;;;
+ A2C9;YI SYLLABLE CUR;Lo;0;L;;;;;N;;;;;
+ A2CA;YI SYLLABLE CYT;Lo;0;L;;;;;N;;;;;
+ A2CB;YI SYLLABLE CYX;Lo;0;L;;;;;N;;;;;
+ A2CC;YI SYLLABLE CY;Lo;0;L;;;;;N;;;;;
+ A2CD;YI SYLLABLE CYP;Lo;0;L;;;;;N;;;;;
+ A2CE;YI SYLLABLE CYRX;Lo;0;L;;;;;N;;;;;
+ A2CF;YI SYLLABLE CYR;Lo;0;L;;;;;N;;;;;
+ A2D0;YI SYLLABLE ZZIT;Lo;0;L;;;;;N;;;;;
+ A2D1;YI SYLLABLE ZZIX;Lo;0;L;;;;;N;;;;;
+ A2D2;YI SYLLABLE ZZI;Lo;0;L;;;;;N;;;;;
+ A2D3;YI SYLLABLE ZZIP;Lo;0;L;;;;;N;;;;;
+ A2D4;YI SYLLABLE ZZIET;Lo;0;L;;;;;N;;;;;
+ A2D5;YI SYLLABLE ZZIEX;Lo;0;L;;;;;N;;;;;
+ A2D6;YI SYLLABLE ZZIE;Lo;0;L;;;;;N;;;;;
+ A2D7;YI SYLLABLE ZZIEP;Lo;0;L;;;;;N;;;;;
+ A2D8;YI SYLLABLE ZZAT;Lo;0;L;;;;;N;;;;;
+ A2D9;YI SYLLABLE ZZAX;Lo;0;L;;;;;N;;;;;
+ A2DA;YI SYLLABLE ZZA;Lo;0;L;;;;;N;;;;;
+ A2DB;YI SYLLABLE ZZAP;Lo;0;L;;;;;N;;;;;
+ A2DC;YI SYLLABLE ZZOX;Lo;0;L;;;;;N;;;;;
+ A2DD;YI SYLLABLE ZZO;Lo;0;L;;;;;N;;;;;
+ A2DE;YI SYLLABLE ZZOP;Lo;0;L;;;;;N;;;;;
+ A2DF;YI SYLLABLE ZZEX;Lo;0;L;;;;;N;;;;;
+ A2E0;YI SYLLABLE ZZE;Lo;0;L;;;;;N;;;;;
+ A2E1;YI SYLLABLE ZZEP;Lo;0;L;;;;;N;;;;;
+ A2E2;YI SYLLABLE ZZUX;Lo;0;L;;;;;N;;;;;
+ A2E3;YI SYLLABLE ZZU;Lo;0;L;;;;;N;;;;;
+ A2E4;YI SYLLABLE ZZUP;Lo;0;L;;;;;N;;;;;
+ A2E5;YI SYLLABLE ZZURX;Lo;0;L;;;;;N;;;;;
+ A2E6;YI SYLLABLE ZZUR;Lo;0;L;;;;;N;;;;;
+ A2E7;YI SYLLABLE ZZYT;Lo;0;L;;;;;N;;;;;
+ A2E8;YI SYLLABLE ZZYX;Lo;0;L;;;;;N;;;;;
+ A2E9;YI SYLLABLE ZZY;Lo;0;L;;;;;N;;;;;
+ A2EA;YI SYLLABLE ZZYP;Lo;0;L;;;;;N;;;;;
+ A2EB;YI SYLLABLE ZZYRX;Lo;0;L;;;;;N;;;;;
+ A2EC;YI SYLLABLE ZZYR;Lo;0;L;;;;;N;;;;;
+ A2ED;YI SYLLABLE NZIT;Lo;0;L;;;;;N;;;;;
+ A2EE;YI SYLLABLE NZIX;Lo;0;L;;;;;N;;;;;
+ A2EF;YI SYLLABLE NZI;Lo;0;L;;;;;N;;;;;
+ A2F0;YI SYLLABLE NZIP;Lo;0;L;;;;;N;;;;;
+ A2F1;YI SYLLABLE NZIEX;Lo;0;L;;;;;N;;;;;
+ A2F2;YI SYLLABLE NZIE;Lo;0;L;;;;;N;;;;;
+ A2F3;YI SYLLABLE NZIEP;Lo;0;L;;;;;N;;;;;
+ A2F4;YI SYLLABLE NZAT;Lo;0;L;;;;;N;;;;;
+ A2F5;YI SYLLABLE NZAX;Lo;0;L;;;;;N;;;;;
+ A2F6;YI SYLLABLE NZA;Lo;0;L;;;;;N;;;;;
+ A2F7;YI SYLLABLE NZAP;Lo;0;L;;;;;N;;;;;
+ A2F8;YI SYLLABLE NZUOX;Lo;0;L;;;;;N;;;;;
+ A2F9;YI SYLLABLE NZUO;Lo;0;L;;;;;N;;;;;
+ A2FA;YI SYLLABLE NZOX;Lo;0;L;;;;;N;;;;;
+ A2FB;YI SYLLABLE NZOP;Lo;0;L;;;;;N;;;;;
+ A2FC;YI SYLLABLE NZEX;Lo;0;L;;;;;N;;;;;
+ A2FD;YI SYLLABLE NZE;Lo;0;L;;;;;N;;;;;
+ A2FE;YI SYLLABLE NZUX;Lo;0;L;;;;;N;;;;;
+ A2FF;YI SYLLABLE NZU;Lo;0;L;;;;;N;;;;;
+ A300;YI SYLLABLE NZUP;Lo;0;L;;;;;N;;;;;
+ A301;YI SYLLABLE NZURX;Lo;0;L;;;;;N;;;;;
+ A302;YI SYLLABLE NZUR;Lo;0;L;;;;;N;;;;;
+ A303;YI SYLLABLE NZYT;Lo;0;L;;;;;N;;;;;
+ A304;YI SYLLABLE NZYX;Lo;0;L;;;;;N;;;;;
+ A305;YI SYLLABLE NZY;Lo;0;L;;;;;N;;;;;
+ A306;YI SYLLABLE NZYP;Lo;0;L;;;;;N;;;;;
+ A307;YI SYLLABLE NZYRX;Lo;0;L;;;;;N;;;;;
+ A308;YI SYLLABLE NZYR;Lo;0;L;;;;;N;;;;;
+ A309;YI SYLLABLE SIT;Lo;0;L;;;;;N;;;;;
+ A30A;YI SYLLABLE SIX;Lo;0;L;;;;;N;;;;;
+ A30B;YI SYLLABLE SI;Lo;0;L;;;;;N;;;;;
+ A30C;YI SYLLABLE SIP;Lo;0;L;;;;;N;;;;;
+ A30D;YI SYLLABLE SIEX;Lo;0;L;;;;;N;;;;;
+ A30E;YI SYLLABLE SIE;Lo;0;L;;;;;N;;;;;
+ A30F;YI SYLLABLE SIEP;Lo;0;L;;;;;N;;;;;
+ A310;YI SYLLABLE SAT;Lo;0;L;;;;;N;;;;;
+ A311;YI SYLLABLE SAX;Lo;0;L;;;;;N;;;;;
+ A312;YI SYLLABLE SA;Lo;0;L;;;;;N;;;;;
+ A313;YI SYLLABLE SAP;Lo;0;L;;;;;N;;;;;
+ A314;YI SYLLABLE SUOX;Lo;0;L;;;;;N;;;;;
+ A315;YI SYLLABLE SUO;Lo;0;L;;;;;N;;;;;
+ A316;YI SYLLABLE SUOP;Lo;0;L;;;;;N;;;;;
+ A317;YI SYLLABLE SOT;Lo;0;L;;;;;N;;;;;
+ A318;YI SYLLABLE SOX;Lo;0;L;;;;;N;;;;;
+ A319;YI SYLLABLE SO;Lo;0;L;;;;;N;;;;;
+ A31A;YI SYLLABLE SOP;Lo;0;L;;;;;N;;;;;
+ A31B;YI SYLLABLE SEX;Lo;0;L;;;;;N;;;;;
+ A31C;YI SYLLABLE SE;Lo;0;L;;;;;N;;;;;
+ A31D;YI SYLLABLE SEP;Lo;0;L;;;;;N;;;;;
+ A31E;YI SYLLABLE SUT;Lo;0;L;;;;;N;;;;;
+ A31F;YI SYLLABLE SUX;Lo;0;L;;;;;N;;;;;
+ A320;YI SYLLABLE SU;Lo;0;L;;;;;N;;;;;
+ A321;YI SYLLABLE SUP;Lo;0;L;;;;;N;;;;;
+ A322;YI SYLLABLE SURX;Lo;0;L;;;;;N;;;;;
+ A323;YI SYLLABLE SUR;Lo;0;L;;;;;N;;;;;
+ A324;YI SYLLABLE SYT;Lo;0;L;;;;;N;;;;;
+ A325;YI SYLLABLE SYX;Lo;0;L;;;;;N;;;;;
+ A326;YI SYLLABLE SY;Lo;0;L;;;;;N;;;;;
+ A327;YI SYLLABLE SYP;Lo;0;L;;;;;N;;;;;
+ A328;YI SYLLABLE SYRX;Lo;0;L;;;;;N;;;;;
+ A329;YI SYLLABLE SYR;Lo;0;L;;;;;N;;;;;
+ A32A;YI SYLLABLE SSIT;Lo;0;L;;;;;N;;;;;
+ A32B;YI SYLLABLE SSIX;Lo;0;L;;;;;N;;;;;
+ A32C;YI SYLLABLE SSI;Lo;0;L;;;;;N;;;;;
+ A32D;YI SYLLABLE SSIP;Lo;0;L;;;;;N;;;;;
+ A32E;YI SYLLABLE SSIEX;Lo;0;L;;;;;N;;;;;
+ A32F;YI SYLLABLE SSIE;Lo;0;L;;;;;N;;;;;
+ A330;YI SYLLABLE SSIEP;Lo;0;L;;;;;N;;;;;
+ A331;YI SYLLABLE SSAT;Lo;0;L;;;;;N;;;;;
+ A332;YI SYLLABLE SSAX;Lo;0;L;;;;;N;;;;;
+ A333;YI SYLLABLE SSA;Lo;0;L;;;;;N;;;;;
+ A334;YI SYLLABLE SSAP;Lo;0;L;;;;;N;;;;;
+ A335;YI SYLLABLE SSOT;Lo;0;L;;;;;N;;;;;
+ A336;YI SYLLABLE SSOX;Lo;0;L;;;;;N;;;;;
+ A337;YI SYLLABLE SSO;Lo;0;L;;;;;N;;;;;
+ A338;YI SYLLABLE SSOP;Lo;0;L;;;;;N;;;;;
+ A339;YI SYLLABLE SSEX;Lo;0;L;;;;;N;;;;;
+ A33A;YI SYLLABLE SSE;Lo;0;L;;;;;N;;;;;
+ A33B;YI SYLLABLE SSEP;Lo;0;L;;;;;N;;;;;
+ A33C;YI SYLLABLE SSUT;Lo;0;L;;;;;N;;;;;
+ A33D;YI SYLLABLE SSUX;Lo;0;L;;;;;N;;;;;
+ A33E;YI SYLLABLE SSU;Lo;0;L;;;;;N;;;;;
+ A33F;YI SYLLABLE SSUP;Lo;0;L;;;;;N;;;;;
+ A340;YI SYLLABLE SSYT;Lo;0;L;;;;;N;;;;;
+ A341;YI SYLLABLE SSYX;Lo;0;L;;;;;N;;;;;
+ A342;YI SYLLABLE SSY;Lo;0;L;;;;;N;;;;;
+ A343;YI SYLLABLE SSYP;Lo;0;L;;;;;N;;;;;
+ A344;YI SYLLABLE SSYRX;Lo;0;L;;;;;N;;;;;
+ A345;YI SYLLABLE SSYR;Lo;0;L;;;;;N;;;;;
+ A346;YI SYLLABLE ZHAT;Lo;0;L;;;;;N;;;;;
+ A347;YI SYLLABLE ZHAX;Lo;0;L;;;;;N;;;;;
+ A348;YI SYLLABLE ZHA;Lo;0;L;;;;;N;;;;;
+ A349;YI SYLLABLE ZHAP;Lo;0;L;;;;;N;;;;;
+ A34A;YI SYLLABLE ZHUOX;Lo;0;L;;;;;N;;;;;
+ A34B;YI SYLLABLE ZHUO;Lo;0;L;;;;;N;;;;;
+ A34C;YI SYLLABLE ZHUOP;Lo;0;L;;;;;N;;;;;
+ A34D;YI SYLLABLE ZHOT;Lo;0;L;;;;;N;;;;;
+ A34E;YI SYLLABLE ZHOX;Lo;0;L;;;;;N;;;;;
+ A34F;YI SYLLABLE ZHO;Lo;0;L;;;;;N;;;;;
+ A350;YI SYLLABLE ZHOP;Lo;0;L;;;;;N;;;;;
+ A351;YI SYLLABLE ZHET;Lo;0;L;;;;;N;;;;;
+ A352;YI SYLLABLE ZHEX;Lo;0;L;;;;;N;;;;;
+ A353;YI SYLLABLE ZHE;Lo;0;L;;;;;N;;;;;
+ A354;YI SYLLABLE ZHEP;Lo;0;L;;;;;N;;;;;
+ A355;YI SYLLABLE ZHUT;Lo;0;L;;;;;N;;;;;
+ A356;YI SYLLABLE ZHUX;Lo;0;L;;;;;N;;;;;
+ A357;YI SYLLABLE ZHU;Lo;0;L;;;;;N;;;;;
+ A358;YI SYLLABLE ZHUP;Lo;0;L;;;;;N;;;;;
+ A359;YI SYLLABLE ZHURX;Lo;0;L;;;;;N;;;;;
+ A35A;YI SYLLABLE ZHUR;Lo;0;L;;;;;N;;;;;
+ A35B;YI SYLLABLE ZHYT;Lo;0;L;;;;;N;;;;;
+ A35C;YI SYLLABLE ZHYX;Lo;0;L;;;;;N;;;;;
+ A35D;YI SYLLABLE ZHY;Lo;0;L;;;;;N;;;;;
+ A35E;YI SYLLABLE ZHYP;Lo;0;L;;;;;N;;;;;
+ A35F;YI SYLLABLE ZHYRX;Lo;0;L;;;;;N;;;;;
+ A360;YI SYLLABLE ZHYR;Lo;0;L;;;;;N;;;;;
+ A361;YI SYLLABLE CHAT;Lo;0;L;;;;;N;;;;;
+ A362;YI SYLLABLE CHAX;Lo;0;L;;;;;N;;;;;
+ A363;YI SYLLABLE CHA;Lo;0;L;;;;;N;;;;;
+ A364;YI SYLLABLE CHAP;Lo;0;L;;;;;N;;;;;
+ A365;YI SYLLABLE CHUOT;Lo;0;L;;;;;N;;;;;
+ A366;YI SYLLABLE CHUOX;Lo;0;L;;;;;N;;;;;
+ A367;YI SYLLABLE CHUO;Lo;0;L;;;;;N;;;;;
+ A368;YI SYLLABLE CHUOP;Lo;0;L;;;;;N;;;;;
+ A369;YI SYLLABLE CHOT;Lo;0;L;;;;;N;;;;;
+ A36A;YI SYLLABLE CHOX;Lo;0;L;;;;;N;;;;;
+ A36B;YI SYLLABLE CHO;Lo;0;L;;;;;N;;;;;
+ A36C;YI SYLLABLE CHOP;Lo;0;L;;;;;N;;;;;
+ A36D;YI SYLLABLE CHET;Lo;0;L;;;;;N;;;;;
+ A36E;YI SYLLABLE CHEX;Lo;0;L;;;;;N;;;;;
+ A36F;YI SYLLABLE CHE;Lo;0;L;;;;;N;;;;;
+ A370;YI SYLLABLE CHEP;Lo;0;L;;;;;N;;;;;
+ A371;YI SYLLABLE CHUX;Lo;0;L;;;;;N;;;;;
+ A372;YI SYLLABLE CHU;Lo;0;L;;;;;N;;;;;
+ A373;YI SYLLABLE CHUP;Lo;0;L;;;;;N;;;;;
+ A374;YI SYLLABLE CHURX;Lo;0;L;;;;;N;;;;;
+ A375;YI SYLLABLE CHUR;Lo;0;L;;;;;N;;;;;
+ A376;YI SYLLABLE CHYT;Lo;0;L;;;;;N;;;;;
+ A377;YI SYLLABLE CHYX;Lo;0;L;;;;;N;;;;;
+ A378;YI SYLLABLE CHY;Lo;0;L;;;;;N;;;;;
+ A379;YI SYLLABLE CHYP;Lo;0;L;;;;;N;;;;;
+ A37A;YI SYLLABLE CHYRX;Lo;0;L;;;;;N;;;;;
+ A37B;YI SYLLABLE CHYR;Lo;0;L;;;;;N;;;;;
+ A37C;YI SYLLABLE RRAX;Lo;0;L;;;;;N;;;;;
+ A37D;YI SYLLABLE RRA;Lo;0;L;;;;;N;;;;;
+ A37E;YI SYLLABLE RRUOX;Lo;0;L;;;;;N;;;;;
+ A37F;YI SYLLABLE RRUO;Lo;0;L;;;;;N;;;;;
+ A380;YI SYLLABLE RROT;Lo;0;L;;;;;N;;;;;
+ A381;YI SYLLABLE RROX;Lo;0;L;;;;;N;;;;;
+ A382;YI SYLLABLE RRO;Lo;0;L;;;;;N;;;;;
+ A383;YI SYLLABLE RROP;Lo;0;L;;;;;N;;;;;
+ A384;YI SYLLABLE RRET;Lo;0;L;;;;;N;;;;;
+ A385;YI SYLLABLE RREX;Lo;0;L;;;;;N;;;;;
+ A386;YI SYLLABLE RRE;Lo;0;L;;;;;N;;;;;
+ A387;YI SYLLABLE RREP;Lo;0;L;;;;;N;;;;;
+ A388;YI SYLLABLE RRUT;Lo;0;L;;;;;N;;;;;
+ A389;YI SYLLABLE RRUX;Lo;0;L;;;;;N;;;;;
+ A38A;YI SYLLABLE RRU;Lo;0;L;;;;;N;;;;;
+ A38B;YI SYLLABLE RRUP;Lo;0;L;;;;;N;;;;;
+ A38C;YI SYLLABLE RRURX;Lo;0;L;;;;;N;;;;;
+ A38D;YI SYLLABLE RRUR;Lo;0;L;;;;;N;;;;;
+ A38E;YI SYLLABLE RRYT;Lo;0;L;;;;;N;;;;;
+ A38F;YI SYLLABLE RRYX;Lo;0;L;;;;;N;;;;;
+ A390;YI SYLLABLE RRY;Lo;0;L;;;;;N;;;;;
+ A391;YI SYLLABLE RRYP;Lo;0;L;;;;;N;;;;;
+ A392;YI SYLLABLE RRYRX;Lo;0;L;;;;;N;;;;;
+ A393;YI SYLLABLE RRYR;Lo;0;L;;;;;N;;;;;
+ A394;YI SYLLABLE NRAT;Lo;0;L;;;;;N;;;;;
+ A395;YI SYLLABLE NRAX;Lo;0;L;;;;;N;;;;;
+ A396;YI SYLLABLE NRA;Lo;0;L;;;;;N;;;;;
+ A397;YI SYLLABLE NRAP;Lo;0;L;;;;;N;;;;;
+ A398;YI SYLLABLE NROX;Lo;0;L;;;;;N;;;;;
+ A399;YI SYLLABLE NRO;Lo;0;L;;;;;N;;;;;
+ A39A;YI SYLLABLE NROP;Lo;0;L;;;;;N;;;;;
+ A39B;YI SYLLABLE NRET;Lo;0;L;;;;;N;;;;;
+ A39C;YI SYLLABLE NREX;Lo;0;L;;;;;N;;;;;
+ A39D;YI SYLLABLE NRE;Lo;0;L;;;;;N;;;;;
+ A39E;YI SYLLABLE NREP;Lo;0;L;;;;;N;;;;;
+ A39F;YI SYLLABLE NRUT;Lo;0;L;;;;;N;;;;;
+ A3A0;YI SYLLABLE NRUX;Lo;0;L;;;;;N;;;;;
+ A3A1;YI SYLLABLE NRU;Lo;0;L;;;;;N;;;;;
+ A3A2;YI SYLLABLE NRUP;Lo;0;L;;;;;N;;;;;
+ A3A3;YI SYLLABLE NRURX;Lo;0;L;;;;;N;;;;;
+ A3A4;YI SYLLABLE NRUR;Lo;0;L;;;;;N;;;;;
+ A3A5;YI SYLLABLE NRYT;Lo;0;L;;;;;N;;;;;
+ A3A6;YI SYLLABLE NRYX;Lo;0;L;;;;;N;;;;;
+ A3A7;YI SYLLABLE NRY;Lo;0;L;;;;;N;;;;;
+ A3A8;YI SYLLABLE NRYP;Lo;0;L;;;;;N;;;;;
+ A3A9;YI SYLLABLE NRYRX;Lo;0;L;;;;;N;;;;;
+ A3AA;YI SYLLABLE NRYR;Lo;0;L;;;;;N;;;;;
+ A3AB;YI SYLLABLE SHAT;Lo;0;L;;;;;N;;;;;
+ A3AC;YI SYLLABLE SHAX;Lo;0;L;;;;;N;;;;;
+ A3AD;YI SYLLABLE SHA;Lo;0;L;;;;;N;;;;;
+ A3AE;YI SYLLABLE SHAP;Lo;0;L;;;;;N;;;;;
+ A3AF;YI SYLLABLE SHUOX;Lo;0;L;;;;;N;;;;;
+ A3B0;YI SYLLABLE SHUO;Lo;0;L;;;;;N;;;;;
+ A3B1;YI SYLLABLE SHUOP;Lo;0;L;;;;;N;;;;;
+ A3B2;YI SYLLABLE SHOT;Lo;0;L;;;;;N;;;;;
+ A3B3;YI SYLLABLE SHOX;Lo;0;L;;;;;N;;;;;
+ A3B4;YI SYLLABLE SHO;Lo;0;L;;;;;N;;;;;
+ A3B5;YI SYLLABLE SHOP;Lo;0;L;;;;;N;;;;;
+ A3B6;YI SYLLABLE SHET;Lo;0;L;;;;;N;;;;;
+ A3B7;YI SYLLABLE SHEX;Lo;0;L;;;;;N;;;;;
+ A3B8;YI SYLLABLE SHE;Lo;0;L;;;;;N;;;;;
+ A3B9;YI SYLLABLE SHEP;Lo;0;L;;;;;N;;;;;
+ A3BA;YI SYLLABLE SHUT;Lo;0;L;;;;;N;;;;;
+ A3BB;YI SYLLABLE SHUX;Lo;0;L;;;;;N;;;;;
+ A3BC;YI SYLLABLE SHU;Lo;0;L;;;;;N;;;;;
+ A3BD;YI SYLLABLE SHUP;Lo;0;L;;;;;N;;;;;
+ A3BE;YI SYLLABLE SHURX;Lo;0;L;;;;;N;;;;;
+ A3BF;YI SYLLABLE SHUR;Lo;0;L;;;;;N;;;;;
+ A3C0;YI SYLLABLE SHYT;Lo;0;L;;;;;N;;;;;
+ A3C1;YI SYLLABLE SHYX;Lo;0;L;;;;;N;;;;;
+ A3C2;YI SYLLABLE SHY;Lo;0;L;;;;;N;;;;;
+ A3C3;YI SYLLABLE SHYP;Lo;0;L;;;;;N;;;;;
+ A3C4;YI SYLLABLE SHYRX;Lo;0;L;;;;;N;;;;;
+ A3C5;YI SYLLABLE SHYR;Lo;0;L;;;;;N;;;;;
+ A3C6;YI SYLLABLE RAT;Lo;0;L;;;;;N;;;;;
+ A3C7;YI SYLLABLE RAX;Lo;0;L;;;;;N;;;;;
+ A3C8;YI SYLLABLE RA;Lo;0;L;;;;;N;;;;;
+ A3C9;YI SYLLABLE RAP;Lo;0;L;;;;;N;;;;;
+ A3CA;YI SYLLABLE RUOX;Lo;0;L;;;;;N;;;;;
+ A3CB;YI SYLLABLE RUO;Lo;0;L;;;;;N;;;;;
+ A3CC;YI SYLLABLE RUOP;Lo;0;L;;;;;N;;;;;
+ A3CD;YI SYLLABLE ROT;Lo;0;L;;;;;N;;;;;
+ A3CE;YI SYLLABLE ROX;Lo;0;L;;;;;N;;;;;
+ A3CF;YI SYLLABLE RO;Lo;0;L;;;;;N;;;;;
+ A3D0;YI SYLLABLE ROP;Lo;0;L;;;;;N;;;;;
+ A3D1;YI SYLLABLE REX;Lo;0;L;;;;;N;;;;;
+ A3D2;YI SYLLABLE RE;Lo;0;L;;;;;N;;;;;
+ A3D3;YI SYLLABLE REP;Lo;0;L;;;;;N;;;;;
+ A3D4;YI SYLLABLE RUT;Lo;0;L;;;;;N;;;;;
+ A3D5;YI SYLLABLE RUX;Lo;0;L;;;;;N;;;;;
+ A3D6;YI SYLLABLE RU;Lo;0;L;;;;;N;;;;;
+ A3D7;YI SYLLABLE RUP;Lo;0;L;;;;;N;;;;;
+ A3D8;YI SYLLABLE RURX;Lo;0;L;;;;;N;;;;;
+ A3D9;YI SYLLABLE RUR;Lo;0;L;;;;;N;;;;;
+ A3DA;YI SYLLABLE RYT;Lo;0;L;;;;;N;;;;;
+ A3DB;YI SYLLABLE RYX;Lo;0;L;;;;;N;;;;;
+ A3DC;YI SYLLABLE RY;Lo;0;L;;;;;N;;;;;
+ A3DD;YI SYLLABLE RYP;Lo;0;L;;;;;N;;;;;
+ A3DE;YI SYLLABLE RYRX;Lo;0;L;;;;;N;;;;;
+ A3DF;YI SYLLABLE RYR;Lo;0;L;;;;;N;;;;;
+ A3E0;YI SYLLABLE JIT;Lo;0;L;;;;;N;;;;;
+ A3E1;YI SYLLABLE JIX;Lo;0;L;;;;;N;;;;;
+ A3E2;YI SYLLABLE JI;Lo;0;L;;;;;N;;;;;
+ A3E3;YI SYLLABLE JIP;Lo;0;L;;;;;N;;;;;
+ A3E4;YI SYLLABLE JIET;Lo;0;L;;;;;N;;;;;
+ A3E5;YI SYLLABLE JIEX;Lo;0;L;;;;;N;;;;;
+ A3E6;YI SYLLABLE JIE;Lo;0;L;;;;;N;;;;;
+ A3E7;YI SYLLABLE JIEP;Lo;0;L;;;;;N;;;;;
+ A3E8;YI SYLLABLE JUOT;Lo;0;L;;;;;N;;;;;
+ A3E9;YI SYLLABLE JUOX;Lo;0;L;;;;;N;;;;;
+ A3EA;YI SYLLABLE JUO;Lo;0;L;;;;;N;;;;;
+ A3EB;YI SYLLABLE JUOP;Lo;0;L;;;;;N;;;;;
+ A3EC;YI SYLLABLE JOT;Lo;0;L;;;;;N;;;;;
+ A3ED;YI SYLLABLE JOX;Lo;0;L;;;;;N;;;;;
+ A3EE;YI SYLLABLE JO;Lo;0;L;;;;;N;;;;;
+ A3EF;YI SYLLABLE JOP;Lo;0;L;;;;;N;;;;;
+ A3F0;YI SYLLABLE JUT;Lo;0;L;;;;;N;;;;;
+ A3F1;YI SYLLABLE JUX;Lo;0;L;;;;;N;;;;;
+ A3F2;YI SYLLABLE JU;Lo;0;L;;;;;N;;;;;
+ A3F3;YI SYLLABLE JUP;Lo;0;L;;;;;N;;;;;
+ A3F4;YI SYLLABLE JURX;Lo;0;L;;;;;N;;;;;
+ A3F5;YI SYLLABLE JUR;Lo;0;L;;;;;N;;;;;
+ A3F6;YI SYLLABLE JYT;Lo;0;L;;;;;N;;;;;
+ A3F7;YI SYLLABLE JYX;Lo;0;L;;;;;N;;;;;
+ A3F8;YI SYLLABLE JY;Lo;0;L;;;;;N;;;;;
+ A3F9;YI SYLLABLE JYP;Lo;0;L;;;;;N;;;;;
+ A3FA;YI SYLLABLE JYRX;Lo;0;L;;;;;N;;;;;
+ A3FB;YI SYLLABLE JYR;Lo;0;L;;;;;N;;;;;
+ A3FC;YI SYLLABLE QIT;Lo;0;L;;;;;N;;;;;
+ A3FD;YI SYLLABLE QIX;Lo;0;L;;;;;N;;;;;
+ A3FE;YI SYLLABLE QI;Lo;0;L;;;;;N;;;;;
+ A3FF;YI SYLLABLE QIP;Lo;0;L;;;;;N;;;;;
+ A400;YI SYLLABLE QIET;Lo;0;L;;;;;N;;;;;
+ A401;YI SYLLABLE QIEX;Lo;0;L;;;;;N;;;;;
+ A402;YI SYLLABLE QIE;Lo;0;L;;;;;N;;;;;
+ A403;YI SYLLABLE QIEP;Lo;0;L;;;;;N;;;;;
+ A404;YI SYLLABLE QUOT;Lo;0;L;;;;;N;;;;;
+ A405;YI SYLLABLE QUOX;Lo;0;L;;;;;N;;;;;
+ A406;YI SYLLABLE QUO;Lo;0;L;;;;;N;;;;;
+ A407;YI SYLLABLE QUOP;Lo;0;L;;;;;N;;;;;
+ A408;YI SYLLABLE QOT;Lo;0;L;;;;;N;;;;;
+ A409;YI SYLLABLE QOX;Lo;0;L;;;;;N;;;;;
+ A40A;YI SYLLABLE QO;Lo;0;L;;;;;N;;;;;
+ A40B;YI SYLLABLE QOP;Lo;0;L;;;;;N;;;;;
+ A40C;YI SYLLABLE QUT;Lo;0;L;;;;;N;;;;;
+ A40D;YI SYLLABLE QUX;Lo;0;L;;;;;N;;;;;
+ A40E;YI SYLLABLE QU;Lo;0;L;;;;;N;;;;;
+ A40F;YI SYLLABLE QUP;Lo;0;L;;;;;N;;;;;
+ A410;YI SYLLABLE QURX;Lo;0;L;;;;;N;;;;;
+ A411;YI SYLLABLE QUR;Lo;0;L;;;;;N;;;;;
+ A412;YI SYLLABLE QYT;Lo;0;L;;;;;N;;;;;
+ A413;YI SYLLABLE QYX;Lo;0;L;;;;;N;;;;;
+ A414;YI SYLLABLE QY;Lo;0;L;;;;;N;;;;;
+ A415;YI SYLLABLE QYP;Lo;0;L;;;;;N;;;;;
+ A416;YI SYLLABLE QYRX;Lo;0;L;;;;;N;;;;;
+ A417;YI SYLLABLE QYR;Lo;0;L;;;;;N;;;;;
+ A418;YI SYLLABLE JJIT;Lo;0;L;;;;;N;;;;;
+ A419;YI SYLLABLE JJIX;Lo;0;L;;;;;N;;;;;
+ A41A;YI SYLLABLE JJI;Lo;0;L;;;;;N;;;;;
+ A41B;YI SYLLABLE JJIP;Lo;0;L;;;;;N;;;;;
+ A41C;YI SYLLABLE JJIET;Lo;0;L;;;;;N;;;;;
+ A41D;YI SYLLABLE JJIEX;Lo;0;L;;;;;N;;;;;
+ A41E;YI SYLLABLE JJIE;Lo;0;L;;;;;N;;;;;
+ A41F;YI SYLLABLE JJIEP;Lo;0;L;;;;;N;;;;;
+ A420;YI SYLLABLE JJUOX;Lo;0;L;;;;;N;;;;;
+ A421;YI SYLLABLE JJUO;Lo;0;L;;;;;N;;;;;
+ A422;YI SYLLABLE JJUOP;Lo;0;L;;;;;N;;;;;
+ A423;YI SYLLABLE JJOT;Lo;0;L;;;;;N;;;;;
+ A424;YI SYLLABLE JJOX;Lo;0;L;;;;;N;;;;;
+ A425;YI SYLLABLE JJO;Lo;0;L;;;;;N;;;;;
+ A426;YI SYLLABLE JJOP;Lo;0;L;;;;;N;;;;;
+ A427;YI SYLLABLE JJUT;Lo;0;L;;;;;N;;;;;
+ A428;YI SYLLABLE JJUX;Lo;0;L;;;;;N;;;;;
+ A429;YI SYLLABLE JJU;Lo;0;L;;;;;N;;;;;
+ A42A;YI SYLLABLE JJUP;Lo;0;L;;;;;N;;;;;
+ A42B;YI SYLLABLE JJURX;Lo;0;L;;;;;N;;;;;
+ A42C;YI SYLLABLE JJUR;Lo;0;L;;;;;N;;;;;
+ A42D;YI SYLLABLE JJYT;Lo;0;L;;;;;N;;;;;
+ A42E;YI SYLLABLE JJYX;Lo;0;L;;;;;N;;;;;
+ A42F;YI SYLLABLE JJY;Lo;0;L;;;;;N;;;;;
+ A430;YI SYLLABLE JJYP;Lo;0;L;;;;;N;;;;;
+ A431;YI SYLLABLE NJIT;Lo;0;L;;;;;N;;;;;
+ A432;YI SYLLABLE NJIX;Lo;0;L;;;;;N;;;;;
+ A433;YI SYLLABLE NJI;Lo;0;L;;;;;N;;;;;
+ A434;YI SYLLABLE NJIP;Lo;0;L;;;;;N;;;;;
+ A435;YI SYLLABLE NJIET;Lo;0;L;;;;;N;;;;;
+ A436;YI SYLLABLE NJIEX;Lo;0;L;;;;;N;;;;;
+ A437;YI SYLLABLE NJIE;Lo;0;L;;;;;N;;;;;
+ A438;YI SYLLABLE NJIEP;Lo;0;L;;;;;N;;;;;
+ A439;YI SYLLABLE NJUOX;Lo;0;L;;;;;N;;;;;
+ A43A;YI SYLLABLE NJUO;Lo;0;L;;;;;N;;;;;
+ A43B;YI SYLLABLE NJOT;Lo;0;L;;;;;N;;;;;
+ A43C;YI SYLLABLE NJOX;Lo;0;L;;;;;N;;;;;
+ A43D;YI SYLLABLE NJO;Lo;0;L;;;;;N;;;;;
+ A43E;YI SYLLABLE NJOP;Lo;0;L;;;;;N;;;;;
+ A43F;YI SYLLABLE NJUX;Lo;0;L;;;;;N;;;;;
+ A440;YI SYLLABLE NJU;Lo;0;L;;;;;N;;;;;
+ A441;YI SYLLABLE NJUP;Lo;0;L;;;;;N;;;;;
+ A442;YI SYLLABLE NJURX;Lo;0;L;;;;;N;;;;;
+ A443;YI SYLLABLE NJUR;Lo;0;L;;;;;N;;;;;
+ A444;YI SYLLABLE NJYT;Lo;0;L;;;;;N;;;;;
+ A445;YI SYLLABLE NJYX;Lo;0;L;;;;;N;;;;;
+ A446;YI SYLLABLE NJY;Lo;0;L;;;;;N;;;;;
+ A447;YI SYLLABLE NJYP;Lo;0;L;;;;;N;;;;;
+ A448;YI SYLLABLE NJYRX;Lo;0;L;;;;;N;;;;;
+ A449;YI SYLLABLE NJYR;Lo;0;L;;;;;N;;;;;
+ A44A;YI SYLLABLE NYIT;Lo;0;L;;;;;N;;;;;
+ A44B;YI SYLLABLE NYIX;Lo;0;L;;;;;N;;;;;
+ A44C;YI SYLLABLE NYI;Lo;0;L;;;;;N;;;;;
+ A44D;YI SYLLABLE NYIP;Lo;0;L;;;;;N;;;;;
+ A44E;YI SYLLABLE NYIET;Lo;0;L;;;;;N;;;;;
+ A44F;YI SYLLABLE NYIEX;Lo;0;L;;;;;N;;;;;
+ A450;YI SYLLABLE NYIE;Lo;0;L;;;;;N;;;;;
+ A451;YI SYLLABLE NYIEP;Lo;0;L;;;;;N;;;;;
+ A452;YI SYLLABLE NYUOX;Lo;0;L;;;;;N;;;;;
+ A453;YI SYLLABLE NYUO;Lo;0;L;;;;;N;;;;;
+ A454;YI SYLLABLE NYUOP;Lo;0;L;;;;;N;;;;;
+ A455;YI SYLLABLE NYOT;Lo;0;L;;;;;N;;;;;
+ A456;YI SYLLABLE NYOX;Lo;0;L;;;;;N;;;;;
+ A457;YI SYLLABLE NYO;Lo;0;L;;;;;N;;;;;
+ A458;YI SYLLABLE NYOP;Lo;0;L;;;;;N;;;;;
+ A459;YI SYLLABLE NYUT;Lo;0;L;;;;;N;;;;;
+ A45A;YI SYLLABLE NYUX;Lo;0;L;;;;;N;;;;;
+ A45B;YI SYLLABLE NYU;Lo;0;L;;;;;N;;;;;
+ A45C;YI SYLLABLE NYUP;Lo;0;L;;;;;N;;;;;
+ A45D;YI SYLLABLE XIT;Lo;0;L;;;;;N;;;;;
+ A45E;YI SYLLABLE XIX;Lo;0;L;;;;;N;;;;;
+ A45F;YI SYLLABLE XI;Lo;0;L;;;;;N;;;;;
+ A460;YI SYLLABLE XIP;Lo;0;L;;;;;N;;;;;
+ A461;YI SYLLABLE XIET;Lo;0;L;;;;;N;;;;;
+ A462;YI SYLLABLE XIEX;Lo;0;L;;;;;N;;;;;
+ A463;YI SYLLABLE XIE;Lo;0;L;;;;;N;;;;;
+ A464;YI SYLLABLE XIEP;Lo;0;L;;;;;N;;;;;
+ A465;YI SYLLABLE XUOX;Lo;0;L;;;;;N;;;;;
+ A466;YI SYLLABLE XUO;Lo;0;L;;;;;N;;;;;
+ A467;YI SYLLABLE XOT;Lo;0;L;;;;;N;;;;;
+ A468;YI SYLLABLE XOX;Lo;0;L;;;;;N;;;;;
+ A469;YI SYLLABLE XO;Lo;0;L;;;;;N;;;;;
+ A46A;YI SYLLABLE XOP;Lo;0;L;;;;;N;;;;;
+ A46B;YI SYLLABLE XYT;Lo;0;L;;;;;N;;;;;
+ A46C;YI SYLLABLE XYX;Lo;0;L;;;;;N;;;;;
+ A46D;YI SYLLABLE XY;Lo;0;L;;;;;N;;;;;
+ A46E;YI SYLLABLE XYP;Lo;0;L;;;;;N;;;;;
+ A46F;YI SYLLABLE XYRX;Lo;0;L;;;;;N;;;;;
+ A470;YI SYLLABLE XYR;Lo;0;L;;;;;N;;;;;
+ A471;YI SYLLABLE YIT;Lo;0;L;;;;;N;;;;;
+ A472;YI SYLLABLE YIX;Lo;0;L;;;;;N;;;;;
+ A473;YI SYLLABLE YI;Lo;0;L;;;;;N;;;;;
+ A474;YI SYLLABLE YIP;Lo;0;L;;;;;N;;;;;
+ A475;YI SYLLABLE YIET;Lo;0;L;;;;;N;;;;;
+ A476;YI SYLLABLE YIEX;Lo;0;L;;;;;N;;;;;
+ A477;YI SYLLABLE YIE;Lo;0;L;;;;;N;;;;;
+ A478;YI SYLLABLE YIEP;Lo;0;L;;;;;N;;;;;
+ A479;YI SYLLABLE YUOT;Lo;0;L;;;;;N;;;;;
+ A47A;YI SYLLABLE YUOX;Lo;0;L;;;;;N;;;;;
+ A47B;YI SYLLABLE YUO;Lo;0;L;;;;;N;;;;;
+ A47C;YI SYLLABLE YUOP;Lo;0;L;;;;;N;;;;;
+ A47D;YI SYLLABLE YOT;Lo;0;L;;;;;N;;;;;
+ A47E;YI SYLLABLE YOX;Lo;0;L;;;;;N;;;;;
+ A47F;YI SYLLABLE YO;Lo;0;L;;;;;N;;;;;
+ A480;YI SYLLABLE YOP;Lo;0;L;;;;;N;;;;;
+ A481;YI SYLLABLE YUT;Lo;0;L;;;;;N;;;;;
+ A482;YI SYLLABLE YUX;Lo;0;L;;;;;N;;;;;
+ A483;YI SYLLABLE YU;Lo;0;L;;;;;N;;;;;
+ A484;YI SYLLABLE YUP;Lo;0;L;;;;;N;;;;;
+ A485;YI SYLLABLE YURX;Lo;0;L;;;;;N;;;;;
+ A486;YI SYLLABLE YUR;Lo;0;L;;;;;N;;;;;
+ A487;YI SYLLABLE YYT;Lo;0;L;;;;;N;;;;;
+ A488;YI SYLLABLE YYX;Lo;0;L;;;;;N;;;;;
+ A489;YI SYLLABLE YY;Lo;0;L;;;;;N;;;;;
+ A48A;YI SYLLABLE YYP;Lo;0;L;;;;;N;;;;;
+ A48B;YI SYLLABLE YYRX;Lo;0;L;;;;;N;;;;;
+ A48C;YI SYLLABLE YYR;Lo;0;L;;;;;N;;;;;
+ A490;YI RADICAL QOT;So;0;ON;;;;;N;;;;;
+ A491;YI RADICAL LI;So;0;ON;;;;;N;;;;;
+ A492;YI RADICAL KIT;So;0;ON;;;;;N;;;;;
+ A493;YI RADICAL NYIP;So;0;ON;;;;;N;;;;;
+ A494;YI RADICAL CYP;So;0;ON;;;;;N;;;;;
+ A495;YI RADICAL SSI;So;0;ON;;;;;N;;;;;
+ A496;YI RADICAL GGOP;So;0;ON;;;;;N;;;;;
+ A497;YI RADICAL GEP;So;0;ON;;;;;N;;;;;
+ A498;YI RADICAL MI;So;0;ON;;;;;N;;;;;
+ A499;YI RADICAL HXIT;So;0;ON;;;;;N;;;;;
+ A49A;YI RADICAL LYR;So;0;ON;;;;;N;;;;;
+ A49B;YI RADICAL BBUT;So;0;ON;;;;;N;;;;;
+ A49C;YI RADICAL MOP;So;0;ON;;;;;N;;;;;
+ A49D;YI RADICAL YO;So;0;ON;;;;;N;;;;;
+ A49E;YI RADICAL PUT;So;0;ON;;;;;N;;;;;
+ A49F;YI RADICAL HXUO;So;0;ON;;;;;N;;;;;
+ A4A0;YI RADICAL TAT;So;0;ON;;;;;N;;;;;
+ A4A1;YI RADICAL GA;So;0;ON;;;;;N;;;;;
+ A4A2;YI RADICAL ZUP;So;0;ON;;;;;N;;;;;
+ A4A3;YI RADICAL CYT;So;0;ON;;;;;N;;;;;
+ A4A4;YI RADICAL DDUR;So;0;ON;;;;;N;;;;;
+ A4A5;YI RADICAL BUR;So;0;ON;;;;;N;;;;;
+ A4A6;YI RADICAL GGUO;So;0;ON;;;;;N;;;;;
+ A4A7;YI RADICAL NYOP;So;0;ON;;;;;N;;;;;
+ A4A8;YI RADICAL TU;So;0;ON;;;;;N;;;;;
+ A4A9;YI RADICAL OP;So;0;ON;;;;;N;;;;;
+ A4AA;YI RADICAL JJUT;So;0;ON;;;;;N;;;;;
+ A4AB;YI RADICAL ZOT;So;0;ON;;;;;N;;;;;
+ A4AC;YI RADICAL PYT;So;0;ON;;;;;N;;;;;
+ A4AD;YI RADICAL HMO;So;0;ON;;;;;N;;;;;
+ A4AE;YI RADICAL YIT;So;0;ON;;;;;N;;;;;
+ A4AF;YI RADICAL VUR;So;0;ON;;;;;N;;;;;
+ A4B0;YI RADICAL SHY;So;0;ON;;;;;N;;;;;
+ A4B1;YI RADICAL VEP;So;0;ON;;;;;N;;;;;
+ A4B2;YI RADICAL ZA;So;0;ON;;;;;N;;;;;
+ A4B3;YI RADICAL JO;So;0;ON;;;;;N;;;;;
+ A4B4;YI RADICAL NZUP;So;0;ON;;;;;N;;;;;
+ A4B5;YI RADICAL JJY;So;0;ON;;;;;N;;;;;
+ A4B6;YI RADICAL GOT;So;0;ON;;;;;N;;;;;
+ A4B7;YI RADICAL JJIE;So;0;ON;;;;;N;;;;;
+ A4B8;YI RADICAL WO;So;0;ON;;;;;N;;;;;
+ A4B9;YI RADICAL DU;So;0;ON;;;;;N;;;;;
+ A4BA;YI RADICAL SHUR;So;0;ON;;;;;N;;;;;
+ A4BB;YI RADICAL LIE;So;0;ON;;;;;N;;;;;
+ A4BC;YI RADICAL CY;So;0;ON;;;;;N;;;;;
+ A4BD;YI RADICAL CUOP;So;0;ON;;;;;N;;;;;
+ A4BE;YI RADICAL CIP;So;0;ON;;;;;N;;;;;
+ A4BF;YI RADICAL HXOP;So;0;ON;;;;;N;;;;;
+ A4C0;YI RADICAL SHAT;So;0;ON;;;;;N;;;;;
+ A4C1;YI RADICAL ZUR;So;0;ON;;;;;N;;;;;
+ A4C2;YI RADICAL SHOP;So;0;ON;;;;;N;;;;;
+ A4C3;YI RADICAL CHE;So;0;ON;;;;;N;;;;;
+ A4C4;YI RADICAL ZZIET;So;0;ON;;;;;N;;;;;
+ A4C5;YI RADICAL NBIE;So;0;ON;;;;;N;;;;;
+ A4C6;YI RADICAL KE;So;0;ON;;;;;N;;;;;
+ A4D0;LISU LETTER BA;Lo;0;L;;;;;N;;;;;
+ A4D1;LISU LETTER PA;Lo;0;L;;;;;N;;;;;
+ A4D2;LISU LETTER PHA;Lo;0;L;;;;;N;;;;;
+ A4D3;LISU LETTER DA;Lo;0;L;;;;;N;;;;;
+ A4D4;LISU LETTER TA;Lo;0;L;;;;;N;;;;;
+ A4D5;LISU LETTER THA;Lo;0;L;;;;;N;;;;;
+ A4D6;LISU LETTER GA;Lo;0;L;;;;;N;;;;;
+ A4D7;LISU LETTER KA;Lo;0;L;;;;;N;;;;;
+ A4D8;LISU LETTER KHA;Lo;0;L;;;;;N;;;;;
+ A4D9;LISU LETTER JA;Lo;0;L;;;;;N;;;;;
+ A4DA;LISU LETTER CA;Lo;0;L;;;;;N;;;;;
+ A4DB;LISU LETTER CHA;Lo;0;L;;;;;N;;;;;
+ A4DC;LISU LETTER DZA;Lo;0;L;;;;;N;;;;;
+ A4DD;LISU LETTER TSA;Lo;0;L;;;;;N;;;;;
+ A4DE;LISU LETTER TSHA;Lo;0;L;;;;;N;;;;;
+ A4DF;LISU LETTER MA;Lo;0;L;;;;;N;;;;;
+ A4E0;LISU LETTER NA;Lo;0;L;;;;;N;;;;;
+ A4E1;LISU LETTER LA;Lo;0;L;;;;;N;;;;;
+ A4E2;LISU LETTER SA;Lo;0;L;;;;;N;;;;;
+ A4E3;LISU LETTER ZHA;Lo;0;L;;;;;N;;;;;
+ A4E4;LISU LETTER ZA;Lo;0;L;;;;;N;;;;;
+ A4E5;LISU LETTER NGA;Lo;0;L;;;;;N;;;;;
+ A4E6;LISU LETTER HA;Lo;0;L;;;;;N;;;;;
+ A4E7;LISU LETTER XA;Lo;0;L;;;;;N;;;;;
+ A4E8;LISU LETTER HHA;Lo;0;L;;;;;N;;;;;
+ A4E9;LISU LETTER FA;Lo;0;L;;;;;N;;;;;
+ A4EA;LISU LETTER WA;Lo;0;L;;;;;N;;;;;
+ A4EB;LISU LETTER SHA;Lo;0;L;;;;;N;;;;;
+ A4EC;LISU LETTER YA;Lo;0;L;;;;;N;;;;;
+ A4ED;LISU LETTER GHA;Lo;0;L;;;;;N;;;;;
+ A4EE;LISU LETTER A;Lo;0;L;;;;;N;;;;;
+ A4EF;LISU LETTER AE;Lo;0;L;;;;;N;;;;;
+ A4F0;LISU LETTER E;Lo;0;L;;;;;N;;;;;
+ A4F1;LISU LETTER EU;Lo;0;L;;;;;N;;;;;
+ A4F2;LISU LETTER I;Lo;0;L;;;;;N;;;;;
+ A4F3;LISU LETTER O;Lo;0;L;;;;;N;;;;;
+ A4F4;LISU LETTER U;Lo;0;L;;;;;N;;;;;
+ A4F5;LISU LETTER UE;Lo;0;L;;;;;N;;;;;
+ A4F6;LISU LETTER UH;Lo;0;L;;;;;N;;;;;
+ A4F7;LISU LETTER OE;Lo;0;L;;;;;N;;;;;
+ A4F8;LISU LETTER TONE MYA TI;Lm;0;L;;;;;N;;;;;
+ A4F9;LISU LETTER TONE NA PO;Lm;0;L;;;;;N;;;;;
+ A4FA;LISU LETTER TONE MYA CYA;Lm;0;L;;;;;N;;;;;
+ A4FB;LISU LETTER TONE MYA BO;Lm;0;L;;;;;N;;;;;
+ A4FC;LISU LETTER TONE MYA NA;Lm;0;L;;;;;N;;;;;
+ A4FD;LISU LETTER TONE MYA JEU;Lm;0;L;;;;;N;;;;;
+ A4FE;LISU PUNCTUATION COMMA;Po;0;L;;;;;N;;;;;
+ A4FF;LISU PUNCTUATION FULL STOP;Po;0;L;;;;;N;;;;;
+ A500;VAI SYLLABLE EE;Lo;0;L;;;;;N;;;;;
+ A501;VAI SYLLABLE EEN;Lo;0;L;;;;;N;;;;;
+ A502;VAI SYLLABLE HEE;Lo;0;L;;;;;N;;;;;
+ A503;VAI SYLLABLE WEE;Lo;0;L;;;;;N;;;;;
+ A504;VAI SYLLABLE WEEN;Lo;0;L;;;;;N;;;;;
+ A505;VAI SYLLABLE PEE;Lo;0;L;;;;;N;;;;;
+ A506;VAI SYLLABLE BHEE;Lo;0;L;;;;;N;;;;;
+ A507;VAI SYLLABLE BEE;Lo;0;L;;;;;N;;;;;
+ A508;VAI SYLLABLE MBEE;Lo;0;L;;;;;N;;;;;
+ A509;VAI SYLLABLE KPEE;Lo;0;L;;;;;N;;;;;
+ A50A;VAI SYLLABLE MGBEE;Lo;0;L;;;;;N;;;;;
+ A50B;VAI SYLLABLE GBEE;Lo;0;L;;;;;N;;;;;
+ A50C;VAI SYLLABLE FEE;Lo;0;L;;;;;N;;;;;
+ A50D;VAI SYLLABLE VEE;Lo;0;L;;;;;N;;;;;
+ A50E;VAI SYLLABLE TEE;Lo;0;L;;;;;N;;;;;
+ A50F;VAI SYLLABLE THEE;Lo;0;L;;;;;N;;;;;
+ A510;VAI SYLLABLE DHEE;Lo;0;L;;;;;N;;;;;
+ A511;VAI SYLLABLE DHHEE;Lo;0;L;;;;;N;;;;;
+ A512;VAI SYLLABLE LEE;Lo;0;L;;;;;N;;;;;
+ A513;VAI SYLLABLE REE;Lo;0;L;;;;;N;;;;;
+ A514;VAI SYLLABLE DEE;Lo;0;L;;;;;N;;;;;
+ A515;VAI SYLLABLE NDEE;Lo;0;L;;;;;N;;;;;
+ A516;VAI SYLLABLE SEE;Lo;0;L;;;;;N;;;;;
+ A517;VAI SYLLABLE SHEE;Lo;0;L;;;;;N;;;;;
+ A518;VAI SYLLABLE ZEE;Lo;0;L;;;;;N;;;;;
+ A519;VAI SYLLABLE ZHEE;Lo;0;L;;;;;N;;;;;
+ A51A;VAI SYLLABLE CEE;Lo;0;L;;;;;N;;;;;
+ A51B;VAI SYLLABLE JEE;Lo;0;L;;;;;N;;;;;
+ A51C;VAI SYLLABLE NJEE;Lo;0;L;;;;;N;;;;;
+ A51D;VAI SYLLABLE YEE;Lo;0;L;;;;;N;;;;;
+ A51E;VAI SYLLABLE KEE;Lo;0;L;;;;;N;;;;;
+ A51F;VAI SYLLABLE NGGEE;Lo;0;L;;;;;N;;;;;
+ A520;VAI SYLLABLE GEE;Lo;0;L;;;;;N;;;;;
+ A521;VAI SYLLABLE MEE;Lo;0;L;;;;;N;;;;;
+ A522;VAI SYLLABLE NEE;Lo;0;L;;;;;N;;;;;
+ A523;VAI SYLLABLE NYEE;Lo;0;L;;;;;N;;;;;
+ A524;VAI SYLLABLE I;Lo;0;L;;;;;N;;;;;
+ A525;VAI SYLLABLE IN;Lo;0;L;;;;;N;;;;;
+ A526;VAI SYLLABLE HI;Lo;0;L;;;;;N;;;;;
+ A527;VAI SYLLABLE HIN;Lo;0;L;;;;;N;;;;;
+ A528;VAI SYLLABLE WI;Lo;0;L;;;;;N;;;;;
+ A529;VAI SYLLABLE WIN;Lo;0;L;;;;;N;;;;;
+ A52A;VAI SYLLABLE PI;Lo;0;L;;;;;N;;;;;
+ A52B;VAI SYLLABLE BHI;Lo;0;L;;;;;N;;;;;
+ A52C;VAI SYLLABLE BI;Lo;0;L;;;;;N;;;;;
+ A52D;VAI SYLLABLE MBI;Lo;0;L;;;;;N;;;;;
+ A52E;VAI SYLLABLE KPI;Lo;0;L;;;;;N;;;;;
+ A52F;VAI SYLLABLE MGBI;Lo;0;L;;;;;N;;;;;
+ A530;VAI SYLLABLE GBI;Lo;0;L;;;;;N;;;;;
+ A531;VAI SYLLABLE FI;Lo;0;L;;;;;N;;;;;
+ A532;VAI SYLLABLE VI;Lo;0;L;;;;;N;;;;;
+ A533;VAI SYLLABLE TI;Lo;0;L;;;;;N;;;;;
+ A534;VAI SYLLABLE THI;Lo;0;L;;;;;N;;;;;
+ A535;VAI SYLLABLE DHI;Lo;0;L;;;;;N;;;;;
+ A536;VAI SYLLABLE DHHI;Lo;0;L;;;;;N;;;;;
+ A537;VAI SYLLABLE LI;Lo;0;L;;;;;N;;;;;
+ A538;VAI SYLLABLE RI;Lo;0;L;;;;;N;;;;;
+ A539;VAI SYLLABLE DI;Lo;0;L;;;;;N;;;;;
+ A53A;VAI SYLLABLE NDI;Lo;0;L;;;;;N;;;;;
+ A53B;VAI SYLLABLE SI;Lo;0;L;;;;;N;;;;;
+ A53C;VAI SYLLABLE SHI;Lo;0;L;;;;;N;;;;;
+ A53D;VAI SYLLABLE ZI;Lo;0;L;;;;;N;;;;;
+ A53E;VAI SYLLABLE ZHI;Lo;0;L;;;;;N;;;;;
+ A53F;VAI SYLLABLE CI;Lo;0;L;;;;;N;;;;;
+ A540;VAI SYLLABLE JI;Lo;0;L;;;;;N;;;;;
+ A541;VAI SYLLABLE NJI;Lo;0;L;;;;;N;;;;;
+ A542;VAI SYLLABLE YI;Lo;0;L;;;;;N;;;;;
+ A543;VAI SYLLABLE KI;Lo;0;L;;;;;N;;;;;
+ A544;VAI SYLLABLE NGGI;Lo;0;L;;;;;N;;;;;
+ A545;VAI SYLLABLE GI;Lo;0;L;;;;;N;;;;;
+ A546;VAI SYLLABLE MI;Lo;0;L;;;;;N;;;;;
+ A547;VAI SYLLABLE NI;Lo;0;L;;;;;N;;;;;
+ A548;VAI SYLLABLE NYI;Lo;0;L;;;;;N;;;;;
+ A549;VAI SYLLABLE A;Lo;0;L;;;;;N;;;;;
+ A54A;VAI SYLLABLE AN;Lo;0;L;;;;;N;;;;;
+ A54B;VAI SYLLABLE NGAN;Lo;0;L;;;;;N;;;;;
+ A54C;VAI SYLLABLE HA;Lo;0;L;;;;;N;;;;;
+ A54D;VAI SYLLABLE HAN;Lo;0;L;;;;;N;;;;;
+ A54E;VAI SYLLABLE WA;Lo;0;L;;;;;N;;;;;
+ A54F;VAI SYLLABLE WAN;Lo;0;L;;;;;N;;;;;
+ A550;VAI SYLLABLE PA;Lo;0;L;;;;;N;;;;;
+ A551;VAI SYLLABLE BHA;Lo;0;L;;;;;N;;;;;
+ A552;VAI SYLLABLE BA;Lo;0;L;;;;;N;;;;;
+ A553;VAI SYLLABLE MBA;Lo;0;L;;;;;N;;;;;
+ A554;VAI SYLLABLE KPA;Lo;0;L;;;;;N;;;;;
+ A555;VAI SYLLABLE KPAN;Lo;0;L;;;;;N;;;;;
+ A556;VAI SYLLABLE MGBA;Lo;0;L;;;;;N;;;;;
+ A557;VAI SYLLABLE GBA;Lo;0;L;;;;;N;;;;;
+ A558;VAI SYLLABLE FA;Lo;0;L;;;;;N;;;;;
+ A559;VAI SYLLABLE VA;Lo;0;L;;;;;N;;;;;
+ A55A;VAI SYLLABLE TA;Lo;0;L;;;;;N;;;;;
+ A55B;VAI SYLLABLE THA;Lo;0;L;;;;;N;;;;;
+ A55C;VAI SYLLABLE DHA;Lo;0;L;;;;;N;;;;;
+ A55D;VAI SYLLABLE DHHA;Lo;0;L;;;;;N;;;;;
+ A55E;VAI SYLLABLE LA;Lo;0;L;;;;;N;;;;;
+ A55F;VAI SYLLABLE RA;Lo;0;L;;;;;N;;;;;
+ A560;VAI SYLLABLE DA;Lo;0;L;;;;;N;;;;;
+ A561;VAI SYLLABLE NDA;Lo;0;L;;;;;N;;;;;
+ A562;VAI SYLLABLE SA;Lo;0;L;;;;;N;;;;;
+ A563;VAI SYLLABLE SHA;Lo;0;L;;;;;N;;;;;
+ A564;VAI SYLLABLE ZA;Lo;0;L;;;;;N;;;;;
+ A565;VAI SYLLABLE ZHA;Lo;0;L;;;;;N;;;;;
+ A566;VAI SYLLABLE CA;Lo;0;L;;;;;N;;;;;
+ A567;VAI SYLLABLE JA;Lo;0;L;;;;;N;;;;;
+ A568;VAI SYLLABLE NJA;Lo;0;L;;;;;N;;;;;
+ A569;VAI SYLLABLE YA;Lo;0;L;;;;;N;;;;;
+ A56A;VAI SYLLABLE KA;Lo;0;L;;;;;N;;;;;
+ A56B;VAI SYLLABLE KAN;Lo;0;L;;;;;N;;;;;
+ A56C;VAI SYLLABLE NGGA;Lo;0;L;;;;;N;;;;;
+ A56D;VAI SYLLABLE GA;Lo;0;L;;;;;N;;;;;
+ A56E;VAI SYLLABLE MA;Lo;0;L;;;;;N;;;;;
+ A56F;VAI SYLLABLE NA;Lo;0;L;;;;;N;;;;;
+ A570;VAI SYLLABLE NYA;Lo;0;L;;;;;N;;;;;
+ A571;VAI SYLLABLE OO;Lo;0;L;;;;;N;;;;;
+ A572;VAI SYLLABLE OON;Lo;0;L;;;;;N;;;;;
+ A573;VAI SYLLABLE HOO;Lo;0;L;;;;;N;;;;;
+ A574;VAI SYLLABLE WOO;Lo;0;L;;;;;N;;;;;
+ A575;VAI SYLLABLE WOON;Lo;0;L;;;;;N;;;;;
+ A576;VAI SYLLABLE POO;Lo;0;L;;;;;N;;;;;
+ A577;VAI SYLLABLE BHOO;Lo;0;L;;;;;N;;;;;
+ A578;VAI SYLLABLE BOO;Lo;0;L;;;;;N;;;;;
+ A579;VAI SYLLABLE MBOO;Lo;0;L;;;;;N;;;;;
+ A57A;VAI SYLLABLE KPOO;Lo;0;L;;;;;N;;;;;
+ A57B;VAI SYLLABLE MGBOO;Lo;0;L;;;;;N;;;;;
+ A57C;VAI SYLLABLE GBOO;Lo;0;L;;;;;N;;;;;
+ A57D;VAI SYLLABLE FOO;Lo;0;L;;;;;N;;;;;
+ A57E;VAI SYLLABLE VOO;Lo;0;L;;;;;N;;;;;
+ A57F;VAI SYLLABLE TOO;Lo;0;L;;;;;N;;;;;
+ A580;VAI SYLLABLE THOO;Lo;0;L;;;;;N;;;;;
+ A581;VAI SYLLABLE DHOO;Lo;0;L;;;;;N;;;;;
+ A582;VAI SYLLABLE DHHOO;Lo;0;L;;;;;N;;;;;
+ A583;VAI SYLLABLE LOO;Lo;0;L;;;;;N;;;;;
+ A584;VAI SYLLABLE ROO;Lo;0;L;;;;;N;;;;;
+ A585;VAI SYLLABLE DOO;Lo;0;L;;;;;N;;;;;
+ A586;VAI SYLLABLE NDOO;Lo;0;L;;;;;N;;;;;
+ A587;VAI SYLLABLE SOO;Lo;0;L;;;;;N;;;;;
+ A588;VAI SYLLABLE SHOO;Lo;0;L;;;;;N;;;;;
+ A589;VAI SYLLABLE ZOO;Lo;0;L;;;;;N;;;;;
+ A58A;VAI SYLLABLE ZHOO;Lo;0;L;;;;;N;;;;;
+ A58B;VAI SYLLABLE COO;Lo;0;L;;;;;N;;;;;
+ A58C;VAI SYLLABLE JOO;Lo;0;L;;;;;N;;;;;
+ A58D;VAI SYLLABLE NJOO;Lo;0;L;;;;;N;;;;;
+ A58E;VAI SYLLABLE YOO;Lo;0;L;;;;;N;;;;;
+ A58F;VAI SYLLABLE KOO;Lo;0;L;;;;;N;;;;;
+ A590;VAI SYLLABLE NGGOO;Lo;0;L;;;;;N;;;;;
+ A591;VAI SYLLABLE GOO;Lo;0;L;;;;;N;;;;;
+ A592;VAI SYLLABLE MOO;Lo;0;L;;;;;N;;;;;
+ A593;VAI SYLLABLE NOO;Lo;0;L;;;;;N;;;;;
+ A594;VAI SYLLABLE NYOO;Lo;0;L;;;;;N;;;;;
+ A595;VAI SYLLABLE U;Lo;0;L;;;;;N;;;;;
+ A596;VAI SYLLABLE UN;Lo;0;L;;;;;N;;;;;
+ A597;VAI SYLLABLE HU;Lo;0;L;;;;;N;;;;;
+ A598;VAI SYLLABLE HUN;Lo;0;L;;;;;N;;;;;
+ A599;VAI SYLLABLE WU;Lo;0;L;;;;;N;;;;;
+ A59A;VAI SYLLABLE WUN;Lo;0;L;;;;;N;;;;;
+ A59B;VAI SYLLABLE PU;Lo;0;L;;;;;N;;;;;
+ A59C;VAI SYLLABLE BHU;Lo;0;L;;;;;N;;;;;
+ A59D;VAI SYLLABLE BU;Lo;0;L;;;;;N;;;;;
+ A59E;VAI SYLLABLE MBU;Lo;0;L;;;;;N;;;;;
+ A59F;VAI SYLLABLE KPU;Lo;0;L;;;;;N;;;;;
+ A5A0;VAI SYLLABLE MGBU;Lo;0;L;;;;;N;;;;;
+ A5A1;VAI SYLLABLE GBU;Lo;0;L;;;;;N;;;;;
+ A5A2;VAI SYLLABLE FU;Lo;0;L;;;;;N;;;;;
+ A5A3;VAI SYLLABLE VU;Lo;0;L;;;;;N;;;;;
+ A5A4;VAI SYLLABLE TU;Lo;0;L;;;;;N;;;;;
+ A5A5;VAI SYLLABLE THU;Lo;0;L;;;;;N;;;;;
+ A5A6;VAI SYLLABLE DHU;Lo;0;L;;;;;N;;;;;
+ A5A7;VAI SYLLABLE DHHU;Lo;0;L;;;;;N;;;;;
+ A5A8;VAI SYLLABLE LU;Lo;0;L;;;;;N;;;;;
+ A5A9;VAI SYLLABLE RU;Lo;0;L;;;;;N;;;;;
+ A5AA;VAI SYLLABLE DU;Lo;0;L;;;;;N;;;;;
+ A5AB;VAI SYLLABLE NDU;Lo;0;L;;;;;N;;;;;
+ A5AC;VAI SYLLABLE SU;Lo;0;L;;;;;N;;;;;
+ A5AD;VAI SYLLABLE SHU;Lo;0;L;;;;;N;;;;;
+ A5AE;VAI SYLLABLE ZU;Lo;0;L;;;;;N;;;;;
+ A5AF;VAI SYLLABLE ZHU;Lo;0;L;;;;;N;;;;;
+ A5B0;VAI SYLLABLE CU;Lo;0;L;;;;;N;;;;;
+ A5B1;VAI SYLLABLE JU;Lo;0;L;;;;;N;;;;;
+ A5B2;VAI SYLLABLE NJU;Lo;0;L;;;;;N;;;;;
+ A5B3;VAI SYLLABLE YU;Lo;0;L;;;;;N;;;;;
+ A5B4;VAI SYLLABLE KU;Lo;0;L;;;;;N;;;;;
+ A5B5;VAI SYLLABLE NGGU;Lo;0;L;;;;;N;;;;;
+ A5B6;VAI SYLLABLE GU;Lo;0;L;;;;;N;;;;;
+ A5B7;VAI SYLLABLE MU;Lo;0;L;;;;;N;;;;;
+ A5B8;VAI SYLLABLE NU;Lo;0;L;;;;;N;;;;;
+ A5B9;VAI SYLLABLE NYU;Lo;0;L;;;;;N;;;;;
+ A5BA;VAI SYLLABLE O;Lo;0;L;;;;;N;;;;;
+ A5BB;VAI SYLLABLE ON;Lo;0;L;;;;;N;;;;;
+ A5BC;VAI SYLLABLE NGON;Lo;0;L;;;;;N;;;;;
+ A5BD;VAI SYLLABLE HO;Lo;0;L;;;;;N;;;;;
+ A5BE;VAI SYLLABLE HON;Lo;0;L;;;;;N;;;;;
+ A5BF;VAI SYLLABLE WO;Lo;0;L;;;;;N;;;;;
+ A5C0;VAI SYLLABLE WON;Lo;0;L;;;;;N;;;;;
+ A5C1;VAI SYLLABLE PO;Lo;0;L;;;;;N;;;;;
+ A5C2;VAI SYLLABLE BHO;Lo;0;L;;;;;N;;;;;
+ A5C3;VAI SYLLABLE BO;Lo;0;L;;;;;N;;;;;
+ A5C4;VAI SYLLABLE MBO;Lo;0;L;;;;;N;;;;;
+ A5C5;VAI SYLLABLE KPO;Lo;0;L;;;;;N;;;;;
+ A5C6;VAI SYLLABLE MGBO;Lo;0;L;;;;;N;;;;;
+ A5C7;VAI SYLLABLE GBO;Lo;0;L;;;;;N;;;;;
+ A5C8;VAI SYLLABLE GBON;Lo;0;L;;;;;N;;;;;
+ A5C9;VAI SYLLABLE FO;Lo;0;L;;;;;N;;;;;
+ A5CA;VAI SYLLABLE VO;Lo;0;L;;;;;N;;;;;
+ A5CB;VAI SYLLABLE TO;Lo;0;L;;;;;N;;;;;
+ A5CC;VAI SYLLABLE THO;Lo;0;L;;;;;N;;;;;
+ A5CD;VAI SYLLABLE DHO;Lo;0;L;;;;;N;;;;;
+ A5CE;VAI SYLLABLE DHHO;Lo;0;L;;;;;N;;;;;
+ A5CF;VAI SYLLABLE LO;Lo;0;L;;;;;N;;;;;
+ A5D0;VAI SYLLABLE RO;Lo;0;L;;;;;N;;;;;
+ A5D1;VAI SYLLABLE DO;Lo;0;L;;;;;N;;;;;
+ A5D2;VAI SYLLABLE NDO;Lo;0;L;;;;;N;;;;;
+ A5D3;VAI SYLLABLE SO;Lo;0;L;;;;;N;;;;;
+ A5D4;VAI SYLLABLE SHO;Lo;0;L;;;;;N;;;;;
+ A5D5;VAI SYLLABLE ZO;Lo;0;L;;;;;N;;;;;
+ A5D6;VAI SYLLABLE ZHO;Lo;0;L;;;;;N;;;;;
+ A5D7;VAI SYLLABLE CO;Lo;0;L;;;;;N;;;;;
+ A5D8;VAI SYLLABLE JO;Lo;0;L;;;;;N;;;;;
+ A5D9;VAI SYLLABLE NJO;Lo;0;L;;;;;N;;;;;
+ A5DA;VAI SYLLABLE YO;Lo;0;L;;;;;N;;;;;
+ A5DB;VAI SYLLABLE KO;Lo;0;L;;;;;N;;;;;
+ A5DC;VAI SYLLABLE NGGO;Lo;0;L;;;;;N;;;;;
+ A5DD;VAI SYLLABLE GO;Lo;0;L;;;;;N;;;;;
+ A5DE;VAI SYLLABLE MO;Lo;0;L;;;;;N;;;;;
+ A5DF;VAI SYLLABLE NO;Lo;0;L;;;;;N;;;;;
+ A5E0;VAI SYLLABLE NYO;Lo;0;L;;;;;N;;;;;
+ A5E1;VAI SYLLABLE E;Lo;0;L;;;;;N;;;;;
+ A5E2;VAI SYLLABLE EN;Lo;0;L;;;;;N;;;;;
+ A5E3;VAI SYLLABLE NGEN;Lo;0;L;;;;;N;;;;;
+ A5E4;VAI SYLLABLE HE;Lo;0;L;;;;;N;;;;;
+ A5E5;VAI SYLLABLE HEN;Lo;0;L;;;;;N;;;;;
+ A5E6;VAI SYLLABLE WE;Lo;0;L;;;;;N;;;;;
+ A5E7;VAI SYLLABLE WEN;Lo;0;L;;;;;N;;;;;
+ A5E8;VAI SYLLABLE PE;Lo;0;L;;;;;N;;;;;
+ A5E9;VAI SYLLABLE BHE;Lo;0;L;;;;;N;;;;;
+ A5EA;VAI SYLLABLE BE;Lo;0;L;;;;;N;;;;;
+ A5EB;VAI SYLLABLE MBE;Lo;0;L;;;;;N;;;;;
+ A5EC;VAI SYLLABLE KPE;Lo;0;L;;;;;N;;;;;
+ A5ED;VAI SYLLABLE KPEN;Lo;0;L;;;;;N;;;;;
+ A5EE;VAI SYLLABLE MGBE;Lo;0;L;;;;;N;;;;;
+ A5EF;VAI SYLLABLE GBE;Lo;0;L;;;;;N;;;;;
+ A5F0;VAI SYLLABLE GBEN;Lo;0;L;;;;;N;;;;;
+ A5F1;VAI SYLLABLE FE;Lo;0;L;;;;;N;;;;;
+ A5F2;VAI SYLLABLE VE;Lo;0;L;;;;;N;;;;;
+ A5F3;VAI SYLLABLE TE;Lo;0;L;;;;;N;;;;;
+ A5F4;VAI SYLLABLE THE;Lo;0;L;;;;;N;;;;;
+ A5F5;VAI SYLLABLE DHE;Lo;0;L;;;;;N;;;;;
+ A5F6;VAI SYLLABLE DHHE;Lo;0;L;;;;;N;;;;;
+ A5F7;VAI SYLLABLE LE;Lo;0;L;;;;;N;;;;;
+ A5F8;VAI SYLLABLE RE;Lo;0;L;;;;;N;;;;;
+ A5F9;VAI SYLLABLE DE;Lo;0;L;;;;;N;;;;;
+ A5FA;VAI SYLLABLE NDE;Lo;0;L;;;;;N;;;;;
+ A5FB;VAI SYLLABLE SE;Lo;0;L;;;;;N;;;;;
+ A5FC;VAI SYLLABLE SHE;Lo;0;L;;;;;N;;;;;
+ A5FD;VAI SYLLABLE ZE;Lo;0;L;;;;;N;;;;;
+ A5FE;VAI SYLLABLE ZHE;Lo;0;L;;;;;N;;;;;
+ A5FF;VAI SYLLABLE CE;Lo;0;L;;;;;N;;;;;
+ A600;VAI SYLLABLE JE;Lo;0;L;;;;;N;;;;;
+ A601;VAI SYLLABLE NJE;Lo;0;L;;;;;N;;;;;
+ A602;VAI SYLLABLE YE;Lo;0;L;;;;;N;;;;;
+ A603;VAI SYLLABLE KE;Lo;0;L;;;;;N;;;;;
+ A604;VAI SYLLABLE NGGE;Lo;0;L;;;;;N;;;;;
+ A605;VAI SYLLABLE NGGEN;Lo;0;L;;;;;N;;;;;
+ A606;VAI SYLLABLE GE;Lo;0;L;;;;;N;;;;;
+ A607;VAI SYLLABLE GEN;Lo;0;L;;;;;N;;;;;
+ A608;VAI SYLLABLE ME;Lo;0;L;;;;;N;;;;;
+ A609;VAI SYLLABLE NE;Lo;0;L;;;;;N;;;;;
+ A60A;VAI SYLLABLE NYE;Lo;0;L;;;;;N;;;;;
+ A60B;VAI SYLLABLE NG;Lo;0;L;;;;;N;;;;;
+ A60C;VAI SYLLABLE LENGTHENER;Lm;0;L;;;;;N;;;;;
+ A60D;VAI COMMA;Po;0;ON;;;;;N;;;;;
+ A60E;VAI FULL STOP;Po;0;ON;;;;;N;;;;;
+ A60F;VAI QUESTION MARK;Po;0;ON;;;;;N;;;;;
+ A610;VAI SYLLABLE NDOLE FA;Lo;0;L;;;;;N;;;;;
+ A611;VAI SYLLABLE NDOLE KA;Lo;0;L;;;;;N;;;;;
+ A612;VAI SYLLABLE NDOLE SOO;Lo;0;L;;;;;N;;;;;
+ A613;VAI SYMBOL FEENG;Lo;0;L;;;;;N;;;;;
+ A614;VAI SYMBOL KEENG;Lo;0;L;;;;;N;;;;;
+ A615;VAI SYMBOL TING;Lo;0;L;;;;;N;;;;;
+ A616;VAI SYMBOL NII;Lo;0;L;;;;;N;;;;;
+ A617;VAI SYMBOL BANG;Lo;0;L;;;;;N;;;;;
+ A618;VAI SYMBOL FAA;Lo;0;L;;;;;N;;;;;
+ A619;VAI SYMBOL TAA;Lo;0;L;;;;;N;;;;;
+ A61A;VAI SYMBOL DANG;Lo;0;L;;;;;N;;;;;
+ A61B;VAI SYMBOL DOONG;Lo;0;L;;;;;N;;;;;
+ A61C;VAI SYMBOL KUNG;Lo;0;L;;;;;N;;;;;
+ A61D;VAI SYMBOL TONG;Lo;0;L;;;;;N;;;;;
+ A61E;VAI SYMBOL DO-O;Lo;0;L;;;;;N;;;;;
+ A61F;VAI SYMBOL JONG;Lo;0;L;;;;;N;;;;;
+ A620;VAI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ A621;VAI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ A622;VAI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ A623;VAI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ A624;VAI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ A625;VAI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ A626;VAI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ A627;VAI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ A628;VAI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ A629;VAI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ A62A;VAI SYLLABLE NDOLE MA;Lo;0;L;;;;;N;;;;;
+ A62B;VAI SYLLABLE NDOLE DO;Lo;0;L;;;;;N;;;;;
+ A640;CYRILLIC CAPITAL LETTER ZEMLYA;Lu;0;L;;;;;N;;;;A641;
+ A641;CYRILLIC SMALL LETTER ZEMLYA;Ll;0;L;;;;;N;;;A640;;A640
+ A642;CYRILLIC CAPITAL LETTER DZELO;Lu;0;L;;;;;N;;;;A643;
+ A643;CYRILLIC SMALL LETTER DZELO;Ll;0;L;;;;;N;;;A642;;A642
+ A644;CYRILLIC CAPITAL LETTER REVERSED DZE;Lu;0;L;;;;;N;;;;A645;
+ A645;CYRILLIC SMALL LETTER REVERSED DZE;Ll;0;L;;;;;N;;;A644;;A644
+ A646;CYRILLIC CAPITAL LETTER IOTA;Lu;0;L;;;;;N;;;;A647;
+ A647;CYRILLIC SMALL LETTER IOTA;Ll;0;L;;;;;N;;;A646;;A646
+ A648;CYRILLIC CAPITAL LETTER DJERV;Lu;0;L;;;;;N;;;;A649;
+ A649;CYRILLIC SMALL LETTER DJERV;Ll;0;L;;;;;N;;;A648;;A648
+ A64A;CYRILLIC CAPITAL LETTER MONOGRAPH UK;Lu;0;L;;;;;N;;;;A64B;
+ A64B;CYRILLIC SMALL LETTER MONOGRAPH UK;Ll;0;L;;;;;N;;;A64A;;A64A
+ A64C;CYRILLIC CAPITAL LETTER BROAD OMEGA;Lu;0;L;;;;;N;;;;A64D;
+ A64D;CYRILLIC SMALL LETTER BROAD OMEGA;Ll;0;L;;;;;N;;;A64C;;A64C
+ A64E;CYRILLIC CAPITAL LETTER NEUTRAL YER;Lu;0;L;;;;;N;;;;A64F;
+ A64F;CYRILLIC SMALL LETTER NEUTRAL YER;Ll;0;L;;;;;N;;;A64E;;A64E
+ A650;CYRILLIC CAPITAL LETTER YERU WITH BACK YER;Lu;0;L;;;;;N;;;;A651;
+ A651;CYRILLIC SMALL LETTER YERU WITH BACK YER;Ll;0;L;;;;;N;;;A650;;A650
+ A652;CYRILLIC CAPITAL LETTER IOTIFIED YAT;Lu;0;L;;;;;N;;;;A653;
+ A653;CYRILLIC SMALL LETTER IOTIFIED YAT;Ll;0;L;;;;;N;;;A652;;A652
+ A654;CYRILLIC CAPITAL LETTER REVERSED YU;Lu;0;L;;;;;N;;;;A655;
+ A655;CYRILLIC SMALL LETTER REVERSED YU;Ll;0;L;;;;;N;;;A654;;A654
+ A656;CYRILLIC CAPITAL LETTER IOTIFIED A;Lu;0;L;;;;;N;;;;A657;
+ A657;CYRILLIC SMALL LETTER IOTIFIED A;Ll;0;L;;;;;N;;;A656;;A656
+ A658;CYRILLIC CAPITAL LETTER CLOSED LITTLE YUS;Lu;0;L;;;;;N;;;;A659;
+ A659;CYRILLIC SMALL LETTER CLOSED LITTLE YUS;Ll;0;L;;;;;N;;;A658;;A658
+ A65A;CYRILLIC CAPITAL LETTER BLENDED YUS;Lu;0;L;;;;;N;;;;A65B;
+ A65B;CYRILLIC SMALL LETTER BLENDED YUS;Ll;0;L;;;;;N;;;A65A;;A65A
+ A65C;CYRILLIC CAPITAL LETTER IOTIFIED CLOSED LITTLE YUS;Lu;0;L;;;;;N;;;;A65D;
+ A65D;CYRILLIC SMALL LETTER IOTIFIED CLOSED LITTLE YUS;Ll;0;L;;;;;N;;;A65C;;A65C
+ A65E;CYRILLIC CAPITAL LETTER YN;Lu;0;L;;;;;N;;;;A65F;
+ A65F;CYRILLIC SMALL LETTER YN;Ll;0;L;;;;;N;;;A65E;;A65E
+ A660;CYRILLIC CAPITAL LETTER REVERSED TSE;Lu;0;L;;;;;N;;;;A661;
+ A661;CYRILLIC SMALL LETTER REVERSED TSE;Ll;0;L;;;;;N;;;A660;;A660
+ A662;CYRILLIC CAPITAL LETTER SOFT DE;Lu;0;L;;;;;N;;;;A663;
+ A663;CYRILLIC SMALL LETTER SOFT DE;Ll;0;L;;;;;N;;;A662;;A662
+ A664;CYRILLIC CAPITAL LETTER SOFT EL;Lu;0;L;;;;;N;;;;A665;
+ A665;CYRILLIC SMALL LETTER SOFT EL;Ll;0;L;;;;;N;;;A664;;A664
+ A666;CYRILLIC CAPITAL LETTER SOFT EM;Lu;0;L;;;;;N;;;;A667;
+ A667;CYRILLIC SMALL LETTER SOFT EM;Ll;0;L;;;;;N;;;A666;;A666
+ A668;CYRILLIC CAPITAL LETTER MONOCULAR O;Lu;0;L;;;;;N;;;;A669;
+ A669;CYRILLIC SMALL LETTER MONOCULAR O;Ll;0;L;;;;;N;;;A668;;A668
+ A66A;CYRILLIC CAPITAL LETTER BINOCULAR O;Lu;0;L;;;;;N;;;;A66B;
+ A66B;CYRILLIC SMALL LETTER BINOCULAR O;Ll;0;L;;;;;N;;;A66A;;A66A
+ A66C;CYRILLIC CAPITAL LETTER DOUBLE MONOCULAR O;Lu;0;L;;;;;N;;;;A66D;
+ A66D;CYRILLIC SMALL LETTER DOUBLE MONOCULAR O;Ll;0;L;;;;;N;;;A66C;;A66C
+ A66E;CYRILLIC LETTER MULTIOCULAR O;Lo;0;L;;;;;N;;;;;
+ A66F;COMBINING CYRILLIC VZMET;Mn;230;NSM;;;;;N;;;;;
+ A670;COMBINING CYRILLIC TEN MILLIONS SIGN;Me;0;NSM;;;;;N;;;;;
+ A671;COMBINING CYRILLIC HUNDRED MILLIONS SIGN;Me;0;NSM;;;;;N;;;;;
+ A672;COMBINING CYRILLIC THOUSAND MILLIONS SIGN;Me;0;NSM;;;;;N;;;;;
+ A673;SLAVONIC ASTERISK;Po;0;ON;;;;;N;;;;;
+ A674;COMBINING CYRILLIC LETTER UKRAINIAN IE;Mn;230;NSM;;;;;N;;;;;
+ A675;COMBINING CYRILLIC LETTER I;Mn;230;NSM;;;;;N;;;;;
+ A676;COMBINING CYRILLIC LETTER YI;Mn;230;NSM;;;;;N;;;;;
+ A677;COMBINING CYRILLIC LETTER U;Mn;230;NSM;;;;;N;;;;;
+ A678;COMBINING CYRILLIC LETTER HARD SIGN;Mn;230;NSM;;;;;N;;;;;
+ A679;COMBINING CYRILLIC LETTER YERU;Mn;230;NSM;;;;;N;;;;;
+ A67A;COMBINING CYRILLIC LETTER SOFT SIGN;Mn;230;NSM;;;;;N;;;;;
+ A67B;COMBINING CYRILLIC LETTER OMEGA;Mn;230;NSM;;;;;N;;;;;
+ A67C;COMBINING CYRILLIC KAVYKA;Mn;230;NSM;;;;;N;;;;;
+ A67D;COMBINING CYRILLIC PAYEROK;Mn;230;NSM;;;;;N;;;;;
+ A67E;CYRILLIC KAVYKA;Po;0;ON;;;;;N;;;;;
+ A67F;CYRILLIC PAYEROK;Lm;0;ON;;;;;N;;;;;
+ A680;CYRILLIC CAPITAL LETTER DWE;Lu;0;L;;;;;N;;;;A681;
+ A681;CYRILLIC SMALL LETTER DWE;Ll;0;L;;;;;N;;;A680;;A680
+ A682;CYRILLIC CAPITAL LETTER DZWE;Lu;0;L;;;;;N;;;;A683;
+ A683;CYRILLIC SMALL LETTER DZWE;Ll;0;L;;;;;N;;;A682;;A682
+ A684;CYRILLIC CAPITAL LETTER ZHWE;Lu;0;L;;;;;N;;;;A685;
+ A685;CYRILLIC SMALL LETTER ZHWE;Ll;0;L;;;;;N;;;A684;;A684
+ A686;CYRILLIC CAPITAL LETTER CCHE;Lu;0;L;;;;;N;;;;A687;
+ A687;CYRILLIC SMALL LETTER CCHE;Ll;0;L;;;;;N;;;A686;;A686
+ A688;CYRILLIC CAPITAL LETTER DZZE;Lu;0;L;;;;;N;;;;A689;
+ A689;CYRILLIC SMALL LETTER DZZE;Ll;0;L;;;;;N;;;A688;;A688
+ A68A;CYRILLIC CAPITAL LETTER TE WITH MIDDLE HOOK;Lu;0;L;;;;;N;;;;A68B;
+ A68B;CYRILLIC SMALL LETTER TE WITH MIDDLE HOOK;Ll;0;L;;;;;N;;;A68A;;A68A
+ A68C;CYRILLIC CAPITAL LETTER TWE;Lu;0;L;;;;;N;;;;A68D;
+ A68D;CYRILLIC SMALL LETTER TWE;Ll;0;L;;;;;N;;;A68C;;A68C
+ A68E;CYRILLIC CAPITAL LETTER TSWE;Lu;0;L;;;;;N;;;;A68F;
+ A68F;CYRILLIC SMALL LETTER TSWE;Ll;0;L;;;;;N;;;A68E;;A68E
+ A690;CYRILLIC CAPITAL LETTER TSSE;Lu;0;L;;;;;N;;;;A691;
+ A691;CYRILLIC SMALL LETTER TSSE;Ll;0;L;;;;;N;;;A690;;A690
+ A692;CYRILLIC CAPITAL LETTER TCHE;Lu;0;L;;;;;N;;;;A693;
+ A693;CYRILLIC SMALL LETTER TCHE;Ll;0;L;;;;;N;;;A692;;A692
+ A694;CYRILLIC CAPITAL LETTER HWE;Lu;0;L;;;;;N;;;;A695;
+ A695;CYRILLIC SMALL LETTER HWE;Ll;0;L;;;;;N;;;A694;;A694
+ A696;CYRILLIC CAPITAL LETTER SHWE;Lu;0;L;;;;;N;;;;A697;
+ A697;CYRILLIC SMALL LETTER SHWE;Ll;0;L;;;;;N;;;A696;;A696
+ A698;CYRILLIC CAPITAL LETTER DOUBLE O;Lu;0;L;;;;;N;;;;A699;
+ A699;CYRILLIC SMALL LETTER DOUBLE O;Ll;0;L;;;;;N;;;A698;;A698
+ A69A;CYRILLIC CAPITAL LETTER CROSSED O;Lu;0;L;;;;;N;;;;A69B;
+ A69B;CYRILLIC SMALL LETTER CROSSED O;Ll;0;L;;;;;N;;;A69A;;A69A
+ A69C;MODIFIER LETTER CYRILLIC HARD SIGN;Lm;0;L;<super> 044A;;;;N;;;;;
+ A69D;MODIFIER LETTER CYRILLIC SOFT SIGN;Lm;0;L;<super> 044C;;;;N;;;;;
+ A69E;COMBINING CYRILLIC LETTER EF;Mn;230;NSM;;;;;N;;;;;
+ A69F;COMBINING CYRILLIC LETTER IOTIFIED E;Mn;230;NSM;;;;;N;;;;;
+ A6A0;BAMUM LETTER A;Lo;0;L;;;;;N;;;;;
+ A6A1;BAMUM LETTER KA;Lo;0;L;;;;;N;;;;;
+ A6A2;BAMUM LETTER U;Lo;0;L;;;;;N;;;;;
+ A6A3;BAMUM LETTER KU;Lo;0;L;;;;;N;;;;;
+ A6A4;BAMUM LETTER EE;Lo;0;L;;;;;N;;;;;
+ A6A5;BAMUM LETTER REE;Lo;0;L;;;;;N;;;;;
+ A6A6;BAMUM LETTER TAE;Lo;0;L;;;;;N;;;;;
+ A6A7;BAMUM LETTER O;Lo;0;L;;;;;N;;;;;
+ A6A8;BAMUM LETTER NYI;Lo;0;L;;;;;N;;;;;
+ A6A9;BAMUM LETTER I;Lo;0;L;;;;;N;;;;;
+ A6AA;BAMUM LETTER LA;Lo;0;L;;;;;N;;;;;
+ A6AB;BAMUM LETTER PA;Lo;0;L;;;;;N;;;;;
+ A6AC;BAMUM LETTER RII;Lo;0;L;;;;;N;;;;;
+ A6AD;BAMUM LETTER RIEE;Lo;0;L;;;;;N;;;;;
+ A6AE;BAMUM LETTER LEEEE;Lo;0;L;;;;;N;;;;;
+ A6AF;BAMUM LETTER MEEEE;Lo;0;L;;;;;N;;;;;
+ A6B0;BAMUM LETTER TAA;Lo;0;L;;;;;N;;;;;
+ A6B1;BAMUM LETTER NDAA;Lo;0;L;;;;;N;;;;;
+ A6B2;BAMUM LETTER NJAEM;Lo;0;L;;;;;N;;;;;
+ A6B3;BAMUM LETTER M;Lo;0;L;;;;;N;;;;;
+ A6B4;BAMUM LETTER SUU;Lo;0;L;;;;;N;;;;;
+ A6B5;BAMUM LETTER MU;Lo;0;L;;;;;N;;;;;
+ A6B6;BAMUM LETTER SHII;Lo;0;L;;;;;N;;;;;
+ A6B7;BAMUM LETTER SI;Lo;0;L;;;;;N;;;;;
+ A6B8;BAMUM LETTER SHEUX;Lo;0;L;;;;;N;;;;;
+ A6B9;BAMUM LETTER SEUX;Lo;0;L;;;;;N;;;;;
+ A6BA;BAMUM LETTER KYEE;Lo;0;L;;;;;N;;;;;
+ A6BB;BAMUM LETTER KET;Lo;0;L;;;;;N;;;;;
+ A6BC;BAMUM LETTER NUAE;Lo;0;L;;;;;N;;;;;
+ A6BD;BAMUM LETTER NU;Lo;0;L;;;;;N;;;;;
+ A6BE;BAMUM LETTER NJUAE;Lo;0;L;;;;;N;;;;;
+ A6BF;BAMUM LETTER YOQ;Lo;0;L;;;;;N;;;;;
+ A6C0;BAMUM LETTER SHU;Lo;0;L;;;;;N;;;;;
+ A6C1;BAMUM LETTER YUQ;Lo;0;L;;;;;N;;;;;
+ A6C2;BAMUM LETTER YA;Lo;0;L;;;;;N;;;;;
+ A6C3;BAMUM LETTER NSHA;Lo;0;L;;;;;N;;;;;
+ A6C4;BAMUM LETTER KEUX;Lo;0;L;;;;;N;;;;;
+ A6C5;BAMUM LETTER PEUX;Lo;0;L;;;;;N;;;;;
+ A6C6;BAMUM LETTER NJEE;Lo;0;L;;;;;N;;;;;
+ A6C7;BAMUM LETTER NTEE;Lo;0;L;;;;;N;;;;;
+ A6C8;BAMUM LETTER PUE;Lo;0;L;;;;;N;;;;;
+ A6C9;BAMUM LETTER WUE;Lo;0;L;;;;;N;;;;;
+ A6CA;BAMUM LETTER PEE;Lo;0;L;;;;;N;;;;;
+ A6CB;BAMUM LETTER FEE;Lo;0;L;;;;;N;;;;;
+ A6CC;BAMUM LETTER RU;Lo;0;L;;;;;N;;;;;
+ A6CD;BAMUM LETTER LU;Lo;0;L;;;;;N;;;;;
+ A6CE;BAMUM LETTER MI;Lo;0;L;;;;;N;;;;;
+ A6CF;BAMUM LETTER NI;Lo;0;L;;;;;N;;;;;
+ A6D0;BAMUM LETTER REUX;Lo;0;L;;;;;N;;;;;
+ A6D1;BAMUM LETTER RAE;Lo;0;L;;;;;N;;;;;
+ A6D2;BAMUM LETTER KEN;Lo;0;L;;;;;N;;;;;
+ A6D3;BAMUM LETTER NGKWAEN;Lo;0;L;;;;;N;;;;;
+ A6D4;BAMUM LETTER NGGA;Lo;0;L;;;;;N;;;;;
+ A6D5;BAMUM LETTER NGA;Lo;0;L;;;;;N;;;;;
+ A6D6;BAMUM LETTER SHO;Lo;0;L;;;;;N;;;;;
+ A6D7;BAMUM LETTER PUAE;Lo;0;L;;;;;N;;;;;
+ A6D8;BAMUM LETTER FU;Lo;0;L;;;;;N;;;;;
+ A6D9;BAMUM LETTER FOM;Lo;0;L;;;;;N;;;;;
+ A6DA;BAMUM LETTER WA;Lo;0;L;;;;;N;;;;;
+ A6DB;BAMUM LETTER NA;Lo;0;L;;;;;N;;;;;
+ A6DC;BAMUM LETTER LI;Lo;0;L;;;;;N;;;;;
+ A6DD;BAMUM LETTER PI;Lo;0;L;;;;;N;;;;;
+ A6DE;BAMUM LETTER LOQ;Lo;0;L;;;;;N;;;;;
+ A6DF;BAMUM LETTER KO;Lo;0;L;;;;;N;;;;;
+ A6E0;BAMUM LETTER MBEN;Lo;0;L;;;;;N;;;;;
+ A6E1;BAMUM LETTER REN;Lo;0;L;;;;;N;;;;;
+ A6E2;BAMUM LETTER MEN;Lo;0;L;;;;;N;;;;;
+ A6E3;BAMUM LETTER MA;Lo;0;L;;;;;N;;;;;
+ A6E4;BAMUM LETTER TI;Lo;0;L;;;;;N;;;;;
+ A6E5;BAMUM LETTER KI;Lo;0;L;;;;;N;;;;;
+ A6E6;BAMUM LETTER MO;Nl;0;L;;;;1;N;;;;;
+ A6E7;BAMUM LETTER MBAA;Nl;0;L;;;;2;N;;;;;
+ A6E8;BAMUM LETTER TET;Nl;0;L;;;;3;N;;;;;
+ A6E9;BAMUM LETTER KPA;Nl;0;L;;;;4;N;;;;;
+ A6EA;BAMUM LETTER TEN;Nl;0;L;;;;5;N;;;;;
+ A6EB;BAMUM LETTER NTUU;Nl;0;L;;;;6;N;;;;;
+ A6EC;BAMUM LETTER SAMBA;Nl;0;L;;;;7;N;;;;;
+ A6ED;BAMUM LETTER FAAMAE;Nl;0;L;;;;8;N;;;;;
+ A6EE;BAMUM LETTER KOVUU;Nl;0;L;;;;9;N;;;;;
+ A6EF;BAMUM LETTER KOGHOM;Nl;0;L;;;;0;N;;;;;
+ A6F0;BAMUM COMBINING MARK KOQNDON;Mn;230;NSM;;;;;N;;;;;
+ A6F1;BAMUM COMBINING MARK TUKWENTIS;Mn;230;NSM;;;;;N;;;;;
+ A6F2;BAMUM NJAEMLI;Po;0;L;;;;;N;;;;;
+ A6F3;BAMUM FULL STOP;Po;0;L;;;;;N;;;;;
+ A6F4;BAMUM COLON;Po;0;L;;;;;N;;;;;
+ A6F5;BAMUM COMMA;Po;0;L;;;;;N;;;;;
+ A6F6;BAMUM SEMICOLON;Po;0;L;;;;;N;;;;;
+ A6F7;BAMUM QUESTION MARK;Po;0;L;;;;;N;;;;;
+ A700;MODIFIER LETTER CHINESE TONE YIN PING;Sk;0;ON;;;;;N;;;;;
+ A701;MODIFIER LETTER CHINESE TONE YANG PING;Sk;0;ON;;;;;N;;;;;
+ A702;MODIFIER LETTER CHINESE TONE YIN SHANG;Sk;0;ON;;;;;N;;;;;
+ A703;MODIFIER LETTER CHINESE TONE YANG SHANG;Sk;0;ON;;;;;N;;;;;
+ A704;MODIFIER LETTER CHINESE TONE YIN QU;Sk;0;ON;;;;;N;;;;;
+ A705;MODIFIER LETTER CHINESE TONE YANG QU;Sk;0;ON;;;;;N;;;;;
+ A706;MODIFIER LETTER CHINESE TONE YIN RU;Sk;0;ON;;;;;N;;;;;
+ A707;MODIFIER LETTER CHINESE TONE YANG RU;Sk;0;ON;;;;;N;;;;;
+ A708;MODIFIER LETTER EXTRA-HIGH DOTTED TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A709;MODIFIER LETTER HIGH DOTTED TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A70A;MODIFIER LETTER MID DOTTED TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A70B;MODIFIER LETTER LOW DOTTED TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A70C;MODIFIER LETTER EXTRA-LOW DOTTED TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A70D;MODIFIER LETTER EXTRA-HIGH DOTTED LEFT-STEM TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A70E;MODIFIER LETTER HIGH DOTTED LEFT-STEM TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A70F;MODIFIER LETTER MID DOTTED LEFT-STEM TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A710;MODIFIER LETTER LOW DOTTED LEFT-STEM TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A711;MODIFIER LETTER EXTRA-LOW DOTTED LEFT-STEM TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A712;MODIFIER LETTER EXTRA-HIGH LEFT-STEM TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A713;MODIFIER LETTER HIGH LEFT-STEM TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A714;MODIFIER LETTER MID LEFT-STEM TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A715;MODIFIER LETTER LOW LEFT-STEM TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A716;MODIFIER LETTER EXTRA-LOW LEFT-STEM TONE BAR;Sk;0;ON;;;;;N;;;;;
+ A717;MODIFIER LETTER DOT VERTICAL BAR;Lm;0;ON;;;;;N;;;;;
+ A718;MODIFIER LETTER DOT SLASH;Lm;0;ON;;;;;N;;;;;
+ A719;MODIFIER LETTER DOT HORIZONTAL BAR;Lm;0;ON;;;;;N;;;;;
+ A71A;MODIFIER LETTER LOWER RIGHT CORNER ANGLE;Lm;0;ON;;;;;N;;;;;
+ A71B;MODIFIER LETTER RAISED UP ARROW;Lm;0;ON;;;;;N;;;;;
+ A71C;MODIFIER LETTER RAISED DOWN ARROW;Lm;0;ON;;;;;N;;;;;
+ A71D;MODIFIER LETTER RAISED EXCLAMATION MARK;Lm;0;ON;;;;;N;;;;;
+ A71E;MODIFIER LETTER RAISED INVERTED EXCLAMATION MARK;Lm;0;ON;;;;;N;;;;;
+ A71F;MODIFIER LETTER LOW INVERTED EXCLAMATION MARK;Lm;0;ON;;;;;N;;;;;
+ A720;MODIFIER LETTER STRESS AND HIGH TONE;Sk;0;ON;;;;;N;;;;;
+ A721;MODIFIER LETTER STRESS AND LOW TONE;Sk;0;ON;;;;;N;;;;;
+ A722;LATIN CAPITAL LETTER EGYPTOLOGICAL ALEF;Lu;0;L;;;;;N;;;;A723;
+ A723;LATIN SMALL LETTER EGYPTOLOGICAL ALEF;Ll;0;L;;;;;N;;;A722;;A722
+ A724;LATIN CAPITAL LETTER EGYPTOLOGICAL AIN;Lu;0;L;;;;;N;;;;A725;
+ A725;LATIN SMALL LETTER EGYPTOLOGICAL AIN;Ll;0;L;;;;;N;;;A724;;A724
+ A726;LATIN CAPITAL LETTER HENG;Lu;0;L;;;;;N;;;;A727;
+ A727;LATIN SMALL LETTER HENG;Ll;0;L;;;;;N;;;A726;;A726
+ A728;LATIN CAPITAL LETTER TZ;Lu;0;L;;;;;N;;;;A729;
+ A729;LATIN SMALL LETTER TZ;Ll;0;L;;;;;N;;;A728;;A728
+ A72A;LATIN CAPITAL LETTER TRESILLO;Lu;0;L;;;;;N;;;;A72B;
+ A72B;LATIN SMALL LETTER TRESILLO;Ll;0;L;;;;;N;;;A72A;;A72A
+ A72C;LATIN CAPITAL LETTER CUATRILLO;Lu;0;L;;;;;N;;;;A72D;
+ A72D;LATIN SMALL LETTER CUATRILLO;Ll;0;L;;;;;N;;;A72C;;A72C
+ A72E;LATIN CAPITAL LETTER CUATRILLO WITH COMMA;Lu;0;L;;;;;N;;;;A72F;
+ A72F;LATIN SMALL LETTER CUATRILLO WITH COMMA;Ll;0;L;;;;;N;;;A72E;;A72E
+ A730;LATIN LETTER SMALL CAPITAL F;Ll;0;L;;;;;N;;;;;
+ A731;LATIN LETTER SMALL CAPITAL S;Ll;0;L;;;;;N;;;;;
+ A732;LATIN CAPITAL LETTER AA;Lu;0;L;;;;;N;;;;A733;
+ A733;LATIN SMALL LETTER AA;Ll;0;L;;;;;N;;;A732;;A732
+ A734;LATIN CAPITAL LETTER AO;Lu;0;L;;;;;N;;;;A735;
+ A735;LATIN SMALL LETTER AO;Ll;0;L;;;;;N;;;A734;;A734
+ A736;LATIN CAPITAL LETTER AU;Lu;0;L;;;;;N;;;;A737;
+ A737;LATIN SMALL LETTER AU;Ll;0;L;;;;;N;;;A736;;A736
+ A738;LATIN CAPITAL LETTER AV;Lu;0;L;;;;;N;;;;A739;
+ A739;LATIN SMALL LETTER AV;Ll;0;L;;;;;N;;;A738;;A738
+ A73A;LATIN CAPITAL LETTER AV WITH HORIZONTAL BAR;Lu;0;L;;;;;N;;;;A73B;
+ A73B;LATIN SMALL LETTER AV WITH HORIZONTAL BAR;Ll;0;L;;;;;N;;;A73A;;A73A
+ A73C;LATIN CAPITAL LETTER AY;Lu;0;L;;;;;N;;;;A73D;
+ A73D;LATIN SMALL LETTER AY;Ll;0;L;;;;;N;;;A73C;;A73C
+ A73E;LATIN CAPITAL LETTER REVERSED C WITH DOT;Lu;0;L;;;;;N;;;;A73F;
+ A73F;LATIN SMALL LETTER REVERSED C WITH DOT;Ll;0;L;;;;;N;;;A73E;;A73E
+ A740;LATIN CAPITAL LETTER K WITH STROKE;Lu;0;L;;;;;N;;;;A741;
+ A741;LATIN SMALL LETTER K WITH STROKE;Ll;0;L;;;;;N;;;A740;;A740
+ A742;LATIN CAPITAL LETTER K WITH DIAGONAL STROKE;Lu;0;L;;;;;N;;;;A743;
+ A743;LATIN SMALL LETTER K WITH DIAGONAL STROKE;Ll;0;L;;;;;N;;;A742;;A742
+ A744;LATIN CAPITAL LETTER K WITH STROKE AND DIAGONAL STROKE;Lu;0;L;;;;;N;;;;A745;
+ A745;LATIN SMALL LETTER K WITH STROKE AND DIAGONAL STROKE;Ll;0;L;;;;;N;;;A744;;A744
+ A746;LATIN CAPITAL LETTER BROKEN L;Lu;0;L;;;;;N;;;;A747;
+ A747;LATIN SMALL LETTER BROKEN L;Ll;0;L;;;;;N;;;A746;;A746
+ A748;LATIN CAPITAL LETTER L WITH HIGH STROKE;Lu;0;L;;;;;N;;;;A749;
+ A749;LATIN SMALL LETTER L WITH HIGH STROKE;Ll;0;L;;;;;N;;;A748;;A748
+ A74A;LATIN CAPITAL LETTER O WITH LONG STROKE OVERLAY;Lu;0;L;;;;;N;;;;A74B;
+ A74B;LATIN SMALL LETTER O WITH LONG STROKE OVERLAY;Ll;0;L;;;;;N;;;A74A;;A74A
+ A74C;LATIN CAPITAL LETTER O WITH LOOP;Lu;0;L;;;;;N;;;;A74D;
+ A74D;LATIN SMALL LETTER O WITH LOOP;Ll;0;L;;;;;N;;;A74C;;A74C
+ A74E;LATIN CAPITAL LETTER OO;Lu;0;L;;;;;N;;;;A74F;
+ A74F;LATIN SMALL LETTER OO;Ll;0;L;;;;;N;;;A74E;;A74E
+ A750;LATIN CAPITAL LETTER P WITH STROKE THROUGH DESCENDER;Lu;0;L;;;;;N;;;;A751;
+ A751;LATIN SMALL LETTER P WITH STROKE THROUGH DESCENDER;Ll;0;L;;;;;N;;;A750;;A750
+ A752;LATIN CAPITAL LETTER P WITH FLOURISH;Lu;0;L;;;;;N;;;;A753;
+ A753;LATIN SMALL LETTER P WITH FLOURISH;Ll;0;L;;;;;N;;;A752;;A752
+ A754;LATIN CAPITAL LETTER P WITH SQUIRREL TAIL;Lu;0;L;;;;;N;;;;A755;
+ A755;LATIN SMALL LETTER P WITH SQUIRREL TAIL;Ll;0;L;;;;;N;;;A754;;A754
+ A756;LATIN CAPITAL LETTER Q WITH STROKE THROUGH DESCENDER;Lu;0;L;;;;;N;;;;A757;
+ A757;LATIN SMALL LETTER Q WITH STROKE THROUGH DESCENDER;Ll;0;L;;;;;N;;;A756;;A756
+ A758;LATIN CAPITAL LETTER Q WITH DIAGONAL STROKE;Lu;0;L;;;;;N;;;;A759;
+ A759;LATIN SMALL LETTER Q WITH DIAGONAL STROKE;Ll;0;L;;;;;N;;;A758;;A758
+ A75A;LATIN CAPITAL LETTER R ROTUNDA;Lu;0;L;;;;;N;;;;A75B;
+ A75B;LATIN SMALL LETTER R ROTUNDA;Ll;0;L;;;;;N;;;A75A;;A75A
+ A75C;LATIN CAPITAL LETTER RUM ROTUNDA;Lu;0;L;;;;;N;;;;A75D;
+ A75D;LATIN SMALL LETTER RUM ROTUNDA;Ll;0;L;;;;;N;;;A75C;;A75C
+ A75E;LATIN CAPITAL LETTER V WITH DIAGONAL STROKE;Lu;0;L;;;;;N;;;;A75F;
+ A75F;LATIN SMALL LETTER V WITH DIAGONAL STROKE;Ll;0;L;;;;;N;;;A75E;;A75E
+ A760;LATIN CAPITAL LETTER VY;Lu;0;L;;;;;N;;;;A761;
+ A761;LATIN SMALL LETTER VY;Ll;0;L;;;;;N;;;A760;;A760
+ A762;LATIN CAPITAL LETTER VISIGOTHIC Z;Lu;0;L;;;;;N;;;;A763;
+ A763;LATIN SMALL LETTER VISIGOTHIC Z;Ll;0;L;;;;;N;;;A762;;A762
+ A764;LATIN CAPITAL LETTER THORN WITH STROKE;Lu;0;L;;;;;N;;;;A765;
+ A765;LATIN SMALL LETTER THORN WITH STROKE;Ll;0;L;;;;;N;;;A764;;A764
+ A766;LATIN CAPITAL LETTER THORN WITH STROKE THROUGH DESCENDER;Lu;0;L;;;;;N;;;;A767;
+ A767;LATIN SMALL LETTER THORN WITH STROKE THROUGH DESCENDER;Ll;0;L;;;;;N;;;A766;;A766
+ A768;LATIN CAPITAL LETTER VEND;Lu;0;L;;;;;N;;;;A769;
+ A769;LATIN SMALL LETTER VEND;Ll;0;L;;;;;N;;;A768;;A768
+ A76A;LATIN CAPITAL LETTER ET;Lu;0;L;;;;;N;;;;A76B;
+ A76B;LATIN SMALL LETTER ET;Ll;0;L;;;;;N;;;A76A;;A76A
+ A76C;LATIN CAPITAL LETTER IS;Lu;0;L;;;;;N;;;;A76D;
+ A76D;LATIN SMALL LETTER IS;Ll;0;L;;;;;N;;;A76C;;A76C
+ A76E;LATIN CAPITAL LETTER CON;Lu;0;L;;;;;N;;;;A76F;
+ A76F;LATIN SMALL LETTER CON;Ll;0;L;;;;;N;;;A76E;;A76E
+ A770;MODIFIER LETTER US;Lm;0;L;<super> A76F;;;;N;;;;;
+ A771;LATIN SMALL LETTER DUM;Ll;0;L;;;;;N;;;;;
+ A772;LATIN SMALL LETTER LUM;Ll;0;L;;;;;N;;;;;
+ A773;LATIN SMALL LETTER MUM;Ll;0;L;;;;;N;;;;;
+ A774;LATIN SMALL LETTER NUM;Ll;0;L;;;;;N;;;;;
+ A775;LATIN SMALL LETTER RUM;Ll;0;L;;;;;N;;;;;
+ A776;LATIN LETTER SMALL CAPITAL RUM;Ll;0;L;;;;;N;;;;;
+ A777;LATIN SMALL LETTER TUM;Ll;0;L;;;;;N;;;;;
+ A778;LATIN SMALL LETTER UM;Ll;0;L;;;;;N;;;;;
+ A779;LATIN CAPITAL LETTER INSULAR D;Lu;0;L;;;;;N;;;;A77A;
+ A77A;LATIN SMALL LETTER INSULAR D;Ll;0;L;;;;;N;;;A779;;A779
+ A77B;LATIN CAPITAL LETTER INSULAR F;Lu;0;L;;;;;N;;;;A77C;
+ A77C;LATIN SMALL LETTER INSULAR F;Ll;0;L;;;;;N;;;A77B;;A77B
+ A77D;LATIN CAPITAL LETTER INSULAR G;Lu;0;L;;;;;N;;;;1D79;
+ A77E;LATIN CAPITAL LETTER TURNED INSULAR G;Lu;0;L;;;;;N;;;;A77F;
+ A77F;LATIN SMALL LETTER TURNED INSULAR G;Ll;0;L;;;;;N;;;A77E;;A77E
+ A780;LATIN CAPITAL LETTER TURNED L;Lu;0;L;;;;;N;;;;A781;
+ A781;LATIN SMALL LETTER TURNED L;Ll;0;L;;;;;N;;;A780;;A780
+ A782;LATIN CAPITAL LETTER INSULAR R;Lu;0;L;;;;;N;;;;A783;
+ A783;LATIN SMALL LETTER INSULAR R;Ll;0;L;;;;;N;;;A782;;A782
+ A784;LATIN CAPITAL LETTER INSULAR S;Lu;0;L;;;;;N;;;;A785;
+ A785;LATIN SMALL LETTER INSULAR S;Ll;0;L;;;;;N;;;A784;;A784
+ A786;LATIN CAPITAL LETTER INSULAR T;Lu;0;L;;;;;N;;;;A787;
+ A787;LATIN SMALL LETTER INSULAR T;Ll;0;L;;;;;N;;;A786;;A786
+ A788;MODIFIER LETTER LOW CIRCUMFLEX ACCENT;Lm;0;ON;;;;;N;;;;;
+ A789;MODIFIER LETTER COLON;Sk;0;L;;;;;N;;;;;
+ A78A;MODIFIER LETTER SHORT EQUALS SIGN;Sk;0;L;;;;;N;;;;;
+ A78B;LATIN CAPITAL LETTER SALTILLO;Lu;0;L;;;;;N;;;;A78C;
+ A78C;LATIN SMALL LETTER SALTILLO;Ll;0;L;;;;;N;;;A78B;;A78B
+ A78D;LATIN CAPITAL LETTER TURNED H;Lu;0;L;;;;;N;;;;0265;
+ A78E;LATIN SMALL LETTER L WITH RETROFLEX HOOK AND BELT;Ll;0;L;;;;;N;;;;;
+ A78F;LATIN LETTER SINOLOGICAL DOT;Lo;0;L;;;;;N;;;;;
+ A790;LATIN CAPITAL LETTER N WITH DESCENDER;Lu;0;L;;;;;N;;;;A791;
+ A791;LATIN SMALL LETTER N WITH DESCENDER;Ll;0;L;;;;;N;;;A790;;A790
+ A792;LATIN CAPITAL LETTER C WITH BAR;Lu;0;L;;;;;N;;;;A793;
+ A793;LATIN SMALL LETTER C WITH BAR;Ll;0;L;;;;;N;;;A792;;A792
+ A794;LATIN SMALL LETTER C WITH PALATAL HOOK;Ll;0;L;;;;;N;;;A7C4;;A7C4
+ A795;LATIN SMALL LETTER H WITH PALATAL HOOK;Ll;0;L;;;;;N;;;;;
+ A796;LATIN CAPITAL LETTER B WITH FLOURISH;Lu;0;L;;;;;N;;;;A797;
+ A797;LATIN SMALL LETTER B WITH FLOURISH;Ll;0;L;;;;;N;;;A796;;A796
+ A798;LATIN CAPITAL LETTER F WITH STROKE;Lu;0;L;;;;;N;;;;A799;
+ A799;LATIN SMALL LETTER F WITH STROKE;Ll;0;L;;;;;N;;;A798;;A798
+ A79A;LATIN CAPITAL LETTER VOLAPUK AE;Lu;0;L;;;;;N;;;;A79B;
+ A79B;LATIN SMALL LETTER VOLAPUK AE;Ll;0;L;;;;;N;;;A79A;;A79A
+ A79C;LATIN CAPITAL LETTER VOLAPUK OE;Lu;0;L;;;;;N;;;;A79D;
+ A79D;LATIN SMALL LETTER VOLAPUK OE;Ll;0;L;;;;;N;;;A79C;;A79C
+ A79E;LATIN CAPITAL LETTER VOLAPUK UE;Lu;0;L;;;;;N;;;;A79F;
+ A79F;LATIN SMALL LETTER VOLAPUK UE;Ll;0;L;;;;;N;;;A79E;;A79E
+ A7A0;LATIN CAPITAL LETTER G WITH OBLIQUE STROKE;Lu;0;L;;;;;N;;;;A7A1;
+ A7A1;LATIN SMALL LETTER G WITH OBLIQUE STROKE;Ll;0;L;;;;;N;;;A7A0;;A7A0
+ A7A2;LATIN CAPITAL LETTER K WITH OBLIQUE STROKE;Lu;0;L;;;;;N;;;;A7A3;
+ A7A3;LATIN SMALL LETTER K WITH OBLIQUE STROKE;Ll;0;L;;;;;N;;;A7A2;;A7A2
+ A7A4;LATIN CAPITAL LETTER N WITH OBLIQUE STROKE;Lu;0;L;;;;;N;;;;A7A5;
+ A7A5;LATIN SMALL LETTER N WITH OBLIQUE STROKE;Ll;0;L;;;;;N;;;A7A4;;A7A4
+ A7A6;LATIN CAPITAL LETTER R WITH OBLIQUE STROKE;Lu;0;L;;;;;N;;;;A7A7;
+ A7A7;LATIN SMALL LETTER R WITH OBLIQUE STROKE;Ll;0;L;;;;;N;;;A7A6;;A7A6
+ A7A8;LATIN CAPITAL LETTER S WITH OBLIQUE STROKE;Lu;0;L;;;;;N;;;;A7A9;
+ A7A9;LATIN SMALL LETTER S WITH OBLIQUE STROKE;Ll;0;L;;;;;N;;;A7A8;;A7A8
+ A7AA;LATIN CAPITAL LETTER H WITH HOOK;Lu;0;L;;;;;N;;;;0266;
+ A7AB;LATIN CAPITAL LETTER REVERSED OPEN E;Lu;0;L;;;;;N;;;;025C;
+ A7AC;LATIN CAPITAL LETTER SCRIPT G;Lu;0;L;;;;;N;;;;0261;
+ A7AD;LATIN CAPITAL LETTER L WITH BELT;Lu;0;L;;;;;N;;;;026C;
+ A7AE;LATIN CAPITAL LETTER SMALL CAPITAL I;Lu;0;L;;;;;N;;;;026A;
+ A7AF;LATIN LETTER SMALL CAPITAL Q;Ll;0;L;;;;;N;;;;;
+ A7B0;LATIN CAPITAL LETTER TURNED K;Lu;0;L;;;;;N;;;;029E;
+ A7B1;LATIN CAPITAL LETTER TURNED T;Lu;0;L;;;;;N;;;;0287;
+ A7B2;LATIN CAPITAL LETTER J WITH CROSSED-TAIL;Lu;0;L;;;;;N;;;;029D;
+ A7B3;LATIN CAPITAL LETTER CHI;Lu;0;L;;;;;N;;;;AB53;
+ A7B4;LATIN CAPITAL LETTER BETA;Lu;0;L;;;;;N;;;;A7B5;
+ A7B5;LATIN SMALL LETTER BETA;Ll;0;L;;;;;N;;;A7B4;;A7B4
+ A7B6;LATIN CAPITAL LETTER OMEGA;Lu;0;L;;;;;N;;;;A7B7;
+ A7B7;LATIN SMALL LETTER OMEGA;Ll;0;L;;;;;N;;;A7B6;;A7B6
+ A7B8;LATIN CAPITAL LETTER U WITH STROKE;Lu;0;L;;;;;N;;;;A7B9;
+ A7B9;LATIN SMALL LETTER U WITH STROKE;Ll;0;L;;;;;N;;;A7B8;;A7B8
+ A7BA;LATIN CAPITAL LETTER GLOTTAL A;Lu;0;L;;;;;N;;;;A7BB;
+ A7BB;LATIN SMALL LETTER GLOTTAL A;Ll;0;L;;;;;N;;;A7BA;;A7BA
+ A7BC;LATIN CAPITAL LETTER GLOTTAL I;Lu;0;L;;;;;N;;;;A7BD;
+ A7BD;LATIN SMALL LETTER GLOTTAL I;Ll;0;L;;;;;N;;;A7BC;;A7BC
+ A7BE;LATIN CAPITAL LETTER GLOTTAL U;Lu;0;L;;;;;N;;;;A7BF;
+ A7BF;LATIN SMALL LETTER GLOTTAL U;Ll;0;L;;;;;N;;;A7BE;;A7BE
+ A7C2;LATIN CAPITAL LETTER ANGLICANA W;Lu;0;L;;;;;N;;;;A7C3;
+ A7C3;LATIN SMALL LETTER ANGLICANA W;Ll;0;L;;;;;N;;;A7C2;;A7C2
+ A7C4;LATIN CAPITAL LETTER C WITH PALATAL HOOK;Lu;0;L;;;;;N;;;;A794;
+ A7C5;LATIN CAPITAL LETTER S WITH HOOK;Lu;0;L;;;;;N;;;;0282;
+ A7C6;LATIN CAPITAL LETTER Z WITH PALATAL HOOK;Lu;0;L;;;;;N;;;;1D8E;
+ A7F7;LATIN EPIGRAPHIC LETTER SIDEWAYS I;Lo;0;L;;;;;N;;;;;
+ A7F8;MODIFIER LETTER CAPITAL H WITH STROKE;Lm;0;L;<super> 0126;;;;N;;;;;
+ A7F9;MODIFIER LETTER SMALL LIGATURE OE;Lm;0;L;<super> 0153;;;;N;;;;;
+ A7FA;LATIN LETTER SMALL CAPITAL TURNED M;Ll;0;L;;;;;N;;;;;
+ A7FB;LATIN EPIGRAPHIC LETTER REVERSED F;Lo;0;L;;;;;N;;;;;
+ A7FC;LATIN EPIGRAPHIC LETTER REVERSED P;Lo;0;L;;;;;N;;;;;
+ A7FD;LATIN EPIGRAPHIC LETTER INVERTED M;Lo;0;L;;;;;N;;;;;
+ A7FE;LATIN EPIGRAPHIC LETTER I LONGA;Lo;0;L;;;;;N;;;;;
+ A7FF;LATIN EPIGRAPHIC LETTER ARCHAIC M;Lo;0;L;;;;;N;;;;;
+ A800;SYLOTI NAGRI LETTER A;Lo;0;L;;;;;N;;;;;
+ A801;SYLOTI NAGRI LETTER I;Lo;0;L;;;;;N;;;;;
+ A802;SYLOTI NAGRI SIGN DVISVARA;Mn;0;NSM;;;;;N;;;;;
+ A803;SYLOTI NAGRI LETTER U;Lo;0;L;;;;;N;;;;;
+ A804;SYLOTI NAGRI LETTER E;Lo;0;L;;;;;N;;;;;
+ A805;SYLOTI NAGRI LETTER O;Lo;0;L;;;;;N;;;;;
+ A806;SYLOTI NAGRI SIGN HASANTA;Mn;9;NSM;;;;;N;;;;;
+ A807;SYLOTI NAGRI LETTER KO;Lo;0;L;;;;;N;;;;;
+ A808;SYLOTI NAGRI LETTER KHO;Lo;0;L;;;;;N;;;;;
+ A809;SYLOTI NAGRI LETTER GO;Lo;0;L;;;;;N;;;;;
+ A80A;SYLOTI NAGRI LETTER GHO;Lo;0;L;;;;;N;;;;;
+ A80B;SYLOTI NAGRI SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ A80C;SYLOTI NAGRI LETTER CO;Lo;0;L;;;;;N;;;;;
+ A80D;SYLOTI NAGRI LETTER CHO;Lo;0;L;;;;;N;;;;;
+ A80E;SYLOTI NAGRI LETTER JO;Lo;0;L;;;;;N;;;;;
+ A80F;SYLOTI NAGRI LETTER JHO;Lo;0;L;;;;;N;;;;;
+ A810;SYLOTI NAGRI LETTER TTO;Lo;0;L;;;;;N;;;;;
+ A811;SYLOTI NAGRI LETTER TTHO;Lo;0;L;;;;;N;;;;;
+ A812;SYLOTI NAGRI LETTER DDO;Lo;0;L;;;;;N;;;;;
+ A813;SYLOTI NAGRI LETTER DDHO;Lo;0;L;;;;;N;;;;;
+ A814;SYLOTI NAGRI LETTER TO;Lo;0;L;;;;;N;;;;;
+ A815;SYLOTI NAGRI LETTER THO;Lo;0;L;;;;;N;;;;;
+ A816;SYLOTI NAGRI LETTER DO;Lo;0;L;;;;;N;;;;;
+ A817;SYLOTI NAGRI LETTER DHO;Lo;0;L;;;;;N;;;;;
+ A818;SYLOTI NAGRI LETTER NO;Lo;0;L;;;;;N;;;;;
+ A819;SYLOTI NAGRI LETTER PO;Lo;0;L;;;;;N;;;;;
+ A81A;SYLOTI NAGRI LETTER PHO;Lo;0;L;;;;;N;;;;;
+ A81B;SYLOTI NAGRI LETTER BO;Lo;0;L;;;;;N;;;;;
+ A81C;SYLOTI NAGRI LETTER BHO;Lo;0;L;;;;;N;;;;;
+ A81D;SYLOTI NAGRI LETTER MO;Lo;0;L;;;;;N;;;;;
+ A81E;SYLOTI NAGRI LETTER RO;Lo;0;L;;;;;N;;;;;
+ A81F;SYLOTI NAGRI LETTER LO;Lo;0;L;;;;;N;;;;;
+ A820;SYLOTI NAGRI LETTER RRO;Lo;0;L;;;;;N;;;;;
+ A821;SYLOTI NAGRI LETTER SO;Lo;0;L;;;;;N;;;;;
+ A822;SYLOTI NAGRI LETTER HO;Lo;0;L;;;;;N;;;;;
+ A823;SYLOTI NAGRI VOWEL SIGN A;Mc;0;L;;;;;N;;;;;
+ A824;SYLOTI NAGRI VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ A825;SYLOTI NAGRI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ A826;SYLOTI NAGRI VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ A827;SYLOTI NAGRI VOWEL SIGN OO;Mc;0;L;;;;;N;;;;;
+ A828;SYLOTI NAGRI POETRY MARK-1;So;0;ON;;;;;N;;;;;
+ A829;SYLOTI NAGRI POETRY MARK-2;So;0;ON;;;;;N;;;;;
+ A82A;SYLOTI NAGRI POETRY MARK-3;So;0;ON;;;;;N;;;;;
+ A82B;SYLOTI NAGRI POETRY MARK-4;So;0;ON;;;;;N;;;;;
+ A830;NORTH INDIC FRACTION ONE QUARTER;No;0;L;;;;1/4;N;;;;;
+ A831;NORTH INDIC FRACTION ONE HALF;No;0;L;;;;1/2;N;;;;;
+ A832;NORTH INDIC FRACTION THREE QUARTERS;No;0;L;;;;3/4;N;;;;;
+ A833;NORTH INDIC FRACTION ONE SIXTEENTH;No;0;L;;;;1/16;N;;;;;
+ A834;NORTH INDIC FRACTION ONE EIGHTH;No;0;L;;;;1/8;N;;;;;
+ A835;NORTH INDIC FRACTION THREE SIXTEENTHS;No;0;L;;;;3/16;N;;;;;
+ A836;NORTH INDIC QUARTER MARK;So;0;L;;;;;N;;;;;
+ A837;NORTH INDIC PLACEHOLDER MARK;So;0;L;;;;;N;;;;;
+ A838;NORTH INDIC RUPEE MARK;Sc;0;ET;;;;;N;;;;;
+ A839;NORTH INDIC QUANTITY MARK;So;0;ET;;;;;N;;;;;
+ A840;PHAGS-PA LETTER KA;Lo;0;L;;;;;N;;;;;
+ A841;PHAGS-PA LETTER KHA;Lo;0;L;;;;;N;;;;;
+ A842;PHAGS-PA LETTER GA;Lo;0;L;;;;;N;;;;;
+ A843;PHAGS-PA LETTER NGA;Lo;0;L;;;;;N;;;;;
+ A844;PHAGS-PA LETTER CA;Lo;0;L;;;;;N;;;;;
+ A845;PHAGS-PA LETTER CHA;Lo;0;L;;;;;N;;;;;
+ A846;PHAGS-PA LETTER JA;Lo;0;L;;;;;N;;;;;
+ A847;PHAGS-PA LETTER NYA;Lo;0;L;;;;;N;;;;;
+ A848;PHAGS-PA LETTER TA;Lo;0;L;;;;;N;;;;;
+ A849;PHAGS-PA LETTER THA;Lo;0;L;;;;;N;;;;;
+ A84A;PHAGS-PA LETTER DA;Lo;0;L;;;;;N;;;;;
+ A84B;PHAGS-PA LETTER NA;Lo;0;L;;;;;N;;;;;
+ A84C;PHAGS-PA LETTER PA;Lo;0;L;;;;;N;;;;;
+ A84D;PHAGS-PA LETTER PHA;Lo;0;L;;;;;N;;;;;
+ A84E;PHAGS-PA LETTER BA;Lo;0;L;;;;;N;;;;;
+ A84F;PHAGS-PA LETTER MA;Lo;0;L;;;;;N;;;;;
+ A850;PHAGS-PA LETTER TSA;Lo;0;L;;;;;N;;;;;
+ A851;PHAGS-PA LETTER TSHA;Lo;0;L;;;;;N;;;;;
+ A852;PHAGS-PA LETTER DZA;Lo;0;L;;;;;N;;;;;
+ A853;PHAGS-PA LETTER WA;Lo;0;L;;;;;N;;;;;
+ A854;PHAGS-PA LETTER ZHA;Lo;0;L;;;;;N;;;;;
+ A855;PHAGS-PA LETTER ZA;Lo;0;L;;;;;N;;;;;
+ A856;PHAGS-PA LETTER SMALL A;Lo;0;L;;;;;N;;;;;
+ A857;PHAGS-PA LETTER YA;Lo;0;L;;;;;N;;;;;
+ A858;PHAGS-PA LETTER RA;Lo;0;L;;;;;N;;;;;
+ A859;PHAGS-PA LETTER LA;Lo;0;L;;;;;N;;;;;
+ A85A;PHAGS-PA LETTER SHA;Lo;0;L;;;;;N;;;;;
+ A85B;PHAGS-PA LETTER SA;Lo;0;L;;;;;N;;;;;
+ A85C;PHAGS-PA LETTER HA;Lo;0;L;;;;;N;;;;;
+ A85D;PHAGS-PA LETTER A;Lo;0;L;;;;;N;;;;;
+ A85E;PHAGS-PA LETTER I;Lo;0;L;;;;;N;;;;;
+ A85F;PHAGS-PA LETTER U;Lo;0;L;;;;;N;;;;;
+ A860;PHAGS-PA LETTER E;Lo;0;L;;;;;N;;;;;
+ A861;PHAGS-PA LETTER O;Lo;0;L;;;;;N;;;;;
+ A862;PHAGS-PA LETTER QA;Lo;0;L;;;;;N;;;;;
+ A863;PHAGS-PA LETTER XA;Lo;0;L;;;;;N;;;;;
+ A864;PHAGS-PA LETTER FA;Lo;0;L;;;;;N;;;;;
+ A865;PHAGS-PA LETTER GGA;Lo;0;L;;;;;N;;;;;
+ A866;PHAGS-PA LETTER EE;Lo;0;L;;;;;N;;;;;
+ A867;PHAGS-PA SUBJOINED LETTER WA;Lo;0;L;;;;;N;;;;;
+ A868;PHAGS-PA SUBJOINED LETTER YA;Lo;0;L;;;;;N;;;;;
+ A869;PHAGS-PA LETTER TTA;Lo;0;L;;;;;N;;;;;
+ A86A;PHAGS-PA LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ A86B;PHAGS-PA LETTER DDA;Lo;0;L;;;;;N;;;;;
+ A86C;PHAGS-PA LETTER NNA;Lo;0;L;;;;;N;;;;;
+ A86D;PHAGS-PA LETTER ALTERNATE YA;Lo;0;L;;;;;N;;;;;
+ A86E;PHAGS-PA LETTER VOICELESS SHA;Lo;0;L;;;;;N;;;;;
+ A86F;PHAGS-PA LETTER VOICED HA;Lo;0;L;;;;;N;;;;;
+ A870;PHAGS-PA LETTER ASPIRATED FA;Lo;0;L;;;;;N;;;;;
+ A871;PHAGS-PA SUBJOINED LETTER RA;Lo;0;L;;;;;N;;;;;
+ A872;PHAGS-PA SUPERFIXED LETTER RA;Lo;0;L;;;;;N;;;;;
+ A873;PHAGS-PA LETTER CANDRABINDU;Lo;0;L;;;;;N;;;;;
+ A874;PHAGS-PA SINGLE HEAD MARK;Po;0;ON;;;;;N;;;;;
+ A875;PHAGS-PA DOUBLE HEAD MARK;Po;0;ON;;;;;N;;;;;
+ A876;PHAGS-PA MARK SHAD;Po;0;ON;;;;;N;;;;;
+ A877;PHAGS-PA MARK DOUBLE SHAD;Po;0;ON;;;;;N;;;;;
+ A880;SAURASHTRA SIGN ANUSVARA;Mc;0;L;;;;;N;;;;;
+ A881;SAURASHTRA SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ A882;SAURASHTRA LETTER A;Lo;0;L;;;;;N;;;;;
+ A883;SAURASHTRA LETTER AA;Lo;0;L;;;;;N;;;;;
+ A884;SAURASHTRA LETTER I;Lo;0;L;;;;;N;;;;;
+ A885;SAURASHTRA LETTER II;Lo;0;L;;;;;N;;;;;
+ A886;SAURASHTRA LETTER U;Lo;0;L;;;;;N;;;;;
+ A887;SAURASHTRA LETTER UU;Lo;0;L;;;;;N;;;;;
+ A888;SAURASHTRA LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ A889;SAURASHTRA LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ A88A;SAURASHTRA LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ A88B;SAURASHTRA LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ A88C;SAURASHTRA LETTER E;Lo;0;L;;;;;N;;;;;
+ A88D;SAURASHTRA LETTER EE;Lo;0;L;;;;;N;;;;;
+ A88E;SAURASHTRA LETTER AI;Lo;0;L;;;;;N;;;;;
+ A88F;SAURASHTRA LETTER O;Lo;0;L;;;;;N;;;;;
+ A890;SAURASHTRA LETTER OO;Lo;0;L;;;;;N;;;;;
+ A891;SAURASHTRA LETTER AU;Lo;0;L;;;;;N;;;;;
+ A892;SAURASHTRA LETTER KA;Lo;0;L;;;;;N;;;;;
+ A893;SAURASHTRA LETTER KHA;Lo;0;L;;;;;N;;;;;
+ A894;SAURASHTRA LETTER GA;Lo;0;L;;;;;N;;;;;
+ A895;SAURASHTRA LETTER GHA;Lo;0;L;;;;;N;;;;;
+ A896;SAURASHTRA LETTER NGA;Lo;0;L;;;;;N;;;;;
+ A897;SAURASHTRA LETTER CA;Lo;0;L;;;;;N;;;;;
+ A898;SAURASHTRA LETTER CHA;Lo;0;L;;;;;N;;;;;
+ A899;SAURASHTRA LETTER JA;Lo;0;L;;;;;N;;;;;
+ A89A;SAURASHTRA LETTER JHA;Lo;0;L;;;;;N;;;;;
+ A89B;SAURASHTRA LETTER NYA;Lo;0;L;;;;;N;;;;;
+ A89C;SAURASHTRA LETTER TTA;Lo;0;L;;;;;N;;;;;
+ A89D;SAURASHTRA LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ A89E;SAURASHTRA LETTER DDA;Lo;0;L;;;;;N;;;;;
+ A89F;SAURASHTRA LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ A8A0;SAURASHTRA LETTER NNA;Lo;0;L;;;;;N;;;;;
+ A8A1;SAURASHTRA LETTER TA;Lo;0;L;;;;;N;;;;;
+ A8A2;SAURASHTRA LETTER THA;Lo;0;L;;;;;N;;;;;
+ A8A3;SAURASHTRA LETTER DA;Lo;0;L;;;;;N;;;;;
+ A8A4;SAURASHTRA LETTER DHA;Lo;0;L;;;;;N;;;;;
+ A8A5;SAURASHTRA LETTER NA;Lo;0;L;;;;;N;;;;;
+ A8A6;SAURASHTRA LETTER PA;Lo;0;L;;;;;N;;;;;
+ A8A7;SAURASHTRA LETTER PHA;Lo;0;L;;;;;N;;;;;
+ A8A8;SAURASHTRA LETTER BA;Lo;0;L;;;;;N;;;;;
+ A8A9;SAURASHTRA LETTER BHA;Lo;0;L;;;;;N;;;;;
+ A8AA;SAURASHTRA LETTER MA;Lo;0;L;;;;;N;;;;;
+ A8AB;SAURASHTRA LETTER YA;Lo;0;L;;;;;N;;;;;
+ A8AC;SAURASHTRA LETTER RA;Lo;0;L;;;;;N;;;;;
+ A8AD;SAURASHTRA LETTER LA;Lo;0;L;;;;;N;;;;;
+ A8AE;SAURASHTRA LETTER VA;Lo;0;L;;;;;N;;;;;
+ A8AF;SAURASHTRA LETTER SHA;Lo;0;L;;;;;N;;;;;
+ A8B0;SAURASHTRA LETTER SSA;Lo;0;L;;;;;N;;;;;
+ A8B1;SAURASHTRA LETTER SA;Lo;0;L;;;;;N;;;;;
+ A8B2;SAURASHTRA LETTER HA;Lo;0;L;;;;;N;;;;;
+ A8B3;SAURASHTRA LETTER LLA;Lo;0;L;;;;;N;;;;;
+ A8B4;SAURASHTRA CONSONANT SIGN HAARU;Mc;0;L;;;;;N;;;;;
+ A8B5;SAURASHTRA VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ A8B6;SAURASHTRA VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ A8B7;SAURASHTRA VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ A8B8;SAURASHTRA VOWEL SIGN U;Mc;0;L;;;;;N;;;;;
+ A8B9;SAURASHTRA VOWEL SIGN UU;Mc;0;L;;;;;N;;;;;
+ A8BA;SAURASHTRA VOWEL SIGN VOCALIC R;Mc;0;L;;;;;N;;;;;
+ A8BB;SAURASHTRA VOWEL SIGN VOCALIC RR;Mc;0;L;;;;;N;;;;;
+ A8BC;SAURASHTRA VOWEL SIGN VOCALIC L;Mc;0;L;;;;;N;;;;;
+ A8BD;SAURASHTRA VOWEL SIGN VOCALIC LL;Mc;0;L;;;;;N;;;;;
+ A8BE;SAURASHTRA VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ A8BF;SAURASHTRA VOWEL SIGN EE;Mc;0;L;;;;;N;;;;;
+ A8C0;SAURASHTRA VOWEL SIGN AI;Mc;0;L;;;;;N;;;;;
+ A8C1;SAURASHTRA VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ A8C2;SAURASHTRA VOWEL SIGN OO;Mc;0;L;;;;;N;;;;;
+ A8C3;SAURASHTRA VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ A8C4;SAURASHTRA SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ A8C5;SAURASHTRA SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ A8CE;SAURASHTRA DANDA;Po;0;L;;;;;N;;;;;
+ A8CF;SAURASHTRA DOUBLE DANDA;Po;0;L;;;;;N;;;;;
+ A8D0;SAURASHTRA DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ A8D1;SAURASHTRA DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ A8D2;SAURASHTRA DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ A8D3;SAURASHTRA DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ A8D4;SAURASHTRA DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ A8D5;SAURASHTRA DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ A8D6;SAURASHTRA DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ A8D7;SAURASHTRA DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ A8D8;SAURASHTRA DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ A8D9;SAURASHTRA DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ A8E0;COMBINING DEVANAGARI DIGIT ZERO;Mn;230;NSM;;;;;N;;;;;
+ A8E1;COMBINING DEVANAGARI DIGIT ONE;Mn;230;NSM;;;;;N;;;;;
+ A8E2;COMBINING DEVANAGARI DIGIT TWO;Mn;230;NSM;;;;;N;;;;;
+ A8E3;COMBINING DEVANAGARI DIGIT THREE;Mn;230;NSM;;;;;N;;;;;
+ A8E4;COMBINING DEVANAGARI DIGIT FOUR;Mn;230;NSM;;;;;N;;;;;
+ A8E5;COMBINING DEVANAGARI DIGIT FIVE;Mn;230;NSM;;;;;N;;;;;
+ A8E6;COMBINING DEVANAGARI DIGIT SIX;Mn;230;NSM;;;;;N;;;;;
+ A8E7;COMBINING DEVANAGARI DIGIT SEVEN;Mn;230;NSM;;;;;N;;;;;
+ A8E8;COMBINING DEVANAGARI DIGIT EIGHT;Mn;230;NSM;;;;;N;;;;;
+ A8E9;COMBINING DEVANAGARI DIGIT NINE;Mn;230;NSM;;;;;N;;;;;
+ A8EA;COMBINING DEVANAGARI LETTER A;Mn;230;NSM;;;;;N;;;;;
+ A8EB;COMBINING DEVANAGARI LETTER U;Mn;230;NSM;;;;;N;;;;;
+ A8EC;COMBINING DEVANAGARI LETTER KA;Mn;230;NSM;;;;;N;;;;;
+ A8ED;COMBINING DEVANAGARI LETTER NA;Mn;230;NSM;;;;;N;;;;;
+ A8EE;COMBINING DEVANAGARI LETTER PA;Mn;230;NSM;;;;;N;;;;;
+ A8EF;COMBINING DEVANAGARI LETTER RA;Mn;230;NSM;;;;;N;;;;;
+ A8F0;COMBINING DEVANAGARI LETTER VI;Mn;230;NSM;;;;;N;;;;;
+ A8F1;COMBINING DEVANAGARI SIGN AVAGRAHA;Mn;230;NSM;;;;;N;;;;;
+ A8F2;DEVANAGARI SIGN SPACING CANDRABINDU;Lo;0;L;;;;;N;;;;;
+ A8F3;DEVANAGARI SIGN CANDRABINDU VIRAMA;Lo;0;L;;;;;N;;;;;
+ A8F4;DEVANAGARI SIGN DOUBLE CANDRABINDU VIRAMA;Lo;0;L;;;;;N;;;;;
+ A8F5;DEVANAGARI SIGN CANDRABINDU TWO;Lo;0;L;;;;;N;;;;;
+ A8F6;DEVANAGARI SIGN CANDRABINDU THREE;Lo;0;L;;;;;N;;;;;
+ A8F7;DEVANAGARI SIGN CANDRABINDU AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ A8F8;DEVANAGARI SIGN PUSHPIKA;Po;0;L;;;;;N;;;;;
+ A8F9;DEVANAGARI GAP FILLER;Po;0;L;;;;;N;;;;;
+ A8FA;DEVANAGARI CARET;Po;0;L;;;;;N;;;;;
+ A8FB;DEVANAGARI HEADSTROKE;Lo;0;L;;;;;N;;;;;
+ A8FC;DEVANAGARI SIGN SIDDHAM;Po;0;L;;;;;N;;;;;
+ A8FD;DEVANAGARI JAIN OM;Lo;0;L;;;;;N;;;;;
+ A8FE;DEVANAGARI LETTER AY;Lo;0;L;;;;;N;;;;;
+ A8FF;DEVANAGARI VOWEL SIGN AY;Mn;0;NSM;;;;;N;;;;;
+ A900;KAYAH LI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ A901;KAYAH LI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ A902;KAYAH LI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ A903;KAYAH LI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ A904;KAYAH LI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ A905;KAYAH LI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ A906;KAYAH LI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ A907;KAYAH LI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ A908;KAYAH LI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ A909;KAYAH LI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ A90A;KAYAH LI LETTER KA;Lo;0;L;;;;;N;;;;;
+ A90B;KAYAH LI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ A90C;KAYAH LI LETTER GA;Lo;0;L;;;;;N;;;;;
+ A90D;KAYAH LI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ A90E;KAYAH LI LETTER SA;Lo;0;L;;;;;N;;;;;
+ A90F;KAYAH LI LETTER SHA;Lo;0;L;;;;;N;;;;;
+ A910;KAYAH LI LETTER ZA;Lo;0;L;;;;;N;;;;;
+ A911;KAYAH LI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ A912;KAYAH LI LETTER TA;Lo;0;L;;;;;N;;;;;
+ A913;KAYAH LI LETTER HTA;Lo;0;L;;;;;N;;;;;
+ A914;KAYAH LI LETTER NA;Lo;0;L;;;;;N;;;;;
+ A915;KAYAH LI LETTER PA;Lo;0;L;;;;;N;;;;;
+ A916;KAYAH LI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ A917;KAYAH LI LETTER MA;Lo;0;L;;;;;N;;;;;
+ A918;KAYAH LI LETTER DA;Lo;0;L;;;;;N;;;;;
+ A919;KAYAH LI LETTER BA;Lo;0;L;;;;;N;;;;;
+ A91A;KAYAH LI LETTER RA;Lo;0;L;;;;;N;;;;;
+ A91B;KAYAH LI LETTER YA;Lo;0;L;;;;;N;;;;;
+ A91C;KAYAH LI LETTER LA;Lo;0;L;;;;;N;;;;;
+ A91D;KAYAH LI LETTER WA;Lo;0;L;;;;;N;;;;;
+ A91E;KAYAH LI LETTER THA;Lo;0;L;;;;;N;;;;;
+ A91F;KAYAH LI LETTER HA;Lo;0;L;;;;;N;;;;;
+ A920;KAYAH LI LETTER VA;Lo;0;L;;;;;N;;;;;
+ A921;KAYAH LI LETTER CA;Lo;0;L;;;;;N;;;;;
+ A922;KAYAH LI LETTER A;Lo;0;L;;;;;N;;;;;
+ A923;KAYAH LI LETTER OE;Lo;0;L;;;;;N;;;;;
+ A924;KAYAH LI LETTER I;Lo;0;L;;;;;N;;;;;
+ A925;KAYAH LI LETTER OO;Lo;0;L;;;;;N;;;;;
+ A926;KAYAH LI VOWEL UE;Mn;0;NSM;;;;;N;;;;;
+ A927;KAYAH LI VOWEL E;Mn;0;NSM;;;;;N;;;;;
+ A928;KAYAH LI VOWEL U;Mn;0;NSM;;;;;N;;;;;
+ A929;KAYAH LI VOWEL EE;Mn;0;NSM;;;;;N;;;;;
+ A92A;KAYAH LI VOWEL O;Mn;0;NSM;;;;;N;;;;;
+ A92B;KAYAH LI TONE PLOPHU;Mn;220;NSM;;;;;N;;;;;
+ A92C;KAYAH LI TONE CALYA;Mn;220;NSM;;;;;N;;;;;
+ A92D;KAYAH LI TONE CALYA PLOPHU;Mn;220;NSM;;;;;N;;;;;
+ A92E;KAYAH LI SIGN CWI;Po;0;L;;;;;N;;;;;
+ A92F;KAYAH LI SIGN SHYA;Po;0;L;;;;;N;;;;;
+ A930;REJANG LETTER KA;Lo;0;L;;;;;N;;;;;
+ A931;REJANG LETTER GA;Lo;0;L;;;;;N;;;;;
+ A932;REJANG LETTER NGA;Lo;0;L;;;;;N;;;;;
+ A933;REJANG LETTER TA;Lo;0;L;;;;;N;;;;;
+ A934;REJANG LETTER DA;Lo;0;L;;;;;N;;;;;
+ A935;REJANG LETTER NA;Lo;0;L;;;;;N;;;;;
+ A936;REJANG LETTER PA;Lo;0;L;;;;;N;;;;;
+ A937;REJANG LETTER BA;Lo;0;L;;;;;N;;;;;
+ A938;REJANG LETTER MA;Lo;0;L;;;;;N;;;;;
+ A939;REJANG LETTER CA;Lo;0;L;;;;;N;;;;;
+ A93A;REJANG LETTER JA;Lo;0;L;;;;;N;;;;;
+ A93B;REJANG LETTER NYA;Lo;0;L;;;;;N;;;;;
+ A93C;REJANG LETTER SA;Lo;0;L;;;;;N;;;;;
+ A93D;REJANG LETTER RA;Lo;0;L;;;;;N;;;;;
+ A93E;REJANG LETTER LA;Lo;0;L;;;;;N;;;;;
+ A93F;REJANG LETTER YA;Lo;0;L;;;;;N;;;;;
+ A940;REJANG LETTER WA;Lo;0;L;;;;;N;;;;;
+ A941;REJANG LETTER HA;Lo;0;L;;;;;N;;;;;
+ A942;REJANG LETTER MBA;Lo;0;L;;;;;N;;;;;
+ A943;REJANG LETTER NGGA;Lo;0;L;;;;;N;;;;;
+ A944;REJANG LETTER NDA;Lo;0;L;;;;;N;;;;;
+ A945;REJANG LETTER NYJA;Lo;0;L;;;;;N;;;;;
+ A946;REJANG LETTER A;Lo;0;L;;;;;N;;;;;
+ A947;REJANG VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ A948;REJANG VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ A949;REJANG VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ A94A;REJANG VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ A94B;REJANG VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ A94C;REJANG VOWEL SIGN AU;Mn;0;NSM;;;;;N;;;;;
+ A94D;REJANG VOWEL SIGN EU;Mn;0;NSM;;;;;N;;;;;
+ A94E;REJANG VOWEL SIGN EA;Mn;0;NSM;;;;;N;;;;;
+ A94F;REJANG CONSONANT SIGN NG;Mn;0;NSM;;;;;N;;;;;
+ A950;REJANG CONSONANT SIGN N;Mn;0;NSM;;;;;N;;;;;
+ A951;REJANG CONSONANT SIGN R;Mn;0;NSM;;;;;N;;;;;
+ A952;REJANG CONSONANT SIGN H;Mc;0;L;;;;;N;;;;;
+ A953;REJANG VIRAMA;Mc;9;L;;;;;N;;;;;
+ A95F;REJANG SECTION MARK;Po;0;L;;;;;N;;;;;
+ A960;HANGUL CHOSEONG TIKEUT-MIEUM;Lo;0;L;;;;;N;;;;;
+ A961;HANGUL CHOSEONG TIKEUT-PIEUP;Lo;0;L;;;;;N;;;;;
+ A962;HANGUL CHOSEONG TIKEUT-SIOS;Lo;0;L;;;;;N;;;;;
+ A963;HANGUL CHOSEONG TIKEUT-CIEUC;Lo;0;L;;;;;N;;;;;
+ A964;HANGUL CHOSEONG RIEUL-KIYEOK;Lo;0;L;;;;;N;;;;;
+ A965;HANGUL CHOSEONG RIEUL-SSANGKIYEOK;Lo;0;L;;;;;N;;;;;
+ A966;HANGUL CHOSEONG RIEUL-TIKEUT;Lo;0;L;;;;;N;;;;;
+ A967;HANGUL CHOSEONG RIEUL-SSANGTIKEUT;Lo;0;L;;;;;N;;;;;
+ A968;HANGUL CHOSEONG RIEUL-MIEUM;Lo;0;L;;;;;N;;;;;
+ A969;HANGUL CHOSEONG RIEUL-PIEUP;Lo;0;L;;;;;N;;;;;
+ A96A;HANGUL CHOSEONG RIEUL-SSANGPIEUP;Lo;0;L;;;;;N;;;;;
+ A96B;HANGUL CHOSEONG RIEUL-KAPYEOUNPIEUP;Lo;0;L;;;;;N;;;;;
+ A96C;HANGUL CHOSEONG RIEUL-SIOS;Lo;0;L;;;;;N;;;;;
+ A96D;HANGUL CHOSEONG RIEUL-CIEUC;Lo;0;L;;;;;N;;;;;
+ A96E;HANGUL CHOSEONG RIEUL-KHIEUKH;Lo;0;L;;;;;N;;;;;
+ A96F;HANGUL CHOSEONG MIEUM-KIYEOK;Lo;0;L;;;;;N;;;;;
+ A970;HANGUL CHOSEONG MIEUM-TIKEUT;Lo;0;L;;;;;N;;;;;
+ A971;HANGUL CHOSEONG MIEUM-SIOS;Lo;0;L;;;;;N;;;;;
+ A972;HANGUL CHOSEONG PIEUP-SIOS-THIEUTH;Lo;0;L;;;;;N;;;;;
+ A973;HANGUL CHOSEONG PIEUP-KHIEUKH;Lo;0;L;;;;;N;;;;;
+ A974;HANGUL CHOSEONG PIEUP-HIEUH;Lo;0;L;;;;;N;;;;;
+ A975;HANGUL CHOSEONG SSANGSIOS-PIEUP;Lo;0;L;;;;;N;;;;;
+ A976;HANGUL CHOSEONG IEUNG-RIEUL;Lo;0;L;;;;;N;;;;;
+ A977;HANGUL CHOSEONG IEUNG-HIEUH;Lo;0;L;;;;;N;;;;;
+ A978;HANGUL CHOSEONG SSANGCIEUC-HIEUH;Lo;0;L;;;;;N;;;;;
+ A979;HANGUL CHOSEONG SSANGTHIEUTH;Lo;0;L;;;;;N;;;;;
+ A97A;HANGUL CHOSEONG PHIEUPH-HIEUH;Lo;0;L;;;;;N;;;;;
+ A97B;HANGUL CHOSEONG HIEUH-SIOS;Lo;0;L;;;;;N;;;;;
+ A97C;HANGUL CHOSEONG SSANGYEORINHIEUH;Lo;0;L;;;;;N;;;;;
+ A980;JAVANESE SIGN PANYANGGA;Mn;0;NSM;;;;;N;;;;;
+ A981;JAVANESE SIGN CECAK;Mn;0;NSM;;;;;N;;;;;
+ A982;JAVANESE SIGN LAYAR;Mn;0;NSM;;;;;N;;;;;
+ A983;JAVANESE SIGN WIGNYAN;Mc;0;L;;;;;N;;;;;
+ A984;JAVANESE LETTER A;Lo;0;L;;;;;N;;;;;
+ A985;JAVANESE LETTER I KAWI;Lo;0;L;;;;;N;;;;;
+ A986;JAVANESE LETTER I;Lo;0;L;;;;;N;;;;;
+ A987;JAVANESE LETTER II;Lo;0;L;;;;;N;;;;;
+ A988;JAVANESE LETTER U;Lo;0;L;;;;;N;;;;;
+ A989;JAVANESE LETTER PA CEREK;Lo;0;L;;;;;N;;;;;
+ A98A;JAVANESE LETTER NGA LELET;Lo;0;L;;;;;N;;;;;
+ A98B;JAVANESE LETTER NGA LELET RASWADI;Lo;0;L;;;;;N;;;;;
+ A98C;JAVANESE LETTER E;Lo;0;L;;;;;N;;;;;
+ A98D;JAVANESE LETTER AI;Lo;0;L;;;;;N;;;;;
+ A98E;JAVANESE LETTER O;Lo;0;L;;;;;N;;;;;
+ A98F;JAVANESE LETTER KA;Lo;0;L;;;;;N;;;;;
+ A990;JAVANESE LETTER KA SASAK;Lo;0;L;;;;;N;;;;;
+ A991;JAVANESE LETTER KA MURDA;Lo;0;L;;;;;N;;;;;
+ A992;JAVANESE LETTER GA;Lo;0;L;;;;;N;;;;;
+ A993;JAVANESE LETTER GA MURDA;Lo;0;L;;;;;N;;;;;
+ A994;JAVANESE LETTER NGA;Lo;0;L;;;;;N;;;;;
+ A995;JAVANESE LETTER CA;Lo;0;L;;;;;N;;;;;
+ A996;JAVANESE LETTER CA MURDA;Lo;0;L;;;;;N;;;;;
+ A997;JAVANESE LETTER JA;Lo;0;L;;;;;N;;;;;
+ A998;JAVANESE LETTER NYA MURDA;Lo;0;L;;;;;N;;;;;
+ A999;JAVANESE LETTER JA MAHAPRANA;Lo;0;L;;;;;N;;;;;
+ A99A;JAVANESE LETTER NYA;Lo;0;L;;;;;N;;;;;
+ A99B;JAVANESE LETTER TTA;Lo;0;L;;;;;N;;;;;
+ A99C;JAVANESE LETTER TTA MAHAPRANA;Lo;0;L;;;;;N;;;;;
+ A99D;JAVANESE LETTER DDA;Lo;0;L;;;;;N;;;;;
+ A99E;JAVANESE LETTER DDA MAHAPRANA;Lo;0;L;;;;;N;;;;;
+ A99F;JAVANESE LETTER NA MURDA;Lo;0;L;;;;;N;;;;;
+ A9A0;JAVANESE LETTER TA;Lo;0;L;;;;;N;;;;;
+ A9A1;JAVANESE LETTER TA MURDA;Lo;0;L;;;;;N;;;;;
+ A9A2;JAVANESE LETTER DA;Lo;0;L;;;;;N;;;;;
+ A9A3;JAVANESE LETTER DA MAHAPRANA;Lo;0;L;;;;;N;;;;;
+ A9A4;JAVANESE LETTER NA;Lo;0;L;;;;;N;;;;;
+ A9A5;JAVANESE LETTER PA;Lo;0;L;;;;;N;;;;;
+ A9A6;JAVANESE LETTER PA MURDA;Lo;0;L;;;;;N;;;;;
+ A9A7;JAVANESE LETTER BA;Lo;0;L;;;;;N;;;;;
+ A9A8;JAVANESE LETTER BA MURDA;Lo;0;L;;;;;N;;;;;
+ A9A9;JAVANESE LETTER MA;Lo;0;L;;;;;N;;;;;
+ A9AA;JAVANESE LETTER YA;Lo;0;L;;;;;N;;;;;
+ A9AB;JAVANESE LETTER RA;Lo;0;L;;;;;N;;;;;
+ A9AC;JAVANESE LETTER RA AGUNG;Lo;0;L;;;;;N;;;;;
+ A9AD;JAVANESE LETTER LA;Lo;0;L;;;;;N;;;;;
+ A9AE;JAVANESE LETTER WA;Lo;0;L;;;;;N;;;;;
+ A9AF;JAVANESE LETTER SA MURDA;Lo;0;L;;;;;N;;;;;
+ A9B0;JAVANESE LETTER SA MAHAPRANA;Lo;0;L;;;;;N;;;;;
+ A9B1;JAVANESE LETTER SA;Lo;0;L;;;;;N;;;;;
+ A9B2;JAVANESE LETTER HA;Lo;0;L;;;;;N;;;;;
+ A9B3;JAVANESE SIGN CECAK TELU;Mn;7;NSM;;;;;N;;;;;
+ A9B4;JAVANESE VOWEL SIGN TARUNG;Mc;0;L;;;;;N;;;;;
+ A9B5;JAVANESE VOWEL SIGN TOLONG;Mc;0;L;;;;;N;;;;;
+ A9B6;JAVANESE VOWEL SIGN WULU;Mn;0;NSM;;;;;N;;;;;
+ A9B7;JAVANESE VOWEL SIGN WULU MELIK;Mn;0;NSM;;;;;N;;;;;
+ A9B8;JAVANESE VOWEL SIGN SUKU;Mn;0;NSM;;;;;N;;;;;
+ A9B9;JAVANESE VOWEL SIGN SUKU MENDUT;Mn;0;NSM;;;;;N;;;;;
+ A9BA;JAVANESE VOWEL SIGN TALING;Mc;0;L;;;;;N;;;;;
+ A9BB;JAVANESE VOWEL SIGN DIRGA MURE;Mc;0;L;;;;;N;;;;;
+ A9BC;JAVANESE VOWEL SIGN PEPET;Mn;0;NSM;;;;;N;;;;;
+ A9BD;JAVANESE CONSONANT SIGN KERET;Mn;0;NSM;;;;;N;;;;;
+ A9BE;JAVANESE CONSONANT SIGN PENGKAL;Mc;0;L;;;;;N;;;;;
+ A9BF;JAVANESE CONSONANT SIGN CAKRA;Mc;0;L;;;;;N;;;;;
+ A9C0;JAVANESE PANGKON;Mc;9;L;;;;;N;;;;;
+ A9C1;JAVANESE LEFT RERENGGAN;Po;0;L;;;;;N;;;;;
+ A9C2;JAVANESE RIGHT RERENGGAN;Po;0;L;;;;;N;;;;;
+ A9C3;JAVANESE PADA ANDAP;Po;0;L;;;;;N;;;;;
+ A9C4;JAVANESE PADA MADYA;Po;0;L;;;;;N;;;;;
+ A9C5;JAVANESE PADA LUHUR;Po;0;L;;;;;N;;;;;
+ A9C6;JAVANESE PADA WINDU;Po;0;L;;;;;N;;;;;
+ A9C7;JAVANESE PADA PANGKAT;Po;0;L;;;;;N;;;;;
+ A9C8;JAVANESE PADA LINGSA;Po;0;L;;;;;N;;;;;
+ A9C9;JAVANESE PADA LUNGSI;Po;0;L;;;;;N;;;;;
+ A9CA;JAVANESE PADA ADEG;Po;0;L;;;;;N;;;;;
+ A9CB;JAVANESE PADA ADEG ADEG;Po;0;L;;;;;N;;;;;
+ A9CC;JAVANESE PADA PISELEH;Po;0;L;;;;;N;;;;;
+ A9CD;JAVANESE TURNED PADA PISELEH;Po;0;L;;;;;N;;;;;
+ A9CF;JAVANESE PANGRANGKEP;Lm;0;L;;;;;N;;;;;
+ A9D0;JAVANESE DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ A9D1;JAVANESE DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ A9D2;JAVANESE DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ A9D3;JAVANESE DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ A9D4;JAVANESE DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ A9D5;JAVANESE DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ A9D6;JAVANESE DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ A9D7;JAVANESE DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ A9D8;JAVANESE DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ A9D9;JAVANESE DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ A9DE;JAVANESE PADA TIRTA TUMETES;Po;0;L;;;;;N;;;;;
+ A9DF;JAVANESE PADA ISEN-ISEN;Po;0;L;;;;;N;;;;;
+ A9E0;MYANMAR LETTER SHAN GHA;Lo;0;L;;;;;N;;;;;
+ A9E1;MYANMAR LETTER SHAN CHA;Lo;0;L;;;;;N;;;;;
+ A9E2;MYANMAR LETTER SHAN JHA;Lo;0;L;;;;;N;;;;;
+ A9E3;MYANMAR LETTER SHAN NNA;Lo;0;L;;;;;N;;;;;
+ A9E4;MYANMAR LETTER SHAN BHA;Lo;0;L;;;;;N;;;;;
+ A9E5;MYANMAR SIGN SHAN SAW;Mn;0;NSM;;;;;N;;;;;
+ A9E6;MYANMAR MODIFIER LETTER SHAN REDUPLICATION;Lm;0;L;;;;;N;;;;;
+ A9E7;MYANMAR LETTER TAI LAING NYA;Lo;0;L;;;;;N;;;;;
+ A9E8;MYANMAR LETTER TAI LAING FA;Lo;0;L;;;;;N;;;;;
+ A9E9;MYANMAR LETTER TAI LAING GA;Lo;0;L;;;;;N;;;;;
+ A9EA;MYANMAR LETTER TAI LAING GHA;Lo;0;L;;;;;N;;;;;
+ A9EB;MYANMAR LETTER TAI LAING JA;Lo;0;L;;;;;N;;;;;
+ A9EC;MYANMAR LETTER TAI LAING JHA;Lo;0;L;;;;;N;;;;;
+ A9ED;MYANMAR LETTER TAI LAING DDA;Lo;0;L;;;;;N;;;;;
+ A9EE;MYANMAR LETTER TAI LAING DDHA;Lo;0;L;;;;;N;;;;;
+ A9EF;MYANMAR LETTER TAI LAING NNA;Lo;0;L;;;;;N;;;;;
+ A9F0;MYANMAR TAI LAING DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ A9F1;MYANMAR TAI LAING DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ A9F2;MYANMAR TAI LAING DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ A9F3;MYANMAR TAI LAING DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ A9F4;MYANMAR TAI LAING DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ A9F5;MYANMAR TAI LAING DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ A9F6;MYANMAR TAI LAING DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ A9F7;MYANMAR TAI LAING DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ A9F8;MYANMAR TAI LAING DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ A9F9;MYANMAR TAI LAING DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ A9FA;MYANMAR LETTER TAI LAING LLA;Lo;0;L;;;;;N;;;;;
+ A9FB;MYANMAR LETTER TAI LAING DA;Lo;0;L;;;;;N;;;;;
+ A9FC;MYANMAR LETTER TAI LAING DHA;Lo;0;L;;;;;N;;;;;
+ A9FD;MYANMAR LETTER TAI LAING BA;Lo;0;L;;;;;N;;;;;
+ A9FE;MYANMAR LETTER TAI LAING BHA;Lo;0;L;;;;;N;;;;;
+ AA00;CHAM LETTER A;Lo;0;L;;;;;N;;;;;
+ AA01;CHAM LETTER I;Lo;0;L;;;;;N;;;;;
+ AA02;CHAM LETTER U;Lo;0;L;;;;;N;;;;;
+ AA03;CHAM LETTER E;Lo;0;L;;;;;N;;;;;
+ AA04;CHAM LETTER AI;Lo;0;L;;;;;N;;;;;
+ AA05;CHAM LETTER O;Lo;0;L;;;;;N;;;;;
+ AA06;CHAM LETTER KA;Lo;0;L;;;;;N;;;;;
+ AA07;CHAM LETTER KHA;Lo;0;L;;;;;N;;;;;
+ AA08;CHAM LETTER GA;Lo;0;L;;;;;N;;;;;
+ AA09;CHAM LETTER GHA;Lo;0;L;;;;;N;;;;;
+ AA0A;CHAM LETTER NGUE;Lo;0;L;;;;;N;;;;;
+ AA0B;CHAM LETTER NGA;Lo;0;L;;;;;N;;;;;
+ AA0C;CHAM LETTER CHA;Lo;0;L;;;;;N;;;;;
+ AA0D;CHAM LETTER CHHA;Lo;0;L;;;;;N;;;;;
+ AA0E;CHAM LETTER JA;Lo;0;L;;;;;N;;;;;
+ AA0F;CHAM LETTER JHA;Lo;0;L;;;;;N;;;;;
+ AA10;CHAM LETTER NHUE;Lo;0;L;;;;;N;;;;;
+ AA11;CHAM LETTER NHA;Lo;0;L;;;;;N;;;;;
+ AA12;CHAM LETTER NHJA;Lo;0;L;;;;;N;;;;;
+ AA13;CHAM LETTER TA;Lo;0;L;;;;;N;;;;;
+ AA14;CHAM LETTER THA;Lo;0;L;;;;;N;;;;;
+ AA15;CHAM LETTER DA;Lo;0;L;;;;;N;;;;;
+ AA16;CHAM LETTER DHA;Lo;0;L;;;;;N;;;;;
+ AA17;CHAM LETTER NUE;Lo;0;L;;;;;N;;;;;
+ AA18;CHAM LETTER NA;Lo;0;L;;;;;N;;;;;
+ AA19;CHAM LETTER DDA;Lo;0;L;;;;;N;;;;;
+ AA1A;CHAM LETTER PA;Lo;0;L;;;;;N;;;;;
+ AA1B;CHAM LETTER PPA;Lo;0;L;;;;;N;;;;;
+ AA1C;CHAM LETTER PHA;Lo;0;L;;;;;N;;;;;
+ AA1D;CHAM LETTER BA;Lo;0;L;;;;;N;;;;;
+ AA1E;CHAM LETTER BHA;Lo;0;L;;;;;N;;;;;
+ AA1F;CHAM LETTER MUE;Lo;0;L;;;;;N;;;;;
+ AA20;CHAM LETTER MA;Lo;0;L;;;;;N;;;;;
+ AA21;CHAM LETTER BBA;Lo;0;L;;;;;N;;;;;
+ AA22;CHAM LETTER YA;Lo;0;L;;;;;N;;;;;
+ AA23;CHAM LETTER RA;Lo;0;L;;;;;N;;;;;
+ AA24;CHAM LETTER LA;Lo;0;L;;;;;N;;;;;
+ AA25;CHAM LETTER VA;Lo;0;L;;;;;N;;;;;
+ AA26;CHAM LETTER SSA;Lo;0;L;;;;;N;;;;;
+ AA27;CHAM LETTER SA;Lo;0;L;;;;;N;;;;;
+ AA28;CHAM LETTER HA;Lo;0;L;;;;;N;;;;;
+ AA29;CHAM VOWEL SIGN AA;Mn;0;NSM;;;;;N;;;;;
+ AA2A;CHAM VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ AA2B;CHAM VOWEL SIGN II;Mn;0;NSM;;;;;N;;;;;
+ AA2C;CHAM VOWEL SIGN EI;Mn;0;NSM;;;;;N;;;;;
+ AA2D;CHAM VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ AA2E;CHAM VOWEL SIGN OE;Mn;0;NSM;;;;;N;;;;;
+ AA2F;CHAM VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ AA30;CHAM VOWEL SIGN AI;Mc;0;L;;;;;N;;;;;
+ AA31;CHAM VOWEL SIGN AU;Mn;0;NSM;;;;;N;;;;;
+ AA32;CHAM VOWEL SIGN UE;Mn;0;NSM;;;;;N;;;;;
+ AA33;CHAM CONSONANT SIGN YA;Mc;0;L;;;;;N;;;;;
+ AA34;CHAM CONSONANT SIGN RA;Mc;0;L;;;;;N;;;;;
+ AA35;CHAM CONSONANT SIGN LA;Mn;0;NSM;;;;;N;;;;;
+ AA36;CHAM CONSONANT SIGN WA;Mn;0;NSM;;;;;N;;;;;
+ AA40;CHAM LETTER FINAL K;Lo;0;L;;;;;N;;;;;
+ AA41;CHAM LETTER FINAL G;Lo;0;L;;;;;N;;;;;
+ AA42;CHAM LETTER FINAL NG;Lo;0;L;;;;;N;;;;;
+ AA43;CHAM CONSONANT SIGN FINAL NG;Mn;0;NSM;;;;;N;;;;;
+ AA44;CHAM LETTER FINAL CH;Lo;0;L;;;;;N;;;;;
+ AA45;CHAM LETTER FINAL T;Lo;0;L;;;;;N;;;;;
+ AA46;CHAM LETTER FINAL N;Lo;0;L;;;;;N;;;;;
+ AA47;CHAM LETTER FINAL P;Lo;0;L;;;;;N;;;;;
+ AA48;CHAM LETTER FINAL Y;Lo;0;L;;;;;N;;;;;
+ AA49;CHAM LETTER FINAL R;Lo;0;L;;;;;N;;;;;
+ AA4A;CHAM LETTER FINAL L;Lo;0;L;;;;;N;;;;;
+ AA4B;CHAM LETTER FINAL SS;Lo;0;L;;;;;N;;;;;
+ AA4C;CHAM CONSONANT SIGN FINAL M;Mn;0;NSM;;;;;N;;;;;
+ AA4D;CHAM CONSONANT SIGN FINAL H;Mc;0;L;;;;;N;;;;;
+ AA50;CHAM DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ AA51;CHAM DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ AA52;CHAM DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ AA53;CHAM DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ AA54;CHAM DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ AA55;CHAM DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ AA56;CHAM DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ AA57;CHAM DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ AA58;CHAM DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ AA59;CHAM DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ AA5C;CHAM PUNCTUATION SPIRAL;Po;0;L;;;;;N;;;;;
+ AA5D;CHAM PUNCTUATION DANDA;Po;0;L;;;;;N;;;;;
+ AA5E;CHAM PUNCTUATION DOUBLE DANDA;Po;0;L;;;;;N;;;;;
+ AA5F;CHAM PUNCTUATION TRIPLE DANDA;Po;0;L;;;;;N;;;;;
+ AA60;MYANMAR LETTER KHAMTI GA;Lo;0;L;;;;;N;;;;;
+ AA61;MYANMAR LETTER KHAMTI CA;Lo;0;L;;;;;N;;;;;
+ AA62;MYANMAR LETTER KHAMTI CHA;Lo;0;L;;;;;N;;;;;
+ AA63;MYANMAR LETTER KHAMTI JA;Lo;0;L;;;;;N;;;;;
+ AA64;MYANMAR LETTER KHAMTI JHA;Lo;0;L;;;;;N;;;;;
+ AA65;MYANMAR LETTER KHAMTI NYA;Lo;0;L;;;;;N;;;;;
+ AA66;MYANMAR LETTER KHAMTI TTA;Lo;0;L;;;;;N;;;;;
+ AA67;MYANMAR LETTER KHAMTI TTHA;Lo;0;L;;;;;N;;;;;
+ AA68;MYANMAR LETTER KHAMTI DDA;Lo;0;L;;;;;N;;;;;
+ AA69;MYANMAR LETTER KHAMTI DDHA;Lo;0;L;;;;;N;;;;;
+ AA6A;MYANMAR LETTER KHAMTI DHA;Lo;0;L;;;;;N;;;;;
+ AA6B;MYANMAR LETTER KHAMTI NA;Lo;0;L;;;;;N;;;;;
+ AA6C;MYANMAR LETTER KHAMTI SA;Lo;0;L;;;;;N;;;;;
+ AA6D;MYANMAR LETTER KHAMTI HA;Lo;0;L;;;;;N;;;;;
+ AA6E;MYANMAR LETTER KHAMTI HHA;Lo;0;L;;;;;N;;;;;
+ AA6F;MYANMAR LETTER KHAMTI FA;Lo;0;L;;;;;N;;;;;
+ AA70;MYANMAR MODIFIER LETTER KHAMTI REDUPLICATION;Lm;0;L;;;;;N;;;;;
+ AA71;MYANMAR LETTER KHAMTI XA;Lo;0;L;;;;;N;;;;;
+ AA72;MYANMAR LETTER KHAMTI ZA;Lo;0;L;;;;;N;;;;;
+ AA73;MYANMAR LETTER KHAMTI RA;Lo;0;L;;;;;N;;;;;
+ AA74;MYANMAR LOGOGRAM KHAMTI OAY;Lo;0;L;;;;;N;;;;;
+ AA75;MYANMAR LOGOGRAM KHAMTI QN;Lo;0;L;;;;;N;;;;;
+ AA76;MYANMAR LOGOGRAM KHAMTI HM;Lo;0;L;;;;;N;;;;;
+ AA77;MYANMAR SYMBOL AITON EXCLAMATION;So;0;L;;;;;N;;;;;
+ AA78;MYANMAR SYMBOL AITON ONE;So;0;L;;;;;N;;;;;
+ AA79;MYANMAR SYMBOL AITON TWO;So;0;L;;;;;N;;;;;
+ AA7A;MYANMAR LETTER AITON RA;Lo;0;L;;;;;N;;;;;
+ AA7B;MYANMAR SIGN PAO KAREN TONE;Mc;0;L;;;;;N;;;;;
+ AA7C;MYANMAR SIGN TAI LAING TONE-2;Mn;0;NSM;;;;;N;;;;;
+ AA7D;MYANMAR SIGN TAI LAING TONE-5;Mc;0;L;;;;;N;;;;;
+ AA7E;MYANMAR LETTER SHWE PALAUNG CHA;Lo;0;L;;;;;N;;;;;
+ AA7F;MYANMAR LETTER SHWE PALAUNG SHA;Lo;0;L;;;;;N;;;;;
+ AA80;TAI VIET LETTER LOW KO;Lo;0;L;;;;;N;;;;;
+ AA81;TAI VIET LETTER HIGH KO;Lo;0;L;;;;;N;;;;;
+ AA82;TAI VIET LETTER LOW KHO;Lo;0;L;;;;;N;;;;;
+ AA83;TAI VIET LETTER HIGH KHO;Lo;0;L;;;;;N;;;;;
+ AA84;TAI VIET LETTER LOW KHHO;Lo;0;L;;;;;N;;;;;
+ AA85;TAI VIET LETTER HIGH KHHO;Lo;0;L;;;;;N;;;;;
+ AA86;TAI VIET LETTER LOW GO;Lo;0;L;;;;;N;;;;;
+ AA87;TAI VIET LETTER HIGH GO;Lo;0;L;;;;;N;;;;;
+ AA88;TAI VIET LETTER LOW NGO;Lo;0;L;;;;;N;;;;;
+ AA89;TAI VIET LETTER HIGH NGO;Lo;0;L;;;;;N;;;;;
+ AA8A;TAI VIET LETTER LOW CO;Lo;0;L;;;;;N;;;;;
+ AA8B;TAI VIET LETTER HIGH CO;Lo;0;L;;;;;N;;;;;
+ AA8C;TAI VIET LETTER LOW CHO;Lo;0;L;;;;;N;;;;;
+ AA8D;TAI VIET LETTER HIGH CHO;Lo;0;L;;;;;N;;;;;
+ AA8E;TAI VIET LETTER LOW SO;Lo;0;L;;;;;N;;;;;
+ AA8F;TAI VIET LETTER HIGH SO;Lo;0;L;;;;;N;;;;;
+ AA90;TAI VIET LETTER LOW NYO;Lo;0;L;;;;;N;;;;;
+ AA91;TAI VIET LETTER HIGH NYO;Lo;0;L;;;;;N;;;;;
+ AA92;TAI VIET LETTER LOW DO;Lo;0;L;;;;;N;;;;;
+ AA93;TAI VIET LETTER HIGH DO;Lo;0;L;;;;;N;;;;;
+ AA94;TAI VIET LETTER LOW TO;Lo;0;L;;;;;N;;;;;
+ AA95;TAI VIET LETTER HIGH TO;Lo;0;L;;;;;N;;;;;
+ AA96;TAI VIET LETTER LOW THO;Lo;0;L;;;;;N;;;;;
+ AA97;TAI VIET LETTER HIGH THO;Lo;0;L;;;;;N;;;;;
+ AA98;TAI VIET LETTER LOW NO;Lo;0;L;;;;;N;;;;;
+ AA99;TAI VIET LETTER HIGH NO;Lo;0;L;;;;;N;;;;;
+ AA9A;TAI VIET LETTER LOW BO;Lo;0;L;;;;;N;;;;;
+ AA9B;TAI VIET LETTER HIGH BO;Lo;0;L;;;;;N;;;;;
+ AA9C;TAI VIET LETTER LOW PO;Lo;0;L;;;;;N;;;;;
+ AA9D;TAI VIET LETTER HIGH PO;Lo;0;L;;;;;N;;;;;
+ AA9E;TAI VIET LETTER LOW PHO;Lo;0;L;;;;;N;;;;;
+ AA9F;TAI VIET LETTER HIGH PHO;Lo;0;L;;;;;N;;;;;
+ AAA0;TAI VIET LETTER LOW FO;Lo;0;L;;;;;N;;;;;
+ AAA1;TAI VIET LETTER HIGH FO;Lo;0;L;;;;;N;;;;;
+ AAA2;TAI VIET LETTER LOW MO;Lo;0;L;;;;;N;;;;;
+ AAA3;TAI VIET LETTER HIGH MO;Lo;0;L;;;;;N;;;;;
+ AAA4;TAI VIET LETTER LOW YO;Lo;0;L;;;;;N;;;;;
+ AAA5;TAI VIET LETTER HIGH YO;Lo;0;L;;;;;N;;;;;
+ AAA6;TAI VIET LETTER LOW RO;Lo;0;L;;;;;N;;;;;
+ AAA7;TAI VIET LETTER HIGH RO;Lo;0;L;;;;;N;;;;;
+ AAA8;TAI VIET LETTER LOW LO;Lo;0;L;;;;;N;;;;;
+ AAA9;TAI VIET LETTER HIGH LO;Lo;0;L;;;;;N;;;;;
+ AAAA;TAI VIET LETTER LOW VO;Lo;0;L;;;;;N;;;;;
+ AAAB;TAI VIET LETTER HIGH VO;Lo;0;L;;;;;N;;;;;
+ AAAC;TAI VIET LETTER LOW HO;Lo;0;L;;;;;N;;;;;
+ AAAD;TAI VIET LETTER HIGH HO;Lo;0;L;;;;;N;;;;;
+ AAAE;TAI VIET LETTER LOW O;Lo;0;L;;;;;N;;;;;
+ AAAF;TAI VIET LETTER HIGH O;Lo;0;L;;;;;N;;;;;
+ AAB0;TAI VIET MAI KANG;Mn;230;NSM;;;;;N;;;;;
+ AAB1;TAI VIET VOWEL AA;Lo;0;L;;;;;N;;;;;
+ AAB2;TAI VIET VOWEL I;Mn;230;NSM;;;;;N;;;;;
+ AAB3;TAI VIET VOWEL UE;Mn;230;NSM;;;;;N;;;;;
+ AAB4;TAI VIET VOWEL U;Mn;220;NSM;;;;;N;;;;;
+ AAB5;TAI VIET VOWEL E;Lo;0;L;;;;;N;;;;;
+ AAB6;TAI VIET VOWEL O;Lo;0;L;;;;;N;;;;;
+ AAB7;TAI VIET MAI KHIT;Mn;230;NSM;;;;;N;;;;;
+ AAB8;TAI VIET VOWEL IA;Mn;230;NSM;;;;;N;;;;;
+ AAB9;TAI VIET VOWEL UEA;Lo;0;L;;;;;N;;;;;
+ AABA;TAI VIET VOWEL UA;Lo;0;L;;;;;N;;;;;
+ AABB;TAI VIET VOWEL AUE;Lo;0;L;;;;;N;;;;;
+ AABC;TAI VIET VOWEL AY;Lo;0;L;;;;;N;;;;;
+ AABD;TAI VIET VOWEL AN;Lo;0;L;;;;;N;;;;;
+ AABE;TAI VIET VOWEL AM;Mn;230;NSM;;;;;N;;;;;
+ AABF;TAI VIET TONE MAI EK;Mn;230;NSM;;;;;N;;;;;
+ AAC0;TAI VIET TONE MAI NUENG;Lo;0;L;;;;;N;;;;;
+ AAC1;TAI VIET TONE MAI THO;Mn;230;NSM;;;;;N;;;;;
+ AAC2;TAI VIET TONE MAI SONG;Lo;0;L;;;;;N;;;;;
+ AADB;TAI VIET SYMBOL KON;Lo;0;L;;;;;N;;;;;
+ AADC;TAI VIET SYMBOL NUENG;Lo;0;L;;;;;N;;;;;
+ AADD;TAI VIET SYMBOL SAM;Lm;0;L;;;;;N;;;;;
+ AADE;TAI VIET SYMBOL HO HOI;Po;0;L;;;;;N;;;;;
+ AADF;TAI VIET SYMBOL KOI KOI;Po;0;L;;;;;N;;;;;
+ AAE0;MEETEI MAYEK LETTER E;Lo;0;L;;;;;N;;;;;
+ AAE1;MEETEI MAYEK LETTER O;Lo;0;L;;;;;N;;;;;
+ AAE2;MEETEI MAYEK LETTER CHA;Lo;0;L;;;;;N;;;;;
+ AAE3;MEETEI MAYEK LETTER NYA;Lo;0;L;;;;;N;;;;;
+ AAE4;MEETEI MAYEK LETTER TTA;Lo;0;L;;;;;N;;;;;
+ AAE5;MEETEI MAYEK LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ AAE6;MEETEI MAYEK LETTER DDA;Lo;0;L;;;;;N;;;;;
+ AAE7;MEETEI MAYEK LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ AAE8;MEETEI MAYEK LETTER NNA;Lo;0;L;;;;;N;;;;;
+ AAE9;MEETEI MAYEK LETTER SHA;Lo;0;L;;;;;N;;;;;
+ AAEA;MEETEI MAYEK LETTER SSA;Lo;0;L;;;;;N;;;;;
+ AAEB;MEETEI MAYEK VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ AAEC;MEETEI MAYEK VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ AAED;MEETEI MAYEK VOWEL SIGN AAI;Mn;0;NSM;;;;;N;;;;;
+ AAEE;MEETEI MAYEK VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ AAEF;MEETEI MAYEK VOWEL SIGN AAU;Mc;0;L;;;;;N;;;;;
+ AAF0;MEETEI MAYEK CHEIKHAN;Po;0;L;;;;;N;;;;;
+ AAF1;MEETEI MAYEK AHANG KHUDAM;Po;0;L;;;;;N;;;;;
+ AAF2;MEETEI MAYEK ANJI;Lo;0;L;;;;;N;;;;;
+ AAF3;MEETEI MAYEK SYLLABLE REPETITION MARK;Lm;0;L;;;;;N;;;;;
+ AAF4;MEETEI MAYEK WORD REPETITION MARK;Lm;0;L;;;;;N;;;;;
+ AAF5;MEETEI MAYEK VOWEL SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ AAF6;MEETEI MAYEK VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ AB01;ETHIOPIC SYLLABLE TTHU;Lo;0;L;;;;;N;;;;;
+ AB02;ETHIOPIC SYLLABLE TTHI;Lo;0;L;;;;;N;;;;;
+ AB03;ETHIOPIC SYLLABLE TTHAA;Lo;0;L;;;;;N;;;;;
+ AB04;ETHIOPIC SYLLABLE TTHEE;Lo;0;L;;;;;N;;;;;
+ AB05;ETHIOPIC SYLLABLE TTHE;Lo;0;L;;;;;N;;;;;
+ AB06;ETHIOPIC SYLLABLE TTHO;Lo;0;L;;;;;N;;;;;
+ AB09;ETHIOPIC SYLLABLE DDHU;Lo;0;L;;;;;N;;;;;
+ AB0A;ETHIOPIC SYLLABLE DDHI;Lo;0;L;;;;;N;;;;;
+ AB0B;ETHIOPIC SYLLABLE DDHAA;Lo;0;L;;;;;N;;;;;
+ AB0C;ETHIOPIC SYLLABLE DDHEE;Lo;0;L;;;;;N;;;;;
+ AB0D;ETHIOPIC SYLLABLE DDHE;Lo;0;L;;;;;N;;;;;
+ AB0E;ETHIOPIC SYLLABLE DDHO;Lo;0;L;;;;;N;;;;;
+ AB11;ETHIOPIC SYLLABLE DZU;Lo;0;L;;;;;N;;;;;
+ AB12;ETHIOPIC SYLLABLE DZI;Lo;0;L;;;;;N;;;;;
+ AB13;ETHIOPIC SYLLABLE DZAA;Lo;0;L;;;;;N;;;;;
+ AB14;ETHIOPIC SYLLABLE DZEE;Lo;0;L;;;;;N;;;;;
+ AB15;ETHIOPIC SYLLABLE DZE;Lo;0;L;;;;;N;;;;;
+ AB16;ETHIOPIC SYLLABLE DZO;Lo;0;L;;;;;N;;;;;
+ AB20;ETHIOPIC SYLLABLE CCHHA;Lo;0;L;;;;;N;;;;;
+ AB21;ETHIOPIC SYLLABLE CCHHU;Lo;0;L;;;;;N;;;;;
+ AB22;ETHIOPIC SYLLABLE CCHHI;Lo;0;L;;;;;N;;;;;
+ AB23;ETHIOPIC SYLLABLE CCHHAA;Lo;0;L;;;;;N;;;;;
+ AB24;ETHIOPIC SYLLABLE CCHHEE;Lo;0;L;;;;;N;;;;;
+ AB25;ETHIOPIC SYLLABLE CCHHE;Lo;0;L;;;;;N;;;;;
+ AB26;ETHIOPIC SYLLABLE CCHHO;Lo;0;L;;;;;N;;;;;
+ AB28;ETHIOPIC SYLLABLE BBA;Lo;0;L;;;;;N;;;;;
+ AB29;ETHIOPIC SYLLABLE BBU;Lo;0;L;;;;;N;;;;;
+ AB2A;ETHIOPIC SYLLABLE BBI;Lo;0;L;;;;;N;;;;;
+ AB2B;ETHIOPIC SYLLABLE BBAA;Lo;0;L;;;;;N;;;;;
+ AB2C;ETHIOPIC SYLLABLE BBEE;Lo;0;L;;;;;N;;;;;
+ AB2D;ETHIOPIC SYLLABLE BBE;Lo;0;L;;;;;N;;;;;
+ AB2E;ETHIOPIC SYLLABLE BBO;Lo;0;L;;;;;N;;;;;
+ AB30;LATIN SMALL LETTER BARRED ALPHA;Ll;0;L;;;;;N;;;;;
+ AB31;LATIN SMALL LETTER A REVERSED-SCHWA;Ll;0;L;;;;;N;;;;;
+ AB32;LATIN SMALL LETTER BLACKLETTER E;Ll;0;L;;;;;N;;;;;
+ AB33;LATIN SMALL LETTER BARRED E;Ll;0;L;;;;;N;;;;;
+ AB34;LATIN SMALL LETTER E WITH FLOURISH;Ll;0;L;;;;;N;;;;;
+ AB35;LATIN SMALL LETTER LENIS F;Ll;0;L;;;;;N;;;;;
+ AB36;LATIN SMALL LETTER SCRIPT G WITH CROSSED-TAIL;Ll;0;L;;;;;N;;;;;
+ AB37;LATIN SMALL LETTER L WITH INVERTED LAZY S;Ll;0;L;;;;;N;;;;;
+ AB38;LATIN SMALL LETTER L WITH DOUBLE MIDDLE TILDE;Ll;0;L;;;;;N;;;;;
+ AB39;LATIN SMALL LETTER L WITH MIDDLE RING;Ll;0;L;;;;;N;;;;;
+ AB3A;LATIN SMALL LETTER M WITH CROSSED-TAIL;Ll;0;L;;;;;N;;;;;
+ AB3B;LATIN SMALL LETTER N WITH CROSSED-TAIL;Ll;0;L;;;;;N;;;;;
+ AB3C;LATIN SMALL LETTER ENG WITH CROSSED-TAIL;Ll;0;L;;;;;N;;;;;
+ AB3D;LATIN SMALL LETTER BLACKLETTER O;Ll;0;L;;;;;N;;;;;
+ AB3E;LATIN SMALL LETTER BLACKLETTER O WITH STROKE;Ll;0;L;;;;;N;;;;;
+ AB3F;LATIN SMALL LETTER OPEN O WITH STROKE;Ll;0;L;;;;;N;;;;;
+ AB40;LATIN SMALL LETTER INVERTED OE;Ll;0;L;;;;;N;;;;;
+ AB41;LATIN SMALL LETTER TURNED OE WITH STROKE;Ll;0;L;;;;;N;;;;;
+ AB42;LATIN SMALL LETTER TURNED OE WITH HORIZONTAL STROKE;Ll;0;L;;;;;N;;;;;
+ AB43;LATIN SMALL LETTER TURNED O OPEN-O;Ll;0;L;;;;;N;;;;;
+ AB44;LATIN SMALL LETTER TURNED O OPEN-O WITH STROKE;Ll;0;L;;;;;N;;;;;
+ AB45;LATIN SMALL LETTER STIRRUP R;Ll;0;L;;;;;N;;;;;
+ AB46;LATIN LETTER SMALL CAPITAL R WITH RIGHT LEG;Ll;0;L;;;;;N;;;;;
+ AB47;LATIN SMALL LETTER R WITHOUT HANDLE;Ll;0;L;;;;;N;;;;;
+ AB48;LATIN SMALL LETTER DOUBLE R;Ll;0;L;;;;;N;;;;;
+ AB49;LATIN SMALL LETTER R WITH CROSSED-TAIL;Ll;0;L;;;;;N;;;;;
+ AB4A;LATIN SMALL LETTER DOUBLE R WITH CROSSED-TAIL;Ll;0;L;;;;;N;;;;;
+ AB4B;LATIN SMALL LETTER SCRIPT R;Ll;0;L;;;;;N;;;;;
+ AB4C;LATIN SMALL LETTER SCRIPT R WITH RING;Ll;0;L;;;;;N;;;;;
+ AB4D;LATIN SMALL LETTER BASELINE ESH;Ll;0;L;;;;;N;;;;;
+ AB4E;LATIN SMALL LETTER U WITH SHORT RIGHT LEG;Ll;0;L;;;;;N;;;;;
+ AB4F;LATIN SMALL LETTER U BAR WITH SHORT RIGHT LEG;Ll;0;L;;;;;N;;;;;
+ AB50;LATIN SMALL LETTER UI;Ll;0;L;;;;;N;;;;;
+ AB51;LATIN SMALL LETTER TURNED UI;Ll;0;L;;;;;N;;;;;
+ AB52;LATIN SMALL LETTER U WITH LEFT HOOK;Ll;0;L;;;;;N;;;;;
+ AB53;LATIN SMALL LETTER CHI;Ll;0;L;;;;;N;;;A7B3;;A7B3
+ AB54;LATIN SMALL LETTER CHI WITH LOW RIGHT RING;Ll;0;L;;;;;N;;;;;
+ AB55;LATIN SMALL LETTER CHI WITH LOW LEFT SERIF;Ll;0;L;;;;;N;;;;;
+ AB56;LATIN SMALL LETTER X WITH LOW RIGHT RING;Ll;0;L;;;;;N;;;;;
+ AB57;LATIN SMALL LETTER X WITH LONG LEFT LEG;Ll;0;L;;;;;N;;;;;
+ AB58;LATIN SMALL LETTER X WITH LONG LEFT LEG AND LOW RIGHT RING;Ll;0;L;;;;;N;;;;;
+ AB59;LATIN SMALL LETTER X WITH LONG LEFT LEG WITH SERIF;Ll;0;L;;;;;N;;;;;
+ AB5A;LATIN SMALL LETTER Y WITH SHORT RIGHT LEG;Ll;0;L;;;;;N;;;;;
+ AB5B;MODIFIER BREVE WITH INVERTED BREVE;Sk;0;L;;;;;N;;;;;
+ AB5C;MODIFIER LETTER SMALL HENG;Lm;0;L;<super> A727;;;;N;;;;;
+ AB5D;MODIFIER LETTER SMALL L WITH INVERTED LAZY S;Lm;0;L;<super> AB37;;;;N;;;;;
+ AB5E;MODIFIER LETTER SMALL L WITH MIDDLE TILDE;Lm;0;L;<super> 026B;;;;N;;;;;
+ AB5F;MODIFIER LETTER SMALL U WITH LEFT HOOK;Lm;0;L;<super> AB52;;;;N;;;;;
+ AB60;LATIN SMALL LETTER SAKHA YAT;Ll;0;L;;;;;N;;;;;
+ AB61;LATIN SMALL LETTER IOTIFIED E;Ll;0;L;;;;;N;;;;;
+ AB62;LATIN SMALL LETTER OPEN OE;Ll;0;L;;;;;N;;;;;
+ AB63;LATIN SMALL LETTER UO;Ll;0;L;;;;;N;;;;;
+ AB64;LATIN SMALL LETTER INVERTED ALPHA;Ll;0;L;;;;;N;;;;;
+ AB65;GREEK LETTER SMALL CAPITAL OMEGA;Ll;0;L;;;;;N;;;;;
+ AB66;LATIN SMALL LETTER DZ DIGRAPH WITH RETROFLEX HOOK;Ll;0;L;;;;;N;;;;;
+ AB67;LATIN SMALL LETTER TS DIGRAPH WITH RETROFLEX HOOK;Ll;0;L;;;;;N;;;;;
+ AB70;CHEROKEE SMALL LETTER A;Ll;0;L;;;;;N;;;13A0;;13A0
+ AB71;CHEROKEE SMALL LETTER E;Ll;0;L;;;;;N;;;13A1;;13A1
+ AB72;CHEROKEE SMALL LETTER I;Ll;0;L;;;;;N;;;13A2;;13A2
+ AB73;CHEROKEE SMALL LETTER O;Ll;0;L;;;;;N;;;13A3;;13A3
+ AB74;CHEROKEE SMALL LETTER U;Ll;0;L;;;;;N;;;13A4;;13A4
+ AB75;CHEROKEE SMALL LETTER V;Ll;0;L;;;;;N;;;13A5;;13A5
+ AB76;CHEROKEE SMALL LETTER GA;Ll;0;L;;;;;N;;;13A6;;13A6
+ AB77;CHEROKEE SMALL LETTER KA;Ll;0;L;;;;;N;;;13A7;;13A7
+ AB78;CHEROKEE SMALL LETTER GE;Ll;0;L;;;;;N;;;13A8;;13A8
+ AB79;CHEROKEE SMALL LETTER GI;Ll;0;L;;;;;N;;;13A9;;13A9
+ AB7A;CHEROKEE SMALL LETTER GO;Ll;0;L;;;;;N;;;13AA;;13AA
+ AB7B;CHEROKEE SMALL LETTER GU;Ll;0;L;;;;;N;;;13AB;;13AB
+ AB7C;CHEROKEE SMALL LETTER GV;Ll;0;L;;;;;N;;;13AC;;13AC
+ AB7D;CHEROKEE SMALL LETTER HA;Ll;0;L;;;;;N;;;13AD;;13AD
+ AB7E;CHEROKEE SMALL LETTER HE;Ll;0;L;;;;;N;;;13AE;;13AE
+ AB7F;CHEROKEE SMALL LETTER HI;Ll;0;L;;;;;N;;;13AF;;13AF
+ AB80;CHEROKEE SMALL LETTER HO;Ll;0;L;;;;;N;;;13B0;;13B0
+ AB81;CHEROKEE SMALL LETTER HU;Ll;0;L;;;;;N;;;13B1;;13B1
+ AB82;CHEROKEE SMALL LETTER HV;Ll;0;L;;;;;N;;;13B2;;13B2
+ AB83;CHEROKEE SMALL LETTER LA;Ll;0;L;;;;;N;;;13B3;;13B3
+ AB84;CHEROKEE SMALL LETTER LE;Ll;0;L;;;;;N;;;13B4;;13B4
+ AB85;CHEROKEE SMALL LETTER LI;Ll;0;L;;;;;N;;;13B5;;13B5
+ AB86;CHEROKEE SMALL LETTER LO;Ll;0;L;;;;;N;;;13B6;;13B6
+ AB87;CHEROKEE SMALL LETTER LU;Ll;0;L;;;;;N;;;13B7;;13B7
+ AB88;CHEROKEE SMALL LETTER LV;Ll;0;L;;;;;N;;;13B8;;13B8
+ AB89;CHEROKEE SMALL LETTER MA;Ll;0;L;;;;;N;;;13B9;;13B9
+ AB8A;CHEROKEE SMALL LETTER ME;Ll;0;L;;;;;N;;;13BA;;13BA
+ AB8B;CHEROKEE SMALL LETTER MI;Ll;0;L;;;;;N;;;13BB;;13BB
+ AB8C;CHEROKEE SMALL LETTER MO;Ll;0;L;;;;;N;;;13BC;;13BC
+ AB8D;CHEROKEE SMALL LETTER MU;Ll;0;L;;;;;N;;;13BD;;13BD
+ AB8E;CHEROKEE SMALL LETTER NA;Ll;0;L;;;;;N;;;13BE;;13BE
+ AB8F;CHEROKEE SMALL LETTER HNA;Ll;0;L;;;;;N;;;13BF;;13BF
+ AB90;CHEROKEE SMALL LETTER NAH;Ll;0;L;;;;;N;;;13C0;;13C0
+ AB91;CHEROKEE SMALL LETTER NE;Ll;0;L;;;;;N;;;13C1;;13C1
+ AB92;CHEROKEE SMALL LETTER NI;Ll;0;L;;;;;N;;;13C2;;13C2
+ AB93;CHEROKEE SMALL LETTER NO;Ll;0;L;;;;;N;;;13C3;;13C3
+ AB94;CHEROKEE SMALL LETTER NU;Ll;0;L;;;;;N;;;13C4;;13C4
+ AB95;CHEROKEE SMALL LETTER NV;Ll;0;L;;;;;N;;;13C5;;13C5
+ AB96;CHEROKEE SMALL LETTER QUA;Ll;0;L;;;;;N;;;13C6;;13C6
+ AB97;CHEROKEE SMALL LETTER QUE;Ll;0;L;;;;;N;;;13C7;;13C7
+ AB98;CHEROKEE SMALL LETTER QUI;Ll;0;L;;;;;N;;;13C8;;13C8
+ AB99;CHEROKEE SMALL LETTER QUO;Ll;0;L;;;;;N;;;13C9;;13C9
+ AB9A;CHEROKEE SMALL LETTER QUU;Ll;0;L;;;;;N;;;13CA;;13CA
+ AB9B;CHEROKEE SMALL LETTER QUV;Ll;0;L;;;;;N;;;13CB;;13CB
+ AB9C;CHEROKEE SMALL LETTER SA;Ll;0;L;;;;;N;;;13CC;;13CC
+ AB9D;CHEROKEE SMALL LETTER S;Ll;0;L;;;;;N;;;13CD;;13CD
+ AB9E;CHEROKEE SMALL LETTER SE;Ll;0;L;;;;;N;;;13CE;;13CE
+ AB9F;CHEROKEE SMALL LETTER SI;Ll;0;L;;;;;N;;;13CF;;13CF
+ ABA0;CHEROKEE SMALL LETTER SO;Ll;0;L;;;;;N;;;13D0;;13D0
+ ABA1;CHEROKEE SMALL LETTER SU;Ll;0;L;;;;;N;;;13D1;;13D1
+ ABA2;CHEROKEE SMALL LETTER SV;Ll;0;L;;;;;N;;;13D2;;13D2
+ ABA3;CHEROKEE SMALL LETTER DA;Ll;0;L;;;;;N;;;13D3;;13D3
+ ABA4;CHEROKEE SMALL LETTER TA;Ll;0;L;;;;;N;;;13D4;;13D4
+ ABA5;CHEROKEE SMALL LETTER DE;Ll;0;L;;;;;N;;;13D5;;13D5
+ ABA6;CHEROKEE SMALL LETTER TE;Ll;0;L;;;;;N;;;13D6;;13D6
+ ABA7;CHEROKEE SMALL LETTER DI;Ll;0;L;;;;;N;;;13D7;;13D7
+ ABA8;CHEROKEE SMALL LETTER TI;Ll;0;L;;;;;N;;;13D8;;13D8
+ ABA9;CHEROKEE SMALL LETTER DO;Ll;0;L;;;;;N;;;13D9;;13D9
+ ABAA;CHEROKEE SMALL LETTER DU;Ll;0;L;;;;;N;;;13DA;;13DA
+ ABAB;CHEROKEE SMALL LETTER DV;Ll;0;L;;;;;N;;;13DB;;13DB
+ ABAC;CHEROKEE SMALL LETTER DLA;Ll;0;L;;;;;N;;;13DC;;13DC
+ ABAD;CHEROKEE SMALL LETTER TLA;Ll;0;L;;;;;N;;;13DD;;13DD
+ ABAE;CHEROKEE SMALL LETTER TLE;Ll;0;L;;;;;N;;;13DE;;13DE
+ ABAF;CHEROKEE SMALL LETTER TLI;Ll;0;L;;;;;N;;;13DF;;13DF
+ ABB0;CHEROKEE SMALL LETTER TLO;Ll;0;L;;;;;N;;;13E0;;13E0
+ ABB1;CHEROKEE SMALL LETTER TLU;Ll;0;L;;;;;N;;;13E1;;13E1
+ ABB2;CHEROKEE SMALL LETTER TLV;Ll;0;L;;;;;N;;;13E2;;13E2
+ ABB3;CHEROKEE SMALL LETTER TSA;Ll;0;L;;;;;N;;;13E3;;13E3
+ ABB4;CHEROKEE SMALL LETTER TSE;Ll;0;L;;;;;N;;;13E4;;13E4
+ ABB5;CHEROKEE SMALL LETTER TSI;Ll;0;L;;;;;N;;;13E5;;13E5
+ ABB6;CHEROKEE SMALL LETTER TSO;Ll;0;L;;;;;N;;;13E6;;13E6
+ ABB7;CHEROKEE SMALL LETTER TSU;Ll;0;L;;;;;N;;;13E7;;13E7
+ ABB8;CHEROKEE SMALL LETTER TSV;Ll;0;L;;;;;N;;;13E8;;13E8
+ ABB9;CHEROKEE SMALL LETTER WA;Ll;0;L;;;;;N;;;13E9;;13E9
+ ABBA;CHEROKEE SMALL LETTER WE;Ll;0;L;;;;;N;;;13EA;;13EA
+ ABBB;CHEROKEE SMALL LETTER WI;Ll;0;L;;;;;N;;;13EB;;13EB
+ ABBC;CHEROKEE SMALL LETTER WO;Ll;0;L;;;;;N;;;13EC;;13EC
+ ABBD;CHEROKEE SMALL LETTER WU;Ll;0;L;;;;;N;;;13ED;;13ED
+ ABBE;CHEROKEE SMALL LETTER WV;Ll;0;L;;;;;N;;;13EE;;13EE
+ ABBF;CHEROKEE SMALL LETTER YA;Ll;0;L;;;;;N;;;13EF;;13EF
+ ABC0;MEETEI MAYEK LETTER KOK;Lo;0;L;;;;;N;;;;;
+ ABC1;MEETEI MAYEK LETTER SAM;Lo;0;L;;;;;N;;;;;
+ ABC2;MEETEI MAYEK LETTER LAI;Lo;0;L;;;;;N;;;;;
+ ABC3;MEETEI MAYEK LETTER MIT;Lo;0;L;;;;;N;;;;;
+ ABC4;MEETEI MAYEK LETTER PA;Lo;0;L;;;;;N;;;;;
+ ABC5;MEETEI MAYEK LETTER NA;Lo;0;L;;;;;N;;;;;
+ ABC6;MEETEI MAYEK LETTER CHIL;Lo;0;L;;;;;N;;;;;
+ ABC7;MEETEI MAYEK LETTER TIL;Lo;0;L;;;;;N;;;;;
+ ABC8;MEETEI MAYEK LETTER KHOU;Lo;0;L;;;;;N;;;;;
+ ABC9;MEETEI MAYEK LETTER NGOU;Lo;0;L;;;;;N;;;;;
+ ABCA;MEETEI MAYEK LETTER THOU;Lo;0;L;;;;;N;;;;;
+ ABCB;MEETEI MAYEK LETTER WAI;Lo;0;L;;;;;N;;;;;
+ ABCC;MEETEI MAYEK LETTER YANG;Lo;0;L;;;;;N;;;;;
+ ABCD;MEETEI MAYEK LETTER HUK;Lo;0;L;;;;;N;;;;;
+ ABCE;MEETEI MAYEK LETTER UN;Lo;0;L;;;;;N;;;;;
+ ABCF;MEETEI MAYEK LETTER I;Lo;0;L;;;;;N;;;;;
+ ABD0;MEETEI MAYEK LETTER PHAM;Lo;0;L;;;;;N;;;;;
+ ABD1;MEETEI MAYEK LETTER ATIYA;Lo;0;L;;;;;N;;;;;
+ ABD2;MEETEI MAYEK LETTER GOK;Lo;0;L;;;;;N;;;;;
+ ABD3;MEETEI MAYEK LETTER JHAM;Lo;0;L;;;;;N;;;;;
+ ABD4;MEETEI MAYEK LETTER RAI;Lo;0;L;;;;;N;;;;;
+ ABD5;MEETEI MAYEK LETTER BA;Lo;0;L;;;;;N;;;;;
+ ABD6;MEETEI MAYEK LETTER JIL;Lo;0;L;;;;;N;;;;;
+ ABD7;MEETEI MAYEK LETTER DIL;Lo;0;L;;;;;N;;;;;
+ ABD8;MEETEI MAYEK LETTER GHOU;Lo;0;L;;;;;N;;;;;
+ ABD9;MEETEI MAYEK LETTER DHOU;Lo;0;L;;;;;N;;;;;
+ ABDA;MEETEI MAYEK LETTER BHAM;Lo;0;L;;;;;N;;;;;
+ ABDB;MEETEI MAYEK LETTER KOK LONSUM;Lo;0;L;;;;;N;;;;;
+ ABDC;MEETEI MAYEK LETTER LAI LONSUM;Lo;0;L;;;;;N;;;;;
+ ABDD;MEETEI MAYEK LETTER MIT LONSUM;Lo;0;L;;;;;N;;;;;
+ ABDE;MEETEI MAYEK LETTER PA LONSUM;Lo;0;L;;;;;N;;;;;
+ ABDF;MEETEI MAYEK LETTER NA LONSUM;Lo;0;L;;;;;N;;;;;
+ ABE0;MEETEI MAYEK LETTER TIL LONSUM;Lo;0;L;;;;;N;;;;;
+ ABE1;MEETEI MAYEK LETTER NGOU LONSUM;Lo;0;L;;;;;N;;;;;
+ ABE2;MEETEI MAYEK LETTER I LONSUM;Lo;0;L;;;;;N;;;;;
+ ABE3;MEETEI MAYEK VOWEL SIGN ONAP;Mc;0;L;;;;;N;;;;;
+ ABE4;MEETEI MAYEK VOWEL SIGN INAP;Mc;0;L;;;;;N;;;;;
+ ABE5;MEETEI MAYEK VOWEL SIGN ANAP;Mn;0;NSM;;;;;N;;;;;
+ ABE6;MEETEI MAYEK VOWEL SIGN YENAP;Mc;0;L;;;;;N;;;;;
+ ABE7;MEETEI MAYEK VOWEL SIGN SOUNAP;Mc;0;L;;;;;N;;;;;
+ ABE8;MEETEI MAYEK VOWEL SIGN UNAP;Mn;0;NSM;;;;;N;;;;;
+ ABE9;MEETEI MAYEK VOWEL SIGN CHEINAP;Mc;0;L;;;;;N;;;;;
+ ABEA;MEETEI MAYEK VOWEL SIGN NUNG;Mc;0;L;;;;;N;;;;;
+ ABEB;MEETEI MAYEK CHEIKHEI;Po;0;L;;;;;N;;;;;
+ ABEC;MEETEI MAYEK LUM IYEK;Mc;0;L;;;;;N;;;;;
+ ABED;MEETEI MAYEK APUN IYEK;Mn;9;NSM;;;;;N;;;;;
+ ABF0;MEETEI MAYEK DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ ABF1;MEETEI MAYEK DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ ABF2;MEETEI MAYEK DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ ABF3;MEETEI MAYEK DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ ABF4;MEETEI MAYEK DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ ABF5;MEETEI MAYEK DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ ABF6;MEETEI MAYEK DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ ABF7;MEETEI MAYEK DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
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+ FA99;CJK COMPATIBILITY IDEOGRAPH-FA99;Lo;0;L;6ECB;;;;N;;;;;
+ FA9A;CJK COMPATIBILITY IDEOGRAPH-FA9A;Lo;0;L;6F22;;;;N;;;;;
+ FA9B;CJK COMPATIBILITY IDEOGRAPH-FA9B;Lo;0;L;701E;;;;N;;;;;
+ FA9C;CJK COMPATIBILITY IDEOGRAPH-FA9C;Lo;0;L;716E;;;;N;;;;;
+ FA9D;CJK COMPATIBILITY IDEOGRAPH-FA9D;Lo;0;L;77A7;;;;N;;;;;
+ FA9E;CJK COMPATIBILITY IDEOGRAPH-FA9E;Lo;0;L;7235;;;;N;;;;;
+ FA9F;CJK COMPATIBILITY IDEOGRAPH-FA9F;Lo;0;L;72AF;;;;N;;;;;
+ FAA0;CJK COMPATIBILITY IDEOGRAPH-FAA0;Lo;0;L;732A;;;;N;;;;;
+ FAA1;CJK COMPATIBILITY IDEOGRAPH-FAA1;Lo;0;L;7471;;;;N;;;;;
+ FAA2;CJK COMPATIBILITY IDEOGRAPH-FAA2;Lo;0;L;7506;;;;N;;;;;
+ FAA3;CJK COMPATIBILITY IDEOGRAPH-FAA3;Lo;0;L;753B;;;;N;;;;;
+ FAA4;CJK COMPATIBILITY IDEOGRAPH-FAA4;Lo;0;L;761D;;;;N;;;;;
+ FAA5;CJK COMPATIBILITY IDEOGRAPH-FAA5;Lo;0;L;761F;;;;N;;;;;
+ FAA6;CJK COMPATIBILITY IDEOGRAPH-FAA6;Lo;0;L;76CA;;;;N;;;;;
+ FAA7;CJK COMPATIBILITY IDEOGRAPH-FAA7;Lo;0;L;76DB;;;;N;;;;;
+ FAA8;CJK COMPATIBILITY IDEOGRAPH-FAA8;Lo;0;L;76F4;;;;N;;;;;
+ FAA9;CJK COMPATIBILITY IDEOGRAPH-FAA9;Lo;0;L;774A;;;;N;;;;;
+ FAAA;CJK COMPATIBILITY IDEOGRAPH-FAAA;Lo;0;L;7740;;;;N;;;;;
+ FAAB;CJK COMPATIBILITY IDEOGRAPH-FAAB;Lo;0;L;78CC;;;;N;;;;;
+ FAAC;CJK COMPATIBILITY IDEOGRAPH-FAAC;Lo;0;L;7AB1;;;;N;;;;;
+ FAAD;CJK COMPATIBILITY IDEOGRAPH-FAAD;Lo;0;L;7BC0;;;;N;;;;;
+ FAAE;CJK COMPATIBILITY IDEOGRAPH-FAAE;Lo;0;L;7C7B;;;;N;;;;;
+ FAAF;CJK COMPATIBILITY IDEOGRAPH-FAAF;Lo;0;L;7D5B;;;;N;;;;;
+ FAB0;CJK COMPATIBILITY IDEOGRAPH-FAB0;Lo;0;L;7DF4;;;;N;;;;;
+ FAB1;CJK COMPATIBILITY IDEOGRAPH-FAB1;Lo;0;L;7F3E;;;;N;;;;;
+ FAB2;CJK COMPATIBILITY IDEOGRAPH-FAB2;Lo;0;L;8005;;;;N;;;;;
+ FAB3;CJK COMPATIBILITY IDEOGRAPH-FAB3;Lo;0;L;8352;;;;N;;;;;
+ FAB4;CJK COMPATIBILITY IDEOGRAPH-FAB4;Lo;0;L;83EF;;;;N;;;;;
+ FAB5;CJK COMPATIBILITY IDEOGRAPH-FAB5;Lo;0;L;8779;;;;N;;;;;
+ FAB6;CJK COMPATIBILITY IDEOGRAPH-FAB6;Lo;0;L;8941;;;;N;;;;;
+ FAB7;CJK COMPATIBILITY IDEOGRAPH-FAB7;Lo;0;L;8986;;;;N;;;;;
+ FAB8;CJK COMPATIBILITY IDEOGRAPH-FAB8;Lo;0;L;8996;;;;N;;;;;
+ FAB9;CJK COMPATIBILITY IDEOGRAPH-FAB9;Lo;0;L;8ABF;;;;N;;;;;
+ FABA;CJK COMPATIBILITY IDEOGRAPH-FABA;Lo;0;L;8AF8;;;;N;;;;;
+ FABB;CJK COMPATIBILITY IDEOGRAPH-FABB;Lo;0;L;8ACB;;;;N;;;;;
+ FABC;CJK COMPATIBILITY IDEOGRAPH-FABC;Lo;0;L;8B01;;;;N;;;;;
+ FABD;CJK COMPATIBILITY IDEOGRAPH-FABD;Lo;0;L;8AFE;;;;N;;;;;
+ FABE;CJK COMPATIBILITY IDEOGRAPH-FABE;Lo;0;L;8AED;;;;N;;;;;
+ FABF;CJK COMPATIBILITY IDEOGRAPH-FABF;Lo;0;L;8B39;;;;N;;;;;
+ FAC0;CJK COMPATIBILITY IDEOGRAPH-FAC0;Lo;0;L;8B8A;;;;N;;;;;
+ FAC1;CJK COMPATIBILITY IDEOGRAPH-FAC1;Lo;0;L;8D08;;;;N;;;;;
+ FAC2;CJK COMPATIBILITY IDEOGRAPH-FAC2;Lo;0;L;8F38;;;;N;;;;;
+ FAC3;CJK COMPATIBILITY IDEOGRAPH-FAC3;Lo;0;L;9072;;;;N;;;;;
+ FAC4;CJK COMPATIBILITY IDEOGRAPH-FAC4;Lo;0;L;9199;;;;N;;;;;
+ FAC5;CJK COMPATIBILITY IDEOGRAPH-FAC5;Lo;0;L;9276;;;;N;;;;;
+ FAC6;CJK COMPATIBILITY IDEOGRAPH-FAC6;Lo;0;L;967C;;;;N;;;;;
+ FAC7;CJK COMPATIBILITY IDEOGRAPH-FAC7;Lo;0;L;96E3;;;;N;;;;;
+ FAC8;CJK COMPATIBILITY IDEOGRAPH-FAC8;Lo;0;L;9756;;;;N;;;;;
+ FAC9;CJK COMPATIBILITY IDEOGRAPH-FAC9;Lo;0;L;97DB;;;;N;;;;;
+ FACA;CJK COMPATIBILITY IDEOGRAPH-FACA;Lo;0;L;97FF;;;;N;;;;;
+ FACB;CJK COMPATIBILITY IDEOGRAPH-FACB;Lo;0;L;980B;;;;N;;;;;
+ FACC;CJK COMPATIBILITY IDEOGRAPH-FACC;Lo;0;L;983B;;;;N;;;;;
+ FACD;CJK COMPATIBILITY IDEOGRAPH-FACD;Lo;0;L;9B12;;;;N;;;;;
+ FACE;CJK COMPATIBILITY IDEOGRAPH-FACE;Lo;0;L;9F9C;;;;N;;;;;
+ FACF;CJK COMPATIBILITY IDEOGRAPH-FACF;Lo;0;L;2284A;;;;N;;;;;
+ FAD0;CJK COMPATIBILITY IDEOGRAPH-FAD0;Lo;0;L;22844;;;;N;;;;;
+ FAD1;CJK COMPATIBILITY IDEOGRAPH-FAD1;Lo;0;L;233D5;;;;N;;;;;
+ FAD2;CJK COMPATIBILITY IDEOGRAPH-FAD2;Lo;0;L;3B9D;;;;N;;;;;
+ FAD3;CJK COMPATIBILITY IDEOGRAPH-FAD3;Lo;0;L;4018;;;;N;;;;;
+ FAD4;CJK COMPATIBILITY IDEOGRAPH-FAD4;Lo;0;L;4039;;;;N;;;;;
+ FAD5;CJK COMPATIBILITY IDEOGRAPH-FAD5;Lo;0;L;25249;;;;N;;;;;
+ FAD6;CJK COMPATIBILITY IDEOGRAPH-FAD6;Lo;0;L;25CD0;;;;N;;;;;
+ FAD7;CJK COMPATIBILITY IDEOGRAPH-FAD7;Lo;0;L;27ED3;;;;N;;;;;
+ FAD8;CJK COMPATIBILITY IDEOGRAPH-FAD8;Lo;0;L;9F43;;;;N;;;;;
+ FAD9;CJK COMPATIBILITY IDEOGRAPH-FAD9;Lo;0;L;9F8E;;;;N;;;;;
+ FB00;LATIN SMALL LIGATURE FF;Ll;0;L;<compat> 0066 0066;;;;N;;;;;
+ FB01;LATIN SMALL LIGATURE FI;Ll;0;L;<compat> 0066 0069;;;;N;;;;;
+ FB02;LATIN SMALL LIGATURE FL;Ll;0;L;<compat> 0066 006C;;;;N;;;;;
+ FB03;LATIN SMALL LIGATURE FFI;Ll;0;L;<compat> 0066 0066 0069;;;;N;;;;;
+ FB04;LATIN SMALL LIGATURE FFL;Ll;0;L;<compat> 0066 0066 006C;;;;N;;;;;
+ FB05;LATIN SMALL LIGATURE LONG S T;Ll;0;L;<compat> 017F 0074;;;;N;;;;;
+ FB06;LATIN SMALL LIGATURE ST;Ll;0;L;<compat> 0073 0074;;;;N;;;;;
+ FB13;ARMENIAN SMALL LIGATURE MEN NOW;Ll;0;L;<compat> 0574 0576;;;;N;;;;;
+ FB14;ARMENIAN SMALL LIGATURE MEN ECH;Ll;0;L;<compat> 0574 0565;;;;N;;;;;
+ FB15;ARMENIAN SMALL LIGATURE MEN INI;Ll;0;L;<compat> 0574 056B;;;;N;;;;;
+ FB16;ARMENIAN SMALL LIGATURE VEW NOW;Ll;0;L;<compat> 057E 0576;;;;N;;;;;
+ FB17;ARMENIAN SMALL LIGATURE MEN XEH;Ll;0;L;<compat> 0574 056D;;;;N;;;;;
+ FB1D;HEBREW LETTER YOD WITH HIRIQ;Lo;0;R;05D9 05B4;;;;N;;;;;
+ FB1E;HEBREW POINT JUDEO-SPANISH VARIKA;Mn;26;NSM;;;;;N;HEBREW POINT VARIKA;;;;
+ FB1F;HEBREW LIGATURE YIDDISH YOD YOD PATAH;Lo;0;R;05F2 05B7;;;;N;;;;;
+ FB20;HEBREW LETTER ALTERNATIVE AYIN;Lo;0;R;<font> 05E2;;;;N;;;;;
+ FB21;HEBREW LETTER WIDE ALEF;Lo;0;R;<font> 05D0;;;;N;;;;;
+ FB22;HEBREW LETTER WIDE DALET;Lo;0;R;<font> 05D3;;;;N;;;;;
+ FB23;HEBREW LETTER WIDE HE;Lo;0;R;<font> 05D4;;;;N;;;;;
+ FB24;HEBREW LETTER WIDE KAF;Lo;0;R;<font> 05DB;;;;N;;;;;
+ FB25;HEBREW LETTER WIDE LAMED;Lo;0;R;<font> 05DC;;;;N;;;;;
+ FB26;HEBREW LETTER WIDE FINAL MEM;Lo;0;R;<font> 05DD;;;;N;;;;;
+ FB27;HEBREW LETTER WIDE RESH;Lo;0;R;<font> 05E8;;;;N;;;;;
+ FB28;HEBREW LETTER WIDE TAV;Lo;0;R;<font> 05EA;;;;N;;;;;
+ FB29;HEBREW LETTER ALTERNATIVE PLUS SIGN;Sm;0;ES;<font> 002B;;;;N;;;;;
+ FB2A;HEBREW LETTER SHIN WITH SHIN DOT;Lo;0;R;05E9 05C1;;;;N;;;;;
+ FB2B;HEBREW LETTER SHIN WITH SIN DOT;Lo;0;R;05E9 05C2;;;;N;;;;;
+ FB2C;HEBREW LETTER SHIN WITH DAGESH AND SHIN DOT;Lo;0;R;FB49 05C1;;;;N;;;;;
+ FB2D;HEBREW LETTER SHIN WITH DAGESH AND SIN DOT;Lo;0;R;FB49 05C2;;;;N;;;;;
+ FB2E;HEBREW LETTER ALEF WITH PATAH;Lo;0;R;05D0 05B7;;;;N;;;;;
+ FB2F;HEBREW LETTER ALEF WITH QAMATS;Lo;0;R;05D0 05B8;;;;N;;;;;
+ FB30;HEBREW LETTER ALEF WITH MAPIQ;Lo;0;R;05D0 05BC;;;;N;;;;;
+ FB31;HEBREW LETTER BET WITH DAGESH;Lo;0;R;05D1 05BC;;;;N;;;;;
+ FB32;HEBREW LETTER GIMEL WITH DAGESH;Lo;0;R;05D2 05BC;;;;N;;;;;
+ FB33;HEBREW LETTER DALET WITH DAGESH;Lo;0;R;05D3 05BC;;;;N;;;;;
+ FB34;HEBREW LETTER HE WITH MAPIQ;Lo;0;R;05D4 05BC;;;;N;;;;;
+ FB35;HEBREW LETTER VAV WITH DAGESH;Lo;0;R;05D5 05BC;;;;N;;;;;
+ FB36;HEBREW LETTER ZAYIN WITH DAGESH;Lo;0;R;05D6 05BC;;;;N;;;;;
+ FB38;HEBREW LETTER TET WITH DAGESH;Lo;0;R;05D8 05BC;;;;N;;;;;
+ FB39;HEBREW LETTER YOD WITH DAGESH;Lo;0;R;05D9 05BC;;;;N;;;;;
+ FB3A;HEBREW LETTER FINAL KAF WITH DAGESH;Lo;0;R;05DA 05BC;;;;N;;;;;
+ FB3B;HEBREW LETTER KAF WITH DAGESH;Lo;0;R;05DB 05BC;;;;N;;;;;
+ FB3C;HEBREW LETTER LAMED WITH DAGESH;Lo;0;R;05DC 05BC;;;;N;;;;;
+ FB3E;HEBREW LETTER MEM WITH DAGESH;Lo;0;R;05DE 05BC;;;;N;;;;;
+ FB40;HEBREW LETTER NUN WITH DAGESH;Lo;0;R;05E0 05BC;;;;N;;;;;
+ FB41;HEBREW LETTER SAMEKH WITH DAGESH;Lo;0;R;05E1 05BC;;;;N;;;;;
+ FB43;HEBREW LETTER FINAL PE WITH DAGESH;Lo;0;R;05E3 05BC;;;;N;;;;;
+ FB44;HEBREW LETTER PE WITH DAGESH;Lo;0;R;05E4 05BC;;;;N;;;;;
+ FB46;HEBREW LETTER TSADI WITH DAGESH;Lo;0;R;05E6 05BC;;;;N;;;;;
+ FB47;HEBREW LETTER QOF WITH DAGESH;Lo;0;R;05E7 05BC;;;;N;;;;;
+ FB48;HEBREW LETTER RESH WITH DAGESH;Lo;0;R;05E8 05BC;;;;N;;;;;
+ FB49;HEBREW LETTER SHIN WITH DAGESH;Lo;0;R;05E9 05BC;;;;N;;;;;
+ FB4A;HEBREW LETTER TAV WITH DAGESH;Lo;0;R;05EA 05BC;;;;N;;;;;
+ FB4B;HEBREW LETTER VAV WITH HOLAM;Lo;0;R;05D5 05B9;;;;N;;;;;
+ FB4C;HEBREW LETTER BET WITH RAFE;Lo;0;R;05D1 05BF;;;;N;;;;;
+ FB4D;HEBREW LETTER KAF WITH RAFE;Lo;0;R;05DB 05BF;;;;N;;;;;
+ FB4E;HEBREW LETTER PE WITH RAFE;Lo;0;R;05E4 05BF;;;;N;;;;;
+ FB4F;HEBREW LIGATURE ALEF LAMED;Lo;0;R;<compat> 05D0 05DC;;;;N;;;;;
+ FB50;ARABIC LETTER ALEF WASLA ISOLATED FORM;Lo;0;AL;<isolated> 0671;;;;N;;;;;
+ FB51;ARABIC LETTER ALEF WASLA FINAL FORM;Lo;0;AL;<final> 0671;;;;N;;;;;
+ FB52;ARABIC LETTER BEEH ISOLATED FORM;Lo;0;AL;<isolated> 067B;;;;N;;;;;
+ FB53;ARABIC LETTER BEEH FINAL FORM;Lo;0;AL;<final> 067B;;;;N;;;;;
+ FB54;ARABIC LETTER BEEH INITIAL FORM;Lo;0;AL;<initial> 067B;;;;N;;;;;
+ FB55;ARABIC LETTER BEEH MEDIAL FORM;Lo;0;AL;<medial> 067B;;;;N;;;;;
+ FB56;ARABIC LETTER PEH ISOLATED FORM;Lo;0;AL;<isolated> 067E;;;;N;;;;;
+ FB57;ARABIC LETTER PEH FINAL FORM;Lo;0;AL;<final> 067E;;;;N;;;;;
+ FB58;ARABIC LETTER PEH INITIAL FORM;Lo;0;AL;<initial> 067E;;;;N;;;;;
+ FB59;ARABIC LETTER PEH MEDIAL FORM;Lo;0;AL;<medial> 067E;;;;N;;;;;
+ FB5A;ARABIC LETTER BEHEH ISOLATED FORM;Lo;0;AL;<isolated> 0680;;;;N;;;;;
+ FB5B;ARABIC LETTER BEHEH FINAL FORM;Lo;0;AL;<final> 0680;;;;N;;;;;
+ FB5C;ARABIC LETTER BEHEH INITIAL FORM;Lo;0;AL;<initial> 0680;;;;N;;;;;
+ FB5D;ARABIC LETTER BEHEH MEDIAL FORM;Lo;0;AL;<medial> 0680;;;;N;;;;;
+ FB5E;ARABIC LETTER TTEHEH ISOLATED FORM;Lo;0;AL;<isolated> 067A;;;;N;;;;;
+ FB5F;ARABIC LETTER TTEHEH FINAL FORM;Lo;0;AL;<final> 067A;;;;N;;;;;
+ FB60;ARABIC LETTER TTEHEH INITIAL FORM;Lo;0;AL;<initial> 067A;;;;N;;;;;
+ FB61;ARABIC LETTER TTEHEH MEDIAL FORM;Lo;0;AL;<medial> 067A;;;;N;;;;;
+ FB62;ARABIC LETTER TEHEH ISOLATED FORM;Lo;0;AL;<isolated> 067F;;;;N;;;;;
+ FB63;ARABIC LETTER TEHEH FINAL FORM;Lo;0;AL;<final> 067F;;;;N;;;;;
+ FB64;ARABIC LETTER TEHEH INITIAL FORM;Lo;0;AL;<initial> 067F;;;;N;;;;;
+ FB65;ARABIC LETTER TEHEH MEDIAL FORM;Lo;0;AL;<medial> 067F;;;;N;;;;;
+ FB66;ARABIC LETTER TTEH ISOLATED FORM;Lo;0;AL;<isolated> 0679;;;;N;;;;;
+ FB67;ARABIC LETTER TTEH FINAL FORM;Lo;0;AL;<final> 0679;;;;N;;;;;
+ FB68;ARABIC LETTER TTEH INITIAL FORM;Lo;0;AL;<initial> 0679;;;;N;;;;;
+ FB69;ARABIC LETTER TTEH MEDIAL FORM;Lo;0;AL;<medial> 0679;;;;N;;;;;
+ FB6A;ARABIC LETTER VEH ISOLATED FORM;Lo;0;AL;<isolated> 06A4;;;;N;;;;;
+ FB6B;ARABIC LETTER VEH FINAL FORM;Lo;0;AL;<final> 06A4;;;;N;;;;;
+ FB6C;ARABIC LETTER VEH INITIAL FORM;Lo;0;AL;<initial> 06A4;;;;N;;;;;
+ FB6D;ARABIC LETTER VEH MEDIAL FORM;Lo;0;AL;<medial> 06A4;;;;N;;;;;
+ FB6E;ARABIC LETTER PEHEH ISOLATED FORM;Lo;0;AL;<isolated> 06A6;;;;N;;;;;
+ FB6F;ARABIC LETTER PEHEH FINAL FORM;Lo;0;AL;<final> 06A6;;;;N;;;;;
+ FB70;ARABIC LETTER PEHEH INITIAL FORM;Lo;0;AL;<initial> 06A6;;;;N;;;;;
+ FB71;ARABIC LETTER PEHEH MEDIAL FORM;Lo;0;AL;<medial> 06A6;;;;N;;;;;
+ FB72;ARABIC LETTER DYEH ISOLATED FORM;Lo;0;AL;<isolated> 0684;;;;N;;;;;
+ FB73;ARABIC LETTER DYEH FINAL FORM;Lo;0;AL;<final> 0684;;;;N;;;;;
+ FB74;ARABIC LETTER DYEH INITIAL FORM;Lo;0;AL;<initial> 0684;;;;N;;;;;
+ FB75;ARABIC LETTER DYEH MEDIAL FORM;Lo;0;AL;<medial> 0684;;;;N;;;;;
+ FB76;ARABIC LETTER NYEH ISOLATED FORM;Lo;0;AL;<isolated> 0683;;;;N;;;;;
+ FB77;ARABIC LETTER NYEH FINAL FORM;Lo;0;AL;<final> 0683;;;;N;;;;;
+ FB78;ARABIC LETTER NYEH INITIAL FORM;Lo;0;AL;<initial> 0683;;;;N;;;;;
+ FB79;ARABIC LETTER NYEH MEDIAL FORM;Lo;0;AL;<medial> 0683;;;;N;;;;;
+ FB7A;ARABIC LETTER TCHEH ISOLATED FORM;Lo;0;AL;<isolated> 0686;;;;N;;;;;
+ FB7B;ARABIC LETTER TCHEH FINAL FORM;Lo;0;AL;<final> 0686;;;;N;;;;;
+ FB7C;ARABIC LETTER TCHEH INITIAL FORM;Lo;0;AL;<initial> 0686;;;;N;;;;;
+ FB7D;ARABIC LETTER TCHEH MEDIAL FORM;Lo;0;AL;<medial> 0686;;;;N;;;;;
+ FB7E;ARABIC LETTER TCHEHEH ISOLATED FORM;Lo;0;AL;<isolated> 0687;;;;N;;;;;
+ FB7F;ARABIC LETTER TCHEHEH FINAL FORM;Lo;0;AL;<final> 0687;;;;N;;;;;
+ FB80;ARABIC LETTER TCHEHEH INITIAL FORM;Lo;0;AL;<initial> 0687;;;;N;;;;;
+ FB81;ARABIC LETTER TCHEHEH MEDIAL FORM;Lo;0;AL;<medial> 0687;;;;N;;;;;
+ FB82;ARABIC LETTER DDAHAL ISOLATED FORM;Lo;0;AL;<isolated> 068D;;;;N;;;;;
+ FB83;ARABIC LETTER DDAHAL FINAL FORM;Lo;0;AL;<final> 068D;;;;N;;;;;
+ FB84;ARABIC LETTER DAHAL ISOLATED FORM;Lo;0;AL;<isolated> 068C;;;;N;;;;;
+ FB85;ARABIC LETTER DAHAL FINAL FORM;Lo;0;AL;<final> 068C;;;;N;;;;;
+ FB86;ARABIC LETTER DUL ISOLATED FORM;Lo;0;AL;<isolated> 068E;;;;N;;;;;
+ FB87;ARABIC LETTER DUL FINAL FORM;Lo;0;AL;<final> 068E;;;;N;;;;;
+ FB88;ARABIC LETTER DDAL ISOLATED FORM;Lo;0;AL;<isolated> 0688;;;;N;;;;;
+ FB89;ARABIC LETTER DDAL FINAL FORM;Lo;0;AL;<final> 0688;;;;N;;;;;
+ FB8A;ARABIC LETTER JEH ISOLATED FORM;Lo;0;AL;<isolated> 0698;;;;N;;;;;
+ FB8B;ARABIC LETTER JEH FINAL FORM;Lo;0;AL;<final> 0698;;;;N;;;;;
+ FB8C;ARABIC LETTER RREH ISOLATED FORM;Lo;0;AL;<isolated> 0691;;;;N;;;;;
+ FB8D;ARABIC LETTER RREH FINAL FORM;Lo;0;AL;<final> 0691;;;;N;;;;;
+ FB8E;ARABIC LETTER KEHEH ISOLATED FORM;Lo;0;AL;<isolated> 06A9;;;;N;;;;;
+ FB8F;ARABIC LETTER KEHEH FINAL FORM;Lo;0;AL;<final> 06A9;;;;N;;;;;
+ FB90;ARABIC LETTER KEHEH INITIAL FORM;Lo;0;AL;<initial> 06A9;;;;N;;;;;
+ FB91;ARABIC LETTER KEHEH MEDIAL FORM;Lo;0;AL;<medial> 06A9;;;;N;;;;;
+ FB92;ARABIC LETTER GAF ISOLATED FORM;Lo;0;AL;<isolated> 06AF;;;;N;;;;;
+ FB93;ARABIC LETTER GAF FINAL FORM;Lo;0;AL;<final> 06AF;;;;N;;;;;
+ FB94;ARABIC LETTER GAF INITIAL FORM;Lo;0;AL;<initial> 06AF;;;;N;;;;;
+ FB95;ARABIC LETTER GAF MEDIAL FORM;Lo;0;AL;<medial> 06AF;;;;N;;;;;
+ FB96;ARABIC LETTER GUEH ISOLATED FORM;Lo;0;AL;<isolated> 06B3;;;;N;;;;;
+ FB97;ARABIC LETTER GUEH FINAL FORM;Lo;0;AL;<final> 06B3;;;;N;;;;;
+ FB98;ARABIC LETTER GUEH INITIAL FORM;Lo;0;AL;<initial> 06B3;;;;N;;;;;
+ FB99;ARABIC LETTER GUEH MEDIAL FORM;Lo;0;AL;<medial> 06B3;;;;N;;;;;
+ FB9A;ARABIC LETTER NGOEH ISOLATED FORM;Lo;0;AL;<isolated> 06B1;;;;N;;;;;
+ FB9B;ARABIC LETTER NGOEH FINAL FORM;Lo;0;AL;<final> 06B1;;;;N;;;;;
+ FB9C;ARABIC LETTER NGOEH INITIAL FORM;Lo;0;AL;<initial> 06B1;;;;N;;;;;
+ FB9D;ARABIC LETTER NGOEH MEDIAL FORM;Lo;0;AL;<medial> 06B1;;;;N;;;;;
+ FB9E;ARABIC LETTER NOON GHUNNA ISOLATED FORM;Lo;0;AL;<isolated> 06BA;;;;N;;;;;
+ FB9F;ARABIC LETTER NOON GHUNNA FINAL FORM;Lo;0;AL;<final> 06BA;;;;N;;;;;
+ FBA0;ARABIC LETTER RNOON ISOLATED FORM;Lo;0;AL;<isolated> 06BB;;;;N;;;;;
+ FBA1;ARABIC LETTER RNOON FINAL FORM;Lo;0;AL;<final> 06BB;;;;N;;;;;
+ FBA2;ARABIC LETTER RNOON INITIAL FORM;Lo;0;AL;<initial> 06BB;;;;N;;;;;
+ FBA3;ARABIC LETTER RNOON MEDIAL FORM;Lo;0;AL;<medial> 06BB;;;;N;;;;;
+ FBA4;ARABIC LETTER HEH WITH YEH ABOVE ISOLATED FORM;Lo;0;AL;<isolated> 06C0;;;;N;;;;;
+ FBA5;ARABIC LETTER HEH WITH YEH ABOVE FINAL FORM;Lo;0;AL;<final> 06C0;;;;N;;;;;
+ FBA6;ARABIC LETTER HEH GOAL ISOLATED FORM;Lo;0;AL;<isolated> 06C1;;;;N;;;;;
+ FBA7;ARABIC LETTER HEH GOAL FINAL FORM;Lo;0;AL;<final> 06C1;;;;N;;;;;
+ FBA8;ARABIC LETTER HEH GOAL INITIAL FORM;Lo;0;AL;<initial> 06C1;;;;N;;;;;
+ FBA9;ARABIC LETTER HEH GOAL MEDIAL FORM;Lo;0;AL;<medial> 06C1;;;;N;;;;;
+ FBAA;ARABIC LETTER HEH DOACHASHMEE ISOLATED FORM;Lo;0;AL;<isolated> 06BE;;;;N;;;;;
+ FBAB;ARABIC LETTER HEH DOACHASHMEE FINAL FORM;Lo;0;AL;<final> 06BE;;;;N;;;;;
+ FBAC;ARABIC LETTER HEH DOACHASHMEE INITIAL FORM;Lo;0;AL;<initial> 06BE;;;;N;;;;;
+ FBAD;ARABIC LETTER HEH DOACHASHMEE MEDIAL FORM;Lo;0;AL;<medial> 06BE;;;;N;;;;;
+ FBAE;ARABIC LETTER YEH BARREE ISOLATED FORM;Lo;0;AL;<isolated> 06D2;;;;N;;;;;
+ FBAF;ARABIC LETTER YEH BARREE FINAL FORM;Lo;0;AL;<final> 06D2;;;;N;;;;;
+ FBB0;ARABIC LETTER YEH BARREE WITH HAMZA ABOVE ISOLATED FORM;Lo;0;AL;<isolated> 06D3;;;;N;;;;;
+ FBB1;ARABIC LETTER YEH BARREE WITH HAMZA ABOVE FINAL FORM;Lo;0;AL;<final> 06D3;;;;N;;;;;
+ FBB2;ARABIC SYMBOL DOT ABOVE;Sk;0;AL;;;;;N;;;;;
+ FBB3;ARABIC SYMBOL DOT BELOW;Sk;0;AL;;;;;N;;;;;
+ FBB4;ARABIC SYMBOL TWO DOTS ABOVE;Sk;0;AL;;;;;N;;;;;
+ FBB5;ARABIC SYMBOL TWO DOTS BELOW;Sk;0;AL;;;;;N;;;;;
+ FBB6;ARABIC SYMBOL THREE DOTS ABOVE;Sk;0;AL;;;;;N;;;;;
+ FBB7;ARABIC SYMBOL THREE DOTS BELOW;Sk;0;AL;;;;;N;;;;;
+ FBB8;ARABIC SYMBOL THREE DOTS POINTING DOWNWARDS ABOVE;Sk;0;AL;;;;;N;;;;;
+ FBB9;ARABIC SYMBOL THREE DOTS POINTING DOWNWARDS BELOW;Sk;0;AL;;;;;N;;;;;
+ FBBA;ARABIC SYMBOL FOUR DOTS ABOVE;Sk;0;AL;;;;;N;;;;;
+ FBBB;ARABIC SYMBOL FOUR DOTS BELOW;Sk;0;AL;;;;;N;;;;;
+ FBBC;ARABIC SYMBOL DOUBLE VERTICAL BAR BELOW;Sk;0;AL;;;;;N;;;;;
+ FBBD;ARABIC SYMBOL TWO DOTS VERTICALLY ABOVE;Sk;0;AL;;;;;N;;;;;
+ FBBE;ARABIC SYMBOL TWO DOTS VERTICALLY BELOW;Sk;0;AL;;;;;N;;;;;
+ FBBF;ARABIC SYMBOL RING;Sk;0;AL;;;;;N;;;;;
+ FBC0;ARABIC SYMBOL SMALL TAH ABOVE;Sk;0;AL;;;;;N;;;;;
+ FBC1;ARABIC SYMBOL SMALL TAH BELOW;Sk;0;AL;;;;;N;;;;;
+ FBD3;ARABIC LETTER NG ISOLATED FORM;Lo;0;AL;<isolated> 06AD;;;;N;;;;;
+ FBD4;ARABIC LETTER NG FINAL FORM;Lo;0;AL;<final> 06AD;;;;N;;;;;
+ FBD5;ARABIC LETTER NG INITIAL FORM;Lo;0;AL;<initial> 06AD;;;;N;;;;;
+ FBD6;ARABIC LETTER NG MEDIAL FORM;Lo;0;AL;<medial> 06AD;;;;N;;;;;
+ FBD7;ARABIC LETTER U ISOLATED FORM;Lo;0;AL;<isolated> 06C7;;;;N;;;;;
+ FBD8;ARABIC LETTER U FINAL FORM;Lo;0;AL;<final> 06C7;;;;N;;;;;
+ FBD9;ARABIC LETTER OE ISOLATED FORM;Lo;0;AL;<isolated> 06C6;;;;N;;;;;
+ FBDA;ARABIC LETTER OE FINAL FORM;Lo;0;AL;<final> 06C6;;;;N;;;;;
+ FBDB;ARABIC LETTER YU ISOLATED FORM;Lo;0;AL;<isolated> 06C8;;;;N;;;;;
+ FBDC;ARABIC LETTER YU FINAL FORM;Lo;0;AL;<final> 06C8;;;;N;;;;;
+ FBDD;ARABIC LETTER U WITH HAMZA ABOVE ISOLATED FORM;Lo;0;AL;<isolated> 0677;;;;N;;;;;
+ FBDE;ARABIC LETTER VE ISOLATED FORM;Lo;0;AL;<isolated> 06CB;;;;N;;;;;
+ FBDF;ARABIC LETTER VE FINAL FORM;Lo;0;AL;<final> 06CB;;;;N;;;;;
+ FBE0;ARABIC LETTER KIRGHIZ OE ISOLATED FORM;Lo;0;AL;<isolated> 06C5;;;;N;;;;;
+ FBE1;ARABIC LETTER KIRGHIZ OE FINAL FORM;Lo;0;AL;<final> 06C5;;;;N;;;;;
+ FBE2;ARABIC LETTER KIRGHIZ YU ISOLATED FORM;Lo;0;AL;<isolated> 06C9;;;;N;;;;;
+ FBE3;ARABIC LETTER KIRGHIZ YU FINAL FORM;Lo;0;AL;<final> 06C9;;;;N;;;;;
+ FBE4;ARABIC LETTER E ISOLATED FORM;Lo;0;AL;<isolated> 06D0;;;;N;;;;;
+ FBE5;ARABIC LETTER E FINAL FORM;Lo;0;AL;<final> 06D0;;;;N;;;;;
+ FBE6;ARABIC LETTER E INITIAL FORM;Lo;0;AL;<initial> 06D0;;;;N;;;;;
+ FBE7;ARABIC LETTER E MEDIAL FORM;Lo;0;AL;<medial> 06D0;;;;N;;;;;
+ FBE8;ARABIC LETTER UIGHUR KAZAKH KIRGHIZ ALEF MAKSURA INITIAL FORM;Lo;0;AL;<initial> 0649;;;;N;;;;;
+ FBE9;ARABIC LETTER UIGHUR KAZAKH KIRGHIZ ALEF MAKSURA MEDIAL FORM;Lo;0;AL;<medial> 0649;;;;N;;;;;
+ FBEA;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH ALEF ISOLATED FORM;Lo;0;AL;<isolated> 0626 0627;;;;N;;;;;
+ FBEB;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH ALEF FINAL FORM;Lo;0;AL;<final> 0626 0627;;;;N;;;;;
+ FBEC;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH AE ISOLATED FORM;Lo;0;AL;<isolated> 0626 06D5;;;;N;;;;;
+ FBED;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH AE FINAL FORM;Lo;0;AL;<final> 0626 06D5;;;;N;;;;;
+ FBEE;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH WAW ISOLATED FORM;Lo;0;AL;<isolated> 0626 0648;;;;N;;;;;
+ FBEF;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH WAW FINAL FORM;Lo;0;AL;<final> 0626 0648;;;;N;;;;;
+ FBF0;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH U ISOLATED FORM;Lo;0;AL;<isolated> 0626 06C7;;;;N;;;;;
+ FBF1;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH U FINAL FORM;Lo;0;AL;<final> 0626 06C7;;;;N;;;;;
+ FBF2;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH OE ISOLATED FORM;Lo;0;AL;<isolated> 0626 06C6;;;;N;;;;;
+ FBF3;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH OE FINAL FORM;Lo;0;AL;<final> 0626 06C6;;;;N;;;;;
+ FBF4;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH YU ISOLATED FORM;Lo;0;AL;<isolated> 0626 06C8;;;;N;;;;;
+ FBF5;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH YU FINAL FORM;Lo;0;AL;<final> 0626 06C8;;;;N;;;;;
+ FBF6;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH E ISOLATED FORM;Lo;0;AL;<isolated> 0626 06D0;;;;N;;;;;
+ FBF7;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH E FINAL FORM;Lo;0;AL;<final> 0626 06D0;;;;N;;;;;
+ FBF8;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH E INITIAL FORM;Lo;0;AL;<initial> 0626 06D0;;;;N;;;;;
+ FBF9;ARABIC LIGATURE UIGHUR KIRGHIZ YEH WITH HAMZA ABOVE WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0626 0649;;;;N;;;;;
+ FBFA;ARABIC LIGATURE UIGHUR KIRGHIZ YEH WITH HAMZA ABOVE WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0626 0649;;;;N;;;;;
+ FBFB;ARABIC LIGATURE UIGHUR KIRGHIZ YEH WITH HAMZA ABOVE WITH ALEF MAKSURA INITIAL FORM;Lo;0;AL;<initial> 0626 0649;;;;N;;;;;
+ FBFC;ARABIC LETTER FARSI YEH ISOLATED FORM;Lo;0;AL;<isolated> 06CC;;;;N;;;;;
+ FBFD;ARABIC LETTER FARSI YEH FINAL FORM;Lo;0;AL;<final> 06CC;;;;N;;;;;
+ FBFE;ARABIC LETTER FARSI YEH INITIAL FORM;Lo;0;AL;<initial> 06CC;;;;N;;;;;
+ FBFF;ARABIC LETTER FARSI YEH MEDIAL FORM;Lo;0;AL;<medial> 06CC;;;;N;;;;;
+ FC00;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 0626 062C;;;;N;;;;;
+ FC01;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 0626 062D;;;;N;;;;;
+ FC02;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0626 0645;;;;N;;;;;
+ FC03;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0626 0649;;;;N;;;;;
+ FC04;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0626 064A;;;;N;;;;;
+ FC05;ARABIC LIGATURE BEH WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 0628 062C;;;;N;;;;;
+ FC06;ARABIC LIGATURE BEH WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 0628 062D;;;;N;;;;;
+ FC07;ARABIC LIGATURE BEH WITH KHAH ISOLATED FORM;Lo;0;AL;<isolated> 0628 062E;;;;N;;;;;
+ FC08;ARABIC LIGATURE BEH WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0628 0645;;;;N;;;;;
+ FC09;ARABIC LIGATURE BEH WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0628 0649;;;;N;;;;;
+ FC0A;ARABIC LIGATURE BEH WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0628 064A;;;;N;;;;;
+ FC0B;ARABIC LIGATURE TEH WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 062A 062C;;;;N;;;;;
+ FC0C;ARABIC LIGATURE TEH WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 062A 062D;;;;N;;;;;
+ FC0D;ARABIC LIGATURE TEH WITH KHAH ISOLATED FORM;Lo;0;AL;<isolated> 062A 062E;;;;N;;;;;
+ FC0E;ARABIC LIGATURE TEH WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 062A 0645;;;;N;;;;;
+ FC0F;ARABIC LIGATURE TEH WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 062A 0649;;;;N;;;;;
+ FC10;ARABIC LIGATURE TEH WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 062A 064A;;;;N;;;;;
+ FC11;ARABIC LIGATURE THEH WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 062B 062C;;;;N;;;;;
+ FC12;ARABIC LIGATURE THEH WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 062B 0645;;;;N;;;;;
+ FC13;ARABIC LIGATURE THEH WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 062B 0649;;;;N;;;;;
+ FC14;ARABIC LIGATURE THEH WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 062B 064A;;;;N;;;;;
+ FC15;ARABIC LIGATURE JEEM WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 062C 062D;;;;N;;;;;
+ FC16;ARABIC LIGATURE JEEM WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 062C 0645;;;;N;;;;;
+ FC17;ARABIC LIGATURE HAH WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 062D 062C;;;;N;;;;;
+ FC18;ARABIC LIGATURE HAH WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 062D 0645;;;;N;;;;;
+ FC19;ARABIC LIGATURE KHAH WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 062E 062C;;;;N;;;;;
+ FC1A;ARABIC LIGATURE KHAH WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 062E 062D;;;;N;;;;;
+ FC1B;ARABIC LIGATURE KHAH WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 062E 0645;;;;N;;;;;
+ FC1C;ARABIC LIGATURE SEEN WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 0633 062C;;;;N;;;;;
+ FC1D;ARABIC LIGATURE SEEN WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 0633 062D;;;;N;;;;;
+ FC1E;ARABIC LIGATURE SEEN WITH KHAH ISOLATED FORM;Lo;0;AL;<isolated> 0633 062E;;;;N;;;;;
+ FC1F;ARABIC LIGATURE SEEN WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0633 0645;;;;N;;;;;
+ FC20;ARABIC LIGATURE SAD WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 0635 062D;;;;N;;;;;
+ FC21;ARABIC LIGATURE SAD WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0635 0645;;;;N;;;;;
+ FC22;ARABIC LIGATURE DAD WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 0636 062C;;;;N;;;;;
+ FC23;ARABIC LIGATURE DAD WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 0636 062D;;;;N;;;;;
+ FC24;ARABIC LIGATURE DAD WITH KHAH ISOLATED FORM;Lo;0;AL;<isolated> 0636 062E;;;;N;;;;;
+ FC25;ARABIC LIGATURE DAD WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0636 0645;;;;N;;;;;
+ FC26;ARABIC LIGATURE TAH WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 0637 062D;;;;N;;;;;
+ FC27;ARABIC LIGATURE TAH WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0637 0645;;;;N;;;;;
+ FC28;ARABIC LIGATURE ZAH WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0638 0645;;;;N;;;;;
+ FC29;ARABIC LIGATURE AIN WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 0639 062C;;;;N;;;;;
+ FC2A;ARABIC LIGATURE AIN WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0639 0645;;;;N;;;;;
+ FC2B;ARABIC LIGATURE GHAIN WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 063A 062C;;;;N;;;;;
+ FC2C;ARABIC LIGATURE GHAIN WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 063A 0645;;;;N;;;;;
+ FC2D;ARABIC LIGATURE FEH WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 0641 062C;;;;N;;;;;
+ FC2E;ARABIC LIGATURE FEH WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 0641 062D;;;;N;;;;;
+ FC2F;ARABIC LIGATURE FEH WITH KHAH ISOLATED FORM;Lo;0;AL;<isolated> 0641 062E;;;;N;;;;;
+ FC30;ARABIC LIGATURE FEH WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0641 0645;;;;N;;;;;
+ FC31;ARABIC LIGATURE FEH WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0641 0649;;;;N;;;;;
+ FC32;ARABIC LIGATURE FEH WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0641 064A;;;;N;;;;;
+ FC33;ARABIC LIGATURE QAF WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 0642 062D;;;;N;;;;;
+ FC34;ARABIC LIGATURE QAF WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0642 0645;;;;N;;;;;
+ FC35;ARABIC LIGATURE QAF WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0642 0649;;;;N;;;;;
+ FC36;ARABIC LIGATURE QAF WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0642 064A;;;;N;;;;;
+ FC37;ARABIC LIGATURE KAF WITH ALEF ISOLATED FORM;Lo;0;AL;<isolated> 0643 0627;;;;N;;;;;
+ FC38;ARABIC LIGATURE KAF WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 0643 062C;;;;N;;;;;
+ FC39;ARABIC LIGATURE KAF WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 0643 062D;;;;N;;;;;
+ FC3A;ARABIC LIGATURE KAF WITH KHAH ISOLATED FORM;Lo;0;AL;<isolated> 0643 062E;;;;N;;;;;
+ FC3B;ARABIC LIGATURE KAF WITH LAM ISOLATED FORM;Lo;0;AL;<isolated> 0643 0644;;;;N;;;;;
+ FC3C;ARABIC LIGATURE KAF WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0643 0645;;;;N;;;;;
+ FC3D;ARABIC LIGATURE KAF WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0643 0649;;;;N;;;;;
+ FC3E;ARABIC LIGATURE KAF WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0643 064A;;;;N;;;;;
+ FC3F;ARABIC LIGATURE LAM WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 0644 062C;;;;N;;;;;
+ FC40;ARABIC LIGATURE LAM WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 0644 062D;;;;N;;;;;
+ FC41;ARABIC LIGATURE LAM WITH KHAH ISOLATED FORM;Lo;0;AL;<isolated> 0644 062E;;;;N;;;;;
+ FC42;ARABIC LIGATURE LAM WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0644 0645;;;;N;;;;;
+ FC43;ARABIC LIGATURE LAM WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0644 0649;;;;N;;;;;
+ FC44;ARABIC LIGATURE LAM WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0644 064A;;;;N;;;;;
+ FC45;ARABIC LIGATURE MEEM WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 0645 062C;;;;N;;;;;
+ FC46;ARABIC LIGATURE MEEM WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 0645 062D;;;;N;;;;;
+ FC47;ARABIC LIGATURE MEEM WITH KHAH ISOLATED FORM;Lo;0;AL;<isolated> 0645 062E;;;;N;;;;;
+ FC48;ARABIC LIGATURE MEEM WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0645 0645;;;;N;;;;;
+ FC49;ARABIC LIGATURE MEEM WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0645 0649;;;;N;;;;;
+ FC4A;ARABIC LIGATURE MEEM WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0645 064A;;;;N;;;;;
+ FC4B;ARABIC LIGATURE NOON WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 0646 062C;;;;N;;;;;
+ FC4C;ARABIC LIGATURE NOON WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 0646 062D;;;;N;;;;;
+ FC4D;ARABIC LIGATURE NOON WITH KHAH ISOLATED FORM;Lo;0;AL;<isolated> 0646 062E;;;;N;;;;;
+ FC4E;ARABIC LIGATURE NOON WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0646 0645;;;;N;;;;;
+ FC4F;ARABIC LIGATURE NOON WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0646 0649;;;;N;;;;;
+ FC50;ARABIC LIGATURE NOON WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0646 064A;;;;N;;;;;
+ FC51;ARABIC LIGATURE HEH WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 0647 062C;;;;N;;;;;
+ FC52;ARABIC LIGATURE HEH WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0647 0645;;;;N;;;;;
+ FC53;ARABIC LIGATURE HEH WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0647 0649;;;;N;;;;;
+ FC54;ARABIC LIGATURE HEH WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0647 064A;;;;N;;;;;
+ FC55;ARABIC LIGATURE YEH WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 064A 062C;;;;N;;;;;
+ FC56;ARABIC LIGATURE YEH WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 064A 062D;;;;N;;;;;
+ FC57;ARABIC LIGATURE YEH WITH KHAH ISOLATED FORM;Lo;0;AL;<isolated> 064A 062E;;;;N;;;;;
+ FC58;ARABIC LIGATURE YEH WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 064A 0645;;;;N;;;;;
+ FC59;ARABIC LIGATURE YEH WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 064A 0649;;;;N;;;;;
+ FC5A;ARABIC LIGATURE YEH WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 064A 064A;;;;N;;;;;
+ FC5B;ARABIC LIGATURE THAL WITH SUPERSCRIPT ALEF ISOLATED FORM;Lo;0;AL;<isolated> 0630 0670;;;;N;;;;;
+ FC5C;ARABIC LIGATURE REH WITH SUPERSCRIPT ALEF ISOLATED FORM;Lo;0;AL;<isolated> 0631 0670;;;;N;;;;;
+ FC5D;ARABIC LIGATURE ALEF MAKSURA WITH SUPERSCRIPT ALEF ISOLATED FORM;Lo;0;AL;<isolated> 0649 0670;;;;N;;;;;
+ FC5E;ARABIC LIGATURE SHADDA WITH DAMMATAN ISOLATED FORM;Lo;0;AL;<isolated> 0020 064C 0651;;;;N;;;;;
+ FC5F;ARABIC LIGATURE SHADDA WITH KASRATAN ISOLATED FORM;Lo;0;AL;<isolated> 0020 064D 0651;;;;N;;;;;
+ FC60;ARABIC LIGATURE SHADDA WITH FATHA ISOLATED FORM;Lo;0;AL;<isolated> 0020 064E 0651;;;;N;;;;;
+ FC61;ARABIC LIGATURE SHADDA WITH DAMMA ISOLATED FORM;Lo;0;AL;<isolated> 0020 064F 0651;;;;N;;;;;
+ FC62;ARABIC LIGATURE SHADDA WITH KASRA ISOLATED FORM;Lo;0;AL;<isolated> 0020 0650 0651;;;;N;;;;;
+ FC63;ARABIC LIGATURE SHADDA WITH SUPERSCRIPT ALEF ISOLATED FORM;Lo;0;AL;<isolated> 0020 0651 0670;;;;N;;;;;
+ FC64;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH REH FINAL FORM;Lo;0;AL;<final> 0626 0631;;;;N;;;;;
+ FC65;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH ZAIN FINAL FORM;Lo;0;AL;<final> 0626 0632;;;;N;;;;;
+ FC66;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH MEEM FINAL FORM;Lo;0;AL;<final> 0626 0645;;;;N;;;;;
+ FC67;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH NOON FINAL FORM;Lo;0;AL;<final> 0626 0646;;;;N;;;;;
+ FC68;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0626 0649;;;;N;;;;;
+ FC69;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH YEH FINAL FORM;Lo;0;AL;<final> 0626 064A;;;;N;;;;;
+ FC6A;ARABIC LIGATURE BEH WITH REH FINAL FORM;Lo;0;AL;<final> 0628 0631;;;;N;;;;;
+ FC6B;ARABIC LIGATURE BEH WITH ZAIN FINAL FORM;Lo;0;AL;<final> 0628 0632;;;;N;;;;;
+ FC6C;ARABIC LIGATURE BEH WITH MEEM FINAL FORM;Lo;0;AL;<final> 0628 0645;;;;N;;;;;
+ FC6D;ARABIC LIGATURE BEH WITH NOON FINAL FORM;Lo;0;AL;<final> 0628 0646;;;;N;;;;;
+ FC6E;ARABIC LIGATURE BEH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0628 0649;;;;N;;;;;
+ FC6F;ARABIC LIGATURE BEH WITH YEH FINAL FORM;Lo;0;AL;<final> 0628 064A;;;;N;;;;;
+ FC70;ARABIC LIGATURE TEH WITH REH FINAL FORM;Lo;0;AL;<final> 062A 0631;;;;N;;;;;
+ FC71;ARABIC LIGATURE TEH WITH ZAIN FINAL FORM;Lo;0;AL;<final> 062A 0632;;;;N;;;;;
+ FC72;ARABIC LIGATURE TEH WITH MEEM FINAL FORM;Lo;0;AL;<final> 062A 0645;;;;N;;;;;
+ FC73;ARABIC LIGATURE TEH WITH NOON FINAL FORM;Lo;0;AL;<final> 062A 0646;;;;N;;;;;
+ FC74;ARABIC LIGATURE TEH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 062A 0649;;;;N;;;;;
+ FC75;ARABIC LIGATURE TEH WITH YEH FINAL FORM;Lo;0;AL;<final> 062A 064A;;;;N;;;;;
+ FC76;ARABIC LIGATURE THEH WITH REH FINAL FORM;Lo;0;AL;<final> 062B 0631;;;;N;;;;;
+ FC77;ARABIC LIGATURE THEH WITH ZAIN FINAL FORM;Lo;0;AL;<final> 062B 0632;;;;N;;;;;
+ FC78;ARABIC LIGATURE THEH WITH MEEM FINAL FORM;Lo;0;AL;<final> 062B 0645;;;;N;;;;;
+ FC79;ARABIC LIGATURE THEH WITH NOON FINAL FORM;Lo;0;AL;<final> 062B 0646;;;;N;;;;;
+ FC7A;ARABIC LIGATURE THEH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 062B 0649;;;;N;;;;;
+ FC7B;ARABIC LIGATURE THEH WITH YEH FINAL FORM;Lo;0;AL;<final> 062B 064A;;;;N;;;;;
+ FC7C;ARABIC LIGATURE FEH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0641 0649;;;;N;;;;;
+ FC7D;ARABIC LIGATURE FEH WITH YEH FINAL FORM;Lo;0;AL;<final> 0641 064A;;;;N;;;;;
+ FC7E;ARABIC LIGATURE QAF WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0642 0649;;;;N;;;;;
+ FC7F;ARABIC LIGATURE QAF WITH YEH FINAL FORM;Lo;0;AL;<final> 0642 064A;;;;N;;;;;
+ FC80;ARABIC LIGATURE KAF WITH ALEF FINAL FORM;Lo;0;AL;<final> 0643 0627;;;;N;;;;;
+ FC81;ARABIC LIGATURE KAF WITH LAM FINAL FORM;Lo;0;AL;<final> 0643 0644;;;;N;;;;;
+ FC82;ARABIC LIGATURE KAF WITH MEEM FINAL FORM;Lo;0;AL;<final> 0643 0645;;;;N;;;;;
+ FC83;ARABIC LIGATURE KAF WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0643 0649;;;;N;;;;;
+ FC84;ARABIC LIGATURE KAF WITH YEH FINAL FORM;Lo;0;AL;<final> 0643 064A;;;;N;;;;;
+ FC85;ARABIC LIGATURE LAM WITH MEEM FINAL FORM;Lo;0;AL;<final> 0644 0645;;;;N;;;;;
+ FC86;ARABIC LIGATURE LAM WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0644 0649;;;;N;;;;;
+ FC87;ARABIC LIGATURE LAM WITH YEH FINAL FORM;Lo;0;AL;<final> 0644 064A;;;;N;;;;;
+ FC88;ARABIC LIGATURE MEEM WITH ALEF FINAL FORM;Lo;0;AL;<final> 0645 0627;;;;N;;;;;
+ FC89;ARABIC LIGATURE MEEM WITH MEEM FINAL FORM;Lo;0;AL;<final> 0645 0645;;;;N;;;;;
+ FC8A;ARABIC LIGATURE NOON WITH REH FINAL FORM;Lo;0;AL;<final> 0646 0631;;;;N;;;;;
+ FC8B;ARABIC LIGATURE NOON WITH ZAIN FINAL FORM;Lo;0;AL;<final> 0646 0632;;;;N;;;;;
+ FC8C;ARABIC LIGATURE NOON WITH MEEM FINAL FORM;Lo;0;AL;<final> 0646 0645;;;;N;;;;;
+ FC8D;ARABIC LIGATURE NOON WITH NOON FINAL FORM;Lo;0;AL;<final> 0646 0646;;;;N;;;;;
+ FC8E;ARABIC LIGATURE NOON WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0646 0649;;;;N;;;;;
+ FC8F;ARABIC LIGATURE NOON WITH YEH FINAL FORM;Lo;0;AL;<final> 0646 064A;;;;N;;;;;
+ FC90;ARABIC LIGATURE ALEF MAKSURA WITH SUPERSCRIPT ALEF FINAL FORM;Lo;0;AL;<final> 0649 0670;;;;N;;;;;
+ FC91;ARABIC LIGATURE YEH WITH REH FINAL FORM;Lo;0;AL;<final> 064A 0631;;;;N;;;;;
+ FC92;ARABIC LIGATURE YEH WITH ZAIN FINAL FORM;Lo;0;AL;<final> 064A 0632;;;;N;;;;;
+ FC93;ARABIC LIGATURE YEH WITH MEEM FINAL FORM;Lo;0;AL;<final> 064A 0645;;;;N;;;;;
+ FC94;ARABIC LIGATURE YEH WITH NOON FINAL FORM;Lo;0;AL;<final> 064A 0646;;;;N;;;;;
+ FC95;ARABIC LIGATURE YEH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 064A 0649;;;;N;;;;;
+ FC96;ARABIC LIGATURE YEH WITH YEH FINAL FORM;Lo;0;AL;<final> 064A 064A;;;;N;;;;;
+ FC97;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0626 062C;;;;N;;;;;
+ FC98;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0626 062D;;;;N;;;;;
+ FC99;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0626 062E;;;;N;;;;;
+ FC9A;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0626 0645;;;;N;;;;;
+ FC9B;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH HEH INITIAL FORM;Lo;0;AL;<initial> 0626 0647;;;;N;;;;;
+ FC9C;ARABIC LIGATURE BEH WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0628 062C;;;;N;;;;;
+ FC9D;ARABIC LIGATURE BEH WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0628 062D;;;;N;;;;;
+ FC9E;ARABIC LIGATURE BEH WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0628 062E;;;;N;;;;;
+ FC9F;ARABIC LIGATURE BEH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0628 0645;;;;N;;;;;
+ FCA0;ARABIC LIGATURE BEH WITH HEH INITIAL FORM;Lo;0;AL;<initial> 0628 0647;;;;N;;;;;
+ FCA1;ARABIC LIGATURE TEH WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 062A 062C;;;;N;;;;;
+ FCA2;ARABIC LIGATURE TEH WITH HAH INITIAL FORM;Lo;0;AL;<initial> 062A 062D;;;;N;;;;;
+ FCA3;ARABIC LIGATURE TEH WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 062A 062E;;;;N;;;;;
+ FCA4;ARABIC LIGATURE TEH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 062A 0645;;;;N;;;;;
+ FCA5;ARABIC LIGATURE TEH WITH HEH INITIAL FORM;Lo;0;AL;<initial> 062A 0647;;;;N;;;;;
+ FCA6;ARABIC LIGATURE THEH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 062B 0645;;;;N;;;;;
+ FCA7;ARABIC LIGATURE JEEM WITH HAH INITIAL FORM;Lo;0;AL;<initial> 062C 062D;;;;N;;;;;
+ FCA8;ARABIC LIGATURE JEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 062C 0645;;;;N;;;;;
+ FCA9;ARABIC LIGATURE HAH WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 062D 062C;;;;N;;;;;
+ FCAA;ARABIC LIGATURE HAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 062D 0645;;;;N;;;;;
+ FCAB;ARABIC LIGATURE KHAH WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 062E 062C;;;;N;;;;;
+ FCAC;ARABIC LIGATURE KHAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 062E 0645;;;;N;;;;;
+ FCAD;ARABIC LIGATURE SEEN WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0633 062C;;;;N;;;;;
+ FCAE;ARABIC LIGATURE SEEN WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0633 062D;;;;N;;;;;
+ FCAF;ARABIC LIGATURE SEEN WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0633 062E;;;;N;;;;;
+ FCB0;ARABIC LIGATURE SEEN WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0633 0645;;;;N;;;;;
+ FCB1;ARABIC LIGATURE SAD WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0635 062D;;;;N;;;;;
+ FCB2;ARABIC LIGATURE SAD WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0635 062E;;;;N;;;;;
+ FCB3;ARABIC LIGATURE SAD WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0635 0645;;;;N;;;;;
+ FCB4;ARABIC LIGATURE DAD WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0636 062C;;;;N;;;;;
+ FCB5;ARABIC LIGATURE DAD WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0636 062D;;;;N;;;;;
+ FCB6;ARABIC LIGATURE DAD WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0636 062E;;;;N;;;;;
+ FCB7;ARABIC LIGATURE DAD WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0636 0645;;;;N;;;;;
+ FCB8;ARABIC LIGATURE TAH WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0637 062D;;;;N;;;;;
+ FCB9;ARABIC LIGATURE ZAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0638 0645;;;;N;;;;;
+ FCBA;ARABIC LIGATURE AIN WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0639 062C;;;;N;;;;;
+ FCBB;ARABIC LIGATURE AIN WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0639 0645;;;;N;;;;;
+ FCBC;ARABIC LIGATURE GHAIN WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 063A 062C;;;;N;;;;;
+ FCBD;ARABIC LIGATURE GHAIN WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 063A 0645;;;;N;;;;;
+ FCBE;ARABIC LIGATURE FEH WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0641 062C;;;;N;;;;;
+ FCBF;ARABIC LIGATURE FEH WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0641 062D;;;;N;;;;;
+ FCC0;ARABIC LIGATURE FEH WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0641 062E;;;;N;;;;;
+ FCC1;ARABIC LIGATURE FEH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0641 0645;;;;N;;;;;
+ FCC2;ARABIC LIGATURE QAF WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0642 062D;;;;N;;;;;
+ FCC3;ARABIC LIGATURE QAF WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0642 0645;;;;N;;;;;
+ FCC4;ARABIC LIGATURE KAF WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0643 062C;;;;N;;;;;
+ FCC5;ARABIC LIGATURE KAF WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0643 062D;;;;N;;;;;
+ FCC6;ARABIC LIGATURE KAF WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0643 062E;;;;N;;;;;
+ FCC7;ARABIC LIGATURE KAF WITH LAM INITIAL FORM;Lo;0;AL;<initial> 0643 0644;;;;N;;;;;
+ FCC8;ARABIC LIGATURE KAF WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0643 0645;;;;N;;;;;
+ FCC9;ARABIC LIGATURE LAM WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0644 062C;;;;N;;;;;
+ FCCA;ARABIC LIGATURE LAM WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0644 062D;;;;N;;;;;
+ FCCB;ARABIC LIGATURE LAM WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0644 062E;;;;N;;;;;
+ FCCC;ARABIC LIGATURE LAM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0644 0645;;;;N;;;;;
+ FCCD;ARABIC LIGATURE LAM WITH HEH INITIAL FORM;Lo;0;AL;<initial> 0644 0647;;;;N;;;;;
+ FCCE;ARABIC LIGATURE MEEM WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0645 062C;;;;N;;;;;
+ FCCF;ARABIC LIGATURE MEEM WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0645 062D;;;;N;;;;;
+ FCD0;ARABIC LIGATURE MEEM WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0645 062E;;;;N;;;;;
+ FCD1;ARABIC LIGATURE MEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0645 0645;;;;N;;;;;
+ FCD2;ARABIC LIGATURE NOON WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0646 062C;;;;N;;;;;
+ FCD3;ARABIC LIGATURE NOON WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0646 062D;;;;N;;;;;
+ FCD4;ARABIC LIGATURE NOON WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0646 062E;;;;N;;;;;
+ FCD5;ARABIC LIGATURE NOON WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0646 0645;;;;N;;;;;
+ FCD6;ARABIC LIGATURE NOON WITH HEH INITIAL FORM;Lo;0;AL;<initial> 0646 0647;;;;N;;;;;
+ FCD7;ARABIC LIGATURE HEH WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0647 062C;;;;N;;;;;
+ FCD8;ARABIC LIGATURE HEH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0647 0645;;;;N;;;;;
+ FCD9;ARABIC LIGATURE HEH WITH SUPERSCRIPT ALEF INITIAL FORM;Lo;0;AL;<initial> 0647 0670;;;;N;;;;;
+ FCDA;ARABIC LIGATURE YEH WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 064A 062C;;;;N;;;;;
+ FCDB;ARABIC LIGATURE YEH WITH HAH INITIAL FORM;Lo;0;AL;<initial> 064A 062D;;;;N;;;;;
+ FCDC;ARABIC LIGATURE YEH WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 064A 062E;;;;N;;;;;
+ FCDD;ARABIC LIGATURE YEH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 064A 0645;;;;N;;;;;
+ FCDE;ARABIC LIGATURE YEH WITH HEH INITIAL FORM;Lo;0;AL;<initial> 064A 0647;;;;N;;;;;
+ FCDF;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH MEEM MEDIAL FORM;Lo;0;AL;<medial> 0626 0645;;;;N;;;;;
+ FCE0;ARABIC LIGATURE YEH WITH HAMZA ABOVE WITH HEH MEDIAL FORM;Lo;0;AL;<medial> 0626 0647;;;;N;;;;;
+ FCE1;ARABIC LIGATURE BEH WITH MEEM MEDIAL FORM;Lo;0;AL;<medial> 0628 0645;;;;N;;;;;
+ FCE2;ARABIC LIGATURE BEH WITH HEH MEDIAL FORM;Lo;0;AL;<medial> 0628 0647;;;;N;;;;;
+ FCE3;ARABIC LIGATURE TEH WITH MEEM MEDIAL FORM;Lo;0;AL;<medial> 062A 0645;;;;N;;;;;
+ FCE4;ARABIC LIGATURE TEH WITH HEH MEDIAL FORM;Lo;0;AL;<medial> 062A 0647;;;;N;;;;;
+ FCE5;ARABIC LIGATURE THEH WITH MEEM MEDIAL FORM;Lo;0;AL;<medial> 062B 0645;;;;N;;;;;
+ FCE6;ARABIC LIGATURE THEH WITH HEH MEDIAL FORM;Lo;0;AL;<medial> 062B 0647;;;;N;;;;;
+ FCE7;ARABIC LIGATURE SEEN WITH MEEM MEDIAL FORM;Lo;0;AL;<medial> 0633 0645;;;;N;;;;;
+ FCE8;ARABIC LIGATURE SEEN WITH HEH MEDIAL FORM;Lo;0;AL;<medial> 0633 0647;;;;N;;;;;
+ FCE9;ARABIC LIGATURE SHEEN WITH MEEM MEDIAL FORM;Lo;0;AL;<medial> 0634 0645;;;;N;;;;;
+ FCEA;ARABIC LIGATURE SHEEN WITH HEH MEDIAL FORM;Lo;0;AL;<medial> 0634 0647;;;;N;;;;;
+ FCEB;ARABIC LIGATURE KAF WITH LAM MEDIAL FORM;Lo;0;AL;<medial> 0643 0644;;;;N;;;;;
+ FCEC;ARABIC LIGATURE KAF WITH MEEM MEDIAL FORM;Lo;0;AL;<medial> 0643 0645;;;;N;;;;;
+ FCED;ARABIC LIGATURE LAM WITH MEEM MEDIAL FORM;Lo;0;AL;<medial> 0644 0645;;;;N;;;;;
+ FCEE;ARABIC LIGATURE NOON WITH MEEM MEDIAL FORM;Lo;0;AL;<medial> 0646 0645;;;;N;;;;;
+ FCEF;ARABIC LIGATURE NOON WITH HEH MEDIAL FORM;Lo;0;AL;<medial> 0646 0647;;;;N;;;;;
+ FCF0;ARABIC LIGATURE YEH WITH MEEM MEDIAL FORM;Lo;0;AL;<medial> 064A 0645;;;;N;;;;;
+ FCF1;ARABIC LIGATURE YEH WITH HEH MEDIAL FORM;Lo;0;AL;<medial> 064A 0647;;;;N;;;;;
+ FCF2;ARABIC LIGATURE SHADDA WITH FATHA MEDIAL FORM;Lo;0;AL;<medial> 0640 064E 0651;;;;N;;;;;
+ FCF3;ARABIC LIGATURE SHADDA WITH DAMMA MEDIAL FORM;Lo;0;AL;<medial> 0640 064F 0651;;;;N;;;;;
+ FCF4;ARABIC LIGATURE SHADDA WITH KASRA MEDIAL FORM;Lo;0;AL;<medial> 0640 0650 0651;;;;N;;;;;
+ FCF5;ARABIC LIGATURE TAH WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0637 0649;;;;N;;;;;
+ FCF6;ARABIC LIGATURE TAH WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0637 064A;;;;N;;;;;
+ FCF7;ARABIC LIGATURE AIN WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0639 0649;;;;N;;;;;
+ FCF8;ARABIC LIGATURE AIN WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0639 064A;;;;N;;;;;
+ FCF9;ARABIC LIGATURE GHAIN WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 063A 0649;;;;N;;;;;
+ FCFA;ARABIC LIGATURE GHAIN WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 063A 064A;;;;N;;;;;
+ FCFB;ARABIC LIGATURE SEEN WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0633 0649;;;;N;;;;;
+ FCFC;ARABIC LIGATURE SEEN WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0633 064A;;;;N;;;;;
+ FCFD;ARABIC LIGATURE SHEEN WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0634 0649;;;;N;;;;;
+ FCFE;ARABIC LIGATURE SHEEN WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0634 064A;;;;N;;;;;
+ FCFF;ARABIC LIGATURE HAH WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 062D 0649;;;;N;;;;;
+ FD00;ARABIC LIGATURE HAH WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 062D 064A;;;;N;;;;;
+ FD01;ARABIC LIGATURE JEEM WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 062C 0649;;;;N;;;;;
+ FD02;ARABIC LIGATURE JEEM WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 062C 064A;;;;N;;;;;
+ FD03;ARABIC LIGATURE KHAH WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 062E 0649;;;;N;;;;;
+ FD04;ARABIC LIGATURE KHAH WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 062E 064A;;;;N;;;;;
+ FD05;ARABIC LIGATURE SAD WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0635 0649;;;;N;;;;;
+ FD06;ARABIC LIGATURE SAD WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0635 064A;;;;N;;;;;
+ FD07;ARABIC LIGATURE DAD WITH ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0636 0649;;;;N;;;;;
+ FD08;ARABIC LIGATURE DAD WITH YEH ISOLATED FORM;Lo;0;AL;<isolated> 0636 064A;;;;N;;;;;
+ FD09;ARABIC LIGATURE SHEEN WITH JEEM ISOLATED FORM;Lo;0;AL;<isolated> 0634 062C;;;;N;;;;;
+ FD0A;ARABIC LIGATURE SHEEN WITH HAH ISOLATED FORM;Lo;0;AL;<isolated> 0634 062D;;;;N;;;;;
+ FD0B;ARABIC LIGATURE SHEEN WITH KHAH ISOLATED FORM;Lo;0;AL;<isolated> 0634 062E;;;;N;;;;;
+ FD0C;ARABIC LIGATURE SHEEN WITH MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0634 0645;;;;N;;;;;
+ FD0D;ARABIC LIGATURE SHEEN WITH REH ISOLATED FORM;Lo;0;AL;<isolated> 0634 0631;;;;N;;;;;
+ FD0E;ARABIC LIGATURE SEEN WITH REH ISOLATED FORM;Lo;0;AL;<isolated> 0633 0631;;;;N;;;;;
+ FD0F;ARABIC LIGATURE SAD WITH REH ISOLATED FORM;Lo;0;AL;<isolated> 0635 0631;;;;N;;;;;
+ FD10;ARABIC LIGATURE DAD WITH REH ISOLATED FORM;Lo;0;AL;<isolated> 0636 0631;;;;N;;;;;
+ FD11;ARABIC LIGATURE TAH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0637 0649;;;;N;;;;;
+ FD12;ARABIC LIGATURE TAH WITH YEH FINAL FORM;Lo;0;AL;<final> 0637 064A;;;;N;;;;;
+ FD13;ARABIC LIGATURE AIN WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0639 0649;;;;N;;;;;
+ FD14;ARABIC LIGATURE AIN WITH YEH FINAL FORM;Lo;0;AL;<final> 0639 064A;;;;N;;;;;
+ FD15;ARABIC LIGATURE GHAIN WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 063A 0649;;;;N;;;;;
+ FD16;ARABIC LIGATURE GHAIN WITH YEH FINAL FORM;Lo;0;AL;<final> 063A 064A;;;;N;;;;;
+ FD17;ARABIC LIGATURE SEEN WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0633 0649;;;;N;;;;;
+ FD18;ARABIC LIGATURE SEEN WITH YEH FINAL FORM;Lo;0;AL;<final> 0633 064A;;;;N;;;;;
+ FD19;ARABIC LIGATURE SHEEN WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0634 0649;;;;N;;;;;
+ FD1A;ARABIC LIGATURE SHEEN WITH YEH FINAL FORM;Lo;0;AL;<final> 0634 064A;;;;N;;;;;
+ FD1B;ARABIC LIGATURE HAH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 062D 0649;;;;N;;;;;
+ FD1C;ARABIC LIGATURE HAH WITH YEH FINAL FORM;Lo;0;AL;<final> 062D 064A;;;;N;;;;;
+ FD1D;ARABIC LIGATURE JEEM WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 062C 0649;;;;N;;;;;
+ FD1E;ARABIC LIGATURE JEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 062C 064A;;;;N;;;;;
+ FD1F;ARABIC LIGATURE KHAH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 062E 0649;;;;N;;;;;
+ FD20;ARABIC LIGATURE KHAH WITH YEH FINAL FORM;Lo;0;AL;<final> 062E 064A;;;;N;;;;;
+ FD21;ARABIC LIGATURE SAD WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0635 0649;;;;N;;;;;
+ FD22;ARABIC LIGATURE SAD WITH YEH FINAL FORM;Lo;0;AL;<final> 0635 064A;;;;N;;;;;
+ FD23;ARABIC LIGATURE DAD WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0636 0649;;;;N;;;;;
+ FD24;ARABIC LIGATURE DAD WITH YEH FINAL FORM;Lo;0;AL;<final> 0636 064A;;;;N;;;;;
+ FD25;ARABIC LIGATURE SHEEN WITH JEEM FINAL FORM;Lo;0;AL;<final> 0634 062C;;;;N;;;;;
+ FD26;ARABIC LIGATURE SHEEN WITH HAH FINAL FORM;Lo;0;AL;<final> 0634 062D;;;;N;;;;;
+ FD27;ARABIC LIGATURE SHEEN WITH KHAH FINAL FORM;Lo;0;AL;<final> 0634 062E;;;;N;;;;;
+ FD28;ARABIC LIGATURE SHEEN WITH MEEM FINAL FORM;Lo;0;AL;<final> 0634 0645;;;;N;;;;;
+ FD29;ARABIC LIGATURE SHEEN WITH REH FINAL FORM;Lo;0;AL;<final> 0634 0631;;;;N;;;;;
+ FD2A;ARABIC LIGATURE SEEN WITH REH FINAL FORM;Lo;0;AL;<final> 0633 0631;;;;N;;;;;
+ FD2B;ARABIC LIGATURE SAD WITH REH FINAL FORM;Lo;0;AL;<final> 0635 0631;;;;N;;;;;
+ FD2C;ARABIC LIGATURE DAD WITH REH FINAL FORM;Lo;0;AL;<final> 0636 0631;;;;N;;;;;
+ FD2D;ARABIC LIGATURE SHEEN WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0634 062C;;;;N;;;;;
+ FD2E;ARABIC LIGATURE SHEEN WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0634 062D;;;;N;;;;;
+ FD2F;ARABIC LIGATURE SHEEN WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0634 062E;;;;N;;;;;
+ FD30;ARABIC LIGATURE SHEEN WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0634 0645;;;;N;;;;;
+ FD31;ARABIC LIGATURE SEEN WITH HEH INITIAL FORM;Lo;0;AL;<initial> 0633 0647;;;;N;;;;;
+ FD32;ARABIC LIGATURE SHEEN WITH HEH INITIAL FORM;Lo;0;AL;<initial> 0634 0647;;;;N;;;;;
+ FD33;ARABIC LIGATURE TAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0637 0645;;;;N;;;;;
+ FD34;ARABIC LIGATURE SEEN WITH JEEM MEDIAL FORM;Lo;0;AL;<medial> 0633 062C;;;;N;;;;;
+ FD35;ARABIC LIGATURE SEEN WITH HAH MEDIAL FORM;Lo;0;AL;<medial> 0633 062D;;;;N;;;;;
+ FD36;ARABIC LIGATURE SEEN WITH KHAH MEDIAL FORM;Lo;0;AL;<medial> 0633 062E;;;;N;;;;;
+ FD37;ARABIC LIGATURE SHEEN WITH JEEM MEDIAL FORM;Lo;0;AL;<medial> 0634 062C;;;;N;;;;;
+ FD38;ARABIC LIGATURE SHEEN WITH HAH MEDIAL FORM;Lo;0;AL;<medial> 0634 062D;;;;N;;;;;
+ FD39;ARABIC LIGATURE SHEEN WITH KHAH MEDIAL FORM;Lo;0;AL;<medial> 0634 062E;;;;N;;;;;
+ FD3A;ARABIC LIGATURE TAH WITH MEEM MEDIAL FORM;Lo;0;AL;<medial> 0637 0645;;;;N;;;;;
+ FD3B;ARABIC LIGATURE ZAH WITH MEEM MEDIAL FORM;Lo;0;AL;<medial> 0638 0645;;;;N;;;;;
+ FD3C;ARABIC LIGATURE ALEF WITH FATHATAN FINAL FORM;Lo;0;AL;<final> 0627 064B;;;;N;;;;;
+ FD3D;ARABIC LIGATURE ALEF WITH FATHATAN ISOLATED FORM;Lo;0;AL;<isolated> 0627 064B;;;;N;;;;;
+ FD3E;ORNATE LEFT PARENTHESIS;Pe;0;ON;;;;;N;;;;;
+ FD3F;ORNATE RIGHT PARENTHESIS;Ps;0;ON;;;;;N;;;;;
+ FD50;ARABIC LIGATURE TEH WITH JEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 062A 062C 0645;;;;N;;;;;
+ FD51;ARABIC LIGATURE TEH WITH HAH WITH JEEM FINAL FORM;Lo;0;AL;<final> 062A 062D 062C;;;;N;;;;;
+ FD52;ARABIC LIGATURE TEH WITH HAH WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 062A 062D 062C;;;;N;;;;;
+ FD53;ARABIC LIGATURE TEH WITH HAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 062A 062D 0645;;;;N;;;;;
+ FD54;ARABIC LIGATURE TEH WITH KHAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 062A 062E 0645;;;;N;;;;;
+ FD55;ARABIC LIGATURE TEH WITH MEEM WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 062A 0645 062C;;;;N;;;;;
+ FD56;ARABIC LIGATURE TEH WITH MEEM WITH HAH INITIAL FORM;Lo;0;AL;<initial> 062A 0645 062D;;;;N;;;;;
+ FD57;ARABIC LIGATURE TEH WITH MEEM WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 062A 0645 062E;;;;N;;;;;
+ FD58;ARABIC LIGATURE JEEM WITH MEEM WITH HAH FINAL FORM;Lo;0;AL;<final> 062C 0645 062D;;;;N;;;;;
+ FD59;ARABIC LIGATURE JEEM WITH MEEM WITH HAH INITIAL FORM;Lo;0;AL;<initial> 062C 0645 062D;;;;N;;;;;
+ FD5A;ARABIC LIGATURE HAH WITH MEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 062D 0645 064A;;;;N;;;;;
+ FD5B;ARABIC LIGATURE HAH WITH MEEM WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 062D 0645 0649;;;;N;;;;;
+ FD5C;ARABIC LIGATURE SEEN WITH HAH WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0633 062D 062C;;;;N;;;;;
+ FD5D;ARABIC LIGATURE SEEN WITH JEEM WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0633 062C 062D;;;;N;;;;;
+ FD5E;ARABIC LIGATURE SEEN WITH JEEM WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0633 062C 0649;;;;N;;;;;
+ FD5F;ARABIC LIGATURE SEEN WITH MEEM WITH HAH FINAL FORM;Lo;0;AL;<final> 0633 0645 062D;;;;N;;;;;
+ FD60;ARABIC LIGATURE SEEN WITH MEEM WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0633 0645 062D;;;;N;;;;;
+ FD61;ARABIC LIGATURE SEEN WITH MEEM WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0633 0645 062C;;;;N;;;;;
+ FD62;ARABIC LIGATURE SEEN WITH MEEM WITH MEEM FINAL FORM;Lo;0;AL;<final> 0633 0645 0645;;;;N;;;;;
+ FD63;ARABIC LIGATURE SEEN WITH MEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0633 0645 0645;;;;N;;;;;
+ FD64;ARABIC LIGATURE SAD WITH HAH WITH HAH FINAL FORM;Lo;0;AL;<final> 0635 062D 062D;;;;N;;;;;
+ FD65;ARABIC LIGATURE SAD WITH HAH WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0635 062D 062D;;;;N;;;;;
+ FD66;ARABIC LIGATURE SAD WITH MEEM WITH MEEM FINAL FORM;Lo;0;AL;<final> 0635 0645 0645;;;;N;;;;;
+ FD67;ARABIC LIGATURE SHEEN WITH HAH WITH MEEM FINAL FORM;Lo;0;AL;<final> 0634 062D 0645;;;;N;;;;;
+ FD68;ARABIC LIGATURE SHEEN WITH HAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0634 062D 0645;;;;N;;;;;
+ FD69;ARABIC LIGATURE SHEEN WITH JEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 0634 062C 064A;;;;N;;;;;
+ FD6A;ARABIC LIGATURE SHEEN WITH MEEM WITH KHAH FINAL FORM;Lo;0;AL;<final> 0634 0645 062E;;;;N;;;;;
+ FD6B;ARABIC LIGATURE SHEEN WITH MEEM WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0634 0645 062E;;;;N;;;;;
+ FD6C;ARABIC LIGATURE SHEEN WITH MEEM WITH MEEM FINAL FORM;Lo;0;AL;<final> 0634 0645 0645;;;;N;;;;;
+ FD6D;ARABIC LIGATURE SHEEN WITH MEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0634 0645 0645;;;;N;;;;;
+ FD6E;ARABIC LIGATURE DAD WITH HAH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0636 062D 0649;;;;N;;;;;
+ FD6F;ARABIC LIGATURE DAD WITH KHAH WITH MEEM FINAL FORM;Lo;0;AL;<final> 0636 062E 0645;;;;N;;;;;
+ FD70;ARABIC LIGATURE DAD WITH KHAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0636 062E 0645;;;;N;;;;;
+ FD71;ARABIC LIGATURE TAH WITH MEEM WITH HAH FINAL FORM;Lo;0;AL;<final> 0637 0645 062D;;;;N;;;;;
+ FD72;ARABIC LIGATURE TAH WITH MEEM WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0637 0645 062D;;;;N;;;;;
+ FD73;ARABIC LIGATURE TAH WITH MEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0637 0645 0645;;;;N;;;;;
+ FD74;ARABIC LIGATURE TAH WITH MEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 0637 0645 064A;;;;N;;;;;
+ FD75;ARABIC LIGATURE AIN WITH JEEM WITH MEEM FINAL FORM;Lo;0;AL;<final> 0639 062C 0645;;;;N;;;;;
+ FD76;ARABIC LIGATURE AIN WITH MEEM WITH MEEM FINAL FORM;Lo;0;AL;<final> 0639 0645 0645;;;;N;;;;;
+ FD77;ARABIC LIGATURE AIN WITH MEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0639 0645 0645;;;;N;;;;;
+ FD78;ARABIC LIGATURE AIN WITH MEEM WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0639 0645 0649;;;;N;;;;;
+ FD79;ARABIC LIGATURE GHAIN WITH MEEM WITH MEEM FINAL FORM;Lo;0;AL;<final> 063A 0645 0645;;;;N;;;;;
+ FD7A;ARABIC LIGATURE GHAIN WITH MEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 063A 0645 064A;;;;N;;;;;
+ FD7B;ARABIC LIGATURE GHAIN WITH MEEM WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 063A 0645 0649;;;;N;;;;;
+ FD7C;ARABIC LIGATURE FEH WITH KHAH WITH MEEM FINAL FORM;Lo;0;AL;<final> 0641 062E 0645;;;;N;;;;;
+ FD7D;ARABIC LIGATURE FEH WITH KHAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0641 062E 0645;;;;N;;;;;
+ FD7E;ARABIC LIGATURE QAF WITH MEEM WITH HAH FINAL FORM;Lo;0;AL;<final> 0642 0645 062D;;;;N;;;;;
+ FD7F;ARABIC LIGATURE QAF WITH MEEM WITH MEEM FINAL FORM;Lo;0;AL;<final> 0642 0645 0645;;;;N;;;;;
+ FD80;ARABIC LIGATURE LAM WITH HAH WITH MEEM FINAL FORM;Lo;0;AL;<final> 0644 062D 0645;;;;N;;;;;
+ FD81;ARABIC LIGATURE LAM WITH HAH WITH YEH FINAL FORM;Lo;0;AL;<final> 0644 062D 064A;;;;N;;;;;
+ FD82;ARABIC LIGATURE LAM WITH HAH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0644 062D 0649;;;;N;;;;;
+ FD83;ARABIC LIGATURE LAM WITH JEEM WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0644 062C 062C;;;;N;;;;;
+ FD84;ARABIC LIGATURE LAM WITH JEEM WITH JEEM FINAL FORM;Lo;0;AL;<final> 0644 062C 062C;;;;N;;;;;
+ FD85;ARABIC LIGATURE LAM WITH KHAH WITH MEEM FINAL FORM;Lo;0;AL;<final> 0644 062E 0645;;;;N;;;;;
+ FD86;ARABIC LIGATURE LAM WITH KHAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0644 062E 0645;;;;N;;;;;
+ FD87;ARABIC LIGATURE LAM WITH MEEM WITH HAH FINAL FORM;Lo;0;AL;<final> 0644 0645 062D;;;;N;;;;;
+ FD88;ARABIC LIGATURE LAM WITH MEEM WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0644 0645 062D;;;;N;;;;;
+ FD89;ARABIC LIGATURE MEEM WITH HAH WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0645 062D 062C;;;;N;;;;;
+ FD8A;ARABIC LIGATURE MEEM WITH HAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0645 062D 0645;;;;N;;;;;
+ FD8B;ARABIC LIGATURE MEEM WITH HAH WITH YEH FINAL FORM;Lo;0;AL;<final> 0645 062D 064A;;;;N;;;;;
+ FD8C;ARABIC LIGATURE MEEM WITH JEEM WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0645 062C 062D;;;;N;;;;;
+ FD8D;ARABIC LIGATURE MEEM WITH JEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0645 062C 0645;;;;N;;;;;
+ FD8E;ARABIC LIGATURE MEEM WITH KHAH WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0645 062E 062C;;;;N;;;;;
+ FD8F;ARABIC LIGATURE MEEM WITH KHAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0645 062E 0645;;;;N;;;;;
+ FD92;ARABIC LIGATURE MEEM WITH JEEM WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0645 062C 062E;;;;N;;;;;
+ FD93;ARABIC LIGATURE HEH WITH MEEM WITH JEEM INITIAL FORM;Lo;0;AL;<initial> 0647 0645 062C;;;;N;;;;;
+ FD94;ARABIC LIGATURE HEH WITH MEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0647 0645 0645;;;;N;;;;;
+ FD95;ARABIC LIGATURE NOON WITH HAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0646 062D 0645;;;;N;;;;;
+ FD96;ARABIC LIGATURE NOON WITH HAH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0646 062D 0649;;;;N;;;;;
+ FD97;ARABIC LIGATURE NOON WITH JEEM WITH MEEM FINAL FORM;Lo;0;AL;<final> 0646 062C 0645;;;;N;;;;;
+ FD98;ARABIC LIGATURE NOON WITH JEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0646 062C 0645;;;;N;;;;;
+ FD99;ARABIC LIGATURE NOON WITH JEEM WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0646 062C 0649;;;;N;;;;;
+ FD9A;ARABIC LIGATURE NOON WITH MEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 0646 0645 064A;;;;N;;;;;
+ FD9B;ARABIC LIGATURE NOON WITH MEEM WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0646 0645 0649;;;;N;;;;;
+ FD9C;ARABIC LIGATURE YEH WITH MEEM WITH MEEM FINAL FORM;Lo;0;AL;<final> 064A 0645 0645;;;;N;;;;;
+ FD9D;ARABIC LIGATURE YEH WITH MEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 064A 0645 0645;;;;N;;;;;
+ FD9E;ARABIC LIGATURE BEH WITH KHAH WITH YEH FINAL FORM;Lo;0;AL;<final> 0628 062E 064A;;;;N;;;;;
+ FD9F;ARABIC LIGATURE TEH WITH JEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 062A 062C 064A;;;;N;;;;;
+ FDA0;ARABIC LIGATURE TEH WITH JEEM WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 062A 062C 0649;;;;N;;;;;
+ FDA1;ARABIC LIGATURE TEH WITH KHAH WITH YEH FINAL FORM;Lo;0;AL;<final> 062A 062E 064A;;;;N;;;;;
+ FDA2;ARABIC LIGATURE TEH WITH KHAH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 062A 062E 0649;;;;N;;;;;
+ FDA3;ARABIC LIGATURE TEH WITH MEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 062A 0645 064A;;;;N;;;;;
+ FDA4;ARABIC LIGATURE TEH WITH MEEM WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 062A 0645 0649;;;;N;;;;;
+ FDA5;ARABIC LIGATURE JEEM WITH MEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 062C 0645 064A;;;;N;;;;;
+ FDA6;ARABIC LIGATURE JEEM WITH HAH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 062C 062D 0649;;;;N;;;;;
+ FDA7;ARABIC LIGATURE JEEM WITH MEEM WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 062C 0645 0649;;;;N;;;;;
+ FDA8;ARABIC LIGATURE SEEN WITH KHAH WITH ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0633 062E 0649;;;;N;;;;;
+ FDA9;ARABIC LIGATURE SAD WITH HAH WITH YEH FINAL FORM;Lo;0;AL;<final> 0635 062D 064A;;;;N;;;;;
+ FDAA;ARABIC LIGATURE SHEEN WITH HAH WITH YEH FINAL FORM;Lo;0;AL;<final> 0634 062D 064A;;;;N;;;;;
+ FDAB;ARABIC LIGATURE DAD WITH HAH WITH YEH FINAL FORM;Lo;0;AL;<final> 0636 062D 064A;;;;N;;;;;
+ FDAC;ARABIC LIGATURE LAM WITH JEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 0644 062C 064A;;;;N;;;;;
+ FDAD;ARABIC LIGATURE LAM WITH MEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 0644 0645 064A;;;;N;;;;;
+ FDAE;ARABIC LIGATURE YEH WITH HAH WITH YEH FINAL FORM;Lo;0;AL;<final> 064A 062D 064A;;;;N;;;;;
+ FDAF;ARABIC LIGATURE YEH WITH JEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 064A 062C 064A;;;;N;;;;;
+ FDB0;ARABIC LIGATURE YEH WITH MEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 064A 0645 064A;;;;N;;;;;
+ FDB1;ARABIC LIGATURE MEEM WITH MEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 0645 0645 064A;;;;N;;;;;
+ FDB2;ARABIC LIGATURE QAF WITH MEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 0642 0645 064A;;;;N;;;;;
+ FDB3;ARABIC LIGATURE NOON WITH HAH WITH YEH FINAL FORM;Lo;0;AL;<final> 0646 062D 064A;;;;N;;;;;
+ FDB4;ARABIC LIGATURE QAF WITH MEEM WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0642 0645 062D;;;;N;;;;;
+ FDB5;ARABIC LIGATURE LAM WITH HAH WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0644 062D 0645;;;;N;;;;;
+ FDB6;ARABIC LIGATURE AIN WITH MEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 0639 0645 064A;;;;N;;;;;
+ FDB7;ARABIC LIGATURE KAF WITH MEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 0643 0645 064A;;;;N;;;;;
+ FDB8;ARABIC LIGATURE NOON WITH JEEM WITH HAH INITIAL FORM;Lo;0;AL;<initial> 0646 062C 062D;;;;N;;;;;
+ FDB9;ARABIC LIGATURE MEEM WITH KHAH WITH YEH FINAL FORM;Lo;0;AL;<final> 0645 062E 064A;;;;N;;;;;
+ FDBA;ARABIC LIGATURE LAM WITH JEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0644 062C 0645;;;;N;;;;;
+ FDBB;ARABIC LIGATURE KAF WITH MEEM WITH MEEM FINAL FORM;Lo;0;AL;<final> 0643 0645 0645;;;;N;;;;;
+ FDBC;ARABIC LIGATURE LAM WITH JEEM WITH MEEM FINAL FORM;Lo;0;AL;<final> 0644 062C 0645;;;;N;;;;;
+ FDBD;ARABIC LIGATURE NOON WITH JEEM WITH HAH FINAL FORM;Lo;0;AL;<final> 0646 062C 062D;;;;N;;;;;
+ FDBE;ARABIC LIGATURE JEEM WITH HAH WITH YEH FINAL FORM;Lo;0;AL;<final> 062C 062D 064A;;;;N;;;;;
+ FDBF;ARABIC LIGATURE HAH WITH JEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 062D 062C 064A;;;;N;;;;;
+ FDC0;ARABIC LIGATURE MEEM WITH JEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 0645 062C 064A;;;;N;;;;;
+ FDC1;ARABIC LIGATURE FEH WITH MEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 0641 0645 064A;;;;N;;;;;
+ FDC2;ARABIC LIGATURE BEH WITH HAH WITH YEH FINAL FORM;Lo;0;AL;<final> 0628 062D 064A;;;;N;;;;;
+ FDC3;ARABIC LIGATURE KAF WITH MEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0643 0645 0645;;;;N;;;;;
+ FDC4;ARABIC LIGATURE AIN WITH JEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0639 062C 0645;;;;N;;;;;
+ FDC5;ARABIC LIGATURE SAD WITH MEEM WITH MEEM INITIAL FORM;Lo;0;AL;<initial> 0635 0645 0645;;;;N;;;;;
+ FDC6;ARABIC LIGATURE SEEN WITH KHAH WITH YEH FINAL FORM;Lo;0;AL;<final> 0633 062E 064A;;;;N;;;;;
+ FDC7;ARABIC LIGATURE NOON WITH JEEM WITH YEH FINAL FORM;Lo;0;AL;<final> 0646 062C 064A;;;;N;;;;;
+ FDF0;ARABIC LIGATURE SALLA USED AS KORANIC STOP SIGN ISOLATED FORM;Lo;0;AL;<isolated> 0635 0644 06D2;;;;N;;;;;
+ FDF1;ARABIC LIGATURE QALA USED AS KORANIC STOP SIGN ISOLATED FORM;Lo;0;AL;<isolated> 0642 0644 06D2;;;;N;;;;;
+ FDF2;ARABIC LIGATURE ALLAH ISOLATED FORM;Lo;0;AL;<isolated> 0627 0644 0644 0647;;;;N;;;;;
+ FDF3;ARABIC LIGATURE AKBAR ISOLATED FORM;Lo;0;AL;<isolated> 0627 0643 0628 0631;;;;N;;;;;
+ FDF4;ARABIC LIGATURE MOHAMMAD ISOLATED FORM;Lo;0;AL;<isolated> 0645 062D 0645 062F;;;;N;;;;;
+ FDF5;ARABIC LIGATURE SALAM ISOLATED FORM;Lo;0;AL;<isolated> 0635 0644 0639 0645;;;;N;;;;;
+ FDF6;ARABIC LIGATURE RASOUL ISOLATED FORM;Lo;0;AL;<isolated> 0631 0633 0648 0644;;;;N;;;;;
+ FDF7;ARABIC LIGATURE ALAYHE ISOLATED FORM;Lo;0;AL;<isolated> 0639 0644 064A 0647;;;;N;;;;;
+ FDF8;ARABIC LIGATURE WASALLAM ISOLATED FORM;Lo;0;AL;<isolated> 0648 0633 0644 0645;;;;N;;;;;
+ FDF9;ARABIC LIGATURE SALLA ISOLATED FORM;Lo;0;AL;<isolated> 0635 0644 0649;;;;N;;;;;
+ FDFA;ARABIC LIGATURE SALLALLAHOU ALAYHE WASALLAM;Lo;0;AL;<isolated> 0635 0644 0649 0020 0627 0644 0644 0647 0020 0639 0644 064A 0647 0020 0648 0633 0644 0645;;;;N;ARABIC LETTER SALLALLAHOU ALAYHE WASALLAM;;;;
+ FDFB;ARABIC LIGATURE JALLAJALALOUHOU;Lo;0;AL;<isolated> 062C 0644 0020 062C 0644 0627 0644 0647;;;;N;ARABIC LETTER JALLAJALALOUHOU;;;;
+ FDFC;RIAL SIGN;Sc;0;AL;<isolated> 0631 06CC 0627 0644;;;;N;;;;;
+ FDFD;ARABIC LIGATURE BISMILLAH AR-RAHMAN AR-RAHEEM;So;0;ON;;;;;N;;;;;
+ FE00;VARIATION SELECTOR-1;Mn;0;NSM;;;;;N;;;;;
+ FE01;VARIATION SELECTOR-2;Mn;0;NSM;;;;;N;;;;;
+ FE02;VARIATION SELECTOR-3;Mn;0;NSM;;;;;N;;;;;
+ FE03;VARIATION SELECTOR-4;Mn;0;NSM;;;;;N;;;;;
+ FE04;VARIATION SELECTOR-5;Mn;0;NSM;;;;;N;;;;;
+ FE05;VARIATION SELECTOR-6;Mn;0;NSM;;;;;N;;;;;
+ FE06;VARIATION SELECTOR-7;Mn;0;NSM;;;;;N;;;;;
+ FE07;VARIATION SELECTOR-8;Mn;0;NSM;;;;;N;;;;;
+ FE08;VARIATION SELECTOR-9;Mn;0;NSM;;;;;N;;;;;
+ FE09;VARIATION SELECTOR-10;Mn;0;NSM;;;;;N;;;;;
+ FE0A;VARIATION SELECTOR-11;Mn;0;NSM;;;;;N;;;;;
+ FE0B;VARIATION SELECTOR-12;Mn;0;NSM;;;;;N;;;;;
+ FE0C;VARIATION SELECTOR-13;Mn;0;NSM;;;;;N;;;;;
+ FE0D;VARIATION SELECTOR-14;Mn;0;NSM;;;;;N;;;;;
+ FE0E;VARIATION SELECTOR-15;Mn;0;NSM;;;;;N;;;;;
+ FE0F;VARIATION SELECTOR-16;Mn;0;NSM;;;;;N;;;;;
+ FE10;PRESENTATION FORM FOR VERTICAL COMMA;Po;0;ON;<vertical> 002C;;;;N;;;;;
+ FE11;PRESENTATION FORM FOR VERTICAL IDEOGRAPHIC COMMA;Po;0;ON;<vertical> 3001;;;;N;;;;;
+ FE12;PRESENTATION FORM FOR VERTICAL IDEOGRAPHIC FULL STOP;Po;0;ON;<vertical> 3002;;;;N;;;;;
+ FE13;PRESENTATION FORM FOR VERTICAL COLON;Po;0;ON;<vertical> 003A;;;;N;;;;;
+ FE14;PRESENTATION FORM FOR VERTICAL SEMICOLON;Po;0;ON;<vertical> 003B;;;;N;;;;;
+ FE15;PRESENTATION FORM FOR VERTICAL EXCLAMATION MARK;Po;0;ON;<vertical> 0021;;;;N;;;;;
+ FE16;PRESENTATION FORM FOR VERTICAL QUESTION MARK;Po;0;ON;<vertical> 003F;;;;N;;;;;
+ FE17;PRESENTATION FORM FOR VERTICAL LEFT WHITE LENTICULAR BRACKET;Ps;0;ON;<vertical> 3016;;;;N;;;;;
+ FE18;PRESENTATION FORM FOR VERTICAL RIGHT WHITE LENTICULAR BRAKCET;Pe;0;ON;<vertical> 3017;;;;N;;;;;
+ FE19;PRESENTATION FORM FOR VERTICAL HORIZONTAL ELLIPSIS;Po;0;ON;<vertical> 2026;;;;N;;;;;
+ FE20;COMBINING LIGATURE LEFT HALF;Mn;230;NSM;;;;;N;;;;;
+ FE21;COMBINING LIGATURE RIGHT HALF;Mn;230;NSM;;;;;N;;;;;
+ FE22;COMBINING DOUBLE TILDE LEFT HALF;Mn;230;NSM;;;;;N;;;;;
+ FE23;COMBINING DOUBLE TILDE RIGHT HALF;Mn;230;NSM;;;;;N;;;;;
+ FE24;COMBINING MACRON LEFT HALF;Mn;230;NSM;;;;;N;;;;;
+ FE25;COMBINING MACRON RIGHT HALF;Mn;230;NSM;;;;;N;;;;;
+ FE26;COMBINING CONJOINING MACRON;Mn;230;NSM;;;;;N;;;;;
+ FE27;COMBINING LIGATURE LEFT HALF BELOW;Mn;220;NSM;;;;;N;;;;;
+ FE28;COMBINING LIGATURE RIGHT HALF BELOW;Mn;220;NSM;;;;;N;;;;;
+ FE29;COMBINING TILDE LEFT HALF BELOW;Mn;220;NSM;;;;;N;;;;;
+ FE2A;COMBINING TILDE RIGHT HALF BELOW;Mn;220;NSM;;;;;N;;;;;
+ FE2B;COMBINING MACRON LEFT HALF BELOW;Mn;220;NSM;;;;;N;;;;;
+ FE2C;COMBINING MACRON RIGHT HALF BELOW;Mn;220;NSM;;;;;N;;;;;
+ FE2D;COMBINING CONJOINING MACRON BELOW;Mn;220;NSM;;;;;N;;;;;
+ FE2E;COMBINING CYRILLIC TITLO LEFT HALF;Mn;230;NSM;;;;;N;;;;;
+ FE2F;COMBINING CYRILLIC TITLO RIGHT HALF;Mn;230;NSM;;;;;N;;;;;
+ FE30;PRESENTATION FORM FOR VERTICAL TWO DOT LEADER;Po;0;ON;<vertical> 2025;;;;N;GLYPH FOR VERTICAL TWO DOT LEADER;;;;
+ FE31;PRESENTATION FORM FOR VERTICAL EM DASH;Pd;0;ON;<vertical> 2014;;;;N;GLYPH FOR VERTICAL EM DASH;;;;
+ FE32;PRESENTATION FORM FOR VERTICAL EN DASH;Pd;0;ON;<vertical> 2013;;;;N;GLYPH FOR VERTICAL EN DASH;;;;
+ FE33;PRESENTATION FORM FOR VERTICAL LOW LINE;Pc;0;ON;<vertical> 005F;;;;N;GLYPH FOR VERTICAL SPACING UNDERSCORE;;;;
+ FE34;PRESENTATION FORM FOR VERTICAL WAVY LOW LINE;Pc;0;ON;<vertical> 005F;;;;N;GLYPH FOR VERTICAL SPACING WAVY UNDERSCORE;;;;
+ FE35;PRESENTATION FORM FOR VERTICAL LEFT PARENTHESIS;Ps;0;ON;<vertical> 0028;;;;N;GLYPH FOR VERTICAL OPENING PARENTHESIS;;;;
+ FE36;PRESENTATION FORM FOR VERTICAL RIGHT PARENTHESIS;Pe;0;ON;<vertical> 0029;;;;N;GLYPH FOR VERTICAL CLOSING PARENTHESIS;;;;
+ FE37;PRESENTATION FORM FOR VERTICAL LEFT CURLY BRACKET;Ps;0;ON;<vertical> 007B;;;;N;GLYPH FOR VERTICAL OPENING CURLY BRACKET;;;;
+ FE38;PRESENTATION FORM FOR VERTICAL RIGHT CURLY BRACKET;Pe;0;ON;<vertical> 007D;;;;N;GLYPH FOR VERTICAL CLOSING CURLY BRACKET;;;;
+ FE39;PRESENTATION FORM FOR VERTICAL LEFT TORTOISE SHELL BRACKET;Ps;0;ON;<vertical> 3014;;;;N;GLYPH FOR VERTICAL OPENING TORTOISE SHELL BRACKET;;;;
+ FE3A;PRESENTATION FORM FOR VERTICAL RIGHT TORTOISE SHELL BRACKET;Pe;0;ON;<vertical> 3015;;;;N;GLYPH FOR VERTICAL CLOSING TORTOISE SHELL BRACKET;;;;
+ FE3B;PRESENTATION FORM FOR VERTICAL LEFT BLACK LENTICULAR BRACKET;Ps;0;ON;<vertical> 3010;;;;N;GLYPH FOR VERTICAL OPENING BLACK LENTICULAR BRACKET;;;;
+ FE3C;PRESENTATION FORM FOR VERTICAL RIGHT BLACK LENTICULAR BRACKET;Pe;0;ON;<vertical> 3011;;;;N;GLYPH FOR VERTICAL CLOSING BLACK LENTICULAR BRACKET;;;;
+ FE3D;PRESENTATION FORM FOR VERTICAL LEFT DOUBLE ANGLE BRACKET;Ps;0;ON;<vertical> 300A;;;;N;GLYPH FOR VERTICAL OPENING DOUBLE ANGLE BRACKET;;;;
+ FE3E;PRESENTATION FORM FOR VERTICAL RIGHT DOUBLE ANGLE BRACKET;Pe;0;ON;<vertical> 300B;;;;N;GLYPH FOR VERTICAL CLOSING DOUBLE ANGLE BRACKET;;;;
+ FE3F;PRESENTATION FORM FOR VERTICAL LEFT ANGLE BRACKET;Ps;0;ON;<vertical> 3008;;;;N;GLYPH FOR VERTICAL OPENING ANGLE BRACKET;;;;
+ FE40;PRESENTATION FORM FOR VERTICAL RIGHT ANGLE BRACKET;Pe;0;ON;<vertical> 3009;;;;N;GLYPH FOR VERTICAL CLOSING ANGLE BRACKET;;;;
+ FE41;PRESENTATION FORM FOR VERTICAL LEFT CORNER BRACKET;Ps;0;ON;<vertical> 300C;;;;N;GLYPH FOR VERTICAL OPENING CORNER BRACKET;;;;
+ FE42;PRESENTATION FORM FOR VERTICAL RIGHT CORNER BRACKET;Pe;0;ON;<vertical> 300D;;;;N;GLYPH FOR VERTICAL CLOSING CORNER BRACKET;;;;
+ FE43;PRESENTATION FORM FOR VERTICAL LEFT WHITE CORNER BRACKET;Ps;0;ON;<vertical> 300E;;;;N;GLYPH FOR VERTICAL OPENING WHITE CORNER BRACKET;;;;
+ FE44;PRESENTATION FORM FOR VERTICAL RIGHT WHITE CORNER BRACKET;Pe;0;ON;<vertical> 300F;;;;N;GLYPH FOR VERTICAL CLOSING WHITE CORNER BRACKET;;;;
+ FE45;SESAME DOT;Po;0;ON;;;;;N;;;;;
+ FE46;WHITE SESAME DOT;Po;0;ON;;;;;N;;;;;
+ FE47;PRESENTATION FORM FOR VERTICAL LEFT SQUARE BRACKET;Ps;0;ON;<vertical> 005B;;;;N;;;;;
+ FE48;PRESENTATION FORM FOR VERTICAL RIGHT SQUARE BRACKET;Pe;0;ON;<vertical> 005D;;;;N;;;;;
+ FE49;DASHED OVERLINE;Po;0;ON;<compat> 203E;;;;N;SPACING DASHED OVERSCORE;;;;
+ FE4A;CENTRELINE OVERLINE;Po;0;ON;<compat> 203E;;;;N;SPACING CENTERLINE OVERSCORE;;;;
+ FE4B;WAVY OVERLINE;Po;0;ON;<compat> 203E;;;;N;SPACING WAVY OVERSCORE;;;;
+ FE4C;DOUBLE WAVY OVERLINE;Po;0;ON;<compat> 203E;;;;N;SPACING DOUBLE WAVY OVERSCORE;;;;
+ FE4D;DASHED LOW LINE;Pc;0;ON;<compat> 005F;;;;N;SPACING DASHED UNDERSCORE;;;;
+ FE4E;CENTRELINE LOW LINE;Pc;0;ON;<compat> 005F;;;;N;SPACING CENTERLINE UNDERSCORE;;;;
+ FE4F;WAVY LOW LINE;Pc;0;ON;<compat> 005F;;;;N;SPACING WAVY UNDERSCORE;;;;
+ FE50;SMALL COMMA;Po;0;CS;<small> 002C;;;;N;;;;;
+ FE51;SMALL IDEOGRAPHIC COMMA;Po;0;ON;<small> 3001;;;;N;;;;;
+ FE52;SMALL FULL STOP;Po;0;CS;<small> 002E;;;;N;SMALL PERIOD;;;;
+ FE54;SMALL SEMICOLON;Po;0;ON;<small> 003B;;;;N;;;;;
+ FE55;SMALL COLON;Po;0;CS;<small> 003A;;;;N;;;;;
+ FE56;SMALL QUESTION MARK;Po;0;ON;<small> 003F;;;;N;;;;;
+ FE57;SMALL EXCLAMATION MARK;Po;0;ON;<small> 0021;;;;N;;;;;
+ FE58;SMALL EM DASH;Pd;0;ON;<small> 2014;;;;N;;;;;
+ FE59;SMALL LEFT PARENTHESIS;Ps;0;ON;<small> 0028;;;;Y;SMALL OPENING PARENTHESIS;;;;
+ FE5A;SMALL RIGHT PARENTHESIS;Pe;0;ON;<small> 0029;;;;Y;SMALL CLOSING PARENTHESIS;;;;
+ FE5B;SMALL LEFT CURLY BRACKET;Ps;0;ON;<small> 007B;;;;Y;SMALL OPENING CURLY BRACKET;;;;
+ FE5C;SMALL RIGHT CURLY BRACKET;Pe;0;ON;<small> 007D;;;;Y;SMALL CLOSING CURLY BRACKET;;;;
+ FE5D;SMALL LEFT TORTOISE SHELL BRACKET;Ps;0;ON;<small> 3014;;;;Y;SMALL OPENING TORTOISE SHELL BRACKET;;;;
+ FE5E;SMALL RIGHT TORTOISE SHELL BRACKET;Pe;0;ON;<small> 3015;;;;Y;SMALL CLOSING TORTOISE SHELL BRACKET;;;;
+ FE5F;SMALL NUMBER SIGN;Po;0;ET;<small> 0023;;;;N;;;;;
+ FE60;SMALL AMPERSAND;Po;0;ON;<small> 0026;;;;N;;;;;
+ FE61;SMALL ASTERISK;Po;0;ON;<small> 002A;;;;N;;;;;
+ FE62;SMALL PLUS SIGN;Sm;0;ES;<small> 002B;;;;N;;;;;
+ FE63;SMALL HYPHEN-MINUS;Pd;0;ES;<small> 002D;;;;N;;;;;
+ FE64;SMALL LESS-THAN SIGN;Sm;0;ON;<small> 003C;;;;Y;;;;;
+ FE65;SMALL GREATER-THAN SIGN;Sm;0;ON;<small> 003E;;;;Y;;;;;
+ FE66;SMALL EQUALS SIGN;Sm;0;ON;<small> 003D;;;;N;;;;;
+ FE68;SMALL REVERSE SOLIDUS;Po;0;ON;<small> 005C;;;;N;SMALL BACKSLASH;;;;
+ FE69;SMALL DOLLAR SIGN;Sc;0;ET;<small> 0024;;;;N;;;;;
+ FE6A;SMALL PERCENT SIGN;Po;0;ET;<small> 0025;;;;N;;;;;
+ FE6B;SMALL COMMERCIAL AT;Po;0;ON;<small> 0040;;;;N;;;;;
+ FE70;ARABIC FATHATAN ISOLATED FORM;Lo;0;AL;<isolated> 0020 064B;;;;N;ARABIC SPACING FATHATAN;;;;
+ FE71;ARABIC TATWEEL WITH FATHATAN ABOVE;Lo;0;AL;<medial> 0640 064B;;;;N;ARABIC FATHATAN ON TATWEEL;;;;
+ FE72;ARABIC DAMMATAN ISOLATED FORM;Lo;0;AL;<isolated> 0020 064C;;;;N;ARABIC SPACING DAMMATAN;;;;
+ FE73;ARABIC TAIL FRAGMENT;Lo;0;AL;;;;;N;;;;;
+ FE74;ARABIC KASRATAN ISOLATED FORM;Lo;0;AL;<isolated> 0020 064D;;;;N;ARABIC SPACING KASRATAN;;;;
+ FE76;ARABIC FATHA ISOLATED FORM;Lo;0;AL;<isolated> 0020 064E;;;;N;ARABIC SPACING FATHAH;;;;
+ FE77;ARABIC FATHA MEDIAL FORM;Lo;0;AL;<medial> 0640 064E;;;;N;ARABIC FATHAH ON TATWEEL;;;;
+ FE78;ARABIC DAMMA ISOLATED FORM;Lo;0;AL;<isolated> 0020 064F;;;;N;ARABIC SPACING DAMMAH;;;;
+ FE79;ARABIC DAMMA MEDIAL FORM;Lo;0;AL;<medial> 0640 064F;;;;N;ARABIC DAMMAH ON TATWEEL;;;;
+ FE7A;ARABIC KASRA ISOLATED FORM;Lo;0;AL;<isolated> 0020 0650;;;;N;ARABIC SPACING KASRAH;;;;
+ FE7B;ARABIC KASRA MEDIAL FORM;Lo;0;AL;<medial> 0640 0650;;;;N;ARABIC KASRAH ON TATWEEL;;;;
+ FE7C;ARABIC SHADDA ISOLATED FORM;Lo;0;AL;<isolated> 0020 0651;;;;N;ARABIC SPACING SHADDAH;;;;
+ FE7D;ARABIC SHADDA MEDIAL FORM;Lo;0;AL;<medial> 0640 0651;;;;N;ARABIC SHADDAH ON TATWEEL;;;;
+ FE7E;ARABIC SUKUN ISOLATED FORM;Lo;0;AL;<isolated> 0020 0652;;;;N;ARABIC SPACING SUKUN;;;;
+ FE7F;ARABIC SUKUN MEDIAL FORM;Lo;0;AL;<medial> 0640 0652;;;;N;ARABIC SUKUN ON TATWEEL;;;;
+ FE80;ARABIC LETTER HAMZA ISOLATED FORM;Lo;0;AL;<isolated> 0621;;;;N;GLYPH FOR ISOLATE ARABIC HAMZAH;;;;
+ FE81;ARABIC LETTER ALEF WITH MADDA ABOVE ISOLATED FORM;Lo;0;AL;<isolated> 0622;;;;N;GLYPH FOR ISOLATE ARABIC MADDAH ON ALEF;;;;
+ FE82;ARABIC LETTER ALEF WITH MADDA ABOVE FINAL FORM;Lo;0;AL;<final> 0622;;;;N;GLYPH FOR FINAL ARABIC MADDAH ON ALEF;;;;
+ FE83;ARABIC LETTER ALEF WITH HAMZA ABOVE ISOLATED FORM;Lo;0;AL;<isolated> 0623;;;;N;GLYPH FOR ISOLATE ARABIC HAMZAH ON ALEF;;;;
+ FE84;ARABIC LETTER ALEF WITH HAMZA ABOVE FINAL FORM;Lo;0;AL;<final> 0623;;;;N;GLYPH FOR FINAL ARABIC HAMZAH ON ALEF;;;;
+ FE85;ARABIC LETTER WAW WITH HAMZA ABOVE ISOLATED FORM;Lo;0;AL;<isolated> 0624;;;;N;GLYPH FOR ISOLATE ARABIC HAMZAH ON WAW;;;;
+ FE86;ARABIC LETTER WAW WITH HAMZA ABOVE FINAL FORM;Lo;0;AL;<final> 0624;;;;N;GLYPH FOR FINAL ARABIC HAMZAH ON WAW;;;;
+ FE87;ARABIC LETTER ALEF WITH HAMZA BELOW ISOLATED FORM;Lo;0;AL;<isolated> 0625;;;;N;GLYPH FOR ISOLATE ARABIC HAMZAH UNDER ALEF;;;;
+ FE88;ARABIC LETTER ALEF WITH HAMZA BELOW FINAL FORM;Lo;0;AL;<final> 0625;;;;N;GLYPH FOR FINAL ARABIC HAMZAH UNDER ALEF;;;;
+ FE89;ARABIC LETTER YEH WITH HAMZA ABOVE ISOLATED FORM;Lo;0;AL;<isolated> 0626;;;;N;GLYPH FOR ISOLATE ARABIC HAMZAH ON YA;;;;
+ FE8A;ARABIC LETTER YEH WITH HAMZA ABOVE FINAL FORM;Lo;0;AL;<final> 0626;;;;N;GLYPH FOR FINAL ARABIC HAMZAH ON YA;;;;
+ FE8B;ARABIC LETTER YEH WITH HAMZA ABOVE INITIAL FORM;Lo;0;AL;<initial> 0626;;;;N;GLYPH FOR INITIAL ARABIC HAMZAH ON YA;;;;
+ FE8C;ARABIC LETTER YEH WITH HAMZA ABOVE MEDIAL FORM;Lo;0;AL;<medial> 0626;;;;N;GLYPH FOR MEDIAL ARABIC HAMZAH ON YA;;;;
+ FE8D;ARABIC LETTER ALEF ISOLATED FORM;Lo;0;AL;<isolated> 0627;;;;N;GLYPH FOR ISOLATE ARABIC ALEF;;;;
+ FE8E;ARABIC LETTER ALEF FINAL FORM;Lo;0;AL;<final> 0627;;;;N;GLYPH FOR FINAL ARABIC ALEF;;;;
+ FE8F;ARABIC LETTER BEH ISOLATED FORM;Lo;0;AL;<isolated> 0628;;;;N;GLYPH FOR ISOLATE ARABIC BAA;;;;
+ FE90;ARABIC LETTER BEH FINAL FORM;Lo;0;AL;<final> 0628;;;;N;GLYPH FOR FINAL ARABIC BAA;;;;
+ FE91;ARABIC LETTER BEH INITIAL FORM;Lo;0;AL;<initial> 0628;;;;N;GLYPH FOR INITIAL ARABIC BAA;;;;
+ FE92;ARABIC LETTER BEH MEDIAL FORM;Lo;0;AL;<medial> 0628;;;;N;GLYPH FOR MEDIAL ARABIC BAA;;;;
+ FE93;ARABIC LETTER TEH MARBUTA ISOLATED FORM;Lo;0;AL;<isolated> 0629;;;;N;GLYPH FOR ISOLATE ARABIC TAA MARBUTAH;;;;
+ FE94;ARABIC LETTER TEH MARBUTA FINAL FORM;Lo;0;AL;<final> 0629;;;;N;GLYPH FOR FINAL ARABIC TAA MARBUTAH;;;;
+ FE95;ARABIC LETTER TEH ISOLATED FORM;Lo;0;AL;<isolated> 062A;;;;N;GLYPH FOR ISOLATE ARABIC TAA;;;;
+ FE96;ARABIC LETTER TEH FINAL FORM;Lo;0;AL;<final> 062A;;;;N;GLYPH FOR FINAL ARABIC TAA;;;;
+ FE97;ARABIC LETTER TEH INITIAL FORM;Lo;0;AL;<initial> 062A;;;;N;GLYPH FOR INITIAL ARABIC TAA;;;;
+ FE98;ARABIC LETTER TEH MEDIAL FORM;Lo;0;AL;<medial> 062A;;;;N;GLYPH FOR MEDIAL ARABIC TAA;;;;
+ FE99;ARABIC LETTER THEH ISOLATED FORM;Lo;0;AL;<isolated> 062B;;;;N;GLYPH FOR ISOLATE ARABIC THAA;;;;
+ FE9A;ARABIC LETTER THEH FINAL FORM;Lo;0;AL;<final> 062B;;;;N;GLYPH FOR FINAL ARABIC THAA;;;;
+ FE9B;ARABIC LETTER THEH INITIAL FORM;Lo;0;AL;<initial> 062B;;;;N;GLYPH FOR INITIAL ARABIC THAA;;;;
+ FE9C;ARABIC LETTER THEH MEDIAL FORM;Lo;0;AL;<medial> 062B;;;;N;GLYPH FOR MEDIAL ARABIC THAA;;;;
+ FE9D;ARABIC LETTER JEEM ISOLATED FORM;Lo;0;AL;<isolated> 062C;;;;N;GLYPH FOR ISOLATE ARABIC JEEM;;;;
+ FE9E;ARABIC LETTER JEEM FINAL FORM;Lo;0;AL;<final> 062C;;;;N;GLYPH FOR FINAL ARABIC JEEM;;;;
+ FE9F;ARABIC LETTER JEEM INITIAL FORM;Lo;0;AL;<initial> 062C;;;;N;GLYPH FOR INITIAL ARABIC JEEM;;;;
+ FEA0;ARABIC LETTER JEEM MEDIAL FORM;Lo;0;AL;<medial> 062C;;;;N;GLYPH FOR MEDIAL ARABIC JEEM;;;;
+ FEA1;ARABIC LETTER HAH ISOLATED FORM;Lo;0;AL;<isolated> 062D;;;;N;GLYPH FOR ISOLATE ARABIC HAA;;;;
+ FEA2;ARABIC LETTER HAH FINAL FORM;Lo;0;AL;<final> 062D;;;;N;GLYPH FOR FINAL ARABIC HAA;;;;
+ FEA3;ARABIC LETTER HAH INITIAL FORM;Lo;0;AL;<initial> 062D;;;;N;GLYPH FOR INITIAL ARABIC HAA;;;;
+ FEA4;ARABIC LETTER HAH MEDIAL FORM;Lo;0;AL;<medial> 062D;;;;N;GLYPH FOR MEDIAL ARABIC HAA;;;;
+ FEA5;ARABIC LETTER KHAH ISOLATED FORM;Lo;0;AL;<isolated> 062E;;;;N;GLYPH FOR ISOLATE ARABIC KHAA;;;;
+ FEA6;ARABIC LETTER KHAH FINAL FORM;Lo;0;AL;<final> 062E;;;;N;GLYPH FOR FINAL ARABIC KHAA;;;;
+ FEA7;ARABIC LETTER KHAH INITIAL FORM;Lo;0;AL;<initial> 062E;;;;N;GLYPH FOR INITIAL ARABIC KHAA;;;;
+ FEA8;ARABIC LETTER KHAH MEDIAL FORM;Lo;0;AL;<medial> 062E;;;;N;GLYPH FOR MEDIAL ARABIC KHAA;;;;
+ FEA9;ARABIC LETTER DAL ISOLATED FORM;Lo;0;AL;<isolated> 062F;;;;N;GLYPH FOR ISOLATE ARABIC DAL;;;;
+ FEAA;ARABIC LETTER DAL FINAL FORM;Lo;0;AL;<final> 062F;;;;N;GLYPH FOR FINAL ARABIC DAL;;;;
+ FEAB;ARABIC LETTER THAL ISOLATED FORM;Lo;0;AL;<isolated> 0630;;;;N;GLYPH FOR ISOLATE ARABIC THAL;;;;
+ FEAC;ARABIC LETTER THAL FINAL FORM;Lo;0;AL;<final> 0630;;;;N;GLYPH FOR FINAL ARABIC THAL;;;;
+ FEAD;ARABIC LETTER REH ISOLATED FORM;Lo;0;AL;<isolated> 0631;;;;N;GLYPH FOR ISOLATE ARABIC RA;;;;
+ FEAE;ARABIC LETTER REH FINAL FORM;Lo;0;AL;<final> 0631;;;;N;GLYPH FOR FINAL ARABIC RA;;;;
+ FEAF;ARABIC LETTER ZAIN ISOLATED FORM;Lo;0;AL;<isolated> 0632;;;;N;GLYPH FOR ISOLATE ARABIC ZAIN;;;;
+ FEB0;ARABIC LETTER ZAIN FINAL FORM;Lo;0;AL;<final> 0632;;;;N;GLYPH FOR FINAL ARABIC ZAIN;;;;
+ FEB1;ARABIC LETTER SEEN ISOLATED FORM;Lo;0;AL;<isolated> 0633;;;;N;GLYPH FOR ISOLATE ARABIC SEEN;;;;
+ FEB2;ARABIC LETTER SEEN FINAL FORM;Lo;0;AL;<final> 0633;;;;N;GLYPH FOR FINAL ARABIC SEEN;;;;
+ FEB3;ARABIC LETTER SEEN INITIAL FORM;Lo;0;AL;<initial> 0633;;;;N;GLYPH FOR INITIAL ARABIC SEEN;;;;
+ FEB4;ARABIC LETTER SEEN MEDIAL FORM;Lo;0;AL;<medial> 0633;;;;N;GLYPH FOR MEDIAL ARABIC SEEN;;;;
+ FEB5;ARABIC LETTER SHEEN ISOLATED FORM;Lo;0;AL;<isolated> 0634;;;;N;GLYPH FOR ISOLATE ARABIC SHEEN;;;;
+ FEB6;ARABIC LETTER SHEEN FINAL FORM;Lo;0;AL;<final> 0634;;;;N;GLYPH FOR FINAL ARABIC SHEEN;;;;
+ FEB7;ARABIC LETTER SHEEN INITIAL FORM;Lo;0;AL;<initial> 0634;;;;N;GLYPH FOR INITIAL ARABIC SHEEN;;;;
+ FEB8;ARABIC LETTER SHEEN MEDIAL FORM;Lo;0;AL;<medial> 0634;;;;N;GLYPH FOR MEDIAL ARABIC SHEEN;;;;
+ FEB9;ARABIC LETTER SAD ISOLATED FORM;Lo;0;AL;<isolated> 0635;;;;N;GLYPH FOR ISOLATE ARABIC SAD;;;;
+ FEBA;ARABIC LETTER SAD FINAL FORM;Lo;0;AL;<final> 0635;;;;N;GLYPH FOR FINAL ARABIC SAD;;;;
+ FEBB;ARABIC LETTER SAD INITIAL FORM;Lo;0;AL;<initial> 0635;;;;N;GLYPH FOR INITIAL ARABIC SAD;;;;
+ FEBC;ARABIC LETTER SAD MEDIAL FORM;Lo;0;AL;<medial> 0635;;;;N;GLYPH FOR MEDIAL ARABIC SAD;;;;
+ FEBD;ARABIC LETTER DAD ISOLATED FORM;Lo;0;AL;<isolated> 0636;;;;N;GLYPH FOR ISOLATE ARABIC DAD;;;;
+ FEBE;ARABIC LETTER DAD FINAL FORM;Lo;0;AL;<final> 0636;;;;N;GLYPH FOR FINAL ARABIC DAD;;;;
+ FEBF;ARABIC LETTER DAD INITIAL FORM;Lo;0;AL;<initial> 0636;;;;N;GLYPH FOR INITIAL ARABIC DAD;;;;
+ FEC0;ARABIC LETTER DAD MEDIAL FORM;Lo;0;AL;<medial> 0636;;;;N;GLYPH FOR MEDIAL ARABIC DAD;;;;
+ FEC1;ARABIC LETTER TAH ISOLATED FORM;Lo;0;AL;<isolated> 0637;;;;N;GLYPH FOR ISOLATE ARABIC TAH;;;;
+ FEC2;ARABIC LETTER TAH FINAL FORM;Lo;0;AL;<final> 0637;;;;N;GLYPH FOR FINAL ARABIC TAH;;;;
+ FEC3;ARABIC LETTER TAH INITIAL FORM;Lo;0;AL;<initial> 0637;;;;N;GLYPH FOR INITIAL ARABIC TAH;;;;
+ FEC4;ARABIC LETTER TAH MEDIAL FORM;Lo;0;AL;<medial> 0637;;;;N;GLYPH FOR MEDIAL ARABIC TAH;;;;
+ FEC5;ARABIC LETTER ZAH ISOLATED FORM;Lo;0;AL;<isolated> 0638;;;;N;GLYPH FOR ISOLATE ARABIC DHAH;;;;
+ FEC6;ARABIC LETTER ZAH FINAL FORM;Lo;0;AL;<final> 0638;;;;N;GLYPH FOR FINAL ARABIC DHAH;;;;
+ FEC7;ARABIC LETTER ZAH INITIAL FORM;Lo;0;AL;<initial> 0638;;;;N;GLYPH FOR INITIAL ARABIC DHAH;;;;
+ FEC8;ARABIC LETTER ZAH MEDIAL FORM;Lo;0;AL;<medial> 0638;;;;N;GLYPH FOR MEDIAL ARABIC DHAH;;;;
+ FEC9;ARABIC LETTER AIN ISOLATED FORM;Lo;0;AL;<isolated> 0639;;;;N;GLYPH FOR ISOLATE ARABIC AIN;;;;
+ FECA;ARABIC LETTER AIN FINAL FORM;Lo;0;AL;<final> 0639;;;;N;GLYPH FOR FINAL ARABIC AIN;;;;
+ FECB;ARABIC LETTER AIN INITIAL FORM;Lo;0;AL;<initial> 0639;;;;N;GLYPH FOR INITIAL ARABIC AIN;;;;
+ FECC;ARABIC LETTER AIN MEDIAL FORM;Lo;0;AL;<medial> 0639;;;;N;GLYPH FOR MEDIAL ARABIC AIN;;;;
+ FECD;ARABIC LETTER GHAIN ISOLATED FORM;Lo;0;AL;<isolated> 063A;;;;N;GLYPH FOR ISOLATE ARABIC GHAIN;;;;
+ FECE;ARABIC LETTER GHAIN FINAL FORM;Lo;0;AL;<final> 063A;;;;N;GLYPH FOR FINAL ARABIC GHAIN;;;;
+ FECF;ARABIC LETTER GHAIN INITIAL FORM;Lo;0;AL;<initial> 063A;;;;N;GLYPH FOR INITIAL ARABIC GHAIN;;;;
+ FED0;ARABIC LETTER GHAIN MEDIAL FORM;Lo;0;AL;<medial> 063A;;;;N;GLYPH FOR MEDIAL ARABIC GHAIN;;;;
+ FED1;ARABIC LETTER FEH ISOLATED FORM;Lo;0;AL;<isolated> 0641;;;;N;GLYPH FOR ISOLATE ARABIC FA;;;;
+ FED2;ARABIC LETTER FEH FINAL FORM;Lo;0;AL;<final> 0641;;;;N;GLYPH FOR FINAL ARABIC FA;;;;
+ FED3;ARABIC LETTER FEH INITIAL FORM;Lo;0;AL;<initial> 0641;;;;N;GLYPH FOR INITIAL ARABIC FA;;;;
+ FED4;ARABIC LETTER FEH MEDIAL FORM;Lo;0;AL;<medial> 0641;;;;N;GLYPH FOR MEDIAL ARABIC FA;;;;
+ FED5;ARABIC LETTER QAF ISOLATED FORM;Lo;0;AL;<isolated> 0642;;;;N;GLYPH FOR ISOLATE ARABIC QAF;;;;
+ FED6;ARABIC LETTER QAF FINAL FORM;Lo;0;AL;<final> 0642;;;;N;GLYPH FOR FINAL ARABIC QAF;;;;
+ FED7;ARABIC LETTER QAF INITIAL FORM;Lo;0;AL;<initial> 0642;;;;N;GLYPH FOR INITIAL ARABIC QAF;;;;
+ FED8;ARABIC LETTER QAF MEDIAL FORM;Lo;0;AL;<medial> 0642;;;;N;GLYPH FOR MEDIAL ARABIC QAF;;;;
+ FED9;ARABIC LETTER KAF ISOLATED FORM;Lo;0;AL;<isolated> 0643;;;;N;GLYPH FOR ISOLATE ARABIC CAF;;;;
+ FEDA;ARABIC LETTER KAF FINAL FORM;Lo;0;AL;<final> 0643;;;;N;GLYPH FOR FINAL ARABIC CAF;;;;
+ FEDB;ARABIC LETTER KAF INITIAL FORM;Lo;0;AL;<initial> 0643;;;;N;GLYPH FOR INITIAL ARABIC CAF;;;;
+ FEDC;ARABIC LETTER KAF MEDIAL FORM;Lo;0;AL;<medial> 0643;;;;N;GLYPH FOR MEDIAL ARABIC CAF;;;;
+ FEDD;ARABIC LETTER LAM ISOLATED FORM;Lo;0;AL;<isolated> 0644;;;;N;GLYPH FOR ISOLATE ARABIC LAM;;;;
+ FEDE;ARABIC LETTER LAM FINAL FORM;Lo;0;AL;<final> 0644;;;;N;GLYPH FOR FINAL ARABIC LAM;;;;
+ FEDF;ARABIC LETTER LAM INITIAL FORM;Lo;0;AL;<initial> 0644;;;;N;GLYPH FOR INITIAL ARABIC LAM;;;;
+ FEE0;ARABIC LETTER LAM MEDIAL FORM;Lo;0;AL;<medial> 0644;;;;N;GLYPH FOR MEDIAL ARABIC LAM;;;;
+ FEE1;ARABIC LETTER MEEM ISOLATED FORM;Lo;0;AL;<isolated> 0645;;;;N;GLYPH FOR ISOLATE ARABIC MEEM;;;;
+ FEE2;ARABIC LETTER MEEM FINAL FORM;Lo;0;AL;<final> 0645;;;;N;GLYPH FOR FINAL ARABIC MEEM;;;;
+ FEE3;ARABIC LETTER MEEM INITIAL FORM;Lo;0;AL;<initial> 0645;;;;N;GLYPH FOR INITIAL ARABIC MEEM;;;;
+ FEE4;ARABIC LETTER MEEM MEDIAL FORM;Lo;0;AL;<medial> 0645;;;;N;GLYPH FOR MEDIAL ARABIC MEEM;;;;
+ FEE5;ARABIC LETTER NOON ISOLATED FORM;Lo;0;AL;<isolated> 0646;;;;N;GLYPH FOR ISOLATE ARABIC NOON;;;;
+ FEE6;ARABIC LETTER NOON FINAL FORM;Lo;0;AL;<final> 0646;;;;N;GLYPH FOR FINAL ARABIC NOON;;;;
+ FEE7;ARABIC LETTER NOON INITIAL FORM;Lo;0;AL;<initial> 0646;;;;N;GLYPH FOR INITIAL ARABIC NOON;;;;
+ FEE8;ARABIC LETTER NOON MEDIAL FORM;Lo;0;AL;<medial> 0646;;;;N;GLYPH FOR MEDIAL ARABIC NOON;;;;
+ FEE9;ARABIC LETTER HEH ISOLATED FORM;Lo;0;AL;<isolated> 0647;;;;N;GLYPH FOR ISOLATE ARABIC HA;;;;
+ FEEA;ARABIC LETTER HEH FINAL FORM;Lo;0;AL;<final> 0647;;;;N;GLYPH FOR FINAL ARABIC HA;;;;
+ FEEB;ARABIC LETTER HEH INITIAL FORM;Lo;0;AL;<initial> 0647;;;;N;GLYPH FOR INITIAL ARABIC HA;;;;
+ FEEC;ARABIC LETTER HEH MEDIAL FORM;Lo;0;AL;<medial> 0647;;;;N;GLYPH FOR MEDIAL ARABIC HA;;;;
+ FEED;ARABIC LETTER WAW ISOLATED FORM;Lo;0;AL;<isolated> 0648;;;;N;GLYPH FOR ISOLATE ARABIC WAW;;;;
+ FEEE;ARABIC LETTER WAW FINAL FORM;Lo;0;AL;<final> 0648;;;;N;GLYPH FOR FINAL ARABIC WAW;;;;
+ FEEF;ARABIC LETTER ALEF MAKSURA ISOLATED FORM;Lo;0;AL;<isolated> 0649;;;;N;GLYPH FOR ISOLATE ARABIC ALEF MAQSURAH;;;;
+ FEF0;ARABIC LETTER ALEF MAKSURA FINAL FORM;Lo;0;AL;<final> 0649;;;;N;GLYPH FOR FINAL ARABIC ALEF MAQSURAH;;;;
+ FEF1;ARABIC LETTER YEH ISOLATED FORM;Lo;0;AL;<isolated> 064A;;;;N;GLYPH FOR ISOLATE ARABIC YA;;;;
+ FEF2;ARABIC LETTER YEH FINAL FORM;Lo;0;AL;<final> 064A;;;;N;GLYPH FOR FINAL ARABIC YA;;;;
+ FEF3;ARABIC LETTER YEH INITIAL FORM;Lo;0;AL;<initial> 064A;;;;N;GLYPH FOR INITIAL ARABIC YA;;;;
+ FEF4;ARABIC LETTER YEH MEDIAL FORM;Lo;0;AL;<medial> 064A;;;;N;GLYPH FOR MEDIAL ARABIC YA;;;;
+ FEF5;ARABIC LIGATURE LAM WITH ALEF WITH MADDA ABOVE ISOLATED FORM;Lo;0;AL;<isolated> 0644 0622;;;;N;GLYPH FOR ISOLATE ARABIC MADDAH ON LIGATURE LAM ALEF;;;;
+ FEF6;ARABIC LIGATURE LAM WITH ALEF WITH MADDA ABOVE FINAL FORM;Lo;0;AL;<final> 0644 0622;;;;N;GLYPH FOR FINAL ARABIC MADDAH ON LIGATURE LAM ALEF;;;;
+ FEF7;ARABIC LIGATURE LAM WITH ALEF WITH HAMZA ABOVE ISOLATED FORM;Lo;0;AL;<isolated> 0644 0623;;;;N;GLYPH FOR ISOLATE ARABIC HAMZAH ON LIGATURE LAM ALEF;;;;
+ FEF8;ARABIC LIGATURE LAM WITH ALEF WITH HAMZA ABOVE FINAL FORM;Lo;0;AL;<final> 0644 0623;;;;N;GLYPH FOR FINAL ARABIC HAMZAH ON LIGATURE LAM ALEF;;;;
+ FEF9;ARABIC LIGATURE LAM WITH ALEF WITH HAMZA BELOW ISOLATED FORM;Lo;0;AL;<isolated> 0644 0625;;;;N;GLYPH FOR ISOLATE ARABIC HAMZAH UNDER LIGATURE LAM ALEF;;;;
+ FEFA;ARABIC LIGATURE LAM WITH ALEF WITH HAMZA BELOW FINAL FORM;Lo;0;AL;<final> 0644 0625;;;;N;GLYPH FOR FINAL ARABIC HAMZAH UNDER LIGATURE LAM ALEF;;;;
+ FEFB;ARABIC LIGATURE LAM WITH ALEF ISOLATED FORM;Lo;0;AL;<isolated> 0644 0627;;;;N;GLYPH FOR ISOLATE ARABIC LIGATURE LAM ALEF;;;;
+ FEFC;ARABIC LIGATURE LAM WITH ALEF FINAL FORM;Lo;0;AL;<final> 0644 0627;;;;N;GLYPH FOR FINAL ARABIC LIGATURE LAM ALEF;;;;
+ FEFF;ZERO WIDTH NO-BREAK SPACE;Cf;0;BN;;;;;N;BYTE ORDER MARK;;;;
+ FF01;FULLWIDTH EXCLAMATION MARK;Po;0;ON;<wide> 0021;;;;N;;;;;
+ FF02;FULLWIDTH QUOTATION MARK;Po;0;ON;<wide> 0022;;;;N;;;;;
+ FF03;FULLWIDTH NUMBER SIGN;Po;0;ET;<wide> 0023;;;;N;;;;;
+ FF04;FULLWIDTH DOLLAR SIGN;Sc;0;ET;<wide> 0024;;;;N;;;;;
+ FF05;FULLWIDTH PERCENT SIGN;Po;0;ET;<wide> 0025;;;;N;;;;;
+ FF06;FULLWIDTH AMPERSAND;Po;0;ON;<wide> 0026;;;;N;;;;;
+ FF07;FULLWIDTH APOSTROPHE;Po;0;ON;<wide> 0027;;;;N;;;;;
+ FF08;FULLWIDTH LEFT PARENTHESIS;Ps;0;ON;<wide> 0028;;;;Y;FULLWIDTH OPENING PARENTHESIS;;;;
+ FF09;FULLWIDTH RIGHT PARENTHESIS;Pe;0;ON;<wide> 0029;;;;Y;FULLWIDTH CLOSING PARENTHESIS;;;;
+ FF0A;FULLWIDTH ASTERISK;Po;0;ON;<wide> 002A;;;;N;;;;;
+ FF0B;FULLWIDTH PLUS SIGN;Sm;0;ES;<wide> 002B;;;;N;;;;;
+ FF0C;FULLWIDTH COMMA;Po;0;CS;<wide> 002C;;;;N;;;;;
+ FF0D;FULLWIDTH HYPHEN-MINUS;Pd;0;ES;<wide> 002D;;;;N;;;;;
+ FF0E;FULLWIDTH FULL STOP;Po;0;CS;<wide> 002E;;;;N;FULLWIDTH PERIOD;;;;
+ FF0F;FULLWIDTH SOLIDUS;Po;0;CS;<wide> 002F;;;;N;FULLWIDTH SLASH;;;;
+ FF10;FULLWIDTH DIGIT ZERO;Nd;0;EN;<wide> 0030;0;0;0;N;;;;;
+ FF11;FULLWIDTH DIGIT ONE;Nd;0;EN;<wide> 0031;1;1;1;N;;;;;
+ FF12;FULLWIDTH DIGIT TWO;Nd;0;EN;<wide> 0032;2;2;2;N;;;;;
+ FF13;FULLWIDTH DIGIT THREE;Nd;0;EN;<wide> 0033;3;3;3;N;;;;;
+ FF14;FULLWIDTH DIGIT FOUR;Nd;0;EN;<wide> 0034;4;4;4;N;;;;;
+ FF15;FULLWIDTH DIGIT FIVE;Nd;0;EN;<wide> 0035;5;5;5;N;;;;;
+ FF16;FULLWIDTH DIGIT SIX;Nd;0;EN;<wide> 0036;6;6;6;N;;;;;
+ FF17;FULLWIDTH DIGIT SEVEN;Nd;0;EN;<wide> 0037;7;7;7;N;;;;;
+ FF18;FULLWIDTH DIGIT EIGHT;Nd;0;EN;<wide> 0038;8;8;8;N;;;;;
+ FF19;FULLWIDTH DIGIT NINE;Nd;0;EN;<wide> 0039;9;9;9;N;;;;;
+ FF1A;FULLWIDTH COLON;Po;0;CS;<wide> 003A;;;;N;;;;;
+ FF1B;FULLWIDTH SEMICOLON;Po;0;ON;<wide> 003B;;;;N;;;;;
+ FF1C;FULLWIDTH LESS-THAN SIGN;Sm;0;ON;<wide> 003C;;;;Y;;;;;
+ FF1D;FULLWIDTH EQUALS SIGN;Sm;0;ON;<wide> 003D;;;;N;;;;;
+ FF1E;FULLWIDTH GREATER-THAN SIGN;Sm;0;ON;<wide> 003E;;;;Y;;;;;
+ FF1F;FULLWIDTH QUESTION MARK;Po;0;ON;<wide> 003F;;;;N;;;;;
+ FF20;FULLWIDTH COMMERCIAL AT;Po;0;ON;<wide> 0040;;;;N;;;;;
+ FF21;FULLWIDTH LATIN CAPITAL LETTER A;Lu;0;L;<wide> 0041;;;;N;;;;FF41;
+ FF22;FULLWIDTH LATIN CAPITAL LETTER B;Lu;0;L;<wide> 0042;;;;N;;;;FF42;
+ FF23;FULLWIDTH LATIN CAPITAL LETTER C;Lu;0;L;<wide> 0043;;;;N;;;;FF43;
+ FF24;FULLWIDTH LATIN CAPITAL LETTER D;Lu;0;L;<wide> 0044;;;;N;;;;FF44;
+ FF25;FULLWIDTH LATIN CAPITAL LETTER E;Lu;0;L;<wide> 0045;;;;N;;;;FF45;
+ FF26;FULLWIDTH LATIN CAPITAL LETTER F;Lu;0;L;<wide> 0046;;;;N;;;;FF46;
+ FF27;FULLWIDTH LATIN CAPITAL LETTER G;Lu;0;L;<wide> 0047;;;;N;;;;FF47;
+ FF28;FULLWIDTH LATIN CAPITAL LETTER H;Lu;0;L;<wide> 0048;;;;N;;;;FF48;
+ FF29;FULLWIDTH LATIN CAPITAL LETTER I;Lu;0;L;<wide> 0049;;;;N;;;;FF49;
+ FF2A;FULLWIDTH LATIN CAPITAL LETTER J;Lu;0;L;<wide> 004A;;;;N;;;;FF4A;
+ FF2B;FULLWIDTH LATIN CAPITAL LETTER K;Lu;0;L;<wide> 004B;;;;N;;;;FF4B;
+ FF2C;FULLWIDTH LATIN CAPITAL LETTER L;Lu;0;L;<wide> 004C;;;;N;;;;FF4C;
+ FF2D;FULLWIDTH LATIN CAPITAL LETTER M;Lu;0;L;<wide> 004D;;;;N;;;;FF4D;
+ FF2E;FULLWIDTH LATIN CAPITAL LETTER N;Lu;0;L;<wide> 004E;;;;N;;;;FF4E;
+ FF2F;FULLWIDTH LATIN CAPITAL LETTER O;Lu;0;L;<wide> 004F;;;;N;;;;FF4F;
+ FF30;FULLWIDTH LATIN CAPITAL LETTER P;Lu;0;L;<wide> 0050;;;;N;;;;FF50;
+ FF31;FULLWIDTH LATIN CAPITAL LETTER Q;Lu;0;L;<wide> 0051;;;;N;;;;FF51;
+ FF32;FULLWIDTH LATIN CAPITAL LETTER R;Lu;0;L;<wide> 0052;;;;N;;;;FF52;
+ FF33;FULLWIDTH LATIN CAPITAL LETTER S;Lu;0;L;<wide> 0053;;;;N;;;;FF53;
+ FF34;FULLWIDTH LATIN CAPITAL LETTER T;Lu;0;L;<wide> 0054;;;;N;;;;FF54;
+ FF35;FULLWIDTH LATIN CAPITAL LETTER U;Lu;0;L;<wide> 0055;;;;N;;;;FF55;
+ FF36;FULLWIDTH LATIN CAPITAL LETTER V;Lu;0;L;<wide> 0056;;;;N;;;;FF56;
+ FF37;FULLWIDTH LATIN CAPITAL LETTER W;Lu;0;L;<wide> 0057;;;;N;;;;FF57;
+ FF38;FULLWIDTH LATIN CAPITAL LETTER X;Lu;0;L;<wide> 0058;;;;N;;;;FF58;
+ FF39;FULLWIDTH LATIN CAPITAL LETTER Y;Lu;0;L;<wide> 0059;;;;N;;;;FF59;
+ FF3A;FULLWIDTH LATIN CAPITAL LETTER Z;Lu;0;L;<wide> 005A;;;;N;;;;FF5A;
+ FF3B;FULLWIDTH LEFT SQUARE BRACKET;Ps;0;ON;<wide> 005B;;;;Y;FULLWIDTH OPENING SQUARE BRACKET;;;;
+ FF3C;FULLWIDTH REVERSE SOLIDUS;Po;0;ON;<wide> 005C;;;;N;FULLWIDTH BACKSLASH;;;;
+ FF3D;FULLWIDTH RIGHT SQUARE BRACKET;Pe;0;ON;<wide> 005D;;;;Y;FULLWIDTH CLOSING SQUARE BRACKET;;;;
+ FF3E;FULLWIDTH CIRCUMFLEX ACCENT;Sk;0;ON;<wide> 005E;;;;N;FULLWIDTH SPACING CIRCUMFLEX;;;;
+ FF3F;FULLWIDTH LOW LINE;Pc;0;ON;<wide> 005F;;;;N;FULLWIDTH SPACING UNDERSCORE;;;;
+ FF40;FULLWIDTH GRAVE ACCENT;Sk;0;ON;<wide> 0060;;;;N;FULLWIDTH SPACING GRAVE;;;;
+ FF41;FULLWIDTH LATIN SMALL LETTER A;Ll;0;L;<wide> 0061;;;;N;;;FF21;;FF21
+ FF42;FULLWIDTH LATIN SMALL LETTER B;Ll;0;L;<wide> 0062;;;;N;;;FF22;;FF22
+ FF43;FULLWIDTH LATIN SMALL LETTER C;Ll;0;L;<wide> 0063;;;;N;;;FF23;;FF23
+ FF44;FULLWIDTH LATIN SMALL LETTER D;Ll;0;L;<wide> 0064;;;;N;;;FF24;;FF24
+ FF45;FULLWIDTH LATIN SMALL LETTER E;Ll;0;L;<wide> 0065;;;;N;;;FF25;;FF25
+ FF46;FULLWIDTH LATIN SMALL LETTER F;Ll;0;L;<wide> 0066;;;;N;;;FF26;;FF26
+ FF47;FULLWIDTH LATIN SMALL LETTER G;Ll;0;L;<wide> 0067;;;;N;;;FF27;;FF27
+ FF48;FULLWIDTH LATIN SMALL LETTER H;Ll;0;L;<wide> 0068;;;;N;;;FF28;;FF28
+ FF49;FULLWIDTH LATIN SMALL LETTER I;Ll;0;L;<wide> 0069;;;;N;;;FF29;;FF29
+ FF4A;FULLWIDTH LATIN SMALL LETTER J;Ll;0;L;<wide> 006A;;;;N;;;FF2A;;FF2A
+ FF4B;FULLWIDTH LATIN SMALL LETTER K;Ll;0;L;<wide> 006B;;;;N;;;FF2B;;FF2B
+ FF4C;FULLWIDTH LATIN SMALL LETTER L;Ll;0;L;<wide> 006C;;;;N;;;FF2C;;FF2C
+ FF4D;FULLWIDTH LATIN SMALL LETTER M;Ll;0;L;<wide> 006D;;;;N;;;FF2D;;FF2D
+ FF4E;FULLWIDTH LATIN SMALL LETTER N;Ll;0;L;<wide> 006E;;;;N;;;FF2E;;FF2E
+ FF4F;FULLWIDTH LATIN SMALL LETTER O;Ll;0;L;<wide> 006F;;;;N;;;FF2F;;FF2F
+ FF50;FULLWIDTH LATIN SMALL LETTER P;Ll;0;L;<wide> 0070;;;;N;;;FF30;;FF30
+ FF51;FULLWIDTH LATIN SMALL LETTER Q;Ll;0;L;<wide> 0071;;;;N;;;FF31;;FF31
+ FF52;FULLWIDTH LATIN SMALL LETTER R;Ll;0;L;<wide> 0072;;;;N;;;FF32;;FF32
+ FF53;FULLWIDTH LATIN SMALL LETTER S;Ll;0;L;<wide> 0073;;;;N;;;FF33;;FF33
+ FF54;FULLWIDTH LATIN SMALL LETTER T;Ll;0;L;<wide> 0074;;;;N;;;FF34;;FF34
+ FF55;FULLWIDTH LATIN SMALL LETTER U;Ll;0;L;<wide> 0075;;;;N;;;FF35;;FF35
+ FF56;FULLWIDTH LATIN SMALL LETTER V;Ll;0;L;<wide> 0076;;;;N;;;FF36;;FF36
+ FF57;FULLWIDTH LATIN SMALL LETTER W;Ll;0;L;<wide> 0077;;;;N;;;FF37;;FF37
+ FF58;FULLWIDTH LATIN SMALL LETTER X;Ll;0;L;<wide> 0078;;;;N;;;FF38;;FF38
+ FF59;FULLWIDTH LATIN SMALL LETTER Y;Ll;0;L;<wide> 0079;;;;N;;;FF39;;FF39
+ FF5A;FULLWIDTH LATIN SMALL LETTER Z;Ll;0;L;<wide> 007A;;;;N;;;FF3A;;FF3A
+ FF5B;FULLWIDTH LEFT CURLY BRACKET;Ps;0;ON;<wide> 007B;;;;Y;FULLWIDTH OPENING CURLY BRACKET;;;;
+ FF5C;FULLWIDTH VERTICAL LINE;Sm;0;ON;<wide> 007C;;;;N;FULLWIDTH VERTICAL BAR;;;;
+ FF5D;FULLWIDTH RIGHT CURLY BRACKET;Pe;0;ON;<wide> 007D;;;;Y;FULLWIDTH CLOSING CURLY BRACKET;;;;
+ FF5E;FULLWIDTH TILDE;Sm;0;ON;<wide> 007E;;;;N;FULLWIDTH SPACING TILDE;;;;
+ FF5F;FULLWIDTH LEFT WHITE PARENTHESIS;Ps;0;ON;<wide> 2985;;;;Y;;;;;
+ FF60;FULLWIDTH RIGHT WHITE PARENTHESIS;Pe;0;ON;<wide> 2986;;;;Y;;;;;
+ FF61;HALFWIDTH IDEOGRAPHIC FULL STOP;Po;0;ON;<narrow> 3002;;;;N;HALFWIDTH IDEOGRAPHIC PERIOD;;;;
+ FF62;HALFWIDTH LEFT CORNER BRACKET;Ps;0;ON;<narrow> 300C;;;;Y;HALFWIDTH OPENING CORNER BRACKET;;;;
+ FF63;HALFWIDTH RIGHT CORNER BRACKET;Pe;0;ON;<narrow> 300D;;;;Y;HALFWIDTH CLOSING CORNER BRACKET;;;;
+ FF64;HALFWIDTH IDEOGRAPHIC COMMA;Po;0;ON;<narrow> 3001;;;;N;;;;;
+ FF65;HALFWIDTH KATAKANA MIDDLE DOT;Po;0;ON;<narrow> 30FB;;;;N;;;;;
+ FF66;HALFWIDTH KATAKANA LETTER WO;Lo;0;L;<narrow> 30F2;;;;N;;;;;
+ FF67;HALFWIDTH KATAKANA LETTER SMALL A;Lo;0;L;<narrow> 30A1;;;;N;;;;;
+ FF68;HALFWIDTH KATAKANA LETTER SMALL I;Lo;0;L;<narrow> 30A3;;;;N;;;;;
+ FF69;HALFWIDTH KATAKANA LETTER SMALL U;Lo;0;L;<narrow> 30A5;;;;N;;;;;
+ FF6A;HALFWIDTH KATAKANA LETTER SMALL E;Lo;0;L;<narrow> 30A7;;;;N;;;;;
+ FF6B;HALFWIDTH KATAKANA LETTER SMALL O;Lo;0;L;<narrow> 30A9;;;;N;;;;;
+ FF6C;HALFWIDTH KATAKANA LETTER SMALL YA;Lo;0;L;<narrow> 30E3;;;;N;;;;;
+ FF6D;HALFWIDTH KATAKANA LETTER SMALL YU;Lo;0;L;<narrow> 30E5;;;;N;;;;;
+ FF6E;HALFWIDTH KATAKANA LETTER SMALL YO;Lo;0;L;<narrow> 30E7;;;;N;;;;;
+ FF6F;HALFWIDTH KATAKANA LETTER SMALL TU;Lo;0;L;<narrow> 30C3;;;;N;;;;;
+ FF70;HALFWIDTH KATAKANA-HIRAGANA PROLONGED SOUND MARK;Lm;0;L;<narrow> 30FC;;;;N;;;;;
+ FF71;HALFWIDTH KATAKANA LETTER A;Lo;0;L;<narrow> 30A2;;;;N;;;;;
+ FF72;HALFWIDTH KATAKANA LETTER I;Lo;0;L;<narrow> 30A4;;;;N;;;;;
+ FF73;HALFWIDTH KATAKANA LETTER U;Lo;0;L;<narrow> 30A6;;;;N;;;;;
+ FF74;HALFWIDTH KATAKANA LETTER E;Lo;0;L;<narrow> 30A8;;;;N;;;;;
+ FF75;HALFWIDTH KATAKANA LETTER O;Lo;0;L;<narrow> 30AA;;;;N;;;;;
+ FF76;HALFWIDTH KATAKANA LETTER KA;Lo;0;L;<narrow> 30AB;;;;N;;;;;
+ FF77;HALFWIDTH KATAKANA LETTER KI;Lo;0;L;<narrow> 30AD;;;;N;;;;;
+ FF78;HALFWIDTH KATAKANA LETTER KU;Lo;0;L;<narrow> 30AF;;;;N;;;;;
+ FF79;HALFWIDTH KATAKANA LETTER KE;Lo;0;L;<narrow> 30B1;;;;N;;;;;
+ FF7A;HALFWIDTH KATAKANA LETTER KO;Lo;0;L;<narrow> 30B3;;;;N;;;;;
+ FF7B;HALFWIDTH KATAKANA LETTER SA;Lo;0;L;<narrow> 30B5;;;;N;;;;;
+ FF7C;HALFWIDTH KATAKANA LETTER SI;Lo;0;L;<narrow> 30B7;;;;N;;;;;
+ FF7D;HALFWIDTH KATAKANA LETTER SU;Lo;0;L;<narrow> 30B9;;;;N;;;;;
+ FF7E;HALFWIDTH KATAKANA LETTER SE;Lo;0;L;<narrow> 30BB;;;;N;;;;;
+ FF7F;HALFWIDTH KATAKANA LETTER SO;Lo;0;L;<narrow> 30BD;;;;N;;;;;
+ FF80;HALFWIDTH KATAKANA LETTER TA;Lo;0;L;<narrow> 30BF;;;;N;;;;;
+ FF81;HALFWIDTH KATAKANA LETTER TI;Lo;0;L;<narrow> 30C1;;;;N;;;;;
+ FF82;HALFWIDTH KATAKANA LETTER TU;Lo;0;L;<narrow> 30C4;;;;N;;;;;
+ FF83;HALFWIDTH KATAKANA LETTER TE;Lo;0;L;<narrow> 30C6;;;;N;;;;;
+ FF84;HALFWIDTH KATAKANA LETTER TO;Lo;0;L;<narrow> 30C8;;;;N;;;;;
+ FF85;HALFWIDTH KATAKANA LETTER NA;Lo;0;L;<narrow> 30CA;;;;N;;;;;
+ FF86;HALFWIDTH KATAKANA LETTER NI;Lo;0;L;<narrow> 30CB;;;;N;;;;;
+ FF87;HALFWIDTH KATAKANA LETTER NU;Lo;0;L;<narrow> 30CC;;;;N;;;;;
+ FF88;HALFWIDTH KATAKANA LETTER NE;Lo;0;L;<narrow> 30CD;;;;N;;;;;
+ FF89;HALFWIDTH KATAKANA LETTER NO;Lo;0;L;<narrow> 30CE;;;;N;;;;;
+ FF8A;HALFWIDTH KATAKANA LETTER HA;Lo;0;L;<narrow> 30CF;;;;N;;;;;
+ FF8B;HALFWIDTH KATAKANA LETTER HI;Lo;0;L;<narrow> 30D2;;;;N;;;;;
+ FF8C;HALFWIDTH KATAKANA LETTER HU;Lo;0;L;<narrow> 30D5;;;;N;;;;;
+ FF8D;HALFWIDTH KATAKANA LETTER HE;Lo;0;L;<narrow> 30D8;;;;N;;;;;
+ FF8E;HALFWIDTH KATAKANA LETTER HO;Lo;0;L;<narrow> 30DB;;;;N;;;;;
+ FF8F;HALFWIDTH KATAKANA LETTER MA;Lo;0;L;<narrow> 30DE;;;;N;;;;;
+ FF90;HALFWIDTH KATAKANA LETTER MI;Lo;0;L;<narrow> 30DF;;;;N;;;;;
+ FF91;HALFWIDTH KATAKANA LETTER MU;Lo;0;L;<narrow> 30E0;;;;N;;;;;
+ FF92;HALFWIDTH KATAKANA LETTER ME;Lo;0;L;<narrow> 30E1;;;;N;;;;;
+ FF93;HALFWIDTH KATAKANA LETTER MO;Lo;0;L;<narrow> 30E2;;;;N;;;;;
+ FF94;HALFWIDTH KATAKANA LETTER YA;Lo;0;L;<narrow> 30E4;;;;N;;;;;
+ FF95;HALFWIDTH KATAKANA LETTER YU;Lo;0;L;<narrow> 30E6;;;;N;;;;;
+ FF96;HALFWIDTH KATAKANA LETTER YO;Lo;0;L;<narrow> 30E8;;;;N;;;;;
+ FF97;HALFWIDTH KATAKANA LETTER RA;Lo;0;L;<narrow> 30E9;;;;N;;;;;
+ FF98;HALFWIDTH KATAKANA LETTER RI;Lo;0;L;<narrow> 30EA;;;;N;;;;;
+ FF99;HALFWIDTH KATAKANA LETTER RU;Lo;0;L;<narrow> 30EB;;;;N;;;;;
+ FF9A;HALFWIDTH KATAKANA LETTER RE;Lo;0;L;<narrow> 30EC;;;;N;;;;;
+ FF9B;HALFWIDTH KATAKANA LETTER RO;Lo;0;L;<narrow> 30ED;;;;N;;;;;
+ FF9C;HALFWIDTH KATAKANA LETTER WA;Lo;0;L;<narrow> 30EF;;;;N;;;;;
+ FF9D;HALFWIDTH KATAKANA LETTER N;Lo;0;L;<narrow> 30F3;;;;N;;;;;
+ FF9E;HALFWIDTH KATAKANA VOICED SOUND MARK;Lm;0;L;<narrow> 3099;;;;N;;;;;
+ FF9F;HALFWIDTH KATAKANA SEMI-VOICED SOUND MARK;Lm;0;L;<narrow> 309A;;;;N;;;;;
+ FFA0;HALFWIDTH HANGUL FILLER;Lo;0;L;<narrow> 3164;;;;N;HALFWIDTH HANGUL CAE OM;;;;
+ FFA1;HALFWIDTH HANGUL LETTER KIYEOK;Lo;0;L;<narrow> 3131;;;;N;HALFWIDTH HANGUL LETTER GIYEOG;;;;
+ FFA2;HALFWIDTH HANGUL LETTER SSANGKIYEOK;Lo;0;L;<narrow> 3132;;;;N;HALFWIDTH HANGUL LETTER SSANG GIYEOG;;;;
+ FFA3;HALFWIDTH HANGUL LETTER KIYEOK-SIOS;Lo;0;L;<narrow> 3133;;;;N;HALFWIDTH HANGUL LETTER GIYEOG SIOS;;;;
+ FFA4;HALFWIDTH HANGUL LETTER NIEUN;Lo;0;L;<narrow> 3134;;;;N;;;;;
+ FFA5;HALFWIDTH HANGUL LETTER NIEUN-CIEUC;Lo;0;L;<narrow> 3135;;;;N;HALFWIDTH HANGUL LETTER NIEUN JIEUJ;;;;
+ FFA6;HALFWIDTH HANGUL LETTER NIEUN-HIEUH;Lo;0;L;<narrow> 3136;;;;N;HALFWIDTH HANGUL LETTER NIEUN HIEUH;;;;
+ FFA7;HALFWIDTH HANGUL LETTER TIKEUT;Lo;0;L;<narrow> 3137;;;;N;HALFWIDTH HANGUL LETTER DIGEUD;;;;
+ FFA8;HALFWIDTH HANGUL LETTER SSANGTIKEUT;Lo;0;L;<narrow> 3138;;;;N;HALFWIDTH HANGUL LETTER SSANG DIGEUD;;;;
+ FFA9;HALFWIDTH HANGUL LETTER RIEUL;Lo;0;L;<narrow> 3139;;;;N;HALFWIDTH HANGUL LETTER LIEUL;;;;
+ FFAA;HALFWIDTH HANGUL LETTER RIEUL-KIYEOK;Lo;0;L;<narrow> 313A;;;;N;HALFWIDTH HANGUL LETTER LIEUL GIYEOG;;;;
+ FFAB;HALFWIDTH HANGUL LETTER RIEUL-MIEUM;Lo;0;L;<narrow> 313B;;;;N;HALFWIDTH HANGUL LETTER LIEUL MIEUM;;;;
+ FFAC;HALFWIDTH HANGUL LETTER RIEUL-PIEUP;Lo;0;L;<narrow> 313C;;;;N;HALFWIDTH HANGUL LETTER LIEUL BIEUB;;;;
+ FFAD;HALFWIDTH HANGUL LETTER RIEUL-SIOS;Lo;0;L;<narrow> 313D;;;;N;HALFWIDTH HANGUL LETTER LIEUL SIOS;;;;
+ FFAE;HALFWIDTH HANGUL LETTER RIEUL-THIEUTH;Lo;0;L;<narrow> 313E;;;;N;HALFWIDTH HANGUL LETTER LIEUL TIEUT;;;;
+ FFAF;HALFWIDTH HANGUL LETTER RIEUL-PHIEUPH;Lo;0;L;<narrow> 313F;;;;N;HALFWIDTH HANGUL LETTER LIEUL PIEUP;;;;
+ FFB0;HALFWIDTH HANGUL LETTER RIEUL-HIEUH;Lo;0;L;<narrow> 3140;;;;N;HALFWIDTH HANGUL LETTER LIEUL HIEUH;;;;
+ FFB1;HALFWIDTH HANGUL LETTER MIEUM;Lo;0;L;<narrow> 3141;;;;N;;;;;
+ FFB2;HALFWIDTH HANGUL LETTER PIEUP;Lo;0;L;<narrow> 3142;;;;N;HALFWIDTH HANGUL LETTER BIEUB;;;;
+ FFB3;HALFWIDTH HANGUL LETTER SSANGPIEUP;Lo;0;L;<narrow> 3143;;;;N;HALFWIDTH HANGUL LETTER SSANG BIEUB;;;;
+ FFB4;HALFWIDTH HANGUL LETTER PIEUP-SIOS;Lo;0;L;<narrow> 3144;;;;N;HALFWIDTH HANGUL LETTER BIEUB SIOS;;;;
+ FFB5;HALFWIDTH HANGUL LETTER SIOS;Lo;0;L;<narrow> 3145;;;;N;;;;;
+ FFB6;HALFWIDTH HANGUL LETTER SSANGSIOS;Lo;0;L;<narrow> 3146;;;;N;HALFWIDTH HANGUL LETTER SSANG SIOS;;;;
+ FFB7;HALFWIDTH HANGUL LETTER IEUNG;Lo;0;L;<narrow> 3147;;;;N;;;;;
+ FFB8;HALFWIDTH HANGUL LETTER CIEUC;Lo;0;L;<narrow> 3148;;;;N;HALFWIDTH HANGUL LETTER JIEUJ;;;;
+ FFB9;HALFWIDTH HANGUL LETTER SSANGCIEUC;Lo;0;L;<narrow> 3149;;;;N;HALFWIDTH HANGUL LETTER SSANG JIEUJ;;;;
+ FFBA;HALFWIDTH HANGUL LETTER CHIEUCH;Lo;0;L;<narrow> 314A;;;;N;HALFWIDTH HANGUL LETTER CIEUC;;;;
+ FFBB;HALFWIDTH HANGUL LETTER KHIEUKH;Lo;0;L;<narrow> 314B;;;;N;HALFWIDTH HANGUL LETTER KIYEOK;;;;
+ FFBC;HALFWIDTH HANGUL LETTER THIEUTH;Lo;0;L;<narrow> 314C;;;;N;HALFWIDTH HANGUL LETTER TIEUT;;;;
+ FFBD;HALFWIDTH HANGUL LETTER PHIEUPH;Lo;0;L;<narrow> 314D;;;;N;HALFWIDTH HANGUL LETTER PIEUP;;;;
+ FFBE;HALFWIDTH HANGUL LETTER HIEUH;Lo;0;L;<narrow> 314E;;;;N;;;;;
+ FFC2;HALFWIDTH HANGUL LETTER A;Lo;0;L;<narrow> 314F;;;;N;;;;;
+ FFC3;HALFWIDTH HANGUL LETTER AE;Lo;0;L;<narrow> 3150;;;;N;;;;;
+ FFC4;HALFWIDTH HANGUL LETTER YA;Lo;0;L;<narrow> 3151;;;;N;;;;;
+ FFC5;HALFWIDTH HANGUL LETTER YAE;Lo;0;L;<narrow> 3152;;;;N;;;;;
+ FFC6;HALFWIDTH HANGUL LETTER EO;Lo;0;L;<narrow> 3153;;;;N;;;;;
+ FFC7;HALFWIDTH HANGUL LETTER E;Lo;0;L;<narrow> 3154;;;;N;;;;;
+ FFCA;HALFWIDTH HANGUL LETTER YEO;Lo;0;L;<narrow> 3155;;;;N;;;;;
+ FFCB;HALFWIDTH HANGUL LETTER YE;Lo;0;L;<narrow> 3156;;;;N;;;;;
+ FFCC;HALFWIDTH HANGUL LETTER O;Lo;0;L;<narrow> 3157;;;;N;;;;;
+ FFCD;HALFWIDTH HANGUL LETTER WA;Lo;0;L;<narrow> 3158;;;;N;;;;;
+ FFCE;HALFWIDTH HANGUL LETTER WAE;Lo;0;L;<narrow> 3159;;;;N;;;;;
+ FFCF;HALFWIDTH HANGUL LETTER OE;Lo;0;L;<narrow> 315A;;;;N;;;;;
+ FFD2;HALFWIDTH HANGUL LETTER YO;Lo;0;L;<narrow> 315B;;;;N;;;;;
+ FFD3;HALFWIDTH HANGUL LETTER U;Lo;0;L;<narrow> 315C;;;;N;;;;;
+ FFD4;HALFWIDTH HANGUL LETTER WEO;Lo;0;L;<narrow> 315D;;;;N;;;;;
+ FFD5;HALFWIDTH HANGUL LETTER WE;Lo;0;L;<narrow> 315E;;;;N;;;;;
+ FFD6;HALFWIDTH HANGUL LETTER WI;Lo;0;L;<narrow> 315F;;;;N;;;;;
+ FFD7;HALFWIDTH HANGUL LETTER YU;Lo;0;L;<narrow> 3160;;;;N;;;;;
+ FFDA;HALFWIDTH HANGUL LETTER EU;Lo;0;L;<narrow> 3161;;;;N;;;;;
+ FFDB;HALFWIDTH HANGUL LETTER YI;Lo;0;L;<narrow> 3162;;;;N;;;;;
+ FFDC;HALFWIDTH HANGUL LETTER I;Lo;0;L;<narrow> 3163;;;;N;;;;;
+ FFE0;FULLWIDTH CENT SIGN;Sc;0;ET;<wide> 00A2;;;;N;;;;;
+ FFE1;FULLWIDTH POUND SIGN;Sc;0;ET;<wide> 00A3;;;;N;;;;;
+ FFE2;FULLWIDTH NOT SIGN;Sm;0;ON;<wide> 00AC;;;;N;;;;;
+ FFE3;FULLWIDTH MACRON;Sk;0;ON;<wide> 00AF;;;;N;FULLWIDTH SPACING MACRON;;;;
+ FFE4;FULLWIDTH BROKEN BAR;So;0;ON;<wide> 00A6;;;;N;FULLWIDTH BROKEN VERTICAL BAR;;;;
+ FFE5;FULLWIDTH YEN SIGN;Sc;0;ET;<wide> 00A5;;;;N;;;;;
+ FFE6;FULLWIDTH WON SIGN;Sc;0;ET;<wide> 20A9;;;;N;;;;;
+ FFE8;HALFWIDTH FORMS LIGHT VERTICAL;So;0;ON;<narrow> 2502;;;;N;;;;;
+ FFE9;HALFWIDTH LEFTWARDS ARROW;Sm;0;ON;<narrow> 2190;;;;N;;;;;
+ FFEA;HALFWIDTH UPWARDS ARROW;Sm;0;ON;<narrow> 2191;;;;N;;;;;
+ FFEB;HALFWIDTH RIGHTWARDS ARROW;Sm;0;ON;<narrow> 2192;;;;N;;;;;
+ FFEC;HALFWIDTH DOWNWARDS ARROW;Sm;0;ON;<narrow> 2193;;;;N;;;;;
+ FFED;HALFWIDTH BLACK SQUARE;So;0;ON;<narrow> 25A0;;;;N;;;;;
+ FFEE;HALFWIDTH WHITE CIRCLE;So;0;ON;<narrow> 25CB;;;;N;;;;;
+ FFF9;INTERLINEAR ANNOTATION ANCHOR;Cf;0;ON;;;;;N;;;;;
+ FFFA;INTERLINEAR ANNOTATION SEPARATOR;Cf;0;ON;;;;;N;;;;;
+ FFFB;INTERLINEAR ANNOTATION TERMINATOR;Cf;0;ON;;;;;N;;;;;
+ FFFC;OBJECT REPLACEMENT CHARACTER;So;0;ON;;;;;N;;;;;
+ FFFD;REPLACEMENT CHARACTER;So;0;ON;;;;;N;;;;;
+ 10000;LINEAR B SYLLABLE B008 A;Lo;0;L;;;;;N;;;;;
+ 10001;LINEAR B SYLLABLE B038 E;Lo;0;L;;;;;N;;;;;
+ 10002;LINEAR B SYLLABLE B028 I;Lo;0;L;;;;;N;;;;;
+ 10003;LINEAR B SYLLABLE B061 O;Lo;0;L;;;;;N;;;;;
+ 10004;LINEAR B SYLLABLE B010 U;Lo;0;L;;;;;N;;;;;
+ 10005;LINEAR B SYLLABLE B001 DA;Lo;0;L;;;;;N;;;;;
+ 10006;LINEAR B SYLLABLE B045 DE;Lo;0;L;;;;;N;;;;;
+ 10007;LINEAR B SYLLABLE B007 DI;Lo;0;L;;;;;N;;;;;
+ 10008;LINEAR B SYLLABLE B014 DO;Lo;0;L;;;;;N;;;;;
+ 10009;LINEAR B SYLLABLE B051 DU;Lo;0;L;;;;;N;;;;;
+ 1000A;LINEAR B SYLLABLE B057 JA;Lo;0;L;;;;;N;;;;;
+ 1000B;LINEAR B SYLLABLE B046 JE;Lo;0;L;;;;;N;;;;;
+ 1000D;LINEAR B SYLLABLE B036 JO;Lo;0;L;;;;;N;;;;;
+ 1000E;LINEAR B SYLLABLE B065 JU;Lo;0;L;;;;;N;;;;;
+ 1000F;LINEAR B SYLLABLE B077 KA;Lo;0;L;;;;;N;;;;;
+ 10010;LINEAR B SYLLABLE B044 KE;Lo;0;L;;;;;N;;;;;
+ 10011;LINEAR B SYLLABLE B067 KI;Lo;0;L;;;;;N;;;;;
+ 10012;LINEAR B SYLLABLE B070 KO;Lo;0;L;;;;;N;;;;;
+ 10013;LINEAR B SYLLABLE B081 KU;Lo;0;L;;;;;N;;;;;
+ 10014;LINEAR B SYLLABLE B080 MA;Lo;0;L;;;;;N;;;;;
+ 10015;LINEAR B SYLLABLE B013 ME;Lo;0;L;;;;;N;;;;;
+ 10016;LINEAR B SYLLABLE B073 MI;Lo;0;L;;;;;N;;;;;
+ 10017;LINEAR B SYLLABLE B015 MO;Lo;0;L;;;;;N;;;;;
+ 10018;LINEAR B SYLLABLE B023 MU;Lo;0;L;;;;;N;;;;;
+ 10019;LINEAR B SYLLABLE B006 NA;Lo;0;L;;;;;N;;;;;
+ 1001A;LINEAR B SYLLABLE B024 NE;Lo;0;L;;;;;N;;;;;
+ 1001B;LINEAR B SYLLABLE B030 NI;Lo;0;L;;;;;N;;;;;
+ 1001C;LINEAR B SYLLABLE B052 NO;Lo;0;L;;;;;N;;;;;
+ 1001D;LINEAR B SYLLABLE B055 NU;Lo;0;L;;;;;N;;;;;
+ 1001E;LINEAR B SYLLABLE B003 PA;Lo;0;L;;;;;N;;;;;
+ 1001F;LINEAR B SYLLABLE B072 PE;Lo;0;L;;;;;N;;;;;
+ 10020;LINEAR B SYLLABLE B039 PI;Lo;0;L;;;;;N;;;;;
+ 10021;LINEAR B SYLLABLE B011 PO;Lo;0;L;;;;;N;;;;;
+ 10022;LINEAR B SYLLABLE B050 PU;Lo;0;L;;;;;N;;;;;
+ 10023;LINEAR B SYLLABLE B016 QA;Lo;0;L;;;;;N;;;;;
+ 10024;LINEAR B SYLLABLE B078 QE;Lo;0;L;;;;;N;;;;;
+ 10025;LINEAR B SYLLABLE B021 QI;Lo;0;L;;;;;N;;;;;
+ 10026;LINEAR B SYLLABLE B032 QO;Lo;0;L;;;;;N;;;;;
+ 10028;LINEAR B SYLLABLE B060 RA;Lo;0;L;;;;;N;;;;;
+ 10029;LINEAR B SYLLABLE B027 RE;Lo;0;L;;;;;N;;;;;
+ 1002A;LINEAR B SYLLABLE B053 RI;Lo;0;L;;;;;N;;;;;
+ 1002B;LINEAR B SYLLABLE B002 RO;Lo;0;L;;;;;N;;;;;
+ 1002C;LINEAR B SYLLABLE B026 RU;Lo;0;L;;;;;N;;;;;
+ 1002D;LINEAR B SYLLABLE B031 SA;Lo;0;L;;;;;N;;;;;
+ 1002E;LINEAR B SYLLABLE B009 SE;Lo;0;L;;;;;N;;;;;
+ 1002F;LINEAR B SYLLABLE B041 SI;Lo;0;L;;;;;N;;;;;
+ 10030;LINEAR B SYLLABLE B012 SO;Lo;0;L;;;;;N;;;;;
+ 10031;LINEAR B SYLLABLE B058 SU;Lo;0;L;;;;;N;;;;;
+ 10032;LINEAR B SYLLABLE B059 TA;Lo;0;L;;;;;N;;;;;
+ 10033;LINEAR B SYLLABLE B004 TE;Lo;0;L;;;;;N;;;;;
+ 10034;LINEAR B SYLLABLE B037 TI;Lo;0;L;;;;;N;;;;;
+ 10035;LINEAR B SYLLABLE B005 TO;Lo;0;L;;;;;N;;;;;
+ 10036;LINEAR B SYLLABLE B069 TU;Lo;0;L;;;;;N;;;;;
+ 10037;LINEAR B SYLLABLE B054 WA;Lo;0;L;;;;;N;;;;;
+ 10038;LINEAR B SYLLABLE B075 WE;Lo;0;L;;;;;N;;;;;
+ 10039;LINEAR B SYLLABLE B040 WI;Lo;0;L;;;;;N;;;;;
+ 1003A;LINEAR B SYLLABLE B042 WO;Lo;0;L;;;;;N;;;;;
+ 1003C;LINEAR B SYLLABLE B017 ZA;Lo;0;L;;;;;N;;;;;
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+ 10047;LINEAR B SYLLABLE B062 PTE;Lo;0;L;;;;;N;;;;;
+ 10048;LINEAR B SYLLABLE B076 RA2;Lo;0;L;;;;;N;;;;;
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+ 1004C;LINEAR B SYLLABLE B087 TWE;Lo;0;L;;;;;N;;;;;
+ 1004D;LINEAR B SYLLABLE B091 TWO;Lo;0;L;;;;;N;;;;;
+ 10050;LINEAR B SYMBOL B018;Lo;0;L;;;;;N;;;;;
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+ 10114;AEGEAN NUMBER FIFTY;No;0;L;;;;50;N;;;;;
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+ 10130;AEGEAN NUMBER SIXTY THOUSAND;No;0;L;;;;60000;N;;;;;
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+ 1014E;GREEK ACROPHONIC ATTIC FIVE THOUSAND TALENTS;Nl;0;ON;;;;5000;N;;;;;
+ 1014F;GREEK ACROPHONIC ATTIC FIVE STATERS;Nl;0;ON;;;;5;N;;;;;
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+ 10154;GREEK ACROPHONIC ATTIC ONE THOUSAND STATERS;Nl;0;ON;;;;1000;N;;;;;
+ 10155;GREEK ACROPHONIC ATTIC TEN THOUSAND STATERS;Nl;0;ON;;;;10000;N;;;;;
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+ 10157;GREEK ACROPHONIC ATTIC TEN MNAS;Nl;0;ON;;;;10;N;;;;;
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+ 1016F;GREEK ACROPHONIC CARYSTIAN FIVE HUNDRED;Nl;0;ON;;;;500;N;;;;;
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+ 10171;GREEK ACROPHONIC THESPIAN ONE THOUSAND;Nl;0;ON;;;;1000;N;;;;;
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+ 10181;GREEK METRETES SIGN;So;0;ON;;;;;N;;;;;
+ 10182;GREEK KYATHOS BASE SIGN;So;0;ON;;;;;N;;;;;
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+ 10185;GREEK XESTES SIGN;So;0;ON;;;;;N;;;;;
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+ 10187;GREEK AROURA SIGN;So;0;ON;;;;;N;;;;;
+ 10188;GREEK GRAMMA SIGN;So;0;ON;;;;;N;;;;;
+ 10189;GREEK TRYBLION BASE SIGN;So;0;ON;;;;;N;;;;;
+ 1018A;GREEK ZERO SIGN;No;0;ON;;;;0;N;;;;;
+ 1018B;GREEK ONE QUARTER SIGN;No;0;ON;;;;1/4;N;;;;;
+ 1018C;GREEK SINUSOID SIGN;So;0;ON;;;;;N;;;;;
+ 1018D;GREEK INDICTION SIGN;So;0;L;;;;;N;;;;;
+ 1018E;NOMISMA SIGN;So;0;L;;;;;N;;;;;
+ 10190;ROMAN SEXTANS SIGN;So;0;ON;;;;;N;;;;;
+ 10191;ROMAN UNCIA SIGN;So;0;ON;;;;;N;;;;;
+ 10192;ROMAN SEMUNCIA SIGN;So;0;ON;;;;;N;;;;;
+ 10193;ROMAN SEXTULA SIGN;So;0;ON;;;;;N;;;;;
+ 10194;ROMAN DIMIDIA SEXTULA SIGN;So;0;ON;;;;;N;;;;;
+ 10195;ROMAN SILIQUA SIGN;So;0;ON;;;;;N;;;;;
+ 10196;ROMAN DENARIUS SIGN;So;0;ON;;;;;N;;;;;
+ 10197;ROMAN QUINARIUS SIGN;So;0;ON;;;;;N;;;;;
+ 10198;ROMAN SESTERTIUS SIGN;So;0;ON;;;;;N;;;;;
+ 10199;ROMAN DUPONDIUS SIGN;So;0;ON;;;;;N;;;;;
+ 1019A;ROMAN AS SIGN;So;0;ON;;;;;N;;;;;
+ 1019B;ROMAN CENTURIAL SIGN;So;0;ON;;;;;N;;;;;
+ 101A0;GREEK SYMBOL TAU RHO;So;0;ON;;;;;N;;;;;
+ 101D0;PHAISTOS DISC SIGN PEDESTRIAN;So;0;L;;;;;N;;;;;
+ 101D1;PHAISTOS DISC SIGN PLUMED HEAD;So;0;L;;;;;N;;;;;
+ 101D2;PHAISTOS DISC SIGN TATTOOED HEAD;So;0;L;;;;;N;;;;;
+ 101D3;PHAISTOS DISC SIGN CAPTIVE;So;0;L;;;;;N;;;;;
+ 101D4;PHAISTOS DISC SIGN CHILD;So;0;L;;;;;N;;;;;
+ 101D5;PHAISTOS DISC SIGN WOMAN;So;0;L;;;;;N;;;;;
+ 101D6;PHAISTOS DISC SIGN HELMET;So;0;L;;;;;N;;;;;
+ 101D7;PHAISTOS DISC SIGN GAUNTLET;So;0;L;;;;;N;;;;;
+ 101D8;PHAISTOS DISC SIGN TIARA;So;0;L;;;;;N;;;;;
+ 101D9;PHAISTOS DISC SIGN ARROW;So;0;L;;;;;N;;;;;
+ 101DA;PHAISTOS DISC SIGN BOW;So;0;L;;;;;N;;;;;
+ 101DB;PHAISTOS DISC SIGN SHIELD;So;0;L;;;;;N;;;;;
+ 101DC;PHAISTOS DISC SIGN CLUB;So;0;L;;;;;N;;;;;
+ 101DD;PHAISTOS DISC SIGN MANACLES;So;0;L;;;;;N;;;;;
+ 101DE;PHAISTOS DISC SIGN MATTOCK;So;0;L;;;;;N;;;;;
+ 101DF;PHAISTOS DISC SIGN SAW;So;0;L;;;;;N;;;;;
+ 101E0;PHAISTOS DISC SIGN LID;So;0;L;;;;;N;;;;;
+ 101E1;PHAISTOS DISC SIGN BOOMERANG;So;0;L;;;;;N;;;;;
+ 101E2;PHAISTOS DISC SIGN CARPENTRY PLANE;So;0;L;;;;;N;;;;;
+ 101E3;PHAISTOS DISC SIGN DOLIUM;So;0;L;;;;;N;;;;;
+ 101E4;PHAISTOS DISC SIGN COMB;So;0;L;;;;;N;;;;;
+ 101E5;PHAISTOS DISC SIGN SLING;So;0;L;;;;;N;;;;;
+ 101E6;PHAISTOS DISC SIGN COLUMN;So;0;L;;;;;N;;;;;
+ 101E7;PHAISTOS DISC SIGN BEEHIVE;So;0;L;;;;;N;;;;;
+ 101E8;PHAISTOS DISC SIGN SHIP;So;0;L;;;;;N;;;;;
+ 101E9;PHAISTOS DISC SIGN HORN;So;0;L;;;;;N;;;;;
+ 101EA;PHAISTOS DISC SIGN HIDE;So;0;L;;;;;N;;;;;
+ 101EB;PHAISTOS DISC SIGN BULLS LEG;So;0;L;;;;;N;;;;;
+ 101EC;PHAISTOS DISC SIGN CAT;So;0;L;;;;;N;;;;;
+ 101ED;PHAISTOS DISC SIGN RAM;So;0;L;;;;;N;;;;;
+ 101EE;PHAISTOS DISC SIGN EAGLE;So;0;L;;;;;N;;;;;
+ 101EF;PHAISTOS DISC SIGN DOVE;So;0;L;;;;;N;;;;;
+ 101F0;PHAISTOS DISC SIGN TUNNY;So;0;L;;;;;N;;;;;
+ 101F1;PHAISTOS DISC SIGN BEE;So;0;L;;;;;N;;;;;
+ 101F2;PHAISTOS DISC SIGN PLANE TREE;So;0;L;;;;;N;;;;;
+ 101F3;PHAISTOS DISC SIGN VINE;So;0;L;;;;;N;;;;;
+ 101F4;PHAISTOS DISC SIGN PAPYRUS;So;0;L;;;;;N;;;;;
+ 101F5;PHAISTOS DISC SIGN ROSETTE;So;0;L;;;;;N;;;;;
+ 101F6;PHAISTOS DISC SIGN LILY;So;0;L;;;;;N;;;;;
+ 101F7;PHAISTOS DISC SIGN OX BACK;So;0;L;;;;;N;;;;;
+ 101F8;PHAISTOS DISC SIGN FLUTE;So;0;L;;;;;N;;;;;
+ 101F9;PHAISTOS DISC SIGN GRATER;So;0;L;;;;;N;;;;;
+ 101FA;PHAISTOS DISC SIGN STRAINER;So;0;L;;;;;N;;;;;
+ 101FB;PHAISTOS DISC SIGN SMALL AXE;So;0;L;;;;;N;;;;;
+ 101FC;PHAISTOS DISC SIGN WAVY BAND;So;0;L;;;;;N;;;;;
+ 101FD;PHAISTOS DISC SIGN COMBINING OBLIQUE STROKE;Mn;220;NSM;;;;;N;;;;;
+ 10280;LYCIAN LETTER A;Lo;0;L;;;;;N;;;;;
+ 10281;LYCIAN LETTER E;Lo;0;L;;;;;N;;;;;
+ 10282;LYCIAN LETTER B;Lo;0;L;;;;;N;;;;;
+ 10283;LYCIAN LETTER BH;Lo;0;L;;;;;N;;;;;
+ 10284;LYCIAN LETTER G;Lo;0;L;;;;;N;;;;;
+ 10285;LYCIAN LETTER D;Lo;0;L;;;;;N;;;;;
+ 10286;LYCIAN LETTER I;Lo;0;L;;;;;N;;;;;
+ 10287;LYCIAN LETTER W;Lo;0;L;;;;;N;;;;;
+ 10288;LYCIAN LETTER Z;Lo;0;L;;;;;N;;;;;
+ 10289;LYCIAN LETTER TH;Lo;0;L;;;;;N;;;;;
+ 1028A;LYCIAN LETTER J;Lo;0;L;;;;;N;;;;;
+ 1028B;LYCIAN LETTER K;Lo;0;L;;;;;N;;;;;
+ 1028C;LYCIAN LETTER Q;Lo;0;L;;;;;N;;;;;
+ 1028D;LYCIAN LETTER L;Lo;0;L;;;;;N;;;;;
+ 1028E;LYCIAN LETTER M;Lo;0;L;;;;;N;;;;;
+ 1028F;LYCIAN LETTER N;Lo;0;L;;;;;N;;;;;
+ 10290;LYCIAN LETTER MM;Lo;0;L;;;;;N;;;;;
+ 10291;LYCIAN LETTER NN;Lo;0;L;;;;;N;;;;;
+ 10292;LYCIAN LETTER U;Lo;0;L;;;;;N;;;;;
+ 10293;LYCIAN LETTER P;Lo;0;L;;;;;N;;;;;
+ 10294;LYCIAN LETTER KK;Lo;0;L;;;;;N;;;;;
+ 10295;LYCIAN LETTER R;Lo;0;L;;;;;N;;;;;
+ 10296;LYCIAN LETTER S;Lo;0;L;;;;;N;;;;;
+ 10297;LYCIAN LETTER T;Lo;0;L;;;;;N;;;;;
+ 10298;LYCIAN LETTER TT;Lo;0;L;;;;;N;;;;;
+ 10299;LYCIAN LETTER AN;Lo;0;L;;;;;N;;;;;
+ 1029A;LYCIAN LETTER EN;Lo;0;L;;;;;N;;;;;
+ 1029B;LYCIAN LETTER H;Lo;0;L;;;;;N;;;;;
+ 1029C;LYCIAN LETTER X;Lo;0;L;;;;;N;;;;;
+ 102A0;CARIAN LETTER A;Lo;0;L;;;;;N;;;;;
+ 102A1;CARIAN LETTER P2;Lo;0;L;;;;;N;;;;;
+ 102A2;CARIAN LETTER D;Lo;0;L;;;;;N;;;;;
+ 102A3;CARIAN LETTER L;Lo;0;L;;;;;N;;;;;
+ 102A4;CARIAN LETTER UUU;Lo;0;L;;;;;N;;;;;
+ 102A5;CARIAN LETTER R;Lo;0;L;;;;;N;;;;;
+ 102A6;CARIAN LETTER LD;Lo;0;L;;;;;N;;;;;
+ 102A7;CARIAN LETTER A2;Lo;0;L;;;;;N;;;;;
+ 102A8;CARIAN LETTER Q;Lo;0;L;;;;;N;;;;;
+ 102A9;CARIAN LETTER B;Lo;0;L;;;;;N;;;;;
+ 102AA;CARIAN LETTER M;Lo;0;L;;;;;N;;;;;
+ 102AB;CARIAN LETTER O;Lo;0;L;;;;;N;;;;;
+ 102AC;CARIAN LETTER D2;Lo;0;L;;;;;N;;;;;
+ 102AD;CARIAN LETTER T;Lo;0;L;;;;;N;;;;;
+ 102AE;CARIAN LETTER SH;Lo;0;L;;;;;N;;;;;
+ 102AF;CARIAN LETTER SH2;Lo;0;L;;;;;N;;;;;
+ 102B0;CARIAN LETTER S;Lo;0;L;;;;;N;;;;;
+ 102B1;CARIAN LETTER C-18;Lo;0;L;;;;;N;;;;;
+ 102B2;CARIAN LETTER U;Lo;0;L;;;;;N;;;;;
+ 102B3;CARIAN LETTER NN;Lo;0;L;;;;;N;;;;;
+ 102B4;CARIAN LETTER X;Lo;0;L;;;;;N;;;;;
+ 102B5;CARIAN LETTER N;Lo;0;L;;;;;N;;;;;
+ 102B6;CARIAN LETTER TT2;Lo;0;L;;;;;N;;;;;
+ 102B7;CARIAN LETTER P;Lo;0;L;;;;;N;;;;;
+ 102B8;CARIAN LETTER SS;Lo;0;L;;;;;N;;;;;
+ 102B9;CARIAN LETTER I;Lo;0;L;;;;;N;;;;;
+ 102BA;CARIAN LETTER E;Lo;0;L;;;;;N;;;;;
+ 102BB;CARIAN LETTER UUUU;Lo;0;L;;;;;N;;;;;
+ 102BC;CARIAN LETTER K;Lo;0;L;;;;;N;;;;;
+ 102BD;CARIAN LETTER K2;Lo;0;L;;;;;N;;;;;
+ 102BE;CARIAN LETTER ND;Lo;0;L;;;;;N;;;;;
+ 102BF;CARIAN LETTER UU;Lo;0;L;;;;;N;;;;;
+ 102C0;CARIAN LETTER G;Lo;0;L;;;;;N;;;;;
+ 102C1;CARIAN LETTER G2;Lo;0;L;;;;;N;;;;;
+ 102C2;CARIAN LETTER ST;Lo;0;L;;;;;N;;;;;
+ 102C3;CARIAN LETTER ST2;Lo;0;L;;;;;N;;;;;
+ 102C4;CARIAN LETTER NG;Lo;0;L;;;;;N;;;;;
+ 102C5;CARIAN LETTER II;Lo;0;L;;;;;N;;;;;
+ 102C6;CARIAN LETTER C-39;Lo;0;L;;;;;N;;;;;
+ 102C7;CARIAN LETTER TT;Lo;0;L;;;;;N;;;;;
+ 102C8;CARIAN LETTER UUU2;Lo;0;L;;;;;N;;;;;
+ 102C9;CARIAN LETTER RR;Lo;0;L;;;;;N;;;;;
+ 102CA;CARIAN LETTER MB;Lo;0;L;;;;;N;;;;;
+ 102CB;CARIAN LETTER MB2;Lo;0;L;;;;;N;;;;;
+ 102CC;CARIAN LETTER MB3;Lo;0;L;;;;;N;;;;;
+ 102CD;CARIAN LETTER MB4;Lo;0;L;;;;;N;;;;;
+ 102CE;CARIAN LETTER LD2;Lo;0;L;;;;;N;;;;;
+ 102CF;CARIAN LETTER E2;Lo;0;L;;;;;N;;;;;
+ 102D0;CARIAN LETTER UUU3;Lo;0;L;;;;;N;;;;;
+ 102E0;COPTIC EPACT THOUSANDS MARK;Mn;220;NSM;;;;;N;;;;;
+ 102E1;COPTIC EPACT DIGIT ONE;No;0;EN;;;;1;N;;;;;
+ 102E2;COPTIC EPACT DIGIT TWO;No;0;EN;;;;2;N;;;;;
+ 102E3;COPTIC EPACT DIGIT THREE;No;0;EN;;;;3;N;;;;;
+ 102E4;COPTIC EPACT DIGIT FOUR;No;0;EN;;;;4;N;;;;;
+ 102E5;COPTIC EPACT DIGIT FIVE;No;0;EN;;;;5;N;;;;;
+ 102E6;COPTIC EPACT DIGIT SIX;No;0;EN;;;;6;N;;;;;
+ 102E7;COPTIC EPACT DIGIT SEVEN;No;0;EN;;;;7;N;;;;;
+ 102E8;COPTIC EPACT DIGIT EIGHT;No;0;EN;;;;8;N;;;;;
+ 102E9;COPTIC EPACT DIGIT NINE;No;0;EN;;;;9;N;;;;;
+ 102EA;COPTIC EPACT NUMBER TEN;No;0;EN;;;;10;N;;;;;
+ 102EB;COPTIC EPACT NUMBER TWENTY;No;0;EN;;;;20;N;;;;;
+ 102EC;COPTIC EPACT NUMBER THIRTY;No;0;EN;;;;30;N;;;;;
+ 102ED;COPTIC EPACT NUMBER FORTY;No;0;EN;;;;40;N;;;;;
+ 102EE;COPTIC EPACT NUMBER FIFTY;No;0;EN;;;;50;N;;;;;
+ 102EF;COPTIC EPACT NUMBER SIXTY;No;0;EN;;;;60;N;;;;;
+ 102F0;COPTIC EPACT NUMBER SEVENTY;No;0;EN;;;;70;N;;;;;
+ 102F1;COPTIC EPACT NUMBER EIGHTY;No;0;EN;;;;80;N;;;;;
+ 102F2;COPTIC EPACT NUMBER NINETY;No;0;EN;;;;90;N;;;;;
+ 102F3;COPTIC EPACT NUMBER ONE HUNDRED;No;0;EN;;;;100;N;;;;;
+ 102F4;COPTIC EPACT NUMBER TWO HUNDRED;No;0;EN;;;;200;N;;;;;
+ 102F5;COPTIC EPACT NUMBER THREE HUNDRED;No;0;EN;;;;300;N;;;;;
+ 102F6;COPTIC EPACT NUMBER FOUR HUNDRED;No;0;EN;;;;400;N;;;;;
+ 102F7;COPTIC EPACT NUMBER FIVE HUNDRED;No;0;EN;;;;500;N;;;;;
+ 102F8;COPTIC EPACT NUMBER SIX HUNDRED;No;0;EN;;;;600;N;;;;;
+ 102F9;COPTIC EPACT NUMBER SEVEN HUNDRED;No;0;EN;;;;700;N;;;;;
+ 102FA;COPTIC EPACT NUMBER EIGHT HUNDRED;No;0;EN;;;;800;N;;;;;
+ 102FB;COPTIC EPACT NUMBER NINE HUNDRED;No;0;EN;;;;900;N;;;;;
+ 10300;OLD ITALIC LETTER A;Lo;0;L;;;;;N;;;;;
+ 10301;OLD ITALIC LETTER BE;Lo;0;L;;;;;N;;;;;
+ 10302;OLD ITALIC LETTER KE;Lo;0;L;;;;;N;;;;;
+ 10303;OLD ITALIC LETTER DE;Lo;0;L;;;;;N;;;;;
+ 10304;OLD ITALIC LETTER E;Lo;0;L;;;;;N;;;;;
+ 10305;OLD ITALIC LETTER VE;Lo;0;L;;;;;N;;;;;
+ 10306;OLD ITALIC LETTER ZE;Lo;0;L;;;;;N;;;;;
+ 10307;OLD ITALIC LETTER HE;Lo;0;L;;;;;N;;;;;
+ 10308;OLD ITALIC LETTER THE;Lo;0;L;;;;;N;;;;;
+ 10309;OLD ITALIC LETTER I;Lo;0;L;;;;;N;;;;;
+ 1030A;OLD ITALIC LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1030B;OLD ITALIC LETTER EL;Lo;0;L;;;;;N;;;;;
+ 1030C;OLD ITALIC LETTER EM;Lo;0;L;;;;;N;;;;;
+ 1030D;OLD ITALIC LETTER EN;Lo;0;L;;;;;N;;;;;
+ 1030E;OLD ITALIC LETTER ESH;Lo;0;L;;;;;N;;;;;
+ 1030F;OLD ITALIC LETTER O;Lo;0;L;;;;;N;;;;;
+ 10310;OLD ITALIC LETTER PE;Lo;0;L;;;;;N;;;;;
+ 10311;OLD ITALIC LETTER SHE;Lo;0;L;;;;;N;;;;;
+ 10312;OLD ITALIC LETTER KU;Lo;0;L;;;;;N;;;;;
+ 10313;OLD ITALIC LETTER ER;Lo;0;L;;;;;N;;;;;
+ 10314;OLD ITALIC LETTER ES;Lo;0;L;;;;;N;;;;;
+ 10315;OLD ITALIC LETTER TE;Lo;0;L;;;;;N;;;;;
+ 10316;OLD ITALIC LETTER U;Lo;0;L;;;;;N;;;;;
+ 10317;OLD ITALIC LETTER EKS;Lo;0;L;;;;;N;;;;;
+ 10318;OLD ITALIC LETTER PHE;Lo;0;L;;;;;N;;;;;
+ 10319;OLD ITALIC LETTER KHE;Lo;0;L;;;;;N;;;;;
+ 1031A;OLD ITALIC LETTER EF;Lo;0;L;;;;;N;;;;;
+ 1031B;OLD ITALIC LETTER ERS;Lo;0;L;;;;;N;;;;;
+ 1031C;OLD ITALIC LETTER CHE;Lo;0;L;;;;;N;;;;;
+ 1031D;OLD ITALIC LETTER II;Lo;0;L;;;;;N;;;;;
+ 1031E;OLD ITALIC LETTER UU;Lo;0;L;;;;;N;;;;;
+ 1031F;OLD ITALIC LETTER ESS;Lo;0;L;;;;;N;;;;;
+ 10320;OLD ITALIC NUMERAL ONE;No;0;L;;;;1;N;;;;;
+ 10321;OLD ITALIC NUMERAL FIVE;No;0;L;;;;5;N;;;;;
+ 10322;OLD ITALIC NUMERAL TEN;No;0;L;;;;10;N;;;;;
+ 10323;OLD ITALIC NUMERAL FIFTY;No;0;L;;;;50;N;;;;;
+ 1032D;OLD ITALIC LETTER YE;Lo;0;L;;;;;N;;;;;
+ 1032E;OLD ITALIC LETTER NORTHERN TSE;Lo;0;L;;;;;N;;;;;
+ 1032F;OLD ITALIC LETTER SOUTHERN TSE;Lo;0;L;;;;;N;;;;;
+ 10330;GOTHIC LETTER AHSA;Lo;0;L;;;;;N;;;;;
+ 10331;GOTHIC LETTER BAIRKAN;Lo;0;L;;;;;N;;;;;
+ 10332;GOTHIC LETTER GIBA;Lo;0;L;;;;;N;;;;;
+ 10333;GOTHIC LETTER DAGS;Lo;0;L;;;;;N;;;;;
+ 10334;GOTHIC LETTER AIHVUS;Lo;0;L;;;;;N;;;;;
+ 10335;GOTHIC LETTER QAIRTHRA;Lo;0;L;;;;;N;;;;;
+ 10336;GOTHIC LETTER IUJA;Lo;0;L;;;;;N;;;;;
+ 10337;GOTHIC LETTER HAGL;Lo;0;L;;;;;N;;;;;
+ 10338;GOTHIC LETTER THIUTH;Lo;0;L;;;;;N;;;;;
+ 10339;GOTHIC LETTER EIS;Lo;0;L;;;;;N;;;;;
+ 1033A;GOTHIC LETTER KUSMA;Lo;0;L;;;;;N;;;;;
+ 1033B;GOTHIC LETTER LAGUS;Lo;0;L;;;;;N;;;;;
+ 1033C;GOTHIC LETTER MANNA;Lo;0;L;;;;;N;;;;;
+ 1033D;GOTHIC LETTER NAUTHS;Lo;0;L;;;;;N;;;;;
+ 1033E;GOTHIC LETTER JER;Lo;0;L;;;;;N;;;;;
+ 1033F;GOTHIC LETTER URUS;Lo;0;L;;;;;N;;;;;
+ 10340;GOTHIC LETTER PAIRTHRA;Lo;0;L;;;;;N;;;;;
+ 10341;GOTHIC LETTER NINETY;Nl;0;L;;;;90;N;;;;;
+ 10342;GOTHIC LETTER RAIDA;Lo;0;L;;;;;N;;;;;
+ 10343;GOTHIC LETTER SAUIL;Lo;0;L;;;;;N;;;;;
+ 10344;GOTHIC LETTER TEIWS;Lo;0;L;;;;;N;;;;;
+ 10345;GOTHIC LETTER WINJA;Lo;0;L;;;;;N;;;;;
+ 10346;GOTHIC LETTER FAIHU;Lo;0;L;;;;;N;;;;;
+ 10347;GOTHIC LETTER IGGWS;Lo;0;L;;;;;N;;;;;
+ 10348;GOTHIC LETTER HWAIR;Lo;0;L;;;;;N;;;;;
+ 10349;GOTHIC LETTER OTHAL;Lo;0;L;;;;;N;;;;;
+ 1034A;GOTHIC LETTER NINE HUNDRED;Nl;0;L;;;;900;N;;;;;
+ 10350;OLD PERMIC LETTER AN;Lo;0;L;;;;;N;;;;;
+ 10351;OLD PERMIC LETTER BUR;Lo;0;L;;;;;N;;;;;
+ 10352;OLD PERMIC LETTER GAI;Lo;0;L;;;;;N;;;;;
+ 10353;OLD PERMIC LETTER DOI;Lo;0;L;;;;;N;;;;;
+ 10354;OLD PERMIC LETTER E;Lo;0;L;;;;;N;;;;;
+ 10355;OLD PERMIC LETTER ZHOI;Lo;0;L;;;;;N;;;;;
+ 10356;OLD PERMIC LETTER DZHOI;Lo;0;L;;;;;N;;;;;
+ 10357;OLD PERMIC LETTER ZATA;Lo;0;L;;;;;N;;;;;
+ 10358;OLD PERMIC LETTER DZITA;Lo;0;L;;;;;N;;;;;
+ 10359;OLD PERMIC LETTER I;Lo;0;L;;;;;N;;;;;
+ 1035A;OLD PERMIC LETTER KOKE;Lo;0;L;;;;;N;;;;;
+ 1035B;OLD PERMIC LETTER LEI;Lo;0;L;;;;;N;;;;;
+ 1035C;OLD PERMIC LETTER MENOE;Lo;0;L;;;;;N;;;;;
+ 1035D;OLD PERMIC LETTER NENOE;Lo;0;L;;;;;N;;;;;
+ 1035E;OLD PERMIC LETTER VOOI;Lo;0;L;;;;;N;;;;;
+ 1035F;OLD PERMIC LETTER PEEI;Lo;0;L;;;;;N;;;;;
+ 10360;OLD PERMIC LETTER REI;Lo;0;L;;;;;N;;;;;
+ 10361;OLD PERMIC LETTER SII;Lo;0;L;;;;;N;;;;;
+ 10362;OLD PERMIC LETTER TAI;Lo;0;L;;;;;N;;;;;
+ 10363;OLD PERMIC LETTER U;Lo;0;L;;;;;N;;;;;
+ 10364;OLD PERMIC LETTER CHERY;Lo;0;L;;;;;N;;;;;
+ 10365;OLD PERMIC LETTER SHOOI;Lo;0;L;;;;;N;;;;;
+ 10366;OLD PERMIC LETTER SHCHOOI;Lo;0;L;;;;;N;;;;;
+ 10367;OLD PERMIC LETTER YRY;Lo;0;L;;;;;N;;;;;
+ 10368;OLD PERMIC LETTER YERU;Lo;0;L;;;;;N;;;;;
+ 10369;OLD PERMIC LETTER O;Lo;0;L;;;;;N;;;;;
+ 1036A;OLD PERMIC LETTER OO;Lo;0;L;;;;;N;;;;;
+ 1036B;OLD PERMIC LETTER EF;Lo;0;L;;;;;N;;;;;
+ 1036C;OLD PERMIC LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1036D;OLD PERMIC LETTER TSIU;Lo;0;L;;;;;N;;;;;
+ 1036E;OLD PERMIC LETTER VER;Lo;0;L;;;;;N;;;;;
+ 1036F;OLD PERMIC LETTER YER;Lo;0;L;;;;;N;;;;;
+ 10370;OLD PERMIC LETTER YERI;Lo;0;L;;;;;N;;;;;
+ 10371;OLD PERMIC LETTER YAT;Lo;0;L;;;;;N;;;;;
+ 10372;OLD PERMIC LETTER IE;Lo;0;L;;;;;N;;;;;
+ 10373;OLD PERMIC LETTER YU;Lo;0;L;;;;;N;;;;;
+ 10374;OLD PERMIC LETTER YA;Lo;0;L;;;;;N;;;;;
+ 10375;OLD PERMIC LETTER IA;Lo;0;L;;;;;N;;;;;
+ 10376;COMBINING OLD PERMIC LETTER AN;Mn;230;NSM;;;;;N;;;;;
+ 10377;COMBINING OLD PERMIC LETTER DOI;Mn;230;NSM;;;;;N;;;;;
+ 10378;COMBINING OLD PERMIC LETTER ZATA;Mn;230;NSM;;;;;N;;;;;
+ 10379;COMBINING OLD PERMIC LETTER NENOE;Mn;230;NSM;;;;;N;;;;;
+ 1037A;COMBINING OLD PERMIC LETTER SII;Mn;230;NSM;;;;;N;;;;;
+ 10380;UGARITIC LETTER ALPA;Lo;0;L;;;;;N;;;;;
+ 10381;UGARITIC LETTER BETA;Lo;0;L;;;;;N;;;;;
+ 10382;UGARITIC LETTER GAMLA;Lo;0;L;;;;;N;;;;;
+ 10383;UGARITIC LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 10384;UGARITIC LETTER DELTA;Lo;0;L;;;;;N;;;;;
+ 10385;UGARITIC LETTER HO;Lo;0;L;;;;;N;;;;;
+ 10386;UGARITIC LETTER WO;Lo;0;L;;;;;N;;;;;
+ 10387;UGARITIC LETTER ZETA;Lo;0;L;;;;;N;;;;;
+ 10388;UGARITIC LETTER HOTA;Lo;0;L;;;;;N;;;;;
+ 10389;UGARITIC LETTER TET;Lo;0;L;;;;;N;;;;;
+ 1038A;UGARITIC LETTER YOD;Lo;0;L;;;;;N;;;;;
+ 1038B;UGARITIC LETTER KAF;Lo;0;L;;;;;N;;;;;
+ 1038C;UGARITIC LETTER SHIN;Lo;0;L;;;;;N;;;;;
+ 1038D;UGARITIC LETTER LAMDA;Lo;0;L;;;;;N;;;;;
+ 1038E;UGARITIC LETTER MEM;Lo;0;L;;;;;N;;;;;
+ 1038F;UGARITIC LETTER DHAL;Lo;0;L;;;;;N;;;;;
+ 10390;UGARITIC LETTER NUN;Lo;0;L;;;;;N;;;;;
+ 10391;UGARITIC LETTER ZU;Lo;0;L;;;;;N;;;;;
+ 10392;UGARITIC LETTER SAMKA;Lo;0;L;;;;;N;;;;;
+ 10393;UGARITIC LETTER AIN;Lo;0;L;;;;;N;;;;;
+ 10394;UGARITIC LETTER PU;Lo;0;L;;;;;N;;;;;
+ 10395;UGARITIC LETTER SADE;Lo;0;L;;;;;N;;;;;
+ 10396;UGARITIC LETTER QOPA;Lo;0;L;;;;;N;;;;;
+ 10397;UGARITIC LETTER RASHA;Lo;0;L;;;;;N;;;;;
+ 10398;UGARITIC LETTER THANNA;Lo;0;L;;;;;N;;;;;
+ 10399;UGARITIC LETTER GHAIN;Lo;0;L;;;;;N;;;;;
+ 1039A;UGARITIC LETTER TO;Lo;0;L;;;;;N;;;;;
+ 1039B;UGARITIC LETTER I;Lo;0;L;;;;;N;;;;;
+ 1039C;UGARITIC LETTER U;Lo;0;L;;;;;N;;;;;
+ 1039D;UGARITIC LETTER SSU;Lo;0;L;;;;;N;;;;;
+ 1039F;UGARITIC WORD DIVIDER;Po;0;L;;;;;N;;;;;
+ 103A0;OLD PERSIAN SIGN A;Lo;0;L;;;;;N;;;;;
+ 103A1;OLD PERSIAN SIGN I;Lo;0;L;;;;;N;;;;;
+ 103A2;OLD PERSIAN SIGN U;Lo;0;L;;;;;N;;;;;
+ 103A3;OLD PERSIAN SIGN KA;Lo;0;L;;;;;N;;;;;
+ 103A4;OLD PERSIAN SIGN KU;Lo;0;L;;;;;N;;;;;
+ 103A5;OLD PERSIAN SIGN GA;Lo;0;L;;;;;N;;;;;
+ 103A6;OLD PERSIAN SIGN GU;Lo;0;L;;;;;N;;;;;
+ 103A7;OLD PERSIAN SIGN XA;Lo;0;L;;;;;N;;;;;
+ 103A8;OLD PERSIAN SIGN CA;Lo;0;L;;;;;N;;;;;
+ 103A9;OLD PERSIAN SIGN JA;Lo;0;L;;;;;N;;;;;
+ 103AA;OLD PERSIAN SIGN JI;Lo;0;L;;;;;N;;;;;
+ 103AB;OLD PERSIAN SIGN TA;Lo;0;L;;;;;N;;;;;
+ 103AC;OLD PERSIAN SIGN TU;Lo;0;L;;;;;N;;;;;
+ 103AD;OLD PERSIAN SIGN DA;Lo;0;L;;;;;N;;;;;
+ 103AE;OLD PERSIAN SIGN DI;Lo;0;L;;;;;N;;;;;
+ 103AF;OLD PERSIAN SIGN DU;Lo;0;L;;;;;N;;;;;
+ 103B0;OLD PERSIAN SIGN THA;Lo;0;L;;;;;N;;;;;
+ 103B1;OLD PERSIAN SIGN PA;Lo;0;L;;;;;N;;;;;
+ 103B2;OLD PERSIAN SIGN BA;Lo;0;L;;;;;N;;;;;
+ 103B3;OLD PERSIAN SIGN FA;Lo;0;L;;;;;N;;;;;
+ 103B4;OLD PERSIAN SIGN NA;Lo;0;L;;;;;N;;;;;
+ 103B5;OLD PERSIAN SIGN NU;Lo;0;L;;;;;N;;;;;
+ 103B6;OLD PERSIAN SIGN MA;Lo;0;L;;;;;N;;;;;
+ 103B7;OLD PERSIAN SIGN MI;Lo;0;L;;;;;N;;;;;
+ 103B8;OLD PERSIAN SIGN MU;Lo;0;L;;;;;N;;;;;
+ 103B9;OLD PERSIAN SIGN YA;Lo;0;L;;;;;N;;;;;
+ 103BA;OLD PERSIAN SIGN VA;Lo;0;L;;;;;N;;;;;
+ 103BB;OLD PERSIAN SIGN VI;Lo;0;L;;;;;N;;;;;
+ 103BC;OLD PERSIAN SIGN RA;Lo;0;L;;;;;N;;;;;
+ 103BD;OLD PERSIAN SIGN RU;Lo;0;L;;;;;N;;;;;
+ 103BE;OLD PERSIAN SIGN LA;Lo;0;L;;;;;N;;;;;
+ 103BF;OLD PERSIAN SIGN SA;Lo;0;L;;;;;N;;;;;
+ 103C0;OLD PERSIAN SIGN ZA;Lo;0;L;;;;;N;;;;;
+ 103C1;OLD PERSIAN SIGN SHA;Lo;0;L;;;;;N;;;;;
+ 103C2;OLD PERSIAN SIGN SSA;Lo;0;L;;;;;N;;;;;
+ 103C3;OLD PERSIAN SIGN HA;Lo;0;L;;;;;N;;;;;
+ 103C8;OLD PERSIAN SIGN AURAMAZDAA;Lo;0;L;;;;;N;;;;;
+ 103C9;OLD PERSIAN SIGN AURAMAZDAA-2;Lo;0;L;;;;;N;;;;;
+ 103CA;OLD PERSIAN SIGN AURAMAZDAAHA;Lo;0;L;;;;;N;;;;;
+ 103CB;OLD PERSIAN SIGN XSHAAYATHIYA;Lo;0;L;;;;;N;;;;;
+ 103CC;OLD PERSIAN SIGN DAHYAAUSH;Lo;0;L;;;;;N;;;;;
+ 103CD;OLD PERSIAN SIGN DAHYAAUSH-2;Lo;0;L;;;;;N;;;;;
+ 103CE;OLD PERSIAN SIGN BAGA;Lo;0;L;;;;;N;;;;;
+ 103CF;OLD PERSIAN SIGN BUUMISH;Lo;0;L;;;;;N;;;;;
+ 103D0;OLD PERSIAN WORD DIVIDER;Po;0;L;;;;;N;;;;;
+ 103D1;OLD PERSIAN NUMBER ONE;Nl;0;L;;;;1;N;;;;;
+ 103D2;OLD PERSIAN NUMBER TWO;Nl;0;L;;;;2;N;;;;;
+ 103D3;OLD PERSIAN NUMBER TEN;Nl;0;L;;;;10;N;;;;;
+ 103D4;OLD PERSIAN NUMBER TWENTY;Nl;0;L;;;;20;N;;;;;
+ 103D5;OLD PERSIAN NUMBER HUNDRED;Nl;0;L;;;;100;N;;;;;
+ 10400;DESERET CAPITAL LETTER LONG I;Lu;0;L;;;;;N;;;;10428;
+ 10401;DESERET CAPITAL LETTER LONG E;Lu;0;L;;;;;N;;;;10429;
+ 10402;DESERET CAPITAL LETTER LONG A;Lu;0;L;;;;;N;;;;1042A;
+ 10403;DESERET CAPITAL LETTER LONG AH;Lu;0;L;;;;;N;;;;1042B;
+ 10404;DESERET CAPITAL LETTER LONG O;Lu;0;L;;;;;N;;;;1042C;
+ 10405;DESERET CAPITAL LETTER LONG OO;Lu;0;L;;;;;N;;;;1042D;
+ 10406;DESERET CAPITAL LETTER SHORT I;Lu;0;L;;;;;N;;;;1042E;
+ 10407;DESERET CAPITAL LETTER SHORT E;Lu;0;L;;;;;N;;;;1042F;
+ 10408;DESERET CAPITAL LETTER SHORT A;Lu;0;L;;;;;N;;;;10430;
+ 10409;DESERET CAPITAL LETTER SHORT AH;Lu;0;L;;;;;N;;;;10431;
+ 1040A;DESERET CAPITAL LETTER SHORT O;Lu;0;L;;;;;N;;;;10432;
+ 1040B;DESERET CAPITAL LETTER SHORT OO;Lu;0;L;;;;;N;;;;10433;
+ 1040C;DESERET CAPITAL LETTER AY;Lu;0;L;;;;;N;;;;10434;
+ 1040D;DESERET CAPITAL LETTER OW;Lu;0;L;;;;;N;;;;10435;
+ 1040E;DESERET CAPITAL LETTER WU;Lu;0;L;;;;;N;;;;10436;
+ 1040F;DESERET CAPITAL LETTER YEE;Lu;0;L;;;;;N;;;;10437;
+ 10410;DESERET CAPITAL LETTER H;Lu;0;L;;;;;N;;;;10438;
+ 10411;DESERET CAPITAL LETTER PEE;Lu;0;L;;;;;N;;;;10439;
+ 10412;DESERET CAPITAL LETTER BEE;Lu;0;L;;;;;N;;;;1043A;
+ 10413;DESERET CAPITAL LETTER TEE;Lu;0;L;;;;;N;;;;1043B;
+ 10414;DESERET CAPITAL LETTER DEE;Lu;0;L;;;;;N;;;;1043C;
+ 10415;DESERET CAPITAL LETTER CHEE;Lu;0;L;;;;;N;;;;1043D;
+ 10416;DESERET CAPITAL LETTER JEE;Lu;0;L;;;;;N;;;;1043E;
+ 10417;DESERET CAPITAL LETTER KAY;Lu;0;L;;;;;N;;;;1043F;
+ 10418;DESERET CAPITAL LETTER GAY;Lu;0;L;;;;;N;;;;10440;
+ 10419;DESERET CAPITAL LETTER EF;Lu;0;L;;;;;N;;;;10441;
+ 1041A;DESERET CAPITAL LETTER VEE;Lu;0;L;;;;;N;;;;10442;
+ 1041B;DESERET CAPITAL LETTER ETH;Lu;0;L;;;;;N;;;;10443;
+ 1041C;DESERET CAPITAL LETTER THEE;Lu;0;L;;;;;N;;;;10444;
+ 1041D;DESERET CAPITAL LETTER ES;Lu;0;L;;;;;N;;;;10445;
+ 1041E;DESERET CAPITAL LETTER ZEE;Lu;0;L;;;;;N;;;;10446;
+ 1041F;DESERET CAPITAL LETTER ESH;Lu;0;L;;;;;N;;;;10447;
+ 10420;DESERET CAPITAL LETTER ZHEE;Lu;0;L;;;;;N;;;;10448;
+ 10421;DESERET CAPITAL LETTER ER;Lu;0;L;;;;;N;;;;10449;
+ 10422;DESERET CAPITAL LETTER EL;Lu;0;L;;;;;N;;;;1044A;
+ 10423;DESERET CAPITAL LETTER EM;Lu;0;L;;;;;N;;;;1044B;
+ 10424;DESERET CAPITAL LETTER EN;Lu;0;L;;;;;N;;;;1044C;
+ 10425;DESERET CAPITAL LETTER ENG;Lu;0;L;;;;;N;;;;1044D;
+ 10426;DESERET CAPITAL LETTER OI;Lu;0;L;;;;;N;;;;1044E;
+ 10427;DESERET CAPITAL LETTER EW;Lu;0;L;;;;;N;;;;1044F;
+ 10428;DESERET SMALL LETTER LONG I;Ll;0;L;;;;;N;;;10400;;10400
+ 10429;DESERET SMALL LETTER LONG E;Ll;0;L;;;;;N;;;10401;;10401
+ 1042A;DESERET SMALL LETTER LONG A;Ll;0;L;;;;;N;;;10402;;10402
+ 1042B;DESERET SMALL LETTER LONG AH;Ll;0;L;;;;;N;;;10403;;10403
+ 1042C;DESERET SMALL LETTER LONG O;Ll;0;L;;;;;N;;;10404;;10404
+ 1042D;DESERET SMALL LETTER LONG OO;Ll;0;L;;;;;N;;;10405;;10405
+ 1042E;DESERET SMALL LETTER SHORT I;Ll;0;L;;;;;N;;;10406;;10406
+ 1042F;DESERET SMALL LETTER SHORT E;Ll;0;L;;;;;N;;;10407;;10407
+ 10430;DESERET SMALL LETTER SHORT A;Ll;0;L;;;;;N;;;10408;;10408
+ 10431;DESERET SMALL LETTER SHORT AH;Ll;0;L;;;;;N;;;10409;;10409
+ 10432;DESERET SMALL LETTER SHORT O;Ll;0;L;;;;;N;;;1040A;;1040A
+ 10433;DESERET SMALL LETTER SHORT OO;Ll;0;L;;;;;N;;;1040B;;1040B
+ 10434;DESERET SMALL LETTER AY;Ll;0;L;;;;;N;;;1040C;;1040C
+ 10435;DESERET SMALL LETTER OW;Ll;0;L;;;;;N;;;1040D;;1040D
+ 10436;DESERET SMALL LETTER WU;Ll;0;L;;;;;N;;;1040E;;1040E
+ 10437;DESERET SMALL LETTER YEE;Ll;0;L;;;;;N;;;1040F;;1040F
+ 10438;DESERET SMALL LETTER H;Ll;0;L;;;;;N;;;10410;;10410
+ 10439;DESERET SMALL LETTER PEE;Ll;0;L;;;;;N;;;10411;;10411
+ 1043A;DESERET SMALL LETTER BEE;Ll;0;L;;;;;N;;;10412;;10412
+ 1043B;DESERET SMALL LETTER TEE;Ll;0;L;;;;;N;;;10413;;10413
+ 1043C;DESERET SMALL LETTER DEE;Ll;0;L;;;;;N;;;10414;;10414
+ 1043D;DESERET SMALL LETTER CHEE;Ll;0;L;;;;;N;;;10415;;10415
+ 1043E;DESERET SMALL LETTER JEE;Ll;0;L;;;;;N;;;10416;;10416
+ 1043F;DESERET SMALL LETTER KAY;Ll;0;L;;;;;N;;;10417;;10417
+ 10440;DESERET SMALL LETTER GAY;Ll;0;L;;;;;N;;;10418;;10418
+ 10441;DESERET SMALL LETTER EF;Ll;0;L;;;;;N;;;10419;;10419
+ 10442;DESERET SMALL LETTER VEE;Ll;0;L;;;;;N;;;1041A;;1041A
+ 10443;DESERET SMALL LETTER ETH;Ll;0;L;;;;;N;;;1041B;;1041B
+ 10444;DESERET SMALL LETTER THEE;Ll;0;L;;;;;N;;;1041C;;1041C
+ 10445;DESERET SMALL LETTER ES;Ll;0;L;;;;;N;;;1041D;;1041D
+ 10446;DESERET SMALL LETTER ZEE;Ll;0;L;;;;;N;;;1041E;;1041E
+ 10447;DESERET SMALL LETTER ESH;Ll;0;L;;;;;N;;;1041F;;1041F
+ 10448;DESERET SMALL LETTER ZHEE;Ll;0;L;;;;;N;;;10420;;10420
+ 10449;DESERET SMALL LETTER ER;Ll;0;L;;;;;N;;;10421;;10421
+ 1044A;DESERET SMALL LETTER EL;Ll;0;L;;;;;N;;;10422;;10422
+ 1044B;DESERET SMALL LETTER EM;Ll;0;L;;;;;N;;;10423;;10423
+ 1044C;DESERET SMALL LETTER EN;Ll;0;L;;;;;N;;;10424;;10424
+ 1044D;DESERET SMALL LETTER ENG;Ll;0;L;;;;;N;;;10425;;10425
+ 1044E;DESERET SMALL LETTER OI;Ll;0;L;;;;;N;;;10426;;10426
+ 1044F;DESERET SMALL LETTER EW;Ll;0;L;;;;;N;;;10427;;10427
+ 10450;SHAVIAN LETTER PEEP;Lo;0;L;;;;;N;;;;;
+ 10451;SHAVIAN LETTER TOT;Lo;0;L;;;;;N;;;;;
+ 10452;SHAVIAN LETTER KICK;Lo;0;L;;;;;N;;;;;
+ 10453;SHAVIAN LETTER FEE;Lo;0;L;;;;;N;;;;;
+ 10454;SHAVIAN LETTER THIGH;Lo;0;L;;;;;N;;;;;
+ 10455;SHAVIAN LETTER SO;Lo;0;L;;;;;N;;;;;
+ 10456;SHAVIAN LETTER SURE;Lo;0;L;;;;;N;;;;;
+ 10457;SHAVIAN LETTER CHURCH;Lo;0;L;;;;;N;;;;;
+ 10458;SHAVIAN LETTER YEA;Lo;0;L;;;;;N;;;;;
+ 10459;SHAVIAN LETTER HUNG;Lo;0;L;;;;;N;;;;;
+ 1045A;SHAVIAN LETTER BIB;Lo;0;L;;;;;N;;;;;
+ 1045B;SHAVIAN LETTER DEAD;Lo;0;L;;;;;N;;;;;
+ 1045C;SHAVIAN LETTER GAG;Lo;0;L;;;;;N;;;;;
+ 1045D;SHAVIAN LETTER VOW;Lo;0;L;;;;;N;;;;;
+ 1045E;SHAVIAN LETTER THEY;Lo;0;L;;;;;N;;;;;
+ 1045F;SHAVIAN LETTER ZOO;Lo;0;L;;;;;N;;;;;
+ 10460;SHAVIAN LETTER MEASURE;Lo;0;L;;;;;N;;;;;
+ 10461;SHAVIAN LETTER JUDGE;Lo;0;L;;;;;N;;;;;
+ 10462;SHAVIAN LETTER WOE;Lo;0;L;;;;;N;;;;;
+ 10463;SHAVIAN LETTER HA-HA;Lo;0;L;;;;;N;;;;;
+ 10464;SHAVIAN LETTER LOLL;Lo;0;L;;;;;N;;;;;
+ 10465;SHAVIAN LETTER MIME;Lo;0;L;;;;;N;;;;;
+ 10466;SHAVIAN LETTER IF;Lo;0;L;;;;;N;;;;;
+ 10467;SHAVIAN LETTER EGG;Lo;0;L;;;;;N;;;;;
+ 10468;SHAVIAN LETTER ASH;Lo;0;L;;;;;N;;;;;
+ 10469;SHAVIAN LETTER ADO;Lo;0;L;;;;;N;;;;;
+ 1046A;SHAVIAN LETTER ON;Lo;0;L;;;;;N;;;;;
+ 1046B;SHAVIAN LETTER WOOL;Lo;0;L;;;;;N;;;;;
+ 1046C;SHAVIAN LETTER OUT;Lo;0;L;;;;;N;;;;;
+ 1046D;SHAVIAN LETTER AH;Lo;0;L;;;;;N;;;;;
+ 1046E;SHAVIAN LETTER ROAR;Lo;0;L;;;;;N;;;;;
+ 1046F;SHAVIAN LETTER NUN;Lo;0;L;;;;;N;;;;;
+ 10470;SHAVIAN LETTER EAT;Lo;0;L;;;;;N;;;;;
+ 10471;SHAVIAN LETTER AGE;Lo;0;L;;;;;N;;;;;
+ 10472;SHAVIAN LETTER ICE;Lo;0;L;;;;;N;;;;;
+ 10473;SHAVIAN LETTER UP;Lo;0;L;;;;;N;;;;;
+ 10474;SHAVIAN LETTER OAK;Lo;0;L;;;;;N;;;;;
+ 10475;SHAVIAN LETTER OOZE;Lo;0;L;;;;;N;;;;;
+ 10476;SHAVIAN LETTER OIL;Lo;0;L;;;;;N;;;;;
+ 10477;SHAVIAN LETTER AWE;Lo;0;L;;;;;N;;;;;
+ 10478;SHAVIAN LETTER ARE;Lo;0;L;;;;;N;;;;;
+ 10479;SHAVIAN LETTER OR;Lo;0;L;;;;;N;;;;;
+ 1047A;SHAVIAN LETTER AIR;Lo;0;L;;;;;N;;;;;
+ 1047B;SHAVIAN LETTER ERR;Lo;0;L;;;;;N;;;;;
+ 1047C;SHAVIAN LETTER ARRAY;Lo;0;L;;;;;N;;;;;
+ 1047D;SHAVIAN LETTER EAR;Lo;0;L;;;;;N;;;;;
+ 1047E;SHAVIAN LETTER IAN;Lo;0;L;;;;;N;;;;;
+ 1047F;SHAVIAN LETTER YEW;Lo;0;L;;;;;N;;;;;
+ 10480;OSMANYA LETTER ALEF;Lo;0;L;;;;;N;;;;;
+ 10481;OSMANYA LETTER BA;Lo;0;L;;;;;N;;;;;
+ 10482;OSMANYA LETTER TA;Lo;0;L;;;;;N;;;;;
+ 10483;OSMANYA LETTER JA;Lo;0;L;;;;;N;;;;;
+ 10484;OSMANYA LETTER XA;Lo;0;L;;;;;N;;;;;
+ 10485;OSMANYA LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 10486;OSMANYA LETTER DEEL;Lo;0;L;;;;;N;;;;;
+ 10487;OSMANYA LETTER RA;Lo;0;L;;;;;N;;;;;
+ 10488;OSMANYA LETTER SA;Lo;0;L;;;;;N;;;;;
+ 10489;OSMANYA LETTER SHIIN;Lo;0;L;;;;;N;;;;;
+ 1048A;OSMANYA LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 1048B;OSMANYA LETTER CAYN;Lo;0;L;;;;;N;;;;;
+ 1048C;OSMANYA LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1048D;OSMANYA LETTER FA;Lo;0;L;;;;;N;;;;;
+ 1048E;OSMANYA LETTER QAAF;Lo;0;L;;;;;N;;;;;
+ 1048F;OSMANYA LETTER KAAF;Lo;0;L;;;;;N;;;;;
+ 10490;OSMANYA LETTER LAAN;Lo;0;L;;;;;N;;;;;
+ 10491;OSMANYA LETTER MIIN;Lo;0;L;;;;;N;;;;;
+ 10492;OSMANYA LETTER NUUN;Lo;0;L;;;;;N;;;;;
+ 10493;OSMANYA LETTER WAW;Lo;0;L;;;;;N;;;;;
+ 10494;OSMANYA LETTER HA;Lo;0;L;;;;;N;;;;;
+ 10495;OSMANYA LETTER YA;Lo;0;L;;;;;N;;;;;
+ 10496;OSMANYA LETTER A;Lo;0;L;;;;;N;;;;;
+ 10497;OSMANYA LETTER E;Lo;0;L;;;;;N;;;;;
+ 10498;OSMANYA LETTER I;Lo;0;L;;;;;N;;;;;
+ 10499;OSMANYA LETTER O;Lo;0;L;;;;;N;;;;;
+ 1049A;OSMANYA LETTER U;Lo;0;L;;;;;N;;;;;
+ 1049B;OSMANYA LETTER AA;Lo;0;L;;;;;N;;;;;
+ 1049C;OSMANYA LETTER EE;Lo;0;L;;;;;N;;;;;
+ 1049D;OSMANYA LETTER OO;Lo;0;L;;;;;N;;;;;
+ 104A0;OSMANYA DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 104A1;OSMANYA DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 104A2;OSMANYA DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 104A3;OSMANYA DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 104A4;OSMANYA DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 104A5;OSMANYA DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 104A6;OSMANYA DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 104A7;OSMANYA DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 104A8;OSMANYA DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 104A9;OSMANYA DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 104B0;OSAGE CAPITAL LETTER A;Lu;0;L;;;;;N;;;;104D8;
+ 104B1;OSAGE CAPITAL LETTER AI;Lu;0;L;;;;;N;;;;104D9;
+ 104B2;OSAGE CAPITAL LETTER AIN;Lu;0;L;;;;;N;;;;104DA;
+ 104B3;OSAGE CAPITAL LETTER AH;Lu;0;L;;;;;N;;;;104DB;
+ 104B4;OSAGE CAPITAL LETTER BRA;Lu;0;L;;;;;N;;;;104DC;
+ 104B5;OSAGE CAPITAL LETTER CHA;Lu;0;L;;;;;N;;;;104DD;
+ 104B6;OSAGE CAPITAL LETTER EHCHA;Lu;0;L;;;;;N;;;;104DE;
+ 104B7;OSAGE CAPITAL LETTER E;Lu;0;L;;;;;N;;;;104DF;
+ 104B8;OSAGE CAPITAL LETTER EIN;Lu;0;L;;;;;N;;;;104E0;
+ 104B9;OSAGE CAPITAL LETTER HA;Lu;0;L;;;;;N;;;;104E1;
+ 104BA;OSAGE CAPITAL LETTER HYA;Lu;0;L;;;;;N;;;;104E2;
+ 104BB;OSAGE CAPITAL LETTER I;Lu;0;L;;;;;N;;;;104E3;
+ 104BC;OSAGE CAPITAL LETTER KA;Lu;0;L;;;;;N;;;;104E4;
+ 104BD;OSAGE CAPITAL LETTER EHKA;Lu;0;L;;;;;N;;;;104E5;
+ 104BE;OSAGE CAPITAL LETTER KYA;Lu;0;L;;;;;N;;;;104E6;
+ 104BF;OSAGE CAPITAL LETTER LA;Lu;0;L;;;;;N;;;;104E7;
+ 104C0;OSAGE CAPITAL LETTER MA;Lu;0;L;;;;;N;;;;104E8;
+ 104C1;OSAGE CAPITAL LETTER NA;Lu;0;L;;;;;N;;;;104E9;
+ 104C2;OSAGE CAPITAL LETTER O;Lu;0;L;;;;;N;;;;104EA;
+ 104C3;OSAGE CAPITAL LETTER OIN;Lu;0;L;;;;;N;;;;104EB;
+ 104C4;OSAGE CAPITAL LETTER PA;Lu;0;L;;;;;N;;;;104EC;
+ 104C5;OSAGE CAPITAL LETTER EHPA;Lu;0;L;;;;;N;;;;104ED;
+ 104C6;OSAGE CAPITAL LETTER SA;Lu;0;L;;;;;N;;;;104EE;
+ 104C7;OSAGE CAPITAL LETTER SHA;Lu;0;L;;;;;N;;;;104EF;
+ 104C8;OSAGE CAPITAL LETTER TA;Lu;0;L;;;;;N;;;;104F0;
+ 104C9;OSAGE CAPITAL LETTER EHTA;Lu;0;L;;;;;N;;;;104F1;
+ 104CA;OSAGE CAPITAL LETTER TSA;Lu;0;L;;;;;N;;;;104F2;
+ 104CB;OSAGE CAPITAL LETTER EHTSA;Lu;0;L;;;;;N;;;;104F3;
+ 104CC;OSAGE CAPITAL LETTER TSHA;Lu;0;L;;;;;N;;;;104F4;
+ 104CD;OSAGE CAPITAL LETTER DHA;Lu;0;L;;;;;N;;;;104F5;
+ 104CE;OSAGE CAPITAL LETTER U;Lu;0;L;;;;;N;;;;104F6;
+ 104CF;OSAGE CAPITAL LETTER WA;Lu;0;L;;;;;N;;;;104F7;
+ 104D0;OSAGE CAPITAL LETTER KHA;Lu;0;L;;;;;N;;;;104F8;
+ 104D1;OSAGE CAPITAL LETTER GHA;Lu;0;L;;;;;N;;;;104F9;
+ 104D2;OSAGE CAPITAL LETTER ZA;Lu;0;L;;;;;N;;;;104FA;
+ 104D3;OSAGE CAPITAL LETTER ZHA;Lu;0;L;;;;;N;;;;104FB;
+ 104D8;OSAGE SMALL LETTER A;Ll;0;L;;;;;N;;;104B0;;104B0
+ 104D9;OSAGE SMALL LETTER AI;Ll;0;L;;;;;N;;;104B1;;104B1
+ 104DA;OSAGE SMALL LETTER AIN;Ll;0;L;;;;;N;;;104B2;;104B2
+ 104DB;OSAGE SMALL LETTER AH;Ll;0;L;;;;;N;;;104B3;;104B3
+ 104DC;OSAGE SMALL LETTER BRA;Ll;0;L;;;;;N;;;104B4;;104B4
+ 104DD;OSAGE SMALL LETTER CHA;Ll;0;L;;;;;N;;;104B5;;104B5
+ 104DE;OSAGE SMALL LETTER EHCHA;Ll;0;L;;;;;N;;;104B6;;104B6
+ 104DF;OSAGE SMALL LETTER E;Ll;0;L;;;;;N;;;104B7;;104B7
+ 104E0;OSAGE SMALL LETTER EIN;Ll;0;L;;;;;N;;;104B8;;104B8
+ 104E1;OSAGE SMALL LETTER HA;Ll;0;L;;;;;N;;;104B9;;104B9
+ 104E2;OSAGE SMALL LETTER HYA;Ll;0;L;;;;;N;;;104BA;;104BA
+ 104E3;OSAGE SMALL LETTER I;Ll;0;L;;;;;N;;;104BB;;104BB
+ 104E4;OSAGE SMALL LETTER KA;Ll;0;L;;;;;N;;;104BC;;104BC
+ 104E5;OSAGE SMALL LETTER EHKA;Ll;0;L;;;;;N;;;104BD;;104BD
+ 104E6;OSAGE SMALL LETTER KYA;Ll;0;L;;;;;N;;;104BE;;104BE
+ 104E7;OSAGE SMALL LETTER LA;Ll;0;L;;;;;N;;;104BF;;104BF
+ 104E8;OSAGE SMALL LETTER MA;Ll;0;L;;;;;N;;;104C0;;104C0
+ 104E9;OSAGE SMALL LETTER NA;Ll;0;L;;;;;N;;;104C1;;104C1
+ 104EA;OSAGE SMALL LETTER O;Ll;0;L;;;;;N;;;104C2;;104C2
+ 104EB;OSAGE SMALL LETTER OIN;Ll;0;L;;;;;N;;;104C3;;104C3
+ 104EC;OSAGE SMALL LETTER PA;Ll;0;L;;;;;N;;;104C4;;104C4
+ 104ED;OSAGE SMALL LETTER EHPA;Ll;0;L;;;;;N;;;104C5;;104C5
+ 104EE;OSAGE SMALL LETTER SA;Ll;0;L;;;;;N;;;104C6;;104C6
+ 104EF;OSAGE SMALL LETTER SHA;Ll;0;L;;;;;N;;;104C7;;104C7
+ 104F0;OSAGE SMALL LETTER TA;Ll;0;L;;;;;N;;;104C8;;104C8
+ 104F1;OSAGE SMALL LETTER EHTA;Ll;0;L;;;;;N;;;104C9;;104C9
+ 104F2;OSAGE SMALL LETTER TSA;Ll;0;L;;;;;N;;;104CA;;104CA
+ 104F3;OSAGE SMALL LETTER EHTSA;Ll;0;L;;;;;N;;;104CB;;104CB
+ 104F4;OSAGE SMALL LETTER TSHA;Ll;0;L;;;;;N;;;104CC;;104CC
+ 104F5;OSAGE SMALL LETTER DHA;Ll;0;L;;;;;N;;;104CD;;104CD
+ 104F6;OSAGE SMALL LETTER U;Ll;0;L;;;;;N;;;104CE;;104CE
+ 104F7;OSAGE SMALL LETTER WA;Ll;0;L;;;;;N;;;104CF;;104CF
+ 104F8;OSAGE SMALL LETTER KHA;Ll;0;L;;;;;N;;;104D0;;104D0
+ 104F9;OSAGE SMALL LETTER GHA;Ll;0;L;;;;;N;;;104D1;;104D1
+ 104FA;OSAGE SMALL LETTER ZA;Ll;0;L;;;;;N;;;104D2;;104D2
+ 104FB;OSAGE SMALL LETTER ZHA;Ll;0;L;;;;;N;;;104D3;;104D3
+ 10500;ELBASAN LETTER A;Lo;0;L;;;;;N;;;;;
+ 10501;ELBASAN LETTER BE;Lo;0;L;;;;;N;;;;;
+ 10502;ELBASAN LETTER CE;Lo;0;L;;;;;N;;;;;
+ 10503;ELBASAN LETTER CHE;Lo;0;L;;;;;N;;;;;
+ 10504;ELBASAN LETTER DE;Lo;0;L;;;;;N;;;;;
+ 10505;ELBASAN LETTER NDE;Lo;0;L;;;;;N;;;;;
+ 10506;ELBASAN LETTER DHE;Lo;0;L;;;;;N;;;;;
+ 10507;ELBASAN LETTER EI;Lo;0;L;;;;;N;;;;;
+ 10508;ELBASAN LETTER E;Lo;0;L;;;;;N;;;;;
+ 10509;ELBASAN LETTER FE;Lo;0;L;;;;;N;;;;;
+ 1050A;ELBASAN LETTER GE;Lo;0;L;;;;;N;;;;;
+ 1050B;ELBASAN LETTER GJE;Lo;0;L;;;;;N;;;;;
+ 1050C;ELBASAN LETTER HE;Lo;0;L;;;;;N;;;;;
+ 1050D;ELBASAN LETTER I;Lo;0;L;;;;;N;;;;;
+ 1050E;ELBASAN LETTER JE;Lo;0;L;;;;;N;;;;;
+ 1050F;ELBASAN LETTER KE;Lo;0;L;;;;;N;;;;;
+ 10510;ELBASAN LETTER LE;Lo;0;L;;;;;N;;;;;
+ 10511;ELBASAN LETTER LLE;Lo;0;L;;;;;N;;;;;
+ 10512;ELBASAN LETTER ME;Lo;0;L;;;;;N;;;;;
+ 10513;ELBASAN LETTER NE;Lo;0;L;;;;;N;;;;;
+ 10514;ELBASAN LETTER NA;Lo;0;L;;;;;N;;;;;
+ 10515;ELBASAN LETTER NJE;Lo;0;L;;;;;N;;;;;
+ 10516;ELBASAN LETTER O;Lo;0;L;;;;;N;;;;;
+ 10517;ELBASAN LETTER PE;Lo;0;L;;;;;N;;;;;
+ 10518;ELBASAN LETTER QE;Lo;0;L;;;;;N;;;;;
+ 10519;ELBASAN LETTER RE;Lo;0;L;;;;;N;;;;;
+ 1051A;ELBASAN LETTER RRE;Lo;0;L;;;;;N;;;;;
+ 1051B;ELBASAN LETTER SE;Lo;0;L;;;;;N;;;;;
+ 1051C;ELBASAN LETTER SHE;Lo;0;L;;;;;N;;;;;
+ 1051D;ELBASAN LETTER TE;Lo;0;L;;;;;N;;;;;
+ 1051E;ELBASAN LETTER THE;Lo;0;L;;;;;N;;;;;
+ 1051F;ELBASAN LETTER U;Lo;0;L;;;;;N;;;;;
+ 10520;ELBASAN LETTER VE;Lo;0;L;;;;;N;;;;;
+ 10521;ELBASAN LETTER XE;Lo;0;L;;;;;N;;;;;
+ 10522;ELBASAN LETTER Y;Lo;0;L;;;;;N;;;;;
+ 10523;ELBASAN LETTER ZE;Lo;0;L;;;;;N;;;;;
+ 10524;ELBASAN LETTER ZHE;Lo;0;L;;;;;N;;;;;
+ 10525;ELBASAN LETTER GHE;Lo;0;L;;;;;N;;;;;
+ 10526;ELBASAN LETTER GHAMMA;Lo;0;L;;;;;N;;;;;
+ 10527;ELBASAN LETTER KHE;Lo;0;L;;;;;N;;;;;
+ 10530;CAUCASIAN ALBANIAN LETTER ALT;Lo;0;L;;;;;N;;;;;
+ 10531;CAUCASIAN ALBANIAN LETTER BET;Lo;0;L;;;;;N;;;;;
+ 10532;CAUCASIAN ALBANIAN LETTER GIM;Lo;0;L;;;;;N;;;;;
+ 10533;CAUCASIAN ALBANIAN LETTER DAT;Lo;0;L;;;;;N;;;;;
+ 10534;CAUCASIAN ALBANIAN LETTER EB;Lo;0;L;;;;;N;;;;;
+ 10535;CAUCASIAN ALBANIAN LETTER ZARL;Lo;0;L;;;;;N;;;;;
+ 10536;CAUCASIAN ALBANIAN LETTER EYN;Lo;0;L;;;;;N;;;;;
+ 10537;CAUCASIAN ALBANIAN LETTER ZHIL;Lo;0;L;;;;;N;;;;;
+ 10538;CAUCASIAN ALBANIAN LETTER TAS;Lo;0;L;;;;;N;;;;;
+ 10539;CAUCASIAN ALBANIAN LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 1053A;CAUCASIAN ALBANIAN LETTER YOWD;Lo;0;L;;;;;N;;;;;
+ 1053B;CAUCASIAN ALBANIAN LETTER ZHA;Lo;0;L;;;;;N;;;;;
+ 1053C;CAUCASIAN ALBANIAN LETTER IRB;Lo;0;L;;;;;N;;;;;
+ 1053D;CAUCASIAN ALBANIAN LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 1053E;CAUCASIAN ALBANIAN LETTER LAN;Lo;0;L;;;;;N;;;;;
+ 1053F;CAUCASIAN ALBANIAN LETTER INYA;Lo;0;L;;;;;N;;;;;
+ 10540;CAUCASIAN ALBANIAN LETTER XEYN;Lo;0;L;;;;;N;;;;;
+ 10541;CAUCASIAN ALBANIAN LETTER DYAN;Lo;0;L;;;;;N;;;;;
+ 10542;CAUCASIAN ALBANIAN LETTER CAR;Lo;0;L;;;;;N;;;;;
+ 10543;CAUCASIAN ALBANIAN LETTER JHOX;Lo;0;L;;;;;N;;;;;
+ 10544;CAUCASIAN ALBANIAN LETTER KAR;Lo;0;L;;;;;N;;;;;
+ 10545;CAUCASIAN ALBANIAN LETTER LYIT;Lo;0;L;;;;;N;;;;;
+ 10546;CAUCASIAN ALBANIAN LETTER HEYT;Lo;0;L;;;;;N;;;;;
+ 10547;CAUCASIAN ALBANIAN LETTER QAY;Lo;0;L;;;;;N;;;;;
+ 10548;CAUCASIAN ALBANIAN LETTER AOR;Lo;0;L;;;;;N;;;;;
+ 10549;CAUCASIAN ALBANIAN LETTER CHOY;Lo;0;L;;;;;N;;;;;
+ 1054A;CAUCASIAN ALBANIAN LETTER CHI;Lo;0;L;;;;;N;;;;;
+ 1054B;CAUCASIAN ALBANIAN LETTER CYAY;Lo;0;L;;;;;N;;;;;
+ 1054C;CAUCASIAN ALBANIAN LETTER MAQ;Lo;0;L;;;;;N;;;;;
+ 1054D;CAUCASIAN ALBANIAN LETTER QAR;Lo;0;L;;;;;N;;;;;
+ 1054E;CAUCASIAN ALBANIAN LETTER NOWC;Lo;0;L;;;;;N;;;;;
+ 1054F;CAUCASIAN ALBANIAN LETTER DZYAY;Lo;0;L;;;;;N;;;;;
+ 10550;CAUCASIAN ALBANIAN LETTER SHAK;Lo;0;L;;;;;N;;;;;
+ 10551;CAUCASIAN ALBANIAN LETTER JAYN;Lo;0;L;;;;;N;;;;;
+ 10552;CAUCASIAN ALBANIAN LETTER ON;Lo;0;L;;;;;N;;;;;
+ 10553;CAUCASIAN ALBANIAN LETTER TYAY;Lo;0;L;;;;;N;;;;;
+ 10554;CAUCASIAN ALBANIAN LETTER FAM;Lo;0;L;;;;;N;;;;;
+ 10555;CAUCASIAN ALBANIAN LETTER DZAY;Lo;0;L;;;;;N;;;;;
+ 10556;CAUCASIAN ALBANIAN LETTER CHAT;Lo;0;L;;;;;N;;;;;
+ 10557;CAUCASIAN ALBANIAN LETTER PEN;Lo;0;L;;;;;N;;;;;
+ 10558;CAUCASIAN ALBANIAN LETTER GHEYS;Lo;0;L;;;;;N;;;;;
+ 10559;CAUCASIAN ALBANIAN LETTER RAT;Lo;0;L;;;;;N;;;;;
+ 1055A;CAUCASIAN ALBANIAN LETTER SEYK;Lo;0;L;;;;;N;;;;;
+ 1055B;CAUCASIAN ALBANIAN LETTER VEYZ;Lo;0;L;;;;;N;;;;;
+ 1055C;CAUCASIAN ALBANIAN LETTER TIWR;Lo;0;L;;;;;N;;;;;
+ 1055D;CAUCASIAN ALBANIAN LETTER SHOY;Lo;0;L;;;;;N;;;;;
+ 1055E;CAUCASIAN ALBANIAN LETTER IWN;Lo;0;L;;;;;N;;;;;
+ 1055F;CAUCASIAN ALBANIAN LETTER CYAW;Lo;0;L;;;;;N;;;;;
+ 10560;CAUCASIAN ALBANIAN LETTER CAYN;Lo;0;L;;;;;N;;;;;
+ 10561;CAUCASIAN ALBANIAN LETTER YAYD;Lo;0;L;;;;;N;;;;;
+ 10562;CAUCASIAN ALBANIAN LETTER PIWR;Lo;0;L;;;;;N;;;;;
+ 10563;CAUCASIAN ALBANIAN LETTER KIW;Lo;0;L;;;;;N;;;;;
+ 1056F;CAUCASIAN ALBANIAN CITATION MARK;Po;0;L;;;;;N;;;;;
+ 10600;LINEAR A SIGN AB001;Lo;0;L;;;;;N;;;;;
+ 10601;LINEAR A SIGN AB002;Lo;0;L;;;;;N;;;;;
+ 10602;LINEAR A SIGN AB003;Lo;0;L;;;;;N;;;;;
+ 10603;LINEAR A SIGN AB004;Lo;0;L;;;;;N;;;;;
+ 10604;LINEAR A SIGN AB005;Lo;0;L;;;;;N;;;;;
+ 10605;LINEAR A SIGN AB006;Lo;0;L;;;;;N;;;;;
+ 10606;LINEAR A SIGN AB007;Lo;0;L;;;;;N;;;;;
+ 10607;LINEAR A SIGN AB008;Lo;0;L;;;;;N;;;;;
+ 10608;LINEAR A SIGN AB009;Lo;0;L;;;;;N;;;;;
+ 10609;LINEAR A SIGN AB010;Lo;0;L;;;;;N;;;;;
+ 1060A;LINEAR A SIGN AB011;Lo;0;L;;;;;N;;;;;
+ 1060B;LINEAR A SIGN AB013;Lo;0;L;;;;;N;;;;;
+ 1060C;LINEAR A SIGN AB016;Lo;0;L;;;;;N;;;;;
+ 1060D;LINEAR A SIGN AB017;Lo;0;L;;;;;N;;;;;
+ 1060E;LINEAR A SIGN AB020;Lo;0;L;;;;;N;;;;;
+ 1060F;LINEAR A SIGN AB021;Lo;0;L;;;;;N;;;;;
+ 10610;LINEAR A SIGN AB021F;Lo;0;L;;;;;N;;;;;
+ 10611;LINEAR A SIGN AB021M;Lo;0;L;;;;;N;;;;;
+ 10612;LINEAR A SIGN AB022;Lo;0;L;;;;;N;;;;;
+ 10613;LINEAR A SIGN AB022F;Lo;0;L;;;;;N;;;;;
+ 10614;LINEAR A SIGN AB022M;Lo;0;L;;;;;N;;;;;
+ 10615;LINEAR A SIGN AB023;Lo;0;L;;;;;N;;;;;
+ 10616;LINEAR A SIGN AB023M;Lo;0;L;;;;;N;;;;;
+ 10617;LINEAR A SIGN AB024;Lo;0;L;;;;;N;;;;;
+ 10618;LINEAR A SIGN AB026;Lo;0;L;;;;;N;;;;;
+ 10619;LINEAR A SIGN AB027;Lo;0;L;;;;;N;;;;;
+ 1061A;LINEAR A SIGN AB028;Lo;0;L;;;;;N;;;;;
+ 1061B;LINEAR A SIGN A028B;Lo;0;L;;;;;N;;;;;
+ 1061C;LINEAR A SIGN AB029;Lo;0;L;;;;;N;;;;;
+ 1061D;LINEAR A SIGN AB030;Lo;0;L;;;;;N;;;;;
+ 1061E;LINEAR A SIGN AB031;Lo;0;L;;;;;N;;;;;
+ 1061F;LINEAR A SIGN AB034;Lo;0;L;;;;;N;;;;;
+ 10620;LINEAR A SIGN AB037;Lo;0;L;;;;;N;;;;;
+ 10621;LINEAR A SIGN AB038;Lo;0;L;;;;;N;;;;;
+ 10622;LINEAR A SIGN AB039;Lo;0;L;;;;;N;;;;;
+ 10623;LINEAR A SIGN AB040;Lo;0;L;;;;;N;;;;;
+ 10624;LINEAR A SIGN AB041;Lo;0;L;;;;;N;;;;;
+ 10625;LINEAR A SIGN AB044;Lo;0;L;;;;;N;;;;;
+ 10626;LINEAR A SIGN AB045;Lo;0;L;;;;;N;;;;;
+ 10627;LINEAR A SIGN AB046;Lo;0;L;;;;;N;;;;;
+ 10628;LINEAR A SIGN AB047;Lo;0;L;;;;;N;;;;;
+ 10629;LINEAR A SIGN AB048;Lo;0;L;;;;;N;;;;;
+ 1062A;LINEAR A SIGN AB049;Lo;0;L;;;;;N;;;;;
+ 1062B;LINEAR A SIGN AB050;Lo;0;L;;;;;N;;;;;
+ 1062C;LINEAR A SIGN AB051;Lo;0;L;;;;;N;;;;;
+ 1062D;LINEAR A SIGN AB053;Lo;0;L;;;;;N;;;;;
+ 1062E;LINEAR A SIGN AB054;Lo;0;L;;;;;N;;;;;
+ 1062F;LINEAR A SIGN AB055;Lo;0;L;;;;;N;;;;;
+ 10630;LINEAR A SIGN AB056;Lo;0;L;;;;;N;;;;;
+ 10631;LINEAR A SIGN AB057;Lo;0;L;;;;;N;;;;;
+ 10632;LINEAR A SIGN AB058;Lo;0;L;;;;;N;;;;;
+ 10633;LINEAR A SIGN AB059;Lo;0;L;;;;;N;;;;;
+ 10634;LINEAR A SIGN AB060;Lo;0;L;;;;;N;;;;;
+ 10635;LINEAR A SIGN AB061;Lo;0;L;;;;;N;;;;;
+ 10636;LINEAR A SIGN AB065;Lo;0;L;;;;;N;;;;;
+ 10637;LINEAR A SIGN AB066;Lo;0;L;;;;;N;;;;;
+ 10638;LINEAR A SIGN AB067;Lo;0;L;;;;;N;;;;;
+ 10639;LINEAR A SIGN AB069;Lo;0;L;;;;;N;;;;;
+ 1063A;LINEAR A SIGN AB070;Lo;0;L;;;;;N;;;;;
+ 1063B;LINEAR A SIGN AB073;Lo;0;L;;;;;N;;;;;
+ 1063C;LINEAR A SIGN AB074;Lo;0;L;;;;;N;;;;;
+ 1063D;LINEAR A SIGN AB076;Lo;0;L;;;;;N;;;;;
+ 1063E;LINEAR A SIGN AB077;Lo;0;L;;;;;N;;;;;
+ 1063F;LINEAR A SIGN AB078;Lo;0;L;;;;;N;;;;;
+ 10640;LINEAR A SIGN AB079;Lo;0;L;;;;;N;;;;;
+ 10641;LINEAR A SIGN AB080;Lo;0;L;;;;;N;;;;;
+ 10642;LINEAR A SIGN AB081;Lo;0;L;;;;;N;;;;;
+ 10643;LINEAR A SIGN AB082;Lo;0;L;;;;;N;;;;;
+ 10644;LINEAR A SIGN AB085;Lo;0;L;;;;;N;;;;;
+ 10645;LINEAR A SIGN AB086;Lo;0;L;;;;;N;;;;;
+ 10646;LINEAR A SIGN AB087;Lo;0;L;;;;;N;;;;;
+ 10647;LINEAR A SIGN A100-102;Lo;0;L;;;;;N;;;;;
+ 10648;LINEAR A SIGN AB118;Lo;0;L;;;;;N;;;;;
+ 10649;LINEAR A SIGN AB120;Lo;0;L;;;;;N;;;;;
+ 1064A;LINEAR A SIGN A120B;Lo;0;L;;;;;N;;;;;
+ 1064B;LINEAR A SIGN AB122;Lo;0;L;;;;;N;;;;;
+ 1064C;LINEAR A SIGN AB123;Lo;0;L;;;;;N;;;;;
+ 1064D;LINEAR A SIGN AB131A;Lo;0;L;;;;;N;;;;;
+ 1064E;LINEAR A SIGN AB131B;Lo;0;L;;;;;N;;;;;
+ 1064F;LINEAR A SIGN A131C;Lo;0;L;;;;;N;;;;;
+ 10650;LINEAR A SIGN AB164;Lo;0;L;;;;;N;;;;;
+ 10651;LINEAR A SIGN AB171;Lo;0;L;;;;;N;;;;;
+ 10652;LINEAR A SIGN AB180;Lo;0;L;;;;;N;;;;;
+ 10653;LINEAR A SIGN AB188;Lo;0;L;;;;;N;;;;;
+ 10654;LINEAR A SIGN AB191;Lo;0;L;;;;;N;;;;;
+ 10655;LINEAR A SIGN A301;Lo;0;L;;;;;N;;;;;
+ 10656;LINEAR A SIGN A302;Lo;0;L;;;;;N;;;;;
+ 10657;LINEAR A SIGN A303;Lo;0;L;;;;;N;;;;;
+ 10658;LINEAR A SIGN A304;Lo;0;L;;;;;N;;;;;
+ 10659;LINEAR A SIGN A305;Lo;0;L;;;;;N;;;;;
+ 1065A;LINEAR A SIGN A306;Lo;0;L;;;;;N;;;;;
+ 1065B;LINEAR A SIGN A307;Lo;0;L;;;;;N;;;;;
+ 1065C;LINEAR A SIGN A308;Lo;0;L;;;;;N;;;;;
+ 1065D;LINEAR A SIGN A309A;Lo;0;L;;;;;N;;;;;
+ 1065E;LINEAR A SIGN A309B;Lo;0;L;;;;;N;;;;;
+ 1065F;LINEAR A SIGN A309C;Lo;0;L;;;;;N;;;;;
+ 10660;LINEAR A SIGN A310;Lo;0;L;;;;;N;;;;;
+ 10661;LINEAR A SIGN A311;Lo;0;L;;;;;N;;;;;
+ 10662;LINEAR A SIGN A312;Lo;0;L;;;;;N;;;;;
+ 10663;LINEAR A SIGN A313A;Lo;0;L;;;;;N;;;;;
+ 10664;LINEAR A SIGN A313B;Lo;0;L;;;;;N;;;;;
+ 10665;LINEAR A SIGN A313C;Lo;0;L;;;;;N;;;;;
+ 10666;LINEAR A SIGN A314;Lo;0;L;;;;;N;;;;;
+ 10667;LINEAR A SIGN A315;Lo;0;L;;;;;N;;;;;
+ 10668;LINEAR A SIGN A316;Lo;0;L;;;;;N;;;;;
+ 10669;LINEAR A SIGN A317;Lo;0;L;;;;;N;;;;;
+ 1066A;LINEAR A SIGN A318;Lo;0;L;;;;;N;;;;;
+ 1066B;LINEAR A SIGN A319;Lo;0;L;;;;;N;;;;;
+ 1066C;LINEAR A SIGN A320;Lo;0;L;;;;;N;;;;;
+ 1066D;LINEAR A SIGN A321;Lo;0;L;;;;;N;;;;;
+ 1066E;LINEAR A SIGN A322;Lo;0;L;;;;;N;;;;;
+ 1066F;LINEAR A SIGN A323;Lo;0;L;;;;;N;;;;;
+ 10670;LINEAR A SIGN A324;Lo;0;L;;;;;N;;;;;
+ 10671;LINEAR A SIGN A325;Lo;0;L;;;;;N;;;;;
+ 10672;LINEAR A SIGN A326;Lo;0;L;;;;;N;;;;;
+ 10673;LINEAR A SIGN A327;Lo;0;L;;;;;N;;;;;
+ 10674;LINEAR A SIGN A328;Lo;0;L;;;;;N;;;;;
+ 10675;LINEAR A SIGN A329;Lo;0;L;;;;;N;;;;;
+ 10676;LINEAR A SIGN A330;Lo;0;L;;;;;N;;;;;
+ 10677;LINEAR A SIGN A331;Lo;0;L;;;;;N;;;;;
+ 10678;LINEAR A SIGN A332;Lo;0;L;;;;;N;;;;;
+ 10679;LINEAR A SIGN A333;Lo;0;L;;;;;N;;;;;
+ 1067A;LINEAR A SIGN A334;Lo;0;L;;;;;N;;;;;
+ 1067B;LINEAR A SIGN A335;Lo;0;L;;;;;N;;;;;
+ 1067C;LINEAR A SIGN A336;Lo;0;L;;;;;N;;;;;
+ 1067D;LINEAR A SIGN A337;Lo;0;L;;;;;N;;;;;
+ 1067E;LINEAR A SIGN A338;Lo;0;L;;;;;N;;;;;
+ 1067F;LINEAR A SIGN A339;Lo;0;L;;;;;N;;;;;
+ 10680;LINEAR A SIGN A340;Lo;0;L;;;;;N;;;;;
+ 10681;LINEAR A SIGN A341;Lo;0;L;;;;;N;;;;;
+ 10682;LINEAR A SIGN A342;Lo;0;L;;;;;N;;;;;
+ 10683;LINEAR A SIGN A343;Lo;0;L;;;;;N;;;;;
+ 10684;LINEAR A SIGN A344;Lo;0;L;;;;;N;;;;;
+ 10685;LINEAR A SIGN A345;Lo;0;L;;;;;N;;;;;
+ 10686;LINEAR A SIGN A346;Lo;0;L;;;;;N;;;;;
+ 10687;LINEAR A SIGN A347;Lo;0;L;;;;;N;;;;;
+ 10688;LINEAR A SIGN A348;Lo;0;L;;;;;N;;;;;
+ 10689;LINEAR A SIGN A349;Lo;0;L;;;;;N;;;;;
+ 1068A;LINEAR A SIGN A350;Lo;0;L;;;;;N;;;;;
+ 1068B;LINEAR A SIGN A351;Lo;0;L;;;;;N;;;;;
+ 1068C;LINEAR A SIGN A352;Lo;0;L;;;;;N;;;;;
+ 1068D;LINEAR A SIGN A353;Lo;0;L;;;;;N;;;;;
+ 1068E;LINEAR A SIGN A354;Lo;0;L;;;;;N;;;;;
+ 1068F;LINEAR A SIGN A355;Lo;0;L;;;;;N;;;;;
+ 10690;LINEAR A SIGN A356;Lo;0;L;;;;;N;;;;;
+ 10691;LINEAR A SIGN A357;Lo;0;L;;;;;N;;;;;
+ 10692;LINEAR A SIGN A358;Lo;0;L;;;;;N;;;;;
+ 10693;LINEAR A SIGN A359;Lo;0;L;;;;;N;;;;;
+ 10694;LINEAR A SIGN A360;Lo;0;L;;;;;N;;;;;
+ 10695;LINEAR A SIGN A361;Lo;0;L;;;;;N;;;;;
+ 10696;LINEAR A SIGN A362;Lo;0;L;;;;;N;;;;;
+ 10697;LINEAR A SIGN A363;Lo;0;L;;;;;N;;;;;
+ 10698;LINEAR A SIGN A364;Lo;0;L;;;;;N;;;;;
+ 10699;LINEAR A SIGN A365;Lo;0;L;;;;;N;;;;;
+ 1069A;LINEAR A SIGN A366;Lo;0;L;;;;;N;;;;;
+ 1069B;LINEAR A SIGN A367;Lo;0;L;;;;;N;;;;;
+ 1069C;LINEAR A SIGN A368;Lo;0;L;;;;;N;;;;;
+ 1069D;LINEAR A SIGN A369;Lo;0;L;;;;;N;;;;;
+ 1069E;LINEAR A SIGN A370;Lo;0;L;;;;;N;;;;;
+ 1069F;LINEAR A SIGN A371;Lo;0;L;;;;;N;;;;;
+ 106A0;LINEAR A SIGN A400-VAS;Lo;0;L;;;;;N;;;;;
+ 106A1;LINEAR A SIGN A401-VAS;Lo;0;L;;;;;N;;;;;
+ 106A2;LINEAR A SIGN A402-VAS;Lo;0;L;;;;;N;;;;;
+ 106A3;LINEAR A SIGN A403-VAS;Lo;0;L;;;;;N;;;;;
+ 106A4;LINEAR A SIGN A404-VAS;Lo;0;L;;;;;N;;;;;
+ 106A5;LINEAR A SIGN A405-VAS;Lo;0;L;;;;;N;;;;;
+ 106A6;LINEAR A SIGN A406-VAS;Lo;0;L;;;;;N;;;;;
+ 106A7;LINEAR A SIGN A407-VAS;Lo;0;L;;;;;N;;;;;
+ 106A8;LINEAR A SIGN A408-VAS;Lo;0;L;;;;;N;;;;;
+ 106A9;LINEAR A SIGN A409-VAS;Lo;0;L;;;;;N;;;;;
+ 106AA;LINEAR A SIGN A410-VAS;Lo;0;L;;;;;N;;;;;
+ 106AB;LINEAR A SIGN A411-VAS;Lo;0;L;;;;;N;;;;;
+ 106AC;LINEAR A SIGN A412-VAS;Lo;0;L;;;;;N;;;;;
+ 106AD;LINEAR A SIGN A413-VAS;Lo;0;L;;;;;N;;;;;
+ 106AE;LINEAR A SIGN A414-VAS;Lo;0;L;;;;;N;;;;;
+ 106AF;LINEAR A SIGN A415-VAS;Lo;0;L;;;;;N;;;;;
+ 106B0;LINEAR A SIGN A416-VAS;Lo;0;L;;;;;N;;;;;
+ 106B1;LINEAR A SIGN A417-VAS;Lo;0;L;;;;;N;;;;;
+ 106B2;LINEAR A SIGN A418-VAS;Lo;0;L;;;;;N;;;;;
+ 106B3;LINEAR A SIGN A501;Lo;0;L;;;;;N;;;;;
+ 106B4;LINEAR A SIGN A502;Lo;0;L;;;;;N;;;;;
+ 106B5;LINEAR A SIGN A503;Lo;0;L;;;;;N;;;;;
+ 106B6;LINEAR A SIGN A504;Lo;0;L;;;;;N;;;;;
+ 106B7;LINEAR A SIGN A505;Lo;0;L;;;;;N;;;;;
+ 106B8;LINEAR A SIGN A506;Lo;0;L;;;;;N;;;;;
+ 106B9;LINEAR A SIGN A508;Lo;0;L;;;;;N;;;;;
+ 106BA;LINEAR A SIGN A509;Lo;0;L;;;;;N;;;;;
+ 106BB;LINEAR A SIGN A510;Lo;0;L;;;;;N;;;;;
+ 106BC;LINEAR A SIGN A511;Lo;0;L;;;;;N;;;;;
+ 106BD;LINEAR A SIGN A512;Lo;0;L;;;;;N;;;;;
+ 106BE;LINEAR A SIGN A513;Lo;0;L;;;;;N;;;;;
+ 106BF;LINEAR A SIGN A515;Lo;0;L;;;;;N;;;;;
+ 106C0;LINEAR A SIGN A516;Lo;0;L;;;;;N;;;;;
+ 106C1;LINEAR A SIGN A520;Lo;0;L;;;;;N;;;;;
+ 106C2;LINEAR A SIGN A521;Lo;0;L;;;;;N;;;;;
+ 106C3;LINEAR A SIGN A523;Lo;0;L;;;;;N;;;;;
+ 106C4;LINEAR A SIGN A524;Lo;0;L;;;;;N;;;;;
+ 106C5;LINEAR A SIGN A525;Lo;0;L;;;;;N;;;;;
+ 106C6;LINEAR A SIGN A526;Lo;0;L;;;;;N;;;;;
+ 106C7;LINEAR A SIGN A527;Lo;0;L;;;;;N;;;;;
+ 106C8;LINEAR A SIGN A528;Lo;0;L;;;;;N;;;;;
+ 106C9;LINEAR A SIGN A529;Lo;0;L;;;;;N;;;;;
+ 106CA;LINEAR A SIGN A530;Lo;0;L;;;;;N;;;;;
+ 106CB;LINEAR A SIGN A531;Lo;0;L;;;;;N;;;;;
+ 106CC;LINEAR A SIGN A532;Lo;0;L;;;;;N;;;;;
+ 106CD;LINEAR A SIGN A534;Lo;0;L;;;;;N;;;;;
+ 106CE;LINEAR A SIGN A535;Lo;0;L;;;;;N;;;;;
+ 106CF;LINEAR A SIGN A536;Lo;0;L;;;;;N;;;;;
+ 106D0;LINEAR A SIGN A537;Lo;0;L;;;;;N;;;;;
+ 106D1;LINEAR A SIGN A538;Lo;0;L;;;;;N;;;;;
+ 106D2;LINEAR A SIGN A539;Lo;0;L;;;;;N;;;;;
+ 106D3;LINEAR A SIGN A540;Lo;0;L;;;;;N;;;;;
+ 106D4;LINEAR A SIGN A541;Lo;0;L;;;;;N;;;;;
+ 106D5;LINEAR A SIGN A542;Lo;0;L;;;;;N;;;;;
+ 106D6;LINEAR A SIGN A545;Lo;0;L;;;;;N;;;;;
+ 106D7;LINEAR A SIGN A547;Lo;0;L;;;;;N;;;;;
+ 106D8;LINEAR A SIGN A548;Lo;0;L;;;;;N;;;;;
+ 106D9;LINEAR A SIGN A549;Lo;0;L;;;;;N;;;;;
+ 106DA;LINEAR A SIGN A550;Lo;0;L;;;;;N;;;;;
+ 106DB;LINEAR A SIGN A551;Lo;0;L;;;;;N;;;;;
+ 106DC;LINEAR A SIGN A552;Lo;0;L;;;;;N;;;;;
+ 106DD;LINEAR A SIGN A553;Lo;0;L;;;;;N;;;;;
+ 106DE;LINEAR A SIGN A554;Lo;0;L;;;;;N;;;;;
+ 106DF;LINEAR A SIGN A555;Lo;0;L;;;;;N;;;;;
+ 106E0;LINEAR A SIGN A556;Lo;0;L;;;;;N;;;;;
+ 106E1;LINEAR A SIGN A557;Lo;0;L;;;;;N;;;;;
+ 106E2;LINEAR A SIGN A559;Lo;0;L;;;;;N;;;;;
+ 106E3;LINEAR A SIGN A563;Lo;0;L;;;;;N;;;;;
+ 106E4;LINEAR A SIGN A564;Lo;0;L;;;;;N;;;;;
+ 106E5;LINEAR A SIGN A565;Lo;0;L;;;;;N;;;;;
+ 106E6;LINEAR A SIGN A566;Lo;0;L;;;;;N;;;;;
+ 106E7;LINEAR A SIGN A568;Lo;0;L;;;;;N;;;;;
+ 106E8;LINEAR A SIGN A569;Lo;0;L;;;;;N;;;;;
+ 106E9;LINEAR A SIGN A570;Lo;0;L;;;;;N;;;;;
+ 106EA;LINEAR A SIGN A571;Lo;0;L;;;;;N;;;;;
+ 106EB;LINEAR A SIGN A572;Lo;0;L;;;;;N;;;;;
+ 106EC;LINEAR A SIGN A573;Lo;0;L;;;;;N;;;;;
+ 106ED;LINEAR A SIGN A574;Lo;0;L;;;;;N;;;;;
+ 106EE;LINEAR A SIGN A575;Lo;0;L;;;;;N;;;;;
+ 106EF;LINEAR A SIGN A576;Lo;0;L;;;;;N;;;;;
+ 106F0;LINEAR A SIGN A577;Lo;0;L;;;;;N;;;;;
+ 106F1;LINEAR A SIGN A578;Lo;0;L;;;;;N;;;;;
+ 106F2;LINEAR A SIGN A579;Lo;0;L;;;;;N;;;;;
+ 106F3;LINEAR A SIGN A580;Lo;0;L;;;;;N;;;;;
+ 106F4;LINEAR A SIGN A581;Lo;0;L;;;;;N;;;;;
+ 106F5;LINEAR A SIGN A582;Lo;0;L;;;;;N;;;;;
+ 106F6;LINEAR A SIGN A583;Lo;0;L;;;;;N;;;;;
+ 106F7;LINEAR A SIGN A584;Lo;0;L;;;;;N;;;;;
+ 106F8;LINEAR A SIGN A585;Lo;0;L;;;;;N;;;;;
+ 106F9;LINEAR A SIGN A586;Lo;0;L;;;;;N;;;;;
+ 106FA;LINEAR A SIGN A587;Lo;0;L;;;;;N;;;;;
+ 106FB;LINEAR A SIGN A588;Lo;0;L;;;;;N;;;;;
+ 106FC;LINEAR A SIGN A589;Lo;0;L;;;;;N;;;;;
+ 106FD;LINEAR A SIGN A591;Lo;0;L;;;;;N;;;;;
+ 106FE;LINEAR A SIGN A592;Lo;0;L;;;;;N;;;;;
+ 106FF;LINEAR A SIGN A594;Lo;0;L;;;;;N;;;;;
+ 10700;LINEAR A SIGN A595;Lo;0;L;;;;;N;;;;;
+ 10701;LINEAR A SIGN A596;Lo;0;L;;;;;N;;;;;
+ 10702;LINEAR A SIGN A598;Lo;0;L;;;;;N;;;;;
+ 10703;LINEAR A SIGN A600;Lo;0;L;;;;;N;;;;;
+ 10704;LINEAR A SIGN A601;Lo;0;L;;;;;N;;;;;
+ 10705;LINEAR A SIGN A602;Lo;0;L;;;;;N;;;;;
+ 10706;LINEAR A SIGN A603;Lo;0;L;;;;;N;;;;;
+ 10707;LINEAR A SIGN A604;Lo;0;L;;;;;N;;;;;
+ 10708;LINEAR A SIGN A606;Lo;0;L;;;;;N;;;;;
+ 10709;LINEAR A SIGN A608;Lo;0;L;;;;;N;;;;;
+ 1070A;LINEAR A SIGN A609;Lo;0;L;;;;;N;;;;;
+ 1070B;LINEAR A SIGN A610;Lo;0;L;;;;;N;;;;;
+ 1070C;LINEAR A SIGN A611;Lo;0;L;;;;;N;;;;;
+ 1070D;LINEAR A SIGN A612;Lo;0;L;;;;;N;;;;;
+ 1070E;LINEAR A SIGN A613;Lo;0;L;;;;;N;;;;;
+ 1070F;LINEAR A SIGN A614;Lo;0;L;;;;;N;;;;;
+ 10710;LINEAR A SIGN A615;Lo;0;L;;;;;N;;;;;
+ 10711;LINEAR A SIGN A616;Lo;0;L;;;;;N;;;;;
+ 10712;LINEAR A SIGN A617;Lo;0;L;;;;;N;;;;;
+ 10713;LINEAR A SIGN A618;Lo;0;L;;;;;N;;;;;
+ 10714;LINEAR A SIGN A619;Lo;0;L;;;;;N;;;;;
+ 10715;LINEAR A SIGN A620;Lo;0;L;;;;;N;;;;;
+ 10716;LINEAR A SIGN A621;Lo;0;L;;;;;N;;;;;
+ 10717;LINEAR A SIGN A622;Lo;0;L;;;;;N;;;;;
+ 10718;LINEAR A SIGN A623;Lo;0;L;;;;;N;;;;;
+ 10719;LINEAR A SIGN A624;Lo;0;L;;;;;N;;;;;
+ 1071A;LINEAR A SIGN A626;Lo;0;L;;;;;N;;;;;
+ 1071B;LINEAR A SIGN A627;Lo;0;L;;;;;N;;;;;
+ 1071C;LINEAR A SIGN A628;Lo;0;L;;;;;N;;;;;
+ 1071D;LINEAR A SIGN A629;Lo;0;L;;;;;N;;;;;
+ 1071E;LINEAR A SIGN A634;Lo;0;L;;;;;N;;;;;
+ 1071F;LINEAR A SIGN A637;Lo;0;L;;;;;N;;;;;
+ 10720;LINEAR A SIGN A638;Lo;0;L;;;;;N;;;;;
+ 10721;LINEAR A SIGN A640;Lo;0;L;;;;;N;;;;;
+ 10722;LINEAR A SIGN A642;Lo;0;L;;;;;N;;;;;
+ 10723;LINEAR A SIGN A643;Lo;0;L;;;;;N;;;;;
+ 10724;LINEAR A SIGN A644;Lo;0;L;;;;;N;;;;;
+ 10725;LINEAR A SIGN A645;Lo;0;L;;;;;N;;;;;
+ 10726;LINEAR A SIGN A646;Lo;0;L;;;;;N;;;;;
+ 10727;LINEAR A SIGN A648;Lo;0;L;;;;;N;;;;;
+ 10728;LINEAR A SIGN A649;Lo;0;L;;;;;N;;;;;
+ 10729;LINEAR A SIGN A651;Lo;0;L;;;;;N;;;;;
+ 1072A;LINEAR A SIGN A652;Lo;0;L;;;;;N;;;;;
+ 1072B;LINEAR A SIGN A653;Lo;0;L;;;;;N;;;;;
+ 1072C;LINEAR A SIGN A654;Lo;0;L;;;;;N;;;;;
+ 1072D;LINEAR A SIGN A655;Lo;0;L;;;;;N;;;;;
+ 1072E;LINEAR A SIGN A656;Lo;0;L;;;;;N;;;;;
+ 1072F;LINEAR A SIGN A657;Lo;0;L;;;;;N;;;;;
+ 10730;LINEAR A SIGN A658;Lo;0;L;;;;;N;;;;;
+ 10731;LINEAR A SIGN A659;Lo;0;L;;;;;N;;;;;
+ 10732;LINEAR A SIGN A660;Lo;0;L;;;;;N;;;;;
+ 10733;LINEAR A SIGN A661;Lo;0;L;;;;;N;;;;;
+ 10734;LINEAR A SIGN A662;Lo;0;L;;;;;N;;;;;
+ 10735;LINEAR A SIGN A663;Lo;0;L;;;;;N;;;;;
+ 10736;LINEAR A SIGN A664;Lo;0;L;;;;;N;;;;;
+ 10740;LINEAR A SIGN A701 A;Lo;0;L;;;;;N;;;;;
+ 10741;LINEAR A SIGN A702 B;Lo;0;L;;;;;N;;;;;
+ 10742;LINEAR A SIGN A703 D;Lo;0;L;;;;;N;;;;;
+ 10743;LINEAR A SIGN A704 E;Lo;0;L;;;;;N;;;;;
+ 10744;LINEAR A SIGN A705 F;Lo;0;L;;;;;N;;;;;
+ 10745;LINEAR A SIGN A706 H;Lo;0;L;;;;;N;;;;;
+ 10746;LINEAR A SIGN A707 J;Lo;0;L;;;;;N;;;;;
+ 10747;LINEAR A SIGN A708 K;Lo;0;L;;;;;N;;;;;
+ 10748;LINEAR A SIGN A709 L;Lo;0;L;;;;;N;;;;;
+ 10749;LINEAR A SIGN A709-2 L2;Lo;0;L;;;;;N;;;;;
+ 1074A;LINEAR A SIGN A709-3 L3;Lo;0;L;;;;;N;;;;;
+ 1074B;LINEAR A SIGN A709-4 L4;Lo;0;L;;;;;N;;;;;
+ 1074C;LINEAR A SIGN A709-6 L6;Lo;0;L;;;;;N;;;;;
+ 1074D;LINEAR A SIGN A710 W;Lo;0;L;;;;;N;;;;;
+ 1074E;LINEAR A SIGN A711 X;Lo;0;L;;;;;N;;;;;
+ 1074F;LINEAR A SIGN A712 Y;Lo;0;L;;;;;N;;;;;
+ 10750;LINEAR A SIGN A713 OMEGA;Lo;0;L;;;;;N;;;;;
+ 10751;LINEAR A SIGN A714 ABB;Lo;0;L;;;;;N;;;;;
+ 10752;LINEAR A SIGN A715 BB;Lo;0;L;;;;;N;;;;;
+ 10753;LINEAR A SIGN A717 DD;Lo;0;L;;;;;N;;;;;
+ 10754;LINEAR A SIGN A726 EYYY;Lo;0;L;;;;;N;;;;;
+ 10755;LINEAR A SIGN A732 JE;Lo;0;L;;;;;N;;;;;
+ 10760;LINEAR A SIGN A800;Lo;0;L;;;;;N;;;;;
+ 10761;LINEAR A SIGN A801;Lo;0;L;;;;;N;;;;;
+ 10762;LINEAR A SIGN A802;Lo;0;L;;;;;N;;;;;
+ 10763;LINEAR A SIGN A803;Lo;0;L;;;;;N;;;;;
+ 10764;LINEAR A SIGN A804;Lo;0;L;;;;;N;;;;;
+ 10765;LINEAR A SIGN A805;Lo;0;L;;;;;N;;;;;
+ 10766;LINEAR A SIGN A806;Lo;0;L;;;;;N;;;;;
+ 10767;LINEAR A SIGN A807;Lo;0;L;;;;;N;;;;;
+ 10800;CYPRIOT SYLLABLE A;Lo;0;R;;;;;N;;;;;
+ 10801;CYPRIOT SYLLABLE E;Lo;0;R;;;;;N;;;;;
+ 10802;CYPRIOT SYLLABLE I;Lo;0;R;;;;;N;;;;;
+ 10803;CYPRIOT SYLLABLE O;Lo;0;R;;;;;N;;;;;
+ 10804;CYPRIOT SYLLABLE U;Lo;0;R;;;;;N;;;;;
+ 10805;CYPRIOT SYLLABLE JA;Lo;0;R;;;;;N;;;;;
+ 10808;CYPRIOT SYLLABLE JO;Lo;0;R;;;;;N;;;;;
+ 1080A;CYPRIOT SYLLABLE KA;Lo;0;R;;;;;N;;;;;
+ 1080B;CYPRIOT SYLLABLE KE;Lo;0;R;;;;;N;;;;;
+ 1080C;CYPRIOT SYLLABLE KI;Lo;0;R;;;;;N;;;;;
+ 1080D;CYPRIOT SYLLABLE KO;Lo;0;R;;;;;N;;;;;
+ 1080E;CYPRIOT SYLLABLE KU;Lo;0;R;;;;;N;;;;;
+ 1080F;CYPRIOT SYLLABLE LA;Lo;0;R;;;;;N;;;;;
+ 10810;CYPRIOT SYLLABLE LE;Lo;0;R;;;;;N;;;;;
+ 10811;CYPRIOT SYLLABLE LI;Lo;0;R;;;;;N;;;;;
+ 10812;CYPRIOT SYLLABLE LO;Lo;0;R;;;;;N;;;;;
+ 10813;CYPRIOT SYLLABLE LU;Lo;0;R;;;;;N;;;;;
+ 10814;CYPRIOT SYLLABLE MA;Lo;0;R;;;;;N;;;;;
+ 10815;CYPRIOT SYLLABLE ME;Lo;0;R;;;;;N;;;;;
+ 10816;CYPRIOT SYLLABLE MI;Lo;0;R;;;;;N;;;;;
+ 10817;CYPRIOT SYLLABLE MO;Lo;0;R;;;;;N;;;;;
+ 10818;CYPRIOT SYLLABLE MU;Lo;0;R;;;;;N;;;;;
+ 10819;CYPRIOT SYLLABLE NA;Lo;0;R;;;;;N;;;;;
+ 1081A;CYPRIOT SYLLABLE NE;Lo;0;R;;;;;N;;;;;
+ 1081B;CYPRIOT SYLLABLE NI;Lo;0;R;;;;;N;;;;;
+ 1081C;CYPRIOT SYLLABLE NO;Lo;0;R;;;;;N;;;;;
+ 1081D;CYPRIOT SYLLABLE NU;Lo;0;R;;;;;N;;;;;
+ 1081E;CYPRIOT SYLLABLE PA;Lo;0;R;;;;;N;;;;;
+ 1081F;CYPRIOT SYLLABLE PE;Lo;0;R;;;;;N;;;;;
+ 10820;CYPRIOT SYLLABLE PI;Lo;0;R;;;;;N;;;;;
+ 10821;CYPRIOT SYLLABLE PO;Lo;0;R;;;;;N;;;;;
+ 10822;CYPRIOT SYLLABLE PU;Lo;0;R;;;;;N;;;;;
+ 10823;CYPRIOT SYLLABLE RA;Lo;0;R;;;;;N;;;;;
+ 10824;CYPRIOT SYLLABLE RE;Lo;0;R;;;;;N;;;;;
+ 10825;CYPRIOT SYLLABLE RI;Lo;0;R;;;;;N;;;;;
+ 10826;CYPRIOT SYLLABLE RO;Lo;0;R;;;;;N;;;;;
+ 10827;CYPRIOT SYLLABLE RU;Lo;0;R;;;;;N;;;;;
+ 10828;CYPRIOT SYLLABLE SA;Lo;0;R;;;;;N;;;;;
+ 10829;CYPRIOT SYLLABLE SE;Lo;0;R;;;;;N;;;;;
+ 1082A;CYPRIOT SYLLABLE SI;Lo;0;R;;;;;N;;;;;
+ 1082B;CYPRIOT SYLLABLE SO;Lo;0;R;;;;;N;;;;;
+ 1082C;CYPRIOT SYLLABLE SU;Lo;0;R;;;;;N;;;;;
+ 1082D;CYPRIOT SYLLABLE TA;Lo;0;R;;;;;N;;;;;
+ 1082E;CYPRIOT SYLLABLE TE;Lo;0;R;;;;;N;;;;;
+ 1082F;CYPRIOT SYLLABLE TI;Lo;0;R;;;;;N;;;;;
+ 10830;CYPRIOT SYLLABLE TO;Lo;0;R;;;;;N;;;;;
+ 10831;CYPRIOT SYLLABLE TU;Lo;0;R;;;;;N;;;;;
+ 10832;CYPRIOT SYLLABLE WA;Lo;0;R;;;;;N;;;;;
+ 10833;CYPRIOT SYLLABLE WE;Lo;0;R;;;;;N;;;;;
+ 10834;CYPRIOT SYLLABLE WI;Lo;0;R;;;;;N;;;;;
+ 10835;CYPRIOT SYLLABLE WO;Lo;0;R;;;;;N;;;;;
+ 10837;CYPRIOT SYLLABLE XA;Lo;0;R;;;;;N;;;;;
+ 10838;CYPRIOT SYLLABLE XE;Lo;0;R;;;;;N;;;;;
+ 1083C;CYPRIOT SYLLABLE ZA;Lo;0;R;;;;;N;;;;;
+ 1083F;CYPRIOT SYLLABLE ZO;Lo;0;R;;;;;N;;;;;
+ 10840;IMPERIAL ARAMAIC LETTER ALEPH;Lo;0;R;;;;;N;;;;;
+ 10841;IMPERIAL ARAMAIC LETTER BETH;Lo;0;R;;;;;N;;;;;
+ 10842;IMPERIAL ARAMAIC LETTER GIMEL;Lo;0;R;;;;;N;;;;;
+ 10843;IMPERIAL ARAMAIC LETTER DALETH;Lo;0;R;;;;;N;;;;;
+ 10844;IMPERIAL ARAMAIC LETTER HE;Lo;0;R;;;;;N;;;;;
+ 10845;IMPERIAL ARAMAIC LETTER WAW;Lo;0;R;;;;;N;;;;;
+ 10846;IMPERIAL ARAMAIC LETTER ZAYIN;Lo;0;R;;;;;N;;;;;
+ 10847;IMPERIAL ARAMAIC LETTER HETH;Lo;0;R;;;;;N;;;;;
+ 10848;IMPERIAL ARAMAIC LETTER TETH;Lo;0;R;;;;;N;;;;;
+ 10849;IMPERIAL ARAMAIC LETTER YODH;Lo;0;R;;;;;N;;;;;
+ 1084A;IMPERIAL ARAMAIC LETTER KAPH;Lo;0;R;;;;;N;;;;;
+ 1084B;IMPERIAL ARAMAIC LETTER LAMEDH;Lo;0;R;;;;;N;;;;;
+ 1084C;IMPERIAL ARAMAIC LETTER MEM;Lo;0;R;;;;;N;;;;;
+ 1084D;IMPERIAL ARAMAIC LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 1084E;IMPERIAL ARAMAIC LETTER SAMEKH;Lo;0;R;;;;;N;;;;;
+ 1084F;IMPERIAL ARAMAIC LETTER AYIN;Lo;0;R;;;;;N;;;;;
+ 10850;IMPERIAL ARAMAIC LETTER PE;Lo;0;R;;;;;N;;;;;
+ 10851;IMPERIAL ARAMAIC LETTER SADHE;Lo;0;R;;;;;N;;;;;
+ 10852;IMPERIAL ARAMAIC LETTER QOPH;Lo;0;R;;;;;N;;;;;
+ 10853;IMPERIAL ARAMAIC LETTER RESH;Lo;0;R;;;;;N;;;;;
+ 10854;IMPERIAL ARAMAIC LETTER SHIN;Lo;0;R;;;;;N;;;;;
+ 10855;IMPERIAL ARAMAIC LETTER TAW;Lo;0;R;;;;;N;;;;;
+ 10857;IMPERIAL ARAMAIC SECTION SIGN;Po;0;R;;;;;N;;;;;
+ 10858;IMPERIAL ARAMAIC NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 10859;IMPERIAL ARAMAIC NUMBER TWO;No;0;R;;;;2;N;;;;;
+ 1085A;IMPERIAL ARAMAIC NUMBER THREE;No;0;R;;;;3;N;;;;;
+ 1085B;IMPERIAL ARAMAIC NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 1085C;IMPERIAL ARAMAIC NUMBER TWENTY;No;0;R;;;;20;N;;;;;
+ 1085D;IMPERIAL ARAMAIC NUMBER ONE HUNDRED;No;0;R;;;;100;N;;;;;
+ 1085E;IMPERIAL ARAMAIC NUMBER ONE THOUSAND;No;0;R;;;;1000;N;;;;;
+ 1085F;IMPERIAL ARAMAIC NUMBER TEN THOUSAND;No;0;R;;;;10000;N;;;;;
+ 10860;PALMYRENE LETTER ALEPH;Lo;0;R;;;;;N;;;;;
+ 10861;PALMYRENE LETTER BETH;Lo;0;R;;;;;N;;;;;
+ 10862;PALMYRENE LETTER GIMEL;Lo;0;R;;;;;N;;;;;
+ 10863;PALMYRENE LETTER DALETH;Lo;0;R;;;;;N;;;;;
+ 10864;PALMYRENE LETTER HE;Lo;0;R;;;;;N;;;;;
+ 10865;PALMYRENE LETTER WAW;Lo;0;R;;;;;N;;;;;
+ 10866;PALMYRENE LETTER ZAYIN;Lo;0;R;;;;;N;;;;;
+ 10867;PALMYRENE LETTER HETH;Lo;0;R;;;;;N;;;;;
+ 10868;PALMYRENE LETTER TETH;Lo;0;R;;;;;N;;;;;
+ 10869;PALMYRENE LETTER YODH;Lo;0;R;;;;;N;;;;;
+ 1086A;PALMYRENE LETTER KAPH;Lo;0;R;;;;;N;;;;;
+ 1086B;PALMYRENE LETTER LAMEDH;Lo;0;R;;;;;N;;;;;
+ 1086C;PALMYRENE LETTER MEM;Lo;0;R;;;;;N;;;;;
+ 1086D;PALMYRENE LETTER FINAL NUN;Lo;0;R;;;;;N;;;;;
+ 1086E;PALMYRENE LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 1086F;PALMYRENE LETTER SAMEKH;Lo;0;R;;;;;N;;;;;
+ 10870;PALMYRENE LETTER AYIN;Lo;0;R;;;;;N;;;;;
+ 10871;PALMYRENE LETTER PE;Lo;0;R;;;;;N;;;;;
+ 10872;PALMYRENE LETTER SADHE;Lo;0;R;;;;;N;;;;;
+ 10873;PALMYRENE LETTER QOPH;Lo;0;R;;;;;N;;;;;
+ 10874;PALMYRENE LETTER RESH;Lo;0;R;;;;;N;;;;;
+ 10875;PALMYRENE LETTER SHIN;Lo;0;R;;;;;N;;;;;
+ 10876;PALMYRENE LETTER TAW;Lo;0;R;;;;;N;;;;;
+ 10877;PALMYRENE LEFT-POINTING FLEURON;So;0;R;;;;;N;;;;;
+ 10878;PALMYRENE RIGHT-POINTING FLEURON;So;0;R;;;;;N;;;;;
+ 10879;PALMYRENE NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 1087A;PALMYRENE NUMBER TWO;No;0;R;;;;2;N;;;;;
+ 1087B;PALMYRENE NUMBER THREE;No;0;R;;;;3;N;;;;;
+ 1087C;PALMYRENE NUMBER FOUR;No;0;R;;;;4;N;;;;;
+ 1087D;PALMYRENE NUMBER FIVE;No;0;R;;;;5;N;;;;;
+ 1087E;PALMYRENE NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 1087F;PALMYRENE NUMBER TWENTY;No;0;R;;;;20;N;;;;;
+ 10880;NABATAEAN LETTER FINAL ALEPH;Lo;0;R;;;;;N;;;;;
+ 10881;NABATAEAN LETTER ALEPH;Lo;0;R;;;;;N;;;;;
+ 10882;NABATAEAN LETTER FINAL BETH;Lo;0;R;;;;;N;;;;;
+ 10883;NABATAEAN LETTER BETH;Lo;0;R;;;;;N;;;;;
+ 10884;NABATAEAN LETTER GIMEL;Lo;0;R;;;;;N;;;;;
+ 10885;NABATAEAN LETTER DALETH;Lo;0;R;;;;;N;;;;;
+ 10886;NABATAEAN LETTER FINAL HE;Lo;0;R;;;;;N;;;;;
+ 10887;NABATAEAN LETTER HE;Lo;0;R;;;;;N;;;;;
+ 10888;NABATAEAN LETTER WAW;Lo;0;R;;;;;N;;;;;
+ 10889;NABATAEAN LETTER ZAYIN;Lo;0;R;;;;;N;;;;;
+ 1088A;NABATAEAN LETTER HETH;Lo;0;R;;;;;N;;;;;
+ 1088B;NABATAEAN LETTER TETH;Lo;0;R;;;;;N;;;;;
+ 1088C;NABATAEAN LETTER FINAL YODH;Lo;0;R;;;;;N;;;;;
+ 1088D;NABATAEAN LETTER YODH;Lo;0;R;;;;;N;;;;;
+ 1088E;NABATAEAN LETTER FINAL KAPH;Lo;0;R;;;;;N;;;;;
+ 1088F;NABATAEAN LETTER KAPH;Lo;0;R;;;;;N;;;;;
+ 10890;NABATAEAN LETTER FINAL LAMEDH;Lo;0;R;;;;;N;;;;;
+ 10891;NABATAEAN LETTER LAMEDH;Lo;0;R;;;;;N;;;;;
+ 10892;NABATAEAN LETTER FINAL MEM;Lo;0;R;;;;;N;;;;;
+ 10893;NABATAEAN LETTER MEM;Lo;0;R;;;;;N;;;;;
+ 10894;NABATAEAN LETTER FINAL NUN;Lo;0;R;;;;;N;;;;;
+ 10895;NABATAEAN LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 10896;NABATAEAN LETTER SAMEKH;Lo;0;R;;;;;N;;;;;
+ 10897;NABATAEAN LETTER AYIN;Lo;0;R;;;;;N;;;;;
+ 10898;NABATAEAN LETTER PE;Lo;0;R;;;;;N;;;;;
+ 10899;NABATAEAN LETTER SADHE;Lo;0;R;;;;;N;;;;;
+ 1089A;NABATAEAN LETTER QOPH;Lo;0;R;;;;;N;;;;;
+ 1089B;NABATAEAN LETTER RESH;Lo;0;R;;;;;N;;;;;
+ 1089C;NABATAEAN LETTER FINAL SHIN;Lo;0;R;;;;;N;;;;;
+ 1089D;NABATAEAN LETTER SHIN;Lo;0;R;;;;;N;;;;;
+ 1089E;NABATAEAN LETTER TAW;Lo;0;R;;;;;N;;;;;
+ 108A7;NABATAEAN NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 108A8;NABATAEAN NUMBER TWO;No;0;R;;;;2;N;;;;;
+ 108A9;NABATAEAN NUMBER THREE;No;0;R;;;;3;N;;;;;
+ 108AA;NABATAEAN NUMBER FOUR;No;0;R;;;;4;N;;;;;
+ 108AB;NABATAEAN CRUCIFORM NUMBER FOUR;No;0;R;;;;4;N;;;;;
+ 108AC;NABATAEAN NUMBER FIVE;No;0;R;;;;5;N;;;;;
+ 108AD;NABATAEAN NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 108AE;NABATAEAN NUMBER TWENTY;No;0;R;;;;20;N;;;;;
+ 108AF;NABATAEAN NUMBER ONE HUNDRED;No;0;R;;;;100;N;;;;;
+ 108E0;HATRAN LETTER ALEPH;Lo;0;R;;;;;N;;;;;
+ 108E1;HATRAN LETTER BETH;Lo;0;R;;;;;N;;;;;
+ 108E2;HATRAN LETTER GIMEL;Lo;0;R;;;;;N;;;;;
+ 108E3;HATRAN LETTER DALETH-RESH;Lo;0;R;;;;;N;;;;;
+ 108E4;HATRAN LETTER HE;Lo;0;R;;;;;N;;;;;
+ 108E5;HATRAN LETTER WAW;Lo;0;R;;;;;N;;;;;
+ 108E6;HATRAN LETTER ZAYN;Lo;0;R;;;;;N;;;;;
+ 108E7;HATRAN LETTER HETH;Lo;0;R;;;;;N;;;;;
+ 108E8;HATRAN LETTER TETH;Lo;0;R;;;;;N;;;;;
+ 108E9;HATRAN LETTER YODH;Lo;0;R;;;;;N;;;;;
+ 108EA;HATRAN LETTER KAPH;Lo;0;R;;;;;N;;;;;
+ 108EB;HATRAN LETTER LAMEDH;Lo;0;R;;;;;N;;;;;
+ 108EC;HATRAN LETTER MEM;Lo;0;R;;;;;N;;;;;
+ 108ED;HATRAN LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 108EE;HATRAN LETTER SAMEKH;Lo;0;R;;;;;N;;;;;
+ 108EF;HATRAN LETTER AYN;Lo;0;R;;;;;N;;;;;
+ 108F0;HATRAN LETTER PE;Lo;0;R;;;;;N;;;;;
+ 108F1;HATRAN LETTER SADHE;Lo;0;R;;;;;N;;;;;
+ 108F2;HATRAN LETTER QOPH;Lo;0;R;;;;;N;;;;;
+ 108F4;HATRAN LETTER SHIN;Lo;0;R;;;;;N;;;;;
+ 108F5;HATRAN LETTER TAW;Lo;0;R;;;;;N;;;;;
+ 108FB;HATRAN NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 108FC;HATRAN NUMBER FIVE;No;0;R;;;;5;N;;;;;
+ 108FD;HATRAN NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 108FE;HATRAN NUMBER TWENTY;No;0;R;;;;20;N;;;;;
+ 108FF;HATRAN NUMBER ONE HUNDRED;No;0;R;;;;100;N;;;;;
+ 10900;PHOENICIAN LETTER ALF;Lo;0;R;;;;;N;;;;;
+ 10901;PHOENICIAN LETTER BET;Lo;0;R;;;;;N;;;;;
+ 10902;PHOENICIAN LETTER GAML;Lo;0;R;;;;;N;;;;;
+ 10903;PHOENICIAN LETTER DELT;Lo;0;R;;;;;N;;;;;
+ 10904;PHOENICIAN LETTER HE;Lo;0;R;;;;;N;;;;;
+ 10905;PHOENICIAN LETTER WAU;Lo;0;R;;;;;N;;;;;
+ 10906;PHOENICIAN LETTER ZAI;Lo;0;R;;;;;N;;;;;
+ 10907;PHOENICIAN LETTER HET;Lo;0;R;;;;;N;;;;;
+ 10908;PHOENICIAN LETTER TET;Lo;0;R;;;;;N;;;;;
+ 10909;PHOENICIAN LETTER YOD;Lo;0;R;;;;;N;;;;;
+ 1090A;PHOENICIAN LETTER KAF;Lo;0;R;;;;;N;;;;;
+ 1090B;PHOENICIAN LETTER LAMD;Lo;0;R;;;;;N;;;;;
+ 1090C;PHOENICIAN LETTER MEM;Lo;0;R;;;;;N;;;;;
+ 1090D;PHOENICIAN LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 1090E;PHOENICIAN LETTER SEMK;Lo;0;R;;;;;N;;;;;
+ 1090F;PHOENICIAN LETTER AIN;Lo;0;R;;;;;N;;;;;
+ 10910;PHOENICIAN LETTER PE;Lo;0;R;;;;;N;;;;;
+ 10911;PHOENICIAN LETTER SADE;Lo;0;R;;;;;N;;;;;
+ 10912;PHOENICIAN LETTER QOF;Lo;0;R;;;;;N;;;;;
+ 10913;PHOENICIAN LETTER ROSH;Lo;0;R;;;;;N;;;;;
+ 10914;PHOENICIAN LETTER SHIN;Lo;0;R;;;;;N;;;;;
+ 10915;PHOENICIAN LETTER TAU;Lo;0;R;;;;;N;;;;;
+ 10916;PHOENICIAN NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 10917;PHOENICIAN NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 10918;PHOENICIAN NUMBER TWENTY;No;0;R;;;;20;N;;;;;
+ 10919;PHOENICIAN NUMBER ONE HUNDRED;No;0;R;;;;100;N;;;;;
+ 1091A;PHOENICIAN NUMBER TWO;No;0;R;;;;2;N;;;;;
+ 1091B;PHOENICIAN NUMBER THREE;No;0;R;;;;3;N;;;;;
+ 1091F;PHOENICIAN WORD SEPARATOR;Po;0;ON;;;;;N;;;;;
+ 10920;LYDIAN LETTER A;Lo;0;R;;;;;N;;;;;
+ 10921;LYDIAN LETTER B;Lo;0;R;;;;;N;;;;;
+ 10922;LYDIAN LETTER G;Lo;0;R;;;;;N;;;;;
+ 10923;LYDIAN LETTER D;Lo;0;R;;;;;N;;;;;
+ 10924;LYDIAN LETTER E;Lo;0;R;;;;;N;;;;;
+ 10925;LYDIAN LETTER V;Lo;0;R;;;;;N;;;;;
+ 10926;LYDIAN LETTER I;Lo;0;R;;;;;N;;;;;
+ 10927;LYDIAN LETTER Y;Lo;0;R;;;;;N;;;;;
+ 10928;LYDIAN LETTER K;Lo;0;R;;;;;N;;;;;
+ 10929;LYDIAN LETTER L;Lo;0;R;;;;;N;;;;;
+ 1092A;LYDIAN LETTER M;Lo;0;R;;;;;N;;;;;
+ 1092B;LYDIAN LETTER N;Lo;0;R;;;;;N;;;;;
+ 1092C;LYDIAN LETTER O;Lo;0;R;;;;;N;;;;;
+ 1092D;LYDIAN LETTER R;Lo;0;R;;;;;N;;;;;
+ 1092E;LYDIAN LETTER SS;Lo;0;R;;;;;N;;;;;
+ 1092F;LYDIAN LETTER T;Lo;0;R;;;;;N;;;;;
+ 10930;LYDIAN LETTER U;Lo;0;R;;;;;N;;;;;
+ 10931;LYDIAN LETTER F;Lo;0;R;;;;;N;;;;;
+ 10932;LYDIAN LETTER Q;Lo;0;R;;;;;N;;;;;
+ 10933;LYDIAN LETTER S;Lo;0;R;;;;;N;;;;;
+ 10934;LYDIAN LETTER TT;Lo;0;R;;;;;N;;;;;
+ 10935;LYDIAN LETTER AN;Lo;0;R;;;;;N;;;;;
+ 10936;LYDIAN LETTER EN;Lo;0;R;;;;;N;;;;;
+ 10937;LYDIAN LETTER LY;Lo;0;R;;;;;N;;;;;
+ 10938;LYDIAN LETTER NN;Lo;0;R;;;;;N;;;;;
+ 10939;LYDIAN LETTER C;Lo;0;R;;;;;N;;;;;
+ 1093F;LYDIAN TRIANGULAR MARK;Po;0;R;;;;;N;;;;;
+ 10980;MEROITIC HIEROGLYPHIC LETTER A;Lo;0;R;;;;;N;;;;;
+ 10981;MEROITIC HIEROGLYPHIC LETTER E;Lo;0;R;;;;;N;;;;;
+ 10982;MEROITIC HIEROGLYPHIC LETTER I;Lo;0;R;;;;;N;;;;;
+ 10983;MEROITIC HIEROGLYPHIC LETTER O;Lo;0;R;;;;;N;;;;;
+ 10984;MEROITIC HIEROGLYPHIC LETTER YA;Lo;0;R;;;;;N;;;;;
+ 10985;MEROITIC HIEROGLYPHIC LETTER WA;Lo;0;R;;;;;N;;;;;
+ 10986;MEROITIC HIEROGLYPHIC LETTER BA;Lo;0;R;;;;;N;;;;;
+ 10987;MEROITIC HIEROGLYPHIC LETTER BA-2;Lo;0;R;;;;;N;;;;;
+ 10988;MEROITIC HIEROGLYPHIC LETTER PA;Lo;0;R;;;;;N;;;;;
+ 10989;MEROITIC HIEROGLYPHIC LETTER MA;Lo;0;R;;;;;N;;;;;
+ 1098A;MEROITIC HIEROGLYPHIC LETTER NA;Lo;0;R;;;;;N;;;;;
+ 1098B;MEROITIC HIEROGLYPHIC LETTER NA-2;Lo;0;R;;;;;N;;;;;
+ 1098C;MEROITIC HIEROGLYPHIC LETTER NE;Lo;0;R;;;;;N;;;;;
+ 1098D;MEROITIC HIEROGLYPHIC LETTER NE-2;Lo;0;R;;;;;N;;;;;
+ 1098E;MEROITIC HIEROGLYPHIC LETTER RA;Lo;0;R;;;;;N;;;;;
+ 1098F;MEROITIC HIEROGLYPHIC LETTER RA-2;Lo;0;R;;;;;N;;;;;
+ 10990;MEROITIC HIEROGLYPHIC LETTER LA;Lo;0;R;;;;;N;;;;;
+ 10991;MEROITIC HIEROGLYPHIC LETTER KHA;Lo;0;R;;;;;N;;;;;
+ 10992;MEROITIC HIEROGLYPHIC LETTER HHA;Lo;0;R;;;;;N;;;;;
+ 10993;MEROITIC HIEROGLYPHIC LETTER SA;Lo;0;R;;;;;N;;;;;
+ 10994;MEROITIC HIEROGLYPHIC LETTER SA-2;Lo;0;R;;;;;N;;;;;
+ 10995;MEROITIC HIEROGLYPHIC LETTER SE;Lo;0;R;;;;;N;;;;;
+ 10996;MEROITIC HIEROGLYPHIC LETTER KA;Lo;0;R;;;;;N;;;;;
+ 10997;MEROITIC HIEROGLYPHIC LETTER QA;Lo;0;R;;;;;N;;;;;
+ 10998;MEROITIC HIEROGLYPHIC LETTER TA;Lo;0;R;;;;;N;;;;;
+ 10999;MEROITIC HIEROGLYPHIC LETTER TA-2;Lo;0;R;;;;;N;;;;;
+ 1099A;MEROITIC HIEROGLYPHIC LETTER TE;Lo;0;R;;;;;N;;;;;
+ 1099B;MEROITIC HIEROGLYPHIC LETTER TE-2;Lo;0;R;;;;;N;;;;;
+ 1099C;MEROITIC HIEROGLYPHIC LETTER TO;Lo;0;R;;;;;N;;;;;
+ 1099D;MEROITIC HIEROGLYPHIC LETTER DA;Lo;0;R;;;;;N;;;;;
+ 1099E;MEROITIC HIEROGLYPHIC SYMBOL VIDJ;Lo;0;R;;;;;N;;;;;
+ 1099F;MEROITIC HIEROGLYPHIC SYMBOL VIDJ-2;Lo;0;R;;;;;N;;;;;
+ 109A0;MEROITIC CURSIVE LETTER A;Lo;0;R;;;;;N;;;;;
+ 109A1;MEROITIC CURSIVE LETTER E;Lo;0;R;;;;;N;;;;;
+ 109A2;MEROITIC CURSIVE LETTER I;Lo;0;R;;;;;N;;;;;
+ 109A3;MEROITIC CURSIVE LETTER O;Lo;0;R;;;;;N;;;;;
+ 109A4;MEROITIC CURSIVE LETTER YA;Lo;0;R;;;;;N;;;;;
+ 109A5;MEROITIC CURSIVE LETTER WA;Lo;0;R;;;;;N;;;;;
+ 109A6;MEROITIC CURSIVE LETTER BA;Lo;0;R;;;;;N;;;;;
+ 109A7;MEROITIC CURSIVE LETTER PA;Lo;0;R;;;;;N;;;;;
+ 109A8;MEROITIC CURSIVE LETTER MA;Lo;0;R;;;;;N;;;;;
+ 109A9;MEROITIC CURSIVE LETTER NA;Lo;0;R;;;;;N;;;;;
+ 109AA;MEROITIC CURSIVE LETTER NE;Lo;0;R;;;;;N;;;;;
+ 109AB;MEROITIC CURSIVE LETTER RA;Lo;0;R;;;;;N;;;;;
+ 109AC;MEROITIC CURSIVE LETTER LA;Lo;0;R;;;;;N;;;;;
+ 109AD;MEROITIC CURSIVE LETTER KHA;Lo;0;R;;;;;N;;;;;
+ 109AE;MEROITIC CURSIVE LETTER HHA;Lo;0;R;;;;;N;;;;;
+ 109AF;MEROITIC CURSIVE LETTER SA;Lo;0;R;;;;;N;;;;;
+ 109B0;MEROITIC CURSIVE LETTER ARCHAIC SA;Lo;0;R;;;;;N;;;;;
+ 109B1;MEROITIC CURSIVE LETTER SE;Lo;0;R;;;;;N;;;;;
+ 109B2;MEROITIC CURSIVE LETTER KA;Lo;0;R;;;;;N;;;;;
+ 109B3;MEROITIC CURSIVE LETTER QA;Lo;0;R;;;;;N;;;;;
+ 109B4;MEROITIC CURSIVE LETTER TA;Lo;0;R;;;;;N;;;;;
+ 109B5;MEROITIC CURSIVE LETTER TE;Lo;0;R;;;;;N;;;;;
+ 109B6;MEROITIC CURSIVE LETTER TO;Lo;0;R;;;;;N;;;;;
+ 109B7;MEROITIC CURSIVE LETTER DA;Lo;0;R;;;;;N;;;;;
+ 109BC;MEROITIC CURSIVE FRACTION ELEVEN TWELFTHS;No;0;R;;;;11/12;N;;;;;
+ 109BD;MEROITIC CURSIVE FRACTION ONE HALF;No;0;R;;;;1/2;N;;;;;
+ 109BE;MEROITIC CURSIVE LOGOGRAM RMT;Lo;0;R;;;;;N;;;;;
+ 109BF;MEROITIC CURSIVE LOGOGRAM IMN;Lo;0;R;;;;;N;;;;;
+ 109C0;MEROITIC CURSIVE NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 109C1;MEROITIC CURSIVE NUMBER TWO;No;0;R;;;;2;N;;;;;
+ 109C2;MEROITIC CURSIVE NUMBER THREE;No;0;R;;;;3;N;;;;;
+ 109C3;MEROITIC CURSIVE NUMBER FOUR;No;0;R;;;;4;N;;;;;
+ 109C4;MEROITIC CURSIVE NUMBER FIVE;No;0;R;;;;5;N;;;;;
+ 109C5;MEROITIC CURSIVE NUMBER SIX;No;0;R;;;;6;N;;;;;
+ 109C6;MEROITIC CURSIVE NUMBER SEVEN;No;0;R;;;;7;N;;;;;
+ 109C7;MEROITIC CURSIVE NUMBER EIGHT;No;0;R;;;;8;N;;;;;
+ 109C8;MEROITIC CURSIVE NUMBER NINE;No;0;R;;;;9;N;;;;;
+ 109C9;MEROITIC CURSIVE NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 109CA;MEROITIC CURSIVE NUMBER TWENTY;No;0;R;;;;20;N;;;;;
+ 109CB;MEROITIC CURSIVE NUMBER THIRTY;No;0;R;;;;30;N;;;;;
+ 109CC;MEROITIC CURSIVE NUMBER FORTY;No;0;R;;;;40;N;;;;;
+ 109CD;MEROITIC CURSIVE NUMBER FIFTY;No;0;R;;;;50;N;;;;;
+ 109CE;MEROITIC CURSIVE NUMBER SIXTY;No;0;R;;;;60;N;;;;;
+ 109CF;MEROITIC CURSIVE NUMBER SEVENTY;No;0;R;;;;70;N;;;;;
+ 109D2;MEROITIC CURSIVE NUMBER ONE HUNDRED;No;0;R;;;;100;N;;;;;
+ 109D3;MEROITIC CURSIVE NUMBER TWO HUNDRED;No;0;R;;;;200;N;;;;;
+ 109D4;MEROITIC CURSIVE NUMBER THREE HUNDRED;No;0;R;;;;300;N;;;;;
+ 109D5;MEROITIC CURSIVE NUMBER FOUR HUNDRED;No;0;R;;;;400;N;;;;;
+ 109D6;MEROITIC CURSIVE NUMBER FIVE HUNDRED;No;0;R;;;;500;N;;;;;
+ 109D7;MEROITIC CURSIVE NUMBER SIX HUNDRED;No;0;R;;;;600;N;;;;;
+ 109D8;MEROITIC CURSIVE NUMBER SEVEN HUNDRED;No;0;R;;;;700;N;;;;;
+ 109D9;MEROITIC CURSIVE NUMBER EIGHT HUNDRED;No;0;R;;;;800;N;;;;;
+ 109DA;MEROITIC CURSIVE NUMBER NINE HUNDRED;No;0;R;;;;900;N;;;;;
+ 109DB;MEROITIC CURSIVE NUMBER ONE THOUSAND;No;0;R;;;;1000;N;;;;;
+ 109DC;MEROITIC CURSIVE NUMBER TWO THOUSAND;No;0;R;;;;2000;N;;;;;
+ 109DD;MEROITIC CURSIVE NUMBER THREE THOUSAND;No;0;R;;;;3000;N;;;;;
+ 109DE;MEROITIC CURSIVE NUMBER FOUR THOUSAND;No;0;R;;;;4000;N;;;;;
+ 109DF;MEROITIC CURSIVE NUMBER FIVE THOUSAND;No;0;R;;;;5000;N;;;;;
+ 109E0;MEROITIC CURSIVE NUMBER SIX THOUSAND;No;0;R;;;;6000;N;;;;;
+ 109E1;MEROITIC CURSIVE NUMBER SEVEN THOUSAND;No;0;R;;;;7000;N;;;;;
+ 109E2;MEROITIC CURSIVE NUMBER EIGHT THOUSAND;No;0;R;;;;8000;N;;;;;
+ 109E3;MEROITIC CURSIVE NUMBER NINE THOUSAND;No;0;R;;;;9000;N;;;;;
+ 109E4;MEROITIC CURSIVE NUMBER TEN THOUSAND;No;0;R;;;;10000;N;;;;;
+ 109E5;MEROITIC CURSIVE NUMBER TWENTY THOUSAND;No;0;R;;;;20000;N;;;;;
+ 109E6;MEROITIC CURSIVE NUMBER THIRTY THOUSAND;No;0;R;;;;30000;N;;;;;
+ 109E7;MEROITIC CURSIVE NUMBER FORTY THOUSAND;No;0;R;;;;40000;N;;;;;
+ 109E8;MEROITIC CURSIVE NUMBER FIFTY THOUSAND;No;0;R;;;;50000;N;;;;;
+ 109E9;MEROITIC CURSIVE NUMBER SIXTY THOUSAND;No;0;R;;;;60000;N;;;;;
+ 109EA;MEROITIC CURSIVE NUMBER SEVENTY THOUSAND;No;0;R;;;;70000;N;;;;;
+ 109EB;MEROITIC CURSIVE NUMBER EIGHTY THOUSAND;No;0;R;;;;80000;N;;;;;
+ 109EC;MEROITIC CURSIVE NUMBER NINETY THOUSAND;No;0;R;;;;90000;N;;;;;
+ 109ED;MEROITIC CURSIVE NUMBER ONE HUNDRED THOUSAND;No;0;R;;;;100000;N;;;;;
+ 109EE;MEROITIC CURSIVE NUMBER TWO HUNDRED THOUSAND;No;0;R;;;;200000;N;;;;;
+ 109EF;MEROITIC CURSIVE NUMBER THREE HUNDRED THOUSAND;No;0;R;;;;300000;N;;;;;
+ 109F0;MEROITIC CURSIVE NUMBER FOUR HUNDRED THOUSAND;No;0;R;;;;400000;N;;;;;
+ 109F1;MEROITIC CURSIVE NUMBER FIVE HUNDRED THOUSAND;No;0;R;;;;500000;N;;;;;
+ 109F2;MEROITIC CURSIVE NUMBER SIX HUNDRED THOUSAND;No;0;R;;;;600000;N;;;;;
+ 109F3;MEROITIC CURSIVE NUMBER SEVEN HUNDRED THOUSAND;No;0;R;;;;700000;N;;;;;
+ 109F4;MEROITIC CURSIVE NUMBER EIGHT HUNDRED THOUSAND;No;0;R;;;;800000;N;;;;;
+ 109F5;MEROITIC CURSIVE NUMBER NINE HUNDRED THOUSAND;No;0;R;;;;900000;N;;;;;
+ 109F6;MEROITIC CURSIVE FRACTION ONE TWELFTH;No;0;R;;;;1/12;N;;;;;
+ 109F7;MEROITIC CURSIVE FRACTION TWO TWELFTHS;No;0;R;;;;2/12;N;;;;;
+ 109F8;MEROITIC CURSIVE FRACTION THREE TWELFTHS;No;0;R;;;;3/12;N;;;;;
+ 109F9;MEROITIC CURSIVE FRACTION FOUR TWELFTHS;No;0;R;;;;4/12;N;;;;;
+ 109FA;MEROITIC CURSIVE FRACTION FIVE TWELFTHS;No;0;R;;;;5/12;N;;;;;
+ 109FB;MEROITIC CURSIVE FRACTION SIX TWELFTHS;No;0;R;;;;6/12;N;;;;;
+ 109FC;MEROITIC CURSIVE FRACTION SEVEN TWELFTHS;No;0;R;;;;7/12;N;;;;;
+ 109FD;MEROITIC CURSIVE FRACTION EIGHT TWELFTHS;No;0;R;;;;8/12;N;;;;;
+ 109FE;MEROITIC CURSIVE FRACTION NINE TWELFTHS;No;0;R;;;;9/12;N;;;;;
+ 109FF;MEROITIC CURSIVE FRACTION TEN TWELFTHS;No;0;R;;;;10/12;N;;;;;
+ 10A00;KHAROSHTHI LETTER A;Lo;0;R;;;;;N;;;;;
+ 10A01;KHAROSHTHI VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 10A02;KHAROSHTHI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 10A03;KHAROSHTHI VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 10A05;KHAROSHTHI VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 10A06;KHAROSHTHI VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 10A0C;KHAROSHTHI VOWEL LENGTH MARK;Mn;0;NSM;;;;;N;;;;;
+ 10A0D;KHAROSHTHI SIGN DOUBLE RING BELOW;Mn;220;NSM;;;;;N;;;;;
+ 10A0E;KHAROSHTHI SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 10A0F;KHAROSHTHI SIGN VISARGA;Mn;230;NSM;;;;;N;;;;;
+ 10A10;KHAROSHTHI LETTER KA;Lo;0;R;;;;;N;;;;;
+ 10A11;KHAROSHTHI LETTER KHA;Lo;0;R;;;;;N;;;;;
+ 10A12;KHAROSHTHI LETTER GA;Lo;0;R;;;;;N;;;;;
+ 10A13;KHAROSHTHI LETTER GHA;Lo;0;R;;;;;N;;;;;
+ 10A15;KHAROSHTHI LETTER CA;Lo;0;R;;;;;N;;;;;
+ 10A16;KHAROSHTHI LETTER CHA;Lo;0;R;;;;;N;;;;;
+ 10A17;KHAROSHTHI LETTER JA;Lo;0;R;;;;;N;;;;;
+ 10A19;KHAROSHTHI LETTER NYA;Lo;0;R;;;;;N;;;;;
+ 10A1A;KHAROSHTHI LETTER TTA;Lo;0;R;;;;;N;;;;;
+ 10A1B;KHAROSHTHI LETTER TTHA;Lo;0;R;;;;;N;;;;;
+ 10A1C;KHAROSHTHI LETTER DDA;Lo;0;R;;;;;N;;;;;
+ 10A1D;KHAROSHTHI LETTER DDHA;Lo;0;R;;;;;N;;;;;
+ 10A1E;KHAROSHTHI LETTER NNA;Lo;0;R;;;;;N;;;;;
+ 10A1F;KHAROSHTHI LETTER TA;Lo;0;R;;;;;N;;;;;
+ 10A20;KHAROSHTHI LETTER THA;Lo;0;R;;;;;N;;;;;
+ 10A21;KHAROSHTHI LETTER DA;Lo;0;R;;;;;N;;;;;
+ 10A22;KHAROSHTHI LETTER DHA;Lo;0;R;;;;;N;;;;;
+ 10A23;KHAROSHTHI LETTER NA;Lo;0;R;;;;;N;;;;;
+ 10A24;KHAROSHTHI LETTER PA;Lo;0;R;;;;;N;;;;;
+ 10A25;KHAROSHTHI LETTER PHA;Lo;0;R;;;;;N;;;;;
+ 10A26;KHAROSHTHI LETTER BA;Lo;0;R;;;;;N;;;;;
+ 10A27;KHAROSHTHI LETTER BHA;Lo;0;R;;;;;N;;;;;
+ 10A28;KHAROSHTHI LETTER MA;Lo;0;R;;;;;N;;;;;
+ 10A29;KHAROSHTHI LETTER YA;Lo;0;R;;;;;N;;;;;
+ 10A2A;KHAROSHTHI LETTER RA;Lo;0;R;;;;;N;;;;;
+ 10A2B;KHAROSHTHI LETTER LA;Lo;0;R;;;;;N;;;;;
+ 10A2C;KHAROSHTHI LETTER VA;Lo;0;R;;;;;N;;;;;
+ 10A2D;KHAROSHTHI LETTER SHA;Lo;0;R;;;;;N;;;;;
+ 10A2E;KHAROSHTHI LETTER SSA;Lo;0;R;;;;;N;;;;;
+ 10A2F;KHAROSHTHI LETTER SA;Lo;0;R;;;;;N;;;;;
+ 10A30;KHAROSHTHI LETTER ZA;Lo;0;R;;;;;N;;;;;
+ 10A31;KHAROSHTHI LETTER HA;Lo;0;R;;;;;N;;;;;
+ 10A32;KHAROSHTHI LETTER KKA;Lo;0;R;;;;;N;;;;;
+ 10A33;KHAROSHTHI LETTER TTTHA;Lo;0;R;;;;;N;;;;;
+ 10A34;KHAROSHTHI LETTER TTTA;Lo;0;R;;;;;N;;;;;
+ 10A35;KHAROSHTHI LETTER VHA;Lo;0;R;;;;;N;;;;;
+ 10A38;KHAROSHTHI SIGN BAR ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 10A39;KHAROSHTHI SIGN CAUDA;Mn;1;NSM;;;;;N;;;;;
+ 10A3A;KHAROSHTHI SIGN DOT BELOW;Mn;220;NSM;;;;;N;;;;;
+ 10A3F;KHAROSHTHI VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 10A40;KHAROSHTHI DIGIT ONE;No;0;R;;;1;1;N;;;;;
+ 10A41;KHAROSHTHI DIGIT TWO;No;0;R;;;2;2;N;;;;;
+ 10A42;KHAROSHTHI DIGIT THREE;No;0;R;;;3;3;N;;;;;
+ 10A43;KHAROSHTHI DIGIT FOUR;No;0;R;;;4;4;N;;;;;
+ 10A44;KHAROSHTHI NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 10A45;KHAROSHTHI NUMBER TWENTY;No;0;R;;;;20;N;;;;;
+ 10A46;KHAROSHTHI NUMBER ONE HUNDRED;No;0;R;;;;100;N;;;;;
+ 10A47;KHAROSHTHI NUMBER ONE THOUSAND;No;0;R;;;;1000;N;;;;;
+ 10A48;KHAROSHTHI FRACTION ONE HALF;No;0;R;;;;1/2;N;;;;;
+ 10A50;KHAROSHTHI PUNCTUATION DOT;Po;0;R;;;;;N;;;;;
+ 10A51;KHAROSHTHI PUNCTUATION SMALL CIRCLE;Po;0;R;;;;;N;;;;;
+ 10A52;KHAROSHTHI PUNCTUATION CIRCLE;Po;0;R;;;;;N;;;;;
+ 10A53;KHAROSHTHI PUNCTUATION CRESCENT BAR;Po;0;R;;;;;N;;;;;
+ 10A54;KHAROSHTHI PUNCTUATION MANGALAM;Po;0;R;;;;;N;;;;;
+ 10A55;KHAROSHTHI PUNCTUATION LOTUS;Po;0;R;;;;;N;;;;;
+ 10A56;KHAROSHTHI PUNCTUATION DANDA;Po;0;R;;;;;N;;;;;
+ 10A57;KHAROSHTHI PUNCTUATION DOUBLE DANDA;Po;0;R;;;;;N;;;;;
+ 10A58;KHAROSHTHI PUNCTUATION LINES;Po;0;R;;;;;N;;;;;
+ 10A60;OLD SOUTH ARABIAN LETTER HE;Lo;0;R;;;;;N;;;;;
+ 10A61;OLD SOUTH ARABIAN LETTER LAMEDH;Lo;0;R;;;;;N;;;;;
+ 10A62;OLD SOUTH ARABIAN LETTER HETH;Lo;0;R;;;;;N;;;;;
+ 10A63;OLD SOUTH ARABIAN LETTER MEM;Lo;0;R;;;;;N;;;;;
+ 10A64;OLD SOUTH ARABIAN LETTER QOPH;Lo;0;R;;;;;N;;;;;
+ 10A65;OLD SOUTH ARABIAN LETTER WAW;Lo;0;R;;;;;N;;;;;
+ 10A66;OLD SOUTH ARABIAN LETTER SHIN;Lo;0;R;;;;;N;;;;;
+ 10A67;OLD SOUTH ARABIAN LETTER RESH;Lo;0;R;;;;;N;;;;;
+ 10A68;OLD SOUTH ARABIAN LETTER BETH;Lo;0;R;;;;;N;;;;;
+ 10A69;OLD SOUTH ARABIAN LETTER TAW;Lo;0;R;;;;;N;;;;;
+ 10A6A;OLD SOUTH ARABIAN LETTER SAT;Lo;0;R;;;;;N;;;;;
+ 10A6B;OLD SOUTH ARABIAN LETTER KAPH;Lo;0;R;;;;;N;;;;;
+ 10A6C;OLD SOUTH ARABIAN LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 10A6D;OLD SOUTH ARABIAN LETTER KHETH;Lo;0;R;;;;;N;;;;;
+ 10A6E;OLD SOUTH ARABIAN LETTER SADHE;Lo;0;R;;;;;N;;;;;
+ 10A6F;OLD SOUTH ARABIAN LETTER SAMEKH;Lo;0;R;;;;;N;;;;;
+ 10A70;OLD SOUTH ARABIAN LETTER FE;Lo;0;R;;;;;N;;;;;
+ 10A71;OLD SOUTH ARABIAN LETTER ALEF;Lo;0;R;;;;;N;;;;;
+ 10A72;OLD SOUTH ARABIAN LETTER AYN;Lo;0;R;;;;;N;;;;;
+ 10A73;OLD SOUTH ARABIAN LETTER DHADHE;Lo;0;R;;;;;N;;;;;
+ 10A74;OLD SOUTH ARABIAN LETTER GIMEL;Lo;0;R;;;;;N;;;;;
+ 10A75;OLD SOUTH ARABIAN LETTER DALETH;Lo;0;R;;;;;N;;;;;
+ 10A76;OLD SOUTH ARABIAN LETTER GHAYN;Lo;0;R;;;;;N;;;;;
+ 10A77;OLD SOUTH ARABIAN LETTER TETH;Lo;0;R;;;;;N;;;;;
+ 10A78;OLD SOUTH ARABIAN LETTER ZAYN;Lo;0;R;;;;;N;;;;;
+ 10A79;OLD SOUTH ARABIAN LETTER DHALETH;Lo;0;R;;;;;N;;;;;
+ 10A7A;OLD SOUTH ARABIAN LETTER YODH;Lo;0;R;;;;;N;;;;;
+ 10A7B;OLD SOUTH ARABIAN LETTER THAW;Lo;0;R;;;;;N;;;;;
+ 10A7C;OLD SOUTH ARABIAN LETTER THETH;Lo;0;R;;;;;N;;;;;
+ 10A7D;OLD SOUTH ARABIAN NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 10A7E;OLD SOUTH ARABIAN NUMBER FIFTY;No;0;R;;;;50;N;;;;;
+ 10A7F;OLD SOUTH ARABIAN NUMERIC INDICATOR;Po;0;R;;;;;N;;;;;
+ 10A80;OLD NORTH ARABIAN LETTER HEH;Lo;0;R;;;;;N;;;;;
+ 10A81;OLD NORTH ARABIAN LETTER LAM;Lo;0;R;;;;;N;;;;;
+ 10A82;OLD NORTH ARABIAN LETTER HAH;Lo;0;R;;;;;N;;;;;
+ 10A83;OLD NORTH ARABIAN LETTER MEEM;Lo;0;R;;;;;N;;;;;
+ 10A84;OLD NORTH ARABIAN LETTER QAF;Lo;0;R;;;;;N;;;;;
+ 10A85;OLD NORTH ARABIAN LETTER WAW;Lo;0;R;;;;;N;;;;;
+ 10A86;OLD NORTH ARABIAN LETTER ES-2;Lo;0;R;;;;;N;;;;;
+ 10A87;OLD NORTH ARABIAN LETTER REH;Lo;0;R;;;;;N;;;;;
+ 10A88;OLD NORTH ARABIAN LETTER BEH;Lo;0;R;;;;;N;;;;;
+ 10A89;OLD NORTH ARABIAN LETTER TEH;Lo;0;R;;;;;N;;;;;
+ 10A8A;OLD NORTH ARABIAN LETTER ES-1;Lo;0;R;;;;;N;;;;;
+ 10A8B;OLD NORTH ARABIAN LETTER KAF;Lo;0;R;;;;;N;;;;;
+ 10A8C;OLD NORTH ARABIAN LETTER NOON;Lo;0;R;;;;;N;;;;;
+ 10A8D;OLD NORTH ARABIAN LETTER KHAH;Lo;0;R;;;;;N;;;;;
+ 10A8E;OLD NORTH ARABIAN LETTER SAD;Lo;0;R;;;;;N;;;;;
+ 10A8F;OLD NORTH ARABIAN LETTER ES-3;Lo;0;R;;;;;N;;;;;
+ 10A90;OLD NORTH ARABIAN LETTER FEH;Lo;0;R;;;;;N;;;;;
+ 10A91;OLD NORTH ARABIAN LETTER ALEF;Lo;0;R;;;;;N;;;;;
+ 10A92;OLD NORTH ARABIAN LETTER AIN;Lo;0;R;;;;;N;;;;;
+ 10A93;OLD NORTH ARABIAN LETTER DAD;Lo;0;R;;;;;N;;;;;
+ 10A94;OLD NORTH ARABIAN LETTER GEEM;Lo;0;R;;;;;N;;;;;
+ 10A95;OLD NORTH ARABIAN LETTER DAL;Lo;0;R;;;;;N;;;;;
+ 10A96;OLD NORTH ARABIAN LETTER GHAIN;Lo;0;R;;;;;N;;;;;
+ 10A97;OLD NORTH ARABIAN LETTER TAH;Lo;0;R;;;;;N;;;;;
+ 10A98;OLD NORTH ARABIAN LETTER ZAIN;Lo;0;R;;;;;N;;;;;
+ 10A99;OLD NORTH ARABIAN LETTER THAL;Lo;0;R;;;;;N;;;;;
+ 10A9A;OLD NORTH ARABIAN LETTER YEH;Lo;0;R;;;;;N;;;;;
+ 10A9B;OLD NORTH ARABIAN LETTER THEH;Lo;0;R;;;;;N;;;;;
+ 10A9C;OLD NORTH ARABIAN LETTER ZAH;Lo;0;R;;;;;N;;;;;
+ 10A9D;OLD NORTH ARABIAN NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 10A9E;OLD NORTH ARABIAN NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 10A9F;OLD NORTH ARABIAN NUMBER TWENTY;No;0;R;;;;20;N;;;;;
+ 10AC0;MANICHAEAN LETTER ALEPH;Lo;0;R;;;;;N;;;;;
+ 10AC1;MANICHAEAN LETTER BETH;Lo;0;R;;;;;N;;;;;
+ 10AC2;MANICHAEAN LETTER BHETH;Lo;0;R;;;;;N;;;;;
+ 10AC3;MANICHAEAN LETTER GIMEL;Lo;0;R;;;;;N;;;;;
+ 10AC4;MANICHAEAN LETTER GHIMEL;Lo;0;R;;;;;N;;;;;
+ 10AC5;MANICHAEAN LETTER DALETH;Lo;0;R;;;;;N;;;;;
+ 10AC6;MANICHAEAN LETTER HE;Lo;0;R;;;;;N;;;;;
+ 10AC7;MANICHAEAN LETTER WAW;Lo;0;R;;;;;N;;;;;
+ 10AC8;MANICHAEAN SIGN UD;So;0;R;;;;;N;;;;;
+ 10AC9;MANICHAEAN LETTER ZAYIN;Lo;0;R;;;;;N;;;;;
+ 10ACA;MANICHAEAN LETTER ZHAYIN;Lo;0;R;;;;;N;;;;;
+ 10ACB;MANICHAEAN LETTER JAYIN;Lo;0;R;;;;;N;;;;;
+ 10ACC;MANICHAEAN LETTER JHAYIN;Lo;0;R;;;;;N;;;;;
+ 10ACD;MANICHAEAN LETTER HETH;Lo;0;R;;;;;N;;;;;
+ 10ACE;MANICHAEAN LETTER TETH;Lo;0;R;;;;;N;;;;;
+ 10ACF;MANICHAEAN LETTER YODH;Lo;0;R;;;;;N;;;;;
+ 10AD0;MANICHAEAN LETTER KAPH;Lo;0;R;;;;;N;;;;;
+ 10AD1;MANICHAEAN LETTER XAPH;Lo;0;R;;;;;N;;;;;
+ 10AD2;MANICHAEAN LETTER KHAPH;Lo;0;R;;;;;N;;;;;
+ 10AD3;MANICHAEAN LETTER LAMEDH;Lo;0;R;;;;;N;;;;;
+ 10AD4;MANICHAEAN LETTER DHAMEDH;Lo;0;R;;;;;N;;;;;
+ 10AD5;MANICHAEAN LETTER THAMEDH;Lo;0;R;;;;;N;;;;;
+ 10AD6;MANICHAEAN LETTER MEM;Lo;0;R;;;;;N;;;;;
+ 10AD7;MANICHAEAN LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 10AD8;MANICHAEAN LETTER SAMEKH;Lo;0;R;;;;;N;;;;;
+ 10AD9;MANICHAEAN LETTER AYIN;Lo;0;R;;;;;N;;;;;
+ 10ADA;MANICHAEAN LETTER AAYIN;Lo;0;R;;;;;N;;;;;
+ 10ADB;MANICHAEAN LETTER PE;Lo;0;R;;;;;N;;;;;
+ 10ADC;MANICHAEAN LETTER FE;Lo;0;R;;;;;N;;;;;
+ 10ADD;MANICHAEAN LETTER SADHE;Lo;0;R;;;;;N;;;;;
+ 10ADE;MANICHAEAN LETTER QOPH;Lo;0;R;;;;;N;;;;;
+ 10ADF;MANICHAEAN LETTER XOPH;Lo;0;R;;;;;N;;;;;
+ 10AE0;MANICHAEAN LETTER QHOPH;Lo;0;R;;;;;N;;;;;
+ 10AE1;MANICHAEAN LETTER RESH;Lo;0;R;;;;;N;;;;;
+ 10AE2;MANICHAEAN LETTER SHIN;Lo;0;R;;;;;N;;;;;
+ 10AE3;MANICHAEAN LETTER SSHIN;Lo;0;R;;;;;N;;;;;
+ 10AE4;MANICHAEAN LETTER TAW;Lo;0;R;;;;;N;;;;;
+ 10AE5;MANICHAEAN ABBREVIATION MARK ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 10AE6;MANICHAEAN ABBREVIATION MARK BELOW;Mn;220;NSM;;;;;N;;;;;
+ 10AEB;MANICHAEAN NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 10AEC;MANICHAEAN NUMBER FIVE;No;0;R;;;;5;N;;;;;
+ 10AED;MANICHAEAN NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 10AEE;MANICHAEAN NUMBER TWENTY;No;0;R;;;;20;N;;;;;
+ 10AEF;MANICHAEAN NUMBER ONE HUNDRED;No;0;R;;;;100;N;;;;;
+ 10AF0;MANICHAEAN PUNCTUATION STAR;Po;0;R;;;;;N;;;;;
+ 10AF1;MANICHAEAN PUNCTUATION FLEURON;Po;0;R;;;;;N;;;;;
+ 10AF2;MANICHAEAN PUNCTUATION DOUBLE DOT WITHIN DOT;Po;0;R;;;;;N;;;;;
+ 10AF3;MANICHAEAN PUNCTUATION DOT WITHIN DOT;Po;0;R;;;;;N;;;;;
+ 10AF4;MANICHAEAN PUNCTUATION DOT;Po;0;R;;;;;N;;;;;
+ 10AF5;MANICHAEAN PUNCTUATION TWO DOTS;Po;0;R;;;;;N;;;;;
+ 10AF6;MANICHAEAN PUNCTUATION LINE FILLER;Po;0;R;;;;;N;;;;;
+ 10B00;AVESTAN LETTER A;Lo;0;R;;;;;N;;;;;
+ 10B01;AVESTAN LETTER AA;Lo;0;R;;;;;N;;;;;
+ 10B02;AVESTAN LETTER AO;Lo;0;R;;;;;N;;;;;
+ 10B03;AVESTAN LETTER AAO;Lo;0;R;;;;;N;;;;;
+ 10B04;AVESTAN LETTER AN;Lo;0;R;;;;;N;;;;;
+ 10B05;AVESTAN LETTER AAN;Lo;0;R;;;;;N;;;;;
+ 10B06;AVESTAN LETTER AE;Lo;0;R;;;;;N;;;;;
+ 10B07;AVESTAN LETTER AEE;Lo;0;R;;;;;N;;;;;
+ 10B08;AVESTAN LETTER E;Lo;0;R;;;;;N;;;;;
+ 10B09;AVESTAN LETTER EE;Lo;0;R;;;;;N;;;;;
+ 10B0A;AVESTAN LETTER O;Lo;0;R;;;;;N;;;;;
+ 10B0B;AVESTAN LETTER OO;Lo;0;R;;;;;N;;;;;
+ 10B0C;AVESTAN LETTER I;Lo;0;R;;;;;N;;;;;
+ 10B0D;AVESTAN LETTER II;Lo;0;R;;;;;N;;;;;
+ 10B0E;AVESTAN LETTER U;Lo;0;R;;;;;N;;;;;
+ 10B0F;AVESTAN LETTER UU;Lo;0;R;;;;;N;;;;;
+ 10B10;AVESTAN LETTER KE;Lo;0;R;;;;;N;;;;;
+ 10B11;AVESTAN LETTER XE;Lo;0;R;;;;;N;;;;;
+ 10B12;AVESTAN LETTER XYE;Lo;0;R;;;;;N;;;;;
+ 10B13;AVESTAN LETTER XVE;Lo;0;R;;;;;N;;;;;
+ 10B14;AVESTAN LETTER GE;Lo;0;R;;;;;N;;;;;
+ 10B15;AVESTAN LETTER GGE;Lo;0;R;;;;;N;;;;;
+ 10B16;AVESTAN LETTER GHE;Lo;0;R;;;;;N;;;;;
+ 10B17;AVESTAN LETTER CE;Lo;0;R;;;;;N;;;;;
+ 10B18;AVESTAN LETTER JE;Lo;0;R;;;;;N;;;;;
+ 10B19;AVESTAN LETTER TE;Lo;0;R;;;;;N;;;;;
+ 10B1A;AVESTAN LETTER THE;Lo;0;R;;;;;N;;;;;
+ 10B1B;AVESTAN LETTER DE;Lo;0;R;;;;;N;;;;;
+ 10B1C;AVESTAN LETTER DHE;Lo;0;R;;;;;N;;;;;
+ 10B1D;AVESTAN LETTER TTE;Lo;0;R;;;;;N;;;;;
+ 10B1E;AVESTAN LETTER PE;Lo;0;R;;;;;N;;;;;
+ 10B1F;AVESTAN LETTER FE;Lo;0;R;;;;;N;;;;;
+ 10B20;AVESTAN LETTER BE;Lo;0;R;;;;;N;;;;;
+ 10B21;AVESTAN LETTER BHE;Lo;0;R;;;;;N;;;;;
+ 10B22;AVESTAN LETTER NGE;Lo;0;R;;;;;N;;;;;
+ 10B23;AVESTAN LETTER NGYE;Lo;0;R;;;;;N;;;;;
+ 10B24;AVESTAN LETTER NGVE;Lo;0;R;;;;;N;;;;;
+ 10B25;AVESTAN LETTER NE;Lo;0;R;;;;;N;;;;;
+ 10B26;AVESTAN LETTER NYE;Lo;0;R;;;;;N;;;;;
+ 10B27;AVESTAN LETTER NNE;Lo;0;R;;;;;N;;;;;
+ 10B28;AVESTAN LETTER ME;Lo;0;R;;;;;N;;;;;
+ 10B29;AVESTAN LETTER HME;Lo;0;R;;;;;N;;;;;
+ 10B2A;AVESTAN LETTER YYE;Lo;0;R;;;;;N;;;;;
+ 10B2B;AVESTAN LETTER YE;Lo;0;R;;;;;N;;;;;
+ 10B2C;AVESTAN LETTER VE;Lo;0;R;;;;;N;;;;;
+ 10B2D;AVESTAN LETTER RE;Lo;0;R;;;;;N;;;;;
+ 10B2E;AVESTAN LETTER LE;Lo;0;R;;;;;N;;;;;
+ 10B2F;AVESTAN LETTER SE;Lo;0;R;;;;;N;;;;;
+ 10B30;AVESTAN LETTER ZE;Lo;0;R;;;;;N;;;;;
+ 10B31;AVESTAN LETTER SHE;Lo;0;R;;;;;N;;;;;
+ 10B32;AVESTAN LETTER ZHE;Lo;0;R;;;;;N;;;;;
+ 10B33;AVESTAN LETTER SHYE;Lo;0;R;;;;;N;;;;;
+ 10B34;AVESTAN LETTER SSHE;Lo;0;R;;;;;N;;;;;
+ 10B35;AVESTAN LETTER HE;Lo;0;R;;;;;N;;;;;
+ 10B39;AVESTAN ABBREVIATION MARK;Po;0;ON;;;;;N;;;;;
+ 10B3A;TINY TWO DOTS OVER ONE DOT PUNCTUATION;Po;0;ON;;;;;N;;;;;
+ 10B3B;SMALL TWO DOTS OVER ONE DOT PUNCTUATION;Po;0;ON;;;;;N;;;;;
+ 10B3C;LARGE TWO DOTS OVER ONE DOT PUNCTUATION;Po;0;ON;;;;;N;;;;;
+ 10B3D;LARGE ONE DOT OVER TWO DOTS PUNCTUATION;Po;0;ON;;;;;N;;;;;
+ 10B3E;LARGE TWO RINGS OVER ONE RING PUNCTUATION;Po;0;ON;;;;;N;;;;;
+ 10B3F;LARGE ONE RING OVER TWO RINGS PUNCTUATION;Po;0;ON;;;;;N;;;;;
+ 10B40;INSCRIPTIONAL PARTHIAN LETTER ALEPH;Lo;0;R;;;;;N;;;;;
+ 10B41;INSCRIPTIONAL PARTHIAN LETTER BETH;Lo;0;R;;;;;N;;;;;
+ 10B42;INSCRIPTIONAL PARTHIAN LETTER GIMEL;Lo;0;R;;;;;N;;;;;
+ 10B43;INSCRIPTIONAL PARTHIAN LETTER DALETH;Lo;0;R;;;;;N;;;;;
+ 10B44;INSCRIPTIONAL PARTHIAN LETTER HE;Lo;0;R;;;;;N;;;;;
+ 10B45;INSCRIPTIONAL PARTHIAN LETTER WAW;Lo;0;R;;;;;N;;;;;
+ 10B46;INSCRIPTIONAL PARTHIAN LETTER ZAYIN;Lo;0;R;;;;;N;;;;;
+ 10B47;INSCRIPTIONAL PARTHIAN LETTER HETH;Lo;0;R;;;;;N;;;;;
+ 10B48;INSCRIPTIONAL PARTHIAN LETTER TETH;Lo;0;R;;;;;N;;;;;
+ 10B49;INSCRIPTIONAL PARTHIAN LETTER YODH;Lo;0;R;;;;;N;;;;;
+ 10B4A;INSCRIPTIONAL PARTHIAN LETTER KAPH;Lo;0;R;;;;;N;;;;;
+ 10B4B;INSCRIPTIONAL PARTHIAN LETTER LAMEDH;Lo;0;R;;;;;N;;;;;
+ 10B4C;INSCRIPTIONAL PARTHIAN LETTER MEM;Lo;0;R;;;;;N;;;;;
+ 10B4D;INSCRIPTIONAL PARTHIAN LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 10B4E;INSCRIPTIONAL PARTHIAN LETTER SAMEKH;Lo;0;R;;;;;N;;;;;
+ 10B4F;INSCRIPTIONAL PARTHIAN LETTER AYIN;Lo;0;R;;;;;N;;;;;
+ 10B50;INSCRIPTIONAL PARTHIAN LETTER PE;Lo;0;R;;;;;N;;;;;
+ 10B51;INSCRIPTIONAL PARTHIAN LETTER SADHE;Lo;0;R;;;;;N;;;;;
+ 10B52;INSCRIPTIONAL PARTHIAN LETTER QOPH;Lo;0;R;;;;;N;;;;;
+ 10B53;INSCRIPTIONAL PARTHIAN LETTER RESH;Lo;0;R;;;;;N;;;;;
+ 10B54;INSCRIPTIONAL PARTHIAN LETTER SHIN;Lo;0;R;;;;;N;;;;;
+ 10B55;INSCRIPTIONAL PARTHIAN LETTER TAW;Lo;0;R;;;;;N;;;;;
+ 10B58;INSCRIPTIONAL PARTHIAN NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 10B59;INSCRIPTIONAL PARTHIAN NUMBER TWO;No;0;R;;;;2;N;;;;;
+ 10B5A;INSCRIPTIONAL PARTHIAN NUMBER THREE;No;0;R;;;;3;N;;;;;
+ 10B5B;INSCRIPTIONAL PARTHIAN NUMBER FOUR;No;0;R;;;;4;N;;;;;
+ 10B5C;INSCRIPTIONAL PARTHIAN NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 10B5D;INSCRIPTIONAL PARTHIAN NUMBER TWENTY;No;0;R;;;;20;N;;;;;
+ 10B5E;INSCRIPTIONAL PARTHIAN NUMBER ONE HUNDRED;No;0;R;;;;100;N;;;;;
+ 10B5F;INSCRIPTIONAL PARTHIAN NUMBER ONE THOUSAND;No;0;R;;;;1000;N;;;;;
+ 10B60;INSCRIPTIONAL PAHLAVI LETTER ALEPH;Lo;0;R;;;;;N;;;;;
+ 10B61;INSCRIPTIONAL PAHLAVI LETTER BETH;Lo;0;R;;;;;N;;;;;
+ 10B62;INSCRIPTIONAL PAHLAVI LETTER GIMEL;Lo;0;R;;;;;N;;;;;
+ 10B63;INSCRIPTIONAL PAHLAVI LETTER DALETH;Lo;0;R;;;;;N;;;;;
+ 10B64;INSCRIPTIONAL PAHLAVI LETTER HE;Lo;0;R;;;;;N;;;;;
+ 10B65;INSCRIPTIONAL PAHLAVI LETTER WAW-AYIN-RESH;Lo;0;R;;;;;N;;;;;
+ 10B66;INSCRIPTIONAL PAHLAVI LETTER ZAYIN;Lo;0;R;;;;;N;;;;;
+ 10B67;INSCRIPTIONAL PAHLAVI LETTER HETH;Lo;0;R;;;;;N;;;;;
+ 10B68;INSCRIPTIONAL PAHLAVI LETTER TETH;Lo;0;R;;;;;N;;;;;
+ 10B69;INSCRIPTIONAL PAHLAVI LETTER YODH;Lo;0;R;;;;;N;;;;;
+ 10B6A;INSCRIPTIONAL PAHLAVI LETTER KAPH;Lo;0;R;;;;;N;;;;;
+ 10B6B;INSCRIPTIONAL PAHLAVI LETTER LAMEDH;Lo;0;R;;;;;N;;;;;
+ 10B6C;INSCRIPTIONAL PAHLAVI LETTER MEM-QOPH;Lo;0;R;;;;;N;;;;;
+ 10B6D;INSCRIPTIONAL PAHLAVI LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 10B6E;INSCRIPTIONAL PAHLAVI LETTER SAMEKH;Lo;0;R;;;;;N;;;;;
+ 10B6F;INSCRIPTIONAL PAHLAVI LETTER PE;Lo;0;R;;;;;N;;;;;
+ 10B70;INSCRIPTIONAL PAHLAVI LETTER SADHE;Lo;0;R;;;;;N;;;;;
+ 10B71;INSCRIPTIONAL PAHLAVI LETTER SHIN;Lo;0;R;;;;;N;;;;;
+ 10B72;INSCRIPTIONAL PAHLAVI LETTER TAW;Lo;0;R;;;;;N;;;;;
+ 10B78;INSCRIPTIONAL PAHLAVI NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 10B79;INSCRIPTIONAL PAHLAVI NUMBER TWO;No;0;R;;;;2;N;;;;;
+ 10B7A;INSCRIPTIONAL PAHLAVI NUMBER THREE;No;0;R;;;;3;N;;;;;
+ 10B7B;INSCRIPTIONAL PAHLAVI NUMBER FOUR;No;0;R;;;;4;N;;;;;
+ 10B7C;INSCRIPTIONAL PAHLAVI NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 10B7D;INSCRIPTIONAL PAHLAVI NUMBER TWENTY;No;0;R;;;;20;N;;;;;
+ 10B7E;INSCRIPTIONAL PAHLAVI NUMBER ONE HUNDRED;No;0;R;;;;100;N;;;;;
+ 10B7F;INSCRIPTIONAL PAHLAVI NUMBER ONE THOUSAND;No;0;R;;;;1000;N;;;;;
+ 10B80;PSALTER PAHLAVI LETTER ALEPH;Lo;0;R;;;;;N;;;;;
+ 10B81;PSALTER PAHLAVI LETTER BETH;Lo;0;R;;;;;N;;;;;
+ 10B82;PSALTER PAHLAVI LETTER GIMEL;Lo;0;R;;;;;N;;;;;
+ 10B83;PSALTER PAHLAVI LETTER DALETH;Lo;0;R;;;;;N;;;;;
+ 10B84;PSALTER PAHLAVI LETTER HE;Lo;0;R;;;;;N;;;;;
+ 10B85;PSALTER PAHLAVI LETTER WAW-AYIN-RESH;Lo;0;R;;;;;N;;;;;
+ 10B86;PSALTER PAHLAVI LETTER ZAYIN;Lo;0;R;;;;;N;;;;;
+ 10B87;PSALTER PAHLAVI LETTER HETH;Lo;0;R;;;;;N;;;;;
+ 10B88;PSALTER PAHLAVI LETTER YODH;Lo;0;R;;;;;N;;;;;
+ 10B89;PSALTER PAHLAVI LETTER KAPH;Lo;0;R;;;;;N;;;;;
+ 10B8A;PSALTER PAHLAVI LETTER LAMEDH;Lo;0;R;;;;;N;;;;;
+ 10B8B;PSALTER PAHLAVI LETTER MEM-QOPH;Lo;0;R;;;;;N;;;;;
+ 10B8C;PSALTER PAHLAVI LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 10B8D;PSALTER PAHLAVI LETTER SAMEKH;Lo;0;R;;;;;N;;;;;
+ 10B8E;PSALTER PAHLAVI LETTER PE;Lo;0;R;;;;;N;;;;;
+ 10B8F;PSALTER PAHLAVI LETTER SADHE;Lo;0;R;;;;;N;;;;;
+ 10B90;PSALTER PAHLAVI LETTER SHIN;Lo;0;R;;;;;N;;;;;
+ 10B91;PSALTER PAHLAVI LETTER TAW;Lo;0;R;;;;;N;;;;;
+ 10B99;PSALTER PAHLAVI SECTION MARK;Po;0;R;;;;;N;;;;;
+ 10B9A;PSALTER PAHLAVI TURNED SECTION MARK;Po;0;R;;;;;N;;;;;
+ 10B9B;PSALTER PAHLAVI FOUR DOTS WITH CROSS;Po;0;R;;;;;N;;;;;
+ 10B9C;PSALTER PAHLAVI FOUR DOTS WITH DOT;Po;0;R;;;;;N;;;;;
+ 10BA9;PSALTER PAHLAVI NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 10BAA;PSALTER PAHLAVI NUMBER TWO;No;0;R;;;;2;N;;;;;
+ 10BAB;PSALTER PAHLAVI NUMBER THREE;No;0;R;;;;3;N;;;;;
+ 10BAC;PSALTER PAHLAVI NUMBER FOUR;No;0;R;;;;4;N;;;;;
+ 10BAD;PSALTER PAHLAVI NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 10BAE;PSALTER PAHLAVI NUMBER TWENTY;No;0;R;;;;20;N;;;;;
+ 10BAF;PSALTER PAHLAVI NUMBER ONE HUNDRED;No;0;R;;;;100;N;;;;;
+ 10C00;OLD TURKIC LETTER ORKHON A;Lo;0;R;;;;;N;;;;;
+ 10C01;OLD TURKIC LETTER YENISEI A;Lo;0;R;;;;;N;;;;;
+ 10C02;OLD TURKIC LETTER YENISEI AE;Lo;0;R;;;;;N;;;;;
+ 10C03;OLD TURKIC LETTER ORKHON I;Lo;0;R;;;;;N;;;;;
+ 10C04;OLD TURKIC LETTER YENISEI I;Lo;0;R;;;;;N;;;;;
+ 10C05;OLD TURKIC LETTER YENISEI E;Lo;0;R;;;;;N;;;;;
+ 10C06;OLD TURKIC LETTER ORKHON O;Lo;0;R;;;;;N;;;;;
+ 10C07;OLD TURKIC LETTER ORKHON OE;Lo;0;R;;;;;N;;;;;
+ 10C08;OLD TURKIC LETTER YENISEI OE;Lo;0;R;;;;;N;;;;;
+ 10C09;OLD TURKIC LETTER ORKHON AB;Lo;0;R;;;;;N;;;;;
+ 10C0A;OLD TURKIC LETTER YENISEI AB;Lo;0;R;;;;;N;;;;;
+ 10C0B;OLD TURKIC LETTER ORKHON AEB;Lo;0;R;;;;;N;;;;;
+ 10C0C;OLD TURKIC LETTER YENISEI AEB;Lo;0;R;;;;;N;;;;;
+ 10C0D;OLD TURKIC LETTER ORKHON AG;Lo;0;R;;;;;N;;;;;
+ 10C0E;OLD TURKIC LETTER YENISEI AG;Lo;0;R;;;;;N;;;;;
+ 10C0F;OLD TURKIC LETTER ORKHON AEG;Lo;0;R;;;;;N;;;;;
+ 10C10;OLD TURKIC LETTER YENISEI AEG;Lo;0;R;;;;;N;;;;;
+ 10C11;OLD TURKIC LETTER ORKHON AD;Lo;0;R;;;;;N;;;;;
+ 10C12;OLD TURKIC LETTER YENISEI AD;Lo;0;R;;;;;N;;;;;
+ 10C13;OLD TURKIC LETTER ORKHON AED;Lo;0;R;;;;;N;;;;;
+ 10C14;OLD TURKIC LETTER ORKHON EZ;Lo;0;R;;;;;N;;;;;
+ 10C15;OLD TURKIC LETTER YENISEI EZ;Lo;0;R;;;;;N;;;;;
+ 10C16;OLD TURKIC LETTER ORKHON AY;Lo;0;R;;;;;N;;;;;
+ 10C17;OLD TURKIC LETTER YENISEI AY;Lo;0;R;;;;;N;;;;;
+ 10C18;OLD TURKIC LETTER ORKHON AEY;Lo;0;R;;;;;N;;;;;
+ 10C19;OLD TURKIC LETTER YENISEI AEY;Lo;0;R;;;;;N;;;;;
+ 10C1A;OLD TURKIC LETTER ORKHON AEK;Lo;0;R;;;;;N;;;;;
+ 10C1B;OLD TURKIC LETTER YENISEI AEK;Lo;0;R;;;;;N;;;;;
+ 10C1C;OLD TURKIC LETTER ORKHON OEK;Lo;0;R;;;;;N;;;;;
+ 10C1D;OLD TURKIC LETTER YENISEI OEK;Lo;0;R;;;;;N;;;;;
+ 10C1E;OLD TURKIC LETTER ORKHON AL;Lo;0;R;;;;;N;;;;;
+ 10C1F;OLD TURKIC LETTER YENISEI AL;Lo;0;R;;;;;N;;;;;
+ 10C20;OLD TURKIC LETTER ORKHON AEL;Lo;0;R;;;;;N;;;;;
+ 10C21;OLD TURKIC LETTER ORKHON ELT;Lo;0;R;;;;;N;;;;;
+ 10C22;OLD TURKIC LETTER ORKHON EM;Lo;0;R;;;;;N;;;;;
+ 10C23;OLD TURKIC LETTER ORKHON AN;Lo;0;R;;;;;N;;;;;
+ 10C24;OLD TURKIC LETTER ORKHON AEN;Lo;0;R;;;;;N;;;;;
+ 10C25;OLD TURKIC LETTER YENISEI AEN;Lo;0;R;;;;;N;;;;;
+ 10C26;OLD TURKIC LETTER ORKHON ENT;Lo;0;R;;;;;N;;;;;
+ 10C27;OLD TURKIC LETTER YENISEI ENT;Lo;0;R;;;;;N;;;;;
+ 10C28;OLD TURKIC LETTER ORKHON ENC;Lo;0;R;;;;;N;;;;;
+ 10C29;OLD TURKIC LETTER YENISEI ENC;Lo;0;R;;;;;N;;;;;
+ 10C2A;OLD TURKIC LETTER ORKHON ENY;Lo;0;R;;;;;N;;;;;
+ 10C2B;OLD TURKIC LETTER YENISEI ENY;Lo;0;R;;;;;N;;;;;
+ 10C2C;OLD TURKIC LETTER YENISEI ANG;Lo;0;R;;;;;N;;;;;
+ 10C2D;OLD TURKIC LETTER ORKHON ENG;Lo;0;R;;;;;N;;;;;
+ 10C2E;OLD TURKIC LETTER YENISEI AENG;Lo;0;R;;;;;N;;;;;
+ 10C2F;OLD TURKIC LETTER ORKHON EP;Lo;0;R;;;;;N;;;;;
+ 10C30;OLD TURKIC LETTER ORKHON OP;Lo;0;R;;;;;N;;;;;
+ 10C31;OLD TURKIC LETTER ORKHON IC;Lo;0;R;;;;;N;;;;;
+ 10C32;OLD TURKIC LETTER ORKHON EC;Lo;0;R;;;;;N;;;;;
+ 10C33;OLD TURKIC LETTER YENISEI EC;Lo;0;R;;;;;N;;;;;
+ 10C34;OLD TURKIC LETTER ORKHON AQ;Lo;0;R;;;;;N;;;;;
+ 10C35;OLD TURKIC LETTER YENISEI AQ;Lo;0;R;;;;;N;;;;;
+ 10C36;OLD TURKIC LETTER ORKHON IQ;Lo;0;R;;;;;N;;;;;
+ 10C37;OLD TURKIC LETTER YENISEI IQ;Lo;0;R;;;;;N;;;;;
+ 10C38;OLD TURKIC LETTER ORKHON OQ;Lo;0;R;;;;;N;;;;;
+ 10C39;OLD TURKIC LETTER YENISEI OQ;Lo;0;R;;;;;N;;;;;
+ 10C3A;OLD TURKIC LETTER ORKHON AR;Lo;0;R;;;;;N;;;;;
+ 10C3B;OLD TURKIC LETTER YENISEI AR;Lo;0;R;;;;;N;;;;;
+ 10C3C;OLD TURKIC LETTER ORKHON AER;Lo;0;R;;;;;N;;;;;
+ 10C3D;OLD TURKIC LETTER ORKHON AS;Lo;0;R;;;;;N;;;;;
+ 10C3E;OLD TURKIC LETTER ORKHON AES;Lo;0;R;;;;;N;;;;;
+ 10C3F;OLD TURKIC LETTER ORKHON ASH;Lo;0;R;;;;;N;;;;;
+ 10C40;OLD TURKIC LETTER YENISEI ASH;Lo;0;R;;;;;N;;;;;
+ 10C41;OLD TURKIC LETTER ORKHON ESH;Lo;0;R;;;;;N;;;;;
+ 10C42;OLD TURKIC LETTER YENISEI ESH;Lo;0;R;;;;;N;;;;;
+ 10C43;OLD TURKIC LETTER ORKHON AT;Lo;0;R;;;;;N;;;;;
+ 10C44;OLD TURKIC LETTER YENISEI AT;Lo;0;R;;;;;N;;;;;
+ 10C45;OLD TURKIC LETTER ORKHON AET;Lo;0;R;;;;;N;;;;;
+ 10C46;OLD TURKIC LETTER YENISEI AET;Lo;0;R;;;;;N;;;;;
+ 10C47;OLD TURKIC LETTER ORKHON OT;Lo;0;R;;;;;N;;;;;
+ 10C48;OLD TURKIC LETTER ORKHON BASH;Lo;0;R;;;;;N;;;;;
+ 10C80;OLD HUNGARIAN CAPITAL LETTER A;Lu;0;R;;;;;N;;;;10CC0;
+ 10C81;OLD HUNGARIAN CAPITAL LETTER AA;Lu;0;R;;;;;N;;;;10CC1;
+ 10C82;OLD HUNGARIAN CAPITAL LETTER EB;Lu;0;R;;;;;N;;;;10CC2;
+ 10C83;OLD HUNGARIAN CAPITAL LETTER AMB;Lu;0;R;;;;;N;;;;10CC3;
+ 10C84;OLD HUNGARIAN CAPITAL LETTER EC;Lu;0;R;;;;;N;;;;10CC4;
+ 10C85;OLD HUNGARIAN CAPITAL LETTER ENC;Lu;0;R;;;;;N;;;;10CC5;
+ 10C86;OLD HUNGARIAN CAPITAL LETTER ECS;Lu;0;R;;;;;N;;;;10CC6;
+ 10C87;OLD HUNGARIAN CAPITAL LETTER ED;Lu;0;R;;;;;N;;;;10CC7;
+ 10C88;OLD HUNGARIAN CAPITAL LETTER AND;Lu;0;R;;;;;N;;;;10CC8;
+ 10C89;OLD HUNGARIAN CAPITAL LETTER E;Lu;0;R;;;;;N;;;;10CC9;
+ 10C8A;OLD HUNGARIAN CAPITAL LETTER CLOSE E;Lu;0;R;;;;;N;;;;10CCA;
+ 10C8B;OLD HUNGARIAN CAPITAL LETTER EE;Lu;0;R;;;;;N;;;;10CCB;
+ 10C8C;OLD HUNGARIAN CAPITAL LETTER EF;Lu;0;R;;;;;N;;;;10CCC;
+ 10C8D;OLD HUNGARIAN CAPITAL LETTER EG;Lu;0;R;;;;;N;;;;10CCD;
+ 10C8E;OLD HUNGARIAN CAPITAL LETTER EGY;Lu;0;R;;;;;N;;;;10CCE;
+ 10C8F;OLD HUNGARIAN CAPITAL LETTER EH;Lu;0;R;;;;;N;;;;10CCF;
+ 10C90;OLD HUNGARIAN CAPITAL LETTER I;Lu;0;R;;;;;N;;;;10CD0;
+ 10C91;OLD HUNGARIAN CAPITAL LETTER II;Lu;0;R;;;;;N;;;;10CD1;
+ 10C92;OLD HUNGARIAN CAPITAL LETTER EJ;Lu;0;R;;;;;N;;;;10CD2;
+ 10C93;OLD HUNGARIAN CAPITAL LETTER EK;Lu;0;R;;;;;N;;;;10CD3;
+ 10C94;OLD HUNGARIAN CAPITAL LETTER AK;Lu;0;R;;;;;N;;;;10CD4;
+ 10C95;OLD HUNGARIAN CAPITAL LETTER UNK;Lu;0;R;;;;;N;;;;10CD5;
+ 10C96;OLD HUNGARIAN CAPITAL LETTER EL;Lu;0;R;;;;;N;;;;10CD6;
+ 10C97;OLD HUNGARIAN CAPITAL LETTER ELY;Lu;0;R;;;;;N;;;;10CD7;
+ 10C98;OLD HUNGARIAN CAPITAL LETTER EM;Lu;0;R;;;;;N;;;;10CD8;
+ 10C99;OLD HUNGARIAN CAPITAL LETTER EN;Lu;0;R;;;;;N;;;;10CD9;
+ 10C9A;OLD HUNGARIAN CAPITAL LETTER ENY;Lu;0;R;;;;;N;;;;10CDA;
+ 10C9B;OLD HUNGARIAN CAPITAL LETTER O;Lu;0;R;;;;;N;;;;10CDB;
+ 10C9C;OLD HUNGARIAN CAPITAL LETTER OO;Lu;0;R;;;;;N;;;;10CDC;
+ 10C9D;OLD HUNGARIAN CAPITAL LETTER NIKOLSBURG OE;Lu;0;R;;;;;N;;;;10CDD;
+ 10C9E;OLD HUNGARIAN CAPITAL LETTER RUDIMENTA OE;Lu;0;R;;;;;N;;;;10CDE;
+ 10C9F;OLD HUNGARIAN CAPITAL LETTER OEE;Lu;0;R;;;;;N;;;;10CDF;
+ 10CA0;OLD HUNGARIAN CAPITAL LETTER EP;Lu;0;R;;;;;N;;;;10CE0;
+ 10CA1;OLD HUNGARIAN CAPITAL LETTER EMP;Lu;0;R;;;;;N;;;;10CE1;
+ 10CA2;OLD HUNGARIAN CAPITAL LETTER ER;Lu;0;R;;;;;N;;;;10CE2;
+ 10CA3;OLD HUNGARIAN CAPITAL LETTER SHORT ER;Lu;0;R;;;;;N;;;;10CE3;
+ 10CA4;OLD HUNGARIAN CAPITAL LETTER ES;Lu;0;R;;;;;N;;;;10CE4;
+ 10CA5;OLD HUNGARIAN CAPITAL LETTER ESZ;Lu;0;R;;;;;N;;;;10CE5;
+ 10CA6;OLD HUNGARIAN CAPITAL LETTER ET;Lu;0;R;;;;;N;;;;10CE6;
+ 10CA7;OLD HUNGARIAN CAPITAL LETTER ENT;Lu;0;R;;;;;N;;;;10CE7;
+ 10CA8;OLD HUNGARIAN CAPITAL LETTER ETY;Lu;0;R;;;;;N;;;;10CE8;
+ 10CA9;OLD HUNGARIAN CAPITAL LETTER ECH;Lu;0;R;;;;;N;;;;10CE9;
+ 10CAA;OLD HUNGARIAN CAPITAL LETTER U;Lu;0;R;;;;;N;;;;10CEA;
+ 10CAB;OLD HUNGARIAN CAPITAL LETTER UU;Lu;0;R;;;;;N;;;;10CEB;
+ 10CAC;OLD HUNGARIAN CAPITAL LETTER NIKOLSBURG UE;Lu;0;R;;;;;N;;;;10CEC;
+ 10CAD;OLD HUNGARIAN CAPITAL LETTER RUDIMENTA UE;Lu;0;R;;;;;N;;;;10CED;
+ 10CAE;OLD HUNGARIAN CAPITAL LETTER EV;Lu;0;R;;;;;N;;;;10CEE;
+ 10CAF;OLD HUNGARIAN CAPITAL LETTER EZ;Lu;0;R;;;;;N;;;;10CEF;
+ 10CB0;OLD HUNGARIAN CAPITAL LETTER EZS;Lu;0;R;;;;;N;;;;10CF0;
+ 10CB1;OLD HUNGARIAN CAPITAL LETTER ENT-SHAPED SIGN;Lu;0;R;;;;;N;;;;10CF1;
+ 10CB2;OLD HUNGARIAN CAPITAL LETTER US;Lu;0;R;;;;;N;;;;10CF2;
+ 10CC0;OLD HUNGARIAN SMALL LETTER A;Ll;0;R;;;;;N;;;10C80;;10C80
+ 10CC1;OLD HUNGARIAN SMALL LETTER AA;Ll;0;R;;;;;N;;;10C81;;10C81
+ 10CC2;OLD HUNGARIAN SMALL LETTER EB;Ll;0;R;;;;;N;;;10C82;;10C82
+ 10CC3;OLD HUNGARIAN SMALL LETTER AMB;Ll;0;R;;;;;N;;;10C83;;10C83
+ 10CC4;OLD HUNGARIAN SMALL LETTER EC;Ll;0;R;;;;;N;;;10C84;;10C84
+ 10CC5;OLD HUNGARIAN SMALL LETTER ENC;Ll;0;R;;;;;N;;;10C85;;10C85
+ 10CC6;OLD HUNGARIAN SMALL LETTER ECS;Ll;0;R;;;;;N;;;10C86;;10C86
+ 10CC7;OLD HUNGARIAN SMALL LETTER ED;Ll;0;R;;;;;N;;;10C87;;10C87
+ 10CC8;OLD HUNGARIAN SMALL LETTER AND;Ll;0;R;;;;;N;;;10C88;;10C88
+ 10CC9;OLD HUNGARIAN SMALL LETTER E;Ll;0;R;;;;;N;;;10C89;;10C89
+ 10CCA;OLD HUNGARIAN SMALL LETTER CLOSE E;Ll;0;R;;;;;N;;;10C8A;;10C8A
+ 10CCB;OLD HUNGARIAN SMALL LETTER EE;Ll;0;R;;;;;N;;;10C8B;;10C8B
+ 10CCC;OLD HUNGARIAN SMALL LETTER EF;Ll;0;R;;;;;N;;;10C8C;;10C8C
+ 10CCD;OLD HUNGARIAN SMALL LETTER EG;Ll;0;R;;;;;N;;;10C8D;;10C8D
+ 10CCE;OLD HUNGARIAN SMALL LETTER EGY;Ll;0;R;;;;;N;;;10C8E;;10C8E
+ 10CCF;OLD HUNGARIAN SMALL LETTER EH;Ll;0;R;;;;;N;;;10C8F;;10C8F
+ 10CD0;OLD HUNGARIAN SMALL LETTER I;Ll;0;R;;;;;N;;;10C90;;10C90
+ 10CD1;OLD HUNGARIAN SMALL LETTER II;Ll;0;R;;;;;N;;;10C91;;10C91
+ 10CD2;OLD HUNGARIAN SMALL LETTER EJ;Ll;0;R;;;;;N;;;10C92;;10C92
+ 10CD3;OLD HUNGARIAN SMALL LETTER EK;Ll;0;R;;;;;N;;;10C93;;10C93
+ 10CD4;OLD HUNGARIAN SMALL LETTER AK;Ll;0;R;;;;;N;;;10C94;;10C94
+ 10CD5;OLD HUNGARIAN SMALL LETTER UNK;Ll;0;R;;;;;N;;;10C95;;10C95
+ 10CD6;OLD HUNGARIAN SMALL LETTER EL;Ll;0;R;;;;;N;;;10C96;;10C96
+ 10CD7;OLD HUNGARIAN SMALL LETTER ELY;Ll;0;R;;;;;N;;;10C97;;10C97
+ 10CD8;OLD HUNGARIAN SMALL LETTER EM;Ll;0;R;;;;;N;;;10C98;;10C98
+ 10CD9;OLD HUNGARIAN SMALL LETTER EN;Ll;0;R;;;;;N;;;10C99;;10C99
+ 10CDA;OLD HUNGARIAN SMALL LETTER ENY;Ll;0;R;;;;;N;;;10C9A;;10C9A
+ 10CDB;OLD HUNGARIAN SMALL LETTER O;Ll;0;R;;;;;N;;;10C9B;;10C9B
+ 10CDC;OLD HUNGARIAN SMALL LETTER OO;Ll;0;R;;;;;N;;;10C9C;;10C9C
+ 10CDD;OLD HUNGARIAN SMALL LETTER NIKOLSBURG OE;Ll;0;R;;;;;N;;;10C9D;;10C9D
+ 10CDE;OLD HUNGARIAN SMALL LETTER RUDIMENTA OE;Ll;0;R;;;;;N;;;10C9E;;10C9E
+ 10CDF;OLD HUNGARIAN SMALL LETTER OEE;Ll;0;R;;;;;N;;;10C9F;;10C9F
+ 10CE0;OLD HUNGARIAN SMALL LETTER EP;Ll;0;R;;;;;N;;;10CA0;;10CA0
+ 10CE1;OLD HUNGARIAN SMALL LETTER EMP;Ll;0;R;;;;;N;;;10CA1;;10CA1
+ 10CE2;OLD HUNGARIAN SMALL LETTER ER;Ll;0;R;;;;;N;;;10CA2;;10CA2
+ 10CE3;OLD HUNGARIAN SMALL LETTER SHORT ER;Ll;0;R;;;;;N;;;10CA3;;10CA3
+ 10CE4;OLD HUNGARIAN SMALL LETTER ES;Ll;0;R;;;;;N;;;10CA4;;10CA4
+ 10CE5;OLD HUNGARIAN SMALL LETTER ESZ;Ll;0;R;;;;;N;;;10CA5;;10CA5
+ 10CE6;OLD HUNGARIAN SMALL LETTER ET;Ll;0;R;;;;;N;;;10CA6;;10CA6
+ 10CE7;OLD HUNGARIAN SMALL LETTER ENT;Ll;0;R;;;;;N;;;10CA7;;10CA7
+ 10CE8;OLD HUNGARIAN SMALL LETTER ETY;Ll;0;R;;;;;N;;;10CA8;;10CA8
+ 10CE9;OLD HUNGARIAN SMALL LETTER ECH;Ll;0;R;;;;;N;;;10CA9;;10CA9
+ 10CEA;OLD HUNGARIAN SMALL LETTER U;Ll;0;R;;;;;N;;;10CAA;;10CAA
+ 10CEB;OLD HUNGARIAN SMALL LETTER UU;Ll;0;R;;;;;N;;;10CAB;;10CAB
+ 10CEC;OLD HUNGARIAN SMALL LETTER NIKOLSBURG UE;Ll;0;R;;;;;N;;;10CAC;;10CAC
+ 10CED;OLD HUNGARIAN SMALL LETTER RUDIMENTA UE;Ll;0;R;;;;;N;;;10CAD;;10CAD
+ 10CEE;OLD HUNGARIAN SMALL LETTER EV;Ll;0;R;;;;;N;;;10CAE;;10CAE
+ 10CEF;OLD HUNGARIAN SMALL LETTER EZ;Ll;0;R;;;;;N;;;10CAF;;10CAF
+ 10CF0;OLD HUNGARIAN SMALL LETTER EZS;Ll;0;R;;;;;N;;;10CB0;;10CB0
+ 10CF1;OLD HUNGARIAN SMALL LETTER ENT-SHAPED SIGN;Ll;0;R;;;;;N;;;10CB1;;10CB1
+ 10CF2;OLD HUNGARIAN SMALL LETTER US;Ll;0;R;;;;;N;;;10CB2;;10CB2
+ 10CFA;OLD HUNGARIAN NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 10CFB;OLD HUNGARIAN NUMBER FIVE;No;0;R;;;;5;N;;;;;
+ 10CFC;OLD HUNGARIAN NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 10CFD;OLD HUNGARIAN NUMBER FIFTY;No;0;R;;;;50;N;;;;;
+ 10CFE;OLD HUNGARIAN NUMBER ONE HUNDRED;No;0;R;;;;100;N;;;;;
+ 10CFF;OLD HUNGARIAN NUMBER ONE THOUSAND;No;0;R;;;;1000;N;;;;;
+ 10D00;HANIFI ROHINGYA LETTER A;Lo;0;AL;;;;;N;;;;;
+ 10D01;HANIFI ROHINGYA LETTER BA;Lo;0;AL;;;;;N;;;;;
+ 10D02;HANIFI ROHINGYA LETTER PA;Lo;0;AL;;;;;N;;;;;
+ 10D03;HANIFI ROHINGYA LETTER TA;Lo;0;AL;;;;;N;;;;;
+ 10D04;HANIFI ROHINGYA LETTER TTA;Lo;0;AL;;;;;N;;;;;
+ 10D05;HANIFI ROHINGYA LETTER JA;Lo;0;AL;;;;;N;;;;;
+ 10D06;HANIFI ROHINGYA LETTER CA;Lo;0;AL;;;;;N;;;;;
+ 10D07;HANIFI ROHINGYA LETTER HA;Lo;0;AL;;;;;N;;;;;
+ 10D08;HANIFI ROHINGYA LETTER KHA;Lo;0;AL;;;;;N;;;;;
+ 10D09;HANIFI ROHINGYA LETTER FA;Lo;0;AL;;;;;N;;;;;
+ 10D0A;HANIFI ROHINGYA LETTER DA;Lo;0;AL;;;;;N;;;;;
+ 10D0B;HANIFI ROHINGYA LETTER DDA;Lo;0;AL;;;;;N;;;;;
+ 10D0C;HANIFI ROHINGYA LETTER RA;Lo;0;AL;;;;;N;;;;;
+ 10D0D;HANIFI ROHINGYA LETTER RRA;Lo;0;AL;;;;;N;;;;;
+ 10D0E;HANIFI ROHINGYA LETTER ZA;Lo;0;AL;;;;;N;;;;;
+ 10D0F;HANIFI ROHINGYA LETTER SA;Lo;0;AL;;;;;N;;;;;
+ 10D10;HANIFI ROHINGYA LETTER SHA;Lo;0;AL;;;;;N;;;;;
+ 10D11;HANIFI ROHINGYA LETTER KA;Lo;0;AL;;;;;N;;;;;
+ 10D12;HANIFI ROHINGYA LETTER GA;Lo;0;AL;;;;;N;;;;;
+ 10D13;HANIFI ROHINGYA LETTER LA;Lo;0;AL;;;;;N;;;;;
+ 10D14;HANIFI ROHINGYA LETTER MA;Lo;0;AL;;;;;N;;;;;
+ 10D15;HANIFI ROHINGYA LETTER NA;Lo;0;AL;;;;;N;;;;;
+ 10D16;HANIFI ROHINGYA LETTER WA;Lo;0;AL;;;;;N;;;;;
+ 10D17;HANIFI ROHINGYA LETTER KINNA WA;Lo;0;AL;;;;;N;;;;;
+ 10D18;HANIFI ROHINGYA LETTER YA;Lo;0;AL;;;;;N;;;;;
+ 10D19;HANIFI ROHINGYA LETTER KINNA YA;Lo;0;AL;;;;;N;;;;;
+ 10D1A;HANIFI ROHINGYA LETTER NGA;Lo;0;AL;;;;;N;;;;;
+ 10D1B;HANIFI ROHINGYA LETTER NYA;Lo;0;AL;;;;;N;;;;;
+ 10D1C;HANIFI ROHINGYA LETTER VA;Lo;0;AL;;;;;N;;;;;
+ 10D1D;HANIFI ROHINGYA VOWEL A;Lo;0;AL;;;;;N;;;;;
+ 10D1E;HANIFI ROHINGYA VOWEL I;Lo;0;AL;;;;;N;;;;;
+ 10D1F;HANIFI ROHINGYA VOWEL U;Lo;0;AL;;;;;N;;;;;
+ 10D20;HANIFI ROHINGYA VOWEL E;Lo;0;AL;;;;;N;;;;;
+ 10D21;HANIFI ROHINGYA VOWEL O;Lo;0;AL;;;;;N;;;;;
+ 10D22;HANIFI ROHINGYA MARK SAKIN;Lo;0;AL;;;;;N;;;;;
+ 10D23;HANIFI ROHINGYA MARK NA KHONNA;Lo;0;AL;;;;;N;;;;;
+ 10D24;HANIFI ROHINGYA SIGN HARBAHAY;Mn;230;NSM;;;;;N;;;;;
+ 10D25;HANIFI ROHINGYA SIGN TAHALA;Mn;230;NSM;;;;;N;;;;;
+ 10D26;HANIFI ROHINGYA SIGN TANA;Mn;230;NSM;;;;;N;;;;;
+ 10D27;HANIFI ROHINGYA SIGN TASSI;Mn;230;NSM;;;;;N;;;;;
+ 10D30;HANIFI ROHINGYA DIGIT ZERO;Nd;0;AN;;0;0;0;N;;;;;
+ 10D31;HANIFI ROHINGYA DIGIT ONE;Nd;0;AN;;1;1;1;N;;;;;
+ 10D32;HANIFI ROHINGYA DIGIT TWO;Nd;0;AN;;2;2;2;N;;;;;
+ 10D33;HANIFI ROHINGYA DIGIT THREE;Nd;0;AN;;3;3;3;N;;;;;
+ 10D34;HANIFI ROHINGYA DIGIT FOUR;Nd;0;AN;;4;4;4;N;;;;;
+ 10D35;HANIFI ROHINGYA DIGIT FIVE;Nd;0;AN;;5;5;5;N;;;;;
+ 10D36;HANIFI ROHINGYA DIGIT SIX;Nd;0;AN;;6;6;6;N;;;;;
+ 10D37;HANIFI ROHINGYA DIGIT SEVEN;Nd;0;AN;;7;7;7;N;;;;;
+ 10D38;HANIFI ROHINGYA DIGIT EIGHT;Nd;0;AN;;8;8;8;N;;;;;
+ 10D39;HANIFI ROHINGYA DIGIT NINE;Nd;0;AN;;9;9;9;N;;;;;
+ 10E60;RUMI DIGIT ONE;No;0;AN;;;1;1;N;;;;;
+ 10E61;RUMI DIGIT TWO;No;0;AN;;;2;2;N;;;;;
+ 10E62;RUMI DIGIT THREE;No;0;AN;;;3;3;N;;;;;
+ 10E63;RUMI DIGIT FOUR;No;0;AN;;;4;4;N;;;;;
+ 10E64;RUMI DIGIT FIVE;No;0;AN;;;5;5;N;;;;;
+ 10E65;RUMI DIGIT SIX;No;0;AN;;;6;6;N;;;;;
+ 10E66;RUMI DIGIT SEVEN;No;0;AN;;;7;7;N;;;;;
+ 10E67;RUMI DIGIT EIGHT;No;0;AN;;;8;8;N;;;;;
+ 10E68;RUMI DIGIT NINE;No;0;AN;;;9;9;N;;;;;
+ 10E69;RUMI NUMBER TEN;No;0;AN;;;;10;N;;;;;
+ 10E6A;RUMI NUMBER TWENTY;No;0;AN;;;;20;N;;;;;
+ 10E6B;RUMI NUMBER THIRTY;No;0;AN;;;;30;N;;;;;
+ 10E6C;RUMI NUMBER FORTY;No;0;AN;;;;40;N;;;;;
+ 10E6D;RUMI NUMBER FIFTY;No;0;AN;;;;50;N;;;;;
+ 10E6E;RUMI NUMBER SIXTY;No;0;AN;;;;60;N;;;;;
+ 10E6F;RUMI NUMBER SEVENTY;No;0;AN;;;;70;N;;;;;
+ 10E70;RUMI NUMBER EIGHTY;No;0;AN;;;;80;N;;;;;
+ 10E71;RUMI NUMBER NINETY;No;0;AN;;;;90;N;;;;;
+ 10E72;RUMI NUMBER ONE HUNDRED;No;0;AN;;;;100;N;;;;;
+ 10E73;RUMI NUMBER TWO HUNDRED;No;0;AN;;;;200;N;;;;;
+ 10E74;RUMI NUMBER THREE HUNDRED;No;0;AN;;;;300;N;;;;;
+ 10E75;RUMI NUMBER FOUR HUNDRED;No;0;AN;;;;400;N;;;;;
+ 10E76;RUMI NUMBER FIVE HUNDRED;No;0;AN;;;;500;N;;;;;
+ 10E77;RUMI NUMBER SIX HUNDRED;No;0;AN;;;;600;N;;;;;
+ 10E78;RUMI NUMBER SEVEN HUNDRED;No;0;AN;;;;700;N;;;;;
+ 10E79;RUMI NUMBER EIGHT HUNDRED;No;0;AN;;;;800;N;;;;;
+ 10E7A;RUMI NUMBER NINE HUNDRED;No;0;AN;;;;900;N;;;;;
+ 10E7B;RUMI FRACTION ONE HALF;No;0;AN;;;;1/2;N;;;;;
+ 10E7C;RUMI FRACTION ONE QUARTER;No;0;AN;;;;1/4;N;;;;;
+ 10E7D;RUMI FRACTION ONE THIRD;No;0;AN;;;;1/3;N;;;;;
+ 10E7E;RUMI FRACTION TWO THIRDS;No;0;AN;;;;2/3;N;;;;;
+ 10F00;OLD SOGDIAN LETTER ALEPH;Lo;0;R;;;;;N;;;;;
+ 10F01;OLD SOGDIAN LETTER FINAL ALEPH;Lo;0;R;;;;;N;;;;;
+ 10F02;OLD SOGDIAN LETTER BETH;Lo;0;R;;;;;N;;;;;
+ 10F03;OLD SOGDIAN LETTER FINAL BETH;Lo;0;R;;;;;N;;;;;
+ 10F04;OLD SOGDIAN LETTER GIMEL;Lo;0;R;;;;;N;;;;;
+ 10F05;OLD SOGDIAN LETTER HE;Lo;0;R;;;;;N;;;;;
+ 10F06;OLD SOGDIAN LETTER FINAL HE;Lo;0;R;;;;;N;;;;;
+ 10F07;OLD SOGDIAN LETTER WAW;Lo;0;R;;;;;N;;;;;
+ 10F08;OLD SOGDIAN LETTER ZAYIN;Lo;0;R;;;;;N;;;;;
+ 10F09;OLD SOGDIAN LETTER HETH;Lo;0;R;;;;;N;;;;;
+ 10F0A;OLD SOGDIAN LETTER YODH;Lo;0;R;;;;;N;;;;;
+ 10F0B;OLD SOGDIAN LETTER KAPH;Lo;0;R;;;;;N;;;;;
+ 10F0C;OLD SOGDIAN LETTER LAMEDH;Lo;0;R;;;;;N;;;;;
+ 10F0D;OLD SOGDIAN LETTER MEM;Lo;0;R;;;;;N;;;;;
+ 10F0E;OLD SOGDIAN LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 10F0F;OLD SOGDIAN LETTER FINAL NUN;Lo;0;R;;;;;N;;;;;
+ 10F10;OLD SOGDIAN LETTER FINAL NUN WITH VERTICAL TAIL;Lo;0;R;;;;;N;;;;;
+ 10F11;OLD SOGDIAN LETTER SAMEKH;Lo;0;R;;;;;N;;;;;
+ 10F12;OLD SOGDIAN LETTER AYIN;Lo;0;R;;;;;N;;;;;
+ 10F13;OLD SOGDIAN LETTER ALTERNATE AYIN;Lo;0;R;;;;;N;;;;;
+ 10F14;OLD SOGDIAN LETTER PE;Lo;0;R;;;;;N;;;;;
+ 10F15;OLD SOGDIAN LETTER SADHE;Lo;0;R;;;;;N;;;;;
+ 10F16;OLD SOGDIAN LETTER FINAL SADHE;Lo;0;R;;;;;N;;;;;
+ 10F17;OLD SOGDIAN LETTER FINAL SADHE WITH VERTICAL TAIL;Lo;0;R;;;;;N;;;;;
+ 10F18;OLD SOGDIAN LETTER RESH-AYIN-DALETH;Lo;0;R;;;;;N;;;;;
+ 10F19;OLD SOGDIAN LETTER SHIN;Lo;0;R;;;;;N;;;;;
+ 10F1A;OLD SOGDIAN LETTER TAW;Lo;0;R;;;;;N;;;;;
+ 10F1B;OLD SOGDIAN LETTER FINAL TAW;Lo;0;R;;;;;N;;;;;
+ 10F1C;OLD SOGDIAN LETTER FINAL TAW WITH VERTICAL TAIL;Lo;0;R;;;;;N;;;;;
+ 10F1D;OLD SOGDIAN NUMBER ONE;No;0;R;;;;1;N;;;;;
+ 10F1E;OLD SOGDIAN NUMBER TWO;No;0;R;;;;2;N;;;;;
+ 10F1F;OLD SOGDIAN NUMBER THREE;No;0;R;;;;3;N;;;;;
+ 10F20;OLD SOGDIAN NUMBER FOUR;No;0;R;;;;4;N;;;;;
+ 10F21;OLD SOGDIAN NUMBER FIVE;No;0;R;;;;5;N;;;;;
+ 10F22;OLD SOGDIAN NUMBER TEN;No;0;R;;;;10;N;;;;;
+ 10F23;OLD SOGDIAN NUMBER TWENTY;No;0;R;;;;20;N;;;;;
+ 10F24;OLD SOGDIAN NUMBER THIRTY;No;0;R;;;;30;N;;;;;
+ 10F25;OLD SOGDIAN NUMBER ONE HUNDRED;No;0;R;;;;100;N;;;;;
+ 10F26;OLD SOGDIAN FRACTION ONE HALF;No;0;R;;;;1/2;N;;;;;
+ 10F27;OLD SOGDIAN LIGATURE AYIN-DALETH;Lo;0;R;;;;;N;;;;;
+ 10F30;SOGDIAN LETTER ALEPH;Lo;0;AL;;;;;N;;;;;
+ 10F31;SOGDIAN LETTER BETH;Lo;0;AL;;;;;N;;;;;
+ 10F32;SOGDIAN LETTER GIMEL;Lo;0;AL;;;;;N;;;;;
+ 10F33;SOGDIAN LETTER HE;Lo;0;AL;;;;;N;;;;;
+ 10F34;SOGDIAN LETTER WAW;Lo;0;AL;;;;;N;;;;;
+ 10F35;SOGDIAN LETTER ZAYIN;Lo;0;AL;;;;;N;;;;;
+ 10F36;SOGDIAN LETTER HETH;Lo;0;AL;;;;;N;;;;;
+ 10F37;SOGDIAN LETTER YODH;Lo;0;AL;;;;;N;;;;;
+ 10F38;SOGDIAN LETTER KAPH;Lo;0;AL;;;;;N;;;;;
+ 10F39;SOGDIAN LETTER LAMEDH;Lo;0;AL;;;;;N;;;;;
+ 10F3A;SOGDIAN LETTER MEM;Lo;0;AL;;;;;N;;;;;
+ 10F3B;SOGDIAN LETTER NUN;Lo;0;AL;;;;;N;;;;;
+ 10F3C;SOGDIAN LETTER SAMEKH;Lo;0;AL;;;;;N;;;;;
+ 10F3D;SOGDIAN LETTER AYIN;Lo;0;AL;;;;;N;;;;;
+ 10F3E;SOGDIAN LETTER PE;Lo;0;AL;;;;;N;;;;;
+ 10F3F;SOGDIAN LETTER SADHE;Lo;0;AL;;;;;N;;;;;
+ 10F40;SOGDIAN LETTER RESH-AYIN;Lo;0;AL;;;;;N;;;;;
+ 10F41;SOGDIAN LETTER SHIN;Lo;0;AL;;;;;N;;;;;
+ 10F42;SOGDIAN LETTER TAW;Lo;0;AL;;;;;N;;;;;
+ 10F43;SOGDIAN LETTER FETH;Lo;0;AL;;;;;N;;;;;
+ 10F44;SOGDIAN LETTER LESH;Lo;0;AL;;;;;N;;;;;
+ 10F45;SOGDIAN INDEPENDENT SHIN;Lo;0;AL;;;;;N;;;;;
+ 10F46;SOGDIAN COMBINING DOT BELOW;Mn;220;NSM;;;;;N;;;;;
+ 10F47;SOGDIAN COMBINING TWO DOTS BELOW;Mn;220;NSM;;;;;N;;;;;
+ 10F48;SOGDIAN COMBINING DOT ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 10F49;SOGDIAN COMBINING TWO DOTS ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 10F4A;SOGDIAN COMBINING CURVE ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 10F4B;SOGDIAN COMBINING CURVE BELOW;Mn;220;NSM;;;;;N;;;;;
+ 10F4C;SOGDIAN COMBINING HOOK ABOVE;Mn;230;NSM;;;;;N;;;;;
+ 10F4D;SOGDIAN COMBINING HOOK BELOW;Mn;220;NSM;;;;;N;;;;;
+ 10F4E;SOGDIAN COMBINING LONG HOOK BELOW;Mn;220;NSM;;;;;N;;;;;
+ 10F4F;SOGDIAN COMBINING RESH BELOW;Mn;220;NSM;;;;;N;;;;;
+ 10F50;SOGDIAN COMBINING STROKE BELOW;Mn;220;NSM;;;;;N;;;;;
+ 10F51;SOGDIAN NUMBER ONE;No;0;AL;;;;1;N;;;;;
+ 10F52;SOGDIAN NUMBER TEN;No;0;AL;;;;10;N;;;;;
+ 10F53;SOGDIAN NUMBER TWENTY;No;0;AL;;;;20;N;;;;;
+ 10F54;SOGDIAN NUMBER ONE HUNDRED;No;0;AL;;;;100;N;;;;;
+ 10F55;SOGDIAN PUNCTUATION TWO VERTICAL BARS;Po;0;AL;;;;;N;;;;;
+ 10F56;SOGDIAN PUNCTUATION TWO VERTICAL BARS WITH DOTS;Po;0;AL;;;;;N;;;;;
+ 10F57;SOGDIAN PUNCTUATION CIRCLE WITH DOT;Po;0;AL;;;;;N;;;;;
+ 10F58;SOGDIAN PUNCTUATION TWO CIRCLES WITH DOTS;Po;0;AL;;;;;N;;;;;
+ 10F59;SOGDIAN PUNCTUATION HALF CIRCLE WITH DOT;Po;0;AL;;;;;N;;;;;
+ 10FE0;ELYMAIC LETTER ALEPH;Lo;0;R;;;;;N;;;;;
+ 10FE1;ELYMAIC LETTER BETH;Lo;0;R;;;;;N;;;;;
+ 10FE2;ELYMAIC LETTER GIMEL;Lo;0;R;;;;;N;;;;;
+ 10FE3;ELYMAIC LETTER DALETH;Lo;0;R;;;;;N;;;;;
+ 10FE4;ELYMAIC LETTER HE;Lo;0;R;;;;;N;;;;;
+ 10FE5;ELYMAIC LETTER WAW;Lo;0;R;;;;;N;;;;;
+ 10FE6;ELYMAIC LETTER ZAYIN;Lo;0;R;;;;;N;;;;;
+ 10FE7;ELYMAIC LETTER HETH;Lo;0;R;;;;;N;;;;;
+ 10FE8;ELYMAIC LETTER TETH;Lo;0;R;;;;;N;;;;;
+ 10FE9;ELYMAIC LETTER YODH;Lo;0;R;;;;;N;;;;;
+ 10FEA;ELYMAIC LETTER KAPH;Lo;0;R;;;;;N;;;;;
+ 10FEB;ELYMAIC LETTER LAMEDH;Lo;0;R;;;;;N;;;;;
+ 10FEC;ELYMAIC LETTER MEM;Lo;0;R;;;;;N;;;;;
+ 10FED;ELYMAIC LETTER NUN;Lo;0;R;;;;;N;;;;;
+ 10FEE;ELYMAIC LETTER SAMEKH;Lo;0;R;;;;;N;;;;;
+ 10FEF;ELYMAIC LETTER AYIN;Lo;0;R;;;;;N;;;;;
+ 10FF0;ELYMAIC LETTER PE;Lo;0;R;;;;;N;;;;;
+ 10FF1;ELYMAIC LETTER SADHE;Lo;0;R;;;;;N;;;;;
+ 10FF2;ELYMAIC LETTER QOPH;Lo;0;R;;;;;N;;;;;
+ 10FF3;ELYMAIC LETTER RESH;Lo;0;R;;;;;N;;;;;
+ 10FF4;ELYMAIC LETTER SHIN;Lo;0;R;;;;;N;;;;;
+ 10FF5;ELYMAIC LETTER TAW;Lo;0;R;;;;;N;;;;;
+ 10FF6;ELYMAIC LIGATURE ZAYIN-YODH;Lo;0;R;;;;;N;;;;;
+ 11000;BRAHMI SIGN CANDRABINDU;Mc;0;L;;;;;N;;;;;
+ 11001;BRAHMI SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 11002;BRAHMI SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 11003;BRAHMI SIGN JIHVAMULIYA;Lo;0;L;;;;;N;;;;;
+ 11004;BRAHMI SIGN UPADHMANIYA;Lo;0;L;;;;;N;;;;;
+ 11005;BRAHMI LETTER A;Lo;0;L;;;;;N;;;;;
+ 11006;BRAHMI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11007;BRAHMI LETTER I;Lo;0;L;;;;;N;;;;;
+ 11008;BRAHMI LETTER II;Lo;0;L;;;;;N;;;;;
+ 11009;BRAHMI LETTER U;Lo;0;L;;;;;N;;;;;
+ 1100A;BRAHMI LETTER UU;Lo;0;L;;;;;N;;;;;
+ 1100B;BRAHMI LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 1100C;BRAHMI LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 1100D;BRAHMI LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 1100E;BRAHMI LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 1100F;BRAHMI LETTER E;Lo;0;L;;;;;N;;;;;
+ 11010;BRAHMI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 11011;BRAHMI LETTER O;Lo;0;L;;;;;N;;;;;
+ 11012;BRAHMI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 11013;BRAHMI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11014;BRAHMI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11015;BRAHMI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11016;BRAHMI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11017;BRAHMI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11018;BRAHMI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11019;BRAHMI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 1101A;BRAHMI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1101B;BRAHMI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 1101C;BRAHMI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 1101D;BRAHMI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 1101E;BRAHMI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 1101F;BRAHMI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 11020;BRAHMI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 11021;BRAHMI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 11022;BRAHMI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11023;BRAHMI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 11024;BRAHMI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11025;BRAHMI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 11026;BRAHMI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 11027;BRAHMI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11028;BRAHMI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 11029;BRAHMI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1102A;BRAHMI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 1102B;BRAHMI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1102C;BRAHMI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 1102D;BRAHMI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1102E;BRAHMI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1102F;BRAHMI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 11030;BRAHMI LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 11031;BRAHMI LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 11032;BRAHMI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11033;BRAHMI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 11034;BRAHMI LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 11035;BRAHMI LETTER OLD TAMIL LLLA;Lo;0;L;;;;;N;;;;;
+ 11036;BRAHMI LETTER OLD TAMIL RRA;Lo;0;L;;;;;N;;;;;
+ 11037;BRAHMI LETTER OLD TAMIL NNNA;Lo;0;L;;;;;N;;;;;
+ 11038;BRAHMI VOWEL SIGN AA;Mn;0;NSM;;;;;N;;;;;
+ 11039;BRAHMI VOWEL SIGN BHATTIPROLU AA;Mn;0;NSM;;;;;N;;;;;
+ 1103A;BRAHMI VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 1103B;BRAHMI VOWEL SIGN II;Mn;0;NSM;;;;;N;;;;;
+ 1103C;BRAHMI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 1103D;BRAHMI VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 1103E;BRAHMI VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 1103F;BRAHMI VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 11040;BRAHMI VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 11041;BRAHMI VOWEL SIGN VOCALIC LL;Mn;0;NSM;;;;;N;;;;;
+ 11042;BRAHMI VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 11043;BRAHMI VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 11044;BRAHMI VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 11045;BRAHMI VOWEL SIGN AU;Mn;0;NSM;;;;;N;;;;;
+ 11046;BRAHMI VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 11047;BRAHMI DANDA;Po;0;L;;;;;N;;;;;
+ 11048;BRAHMI DOUBLE DANDA;Po;0;L;;;;;N;;;;;
+ 11049;BRAHMI PUNCTUATION DOT;Po;0;L;;;;;N;;;;;
+ 1104A;BRAHMI PUNCTUATION DOUBLE DOT;Po;0;L;;;;;N;;;;;
+ 1104B;BRAHMI PUNCTUATION LINE;Po;0;L;;;;;N;;;;;
+ 1104C;BRAHMI PUNCTUATION CRESCENT BAR;Po;0;L;;;;;N;;;;;
+ 1104D;BRAHMI PUNCTUATION LOTUS;Po;0;L;;;;;N;;;;;
+ 11052;BRAHMI NUMBER ONE;No;0;ON;;;1;1;N;;;;;
+ 11053;BRAHMI NUMBER TWO;No;0;ON;;;2;2;N;;;;;
+ 11054;BRAHMI NUMBER THREE;No;0;ON;;;3;3;N;;;;;
+ 11055;BRAHMI NUMBER FOUR;No;0;ON;;;4;4;N;;;;;
+ 11056;BRAHMI NUMBER FIVE;No;0;ON;;;5;5;N;;;;;
+ 11057;BRAHMI NUMBER SIX;No;0;ON;;;6;6;N;;;;;
+ 11058;BRAHMI NUMBER SEVEN;No;0;ON;;;7;7;N;;;;;
+ 11059;BRAHMI NUMBER EIGHT;No;0;ON;;;8;8;N;;;;;
+ 1105A;BRAHMI NUMBER NINE;No;0;ON;;;9;9;N;;;;;
+ 1105B;BRAHMI NUMBER TEN;No;0;ON;;;;10;N;;;;;
+ 1105C;BRAHMI NUMBER TWENTY;No;0;ON;;;;20;N;;;;;
+ 1105D;BRAHMI NUMBER THIRTY;No;0;ON;;;;30;N;;;;;
+ 1105E;BRAHMI NUMBER FORTY;No;0;ON;;;;40;N;;;;;
+ 1105F;BRAHMI NUMBER FIFTY;No;0;ON;;;;50;N;;;;;
+ 11060;BRAHMI NUMBER SIXTY;No;0;ON;;;;60;N;;;;;
+ 11061;BRAHMI NUMBER SEVENTY;No;0;ON;;;;70;N;;;;;
+ 11062;BRAHMI NUMBER EIGHTY;No;0;ON;;;;80;N;;;;;
+ 11063;BRAHMI NUMBER NINETY;No;0;ON;;;;90;N;;;;;
+ 11064;BRAHMI NUMBER ONE HUNDRED;No;0;ON;;;;100;N;;;;;
+ 11065;BRAHMI NUMBER ONE THOUSAND;No;0;ON;;;;1000;N;;;;;
+ 11066;BRAHMI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 11067;BRAHMI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 11068;BRAHMI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 11069;BRAHMI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 1106A;BRAHMI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 1106B;BRAHMI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 1106C;BRAHMI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 1106D;BRAHMI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 1106E;BRAHMI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 1106F;BRAHMI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 1107F;BRAHMI NUMBER JOINER;Mn;9;NSM;;;;;N;;;;;
+ 11080;KAITHI SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 11081;KAITHI SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 11082;KAITHI SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 11083;KAITHI LETTER A;Lo;0;L;;;;;N;;;;;
+ 11084;KAITHI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11085;KAITHI LETTER I;Lo;0;L;;;;;N;;;;;
+ 11086;KAITHI LETTER II;Lo;0;L;;;;;N;;;;;
+ 11087;KAITHI LETTER U;Lo;0;L;;;;;N;;;;;
+ 11088;KAITHI LETTER UU;Lo;0;L;;;;;N;;;;;
+ 11089;KAITHI LETTER E;Lo;0;L;;;;;N;;;;;
+ 1108A;KAITHI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 1108B;KAITHI LETTER O;Lo;0;L;;;;;N;;;;;
+ 1108C;KAITHI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 1108D;KAITHI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1108E;KAITHI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 1108F;KAITHI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11090;KAITHI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11091;KAITHI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11092;KAITHI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11093;KAITHI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11094;KAITHI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11095;KAITHI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 11096;KAITHI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11097;KAITHI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 11098;KAITHI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 11099;KAITHI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 1109A;KAITHI LETTER DDDHA;Lo;0;L;11099 110BA;;;;N;;;;;
+ 1109B;KAITHI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 1109C;KAITHI LETTER RHA;Lo;0;L;1109B 110BA;;;;N;;;;;
+ 1109D;KAITHI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 1109E;KAITHI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1109F;KAITHI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 110A0;KAITHI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 110A1;KAITHI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 110A2;KAITHI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 110A3;KAITHI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 110A4;KAITHI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 110A5;KAITHI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 110A6;KAITHI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 110A7;KAITHI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 110A8;KAITHI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 110A9;KAITHI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 110AA;KAITHI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 110AB;KAITHI LETTER VA;Lo;0;L;110A5 110BA;;;;N;;;;;
+ 110AC;KAITHI LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 110AD;KAITHI LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 110AE;KAITHI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 110AF;KAITHI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 110B0;KAITHI VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 110B1;KAITHI VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 110B2;KAITHI VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 110B3;KAITHI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 110B4;KAITHI VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 110B5;KAITHI VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 110B6;KAITHI VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 110B7;KAITHI VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ 110B8;KAITHI VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ 110B9;KAITHI SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 110BA;KAITHI SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 110BB;KAITHI ABBREVIATION SIGN;Po;0;L;;;;;N;;;;;
+ 110BC;KAITHI ENUMERATION SIGN;Po;0;L;;;;;N;;;;;
+ 110BD;KAITHI NUMBER SIGN;Cf;0;L;;;;;N;;;;;
+ 110BE;KAITHI SECTION MARK;Po;0;L;;;;;N;;;;;
+ 110BF;KAITHI DOUBLE SECTION MARK;Po;0;L;;;;;N;;;;;
+ 110C0;KAITHI DANDA;Po;0;L;;;;;N;;;;;
+ 110C1;KAITHI DOUBLE DANDA;Po;0;L;;;;;N;;;;;
+ 110CD;KAITHI NUMBER SIGN ABOVE;Cf;0;L;;;;;N;;;;;
+ 110D0;SORA SOMPENG LETTER SAH;Lo;0;L;;;;;N;;;;;
+ 110D1;SORA SOMPENG LETTER TAH;Lo;0;L;;;;;N;;;;;
+ 110D2;SORA SOMPENG LETTER BAH;Lo;0;L;;;;;N;;;;;
+ 110D3;SORA SOMPENG LETTER CAH;Lo;0;L;;;;;N;;;;;
+ 110D4;SORA SOMPENG LETTER DAH;Lo;0;L;;;;;N;;;;;
+ 110D5;SORA SOMPENG LETTER GAH;Lo;0;L;;;;;N;;;;;
+ 110D6;SORA SOMPENG LETTER MAH;Lo;0;L;;;;;N;;;;;
+ 110D7;SORA SOMPENG LETTER NGAH;Lo;0;L;;;;;N;;;;;
+ 110D8;SORA SOMPENG LETTER LAH;Lo;0;L;;;;;N;;;;;
+ 110D9;SORA SOMPENG LETTER NAH;Lo;0;L;;;;;N;;;;;
+ 110DA;SORA SOMPENG LETTER VAH;Lo;0;L;;;;;N;;;;;
+ 110DB;SORA SOMPENG LETTER PAH;Lo;0;L;;;;;N;;;;;
+ 110DC;SORA SOMPENG LETTER YAH;Lo;0;L;;;;;N;;;;;
+ 110DD;SORA SOMPENG LETTER RAH;Lo;0;L;;;;;N;;;;;
+ 110DE;SORA SOMPENG LETTER HAH;Lo;0;L;;;;;N;;;;;
+ 110DF;SORA SOMPENG LETTER KAH;Lo;0;L;;;;;N;;;;;
+ 110E0;SORA SOMPENG LETTER JAH;Lo;0;L;;;;;N;;;;;
+ 110E1;SORA SOMPENG LETTER NYAH;Lo;0;L;;;;;N;;;;;
+ 110E2;SORA SOMPENG LETTER AH;Lo;0;L;;;;;N;;;;;
+ 110E3;SORA SOMPENG LETTER EEH;Lo;0;L;;;;;N;;;;;
+ 110E4;SORA SOMPENG LETTER IH;Lo;0;L;;;;;N;;;;;
+ 110E5;SORA SOMPENG LETTER UH;Lo;0;L;;;;;N;;;;;
+ 110E6;SORA SOMPENG LETTER OH;Lo;0;L;;;;;N;;;;;
+ 110E7;SORA SOMPENG LETTER EH;Lo;0;L;;;;;N;;;;;
+ 110E8;SORA SOMPENG LETTER MAE;Lo;0;L;;;;;N;;;;;
+ 110F0;SORA SOMPENG DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 110F1;SORA SOMPENG DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 110F2;SORA SOMPENG DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 110F3;SORA SOMPENG DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 110F4;SORA SOMPENG DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 110F5;SORA SOMPENG DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 110F6;SORA SOMPENG DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 110F7;SORA SOMPENG DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 110F8;SORA SOMPENG DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 110F9;SORA SOMPENG DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 11100;CHAKMA SIGN CANDRABINDU;Mn;230;NSM;;;;;N;;;;;
+ 11101;CHAKMA SIGN ANUSVARA;Mn;230;NSM;;;;;N;;;;;
+ 11102;CHAKMA SIGN VISARGA;Mn;230;NSM;;;;;N;;;;;
+ 11103;CHAKMA LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11104;CHAKMA LETTER I;Lo;0;L;;;;;N;;;;;
+ 11105;CHAKMA LETTER U;Lo;0;L;;;;;N;;;;;
+ 11106;CHAKMA LETTER E;Lo;0;L;;;;;N;;;;;
+ 11107;CHAKMA LETTER KAA;Lo;0;L;;;;;N;;;;;
+ 11108;CHAKMA LETTER KHAA;Lo;0;L;;;;;N;;;;;
+ 11109;CHAKMA LETTER GAA;Lo;0;L;;;;;N;;;;;
+ 1110A;CHAKMA LETTER GHAA;Lo;0;L;;;;;N;;;;;
+ 1110B;CHAKMA LETTER NGAA;Lo;0;L;;;;;N;;;;;
+ 1110C;CHAKMA LETTER CAA;Lo;0;L;;;;;N;;;;;
+ 1110D;CHAKMA LETTER CHAA;Lo;0;L;;;;;N;;;;;
+ 1110E;CHAKMA LETTER JAA;Lo;0;L;;;;;N;;;;;
+ 1110F;CHAKMA LETTER JHAA;Lo;0;L;;;;;N;;;;;
+ 11110;CHAKMA LETTER NYAA;Lo;0;L;;;;;N;;;;;
+ 11111;CHAKMA LETTER TTAA;Lo;0;L;;;;;N;;;;;
+ 11112;CHAKMA LETTER TTHAA;Lo;0;L;;;;;N;;;;;
+ 11113;CHAKMA LETTER DDAA;Lo;0;L;;;;;N;;;;;
+ 11114;CHAKMA LETTER DDHAA;Lo;0;L;;;;;N;;;;;
+ 11115;CHAKMA LETTER NNAA;Lo;0;L;;;;;N;;;;;
+ 11116;CHAKMA LETTER TAA;Lo;0;L;;;;;N;;;;;
+ 11117;CHAKMA LETTER THAA;Lo;0;L;;;;;N;;;;;
+ 11118;CHAKMA LETTER DAA;Lo;0;L;;;;;N;;;;;
+ 11119;CHAKMA LETTER DHAA;Lo;0;L;;;;;N;;;;;
+ 1111A;CHAKMA LETTER NAA;Lo;0;L;;;;;N;;;;;
+ 1111B;CHAKMA LETTER PAA;Lo;0;L;;;;;N;;;;;
+ 1111C;CHAKMA LETTER PHAA;Lo;0;L;;;;;N;;;;;
+ 1111D;CHAKMA LETTER BAA;Lo;0;L;;;;;N;;;;;
+ 1111E;CHAKMA LETTER BHAA;Lo;0;L;;;;;N;;;;;
+ 1111F;CHAKMA LETTER MAA;Lo;0;L;;;;;N;;;;;
+ 11120;CHAKMA LETTER YYAA;Lo;0;L;;;;;N;;;;;
+ 11121;CHAKMA LETTER YAA;Lo;0;L;;;;;N;;;;;
+ 11122;CHAKMA LETTER RAA;Lo;0;L;;;;;N;;;;;
+ 11123;CHAKMA LETTER LAA;Lo;0;L;;;;;N;;;;;
+ 11124;CHAKMA LETTER WAA;Lo;0;L;;;;;N;;;;;
+ 11125;CHAKMA LETTER SAA;Lo;0;L;;;;;N;;;;;
+ 11126;CHAKMA LETTER HAA;Lo;0;L;;;;;N;;;;;
+ 11127;CHAKMA VOWEL SIGN A;Mn;0;NSM;;;;;N;;;;;
+ 11128;CHAKMA VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 11129;CHAKMA VOWEL SIGN II;Mn;0;NSM;;;;;N;;;;;
+ 1112A;CHAKMA VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 1112B;CHAKMA VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 1112C;CHAKMA VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 1112D;CHAKMA VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 1112E;CHAKMA VOWEL SIGN O;Mn;0;NSM;11131 11127;;;;N;;;;;
+ 1112F;CHAKMA VOWEL SIGN AU;Mn;0;NSM;11132 11127;;;;N;;;;;
+ 11130;CHAKMA VOWEL SIGN OI;Mn;0;NSM;;;;;N;;;;;
+ 11131;CHAKMA O MARK;Mn;0;NSM;;;;;N;;;;;
+ 11132;CHAKMA AU MARK;Mn;0;NSM;;;;;N;;;;;
+ 11133;CHAKMA VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 11134;CHAKMA MAAYYAA;Mn;9;NSM;;;;;N;;;;;
+ 11136;CHAKMA DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 11137;CHAKMA DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 11138;CHAKMA DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 11139;CHAKMA DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 1113A;CHAKMA DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 1113B;CHAKMA DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 1113C;CHAKMA DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 1113D;CHAKMA DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 1113E;CHAKMA DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 1113F;CHAKMA DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 11140;CHAKMA SECTION MARK;Po;0;L;;;;;N;;;;;
+ 11141;CHAKMA DANDA;Po;0;L;;;;;N;;;;;
+ 11142;CHAKMA DOUBLE DANDA;Po;0;L;;;;;N;;;;;
+ 11143;CHAKMA QUESTION MARK;Po;0;L;;;;;N;;;;;
+ 11144;CHAKMA LETTER LHAA;Lo;0;L;;;;;N;;;;;
+ 11145;CHAKMA VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 11146;CHAKMA VOWEL SIGN EI;Mc;0;L;;;;;N;;;;;
+ 11150;MAHAJANI LETTER A;Lo;0;L;;;;;N;;;;;
+ 11151;MAHAJANI LETTER I;Lo;0;L;;;;;N;;;;;
+ 11152;MAHAJANI LETTER U;Lo;0;L;;;;;N;;;;;
+ 11153;MAHAJANI LETTER E;Lo;0;L;;;;;N;;;;;
+ 11154;MAHAJANI LETTER O;Lo;0;L;;;;;N;;;;;
+ 11155;MAHAJANI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11156;MAHAJANI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11157;MAHAJANI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11158;MAHAJANI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11159;MAHAJANI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1115A;MAHAJANI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 1115B;MAHAJANI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1115C;MAHAJANI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 1115D;MAHAJANI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 1115E;MAHAJANI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 1115F;MAHAJANI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 11160;MAHAJANI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 11161;MAHAJANI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 11162;MAHAJANI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 11163;MAHAJANI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11164;MAHAJANI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 11165;MAHAJANI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11166;MAHAJANI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 11167;MAHAJANI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 11168;MAHAJANI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11169;MAHAJANI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 1116A;MAHAJANI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1116B;MAHAJANI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 1116C;MAHAJANI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1116D;MAHAJANI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1116E;MAHAJANI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1116F;MAHAJANI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 11170;MAHAJANI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11171;MAHAJANI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 11172;MAHAJANI LETTER RRA;Lo;0;L;;;;;N;;;;;
+ 11173;MAHAJANI SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 11174;MAHAJANI ABBREVIATION SIGN;Po;0;L;;;;;N;;;;;
+ 11175;MAHAJANI SECTION MARK;Po;0;L;;;;;N;;;;;
+ 11176;MAHAJANI LIGATURE SHRI;Lo;0;L;;;;;N;;;;;
+ 11180;SHARADA SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 11181;SHARADA SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 11182;SHARADA SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 11183;SHARADA LETTER A;Lo;0;L;;;;;N;;;;;
+ 11184;SHARADA LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11185;SHARADA LETTER I;Lo;0;L;;;;;N;;;;;
+ 11186;SHARADA LETTER II;Lo;0;L;;;;;N;;;;;
+ 11187;SHARADA LETTER U;Lo;0;L;;;;;N;;;;;
+ 11188;SHARADA LETTER UU;Lo;0;L;;;;;N;;;;;
+ 11189;SHARADA LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 1118A;SHARADA LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 1118B;SHARADA LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 1118C;SHARADA LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 1118D;SHARADA LETTER E;Lo;0;L;;;;;N;;;;;
+ 1118E;SHARADA LETTER AI;Lo;0;L;;;;;N;;;;;
+ 1118F;SHARADA LETTER O;Lo;0;L;;;;;N;;;;;
+ 11190;SHARADA LETTER AU;Lo;0;L;;;;;N;;;;;
+ 11191;SHARADA LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11192;SHARADA LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11193;SHARADA LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11194;SHARADA LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11195;SHARADA LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11196;SHARADA LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11197;SHARADA LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11198;SHARADA LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11199;SHARADA LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 1119A;SHARADA LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 1119B;SHARADA LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 1119C;SHARADA LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 1119D;SHARADA LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 1119E;SHARADA LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 1119F;SHARADA LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 111A0;SHARADA LETTER TA;Lo;0;L;;;;;N;;;;;
+ 111A1;SHARADA LETTER THA;Lo;0;L;;;;;N;;;;;
+ 111A2;SHARADA LETTER DA;Lo;0;L;;;;;N;;;;;
+ 111A3;SHARADA LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 111A4;SHARADA LETTER NA;Lo;0;L;;;;;N;;;;;
+ 111A5;SHARADA LETTER PA;Lo;0;L;;;;;N;;;;;
+ 111A6;SHARADA LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 111A7;SHARADA LETTER BA;Lo;0;L;;;;;N;;;;;
+ 111A8;SHARADA LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 111A9;SHARADA LETTER MA;Lo;0;L;;;;;N;;;;;
+ 111AA;SHARADA LETTER YA;Lo;0;L;;;;;N;;;;;
+ 111AB;SHARADA LETTER RA;Lo;0;L;;;;;N;;;;;
+ 111AC;SHARADA LETTER LA;Lo;0;L;;;;;N;;;;;
+ 111AD;SHARADA LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 111AE;SHARADA LETTER VA;Lo;0;L;;;;;N;;;;;
+ 111AF;SHARADA LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 111B0;SHARADA LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 111B1;SHARADA LETTER SA;Lo;0;L;;;;;N;;;;;
+ 111B2;SHARADA LETTER HA;Lo;0;L;;;;;N;;;;;
+ 111B3;SHARADA VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 111B4;SHARADA VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 111B5;SHARADA VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 111B6;SHARADA VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 111B7;SHARADA VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 111B8;SHARADA VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 111B9;SHARADA VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 111BA;SHARADA VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 111BB;SHARADA VOWEL SIGN VOCALIC LL;Mn;0;NSM;;;;;N;;;;;
+ 111BC;SHARADA VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 111BD;SHARADA VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 111BE;SHARADA VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 111BF;SHARADA VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ 111C0;SHARADA SIGN VIRAMA;Mc;9;L;;;;;N;;;;;
+ 111C1;SHARADA SIGN AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 111C2;SHARADA SIGN JIHVAMULIYA;Lo;0;L;;;;;N;;;;;
+ 111C3;SHARADA SIGN UPADHMANIYA;Lo;0;L;;;;;N;;;;;
+ 111C4;SHARADA OM;Lo;0;L;;;;;N;;;;;
+ 111C5;SHARADA DANDA;Po;0;L;;;;;N;;;;;
+ 111C6;SHARADA DOUBLE DANDA;Po;0;L;;;;;N;;;;;
+ 111C7;SHARADA ABBREVIATION SIGN;Po;0;L;;;;;N;;;;;
+ 111C8;SHARADA SEPARATOR;Po;0;L;;;;;N;;;;;
+ 111C9;SHARADA SANDHI MARK;Mn;0;NSM;;;;;N;;;;;
+ 111CA;SHARADA SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 111CB;SHARADA VOWEL MODIFIER MARK;Mn;0;NSM;;;;;N;;;;;
+ 111CC;SHARADA EXTRA SHORT VOWEL MARK;Mn;0;NSM;;;;;N;;;;;
+ 111CD;SHARADA SUTRA MARK;Po;0;L;;;;;N;;;;;
+ 111D0;SHARADA DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 111D1;SHARADA DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 111D2;SHARADA DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 111D3;SHARADA DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 111D4;SHARADA DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 111D5;SHARADA DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 111D6;SHARADA DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 111D7;SHARADA DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 111D8;SHARADA DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 111D9;SHARADA DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 111DA;SHARADA EKAM;Lo;0;L;;;;;N;;;;;
+ 111DB;SHARADA SIGN SIDDHAM;Po;0;L;;;;;N;;;;;
+ 111DC;SHARADA HEADSTROKE;Lo;0;L;;;;;N;;;;;
+ 111DD;SHARADA CONTINUATION SIGN;Po;0;L;;;;;N;;;;;
+ 111DE;SHARADA SECTION MARK-1;Po;0;L;;;;;N;;;;;
+ 111DF;SHARADA SECTION MARK-2;Po;0;L;;;;;N;;;;;
+ 111E1;SINHALA ARCHAIC DIGIT ONE;No;0;L;;;;1;N;;;;;
+ 111E2;SINHALA ARCHAIC DIGIT TWO;No;0;L;;;;2;N;;;;;
+ 111E3;SINHALA ARCHAIC DIGIT THREE;No;0;L;;;;3;N;;;;;
+ 111E4;SINHALA ARCHAIC DIGIT FOUR;No;0;L;;;;4;N;;;;;
+ 111E5;SINHALA ARCHAIC DIGIT FIVE;No;0;L;;;;5;N;;;;;
+ 111E6;SINHALA ARCHAIC DIGIT SIX;No;0;L;;;;6;N;;;;;
+ 111E7;SINHALA ARCHAIC DIGIT SEVEN;No;0;L;;;;7;N;;;;;
+ 111E8;SINHALA ARCHAIC DIGIT EIGHT;No;0;L;;;;8;N;;;;;
+ 111E9;SINHALA ARCHAIC DIGIT NINE;No;0;L;;;;9;N;;;;;
+ 111EA;SINHALA ARCHAIC NUMBER TEN;No;0;L;;;;10;N;;;;;
+ 111EB;SINHALA ARCHAIC NUMBER TWENTY;No;0;L;;;;20;N;;;;;
+ 111EC;SINHALA ARCHAIC NUMBER THIRTY;No;0;L;;;;30;N;;;;;
+ 111ED;SINHALA ARCHAIC NUMBER FORTY;No;0;L;;;;40;N;;;;;
+ 111EE;SINHALA ARCHAIC NUMBER FIFTY;No;0;L;;;;50;N;;;;;
+ 111EF;SINHALA ARCHAIC NUMBER SIXTY;No;0;L;;;;60;N;;;;;
+ 111F0;SINHALA ARCHAIC NUMBER SEVENTY;No;0;L;;;;70;N;;;;;
+ 111F1;SINHALA ARCHAIC NUMBER EIGHTY;No;0;L;;;;80;N;;;;;
+ 111F2;SINHALA ARCHAIC NUMBER NINETY;No;0;L;;;;90;N;;;;;
+ 111F3;SINHALA ARCHAIC NUMBER ONE HUNDRED;No;0;L;;;;100;N;;;;;
+ 111F4;SINHALA ARCHAIC NUMBER ONE THOUSAND;No;0;L;;;;1000;N;;;;;
+ 11200;KHOJKI LETTER A;Lo;0;L;;;;;N;;;;;
+ 11201;KHOJKI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11202;KHOJKI LETTER I;Lo;0;L;;;;;N;;;;;
+ 11203;KHOJKI LETTER U;Lo;0;L;;;;;N;;;;;
+ 11204;KHOJKI LETTER E;Lo;0;L;;;;;N;;;;;
+ 11205;KHOJKI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 11206;KHOJKI LETTER O;Lo;0;L;;;;;N;;;;;
+ 11207;KHOJKI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 11208;KHOJKI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11209;KHOJKI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 1120A;KHOJKI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1120B;KHOJKI LETTER GGA;Lo;0;L;;;;;N;;;;;
+ 1120C;KHOJKI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 1120D;KHOJKI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1120E;KHOJKI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1120F;KHOJKI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11210;KHOJKI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11211;KHOJKI LETTER JJA;Lo;0;L;;;;;N;;;;;
+ 11213;KHOJKI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11214;KHOJKI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 11215;KHOJKI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 11216;KHOJKI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 11217;KHOJKI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 11218;KHOJKI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 11219;KHOJKI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1121A;KHOJKI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 1121B;KHOJKI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1121C;KHOJKI LETTER DDDA;Lo;0;L;;;;;N;;;;;
+ 1121D;KHOJKI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 1121E;KHOJKI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1121F;KHOJKI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11220;KHOJKI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 11221;KHOJKI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 11222;KHOJKI LETTER BBA;Lo;0;L;;;;;N;;;;;
+ 11223;KHOJKI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 11224;KHOJKI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 11225;KHOJKI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 11226;KHOJKI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11227;KHOJKI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 11228;KHOJKI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 11229;KHOJKI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1122A;KHOJKI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1122B;KHOJKI LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 1122C;KHOJKI VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 1122D;KHOJKI VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 1122E;KHOJKI VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 1122F;KHOJKI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 11230;KHOJKI VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 11231;KHOJKI VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 11232;KHOJKI VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ 11233;KHOJKI VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ 11234;KHOJKI SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 11235;KHOJKI SIGN VIRAMA;Mc;9;L;;;;;N;;;;;
+ 11236;KHOJKI SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 11237;KHOJKI SIGN SHADDA;Mn;0;NSM;;;;;N;;;;;
+ 11238;KHOJKI DANDA;Po;0;L;;;;;N;;;;;
+ 11239;KHOJKI DOUBLE DANDA;Po;0;L;;;;;N;;;;;
+ 1123A;KHOJKI WORD SEPARATOR;Po;0;L;;;;;N;;;;;
+ 1123B;KHOJKI SECTION MARK;Po;0;L;;;;;N;;;;;
+ 1123C;KHOJKI DOUBLE SECTION MARK;Po;0;L;;;;;N;;;;;
+ 1123D;KHOJKI ABBREVIATION SIGN;Po;0;L;;;;;N;;;;;
+ 1123E;KHOJKI SIGN SUKUN;Mn;0;NSM;;;;;N;;;;;
+ 11280;MULTANI LETTER A;Lo;0;L;;;;;N;;;;;
+ 11281;MULTANI LETTER I;Lo;0;L;;;;;N;;;;;
+ 11282;MULTANI LETTER U;Lo;0;L;;;;;N;;;;;
+ 11283;MULTANI LETTER E;Lo;0;L;;;;;N;;;;;
+ 11284;MULTANI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11285;MULTANI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11286;MULTANI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11288;MULTANI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 1128A;MULTANI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1128B;MULTANI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 1128C;MULTANI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1128D;MULTANI LETTER JJA;Lo;0;L;;;;;N;;;;;
+ 1128F;MULTANI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11290;MULTANI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 11291;MULTANI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 11292;MULTANI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 11293;MULTANI LETTER DDDA;Lo;0;L;;;;;N;;;;;
+ 11294;MULTANI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 11295;MULTANI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 11296;MULTANI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11297;MULTANI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 11298;MULTANI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11299;MULTANI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 1129A;MULTANI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1129B;MULTANI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 1129C;MULTANI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 1129D;MULTANI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1129F;MULTANI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 112A0;MULTANI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 112A1;MULTANI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 112A2;MULTANI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 112A3;MULTANI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 112A4;MULTANI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 112A5;MULTANI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 112A6;MULTANI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 112A7;MULTANI LETTER RRA;Lo;0;L;;;;;N;;;;;
+ 112A8;MULTANI LETTER RHA;Lo;0;L;;;;;N;;;;;
+ 112A9;MULTANI SECTION MARK;Po;0;L;;;;;N;;;;;
+ 112B0;KHUDAWADI LETTER A;Lo;0;L;;;;;N;;;;;
+ 112B1;KHUDAWADI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 112B2;KHUDAWADI LETTER I;Lo;0;L;;;;;N;;;;;
+ 112B3;KHUDAWADI LETTER II;Lo;0;L;;;;;N;;;;;
+ 112B4;KHUDAWADI LETTER U;Lo;0;L;;;;;N;;;;;
+ 112B5;KHUDAWADI LETTER UU;Lo;0;L;;;;;N;;;;;
+ 112B6;KHUDAWADI LETTER E;Lo;0;L;;;;;N;;;;;
+ 112B7;KHUDAWADI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 112B8;KHUDAWADI LETTER O;Lo;0;L;;;;;N;;;;;
+ 112B9;KHUDAWADI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 112BA;KHUDAWADI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 112BB;KHUDAWADI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 112BC;KHUDAWADI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 112BD;KHUDAWADI LETTER GGA;Lo;0;L;;;;;N;;;;;
+ 112BE;KHUDAWADI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 112BF;KHUDAWADI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 112C0;KHUDAWADI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 112C1;KHUDAWADI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 112C2;KHUDAWADI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 112C3;KHUDAWADI LETTER JJA;Lo;0;L;;;;;N;;;;;
+ 112C4;KHUDAWADI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 112C5;KHUDAWADI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 112C6;KHUDAWADI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 112C7;KHUDAWADI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 112C8;KHUDAWADI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 112C9;KHUDAWADI LETTER DDDA;Lo;0;L;;;;;N;;;;;
+ 112CA;KHUDAWADI LETTER RRA;Lo;0;L;;;;;N;;;;;
+ 112CB;KHUDAWADI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 112CC;KHUDAWADI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 112CD;KHUDAWADI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 112CE;KHUDAWADI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 112CF;KHUDAWADI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 112D0;KHUDAWADI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 112D1;KHUDAWADI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 112D2;KHUDAWADI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 112D3;KHUDAWADI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 112D4;KHUDAWADI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 112D5;KHUDAWADI LETTER BBA;Lo;0;L;;;;;N;;;;;
+ 112D6;KHUDAWADI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 112D7;KHUDAWADI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 112D8;KHUDAWADI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 112D9;KHUDAWADI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 112DA;KHUDAWADI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 112DB;KHUDAWADI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 112DC;KHUDAWADI LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 112DD;KHUDAWADI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 112DE;KHUDAWADI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 112DF;KHUDAWADI SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 112E0;KHUDAWADI VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 112E1;KHUDAWADI VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 112E2;KHUDAWADI VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 112E3;KHUDAWADI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 112E4;KHUDAWADI VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 112E5;KHUDAWADI VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 112E6;KHUDAWADI VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 112E7;KHUDAWADI VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 112E8;KHUDAWADI VOWEL SIGN AU;Mn;0;NSM;;;;;N;;;;;
+ 112E9;KHUDAWADI SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 112EA;KHUDAWADI SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 112F0;KHUDAWADI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 112F1;KHUDAWADI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 112F2;KHUDAWADI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 112F3;KHUDAWADI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 112F4;KHUDAWADI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 112F5;KHUDAWADI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 112F6;KHUDAWADI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 112F7;KHUDAWADI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 112F8;KHUDAWADI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 112F9;KHUDAWADI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 11300;GRANTHA SIGN COMBINING ANUSVARA ABOVE;Mn;0;NSM;;;;;N;;;;;
+ 11301;GRANTHA SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 11302;GRANTHA SIGN ANUSVARA;Mc;0;L;;;;;N;;;;;
+ 11303;GRANTHA SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 11305;GRANTHA LETTER A;Lo;0;L;;;;;N;;;;;
+ 11306;GRANTHA LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11307;GRANTHA LETTER I;Lo;0;L;;;;;N;;;;;
+ 11308;GRANTHA LETTER II;Lo;0;L;;;;;N;;;;;
+ 11309;GRANTHA LETTER U;Lo;0;L;;;;;N;;;;;
+ 1130A;GRANTHA LETTER UU;Lo;0;L;;;;;N;;;;;
+ 1130B;GRANTHA LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 1130C;GRANTHA LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 1130F;GRANTHA LETTER EE;Lo;0;L;;;;;N;;;;;
+ 11310;GRANTHA LETTER AI;Lo;0;L;;;;;N;;;;;
+ 11313;GRANTHA LETTER OO;Lo;0;L;;;;;N;;;;;
+ 11314;GRANTHA LETTER AU;Lo;0;L;;;;;N;;;;;
+ 11315;GRANTHA LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11316;GRANTHA LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11317;GRANTHA LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11318;GRANTHA LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11319;GRANTHA LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1131A;GRANTHA LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1131B;GRANTHA LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 1131C;GRANTHA LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1131D;GRANTHA LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 1131E;GRANTHA LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 1131F;GRANTHA LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 11320;GRANTHA LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 11321;GRANTHA LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 11322;GRANTHA LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 11323;GRANTHA LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 11324;GRANTHA LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11325;GRANTHA LETTER THA;Lo;0;L;;;;;N;;;;;
+ 11326;GRANTHA LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11327;GRANTHA LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 11328;GRANTHA LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1132A;GRANTHA LETTER PA;Lo;0;L;;;;;N;;;;;
+ 1132B;GRANTHA LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 1132C;GRANTHA LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1132D;GRANTHA LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 1132E;GRANTHA LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1132F;GRANTHA LETTER YA;Lo;0;L;;;;;N;;;;;
+ 11330;GRANTHA LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11332;GRANTHA LETTER LA;Lo;0;L;;;;;N;;;;;
+ 11333;GRANTHA LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 11335;GRANTHA LETTER VA;Lo;0;L;;;;;N;;;;;
+ 11336;GRANTHA LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 11337;GRANTHA LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 11338;GRANTHA LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11339;GRANTHA LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1133B;COMBINING BINDU BELOW;Mn;7;NSM;;;;;N;;;;;
+ 1133C;GRANTHA SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 1133D;GRANTHA SIGN AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 1133E;GRANTHA VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 1133F;GRANTHA VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 11340;GRANTHA VOWEL SIGN II;Mn;0;NSM;;;;;N;;;;;
+ 11341;GRANTHA VOWEL SIGN U;Mc;0;L;;;;;N;;;;;
+ 11342;GRANTHA VOWEL SIGN UU;Mc;0;L;;;;;N;;;;;
+ 11343;GRANTHA VOWEL SIGN VOCALIC R;Mc;0;L;;;;;N;;;;;
+ 11344;GRANTHA VOWEL SIGN VOCALIC RR;Mc;0;L;;;;;N;;;;;
+ 11347;GRANTHA VOWEL SIGN EE;Mc;0;L;;;;;N;;;;;
+ 11348;GRANTHA VOWEL SIGN AI;Mc;0;L;;;;;N;;;;;
+ 1134B;GRANTHA VOWEL SIGN OO;Mc;0;L;11347 1133E;;;;N;;;;;
+ 1134C;GRANTHA VOWEL SIGN AU;Mc;0;L;11347 11357;;;;N;;;;;
+ 1134D;GRANTHA SIGN VIRAMA;Mc;9;L;;;;;N;;;;;
+ 11350;GRANTHA OM;Lo;0;L;;;;;N;;;;;
+ 11357;GRANTHA AU LENGTH MARK;Mc;0;L;;;;;N;;;;;
+ 1135D;GRANTHA SIGN PLUTA;Lo;0;L;;;;;N;;;;;
+ 1135E;GRANTHA LETTER VEDIC ANUSVARA;Lo;0;L;;;;;N;;;;;
+ 1135F;GRANTHA LETTER VEDIC DOUBLE ANUSVARA;Lo;0;L;;;;;N;;;;;
+ 11360;GRANTHA LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 11361;GRANTHA LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 11362;GRANTHA VOWEL SIGN VOCALIC L;Mc;0;L;;;;;N;;;;;
+ 11363;GRANTHA VOWEL SIGN VOCALIC LL;Mc;0;L;;;;;N;;;;;
+ 11366;COMBINING GRANTHA DIGIT ZERO;Mn;230;NSM;;;;;N;;;;;
+ 11367;COMBINING GRANTHA DIGIT ONE;Mn;230;NSM;;;;;N;;;;;
+ 11368;COMBINING GRANTHA DIGIT TWO;Mn;230;NSM;;;;;N;;;;;
+ 11369;COMBINING GRANTHA DIGIT THREE;Mn;230;NSM;;;;;N;;;;;
+ 1136A;COMBINING GRANTHA DIGIT FOUR;Mn;230;NSM;;;;;N;;;;;
+ 1136B;COMBINING GRANTHA DIGIT FIVE;Mn;230;NSM;;;;;N;;;;;
+ 1136C;COMBINING GRANTHA DIGIT SIX;Mn;230;NSM;;;;;N;;;;;
+ 11370;COMBINING GRANTHA LETTER A;Mn;230;NSM;;;;;N;;;;;
+ 11371;COMBINING GRANTHA LETTER KA;Mn;230;NSM;;;;;N;;;;;
+ 11372;COMBINING GRANTHA LETTER NA;Mn;230;NSM;;;;;N;;;;;
+ 11373;COMBINING GRANTHA LETTER VI;Mn;230;NSM;;;;;N;;;;;
+ 11374;COMBINING GRANTHA LETTER PA;Mn;230;NSM;;;;;N;;;;;
+ 11400;NEWA LETTER A;Lo;0;L;;;;;N;;;;;
+ 11401;NEWA LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11402;NEWA LETTER I;Lo;0;L;;;;;N;;;;;
+ 11403;NEWA LETTER II;Lo;0;L;;;;;N;;;;;
+ 11404;NEWA LETTER U;Lo;0;L;;;;;N;;;;;
+ 11405;NEWA LETTER UU;Lo;0;L;;;;;N;;;;;
+ 11406;NEWA LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 11407;NEWA LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 11408;NEWA LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 11409;NEWA LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 1140A;NEWA LETTER E;Lo;0;L;;;;;N;;;;;
+ 1140B;NEWA LETTER AI;Lo;0;L;;;;;N;;;;;
+ 1140C;NEWA LETTER O;Lo;0;L;;;;;N;;;;;
+ 1140D;NEWA LETTER AU;Lo;0;L;;;;;N;;;;;
+ 1140E;NEWA LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1140F;NEWA LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11410;NEWA LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11411;NEWA LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11412;NEWA LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11413;NEWA LETTER NGHA;Lo;0;L;;;;;N;;;;;
+ 11414;NEWA LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11415;NEWA LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11416;NEWA LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11417;NEWA LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 11418;NEWA LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11419;NEWA LETTER NYHA;Lo;0;L;;;;;N;;;;;
+ 1141A;NEWA LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 1141B;NEWA LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 1141C;NEWA LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 1141D;NEWA LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 1141E;NEWA LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 1141F;NEWA LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11420;NEWA LETTER THA;Lo;0;L;;;;;N;;;;;
+ 11421;NEWA LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11422;NEWA LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 11423;NEWA LETTER NA;Lo;0;L;;;;;N;;;;;
+ 11424;NEWA LETTER NHA;Lo;0;L;;;;;N;;;;;
+ 11425;NEWA LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11426;NEWA LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 11427;NEWA LETTER BA;Lo;0;L;;;;;N;;;;;
+ 11428;NEWA LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 11429;NEWA LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1142A;NEWA LETTER MHA;Lo;0;L;;;;;N;;;;;
+ 1142B;NEWA LETTER YA;Lo;0;L;;;;;N;;;;;
+ 1142C;NEWA LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1142D;NEWA LETTER RHA;Lo;0;L;;;;;N;;;;;
+ 1142E;NEWA LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1142F;NEWA LETTER LHA;Lo;0;L;;;;;N;;;;;
+ 11430;NEWA LETTER WA;Lo;0;L;;;;;N;;;;;
+ 11431;NEWA LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 11432;NEWA LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 11433;NEWA LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11434;NEWA LETTER HA;Lo;0;L;;;;;N;;;;;
+ 11435;NEWA VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 11436;NEWA VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 11437;NEWA VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 11438;NEWA VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 11439;NEWA VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 1143A;NEWA VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 1143B;NEWA VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 1143C;NEWA VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 1143D;NEWA VOWEL SIGN VOCALIC LL;Mn;0;NSM;;;;;N;;;;;
+ 1143E;NEWA VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 1143F;NEWA VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 11440;NEWA VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ 11441;NEWA VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ 11442;NEWA SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 11443;NEWA SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 11444;NEWA SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 11445;NEWA SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 11446;NEWA SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 11447;NEWA SIGN AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 11448;NEWA SIGN FINAL ANUSVARA;Lo;0;L;;;;;N;;;;;
+ 11449;NEWA OM;Lo;0;L;;;;;N;;;;;
+ 1144A;NEWA SIDDHI;Lo;0;L;;;;;N;;;;;
+ 1144B;NEWA DANDA;Po;0;L;;;;;N;;;;;
+ 1144C;NEWA DOUBLE DANDA;Po;0;L;;;;;N;;;;;
+ 1144D;NEWA COMMA;Po;0;L;;;;;N;;;;;
+ 1144E;NEWA GAP FILLER;Po;0;L;;;;;N;;;;;
+ 1144F;NEWA ABBREVIATION SIGN;Po;0;L;;;;;N;;;;;
+ 11450;NEWA DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 11451;NEWA DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 11452;NEWA DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 11453;NEWA DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 11454;NEWA DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 11455;NEWA DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 11456;NEWA DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 11457;NEWA DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 11458;NEWA DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 11459;NEWA DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 1145B;NEWA PLACEHOLDER MARK;Po;0;L;;;;;N;;;;;
+ 1145D;NEWA INSERTION SIGN;Po;0;L;;;;;N;;;;;
+ 1145E;NEWA SANDHI MARK;Mn;230;NSM;;;;;N;;;;;
+ 1145F;NEWA LETTER VEDIC ANUSVARA;Lo;0;L;;;;;N;;;;;
+ 11480;TIRHUTA ANJI;Lo;0;L;;;;;N;;;;;
+ 11481;TIRHUTA LETTER A;Lo;0;L;;;;;N;;;;;
+ 11482;TIRHUTA LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11483;TIRHUTA LETTER I;Lo;0;L;;;;;N;;;;;
+ 11484;TIRHUTA LETTER II;Lo;0;L;;;;;N;;;;;
+ 11485;TIRHUTA LETTER U;Lo;0;L;;;;;N;;;;;
+ 11486;TIRHUTA LETTER UU;Lo;0;L;;;;;N;;;;;
+ 11487;TIRHUTA LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 11488;TIRHUTA LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 11489;TIRHUTA LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 1148A;TIRHUTA LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 1148B;TIRHUTA LETTER E;Lo;0;L;;;;;N;;;;;
+ 1148C;TIRHUTA LETTER AI;Lo;0;L;;;;;N;;;;;
+ 1148D;TIRHUTA LETTER O;Lo;0;L;;;;;N;;;;;
+ 1148E;TIRHUTA LETTER AU;Lo;0;L;;;;;N;;;;;
+ 1148F;TIRHUTA LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11490;TIRHUTA LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11491;TIRHUTA LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11492;TIRHUTA LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11493;TIRHUTA LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11494;TIRHUTA LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11495;TIRHUTA LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11496;TIRHUTA LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11497;TIRHUTA LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 11498;TIRHUTA LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11499;TIRHUTA LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 1149A;TIRHUTA LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 1149B;TIRHUTA LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 1149C;TIRHUTA LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 1149D;TIRHUTA LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 1149E;TIRHUTA LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1149F;TIRHUTA LETTER THA;Lo;0;L;;;;;N;;;;;
+ 114A0;TIRHUTA LETTER DA;Lo;0;L;;;;;N;;;;;
+ 114A1;TIRHUTA LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 114A2;TIRHUTA LETTER NA;Lo;0;L;;;;;N;;;;;
+ 114A3;TIRHUTA LETTER PA;Lo;0;L;;;;;N;;;;;
+ 114A4;TIRHUTA LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 114A5;TIRHUTA LETTER BA;Lo;0;L;;;;;N;;;;;
+ 114A6;TIRHUTA LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 114A7;TIRHUTA LETTER MA;Lo;0;L;;;;;N;;;;;
+ 114A8;TIRHUTA LETTER YA;Lo;0;L;;;;;N;;;;;
+ 114A9;TIRHUTA LETTER RA;Lo;0;L;;;;;N;;;;;
+ 114AA;TIRHUTA LETTER LA;Lo;0;L;;;;;N;;;;;
+ 114AB;TIRHUTA LETTER VA;Lo;0;L;;;;;N;;;;;
+ 114AC;TIRHUTA LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 114AD;TIRHUTA LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 114AE;TIRHUTA LETTER SA;Lo;0;L;;;;;N;;;;;
+ 114AF;TIRHUTA LETTER HA;Lo;0;L;;;;;N;;;;;
+ 114B0;TIRHUTA VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 114B1;TIRHUTA VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 114B2;TIRHUTA VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 114B3;TIRHUTA VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 114B4;TIRHUTA VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 114B5;TIRHUTA VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 114B6;TIRHUTA VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 114B7;TIRHUTA VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 114B8;TIRHUTA VOWEL SIGN VOCALIC LL;Mn;0;NSM;;;;;N;;;;;
+ 114B9;TIRHUTA VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 114BA;TIRHUTA VOWEL SIGN SHORT E;Mn;0;NSM;;;;;N;;;;;
+ 114BB;TIRHUTA VOWEL SIGN AI;Mc;0;L;114B9 114BA;;;;N;;;;;
+ 114BC;TIRHUTA VOWEL SIGN O;Mc;0;L;114B9 114B0;;;;N;;;;;
+ 114BD;TIRHUTA VOWEL SIGN SHORT O;Mc;0;L;;;;;N;;;;;
+ 114BE;TIRHUTA VOWEL SIGN AU;Mc;0;L;114B9 114BD;;;;N;;;;;
+ 114BF;TIRHUTA SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 114C0;TIRHUTA SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 114C1;TIRHUTA SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 114C2;TIRHUTA SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 114C3;TIRHUTA SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 114C4;TIRHUTA SIGN AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 114C5;TIRHUTA GVANG;Lo;0;L;;;;;N;;;;;
+ 114C6;TIRHUTA ABBREVIATION SIGN;Po;0;L;;;;;N;;;;;
+ 114C7;TIRHUTA OM;Lo;0;L;;;;;N;;;;;
+ 114D0;TIRHUTA DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 114D1;TIRHUTA DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 114D2;TIRHUTA DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 114D3;TIRHUTA DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 114D4;TIRHUTA DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 114D5;TIRHUTA DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 114D6;TIRHUTA DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 114D7;TIRHUTA DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 114D8;TIRHUTA DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 114D9;TIRHUTA DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 11580;SIDDHAM LETTER A;Lo;0;L;;;;;N;;;;;
+ 11581;SIDDHAM LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11582;SIDDHAM LETTER I;Lo;0;L;;;;;N;;;;;
+ 11583;SIDDHAM LETTER II;Lo;0;L;;;;;N;;;;;
+ 11584;SIDDHAM LETTER U;Lo;0;L;;;;;N;;;;;
+ 11585;SIDDHAM LETTER UU;Lo;0;L;;;;;N;;;;;
+ 11586;SIDDHAM LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 11587;SIDDHAM LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 11588;SIDDHAM LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 11589;SIDDHAM LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 1158A;SIDDHAM LETTER E;Lo;0;L;;;;;N;;;;;
+ 1158B;SIDDHAM LETTER AI;Lo;0;L;;;;;N;;;;;
+ 1158C;SIDDHAM LETTER O;Lo;0;L;;;;;N;;;;;
+ 1158D;SIDDHAM LETTER AU;Lo;0;L;;;;;N;;;;;
+ 1158E;SIDDHAM LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1158F;SIDDHAM LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11590;SIDDHAM LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11591;SIDDHAM LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11592;SIDDHAM LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11593;SIDDHAM LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11594;SIDDHAM LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11595;SIDDHAM LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11596;SIDDHAM LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 11597;SIDDHAM LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11598;SIDDHAM LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 11599;SIDDHAM LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 1159A;SIDDHAM LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 1159B;SIDDHAM LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 1159C;SIDDHAM LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 1159D;SIDDHAM LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1159E;SIDDHAM LETTER THA;Lo;0;L;;;;;N;;;;;
+ 1159F;SIDDHAM LETTER DA;Lo;0;L;;;;;N;;;;;
+ 115A0;SIDDHAM LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 115A1;SIDDHAM LETTER NA;Lo;0;L;;;;;N;;;;;
+ 115A2;SIDDHAM LETTER PA;Lo;0;L;;;;;N;;;;;
+ 115A3;SIDDHAM LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 115A4;SIDDHAM LETTER BA;Lo;0;L;;;;;N;;;;;
+ 115A5;SIDDHAM LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 115A6;SIDDHAM LETTER MA;Lo;0;L;;;;;N;;;;;
+ 115A7;SIDDHAM LETTER YA;Lo;0;L;;;;;N;;;;;
+ 115A8;SIDDHAM LETTER RA;Lo;0;L;;;;;N;;;;;
+ 115A9;SIDDHAM LETTER LA;Lo;0;L;;;;;N;;;;;
+ 115AA;SIDDHAM LETTER VA;Lo;0;L;;;;;N;;;;;
+ 115AB;SIDDHAM LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 115AC;SIDDHAM LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 115AD;SIDDHAM LETTER SA;Lo;0;L;;;;;N;;;;;
+ 115AE;SIDDHAM LETTER HA;Lo;0;L;;;;;N;;;;;
+ 115AF;SIDDHAM VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 115B0;SIDDHAM VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 115B1;SIDDHAM VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 115B2;SIDDHAM VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 115B3;SIDDHAM VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 115B4;SIDDHAM VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 115B5;SIDDHAM VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 115B8;SIDDHAM VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 115B9;SIDDHAM VOWEL SIGN AI;Mc;0;L;;;;;N;;;;;
+ 115BA;SIDDHAM VOWEL SIGN O;Mc;0;L;115B8 115AF;;;;N;;;;;
+ 115BB;SIDDHAM VOWEL SIGN AU;Mc;0;L;115B9 115AF;;;;N;;;;;
+ 115BC;SIDDHAM SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 115BD;SIDDHAM SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 115BE;SIDDHAM SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 115BF;SIDDHAM SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 115C0;SIDDHAM SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 115C1;SIDDHAM SIGN SIDDHAM;Po;0;L;;;;;N;;;;;
+ 115C2;SIDDHAM DANDA;Po;0;L;;;;;N;;;;;
+ 115C3;SIDDHAM DOUBLE DANDA;Po;0;L;;;;;N;;;;;
+ 115C4;SIDDHAM SEPARATOR DOT;Po;0;L;;;;;N;;;;;
+ 115C5;SIDDHAM SEPARATOR BAR;Po;0;L;;;;;N;;;;;
+ 115C6;SIDDHAM REPETITION MARK-1;Po;0;L;;;;;N;;;;;
+ 115C7;SIDDHAM REPETITION MARK-2;Po;0;L;;;;;N;;;;;
+ 115C8;SIDDHAM REPETITION MARK-3;Po;0;L;;;;;N;;;;;
+ 115C9;SIDDHAM END OF TEXT MARK;Po;0;L;;;;;N;;;;;
+ 115CA;SIDDHAM SECTION MARK WITH TRIDENT AND U-SHAPED ORNAMENTS;Po;0;L;;;;;N;;;;;
+ 115CB;SIDDHAM SECTION MARK WITH TRIDENT AND DOTTED CRESCENTS;Po;0;L;;;;;N;;;;;
+ 115CC;SIDDHAM SECTION MARK WITH RAYS AND DOTTED CRESCENTS;Po;0;L;;;;;N;;;;;
+ 115CD;SIDDHAM SECTION MARK WITH RAYS AND DOTTED DOUBLE CRESCENTS;Po;0;L;;;;;N;;;;;
+ 115CE;SIDDHAM SECTION MARK WITH RAYS AND DOTTED TRIPLE CRESCENTS;Po;0;L;;;;;N;;;;;
+ 115CF;SIDDHAM SECTION MARK DOUBLE RING;Po;0;L;;;;;N;;;;;
+ 115D0;SIDDHAM SECTION MARK DOUBLE RING WITH RAYS;Po;0;L;;;;;N;;;;;
+ 115D1;SIDDHAM SECTION MARK WITH DOUBLE CRESCENTS;Po;0;L;;;;;N;;;;;
+ 115D2;SIDDHAM SECTION MARK WITH TRIPLE CRESCENTS;Po;0;L;;;;;N;;;;;
+ 115D3;SIDDHAM SECTION MARK WITH QUADRUPLE CRESCENTS;Po;0;L;;;;;N;;;;;
+ 115D4;SIDDHAM SECTION MARK WITH SEPTUPLE CRESCENTS;Po;0;L;;;;;N;;;;;
+ 115D5;SIDDHAM SECTION MARK WITH CIRCLES AND RAYS;Po;0;L;;;;;N;;;;;
+ 115D6;SIDDHAM SECTION MARK WITH CIRCLES AND TWO ENCLOSURES;Po;0;L;;;;;N;;;;;
+ 115D7;SIDDHAM SECTION MARK WITH CIRCLES AND FOUR ENCLOSURES;Po;0;L;;;;;N;;;;;
+ 115D8;SIDDHAM LETTER THREE-CIRCLE ALTERNATE I;Lo;0;L;;;;;N;;;;;
+ 115D9;SIDDHAM LETTER TWO-CIRCLE ALTERNATE I;Lo;0;L;;;;;N;;;;;
+ 115DA;SIDDHAM LETTER TWO-CIRCLE ALTERNATE II;Lo;0;L;;;;;N;;;;;
+ 115DB;SIDDHAM LETTER ALTERNATE U;Lo;0;L;;;;;N;;;;;
+ 115DC;SIDDHAM VOWEL SIGN ALTERNATE U;Mn;0;NSM;;;;;N;;;;;
+ 115DD;SIDDHAM VOWEL SIGN ALTERNATE UU;Mn;0;NSM;;;;;N;;;;;
+ 11600;MODI LETTER A;Lo;0;L;;;;;N;;;;;
+ 11601;MODI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11602;MODI LETTER I;Lo;0;L;;;;;N;;;;;
+ 11603;MODI LETTER II;Lo;0;L;;;;;N;;;;;
+ 11604;MODI LETTER U;Lo;0;L;;;;;N;;;;;
+ 11605;MODI LETTER UU;Lo;0;L;;;;;N;;;;;
+ 11606;MODI LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 11607;MODI LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 11608;MODI LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 11609;MODI LETTER VOCALIC LL;Lo;0;L;;;;;N;;;;;
+ 1160A;MODI LETTER E;Lo;0;L;;;;;N;;;;;
+ 1160B;MODI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 1160C;MODI LETTER O;Lo;0;L;;;;;N;;;;;
+ 1160D;MODI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 1160E;MODI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1160F;MODI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11610;MODI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11611;MODI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11612;MODI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11613;MODI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11614;MODI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11615;MODI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11616;MODI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 11617;MODI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11618;MODI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 11619;MODI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 1161A;MODI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 1161B;MODI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 1161C;MODI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 1161D;MODI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1161E;MODI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 1161F;MODI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11620;MODI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 11621;MODI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 11622;MODI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11623;MODI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 11624;MODI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 11625;MODI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 11626;MODI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 11627;MODI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 11628;MODI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11629;MODI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1162A;MODI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 1162B;MODI LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 1162C;MODI LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 1162D;MODI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1162E;MODI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1162F;MODI LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 11630;MODI VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 11631;MODI VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 11632;MODI VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 11633;MODI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 11634;MODI VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 11635;MODI VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 11636;MODI VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 11637;MODI VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 11638;MODI VOWEL SIGN VOCALIC LL;Mn;0;NSM;;;;;N;;;;;
+ 11639;MODI VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 1163A;MODI VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 1163B;MODI VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ 1163C;MODI VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ 1163D;MODI SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 1163E;MODI SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 1163F;MODI SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 11640;MODI SIGN ARDHACANDRA;Mn;0;NSM;;;;;N;;;;;
+ 11641;MODI DANDA;Po;0;L;;;;;N;;;;;
+ 11642;MODI DOUBLE DANDA;Po;0;L;;;;;N;;;;;
+ 11643;MODI ABBREVIATION SIGN;Po;0;L;;;;;N;;;;;
+ 11644;MODI SIGN HUVA;Lo;0;L;;;;;N;;;;;
+ 11650;MODI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 11651;MODI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 11652;MODI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 11653;MODI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 11654;MODI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 11655;MODI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 11656;MODI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 11657;MODI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 11658;MODI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 11659;MODI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 11660;MONGOLIAN BIRGA WITH ORNAMENT;Po;0;ON;;;;;N;;;;;
+ 11661;MONGOLIAN ROTATED BIRGA;Po;0;ON;;;;;N;;;;;
+ 11662;MONGOLIAN DOUBLE BIRGA WITH ORNAMENT;Po;0;ON;;;;;N;;;;;
+ 11663;MONGOLIAN TRIPLE BIRGA WITH ORNAMENT;Po;0;ON;;;;;N;;;;;
+ 11664;MONGOLIAN BIRGA WITH DOUBLE ORNAMENT;Po;0;ON;;;;;N;;;;;
+ 11665;MONGOLIAN ROTATED BIRGA WITH ORNAMENT;Po;0;ON;;;;;N;;;;;
+ 11666;MONGOLIAN ROTATED BIRGA WITH DOUBLE ORNAMENT;Po;0;ON;;;;;N;;;;;
+ 11667;MONGOLIAN INVERTED BIRGA;Po;0;ON;;;;;N;;;;;
+ 11668;MONGOLIAN INVERTED BIRGA WITH DOUBLE ORNAMENT;Po;0;ON;;;;;N;;;;;
+ 11669;MONGOLIAN SWIRL BIRGA;Po;0;ON;;;;;N;;;;;
+ 1166A;MONGOLIAN SWIRL BIRGA WITH ORNAMENT;Po;0;ON;;;;;N;;;;;
+ 1166B;MONGOLIAN SWIRL BIRGA WITH DOUBLE ORNAMENT;Po;0;ON;;;;;N;;;;;
+ 1166C;MONGOLIAN TURNED SWIRL BIRGA WITH DOUBLE ORNAMENT;Po;0;ON;;;;;N;;;;;
+ 11680;TAKRI LETTER A;Lo;0;L;;;;;N;;;;;
+ 11681;TAKRI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11682;TAKRI LETTER I;Lo;0;L;;;;;N;;;;;
+ 11683;TAKRI LETTER II;Lo;0;L;;;;;N;;;;;
+ 11684;TAKRI LETTER U;Lo;0;L;;;;;N;;;;;
+ 11685;TAKRI LETTER UU;Lo;0;L;;;;;N;;;;;
+ 11686;TAKRI LETTER E;Lo;0;L;;;;;N;;;;;
+ 11687;TAKRI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 11688;TAKRI LETTER O;Lo;0;L;;;;;N;;;;;
+ 11689;TAKRI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 1168A;TAKRI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1168B;TAKRI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 1168C;TAKRI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1168D;TAKRI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 1168E;TAKRI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1168F;TAKRI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11690;TAKRI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11691;TAKRI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11692;TAKRI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 11693;TAKRI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11694;TAKRI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 11695;TAKRI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 11696;TAKRI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 11697;TAKRI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 11698;TAKRI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 11699;TAKRI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1169A;TAKRI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 1169B;TAKRI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1169C;TAKRI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 1169D;TAKRI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1169E;TAKRI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 1169F;TAKRI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 116A0;TAKRI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 116A1;TAKRI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 116A2;TAKRI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 116A3;TAKRI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 116A4;TAKRI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 116A5;TAKRI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 116A6;TAKRI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 116A7;TAKRI LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 116A8;TAKRI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 116A9;TAKRI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 116AA;TAKRI LETTER RRA;Lo;0;L;;;;;N;;;;;
+ 116AB;TAKRI SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 116AC;TAKRI SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 116AD;TAKRI VOWEL SIGN AA;Mn;0;NSM;;;;;N;;;;;
+ 116AE;TAKRI VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 116AF;TAKRI VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 116B0;TAKRI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 116B1;TAKRI VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 116B2;TAKRI VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 116B3;TAKRI VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 116B4;TAKRI VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 116B5;TAKRI VOWEL SIGN AU;Mn;0;NSM;;;;;N;;;;;
+ 116B6;TAKRI SIGN VIRAMA;Mc;9;L;;;;;N;;;;;
+ 116B7;TAKRI SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 116B8;TAKRI LETTER ARCHAIC KHA;Lo;0;L;;;;;N;;;;;
+ 116C0;TAKRI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 116C1;TAKRI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 116C2;TAKRI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 116C3;TAKRI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 116C4;TAKRI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 116C5;TAKRI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 116C6;TAKRI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 116C7;TAKRI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 116C8;TAKRI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 116C9;TAKRI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 11700;AHOM LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11701;AHOM LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11702;AHOM LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11703;AHOM LETTER NA;Lo;0;L;;;;;N;;;;;
+ 11704;AHOM LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11705;AHOM LETTER ALTERNATE TA;Lo;0;L;;;;;N;;;;;
+ 11706;AHOM LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11707;AHOM LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 11708;AHOM LETTER BA;Lo;0;L;;;;;N;;;;;
+ 11709;AHOM LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1170A;AHOM LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1170B;AHOM LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 1170C;AHOM LETTER THA;Lo;0;L;;;;;N;;;;;
+ 1170D;AHOM LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1170E;AHOM LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1170F;AHOM LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11710;AHOM LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11711;AHOM LETTER HA;Lo;0;L;;;;;N;;;;;
+ 11712;AHOM LETTER A;Lo;0;L;;;;;N;;;;;
+ 11713;AHOM LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11714;AHOM LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 11715;AHOM LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11716;AHOM LETTER ALTERNATE GA;Lo;0;L;;;;;N;;;;;
+ 11717;AHOM LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11718;AHOM LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 11719;AHOM LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 1171A;AHOM LETTER ALTERNATE BA;Lo;0;L;;;;;N;;;;;
+ 1171D;AHOM CONSONANT SIGN MEDIAL LA;Mn;0;NSM;;;;;N;;;;;
+ 1171E;AHOM CONSONANT SIGN MEDIAL RA;Mn;0;NSM;;;;;N;;;;;
+ 1171F;AHOM CONSONANT SIGN MEDIAL LIGATING RA;Mn;0;NSM;;;;;N;;;;;
+ 11720;AHOM VOWEL SIGN A;Mc;0;L;;;;;N;;;;;
+ 11721;AHOM VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 11722;AHOM VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 11723;AHOM VOWEL SIGN II;Mn;0;NSM;;;;;N;;;;;
+ 11724;AHOM VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 11725;AHOM VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 11726;AHOM VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 11727;AHOM VOWEL SIGN AW;Mn;0;NSM;;;;;N;;;;;
+ 11728;AHOM VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 11729;AHOM VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 1172A;AHOM VOWEL SIGN AM;Mn;0;NSM;;;;;N;;;;;
+ 1172B;AHOM SIGN KILLER;Mn;9;NSM;;;;;N;;;;;
+ 11730;AHOM DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 11731;AHOM DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 11732;AHOM DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 11733;AHOM DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 11734;AHOM DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 11735;AHOM DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 11736;AHOM DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 11737;AHOM DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 11738;AHOM DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 11739;AHOM DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 1173A;AHOM NUMBER TEN;No;0;L;;;;10;N;;;;;
+ 1173B;AHOM NUMBER TWENTY;No;0;L;;;;20;N;;;;;
+ 1173C;AHOM SIGN SMALL SECTION;Po;0;L;;;;;N;;;;;
+ 1173D;AHOM SIGN SECTION;Po;0;L;;;;;N;;;;;
+ 1173E;AHOM SIGN RULAI;Po;0;L;;;;;N;;;;;
+ 1173F;AHOM SYMBOL VI;So;0;L;;;;;N;;;;;
+ 11800;DOGRA LETTER A;Lo;0;L;;;;;N;;;;;
+ 11801;DOGRA LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11802;DOGRA LETTER I;Lo;0;L;;;;;N;;;;;
+ 11803;DOGRA LETTER II;Lo;0;L;;;;;N;;;;;
+ 11804;DOGRA LETTER U;Lo;0;L;;;;;N;;;;;
+ 11805;DOGRA LETTER UU;Lo;0;L;;;;;N;;;;;
+ 11806;DOGRA LETTER E;Lo;0;L;;;;;N;;;;;
+ 11807;DOGRA LETTER AI;Lo;0;L;;;;;N;;;;;
+ 11808;DOGRA LETTER O;Lo;0;L;;;;;N;;;;;
+ 11809;DOGRA LETTER AU;Lo;0;L;;;;;N;;;;;
+ 1180A;DOGRA LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1180B;DOGRA LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 1180C;DOGRA LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1180D;DOGRA LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 1180E;DOGRA LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1180F;DOGRA LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11810;DOGRA LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11811;DOGRA LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11812;DOGRA LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 11813;DOGRA LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11814;DOGRA LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 11815;DOGRA LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 11816;DOGRA LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 11817;DOGRA LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 11818;DOGRA LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 11819;DOGRA LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1181A;DOGRA LETTER THA;Lo;0;L;;;;;N;;;;;
+ 1181B;DOGRA LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1181C;DOGRA LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 1181D;DOGRA LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1181E;DOGRA LETTER PA;Lo;0;L;;;;;N;;;;;
+ 1181F;DOGRA LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 11820;DOGRA LETTER BA;Lo;0;L;;;;;N;;;;;
+ 11821;DOGRA LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 11822;DOGRA LETTER MA;Lo;0;L;;;;;N;;;;;
+ 11823;DOGRA LETTER YA;Lo;0;L;;;;;N;;;;;
+ 11824;DOGRA LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11825;DOGRA LETTER LA;Lo;0;L;;;;;N;;;;;
+ 11826;DOGRA LETTER VA;Lo;0;L;;;;;N;;;;;
+ 11827;DOGRA LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 11828;DOGRA LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 11829;DOGRA LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1182A;DOGRA LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1182B;DOGRA LETTER RRA;Lo;0;L;;;;;N;;;;;
+ 1182C;DOGRA VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 1182D;DOGRA VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 1182E;DOGRA VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 1182F;DOGRA VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 11830;DOGRA VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 11831;DOGRA VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 11832;DOGRA VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 11833;DOGRA VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 11834;DOGRA VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 11835;DOGRA VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 11836;DOGRA VOWEL SIGN AU;Mn;0;NSM;;;;;N;;;;;
+ 11837;DOGRA SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 11838;DOGRA SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 11839;DOGRA SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 1183A;DOGRA SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 1183B;DOGRA ABBREVIATION SIGN;Po;0;L;;;;;N;;;;;
+ 118A0;WARANG CITI CAPITAL LETTER NGAA;Lu;0;L;;;;;N;;;;118C0;
+ 118A1;WARANG CITI CAPITAL LETTER A;Lu;0;L;;;;;N;;;;118C1;
+ 118A2;WARANG CITI CAPITAL LETTER WI;Lu;0;L;;;;;N;;;;118C2;
+ 118A3;WARANG CITI CAPITAL LETTER YU;Lu;0;L;;;;;N;;;;118C3;
+ 118A4;WARANG CITI CAPITAL LETTER YA;Lu;0;L;;;;;N;;;;118C4;
+ 118A5;WARANG CITI CAPITAL LETTER YO;Lu;0;L;;;;;N;;;;118C5;
+ 118A6;WARANG CITI CAPITAL LETTER II;Lu;0;L;;;;;N;;;;118C6;
+ 118A7;WARANG CITI CAPITAL LETTER UU;Lu;0;L;;;;;N;;;;118C7;
+ 118A8;WARANG CITI CAPITAL LETTER E;Lu;0;L;;;;;N;;;;118C8;
+ 118A9;WARANG CITI CAPITAL LETTER O;Lu;0;L;;;;;N;;;;118C9;
+ 118AA;WARANG CITI CAPITAL LETTER ANG;Lu;0;L;;;;;N;;;;118CA;
+ 118AB;WARANG CITI CAPITAL LETTER GA;Lu;0;L;;;;;N;;;;118CB;
+ 118AC;WARANG CITI CAPITAL LETTER KO;Lu;0;L;;;;;N;;;;118CC;
+ 118AD;WARANG CITI CAPITAL LETTER ENY;Lu;0;L;;;;;N;;;;118CD;
+ 118AE;WARANG CITI CAPITAL LETTER YUJ;Lu;0;L;;;;;N;;;;118CE;
+ 118AF;WARANG CITI CAPITAL LETTER UC;Lu;0;L;;;;;N;;;;118CF;
+ 118B0;WARANG CITI CAPITAL LETTER ENN;Lu;0;L;;;;;N;;;;118D0;
+ 118B1;WARANG CITI CAPITAL LETTER ODD;Lu;0;L;;;;;N;;;;118D1;
+ 118B2;WARANG CITI CAPITAL LETTER TTE;Lu;0;L;;;;;N;;;;118D2;
+ 118B3;WARANG CITI CAPITAL LETTER NUNG;Lu;0;L;;;;;N;;;;118D3;
+ 118B4;WARANG CITI CAPITAL LETTER DA;Lu;0;L;;;;;N;;;;118D4;
+ 118B5;WARANG CITI CAPITAL LETTER AT;Lu;0;L;;;;;N;;;;118D5;
+ 118B6;WARANG CITI CAPITAL LETTER AM;Lu;0;L;;;;;N;;;;118D6;
+ 118B7;WARANG CITI CAPITAL LETTER BU;Lu;0;L;;;;;N;;;;118D7;
+ 118B8;WARANG CITI CAPITAL LETTER PU;Lu;0;L;;;;;N;;;;118D8;
+ 118B9;WARANG CITI CAPITAL LETTER HIYO;Lu;0;L;;;;;N;;;;118D9;
+ 118BA;WARANG CITI CAPITAL LETTER HOLO;Lu;0;L;;;;;N;;;;118DA;
+ 118BB;WARANG CITI CAPITAL LETTER HORR;Lu;0;L;;;;;N;;;;118DB;
+ 118BC;WARANG CITI CAPITAL LETTER HAR;Lu;0;L;;;;;N;;;;118DC;
+ 118BD;WARANG CITI CAPITAL LETTER SSUU;Lu;0;L;;;;;N;;;;118DD;
+ 118BE;WARANG CITI CAPITAL LETTER SII;Lu;0;L;;;;;N;;;;118DE;
+ 118BF;WARANG CITI CAPITAL LETTER VIYO;Lu;0;L;;;;;N;;;;118DF;
+ 118C0;WARANG CITI SMALL LETTER NGAA;Ll;0;L;;;;;N;;;118A0;;118A0
+ 118C1;WARANG CITI SMALL LETTER A;Ll;0;L;;;;;N;;;118A1;;118A1
+ 118C2;WARANG CITI SMALL LETTER WI;Ll;0;L;;;;;N;;;118A2;;118A2
+ 118C3;WARANG CITI SMALL LETTER YU;Ll;0;L;;;;;N;;;118A3;;118A3
+ 118C4;WARANG CITI SMALL LETTER YA;Ll;0;L;;;;;N;;;118A4;;118A4
+ 118C5;WARANG CITI SMALL LETTER YO;Ll;0;L;;;;;N;;;118A5;;118A5
+ 118C6;WARANG CITI SMALL LETTER II;Ll;0;L;;;;;N;;;118A6;;118A6
+ 118C7;WARANG CITI SMALL LETTER UU;Ll;0;L;;;;;N;;;118A7;;118A7
+ 118C8;WARANG CITI SMALL LETTER E;Ll;0;L;;;;;N;;;118A8;;118A8
+ 118C9;WARANG CITI SMALL LETTER O;Ll;0;L;;;;;N;;;118A9;;118A9
+ 118CA;WARANG CITI SMALL LETTER ANG;Ll;0;L;;;;;N;;;118AA;;118AA
+ 118CB;WARANG CITI SMALL LETTER GA;Ll;0;L;;;;;N;;;118AB;;118AB
+ 118CC;WARANG CITI SMALL LETTER KO;Ll;0;L;;;;;N;;;118AC;;118AC
+ 118CD;WARANG CITI SMALL LETTER ENY;Ll;0;L;;;;;N;;;118AD;;118AD
+ 118CE;WARANG CITI SMALL LETTER YUJ;Ll;0;L;;;;;N;;;118AE;;118AE
+ 118CF;WARANG CITI SMALL LETTER UC;Ll;0;L;;;;;N;;;118AF;;118AF
+ 118D0;WARANG CITI SMALL LETTER ENN;Ll;0;L;;;;;N;;;118B0;;118B0
+ 118D1;WARANG CITI SMALL LETTER ODD;Ll;0;L;;;;;N;;;118B1;;118B1
+ 118D2;WARANG CITI SMALL LETTER TTE;Ll;0;L;;;;;N;;;118B2;;118B2
+ 118D3;WARANG CITI SMALL LETTER NUNG;Ll;0;L;;;;;N;;;118B3;;118B3
+ 118D4;WARANG CITI SMALL LETTER DA;Ll;0;L;;;;;N;;;118B4;;118B4
+ 118D5;WARANG CITI SMALL LETTER AT;Ll;0;L;;;;;N;;;118B5;;118B5
+ 118D6;WARANG CITI SMALL LETTER AM;Ll;0;L;;;;;N;;;118B6;;118B6
+ 118D7;WARANG CITI SMALL LETTER BU;Ll;0;L;;;;;N;;;118B7;;118B7
+ 118D8;WARANG CITI SMALL LETTER PU;Ll;0;L;;;;;N;;;118B8;;118B8
+ 118D9;WARANG CITI SMALL LETTER HIYO;Ll;0;L;;;;;N;;;118B9;;118B9
+ 118DA;WARANG CITI SMALL LETTER HOLO;Ll;0;L;;;;;N;;;118BA;;118BA
+ 118DB;WARANG CITI SMALL LETTER HORR;Ll;0;L;;;;;N;;;118BB;;118BB
+ 118DC;WARANG CITI SMALL LETTER HAR;Ll;0;L;;;;;N;;;118BC;;118BC
+ 118DD;WARANG CITI SMALL LETTER SSUU;Ll;0;L;;;;;N;;;118BD;;118BD
+ 118DE;WARANG CITI SMALL LETTER SII;Ll;0;L;;;;;N;;;118BE;;118BE
+ 118DF;WARANG CITI SMALL LETTER VIYO;Ll;0;L;;;;;N;;;118BF;;118BF
+ 118E0;WARANG CITI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 118E1;WARANG CITI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 118E2;WARANG CITI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 118E3;WARANG CITI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 118E4;WARANG CITI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 118E5;WARANG CITI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 118E6;WARANG CITI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 118E7;WARANG CITI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 118E8;WARANG CITI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 118E9;WARANG CITI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 118EA;WARANG CITI NUMBER TEN;No;0;L;;;;10;N;;;;;
+ 118EB;WARANG CITI NUMBER TWENTY;No;0;L;;;;20;N;;;;;
+ 118EC;WARANG CITI NUMBER THIRTY;No;0;L;;;;30;N;;;;;
+ 118ED;WARANG CITI NUMBER FORTY;No;0;L;;;;40;N;;;;;
+ 118EE;WARANG CITI NUMBER FIFTY;No;0;L;;;;50;N;;;;;
+ 118EF;WARANG CITI NUMBER SIXTY;No;0;L;;;;60;N;;;;;
+ 118F0;WARANG CITI NUMBER SEVENTY;No;0;L;;;;70;N;;;;;
+ 118F1;WARANG CITI NUMBER EIGHTY;No;0;L;;;;80;N;;;;;
+ 118F2;WARANG CITI NUMBER NINETY;No;0;L;;;;90;N;;;;;
+ 118FF;WARANG CITI OM;Lo;0;L;;;;;N;;;;;
+ 119A0;NANDINAGARI LETTER A;Lo;0;L;;;;;N;;;;;
+ 119A1;NANDINAGARI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 119A2;NANDINAGARI LETTER I;Lo;0;L;;;;;N;;;;;
+ 119A3;NANDINAGARI LETTER II;Lo;0;L;;;;;N;;;;;
+ 119A4;NANDINAGARI LETTER U;Lo;0;L;;;;;N;;;;;
+ 119A5;NANDINAGARI LETTER UU;Lo;0;L;;;;;N;;;;;
+ 119A6;NANDINAGARI LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 119A7;NANDINAGARI LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 119AA;NANDINAGARI LETTER E;Lo;0;L;;;;;N;;;;;
+ 119AB;NANDINAGARI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 119AC;NANDINAGARI LETTER O;Lo;0;L;;;;;N;;;;;
+ 119AD;NANDINAGARI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 119AE;NANDINAGARI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 119AF;NANDINAGARI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 119B0;NANDINAGARI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 119B1;NANDINAGARI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 119B2;NANDINAGARI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 119B3;NANDINAGARI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 119B4;NANDINAGARI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 119B5;NANDINAGARI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 119B6;NANDINAGARI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 119B7;NANDINAGARI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 119B8;NANDINAGARI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 119B9;NANDINAGARI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 119BA;NANDINAGARI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 119BB;NANDINAGARI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 119BC;NANDINAGARI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 119BD;NANDINAGARI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 119BE;NANDINAGARI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 119BF;NANDINAGARI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 119C0;NANDINAGARI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 119C1;NANDINAGARI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 119C2;NANDINAGARI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 119C3;NANDINAGARI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 119C4;NANDINAGARI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 119C5;NANDINAGARI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 119C6;NANDINAGARI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 119C7;NANDINAGARI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 119C8;NANDINAGARI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 119C9;NANDINAGARI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 119CA;NANDINAGARI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 119CB;NANDINAGARI LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 119CC;NANDINAGARI LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 119CD;NANDINAGARI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 119CE;NANDINAGARI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 119CF;NANDINAGARI LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 119D0;NANDINAGARI LETTER RRA;Lo;0;L;;;;;N;;;;;
+ 119D1;NANDINAGARI VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 119D2;NANDINAGARI VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 119D3;NANDINAGARI VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 119D4;NANDINAGARI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 119D5;NANDINAGARI VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 119D6;NANDINAGARI VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 119D7;NANDINAGARI VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 119DA;NANDINAGARI VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 119DB;NANDINAGARI VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 119DC;NANDINAGARI VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ 119DD;NANDINAGARI VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ 119DE;NANDINAGARI SIGN ANUSVARA;Mc;0;L;;;;;N;;;;;
+ 119DF;NANDINAGARI SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 119E0;NANDINAGARI SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 119E1;NANDINAGARI SIGN AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 119E2;NANDINAGARI SIGN SIDDHAM;Po;0;L;;;;;N;;;;;
+ 119E3;NANDINAGARI HEADSTROKE;Lo;0;L;;;;;N;;;;;
+ 119E4;NANDINAGARI VOWEL SIGN PRISHTHAMATRA E;Mc;0;L;;;;;N;;;;;
+ 11A00;ZANABAZAR SQUARE LETTER A;Lo;0;L;;;;;N;;;;;
+ 11A01;ZANABAZAR SQUARE VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 11A02;ZANABAZAR SQUARE VOWEL SIGN UE;Mn;0;NSM;;;;;N;;;;;
+ 11A03;ZANABAZAR SQUARE VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 11A04;ZANABAZAR SQUARE VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 11A05;ZANABAZAR SQUARE VOWEL SIGN OE;Mn;0;NSM;;;;;N;;;;;
+ 11A06;ZANABAZAR SQUARE VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 11A07;ZANABAZAR SQUARE VOWEL SIGN AI;Mn;0;L;;;;;N;;;;;
+ 11A08;ZANABAZAR SQUARE VOWEL SIGN AU;Mn;0;L;;;;;N;;;;;
+ 11A09;ZANABAZAR SQUARE VOWEL SIGN REVERSED I;Mn;0;NSM;;;;;N;;;;;
+ 11A0A;ZANABAZAR SQUARE VOWEL LENGTH MARK;Mn;0;NSM;;;;;N;;;;;
+ 11A0B;ZANABAZAR SQUARE LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11A0C;ZANABAZAR SQUARE LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11A0D;ZANABAZAR SQUARE LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11A0E;ZANABAZAR SQUARE LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11A0F;ZANABAZAR SQUARE LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11A10;ZANABAZAR SQUARE LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11A11;ZANABAZAR SQUARE LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11A12;ZANABAZAR SQUARE LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11A13;ZANABAZAR SQUARE LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11A14;ZANABAZAR SQUARE LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 11A15;ZANABAZAR SQUARE LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 11A16;ZANABAZAR SQUARE LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 11A17;ZANABAZAR SQUARE LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 11A18;ZANABAZAR SQUARE LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 11A19;ZANABAZAR SQUARE LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11A1A;ZANABAZAR SQUARE LETTER THA;Lo;0;L;;;;;N;;;;;
+ 11A1B;ZANABAZAR SQUARE LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11A1C;ZANABAZAR SQUARE LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 11A1D;ZANABAZAR SQUARE LETTER NA;Lo;0;L;;;;;N;;;;;
+ 11A1E;ZANABAZAR SQUARE LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11A1F;ZANABAZAR SQUARE LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 11A20;ZANABAZAR SQUARE LETTER BA;Lo;0;L;;;;;N;;;;;
+ 11A21;ZANABAZAR SQUARE LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 11A22;ZANABAZAR SQUARE LETTER MA;Lo;0;L;;;;;N;;;;;
+ 11A23;ZANABAZAR SQUARE LETTER TSA;Lo;0;L;;;;;N;;;;;
+ 11A24;ZANABAZAR SQUARE LETTER TSHA;Lo;0;L;;;;;N;;;;;
+ 11A25;ZANABAZAR SQUARE LETTER DZA;Lo;0;L;;;;;N;;;;;
+ 11A26;ZANABAZAR SQUARE LETTER DZHA;Lo;0;L;;;;;N;;;;;
+ 11A27;ZANABAZAR SQUARE LETTER ZHA;Lo;0;L;;;;;N;;;;;
+ 11A28;ZANABAZAR SQUARE LETTER ZA;Lo;0;L;;;;;N;;;;;
+ 11A29;ZANABAZAR SQUARE LETTER -A;Lo;0;L;;;;;N;;;;;
+ 11A2A;ZANABAZAR SQUARE LETTER YA;Lo;0;L;;;;;N;;;;;
+ 11A2B;ZANABAZAR SQUARE LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11A2C;ZANABAZAR SQUARE LETTER LA;Lo;0;L;;;;;N;;;;;
+ 11A2D;ZANABAZAR SQUARE LETTER VA;Lo;0;L;;;;;N;;;;;
+ 11A2E;ZANABAZAR SQUARE LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 11A2F;ZANABAZAR SQUARE LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 11A30;ZANABAZAR SQUARE LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11A31;ZANABAZAR SQUARE LETTER HA;Lo;0;L;;;;;N;;;;;
+ 11A32;ZANABAZAR SQUARE LETTER KSSA;Lo;0;L;;;;;N;;;;;
+ 11A33;ZANABAZAR SQUARE FINAL CONSONANT MARK;Mn;0;NSM;;;;;N;;;;;
+ 11A34;ZANABAZAR SQUARE SIGN VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 11A35;ZANABAZAR SQUARE SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 11A36;ZANABAZAR SQUARE SIGN CANDRABINDU WITH ORNAMENT;Mn;0;NSM;;;;;N;;;;;
+ 11A37;ZANABAZAR SQUARE SIGN CANDRA WITH ORNAMENT;Mn;0;NSM;;;;;N;;;;;
+ 11A38;ZANABAZAR SQUARE SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 11A39;ZANABAZAR SQUARE SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 11A3A;ZANABAZAR SQUARE CLUSTER-INITIAL LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11A3B;ZANABAZAR SQUARE CLUSTER-FINAL LETTER YA;Mn;0;NSM;;;;;N;;;;;
+ 11A3C;ZANABAZAR SQUARE CLUSTER-FINAL LETTER RA;Mn;0;NSM;;;;;N;;;;;
+ 11A3D;ZANABAZAR SQUARE CLUSTER-FINAL LETTER LA;Mn;0;NSM;;;;;N;;;;;
+ 11A3E;ZANABAZAR SQUARE CLUSTER-FINAL LETTER VA;Mn;0;NSM;;;;;N;;;;;
+ 11A3F;ZANABAZAR SQUARE INITIAL HEAD MARK;Po;0;L;;;;;N;;;;;
+ 11A40;ZANABAZAR SQUARE CLOSING HEAD MARK;Po;0;L;;;;;N;;;;;
+ 11A41;ZANABAZAR SQUARE MARK TSHEG;Po;0;L;;;;;N;;;;;
+ 11A42;ZANABAZAR SQUARE MARK SHAD;Po;0;L;;;;;N;;;;;
+ 11A43;ZANABAZAR SQUARE MARK DOUBLE SHAD;Po;0;L;;;;;N;;;;;
+ 11A44;ZANABAZAR SQUARE MARK LONG TSHEG;Po;0;L;;;;;N;;;;;
+ 11A45;ZANABAZAR SQUARE INITIAL DOUBLE-LINED HEAD MARK;Po;0;L;;;;;N;;;;;
+ 11A46;ZANABAZAR SQUARE CLOSING DOUBLE-LINED HEAD MARK;Po;0;L;;;;;N;;;;;
+ 11A47;ZANABAZAR SQUARE SUBJOINER;Mn;9;NSM;;;;;N;;;;;
+ 11A50;SOYOMBO LETTER A;Lo;0;L;;;;;N;;;;;
+ 11A51;SOYOMBO VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 11A52;SOYOMBO VOWEL SIGN UE;Mn;0;NSM;;;;;N;;;;;
+ 11A53;SOYOMBO VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 11A54;SOYOMBO VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 11A55;SOYOMBO VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 11A56;SOYOMBO VOWEL SIGN OE;Mn;0;NSM;;;;;N;;;;;
+ 11A57;SOYOMBO VOWEL SIGN AI;Mc;0;L;;;;;N;;;;;
+ 11A58;SOYOMBO VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ 11A59;SOYOMBO VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 11A5A;SOYOMBO VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 11A5B;SOYOMBO VOWEL LENGTH MARK;Mn;0;NSM;;;;;N;;;;;
+ 11A5C;SOYOMBO LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11A5D;SOYOMBO LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11A5E;SOYOMBO LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11A5F;SOYOMBO LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11A60;SOYOMBO LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11A61;SOYOMBO LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11A62;SOYOMBO LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11A63;SOYOMBO LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11A64;SOYOMBO LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 11A65;SOYOMBO LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11A66;SOYOMBO LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 11A67;SOYOMBO LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 11A68;SOYOMBO LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 11A69;SOYOMBO LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 11A6A;SOYOMBO LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 11A6B;SOYOMBO LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11A6C;SOYOMBO LETTER THA;Lo;0;L;;;;;N;;;;;
+ 11A6D;SOYOMBO LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11A6E;SOYOMBO LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 11A6F;SOYOMBO LETTER NA;Lo;0;L;;;;;N;;;;;
+ 11A70;SOYOMBO LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11A71;SOYOMBO LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 11A72;SOYOMBO LETTER BA;Lo;0;L;;;;;N;;;;;
+ 11A73;SOYOMBO LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 11A74;SOYOMBO LETTER MA;Lo;0;L;;;;;N;;;;;
+ 11A75;SOYOMBO LETTER TSA;Lo;0;L;;;;;N;;;;;
+ 11A76;SOYOMBO LETTER TSHA;Lo;0;L;;;;;N;;;;;
+ 11A77;SOYOMBO LETTER DZA;Lo;0;L;;;;;N;;;;;
+ 11A78;SOYOMBO LETTER ZHA;Lo;0;L;;;;;N;;;;;
+ 11A79;SOYOMBO LETTER ZA;Lo;0;L;;;;;N;;;;;
+ 11A7A;SOYOMBO LETTER -A;Lo;0;L;;;;;N;;;;;
+ 11A7B;SOYOMBO LETTER YA;Lo;0;L;;;;;N;;;;;
+ 11A7C;SOYOMBO LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11A7D;SOYOMBO LETTER LA;Lo;0;L;;;;;N;;;;;
+ 11A7E;SOYOMBO LETTER VA;Lo;0;L;;;;;N;;;;;
+ 11A7F;SOYOMBO LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 11A80;SOYOMBO LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 11A81;SOYOMBO LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11A82;SOYOMBO LETTER HA;Lo;0;L;;;;;N;;;;;
+ 11A83;SOYOMBO LETTER KSSA;Lo;0;L;;;;;N;;;;;
+ 11A84;SOYOMBO SIGN JIHVAMULIYA;Lo;0;L;;;;;N;;;;;
+ 11A85;SOYOMBO SIGN UPADHMANIYA;Lo;0;L;;;;;N;;;;;
+ 11A86;SOYOMBO CLUSTER-INITIAL LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11A87;SOYOMBO CLUSTER-INITIAL LETTER LA;Lo;0;L;;;;;N;;;;;
+ 11A88;SOYOMBO CLUSTER-INITIAL LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 11A89;SOYOMBO CLUSTER-INITIAL LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11A8A;SOYOMBO FINAL CONSONANT SIGN G;Mn;0;NSM;;;;;N;;;;;
+ 11A8B;SOYOMBO FINAL CONSONANT SIGN K;Mn;0;NSM;;;;;N;;;;;
+ 11A8C;SOYOMBO FINAL CONSONANT SIGN NG;Mn;0;NSM;;;;;N;;;;;
+ 11A8D;SOYOMBO FINAL CONSONANT SIGN D;Mn;0;NSM;;;;;N;;;;;
+ 11A8E;SOYOMBO FINAL CONSONANT SIGN N;Mn;0;NSM;;;;;N;;;;;
+ 11A8F;SOYOMBO FINAL CONSONANT SIGN B;Mn;0;NSM;;;;;N;;;;;
+ 11A90;SOYOMBO FINAL CONSONANT SIGN M;Mn;0;NSM;;;;;N;;;;;
+ 11A91;SOYOMBO FINAL CONSONANT SIGN R;Mn;0;NSM;;;;;N;;;;;
+ 11A92;SOYOMBO FINAL CONSONANT SIGN L;Mn;0;NSM;;;;;N;;;;;
+ 11A93;SOYOMBO FINAL CONSONANT SIGN SH;Mn;0;NSM;;;;;N;;;;;
+ 11A94;SOYOMBO FINAL CONSONANT SIGN S;Mn;0;NSM;;;;;N;;;;;
+ 11A95;SOYOMBO FINAL CONSONANT SIGN -A;Mn;0;NSM;;;;;N;;;;;
+ 11A96;SOYOMBO SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 11A97;SOYOMBO SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 11A98;SOYOMBO GEMINATION MARK;Mn;0;NSM;;;;;N;;;;;
+ 11A99;SOYOMBO SUBJOINER;Mn;9;NSM;;;;;N;;;;;
+ 11A9A;SOYOMBO MARK TSHEG;Po;0;L;;;;;N;;;;;
+ 11A9B;SOYOMBO MARK SHAD;Po;0;L;;;;;N;;;;;
+ 11A9C;SOYOMBO MARK DOUBLE SHAD;Po;0;L;;;;;N;;;;;
+ 11A9D;SOYOMBO MARK PLUTA;Lo;0;L;;;;;N;;;;;
+ 11A9E;SOYOMBO HEAD MARK WITH MOON AND SUN AND TRIPLE FLAME;Po;0;L;;;;;N;;;;;
+ 11A9F;SOYOMBO HEAD MARK WITH MOON AND SUN AND FLAME;Po;0;L;;;;;N;;;;;
+ 11AA0;SOYOMBO HEAD MARK WITH MOON AND SUN;Po;0;L;;;;;N;;;;;
+ 11AA1;SOYOMBO TERMINAL MARK-1;Po;0;L;;;;;N;;;;;
+ 11AA2;SOYOMBO TERMINAL MARK-2;Po;0;L;;;;;N;;;;;
+ 11AC0;PAU CIN HAU LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11AC1;PAU CIN HAU LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11AC2;PAU CIN HAU LETTER LA;Lo;0;L;;;;;N;;;;;
+ 11AC3;PAU CIN HAU LETTER MA;Lo;0;L;;;;;N;;;;;
+ 11AC4;PAU CIN HAU LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11AC5;PAU CIN HAU LETTER ZA;Lo;0;L;;;;;N;;;;;
+ 11AC6;PAU CIN HAU LETTER VA;Lo;0;L;;;;;N;;;;;
+ 11AC7;PAU CIN HAU LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11AC8;PAU CIN HAU LETTER HA;Lo;0;L;;;;;N;;;;;
+ 11AC9;PAU CIN HAU LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11ACA;PAU CIN HAU LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11ACB;PAU CIN HAU LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11ACC;PAU CIN HAU LETTER BA;Lo;0;L;;;;;N;;;;;
+ 11ACD;PAU CIN HAU LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11ACE;PAU CIN HAU LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11ACF;PAU CIN HAU LETTER THA;Lo;0;L;;;;;N;;;;;
+ 11AD0;PAU CIN HAU LETTER NA;Lo;0;L;;;;;N;;;;;
+ 11AD1;PAU CIN HAU LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 11AD2;PAU CIN HAU LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11AD3;PAU CIN HAU LETTER FA;Lo;0;L;;;;;N;;;;;
+ 11AD4;PAU CIN HAU LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11AD5;PAU CIN HAU LETTER A;Lo;0;L;;;;;N;;;;;
+ 11AD6;PAU CIN HAU LETTER E;Lo;0;L;;;;;N;;;;;
+ 11AD7;PAU CIN HAU LETTER I;Lo;0;L;;;;;N;;;;;
+ 11AD8;PAU CIN HAU LETTER O;Lo;0;L;;;;;N;;;;;
+ 11AD9;PAU CIN HAU LETTER U;Lo;0;L;;;;;N;;;;;
+ 11ADA;PAU CIN HAU LETTER UA;Lo;0;L;;;;;N;;;;;
+ 11ADB;PAU CIN HAU LETTER IA;Lo;0;L;;;;;N;;;;;
+ 11ADC;PAU CIN HAU LETTER FINAL P;Lo;0;L;;;;;N;;;;;
+ 11ADD;PAU CIN HAU LETTER FINAL K;Lo;0;L;;;;;N;;;;;
+ 11ADE;PAU CIN HAU LETTER FINAL T;Lo;0;L;;;;;N;;;;;
+ 11ADF;PAU CIN HAU LETTER FINAL M;Lo;0;L;;;;;N;;;;;
+ 11AE0;PAU CIN HAU LETTER FINAL N;Lo;0;L;;;;;N;;;;;
+ 11AE1;PAU CIN HAU LETTER FINAL L;Lo;0;L;;;;;N;;;;;
+ 11AE2;PAU CIN HAU LETTER FINAL W;Lo;0;L;;;;;N;;;;;
+ 11AE3;PAU CIN HAU LETTER FINAL NG;Lo;0;L;;;;;N;;;;;
+ 11AE4;PAU CIN HAU LETTER FINAL Y;Lo;0;L;;;;;N;;;;;
+ 11AE5;PAU CIN HAU RISING TONE LONG;Lo;0;L;;;;;N;;;;;
+ 11AE6;PAU CIN HAU RISING TONE;Lo;0;L;;;;;N;;;;;
+ 11AE7;PAU CIN HAU SANDHI GLOTTAL STOP;Lo;0;L;;;;;N;;;;;
+ 11AE8;PAU CIN HAU RISING TONE LONG FINAL;Lo;0;L;;;;;N;;;;;
+ 11AE9;PAU CIN HAU RISING TONE FINAL;Lo;0;L;;;;;N;;;;;
+ 11AEA;PAU CIN HAU SANDHI GLOTTAL STOP FINAL;Lo;0;L;;;;;N;;;;;
+ 11AEB;PAU CIN HAU SANDHI TONE LONG;Lo;0;L;;;;;N;;;;;
+ 11AEC;PAU CIN HAU SANDHI TONE;Lo;0;L;;;;;N;;;;;
+ 11AED;PAU CIN HAU SANDHI TONE LONG FINAL;Lo;0;L;;;;;N;;;;;
+ 11AEE;PAU CIN HAU SANDHI TONE FINAL;Lo;0;L;;;;;N;;;;;
+ 11AEF;PAU CIN HAU MID-LEVEL TONE;Lo;0;L;;;;;N;;;;;
+ 11AF0;PAU CIN HAU GLOTTAL STOP VARIANT;Lo;0;L;;;;;N;;;;;
+ 11AF1;PAU CIN HAU MID-LEVEL TONE LONG FINAL;Lo;0;L;;;;;N;;;;;
+ 11AF2;PAU CIN HAU MID-LEVEL TONE FINAL;Lo;0;L;;;;;N;;;;;
+ 11AF3;PAU CIN HAU LOW-FALLING TONE LONG;Lo;0;L;;;;;N;;;;;
+ 11AF4;PAU CIN HAU LOW-FALLING TONE;Lo;0;L;;;;;N;;;;;
+ 11AF5;PAU CIN HAU GLOTTAL STOP;Lo;0;L;;;;;N;;;;;
+ 11AF6;PAU CIN HAU LOW-FALLING TONE LONG FINAL;Lo;0;L;;;;;N;;;;;
+ 11AF7;PAU CIN HAU LOW-FALLING TONE FINAL;Lo;0;L;;;;;N;;;;;
+ 11AF8;PAU CIN HAU GLOTTAL STOP FINAL;Lo;0;L;;;;;N;;;;;
+ 11C00;BHAIKSUKI LETTER A;Lo;0;L;;;;;N;;;;;
+ 11C01;BHAIKSUKI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11C02;BHAIKSUKI LETTER I;Lo;0;L;;;;;N;;;;;
+ 11C03;BHAIKSUKI LETTER II;Lo;0;L;;;;;N;;;;;
+ 11C04;BHAIKSUKI LETTER U;Lo;0;L;;;;;N;;;;;
+ 11C05;BHAIKSUKI LETTER UU;Lo;0;L;;;;;N;;;;;
+ 11C06;BHAIKSUKI LETTER VOCALIC R;Lo;0;L;;;;;N;;;;;
+ 11C07;BHAIKSUKI LETTER VOCALIC RR;Lo;0;L;;;;;N;;;;;
+ 11C08;BHAIKSUKI LETTER VOCALIC L;Lo;0;L;;;;;N;;;;;
+ 11C0A;BHAIKSUKI LETTER E;Lo;0;L;;;;;N;;;;;
+ 11C0B;BHAIKSUKI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 11C0C;BHAIKSUKI LETTER O;Lo;0;L;;;;;N;;;;;
+ 11C0D;BHAIKSUKI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 11C0E;BHAIKSUKI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11C0F;BHAIKSUKI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11C10;BHAIKSUKI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11C11;BHAIKSUKI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11C12;BHAIKSUKI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11C13;BHAIKSUKI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11C14;BHAIKSUKI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11C15;BHAIKSUKI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11C16;BHAIKSUKI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 11C17;BHAIKSUKI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11C18;BHAIKSUKI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 11C19;BHAIKSUKI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 11C1A;BHAIKSUKI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 11C1B;BHAIKSUKI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 11C1C;BHAIKSUKI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 11C1D;BHAIKSUKI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11C1E;BHAIKSUKI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 11C1F;BHAIKSUKI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11C20;BHAIKSUKI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 11C21;BHAIKSUKI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 11C22;BHAIKSUKI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11C23;BHAIKSUKI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 11C24;BHAIKSUKI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 11C25;BHAIKSUKI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 11C26;BHAIKSUKI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 11C27;BHAIKSUKI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 11C28;BHAIKSUKI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11C29;BHAIKSUKI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 11C2A;BHAIKSUKI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 11C2B;BHAIKSUKI LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 11C2C;BHAIKSUKI LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 11C2D;BHAIKSUKI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11C2E;BHAIKSUKI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 11C2F;BHAIKSUKI VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 11C30;BHAIKSUKI VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 11C31;BHAIKSUKI VOWEL SIGN II;Mn;0;NSM;;;;;N;;;;;
+ 11C32;BHAIKSUKI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 11C33;BHAIKSUKI VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 11C34;BHAIKSUKI VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 11C35;BHAIKSUKI VOWEL SIGN VOCALIC RR;Mn;0;NSM;;;;;N;;;;;
+ 11C36;BHAIKSUKI VOWEL SIGN VOCALIC L;Mn;0;NSM;;;;;N;;;;;
+ 11C38;BHAIKSUKI VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 11C39;BHAIKSUKI VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 11C3A;BHAIKSUKI VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 11C3B;BHAIKSUKI VOWEL SIGN AU;Mn;0;NSM;;;;;N;;;;;
+ 11C3C;BHAIKSUKI SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 11C3D;BHAIKSUKI SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 11C3E;BHAIKSUKI SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 11C3F;BHAIKSUKI SIGN VIRAMA;Mn;9;L;;;;;N;;;;;
+ 11C40;BHAIKSUKI SIGN AVAGRAHA;Lo;0;L;;;;;N;;;;;
+ 11C41;BHAIKSUKI DANDA;Po;0;L;;;;;N;;;;;
+ 11C42;BHAIKSUKI DOUBLE DANDA;Po;0;L;;;;;N;;;;;
+ 11C43;BHAIKSUKI WORD SEPARATOR;Po;0;L;;;;;N;;;;;
+ 11C44;BHAIKSUKI GAP FILLER-1;Po;0;L;;;;;N;;;;;
+ 11C45;BHAIKSUKI GAP FILLER-2;Po;0;L;;;;;N;;;;;
+ 11C50;BHAIKSUKI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 11C51;BHAIKSUKI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 11C52;BHAIKSUKI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 11C53;BHAIKSUKI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 11C54;BHAIKSUKI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 11C55;BHAIKSUKI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 11C56;BHAIKSUKI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 11C57;BHAIKSUKI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 11C58;BHAIKSUKI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 11C59;BHAIKSUKI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 11C5A;BHAIKSUKI NUMBER ONE;No;0;L;;;;1;N;;;;;
+ 11C5B;BHAIKSUKI NUMBER TWO;No;0;L;;;;2;N;;;;;
+ 11C5C;BHAIKSUKI NUMBER THREE;No;0;L;;;;3;N;;;;;
+ 11C5D;BHAIKSUKI NUMBER FOUR;No;0;L;;;;4;N;;;;;
+ 11C5E;BHAIKSUKI NUMBER FIVE;No;0;L;;;;5;N;;;;;
+ 11C5F;BHAIKSUKI NUMBER SIX;No;0;L;;;;6;N;;;;;
+ 11C60;BHAIKSUKI NUMBER SEVEN;No;0;L;;;;7;N;;;;;
+ 11C61;BHAIKSUKI NUMBER EIGHT;No;0;L;;;;8;N;;;;;
+ 11C62;BHAIKSUKI NUMBER NINE;No;0;L;;;;9;N;;;;;
+ 11C63;BHAIKSUKI NUMBER TEN;No;0;L;;;;10;N;;;;;
+ 11C64;BHAIKSUKI NUMBER TWENTY;No;0;L;;;;20;N;;;;;
+ 11C65;BHAIKSUKI NUMBER THIRTY;No;0;L;;;;30;N;;;;;
+ 11C66;BHAIKSUKI NUMBER FORTY;No;0;L;;;;40;N;;;;;
+ 11C67;BHAIKSUKI NUMBER FIFTY;No;0;L;;;;50;N;;;;;
+ 11C68;BHAIKSUKI NUMBER SIXTY;No;0;L;;;;60;N;;;;;
+ 11C69;BHAIKSUKI NUMBER SEVENTY;No;0;L;;;;70;N;;;;;
+ 11C6A;BHAIKSUKI NUMBER EIGHTY;No;0;L;;;;80;N;;;;;
+ 11C6B;BHAIKSUKI NUMBER NINETY;No;0;L;;;;90;N;;;;;
+ 11C6C;BHAIKSUKI HUNDREDS UNIT MARK;No;0;L;;;;100;N;;;;;
+ 11C70;MARCHEN HEAD MARK;Po;0;L;;;;;N;;;;;
+ 11C71;MARCHEN MARK SHAD;Po;0;L;;;;;N;;;;;
+ 11C72;MARCHEN LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11C73;MARCHEN LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11C74;MARCHEN LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11C75;MARCHEN LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11C76;MARCHEN LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11C77;MARCHEN LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11C78;MARCHEN LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11C79;MARCHEN LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11C7A;MARCHEN LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11C7B;MARCHEN LETTER THA;Lo;0;L;;;;;N;;;;;
+ 11C7C;MARCHEN LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11C7D;MARCHEN LETTER NA;Lo;0;L;;;;;N;;;;;
+ 11C7E;MARCHEN LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11C7F;MARCHEN LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 11C80;MARCHEN LETTER BA;Lo;0;L;;;;;N;;;;;
+ 11C81;MARCHEN LETTER MA;Lo;0;L;;;;;N;;;;;
+ 11C82;MARCHEN LETTER TSA;Lo;0;L;;;;;N;;;;;
+ 11C83;MARCHEN LETTER TSHA;Lo;0;L;;;;;N;;;;;
+ 11C84;MARCHEN LETTER DZA;Lo;0;L;;;;;N;;;;;
+ 11C85;MARCHEN LETTER WA;Lo;0;L;;;;;N;;;;;
+ 11C86;MARCHEN LETTER ZHA;Lo;0;L;;;;;N;;;;;
+ 11C87;MARCHEN LETTER ZA;Lo;0;L;;;;;N;;;;;
+ 11C88;MARCHEN LETTER -A;Lo;0;L;;;;;N;;;;;
+ 11C89;MARCHEN LETTER YA;Lo;0;L;;;;;N;;;;;
+ 11C8A;MARCHEN LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11C8B;MARCHEN LETTER LA;Lo;0;L;;;;;N;;;;;
+ 11C8C;MARCHEN LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 11C8D;MARCHEN LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11C8E;MARCHEN LETTER HA;Lo;0;L;;;;;N;;;;;
+ 11C8F;MARCHEN LETTER A;Lo;0;L;;;;;N;;;;;
+ 11C92;MARCHEN SUBJOINED LETTER KA;Mn;0;NSM;;;;;N;;;;;
+ 11C93;MARCHEN SUBJOINED LETTER KHA;Mn;0;NSM;;;;;N;;;;;
+ 11C94;MARCHEN SUBJOINED LETTER GA;Mn;0;NSM;;;;;N;;;;;
+ 11C95;MARCHEN SUBJOINED LETTER NGA;Mn;0;NSM;;;;;N;;;;;
+ 11C96;MARCHEN SUBJOINED LETTER CA;Mn;0;NSM;;;;;N;;;;;
+ 11C97;MARCHEN SUBJOINED LETTER CHA;Mn;0;NSM;;;;;N;;;;;
+ 11C98;MARCHEN SUBJOINED LETTER JA;Mn;0;NSM;;;;;N;;;;;
+ 11C99;MARCHEN SUBJOINED LETTER NYA;Mn;0;NSM;;;;;N;;;;;
+ 11C9A;MARCHEN SUBJOINED LETTER TA;Mn;0;NSM;;;;;N;;;;;
+ 11C9B;MARCHEN SUBJOINED LETTER THA;Mn;0;NSM;;;;;N;;;;;
+ 11C9C;MARCHEN SUBJOINED LETTER DA;Mn;0;NSM;;;;;N;;;;;
+ 11C9D;MARCHEN SUBJOINED LETTER NA;Mn;0;NSM;;;;;N;;;;;
+ 11C9E;MARCHEN SUBJOINED LETTER PA;Mn;0;NSM;;;;;N;;;;;
+ 11C9F;MARCHEN SUBJOINED LETTER PHA;Mn;0;NSM;;;;;N;;;;;
+ 11CA0;MARCHEN SUBJOINED LETTER BA;Mn;0;NSM;;;;;N;;;;;
+ 11CA1;MARCHEN SUBJOINED LETTER MA;Mn;0;NSM;;;;;N;;;;;
+ 11CA2;MARCHEN SUBJOINED LETTER TSA;Mn;0;NSM;;;;;N;;;;;
+ 11CA3;MARCHEN SUBJOINED LETTER TSHA;Mn;0;NSM;;;;;N;;;;;
+ 11CA4;MARCHEN SUBJOINED LETTER DZA;Mn;0;NSM;;;;;N;;;;;
+ 11CA5;MARCHEN SUBJOINED LETTER WA;Mn;0;NSM;;;;;N;;;;;
+ 11CA6;MARCHEN SUBJOINED LETTER ZHA;Mn;0;NSM;;;;;N;;;;;
+ 11CA7;MARCHEN SUBJOINED LETTER ZA;Mn;0;NSM;;;;;N;;;;;
+ 11CA9;MARCHEN SUBJOINED LETTER YA;Mc;0;L;;;;;N;;;;;
+ 11CAA;MARCHEN SUBJOINED LETTER RA;Mn;0;NSM;;;;;N;;;;;
+ 11CAB;MARCHEN SUBJOINED LETTER LA;Mn;0;NSM;;;;;N;;;;;
+ 11CAC;MARCHEN SUBJOINED LETTER SHA;Mn;0;NSM;;;;;N;;;;;
+ 11CAD;MARCHEN SUBJOINED LETTER SA;Mn;0;NSM;;;;;N;;;;;
+ 11CAE;MARCHEN SUBJOINED LETTER HA;Mn;0;NSM;;;;;N;;;;;
+ 11CAF;MARCHEN SUBJOINED LETTER A;Mn;0;NSM;;;;;N;;;;;
+ 11CB0;MARCHEN VOWEL SIGN AA;Mn;0;NSM;;;;;N;;;;;
+ 11CB1;MARCHEN VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 11CB2;MARCHEN VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 11CB3;MARCHEN VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 11CB4;MARCHEN VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ 11CB5;MARCHEN SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 11CB6;MARCHEN SIGN CANDRABINDU;Mn;0;NSM;;;;;N;;;;;
+ 11D00;MASARAM GONDI LETTER A;Lo;0;L;;;;;N;;;;;
+ 11D01;MASARAM GONDI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11D02;MASARAM GONDI LETTER I;Lo;0;L;;;;;N;;;;;
+ 11D03;MASARAM GONDI LETTER II;Lo;0;L;;;;;N;;;;;
+ 11D04;MASARAM GONDI LETTER U;Lo;0;L;;;;;N;;;;;
+ 11D05;MASARAM GONDI LETTER UU;Lo;0;L;;;;;N;;;;;
+ 11D06;MASARAM GONDI LETTER E;Lo;0;L;;;;;N;;;;;
+ 11D08;MASARAM GONDI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 11D09;MASARAM GONDI LETTER O;Lo;0;L;;;;;N;;;;;
+ 11D0B;MASARAM GONDI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 11D0C;MASARAM GONDI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11D0D;MASARAM GONDI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11D0E;MASARAM GONDI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11D0F;MASARAM GONDI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11D10;MASARAM GONDI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11D11;MASARAM GONDI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11D12;MASARAM GONDI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11D13;MASARAM GONDI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11D14;MASARAM GONDI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 11D15;MASARAM GONDI LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11D16;MASARAM GONDI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 11D17;MASARAM GONDI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 11D18;MASARAM GONDI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 11D19;MASARAM GONDI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 11D1A;MASARAM GONDI LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 11D1B;MASARAM GONDI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11D1C;MASARAM GONDI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 11D1D;MASARAM GONDI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11D1E;MASARAM GONDI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 11D1F;MASARAM GONDI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 11D20;MASARAM GONDI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11D21;MASARAM GONDI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 11D22;MASARAM GONDI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 11D23;MASARAM GONDI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 11D24;MASARAM GONDI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 11D25;MASARAM GONDI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 11D26;MASARAM GONDI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11D27;MASARAM GONDI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 11D28;MASARAM GONDI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 11D29;MASARAM GONDI LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 11D2A;MASARAM GONDI LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 11D2B;MASARAM GONDI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11D2C;MASARAM GONDI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 11D2D;MASARAM GONDI LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 11D2E;MASARAM GONDI LETTER KSSA;Lo;0;L;;;;;N;;;;;
+ 11D2F;MASARAM GONDI LETTER JNYA;Lo;0;L;;;;;N;;;;;
+ 11D30;MASARAM GONDI LETTER TRA;Lo;0;L;;;;;N;;;;;
+ 11D31;MASARAM GONDI VOWEL SIGN AA;Mn;0;NSM;;;;;N;;;;;
+ 11D32;MASARAM GONDI VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 11D33;MASARAM GONDI VOWEL SIGN II;Mn;0;NSM;;;;;N;;;;;
+ 11D34;MASARAM GONDI VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 11D35;MASARAM GONDI VOWEL SIGN UU;Mn;0;NSM;;;;;N;;;;;
+ 11D36;MASARAM GONDI VOWEL SIGN VOCALIC R;Mn;0;NSM;;;;;N;;;;;
+ 11D3A;MASARAM GONDI VOWEL SIGN E;Mn;0;NSM;;;;;N;;;;;
+ 11D3C;MASARAM GONDI VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 11D3D;MASARAM GONDI VOWEL SIGN O;Mn;0;NSM;;;;;N;;;;;
+ 11D3F;MASARAM GONDI VOWEL SIGN AU;Mn;0;NSM;;;;;N;;;;;
+ 11D40;MASARAM GONDI SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 11D41;MASARAM GONDI SIGN VISARGA;Mn;0;NSM;;;;;N;;;;;
+ 11D42;MASARAM GONDI SIGN NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 11D43;MASARAM GONDI SIGN CANDRA;Mn;0;NSM;;;;;N;;;;;
+ 11D44;MASARAM GONDI SIGN HALANTA;Mn;9;NSM;;;;;N;;;;;
+ 11D45;MASARAM GONDI VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 11D46;MASARAM GONDI REPHA;Lo;0;L;;;;;N;;;;;
+ 11D47;MASARAM GONDI RA-KARA;Mn;0;NSM;;;;;N;;;;;
+ 11D50;MASARAM GONDI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 11D51;MASARAM GONDI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 11D52;MASARAM GONDI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 11D53;MASARAM GONDI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 11D54;MASARAM GONDI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 11D55;MASARAM GONDI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 11D56;MASARAM GONDI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 11D57;MASARAM GONDI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 11D58;MASARAM GONDI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 11D59;MASARAM GONDI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 11D60;GUNJALA GONDI LETTER A;Lo;0;L;;;;;N;;;;;
+ 11D61;GUNJALA GONDI LETTER AA;Lo;0;L;;;;;N;;;;;
+ 11D62;GUNJALA GONDI LETTER I;Lo;0;L;;;;;N;;;;;
+ 11D63;GUNJALA GONDI LETTER II;Lo;0;L;;;;;N;;;;;
+ 11D64;GUNJALA GONDI LETTER U;Lo;0;L;;;;;N;;;;;
+ 11D65;GUNJALA GONDI LETTER UU;Lo;0;L;;;;;N;;;;;
+ 11D67;GUNJALA GONDI LETTER EE;Lo;0;L;;;;;N;;;;;
+ 11D68;GUNJALA GONDI LETTER AI;Lo;0;L;;;;;N;;;;;
+ 11D6A;GUNJALA GONDI LETTER OO;Lo;0;L;;;;;N;;;;;
+ 11D6B;GUNJALA GONDI LETTER AU;Lo;0;L;;;;;N;;;;;
+ 11D6C;GUNJALA GONDI LETTER YA;Lo;0;L;;;;;N;;;;;
+ 11D6D;GUNJALA GONDI LETTER VA;Lo;0;L;;;;;N;;;;;
+ 11D6E;GUNJALA GONDI LETTER BA;Lo;0;L;;;;;N;;;;;
+ 11D6F;GUNJALA GONDI LETTER BHA;Lo;0;L;;;;;N;;;;;
+ 11D70;GUNJALA GONDI LETTER MA;Lo;0;L;;;;;N;;;;;
+ 11D71;GUNJALA GONDI LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11D72;GUNJALA GONDI LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 11D73;GUNJALA GONDI LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11D74;GUNJALA GONDI LETTER THA;Lo;0;L;;;;;N;;;;;
+ 11D75;GUNJALA GONDI LETTER LA;Lo;0;L;;;;;N;;;;;
+ 11D76;GUNJALA GONDI LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11D77;GUNJALA GONDI LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 11D78;GUNJALA GONDI LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11D79;GUNJALA GONDI LETTER DHA;Lo;0;L;;;;;N;;;;;
+ 11D7A;GUNJALA GONDI LETTER NA;Lo;0;L;;;;;N;;;;;
+ 11D7B;GUNJALA GONDI LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11D7C;GUNJALA GONDI LETTER CHA;Lo;0;L;;;;;N;;;;;
+ 11D7D;GUNJALA GONDI LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 11D7E;GUNJALA GONDI LETTER TTHA;Lo;0;L;;;;;N;;;;;
+ 11D7F;GUNJALA GONDI LETTER LLA;Lo;0;L;;;;;N;;;;;
+ 11D80;GUNJALA GONDI LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11D81;GUNJALA GONDI LETTER JHA;Lo;0;L;;;;;N;;;;;
+ 11D82;GUNJALA GONDI LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 11D83;GUNJALA GONDI LETTER DDHA;Lo;0;L;;;;;N;;;;;
+ 11D84;GUNJALA GONDI LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11D85;GUNJALA GONDI LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11D86;GUNJALA GONDI LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 11D87;GUNJALA GONDI LETTER HA;Lo;0;L;;;;;N;;;;;
+ 11D88;GUNJALA GONDI LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11D89;GUNJALA GONDI LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11D8A;GUNJALA GONDI VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 11D8B;GUNJALA GONDI VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 11D8C;GUNJALA GONDI VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 11D8D;GUNJALA GONDI VOWEL SIGN U;Mc;0;L;;;;;N;;;;;
+ 11D8E;GUNJALA GONDI VOWEL SIGN UU;Mc;0;L;;;;;N;;;;;
+ 11D90;GUNJALA GONDI VOWEL SIGN EE;Mn;0;NSM;;;;;N;;;;;
+ 11D91;GUNJALA GONDI VOWEL SIGN AI;Mn;0;NSM;;;;;N;;;;;
+ 11D93;GUNJALA GONDI VOWEL SIGN OO;Mc;0;L;;;;;N;;;;;
+ 11D94;GUNJALA GONDI VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ 11D95;GUNJALA GONDI SIGN ANUSVARA;Mn;0;NSM;;;;;N;;;;;
+ 11D96;GUNJALA GONDI SIGN VISARGA;Mc;0;L;;;;;N;;;;;
+ 11D97;GUNJALA GONDI VIRAMA;Mn;9;NSM;;;;;N;;;;;
+ 11D98;GUNJALA GONDI OM;Lo;0;L;;;;;N;;;;;
+ 11DA0;GUNJALA GONDI DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 11DA1;GUNJALA GONDI DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 11DA2;GUNJALA GONDI DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 11DA3;GUNJALA GONDI DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 11DA4;GUNJALA GONDI DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 11DA5;GUNJALA GONDI DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 11DA6;GUNJALA GONDI DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 11DA7;GUNJALA GONDI DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 11DA8;GUNJALA GONDI DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 11DA9;GUNJALA GONDI DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 11EE0;MAKASAR LETTER KA;Lo;0;L;;;;;N;;;;;
+ 11EE1;MAKASAR LETTER GA;Lo;0;L;;;;;N;;;;;
+ 11EE2;MAKASAR LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 11EE3;MAKASAR LETTER PA;Lo;0;L;;;;;N;;;;;
+ 11EE4;MAKASAR LETTER BA;Lo;0;L;;;;;N;;;;;
+ 11EE5;MAKASAR LETTER MA;Lo;0;L;;;;;N;;;;;
+ 11EE6;MAKASAR LETTER TA;Lo;0;L;;;;;N;;;;;
+ 11EE7;MAKASAR LETTER DA;Lo;0;L;;;;;N;;;;;
+ 11EE8;MAKASAR LETTER NA;Lo;0;L;;;;;N;;;;;
+ 11EE9;MAKASAR LETTER CA;Lo;0;L;;;;;N;;;;;
+ 11EEA;MAKASAR LETTER JA;Lo;0;L;;;;;N;;;;;
+ 11EEB;MAKASAR LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 11EEC;MAKASAR LETTER YA;Lo;0;L;;;;;N;;;;;
+ 11EED;MAKASAR LETTER RA;Lo;0;L;;;;;N;;;;;
+ 11EEE;MAKASAR LETTER LA;Lo;0;L;;;;;N;;;;;
+ 11EEF;MAKASAR LETTER VA;Lo;0;L;;;;;N;;;;;
+ 11EF0;MAKASAR LETTER SA;Lo;0;L;;;;;N;;;;;
+ 11EF1;MAKASAR LETTER A;Lo;0;L;;;;;N;;;;;
+ 11EF2;MAKASAR ANGKA;Lo;0;L;;;;;N;;;;;
+ 11EF3;MAKASAR VOWEL SIGN I;Mn;0;NSM;;;;;N;;;;;
+ 11EF4;MAKASAR VOWEL SIGN U;Mn;0;NSM;;;;;N;;;;;
+ 11EF5;MAKASAR VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 11EF6;MAKASAR VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ 11EF7;MAKASAR PASSIMBANG;Po;0;L;;;;;N;;;;;
+ 11EF8;MAKASAR END OF SECTION;Po;0;L;;;;;N;;;;;
+ 11FC0;TAMIL FRACTION ONE THREE-HUNDRED-AND-TWENTIETH;No;0;L;;;;1/320;N;;;;;
+ 11FC1;TAMIL FRACTION ONE ONE-HUNDRED-AND-SIXTIETH;No;0;L;;;;1/160;N;;;;;
+ 11FC2;TAMIL FRACTION ONE EIGHTIETH;No;0;L;;;;1/80;N;;;;;
+ 11FC3;TAMIL FRACTION ONE SIXTY-FOURTH;No;0;L;;;;1/64;N;;;;;
+ 11FC4;TAMIL FRACTION ONE FORTIETH;No;0;L;;;;1/40;N;;;;;
+ 11FC5;TAMIL FRACTION ONE THIRTY-SECOND;No;0;L;;;;1/32;N;;;;;
+ 11FC6;TAMIL FRACTION THREE EIGHTIETHS;No;0;L;;;;3/80;N;;;;;
+ 11FC7;TAMIL FRACTION THREE SIXTY-FOURTHS;No;0;L;;;;3/64;N;;;;;
+ 11FC8;TAMIL FRACTION ONE TWENTIETH;No;0;L;;;;1/20;N;;;;;
+ 11FC9;TAMIL FRACTION ONE SIXTEENTH-1;No;0;L;;;;1/16;N;;;;;
+ 11FCA;TAMIL FRACTION ONE SIXTEENTH-2;No;0;L;;;;1/16;N;;;;;
+ 11FCB;TAMIL FRACTION ONE TENTH;No;0;L;;;;1/10;N;;;;;
+ 11FCC;TAMIL FRACTION ONE EIGHTH;No;0;L;;;;1/8;N;;;;;
+ 11FCD;TAMIL FRACTION THREE TWENTIETHS;No;0;L;;;;3/20;N;;;;;
+ 11FCE;TAMIL FRACTION THREE SIXTEENTHS;No;0;L;;;;3/16;N;;;;;
+ 11FCF;TAMIL FRACTION ONE FIFTH;No;0;L;;;;1/5;N;;;;;
+ 11FD0;TAMIL FRACTION ONE QUARTER;No;0;L;;;;1/4;N;;;;;
+ 11FD1;TAMIL FRACTION ONE HALF-1;No;0;L;;;;1/2;N;;;;;
+ 11FD2;TAMIL FRACTION ONE HALF-2;No;0;L;;;;1/2;N;;;;;
+ 11FD3;TAMIL FRACTION THREE QUARTERS;No;0;L;;;;3/4;N;;;;;
+ 11FD4;TAMIL FRACTION DOWNSCALING FACTOR KIIZH;No;0;L;;;;1/320;N;;;;;
+ 11FD5;TAMIL SIGN NEL;So;0;ON;;;;;N;;;;;
+ 11FD6;TAMIL SIGN CEVITU;So;0;ON;;;;;N;;;;;
+ 11FD7;TAMIL SIGN AAZHAAKKU;So;0;ON;;;;;N;;;;;
+ 11FD8;TAMIL SIGN UZHAKKU;So;0;ON;;;;;N;;;;;
+ 11FD9;TAMIL SIGN MUUVUZHAKKU;So;0;ON;;;;;N;;;;;
+ 11FDA;TAMIL SIGN KURUNI;So;0;ON;;;;;N;;;;;
+ 11FDB;TAMIL SIGN PATHAKKU;So;0;ON;;;;;N;;;;;
+ 11FDC;TAMIL SIGN MUKKURUNI;So;0;ON;;;;;N;;;;;
+ 11FDD;TAMIL SIGN KAACU;Sc;0;ET;;;;;N;;;;;
+ 11FDE;TAMIL SIGN PANAM;Sc;0;ET;;;;;N;;;;;
+ 11FDF;TAMIL SIGN PON;Sc;0;ET;;;;;N;;;;;
+ 11FE0;TAMIL SIGN VARAAKAN;Sc;0;ET;;;;;N;;;;;
+ 11FE1;TAMIL SIGN PAARAM;So;0;ON;;;;;N;;;;;
+ 11FE2;TAMIL SIGN KUZHI;So;0;ON;;;;;N;;;;;
+ 11FE3;TAMIL SIGN VELI;So;0;ON;;;;;N;;;;;
+ 11FE4;TAMIL WET CULTIVATION SIGN;So;0;ON;;;;;N;;;;;
+ 11FE5;TAMIL DRY CULTIVATION SIGN;So;0;ON;;;;;N;;;;;
+ 11FE6;TAMIL LAND SIGN;So;0;ON;;;;;N;;;;;
+ 11FE7;TAMIL SALT PAN SIGN;So;0;ON;;;;;N;;;;;
+ 11FE8;TAMIL TRADITIONAL CREDIT SIGN;So;0;ON;;;;;N;;;;;
+ 11FE9;TAMIL TRADITIONAL NUMBER SIGN;So;0;ON;;;;;N;;;;;
+ 11FEA;TAMIL CURRENT SIGN;So;0;ON;;;;;N;;;;;
+ 11FEB;TAMIL AND ODD SIGN;So;0;ON;;;;;N;;;;;
+ 11FEC;TAMIL SPENT SIGN;So;0;ON;;;;;N;;;;;
+ 11FED;TAMIL TOTAL SIGN;So;0;ON;;;;;N;;;;;
+ 11FEE;TAMIL IN POSSESSION SIGN;So;0;ON;;;;;N;;;;;
+ 11FEF;TAMIL STARTING FROM SIGN;So;0;ON;;;;;N;;;;;
+ 11FF0;TAMIL SIGN MUTHALIYA;So;0;ON;;;;;N;;;;;
+ 11FF1;TAMIL SIGN VAKAIYARAA;So;0;ON;;;;;N;;;;;
+ 11FFF;TAMIL PUNCTUATION END OF TEXT;Po;0;L;;;;;N;;;;;
+ 12000;CUNEIFORM SIGN A;Lo;0;L;;;;;N;;;;;
+ 12001;CUNEIFORM SIGN A TIMES A;Lo;0;L;;;;;N;;;;;
+ 12002;CUNEIFORM SIGN A TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 12003;CUNEIFORM SIGN A TIMES GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 12004;CUNEIFORM SIGN A TIMES HA;Lo;0;L;;;;;N;;;;;
+ 12005;CUNEIFORM SIGN A TIMES IGI;Lo;0;L;;;;;N;;;;;
+ 12006;CUNEIFORM SIGN A TIMES LAGAR GUNU;Lo;0;L;;;;;N;;;;;
+ 12007;CUNEIFORM SIGN A TIMES MUSH;Lo;0;L;;;;;N;;;;;
+ 12008;CUNEIFORM SIGN A TIMES SAG;Lo;0;L;;;;;N;;;;;
+ 12009;CUNEIFORM SIGN A2;Lo;0;L;;;;;N;;;;;
+ 1200A;CUNEIFORM SIGN AB;Lo;0;L;;;;;N;;;;;
+ 1200B;CUNEIFORM SIGN AB TIMES ASH2;Lo;0;L;;;;;N;;;;;
+ 1200C;CUNEIFORM SIGN AB TIMES DUN3 GUNU;Lo;0;L;;;;;N;;;;;
+ 1200D;CUNEIFORM SIGN AB TIMES GAL;Lo;0;L;;;;;N;;;;;
+ 1200E;CUNEIFORM SIGN AB TIMES GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 1200F;CUNEIFORM SIGN AB TIMES HA;Lo;0;L;;;;;N;;;;;
+ 12010;CUNEIFORM SIGN AB TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 12011;CUNEIFORM SIGN AB TIMES IMIN;Lo;0;L;;;;;N;;;;;
+ 12012;CUNEIFORM SIGN AB TIMES LAGAB;Lo;0;L;;;;;N;;;;;
+ 12013;CUNEIFORM SIGN AB TIMES SHESH;Lo;0;L;;;;;N;;;;;
+ 12014;CUNEIFORM SIGN AB TIMES U PLUS U PLUS U;Lo;0;L;;;;;N;;;;;
+ 12015;CUNEIFORM SIGN AB GUNU;Lo;0;L;;;;;N;;;;;
+ 12016;CUNEIFORM SIGN AB2;Lo;0;L;;;;;N;;;;;
+ 12017;CUNEIFORM SIGN AB2 TIMES BALAG;Lo;0;L;;;;;N;;;;;
+ 12018;CUNEIFORM SIGN AB2 TIMES GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 12019;CUNEIFORM SIGN AB2 TIMES ME PLUS EN;Lo;0;L;;;;;N;;;;;
+ 1201A;CUNEIFORM SIGN AB2 TIMES SHA3;Lo;0;L;;;;;N;;;;;
+ 1201B;CUNEIFORM SIGN AB2 TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 1201C;CUNEIFORM SIGN AD;Lo;0;L;;;;;N;;;;;
+ 1201D;CUNEIFORM SIGN AK;Lo;0;L;;;;;N;;;;;
+ 1201E;CUNEIFORM SIGN AK TIMES ERIN2;Lo;0;L;;;;;N;;;;;
+ 1201F;CUNEIFORM SIGN AK TIMES SHITA PLUS GISH;Lo;0;L;;;;;N;;;;;
+ 12020;CUNEIFORM SIGN AL;Lo;0;L;;;;;N;;;;;
+ 12021;CUNEIFORM SIGN AL TIMES AL;Lo;0;L;;;;;N;;;;;
+ 12022;CUNEIFORM SIGN AL TIMES DIM2;Lo;0;L;;;;;N;;;;;
+ 12023;CUNEIFORM SIGN AL TIMES GISH;Lo;0;L;;;;;N;;;;;
+ 12024;CUNEIFORM SIGN AL TIMES HA;Lo;0;L;;;;;N;;;;;
+ 12025;CUNEIFORM SIGN AL TIMES KAD3;Lo;0;L;;;;;N;;;;;
+ 12026;CUNEIFORM SIGN AL TIMES KI;Lo;0;L;;;;;N;;;;;
+ 12027;CUNEIFORM SIGN AL TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 12028;CUNEIFORM SIGN AL TIMES USH;Lo;0;L;;;;;N;;;;;
+ 12029;CUNEIFORM SIGN ALAN;Lo;0;L;;;;;N;;;;;
+ 1202A;CUNEIFORM SIGN ALEPH;Lo;0;L;;;;;N;;;;;
+ 1202B;CUNEIFORM SIGN AMAR;Lo;0;L;;;;;N;;;;;
+ 1202C;CUNEIFORM SIGN AMAR TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 1202D;CUNEIFORM SIGN AN;Lo;0;L;;;;;N;;;;;
+ 1202E;CUNEIFORM SIGN AN OVER AN;Lo;0;L;;;;;N;;;;;
+ 1202F;CUNEIFORM SIGN AN THREE TIMES;Lo;0;L;;;;;N;;;;;
+ 12030;CUNEIFORM SIGN AN PLUS NAGA OPPOSING AN PLUS NAGA;Lo;0;L;;;;;N;;;;;
+ 12031;CUNEIFORM SIGN AN PLUS NAGA SQUARED;Lo;0;L;;;;;N;;;;;
+ 12032;CUNEIFORM SIGN ANSHE;Lo;0;L;;;;;N;;;;;
+ 12033;CUNEIFORM SIGN APIN;Lo;0;L;;;;;N;;;;;
+ 12034;CUNEIFORM SIGN ARAD;Lo;0;L;;;;;N;;;;;
+ 12035;CUNEIFORM SIGN ARAD TIMES KUR;Lo;0;L;;;;;N;;;;;
+ 12036;CUNEIFORM SIGN ARKAB;Lo;0;L;;;;;N;;;;;
+ 12037;CUNEIFORM SIGN ASAL2;Lo;0;L;;;;;N;;;;;
+ 12038;CUNEIFORM SIGN ASH;Lo;0;L;;;;;N;;;;;
+ 12039;CUNEIFORM SIGN ASH ZIDA TENU;Lo;0;L;;;;;N;;;;;
+ 1203A;CUNEIFORM SIGN ASH KABA TENU;Lo;0;L;;;;;N;;;;;
+ 1203B;CUNEIFORM SIGN ASH OVER ASH TUG2 OVER TUG2 TUG2 OVER TUG2 PAP;Lo;0;L;;;;;N;;;;;
+ 1203C;CUNEIFORM SIGN ASH OVER ASH OVER ASH;Lo;0;L;;;;;N;;;;;
+ 1203D;CUNEIFORM SIGN ASH OVER ASH OVER ASH CROSSING ASH OVER ASH OVER ASH;Lo;0;L;;;;;N;;;;;
+ 1203E;CUNEIFORM SIGN ASH2;Lo;0;L;;;;;N;;;;;
+ 1203F;CUNEIFORM SIGN ASHGAB;Lo;0;L;;;;;N;;;;;
+ 12040;CUNEIFORM SIGN BA;Lo;0;L;;;;;N;;;;;
+ 12041;CUNEIFORM SIGN BAD;Lo;0;L;;;;;N;;;;;
+ 12042;CUNEIFORM SIGN BAG3;Lo;0;L;;;;;N;;;;;
+ 12043;CUNEIFORM SIGN BAHAR2;Lo;0;L;;;;;N;;;;;
+ 12044;CUNEIFORM SIGN BAL;Lo;0;L;;;;;N;;;;;
+ 12045;CUNEIFORM SIGN BAL OVER BAL;Lo;0;L;;;;;N;;;;;
+ 12046;CUNEIFORM SIGN BALAG;Lo;0;L;;;;;N;;;;;
+ 12047;CUNEIFORM SIGN BAR;Lo;0;L;;;;;N;;;;;
+ 12048;CUNEIFORM SIGN BARA2;Lo;0;L;;;;;N;;;;;
+ 12049;CUNEIFORM SIGN BI;Lo;0;L;;;;;N;;;;;
+ 1204A;CUNEIFORM SIGN BI TIMES A;Lo;0;L;;;;;N;;;;;
+ 1204B;CUNEIFORM SIGN BI TIMES GAR;Lo;0;L;;;;;N;;;;;
+ 1204C;CUNEIFORM SIGN BI TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 1204D;CUNEIFORM SIGN BU;Lo;0;L;;;;;N;;;;;
+ 1204E;CUNEIFORM SIGN BU OVER BU AB;Lo;0;L;;;;;N;;;;;
+ 1204F;CUNEIFORM SIGN BU OVER BU UN;Lo;0;L;;;;;N;;;;;
+ 12050;CUNEIFORM SIGN BU CROSSING BU;Lo;0;L;;;;;N;;;;;
+ 12051;CUNEIFORM SIGN BULUG;Lo;0;L;;;;;N;;;;;
+ 12052;CUNEIFORM SIGN BULUG OVER BULUG;Lo;0;L;;;;;N;;;;;
+ 12053;CUNEIFORM SIGN BUR;Lo;0;L;;;;;N;;;;;
+ 12054;CUNEIFORM SIGN BUR2;Lo;0;L;;;;;N;;;;;
+ 12055;CUNEIFORM SIGN DA;Lo;0;L;;;;;N;;;;;
+ 12056;CUNEIFORM SIGN DAG;Lo;0;L;;;;;N;;;;;
+ 12057;CUNEIFORM SIGN DAG KISIM5 TIMES A PLUS MASH;Lo;0;L;;;;;N;;;;;
+ 12058;CUNEIFORM SIGN DAG KISIM5 TIMES AMAR;Lo;0;L;;;;;N;;;;;
+ 12059;CUNEIFORM SIGN DAG KISIM5 TIMES BALAG;Lo;0;L;;;;;N;;;;;
+ 1205A;CUNEIFORM SIGN DAG KISIM5 TIMES BI;Lo;0;L;;;;;N;;;;;
+ 1205B;CUNEIFORM SIGN DAG KISIM5 TIMES GA;Lo;0;L;;;;;N;;;;;
+ 1205C;CUNEIFORM SIGN DAG KISIM5 TIMES GA PLUS MASH;Lo;0;L;;;;;N;;;;;
+ 1205D;CUNEIFORM SIGN DAG KISIM5 TIMES GI;Lo;0;L;;;;;N;;;;;
+ 1205E;CUNEIFORM SIGN DAG KISIM5 TIMES GIR2;Lo;0;L;;;;;N;;;;;
+ 1205F;CUNEIFORM SIGN DAG KISIM5 TIMES GUD;Lo;0;L;;;;;N;;;;;
+ 12060;CUNEIFORM SIGN DAG KISIM5 TIMES HA;Lo;0;L;;;;;N;;;;;
+ 12061;CUNEIFORM SIGN DAG KISIM5 TIMES IR;Lo;0;L;;;;;N;;;;;
+ 12062;CUNEIFORM SIGN DAG KISIM5 TIMES IR PLUS LU;Lo;0;L;;;;;N;;;;;
+ 12063;CUNEIFORM SIGN DAG KISIM5 TIMES KAK;Lo;0;L;;;;;N;;;;;
+ 12064;CUNEIFORM SIGN DAG KISIM5 TIMES LA;Lo;0;L;;;;;N;;;;;
+ 12065;CUNEIFORM SIGN DAG KISIM5 TIMES LU;Lo;0;L;;;;;N;;;;;
+ 12066;CUNEIFORM SIGN DAG KISIM5 TIMES LU PLUS MASH2;Lo;0;L;;;;;N;;;;;
+ 12067;CUNEIFORM SIGN DAG KISIM5 TIMES LUM;Lo;0;L;;;;;N;;;;;
+ 12068;CUNEIFORM SIGN DAG KISIM5 TIMES NE;Lo;0;L;;;;;N;;;;;
+ 12069;CUNEIFORM SIGN DAG KISIM5 TIMES PAP PLUS PAP;Lo;0;L;;;;;N;;;;;
+ 1206A;CUNEIFORM SIGN DAG KISIM5 TIMES SI;Lo;0;L;;;;;N;;;;;
+ 1206B;CUNEIFORM SIGN DAG KISIM5 TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 1206C;CUNEIFORM SIGN DAG KISIM5 TIMES U2 PLUS GIR2;Lo;0;L;;;;;N;;;;;
+ 1206D;CUNEIFORM SIGN DAG KISIM5 TIMES USH;Lo;0;L;;;;;N;;;;;
+ 1206E;CUNEIFORM SIGN DAM;Lo;0;L;;;;;N;;;;;
+ 1206F;CUNEIFORM SIGN DAR;Lo;0;L;;;;;N;;;;;
+ 12070;CUNEIFORM SIGN DARA3;Lo;0;L;;;;;N;;;;;
+ 12071;CUNEIFORM SIGN DARA4;Lo;0;L;;;;;N;;;;;
+ 12072;CUNEIFORM SIGN DI;Lo;0;L;;;;;N;;;;;
+ 12073;CUNEIFORM SIGN DIB;Lo;0;L;;;;;N;;;;;
+ 12074;CUNEIFORM SIGN DIM;Lo;0;L;;;;;N;;;;;
+ 12075;CUNEIFORM SIGN DIM TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 12076;CUNEIFORM SIGN DIM2;Lo;0;L;;;;;N;;;;;
+ 12077;CUNEIFORM SIGN DIN;Lo;0;L;;;;;N;;;;;
+ 12078;CUNEIFORM SIGN DIN KASKAL U GUNU DISH;Lo;0;L;;;;;N;;;;;
+ 12079;CUNEIFORM SIGN DISH;Lo;0;L;;;;;N;;;;;
+ 1207A;CUNEIFORM SIGN DU;Lo;0;L;;;;;N;;;;;
+ 1207B;CUNEIFORM SIGN DU OVER DU;Lo;0;L;;;;;N;;;;;
+ 1207C;CUNEIFORM SIGN DU GUNU;Lo;0;L;;;;;N;;;;;
+ 1207D;CUNEIFORM SIGN DU SHESHIG;Lo;0;L;;;;;N;;;;;
+ 1207E;CUNEIFORM SIGN DUB;Lo;0;L;;;;;N;;;;;
+ 1207F;CUNEIFORM SIGN DUB TIMES ESH2;Lo;0;L;;;;;N;;;;;
+ 12080;CUNEIFORM SIGN DUB2;Lo;0;L;;;;;N;;;;;
+ 12081;CUNEIFORM SIGN DUG;Lo;0;L;;;;;N;;;;;
+ 12082;CUNEIFORM SIGN DUGUD;Lo;0;L;;;;;N;;;;;
+ 12083;CUNEIFORM SIGN DUH;Lo;0;L;;;;;N;;;;;
+ 12084;CUNEIFORM SIGN DUN;Lo;0;L;;;;;N;;;;;
+ 12085;CUNEIFORM SIGN DUN3;Lo;0;L;;;;;N;;;;;
+ 12086;CUNEIFORM SIGN DUN3 GUNU;Lo;0;L;;;;;N;;;;;
+ 12087;CUNEIFORM SIGN DUN3 GUNU GUNU;Lo;0;L;;;;;N;;;;;
+ 12088;CUNEIFORM SIGN DUN4;Lo;0;L;;;;;N;;;;;
+ 12089;CUNEIFORM SIGN DUR2;Lo;0;L;;;;;N;;;;;
+ 1208A;CUNEIFORM SIGN E;Lo;0;L;;;;;N;;;;;
+ 1208B;CUNEIFORM SIGN E TIMES PAP;Lo;0;L;;;;;N;;;;;
+ 1208C;CUNEIFORM SIGN E OVER E NUN OVER NUN;Lo;0;L;;;;;N;;;;;
+ 1208D;CUNEIFORM SIGN E2;Lo;0;L;;;;;N;;;;;
+ 1208E;CUNEIFORM SIGN E2 TIMES A PLUS HA PLUS DA;Lo;0;L;;;;;N;;;;;
+ 1208F;CUNEIFORM SIGN E2 TIMES GAR;Lo;0;L;;;;;N;;;;;
+ 12090;CUNEIFORM SIGN E2 TIMES MI;Lo;0;L;;;;;N;;;;;
+ 12091;CUNEIFORM SIGN E2 TIMES SAL;Lo;0;L;;;;;N;;;;;
+ 12092;CUNEIFORM SIGN E2 TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 12093;CUNEIFORM SIGN E2 TIMES U;Lo;0;L;;;;;N;;;;;
+ 12094;CUNEIFORM SIGN EDIN;Lo;0;L;;;;;N;;;;;
+ 12095;CUNEIFORM SIGN EGIR;Lo;0;L;;;;;N;;;;;
+ 12096;CUNEIFORM SIGN EL;Lo;0;L;;;;;N;;;;;
+ 12097;CUNEIFORM SIGN EN;Lo;0;L;;;;;N;;;;;
+ 12098;CUNEIFORM SIGN EN TIMES GAN2;Lo;0;L;;;;;N;;;;;
+ 12099;CUNEIFORM SIGN EN TIMES GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 1209A;CUNEIFORM SIGN EN TIMES ME;Lo;0;L;;;;;N;;;;;
+ 1209B;CUNEIFORM SIGN EN CROSSING EN;Lo;0;L;;;;;N;;;;;
+ 1209C;CUNEIFORM SIGN EN OPPOSING EN;Lo;0;L;;;;;N;;;;;
+ 1209D;CUNEIFORM SIGN EN SQUARED;Lo;0;L;;;;;N;;;;;
+ 1209E;CUNEIFORM SIGN EREN;Lo;0;L;;;;;N;;;;;
+ 1209F;CUNEIFORM SIGN ERIN2;Lo;0;L;;;;;N;;;;;
+ 120A0;CUNEIFORM SIGN ESH2;Lo;0;L;;;;;N;;;;;
+ 120A1;CUNEIFORM SIGN EZEN;Lo;0;L;;;;;N;;;;;
+ 120A2;CUNEIFORM SIGN EZEN TIMES A;Lo;0;L;;;;;N;;;;;
+ 120A3;CUNEIFORM SIGN EZEN TIMES A PLUS LAL;Lo;0;L;;;;;N;;;;;
+ 120A4;CUNEIFORM SIGN EZEN TIMES A PLUS LAL TIMES LAL;Lo;0;L;;;;;N;;;;;
+ 120A5;CUNEIFORM SIGN EZEN TIMES AN;Lo;0;L;;;;;N;;;;;
+ 120A6;CUNEIFORM SIGN EZEN TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 120A7;CUNEIFORM SIGN EZEN TIMES DUN3 GUNU;Lo;0;L;;;;;N;;;;;
+ 120A8;CUNEIFORM SIGN EZEN TIMES DUN3 GUNU GUNU;Lo;0;L;;;;;N;;;;;
+ 120A9;CUNEIFORM SIGN EZEN TIMES HA;Lo;0;L;;;;;N;;;;;
+ 120AA;CUNEIFORM SIGN EZEN TIMES HA GUNU;Lo;0;L;;;;;N;;;;;
+ 120AB;CUNEIFORM SIGN EZEN TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 120AC;CUNEIFORM SIGN EZEN TIMES KASKAL;Lo;0;L;;;;;N;;;;;
+ 120AD;CUNEIFORM SIGN EZEN TIMES KASKAL SQUARED;Lo;0;L;;;;;N;;;;;
+ 120AE;CUNEIFORM SIGN EZEN TIMES KU3;Lo;0;L;;;;;N;;;;;
+ 120AF;CUNEIFORM SIGN EZEN TIMES LA;Lo;0;L;;;;;N;;;;;
+ 120B0;CUNEIFORM SIGN EZEN TIMES LAL TIMES LAL;Lo;0;L;;;;;N;;;;;
+ 120B1;CUNEIFORM SIGN EZEN TIMES LI;Lo;0;L;;;;;N;;;;;
+ 120B2;CUNEIFORM SIGN EZEN TIMES LU;Lo;0;L;;;;;N;;;;;
+ 120B3;CUNEIFORM SIGN EZEN TIMES U2;Lo;0;L;;;;;N;;;;;
+ 120B4;CUNEIFORM SIGN EZEN TIMES UD;Lo;0;L;;;;;N;;;;;
+ 120B5;CUNEIFORM SIGN GA;Lo;0;L;;;;;N;;;;;
+ 120B6;CUNEIFORM SIGN GA GUNU;Lo;0;L;;;;;N;;;;;
+ 120B7;CUNEIFORM SIGN GA2;Lo;0;L;;;;;N;;;;;
+ 120B8;CUNEIFORM SIGN GA2 TIMES A PLUS DA PLUS HA;Lo;0;L;;;;;N;;;;;
+ 120B9;CUNEIFORM SIGN GA2 TIMES A PLUS HA;Lo;0;L;;;;;N;;;;;
+ 120BA;CUNEIFORM SIGN GA2 TIMES A PLUS IGI;Lo;0;L;;;;;N;;;;;
+ 120BB;CUNEIFORM SIGN GA2 TIMES AB2 TENU PLUS TAB;Lo;0;L;;;;;N;;;;;
+ 120BC;CUNEIFORM SIGN GA2 TIMES AN;Lo;0;L;;;;;N;;;;;
+ 120BD;CUNEIFORM SIGN GA2 TIMES ASH;Lo;0;L;;;;;N;;;;;
+ 120BE;CUNEIFORM SIGN GA2 TIMES ASH2 PLUS GAL;Lo;0;L;;;;;N;;;;;
+ 120BF;CUNEIFORM SIGN GA2 TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 120C0;CUNEIFORM SIGN GA2 TIMES BAR PLUS RA;Lo;0;L;;;;;N;;;;;
+ 120C1;CUNEIFORM SIGN GA2 TIMES BUR;Lo;0;L;;;;;N;;;;;
+ 120C2;CUNEIFORM SIGN GA2 TIMES BUR PLUS RA;Lo;0;L;;;;;N;;;;;
+ 120C3;CUNEIFORM SIGN GA2 TIMES DA;Lo;0;L;;;;;N;;;;;
+ 120C4;CUNEIFORM SIGN GA2 TIMES DI;Lo;0;L;;;;;N;;;;;
+ 120C5;CUNEIFORM SIGN GA2 TIMES DIM TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 120C6;CUNEIFORM SIGN GA2 TIMES DUB;Lo;0;L;;;;;N;;;;;
+ 120C7;CUNEIFORM SIGN GA2 TIMES EL;Lo;0;L;;;;;N;;;;;
+ 120C8;CUNEIFORM SIGN GA2 TIMES EL PLUS LA;Lo;0;L;;;;;N;;;;;
+ 120C9;CUNEIFORM SIGN GA2 TIMES EN;Lo;0;L;;;;;N;;;;;
+ 120CA;CUNEIFORM SIGN GA2 TIMES EN TIMES GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 120CB;CUNEIFORM SIGN GA2 TIMES GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 120CC;CUNEIFORM SIGN GA2 TIMES GAR;Lo;0;L;;;;;N;;;;;
+ 120CD;CUNEIFORM SIGN GA2 TIMES GI;Lo;0;L;;;;;N;;;;;
+ 120CE;CUNEIFORM SIGN GA2 TIMES GI4;Lo;0;L;;;;;N;;;;;
+ 120CF;CUNEIFORM SIGN GA2 TIMES GI4 PLUS A;Lo;0;L;;;;;N;;;;;
+ 120D0;CUNEIFORM SIGN GA2 TIMES GIR2 PLUS SU;Lo;0;L;;;;;N;;;;;
+ 120D1;CUNEIFORM SIGN GA2 TIMES HA PLUS LU PLUS ESH2;Lo;0;L;;;;;N;;;;;
+ 120D2;CUNEIFORM SIGN GA2 TIMES HAL;Lo;0;L;;;;;N;;;;;
+ 120D3;CUNEIFORM SIGN GA2 TIMES HAL PLUS LA;Lo;0;L;;;;;N;;;;;
+ 120D4;CUNEIFORM SIGN GA2 TIMES HI PLUS LI;Lo;0;L;;;;;N;;;;;
+ 120D5;CUNEIFORM SIGN GA2 TIMES HUB2;Lo;0;L;;;;;N;;;;;
+ 120D6;CUNEIFORM SIGN GA2 TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 120D7;CUNEIFORM SIGN GA2 TIMES ISH PLUS HU PLUS ASH;Lo;0;L;;;;;N;;;;;
+ 120D8;CUNEIFORM SIGN GA2 TIMES KAK;Lo;0;L;;;;;N;;;;;
+ 120D9;CUNEIFORM SIGN GA2 TIMES KASKAL;Lo;0;L;;;;;N;;;;;
+ 120DA;CUNEIFORM SIGN GA2 TIMES KID;Lo;0;L;;;;;N;;;;;
+ 120DB;CUNEIFORM SIGN GA2 TIMES KID PLUS LAL;Lo;0;L;;;;;N;;;;;
+ 120DC;CUNEIFORM SIGN GA2 TIMES KU3 PLUS AN;Lo;0;L;;;;;N;;;;;
+ 120DD;CUNEIFORM SIGN GA2 TIMES LA;Lo;0;L;;;;;N;;;;;
+ 120DE;CUNEIFORM SIGN GA2 TIMES ME PLUS EN;Lo;0;L;;;;;N;;;;;
+ 120DF;CUNEIFORM SIGN GA2 TIMES MI;Lo;0;L;;;;;N;;;;;
+ 120E0;CUNEIFORM SIGN GA2 TIMES NUN;Lo;0;L;;;;;N;;;;;
+ 120E1;CUNEIFORM SIGN GA2 TIMES NUN OVER NUN;Lo;0;L;;;;;N;;;;;
+ 120E2;CUNEIFORM SIGN GA2 TIMES PA;Lo;0;L;;;;;N;;;;;
+ 120E3;CUNEIFORM SIGN GA2 TIMES SAL;Lo;0;L;;;;;N;;;;;
+ 120E4;CUNEIFORM SIGN GA2 TIMES SAR;Lo;0;L;;;;;N;;;;;
+ 120E5;CUNEIFORM SIGN GA2 TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 120E6;CUNEIFORM SIGN GA2 TIMES SHE PLUS TUR;Lo;0;L;;;;;N;;;;;
+ 120E7;CUNEIFORM SIGN GA2 TIMES SHID;Lo;0;L;;;;;N;;;;;
+ 120E8;CUNEIFORM SIGN GA2 TIMES SUM;Lo;0;L;;;;;N;;;;;
+ 120E9;CUNEIFORM SIGN GA2 TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 120EA;CUNEIFORM SIGN GA2 TIMES U;Lo;0;L;;;;;N;;;;;
+ 120EB;CUNEIFORM SIGN GA2 TIMES UD;Lo;0;L;;;;;N;;;;;
+ 120EC;CUNEIFORM SIGN GA2 TIMES UD PLUS DU;Lo;0;L;;;;;N;;;;;
+ 120ED;CUNEIFORM SIGN GA2 OVER GA2;Lo;0;L;;;;;N;;;;;
+ 120EE;CUNEIFORM SIGN GABA;Lo;0;L;;;;;N;;;;;
+ 120EF;CUNEIFORM SIGN GABA CROSSING GABA;Lo;0;L;;;;;N;;;;;
+ 120F0;CUNEIFORM SIGN GAD;Lo;0;L;;;;;N;;;;;
+ 120F1;CUNEIFORM SIGN GAD OVER GAD GAR OVER GAR;Lo;0;L;;;;;N;;;;;
+ 120F2;CUNEIFORM SIGN GAL;Lo;0;L;;;;;N;;;;;
+ 120F3;CUNEIFORM SIGN GAL GAD OVER GAD GAR OVER GAR;Lo;0;L;;;;;N;;;;;
+ 120F4;CUNEIFORM SIGN GALAM;Lo;0;L;;;;;N;;;;;
+ 120F5;CUNEIFORM SIGN GAM;Lo;0;L;;;;;N;;;;;
+ 120F6;CUNEIFORM SIGN GAN;Lo;0;L;;;;;N;;;;;
+ 120F7;CUNEIFORM SIGN GAN2;Lo;0;L;;;;;N;;;;;
+ 120F8;CUNEIFORM SIGN GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 120F9;CUNEIFORM SIGN GAN2 OVER GAN2;Lo;0;L;;;;;N;;;;;
+ 120FA;CUNEIFORM SIGN GAN2 CROSSING GAN2;Lo;0;L;;;;;N;;;;;
+ 120FB;CUNEIFORM SIGN GAR;Lo;0;L;;;;;N;;;;;
+ 120FC;CUNEIFORM SIGN GAR3;Lo;0;L;;;;;N;;;;;
+ 120FD;CUNEIFORM SIGN GASHAN;Lo;0;L;;;;;N;;;;;
+ 120FE;CUNEIFORM SIGN GESHTIN;Lo;0;L;;;;;N;;;;;
+ 120FF;CUNEIFORM SIGN GESHTIN TIMES KUR;Lo;0;L;;;;;N;;;;;
+ 12100;CUNEIFORM SIGN GI;Lo;0;L;;;;;N;;;;;
+ 12101;CUNEIFORM SIGN GI TIMES E;Lo;0;L;;;;;N;;;;;
+ 12102;CUNEIFORM SIGN GI TIMES U;Lo;0;L;;;;;N;;;;;
+ 12103;CUNEIFORM SIGN GI CROSSING GI;Lo;0;L;;;;;N;;;;;
+ 12104;CUNEIFORM SIGN GI4;Lo;0;L;;;;;N;;;;;
+ 12105;CUNEIFORM SIGN GI4 OVER GI4;Lo;0;L;;;;;N;;;;;
+ 12106;CUNEIFORM SIGN GI4 CROSSING GI4;Lo;0;L;;;;;N;;;;;
+ 12107;CUNEIFORM SIGN GIDIM;Lo;0;L;;;;;N;;;;;
+ 12108;CUNEIFORM SIGN GIR2;Lo;0;L;;;;;N;;;;;
+ 12109;CUNEIFORM SIGN GIR2 GUNU;Lo;0;L;;;;;N;;;;;
+ 1210A;CUNEIFORM SIGN GIR3;Lo;0;L;;;;;N;;;;;
+ 1210B;CUNEIFORM SIGN GIR3 TIMES A PLUS IGI;Lo;0;L;;;;;N;;;;;
+ 1210C;CUNEIFORM SIGN GIR3 TIMES GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 1210D;CUNEIFORM SIGN GIR3 TIMES IGI;Lo;0;L;;;;;N;;;;;
+ 1210E;CUNEIFORM SIGN GIR3 TIMES LU PLUS IGI;Lo;0;L;;;;;N;;;;;
+ 1210F;CUNEIFORM SIGN GIR3 TIMES PA;Lo;0;L;;;;;N;;;;;
+ 12110;CUNEIFORM SIGN GISAL;Lo;0;L;;;;;N;;;;;
+ 12111;CUNEIFORM SIGN GISH;Lo;0;L;;;;;N;;;;;
+ 12112;CUNEIFORM SIGN GISH CROSSING GISH;Lo;0;L;;;;;N;;;;;
+ 12113;CUNEIFORM SIGN GISH TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 12114;CUNEIFORM SIGN GISH TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 12115;CUNEIFORM SIGN GISH TENU;Lo;0;L;;;;;N;;;;;
+ 12116;CUNEIFORM SIGN GU;Lo;0;L;;;;;N;;;;;
+ 12117;CUNEIFORM SIGN GU CROSSING GU;Lo;0;L;;;;;N;;;;;
+ 12118;CUNEIFORM SIGN GU2;Lo;0;L;;;;;N;;;;;
+ 12119;CUNEIFORM SIGN GU2 TIMES KAK;Lo;0;L;;;;;N;;;;;
+ 1211A;CUNEIFORM SIGN GU2 TIMES KAK TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 1211B;CUNEIFORM SIGN GU2 TIMES NUN;Lo;0;L;;;;;N;;;;;
+ 1211C;CUNEIFORM SIGN GU2 TIMES SAL PLUS TUG2;Lo;0;L;;;;;N;;;;;
+ 1211D;CUNEIFORM SIGN GU2 GUNU;Lo;0;L;;;;;N;;;;;
+ 1211E;CUNEIFORM SIGN GUD;Lo;0;L;;;;;N;;;;;
+ 1211F;CUNEIFORM SIGN GUD TIMES A PLUS KUR;Lo;0;L;;;;;N;;;;;
+ 12120;CUNEIFORM SIGN GUD TIMES KUR;Lo;0;L;;;;;N;;;;;
+ 12121;CUNEIFORM SIGN GUD OVER GUD LUGAL;Lo;0;L;;;;;N;;;;;
+ 12122;CUNEIFORM SIGN GUL;Lo;0;L;;;;;N;;;;;
+ 12123;CUNEIFORM SIGN GUM;Lo;0;L;;;;;N;;;;;
+ 12124;CUNEIFORM SIGN GUM TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 12125;CUNEIFORM SIGN GUR;Lo;0;L;;;;;N;;;;;
+ 12126;CUNEIFORM SIGN GUR7;Lo;0;L;;;;;N;;;;;
+ 12127;CUNEIFORM SIGN GURUN;Lo;0;L;;;;;N;;;;;
+ 12128;CUNEIFORM SIGN GURUSH;Lo;0;L;;;;;N;;;;;
+ 12129;CUNEIFORM SIGN HA;Lo;0;L;;;;;N;;;;;
+ 1212A;CUNEIFORM SIGN HA TENU;Lo;0;L;;;;;N;;;;;
+ 1212B;CUNEIFORM SIGN HA GUNU;Lo;0;L;;;;;N;;;;;
+ 1212C;CUNEIFORM SIGN HAL;Lo;0;L;;;;;N;;;;;
+ 1212D;CUNEIFORM SIGN HI;Lo;0;L;;;;;N;;;;;
+ 1212E;CUNEIFORM SIGN HI TIMES ASH;Lo;0;L;;;;;N;;;;;
+ 1212F;CUNEIFORM SIGN HI TIMES ASH2;Lo;0;L;;;;;N;;;;;
+ 12130;CUNEIFORM SIGN HI TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 12131;CUNEIFORM SIGN HI TIMES DISH;Lo;0;L;;;;;N;;;;;
+ 12132;CUNEIFORM SIGN HI TIMES GAD;Lo;0;L;;;;;N;;;;;
+ 12133;CUNEIFORM SIGN HI TIMES KIN;Lo;0;L;;;;;N;;;;;
+ 12134;CUNEIFORM SIGN HI TIMES NUN;Lo;0;L;;;;;N;;;;;
+ 12135;CUNEIFORM SIGN HI TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 12136;CUNEIFORM SIGN HI TIMES U;Lo;0;L;;;;;N;;;;;
+ 12137;CUNEIFORM SIGN HU;Lo;0;L;;;;;N;;;;;
+ 12138;CUNEIFORM SIGN HUB2;Lo;0;L;;;;;N;;;;;
+ 12139;CUNEIFORM SIGN HUB2 TIMES AN;Lo;0;L;;;;;N;;;;;
+ 1213A;CUNEIFORM SIGN HUB2 TIMES HAL;Lo;0;L;;;;;N;;;;;
+ 1213B;CUNEIFORM SIGN HUB2 TIMES KASKAL;Lo;0;L;;;;;N;;;;;
+ 1213C;CUNEIFORM SIGN HUB2 TIMES LISH;Lo;0;L;;;;;N;;;;;
+ 1213D;CUNEIFORM SIGN HUB2 TIMES UD;Lo;0;L;;;;;N;;;;;
+ 1213E;CUNEIFORM SIGN HUL2;Lo;0;L;;;;;N;;;;;
+ 1213F;CUNEIFORM SIGN I;Lo;0;L;;;;;N;;;;;
+ 12140;CUNEIFORM SIGN I A;Lo;0;L;;;;;N;;;;;
+ 12141;CUNEIFORM SIGN IB;Lo;0;L;;;;;N;;;;;
+ 12142;CUNEIFORM SIGN IDIM;Lo;0;L;;;;;N;;;;;
+ 12143;CUNEIFORM SIGN IDIM OVER IDIM BUR;Lo;0;L;;;;;N;;;;;
+ 12144;CUNEIFORM SIGN IDIM OVER IDIM SQUARED;Lo;0;L;;;;;N;;;;;
+ 12145;CUNEIFORM SIGN IG;Lo;0;L;;;;;N;;;;;
+ 12146;CUNEIFORM SIGN IGI;Lo;0;L;;;;;N;;;;;
+ 12147;CUNEIFORM SIGN IGI DIB;Lo;0;L;;;;;N;;;;;
+ 12148;CUNEIFORM SIGN IGI RI;Lo;0;L;;;;;N;;;;;
+ 12149;CUNEIFORM SIGN IGI OVER IGI SHIR OVER SHIR UD OVER UD;Lo;0;L;;;;;N;;;;;
+ 1214A;CUNEIFORM SIGN IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 1214B;CUNEIFORM SIGN IL;Lo;0;L;;;;;N;;;;;
+ 1214C;CUNEIFORM SIGN IL TIMES GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 1214D;CUNEIFORM SIGN IL2;Lo;0;L;;;;;N;;;;;
+ 1214E;CUNEIFORM SIGN IM;Lo;0;L;;;;;N;;;;;
+ 1214F;CUNEIFORM SIGN IM TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 12150;CUNEIFORM SIGN IM CROSSING IM;Lo;0;L;;;;;N;;;;;
+ 12151;CUNEIFORM SIGN IM OPPOSING IM;Lo;0;L;;;;;N;;;;;
+ 12152;CUNEIFORM SIGN IM SQUARED;Lo;0;L;;;;;N;;;;;
+ 12153;CUNEIFORM SIGN IMIN;Lo;0;L;;;;;N;;;;;
+ 12154;CUNEIFORM SIGN IN;Lo;0;L;;;;;N;;;;;
+ 12155;CUNEIFORM SIGN IR;Lo;0;L;;;;;N;;;;;
+ 12156;CUNEIFORM SIGN ISH;Lo;0;L;;;;;N;;;;;
+ 12157;CUNEIFORM SIGN KA;Lo;0;L;;;;;N;;;;;
+ 12158;CUNEIFORM SIGN KA TIMES A;Lo;0;L;;;;;N;;;;;
+ 12159;CUNEIFORM SIGN KA TIMES AD;Lo;0;L;;;;;N;;;;;
+ 1215A;CUNEIFORM SIGN KA TIMES AD PLUS KU3;Lo;0;L;;;;;N;;;;;
+ 1215B;CUNEIFORM SIGN KA TIMES ASH2;Lo;0;L;;;;;N;;;;;
+ 1215C;CUNEIFORM SIGN KA TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 1215D;CUNEIFORM SIGN KA TIMES BALAG;Lo;0;L;;;;;N;;;;;
+ 1215E;CUNEIFORM SIGN KA TIMES BAR;Lo;0;L;;;;;N;;;;;
+ 1215F;CUNEIFORM SIGN KA TIMES BI;Lo;0;L;;;;;N;;;;;
+ 12160;CUNEIFORM SIGN KA TIMES ERIN2;Lo;0;L;;;;;N;;;;;
+ 12161;CUNEIFORM SIGN KA TIMES ESH2;Lo;0;L;;;;;N;;;;;
+ 12162;CUNEIFORM SIGN KA TIMES GA;Lo;0;L;;;;;N;;;;;
+ 12163;CUNEIFORM SIGN KA TIMES GAL;Lo;0;L;;;;;N;;;;;
+ 12164;CUNEIFORM SIGN KA TIMES GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 12165;CUNEIFORM SIGN KA TIMES GAR;Lo;0;L;;;;;N;;;;;
+ 12166;CUNEIFORM SIGN KA TIMES GAR PLUS SHA3 PLUS A;Lo;0;L;;;;;N;;;;;
+ 12167;CUNEIFORM SIGN KA TIMES GI;Lo;0;L;;;;;N;;;;;
+ 12168;CUNEIFORM SIGN KA TIMES GIR2;Lo;0;L;;;;;N;;;;;
+ 12169;CUNEIFORM SIGN KA TIMES GISH PLUS SAR;Lo;0;L;;;;;N;;;;;
+ 1216A;CUNEIFORM SIGN KA TIMES GISH CROSSING GISH;Lo;0;L;;;;;N;;;;;
+ 1216B;CUNEIFORM SIGN KA TIMES GU;Lo;0;L;;;;;N;;;;;
+ 1216C;CUNEIFORM SIGN KA TIMES GUR7;Lo;0;L;;;;;N;;;;;
+ 1216D;CUNEIFORM SIGN KA TIMES IGI;Lo;0;L;;;;;N;;;;;
+ 1216E;CUNEIFORM SIGN KA TIMES IM;Lo;0;L;;;;;N;;;;;
+ 1216F;CUNEIFORM SIGN KA TIMES KAK;Lo;0;L;;;;;N;;;;;
+ 12170;CUNEIFORM SIGN KA TIMES KI;Lo;0;L;;;;;N;;;;;
+ 12171;CUNEIFORM SIGN KA TIMES KID;Lo;0;L;;;;;N;;;;;
+ 12172;CUNEIFORM SIGN KA TIMES LI;Lo;0;L;;;;;N;;;;;
+ 12173;CUNEIFORM SIGN KA TIMES LU;Lo;0;L;;;;;N;;;;;
+ 12174;CUNEIFORM SIGN KA TIMES ME;Lo;0;L;;;;;N;;;;;
+ 12175;CUNEIFORM SIGN KA TIMES ME PLUS DU;Lo;0;L;;;;;N;;;;;
+ 12176;CUNEIFORM SIGN KA TIMES ME PLUS GI;Lo;0;L;;;;;N;;;;;
+ 12177;CUNEIFORM SIGN KA TIMES ME PLUS TE;Lo;0;L;;;;;N;;;;;
+ 12178;CUNEIFORM SIGN KA TIMES MI;Lo;0;L;;;;;N;;;;;
+ 12179;CUNEIFORM SIGN KA TIMES MI PLUS NUNUZ;Lo;0;L;;;;;N;;;;;
+ 1217A;CUNEIFORM SIGN KA TIMES NE;Lo;0;L;;;;;N;;;;;
+ 1217B;CUNEIFORM SIGN KA TIMES NUN;Lo;0;L;;;;;N;;;;;
+ 1217C;CUNEIFORM SIGN KA TIMES PI;Lo;0;L;;;;;N;;;;;
+ 1217D;CUNEIFORM SIGN KA TIMES RU;Lo;0;L;;;;;N;;;;;
+ 1217E;CUNEIFORM SIGN KA TIMES SA;Lo;0;L;;;;;N;;;;;
+ 1217F;CUNEIFORM SIGN KA TIMES SAR;Lo;0;L;;;;;N;;;;;
+ 12180;CUNEIFORM SIGN KA TIMES SHA;Lo;0;L;;;;;N;;;;;
+ 12181;CUNEIFORM SIGN KA TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 12182;CUNEIFORM SIGN KA TIMES SHID;Lo;0;L;;;;;N;;;;;
+ 12183;CUNEIFORM SIGN KA TIMES SHU;Lo;0;L;;;;;N;;;;;
+ 12184;CUNEIFORM SIGN KA TIMES SIG;Lo;0;L;;;;;N;;;;;
+ 12185;CUNEIFORM SIGN KA TIMES SUHUR;Lo;0;L;;;;;N;;;;;
+ 12186;CUNEIFORM SIGN KA TIMES TAR;Lo;0;L;;;;;N;;;;;
+ 12187;CUNEIFORM SIGN KA TIMES U;Lo;0;L;;;;;N;;;;;
+ 12188;CUNEIFORM SIGN KA TIMES U2;Lo;0;L;;;;;N;;;;;
+ 12189;CUNEIFORM SIGN KA TIMES UD;Lo;0;L;;;;;N;;;;;
+ 1218A;CUNEIFORM SIGN KA TIMES UMUM TIMES PA;Lo;0;L;;;;;N;;;;;
+ 1218B;CUNEIFORM SIGN KA TIMES USH;Lo;0;L;;;;;N;;;;;
+ 1218C;CUNEIFORM SIGN KA TIMES ZI;Lo;0;L;;;;;N;;;;;
+ 1218D;CUNEIFORM SIGN KA2;Lo;0;L;;;;;N;;;;;
+ 1218E;CUNEIFORM SIGN KA2 CROSSING KA2;Lo;0;L;;;;;N;;;;;
+ 1218F;CUNEIFORM SIGN KAB;Lo;0;L;;;;;N;;;;;
+ 12190;CUNEIFORM SIGN KAD2;Lo;0;L;;;;;N;;;;;
+ 12191;CUNEIFORM SIGN KAD3;Lo;0;L;;;;;N;;;;;
+ 12192;CUNEIFORM SIGN KAD4;Lo;0;L;;;;;N;;;;;
+ 12193;CUNEIFORM SIGN KAD5;Lo;0;L;;;;;N;;;;;
+ 12194;CUNEIFORM SIGN KAD5 OVER KAD5;Lo;0;L;;;;;N;;;;;
+ 12195;CUNEIFORM SIGN KAK;Lo;0;L;;;;;N;;;;;
+ 12196;CUNEIFORM SIGN KAK TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 12197;CUNEIFORM SIGN KAL;Lo;0;L;;;;;N;;;;;
+ 12198;CUNEIFORM SIGN KAL TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 12199;CUNEIFORM SIGN KAL CROSSING KAL;Lo;0;L;;;;;N;;;;;
+ 1219A;CUNEIFORM SIGN KAM2;Lo;0;L;;;;;N;;;;;
+ 1219B;CUNEIFORM SIGN KAM4;Lo;0;L;;;;;N;;;;;
+ 1219C;CUNEIFORM SIGN KASKAL;Lo;0;L;;;;;N;;;;;
+ 1219D;CUNEIFORM SIGN KASKAL LAGAB TIMES U OVER LAGAB TIMES U;Lo;0;L;;;;;N;;;;;
+ 1219E;CUNEIFORM SIGN KASKAL OVER KASKAL LAGAB TIMES U OVER LAGAB TIMES U;Lo;0;L;;;;;N;;;;;
+ 1219F;CUNEIFORM SIGN KESH2;Lo;0;L;;;;;N;;;;;
+ 121A0;CUNEIFORM SIGN KI;Lo;0;L;;;;;N;;;;;
+ 121A1;CUNEIFORM SIGN KI TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 121A2;CUNEIFORM SIGN KI TIMES U;Lo;0;L;;;;;N;;;;;
+ 121A3;CUNEIFORM SIGN KI TIMES UD;Lo;0;L;;;;;N;;;;;
+ 121A4;CUNEIFORM SIGN KID;Lo;0;L;;;;;N;;;;;
+ 121A5;CUNEIFORM SIGN KIN;Lo;0;L;;;;;N;;;;;
+ 121A6;CUNEIFORM SIGN KISAL;Lo;0;L;;;;;N;;;;;
+ 121A7;CUNEIFORM SIGN KISH;Lo;0;L;;;;;N;;;;;
+ 121A8;CUNEIFORM SIGN KISIM5;Lo;0;L;;;;;N;;;;;
+ 121A9;CUNEIFORM SIGN KISIM5 OVER KISIM5;Lo;0;L;;;;;N;;;;;
+ 121AA;CUNEIFORM SIGN KU;Lo;0;L;;;;;N;;;;;
+ 121AB;CUNEIFORM SIGN KU OVER HI TIMES ASH2 KU OVER HI TIMES ASH2;Lo;0;L;;;;;N;;;;;
+ 121AC;CUNEIFORM SIGN KU3;Lo;0;L;;;;;N;;;;;
+ 121AD;CUNEIFORM SIGN KU4;Lo;0;L;;;;;N;;;;;
+ 121AE;CUNEIFORM SIGN KU4 VARIANT FORM;Lo;0;L;;;;;N;;;;;
+ 121AF;CUNEIFORM SIGN KU7;Lo;0;L;;;;;N;;;;;
+ 121B0;CUNEIFORM SIGN KUL;Lo;0;L;;;;;N;;;;;
+ 121B1;CUNEIFORM SIGN KUL GUNU;Lo;0;L;;;;;N;;;;;
+ 121B2;CUNEIFORM SIGN KUN;Lo;0;L;;;;;N;;;;;
+ 121B3;CUNEIFORM SIGN KUR;Lo;0;L;;;;;N;;;;;
+ 121B4;CUNEIFORM SIGN KUR OPPOSING KUR;Lo;0;L;;;;;N;;;;;
+ 121B5;CUNEIFORM SIGN KUSHU2;Lo;0;L;;;;;N;;;;;
+ 121B6;CUNEIFORM SIGN KWU318;Lo;0;L;;;;;N;;;;;
+ 121B7;CUNEIFORM SIGN LA;Lo;0;L;;;;;N;;;;;
+ 121B8;CUNEIFORM SIGN LAGAB;Lo;0;L;;;;;N;;;;;
+ 121B9;CUNEIFORM SIGN LAGAB TIMES A;Lo;0;L;;;;;N;;;;;
+ 121BA;CUNEIFORM SIGN LAGAB TIMES A PLUS DA PLUS HA;Lo;0;L;;;;;N;;;;;
+ 121BB;CUNEIFORM SIGN LAGAB TIMES A PLUS GAR;Lo;0;L;;;;;N;;;;;
+ 121BC;CUNEIFORM SIGN LAGAB TIMES A PLUS LAL;Lo;0;L;;;;;N;;;;;
+ 121BD;CUNEIFORM SIGN LAGAB TIMES AL;Lo;0;L;;;;;N;;;;;
+ 121BE;CUNEIFORM SIGN LAGAB TIMES AN;Lo;0;L;;;;;N;;;;;
+ 121BF;CUNEIFORM SIGN LAGAB TIMES ASH ZIDA TENU;Lo;0;L;;;;;N;;;;;
+ 121C0;CUNEIFORM SIGN LAGAB TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 121C1;CUNEIFORM SIGN LAGAB TIMES BI;Lo;0;L;;;;;N;;;;;
+ 121C2;CUNEIFORM SIGN LAGAB TIMES DAR;Lo;0;L;;;;;N;;;;;
+ 121C3;CUNEIFORM SIGN LAGAB TIMES EN;Lo;0;L;;;;;N;;;;;
+ 121C4;CUNEIFORM SIGN LAGAB TIMES GA;Lo;0;L;;;;;N;;;;;
+ 121C5;CUNEIFORM SIGN LAGAB TIMES GAR;Lo;0;L;;;;;N;;;;;
+ 121C6;CUNEIFORM SIGN LAGAB TIMES GUD;Lo;0;L;;;;;N;;;;;
+ 121C7;CUNEIFORM SIGN LAGAB TIMES GUD PLUS GUD;Lo;0;L;;;;;N;;;;;
+ 121C8;CUNEIFORM SIGN LAGAB TIMES HA;Lo;0;L;;;;;N;;;;;
+ 121C9;CUNEIFORM SIGN LAGAB TIMES HAL;Lo;0;L;;;;;N;;;;;
+ 121CA;CUNEIFORM SIGN LAGAB TIMES HI TIMES NUN;Lo;0;L;;;;;N;;;;;
+ 121CB;CUNEIFORM SIGN LAGAB TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 121CC;CUNEIFORM SIGN LAGAB TIMES IM;Lo;0;L;;;;;N;;;;;
+ 121CD;CUNEIFORM SIGN LAGAB TIMES IM PLUS HA;Lo;0;L;;;;;N;;;;;
+ 121CE;CUNEIFORM SIGN LAGAB TIMES IM PLUS LU;Lo;0;L;;;;;N;;;;;
+ 121CF;CUNEIFORM SIGN LAGAB TIMES KI;Lo;0;L;;;;;N;;;;;
+ 121D0;CUNEIFORM SIGN LAGAB TIMES KIN;Lo;0;L;;;;;N;;;;;
+ 121D1;CUNEIFORM SIGN LAGAB TIMES KU3;Lo;0;L;;;;;N;;;;;
+ 121D2;CUNEIFORM SIGN LAGAB TIMES KUL;Lo;0;L;;;;;N;;;;;
+ 121D3;CUNEIFORM SIGN LAGAB TIMES KUL PLUS HI PLUS A;Lo;0;L;;;;;N;;;;;
+ 121D4;CUNEIFORM SIGN LAGAB TIMES LAGAB;Lo;0;L;;;;;N;;;;;
+ 121D5;CUNEIFORM SIGN LAGAB TIMES LISH;Lo;0;L;;;;;N;;;;;
+ 121D6;CUNEIFORM SIGN LAGAB TIMES LU;Lo;0;L;;;;;N;;;;;
+ 121D7;CUNEIFORM SIGN LAGAB TIMES LUL;Lo;0;L;;;;;N;;;;;
+ 121D8;CUNEIFORM SIGN LAGAB TIMES ME;Lo;0;L;;;;;N;;;;;
+ 121D9;CUNEIFORM SIGN LAGAB TIMES ME PLUS EN;Lo;0;L;;;;;N;;;;;
+ 121DA;CUNEIFORM SIGN LAGAB TIMES MUSH;Lo;0;L;;;;;N;;;;;
+ 121DB;CUNEIFORM SIGN LAGAB TIMES NE;Lo;0;L;;;;;N;;;;;
+ 121DC;CUNEIFORM SIGN LAGAB TIMES SHE PLUS SUM;Lo;0;L;;;;;N;;;;;
+ 121DD;CUNEIFORM SIGN LAGAB TIMES SHITA PLUS GISH PLUS ERIN2;Lo;0;L;;;;;N;;;;;
+ 121DE;CUNEIFORM SIGN LAGAB TIMES SHITA PLUS GISH TENU;Lo;0;L;;;;;N;;;;;
+ 121DF;CUNEIFORM SIGN LAGAB TIMES SHU2;Lo;0;L;;;;;N;;;;;
+ 121E0;CUNEIFORM SIGN LAGAB TIMES SHU2 PLUS SHU2;Lo;0;L;;;;;N;;;;;
+ 121E1;CUNEIFORM SIGN LAGAB TIMES SUM;Lo;0;L;;;;;N;;;;;
+ 121E2;CUNEIFORM SIGN LAGAB TIMES TAG;Lo;0;L;;;;;N;;;;;
+ 121E3;CUNEIFORM SIGN LAGAB TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 121E4;CUNEIFORM SIGN LAGAB TIMES TE PLUS A PLUS SU PLUS NA;Lo;0;L;;;;;N;;;;;
+ 121E5;CUNEIFORM SIGN LAGAB TIMES U;Lo;0;L;;;;;N;;;;;
+ 121E6;CUNEIFORM SIGN LAGAB TIMES U PLUS A;Lo;0;L;;;;;N;;;;;
+ 121E7;CUNEIFORM SIGN LAGAB TIMES U PLUS U PLUS U;Lo;0;L;;;;;N;;;;;
+ 121E8;CUNEIFORM SIGN LAGAB TIMES U2 PLUS ASH;Lo;0;L;;;;;N;;;;;
+ 121E9;CUNEIFORM SIGN LAGAB TIMES UD;Lo;0;L;;;;;N;;;;;
+ 121EA;CUNEIFORM SIGN LAGAB TIMES USH;Lo;0;L;;;;;N;;;;;
+ 121EB;CUNEIFORM SIGN LAGAB SQUARED;Lo;0;L;;;;;N;;;;;
+ 121EC;CUNEIFORM SIGN LAGAR;Lo;0;L;;;;;N;;;;;
+ 121ED;CUNEIFORM SIGN LAGAR TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 121EE;CUNEIFORM SIGN LAGAR TIMES SHE PLUS SUM;Lo;0;L;;;;;N;;;;;
+ 121EF;CUNEIFORM SIGN LAGAR GUNU;Lo;0;L;;;;;N;;;;;
+ 121F0;CUNEIFORM SIGN LAGAR GUNU OVER LAGAR GUNU SHE;Lo;0;L;;;;;N;;;;;
+ 121F1;CUNEIFORM SIGN LAHSHU;Lo;0;L;;;;;N;;;;;
+ 121F2;CUNEIFORM SIGN LAL;Lo;0;L;;;;;N;;;;;
+ 121F3;CUNEIFORM SIGN LAL TIMES LAL;Lo;0;L;;;;;N;;;;;
+ 121F4;CUNEIFORM SIGN LAM;Lo;0;L;;;;;N;;;;;
+ 121F5;CUNEIFORM SIGN LAM TIMES KUR;Lo;0;L;;;;;N;;;;;
+ 121F6;CUNEIFORM SIGN LAM TIMES KUR PLUS RU;Lo;0;L;;;;;N;;;;;
+ 121F7;CUNEIFORM SIGN LI;Lo;0;L;;;;;N;;;;;
+ 121F8;CUNEIFORM SIGN LIL;Lo;0;L;;;;;N;;;;;
+ 121F9;CUNEIFORM SIGN LIMMU2;Lo;0;L;;;;;N;;;;;
+ 121FA;CUNEIFORM SIGN LISH;Lo;0;L;;;;;N;;;;;
+ 121FB;CUNEIFORM SIGN LU;Lo;0;L;;;;;N;;;;;
+ 121FC;CUNEIFORM SIGN LU TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 121FD;CUNEIFORM SIGN LU2;Lo;0;L;;;;;N;;;;;
+ 121FE;CUNEIFORM SIGN LU2 TIMES AL;Lo;0;L;;;;;N;;;;;
+ 121FF;CUNEIFORM SIGN LU2 TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 12200;CUNEIFORM SIGN LU2 TIMES ESH2;Lo;0;L;;;;;N;;;;;
+ 12201;CUNEIFORM SIGN LU2 TIMES ESH2 TENU;Lo;0;L;;;;;N;;;;;
+ 12202;CUNEIFORM SIGN LU2 TIMES GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 12203;CUNEIFORM SIGN LU2 TIMES HI TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 12204;CUNEIFORM SIGN LU2 TIMES IM;Lo;0;L;;;;;N;;;;;
+ 12205;CUNEIFORM SIGN LU2 TIMES KAD2;Lo;0;L;;;;;N;;;;;
+ 12206;CUNEIFORM SIGN LU2 TIMES KAD3;Lo;0;L;;;;;N;;;;;
+ 12207;CUNEIFORM SIGN LU2 TIMES KAD3 PLUS ASH;Lo;0;L;;;;;N;;;;;
+ 12208;CUNEIFORM SIGN LU2 TIMES KI;Lo;0;L;;;;;N;;;;;
+ 12209;CUNEIFORM SIGN LU2 TIMES LA PLUS ASH;Lo;0;L;;;;;N;;;;;
+ 1220A;CUNEIFORM SIGN LU2 TIMES LAGAB;Lo;0;L;;;;;N;;;;;
+ 1220B;CUNEIFORM SIGN LU2 TIMES ME PLUS EN;Lo;0;L;;;;;N;;;;;
+ 1220C;CUNEIFORM SIGN LU2 TIMES NE;Lo;0;L;;;;;N;;;;;
+ 1220D;CUNEIFORM SIGN LU2 TIMES NU;Lo;0;L;;;;;N;;;;;
+ 1220E;CUNEIFORM SIGN LU2 TIMES SI PLUS ASH;Lo;0;L;;;;;N;;;;;
+ 1220F;CUNEIFORM SIGN LU2 TIMES SIK2 PLUS BU;Lo;0;L;;;;;N;;;;;
+ 12210;CUNEIFORM SIGN LU2 TIMES TUG2;Lo;0;L;;;;;N;;;;;
+ 12211;CUNEIFORM SIGN LU2 TENU;Lo;0;L;;;;;N;;;;;
+ 12212;CUNEIFORM SIGN LU2 CROSSING LU2;Lo;0;L;;;;;N;;;;;
+ 12213;CUNEIFORM SIGN LU2 OPPOSING LU2;Lo;0;L;;;;;N;;;;;
+ 12214;CUNEIFORM SIGN LU2 SQUARED;Lo;0;L;;;;;N;;;;;
+ 12215;CUNEIFORM SIGN LU2 SHESHIG;Lo;0;L;;;;;N;;;;;
+ 12216;CUNEIFORM SIGN LU3;Lo;0;L;;;;;N;;;;;
+ 12217;CUNEIFORM SIGN LUGAL;Lo;0;L;;;;;N;;;;;
+ 12218;CUNEIFORM SIGN LUGAL OVER LUGAL;Lo;0;L;;;;;N;;;;;
+ 12219;CUNEIFORM SIGN LUGAL OPPOSING LUGAL;Lo;0;L;;;;;N;;;;;
+ 1221A;CUNEIFORM SIGN LUGAL SHESHIG;Lo;0;L;;;;;N;;;;;
+ 1221B;CUNEIFORM SIGN LUH;Lo;0;L;;;;;N;;;;;
+ 1221C;CUNEIFORM SIGN LUL;Lo;0;L;;;;;N;;;;;
+ 1221D;CUNEIFORM SIGN LUM;Lo;0;L;;;;;N;;;;;
+ 1221E;CUNEIFORM SIGN LUM OVER LUM;Lo;0;L;;;;;N;;;;;
+ 1221F;CUNEIFORM SIGN LUM OVER LUM GAR OVER GAR;Lo;0;L;;;;;N;;;;;
+ 12220;CUNEIFORM SIGN MA;Lo;0;L;;;;;N;;;;;
+ 12221;CUNEIFORM SIGN MA TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 12222;CUNEIFORM SIGN MA GUNU;Lo;0;L;;;;;N;;;;;
+ 12223;CUNEIFORM SIGN MA2;Lo;0;L;;;;;N;;;;;
+ 12224;CUNEIFORM SIGN MAH;Lo;0;L;;;;;N;;;;;
+ 12225;CUNEIFORM SIGN MAR;Lo;0;L;;;;;N;;;;;
+ 12226;CUNEIFORM SIGN MASH;Lo;0;L;;;;;N;;;;;
+ 12227;CUNEIFORM SIGN MASH2;Lo;0;L;;;;;N;;;;;
+ 12228;CUNEIFORM SIGN ME;Lo;0;L;;;;;N;;;;;
+ 12229;CUNEIFORM SIGN MES;Lo;0;L;;;;;N;;;;;
+ 1222A;CUNEIFORM SIGN MI;Lo;0;L;;;;;N;;;;;
+ 1222B;CUNEIFORM SIGN MIN;Lo;0;L;;;;;N;;;;;
+ 1222C;CUNEIFORM SIGN MU;Lo;0;L;;;;;N;;;;;
+ 1222D;CUNEIFORM SIGN MU OVER MU;Lo;0;L;;;;;N;;;;;
+ 1222E;CUNEIFORM SIGN MUG;Lo;0;L;;;;;N;;;;;
+ 1222F;CUNEIFORM SIGN MUG GUNU;Lo;0;L;;;;;N;;;;;
+ 12230;CUNEIFORM SIGN MUNSUB;Lo;0;L;;;;;N;;;;;
+ 12231;CUNEIFORM SIGN MURGU2;Lo;0;L;;;;;N;;;;;
+ 12232;CUNEIFORM SIGN MUSH;Lo;0;L;;;;;N;;;;;
+ 12233;CUNEIFORM SIGN MUSH TIMES A;Lo;0;L;;;;;N;;;;;
+ 12234;CUNEIFORM SIGN MUSH TIMES KUR;Lo;0;L;;;;;N;;;;;
+ 12235;CUNEIFORM SIGN MUSH TIMES ZA;Lo;0;L;;;;;N;;;;;
+ 12236;CUNEIFORM SIGN MUSH OVER MUSH;Lo;0;L;;;;;N;;;;;
+ 12237;CUNEIFORM SIGN MUSH OVER MUSH TIMES A PLUS NA;Lo;0;L;;;;;N;;;;;
+ 12238;CUNEIFORM SIGN MUSH CROSSING MUSH;Lo;0;L;;;;;N;;;;;
+ 12239;CUNEIFORM SIGN MUSH3;Lo;0;L;;;;;N;;;;;
+ 1223A;CUNEIFORM SIGN MUSH3 TIMES A;Lo;0;L;;;;;N;;;;;
+ 1223B;CUNEIFORM SIGN MUSH3 TIMES A PLUS DI;Lo;0;L;;;;;N;;;;;
+ 1223C;CUNEIFORM SIGN MUSH3 TIMES DI;Lo;0;L;;;;;N;;;;;
+ 1223D;CUNEIFORM SIGN MUSH3 GUNU;Lo;0;L;;;;;N;;;;;
+ 1223E;CUNEIFORM SIGN NA;Lo;0;L;;;;;N;;;;;
+ 1223F;CUNEIFORM SIGN NA2;Lo;0;L;;;;;N;;;;;
+ 12240;CUNEIFORM SIGN NAGA;Lo;0;L;;;;;N;;;;;
+ 12241;CUNEIFORM SIGN NAGA INVERTED;Lo;0;L;;;;;N;;;;;
+ 12242;CUNEIFORM SIGN NAGA TIMES SHU TENU;Lo;0;L;;;;;N;;;;;
+ 12243;CUNEIFORM SIGN NAGA OPPOSING NAGA;Lo;0;L;;;;;N;;;;;
+ 12244;CUNEIFORM SIGN NAGAR;Lo;0;L;;;;;N;;;;;
+ 12245;CUNEIFORM SIGN NAM NUTILLU;Lo;0;L;;;;;N;;;;;
+ 12246;CUNEIFORM SIGN NAM;Lo;0;L;;;;;N;;;;;
+ 12247;CUNEIFORM SIGN NAM2;Lo;0;L;;;;;N;;;;;
+ 12248;CUNEIFORM SIGN NE;Lo;0;L;;;;;N;;;;;
+ 12249;CUNEIFORM SIGN NE TIMES A;Lo;0;L;;;;;N;;;;;
+ 1224A;CUNEIFORM SIGN NE TIMES UD;Lo;0;L;;;;;N;;;;;
+ 1224B;CUNEIFORM SIGN NE SHESHIG;Lo;0;L;;;;;N;;;;;
+ 1224C;CUNEIFORM SIGN NI;Lo;0;L;;;;;N;;;;;
+ 1224D;CUNEIFORM SIGN NI TIMES E;Lo;0;L;;;;;N;;;;;
+ 1224E;CUNEIFORM SIGN NI2;Lo;0;L;;;;;N;;;;;
+ 1224F;CUNEIFORM SIGN NIM;Lo;0;L;;;;;N;;;;;
+ 12250;CUNEIFORM SIGN NIM TIMES GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 12251;CUNEIFORM SIGN NIM TIMES GAR PLUS GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 12252;CUNEIFORM SIGN NINDA2;Lo;0;L;;;;;N;;;;;
+ 12253;CUNEIFORM SIGN NINDA2 TIMES AN;Lo;0;L;;;;;N;;;;;
+ 12254;CUNEIFORM SIGN NINDA2 TIMES ASH;Lo;0;L;;;;;N;;;;;
+ 12255;CUNEIFORM SIGN NINDA2 TIMES ASH PLUS ASH;Lo;0;L;;;;;N;;;;;
+ 12256;CUNEIFORM SIGN NINDA2 TIMES GUD;Lo;0;L;;;;;N;;;;;
+ 12257;CUNEIFORM SIGN NINDA2 TIMES ME PLUS GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 12258;CUNEIFORM SIGN NINDA2 TIMES NE;Lo;0;L;;;;;N;;;;;
+ 12259;CUNEIFORM SIGN NINDA2 TIMES NUN;Lo;0;L;;;;;N;;;;;
+ 1225A;CUNEIFORM SIGN NINDA2 TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 1225B;CUNEIFORM SIGN NINDA2 TIMES SHE PLUS A AN;Lo;0;L;;;;;N;;;;;
+ 1225C;CUNEIFORM SIGN NINDA2 TIMES SHE PLUS ASH;Lo;0;L;;;;;N;;;;;
+ 1225D;CUNEIFORM SIGN NINDA2 TIMES SHE PLUS ASH PLUS ASH;Lo;0;L;;;;;N;;;;;
+ 1225E;CUNEIFORM SIGN NINDA2 TIMES U2 PLUS ASH;Lo;0;L;;;;;N;;;;;
+ 1225F;CUNEIFORM SIGN NINDA2 TIMES USH;Lo;0;L;;;;;N;;;;;
+ 12260;CUNEIFORM SIGN NISAG;Lo;0;L;;;;;N;;;;;
+ 12261;CUNEIFORM SIGN NU;Lo;0;L;;;;;N;;;;;
+ 12262;CUNEIFORM SIGN NU11;Lo;0;L;;;;;N;;;;;
+ 12263;CUNEIFORM SIGN NUN;Lo;0;L;;;;;N;;;;;
+ 12264;CUNEIFORM SIGN NUN LAGAR TIMES GAR;Lo;0;L;;;;;N;;;;;
+ 12265;CUNEIFORM SIGN NUN LAGAR TIMES MASH;Lo;0;L;;;;;N;;;;;
+ 12266;CUNEIFORM SIGN NUN LAGAR TIMES SAL;Lo;0;L;;;;;N;;;;;
+ 12267;CUNEIFORM SIGN NUN LAGAR TIMES SAL OVER NUN LAGAR TIMES SAL;Lo;0;L;;;;;N;;;;;
+ 12268;CUNEIFORM SIGN NUN LAGAR TIMES USH;Lo;0;L;;;;;N;;;;;
+ 12269;CUNEIFORM SIGN NUN TENU;Lo;0;L;;;;;N;;;;;
+ 1226A;CUNEIFORM SIGN NUN OVER NUN;Lo;0;L;;;;;N;;;;;
+ 1226B;CUNEIFORM SIGN NUN CROSSING NUN;Lo;0;L;;;;;N;;;;;
+ 1226C;CUNEIFORM SIGN NUN CROSSING NUN LAGAR OVER LAGAR;Lo;0;L;;;;;N;;;;;
+ 1226D;CUNEIFORM SIGN NUNUZ;Lo;0;L;;;;;N;;;;;
+ 1226E;CUNEIFORM SIGN NUNUZ AB2 TIMES ASHGAB;Lo;0;L;;;;;N;;;;;
+ 1226F;CUNEIFORM SIGN NUNUZ AB2 TIMES BI;Lo;0;L;;;;;N;;;;;
+ 12270;CUNEIFORM SIGN NUNUZ AB2 TIMES DUG;Lo;0;L;;;;;N;;;;;
+ 12271;CUNEIFORM SIGN NUNUZ AB2 TIMES GUD;Lo;0;L;;;;;N;;;;;
+ 12272;CUNEIFORM SIGN NUNUZ AB2 TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 12273;CUNEIFORM SIGN NUNUZ AB2 TIMES KAD3;Lo;0;L;;;;;N;;;;;
+ 12274;CUNEIFORM SIGN NUNUZ AB2 TIMES LA;Lo;0;L;;;;;N;;;;;
+ 12275;CUNEIFORM SIGN NUNUZ AB2 TIMES NE;Lo;0;L;;;;;N;;;;;
+ 12276;CUNEIFORM SIGN NUNUZ AB2 TIMES SILA3;Lo;0;L;;;;;N;;;;;
+ 12277;CUNEIFORM SIGN NUNUZ AB2 TIMES U2;Lo;0;L;;;;;N;;;;;
+ 12278;CUNEIFORM SIGN NUNUZ KISIM5 TIMES BI;Lo;0;L;;;;;N;;;;;
+ 12279;CUNEIFORM SIGN NUNUZ KISIM5 TIMES BI U;Lo;0;L;;;;;N;;;;;
+ 1227A;CUNEIFORM SIGN PA;Lo;0;L;;;;;N;;;;;
+ 1227B;CUNEIFORM SIGN PAD;Lo;0;L;;;;;N;;;;;
+ 1227C;CUNEIFORM SIGN PAN;Lo;0;L;;;;;N;;;;;
+ 1227D;CUNEIFORM SIGN PAP;Lo;0;L;;;;;N;;;;;
+ 1227E;CUNEIFORM SIGN PESH2;Lo;0;L;;;;;N;;;;;
+ 1227F;CUNEIFORM SIGN PI;Lo;0;L;;;;;N;;;;;
+ 12280;CUNEIFORM SIGN PI TIMES A;Lo;0;L;;;;;N;;;;;
+ 12281;CUNEIFORM SIGN PI TIMES AB;Lo;0;L;;;;;N;;;;;
+ 12282;CUNEIFORM SIGN PI TIMES BI;Lo;0;L;;;;;N;;;;;
+ 12283;CUNEIFORM SIGN PI TIMES BU;Lo;0;L;;;;;N;;;;;
+ 12284;CUNEIFORM SIGN PI TIMES E;Lo;0;L;;;;;N;;;;;
+ 12285;CUNEIFORM SIGN PI TIMES I;Lo;0;L;;;;;N;;;;;
+ 12286;CUNEIFORM SIGN PI TIMES IB;Lo;0;L;;;;;N;;;;;
+ 12287;CUNEIFORM SIGN PI TIMES U;Lo;0;L;;;;;N;;;;;
+ 12288;CUNEIFORM SIGN PI TIMES U2;Lo;0;L;;;;;N;;;;;
+ 12289;CUNEIFORM SIGN PI CROSSING PI;Lo;0;L;;;;;N;;;;;
+ 1228A;CUNEIFORM SIGN PIRIG;Lo;0;L;;;;;N;;;;;
+ 1228B;CUNEIFORM SIGN PIRIG TIMES KAL;Lo;0;L;;;;;N;;;;;
+ 1228C;CUNEIFORM SIGN PIRIG TIMES UD;Lo;0;L;;;;;N;;;;;
+ 1228D;CUNEIFORM SIGN PIRIG TIMES ZA;Lo;0;L;;;;;N;;;;;
+ 1228E;CUNEIFORM SIGN PIRIG OPPOSING PIRIG;Lo;0;L;;;;;N;;;;;
+ 1228F;CUNEIFORM SIGN RA;Lo;0;L;;;;;N;;;;;
+ 12290;CUNEIFORM SIGN RAB;Lo;0;L;;;;;N;;;;;
+ 12291;CUNEIFORM SIGN RI;Lo;0;L;;;;;N;;;;;
+ 12292;CUNEIFORM SIGN RU;Lo;0;L;;;;;N;;;;;
+ 12293;CUNEIFORM SIGN SA;Lo;0;L;;;;;N;;;;;
+ 12294;CUNEIFORM SIGN SAG NUTILLU;Lo;0;L;;;;;N;;;;;
+ 12295;CUNEIFORM SIGN SAG;Lo;0;L;;;;;N;;;;;
+ 12296;CUNEIFORM SIGN SAG TIMES A;Lo;0;L;;;;;N;;;;;
+ 12297;CUNEIFORM SIGN SAG TIMES DU;Lo;0;L;;;;;N;;;;;
+ 12298;CUNEIFORM SIGN SAG TIMES DUB;Lo;0;L;;;;;N;;;;;
+ 12299;CUNEIFORM SIGN SAG TIMES HA;Lo;0;L;;;;;N;;;;;
+ 1229A;CUNEIFORM SIGN SAG TIMES KAK;Lo;0;L;;;;;N;;;;;
+ 1229B;CUNEIFORM SIGN SAG TIMES KUR;Lo;0;L;;;;;N;;;;;
+ 1229C;CUNEIFORM SIGN SAG TIMES LUM;Lo;0;L;;;;;N;;;;;
+ 1229D;CUNEIFORM SIGN SAG TIMES MI;Lo;0;L;;;;;N;;;;;
+ 1229E;CUNEIFORM SIGN SAG TIMES NUN;Lo;0;L;;;;;N;;;;;
+ 1229F;CUNEIFORM SIGN SAG TIMES SAL;Lo;0;L;;;;;N;;;;;
+ 122A0;CUNEIFORM SIGN SAG TIMES SHID;Lo;0;L;;;;;N;;;;;
+ 122A1;CUNEIFORM SIGN SAG TIMES TAB;Lo;0;L;;;;;N;;;;;
+ 122A2;CUNEIFORM SIGN SAG TIMES U2;Lo;0;L;;;;;N;;;;;
+ 122A3;CUNEIFORM SIGN SAG TIMES UB;Lo;0;L;;;;;N;;;;;
+ 122A4;CUNEIFORM SIGN SAG TIMES UM;Lo;0;L;;;;;N;;;;;
+ 122A5;CUNEIFORM SIGN SAG TIMES UR;Lo;0;L;;;;;N;;;;;
+ 122A6;CUNEIFORM SIGN SAG TIMES USH;Lo;0;L;;;;;N;;;;;
+ 122A7;CUNEIFORM SIGN SAG OVER SAG;Lo;0;L;;;;;N;;;;;
+ 122A8;CUNEIFORM SIGN SAG GUNU;Lo;0;L;;;;;N;;;;;
+ 122A9;CUNEIFORM SIGN SAL;Lo;0;L;;;;;N;;;;;
+ 122AA;CUNEIFORM SIGN SAL LAGAB TIMES ASH2;Lo;0;L;;;;;N;;;;;
+ 122AB;CUNEIFORM SIGN SANGA2;Lo;0;L;;;;;N;;;;;
+ 122AC;CUNEIFORM SIGN SAR;Lo;0;L;;;;;N;;;;;
+ 122AD;CUNEIFORM SIGN SHA;Lo;0;L;;;;;N;;;;;
+ 122AE;CUNEIFORM SIGN SHA3;Lo;0;L;;;;;N;;;;;
+ 122AF;CUNEIFORM SIGN SHA3 TIMES A;Lo;0;L;;;;;N;;;;;
+ 122B0;CUNEIFORM SIGN SHA3 TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 122B1;CUNEIFORM SIGN SHA3 TIMES GISH;Lo;0;L;;;;;N;;;;;
+ 122B2;CUNEIFORM SIGN SHA3 TIMES NE;Lo;0;L;;;;;N;;;;;
+ 122B3;CUNEIFORM SIGN SHA3 TIMES SHU2;Lo;0;L;;;;;N;;;;;
+ 122B4;CUNEIFORM SIGN SHA3 TIMES TUR;Lo;0;L;;;;;N;;;;;
+ 122B5;CUNEIFORM SIGN SHA3 TIMES U;Lo;0;L;;;;;N;;;;;
+ 122B6;CUNEIFORM SIGN SHA3 TIMES U PLUS A;Lo;0;L;;;;;N;;;;;
+ 122B7;CUNEIFORM SIGN SHA6;Lo;0;L;;;;;N;;;;;
+ 122B8;CUNEIFORM SIGN SHAB6;Lo;0;L;;;;;N;;;;;
+ 122B9;CUNEIFORM SIGN SHAR2;Lo;0;L;;;;;N;;;;;
+ 122BA;CUNEIFORM SIGN SHE;Lo;0;L;;;;;N;;;;;
+ 122BB;CUNEIFORM SIGN SHE HU;Lo;0;L;;;;;N;;;;;
+ 122BC;CUNEIFORM SIGN SHE OVER SHE GAD OVER GAD GAR OVER GAR;Lo;0;L;;;;;N;;;;;
+ 122BD;CUNEIFORM SIGN SHE OVER SHE TAB OVER TAB GAR OVER GAR;Lo;0;L;;;;;N;;;;;
+ 122BE;CUNEIFORM SIGN SHEG9;Lo;0;L;;;;;N;;;;;
+ 122BF;CUNEIFORM SIGN SHEN;Lo;0;L;;;;;N;;;;;
+ 122C0;CUNEIFORM SIGN SHESH;Lo;0;L;;;;;N;;;;;
+ 122C1;CUNEIFORM SIGN SHESH2;Lo;0;L;;;;;N;;;;;
+ 122C2;CUNEIFORM SIGN SHESHLAM;Lo;0;L;;;;;N;;;;;
+ 122C3;CUNEIFORM SIGN SHID;Lo;0;L;;;;;N;;;;;
+ 122C4;CUNEIFORM SIGN SHID TIMES A;Lo;0;L;;;;;N;;;;;
+ 122C5;CUNEIFORM SIGN SHID TIMES IM;Lo;0;L;;;;;N;;;;;
+ 122C6;CUNEIFORM SIGN SHIM;Lo;0;L;;;;;N;;;;;
+ 122C7;CUNEIFORM SIGN SHIM TIMES A;Lo;0;L;;;;;N;;;;;
+ 122C8;CUNEIFORM SIGN SHIM TIMES BAL;Lo;0;L;;;;;N;;;;;
+ 122C9;CUNEIFORM SIGN SHIM TIMES BULUG;Lo;0;L;;;;;N;;;;;
+ 122CA;CUNEIFORM SIGN SHIM TIMES DIN;Lo;0;L;;;;;N;;;;;
+ 122CB;CUNEIFORM SIGN SHIM TIMES GAR;Lo;0;L;;;;;N;;;;;
+ 122CC;CUNEIFORM SIGN SHIM TIMES IGI;Lo;0;L;;;;;N;;;;;
+ 122CD;CUNEIFORM SIGN SHIM TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 122CE;CUNEIFORM SIGN SHIM TIMES KUSHU2;Lo;0;L;;;;;N;;;;;
+ 122CF;CUNEIFORM SIGN SHIM TIMES LUL;Lo;0;L;;;;;N;;;;;
+ 122D0;CUNEIFORM SIGN SHIM TIMES MUG;Lo;0;L;;;;;N;;;;;
+ 122D1;CUNEIFORM SIGN SHIM TIMES SAL;Lo;0;L;;;;;N;;;;;
+ 122D2;CUNEIFORM SIGN SHINIG;Lo;0;L;;;;;N;;;;;
+ 122D3;CUNEIFORM SIGN SHIR;Lo;0;L;;;;;N;;;;;
+ 122D4;CUNEIFORM SIGN SHIR TENU;Lo;0;L;;;;;N;;;;;
+ 122D5;CUNEIFORM SIGN SHIR OVER SHIR BUR OVER BUR;Lo;0;L;;;;;N;;;;;
+ 122D6;CUNEIFORM SIGN SHITA;Lo;0;L;;;;;N;;;;;
+ 122D7;CUNEIFORM SIGN SHU;Lo;0;L;;;;;N;;;;;
+ 122D8;CUNEIFORM SIGN SHU OVER INVERTED SHU;Lo;0;L;;;;;N;;;;;
+ 122D9;CUNEIFORM SIGN SHU2;Lo;0;L;;;;;N;;;;;
+ 122DA;CUNEIFORM SIGN SHUBUR;Lo;0;L;;;;;N;;;;;
+ 122DB;CUNEIFORM SIGN SI;Lo;0;L;;;;;N;;;;;
+ 122DC;CUNEIFORM SIGN SI GUNU;Lo;0;L;;;;;N;;;;;
+ 122DD;CUNEIFORM SIGN SIG;Lo;0;L;;;;;N;;;;;
+ 122DE;CUNEIFORM SIGN SIG4;Lo;0;L;;;;;N;;;;;
+ 122DF;CUNEIFORM SIGN SIG4 OVER SIG4 SHU2;Lo;0;L;;;;;N;;;;;
+ 122E0;CUNEIFORM SIGN SIK2;Lo;0;L;;;;;N;;;;;
+ 122E1;CUNEIFORM SIGN SILA3;Lo;0;L;;;;;N;;;;;
+ 122E2;CUNEIFORM SIGN SU;Lo;0;L;;;;;N;;;;;
+ 122E3;CUNEIFORM SIGN SU OVER SU;Lo;0;L;;;;;N;;;;;
+ 122E4;CUNEIFORM SIGN SUD;Lo;0;L;;;;;N;;;;;
+ 122E5;CUNEIFORM SIGN SUD2;Lo;0;L;;;;;N;;;;;
+ 122E6;CUNEIFORM SIGN SUHUR;Lo;0;L;;;;;N;;;;;
+ 122E7;CUNEIFORM SIGN SUM;Lo;0;L;;;;;N;;;;;
+ 122E8;CUNEIFORM SIGN SUMASH;Lo;0;L;;;;;N;;;;;
+ 122E9;CUNEIFORM SIGN SUR;Lo;0;L;;;;;N;;;;;
+ 122EA;CUNEIFORM SIGN SUR9;Lo;0;L;;;;;N;;;;;
+ 122EB;CUNEIFORM SIGN TA;Lo;0;L;;;;;N;;;;;
+ 122EC;CUNEIFORM SIGN TA ASTERISK;Lo;0;L;;;;;N;;;;;
+ 122ED;CUNEIFORM SIGN TA TIMES HI;Lo;0;L;;;;;N;;;;;
+ 122EE;CUNEIFORM SIGN TA TIMES MI;Lo;0;L;;;;;N;;;;;
+ 122EF;CUNEIFORM SIGN TA GUNU;Lo;0;L;;;;;N;;;;;
+ 122F0;CUNEIFORM SIGN TAB;Lo;0;L;;;;;N;;;;;
+ 122F1;CUNEIFORM SIGN TAB OVER TAB NI OVER NI DISH OVER DISH;Lo;0;L;;;;;N;;;;;
+ 122F2;CUNEIFORM SIGN TAB SQUARED;Lo;0;L;;;;;N;;;;;
+ 122F3;CUNEIFORM SIGN TAG;Lo;0;L;;;;;N;;;;;
+ 122F4;CUNEIFORM SIGN TAG TIMES BI;Lo;0;L;;;;;N;;;;;
+ 122F5;CUNEIFORM SIGN TAG TIMES GUD;Lo;0;L;;;;;N;;;;;
+ 122F6;CUNEIFORM SIGN TAG TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 122F7;CUNEIFORM SIGN TAG TIMES SHU;Lo;0;L;;;;;N;;;;;
+ 122F8;CUNEIFORM SIGN TAG TIMES TUG2;Lo;0;L;;;;;N;;;;;
+ 122F9;CUNEIFORM SIGN TAG TIMES UD;Lo;0;L;;;;;N;;;;;
+ 122FA;CUNEIFORM SIGN TAK4;Lo;0;L;;;;;N;;;;;
+ 122FB;CUNEIFORM SIGN TAR;Lo;0;L;;;;;N;;;;;
+ 122FC;CUNEIFORM SIGN TE;Lo;0;L;;;;;N;;;;;
+ 122FD;CUNEIFORM SIGN TE GUNU;Lo;0;L;;;;;N;;;;;
+ 122FE;CUNEIFORM SIGN TI;Lo;0;L;;;;;N;;;;;
+ 122FF;CUNEIFORM SIGN TI TENU;Lo;0;L;;;;;N;;;;;
+ 12300;CUNEIFORM SIGN TIL;Lo;0;L;;;;;N;;;;;
+ 12301;CUNEIFORM SIGN TIR;Lo;0;L;;;;;N;;;;;
+ 12302;CUNEIFORM SIGN TIR TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 12303;CUNEIFORM SIGN TIR OVER TIR;Lo;0;L;;;;;N;;;;;
+ 12304;CUNEIFORM SIGN TIR OVER TIR GAD OVER GAD GAR OVER GAR;Lo;0;L;;;;;N;;;;;
+ 12305;CUNEIFORM SIGN TU;Lo;0;L;;;;;N;;;;;
+ 12306;CUNEIFORM SIGN TUG2;Lo;0;L;;;;;N;;;;;
+ 12307;CUNEIFORM SIGN TUK;Lo;0;L;;;;;N;;;;;
+ 12308;CUNEIFORM SIGN TUM;Lo;0;L;;;;;N;;;;;
+ 12309;CUNEIFORM SIGN TUR;Lo;0;L;;;;;N;;;;;
+ 1230A;CUNEIFORM SIGN TUR OVER TUR ZA OVER ZA;Lo;0;L;;;;;N;;;;;
+ 1230B;CUNEIFORM SIGN U;Lo;0;L;;;;;N;;;;;
+ 1230C;CUNEIFORM SIGN U GUD;Lo;0;L;;;;;N;;;;;
+ 1230D;CUNEIFORM SIGN U U U;Lo;0;L;;;;;N;;;;;
+ 1230E;CUNEIFORM SIGN U OVER U PA OVER PA GAR OVER GAR;Lo;0;L;;;;;N;;;;;
+ 1230F;CUNEIFORM SIGN U OVER U SUR OVER SUR;Lo;0;L;;;;;N;;;;;
+ 12310;CUNEIFORM SIGN U OVER U U REVERSED OVER U REVERSED;Lo;0;L;;;;;N;;;;;
+ 12311;CUNEIFORM SIGN U2;Lo;0;L;;;;;N;;;;;
+ 12312;CUNEIFORM SIGN UB;Lo;0;L;;;;;N;;;;;
+ 12313;CUNEIFORM SIGN UD;Lo;0;L;;;;;N;;;;;
+ 12314;CUNEIFORM SIGN UD KUSHU2;Lo;0;L;;;;;N;;;;;
+ 12315;CUNEIFORM SIGN UD TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 12316;CUNEIFORM SIGN UD TIMES MI;Lo;0;L;;;;;N;;;;;
+ 12317;CUNEIFORM SIGN UD TIMES U PLUS U PLUS U;Lo;0;L;;;;;N;;;;;
+ 12318;CUNEIFORM SIGN UD TIMES U PLUS U PLUS U GUNU;Lo;0;L;;;;;N;;;;;
+ 12319;CUNEIFORM SIGN UD GUNU;Lo;0;L;;;;;N;;;;;
+ 1231A;CUNEIFORM SIGN UD SHESHIG;Lo;0;L;;;;;N;;;;;
+ 1231B;CUNEIFORM SIGN UD SHESHIG TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 1231C;CUNEIFORM SIGN UDUG;Lo;0;L;;;;;N;;;;;
+ 1231D;CUNEIFORM SIGN UM;Lo;0;L;;;;;N;;;;;
+ 1231E;CUNEIFORM SIGN UM TIMES LAGAB;Lo;0;L;;;;;N;;;;;
+ 1231F;CUNEIFORM SIGN UM TIMES ME PLUS DA;Lo;0;L;;;;;N;;;;;
+ 12320;CUNEIFORM SIGN UM TIMES SHA3;Lo;0;L;;;;;N;;;;;
+ 12321;CUNEIFORM SIGN UM TIMES U;Lo;0;L;;;;;N;;;;;
+ 12322;CUNEIFORM SIGN UMBIN;Lo;0;L;;;;;N;;;;;
+ 12323;CUNEIFORM SIGN UMUM;Lo;0;L;;;;;N;;;;;
+ 12324;CUNEIFORM SIGN UMUM TIMES KASKAL;Lo;0;L;;;;;N;;;;;
+ 12325;CUNEIFORM SIGN UMUM TIMES PA;Lo;0;L;;;;;N;;;;;
+ 12326;CUNEIFORM SIGN UN;Lo;0;L;;;;;N;;;;;
+ 12327;CUNEIFORM SIGN UN GUNU;Lo;0;L;;;;;N;;;;;
+ 12328;CUNEIFORM SIGN UR;Lo;0;L;;;;;N;;;;;
+ 12329;CUNEIFORM SIGN UR CROSSING UR;Lo;0;L;;;;;N;;;;;
+ 1232A;CUNEIFORM SIGN UR SHESHIG;Lo;0;L;;;;;N;;;;;
+ 1232B;CUNEIFORM SIGN UR2;Lo;0;L;;;;;N;;;;;
+ 1232C;CUNEIFORM SIGN UR2 TIMES A PLUS HA;Lo;0;L;;;;;N;;;;;
+ 1232D;CUNEIFORM SIGN UR2 TIMES A PLUS NA;Lo;0;L;;;;;N;;;;;
+ 1232E;CUNEIFORM SIGN UR2 TIMES AL;Lo;0;L;;;;;N;;;;;
+ 1232F;CUNEIFORM SIGN UR2 TIMES HA;Lo;0;L;;;;;N;;;;;
+ 12330;CUNEIFORM SIGN UR2 TIMES NUN;Lo;0;L;;;;;N;;;;;
+ 12331;CUNEIFORM SIGN UR2 TIMES U2;Lo;0;L;;;;;N;;;;;
+ 12332;CUNEIFORM SIGN UR2 TIMES U2 PLUS ASH;Lo;0;L;;;;;N;;;;;
+ 12333;CUNEIFORM SIGN UR2 TIMES U2 PLUS BI;Lo;0;L;;;;;N;;;;;
+ 12334;CUNEIFORM SIGN UR4;Lo;0;L;;;;;N;;;;;
+ 12335;CUNEIFORM SIGN URI;Lo;0;L;;;;;N;;;;;
+ 12336;CUNEIFORM SIGN URI3;Lo;0;L;;;;;N;;;;;
+ 12337;CUNEIFORM SIGN URU;Lo;0;L;;;;;N;;;;;
+ 12338;CUNEIFORM SIGN URU TIMES A;Lo;0;L;;;;;N;;;;;
+ 12339;CUNEIFORM SIGN URU TIMES ASHGAB;Lo;0;L;;;;;N;;;;;
+ 1233A;CUNEIFORM SIGN URU TIMES BAR;Lo;0;L;;;;;N;;;;;
+ 1233B;CUNEIFORM SIGN URU TIMES DUN;Lo;0;L;;;;;N;;;;;
+ 1233C;CUNEIFORM SIGN URU TIMES GA;Lo;0;L;;;;;N;;;;;
+ 1233D;CUNEIFORM SIGN URU TIMES GAL;Lo;0;L;;;;;N;;;;;
+ 1233E;CUNEIFORM SIGN URU TIMES GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 1233F;CUNEIFORM SIGN URU TIMES GAR;Lo;0;L;;;;;N;;;;;
+ 12340;CUNEIFORM SIGN URU TIMES GU;Lo;0;L;;;;;N;;;;;
+ 12341;CUNEIFORM SIGN URU TIMES HA;Lo;0;L;;;;;N;;;;;
+ 12342;CUNEIFORM SIGN URU TIMES IGI;Lo;0;L;;;;;N;;;;;
+ 12343;CUNEIFORM SIGN URU TIMES IM;Lo;0;L;;;;;N;;;;;
+ 12344;CUNEIFORM SIGN URU TIMES ISH;Lo;0;L;;;;;N;;;;;
+ 12345;CUNEIFORM SIGN URU TIMES KI;Lo;0;L;;;;;N;;;;;
+ 12346;CUNEIFORM SIGN URU TIMES LUM;Lo;0;L;;;;;N;;;;;
+ 12347;CUNEIFORM SIGN URU TIMES MIN;Lo;0;L;;;;;N;;;;;
+ 12348;CUNEIFORM SIGN URU TIMES PA;Lo;0;L;;;;;N;;;;;
+ 12349;CUNEIFORM SIGN URU TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 1234A;CUNEIFORM SIGN URU TIMES SIG4;Lo;0;L;;;;;N;;;;;
+ 1234B;CUNEIFORM SIGN URU TIMES TU;Lo;0;L;;;;;N;;;;;
+ 1234C;CUNEIFORM SIGN URU TIMES U PLUS GUD;Lo;0;L;;;;;N;;;;;
+ 1234D;CUNEIFORM SIGN URU TIMES UD;Lo;0;L;;;;;N;;;;;
+ 1234E;CUNEIFORM SIGN URU TIMES URUDA;Lo;0;L;;;;;N;;;;;
+ 1234F;CUNEIFORM SIGN URUDA;Lo;0;L;;;;;N;;;;;
+ 12350;CUNEIFORM SIGN URUDA TIMES U;Lo;0;L;;;;;N;;;;;
+ 12351;CUNEIFORM SIGN USH;Lo;0;L;;;;;N;;;;;
+ 12352;CUNEIFORM SIGN USH TIMES A;Lo;0;L;;;;;N;;;;;
+ 12353;CUNEIFORM SIGN USH TIMES KU;Lo;0;L;;;;;N;;;;;
+ 12354;CUNEIFORM SIGN USH TIMES KUR;Lo;0;L;;;;;N;;;;;
+ 12355;CUNEIFORM SIGN USH TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 12356;CUNEIFORM SIGN USHX;Lo;0;L;;;;;N;;;;;
+ 12357;CUNEIFORM SIGN USH2;Lo;0;L;;;;;N;;;;;
+ 12358;CUNEIFORM SIGN USHUMX;Lo;0;L;;;;;N;;;;;
+ 12359;CUNEIFORM SIGN UTUKI;Lo;0;L;;;;;N;;;;;
+ 1235A;CUNEIFORM SIGN UZ3;Lo;0;L;;;;;N;;;;;
+ 1235B;CUNEIFORM SIGN UZ3 TIMES KASKAL;Lo;0;L;;;;;N;;;;;
+ 1235C;CUNEIFORM SIGN UZU;Lo;0;L;;;;;N;;;;;
+ 1235D;CUNEIFORM SIGN ZA;Lo;0;L;;;;;N;;;;;
+ 1235E;CUNEIFORM SIGN ZA TENU;Lo;0;L;;;;;N;;;;;
+ 1235F;CUNEIFORM SIGN ZA SQUARED TIMES KUR;Lo;0;L;;;;;N;;;;;
+ 12360;CUNEIFORM SIGN ZAG;Lo;0;L;;;;;N;;;;;
+ 12361;CUNEIFORM SIGN ZAMX;Lo;0;L;;;;;N;;;;;
+ 12362;CUNEIFORM SIGN ZE2;Lo;0;L;;;;;N;;;;;
+ 12363;CUNEIFORM SIGN ZI;Lo;0;L;;;;;N;;;;;
+ 12364;CUNEIFORM SIGN ZI OVER ZI;Lo;0;L;;;;;N;;;;;
+ 12365;CUNEIFORM SIGN ZI3;Lo;0;L;;;;;N;;;;;
+ 12366;CUNEIFORM SIGN ZIB;Lo;0;L;;;;;N;;;;;
+ 12367;CUNEIFORM SIGN ZIB KABA TENU;Lo;0;L;;;;;N;;;;;
+ 12368;CUNEIFORM SIGN ZIG;Lo;0;L;;;;;N;;;;;
+ 12369;CUNEIFORM SIGN ZIZ2;Lo;0;L;;;;;N;;;;;
+ 1236A;CUNEIFORM SIGN ZU;Lo;0;L;;;;;N;;;;;
+ 1236B;CUNEIFORM SIGN ZU5;Lo;0;L;;;;;N;;;;;
+ 1236C;CUNEIFORM SIGN ZU5 TIMES A;Lo;0;L;;;;;N;;;;;
+ 1236D;CUNEIFORM SIGN ZUBUR;Lo;0;L;;;;;N;;;;;
+ 1236E;CUNEIFORM SIGN ZUM;Lo;0;L;;;;;N;;;;;
+ 1236F;CUNEIFORM SIGN KAP ELAMITE;Lo;0;L;;;;;N;;;;;
+ 12370;CUNEIFORM SIGN AB TIMES NUN;Lo;0;L;;;;;N;;;;;
+ 12371;CUNEIFORM SIGN AB2 TIMES A;Lo;0;L;;;;;N;;;;;
+ 12372;CUNEIFORM SIGN AMAR TIMES KUG;Lo;0;L;;;;;N;;;;;
+ 12373;CUNEIFORM SIGN DAG KISIM5 TIMES U2 PLUS MASH;Lo;0;L;;;;;N;;;;;
+ 12374;CUNEIFORM SIGN DAG3;Lo;0;L;;;;;N;;;;;
+ 12375;CUNEIFORM SIGN DISH PLUS SHU;Lo;0;L;;;;;N;;;;;
+ 12376;CUNEIFORM SIGN DUB TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 12377;CUNEIFORM SIGN EZEN TIMES GUD;Lo;0;L;;;;;N;;;;;
+ 12378;CUNEIFORM SIGN EZEN TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 12379;CUNEIFORM SIGN GA2 TIMES AN PLUS KAK PLUS A;Lo;0;L;;;;;N;;;;;
+ 1237A;CUNEIFORM SIGN GA2 TIMES ASH2;Lo;0;L;;;;;N;;;;;
+ 1237B;CUNEIFORM SIGN GE22;Lo;0;L;;;;;N;;;;;
+ 1237C;CUNEIFORM SIGN GIG;Lo;0;L;;;;;N;;;;;
+ 1237D;CUNEIFORM SIGN HUSH;Lo;0;L;;;;;N;;;;;
+ 1237E;CUNEIFORM SIGN KA TIMES ANSHE;Lo;0;L;;;;;N;;;;;
+ 1237F;CUNEIFORM SIGN KA TIMES ASH3;Lo;0;L;;;;;N;;;;;
+ 12380;CUNEIFORM SIGN KA TIMES GISH;Lo;0;L;;;;;N;;;;;
+ 12381;CUNEIFORM SIGN KA TIMES GUD;Lo;0;L;;;;;N;;;;;
+ 12382;CUNEIFORM SIGN KA TIMES HI TIMES ASH2;Lo;0;L;;;;;N;;;;;
+ 12383;CUNEIFORM SIGN KA TIMES LUM;Lo;0;L;;;;;N;;;;;
+ 12384;CUNEIFORM SIGN KA TIMES PA;Lo;0;L;;;;;N;;;;;
+ 12385;CUNEIFORM SIGN KA TIMES SHUL;Lo;0;L;;;;;N;;;;;
+ 12386;CUNEIFORM SIGN KA TIMES TU;Lo;0;L;;;;;N;;;;;
+ 12387;CUNEIFORM SIGN KA TIMES UR2;Lo;0;L;;;;;N;;;;;
+ 12388;CUNEIFORM SIGN LAGAB TIMES GI;Lo;0;L;;;;;N;;;;;
+ 12389;CUNEIFORM SIGN LU2 SHESHIG TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 1238A;CUNEIFORM SIGN LU2 TIMES ESH2 PLUS LAL;Lo;0;L;;;;;N;;;;;
+ 1238B;CUNEIFORM SIGN LU2 TIMES SHU;Lo;0;L;;;;;N;;;;;
+ 1238C;CUNEIFORM SIGN MESH;Lo;0;L;;;;;N;;;;;
+ 1238D;CUNEIFORM SIGN MUSH3 TIMES ZA;Lo;0;L;;;;;N;;;;;
+ 1238E;CUNEIFORM SIGN NA4;Lo;0;L;;;;;N;;;;;
+ 1238F;CUNEIFORM SIGN NIN;Lo;0;L;;;;;N;;;;;
+ 12390;CUNEIFORM SIGN NIN9;Lo;0;L;;;;;N;;;;;
+ 12391;CUNEIFORM SIGN NINDA2 TIMES BAL;Lo;0;L;;;;;N;;;;;
+ 12392;CUNEIFORM SIGN NINDA2 TIMES GI;Lo;0;L;;;;;N;;;;;
+ 12393;CUNEIFORM SIGN NU11 ROTATED NINETY DEGREES;Lo;0;L;;;;;N;;;;;
+ 12394;CUNEIFORM SIGN PESH2 ASTERISK;Lo;0;L;;;;;N;;;;;
+ 12395;CUNEIFORM SIGN PIR2;Lo;0;L;;;;;N;;;;;
+ 12396;CUNEIFORM SIGN SAG TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 12397;CUNEIFORM SIGN TI2;Lo;0;L;;;;;N;;;;;
+ 12398;CUNEIFORM SIGN UM TIMES ME;Lo;0;L;;;;;N;;;;;
+ 12399;CUNEIFORM SIGN U U;Lo;0;L;;;;;N;;;;;
+ 12400;CUNEIFORM NUMERIC SIGN TWO ASH;Nl;0;L;;;;2;N;;;;;
+ 12401;CUNEIFORM NUMERIC SIGN THREE ASH;Nl;0;L;;;;3;N;;;;;
+ 12402;CUNEIFORM NUMERIC SIGN FOUR ASH;Nl;0;L;;;;4;N;;;;;
+ 12403;CUNEIFORM NUMERIC SIGN FIVE ASH;Nl;0;L;;;;5;N;;;;;
+ 12404;CUNEIFORM NUMERIC SIGN SIX ASH;Nl;0;L;;;;6;N;;;;;
+ 12405;CUNEIFORM NUMERIC SIGN SEVEN ASH;Nl;0;L;;;;7;N;;;;;
+ 12406;CUNEIFORM NUMERIC SIGN EIGHT ASH;Nl;0;L;;;;8;N;;;;;
+ 12407;CUNEIFORM NUMERIC SIGN NINE ASH;Nl;0;L;;;;9;N;;;;;
+ 12408;CUNEIFORM NUMERIC SIGN THREE DISH;Nl;0;L;;;;3;N;;;;;
+ 12409;CUNEIFORM NUMERIC SIGN FOUR DISH;Nl;0;L;;;;4;N;;;;;
+ 1240A;CUNEIFORM NUMERIC SIGN FIVE DISH;Nl;0;L;;;;5;N;;;;;
+ 1240B;CUNEIFORM NUMERIC SIGN SIX DISH;Nl;0;L;;;;6;N;;;;;
+ 1240C;CUNEIFORM NUMERIC SIGN SEVEN DISH;Nl;0;L;;;;7;N;;;;;
+ 1240D;CUNEIFORM NUMERIC SIGN EIGHT DISH;Nl;0;L;;;;8;N;;;;;
+ 1240E;CUNEIFORM NUMERIC SIGN NINE DISH;Nl;0;L;;;;9;N;;;;;
+ 1240F;CUNEIFORM NUMERIC SIGN FOUR U;Nl;0;L;;;;4;N;;;;;
+ 12410;CUNEIFORM NUMERIC SIGN FIVE U;Nl;0;L;;;;5;N;;;;;
+ 12411;CUNEIFORM NUMERIC SIGN SIX U;Nl;0;L;;;;6;N;;;;;
+ 12412;CUNEIFORM NUMERIC SIGN SEVEN U;Nl;0;L;;;;7;N;;;;;
+ 12413;CUNEIFORM NUMERIC SIGN EIGHT U;Nl;0;L;;;;8;N;;;;;
+ 12414;CUNEIFORM NUMERIC SIGN NINE U;Nl;0;L;;;;9;N;;;;;
+ 12415;CUNEIFORM NUMERIC SIGN ONE GESH2;Nl;0;L;;;;1;N;;;;;
+ 12416;CUNEIFORM NUMERIC SIGN TWO GESH2;Nl;0;L;;;;2;N;;;;;
+ 12417;CUNEIFORM NUMERIC SIGN THREE GESH2;Nl;0;L;;;;3;N;;;;;
+ 12418;CUNEIFORM NUMERIC SIGN FOUR GESH2;Nl;0;L;;;;4;N;;;;;
+ 12419;CUNEIFORM NUMERIC SIGN FIVE GESH2;Nl;0;L;;;;5;N;;;;;
+ 1241A;CUNEIFORM NUMERIC SIGN SIX GESH2;Nl;0;L;;;;6;N;;;;;
+ 1241B;CUNEIFORM NUMERIC SIGN SEVEN GESH2;Nl;0;L;;;;7;N;;;;;
+ 1241C;CUNEIFORM NUMERIC SIGN EIGHT GESH2;Nl;0;L;;;;8;N;;;;;
+ 1241D;CUNEIFORM NUMERIC SIGN NINE GESH2;Nl;0;L;;;;9;N;;;;;
+ 1241E;CUNEIFORM NUMERIC SIGN ONE GESHU;Nl;0;L;;;;1;N;;;;;
+ 1241F;CUNEIFORM NUMERIC SIGN TWO GESHU;Nl;0;L;;;;2;N;;;;;
+ 12420;CUNEIFORM NUMERIC SIGN THREE GESHU;Nl;0;L;;;;3;N;;;;;
+ 12421;CUNEIFORM NUMERIC SIGN FOUR GESHU;Nl;0;L;;;;4;N;;;;;
+ 12422;CUNEIFORM NUMERIC SIGN FIVE GESHU;Nl;0;L;;;;5;N;;;;;
+ 12423;CUNEIFORM NUMERIC SIGN TWO SHAR2;Nl;0;L;;;;2;N;;;;;
+ 12424;CUNEIFORM NUMERIC SIGN THREE SHAR2;Nl;0;L;;;;3;N;;;;;
+ 12425;CUNEIFORM NUMERIC SIGN THREE SHAR2 VARIANT FORM;Nl;0;L;;;;3;N;;;;;
+ 12426;CUNEIFORM NUMERIC SIGN FOUR SHAR2;Nl;0;L;;;;4;N;;;;;
+ 12427;CUNEIFORM NUMERIC SIGN FIVE SHAR2;Nl;0;L;;;;5;N;;;;;
+ 12428;CUNEIFORM NUMERIC SIGN SIX SHAR2;Nl;0;L;;;;6;N;;;;;
+ 12429;CUNEIFORM NUMERIC SIGN SEVEN SHAR2;Nl;0;L;;;;7;N;;;;;
+ 1242A;CUNEIFORM NUMERIC SIGN EIGHT SHAR2;Nl;0;L;;;;8;N;;;;;
+ 1242B;CUNEIFORM NUMERIC SIGN NINE SHAR2;Nl;0;L;;;;9;N;;;;;
+ 1242C;CUNEIFORM NUMERIC SIGN ONE SHARU;Nl;0;L;;;;1;N;;;;;
+ 1242D;CUNEIFORM NUMERIC SIGN TWO SHARU;Nl;0;L;;;;2;N;;;;;
+ 1242E;CUNEIFORM NUMERIC SIGN THREE SHARU;Nl;0;L;;;;3;N;;;;;
+ 1242F;CUNEIFORM NUMERIC SIGN THREE SHARU VARIANT FORM;Nl;0;L;;;;3;N;;;;;
+ 12430;CUNEIFORM NUMERIC SIGN FOUR SHARU;Nl;0;L;;;;4;N;;;;;
+ 12431;CUNEIFORM NUMERIC SIGN FIVE SHARU;Nl;0;L;;;;5;N;;;;;
+ 12432;CUNEIFORM NUMERIC SIGN SHAR2 TIMES GAL PLUS DISH;Nl;0;L;;;;216000;N;;;;;
+ 12433;CUNEIFORM NUMERIC SIGN SHAR2 TIMES GAL PLUS MIN;Nl;0;L;;;;432000;N;;;;;
+ 12434;CUNEIFORM NUMERIC SIGN ONE BURU;Nl;0;L;;;;1;N;;;;;
+ 12435;CUNEIFORM NUMERIC SIGN TWO BURU;Nl;0;L;;;;2;N;;;;;
+ 12436;CUNEIFORM NUMERIC SIGN THREE BURU;Nl;0;L;;;;3;N;;;;;
+ 12437;CUNEIFORM NUMERIC SIGN THREE BURU VARIANT FORM;Nl;0;L;;;;3;N;;;;;
+ 12438;CUNEIFORM NUMERIC SIGN FOUR BURU;Nl;0;L;;;;4;N;;;;;
+ 12439;CUNEIFORM NUMERIC SIGN FIVE BURU;Nl;0;L;;;;5;N;;;;;
+ 1243A;CUNEIFORM NUMERIC SIGN THREE VARIANT FORM ESH16;Nl;0;L;;;;3;N;;;;;
+ 1243B;CUNEIFORM NUMERIC SIGN THREE VARIANT FORM ESH21;Nl;0;L;;;;3;N;;;;;
+ 1243C;CUNEIFORM NUMERIC SIGN FOUR VARIANT FORM LIMMU;Nl;0;L;;;;4;N;;;;;
+ 1243D;CUNEIFORM NUMERIC SIGN FOUR VARIANT FORM LIMMU4;Nl;0;L;;;;4;N;;;;;
+ 1243E;CUNEIFORM NUMERIC SIGN FOUR VARIANT FORM LIMMU A;Nl;0;L;;;;4;N;;;;;
+ 1243F;CUNEIFORM NUMERIC SIGN FOUR VARIANT FORM LIMMU B;Nl;0;L;;;;4;N;;;;;
+ 12440;CUNEIFORM NUMERIC SIGN SIX VARIANT FORM ASH9;Nl;0;L;;;;6;N;;;;;
+ 12441;CUNEIFORM NUMERIC SIGN SEVEN VARIANT FORM IMIN3;Nl;0;L;;;;7;N;;;;;
+ 12442;CUNEIFORM NUMERIC SIGN SEVEN VARIANT FORM IMIN A;Nl;0;L;;;;7;N;;;;;
+ 12443;CUNEIFORM NUMERIC SIGN SEVEN VARIANT FORM IMIN B;Nl;0;L;;;;7;N;;;;;
+ 12444;CUNEIFORM NUMERIC SIGN EIGHT VARIANT FORM USSU;Nl;0;L;;;;8;N;;;;;
+ 12445;CUNEIFORM NUMERIC SIGN EIGHT VARIANT FORM USSU3;Nl;0;L;;;;8;N;;;;;
+ 12446;CUNEIFORM NUMERIC SIGN NINE VARIANT FORM ILIMMU;Nl;0;L;;;;9;N;;;;;
+ 12447;CUNEIFORM NUMERIC SIGN NINE VARIANT FORM ILIMMU3;Nl;0;L;;;;9;N;;;;;
+ 12448;CUNEIFORM NUMERIC SIGN NINE VARIANT FORM ILIMMU4;Nl;0;L;;;;9;N;;;;;
+ 12449;CUNEIFORM NUMERIC SIGN NINE VARIANT FORM ILIMMU A;Nl;0;L;;;;9;N;;;;;
+ 1244A;CUNEIFORM NUMERIC SIGN TWO ASH TENU;Nl;0;L;;;;2;N;;;;;
+ 1244B;CUNEIFORM NUMERIC SIGN THREE ASH TENU;Nl;0;L;;;;3;N;;;;;
+ 1244C;CUNEIFORM NUMERIC SIGN FOUR ASH TENU;Nl;0;L;;;;4;N;;;;;
+ 1244D;CUNEIFORM NUMERIC SIGN FIVE ASH TENU;Nl;0;L;;;;5;N;;;;;
+ 1244E;CUNEIFORM NUMERIC SIGN SIX ASH TENU;Nl;0;L;;;;6;N;;;;;
+ 1244F;CUNEIFORM NUMERIC SIGN ONE BAN2;Nl;0;L;;;;1;N;;;;;
+ 12450;CUNEIFORM NUMERIC SIGN TWO BAN2;Nl;0;L;;;;2;N;;;;;
+ 12451;CUNEIFORM NUMERIC SIGN THREE BAN2;Nl;0;L;;;;3;N;;;;;
+ 12452;CUNEIFORM NUMERIC SIGN FOUR BAN2;Nl;0;L;;;;4;N;;;;;
+ 12453;CUNEIFORM NUMERIC SIGN FOUR BAN2 VARIANT FORM;Nl;0;L;;;;4;N;;;;;
+ 12454;CUNEIFORM NUMERIC SIGN FIVE BAN2;Nl;0;L;;;;5;N;;;;;
+ 12455;CUNEIFORM NUMERIC SIGN FIVE BAN2 VARIANT FORM;Nl;0;L;;;;5;N;;;;;
+ 12456;CUNEIFORM NUMERIC SIGN NIGIDAMIN;Nl;0;L;;;;2;N;;;;;
+ 12457;CUNEIFORM NUMERIC SIGN NIGIDAESH;Nl;0;L;;;;3;N;;;;;
+ 12458;CUNEIFORM NUMERIC SIGN ONE ESHE3;Nl;0;L;;;;1;N;;;;;
+ 12459;CUNEIFORM NUMERIC SIGN TWO ESHE3;Nl;0;L;;;;2;N;;;;;
+ 1245A;CUNEIFORM NUMERIC SIGN ONE THIRD DISH;Nl;0;L;;;;1/3;N;;;;;
+ 1245B;CUNEIFORM NUMERIC SIGN TWO THIRDS DISH;Nl;0;L;;;;2/3;N;;;;;
+ 1245C;CUNEIFORM NUMERIC SIGN FIVE SIXTHS DISH;Nl;0;L;;;;5/6;N;;;;;
+ 1245D;CUNEIFORM NUMERIC SIGN ONE THIRD VARIANT FORM A;Nl;0;L;;;;1/3;N;;;;;
+ 1245E;CUNEIFORM NUMERIC SIGN TWO THIRDS VARIANT FORM A;Nl;0;L;;;;2/3;N;;;;;
+ 1245F;CUNEIFORM NUMERIC SIGN ONE EIGHTH ASH;Nl;0;L;;;;1/8;N;;;;;
+ 12460;CUNEIFORM NUMERIC SIGN ONE QUARTER ASH;Nl;0;L;;;;1/4;N;;;;;
+ 12461;CUNEIFORM NUMERIC SIGN OLD ASSYRIAN ONE SIXTH;Nl;0;L;;;;1/6;N;;;;;
+ 12462;CUNEIFORM NUMERIC SIGN OLD ASSYRIAN ONE QUARTER;Nl;0;L;;;;1/4;N;;;;;
+ 12463;CUNEIFORM NUMERIC SIGN ONE QUARTER GUR;Nl;0;L;;;;1/4;N;;;;;
+ 12464;CUNEIFORM NUMERIC SIGN ONE HALF GUR;Nl;0;L;;;;1/2;N;;;;;
+ 12465;CUNEIFORM NUMERIC SIGN ELAMITE ONE THIRD;Nl;0;L;;;;1/3;N;;;;;
+ 12466;CUNEIFORM NUMERIC SIGN ELAMITE TWO THIRDS;Nl;0;L;;;;2/3;N;;;;;
+ 12467;CUNEIFORM NUMERIC SIGN ELAMITE FORTY;Nl;0;L;;;;40;N;;;;;
+ 12468;CUNEIFORM NUMERIC SIGN ELAMITE FIFTY;Nl;0;L;;;;50;N;;;;;
+ 12469;CUNEIFORM NUMERIC SIGN FOUR U VARIANT FORM;Nl;0;L;;;;4;N;;;;;
+ 1246A;CUNEIFORM NUMERIC SIGN FIVE U VARIANT FORM;Nl;0;L;;;;5;N;;;;;
+ 1246B;CUNEIFORM NUMERIC SIGN SIX U VARIANT FORM;Nl;0;L;;;;6;N;;;;;
+ 1246C;CUNEIFORM NUMERIC SIGN SEVEN U VARIANT FORM;Nl;0;L;;;;7;N;;;;;
+ 1246D;CUNEIFORM NUMERIC SIGN EIGHT U VARIANT FORM;Nl;0;L;;;;8;N;;;;;
+ 1246E;CUNEIFORM NUMERIC SIGN NINE U VARIANT FORM;Nl;0;L;;;;9;N;;;;;
+ 12470;CUNEIFORM PUNCTUATION SIGN OLD ASSYRIAN WORD DIVIDER;Po;0;L;;;;;N;;;;;
+ 12471;CUNEIFORM PUNCTUATION SIGN VERTICAL COLON;Po;0;L;;;;;N;;;;;
+ 12472;CUNEIFORM PUNCTUATION SIGN DIAGONAL COLON;Po;0;L;;;;;N;;;;;
+ 12473;CUNEIFORM PUNCTUATION SIGN DIAGONAL TRICOLON;Po;0;L;;;;;N;;;;;
+ 12474;CUNEIFORM PUNCTUATION SIGN DIAGONAL QUADCOLON;Po;0;L;;;;;N;;;;;
+ 12480;CUNEIFORM SIGN AB TIMES NUN TENU;Lo;0;L;;;;;N;;;;;
+ 12481;CUNEIFORM SIGN AB TIMES SHU2;Lo;0;L;;;;;N;;;;;
+ 12482;CUNEIFORM SIGN AD TIMES ESH2;Lo;0;L;;;;;N;;;;;
+ 12483;CUNEIFORM SIGN BAD TIMES DISH TENU;Lo;0;L;;;;;N;;;;;
+ 12484;CUNEIFORM SIGN BAHAR2 TIMES AB2;Lo;0;L;;;;;N;;;;;
+ 12485;CUNEIFORM SIGN BAHAR2 TIMES NI;Lo;0;L;;;;;N;;;;;
+ 12486;CUNEIFORM SIGN BAHAR2 TIMES ZA;Lo;0;L;;;;;N;;;;;
+ 12487;CUNEIFORM SIGN BU OVER BU TIMES NA2;Lo;0;L;;;;;N;;;;;
+ 12488;CUNEIFORM SIGN DA TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 12489;CUNEIFORM SIGN DAG TIMES KUR;Lo;0;L;;;;;N;;;;;
+ 1248A;CUNEIFORM SIGN DIM TIMES IGI;Lo;0;L;;;;;N;;;;;
+ 1248B;CUNEIFORM SIGN DIM TIMES U U U;Lo;0;L;;;;;N;;;;;
+ 1248C;CUNEIFORM SIGN DIM2 TIMES UD;Lo;0;L;;;;;N;;;;;
+ 1248D;CUNEIFORM SIGN DUG TIMES ANSHE;Lo;0;L;;;;;N;;;;;
+ 1248E;CUNEIFORM SIGN DUG TIMES ASH;Lo;0;L;;;;;N;;;;;
+ 1248F;CUNEIFORM SIGN DUG TIMES ASH AT LEFT;Lo;0;L;;;;;N;;;;;
+ 12490;CUNEIFORM SIGN DUG TIMES DIN;Lo;0;L;;;;;N;;;;;
+ 12491;CUNEIFORM SIGN DUG TIMES DUN;Lo;0;L;;;;;N;;;;;
+ 12492;CUNEIFORM SIGN DUG TIMES ERIN2;Lo;0;L;;;;;N;;;;;
+ 12493;CUNEIFORM SIGN DUG TIMES GA;Lo;0;L;;;;;N;;;;;
+ 12494;CUNEIFORM SIGN DUG TIMES GI;Lo;0;L;;;;;N;;;;;
+ 12495;CUNEIFORM SIGN DUG TIMES GIR2 GUNU;Lo;0;L;;;;;N;;;;;
+ 12496;CUNEIFORM SIGN DUG TIMES GISH;Lo;0;L;;;;;N;;;;;
+ 12497;CUNEIFORM SIGN DUG TIMES HA;Lo;0;L;;;;;N;;;;;
+ 12498;CUNEIFORM SIGN DUG TIMES HI;Lo;0;L;;;;;N;;;;;
+ 12499;CUNEIFORM SIGN DUG TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 1249A;CUNEIFORM SIGN DUG TIMES KASKAL;Lo;0;L;;;;;N;;;;;
+ 1249B;CUNEIFORM SIGN DUG TIMES KUR;Lo;0;L;;;;;N;;;;;
+ 1249C;CUNEIFORM SIGN DUG TIMES KUSHU2;Lo;0;L;;;;;N;;;;;
+ 1249D;CUNEIFORM SIGN DUG TIMES KUSHU2 PLUS KASKAL;Lo;0;L;;;;;N;;;;;
+ 1249E;CUNEIFORM SIGN DUG TIMES LAK-020;Lo;0;L;;;;;N;;;;;
+ 1249F;CUNEIFORM SIGN DUG TIMES LAM;Lo;0;L;;;;;N;;;;;
+ 124A0;CUNEIFORM SIGN DUG TIMES LAM TIMES KUR;Lo;0;L;;;;;N;;;;;
+ 124A1;CUNEIFORM SIGN DUG TIMES LUH PLUS GISH;Lo;0;L;;;;;N;;;;;
+ 124A2;CUNEIFORM SIGN DUG TIMES MASH;Lo;0;L;;;;;N;;;;;
+ 124A3;CUNEIFORM SIGN DUG TIMES MES;Lo;0;L;;;;;N;;;;;
+ 124A4;CUNEIFORM SIGN DUG TIMES MI;Lo;0;L;;;;;N;;;;;
+ 124A5;CUNEIFORM SIGN DUG TIMES NI;Lo;0;L;;;;;N;;;;;
+ 124A6;CUNEIFORM SIGN DUG TIMES PI;Lo;0;L;;;;;N;;;;;
+ 124A7;CUNEIFORM SIGN DUG TIMES SHE;Lo;0;L;;;;;N;;;;;
+ 124A8;CUNEIFORM SIGN DUG TIMES SI GUNU;Lo;0;L;;;;;N;;;;;
+ 124A9;CUNEIFORM SIGN E2 TIMES KUR;Lo;0;L;;;;;N;;;;;
+ 124AA;CUNEIFORM SIGN E2 TIMES PAP;Lo;0;L;;;;;N;;;;;
+ 124AB;CUNEIFORM SIGN ERIN2 X;Lo;0;L;;;;;N;;;;;
+ 124AC;CUNEIFORM SIGN ESH2 CROSSING ESH2;Lo;0;L;;;;;N;;;;;
+ 124AD;CUNEIFORM SIGN EZEN SHESHIG TIMES ASH;Lo;0;L;;;;;N;;;;;
+ 124AE;CUNEIFORM SIGN EZEN SHESHIG TIMES HI;Lo;0;L;;;;;N;;;;;
+ 124AF;CUNEIFORM SIGN EZEN SHESHIG TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 124B0;CUNEIFORM SIGN EZEN SHESHIG TIMES LA;Lo;0;L;;;;;N;;;;;
+ 124B1;CUNEIFORM SIGN EZEN SHESHIG TIMES LAL;Lo;0;L;;;;;N;;;;;
+ 124B2;CUNEIFORM SIGN EZEN SHESHIG TIMES ME;Lo;0;L;;;;;N;;;;;
+ 124B3;CUNEIFORM SIGN EZEN SHESHIG TIMES MES;Lo;0;L;;;;;N;;;;;
+ 124B4;CUNEIFORM SIGN EZEN SHESHIG TIMES SU;Lo;0;L;;;;;N;;;;;
+ 124B5;CUNEIFORM SIGN EZEN TIMES SU;Lo;0;L;;;;;N;;;;;
+ 124B6;CUNEIFORM SIGN GA2 TIMES BAHAR2;Lo;0;L;;;;;N;;;;;
+ 124B7;CUNEIFORM SIGN GA2 TIMES DIM GUNU;Lo;0;L;;;;;N;;;;;
+ 124B8;CUNEIFORM SIGN GA2 TIMES DUG TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 124B9;CUNEIFORM SIGN GA2 TIMES DUG TIMES KASKAL;Lo;0;L;;;;;N;;;;;
+ 124BA;CUNEIFORM SIGN GA2 TIMES EREN;Lo;0;L;;;;;N;;;;;
+ 124BB;CUNEIFORM SIGN GA2 TIMES GA;Lo;0;L;;;;;N;;;;;
+ 124BC;CUNEIFORM SIGN GA2 TIMES GAR PLUS DI;Lo;0;L;;;;;N;;;;;
+ 124BD;CUNEIFORM SIGN GA2 TIMES GAR PLUS NE;Lo;0;L;;;;;N;;;;;
+ 124BE;CUNEIFORM SIGN GA2 TIMES HA PLUS A;Lo;0;L;;;;;N;;;;;
+ 124BF;CUNEIFORM SIGN GA2 TIMES KUSHU2 PLUS KASKAL;Lo;0;L;;;;;N;;;;;
+ 124C0;CUNEIFORM SIGN GA2 TIMES LAM;Lo;0;L;;;;;N;;;;;
+ 124C1;CUNEIFORM SIGN GA2 TIMES LAM TIMES KUR;Lo;0;L;;;;;N;;;;;
+ 124C2;CUNEIFORM SIGN GA2 TIMES LUH;Lo;0;L;;;;;N;;;;;
+ 124C3;CUNEIFORM SIGN GA2 TIMES MUSH;Lo;0;L;;;;;N;;;;;
+ 124C4;CUNEIFORM SIGN GA2 TIMES NE;Lo;0;L;;;;;N;;;;;
+ 124C5;CUNEIFORM SIGN GA2 TIMES NE PLUS E2;Lo;0;L;;;;;N;;;;;
+ 124C6;CUNEIFORM SIGN GA2 TIMES NE PLUS GI;Lo;0;L;;;;;N;;;;;
+ 124C7;CUNEIFORM SIGN GA2 TIMES SHIM;Lo;0;L;;;;;N;;;;;
+ 124C8;CUNEIFORM SIGN GA2 TIMES ZIZ2;Lo;0;L;;;;;N;;;;;
+ 124C9;CUNEIFORM SIGN GABA ROTATED NINETY DEGREES;Lo;0;L;;;;;N;;;;;
+ 124CA;CUNEIFORM SIGN GESHTIN TIMES U;Lo;0;L;;;;;N;;;;;
+ 124CB;CUNEIFORM SIGN GISH TIMES GISH CROSSING GISH;Lo;0;L;;;;;N;;;;;
+ 124CC;CUNEIFORM SIGN GU2 TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 124CD;CUNEIFORM SIGN GUD PLUS GISH TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 124CE;CUNEIFORM SIGN HA TENU GUNU;Lo;0;L;;;;;N;;;;;
+ 124CF;CUNEIFORM SIGN HI TIMES ASH OVER HI TIMES ASH;Lo;0;L;;;;;N;;;;;
+ 124D0;CUNEIFORM SIGN KA TIMES BU;Lo;0;L;;;;;N;;;;;
+ 124D1;CUNEIFORM SIGN KA TIMES KA;Lo;0;L;;;;;N;;;;;
+ 124D2;CUNEIFORM SIGN KA TIMES U U U;Lo;0;L;;;;;N;;;;;
+ 124D3;CUNEIFORM SIGN KA TIMES UR;Lo;0;L;;;;;N;;;;;
+ 124D4;CUNEIFORM SIGN LAGAB TIMES ZU OVER ZU;Lo;0;L;;;;;N;;;;;
+ 124D5;CUNEIFORM SIGN LAK-003;Lo;0;L;;;;;N;;;;;
+ 124D6;CUNEIFORM SIGN LAK-021;Lo;0;L;;;;;N;;;;;
+ 124D7;CUNEIFORM SIGN LAK-025;Lo;0;L;;;;;N;;;;;
+ 124D8;CUNEIFORM SIGN LAK-030;Lo;0;L;;;;;N;;;;;
+ 124D9;CUNEIFORM SIGN LAK-050;Lo;0;L;;;;;N;;;;;
+ 124DA;CUNEIFORM SIGN LAK-051;Lo;0;L;;;;;N;;;;;
+ 124DB;CUNEIFORM SIGN LAK-062;Lo;0;L;;;;;N;;;;;
+ 124DC;CUNEIFORM SIGN LAK-079 OVER LAK-079 GUNU;Lo;0;L;;;;;N;;;;;
+ 124DD;CUNEIFORM SIGN LAK-080;Lo;0;L;;;;;N;;;;;
+ 124DE;CUNEIFORM SIGN LAK-081 OVER LAK-081;Lo;0;L;;;;;N;;;;;
+ 124DF;CUNEIFORM SIGN LAK-092;Lo;0;L;;;;;N;;;;;
+ 124E0;CUNEIFORM SIGN LAK-130;Lo;0;L;;;;;N;;;;;
+ 124E1;CUNEIFORM SIGN LAK-142;Lo;0;L;;;;;N;;;;;
+ 124E2;CUNEIFORM SIGN LAK-210;Lo;0;L;;;;;N;;;;;
+ 124E3;CUNEIFORM SIGN LAK-219;Lo;0;L;;;;;N;;;;;
+ 124E4;CUNEIFORM SIGN LAK-220;Lo;0;L;;;;;N;;;;;
+ 124E5;CUNEIFORM SIGN LAK-225;Lo;0;L;;;;;N;;;;;
+ 124E6;CUNEIFORM SIGN LAK-228;Lo;0;L;;;;;N;;;;;
+ 124E7;CUNEIFORM SIGN LAK-238;Lo;0;L;;;;;N;;;;;
+ 124E8;CUNEIFORM SIGN LAK-265;Lo;0;L;;;;;N;;;;;
+ 124E9;CUNEIFORM SIGN LAK-266;Lo;0;L;;;;;N;;;;;
+ 124EA;CUNEIFORM SIGN LAK-343;Lo;0;L;;;;;N;;;;;
+ 124EB;CUNEIFORM SIGN LAK-347;Lo;0;L;;;;;N;;;;;
+ 124EC;CUNEIFORM SIGN LAK-348;Lo;0;L;;;;;N;;;;;
+ 124ED;CUNEIFORM SIGN LAK-383;Lo;0;L;;;;;N;;;;;
+ 124EE;CUNEIFORM SIGN LAK-384;Lo;0;L;;;;;N;;;;;
+ 124EF;CUNEIFORM SIGN LAK-390;Lo;0;L;;;;;N;;;;;
+ 124F0;CUNEIFORM SIGN LAK-441;Lo;0;L;;;;;N;;;;;
+ 124F1;CUNEIFORM SIGN LAK-449;Lo;0;L;;;;;N;;;;;
+ 124F2;CUNEIFORM SIGN LAK-449 TIMES GU;Lo;0;L;;;;;N;;;;;
+ 124F3;CUNEIFORM SIGN LAK-449 TIMES IGI;Lo;0;L;;;;;N;;;;;
+ 124F4;CUNEIFORM SIGN LAK-449 TIMES PAP PLUS LU3;Lo;0;L;;;;;N;;;;;
+ 124F5;CUNEIFORM SIGN LAK-449 TIMES PAP PLUS PAP PLUS LU3;Lo;0;L;;;;;N;;;;;
+ 124F6;CUNEIFORM SIGN LAK-449 TIMES U2 PLUS BA;Lo;0;L;;;;;N;;;;;
+ 124F7;CUNEIFORM SIGN LAK-450;Lo;0;L;;;;;N;;;;;
+ 124F8;CUNEIFORM SIGN LAK-457;Lo;0;L;;;;;N;;;;;
+ 124F9;CUNEIFORM SIGN LAK-470;Lo;0;L;;;;;N;;;;;
+ 124FA;CUNEIFORM SIGN LAK-483;Lo;0;L;;;;;N;;;;;
+ 124FB;CUNEIFORM SIGN LAK-490;Lo;0;L;;;;;N;;;;;
+ 124FC;CUNEIFORM SIGN LAK-492;Lo;0;L;;;;;N;;;;;
+ 124FD;CUNEIFORM SIGN LAK-493;Lo;0;L;;;;;N;;;;;
+ 124FE;CUNEIFORM SIGN LAK-495;Lo;0;L;;;;;N;;;;;
+ 124FF;CUNEIFORM SIGN LAK-550;Lo;0;L;;;;;N;;;;;
+ 12500;CUNEIFORM SIGN LAK-608;Lo;0;L;;;;;N;;;;;
+ 12501;CUNEIFORM SIGN LAK-617;Lo;0;L;;;;;N;;;;;
+ 12502;CUNEIFORM SIGN LAK-617 TIMES ASH;Lo;0;L;;;;;N;;;;;
+ 12503;CUNEIFORM SIGN LAK-617 TIMES BAD;Lo;0;L;;;;;N;;;;;
+ 12504;CUNEIFORM SIGN LAK-617 TIMES DUN3 GUNU GUNU;Lo;0;L;;;;;N;;;;;
+ 12505;CUNEIFORM SIGN LAK-617 TIMES KU3;Lo;0;L;;;;;N;;;;;
+ 12506;CUNEIFORM SIGN LAK-617 TIMES LA;Lo;0;L;;;;;N;;;;;
+ 12507;CUNEIFORM SIGN LAK-617 TIMES TAR;Lo;0;L;;;;;N;;;;;
+ 12508;CUNEIFORM SIGN LAK-617 TIMES TE;Lo;0;L;;;;;N;;;;;
+ 12509;CUNEIFORM SIGN LAK-617 TIMES U2;Lo;0;L;;;;;N;;;;;
+ 1250A;CUNEIFORM SIGN LAK-617 TIMES UD;Lo;0;L;;;;;N;;;;;
+ 1250B;CUNEIFORM SIGN LAK-617 TIMES URUDA;Lo;0;L;;;;;N;;;;;
+ 1250C;CUNEIFORM SIGN LAK-636;Lo;0;L;;;;;N;;;;;
+ 1250D;CUNEIFORM SIGN LAK-648;Lo;0;L;;;;;N;;;;;
+ 1250E;CUNEIFORM SIGN LAK-648 TIMES DUB;Lo;0;L;;;;;N;;;;;
+ 1250F;CUNEIFORM SIGN LAK-648 TIMES GA;Lo;0;L;;;;;N;;;;;
+ 12510;CUNEIFORM SIGN LAK-648 TIMES IGI;Lo;0;L;;;;;N;;;;;
+ 12511;CUNEIFORM SIGN LAK-648 TIMES IGI GUNU;Lo;0;L;;;;;N;;;;;
+ 12512;CUNEIFORM SIGN LAK-648 TIMES NI;Lo;0;L;;;;;N;;;;;
+ 12513;CUNEIFORM SIGN LAK-648 TIMES PAP PLUS PAP PLUS LU3;Lo;0;L;;;;;N;;;;;
+ 12514;CUNEIFORM SIGN LAK-648 TIMES SHESH PLUS KI;Lo;0;L;;;;;N;;;;;
+ 12515;CUNEIFORM SIGN LAK-648 TIMES UD;Lo;0;L;;;;;N;;;;;
+ 12516;CUNEIFORM SIGN LAK-648 TIMES URUDA;Lo;0;L;;;;;N;;;;;
+ 12517;CUNEIFORM SIGN LAK-724;Lo;0;L;;;;;N;;;;;
+ 12518;CUNEIFORM SIGN LAK-749;Lo;0;L;;;;;N;;;;;
+ 12519;CUNEIFORM SIGN LU2 GUNU TIMES ASH;Lo;0;L;;;;;N;;;;;
+ 1251A;CUNEIFORM SIGN LU2 TIMES DISH;Lo;0;L;;;;;N;;;;;
+ 1251B;CUNEIFORM SIGN LU2 TIMES HAL;Lo;0;L;;;;;N;;;;;
+ 1251C;CUNEIFORM SIGN LU2 TIMES PAP;Lo;0;L;;;;;N;;;;;
+ 1251D;CUNEIFORM SIGN LU2 TIMES PAP PLUS PAP PLUS LU3;Lo;0;L;;;;;N;;;;;
+ 1251E;CUNEIFORM SIGN LU2 TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 1251F;CUNEIFORM SIGN MI PLUS ZA7;Lo;0;L;;;;;N;;;;;
+ 12520;CUNEIFORM SIGN MUSH OVER MUSH TIMES GA;Lo;0;L;;;;;N;;;;;
+ 12521;CUNEIFORM SIGN MUSH OVER MUSH TIMES KAK;Lo;0;L;;;;;N;;;;;
+ 12522;CUNEIFORM SIGN NINDA2 TIMES DIM GUNU;Lo;0;L;;;;;N;;;;;
+ 12523;CUNEIFORM SIGN NINDA2 TIMES GISH;Lo;0;L;;;;;N;;;;;
+ 12524;CUNEIFORM SIGN NINDA2 TIMES GUL;Lo;0;L;;;;;N;;;;;
+ 12525;CUNEIFORM SIGN NINDA2 TIMES HI;Lo;0;L;;;;;N;;;;;
+ 12526;CUNEIFORM SIGN NINDA2 TIMES KESH2;Lo;0;L;;;;;N;;;;;
+ 12527;CUNEIFORM SIGN NINDA2 TIMES LAK-050;Lo;0;L;;;;;N;;;;;
+ 12528;CUNEIFORM SIGN NINDA2 TIMES MASH;Lo;0;L;;;;;N;;;;;
+ 12529;CUNEIFORM SIGN NINDA2 TIMES PAP PLUS PAP;Lo;0;L;;;;;N;;;;;
+ 1252A;CUNEIFORM SIGN NINDA2 TIMES U;Lo;0;L;;;;;N;;;;;
+ 1252B;CUNEIFORM SIGN NINDA2 TIMES U PLUS U;Lo;0;L;;;;;N;;;;;
+ 1252C;CUNEIFORM SIGN NINDA2 TIMES URUDA;Lo;0;L;;;;;N;;;;;
+ 1252D;CUNEIFORM SIGN SAG GUNU TIMES HA;Lo;0;L;;;;;N;;;;;
+ 1252E;CUNEIFORM SIGN SAG TIMES EN;Lo;0;L;;;;;N;;;;;
+ 1252F;CUNEIFORM SIGN SAG TIMES SHE AT LEFT;Lo;0;L;;;;;N;;;;;
+ 12530;CUNEIFORM SIGN SAG TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 12531;CUNEIFORM SIGN SHA6 TENU;Lo;0;L;;;;;N;;;;;
+ 12532;CUNEIFORM SIGN SHE OVER SHE;Lo;0;L;;;;;N;;;;;
+ 12533;CUNEIFORM SIGN SHE PLUS HUB2;Lo;0;L;;;;;N;;;;;
+ 12534;CUNEIFORM SIGN SHE PLUS NAM2;Lo;0;L;;;;;N;;;;;
+ 12535;CUNEIFORM SIGN SHE PLUS SAR;Lo;0;L;;;;;N;;;;;
+ 12536;CUNEIFORM SIGN SHU2 PLUS DUG TIMES NI;Lo;0;L;;;;;N;;;;;
+ 12537;CUNEIFORM SIGN SHU2 PLUS E2 TIMES AN;Lo;0;L;;;;;N;;;;;
+ 12538;CUNEIFORM SIGN SI TIMES TAK4;Lo;0;L;;;;;N;;;;;
+ 12539;CUNEIFORM SIGN TAK4 PLUS SAG;Lo;0;L;;;;;N;;;;;
+ 1253A;CUNEIFORM SIGN TUM TIMES GAN2 TENU;Lo;0;L;;;;;N;;;;;
+ 1253B;CUNEIFORM SIGN TUM TIMES THREE DISH;Lo;0;L;;;;;N;;;;;
+ 1253C;CUNEIFORM SIGN UR2 INVERTED;Lo;0;L;;;;;N;;;;;
+ 1253D;CUNEIFORM SIGN UR2 TIMES UD;Lo;0;L;;;;;N;;;;;
+ 1253E;CUNEIFORM SIGN URU TIMES DARA3;Lo;0;L;;;;;N;;;;;
+ 1253F;CUNEIFORM SIGN URU TIMES LAK-668;Lo;0;L;;;;;N;;;;;
+ 12540;CUNEIFORM SIGN URU TIMES LU3;Lo;0;L;;;;;N;;;;;
+ 12541;CUNEIFORM SIGN ZA7;Lo;0;L;;;;;N;;;;;
+ 12542;CUNEIFORM SIGN ZU OVER ZU PLUS SAR;Lo;0;L;;;;;N;;;;;
+ 12543;CUNEIFORM SIGN ZU5 TIMES THREE DISH TENU;Lo;0;L;;;;;N;;;;;
+ 13000;EGYPTIAN HIEROGLYPH A001;Lo;0;L;;;;;N;;;;;
+ 13001;EGYPTIAN HIEROGLYPH A002;Lo;0;L;;;;;N;;;;;
+ 13002;EGYPTIAN HIEROGLYPH A003;Lo;0;L;;;;;N;;;;;
+ 13003;EGYPTIAN HIEROGLYPH A004;Lo;0;L;;;;;N;;;;;
+ 13004;EGYPTIAN HIEROGLYPH A005;Lo;0;L;;;;;N;;;;;
+ 13005;EGYPTIAN HIEROGLYPH A005A;Lo;0;L;;;;;N;;;;;
+ 13006;EGYPTIAN HIEROGLYPH A006;Lo;0;L;;;;;N;;;;;
+ 13007;EGYPTIAN HIEROGLYPH A006A;Lo;0;L;;;;;N;;;;;
+ 13008;EGYPTIAN HIEROGLYPH A006B;Lo;0;L;;;;;N;;;;;
+ 13009;EGYPTIAN HIEROGLYPH A007;Lo;0;L;;;;;N;;;;;
+ 1300A;EGYPTIAN HIEROGLYPH A008;Lo;0;L;;;;;N;;;;;
+ 1300B;EGYPTIAN HIEROGLYPH A009;Lo;0;L;;;;;N;;;;;
+ 1300C;EGYPTIAN HIEROGLYPH A010;Lo;0;L;;;;;N;;;;;
+ 1300D;EGYPTIAN HIEROGLYPH A011;Lo;0;L;;;;;N;;;;;
+ 1300E;EGYPTIAN HIEROGLYPH A012;Lo;0;L;;;;;N;;;;;
+ 1300F;EGYPTIAN HIEROGLYPH A013;Lo;0;L;;;;;N;;;;;
+ 13010;EGYPTIAN HIEROGLYPH A014;Lo;0;L;;;;;N;;;;;
+ 13011;EGYPTIAN HIEROGLYPH A014A;Lo;0;L;;;;;N;;;;;
+ 13012;EGYPTIAN HIEROGLYPH A015;Lo;0;L;;;;;N;;;;;
+ 13013;EGYPTIAN HIEROGLYPH A016;Lo;0;L;;;;;N;;;;;
+ 13014;EGYPTIAN HIEROGLYPH A017;Lo;0;L;;;;;N;;;;;
+ 13015;EGYPTIAN HIEROGLYPH A017A;Lo;0;L;;;;;N;;;;;
+ 13016;EGYPTIAN HIEROGLYPH A018;Lo;0;L;;;;;N;;;;;
+ 13017;EGYPTIAN HIEROGLYPH A019;Lo;0;L;;;;;N;;;;;
+ 13018;EGYPTIAN HIEROGLYPH A020;Lo;0;L;;;;;N;;;;;
+ 13019;EGYPTIAN HIEROGLYPH A021;Lo;0;L;;;;;N;;;;;
+ 1301A;EGYPTIAN HIEROGLYPH A022;Lo;0;L;;;;;N;;;;;
+ 1301B;EGYPTIAN HIEROGLYPH A023;Lo;0;L;;;;;N;;;;;
+ 1301C;EGYPTIAN HIEROGLYPH A024;Lo;0;L;;;;;N;;;;;
+ 1301D;EGYPTIAN HIEROGLYPH A025;Lo;0;L;;;;;N;;;;;
+ 1301E;EGYPTIAN HIEROGLYPH A026;Lo;0;L;;;;;N;;;;;
+ 1301F;EGYPTIAN HIEROGLYPH A027;Lo;0;L;;;;;N;;;;;
+ 13020;EGYPTIAN HIEROGLYPH A028;Lo;0;L;;;;;N;;;;;
+ 13021;EGYPTIAN HIEROGLYPH A029;Lo;0;L;;;;;N;;;;;
+ 13022;EGYPTIAN HIEROGLYPH A030;Lo;0;L;;;;;N;;;;;
+ 13023;EGYPTIAN HIEROGLYPH A031;Lo;0;L;;;;;N;;;;;
+ 13024;EGYPTIAN HIEROGLYPH A032;Lo;0;L;;;;;N;;;;;
+ 13025;EGYPTIAN HIEROGLYPH A032A;Lo;0;L;;;;;N;;;;;
+ 13026;EGYPTIAN HIEROGLYPH A033;Lo;0;L;;;;;N;;;;;
+ 13027;EGYPTIAN HIEROGLYPH A034;Lo;0;L;;;;;N;;;;;
+ 13028;EGYPTIAN HIEROGLYPH A035;Lo;0;L;;;;;N;;;;;
+ 13029;EGYPTIAN HIEROGLYPH A036;Lo;0;L;;;;;N;;;;;
+ 1302A;EGYPTIAN HIEROGLYPH A037;Lo;0;L;;;;;N;;;;;
+ 1302B;EGYPTIAN HIEROGLYPH A038;Lo;0;L;;;;;N;;;;;
+ 1302C;EGYPTIAN HIEROGLYPH A039;Lo;0;L;;;;;N;;;;;
+ 1302D;EGYPTIAN HIEROGLYPH A040;Lo;0;L;;;;;N;;;;;
+ 1302E;EGYPTIAN HIEROGLYPH A040A;Lo;0;L;;;;;N;;;;;
+ 1302F;EGYPTIAN HIEROGLYPH A041;Lo;0;L;;;;;N;;;;;
+ 13030;EGYPTIAN HIEROGLYPH A042;Lo;0;L;;;;;N;;;;;
+ 13031;EGYPTIAN HIEROGLYPH A042A;Lo;0;L;;;;;N;;;;;
+ 13032;EGYPTIAN HIEROGLYPH A043;Lo;0;L;;;;;N;;;;;
+ 13033;EGYPTIAN HIEROGLYPH A043A;Lo;0;L;;;;;N;;;;;
+ 13034;EGYPTIAN HIEROGLYPH A044;Lo;0;L;;;;;N;;;;;
+ 13035;EGYPTIAN HIEROGLYPH A045;Lo;0;L;;;;;N;;;;;
+ 13036;EGYPTIAN HIEROGLYPH A045A;Lo;0;L;;;;;N;;;;;
+ 13037;EGYPTIAN HIEROGLYPH A046;Lo;0;L;;;;;N;;;;;
+ 13038;EGYPTIAN HIEROGLYPH A047;Lo;0;L;;;;;N;;;;;
+ 13039;EGYPTIAN HIEROGLYPH A048;Lo;0;L;;;;;N;;;;;
+ 1303A;EGYPTIAN HIEROGLYPH A049;Lo;0;L;;;;;N;;;;;
+ 1303B;EGYPTIAN HIEROGLYPH A050;Lo;0;L;;;;;N;;;;;
+ 1303C;EGYPTIAN HIEROGLYPH A051;Lo;0;L;;;;;N;;;;;
+ 1303D;EGYPTIAN HIEROGLYPH A052;Lo;0;L;;;;;N;;;;;
+ 1303E;EGYPTIAN HIEROGLYPH A053;Lo;0;L;;;;;N;;;;;
+ 1303F;EGYPTIAN HIEROGLYPH A054;Lo;0;L;;;;;N;;;;;
+ 13040;EGYPTIAN HIEROGLYPH A055;Lo;0;L;;;;;N;;;;;
+ 13041;EGYPTIAN HIEROGLYPH A056;Lo;0;L;;;;;N;;;;;
+ 13042;EGYPTIAN HIEROGLYPH A057;Lo;0;L;;;;;N;;;;;
+ 13043;EGYPTIAN HIEROGLYPH A058;Lo;0;L;;;;;N;;;;;
+ 13044;EGYPTIAN HIEROGLYPH A059;Lo;0;L;;;;;N;;;;;
+ 13045;EGYPTIAN HIEROGLYPH A060;Lo;0;L;;;;;N;;;;;
+ 13046;EGYPTIAN HIEROGLYPH A061;Lo;0;L;;;;;N;;;;;
+ 13047;EGYPTIAN HIEROGLYPH A062;Lo;0;L;;;;;N;;;;;
+ 13048;EGYPTIAN HIEROGLYPH A063;Lo;0;L;;;;;N;;;;;
+ 13049;EGYPTIAN HIEROGLYPH A064;Lo;0;L;;;;;N;;;;;
+ 1304A;EGYPTIAN HIEROGLYPH A065;Lo;0;L;;;;;N;;;;;
+ 1304B;EGYPTIAN HIEROGLYPH A066;Lo;0;L;;;;;N;;;;;
+ 1304C;EGYPTIAN HIEROGLYPH A067;Lo;0;L;;;;;N;;;;;
+ 1304D;EGYPTIAN HIEROGLYPH A068;Lo;0;L;;;;;N;;;;;
+ 1304E;EGYPTIAN HIEROGLYPH A069;Lo;0;L;;;;;N;;;;;
+ 1304F;EGYPTIAN HIEROGLYPH A070;Lo;0;L;;;;;N;;;;;
+ 13050;EGYPTIAN HIEROGLYPH B001;Lo;0;L;;;;;N;;;;;
+ 13051;EGYPTIAN HIEROGLYPH B002;Lo;0;L;;;;;N;;;;;
+ 13052;EGYPTIAN HIEROGLYPH B003;Lo;0;L;;;;;N;;;;;
+ 13053;EGYPTIAN HIEROGLYPH B004;Lo;0;L;;;;;N;;;;;
+ 13054;EGYPTIAN HIEROGLYPH B005;Lo;0;L;;;;;N;;;;;
+ 13055;EGYPTIAN HIEROGLYPH B005A;Lo;0;L;;;;;N;;;;;
+ 13056;EGYPTIAN HIEROGLYPH B006;Lo;0;L;;;;;N;;;;;
+ 13057;EGYPTIAN HIEROGLYPH B007;Lo;0;L;;;;;N;;;;;
+ 13058;EGYPTIAN HIEROGLYPH B008;Lo;0;L;;;;;N;;;;;
+ 13059;EGYPTIAN HIEROGLYPH B009;Lo;0;L;;;;;N;;;;;
+ 1305A;EGYPTIAN HIEROGLYPH C001;Lo;0;L;;;;;N;;;;;
+ 1305B;EGYPTIAN HIEROGLYPH C002;Lo;0;L;;;;;N;;;;;
+ 1305C;EGYPTIAN HIEROGLYPH C002A;Lo;0;L;;;;;N;;;;;
+ 1305D;EGYPTIAN HIEROGLYPH C002B;Lo;0;L;;;;;N;;;;;
+ 1305E;EGYPTIAN HIEROGLYPH C002C;Lo;0;L;;;;;N;;;;;
+ 1305F;EGYPTIAN HIEROGLYPH C003;Lo;0;L;;;;;N;;;;;
+ 13060;EGYPTIAN HIEROGLYPH C004;Lo;0;L;;;;;N;;;;;
+ 13061;EGYPTIAN HIEROGLYPH C005;Lo;0;L;;;;;N;;;;;
+ 13062;EGYPTIAN HIEROGLYPH C006;Lo;0;L;;;;;N;;;;;
+ 13063;EGYPTIAN HIEROGLYPH C007;Lo;0;L;;;;;N;;;;;
+ 13064;EGYPTIAN HIEROGLYPH C008;Lo;0;L;;;;;N;;;;;
+ 13065;EGYPTIAN HIEROGLYPH C009;Lo;0;L;;;;;N;;;;;
+ 13066;EGYPTIAN HIEROGLYPH C010;Lo;0;L;;;;;N;;;;;
+ 13067;EGYPTIAN HIEROGLYPH C010A;Lo;0;L;;;;;N;;;;;
+ 13068;EGYPTIAN HIEROGLYPH C011;Lo;0;L;;;;;N;;;;;
+ 13069;EGYPTIAN HIEROGLYPH C012;Lo;0;L;;;;;N;;;;;
+ 1306A;EGYPTIAN HIEROGLYPH C013;Lo;0;L;;;;;N;;;;;
+ 1306B;EGYPTIAN HIEROGLYPH C014;Lo;0;L;;;;;N;;;;;
+ 1306C;EGYPTIAN HIEROGLYPH C015;Lo;0;L;;;;;N;;;;;
+ 1306D;EGYPTIAN HIEROGLYPH C016;Lo;0;L;;;;;N;;;;;
+ 1306E;EGYPTIAN HIEROGLYPH C017;Lo;0;L;;;;;N;;;;;
+ 1306F;EGYPTIAN HIEROGLYPH C018;Lo;0;L;;;;;N;;;;;
+ 13070;EGYPTIAN HIEROGLYPH C019;Lo;0;L;;;;;N;;;;;
+ 13071;EGYPTIAN HIEROGLYPH C020;Lo;0;L;;;;;N;;;;;
+ 13072;EGYPTIAN HIEROGLYPH C021;Lo;0;L;;;;;N;;;;;
+ 13073;EGYPTIAN HIEROGLYPH C022;Lo;0;L;;;;;N;;;;;
+ 13074;EGYPTIAN HIEROGLYPH C023;Lo;0;L;;;;;N;;;;;
+ 13075;EGYPTIAN HIEROGLYPH C024;Lo;0;L;;;;;N;;;;;
+ 13076;EGYPTIAN HIEROGLYPH D001;Lo;0;L;;;;;N;;;;;
+ 13077;EGYPTIAN HIEROGLYPH D002;Lo;0;L;;;;;N;;;;;
+ 13078;EGYPTIAN HIEROGLYPH D003;Lo;0;L;;;;;N;;;;;
+ 13079;EGYPTIAN HIEROGLYPH D004;Lo;0;L;;;;;N;;;;;
+ 1307A;EGYPTIAN HIEROGLYPH D005;Lo;0;L;;;;;N;;;;;
+ 1307B;EGYPTIAN HIEROGLYPH D006;Lo;0;L;;;;;N;;;;;
+ 1307C;EGYPTIAN HIEROGLYPH D007;Lo;0;L;;;;;N;;;;;
+ 1307D;EGYPTIAN HIEROGLYPH D008;Lo;0;L;;;;;N;;;;;
+ 1307E;EGYPTIAN HIEROGLYPH D008A;Lo;0;L;;;;;N;;;;;
+ 1307F;EGYPTIAN HIEROGLYPH D009;Lo;0;L;;;;;N;;;;;
+ 13080;EGYPTIAN HIEROGLYPH D010;Lo;0;L;;;;;N;;;;;
+ 13081;EGYPTIAN HIEROGLYPH D011;Lo;0;L;;;;;N;;;;;
+ 13082;EGYPTIAN HIEROGLYPH D012;Lo;0;L;;;;;N;;;;;
+ 13083;EGYPTIAN HIEROGLYPH D013;Lo;0;L;;;;;N;;;;;
+ 13084;EGYPTIAN HIEROGLYPH D014;Lo;0;L;;;;;N;;;;;
+ 13085;EGYPTIAN HIEROGLYPH D015;Lo;0;L;;;;;N;;;;;
+ 13086;EGYPTIAN HIEROGLYPH D016;Lo;0;L;;;;;N;;;;;
+ 13087;EGYPTIAN HIEROGLYPH D017;Lo;0;L;;;;;N;;;;;
+ 13088;EGYPTIAN HIEROGLYPH D018;Lo;0;L;;;;;N;;;;;
+ 13089;EGYPTIAN HIEROGLYPH D019;Lo;0;L;;;;;N;;;;;
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+ 13090;EGYPTIAN HIEROGLYPH D026;Lo;0;L;;;;;N;;;;;
+ 13091;EGYPTIAN HIEROGLYPH D027;Lo;0;L;;;;;N;;;;;
+ 13092;EGYPTIAN HIEROGLYPH D027A;Lo;0;L;;;;;N;;;;;
+ 13093;EGYPTIAN HIEROGLYPH D028;Lo;0;L;;;;;N;;;;;
+ 13094;EGYPTIAN HIEROGLYPH D029;Lo;0;L;;;;;N;;;;;
+ 13095;EGYPTIAN HIEROGLYPH D030;Lo;0;L;;;;;N;;;;;
+ 13096;EGYPTIAN HIEROGLYPH D031;Lo;0;L;;;;;N;;;;;
+ 13097;EGYPTIAN HIEROGLYPH D031A;Lo;0;L;;;;;N;;;;;
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+ 16817;BAMUM LETTER PHASE-A LAPAQ;Lo;0;L;;;;;N;;;;;
+ 16818;BAMUM LETTER PHASE-A LET KUT;Lo;0;L;;;;;N;;;;;
+ 16819;BAMUM LETTER PHASE-A NTAP MFAA;Lo;0;L;;;;;N;;;;;
+ 1681A;BAMUM LETTER PHASE-A MAEKEUP;Lo;0;L;;;;;N;;;;;
+ 1681B;BAMUM LETTER PHASE-A PASHAE;Lo;0;L;;;;;N;;;;;
+ 1681C;BAMUM LETTER PHASE-A GHEUAERAE;Lo;0;L;;;;;N;;;;;
+ 1681D;BAMUM LETTER PHASE-A PAMSHAE;Lo;0;L;;;;;N;;;;;
+ 1681E;BAMUM LETTER PHASE-A MON NGGEUAET;Lo;0;L;;;;;N;;;;;
+ 1681F;BAMUM LETTER PHASE-A NZUN MEUT;Lo;0;L;;;;;N;;;;;
+ 16820;BAMUM LETTER PHASE-A U YUQ NAE;Lo;0;L;;;;;N;;;;;
+ 16821;BAMUM LETTER PHASE-A GHEUAEGHEUAE;Lo;0;L;;;;;N;;;;;
+ 16822;BAMUM LETTER PHASE-A NTAP NTAA;Lo;0;L;;;;;N;;;;;
+ 16823;BAMUM LETTER PHASE-A SISA;Lo;0;L;;;;;N;;;;;
+ 16824;BAMUM LETTER PHASE-A MGBASA;Lo;0;L;;;;;N;;;;;
+ 16825;BAMUM LETTER PHASE-A MEUNJOMNDEUQ;Lo;0;L;;;;;N;;;;;
+ 16826;BAMUM LETTER PHASE-A MOOMPUQ;Lo;0;L;;;;;N;;;;;
+ 16827;BAMUM LETTER PHASE-A KAFA;Lo;0;L;;;;;N;;;;;
+ 16828;BAMUM LETTER PHASE-A PA LEERAEWA;Lo;0;L;;;;;N;;;;;
+ 16829;BAMUM LETTER PHASE-A NDA LEERAEWA;Lo;0;L;;;;;N;;;;;
+ 1682A;BAMUM LETTER PHASE-A PET;Lo;0;L;;;;;N;;;;;
+ 1682B;BAMUM LETTER PHASE-A MAEMKPEN;Lo;0;L;;;;;N;;;;;
+ 1682C;BAMUM LETTER PHASE-A NIKA;Lo;0;L;;;;;N;;;;;
+ 1682D;BAMUM LETTER PHASE-A PUP;Lo;0;L;;;;;N;;;;;
+ 1682E;BAMUM LETTER PHASE-A TUAEP;Lo;0;L;;;;;N;;;;;
+ 1682F;BAMUM LETTER PHASE-A LUAEP;Lo;0;L;;;;;N;;;;;
+ 16830;BAMUM LETTER PHASE-A SONJAM;Lo;0;L;;;;;N;;;;;
+ 16831;BAMUM LETTER PHASE-A TEUTEUWEN;Lo;0;L;;;;;N;;;;;
+ 16832;BAMUM LETTER PHASE-A MAENYI;Lo;0;L;;;;;N;;;;;
+ 16833;BAMUM LETTER PHASE-A KET;Lo;0;L;;;;;N;;;;;
+ 16834;BAMUM LETTER PHASE-A NDAANGGEUAET;Lo;0;L;;;;;N;;;;;
+ 16835;BAMUM LETTER PHASE-A KUOQ;Lo;0;L;;;;;N;;;;;
+ 16836;BAMUM LETTER PHASE-A MOOMEUT;Lo;0;L;;;;;N;;;;;
+ 16837;BAMUM LETTER PHASE-A SHUM;Lo;0;L;;;;;N;;;;;
+ 16838;BAMUM LETTER PHASE-A LOMMAE;Lo;0;L;;;;;N;;;;;
+ 16839;BAMUM LETTER PHASE-A FIRI;Lo;0;L;;;;;N;;;;;
+ 1683A;BAMUM LETTER PHASE-A ROM;Lo;0;L;;;;;N;;;;;
+ 1683B;BAMUM LETTER PHASE-A KPOQ;Lo;0;L;;;;;N;;;;;
+ 1683C;BAMUM LETTER PHASE-A SOQ;Lo;0;L;;;;;N;;;;;
+ 1683D;BAMUM LETTER PHASE-A MAP PIEET;Lo;0;L;;;;;N;;;;;
+ 1683E;BAMUM LETTER PHASE-A SHIRAE;Lo;0;L;;;;;N;;;;;
+ 1683F;BAMUM LETTER PHASE-A NTAP;Lo;0;L;;;;;N;;;;;
+ 16840;BAMUM LETTER PHASE-A SHOQ NSHUT YUM;Lo;0;L;;;;;N;;;;;
+ 16841;BAMUM LETTER PHASE-A NYIT MONGKEUAEQ;Lo;0;L;;;;;N;;;;;
+ 16842;BAMUM LETTER PHASE-A PAARAE;Lo;0;L;;;;;N;;;;;
+ 16843;BAMUM LETTER PHASE-A NKAARAE;Lo;0;L;;;;;N;;;;;
+ 16844;BAMUM LETTER PHASE-A UNKNOWN;Lo;0;L;;;;;N;;;;;
+ 16845;BAMUM LETTER PHASE-A NGGEN;Lo;0;L;;;;;N;;;;;
+ 16846;BAMUM LETTER PHASE-A MAESI;Lo;0;L;;;;;N;;;;;
+ 16847;BAMUM LETTER PHASE-A NJAM;Lo;0;L;;;;;N;;;;;
+ 16848;BAMUM LETTER PHASE-A MBANYI;Lo;0;L;;;;;N;;;;;
+ 16849;BAMUM LETTER PHASE-A NYET;Lo;0;L;;;;;N;;;;;
+ 1684A;BAMUM LETTER PHASE-A TEUAEN;Lo;0;L;;;;;N;;;;;
+ 1684B;BAMUM LETTER PHASE-A SOT;Lo;0;L;;;;;N;;;;;
+ 1684C;BAMUM LETTER PHASE-A PAAM;Lo;0;L;;;;;N;;;;;
+ 1684D;BAMUM LETTER PHASE-A NSHIEE;Lo;0;L;;;;;N;;;;;
+ 1684E;BAMUM LETTER PHASE-A MAEM;Lo;0;L;;;;;N;;;;;
+ 1684F;BAMUM LETTER PHASE-A NYI;Lo;0;L;;;;;N;;;;;
+ 16850;BAMUM LETTER PHASE-A KAQ;Lo;0;L;;;;;N;;;;;
+ 16851;BAMUM LETTER PHASE-A NSHA;Lo;0;L;;;;;N;;;;;
+ 16852;BAMUM LETTER PHASE-A VEE;Lo;0;L;;;;;N;;;;;
+ 16853;BAMUM LETTER PHASE-A LU;Lo;0;L;;;;;N;;;;;
+ 16854;BAMUM LETTER PHASE-A NEN;Lo;0;L;;;;;N;;;;;
+ 16855;BAMUM LETTER PHASE-A NAQ;Lo;0;L;;;;;N;;;;;
+ 16856;BAMUM LETTER PHASE-A MBAQ;Lo;0;L;;;;;N;;;;;
+ 16857;BAMUM LETTER PHASE-B NSHUET;Lo;0;L;;;;;N;;;;;
+ 16858;BAMUM LETTER PHASE-B TU MAEMGBIEE;Lo;0;L;;;;;N;;;;;
+ 16859;BAMUM LETTER PHASE-B SIEE;Lo;0;L;;;;;N;;;;;
+ 1685A;BAMUM LETTER PHASE-B SET TU;Lo;0;L;;;;;N;;;;;
+ 1685B;BAMUM LETTER PHASE-B LOM NTEUM;Lo;0;L;;;;;N;;;;;
+ 1685C;BAMUM LETTER PHASE-B MBA MAELEE;Lo;0;L;;;;;N;;;;;
+ 1685D;BAMUM LETTER PHASE-B KIEEM;Lo;0;L;;;;;N;;;;;
+ 1685E;BAMUM LETTER PHASE-B YEURAE;Lo;0;L;;;;;N;;;;;
+ 1685F;BAMUM LETTER PHASE-B MBAARAE;Lo;0;L;;;;;N;;;;;
+ 16860;BAMUM LETTER PHASE-B KAM;Lo;0;L;;;;;N;;;;;
+ 16861;BAMUM LETTER PHASE-B PEESHI;Lo;0;L;;;;;N;;;;;
+ 16862;BAMUM LETTER PHASE-B YAFU LEERAEWA;Lo;0;L;;;;;N;;;;;
+ 16863;BAMUM LETTER PHASE-B LAM NSHUT NYAM;Lo;0;L;;;;;N;;;;;
+ 16864;BAMUM LETTER PHASE-B NTIEE SHEUOQ;Lo;0;L;;;;;N;;;;;
+ 16865;BAMUM LETTER PHASE-B NDU NJAA;Lo;0;L;;;;;N;;;;;
+ 16866;BAMUM LETTER PHASE-B GHEUGHEUAEM;Lo;0;L;;;;;N;;;;;
+ 16867;BAMUM LETTER PHASE-B PIT;Lo;0;L;;;;;N;;;;;
+ 16868;BAMUM LETTER PHASE-B TU NSIEE;Lo;0;L;;;;;N;;;;;
+ 16869;BAMUM LETTER PHASE-B SHET NJAQ;Lo;0;L;;;;;N;;;;;
+ 1686A;BAMUM LETTER PHASE-B SHEUAEQTU;Lo;0;L;;;;;N;;;;;
+ 1686B;BAMUM LETTER PHASE-B MFON TEUAEQ;Lo;0;L;;;;;N;;;;;
+ 1686C;BAMUM LETTER PHASE-B MBIT MBAAKET;Lo;0;L;;;;;N;;;;;
+ 1686D;BAMUM LETTER PHASE-B NYI NTEUM;Lo;0;L;;;;;N;;;;;
+ 1686E;BAMUM LETTER PHASE-B KEUPUQ;Lo;0;L;;;;;N;;;;;
+ 1686F;BAMUM LETTER PHASE-B GHEUGHEN;Lo;0;L;;;;;N;;;;;
+ 16870;BAMUM LETTER PHASE-B KEUYEUX;Lo;0;L;;;;;N;;;;;
+ 16871;BAMUM LETTER PHASE-B LAANAE;Lo;0;L;;;;;N;;;;;
+ 16872;BAMUM LETTER PHASE-B PARUM;Lo;0;L;;;;;N;;;;;
+ 16873;BAMUM LETTER PHASE-B VEUM;Lo;0;L;;;;;N;;;;;
+ 16874;BAMUM LETTER PHASE-B NGKINDI MVOP;Lo;0;L;;;;;N;;;;;
+ 16875;BAMUM LETTER PHASE-B NGGEU MBU;Lo;0;L;;;;;N;;;;;
+ 16876;BAMUM LETTER PHASE-B WUAET;Lo;0;L;;;;;N;;;;;
+ 16877;BAMUM LETTER PHASE-B SAKEUAE;Lo;0;L;;;;;N;;;;;
+ 16878;BAMUM LETTER PHASE-B TAAM;Lo;0;L;;;;;N;;;;;
+ 16879;BAMUM LETTER PHASE-B MEUQ;Lo;0;L;;;;;N;;;;;
+ 1687A;BAMUM LETTER PHASE-B NGGUOQ;Lo;0;L;;;;;N;;;;;
+ 1687B;BAMUM LETTER PHASE-B NGGUOQ LARGE;Lo;0;L;;;;;N;;;;;
+ 1687C;BAMUM LETTER PHASE-B MFIYAQ;Lo;0;L;;;;;N;;;;;
+ 1687D;BAMUM LETTER PHASE-B SUE;Lo;0;L;;;;;N;;;;;
+ 1687E;BAMUM LETTER PHASE-B MBEURI;Lo;0;L;;;;;N;;;;;
+ 1687F;BAMUM LETTER PHASE-B MONTIEEN;Lo;0;L;;;;;N;;;;;
+ 16880;BAMUM LETTER PHASE-B NYAEMAE;Lo;0;L;;;;;N;;;;;
+ 16881;BAMUM LETTER PHASE-B PUNGAAM;Lo;0;L;;;;;N;;;;;
+ 16882;BAMUM LETTER PHASE-B MEUT NGGEET;Lo;0;L;;;;;N;;;;;
+ 16883;BAMUM LETTER PHASE-B FEUX;Lo;0;L;;;;;N;;;;;
+ 16884;BAMUM LETTER PHASE-B MBUOQ;Lo;0;L;;;;;N;;;;;
+ 16885;BAMUM LETTER PHASE-B FEE;Lo;0;L;;;;;N;;;;;
+ 16886;BAMUM LETTER PHASE-B KEUAEM;Lo;0;L;;;;;N;;;;;
+ 16887;BAMUM LETTER PHASE-B MA NJEUAENA;Lo;0;L;;;;;N;;;;;
+ 16888;BAMUM LETTER PHASE-B MA NJUQA;Lo;0;L;;;;;N;;;;;
+ 16889;BAMUM LETTER PHASE-B LET;Lo;0;L;;;;;N;;;;;
+ 1688A;BAMUM LETTER PHASE-B NGGAAM;Lo;0;L;;;;;N;;;;;
+ 1688B;BAMUM LETTER PHASE-B NSEN;Lo;0;L;;;;;N;;;;;
+ 1688C;BAMUM LETTER PHASE-B MA;Lo;0;L;;;;;N;;;;;
+ 1688D;BAMUM LETTER PHASE-B KIQ;Lo;0;L;;;;;N;;;;;
+ 1688E;BAMUM LETTER PHASE-B NGOM;Lo;0;L;;;;;N;;;;;
+ 1688F;BAMUM LETTER PHASE-C NGKUE MAEMBA;Lo;0;L;;;;;N;;;;;
+ 16890;BAMUM LETTER PHASE-C NZA;Lo;0;L;;;;;N;;;;;
+ 16891;BAMUM LETTER PHASE-C YUM;Lo;0;L;;;;;N;;;;;
+ 16892;BAMUM LETTER PHASE-C WANGKUOQ;Lo;0;L;;;;;N;;;;;
+ 16893;BAMUM LETTER PHASE-C NGGEN;Lo;0;L;;;;;N;;;;;
+ 16894;BAMUM LETTER PHASE-C NDEUAEREE;Lo;0;L;;;;;N;;;;;
+ 16895;BAMUM LETTER PHASE-C NGKAQ;Lo;0;L;;;;;N;;;;;
+ 16896;BAMUM LETTER PHASE-C GHARAE;Lo;0;L;;;;;N;;;;;
+ 16897;BAMUM LETTER PHASE-C MBEEKEET;Lo;0;L;;;;;N;;;;;
+ 16898;BAMUM LETTER PHASE-C GBAYI;Lo;0;L;;;;;N;;;;;
+ 16899;BAMUM LETTER PHASE-C NYIR MKPARAQ MEUN;Lo;0;L;;;;;N;;;;;
+ 1689A;BAMUM LETTER PHASE-C NTU MBIT;Lo;0;L;;;;;N;;;;;
+ 1689B;BAMUM LETTER PHASE-C MBEUM;Lo;0;L;;;;;N;;;;;
+ 1689C;BAMUM LETTER PHASE-C PIRIEEN;Lo;0;L;;;;;N;;;;;
+ 1689D;BAMUM LETTER PHASE-C NDOMBU;Lo;0;L;;;;;N;;;;;
+ 1689E;BAMUM LETTER PHASE-C MBAA CABBAGE-TREE;Lo;0;L;;;;;N;;;;;
+ 1689F;BAMUM LETTER PHASE-C KEUSHEUAEP;Lo;0;L;;;;;N;;;;;
+ 168A0;BAMUM LETTER PHASE-C GHAP;Lo;0;L;;;;;N;;;;;
+ 168A1;BAMUM LETTER PHASE-C KEUKAQ;Lo;0;L;;;;;N;;;;;
+ 168A2;BAMUM LETTER PHASE-C YU MUOMAE;Lo;0;L;;;;;N;;;;;
+ 168A3;BAMUM LETTER PHASE-C NZEUM;Lo;0;L;;;;;N;;;;;
+ 168A4;BAMUM LETTER PHASE-C MBUE;Lo;0;L;;;;;N;;;;;
+ 168A5;BAMUM LETTER PHASE-C NSEUAEN;Lo;0;L;;;;;N;;;;;
+ 168A6;BAMUM LETTER PHASE-C MBIT;Lo;0;L;;;;;N;;;;;
+ 168A7;BAMUM LETTER PHASE-C YEUQ;Lo;0;L;;;;;N;;;;;
+ 168A8;BAMUM LETTER PHASE-C KPARAQ;Lo;0;L;;;;;N;;;;;
+ 168A9;BAMUM LETTER PHASE-C KAA;Lo;0;L;;;;;N;;;;;
+ 168AA;BAMUM LETTER PHASE-C SEUX;Lo;0;L;;;;;N;;;;;
+ 168AB;BAMUM LETTER PHASE-C NDIDA;Lo;0;L;;;;;N;;;;;
+ 168AC;BAMUM LETTER PHASE-C TAASHAE;Lo;0;L;;;;;N;;;;;
+ 168AD;BAMUM LETTER PHASE-C NJUEQ;Lo;0;L;;;;;N;;;;;
+ 168AE;BAMUM LETTER PHASE-C TITA YUE;Lo;0;L;;;;;N;;;;;
+ 168AF;BAMUM LETTER PHASE-C SUAET;Lo;0;L;;;;;N;;;;;
+ 168B0;BAMUM LETTER PHASE-C NGGUAEN NYAM;Lo;0;L;;;;;N;;;;;
+ 168B1;BAMUM LETTER PHASE-C VEUX;Lo;0;L;;;;;N;;;;;
+ 168B2;BAMUM LETTER PHASE-C NANSANAQ;Lo;0;L;;;;;N;;;;;
+ 168B3;BAMUM LETTER PHASE-C MA KEUAERI;Lo;0;L;;;;;N;;;;;
+ 168B4;BAMUM LETTER PHASE-C NTAA;Lo;0;L;;;;;N;;;;;
+ 168B5;BAMUM LETTER PHASE-C NGGUON;Lo;0;L;;;;;N;;;;;
+ 168B6;BAMUM LETTER PHASE-C LAP;Lo;0;L;;;;;N;;;;;
+ 168B7;BAMUM LETTER PHASE-C MBIRIEEN;Lo;0;L;;;;;N;;;;;
+ 168B8;BAMUM LETTER PHASE-C MGBASAQ;Lo;0;L;;;;;N;;;;;
+ 168B9;BAMUM LETTER PHASE-C NTEUNGBA;Lo;0;L;;;;;N;;;;;
+ 168BA;BAMUM LETTER PHASE-C TEUTEUX;Lo;0;L;;;;;N;;;;;
+ 168BB;BAMUM LETTER PHASE-C NGGUM;Lo;0;L;;;;;N;;;;;
+ 168BC;BAMUM LETTER PHASE-C FUE;Lo;0;L;;;;;N;;;;;
+ 168BD;BAMUM LETTER PHASE-C NDEUT;Lo;0;L;;;;;N;;;;;
+ 168BE;BAMUM LETTER PHASE-C NSA;Lo;0;L;;;;;N;;;;;
+ 168BF;BAMUM LETTER PHASE-C NSHAQ;Lo;0;L;;;;;N;;;;;
+ 168C0;BAMUM LETTER PHASE-C BUNG;Lo;0;L;;;;;N;;;;;
+ 168C1;BAMUM LETTER PHASE-C VEUAEPEN;Lo;0;L;;;;;N;;;;;
+ 168C2;BAMUM LETTER PHASE-C MBERAE;Lo;0;L;;;;;N;;;;;
+ 168C3;BAMUM LETTER PHASE-C RU;Lo;0;L;;;;;N;;;;;
+ 168C4;BAMUM LETTER PHASE-C NJAEM;Lo;0;L;;;;;N;;;;;
+ 168C5;BAMUM LETTER PHASE-C LAM;Lo;0;L;;;;;N;;;;;
+ 168C6;BAMUM LETTER PHASE-C TITUAEP;Lo;0;L;;;;;N;;;;;
+ 168C7;BAMUM LETTER PHASE-C NSUOT NGOM;Lo;0;L;;;;;N;;;;;
+ 168C8;BAMUM LETTER PHASE-C NJEEEE;Lo;0;L;;;;;N;;;;;
+ 168C9;BAMUM LETTER PHASE-C KET;Lo;0;L;;;;;N;;;;;
+ 168CA;BAMUM LETTER PHASE-C NGGU;Lo;0;L;;;;;N;;;;;
+ 168CB;BAMUM LETTER PHASE-C MAESI;Lo;0;L;;;;;N;;;;;
+ 168CC;BAMUM LETTER PHASE-C MBUAEM;Lo;0;L;;;;;N;;;;;
+ 168CD;BAMUM LETTER PHASE-C LU;Lo;0;L;;;;;N;;;;;
+ 168CE;BAMUM LETTER PHASE-C KUT;Lo;0;L;;;;;N;;;;;
+ 168CF;BAMUM LETTER PHASE-C NJAM;Lo;0;L;;;;;N;;;;;
+ 168D0;BAMUM LETTER PHASE-C NGOM;Lo;0;L;;;;;N;;;;;
+ 168D1;BAMUM LETTER PHASE-C WUP;Lo;0;L;;;;;N;;;;;
+ 168D2;BAMUM LETTER PHASE-C NGGUEET;Lo;0;L;;;;;N;;;;;
+ 168D3;BAMUM LETTER PHASE-C NSOM;Lo;0;L;;;;;N;;;;;
+ 168D4;BAMUM LETTER PHASE-C NTEN;Lo;0;L;;;;;N;;;;;
+ 168D5;BAMUM LETTER PHASE-C KUOP NKAARAE;Lo;0;L;;;;;N;;;;;
+ 168D6;BAMUM LETTER PHASE-C NSUN;Lo;0;L;;;;;N;;;;;
+ 168D7;BAMUM LETTER PHASE-C NDAM;Lo;0;L;;;;;N;;;;;
+ 168D8;BAMUM LETTER PHASE-C MA NSIEE;Lo;0;L;;;;;N;;;;;
+ 168D9;BAMUM LETTER PHASE-C YAA;Lo;0;L;;;;;N;;;;;
+ 168DA;BAMUM LETTER PHASE-C NDAP;Lo;0;L;;;;;N;;;;;
+ 168DB;BAMUM LETTER PHASE-C SHUEQ;Lo;0;L;;;;;N;;;;;
+ 168DC;BAMUM LETTER PHASE-C SETFON;Lo;0;L;;;;;N;;;;;
+ 168DD;BAMUM LETTER PHASE-C MBI;Lo;0;L;;;;;N;;;;;
+ 168DE;BAMUM LETTER PHASE-C MAEMBA;Lo;0;L;;;;;N;;;;;
+ 168DF;BAMUM LETTER PHASE-C MBANYI;Lo;0;L;;;;;N;;;;;
+ 168E0;BAMUM LETTER PHASE-C KEUSEUX;Lo;0;L;;;;;N;;;;;
+ 168E1;BAMUM LETTER PHASE-C MBEUX;Lo;0;L;;;;;N;;;;;
+ 168E2;BAMUM LETTER PHASE-C KEUM;Lo;0;L;;;;;N;;;;;
+ 168E3;BAMUM LETTER PHASE-C MBAA PICKET;Lo;0;L;;;;;N;;;;;
+ 168E4;BAMUM LETTER PHASE-C YUWOQ;Lo;0;L;;;;;N;;;;;
+ 168E5;BAMUM LETTER PHASE-C NJEUX;Lo;0;L;;;;;N;;;;;
+ 168E6;BAMUM LETTER PHASE-C MIEE;Lo;0;L;;;;;N;;;;;
+ 168E7;BAMUM LETTER PHASE-C MUAE;Lo;0;L;;;;;N;;;;;
+ 168E8;BAMUM LETTER PHASE-C SHIQ;Lo;0;L;;;;;N;;;;;
+ 168E9;BAMUM LETTER PHASE-C KEN LAW;Lo;0;L;;;;;N;;;;;
+ 168EA;BAMUM LETTER PHASE-C KEN FATIGUE;Lo;0;L;;;;;N;;;;;
+ 168EB;BAMUM LETTER PHASE-C NGAQ;Lo;0;L;;;;;N;;;;;
+ 168EC;BAMUM LETTER PHASE-C NAQ;Lo;0;L;;;;;N;;;;;
+ 168ED;BAMUM LETTER PHASE-C LIQ;Lo;0;L;;;;;N;;;;;
+ 168EE;BAMUM LETTER PHASE-C PIN;Lo;0;L;;;;;N;;;;;
+ 168EF;BAMUM LETTER PHASE-C PEN;Lo;0;L;;;;;N;;;;;
+ 168F0;BAMUM LETTER PHASE-C TET;Lo;0;L;;;;;N;;;;;
+ 168F1;BAMUM LETTER PHASE-D MBUO;Lo;0;L;;;;;N;;;;;
+ 168F2;BAMUM LETTER PHASE-D WAP;Lo;0;L;;;;;N;;;;;
+ 168F3;BAMUM LETTER PHASE-D NJI;Lo;0;L;;;;;N;;;;;
+ 168F4;BAMUM LETTER PHASE-D MFON;Lo;0;L;;;;;N;;;;;
+ 168F5;BAMUM LETTER PHASE-D NJIEE;Lo;0;L;;;;;N;;;;;
+ 168F6;BAMUM LETTER PHASE-D LIEE;Lo;0;L;;;;;N;;;;;
+ 168F7;BAMUM LETTER PHASE-D NJEUT;Lo;0;L;;;;;N;;;;;
+ 168F8;BAMUM LETTER PHASE-D NSHEE;Lo;0;L;;;;;N;;;;;
+ 168F9;BAMUM LETTER PHASE-D NGGAAMAE;Lo;0;L;;;;;N;;;;;
+ 168FA;BAMUM LETTER PHASE-D NYAM;Lo;0;L;;;;;N;;;;;
+ 168FB;BAMUM LETTER PHASE-D WUAEN;Lo;0;L;;;;;N;;;;;
+ 168FC;BAMUM LETTER PHASE-D NGKUN;Lo;0;L;;;;;N;;;;;
+ 168FD;BAMUM LETTER PHASE-D SHEE;Lo;0;L;;;;;N;;;;;
+ 168FE;BAMUM LETTER PHASE-D NGKAP;Lo;0;L;;;;;N;;;;;
+ 168FF;BAMUM LETTER PHASE-D KEUAETMEUN;Lo;0;L;;;;;N;;;;;
+ 16900;BAMUM LETTER PHASE-D TEUT;Lo;0;L;;;;;N;;;;;
+ 16901;BAMUM LETTER PHASE-D SHEUAE;Lo;0;L;;;;;N;;;;;
+ 16902;BAMUM LETTER PHASE-D NJAP;Lo;0;L;;;;;N;;;;;
+ 16903;BAMUM LETTER PHASE-D SUE;Lo;0;L;;;;;N;;;;;
+ 16904;BAMUM LETTER PHASE-D KET;Lo;0;L;;;;;N;;;;;
+ 16905;BAMUM LETTER PHASE-D YAEMMAE;Lo;0;L;;;;;N;;;;;
+ 16906;BAMUM LETTER PHASE-D KUOM;Lo;0;L;;;;;N;;;;;
+ 16907;BAMUM LETTER PHASE-D SAP;Lo;0;L;;;;;N;;;;;
+ 16908;BAMUM LETTER PHASE-D MFEUT;Lo;0;L;;;;;N;;;;;
+ 16909;BAMUM LETTER PHASE-D NDEUX;Lo;0;L;;;;;N;;;;;
+ 1690A;BAMUM LETTER PHASE-D MALEERI;Lo;0;L;;;;;N;;;;;
+ 1690B;BAMUM LETTER PHASE-D MEUT;Lo;0;L;;;;;N;;;;;
+ 1690C;BAMUM LETTER PHASE-D SEUAEQ;Lo;0;L;;;;;N;;;;;
+ 1690D;BAMUM LETTER PHASE-D YEN;Lo;0;L;;;;;N;;;;;
+ 1690E;BAMUM LETTER PHASE-D NJEUAEM;Lo;0;L;;;;;N;;;;;
+ 1690F;BAMUM LETTER PHASE-D KEUOT MBUAE;Lo;0;L;;;;;N;;;;;
+ 16910;BAMUM LETTER PHASE-D NGKEURI;Lo;0;L;;;;;N;;;;;
+ 16911;BAMUM LETTER PHASE-D TU;Lo;0;L;;;;;N;;;;;
+ 16912;BAMUM LETTER PHASE-D GHAA;Lo;0;L;;;;;N;;;;;
+ 16913;BAMUM LETTER PHASE-D NGKYEE;Lo;0;L;;;;;N;;;;;
+ 16914;BAMUM LETTER PHASE-D FEUFEUAET;Lo;0;L;;;;;N;;;;;
+ 16915;BAMUM LETTER PHASE-D NDEE;Lo;0;L;;;;;N;;;;;
+ 16916;BAMUM LETTER PHASE-D MGBOFUM;Lo;0;L;;;;;N;;;;;
+ 16917;BAMUM LETTER PHASE-D LEUAEP;Lo;0;L;;;;;N;;;;;
+ 16918;BAMUM LETTER PHASE-D NDON;Lo;0;L;;;;;N;;;;;
+ 16919;BAMUM LETTER PHASE-D MONI;Lo;0;L;;;;;N;;;;;
+ 1691A;BAMUM LETTER PHASE-D MGBEUN;Lo;0;L;;;;;N;;;;;
+ 1691B;BAMUM LETTER PHASE-D PUUT;Lo;0;L;;;;;N;;;;;
+ 1691C;BAMUM LETTER PHASE-D MGBIEE;Lo;0;L;;;;;N;;;;;
+ 1691D;BAMUM LETTER PHASE-D MFO;Lo;0;L;;;;;N;;;;;
+ 1691E;BAMUM LETTER PHASE-D LUM;Lo;0;L;;;;;N;;;;;
+ 1691F;BAMUM LETTER PHASE-D NSIEEP;Lo;0;L;;;;;N;;;;;
+ 16920;BAMUM LETTER PHASE-D MBAA;Lo;0;L;;;;;N;;;;;
+ 16921;BAMUM LETTER PHASE-D KWAET;Lo;0;L;;;;;N;;;;;
+ 16922;BAMUM LETTER PHASE-D NYET;Lo;0;L;;;;;N;;;;;
+ 16923;BAMUM LETTER PHASE-D TEUAEN;Lo;0;L;;;;;N;;;;;
+ 16924;BAMUM LETTER PHASE-D SOT;Lo;0;L;;;;;N;;;;;
+ 16925;BAMUM LETTER PHASE-D YUWOQ;Lo;0;L;;;;;N;;;;;
+ 16926;BAMUM LETTER PHASE-D KEUM;Lo;0;L;;;;;N;;;;;
+ 16927;BAMUM LETTER PHASE-D RAEM;Lo;0;L;;;;;N;;;;;
+ 16928;BAMUM LETTER PHASE-D TEEEE;Lo;0;L;;;;;N;;;;;
+ 16929;BAMUM LETTER PHASE-D NGKEUAEQ;Lo;0;L;;;;;N;;;;;
+ 1692A;BAMUM LETTER PHASE-D MFEUAE;Lo;0;L;;;;;N;;;;;
+ 1692B;BAMUM LETTER PHASE-D NSIEET;Lo;0;L;;;;;N;;;;;
+ 1692C;BAMUM LETTER PHASE-D KEUP;Lo;0;L;;;;;N;;;;;
+ 1692D;BAMUM LETTER PHASE-D PIP;Lo;0;L;;;;;N;;;;;
+ 1692E;BAMUM LETTER PHASE-D PEUTAE;Lo;0;L;;;;;N;;;;;
+ 1692F;BAMUM LETTER PHASE-D NYUE;Lo;0;L;;;;;N;;;;;
+ 16930;BAMUM LETTER PHASE-D LET;Lo;0;L;;;;;N;;;;;
+ 16931;BAMUM LETTER PHASE-D NGGAAM;Lo;0;L;;;;;N;;;;;
+ 16932;BAMUM LETTER PHASE-D MFIEE;Lo;0;L;;;;;N;;;;;
+ 16933;BAMUM LETTER PHASE-D NGGWAEN;Lo;0;L;;;;;N;;;;;
+ 16934;BAMUM LETTER PHASE-D YUOM;Lo;0;L;;;;;N;;;;;
+ 16935;BAMUM LETTER PHASE-D PAP;Lo;0;L;;;;;N;;;;;
+ 16936;BAMUM LETTER PHASE-D YUOP;Lo;0;L;;;;;N;;;;;
+ 16937;BAMUM LETTER PHASE-D NDAM;Lo;0;L;;;;;N;;;;;
+ 16938;BAMUM LETTER PHASE-D NTEUM;Lo;0;L;;;;;N;;;;;
+ 16939;BAMUM LETTER PHASE-D SUAE;Lo;0;L;;;;;N;;;;;
+ 1693A;BAMUM LETTER PHASE-D KUN;Lo;0;L;;;;;N;;;;;
+ 1693B;BAMUM LETTER PHASE-D NGGEUX;Lo;0;L;;;;;N;;;;;
+ 1693C;BAMUM LETTER PHASE-D NGKIEE;Lo;0;L;;;;;N;;;;;
+ 1693D;BAMUM LETTER PHASE-D TUOT;Lo;0;L;;;;;N;;;;;
+ 1693E;BAMUM LETTER PHASE-D MEUN;Lo;0;L;;;;;N;;;;;
+ 1693F;BAMUM LETTER PHASE-D KUQ;Lo;0;L;;;;;N;;;;;
+ 16940;BAMUM LETTER PHASE-D NSUM;Lo;0;L;;;;;N;;;;;
+ 16941;BAMUM LETTER PHASE-D TEUN;Lo;0;L;;;;;N;;;;;
+ 16942;BAMUM LETTER PHASE-D MAENJET;Lo;0;L;;;;;N;;;;;
+ 16943;BAMUM LETTER PHASE-D NGGAP;Lo;0;L;;;;;N;;;;;
+ 16944;BAMUM LETTER PHASE-D LEUM;Lo;0;L;;;;;N;;;;;
+ 16945;BAMUM LETTER PHASE-D NGGUOM;Lo;0;L;;;;;N;;;;;
+ 16946;BAMUM LETTER PHASE-D NSHUT;Lo;0;L;;;;;N;;;;;
+ 16947;BAMUM LETTER PHASE-D NJUEQ;Lo;0;L;;;;;N;;;;;
+ 16948;BAMUM LETTER PHASE-D GHEUAE;Lo;0;L;;;;;N;;;;;
+ 16949;BAMUM LETTER PHASE-D KU;Lo;0;L;;;;;N;;;;;
+ 1694A;BAMUM LETTER PHASE-D REN OLD;Lo;0;L;;;;;N;;;;;
+ 1694B;BAMUM LETTER PHASE-D TAE;Lo;0;L;;;;;N;;;;;
+ 1694C;BAMUM LETTER PHASE-D TOQ;Lo;0;L;;;;;N;;;;;
+ 1694D;BAMUM LETTER PHASE-D NYI;Lo;0;L;;;;;N;;;;;
+ 1694E;BAMUM LETTER PHASE-D RII;Lo;0;L;;;;;N;;;;;
+ 1694F;BAMUM LETTER PHASE-D LEEEE;Lo;0;L;;;;;N;;;;;
+ 16950;BAMUM LETTER PHASE-D MEEEE;Lo;0;L;;;;;N;;;;;
+ 16951;BAMUM LETTER PHASE-D M;Lo;0;L;;;;;N;;;;;
+ 16952;BAMUM LETTER PHASE-D SUU;Lo;0;L;;;;;N;;;;;
+ 16953;BAMUM LETTER PHASE-D MU;Lo;0;L;;;;;N;;;;;
+ 16954;BAMUM LETTER PHASE-D SHII;Lo;0;L;;;;;N;;;;;
+ 16955;BAMUM LETTER PHASE-D SHEUX;Lo;0;L;;;;;N;;;;;
+ 16956;BAMUM LETTER PHASE-D KYEE;Lo;0;L;;;;;N;;;;;
+ 16957;BAMUM LETTER PHASE-D NU;Lo;0;L;;;;;N;;;;;
+ 16958;BAMUM LETTER PHASE-D SHU;Lo;0;L;;;;;N;;;;;
+ 16959;BAMUM LETTER PHASE-D NTEE;Lo;0;L;;;;;N;;;;;
+ 1695A;BAMUM LETTER PHASE-D PEE;Lo;0;L;;;;;N;;;;;
+ 1695B;BAMUM LETTER PHASE-D NI;Lo;0;L;;;;;N;;;;;
+ 1695C;BAMUM LETTER PHASE-D SHOQ;Lo;0;L;;;;;N;;;;;
+ 1695D;BAMUM LETTER PHASE-D PUQ;Lo;0;L;;;;;N;;;;;
+ 1695E;BAMUM LETTER PHASE-D MVOP;Lo;0;L;;;;;N;;;;;
+ 1695F;BAMUM LETTER PHASE-D LOQ;Lo;0;L;;;;;N;;;;;
+ 16960;BAMUM LETTER PHASE-D REN MUCH;Lo;0;L;;;;;N;;;;;
+ 16961;BAMUM LETTER PHASE-D TI;Lo;0;L;;;;;N;;;;;
+ 16962;BAMUM LETTER PHASE-D NTUU;Lo;0;L;;;;;N;;;;;
+ 16963;BAMUM LETTER PHASE-D MBAA SEVEN;Lo;0;L;;;;;N;;;;;
+ 16964;BAMUM LETTER PHASE-D SAQ;Lo;0;L;;;;;N;;;;;
+ 16965;BAMUM LETTER PHASE-D FAA;Lo;0;L;;;;;N;;;;;
+ 16966;BAMUM LETTER PHASE-E NDAP;Lo;0;L;;;;;N;;;;;
+ 16967;BAMUM LETTER PHASE-E TOON;Lo;0;L;;;;;N;;;;;
+ 16968;BAMUM LETTER PHASE-E MBEUM;Lo;0;L;;;;;N;;;;;
+ 16969;BAMUM LETTER PHASE-E LAP;Lo;0;L;;;;;N;;;;;
+ 1696A;BAMUM LETTER PHASE-E VOM;Lo;0;L;;;;;N;;;;;
+ 1696B;BAMUM LETTER PHASE-E LOON;Lo;0;L;;;;;N;;;;;
+ 1696C;BAMUM LETTER PHASE-E PAA;Lo;0;L;;;;;N;;;;;
+ 1696D;BAMUM LETTER PHASE-E SOM;Lo;0;L;;;;;N;;;;;
+ 1696E;BAMUM LETTER PHASE-E RAQ;Lo;0;L;;;;;N;;;;;
+ 1696F;BAMUM LETTER PHASE-E NSHUOP;Lo;0;L;;;;;N;;;;;
+ 16970;BAMUM LETTER PHASE-E NDUN;Lo;0;L;;;;;N;;;;;
+ 16971;BAMUM LETTER PHASE-E PUAE;Lo;0;L;;;;;N;;;;;
+ 16972;BAMUM LETTER PHASE-E TAM;Lo;0;L;;;;;N;;;;;
+ 16973;BAMUM LETTER PHASE-E NGKA;Lo;0;L;;;;;N;;;;;
+ 16974;BAMUM LETTER PHASE-E KPEUX;Lo;0;L;;;;;N;;;;;
+ 16975;BAMUM LETTER PHASE-E WUO;Lo;0;L;;;;;N;;;;;
+ 16976;BAMUM LETTER PHASE-E SEE;Lo;0;L;;;;;N;;;;;
+ 16977;BAMUM LETTER PHASE-E NGGEUAET;Lo;0;L;;;;;N;;;;;
+ 16978;BAMUM LETTER PHASE-E PAAM;Lo;0;L;;;;;N;;;;;
+ 16979;BAMUM LETTER PHASE-E TOO;Lo;0;L;;;;;N;;;;;
+ 1697A;BAMUM LETTER PHASE-E KUOP;Lo;0;L;;;;;N;;;;;
+ 1697B;BAMUM LETTER PHASE-E LOM;Lo;0;L;;;;;N;;;;;
+ 1697C;BAMUM LETTER PHASE-E NSHIEE;Lo;0;L;;;;;N;;;;;
+ 1697D;BAMUM LETTER PHASE-E NGOP;Lo;0;L;;;;;N;;;;;
+ 1697E;BAMUM LETTER PHASE-E MAEM;Lo;0;L;;;;;N;;;;;
+ 1697F;BAMUM LETTER PHASE-E NGKEUX;Lo;0;L;;;;;N;;;;;
+ 16980;BAMUM LETTER PHASE-E NGOQ;Lo;0;L;;;;;N;;;;;
+ 16981;BAMUM LETTER PHASE-E NSHUE;Lo;0;L;;;;;N;;;;;
+ 16982;BAMUM LETTER PHASE-E RIMGBA;Lo;0;L;;;;;N;;;;;
+ 16983;BAMUM LETTER PHASE-E NJEUX;Lo;0;L;;;;;N;;;;;
+ 16984;BAMUM LETTER PHASE-E PEEM;Lo;0;L;;;;;N;;;;;
+ 16985;BAMUM LETTER PHASE-E SAA;Lo;0;L;;;;;N;;;;;
+ 16986;BAMUM LETTER PHASE-E NGGURAE;Lo;0;L;;;;;N;;;;;
+ 16987;BAMUM LETTER PHASE-E MGBA;Lo;0;L;;;;;N;;;;;
+ 16988;BAMUM LETTER PHASE-E GHEUX;Lo;0;L;;;;;N;;;;;
+ 16989;BAMUM LETTER PHASE-E NGKEUAEM;Lo;0;L;;;;;N;;;;;
+ 1698A;BAMUM LETTER PHASE-E NJAEMLI;Lo;0;L;;;;;N;;;;;
+ 1698B;BAMUM LETTER PHASE-E MAP;Lo;0;L;;;;;N;;;;;
+ 1698C;BAMUM LETTER PHASE-E LOOT;Lo;0;L;;;;;N;;;;;
+ 1698D;BAMUM LETTER PHASE-E NGGEEEE;Lo;0;L;;;;;N;;;;;
+ 1698E;BAMUM LETTER PHASE-E NDIQ;Lo;0;L;;;;;N;;;;;
+ 1698F;BAMUM LETTER PHASE-E TAEN NTEUM;Lo;0;L;;;;;N;;;;;
+ 16990;BAMUM LETTER PHASE-E SET;Lo;0;L;;;;;N;;;;;
+ 16991;BAMUM LETTER PHASE-E PUM;Lo;0;L;;;;;N;;;;;
+ 16992;BAMUM LETTER PHASE-E NDAA SOFTNESS;Lo;0;L;;;;;N;;;;;
+ 16993;BAMUM LETTER PHASE-E NGGUAESHAE NYAM;Lo;0;L;;;;;N;;;;;
+ 16994;BAMUM LETTER PHASE-E YIEE;Lo;0;L;;;;;N;;;;;
+ 16995;BAMUM LETTER PHASE-E GHEUN;Lo;0;L;;;;;N;;;;;
+ 16996;BAMUM LETTER PHASE-E TUAE;Lo;0;L;;;;;N;;;;;
+ 16997;BAMUM LETTER PHASE-E YEUAE;Lo;0;L;;;;;N;;;;;
+ 16998;BAMUM LETTER PHASE-E PO;Lo;0;L;;;;;N;;;;;
+ 16999;BAMUM LETTER PHASE-E TUMAE;Lo;0;L;;;;;N;;;;;
+ 1699A;BAMUM LETTER PHASE-E KEUAE;Lo;0;L;;;;;N;;;;;
+ 1699B;BAMUM LETTER PHASE-E SUAEN;Lo;0;L;;;;;N;;;;;
+ 1699C;BAMUM LETTER PHASE-E TEUAEQ;Lo;0;L;;;;;N;;;;;
+ 1699D;BAMUM LETTER PHASE-E VEUAE;Lo;0;L;;;;;N;;;;;
+ 1699E;BAMUM LETTER PHASE-E WEUX;Lo;0;L;;;;;N;;;;;
+ 1699F;BAMUM LETTER PHASE-E LAAM;Lo;0;L;;;;;N;;;;;
+ 169A0;BAMUM LETTER PHASE-E PU;Lo;0;L;;;;;N;;;;;
+ 169A1;BAMUM LETTER PHASE-E TAAQ;Lo;0;L;;;;;N;;;;;
+ 169A2;BAMUM LETTER PHASE-E GHAAMAE;Lo;0;L;;;;;N;;;;;
+ 169A3;BAMUM LETTER PHASE-E NGEUREUT;Lo;0;L;;;;;N;;;;;
+ 169A4;BAMUM LETTER PHASE-E SHEUAEQ;Lo;0;L;;;;;N;;;;;
+ 169A5;BAMUM LETTER PHASE-E MGBEN;Lo;0;L;;;;;N;;;;;
+ 169A6;BAMUM LETTER PHASE-E MBEE;Lo;0;L;;;;;N;;;;;
+ 169A7;BAMUM LETTER PHASE-E NZAQ;Lo;0;L;;;;;N;;;;;
+ 169A8;BAMUM LETTER PHASE-E NKOM;Lo;0;L;;;;;N;;;;;
+ 169A9;BAMUM LETTER PHASE-E GBET;Lo;0;L;;;;;N;;;;;
+ 169AA;BAMUM LETTER PHASE-E TUM;Lo;0;L;;;;;N;;;;;
+ 169AB;BAMUM LETTER PHASE-E KUET;Lo;0;L;;;;;N;;;;;
+ 169AC;BAMUM LETTER PHASE-E YAP;Lo;0;L;;;;;N;;;;;
+ 169AD;BAMUM LETTER PHASE-E NYI CLEAVER;Lo;0;L;;;;;N;;;;;
+ 169AE;BAMUM LETTER PHASE-E YIT;Lo;0;L;;;;;N;;;;;
+ 169AF;BAMUM LETTER PHASE-E MFEUQ;Lo;0;L;;;;;N;;;;;
+ 169B0;BAMUM LETTER PHASE-E NDIAQ;Lo;0;L;;;;;N;;;;;
+ 169B1;BAMUM LETTER PHASE-E PIEEQ;Lo;0;L;;;;;N;;;;;
+ 169B2;BAMUM LETTER PHASE-E YUEQ;Lo;0;L;;;;;N;;;;;
+ 169B3;BAMUM LETTER PHASE-E LEUAEM;Lo;0;L;;;;;N;;;;;
+ 169B4;BAMUM LETTER PHASE-E FUE;Lo;0;L;;;;;N;;;;;
+ 169B5;BAMUM LETTER PHASE-E GBEUX;Lo;0;L;;;;;N;;;;;
+ 169B6;BAMUM LETTER PHASE-E NGKUP;Lo;0;L;;;;;N;;;;;
+ 169B7;BAMUM LETTER PHASE-E KET;Lo;0;L;;;;;N;;;;;
+ 169B8;BAMUM LETTER PHASE-E MAE;Lo;0;L;;;;;N;;;;;
+ 169B9;BAMUM LETTER PHASE-E NGKAAMI;Lo;0;L;;;;;N;;;;;
+ 169BA;BAMUM LETTER PHASE-E GHET;Lo;0;L;;;;;N;;;;;
+ 169BB;BAMUM LETTER PHASE-E FA;Lo;0;L;;;;;N;;;;;
+ 169BC;BAMUM LETTER PHASE-E NTUM;Lo;0;L;;;;;N;;;;;
+ 169BD;BAMUM LETTER PHASE-E PEUT;Lo;0;L;;;;;N;;;;;
+ 169BE;BAMUM LETTER PHASE-E YEUM;Lo;0;L;;;;;N;;;;;
+ 169BF;BAMUM LETTER PHASE-E NGGEUAE;Lo;0;L;;;;;N;;;;;
+ 169C0;BAMUM LETTER PHASE-E NYI BETWEEN;Lo;0;L;;;;;N;;;;;
+ 169C1;BAMUM LETTER PHASE-E NZUQ;Lo;0;L;;;;;N;;;;;
+ 169C2;BAMUM LETTER PHASE-E POON;Lo;0;L;;;;;N;;;;;
+ 169C3;BAMUM LETTER PHASE-E MIEE;Lo;0;L;;;;;N;;;;;
+ 169C4;BAMUM LETTER PHASE-E FUET;Lo;0;L;;;;;N;;;;;
+ 169C5;BAMUM LETTER PHASE-E NAE;Lo;0;L;;;;;N;;;;;
+ 169C6;BAMUM LETTER PHASE-E MUAE;Lo;0;L;;;;;N;;;;;
+ 169C7;BAMUM LETTER PHASE-E GHEUAE;Lo;0;L;;;;;N;;;;;
+ 169C8;BAMUM LETTER PHASE-E FU I;Lo;0;L;;;;;N;;;;;
+ 169C9;BAMUM LETTER PHASE-E MVI;Lo;0;L;;;;;N;;;;;
+ 169CA;BAMUM LETTER PHASE-E PUAQ;Lo;0;L;;;;;N;;;;;
+ 169CB;BAMUM LETTER PHASE-E NGKUM;Lo;0;L;;;;;N;;;;;
+ 169CC;BAMUM LETTER PHASE-E KUT;Lo;0;L;;;;;N;;;;;
+ 169CD;BAMUM LETTER PHASE-E PIET;Lo;0;L;;;;;N;;;;;
+ 169CE;BAMUM LETTER PHASE-E NTAP;Lo;0;L;;;;;N;;;;;
+ 169CF;BAMUM LETTER PHASE-E YEUAET;Lo;0;L;;;;;N;;;;;
+ 169D0;BAMUM LETTER PHASE-E NGGUP;Lo;0;L;;;;;N;;;;;
+ 169D1;BAMUM LETTER PHASE-E PA PEOPLE;Lo;0;L;;;;;N;;;;;
+ 169D2;BAMUM LETTER PHASE-E FU CALL;Lo;0;L;;;;;N;;;;;
+ 169D3;BAMUM LETTER PHASE-E FOM;Lo;0;L;;;;;N;;;;;
+ 169D4;BAMUM LETTER PHASE-E NJEE;Lo;0;L;;;;;N;;;;;
+ 169D5;BAMUM LETTER PHASE-E A;Lo;0;L;;;;;N;;;;;
+ 169D6;BAMUM LETTER PHASE-E TOQ;Lo;0;L;;;;;N;;;;;
+ 169D7;BAMUM LETTER PHASE-E O;Lo;0;L;;;;;N;;;;;
+ 169D8;BAMUM LETTER PHASE-E I;Lo;0;L;;;;;N;;;;;
+ 169D9;BAMUM LETTER PHASE-E LAQ;Lo;0;L;;;;;N;;;;;
+ 169DA;BAMUM LETTER PHASE-E PA PLURAL;Lo;0;L;;;;;N;;;;;
+ 169DB;BAMUM LETTER PHASE-E TAA;Lo;0;L;;;;;N;;;;;
+ 169DC;BAMUM LETTER PHASE-E TAQ;Lo;0;L;;;;;N;;;;;
+ 169DD;BAMUM LETTER PHASE-E NDAA MY HOUSE;Lo;0;L;;;;;N;;;;;
+ 169DE;BAMUM LETTER PHASE-E SHIQ;Lo;0;L;;;;;N;;;;;
+ 169DF;BAMUM LETTER PHASE-E YEUX;Lo;0;L;;;;;N;;;;;
+ 169E0;BAMUM LETTER PHASE-E NGUAE;Lo;0;L;;;;;N;;;;;
+ 169E1;BAMUM LETTER PHASE-E YUAEN;Lo;0;L;;;;;N;;;;;
+ 169E2;BAMUM LETTER PHASE-E YOQ SWIMMING;Lo;0;L;;;;;N;;;;;
+ 169E3;BAMUM LETTER PHASE-E YOQ COVER;Lo;0;L;;;;;N;;;;;
+ 169E4;BAMUM LETTER PHASE-E YUQ;Lo;0;L;;;;;N;;;;;
+ 169E5;BAMUM LETTER PHASE-E YUN;Lo;0;L;;;;;N;;;;;
+ 169E6;BAMUM LETTER PHASE-E KEUX;Lo;0;L;;;;;N;;;;;
+ 169E7;BAMUM LETTER PHASE-E PEUX;Lo;0;L;;;;;N;;;;;
+ 169E8;BAMUM LETTER PHASE-E NJEE EPOCH;Lo;0;L;;;;;N;;;;;
+ 169E9;BAMUM LETTER PHASE-E PUE;Lo;0;L;;;;;N;;;;;
+ 169EA;BAMUM LETTER PHASE-E WUE;Lo;0;L;;;;;N;;;;;
+ 169EB;BAMUM LETTER PHASE-E FEE;Lo;0;L;;;;;N;;;;;
+ 169EC;BAMUM LETTER PHASE-E VEE;Lo;0;L;;;;;N;;;;;
+ 169ED;BAMUM LETTER PHASE-E LU;Lo;0;L;;;;;N;;;;;
+ 169EE;BAMUM LETTER PHASE-E MI;Lo;0;L;;;;;N;;;;;
+ 169EF;BAMUM LETTER PHASE-E REUX;Lo;0;L;;;;;N;;;;;
+ 169F0;BAMUM LETTER PHASE-E RAE;Lo;0;L;;;;;N;;;;;
+ 169F1;BAMUM LETTER PHASE-E NGUAET;Lo;0;L;;;;;N;;;;;
+ 169F2;BAMUM LETTER PHASE-E NGA;Lo;0;L;;;;;N;;;;;
+ 169F3;BAMUM LETTER PHASE-E SHO;Lo;0;L;;;;;N;;;;;
+ 169F4;BAMUM LETTER PHASE-E SHOQ;Lo;0;L;;;;;N;;;;;
+ 169F5;BAMUM LETTER PHASE-E FU REMEDY;Lo;0;L;;;;;N;;;;;
+ 169F6;BAMUM LETTER PHASE-E NA;Lo;0;L;;;;;N;;;;;
+ 169F7;BAMUM LETTER PHASE-E PI;Lo;0;L;;;;;N;;;;;
+ 169F8;BAMUM LETTER PHASE-E LOQ;Lo;0;L;;;;;N;;;;;
+ 169F9;BAMUM LETTER PHASE-E KO;Lo;0;L;;;;;N;;;;;
+ 169FA;BAMUM LETTER PHASE-E MEN;Lo;0;L;;;;;N;;;;;
+ 169FB;BAMUM LETTER PHASE-E MA;Lo;0;L;;;;;N;;;;;
+ 169FC;BAMUM LETTER PHASE-E MAQ;Lo;0;L;;;;;N;;;;;
+ 169FD;BAMUM LETTER PHASE-E TEU;Lo;0;L;;;;;N;;;;;
+ 169FE;BAMUM LETTER PHASE-E KI;Lo;0;L;;;;;N;;;;;
+ 169FF;BAMUM LETTER PHASE-E MON;Lo;0;L;;;;;N;;;;;
+ 16A00;BAMUM LETTER PHASE-E TEN;Lo;0;L;;;;;N;;;;;
+ 16A01;BAMUM LETTER PHASE-E FAQ;Lo;0;L;;;;;N;;;;;
+ 16A02;BAMUM LETTER PHASE-E GHOM;Lo;0;L;;;;;N;;;;;
+ 16A03;BAMUM LETTER PHASE-F KA;Lo;0;L;;;;;N;;;;;
+ 16A04;BAMUM LETTER PHASE-F U;Lo;0;L;;;;;N;;;;;
+ 16A05;BAMUM LETTER PHASE-F KU;Lo;0;L;;;;;N;;;;;
+ 16A06;BAMUM LETTER PHASE-F EE;Lo;0;L;;;;;N;;;;;
+ 16A07;BAMUM LETTER PHASE-F REE;Lo;0;L;;;;;N;;;;;
+ 16A08;BAMUM LETTER PHASE-F TAE;Lo;0;L;;;;;N;;;;;
+ 16A09;BAMUM LETTER PHASE-F NYI;Lo;0;L;;;;;N;;;;;
+ 16A0A;BAMUM LETTER PHASE-F LA;Lo;0;L;;;;;N;;;;;
+ 16A0B;BAMUM LETTER PHASE-F RII;Lo;0;L;;;;;N;;;;;
+ 16A0C;BAMUM LETTER PHASE-F RIEE;Lo;0;L;;;;;N;;;;;
+ 16A0D;BAMUM LETTER PHASE-F MEEEE;Lo;0;L;;;;;N;;;;;
+ 16A0E;BAMUM LETTER PHASE-F TAA;Lo;0;L;;;;;N;;;;;
+ 16A0F;BAMUM LETTER PHASE-F NDAA;Lo;0;L;;;;;N;;;;;
+ 16A10;BAMUM LETTER PHASE-F NJAEM;Lo;0;L;;;;;N;;;;;
+ 16A11;BAMUM LETTER PHASE-F M;Lo;0;L;;;;;N;;;;;
+ 16A12;BAMUM LETTER PHASE-F SUU;Lo;0;L;;;;;N;;;;;
+ 16A13;BAMUM LETTER PHASE-F SHII;Lo;0;L;;;;;N;;;;;
+ 16A14;BAMUM LETTER PHASE-F SI;Lo;0;L;;;;;N;;;;;
+ 16A15;BAMUM LETTER PHASE-F SEUX;Lo;0;L;;;;;N;;;;;
+ 16A16;BAMUM LETTER PHASE-F KYEE;Lo;0;L;;;;;N;;;;;
+ 16A17;BAMUM LETTER PHASE-F KET;Lo;0;L;;;;;N;;;;;
+ 16A18;BAMUM LETTER PHASE-F NUAE;Lo;0;L;;;;;N;;;;;
+ 16A19;BAMUM LETTER PHASE-F NU;Lo;0;L;;;;;N;;;;;
+ 16A1A;BAMUM LETTER PHASE-F NJUAE;Lo;0;L;;;;;N;;;;;
+ 16A1B;BAMUM LETTER PHASE-F YOQ;Lo;0;L;;;;;N;;;;;
+ 16A1C;BAMUM LETTER PHASE-F SHU;Lo;0;L;;;;;N;;;;;
+ 16A1D;BAMUM LETTER PHASE-F YA;Lo;0;L;;;;;N;;;;;
+ 16A1E;BAMUM LETTER PHASE-F NSHA;Lo;0;L;;;;;N;;;;;
+ 16A1F;BAMUM LETTER PHASE-F PEUX;Lo;0;L;;;;;N;;;;;
+ 16A20;BAMUM LETTER PHASE-F NTEE;Lo;0;L;;;;;N;;;;;
+ 16A21;BAMUM LETTER PHASE-F WUE;Lo;0;L;;;;;N;;;;;
+ 16A22;BAMUM LETTER PHASE-F PEE;Lo;0;L;;;;;N;;;;;
+ 16A23;BAMUM LETTER PHASE-F RU;Lo;0;L;;;;;N;;;;;
+ 16A24;BAMUM LETTER PHASE-F NI;Lo;0;L;;;;;N;;;;;
+ 16A25;BAMUM LETTER PHASE-F REUX;Lo;0;L;;;;;N;;;;;
+ 16A26;BAMUM LETTER PHASE-F KEN;Lo;0;L;;;;;N;;;;;
+ 16A27;BAMUM LETTER PHASE-F NGKWAEN;Lo;0;L;;;;;N;;;;;
+ 16A28;BAMUM LETTER PHASE-F NGGA;Lo;0;L;;;;;N;;;;;
+ 16A29;BAMUM LETTER PHASE-F SHO;Lo;0;L;;;;;N;;;;;
+ 16A2A;BAMUM LETTER PHASE-F PUAE;Lo;0;L;;;;;N;;;;;
+ 16A2B;BAMUM LETTER PHASE-F FOM;Lo;0;L;;;;;N;;;;;
+ 16A2C;BAMUM LETTER PHASE-F WA;Lo;0;L;;;;;N;;;;;
+ 16A2D;BAMUM LETTER PHASE-F LI;Lo;0;L;;;;;N;;;;;
+ 16A2E;BAMUM LETTER PHASE-F LOQ;Lo;0;L;;;;;N;;;;;
+ 16A2F;BAMUM LETTER PHASE-F KO;Lo;0;L;;;;;N;;;;;
+ 16A30;BAMUM LETTER PHASE-F MBEN;Lo;0;L;;;;;N;;;;;
+ 16A31;BAMUM LETTER PHASE-F REN;Lo;0;L;;;;;N;;;;;
+ 16A32;BAMUM LETTER PHASE-F MA;Lo;0;L;;;;;N;;;;;
+ 16A33;BAMUM LETTER PHASE-F MO;Lo;0;L;;;;;N;;;;;
+ 16A34;BAMUM LETTER PHASE-F MBAA;Lo;0;L;;;;;N;;;;;
+ 16A35;BAMUM LETTER PHASE-F TET;Lo;0;L;;;;;N;;;;;
+ 16A36;BAMUM LETTER PHASE-F KPA;Lo;0;L;;;;;N;;;;;
+ 16A37;BAMUM LETTER PHASE-F SAMBA;Lo;0;L;;;;;N;;;;;
+ 16A38;BAMUM LETTER PHASE-F VUEQ;Lo;0;L;;;;;N;;;;;
+ 16A40;MRO LETTER TA;Lo;0;L;;;;;N;;;;;
+ 16A41;MRO LETTER NGI;Lo;0;L;;;;;N;;;;;
+ 16A42;MRO LETTER YO;Lo;0;L;;;;;N;;;;;
+ 16A43;MRO LETTER MIM;Lo;0;L;;;;;N;;;;;
+ 16A44;MRO LETTER BA;Lo;0;L;;;;;N;;;;;
+ 16A45;MRO LETTER DA;Lo;0;L;;;;;N;;;;;
+ 16A46;MRO LETTER A;Lo;0;L;;;;;N;;;;;
+ 16A47;MRO LETTER PHI;Lo;0;L;;;;;N;;;;;
+ 16A48;MRO LETTER KHAI;Lo;0;L;;;;;N;;;;;
+ 16A49;MRO LETTER HAO;Lo;0;L;;;;;N;;;;;
+ 16A4A;MRO LETTER DAI;Lo;0;L;;;;;N;;;;;
+ 16A4B;MRO LETTER CHU;Lo;0;L;;;;;N;;;;;
+ 16A4C;MRO LETTER KEAAE;Lo;0;L;;;;;N;;;;;
+ 16A4D;MRO LETTER OL;Lo;0;L;;;;;N;;;;;
+ 16A4E;MRO LETTER MAEM;Lo;0;L;;;;;N;;;;;
+ 16A4F;MRO LETTER NIN;Lo;0;L;;;;;N;;;;;
+ 16A50;MRO LETTER PA;Lo;0;L;;;;;N;;;;;
+ 16A51;MRO LETTER OO;Lo;0;L;;;;;N;;;;;
+ 16A52;MRO LETTER O;Lo;0;L;;;;;N;;;;;
+ 16A53;MRO LETTER RO;Lo;0;L;;;;;N;;;;;
+ 16A54;MRO LETTER SHI;Lo;0;L;;;;;N;;;;;
+ 16A55;MRO LETTER THEA;Lo;0;L;;;;;N;;;;;
+ 16A56;MRO LETTER EA;Lo;0;L;;;;;N;;;;;
+ 16A57;MRO LETTER WA;Lo;0;L;;;;;N;;;;;
+ 16A58;MRO LETTER E;Lo;0;L;;;;;N;;;;;
+ 16A59;MRO LETTER KO;Lo;0;L;;;;;N;;;;;
+ 16A5A;MRO LETTER LAN;Lo;0;L;;;;;N;;;;;
+ 16A5B;MRO LETTER LA;Lo;0;L;;;;;N;;;;;
+ 16A5C;MRO LETTER HAI;Lo;0;L;;;;;N;;;;;
+ 16A5D;MRO LETTER RI;Lo;0;L;;;;;N;;;;;
+ 16A5E;MRO LETTER TEK;Lo;0;L;;;;;N;;;;;
+ 16A60;MRO DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 16A61;MRO DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 16A62;MRO DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 16A63;MRO DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 16A64;MRO DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 16A65;MRO DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 16A66;MRO DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 16A67;MRO DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 16A68;MRO DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 16A69;MRO DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 16A6E;MRO DANDA;Po;0;L;;;;;N;;;;;
+ 16A6F;MRO DOUBLE DANDA;Po;0;L;;;;;N;;;;;
+ 16AD0;BASSA VAH LETTER ENNI;Lo;0;L;;;;;N;;;;;
+ 16AD1;BASSA VAH LETTER KA;Lo;0;L;;;;;N;;;;;
+ 16AD2;BASSA VAH LETTER SE;Lo;0;L;;;;;N;;;;;
+ 16AD3;BASSA VAH LETTER FA;Lo;0;L;;;;;N;;;;;
+ 16AD4;BASSA VAH LETTER MBE;Lo;0;L;;;;;N;;;;;
+ 16AD5;BASSA VAH LETTER YIE;Lo;0;L;;;;;N;;;;;
+ 16AD6;BASSA VAH LETTER GAH;Lo;0;L;;;;;N;;;;;
+ 16AD7;BASSA VAH LETTER DHII;Lo;0;L;;;;;N;;;;;
+ 16AD8;BASSA VAH LETTER KPAH;Lo;0;L;;;;;N;;;;;
+ 16AD9;BASSA VAH LETTER JO;Lo;0;L;;;;;N;;;;;
+ 16ADA;BASSA VAH LETTER HWAH;Lo;0;L;;;;;N;;;;;
+ 16ADB;BASSA VAH LETTER WA;Lo;0;L;;;;;N;;;;;
+ 16ADC;BASSA VAH LETTER ZO;Lo;0;L;;;;;N;;;;;
+ 16ADD;BASSA VAH LETTER GBU;Lo;0;L;;;;;N;;;;;
+ 16ADE;BASSA VAH LETTER DO;Lo;0;L;;;;;N;;;;;
+ 16ADF;BASSA VAH LETTER CE;Lo;0;L;;;;;N;;;;;
+ 16AE0;BASSA VAH LETTER UWU;Lo;0;L;;;;;N;;;;;
+ 16AE1;BASSA VAH LETTER TO;Lo;0;L;;;;;N;;;;;
+ 16AE2;BASSA VAH LETTER BA;Lo;0;L;;;;;N;;;;;
+ 16AE3;BASSA VAH LETTER VU;Lo;0;L;;;;;N;;;;;
+ 16AE4;BASSA VAH LETTER YEIN;Lo;0;L;;;;;N;;;;;
+ 16AE5;BASSA VAH LETTER PA;Lo;0;L;;;;;N;;;;;
+ 16AE6;BASSA VAH LETTER WADDA;Lo;0;L;;;;;N;;;;;
+ 16AE7;BASSA VAH LETTER A;Lo;0;L;;;;;N;;;;;
+ 16AE8;BASSA VAH LETTER O;Lo;0;L;;;;;N;;;;;
+ 16AE9;BASSA VAH LETTER OO;Lo;0;L;;;;;N;;;;;
+ 16AEA;BASSA VAH LETTER U;Lo;0;L;;;;;N;;;;;
+ 16AEB;BASSA VAH LETTER EE;Lo;0;L;;;;;N;;;;;
+ 16AEC;BASSA VAH LETTER E;Lo;0;L;;;;;N;;;;;
+ 16AED;BASSA VAH LETTER I;Lo;0;L;;;;;N;;;;;
+ 16AF0;BASSA VAH COMBINING HIGH TONE;Mn;1;NSM;;;;;N;;;;;
+ 16AF1;BASSA VAH COMBINING LOW TONE;Mn;1;NSM;;;;;N;;;;;
+ 16AF2;BASSA VAH COMBINING MID TONE;Mn;1;NSM;;;;;N;;;;;
+ 16AF3;BASSA VAH COMBINING LOW-MID TONE;Mn;1;NSM;;;;;N;;;;;
+ 16AF4;BASSA VAH COMBINING HIGH-LOW TONE;Mn;1;NSM;;;;;N;;;;;
+ 16AF5;BASSA VAH FULL STOP;Po;0;L;;;;;N;;;;;
+ 16B00;PAHAWH HMONG VOWEL KEEB;Lo;0;L;;;;;N;;;;;
+ 16B01;PAHAWH HMONG VOWEL KEEV;Lo;0;L;;;;;N;;;;;
+ 16B02;PAHAWH HMONG VOWEL KIB;Lo;0;L;;;;;N;;;;;
+ 16B03;PAHAWH HMONG VOWEL KIV;Lo;0;L;;;;;N;;;;;
+ 16B04;PAHAWH HMONG VOWEL KAUB;Lo;0;L;;;;;N;;;;;
+ 16B05;PAHAWH HMONG VOWEL KAUV;Lo;0;L;;;;;N;;;;;
+ 16B06;PAHAWH HMONG VOWEL KUB;Lo;0;L;;;;;N;;;;;
+ 16B07;PAHAWH HMONG VOWEL KUV;Lo;0;L;;;;;N;;;;;
+ 16B08;PAHAWH HMONG VOWEL KEB;Lo;0;L;;;;;N;;;;;
+ 16B09;PAHAWH HMONG VOWEL KEV;Lo;0;L;;;;;N;;;;;
+ 16B0A;PAHAWH HMONG VOWEL KAIB;Lo;0;L;;;;;N;;;;;
+ 16B0B;PAHAWH HMONG VOWEL KAIV;Lo;0;L;;;;;N;;;;;
+ 16B0C;PAHAWH HMONG VOWEL KOOB;Lo;0;L;;;;;N;;;;;
+ 16B0D;PAHAWH HMONG VOWEL KOOV;Lo;0;L;;;;;N;;;;;
+ 16B0E;PAHAWH HMONG VOWEL KAWB;Lo;0;L;;;;;N;;;;;
+ 16B0F;PAHAWH HMONG VOWEL KAWV;Lo;0;L;;;;;N;;;;;
+ 16B10;PAHAWH HMONG VOWEL KUAB;Lo;0;L;;;;;N;;;;;
+ 16B11;PAHAWH HMONG VOWEL KUAV;Lo;0;L;;;;;N;;;;;
+ 16B12;PAHAWH HMONG VOWEL KOB;Lo;0;L;;;;;N;;;;;
+ 16B13;PAHAWH HMONG VOWEL KOV;Lo;0;L;;;;;N;;;;;
+ 16B14;PAHAWH HMONG VOWEL KIAB;Lo;0;L;;;;;N;;;;;
+ 16B15;PAHAWH HMONG VOWEL KIAV;Lo;0;L;;;;;N;;;;;
+ 16B16;PAHAWH HMONG VOWEL KAB;Lo;0;L;;;;;N;;;;;
+ 16B17;PAHAWH HMONG VOWEL KAV;Lo;0;L;;;;;N;;;;;
+ 16B18;PAHAWH HMONG VOWEL KWB;Lo;0;L;;;;;N;;;;;
+ 16B19;PAHAWH HMONG VOWEL KWV;Lo;0;L;;;;;N;;;;;
+ 16B1A;PAHAWH HMONG VOWEL KAAB;Lo;0;L;;;;;N;;;;;
+ 16B1B;PAHAWH HMONG VOWEL KAAV;Lo;0;L;;;;;N;;;;;
+ 16B1C;PAHAWH HMONG CONSONANT VAU;Lo;0;L;;;;;N;;;;;
+ 16B1D;PAHAWH HMONG CONSONANT NTSAU;Lo;0;L;;;;;N;;;;;
+ 16B1E;PAHAWH HMONG CONSONANT LAU;Lo;0;L;;;;;N;;;;;
+ 16B1F;PAHAWH HMONG CONSONANT HAU;Lo;0;L;;;;;N;;;;;
+ 16B20;PAHAWH HMONG CONSONANT NLAU;Lo;0;L;;;;;N;;;;;
+ 16B21;PAHAWH HMONG CONSONANT RAU;Lo;0;L;;;;;N;;;;;
+ 16B22;PAHAWH HMONG CONSONANT NKAU;Lo;0;L;;;;;N;;;;;
+ 16B23;PAHAWH HMONG CONSONANT QHAU;Lo;0;L;;;;;N;;;;;
+ 16B24;PAHAWH HMONG CONSONANT YAU;Lo;0;L;;;;;N;;;;;
+ 16B25;PAHAWH HMONG CONSONANT HLAU;Lo;0;L;;;;;N;;;;;
+ 16B26;PAHAWH HMONG CONSONANT MAU;Lo;0;L;;;;;N;;;;;
+ 16B27;PAHAWH HMONG CONSONANT CHAU;Lo;0;L;;;;;N;;;;;
+ 16B28;PAHAWH HMONG CONSONANT NCHAU;Lo;0;L;;;;;N;;;;;
+ 16B29;PAHAWH HMONG CONSONANT HNAU;Lo;0;L;;;;;N;;;;;
+ 16B2A;PAHAWH HMONG CONSONANT PLHAU;Lo;0;L;;;;;N;;;;;
+ 16B2B;PAHAWH HMONG CONSONANT NTHAU;Lo;0;L;;;;;N;;;;;
+ 16B2C;PAHAWH HMONG CONSONANT NAU;Lo;0;L;;;;;N;;;;;
+ 16B2D;PAHAWH HMONG CONSONANT AU;Lo;0;L;;;;;N;;;;;
+ 16B2E;PAHAWH HMONG CONSONANT XAU;Lo;0;L;;;;;N;;;;;
+ 16B2F;PAHAWH HMONG CONSONANT CAU;Lo;0;L;;;;;N;;;;;
+ 16B30;PAHAWH HMONG MARK CIM TUB;Mn;230;NSM;;;;;N;;;;;
+ 16B31;PAHAWH HMONG MARK CIM SO;Mn;230;NSM;;;;;N;;;;;
+ 16B32;PAHAWH HMONG MARK CIM KES;Mn;230;NSM;;;;;N;;;;;
+ 16B33;PAHAWH HMONG MARK CIM KHAV;Mn;230;NSM;;;;;N;;;;;
+ 16B34;PAHAWH HMONG MARK CIM SUAM;Mn;230;NSM;;;;;N;;;;;
+ 16B35;PAHAWH HMONG MARK CIM HOM;Mn;230;NSM;;;;;N;;;;;
+ 16B36;PAHAWH HMONG MARK CIM TAUM;Mn;230;NSM;;;;;N;;;;;
+ 16B37;PAHAWH HMONG SIGN VOS THOM;Po;0;L;;;;;N;;;;;
+ 16B38;PAHAWH HMONG SIGN VOS TSHAB CEEB;Po;0;L;;;;;N;;;;;
+ 16B39;PAHAWH HMONG SIGN CIM CHEEM;Po;0;L;;;;;N;;;;;
+ 16B3A;PAHAWH HMONG SIGN VOS THIAB;Po;0;L;;;;;N;;;;;
+ 16B3B;PAHAWH HMONG SIGN VOS FEEM;Po;0;L;;;;;N;;;;;
+ 16B3C;PAHAWH HMONG SIGN XYEEM NTXIV;So;0;L;;;;;N;;;;;
+ 16B3D;PAHAWH HMONG SIGN XYEEM RHO;So;0;L;;;;;N;;;;;
+ 16B3E;PAHAWH HMONG SIGN XYEEM TOV;So;0;L;;;;;N;;;;;
+ 16B3F;PAHAWH HMONG SIGN XYEEM FAIB;So;0;L;;;;;N;;;;;
+ 16B40;PAHAWH HMONG SIGN VOS SEEV;Lm;0;L;;;;;N;;;;;
+ 16B41;PAHAWH HMONG SIGN MEEJ SUAB;Lm;0;L;;;;;N;;;;;
+ 16B42;PAHAWH HMONG SIGN VOS NRUA;Lm;0;L;;;;;N;;;;;
+ 16B43;PAHAWH HMONG SIGN IB YAM;Lm;0;L;;;;;N;;;;;
+ 16B44;PAHAWH HMONG SIGN XAUS;Po;0;L;;;;;N;;;;;
+ 16B45;PAHAWH HMONG SIGN CIM TSOV ROG;So;0;L;;;;;N;;;;;
+ 16B50;PAHAWH HMONG DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 16B51;PAHAWH HMONG DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 16B52;PAHAWH HMONG DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 16B53;PAHAWH HMONG DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 16B54;PAHAWH HMONG DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 16B55;PAHAWH HMONG DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 16B56;PAHAWH HMONG DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 16B57;PAHAWH HMONG DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 16B58;PAHAWH HMONG DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 16B59;PAHAWH HMONG DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 16B5B;PAHAWH HMONG NUMBER TENS;No;0;L;;;;10;N;;;;;
+ 16B5C;PAHAWH HMONG NUMBER HUNDREDS;No;0;L;;;;100;N;;;;;
+ 16B5D;PAHAWH HMONG NUMBER TEN THOUSANDS;No;0;L;;;;10000;N;;;;;
+ 16B5E;PAHAWH HMONG NUMBER MILLIONS;No;0;L;;;;1000000;N;;;;;
+ 16B5F;PAHAWH HMONG NUMBER HUNDRED MILLIONS;No;0;L;;;;100000000;N;;;;;
+ 16B60;PAHAWH HMONG NUMBER TEN BILLIONS;No;0;L;;;;10000000000;N;;;;;
+ 16B61;PAHAWH HMONG NUMBER TRILLIONS;No;0;L;;;;1000000000000;N;;;;;
+ 16B63;PAHAWH HMONG SIGN VOS LUB;Lo;0;L;;;;;N;;;;;
+ 16B64;PAHAWH HMONG SIGN XYOO;Lo;0;L;;;;;N;;;;;
+ 16B65;PAHAWH HMONG SIGN HLI;Lo;0;L;;;;;N;;;;;
+ 16B66;PAHAWH HMONG SIGN THIRD-STAGE HLI;Lo;0;L;;;;;N;;;;;
+ 16B67;PAHAWH HMONG SIGN ZWJ THAJ;Lo;0;L;;;;;N;;;;;
+ 16B68;PAHAWH HMONG SIGN HNUB;Lo;0;L;;;;;N;;;;;
+ 16B69;PAHAWH HMONG SIGN NQIG;Lo;0;L;;;;;N;;;;;
+ 16B6A;PAHAWH HMONG SIGN XIAB;Lo;0;L;;;;;N;;;;;
+ 16B6B;PAHAWH HMONG SIGN NTUJ;Lo;0;L;;;;;N;;;;;
+ 16B6C;PAHAWH HMONG SIGN AV;Lo;0;L;;;;;N;;;;;
+ 16B6D;PAHAWH HMONG SIGN TXHEEJ CEEV;Lo;0;L;;;;;N;;;;;
+ 16B6E;PAHAWH HMONG SIGN MEEJ TSEEB;Lo;0;L;;;;;N;;;;;
+ 16B6F;PAHAWH HMONG SIGN TAU;Lo;0;L;;;;;N;;;;;
+ 16B70;PAHAWH HMONG SIGN LOS;Lo;0;L;;;;;N;;;;;
+ 16B71;PAHAWH HMONG SIGN MUS;Lo;0;L;;;;;N;;;;;
+ 16B72;PAHAWH HMONG SIGN CIM HAIS LUS NTOG NTOG;Lo;0;L;;;;;N;;;;;
+ 16B73;PAHAWH HMONG SIGN CIM CUAM TSHOOJ;Lo;0;L;;;;;N;;;;;
+ 16B74;PAHAWH HMONG SIGN CIM TXWV;Lo;0;L;;;;;N;;;;;
+ 16B75;PAHAWH HMONG SIGN CIM TXWV CHWV;Lo;0;L;;;;;N;;;;;
+ 16B76;PAHAWH HMONG SIGN CIM PUB DAWB;Lo;0;L;;;;;N;;;;;
+ 16B77;PAHAWH HMONG SIGN CIM NRES TOS;Lo;0;L;;;;;N;;;;;
+ 16B7D;PAHAWH HMONG CLAN SIGN TSHEEJ;Lo;0;L;;;;;N;;;;;
+ 16B7E;PAHAWH HMONG CLAN SIGN YEEG;Lo;0;L;;;;;N;;;;;
+ 16B7F;PAHAWH HMONG CLAN SIGN LIS;Lo;0;L;;;;;N;;;;;
+ 16B80;PAHAWH HMONG CLAN SIGN LAUJ;Lo;0;L;;;;;N;;;;;
+ 16B81;PAHAWH HMONG CLAN SIGN XYOOJ;Lo;0;L;;;;;N;;;;;
+ 16B82;PAHAWH HMONG CLAN SIGN KOO;Lo;0;L;;;;;N;;;;;
+ 16B83;PAHAWH HMONG CLAN SIGN HAWJ;Lo;0;L;;;;;N;;;;;
+ 16B84;PAHAWH HMONG CLAN SIGN MUAS;Lo;0;L;;;;;N;;;;;
+ 16B85;PAHAWH HMONG CLAN SIGN THOJ;Lo;0;L;;;;;N;;;;;
+ 16B86;PAHAWH HMONG CLAN SIGN TSAB;Lo;0;L;;;;;N;;;;;
+ 16B87;PAHAWH HMONG CLAN SIGN PHAB;Lo;0;L;;;;;N;;;;;
+ 16B88;PAHAWH HMONG CLAN SIGN KHAB;Lo;0;L;;;;;N;;;;;
+ 16B89;PAHAWH HMONG CLAN SIGN HAM;Lo;0;L;;;;;N;;;;;
+ 16B8A;PAHAWH HMONG CLAN SIGN VAJ;Lo;0;L;;;;;N;;;;;
+ 16B8B;PAHAWH HMONG CLAN SIGN FAJ;Lo;0;L;;;;;N;;;;;
+ 16B8C;PAHAWH HMONG CLAN SIGN YAJ;Lo;0;L;;;;;N;;;;;
+ 16B8D;PAHAWH HMONG CLAN SIGN TSWB;Lo;0;L;;;;;N;;;;;
+ 16B8E;PAHAWH HMONG CLAN SIGN KWM;Lo;0;L;;;;;N;;;;;
+ 16B8F;PAHAWH HMONG CLAN SIGN VWJ;Lo;0;L;;;;;N;;;;;
+ 16E40;MEDEFAIDRIN CAPITAL LETTER M;Lu;0;L;;;;;N;;;;16E60;
+ 16E41;MEDEFAIDRIN CAPITAL LETTER S;Lu;0;L;;;;;N;;;;16E61;
+ 16E42;MEDEFAIDRIN CAPITAL LETTER V;Lu;0;L;;;;;N;;;;16E62;
+ 16E43;MEDEFAIDRIN CAPITAL LETTER W;Lu;0;L;;;;;N;;;;16E63;
+ 16E44;MEDEFAIDRIN CAPITAL LETTER ATIU;Lu;0;L;;;;;N;;;;16E64;
+ 16E45;MEDEFAIDRIN CAPITAL LETTER Z;Lu;0;L;;;;;N;;;;16E65;
+ 16E46;MEDEFAIDRIN CAPITAL LETTER KP;Lu;0;L;;;;;N;;;;16E66;
+ 16E47;MEDEFAIDRIN CAPITAL LETTER P;Lu;0;L;;;;;N;;;;16E67;
+ 16E48;MEDEFAIDRIN CAPITAL LETTER T;Lu;0;L;;;;;N;;;;16E68;
+ 16E49;MEDEFAIDRIN CAPITAL LETTER G;Lu;0;L;;;;;N;;;;16E69;
+ 16E4A;MEDEFAIDRIN CAPITAL LETTER F;Lu;0;L;;;;;N;;;;16E6A;
+ 16E4B;MEDEFAIDRIN CAPITAL LETTER I;Lu;0;L;;;;;N;;;;16E6B;
+ 16E4C;MEDEFAIDRIN CAPITAL LETTER K;Lu;0;L;;;;;N;;;;16E6C;
+ 16E4D;MEDEFAIDRIN CAPITAL LETTER A;Lu;0;L;;;;;N;;;;16E6D;
+ 16E4E;MEDEFAIDRIN CAPITAL LETTER J;Lu;0;L;;;;;N;;;;16E6E;
+ 16E4F;MEDEFAIDRIN CAPITAL LETTER E;Lu;0;L;;;;;N;;;;16E6F;
+ 16E50;MEDEFAIDRIN CAPITAL LETTER B;Lu;0;L;;;;;N;;;;16E70;
+ 16E51;MEDEFAIDRIN CAPITAL LETTER C;Lu;0;L;;;;;N;;;;16E71;
+ 16E52;MEDEFAIDRIN CAPITAL LETTER U;Lu;0;L;;;;;N;;;;16E72;
+ 16E53;MEDEFAIDRIN CAPITAL LETTER YU;Lu;0;L;;;;;N;;;;16E73;
+ 16E54;MEDEFAIDRIN CAPITAL LETTER L;Lu;0;L;;;;;N;;;;16E74;
+ 16E55;MEDEFAIDRIN CAPITAL LETTER Q;Lu;0;L;;;;;N;;;;16E75;
+ 16E56;MEDEFAIDRIN CAPITAL LETTER HP;Lu;0;L;;;;;N;;;;16E76;
+ 16E57;MEDEFAIDRIN CAPITAL LETTER NY;Lu;0;L;;;;;N;;;;16E77;
+ 16E58;MEDEFAIDRIN CAPITAL LETTER X;Lu;0;L;;;;;N;;;;16E78;
+ 16E59;MEDEFAIDRIN CAPITAL LETTER D;Lu;0;L;;;;;N;;;;16E79;
+ 16E5A;MEDEFAIDRIN CAPITAL LETTER OE;Lu;0;L;;;;;N;;;;16E7A;
+ 16E5B;MEDEFAIDRIN CAPITAL LETTER N;Lu;0;L;;;;;N;;;;16E7B;
+ 16E5C;MEDEFAIDRIN CAPITAL LETTER R;Lu;0;L;;;;;N;;;;16E7C;
+ 16E5D;MEDEFAIDRIN CAPITAL LETTER O;Lu;0;L;;;;;N;;;;16E7D;
+ 16E5E;MEDEFAIDRIN CAPITAL LETTER AI;Lu;0;L;;;;;N;;;;16E7E;
+ 16E5F;MEDEFAIDRIN CAPITAL LETTER Y;Lu;0;L;;;;;N;;;;16E7F;
+ 16E60;MEDEFAIDRIN SMALL LETTER M;Ll;0;L;;;;;N;;;16E40;;16E40
+ 16E61;MEDEFAIDRIN SMALL LETTER S;Ll;0;L;;;;;N;;;16E41;;16E41
+ 16E62;MEDEFAIDRIN SMALL LETTER V;Ll;0;L;;;;;N;;;16E42;;16E42
+ 16E63;MEDEFAIDRIN SMALL LETTER W;Ll;0;L;;;;;N;;;16E43;;16E43
+ 16E64;MEDEFAIDRIN SMALL LETTER ATIU;Ll;0;L;;;;;N;;;16E44;;16E44
+ 16E65;MEDEFAIDRIN SMALL LETTER Z;Ll;0;L;;;;;N;;;16E45;;16E45
+ 16E66;MEDEFAIDRIN SMALL LETTER KP;Ll;0;L;;;;;N;;;16E46;;16E46
+ 16E67;MEDEFAIDRIN SMALL LETTER P;Ll;0;L;;;;;N;;;16E47;;16E47
+ 16E68;MEDEFAIDRIN SMALL LETTER T;Ll;0;L;;;;;N;;;16E48;;16E48
+ 16E69;MEDEFAIDRIN SMALL LETTER G;Ll;0;L;;;;;N;;;16E49;;16E49
+ 16E6A;MEDEFAIDRIN SMALL LETTER F;Ll;0;L;;;;;N;;;16E4A;;16E4A
+ 16E6B;MEDEFAIDRIN SMALL LETTER I;Ll;0;L;;;;;N;;;16E4B;;16E4B
+ 16E6C;MEDEFAIDRIN SMALL LETTER K;Ll;0;L;;;;;N;;;16E4C;;16E4C
+ 16E6D;MEDEFAIDRIN SMALL LETTER A;Ll;0;L;;;;;N;;;16E4D;;16E4D
+ 16E6E;MEDEFAIDRIN SMALL LETTER J;Ll;0;L;;;;;N;;;16E4E;;16E4E
+ 16E6F;MEDEFAIDRIN SMALL LETTER E;Ll;0;L;;;;;N;;;16E4F;;16E4F
+ 16E70;MEDEFAIDRIN SMALL LETTER B;Ll;0;L;;;;;N;;;16E50;;16E50
+ 16E71;MEDEFAIDRIN SMALL LETTER C;Ll;0;L;;;;;N;;;16E51;;16E51
+ 16E72;MEDEFAIDRIN SMALL LETTER U;Ll;0;L;;;;;N;;;16E52;;16E52
+ 16E73;MEDEFAIDRIN SMALL LETTER YU;Ll;0;L;;;;;N;;;16E53;;16E53
+ 16E74;MEDEFAIDRIN SMALL LETTER L;Ll;0;L;;;;;N;;;16E54;;16E54
+ 16E75;MEDEFAIDRIN SMALL LETTER Q;Ll;0;L;;;;;N;;;16E55;;16E55
+ 16E76;MEDEFAIDRIN SMALL LETTER HP;Ll;0;L;;;;;N;;;16E56;;16E56
+ 16E77;MEDEFAIDRIN SMALL LETTER NY;Ll;0;L;;;;;N;;;16E57;;16E57
+ 16E78;MEDEFAIDRIN SMALL LETTER X;Ll;0;L;;;;;N;;;16E58;;16E58
+ 16E79;MEDEFAIDRIN SMALL LETTER D;Ll;0;L;;;;;N;;;16E59;;16E59
+ 16E7A;MEDEFAIDRIN SMALL LETTER OE;Ll;0;L;;;;;N;;;16E5A;;16E5A
+ 16E7B;MEDEFAIDRIN SMALL LETTER N;Ll;0;L;;;;;N;;;16E5B;;16E5B
+ 16E7C;MEDEFAIDRIN SMALL LETTER R;Ll;0;L;;;;;N;;;16E5C;;16E5C
+ 16E7D;MEDEFAIDRIN SMALL LETTER O;Ll;0;L;;;;;N;;;16E5D;;16E5D
+ 16E7E;MEDEFAIDRIN SMALL LETTER AI;Ll;0;L;;;;;N;;;16E5E;;16E5E
+ 16E7F;MEDEFAIDRIN SMALL LETTER Y;Ll;0;L;;;;;N;;;16E5F;;16E5F
+ 16E80;MEDEFAIDRIN DIGIT ZERO;No;0;L;;;;0;N;;;;;
+ 16E81;MEDEFAIDRIN DIGIT ONE;No;0;L;;;;1;N;;;;;
+ 16E82;MEDEFAIDRIN DIGIT TWO;No;0;L;;;;2;N;;;;;
+ 16E83;MEDEFAIDRIN DIGIT THREE;No;0;L;;;;3;N;;;;;
+ 16E84;MEDEFAIDRIN DIGIT FOUR;No;0;L;;;;4;N;;;;;
+ 16E85;MEDEFAIDRIN DIGIT FIVE;No;0;L;;;;5;N;;;;;
+ 16E86;MEDEFAIDRIN DIGIT SIX;No;0;L;;;;6;N;;;;;
+ 16E87;MEDEFAIDRIN DIGIT SEVEN;No;0;L;;;;7;N;;;;;
+ 16E88;MEDEFAIDRIN DIGIT EIGHT;No;0;L;;;;8;N;;;;;
+ 16E89;MEDEFAIDRIN DIGIT NINE;No;0;L;;;;9;N;;;;;
+ 16E8A;MEDEFAIDRIN NUMBER TEN;No;0;L;;;;10;N;;;;;
+ 16E8B;MEDEFAIDRIN NUMBER ELEVEN;No;0;L;;;;11;N;;;;;
+ 16E8C;MEDEFAIDRIN NUMBER TWELVE;No;0;L;;;;12;N;;;;;
+ 16E8D;MEDEFAIDRIN NUMBER THIRTEEN;No;0;L;;;;13;N;;;;;
+ 16E8E;MEDEFAIDRIN NUMBER FOURTEEN;No;0;L;;;;14;N;;;;;
+ 16E8F;MEDEFAIDRIN NUMBER FIFTEEN;No;0;L;;;;15;N;;;;;
+ 16E90;MEDEFAIDRIN NUMBER SIXTEEN;No;0;L;;;;16;N;;;;;
+ 16E91;MEDEFAIDRIN NUMBER SEVENTEEN;No;0;L;;;;17;N;;;;;
+ 16E92;MEDEFAIDRIN NUMBER EIGHTEEN;No;0;L;;;;18;N;;;;;
+ 16E93;MEDEFAIDRIN NUMBER NINETEEN;No;0;L;;;;19;N;;;;;
+ 16E94;MEDEFAIDRIN DIGIT ONE ALTERNATE FORM;No;0;L;;;;1;N;;;;;
+ 16E95;MEDEFAIDRIN DIGIT TWO ALTERNATE FORM;No;0;L;;;;2;N;;;;;
+ 16E96;MEDEFAIDRIN DIGIT THREE ALTERNATE FORM;No;0;L;;;;3;N;;;;;
+ 16E97;MEDEFAIDRIN COMMA;Po;0;L;;;;;N;;;;;
+ 16E98;MEDEFAIDRIN FULL STOP;Po;0;L;;;;;N;;;;;
+ 16E99;MEDEFAIDRIN SYMBOL AIVA;Po;0;L;;;;;N;;;;;
+ 16E9A;MEDEFAIDRIN EXCLAMATION OH;Po;0;L;;;;;N;;;;;
+ 16F00;MIAO LETTER PA;Lo;0;L;;;;;N;;;;;
+ 16F01;MIAO LETTER BA;Lo;0;L;;;;;N;;;;;
+ 16F02;MIAO LETTER YI PA;Lo;0;L;;;;;N;;;;;
+ 16F03;MIAO LETTER PLA;Lo;0;L;;;;;N;;;;;
+ 16F04;MIAO LETTER MA;Lo;0;L;;;;;N;;;;;
+ 16F05;MIAO LETTER MHA;Lo;0;L;;;;;N;;;;;
+ 16F06;MIAO LETTER ARCHAIC MA;Lo;0;L;;;;;N;;;;;
+ 16F07;MIAO LETTER FA;Lo;0;L;;;;;N;;;;;
+ 16F08;MIAO LETTER VA;Lo;0;L;;;;;N;;;;;
+ 16F09;MIAO LETTER VFA;Lo;0;L;;;;;N;;;;;
+ 16F0A;MIAO LETTER TA;Lo;0;L;;;;;N;;;;;
+ 16F0B;MIAO LETTER DA;Lo;0;L;;;;;N;;;;;
+ 16F0C;MIAO LETTER YI TTA;Lo;0;L;;;;;N;;;;;
+ 16F0D;MIAO LETTER YI TA;Lo;0;L;;;;;N;;;;;
+ 16F0E;MIAO LETTER TTA;Lo;0;L;;;;;N;;;;;
+ 16F0F;MIAO LETTER DDA;Lo;0;L;;;;;N;;;;;
+ 16F10;MIAO LETTER NA;Lo;0;L;;;;;N;;;;;
+ 16F11;MIAO LETTER NHA;Lo;0;L;;;;;N;;;;;
+ 16F12;MIAO LETTER YI NNA;Lo;0;L;;;;;N;;;;;
+ 16F13;MIAO LETTER ARCHAIC NA;Lo;0;L;;;;;N;;;;;
+ 16F14;MIAO LETTER NNA;Lo;0;L;;;;;N;;;;;
+ 16F15;MIAO LETTER NNHA;Lo;0;L;;;;;N;;;;;
+ 16F16;MIAO LETTER LA;Lo;0;L;;;;;N;;;;;
+ 16F17;MIAO LETTER LYA;Lo;0;L;;;;;N;;;;;
+ 16F18;MIAO LETTER LHA;Lo;0;L;;;;;N;;;;;
+ 16F19;MIAO LETTER LHYA;Lo;0;L;;;;;N;;;;;
+ 16F1A;MIAO LETTER TLHA;Lo;0;L;;;;;N;;;;;
+ 16F1B;MIAO LETTER DLHA;Lo;0;L;;;;;N;;;;;
+ 16F1C;MIAO LETTER TLHYA;Lo;0;L;;;;;N;;;;;
+ 16F1D;MIAO LETTER DLHYA;Lo;0;L;;;;;N;;;;;
+ 16F1E;MIAO LETTER KA;Lo;0;L;;;;;N;;;;;
+ 16F1F;MIAO LETTER GA;Lo;0;L;;;;;N;;;;;
+ 16F20;MIAO LETTER YI KA;Lo;0;L;;;;;N;;;;;
+ 16F21;MIAO LETTER QA;Lo;0;L;;;;;N;;;;;
+ 16F22;MIAO LETTER QGA;Lo;0;L;;;;;N;;;;;
+ 16F23;MIAO LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 16F24;MIAO LETTER NGHA;Lo;0;L;;;;;N;;;;;
+ 16F25;MIAO LETTER ARCHAIC NGA;Lo;0;L;;;;;N;;;;;
+ 16F26;MIAO LETTER HA;Lo;0;L;;;;;N;;;;;
+ 16F27;MIAO LETTER XA;Lo;0;L;;;;;N;;;;;
+ 16F28;MIAO LETTER GHA;Lo;0;L;;;;;N;;;;;
+ 16F29;MIAO LETTER GHHA;Lo;0;L;;;;;N;;;;;
+ 16F2A;MIAO LETTER TSSA;Lo;0;L;;;;;N;;;;;
+ 16F2B;MIAO LETTER DZZA;Lo;0;L;;;;;N;;;;;
+ 16F2C;MIAO LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 16F2D;MIAO LETTER NYHA;Lo;0;L;;;;;N;;;;;
+ 16F2E;MIAO LETTER TSHA;Lo;0;L;;;;;N;;;;;
+ 16F2F;MIAO LETTER DZHA;Lo;0;L;;;;;N;;;;;
+ 16F30;MIAO LETTER YI TSHA;Lo;0;L;;;;;N;;;;;
+ 16F31;MIAO LETTER YI DZHA;Lo;0;L;;;;;N;;;;;
+ 16F32;MIAO LETTER REFORMED TSHA;Lo;0;L;;;;;N;;;;;
+ 16F33;MIAO LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 16F34;MIAO LETTER SSA;Lo;0;L;;;;;N;;;;;
+ 16F35;MIAO LETTER ZHA;Lo;0;L;;;;;N;;;;;
+ 16F36;MIAO LETTER ZSHA;Lo;0;L;;;;;N;;;;;
+ 16F37;MIAO LETTER TSA;Lo;0;L;;;;;N;;;;;
+ 16F38;MIAO LETTER DZA;Lo;0;L;;;;;N;;;;;
+ 16F39;MIAO LETTER YI TSA;Lo;0;L;;;;;N;;;;;
+ 16F3A;MIAO LETTER SA;Lo;0;L;;;;;N;;;;;
+ 16F3B;MIAO LETTER ZA;Lo;0;L;;;;;N;;;;;
+ 16F3C;MIAO LETTER ZSA;Lo;0;L;;;;;N;;;;;
+ 16F3D;MIAO LETTER ZZA;Lo;0;L;;;;;N;;;;;
+ 16F3E;MIAO LETTER ZZSA;Lo;0;L;;;;;N;;;;;
+ 16F3F;MIAO LETTER ARCHAIC ZZA;Lo;0;L;;;;;N;;;;;
+ 16F40;MIAO LETTER ZZYA;Lo;0;L;;;;;N;;;;;
+ 16F41;MIAO LETTER ZZSYA;Lo;0;L;;;;;N;;;;;
+ 16F42;MIAO LETTER WA;Lo;0;L;;;;;N;;;;;
+ 16F43;MIAO LETTER AH;Lo;0;L;;;;;N;;;;;
+ 16F44;MIAO LETTER HHA;Lo;0;L;;;;;N;;;;;
+ 16F45;MIAO LETTER BRI;Lo;0;L;;;;;N;;;;;
+ 16F46;MIAO LETTER SYI;Lo;0;L;;;;;N;;;;;
+ 16F47;MIAO LETTER DZYI;Lo;0;L;;;;;N;;;;;
+ 16F48;MIAO LETTER TE;Lo;0;L;;;;;N;;;;;
+ 16F49;MIAO LETTER TSE;Lo;0;L;;;;;N;;;;;
+ 16F4A;MIAO LETTER RTE;Lo;0;L;;;;;N;;;;;
+ 16F4F;MIAO SIGN CONSONANT MODIFIER BAR;Mn;0;NSM;;;;;N;;;;;
+ 16F50;MIAO LETTER NASALIZATION;Lo;0;L;;;;;N;;;;;
+ 16F51;MIAO SIGN ASPIRATION;Mc;0;L;;;;;N;;;;;
+ 16F52;MIAO SIGN REFORMED VOICING;Mc;0;L;;;;;N;;;;;
+ 16F53;MIAO SIGN REFORMED ASPIRATION;Mc;0;L;;;;;N;;;;;
+ 16F54;MIAO VOWEL SIGN A;Mc;0;L;;;;;N;;;;;
+ 16F55;MIAO VOWEL SIGN AA;Mc;0;L;;;;;N;;;;;
+ 16F56;MIAO VOWEL SIGN AHH;Mc;0;L;;;;;N;;;;;
+ 16F57;MIAO VOWEL SIGN AN;Mc;0;L;;;;;N;;;;;
+ 16F58;MIAO VOWEL SIGN ANG;Mc;0;L;;;;;N;;;;;
+ 16F59;MIAO VOWEL SIGN O;Mc;0;L;;;;;N;;;;;
+ 16F5A;MIAO VOWEL SIGN OO;Mc;0;L;;;;;N;;;;;
+ 16F5B;MIAO VOWEL SIGN WO;Mc;0;L;;;;;N;;;;;
+ 16F5C;MIAO VOWEL SIGN W;Mc;0;L;;;;;N;;;;;
+ 16F5D;MIAO VOWEL SIGN E;Mc;0;L;;;;;N;;;;;
+ 16F5E;MIAO VOWEL SIGN EN;Mc;0;L;;;;;N;;;;;
+ 16F5F;MIAO VOWEL SIGN ENG;Mc;0;L;;;;;N;;;;;
+ 16F60;MIAO VOWEL SIGN OEY;Mc;0;L;;;;;N;;;;;
+ 16F61;MIAO VOWEL SIGN I;Mc;0;L;;;;;N;;;;;
+ 16F62;MIAO VOWEL SIGN IA;Mc;0;L;;;;;N;;;;;
+ 16F63;MIAO VOWEL SIGN IAN;Mc;0;L;;;;;N;;;;;
+ 16F64;MIAO VOWEL SIGN IANG;Mc;0;L;;;;;N;;;;;
+ 16F65;MIAO VOWEL SIGN IO;Mc;0;L;;;;;N;;;;;
+ 16F66;MIAO VOWEL SIGN IE;Mc;0;L;;;;;N;;;;;
+ 16F67;MIAO VOWEL SIGN II;Mc;0;L;;;;;N;;;;;
+ 16F68;MIAO VOWEL SIGN IU;Mc;0;L;;;;;N;;;;;
+ 16F69;MIAO VOWEL SIGN ING;Mc;0;L;;;;;N;;;;;
+ 16F6A;MIAO VOWEL SIGN U;Mc;0;L;;;;;N;;;;;
+ 16F6B;MIAO VOWEL SIGN UA;Mc;0;L;;;;;N;;;;;
+ 16F6C;MIAO VOWEL SIGN UAN;Mc;0;L;;;;;N;;;;;
+ 16F6D;MIAO VOWEL SIGN UANG;Mc;0;L;;;;;N;;;;;
+ 16F6E;MIAO VOWEL SIGN UU;Mc;0;L;;;;;N;;;;;
+ 16F6F;MIAO VOWEL SIGN UEI;Mc;0;L;;;;;N;;;;;
+ 16F70;MIAO VOWEL SIGN UNG;Mc;0;L;;;;;N;;;;;
+ 16F71;MIAO VOWEL SIGN Y;Mc;0;L;;;;;N;;;;;
+ 16F72;MIAO VOWEL SIGN YI;Mc;0;L;;;;;N;;;;;
+ 16F73;MIAO VOWEL SIGN AE;Mc;0;L;;;;;N;;;;;
+ 16F74;MIAO VOWEL SIGN AEE;Mc;0;L;;;;;N;;;;;
+ 16F75;MIAO VOWEL SIGN ERR;Mc;0;L;;;;;N;;;;;
+ 16F76;MIAO VOWEL SIGN ROUNDED ERR;Mc;0;L;;;;;N;;;;;
+ 16F77;MIAO VOWEL SIGN ER;Mc;0;L;;;;;N;;;;;
+ 16F78;MIAO VOWEL SIGN ROUNDED ER;Mc;0;L;;;;;N;;;;;
+ 16F79;MIAO VOWEL SIGN AI;Mc;0;L;;;;;N;;;;;
+ 16F7A;MIAO VOWEL SIGN EI;Mc;0;L;;;;;N;;;;;
+ 16F7B;MIAO VOWEL SIGN AU;Mc;0;L;;;;;N;;;;;
+ 16F7C;MIAO VOWEL SIGN OU;Mc;0;L;;;;;N;;;;;
+ 16F7D;MIAO VOWEL SIGN N;Mc;0;L;;;;;N;;;;;
+ 16F7E;MIAO VOWEL SIGN NG;Mc;0;L;;;;;N;;;;;
+ 16F7F;MIAO VOWEL SIGN UOG;Mc;0;L;;;;;N;;;;;
+ 16F80;MIAO VOWEL SIGN YUI;Mc;0;L;;;;;N;;;;;
+ 16F81;MIAO VOWEL SIGN OG;Mc;0;L;;;;;N;;;;;
+ 16F82;MIAO VOWEL SIGN OER;Mc;0;L;;;;;N;;;;;
+ 16F83;MIAO VOWEL SIGN VW;Mc;0;L;;;;;N;;;;;
+ 16F84;MIAO VOWEL SIGN IG;Mc;0;L;;;;;N;;;;;
+ 16F85;MIAO VOWEL SIGN EA;Mc;0;L;;;;;N;;;;;
+ 16F86;MIAO VOWEL SIGN IONG;Mc;0;L;;;;;N;;;;;
+ 16F87;MIAO VOWEL SIGN UI;Mc;0;L;;;;;N;;;;;
+ 16F8F;MIAO TONE RIGHT;Mn;0;NSM;;;;;N;;;;;
+ 16F90;MIAO TONE TOP RIGHT;Mn;0;NSM;;;;;N;;;;;
+ 16F91;MIAO TONE ABOVE;Mn;0;NSM;;;;;N;;;;;
+ 16F92;MIAO TONE BELOW;Mn;0;NSM;;;;;N;;;;;
+ 16F93;MIAO LETTER TONE-2;Lm;0;L;;;;;N;;;;;
+ 16F94;MIAO LETTER TONE-3;Lm;0;L;;;;;N;;;;;
+ 16F95;MIAO LETTER TONE-4;Lm;0;L;;;;;N;;;;;
+ 16F96;MIAO LETTER TONE-5;Lm;0;L;;;;;N;;;;;
+ 16F97;MIAO LETTER TONE-6;Lm;0;L;;;;;N;;;;;
+ 16F98;MIAO LETTER TONE-7;Lm;0;L;;;;;N;;;;;
+ 16F99;MIAO LETTER TONE-8;Lm;0;L;;;;;N;;;;;
+ 16F9A;MIAO LETTER REFORMED TONE-1;Lm;0;L;;;;;N;;;;;
+ 16F9B;MIAO LETTER REFORMED TONE-2;Lm;0;L;;;;;N;;;;;
+ 16F9C;MIAO LETTER REFORMED TONE-4;Lm;0;L;;;;;N;;;;;
+ 16F9D;MIAO LETTER REFORMED TONE-5;Lm;0;L;;;;;N;;;;;
+ 16F9E;MIAO LETTER REFORMED TONE-6;Lm;0;L;;;;;N;;;;;
+ 16F9F;MIAO LETTER REFORMED TONE-8;Lm;0;L;;;;;N;;;;;
+ 16FE0;TANGUT ITERATION MARK;Lm;0;L;;;;;N;;;;;
+ 16FE1;NUSHU ITERATION MARK;Lm;0;L;;;;;N;;;;;
+ 16FE2;OLD CHINESE HOOK MARK;Po;0;ON;;;;;N;;;;;
+ 16FE3;OLD CHINESE ITERATION MARK;Lm;0;L;;;;;N;;;;;
+ 17000;<Tangut Ideograph, First>;Lo;0;L;;;;;N;;;;;
+ 187F7;<Tangut Ideograph, Last>;Lo;0;L;;;;;N;;;;;
+ 18800;TANGUT COMPONENT-001;Lo;0;L;;;;;N;;;;;
+ 18801;TANGUT COMPONENT-002;Lo;0;L;;;;;N;;;;;
+ 18802;TANGUT COMPONENT-003;Lo;0;L;;;;;N;;;;;
+ 18803;TANGUT COMPONENT-004;Lo;0;L;;;;;N;;;;;
+ 18804;TANGUT COMPONENT-005;Lo;0;L;;;;;N;;;;;
+ 18805;TANGUT COMPONENT-006;Lo;0;L;;;;;N;;;;;
+ 18806;TANGUT COMPONENT-007;Lo;0;L;;;;;N;;;;;
+ 18807;TANGUT COMPONENT-008;Lo;0;L;;;;;N;;;;;
+ 18808;TANGUT COMPONENT-009;Lo;0;L;;;;;N;;;;;
+ 18809;TANGUT COMPONENT-010;Lo;0;L;;;;;N;;;;;
+ 1880A;TANGUT COMPONENT-011;Lo;0;L;;;;;N;;;;;
+ 1880B;TANGUT COMPONENT-012;Lo;0;L;;;;;N;;;;;
+ 1880C;TANGUT COMPONENT-013;Lo;0;L;;;;;N;;;;;
+ 1880D;TANGUT COMPONENT-014;Lo;0;L;;;;;N;;;;;
+ 1880E;TANGUT COMPONENT-015;Lo;0;L;;;;;N;;;;;
+ 1880F;TANGUT COMPONENT-016;Lo;0;L;;;;;N;;;;;
+ 18810;TANGUT COMPONENT-017;Lo;0;L;;;;;N;;;;;
+ 18811;TANGUT COMPONENT-018;Lo;0;L;;;;;N;;;;;
+ 18812;TANGUT COMPONENT-019;Lo;0;L;;;;;N;;;;;
+ 18813;TANGUT COMPONENT-020;Lo;0;L;;;;;N;;;;;
+ 18814;TANGUT COMPONENT-021;Lo;0;L;;;;;N;;;;;
+ 18815;TANGUT COMPONENT-022;Lo;0;L;;;;;N;;;;;
+ 18816;TANGUT COMPONENT-023;Lo;0;L;;;;;N;;;;;
+ 18817;TANGUT COMPONENT-024;Lo;0;L;;;;;N;;;;;
+ 18818;TANGUT COMPONENT-025;Lo;0;L;;;;;N;;;;;
+ 18819;TANGUT COMPONENT-026;Lo;0;L;;;;;N;;;;;
+ 1881A;TANGUT COMPONENT-027;Lo;0;L;;;;;N;;;;;
+ 1881B;TANGUT COMPONENT-028;Lo;0;L;;;;;N;;;;;
+ 1881C;TANGUT COMPONENT-029;Lo;0;L;;;;;N;;;;;
+ 1881D;TANGUT COMPONENT-030;Lo;0;L;;;;;N;;;;;
+ 1881E;TANGUT COMPONENT-031;Lo;0;L;;;;;N;;;;;
+ 1881F;TANGUT COMPONENT-032;Lo;0;L;;;;;N;;;;;
+ 18820;TANGUT COMPONENT-033;Lo;0;L;;;;;N;;;;;
+ 18821;TANGUT COMPONENT-034;Lo;0;L;;;;;N;;;;;
+ 18822;TANGUT COMPONENT-035;Lo;0;L;;;;;N;;;;;
+ 18823;TANGUT COMPONENT-036;Lo;0;L;;;;;N;;;;;
+ 18824;TANGUT COMPONENT-037;Lo;0;L;;;;;N;;;;;
+ 18825;TANGUT COMPONENT-038;Lo;0;L;;;;;N;;;;;
+ 18826;TANGUT COMPONENT-039;Lo;0;L;;;;;N;;;;;
+ 18827;TANGUT COMPONENT-040;Lo;0;L;;;;;N;;;;;
+ 18828;TANGUT COMPONENT-041;Lo;0;L;;;;;N;;;;;
+ 18829;TANGUT COMPONENT-042;Lo;0;L;;;;;N;;;;;
+ 1882A;TANGUT COMPONENT-043;Lo;0;L;;;;;N;;;;;
+ 1882B;TANGUT COMPONENT-044;Lo;0;L;;;;;N;;;;;
+ 1882C;TANGUT COMPONENT-045;Lo;0;L;;;;;N;;;;;
+ 1882D;TANGUT COMPONENT-046;Lo;0;L;;;;;N;;;;;
+ 1882E;TANGUT COMPONENT-047;Lo;0;L;;;;;N;;;;;
+ 1882F;TANGUT COMPONENT-048;Lo;0;L;;;;;N;;;;;
+ 18830;TANGUT COMPONENT-049;Lo;0;L;;;;;N;;;;;
+ 18831;TANGUT COMPONENT-050;Lo;0;L;;;;;N;;;;;
+ 18832;TANGUT COMPONENT-051;Lo;0;L;;;;;N;;;;;
+ 18833;TANGUT COMPONENT-052;Lo;0;L;;;;;N;;;;;
+ 18834;TANGUT COMPONENT-053;Lo;0;L;;;;;N;;;;;
+ 18835;TANGUT COMPONENT-054;Lo;0;L;;;;;N;;;;;
+ 18836;TANGUT COMPONENT-055;Lo;0;L;;;;;N;;;;;
+ 18837;TANGUT COMPONENT-056;Lo;0;L;;;;;N;;;;;
+ 18838;TANGUT COMPONENT-057;Lo;0;L;;;;;N;;;;;
+ 18839;TANGUT COMPONENT-058;Lo;0;L;;;;;N;;;;;
+ 1883A;TANGUT COMPONENT-059;Lo;0;L;;;;;N;;;;;
+ 1883B;TANGUT COMPONENT-060;Lo;0;L;;;;;N;;;;;
+ 1883C;TANGUT COMPONENT-061;Lo;0;L;;;;;N;;;;;
+ 1883D;TANGUT COMPONENT-062;Lo;0;L;;;;;N;;;;;
+ 1883E;TANGUT COMPONENT-063;Lo;0;L;;;;;N;;;;;
+ 1883F;TANGUT COMPONENT-064;Lo;0;L;;;;;N;;;;;
+ 18840;TANGUT COMPONENT-065;Lo;0;L;;;;;N;;;;;
+ 18841;TANGUT COMPONENT-066;Lo;0;L;;;;;N;;;;;
+ 18842;TANGUT COMPONENT-067;Lo;0;L;;;;;N;;;;;
+ 18843;TANGUT COMPONENT-068;Lo;0;L;;;;;N;;;;;
+ 18844;TANGUT COMPONENT-069;Lo;0;L;;;;;N;;;;;
+ 18845;TANGUT COMPONENT-070;Lo;0;L;;;;;N;;;;;
+ 18846;TANGUT COMPONENT-071;Lo;0;L;;;;;N;;;;;
+ 18847;TANGUT COMPONENT-072;Lo;0;L;;;;;N;;;;;
+ 18848;TANGUT COMPONENT-073;Lo;0;L;;;;;N;;;;;
+ 18849;TANGUT COMPONENT-074;Lo;0;L;;;;;N;;;;;
+ 1884A;TANGUT COMPONENT-075;Lo;0;L;;;;;N;;;;;
+ 1884B;TANGUT COMPONENT-076;Lo;0;L;;;;;N;;;;;
+ 1884C;TANGUT COMPONENT-077;Lo;0;L;;;;;N;;;;;
+ 1884D;TANGUT COMPONENT-078;Lo;0;L;;;;;N;;;;;
+ 1884E;TANGUT COMPONENT-079;Lo;0;L;;;;;N;;;;;
+ 1884F;TANGUT COMPONENT-080;Lo;0;L;;;;;N;;;;;
+ 18850;TANGUT COMPONENT-081;Lo;0;L;;;;;N;;;;;
+ 18851;TANGUT COMPONENT-082;Lo;0;L;;;;;N;;;;;
+ 18852;TANGUT COMPONENT-083;Lo;0;L;;;;;N;;;;;
+ 18853;TANGUT COMPONENT-084;Lo;0;L;;;;;N;;;;;
+ 18854;TANGUT COMPONENT-085;Lo;0;L;;;;;N;;;;;
+ 18855;TANGUT COMPONENT-086;Lo;0;L;;;;;N;;;;;
+ 18856;TANGUT COMPONENT-087;Lo;0;L;;;;;N;;;;;
+ 18857;TANGUT COMPONENT-088;Lo;0;L;;;;;N;;;;;
+ 18858;TANGUT COMPONENT-089;Lo;0;L;;;;;N;;;;;
+ 18859;TANGUT COMPONENT-090;Lo;0;L;;;;;N;;;;;
+ 1885A;TANGUT COMPONENT-091;Lo;0;L;;;;;N;;;;;
+ 1885B;TANGUT COMPONENT-092;Lo;0;L;;;;;N;;;;;
+ 1885C;TANGUT COMPONENT-093;Lo;0;L;;;;;N;;;;;
+ 1885D;TANGUT COMPONENT-094;Lo;0;L;;;;;N;;;;;
+ 1885E;TANGUT COMPONENT-095;Lo;0;L;;;;;N;;;;;
+ 1885F;TANGUT COMPONENT-096;Lo;0;L;;;;;N;;;;;
+ 18860;TANGUT COMPONENT-097;Lo;0;L;;;;;N;;;;;
+ 18861;TANGUT COMPONENT-098;Lo;0;L;;;;;N;;;;;
+ 18862;TANGUT COMPONENT-099;Lo;0;L;;;;;N;;;;;
+ 18863;TANGUT COMPONENT-100;Lo;0;L;;;;;N;;;;;
+ 18864;TANGUT COMPONENT-101;Lo;0;L;;;;;N;;;;;
+ 18865;TANGUT COMPONENT-102;Lo;0;L;;;;;N;;;;;
+ 18866;TANGUT COMPONENT-103;Lo;0;L;;;;;N;;;;;
+ 18867;TANGUT COMPONENT-104;Lo;0;L;;;;;N;;;;;
+ 18868;TANGUT COMPONENT-105;Lo;0;L;;;;;N;;;;;
+ 18869;TANGUT COMPONENT-106;Lo;0;L;;;;;N;;;;;
+ 1886A;TANGUT COMPONENT-107;Lo;0;L;;;;;N;;;;;
+ 1886B;TANGUT COMPONENT-108;Lo;0;L;;;;;N;;;;;
+ 1886C;TANGUT COMPONENT-109;Lo;0;L;;;;;N;;;;;
+ 1886D;TANGUT COMPONENT-110;Lo;0;L;;;;;N;;;;;
+ 1886E;TANGUT COMPONENT-111;Lo;0;L;;;;;N;;;;;
+ 1886F;TANGUT COMPONENT-112;Lo;0;L;;;;;N;;;;;
+ 18870;TANGUT COMPONENT-113;Lo;0;L;;;;;N;;;;;
+ 18871;TANGUT COMPONENT-114;Lo;0;L;;;;;N;;;;;
+ 18872;TANGUT COMPONENT-115;Lo;0;L;;;;;N;;;;;
+ 18873;TANGUT COMPONENT-116;Lo;0;L;;;;;N;;;;;
+ 18874;TANGUT COMPONENT-117;Lo;0;L;;;;;N;;;;;
+ 18875;TANGUT COMPONENT-118;Lo;0;L;;;;;N;;;;;
+ 18876;TANGUT COMPONENT-119;Lo;0;L;;;;;N;;;;;
+ 18877;TANGUT COMPONENT-120;Lo;0;L;;;;;N;;;;;
+ 18878;TANGUT COMPONENT-121;Lo;0;L;;;;;N;;;;;
+ 18879;TANGUT COMPONENT-122;Lo;0;L;;;;;N;;;;;
+ 1887A;TANGUT COMPONENT-123;Lo;0;L;;;;;N;;;;;
+ 1887B;TANGUT COMPONENT-124;Lo;0;L;;;;;N;;;;;
+ 1887C;TANGUT COMPONENT-125;Lo;0;L;;;;;N;;;;;
+ 1887D;TANGUT COMPONENT-126;Lo;0;L;;;;;N;;;;;
+ 1887E;TANGUT COMPONENT-127;Lo;0;L;;;;;N;;;;;
+ 1887F;TANGUT COMPONENT-128;Lo;0;L;;;;;N;;;;;
+ 18880;TANGUT COMPONENT-129;Lo;0;L;;;;;N;;;;;
+ 18881;TANGUT COMPONENT-130;Lo;0;L;;;;;N;;;;;
+ 18882;TANGUT COMPONENT-131;Lo;0;L;;;;;N;;;;;
+ 18883;TANGUT COMPONENT-132;Lo;0;L;;;;;N;;;;;
+ 18884;TANGUT COMPONENT-133;Lo;0;L;;;;;N;;;;;
+ 18885;TANGUT COMPONENT-134;Lo;0;L;;;;;N;;;;;
+ 18886;TANGUT COMPONENT-135;Lo;0;L;;;;;N;;;;;
+ 18887;TANGUT COMPONENT-136;Lo;0;L;;;;;N;;;;;
+ 18888;TANGUT COMPONENT-137;Lo;0;L;;;;;N;;;;;
+ 18889;TANGUT COMPONENT-138;Lo;0;L;;;;;N;;;;;
+ 1888A;TANGUT COMPONENT-139;Lo;0;L;;;;;N;;;;;
+ 1888B;TANGUT COMPONENT-140;Lo;0;L;;;;;N;;;;;
+ 1888C;TANGUT COMPONENT-141;Lo;0;L;;;;;N;;;;;
+ 1888D;TANGUT COMPONENT-142;Lo;0;L;;;;;N;;;;;
+ 1888E;TANGUT COMPONENT-143;Lo;0;L;;;;;N;;;;;
+ 1888F;TANGUT COMPONENT-144;Lo;0;L;;;;;N;;;;;
+ 18890;TANGUT COMPONENT-145;Lo;0;L;;;;;N;;;;;
+ 18891;TANGUT COMPONENT-146;Lo;0;L;;;;;N;;;;;
+ 18892;TANGUT COMPONENT-147;Lo;0;L;;;;;N;;;;;
+ 18893;TANGUT COMPONENT-148;Lo;0;L;;;;;N;;;;;
+ 18894;TANGUT COMPONENT-149;Lo;0;L;;;;;N;;;;;
+ 18895;TANGUT COMPONENT-150;Lo;0;L;;;;;N;;;;;
+ 18896;TANGUT COMPONENT-151;Lo;0;L;;;;;N;;;;;
+ 18897;TANGUT COMPONENT-152;Lo;0;L;;;;;N;;;;;
+ 18898;TANGUT COMPONENT-153;Lo;0;L;;;;;N;;;;;
+ 18899;TANGUT COMPONENT-154;Lo;0;L;;;;;N;;;;;
+ 1889A;TANGUT COMPONENT-155;Lo;0;L;;;;;N;;;;;
+ 1889B;TANGUT COMPONENT-156;Lo;0;L;;;;;N;;;;;
+ 1889C;TANGUT COMPONENT-157;Lo;0;L;;;;;N;;;;;
+ 1889D;TANGUT COMPONENT-158;Lo;0;L;;;;;N;;;;;
+ 1889E;TANGUT COMPONENT-159;Lo;0;L;;;;;N;;;;;
+ 1889F;TANGUT COMPONENT-160;Lo;0;L;;;;;N;;;;;
+ 188A0;TANGUT COMPONENT-161;Lo;0;L;;;;;N;;;;;
+ 188A1;TANGUT COMPONENT-162;Lo;0;L;;;;;N;;;;;
+ 188A2;TANGUT COMPONENT-163;Lo;0;L;;;;;N;;;;;
+ 188A3;TANGUT COMPONENT-164;Lo;0;L;;;;;N;;;;;
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+ 1B017;HENTAIGANA LETTER KA-1;Lo;0;L;;;;;N;;;;;
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+ 1B022;HENTAIGANA LETTER KA-KE;Lo;0;L;;;;;N;;;;;
+ 1B023;HENTAIGANA LETTER KI-1;Lo;0;L;;;;;N;;;;;
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+ 1B025;HENTAIGANA LETTER KI-3;Lo;0;L;;;;;N;;;;;
+ 1B026;HENTAIGANA LETTER KI-4;Lo;0;L;;;;;N;;;;;
+ 1B027;HENTAIGANA LETTER KI-5;Lo;0;L;;;;;N;;;;;
+ 1B028;HENTAIGANA LETTER KI-6;Lo;0;L;;;;;N;;;;;
+ 1B029;HENTAIGANA LETTER KI-7;Lo;0;L;;;;;N;;;;;
+ 1B02A;HENTAIGANA LETTER KI-8;Lo;0;L;;;;;N;;;;;
+ 1B02B;HENTAIGANA LETTER KU-1;Lo;0;L;;;;;N;;;;;
+ 1B02C;HENTAIGANA LETTER KU-2;Lo;0;L;;;;;N;;;;;
+ 1B02D;HENTAIGANA LETTER KU-3;Lo;0;L;;;;;N;;;;;
+ 1B02E;HENTAIGANA LETTER KU-4;Lo;0;L;;;;;N;;;;;
+ 1B02F;HENTAIGANA LETTER KU-5;Lo;0;L;;;;;N;;;;;
+ 1B030;HENTAIGANA LETTER KU-6;Lo;0;L;;;;;N;;;;;
+ 1B031;HENTAIGANA LETTER KU-7;Lo;0;L;;;;;N;;;;;
+ 1B032;HENTAIGANA LETTER KE-1;Lo;0;L;;;;;N;;;;;
+ 1B033;HENTAIGANA LETTER KE-2;Lo;0;L;;;;;N;;;;;
+ 1B034;HENTAIGANA LETTER KE-3;Lo;0;L;;;;;N;;;;;
+ 1B035;HENTAIGANA LETTER KE-4;Lo;0;L;;;;;N;;;;;
+ 1B036;HENTAIGANA LETTER KE-5;Lo;0;L;;;;;N;;;;;
+ 1B037;HENTAIGANA LETTER KE-6;Lo;0;L;;;;;N;;;;;
+ 1B038;HENTAIGANA LETTER KO-1;Lo;0;L;;;;;N;;;;;
+ 1B039;HENTAIGANA LETTER KO-2;Lo;0;L;;;;;N;;;;;
+ 1B03A;HENTAIGANA LETTER KO-3;Lo;0;L;;;;;N;;;;;
+ 1B03B;HENTAIGANA LETTER KO-KI;Lo;0;L;;;;;N;;;;;
+ 1B03C;HENTAIGANA LETTER SA-1;Lo;0;L;;;;;N;;;;;
+ 1B03D;HENTAIGANA LETTER SA-2;Lo;0;L;;;;;N;;;;;
+ 1B03E;HENTAIGANA LETTER SA-3;Lo;0;L;;;;;N;;;;;
+ 1B03F;HENTAIGANA LETTER SA-4;Lo;0;L;;;;;N;;;;;
+ 1B040;HENTAIGANA LETTER SA-5;Lo;0;L;;;;;N;;;;;
+ 1B041;HENTAIGANA LETTER SA-6;Lo;0;L;;;;;N;;;;;
+ 1B042;HENTAIGANA LETTER SA-7;Lo;0;L;;;;;N;;;;;
+ 1B043;HENTAIGANA LETTER SA-8;Lo;0;L;;;;;N;;;;;
+ 1B044;HENTAIGANA LETTER SI-1;Lo;0;L;;;;;N;;;;;
+ 1B045;HENTAIGANA LETTER SI-2;Lo;0;L;;;;;N;;;;;
+ 1B046;HENTAIGANA LETTER SI-3;Lo;0;L;;;;;N;;;;;
+ 1B047;HENTAIGANA LETTER SI-4;Lo;0;L;;;;;N;;;;;
+ 1B048;HENTAIGANA LETTER SI-5;Lo;0;L;;;;;N;;;;;
+ 1B049;HENTAIGANA LETTER SI-6;Lo;0;L;;;;;N;;;;;
+ 1B04A;HENTAIGANA LETTER SU-1;Lo;0;L;;;;;N;;;;;
+ 1B04B;HENTAIGANA LETTER SU-2;Lo;0;L;;;;;N;;;;;
+ 1B04C;HENTAIGANA LETTER SU-3;Lo;0;L;;;;;N;;;;;
+ 1B04D;HENTAIGANA LETTER SU-4;Lo;0;L;;;;;N;;;;;
+ 1B04E;HENTAIGANA LETTER SU-5;Lo;0;L;;;;;N;;;;;
+ 1B04F;HENTAIGANA LETTER SU-6;Lo;0;L;;;;;N;;;;;
+ 1B050;HENTAIGANA LETTER SU-7;Lo;0;L;;;;;N;;;;;
+ 1B051;HENTAIGANA LETTER SU-8;Lo;0;L;;;;;N;;;;;
+ 1B052;HENTAIGANA LETTER SE-1;Lo;0;L;;;;;N;;;;;
+ 1B053;HENTAIGANA LETTER SE-2;Lo;0;L;;;;;N;;;;;
+ 1B054;HENTAIGANA LETTER SE-3;Lo;0;L;;;;;N;;;;;
+ 1B055;HENTAIGANA LETTER SE-4;Lo;0;L;;;;;N;;;;;
+ 1B056;HENTAIGANA LETTER SE-5;Lo;0;L;;;;;N;;;;;
+ 1B057;HENTAIGANA LETTER SO-1;Lo;0;L;;;;;N;;;;;
+ 1B058;HENTAIGANA LETTER SO-2;Lo;0;L;;;;;N;;;;;
+ 1B059;HENTAIGANA LETTER SO-3;Lo;0;L;;;;;N;;;;;
+ 1B05A;HENTAIGANA LETTER SO-4;Lo;0;L;;;;;N;;;;;
+ 1B05B;HENTAIGANA LETTER SO-5;Lo;0;L;;;;;N;;;;;
+ 1B05C;HENTAIGANA LETTER SO-6;Lo;0;L;;;;;N;;;;;
+ 1B05D;HENTAIGANA LETTER SO-7;Lo;0;L;;;;;N;;;;;
+ 1B05E;HENTAIGANA LETTER TA-1;Lo;0;L;;;;;N;;;;;
+ 1B05F;HENTAIGANA LETTER TA-2;Lo;0;L;;;;;N;;;;;
+ 1B060;HENTAIGANA LETTER TA-3;Lo;0;L;;;;;N;;;;;
+ 1B061;HENTAIGANA LETTER TA-4;Lo;0;L;;;;;N;;;;;
+ 1B062;HENTAIGANA LETTER TI-1;Lo;0;L;;;;;N;;;;;
+ 1B063;HENTAIGANA LETTER TI-2;Lo;0;L;;;;;N;;;;;
+ 1B064;HENTAIGANA LETTER TI-3;Lo;0;L;;;;;N;;;;;
+ 1B065;HENTAIGANA LETTER TI-4;Lo;0;L;;;;;N;;;;;
+ 1B066;HENTAIGANA LETTER TI-5;Lo;0;L;;;;;N;;;;;
+ 1B067;HENTAIGANA LETTER TI-6;Lo;0;L;;;;;N;;;;;
+ 1B068;HENTAIGANA LETTER TI-7;Lo;0;L;;;;;N;;;;;
+ 1B069;HENTAIGANA LETTER TU-1;Lo;0;L;;;;;N;;;;;
+ 1B06A;HENTAIGANA LETTER TU-2;Lo;0;L;;;;;N;;;;;
+ 1B06B;HENTAIGANA LETTER TU-3;Lo;0;L;;;;;N;;;;;
+ 1B06C;HENTAIGANA LETTER TU-4;Lo;0;L;;;;;N;;;;;
+ 1B06D;HENTAIGANA LETTER TU-TO;Lo;0;L;;;;;N;;;;;
+ 1B06E;HENTAIGANA LETTER TE-1;Lo;0;L;;;;;N;;;;;
+ 1B06F;HENTAIGANA LETTER TE-2;Lo;0;L;;;;;N;;;;;
+ 1B070;HENTAIGANA LETTER TE-3;Lo;0;L;;;;;N;;;;;
+ 1B071;HENTAIGANA LETTER TE-4;Lo;0;L;;;;;N;;;;;
+ 1B072;HENTAIGANA LETTER TE-5;Lo;0;L;;;;;N;;;;;
+ 1B073;HENTAIGANA LETTER TE-6;Lo;0;L;;;;;N;;;;;
+ 1B074;HENTAIGANA LETTER TE-7;Lo;0;L;;;;;N;;;;;
+ 1B075;HENTAIGANA LETTER TE-8;Lo;0;L;;;;;N;;;;;
+ 1B076;HENTAIGANA LETTER TE-9;Lo;0;L;;;;;N;;;;;
+ 1B077;HENTAIGANA LETTER TO-1;Lo;0;L;;;;;N;;;;;
+ 1B078;HENTAIGANA LETTER TO-2;Lo;0;L;;;;;N;;;;;
+ 1B079;HENTAIGANA LETTER TO-3;Lo;0;L;;;;;N;;;;;
+ 1B07A;HENTAIGANA LETTER TO-4;Lo;0;L;;;;;N;;;;;
+ 1B07B;HENTAIGANA LETTER TO-5;Lo;0;L;;;;;N;;;;;
+ 1B07C;HENTAIGANA LETTER TO-6;Lo;0;L;;;;;N;;;;;
+ 1B07D;HENTAIGANA LETTER TO-RA;Lo;0;L;;;;;N;;;;;
+ 1B07E;HENTAIGANA LETTER NA-1;Lo;0;L;;;;;N;;;;;
+ 1B07F;HENTAIGANA LETTER NA-2;Lo;0;L;;;;;N;;;;;
+ 1B080;HENTAIGANA LETTER NA-3;Lo;0;L;;;;;N;;;;;
+ 1B081;HENTAIGANA LETTER NA-4;Lo;0;L;;;;;N;;;;;
+ 1B082;HENTAIGANA LETTER NA-5;Lo;0;L;;;;;N;;;;;
+ 1B083;HENTAIGANA LETTER NA-6;Lo;0;L;;;;;N;;;;;
+ 1B084;HENTAIGANA LETTER NA-7;Lo;0;L;;;;;N;;;;;
+ 1B085;HENTAIGANA LETTER NA-8;Lo;0;L;;;;;N;;;;;
+ 1B086;HENTAIGANA LETTER NA-9;Lo;0;L;;;;;N;;;;;
+ 1B087;HENTAIGANA LETTER NI-1;Lo;0;L;;;;;N;;;;;
+ 1B088;HENTAIGANA LETTER NI-2;Lo;0;L;;;;;N;;;;;
+ 1B089;HENTAIGANA LETTER NI-3;Lo;0;L;;;;;N;;;;;
+ 1B08A;HENTAIGANA LETTER NI-4;Lo;0;L;;;;;N;;;;;
+ 1B08B;HENTAIGANA LETTER NI-5;Lo;0;L;;;;;N;;;;;
+ 1B08C;HENTAIGANA LETTER NI-6;Lo;0;L;;;;;N;;;;;
+ 1B08D;HENTAIGANA LETTER NI-7;Lo;0;L;;;;;N;;;;;
+ 1B08E;HENTAIGANA LETTER NI-TE;Lo;0;L;;;;;N;;;;;
+ 1B08F;HENTAIGANA LETTER NU-1;Lo;0;L;;;;;N;;;;;
+ 1B090;HENTAIGANA LETTER NU-2;Lo;0;L;;;;;N;;;;;
+ 1B091;HENTAIGANA LETTER NU-3;Lo;0;L;;;;;N;;;;;
+ 1B092;HENTAIGANA LETTER NE-1;Lo;0;L;;;;;N;;;;;
+ 1B093;HENTAIGANA LETTER NE-2;Lo;0;L;;;;;N;;;;;
+ 1B094;HENTAIGANA LETTER NE-3;Lo;0;L;;;;;N;;;;;
+ 1B095;HENTAIGANA LETTER NE-4;Lo;0;L;;;;;N;;;;;
+ 1B096;HENTAIGANA LETTER NE-5;Lo;0;L;;;;;N;;;;;
+ 1B097;HENTAIGANA LETTER NE-6;Lo;0;L;;;;;N;;;;;
+ 1B098;HENTAIGANA LETTER NE-KO;Lo;0;L;;;;;N;;;;;
+ 1B099;HENTAIGANA LETTER NO-1;Lo;0;L;;;;;N;;;;;
+ 1B09A;HENTAIGANA LETTER NO-2;Lo;0;L;;;;;N;;;;;
+ 1B09B;HENTAIGANA LETTER NO-3;Lo;0;L;;;;;N;;;;;
+ 1B09C;HENTAIGANA LETTER NO-4;Lo;0;L;;;;;N;;;;;
+ 1B09D;HENTAIGANA LETTER NO-5;Lo;0;L;;;;;N;;;;;
+ 1B09E;HENTAIGANA LETTER HA-1;Lo;0;L;;;;;N;;;;;
+ 1B09F;HENTAIGANA LETTER HA-2;Lo;0;L;;;;;N;;;;;
+ 1B0A0;HENTAIGANA LETTER HA-3;Lo;0;L;;;;;N;;;;;
+ 1B0A1;HENTAIGANA LETTER HA-4;Lo;0;L;;;;;N;;;;;
+ 1B0A2;HENTAIGANA LETTER HA-5;Lo;0;L;;;;;N;;;;;
+ 1B0A3;HENTAIGANA LETTER HA-6;Lo;0;L;;;;;N;;;;;
+ 1B0A4;HENTAIGANA LETTER HA-7;Lo;0;L;;;;;N;;;;;
+ 1B0A5;HENTAIGANA LETTER HA-8;Lo;0;L;;;;;N;;;;;
+ 1B0A6;HENTAIGANA LETTER HA-9;Lo;0;L;;;;;N;;;;;
+ 1B0A7;HENTAIGANA LETTER HA-10;Lo;0;L;;;;;N;;;;;
+ 1B0A8;HENTAIGANA LETTER HA-11;Lo;0;L;;;;;N;;;;;
+ 1B0A9;HENTAIGANA LETTER HI-1;Lo;0;L;;;;;N;;;;;
+ 1B0AA;HENTAIGANA LETTER HI-2;Lo;0;L;;;;;N;;;;;
+ 1B0AB;HENTAIGANA LETTER HI-3;Lo;0;L;;;;;N;;;;;
+ 1B0AC;HENTAIGANA LETTER HI-4;Lo;0;L;;;;;N;;;;;
+ 1B0AD;HENTAIGANA LETTER HI-5;Lo;0;L;;;;;N;;;;;
+ 1B0AE;HENTAIGANA LETTER HI-6;Lo;0;L;;;;;N;;;;;
+ 1B0AF;HENTAIGANA LETTER HI-7;Lo;0;L;;;;;N;;;;;
+ 1B0B0;HENTAIGANA LETTER HU-1;Lo;0;L;;;;;N;;;;;
+ 1B0B1;HENTAIGANA LETTER HU-2;Lo;0;L;;;;;N;;;;;
+ 1B0B2;HENTAIGANA LETTER HU-3;Lo;0;L;;;;;N;;;;;
+ 1B0B3;HENTAIGANA LETTER HE-1;Lo;0;L;;;;;N;;;;;
+ 1B0B4;HENTAIGANA LETTER HE-2;Lo;0;L;;;;;N;;;;;
+ 1B0B5;HENTAIGANA LETTER HE-3;Lo;0;L;;;;;N;;;;;
+ 1B0B6;HENTAIGANA LETTER HE-4;Lo;0;L;;;;;N;;;;;
+ 1B0B7;HENTAIGANA LETTER HE-5;Lo;0;L;;;;;N;;;;;
+ 1B0B8;HENTAIGANA LETTER HE-6;Lo;0;L;;;;;N;;;;;
+ 1B0B9;HENTAIGANA LETTER HE-7;Lo;0;L;;;;;N;;;;;
+ 1B0BA;HENTAIGANA LETTER HO-1;Lo;0;L;;;;;N;;;;;
+ 1B0BB;HENTAIGANA LETTER HO-2;Lo;0;L;;;;;N;;;;;
+ 1B0BC;HENTAIGANA LETTER HO-3;Lo;0;L;;;;;N;;;;;
+ 1B0BD;HENTAIGANA LETTER HO-4;Lo;0;L;;;;;N;;;;;
+ 1B0BE;HENTAIGANA LETTER HO-5;Lo;0;L;;;;;N;;;;;
+ 1B0BF;HENTAIGANA LETTER HO-6;Lo;0;L;;;;;N;;;;;
+ 1B0C0;HENTAIGANA LETTER HO-7;Lo;0;L;;;;;N;;;;;
+ 1B0C1;HENTAIGANA LETTER HO-8;Lo;0;L;;;;;N;;;;;
+ 1B0C2;HENTAIGANA LETTER MA-1;Lo;0;L;;;;;N;;;;;
+ 1B0C3;HENTAIGANA LETTER MA-2;Lo;0;L;;;;;N;;;;;
+ 1B0C4;HENTAIGANA LETTER MA-3;Lo;0;L;;;;;N;;;;;
+ 1B0C5;HENTAIGANA LETTER MA-4;Lo;0;L;;;;;N;;;;;
+ 1B0C6;HENTAIGANA LETTER MA-5;Lo;0;L;;;;;N;;;;;
+ 1B0C7;HENTAIGANA LETTER MA-6;Lo;0;L;;;;;N;;;;;
+ 1B0C8;HENTAIGANA LETTER MA-7;Lo;0;L;;;;;N;;;;;
+ 1B0C9;HENTAIGANA LETTER MI-1;Lo;0;L;;;;;N;;;;;
+ 1B0CA;HENTAIGANA LETTER MI-2;Lo;0;L;;;;;N;;;;;
+ 1B0CB;HENTAIGANA LETTER MI-3;Lo;0;L;;;;;N;;;;;
+ 1B0CC;HENTAIGANA LETTER MI-4;Lo;0;L;;;;;N;;;;;
+ 1B0CD;HENTAIGANA LETTER MI-5;Lo;0;L;;;;;N;;;;;
+ 1B0CE;HENTAIGANA LETTER MI-6;Lo;0;L;;;;;N;;;;;
+ 1B0CF;HENTAIGANA LETTER MI-7;Lo;0;L;;;;;N;;;;;
+ 1B0D0;HENTAIGANA LETTER MU-1;Lo;0;L;;;;;N;;;;;
+ 1B0D1;HENTAIGANA LETTER MU-2;Lo;0;L;;;;;N;;;;;
+ 1B0D2;HENTAIGANA LETTER MU-3;Lo;0;L;;;;;N;;;;;
+ 1B0D3;HENTAIGANA LETTER MU-4;Lo;0;L;;;;;N;;;;;
+ 1B0D4;HENTAIGANA LETTER ME-1;Lo;0;L;;;;;N;;;;;
+ 1B0D5;HENTAIGANA LETTER ME-2;Lo;0;L;;;;;N;;;;;
+ 1B0D6;HENTAIGANA LETTER ME-MA;Lo;0;L;;;;;N;;;;;
+ 1B0D7;HENTAIGANA LETTER MO-1;Lo;0;L;;;;;N;;;;;
+ 1B0D8;HENTAIGANA LETTER MO-2;Lo;0;L;;;;;N;;;;;
+ 1B0D9;HENTAIGANA LETTER MO-3;Lo;0;L;;;;;N;;;;;
+ 1B0DA;HENTAIGANA LETTER MO-4;Lo;0;L;;;;;N;;;;;
+ 1B0DB;HENTAIGANA LETTER MO-5;Lo;0;L;;;;;N;;;;;
+ 1B0DC;HENTAIGANA LETTER MO-6;Lo;0;L;;;;;N;;;;;
+ 1B0DD;HENTAIGANA LETTER YA-1;Lo;0;L;;;;;N;;;;;
+ 1B0DE;HENTAIGANA LETTER YA-2;Lo;0;L;;;;;N;;;;;
+ 1B0DF;HENTAIGANA LETTER YA-3;Lo;0;L;;;;;N;;;;;
+ 1B0E0;HENTAIGANA LETTER YA-4;Lo;0;L;;;;;N;;;;;
+ 1B0E1;HENTAIGANA LETTER YA-5;Lo;0;L;;;;;N;;;;;
+ 1B0E2;HENTAIGANA LETTER YA-YO;Lo;0;L;;;;;N;;;;;
+ 1B0E3;HENTAIGANA LETTER YU-1;Lo;0;L;;;;;N;;;;;
+ 1B0E4;HENTAIGANA LETTER YU-2;Lo;0;L;;;;;N;;;;;
+ 1B0E5;HENTAIGANA LETTER YU-3;Lo;0;L;;;;;N;;;;;
+ 1B0E6;HENTAIGANA LETTER YU-4;Lo;0;L;;;;;N;;;;;
+ 1B0E7;HENTAIGANA LETTER YO-1;Lo;0;L;;;;;N;;;;;
+ 1B0E8;HENTAIGANA LETTER YO-2;Lo;0;L;;;;;N;;;;;
+ 1B0E9;HENTAIGANA LETTER YO-3;Lo;0;L;;;;;N;;;;;
+ 1B0EA;HENTAIGANA LETTER YO-4;Lo;0;L;;;;;N;;;;;
+ 1B0EB;HENTAIGANA LETTER YO-5;Lo;0;L;;;;;N;;;;;
+ 1B0EC;HENTAIGANA LETTER YO-6;Lo;0;L;;;;;N;;;;;
+ 1B0ED;HENTAIGANA LETTER RA-1;Lo;0;L;;;;;N;;;;;
+ 1B0EE;HENTAIGANA LETTER RA-2;Lo;0;L;;;;;N;;;;;
+ 1B0EF;HENTAIGANA LETTER RA-3;Lo;0;L;;;;;N;;;;;
+ 1B0F0;HENTAIGANA LETTER RA-4;Lo;0;L;;;;;N;;;;;
+ 1B0F1;HENTAIGANA LETTER RI-1;Lo;0;L;;;;;N;;;;;
+ 1B0F2;HENTAIGANA LETTER RI-2;Lo;0;L;;;;;N;;;;;
+ 1B0F3;HENTAIGANA LETTER RI-3;Lo;0;L;;;;;N;;;;;
+ 1B0F4;HENTAIGANA LETTER RI-4;Lo;0;L;;;;;N;;;;;
+ 1B0F5;HENTAIGANA LETTER RI-5;Lo;0;L;;;;;N;;;;;
+ 1B0F6;HENTAIGANA LETTER RI-6;Lo;0;L;;;;;N;;;;;
+ 1B0F7;HENTAIGANA LETTER RI-7;Lo;0;L;;;;;N;;;;;
+ 1B0F8;HENTAIGANA LETTER RU-1;Lo;0;L;;;;;N;;;;;
+ 1B0F9;HENTAIGANA LETTER RU-2;Lo;0;L;;;;;N;;;;;
+ 1B0FA;HENTAIGANA LETTER RU-3;Lo;0;L;;;;;N;;;;;
+ 1B0FB;HENTAIGANA LETTER RU-4;Lo;0;L;;;;;N;;;;;
+ 1B0FC;HENTAIGANA LETTER RU-5;Lo;0;L;;;;;N;;;;;
+ 1B0FD;HENTAIGANA LETTER RU-6;Lo;0;L;;;;;N;;;;;
+ 1B0FE;HENTAIGANA LETTER RE-1;Lo;0;L;;;;;N;;;;;
+ 1B0FF;HENTAIGANA LETTER RE-2;Lo;0;L;;;;;N;;;;;
+ 1B100;HENTAIGANA LETTER RE-3;Lo;0;L;;;;;N;;;;;
+ 1B101;HENTAIGANA LETTER RE-4;Lo;0;L;;;;;N;;;;;
+ 1B102;HENTAIGANA LETTER RO-1;Lo;0;L;;;;;N;;;;;
+ 1B103;HENTAIGANA LETTER RO-2;Lo;0;L;;;;;N;;;;;
+ 1B104;HENTAIGANA LETTER RO-3;Lo;0;L;;;;;N;;;;;
+ 1B105;HENTAIGANA LETTER RO-4;Lo;0;L;;;;;N;;;;;
+ 1B106;HENTAIGANA LETTER RO-5;Lo;0;L;;;;;N;;;;;
+ 1B107;HENTAIGANA LETTER RO-6;Lo;0;L;;;;;N;;;;;
+ 1B108;HENTAIGANA LETTER WA-1;Lo;0;L;;;;;N;;;;;
+ 1B109;HENTAIGANA LETTER WA-2;Lo;0;L;;;;;N;;;;;
+ 1B10A;HENTAIGANA LETTER WA-3;Lo;0;L;;;;;N;;;;;
+ 1B10B;HENTAIGANA LETTER WA-4;Lo;0;L;;;;;N;;;;;
+ 1B10C;HENTAIGANA LETTER WA-5;Lo;0;L;;;;;N;;;;;
+ 1B10D;HENTAIGANA LETTER WI-1;Lo;0;L;;;;;N;;;;;
+ 1B10E;HENTAIGANA LETTER WI-2;Lo;0;L;;;;;N;;;;;
+ 1B10F;HENTAIGANA LETTER WI-3;Lo;0;L;;;;;N;;;;;
+ 1B110;HENTAIGANA LETTER WI-4;Lo;0;L;;;;;N;;;;;
+ 1B111;HENTAIGANA LETTER WI-5;Lo;0;L;;;;;N;;;;;
+ 1B112;HENTAIGANA LETTER WE-1;Lo;0;L;;;;;N;;;;;
+ 1B113;HENTAIGANA LETTER WE-2;Lo;0;L;;;;;N;;;;;
+ 1B114;HENTAIGANA LETTER WE-3;Lo;0;L;;;;;N;;;;;
+ 1B115;HENTAIGANA LETTER WE-4;Lo;0;L;;;;;N;;;;;
+ 1B116;HENTAIGANA LETTER WO-1;Lo;0;L;;;;;N;;;;;
+ 1B117;HENTAIGANA LETTER WO-2;Lo;0;L;;;;;N;;;;;
+ 1B118;HENTAIGANA LETTER WO-3;Lo;0;L;;;;;N;;;;;
+ 1B119;HENTAIGANA LETTER WO-4;Lo;0;L;;;;;N;;;;;
+ 1B11A;HENTAIGANA LETTER WO-5;Lo;0;L;;;;;N;;;;;
+ 1B11B;HENTAIGANA LETTER WO-6;Lo;0;L;;;;;N;;;;;
+ 1B11C;HENTAIGANA LETTER WO-7;Lo;0;L;;;;;N;;;;;
+ 1B11D;HENTAIGANA LETTER N-MU-MO-1;Lo;0;L;;;;;N;;;;;
+ 1B11E;HENTAIGANA LETTER N-MU-MO-2;Lo;0;L;;;;;N;;;;;
+ 1B150;HIRAGANA LETTER SMALL WI;Lo;0;L;;;;;N;;;;;
+ 1B151;HIRAGANA LETTER SMALL WE;Lo;0;L;;;;;N;;;;;
+ 1B152;HIRAGANA LETTER SMALL WO;Lo;0;L;;;;;N;;;;;
+ 1B164;KATAKANA LETTER SMALL WI;Lo;0;L;;;;;N;;;;;
+ 1B165;KATAKANA LETTER SMALL WE;Lo;0;L;;;;;N;;;;;
+ 1B166;KATAKANA LETTER SMALL WO;Lo;0;L;;;;;N;;;;;
+ 1B167;KATAKANA LETTER SMALL N;Lo;0;L;;;;;N;;;;;
+ 1B170;NUSHU CHARACTER-1B170;Lo;0;L;;;;;N;;;;;
+ 1B171;NUSHU CHARACTER-1B171;Lo;0;L;;;;;N;;;;;
+ 1B172;NUSHU CHARACTER-1B172;Lo;0;L;;;;;N;;;;;
+ 1B173;NUSHU CHARACTER-1B173;Lo;0;L;;;;;N;;;;;
+ 1B174;NUSHU CHARACTER-1B174;Lo;0;L;;;;;N;;;;;
+ 1B175;NUSHU CHARACTER-1B175;Lo;0;L;;;;;N;;;;;
+ 1B176;NUSHU CHARACTER-1B176;Lo;0;L;;;;;N;;;;;
+ 1B177;NUSHU CHARACTER-1B177;Lo;0;L;;;;;N;;;;;
+ 1B178;NUSHU CHARACTER-1B178;Lo;0;L;;;;;N;;;;;
+ 1B179;NUSHU CHARACTER-1B179;Lo;0;L;;;;;N;;;;;
+ 1B17A;NUSHU CHARACTER-1B17A;Lo;0;L;;;;;N;;;;;
+ 1B17B;NUSHU CHARACTER-1B17B;Lo;0;L;;;;;N;;;;;
+ 1B17C;NUSHU CHARACTER-1B17C;Lo;0;L;;;;;N;;;;;
+ 1B17D;NUSHU CHARACTER-1B17D;Lo;0;L;;;;;N;;;;;
+ 1B17E;NUSHU CHARACTER-1B17E;Lo;0;L;;;;;N;;;;;
+ 1B17F;NUSHU CHARACTER-1B17F;Lo;0;L;;;;;N;;;;;
+ 1B180;NUSHU CHARACTER-1B180;Lo;0;L;;;;;N;;;;;
+ 1B181;NUSHU CHARACTER-1B181;Lo;0;L;;;;;N;;;;;
+ 1B182;NUSHU CHARACTER-1B182;Lo;0;L;;;;;N;;;;;
+ 1B183;NUSHU CHARACTER-1B183;Lo;0;L;;;;;N;;;;;
+ 1B184;NUSHU CHARACTER-1B184;Lo;0;L;;;;;N;;;;;
+ 1B185;NUSHU CHARACTER-1B185;Lo;0;L;;;;;N;;;;;
+ 1B186;NUSHU CHARACTER-1B186;Lo;0;L;;;;;N;;;;;
+ 1B187;NUSHU CHARACTER-1B187;Lo;0;L;;;;;N;;;;;
+ 1B188;NUSHU CHARACTER-1B188;Lo;0;L;;;;;N;;;;;
+ 1B189;NUSHU CHARACTER-1B189;Lo;0;L;;;;;N;;;;;
+ 1B18A;NUSHU CHARACTER-1B18A;Lo;0;L;;;;;N;;;;;
+ 1B18B;NUSHU CHARACTER-1B18B;Lo;0;L;;;;;N;;;;;
+ 1B18C;NUSHU CHARACTER-1B18C;Lo;0;L;;;;;N;;;;;
+ 1B18D;NUSHU CHARACTER-1B18D;Lo;0;L;;;;;N;;;;;
+ 1B18E;NUSHU CHARACTER-1B18E;Lo;0;L;;;;;N;;;;;
+ 1B18F;NUSHU CHARACTER-1B18F;Lo;0;L;;;;;N;;;;;
+ 1B190;NUSHU CHARACTER-1B190;Lo;0;L;;;;;N;;;;;
+ 1B191;NUSHU CHARACTER-1B191;Lo;0;L;;;;;N;;;;;
+ 1B192;NUSHU CHARACTER-1B192;Lo;0;L;;;;;N;;;;;
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+ 1B2A4;NUSHU CHARACTER-1B2A4;Lo;0;L;;;;;N;;;;;
+ 1B2A5;NUSHU CHARACTER-1B2A5;Lo;0;L;;;;;N;;;;;
+ 1B2A6;NUSHU CHARACTER-1B2A6;Lo;0;L;;;;;N;;;;;
+ 1B2A7;NUSHU CHARACTER-1B2A7;Lo;0;L;;;;;N;;;;;
+ 1B2A8;NUSHU CHARACTER-1B2A8;Lo;0;L;;;;;N;;;;;
+ 1B2A9;NUSHU CHARACTER-1B2A9;Lo;0;L;;;;;N;;;;;
+ 1B2AA;NUSHU CHARACTER-1B2AA;Lo;0;L;;;;;N;;;;;
+ 1B2AB;NUSHU CHARACTER-1B2AB;Lo;0;L;;;;;N;;;;;
+ 1B2AC;NUSHU CHARACTER-1B2AC;Lo;0;L;;;;;N;;;;;
+ 1B2AD;NUSHU CHARACTER-1B2AD;Lo;0;L;;;;;N;;;;;
+ 1B2AE;NUSHU CHARACTER-1B2AE;Lo;0;L;;;;;N;;;;;
+ 1B2AF;NUSHU CHARACTER-1B2AF;Lo;0;L;;;;;N;;;;;
+ 1B2B0;NUSHU CHARACTER-1B2B0;Lo;0;L;;;;;N;;;;;
+ 1B2B1;NUSHU CHARACTER-1B2B1;Lo;0;L;;;;;N;;;;;
+ 1B2B2;NUSHU CHARACTER-1B2B2;Lo;0;L;;;;;N;;;;;
+ 1B2B3;NUSHU CHARACTER-1B2B3;Lo;0;L;;;;;N;;;;;
+ 1B2B4;NUSHU CHARACTER-1B2B4;Lo;0;L;;;;;N;;;;;
+ 1B2B5;NUSHU CHARACTER-1B2B5;Lo;0;L;;;;;N;;;;;
+ 1B2B6;NUSHU CHARACTER-1B2B6;Lo;0;L;;;;;N;;;;;
+ 1B2B7;NUSHU CHARACTER-1B2B7;Lo;0;L;;;;;N;;;;;
+ 1B2B8;NUSHU CHARACTER-1B2B8;Lo;0;L;;;;;N;;;;;
+ 1B2B9;NUSHU CHARACTER-1B2B9;Lo;0;L;;;;;N;;;;;
+ 1B2BA;NUSHU CHARACTER-1B2BA;Lo;0;L;;;;;N;;;;;
+ 1B2BB;NUSHU CHARACTER-1B2BB;Lo;0;L;;;;;N;;;;;
+ 1B2BC;NUSHU CHARACTER-1B2BC;Lo;0;L;;;;;N;;;;;
+ 1B2BD;NUSHU CHARACTER-1B2BD;Lo;0;L;;;;;N;;;;;
+ 1B2BE;NUSHU CHARACTER-1B2BE;Lo;0;L;;;;;N;;;;;
+ 1B2BF;NUSHU CHARACTER-1B2BF;Lo;0;L;;;;;N;;;;;
+ 1B2C0;NUSHU CHARACTER-1B2C0;Lo;0;L;;;;;N;;;;;
+ 1B2C1;NUSHU CHARACTER-1B2C1;Lo;0;L;;;;;N;;;;;
+ 1B2C2;NUSHU CHARACTER-1B2C2;Lo;0;L;;;;;N;;;;;
+ 1B2C3;NUSHU CHARACTER-1B2C3;Lo;0;L;;;;;N;;;;;
+ 1B2C4;NUSHU CHARACTER-1B2C4;Lo;0;L;;;;;N;;;;;
+ 1B2C5;NUSHU CHARACTER-1B2C5;Lo;0;L;;;;;N;;;;;
+ 1B2C6;NUSHU CHARACTER-1B2C6;Lo;0;L;;;;;N;;;;;
+ 1B2C7;NUSHU CHARACTER-1B2C7;Lo;0;L;;;;;N;;;;;
+ 1B2C8;NUSHU CHARACTER-1B2C8;Lo;0;L;;;;;N;;;;;
+ 1B2C9;NUSHU CHARACTER-1B2C9;Lo;0;L;;;;;N;;;;;
+ 1B2CA;NUSHU CHARACTER-1B2CA;Lo;0;L;;;;;N;;;;;
+ 1B2CB;NUSHU CHARACTER-1B2CB;Lo;0;L;;;;;N;;;;;
+ 1B2CC;NUSHU CHARACTER-1B2CC;Lo;0;L;;;;;N;;;;;
+ 1B2CD;NUSHU CHARACTER-1B2CD;Lo;0;L;;;;;N;;;;;
+ 1B2CE;NUSHU CHARACTER-1B2CE;Lo;0;L;;;;;N;;;;;
+ 1B2CF;NUSHU CHARACTER-1B2CF;Lo;0;L;;;;;N;;;;;
+ 1B2D0;NUSHU CHARACTER-1B2D0;Lo;0;L;;;;;N;;;;;
+ 1B2D1;NUSHU CHARACTER-1B2D1;Lo;0;L;;;;;N;;;;;
+ 1B2D2;NUSHU CHARACTER-1B2D2;Lo;0;L;;;;;N;;;;;
+ 1B2D3;NUSHU CHARACTER-1B2D3;Lo;0;L;;;;;N;;;;;
+ 1B2D4;NUSHU CHARACTER-1B2D4;Lo;0;L;;;;;N;;;;;
+ 1B2D5;NUSHU CHARACTER-1B2D5;Lo;0;L;;;;;N;;;;;
+ 1B2D6;NUSHU CHARACTER-1B2D6;Lo;0;L;;;;;N;;;;;
+ 1B2D7;NUSHU CHARACTER-1B2D7;Lo;0;L;;;;;N;;;;;
+ 1B2D8;NUSHU CHARACTER-1B2D8;Lo;0;L;;;;;N;;;;;
+ 1B2D9;NUSHU CHARACTER-1B2D9;Lo;0;L;;;;;N;;;;;
+ 1B2DA;NUSHU CHARACTER-1B2DA;Lo;0;L;;;;;N;;;;;
+ 1B2DB;NUSHU CHARACTER-1B2DB;Lo;0;L;;;;;N;;;;;
+ 1B2DC;NUSHU CHARACTER-1B2DC;Lo;0;L;;;;;N;;;;;
+ 1B2DD;NUSHU CHARACTER-1B2DD;Lo;0;L;;;;;N;;;;;
+ 1B2DE;NUSHU CHARACTER-1B2DE;Lo;0;L;;;;;N;;;;;
+ 1B2DF;NUSHU CHARACTER-1B2DF;Lo;0;L;;;;;N;;;;;
+ 1B2E0;NUSHU CHARACTER-1B2E0;Lo;0;L;;;;;N;;;;;
+ 1B2E1;NUSHU CHARACTER-1B2E1;Lo;0;L;;;;;N;;;;;
+ 1B2E2;NUSHU CHARACTER-1B2E2;Lo;0;L;;;;;N;;;;;
+ 1B2E3;NUSHU CHARACTER-1B2E3;Lo;0;L;;;;;N;;;;;
+ 1B2E4;NUSHU CHARACTER-1B2E4;Lo;0;L;;;;;N;;;;;
+ 1B2E5;NUSHU CHARACTER-1B2E5;Lo;0;L;;;;;N;;;;;
+ 1B2E6;NUSHU CHARACTER-1B2E6;Lo;0;L;;;;;N;;;;;
+ 1B2E7;NUSHU CHARACTER-1B2E7;Lo;0;L;;;;;N;;;;;
+ 1B2E8;NUSHU CHARACTER-1B2E8;Lo;0;L;;;;;N;;;;;
+ 1B2E9;NUSHU CHARACTER-1B2E9;Lo;0;L;;;;;N;;;;;
+ 1B2EA;NUSHU CHARACTER-1B2EA;Lo;0;L;;;;;N;;;;;
+ 1B2EB;NUSHU CHARACTER-1B2EB;Lo;0;L;;;;;N;;;;;
+ 1B2EC;NUSHU CHARACTER-1B2EC;Lo;0;L;;;;;N;;;;;
+ 1B2ED;NUSHU CHARACTER-1B2ED;Lo;0;L;;;;;N;;;;;
+ 1B2EE;NUSHU CHARACTER-1B2EE;Lo;0;L;;;;;N;;;;;
+ 1B2EF;NUSHU CHARACTER-1B2EF;Lo;0;L;;;;;N;;;;;
+ 1B2F0;NUSHU CHARACTER-1B2F0;Lo;0;L;;;;;N;;;;;
+ 1B2F1;NUSHU CHARACTER-1B2F1;Lo;0;L;;;;;N;;;;;
+ 1B2F2;NUSHU CHARACTER-1B2F2;Lo;0;L;;;;;N;;;;;
+ 1B2F3;NUSHU CHARACTER-1B2F3;Lo;0;L;;;;;N;;;;;
+ 1B2F4;NUSHU CHARACTER-1B2F4;Lo;0;L;;;;;N;;;;;
+ 1B2F5;NUSHU CHARACTER-1B2F5;Lo;0;L;;;;;N;;;;;
+ 1B2F6;NUSHU CHARACTER-1B2F6;Lo;0;L;;;;;N;;;;;
+ 1B2F7;NUSHU CHARACTER-1B2F7;Lo;0;L;;;;;N;;;;;
+ 1B2F8;NUSHU CHARACTER-1B2F8;Lo;0;L;;;;;N;;;;;
+ 1B2F9;NUSHU CHARACTER-1B2F9;Lo;0;L;;;;;N;;;;;
+ 1B2FA;NUSHU CHARACTER-1B2FA;Lo;0;L;;;;;N;;;;;
+ 1B2FB;NUSHU CHARACTER-1B2FB;Lo;0;L;;;;;N;;;;;
+ 1BC00;DUPLOYAN LETTER H;Lo;0;L;;;;;N;;;;;
+ 1BC01;DUPLOYAN LETTER X;Lo;0;L;;;;;N;;;;;
+ 1BC02;DUPLOYAN LETTER P;Lo;0;L;;;;;N;;;;;
+ 1BC03;DUPLOYAN LETTER T;Lo;0;L;;;;;N;;;;;
+ 1BC04;DUPLOYAN LETTER F;Lo;0;L;;;;;N;;;;;
+ 1BC05;DUPLOYAN LETTER K;Lo;0;L;;;;;N;;;;;
+ 1BC06;DUPLOYAN LETTER L;Lo;0;L;;;;;N;;;;;
+ 1BC07;DUPLOYAN LETTER B;Lo;0;L;;;;;N;;;;;
+ 1BC08;DUPLOYAN LETTER D;Lo;0;L;;;;;N;;;;;
+ 1BC09;DUPLOYAN LETTER V;Lo;0;L;;;;;N;;;;;
+ 1BC0A;DUPLOYAN LETTER G;Lo;0;L;;;;;N;;;;;
+ 1BC0B;DUPLOYAN LETTER R;Lo;0;L;;;;;N;;;;;
+ 1BC0C;DUPLOYAN LETTER P N;Lo;0;L;;;;;N;;;;;
+ 1BC0D;DUPLOYAN LETTER D S;Lo;0;L;;;;;N;;;;;
+ 1BC0E;DUPLOYAN LETTER F N;Lo;0;L;;;;;N;;;;;
+ 1BC0F;DUPLOYAN LETTER K M;Lo;0;L;;;;;N;;;;;
+ 1BC10;DUPLOYAN LETTER R S;Lo;0;L;;;;;N;;;;;
+ 1BC11;DUPLOYAN LETTER TH;Lo;0;L;;;;;N;;;;;
+ 1BC12;DUPLOYAN LETTER SLOAN DH;Lo;0;L;;;;;N;;;;;
+ 1BC13;DUPLOYAN LETTER DH;Lo;0;L;;;;;N;;;;;
+ 1BC14;DUPLOYAN LETTER KK;Lo;0;L;;;;;N;;;;;
+ 1BC15;DUPLOYAN LETTER SLOAN J;Lo;0;L;;;;;N;;;;;
+ 1BC16;DUPLOYAN LETTER HL;Lo;0;L;;;;;N;;;;;
+ 1BC17;DUPLOYAN LETTER LH;Lo;0;L;;;;;N;;;;;
+ 1BC18;DUPLOYAN LETTER RH;Lo;0;L;;;;;N;;;;;
+ 1BC19;DUPLOYAN LETTER M;Lo;0;L;;;;;N;;;;;
+ 1BC1A;DUPLOYAN LETTER N;Lo;0;L;;;;;N;;;;;
+ 1BC1B;DUPLOYAN LETTER J;Lo;0;L;;;;;N;;;;;
+ 1BC1C;DUPLOYAN LETTER S;Lo;0;L;;;;;N;;;;;
+ 1BC1D;DUPLOYAN LETTER M N;Lo;0;L;;;;;N;;;;;
+ 1BC1E;DUPLOYAN LETTER N M;Lo;0;L;;;;;N;;;;;
+ 1BC1F;DUPLOYAN LETTER J M;Lo;0;L;;;;;N;;;;;
+ 1BC20;DUPLOYAN LETTER S J;Lo;0;L;;;;;N;;;;;
+ 1BC21;DUPLOYAN LETTER M WITH DOT;Lo;0;L;;;;;N;;;;;
+ 1BC22;DUPLOYAN LETTER N WITH DOT;Lo;0;L;;;;;N;;;;;
+ 1BC23;DUPLOYAN LETTER J WITH DOT;Lo;0;L;;;;;N;;;;;
+ 1BC24;DUPLOYAN LETTER J WITH DOTS INSIDE AND ABOVE;Lo;0;L;;;;;N;;;;;
+ 1BC25;DUPLOYAN LETTER S WITH DOT;Lo;0;L;;;;;N;;;;;
+ 1BC26;DUPLOYAN LETTER S WITH DOT BELOW;Lo;0;L;;;;;N;;;;;
+ 1BC27;DUPLOYAN LETTER M S;Lo;0;L;;;;;N;;;;;
+ 1BC28;DUPLOYAN LETTER N S;Lo;0;L;;;;;N;;;;;
+ 1BC29;DUPLOYAN LETTER J S;Lo;0;L;;;;;N;;;;;
+ 1BC2A;DUPLOYAN LETTER S S;Lo;0;L;;;;;N;;;;;
+ 1BC2B;DUPLOYAN LETTER M N S;Lo;0;L;;;;;N;;;;;
+ 1BC2C;DUPLOYAN LETTER N M S;Lo;0;L;;;;;N;;;;;
+ 1BC2D;DUPLOYAN LETTER J M S;Lo;0;L;;;;;N;;;;;
+ 1BC2E;DUPLOYAN LETTER S J S;Lo;0;L;;;;;N;;;;;
+ 1BC2F;DUPLOYAN LETTER J S WITH DOT;Lo;0;L;;;;;N;;;;;
+ 1BC30;DUPLOYAN LETTER J N;Lo;0;L;;;;;N;;;;;
+ 1BC31;DUPLOYAN LETTER J N S;Lo;0;L;;;;;N;;;;;
+ 1BC32;DUPLOYAN LETTER S T;Lo;0;L;;;;;N;;;;;
+ 1BC33;DUPLOYAN LETTER S T R;Lo;0;L;;;;;N;;;;;
+ 1BC34;DUPLOYAN LETTER S P;Lo;0;L;;;;;N;;;;;
+ 1BC35;DUPLOYAN LETTER S P R;Lo;0;L;;;;;N;;;;;
+ 1BC36;DUPLOYAN LETTER T S;Lo;0;L;;;;;N;;;;;
+ 1BC37;DUPLOYAN LETTER T R S;Lo;0;L;;;;;N;;;;;
+ 1BC38;DUPLOYAN LETTER W;Lo;0;L;;;;;N;;;;;
+ 1BC39;DUPLOYAN LETTER WH;Lo;0;L;;;;;N;;;;;
+ 1BC3A;DUPLOYAN LETTER W R;Lo;0;L;;;;;N;;;;;
+ 1BC3B;DUPLOYAN LETTER S N;Lo;0;L;;;;;N;;;;;
+ 1BC3C;DUPLOYAN LETTER S M;Lo;0;L;;;;;N;;;;;
+ 1BC3D;DUPLOYAN LETTER K R S;Lo;0;L;;;;;N;;;;;
+ 1BC3E;DUPLOYAN LETTER G R S;Lo;0;L;;;;;N;;;;;
+ 1BC3F;DUPLOYAN LETTER S K;Lo;0;L;;;;;N;;;;;
+ 1BC40;DUPLOYAN LETTER S K R;Lo;0;L;;;;;N;;;;;
+ 1BC41;DUPLOYAN LETTER A;Lo;0;L;;;;;N;;;;;
+ 1BC42;DUPLOYAN LETTER SLOAN OW;Lo;0;L;;;;;N;;;;;
+ 1BC43;DUPLOYAN LETTER OA;Lo;0;L;;;;;N;;;;;
+ 1BC44;DUPLOYAN LETTER O;Lo;0;L;;;;;N;;;;;
+ 1BC45;DUPLOYAN LETTER AOU;Lo;0;L;;;;;N;;;;;
+ 1BC46;DUPLOYAN LETTER I;Lo;0;L;;;;;N;;;;;
+ 1BC47;DUPLOYAN LETTER E;Lo;0;L;;;;;N;;;;;
+ 1BC48;DUPLOYAN LETTER IE;Lo;0;L;;;;;N;;;;;
+ 1BC49;DUPLOYAN LETTER SHORT I;Lo;0;L;;;;;N;;;;;
+ 1BC4A;DUPLOYAN LETTER UI;Lo;0;L;;;;;N;;;;;
+ 1BC4B;DUPLOYAN LETTER EE;Lo;0;L;;;;;N;;;;;
+ 1BC4C;DUPLOYAN LETTER SLOAN EH;Lo;0;L;;;;;N;;;;;
+ 1BC4D;DUPLOYAN LETTER ROMANIAN I;Lo;0;L;;;;;N;;;;;
+ 1BC4E;DUPLOYAN LETTER SLOAN EE;Lo;0;L;;;;;N;;;;;
+ 1BC4F;DUPLOYAN LETTER LONG I;Lo;0;L;;;;;N;;;;;
+ 1BC50;DUPLOYAN LETTER YE;Lo;0;L;;;;;N;;;;;
+ 1BC51;DUPLOYAN LETTER U;Lo;0;L;;;;;N;;;;;
+ 1BC52;DUPLOYAN LETTER EU;Lo;0;L;;;;;N;;;;;
+ 1BC53;DUPLOYAN LETTER XW;Lo;0;L;;;;;N;;;;;
+ 1BC54;DUPLOYAN LETTER U N;Lo;0;L;;;;;N;;;;;
+ 1BC55;DUPLOYAN LETTER LONG U;Lo;0;L;;;;;N;;;;;
+ 1BC56;DUPLOYAN LETTER ROMANIAN U;Lo;0;L;;;;;N;;;;;
+ 1BC57;DUPLOYAN LETTER UH;Lo;0;L;;;;;N;;;;;
+ 1BC58;DUPLOYAN LETTER SLOAN U;Lo;0;L;;;;;N;;;;;
+ 1BC59;DUPLOYAN LETTER OOH;Lo;0;L;;;;;N;;;;;
+ 1BC5A;DUPLOYAN LETTER OW;Lo;0;L;;;;;N;;;;;
+ 1BC5B;DUPLOYAN LETTER OU;Lo;0;L;;;;;N;;;;;
+ 1BC5C;DUPLOYAN LETTER WA;Lo;0;L;;;;;N;;;;;
+ 1BC5D;DUPLOYAN LETTER WO;Lo;0;L;;;;;N;;;;;
+ 1BC5E;DUPLOYAN LETTER WI;Lo;0;L;;;;;N;;;;;
+ 1BC5F;DUPLOYAN LETTER WEI;Lo;0;L;;;;;N;;;;;
+ 1BC60;DUPLOYAN LETTER WOW;Lo;0;L;;;;;N;;;;;
+ 1BC61;DUPLOYAN LETTER NASAL U;Lo;0;L;;;;;N;;;;;
+ 1BC62;DUPLOYAN LETTER NASAL O;Lo;0;L;;;;;N;;;;;
+ 1BC63;DUPLOYAN LETTER NASAL I;Lo;0;L;;;;;N;;;;;
+ 1BC64;DUPLOYAN LETTER NASAL A;Lo;0;L;;;;;N;;;;;
+ 1BC65;DUPLOYAN LETTER PERNIN AN;Lo;0;L;;;;;N;;;;;
+ 1BC66;DUPLOYAN LETTER PERNIN AM;Lo;0;L;;;;;N;;;;;
+ 1BC67;DUPLOYAN LETTER SLOAN EN;Lo;0;L;;;;;N;;;;;
+ 1BC68;DUPLOYAN LETTER SLOAN AN;Lo;0;L;;;;;N;;;;;
+ 1BC69;DUPLOYAN LETTER SLOAN ON;Lo;0;L;;;;;N;;;;;
+ 1BC6A;DUPLOYAN LETTER VOCALIC M;Lo;0;L;;;;;N;;;;;
+ 1BC70;DUPLOYAN AFFIX LEFT HORIZONTAL SECANT;Lo;0;L;;;;;N;;;;;
+ 1BC71;DUPLOYAN AFFIX MID HORIZONTAL SECANT;Lo;0;L;;;;;N;;;;;
+ 1BC72;DUPLOYAN AFFIX RIGHT HORIZONTAL SECANT;Lo;0;L;;;;;N;;;;;
+ 1BC73;DUPLOYAN AFFIX LOW VERTICAL SECANT;Lo;0;L;;;;;N;;;;;
+ 1BC74;DUPLOYAN AFFIX MID VERTICAL SECANT;Lo;0;L;;;;;N;;;;;
+ 1BC75;DUPLOYAN AFFIX HIGH VERTICAL SECANT;Lo;0;L;;;;;N;;;;;
+ 1BC76;DUPLOYAN AFFIX ATTACHED SECANT;Lo;0;L;;;;;N;;;;;
+ 1BC77;DUPLOYAN AFFIX ATTACHED LEFT-TO-RIGHT SECANT;Lo;0;L;;;;;N;;;;;
+ 1BC78;DUPLOYAN AFFIX ATTACHED TANGENT;Lo;0;L;;;;;N;;;;;
+ 1BC79;DUPLOYAN AFFIX ATTACHED TAIL;Lo;0;L;;;;;N;;;;;
+ 1BC7A;DUPLOYAN AFFIX ATTACHED E HOOK;Lo;0;L;;;;;N;;;;;
+ 1BC7B;DUPLOYAN AFFIX ATTACHED I HOOK;Lo;0;L;;;;;N;;;;;
+ 1BC7C;DUPLOYAN AFFIX ATTACHED TANGENT HOOK;Lo;0;L;;;;;N;;;;;
+ 1BC80;DUPLOYAN AFFIX HIGH ACUTE;Lo;0;L;;;;;N;;;;;
+ 1BC81;DUPLOYAN AFFIX HIGH TIGHT ACUTE;Lo;0;L;;;;;N;;;;;
+ 1BC82;DUPLOYAN AFFIX HIGH GRAVE;Lo;0;L;;;;;N;;;;;
+ 1BC83;DUPLOYAN AFFIX HIGH LONG GRAVE;Lo;0;L;;;;;N;;;;;
+ 1BC84;DUPLOYAN AFFIX HIGH DOT;Lo;0;L;;;;;N;;;;;
+ 1BC85;DUPLOYAN AFFIX HIGH CIRCLE;Lo;0;L;;;;;N;;;;;
+ 1BC86;DUPLOYAN AFFIX HIGH LINE;Lo;0;L;;;;;N;;;;;
+ 1BC87;DUPLOYAN AFFIX HIGH WAVE;Lo;0;L;;;;;N;;;;;
+ 1BC88;DUPLOYAN AFFIX HIGH VERTICAL;Lo;0;L;;;;;N;;;;;
+ 1BC90;DUPLOYAN AFFIX LOW ACUTE;Lo;0;L;;;;;N;;;;;
+ 1BC91;DUPLOYAN AFFIX LOW TIGHT ACUTE;Lo;0;L;;;;;N;;;;;
+ 1BC92;DUPLOYAN AFFIX LOW GRAVE;Lo;0;L;;;;;N;;;;;
+ 1BC93;DUPLOYAN AFFIX LOW LONG GRAVE;Lo;0;L;;;;;N;;;;;
+ 1BC94;DUPLOYAN AFFIX LOW DOT;Lo;0;L;;;;;N;;;;;
+ 1BC95;DUPLOYAN AFFIX LOW CIRCLE;Lo;0;L;;;;;N;;;;;
+ 1BC96;DUPLOYAN AFFIX LOW LINE;Lo;0;L;;;;;N;;;;;
+ 1BC97;DUPLOYAN AFFIX LOW WAVE;Lo;0;L;;;;;N;;;;;
+ 1BC98;DUPLOYAN AFFIX LOW VERTICAL;Lo;0;L;;;;;N;;;;;
+ 1BC99;DUPLOYAN AFFIX LOW ARROW;Lo;0;L;;;;;N;;;;;
+ 1BC9C;DUPLOYAN SIGN O WITH CROSS;So;0;L;;;;;N;;;;;
+ 1BC9D;DUPLOYAN THICK LETTER SELECTOR;Mn;0;NSM;;;;;N;;;;;
+ 1BC9E;DUPLOYAN DOUBLE MARK;Mn;1;NSM;;;;;N;;;;;
+ 1BC9F;DUPLOYAN PUNCTUATION CHINOOK FULL STOP;Po;0;L;;;;;N;;;;;
+ 1BCA0;SHORTHAND FORMAT LETTER OVERLAP;Cf;0;BN;;;;;N;;;;;
+ 1BCA1;SHORTHAND FORMAT CONTINUING OVERLAP;Cf;0;BN;;;;;N;;;;;
+ 1BCA2;SHORTHAND FORMAT DOWN STEP;Cf;0;BN;;;;;N;;;;;
+ 1BCA3;SHORTHAND FORMAT UP STEP;Cf;0;BN;;;;;N;;;;;
+ 1D000;BYZANTINE MUSICAL SYMBOL PSILI;So;0;L;;;;;N;;;;;
+ 1D001;BYZANTINE MUSICAL SYMBOL DASEIA;So;0;L;;;;;N;;;;;
+ 1D002;BYZANTINE MUSICAL SYMBOL PERISPOMENI;So;0;L;;;;;N;;;;;
+ 1D003;BYZANTINE MUSICAL SYMBOL OXEIA EKFONITIKON;So;0;L;;;;;N;;;;;
+ 1D004;BYZANTINE MUSICAL SYMBOL OXEIA DIPLI;So;0;L;;;;;N;;;;;
+ 1D005;BYZANTINE MUSICAL SYMBOL VAREIA EKFONITIKON;So;0;L;;;;;N;;;;;
+ 1D006;BYZANTINE MUSICAL SYMBOL VAREIA DIPLI;So;0;L;;;;;N;;;;;
+ 1D007;BYZANTINE MUSICAL SYMBOL KATHISTI;So;0;L;;;;;N;;;;;
+ 1D008;BYZANTINE MUSICAL SYMBOL SYRMATIKI;So;0;L;;;;;N;;;;;
+ 1D009;BYZANTINE MUSICAL SYMBOL PARAKLITIKI;So;0;L;;;;;N;;;;;
+ 1D00A;BYZANTINE MUSICAL SYMBOL YPOKRISIS;So;0;L;;;;;N;;;;;
+ 1D00B;BYZANTINE MUSICAL SYMBOL YPOKRISIS DIPLI;So;0;L;;;;;N;;;;;
+ 1D00C;BYZANTINE MUSICAL SYMBOL KREMASTI;So;0;L;;;;;N;;;;;
+ 1D00D;BYZANTINE MUSICAL SYMBOL APESO EKFONITIKON;So;0;L;;;;;N;;;;;
+ 1D00E;BYZANTINE MUSICAL SYMBOL EXO EKFONITIKON;So;0;L;;;;;N;;;;;
+ 1D00F;BYZANTINE MUSICAL SYMBOL TELEIA;So;0;L;;;;;N;;;;;
+ 1D010;BYZANTINE MUSICAL SYMBOL KENTIMATA;So;0;L;;;;;N;;;;;
+ 1D011;BYZANTINE MUSICAL SYMBOL APOSTROFOS;So;0;L;;;;;N;;;;;
+ 1D012;BYZANTINE MUSICAL SYMBOL APOSTROFOS DIPLI;So;0;L;;;;;N;;;;;
+ 1D013;BYZANTINE MUSICAL SYMBOL SYNEVMA;So;0;L;;;;;N;;;;;
+ 1D014;BYZANTINE MUSICAL SYMBOL THITA;So;0;L;;;;;N;;;;;
+ 1D015;BYZANTINE MUSICAL SYMBOL OLIGON ARCHAION;So;0;L;;;;;N;;;;;
+ 1D016;BYZANTINE MUSICAL SYMBOL GORGON ARCHAION;So;0;L;;;;;N;;;;;
+ 1D017;BYZANTINE MUSICAL SYMBOL PSILON;So;0;L;;;;;N;;;;;
+ 1D018;BYZANTINE MUSICAL SYMBOL CHAMILON;So;0;L;;;;;N;;;;;
+ 1D019;BYZANTINE MUSICAL SYMBOL VATHY;So;0;L;;;;;N;;;;;
+ 1D01A;BYZANTINE MUSICAL SYMBOL ISON ARCHAION;So;0;L;;;;;N;;;;;
+ 1D01B;BYZANTINE MUSICAL SYMBOL KENTIMA ARCHAION;So;0;L;;;;;N;;;;;
+ 1D01C;BYZANTINE MUSICAL SYMBOL KENTIMATA ARCHAION;So;0;L;;;;;N;;;;;
+ 1D01D;BYZANTINE MUSICAL SYMBOL SAXIMATA;So;0;L;;;;;N;;;;;
+ 1D01E;BYZANTINE MUSICAL SYMBOL PARICHON;So;0;L;;;;;N;;;;;
+ 1D01F;BYZANTINE MUSICAL SYMBOL STAVROS APODEXIA;So;0;L;;;;;N;;;;;
+ 1D020;BYZANTINE MUSICAL SYMBOL OXEIAI ARCHAION;So;0;L;;;;;N;;;;;
+ 1D021;BYZANTINE MUSICAL SYMBOL VAREIAI ARCHAION;So;0;L;;;;;N;;;;;
+ 1D022;BYZANTINE MUSICAL SYMBOL APODERMA ARCHAION;So;0;L;;;;;N;;;;;
+ 1D023;BYZANTINE MUSICAL SYMBOL APOTHEMA;So;0;L;;;;;N;;;;;
+ 1D024;BYZANTINE MUSICAL SYMBOL KLASMA;So;0;L;;;;;N;;;;;
+ 1D025;BYZANTINE MUSICAL SYMBOL REVMA;So;0;L;;;;;N;;;;;
+ 1D026;BYZANTINE MUSICAL SYMBOL PIASMA ARCHAION;So;0;L;;;;;N;;;;;
+ 1D027;BYZANTINE MUSICAL SYMBOL TINAGMA;So;0;L;;;;;N;;;;;
+ 1D028;BYZANTINE MUSICAL SYMBOL ANATRICHISMA;So;0;L;;;;;N;;;;;
+ 1D029;BYZANTINE MUSICAL SYMBOL SEISMA;So;0;L;;;;;N;;;;;
+ 1D02A;BYZANTINE MUSICAL SYMBOL SYNAGMA ARCHAION;So;0;L;;;;;N;;;;;
+ 1D02B;BYZANTINE MUSICAL SYMBOL SYNAGMA META STAVROU;So;0;L;;;;;N;;;;;
+ 1D02C;BYZANTINE MUSICAL SYMBOL OYRANISMA ARCHAION;So;0;L;;;;;N;;;;;
+ 1D02D;BYZANTINE MUSICAL SYMBOL THEMA;So;0;L;;;;;N;;;;;
+ 1D02E;BYZANTINE MUSICAL SYMBOL LEMOI;So;0;L;;;;;N;;;;;
+ 1D02F;BYZANTINE MUSICAL SYMBOL DYO;So;0;L;;;;;N;;;;;
+ 1D030;BYZANTINE MUSICAL SYMBOL TRIA;So;0;L;;;;;N;;;;;
+ 1D031;BYZANTINE MUSICAL SYMBOL TESSERA;So;0;L;;;;;N;;;;;
+ 1D032;BYZANTINE MUSICAL SYMBOL KRATIMATA;So;0;L;;;;;N;;;;;
+ 1D033;BYZANTINE MUSICAL SYMBOL APESO EXO NEO;So;0;L;;;;;N;;;;;
+ 1D034;BYZANTINE MUSICAL SYMBOL FTHORA ARCHAION;So;0;L;;;;;N;;;;;
+ 1D035;BYZANTINE MUSICAL SYMBOL IMIFTHORA;So;0;L;;;;;N;;;;;
+ 1D036;BYZANTINE MUSICAL SYMBOL TROMIKON ARCHAION;So;0;L;;;;;N;;;;;
+ 1D037;BYZANTINE MUSICAL SYMBOL KATAVA TROMIKON;So;0;L;;;;;N;;;;;
+ 1D038;BYZANTINE MUSICAL SYMBOL PELASTON;So;0;L;;;;;N;;;;;
+ 1D039;BYZANTINE MUSICAL SYMBOL PSIFISTON;So;0;L;;;;;N;;;;;
+ 1D03A;BYZANTINE MUSICAL SYMBOL KONTEVMA;So;0;L;;;;;N;;;;;
+ 1D03B;BYZANTINE MUSICAL SYMBOL CHOREVMA ARCHAION;So;0;L;;;;;N;;;;;
+ 1D03C;BYZANTINE MUSICAL SYMBOL RAPISMA;So;0;L;;;;;N;;;;;
+ 1D03D;BYZANTINE MUSICAL SYMBOL PARAKALESMA ARCHAION;So;0;L;;;;;N;;;;;
+ 1D03E;BYZANTINE MUSICAL SYMBOL PARAKLITIKI ARCHAION;So;0;L;;;;;N;;;;;
+ 1D03F;BYZANTINE MUSICAL SYMBOL ICHADIN;So;0;L;;;;;N;;;;;
+ 1D040;BYZANTINE MUSICAL SYMBOL NANA;So;0;L;;;;;N;;;;;
+ 1D041;BYZANTINE MUSICAL SYMBOL PETASMA;So;0;L;;;;;N;;;;;
+ 1D042;BYZANTINE MUSICAL SYMBOL KONTEVMA ALLO;So;0;L;;;;;N;;;;;
+ 1D043;BYZANTINE MUSICAL SYMBOL TROMIKON ALLO;So;0;L;;;;;N;;;;;
+ 1D044;BYZANTINE MUSICAL SYMBOL STRAGGISMATA;So;0;L;;;;;N;;;;;
+ 1D045;BYZANTINE MUSICAL SYMBOL GRONTHISMATA;So;0;L;;;;;N;;;;;
+ 1D046;BYZANTINE MUSICAL SYMBOL ISON NEO;So;0;L;;;;;N;;;;;
+ 1D047;BYZANTINE MUSICAL SYMBOL OLIGON NEO;So;0;L;;;;;N;;;;;
+ 1D048;BYZANTINE MUSICAL SYMBOL OXEIA NEO;So;0;L;;;;;N;;;;;
+ 1D049;BYZANTINE MUSICAL SYMBOL PETASTI;So;0;L;;;;;N;;;;;
+ 1D04A;BYZANTINE MUSICAL SYMBOL KOUFISMA;So;0;L;;;;;N;;;;;
+ 1D04B;BYZANTINE MUSICAL SYMBOL PETASTOKOUFISMA;So;0;L;;;;;N;;;;;
+ 1D04C;BYZANTINE MUSICAL SYMBOL KRATIMOKOUFISMA;So;0;L;;;;;N;;;;;
+ 1D04D;BYZANTINE MUSICAL SYMBOL PELASTON NEO;So;0;L;;;;;N;;;;;
+ 1D04E;BYZANTINE MUSICAL SYMBOL KENTIMATA NEO ANO;So;0;L;;;;;N;;;;;
+ 1D04F;BYZANTINE MUSICAL SYMBOL KENTIMA NEO ANO;So;0;L;;;;;N;;;;;
+ 1D050;BYZANTINE MUSICAL SYMBOL YPSILI;So;0;L;;;;;N;;;;;
+ 1D051;BYZANTINE MUSICAL SYMBOL APOSTROFOS NEO;So;0;L;;;;;N;;;;;
+ 1D052;BYZANTINE MUSICAL SYMBOL APOSTROFOI SYNDESMOS NEO;So;0;L;;;;;N;;;;;
+ 1D053;BYZANTINE MUSICAL SYMBOL YPORROI;So;0;L;;;;;N;;;;;
+ 1D054;BYZANTINE MUSICAL SYMBOL KRATIMOYPORROON;So;0;L;;;;;N;;;;;
+ 1D055;BYZANTINE MUSICAL SYMBOL ELAFRON;So;0;L;;;;;N;;;;;
+ 1D056;BYZANTINE MUSICAL SYMBOL CHAMILI;So;0;L;;;;;N;;;;;
+ 1D057;BYZANTINE MUSICAL SYMBOL MIKRON ISON;So;0;L;;;;;N;;;;;
+ 1D058;BYZANTINE MUSICAL SYMBOL VAREIA NEO;So;0;L;;;;;N;;;;;
+ 1D059;BYZANTINE MUSICAL SYMBOL PIASMA NEO;So;0;L;;;;;N;;;;;
+ 1D05A;BYZANTINE MUSICAL SYMBOL PSIFISTON NEO;So;0;L;;;;;N;;;;;
+ 1D05B;BYZANTINE MUSICAL SYMBOL OMALON;So;0;L;;;;;N;;;;;
+ 1D05C;BYZANTINE MUSICAL SYMBOL ANTIKENOMA;So;0;L;;;;;N;;;;;
+ 1D05D;BYZANTINE MUSICAL SYMBOL LYGISMA;So;0;L;;;;;N;;;;;
+ 1D05E;BYZANTINE MUSICAL SYMBOL PARAKLITIKI NEO;So;0;L;;;;;N;;;;;
+ 1D05F;BYZANTINE MUSICAL SYMBOL PARAKALESMA NEO;So;0;L;;;;;N;;;;;
+ 1D060;BYZANTINE MUSICAL SYMBOL ETERON PARAKALESMA;So;0;L;;;;;N;;;;;
+ 1D061;BYZANTINE MUSICAL SYMBOL KYLISMA;So;0;L;;;;;N;;;;;
+ 1D062;BYZANTINE MUSICAL SYMBOL ANTIKENOKYLISMA;So;0;L;;;;;N;;;;;
+ 1D063;BYZANTINE MUSICAL SYMBOL TROMIKON NEO;So;0;L;;;;;N;;;;;
+ 1D064;BYZANTINE MUSICAL SYMBOL EKSTREPTON;So;0;L;;;;;N;;;;;
+ 1D065;BYZANTINE MUSICAL SYMBOL SYNAGMA NEO;So;0;L;;;;;N;;;;;
+ 1D066;BYZANTINE MUSICAL SYMBOL SYRMA;So;0;L;;;;;N;;;;;
+ 1D067;BYZANTINE MUSICAL SYMBOL CHOREVMA NEO;So;0;L;;;;;N;;;;;
+ 1D068;BYZANTINE MUSICAL SYMBOL EPEGERMA;So;0;L;;;;;N;;;;;
+ 1D069;BYZANTINE MUSICAL SYMBOL SEISMA NEO;So;0;L;;;;;N;;;;;
+ 1D06A;BYZANTINE MUSICAL SYMBOL XIRON KLASMA;So;0;L;;;;;N;;;;;
+ 1D06B;BYZANTINE MUSICAL SYMBOL TROMIKOPSIFISTON;So;0;L;;;;;N;;;;;
+ 1D06C;BYZANTINE MUSICAL SYMBOL PSIFISTOLYGISMA;So;0;L;;;;;N;;;;;
+ 1D06D;BYZANTINE MUSICAL SYMBOL TROMIKOLYGISMA;So;0;L;;;;;N;;;;;
+ 1D06E;BYZANTINE MUSICAL SYMBOL TROMIKOPARAKALESMA;So;0;L;;;;;N;;;;;
+ 1D06F;BYZANTINE MUSICAL SYMBOL PSIFISTOPARAKALESMA;So;0;L;;;;;N;;;;;
+ 1D070;BYZANTINE MUSICAL SYMBOL TROMIKOSYNAGMA;So;0;L;;;;;N;;;;;
+ 1D071;BYZANTINE MUSICAL SYMBOL PSIFISTOSYNAGMA;So;0;L;;;;;N;;;;;
+ 1D072;BYZANTINE MUSICAL SYMBOL GORGOSYNTHETON;So;0;L;;;;;N;;;;;
+ 1D073;BYZANTINE MUSICAL SYMBOL ARGOSYNTHETON;So;0;L;;;;;N;;;;;
+ 1D074;BYZANTINE MUSICAL SYMBOL ETERON ARGOSYNTHETON;So;0;L;;;;;N;;;;;
+ 1D075;BYZANTINE MUSICAL SYMBOL OYRANISMA NEO;So;0;L;;;;;N;;;;;
+ 1D076;BYZANTINE MUSICAL SYMBOL THEMATISMOS ESO;So;0;L;;;;;N;;;;;
+ 1D077;BYZANTINE MUSICAL SYMBOL THEMATISMOS EXO;So;0;L;;;;;N;;;;;
+ 1D078;BYZANTINE MUSICAL SYMBOL THEMA APLOUN;So;0;L;;;;;N;;;;;
+ 1D079;BYZANTINE MUSICAL SYMBOL THES KAI APOTHES;So;0;L;;;;;N;;;;;
+ 1D07A;BYZANTINE MUSICAL SYMBOL KATAVASMA;So;0;L;;;;;N;;;;;
+ 1D07B;BYZANTINE MUSICAL SYMBOL ENDOFONON;So;0;L;;;;;N;;;;;
+ 1D07C;BYZANTINE MUSICAL SYMBOL YFEN KATO;So;0;L;;;;;N;;;;;
+ 1D07D;BYZANTINE MUSICAL SYMBOL YFEN ANO;So;0;L;;;;;N;;;;;
+ 1D07E;BYZANTINE MUSICAL SYMBOL STAVROS;So;0;L;;;;;N;;;;;
+ 1D07F;BYZANTINE MUSICAL SYMBOL KLASMA ANO;So;0;L;;;;;N;;;;;
+ 1D080;BYZANTINE MUSICAL SYMBOL DIPLI ARCHAION;So;0;L;;;;;N;;;;;
+ 1D081;BYZANTINE MUSICAL SYMBOL KRATIMA ARCHAION;So;0;L;;;;;N;;;;;
+ 1D082;BYZANTINE MUSICAL SYMBOL KRATIMA ALLO;So;0;L;;;;;N;;;;;
+ 1D083;BYZANTINE MUSICAL SYMBOL KRATIMA NEO;So;0;L;;;;;N;;;;;
+ 1D084;BYZANTINE MUSICAL SYMBOL APODERMA NEO;So;0;L;;;;;N;;;;;
+ 1D085;BYZANTINE MUSICAL SYMBOL APLI;So;0;L;;;;;N;;;;;
+ 1D086;BYZANTINE MUSICAL SYMBOL DIPLI;So;0;L;;;;;N;;;;;
+ 1D087;BYZANTINE MUSICAL SYMBOL TRIPLI;So;0;L;;;;;N;;;;;
+ 1D088;BYZANTINE MUSICAL SYMBOL TETRAPLI;So;0;L;;;;;N;;;;;
+ 1D089;BYZANTINE MUSICAL SYMBOL KORONIS;So;0;L;;;;;N;;;;;
+ 1D08A;BYZANTINE MUSICAL SYMBOL LEIMMA ENOS CHRONOU;So;0;L;;;;;N;;;;;
+ 1D08B;BYZANTINE MUSICAL SYMBOL LEIMMA DYO CHRONON;So;0;L;;;;;N;;;;;
+ 1D08C;BYZANTINE MUSICAL SYMBOL LEIMMA TRION CHRONON;So;0;L;;;;;N;;;;;
+ 1D08D;BYZANTINE MUSICAL SYMBOL LEIMMA TESSARON CHRONON;So;0;L;;;;;N;;;;;
+ 1D08E;BYZANTINE MUSICAL SYMBOL LEIMMA IMISEOS CHRONOU;So;0;L;;;;;N;;;;;
+ 1D08F;BYZANTINE MUSICAL SYMBOL GORGON NEO ANO;So;0;L;;;;;N;;;;;
+ 1D090;BYZANTINE MUSICAL SYMBOL GORGON PARESTIGMENON ARISTERA;So;0;L;;;;;N;;;;;
+ 1D091;BYZANTINE MUSICAL SYMBOL GORGON PARESTIGMENON DEXIA;So;0;L;;;;;N;;;;;
+ 1D092;BYZANTINE MUSICAL SYMBOL DIGORGON;So;0;L;;;;;N;;;;;
+ 1D093;BYZANTINE MUSICAL SYMBOL DIGORGON PARESTIGMENON ARISTERA KATO;So;0;L;;;;;N;;;;;
+ 1D094;BYZANTINE MUSICAL SYMBOL DIGORGON PARESTIGMENON ARISTERA ANO;So;0;L;;;;;N;;;;;
+ 1D095;BYZANTINE MUSICAL SYMBOL DIGORGON PARESTIGMENON DEXIA;So;0;L;;;;;N;;;;;
+ 1D096;BYZANTINE MUSICAL SYMBOL TRIGORGON;So;0;L;;;;;N;;;;;
+ 1D097;BYZANTINE MUSICAL SYMBOL ARGON;So;0;L;;;;;N;;;;;
+ 1D098;BYZANTINE MUSICAL SYMBOL IMIDIARGON;So;0;L;;;;;N;;;;;
+ 1D099;BYZANTINE MUSICAL SYMBOL DIARGON;So;0;L;;;;;N;;;;;
+ 1D09A;BYZANTINE MUSICAL SYMBOL AGOGI POLI ARGI;So;0;L;;;;;N;;;;;
+ 1D09B;BYZANTINE MUSICAL SYMBOL AGOGI ARGOTERI;So;0;L;;;;;N;;;;;
+ 1D09C;BYZANTINE MUSICAL SYMBOL AGOGI ARGI;So;0;L;;;;;N;;;;;
+ 1D09D;BYZANTINE MUSICAL SYMBOL AGOGI METRIA;So;0;L;;;;;N;;;;;
+ 1D09E;BYZANTINE MUSICAL SYMBOL AGOGI MESI;So;0;L;;;;;N;;;;;
+ 1D09F;BYZANTINE MUSICAL SYMBOL AGOGI GORGI;So;0;L;;;;;N;;;;;
+ 1D0A0;BYZANTINE MUSICAL SYMBOL AGOGI GORGOTERI;So;0;L;;;;;N;;;;;
+ 1D0A1;BYZANTINE MUSICAL SYMBOL AGOGI POLI GORGI;So;0;L;;;;;N;;;;;
+ 1D0A2;BYZANTINE MUSICAL SYMBOL MARTYRIA PROTOS ICHOS;So;0;L;;;;;N;;;;;
+ 1D0A3;BYZANTINE MUSICAL SYMBOL MARTYRIA ALLI PROTOS ICHOS;So;0;L;;;;;N;;;;;
+ 1D0A4;BYZANTINE MUSICAL SYMBOL MARTYRIA DEYTEROS ICHOS;So;0;L;;;;;N;;;;;
+ 1D0A5;BYZANTINE MUSICAL SYMBOL MARTYRIA ALLI DEYTEROS ICHOS;So;0;L;;;;;N;;;;;
+ 1D0A6;BYZANTINE MUSICAL SYMBOL MARTYRIA TRITOS ICHOS;So;0;L;;;;;N;;;;;
+ 1D0A7;BYZANTINE MUSICAL SYMBOL MARTYRIA TRIFONIAS;So;0;L;;;;;N;;;;;
+ 1D0A8;BYZANTINE MUSICAL SYMBOL MARTYRIA TETARTOS ICHOS;So;0;L;;;;;N;;;;;
+ 1D0A9;BYZANTINE MUSICAL SYMBOL MARTYRIA TETARTOS LEGETOS ICHOS;So;0;L;;;;;N;;;;;
+ 1D0AA;BYZANTINE MUSICAL SYMBOL MARTYRIA LEGETOS ICHOS;So;0;L;;;;;N;;;;;
+ 1D0AB;BYZANTINE MUSICAL SYMBOL MARTYRIA PLAGIOS ICHOS;So;0;L;;;;;N;;;;;
+ 1D0AC;BYZANTINE MUSICAL SYMBOL ISAKIA TELOUS ICHIMATOS;So;0;L;;;;;N;;;;;
+ 1D0AD;BYZANTINE MUSICAL SYMBOL APOSTROFOI TELOUS ICHIMATOS;So;0;L;;;;;N;;;;;
+ 1D0AE;BYZANTINE MUSICAL SYMBOL FANEROSIS TETRAFONIAS;So;0;L;;;;;N;;;;;
+ 1D0AF;BYZANTINE MUSICAL SYMBOL FANEROSIS MONOFONIAS;So;0;L;;;;;N;;;;;
+ 1D0B0;BYZANTINE MUSICAL SYMBOL FANEROSIS DIFONIAS;So;0;L;;;;;N;;;;;
+ 1D0B1;BYZANTINE MUSICAL SYMBOL MARTYRIA VARYS ICHOS;So;0;L;;;;;N;;;;;
+ 1D0B2;BYZANTINE MUSICAL SYMBOL MARTYRIA PROTOVARYS ICHOS;So;0;L;;;;;N;;;;;
+ 1D0B3;BYZANTINE MUSICAL SYMBOL MARTYRIA PLAGIOS TETARTOS ICHOS;So;0;L;;;;;N;;;;;
+ 1D0B4;BYZANTINE MUSICAL SYMBOL GORTHMIKON N APLOUN;So;0;L;;;;;N;;;;;
+ 1D0B5;BYZANTINE MUSICAL SYMBOL GORTHMIKON N DIPLOUN;So;0;L;;;;;N;;;;;
+ 1D0B6;BYZANTINE MUSICAL SYMBOL ENARXIS KAI FTHORA VOU;So;0;L;;;;;N;;;;;
+ 1D0B7;BYZANTINE MUSICAL SYMBOL IMIFONON;So;0;L;;;;;N;;;;;
+ 1D0B8;BYZANTINE MUSICAL SYMBOL IMIFTHORON;So;0;L;;;;;N;;;;;
+ 1D0B9;BYZANTINE MUSICAL SYMBOL FTHORA ARCHAION DEYTEROU ICHOU;So;0;L;;;;;N;;;;;
+ 1D0BA;BYZANTINE MUSICAL SYMBOL FTHORA DIATONIKI PA;So;0;L;;;;;N;;;;;
+ 1D0BB;BYZANTINE MUSICAL SYMBOL FTHORA DIATONIKI NANA;So;0;L;;;;;N;;;;;
+ 1D0BC;BYZANTINE MUSICAL SYMBOL FTHORA NAOS ICHOS;So;0;L;;;;;N;;;;;
+ 1D0BD;BYZANTINE MUSICAL SYMBOL FTHORA DIATONIKI DI;So;0;L;;;;;N;;;;;
+ 1D0BE;BYZANTINE MUSICAL SYMBOL FTHORA SKLIRON DIATONON DI;So;0;L;;;;;N;;;;;
+ 1D0BF;BYZANTINE MUSICAL SYMBOL FTHORA DIATONIKI KE;So;0;L;;;;;N;;;;;
+ 1D0C0;BYZANTINE MUSICAL SYMBOL FTHORA DIATONIKI ZO;So;0;L;;;;;N;;;;;
+ 1D0C1;BYZANTINE MUSICAL SYMBOL FTHORA DIATONIKI NI KATO;So;0;L;;;;;N;;;;;
+ 1D0C2;BYZANTINE MUSICAL SYMBOL FTHORA DIATONIKI NI ANO;So;0;L;;;;;N;;;;;
+ 1D0C3;BYZANTINE MUSICAL SYMBOL FTHORA MALAKON CHROMA DIFONIAS;So;0;L;;;;;N;;;;;
+ 1D0C4;BYZANTINE MUSICAL SYMBOL FTHORA MALAKON CHROMA MONOFONIAS;So;0;L;;;;;N;;;;;
+ 1D0C5;BYZANTINE MUSICAL SYMBOL FHTORA SKLIRON CHROMA VASIS;So;0;L;;;;;N;;;;;
+ 1D0C6;BYZANTINE MUSICAL SYMBOL FTHORA SKLIRON CHROMA SYNAFI;So;0;L;;;;;N;;;;;
+ 1D0C7;BYZANTINE MUSICAL SYMBOL FTHORA NENANO;So;0;L;;;;;N;;;;;
+ 1D0C8;BYZANTINE MUSICAL SYMBOL CHROA ZYGOS;So;0;L;;;;;N;;;;;
+ 1D0C9;BYZANTINE MUSICAL SYMBOL CHROA KLITON;So;0;L;;;;;N;;;;;
+ 1D0CA;BYZANTINE MUSICAL SYMBOL CHROA SPATHI;So;0;L;;;;;N;;;;;
+ 1D0CB;BYZANTINE MUSICAL SYMBOL FTHORA I YFESIS TETARTIMORION;So;0;L;;;;;N;;;;;
+ 1D0CC;BYZANTINE MUSICAL SYMBOL FTHORA ENARMONIOS ANTIFONIA;So;0;L;;;;;N;;;;;
+ 1D0CD;BYZANTINE MUSICAL SYMBOL YFESIS TRITIMORION;So;0;L;;;;;N;;;;;
+ 1D0CE;BYZANTINE MUSICAL SYMBOL DIESIS TRITIMORION;So;0;L;;;;;N;;;;;
+ 1D0CF;BYZANTINE MUSICAL SYMBOL DIESIS TETARTIMORION;So;0;L;;;;;N;;;;;
+ 1D0D0;BYZANTINE MUSICAL SYMBOL DIESIS APLI DYO DODEKATA;So;0;L;;;;;N;;;;;
+ 1D0D1;BYZANTINE MUSICAL SYMBOL DIESIS MONOGRAMMOS TESSERA DODEKATA;So;0;L;;;;;N;;;;;
+ 1D0D2;BYZANTINE MUSICAL SYMBOL DIESIS DIGRAMMOS EX DODEKATA;So;0;L;;;;;N;;;;;
+ 1D0D3;BYZANTINE MUSICAL SYMBOL DIESIS TRIGRAMMOS OKTO DODEKATA;So;0;L;;;;;N;;;;;
+ 1D0D4;BYZANTINE MUSICAL SYMBOL YFESIS APLI DYO DODEKATA;So;0;L;;;;;N;;;;;
+ 1D0D5;BYZANTINE MUSICAL SYMBOL YFESIS MONOGRAMMOS TESSERA DODEKATA;So;0;L;;;;;N;;;;;
+ 1D0D6;BYZANTINE MUSICAL SYMBOL YFESIS DIGRAMMOS EX DODEKATA;So;0;L;;;;;N;;;;;
+ 1D0D7;BYZANTINE MUSICAL SYMBOL YFESIS TRIGRAMMOS OKTO DODEKATA;So;0;L;;;;;N;;;;;
+ 1D0D8;BYZANTINE MUSICAL SYMBOL GENIKI DIESIS;So;0;L;;;;;N;;;;;
+ 1D0D9;BYZANTINE MUSICAL SYMBOL GENIKI YFESIS;So;0;L;;;;;N;;;;;
+ 1D0DA;BYZANTINE MUSICAL SYMBOL DIASTOLI APLI MIKRI;So;0;L;;;;;N;;;;;
+ 1D0DB;BYZANTINE MUSICAL SYMBOL DIASTOLI APLI MEGALI;So;0;L;;;;;N;;;;;
+ 1D0DC;BYZANTINE MUSICAL SYMBOL DIASTOLI DIPLI;So;0;L;;;;;N;;;;;
+ 1D0DD;BYZANTINE MUSICAL SYMBOL DIASTOLI THESEOS;So;0;L;;;;;N;;;;;
+ 1D0DE;BYZANTINE MUSICAL SYMBOL SIMANSIS THESEOS;So;0;L;;;;;N;;;;;
+ 1D0DF;BYZANTINE MUSICAL SYMBOL SIMANSIS THESEOS DISIMOU;So;0;L;;;;;N;;;;;
+ 1D0E0;BYZANTINE MUSICAL SYMBOL SIMANSIS THESEOS TRISIMOU;So;0;L;;;;;N;;;;;
+ 1D0E1;BYZANTINE MUSICAL SYMBOL SIMANSIS THESEOS TETRASIMOU;So;0;L;;;;;N;;;;;
+ 1D0E2;BYZANTINE MUSICAL SYMBOL SIMANSIS ARSEOS;So;0;L;;;;;N;;;;;
+ 1D0E3;BYZANTINE MUSICAL SYMBOL SIMANSIS ARSEOS DISIMOU;So;0;L;;;;;N;;;;;
+ 1D0E4;BYZANTINE MUSICAL SYMBOL SIMANSIS ARSEOS TRISIMOU;So;0;L;;;;;N;;;;;
+ 1D0E5;BYZANTINE MUSICAL SYMBOL SIMANSIS ARSEOS TETRASIMOU;So;0;L;;;;;N;;;;;
+ 1D0E6;BYZANTINE MUSICAL SYMBOL DIGRAMMA GG;So;0;L;;;;;N;;;;;
+ 1D0E7;BYZANTINE MUSICAL SYMBOL DIFTOGGOS OU;So;0;L;;;;;N;;;;;
+ 1D0E8;BYZANTINE MUSICAL SYMBOL STIGMA;So;0;L;;;;;N;;;;;
+ 1D0E9;BYZANTINE MUSICAL SYMBOL ARKTIKO PA;So;0;L;;;;;N;;;;;
+ 1D0EA;BYZANTINE MUSICAL SYMBOL ARKTIKO VOU;So;0;L;;;;;N;;;;;
+ 1D0EB;BYZANTINE MUSICAL SYMBOL ARKTIKO GA;So;0;L;;;;;N;;;;;
+ 1D0EC;BYZANTINE MUSICAL SYMBOL ARKTIKO DI;So;0;L;;;;;N;;;;;
+ 1D0ED;BYZANTINE MUSICAL SYMBOL ARKTIKO KE;So;0;L;;;;;N;;;;;
+ 1D0EE;BYZANTINE MUSICAL SYMBOL ARKTIKO ZO;So;0;L;;;;;N;;;;;
+ 1D0EF;BYZANTINE MUSICAL SYMBOL ARKTIKO NI;So;0;L;;;;;N;;;;;
+ 1D0F0;BYZANTINE MUSICAL SYMBOL KENTIMATA NEO MESO;So;0;L;;;;;N;;;;;
+ 1D0F1;BYZANTINE MUSICAL SYMBOL KENTIMA NEO MESO;So;0;L;;;;;N;;;;;
+ 1D0F2;BYZANTINE MUSICAL SYMBOL KENTIMATA NEO KATO;So;0;L;;;;;N;;;;;
+ 1D0F3;BYZANTINE MUSICAL SYMBOL KENTIMA NEO KATO;So;0;L;;;;;N;;;;;
+ 1D0F4;BYZANTINE MUSICAL SYMBOL KLASMA KATO;So;0;L;;;;;N;;;;;
+ 1D0F5;BYZANTINE MUSICAL SYMBOL GORGON NEO KATO;So;0;L;;;;;N;;;;;
+ 1D100;MUSICAL SYMBOL SINGLE BARLINE;So;0;L;;;;;N;;;;;
+ 1D101;MUSICAL SYMBOL DOUBLE BARLINE;So;0;L;;;;;N;;;;;
+ 1D102;MUSICAL SYMBOL FINAL BARLINE;So;0;L;;;;;N;;;;;
+ 1D103;MUSICAL SYMBOL REVERSE FINAL BARLINE;So;0;L;;;;;N;;;;;
+ 1D104;MUSICAL SYMBOL DASHED BARLINE;So;0;L;;;;;N;;;;;
+ 1D105;MUSICAL SYMBOL SHORT BARLINE;So;0;L;;;;;N;;;;;
+ 1D106;MUSICAL SYMBOL LEFT REPEAT SIGN;So;0;L;;;;;N;;;;;
+ 1D107;MUSICAL SYMBOL RIGHT REPEAT SIGN;So;0;L;;;;;N;;;;;
+ 1D108;MUSICAL SYMBOL REPEAT DOTS;So;0;L;;;;;N;;;;;
+ 1D109;MUSICAL SYMBOL DAL SEGNO;So;0;L;;;;;N;;;;;
+ 1D10A;MUSICAL SYMBOL DA CAPO;So;0;L;;;;;N;;;;;
+ 1D10B;MUSICAL SYMBOL SEGNO;So;0;L;;;;;N;;;;;
+ 1D10C;MUSICAL SYMBOL CODA;So;0;L;;;;;N;;;;;
+ 1D10D;MUSICAL SYMBOL REPEATED FIGURE-1;So;0;L;;;;;N;;;;;
+ 1D10E;MUSICAL SYMBOL REPEATED FIGURE-2;So;0;L;;;;;N;;;;;
+ 1D10F;MUSICAL SYMBOL REPEATED FIGURE-3;So;0;L;;;;;N;;;;;
+ 1D110;MUSICAL SYMBOL FERMATA;So;0;L;;;;;N;;;;;
+ 1D111;MUSICAL SYMBOL FERMATA BELOW;So;0;L;;;;;N;;;;;
+ 1D112;MUSICAL SYMBOL BREATH MARK;So;0;L;;;;;N;;;;;
+ 1D113;MUSICAL SYMBOL CAESURA;So;0;L;;;;;N;;;;;
+ 1D114;MUSICAL SYMBOL BRACE;So;0;L;;;;;N;;;;;
+ 1D115;MUSICAL SYMBOL BRACKET;So;0;L;;;;;N;;;;;
+ 1D116;MUSICAL SYMBOL ONE-LINE STAFF;So;0;L;;;;;N;;;;;
+ 1D117;MUSICAL SYMBOL TWO-LINE STAFF;So;0;L;;;;;N;;;;;
+ 1D118;MUSICAL SYMBOL THREE-LINE STAFF;So;0;L;;;;;N;;;;;
+ 1D119;MUSICAL SYMBOL FOUR-LINE STAFF;So;0;L;;;;;N;;;;;
+ 1D11A;MUSICAL SYMBOL FIVE-LINE STAFF;So;0;L;;;;;N;;;;;
+ 1D11B;MUSICAL SYMBOL SIX-LINE STAFF;So;0;L;;;;;N;;;;;
+ 1D11C;MUSICAL SYMBOL SIX-STRING FRETBOARD;So;0;L;;;;;N;;;;;
+ 1D11D;MUSICAL SYMBOL FOUR-STRING FRETBOARD;So;0;L;;;;;N;;;;;
+ 1D11E;MUSICAL SYMBOL G CLEF;So;0;L;;;;;N;;;;;
+ 1D11F;MUSICAL SYMBOL G CLEF OTTAVA ALTA;So;0;L;;;;;N;;;;;
+ 1D120;MUSICAL SYMBOL G CLEF OTTAVA BASSA;So;0;L;;;;;N;;;;;
+ 1D121;MUSICAL SYMBOL C CLEF;So;0;L;;;;;N;;;;;
+ 1D122;MUSICAL SYMBOL F CLEF;So;0;L;;;;;N;;;;;
+ 1D123;MUSICAL SYMBOL F CLEF OTTAVA ALTA;So;0;L;;;;;N;;;;;
+ 1D124;MUSICAL SYMBOL F CLEF OTTAVA BASSA;So;0;L;;;;;N;;;;;
+ 1D125;MUSICAL SYMBOL DRUM CLEF-1;So;0;L;;;;;N;;;;;
+ 1D126;MUSICAL SYMBOL DRUM CLEF-2;So;0;L;;;;;N;;;;;
+ 1D129;MUSICAL SYMBOL MULTIPLE MEASURE REST;So;0;L;;;;;N;;;;;
+ 1D12A;MUSICAL SYMBOL DOUBLE SHARP;So;0;L;;;;;N;;;;;
+ 1D12B;MUSICAL SYMBOL DOUBLE FLAT;So;0;L;;;;;N;;;;;
+ 1D12C;MUSICAL SYMBOL FLAT UP;So;0;L;;;;;N;;;;;
+ 1D12D;MUSICAL SYMBOL FLAT DOWN;So;0;L;;;;;N;;;;;
+ 1D12E;MUSICAL SYMBOL NATURAL UP;So;0;L;;;;;N;;;;;
+ 1D12F;MUSICAL SYMBOL NATURAL DOWN;So;0;L;;;;;N;;;;;
+ 1D130;MUSICAL SYMBOL SHARP UP;So;0;L;;;;;N;;;;;
+ 1D131;MUSICAL SYMBOL SHARP DOWN;So;0;L;;;;;N;;;;;
+ 1D132;MUSICAL SYMBOL QUARTER TONE SHARP;So;0;L;;;;;N;;;;;
+ 1D133;MUSICAL SYMBOL QUARTER TONE FLAT;So;0;L;;;;;N;;;;;
+ 1D134;MUSICAL SYMBOL COMMON TIME;So;0;L;;;;;N;;;;;
+ 1D135;MUSICAL SYMBOL CUT TIME;So;0;L;;;;;N;;;;;
+ 1D136;MUSICAL SYMBOL OTTAVA ALTA;So;0;L;;;;;N;;;;;
+ 1D137;MUSICAL SYMBOL OTTAVA BASSA;So;0;L;;;;;N;;;;;
+ 1D138;MUSICAL SYMBOL QUINDICESIMA ALTA;So;0;L;;;;;N;;;;;
+ 1D139;MUSICAL SYMBOL QUINDICESIMA BASSA;So;0;L;;;;;N;;;;;
+ 1D13A;MUSICAL SYMBOL MULTI REST;So;0;L;;;;;N;;;;;
+ 1D13B;MUSICAL SYMBOL WHOLE REST;So;0;L;;;;;N;;;;;
+ 1D13C;MUSICAL SYMBOL HALF REST;So;0;L;;;;;N;;;;;
+ 1D13D;MUSICAL SYMBOL QUARTER REST;So;0;L;;;;;N;;;;;
+ 1D13E;MUSICAL SYMBOL EIGHTH REST;So;0;L;;;;;N;;;;;
+ 1D13F;MUSICAL SYMBOL SIXTEENTH REST;So;0;L;;;;;N;;;;;
+ 1D140;MUSICAL SYMBOL THIRTY-SECOND REST;So;0;L;;;;;N;;;;;
+ 1D141;MUSICAL SYMBOL SIXTY-FOURTH REST;So;0;L;;;;;N;;;;;
+ 1D142;MUSICAL SYMBOL ONE HUNDRED TWENTY-EIGHTH REST;So;0;L;;;;;N;;;;;
+ 1D143;MUSICAL SYMBOL X NOTEHEAD;So;0;L;;;;;N;;;;;
+ 1D144;MUSICAL SYMBOL PLUS NOTEHEAD;So;0;L;;;;;N;;;;;
+ 1D145;MUSICAL SYMBOL CIRCLE X NOTEHEAD;So;0;L;;;;;N;;;;;
+ 1D146;MUSICAL SYMBOL SQUARE NOTEHEAD WHITE;So;0;L;;;;;N;;;;;
+ 1D147;MUSICAL SYMBOL SQUARE NOTEHEAD BLACK;So;0;L;;;;;N;;;;;
+ 1D148;MUSICAL SYMBOL TRIANGLE NOTEHEAD UP WHITE;So;0;L;;;;;N;;;;;
+ 1D149;MUSICAL SYMBOL TRIANGLE NOTEHEAD UP BLACK;So;0;L;;;;;N;;;;;
+ 1D14A;MUSICAL SYMBOL TRIANGLE NOTEHEAD LEFT WHITE;So;0;L;;;;;N;;;;;
+ 1D14B;MUSICAL SYMBOL TRIANGLE NOTEHEAD LEFT BLACK;So;0;L;;;;;N;;;;;
+ 1D14C;MUSICAL SYMBOL TRIANGLE NOTEHEAD RIGHT WHITE;So;0;L;;;;;N;;;;;
+ 1D14D;MUSICAL SYMBOL TRIANGLE NOTEHEAD RIGHT BLACK;So;0;L;;;;;N;;;;;
+ 1D14E;MUSICAL SYMBOL TRIANGLE NOTEHEAD DOWN WHITE;So;0;L;;;;;N;;;;;
+ 1D14F;MUSICAL SYMBOL TRIANGLE NOTEHEAD DOWN BLACK;So;0;L;;;;;N;;;;;
+ 1D150;MUSICAL SYMBOL TRIANGLE NOTEHEAD UP RIGHT WHITE;So;0;L;;;;;N;;;;;
+ 1D151;MUSICAL SYMBOL TRIANGLE NOTEHEAD UP RIGHT BLACK;So;0;L;;;;;N;;;;;
+ 1D152;MUSICAL SYMBOL MOON NOTEHEAD WHITE;So;0;L;;;;;N;;;;;
+ 1D153;MUSICAL SYMBOL MOON NOTEHEAD BLACK;So;0;L;;;;;N;;;;;
+ 1D154;MUSICAL SYMBOL TRIANGLE-ROUND NOTEHEAD DOWN WHITE;So;0;L;;;;;N;;;;;
+ 1D155;MUSICAL SYMBOL TRIANGLE-ROUND NOTEHEAD DOWN BLACK;So;0;L;;;;;N;;;;;
+ 1D156;MUSICAL SYMBOL PARENTHESIS NOTEHEAD;So;0;L;;;;;N;;;;;
+ 1D157;MUSICAL SYMBOL VOID NOTEHEAD;So;0;L;;;;;N;;;;;
+ 1D158;MUSICAL SYMBOL NOTEHEAD BLACK;So;0;L;;;;;N;;;;;
+ 1D159;MUSICAL SYMBOL NULL NOTEHEAD;So;0;L;;;;;N;;;;;
+ 1D15A;MUSICAL SYMBOL CLUSTER NOTEHEAD WHITE;So;0;L;;;;;N;;;;;
+ 1D15B;MUSICAL SYMBOL CLUSTER NOTEHEAD BLACK;So;0;L;;;;;N;;;;;
+ 1D15C;MUSICAL SYMBOL BREVE;So;0;L;;;;;N;;;;;
+ 1D15D;MUSICAL SYMBOL WHOLE NOTE;So;0;L;;;;;N;;;;;
+ 1D15E;MUSICAL SYMBOL HALF NOTE;So;0;L;1D157 1D165;;;;N;;;;;
+ 1D15F;MUSICAL SYMBOL QUARTER NOTE;So;0;L;1D158 1D165;;;;N;;;;;
+ 1D160;MUSICAL SYMBOL EIGHTH NOTE;So;0;L;1D15F 1D16E;;;;N;;;;;
+ 1D161;MUSICAL SYMBOL SIXTEENTH NOTE;So;0;L;1D15F 1D16F;;;;N;;;;;
+ 1D162;MUSICAL SYMBOL THIRTY-SECOND NOTE;So;0;L;1D15F 1D170;;;;N;;;;;
+ 1D163;MUSICAL SYMBOL SIXTY-FOURTH NOTE;So;0;L;1D15F 1D171;;;;N;;;;;
+ 1D164;MUSICAL SYMBOL ONE HUNDRED TWENTY-EIGHTH NOTE;So;0;L;1D15F 1D172;;;;N;;;;;
+ 1D165;MUSICAL SYMBOL COMBINING STEM;Mc;216;L;;;;;N;;;;;
+ 1D166;MUSICAL SYMBOL COMBINING SPRECHGESANG STEM;Mc;216;L;;;;;N;;;;;
+ 1D167;MUSICAL SYMBOL COMBINING TREMOLO-1;Mn;1;NSM;;;;;N;;;;;
+ 1D168;MUSICAL SYMBOL COMBINING TREMOLO-2;Mn;1;NSM;;;;;N;;;;;
+ 1D169;MUSICAL SYMBOL COMBINING TREMOLO-3;Mn;1;NSM;;;;;N;;;;;
+ 1D16A;MUSICAL SYMBOL FINGERED TREMOLO-1;So;0;L;;;;;N;;;;;
+ 1D16B;MUSICAL SYMBOL FINGERED TREMOLO-2;So;0;L;;;;;N;;;;;
+ 1D16C;MUSICAL SYMBOL FINGERED TREMOLO-3;So;0;L;;;;;N;;;;;
+ 1D16D;MUSICAL SYMBOL COMBINING AUGMENTATION DOT;Mc;226;L;;;;;N;;;;;
+ 1D16E;MUSICAL SYMBOL COMBINING FLAG-1;Mc;216;L;;;;;N;;;;;
+ 1D16F;MUSICAL SYMBOL COMBINING FLAG-2;Mc;216;L;;;;;N;;;;;
+ 1D170;MUSICAL SYMBOL COMBINING FLAG-3;Mc;216;L;;;;;N;;;;;
+ 1D171;MUSICAL SYMBOL COMBINING FLAG-4;Mc;216;L;;;;;N;;;;;
+ 1D172;MUSICAL SYMBOL COMBINING FLAG-5;Mc;216;L;;;;;N;;;;;
+ 1D173;MUSICAL SYMBOL BEGIN BEAM;Cf;0;BN;;;;;N;;;;;
+ 1D174;MUSICAL SYMBOL END BEAM;Cf;0;BN;;;;;N;;;;;
+ 1D175;MUSICAL SYMBOL BEGIN TIE;Cf;0;BN;;;;;N;;;;;
+ 1D176;MUSICAL SYMBOL END TIE;Cf;0;BN;;;;;N;;;;;
+ 1D177;MUSICAL SYMBOL BEGIN SLUR;Cf;0;BN;;;;;N;;;;;
+ 1D178;MUSICAL SYMBOL END SLUR;Cf;0;BN;;;;;N;;;;;
+ 1D179;MUSICAL SYMBOL BEGIN PHRASE;Cf;0;BN;;;;;N;;;;;
+ 1D17A;MUSICAL SYMBOL END PHRASE;Cf;0;BN;;;;;N;;;;;
+ 1D17B;MUSICAL SYMBOL COMBINING ACCENT;Mn;220;NSM;;;;;N;;;;;
+ 1D17C;MUSICAL SYMBOL COMBINING STACCATO;Mn;220;NSM;;;;;N;;;;;
+ 1D17D;MUSICAL SYMBOL COMBINING TENUTO;Mn;220;NSM;;;;;N;;;;;
+ 1D17E;MUSICAL SYMBOL COMBINING STACCATISSIMO;Mn;220;NSM;;;;;N;;;;;
+ 1D17F;MUSICAL SYMBOL COMBINING MARCATO;Mn;220;NSM;;;;;N;;;;;
+ 1D180;MUSICAL SYMBOL COMBINING MARCATO-STACCATO;Mn;220;NSM;;;;;N;;;;;
+ 1D181;MUSICAL SYMBOL COMBINING ACCENT-STACCATO;Mn;220;NSM;;;;;N;;;;;
+ 1D182;MUSICAL SYMBOL COMBINING LOURE;Mn;220;NSM;;;;;N;;;;;
+ 1D183;MUSICAL SYMBOL ARPEGGIATO UP;So;0;L;;;;;N;;;;;
+ 1D184;MUSICAL SYMBOL ARPEGGIATO DOWN;So;0;L;;;;;N;;;;;
+ 1D185;MUSICAL SYMBOL COMBINING DOIT;Mn;230;NSM;;;;;N;;;;;
+ 1D186;MUSICAL SYMBOL COMBINING RIP;Mn;230;NSM;;;;;N;;;;;
+ 1D187;MUSICAL SYMBOL COMBINING FLIP;Mn;230;NSM;;;;;N;;;;;
+ 1D188;MUSICAL SYMBOL COMBINING SMEAR;Mn;230;NSM;;;;;N;;;;;
+ 1D189;MUSICAL SYMBOL COMBINING BEND;Mn;230;NSM;;;;;N;;;;;
+ 1D18A;MUSICAL SYMBOL COMBINING DOUBLE TONGUE;Mn;220;NSM;;;;;N;;;;;
+ 1D18B;MUSICAL SYMBOL COMBINING TRIPLE TONGUE;Mn;220;NSM;;;;;N;;;;;
+ 1D18C;MUSICAL SYMBOL RINFORZANDO;So;0;L;;;;;N;;;;;
+ 1D18D;MUSICAL SYMBOL SUBITO;So;0;L;;;;;N;;;;;
+ 1D18E;MUSICAL SYMBOL Z;So;0;L;;;;;N;;;;;
+ 1D18F;MUSICAL SYMBOL PIANO;So;0;L;;;;;N;;;;;
+ 1D190;MUSICAL SYMBOL MEZZO;So;0;L;;;;;N;;;;;
+ 1D191;MUSICAL SYMBOL FORTE;So;0;L;;;;;N;;;;;
+ 1D192;MUSICAL SYMBOL CRESCENDO;So;0;L;;;;;N;;;;;
+ 1D193;MUSICAL SYMBOL DECRESCENDO;So;0;L;;;;;N;;;;;
+ 1D194;MUSICAL SYMBOL GRACE NOTE SLASH;So;0;L;;;;;N;;;;;
+ 1D195;MUSICAL SYMBOL GRACE NOTE NO SLASH;So;0;L;;;;;N;;;;;
+ 1D196;MUSICAL SYMBOL TR;So;0;L;;;;;N;;;;;
+ 1D197;MUSICAL SYMBOL TURN;So;0;L;;;;;N;;;;;
+ 1D198;MUSICAL SYMBOL INVERTED TURN;So;0;L;;;;;N;;;;;
+ 1D199;MUSICAL SYMBOL TURN SLASH;So;0;L;;;;;N;;;;;
+ 1D19A;MUSICAL SYMBOL TURN UP;So;0;L;;;;;N;;;;;
+ 1D19B;MUSICAL SYMBOL ORNAMENT STROKE-1;So;0;L;;;;;N;;;;;
+ 1D19C;MUSICAL SYMBOL ORNAMENT STROKE-2;So;0;L;;;;;N;;;;;
+ 1D19D;MUSICAL SYMBOL ORNAMENT STROKE-3;So;0;L;;;;;N;;;;;
+ 1D19E;MUSICAL SYMBOL ORNAMENT STROKE-4;So;0;L;;;;;N;;;;;
+ 1D19F;MUSICAL SYMBOL ORNAMENT STROKE-5;So;0;L;;;;;N;;;;;
+ 1D1A0;MUSICAL SYMBOL ORNAMENT STROKE-6;So;0;L;;;;;N;;;;;
+ 1D1A1;MUSICAL SYMBOL ORNAMENT STROKE-7;So;0;L;;;;;N;;;;;
+ 1D1A2;MUSICAL SYMBOL ORNAMENT STROKE-8;So;0;L;;;;;N;;;;;
+ 1D1A3;MUSICAL SYMBOL ORNAMENT STROKE-9;So;0;L;;;;;N;;;;;
+ 1D1A4;MUSICAL SYMBOL ORNAMENT STROKE-10;So;0;L;;;;;N;;;;;
+ 1D1A5;MUSICAL SYMBOL ORNAMENT STROKE-11;So;0;L;;;;;N;;;;;
+ 1D1A6;MUSICAL SYMBOL HAUPTSTIMME;So;0;L;;;;;N;;;;;
+ 1D1A7;MUSICAL SYMBOL NEBENSTIMME;So;0;L;;;;;N;;;;;
+ 1D1A8;MUSICAL SYMBOL END OF STIMME;So;0;L;;;;;N;;;;;
+ 1D1A9;MUSICAL SYMBOL DEGREE SLASH;So;0;L;;;;;N;;;;;
+ 1D1AA;MUSICAL SYMBOL COMBINING DOWN BOW;Mn;230;NSM;;;;;N;;;;;
+ 1D1AB;MUSICAL SYMBOL COMBINING UP BOW;Mn;230;NSM;;;;;N;;;;;
+ 1D1AC;MUSICAL SYMBOL COMBINING HARMONIC;Mn;230;NSM;;;;;N;;;;;
+ 1D1AD;MUSICAL SYMBOL COMBINING SNAP PIZZICATO;Mn;230;NSM;;;;;N;;;;;
+ 1D1AE;MUSICAL SYMBOL PEDAL MARK;So;0;L;;;;;N;;;;;
+ 1D1AF;MUSICAL SYMBOL PEDAL UP MARK;So;0;L;;;;;N;;;;;
+ 1D1B0;MUSICAL SYMBOL HALF PEDAL MARK;So;0;L;;;;;N;;;;;
+ 1D1B1;MUSICAL SYMBOL GLISSANDO UP;So;0;L;;;;;N;;;;;
+ 1D1B2;MUSICAL SYMBOL GLISSANDO DOWN;So;0;L;;;;;N;;;;;
+ 1D1B3;MUSICAL SYMBOL WITH FINGERNAILS;So;0;L;;;;;N;;;;;
+ 1D1B4;MUSICAL SYMBOL DAMP;So;0;L;;;;;N;;;;;
+ 1D1B5;MUSICAL SYMBOL DAMP ALL;So;0;L;;;;;N;;;;;
+ 1D1B6;MUSICAL SYMBOL MAXIMA;So;0;L;;;;;N;;;;;
+ 1D1B7;MUSICAL SYMBOL LONGA;So;0;L;;;;;N;;;;;
+ 1D1B8;MUSICAL SYMBOL BREVIS;So;0;L;;;;;N;;;;;
+ 1D1B9;MUSICAL SYMBOL SEMIBREVIS WHITE;So;0;L;;;;;N;;;;;
+ 1D1BA;MUSICAL SYMBOL SEMIBREVIS BLACK;So;0;L;;;;;N;;;;;
+ 1D1BB;MUSICAL SYMBOL MINIMA;So;0;L;1D1B9 1D165;;;;N;;;;;
+ 1D1BC;MUSICAL SYMBOL MINIMA BLACK;So;0;L;1D1BA 1D165;;;;N;;;;;
+ 1D1BD;MUSICAL SYMBOL SEMIMINIMA WHITE;So;0;L;1D1BB 1D16E;;;;N;;;;;
+ 1D1BE;MUSICAL SYMBOL SEMIMINIMA BLACK;So;0;L;1D1BC 1D16E;;;;N;;;;;
+ 1D1BF;MUSICAL SYMBOL FUSA WHITE;So;0;L;1D1BB 1D16F;;;;N;;;;;
+ 1D1C0;MUSICAL SYMBOL FUSA BLACK;So;0;L;1D1BC 1D16F;;;;N;;;;;
+ 1D1C1;MUSICAL SYMBOL LONGA PERFECTA REST;So;0;L;;;;;N;;;;;
+ 1D1C2;MUSICAL SYMBOL LONGA IMPERFECTA REST;So;0;L;;;;;N;;;;;
+ 1D1C3;MUSICAL SYMBOL BREVIS REST;So;0;L;;;;;N;;;;;
+ 1D1C4;MUSICAL SYMBOL SEMIBREVIS REST;So;0;L;;;;;N;;;;;
+ 1D1C5;MUSICAL SYMBOL MINIMA REST;So;0;L;;;;;N;;;;;
+ 1D1C6;MUSICAL SYMBOL SEMIMINIMA REST;So;0;L;;;;;N;;;;;
+ 1D1C7;MUSICAL SYMBOL TEMPUS PERFECTUM CUM PROLATIONE PERFECTA;So;0;L;;;;;N;;;;;
+ 1D1C8;MUSICAL SYMBOL TEMPUS PERFECTUM CUM PROLATIONE IMPERFECTA;So;0;L;;;;;N;;;;;
+ 1D1C9;MUSICAL SYMBOL TEMPUS PERFECTUM CUM PROLATIONE PERFECTA DIMINUTION-1;So;0;L;;;;;N;;;;;
+ 1D1CA;MUSICAL SYMBOL TEMPUS IMPERFECTUM CUM PROLATIONE PERFECTA;So;0;L;;;;;N;;;;;
+ 1D1CB;MUSICAL SYMBOL TEMPUS IMPERFECTUM CUM PROLATIONE IMPERFECTA;So;0;L;;;;;N;;;;;
+ 1D1CC;MUSICAL SYMBOL TEMPUS IMPERFECTUM CUM PROLATIONE IMPERFECTA DIMINUTION-1;So;0;L;;;;;N;;;;;
+ 1D1CD;MUSICAL SYMBOL TEMPUS IMPERFECTUM CUM PROLATIONE IMPERFECTA DIMINUTION-2;So;0;L;;;;;N;;;;;
+ 1D1CE;MUSICAL SYMBOL TEMPUS IMPERFECTUM CUM PROLATIONE IMPERFECTA DIMINUTION-3;So;0;L;;;;;N;;;;;
+ 1D1CF;MUSICAL SYMBOL CROIX;So;0;L;;;;;N;;;;;
+ 1D1D0;MUSICAL SYMBOL GREGORIAN C CLEF;So;0;L;;;;;N;;;;;
+ 1D1D1;MUSICAL SYMBOL GREGORIAN F CLEF;So;0;L;;;;;N;;;;;
+ 1D1D2;MUSICAL SYMBOL SQUARE B;So;0;L;;;;;N;;;;;
+ 1D1D3;MUSICAL SYMBOL VIRGA;So;0;L;;;;;N;;;;;
+ 1D1D4;MUSICAL SYMBOL PODATUS;So;0;L;;;;;N;;;;;
+ 1D1D5;MUSICAL SYMBOL CLIVIS;So;0;L;;;;;N;;;;;
+ 1D1D6;MUSICAL SYMBOL SCANDICUS;So;0;L;;;;;N;;;;;
+ 1D1D7;MUSICAL SYMBOL CLIMACUS;So;0;L;;;;;N;;;;;
+ 1D1D8;MUSICAL SYMBOL TORCULUS;So;0;L;;;;;N;;;;;
+ 1D1D9;MUSICAL SYMBOL PORRECTUS;So;0;L;;;;;N;;;;;
+ 1D1DA;MUSICAL SYMBOL PORRECTUS FLEXUS;So;0;L;;;;;N;;;;;
+ 1D1DB;MUSICAL SYMBOL SCANDICUS FLEXUS;So;0;L;;;;;N;;;;;
+ 1D1DC;MUSICAL SYMBOL TORCULUS RESUPINUS;So;0;L;;;;;N;;;;;
+ 1D1DD;MUSICAL SYMBOL PES SUBPUNCTIS;So;0;L;;;;;N;;;;;
+ 1D1DE;MUSICAL SYMBOL KIEVAN C CLEF;So;0;L;;;;;N;;;;;
+ 1D1DF;MUSICAL SYMBOL KIEVAN END OF PIECE;So;0;L;;;;;N;;;;;
+ 1D1E0;MUSICAL SYMBOL KIEVAN FINAL NOTE;So;0;L;;;;;N;;;;;
+ 1D1E1;MUSICAL SYMBOL KIEVAN RECITATIVE MARK;So;0;L;;;;;N;;;;;
+ 1D1E2;MUSICAL SYMBOL KIEVAN WHOLE NOTE;So;0;L;;;;;N;;;;;
+ 1D1E3;MUSICAL SYMBOL KIEVAN HALF NOTE;So;0;L;;;;;N;;;;;
+ 1D1E4;MUSICAL SYMBOL KIEVAN QUARTER NOTE STEM DOWN;So;0;L;;;;;N;;;;;
+ 1D1E5;MUSICAL SYMBOL KIEVAN QUARTER NOTE STEM UP;So;0;L;;;;;N;;;;;
+ 1D1E6;MUSICAL SYMBOL KIEVAN EIGHTH NOTE STEM DOWN;So;0;L;;;;;N;;;;;
+ 1D1E7;MUSICAL SYMBOL KIEVAN EIGHTH NOTE STEM UP;So;0;L;;;;;N;;;;;
+ 1D1E8;MUSICAL SYMBOL KIEVAN FLAT SIGN;So;0;L;;;;;N;;;;;
+ 1D200;GREEK VOCAL NOTATION SYMBOL-1;So;0;ON;;;;;N;;;;;
+ 1D201;GREEK VOCAL NOTATION SYMBOL-2;So;0;ON;;;;;N;;;;;
+ 1D202;GREEK VOCAL NOTATION SYMBOL-3;So;0;ON;;;;;N;;;;;
+ 1D203;GREEK VOCAL NOTATION SYMBOL-4;So;0;ON;;;;;N;;;;;
+ 1D204;GREEK VOCAL NOTATION SYMBOL-5;So;0;ON;;;;;N;;;;;
+ 1D205;GREEK VOCAL NOTATION SYMBOL-6;So;0;ON;;;;;N;;;;;
+ 1D206;GREEK VOCAL NOTATION SYMBOL-7;So;0;ON;;;;;N;;;;;
+ 1D207;GREEK VOCAL NOTATION SYMBOL-8;So;0;ON;;;;;N;;;;;
+ 1D208;GREEK VOCAL NOTATION SYMBOL-9;So;0;ON;;;;;N;;;;;
+ 1D209;GREEK VOCAL NOTATION SYMBOL-10;So;0;ON;;;;;N;;;;;
+ 1D20A;GREEK VOCAL NOTATION SYMBOL-11;So;0;ON;;;;;N;;;;;
+ 1D20B;GREEK VOCAL NOTATION SYMBOL-12;So;0;ON;;;;;N;;;;;
+ 1D20C;GREEK VOCAL NOTATION SYMBOL-13;So;0;ON;;;;;N;;;;;
+ 1D20D;GREEK VOCAL NOTATION SYMBOL-14;So;0;ON;;;;;N;;;;;
+ 1D20E;GREEK VOCAL NOTATION SYMBOL-15;So;0;ON;;;;;N;;;;;
+ 1D20F;GREEK VOCAL NOTATION SYMBOL-16;So;0;ON;;;;;N;;;;;
+ 1D210;GREEK VOCAL NOTATION SYMBOL-17;So;0;ON;;;;;N;;;;;
+ 1D211;GREEK VOCAL NOTATION SYMBOL-18;So;0;ON;;;;;N;;;;;
+ 1D212;GREEK VOCAL NOTATION SYMBOL-19;So;0;ON;;;;;N;;;;;
+ 1D213;GREEK VOCAL NOTATION SYMBOL-20;So;0;ON;;;;;N;;;;;
+ 1D214;GREEK VOCAL NOTATION SYMBOL-21;So;0;ON;;;;;N;;;;;
+ 1D215;GREEK VOCAL NOTATION SYMBOL-22;So;0;ON;;;;;N;;;;;
+ 1D216;GREEK VOCAL NOTATION SYMBOL-23;So;0;ON;;;;;N;;;;;
+ 1D217;GREEK VOCAL NOTATION SYMBOL-24;So;0;ON;;;;;N;;;;;
+ 1D218;GREEK VOCAL NOTATION SYMBOL-50;So;0;ON;;;;;N;;;;;
+ 1D219;GREEK VOCAL NOTATION SYMBOL-51;So;0;ON;;;;;N;;;;;
+ 1D21A;GREEK VOCAL NOTATION SYMBOL-52;So;0;ON;;;;;N;;;;;
+ 1D21B;GREEK VOCAL NOTATION SYMBOL-53;So;0;ON;;;;;N;;;;;
+ 1D21C;GREEK VOCAL NOTATION SYMBOL-54;So;0;ON;;;;;N;;;;;
+ 1D21D;GREEK INSTRUMENTAL NOTATION SYMBOL-1;So;0;ON;;;;;N;;;;;
+ 1D21E;GREEK INSTRUMENTAL NOTATION SYMBOL-2;So;0;ON;;;;;N;;;;;
+ 1D21F;GREEK INSTRUMENTAL NOTATION SYMBOL-4;So;0;ON;;;;;N;;;;;
+ 1D220;GREEK INSTRUMENTAL NOTATION SYMBOL-5;So;0;ON;;;;;N;;;;;
+ 1D221;GREEK INSTRUMENTAL NOTATION SYMBOL-7;So;0;ON;;;;;N;;;;;
+ 1D222;GREEK INSTRUMENTAL NOTATION SYMBOL-8;So;0;ON;;;;;N;;;;;
+ 1D223;GREEK INSTRUMENTAL NOTATION SYMBOL-11;So;0;ON;;;;;N;;;;;
+ 1D224;GREEK INSTRUMENTAL NOTATION SYMBOL-12;So;0;ON;;;;;N;;;;;
+ 1D225;GREEK INSTRUMENTAL NOTATION SYMBOL-13;So;0;ON;;;;;N;;;;;
+ 1D226;GREEK INSTRUMENTAL NOTATION SYMBOL-14;So;0;ON;;;;;N;;;;;
+ 1D227;GREEK INSTRUMENTAL NOTATION SYMBOL-17;So;0;ON;;;;;N;;;;;
+ 1D228;GREEK INSTRUMENTAL NOTATION SYMBOL-18;So;0;ON;;;;;N;;;;;
+ 1D229;GREEK INSTRUMENTAL NOTATION SYMBOL-19;So;0;ON;;;;;N;;;;;
+ 1D22A;GREEK INSTRUMENTAL NOTATION SYMBOL-23;So;0;ON;;;;;N;;;;;
+ 1D22B;GREEK INSTRUMENTAL NOTATION SYMBOL-24;So;0;ON;;;;;N;;;;;
+ 1D22C;GREEK INSTRUMENTAL NOTATION SYMBOL-25;So;0;ON;;;;;N;;;;;
+ 1D22D;GREEK INSTRUMENTAL NOTATION SYMBOL-26;So;0;ON;;;;;N;;;;;
+ 1D22E;GREEK INSTRUMENTAL NOTATION SYMBOL-27;So;0;ON;;;;;N;;;;;
+ 1D22F;GREEK INSTRUMENTAL NOTATION SYMBOL-29;So;0;ON;;;;;N;;;;;
+ 1D230;GREEK INSTRUMENTAL NOTATION SYMBOL-30;So;0;ON;;;;;N;;;;;
+ 1D231;GREEK INSTRUMENTAL NOTATION SYMBOL-32;So;0;ON;;;;;N;;;;;
+ 1D232;GREEK INSTRUMENTAL NOTATION SYMBOL-36;So;0;ON;;;;;N;;;;;
+ 1D233;GREEK INSTRUMENTAL NOTATION SYMBOL-37;So;0;ON;;;;;N;;;;;
+ 1D234;GREEK INSTRUMENTAL NOTATION SYMBOL-38;So;0;ON;;;;;N;;;;;
+ 1D235;GREEK INSTRUMENTAL NOTATION SYMBOL-39;So;0;ON;;;;;N;;;;;
+ 1D236;GREEK INSTRUMENTAL NOTATION SYMBOL-40;So;0;ON;;;;;N;;;;;
+ 1D237;GREEK INSTRUMENTAL NOTATION SYMBOL-42;So;0;ON;;;;;N;;;;;
+ 1D238;GREEK INSTRUMENTAL NOTATION SYMBOL-43;So;0;ON;;;;;N;;;;;
+ 1D239;GREEK INSTRUMENTAL NOTATION SYMBOL-45;So;0;ON;;;;;N;;;;;
+ 1D23A;GREEK INSTRUMENTAL NOTATION SYMBOL-47;So;0;ON;;;;;N;;;;;
+ 1D23B;GREEK INSTRUMENTAL NOTATION SYMBOL-48;So;0;ON;;;;;N;;;;;
+ 1D23C;GREEK INSTRUMENTAL NOTATION SYMBOL-49;So;0;ON;;;;;N;;;;;
+ 1D23D;GREEK INSTRUMENTAL NOTATION SYMBOL-50;So;0;ON;;;;;N;;;;;
+ 1D23E;GREEK INSTRUMENTAL NOTATION SYMBOL-51;So;0;ON;;;;;N;;;;;
+ 1D23F;GREEK INSTRUMENTAL NOTATION SYMBOL-52;So;0;ON;;;;;N;;;;;
+ 1D240;GREEK INSTRUMENTAL NOTATION SYMBOL-53;So;0;ON;;;;;N;;;;;
+ 1D241;GREEK INSTRUMENTAL NOTATION SYMBOL-54;So;0;ON;;;;;N;;;;;
+ 1D242;COMBINING GREEK MUSICAL TRISEME;Mn;230;NSM;;;;;N;;;;;
+ 1D243;COMBINING GREEK MUSICAL TETRASEME;Mn;230;NSM;;;;;N;;;;;
+ 1D244;COMBINING GREEK MUSICAL PENTASEME;Mn;230;NSM;;;;;N;;;;;
+ 1D245;GREEK MUSICAL LEIMMA;So;0;ON;;;;;N;;;;;
+ 1D2E0;MAYAN NUMERAL ZERO;No;0;L;;;;0;N;;;;;
+ 1D2E1;MAYAN NUMERAL ONE;No;0;L;;;;1;N;;;;;
+ 1D2E2;MAYAN NUMERAL TWO;No;0;L;;;;2;N;;;;;
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+ 1D489;MATHEMATICAL BOLD ITALIC SMALL H;Ll;0;L;<font> 0068;;;;N;;;;;
+ 1D48A;MATHEMATICAL BOLD ITALIC SMALL I;Ll;0;L;<font> 0069;;;;N;;;;;
+ 1D48B;MATHEMATICAL BOLD ITALIC SMALL J;Ll;0;L;<font> 006A;;;;N;;;;;
+ 1D48C;MATHEMATICAL BOLD ITALIC SMALL K;Ll;0;L;<font> 006B;;;;N;;;;;
+ 1D48D;MATHEMATICAL BOLD ITALIC SMALL L;Ll;0;L;<font> 006C;;;;N;;;;;
+ 1D48E;MATHEMATICAL BOLD ITALIC SMALL M;Ll;0;L;<font> 006D;;;;N;;;;;
+ 1D48F;MATHEMATICAL BOLD ITALIC SMALL N;Ll;0;L;<font> 006E;;;;N;;;;;
+ 1D490;MATHEMATICAL BOLD ITALIC SMALL O;Ll;0;L;<font> 006F;;;;N;;;;;
+ 1D491;MATHEMATICAL BOLD ITALIC SMALL P;Ll;0;L;<font> 0070;;;;N;;;;;
+ 1D492;MATHEMATICAL BOLD ITALIC SMALL Q;Ll;0;L;<font> 0071;;;;N;;;;;
+ 1D493;MATHEMATICAL BOLD ITALIC SMALL R;Ll;0;L;<font> 0072;;;;N;;;;;
+ 1D494;MATHEMATICAL BOLD ITALIC SMALL S;Ll;0;L;<font> 0073;;;;N;;;;;
+ 1D495;MATHEMATICAL BOLD ITALIC SMALL T;Ll;0;L;<font> 0074;;;;N;;;;;
+ 1D496;MATHEMATICAL BOLD ITALIC SMALL U;Ll;0;L;<font> 0075;;;;N;;;;;
+ 1D497;MATHEMATICAL BOLD ITALIC SMALL V;Ll;0;L;<font> 0076;;;;N;;;;;
+ 1D498;MATHEMATICAL BOLD ITALIC SMALL W;Ll;0;L;<font> 0077;;;;N;;;;;
+ 1D499;MATHEMATICAL BOLD ITALIC SMALL X;Ll;0;L;<font> 0078;;;;N;;;;;
+ 1D49A;MATHEMATICAL BOLD ITALIC SMALL Y;Ll;0;L;<font> 0079;;;;N;;;;;
+ 1D49B;MATHEMATICAL BOLD ITALIC SMALL Z;Ll;0;L;<font> 007A;;;;N;;;;;
+ 1D49C;MATHEMATICAL SCRIPT CAPITAL A;Lu;0;L;<font> 0041;;;;N;;;;;
+ 1D49E;MATHEMATICAL SCRIPT CAPITAL C;Lu;0;L;<font> 0043;;;;N;;;;;
+ 1D49F;MATHEMATICAL SCRIPT CAPITAL D;Lu;0;L;<font> 0044;;;;N;;;;;
+ 1D4A2;MATHEMATICAL SCRIPT CAPITAL G;Lu;0;L;<font> 0047;;;;N;;;;;
+ 1D4A5;MATHEMATICAL SCRIPT CAPITAL J;Lu;0;L;<font> 004A;;;;N;;;;;
+ 1D4A6;MATHEMATICAL SCRIPT CAPITAL K;Lu;0;L;<font> 004B;;;;N;;;;;
+ 1D4A9;MATHEMATICAL SCRIPT CAPITAL N;Lu;0;L;<font> 004E;;;;N;;;;;
+ 1D4AA;MATHEMATICAL SCRIPT CAPITAL O;Lu;0;L;<font> 004F;;;;N;;;;;
+ 1D4AB;MATHEMATICAL SCRIPT CAPITAL P;Lu;0;L;<font> 0050;;;;N;;;;;
+ 1D4AC;MATHEMATICAL SCRIPT CAPITAL Q;Lu;0;L;<font> 0051;;;;N;;;;;
+ 1D4AE;MATHEMATICAL SCRIPT CAPITAL S;Lu;0;L;<font> 0053;;;;N;;;;;
+ 1D4AF;MATHEMATICAL SCRIPT CAPITAL T;Lu;0;L;<font> 0054;;;;N;;;;;
+ 1D4B0;MATHEMATICAL SCRIPT CAPITAL U;Lu;0;L;<font> 0055;;;;N;;;;;
+ 1D4B1;MATHEMATICAL SCRIPT CAPITAL V;Lu;0;L;<font> 0056;;;;N;;;;;
+ 1D4B2;MATHEMATICAL SCRIPT CAPITAL W;Lu;0;L;<font> 0057;;;;N;;;;;
+ 1D4B3;MATHEMATICAL SCRIPT CAPITAL X;Lu;0;L;<font> 0058;;;;N;;;;;
+ 1D4B4;MATHEMATICAL SCRIPT CAPITAL Y;Lu;0;L;<font> 0059;;;;N;;;;;
+ 1D4B5;MATHEMATICAL SCRIPT CAPITAL Z;Lu;0;L;<font> 005A;;;;N;;;;;
+ 1D4B6;MATHEMATICAL SCRIPT SMALL A;Ll;0;L;<font> 0061;;;;N;;;;;
+ 1D4B7;MATHEMATICAL SCRIPT SMALL B;Ll;0;L;<font> 0062;;;;N;;;;;
+ 1D4B8;MATHEMATICAL SCRIPT SMALL C;Ll;0;L;<font> 0063;;;;N;;;;;
+ 1D4B9;MATHEMATICAL SCRIPT SMALL D;Ll;0;L;<font> 0064;;;;N;;;;;
+ 1D4BB;MATHEMATICAL SCRIPT SMALL F;Ll;0;L;<font> 0066;;;;N;;;;;
+ 1D4BD;MATHEMATICAL SCRIPT SMALL H;Ll;0;L;<font> 0068;;;;N;;;;;
+ 1D4BE;MATHEMATICAL SCRIPT SMALL I;Ll;0;L;<font> 0069;;;;N;;;;;
+ 1D4BF;MATHEMATICAL SCRIPT SMALL J;Ll;0;L;<font> 006A;;;;N;;;;;
+ 1D4C0;MATHEMATICAL SCRIPT SMALL K;Ll;0;L;<font> 006B;;;;N;;;;;
+ 1D4C1;MATHEMATICAL SCRIPT SMALL L;Ll;0;L;<font> 006C;;;;N;;;;;
+ 1D4C2;MATHEMATICAL SCRIPT SMALL M;Ll;0;L;<font> 006D;;;;N;;;;;
+ 1D4C3;MATHEMATICAL SCRIPT SMALL N;Ll;0;L;<font> 006E;;;;N;;;;;
+ 1D4C5;MATHEMATICAL SCRIPT SMALL P;Ll;0;L;<font> 0070;;;;N;;;;;
+ 1D4C6;MATHEMATICAL SCRIPT SMALL Q;Ll;0;L;<font> 0071;;;;N;;;;;
+ 1D4C7;MATHEMATICAL SCRIPT SMALL R;Ll;0;L;<font> 0072;;;;N;;;;;
+ 1D4C8;MATHEMATICAL SCRIPT SMALL S;Ll;0;L;<font> 0073;;;;N;;;;;
+ 1D4C9;MATHEMATICAL SCRIPT SMALL T;Ll;0;L;<font> 0074;;;;N;;;;;
+ 1D4CA;MATHEMATICAL SCRIPT SMALL U;Ll;0;L;<font> 0075;;;;N;;;;;
+ 1D4CB;MATHEMATICAL SCRIPT SMALL V;Ll;0;L;<font> 0076;;;;N;;;;;
+ 1D4CC;MATHEMATICAL SCRIPT SMALL W;Ll;0;L;<font> 0077;;;;N;;;;;
+ 1D4CD;MATHEMATICAL SCRIPT SMALL X;Ll;0;L;<font> 0078;;;;N;;;;;
+ 1D4CE;MATHEMATICAL SCRIPT SMALL Y;Ll;0;L;<font> 0079;;;;N;;;;;
+ 1D4CF;MATHEMATICAL SCRIPT SMALL Z;Ll;0;L;<font> 007A;;;;N;;;;;
+ 1D4D0;MATHEMATICAL BOLD SCRIPT CAPITAL A;Lu;0;L;<font> 0041;;;;N;;;;;
+ 1D4D1;MATHEMATICAL BOLD SCRIPT CAPITAL B;Lu;0;L;<font> 0042;;;;N;;;;;
+ 1D4D2;MATHEMATICAL BOLD SCRIPT CAPITAL C;Lu;0;L;<font> 0043;;;;N;;;;;
+ 1D4D3;MATHEMATICAL BOLD SCRIPT CAPITAL D;Lu;0;L;<font> 0044;;;;N;;;;;
+ 1D4D4;MATHEMATICAL BOLD SCRIPT CAPITAL E;Lu;0;L;<font> 0045;;;;N;;;;;
+ 1D4D5;MATHEMATICAL BOLD SCRIPT CAPITAL F;Lu;0;L;<font> 0046;;;;N;;;;;
+ 1D4D6;MATHEMATICAL BOLD SCRIPT CAPITAL G;Lu;0;L;<font> 0047;;;;N;;;;;
+ 1D4D7;MATHEMATICAL BOLD SCRIPT CAPITAL H;Lu;0;L;<font> 0048;;;;N;;;;;
+ 1D4D8;MATHEMATICAL BOLD SCRIPT CAPITAL I;Lu;0;L;<font> 0049;;;;N;;;;;
+ 1D4D9;MATHEMATICAL BOLD SCRIPT CAPITAL J;Lu;0;L;<font> 004A;;;;N;;;;;
+ 1D4DA;MATHEMATICAL BOLD SCRIPT CAPITAL K;Lu;0;L;<font> 004B;;;;N;;;;;
+ 1D4DB;MATHEMATICAL BOLD SCRIPT CAPITAL L;Lu;0;L;<font> 004C;;;;N;;;;;
+ 1D4DC;MATHEMATICAL BOLD SCRIPT CAPITAL M;Lu;0;L;<font> 004D;;;;N;;;;;
+ 1D4DD;MATHEMATICAL BOLD SCRIPT CAPITAL N;Lu;0;L;<font> 004E;;;;N;;;;;
+ 1D4DE;MATHEMATICAL BOLD SCRIPT CAPITAL O;Lu;0;L;<font> 004F;;;;N;;;;;
+ 1D4DF;MATHEMATICAL BOLD SCRIPT CAPITAL P;Lu;0;L;<font> 0050;;;;N;;;;;
+ 1D4E0;MATHEMATICAL BOLD SCRIPT CAPITAL Q;Lu;0;L;<font> 0051;;;;N;;;;;
+ 1D4E1;MATHEMATICAL BOLD SCRIPT CAPITAL R;Lu;0;L;<font> 0052;;;;N;;;;;
+ 1D4E2;MATHEMATICAL BOLD SCRIPT CAPITAL S;Lu;0;L;<font> 0053;;;;N;;;;;
+ 1D4E3;MATHEMATICAL BOLD SCRIPT CAPITAL T;Lu;0;L;<font> 0054;;;;N;;;;;
+ 1D4E4;MATHEMATICAL BOLD SCRIPT CAPITAL U;Lu;0;L;<font> 0055;;;;N;;;;;
+ 1D4E5;MATHEMATICAL BOLD SCRIPT CAPITAL V;Lu;0;L;<font> 0056;;;;N;;;;;
+ 1D4E6;MATHEMATICAL BOLD SCRIPT CAPITAL W;Lu;0;L;<font> 0057;;;;N;;;;;
+ 1D4E7;MATHEMATICAL BOLD SCRIPT CAPITAL X;Lu;0;L;<font> 0058;;;;N;;;;;
+ 1D4E8;MATHEMATICAL BOLD SCRIPT CAPITAL Y;Lu;0;L;<font> 0059;;;;N;;;;;
+ 1D4E9;MATHEMATICAL BOLD SCRIPT CAPITAL Z;Lu;0;L;<font> 005A;;;;N;;;;;
+ 1D4EA;MATHEMATICAL BOLD SCRIPT SMALL A;Ll;0;L;<font> 0061;;;;N;;;;;
+ 1D4EB;MATHEMATICAL BOLD SCRIPT SMALL B;Ll;0;L;<font> 0062;;;;N;;;;;
+ 1D4EC;MATHEMATICAL BOLD SCRIPT SMALL C;Ll;0;L;<font> 0063;;;;N;;;;;
+ 1D4ED;MATHEMATICAL BOLD SCRIPT SMALL D;Ll;0;L;<font> 0064;;;;N;;;;;
+ 1D4EE;MATHEMATICAL BOLD SCRIPT SMALL E;Ll;0;L;<font> 0065;;;;N;;;;;
+ 1D4EF;MATHEMATICAL BOLD SCRIPT SMALL F;Ll;0;L;<font> 0066;;;;N;;;;;
+ 1D4F0;MATHEMATICAL BOLD SCRIPT SMALL G;Ll;0;L;<font> 0067;;;;N;;;;;
+ 1D4F1;MATHEMATICAL BOLD SCRIPT SMALL H;Ll;0;L;<font> 0068;;;;N;;;;;
+ 1D4F2;MATHEMATICAL BOLD SCRIPT SMALL I;Ll;0;L;<font> 0069;;;;N;;;;;
+ 1D4F3;MATHEMATICAL BOLD SCRIPT SMALL J;Ll;0;L;<font> 006A;;;;N;;;;;
+ 1D4F4;MATHEMATICAL BOLD SCRIPT SMALL K;Ll;0;L;<font> 006B;;;;N;;;;;
+ 1D4F5;MATHEMATICAL BOLD SCRIPT SMALL L;Ll;0;L;<font> 006C;;;;N;;;;;
+ 1D4F6;MATHEMATICAL BOLD SCRIPT SMALL M;Ll;0;L;<font> 006D;;;;N;;;;;
+ 1D4F7;MATHEMATICAL BOLD SCRIPT SMALL N;Ll;0;L;<font> 006E;;;;N;;;;;
+ 1D4F8;MATHEMATICAL BOLD SCRIPT SMALL O;Ll;0;L;<font> 006F;;;;N;;;;;
+ 1D4F9;MATHEMATICAL BOLD SCRIPT SMALL P;Ll;0;L;<font> 0070;;;;N;;;;;
+ 1D4FA;MATHEMATICAL BOLD SCRIPT SMALL Q;Ll;0;L;<font> 0071;;;;N;;;;;
+ 1D4FB;MATHEMATICAL BOLD SCRIPT SMALL R;Ll;0;L;<font> 0072;;;;N;;;;;
+ 1D4FC;MATHEMATICAL BOLD SCRIPT SMALL S;Ll;0;L;<font> 0073;;;;N;;;;;
+ 1D4FD;MATHEMATICAL BOLD SCRIPT SMALL T;Ll;0;L;<font> 0074;;;;N;;;;;
+ 1D4FE;MATHEMATICAL BOLD SCRIPT SMALL U;Ll;0;L;<font> 0075;;;;N;;;;;
+ 1D4FF;MATHEMATICAL BOLD SCRIPT SMALL V;Ll;0;L;<font> 0076;;;;N;;;;;
+ 1D500;MATHEMATICAL BOLD SCRIPT SMALL W;Ll;0;L;<font> 0077;;;;N;;;;;
+ 1D501;MATHEMATICAL BOLD SCRIPT SMALL X;Ll;0;L;<font> 0078;;;;N;;;;;
+ 1D502;MATHEMATICAL BOLD SCRIPT SMALL Y;Ll;0;L;<font> 0079;;;;N;;;;;
+ 1D503;MATHEMATICAL BOLD SCRIPT SMALL Z;Ll;0;L;<font> 007A;;;;N;;;;;
+ 1D504;MATHEMATICAL FRAKTUR CAPITAL A;Lu;0;L;<font> 0041;;;;N;;;;;
+ 1D505;MATHEMATICAL FRAKTUR CAPITAL B;Lu;0;L;<font> 0042;;;;N;;;;;
+ 1D507;MATHEMATICAL FRAKTUR CAPITAL D;Lu;0;L;<font> 0044;;;;N;;;;;
+ 1D508;MATHEMATICAL FRAKTUR CAPITAL E;Lu;0;L;<font> 0045;;;;N;;;;;
+ 1D509;MATHEMATICAL FRAKTUR CAPITAL F;Lu;0;L;<font> 0046;;;;N;;;;;
+ 1D50A;MATHEMATICAL FRAKTUR CAPITAL G;Lu;0;L;<font> 0047;;;;N;;;;;
+ 1D50D;MATHEMATICAL FRAKTUR CAPITAL J;Lu;0;L;<font> 004A;;;;N;;;;;
+ 1D50E;MATHEMATICAL FRAKTUR CAPITAL K;Lu;0;L;<font> 004B;;;;N;;;;;
+ 1D50F;MATHEMATICAL FRAKTUR CAPITAL L;Lu;0;L;<font> 004C;;;;N;;;;;
+ 1D510;MATHEMATICAL FRAKTUR CAPITAL M;Lu;0;L;<font> 004D;;;;N;;;;;
+ 1D511;MATHEMATICAL FRAKTUR CAPITAL N;Lu;0;L;<font> 004E;;;;N;;;;;
+ 1D512;MATHEMATICAL FRAKTUR CAPITAL O;Lu;0;L;<font> 004F;;;;N;;;;;
+ 1D513;MATHEMATICAL FRAKTUR CAPITAL P;Lu;0;L;<font> 0050;;;;N;;;;;
+ 1D514;MATHEMATICAL FRAKTUR CAPITAL Q;Lu;0;L;<font> 0051;;;;N;;;;;
+ 1D516;MATHEMATICAL FRAKTUR CAPITAL S;Lu;0;L;<font> 0053;;;;N;;;;;
+ 1D517;MATHEMATICAL FRAKTUR CAPITAL T;Lu;0;L;<font> 0054;;;;N;;;;;
+ 1D518;MATHEMATICAL FRAKTUR CAPITAL U;Lu;0;L;<font> 0055;;;;N;;;;;
+ 1D519;MATHEMATICAL FRAKTUR CAPITAL V;Lu;0;L;<font> 0056;;;;N;;;;;
+ 1D51A;MATHEMATICAL FRAKTUR CAPITAL W;Lu;0;L;<font> 0057;;;;N;;;;;
+ 1D51B;MATHEMATICAL FRAKTUR CAPITAL X;Lu;0;L;<font> 0058;;;;N;;;;;
+ 1D51C;MATHEMATICAL FRAKTUR CAPITAL Y;Lu;0;L;<font> 0059;;;;N;;;;;
+ 1D51E;MATHEMATICAL FRAKTUR SMALL A;Ll;0;L;<font> 0061;;;;N;;;;;
+ 1D51F;MATHEMATICAL FRAKTUR SMALL B;Ll;0;L;<font> 0062;;;;N;;;;;
+ 1D520;MATHEMATICAL FRAKTUR SMALL C;Ll;0;L;<font> 0063;;;;N;;;;;
+ 1D521;MATHEMATICAL FRAKTUR SMALL D;Ll;0;L;<font> 0064;;;;N;;;;;
+ 1D522;MATHEMATICAL FRAKTUR SMALL E;Ll;0;L;<font> 0065;;;;N;;;;;
+ 1D523;MATHEMATICAL FRAKTUR SMALL F;Ll;0;L;<font> 0066;;;;N;;;;;
+ 1D524;MATHEMATICAL FRAKTUR SMALL G;Ll;0;L;<font> 0067;;;;N;;;;;
+ 1D525;MATHEMATICAL FRAKTUR SMALL H;Ll;0;L;<font> 0068;;;;N;;;;;
+ 1D526;MATHEMATICAL FRAKTUR SMALL I;Ll;0;L;<font> 0069;;;;N;;;;;
+ 1D527;MATHEMATICAL FRAKTUR SMALL J;Ll;0;L;<font> 006A;;;;N;;;;;
+ 1D528;MATHEMATICAL FRAKTUR SMALL K;Ll;0;L;<font> 006B;;;;N;;;;;
+ 1D529;MATHEMATICAL FRAKTUR SMALL L;Ll;0;L;<font> 006C;;;;N;;;;;
+ 1D52A;MATHEMATICAL FRAKTUR SMALL M;Ll;0;L;<font> 006D;;;;N;;;;;
+ 1D52B;MATHEMATICAL FRAKTUR SMALL N;Ll;0;L;<font> 006E;;;;N;;;;;
+ 1D52C;MATHEMATICAL FRAKTUR SMALL O;Ll;0;L;<font> 006F;;;;N;;;;;
+ 1D52D;MATHEMATICAL FRAKTUR SMALL P;Ll;0;L;<font> 0070;;;;N;;;;;
+ 1D52E;MATHEMATICAL FRAKTUR SMALL Q;Ll;0;L;<font> 0071;;;;N;;;;;
+ 1D52F;MATHEMATICAL FRAKTUR SMALL R;Ll;0;L;<font> 0072;;;;N;;;;;
+ 1D530;MATHEMATICAL FRAKTUR SMALL S;Ll;0;L;<font> 0073;;;;N;;;;;
+ 1D531;MATHEMATICAL FRAKTUR SMALL T;Ll;0;L;<font> 0074;;;;N;;;;;
+ 1D532;MATHEMATICAL FRAKTUR SMALL U;Ll;0;L;<font> 0075;;;;N;;;;;
+ 1D533;MATHEMATICAL FRAKTUR SMALL V;Ll;0;L;<font> 0076;;;;N;;;;;
+ 1D534;MATHEMATICAL FRAKTUR SMALL W;Ll;0;L;<font> 0077;;;;N;;;;;
+ 1D535;MATHEMATICAL FRAKTUR SMALL X;Ll;0;L;<font> 0078;;;;N;;;;;
+ 1D536;MATHEMATICAL FRAKTUR SMALL Y;Ll;0;L;<font> 0079;;;;N;;;;;
+ 1D537;MATHEMATICAL FRAKTUR SMALL Z;Ll;0;L;<font> 007A;;;;N;;;;;
+ 1D538;MATHEMATICAL DOUBLE-STRUCK CAPITAL A;Lu;0;L;<font> 0041;;;;N;;;;;
+ 1D539;MATHEMATICAL DOUBLE-STRUCK CAPITAL B;Lu;0;L;<font> 0042;;;;N;;;;;
+ 1D53B;MATHEMATICAL DOUBLE-STRUCK CAPITAL D;Lu;0;L;<font> 0044;;;;N;;;;;
+ 1D53C;MATHEMATICAL DOUBLE-STRUCK CAPITAL E;Lu;0;L;<font> 0045;;;;N;;;;;
+ 1D53D;MATHEMATICAL DOUBLE-STRUCK CAPITAL F;Lu;0;L;<font> 0046;;;;N;;;;;
+ 1D53E;MATHEMATICAL DOUBLE-STRUCK CAPITAL G;Lu;0;L;<font> 0047;;;;N;;;;;
+ 1D540;MATHEMATICAL DOUBLE-STRUCK CAPITAL I;Lu;0;L;<font> 0049;;;;N;;;;;
+ 1D541;MATHEMATICAL DOUBLE-STRUCK CAPITAL J;Lu;0;L;<font> 004A;;;;N;;;;;
+ 1D542;MATHEMATICAL DOUBLE-STRUCK CAPITAL K;Lu;0;L;<font> 004B;;;;N;;;;;
+ 1D543;MATHEMATICAL DOUBLE-STRUCK CAPITAL L;Lu;0;L;<font> 004C;;;;N;;;;;
+ 1D544;MATHEMATICAL DOUBLE-STRUCK CAPITAL M;Lu;0;L;<font> 004D;;;;N;;;;;
+ 1D546;MATHEMATICAL DOUBLE-STRUCK CAPITAL O;Lu;0;L;<font> 004F;;;;N;;;;;
+ 1D54A;MATHEMATICAL DOUBLE-STRUCK CAPITAL S;Lu;0;L;<font> 0053;;;;N;;;;;
+ 1D54B;MATHEMATICAL DOUBLE-STRUCK CAPITAL T;Lu;0;L;<font> 0054;;;;N;;;;;
+ 1D54C;MATHEMATICAL DOUBLE-STRUCK CAPITAL U;Lu;0;L;<font> 0055;;;;N;;;;;
+ 1D54D;MATHEMATICAL DOUBLE-STRUCK CAPITAL V;Lu;0;L;<font> 0056;;;;N;;;;;
+ 1D54E;MATHEMATICAL DOUBLE-STRUCK CAPITAL W;Lu;0;L;<font> 0057;;;;N;;;;;
+ 1D54F;MATHEMATICAL DOUBLE-STRUCK CAPITAL X;Lu;0;L;<font> 0058;;;;N;;;;;
+ 1D550;MATHEMATICAL DOUBLE-STRUCK CAPITAL Y;Lu;0;L;<font> 0059;;;;N;;;;;
+ 1D552;MATHEMATICAL DOUBLE-STRUCK SMALL A;Ll;0;L;<font> 0061;;;;N;;;;;
+ 1D553;MATHEMATICAL DOUBLE-STRUCK SMALL B;Ll;0;L;<font> 0062;;;;N;;;;;
+ 1D554;MATHEMATICAL DOUBLE-STRUCK SMALL C;Ll;0;L;<font> 0063;;;;N;;;;;
+ 1D555;MATHEMATICAL DOUBLE-STRUCK SMALL D;Ll;0;L;<font> 0064;;;;N;;;;;
+ 1D556;MATHEMATICAL DOUBLE-STRUCK SMALL E;Ll;0;L;<font> 0065;;;;N;;;;;
+ 1D557;MATHEMATICAL DOUBLE-STRUCK SMALL F;Ll;0;L;<font> 0066;;;;N;;;;;
+ 1D558;MATHEMATICAL DOUBLE-STRUCK SMALL G;Ll;0;L;<font> 0067;;;;N;;;;;
+ 1D559;MATHEMATICAL DOUBLE-STRUCK SMALL H;Ll;0;L;<font> 0068;;;;N;;;;;
+ 1D55A;MATHEMATICAL DOUBLE-STRUCK SMALL I;Ll;0;L;<font> 0069;;;;N;;;;;
+ 1D55B;MATHEMATICAL DOUBLE-STRUCK SMALL J;Ll;0;L;<font> 006A;;;;N;;;;;
+ 1D55C;MATHEMATICAL DOUBLE-STRUCK SMALL K;Ll;0;L;<font> 006B;;;;N;;;;;
+ 1D55D;MATHEMATICAL DOUBLE-STRUCK SMALL L;Ll;0;L;<font> 006C;;;;N;;;;;
+ 1D55E;MATHEMATICAL DOUBLE-STRUCK SMALL M;Ll;0;L;<font> 006D;;;;N;;;;;
+ 1D55F;MATHEMATICAL DOUBLE-STRUCK SMALL N;Ll;0;L;<font> 006E;;;;N;;;;;
+ 1D560;MATHEMATICAL DOUBLE-STRUCK SMALL O;Ll;0;L;<font> 006F;;;;N;;;;;
+ 1D561;MATHEMATICAL DOUBLE-STRUCK SMALL P;Ll;0;L;<font> 0070;;;;N;;;;;
+ 1D562;MATHEMATICAL DOUBLE-STRUCK SMALL Q;Ll;0;L;<font> 0071;;;;N;;;;;
+ 1D563;MATHEMATICAL DOUBLE-STRUCK SMALL R;Ll;0;L;<font> 0072;;;;N;;;;;
+ 1D564;MATHEMATICAL DOUBLE-STRUCK SMALL S;Ll;0;L;<font> 0073;;;;N;;;;;
+ 1D565;MATHEMATICAL DOUBLE-STRUCK SMALL T;Ll;0;L;<font> 0074;;;;N;;;;;
+ 1D566;MATHEMATICAL DOUBLE-STRUCK SMALL U;Ll;0;L;<font> 0075;;;;N;;;;;
+ 1D567;MATHEMATICAL DOUBLE-STRUCK SMALL V;Ll;0;L;<font> 0076;;;;N;;;;;
+ 1D568;MATHEMATICAL DOUBLE-STRUCK SMALL W;Ll;0;L;<font> 0077;;;;N;;;;;
+ 1D569;MATHEMATICAL DOUBLE-STRUCK SMALL X;Ll;0;L;<font> 0078;;;;N;;;;;
+ 1D56A;MATHEMATICAL DOUBLE-STRUCK SMALL Y;Ll;0;L;<font> 0079;;;;N;;;;;
+ 1D56B;MATHEMATICAL DOUBLE-STRUCK SMALL Z;Ll;0;L;<font> 007A;;;;N;;;;;
+ 1D56C;MATHEMATICAL BOLD FRAKTUR CAPITAL A;Lu;0;L;<font> 0041;;;;N;;;;;
+ 1D56D;MATHEMATICAL BOLD FRAKTUR CAPITAL B;Lu;0;L;<font> 0042;;;;N;;;;;
+ 1D56E;MATHEMATICAL BOLD FRAKTUR CAPITAL C;Lu;0;L;<font> 0043;;;;N;;;;;
+ 1D56F;MATHEMATICAL BOLD FRAKTUR CAPITAL D;Lu;0;L;<font> 0044;;;;N;;;;;
+ 1D570;MATHEMATICAL BOLD FRAKTUR CAPITAL E;Lu;0;L;<font> 0045;;;;N;;;;;
+ 1D571;MATHEMATICAL BOLD FRAKTUR CAPITAL F;Lu;0;L;<font> 0046;;;;N;;;;;
+ 1D572;MATHEMATICAL BOLD FRAKTUR CAPITAL G;Lu;0;L;<font> 0047;;;;N;;;;;
+ 1D573;MATHEMATICAL BOLD FRAKTUR CAPITAL H;Lu;0;L;<font> 0048;;;;N;;;;;
+ 1D574;MATHEMATICAL BOLD FRAKTUR CAPITAL I;Lu;0;L;<font> 0049;;;;N;;;;;
+ 1D575;MATHEMATICAL BOLD FRAKTUR CAPITAL J;Lu;0;L;<font> 004A;;;;N;;;;;
+ 1D576;MATHEMATICAL BOLD FRAKTUR CAPITAL K;Lu;0;L;<font> 004B;;;;N;;;;;
+ 1D577;MATHEMATICAL BOLD FRAKTUR CAPITAL L;Lu;0;L;<font> 004C;;;;N;;;;;
+ 1D578;MATHEMATICAL BOLD FRAKTUR CAPITAL M;Lu;0;L;<font> 004D;;;;N;;;;;
+ 1D579;MATHEMATICAL BOLD FRAKTUR CAPITAL N;Lu;0;L;<font> 004E;;;;N;;;;;
+ 1D57A;MATHEMATICAL BOLD FRAKTUR CAPITAL O;Lu;0;L;<font> 004F;;;;N;;;;;
+ 1D57B;MATHEMATICAL BOLD FRAKTUR CAPITAL P;Lu;0;L;<font> 0050;;;;N;;;;;
+ 1D57C;MATHEMATICAL BOLD FRAKTUR CAPITAL Q;Lu;0;L;<font> 0051;;;;N;;;;;
+ 1D57D;MATHEMATICAL BOLD FRAKTUR CAPITAL R;Lu;0;L;<font> 0052;;;;N;;;;;
+ 1D57E;MATHEMATICAL BOLD FRAKTUR CAPITAL S;Lu;0;L;<font> 0053;;;;N;;;;;
+ 1D57F;MATHEMATICAL BOLD FRAKTUR CAPITAL T;Lu;0;L;<font> 0054;;;;N;;;;;
+ 1D580;MATHEMATICAL BOLD FRAKTUR CAPITAL U;Lu;0;L;<font> 0055;;;;N;;;;;
+ 1D581;MATHEMATICAL BOLD FRAKTUR CAPITAL V;Lu;0;L;<font> 0056;;;;N;;;;;
+ 1D582;MATHEMATICAL BOLD FRAKTUR CAPITAL W;Lu;0;L;<font> 0057;;;;N;;;;;
+ 1D583;MATHEMATICAL BOLD FRAKTUR CAPITAL X;Lu;0;L;<font> 0058;;;;N;;;;;
+ 1D584;MATHEMATICAL BOLD FRAKTUR CAPITAL Y;Lu;0;L;<font> 0059;;;;N;;;;;
+ 1D585;MATHEMATICAL BOLD FRAKTUR CAPITAL Z;Lu;0;L;<font> 005A;;;;N;;;;;
+ 1D586;MATHEMATICAL BOLD FRAKTUR SMALL A;Ll;0;L;<font> 0061;;;;N;;;;;
+ 1D587;MATHEMATICAL BOLD FRAKTUR SMALL B;Ll;0;L;<font> 0062;;;;N;;;;;
+ 1D588;MATHEMATICAL BOLD FRAKTUR SMALL C;Ll;0;L;<font> 0063;;;;N;;;;;
+ 1D589;MATHEMATICAL BOLD FRAKTUR SMALL D;Ll;0;L;<font> 0064;;;;N;;;;;
+ 1D58A;MATHEMATICAL BOLD FRAKTUR SMALL E;Ll;0;L;<font> 0065;;;;N;;;;;
+ 1D58B;MATHEMATICAL BOLD FRAKTUR SMALL F;Ll;0;L;<font> 0066;;;;N;;;;;
+ 1D58C;MATHEMATICAL BOLD FRAKTUR SMALL G;Ll;0;L;<font> 0067;;;;N;;;;;
+ 1D58D;MATHEMATICAL BOLD FRAKTUR SMALL H;Ll;0;L;<font> 0068;;;;N;;;;;
+ 1D58E;MATHEMATICAL BOLD FRAKTUR SMALL I;Ll;0;L;<font> 0069;;;;N;;;;;
+ 1D58F;MATHEMATICAL BOLD FRAKTUR SMALL J;Ll;0;L;<font> 006A;;;;N;;;;;
+ 1D590;MATHEMATICAL BOLD FRAKTUR SMALL K;Ll;0;L;<font> 006B;;;;N;;;;;
+ 1D591;MATHEMATICAL BOLD FRAKTUR SMALL L;Ll;0;L;<font> 006C;;;;N;;;;;
+ 1D592;MATHEMATICAL BOLD FRAKTUR SMALL M;Ll;0;L;<font> 006D;;;;N;;;;;
+ 1D593;MATHEMATICAL BOLD FRAKTUR SMALL N;Ll;0;L;<font> 006E;;;;N;;;;;
+ 1D594;MATHEMATICAL BOLD FRAKTUR SMALL O;Ll;0;L;<font> 006F;;;;N;;;;;
+ 1D595;MATHEMATICAL BOLD FRAKTUR SMALL P;Ll;0;L;<font> 0070;;;;N;;;;;
+ 1D596;MATHEMATICAL BOLD FRAKTUR SMALL Q;Ll;0;L;<font> 0071;;;;N;;;;;
+ 1D597;MATHEMATICAL BOLD FRAKTUR SMALL R;Ll;0;L;<font> 0072;;;;N;;;;;
+ 1D598;MATHEMATICAL BOLD FRAKTUR SMALL S;Ll;0;L;<font> 0073;;;;N;;;;;
+ 1D599;MATHEMATICAL BOLD FRAKTUR SMALL T;Ll;0;L;<font> 0074;;;;N;;;;;
+ 1D59A;MATHEMATICAL BOLD FRAKTUR SMALL U;Ll;0;L;<font> 0075;;;;N;;;;;
+ 1D59B;MATHEMATICAL BOLD FRAKTUR SMALL V;Ll;0;L;<font> 0076;;;;N;;;;;
+ 1D59C;MATHEMATICAL BOLD FRAKTUR SMALL W;Ll;0;L;<font> 0077;;;;N;;;;;
+ 1D59D;MATHEMATICAL BOLD FRAKTUR SMALL X;Ll;0;L;<font> 0078;;;;N;;;;;
+ 1D59E;MATHEMATICAL BOLD FRAKTUR SMALL Y;Ll;0;L;<font> 0079;;;;N;;;;;
+ 1D59F;MATHEMATICAL BOLD FRAKTUR SMALL Z;Ll;0;L;<font> 007A;;;;N;;;;;
+ 1D5A0;MATHEMATICAL SANS-SERIF CAPITAL A;Lu;0;L;<font> 0041;;;;N;;;;;
+ 1D5A1;MATHEMATICAL SANS-SERIF CAPITAL B;Lu;0;L;<font> 0042;;;;N;;;;;
+ 1D5A2;MATHEMATICAL SANS-SERIF CAPITAL C;Lu;0;L;<font> 0043;;;;N;;;;;
+ 1D5A3;MATHEMATICAL SANS-SERIF CAPITAL D;Lu;0;L;<font> 0044;;;;N;;;;;
+ 1D5A4;MATHEMATICAL SANS-SERIF CAPITAL E;Lu;0;L;<font> 0045;;;;N;;;;;
+ 1D5A5;MATHEMATICAL SANS-SERIF CAPITAL F;Lu;0;L;<font> 0046;;;;N;;;;;
+ 1D5A6;MATHEMATICAL SANS-SERIF CAPITAL G;Lu;0;L;<font> 0047;;;;N;;;;;
+ 1D5A7;MATHEMATICAL SANS-SERIF CAPITAL H;Lu;0;L;<font> 0048;;;;N;;;;;
+ 1D5A8;MATHEMATICAL SANS-SERIF CAPITAL I;Lu;0;L;<font> 0049;;;;N;;;;;
+ 1D5A9;MATHEMATICAL SANS-SERIF CAPITAL J;Lu;0;L;<font> 004A;;;;N;;;;;
+ 1D5AA;MATHEMATICAL SANS-SERIF CAPITAL K;Lu;0;L;<font> 004B;;;;N;;;;;
+ 1D5AB;MATHEMATICAL SANS-SERIF CAPITAL L;Lu;0;L;<font> 004C;;;;N;;;;;
+ 1D5AC;MATHEMATICAL SANS-SERIF CAPITAL M;Lu;0;L;<font> 004D;;;;N;;;;;
+ 1D5AD;MATHEMATICAL SANS-SERIF CAPITAL N;Lu;0;L;<font> 004E;;;;N;;;;;
+ 1D5AE;MATHEMATICAL SANS-SERIF CAPITAL O;Lu;0;L;<font> 004F;;;;N;;;;;
+ 1D5AF;MATHEMATICAL SANS-SERIF CAPITAL P;Lu;0;L;<font> 0050;;;;N;;;;;
+ 1D5B0;MATHEMATICAL SANS-SERIF CAPITAL Q;Lu;0;L;<font> 0051;;;;N;;;;;
+ 1D5B1;MATHEMATICAL SANS-SERIF CAPITAL R;Lu;0;L;<font> 0052;;;;N;;;;;
+ 1D5B2;MATHEMATICAL SANS-SERIF CAPITAL S;Lu;0;L;<font> 0053;;;;N;;;;;
+ 1D5B3;MATHEMATICAL SANS-SERIF CAPITAL T;Lu;0;L;<font> 0054;;;;N;;;;;
+ 1D5B4;MATHEMATICAL SANS-SERIF CAPITAL U;Lu;0;L;<font> 0055;;;;N;;;;;
+ 1D5B5;MATHEMATICAL SANS-SERIF CAPITAL V;Lu;0;L;<font> 0056;;;;N;;;;;
+ 1D5B6;MATHEMATICAL SANS-SERIF CAPITAL W;Lu;0;L;<font> 0057;;;;N;;;;;
+ 1D5B7;MATHEMATICAL SANS-SERIF CAPITAL X;Lu;0;L;<font> 0058;;;;N;;;;;
+ 1D5B8;MATHEMATICAL SANS-SERIF CAPITAL Y;Lu;0;L;<font> 0059;;;;N;;;;;
+ 1D5B9;MATHEMATICAL SANS-SERIF CAPITAL Z;Lu;0;L;<font> 005A;;;;N;;;;;
+ 1D5BA;MATHEMATICAL SANS-SERIF SMALL A;Ll;0;L;<font> 0061;;;;N;;;;;
+ 1D5BB;MATHEMATICAL SANS-SERIF SMALL B;Ll;0;L;<font> 0062;;;;N;;;;;
+ 1D5BC;MATHEMATICAL SANS-SERIF SMALL C;Ll;0;L;<font> 0063;;;;N;;;;;
+ 1D5BD;MATHEMATICAL SANS-SERIF SMALL D;Ll;0;L;<font> 0064;;;;N;;;;;
+ 1D5BE;MATHEMATICAL SANS-SERIF SMALL E;Ll;0;L;<font> 0065;;;;N;;;;;
+ 1D5BF;MATHEMATICAL SANS-SERIF SMALL F;Ll;0;L;<font> 0066;;;;N;;;;;
+ 1D5C0;MATHEMATICAL SANS-SERIF SMALL G;Ll;0;L;<font> 0067;;;;N;;;;;
+ 1D5C1;MATHEMATICAL SANS-SERIF SMALL H;Ll;0;L;<font> 0068;;;;N;;;;;
+ 1D5C2;MATHEMATICAL SANS-SERIF SMALL I;Ll;0;L;<font> 0069;;;;N;;;;;
+ 1D5C3;MATHEMATICAL SANS-SERIF SMALL J;Ll;0;L;<font> 006A;;;;N;;;;;
+ 1D5C4;MATHEMATICAL SANS-SERIF SMALL K;Ll;0;L;<font> 006B;;;;N;;;;;
+ 1D5C5;MATHEMATICAL SANS-SERIF SMALL L;Ll;0;L;<font> 006C;;;;N;;;;;
+ 1D5C6;MATHEMATICAL SANS-SERIF SMALL M;Ll;0;L;<font> 006D;;;;N;;;;;
+ 1D5C7;MATHEMATICAL SANS-SERIF SMALL N;Ll;0;L;<font> 006E;;;;N;;;;;
+ 1D5C8;MATHEMATICAL SANS-SERIF SMALL O;Ll;0;L;<font> 006F;;;;N;;;;;
+ 1D5C9;MATHEMATICAL SANS-SERIF SMALL P;Ll;0;L;<font> 0070;;;;N;;;;;
+ 1D5CA;MATHEMATICAL SANS-SERIF SMALL Q;Ll;0;L;<font> 0071;;;;N;;;;;
+ 1D5CB;MATHEMATICAL SANS-SERIF SMALL R;Ll;0;L;<font> 0072;;;;N;;;;;
+ 1D5CC;MATHEMATICAL SANS-SERIF SMALL S;Ll;0;L;<font> 0073;;;;N;;;;;
+ 1D5CD;MATHEMATICAL SANS-SERIF SMALL T;Ll;0;L;<font> 0074;;;;N;;;;;
+ 1D5CE;MATHEMATICAL SANS-SERIF SMALL U;Ll;0;L;<font> 0075;;;;N;;;;;
+ 1D5CF;MATHEMATICAL SANS-SERIF SMALL V;Ll;0;L;<font> 0076;;;;N;;;;;
+ 1D5D0;MATHEMATICAL SANS-SERIF SMALL W;Ll;0;L;<font> 0077;;;;N;;;;;
+ 1D5D1;MATHEMATICAL SANS-SERIF SMALL X;Ll;0;L;<font> 0078;;;;N;;;;;
+ 1D5D2;MATHEMATICAL SANS-SERIF SMALL Y;Ll;0;L;<font> 0079;;;;N;;;;;
+ 1D5D3;MATHEMATICAL SANS-SERIF SMALL Z;Ll;0;L;<font> 007A;;;;N;;;;;
+ 1D5D4;MATHEMATICAL SANS-SERIF BOLD CAPITAL A;Lu;0;L;<font> 0041;;;;N;;;;;
+ 1D5D5;MATHEMATICAL SANS-SERIF BOLD CAPITAL B;Lu;0;L;<font> 0042;;;;N;;;;;
+ 1D5D6;MATHEMATICAL SANS-SERIF BOLD CAPITAL C;Lu;0;L;<font> 0043;;;;N;;;;;
+ 1D5D7;MATHEMATICAL SANS-SERIF BOLD CAPITAL D;Lu;0;L;<font> 0044;;;;N;;;;;
+ 1D5D8;MATHEMATICAL SANS-SERIF BOLD CAPITAL E;Lu;0;L;<font> 0045;;;;N;;;;;
+ 1D5D9;MATHEMATICAL SANS-SERIF BOLD CAPITAL F;Lu;0;L;<font> 0046;;;;N;;;;;
+ 1D5DA;MATHEMATICAL SANS-SERIF BOLD CAPITAL G;Lu;0;L;<font> 0047;;;;N;;;;;
+ 1D5DB;MATHEMATICAL SANS-SERIF BOLD CAPITAL H;Lu;0;L;<font> 0048;;;;N;;;;;
+ 1D5DC;MATHEMATICAL SANS-SERIF BOLD CAPITAL I;Lu;0;L;<font> 0049;;;;N;;;;;
+ 1D5DD;MATHEMATICAL SANS-SERIF BOLD CAPITAL J;Lu;0;L;<font> 004A;;;;N;;;;;
+ 1D5DE;MATHEMATICAL SANS-SERIF BOLD CAPITAL K;Lu;0;L;<font> 004B;;;;N;;;;;
+ 1D5DF;MATHEMATICAL SANS-SERIF BOLD CAPITAL L;Lu;0;L;<font> 004C;;;;N;;;;;
+ 1D5E0;MATHEMATICAL SANS-SERIF BOLD CAPITAL M;Lu;0;L;<font> 004D;;;;N;;;;;
+ 1D5E1;MATHEMATICAL SANS-SERIF BOLD CAPITAL N;Lu;0;L;<font> 004E;;;;N;;;;;
+ 1D5E2;MATHEMATICAL SANS-SERIF BOLD CAPITAL O;Lu;0;L;<font> 004F;;;;N;;;;;
+ 1D5E3;MATHEMATICAL SANS-SERIF BOLD CAPITAL P;Lu;0;L;<font> 0050;;;;N;;;;;
+ 1D5E4;MATHEMATICAL SANS-SERIF BOLD CAPITAL Q;Lu;0;L;<font> 0051;;;;N;;;;;
+ 1D5E5;MATHEMATICAL SANS-SERIF BOLD CAPITAL R;Lu;0;L;<font> 0052;;;;N;;;;;
+ 1D5E6;MATHEMATICAL SANS-SERIF BOLD CAPITAL S;Lu;0;L;<font> 0053;;;;N;;;;;
+ 1D5E7;MATHEMATICAL SANS-SERIF BOLD CAPITAL T;Lu;0;L;<font> 0054;;;;N;;;;;
+ 1D5E8;MATHEMATICAL SANS-SERIF BOLD CAPITAL U;Lu;0;L;<font> 0055;;;;N;;;;;
+ 1D5E9;MATHEMATICAL SANS-SERIF BOLD CAPITAL V;Lu;0;L;<font> 0056;;;;N;;;;;
+ 1D5EA;MATHEMATICAL SANS-SERIF BOLD CAPITAL W;Lu;0;L;<font> 0057;;;;N;;;;;
+ 1D5EB;MATHEMATICAL SANS-SERIF BOLD CAPITAL X;Lu;0;L;<font> 0058;;;;N;;;;;
+ 1D5EC;MATHEMATICAL SANS-SERIF BOLD CAPITAL Y;Lu;0;L;<font> 0059;;;;N;;;;;
+ 1D5ED;MATHEMATICAL SANS-SERIF BOLD CAPITAL Z;Lu;0;L;<font> 005A;;;;N;;;;;
+ 1D5EE;MATHEMATICAL SANS-SERIF BOLD SMALL A;Ll;0;L;<font> 0061;;;;N;;;;;
+ 1D5EF;MATHEMATICAL SANS-SERIF BOLD SMALL B;Ll;0;L;<font> 0062;;;;N;;;;;
+ 1D5F0;MATHEMATICAL SANS-SERIF BOLD SMALL C;Ll;0;L;<font> 0063;;;;N;;;;;
+ 1D5F1;MATHEMATICAL SANS-SERIF BOLD SMALL D;Ll;0;L;<font> 0064;;;;N;;;;;
+ 1D5F2;MATHEMATICAL SANS-SERIF BOLD SMALL E;Ll;0;L;<font> 0065;;;;N;;;;;
+ 1D5F3;MATHEMATICAL SANS-SERIF BOLD SMALL F;Ll;0;L;<font> 0066;;;;N;;;;;
+ 1D5F4;MATHEMATICAL SANS-SERIF BOLD SMALL G;Ll;0;L;<font> 0067;;;;N;;;;;
+ 1D5F5;MATHEMATICAL SANS-SERIF BOLD SMALL H;Ll;0;L;<font> 0068;;;;N;;;;;
+ 1D5F6;MATHEMATICAL SANS-SERIF BOLD SMALL I;Ll;0;L;<font> 0069;;;;N;;;;;
+ 1D5F7;MATHEMATICAL SANS-SERIF BOLD SMALL J;Ll;0;L;<font> 006A;;;;N;;;;;
+ 1D5F8;MATHEMATICAL SANS-SERIF BOLD SMALL K;Ll;0;L;<font> 006B;;;;N;;;;;
+ 1D5F9;MATHEMATICAL SANS-SERIF BOLD SMALL L;Ll;0;L;<font> 006C;;;;N;;;;;
+ 1D5FA;MATHEMATICAL SANS-SERIF BOLD SMALL M;Ll;0;L;<font> 006D;;;;N;;;;;
+ 1D5FB;MATHEMATICAL SANS-SERIF BOLD SMALL N;Ll;0;L;<font> 006E;;;;N;;;;;
+ 1D5FC;MATHEMATICAL SANS-SERIF BOLD SMALL O;Ll;0;L;<font> 006F;;;;N;;;;;
+ 1D5FD;MATHEMATICAL SANS-SERIF BOLD SMALL P;Ll;0;L;<font> 0070;;;;N;;;;;
+ 1D5FE;MATHEMATICAL SANS-SERIF BOLD SMALL Q;Ll;0;L;<font> 0071;;;;N;;;;;
+ 1D5FF;MATHEMATICAL SANS-SERIF BOLD SMALL R;Ll;0;L;<font> 0072;;;;N;;;;;
+ 1D600;MATHEMATICAL SANS-SERIF BOLD SMALL S;Ll;0;L;<font> 0073;;;;N;;;;;
+ 1D601;MATHEMATICAL SANS-SERIF BOLD SMALL T;Ll;0;L;<font> 0074;;;;N;;;;;
+ 1D602;MATHEMATICAL SANS-SERIF BOLD SMALL U;Ll;0;L;<font> 0075;;;;N;;;;;
+ 1D603;MATHEMATICAL SANS-SERIF BOLD SMALL V;Ll;0;L;<font> 0076;;;;N;;;;;
+ 1D604;MATHEMATICAL SANS-SERIF BOLD SMALL W;Ll;0;L;<font> 0077;;;;N;;;;;
+ 1D605;MATHEMATICAL SANS-SERIF BOLD SMALL X;Ll;0;L;<font> 0078;;;;N;;;;;
+ 1D606;MATHEMATICAL SANS-SERIF BOLD SMALL Y;Ll;0;L;<font> 0079;;;;N;;;;;
+ 1D607;MATHEMATICAL SANS-SERIF BOLD SMALL Z;Ll;0;L;<font> 007A;;;;N;;;;;
+ 1D608;MATHEMATICAL SANS-SERIF ITALIC CAPITAL A;Lu;0;L;<font> 0041;;;;N;;;;;
+ 1D609;MATHEMATICAL SANS-SERIF ITALIC CAPITAL B;Lu;0;L;<font> 0042;;;;N;;;;;
+ 1D60A;MATHEMATICAL SANS-SERIF ITALIC CAPITAL C;Lu;0;L;<font> 0043;;;;N;;;;;
+ 1D60B;MATHEMATICAL SANS-SERIF ITALIC CAPITAL D;Lu;0;L;<font> 0044;;;;N;;;;;
+ 1D60C;MATHEMATICAL SANS-SERIF ITALIC CAPITAL E;Lu;0;L;<font> 0045;;;;N;;;;;
+ 1D60D;MATHEMATICAL SANS-SERIF ITALIC CAPITAL F;Lu;0;L;<font> 0046;;;;N;;;;;
+ 1D60E;MATHEMATICAL SANS-SERIF ITALIC CAPITAL G;Lu;0;L;<font> 0047;;;;N;;;;;
+ 1D60F;MATHEMATICAL SANS-SERIF ITALIC CAPITAL H;Lu;0;L;<font> 0048;;;;N;;;;;
+ 1D610;MATHEMATICAL SANS-SERIF ITALIC CAPITAL I;Lu;0;L;<font> 0049;;;;N;;;;;
+ 1D611;MATHEMATICAL SANS-SERIF ITALIC CAPITAL J;Lu;0;L;<font> 004A;;;;N;;;;;
+ 1D612;MATHEMATICAL SANS-SERIF ITALIC CAPITAL K;Lu;0;L;<font> 004B;;;;N;;;;;
+ 1D613;MATHEMATICAL SANS-SERIF ITALIC CAPITAL L;Lu;0;L;<font> 004C;;;;N;;;;;
+ 1D614;MATHEMATICAL SANS-SERIF ITALIC CAPITAL M;Lu;0;L;<font> 004D;;;;N;;;;;
+ 1D615;MATHEMATICAL SANS-SERIF ITALIC CAPITAL N;Lu;0;L;<font> 004E;;;;N;;;;;
+ 1D616;MATHEMATICAL SANS-SERIF ITALIC CAPITAL O;Lu;0;L;<font> 004F;;;;N;;;;;
+ 1D617;MATHEMATICAL SANS-SERIF ITALIC CAPITAL P;Lu;0;L;<font> 0050;;;;N;;;;;
+ 1D618;MATHEMATICAL SANS-SERIF ITALIC CAPITAL Q;Lu;0;L;<font> 0051;;;;N;;;;;
+ 1D619;MATHEMATICAL SANS-SERIF ITALIC CAPITAL R;Lu;0;L;<font> 0052;;;;N;;;;;
+ 1D61A;MATHEMATICAL SANS-SERIF ITALIC CAPITAL S;Lu;0;L;<font> 0053;;;;N;;;;;
+ 1D61B;MATHEMATICAL SANS-SERIF ITALIC CAPITAL T;Lu;0;L;<font> 0054;;;;N;;;;;
+ 1D61C;MATHEMATICAL SANS-SERIF ITALIC CAPITAL U;Lu;0;L;<font> 0055;;;;N;;;;;
+ 1D61D;MATHEMATICAL SANS-SERIF ITALIC CAPITAL V;Lu;0;L;<font> 0056;;;;N;;;;;
+ 1D61E;MATHEMATICAL SANS-SERIF ITALIC CAPITAL W;Lu;0;L;<font> 0057;;;;N;;;;;
+ 1D61F;MATHEMATICAL SANS-SERIF ITALIC CAPITAL X;Lu;0;L;<font> 0058;;;;N;;;;;
+ 1D620;MATHEMATICAL SANS-SERIF ITALIC CAPITAL Y;Lu;0;L;<font> 0059;;;;N;;;;;
+ 1D621;MATHEMATICAL SANS-SERIF ITALIC CAPITAL Z;Lu;0;L;<font> 005A;;;;N;;;;;
+ 1D622;MATHEMATICAL SANS-SERIF ITALIC SMALL A;Ll;0;L;<font> 0061;;;;N;;;;;
+ 1D623;MATHEMATICAL SANS-SERIF ITALIC SMALL B;Ll;0;L;<font> 0062;;;;N;;;;;
+ 1D624;MATHEMATICAL SANS-SERIF ITALIC SMALL C;Ll;0;L;<font> 0063;;;;N;;;;;
+ 1D625;MATHEMATICAL SANS-SERIF ITALIC SMALL D;Ll;0;L;<font> 0064;;;;N;;;;;
+ 1D626;MATHEMATICAL SANS-SERIF ITALIC SMALL E;Ll;0;L;<font> 0065;;;;N;;;;;
+ 1D627;MATHEMATICAL SANS-SERIF ITALIC SMALL F;Ll;0;L;<font> 0066;;;;N;;;;;
+ 1D628;MATHEMATICAL SANS-SERIF ITALIC SMALL G;Ll;0;L;<font> 0067;;;;N;;;;;
+ 1D629;MATHEMATICAL SANS-SERIF ITALIC SMALL H;Ll;0;L;<font> 0068;;;;N;;;;;
+ 1D62A;MATHEMATICAL SANS-SERIF ITALIC SMALL I;Ll;0;L;<font> 0069;;;;N;;;;;
+ 1D62B;MATHEMATICAL SANS-SERIF ITALIC SMALL J;Ll;0;L;<font> 006A;;;;N;;;;;
+ 1D62C;MATHEMATICAL SANS-SERIF ITALIC SMALL K;Ll;0;L;<font> 006B;;;;N;;;;;
+ 1D62D;MATHEMATICAL SANS-SERIF ITALIC SMALL L;Ll;0;L;<font> 006C;;;;N;;;;;
+ 1D62E;MATHEMATICAL SANS-SERIF ITALIC SMALL M;Ll;0;L;<font> 006D;;;;N;;;;;
+ 1D62F;MATHEMATICAL SANS-SERIF ITALIC SMALL N;Ll;0;L;<font> 006E;;;;N;;;;;
+ 1D630;MATHEMATICAL SANS-SERIF ITALIC SMALL O;Ll;0;L;<font> 006F;;;;N;;;;;
+ 1D631;MATHEMATICAL SANS-SERIF ITALIC SMALL P;Ll;0;L;<font> 0070;;;;N;;;;;
+ 1D632;MATHEMATICAL SANS-SERIF ITALIC SMALL Q;Ll;0;L;<font> 0071;;;;N;;;;;
+ 1D633;MATHEMATICAL SANS-SERIF ITALIC SMALL R;Ll;0;L;<font> 0072;;;;N;;;;;
+ 1D634;MATHEMATICAL SANS-SERIF ITALIC SMALL S;Ll;0;L;<font> 0073;;;;N;;;;;
+ 1D635;MATHEMATICAL SANS-SERIF ITALIC SMALL T;Ll;0;L;<font> 0074;;;;N;;;;;
+ 1D636;MATHEMATICAL SANS-SERIF ITALIC SMALL U;Ll;0;L;<font> 0075;;;;N;;;;;
+ 1D637;MATHEMATICAL SANS-SERIF ITALIC SMALL V;Ll;0;L;<font> 0076;;;;N;;;;;
+ 1D638;MATHEMATICAL SANS-SERIF ITALIC SMALL W;Ll;0;L;<font> 0077;;;;N;;;;;
+ 1D639;MATHEMATICAL SANS-SERIF ITALIC SMALL X;Ll;0;L;<font> 0078;;;;N;;;;;
+ 1D63A;MATHEMATICAL SANS-SERIF ITALIC SMALL Y;Ll;0;L;<font> 0079;;;;N;;;;;
+ 1D63B;MATHEMATICAL SANS-SERIF ITALIC SMALL Z;Ll;0;L;<font> 007A;;;;N;;;;;
+ 1D63C;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL A;Lu;0;L;<font> 0041;;;;N;;;;;
+ 1D63D;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL B;Lu;0;L;<font> 0042;;;;N;;;;;
+ 1D63E;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL C;Lu;0;L;<font> 0043;;;;N;;;;;
+ 1D63F;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL D;Lu;0;L;<font> 0044;;;;N;;;;;
+ 1D640;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL E;Lu;0;L;<font> 0045;;;;N;;;;;
+ 1D641;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL F;Lu;0;L;<font> 0046;;;;N;;;;;
+ 1D642;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL G;Lu;0;L;<font> 0047;;;;N;;;;;
+ 1D643;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL H;Lu;0;L;<font> 0048;;;;N;;;;;
+ 1D644;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL I;Lu;0;L;<font> 0049;;;;N;;;;;
+ 1D645;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL J;Lu;0;L;<font> 004A;;;;N;;;;;
+ 1D646;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL K;Lu;0;L;<font> 004B;;;;N;;;;;
+ 1D647;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL L;Lu;0;L;<font> 004C;;;;N;;;;;
+ 1D648;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL M;Lu;0;L;<font> 004D;;;;N;;;;;
+ 1D649;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL N;Lu;0;L;<font> 004E;;;;N;;;;;
+ 1D64A;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL O;Lu;0;L;<font> 004F;;;;N;;;;;
+ 1D64B;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL P;Lu;0;L;<font> 0050;;;;N;;;;;
+ 1D64C;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL Q;Lu;0;L;<font> 0051;;;;N;;;;;
+ 1D64D;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL R;Lu;0;L;<font> 0052;;;;N;;;;;
+ 1D64E;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL S;Lu;0;L;<font> 0053;;;;N;;;;;
+ 1D64F;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL T;Lu;0;L;<font> 0054;;;;N;;;;;
+ 1D650;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL U;Lu;0;L;<font> 0055;;;;N;;;;;
+ 1D651;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL V;Lu;0;L;<font> 0056;;;;N;;;;;
+ 1D652;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL W;Lu;0;L;<font> 0057;;;;N;;;;;
+ 1D653;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL X;Lu;0;L;<font> 0058;;;;N;;;;;
+ 1D654;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL Y;Lu;0;L;<font> 0059;;;;N;;;;;
+ 1D655;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL Z;Lu;0;L;<font> 005A;;;;N;;;;;
+ 1D656;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL A;Ll;0;L;<font> 0061;;;;N;;;;;
+ 1D657;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL B;Ll;0;L;<font> 0062;;;;N;;;;;
+ 1D658;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL C;Ll;0;L;<font> 0063;;;;N;;;;;
+ 1D659;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL D;Ll;0;L;<font> 0064;;;;N;;;;;
+ 1D65A;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL E;Ll;0;L;<font> 0065;;;;N;;;;;
+ 1D65B;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL F;Ll;0;L;<font> 0066;;;;N;;;;;
+ 1D65C;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL G;Ll;0;L;<font> 0067;;;;N;;;;;
+ 1D65D;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL H;Ll;0;L;<font> 0068;;;;N;;;;;
+ 1D65E;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL I;Ll;0;L;<font> 0069;;;;N;;;;;
+ 1D65F;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL J;Ll;0;L;<font> 006A;;;;N;;;;;
+ 1D660;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL K;Ll;0;L;<font> 006B;;;;N;;;;;
+ 1D661;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL L;Ll;0;L;<font> 006C;;;;N;;;;;
+ 1D662;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL M;Ll;0;L;<font> 006D;;;;N;;;;;
+ 1D663;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL N;Ll;0;L;<font> 006E;;;;N;;;;;
+ 1D664;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL O;Ll;0;L;<font> 006F;;;;N;;;;;
+ 1D665;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL P;Ll;0;L;<font> 0070;;;;N;;;;;
+ 1D666;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL Q;Ll;0;L;<font> 0071;;;;N;;;;;
+ 1D667;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL R;Ll;0;L;<font> 0072;;;;N;;;;;
+ 1D668;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL S;Ll;0;L;<font> 0073;;;;N;;;;;
+ 1D669;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL T;Ll;0;L;<font> 0074;;;;N;;;;;
+ 1D66A;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL U;Ll;0;L;<font> 0075;;;;N;;;;;
+ 1D66B;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL V;Ll;0;L;<font> 0076;;;;N;;;;;
+ 1D66C;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL W;Ll;0;L;<font> 0077;;;;N;;;;;
+ 1D66D;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL X;Ll;0;L;<font> 0078;;;;N;;;;;
+ 1D66E;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL Y;Ll;0;L;<font> 0079;;;;N;;;;;
+ 1D66F;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL Z;Ll;0;L;<font> 007A;;;;N;;;;;
+ 1D670;MATHEMATICAL MONOSPACE CAPITAL A;Lu;0;L;<font> 0041;;;;N;;;;;
+ 1D671;MATHEMATICAL MONOSPACE CAPITAL B;Lu;0;L;<font> 0042;;;;N;;;;;
+ 1D672;MATHEMATICAL MONOSPACE CAPITAL C;Lu;0;L;<font> 0043;;;;N;;;;;
+ 1D673;MATHEMATICAL MONOSPACE CAPITAL D;Lu;0;L;<font> 0044;;;;N;;;;;
+ 1D674;MATHEMATICAL MONOSPACE CAPITAL E;Lu;0;L;<font> 0045;;;;N;;;;;
+ 1D675;MATHEMATICAL MONOSPACE CAPITAL F;Lu;0;L;<font> 0046;;;;N;;;;;
+ 1D676;MATHEMATICAL MONOSPACE CAPITAL G;Lu;0;L;<font> 0047;;;;N;;;;;
+ 1D677;MATHEMATICAL MONOSPACE CAPITAL H;Lu;0;L;<font> 0048;;;;N;;;;;
+ 1D678;MATHEMATICAL MONOSPACE CAPITAL I;Lu;0;L;<font> 0049;;;;N;;;;;
+ 1D679;MATHEMATICAL MONOSPACE CAPITAL J;Lu;0;L;<font> 004A;;;;N;;;;;
+ 1D67A;MATHEMATICAL MONOSPACE CAPITAL K;Lu;0;L;<font> 004B;;;;N;;;;;
+ 1D67B;MATHEMATICAL MONOSPACE CAPITAL L;Lu;0;L;<font> 004C;;;;N;;;;;
+ 1D67C;MATHEMATICAL MONOSPACE CAPITAL M;Lu;0;L;<font> 004D;;;;N;;;;;
+ 1D67D;MATHEMATICAL MONOSPACE CAPITAL N;Lu;0;L;<font> 004E;;;;N;;;;;
+ 1D67E;MATHEMATICAL MONOSPACE CAPITAL O;Lu;0;L;<font> 004F;;;;N;;;;;
+ 1D67F;MATHEMATICAL MONOSPACE CAPITAL P;Lu;0;L;<font> 0050;;;;N;;;;;
+ 1D680;MATHEMATICAL MONOSPACE CAPITAL Q;Lu;0;L;<font> 0051;;;;N;;;;;
+ 1D681;MATHEMATICAL MONOSPACE CAPITAL R;Lu;0;L;<font> 0052;;;;N;;;;;
+ 1D682;MATHEMATICAL MONOSPACE CAPITAL S;Lu;0;L;<font> 0053;;;;N;;;;;
+ 1D683;MATHEMATICAL MONOSPACE CAPITAL T;Lu;0;L;<font> 0054;;;;N;;;;;
+ 1D684;MATHEMATICAL MONOSPACE CAPITAL U;Lu;0;L;<font> 0055;;;;N;;;;;
+ 1D685;MATHEMATICAL MONOSPACE CAPITAL V;Lu;0;L;<font> 0056;;;;N;;;;;
+ 1D686;MATHEMATICAL MONOSPACE CAPITAL W;Lu;0;L;<font> 0057;;;;N;;;;;
+ 1D687;MATHEMATICAL MONOSPACE CAPITAL X;Lu;0;L;<font> 0058;;;;N;;;;;
+ 1D688;MATHEMATICAL MONOSPACE CAPITAL Y;Lu;0;L;<font> 0059;;;;N;;;;;
+ 1D689;MATHEMATICAL MONOSPACE CAPITAL Z;Lu;0;L;<font> 005A;;;;N;;;;;
+ 1D68A;MATHEMATICAL MONOSPACE SMALL A;Ll;0;L;<font> 0061;;;;N;;;;;
+ 1D68B;MATHEMATICAL MONOSPACE SMALL B;Ll;0;L;<font> 0062;;;;N;;;;;
+ 1D68C;MATHEMATICAL MONOSPACE SMALL C;Ll;0;L;<font> 0063;;;;N;;;;;
+ 1D68D;MATHEMATICAL MONOSPACE SMALL D;Ll;0;L;<font> 0064;;;;N;;;;;
+ 1D68E;MATHEMATICAL MONOSPACE SMALL E;Ll;0;L;<font> 0065;;;;N;;;;;
+ 1D68F;MATHEMATICAL MONOSPACE SMALL F;Ll;0;L;<font> 0066;;;;N;;;;;
+ 1D690;MATHEMATICAL MONOSPACE SMALL G;Ll;0;L;<font> 0067;;;;N;;;;;
+ 1D691;MATHEMATICAL MONOSPACE SMALL H;Ll;0;L;<font> 0068;;;;N;;;;;
+ 1D692;MATHEMATICAL MONOSPACE SMALL I;Ll;0;L;<font> 0069;;;;N;;;;;
+ 1D693;MATHEMATICAL MONOSPACE SMALL J;Ll;0;L;<font> 006A;;;;N;;;;;
+ 1D694;MATHEMATICAL MONOSPACE SMALL K;Ll;0;L;<font> 006B;;;;N;;;;;
+ 1D695;MATHEMATICAL MONOSPACE SMALL L;Ll;0;L;<font> 006C;;;;N;;;;;
+ 1D696;MATHEMATICAL MONOSPACE SMALL M;Ll;0;L;<font> 006D;;;;N;;;;;
+ 1D697;MATHEMATICAL MONOSPACE SMALL N;Ll;0;L;<font> 006E;;;;N;;;;;
+ 1D698;MATHEMATICAL MONOSPACE SMALL O;Ll;0;L;<font> 006F;;;;N;;;;;
+ 1D699;MATHEMATICAL MONOSPACE SMALL P;Ll;0;L;<font> 0070;;;;N;;;;;
+ 1D69A;MATHEMATICAL MONOSPACE SMALL Q;Ll;0;L;<font> 0071;;;;N;;;;;
+ 1D69B;MATHEMATICAL MONOSPACE SMALL R;Ll;0;L;<font> 0072;;;;N;;;;;
+ 1D69C;MATHEMATICAL MONOSPACE SMALL S;Ll;0;L;<font> 0073;;;;N;;;;;
+ 1D69D;MATHEMATICAL MONOSPACE SMALL T;Ll;0;L;<font> 0074;;;;N;;;;;
+ 1D69E;MATHEMATICAL MONOSPACE SMALL U;Ll;0;L;<font> 0075;;;;N;;;;;
+ 1D69F;MATHEMATICAL MONOSPACE SMALL V;Ll;0;L;<font> 0076;;;;N;;;;;
+ 1D6A0;MATHEMATICAL MONOSPACE SMALL W;Ll;0;L;<font> 0077;;;;N;;;;;
+ 1D6A1;MATHEMATICAL MONOSPACE SMALL X;Ll;0;L;<font> 0078;;;;N;;;;;
+ 1D6A2;MATHEMATICAL MONOSPACE SMALL Y;Ll;0;L;<font> 0079;;;;N;;;;;
+ 1D6A3;MATHEMATICAL MONOSPACE SMALL Z;Ll;0;L;<font> 007A;;;;N;;;;;
+ 1D6A4;MATHEMATICAL ITALIC SMALL DOTLESS I;Ll;0;L;<font> 0131;;;;N;;;;;
+ 1D6A5;MATHEMATICAL ITALIC SMALL DOTLESS J;Ll;0;L;<font> 0237;;;;N;;;;;
+ 1D6A8;MATHEMATICAL BOLD CAPITAL ALPHA;Lu;0;L;<font> 0391;;;;N;;;;;
+ 1D6A9;MATHEMATICAL BOLD CAPITAL BETA;Lu;0;L;<font> 0392;;;;N;;;;;
+ 1D6AA;MATHEMATICAL BOLD CAPITAL GAMMA;Lu;0;L;<font> 0393;;;;N;;;;;
+ 1D6AB;MATHEMATICAL BOLD CAPITAL DELTA;Lu;0;L;<font> 0394;;;;N;;;;;
+ 1D6AC;MATHEMATICAL BOLD CAPITAL EPSILON;Lu;0;L;<font> 0395;;;;N;;;;;
+ 1D6AD;MATHEMATICAL BOLD CAPITAL ZETA;Lu;0;L;<font> 0396;;;;N;;;;;
+ 1D6AE;MATHEMATICAL BOLD CAPITAL ETA;Lu;0;L;<font> 0397;;;;N;;;;;
+ 1D6AF;MATHEMATICAL BOLD CAPITAL THETA;Lu;0;L;<font> 0398;;;;N;;;;;
+ 1D6B0;MATHEMATICAL BOLD CAPITAL IOTA;Lu;0;L;<font> 0399;;;;N;;;;;
+ 1D6B1;MATHEMATICAL BOLD CAPITAL KAPPA;Lu;0;L;<font> 039A;;;;N;;;;;
+ 1D6B2;MATHEMATICAL BOLD CAPITAL LAMDA;Lu;0;L;<font> 039B;;;;N;;;;;
+ 1D6B3;MATHEMATICAL BOLD CAPITAL MU;Lu;0;L;<font> 039C;;;;N;;;;;
+ 1D6B4;MATHEMATICAL BOLD CAPITAL NU;Lu;0;L;<font> 039D;;;;N;;;;;
+ 1D6B5;MATHEMATICAL BOLD CAPITAL XI;Lu;0;L;<font> 039E;;;;N;;;;;
+ 1D6B6;MATHEMATICAL BOLD CAPITAL OMICRON;Lu;0;L;<font> 039F;;;;N;;;;;
+ 1D6B7;MATHEMATICAL BOLD CAPITAL PI;Lu;0;L;<font> 03A0;;;;N;;;;;
+ 1D6B8;MATHEMATICAL BOLD CAPITAL RHO;Lu;0;L;<font> 03A1;;;;N;;;;;
+ 1D6B9;MATHEMATICAL BOLD CAPITAL THETA SYMBOL;Lu;0;L;<font> 03F4;;;;N;;;;;
+ 1D6BA;MATHEMATICAL BOLD CAPITAL SIGMA;Lu;0;L;<font> 03A3;;;;N;;;;;
+ 1D6BB;MATHEMATICAL BOLD CAPITAL TAU;Lu;0;L;<font> 03A4;;;;N;;;;;
+ 1D6BC;MATHEMATICAL BOLD CAPITAL UPSILON;Lu;0;L;<font> 03A5;;;;N;;;;;
+ 1D6BD;MATHEMATICAL BOLD CAPITAL PHI;Lu;0;L;<font> 03A6;;;;N;;;;;
+ 1D6BE;MATHEMATICAL BOLD CAPITAL CHI;Lu;0;L;<font> 03A7;;;;N;;;;;
+ 1D6BF;MATHEMATICAL BOLD CAPITAL PSI;Lu;0;L;<font> 03A8;;;;N;;;;;
+ 1D6C0;MATHEMATICAL BOLD CAPITAL OMEGA;Lu;0;L;<font> 03A9;;;;N;;;;;
+ 1D6C1;MATHEMATICAL BOLD NABLA;Sm;0;L;<font> 2207;;;;N;;;;;
+ 1D6C2;MATHEMATICAL BOLD SMALL ALPHA;Ll;0;L;<font> 03B1;;;;N;;;;;
+ 1D6C3;MATHEMATICAL BOLD SMALL BETA;Ll;0;L;<font> 03B2;;;;N;;;;;
+ 1D6C4;MATHEMATICAL BOLD SMALL GAMMA;Ll;0;L;<font> 03B3;;;;N;;;;;
+ 1D6C5;MATHEMATICAL BOLD SMALL DELTA;Ll;0;L;<font> 03B4;;;;N;;;;;
+ 1D6C6;MATHEMATICAL BOLD SMALL EPSILON;Ll;0;L;<font> 03B5;;;;N;;;;;
+ 1D6C7;MATHEMATICAL BOLD SMALL ZETA;Ll;0;L;<font> 03B6;;;;N;;;;;
+ 1D6C8;MATHEMATICAL BOLD SMALL ETA;Ll;0;L;<font> 03B7;;;;N;;;;;
+ 1D6C9;MATHEMATICAL BOLD SMALL THETA;Ll;0;L;<font> 03B8;;;;N;;;;;
+ 1D6CA;MATHEMATICAL BOLD SMALL IOTA;Ll;0;L;<font> 03B9;;;;N;;;;;
+ 1D6CB;MATHEMATICAL BOLD SMALL KAPPA;Ll;0;L;<font> 03BA;;;;N;;;;;
+ 1D6CC;MATHEMATICAL BOLD SMALL LAMDA;Ll;0;L;<font> 03BB;;;;N;;;;;
+ 1D6CD;MATHEMATICAL BOLD SMALL MU;Ll;0;L;<font> 03BC;;;;N;;;;;
+ 1D6CE;MATHEMATICAL BOLD SMALL NU;Ll;0;L;<font> 03BD;;;;N;;;;;
+ 1D6CF;MATHEMATICAL BOLD SMALL XI;Ll;0;L;<font> 03BE;;;;N;;;;;
+ 1D6D0;MATHEMATICAL BOLD SMALL OMICRON;Ll;0;L;<font> 03BF;;;;N;;;;;
+ 1D6D1;MATHEMATICAL BOLD SMALL PI;Ll;0;L;<font> 03C0;;;;N;;;;;
+ 1D6D2;MATHEMATICAL BOLD SMALL RHO;Ll;0;L;<font> 03C1;;;;N;;;;;
+ 1D6D3;MATHEMATICAL BOLD SMALL FINAL SIGMA;Ll;0;L;<font> 03C2;;;;N;;;;;
+ 1D6D4;MATHEMATICAL BOLD SMALL SIGMA;Ll;0;L;<font> 03C3;;;;N;;;;;
+ 1D6D5;MATHEMATICAL BOLD SMALL TAU;Ll;0;L;<font> 03C4;;;;N;;;;;
+ 1D6D6;MATHEMATICAL BOLD SMALL UPSILON;Ll;0;L;<font> 03C5;;;;N;;;;;
+ 1D6D7;MATHEMATICAL BOLD SMALL PHI;Ll;0;L;<font> 03C6;;;;N;;;;;
+ 1D6D8;MATHEMATICAL BOLD SMALL CHI;Ll;0;L;<font> 03C7;;;;N;;;;;
+ 1D6D9;MATHEMATICAL BOLD SMALL PSI;Ll;0;L;<font> 03C8;;;;N;;;;;
+ 1D6DA;MATHEMATICAL BOLD SMALL OMEGA;Ll;0;L;<font> 03C9;;;;N;;;;;
+ 1D6DB;MATHEMATICAL BOLD PARTIAL DIFFERENTIAL;Sm;0;ON;<font> 2202;;;;Y;;;;;
+ 1D6DC;MATHEMATICAL BOLD EPSILON SYMBOL;Ll;0;L;<font> 03F5;;;;N;;;;;
+ 1D6DD;MATHEMATICAL BOLD THETA SYMBOL;Ll;0;L;<font> 03D1;;;;N;;;;;
+ 1D6DE;MATHEMATICAL BOLD KAPPA SYMBOL;Ll;0;L;<font> 03F0;;;;N;;;;;
+ 1D6DF;MATHEMATICAL BOLD PHI SYMBOL;Ll;0;L;<font> 03D5;;;;N;;;;;
+ 1D6E0;MATHEMATICAL BOLD RHO SYMBOL;Ll;0;L;<font> 03F1;;;;N;;;;;
+ 1D6E1;MATHEMATICAL BOLD PI SYMBOL;Ll;0;L;<font> 03D6;;;;N;;;;;
+ 1D6E2;MATHEMATICAL ITALIC CAPITAL ALPHA;Lu;0;L;<font> 0391;;;;N;;;;;
+ 1D6E3;MATHEMATICAL ITALIC CAPITAL BETA;Lu;0;L;<font> 0392;;;;N;;;;;
+ 1D6E4;MATHEMATICAL ITALIC CAPITAL GAMMA;Lu;0;L;<font> 0393;;;;N;;;;;
+ 1D6E5;MATHEMATICAL ITALIC CAPITAL DELTA;Lu;0;L;<font> 0394;;;;N;;;;;
+ 1D6E6;MATHEMATICAL ITALIC CAPITAL EPSILON;Lu;0;L;<font> 0395;;;;N;;;;;
+ 1D6E7;MATHEMATICAL ITALIC CAPITAL ZETA;Lu;0;L;<font> 0396;;;;N;;;;;
+ 1D6E8;MATHEMATICAL ITALIC CAPITAL ETA;Lu;0;L;<font> 0397;;;;N;;;;;
+ 1D6E9;MATHEMATICAL ITALIC CAPITAL THETA;Lu;0;L;<font> 0398;;;;N;;;;;
+ 1D6EA;MATHEMATICAL ITALIC CAPITAL IOTA;Lu;0;L;<font> 0399;;;;N;;;;;
+ 1D6EB;MATHEMATICAL ITALIC CAPITAL KAPPA;Lu;0;L;<font> 039A;;;;N;;;;;
+ 1D6EC;MATHEMATICAL ITALIC CAPITAL LAMDA;Lu;0;L;<font> 039B;;;;N;;;;;
+ 1D6ED;MATHEMATICAL ITALIC CAPITAL MU;Lu;0;L;<font> 039C;;;;N;;;;;
+ 1D6EE;MATHEMATICAL ITALIC CAPITAL NU;Lu;0;L;<font> 039D;;;;N;;;;;
+ 1D6EF;MATHEMATICAL ITALIC CAPITAL XI;Lu;0;L;<font> 039E;;;;N;;;;;
+ 1D6F0;MATHEMATICAL ITALIC CAPITAL OMICRON;Lu;0;L;<font> 039F;;;;N;;;;;
+ 1D6F1;MATHEMATICAL ITALIC CAPITAL PI;Lu;0;L;<font> 03A0;;;;N;;;;;
+ 1D6F2;MATHEMATICAL ITALIC CAPITAL RHO;Lu;0;L;<font> 03A1;;;;N;;;;;
+ 1D6F3;MATHEMATICAL ITALIC CAPITAL THETA SYMBOL;Lu;0;L;<font> 03F4;;;;N;;;;;
+ 1D6F4;MATHEMATICAL ITALIC CAPITAL SIGMA;Lu;0;L;<font> 03A3;;;;N;;;;;
+ 1D6F5;MATHEMATICAL ITALIC CAPITAL TAU;Lu;0;L;<font> 03A4;;;;N;;;;;
+ 1D6F6;MATHEMATICAL ITALIC CAPITAL UPSILON;Lu;0;L;<font> 03A5;;;;N;;;;;
+ 1D6F7;MATHEMATICAL ITALIC CAPITAL PHI;Lu;0;L;<font> 03A6;;;;N;;;;;
+ 1D6F8;MATHEMATICAL ITALIC CAPITAL CHI;Lu;0;L;<font> 03A7;;;;N;;;;;
+ 1D6F9;MATHEMATICAL ITALIC CAPITAL PSI;Lu;0;L;<font> 03A8;;;;N;;;;;
+ 1D6FA;MATHEMATICAL ITALIC CAPITAL OMEGA;Lu;0;L;<font> 03A9;;;;N;;;;;
+ 1D6FB;MATHEMATICAL ITALIC NABLA;Sm;0;L;<font> 2207;;;;N;;;;;
+ 1D6FC;MATHEMATICAL ITALIC SMALL ALPHA;Ll;0;L;<font> 03B1;;;;N;;;;;
+ 1D6FD;MATHEMATICAL ITALIC SMALL BETA;Ll;0;L;<font> 03B2;;;;N;;;;;
+ 1D6FE;MATHEMATICAL ITALIC SMALL GAMMA;Ll;0;L;<font> 03B3;;;;N;;;;;
+ 1D6FF;MATHEMATICAL ITALIC SMALL DELTA;Ll;0;L;<font> 03B4;;;;N;;;;;
+ 1D700;MATHEMATICAL ITALIC SMALL EPSILON;Ll;0;L;<font> 03B5;;;;N;;;;;
+ 1D701;MATHEMATICAL ITALIC SMALL ZETA;Ll;0;L;<font> 03B6;;;;N;;;;;
+ 1D702;MATHEMATICAL ITALIC SMALL ETA;Ll;0;L;<font> 03B7;;;;N;;;;;
+ 1D703;MATHEMATICAL ITALIC SMALL THETA;Ll;0;L;<font> 03B8;;;;N;;;;;
+ 1D704;MATHEMATICAL ITALIC SMALL IOTA;Ll;0;L;<font> 03B9;;;;N;;;;;
+ 1D705;MATHEMATICAL ITALIC SMALL KAPPA;Ll;0;L;<font> 03BA;;;;N;;;;;
+ 1D706;MATHEMATICAL ITALIC SMALL LAMDA;Ll;0;L;<font> 03BB;;;;N;;;;;
+ 1D707;MATHEMATICAL ITALIC SMALL MU;Ll;0;L;<font> 03BC;;;;N;;;;;
+ 1D708;MATHEMATICAL ITALIC SMALL NU;Ll;0;L;<font> 03BD;;;;N;;;;;
+ 1D709;MATHEMATICAL ITALIC SMALL XI;Ll;0;L;<font> 03BE;;;;N;;;;;
+ 1D70A;MATHEMATICAL ITALIC SMALL OMICRON;Ll;0;L;<font> 03BF;;;;N;;;;;
+ 1D70B;MATHEMATICAL ITALIC SMALL PI;Ll;0;L;<font> 03C0;;;;N;;;;;
+ 1D70C;MATHEMATICAL ITALIC SMALL RHO;Ll;0;L;<font> 03C1;;;;N;;;;;
+ 1D70D;MATHEMATICAL ITALIC SMALL FINAL SIGMA;Ll;0;L;<font> 03C2;;;;N;;;;;
+ 1D70E;MATHEMATICAL ITALIC SMALL SIGMA;Ll;0;L;<font> 03C3;;;;N;;;;;
+ 1D70F;MATHEMATICAL ITALIC SMALL TAU;Ll;0;L;<font> 03C4;;;;N;;;;;
+ 1D710;MATHEMATICAL ITALIC SMALL UPSILON;Ll;0;L;<font> 03C5;;;;N;;;;;
+ 1D711;MATHEMATICAL ITALIC SMALL PHI;Ll;0;L;<font> 03C6;;;;N;;;;;
+ 1D712;MATHEMATICAL ITALIC SMALL CHI;Ll;0;L;<font> 03C7;;;;N;;;;;
+ 1D713;MATHEMATICAL ITALIC SMALL PSI;Ll;0;L;<font> 03C8;;;;N;;;;;
+ 1D714;MATHEMATICAL ITALIC SMALL OMEGA;Ll;0;L;<font> 03C9;;;;N;;;;;
+ 1D715;MATHEMATICAL ITALIC PARTIAL DIFFERENTIAL;Sm;0;ON;<font> 2202;;;;Y;;;;;
+ 1D716;MATHEMATICAL ITALIC EPSILON SYMBOL;Ll;0;L;<font> 03F5;;;;N;;;;;
+ 1D717;MATHEMATICAL ITALIC THETA SYMBOL;Ll;0;L;<font> 03D1;;;;N;;;;;
+ 1D718;MATHEMATICAL ITALIC KAPPA SYMBOL;Ll;0;L;<font> 03F0;;;;N;;;;;
+ 1D719;MATHEMATICAL ITALIC PHI SYMBOL;Ll;0;L;<font> 03D5;;;;N;;;;;
+ 1D71A;MATHEMATICAL ITALIC RHO SYMBOL;Ll;0;L;<font> 03F1;;;;N;;;;;
+ 1D71B;MATHEMATICAL ITALIC PI SYMBOL;Ll;0;L;<font> 03D6;;;;N;;;;;
+ 1D71C;MATHEMATICAL BOLD ITALIC CAPITAL ALPHA;Lu;0;L;<font> 0391;;;;N;;;;;
+ 1D71D;MATHEMATICAL BOLD ITALIC CAPITAL BETA;Lu;0;L;<font> 0392;;;;N;;;;;
+ 1D71E;MATHEMATICAL BOLD ITALIC CAPITAL GAMMA;Lu;0;L;<font> 0393;;;;N;;;;;
+ 1D71F;MATHEMATICAL BOLD ITALIC CAPITAL DELTA;Lu;0;L;<font> 0394;;;;N;;;;;
+ 1D720;MATHEMATICAL BOLD ITALIC CAPITAL EPSILON;Lu;0;L;<font> 0395;;;;N;;;;;
+ 1D721;MATHEMATICAL BOLD ITALIC CAPITAL ZETA;Lu;0;L;<font> 0396;;;;N;;;;;
+ 1D722;MATHEMATICAL BOLD ITALIC CAPITAL ETA;Lu;0;L;<font> 0397;;;;N;;;;;
+ 1D723;MATHEMATICAL BOLD ITALIC CAPITAL THETA;Lu;0;L;<font> 0398;;;;N;;;;;
+ 1D724;MATHEMATICAL BOLD ITALIC CAPITAL IOTA;Lu;0;L;<font> 0399;;;;N;;;;;
+ 1D725;MATHEMATICAL BOLD ITALIC CAPITAL KAPPA;Lu;0;L;<font> 039A;;;;N;;;;;
+ 1D726;MATHEMATICAL BOLD ITALIC CAPITAL LAMDA;Lu;0;L;<font> 039B;;;;N;;;;;
+ 1D727;MATHEMATICAL BOLD ITALIC CAPITAL MU;Lu;0;L;<font> 039C;;;;N;;;;;
+ 1D728;MATHEMATICAL BOLD ITALIC CAPITAL NU;Lu;0;L;<font> 039D;;;;N;;;;;
+ 1D729;MATHEMATICAL BOLD ITALIC CAPITAL XI;Lu;0;L;<font> 039E;;;;N;;;;;
+ 1D72A;MATHEMATICAL BOLD ITALIC CAPITAL OMICRON;Lu;0;L;<font> 039F;;;;N;;;;;
+ 1D72B;MATHEMATICAL BOLD ITALIC CAPITAL PI;Lu;0;L;<font> 03A0;;;;N;;;;;
+ 1D72C;MATHEMATICAL BOLD ITALIC CAPITAL RHO;Lu;0;L;<font> 03A1;;;;N;;;;;
+ 1D72D;MATHEMATICAL BOLD ITALIC CAPITAL THETA SYMBOL;Lu;0;L;<font> 03F4;;;;N;;;;;
+ 1D72E;MATHEMATICAL BOLD ITALIC CAPITAL SIGMA;Lu;0;L;<font> 03A3;;;;N;;;;;
+ 1D72F;MATHEMATICAL BOLD ITALIC CAPITAL TAU;Lu;0;L;<font> 03A4;;;;N;;;;;
+ 1D730;MATHEMATICAL BOLD ITALIC CAPITAL UPSILON;Lu;0;L;<font> 03A5;;;;N;;;;;
+ 1D731;MATHEMATICAL BOLD ITALIC CAPITAL PHI;Lu;0;L;<font> 03A6;;;;N;;;;;
+ 1D732;MATHEMATICAL BOLD ITALIC CAPITAL CHI;Lu;0;L;<font> 03A7;;;;N;;;;;
+ 1D733;MATHEMATICAL BOLD ITALIC CAPITAL PSI;Lu;0;L;<font> 03A8;;;;N;;;;;
+ 1D734;MATHEMATICAL BOLD ITALIC CAPITAL OMEGA;Lu;0;L;<font> 03A9;;;;N;;;;;
+ 1D735;MATHEMATICAL BOLD ITALIC NABLA;Sm;0;L;<font> 2207;;;;N;;;;;
+ 1D736;MATHEMATICAL BOLD ITALIC SMALL ALPHA;Ll;0;L;<font> 03B1;;;;N;;;;;
+ 1D737;MATHEMATICAL BOLD ITALIC SMALL BETA;Ll;0;L;<font> 03B2;;;;N;;;;;
+ 1D738;MATHEMATICAL BOLD ITALIC SMALL GAMMA;Ll;0;L;<font> 03B3;;;;N;;;;;
+ 1D739;MATHEMATICAL BOLD ITALIC SMALL DELTA;Ll;0;L;<font> 03B4;;;;N;;;;;
+ 1D73A;MATHEMATICAL BOLD ITALIC SMALL EPSILON;Ll;0;L;<font> 03B5;;;;N;;;;;
+ 1D73B;MATHEMATICAL BOLD ITALIC SMALL ZETA;Ll;0;L;<font> 03B6;;;;N;;;;;
+ 1D73C;MATHEMATICAL BOLD ITALIC SMALL ETA;Ll;0;L;<font> 03B7;;;;N;;;;;
+ 1D73D;MATHEMATICAL BOLD ITALIC SMALL THETA;Ll;0;L;<font> 03B8;;;;N;;;;;
+ 1D73E;MATHEMATICAL BOLD ITALIC SMALL IOTA;Ll;0;L;<font> 03B9;;;;N;;;;;
+ 1D73F;MATHEMATICAL BOLD ITALIC SMALL KAPPA;Ll;0;L;<font> 03BA;;;;N;;;;;
+ 1D740;MATHEMATICAL BOLD ITALIC SMALL LAMDA;Ll;0;L;<font> 03BB;;;;N;;;;;
+ 1D741;MATHEMATICAL BOLD ITALIC SMALL MU;Ll;0;L;<font> 03BC;;;;N;;;;;
+ 1D742;MATHEMATICAL BOLD ITALIC SMALL NU;Ll;0;L;<font> 03BD;;;;N;;;;;
+ 1D743;MATHEMATICAL BOLD ITALIC SMALL XI;Ll;0;L;<font> 03BE;;;;N;;;;;
+ 1D744;MATHEMATICAL BOLD ITALIC SMALL OMICRON;Ll;0;L;<font> 03BF;;;;N;;;;;
+ 1D745;MATHEMATICAL BOLD ITALIC SMALL PI;Ll;0;L;<font> 03C0;;;;N;;;;;
+ 1D746;MATHEMATICAL BOLD ITALIC SMALL RHO;Ll;0;L;<font> 03C1;;;;N;;;;;
+ 1D747;MATHEMATICAL BOLD ITALIC SMALL FINAL SIGMA;Ll;0;L;<font> 03C2;;;;N;;;;;
+ 1D748;MATHEMATICAL BOLD ITALIC SMALL SIGMA;Ll;0;L;<font> 03C3;;;;N;;;;;
+ 1D749;MATHEMATICAL BOLD ITALIC SMALL TAU;Ll;0;L;<font> 03C4;;;;N;;;;;
+ 1D74A;MATHEMATICAL BOLD ITALIC SMALL UPSILON;Ll;0;L;<font> 03C5;;;;N;;;;;
+ 1D74B;MATHEMATICAL BOLD ITALIC SMALL PHI;Ll;0;L;<font> 03C6;;;;N;;;;;
+ 1D74C;MATHEMATICAL BOLD ITALIC SMALL CHI;Ll;0;L;<font> 03C7;;;;N;;;;;
+ 1D74D;MATHEMATICAL BOLD ITALIC SMALL PSI;Ll;0;L;<font> 03C8;;;;N;;;;;
+ 1D74E;MATHEMATICAL BOLD ITALIC SMALL OMEGA;Ll;0;L;<font> 03C9;;;;N;;;;;
+ 1D74F;MATHEMATICAL BOLD ITALIC PARTIAL DIFFERENTIAL;Sm;0;ON;<font> 2202;;;;Y;;;;;
+ 1D750;MATHEMATICAL BOLD ITALIC EPSILON SYMBOL;Ll;0;L;<font> 03F5;;;;N;;;;;
+ 1D751;MATHEMATICAL BOLD ITALIC THETA SYMBOL;Ll;0;L;<font> 03D1;;;;N;;;;;
+ 1D752;MATHEMATICAL BOLD ITALIC KAPPA SYMBOL;Ll;0;L;<font> 03F0;;;;N;;;;;
+ 1D753;MATHEMATICAL BOLD ITALIC PHI SYMBOL;Ll;0;L;<font> 03D5;;;;N;;;;;
+ 1D754;MATHEMATICAL BOLD ITALIC RHO SYMBOL;Ll;0;L;<font> 03F1;;;;N;;;;;
+ 1D755;MATHEMATICAL BOLD ITALIC PI SYMBOL;Ll;0;L;<font> 03D6;;;;N;;;;;
+ 1D756;MATHEMATICAL SANS-SERIF BOLD CAPITAL ALPHA;Lu;0;L;<font> 0391;;;;N;;;;;
+ 1D757;MATHEMATICAL SANS-SERIF BOLD CAPITAL BETA;Lu;0;L;<font> 0392;;;;N;;;;;
+ 1D758;MATHEMATICAL SANS-SERIF BOLD CAPITAL GAMMA;Lu;0;L;<font> 0393;;;;N;;;;;
+ 1D759;MATHEMATICAL SANS-SERIF BOLD CAPITAL DELTA;Lu;0;L;<font> 0394;;;;N;;;;;
+ 1D75A;MATHEMATICAL SANS-SERIF BOLD CAPITAL EPSILON;Lu;0;L;<font> 0395;;;;N;;;;;
+ 1D75B;MATHEMATICAL SANS-SERIF BOLD CAPITAL ZETA;Lu;0;L;<font> 0396;;;;N;;;;;
+ 1D75C;MATHEMATICAL SANS-SERIF BOLD CAPITAL ETA;Lu;0;L;<font> 0397;;;;N;;;;;
+ 1D75D;MATHEMATICAL SANS-SERIF BOLD CAPITAL THETA;Lu;0;L;<font> 0398;;;;N;;;;;
+ 1D75E;MATHEMATICAL SANS-SERIF BOLD CAPITAL IOTA;Lu;0;L;<font> 0399;;;;N;;;;;
+ 1D75F;MATHEMATICAL SANS-SERIF BOLD CAPITAL KAPPA;Lu;0;L;<font> 039A;;;;N;;;;;
+ 1D760;MATHEMATICAL SANS-SERIF BOLD CAPITAL LAMDA;Lu;0;L;<font> 039B;;;;N;;;;;
+ 1D761;MATHEMATICAL SANS-SERIF BOLD CAPITAL MU;Lu;0;L;<font> 039C;;;;N;;;;;
+ 1D762;MATHEMATICAL SANS-SERIF BOLD CAPITAL NU;Lu;0;L;<font> 039D;;;;N;;;;;
+ 1D763;MATHEMATICAL SANS-SERIF BOLD CAPITAL XI;Lu;0;L;<font> 039E;;;;N;;;;;
+ 1D764;MATHEMATICAL SANS-SERIF BOLD CAPITAL OMICRON;Lu;0;L;<font> 039F;;;;N;;;;;
+ 1D765;MATHEMATICAL SANS-SERIF BOLD CAPITAL PI;Lu;0;L;<font> 03A0;;;;N;;;;;
+ 1D766;MATHEMATICAL SANS-SERIF BOLD CAPITAL RHO;Lu;0;L;<font> 03A1;;;;N;;;;;
+ 1D767;MATHEMATICAL SANS-SERIF BOLD CAPITAL THETA SYMBOL;Lu;0;L;<font> 03F4;;;;N;;;;;
+ 1D768;MATHEMATICAL SANS-SERIF BOLD CAPITAL SIGMA;Lu;0;L;<font> 03A3;;;;N;;;;;
+ 1D769;MATHEMATICAL SANS-SERIF BOLD CAPITAL TAU;Lu;0;L;<font> 03A4;;;;N;;;;;
+ 1D76A;MATHEMATICAL SANS-SERIF BOLD CAPITAL UPSILON;Lu;0;L;<font> 03A5;;;;N;;;;;
+ 1D76B;MATHEMATICAL SANS-SERIF BOLD CAPITAL PHI;Lu;0;L;<font> 03A6;;;;N;;;;;
+ 1D76C;MATHEMATICAL SANS-SERIF BOLD CAPITAL CHI;Lu;0;L;<font> 03A7;;;;N;;;;;
+ 1D76D;MATHEMATICAL SANS-SERIF BOLD CAPITAL PSI;Lu;0;L;<font> 03A8;;;;N;;;;;
+ 1D76E;MATHEMATICAL SANS-SERIF BOLD CAPITAL OMEGA;Lu;0;L;<font> 03A9;;;;N;;;;;
+ 1D76F;MATHEMATICAL SANS-SERIF BOLD NABLA;Sm;0;L;<font> 2207;;;;N;;;;;
+ 1D770;MATHEMATICAL SANS-SERIF BOLD SMALL ALPHA;Ll;0;L;<font> 03B1;;;;N;;;;;
+ 1D771;MATHEMATICAL SANS-SERIF BOLD SMALL BETA;Ll;0;L;<font> 03B2;;;;N;;;;;
+ 1D772;MATHEMATICAL SANS-SERIF BOLD SMALL GAMMA;Ll;0;L;<font> 03B3;;;;N;;;;;
+ 1D773;MATHEMATICAL SANS-SERIF BOLD SMALL DELTA;Ll;0;L;<font> 03B4;;;;N;;;;;
+ 1D774;MATHEMATICAL SANS-SERIF BOLD SMALL EPSILON;Ll;0;L;<font> 03B5;;;;N;;;;;
+ 1D775;MATHEMATICAL SANS-SERIF BOLD SMALL ZETA;Ll;0;L;<font> 03B6;;;;N;;;;;
+ 1D776;MATHEMATICAL SANS-SERIF BOLD SMALL ETA;Ll;0;L;<font> 03B7;;;;N;;;;;
+ 1D777;MATHEMATICAL SANS-SERIF BOLD SMALL THETA;Ll;0;L;<font> 03B8;;;;N;;;;;
+ 1D778;MATHEMATICAL SANS-SERIF BOLD SMALL IOTA;Ll;0;L;<font> 03B9;;;;N;;;;;
+ 1D779;MATHEMATICAL SANS-SERIF BOLD SMALL KAPPA;Ll;0;L;<font> 03BA;;;;N;;;;;
+ 1D77A;MATHEMATICAL SANS-SERIF BOLD SMALL LAMDA;Ll;0;L;<font> 03BB;;;;N;;;;;
+ 1D77B;MATHEMATICAL SANS-SERIF BOLD SMALL MU;Ll;0;L;<font> 03BC;;;;N;;;;;
+ 1D77C;MATHEMATICAL SANS-SERIF BOLD SMALL NU;Ll;0;L;<font> 03BD;;;;N;;;;;
+ 1D77D;MATHEMATICAL SANS-SERIF BOLD SMALL XI;Ll;0;L;<font> 03BE;;;;N;;;;;
+ 1D77E;MATHEMATICAL SANS-SERIF BOLD SMALL OMICRON;Ll;0;L;<font> 03BF;;;;N;;;;;
+ 1D77F;MATHEMATICAL SANS-SERIF BOLD SMALL PI;Ll;0;L;<font> 03C0;;;;N;;;;;
+ 1D780;MATHEMATICAL SANS-SERIF BOLD SMALL RHO;Ll;0;L;<font> 03C1;;;;N;;;;;
+ 1D781;MATHEMATICAL SANS-SERIF BOLD SMALL FINAL SIGMA;Ll;0;L;<font> 03C2;;;;N;;;;;
+ 1D782;MATHEMATICAL SANS-SERIF BOLD SMALL SIGMA;Ll;0;L;<font> 03C3;;;;N;;;;;
+ 1D783;MATHEMATICAL SANS-SERIF BOLD SMALL TAU;Ll;0;L;<font> 03C4;;;;N;;;;;
+ 1D784;MATHEMATICAL SANS-SERIF BOLD SMALL UPSILON;Ll;0;L;<font> 03C5;;;;N;;;;;
+ 1D785;MATHEMATICAL SANS-SERIF BOLD SMALL PHI;Ll;0;L;<font> 03C6;;;;N;;;;;
+ 1D786;MATHEMATICAL SANS-SERIF BOLD SMALL CHI;Ll;0;L;<font> 03C7;;;;N;;;;;
+ 1D787;MATHEMATICAL SANS-SERIF BOLD SMALL PSI;Ll;0;L;<font> 03C8;;;;N;;;;;
+ 1D788;MATHEMATICAL SANS-SERIF BOLD SMALL OMEGA;Ll;0;L;<font> 03C9;;;;N;;;;;
+ 1D789;MATHEMATICAL SANS-SERIF BOLD PARTIAL DIFFERENTIAL;Sm;0;ON;<font> 2202;;;;Y;;;;;
+ 1D78A;MATHEMATICAL SANS-SERIF BOLD EPSILON SYMBOL;Ll;0;L;<font> 03F5;;;;N;;;;;
+ 1D78B;MATHEMATICAL SANS-SERIF BOLD THETA SYMBOL;Ll;0;L;<font> 03D1;;;;N;;;;;
+ 1D78C;MATHEMATICAL SANS-SERIF BOLD KAPPA SYMBOL;Ll;0;L;<font> 03F0;;;;N;;;;;
+ 1D78D;MATHEMATICAL SANS-SERIF BOLD PHI SYMBOL;Ll;0;L;<font> 03D5;;;;N;;;;;
+ 1D78E;MATHEMATICAL SANS-SERIF BOLD RHO SYMBOL;Ll;0;L;<font> 03F1;;;;N;;;;;
+ 1D78F;MATHEMATICAL SANS-SERIF BOLD PI SYMBOL;Ll;0;L;<font> 03D6;;;;N;;;;;
+ 1D790;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL ALPHA;Lu;0;L;<font> 0391;;;;N;;;;;
+ 1D791;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL BETA;Lu;0;L;<font> 0392;;;;N;;;;;
+ 1D792;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL GAMMA;Lu;0;L;<font> 0393;;;;N;;;;;
+ 1D793;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL DELTA;Lu;0;L;<font> 0394;;;;N;;;;;
+ 1D794;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL EPSILON;Lu;0;L;<font> 0395;;;;N;;;;;
+ 1D795;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL ZETA;Lu;0;L;<font> 0396;;;;N;;;;;
+ 1D796;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL ETA;Lu;0;L;<font> 0397;;;;N;;;;;
+ 1D797;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL THETA;Lu;0;L;<font> 0398;;;;N;;;;;
+ 1D798;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL IOTA;Lu;0;L;<font> 0399;;;;N;;;;;
+ 1D799;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL KAPPA;Lu;0;L;<font> 039A;;;;N;;;;;
+ 1D79A;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL LAMDA;Lu;0;L;<font> 039B;;;;N;;;;;
+ 1D79B;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL MU;Lu;0;L;<font> 039C;;;;N;;;;;
+ 1D79C;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL NU;Lu;0;L;<font> 039D;;;;N;;;;;
+ 1D79D;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL XI;Lu;0;L;<font> 039E;;;;N;;;;;
+ 1D79E;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL OMICRON;Lu;0;L;<font> 039F;;;;N;;;;;
+ 1D79F;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL PI;Lu;0;L;<font> 03A0;;;;N;;;;;
+ 1D7A0;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL RHO;Lu;0;L;<font> 03A1;;;;N;;;;;
+ 1D7A1;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL THETA SYMBOL;Lu;0;L;<font> 03F4;;;;N;;;;;
+ 1D7A2;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL SIGMA;Lu;0;L;<font> 03A3;;;;N;;;;;
+ 1D7A3;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL TAU;Lu;0;L;<font> 03A4;;;;N;;;;;
+ 1D7A4;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL UPSILON;Lu;0;L;<font> 03A5;;;;N;;;;;
+ 1D7A5;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL PHI;Lu;0;L;<font> 03A6;;;;N;;;;;
+ 1D7A6;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL CHI;Lu;0;L;<font> 03A7;;;;N;;;;;
+ 1D7A7;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL PSI;Lu;0;L;<font> 03A8;;;;N;;;;;
+ 1D7A8;MATHEMATICAL SANS-SERIF BOLD ITALIC CAPITAL OMEGA;Lu;0;L;<font> 03A9;;;;N;;;;;
+ 1D7A9;MATHEMATICAL SANS-SERIF BOLD ITALIC NABLA;Sm;0;L;<font> 2207;;;;N;;;;;
+ 1D7AA;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL ALPHA;Ll;0;L;<font> 03B1;;;;N;;;;;
+ 1D7AB;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL BETA;Ll;0;L;<font> 03B2;;;;N;;;;;
+ 1D7AC;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL GAMMA;Ll;0;L;<font> 03B3;;;;N;;;;;
+ 1D7AD;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL DELTA;Ll;0;L;<font> 03B4;;;;N;;;;;
+ 1D7AE;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL EPSILON;Ll;0;L;<font> 03B5;;;;N;;;;;
+ 1D7AF;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL ZETA;Ll;0;L;<font> 03B6;;;;N;;;;;
+ 1D7B0;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL ETA;Ll;0;L;<font> 03B7;;;;N;;;;;
+ 1D7B1;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL THETA;Ll;0;L;<font> 03B8;;;;N;;;;;
+ 1D7B2;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL IOTA;Ll;0;L;<font> 03B9;;;;N;;;;;
+ 1D7B3;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL KAPPA;Ll;0;L;<font> 03BA;;;;N;;;;;
+ 1D7B4;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL LAMDA;Ll;0;L;<font> 03BB;;;;N;;;;;
+ 1D7B5;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL MU;Ll;0;L;<font> 03BC;;;;N;;;;;
+ 1D7B6;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL NU;Ll;0;L;<font> 03BD;;;;N;;;;;
+ 1D7B7;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL XI;Ll;0;L;<font> 03BE;;;;N;;;;;
+ 1D7B8;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL OMICRON;Ll;0;L;<font> 03BF;;;;N;;;;;
+ 1D7B9;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL PI;Ll;0;L;<font> 03C0;;;;N;;;;;
+ 1D7BA;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL RHO;Ll;0;L;<font> 03C1;;;;N;;;;;
+ 1D7BB;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL FINAL SIGMA;Ll;0;L;<font> 03C2;;;;N;;;;;
+ 1D7BC;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL SIGMA;Ll;0;L;<font> 03C3;;;;N;;;;;
+ 1D7BD;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL TAU;Ll;0;L;<font> 03C4;;;;N;;;;;
+ 1D7BE;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL UPSILON;Ll;0;L;<font> 03C5;;;;N;;;;;
+ 1D7BF;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL PHI;Ll;0;L;<font> 03C6;;;;N;;;;;
+ 1D7C0;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL CHI;Ll;0;L;<font> 03C7;;;;N;;;;;
+ 1D7C1;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL PSI;Ll;0;L;<font> 03C8;;;;N;;;;;
+ 1D7C2;MATHEMATICAL SANS-SERIF BOLD ITALIC SMALL OMEGA;Ll;0;L;<font> 03C9;;;;N;;;;;
+ 1D7C3;MATHEMATICAL SANS-SERIF BOLD ITALIC PARTIAL DIFFERENTIAL;Sm;0;ON;<font> 2202;;;;Y;;;;;
+ 1D7C4;MATHEMATICAL SANS-SERIF BOLD ITALIC EPSILON SYMBOL;Ll;0;L;<font> 03F5;;;;N;;;;;
+ 1D7C5;MATHEMATICAL SANS-SERIF BOLD ITALIC THETA SYMBOL;Ll;0;L;<font> 03D1;;;;N;;;;;
+ 1D7C6;MATHEMATICAL SANS-SERIF BOLD ITALIC KAPPA SYMBOL;Ll;0;L;<font> 03F0;;;;N;;;;;
+ 1D7C7;MATHEMATICAL SANS-SERIF BOLD ITALIC PHI SYMBOL;Ll;0;L;<font> 03D5;;;;N;;;;;
+ 1D7C8;MATHEMATICAL SANS-SERIF BOLD ITALIC RHO SYMBOL;Ll;0;L;<font> 03F1;;;;N;;;;;
+ 1D7C9;MATHEMATICAL SANS-SERIF BOLD ITALIC PI SYMBOL;Ll;0;L;<font> 03D6;;;;N;;;;;
+ 1D7CA;MATHEMATICAL BOLD CAPITAL DIGAMMA;Lu;0;L;<font> 03DC;;;;N;;;;;
+ 1D7CB;MATHEMATICAL BOLD SMALL DIGAMMA;Ll;0;L;<font> 03DD;;;;N;;;;;
+ 1D7CE;MATHEMATICAL BOLD DIGIT ZERO;Nd;0;EN;<font> 0030;0;0;0;N;;;;;
+ 1D7CF;MATHEMATICAL BOLD DIGIT ONE;Nd;0;EN;<font> 0031;1;1;1;N;;;;;
+ 1D7D0;MATHEMATICAL BOLD DIGIT TWO;Nd;0;EN;<font> 0032;2;2;2;N;;;;;
+ 1D7D1;MATHEMATICAL BOLD DIGIT THREE;Nd;0;EN;<font> 0033;3;3;3;N;;;;;
+ 1D7D2;MATHEMATICAL BOLD DIGIT FOUR;Nd;0;EN;<font> 0034;4;4;4;N;;;;;
+ 1D7D3;MATHEMATICAL BOLD DIGIT FIVE;Nd;0;EN;<font> 0035;5;5;5;N;;;;;
+ 1D7D4;MATHEMATICAL BOLD DIGIT SIX;Nd;0;EN;<font> 0036;6;6;6;N;;;;;
+ 1D7D5;MATHEMATICAL BOLD DIGIT SEVEN;Nd;0;EN;<font> 0037;7;7;7;N;;;;;
+ 1D7D6;MATHEMATICAL BOLD DIGIT EIGHT;Nd;0;EN;<font> 0038;8;8;8;N;;;;;
+ 1D7D7;MATHEMATICAL BOLD DIGIT NINE;Nd;0;EN;<font> 0039;9;9;9;N;;;;;
+ 1D7D8;MATHEMATICAL DOUBLE-STRUCK DIGIT ZERO;Nd;0;EN;<font> 0030;0;0;0;N;;;;;
+ 1D7D9;MATHEMATICAL DOUBLE-STRUCK DIGIT ONE;Nd;0;EN;<font> 0031;1;1;1;N;;;;;
+ 1D7DA;MATHEMATICAL DOUBLE-STRUCK DIGIT TWO;Nd;0;EN;<font> 0032;2;2;2;N;;;;;
+ 1D7DB;MATHEMATICAL DOUBLE-STRUCK DIGIT THREE;Nd;0;EN;<font> 0033;3;3;3;N;;;;;
+ 1D7DC;MATHEMATICAL DOUBLE-STRUCK DIGIT FOUR;Nd;0;EN;<font> 0034;4;4;4;N;;;;;
+ 1D7DD;MATHEMATICAL DOUBLE-STRUCK DIGIT FIVE;Nd;0;EN;<font> 0035;5;5;5;N;;;;;
+ 1D7DE;MATHEMATICAL DOUBLE-STRUCK DIGIT SIX;Nd;0;EN;<font> 0036;6;6;6;N;;;;;
+ 1D7DF;MATHEMATICAL DOUBLE-STRUCK DIGIT SEVEN;Nd;0;EN;<font> 0037;7;7;7;N;;;;;
+ 1D7E0;MATHEMATICAL DOUBLE-STRUCK DIGIT EIGHT;Nd;0;EN;<font> 0038;8;8;8;N;;;;;
+ 1D7E1;MATHEMATICAL DOUBLE-STRUCK DIGIT NINE;Nd;0;EN;<font> 0039;9;9;9;N;;;;;
+ 1D7E2;MATHEMATICAL SANS-SERIF DIGIT ZERO;Nd;0;EN;<font> 0030;0;0;0;N;;;;;
+ 1D7E3;MATHEMATICAL SANS-SERIF DIGIT ONE;Nd;0;EN;<font> 0031;1;1;1;N;;;;;
+ 1D7E4;MATHEMATICAL SANS-SERIF DIGIT TWO;Nd;0;EN;<font> 0032;2;2;2;N;;;;;
+ 1D7E5;MATHEMATICAL SANS-SERIF DIGIT THREE;Nd;0;EN;<font> 0033;3;3;3;N;;;;;
+ 1D7E6;MATHEMATICAL SANS-SERIF DIGIT FOUR;Nd;0;EN;<font> 0034;4;4;4;N;;;;;
+ 1D7E7;MATHEMATICAL SANS-SERIF DIGIT FIVE;Nd;0;EN;<font> 0035;5;5;5;N;;;;;
+ 1D7E8;MATHEMATICAL SANS-SERIF DIGIT SIX;Nd;0;EN;<font> 0036;6;6;6;N;;;;;
+ 1D7E9;MATHEMATICAL SANS-SERIF DIGIT SEVEN;Nd;0;EN;<font> 0037;7;7;7;N;;;;;
+ 1D7EA;MATHEMATICAL SANS-SERIF DIGIT EIGHT;Nd;0;EN;<font> 0038;8;8;8;N;;;;;
+ 1D7EB;MATHEMATICAL SANS-SERIF DIGIT NINE;Nd;0;EN;<font> 0039;9;9;9;N;;;;;
+ 1D7EC;MATHEMATICAL SANS-SERIF BOLD DIGIT ZERO;Nd;0;EN;<font> 0030;0;0;0;N;;;;;
+ 1D7ED;MATHEMATICAL SANS-SERIF BOLD DIGIT ONE;Nd;0;EN;<font> 0031;1;1;1;N;;;;;
+ 1D7EE;MATHEMATICAL SANS-SERIF BOLD DIGIT TWO;Nd;0;EN;<font> 0032;2;2;2;N;;;;;
+ 1D7EF;MATHEMATICAL SANS-SERIF BOLD DIGIT THREE;Nd;0;EN;<font> 0033;3;3;3;N;;;;;
+ 1D7F0;MATHEMATICAL SANS-SERIF BOLD DIGIT FOUR;Nd;0;EN;<font> 0034;4;4;4;N;;;;;
+ 1D7F1;MATHEMATICAL SANS-SERIF BOLD DIGIT FIVE;Nd;0;EN;<font> 0035;5;5;5;N;;;;;
+ 1D7F2;MATHEMATICAL SANS-SERIF BOLD DIGIT SIX;Nd;0;EN;<font> 0036;6;6;6;N;;;;;
+ 1D7F3;MATHEMATICAL SANS-SERIF BOLD DIGIT SEVEN;Nd;0;EN;<font> 0037;7;7;7;N;;;;;
+ 1D7F4;MATHEMATICAL SANS-SERIF BOLD DIGIT EIGHT;Nd;0;EN;<font> 0038;8;8;8;N;;;;;
+ 1D7F5;MATHEMATICAL SANS-SERIF BOLD DIGIT NINE;Nd;0;EN;<font> 0039;9;9;9;N;;;;;
+ 1D7F6;MATHEMATICAL MONOSPACE DIGIT ZERO;Nd;0;EN;<font> 0030;0;0;0;N;;;;;
+ 1D7F7;MATHEMATICAL MONOSPACE DIGIT ONE;Nd;0;EN;<font> 0031;1;1;1;N;;;;;
+ 1D7F8;MATHEMATICAL MONOSPACE DIGIT TWO;Nd;0;EN;<font> 0032;2;2;2;N;;;;;
+ 1D7F9;MATHEMATICAL MONOSPACE DIGIT THREE;Nd;0;EN;<font> 0033;3;3;3;N;;;;;
+ 1D7FA;MATHEMATICAL MONOSPACE DIGIT FOUR;Nd;0;EN;<font> 0034;4;4;4;N;;;;;
+ 1D7FB;MATHEMATICAL MONOSPACE DIGIT FIVE;Nd;0;EN;<font> 0035;5;5;5;N;;;;;
+ 1D7FC;MATHEMATICAL MONOSPACE DIGIT SIX;Nd;0;EN;<font> 0036;6;6;6;N;;;;;
+ 1D7FD;MATHEMATICAL MONOSPACE DIGIT SEVEN;Nd;0;EN;<font> 0037;7;7;7;N;;;;;
+ 1D7FE;MATHEMATICAL MONOSPACE DIGIT EIGHT;Nd;0;EN;<font> 0038;8;8;8;N;;;;;
+ 1D7FF;MATHEMATICAL MONOSPACE DIGIT NINE;Nd;0;EN;<font> 0039;9;9;9;N;;;;;
+ 1D800;SIGNWRITING HAND-FIST INDEX;So;0;L;;;;;N;;;;;
+ 1D801;SIGNWRITING HAND-CIRCLE INDEX;So;0;L;;;;;N;;;;;
+ 1D802;SIGNWRITING HAND-CUP INDEX;So;0;L;;;;;N;;;;;
+ 1D803;SIGNWRITING HAND-OVAL INDEX;So;0;L;;;;;N;;;;;
+ 1D804;SIGNWRITING HAND-HINGE INDEX;So;0;L;;;;;N;;;;;
+ 1D805;SIGNWRITING HAND-ANGLE INDEX;So;0;L;;;;;N;;;;;
+ 1D806;SIGNWRITING HAND-FIST INDEX BENT;So;0;L;;;;;N;;;;;
+ 1D807;SIGNWRITING HAND-CIRCLE INDEX BENT;So;0;L;;;;;N;;;;;
+ 1D808;SIGNWRITING HAND-FIST THUMB UNDER INDEX BENT;So;0;L;;;;;N;;;;;
+ 1D809;SIGNWRITING HAND-FIST INDEX RAISED KNUCKLE;So;0;L;;;;;N;;;;;
+ 1D80A;SIGNWRITING HAND-FIST INDEX CUPPED;So;0;L;;;;;N;;;;;
+ 1D80B;SIGNWRITING HAND-FIST INDEX HINGED;So;0;L;;;;;N;;;;;
+ 1D80C;SIGNWRITING HAND-FIST INDEX HINGED LOW;So;0;L;;;;;N;;;;;
+ 1D80D;SIGNWRITING HAND-CIRCLE INDEX HINGE;So;0;L;;;;;N;;;;;
+ 1D80E;SIGNWRITING HAND-FIST INDEX MIDDLE;So;0;L;;;;;N;;;;;
+ 1D80F;SIGNWRITING HAND-CIRCLE INDEX MIDDLE;So;0;L;;;;;N;;;;;
+ 1D810;SIGNWRITING HAND-FIST INDEX MIDDLE BENT;So;0;L;;;;;N;;;;;
+ 1D811;SIGNWRITING HAND-FIST INDEX MIDDLE RAISED KNUCKLES;So;0;L;;;;;N;;;;;
+ 1D812;SIGNWRITING HAND-FIST INDEX MIDDLE HINGED;So;0;L;;;;;N;;;;;
+ 1D813;SIGNWRITING HAND-FIST INDEX UP MIDDLE HINGED;So;0;L;;;;;N;;;;;
+ 1D814;SIGNWRITING HAND-FIST INDEX HINGED MIDDLE UP;So;0;L;;;;;N;;;;;
+ 1D815;SIGNWRITING HAND-FIST INDEX MIDDLE CONJOINED;So;0;L;;;;;N;;;;;
+ 1D816;SIGNWRITING HAND-FIST INDEX MIDDLE CONJOINED INDEX BENT;So;0;L;;;;;N;;;;;
+ 1D817;SIGNWRITING HAND-FIST INDEX MIDDLE CONJOINED MIDDLE BENT;So;0;L;;;;;N;;;;;
+ 1D818;SIGNWRITING HAND-FIST INDEX MIDDLE CONJOINED CUPPED;So;0;L;;;;;N;;;;;
+ 1D819;SIGNWRITING HAND-FIST INDEX MIDDLE CONJOINED HINGED;So;0;L;;;;;N;;;;;
+ 1D81A;SIGNWRITING HAND-FIST INDEX MIDDLE CROSSED;So;0;L;;;;;N;;;;;
+ 1D81B;SIGNWRITING HAND-CIRCLE INDEX MIDDLE CROSSED;So;0;L;;;;;N;;;;;
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+ 1D8D7;SIGNWRITING HAND-CLAW MIDDLE RING LITTLE CONJOINED SIDE;So;0;L;;;;;N;;;;;
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+ 1D8F9;SIGNWRITING HAND-FIST THUMB SIDE BENT;So;0;L;;;;;N;;;;;
+ 1D8FA;SIGNWRITING HAND-FIST THUMB FORWARD;So;0;L;;;;;N;;;;;
+ 1D8FB;SIGNWRITING HAND-FIST THUMB BETWEEN INDEX MIDDLE;So;0;L;;;;;N;;;;;
+ 1D8FC;SIGNWRITING HAND-FIST THUMB BETWEEN MIDDLE RING;So;0;L;;;;;N;;;;;
+ 1D8FD;SIGNWRITING HAND-FIST THUMB BETWEEN RING LITTLE;So;0;L;;;;;N;;;;;
+ 1D8FE;SIGNWRITING HAND-FIST THUMB UNDER TWO FINGERS;So;0;L;;;;;N;;;;;
+ 1D8FF;SIGNWRITING HAND-FIST THUMB OVER TWO FINGERS;So;0;L;;;;;N;;;;;
+ 1D900;SIGNWRITING HAND-FIST THUMB UNDER THREE FINGERS;So;0;L;;;;;N;;;;;
+ 1D901;SIGNWRITING HAND-FIST THUMB UNDER FOUR FINGERS;So;0;L;;;;;N;;;;;
+ 1D902;SIGNWRITING HAND-FIST THUMB OVER FOUR RAISED KNUCKLES;So;0;L;;;;;N;;;;;
+ 1D903;SIGNWRITING HAND-FIST;So;0;L;;;;;N;;;;;
+ 1D904;SIGNWRITING HAND-FIST HEEL;So;0;L;;;;;N;;;;;
+ 1D905;SIGNWRITING TOUCH SINGLE;So;0;L;;;;;N;;;;;
+ 1D906;SIGNWRITING TOUCH MULTIPLE;So;0;L;;;;;N;;;;;
+ 1D907;SIGNWRITING TOUCH BETWEEN;So;0;L;;;;;N;;;;;
+ 1D908;SIGNWRITING GRASP SINGLE;So;0;L;;;;;N;;;;;
+ 1D909;SIGNWRITING GRASP MULTIPLE;So;0;L;;;;;N;;;;;
+ 1D90A;SIGNWRITING GRASP BETWEEN;So;0;L;;;;;N;;;;;
+ 1D90B;SIGNWRITING STRIKE SINGLE;So;0;L;;;;;N;;;;;
+ 1D90C;SIGNWRITING STRIKE MULTIPLE;So;0;L;;;;;N;;;;;
+ 1D90D;SIGNWRITING STRIKE BETWEEN;So;0;L;;;;;N;;;;;
+ 1D90E;SIGNWRITING BRUSH SINGLE;So;0;L;;;;;N;;;;;
+ 1D90F;SIGNWRITING BRUSH MULTIPLE;So;0;L;;;;;N;;;;;
+ 1D910;SIGNWRITING BRUSH BETWEEN;So;0;L;;;;;N;;;;;
+ 1D911;SIGNWRITING RUB SINGLE;So;0;L;;;;;N;;;;;
+ 1D912;SIGNWRITING RUB MULTIPLE;So;0;L;;;;;N;;;;;
+ 1D913;SIGNWRITING RUB BETWEEN;So;0;L;;;;;N;;;;;
+ 1D914;SIGNWRITING SURFACE SYMBOLS;So;0;L;;;;;N;;;;;
+ 1D915;SIGNWRITING SURFACE BETWEEN;So;0;L;;;;;N;;;;;
+ 1D916;SIGNWRITING SQUEEZE LARGE SINGLE;So;0;L;;;;;N;;;;;
+ 1D917;SIGNWRITING SQUEEZE SMALL SINGLE;So;0;L;;;;;N;;;;;
+ 1D918;SIGNWRITING SQUEEZE LARGE MULTIPLE;So;0;L;;;;;N;;;;;
+ 1D919;SIGNWRITING SQUEEZE SMALL MULTIPLE;So;0;L;;;;;N;;;;;
+ 1D91A;SIGNWRITING SQUEEZE SEQUENTIAL;So;0;L;;;;;N;;;;;
+ 1D91B;SIGNWRITING FLICK LARGE SINGLE;So;0;L;;;;;N;;;;;
+ 1D91C;SIGNWRITING FLICK SMALL SINGLE;So;0;L;;;;;N;;;;;
+ 1D91D;SIGNWRITING FLICK LARGE MULTIPLE;So;0;L;;;;;N;;;;;
+ 1D91E;SIGNWRITING FLICK SMALL MULTIPLE;So;0;L;;;;;N;;;;;
+ 1D91F;SIGNWRITING FLICK SEQUENTIAL;So;0;L;;;;;N;;;;;
+ 1D920;SIGNWRITING SQUEEZE FLICK ALTERNATING;So;0;L;;;;;N;;;;;
+ 1D921;SIGNWRITING MOVEMENT-HINGE UP DOWN LARGE;So;0;L;;;;;N;;;;;
+ 1D922;SIGNWRITING MOVEMENT-HINGE UP DOWN SMALL;So;0;L;;;;;N;;;;;
+ 1D923;SIGNWRITING MOVEMENT-HINGE UP SEQUENTIAL;So;0;L;;;;;N;;;;;
+ 1D924;SIGNWRITING MOVEMENT-HINGE DOWN SEQUENTIAL;So;0;L;;;;;N;;;;;
+ 1D925;SIGNWRITING MOVEMENT-HINGE UP DOWN ALTERNATING LARGE;So;0;L;;;;;N;;;;;
+ 1D926;SIGNWRITING MOVEMENT-HINGE UP DOWN ALTERNATING SMALL;So;0;L;;;;;N;;;;;
+ 1D927;SIGNWRITING MOVEMENT-HINGE SIDE TO SIDE SCISSORS;So;0;L;;;;;N;;;;;
+ 1D928;SIGNWRITING MOVEMENT-WALLPLANE FINGER CONTACT;So;0;L;;;;;N;;;;;
+ 1D929;SIGNWRITING MOVEMENT-FLOORPLANE FINGER CONTACT;So;0;L;;;;;N;;;;;
+ 1D92A;SIGNWRITING MOVEMENT-WALLPLANE SINGLE STRAIGHT SMALL;So;0;L;;;;;N;;;;;
+ 1D92B;SIGNWRITING MOVEMENT-WALLPLANE SINGLE STRAIGHT MEDIUM;So;0;L;;;;;N;;;;;
+ 1D92C;SIGNWRITING MOVEMENT-WALLPLANE SINGLE STRAIGHT LARGE;So;0;L;;;;;N;;;;;
+ 1D92D;SIGNWRITING MOVEMENT-WALLPLANE SINGLE STRAIGHT LARGEST;So;0;L;;;;;N;;;;;
+ 1D92E;SIGNWRITING MOVEMENT-WALLPLANE SINGLE WRIST FLEX;So;0;L;;;;;N;;;;;
+ 1D92F;SIGNWRITING MOVEMENT-WALLPLANE DOUBLE STRAIGHT;So;0;L;;;;;N;;;;;
+ 1D930;SIGNWRITING MOVEMENT-WALLPLANE DOUBLE WRIST FLEX;So;0;L;;;;;N;;;;;
+ 1D931;SIGNWRITING MOVEMENT-WALLPLANE DOUBLE ALTERNATING;So;0;L;;;;;N;;;;;
+ 1D932;SIGNWRITING MOVEMENT-WALLPLANE DOUBLE ALTERNATING WRIST FLEX;So;0;L;;;;;N;;;;;
+ 1D933;SIGNWRITING MOVEMENT-WALLPLANE CROSS;So;0;L;;;;;N;;;;;
+ 1D934;SIGNWRITING MOVEMENT-WALLPLANE TRIPLE STRAIGHT MOVEMENT;So;0;L;;;;;N;;;;;
+ 1D935;SIGNWRITING MOVEMENT-WALLPLANE TRIPLE WRIST FLEX;So;0;L;;;;;N;;;;;
+ 1D936;SIGNWRITING MOVEMENT-WALLPLANE TRIPLE ALTERNATING;So;0;L;;;;;N;;;;;
+ 1D937;SIGNWRITING MOVEMENT-WALLPLANE TRIPLE ALTERNATING WRIST FLEX;So;0;L;;;;;N;;;;;
+ 1D938;SIGNWRITING MOVEMENT-WALLPLANE BEND SMALL;So;0;L;;;;;N;;;;;
+ 1D939;SIGNWRITING MOVEMENT-WALLPLANE BEND MEDIUM;So;0;L;;;;;N;;;;;
+ 1D93A;SIGNWRITING MOVEMENT-WALLPLANE BEND LARGE;So;0;L;;;;;N;;;;;
+ 1D93B;SIGNWRITING MOVEMENT-WALLPLANE CORNER SMALL;So;0;L;;;;;N;;;;;
+ 1D93C;SIGNWRITING MOVEMENT-WALLPLANE CORNER MEDIUM;So;0;L;;;;;N;;;;;
+ 1D93D;SIGNWRITING MOVEMENT-WALLPLANE CORNER LARGE;So;0;L;;;;;N;;;;;
+ 1D93E;SIGNWRITING MOVEMENT-WALLPLANE CORNER ROTATION;So;0;L;;;;;N;;;;;
+ 1D93F;SIGNWRITING MOVEMENT-WALLPLANE CHECK SMALL;So;0;L;;;;;N;;;;;
+ 1D940;SIGNWRITING MOVEMENT-WALLPLANE CHECK MEDIUM;So;0;L;;;;;N;;;;;
+ 1D941;SIGNWRITING MOVEMENT-WALLPLANE CHECK LARGE;So;0;L;;;;;N;;;;;
+ 1D942;SIGNWRITING MOVEMENT-WALLPLANE BOX SMALL;So;0;L;;;;;N;;;;;
+ 1D943;SIGNWRITING MOVEMENT-WALLPLANE BOX MEDIUM;So;0;L;;;;;N;;;;;
+ 1D944;SIGNWRITING MOVEMENT-WALLPLANE BOX LARGE;So;0;L;;;;;N;;;;;
+ 1D945;SIGNWRITING MOVEMENT-WALLPLANE ZIGZAG SMALL;So;0;L;;;;;N;;;;;
+ 1D946;SIGNWRITING MOVEMENT-WALLPLANE ZIGZAG MEDIUM;So;0;L;;;;;N;;;;;
+ 1D947;SIGNWRITING MOVEMENT-WALLPLANE ZIGZAG LARGE;So;0;L;;;;;N;;;;;
+ 1D948;SIGNWRITING MOVEMENT-WALLPLANE PEAKS SMALL;So;0;L;;;;;N;;;;;
+ 1D949;SIGNWRITING MOVEMENT-WALLPLANE PEAKS MEDIUM;So;0;L;;;;;N;;;;;
+ 1D94A;SIGNWRITING MOVEMENT-WALLPLANE PEAKS LARGE;So;0;L;;;;;N;;;;;
+ 1D94B;SIGNWRITING TRAVEL-WALLPLANE ROTATION-WALLPLANE SINGLE;So;0;L;;;;;N;;;;;
+ 1D94C;SIGNWRITING TRAVEL-WALLPLANE ROTATION-WALLPLANE DOUBLE;So;0;L;;;;;N;;;;;
+ 1D94D;SIGNWRITING TRAVEL-WALLPLANE ROTATION-WALLPLANE ALTERNATING;So;0;L;;;;;N;;;;;
+ 1D94E;SIGNWRITING TRAVEL-WALLPLANE ROTATION-FLOORPLANE SINGLE;So;0;L;;;;;N;;;;;
+ 1D94F;SIGNWRITING TRAVEL-WALLPLANE ROTATION-FLOORPLANE DOUBLE;So;0;L;;;;;N;;;;;
+ 1D950;SIGNWRITING TRAVEL-WALLPLANE ROTATION-FLOORPLANE ALTERNATING;So;0;L;;;;;N;;;;;
+ 1D951;SIGNWRITING TRAVEL-WALLPLANE SHAKING;So;0;L;;;;;N;;;;;
+ 1D952;SIGNWRITING TRAVEL-WALLPLANE ARM SPIRAL SINGLE;So;0;L;;;;;N;;;;;
+ 1D953;SIGNWRITING TRAVEL-WALLPLANE ARM SPIRAL DOUBLE;So;0;L;;;;;N;;;;;
+ 1D954;SIGNWRITING TRAVEL-WALLPLANE ARM SPIRAL TRIPLE;So;0;L;;;;;N;;;;;
+ 1D955;SIGNWRITING MOVEMENT-DIAGONAL AWAY SMALL;So;0;L;;;;;N;;;;;
+ 1D956;SIGNWRITING MOVEMENT-DIAGONAL AWAY MEDIUM;So;0;L;;;;;N;;;;;
+ 1D957;SIGNWRITING MOVEMENT-DIAGONAL AWAY LARGE;So;0;L;;;;;N;;;;;
+ 1D958;SIGNWRITING MOVEMENT-DIAGONAL AWAY LARGEST;So;0;L;;;;;N;;;;;
+ 1D959;SIGNWRITING MOVEMENT-DIAGONAL TOWARDS SMALL;So;0;L;;;;;N;;;;;
+ 1D95A;SIGNWRITING MOVEMENT-DIAGONAL TOWARDS MEDIUM;So;0;L;;;;;N;;;;;
+ 1D95B;SIGNWRITING MOVEMENT-DIAGONAL TOWARDS LARGE;So;0;L;;;;;N;;;;;
+ 1D95C;SIGNWRITING MOVEMENT-DIAGONAL TOWARDS LARGEST;So;0;L;;;;;N;;;;;
+ 1D95D;SIGNWRITING MOVEMENT-DIAGONAL BETWEEN AWAY SMALL;So;0;L;;;;;N;;;;;
+ 1D95E;SIGNWRITING MOVEMENT-DIAGONAL BETWEEN AWAY MEDIUM;So;0;L;;;;;N;;;;;
+ 1D95F;SIGNWRITING MOVEMENT-DIAGONAL BETWEEN AWAY LARGE;So;0;L;;;;;N;;;;;
+ 1D960;SIGNWRITING MOVEMENT-DIAGONAL BETWEEN AWAY LARGEST;So;0;L;;;;;N;;;;;
+ 1D961;SIGNWRITING MOVEMENT-DIAGONAL BETWEEN TOWARDS SMALL;So;0;L;;;;;N;;;;;
+ 1D962;SIGNWRITING MOVEMENT-DIAGONAL BETWEEN TOWARDS MEDIUM;So;0;L;;;;;N;;;;;
+ 1D963;SIGNWRITING MOVEMENT-DIAGONAL BETWEEN TOWARDS LARGE;So;0;L;;;;;N;;;;;
+ 1D964;SIGNWRITING MOVEMENT-DIAGONAL BETWEEN TOWARDS LARGEST;So;0;L;;;;;N;;;;;
+ 1D965;SIGNWRITING MOVEMENT-FLOORPLANE SINGLE STRAIGHT SMALL;So;0;L;;;;;N;;;;;
+ 1D966;SIGNWRITING MOVEMENT-FLOORPLANE SINGLE STRAIGHT MEDIUM;So;0;L;;;;;N;;;;;
+ 1D967;SIGNWRITING MOVEMENT-FLOORPLANE SINGLE STRAIGHT LARGE;So;0;L;;;;;N;;;;;
+ 1D968;SIGNWRITING MOVEMENT-FLOORPLANE SINGLE STRAIGHT LARGEST;So;0;L;;;;;N;;;;;
+ 1D969;SIGNWRITING MOVEMENT-FLOORPLANE SINGLE WRIST FLEX;So;0;L;;;;;N;;;;;
+ 1D96A;SIGNWRITING MOVEMENT-FLOORPLANE DOUBLE STRAIGHT;So;0;L;;;;;N;;;;;
+ 1D96B;SIGNWRITING MOVEMENT-FLOORPLANE DOUBLE WRIST FLEX;So;0;L;;;;;N;;;;;
+ 1D96C;SIGNWRITING MOVEMENT-FLOORPLANE DOUBLE ALTERNATING;So;0;L;;;;;N;;;;;
+ 1D96D;SIGNWRITING MOVEMENT-FLOORPLANE DOUBLE ALTERNATING WRIST FLEX;So;0;L;;;;;N;;;;;
+ 1D96E;SIGNWRITING MOVEMENT-FLOORPLANE CROSS;So;0;L;;;;;N;;;;;
+ 1D96F;SIGNWRITING MOVEMENT-FLOORPLANE TRIPLE STRAIGHT MOVEMENT;So;0;L;;;;;N;;;;;
+ 1D970;SIGNWRITING MOVEMENT-FLOORPLANE TRIPLE WRIST FLEX;So;0;L;;;;;N;;;;;
+ 1D971;SIGNWRITING MOVEMENT-FLOORPLANE TRIPLE ALTERNATING MOVEMENT;So;0;L;;;;;N;;;;;
+ 1D972;SIGNWRITING MOVEMENT-FLOORPLANE TRIPLE ALTERNATING WRIST FLEX;So;0;L;;;;;N;;;;;
+ 1D973;SIGNWRITING MOVEMENT-FLOORPLANE BEND;So;0;L;;;;;N;;;;;
+ 1D974;SIGNWRITING MOVEMENT-FLOORPLANE CORNER SMALL;So;0;L;;;;;N;;;;;
+ 1D975;SIGNWRITING MOVEMENT-FLOORPLANE CORNER MEDIUM;So;0;L;;;;;N;;;;;
+ 1D976;SIGNWRITING MOVEMENT-FLOORPLANE CORNER LARGE;So;0;L;;;;;N;;;;;
+ 1D977;SIGNWRITING MOVEMENT-FLOORPLANE CHECK;So;0;L;;;;;N;;;;;
+ 1D978;SIGNWRITING MOVEMENT-FLOORPLANE BOX SMALL;So;0;L;;;;;N;;;;;
+ 1D979;SIGNWRITING MOVEMENT-FLOORPLANE BOX MEDIUM;So;0;L;;;;;N;;;;;
+ 1D97A;SIGNWRITING MOVEMENT-FLOORPLANE BOX LARGE;So;0;L;;;;;N;;;;;
+ 1D97B;SIGNWRITING MOVEMENT-FLOORPLANE ZIGZAG SMALL;So;0;L;;;;;N;;;;;
+ 1D97C;SIGNWRITING MOVEMENT-FLOORPLANE ZIGZAG MEDIUM;So;0;L;;;;;N;;;;;
+ 1D97D;SIGNWRITING MOVEMENT-FLOORPLANE ZIGZAG LARGE;So;0;L;;;;;N;;;;;
+ 1D97E;SIGNWRITING MOVEMENT-FLOORPLANE PEAKS SMALL;So;0;L;;;;;N;;;;;
+ 1D97F;SIGNWRITING MOVEMENT-FLOORPLANE PEAKS MEDIUM;So;0;L;;;;;N;;;;;
+ 1D980;SIGNWRITING MOVEMENT-FLOORPLANE PEAKS LARGE;So;0;L;;;;;N;;;;;
+ 1D981;SIGNWRITING TRAVEL-FLOORPLANE ROTATION-FLOORPLANE SINGLE;So;0;L;;;;;N;;;;;
+ 1D982;SIGNWRITING TRAVEL-FLOORPLANE ROTATION-FLOORPLANE DOUBLE;So;0;L;;;;;N;;;;;
+ 1D983;SIGNWRITING TRAVEL-FLOORPLANE ROTATION-FLOORPLANE ALTERNATING;So;0;L;;;;;N;;;;;
+ 1D984;SIGNWRITING TRAVEL-FLOORPLANE ROTATION-WALLPLANE SINGLE;So;0;L;;;;;N;;;;;
+ 1D985;SIGNWRITING TRAVEL-FLOORPLANE ROTATION-WALLPLANE DOUBLE;So;0;L;;;;;N;;;;;
+ 1D986;SIGNWRITING TRAVEL-FLOORPLANE ROTATION-WALLPLANE ALTERNATING;So;0;L;;;;;N;;;;;
+ 1D987;SIGNWRITING TRAVEL-FLOORPLANE SHAKING;So;0;L;;;;;N;;;;;
+ 1D988;SIGNWRITING MOVEMENT-WALLPLANE CURVE QUARTER SMALL;So;0;L;;;;;N;;;;;
+ 1D989;SIGNWRITING MOVEMENT-WALLPLANE CURVE QUARTER MEDIUM;So;0;L;;;;;N;;;;;
+ 1D98A;SIGNWRITING MOVEMENT-WALLPLANE CURVE QUARTER LARGE;So;0;L;;;;;N;;;;;
+ 1D98B;SIGNWRITING MOVEMENT-WALLPLANE CURVE QUARTER LARGEST;So;0;L;;;;;N;;;;;
+ 1D98C;SIGNWRITING MOVEMENT-WALLPLANE CURVE HALF-CIRCLE SMALL;So;0;L;;;;;N;;;;;
+ 1D98D;SIGNWRITING MOVEMENT-WALLPLANE CURVE HALF-CIRCLE MEDIUM;So;0;L;;;;;N;;;;;
+ 1D98E;SIGNWRITING MOVEMENT-WALLPLANE CURVE HALF-CIRCLE LARGE;So;0;L;;;;;N;;;;;
+ 1D98F;SIGNWRITING MOVEMENT-WALLPLANE CURVE HALF-CIRCLE LARGEST;So;0;L;;;;;N;;;;;
+ 1D990;SIGNWRITING MOVEMENT-WALLPLANE CURVE THREE-QUARTER CIRCLE SMALL;So;0;L;;;;;N;;;;;
+ 1D991;SIGNWRITING MOVEMENT-WALLPLANE CURVE THREE-QUARTER CIRCLE MEDIUM;So;0;L;;;;;N;;;;;
+ 1D992;SIGNWRITING MOVEMENT-WALLPLANE HUMP SMALL;So;0;L;;;;;N;;;;;
+ 1D993;SIGNWRITING MOVEMENT-WALLPLANE HUMP MEDIUM;So;0;L;;;;;N;;;;;
+ 1D994;SIGNWRITING MOVEMENT-WALLPLANE HUMP LARGE;So;0;L;;;;;N;;;;;
+ 1D995;SIGNWRITING MOVEMENT-WALLPLANE LOOP SMALL;So;0;L;;;;;N;;;;;
+ 1D996;SIGNWRITING MOVEMENT-WALLPLANE LOOP MEDIUM;So;0;L;;;;;N;;;;;
+ 1D997;SIGNWRITING MOVEMENT-WALLPLANE LOOP LARGE;So;0;L;;;;;N;;;;;
+ 1D998;SIGNWRITING MOVEMENT-WALLPLANE LOOP SMALL DOUBLE;So;0;L;;;;;N;;;;;
+ 1D999;SIGNWRITING MOVEMENT-WALLPLANE WAVE CURVE DOUBLE SMALL;So;0;L;;;;;N;;;;;
+ 1D99A;SIGNWRITING MOVEMENT-WALLPLANE WAVE CURVE DOUBLE MEDIUM;So;0;L;;;;;N;;;;;
+ 1D99B;SIGNWRITING MOVEMENT-WALLPLANE WAVE CURVE DOUBLE LARGE;So;0;L;;;;;N;;;;;
+ 1D99C;SIGNWRITING MOVEMENT-WALLPLANE WAVE CURVE TRIPLE SMALL;So;0;L;;;;;N;;;;;
+ 1D99D;SIGNWRITING MOVEMENT-WALLPLANE WAVE CURVE TRIPLE MEDIUM;So;0;L;;;;;N;;;;;
+ 1D99E;SIGNWRITING MOVEMENT-WALLPLANE WAVE CURVE TRIPLE LARGE;So;0;L;;;;;N;;;;;
+ 1D99F;SIGNWRITING MOVEMENT-WALLPLANE CURVE THEN STRAIGHT;So;0;L;;;;;N;;;;;
+ 1D9A0;SIGNWRITING MOVEMENT-WALLPLANE CURVED CROSS SMALL;So;0;L;;;;;N;;;;;
+ 1D9A1;SIGNWRITING MOVEMENT-WALLPLANE CURVED CROSS MEDIUM;So;0;L;;;;;N;;;;;
+ 1D9A2;SIGNWRITING ROTATION-WALLPLANE SINGLE;So;0;L;;;;;N;;;;;
+ 1D9A3;SIGNWRITING ROTATION-WALLPLANE DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9A4;SIGNWRITING ROTATION-WALLPLANE ALTERNATE;So;0;L;;;;;N;;;;;
+ 1D9A5;SIGNWRITING MOVEMENT-WALLPLANE SHAKING;So;0;L;;;;;N;;;;;
+ 1D9A6;SIGNWRITING MOVEMENT-WALLPLANE CURVE HITTING FRONT WALL;So;0;L;;;;;N;;;;;
+ 1D9A7;SIGNWRITING MOVEMENT-WALLPLANE HUMP HITTING FRONT WALL;So;0;L;;;;;N;;;;;
+ 1D9A8;SIGNWRITING MOVEMENT-WALLPLANE LOOP HITTING FRONT WALL;So;0;L;;;;;N;;;;;
+ 1D9A9;SIGNWRITING MOVEMENT-WALLPLANE WAVE HITTING FRONT WALL;So;0;L;;;;;N;;;;;
+ 1D9AA;SIGNWRITING ROTATION-WALLPLANE SINGLE HITTING FRONT WALL;So;0;L;;;;;N;;;;;
+ 1D9AB;SIGNWRITING ROTATION-WALLPLANE DOUBLE HITTING FRONT WALL;So;0;L;;;;;N;;;;;
+ 1D9AC;SIGNWRITING ROTATION-WALLPLANE ALTERNATING HITTING FRONT WALL;So;0;L;;;;;N;;;;;
+ 1D9AD;SIGNWRITING MOVEMENT-WALLPLANE CURVE HITTING CHEST;So;0;L;;;;;N;;;;;
+ 1D9AE;SIGNWRITING MOVEMENT-WALLPLANE HUMP HITTING CHEST;So;0;L;;;;;N;;;;;
+ 1D9AF;SIGNWRITING MOVEMENT-WALLPLANE LOOP HITTING CHEST;So;0;L;;;;;N;;;;;
+ 1D9B0;SIGNWRITING MOVEMENT-WALLPLANE WAVE HITTING CHEST;So;0;L;;;;;N;;;;;
+ 1D9B1;SIGNWRITING ROTATION-WALLPLANE SINGLE HITTING CHEST;So;0;L;;;;;N;;;;;
+ 1D9B2;SIGNWRITING ROTATION-WALLPLANE DOUBLE HITTING CHEST;So;0;L;;;;;N;;;;;
+ 1D9B3;SIGNWRITING ROTATION-WALLPLANE ALTERNATING HITTING CHEST;So;0;L;;;;;N;;;;;
+ 1D9B4;SIGNWRITING MOVEMENT-WALLPLANE WAVE DIAGONAL PATH SMALL;So;0;L;;;;;N;;;;;
+ 1D9B5;SIGNWRITING MOVEMENT-WALLPLANE WAVE DIAGONAL PATH MEDIUM;So;0;L;;;;;N;;;;;
+ 1D9B6;SIGNWRITING MOVEMENT-WALLPLANE WAVE DIAGONAL PATH LARGE;So;0;L;;;;;N;;;;;
+ 1D9B7;SIGNWRITING MOVEMENT-FLOORPLANE CURVE HITTING CEILING SMALL;So;0;L;;;;;N;;;;;
+ 1D9B8;SIGNWRITING MOVEMENT-FLOORPLANE CURVE HITTING CEILING LARGE;So;0;L;;;;;N;;;;;
+ 1D9B9;SIGNWRITING MOVEMENT-FLOORPLANE HUMP HITTING CEILING SMALL DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9BA;SIGNWRITING MOVEMENT-FLOORPLANE HUMP HITTING CEILING LARGE DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9BB;SIGNWRITING MOVEMENT-FLOORPLANE HUMP HITTING CEILING SMALL TRIPLE;So;0;L;;;;;N;;;;;
+ 1D9BC;SIGNWRITING MOVEMENT-FLOORPLANE HUMP HITTING CEILING LARGE TRIPLE;So;0;L;;;;;N;;;;;
+ 1D9BD;SIGNWRITING MOVEMENT-FLOORPLANE LOOP HITTING CEILING SMALL SINGLE;So;0;L;;;;;N;;;;;
+ 1D9BE;SIGNWRITING MOVEMENT-FLOORPLANE LOOP HITTING CEILING LARGE SINGLE;So;0;L;;;;;N;;;;;
+ 1D9BF;SIGNWRITING MOVEMENT-FLOORPLANE LOOP HITTING CEILING SMALL DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9C0;SIGNWRITING MOVEMENT-FLOORPLANE LOOP HITTING CEILING LARGE DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9C1;SIGNWRITING MOVEMENT-FLOORPLANE WAVE HITTING CEILING SMALL;So;0;L;;;;;N;;;;;
+ 1D9C2;SIGNWRITING MOVEMENT-FLOORPLANE WAVE HITTING CEILING LARGE;So;0;L;;;;;N;;;;;
+ 1D9C3;SIGNWRITING ROTATION-FLOORPLANE SINGLE HITTING CEILING;So;0;L;;;;;N;;;;;
+ 1D9C4;SIGNWRITING ROTATION-FLOORPLANE DOUBLE HITTING CEILING;So;0;L;;;;;N;;;;;
+ 1D9C5;SIGNWRITING ROTATION-FLOORPLANE ALTERNATING HITTING CEILING;So;0;L;;;;;N;;;;;
+ 1D9C6;SIGNWRITING MOVEMENT-FLOORPLANE CURVE HITTING FLOOR SMALL;So;0;L;;;;;N;;;;;
+ 1D9C7;SIGNWRITING MOVEMENT-FLOORPLANE CURVE HITTING FLOOR LARGE;So;0;L;;;;;N;;;;;
+ 1D9C8;SIGNWRITING MOVEMENT-FLOORPLANE HUMP HITTING FLOOR SMALL DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9C9;SIGNWRITING MOVEMENT-FLOORPLANE HUMP HITTING FLOOR LARGE DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9CA;SIGNWRITING MOVEMENT-FLOORPLANE HUMP HITTING FLOOR TRIPLE SMALL TRIPLE;So;0;L;;;;;N;;;;;
+ 1D9CB;SIGNWRITING MOVEMENT-FLOORPLANE HUMP HITTING FLOOR TRIPLE LARGE TRIPLE;So;0;L;;;;;N;;;;;
+ 1D9CC;SIGNWRITING MOVEMENT-FLOORPLANE LOOP HITTING FLOOR SMALL SINGLE;So;0;L;;;;;N;;;;;
+ 1D9CD;SIGNWRITING MOVEMENT-FLOORPLANE LOOP HITTING FLOOR LARGE SINGLE;So;0;L;;;;;N;;;;;
+ 1D9CE;SIGNWRITING MOVEMENT-FLOORPLANE LOOP HITTING FLOOR SMALL DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9CF;SIGNWRITING MOVEMENT-FLOORPLANE LOOP HITTING FLOOR LARGE DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9D0;SIGNWRITING MOVEMENT-FLOORPLANE WAVE HITTING FLOOR SMALL;So;0;L;;;;;N;;;;;
+ 1D9D1;SIGNWRITING MOVEMENT-FLOORPLANE WAVE HITTING FLOOR LARGE;So;0;L;;;;;N;;;;;
+ 1D9D2;SIGNWRITING ROTATION-FLOORPLANE SINGLE HITTING FLOOR;So;0;L;;;;;N;;;;;
+ 1D9D3;SIGNWRITING ROTATION-FLOORPLANE DOUBLE HITTING FLOOR;So;0;L;;;;;N;;;;;
+ 1D9D4;SIGNWRITING ROTATION-FLOORPLANE ALTERNATING HITTING FLOOR;So;0;L;;;;;N;;;;;
+ 1D9D5;SIGNWRITING MOVEMENT-FLOORPLANE CURVE SMALL;So;0;L;;;;;N;;;;;
+ 1D9D6;SIGNWRITING MOVEMENT-FLOORPLANE CURVE MEDIUM;So;0;L;;;;;N;;;;;
+ 1D9D7;SIGNWRITING MOVEMENT-FLOORPLANE CURVE LARGE;So;0;L;;;;;N;;;;;
+ 1D9D8;SIGNWRITING MOVEMENT-FLOORPLANE CURVE LARGEST;So;0;L;;;;;N;;;;;
+ 1D9D9;SIGNWRITING MOVEMENT-FLOORPLANE CURVE COMBINED;So;0;L;;;;;N;;;;;
+ 1D9DA;SIGNWRITING MOVEMENT-FLOORPLANE HUMP SMALL;So;0;L;;;;;N;;;;;
+ 1D9DB;SIGNWRITING MOVEMENT-FLOORPLANE LOOP SMALL;So;0;L;;;;;N;;;;;
+ 1D9DC;SIGNWRITING MOVEMENT-FLOORPLANE WAVE SNAKE;So;0;L;;;;;N;;;;;
+ 1D9DD;SIGNWRITING MOVEMENT-FLOORPLANE WAVE SMALL;So;0;L;;;;;N;;;;;
+ 1D9DE;SIGNWRITING MOVEMENT-FLOORPLANE WAVE LARGE;So;0;L;;;;;N;;;;;
+ 1D9DF;SIGNWRITING ROTATION-FLOORPLANE SINGLE;So;0;L;;;;;N;;;;;
+ 1D9E0;SIGNWRITING ROTATION-FLOORPLANE DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9E1;SIGNWRITING ROTATION-FLOORPLANE ALTERNATING;So;0;L;;;;;N;;;;;
+ 1D9E2;SIGNWRITING MOVEMENT-FLOORPLANE SHAKING PARALLEL;So;0;L;;;;;N;;;;;
+ 1D9E3;SIGNWRITING MOVEMENT-WALLPLANE ARM CIRCLE SMALL SINGLE;So;0;L;;;;;N;;;;;
+ 1D9E4;SIGNWRITING MOVEMENT-WALLPLANE ARM CIRCLE MEDIUM SINGLE;So;0;L;;;;;N;;;;;
+ 1D9E5;SIGNWRITING MOVEMENT-WALLPLANE ARM CIRCLE SMALL DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9E6;SIGNWRITING MOVEMENT-WALLPLANE ARM CIRCLE MEDIUM DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9E7;SIGNWRITING MOVEMENT-FLOORPLANE ARM CIRCLE HITTING WALL SMALL SINGLE;So;0;L;;;;;N;;;;;
+ 1D9E8;SIGNWRITING MOVEMENT-FLOORPLANE ARM CIRCLE HITTING WALL MEDIUM SINGLE;So;0;L;;;;;N;;;;;
+ 1D9E9;SIGNWRITING MOVEMENT-FLOORPLANE ARM CIRCLE HITTING WALL LARGE SINGLE;So;0;L;;;;;N;;;;;
+ 1D9EA;SIGNWRITING MOVEMENT-FLOORPLANE ARM CIRCLE HITTING WALL SMALL DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9EB;SIGNWRITING MOVEMENT-FLOORPLANE ARM CIRCLE HITTING WALL MEDIUM DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9EC;SIGNWRITING MOVEMENT-FLOORPLANE ARM CIRCLE HITTING WALL LARGE DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9ED;SIGNWRITING MOVEMENT-WALLPLANE WRIST CIRCLE FRONT SINGLE;So;0;L;;;;;N;;;;;
+ 1D9EE;SIGNWRITING MOVEMENT-WALLPLANE WRIST CIRCLE FRONT DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9EF;SIGNWRITING MOVEMENT-FLOORPLANE WRIST CIRCLE HITTING WALL SINGLE;So;0;L;;;;;N;;;;;
+ 1D9F0;SIGNWRITING MOVEMENT-FLOORPLANE WRIST CIRCLE HITTING WALL DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9F1;SIGNWRITING MOVEMENT-WALLPLANE FINGER CIRCLES SINGLE;So;0;L;;;;;N;;;;;
+ 1D9F2;SIGNWRITING MOVEMENT-WALLPLANE FINGER CIRCLES DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9F3;SIGNWRITING MOVEMENT-FLOORPLANE FINGER CIRCLES HITTING WALL SINGLE;So;0;L;;;;;N;;;;;
+ 1D9F4;SIGNWRITING MOVEMENT-FLOORPLANE FINGER CIRCLES HITTING WALL DOUBLE;So;0;L;;;;;N;;;;;
+ 1D9F5;SIGNWRITING DYNAMIC ARROWHEAD SMALL;So;0;L;;;;;N;;;;;
+ 1D9F6;SIGNWRITING DYNAMIC ARROWHEAD LARGE;So;0;L;;;;;N;;;;;
+ 1D9F7;SIGNWRITING DYNAMIC FAST;So;0;L;;;;;N;;;;;
+ 1D9F8;SIGNWRITING DYNAMIC SLOW;So;0;L;;;;;N;;;;;
+ 1D9F9;SIGNWRITING DYNAMIC TENSE;So;0;L;;;;;N;;;;;
+ 1D9FA;SIGNWRITING DYNAMIC RELAXED;So;0;L;;;;;N;;;;;
+ 1D9FB;SIGNWRITING DYNAMIC SIMULTANEOUS;So;0;L;;;;;N;;;;;
+ 1D9FC;SIGNWRITING DYNAMIC SIMULTANEOUS ALTERNATING;So;0;L;;;;;N;;;;;
+ 1D9FD;SIGNWRITING DYNAMIC EVERY OTHER TIME;So;0;L;;;;;N;;;;;
+ 1D9FE;SIGNWRITING DYNAMIC GRADUAL;So;0;L;;;;;N;;;;;
+ 1D9FF;SIGNWRITING HEAD;So;0;L;;;;;N;;;;;
+ 1DA00;SIGNWRITING HEAD RIM;Mn;0;NSM;;;;;N;;;;;
+ 1DA01;SIGNWRITING HEAD MOVEMENT-WALLPLANE STRAIGHT;Mn;0;NSM;;;;;N;;;;;
+ 1DA02;SIGNWRITING HEAD MOVEMENT-WALLPLANE TILT;Mn;0;NSM;;;;;N;;;;;
+ 1DA03;SIGNWRITING HEAD MOVEMENT-FLOORPLANE STRAIGHT;Mn;0;NSM;;;;;N;;;;;
+ 1DA04;SIGNWRITING HEAD MOVEMENT-WALLPLANE CURVE;Mn;0;NSM;;;;;N;;;;;
+ 1DA05;SIGNWRITING HEAD MOVEMENT-FLOORPLANE CURVE;Mn;0;NSM;;;;;N;;;;;
+ 1DA06;SIGNWRITING HEAD MOVEMENT CIRCLE;Mn;0;NSM;;;;;N;;;;;
+ 1DA07;SIGNWRITING FACE DIRECTION POSITION NOSE FORWARD TILTING;Mn;0;NSM;;;;;N;;;;;
+ 1DA08;SIGNWRITING FACE DIRECTION POSITION NOSE UP OR DOWN;Mn;0;NSM;;;;;N;;;;;
+ 1DA09;SIGNWRITING FACE DIRECTION POSITION NOSE UP OR DOWN TILTING;Mn;0;NSM;;;;;N;;;;;
+ 1DA0A;SIGNWRITING EYEBROWS STRAIGHT UP;Mn;0;NSM;;;;;N;;;;;
+ 1DA0B;SIGNWRITING EYEBROWS STRAIGHT NEUTRAL;Mn;0;NSM;;;;;N;;;;;
+ 1DA0C;SIGNWRITING EYEBROWS STRAIGHT DOWN;Mn;0;NSM;;;;;N;;;;;
+ 1DA0D;SIGNWRITING DREAMY EYEBROWS NEUTRAL DOWN;Mn;0;NSM;;;;;N;;;;;
+ 1DA0E;SIGNWRITING DREAMY EYEBROWS DOWN NEUTRAL;Mn;0;NSM;;;;;N;;;;;
+ 1DA0F;SIGNWRITING DREAMY EYEBROWS UP NEUTRAL;Mn;0;NSM;;;;;N;;;;;
+ 1DA10;SIGNWRITING DREAMY EYEBROWS NEUTRAL UP;Mn;0;NSM;;;;;N;;;;;
+ 1DA11;SIGNWRITING FOREHEAD NEUTRAL;Mn;0;NSM;;;;;N;;;;;
+ 1DA12;SIGNWRITING FOREHEAD CONTACT;Mn;0;NSM;;;;;N;;;;;
+ 1DA13;SIGNWRITING FOREHEAD WRINKLED;Mn;0;NSM;;;;;N;;;;;
+ 1DA14;SIGNWRITING EYES OPEN;Mn;0;NSM;;;;;N;;;;;
+ 1DA15;SIGNWRITING EYES SQUEEZED;Mn;0;NSM;;;;;N;;;;;
+ 1DA16;SIGNWRITING EYES CLOSED;Mn;0;NSM;;;;;N;;;;;
+ 1DA17;SIGNWRITING EYE BLINK SINGLE;Mn;0;NSM;;;;;N;;;;;
+ 1DA18;SIGNWRITING EYE BLINK MULTIPLE;Mn;0;NSM;;;;;N;;;;;
+ 1DA19;SIGNWRITING EYES HALF OPEN;Mn;0;NSM;;;;;N;;;;;
+ 1DA1A;SIGNWRITING EYES WIDE OPEN;Mn;0;NSM;;;;;N;;;;;
+ 1DA1B;SIGNWRITING EYES HALF CLOSED;Mn;0;NSM;;;;;N;;;;;
+ 1DA1C;SIGNWRITING EYES WIDENING MOVEMENT;Mn;0;NSM;;;;;N;;;;;
+ 1DA1D;SIGNWRITING EYE WINK;Mn;0;NSM;;;;;N;;;;;
+ 1DA1E;SIGNWRITING EYELASHES UP;Mn;0;NSM;;;;;N;;;;;
+ 1DA1F;SIGNWRITING EYELASHES DOWN;Mn;0;NSM;;;;;N;;;;;
+ 1DA20;SIGNWRITING EYELASHES FLUTTERING;Mn;0;NSM;;;;;N;;;;;
+ 1DA21;SIGNWRITING EYEGAZE-WALLPLANE STRAIGHT;Mn;0;NSM;;;;;N;;;;;
+ 1DA22;SIGNWRITING EYEGAZE-WALLPLANE STRAIGHT DOUBLE;Mn;0;NSM;;;;;N;;;;;
+ 1DA23;SIGNWRITING EYEGAZE-WALLPLANE STRAIGHT ALTERNATING;Mn;0;NSM;;;;;N;;;;;
+ 1DA24;SIGNWRITING EYEGAZE-FLOORPLANE STRAIGHT;Mn;0;NSM;;;;;N;;;;;
+ 1DA25;SIGNWRITING EYEGAZE-FLOORPLANE STRAIGHT DOUBLE;Mn;0;NSM;;;;;N;;;;;
+ 1DA26;SIGNWRITING EYEGAZE-FLOORPLANE STRAIGHT ALTERNATING;Mn;0;NSM;;;;;N;;;;;
+ 1DA27;SIGNWRITING EYEGAZE-WALLPLANE CURVED;Mn;0;NSM;;;;;N;;;;;
+ 1DA28;SIGNWRITING EYEGAZE-FLOORPLANE CURVED;Mn;0;NSM;;;;;N;;;;;
+ 1DA29;SIGNWRITING EYEGAZE-WALLPLANE CIRCLING;Mn;0;NSM;;;;;N;;;;;
+ 1DA2A;SIGNWRITING CHEEKS PUFFED;Mn;0;NSM;;;;;N;;;;;
+ 1DA2B;SIGNWRITING CHEEKS NEUTRAL;Mn;0;NSM;;;;;N;;;;;
+ 1DA2C;SIGNWRITING CHEEKS SUCKED;Mn;0;NSM;;;;;N;;;;;
+ 1DA2D;SIGNWRITING TENSE CHEEKS HIGH;Mn;0;NSM;;;;;N;;;;;
+ 1DA2E;SIGNWRITING TENSE CHEEKS MIDDLE;Mn;0;NSM;;;;;N;;;;;
+ 1DA2F;SIGNWRITING TENSE CHEEKS LOW;Mn;0;NSM;;;;;N;;;;;
+ 1DA30;SIGNWRITING EARS;Mn;0;NSM;;;;;N;;;;;
+ 1DA31;SIGNWRITING NOSE NEUTRAL;Mn;0;NSM;;;;;N;;;;;
+ 1DA32;SIGNWRITING NOSE CONTACT;Mn;0;NSM;;;;;N;;;;;
+ 1DA33;SIGNWRITING NOSE WRINKLES;Mn;0;NSM;;;;;N;;;;;
+ 1DA34;SIGNWRITING NOSE WIGGLES;Mn;0;NSM;;;;;N;;;;;
+ 1DA35;SIGNWRITING AIR BLOWING OUT;Mn;0;NSM;;;;;N;;;;;
+ 1DA36;SIGNWRITING AIR SUCKING IN;Mn;0;NSM;;;;;N;;;;;
+ 1DA37;SIGNWRITING AIR BLOW SMALL ROTATIONS;So;0;L;;;;;N;;;;;
+ 1DA38;SIGNWRITING AIR SUCK SMALL ROTATIONS;So;0;L;;;;;N;;;;;
+ 1DA39;SIGNWRITING BREATH INHALE;So;0;L;;;;;N;;;;;
+ 1DA3A;SIGNWRITING BREATH EXHALE;So;0;L;;;;;N;;;;;
+ 1DA3B;SIGNWRITING MOUTH CLOSED NEUTRAL;Mn;0;NSM;;;;;N;;;;;
+ 1DA3C;SIGNWRITING MOUTH CLOSED FORWARD;Mn;0;NSM;;;;;N;;;;;
+ 1DA3D;SIGNWRITING MOUTH CLOSED CONTACT;Mn;0;NSM;;;;;N;;;;;
+ 1DA3E;SIGNWRITING MOUTH SMILE;Mn;0;NSM;;;;;N;;;;;
+ 1DA3F;SIGNWRITING MOUTH SMILE WRINKLED;Mn;0;NSM;;;;;N;;;;;
+ 1DA40;SIGNWRITING MOUTH SMILE OPEN;Mn;0;NSM;;;;;N;;;;;
+ 1DA41;SIGNWRITING MOUTH FROWN;Mn;0;NSM;;;;;N;;;;;
+ 1DA42;SIGNWRITING MOUTH FROWN WRINKLED;Mn;0;NSM;;;;;N;;;;;
+ 1DA43;SIGNWRITING MOUTH FROWN OPEN;Mn;0;NSM;;;;;N;;;;;
+ 1DA44;SIGNWRITING MOUTH OPEN CIRCLE;Mn;0;NSM;;;;;N;;;;;
+ 1DA45;SIGNWRITING MOUTH OPEN FORWARD;Mn;0;NSM;;;;;N;;;;;
+ 1DA46;SIGNWRITING MOUTH OPEN WRINKLED;Mn;0;NSM;;;;;N;;;;;
+ 1DA47;SIGNWRITING MOUTH OPEN OVAL;Mn;0;NSM;;;;;N;;;;;
+ 1DA48;SIGNWRITING MOUTH OPEN OVAL WRINKLED;Mn;0;NSM;;;;;N;;;;;
+ 1DA49;SIGNWRITING MOUTH OPEN OVAL YAWN;Mn;0;NSM;;;;;N;;;;;
+ 1DA4A;SIGNWRITING MOUTH OPEN RECTANGLE;Mn;0;NSM;;;;;N;;;;;
+ 1DA4B;SIGNWRITING MOUTH OPEN RECTANGLE WRINKLED;Mn;0;NSM;;;;;N;;;;;
+ 1DA4C;SIGNWRITING MOUTH OPEN RECTANGLE YAWN;Mn;0;NSM;;;;;N;;;;;
+ 1DA4D;SIGNWRITING MOUTH KISS;Mn;0;NSM;;;;;N;;;;;
+ 1DA4E;SIGNWRITING MOUTH KISS FORWARD;Mn;0;NSM;;;;;N;;;;;
+ 1DA4F;SIGNWRITING MOUTH KISS WRINKLED;Mn;0;NSM;;;;;N;;;;;
+ 1DA50;SIGNWRITING MOUTH TENSE;Mn;0;NSM;;;;;N;;;;;
+ 1DA51;SIGNWRITING MOUTH TENSE FORWARD;Mn;0;NSM;;;;;N;;;;;
+ 1DA52;SIGNWRITING MOUTH TENSE SUCKED;Mn;0;NSM;;;;;N;;;;;
+ 1DA53;SIGNWRITING LIPS PRESSED TOGETHER;Mn;0;NSM;;;;;N;;;;;
+ 1DA54;SIGNWRITING LIP LOWER OVER UPPER;Mn;0;NSM;;;;;N;;;;;
+ 1DA55;SIGNWRITING LIP UPPER OVER LOWER;Mn;0;NSM;;;;;N;;;;;
+ 1DA56;SIGNWRITING MOUTH CORNERS;Mn;0;NSM;;;;;N;;;;;
+ 1DA57;SIGNWRITING MOUTH WRINKLES SINGLE;Mn;0;NSM;;;;;N;;;;;
+ 1DA58;SIGNWRITING MOUTH WRINKLES DOUBLE;Mn;0;NSM;;;;;N;;;;;
+ 1DA59;SIGNWRITING TONGUE STICKING OUT FAR;Mn;0;NSM;;;;;N;;;;;
+ 1DA5A;SIGNWRITING TONGUE LICKING LIPS;Mn;0;NSM;;;;;N;;;;;
+ 1DA5B;SIGNWRITING TONGUE TIP BETWEEN LIPS;Mn;0;NSM;;;;;N;;;;;
+ 1DA5C;SIGNWRITING TONGUE TIP TOUCHING INSIDE MOUTH;Mn;0;NSM;;;;;N;;;;;
+ 1DA5D;SIGNWRITING TONGUE INSIDE MOUTH RELAXED;Mn;0;NSM;;;;;N;;;;;
+ 1DA5E;SIGNWRITING TONGUE MOVES AGAINST CHEEK;Mn;0;NSM;;;;;N;;;;;
+ 1DA5F;SIGNWRITING TONGUE CENTRE STICKING OUT;Mn;0;NSM;;;;;N;;;;;
+ 1DA60;SIGNWRITING TONGUE CENTRE INSIDE MOUTH;Mn;0;NSM;;;;;N;;;;;
+ 1DA61;SIGNWRITING TEETH;Mn;0;NSM;;;;;N;;;;;
+ 1DA62;SIGNWRITING TEETH MOVEMENT;Mn;0;NSM;;;;;N;;;;;
+ 1DA63;SIGNWRITING TEETH ON TONGUE;Mn;0;NSM;;;;;N;;;;;
+ 1DA64;SIGNWRITING TEETH ON TONGUE MOVEMENT;Mn;0;NSM;;;;;N;;;;;
+ 1DA65;SIGNWRITING TEETH ON LIPS;Mn;0;NSM;;;;;N;;;;;
+ 1DA66;SIGNWRITING TEETH ON LIPS MOVEMENT;Mn;0;NSM;;;;;N;;;;;
+ 1DA67;SIGNWRITING TEETH BITE LIPS;Mn;0;NSM;;;;;N;;;;;
+ 1DA68;SIGNWRITING MOVEMENT-WALLPLANE JAW;Mn;0;NSM;;;;;N;;;;;
+ 1DA69;SIGNWRITING MOVEMENT-FLOORPLANE JAW;Mn;0;NSM;;;;;N;;;;;
+ 1DA6A;SIGNWRITING NECK;Mn;0;NSM;;;;;N;;;;;
+ 1DA6B;SIGNWRITING HAIR;Mn;0;NSM;;;;;N;;;;;
+ 1DA6C;SIGNWRITING EXCITEMENT;Mn;0;NSM;;;;;N;;;;;
+ 1DA6D;SIGNWRITING SHOULDER HIP SPINE;So;0;L;;;;;N;;;;;
+ 1DA6E;SIGNWRITING SHOULDER HIP POSITIONS;So;0;L;;;;;N;;;;;
+ 1DA6F;SIGNWRITING WALLPLANE SHOULDER HIP MOVE;So;0;L;;;;;N;;;;;
+ 1DA70;SIGNWRITING FLOORPLANE SHOULDER HIP MOVE;So;0;L;;;;;N;;;;;
+ 1DA71;SIGNWRITING SHOULDER TILTING FROM WAIST;So;0;L;;;;;N;;;;;
+ 1DA72;SIGNWRITING TORSO-WALLPLANE STRAIGHT STRETCH;So;0;L;;;;;N;;;;;
+ 1DA73;SIGNWRITING TORSO-WALLPLANE CURVED BEND;So;0;L;;;;;N;;;;;
+ 1DA74;SIGNWRITING TORSO-FLOORPLANE TWISTING;So;0;L;;;;;N;;;;;
+ 1DA75;SIGNWRITING UPPER BODY TILTING FROM HIP JOINTS;Mn;0;NSM;;;;;N;;;;;
+ 1DA76;SIGNWRITING LIMB COMBINATION;So;0;L;;;;;N;;;;;
+ 1DA77;SIGNWRITING LIMB LENGTH-1;So;0;L;;;;;N;;;;;
+ 1DA78;SIGNWRITING LIMB LENGTH-2;So;0;L;;;;;N;;;;;
+ 1DA79;SIGNWRITING LIMB LENGTH-3;So;0;L;;;;;N;;;;;
+ 1DA7A;SIGNWRITING LIMB LENGTH-4;So;0;L;;;;;N;;;;;
+ 1DA7B;SIGNWRITING LIMB LENGTH-5;So;0;L;;;;;N;;;;;
+ 1DA7C;SIGNWRITING LIMB LENGTH-6;So;0;L;;;;;N;;;;;
+ 1DA7D;SIGNWRITING LIMB LENGTH-7;So;0;L;;;;;N;;;;;
+ 1DA7E;SIGNWRITING FINGER;So;0;L;;;;;N;;;;;
+ 1DA7F;SIGNWRITING LOCATION-WALLPLANE SPACE;So;0;L;;;;;N;;;;;
+ 1DA80;SIGNWRITING LOCATION-FLOORPLANE SPACE;So;0;L;;;;;N;;;;;
+ 1DA81;SIGNWRITING LOCATION HEIGHT;So;0;L;;;;;N;;;;;
+ 1DA82;SIGNWRITING LOCATION WIDTH;So;0;L;;;;;N;;;;;
+ 1DA83;SIGNWRITING LOCATION DEPTH;So;0;L;;;;;N;;;;;
+ 1DA84;SIGNWRITING LOCATION HEAD NECK;Mn;0;NSM;;;;;N;;;;;
+ 1DA85;SIGNWRITING LOCATION TORSO;So;0;L;;;;;N;;;;;
+ 1DA86;SIGNWRITING LOCATION LIMBS DIGITS;So;0;L;;;;;N;;;;;
+ 1DA87;SIGNWRITING COMMA;Po;0;L;;;;;N;;;;;
+ 1DA88;SIGNWRITING FULL STOP;Po;0;L;;;;;N;;;;;
+ 1DA89;SIGNWRITING SEMICOLON;Po;0;L;;;;;N;;;;;
+ 1DA8A;SIGNWRITING COLON;Po;0;L;;;;;N;;;;;
+ 1DA8B;SIGNWRITING PARENTHESIS;Po;0;L;;;;;N;;;;;
+ 1DA9B;SIGNWRITING FILL MODIFIER-2;Mn;0;NSM;;;;;N;;;;;
+ 1DA9C;SIGNWRITING FILL MODIFIER-3;Mn;0;NSM;;;;;N;;;;;
+ 1DA9D;SIGNWRITING FILL MODIFIER-4;Mn;0;NSM;;;;;N;;;;;
+ 1DA9E;SIGNWRITING FILL MODIFIER-5;Mn;0;NSM;;;;;N;;;;;
+ 1DA9F;SIGNWRITING FILL MODIFIER-6;Mn;0;NSM;;;;;N;;;;;
+ 1DAA1;SIGNWRITING ROTATION MODIFIER-2;Mn;0;NSM;;;;;N;;;;;
+ 1DAA2;SIGNWRITING ROTATION MODIFIER-3;Mn;0;NSM;;;;;N;;;;;
+ 1DAA3;SIGNWRITING ROTATION MODIFIER-4;Mn;0;NSM;;;;;N;;;;;
+ 1DAA4;SIGNWRITING ROTATION MODIFIER-5;Mn;0;NSM;;;;;N;;;;;
+ 1DAA5;SIGNWRITING ROTATION MODIFIER-6;Mn;0;NSM;;;;;N;;;;;
+ 1DAA6;SIGNWRITING ROTATION MODIFIER-7;Mn;0;NSM;;;;;N;;;;;
+ 1DAA7;SIGNWRITING ROTATION MODIFIER-8;Mn;0;NSM;;;;;N;;;;;
+ 1DAA8;SIGNWRITING ROTATION MODIFIER-9;Mn;0;NSM;;;;;N;;;;;
+ 1DAA9;SIGNWRITING ROTATION MODIFIER-10;Mn;0;NSM;;;;;N;;;;;
+ 1DAAA;SIGNWRITING ROTATION MODIFIER-11;Mn;0;NSM;;;;;N;;;;;
+ 1DAAB;SIGNWRITING ROTATION MODIFIER-12;Mn;0;NSM;;;;;N;;;;;
+ 1DAAC;SIGNWRITING ROTATION MODIFIER-13;Mn;0;NSM;;;;;N;;;;;
+ 1DAAD;SIGNWRITING ROTATION MODIFIER-14;Mn;0;NSM;;;;;N;;;;;
+ 1DAAE;SIGNWRITING ROTATION MODIFIER-15;Mn;0;NSM;;;;;N;;;;;
+ 1DAAF;SIGNWRITING ROTATION MODIFIER-16;Mn;0;NSM;;;;;N;;;;;
+ 1E000;COMBINING GLAGOLITIC LETTER AZU;Mn;230;NSM;;;;;N;;;;;
+ 1E001;COMBINING GLAGOLITIC LETTER BUKY;Mn;230;NSM;;;;;N;;;;;
+ 1E002;COMBINING GLAGOLITIC LETTER VEDE;Mn;230;NSM;;;;;N;;;;;
+ 1E003;COMBINING GLAGOLITIC LETTER GLAGOLI;Mn;230;NSM;;;;;N;;;;;
+ 1E004;COMBINING GLAGOLITIC LETTER DOBRO;Mn;230;NSM;;;;;N;;;;;
+ 1E005;COMBINING GLAGOLITIC LETTER YESTU;Mn;230;NSM;;;;;N;;;;;
+ 1E006;COMBINING GLAGOLITIC LETTER ZHIVETE;Mn;230;NSM;;;;;N;;;;;
+ 1E008;COMBINING GLAGOLITIC LETTER ZEMLJA;Mn;230;NSM;;;;;N;;;;;
+ 1E009;COMBINING GLAGOLITIC LETTER IZHE;Mn;230;NSM;;;;;N;;;;;
+ 1E00A;COMBINING GLAGOLITIC LETTER INITIAL IZHE;Mn;230;NSM;;;;;N;;;;;
+ 1E00B;COMBINING GLAGOLITIC LETTER I;Mn;230;NSM;;;;;N;;;;;
+ 1E00C;COMBINING GLAGOLITIC LETTER DJERVI;Mn;230;NSM;;;;;N;;;;;
+ 1E00D;COMBINING GLAGOLITIC LETTER KAKO;Mn;230;NSM;;;;;N;;;;;
+ 1E00E;COMBINING GLAGOLITIC LETTER LJUDIJE;Mn;230;NSM;;;;;N;;;;;
+ 1E00F;COMBINING GLAGOLITIC LETTER MYSLITE;Mn;230;NSM;;;;;N;;;;;
+ 1E010;COMBINING GLAGOLITIC LETTER NASHI;Mn;230;NSM;;;;;N;;;;;
+ 1E011;COMBINING GLAGOLITIC LETTER ONU;Mn;230;NSM;;;;;N;;;;;
+ 1E012;COMBINING GLAGOLITIC LETTER POKOJI;Mn;230;NSM;;;;;N;;;;;
+ 1E013;COMBINING GLAGOLITIC LETTER RITSI;Mn;230;NSM;;;;;N;;;;;
+ 1E014;COMBINING GLAGOLITIC LETTER SLOVO;Mn;230;NSM;;;;;N;;;;;
+ 1E015;COMBINING GLAGOLITIC LETTER TVRIDO;Mn;230;NSM;;;;;N;;;;;
+ 1E016;COMBINING GLAGOLITIC LETTER UKU;Mn;230;NSM;;;;;N;;;;;
+ 1E017;COMBINING GLAGOLITIC LETTER FRITU;Mn;230;NSM;;;;;N;;;;;
+ 1E018;COMBINING GLAGOLITIC LETTER HERU;Mn;230;NSM;;;;;N;;;;;
+ 1E01B;COMBINING GLAGOLITIC LETTER SHTA;Mn;230;NSM;;;;;N;;;;;
+ 1E01C;COMBINING GLAGOLITIC LETTER TSI;Mn;230;NSM;;;;;N;;;;;
+ 1E01D;COMBINING GLAGOLITIC LETTER CHRIVI;Mn;230;NSM;;;;;N;;;;;
+ 1E01E;COMBINING GLAGOLITIC LETTER SHA;Mn;230;NSM;;;;;N;;;;;
+ 1E01F;COMBINING GLAGOLITIC LETTER YERU;Mn;230;NSM;;;;;N;;;;;
+ 1E020;COMBINING GLAGOLITIC LETTER YERI;Mn;230;NSM;;;;;N;;;;;
+ 1E021;COMBINING GLAGOLITIC LETTER YATI;Mn;230;NSM;;;;;N;;;;;
+ 1E023;COMBINING GLAGOLITIC LETTER YU;Mn;230;NSM;;;;;N;;;;;
+ 1E024;COMBINING GLAGOLITIC LETTER SMALL YUS;Mn;230;NSM;;;;;N;;;;;
+ 1E026;COMBINING GLAGOLITIC LETTER YO;Mn;230;NSM;;;;;N;;;;;
+ 1E027;COMBINING GLAGOLITIC LETTER IOTATED SMALL YUS;Mn;230;NSM;;;;;N;;;;;
+ 1E028;COMBINING GLAGOLITIC LETTER BIG YUS;Mn;230;NSM;;;;;N;;;;;
+ 1E029;COMBINING GLAGOLITIC LETTER IOTATED BIG YUS;Mn;230;NSM;;;;;N;;;;;
+ 1E02A;COMBINING GLAGOLITIC LETTER FITA;Mn;230;NSM;;;;;N;;;;;
+ 1E100;NYIAKENG PUACHUE HMONG LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1E101;NYIAKENG PUACHUE HMONG LETTER TSA;Lo;0;L;;;;;N;;;;;
+ 1E102;NYIAKENG PUACHUE HMONG LETTER NTA;Lo;0;L;;;;;N;;;;;
+ 1E103;NYIAKENG PUACHUE HMONG LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1E104;NYIAKENG PUACHUE HMONG LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1E105;NYIAKENG PUACHUE HMONG LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1E106;NYIAKENG PUACHUE HMONG LETTER XA;Lo;0;L;;;;;N;;;;;
+ 1E107;NYIAKENG PUACHUE HMONG LETTER NKA;Lo;0;L;;;;;N;;;;;
+ 1E108;NYIAKENG PUACHUE HMONG LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1E109;NYIAKENG PUACHUE HMONG LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1E10A;NYIAKENG PUACHUE HMONG LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1E10B;NYIAKENG PUACHUE HMONG LETTER ZA;Lo;0;L;;;;;N;;;;;
+ 1E10C;NYIAKENG PUACHUE HMONG LETTER NCA;Lo;0;L;;;;;N;;;;;
+ 1E10D;NYIAKENG PUACHUE HMONG LETTER NTSA;Lo;0;L;;;;;N;;;;;
+ 1E10E;NYIAKENG PUACHUE HMONG LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1E10F;NYIAKENG PUACHUE HMONG LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1E110;NYIAKENG PUACHUE HMONG LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 1E111;NYIAKENG PUACHUE HMONG LETTER NRA;Lo;0;L;;;;;N;;;;;
+ 1E112;NYIAKENG PUACHUE HMONG LETTER VA;Lo;0;L;;;;;N;;;;;
+ 1E113;NYIAKENG PUACHUE HMONG LETTER NTXA;Lo;0;L;;;;;N;;;;;
+ 1E114;NYIAKENG PUACHUE HMONG LETTER TXA;Lo;0;L;;;;;N;;;;;
+ 1E115;NYIAKENG PUACHUE HMONG LETTER FA;Lo;0;L;;;;;N;;;;;
+ 1E116;NYIAKENG PUACHUE HMONG LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1E117;NYIAKENG PUACHUE HMONG LETTER QA;Lo;0;L;;;;;N;;;;;
+ 1E118;NYIAKENG PUACHUE HMONG LETTER YA;Lo;0;L;;;;;N;;;;;
+ 1E119;NYIAKENG PUACHUE HMONG LETTER NQA;Lo;0;L;;;;;N;;;;;
+ 1E11A;NYIAKENG PUACHUE HMONG LETTER PA;Lo;0;L;;;;;N;;;;;
+ 1E11B;NYIAKENG PUACHUE HMONG LETTER XYA;Lo;0;L;;;;;N;;;;;
+ 1E11C;NYIAKENG PUACHUE HMONG LETTER NPA;Lo;0;L;;;;;N;;;;;
+ 1E11D;NYIAKENG PUACHUE HMONG LETTER DLA;Lo;0;L;;;;;N;;;;;
+ 1E11E;NYIAKENG PUACHUE HMONG LETTER NPLA;Lo;0;L;;;;;N;;;;;
+ 1E11F;NYIAKENG PUACHUE HMONG LETTER HAH;Lo;0;L;;;;;N;;;;;
+ 1E120;NYIAKENG PUACHUE HMONG LETTER MLA;Lo;0;L;;;;;N;;;;;
+ 1E121;NYIAKENG PUACHUE HMONG LETTER PLA;Lo;0;L;;;;;N;;;;;
+ 1E122;NYIAKENG PUACHUE HMONG LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1E123;NYIAKENG PUACHUE HMONG LETTER RRA;Lo;0;L;;;;;N;;;;;
+ 1E124;NYIAKENG PUACHUE HMONG LETTER A;Lo;0;L;;;;;N;;;;;
+ 1E125;NYIAKENG PUACHUE HMONG LETTER AA;Lo;0;L;;;;;N;;;;;
+ 1E126;NYIAKENG PUACHUE HMONG LETTER I;Lo;0;L;;;;;N;;;;;
+ 1E127;NYIAKENG PUACHUE HMONG LETTER U;Lo;0;L;;;;;N;;;;;
+ 1E128;NYIAKENG PUACHUE HMONG LETTER O;Lo;0;L;;;;;N;;;;;
+ 1E129;NYIAKENG PUACHUE HMONG LETTER OO;Lo;0;L;;;;;N;;;;;
+ 1E12A;NYIAKENG PUACHUE HMONG LETTER E;Lo;0;L;;;;;N;;;;;
+ 1E12B;NYIAKENG PUACHUE HMONG LETTER EE;Lo;0;L;;;;;N;;;;;
+ 1E12C;NYIAKENG PUACHUE HMONG LETTER W;Lo;0;L;;;;;N;;;;;
+ 1E130;NYIAKENG PUACHUE HMONG TONE-B;Mn;230;NSM;;;;;N;;;;;
+ 1E131;NYIAKENG PUACHUE HMONG TONE-M;Mn;230;NSM;;;;;N;;;;;
+ 1E132;NYIAKENG PUACHUE HMONG TONE-J;Mn;230;NSM;;;;;N;;;;;
+ 1E133;NYIAKENG PUACHUE HMONG TONE-V;Mn;230;NSM;;;;;N;;;;;
+ 1E134;NYIAKENG PUACHUE HMONG TONE-S;Mn;230;NSM;;;;;N;;;;;
+ 1E135;NYIAKENG PUACHUE HMONG TONE-G;Mn;230;NSM;;;;;N;;;;;
+ 1E136;NYIAKENG PUACHUE HMONG TONE-D;Mn;230;NSM;;;;;N;;;;;
+ 1E137;NYIAKENG PUACHUE HMONG SIGN FOR PERSON;Lm;0;L;;;;;N;;;;;
+ 1E138;NYIAKENG PUACHUE HMONG SIGN FOR THING;Lm;0;L;;;;;N;;;;;
+ 1E139;NYIAKENG PUACHUE HMONG SIGN FOR LOCATION;Lm;0;L;;;;;N;;;;;
+ 1E13A;NYIAKENG PUACHUE HMONG SIGN FOR ANIMAL;Lm;0;L;;;;;N;;;;;
+ 1E13B;NYIAKENG PUACHUE HMONG SIGN FOR INVERTEBRATE;Lm;0;L;;;;;N;;;;;
+ 1E13C;NYIAKENG PUACHUE HMONG SIGN XW XW;Lm;0;L;;;;;N;;;;;
+ 1E13D;NYIAKENG PUACHUE HMONG SYLLABLE LENGTHENER;Lm;0;L;;;;;N;;;;;
+ 1E140;NYIAKENG PUACHUE HMONG DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 1E141;NYIAKENG PUACHUE HMONG DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 1E142;NYIAKENG PUACHUE HMONG DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 1E143;NYIAKENG PUACHUE HMONG DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 1E144;NYIAKENG PUACHUE HMONG DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 1E145;NYIAKENG PUACHUE HMONG DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 1E146;NYIAKENG PUACHUE HMONG DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 1E147;NYIAKENG PUACHUE HMONG DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 1E148;NYIAKENG PUACHUE HMONG DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 1E149;NYIAKENG PUACHUE HMONG DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 1E14E;NYIAKENG PUACHUE HMONG LOGOGRAM NYAJ;Lo;0;L;;;;;N;;;;;
+ 1E14F;NYIAKENG PUACHUE HMONG CIRCLED CA;So;0;L;;;;;N;;;;;
+ 1E2C0;WANCHO LETTER AA;Lo;0;L;;;;;N;;;;;
+ 1E2C1;WANCHO LETTER A;Lo;0;L;;;;;N;;;;;
+ 1E2C2;WANCHO LETTER BA;Lo;0;L;;;;;N;;;;;
+ 1E2C3;WANCHO LETTER CA;Lo;0;L;;;;;N;;;;;
+ 1E2C4;WANCHO LETTER DA;Lo;0;L;;;;;N;;;;;
+ 1E2C5;WANCHO LETTER GA;Lo;0;L;;;;;N;;;;;
+ 1E2C6;WANCHO LETTER YA;Lo;0;L;;;;;N;;;;;
+ 1E2C7;WANCHO LETTER PHA;Lo;0;L;;;;;N;;;;;
+ 1E2C8;WANCHO LETTER LA;Lo;0;L;;;;;N;;;;;
+ 1E2C9;WANCHO LETTER NA;Lo;0;L;;;;;N;;;;;
+ 1E2CA;WANCHO LETTER PA;Lo;0;L;;;;;N;;;;;
+ 1E2CB;WANCHO LETTER TA;Lo;0;L;;;;;N;;;;;
+ 1E2CC;WANCHO LETTER THA;Lo;0;L;;;;;N;;;;;
+ 1E2CD;WANCHO LETTER FA;Lo;0;L;;;;;N;;;;;
+ 1E2CE;WANCHO LETTER SA;Lo;0;L;;;;;N;;;;;
+ 1E2CF;WANCHO LETTER SHA;Lo;0;L;;;;;N;;;;;
+ 1E2D0;WANCHO LETTER JA;Lo;0;L;;;;;N;;;;;
+ 1E2D1;WANCHO LETTER ZA;Lo;0;L;;;;;N;;;;;
+ 1E2D2;WANCHO LETTER WA;Lo;0;L;;;;;N;;;;;
+ 1E2D3;WANCHO LETTER VA;Lo;0;L;;;;;N;;;;;
+ 1E2D4;WANCHO LETTER KA;Lo;0;L;;;;;N;;;;;
+ 1E2D5;WANCHO LETTER O;Lo;0;L;;;;;N;;;;;
+ 1E2D6;WANCHO LETTER AU;Lo;0;L;;;;;N;;;;;
+ 1E2D7;WANCHO LETTER RA;Lo;0;L;;;;;N;;;;;
+ 1E2D8;WANCHO LETTER MA;Lo;0;L;;;;;N;;;;;
+ 1E2D9;WANCHO LETTER KHA;Lo;0;L;;;;;N;;;;;
+ 1E2DA;WANCHO LETTER HA;Lo;0;L;;;;;N;;;;;
+ 1E2DB;WANCHO LETTER E;Lo;0;L;;;;;N;;;;;
+ 1E2DC;WANCHO LETTER I;Lo;0;L;;;;;N;;;;;
+ 1E2DD;WANCHO LETTER NGA;Lo;0;L;;;;;N;;;;;
+ 1E2DE;WANCHO LETTER U;Lo;0;L;;;;;N;;;;;
+ 1E2DF;WANCHO LETTER LLHA;Lo;0;L;;;;;N;;;;;
+ 1E2E0;WANCHO LETTER TSA;Lo;0;L;;;;;N;;;;;
+ 1E2E1;WANCHO LETTER TRA;Lo;0;L;;;;;N;;;;;
+ 1E2E2;WANCHO LETTER ONG;Lo;0;L;;;;;N;;;;;
+ 1E2E3;WANCHO LETTER AANG;Lo;0;L;;;;;N;;;;;
+ 1E2E4;WANCHO LETTER ANG;Lo;0;L;;;;;N;;;;;
+ 1E2E5;WANCHO LETTER ING;Lo;0;L;;;;;N;;;;;
+ 1E2E6;WANCHO LETTER ON;Lo;0;L;;;;;N;;;;;
+ 1E2E7;WANCHO LETTER EN;Lo;0;L;;;;;N;;;;;
+ 1E2E8;WANCHO LETTER AAN;Lo;0;L;;;;;N;;;;;
+ 1E2E9;WANCHO LETTER NYA;Lo;0;L;;;;;N;;;;;
+ 1E2EA;WANCHO LETTER UEN;Lo;0;L;;;;;N;;;;;
+ 1E2EB;WANCHO LETTER YIH;Lo;0;L;;;;;N;;;;;
+ 1E2EC;WANCHO TONE TUP;Mn;230;NSM;;;;;N;;;;;
+ 1E2ED;WANCHO TONE TUPNI;Mn;230;NSM;;;;;N;;;;;
+ 1E2EE;WANCHO TONE KOI;Mn;230;NSM;;;;;N;;;;;
+ 1E2EF;WANCHO TONE KOINI;Mn;230;NSM;;;;;N;;;;;
+ 1E2F0;WANCHO DIGIT ZERO;Nd;0;L;;0;0;0;N;;;;;
+ 1E2F1;WANCHO DIGIT ONE;Nd;0;L;;1;1;1;N;;;;;
+ 1E2F2;WANCHO DIGIT TWO;Nd;0;L;;2;2;2;N;;;;;
+ 1E2F3;WANCHO DIGIT THREE;Nd;0;L;;3;3;3;N;;;;;
+ 1E2F4;WANCHO DIGIT FOUR;Nd;0;L;;4;4;4;N;;;;;
+ 1E2F5;WANCHO DIGIT FIVE;Nd;0;L;;5;5;5;N;;;;;
+ 1E2F6;WANCHO DIGIT SIX;Nd;0;L;;6;6;6;N;;;;;
+ 1E2F7;WANCHO DIGIT SEVEN;Nd;0;L;;7;7;7;N;;;;;
+ 1E2F8;WANCHO DIGIT EIGHT;Nd;0;L;;8;8;8;N;;;;;
+ 1E2F9;WANCHO DIGIT NINE;Nd;0;L;;9;9;9;N;;;;;
+ 1E2FF;WANCHO NGUN SIGN;Sc;0;ET;;;;;N;;;;;
+ 1E800;MENDE KIKAKUI SYLLABLE M001 KI;Lo;0;R;;;;;N;;;;;
+ 1E801;MENDE KIKAKUI SYLLABLE M002 KA;Lo;0;R;;;;;N;;;;;
+ 1E802;MENDE KIKAKUI SYLLABLE M003 KU;Lo;0;R;;;;;N;;;;;
+ 1E803;MENDE KIKAKUI SYLLABLE M065 KEE;Lo;0;R;;;;;N;;;;;
+ 1E804;MENDE KIKAKUI SYLLABLE M095 KE;Lo;0;R;;;;;N;;;;;
+ 1E805;MENDE KIKAKUI SYLLABLE M076 KOO;Lo;0;R;;;;;N;;;;;
+ 1E806;MENDE KIKAKUI SYLLABLE M048 KO;Lo;0;R;;;;;N;;;;;
+ 1E807;MENDE KIKAKUI SYLLABLE M179 KUA;Lo;0;R;;;;;N;;;;;
+ 1E808;MENDE KIKAKUI SYLLABLE M004 WI;Lo;0;R;;;;;N;;;;;
+ 1E809;MENDE KIKAKUI SYLLABLE M005 WA;Lo;0;R;;;;;N;;;;;
+ 1E80A;MENDE KIKAKUI SYLLABLE M006 WU;Lo;0;R;;;;;N;;;;;
+ 1E80B;MENDE KIKAKUI SYLLABLE M126 WEE;Lo;0;R;;;;;N;;;;;
+ 1E80C;MENDE KIKAKUI SYLLABLE M118 WE;Lo;0;R;;;;;N;;;;;
+ 1E80D;MENDE KIKAKUI SYLLABLE M114 WOO;Lo;0;R;;;;;N;;;;;
+ 1E80E;MENDE KIKAKUI SYLLABLE M045 WO;Lo;0;R;;;;;N;;;;;
+ 1E80F;MENDE KIKAKUI SYLLABLE M194 WUI;Lo;0;R;;;;;N;;;;;
+ 1E810;MENDE KIKAKUI SYLLABLE M143 WEI;Lo;0;R;;;;;N;;;;;
+ 1E811;MENDE KIKAKUI SYLLABLE M061 WVI;Lo;0;R;;;;;N;;;;;
+ 1E812;MENDE KIKAKUI SYLLABLE M049 WVA;Lo;0;R;;;;;N;;;;;
+ 1E813;MENDE KIKAKUI SYLLABLE M139 WVE;Lo;0;R;;;;;N;;;;;
+ 1E814;MENDE KIKAKUI SYLLABLE M007 MIN;Lo;0;R;;;;;N;;;;;
+ 1E815;MENDE KIKAKUI SYLLABLE M008 MAN;Lo;0;R;;;;;N;;;;;
+ 1E816;MENDE KIKAKUI SYLLABLE M009 MUN;Lo;0;R;;;;;N;;;;;
+ 1E817;MENDE KIKAKUI SYLLABLE M059 MEN;Lo;0;R;;;;;N;;;;;
+ 1E818;MENDE KIKAKUI SYLLABLE M094 MON;Lo;0;R;;;;;N;;;;;
+ 1E819;MENDE KIKAKUI SYLLABLE M154 MUAN;Lo;0;R;;;;;N;;;;;
+ 1E81A;MENDE KIKAKUI SYLLABLE M189 MUEN;Lo;0;R;;;;;N;;;;;
+ 1E81B;MENDE KIKAKUI SYLLABLE M010 BI;Lo;0;R;;;;;N;;;;;
+ 1E81C;MENDE KIKAKUI SYLLABLE M011 BA;Lo;0;R;;;;;N;;;;;
+ 1E81D;MENDE KIKAKUI SYLLABLE M012 BU;Lo;0;R;;;;;N;;;;;
+ 1E81E;MENDE KIKAKUI SYLLABLE M150 BEE;Lo;0;R;;;;;N;;;;;
+ 1E81F;MENDE KIKAKUI SYLLABLE M097 BE;Lo;0;R;;;;;N;;;;;
+ 1E820;MENDE KIKAKUI SYLLABLE M103 BOO;Lo;0;R;;;;;N;;;;;
+ 1E821;MENDE KIKAKUI SYLLABLE M138 BO;Lo;0;R;;;;;N;;;;;
+ 1E822;MENDE KIKAKUI SYLLABLE M013 I;Lo;0;R;;;;;N;;;;;
+ 1E823;MENDE KIKAKUI SYLLABLE M014 A;Lo;0;R;;;;;N;;;;;
+ 1E824;MENDE KIKAKUI SYLLABLE M015 U;Lo;0;R;;;;;N;;;;;
+ 1E825;MENDE KIKAKUI SYLLABLE M163 EE;Lo;0;R;;;;;N;;;;;
+ 1E826;MENDE KIKAKUI SYLLABLE M100 E;Lo;0;R;;;;;N;;;;;
+ 1E827;MENDE KIKAKUI SYLLABLE M165 OO;Lo;0;R;;;;;N;;;;;
+ 1E828;MENDE KIKAKUI SYLLABLE M147 O;Lo;0;R;;;;;N;;;;;
+ 1E829;MENDE KIKAKUI SYLLABLE M137 EI;Lo;0;R;;;;;N;;;;;
+ 1E82A;MENDE KIKAKUI SYLLABLE M131 IN;Lo;0;R;;;;;N;;;;;
+ 1E82B;MENDE KIKAKUI SYLLABLE M135 IN;Lo;0;R;;;;;N;;;;;
+ 1E82C;MENDE KIKAKUI SYLLABLE M195 AN;Lo;0;R;;;;;N;;;;;
+ 1E82D;MENDE KIKAKUI SYLLABLE M178 EN;Lo;0;R;;;;;N;;;;;
+ 1E82E;MENDE KIKAKUI SYLLABLE M019 SI;Lo;0;R;;;;;N;;;;;
+ 1E82F;MENDE KIKAKUI SYLLABLE M020 SA;Lo;0;R;;;;;N;;;;;
+ 1E830;MENDE KIKAKUI SYLLABLE M021 SU;Lo;0;R;;;;;N;;;;;
+ 1E831;MENDE KIKAKUI SYLLABLE M162 SEE;Lo;0;R;;;;;N;;;;;
+ 1E832;MENDE KIKAKUI SYLLABLE M116 SE;Lo;0;R;;;;;N;;;;;
+ 1E833;MENDE KIKAKUI SYLLABLE M136 SOO;Lo;0;R;;;;;N;;;;;
+ 1E834;MENDE KIKAKUI SYLLABLE M079 SO;Lo;0;R;;;;;N;;;;;
+ 1E835;MENDE KIKAKUI SYLLABLE M196 SIA;Lo;0;R;;;;;N;;;;;
+ 1E836;MENDE KIKAKUI SYLLABLE M025 LI;Lo;0;R;;;;;N;;;;;
+ 1E837;MENDE KIKAKUI SYLLABLE M026 LA;Lo;0;R;;;;;N;;;;;
+ 1E838;MENDE KIKAKUI SYLLABLE M027 LU;Lo;0;R;;;;;N;;;;;
+ 1E839;MENDE KIKAKUI SYLLABLE M084 LEE;Lo;0;R;;;;;N;;;;;
+ 1E83A;MENDE KIKAKUI SYLLABLE M073 LE;Lo;0;R;;;;;N;;;;;
+ 1E83B;MENDE KIKAKUI SYLLABLE M054 LOO;Lo;0;R;;;;;N;;;;;
+ 1E83C;MENDE KIKAKUI SYLLABLE M153 LO;Lo;0;R;;;;;N;;;;;
+ 1E83D;MENDE KIKAKUI SYLLABLE M110 LONG LE;Lo;0;R;;;;;N;;;;;
+ 1E83E;MENDE KIKAKUI SYLLABLE M016 DI;Lo;0;R;;;;;N;;;;;
+ 1E83F;MENDE KIKAKUI SYLLABLE M017 DA;Lo;0;R;;;;;N;;;;;
+ 1E840;MENDE KIKAKUI SYLLABLE M018 DU;Lo;0;R;;;;;N;;;;;
+ 1E841;MENDE KIKAKUI SYLLABLE M089 DEE;Lo;0;R;;;;;N;;;;;
+ 1E842;MENDE KIKAKUI SYLLABLE M180 DOO;Lo;0;R;;;;;N;;;;;
+ 1E843;MENDE KIKAKUI SYLLABLE M181 DO;Lo;0;R;;;;;N;;;;;
+ 1E844;MENDE KIKAKUI SYLLABLE M022 TI;Lo;0;R;;;;;N;;;;;
+ 1E845;MENDE KIKAKUI SYLLABLE M023 TA;Lo;0;R;;;;;N;;;;;
+ 1E846;MENDE KIKAKUI SYLLABLE M024 TU;Lo;0;R;;;;;N;;;;;
+ 1E847;MENDE KIKAKUI SYLLABLE M091 TEE;Lo;0;R;;;;;N;;;;;
+ 1E848;MENDE KIKAKUI SYLLABLE M055 TE;Lo;0;R;;;;;N;;;;;
+ 1E849;MENDE KIKAKUI SYLLABLE M104 TOO;Lo;0;R;;;;;N;;;;;
+ 1E84A;MENDE KIKAKUI SYLLABLE M069 TO;Lo;0;R;;;;;N;;;;;
+ 1E84B;MENDE KIKAKUI SYLLABLE M028 JI;Lo;0;R;;;;;N;;;;;
+ 1E84C;MENDE KIKAKUI SYLLABLE M029 JA;Lo;0;R;;;;;N;;;;;
+ 1E84D;MENDE KIKAKUI SYLLABLE M030 JU;Lo;0;R;;;;;N;;;;;
+ 1E84E;MENDE KIKAKUI SYLLABLE M157 JEE;Lo;0;R;;;;;N;;;;;
+ 1E84F;MENDE KIKAKUI SYLLABLE M113 JE;Lo;0;R;;;;;N;;;;;
+ 1E850;MENDE KIKAKUI SYLLABLE M160 JOO;Lo;0;R;;;;;N;;;;;
+ 1E851;MENDE KIKAKUI SYLLABLE M063 JO;Lo;0;R;;;;;N;;;;;
+ 1E852;MENDE KIKAKUI SYLLABLE M175 LONG JO;Lo;0;R;;;;;N;;;;;
+ 1E853;MENDE KIKAKUI SYLLABLE M031 YI;Lo;0;R;;;;;N;;;;;
+ 1E854;MENDE KIKAKUI SYLLABLE M032 YA;Lo;0;R;;;;;N;;;;;
+ 1E855;MENDE KIKAKUI SYLLABLE M033 YU;Lo;0;R;;;;;N;;;;;
+ 1E856;MENDE KIKAKUI SYLLABLE M109 YEE;Lo;0;R;;;;;N;;;;;
+ 1E857;MENDE KIKAKUI SYLLABLE M080 YE;Lo;0;R;;;;;N;;;;;
+ 1E858;MENDE KIKAKUI SYLLABLE M141 YOO;Lo;0;R;;;;;N;;;;;
+ 1E859;MENDE KIKAKUI SYLLABLE M121 YO;Lo;0;R;;;;;N;;;;;
+ 1E85A;MENDE KIKAKUI SYLLABLE M034 FI;Lo;0;R;;;;;N;;;;;
+ 1E85B;MENDE KIKAKUI SYLLABLE M035 FA;Lo;0;R;;;;;N;;;;;
+ 1E85C;MENDE KIKAKUI SYLLABLE M036 FU;Lo;0;R;;;;;N;;;;;
+ 1E85D;MENDE KIKAKUI SYLLABLE M078 FEE;Lo;0;R;;;;;N;;;;;
+ 1E85E;MENDE KIKAKUI SYLLABLE M075 FE;Lo;0;R;;;;;N;;;;;
+ 1E85F;MENDE KIKAKUI SYLLABLE M133 FOO;Lo;0;R;;;;;N;;;;;
+ 1E860;MENDE KIKAKUI SYLLABLE M088 FO;Lo;0;R;;;;;N;;;;;
+ 1E861;MENDE KIKAKUI SYLLABLE M197 FUA;Lo;0;R;;;;;N;;;;;
+ 1E862;MENDE KIKAKUI SYLLABLE M101 FAN;Lo;0;R;;;;;N;;;;;
+ 1E863;MENDE KIKAKUI SYLLABLE M037 NIN;Lo;0;R;;;;;N;;;;;
+ 1E864;MENDE KIKAKUI SYLLABLE M038 NAN;Lo;0;R;;;;;N;;;;;
+ 1E865;MENDE KIKAKUI SYLLABLE M039 NUN;Lo;0;R;;;;;N;;;;;
+ 1E866;MENDE KIKAKUI SYLLABLE M117 NEN;Lo;0;R;;;;;N;;;;;
+ 1E867;MENDE KIKAKUI SYLLABLE M169 NON;Lo;0;R;;;;;N;;;;;
+ 1E868;MENDE KIKAKUI SYLLABLE M176 HI;Lo;0;R;;;;;N;;;;;
+ 1E869;MENDE KIKAKUI SYLLABLE M041 HA;Lo;0;R;;;;;N;;;;;
+ 1E86A;MENDE KIKAKUI SYLLABLE M186 HU;Lo;0;R;;;;;N;;;;;
+ 1E86B;MENDE KIKAKUI SYLLABLE M040 HEE;Lo;0;R;;;;;N;;;;;
+ 1E86C;MENDE KIKAKUI SYLLABLE M096 HE;Lo;0;R;;;;;N;;;;;
+ 1E86D;MENDE KIKAKUI SYLLABLE M042 HOO;Lo;0;R;;;;;N;;;;;
+ 1E86E;MENDE KIKAKUI SYLLABLE M140 HO;Lo;0;R;;;;;N;;;;;
+ 1E86F;MENDE KIKAKUI SYLLABLE M083 HEEI;Lo;0;R;;;;;N;;;;;
+ 1E870;MENDE KIKAKUI SYLLABLE M128 HOOU;Lo;0;R;;;;;N;;;;;
+ 1E871;MENDE KIKAKUI SYLLABLE M053 HIN;Lo;0;R;;;;;N;;;;;
+ 1E872;MENDE KIKAKUI SYLLABLE M130 HAN;Lo;0;R;;;;;N;;;;;
+ 1E873;MENDE KIKAKUI SYLLABLE M087 HUN;Lo;0;R;;;;;N;;;;;
+ 1E874;MENDE KIKAKUI SYLLABLE M052 HEN;Lo;0;R;;;;;N;;;;;
+ 1E875;MENDE KIKAKUI SYLLABLE M193 HON;Lo;0;R;;;;;N;;;;;
+ 1E876;MENDE KIKAKUI SYLLABLE M046 HUAN;Lo;0;R;;;;;N;;;;;
+ 1E877;MENDE KIKAKUI SYLLABLE M090 NGGI;Lo;0;R;;;;;N;;;;;
+ 1E878;MENDE KIKAKUI SYLLABLE M043 NGGA;Lo;0;R;;;;;N;;;;;
+ 1E879;MENDE KIKAKUI SYLLABLE M082 NGGU;Lo;0;R;;;;;N;;;;;
+ 1E87A;MENDE KIKAKUI SYLLABLE M115 NGGEE;Lo;0;R;;;;;N;;;;;
+ 1E87B;MENDE KIKAKUI SYLLABLE M146 NGGE;Lo;0;R;;;;;N;;;;;
+ 1E87C;MENDE KIKAKUI SYLLABLE M156 NGGOO;Lo;0;R;;;;;N;;;;;
+ 1E87D;MENDE KIKAKUI SYLLABLE M120 NGGO;Lo;0;R;;;;;N;;;;;
+ 1E87E;MENDE KIKAKUI SYLLABLE M159 NGGAA;Lo;0;R;;;;;N;;;;;
+ 1E87F;MENDE KIKAKUI SYLLABLE M127 NGGUA;Lo;0;R;;;;;N;;;;;
+ 1E880;MENDE KIKAKUI SYLLABLE M086 LONG NGGE;Lo;0;R;;;;;N;;;;;
+ 1E881;MENDE KIKAKUI SYLLABLE M106 LONG NGGOO;Lo;0;R;;;;;N;;;;;
+ 1E882;MENDE KIKAKUI SYLLABLE M183 LONG NGGO;Lo;0;R;;;;;N;;;;;
+ 1E883;MENDE KIKAKUI SYLLABLE M155 GI;Lo;0;R;;;;;N;;;;;
+ 1E884;MENDE KIKAKUI SYLLABLE M111 GA;Lo;0;R;;;;;N;;;;;
+ 1E885;MENDE KIKAKUI SYLLABLE M168 GU;Lo;0;R;;;;;N;;;;;
+ 1E886;MENDE KIKAKUI SYLLABLE M190 GEE;Lo;0;R;;;;;N;;;;;
+ 1E887;MENDE KIKAKUI SYLLABLE M166 GUEI;Lo;0;R;;;;;N;;;;;
+ 1E888;MENDE KIKAKUI SYLLABLE M167 GUAN;Lo;0;R;;;;;N;;;;;
+ 1E889;MENDE KIKAKUI SYLLABLE M184 NGEN;Lo;0;R;;;;;N;;;;;
+ 1E88A;MENDE KIKAKUI SYLLABLE M057 NGON;Lo;0;R;;;;;N;;;;;
+ 1E88B;MENDE KIKAKUI SYLLABLE M177 NGUAN;Lo;0;R;;;;;N;;;;;
+ 1E88C;MENDE KIKAKUI SYLLABLE M068 PI;Lo;0;R;;;;;N;;;;;
+ 1E88D;MENDE KIKAKUI SYLLABLE M099 PA;Lo;0;R;;;;;N;;;;;
+ 1E88E;MENDE KIKAKUI SYLLABLE M050 PU;Lo;0;R;;;;;N;;;;;
+ 1E88F;MENDE KIKAKUI SYLLABLE M081 PEE;Lo;0;R;;;;;N;;;;;
+ 1E890;MENDE KIKAKUI SYLLABLE M051 PE;Lo;0;R;;;;;N;;;;;
+ 1E891;MENDE KIKAKUI SYLLABLE M102 POO;Lo;0;R;;;;;N;;;;;
+ 1E892;MENDE KIKAKUI SYLLABLE M066 PO;Lo;0;R;;;;;N;;;;;
+ 1E893;MENDE KIKAKUI SYLLABLE M145 MBI;Lo;0;R;;;;;N;;;;;
+ 1E894;MENDE KIKAKUI SYLLABLE M062 MBA;Lo;0;R;;;;;N;;;;;
+ 1E895;MENDE KIKAKUI SYLLABLE M122 MBU;Lo;0;R;;;;;N;;;;;
+ 1E896;MENDE KIKAKUI SYLLABLE M047 MBEE;Lo;0;R;;;;;N;;;;;
+ 1E897;MENDE KIKAKUI SYLLABLE M188 MBEE;Lo;0;R;;;;;N;;;;;
+ 1E898;MENDE KIKAKUI SYLLABLE M072 MBE;Lo;0;R;;;;;N;;;;;
+ 1E899;MENDE KIKAKUI SYLLABLE M172 MBOO;Lo;0;R;;;;;N;;;;;
+ 1E89A;MENDE KIKAKUI SYLLABLE M174 MBO;Lo;0;R;;;;;N;;;;;
+ 1E89B;MENDE KIKAKUI SYLLABLE M187 MBUU;Lo;0;R;;;;;N;;;;;
+ 1E89C;MENDE KIKAKUI SYLLABLE M161 LONG MBE;Lo;0;R;;;;;N;;;;;
+ 1E89D;MENDE KIKAKUI SYLLABLE M105 LONG MBOO;Lo;0;R;;;;;N;;;;;
+ 1E89E;MENDE KIKAKUI SYLLABLE M142 LONG MBO;Lo;0;R;;;;;N;;;;;
+ 1E89F;MENDE KIKAKUI SYLLABLE M132 KPI;Lo;0;R;;;;;N;;;;;
+ 1E8A0;MENDE KIKAKUI SYLLABLE M092 KPA;Lo;0;R;;;;;N;;;;;
+ 1E8A1;MENDE KIKAKUI SYLLABLE M074 KPU;Lo;0;R;;;;;N;;;;;
+ 1E8A2;MENDE KIKAKUI SYLLABLE M044 KPEE;Lo;0;R;;;;;N;;;;;
+ 1E8A3;MENDE KIKAKUI SYLLABLE M108 KPE;Lo;0;R;;;;;N;;;;;
+ 1E8A4;MENDE KIKAKUI SYLLABLE M112 KPOO;Lo;0;R;;;;;N;;;;;
+ 1E8A5;MENDE KIKAKUI SYLLABLE M158 KPO;Lo;0;R;;;;;N;;;;;
+ 1E8A6;MENDE KIKAKUI SYLLABLE M124 GBI;Lo;0;R;;;;;N;;;;;
+ 1E8A7;MENDE KIKAKUI SYLLABLE M056 GBA;Lo;0;R;;;;;N;;;;;
+ 1E8A8;MENDE KIKAKUI SYLLABLE M148 GBU;Lo;0;R;;;;;N;;;;;
+ 1E8A9;MENDE KIKAKUI SYLLABLE M093 GBEE;Lo;0;R;;;;;N;;;;;
+ 1E8AA;MENDE KIKAKUI SYLLABLE M107 GBE;Lo;0;R;;;;;N;;;;;
+ 1E8AB;MENDE KIKAKUI SYLLABLE M071 GBOO;Lo;0;R;;;;;N;;;;;
+ 1E8AC;MENDE KIKAKUI SYLLABLE M070 GBO;Lo;0;R;;;;;N;;;;;
+ 1E8AD;MENDE KIKAKUI SYLLABLE M171 RA;Lo;0;R;;;;;N;;;;;
+ 1E8AE;MENDE KIKAKUI SYLLABLE M123 NDI;Lo;0;R;;;;;N;;;;;
+ 1E8AF;MENDE KIKAKUI SYLLABLE M129 NDA;Lo;0;R;;;;;N;;;;;
+ 1E8B0;MENDE KIKAKUI SYLLABLE M125 NDU;Lo;0;R;;;;;N;;;;;
+ 1E8B1;MENDE KIKAKUI SYLLABLE M191 NDEE;Lo;0;R;;;;;N;;;;;
+ 1E8B2;MENDE KIKAKUI SYLLABLE M119 NDE;Lo;0;R;;;;;N;;;;;
+ 1E8B3;MENDE KIKAKUI SYLLABLE M067 NDOO;Lo;0;R;;;;;N;;;;;
+ 1E8B4;MENDE KIKAKUI SYLLABLE M064 NDO;Lo;0;R;;;;;N;;;;;
+ 1E8B5;MENDE KIKAKUI SYLLABLE M152 NJA;Lo;0;R;;;;;N;;;;;
+ 1E8B6;MENDE KIKAKUI SYLLABLE M192 NJU;Lo;0;R;;;;;N;;;;;
+ 1E8B7;MENDE KIKAKUI SYLLABLE M149 NJEE;Lo;0;R;;;;;N;;;;;
+ 1E8B8;MENDE KIKAKUI SYLLABLE M134 NJOO;Lo;0;R;;;;;N;;;;;
+ 1E8B9;MENDE KIKAKUI SYLLABLE M182 VI;Lo;0;R;;;;;N;;;;;
+ 1E8BA;MENDE KIKAKUI SYLLABLE M185 VA;Lo;0;R;;;;;N;;;;;
+ 1E8BB;MENDE KIKAKUI SYLLABLE M151 VU;Lo;0;R;;;;;N;;;;;
+ 1E8BC;MENDE KIKAKUI SYLLABLE M173 VEE;Lo;0;R;;;;;N;;;;;
+ 1E8BD;MENDE KIKAKUI SYLLABLE M085 VE;Lo;0;R;;;;;N;;;;;
+ 1E8BE;MENDE KIKAKUI SYLLABLE M144 VOO;Lo;0;R;;;;;N;;;;;
+ 1E8BF;MENDE KIKAKUI SYLLABLE M077 VO;Lo;0;R;;;;;N;;;;;
+ 1E8C0;MENDE KIKAKUI SYLLABLE M164 NYIN;Lo;0;R;;;;;N;;;;;
+ 1E8C1;MENDE KIKAKUI SYLLABLE M058 NYAN;Lo;0;R;;;;;N;;;;;
+ 1E8C2;MENDE KIKAKUI SYLLABLE M170 NYUN;Lo;0;R;;;;;N;;;;;
+ 1E8C3;MENDE KIKAKUI SYLLABLE M098 NYEN;Lo;0;R;;;;;N;;;;;
+ 1E8C4;MENDE KIKAKUI SYLLABLE M060 NYON;Lo;0;R;;;;;N;;;;;
+ 1E8C7;MENDE KIKAKUI DIGIT ONE;No;0;R;;;;1;N;;;;;
+ 1E8C8;MENDE KIKAKUI DIGIT TWO;No;0;R;;;;2;N;;;;;
+ 1E8C9;MENDE KIKAKUI DIGIT THREE;No;0;R;;;;3;N;;;;;
+ 1E8CA;MENDE KIKAKUI DIGIT FOUR;No;0;R;;;;4;N;;;;;
+ 1E8CB;MENDE KIKAKUI DIGIT FIVE;No;0;R;;;;5;N;;;;;
+ 1E8CC;MENDE KIKAKUI DIGIT SIX;No;0;R;;;;6;N;;;;;
+ 1E8CD;MENDE KIKAKUI DIGIT SEVEN;No;0;R;;;;7;N;;;;;
+ 1E8CE;MENDE KIKAKUI DIGIT EIGHT;No;0;R;;;;8;N;;;;;
+ 1E8CF;MENDE KIKAKUI DIGIT NINE;No;0;R;;;;9;N;;;;;
+ 1E8D0;MENDE KIKAKUI COMBINING NUMBER TEENS;Mn;220;NSM;;;;;N;;;;;
+ 1E8D1;MENDE KIKAKUI COMBINING NUMBER TENS;Mn;220;NSM;;;;;N;;;;;
+ 1E8D2;MENDE KIKAKUI COMBINING NUMBER HUNDREDS;Mn;220;NSM;;;;;N;;;;;
+ 1E8D3;MENDE KIKAKUI COMBINING NUMBER THOUSANDS;Mn;220;NSM;;;;;N;;;;;
+ 1E8D4;MENDE KIKAKUI COMBINING NUMBER TEN THOUSANDS;Mn;220;NSM;;;;;N;;;;;
+ 1E8D5;MENDE KIKAKUI COMBINING NUMBER HUNDRED THOUSANDS;Mn;220;NSM;;;;;N;;;;;
+ 1E8D6;MENDE KIKAKUI COMBINING NUMBER MILLIONS;Mn;220;NSM;;;;;N;;;;;
+ 1E900;ADLAM CAPITAL LETTER ALIF;Lu;0;R;;;;;N;;;;1E922;
+ 1E901;ADLAM CAPITAL LETTER DAALI;Lu;0;R;;;;;N;;;;1E923;
+ 1E902;ADLAM CAPITAL LETTER LAAM;Lu;0;R;;;;;N;;;;1E924;
+ 1E903;ADLAM CAPITAL LETTER MIIM;Lu;0;R;;;;;N;;;;1E925;
+ 1E904;ADLAM CAPITAL LETTER BA;Lu;0;R;;;;;N;;;;1E926;
+ 1E905;ADLAM CAPITAL LETTER SINNYIIYHE;Lu;0;R;;;;;N;;;;1E927;
+ 1E906;ADLAM CAPITAL LETTER PE;Lu;0;R;;;;;N;;;;1E928;
+ 1E907;ADLAM CAPITAL LETTER BHE;Lu;0;R;;;;;N;;;;1E929;
+ 1E908;ADLAM CAPITAL LETTER RA;Lu;0;R;;;;;N;;;;1E92A;
+ 1E909;ADLAM CAPITAL LETTER E;Lu;0;R;;;;;N;;;;1E92B;
+ 1E90A;ADLAM CAPITAL LETTER FA;Lu;0;R;;;;;N;;;;1E92C;
+ 1E90B;ADLAM CAPITAL LETTER I;Lu;0;R;;;;;N;;;;1E92D;
+ 1E90C;ADLAM CAPITAL LETTER O;Lu;0;R;;;;;N;;;;1E92E;
+ 1E90D;ADLAM CAPITAL LETTER DHA;Lu;0;R;;;;;N;;;;1E92F;
+ 1E90E;ADLAM CAPITAL LETTER YHE;Lu;0;R;;;;;N;;;;1E930;
+ 1E90F;ADLAM CAPITAL LETTER WAW;Lu;0;R;;;;;N;;;;1E931;
+ 1E910;ADLAM CAPITAL LETTER NUN;Lu;0;R;;;;;N;;;;1E932;
+ 1E911;ADLAM CAPITAL LETTER KAF;Lu;0;R;;;;;N;;;;1E933;
+ 1E912;ADLAM CAPITAL LETTER YA;Lu;0;R;;;;;N;;;;1E934;
+ 1E913;ADLAM CAPITAL LETTER U;Lu;0;R;;;;;N;;;;1E935;
+ 1E914;ADLAM CAPITAL LETTER JIIM;Lu;0;R;;;;;N;;;;1E936;
+ 1E915;ADLAM CAPITAL LETTER CHI;Lu;0;R;;;;;N;;;;1E937;
+ 1E916;ADLAM CAPITAL LETTER HA;Lu;0;R;;;;;N;;;;1E938;
+ 1E917;ADLAM CAPITAL LETTER QAAF;Lu;0;R;;;;;N;;;;1E939;
+ 1E918;ADLAM CAPITAL LETTER GA;Lu;0;R;;;;;N;;;;1E93A;
+ 1E919;ADLAM CAPITAL LETTER NYA;Lu;0;R;;;;;N;;;;1E93B;
+ 1E91A;ADLAM CAPITAL LETTER TU;Lu;0;R;;;;;N;;;;1E93C;
+ 1E91B;ADLAM CAPITAL LETTER NHA;Lu;0;R;;;;;N;;;;1E93D;
+ 1E91C;ADLAM CAPITAL LETTER VA;Lu;0;R;;;;;N;;;;1E93E;
+ 1E91D;ADLAM CAPITAL LETTER KHA;Lu;0;R;;;;;N;;;;1E93F;
+ 1E91E;ADLAM CAPITAL LETTER GBE;Lu;0;R;;;;;N;;;;1E940;
+ 1E91F;ADLAM CAPITAL LETTER ZAL;Lu;0;R;;;;;N;;;;1E941;
+ 1E920;ADLAM CAPITAL LETTER KPO;Lu;0;R;;;;;N;;;;1E942;
+ 1E921;ADLAM CAPITAL LETTER SHA;Lu;0;R;;;;;N;;;;1E943;
+ 1E922;ADLAM SMALL LETTER ALIF;Ll;0;R;;;;;N;;;1E900;;1E900
+ 1E923;ADLAM SMALL LETTER DAALI;Ll;0;R;;;;;N;;;1E901;;1E901
+ 1E924;ADLAM SMALL LETTER LAAM;Ll;0;R;;;;;N;;;1E902;;1E902
+ 1E925;ADLAM SMALL LETTER MIIM;Ll;0;R;;;;;N;;;1E903;;1E903
+ 1E926;ADLAM SMALL LETTER BA;Ll;0;R;;;;;N;;;1E904;;1E904
+ 1E927;ADLAM SMALL LETTER SINNYIIYHE;Ll;0;R;;;;;N;;;1E905;;1E905
+ 1E928;ADLAM SMALL LETTER PE;Ll;0;R;;;;;N;;;1E906;;1E906
+ 1E929;ADLAM SMALL LETTER BHE;Ll;0;R;;;;;N;;;1E907;;1E907
+ 1E92A;ADLAM SMALL LETTER RA;Ll;0;R;;;;;N;;;1E908;;1E908
+ 1E92B;ADLAM SMALL LETTER E;Ll;0;R;;;;;N;;;1E909;;1E909
+ 1E92C;ADLAM SMALL LETTER FA;Ll;0;R;;;;;N;;;1E90A;;1E90A
+ 1E92D;ADLAM SMALL LETTER I;Ll;0;R;;;;;N;;;1E90B;;1E90B
+ 1E92E;ADLAM SMALL LETTER O;Ll;0;R;;;;;N;;;1E90C;;1E90C
+ 1E92F;ADLAM SMALL LETTER DHA;Ll;0;R;;;;;N;;;1E90D;;1E90D
+ 1E930;ADLAM SMALL LETTER YHE;Ll;0;R;;;;;N;;;1E90E;;1E90E
+ 1E931;ADLAM SMALL LETTER WAW;Ll;0;R;;;;;N;;;1E90F;;1E90F
+ 1E932;ADLAM SMALL LETTER NUN;Ll;0;R;;;;;N;;;1E910;;1E910
+ 1E933;ADLAM SMALL LETTER KAF;Ll;0;R;;;;;N;;;1E911;;1E911
+ 1E934;ADLAM SMALL LETTER YA;Ll;0;R;;;;;N;;;1E912;;1E912
+ 1E935;ADLAM SMALL LETTER U;Ll;0;R;;;;;N;;;1E913;;1E913
+ 1E936;ADLAM SMALL LETTER JIIM;Ll;0;R;;;;;N;;;1E914;;1E914
+ 1E937;ADLAM SMALL LETTER CHI;Ll;0;R;;;;;N;;;1E915;;1E915
+ 1E938;ADLAM SMALL LETTER HA;Ll;0;R;;;;;N;;;1E916;;1E916
+ 1E939;ADLAM SMALL LETTER QAAF;Ll;0;R;;;;;N;;;1E917;;1E917
+ 1E93A;ADLAM SMALL LETTER GA;Ll;0;R;;;;;N;;;1E918;;1E918
+ 1E93B;ADLAM SMALL LETTER NYA;Ll;0;R;;;;;N;;;1E919;;1E919
+ 1E93C;ADLAM SMALL LETTER TU;Ll;0;R;;;;;N;;;1E91A;;1E91A
+ 1E93D;ADLAM SMALL LETTER NHA;Ll;0;R;;;;;N;;;1E91B;;1E91B
+ 1E93E;ADLAM SMALL LETTER VA;Ll;0;R;;;;;N;;;1E91C;;1E91C
+ 1E93F;ADLAM SMALL LETTER KHA;Ll;0;R;;;;;N;;;1E91D;;1E91D
+ 1E940;ADLAM SMALL LETTER GBE;Ll;0;R;;;;;N;;;1E91E;;1E91E
+ 1E941;ADLAM SMALL LETTER ZAL;Ll;0;R;;;;;N;;;1E91F;;1E91F
+ 1E942;ADLAM SMALL LETTER KPO;Ll;0;R;;;;;N;;;1E920;;1E920
+ 1E943;ADLAM SMALL LETTER SHA;Ll;0;R;;;;;N;;;1E921;;1E921
+ 1E944;ADLAM ALIF LENGTHENER;Mn;230;NSM;;;;;N;;;;;
+ 1E945;ADLAM VOWEL LENGTHENER;Mn;230;NSM;;;;;N;;;;;
+ 1E946;ADLAM GEMINATION MARK;Mn;230;NSM;;;;;N;;;;;
+ 1E947;ADLAM HAMZA;Mn;230;NSM;;;;;N;;;;;
+ 1E948;ADLAM CONSONANT MODIFIER;Mn;230;NSM;;;;;N;;;;;
+ 1E949;ADLAM GEMINATE CONSONANT MODIFIER;Mn;230;NSM;;;;;N;;;;;
+ 1E94A;ADLAM NUKTA;Mn;7;NSM;;;;;N;;;;;
+ 1E94B;ADLAM NASALIZATION MARK;Lm;0;R;;;;;N;;;;;
+ 1E950;ADLAM DIGIT ZERO;Nd;0;R;;0;0;0;N;;;;;
+ 1E951;ADLAM DIGIT ONE;Nd;0;R;;1;1;1;N;;;;;
+ 1E952;ADLAM DIGIT TWO;Nd;0;R;;2;2;2;N;;;;;
+ 1E953;ADLAM DIGIT THREE;Nd;0;R;;3;3;3;N;;;;;
+ 1E954;ADLAM DIGIT FOUR;Nd;0;R;;4;4;4;N;;;;;
+ 1E955;ADLAM DIGIT FIVE;Nd;0;R;;5;5;5;N;;;;;
+ 1E956;ADLAM DIGIT SIX;Nd;0;R;;6;6;6;N;;;;;
+ 1E957;ADLAM DIGIT SEVEN;Nd;0;R;;7;7;7;N;;;;;
+ 1E958;ADLAM DIGIT EIGHT;Nd;0;R;;8;8;8;N;;;;;
+ 1E959;ADLAM DIGIT NINE;Nd;0;R;;9;9;9;N;;;;;
+ 1E95E;ADLAM INITIAL EXCLAMATION MARK;Po;0;R;;;;;N;;;;;
+ 1E95F;ADLAM INITIAL QUESTION MARK;Po;0;R;;;;;N;;;;;
+ 1EC71;INDIC SIYAQ NUMBER ONE;No;0;AL;;;;1;N;;;;;
+ 1EC72;INDIC SIYAQ NUMBER TWO;No;0;AL;;;;2;N;;;;;
+ 1EC73;INDIC SIYAQ NUMBER THREE;No;0;AL;;;;3;N;;;;;
+ 1EC74;INDIC SIYAQ NUMBER FOUR;No;0;AL;;;;4;N;;;;;
+ 1EC75;INDIC SIYAQ NUMBER FIVE;No;0;AL;;;;5;N;;;;;
+ 1EC76;INDIC SIYAQ NUMBER SIX;No;0;AL;;;;6;N;;;;;
+ 1EC77;INDIC SIYAQ NUMBER SEVEN;No;0;AL;;;;7;N;;;;;
+ 1EC78;INDIC SIYAQ NUMBER EIGHT;No;0;AL;;;;8;N;;;;;
+ 1EC79;INDIC SIYAQ NUMBER NINE;No;0;AL;;;;9;N;;;;;
+ 1EC7A;INDIC SIYAQ NUMBER TEN;No;0;AL;;;;10;N;;;;;
+ 1EC7B;INDIC SIYAQ NUMBER TWENTY;No;0;AL;;;;20;N;;;;;
+ 1EC7C;INDIC SIYAQ NUMBER THIRTY;No;0;AL;;;;30;N;;;;;
+ 1EC7D;INDIC SIYAQ NUMBER FORTY;No;0;AL;;;;40;N;;;;;
+ 1EC7E;INDIC SIYAQ NUMBER FIFTY;No;0;AL;;;;50;N;;;;;
+ 1EC7F;INDIC SIYAQ NUMBER SIXTY;No;0;AL;;;;60;N;;;;;
+ 1EC80;INDIC SIYAQ NUMBER SEVENTY;No;0;AL;;;;70;N;;;;;
+ 1EC81;INDIC SIYAQ NUMBER EIGHTY;No;0;AL;;;;80;N;;;;;
+ 1EC82;INDIC SIYAQ NUMBER NINETY;No;0;AL;;;;90;N;;;;;
+ 1EC83;INDIC SIYAQ NUMBER ONE HUNDRED;No;0;AL;;;;100;N;;;;;
+ 1EC84;INDIC SIYAQ NUMBER TWO HUNDRED;No;0;AL;;;;200;N;;;;;
+ 1EC85;INDIC SIYAQ NUMBER THREE HUNDRED;No;0;AL;;;;300;N;;;;;
+ 1EC86;INDIC SIYAQ NUMBER FOUR HUNDRED;No;0;AL;;;;400;N;;;;;
+ 1EC87;INDIC SIYAQ NUMBER FIVE HUNDRED;No;0;AL;;;;500;N;;;;;
+ 1EC88;INDIC SIYAQ NUMBER SIX HUNDRED;No;0;AL;;;;600;N;;;;;
+ 1EC89;INDIC SIYAQ NUMBER SEVEN HUNDRED;No;0;AL;;;;700;N;;;;;
+ 1EC8A;INDIC SIYAQ NUMBER EIGHT HUNDRED;No;0;AL;;;;800;N;;;;;
+ 1EC8B;INDIC SIYAQ NUMBER NINE HUNDRED;No;0;AL;;;;900;N;;;;;
+ 1EC8C;INDIC SIYAQ NUMBER ONE THOUSAND;No;0;AL;;;;1000;N;;;;;
+ 1EC8D;INDIC SIYAQ NUMBER TWO THOUSAND;No;0;AL;;;;2000;N;;;;;
+ 1EC8E;INDIC SIYAQ NUMBER THREE THOUSAND;No;0;AL;;;;3000;N;;;;;
+ 1EC8F;INDIC SIYAQ NUMBER FOUR THOUSAND;No;0;AL;;;;4000;N;;;;;
+ 1EC90;INDIC SIYAQ NUMBER FIVE THOUSAND;No;0;AL;;;;5000;N;;;;;
+ 1EC91;INDIC SIYAQ NUMBER SIX THOUSAND;No;0;AL;;;;6000;N;;;;;
+ 1EC92;INDIC SIYAQ NUMBER SEVEN THOUSAND;No;0;AL;;;;7000;N;;;;;
+ 1EC93;INDIC SIYAQ NUMBER EIGHT THOUSAND;No;0;AL;;;;8000;N;;;;;
+ 1EC94;INDIC SIYAQ NUMBER NINE THOUSAND;No;0;AL;;;;9000;N;;;;;
+ 1EC95;INDIC SIYAQ NUMBER TEN THOUSAND;No;0;AL;;;;10000;N;;;;;
+ 1EC96;INDIC SIYAQ NUMBER TWENTY THOUSAND;No;0;AL;;;;20000;N;;;;;
+ 1EC97;INDIC SIYAQ NUMBER THIRTY THOUSAND;No;0;AL;;;;30000;N;;;;;
+ 1EC98;INDIC SIYAQ NUMBER FORTY THOUSAND;No;0;AL;;;;40000;N;;;;;
+ 1EC99;INDIC SIYAQ NUMBER FIFTY THOUSAND;No;0;AL;;;;50000;N;;;;;
+ 1EC9A;INDIC SIYAQ NUMBER SIXTY THOUSAND;No;0;AL;;;;60000;N;;;;;
+ 1EC9B;INDIC SIYAQ NUMBER SEVENTY THOUSAND;No;0;AL;;;;70000;N;;;;;
+ 1EC9C;INDIC SIYAQ NUMBER EIGHTY THOUSAND;No;0;AL;;;;80000;N;;;;;
+ 1EC9D;INDIC SIYAQ NUMBER NINETY THOUSAND;No;0;AL;;;;90000;N;;;;;
+ 1EC9E;INDIC SIYAQ NUMBER LAKH;No;0;AL;;;;100000;N;;;;;
+ 1EC9F;INDIC SIYAQ NUMBER LAKHAN;No;0;AL;;;;200000;N;;;;;
+ 1ECA0;INDIC SIYAQ LAKH MARK;No;0;AL;;;;100000;N;;;;;
+ 1ECA1;INDIC SIYAQ NUMBER KAROR;No;0;AL;;;;10000000;N;;;;;
+ 1ECA2;INDIC SIYAQ NUMBER KARORAN;No;0;AL;;;;20000000;N;;;;;
+ 1ECA3;INDIC SIYAQ NUMBER PREFIXED ONE;No;0;AL;;;;1;N;;;;;
+ 1ECA4;INDIC SIYAQ NUMBER PREFIXED TWO;No;0;AL;;;;2;N;;;;;
+ 1ECA5;INDIC SIYAQ NUMBER PREFIXED THREE;No;0;AL;;;;3;N;;;;;
+ 1ECA6;INDIC SIYAQ NUMBER PREFIXED FOUR;No;0;AL;;;;4;N;;;;;
+ 1ECA7;INDIC SIYAQ NUMBER PREFIXED FIVE;No;0;AL;;;;5;N;;;;;
+ 1ECA8;INDIC SIYAQ NUMBER PREFIXED SIX;No;0;AL;;;;6;N;;;;;
+ 1ECA9;INDIC SIYAQ NUMBER PREFIXED SEVEN;No;0;AL;;;;7;N;;;;;
+ 1ECAA;INDIC SIYAQ NUMBER PREFIXED EIGHT;No;0;AL;;;;8;N;;;;;
+ 1ECAB;INDIC SIYAQ NUMBER PREFIXED NINE;No;0;AL;;;;9;N;;;;;
+ 1ECAC;INDIC SIYAQ PLACEHOLDER;So;0;AL;;;;;N;;;;;
+ 1ECAD;INDIC SIYAQ FRACTION ONE QUARTER;No;0;AL;;;;1/4;N;;;;;
+ 1ECAE;INDIC SIYAQ FRACTION ONE HALF;No;0;AL;;;;1/2;N;;;;;
+ 1ECAF;INDIC SIYAQ FRACTION THREE QUARTERS;No;0;AL;;;;3/4;N;;;;;
+ 1ECB0;INDIC SIYAQ RUPEE MARK;Sc;0;AL;;;;;N;;;;;
+ 1ECB1;INDIC SIYAQ NUMBER ALTERNATE ONE;No;0;AL;;;;1;N;;;;;
+ 1ECB2;INDIC SIYAQ NUMBER ALTERNATE TWO;No;0;AL;;;;2;N;;;;;
+ 1ECB3;INDIC SIYAQ NUMBER ALTERNATE TEN THOUSAND;No;0;AL;;;;10000;N;;;;;
+ 1ECB4;INDIC SIYAQ ALTERNATE LAKH MARK;No;0;AL;;;;100000;N;;;;;
+ 1ED01;OTTOMAN SIYAQ NUMBER ONE;No;0;AL;;;;1;N;;;;;
+ 1ED02;OTTOMAN SIYAQ NUMBER TWO;No;0;AL;;;;2;N;;;;;
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+ 1ED04;OTTOMAN SIYAQ NUMBER FOUR;No;0;AL;;;;4;N;;;;;
+ 1ED05;OTTOMAN SIYAQ NUMBER FIVE;No;0;AL;;;;5;N;;;;;
+ 1ED06;OTTOMAN SIYAQ NUMBER SIX;No;0;AL;;;;6;N;;;;;
+ 1ED07;OTTOMAN SIYAQ NUMBER SEVEN;No;0;AL;;;;7;N;;;;;
+ 1ED08;OTTOMAN SIYAQ NUMBER EIGHT;No;0;AL;;;;8;N;;;;;
+ 1ED09;OTTOMAN SIYAQ NUMBER NINE;No;0;AL;;;;9;N;;;;;
+ 1ED0A;OTTOMAN SIYAQ NUMBER TEN;No;0;AL;;;;10;N;;;;;
+ 1ED0B;OTTOMAN SIYAQ NUMBER TWENTY;No;0;AL;;;;20;N;;;;;
+ 1ED0C;OTTOMAN SIYAQ NUMBER THIRTY;No;0;AL;;;;30;N;;;;;
+ 1ED0D;OTTOMAN SIYAQ NUMBER FORTY;No;0;AL;;;;40;N;;;;;
+ 1ED0E;OTTOMAN SIYAQ NUMBER FIFTY;No;0;AL;;;;50;N;;;;;
+ 1ED0F;OTTOMAN SIYAQ NUMBER SIXTY;No;0;AL;;;;60;N;;;;;
+ 1ED10;OTTOMAN SIYAQ NUMBER SEVENTY;No;0;AL;;;;70;N;;;;;
+ 1ED11;OTTOMAN SIYAQ NUMBER EIGHTY;No;0;AL;;;;80;N;;;;;
+ 1ED12;OTTOMAN SIYAQ NUMBER NINETY;No;0;AL;;;;90;N;;;;;
+ 1ED13;OTTOMAN SIYAQ NUMBER ONE HUNDRED;No;0;AL;;;;100;N;;;;;
+ 1ED14;OTTOMAN SIYAQ NUMBER TWO HUNDRED;No;0;AL;;;;200;N;;;;;
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+ 1F041;DOMINO TILE HORIZONTAL-02-02;So;0;ON;;;;;N;;;;;
+ 1F042;DOMINO TILE HORIZONTAL-02-03;So;0;ON;;;;;N;;;;;
+ 1F043;DOMINO TILE HORIZONTAL-02-04;So;0;ON;;;;;N;;;;;
+ 1F044;DOMINO TILE HORIZONTAL-02-05;So;0;ON;;;;;N;;;;;
+ 1F045;DOMINO TILE HORIZONTAL-02-06;So;0;ON;;;;;N;;;;;
+ 1F046;DOMINO TILE HORIZONTAL-03-00;So;0;ON;;;;;N;;;;;
+ 1F047;DOMINO TILE HORIZONTAL-03-01;So;0;ON;;;;;N;;;;;
+ 1F048;DOMINO TILE HORIZONTAL-03-02;So;0;ON;;;;;N;;;;;
+ 1F049;DOMINO TILE HORIZONTAL-03-03;So;0;ON;;;;;N;;;;;
+ 1F04A;DOMINO TILE HORIZONTAL-03-04;So;0;ON;;;;;N;;;;;
+ 1F04B;DOMINO TILE HORIZONTAL-03-05;So;0;ON;;;;;N;;;;;
+ 1F04C;DOMINO TILE HORIZONTAL-03-06;So;0;ON;;;;;N;;;;;
+ 1F04D;DOMINO TILE HORIZONTAL-04-00;So;0;ON;;;;;N;;;;;
+ 1F04E;DOMINO TILE HORIZONTAL-04-01;So;0;ON;;;;;N;;;;;
+ 1F04F;DOMINO TILE HORIZONTAL-04-02;So;0;ON;;;;;N;;;;;
+ 1F050;DOMINO TILE HORIZONTAL-04-03;So;0;ON;;;;;N;;;;;
+ 1F051;DOMINO TILE HORIZONTAL-04-04;So;0;ON;;;;;N;;;;;
+ 1F052;DOMINO TILE HORIZONTAL-04-05;So;0;ON;;;;;N;;;;;
+ 1F053;DOMINO TILE HORIZONTAL-04-06;So;0;ON;;;;;N;;;;;
+ 1F054;DOMINO TILE HORIZONTAL-05-00;So;0;ON;;;;;N;;;;;
+ 1F055;DOMINO TILE HORIZONTAL-05-01;So;0;ON;;;;;N;;;;;
+ 1F056;DOMINO TILE HORIZONTAL-05-02;So;0;ON;;;;;N;;;;;
+ 1F057;DOMINO TILE HORIZONTAL-05-03;So;0;ON;;;;;N;;;;;
+ 1F058;DOMINO TILE HORIZONTAL-05-04;So;0;ON;;;;;N;;;;;
+ 1F059;DOMINO TILE HORIZONTAL-05-05;So;0;ON;;;;;N;;;;;
+ 1F05A;DOMINO TILE HORIZONTAL-05-06;So;0;ON;;;;;N;;;;;
+ 1F05B;DOMINO TILE HORIZONTAL-06-00;So;0;ON;;;;;N;;;;;
+ 1F05C;DOMINO TILE HORIZONTAL-06-01;So;0;ON;;;;;N;;;;;
+ 1F05D;DOMINO TILE HORIZONTAL-06-02;So;0;ON;;;;;N;;;;;
+ 1F05E;DOMINO TILE HORIZONTAL-06-03;So;0;ON;;;;;N;;;;;
+ 1F05F;DOMINO TILE HORIZONTAL-06-04;So;0;ON;;;;;N;;;;;
+ 1F060;DOMINO TILE HORIZONTAL-06-05;So;0;ON;;;;;N;;;;;
+ 1F061;DOMINO TILE HORIZONTAL-06-06;So;0;ON;;;;;N;;;;;
+ 1F062;DOMINO TILE VERTICAL BACK;So;0;ON;;;;;N;;;;;
+ 1F063;DOMINO TILE VERTICAL-00-00;So;0;ON;;;;;N;;;;;
+ 1F064;DOMINO TILE VERTICAL-00-01;So;0;ON;;;;;N;;;;;
+ 1F065;DOMINO TILE VERTICAL-00-02;So;0;ON;;;;;N;;;;;
+ 1F066;DOMINO TILE VERTICAL-00-03;So;0;ON;;;;;N;;;;;
+ 1F067;DOMINO TILE VERTICAL-00-04;So;0;ON;;;;;N;;;;;
+ 1F068;DOMINO TILE VERTICAL-00-05;So;0;ON;;;;;N;;;;;
+ 1F069;DOMINO TILE VERTICAL-00-06;So;0;ON;;;;;N;;;;;
+ 1F06A;DOMINO TILE VERTICAL-01-00;So;0;ON;;;;;N;;;;;
+ 1F06B;DOMINO TILE VERTICAL-01-01;So;0;ON;;;;;N;;;;;
+ 1F06C;DOMINO TILE VERTICAL-01-02;So;0;ON;;;;;N;;;;;
+ 1F06D;DOMINO TILE VERTICAL-01-03;So;0;ON;;;;;N;;;;;
+ 1F06E;DOMINO TILE VERTICAL-01-04;So;0;ON;;;;;N;;;;;
+ 1F06F;DOMINO TILE VERTICAL-01-05;So;0;ON;;;;;N;;;;;
+ 1F070;DOMINO TILE VERTICAL-01-06;So;0;ON;;;;;N;;;;;
+ 1F071;DOMINO TILE VERTICAL-02-00;So;0;ON;;;;;N;;;;;
+ 1F072;DOMINO TILE VERTICAL-02-01;So;0;ON;;;;;N;;;;;
+ 1F073;DOMINO TILE VERTICAL-02-02;So;0;ON;;;;;N;;;;;
+ 1F074;DOMINO TILE VERTICAL-02-03;So;0;ON;;;;;N;;;;;
+ 1F075;DOMINO TILE VERTICAL-02-04;So;0;ON;;;;;N;;;;;
+ 1F076;DOMINO TILE VERTICAL-02-05;So;0;ON;;;;;N;;;;;
+ 1F077;DOMINO TILE VERTICAL-02-06;So;0;ON;;;;;N;;;;;
+ 1F078;DOMINO TILE VERTICAL-03-00;So;0;ON;;;;;N;;;;;
+ 1F079;DOMINO TILE VERTICAL-03-01;So;0;ON;;;;;N;;;;;
+ 1F07A;DOMINO TILE VERTICAL-03-02;So;0;ON;;;;;N;;;;;
+ 1F07B;DOMINO TILE VERTICAL-03-03;So;0;ON;;;;;N;;;;;
+ 1F07C;DOMINO TILE VERTICAL-03-04;So;0;ON;;;;;N;;;;;
+ 1F07D;DOMINO TILE VERTICAL-03-05;So;0;ON;;;;;N;;;;;
+ 1F07E;DOMINO TILE VERTICAL-03-06;So;0;ON;;;;;N;;;;;
+ 1F07F;DOMINO TILE VERTICAL-04-00;So;0;ON;;;;;N;;;;;
+ 1F080;DOMINO TILE VERTICAL-04-01;So;0;ON;;;;;N;;;;;
+ 1F081;DOMINO TILE VERTICAL-04-02;So;0;ON;;;;;N;;;;;
+ 1F082;DOMINO TILE VERTICAL-04-03;So;0;ON;;;;;N;;;;;
+ 1F083;DOMINO TILE VERTICAL-04-04;So;0;ON;;;;;N;;;;;
+ 1F084;DOMINO TILE VERTICAL-04-05;So;0;ON;;;;;N;;;;;
+ 1F085;DOMINO TILE VERTICAL-04-06;So;0;ON;;;;;N;;;;;
+ 1F086;DOMINO TILE VERTICAL-05-00;So;0;ON;;;;;N;;;;;
+ 1F087;DOMINO TILE VERTICAL-05-01;So;0;ON;;;;;N;;;;;
+ 1F088;DOMINO TILE VERTICAL-05-02;So;0;ON;;;;;N;;;;;
+ 1F089;DOMINO TILE VERTICAL-05-03;So;0;ON;;;;;N;;;;;
+ 1F08A;DOMINO TILE VERTICAL-05-04;So;0;ON;;;;;N;;;;;
+ 1F08B;DOMINO TILE VERTICAL-05-05;So;0;ON;;;;;N;;;;;
+ 1F08C;DOMINO TILE VERTICAL-05-06;So;0;ON;;;;;N;;;;;
+ 1F08D;DOMINO TILE VERTICAL-06-00;So;0;ON;;;;;N;;;;;
+ 1F08E;DOMINO TILE VERTICAL-06-01;So;0;ON;;;;;N;;;;;
+ 1F08F;DOMINO TILE VERTICAL-06-02;So;0;ON;;;;;N;;;;;
+ 1F090;DOMINO TILE VERTICAL-06-03;So;0;ON;;;;;N;;;;;
+ 1F091;DOMINO TILE VERTICAL-06-04;So;0;ON;;;;;N;;;;;
+ 1F092;DOMINO TILE VERTICAL-06-05;So;0;ON;;;;;N;;;;;
+ 1F093;DOMINO TILE VERTICAL-06-06;So;0;ON;;;;;N;;;;;
+ 1F0A0;PLAYING CARD BACK;So;0;ON;;;;;N;;;;;
+ 1F0A1;PLAYING CARD ACE OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0A2;PLAYING CARD TWO OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0A3;PLAYING CARD THREE OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0A4;PLAYING CARD FOUR OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0A5;PLAYING CARD FIVE OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0A6;PLAYING CARD SIX OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0A7;PLAYING CARD SEVEN OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0A8;PLAYING CARD EIGHT OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0A9;PLAYING CARD NINE OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0AA;PLAYING CARD TEN OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0AB;PLAYING CARD JACK OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0AC;PLAYING CARD KNIGHT OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0AD;PLAYING CARD QUEEN OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0AE;PLAYING CARD KING OF SPADES;So;0;ON;;;;;N;;;;;
+ 1F0B1;PLAYING CARD ACE OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0B2;PLAYING CARD TWO OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0B3;PLAYING CARD THREE OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0B4;PLAYING CARD FOUR OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0B5;PLAYING CARD FIVE OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0B6;PLAYING CARD SIX OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0B7;PLAYING CARD SEVEN OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0B8;PLAYING CARD EIGHT OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0B9;PLAYING CARD NINE OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0BA;PLAYING CARD TEN OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0BB;PLAYING CARD JACK OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0BC;PLAYING CARD KNIGHT OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0BD;PLAYING CARD QUEEN OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0BE;PLAYING CARD KING OF HEARTS;So;0;ON;;;;;N;;;;;
+ 1F0BF;PLAYING CARD RED JOKER;So;0;ON;;;;;N;;;;;
+ 1F0C1;PLAYING CARD ACE OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0C2;PLAYING CARD TWO OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0C3;PLAYING CARD THREE OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0C4;PLAYING CARD FOUR OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0C5;PLAYING CARD FIVE OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0C6;PLAYING CARD SIX OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0C7;PLAYING CARD SEVEN OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0C8;PLAYING CARD EIGHT OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0C9;PLAYING CARD NINE OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0CA;PLAYING CARD TEN OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0CB;PLAYING CARD JACK OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0CC;PLAYING CARD KNIGHT OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0CD;PLAYING CARD QUEEN OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0CE;PLAYING CARD KING OF DIAMONDS;So;0;ON;;;;;N;;;;;
+ 1F0CF;PLAYING CARD BLACK JOKER;So;0;ON;;;;;N;;;;;
+ 1F0D1;PLAYING CARD ACE OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0D2;PLAYING CARD TWO OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0D3;PLAYING CARD THREE OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0D4;PLAYING CARD FOUR OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0D5;PLAYING CARD FIVE OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0D6;PLAYING CARD SIX OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0D7;PLAYING CARD SEVEN OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0D8;PLAYING CARD EIGHT OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0D9;PLAYING CARD NINE OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0DA;PLAYING CARD TEN OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0DB;PLAYING CARD JACK OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0DC;PLAYING CARD KNIGHT OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0DD;PLAYING CARD QUEEN OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0DE;PLAYING CARD KING OF CLUBS;So;0;ON;;;;;N;;;;;
+ 1F0DF;PLAYING CARD WHITE JOKER;So;0;ON;;;;;N;;;;;
+ 1F0E0;PLAYING CARD FOOL;So;0;ON;;;;;N;;;;;
+ 1F0E1;PLAYING CARD TRUMP-1;So;0;ON;;;;;N;;;;;
+ 1F0E2;PLAYING CARD TRUMP-2;So;0;ON;;;;;N;;;;;
+ 1F0E3;PLAYING CARD TRUMP-3;So;0;ON;;;;;N;;;;;
+ 1F0E4;PLAYING CARD TRUMP-4;So;0;ON;;;;;N;;;;;
+ 1F0E5;PLAYING CARD TRUMP-5;So;0;ON;;;;;N;;;;;
+ 1F0E6;PLAYING CARD TRUMP-6;So;0;ON;;;;;N;;;;;
+ 1F0E7;PLAYING CARD TRUMP-7;So;0;ON;;;;;N;;;;;
+ 1F0E8;PLAYING CARD TRUMP-8;So;0;ON;;;;;N;;;;;
+ 1F0E9;PLAYING CARD TRUMP-9;So;0;ON;;;;;N;;;;;
+ 1F0EA;PLAYING CARD TRUMP-10;So;0;ON;;;;;N;;;;;
+ 1F0EB;PLAYING CARD TRUMP-11;So;0;ON;;;;;N;;;;;
+ 1F0EC;PLAYING CARD TRUMP-12;So;0;ON;;;;;N;;;;;
+ 1F0ED;PLAYING CARD TRUMP-13;So;0;ON;;;;;N;;;;;
+ 1F0EE;PLAYING CARD TRUMP-14;So;0;ON;;;;;N;;;;;
+ 1F0EF;PLAYING CARD TRUMP-15;So;0;ON;;;;;N;;;;;
+ 1F0F0;PLAYING CARD TRUMP-16;So;0;ON;;;;;N;;;;;
+ 1F0F1;PLAYING CARD TRUMP-17;So;0;ON;;;;;N;;;;;
+ 1F0F2;PLAYING CARD TRUMP-18;So;0;ON;;;;;N;;;;;
+ 1F0F3;PLAYING CARD TRUMP-19;So;0;ON;;;;;N;;;;;
+ 1F0F4;PLAYING CARD TRUMP-20;So;0;ON;;;;;N;;;;;
+ 1F0F5;PLAYING CARD TRUMP-21;So;0;ON;;;;;N;;;;;
+ 1F100;DIGIT ZERO FULL STOP;No;0;EN;<compat> 0030 002E;;0;0;N;;;;;
+ 1F101;DIGIT ZERO COMMA;No;0;EN;<compat> 0030 002C;;0;0;N;;;;;
+ 1F102;DIGIT ONE COMMA;No;0;EN;<compat> 0031 002C;;1;1;N;;;;;
+ 1F103;DIGIT TWO COMMA;No;0;EN;<compat> 0032 002C;;2;2;N;;;;;
+ 1F104;DIGIT THREE COMMA;No;0;EN;<compat> 0033 002C;;3;3;N;;;;;
+ 1F105;DIGIT FOUR COMMA;No;0;EN;<compat> 0034 002C;;4;4;N;;;;;
+ 1F106;DIGIT FIVE COMMA;No;0;EN;<compat> 0035 002C;;5;5;N;;;;;
+ 1F107;DIGIT SIX COMMA;No;0;EN;<compat> 0036 002C;;6;6;N;;;;;
+ 1F108;DIGIT SEVEN COMMA;No;0;EN;<compat> 0037 002C;;7;7;N;;;;;
+ 1F109;DIGIT EIGHT COMMA;No;0;EN;<compat> 0038 002C;;8;8;N;;;;;
+ 1F10A;DIGIT NINE COMMA;No;0;EN;<compat> 0039 002C;;9;9;N;;;;;
+ 1F10B;DINGBAT CIRCLED SANS-SERIF DIGIT ZERO;No;0;ON;;;;0;N;;;;;
+ 1F10C;DINGBAT NEGATIVE CIRCLED SANS-SERIF DIGIT ZERO;No;0;ON;;;;0;N;;;;;
+ 1F110;PARENTHESIZED LATIN CAPITAL LETTER A;So;0;L;<compat> 0028 0041 0029;;;;N;;;;;
+ 1F111;PARENTHESIZED LATIN CAPITAL LETTER B;So;0;L;<compat> 0028 0042 0029;;;;N;;;;;
+ 1F112;PARENTHESIZED LATIN CAPITAL LETTER C;So;0;L;<compat> 0028 0043 0029;;;;N;;;;;
+ 1F113;PARENTHESIZED LATIN CAPITAL LETTER D;So;0;L;<compat> 0028 0044 0029;;;;N;;;;;
+ 1F114;PARENTHESIZED LATIN CAPITAL LETTER E;So;0;L;<compat> 0028 0045 0029;;;;N;;;;;
+ 1F115;PARENTHESIZED LATIN CAPITAL LETTER F;So;0;L;<compat> 0028 0046 0029;;;;N;;;;;
+ 1F116;PARENTHESIZED LATIN CAPITAL LETTER G;So;0;L;<compat> 0028 0047 0029;;;;N;;;;;
+ 1F117;PARENTHESIZED LATIN CAPITAL LETTER H;So;0;L;<compat> 0028 0048 0029;;;;N;;;;;
+ 1F118;PARENTHESIZED LATIN CAPITAL LETTER I;So;0;L;<compat> 0028 0049 0029;;;;N;;;;;
+ 1F119;PARENTHESIZED LATIN CAPITAL LETTER J;So;0;L;<compat> 0028 004A 0029;;;;N;;;;;
+ 1F11A;PARENTHESIZED LATIN CAPITAL LETTER K;So;0;L;<compat> 0028 004B 0029;;;;N;;;;;
+ 1F11B;PARENTHESIZED LATIN CAPITAL LETTER L;So;0;L;<compat> 0028 004C 0029;;;;N;;;;;
+ 1F11C;PARENTHESIZED LATIN CAPITAL LETTER M;So;0;L;<compat> 0028 004D 0029;;;;N;;;;;
+ 1F11D;PARENTHESIZED LATIN CAPITAL LETTER N;So;0;L;<compat> 0028 004E 0029;;;;N;;;;;
+ 1F11E;PARENTHESIZED LATIN CAPITAL LETTER O;So;0;L;<compat> 0028 004F 0029;;;;N;;;;;
+ 1F11F;PARENTHESIZED LATIN CAPITAL LETTER P;So;0;L;<compat> 0028 0050 0029;;;;N;;;;;
+ 1F120;PARENTHESIZED LATIN CAPITAL LETTER Q;So;0;L;<compat> 0028 0051 0029;;;;N;;;;;
+ 1F121;PARENTHESIZED LATIN CAPITAL LETTER R;So;0;L;<compat> 0028 0052 0029;;;;N;;;;;
+ 1F122;PARENTHESIZED LATIN CAPITAL LETTER S;So;0;L;<compat> 0028 0053 0029;;;;N;;;;;
+ 1F123;PARENTHESIZED LATIN CAPITAL LETTER T;So;0;L;<compat> 0028 0054 0029;;;;N;;;;;
+ 1F124;PARENTHESIZED LATIN CAPITAL LETTER U;So;0;L;<compat> 0028 0055 0029;;;;N;;;;;
+ 1F125;PARENTHESIZED LATIN CAPITAL LETTER V;So;0;L;<compat> 0028 0056 0029;;;;N;;;;;
+ 1F126;PARENTHESIZED LATIN CAPITAL LETTER W;So;0;L;<compat> 0028 0057 0029;;;;N;;;;;
+ 1F127;PARENTHESIZED LATIN CAPITAL LETTER X;So;0;L;<compat> 0028 0058 0029;;;;N;;;;;
+ 1F128;PARENTHESIZED LATIN CAPITAL LETTER Y;So;0;L;<compat> 0028 0059 0029;;;;N;;;;;
+ 1F129;PARENTHESIZED LATIN CAPITAL LETTER Z;So;0;L;<compat> 0028 005A 0029;;;;N;;;;;
+ 1F12A;TORTOISE SHELL BRACKETED LATIN CAPITAL LETTER S;So;0;L;<compat> 3014 0053 3015;;;;N;;;;;
+ 1F12B;CIRCLED ITALIC LATIN CAPITAL LETTER C;So;0;L;<circle> 0043;;;;N;;;;;
+ 1F12C;CIRCLED ITALIC LATIN CAPITAL LETTER R;So;0;L;<circle> 0052;;;;N;;;;;
+ 1F12D;CIRCLED CD;So;0;L;<circle> 0043 0044;;;;N;;;;;
+ 1F12E;CIRCLED WZ;So;0;L;<circle> 0057 005A;;;;N;;;;;
+ 1F12F;COPYLEFT SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F130;SQUARED LATIN CAPITAL LETTER A;So;0;L;<square> 0041;;;;N;;;;;
+ 1F131;SQUARED LATIN CAPITAL LETTER B;So;0;L;<square> 0042;;;;N;;;;;
+ 1F132;SQUARED LATIN CAPITAL LETTER C;So;0;L;<square> 0043;;;;N;;;;;
+ 1F133;SQUARED LATIN CAPITAL LETTER D;So;0;L;<square> 0044;;;;N;;;;;
+ 1F134;SQUARED LATIN CAPITAL LETTER E;So;0;L;<square> 0045;;;;N;;;;;
+ 1F135;SQUARED LATIN CAPITAL LETTER F;So;0;L;<square> 0046;;;;N;;;;;
+ 1F136;SQUARED LATIN CAPITAL LETTER G;So;0;L;<square> 0047;;;;N;;;;;
+ 1F137;SQUARED LATIN CAPITAL LETTER H;So;0;L;<square> 0048;;;;N;;;;;
+ 1F138;SQUARED LATIN CAPITAL LETTER I;So;0;L;<square> 0049;;;;N;;;;;
+ 1F139;SQUARED LATIN CAPITAL LETTER J;So;0;L;<square> 004A;;;;N;;;;;
+ 1F13A;SQUARED LATIN CAPITAL LETTER K;So;0;L;<square> 004B;;;;N;;;;;
+ 1F13B;SQUARED LATIN CAPITAL LETTER L;So;0;L;<square> 004C;;;;N;;;;;
+ 1F13C;SQUARED LATIN CAPITAL LETTER M;So;0;L;<square> 004D;;;;N;;;;;
+ 1F13D;SQUARED LATIN CAPITAL LETTER N;So;0;L;<square> 004E;;;;N;;;;;
+ 1F13E;SQUARED LATIN CAPITAL LETTER O;So;0;L;<square> 004F;;;;N;;;;;
+ 1F13F;SQUARED LATIN CAPITAL LETTER P;So;0;L;<square> 0050;;;;N;;;;;
+ 1F140;SQUARED LATIN CAPITAL LETTER Q;So;0;L;<square> 0051;;;;N;;;;;
+ 1F141;SQUARED LATIN CAPITAL LETTER R;So;0;L;<square> 0052;;;;N;;;;;
+ 1F142;SQUARED LATIN CAPITAL LETTER S;So;0;L;<square> 0053;;;;N;;;;;
+ 1F143;SQUARED LATIN CAPITAL LETTER T;So;0;L;<square> 0054;;;;N;;;;;
+ 1F144;SQUARED LATIN CAPITAL LETTER U;So;0;L;<square> 0055;;;;N;;;;;
+ 1F145;SQUARED LATIN CAPITAL LETTER V;So;0;L;<square> 0056;;;;N;;;;;
+ 1F146;SQUARED LATIN CAPITAL LETTER W;So;0;L;<square> 0057;;;;N;;;;;
+ 1F147;SQUARED LATIN CAPITAL LETTER X;So;0;L;<square> 0058;;;;N;;;;;
+ 1F148;SQUARED LATIN CAPITAL LETTER Y;So;0;L;<square> 0059;;;;N;;;;;
+ 1F149;SQUARED LATIN CAPITAL LETTER Z;So;0;L;<square> 005A;;;;N;;;;;
+ 1F14A;SQUARED HV;So;0;L;<square> 0048 0056;;;;N;;;;;
+ 1F14B;SQUARED MV;So;0;L;<square> 004D 0056;;;;N;;;;;
+ 1F14C;SQUARED SD;So;0;L;<square> 0053 0044;;;;N;;;;;
+ 1F14D;SQUARED SS;So;0;L;<square> 0053 0053;;;;N;;;;;
+ 1F14E;SQUARED PPV;So;0;L;<square> 0050 0050 0056;;;;N;;;;;
+ 1F14F;SQUARED WC;So;0;L;<square> 0057 0043;;;;N;;;;;
+ 1F150;NEGATIVE CIRCLED LATIN CAPITAL LETTER A;So;0;L;;;;;N;;;;;
+ 1F151;NEGATIVE CIRCLED LATIN CAPITAL LETTER B;So;0;L;;;;;N;;;;;
+ 1F152;NEGATIVE CIRCLED LATIN CAPITAL LETTER C;So;0;L;;;;;N;;;;;
+ 1F153;NEGATIVE CIRCLED LATIN CAPITAL LETTER D;So;0;L;;;;;N;;;;;
+ 1F154;NEGATIVE CIRCLED LATIN CAPITAL LETTER E;So;0;L;;;;;N;;;;;
+ 1F155;NEGATIVE CIRCLED LATIN CAPITAL LETTER F;So;0;L;;;;;N;;;;;
+ 1F156;NEGATIVE CIRCLED LATIN CAPITAL LETTER G;So;0;L;;;;;N;;;;;
+ 1F157;NEGATIVE CIRCLED LATIN CAPITAL LETTER H;So;0;L;;;;;N;;;;;
+ 1F158;NEGATIVE CIRCLED LATIN CAPITAL LETTER I;So;0;L;;;;;N;;;;;
+ 1F159;NEGATIVE CIRCLED LATIN CAPITAL LETTER J;So;0;L;;;;;N;;;;;
+ 1F15A;NEGATIVE CIRCLED LATIN CAPITAL LETTER K;So;0;L;;;;;N;;;;;
+ 1F15B;NEGATIVE CIRCLED LATIN CAPITAL LETTER L;So;0;L;;;;;N;;;;;
+ 1F15C;NEGATIVE CIRCLED LATIN CAPITAL LETTER M;So;0;L;;;;;N;;;;;
+ 1F15D;NEGATIVE CIRCLED LATIN CAPITAL LETTER N;So;0;L;;;;;N;;;;;
+ 1F15E;NEGATIVE CIRCLED LATIN CAPITAL LETTER O;So;0;L;;;;;N;;;;;
+ 1F15F;NEGATIVE CIRCLED LATIN CAPITAL LETTER P;So;0;L;;;;;N;;;;;
+ 1F160;NEGATIVE CIRCLED LATIN CAPITAL LETTER Q;So;0;L;;;;;N;;;;;
+ 1F161;NEGATIVE CIRCLED LATIN CAPITAL LETTER R;So;0;L;;;;;N;;;;;
+ 1F162;NEGATIVE CIRCLED LATIN CAPITAL LETTER S;So;0;L;;;;;N;;;;;
+ 1F163;NEGATIVE CIRCLED LATIN CAPITAL LETTER T;So;0;L;;;;;N;;;;;
+ 1F164;NEGATIVE CIRCLED LATIN CAPITAL LETTER U;So;0;L;;;;;N;;;;;
+ 1F165;NEGATIVE CIRCLED LATIN CAPITAL LETTER V;So;0;L;;;;;N;;;;;
+ 1F166;NEGATIVE CIRCLED LATIN CAPITAL LETTER W;So;0;L;;;;;N;;;;;
+ 1F167;NEGATIVE CIRCLED LATIN CAPITAL LETTER X;So;0;L;;;;;N;;;;;
+ 1F168;NEGATIVE CIRCLED LATIN CAPITAL LETTER Y;So;0;L;;;;;N;;;;;
+ 1F169;NEGATIVE CIRCLED LATIN CAPITAL LETTER Z;So;0;L;;;;;N;;;;;
+ 1F16A;RAISED MC SIGN;So;0;ON;<super> 004D 0043;;;;N;;;;;
+ 1F16B;RAISED MD SIGN;So;0;ON;<super> 004D 0044;;;;N;;;;;
+ 1F16C;RAISED MR SIGN;So;0;ON;<super> 004D 0052;;;;N;;;;;
+ 1F170;NEGATIVE SQUARED LATIN CAPITAL LETTER A;So;0;L;;;;;N;;;;;
+ 1F171;NEGATIVE SQUARED LATIN CAPITAL LETTER B;So;0;L;;;;;N;;;;;
+ 1F172;NEGATIVE SQUARED LATIN CAPITAL LETTER C;So;0;L;;;;;N;;;;;
+ 1F173;NEGATIVE SQUARED LATIN CAPITAL LETTER D;So;0;L;;;;;N;;;;;
+ 1F174;NEGATIVE SQUARED LATIN CAPITAL LETTER E;So;0;L;;;;;N;;;;;
+ 1F175;NEGATIVE SQUARED LATIN CAPITAL LETTER F;So;0;L;;;;;N;;;;;
+ 1F176;NEGATIVE SQUARED LATIN CAPITAL LETTER G;So;0;L;;;;;N;;;;;
+ 1F177;NEGATIVE SQUARED LATIN CAPITAL LETTER H;So;0;L;;;;;N;;;;;
+ 1F178;NEGATIVE SQUARED LATIN CAPITAL LETTER I;So;0;L;;;;;N;;;;;
+ 1F179;NEGATIVE SQUARED LATIN CAPITAL LETTER J;So;0;L;;;;;N;;;;;
+ 1F17A;NEGATIVE SQUARED LATIN CAPITAL LETTER K;So;0;L;;;;;N;;;;;
+ 1F17B;NEGATIVE SQUARED LATIN CAPITAL LETTER L;So;0;L;;;;;N;;;;;
+ 1F17C;NEGATIVE SQUARED LATIN CAPITAL LETTER M;So;0;L;;;;;N;;;;;
+ 1F17D;NEGATIVE SQUARED LATIN CAPITAL LETTER N;So;0;L;;;;;N;;;;;
+ 1F17E;NEGATIVE SQUARED LATIN CAPITAL LETTER O;So;0;L;;;;;N;;;;;
+ 1F17F;NEGATIVE SQUARED LATIN CAPITAL LETTER P;So;0;L;;;;;N;;;;;
+ 1F180;NEGATIVE SQUARED LATIN CAPITAL LETTER Q;So;0;L;;;;;N;;;;;
+ 1F181;NEGATIVE SQUARED LATIN CAPITAL LETTER R;So;0;L;;;;;N;;;;;
+ 1F182;NEGATIVE SQUARED LATIN CAPITAL LETTER S;So;0;L;;;;;N;;;;;
+ 1F183;NEGATIVE SQUARED LATIN CAPITAL LETTER T;So;0;L;;;;;N;;;;;
+ 1F184;NEGATIVE SQUARED LATIN CAPITAL LETTER U;So;0;L;;;;;N;;;;;
+ 1F185;NEGATIVE SQUARED LATIN CAPITAL LETTER V;So;0;L;;;;;N;;;;;
+ 1F186;NEGATIVE SQUARED LATIN CAPITAL LETTER W;So;0;L;;;;;N;;;;;
+ 1F187;NEGATIVE SQUARED LATIN CAPITAL LETTER X;So;0;L;;;;;N;;;;;
+ 1F188;NEGATIVE SQUARED LATIN CAPITAL LETTER Y;So;0;L;;;;;N;;;;;
+ 1F189;NEGATIVE SQUARED LATIN CAPITAL LETTER Z;So;0;L;;;;;N;;;;;
+ 1F18A;CROSSED NEGATIVE SQUARED LATIN CAPITAL LETTER P;So;0;L;;;;;N;;;;;
+ 1F18B;NEGATIVE SQUARED IC;So;0;L;;;;;N;;;;;
+ 1F18C;NEGATIVE SQUARED PA;So;0;L;;;;;N;;;;;
+ 1F18D;NEGATIVE SQUARED SA;So;0;L;;;;;N;;;;;
+ 1F18E;NEGATIVE SQUARED AB;So;0;L;;;;;N;;;;;
+ 1F18F;NEGATIVE SQUARED WC;So;0;L;;;;;N;;;;;
+ 1F190;SQUARE DJ;So;0;L;<square> 0044 004A;;;;N;;;;;
+ 1F191;SQUARED CL;So;0;L;;;;;N;;;;;
+ 1F192;SQUARED COOL;So;0;L;;;;;N;;;;;
+ 1F193;SQUARED FREE;So;0;L;;;;;N;;;;;
+ 1F194;SQUARED ID;So;0;L;;;;;N;;;;;
+ 1F195;SQUARED NEW;So;0;L;;;;;N;;;;;
+ 1F196;SQUARED NG;So;0;L;;;;;N;;;;;
+ 1F197;SQUARED OK;So;0;L;;;;;N;;;;;
+ 1F198;SQUARED SOS;So;0;L;;;;;N;;;;;
+ 1F199;SQUARED UP WITH EXCLAMATION MARK;So;0;L;;;;;N;;;;;
+ 1F19A;SQUARED VS;So;0;L;;;;;N;;;;;
+ 1F19B;SQUARED THREE D;So;0;L;;;;;N;;;;;
+ 1F19C;SQUARED SECOND SCREEN;So;0;L;;;;;N;;;;;
+ 1F19D;SQUARED TWO K;So;0;L;;;;;N;;;;;
+ 1F19E;SQUARED FOUR K;So;0;L;;;;;N;;;;;
+ 1F19F;SQUARED EIGHT K;So;0;L;;;;;N;;;;;
+ 1F1A0;SQUARED FIVE POINT ONE;So;0;L;;;;;N;;;;;
+ 1F1A1;SQUARED SEVEN POINT ONE;So;0;L;;;;;N;;;;;
+ 1F1A2;SQUARED TWENTY-TWO POINT TWO;So;0;L;;;;;N;;;;;
+ 1F1A3;SQUARED SIXTY P;So;0;L;;;;;N;;;;;
+ 1F1A4;SQUARED ONE HUNDRED TWENTY P;So;0;L;;;;;N;;;;;
+ 1F1A5;SQUARED LATIN SMALL LETTER D;So;0;L;;;;;N;;;;;
+ 1F1A6;SQUARED HC;So;0;L;;;;;N;;;;;
+ 1F1A7;SQUARED HDR;So;0;L;;;;;N;;;;;
+ 1F1A8;SQUARED HI-RES;So;0;L;;;;;N;;;;;
+ 1F1A9;SQUARED LOSSLESS;So;0;L;;;;;N;;;;;
+ 1F1AA;SQUARED SHV;So;0;L;;;;;N;;;;;
+ 1F1AB;SQUARED UHD;So;0;L;;;;;N;;;;;
+ 1F1AC;SQUARED VOD;So;0;L;;;;;N;;;;;
+ 1F1E6;REGIONAL INDICATOR SYMBOL LETTER A;So;0;L;;;;;N;;;;;
+ 1F1E7;REGIONAL INDICATOR SYMBOL LETTER B;So;0;L;;;;;N;;;;;
+ 1F1E8;REGIONAL INDICATOR SYMBOL LETTER C;So;0;L;;;;;N;;;;;
+ 1F1E9;REGIONAL INDICATOR SYMBOL LETTER D;So;0;L;;;;;N;;;;;
+ 1F1EA;REGIONAL INDICATOR SYMBOL LETTER E;So;0;L;;;;;N;;;;;
+ 1F1EB;REGIONAL INDICATOR SYMBOL LETTER F;So;0;L;;;;;N;;;;;
+ 1F1EC;REGIONAL INDICATOR SYMBOL LETTER G;So;0;L;;;;;N;;;;;
+ 1F1ED;REGIONAL INDICATOR SYMBOL LETTER H;So;0;L;;;;;N;;;;;
+ 1F1EE;REGIONAL INDICATOR SYMBOL LETTER I;So;0;L;;;;;N;;;;;
+ 1F1EF;REGIONAL INDICATOR SYMBOL LETTER J;So;0;L;;;;;N;;;;;
+ 1F1F0;REGIONAL INDICATOR SYMBOL LETTER K;So;0;L;;;;;N;;;;;
+ 1F1F1;REGIONAL INDICATOR SYMBOL LETTER L;So;0;L;;;;;N;;;;;
+ 1F1F2;REGIONAL INDICATOR SYMBOL LETTER M;So;0;L;;;;;N;;;;;
+ 1F1F3;REGIONAL INDICATOR SYMBOL LETTER N;So;0;L;;;;;N;;;;;
+ 1F1F4;REGIONAL INDICATOR SYMBOL LETTER O;So;0;L;;;;;N;;;;;
+ 1F1F5;REGIONAL INDICATOR SYMBOL LETTER P;So;0;L;;;;;N;;;;;
+ 1F1F6;REGIONAL INDICATOR SYMBOL LETTER Q;So;0;L;;;;;N;;;;;
+ 1F1F7;REGIONAL INDICATOR SYMBOL LETTER R;So;0;L;;;;;N;;;;;
+ 1F1F8;REGIONAL INDICATOR SYMBOL LETTER S;So;0;L;;;;;N;;;;;
+ 1F1F9;REGIONAL INDICATOR SYMBOL LETTER T;So;0;L;;;;;N;;;;;
+ 1F1FA;REGIONAL INDICATOR SYMBOL LETTER U;So;0;L;;;;;N;;;;;
+ 1F1FB;REGIONAL INDICATOR SYMBOL LETTER V;So;0;L;;;;;N;;;;;
+ 1F1FC;REGIONAL INDICATOR SYMBOL LETTER W;So;0;L;;;;;N;;;;;
+ 1F1FD;REGIONAL INDICATOR SYMBOL LETTER X;So;0;L;;;;;N;;;;;
+ 1F1FE;REGIONAL INDICATOR SYMBOL LETTER Y;So;0;L;;;;;N;;;;;
+ 1F1FF;REGIONAL INDICATOR SYMBOL LETTER Z;So;0;L;;;;;N;;;;;
+ 1F200;SQUARE HIRAGANA HOKA;So;0;L;<square> 307B 304B;;;;N;;;;;
+ 1F201;SQUARED KATAKANA KOKO;So;0;L;<square> 30B3 30B3;;;;N;;;;;
+ 1F202;SQUARED KATAKANA SA;So;0;L;<square> 30B5;;;;N;;;;;
+ 1F210;SQUARED CJK UNIFIED IDEOGRAPH-624B;So;0;L;<square> 624B;;;;N;;;;;
+ 1F211;SQUARED CJK UNIFIED IDEOGRAPH-5B57;So;0;L;<square> 5B57;;;;N;;;;;
+ 1F212;SQUARED CJK UNIFIED IDEOGRAPH-53CC;So;0;L;<square> 53CC;;;;N;;;;;
+ 1F213;SQUARED KATAKANA DE;So;0;L;<square> 30C7;;;;N;;;;;
+ 1F214;SQUARED CJK UNIFIED IDEOGRAPH-4E8C;So;0;L;<square> 4E8C;;;;N;;;;;
+ 1F215;SQUARED CJK UNIFIED IDEOGRAPH-591A;So;0;L;<square> 591A;;;;N;;;;;
+ 1F216;SQUARED CJK UNIFIED IDEOGRAPH-89E3;So;0;L;<square> 89E3;;;;N;;;;;
+ 1F217;SQUARED CJK UNIFIED IDEOGRAPH-5929;So;0;L;<square> 5929;;;;N;;;;;
+ 1F218;SQUARED CJK UNIFIED IDEOGRAPH-4EA4;So;0;L;<square> 4EA4;;;;N;;;;;
+ 1F219;SQUARED CJK UNIFIED IDEOGRAPH-6620;So;0;L;<square> 6620;;;;N;;;;;
+ 1F21A;SQUARED CJK UNIFIED IDEOGRAPH-7121;So;0;L;<square> 7121;;;;N;;;;;
+ 1F21B;SQUARED CJK UNIFIED IDEOGRAPH-6599;So;0;L;<square> 6599;;;;N;;;;;
+ 1F21C;SQUARED CJK UNIFIED IDEOGRAPH-524D;So;0;L;<square> 524D;;;;N;;;;;
+ 1F21D;SQUARED CJK UNIFIED IDEOGRAPH-5F8C;So;0;L;<square> 5F8C;;;;N;;;;;
+ 1F21E;SQUARED CJK UNIFIED IDEOGRAPH-518D;So;0;L;<square> 518D;;;;N;;;;;
+ 1F21F;SQUARED CJK UNIFIED IDEOGRAPH-65B0;So;0;L;<square> 65B0;;;;N;;;;;
+ 1F220;SQUARED CJK UNIFIED IDEOGRAPH-521D;So;0;L;<square> 521D;;;;N;;;;;
+ 1F221;SQUARED CJK UNIFIED IDEOGRAPH-7D42;So;0;L;<square> 7D42;;;;N;;;;;
+ 1F222;SQUARED CJK UNIFIED IDEOGRAPH-751F;So;0;L;<square> 751F;;;;N;;;;;
+ 1F223;SQUARED CJK UNIFIED IDEOGRAPH-8CA9;So;0;L;<square> 8CA9;;;;N;;;;;
+ 1F224;SQUARED CJK UNIFIED IDEOGRAPH-58F0;So;0;L;<square> 58F0;;;;N;;;;;
+ 1F225;SQUARED CJK UNIFIED IDEOGRAPH-5439;So;0;L;<square> 5439;;;;N;;;;;
+ 1F226;SQUARED CJK UNIFIED IDEOGRAPH-6F14;So;0;L;<square> 6F14;;;;N;;;;;
+ 1F227;SQUARED CJK UNIFIED IDEOGRAPH-6295;So;0;L;<square> 6295;;;;N;;;;;
+ 1F228;SQUARED CJK UNIFIED IDEOGRAPH-6355;So;0;L;<square> 6355;;;;N;;;;;
+ 1F229;SQUARED CJK UNIFIED IDEOGRAPH-4E00;So;0;L;<square> 4E00;;;;N;;;;;
+ 1F22A;SQUARED CJK UNIFIED IDEOGRAPH-4E09;So;0;L;<square> 4E09;;;;N;;;;;
+ 1F22B;SQUARED CJK UNIFIED IDEOGRAPH-904A;So;0;L;<square> 904A;;;;N;;;;;
+ 1F22C;SQUARED CJK UNIFIED IDEOGRAPH-5DE6;So;0;L;<square> 5DE6;;;;N;;;;;
+ 1F22D;SQUARED CJK UNIFIED IDEOGRAPH-4E2D;So;0;L;<square> 4E2D;;;;N;;;;;
+ 1F22E;SQUARED CJK UNIFIED IDEOGRAPH-53F3;So;0;L;<square> 53F3;;;;N;;;;;
+ 1F22F;SQUARED CJK UNIFIED IDEOGRAPH-6307;So;0;L;<square> 6307;;;;N;;;;;
+ 1F230;SQUARED CJK UNIFIED IDEOGRAPH-8D70;So;0;L;<square> 8D70;;;;N;;;;;
+ 1F231;SQUARED CJK UNIFIED IDEOGRAPH-6253;So;0;L;<square> 6253;;;;N;;;;;
+ 1F232;SQUARED CJK UNIFIED IDEOGRAPH-7981;So;0;L;<square> 7981;;;;N;;;;;
+ 1F233;SQUARED CJK UNIFIED IDEOGRAPH-7A7A;So;0;L;<square> 7A7A;;;;N;;;;;
+ 1F234;SQUARED CJK UNIFIED IDEOGRAPH-5408;So;0;L;<square> 5408;;;;N;;;;;
+ 1F235;SQUARED CJK UNIFIED IDEOGRAPH-6E80;So;0;L;<square> 6E80;;;;N;;;;;
+ 1F236;SQUARED CJK UNIFIED IDEOGRAPH-6709;So;0;L;<square> 6709;;;;N;;;;;
+ 1F237;SQUARED CJK UNIFIED IDEOGRAPH-6708;So;0;L;<square> 6708;;;;N;;;;;
+ 1F238;SQUARED CJK UNIFIED IDEOGRAPH-7533;So;0;L;<square> 7533;;;;N;;;;;
+ 1F239;SQUARED CJK UNIFIED IDEOGRAPH-5272;So;0;L;<square> 5272;;;;N;;;;;
+ 1F23A;SQUARED CJK UNIFIED IDEOGRAPH-55B6;So;0;L;<square> 55B6;;;;N;;;;;
+ 1F23B;SQUARED CJK UNIFIED IDEOGRAPH-914D;So;0;L;<square> 914D;;;;N;;;;;
+ 1F240;TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-672C;So;0;L;<compat> 3014 672C 3015;;;;N;;;;;
+ 1F241;TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-4E09;So;0;L;<compat> 3014 4E09 3015;;;;N;;;;;
+ 1F242;TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-4E8C;So;0;L;<compat> 3014 4E8C 3015;;;;N;;;;;
+ 1F243;TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-5B89;So;0;L;<compat> 3014 5B89 3015;;;;N;;;;;
+ 1F244;TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-70B9;So;0;L;<compat> 3014 70B9 3015;;;;N;;;;;
+ 1F245;TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-6253;So;0;L;<compat> 3014 6253 3015;;;;N;;;;;
+ 1F246;TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-76D7;So;0;L;<compat> 3014 76D7 3015;;;;N;;;;;
+ 1F247;TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-52DD;So;0;L;<compat> 3014 52DD 3015;;;;N;;;;;
+ 1F248;TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-6557;So;0;L;<compat> 3014 6557 3015;;;;N;;;;;
+ 1F250;CIRCLED IDEOGRAPH ADVANTAGE;So;0;L;<circle> 5F97;;;;N;;;;;
+ 1F251;CIRCLED IDEOGRAPH ACCEPT;So;0;L;<circle> 53EF;;;;N;;;;;
+ 1F260;ROUNDED SYMBOL FOR FU;So;0;ON;;;;;N;;;;;
+ 1F261;ROUNDED SYMBOL FOR LU;So;0;ON;;;;;N;;;;;
+ 1F262;ROUNDED SYMBOL FOR SHOU;So;0;ON;;;;;N;;;;;
+ 1F263;ROUNDED SYMBOL FOR XI;So;0;ON;;;;;N;;;;;
+ 1F264;ROUNDED SYMBOL FOR SHUANGXI;So;0;ON;;;;;N;;;;;
+ 1F265;ROUNDED SYMBOL FOR CAI;So;0;ON;;;;;N;;;;;
+ 1F300;CYCLONE;So;0;ON;;;;;N;;;;;
+ 1F301;FOGGY;So;0;ON;;;;;N;;;;;
+ 1F302;CLOSED UMBRELLA;So;0;ON;;;;;N;;;;;
+ 1F303;NIGHT WITH STARS;So;0;ON;;;;;N;;;;;
+ 1F304;SUNRISE OVER MOUNTAINS;So;0;ON;;;;;N;;;;;
+ 1F305;SUNRISE;So;0;ON;;;;;N;;;;;
+ 1F306;CITYSCAPE AT DUSK;So;0;ON;;;;;N;;;;;
+ 1F307;SUNSET OVER BUILDINGS;So;0;ON;;;;;N;;;;;
+ 1F308;RAINBOW;So;0;ON;;;;;N;;;;;
+ 1F309;BRIDGE AT NIGHT;So;0;ON;;;;;N;;;;;
+ 1F30A;WATER WAVE;So;0;ON;;;;;N;;;;;
+ 1F30B;VOLCANO;So;0;ON;;;;;N;;;;;
+ 1F30C;MILKY WAY;So;0;ON;;;;;N;;;;;
+ 1F30D;EARTH GLOBE EUROPE-AFRICA;So;0;ON;;;;;N;;;;;
+ 1F30E;EARTH GLOBE AMERICAS;So;0;ON;;;;;N;;;;;
+ 1F30F;EARTH GLOBE ASIA-AUSTRALIA;So;0;ON;;;;;N;;;;;
+ 1F310;GLOBE WITH MERIDIANS;So;0;ON;;;;;N;;;;;
+ 1F311;NEW MOON SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F312;WAXING CRESCENT MOON SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F313;FIRST QUARTER MOON SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F314;WAXING GIBBOUS MOON SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F315;FULL MOON SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F316;WANING GIBBOUS MOON SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F317;LAST QUARTER MOON SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F318;WANING CRESCENT MOON SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F319;CRESCENT MOON;So;0;ON;;;;;N;;;;;
+ 1F31A;NEW MOON WITH FACE;So;0;ON;;;;;N;;;;;
+ 1F31B;FIRST QUARTER MOON WITH FACE;So;0;ON;;;;;N;;;;;
+ 1F31C;LAST QUARTER MOON WITH FACE;So;0;ON;;;;;N;;;;;
+ 1F31D;FULL MOON WITH FACE;So;0;ON;;;;;N;;;;;
+ 1F31E;SUN WITH FACE;So;0;ON;;;;;N;;;;;
+ 1F31F;GLOWING STAR;So;0;ON;;;;;N;;;;;
+ 1F320;SHOOTING STAR;So;0;ON;;;;;N;;;;;
+ 1F321;THERMOMETER;So;0;ON;;;;;N;;;;;
+ 1F322;BLACK DROPLET;So;0;ON;;;;;N;;;;;
+ 1F323;WHITE SUN;So;0;ON;;;;;N;;;;;
+ 1F324;WHITE SUN WITH SMALL CLOUD;So;0;ON;;;;;N;;;;;
+ 1F325;WHITE SUN BEHIND CLOUD;So;0;ON;;;;;N;;;;;
+ 1F326;WHITE SUN BEHIND CLOUD WITH RAIN;So;0;ON;;;;;N;;;;;
+ 1F327;CLOUD WITH RAIN;So;0;ON;;;;;N;;;;;
+ 1F328;CLOUD WITH SNOW;So;0;ON;;;;;N;;;;;
+ 1F329;CLOUD WITH LIGHTNING;So;0;ON;;;;;N;;;;;
+ 1F32A;CLOUD WITH TORNADO;So;0;ON;;;;;N;;;;;
+ 1F32B;FOG;So;0;ON;;;;;N;;;;;
+ 1F32C;WIND BLOWING FACE;So;0;ON;;;;;N;;;;;
+ 1F32D;HOT DOG;So;0;ON;;;;;N;;;;;
+ 1F32E;TACO;So;0;ON;;;;;N;;;;;
+ 1F32F;BURRITO;So;0;ON;;;;;N;;;;;
+ 1F330;CHESTNUT;So;0;ON;;;;;N;;;;;
+ 1F331;SEEDLING;So;0;ON;;;;;N;;;;;
+ 1F332;EVERGREEN TREE;So;0;ON;;;;;N;;;;;
+ 1F333;DECIDUOUS TREE;So;0;ON;;;;;N;;;;;
+ 1F334;PALM TREE;So;0;ON;;;;;N;;;;;
+ 1F335;CACTUS;So;0;ON;;;;;N;;;;;
+ 1F336;HOT PEPPER;So;0;ON;;;;;N;;;;;
+ 1F337;TULIP;So;0;ON;;;;;N;;;;;
+ 1F338;CHERRY BLOSSOM;So;0;ON;;;;;N;;;;;
+ 1F339;ROSE;So;0;ON;;;;;N;;;;;
+ 1F33A;HIBISCUS;So;0;ON;;;;;N;;;;;
+ 1F33B;SUNFLOWER;So;0;ON;;;;;N;;;;;
+ 1F33C;BLOSSOM;So;0;ON;;;;;N;;;;;
+ 1F33D;EAR OF MAIZE;So;0;ON;;;;;N;;;;;
+ 1F33E;EAR OF RICE;So;0;ON;;;;;N;;;;;
+ 1F33F;HERB;So;0;ON;;;;;N;;;;;
+ 1F340;FOUR LEAF CLOVER;So;0;ON;;;;;N;;;;;
+ 1F341;MAPLE LEAF;So;0;ON;;;;;N;;;;;
+ 1F342;FALLEN LEAF;So;0;ON;;;;;N;;;;;
+ 1F343;LEAF FLUTTERING IN WIND;So;0;ON;;;;;N;;;;;
+ 1F344;MUSHROOM;So;0;ON;;;;;N;;;;;
+ 1F345;TOMATO;So;0;ON;;;;;N;;;;;
+ 1F346;AUBERGINE;So;0;ON;;;;;N;;;;;
+ 1F347;GRAPES;So;0;ON;;;;;N;;;;;
+ 1F348;MELON;So;0;ON;;;;;N;;;;;
+ 1F349;WATERMELON;So;0;ON;;;;;N;;;;;
+ 1F34A;TANGERINE;So;0;ON;;;;;N;;;;;
+ 1F34B;LEMON;So;0;ON;;;;;N;;;;;
+ 1F34C;BANANA;So;0;ON;;;;;N;;;;;
+ 1F34D;PINEAPPLE;So;0;ON;;;;;N;;;;;
+ 1F34E;RED APPLE;So;0;ON;;;;;N;;;;;
+ 1F34F;GREEN APPLE;So;0;ON;;;;;N;;;;;
+ 1F350;PEAR;So;0;ON;;;;;N;;;;;
+ 1F351;PEACH;So;0;ON;;;;;N;;;;;
+ 1F352;CHERRIES;So;0;ON;;;;;N;;;;;
+ 1F353;STRAWBERRY;So;0;ON;;;;;N;;;;;
+ 1F354;HAMBURGER;So;0;ON;;;;;N;;;;;
+ 1F355;SLICE OF PIZZA;So;0;ON;;;;;N;;;;;
+ 1F356;MEAT ON BONE;So;0;ON;;;;;N;;;;;
+ 1F357;POULTRY LEG;So;0;ON;;;;;N;;;;;
+ 1F358;RICE CRACKER;So;0;ON;;;;;N;;;;;
+ 1F359;RICE BALL;So;0;ON;;;;;N;;;;;
+ 1F35A;COOKED RICE;So;0;ON;;;;;N;;;;;
+ 1F35B;CURRY AND RICE;So;0;ON;;;;;N;;;;;
+ 1F35C;STEAMING BOWL;So;0;ON;;;;;N;;;;;
+ 1F35D;SPAGHETTI;So;0;ON;;;;;N;;;;;
+ 1F35E;BREAD;So;0;ON;;;;;N;;;;;
+ 1F35F;FRENCH FRIES;So;0;ON;;;;;N;;;;;
+ 1F360;ROASTED SWEET POTATO;So;0;ON;;;;;N;;;;;
+ 1F361;DANGO;So;0;ON;;;;;N;;;;;
+ 1F362;ODEN;So;0;ON;;;;;N;;;;;
+ 1F363;SUSHI;So;0;ON;;;;;N;;;;;
+ 1F364;FRIED SHRIMP;So;0;ON;;;;;N;;;;;
+ 1F365;FISH CAKE WITH SWIRL DESIGN;So;0;ON;;;;;N;;;;;
+ 1F366;SOFT ICE CREAM;So;0;ON;;;;;N;;;;;
+ 1F367;SHAVED ICE;So;0;ON;;;;;N;;;;;
+ 1F368;ICE CREAM;So;0;ON;;;;;N;;;;;
+ 1F369;DOUGHNUT;So;0;ON;;;;;N;;;;;
+ 1F36A;COOKIE;So;0;ON;;;;;N;;;;;
+ 1F36B;CHOCOLATE BAR;So;0;ON;;;;;N;;;;;
+ 1F36C;CANDY;So;0;ON;;;;;N;;;;;
+ 1F36D;LOLLIPOP;So;0;ON;;;;;N;;;;;
+ 1F36E;CUSTARD;So;0;ON;;;;;N;;;;;
+ 1F36F;HONEY POT;So;0;ON;;;;;N;;;;;
+ 1F370;SHORTCAKE;So;0;ON;;;;;N;;;;;
+ 1F371;BENTO BOX;So;0;ON;;;;;N;;;;;
+ 1F372;POT OF FOOD;So;0;ON;;;;;N;;;;;
+ 1F373;COOKING;So;0;ON;;;;;N;;;;;
+ 1F374;FORK AND KNIFE;So;0;ON;;;;;N;;;;;
+ 1F375;TEACUP WITHOUT HANDLE;So;0;ON;;;;;N;;;;;
+ 1F376;SAKE BOTTLE AND CUP;So;0;ON;;;;;N;;;;;
+ 1F377;WINE GLASS;So;0;ON;;;;;N;;;;;
+ 1F378;COCKTAIL GLASS;So;0;ON;;;;;N;;;;;
+ 1F379;TROPICAL DRINK;So;0;ON;;;;;N;;;;;
+ 1F37A;BEER MUG;So;0;ON;;;;;N;;;;;
+ 1F37B;CLINKING BEER MUGS;So;0;ON;;;;;N;;;;;
+ 1F37C;BABY BOTTLE;So;0;ON;;;;;N;;;;;
+ 1F37D;FORK AND KNIFE WITH PLATE;So;0;ON;;;;;N;;;;;
+ 1F37E;BOTTLE WITH POPPING CORK;So;0;ON;;;;;N;;;;;
+ 1F37F;POPCORN;So;0;ON;;;;;N;;;;;
+ 1F380;RIBBON;So;0;ON;;;;;N;;;;;
+ 1F381;WRAPPED PRESENT;So;0;ON;;;;;N;;;;;
+ 1F382;BIRTHDAY CAKE;So;0;ON;;;;;N;;;;;
+ 1F383;JACK-O-LANTERN;So;0;ON;;;;;N;;;;;
+ 1F384;CHRISTMAS TREE;So;0;ON;;;;;N;;;;;
+ 1F385;FATHER CHRISTMAS;So;0;ON;;;;;N;;;;;
+ 1F386;FIREWORKS;So;0;ON;;;;;N;;;;;
+ 1F387;FIREWORK SPARKLER;So;0;ON;;;;;N;;;;;
+ 1F388;BALLOON;So;0;ON;;;;;N;;;;;
+ 1F389;PARTY POPPER;So;0;ON;;;;;N;;;;;
+ 1F38A;CONFETTI BALL;So;0;ON;;;;;N;;;;;
+ 1F38B;TANABATA TREE;So;0;ON;;;;;N;;;;;
+ 1F38C;CROSSED FLAGS;So;0;ON;;;;;N;;;;;
+ 1F38D;PINE DECORATION;So;0;ON;;;;;N;;;;;
+ 1F38E;JAPANESE DOLLS;So;0;ON;;;;;N;;;;;
+ 1F38F;CARP STREAMER;So;0;ON;;;;;N;;;;;
+ 1F390;WIND CHIME;So;0;ON;;;;;N;;;;;
+ 1F391;MOON VIEWING CEREMONY;So;0;ON;;;;;N;;;;;
+ 1F392;SCHOOL SATCHEL;So;0;ON;;;;;N;;;;;
+ 1F393;GRADUATION CAP;So;0;ON;;;;;N;;;;;
+ 1F394;HEART WITH TIP ON THE LEFT;So;0;ON;;;;;N;;;;;
+ 1F395;BOUQUET OF FLOWERS;So;0;ON;;;;;N;;;;;
+ 1F396;MILITARY MEDAL;So;0;ON;;;;;N;;;;;
+ 1F397;REMINDER RIBBON;So;0;ON;;;;;N;;;;;
+ 1F398;MUSICAL KEYBOARD WITH JACKS;So;0;ON;;;;;N;;;;;
+ 1F399;STUDIO MICROPHONE;So;0;ON;;;;;N;;;;;
+ 1F39A;LEVEL SLIDER;So;0;ON;;;;;N;;;;;
+ 1F39B;CONTROL KNOBS;So;0;ON;;;;;N;;;;;
+ 1F39C;BEAMED ASCENDING MUSICAL NOTES;So;0;ON;;;;;N;;;;;
+ 1F39D;BEAMED DESCENDING MUSICAL NOTES;So;0;ON;;;;;N;;;;;
+ 1F39E;FILM FRAMES;So;0;ON;;;;;N;;;;;
+ 1F39F;ADMISSION TICKETS;So;0;ON;;;;;N;;;;;
+ 1F3A0;CAROUSEL HORSE;So;0;ON;;;;;N;;;;;
+ 1F3A1;FERRIS WHEEL;So;0;ON;;;;;N;;;;;
+ 1F3A2;ROLLER COASTER;So;0;ON;;;;;N;;;;;
+ 1F3A3;FISHING POLE AND FISH;So;0;ON;;;;;N;;;;;
+ 1F3A4;MICROPHONE;So;0;ON;;;;;N;;;;;
+ 1F3A5;MOVIE CAMERA;So;0;ON;;;;;N;;;;;
+ 1F3A6;CINEMA;So;0;ON;;;;;N;;;;;
+ 1F3A7;HEADPHONE;So;0;ON;;;;;N;;;;;
+ 1F3A8;ARTIST PALETTE;So;0;ON;;;;;N;;;;;
+ 1F3A9;TOP HAT;So;0;ON;;;;;N;;;;;
+ 1F3AA;CIRCUS TENT;So;0;ON;;;;;N;;;;;
+ 1F3AB;TICKET;So;0;ON;;;;;N;;;;;
+ 1F3AC;CLAPPER BOARD;So;0;ON;;;;;N;;;;;
+ 1F3AD;PERFORMING ARTS;So;0;ON;;;;;N;;;;;
+ 1F3AE;VIDEO GAME;So;0;ON;;;;;N;;;;;
+ 1F3AF;DIRECT HIT;So;0;ON;;;;;N;;;;;
+ 1F3B0;SLOT MACHINE;So;0;ON;;;;;N;;;;;
+ 1F3B1;BILLIARDS;So;0;ON;;;;;N;;;;;
+ 1F3B2;GAME DIE;So;0;ON;;;;;N;;;;;
+ 1F3B3;BOWLING;So;0;ON;;;;;N;;;;;
+ 1F3B4;FLOWER PLAYING CARDS;So;0;ON;;;;;N;;;;;
+ 1F3B5;MUSICAL NOTE;So;0;ON;;;;;N;;;;;
+ 1F3B6;MULTIPLE MUSICAL NOTES;So;0;ON;;;;;N;;;;;
+ 1F3B7;SAXOPHONE;So;0;ON;;;;;N;;;;;
+ 1F3B8;GUITAR;So;0;ON;;;;;N;;;;;
+ 1F3B9;MUSICAL KEYBOARD;So;0;ON;;;;;N;;;;;
+ 1F3BA;TRUMPET;So;0;ON;;;;;N;;;;;
+ 1F3BB;VIOLIN;So;0;ON;;;;;N;;;;;
+ 1F3BC;MUSICAL SCORE;So;0;ON;;;;;N;;;;;
+ 1F3BD;RUNNING SHIRT WITH SASH;So;0;ON;;;;;N;;;;;
+ 1F3BE;TENNIS RACQUET AND BALL;So;0;ON;;;;;N;;;;;
+ 1F3BF;SKI AND SKI BOOT;So;0;ON;;;;;N;;;;;
+ 1F3C0;BASKETBALL AND HOOP;So;0;ON;;;;;N;;;;;
+ 1F3C1;CHEQUERED FLAG;So;0;ON;;;;;N;;;;;
+ 1F3C2;SNOWBOARDER;So;0;ON;;;;;N;;;;;
+ 1F3C3;RUNNER;So;0;ON;;;;;N;;;;;
+ 1F3C4;SURFER;So;0;ON;;;;;N;;;;;
+ 1F3C5;SPORTS MEDAL;So;0;ON;;;;;N;;;;;
+ 1F3C6;TROPHY;So;0;ON;;;;;N;;;;;
+ 1F3C7;HORSE RACING;So;0;ON;;;;;N;;;;;
+ 1F3C8;AMERICAN FOOTBALL;So;0;ON;;;;;N;;;;;
+ 1F3C9;RUGBY FOOTBALL;So;0;ON;;;;;N;;;;;
+ 1F3CA;SWIMMER;So;0;ON;;;;;N;;;;;
+ 1F3CB;WEIGHT LIFTER;So;0;ON;;;;;N;;;;;
+ 1F3CC;GOLFER;So;0;ON;;;;;N;;;;;
+ 1F3CD;RACING MOTORCYCLE;So;0;ON;;;;;N;;;;;
+ 1F3CE;RACING CAR;So;0;ON;;;;;N;;;;;
+ 1F3CF;CRICKET BAT AND BALL;So;0;ON;;;;;N;;;;;
+ 1F3D0;VOLLEYBALL;So;0;ON;;;;;N;;;;;
+ 1F3D1;FIELD HOCKEY STICK AND BALL;So;0;ON;;;;;N;;;;;
+ 1F3D2;ICE HOCKEY STICK AND PUCK;So;0;ON;;;;;N;;;;;
+ 1F3D3;TABLE TENNIS PADDLE AND BALL;So;0;ON;;;;;N;;;;;
+ 1F3D4;SNOW CAPPED MOUNTAIN;So;0;ON;;;;;N;;;;;
+ 1F3D5;CAMPING;So;0;ON;;;;;N;;;;;
+ 1F3D6;BEACH WITH UMBRELLA;So;0;ON;;;;;N;;;;;
+ 1F3D7;BUILDING CONSTRUCTION;So;0;ON;;;;;N;;;;;
+ 1F3D8;HOUSE BUILDINGS;So;0;ON;;;;;N;;;;;
+ 1F3D9;CITYSCAPE;So;0;ON;;;;;N;;;;;
+ 1F3DA;DERELICT HOUSE BUILDING;So;0;ON;;;;;N;;;;;
+ 1F3DB;CLASSICAL BUILDING;So;0;ON;;;;;N;;;;;
+ 1F3DC;DESERT;So;0;ON;;;;;N;;;;;
+ 1F3DD;DESERT ISLAND;So;0;ON;;;;;N;;;;;
+ 1F3DE;NATIONAL PARK;So;0;ON;;;;;N;;;;;
+ 1F3DF;STADIUM;So;0;ON;;;;;N;;;;;
+ 1F3E0;HOUSE BUILDING;So;0;ON;;;;;N;;;;;
+ 1F3E1;HOUSE WITH GARDEN;So;0;ON;;;;;N;;;;;
+ 1F3E2;OFFICE BUILDING;So;0;ON;;;;;N;;;;;
+ 1F3E3;JAPANESE POST OFFICE;So;0;ON;;;;;N;;;;;
+ 1F3E4;EUROPEAN POST OFFICE;So;0;ON;;;;;N;;;;;
+ 1F3E5;HOSPITAL;So;0;ON;;;;;N;;;;;
+ 1F3E6;BANK;So;0;ON;;;;;N;;;;;
+ 1F3E7;AUTOMATED TELLER MACHINE;So;0;ON;;;;;N;;;;;
+ 1F3E8;HOTEL;So;0;ON;;;;;N;;;;;
+ 1F3E9;LOVE HOTEL;So;0;ON;;;;;N;;;;;
+ 1F3EA;CONVENIENCE STORE;So;0;ON;;;;;N;;;;;
+ 1F3EB;SCHOOL;So;0;ON;;;;;N;;;;;
+ 1F3EC;DEPARTMENT STORE;So;0;ON;;;;;N;;;;;
+ 1F3ED;FACTORY;So;0;ON;;;;;N;;;;;
+ 1F3EE;IZAKAYA LANTERN;So;0;ON;;;;;N;;;;;
+ 1F3EF;JAPANESE CASTLE;So;0;ON;;;;;N;;;;;
+ 1F3F0;EUROPEAN CASTLE;So;0;ON;;;;;N;;;;;
+ 1F3F1;WHITE PENNANT;So;0;ON;;;;;N;;;;;
+ 1F3F2;BLACK PENNANT;So;0;ON;;;;;N;;;;;
+ 1F3F3;WAVING WHITE FLAG;So;0;ON;;;;;N;;;;;
+ 1F3F4;WAVING BLACK FLAG;So;0;ON;;;;;N;;;;;
+ 1F3F5;ROSETTE;So;0;ON;;;;;N;;;;;
+ 1F3F6;BLACK ROSETTE;So;0;ON;;;;;N;;;;;
+ 1F3F7;LABEL;So;0;ON;;;;;N;;;;;
+ 1F3F8;BADMINTON RACQUET AND SHUTTLECOCK;So;0;ON;;;;;N;;;;;
+ 1F3F9;BOW AND ARROW;So;0;ON;;;;;N;;;;;
+ 1F3FA;AMPHORA;So;0;ON;;;;;N;;;;;
+ 1F3FB;EMOJI MODIFIER FITZPATRICK TYPE-1-2;Sk;0;ON;;;;;N;;;;;
+ 1F3FC;EMOJI MODIFIER FITZPATRICK TYPE-3;Sk;0;ON;;;;;N;;;;;
+ 1F3FD;EMOJI MODIFIER FITZPATRICK TYPE-4;Sk;0;ON;;;;;N;;;;;
+ 1F3FE;EMOJI MODIFIER FITZPATRICK TYPE-5;Sk;0;ON;;;;;N;;;;;
+ 1F3FF;EMOJI MODIFIER FITZPATRICK TYPE-6;Sk;0;ON;;;;;N;;;;;
+ 1F400;RAT;So;0;ON;;;;;N;;;;;
+ 1F401;MOUSE;So;0;ON;;;;;N;;;;;
+ 1F402;OX;So;0;ON;;;;;N;;;;;
+ 1F403;WATER BUFFALO;So;0;ON;;;;;N;;;;;
+ 1F404;COW;So;0;ON;;;;;N;;;;;
+ 1F405;TIGER;So;0;ON;;;;;N;;;;;
+ 1F406;LEOPARD;So;0;ON;;;;;N;;;;;
+ 1F407;RABBIT;So;0;ON;;;;;N;;;;;
+ 1F408;CAT;So;0;ON;;;;;N;;;;;
+ 1F409;DRAGON;So;0;ON;;;;;N;;;;;
+ 1F40A;CROCODILE;So;0;ON;;;;;N;;;;;
+ 1F40B;WHALE;So;0;ON;;;;;N;;;;;
+ 1F40C;SNAIL;So;0;ON;;;;;N;;;;;
+ 1F40D;SNAKE;So;0;ON;;;;;N;;;;;
+ 1F40E;HORSE;So;0;ON;;;;;N;;;;;
+ 1F40F;RAM;So;0;ON;;;;;N;;;;;
+ 1F410;GOAT;So;0;ON;;;;;N;;;;;
+ 1F411;SHEEP;So;0;ON;;;;;N;;;;;
+ 1F412;MONKEY;So;0;ON;;;;;N;;;;;
+ 1F413;ROOSTER;So;0;ON;;;;;N;;;;;
+ 1F414;CHICKEN;So;0;ON;;;;;N;;;;;
+ 1F415;DOG;So;0;ON;;;;;N;;;;;
+ 1F416;PIG;So;0;ON;;;;;N;;;;;
+ 1F417;BOAR;So;0;ON;;;;;N;;;;;
+ 1F418;ELEPHANT;So;0;ON;;;;;N;;;;;
+ 1F419;OCTOPUS;So;0;ON;;;;;N;;;;;
+ 1F41A;SPIRAL SHELL;So;0;ON;;;;;N;;;;;
+ 1F41B;BUG;So;0;ON;;;;;N;;;;;
+ 1F41C;ANT;So;0;ON;;;;;N;;;;;
+ 1F41D;HONEYBEE;So;0;ON;;;;;N;;;;;
+ 1F41E;LADY BEETLE;So;0;ON;;;;;N;;;;;
+ 1F41F;FISH;So;0;ON;;;;;N;;;;;
+ 1F420;TROPICAL FISH;So;0;ON;;;;;N;;;;;
+ 1F421;BLOWFISH;So;0;ON;;;;;N;;;;;
+ 1F422;TURTLE;So;0;ON;;;;;N;;;;;
+ 1F423;HATCHING CHICK;So;0;ON;;;;;N;;;;;
+ 1F424;BABY CHICK;So;0;ON;;;;;N;;;;;
+ 1F425;FRONT-FACING BABY CHICK;So;0;ON;;;;;N;;;;;
+ 1F426;BIRD;So;0;ON;;;;;N;;;;;
+ 1F427;PENGUIN;So;0;ON;;;;;N;;;;;
+ 1F428;KOALA;So;0;ON;;;;;N;;;;;
+ 1F429;POODLE;So;0;ON;;;;;N;;;;;
+ 1F42A;DROMEDARY CAMEL;So;0;ON;;;;;N;;;;;
+ 1F42B;BACTRIAN CAMEL;So;0;ON;;;;;N;;;;;
+ 1F42C;DOLPHIN;So;0;ON;;;;;N;;;;;
+ 1F42D;MOUSE FACE;So;0;ON;;;;;N;;;;;
+ 1F42E;COW FACE;So;0;ON;;;;;N;;;;;
+ 1F42F;TIGER FACE;So;0;ON;;;;;N;;;;;
+ 1F430;RABBIT FACE;So;0;ON;;;;;N;;;;;
+ 1F431;CAT FACE;So;0;ON;;;;;N;;;;;
+ 1F432;DRAGON FACE;So;0;ON;;;;;N;;;;;
+ 1F433;SPOUTING WHALE;So;0;ON;;;;;N;;;;;
+ 1F434;HORSE FACE;So;0;ON;;;;;N;;;;;
+ 1F435;MONKEY FACE;So;0;ON;;;;;N;;;;;
+ 1F436;DOG FACE;So;0;ON;;;;;N;;;;;
+ 1F437;PIG FACE;So;0;ON;;;;;N;;;;;
+ 1F438;FROG FACE;So;0;ON;;;;;N;;;;;
+ 1F439;HAMSTER FACE;So;0;ON;;;;;N;;;;;
+ 1F43A;WOLF FACE;So;0;ON;;;;;N;;;;;
+ 1F43B;BEAR FACE;So;0;ON;;;;;N;;;;;
+ 1F43C;PANDA FACE;So;0;ON;;;;;N;;;;;
+ 1F43D;PIG NOSE;So;0;ON;;;;;N;;;;;
+ 1F43E;PAW PRINTS;So;0;ON;;;;;N;;;;;
+ 1F43F;CHIPMUNK;So;0;ON;;;;;N;;;;;
+ 1F440;EYES;So;0;ON;;;;;N;;;;;
+ 1F441;EYE;So;0;ON;;;;;N;;;;;
+ 1F442;EAR;So;0;ON;;;;;N;;;;;
+ 1F443;NOSE;So;0;ON;;;;;N;;;;;
+ 1F444;MOUTH;So;0;ON;;;;;N;;;;;
+ 1F445;TONGUE;So;0;ON;;;;;N;;;;;
+ 1F446;WHITE UP POINTING BACKHAND INDEX;So;0;ON;;;;;N;;;;;
+ 1F447;WHITE DOWN POINTING BACKHAND INDEX;So;0;ON;;;;;N;;;;;
+ 1F448;WHITE LEFT POINTING BACKHAND INDEX;So;0;ON;;;;;N;;;;;
+ 1F449;WHITE RIGHT POINTING BACKHAND INDEX;So;0;ON;;;;;N;;;;;
+ 1F44A;FISTED HAND SIGN;So;0;ON;;;;;N;;;;;
+ 1F44B;WAVING HAND SIGN;So;0;ON;;;;;N;;;;;
+ 1F44C;OK HAND SIGN;So;0;ON;;;;;N;;;;;
+ 1F44D;THUMBS UP SIGN;So;0;ON;;;;;N;;;;;
+ 1F44E;THUMBS DOWN SIGN;So;0;ON;;;;;N;;;;;
+ 1F44F;CLAPPING HANDS SIGN;So;0;ON;;;;;N;;;;;
+ 1F450;OPEN HANDS SIGN;So;0;ON;;;;;N;;;;;
+ 1F451;CROWN;So;0;ON;;;;;N;;;;;
+ 1F452;WOMANS HAT;So;0;ON;;;;;N;;;;;
+ 1F453;EYEGLASSES;So;0;ON;;;;;N;;;;;
+ 1F454;NECKTIE;So;0;ON;;;;;N;;;;;
+ 1F455;T-SHIRT;So;0;ON;;;;;N;;;;;
+ 1F456;JEANS;So;0;ON;;;;;N;;;;;
+ 1F457;DRESS;So;0;ON;;;;;N;;;;;
+ 1F458;KIMONO;So;0;ON;;;;;N;;;;;
+ 1F459;BIKINI;So;0;ON;;;;;N;;;;;
+ 1F45A;WOMANS CLOTHES;So;0;ON;;;;;N;;;;;
+ 1F45B;PURSE;So;0;ON;;;;;N;;;;;
+ 1F45C;HANDBAG;So;0;ON;;;;;N;;;;;
+ 1F45D;POUCH;So;0;ON;;;;;N;;;;;
+ 1F45E;MANS SHOE;So;0;ON;;;;;N;;;;;
+ 1F45F;ATHLETIC SHOE;So;0;ON;;;;;N;;;;;
+ 1F460;HIGH-HEELED SHOE;So;0;ON;;;;;N;;;;;
+ 1F461;WOMANS SANDAL;So;0;ON;;;;;N;;;;;
+ 1F462;WOMANS BOOTS;So;0;ON;;;;;N;;;;;
+ 1F463;FOOTPRINTS;So;0;ON;;;;;N;;;;;
+ 1F464;BUST IN SILHOUETTE;So;0;ON;;;;;N;;;;;
+ 1F465;BUSTS IN SILHOUETTE;So;0;ON;;;;;N;;;;;
+ 1F466;BOY;So;0;ON;;;;;N;;;;;
+ 1F467;GIRL;So;0;ON;;;;;N;;;;;
+ 1F468;MAN;So;0;ON;;;;;N;;;;;
+ 1F469;WOMAN;So;0;ON;;;;;N;;;;;
+ 1F46A;FAMILY;So;0;ON;;;;;N;;;;;
+ 1F46B;MAN AND WOMAN HOLDING HANDS;So;0;ON;;;;;N;;;;;
+ 1F46C;TWO MEN HOLDING HANDS;So;0;ON;;;;;N;;;;;
+ 1F46D;TWO WOMEN HOLDING HANDS;So;0;ON;;;;;N;;;;;
+ 1F46E;POLICE OFFICER;So;0;ON;;;;;N;;;;;
+ 1F46F;WOMAN WITH BUNNY EARS;So;0;ON;;;;;N;;;;;
+ 1F470;BRIDE WITH VEIL;So;0;ON;;;;;N;;;;;
+ 1F471;PERSON WITH BLOND HAIR;So;0;ON;;;;;N;;;;;
+ 1F472;MAN WITH GUA PI MAO;So;0;ON;;;;;N;;;;;
+ 1F473;MAN WITH TURBAN;So;0;ON;;;;;N;;;;;
+ 1F474;OLDER MAN;So;0;ON;;;;;N;;;;;
+ 1F475;OLDER WOMAN;So;0;ON;;;;;N;;;;;
+ 1F476;BABY;So;0;ON;;;;;N;;;;;
+ 1F477;CONSTRUCTION WORKER;So;0;ON;;;;;N;;;;;
+ 1F478;PRINCESS;So;0;ON;;;;;N;;;;;
+ 1F479;JAPANESE OGRE;So;0;ON;;;;;N;;;;;
+ 1F47A;JAPANESE GOBLIN;So;0;ON;;;;;N;;;;;
+ 1F47B;GHOST;So;0;ON;;;;;N;;;;;
+ 1F47C;BABY ANGEL;So;0;ON;;;;;N;;;;;
+ 1F47D;EXTRATERRESTRIAL ALIEN;So;0;ON;;;;;N;;;;;
+ 1F47E;ALIEN MONSTER;So;0;ON;;;;;N;;;;;
+ 1F47F;IMP;So;0;ON;;;;;N;;;;;
+ 1F480;SKULL;So;0;ON;;;;;N;;;;;
+ 1F481;INFORMATION DESK PERSON;So;0;ON;;;;;N;;;;;
+ 1F482;GUARDSMAN;So;0;ON;;;;;N;;;;;
+ 1F483;DANCER;So;0;ON;;;;;N;;;;;
+ 1F484;LIPSTICK;So;0;ON;;;;;N;;;;;
+ 1F485;NAIL POLISH;So;0;ON;;;;;N;;;;;
+ 1F486;FACE MASSAGE;So;0;ON;;;;;N;;;;;
+ 1F487;HAIRCUT;So;0;ON;;;;;N;;;;;
+ 1F488;BARBER POLE;So;0;ON;;;;;N;;;;;
+ 1F489;SYRINGE;So;0;ON;;;;;N;;;;;
+ 1F48A;PILL;So;0;ON;;;;;N;;;;;
+ 1F48B;KISS MARK;So;0;ON;;;;;N;;;;;
+ 1F48C;LOVE LETTER;So;0;ON;;;;;N;;;;;
+ 1F48D;RING;So;0;ON;;;;;N;;;;;
+ 1F48E;GEM STONE;So;0;ON;;;;;N;;;;;
+ 1F48F;KISS;So;0;ON;;;;;N;;;;;
+ 1F490;BOUQUET;So;0;ON;;;;;N;;;;;
+ 1F491;COUPLE WITH HEART;So;0;ON;;;;;N;;;;;
+ 1F492;WEDDING;So;0;ON;;;;;N;;;;;
+ 1F493;BEATING HEART;So;0;ON;;;;;N;;;;;
+ 1F494;BROKEN HEART;So;0;ON;;;;;N;;;;;
+ 1F495;TWO HEARTS;So;0;ON;;;;;N;;;;;
+ 1F496;SPARKLING HEART;So;0;ON;;;;;N;;;;;
+ 1F497;GROWING HEART;So;0;ON;;;;;N;;;;;
+ 1F498;HEART WITH ARROW;So;0;ON;;;;;N;;;;;
+ 1F499;BLUE HEART;So;0;ON;;;;;N;;;;;
+ 1F49A;GREEN HEART;So;0;ON;;;;;N;;;;;
+ 1F49B;YELLOW HEART;So;0;ON;;;;;N;;;;;
+ 1F49C;PURPLE HEART;So;0;ON;;;;;N;;;;;
+ 1F49D;HEART WITH RIBBON;So;0;ON;;;;;N;;;;;
+ 1F49E;REVOLVING HEARTS;So;0;ON;;;;;N;;;;;
+ 1F49F;HEART DECORATION;So;0;ON;;;;;N;;;;;
+ 1F4A0;DIAMOND SHAPE WITH A DOT INSIDE;So;0;ON;;;;;N;;;;;
+ 1F4A1;ELECTRIC LIGHT BULB;So;0;ON;;;;;N;;;;;
+ 1F4A2;ANGER SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F4A3;BOMB;So;0;ON;;;;;N;;;;;
+ 1F4A4;SLEEPING SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F4A5;COLLISION SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F4A6;SPLASHING SWEAT SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F4A7;DROPLET;So;0;ON;;;;;N;;;;;
+ 1F4A8;DASH SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F4A9;PILE OF POO;So;0;ON;;;;;N;;;;;
+ 1F4AA;FLEXED BICEPS;So;0;ON;;;;;N;;;;;
+ 1F4AB;DIZZY SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F4AC;SPEECH BALLOON;So;0;ON;;;;;N;;;;;
+ 1F4AD;THOUGHT BALLOON;So;0;ON;;;;;N;;;;;
+ 1F4AE;WHITE FLOWER;So;0;ON;;;;;N;;;;;
+ 1F4AF;HUNDRED POINTS SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F4B0;MONEY BAG;So;0;ON;;;;;N;;;;;
+ 1F4B1;CURRENCY EXCHANGE;So;0;ON;;;;;N;;;;;
+ 1F4B2;HEAVY DOLLAR SIGN;So;0;ON;;;;;N;;;;;
+ 1F4B3;CREDIT CARD;So;0;ON;;;;;N;;;;;
+ 1F4B4;BANKNOTE WITH YEN SIGN;So;0;ON;;;;;N;;;;;
+ 1F4B5;BANKNOTE WITH DOLLAR SIGN;So;0;ON;;;;;N;;;;;
+ 1F4B6;BANKNOTE WITH EURO SIGN;So;0;ON;;;;;N;;;;;
+ 1F4B7;BANKNOTE WITH POUND SIGN;So;0;ON;;;;;N;;;;;
+ 1F4B8;MONEY WITH WINGS;So;0;ON;;;;;N;;;;;
+ 1F4B9;CHART WITH UPWARDS TREND AND YEN SIGN;So;0;ON;;;;;N;;;;;
+ 1F4BA;SEAT;So;0;ON;;;;;N;;;;;
+ 1F4BB;PERSONAL COMPUTER;So;0;ON;;;;;N;;;;;
+ 1F4BC;BRIEFCASE;So;0;ON;;;;;N;;;;;
+ 1F4BD;MINIDISC;So;0;ON;;;;;N;;;;;
+ 1F4BE;FLOPPY DISK;So;0;ON;;;;;N;;;;;
+ 1F4BF;OPTICAL DISC;So;0;ON;;;;;N;;;;;
+ 1F4C0;DVD;So;0;ON;;;;;N;;;;;
+ 1F4C1;FILE FOLDER;So;0;ON;;;;;N;;;;;
+ 1F4C2;OPEN FILE FOLDER;So;0;ON;;;;;N;;;;;
+ 1F4C3;PAGE WITH CURL;So;0;ON;;;;;N;;;;;
+ 1F4C4;PAGE FACING UP;So;0;ON;;;;;N;;;;;
+ 1F4C5;CALENDAR;So;0;ON;;;;;N;;;;;
+ 1F4C6;TEAR-OFF CALENDAR;So;0;ON;;;;;N;;;;;
+ 1F4C7;CARD INDEX;So;0;ON;;;;;N;;;;;
+ 1F4C8;CHART WITH UPWARDS TREND;So;0;ON;;;;;N;;;;;
+ 1F4C9;CHART WITH DOWNWARDS TREND;So;0;ON;;;;;N;;;;;
+ 1F4CA;BAR CHART;So;0;ON;;;;;N;;;;;
+ 1F4CB;CLIPBOARD;So;0;ON;;;;;N;;;;;
+ 1F4CC;PUSHPIN;So;0;ON;;;;;N;;;;;
+ 1F4CD;ROUND PUSHPIN;So;0;ON;;;;;N;;;;;
+ 1F4CE;PAPERCLIP;So;0;ON;;;;;N;;;;;
+ 1F4CF;STRAIGHT RULER;So;0;ON;;;;;N;;;;;
+ 1F4D0;TRIANGULAR RULER;So;0;ON;;;;;N;;;;;
+ 1F4D1;BOOKMARK TABS;So;0;ON;;;;;N;;;;;
+ 1F4D2;LEDGER;So;0;ON;;;;;N;;;;;
+ 1F4D3;NOTEBOOK;So;0;ON;;;;;N;;;;;
+ 1F4D4;NOTEBOOK WITH DECORATIVE COVER;So;0;ON;;;;;N;;;;;
+ 1F4D5;CLOSED BOOK;So;0;ON;;;;;N;;;;;
+ 1F4D6;OPEN BOOK;So;0;ON;;;;;N;;;;;
+ 1F4D7;GREEN BOOK;So;0;ON;;;;;N;;;;;
+ 1F4D8;BLUE BOOK;So;0;ON;;;;;N;;;;;
+ 1F4D9;ORANGE BOOK;So;0;ON;;;;;N;;;;;
+ 1F4DA;BOOKS;So;0;ON;;;;;N;;;;;
+ 1F4DB;NAME BADGE;So;0;ON;;;;;N;;;;;
+ 1F4DC;SCROLL;So;0;ON;;;;;N;;;;;
+ 1F4DD;MEMO;So;0;ON;;;;;N;;;;;
+ 1F4DE;TELEPHONE RECEIVER;So;0;ON;;;;;N;;;;;
+ 1F4DF;PAGER;So;0;ON;;;;;N;;;;;
+ 1F4E0;FAX MACHINE;So;0;ON;;;;;N;;;;;
+ 1F4E1;SATELLITE ANTENNA;So;0;ON;;;;;N;;;;;
+ 1F4E2;PUBLIC ADDRESS LOUDSPEAKER;So;0;ON;;;;;N;;;;;
+ 1F4E3;CHEERING MEGAPHONE;So;0;ON;;;;;N;;;;;
+ 1F4E4;OUTBOX TRAY;So;0;ON;;;;;N;;;;;
+ 1F4E5;INBOX TRAY;So;0;ON;;;;;N;;;;;
+ 1F4E6;PACKAGE;So;0;ON;;;;;N;;;;;
+ 1F4E7;E-MAIL SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F4E8;INCOMING ENVELOPE;So;0;ON;;;;;N;;;;;
+ 1F4E9;ENVELOPE WITH DOWNWARDS ARROW ABOVE;So;0;ON;;;;;N;;;;;
+ 1F4EA;CLOSED MAILBOX WITH LOWERED FLAG;So;0;ON;;;;;N;;;;;
+ 1F4EB;CLOSED MAILBOX WITH RAISED FLAG;So;0;ON;;;;;N;;;;;
+ 1F4EC;OPEN MAILBOX WITH RAISED FLAG;So;0;ON;;;;;N;;;;;
+ 1F4ED;OPEN MAILBOX WITH LOWERED FLAG;So;0;ON;;;;;N;;;;;
+ 1F4EE;POSTBOX;So;0;ON;;;;;N;;;;;
+ 1F4EF;POSTAL HORN;So;0;ON;;;;;N;;;;;
+ 1F4F0;NEWSPAPER;So;0;ON;;;;;N;;;;;
+ 1F4F1;MOBILE PHONE;So;0;ON;;;;;N;;;;;
+ 1F4F2;MOBILE PHONE WITH RIGHTWARDS ARROW AT LEFT;So;0;ON;;;;;N;;;;;
+ 1F4F3;VIBRATION MODE;So;0;ON;;;;;N;;;;;
+ 1F4F4;MOBILE PHONE OFF;So;0;ON;;;;;N;;;;;
+ 1F4F5;NO MOBILE PHONES;So;0;ON;;;;;N;;;;;
+ 1F4F6;ANTENNA WITH BARS;So;0;ON;;;;;N;;;;;
+ 1F4F7;CAMERA;So;0;ON;;;;;N;;;;;
+ 1F4F8;CAMERA WITH FLASH;So;0;ON;;;;;N;;;;;
+ 1F4F9;VIDEO CAMERA;So;0;ON;;;;;N;;;;;
+ 1F4FA;TELEVISION;So;0;ON;;;;;N;;;;;
+ 1F4FB;RADIO;So;0;ON;;;;;N;;;;;
+ 1F4FC;VIDEOCASSETTE;So;0;ON;;;;;N;;;;;
+ 1F4FD;FILM PROJECTOR;So;0;ON;;;;;N;;;;;
+ 1F4FE;PORTABLE STEREO;So;0;ON;;;;;N;;;;;
+ 1F4FF;PRAYER BEADS;So;0;ON;;;;;N;;;;;
+ 1F500;TWISTED RIGHTWARDS ARROWS;So;0;ON;;;;;N;;;;;
+ 1F501;CLOCKWISE RIGHTWARDS AND LEFTWARDS OPEN CIRCLE ARROWS;So;0;ON;;;;;N;;;;;
+ 1F502;CLOCKWISE RIGHTWARDS AND LEFTWARDS OPEN CIRCLE ARROWS WITH CIRCLED ONE OVERLAY;So;0;ON;;;;;N;;;;;
+ 1F503;CLOCKWISE DOWNWARDS AND UPWARDS OPEN CIRCLE ARROWS;So;0;ON;;;;;N;;;;;
+ 1F504;ANTICLOCKWISE DOWNWARDS AND UPWARDS OPEN CIRCLE ARROWS;So;0;ON;;;;;N;;;;;
+ 1F505;LOW BRIGHTNESS SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F506;HIGH BRIGHTNESS SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F507;SPEAKER WITH CANCELLATION STROKE;So;0;ON;;;;;N;;;;;
+ 1F508;SPEAKER;So;0;ON;;;;;N;;;;;
+ 1F509;SPEAKER WITH ONE SOUND WAVE;So;0;ON;;;;;N;;;;;
+ 1F50A;SPEAKER WITH THREE SOUND WAVES;So;0;ON;;;;;N;;;;;
+ 1F50B;BATTERY;So;0;ON;;;;;N;;;;;
+ 1F50C;ELECTRIC PLUG;So;0;ON;;;;;N;;;;;
+ 1F50D;LEFT-POINTING MAGNIFYING GLASS;So;0;ON;;;;;N;;;;;
+ 1F50E;RIGHT-POINTING MAGNIFYING GLASS;So;0;ON;;;;;N;;;;;
+ 1F50F;LOCK WITH INK PEN;So;0;ON;;;;;N;;;;;
+ 1F510;CLOSED LOCK WITH KEY;So;0;ON;;;;;N;;;;;
+ 1F511;KEY;So;0;ON;;;;;N;;;;;
+ 1F512;LOCK;So;0;ON;;;;;N;;;;;
+ 1F513;OPEN LOCK;So;0;ON;;;;;N;;;;;
+ 1F514;BELL;So;0;ON;;;;;N;;;;;
+ 1F515;BELL WITH CANCELLATION STROKE;So;0;ON;;;;;N;;;;;
+ 1F516;BOOKMARK;So;0;ON;;;;;N;;;;;
+ 1F517;LINK SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F518;RADIO BUTTON;So;0;ON;;;;;N;;;;;
+ 1F519;BACK WITH LEFTWARDS ARROW ABOVE;So;0;ON;;;;;N;;;;;
+ 1F51A;END WITH LEFTWARDS ARROW ABOVE;So;0;ON;;;;;N;;;;;
+ 1F51B;ON WITH EXCLAMATION MARK WITH LEFT RIGHT ARROW ABOVE;So;0;ON;;;;;N;;;;;
+ 1F51C;SOON WITH RIGHTWARDS ARROW ABOVE;So;0;ON;;;;;N;;;;;
+ 1F51D;TOP WITH UPWARDS ARROW ABOVE;So;0;ON;;;;;N;;;;;
+ 1F51E;NO ONE UNDER EIGHTEEN SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F51F;KEYCAP TEN;So;0;ON;;;;;N;;;;;
+ 1F520;INPUT SYMBOL FOR LATIN CAPITAL LETTERS;So;0;ON;;;;;N;;;;;
+ 1F521;INPUT SYMBOL FOR LATIN SMALL LETTERS;So;0;ON;;;;;N;;;;;
+ 1F522;INPUT SYMBOL FOR NUMBERS;So;0;ON;;;;;N;;;;;
+ 1F523;INPUT SYMBOL FOR SYMBOLS;So;0;ON;;;;;N;;;;;
+ 1F524;INPUT SYMBOL FOR LATIN LETTERS;So;0;ON;;;;;N;;;;;
+ 1F525;FIRE;So;0;ON;;;;;N;;;;;
+ 1F526;ELECTRIC TORCH;So;0;ON;;;;;N;;;;;
+ 1F527;WRENCH;So;0;ON;;;;;N;;;;;
+ 1F528;HAMMER;So;0;ON;;;;;N;;;;;
+ 1F529;NUT AND BOLT;So;0;ON;;;;;N;;;;;
+ 1F52A;HOCHO;So;0;ON;;;;;N;;;;;
+ 1F52B;PISTOL;So;0;ON;;;;;N;;;;;
+ 1F52C;MICROSCOPE;So;0;ON;;;;;N;;;;;
+ 1F52D;TELESCOPE;So;0;ON;;;;;N;;;;;
+ 1F52E;CRYSTAL BALL;So;0;ON;;;;;N;;;;;
+ 1F52F;SIX POINTED STAR WITH MIDDLE DOT;So;0;ON;;;;;N;;;;;
+ 1F530;JAPANESE SYMBOL FOR BEGINNER;So;0;ON;;;;;N;;;;;
+ 1F531;TRIDENT EMBLEM;So;0;ON;;;;;N;;;;;
+ 1F532;BLACK SQUARE BUTTON;So;0;ON;;;;;N;;;;;
+ 1F533;WHITE SQUARE BUTTON;So;0;ON;;;;;N;;;;;
+ 1F534;LARGE RED CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F535;LARGE BLUE CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F536;LARGE ORANGE DIAMOND;So;0;ON;;;;;N;;;;;
+ 1F537;LARGE BLUE DIAMOND;So;0;ON;;;;;N;;;;;
+ 1F538;SMALL ORANGE DIAMOND;So;0;ON;;;;;N;;;;;
+ 1F539;SMALL BLUE DIAMOND;So;0;ON;;;;;N;;;;;
+ 1F53A;UP-POINTING RED TRIANGLE;So;0;ON;;;;;N;;;;;
+ 1F53B;DOWN-POINTING RED TRIANGLE;So;0;ON;;;;;N;;;;;
+ 1F53C;UP-POINTING SMALL RED TRIANGLE;So;0;ON;;;;;N;;;;;
+ 1F53D;DOWN-POINTING SMALL RED TRIANGLE;So;0;ON;;;;;N;;;;;
+ 1F53E;LOWER RIGHT SHADOWED WHITE CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F53F;UPPER RIGHT SHADOWED WHITE CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F540;CIRCLED CROSS POMMEE;So;0;ON;;;;;N;;;;;
+ 1F541;CROSS POMMEE WITH HALF-CIRCLE BELOW;So;0;ON;;;;;N;;;;;
+ 1F542;CROSS POMMEE;So;0;ON;;;;;N;;;;;
+ 1F543;NOTCHED LEFT SEMICIRCLE WITH THREE DOTS;So;0;ON;;;;;N;;;;;
+ 1F544;NOTCHED RIGHT SEMICIRCLE WITH THREE DOTS;So;0;ON;;;;;N;;;;;
+ 1F545;SYMBOL FOR MARKS CHAPTER;So;0;ON;;;;;N;;;;;
+ 1F546;WHITE LATIN CROSS;So;0;ON;;;;;N;;;;;
+ 1F547;HEAVY LATIN CROSS;So;0;ON;;;;;N;;;;;
+ 1F548;CELTIC CROSS;So;0;ON;;;;;N;;;;;
+ 1F549;OM SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F54A;DOVE OF PEACE;So;0;ON;;;;;N;;;;;
+ 1F54B;KAABA;So;0;ON;;;;;N;;;;;
+ 1F54C;MOSQUE;So;0;ON;;;;;N;;;;;
+ 1F54D;SYNAGOGUE;So;0;ON;;;;;N;;;;;
+ 1F54E;MENORAH WITH NINE BRANCHES;So;0;ON;;;;;N;;;;;
+ 1F54F;BOWL OF HYGIEIA;So;0;ON;;;;;N;;;;;
+ 1F550;CLOCK FACE ONE OCLOCK;So;0;ON;;;;;N;;;;;
+ 1F551;CLOCK FACE TWO OCLOCK;So;0;ON;;;;;N;;;;;
+ 1F552;CLOCK FACE THREE OCLOCK;So;0;ON;;;;;N;;;;;
+ 1F553;CLOCK FACE FOUR OCLOCK;So;0;ON;;;;;N;;;;;
+ 1F554;CLOCK FACE FIVE OCLOCK;So;0;ON;;;;;N;;;;;
+ 1F555;CLOCK FACE SIX OCLOCK;So;0;ON;;;;;N;;;;;
+ 1F556;CLOCK FACE SEVEN OCLOCK;So;0;ON;;;;;N;;;;;
+ 1F557;CLOCK FACE EIGHT OCLOCK;So;0;ON;;;;;N;;;;;
+ 1F558;CLOCK FACE NINE OCLOCK;So;0;ON;;;;;N;;;;;
+ 1F559;CLOCK FACE TEN OCLOCK;So;0;ON;;;;;N;;;;;
+ 1F55A;CLOCK FACE ELEVEN OCLOCK;So;0;ON;;;;;N;;;;;
+ 1F55B;CLOCK FACE TWELVE OCLOCK;So;0;ON;;;;;N;;;;;
+ 1F55C;CLOCK FACE ONE-THIRTY;So;0;ON;;;;;N;;;;;
+ 1F55D;CLOCK FACE TWO-THIRTY;So;0;ON;;;;;N;;;;;
+ 1F55E;CLOCK FACE THREE-THIRTY;So;0;ON;;;;;N;;;;;
+ 1F55F;CLOCK FACE FOUR-THIRTY;So;0;ON;;;;;N;;;;;
+ 1F560;CLOCK FACE FIVE-THIRTY;So;0;ON;;;;;N;;;;;
+ 1F561;CLOCK FACE SIX-THIRTY;So;0;ON;;;;;N;;;;;
+ 1F562;CLOCK FACE SEVEN-THIRTY;So;0;ON;;;;;N;;;;;
+ 1F563;CLOCK FACE EIGHT-THIRTY;So;0;ON;;;;;N;;;;;
+ 1F564;CLOCK FACE NINE-THIRTY;So;0;ON;;;;;N;;;;;
+ 1F565;CLOCK FACE TEN-THIRTY;So;0;ON;;;;;N;;;;;
+ 1F566;CLOCK FACE ELEVEN-THIRTY;So;0;ON;;;;;N;;;;;
+ 1F567;CLOCK FACE TWELVE-THIRTY;So;0;ON;;;;;N;;;;;
+ 1F568;RIGHT SPEAKER;So;0;ON;;;;;N;;;;;
+ 1F569;RIGHT SPEAKER WITH ONE SOUND WAVE;So;0;ON;;;;;N;;;;;
+ 1F56A;RIGHT SPEAKER WITH THREE SOUND WAVES;So;0;ON;;;;;N;;;;;
+ 1F56B;BULLHORN;So;0;ON;;;;;N;;;;;
+ 1F56C;BULLHORN WITH SOUND WAVES;So;0;ON;;;;;N;;;;;
+ 1F56D;RINGING BELL;So;0;ON;;;;;N;;;;;
+ 1F56E;BOOK;So;0;ON;;;;;N;;;;;
+ 1F56F;CANDLE;So;0;ON;;;;;N;;;;;
+ 1F570;MANTELPIECE CLOCK;So;0;ON;;;;;N;;;;;
+ 1F571;BLACK SKULL AND CROSSBONES;So;0;ON;;;;;N;;;;;
+ 1F572;NO PIRACY;So;0;ON;;;;;N;;;;;
+ 1F573;HOLE;So;0;ON;;;;;N;;;;;
+ 1F574;MAN IN BUSINESS SUIT LEVITATING;So;0;ON;;;;;N;;;;;
+ 1F575;SLEUTH OR SPY;So;0;ON;;;;;N;;;;;
+ 1F576;DARK SUNGLASSES;So;0;ON;;;;;N;;;;;
+ 1F577;SPIDER;So;0;ON;;;;;N;;;;;
+ 1F578;SPIDER WEB;So;0;ON;;;;;N;;;;;
+ 1F579;JOYSTICK;So;0;ON;;;;;N;;;;;
+ 1F57A;MAN DANCING;So;0;ON;;;;;N;;;;;
+ 1F57B;LEFT HAND TELEPHONE RECEIVER;So;0;ON;;;;;N;;;;;
+ 1F57C;TELEPHONE RECEIVER WITH PAGE;So;0;ON;;;;;N;;;;;
+ 1F57D;RIGHT HAND TELEPHONE RECEIVER;So;0;ON;;;;;N;;;;;
+ 1F57E;WHITE TOUCHTONE TELEPHONE;So;0;ON;;;;;N;;;;;
+ 1F57F;BLACK TOUCHTONE TELEPHONE;So;0;ON;;;;;N;;;;;
+ 1F580;TELEPHONE ON TOP OF MODEM;So;0;ON;;;;;N;;;;;
+ 1F581;CLAMSHELL MOBILE PHONE;So;0;ON;;;;;N;;;;;
+ 1F582;BACK OF ENVELOPE;So;0;ON;;;;;N;;;;;
+ 1F583;STAMPED ENVELOPE;So;0;ON;;;;;N;;;;;
+ 1F584;ENVELOPE WITH LIGHTNING;So;0;ON;;;;;N;;;;;
+ 1F585;FLYING ENVELOPE;So;0;ON;;;;;N;;;;;
+ 1F586;PEN OVER STAMPED ENVELOPE;So;0;ON;;;;;N;;;;;
+ 1F587;LINKED PAPERCLIPS;So;0;ON;;;;;N;;;;;
+ 1F588;BLACK PUSHPIN;So;0;ON;;;;;N;;;;;
+ 1F589;LOWER LEFT PENCIL;So;0;ON;;;;;N;;;;;
+ 1F58A;LOWER LEFT BALLPOINT PEN;So;0;ON;;;;;N;;;;;
+ 1F58B;LOWER LEFT FOUNTAIN PEN;So;0;ON;;;;;N;;;;;
+ 1F58C;LOWER LEFT PAINTBRUSH;So;0;ON;;;;;N;;;;;
+ 1F58D;LOWER LEFT CRAYON;So;0;ON;;;;;N;;;;;
+ 1F58E;LEFT WRITING HAND;So;0;ON;;;;;N;;;;;
+ 1F58F;TURNED OK HAND SIGN;So;0;ON;;;;;N;;;;;
+ 1F590;RAISED HAND WITH FINGERS SPLAYED;So;0;ON;;;;;N;;;;;
+ 1F591;REVERSED RAISED HAND WITH FINGERS SPLAYED;So;0;ON;;;;;N;;;;;
+ 1F592;REVERSED THUMBS UP SIGN;So;0;ON;;;;;N;;;;;
+ 1F593;REVERSED THUMBS DOWN SIGN;So;0;ON;;;;;N;;;;;
+ 1F594;REVERSED VICTORY HAND;So;0;ON;;;;;N;;;;;
+ 1F595;REVERSED HAND WITH MIDDLE FINGER EXTENDED;So;0;ON;;;;;N;;;;;
+ 1F596;RAISED HAND WITH PART BETWEEN MIDDLE AND RING FINGERS;So;0;ON;;;;;N;;;;;
+ 1F597;WHITE DOWN POINTING LEFT HAND INDEX;So;0;ON;;;;;N;;;;;
+ 1F598;SIDEWAYS WHITE LEFT POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 1F599;SIDEWAYS WHITE RIGHT POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 1F59A;SIDEWAYS BLACK LEFT POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 1F59B;SIDEWAYS BLACK RIGHT POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 1F59C;BLACK LEFT POINTING BACKHAND INDEX;So;0;ON;;;;;N;;;;;
+ 1F59D;BLACK RIGHT POINTING BACKHAND INDEX;So;0;ON;;;;;N;;;;;
+ 1F59E;SIDEWAYS WHITE UP POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 1F59F;SIDEWAYS WHITE DOWN POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 1F5A0;SIDEWAYS BLACK UP POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 1F5A1;SIDEWAYS BLACK DOWN POINTING INDEX;So;0;ON;;;;;N;;;;;
+ 1F5A2;BLACK UP POINTING BACKHAND INDEX;So;0;ON;;;;;N;;;;;
+ 1F5A3;BLACK DOWN POINTING BACKHAND INDEX;So;0;ON;;;;;N;;;;;
+ 1F5A4;BLACK HEART;So;0;ON;;;;;N;;;;;
+ 1F5A5;DESKTOP COMPUTER;So;0;ON;;;;;N;;;;;
+ 1F5A6;KEYBOARD AND MOUSE;So;0;ON;;;;;N;;;;;
+ 1F5A7;THREE NETWORKED COMPUTERS;So;0;ON;;;;;N;;;;;
+ 1F5A8;PRINTER;So;0;ON;;;;;N;;;;;
+ 1F5A9;POCKET CALCULATOR;So;0;ON;;;;;N;;;;;
+ 1F5AA;BLACK HARD SHELL FLOPPY DISK;So;0;ON;;;;;N;;;;;
+ 1F5AB;WHITE HARD SHELL FLOPPY DISK;So;0;ON;;;;;N;;;;;
+ 1F5AC;SOFT SHELL FLOPPY DISK;So;0;ON;;;;;N;;;;;
+ 1F5AD;TAPE CARTRIDGE;So;0;ON;;;;;N;;;;;
+ 1F5AE;WIRED KEYBOARD;So;0;ON;;;;;N;;;;;
+ 1F5AF;ONE BUTTON MOUSE;So;0;ON;;;;;N;;;;;
+ 1F5B0;TWO BUTTON MOUSE;So;0;ON;;;;;N;;;;;
+ 1F5B1;THREE BUTTON MOUSE;So;0;ON;;;;;N;;;;;
+ 1F5B2;TRACKBALL;So;0;ON;;;;;N;;;;;
+ 1F5B3;OLD PERSONAL COMPUTER;So;0;ON;;;;;N;;;;;
+ 1F5B4;HARD DISK;So;0;ON;;;;;N;;;;;
+ 1F5B5;SCREEN;So;0;ON;;;;;N;;;;;
+ 1F5B6;PRINTER ICON;So;0;ON;;;;;N;;;;;
+ 1F5B7;FAX ICON;So;0;ON;;;;;N;;;;;
+ 1F5B8;OPTICAL DISC ICON;So;0;ON;;;;;N;;;;;
+ 1F5B9;DOCUMENT WITH TEXT;So;0;ON;;;;;N;;;;;
+ 1F5BA;DOCUMENT WITH TEXT AND PICTURE;So;0;ON;;;;;N;;;;;
+ 1F5BB;DOCUMENT WITH PICTURE;So;0;ON;;;;;N;;;;;
+ 1F5BC;FRAME WITH PICTURE;So;0;ON;;;;;N;;;;;
+ 1F5BD;FRAME WITH TILES;So;0;ON;;;;;N;;;;;
+ 1F5BE;FRAME WITH AN X;So;0;ON;;;;;N;;;;;
+ 1F5BF;BLACK FOLDER;So;0;ON;;;;;N;;;;;
+ 1F5C0;FOLDER;So;0;ON;;;;;N;;;;;
+ 1F5C1;OPEN FOLDER;So;0;ON;;;;;N;;;;;
+ 1F5C2;CARD INDEX DIVIDERS;So;0;ON;;;;;N;;;;;
+ 1F5C3;CARD FILE BOX;So;0;ON;;;;;N;;;;;
+ 1F5C4;FILE CABINET;So;0;ON;;;;;N;;;;;
+ 1F5C5;EMPTY NOTE;So;0;ON;;;;;N;;;;;
+ 1F5C6;EMPTY NOTE PAGE;So;0;ON;;;;;N;;;;;
+ 1F5C7;EMPTY NOTE PAD;So;0;ON;;;;;N;;;;;
+ 1F5C8;NOTE;So;0;ON;;;;;N;;;;;
+ 1F5C9;NOTE PAGE;So;0;ON;;;;;N;;;;;
+ 1F5CA;NOTE PAD;So;0;ON;;;;;N;;;;;
+ 1F5CB;EMPTY DOCUMENT;So;0;ON;;;;;N;;;;;
+ 1F5CC;EMPTY PAGE;So;0;ON;;;;;N;;;;;
+ 1F5CD;EMPTY PAGES;So;0;ON;;;;;N;;;;;
+ 1F5CE;DOCUMENT;So;0;ON;;;;;N;;;;;
+ 1F5CF;PAGE;So;0;ON;;;;;N;;;;;
+ 1F5D0;PAGES;So;0;ON;;;;;N;;;;;
+ 1F5D1;WASTEBASKET;So;0;ON;;;;;N;;;;;
+ 1F5D2;SPIRAL NOTE PAD;So;0;ON;;;;;N;;;;;
+ 1F5D3;SPIRAL CALENDAR PAD;So;0;ON;;;;;N;;;;;
+ 1F5D4;DESKTOP WINDOW;So;0;ON;;;;;N;;;;;
+ 1F5D5;MINIMIZE;So;0;ON;;;;;N;;;;;
+ 1F5D6;MAXIMIZE;So;0;ON;;;;;N;;;;;
+ 1F5D7;OVERLAP;So;0;ON;;;;;N;;;;;
+ 1F5D8;CLOCKWISE RIGHT AND LEFT SEMICIRCLE ARROWS;So;0;ON;;;;;N;;;;;
+ 1F5D9;CANCELLATION X;So;0;ON;;;;;N;;;;;
+ 1F5DA;INCREASE FONT SIZE SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F5DB;DECREASE FONT SIZE SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F5DC;COMPRESSION;So;0;ON;;;;;N;;;;;
+ 1F5DD;OLD KEY;So;0;ON;;;;;N;;;;;
+ 1F5DE;ROLLED-UP NEWSPAPER;So;0;ON;;;;;N;;;;;
+ 1F5DF;PAGE WITH CIRCLED TEXT;So;0;ON;;;;;N;;;;;
+ 1F5E0;STOCK CHART;So;0;ON;;;;;N;;;;;
+ 1F5E1;DAGGER KNIFE;So;0;ON;;;;;N;;;;;
+ 1F5E2;LIPS;So;0;ON;;;;;N;;;;;
+ 1F5E3;SPEAKING HEAD IN SILHOUETTE;So;0;ON;;;;;N;;;;;
+ 1F5E4;THREE RAYS ABOVE;So;0;ON;;;;;N;;;;;
+ 1F5E5;THREE RAYS BELOW;So;0;ON;;;;;N;;;;;
+ 1F5E6;THREE RAYS LEFT;So;0;ON;;;;;N;;;;;
+ 1F5E7;THREE RAYS RIGHT;So;0;ON;;;;;N;;;;;
+ 1F5E8;LEFT SPEECH BUBBLE;So;0;ON;;;;;N;;;;;
+ 1F5E9;RIGHT SPEECH BUBBLE;So;0;ON;;;;;N;;;;;
+ 1F5EA;TWO SPEECH BUBBLES;So;0;ON;;;;;N;;;;;
+ 1F5EB;THREE SPEECH BUBBLES;So;0;ON;;;;;N;;;;;
+ 1F5EC;LEFT THOUGHT BUBBLE;So;0;ON;;;;;N;;;;;
+ 1F5ED;RIGHT THOUGHT BUBBLE;So;0;ON;;;;;N;;;;;
+ 1F5EE;LEFT ANGER BUBBLE;So;0;ON;;;;;N;;;;;
+ 1F5EF;RIGHT ANGER BUBBLE;So;0;ON;;;;;N;;;;;
+ 1F5F0;MOOD BUBBLE;So;0;ON;;;;;N;;;;;
+ 1F5F1;LIGHTNING MOOD BUBBLE;So;0;ON;;;;;N;;;;;
+ 1F5F2;LIGHTNING MOOD;So;0;ON;;;;;N;;;;;
+ 1F5F3;BALLOT BOX WITH BALLOT;So;0;ON;;;;;N;;;;;
+ 1F5F4;BALLOT SCRIPT X;So;0;ON;;;;;N;;;;;
+ 1F5F5;BALLOT BOX WITH SCRIPT X;So;0;ON;;;;;N;;;;;
+ 1F5F6;BALLOT BOLD SCRIPT X;So;0;ON;;;;;N;;;;;
+ 1F5F7;BALLOT BOX WITH BOLD SCRIPT X;So;0;ON;;;;;N;;;;;
+ 1F5F8;LIGHT CHECK MARK;So;0;ON;;;;;N;;;;;
+ 1F5F9;BALLOT BOX WITH BOLD CHECK;So;0;ON;;;;;N;;;;;
+ 1F5FA;WORLD MAP;So;0;ON;;;;;N;;;;;
+ 1F5FB;MOUNT FUJI;So;0;ON;;;;;N;;;;;
+ 1F5FC;TOKYO TOWER;So;0;ON;;;;;N;;;;;
+ 1F5FD;STATUE OF LIBERTY;So;0;ON;;;;;N;;;;;
+ 1F5FE;SILHOUETTE OF JAPAN;So;0;ON;;;;;N;;;;;
+ 1F5FF;MOYAI;So;0;ON;;;;;N;;;;;
+ 1F600;GRINNING FACE;So;0;ON;;;;;N;;;;;
+ 1F601;GRINNING FACE WITH SMILING EYES;So;0;ON;;;;;N;;;;;
+ 1F602;FACE WITH TEARS OF JOY;So;0;ON;;;;;N;;;;;
+ 1F603;SMILING FACE WITH OPEN MOUTH;So;0;ON;;;;;N;;;;;
+ 1F604;SMILING FACE WITH OPEN MOUTH AND SMILING EYES;So;0;ON;;;;;N;;;;;
+ 1F605;SMILING FACE WITH OPEN MOUTH AND COLD SWEAT;So;0;ON;;;;;N;;;;;
+ 1F606;SMILING FACE WITH OPEN MOUTH AND TIGHTLY-CLOSED EYES;So;0;ON;;;;;N;;;;;
+ 1F607;SMILING FACE WITH HALO;So;0;ON;;;;;N;;;;;
+ 1F608;SMILING FACE WITH HORNS;So;0;ON;;;;;N;;;;;
+ 1F609;WINKING FACE;So;0;ON;;;;;N;;;;;
+ 1F60A;SMILING FACE WITH SMILING EYES;So;0;ON;;;;;N;;;;;
+ 1F60B;FACE SAVOURING DELICIOUS FOOD;So;0;ON;;;;;N;;;;;
+ 1F60C;RELIEVED FACE;So;0;ON;;;;;N;;;;;
+ 1F60D;SMILING FACE WITH HEART-SHAPED EYES;So;0;ON;;;;;N;;;;;
+ 1F60E;SMILING FACE WITH SUNGLASSES;So;0;ON;;;;;N;;;;;
+ 1F60F;SMIRKING FACE;So;0;ON;;;;;N;;;;;
+ 1F610;NEUTRAL FACE;So;0;ON;;;;;N;;;;;
+ 1F611;EXPRESSIONLESS FACE;So;0;ON;;;;;N;;;;;
+ 1F612;UNAMUSED FACE;So;0;ON;;;;;N;;;;;
+ 1F613;FACE WITH COLD SWEAT;So;0;ON;;;;;N;;;;;
+ 1F614;PENSIVE FACE;So;0;ON;;;;;N;;;;;
+ 1F615;CONFUSED FACE;So;0;ON;;;;;N;;;;;
+ 1F616;CONFOUNDED FACE;So;0;ON;;;;;N;;;;;
+ 1F617;KISSING FACE;So;0;ON;;;;;N;;;;;
+ 1F618;FACE THROWING A KISS;So;0;ON;;;;;N;;;;;
+ 1F619;KISSING FACE WITH SMILING EYES;So;0;ON;;;;;N;;;;;
+ 1F61A;KISSING FACE WITH CLOSED EYES;So;0;ON;;;;;N;;;;;
+ 1F61B;FACE WITH STUCK-OUT TONGUE;So;0;ON;;;;;N;;;;;
+ 1F61C;FACE WITH STUCK-OUT TONGUE AND WINKING EYE;So;0;ON;;;;;N;;;;;
+ 1F61D;FACE WITH STUCK-OUT TONGUE AND TIGHTLY-CLOSED EYES;So;0;ON;;;;;N;;;;;
+ 1F61E;DISAPPOINTED FACE;So;0;ON;;;;;N;;;;;
+ 1F61F;WORRIED FACE;So;0;ON;;;;;N;;;;;
+ 1F620;ANGRY FACE;So;0;ON;;;;;N;;;;;
+ 1F621;POUTING FACE;So;0;ON;;;;;N;;;;;
+ 1F622;CRYING FACE;So;0;ON;;;;;N;;;;;
+ 1F623;PERSEVERING FACE;So;0;ON;;;;;N;;;;;
+ 1F624;FACE WITH LOOK OF TRIUMPH;So;0;ON;;;;;N;;;;;
+ 1F625;DISAPPOINTED BUT RELIEVED FACE;So;0;ON;;;;;N;;;;;
+ 1F626;FROWNING FACE WITH OPEN MOUTH;So;0;ON;;;;;N;;;;;
+ 1F627;ANGUISHED FACE;So;0;ON;;;;;N;;;;;
+ 1F628;FEARFUL FACE;So;0;ON;;;;;N;;;;;
+ 1F629;WEARY FACE;So;0;ON;;;;;N;;;;;
+ 1F62A;SLEEPY FACE;So;0;ON;;;;;N;;;;;
+ 1F62B;TIRED FACE;So;0;ON;;;;;N;;;;;
+ 1F62C;GRIMACING FACE;So;0;ON;;;;;N;;;;;
+ 1F62D;LOUDLY CRYING FACE;So;0;ON;;;;;N;;;;;
+ 1F62E;FACE WITH OPEN MOUTH;So;0;ON;;;;;N;;;;;
+ 1F62F;HUSHED FACE;So;0;ON;;;;;N;;;;;
+ 1F630;FACE WITH OPEN MOUTH AND COLD SWEAT;So;0;ON;;;;;N;;;;;
+ 1F631;FACE SCREAMING IN FEAR;So;0;ON;;;;;N;;;;;
+ 1F632;ASTONISHED FACE;So;0;ON;;;;;N;;;;;
+ 1F633;FLUSHED FACE;So;0;ON;;;;;N;;;;;
+ 1F634;SLEEPING FACE;So;0;ON;;;;;N;;;;;
+ 1F635;DIZZY FACE;So;0;ON;;;;;N;;;;;
+ 1F636;FACE WITHOUT MOUTH;So;0;ON;;;;;N;;;;;
+ 1F637;FACE WITH MEDICAL MASK;So;0;ON;;;;;N;;;;;
+ 1F638;GRINNING CAT FACE WITH SMILING EYES;So;0;ON;;;;;N;;;;;
+ 1F639;CAT FACE WITH TEARS OF JOY;So;0;ON;;;;;N;;;;;
+ 1F63A;SMILING CAT FACE WITH OPEN MOUTH;So;0;ON;;;;;N;;;;;
+ 1F63B;SMILING CAT FACE WITH HEART-SHAPED EYES;So;0;ON;;;;;N;;;;;
+ 1F63C;CAT FACE WITH WRY SMILE;So;0;ON;;;;;N;;;;;
+ 1F63D;KISSING CAT FACE WITH CLOSED EYES;So;0;ON;;;;;N;;;;;
+ 1F63E;POUTING CAT FACE;So;0;ON;;;;;N;;;;;
+ 1F63F;CRYING CAT FACE;So;0;ON;;;;;N;;;;;
+ 1F640;WEARY CAT FACE;So;0;ON;;;;;N;;;;;
+ 1F641;SLIGHTLY FROWNING FACE;So;0;ON;;;;;N;;;;;
+ 1F642;SLIGHTLY SMILING FACE;So;0;ON;;;;;N;;;;;
+ 1F643;UPSIDE-DOWN FACE;So;0;ON;;;;;N;;;;;
+ 1F644;FACE WITH ROLLING EYES;So;0;ON;;;;;N;;;;;
+ 1F645;FACE WITH NO GOOD GESTURE;So;0;ON;;;;;N;;;;;
+ 1F646;FACE WITH OK GESTURE;So;0;ON;;;;;N;;;;;
+ 1F647;PERSON BOWING DEEPLY;So;0;ON;;;;;N;;;;;
+ 1F648;SEE-NO-EVIL MONKEY;So;0;ON;;;;;N;;;;;
+ 1F649;HEAR-NO-EVIL MONKEY;So;0;ON;;;;;N;;;;;
+ 1F64A;SPEAK-NO-EVIL MONKEY;So;0;ON;;;;;N;;;;;
+ 1F64B;HAPPY PERSON RAISING ONE HAND;So;0;ON;;;;;N;;;;;
+ 1F64C;PERSON RAISING BOTH HANDS IN CELEBRATION;So;0;ON;;;;;N;;;;;
+ 1F64D;PERSON FROWNING;So;0;ON;;;;;N;;;;;
+ 1F64E;PERSON WITH POUTING FACE;So;0;ON;;;;;N;;;;;
+ 1F64F;PERSON WITH FOLDED HANDS;So;0;ON;;;;;N;;;;;
+ 1F650;NORTH WEST POINTING LEAF;So;0;ON;;;;;N;;;;;
+ 1F651;SOUTH WEST POINTING LEAF;So;0;ON;;;;;N;;;;;
+ 1F652;NORTH EAST POINTING LEAF;So;0;ON;;;;;N;;;;;
+ 1F653;SOUTH EAST POINTING LEAF;So;0;ON;;;;;N;;;;;
+ 1F654;TURNED NORTH WEST POINTING LEAF;So;0;ON;;;;;N;;;;;
+ 1F655;TURNED SOUTH WEST POINTING LEAF;So;0;ON;;;;;N;;;;;
+ 1F656;TURNED NORTH EAST POINTING LEAF;So;0;ON;;;;;N;;;;;
+ 1F657;TURNED SOUTH EAST POINTING LEAF;So;0;ON;;;;;N;;;;;
+ 1F658;NORTH WEST POINTING VINE LEAF;So;0;ON;;;;;N;;;;;
+ 1F659;SOUTH WEST POINTING VINE LEAF;So;0;ON;;;;;N;;;;;
+ 1F65A;NORTH EAST POINTING VINE LEAF;So;0;ON;;;;;N;;;;;
+ 1F65B;SOUTH EAST POINTING VINE LEAF;So;0;ON;;;;;N;;;;;
+ 1F65C;HEAVY NORTH WEST POINTING VINE LEAF;So;0;ON;;;;;N;;;;;
+ 1F65D;HEAVY SOUTH WEST POINTING VINE LEAF;So;0;ON;;;;;N;;;;;
+ 1F65E;HEAVY NORTH EAST POINTING VINE LEAF;So;0;ON;;;;;N;;;;;
+ 1F65F;HEAVY SOUTH EAST POINTING VINE LEAF;So;0;ON;;;;;N;;;;;
+ 1F660;NORTH WEST POINTING BUD;So;0;ON;;;;;N;;;;;
+ 1F661;SOUTH WEST POINTING BUD;So;0;ON;;;;;N;;;;;
+ 1F662;NORTH EAST POINTING BUD;So;0;ON;;;;;N;;;;;
+ 1F663;SOUTH EAST POINTING BUD;So;0;ON;;;;;N;;;;;
+ 1F664;HEAVY NORTH WEST POINTING BUD;So;0;ON;;;;;N;;;;;
+ 1F665;HEAVY SOUTH WEST POINTING BUD;So;0;ON;;;;;N;;;;;
+ 1F666;HEAVY NORTH EAST POINTING BUD;So;0;ON;;;;;N;;;;;
+ 1F667;HEAVY SOUTH EAST POINTING BUD;So;0;ON;;;;;N;;;;;
+ 1F668;HOLLOW QUILT SQUARE ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F669;HOLLOW QUILT SQUARE ORNAMENT IN BLACK SQUARE;So;0;ON;;;;;N;;;;;
+ 1F66A;SOLID QUILT SQUARE ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F66B;SOLID QUILT SQUARE ORNAMENT IN BLACK SQUARE;So;0;ON;;;;;N;;;;;
+ 1F66C;LEFTWARDS ROCKET;So;0;ON;;;;;N;;;;;
+ 1F66D;UPWARDS ROCKET;So;0;ON;;;;;N;;;;;
+ 1F66E;RIGHTWARDS ROCKET;So;0;ON;;;;;N;;;;;
+ 1F66F;DOWNWARDS ROCKET;So;0;ON;;;;;N;;;;;
+ 1F670;SCRIPT LIGATURE ET ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F671;HEAVY SCRIPT LIGATURE ET ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F672;LIGATURE OPEN ET ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F673;HEAVY LIGATURE OPEN ET ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F674;HEAVY AMPERSAND ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F675;SWASH AMPERSAND ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F676;SANS-SERIF HEAVY DOUBLE TURNED COMMA QUOTATION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F677;SANS-SERIF HEAVY DOUBLE COMMA QUOTATION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F678;SANS-SERIF HEAVY LOW DOUBLE COMMA QUOTATION MARK ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F679;HEAVY INTERROBANG ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F67A;SANS-SERIF INTERROBANG ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F67B;HEAVY SANS-SERIF INTERROBANG ORNAMENT;So;0;ON;;;;;N;;;;;
+ 1F67C;VERY HEAVY SOLIDUS;So;0;ON;;;;;N;;;;;
+ 1F67D;VERY HEAVY REVERSE SOLIDUS;So;0;ON;;;;;N;;;;;
+ 1F67E;CHECKER BOARD;So;0;ON;;;;;N;;;;;
+ 1F67F;REVERSE CHECKER BOARD;So;0;ON;;;;;N;;;;;
+ 1F680;ROCKET;So;0;ON;;;;;N;;;;;
+ 1F681;HELICOPTER;So;0;ON;;;;;N;;;;;
+ 1F682;STEAM LOCOMOTIVE;So;0;ON;;;;;N;;;;;
+ 1F683;RAILWAY CAR;So;0;ON;;;;;N;;;;;
+ 1F684;HIGH-SPEED TRAIN;So;0;ON;;;;;N;;;;;
+ 1F685;HIGH-SPEED TRAIN WITH BULLET NOSE;So;0;ON;;;;;N;;;;;
+ 1F686;TRAIN;So;0;ON;;;;;N;;;;;
+ 1F687;METRO;So;0;ON;;;;;N;;;;;
+ 1F688;LIGHT RAIL;So;0;ON;;;;;N;;;;;
+ 1F689;STATION;So;0;ON;;;;;N;;;;;
+ 1F68A;TRAM;So;0;ON;;;;;N;;;;;
+ 1F68B;TRAM CAR;So;0;ON;;;;;N;;;;;
+ 1F68C;BUS;So;0;ON;;;;;N;;;;;
+ 1F68D;ONCOMING BUS;So;0;ON;;;;;N;;;;;
+ 1F68E;TROLLEYBUS;So;0;ON;;;;;N;;;;;
+ 1F68F;BUS STOP;So;0;ON;;;;;N;;;;;
+ 1F690;MINIBUS;So;0;ON;;;;;N;;;;;
+ 1F691;AMBULANCE;So;0;ON;;;;;N;;;;;
+ 1F692;FIRE ENGINE;So;0;ON;;;;;N;;;;;
+ 1F693;POLICE CAR;So;0;ON;;;;;N;;;;;
+ 1F694;ONCOMING POLICE CAR;So;0;ON;;;;;N;;;;;
+ 1F695;TAXI;So;0;ON;;;;;N;;;;;
+ 1F696;ONCOMING TAXI;So;0;ON;;;;;N;;;;;
+ 1F697;AUTOMOBILE;So;0;ON;;;;;N;;;;;
+ 1F698;ONCOMING AUTOMOBILE;So;0;ON;;;;;N;;;;;
+ 1F699;RECREATIONAL VEHICLE;So;0;ON;;;;;N;;;;;
+ 1F69A;DELIVERY TRUCK;So;0;ON;;;;;N;;;;;
+ 1F69B;ARTICULATED LORRY;So;0;ON;;;;;N;;;;;
+ 1F69C;TRACTOR;So;0;ON;;;;;N;;;;;
+ 1F69D;MONORAIL;So;0;ON;;;;;N;;;;;
+ 1F69E;MOUNTAIN RAILWAY;So;0;ON;;;;;N;;;;;
+ 1F69F;SUSPENSION RAILWAY;So;0;ON;;;;;N;;;;;
+ 1F6A0;MOUNTAIN CABLEWAY;So;0;ON;;;;;N;;;;;
+ 1F6A1;AERIAL TRAMWAY;So;0;ON;;;;;N;;;;;
+ 1F6A2;SHIP;So;0;ON;;;;;N;;;;;
+ 1F6A3;ROWBOAT;So;0;ON;;;;;N;;;;;
+ 1F6A4;SPEEDBOAT;So;0;ON;;;;;N;;;;;
+ 1F6A5;HORIZONTAL TRAFFIC LIGHT;So;0;ON;;;;;N;;;;;
+ 1F6A6;VERTICAL TRAFFIC LIGHT;So;0;ON;;;;;N;;;;;
+ 1F6A7;CONSTRUCTION SIGN;So;0;ON;;;;;N;;;;;
+ 1F6A8;POLICE CARS REVOLVING LIGHT;So;0;ON;;;;;N;;;;;
+ 1F6A9;TRIANGULAR FLAG ON POST;So;0;ON;;;;;N;;;;;
+ 1F6AA;DOOR;So;0;ON;;;;;N;;;;;
+ 1F6AB;NO ENTRY SIGN;So;0;ON;;;;;N;;;;;
+ 1F6AC;SMOKING SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F6AD;NO SMOKING SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F6AE;PUT LITTER IN ITS PLACE SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F6AF;DO NOT LITTER SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F6B0;POTABLE WATER SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F6B1;NON-POTABLE WATER SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F6B2;BICYCLE;So;0;ON;;;;;N;;;;;
+ 1F6B3;NO BICYCLES;So;0;ON;;;;;N;;;;;
+ 1F6B4;BICYCLIST;So;0;ON;;;;;N;;;;;
+ 1F6B5;MOUNTAIN BICYCLIST;So;0;ON;;;;;N;;;;;
+ 1F6B6;PEDESTRIAN;So;0;ON;;;;;N;;;;;
+ 1F6B7;NO PEDESTRIANS;So;0;ON;;;;;N;;;;;
+ 1F6B8;CHILDREN CROSSING;So;0;ON;;;;;N;;;;;
+ 1F6B9;MENS SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F6BA;WOMENS SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F6BB;RESTROOM;So;0;ON;;;;;N;;;;;
+ 1F6BC;BABY SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F6BD;TOILET;So;0;ON;;;;;N;;;;;
+ 1F6BE;WATER CLOSET;So;0;ON;;;;;N;;;;;
+ 1F6BF;SHOWER;So;0;ON;;;;;N;;;;;
+ 1F6C0;BATH;So;0;ON;;;;;N;;;;;
+ 1F6C1;BATHTUB;So;0;ON;;;;;N;;;;;
+ 1F6C2;PASSPORT CONTROL;So;0;ON;;;;;N;;;;;
+ 1F6C3;CUSTOMS;So;0;ON;;;;;N;;;;;
+ 1F6C4;BAGGAGE CLAIM;So;0;ON;;;;;N;;;;;
+ 1F6C5;LEFT LUGGAGE;So;0;ON;;;;;N;;;;;
+ 1F6C6;TRIANGLE WITH ROUNDED CORNERS;So;0;ON;;;;;N;;;;;
+ 1F6C7;PROHIBITED SIGN;So;0;ON;;;;;N;;;;;
+ 1F6C8;CIRCLED INFORMATION SOURCE;So;0;ON;;;;;N;;;;;
+ 1F6C9;BOYS SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F6CA;GIRLS SYMBOL;So;0;ON;;;;;N;;;;;
+ 1F6CB;COUCH AND LAMP;So;0;ON;;;;;N;;;;;
+ 1F6CC;SLEEPING ACCOMMODATION;So;0;ON;;;;;N;;;;;
+ 1F6CD;SHOPPING BAGS;So;0;ON;;;;;N;;;;;
+ 1F6CE;BELLHOP BELL;So;0;ON;;;;;N;;;;;
+ 1F6CF;BED;So;0;ON;;;;;N;;;;;
+ 1F6D0;PLACE OF WORSHIP;So;0;ON;;;;;N;;;;;
+ 1F6D1;OCTAGONAL SIGN;So;0;ON;;;;;N;;;;;
+ 1F6D2;SHOPPING TROLLEY;So;0;ON;;;;;N;;;;;
+ 1F6D3;STUPA;So;0;ON;;;;;N;;;;;
+ 1F6D4;PAGODA;So;0;ON;;;;;N;;;;;
+ 1F6D5;HINDU TEMPLE;So;0;ON;;;;;N;;;;;
+ 1F6E0;HAMMER AND WRENCH;So;0;ON;;;;;N;;;;;
+ 1F6E1;SHIELD;So;0;ON;;;;;N;;;;;
+ 1F6E2;OIL DRUM;So;0;ON;;;;;N;;;;;
+ 1F6E3;MOTORWAY;So;0;ON;;;;;N;;;;;
+ 1F6E4;RAILWAY TRACK;So;0;ON;;;;;N;;;;;
+ 1F6E5;MOTOR BOAT;So;0;ON;;;;;N;;;;;
+ 1F6E6;UP-POINTING MILITARY AIRPLANE;So;0;ON;;;;;N;;;;;
+ 1F6E7;UP-POINTING AIRPLANE;So;0;ON;;;;;N;;;;;
+ 1F6E8;UP-POINTING SMALL AIRPLANE;So;0;ON;;;;;N;;;;;
+ 1F6E9;SMALL AIRPLANE;So;0;ON;;;;;N;;;;;
+ 1F6EA;NORTHEAST-POINTING AIRPLANE;So;0;ON;;;;;N;;;;;
+ 1F6EB;AIRPLANE DEPARTURE;So;0;ON;;;;;N;;;;;
+ 1F6EC;AIRPLANE ARRIVING;So;0;ON;;;;;N;;;;;
+ 1F6F0;SATELLITE;So;0;ON;;;;;N;;;;;
+ 1F6F1;ONCOMING FIRE ENGINE;So;0;ON;;;;;N;;;;;
+ 1F6F2;DIESEL LOCOMOTIVE;So;0;ON;;;;;N;;;;;
+ 1F6F3;PASSENGER SHIP;So;0;ON;;;;;N;;;;;
+ 1F6F4;SCOOTER;So;0;ON;;;;;N;;;;;
+ 1F6F5;MOTOR SCOOTER;So;0;ON;;;;;N;;;;;
+ 1F6F6;CANOE;So;0;ON;;;;;N;;;;;
+ 1F6F7;SLED;So;0;ON;;;;;N;;;;;
+ 1F6F8;FLYING SAUCER;So;0;ON;;;;;N;;;;;
+ 1F6F9;SKATEBOARD;So;0;ON;;;;;N;;;;;
+ 1F6FA;AUTO RICKSHAW;So;0;ON;;;;;N;;;;;
+ 1F700;ALCHEMICAL SYMBOL FOR QUINTESSENCE;So;0;ON;;;;;N;;;;;
+ 1F701;ALCHEMICAL SYMBOL FOR AIR;So;0;ON;;;;;N;;;;;
+ 1F702;ALCHEMICAL SYMBOL FOR FIRE;So;0;ON;;;;;N;;;;;
+ 1F703;ALCHEMICAL SYMBOL FOR EARTH;So;0;ON;;;;;N;;;;;
+ 1F704;ALCHEMICAL SYMBOL FOR WATER;So;0;ON;;;;;N;;;;;
+ 1F705;ALCHEMICAL SYMBOL FOR AQUAFORTIS;So;0;ON;;;;;N;;;;;
+ 1F706;ALCHEMICAL SYMBOL FOR AQUA REGIA;So;0;ON;;;;;N;;;;;
+ 1F707;ALCHEMICAL SYMBOL FOR AQUA REGIA-2;So;0;ON;;;;;N;;;;;
+ 1F708;ALCHEMICAL SYMBOL FOR AQUA VITAE;So;0;ON;;;;;N;;;;;
+ 1F709;ALCHEMICAL SYMBOL FOR AQUA VITAE-2;So;0;ON;;;;;N;;;;;
+ 1F70A;ALCHEMICAL SYMBOL FOR VINEGAR;So;0;ON;;;;;N;;;;;
+ 1F70B;ALCHEMICAL SYMBOL FOR VINEGAR-2;So;0;ON;;;;;N;;;;;
+ 1F70C;ALCHEMICAL SYMBOL FOR VINEGAR-3;So;0;ON;;;;;N;;;;;
+ 1F70D;ALCHEMICAL SYMBOL FOR SULFUR;So;0;ON;;;;;N;;;;;
+ 1F70E;ALCHEMICAL SYMBOL FOR PHILOSOPHERS SULFUR;So;0;ON;;;;;N;;;;;
+ 1F70F;ALCHEMICAL SYMBOL FOR BLACK SULFUR;So;0;ON;;;;;N;;;;;
+ 1F710;ALCHEMICAL SYMBOL FOR MERCURY SUBLIMATE;So;0;ON;;;;;N;;;;;
+ 1F711;ALCHEMICAL SYMBOL FOR MERCURY SUBLIMATE-2;So;0;ON;;;;;N;;;;;
+ 1F712;ALCHEMICAL SYMBOL FOR MERCURY SUBLIMATE-3;So;0;ON;;;;;N;;;;;
+ 1F713;ALCHEMICAL SYMBOL FOR CINNABAR;So;0;ON;;;;;N;;;;;
+ 1F714;ALCHEMICAL SYMBOL FOR SALT;So;0;ON;;;;;N;;;;;
+ 1F715;ALCHEMICAL SYMBOL FOR NITRE;So;0;ON;;;;;N;;;;;
+ 1F716;ALCHEMICAL SYMBOL FOR VITRIOL;So;0;ON;;;;;N;;;;;
+ 1F717;ALCHEMICAL SYMBOL FOR VITRIOL-2;So;0;ON;;;;;N;;;;;
+ 1F718;ALCHEMICAL SYMBOL FOR ROCK SALT;So;0;ON;;;;;N;;;;;
+ 1F719;ALCHEMICAL SYMBOL FOR ROCK SALT-2;So;0;ON;;;;;N;;;;;
+ 1F71A;ALCHEMICAL SYMBOL FOR GOLD;So;0;ON;;;;;N;;;;;
+ 1F71B;ALCHEMICAL SYMBOL FOR SILVER;So;0;ON;;;;;N;;;;;
+ 1F71C;ALCHEMICAL SYMBOL FOR IRON ORE;So;0;ON;;;;;N;;;;;
+ 1F71D;ALCHEMICAL SYMBOL FOR IRON ORE-2;So;0;ON;;;;;N;;;;;
+ 1F71E;ALCHEMICAL SYMBOL FOR CROCUS OF IRON;So;0;ON;;;;;N;;;;;
+ 1F71F;ALCHEMICAL SYMBOL FOR REGULUS OF IRON;So;0;ON;;;;;N;;;;;
+ 1F720;ALCHEMICAL SYMBOL FOR COPPER ORE;So;0;ON;;;;;N;;;;;
+ 1F721;ALCHEMICAL SYMBOL FOR IRON-COPPER ORE;So;0;ON;;;;;N;;;;;
+ 1F722;ALCHEMICAL SYMBOL FOR SUBLIMATE OF COPPER;So;0;ON;;;;;N;;;;;
+ 1F723;ALCHEMICAL SYMBOL FOR CROCUS OF COPPER;So;0;ON;;;;;N;;;;;
+ 1F724;ALCHEMICAL SYMBOL FOR CROCUS OF COPPER-2;So;0;ON;;;;;N;;;;;
+ 1F725;ALCHEMICAL SYMBOL FOR COPPER ANTIMONIATE;So;0;ON;;;;;N;;;;;
+ 1F726;ALCHEMICAL SYMBOL FOR SALT OF COPPER ANTIMONIATE;So;0;ON;;;;;N;;;;;
+ 1F727;ALCHEMICAL SYMBOL FOR SUBLIMATE OF SALT OF COPPER;So;0;ON;;;;;N;;;;;
+ 1F728;ALCHEMICAL SYMBOL FOR VERDIGRIS;So;0;ON;;;;;N;;;;;
+ 1F729;ALCHEMICAL SYMBOL FOR TIN ORE;So;0;ON;;;;;N;;;;;
+ 1F72A;ALCHEMICAL SYMBOL FOR LEAD ORE;So;0;ON;;;;;N;;;;;
+ 1F72B;ALCHEMICAL SYMBOL FOR ANTIMONY ORE;So;0;ON;;;;;N;;;;;
+ 1F72C;ALCHEMICAL SYMBOL FOR SUBLIMATE OF ANTIMONY;So;0;ON;;;;;N;;;;;
+ 1F72D;ALCHEMICAL SYMBOL FOR SALT OF ANTIMONY;So;0;ON;;;;;N;;;;;
+ 1F72E;ALCHEMICAL SYMBOL FOR SUBLIMATE OF SALT OF ANTIMONY;So;0;ON;;;;;N;;;;;
+ 1F72F;ALCHEMICAL SYMBOL FOR VINEGAR OF ANTIMONY;So;0;ON;;;;;N;;;;;
+ 1F730;ALCHEMICAL SYMBOL FOR REGULUS OF ANTIMONY;So;0;ON;;;;;N;;;;;
+ 1F731;ALCHEMICAL SYMBOL FOR REGULUS OF ANTIMONY-2;So;0;ON;;;;;N;;;;;
+ 1F732;ALCHEMICAL SYMBOL FOR REGULUS;So;0;ON;;;;;N;;;;;
+ 1F733;ALCHEMICAL SYMBOL FOR REGULUS-2;So;0;ON;;;;;N;;;;;
+ 1F734;ALCHEMICAL SYMBOL FOR REGULUS-3;So;0;ON;;;;;N;;;;;
+ 1F735;ALCHEMICAL SYMBOL FOR REGULUS-4;So;0;ON;;;;;N;;;;;
+ 1F736;ALCHEMICAL SYMBOL FOR ALKALI;So;0;ON;;;;;N;;;;;
+ 1F737;ALCHEMICAL SYMBOL FOR ALKALI-2;So;0;ON;;;;;N;;;;;
+ 1F738;ALCHEMICAL SYMBOL FOR MARCASITE;So;0;ON;;;;;N;;;;;
+ 1F739;ALCHEMICAL SYMBOL FOR SAL-AMMONIAC;So;0;ON;;;;;N;;;;;
+ 1F73A;ALCHEMICAL SYMBOL FOR ARSENIC;So;0;ON;;;;;N;;;;;
+ 1F73B;ALCHEMICAL SYMBOL FOR REALGAR;So;0;ON;;;;;N;;;;;
+ 1F73C;ALCHEMICAL SYMBOL FOR REALGAR-2;So;0;ON;;;;;N;;;;;
+ 1F73D;ALCHEMICAL SYMBOL FOR AURIPIGMENT;So;0;ON;;;;;N;;;;;
+ 1F73E;ALCHEMICAL SYMBOL FOR BISMUTH ORE;So;0;ON;;;;;N;;;;;
+ 1F73F;ALCHEMICAL SYMBOL FOR TARTAR;So;0;ON;;;;;N;;;;;
+ 1F740;ALCHEMICAL SYMBOL FOR TARTAR-2;So;0;ON;;;;;N;;;;;
+ 1F741;ALCHEMICAL SYMBOL FOR QUICK LIME;So;0;ON;;;;;N;;;;;
+ 1F742;ALCHEMICAL SYMBOL FOR BORAX;So;0;ON;;;;;N;;;;;
+ 1F743;ALCHEMICAL SYMBOL FOR BORAX-2;So;0;ON;;;;;N;;;;;
+ 1F744;ALCHEMICAL SYMBOL FOR BORAX-3;So;0;ON;;;;;N;;;;;
+ 1F745;ALCHEMICAL SYMBOL FOR ALUM;So;0;ON;;;;;N;;;;;
+ 1F746;ALCHEMICAL SYMBOL FOR OIL;So;0;ON;;;;;N;;;;;
+ 1F747;ALCHEMICAL SYMBOL FOR SPIRIT;So;0;ON;;;;;N;;;;;
+ 1F748;ALCHEMICAL SYMBOL FOR TINCTURE;So;0;ON;;;;;N;;;;;
+ 1F749;ALCHEMICAL SYMBOL FOR GUM;So;0;ON;;;;;N;;;;;
+ 1F74A;ALCHEMICAL SYMBOL FOR WAX;So;0;ON;;;;;N;;;;;
+ 1F74B;ALCHEMICAL SYMBOL FOR POWDER;So;0;ON;;;;;N;;;;;
+ 1F74C;ALCHEMICAL SYMBOL FOR CALX;So;0;ON;;;;;N;;;;;
+ 1F74D;ALCHEMICAL SYMBOL FOR TUTTY;So;0;ON;;;;;N;;;;;
+ 1F74E;ALCHEMICAL SYMBOL FOR CAPUT MORTUUM;So;0;ON;;;;;N;;;;;
+ 1F74F;ALCHEMICAL SYMBOL FOR SCEPTER OF JOVE;So;0;ON;;;;;N;;;;;
+ 1F750;ALCHEMICAL SYMBOL FOR CADUCEUS;So;0;ON;;;;;N;;;;;
+ 1F751;ALCHEMICAL SYMBOL FOR TRIDENT;So;0;ON;;;;;N;;;;;
+ 1F752;ALCHEMICAL SYMBOL FOR STARRED TRIDENT;So;0;ON;;;;;N;;;;;
+ 1F753;ALCHEMICAL SYMBOL FOR LODESTONE;So;0;ON;;;;;N;;;;;
+ 1F754;ALCHEMICAL SYMBOL FOR SOAP;So;0;ON;;;;;N;;;;;
+ 1F755;ALCHEMICAL SYMBOL FOR URINE;So;0;ON;;;;;N;;;;;
+ 1F756;ALCHEMICAL SYMBOL FOR HORSE DUNG;So;0;ON;;;;;N;;;;;
+ 1F757;ALCHEMICAL SYMBOL FOR ASHES;So;0;ON;;;;;N;;;;;
+ 1F758;ALCHEMICAL SYMBOL FOR POT ASHES;So;0;ON;;;;;N;;;;;
+ 1F759;ALCHEMICAL SYMBOL FOR BRICK;So;0;ON;;;;;N;;;;;
+ 1F75A;ALCHEMICAL SYMBOL FOR POWDERED BRICK;So;0;ON;;;;;N;;;;;
+ 1F75B;ALCHEMICAL SYMBOL FOR AMALGAM;So;0;ON;;;;;N;;;;;
+ 1F75C;ALCHEMICAL SYMBOL FOR STRATUM SUPER STRATUM;So;0;ON;;;;;N;;;;;
+ 1F75D;ALCHEMICAL SYMBOL FOR STRATUM SUPER STRATUM-2;So;0;ON;;;;;N;;;;;
+ 1F75E;ALCHEMICAL SYMBOL FOR SUBLIMATION;So;0;ON;;;;;N;;;;;
+ 1F75F;ALCHEMICAL SYMBOL FOR PRECIPITATE;So;0;ON;;;;;N;;;;;
+ 1F760;ALCHEMICAL SYMBOL FOR DISTILL;So;0;ON;;;;;N;;;;;
+ 1F761;ALCHEMICAL SYMBOL FOR DISSOLVE;So;0;ON;;;;;N;;;;;
+ 1F762;ALCHEMICAL SYMBOL FOR DISSOLVE-2;So;0;ON;;;;;N;;;;;
+ 1F763;ALCHEMICAL SYMBOL FOR PURIFY;So;0;ON;;;;;N;;;;;
+ 1F764;ALCHEMICAL SYMBOL FOR PUTREFACTION;So;0;ON;;;;;N;;;;;
+ 1F765;ALCHEMICAL SYMBOL FOR CRUCIBLE;So;0;ON;;;;;N;;;;;
+ 1F766;ALCHEMICAL SYMBOL FOR CRUCIBLE-2;So;0;ON;;;;;N;;;;;
+ 1F767;ALCHEMICAL SYMBOL FOR CRUCIBLE-3;So;0;ON;;;;;N;;;;;
+ 1F768;ALCHEMICAL SYMBOL FOR CRUCIBLE-4;So;0;ON;;;;;N;;;;;
+ 1F769;ALCHEMICAL SYMBOL FOR CRUCIBLE-5;So;0;ON;;;;;N;;;;;
+ 1F76A;ALCHEMICAL SYMBOL FOR ALEMBIC;So;0;ON;;;;;N;;;;;
+ 1F76B;ALCHEMICAL SYMBOL FOR BATH OF MARY;So;0;ON;;;;;N;;;;;
+ 1F76C;ALCHEMICAL SYMBOL FOR BATH OF VAPOURS;So;0;ON;;;;;N;;;;;
+ 1F76D;ALCHEMICAL SYMBOL FOR RETORT;So;0;ON;;;;;N;;;;;
+ 1F76E;ALCHEMICAL SYMBOL FOR HOUR;So;0;ON;;;;;N;;;;;
+ 1F76F;ALCHEMICAL SYMBOL FOR NIGHT;So;0;ON;;;;;N;;;;;
+ 1F770;ALCHEMICAL SYMBOL FOR DAY-NIGHT;So;0;ON;;;;;N;;;;;
+ 1F771;ALCHEMICAL SYMBOL FOR MONTH;So;0;ON;;;;;N;;;;;
+ 1F772;ALCHEMICAL SYMBOL FOR HALF DRAM;So;0;ON;;;;;N;;;;;
+ 1F773;ALCHEMICAL SYMBOL FOR HALF OUNCE;So;0;ON;;;;;N;;;;;
+ 1F780;BLACK LEFT-POINTING ISOSCELES RIGHT TRIANGLE;So;0;ON;;;;;N;;;;;
+ 1F781;BLACK UP-POINTING ISOSCELES RIGHT TRIANGLE;So;0;ON;;;;;N;;;;;
+ 1F782;BLACK RIGHT-POINTING ISOSCELES RIGHT TRIANGLE;So;0;ON;;;;;N;;;;;
+ 1F783;BLACK DOWN-POINTING ISOSCELES RIGHT TRIANGLE;So;0;ON;;;;;N;;;;;
+ 1F784;BLACK SLIGHTLY SMALL CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F785;MEDIUM BOLD WHITE CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F786;BOLD WHITE CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F787;HEAVY WHITE CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F788;VERY HEAVY WHITE CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F789;EXTREMELY HEAVY WHITE CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F78A;WHITE CIRCLE CONTAINING BLACK SMALL CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F78B;ROUND TARGET;So;0;ON;;;;;N;;;;;
+ 1F78C;BLACK TINY SQUARE;So;0;ON;;;;;N;;;;;
+ 1F78D;BLACK SLIGHTLY SMALL SQUARE;So;0;ON;;;;;N;;;;;
+ 1F78E;LIGHT WHITE SQUARE;So;0;ON;;;;;N;;;;;
+ 1F78F;MEDIUM WHITE SQUARE;So;0;ON;;;;;N;;;;;
+ 1F790;BOLD WHITE SQUARE;So;0;ON;;;;;N;;;;;
+ 1F791;HEAVY WHITE SQUARE;So;0;ON;;;;;N;;;;;
+ 1F792;VERY HEAVY WHITE SQUARE;So;0;ON;;;;;N;;;;;
+ 1F793;EXTREMELY HEAVY WHITE SQUARE;So;0;ON;;;;;N;;;;;
+ 1F794;WHITE SQUARE CONTAINING BLACK VERY SMALL SQUARE;So;0;ON;;;;;N;;;;;
+ 1F795;WHITE SQUARE CONTAINING BLACK MEDIUM SQUARE;So;0;ON;;;;;N;;;;;
+ 1F796;SQUARE TARGET;So;0;ON;;;;;N;;;;;
+ 1F797;BLACK TINY DIAMOND;So;0;ON;;;;;N;;;;;
+ 1F798;BLACK VERY SMALL DIAMOND;So;0;ON;;;;;N;;;;;
+ 1F799;BLACK MEDIUM SMALL DIAMOND;So;0;ON;;;;;N;;;;;
+ 1F79A;WHITE DIAMOND CONTAINING BLACK VERY SMALL DIAMOND;So;0;ON;;;;;N;;;;;
+ 1F79B;WHITE DIAMOND CONTAINING BLACK MEDIUM DIAMOND;So;0;ON;;;;;N;;;;;
+ 1F79C;DIAMOND TARGET;So;0;ON;;;;;N;;;;;
+ 1F79D;BLACK TINY LOZENGE;So;0;ON;;;;;N;;;;;
+ 1F79E;BLACK VERY SMALL LOZENGE;So;0;ON;;;;;N;;;;;
+ 1F79F;BLACK MEDIUM SMALL LOZENGE;So;0;ON;;;;;N;;;;;
+ 1F7A0;WHITE LOZENGE CONTAINING BLACK SMALL LOZENGE;So;0;ON;;;;;N;;;;;
+ 1F7A1;THIN GREEK CROSS;So;0;ON;;;;;N;;;;;
+ 1F7A2;LIGHT GREEK CROSS;So;0;ON;;;;;N;;;;;
+ 1F7A3;MEDIUM GREEK CROSS;So;0;ON;;;;;N;;;;;
+ 1F7A4;BOLD GREEK CROSS;So;0;ON;;;;;N;;;;;
+ 1F7A5;VERY BOLD GREEK CROSS;So;0;ON;;;;;N;;;;;
+ 1F7A6;VERY HEAVY GREEK CROSS;So;0;ON;;;;;N;;;;;
+ 1F7A7;EXTREMELY HEAVY GREEK CROSS;So;0;ON;;;;;N;;;;;
+ 1F7A8;THIN SALTIRE;So;0;ON;;;;;N;;;;;
+ 1F7A9;LIGHT SALTIRE;So;0;ON;;;;;N;;;;;
+ 1F7AA;MEDIUM SALTIRE;So;0;ON;;;;;N;;;;;
+ 1F7AB;BOLD SALTIRE;So;0;ON;;;;;N;;;;;
+ 1F7AC;HEAVY SALTIRE;So;0;ON;;;;;N;;;;;
+ 1F7AD;VERY HEAVY SALTIRE;So;0;ON;;;;;N;;;;;
+ 1F7AE;EXTREMELY HEAVY SALTIRE;So;0;ON;;;;;N;;;;;
+ 1F7AF;LIGHT FIVE SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7B0;MEDIUM FIVE SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7B1;BOLD FIVE SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7B2;HEAVY FIVE SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7B3;VERY HEAVY FIVE SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7B4;EXTREMELY HEAVY FIVE SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7B5;LIGHT SIX SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7B6;MEDIUM SIX SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7B7;BOLD SIX SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7B8;HEAVY SIX SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7B9;VERY HEAVY SIX SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7BA;EXTREMELY HEAVY SIX SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7BB;LIGHT EIGHT SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7BC;MEDIUM EIGHT SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7BD;BOLD EIGHT SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7BE;HEAVY EIGHT SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7BF;VERY HEAVY EIGHT SPOKED ASTERISK;So;0;ON;;;;;N;;;;;
+ 1F7C0;LIGHT THREE POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7C1;MEDIUM THREE POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7C2;THREE POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7C3;MEDIUM THREE POINTED PINWHEEL STAR;So;0;ON;;;;;N;;;;;
+ 1F7C4;LIGHT FOUR POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7C5;MEDIUM FOUR POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7C6;FOUR POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7C7;MEDIUM FOUR POINTED PINWHEEL STAR;So;0;ON;;;;;N;;;;;
+ 1F7C8;REVERSE LIGHT FOUR POINTED PINWHEEL STAR;So;0;ON;;;;;N;;;;;
+ 1F7C9;LIGHT FIVE POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7CA;HEAVY FIVE POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7CB;MEDIUM SIX POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7CC;HEAVY SIX POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7CD;SIX POINTED PINWHEEL STAR;So;0;ON;;;;;N;;;;;
+ 1F7CE;MEDIUM EIGHT POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7CF;HEAVY EIGHT POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7D0;VERY HEAVY EIGHT POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7D1;HEAVY EIGHT POINTED PINWHEEL STAR;So;0;ON;;;;;N;;;;;
+ 1F7D2;LIGHT TWELVE POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7D3;HEAVY TWELVE POINTED BLACK STAR;So;0;ON;;;;;N;;;;;
+ 1F7D4;HEAVY TWELVE POINTED PINWHEEL STAR;So;0;ON;;;;;N;;;;;
+ 1F7D5;CIRCLED TRIANGLE;So;0;ON;;;;;N;;;;;
+ 1F7D6;NEGATIVE CIRCLED TRIANGLE;So;0;ON;;;;;N;;;;;
+ 1F7D7;CIRCLED SQUARE;So;0;ON;;;;;N;;;;;
+ 1F7D8;NEGATIVE CIRCLED SQUARE;So;0;ON;;;;;N;;;;;
+ 1F7E0;LARGE ORANGE CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F7E1;LARGE YELLOW CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F7E2;LARGE GREEN CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F7E3;LARGE PURPLE CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F7E4;LARGE BROWN CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F7E5;LARGE RED SQUARE;So;0;ON;;;;;N;;;;;
+ 1F7E6;LARGE BLUE SQUARE;So;0;ON;;;;;N;;;;;
+ 1F7E7;LARGE ORANGE SQUARE;So;0;ON;;;;;N;;;;;
+ 1F7E8;LARGE YELLOW SQUARE;So;0;ON;;;;;N;;;;;
+ 1F7E9;LARGE GREEN SQUARE;So;0;ON;;;;;N;;;;;
+ 1F7EA;LARGE PURPLE SQUARE;So;0;ON;;;;;N;;;;;
+ 1F7EB;LARGE BROWN SQUARE;So;0;ON;;;;;N;;;;;
+ 1F800;LEFTWARDS ARROW WITH SMALL TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F801;UPWARDS ARROW WITH SMALL TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F802;RIGHTWARDS ARROW WITH SMALL TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F803;DOWNWARDS ARROW WITH SMALL TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F804;LEFTWARDS ARROW WITH MEDIUM TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F805;UPWARDS ARROW WITH MEDIUM TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F806;RIGHTWARDS ARROW WITH MEDIUM TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F807;DOWNWARDS ARROW WITH MEDIUM TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F808;LEFTWARDS ARROW WITH LARGE TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F809;UPWARDS ARROW WITH LARGE TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F80A;RIGHTWARDS ARROW WITH LARGE TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F80B;DOWNWARDS ARROW WITH LARGE TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F810;LEFTWARDS ARROW WITH SMALL EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F811;UPWARDS ARROW WITH SMALL EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F812;RIGHTWARDS ARROW WITH SMALL EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F813;DOWNWARDS ARROW WITH SMALL EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F814;LEFTWARDS ARROW WITH EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F815;UPWARDS ARROW WITH EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F816;RIGHTWARDS ARROW WITH EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F817;DOWNWARDS ARROW WITH EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F818;HEAVY LEFTWARDS ARROW WITH EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F819;HEAVY UPWARDS ARROW WITH EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F81A;HEAVY RIGHTWARDS ARROW WITH EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F81B;HEAVY DOWNWARDS ARROW WITH EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F81C;HEAVY LEFTWARDS ARROW WITH LARGE EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F81D;HEAVY UPWARDS ARROW WITH LARGE EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F81E;HEAVY RIGHTWARDS ARROW WITH LARGE EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F81F;HEAVY DOWNWARDS ARROW WITH LARGE EQUILATERAL ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F820;LEFTWARDS TRIANGLE-HEADED ARROW WITH NARROW SHAFT;So;0;ON;;;;;N;;;;;
+ 1F821;UPWARDS TRIANGLE-HEADED ARROW WITH NARROW SHAFT;So;0;ON;;;;;N;;;;;
+ 1F822;RIGHTWARDS TRIANGLE-HEADED ARROW WITH NARROW SHAFT;So;0;ON;;;;;N;;;;;
+ 1F823;DOWNWARDS TRIANGLE-HEADED ARROW WITH NARROW SHAFT;So;0;ON;;;;;N;;;;;
+ 1F824;LEFTWARDS TRIANGLE-HEADED ARROW WITH MEDIUM SHAFT;So;0;ON;;;;;N;;;;;
+ 1F825;UPWARDS TRIANGLE-HEADED ARROW WITH MEDIUM SHAFT;So;0;ON;;;;;N;;;;;
+ 1F826;RIGHTWARDS TRIANGLE-HEADED ARROW WITH MEDIUM SHAFT;So;0;ON;;;;;N;;;;;
+ 1F827;DOWNWARDS TRIANGLE-HEADED ARROW WITH MEDIUM SHAFT;So;0;ON;;;;;N;;;;;
+ 1F828;LEFTWARDS TRIANGLE-HEADED ARROW WITH BOLD SHAFT;So;0;ON;;;;;N;;;;;
+ 1F829;UPWARDS TRIANGLE-HEADED ARROW WITH BOLD SHAFT;So;0;ON;;;;;N;;;;;
+ 1F82A;RIGHTWARDS TRIANGLE-HEADED ARROW WITH BOLD SHAFT;So;0;ON;;;;;N;;;;;
+ 1F82B;DOWNWARDS TRIANGLE-HEADED ARROW WITH BOLD SHAFT;So;0;ON;;;;;N;;;;;
+ 1F82C;LEFTWARDS TRIANGLE-HEADED ARROW WITH HEAVY SHAFT;So;0;ON;;;;;N;;;;;
+ 1F82D;UPWARDS TRIANGLE-HEADED ARROW WITH HEAVY SHAFT;So;0;ON;;;;;N;;;;;
+ 1F82E;RIGHTWARDS TRIANGLE-HEADED ARROW WITH HEAVY SHAFT;So;0;ON;;;;;N;;;;;
+ 1F82F;DOWNWARDS TRIANGLE-HEADED ARROW WITH HEAVY SHAFT;So;0;ON;;;;;N;;;;;
+ 1F830;LEFTWARDS TRIANGLE-HEADED ARROW WITH VERY HEAVY SHAFT;So;0;ON;;;;;N;;;;;
+ 1F831;UPWARDS TRIANGLE-HEADED ARROW WITH VERY HEAVY SHAFT;So;0;ON;;;;;N;;;;;
+ 1F832;RIGHTWARDS TRIANGLE-HEADED ARROW WITH VERY HEAVY SHAFT;So;0;ON;;;;;N;;;;;
+ 1F833;DOWNWARDS TRIANGLE-HEADED ARROW WITH VERY HEAVY SHAFT;So;0;ON;;;;;N;;;;;
+ 1F834;LEFTWARDS FINGER-POST ARROW;So;0;ON;;;;;N;;;;;
+ 1F835;UPWARDS FINGER-POST ARROW;So;0;ON;;;;;N;;;;;
+ 1F836;RIGHTWARDS FINGER-POST ARROW;So;0;ON;;;;;N;;;;;
+ 1F837;DOWNWARDS FINGER-POST ARROW;So;0;ON;;;;;N;;;;;
+ 1F838;LEFTWARDS SQUARED ARROW;So;0;ON;;;;;N;;;;;
+ 1F839;UPWARDS SQUARED ARROW;So;0;ON;;;;;N;;;;;
+ 1F83A;RIGHTWARDS SQUARED ARROW;So;0;ON;;;;;N;;;;;
+ 1F83B;DOWNWARDS SQUARED ARROW;So;0;ON;;;;;N;;;;;
+ 1F83C;LEFTWARDS COMPRESSED ARROW;So;0;ON;;;;;N;;;;;
+ 1F83D;UPWARDS COMPRESSED ARROW;So;0;ON;;;;;N;;;;;
+ 1F83E;RIGHTWARDS COMPRESSED ARROW;So;0;ON;;;;;N;;;;;
+ 1F83F;DOWNWARDS COMPRESSED ARROW;So;0;ON;;;;;N;;;;;
+ 1F840;LEFTWARDS HEAVY COMPRESSED ARROW;So;0;ON;;;;;N;;;;;
+ 1F841;UPWARDS HEAVY COMPRESSED ARROW;So;0;ON;;;;;N;;;;;
+ 1F842;RIGHTWARDS HEAVY COMPRESSED ARROW;So;0;ON;;;;;N;;;;;
+ 1F843;DOWNWARDS HEAVY COMPRESSED ARROW;So;0;ON;;;;;N;;;;;
+ 1F844;LEFTWARDS HEAVY ARROW;So;0;ON;;;;;N;;;;;
+ 1F845;UPWARDS HEAVY ARROW;So;0;ON;;;;;N;;;;;
+ 1F846;RIGHTWARDS HEAVY ARROW;So;0;ON;;;;;N;;;;;
+ 1F847;DOWNWARDS HEAVY ARROW;So;0;ON;;;;;N;;;;;
+ 1F850;LEFTWARDS SANS-SERIF ARROW;So;0;ON;;;;;N;;;;;
+ 1F851;UPWARDS SANS-SERIF ARROW;So;0;ON;;;;;N;;;;;
+ 1F852;RIGHTWARDS SANS-SERIF ARROW;So;0;ON;;;;;N;;;;;
+ 1F853;DOWNWARDS SANS-SERIF ARROW;So;0;ON;;;;;N;;;;;
+ 1F854;NORTH WEST SANS-SERIF ARROW;So;0;ON;;;;;N;;;;;
+ 1F855;NORTH EAST SANS-SERIF ARROW;So;0;ON;;;;;N;;;;;
+ 1F856;SOUTH EAST SANS-SERIF ARROW;So;0;ON;;;;;N;;;;;
+ 1F857;SOUTH WEST SANS-SERIF ARROW;So;0;ON;;;;;N;;;;;
+ 1F858;LEFT RIGHT SANS-SERIF ARROW;So;0;ON;;;;;N;;;;;
+ 1F859;UP DOWN SANS-SERIF ARROW;So;0;ON;;;;;N;;;;;
+ 1F860;WIDE-HEADED LEFTWARDS LIGHT BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F861;WIDE-HEADED UPWARDS LIGHT BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F862;WIDE-HEADED RIGHTWARDS LIGHT BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F863;WIDE-HEADED DOWNWARDS LIGHT BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F864;WIDE-HEADED NORTH WEST LIGHT BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F865;WIDE-HEADED NORTH EAST LIGHT BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F866;WIDE-HEADED SOUTH EAST LIGHT BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F867;WIDE-HEADED SOUTH WEST LIGHT BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F868;WIDE-HEADED LEFTWARDS BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F869;WIDE-HEADED UPWARDS BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F86A;WIDE-HEADED RIGHTWARDS BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F86B;WIDE-HEADED DOWNWARDS BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F86C;WIDE-HEADED NORTH WEST BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F86D;WIDE-HEADED NORTH EAST BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F86E;WIDE-HEADED SOUTH EAST BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F86F;WIDE-HEADED SOUTH WEST BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F870;WIDE-HEADED LEFTWARDS MEDIUM BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F871;WIDE-HEADED UPWARDS MEDIUM BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F872;WIDE-HEADED RIGHTWARDS MEDIUM BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F873;WIDE-HEADED DOWNWARDS MEDIUM BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F874;WIDE-HEADED NORTH WEST MEDIUM BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F875;WIDE-HEADED NORTH EAST MEDIUM BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F876;WIDE-HEADED SOUTH EAST MEDIUM BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F877;WIDE-HEADED SOUTH WEST MEDIUM BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F878;WIDE-HEADED LEFTWARDS HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F879;WIDE-HEADED UPWARDS HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F87A;WIDE-HEADED RIGHTWARDS HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F87B;WIDE-HEADED DOWNWARDS HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F87C;WIDE-HEADED NORTH WEST HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F87D;WIDE-HEADED NORTH EAST HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F87E;WIDE-HEADED SOUTH EAST HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F87F;WIDE-HEADED SOUTH WEST HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F880;WIDE-HEADED LEFTWARDS VERY HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F881;WIDE-HEADED UPWARDS VERY HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F882;WIDE-HEADED RIGHTWARDS VERY HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F883;WIDE-HEADED DOWNWARDS VERY HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F884;WIDE-HEADED NORTH WEST VERY HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F885;WIDE-HEADED NORTH EAST VERY HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F886;WIDE-HEADED SOUTH EAST VERY HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F887;WIDE-HEADED SOUTH WEST VERY HEAVY BARB ARROW;So;0;ON;;;;;N;;;;;
+ 1F890;LEFTWARDS TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F891;UPWARDS TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F892;RIGHTWARDS TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F893;DOWNWARDS TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F894;LEFTWARDS WHITE ARROW WITHIN TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F895;UPWARDS WHITE ARROW WITHIN TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F896;RIGHTWARDS WHITE ARROW WITHIN TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F897;DOWNWARDS WHITE ARROW WITHIN TRIANGLE ARROWHEAD;So;0;ON;;;;;N;;;;;
+ 1F898;LEFTWARDS ARROW WITH NOTCHED TAIL;So;0;ON;;;;;N;;;;;
+ 1F899;UPWARDS ARROW WITH NOTCHED TAIL;So;0;ON;;;;;N;;;;;
+ 1F89A;RIGHTWARDS ARROW WITH NOTCHED TAIL;So;0;ON;;;;;N;;;;;
+ 1F89B;DOWNWARDS ARROW WITH NOTCHED TAIL;So;0;ON;;;;;N;;;;;
+ 1F89C;HEAVY ARROW SHAFT WIDTH ONE;So;0;ON;;;;;N;;;;;
+ 1F89D;HEAVY ARROW SHAFT WIDTH TWO THIRDS;So;0;ON;;;;;N;;;;;
+ 1F89E;HEAVY ARROW SHAFT WIDTH ONE HALF;So;0;ON;;;;;N;;;;;
+ 1F89F;HEAVY ARROW SHAFT WIDTH ONE THIRD;So;0;ON;;;;;N;;;;;
+ 1F8A0;LEFTWARDS BOTTOM-SHADED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 1F8A1;RIGHTWARDS BOTTOM SHADED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 1F8A2;LEFTWARDS TOP SHADED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 1F8A3;RIGHTWARDS TOP SHADED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 1F8A4;LEFTWARDS LEFT-SHADED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 1F8A5;RIGHTWARDS RIGHT-SHADED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 1F8A6;LEFTWARDS RIGHT-SHADED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 1F8A7;RIGHTWARDS LEFT-SHADED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 1F8A8;LEFTWARDS BACK-TILTED SHADOWED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 1F8A9;RIGHTWARDS BACK-TILTED SHADOWED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 1F8AA;LEFTWARDS FRONT-TILTED SHADOWED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 1F8AB;RIGHTWARDS FRONT-TILTED SHADOWED WHITE ARROW;So;0;ON;;;;;N;;;;;
+ 1F8AC;WHITE ARROW SHAFT WIDTH ONE;So;0;ON;;;;;N;;;;;
+ 1F8AD;WHITE ARROW SHAFT WIDTH TWO THIRDS;So;0;ON;;;;;N;;;;;
+ 1F900;CIRCLED CROSS FORMEE WITH FOUR DOTS;So;0;ON;;;;;N;;;;;
+ 1F901;CIRCLED CROSS FORMEE WITH TWO DOTS;So;0;ON;;;;;N;;;;;
+ 1F902;CIRCLED CROSS FORMEE;So;0;ON;;;;;N;;;;;
+ 1F903;LEFT HALF CIRCLE WITH FOUR DOTS;So;0;ON;;;;;N;;;;;
+ 1F904;LEFT HALF CIRCLE WITH THREE DOTS;So;0;ON;;;;;N;;;;;
+ 1F905;LEFT HALF CIRCLE WITH TWO DOTS;So;0;ON;;;;;N;;;;;
+ 1F906;LEFT HALF CIRCLE WITH DOT;So;0;ON;;;;;N;;;;;
+ 1F907;LEFT HALF CIRCLE;So;0;ON;;;;;N;;;;;
+ 1F908;DOWNWARD FACING HOOK;So;0;ON;;;;;N;;;;;
+ 1F909;DOWNWARD FACING NOTCHED HOOK;So;0;ON;;;;;N;;;;;
+ 1F90A;DOWNWARD FACING HOOK WITH DOT;So;0;ON;;;;;N;;;;;
+ 1F90B;DOWNWARD FACING NOTCHED HOOK WITH DOT;So;0;ON;;;;;N;;;;;
+ 1F90D;WHITE HEART;So;0;ON;;;;;N;;;;;
+ 1F90E;BROWN HEART;So;0;ON;;;;;N;;;;;
+ 1F90F;PINCHING HAND;So;0;ON;;;;;N;;;;;
+ 1F910;ZIPPER-MOUTH FACE;So;0;ON;;;;;N;;;;;
+ 1F911;MONEY-MOUTH FACE;So;0;ON;;;;;N;;;;;
+ 1F912;FACE WITH THERMOMETER;So;0;ON;;;;;N;;;;;
+ 1F913;NERD FACE;So;0;ON;;;;;N;;;;;
+ 1F914;THINKING FACE;So;0;ON;;;;;N;;;;;
+ 1F915;FACE WITH HEAD-BANDAGE;So;0;ON;;;;;N;;;;;
+ 1F916;ROBOT FACE;So;0;ON;;;;;N;;;;;
+ 1F917;HUGGING FACE;So;0;ON;;;;;N;;;;;
+ 1F918;SIGN OF THE HORNS;So;0;ON;;;;;N;;;;;
+ 1F919;CALL ME HAND;So;0;ON;;;;;N;;;;;
+ 1F91A;RAISED BACK OF HAND;So;0;ON;;;;;N;;;;;
+ 1F91B;LEFT-FACING FIST;So;0;ON;;;;;N;;;;;
+ 1F91C;RIGHT-FACING FIST;So;0;ON;;;;;N;;;;;
+ 1F91D;HANDSHAKE;So;0;ON;;;;;N;;;;;
+ 1F91E;HAND WITH INDEX AND MIDDLE FINGERS CROSSED;So;0;ON;;;;;N;;;;;
+ 1F91F;I LOVE YOU HAND SIGN;So;0;ON;;;;;N;;;;;
+ 1F920;FACE WITH COWBOY HAT;So;0;ON;;;;;N;;;;;
+ 1F921;CLOWN FACE;So;0;ON;;;;;N;;;;;
+ 1F922;NAUSEATED FACE;So;0;ON;;;;;N;;;;;
+ 1F923;ROLLING ON THE FLOOR LAUGHING;So;0;ON;;;;;N;;;;;
+ 1F924;DROOLING FACE;So;0;ON;;;;;N;;;;;
+ 1F925;LYING FACE;So;0;ON;;;;;N;;;;;
+ 1F926;FACE PALM;So;0;ON;;;;;N;;;;;
+ 1F927;SNEEZING FACE;So;0;ON;;;;;N;;;;;
+ 1F928;FACE WITH ONE EYEBROW RAISED;So;0;ON;;;;;N;;;;;
+ 1F929;GRINNING FACE WITH STAR EYES;So;0;ON;;;;;N;;;;;
+ 1F92A;GRINNING FACE WITH ONE LARGE AND ONE SMALL EYE;So;0;ON;;;;;N;;;;;
+ 1F92B;FACE WITH FINGER COVERING CLOSED LIPS;So;0;ON;;;;;N;;;;;
+ 1F92C;SERIOUS FACE WITH SYMBOLS COVERING MOUTH;So;0;ON;;;;;N;;;;;
+ 1F92D;SMILING FACE WITH SMILING EYES AND HAND COVERING MOUTH;So;0;ON;;;;;N;;;;;
+ 1F92E;FACE WITH OPEN MOUTH VOMITING;So;0;ON;;;;;N;;;;;
+ 1F92F;SHOCKED FACE WITH EXPLODING HEAD;So;0;ON;;;;;N;;;;;
+ 1F930;PREGNANT WOMAN;So;0;ON;;;;;N;;;;;
+ 1F931;BREAST-FEEDING;So;0;ON;;;;;N;;;;;
+ 1F932;PALMS UP TOGETHER;So;0;ON;;;;;N;;;;;
+ 1F933;SELFIE;So;0;ON;;;;;N;;;;;
+ 1F934;PRINCE;So;0;ON;;;;;N;;;;;
+ 1F935;MAN IN TUXEDO;So;0;ON;;;;;N;;;;;
+ 1F936;MOTHER CHRISTMAS;So;0;ON;;;;;N;;;;;
+ 1F937;SHRUG;So;0;ON;;;;;N;;;;;
+ 1F938;PERSON DOING CARTWHEEL;So;0;ON;;;;;N;;;;;
+ 1F939;JUGGLING;So;0;ON;;;;;N;;;;;
+ 1F93A;FENCER;So;0;ON;;;;;N;;;;;
+ 1F93B;MODERN PENTATHLON;So;0;ON;;;;;N;;;;;
+ 1F93C;WRESTLERS;So;0;ON;;;;;N;;;;;
+ 1F93D;WATER POLO;So;0;ON;;;;;N;;;;;
+ 1F93E;HANDBALL;So;0;ON;;;;;N;;;;;
+ 1F93F;DIVING MASK;So;0;ON;;;;;N;;;;;
+ 1F940;WILTED FLOWER;So;0;ON;;;;;N;;;;;
+ 1F941;DRUM WITH DRUMSTICKS;So;0;ON;;;;;N;;;;;
+ 1F942;CLINKING GLASSES;So;0;ON;;;;;N;;;;;
+ 1F943;TUMBLER GLASS;So;0;ON;;;;;N;;;;;
+ 1F944;SPOON;So;0;ON;;;;;N;;;;;
+ 1F945;GOAL NET;So;0;ON;;;;;N;;;;;
+ 1F946;RIFLE;So;0;ON;;;;;N;;;;;
+ 1F947;FIRST PLACE MEDAL;So;0;ON;;;;;N;;;;;
+ 1F948;SECOND PLACE MEDAL;So;0;ON;;;;;N;;;;;
+ 1F949;THIRD PLACE MEDAL;So;0;ON;;;;;N;;;;;
+ 1F94A;BOXING GLOVE;So;0;ON;;;;;N;;;;;
+ 1F94B;MARTIAL ARTS UNIFORM;So;0;ON;;;;;N;;;;;
+ 1F94C;CURLING STONE;So;0;ON;;;;;N;;;;;
+ 1F94D;LACROSSE STICK AND BALL;So;0;ON;;;;;N;;;;;
+ 1F94E;SOFTBALL;So;0;ON;;;;;N;;;;;
+ 1F94F;FLYING DISC;So;0;ON;;;;;N;;;;;
+ 1F950;CROISSANT;So;0;ON;;;;;N;;;;;
+ 1F951;AVOCADO;So;0;ON;;;;;N;;;;;
+ 1F952;CUCUMBER;So;0;ON;;;;;N;;;;;
+ 1F953;BACON;So;0;ON;;;;;N;;;;;
+ 1F954;POTATO;So;0;ON;;;;;N;;;;;
+ 1F955;CARROT;So;0;ON;;;;;N;;;;;
+ 1F956;BAGUETTE BREAD;So;0;ON;;;;;N;;;;;
+ 1F957;GREEN SALAD;So;0;ON;;;;;N;;;;;
+ 1F958;SHALLOW PAN OF FOOD;So;0;ON;;;;;N;;;;;
+ 1F959;STUFFED FLATBREAD;So;0;ON;;;;;N;;;;;
+ 1F95A;EGG;So;0;ON;;;;;N;;;;;
+ 1F95B;GLASS OF MILK;So;0;ON;;;;;N;;;;;
+ 1F95C;PEANUTS;So;0;ON;;;;;N;;;;;
+ 1F95D;KIWIFRUIT;So;0;ON;;;;;N;;;;;
+ 1F95E;PANCAKES;So;0;ON;;;;;N;;;;;
+ 1F95F;DUMPLING;So;0;ON;;;;;N;;;;;
+ 1F960;FORTUNE COOKIE;So;0;ON;;;;;N;;;;;
+ 1F961;TAKEOUT BOX;So;0;ON;;;;;N;;;;;
+ 1F962;CHOPSTICKS;So;0;ON;;;;;N;;;;;
+ 1F963;BOWL WITH SPOON;So;0;ON;;;;;N;;;;;
+ 1F964;CUP WITH STRAW;So;0;ON;;;;;N;;;;;
+ 1F965;COCONUT;So;0;ON;;;;;N;;;;;
+ 1F966;BROCCOLI;So;0;ON;;;;;N;;;;;
+ 1F967;PIE;So;0;ON;;;;;N;;;;;
+ 1F968;PRETZEL;So;0;ON;;;;;N;;;;;
+ 1F969;CUT OF MEAT;So;0;ON;;;;;N;;;;;
+ 1F96A;SANDWICH;So;0;ON;;;;;N;;;;;
+ 1F96B;CANNED FOOD;So;0;ON;;;;;N;;;;;
+ 1F96C;LEAFY GREEN;So;0;ON;;;;;N;;;;;
+ 1F96D;MANGO;So;0;ON;;;;;N;;;;;
+ 1F96E;MOON CAKE;So;0;ON;;;;;N;;;;;
+ 1F96F;BAGEL;So;0;ON;;;;;N;;;;;
+ 1F970;SMILING FACE WITH SMILING EYES AND THREE HEARTS;So;0;ON;;;;;N;;;;;
+ 1F971;YAWNING FACE;So;0;ON;;;;;N;;;;;
+ 1F973;FACE WITH PARTY HORN AND PARTY HAT;So;0;ON;;;;;N;;;;;
+ 1F974;FACE WITH UNEVEN EYES AND WAVY MOUTH;So;0;ON;;;;;N;;;;;
+ 1F975;OVERHEATED FACE;So;0;ON;;;;;N;;;;;
+ 1F976;FREEZING FACE;So;0;ON;;;;;N;;;;;
+ 1F97A;FACE WITH PLEADING EYES;So;0;ON;;;;;N;;;;;
+ 1F97B;SARI;So;0;ON;;;;;N;;;;;
+ 1F97C;LAB COAT;So;0;ON;;;;;N;;;;;
+ 1F97D;GOGGLES;So;0;ON;;;;;N;;;;;
+ 1F97E;HIKING BOOT;So;0;ON;;;;;N;;;;;
+ 1F97F;FLAT SHOE;So;0;ON;;;;;N;;;;;
+ 1F980;CRAB;So;0;ON;;;;;N;;;;;
+ 1F981;LION FACE;So;0;ON;;;;;N;;;;;
+ 1F982;SCORPION;So;0;ON;;;;;N;;;;;
+ 1F983;TURKEY;So;0;ON;;;;;N;;;;;
+ 1F984;UNICORN FACE;So;0;ON;;;;;N;;;;;
+ 1F985;EAGLE;So;0;ON;;;;;N;;;;;
+ 1F986;DUCK;So;0;ON;;;;;N;;;;;
+ 1F987;BAT;So;0;ON;;;;;N;;;;;
+ 1F988;SHARK;So;0;ON;;;;;N;;;;;
+ 1F989;OWL;So;0;ON;;;;;N;;;;;
+ 1F98A;FOX FACE;So;0;ON;;;;;N;;;;;
+ 1F98B;BUTTERFLY;So;0;ON;;;;;N;;;;;
+ 1F98C;DEER;So;0;ON;;;;;N;;;;;
+ 1F98D;GORILLA;So;0;ON;;;;;N;;;;;
+ 1F98E;LIZARD;So;0;ON;;;;;N;;;;;
+ 1F98F;RHINOCEROS;So;0;ON;;;;;N;;;;;
+ 1F990;SHRIMP;So;0;ON;;;;;N;;;;;
+ 1F991;SQUID;So;0;ON;;;;;N;;;;;
+ 1F992;GIRAFFE FACE;So;0;ON;;;;;N;;;;;
+ 1F993;ZEBRA FACE;So;0;ON;;;;;N;;;;;
+ 1F994;HEDGEHOG;So;0;ON;;;;;N;;;;;
+ 1F995;SAUROPOD;So;0;ON;;;;;N;;;;;
+ 1F996;T-REX;So;0;ON;;;;;N;;;;;
+ 1F997;CRICKET;So;0;ON;;;;;N;;;;;
+ 1F998;KANGAROO;So;0;ON;;;;;N;;;;;
+ 1F999;LLAMA;So;0;ON;;;;;N;;;;;
+ 1F99A;PEACOCK;So;0;ON;;;;;N;;;;;
+ 1F99B;HIPPOPOTAMUS;So;0;ON;;;;;N;;;;;
+ 1F99C;PARROT;So;0;ON;;;;;N;;;;;
+ 1F99D;RACCOON;So;0;ON;;;;;N;;;;;
+ 1F99E;LOBSTER;So;0;ON;;;;;N;;;;;
+ 1F99F;MOSQUITO;So;0;ON;;;;;N;;;;;
+ 1F9A0;MICROBE;So;0;ON;;;;;N;;;;;
+ 1F9A1;BADGER;So;0;ON;;;;;N;;;;;
+ 1F9A2;SWAN;So;0;ON;;;;;N;;;;;
+ 1F9A5;SLOTH;So;0;ON;;;;;N;;;;;
+ 1F9A6;OTTER;So;0;ON;;;;;N;;;;;
+ 1F9A7;ORANGUTAN;So;0;ON;;;;;N;;;;;
+ 1F9A8;SKUNK;So;0;ON;;;;;N;;;;;
+ 1F9A9;FLAMINGO;So;0;ON;;;;;N;;;;;
+ 1F9AA;OYSTER;So;0;ON;;;;;N;;;;;
+ 1F9AE;GUIDE DOG;So;0;ON;;;;;N;;;;;
+ 1F9AF;PROBING CANE;So;0;ON;;;;;N;;;;;
+ 1F9B0;EMOJI COMPONENT RED HAIR;So;0;ON;;;;;N;;;;;
+ 1F9B1;EMOJI COMPONENT CURLY HAIR;So;0;ON;;;;;N;;;;;
+ 1F9B2;EMOJI COMPONENT BALD;So;0;ON;;;;;N;;;;;
+ 1F9B3;EMOJI COMPONENT WHITE HAIR;So;0;ON;;;;;N;;;;;
+ 1F9B4;BONE;So;0;ON;;;;;N;;;;;
+ 1F9B5;LEG;So;0;ON;;;;;N;;;;;
+ 1F9B6;FOOT;So;0;ON;;;;;N;;;;;
+ 1F9B7;TOOTH;So;0;ON;;;;;N;;;;;
+ 1F9B8;SUPERHERO;So;0;ON;;;;;N;;;;;
+ 1F9B9;SUPERVILLAIN;So;0;ON;;;;;N;;;;;
+ 1F9BA;SAFETY VEST;So;0;ON;;;;;N;;;;;
+ 1F9BB;EAR WITH HEARING AID;So;0;ON;;;;;N;;;;;
+ 1F9BC;MOTORIZED WHEELCHAIR;So;0;ON;;;;;N;;;;;
+ 1F9BD;MANUAL WHEELCHAIR;So;0;ON;;;;;N;;;;;
+ 1F9BE;MECHANICAL ARM;So;0;ON;;;;;N;;;;;
+ 1F9BF;MECHANICAL LEG;So;0;ON;;;;;N;;;;;
+ 1F9C0;CHEESE WEDGE;So;0;ON;;;;;N;;;;;
+ 1F9C1;CUPCAKE;So;0;ON;;;;;N;;;;;
+ 1F9C2;SALT SHAKER;So;0;ON;;;;;N;;;;;
+ 1F9C3;BEVERAGE BOX;So;0;ON;;;;;N;;;;;
+ 1F9C4;GARLIC;So;0;ON;;;;;N;;;;;
+ 1F9C5;ONION;So;0;ON;;;;;N;;;;;
+ 1F9C6;FALAFEL;So;0;ON;;;;;N;;;;;
+ 1F9C7;WAFFLE;So;0;ON;;;;;N;;;;;
+ 1F9C8;BUTTER;So;0;ON;;;;;N;;;;;
+ 1F9C9;MATE DRINK;So;0;ON;;;;;N;;;;;
+ 1F9CA;ICE CUBE;So;0;ON;;;;;N;;;;;
+ 1F9CD;STANDING PERSON;So;0;ON;;;;;N;;;;;
+ 1F9CE;KNEELING PERSON;So;0;ON;;;;;N;;;;;
+ 1F9CF;DEAF PERSON;So;0;ON;;;;;N;;;;;
+ 1F9D0;FACE WITH MONOCLE;So;0;ON;;;;;N;;;;;
+ 1F9D1;ADULT;So;0;ON;;;;;N;;;;;
+ 1F9D2;CHILD;So;0;ON;;;;;N;;;;;
+ 1F9D3;OLDER ADULT;So;0;ON;;;;;N;;;;;
+ 1F9D4;BEARDED PERSON;So;0;ON;;;;;N;;;;;
+ 1F9D5;PERSON WITH HEADSCARF;So;0;ON;;;;;N;;;;;
+ 1F9D6;PERSON IN STEAMY ROOM;So;0;ON;;;;;N;;;;;
+ 1F9D7;PERSON CLIMBING;So;0;ON;;;;;N;;;;;
+ 1F9D8;PERSON IN LOTUS POSITION;So;0;ON;;;;;N;;;;;
+ 1F9D9;MAGE;So;0;ON;;;;;N;;;;;
+ 1F9DA;FAIRY;So;0;ON;;;;;N;;;;;
+ 1F9DB;VAMPIRE;So;0;ON;;;;;N;;;;;
+ 1F9DC;MERPERSON;So;0;ON;;;;;N;;;;;
+ 1F9DD;ELF;So;0;ON;;;;;N;;;;;
+ 1F9DE;GENIE;So;0;ON;;;;;N;;;;;
+ 1F9DF;ZOMBIE;So;0;ON;;;;;N;;;;;
+ 1F9E0;BRAIN;So;0;ON;;;;;N;;;;;
+ 1F9E1;ORANGE HEART;So;0;ON;;;;;N;;;;;
+ 1F9E2;BILLED CAP;So;0;ON;;;;;N;;;;;
+ 1F9E3;SCARF;So;0;ON;;;;;N;;;;;
+ 1F9E4;GLOVES;So;0;ON;;;;;N;;;;;
+ 1F9E5;COAT;So;0;ON;;;;;N;;;;;
+ 1F9E6;SOCKS;So;0;ON;;;;;N;;;;;
+ 1F9E7;RED GIFT ENVELOPE;So;0;ON;;;;;N;;;;;
+ 1F9E8;FIRECRACKER;So;0;ON;;;;;N;;;;;
+ 1F9E9;JIGSAW PUZZLE PIECE;So;0;ON;;;;;N;;;;;
+ 1F9EA;TEST TUBE;So;0;ON;;;;;N;;;;;
+ 1F9EB;PETRI DISH;So;0;ON;;;;;N;;;;;
+ 1F9EC;DNA DOUBLE HELIX;So;0;ON;;;;;N;;;;;
+ 1F9ED;COMPASS;So;0;ON;;;;;N;;;;;
+ 1F9EE;ABACUS;So;0;ON;;;;;N;;;;;
+ 1F9EF;FIRE EXTINGUISHER;So;0;ON;;;;;N;;;;;
+ 1F9F0;TOOLBOX;So;0;ON;;;;;N;;;;;
+ 1F9F1;BRICK;So;0;ON;;;;;N;;;;;
+ 1F9F2;MAGNET;So;0;ON;;;;;N;;;;;
+ 1F9F3;LUGGAGE;So;0;ON;;;;;N;;;;;
+ 1F9F4;LOTION BOTTLE;So;0;ON;;;;;N;;;;;
+ 1F9F5;SPOOL OF THREAD;So;0;ON;;;;;N;;;;;
+ 1F9F6;BALL OF YARN;So;0;ON;;;;;N;;;;;
+ 1F9F7;SAFETY PIN;So;0;ON;;;;;N;;;;;
+ 1F9F8;TEDDY BEAR;So;0;ON;;;;;N;;;;;
+ 1F9F9;BROOM;So;0;ON;;;;;N;;;;;
+ 1F9FA;BASKET;So;0;ON;;;;;N;;;;;
+ 1F9FB;ROLL OF PAPER;So;0;ON;;;;;N;;;;;
+ 1F9FC;BAR OF SOAP;So;0;ON;;;;;N;;;;;
+ 1F9FD;SPONGE;So;0;ON;;;;;N;;;;;
+ 1F9FE;RECEIPT;So;0;ON;;;;;N;;;;;
+ 1F9FF;NAZAR AMULET;So;0;ON;;;;;N;;;;;
+ 1FA00;NEUTRAL CHESS KING;So;0;ON;;;;;N;;;;;
+ 1FA01;NEUTRAL CHESS QUEEN;So;0;ON;;;;;N;;;;;
+ 1FA02;NEUTRAL CHESS ROOK;So;0;ON;;;;;N;;;;;
+ 1FA03;NEUTRAL CHESS BISHOP;So;0;ON;;;;;N;;;;;
+ 1FA04;NEUTRAL CHESS KNIGHT;So;0;ON;;;;;N;;;;;
+ 1FA05;NEUTRAL CHESS PAWN;So;0;ON;;;;;N;;;;;
+ 1FA06;WHITE CHESS KNIGHT ROTATED FORTY-FIVE DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA07;BLACK CHESS KNIGHT ROTATED FORTY-FIVE DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA08;NEUTRAL CHESS KNIGHT ROTATED FORTY-FIVE DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA09;WHITE CHESS KING ROTATED NINETY DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA0A;WHITE CHESS QUEEN ROTATED NINETY DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA0B;WHITE CHESS ROOK ROTATED NINETY DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA0C;WHITE CHESS BISHOP ROTATED NINETY DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA0D;WHITE CHESS KNIGHT ROTATED NINETY DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA0E;WHITE CHESS PAWN ROTATED NINETY DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA0F;BLACK CHESS KING ROTATED NINETY DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA10;BLACK CHESS QUEEN ROTATED NINETY DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA11;BLACK CHESS ROOK ROTATED NINETY DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA12;BLACK CHESS BISHOP ROTATED NINETY DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA13;BLACK CHESS KNIGHT ROTATED NINETY DEGREES;So;0;ON;;;;;N;;;;;
+ 1FA14;BLACK CHESS PAWN ROTATED NINETY DEGREES;So;0;ON;;;;;N;;;;;
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+ E006F;TAG LATIN SMALL LETTER O;Cf;0;BN;;;;;N;;;;;
+ E0070;TAG LATIN SMALL LETTER P;Cf;0;BN;;;;;N;;;;;
+ E0071;TAG LATIN SMALL LETTER Q;Cf;0;BN;;;;;N;;;;;
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+ E0075;TAG LATIN SMALL LETTER U;Cf;0;BN;;;;;N;;;;;
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+ E007E;TAG TILDE;Cf;0;BN;;;;;N;;;;;
+ E007F;CANCEL TAG;Cf;0;BN;;;;;N;;;;;
+ E0100;VARIATION SELECTOR-17;Mn;0;NSM;;;;;N;;;;;
+ E0101;VARIATION SELECTOR-18;Mn;0;NSM;;;;;N;;;;;
+ E0102;VARIATION SELECTOR-19;Mn;0;NSM;;;;;N;;;;;
+ E0103;VARIATION SELECTOR-20;Mn;0;NSM;;;;;N;;;;;
+ E0104;VARIATION SELECTOR-21;Mn;0;NSM;;;;;N;;;;;
+ E0105;VARIATION SELECTOR-22;Mn;0;NSM;;;;;N;;;;;
+ E0106;VARIATION SELECTOR-23;Mn;0;NSM;;;;;N;;;;;
+ E0107;VARIATION SELECTOR-24;Mn;0;NSM;;;;;N;;;;;
+ E0108;VARIATION SELECTOR-25;Mn;0;NSM;;;;;N;;;;;
+ E0109;VARIATION SELECTOR-26;Mn;0;NSM;;;;;N;;;;;
+ E010A;VARIATION SELECTOR-27;Mn;0;NSM;;;;;N;;;;;
+ E010B;VARIATION SELECTOR-28;Mn;0;NSM;;;;;N;;;;;
+ E010C;VARIATION SELECTOR-29;Mn;0;NSM;;;;;N;;;;;
+ E010D;VARIATION SELECTOR-30;Mn;0;NSM;;;;;N;;;;;
+ E010E;VARIATION SELECTOR-31;Mn;0;NSM;;;;;N;;;;;
+ E010F;VARIATION SELECTOR-32;Mn;0;NSM;;;;;N;;;;;
+ E0110;VARIATION SELECTOR-33;Mn;0;NSM;;;;;N;;;;;
+ E0111;VARIATION SELECTOR-34;Mn;0;NSM;;;;;N;;;;;
+ E0112;VARIATION SELECTOR-35;Mn;0;NSM;;;;;N;;;;;
+ E0113;VARIATION SELECTOR-36;Mn;0;NSM;;;;;N;;;;;
+ E0114;VARIATION SELECTOR-37;Mn;0;NSM;;;;;N;;;;;
+ E0115;VARIATION SELECTOR-38;Mn;0;NSM;;;;;N;;;;;
+ E0116;VARIATION SELECTOR-39;Mn;0;NSM;;;;;N;;;;;
+ E0117;VARIATION SELECTOR-40;Mn;0;NSM;;;;;N;;;;;
+ E0118;VARIATION SELECTOR-41;Mn;0;NSM;;;;;N;;;;;
+ E0119;VARIATION SELECTOR-42;Mn;0;NSM;;;;;N;;;;;
+ E011A;VARIATION SELECTOR-43;Mn;0;NSM;;;;;N;;;;;
+ E011B;VARIATION SELECTOR-44;Mn;0;NSM;;;;;N;;;;;
+ E011C;VARIATION SELECTOR-45;Mn;0;NSM;;;;;N;;;;;
+ E011D;VARIATION SELECTOR-46;Mn;0;NSM;;;;;N;;;;;
+ E011E;VARIATION SELECTOR-47;Mn;0;NSM;;;;;N;;;;;
+ E011F;VARIATION SELECTOR-48;Mn;0;NSM;;;;;N;;;;;
+ E0120;VARIATION SELECTOR-49;Mn;0;NSM;;;;;N;;;;;
+ E0121;VARIATION SELECTOR-50;Mn;0;NSM;;;;;N;;;;;
+ E0122;VARIATION SELECTOR-51;Mn;0;NSM;;;;;N;;;;;
+ E0123;VARIATION SELECTOR-52;Mn;0;NSM;;;;;N;;;;;
+ E0124;VARIATION SELECTOR-53;Mn;0;NSM;;;;;N;;;;;
+ E0125;VARIATION SELECTOR-54;Mn;0;NSM;;;;;N;;;;;
+ E0126;VARIATION SELECTOR-55;Mn;0;NSM;;;;;N;;;;;
+ E0127;VARIATION SELECTOR-56;Mn;0;NSM;;;;;N;;;;;
+ E0128;VARIATION SELECTOR-57;Mn;0;NSM;;;;;N;;;;;
+ E0129;VARIATION SELECTOR-58;Mn;0;NSM;;;;;N;;;;;
+ E012A;VARIATION SELECTOR-59;Mn;0;NSM;;;;;N;;;;;
+ E012B;VARIATION SELECTOR-60;Mn;0;NSM;;;;;N;;;;;
+ E012C;VARIATION SELECTOR-61;Mn;0;NSM;;;;;N;;;;;
+ E012D;VARIATION SELECTOR-62;Mn;0;NSM;;;;;N;;;;;
+ E012E;VARIATION SELECTOR-63;Mn;0;NSM;;;;;N;;;;;
+ E012F;VARIATION SELECTOR-64;Mn;0;NSM;;;;;N;;;;;
+ E0130;VARIATION SELECTOR-65;Mn;0;NSM;;;;;N;;;;;
+ E0131;VARIATION SELECTOR-66;Mn;0;NSM;;;;;N;;;;;
+ E0132;VARIATION SELECTOR-67;Mn;0;NSM;;;;;N;;;;;
+ E0133;VARIATION SELECTOR-68;Mn;0;NSM;;;;;N;;;;;
+ E0134;VARIATION SELECTOR-69;Mn;0;NSM;;;;;N;;;;;
+ E0135;VARIATION SELECTOR-70;Mn;0;NSM;;;;;N;;;;;
+ E0136;VARIATION SELECTOR-71;Mn;0;NSM;;;;;N;;;;;
+ E0137;VARIATION SELECTOR-72;Mn;0;NSM;;;;;N;;;;;
+ E0138;VARIATION SELECTOR-73;Mn;0;NSM;;;;;N;;;;;
+ E0139;VARIATION SELECTOR-74;Mn;0;NSM;;;;;N;;;;;
+ E013A;VARIATION SELECTOR-75;Mn;0;NSM;;;;;N;;;;;
+ E013B;VARIATION SELECTOR-76;Mn;0;NSM;;;;;N;;;;;
+ E013C;VARIATION SELECTOR-77;Mn;0;NSM;;;;;N;;;;;
+ E013D;VARIATION SELECTOR-78;Mn;0;NSM;;;;;N;;;;;
+ E013E;VARIATION SELECTOR-79;Mn;0;NSM;;;;;N;;;;;
+ E013F;VARIATION SELECTOR-80;Mn;0;NSM;;;;;N;;;;;
+ E0140;VARIATION SELECTOR-81;Mn;0;NSM;;;;;N;;;;;
+ E0141;VARIATION SELECTOR-82;Mn;0;NSM;;;;;N;;;;;
+ E0142;VARIATION SELECTOR-83;Mn;0;NSM;;;;;N;;;;;
+ E0143;VARIATION SELECTOR-84;Mn;0;NSM;;;;;N;;;;;
+ E0144;VARIATION SELECTOR-85;Mn;0;NSM;;;;;N;;;;;
+ E0145;VARIATION SELECTOR-86;Mn;0;NSM;;;;;N;;;;;
+ E0146;VARIATION SELECTOR-87;Mn;0;NSM;;;;;N;;;;;
+ E0147;VARIATION SELECTOR-88;Mn;0;NSM;;;;;N;;;;;
+ E0148;VARIATION SELECTOR-89;Mn;0;NSM;;;;;N;;;;;
+ E0149;VARIATION SELECTOR-90;Mn;0;NSM;;;;;N;;;;;
+ E014A;VARIATION SELECTOR-91;Mn;0;NSM;;;;;N;;;;;
+ E014B;VARIATION SELECTOR-92;Mn;0;NSM;;;;;N;;;;;
+ E014C;VARIATION SELECTOR-93;Mn;0;NSM;;;;;N;;;;;
+ E014D;VARIATION SELECTOR-94;Mn;0;NSM;;;;;N;;;;;
+ E014E;VARIATION SELECTOR-95;Mn;0;NSM;;;;;N;;;;;
+ E014F;VARIATION SELECTOR-96;Mn;0;NSM;;;;;N;;;;;
+ E0150;VARIATION SELECTOR-97;Mn;0;NSM;;;;;N;;;;;
+ E0151;VARIATION SELECTOR-98;Mn;0;NSM;;;;;N;;;;;
+ E0152;VARIATION SELECTOR-99;Mn;0;NSM;;;;;N;;;;;
+ E0153;VARIATION SELECTOR-100;Mn;0;NSM;;;;;N;;;;;
+ E0154;VARIATION SELECTOR-101;Mn;0;NSM;;;;;N;;;;;
+ E0155;VARIATION SELECTOR-102;Mn;0;NSM;;;;;N;;;;;
+ E0156;VARIATION SELECTOR-103;Mn;0;NSM;;;;;N;;;;;
+ E0157;VARIATION SELECTOR-104;Mn;0;NSM;;;;;N;;;;;
+ E0158;VARIATION SELECTOR-105;Mn;0;NSM;;;;;N;;;;;
+ E0159;VARIATION SELECTOR-106;Mn;0;NSM;;;;;N;;;;;
+ E015A;VARIATION SELECTOR-107;Mn;0;NSM;;;;;N;;;;;
+ E015B;VARIATION SELECTOR-108;Mn;0;NSM;;;;;N;;;;;
+ E015C;VARIATION SELECTOR-109;Mn;0;NSM;;;;;N;;;;;
+ E015D;VARIATION SELECTOR-110;Mn;0;NSM;;;;;N;;;;;
+ E015E;VARIATION SELECTOR-111;Mn;0;NSM;;;;;N;;;;;
+ E015F;VARIATION SELECTOR-112;Mn;0;NSM;;;;;N;;;;;
+ E0160;VARIATION SELECTOR-113;Mn;0;NSM;;;;;N;;;;;
+ E0161;VARIATION SELECTOR-114;Mn;0;NSM;;;;;N;;;;;
+ E0162;VARIATION SELECTOR-115;Mn;0;NSM;;;;;N;;;;;
+ E0163;VARIATION SELECTOR-116;Mn;0;NSM;;;;;N;;;;;
+ E0164;VARIATION SELECTOR-117;Mn;0;NSM;;;;;N;;;;;
+ E0165;VARIATION SELECTOR-118;Mn;0;NSM;;;;;N;;;;;
+ E0166;VARIATION SELECTOR-119;Mn;0;NSM;;;;;N;;;;;
+ E0167;VARIATION SELECTOR-120;Mn;0;NSM;;;;;N;;;;;
+ E0168;VARIATION SELECTOR-121;Mn;0;NSM;;;;;N;;;;;
+ E0169;VARIATION SELECTOR-122;Mn;0;NSM;;;;;N;;;;;
+ E016A;VARIATION SELECTOR-123;Mn;0;NSM;;;;;N;;;;;
+ E016B;VARIATION SELECTOR-124;Mn;0;NSM;;;;;N;;;;;
+ E016C;VARIATION SELECTOR-125;Mn;0;NSM;;;;;N;;;;;
+ E016D;VARIATION SELECTOR-126;Mn;0;NSM;;;;;N;;;;;
+ E016E;VARIATION SELECTOR-127;Mn;0;NSM;;;;;N;;;;;
+ E016F;VARIATION SELECTOR-128;Mn;0;NSM;;;;;N;;;;;
+ E0170;VARIATION SELECTOR-129;Mn;0;NSM;;;;;N;;;;;
+ E0171;VARIATION SELECTOR-130;Mn;0;NSM;;;;;N;;;;;
+ E0172;VARIATION SELECTOR-131;Mn;0;NSM;;;;;N;;;;;
+ E0173;VARIATION SELECTOR-132;Mn;0;NSM;;;;;N;;;;;
+ E0174;VARIATION SELECTOR-133;Mn;0;NSM;;;;;N;;;;;
+ E0175;VARIATION SELECTOR-134;Mn;0;NSM;;;;;N;;;;;
+ E0176;VARIATION SELECTOR-135;Mn;0;NSM;;;;;N;;;;;
+ E0177;VARIATION SELECTOR-136;Mn;0;NSM;;;;;N;;;;;
+ E0178;VARIATION SELECTOR-137;Mn;0;NSM;;;;;N;;;;;
+ E0179;VARIATION SELECTOR-138;Mn;0;NSM;;;;;N;;;;;
+ E017A;VARIATION SELECTOR-139;Mn;0;NSM;;;;;N;;;;;
+ E017B;VARIATION SELECTOR-140;Mn;0;NSM;;;;;N;;;;;
+ E017C;VARIATION SELECTOR-141;Mn;0;NSM;;;;;N;;;;;
+ E017D;VARIATION SELECTOR-142;Mn;0;NSM;;;;;N;;;;;
+ E017E;VARIATION SELECTOR-143;Mn;0;NSM;;;;;N;;;;;
+ E017F;VARIATION SELECTOR-144;Mn;0;NSM;;;;;N;;;;;
+ E0180;VARIATION SELECTOR-145;Mn;0;NSM;;;;;N;;;;;
+ E0181;VARIATION SELECTOR-146;Mn;0;NSM;;;;;N;;;;;
+ E0182;VARIATION SELECTOR-147;Mn;0;NSM;;;;;N;;;;;
+ E0183;VARIATION SELECTOR-148;Mn;0;NSM;;;;;N;;;;;
+ E0184;VARIATION SELECTOR-149;Mn;0;NSM;;;;;N;;;;;
+ E0185;VARIATION SELECTOR-150;Mn;0;NSM;;;;;N;;;;;
+ E0186;VARIATION SELECTOR-151;Mn;0;NSM;;;;;N;;;;;
+ E0187;VARIATION SELECTOR-152;Mn;0;NSM;;;;;N;;;;;
+ E0188;VARIATION SELECTOR-153;Mn;0;NSM;;;;;N;;;;;
+ E0189;VARIATION SELECTOR-154;Mn;0;NSM;;;;;N;;;;;
+ E018A;VARIATION SELECTOR-155;Mn;0;NSM;;;;;N;;;;;
+ E018B;VARIATION SELECTOR-156;Mn;0;NSM;;;;;N;;;;;
+ E018C;VARIATION SELECTOR-157;Mn;0;NSM;;;;;N;;;;;
+ E018D;VARIATION SELECTOR-158;Mn;0;NSM;;;;;N;;;;;
+ E018E;VARIATION SELECTOR-159;Mn;0;NSM;;;;;N;;;;;
+ E018F;VARIATION SELECTOR-160;Mn;0;NSM;;;;;N;;;;;
+ E0190;VARIATION SELECTOR-161;Mn;0;NSM;;;;;N;;;;;
+ E0191;VARIATION SELECTOR-162;Mn;0;NSM;;;;;N;;;;;
+ E0192;VARIATION SELECTOR-163;Mn;0;NSM;;;;;N;;;;;
+ E0193;VARIATION SELECTOR-164;Mn;0;NSM;;;;;N;;;;;
+ E0194;VARIATION SELECTOR-165;Mn;0;NSM;;;;;N;;;;;
+ E0195;VARIATION SELECTOR-166;Mn;0;NSM;;;;;N;;;;;
+ E0196;VARIATION SELECTOR-167;Mn;0;NSM;;;;;N;;;;;
+ E0197;VARIATION SELECTOR-168;Mn;0;NSM;;;;;N;;;;;
+ E0198;VARIATION SELECTOR-169;Mn;0;NSM;;;;;N;;;;;
+ E0199;VARIATION SELECTOR-170;Mn;0;NSM;;;;;N;;;;;
+ E019A;VARIATION SELECTOR-171;Mn;0;NSM;;;;;N;;;;;
+ E019B;VARIATION SELECTOR-172;Mn;0;NSM;;;;;N;;;;;
+ E019C;VARIATION SELECTOR-173;Mn;0;NSM;;;;;N;;;;;
+ E019D;VARIATION SELECTOR-174;Mn;0;NSM;;;;;N;;;;;
+ E019E;VARIATION SELECTOR-175;Mn;0;NSM;;;;;N;;;;;
+ E019F;VARIATION SELECTOR-176;Mn;0;NSM;;;;;N;;;;;
+ E01A0;VARIATION SELECTOR-177;Mn;0;NSM;;;;;N;;;;;
+ E01A1;VARIATION SELECTOR-178;Mn;0;NSM;;;;;N;;;;;
+ E01A2;VARIATION SELECTOR-179;Mn;0;NSM;;;;;N;;;;;
+ E01A3;VARIATION SELECTOR-180;Mn;0;NSM;;;;;N;;;;;
+ E01A4;VARIATION SELECTOR-181;Mn;0;NSM;;;;;N;;;;;
+ E01A5;VARIATION SELECTOR-182;Mn;0;NSM;;;;;N;;;;;
+ E01A6;VARIATION SELECTOR-183;Mn;0;NSM;;;;;N;;;;;
+ E01A7;VARIATION SELECTOR-184;Mn;0;NSM;;;;;N;;;;;
+ E01A8;VARIATION SELECTOR-185;Mn;0;NSM;;;;;N;;;;;
+ E01A9;VARIATION SELECTOR-186;Mn;0;NSM;;;;;N;;;;;
+ E01AA;VARIATION SELECTOR-187;Mn;0;NSM;;;;;N;;;;;
+ E01AB;VARIATION SELECTOR-188;Mn;0;NSM;;;;;N;;;;;
+ E01AC;VARIATION SELECTOR-189;Mn;0;NSM;;;;;N;;;;;
+ E01AD;VARIATION SELECTOR-190;Mn;0;NSM;;;;;N;;;;;
+ E01AE;VARIATION SELECTOR-191;Mn;0;NSM;;;;;N;;;;;
+ E01AF;VARIATION SELECTOR-192;Mn;0;NSM;;;;;N;;;;;
+ E01B0;VARIATION SELECTOR-193;Mn;0;NSM;;;;;N;;;;;
+ E01B1;VARIATION SELECTOR-194;Mn;0;NSM;;;;;N;;;;;
+ E01B2;VARIATION SELECTOR-195;Mn;0;NSM;;;;;N;;;;;
+ E01B3;VARIATION SELECTOR-196;Mn;0;NSM;;;;;N;;;;;
+ E01B4;VARIATION SELECTOR-197;Mn;0;NSM;;;;;N;;;;;
+ E01B5;VARIATION SELECTOR-198;Mn;0;NSM;;;;;N;;;;;
+ E01B6;VARIATION SELECTOR-199;Mn;0;NSM;;;;;N;;;;;
+ E01B7;VARIATION SELECTOR-200;Mn;0;NSM;;;;;N;;;;;
+ E01B8;VARIATION SELECTOR-201;Mn;0;NSM;;;;;N;;;;;
+ E01B9;VARIATION SELECTOR-202;Mn;0;NSM;;;;;N;;;;;
+ E01BA;VARIATION SELECTOR-203;Mn;0;NSM;;;;;N;;;;;
+ E01BB;VARIATION SELECTOR-204;Mn;0;NSM;;;;;N;;;;;
+ E01BC;VARIATION SELECTOR-205;Mn;0;NSM;;;;;N;;;;;
+ E01BD;VARIATION SELECTOR-206;Mn;0;NSM;;;;;N;;;;;
+ E01BE;VARIATION SELECTOR-207;Mn;0;NSM;;;;;N;;;;;
+ E01BF;VARIATION SELECTOR-208;Mn;0;NSM;;;;;N;;;;;
+ E01C0;VARIATION SELECTOR-209;Mn;0;NSM;;;;;N;;;;;
+ E01C1;VARIATION SELECTOR-210;Mn;0;NSM;;;;;N;;;;;
+ E01C2;VARIATION SELECTOR-211;Mn;0;NSM;;;;;N;;;;;
+ E01C3;VARIATION SELECTOR-212;Mn;0;NSM;;;;;N;;;;;
+ E01C4;VARIATION SELECTOR-213;Mn;0;NSM;;;;;N;;;;;
+ E01C5;VARIATION SELECTOR-214;Mn;0;NSM;;;;;N;;;;;
+ E01C6;VARIATION SELECTOR-215;Mn;0;NSM;;;;;N;;;;;
+ E01C7;VARIATION SELECTOR-216;Mn;0;NSM;;;;;N;;;;;
+ E01C8;VARIATION SELECTOR-217;Mn;0;NSM;;;;;N;;;;;
+ E01C9;VARIATION SELECTOR-218;Mn;0;NSM;;;;;N;;;;;
+ E01CA;VARIATION SELECTOR-219;Mn;0;NSM;;;;;N;;;;;
+ E01CB;VARIATION SELECTOR-220;Mn;0;NSM;;;;;N;;;;;
+ E01CC;VARIATION SELECTOR-221;Mn;0;NSM;;;;;N;;;;;
+ E01CD;VARIATION SELECTOR-222;Mn;0;NSM;;;;;N;;;;;
+ E01CE;VARIATION SELECTOR-223;Mn;0;NSM;;;;;N;;;;;
+ E01CF;VARIATION SELECTOR-224;Mn;0;NSM;;;;;N;;;;;
+ E01D0;VARIATION SELECTOR-225;Mn;0;NSM;;;;;N;;;;;
+ E01D1;VARIATION SELECTOR-226;Mn;0;NSM;;;;;N;;;;;
+ E01D2;VARIATION SELECTOR-227;Mn;0;NSM;;;;;N;;;;;
+ E01D3;VARIATION SELECTOR-228;Mn;0;NSM;;;;;N;;;;;
+ E01D4;VARIATION SELECTOR-229;Mn;0;NSM;;;;;N;;;;;
+ E01D5;VARIATION SELECTOR-230;Mn;0;NSM;;;;;N;;;;;
+ E01D6;VARIATION SELECTOR-231;Mn;0;NSM;;;;;N;;;;;
+ E01D7;VARIATION SELECTOR-232;Mn;0;NSM;;;;;N;;;;;
+ E01D8;VARIATION SELECTOR-233;Mn;0;NSM;;;;;N;;;;;
+ E01D9;VARIATION SELECTOR-234;Mn;0;NSM;;;;;N;;;;;
+ E01DA;VARIATION SELECTOR-235;Mn;0;NSM;;;;;N;;;;;
+ E01DB;VARIATION SELECTOR-236;Mn;0;NSM;;;;;N;;;;;
+ E01DC;VARIATION SELECTOR-237;Mn;0;NSM;;;;;N;;;;;
+ E01DD;VARIATION SELECTOR-238;Mn;0;NSM;;;;;N;;;;;
+ E01DE;VARIATION SELECTOR-239;Mn;0;NSM;;;;;N;;;;;
+ E01DF;VARIATION SELECTOR-240;Mn;0;NSM;;;;;N;;;;;
+ E01E0;VARIATION SELECTOR-241;Mn;0;NSM;;;;;N;;;;;
+ E01E1;VARIATION SELECTOR-242;Mn;0;NSM;;;;;N;;;;;
+ E01E2;VARIATION SELECTOR-243;Mn;0;NSM;;;;;N;;;;;
+ E01E3;VARIATION SELECTOR-244;Mn;0;NSM;;;;;N;;;;;
+ E01E4;VARIATION SELECTOR-245;Mn;0;NSM;;;;;N;;;;;
+ E01E5;VARIATION SELECTOR-246;Mn;0;NSM;;;;;N;;;;;
+ E01E6;VARIATION SELECTOR-247;Mn;0;NSM;;;;;N;;;;;
+ E01E7;VARIATION SELECTOR-248;Mn;0;NSM;;;;;N;;;;;
+ E01E8;VARIATION SELECTOR-249;Mn;0;NSM;;;;;N;;;;;
+ E01E9;VARIATION SELECTOR-250;Mn;0;NSM;;;;;N;;;;;
+ E01EA;VARIATION SELECTOR-251;Mn;0;NSM;;;;;N;;;;;
+ E01EB;VARIATION SELECTOR-252;Mn;0;NSM;;;;;N;;;;;
+ E01EC;VARIATION SELECTOR-253;Mn;0;NSM;;;;;N;;;;;
+ E01ED;VARIATION SELECTOR-254;Mn;0;NSM;;;;;N;;;;;
+ E01EE;VARIATION SELECTOR-255;Mn;0;NSM;;;;;N;;;;;
+ E01EF;VARIATION SELECTOR-256;Mn;0;NSM;;;;;N;;;;;
+ F0000;<Plane 15 Private Use, First>;Co;0;L;;;;;N;;;;;
+ FFFFD;<Plane 15 Private Use, Last>;Co;0;L;;;;;N;;;;;
+ 100000;<Plane 16 Private Use, First>;Co;0;L;;;;;N;;;;;
+ 10FFFD;<Plane 16 Private Use, Last>;Co;0;L;;;;;N;;;;;
diff -Nrcpad gcc-9.3.0/contrib/unicode/from_glibc/unicode_utils.py gcc-10.1.0/contrib/unicode/from_glibc/unicode_utils.py
*** gcc-9.3.0/contrib/unicode/from_glibc/unicode_utils.py	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/unicode/from_glibc/unicode_utils.py	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,527 ----
+ # Utilities to generate Unicode data for glibc from upstream Unicode data.
+ #
+ # Copyright (C) 2014-2019 Free Software Foundation, Inc.
+ # This file is part of the GNU C Library.
+ #
+ # The GNU C Library is free software; you can redistribute it and/or
+ # modify it under the terms of the GNU Lesser General Public
+ # License as published by the Free Software Foundation; either
+ # version 2.1 of the License, or (at your option) any later version.
+ #
+ # The GNU C Library is distributed in the hope that it will be useful,
+ # but WITHOUT ANY WARRANTY; without even the implied warranty of
+ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ # Lesser General Public License for more details.
+ #
+ # You should have received a copy of the GNU Lesser General Public
+ # License along with the GNU C Library; if not, see
+ # <https://www.gnu.org/licenses/>.
+ 
+ '''
+ This module contains utilities used by the scripts to generate
+ Unicode data for glibc from upstream Unicode data files.
+ '''
+ 
+ import sys
+ import re
+ 
+ 
+ # Common locale header.
+ COMMENT_HEADER = """
+ % This file is part of the GNU C Library and contains locale data.
+ % The Free Software Foundation does not claim any copyright interest
+ % in the locale data contained in this file.  The foregoing does not
+ % affect the license of the GNU C Library as a whole.  It does not
+ % exempt you from the conditions of the license if your use would
+ % otherwise be governed by that license.
+ """
+ 
+ # Dictionary holding the entire contents of the UnicodeData.txt file
+ #
+ # Contents of this dictionary look like this:
+ #
+ # {0: {'category': 'Cc',
+ #      'title': None,
+ #      'digit': '',
+ #      'name': '<control>',
+ #      'bidi': 'BN',
+ #      'combining': '0',
+ #      'comment': '',
+ #      'oldname': 'NULL',
+ #      'decomposition': '',
+ #      'upper': None,
+ #      'mirrored': 'N',
+ #      'lower': None,
+ #      'decdigit': '',
+ #      'numeric': ''},
+ #      …
+ # }
+ UNICODE_ATTRIBUTES = {}
+ 
+ # Dictionary holding the entire contents of the DerivedCoreProperties.txt file
+ #
+ # Contents of this dictionary look like this:
+ #
+ # {917504: ['Default_Ignorable_Code_Point'],
+ #  917505: ['Case_Ignorable', 'Default_Ignorable_Code_Point'],
+ #  …
+ # }
+ DERIVED_CORE_PROPERTIES = {}
+ 
+ # Dictionary holding the entire contents of the EastAsianWidths.txt file
+ #
+ # Contents of this dictionary look like this:
+ #
+ # {0: 'N', … , 45430: 'W', …}
+ EAST_ASIAN_WIDTHS = {}
+ 
+ def fill_attribute(code_point, fields):
+     '''Stores in UNICODE_ATTRIBUTES[code_point] the values from the fields.
+ 
+     One entry in the UNICODE_ATTRIBUTES dictionary represents one line
+     in the UnicodeData.txt file.
+ 
+     '''
+     UNICODE_ATTRIBUTES[code_point] =  {
+         'name': fields[1],          # Character name
+         'category': fields[2],      # General category
+         'combining': fields[3],     # Canonical combining classes
+         'bidi': fields[4],          # Bidirectional category
+         'decomposition': fields[5], # Character decomposition mapping
+         'decdigit': fields[6],      # Decimal digit value
+         'digit': fields[7],         # Digit value
+         'numeric': fields[8],       # Numeric value
+         'mirrored': fields[9],      # mirrored
+         'oldname': fields[10],      # Old Unicode 1.0 name
+         'comment': fields[11],      # comment
+         # Uppercase mapping
+         'upper': int(fields[12], 16) if fields[12] else None,
+         # Lowercase mapping
+         'lower': int(fields[13], 16) if fields[13] else None,
+         # Titlecase mapping
+         'title': int(fields[14], 16) if fields[14] else None,
+     }
+ 
+ def fill_attributes(filename):
+     '''Stores the entire contents of the UnicodeData.txt file
+     in the UNICODE_ATTRIBUTES dictionary.
+ 
+     A typical line for a single code point in UnicodeData.txt looks
+     like this:
+ 
+     0041;LATIN CAPITAL LETTER A;Lu;0;L;;;;;N;;;;0061;
+ 
+     Code point ranges are indicated by pairs of lines like this:
+ 
+     4E00;<CJK Ideograph, First>;Lo;0;L;;;;;N;;;;;
+     9FCC;<CJK Ideograph, Last>;Lo;0;L;;;;;N;;;;;
+     '''
+     with open(filename, mode='r') as unicode_data_file:
+         fields_start = []
+         for line in unicode_data_file:
+             fields = line.strip().split(';')
+             if len(fields) != 15:
+                 sys.stderr.write(
+                     'short line in file "%(f)s": %(l)s\n' %{
+                     'f': filename, 'l': line})
+                 exit(1)
+             if fields[2] == 'Cs':
+                 # Surrogates are UTF-16 artefacts,
+                 # not real characters. Ignore them.
+                 fields_start = []
+                 continue
+             if fields[1].endswith(', First>'):
+                 fields_start = fields
+                 fields_start[1] = fields_start[1].split(',')[0][1:]
+                 continue
+             if fields[1].endswith(', Last>'):
+                 fields[1] = fields[1].split(',')[0][1:]
+                 if fields[1:] != fields_start[1:]:
+                     sys.stderr.write(
+                         'broken code point range in file "%(f)s": %(l)s\n' %{
+                             'f': filename, 'l': line})
+                     exit(1)
+                 for code_point in range(
+                         int(fields_start[0], 16),
+                         int(fields[0], 16)+1):
+                     fill_attribute(code_point, fields)
+                 fields_start = []
+                 continue
+             fill_attribute(int(fields[0], 16), fields)
+             fields_start = []
+ 
+ def fill_derived_core_properties(filename):
+     '''Stores the entire contents of the DerivedCoreProperties.txt file
+     in the DERIVED_CORE_PROPERTIES dictionary.
+ 
+     Lines in DerivedCoreProperties.txt are either a code point range like
+     this:
+ 
+     0061..007A    ; Lowercase # L&  [26] LATIN SMALL LETTER A..LATIN SMALL LETTER Z
+ 
+     or a single code point like this:
+ 
+     00AA          ; Lowercase # Lo       FEMININE ORDINAL INDICATOR
+ 
+     '''
+     with open(filename, mode='r') as derived_core_properties_file:
+         for line in derived_core_properties_file:
+             match = re.match(
+                 r'^(?P<codepoint1>[0-9A-F]{4,6})'
+                 + r'(?:\.\.(?P<codepoint2>[0-9A-F]{4,6}))?'
+                 + r'\s*;\s*(?P<property>[a-zA-Z_]+)',
+                 line)
+             if not match:
+                 continue
+             start = match.group('codepoint1')
+             end = match.group('codepoint2')
+             if not end:
+                 end = start
+             for code_point in range(int(start, 16), int(end, 16)+1):
+                 prop = match.group('property')
+                 if code_point in DERIVED_CORE_PROPERTIES:
+                     DERIVED_CORE_PROPERTIES[code_point].append(prop)
+                 else:
+                     DERIVED_CORE_PROPERTIES[code_point] = [prop]
+ 
+ def fill_east_asian_widths(filename):
+     '''Stores the entire contents of the EastAsianWidths.txt file
+     in the EAST_ASIAN_WIDTHS dictionary.
+ 
+     Lines in EastAsianWidths.txt are either a code point range like
+     this:
+ 
+     9FCD..9FFF;W     # Cn    [51] <reserved-9FCD>..<reserved-9FFF>
+ 
+     or a single code point like this:
+ 
+     A015;W           # Lm         YI SYLLABLE WU
+     '''
+     with open(filename, mode='r') as east_asian_widths_file:
+         for line in east_asian_widths_file:
+             match = re.match(
+                 r'^(?P<codepoint1>[0-9A-F]{4,6})'
+                 +r'(?:\.\.(?P<codepoint2>[0-9A-F]{4,6}))?'
+                 +r'\s*;\s*(?P<property>[a-zA-Z]+)',
+                 line)
+             if not match:
+                 continue
+             start = match.group('codepoint1')
+             end = match.group('codepoint2')
+             if not end:
+                 end = start
+             for code_point in range(int(start, 16), int(end, 16)+1):
+                 EAST_ASIAN_WIDTHS[code_point] = match.group('property')
+ 
+ def to_upper(code_point):
+     '''Returns the code point of the uppercase version
+     of the given code point'''
+     if (UNICODE_ATTRIBUTES[code_point]['name']
+         and UNICODE_ATTRIBUTES[code_point]['upper']):
+         return UNICODE_ATTRIBUTES[code_point]['upper']
+     else:
+         return code_point
+ 
+ def to_lower(code_point):
+     '''Returns the code point of the lowercase version
+     of the given code point'''
+     if (UNICODE_ATTRIBUTES[code_point]['name']
+         and UNICODE_ATTRIBUTES[code_point]['lower']):
+         return UNICODE_ATTRIBUTES[code_point]['lower']
+     else:
+         return code_point
+ 
+ def to_upper_turkish(code_point):
+     '''Returns the code point of the Turkish uppercase version
+     of the given code point'''
+     if code_point == 0x0069:
+         return 0x0130
+     return to_upper(code_point)
+ 
+ def to_lower_turkish(code_point):
+     '''Returns the code point of the Turkish lowercase version
+     of the given code point'''
+     if code_point == 0x0049:
+         return 0x0131
+     return to_lower(code_point)
+ 
+ def to_title(code_point):
+     '''Returns the code point of the titlecase version
+     of the given code point'''
+     if (UNICODE_ATTRIBUTES[code_point]['name']
+         and UNICODE_ATTRIBUTES[code_point]['title']):
+         return UNICODE_ATTRIBUTES[code_point]['title']
+     else:
+         return code_point
+ 
+ def is_upper(code_point):
+     '''Checks whether the character with this code point is uppercase'''
+     return (to_lower(code_point) != code_point
+             or (code_point in DERIVED_CORE_PROPERTIES
+                 and 'Uppercase' in DERIVED_CORE_PROPERTIES[code_point]))
+ 
+ def is_lower(code_point):
+     '''Checks whether the character with this code point is lowercase'''
+     # Some characters are defined as “Lowercase” in
+     # DerivedCoreProperties.txt but do not have a mapping to upper
+     # case. For example, ꜰ U+A72F “LATIN LETTER SMALL CAPITAL F” is
+     # one of these.
+     return (to_upper(code_point) != code_point
+             # <U00DF> is lowercase, but without simple to_upper mapping.
+             or code_point == 0x00DF
+             or (code_point in DERIVED_CORE_PROPERTIES
+                 and 'Lowercase' in DERIVED_CORE_PROPERTIES[code_point]))
+ 
+ def is_alpha(code_point):
+     '''Checks whether the character with this code point is alphabetic'''
+     return ((code_point in DERIVED_CORE_PROPERTIES
+              and
+              'Alphabetic' in DERIVED_CORE_PROPERTIES[code_point])
+             or
+             # Consider all the non-ASCII digits as alphabetic.
+             # ISO C 99 forbids us to have them in category “digit”,
+             # but we want iswalnum to return true on them.
+             (UNICODE_ATTRIBUTES[code_point]['category'] == 'Nd'
+              and not (code_point >= 0x0030 and code_point <= 0x0039)))
+ 
+ def is_digit(code_point):
+     '''Checks whether the character with this code point is a digit'''
+     if False:
+         return (UNICODE_ATTRIBUTES[code_point]['name']
+                 and UNICODE_ATTRIBUTES[code_point]['category'] == 'Nd')
+         # Note: U+0BE7..U+0BEF and U+1369..U+1371 are digit systems without
+         # a zero.  Must add <0> in front of them by hand.
+     else:
+         # SUSV2 gives us some freedom for the "digit" category, but ISO C 99
+         # takes it away:
+         # 7.25.2.1.5:
+         #    The iswdigit function tests for any wide character that
+         #    corresponds to a decimal-digit character (as defined in 5.2.1).
+         # 5.2.1:
+         #    the 10 decimal digits 0 1 2 3 4 5 6 7 8 9
+         return (code_point >= 0x0030 and code_point <= 0x0039)
+ 
+ def is_outdigit(code_point):
+     '''Checks whether the character with this code point is outdigit'''
+     return (code_point >= 0x0030 and code_point <= 0x0039)
+ 
+ def is_blank(code_point):
+     '''Checks whether the character with this code point is blank'''
+     return (code_point == 0x0009 # '\t'
+             # Category Zs without mention of '<noBreak>'
+             or (UNICODE_ATTRIBUTES[code_point]['name']
+                 and UNICODE_ATTRIBUTES[code_point]['category'] == 'Zs'
+                 and '<noBreak>' not in
+                 UNICODE_ATTRIBUTES[code_point]['decomposition']))
+ 
+ def is_space(code_point):
+     '''Checks whether the character with this code point is a space'''
+     # Don’t make U+00A0 a space. Non-breaking space means that all programs
+     # should treat it like a punctuation character, not like a space.
+     return (code_point == 0x0020 # ' '
+             or code_point == 0x000C # '\f'
+             or code_point == 0x000A # '\n'
+             or code_point == 0x000D # '\r'
+             or code_point == 0x0009 # '\t'
+             or code_point == 0x000B # '\v'
+             # Categories Zl, Zp, and Zs without mention of "<noBreak>"
+             or (UNICODE_ATTRIBUTES[code_point]['name']
+                 and
+                 (UNICODE_ATTRIBUTES[code_point]['category'] in ['Zl', 'Zp']
+                  or
+                  (UNICODE_ATTRIBUTES[code_point]['category'] in ['Zs']
+                   and
+                   '<noBreak>' not in
+                   UNICODE_ATTRIBUTES[code_point]['decomposition']))))
+ 
+ def is_cntrl(code_point):
+     '''Checks whether the character with this code point is
+     a control character'''
+     return (UNICODE_ATTRIBUTES[code_point]['name']
+             and (UNICODE_ATTRIBUTES[code_point]['name'] == '<control>'
+                  or
+                  UNICODE_ATTRIBUTES[code_point]['category'] in ['Zl', 'Zp']))
+ 
+ def is_xdigit(code_point):
+     '''Checks whether the character with this code point is
+     a hexadecimal digit'''
+     if False:
+         return (is_digit(code_point)
+                 or (code_point >= 0x0041 and code_point <= 0x0046)
+                 or (code_point >= 0x0061 and code_point <= 0x0066))
+     else:
+         # SUSV2 gives us some freedom for the "xdigit" category, but ISO C 99
+         # takes it away:
+         # 7.25.2.1.12:
+         #    The iswxdigit function tests for any wide character that
+         #    corresponds to a hexadecimal-digit character (as defined
+         #    in 6.4.4.1).
+         # 6.4.4.1:
+         #    hexadecimal-digit: one of
+         #    0 1 2 3 4 5 6 7 8 9 a b c d e f A B C D E F
+         return ((code_point >= 0x0030 and code_point  <= 0x0039)
+                 or (code_point >= 0x0041 and code_point <= 0x0046)
+                 or (code_point >= 0x0061 and code_point <= 0x0066))
+ 
+ def is_graph(code_point):
+     '''Checks whether the character with this code point is
+     a graphical character'''
+     return (UNICODE_ATTRIBUTES[code_point]['name']
+             and UNICODE_ATTRIBUTES[code_point]['name'] != '<control>'
+             and not is_space(code_point))
+ 
+ def is_print(code_point):
+     '''Checks whether the character with this code point is printable'''
+     return (UNICODE_ATTRIBUTES[code_point]['name']
+             and UNICODE_ATTRIBUTES[code_point]['name'] != '<control>'
+             and UNICODE_ATTRIBUTES[code_point]['category'] not in ['Zl', 'Zp'])
+ 
+ def is_punct(code_point):
+     '''Checks whether the character with this code point is punctuation'''
+     if False:
+         return (UNICODE_ATTRIBUTES[code_point]['name']
+                 and UNICODE_ATTRIBUTES[code_point]['category'].startswith('P'))
+     else:
+         # The traditional POSIX definition of punctuation is every graphic,
+         # non-alphanumeric character.
+         return (is_graph(code_point)
+                 and not is_alpha(code_point)
+                 and not is_digit(code_point))
+ 
+ def is_combining(code_point):
+     '''Checks whether the character with this code point is
+     a combining character'''
+     # Up to Unicode 3.0.1 we took the Combining property from the PropList.txt
+     # file. In 3.0.1 it was identical to the union of the general categories
+     # "Mn", "Mc", "Me". In Unicode 3.1 this property has been dropped from the
+     # PropList.txt file, so we take the latter definition.
+     return (UNICODE_ATTRIBUTES[code_point]['name']
+             and
+             UNICODE_ATTRIBUTES[code_point]['category'] in ['Mn', 'Mc', 'Me'])
+ 
+ def is_combining_level3(code_point):
+     '''Checks whether the character with this code point is
+     a combining level3 character'''
+     return (is_combining(code_point)
+             and
+             int(UNICODE_ATTRIBUTES[code_point]['combining']) in range(0, 200))
+ 
+ def ucs_symbol(code_point):
+     '''Return the UCS symbol string for a Unicode character.'''
+     if code_point < 0x10000:
+         return '<U{:04X}>'.format(code_point)
+     else:
+         return '<U{:08X}>'.format(code_point)
+ 
+ def ucs_symbol_range(code_point_low, code_point_high):
+     '''Returns a string UCS symbol string for a code point range.
+ 
+     Example:
+ 
+     <U0041>..<U005A>
+     '''
+     return ucs_symbol(code_point_low) + '..' + ucs_symbol(code_point_high)
+ 
+ def verifications():
+     '''Tests whether the is_* functions observe the known restrictions'''
+     for code_point in sorted(UNICODE_ATTRIBUTES):
+         # toupper restriction: "Only characters specified for the keywords
+         # lower and upper shall be specified.
+         if (to_upper(code_point) != code_point
+             and not (is_lower(code_point) or is_upper(code_point))):
+             sys.stderr.write(
+                 ('%(sym)s is not upper|lower '
+                  + 'but toupper(0x%(c)04X) = 0x%(uc)04X\n') %{
+                     'sym': ucs_symbol(code_point),
+                     'c': code_point,
+                     'uc': to_upper(code_point)})
+         # tolower restriction: "Only characters specified for the keywords
+         # lower and upper shall be specified.
+         if (to_lower(code_point) != code_point
+             and not (is_lower(code_point) or is_upper(code_point))):
+             sys.stderr.write(
+                 ('%(sym)s is not upper|lower '
+                  + 'but tolower(0x%(c)04X) = 0x%(uc)04X\n') %{
+                     'sym': ucs_symbol(code_point),
+                     'c': code_point,
+                     'uc': to_lower(code_point)})
+         # alpha restriction: "Characters classified as either upper or lower
+         # shall automatically belong to this class.
+         if ((is_lower(code_point) or is_upper(code_point))
+              and not is_alpha(code_point)):
+             sys.stderr.write('%(sym)s is upper|lower but not alpha\n' %{
+                 'sym': ucs_symbol(code_point)})
+         # alpha restriction: “No character specified for the keywords cntrl,
+         # digit, punct or space shall be specified.”
+         if (is_alpha(code_point) and is_cntrl(code_point)):
+             sys.stderr.write('%(sym)s is alpha and cntrl\n' %{
+                 'sym': ucs_symbol(code_point)})
+         if (is_alpha(code_point) and is_digit(code_point)):
+             sys.stderr.write('%(sym)s is alpha and digit\n' %{
+                 'sym': ucs_symbol(code_point)})
+         if (is_alpha(code_point) and is_punct(code_point)):
+             sys.stderr.write('%(sym)s is alpha and punct\n' %{
+                 'sym': ucs_symbol(code_point)})
+         if (is_alpha(code_point) and is_space(code_point)):
+             sys.stderr.write('%(sym)s is alpha and space\n' %{
+                 'sym': ucs_symbol(code_point)})
+         # space restriction: “No character specified for the keywords upper,
+         # lower, alpha, digit, graph or xdigit shall be specified.”
+         # upper, lower, alpha already checked above.
+         if (is_space(code_point) and is_digit(code_point)):
+             sys.stderr.write('%(sym)s is space and digit\n' %{
+                 'sym': ucs_symbol(code_point)})
+         if (is_space(code_point) and is_graph(code_point)):
+             sys.stderr.write('%(sym)s is space and graph\n' %{
+                 'sym': ucs_symbol(code_point)})
+         if (is_space(code_point) and is_xdigit(code_point)):
+             sys.stderr.write('%(sym)s is space and xdigit\n' %{
+                 'sym': ucs_symbol(code_point)})
+         # cntrl restriction: “No character specified for the keywords upper,
+         # lower, alpha, digit, punct, graph, print or xdigit shall be
+         # specified.”  upper, lower, alpha already checked above.
+         if (is_cntrl(code_point) and is_digit(code_point)):
+             sys.stderr.write('%(sym)s is cntrl and digit\n' %{
+                 'sym': ucs_symbol(code_point)})
+         if (is_cntrl(code_point) and is_punct(code_point)):
+             sys.stderr.write('%(sym)s is cntrl and punct\n' %{
+                 'sym': ucs_symbol(code_point)})
+         if (is_cntrl(code_point) and is_graph(code_point)):
+             sys.stderr.write('%(sym)s is cntrl and graph\n' %{
+                 'sym': ucs_symbol(code_point)})
+         if (is_cntrl(code_point) and is_print(code_point)):
+             sys.stderr.write('%(sym)s is cntrl and print\n' %{
+                 'sym': ucs_symbol(code_point)})
+         if (is_cntrl(code_point) and is_xdigit(code_point)):
+             sys.stderr.write('%(sym)s is cntrl and xdigit\n' %{
+                 'sym': ucs_symbol(code_point)})
+         # punct restriction: “No character specified for the keywords upper,
+         # lower, alpha, digit, cntrl, xdigit or as the <space> character shall
+         # be specified.”  upper, lower, alpha, cntrl already checked above.
+         if (is_punct(code_point) and is_digit(code_point)):
+             sys.stderr.write('%(sym)s is punct and digit\n' %{
+                 'sym': ucs_symbol(code_point)})
+         if (is_punct(code_point) and is_xdigit(code_point)):
+             sys.stderr.write('%(sym)s is punct and xdigit\n' %{
+                 'sym': ucs_symbol(code_point)})
+         if (is_punct(code_point) and code_point == 0x0020):
+             sys.stderr.write('%(sym)s is punct\n' %{
+                 'sym': ucs_symbol(code_point)})
+         # graph restriction: “No character specified for the keyword cntrl
+         # shall be specified.”  Already checked above.
+ 
+         # print restriction: “No character specified for the keyword cntrl
+         # shall be specified.”  Already checked above.
+ 
+         # graph - print relation: differ only in the <space> character.
+         # How is this possible if there are more than one space character?!
+         # I think susv2/xbd/locale.html should speak of “space characters”,
+         # not “space character”.
+         if (is_print(code_point)
+             and not (is_graph(code_point) or is_space(code_point))):
+             sys.stderr.write('%(sym)s is print but not graph|<space>\n' %{
+                 'sym': unicode_utils.ucs_symbol(code_point)})
+         if (not is_print(code_point)
+             and (is_graph(code_point) or code_point == 0x0020)):
+             sys.stderr.write('%(sym)s is graph|<space> but not print\n' %{
+                 'sym': unicode_utils.ucs_symbol(code_point)})
diff -Nrcpad gcc-9.3.0/contrib/unicode/from_glibc/utf8_gen.py gcc-10.1.0/contrib/unicode/from_glibc/utf8_gen.py
*** gcc-9.3.0/contrib/unicode/from_glibc/utf8_gen.py	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/unicode/from_glibc/utf8_gen.py	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,364 ----
+ #!/usr/bin/python3
+ # -*- coding: utf-8 -*-
+ # Copyright (C) 2014-2019 Free Software Foundation, Inc.
+ # This file is part of the GNU C Library.
+ #
+ # The GNU C Library is free software; you can redistribute it and/or
+ # modify it under the terms of the GNU Lesser General Public
+ # License as published by the Free Software Foundation; either
+ # version 2.1 of the License, or (at your option) any later version.
+ #
+ # The GNU C Library is distributed in the hope that it will be useful,
+ # but WITHOUT ANY WARRANTY; without even the implied warranty of
+ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ # Lesser General Public License for more details.
+ #
+ # You should have received a copy of the GNU Lesser General Public
+ # License along with the GNU C Library; if not, see
+ # <https://www.gnu.org/licenses/>.
+ 
+ '''glibc/localedata/charmaps/UTF-8 file generator script
+ 
+ This script generates a glibc/localedata/charmaps/UTF-8 file
+ from Unicode data.
+ 
+ Usage: python3 utf8_gen.py UnicodeData.txt EastAsianWidth.txt
+ 
+ It will output UTF-8 file
+ '''
+ 
+ import argparse
+ import sys
+ import re
+ import unicode_utils
+ 
+ # Auxiliary tables for Hangul syllable names, see the Unicode 3.0 book,
+ # sections 3.11 and 4.4.
+ 
+ JAMO_INITIAL_SHORT_NAME = (
+     'G', 'GG', 'N', 'D', 'DD', 'R', 'M', 'B', 'BB', 'S', 'SS', '', 'J', 'JJ',
+     'C', 'K', 'T', 'P', 'H'
+ )
+ 
+ JAMO_MEDIAL_SHORT_NAME = (
+     'A', 'AE', 'YA', 'YAE', 'EO', 'E', 'YEO', 'YE', 'O', 'WA', 'WAE', 'OE',
+     'YO', 'U', 'WEO', 'WE', 'WI', 'YU', 'EU', 'YI', 'I'
+ )
+ 
+ JAMO_FINAL_SHORT_NAME = (
+     '', 'G', 'GG', 'GS', 'N', 'NI', 'NH', 'D', 'L', 'LG', 'LM', 'LB', 'LS',
+     'LT', 'LP', 'LH', 'M', 'B', 'BS', 'S', 'SS', 'NG', 'J', 'C', 'K', 'T',
+     'P', 'H'
+ )
+ 
+ def process_range(start, end, outfile, name):
+     '''Writes a range of code points into the CHARMAP section of the
+     output file
+ 
+     '''
+     if 'Hangul Syllable' in name:
+         # from glibc/localedata/ChangeLog:
+         #
+         #  2000-09-24  Bruno Haible  <haible@clisp.cons.org>
+         #  * charmaps/UTF-8: Expand <Hangul Syllable> and <Private Use> ranges,
+         #  so they become printable and carry a width. Comment out surrogate
+         #  ranges. Add a WIDTH table
+         #
+         # So we expand the Hangul Syllables here:
+         for i in range(int(start, 16), int(end, 16)+1 ):
+             index2, index3 = divmod(i - 0xaC00, 28)
+             index1, index2 = divmod(index2, 21)
+             hangul_syllable_name = 'HANGUL SYLLABLE ' \
+                                    + JAMO_INITIAL_SHORT_NAME[index1] \
+                                    + JAMO_MEDIAL_SHORT_NAME[index2] \
+                                    + JAMO_FINAL_SHORT_NAME[index3]
+             outfile.write('{:<11s} {:<12s} {:s}\n'.format(
+                 unicode_utils.ucs_symbol(i), convert_to_hex(i),
+                 hangul_syllable_name))
+         return
+     # UnicodeData.txt file has contains code point ranges like this:
+     #
+     # 3400;<CJK Ideograph Extension A, First>;Lo;0;L;;;;;N;;;;;
+     # 4DB5;<CJK Ideograph Extension A, Last>;Lo;0;L;;;;;N;;;;;
+     #
+     # The glibc UTF-8 file splits ranges like these into shorter
+     # ranges of 64 code points each:
+     #
+     # <U3400>..<U343F>     /xe3/x90/x80         <CJK Ideograph Extension A>
+     # …
+     # <U4D80>..<U4DB5>     /xe4/xb6/x80         <CJK Ideograph Extension A>
+     for i in range(int(start, 16), int(end, 16), 64 ):
+         if i > (int(end, 16)-64):
+             outfile.write('{:s}..{:s} {:<12s} {:s}\n'.format(
+                     unicode_utils.ucs_symbol(i),
+                     unicode_utils.ucs_symbol(int(end,16)),
+                     convert_to_hex(i),
+                     name))
+             break
+         outfile.write('{:s}..{:s} {:<12s} {:s}\n'.format(
+                 unicode_utils.ucs_symbol(i),
+                 unicode_utils.ucs_symbol(i+63),
+                 convert_to_hex(i),
+                 name))
+ 
+ def process_charmap(flines, outfile):
+     '''This function takes an array which contains *all* lines of
+     of UnicodeData.txt and write lines to outfile as used in the
+ 
+     CHARMAP
+     …
+     END CHARMAP
+ 
+     section of the UTF-8 file in glibc/localedata/charmaps/UTF-8.
+ 
+     Samples for input lines:
+ 
+     0010;<control>;Cc;0;BN;;;;;N;DATA LINK ESCAPE;;;;
+     3400;<CJK Ideograph Extension A, First>;Lo;0;L;;;;;N;;;;;
+     4DB5;<CJK Ideograph Extension A, Last>;Lo;0;L;;;;;N;;;;;
+     D800;<Non Private Use High Surrogate, First>;Cs;0;L;;;;;N;;;;;
+     DB7F;<Non Private Use High Surrogate, Last>;Cs;0;L;;;;;N;;;;;
+     100000;<Plane 16 Private Use, First>;Co;0;L;;;;;N;;;;;
+     10FFFD;<Plane 16 Private Use, Last>;Co;0;L;;;;;N;;;;;
+ 
+     Samples for output lines (Unicode-Value UTF-8-HEX Unicode-Char-Name):
+ 
+     <U0010>     /x10 DATA LINK ESCAPE
+     <U3400>..<U343F>     /xe3/x90/x80 <CJK Ideograph Extension A>
+     %<UD800>     /xed/xa0/x80 <Non Private Use High Surrogate, First>
+     %<UDB7F>     /xed/xad/xbf <Non Private Use High Surrogate, Last>
+     <U0010FFC0>..<U0010FFFD>     /xf4/x8f/xbf/x80 <Plane 16 Private Use>
+ 
+     '''
+     fields_start = []
+     for line in flines:
+         fields = line.split(";")
+          # Some characters have “<control>” as their name. We try to
+          # use the “Unicode 1.0 Name” (10th field in
+          # UnicodeData.txt) for them.
+          #
+          # The Characters U+0080, U+0081, U+0084 and U+0099 have
+          # “<control>” as their name but do not even have aa
+          # ”Unicode 1.0 Name”. We could write code to take their
+          # alternate names from NameAliases.txt.
+         if fields[1] == "<control>" and fields[10]:
+             fields[1] = fields[10]
+         # Handling code point ranges like:
+         #
+         # 3400;<CJK Ideograph Extension A, First>;Lo;0;L;;;;;N;;;;;
+         # 4DB5;<CJK Ideograph Extension A, Last>;Lo;0;L;;;;;N;;;;;
+         if fields[1].endswith(', First>') and not 'Surrogate,' in fields[1]:
+             fields_start = fields
+             continue
+         if fields[1].endswith(', Last>') and not 'Surrogate,' in fields[1]:
+             process_range(fields_start[0], fields[0],
+                           outfile, fields[1][:-7]+'>')
+             fields_start = []
+             continue
+         fields_start = []
+         if 'Surrogate,' in fields[1]:
+             # Comment out the surrogates in the UTF-8 file.
+             # One could of course skip them completely but
+             # the original UTF-8 file in glibc had them as
+             # comments, so we keep these comment lines.
+             outfile.write('%')
+         outfile.write('{:<11s} {:<12s} {:s}\n'.format(
+                 unicode_utils.ucs_symbol(int(fields[0], 16)),
+                 convert_to_hex(int(fields[0], 16)),
+                 fields[1]))
+ 
+ def convert_to_hex(code_point):
+     '''Converts a code point to a hexadecimal UTF-8 representation
+     like /x**/x**/x**.'''
+     # Getting UTF8 of Unicode characters.
+     # In Python3, .encode('UTF-8') does not work for
+     # surrogates. Therefore, we use this conversion table
+     surrogates = {
+         0xD800: '/xed/xa0/x80',
+         0xDB7F: '/xed/xad/xbf',
+         0xDB80: '/xed/xae/x80',
+         0xDBFF: '/xed/xaf/xbf',
+         0xDC00: '/xed/xb0/x80',
+         0xDFFF: '/xed/xbf/xbf',
+     }
+     if code_point in surrogates:
+         return surrogates[code_point]
+     return ''.join([
+         '/x{:02x}'.format(c) for c in chr(code_point).encode('UTF-8')
+     ])
+ 
+ def write_header_charmap(outfile):
+     '''Write the header on top of the CHARMAP section to the output file'''
+     outfile.write("<code_set_name> UTF-8\n")
+     outfile.write("<comment_char> %\n")
+     outfile.write("<escape_char> /\n")
+     outfile.write("<mb_cur_min> 1\n")
+     outfile.write("<mb_cur_max> 6\n\n")
+     outfile.write("% CHARMAP generated using utf8_gen.py\n")
+     outfile.write("% alias ISO-10646/UTF-8\n")
+     outfile.write("CHARMAP\n")
+ 
+ def write_header_width(outfile, unicode_version):
+     '''Writes the header on top of the WIDTH section to the output file'''
+     outfile.write('% Character width according to Unicode '
+                   + '{:s}.\n'.format(unicode_version))
+     outfile.write('% - Default width is 1.\n')
+     outfile.write('% - Double-width characters have width 2; generated from\n')
+     outfile.write('%        "grep \'^[^;]*;[WF]\' EastAsianWidth.txt"\n')
+     outfile.write('% - Non-spacing characters have width 0; '
+                   + 'generated from PropList.txt or\n')
+     outfile.write('%   "grep \'^[^;]*;[^;]*;[^;]*;[^;]*;NSM;\' '
+                   + 'UnicodeData.txt"\n')
+     outfile.write('% - Format control characters have width 0; '
+                   + 'generated from\n')
+     outfile.write("%   \"grep '^[^;]*;[^;]*;Cf;' UnicodeData.txt\"\n")
+ #   Not needed covered by Cf
+ #    outfile.write("% - Zero width characters have width 0; generated from\n")
+ #    outfile.write("%   \"grep '^[^;]*;ZERO WIDTH ' UnicodeData.txt\"\n")
+     outfile.write("WIDTH\n")
+ 
+ def process_width(outfile, ulines, elines, plines):
+     '''ulines are lines from UnicodeData.txt, elines are lines from
+     EastAsianWidth.txt containing characters with width “W” or “F”,
+     plines are lines from PropList.txt which contain characters
+     with the property “Prepended_Concatenation_Mark”.
+ 
+     '''
+     width_dict = {}
+     for line in elines:
+         fields = line.split(";")
+         if not '..' in fields[0]:
+             code_points = (fields[0], fields[0])
+         else:
+             code_points = fields[0].split("..")
+         for key in range(int(code_points[0], 16),
+                          int(code_points[1], 16)+1):
+             width_dict[key] = 2
+ 
+     for line in ulines:
+         fields = line.split(";")
+         if fields[4] == "NSM" or fields[2] in ("Cf", "Me", "Mn"):
+             width_dict[int(fields[0], 16)] = 0
+ 
+     for line in plines:
+         # Characters with the property “Prepended_Concatenation_Mark”
+         # should have the width 1:
+         fields = line.split(";")
+         if not '..' in fields[0]:
+             code_points = (fields[0], fields[0])
+         else:
+             code_points = fields[0].split("..")
+         for key in range(int(code_points[0], 16),
+                          int(code_points[1], 16)+1):
+             del width_dict[key] # default width is 1
+ 
+     # handle special cases for compatibility
+     for key in list((0x00AD,)):
+         # https://www.cs.tut.fi/~jkorpela/shy.html
+         if key in width_dict:
+             del width_dict[key] # default width is 1
+     for key in list(range(0x1160, 0x1200)):
+         width_dict[key] = 0
+     for key in list(range(0x3248, 0x3250)):
+         # These are “A” which means we can decide whether to treat them
+         # as “W” or “N” based on context:
+         # http://www.unicode.org/mail-arch/unicode-ml/y2017-m08/0023.html
+         # For us, “W” seems better.
+         width_dict[key] = 2
+     for key in list(range(0x4DC0, 0x4E00)):
+         width_dict[key] = 2
+ 
+     same_width_lists = []
+     current_width_list = []
+     for key in sorted(width_dict):
+         if not current_width_list:
+             current_width_list = [key]
+         elif (key == current_width_list[-1] + 1
+               and width_dict[key] == width_dict[current_width_list[0]]):
+             current_width_list.append(key)
+         else:
+             same_width_lists.append(current_width_list)
+             current_width_list = [key]
+     if current_width_list:
+         same_width_lists.append(current_width_list)
+ 
+     for same_width_list in same_width_lists:
+         if len(same_width_list) == 1:
+             outfile.write('{:s}\t{:d}\n'.format(
+                 unicode_utils.ucs_symbol(same_width_list[0]),
+                 width_dict[same_width_list[0]]))
+         else:
+             outfile.write('{:s}...{:s}\t{:d}\n'.format(
+                 unicode_utils.ucs_symbol(same_width_list[0]),
+                 unicode_utils.ucs_symbol(same_width_list[-1]),
+                 width_dict[same_width_list[0]]))
+ 
+ if __name__ == "__main__":
+     PARSER = argparse.ArgumentParser(
+         description='''
+         Generate a UTF-8 file from UnicodeData.txt, EastAsianWidth.txt, and PropList.txt.
+         ''')
+     PARSER.add_argument(
+         '-u', '--unicode_data_file',
+         nargs='?',
+         type=str,
+         default='UnicodeData.txt',
+         help=('The UnicodeData.txt file to read, '
+               + 'default: %(default)s'))
+     PARSER.add_argument(
+         '-e', '--east_asian_with_file',
+         nargs='?',
+         type=str,
+         default='EastAsianWidth.txt',
+         help=('The EastAsianWidth.txt file to read, '
+               + 'default: %(default)s'))
+     PARSER.add_argument(
+         '-p', '--prop_list_file',
+         nargs='?',
+         type=str,
+         default='PropList.txt',
+         help=('The PropList.txt file to read, '
+               + 'default: %(default)s'))
+     PARSER.add_argument(
+         '--unicode_version',
+         nargs='?',
+         required=True,
+         type=str,
+         help='The Unicode version of the input files used.')
+     ARGS = PARSER.parse_args()
+ 
+     with open(ARGS.unicode_data_file, mode='r') as UNIDATA_FILE:
+         UNICODE_DATA_LINES = UNIDATA_FILE.readlines()
+     with open(ARGS.east_asian_with_file, mode='r') as EAST_ASIAN_WIDTH_FILE:
+         EAST_ASIAN_WIDTH_LINES = []
+         for LINE in EAST_ASIAN_WIDTH_FILE:
+             # If characters from EastAasianWidth.txt which are from
+             # from reserved ranges (i.e. not yet assigned code points)
+             # are added to the WIDTH section of the UTF-8 file, then
+             # “make check” produces “Unknown Character” errors for
+             # these code points because such unassigned code points
+             # are not in the CHARMAP section of the UTF-8 file.
+             #
+             # Therefore, we skip all reserved code points when reading
+             # the EastAsianWidth.txt file.
+             if re.match(r'.*<reserved-.+>\.\.<reserved-.+>.*', LINE):
+                 continue
+             if re.match(r'^[^;]*;[WF]', LINE):
+                 EAST_ASIAN_WIDTH_LINES.append(LINE.strip())
+     with open(ARGS.prop_list_file, mode='r') as PROP_LIST_FILE:
+         PROP_LIST_LINES = []
+         for LINE in PROP_LIST_FILE:
+             if re.match(r'^[^;]*;[\s]*Prepended_Concatenation_Mark', LINE):
+                 PROP_LIST_LINES.append(LINE.strip())
+     with open('UTF-8', mode='w') as OUTFILE:
+         # Processing UnicodeData.txt and write CHARMAP to UTF-8 file
+         write_header_charmap(OUTFILE)
+         process_charmap(UNICODE_DATA_LINES, OUTFILE)
+         OUTFILE.write("END CHARMAP\n\n")
+         # Processing EastAsianWidth.txt and write WIDTH to UTF-8 file
+         write_header_width(OUTFILE, ARGS.unicode_version)
+         process_width(OUTFILE,
+                       UNICODE_DATA_LINES,
+                       EAST_ASIAN_WIDTH_LINES,
+                       PROP_LIST_LINES)
+         OUTFILE.write("END WIDTH\n")
diff -Nrcpad gcc-9.3.0/contrib/unicode/gen_wcwidth.py gcc-10.1.0/contrib/unicode/gen_wcwidth.py
*** gcc-9.3.0/contrib/unicode/gen_wcwidth.py	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/unicode/gen_wcwidth.py	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,106 ----
+ #!/usr/bin/env python3
+ #
+ # Script to generate tables for cpp_wcwidth, leveraging glibc's utf8_gen.py.
+ #
+ # This file is part of GCC.
+ #
+ # GCC is free software; you can redistribute it and/or modify it under
+ # the terms of the GNU General Public License as published by the Free
+ # Software Foundation; either version 3, or (at your option) any later
+ # version.
+ #
+ # GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+ # WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ # FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ # for more details.
+ #
+ # You should have received a copy of the GNU General Public License
+ # along with GCC; see the file COPYING3.  If not see
+ # <http://www.gnu.org/licenses/>.  */
+ 
+ import sys
+ import os
+ 
+ if len(sys.argv) != 2:
+     print("usage: %s <unicode version>", file=sys.stderr)
+     sys.exit(1)
+ unicode_version = sys.argv[1]
+ 
+ # Parse a codepoint in the format output by glibc tools.
+ def parse_ucn(s):
+     if not (s.startswith("<U") and s.endswith(">")):
+         raise ValueError
+     return int(s[2:-1], base=16)
+ 
+ # Process a line of width output from utf_gen.py and update global array.
+ widths = [1] * (1 + 0x10FFFF)
+ def process_width(line):
+     # Example lines:
+     # <UA8FF>	0
+     # <UA926>...<UA92D>	0
+ 
+     s = line.split()
+     width = int(s[1])
+     r = s[0].split("...")
+     if len(r) == 1:
+         begin = parse_ucn(r[0])
+         end = begin + 1
+     elif len(r) == 2:
+         begin = parse_ucn(r[0])
+         end = parse_ucn(r[1]) + 1
+     else:
+         raise ValueError
+     widths[begin:end] = [width] * (end - begin)
+ 
+ # To keep things simple, we use glibc utf8_gen.py as-is.  It only outputs to a
+ # file named UTF-8, which is not configurable.  Then we parse this into the form
+ # we want it.
+ os.system("from_glibc/utf8_gen.py --unicode_version %s" % unicode_version)
+ processing = False
+ for line in open("UTF-8", "r"):
+     if processing:
+         if line == "END WIDTH\n":
+             processing = False
+         else:
+             try:
+                 process_width(line)
+             except (ValueError, IndexError):
+                 print(e, "warning: ignored unexpected line: %s" % line,
+                         file=sys.stderr, end="")
+     elif line == "WIDTH\n":
+         processing = True
+ 
+ # All bytes < 256 we treat as width 1.
+ widths[0:255] = [1] * 255
+ 
+ # Condense the list to contiguous ranges.
+ cur_range = [-1, 1]
+ all_ranges = []
+ for i, width in enumerate(widths):
+     if width == cur_range[1]:
+         cur_range[0] = i
+     else:
+         all_ranges.append(cur_range)
+         cur_range = [i, width]
+ 
+ # Output the arrays for generated_cpp_wcwidth.h
+ print("/*  Generated by contrib/unicode/gen_wcwidth.py,",
+           "with the help of glibc's")
+ print("    utf8_gen.py, using version %s" % unicode_version,
+           "of the Unicode standard.  */")
+ print("\nstatic const cppchar_t wcwidth_range_ends[] = {", end="")
+ for i, r in enumerate(all_ranges):
+     if i % 8:
+         print(" ", end="")
+     else:
+         print("\n  ", end="")
+     print("0x%x," % (r[0]), end="")
+ print("\n};\n")
+ print("static const unsigned char wcwidth_widths[] = {", end="")
+ for i, r in enumerate(all_ranges):
+     if i % 24:
+         print(" ", end="")
+     else:
+         print("\n  ", end="")
+     print("%d," % r[1], end="")
+ print("\n};")
diff -Nrcpad gcc-9.3.0/contrib/unicode/unicode-license.txt gcc-10.1.0/contrib/unicode/unicode-license.txt
*** gcc-9.3.0/contrib/unicode/unicode-license.txt	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/contrib/unicode/unicode-license.txt	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,50 ----
+ ﻿UNICODE, INC. LICENSE AGREEMENT - DATA FILES AND SOFTWARE
+ 
+     Unicode Data Files include all data files under the directories
+ http://www.unicode.org/Public/, http://www.unicode.org/reports/, and
+ http://www.unicode.org/cldr/data/. Unicode Data Files do not include PDF
+ online code charts under the directory http://www.unicode.org/Public/.
+ Software includes any source code published in the Unicode Standard or under
+ the directories http://www.unicode.org/Public/,
+ http://www.unicode.org/reports/, and http://www.unicode.org/cldr/data/.
+ 
+     NOTICE TO USER: Carefully read the following legal agreement. BY
+ DOWNLOADING, INSTALLING, COPYING OR OTHERWISE USING UNICODE INC.'S DATA FILES
+ ("DATA FILES"), AND/OR SOFTWARE ("SOFTWARE"), YOU UNEQUIVOCALLY ACCEPT, AND
+ AGREE TO BE BOUND BY, ALL OF THE TERMS AND CONDITIONS OF THIS AGREEMENT. IF
+ YOU DO NOT AGREE, DO NOT DOWNLOAD, INSTALL, COPY, DISTRIBUTE OR USE THE DATA
+ FILES OR SOFTWARE.
+ 
+     COPYRIGHT AND PERMISSION NOTICE
+ 
+     Copyright © 1991-2013 Unicode, Inc. All rights reserved. Distributed under
+ the Terms of Use in http://www.unicode.org/copyright.html.
+ 
+     Permission is hereby granted, free of charge, to any person obtaining a
+ copy of the Unicode data files and any associated documentation (the "Data
+ Files") or Unicode software and any associated documentation (the "Software")
+ to deal in the Data Files or Software without restriction, including without
+ limitation the rights to use, copy, modify, merge, publish, distribute, and/or
+ sell copies of the Data Files or Software, and to permit persons to whom the
+ Data Files or Software are furnished to do so, provided that (a) the above
+ copyright notice(s) and this permission notice appear with all copies of the
+ Data Files or Software, (b) both the above copyright notice(s) and this
+ permission notice appear in associated documentation, and (c) there is clear
+ notice in each modified Data File or in the Software as well as in the
+ documentation associated with the Data File(s) or Software that the data or
+ software has been modified.
+ 
+     THE DATA FILES AND SOFTWARE ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
+ KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD
+ PARTY RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN
+ THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL
+ DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS
+ ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THE
+ DATA FILES OR SOFTWARE.
+ 
+     Except as contained in this notice, the name of a copyright holder shall
+ not be used in advertising or otherwise to promote the sale, use or other
+ dealings in these Data Files or Software without prior written authorization
+ of the copyright holder.
diff -Nrcpad gcc-9.3.0/contrib/update-copyright.py gcc-10.1.0/contrib/update-copyright.py
*** gcc-9.3.0/contrib/update-copyright.py	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/update-copyright.py	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  #!/usr/bin/python
  #
! # Copyright (C) 2013-2018 Free Software Foundation, Inc.
  #
  # This script is free software; you can redistribute it and/or modify
  # it under the terms of the GNU General Public License as published by
--- 1,6 ----
  #!/usr/bin/python
  #
! # Copyright (C) 2013-2020 Free Software Foundation, Inc.
  #
  # This script is free software; you can redistribute it and/or modify
  # it under the terms of the GNU General Public License as published by
*************** class GenericFilter:
*** 75,80 ****
--- 75,81 ----
                  'COPYING3',
                  'COPYING3.LIB',
                  'LICENSE',
+                 'LICENSE.txt',
                  'fdl.texi',
                  'gpl_v3.texi',
                  'fdl-1.3.xml',
*************** class GCCCopyright (Copyright):
*** 693,698 ****
--- 694,700 ----
          self.add_external_author ('Information Technology Industry Council.')
          self.add_external_author ('James Theiler, Brian Gough')
          self.add_external_author ('Makoto Matsumoto and Takuji Nishimura,')
+         self.add_external_author ('Mentor Graphics Corporation')
          self.add_external_author ('National Research Council of Canada.')
          self.add_external_author ('NVIDIA Corporation')
          self.add_external_author ('Peter Dimov and Multi Media Ltd.')
*************** class GCCCopyright (Copyright):
*** 710,715 ****
--- 712,718 ----
          self.add_external_author ('The Regents of the University of California.')
          self.add_external_author ('Unicode, Inc.')
          self.add_external_author ('University of Toronto.')
+         self.add_external_author ('Yoshinori Sato')
  
  class GCCCmdLine (CmdLine):
      def __init__ (self):
diff -Nrcpad gcc-9.3.0/contrib/vimrc gcc-10.1.0/contrib/vimrc
*** gcc-9.3.0/contrib/vimrc	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/contrib/vimrc	Thu May  7 10:49:59 2020
***************
*** 28,47 ****
  
  function! SetStyle()
    let l:fname = expand("%:p")
    if stridx(l:fname, 'libsanitizer') != -1
      return
    endif
!   let l:ext = fnamemodify(l:fname, ":e")
!   let l:c_exts = ['c', 'h', 'cpp', 'cc', 'C', 'H', 'def', 'java']
!   if index(l:c_exts, l:ext) != -1
!     setlocal cindent
      setlocal tabstop=8
      setlocal softtabstop=2
      setlocal shiftwidth=2
      setlocal noexpandtab
      setlocal cinoptions=>4,n-2,{2,^-2,:2,=2,g0,f0,h2,p4,t0,+2,(0,u0,w1,m0
-     setlocal textwidth=80
-     setlocal formatoptions-=ro formatoptions+=cqlt
    endif
  endfunction
  
--- 28,49 ----
  
  function! SetStyle()
    let l:fname = expand("%:p")
+   let l:ext = fnamemodify(l:fname, ":e")
+   let l:c_exts = ['c', 'h', 'cpp', 'cc', 'C', 'H', 'def', 'java']
    if stridx(l:fname, 'libsanitizer') != -1
      return
    endif
!   if l:ext != "py"
      setlocal tabstop=8
      setlocal softtabstop=2
      setlocal shiftwidth=2
      setlocal noexpandtab
+   endif
+   setlocal textwidth=80
+   setlocal formatoptions-=ro formatoptions+=cqlt
+   if index(l:c_exts, l:ext) != -1
+     setlocal cindent
      setlocal cinoptions=>4,n-2,{2,^-2,:2,=2,g0,f0,h2,p4,t0,+2,(0,u0,w1,m0
    endif
  endfunction
  
diff -Nrcpad gcc-9.3.0/fixincludes/ChangeLog gcc-10.1.0/fixincludes/ChangeLog
*** gcc-9.3.0/fixincludes/ChangeLog	Thu Mar 12 11:08:02 2020
--- gcc-10.1.0/fixincludes/ChangeLog	Thu May  7 10:50:31 2020
***************
*** 1,18 ****
! 2020-03-12  Release Manager
  
! 	* GCC 9.3.0 released.
  
! 2020-02-26  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	Backport from trunk
! 	2020-02-13  Matheus Castanho  <msc@linux.ibm.com>
  
  	* fixinc.in: Skip machine_name fix on powerpc*-*-linux*.
  
! 2020-01-01  John David Anglin  <danglin@gcc.gnu.org>
  
! 	Backport from mainline
! 	2019-12-30  John David Anglin  <danglin@gcc.gnu.org>
  
  	PR libgomp/93066
  	* inclhack.def (hpux_c99_inttypes3): Fix defines for INTPTR_MAX
--- 1,27 ----
! 2020-05-07  Release Manager
  
! 	* GCC 10.1.0 released.
  
! 2020-02-20  Alexandre Oliva <oliva@adacore.com>
  
! 	* mkheaders.in: Don't require build-time shell on host.
! 
! 2020-02-13  Matheus Castanho  <msc@linux.ibm.com>
  
  	* fixinc.in: Skip machine_name fix on powerpc*-*-linux*.
  
! 2020-02-13  Alexandre Oliva <oliva@adacore.com>
  
! 	* mkheaders.in: Re-create subdirs, copy limits.h into subdir.
! 	* mkfixinc.sh: Create dummy fixinc for *-*-vxworks7*.
! 
! 2020-01-25  John David Anglin  <danglin@gcc.gnu.org>
! 
! 	* inclhack.def (hpux_c99_inttypes4): New, add missing SCNuMAX defines.
! 	* fixincl.x: Regenerate.
! 	* tests/base/inttypes.h: Update for above fix.
! 
! 2019-12-30  John David Anglin  <danglin@gcc.gnu.org>
  
  	PR libgomp/93066
  	* inclhack.def (hpux_c99_inttypes3): Fix defines for INTPTR_MAX
***************
*** 20,45 ****
  	* fixincl.x: Regenerate.
  	* tests/base/inttypes.h: Update for above fix.
  
! 2019-08-21  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline.
! 	2019-08-18  C.G. Dogan <gcc+cgdogan.00@gmail.com>
! 		    Iain Sandoe  <iain@sandoe.co.uk>
  
  	PR target/83531
! 	* inclhack.def (darwin_api_availability): New; strip leading
  	underscores from API_XXXX defines.
  	* fixincl.x: Regenerate.
  	* tests/base/os/availability.h: New file.
  
! 2019-08-12  Release Manager
! 
! 	* GCC 9.2.0 released.
! 
! 2019-08-03  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline.
! 	2019-06-21  Iain Sandoe  <iain@sandoe.co.uk>
  
  	* inclhack.def: Replace the complex test using __STRICT_ANSI__ and
  	__STDC_VERSION__ with a test using __DARWIN_NO_LONG_LONG.
--- 29,44 ----
  	* fixincl.x: Regenerate.
  	* tests/base/inttypes.h: Update for above fix.
  
! 2019-08-18  C.G. Dogan <gcc+cgdogan.00@gmail.com>
! 	    Iain Sandoe  <iain@sandoe.co.uk>
  
  	PR target/83531
! 	* inclhack.def (darwin_api_availability): New, strip leading
  	underscores from API_XXXX defines.
  	* fixincl.x: Regenerate.
  	* tests/base/os/availability.h: New file.
  
! 2019-06-21  Iain Sandoe  <iain@sandoe.co.uk>
  
  	* inclhack.def: Replace the complex test using __STRICT_ANSI__ and
  	__STDC_VERSION__ with a test using __DARWIN_NO_LONG_LONG.
***************
*** 49,58 ****
  	* tests/base/architecture/ppc/math.h: Update test to include the
  	__DARWIN_NO_LONG_LONG case.
  
! 2019-08-03  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline.
! 	2019-06-21  Iain Sandoe  <iain@sandoe.co.uk>
  
  	* inclhack.def: Guard __has_attribute and __has_extension in
  	os/base.h.
--- 48,54 ----
  	* tests/base/architecture/ppc/math.h: Update test to include the
  	__DARWIN_NO_LONG_LONG case.
  
! 2019-06-21  Iain Sandoe  <iain@sandoe.co.uk>
  
  	* inclhack.def: Guard __has_attribute and __has_extension in
  	os/base.h.
***************
*** 61,81 ****
  	* tests/base/dispatch/object.h: New file.
  	* tests/base/os/base.h: New file.
  
! 2019-05-13  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline.
! 	2019-05-11  Iain Sandoe  <iain@sandoe.co.uk>
! 
  	PR target/90379
  	PR bootstrap/89864
  	* inclhack.def (darwin_ucred__Atomic): Do not supply test_text
  	for wrap fixes.
  	* fixincl.x: Regenerated.
  
- 2019-05-03  Release Manager
- 
- 	* GCC 9.1.0 released.
- 
  2019-04-18  Erik Schnetter  <schnetter@gmail.com>
  	  Jakub Jelinek  <jakub@redhat.com>
  	  Iain Sandoe  <iain@sandoe.co.uk>
--- 57,69 ----
  	* tests/base/dispatch/object.h: New file.
  	* tests/base/os/base.h: New file.
  
! 2019-05-11  Iain Sandoe  <iain@sandoe.co.uk>
  	PR target/90379
  	PR bootstrap/89864
  	* inclhack.def (darwin_ucred__Atomic): Do not supply test_text
  	for wrap fixes.
  	* fixincl.x: Regenerated.
  
  2019-04-18  Erik Schnetter  <schnetter@gmail.com>
  	  Jakub Jelinek  <jakub@redhat.com>
  	  Iain Sandoe  <iain@sandoe.co.uk>
diff -Nrcpad gcc-9.3.0/fixincludes/fixincl.x gcc-10.1.0/fixincludes/fixincl.x
*** gcc-9.3.0/fixincludes/fixincl.x	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/fixincludes/fixincl.x	Thu May  7 10:49:59 2020
***************
*** 2,12 ****
   *
   * DO NOT EDIT THIS FILE   (fixincl.x)
   *
!  * It has been AutoGen-ed  January  1, 2020 at 11:59:56 AM by AutoGen 5.18.16
   * From the definitions    inclhack.def
   * and the template file   fixincl
   */
! /* DO NOT SVN-MERGE THIS FILE, EITHER Wed Jan  1 11:59:56 EST 2020
   *
   * You must regenerate it.  Use the ./genfixes script.
   *
--- 2,12 ----
   *
   * DO NOT EDIT THIS FILE   (fixincl.x)
   *
!  * It has been AutoGen-ed  January 25, 2020 at 12:15:43 PM by AutoGen 5.18.16
   * From the definitions    inclhack.def
   * and the template file   fixincl
   */
! /* DO NOT SVN-MERGE THIS FILE, EITHER Sat Jan 25 12:15:43 EST 2020
   *
   * You must regenerate it.  Use the ./genfixes script.
   *
***************
*** 15,21 ****
   * certain ANSI-incompatible system header files which are fixed to work
   * correctly with ANSI C and placed in a directory that GNU C will search.
   *
!  * This file contains 257 fixup descriptions.
   *
   * See README for more information.
   *
--- 15,21 ----
   * certain ANSI-incompatible system header files which are fixed to work
   * correctly with ANSI C and placed in a directory that GNU C will search.
   *
!  * This file contains 258 fixup descriptions.
   *
   * See README for more information.
   *
*************** static const char* apzHpux_C99_Inttypes3
*** 5198,5203 ****
--- 5198,5234 ----
  
  /* * * * * * * * * * * * * * * * * * * * * * * * * *
   *
+  *  Description of Hpux_C99_Inttypes4 fix
+  */
+ tSCC zHpux_C99_Inttypes4Name[] =
+      "hpux_c99_inttypes4";
+ 
+ /*
+  *  File name selection pattern
+  */
+ tSCC zHpux_C99_Inttypes4List[] =
+   "inttypes.h\0";
+ /*
+  *  Machine/OS name selection pattern
+  */
+ tSCC* apzHpux_C99_Inttypes4Machs[] = {
+         "hppa*-hp-hpux11.[01]*",
+         (const char*)NULL };
+ #define HPUX_C99_INTTYPES4_TEST_CT  0
+ #define aHpux_C99_Inttypes4Tests   (tTestDesc*)NULL
+ 
+ /*
+  *  Fix Command Arguments for Hpux_C99_Inttypes4
+  */
+ static const char* apzHpux_C99_Inttypes4Patch[] = { sed_cmd_z,
+     "-e", "/^[ \t]*#[ \t]*define[ \t]*SCNxMAX[ \t]*SCNx64/a\\\n\
+ #define SCNuMAX \t SCNu64\n",
+     "-e", "/^[ \t]*#[ \t]*define[ \t]*SCNxMAX[ \t]*SCNx32/a\\\n\
+ #define SCNuMAX \t SCNu32\n",
+     (char*)NULL };
+ 
+ /* * * * * * * * * * * * * * * * * * * * * * * * * *
+  *
   *  Description of Hpux_Ctype_Macros fix
   */
  tSCC zHpux_Ctype_MacrosName[] =
*************** static const char* apzX11_SprintfPatch[]
*** 10447,10453 ****
   */
  #define REGEX_COUNT          296
  #define MACH_LIST_SIZE_LIMIT 187
! #define FIX_COUNT            257
  
  /*
   *  Enumerate the fixes
--- 10478,10484 ----
   */
  #define REGEX_COUNT          296
  #define MACH_LIST_SIZE_LIMIT 187
! #define FIX_COUNT            258
  
  /*
   *  Enumerate the fixes
*************** typedef enum {
*** 10577,10582 ****
--- 10608,10614 ----
      HPUX_C99_INTTYPES_FIXIDX,
      HPUX_C99_INTTYPES2_FIXIDX,
      HPUX_C99_INTTYPES3_FIXIDX,
+     HPUX_C99_INTTYPES4_FIXIDX,
      HPUX_CTYPE_MACROS_FIXIDX,
      HPUX_EXTERN_ERRNO_FIXIDX,
      HPUX_HTONL_FIXIDX,
*************** tFixDesc fixDescList[ FIX_COUNT ] = {
*** 11333,11338 ****
--- 11365,11375 ----
       HPUX_C99_INTTYPES3_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
       aHpux_C99_Inttypes3Tests,   apzHpux_C99_Inttypes3Patch, 0 },
  
+   {  zHpux_C99_Inttypes4Name,    zHpux_C99_Inttypes4List,
+      apzHpux_C99_Inttypes4Machs,
+      HPUX_C99_INTTYPES4_TEST_CT, FD_MACH_ONLY,
+      aHpux_C99_Inttypes4Tests,   apzHpux_C99_Inttypes4Patch, 0 },
+ 
    {  zHpux_Ctype_MacrosName,    zHpux_Ctype_MacrosList,
       apzHpux_Ctype_MacrosMachs,
       HPUX_CTYPE_MACROS_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
diff -Nrcpad gcc-9.3.0/fixincludes/inclhack.def gcc-10.1.0/fixincludes/inclhack.def
*** gcc-9.3.0/fixincludes/inclhack.def	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/fixincludes/inclhack.def	Thu May  7 10:49:59 2020
*************** fix = {
*** 2614,2619 ****
--- 2614,2634 ----
  };
  
  /*
+  * Fix missing SCNuMAX defines in inttypes.h
+  */
+ fix = {
+     hackname  = hpux_c99_inttypes4;
+     mach      = "hppa*-hp-hpux11.[01]*";
+     files     = inttypes.h;
+     sed       = "/^[ \t]*#[ \t]*define[ \t]*SCNxMAX[ \t]*SCNx64/a\\\n"
+ 		"#define SCNuMAX \t SCNu64\n";
+     sed       = "/^[ \t]*#[ \t]*define[ \t]*SCNxMAX[ \t]*SCNx32/a\\\n"
+ 		"#define SCNuMAX \t SCNu32\n";
+     test_text = "#define SCNxMAX SCNx64\n"
+ 		"#define SCNxMAX SCNx32\n";
+ };
+ 
+ /*
   *  Fix hpux broken ctype macros
   */
  fix = {
diff -Nrcpad gcc-9.3.0/fixincludes/mkfixinc.sh gcc-10.1.0/fixincludes/mkfixinc.sh
*** gcc-9.3.0/fixincludes/mkfixinc.sh	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/fixincludes/mkfixinc.sh	Thu May  7 10:49:59 2020
*************** case $machine in
*** 19,24 ****
--- 19,25 ----
      powerpc-*-rtems*   | \
      powerpcle-*-eabisim* | \
      powerpcle-*-eabi* | \
+     *-*-vxworks7* | \
      *-musl* )
  	#  IF there is no include fixing,
  	#  THEN create a no-op fixer and exit
diff -Nrcpad gcc-9.3.0/fixincludes/mkheaders.in gcc-10.1.0/fixincludes/mkheaders.in
*** gcc-9.3.0/fixincludes/mkheaders.in	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/fixincludes/mkheaders.in	Thu May  7 10:49:59 2020
*************** libexecsubdir=${libexecdir}/gcc/${target
*** 77,96 ****
  itoolsdir=${libexecsubdir}/install-tools
  itoolsdatadir=${libsubdir}/install-tools
  incdir=${libsubdir}/include-fixed
! mkinstalldirs="@SHELL@ ${itoolsdir}/mkinstalldirs"
  
  cd ${itoolsdir}
  rm -rf ${incdir}/*
  
  for ml in `cat ${itoolsdatadir}/fixinc_list`; do
    sysroot_headers_suffix=`echo ${ml} | sed -e 's/;.*$//'`
    multi_dir=`echo ${ml} | sed -e 's/^[^;]*;//'`
    subincdir=${incdir}${multi_dir}
    . ${itoolsdatadir}/mkheaders.conf
    if [ x${STMP_FIXINC} != x ] ; then
  	TARGET_MACHINE="${target}" target_canonical="${target}" \
  	    MACRO_LIST="${itoolsdatadir}/macro_list" \
! 	    @SHELL@ ./fixinc.sh ${subincdir} \
  	    ${isysroot}${SYSTEM_HEADER_DIR} ${OTHER_FIXINCLUDES_DIRS}
  	rm -f ${subincdir}/syslimits.h
  	if [ -f ${subincdir}/limits.h ]; then
--- 77,115 ----
  itoolsdir=${libexecsubdir}/install-tools
  itoolsdatadir=${libsubdir}/install-tools
  incdir=${libsubdir}/include-fixed
! mkinstalldirs="${itoolsdir}/mkinstalldirs"
  
  cd ${itoolsdir}
  rm -rf ${incdir}/*
  
+ for shell in $CONFIG_SHELL $SHELL @SHELL@ /bin/sh ""; do
+   if { test -x $shell || test -x $shell.exe; } \
+   && $shell $mkinstalldirs > /dev/null 2>&1; then
+     mkinstalldirs="$shell $mkinstalldirs"
+     break
+   elif test x$shell = x; then
+     if $mkinstalldirs > /dev/null 2>&1; then
+       break
+     elif test ! -f $mkinstalldirs; then
+       echo mkheaders: could not find $mkinstalldirs >&2
+       exit 1
+     else
+       echo mkheaders: please rerun with CONFIG_SHELL set to a working Bourne shell >&2
+       exit 1
+     fi
+   fi
+ done
+ 
  for ml in `cat ${itoolsdatadir}/fixinc_list`; do
    sysroot_headers_suffix=`echo ${ml} | sed -e 's/;.*$//'`
    multi_dir=`echo ${ml} | sed -e 's/^[^;]*;//'`
    subincdir=${incdir}${multi_dir}
+   ${mkinstalldirs} ${subincdir}
    . ${itoolsdatadir}/mkheaders.conf
    if [ x${STMP_FIXINC} != x ] ; then
  	TARGET_MACHINE="${target}" target_canonical="${target}" \
  	    MACRO_LIST="${itoolsdatadir}/macro_list" \
! 	    $shell ./fixinc.sh ${subincdir} \
  	    ${isysroot}${SYSTEM_HEADER_DIR} ${OTHER_FIXINCLUDES_DIRS}
  	rm -f ${subincdir}/syslimits.h
  	if [ -f ${subincdir}/limits.h ]; then
*************** for ml in `cat ${itoolsdatadir}/fixinc_l
*** 100,104 ****
  	fi
    fi
  
!   cp ${itoolsdatadir}/include${multi_dir}/limits.h ${subincdir}
  done
--- 119,123 ----
  	fi
    fi
  
!   cp ${itoolsdatadir}/include${multi_dir}/limits.h ${subincdir}/limits.h
  done
diff -Nrcpad gcc-9.3.0/fixincludes/tests/base/inttypes.h gcc-10.1.0/fixincludes/tests/base/inttypes.h
*** gcc-9.3.0/fixincludes/tests/base/inttypes.h	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/fixincludes/tests/base/inttypes.h	Thu May  7 10:49:59 2020
***************
*** 33,35 ****
--- 33,44 ----
  #endif
  
  #endif  /* HPUX_C99_INTTYPES3_CHECK */
+ 
+ 
+ #if defined( HPUX_C99_INTTYPES4_CHECK )
+ #define SCNxMAX SCNx64
+ #define SCNuMAX 	 SCNu64
+ #define SCNxMAX SCNx32
+ #define SCNuMAX 	 SCNu32
+ 
+ #endif  /* HPUX_C99_INTTYPES4_CHECK */
diff -Nrcpad gcc-9.3.0/gcc/ABOUT-GCC-NLS gcc-10.1.0/gcc/ABOUT-GCC-NLS
*** gcc-9.3.0/gcc/ABOUT-GCC-NLS	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ABOUT-GCC-NLS	Thu May  7 10:49:59 2020
*************** configure GCC with --enable-maintainer-m
*** 49,55 ****
  rebuilt.
  
  
! Copyright (C) 1998-2019 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
--- 49,55 ----
  rebuilt.
  
  
! Copyright (C) 1998-2020 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
diff -Nrcpad gcc-9.3.0/gcc/BASE-VER gcc-10.1.0/gcc/BASE-VER
*** gcc-9.3.0/gcc/BASE-VER	Thu Mar 12 11:08:04 2020
--- gcc-10.1.0/gcc/BASE-VER	Thu May  7 10:50:32 2020
***************
*** 1 ****
! 9.3.0
--- 1 ----
! 10.1.0
diff -Nrcpad gcc-9.3.0/gcc/ChangeLog gcc-10.1.0/gcc/ChangeLog
*** gcc-9.3.0/gcc/ChangeLog	Thu Mar 12 11:08:03 2020
--- gcc-10.1.0/gcc/ChangeLog	Thu May  7 10:50:32 2020
***************
*** 1,10532 ****
! 2020-03-12  Release Manager
! 
! 	* GCC 9.3.0 released.
! 
! 2020-03-05  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/94046
! 	* config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
! 	SRC and MASK arguments to __m128 from __m128d.
! 	(_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
! 	from __m256d.
! 	(_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
! 	from __m128d.
! 	* config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
! 	argument to __m128i from __m128d.
! 	(_mm256_permute2_pd): Fix first cast of C argument to __m256i from
! 	__m256d.
! 	(_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
! 	(_mm256_permute2_ps): Fix first cast of C argument to __m256i from
! 	__m256.
! 
! 2020-03-05  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	PR target/90311
! 	Backport from master
! 	2019-07-18  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	* config/arm/predicates.md (arm_borrow_operation): New predicate.
! 	* config/arm/arm.c (subdi3_compare1): Use CCmode for the split.
! 	(arm_subdi3, subdi_di_zesidi, subdi_di_sesidi): Likewise.
! 	(subdi_zesidi_zesidi): Likewise.
! 	(negdi2_compare, negdi2_insn): Likewise.
! 	(negdi_extensidi): Likewise.
! 	(negdi_zero_extendsidi): Likewise.
! 	(arm_cmpdi_insn): Likewise.
! 	(subsi3_carryin): Use arm_borrow_operation.
! 	(subsi3_carryin_const): Likewise.
! 	(subsi3_carryin_const0): Likewise.
! 	(subsi3_carryin_compare): Likewise.
! 	(subsi3_carryin_compare_const): Likewise.
! 	(subsi3_carryin_compare_const0): Likewise.
! 	(subsi3_carryin_shift): Likewise.
! 	(rsbsi3_carryin_shift): Likewise.
! 	(negsi2_carryin_compare): Likewise.
! 
! 2020-03-04  Marek Polacek  <polacek@redhat.com>
! 
! 	Backport from mainline
! 	2020-01-26  Marek Polacek  <polacek@redhat.com>
! 
! 	PR sanitizer/93436
! 	* sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
! 	null DECL_NAME.
! 
! 2020-03-03  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR rtl-optimization/94002
! 	* explow.c (plus_constant): Punt if cst has VOIDmode and
! 	get_pool_mode is different from mode.
! 
! 2020-03-02  Jason Merrill  <jason@redhat.com>
! 
! 	PR c++/92601
! 	* tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
! 	of complete types.
! 
! 2020-02-29  Peter Bergner <bergner@linux.ibm.com>
! 
! 	Revert
! 	2020-02-20  Peter Bergner  <bergner@linux.ibm.com>
! 
! 	PR target/93658
! 	* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
! 	vector modes.
! 
! 	2020-02-05  Michael Meissner  <meissner@linux.ibm.com>
! 
! 	PR target/93568
! 	* config/rs6000/rs6000.c (get_vector_offset): Fix Q constraint assert
! 	to use "mem".
! 
! 	Backport from master
! 	2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
! 
! 	* config/rs6000/rs6000.c (get_vector_offset): New helper function
! 	to calculate the offset in memory from the start of a vector of a
! 	particular element.  Add code to keep the element number in
! 	bounds if the element number is variable.
! 	(rs6000_adjust_vec_address): Move calculation of offset of the
! 	vector element to get_vector_offset.
! 	(rs6000_split_vec_extract_var): Do not do the initial AND of
! 	element here, move the code to get_vector_offset.
  
! 	2020-01-06  Michael Meissner  <meissner@linux.ibm.com>
  
! 	* config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
! 	Use 'Q' for doing vector extract from memory.
! 	(vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
! 	memory.
! 	(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
! 	doing vector extract from memory.
! 	(vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
! 	extract from memory.
  
! 2020-02-28  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2020-02-28  Martin Liska  <mliska@suse.cz>
  
! 	PR other/93965
! 	* configure.ac: Improve detection of ld_date by requiring
! 	either two dashes or none.
  	* configure: Regenerate.
  
! 2020-02-27  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c/93949
! 	* gimplify.c (gimplify_init_constructor): Don't promote readonly
! 	DECL_REGISTER variables to TREE_STATIC.
! 
! 2020-02-27  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR tree-optimization/93945
! 	* tree-ssa-sccvn.c (vn_reference_lookup_3): For memset with non-zero
! 	second operand, require ref->size to be a multiple of BITS_PER_UNIT.
! 
! 2020-02-26  Carl Love  <cel@us.ibm.com>
! 
! 	PR target/91276
! 	* doc/extend.texi (PowerPC AltiVec Built-in Functions  Available on ISA
! 	3.0): The builtin-function name __builtin_crypto_vpmsumb is only for
! 	the vector unsigned short arguments.  It is also listed as the name of
! 	the built-in for arguments vector unsigned short,
! 	vector unsigned int and vector unsigned long long built-ins.  The
! 	name of the builtins for these arguments should be:
! 	__builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
! 	__builtin_crypto_vpmsumd respectively.
! 
! 2020-02-26  Jason Merrill  <jason@redhat.com>
! 
! 	PR c++/92003
! 	* symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
! 	non-zero address even if weak and not yet defined.
! 
! 2020-02-26  Jiufu Guo  <guojiufu@linux.ibm.com>
! 
! 	PR target/93047
! 	* config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
! 
! 2020-02-26  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR tree-optimization/93820
! 	* gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
! 	argument to ALL_INTEGER_CST_P boolean.
! 	(imm_store_chain_info::try_coalesce_bswap): Adjust caller.
! 	(imm_store_chain_info::coalesce_immediate_stores): Likewise.  Handle
! 	adjacent INTEGER_CST store into merged_store->only_constants like
! 	overlapping one.
  
! 2020-02-25  Christophe Lyon  <christophe.lyon@linaro.org>
  
! 	Backport from mainline
! 	2020-02-25  Christophe Lyon  <christophe.lyon@linaro.org>
  
! 	* config/arm/arm.md (required_for_purecode): New attribute.
! 	(enabled): Handle required_for_purecode.
! 	* config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
! 	work with -mpure-code.
  
! 2020-02-25  Christophe Lyon  <christophe.lyon@linaro.org>
  
! 	Backport from mainline
! 	2019-12-17  Christophe Lyon  <christophe.lyon@linaro.org>
  
! 	* config/arm/arm-protos.h (thumb1_gen_const_int): Add new prototype.
! 	* config/arm/arm.c (arm_option_check_internal): Remove restriction
! 	on MOVT for -mpure-code.
! 	(thumb1_gen_const_int): New function.
! 	(thumb1_legitimate_address_p): Support -mpure-code.
! 	(thumb1_rtx_costs): Likewise.
! 	(thumb1_size_rtx_costs): Likewise.
! 	(arm_thumb1_mi_thunk): Likewise.
! 	* config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Likewise.
! 	* config/arm/thumb1.md (thumb1_movsi_symbol_ref): New.
! 	(*thumb1_movhf): Support -mpure-code.
! 	* doc/invoke.texi (-mpure-code): Remove restriction on MOVT.
  
! 2020-02-25  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/93908
! 	* combine.c (find_split_point): For store into ZERO_EXTRACT, and src
! 	with mask.
  
! 2019-02-25  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
  
! 2020-02-25  Roman Zhuykov  <zhroma@ispras.ru>
  
! 	Backport from master
! 	2020-02-24  Roman Zhuykov  <zhroma@ispras.ru>
  
! 	* doc/install.texi (--enable-checking): Properly document current
! 	behavior.
! 	(--enable-stage1-checking): Minor clarification about bootstrap.
  
! 2020-02-24  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	Backport from mainline
! 	2020-02-19  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/93767
! 	* tree-vect-data-refs.c (vect_compile_time_alias): Remove the
! 	access-size bias from the offset calculations for negative strides.
  
! 2020-02-24  Bernd Edlinger  <bernd.edlinger@hotmail.de>
  
! 	* collect2.c (tool_cleanup): Avoid calling not signal-safe
! 	functions.
! 	(maybe_run_lto_and_relink): Avoid possible signal handler
! 	access to unintialzed memory (lto_o_files).
  
! 2020-02-23  Peter Bergner <bergner@linux.ibm.com>
  
! 	Backport from master
! 	2020-02-20  Peter Bergner  <bergner@linux.ibm.com>
  
! 	PR target/93658
! 	* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
! 	vector modes.
  
! 2020-02-23  Peter Bergner <bergner@linux.ibm.com>
  
! 	Backport from master
! 	2020-02-05  Michael Meissner  <meissner@linux.ibm.com>
  
! 	PR target/93568
! 	* config/rs6000/rs6000.c (get_vector_offset): Fix Q constraint assert
! 	to use "mem".
  
! 	Backport from master
! 	2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
  
! 	* config/rs6000/rs6000.c (get_vector_offset): New helper function
! 	to calculate the offset in memory from the start of a vector of a
! 	particular element.  Add code to keep the element number in
! 	bounds if the element number is variable.
! 	(rs6000_adjust_vec_address): Move calculation of offset of the
! 	vector element to get_vector_offset.
! 	(rs6000_split_vec_extract_var): Do not do the initial AND of
! 	element here, move the code to get_vector_offset.
  
! 2020-02-23  Peter Bergner <bergner@linux.ibm.com>
  
! 	Backport from master
! 	2020-01-06  Michael Meissner  <meissner@linux.ibm.com>
  
! 	* config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
! 	Use 'Q' for doing vector extract from memory.
! 	(vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
! 	memory.
! 	(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
! 	doing vector extract from memory.
! 	(vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
! 	extract from memory.
  
! 2020-02-21  John David Anglin  <danglin@gcc.gnu.org>
  
! 	* gcc/config/pa/pa.c (pa_function_value): Fix check for word and
! 	double-word size when handling aggregate return values.
! 	* gcc/config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
! 	that homogeneous SFmode and DFmode aggregates are passed and returned
! 	in general registers.
  
! 2020-02-20  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/93828
! 	* config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
! 	to destination operand for shufps alternative.
! 	(*vec_extractv2si_1): Ditto.
  
! 2020-02-20  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	Backport from master
! 	2020-02-13  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/93656
! 	* config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
! 	the target function entry.
  
! 2020-02-18  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	Backport from mainline
! 	2019-12-05  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR middle-end/92768
! 	* tree-core.h (OEP_BITWISE): New flag.
! 	* fold-const.c (operand_compare::operand_equal_p): Handle it.
! 	* tree-vector-builder.h (tree_vector_builder::equal_p): Pass it.
  
! 2020-02-18  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	Backport from mainline
! 	2019-08-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR middle-end/90313
! 	* tree-tailcall.c (find_tail_calls): Reject calls that might
! 	read from an escaped RESULT_DECL.
  
! 2020-02-18  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	Backport from mainline
! 	2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/93434
! 	* tree-predcom.c (split_data_refs_to_components): Record which
! 	components have had aliasing loads removed.  Prevent store-store
! 	commoning for all such components.
  
! 2020-02-18  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	Backport from mainline
! 	2019-11-29  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/92710
! 	* tree-vect-stmts.c (vectorizable_simd_clone_call): Reject
! 	vector mask arguments.
  
! 2020-02-18  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	Backport from mainline
! 	2019-11-11  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/92420
! 	* tree-vect-stmts.c (get_negative_load_store_type): Move further
! 	up file.
! 	(get_group_load_store_type): Use it for reversed SLP accesses.
  
! 2020-02-18  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	Backport from mainline
! 	2019-08-21  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
  
! 	PR target/90724
! 	* config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): Force y
! 	in reg if it fails aarch64_plus_operand predicate.
  
! 2020-02-14 Hongtao Liu  <hongtao.liu@intel.com>
  
! 	PR target/93724
! 	* config/i386/avx512vbmi2intrin.h
! 	(_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
! 	_mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
! 	_mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
! 	_m512_shrdi_epi64, _m512_mask_shrdi_epi64,
! 	_m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
! 	_mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
! 	_mm512_shldi_epi32, _mm512_mask_shldi_epi32,
! 	_mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
! 	_mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
! 	of lacking a closing parenthesis.
! 	* config/i386/avx512vbmi2vlintrin.h
! 	(_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
! 	_mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
! 	_mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
! 	_m256_shrdi_epi64, _m256_mask_shrdi_epi64,
! 	_m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
! 	_mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
! 	_mm256_shldi_epi32, _mm256_mask_shldi_epi32,
! 	_mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
! 	_mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
! 	_mm_shrdi_epi16, _mm_mask_shrdi_epi16,
! 	_mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
! 	_mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
! 	_mm_shrdi_epi64, _mm_mask_shrdi_epi64,
! 	_m_maskz_shrdi_epi64, _mm_shldi_epi16,
! 	_mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
! 	_mm_shldi_epi32, _mm_mask_shldi_epi32,
! 	_mm_maskz_shldi_epi32, _mm_shldi_epi64,
! 	_mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
  
! 2020-02-16  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/93743
! 	* config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
! 	(atan2<mode>3): Update operand order in the call to gen_atan2xf3.
  
! 2020-02-15  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/93744
! 	* match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0): For
! 	GENERIC, make sure @2 in the first and @1 in the other patterns has no
! 	side-effects.
  
! 2020-02-14  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR target/93704
! 	* config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
! 	conjunction with TARGET_GNU_TLS in early return.
  
! 2020-02-14  Alexander Monakov  <amonakov@ispras.ru>
  
! 	Backport from mainline
! 	PR rtl-optimization/88879
! 	* sel-sched.c (sel_target_adjust_priority): Remove assert.
  
! 2020-02-14  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2020-02-05  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/90648
! 	* genmatch.c (dt_node::gen_kids_1): Emit number of argument
! 	checks before matching calls.
  
! 2020-02-14  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2020-01-22  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93381
! 	* tree-ssa-structalias.c (find_func_aliases): Assume offsetting
! 	throughout, handle all conversions the same.
  
! 2020-02-14  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2020-01-28  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93439
! 	* tree-parloops.c (create_loop_fn): Move clique bookkeeping...
! 	* tree-cfg.c (move_sese_region_to_fn): ... here.
! 	(verify_types_in_gimple_reference): Verify used cliques are
! 	tracked.
  
! 2020-02-14  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2020-01-09  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/93054
! 	* gimplify.c (gimplify_expr): Deal with NOP definitions.
  
! 2020-02-14  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2020-01-20  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/92763
! 	* dwarf2out.c (prune_unused_types): Unconditionally mark
! 	called function DIEs.
  
! 2020-02-14  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-11-29  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/92704
! 	* tree-if-conv.c (combine_blocks): Deal with virtual PHIs
! 	in loops performing only loads.
  
! 2020-02-14  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-11-27  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/92674
! 	* tree-inline.c (expand_call_inline): Delay purging EH/abnormal
! 	edges and instead record blocks in bitmap.
! 	(gimple_expand_calls_inline): Adjust.
! 	(fold_marked_statements): Delay EH cleanup until all folding is
! 	done.
! 	(optimize_inline_calls): Do EH/abnormal cleanup for calls after
! 	inlining finished.
  
! 2020-02-13  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93696
! 	* config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
! 	_mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
! 	_mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
! 	_mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
! 	pass __A to the builtin followed by __W instead of __A followed by
! 	__B.
! 	* config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
! 	_mm512_mask_popcnt_epi64): Likewise.
! 	* config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
! 	_mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
! 	_mm256_mask_popcnt_epi64): Likewise.
  
! 	PR target/93673
! 	* config/i386/sse.md (k<code><mode>): Drop mode from last operand and
! 	use const_0_to_255_operand predicate instead of immediate_operand.
! 	(avx512dq_fpclass<mode><mask_scalar_merge_name>,
! 	avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
! 	vgf2p8affineinvqb_<mode><mask_name>,
! 	vgf2p8affineqb_<mode><mask_name>): Drop mode from
! 	const_0_to_255_operand predicated operands.
  
! 	Backported from mainline
! 	2020-02-12  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93670
! 	* config/i386/sse.md (VI48F_256_DQ): New mode iterator.
! 	(avx512vl_vextractf128<mode>): Use it instead of VI48F_256.  Remove
! 	TARGET_AVX512DQ from condition.
! 	(vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
! 	instead of <mask_mode512bit_condition> in condition.  If
! 	TARGET_AVX512DQ is false, emit vextract*64x4 instead of
! 	vextract*32x8.
! 	(vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
! 	from condition.
  
! 	2020-02-10  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93637
! 	* config/i386/sse.md (VI_256_AVX2): New mode iterator.
! 	(vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
! 	Change condition from TARGET_AVX2 to TARGET_AVX.
  
! 	2020-02-08  Uroš Bizjak  <ubizjak@gmail.com>
! 		    Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/65782
! 	* config/i386/i386.h (CALL_USED_REGISTERS): Make
! 	xmm16-xmm31 call-used even in 64-bit ms-abi.
  
! 	2020-02-06  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR libgomp/93515
! 	* omp-low.c (use_pointer_for_field): For nested constructs, also
! 	look for map clauses on target construct.
! 	(scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
! 	taskreg_nesting_level.
  
! 	PR libgomp/93515
! 	* gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
! 	shared clause, call omp_notice_variable on outer context if any.
  
! 	2020-02-05  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/93555
! 	* omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
! 	simd_clone_create failed when i == 0, adjust clone->nargs by
! 	clone->inbranch.
  
! 	2020-01-30  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/93505
! 	* combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
! 	rotate counts.
  
! 	2020-01-28  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93418
! 	* config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
! 	-1 or is_vshift is true, use new_vector with number of elts npatterns
! 	rather than new_unary_operation.
  
! 	2020-01-23  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/93402
! 	* postreload.c (reload_combine_recognize_pattern): Don't try to adjust
! 	USE insns.
  
! 2020-02-11  Tamar Christina  <tamar.christina@arm.com>
  
! 	Backport from mainline
! 	2020-01-31  Tamar Christina  <tamar.christina@arm.com>
  
! 	PR rtl-optimization/91838
! 	* simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
! 	to truncate if allowed or reject combination.
  
! 2020-02-07  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	Backport from mainline
! 	2020-02-07  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/85667
! 	* config/i386/i386.c (function_arg_ms_64): Add a type argument.
! 	Don't return aggregates with only SFmode and DFmode in SSE
! 	register.
! 	(ix86_function_arg): Pass type to function_arg_ms_64.
  
! 2020-01-30  John David Anglin  <danglin@gcc.gnu.org>
  
! 	* config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
! 	without a DECL in .data.rel.ro.local.
  
! 2020-01-30  Kito Cheng  <kito.cheng@sifive.com>
  
! 	Backport from mainline
! 	2020-01-21  Kito Cheng  <kito.cheng@sifive.com>
  
! 	PR target/93304
! 	* config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
! 	* config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
! 	* config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
  
! 2020-01-29  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  
! 	Backport from mainline
! 	2020-01-21  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  
! 	PR target/92424
! 	* config/aarch64/aarch64.c (aarch64_declare_function_name): Set
! 	cfun->machine->label_is_assembled.
! 	(aarch64_print_patchable_function_entry): New.
! 	(TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
! 	* config/aarch64/aarch64.h (struct machine_function): New field,
! 	label_is_assembled.
  
! 2020-01-27  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	PR target/92692
! 	* config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
! 	Add assert to ensure prolog has been emitted.
! 	(aarch64_split_atomic_op): Likewise.
! 	* config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
! 	Use epilogue_completed rather than reload_completed.
! 	(aarch64_atomic_exchange<mode>): Likewise.
! 	(aarch64_atomic_<atomic_optab><mode>): Likewise.
! 	(atomic_nand<mode>): Likewise.
! 	(aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
! 	(atomic_fetch_nand<mode>): Likewise.
! 	(aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
! 	(atomic_nand_fetch<mode>): Likewise.
  
! 2020-01-22  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93335
! 	* config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
! 	gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
! 	predicate, not whenever it is CONST_INT.  Otherwise, force_reg it.
! 	Call force_reg on high_in2 unconditionally.
  
! 	PR target/91298
! 	* output.h (assemble_name_resolve): Declare.
! 	* varasm.c (assemble_name_resolve): New function.
! 	(assemble_name): Use it.
! 	* config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
  
! 	Backported from mainline
! 	2020-01-21  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93333
! 	* config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
! 	the last two operands are CONST_INT_P before using them as such.
  
! 	PR target/93073
! 	* config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
! 	compare_mode other than SFmode or DFmode.
  
! 	2020-01-15  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93009
! 	* config/i386/sse.md
! 	(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
! 	*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
! 	*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
! 	*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
! 	just a single alternative instead of two, make operands 1 and 2
! 	commutative.
  
! 	2020-01-09  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR inline-asm/93202
! 	* config/riscv/riscv.c (riscv_print_operand_reloc): Use
! 	output_operand_lossage instead of gcc_unreachable.
! 	* doc/md.texi (riscv f constraint): Fix typo.
  
! 	2020-01-03  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/93088
! 	* loop-iv.c (find_single_def_src): Punt after looking through
! 	128 reg copies for regs with single definitions.  Move definitions
! 	to first uses.
  
! 	2020-01-02  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR ipa/93087
! 	* predict.c (compute_function_frequency): Don't call
! 	warn_function_cold on functions that already have cold attribute.
  
! 2020-01-20  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	PR middle-end/93246
! 	* alias.c (record_component_aliases): Take superset to record
! 	into, recurse for alias-set zero fields.
! 	(record_component_aliases): New oveerload wrapping around the above.
  
! 2020-01-19  Eric S. Raymond <esr@thyrsus.com>
! 	    Sandra Loosemore  <sandra@codesourcery.com>
  
! 	Backport from mainline:
  
! 	2020-01-19  Eric S. Raymond <esr@thyrsus.com>
  
! 	* doc/contribute.texi: Update for SVN -> Git transition.
! 	* doc/install.texi: Likewise.
  
! 2020-01-15  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/93254
! 	* config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
! 	alternatives 9 and 10.  Do not require SSE2 ISA for alternatives
! 	14 and 15.
  
! 2020-01-14  Martin Jambor  <mjambor@suse.cz>
  
! 	Backport from mainline
! 	2020-01-13  Martin Jambor  <mjambor@suse.cz>
  
! 	PR ipa/93223
! 	* ipa-cp.c (devirtualization_time_bonus): Check whether isummary is
! 	NULL.
  
! 2020-01-10  Martin Jambor  <mjambor@suse.cz>
  
! 	Backport from mainline
! 	2019-12-17  Martin Jambor  <mjambor@suse.cz>
  
!         PR ipa/92971
!         * Ipa-cp.c (cgraph_edge_brings_all_agg_vals_for_node): Fix
!           definition of values, release memory on exit.
  
! 2020-01-10  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>
  
! 	Backport from trunk
! 	PR target/93188
! 	* config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
! 	armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
! 	when only building rm-profile multilibs.
  
! 2020-01-10  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>
  
! 	Backport from trunk
! 	* config/arm/t-multilib: Use arm->thumb multilib reuse rules
! 	on a-profile.
  
! 2020-01-09  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-12-12  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* ipa-prop.c (read_ipcp_transformation_info): Fix undefined ordering
! 	of execution of function call parameters.
  
! 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
  
! 	Backport from 2020-01-08 trunk r279995.
  
! 	Add -nodevicespecs option for avr.
  
! 	PR target/93182
! 	* config/avr/avr.opt (-nodevicespecs): New driver option.
! 	* config/avr/driver-avr.c (avr_devicespecs_file): Only issue
! 	"-specs=device-specs/..." if that option is not set.
! 	* doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
  
! 2020-01-06  John David Anglin  <danglin@gcc.gnu.org>
  
! 	* config/pa/pa.md: Revert change to use ordered_comparison_operator
! 	instead of cmpib_comparison_operator in cmpib patterns.
! 	* config/pa/predicates.md (cmpib_comparison_operator): Revert removal
! 	of cmpib_comparison_operator.  Revise comment.
  
! 2020-01-01  John David Anglin  <danglin@gcc.gnu.org>
  
! 	PR target/67834
! 	* config/pa/pa.c (pa_elf_select_rtx_section): New.  Put references to
! 	COMDAT group function labels in .data.rel.ro.local section.
! 	* config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
  
! 	PR target/93111
! 	* config/pa/pa.md (scc): Use ordered_comparison_operator instead of
! 	comparison_operator in B and S integer comparisons.  Likewise, use
! 	ordered_comparison_operator instead of cmpib_comparison_operator in
! 	cmpib patterns.
! 	* config/pa/predicates.md (cmpib_comparison_operator): Remove.
  
! 2019-12-25 Iain Sandoe <iain@sandoe.co.uk>
  
! 	Backport from mainline.
! 	2019-12-14 Iain Sandoe <iain@sandoe.co.uk>
  
! 	* config/darwin.h (DARWIN_EXTRA_SPECS): Add new
! 	bundle spec. (DARWIN_BUNDLE1_SPEC): New.
! 	(STARTFILE_SPEC): Use darwin bundle spec.
! 	* config/rs6000/darwin.h (DARWIN_BUNDLE1_SPEC): New.
! 	(DARWIN_DYLIB1_SPEC): Delete duplicate.
  
! 2019-12-20  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR fortran/92756
! 	* omp-low.c (check_omp_nesting_restrictions): If lang_GNU_Fortran,
! 	diagnose teams not closely nested inside of target.
  
! 	Backported from mainline
! 	2019-12-14  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR ipa/92357
! 	* ipa-fnsummary.c (ipa_fn_summary_write): Use
! 	lto_symtab_encoder_iterator with lsei_start_function_in_partition and
! 	lsei_next_function_in_partition instead of walking all cgraph nodes
! 	in encoder.
  
! 	PR tree-optimization/92930
! 	* ipa-pure-const.c (special_builtin_state): Don't handle
! 	BUILT_IN_APPLY.
  
! 	2019-12-12  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/92904
! 	* config/i386/i386.c (ix86_gimplify_va_arg): If need_intregs and
! 	not need_temp, decrease alignment of the read because the GPR save
! 	area only guarantees 8-byte alignment.
  
! 	2019-12-11  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/92723
! 	* tree-vect-patterns.c (vect_recog_rotate_pattern): If dt is not
! 	vect_internal_def, use oprnd1 as is, without trying to cast it.
! 	Formatting fix.
  
! 	2019-11-27  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR debug/92664
! 	* dwarf2out.c (lookup_filename): Use "<stdin>" instead of "".
  
! 	2019-11-26  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/92644
! 	* tree-ssa-phiopt.c (minmax_replacement): Add INTEGRAL_TYPE_P check
! 	next to INTEGER_CST checks.
  
! 	2019-11-23  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/92615
! 	* config/i386/i386.c (ix86_md_asm_adjust): If dest_mode is
! 	GET_MODE (dest), is not QImode, using ZERO_EXTEND and dest is not
! 	register_operand, force x into register before storing it into dest.
! 	Formatting fix.
  
! 2019-12-20  Roman Zhuykov  <zhroma@ispras.ru>
  
! 	Backport from mainline
! 	2019-12-13  Roman Zhuykov  <zhroma@ispras.ru>
  
! 	PR rtl-optimization/92591
! 	* modulo-sched.c (ps_add_node_check_conflicts): Improve checking
! 	for history > 0 case.
! 	* params.def (sms-dfa-history): Limit to 16.
  
! 2019-12-19  Georg-Johann Lay  <avr@gjlay.de>
  
! 	Backport support for some AVR devices from avrxmega3 family
! 	from SVN trunk r279309, r278387, r278389, r278478.
  
! 	PR target/92545
! 	* config/avr/avr-arch.h (avr_mcu_t) <flash_pm_offset>: New field.
! 	* config/avr/avr-devices.c (avr_mcu_types): Adjust initializers.
! 	* config/avr/avr-mcus.def (AVR_MCU): Add respective field.
! 	* config/avr/gen-avr-mmcu-specs.c (print_mcu)
! 	<*cpp, *cpp_mcu, *cpp_avrlibc, *link_pm_base_address>: Emit code
! 	for spec definitions.
! 	* config/avr/gen-avr-mmcu-texi.c: Rewrite.
! 	* doc/avr-mmcu.texi: Regenerate.
  
! 2019-12-17  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	Backport from mainline
! 	2019-12-16  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	PR target/92950
! 	* config/s390/vector.md ("mov<mode>" for V_8): Replace lh, lhy,
! 	and lhrl with llc.
  
! 2019-12-12  Vineet Gupta  <vgupta@synopsys.com>
  
! 	Backport from mainline
! 	* config/arc/arc-modes.def (CC_FPUE): New Mode CC_FPUE which
! 	helps codegen generate exceptions even for quiet NaN.
! 	* config/arc/arc.c (arc_init_reg_tables): Handle New CC_FPUE mode.
! 	(get_arc_condition_code): Likewise.
! 	(arc_select_cc_mode): LT, LE, GT, GE to use the New CC_FPUE mode.
! 	* config/arc/arc.h (REVERSE_CONDITION): Handle New CC_FPUE mode.
! 	* config/arc/predicates.md (proper_comparison_operator): Likewise.
! 	* config/arc/fpu.md (cmpsf_fpu_trap): New Pattern for CC_FPUE.
! 	(cmpdf_fpu_trap): Likewise.
  
! 2019-12-12  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	Backport from mainline
! 	* config/arc/arc.md (iterator SDF): Check TARGET_FP_DP_BASE.
! 	(cstoredi4): Use TARGET_HARD_FLOAT.
  
! 2019-12-10  Kewen Lin  <linkw@gcc.gnu.org>
  
! 	Backport from mainline
! 	2019-11-27  Kewen Lin  <linkw@gcc.gnu.org>
  
! 	PR tree-optimization/91790
! 	* gcc/tree-vect-stmts.c (vectorizable_load): Use the adjusted DR for
! 	vect_setup_realignment when first_stmt_info is different from
! 	first_stmt_info_for_drptr.
  
! 2019-12-09  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* tree.c (build_array_type_1): Add SET_CANONICAL parameter and compute
! 	TYPE_CANONICAL from the element type only if it is true.  Remove a few
! 	obsolete lines and adjust recursive call.
! 	(fld_process_array_type): Adjust call to build_array_type_1.
! 	(build_array_type): Likewise.
! 	(build_nonshared_array_type): Likewise.
  
! 2019-12-02  Sandra Loosemore  <sandra@codesourcery.com>
  
! 	Fix bugs relating to flexibly-sized objects in nios2 backend.
! 	
! 	PR target/92499
! 	* config/nios2/nios2.c (nios2_in_small_data_p): Do not consider
! 	objects of flexible types to be small if they have internal linkage
! 	or are declared extern.
! 	* config/nios2/nios2.h (ASM_OUTPUT_ALIGNED_LOCAL): Replace with...
! 	(ASM_OUTPUT_ALIGNED_DECL_LOCAL): ...this.  Use targetm.in_small_data_p
! 	instead of the size of the object initializer.
! 	* tree.c (flexible_array_type_p): Move from C front end, and
! 	generalize to handle fields in non-C structures.
! 	* tree.h (flexible_array_type_p): Declare.
  
! 2019-12-02  Li Jia He  <helijia@linux.ibm.com>
  
! 	Partial backport from mainline
! 	PR target/92098
! 	2019-11-08  Kewen Lin  <linkw@gcc.gnu.org>
  
! 	PR target/92132
! 	* config/rs6000/predicates.md
! 	(signed_or_equality_comparison_operator): New predicate.
! 	(unsigned_or_equality_comparison_operator): Likewise.
! 	* config/rs6000/rs6000.md (one_cmpl<mode>2): Remove expand.
! 	(one_cmpl<mode>3_internal): Rename to one_cmpl<mode>2.
! 	* config/rs6000/vector.md
! 	(vcond_mask_<mode><mode> for VEC_I and VEC_I): New expand.
! 	(vec_cmp<mode><mode> for VEC_I and VEC_I): Likewise.
! 	(vec_cmpu<mode><mode> for VEC_I and VEC_I): Likewise.
  
! 2019-11-27  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-10-25  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/92222
! 	* tree-vect-slp.c (_slp_oprnd_info::first_pattern): Remove.
! 	(_slp_oprnd_info::second_pattern): Likewise.
! 	(_slp_oprnd_info::any_pattern): New.
! 	(vect_create_oprnd_info): Adjust.
! 	(vect_get_and_check_slp_defs): Compute whether any stmt is
! 	in a pattern.
! 	(vect_build_slp_tree_2): Avoid building up a node from scalars
! 	if any of the operand defs, not just the first, is in a pattern.
  
! 2019-11-21  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/91355
! 	* tree-ssa-sink.c (select_best_block): Use >= rather than >
! 	for early_bb scaled count with best_bb count comparison.
  
! 2019-11-21  Richard Biener  <rguenther@suse.de>
  
! 	Revert
! 	2019-09-17  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91790
! 	* tree-vect-stmts.c (vectorizable_load): For BB vectorization
! 	use the correct DR for setting up realignment.
  
! 2019-11-20  Peter Bergner <bergner@linux.ibm.com>
  
! 	Backport from mainline
! 	2019-11-07  Peter Bergner <bergner@linux.ibm.com>
  
! 	PR other/92090
! 	* config/rs6000/predicates.md (input_operand): Allow MODE_PARTIAL_INT
! 	modes for integer constants.
  
! 2019-11-20  Michael Matz  <matz@suse.de>
  
! 	Backport from mainline
! 	PR middle-end/90796
! 	* gimple-loop-jam.c (any_access_function_variant_p): New function.
! 	(adjust_unroll_factor): Use it to constrain safety, new parameter.
! 	(tree_loop_unroll_and_jam): Adjust call and profitable unroll factor.
  
! 2019-11-20  Joseph Myers  <joseph@codesourcery.com>
  
! 	* doc/invoke.texi (-Wc11-c2x-compat): Document.
  
! 2019-11-20  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/90840
! 	* expmed.c (store_bit_field_1): Handle the case where op0 is not a MEM
! 	and has a mode that doesn't have corresponding integral type.
  
! 	PR target/90867
! 	* config/i386/i386.c (ix86_valid_target_attribute_tree): Don't
! 	clear opts->x_ix86_isa_flags{,2} here...
! 	(ix86_valid_target_attribute_inner_p): ... but here when seeing
! 	arch=.  Also clear opts->x_ix86_isa_flags{,2}_explicit.
  
! 	PR c/90898
! 	* tree-ssa-ccp.c (insert_clobber_before_stack_restore): Remove
! 	assertion.
! 	(insert_clobbers_for_var): Fix a typo in function comment.
  
! 2019-11-19  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/91450
! 	* internal-fn.c (expand_mul_overflow): For s1 * s2 -> ur, if one
! 	operand is negative and one non-negative, compare the non-negative
! 	one against 0 rather than comparing s1 & s2 against 0.  Otherwise,
! 	don't compare (s1 & s2) == 0, but compare separately both s1 == 0
! 	and s2 == 0, unless one of them is known to be negative.  Remove
! 	tem2 variable, use tem where tem2 has been used before.
  
! 2019-11-19  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* doc/invoke.texi (-gno-internal-reset-location-views): Fix typo.
  
! 2019-11-18  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	Backport from trunk
! 	2019-11-12  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	* config/rs6000/rs6000.md (rs6000_set_fpscr_drn): Use ULL on big
! 	hexadecimal literal.
  
! 2019-11-15  Tamar Christina  <tamar.christina@arm.com>
  
! 	Backport from mainline
! 	2019-09-24  Stamatis Markianos-Wright  <stam.markianos-wright@arm.com>
  
! 	* config/aarch64/aarch64-option-extensions.def (fp16fml):
! 	Update hwcap string for fp16fml.
  
! 2019-11-15  Ilya Leoshkevich  <iii@linux.ibm.com>
  
! 	Backport from mainline
! 	PR rtl-optimization/92430
! 	* cfgcleanup.c (pass_jump_after_combine::gate): New function.
! 	(pass_jump_after_combine::execute): Free
! 	dominance info at the beginning.
  
! 2019-11-13  Claudiu Zissulescu <claziss@gmail.com>
  
! 	Backport from mainline
! 	* config/arc/arc.md (movsi_ne): Reorder instruction variants and
! 	use new register constraint letters.
! 	* config/arc/arc.c (arc_legitimize_pic_address): Consider UNSPECs
! 	as well, if interesting recover the symbol and re-legitimize the
! 	pic address.
  
! 2019-11-14  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-11-14  Martin Liska  <mliska@suse.cz>
  
! 	PR target/92389
! 	* config/i386/i386.h: Add PTA_AVX512VPOPCNTDQ to
! 	PTA_ICELAKE_CLIENT which is later interited by
! 	PTA_ICELAKE_SERVER and PTA_TIGERLAKE.
  
! 2019-11-13  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
  
! 	Backport from mainline
! 	* config/mips/mips.md (rotr<mode>3): Sanitize the constant argument
! 	instead of asserting its value.
  
! 2019-11-11  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-06-25  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90930
! 	* tree-ssa-reassoc.c (reassociate_bb): Only rewrite expression
! 	into parallel form in the last pass instance.
  
! 2019-11-11  H.J. Lu  <hjl.tools@gmail.com>
  
! 	Backport from trunk:
! 	PR target/87833
! 	* config/i386/intelmic-mkoffload.c (prepare_target_image): Put
! 	-fPIC and -shared the last to create offload image.
  
! 2019-11-11  Thomas Schwinge  <thomas@codesourcery.com>
  
! 	Backport from trunk:
! 	* gimplify.c (gimplify_scan_omp_clauses): Assert 'offset2' instead
! 	of 'offset'.
  
! 	Backport from trunk:
! 	* Makefile.in (LANG_CONFIGUREFRAGS): Define.
! 	(config.status): Use/depend on it.
! 	* configure.ac (all_lang_configurefrags): Track, 'AC_SUBST'.
! 	* configure: Regenerate.
  
! 2019-11-09  John David Anglin  <danglin@gcc.gnu.org>
  
! 	Backport from mainline
! 	2019-11-07  John David Anglin  <danglin@gcc.gnu.org>
  
! 	* config/pa/pa.md (memory_barrier): Revise to use ldcw barriers.
! 	Enhance comment.
! 	(memory_barrier_coherent, memory_barrier_64, memory_barrier_32): New
! 	insn patterns using ldcw instruction.
! 	(memory_barrier): Remove insn pattern using sync instruction.
! 	* config/pa/pa.opt (coherent-ldcw): New option.
! 	(ordered): New option.
  
! 2019-11-08  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c++/92384
! 	* function.c (assign_parm_setup_block, assign_parm_setup_stack): Don't
! 	copy TYPE_EMPTY_P arguments from data->entry_parm to data->stack_parm
! 	slot.
! 	(assign_parms): For TREE_ADDRESSABLE parms with TYPE_EMPTY_P type
! 	force creation of a unique data.stack_parm slot.
  
! 	Backported from mainline
! 	2019-10-31  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/92231
! 	* tree.h (fndecl_built_in_p): Use fndecl_built_in_p instead of
! 	DECL_BUILT_IN in comment.  Remove redundant ()s around return
! 	argument.
! 	* tree.c (free_lang_data_in_decl): Check if var is FUNCTION_DECL
! 	before calling fndecl_built_in_p.
! 	* gimple-fold.c (gimple_fold_stmt_to_constant_1): Check if
! 	TREE_OPERAND (fn, 0) is a FUNCTION_DECL before calling
! 	fndecl_built_in_p on it.
  
! 	PR c++/90947
! 	* tree.h (type_initializer_zero_p): Remove.
! 	* tree.c (type_initializer_zero_p): Remove.
  
! 	2019-10-29  Jakub Jelinek  <jakub@redhat.com>
  
! 	* doc/install.texi (--enable-offload-targets): Fix up a typo in the
! 	example, use actual names of supported offload targets.
  
! 2019-11-08  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR target/92095
! 	* config/sparc/sparc-protos.h (output_load_pcrel_sym): Declare.
! 	* config/sparc/sparc.c (sparc_cannot_force_const_mem): Revert latest
!  	change.
! 	(got_helper_needed): New static variable.
! 	(output_load_pcrel_sym): New function.
! 	(get_pc_thunk_name): Remove after inlining...
! 	(load_got_register): ...here.  Rework the initialization of the GOT
! 	register and of the GOT helper.
! 	(save_local_or_in_reg_p): Test the REGNO of the GOT register.
! 	(sparc_file_end): Test got_helper_needed to decide whether the GOT
! 	helper must be emitted.  Use output_asm_insn instead of fprintf.
! 	(sparc_init_pic_reg): In PIC mode, always initialize the PIC register
! 	if optimization is enabled.
! 	* config/sparc/sparc.md (load_pcrel_sym<P:mode>): Emit the assembly
! 	by calling output_load_pcrel_sym.
  
! 2019-11-06  Ilya Leoshkevich  <iii@linux.ibm.com>
  
! 	Backport from mainline
! 	* config/s390/s390.c (s390_canonicalize_comparison): Use XEXP
! 	(*op0, 1) instead of XEXP (*op1, 0).
  
! 2019-11-05  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	Backport from trunk
! 	2019-10-24  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	* config/rs6000/altivec.md (altivec_vavgu<VI_char>): Rename to...
! 	(uavg<mode>3_ceil): ... This.
! 	(altivec_vavgs<VI_char>): Rename to...
! 	(avg<mode>3_ceil): ... This.
! 	* config/rs6000/rs6000-builtin.def (VAVGUB, VAVGSB, VAVGUH, VAVGSH,
! 	VAVGUW, VAVGSW): Adjust.
  
! 2019-11-05  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	Backport from trunk
! 	2019-10-26  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	PR target/91289
! 	* config/rs6000/rs6000.c (rs6000_emit_allocate_stack): Don't add an
! 	immediate to r0; use r11 instead.  Save and restore r11 to r0 around
! 	this.
  
! 2019-11-05  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	Backport from mainline
! 	2019-11-05  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390.c (s390_vector_alignment): Check if the value
! 	fits into uhwi before using it.
  
! 2019-11-01  John David Anglin  <danglin@gcc.gnu.org>
  
! 	Backport from mainline
! 	2019-10-03  John David Anglin  <danglin@gcc.gnu.org>
  
! 	* config/pa/pa.c (pa_output_call): Remove 64-bit sibcall sequence.
! 	(pa_attr_length_call): Adjust length for 64-bit plabel sequence.
  
! 2019-11-01  John David Anglin  <danglin@gcc.gnu.org>
  
! 	Backport from mainline
! 	2019-10-03  John David Anglin  <danglin@gcc.gnu.org>
  
! 	* config/pa/pa.h (MAX_PCREL17F_OFFSET): Adjust.
  
! 2019-10-30  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-10-13  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin.c (machopic_indirection_name): Rework the
! 	function to emit linker-visible symbols only for indirections
! 	in the data section.  Clean up the code and update comments.
  
! 2019-10-30  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-10-09  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin.c (darwin_override_options): Make the check for
! 	Objective-C ABI version more specific for 64bit code.
  
! 	Backport from mainline
! 	2019-10-06  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin.c (darwin_override_options): Adjust objective-c
! 	ABI version error messages to avoid punctuation and contracted
! 	negations.
  
! 2019-10-30  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-07-03  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin.h (REAL_LIBGCC_SPEC): Adjust for earlier Darwin.
! 	(STARTFILE_SPEC): Split crt3 into a separate spec.
! 	(DARWIN_EXTRA_SPECS): Add crt2 and crt3 spec.
! 	(DARWIN_CRT2_SPEC): New.
! 	(DARWIN_CRT3_SPEC): New.
! 	(MIN_LD64_OMIT_STUBS): Revise to 62.1.
! 	* config/rs6000/darwin.h (DARWIN_CRT2_SPEC): Revise conditions.
! 	(DARWIN_CRT3_SPEC): New.
  
! 2019-10-30  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-06-27  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/rs6000/darwin.h (ENDFILE_SPEC): Correct whitespace in the
! 	spec.
  
! 	Backport from mainline
! 	2019-06-25  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/rs6000/darwin.h (ENDFILE_SPEC): New.
  
! 2019-10-30  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-06-18  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin.c (darwin_emit_unwind_label): New.
! 	(darwin_override_options): Set darwin_emit_unwind_label as needed.
  
! 2019-10-30  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-08-13 Iain Sandoe <iain@sandoe.co.uk>
  
! 	* config/darwin.c (machopic_indirect_call_target): Rename symbol stub
  	flag.
! 	(darwin_override_options): Likewise.
! 	* config/darwin.h: Likewise.
! 	* config/darwin.opt: Likewise.
! 	* config/i386/i386.c (output_pic_addr_const): Likewise.
! 	* config/rs6000/darwin.h: Likewise.
! 	* config/rs6000/rs6000.c (rs6000_call_darwin_1): Likewise.
! 	* config/i386/darwin.h (TARGET_MACHO_PICSYM_STUBS): Rename to ...
! 	... this TARGET_MACHO_SYMBOL_STUBS.
! 	(FUNCTION_PROFILER):Likewise.
! 	* config/i386/i386.h: Likewise.
! 
! 	Backport from mainline
! 	2019-06-16  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	* config/darwin.c (machopic_indirect_call_target): Use renamed
! 	darwin_picsymbol_stubs to decide on output.
! 	(darwin_override_options): Handle darwin_picsymbol_stubs.
! 	* config/darwin.h (MIN_LD64_OMIT_STUBS): New.
! 	(LD64_VERSION): Revise default.
! 	* config/darwin.opt: (mpic-symbol-stubs): New option.
! 	(darwin_picsymbol_stubs): New variable.
! 	* config/i386/darwin.h (TARGET_MACHO_BRANCH_ISLANDS):
! 	rename to TARGET_MACHO_PICSYM_STUBS.
! 	* config/i386/i386.c (output_pic_addr_const): Likewise.
! 	* config/i386/i386.h Likewise.
! 	* config/rs6000/darwin.h: Likewise.
! 	* config/rs6000/rs6000.c (rs6000_call_darwin_1): Use renamed
! 	darwin_picsymbol_stubs.
! 
! 2019-10-30  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
! 
! 	Backport from mainline
! 	2019-07-09  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
! 
! 	* cfgcleanup.c (old_insns_match_p): Check if used hard regs set is equal
! 	for both call instructions.
! 
! 2019-10-30  Thomas Schwinge  <thomas@codesourcery.com>
! 
! 	Backport from trunk:
! 
! 	2019-05-06  Richard Biener  <rguenther@suse.de>
! 
! 	* dwarf2out.c (mem_loc_descriptor): Initialize int_mode.
! 
! 2019-10-28  Uroš Bizjak  <ubizjak@gmail.com>
! 
! 	PR target/92225
! 	* config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE4_2
! 	condition for V2DImode.
! 
! 2019-10-28  Ilya Leoshkevich  <iii@linux.ibm.com>
! 
! 	Backport from mainline
! 	PR rtl-optimization/92007
! 	* cfgcleanup.c (thread_jump): Add an assertion that we don't
! 	call it after reload if hot/cold partitioning has been done.
! 	(class pass_postreload_jump): Rename to
! 	pass_jump_after_combine.
! 	(make_pass_postreload_jump): Rename to
! 	make_pass_jump_after_combine.
! 	* passes.def(pass_postreload_jump): Move before reload, rename
! 	to pass_jump_after_combine.
! 	* tree-pass.h (make_pass_postreload_jump): Rename to
! 	make_pass_jump_after_combine.
! 
! 2019-10-28  Peter Bergner <bergner@linux.ibm.com>
! 	    Jiufu Guo  <guojiufu@linux.ibm.com>
! 
! 	PR target/70010
! 	* config/rs6000/rs6000.c (rs6000_can_inline_p): Prohibit inlining if
! 	the callee explicitly disables some isa_flags the caller is using.
! 
! 2019-10-27  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline
! 	2019-10-17  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	PR target/65342
! 	* config/rs6000/darwin.md (movdi_low, movsi_low_st): Delete.
! 	(movdi_low_st): Delete.
! 	* config/rs6000/rs6000.c
! 	(darwin_rs6000_legitimate_lo_sum_const_p): New.
! 	(mem_operand_gpr): Validate Mach-O LO_SUM cases separately.
! 	* config/rs6000/rs6000.md (movsi_low): Delete.
! 
! 2019-10-27  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline
! 	2019-10-12  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	PR target/67183
! 	* config/darwin.c (machopic_indirection): New field to flag
! 	non-lazy-symbol-pointers in the data section.
! 	(machopic_indirection_name): Compute if an indirection should
! 	appear in the data section.
! 	(machopic_output_data_section_indirection): New callback split
! 	from machopic_output_indirection.
! 	(machopic_output_stub_indirection): Likewise.
! 	(machopic_output_indirection): Retain the code for non-lazy
! 	symbol pointers in their regular section.
! 	(machopic_finish): Use the new callbacks to order the indirection
! 	output.
! 
! 2019-10-27  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline
! 	2019-10-12  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	* config/darwin-protos.h (machopic_finish): Delete.
! 	* config/darwin.c (machopic_finish): Make static.
! 
! 	Backport from mainline
! 	2019-10-09  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	* config/darwin.c (machopic_indirect_data_reference): Set flag to
! 	indicate that the new symbol is an indirection.
! 	(machopic_indirect_call_target): Likewise.
! 	* config/darwin.h (MACHO_SYMBOL_FLAG_INDIRECTION): New.
! 	(MACHO_SYMBOL_INDIRECTION_P): New.
! 	(MACHO_SYMBOL_FLAG_STATIC): Adjust bit number.
! 
! 	Backport from mainline
! 	2019-10-08  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	* config/darwin.c (machopic_indirect_data_reference): Check for
! 	required indirections before making direct access to defined
! 	values.
! 	(machopic_output_indirection): Place the indirected pointes for
! 	required indirections into the non-lazy symbol pointers section.
! 	(darwin_encode_section_info):
! 	* config/darwin.h (MACHO_SYMBOL_FLAG_MUST_INDIRECT): New.
! 	(MACHO_SYMBOL_MUST_INDIRECT_P): New.
! 
! 	Backport from mainline
! 	2019-10-07  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	* config/darwin.c (machopic_output_indirection): Don't put
! 	hidden symbol indirections into the .data section, use the
! 	non-lazy symbol pointers section as normal.
! 	(darwin_encode_section_info): Record if a symbol is hidden.
! 	* config/darwin.h (MACHO_SYMBOL_FLAG_HIDDEN_VIS): New.
! 	(MACHO_SYMBOL_HIDDEN_VIS_P): New.
! 
! 	Backport from mainline
! 	2019-10-07  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	* config/darwin.c (machopic_symbol_defined_p): Use symbol flag
! 	predicates instead of accessing bits directly.
! 	(machopic_indirect_call_target): Likewise.
! 	(machopic_output_indirection): Likewise.
! 	(darwin_encode_section_info): Improve description.  Use renamed
! 	symbol flags.  Use predicate macros for variables and functions.
! 	* config/darwin.h:
! 	Rename MACHO_SYMBOL_VARIABLE to MACHO_SYMBOL_FLAG_VARIABLE.
! 	Rename MACHO_SYMBOL_DEFINED to MACHO_SYMBOL_FLAG_DEFINED.
! 	Rename MACHO_SYMBOL_STATIC to MACHO_SYMBOL_FLAG_STATIC.
! 	(MACHO_SYMBOL_VARIABLE_P): New.
! 	(MACHO_SYMBOL_DEFINED_P):New.
! 	(MACHO_SYMBOL_STATIC_P): New.
! 	* config/i386/darwin.h (MACHO_SYMBOL_FLAG_VARIABLE): Delete.
! 	(SYMBOL_FLAG_SUBT_DEP): New.
! 	* config/rs6000/darwin.h (SYMBOL_FLAG_SUBT_DEP): New.
! 
! 2019-10-25  Jan Hubicka  <hubicka@ucw.cz>
! 
! 	Backport from mainline
! 	2019-10-11  Jan Hubicka  <hubicka@ucw.cz>
! 	* gimple-streamer-out.c (output_gimple_stmt): Add explicit function
! 	parameter.
! 	* lto-streamer-out.c: Include tree-dfa.h.
! 	(output_cfg): Do not use cfun.
! 	(lto_prepare_function_for_streaming): New.
! 	(output_function): Do not push cfun; do not initialize loop optimizer.
! 	* lto-streamer.h (lto_prepare_function_for_streaming): Declare.
! 	* passes.c (ipa_write_summaries): Use it.
! 	(ipa_write_optimization_summaries): Do not modify bodies.
! 	* tree-dfa.c (renumber_gimple_stmt_uids): Add function parameter.
! 	* tree.dfa.h (renumber_gimple_stmt_uids): Update prototype.
! 	* tree-ssa-dse.c (pass_dse::execute): Update use of
! 	renumber_gimple_stmt_uids.
! 	* tree-ssa-math-opts.c (pass_optimize_widening_mul::execute): Likewise.
! 
! 	2019-10-12  Jan Hubicka  <hubicka@ucw.cz>
! 	* lto-streamer-out.c (collect_block_tree_leafs): Renumber statements
! 	so non-virutal are before virutals.
! 	(output_function): Avoid body modifications.
! 
! 2019-10-25  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	Backport from mainline
! 	2019-05-08  Mihail Ionescu  <mihail.ionescu@arm.com>
! 	    Richard Earnshaw  <rearnsha@arm.com>
! 	PR target/88167
! 	* config/arm/arm.c (thumb1_prologue_unused_call_clobbered_lo_regs): New
! 	function.
! 	(thumb1_epilogue_unused_call_clobbered_lo_regs): New function.
! 	(thumb1_compute_save_core_reg_mask): Don't force a spare work
! 	register if both the epilogue and prologue can use call-clobbered
! 	regs.
! 	(thumb1_unexpanded_epilogue): Use
! 	thumb1_epilogue_unused_call_clobbered_lo_regs.  Reverse the logic for
! 	picking temporaries for restoring high regs to match that of the
! 	prologue where possible.
! 	(thumb1_expand_prologue): Add any usable call-clobbered low registers to
! 	the list of work registers.  Detect if the return address is still live
! 	at the end of the prologue and avoid using it for a work register if so.
! 	If the return address is not live, add LR to the list of pushable regs
! 	after the first pass.
! 
! 2019-10-25  Jan Hubicka  <hubicka@ucw.cz>
! 
! 	Backport from mainline
! 	2019-10-24  Jan Hubicka  <hubicka@ucw.cz>
! 	* symbols-summary.h (fast_function_summary<T *, V>::release,
! 	fast_call_summary<T *, V>::release): Free m_vector.
! 
! 2019-10-25  Jan Hubicka  <hubicka@ucw.cz>
! 
! 	Backport from mainline
! 
! 	2019-10-18  Jakub Jelinek  <jakub@redhat.com>
! 	PR middle-end/92153
! 	* ggc-page.c (release_pages): Read g->alloc_size before free rather
! 	than after it.
! 
! 	2019-10-11  Jan Hubicka  <hubicka@ucw.cz>
! 	* ggc-page.c (release_pages): Output statistics when !quiet_flag.
! 	(ggc_collect): Dump later to not interfere with release_page dump.
! 	(ggc_trim): New function.
! 	* ggc-none.c (ggc_trim): New.
! 	* ggc.h (ggc_trim): Declare.
! 
! 2019-10-24  Mihail Ionescu  <mihail.ionescu@arm.com>
! 
! 	Backport from mainline
! 	2019-10-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
! 
! 	* config/arm/t-multilib: Add new multilib variants and new
! 	mappings.
! 
! 2019-10-24  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline
! 	2019-10-23  Iain Sandoe  <iain@sandoe.co.uk>
! 	* config/rs6000/darwin.h (ASM_OUTPUT_MAX_SKIP_ALIGN): Guard
! 	against out of range max skip or log values.
! 
! 2019-10-23  Peter Bergner  <bergner@linux.ibm.com>
! 
! 	Backport from mainline
! 	2019-10-08  Tulio Magno Quites Machado Filho  <tuliom@linux.ibm.com>
  
! 	* config.gcc: Move -L usage from LINK_OS_EXTRA_SPEC32 and
! 	LINK_OS_EXTRA_SPEC64 to MD_STARTFILE_PREFIX and
! 	MD_STARTFILE_PREFIX_1 when using --with-advance-toolchain.
  
! 2019-10-23  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-09-26  Martin Liska  <mliska@suse.cz>
  
! 	PR tree-optimization/91885
! 	* tree-vectorizer.c (try_vectorize_loop_1):
! 	Add TODO_update_ssa_only_virtuals similarly to what slp
! 	pass does.
  
! 2019-10-23  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR tree-optimization/92131
! 	* tree-vrp.c (extract_range_from_plus_minus_expr): If the resulting
! 	range would be symbolic, drop to varying for any explicit overflow
! 	in the constant part or if neither range is a singleton.
  
! 2019-10-23  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-10-17  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/91887
! 	* dwarf2out.c (gen_formal_parameter_die): Also try to match
! 	context_die against a DW_TAG_GNU_formal_parameter_pack parent.
  
! 2019-10-21  Jakub Jelinek  <jakub@redhat.com>
  
! 	Backported from mainline
! 	2019-10-17  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/92056
! 	* tree-object-size.c (cond_expr_object_size): Return early if then_
! 	processing resulted in unknown size.
  
! 	2019-10-05  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/91734
! 	* generic-match-head.c: Include fold-const-call.h.
! 	* match.pd (sqrt(x) cmp c): Check the boundary value and
! 	in case inexact computation of c*c affects comparison of the boundary,
! 	turn LT_EXPR into LE_EXPR, GE_EXPR into GT_EXPR, LE_EXPR into LT_EXPR
! 	or GT_EXPR into GE_EXPR.  Punt for sqrt comparisons against NaN and
! 	for -frounding-math.  For c2, try the next smaller or larger floating
! 	point constant depending on comparison code and if it has the same
! 	sqrt as c2, use it instead of c2.
  
! 	2019-09-29  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR bootstrap/90543
! 	* optc-save-gen.awk: Fix up printing string option differences.
  
! 	2019-09-27  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/91920
! 	* gimplify.c (omp_default_clause): Predetermine DECL_IN_CONSTANT_POOL
! 	variables as shared.
  
! 	2019-09-11  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/91723
! 	* tree-vect-stmts.c (vectorizable_call): Use types_compatible_p check
! 	instead of pointer equality when checking if argument vectypes are
! 	the same.
  
! 	2019-09-07  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/91665
! 	* tree-vect-loop.c (vectorizable_reduction): Punt if base has type
! 	incompatible with the type of PHI result.
  
! 	2019-09-06  Jakub Jelinek  <jakub@redhat.com>
  
! 	* function.c (assign_parm_find_data_types): Use RECORD_OR_UNION_TYPE_P
! 	before testing TYPE_TRANSPARENT_AGGR.
! 	* calls.c (initialize_argument_information, load_register_parameters):
! 	Likewise.
  
! 	2019-09-05  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/91001
! 	PR middle-end/91105
! 	PR middle-end/91106
! 	* calls.c (load_register_parameters): For TYPE_TRANSPARENT_AGGR
! 	types, use type of their first field instead of type of
! 	args[i].tree_value.
  
! 	2019-09-02  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR go/91617
! 	* fold-const.c (range_check_type): For enumeral and boolean
! 	type, pass 1 to type_for_size langhook instead of
! 	TYPE_UNSIGNED (etype).  Return unsigned_type_for result whenever
! 	etype isn't TYPE_UNSIGNED INTEGER_TYPE.
! 	(build_range_check): Don't call unsigned_type_for for pointer types.
! 	* match.pd (X / C1 op C2): Don't call unsigned_type_for on
! 	range_check_type result.
  
! 	2019-09-01  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/91623
! 	* optabs.c (expand_vec_cond_expr): If op0 is a VECTOR_CST and only
! 	EQ_EXPR/NE_EXPR is supported, verify that op0 only contains
! 	zeros or negative elements and use NE_EXPR instead of LT_EXPR against
! 	zero vector.
  
! 	PR lto/91572
! 	* tree.c (find_decls_types_in_node): Also walk TREE_PURPOSE of
! 	GIMPLE_ASM TREE_LIST operands.
  
! 	2019-08-29  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/91351
! 	* tree-cfg.c (generate_range_test): Use range_check_type instead of
! 	unsigned_type_for.
! 	* tree-cfgcleanup.c (convert_single_case_switch): Punt if
! 	range_check_type returns NULL.
! 	* tree-switch-conversion.c (switch_conversion::build_one_array):
! 	Use range_check_type instead of unsigned_type_for, don't perform
! 	linear opt if it returns NULL.
! 	(bit_test_cluster::find_bit_tests): Formatting fix.
! 	(bit_test_cluster::emit): Use range_check_type instead of
! 	unsigned_type_for.
! 	(switch_decision_tree::try_switch_expansion): Punt if range_check_type
! 	returns NULL.
  
! 2019-10-18  Georg-Johann Lay  <avr@gjlay.de>
  
! 	Backport from 2019-10-18 trunk r277143.
  
! 	PR target/86040
! 	* config/avr/avr.c (avr_out_lpm): Do not shortcut-return.
  
! 2019-10-18  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-10-05  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	PR target/59888
! 	* config/darwin.c (darwin_rodata_section): Add relocation flag,
! 	choose const_data section for constants with relocations.
! 	(machopic_select_section): Pass relocation flag to
! 	darwin_rodata_section ().
  
! 2019-10-18  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-09-21  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin.c (machopic_legitimize_pic_address): Check
! 	for lra, rather than reload.
  
! 2019-10-17  John David Anglin  <danglin@gcc.gnu.org>
  
! 	* config/pa/pa.c (pa_output_indirect_call): Fix typos in last change.
  
! 2019-10-17  Richard Earnshaw  <rearnsha@arm.com>
  
! 	Backport from mainline
! 	2019-05-03  Richard Earnshaw  <rearnsha@arm.com>
  
! 	PR target/89400
! 	* config/arm/arm.md (unaligned_loadsi): Add variant for thumb1.
! 	Restrict 'all' variant to 32-bit configurations.
! 	(unaligned_loadhiu): Likewise.
! 	(unaligned_storehi): Likewise.
! 	(unaligned_storesi): Likewise.
! 	(unaligned_loadhis): Disable when compiling for thumb1.
  
! 2019-10-16  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-10-03  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	PR target/87243
! 	* config/darwin-driver.c (maybe_get_sysroot_from_sdkroot): New.
! 	(darwin_driver_init): Use the sysroot provided by SDKROOT when that
! 	is available and the user has not set one on the command line.
  
! 2019-10-16  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-07-03  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin.h (DRIVER_SELF_SPECS): Remove the linker cases.
! 	(RDYNAMIC): Rename to, DARWIN_RDYNAMIC.
! 	(DARWIN_PIE_SPEC, DARWIN_NOPIE_SPEC): Adjust to remove the Xlinker
! 	clauses.
! 	(LINK_COMMAND_SPEC_A): Add DARWIN_RDYNAMIC, DARWIN_PIE_SPEC and
! 	DARWIN_NOPIE_SPEC.
  
! 	Backport from mainline
! 	2019-06-19  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin.h (DRIVER_SELF_SPECS): Add RDYNAMIC, DARWIN_PIE_SPEC
! 	and DARWIN_NOPIE_SPEC.
! 	(RDYNAMIC): New, modified from DARWIN_EXPORT_DYNAMIC.
! 	(DARWIN_PIE_SPEC): Collate from darwin.h and darwin9.h.
! 	(DARWIN_NOPIE_SPEC): Collate from darwin10.h.
! 	(DARWIN_NOCOMPACT_UNWIND): New from darwin10.h
! 	(DARWIN_EXPORT_DYNAMIC): Delete.
! 	* config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move no_compact_unwind
! 	and pie options processing to  darwin.h.
! 	* config/darwin9.h (DARWIN_PIE_SPEC): Move pie processing to darwin.h
  
! 2019-10-16  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-10-04  Richard Biener  <rguenther@suse.de>
  
! 	PR lto/91968
! 	* tree.c (find_decls_types_r): Do not remove LABEL_DECLs from
! 	BLOCK_VARS.
  
! 	2019-09-19  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91812
! 	* tree-ssa-phiprop.c (propagate_with_phi): Do not replace
! 	volatile loads.
  
! 	2019-09-17  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/91772
! 	* dwarf2out.c (dwarf2out_late_global_decl): If early dwarf
! 	was missing generate locations only once.
  
! 	2019-09-17  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91790
! 	* tree-vect-stmts.c (vectorizable_load): For BB vectorization
! 	use the correct DR for setting up realignment.
  
! 2019-10-14  Will Schmidt  <will_schmidt@vnet.ibm.com>
  
! 	Backport from trunk
! 	2019-09-26  Will Schmidt <will_schmidt@vnet.ibm.com>
  
! 	* config/rs6000/rs6000-builtin.def: (LVSL, LVSR, LVEBX, LVEHX,
! 	LVEWX, LVXL, LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI,
! 	LVXL_V16QI, LVX, LVX_V1TI, LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI,
! 	LVX_V8HI, LVX_V16QI, LVLX, LVLXL, LVRX, LVRXL, LXSDX, LXVD2X_V1TI,
! 	LXVD2X_V2DF, LXVD2X_V2DI, LXVDSX, LXVW4X_V4SF, LXVW4X_V4SI,
! 	LXVW4X_V8HI, LXVW4X_V16QI, LD_ELEMREV_V1TI, LD_ELEMREV_V2DF,
! 	LD_ELEMREV_V2DI, LD_ELEMREV_V4SF, LD_ELEMREV_V4SI, LD_ELEMREV_V8HI,
! 	LD_ELEMREV_V16QI): Use the PURE attribute.
  
! 2019-10-10  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/92022
! 	* config/alpha/alpha.c (alpha_handle_trap_shadows): Skip DEBUG_INSN.
  
! 2019-10-10  Oleg Endo  <olegendo@gcc.gnu.org>
  
! 	Backport from mainline
! 	2019-10-10  Oleg Endo  <olegendo@gcc.gnu.org>
  
! 	PR target/88630
! 	* config/sh/sh.h (TARGET_FPU_SH4_300): New macro.
! 	* config/sh/sh.c (sh_option_override): Enable fsca and fsrra insns
! 	also for TARGET_FPU_SH4_300.
! 	(sh_emit_mode_set): Check for TARGET_FPU_SH4_300 instead of
! 	TARGET_SH4_300.
! 	* config/sh/sh.md (toggle_pr): Add TARGET_FPU_SH4_300 condition.
! 	(negsf2): Expand to either negsf2_fpscr or negsf2_no_fpscr.
! 	(*negsf2_i): Split into ...
! 	(negsf2_fpscr, negsf2_no_fpscr): ... these new patterns.
! 	(abssf2): Expand to either abssf2_fpsc or abssf2_no_fpsc.
! 	(**abssf2_i): Split into ...
! 	(abssf2_fpscr, abssf2_no_fpscr): ... these new patterns.
! 	(negdf2): Expand to either negdf2_fpscr or negdf2_no_fpscr.
! 	(*negdf2_i): Split into ...
! 	(negdf2_fpscr, negdf2_no_fpscr): ... these new patterns.
! 	(absdf2): Expand to either absdf2_fpscr or absdf2_no_fpsc.
! 	(**abssf2_i): Split into ...
! 	(absdf2_fpscr, absdf2_no_fpscr): ... these new patterns.
  
! 2019-10-10  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	Backport from mainline
! 	2019-10-10  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* common/config/s390/s390-common.c (PF_ARCH13): Rename to...
! 	(PF_Z15): ... this.
! 	* config.gcc: Add z15 as option for --with-arch and --with-tune
! 	configure switches.
! 	* config/s390/s390-c.c (s390_resolve_overloaded_builtin): Add
! 	error reporting for unsupported builtins.
! 	* config/s390/s390-opts.h (enum processor_type): Rename
! 	PROCESSOR_8561_ARCH13 to PROCESSOR_8561_Z15.
! 	* config/s390/8561.md: Rename arch13 to z15 throughout the file.
! 	* config/s390/driver-native.c (s390_host_detect_local_cpu):
! 	Likewise.
! 	* config/s390/s390-builtins.def: Likewise.
! 	* config/s390/s390.c (processor_table): Add z15 as option and keep arch13 as alternative.
! 	(s390_expand_builtin): Add missing check for unsupported builtins.
! 	(s390_canonicalize_comparison): Rename TARGET_ARCH13 to TARGET_Z15.
! 	(s390_rtx_costs): Likewise.
! 	(s390_get_sched_attrmask): Rename arch13 to z15.
! 	(s390_get_unit_mask): Likewise.
! 	(s390_is_fpd): Likewise.
! 	(s390_is_fxd): Likewise.
! 	* config/s390/s390.h (enum processor_flags): Likewise.
! 	* config/s390/s390.md: Likewise.
! 	* config/s390/vector.md: Likewise.
! 	* config/s390/vx-builtins.md: Likewise.
! 	* config/s390/s390.opt: Add z15 to processor_type value.
  
! 2019-10-07  Bill Schmidt  <wschmidt@linux.ibm.com>
  
! 	Backport from mainline
! 	2019-10-01  Bill Schmidt  <wschmidt@linux.ibm.com>
  
! 	PR target/91275
! 	* config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Don't swap
! 	vpmsumd.
  
! 2019-10-05  Andrea Corallo  <andrea.corallo@arm.com>
  
! 	Backport from mainline
! 	2019-10-03  Andrea Corallo  <andrea.corallo@arm.com>
! 	* gcc/ipa-cp.c (ipa_cp_c_finalize): Release ipcp_transformation_sum
! 	when finished.
! 	* ipa-prop.c (ipcp_free_transformation_sum): New function.
! 	* ipa-prop.h (ipcp_free_transformation_sum): Add declaration.
  
! 2019-10-04  Dragan Mladjenovic <dmladjenovic@wavecomp.com>
  
! 	Backport from mainline
! 	2019-10-03  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
  
! 	PR target/91769
! 	* config/mips/mips.c (mips_split_move): Use reg_overlap_mentioned_p
! 	instead of REGNO equality check on addr.reg.
  
! 2019-10-04  Dragan Mladjenovic <dmladjenovic@wavecomp.com>
  
! 	Backport from mainline
! 	2019-07-07  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/mips/mips.c (mips_split_move): Zero-initialize addr
! 	and check whether addr.reg is nonnull before using it.
  
! 2019-10-02  Bernd Edlinger  <bernd.edlinger@hotmail.de>
  
! 	Backport from mainline
  
! 	2019-09-13  Bernd Edlinger  <bernd.edlinger@hotmail.de>
  
! 	PR fortran/91716
! 	* trans-array.c (gfc_conv_array_initializer): Always assign the
! 	array type of the field to the string constant.
  
! 2019-10-01  Oleg Endo  <olegendo@gcc.gnu.org>
  
! 	Backport from mainline
  
! 	2019-10-01  Oleg Endo  <olegendo@gcc.gnu.org>
  
! 	PR target/88562
! 	* config/sh/sh.c (sh_extending_set_of_reg::use_as_extended_reg): Use
! 	sh_check_add_incdec_notes to preserve REG_INC notes when replacing
! 	a memory access insn.
  
  
! 2019-10-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
! 	Backport from mainline
! 	2019-09-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
! 	* config/aarch64/aarch64.md (mov<mode>): Don't call
! 	aarch64_split_dimode_const_store on volatile MEM.
  
! 2019-10-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
! 	Backport from mainline
! 	2019-09-26  Matt Turner  <mattst88@gmail.com>
  
! 	PR driver/69471
! 	* config/aarch64/aarch64.opt (march=): Add Negative(march=).
! 	(mtune=): Add Negative(mtune=).
! 	(mcpu=): Add Negative(mcpu=).
! 	* config/arm/arm.opt: Likewise.
  
! 2019-09-28  Oleg Endo  <olegendo@gcc.gnu.org>
  
! 	Backport from mainline
! 	2019-09-28  Oleg Endo  <olegendo@gcc.gnu.org>
  
! 	PR target/86805
! 	* config/sh/sh.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define.
  
! 2019-09-28  Oleg Endo  <olegendo@gcc.gnu.org>
  
! 	Backport from mainline
! 	2019-09-28  Oleg Endo  <olegendo@gcc.gnu.org>
  
! 	PR target/80672
! 	* config/sh/sh.c (parse_validate_atomic_model_option): Use
! 	std::string::compare instead of std::string::find.
  
! 2019-09-25  Kyrylo Tkachov <kyrylo.tkachov@arm.com>
  
! 	Backport from mainline
! 	2019-08-22  Kyrylo Tkachov <kyrylo.tkachov@arm.com>
  
! 	* config/arm/arm_acle.h: Use arch=armv8-a+crc+simd pragma for CRC32
! 	intrinsics if __ARM_FP.
! 	Use __ARM_FEATURE_CRC32 ifdef guard.
  
! 2019-09-23  Max Filippov  <jcmvbkbc@gmail.com>
  
! 	Backport from mainline
! 	2019-06-18  Max Filippov  <jcmvbkbc@gmail.com>
  
! 	* config/xtensa/xtensa.c (xtensa_expand_prologue): Add stack
! 	pointer adjustment for the case of no callee-saved registers and
! 	stack frame bigger than 128 bytes.
  
! 2019-09-22  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-06-16  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin.opt (prebind, noprebind, seglinkedit,
! 	noseglinkedit): Add RejectNegative.
  
! 	Backport from mainline
! 	2019-06-14  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin.opt: Add RejectNegative where needed, reorder
! 	and add minimal functional descriptions.
  
! 2019-09-20  John David Anglin  <danglin@gcc.gnu.org>
  
! 	* config/pa/pa.c (pa_trampoline_init): Remove spurious extended
! 	character.
  
! 2019-09-20  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	Backport from mainline
! 	2019-06-06  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	PR rtl-optimization/88751
! 	* ira.c (ira): Use the number of the actually referenced registers
! 	when calculating the threshold.
  
! 2019-09-20  Kito Cheng  <kito.cheng@sifive.com>
  
! 	Backport from mainline
! 	2019-09-18  Jim Wilson  <jimw@sifive.com>
  
! 	PR target/91683
! 	* config/riscv/riscv-protos.h (riscv_split_symbol): New bool parameter.
! 	(riscv_move_integer): Likewise.
! 	* config/riscv/riscv.c (riscv_split_integer): Pass FALSE for new
! 	riscv_move_integer arg.
! 	(riscv_legitimize_move): Likewise.
! 	(riscv_force_temporary): New parameter in_splitter.  Don't call
! 	force_reg if true.
! 	(riscv_unspec_offset_high): Pass FALSE for new riscv_force_temporary
! 	arg.
! 	(riscv_add_offset): Likewise.
! 	(riscv_split_symbol): New parameter in_splitter.  Pass to
! 	riscv_force_temporary.
! 	(riscv_legitimize_address): Pass FALSE for new riscv_split_symbol
! 	arg.
! 	(riscv_move_integer): New parameter in_splitter.  New local
! 	can_create_psuedo.  Don't call riscv_split_integer or force_reg when
! 	in_splitter TRUE.
! 	(riscv_legitimize_const_move): Pass FALSE for new riscv_move_integer,
! 	riscv_split_symbol, and riscv_force_temporary args.
! 	* config/riscv/riscv.md (low<mode>+1): Pass TRUE for new
! 	riscv_move_integer arg.
! 	(low<mode>+2): Pass TRUE for new riscv_split_symbol arg.
  
! 2019-09-20  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR target/91269
! 	* config/sparc/sparc.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
  
! 2019-09-19  Kito Cheng  <kito.cheng@sifive.com>
  
! 	Backport from mainline
! 	2019-09-05  Jakub Jelinek  <jakub@redhat.com>
! 		    Jim Wilson  <jimw@sifive.com>
  
! 	PR target/91635
! 	* config/riscv/riscv.md (zero_extendsidi2, zero_extendhi<GPR:mode>2,
! 	extend<SHORT:mode><SUPERQI:mode>2): Don't split if
! 	paradoxical_subreg_p (operands[0]).
! 	(*lshrsi3_zero_extend_3+1, *lshrsi3_zero_extend_3+2): Add clobber and
! 	use as intermediate value.
  
! 2019-09-11  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR rtl-optimization/89795
! 	* rtlanal.c (nonzero_bits1) <SUBREG>: Do not propagate results from
! 	inner REGs to paradoxical SUBREGs if WORD_REGISTER_OPERATIONS is set.
  
! 2019-09-09  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/87853
! 	* config/i386/emmintrin.h (_mm_cmpeq_epi8): Use casts to __v16qi
! 	instead of __v16qs.
  
! 	PR target/91704
! 	* config/i386/avxintrin.h (__v32qs): New typedef.
! 	* config/i386/avx2intrin.h (_mm256_cmpgt_epi8): Use casts to __v32qs
! 	instead of __v32qi.
  
! 2019-09-04  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	Backport from mainline
! 	2019-08-13  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	PR target/81800
! 	* gcc/config/aarch64/aarch64.md (lrint): Disable lrint pattern if GPF
! 	operand is larger than a long int.
  
! 2019-09-03  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/91597
! 	* tree-vrp.c (extract_range_from_binary_expr): Remove unsafe
! 	BIT_AND_EXPR optimization for pointers, even if both operand
! 	ranges don't include NULL, the result can be NULL.
  
! 2019-09-02  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-09-02  Martin Liska  <mliska@suse.cz>
  
! 	PR gcov-profile/91601
! 	* gcov.c (path_contains_zero_cycle_arc): Rename to ...
! 	(path_contains_zero_or_negative_cycle_arc): ... this and handle
! 	also negative edges.
! 	(circuit): Handle also negative edges as they can happen
! 	in some situations.
  
! 2019-09-01  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR target/91472
! 	* config/sparc/sparc.c (sparc_cannot_force_const_mem): Return true
! 	during LRA/reload in PIC mode if the PIC register hasn't been used yet.
! 	(sparc_pic_register_p): Test reload_in_progress for consistency's sake.
  
! 2019-08-31  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-08-23  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	PR pch/61250
! 	* ggc-page.c (ggc_pch_read): Read the ggc_pch_ondisk structure
! 	and issue any diagnostics needed before collecting the pre-PCH
! 	state.
  
! 2019-08-30  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	Backport from trunk
! 	2019-08-22  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	PR target/91481
! 	* config/rs6000/rs6000.md (unspec): Delete UNSPEC_DARN, UNSPEC_DARN_32,
! 	and UNSPEC_DARN_RAW.
! 	(unspecv): New enumerator values UNSPECV_DARN, UNSPECV_DARN_32, and
! 	UNSPECV_DARN_RAW.
! 	(darn_32): Use an unspec_volatile, and UNSPECV_DARN_32.
! 	(darn_raw): Use an unspec_volatile, and UNSPECV_DARN_RAW.
! 	(darn): Use an unspec_volatile, and UNSPECV_DARN.
  
! 2019-08-30  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	Backport from trunk
! 	2019-08-22  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	* config/rs6000/altivec.md (unspec): Delete UNSPEC_DARN, UNSPEC_DARN_32,
! 	UNSPEC_DARN_RAW, UNSPEC_CMPRB, UNSPEC_CMPRB2, UNSPEC_CMPEQB; move to...
! 	* config/rs6000/rs6000.md (unspec): ... here.
! 	* config/rs6000/altivec.md (darn_32, darn_raw, darn, cmprb,
! 	*cmprb_internal, setb_signed, setb_unsigned, cmprb2, *cmprb2_internal,
! 	cmpeqb, *cmpeqb_internal): Delete, move to...
! 	* config/rs6000/rs6000.md (darn_32, darn_raw, darn, cmprb,
! 	*cmprb_internal, setb_signed, setb_unsigned, cmprb2, *cmprb2_internal,
! 	cmpeqb, *cmpeqb_internal): ... here.
  
! 2019-08-30  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-04-29  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90278
! 	* tree-ssa-forwprop.c (pass_forwprop::execute): Transfer/clean
! 	EH on comparison simplification.
  
! 2019-08-29  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91568
! 	* tree-vectorizer.h (_slp_tree::max_nunits): Add.
! 	(vect_update_max_nunits): Add overload for poly_uint64.
! 	* tree-vect-slp.c (vect_create_new_slp_node): Initialize it.
! 	(vect_build_slp_tree): Record max_nunits into the subtree
! 	and merge it upwards.
! 	(vect_print_slp_tree): Print max_nunits.
  
! 2019-08-28  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-05-27  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90637
! 	* tree-ssa-sink.c (statement_sink_location): Honor the
! 	computed sink location for single-uses.
  
! 2019-08-26  Xiong Hu Luo  <luoxhu@linux.ibm.com>
  
! 	Backport r274411 from trunk to gcc-9-branch.
! 	2019-08-14  Xiong Hu Luo  <luoxhu@linux.ibm.com>
  
! 	PR lto/91287
! 	* builtins.c (builtin_with_linkage_p): New function.
! 	* builtins.h (builtin_with_linkage_p): New function.
! 	* symtab.c (write_symbol): Remove redundant assert.
! 	* lto-streamer-out.c (symtab_node::output_to_lto_symbol_table_p):
! 	Remove FIXME and use builtin_with_linkage_p.
  
! 2019-08-25  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/91533
! 	Backport from mainline
! 	2019-06-30  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	* config/i386/sse.md (ssse3_abs<mode>2): Rename from abs<mode>2.
! 	* config/i386/i386-builtin.def (__builtin_ia32_pabsb):
! 	Use CODE_FOR_ssse3_absv8qi2.
! 	(__builtin_ia32_pabsw): Use CODE_FOR_ssse3_absv4hi2.
! 	(__builtin_ia32_pabsd): Use CODE_FOR_ssse3_absv2si2.
  
! 2019-08-23  Mihailo Stojanovic  <mistojanovic@wavecomp.com>
  
! 	Backport from mainline
! 	2019-08-23  Mihailo Stojanovic  <mistojanovic@wavecomp.com>
  
! 	* config/mips/mips.md (mips_get_fcsr, *mips_get_fcsr): Use SI
! 	machine mode for unspec_volatile operand.
  
! 2019-08-23  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/91508
! 	Backport from mainline
! 	2019-08-15  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/91438
! 	* cgraph.c (cgraph_node::remove): When setting
! 	n->origin = NULL for all nested functions, reset
! 	also next_nested.
  
! 2019-08-23  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-08-15  Martin Liska  <mliska@suse.cz>
  
! 	* cgraph.c (cgraph_node::verify_node): Verify origin, nested
! 	and next_nested.
  
! 2019-08-23  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-08-15  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/91404
! 	* passes.c (order): Remove.
! 	(uid_hash_t): Likewise).
! 	(remove_cgraph_node_from_order): Remove from set
! 	of pointers (cgraph_node *).
! 	(insert_cgraph_node_to_order): New.
! 	(duplicate_cgraph_node_to_order): New.
! 	(do_per_function_toporder): Register all 3 cgraph hooks.
! 	Skip removed_nodes now as we know about all of them.
  
! 2019-08-21  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-08-18  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/rs6000/darwin.h (TARGET_OS_CPP_BUILTINS): Add asserts
! 	for cpu and machine.  Factor 64/32b builtins.
  
! 2019-08-20  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR rtl-optimization/91347
! 	* dse.c (scan_insn): Call add_wild_read for non-const/memset tail calls
! 	before reload if HARD_FRAME_POINTER_IS_ARG_POINTER.
  
! 2019-08-19  Richard Earnshaw  <rearnsha@arm.com>
  
! 	Backport from mainline
! 	2019-09-09  Richard Earnshaw  <rearnsha@arm.com>
  
! 	PR target/91386
! 	* config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Use copy_rtx
! 	to preserve the contents of the original insns.
  
! 2019-08-16  Bernd Edlinger  <bernd.edlinger@hotmail.de>
  
! 	Backport from mainline
! 	2019-08-16  Bernd Edlinger  <bernd.edlinger@hotmail.de>
  
! 	PR tree-optimization/91109
! 	* lra-int.h (lra_need_for_scratch_reg_p): Declare.
! 	* lra.c (lra): Use lra_need_for_scratch_reg_p.
! 	* lra-spills.c (lra_need_for_scratch_reg_p): New function.
  
! 	2019-08-07  Bernd Edlinger  <bernd.edlinger@hotmail.de>
  
! 	PR tree-optimization/91109
! 	* lra-remat.c (update_scratch_ops): Remove assignment of the
! 	hard register.
  
! 2019-08-15  Steve Ellcey  <sellcey@marvell.com>
  
! 	Backport from mainline
! 	2019-08-02  Steve Ellcey  <sellcey@marvell.com>
  
! 	* omp-simd-clone.c (simd_clone_adjust_return_type): Remove call to
! 	build_distinct_type_copy.
! 	(simd_clone_adjust_argument_types): Ditto.
! 	(simd_clone_adjust): Call build_distinct_type_copy here.
! 	(expand_simd_clones): Ditto.
  
! 2019-08-15  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91445
! 	Backport from mainline
! 	2019-07-05  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91091
! 	* tree-ssa-alias.h (get_continuation_for_phi): Add tbaa_p parameter.
! 	(walk_non_aliased_vuses): Likewise.
! 	* tree-ssa-alias.c (maybe_skip_until): Pass down tbaa_p.
! 	(get_continuation_for_phi): New tbaa_p parameter and pass
! 	it down.
! 	(walk_non_aliased_vuses): Likewise.
! 	* tree-ssa-pre.c (translate_vuse_through_block): Likewise.
! 	* tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
! 	Likewise.
! 	* tree-ssa-sccvn.c (struct vn_walk_cb_data): Add tbaa_p flag.
! 	(vn_reference_lookup_3): Handle and pass down tbaa_p flag.
! 	(vn_reference_lookup_pieces): Adjust.
! 	(vn_reference_lookup): Remove alias-set altering, instead pass
! 	down false as tbaa_p.
  
! 	2019-07-04  Richard Biener  <rguenther@suse.de>
  
! 	* tree-ssa-sccvn.h (vn_reference_lookup): Add last_vuse_ptr
! 	argument.
! 	* tree-ssa-sccvn.c (last_vuse_ptr, vn_walk_kind): Move
! 	globals into...
! 	(struct vn_walk_cb_data): New callback data struct.
! 	(vn_reference_lookup_2): Adjust.
! 	(vn_reference_lookup_3): Likewise.
! 	(vn_reference_lookup_pieces): Likewise.
! 	(vn_reference_lookup): Likewise, get last_vuse_ptr argument.
! 	(visit_reference_op_load): Adjust.
  
! 2019-08-14  Martin Sebor  <msebor@redhat.com>
  
! 	Backport from mainline
  
! 	2019-08-01  Martin Sebor  <msebor@redhat.com>
  
! 	PR c++/90947
! 	* tree.c (type_initializer_zero_p): Define.
! 	* tree.h (type_initializer_zero_p): New function.
  
! 	2019-08-05  Martin Sebor  <msebor@redhat.com>
  
! 	* doc/extend.texi (Common Variable Attributes): Document alias
! 	attribute.
  
! 2019-08-12  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-08-12  Richard Biener  <rguenther@suse.de>
  
! 	PR lto/91375
! 	* tree.c (free_lang_data_in_type): Do not free TYPE_BINFO dependent on
! 	flag_devirtualize.
  
! 	2019-08-12  Richard Biener  <rguenther@suse.de>
  
! 	PR driver/91130
! 	* lto-wrapper.c (get_options_from_collect_gcc_options): Remove
! 	lang_mask option, always use CL_DRIVER.
! 	(find_and_merge_options): Adjust.
! 	(run_gcc): Likewise.
  
! 	2019-08-07  Richard Earnshaw  <rearnsha@arm.com>
  
! 	PR driver/91130
! 	* lto-wrapper.c (find_and_merge_options): Use CL_DRIVER when
! 	processing COLLECT_GCC_OPTIONS.
! 	(run_gcc): Likewise.
  
! 2019-08-12  Jakub Jelinek  <jakub@redhat.com>
  
! 	* BASE-VER: Set to 9.2.1.
  
! 2019-08-12  Release Manager
  
! 	* GCC 9.2.0 released.
  
! 2019-08-05  Kito Cheng  <kito.cheng@sifive.com>
  
! 	Backport from mainline
! 	2019-08-05  Kito Cheng  <kito.cheng@sifive.com>
  
! 	* config/riscv/riscv.c (riscv_promote_function_mode): New.
! 	(TARGET_PROMOTE_FUNCTION_MODE): Use riscv_promote_function_mode.
  
! 2019-08-05  Alan Modra  <amodra@gmail.com>
  
! 	PR target/91349
! 	* config/rs6000/freebsd64.h (CPLUSPLUS_CPP_SPEC),
! 	(LINK_GCC_C_SEQUENCE_SPEC): Undef.
  
! 2019-08-04  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	Backport from trunk
! 	2019-05-02  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	* config/rs6000/rs6000.c (rs6000_dbx_register_number): Return the
! 	correct numbers for TFHAR, TFIAR, TEXASR.
  
! 2019-08-03  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-07-24  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	PR bootstrap/87030
! 	* config/i386/darwin.h (REAL_LIBGCC_SPEC): Revert change from r273749.
  
! 	PR bootstrap/87030
! 	* config/i386/darwin.h (REAL_LIBGCC_SPEC): Move from here...
! 	* config/i386/darwin32-biarch.h .. to here.
! 	* config/i386/darwin64-biarch.h: Adjust comments.
! 	* config/rs6000/darwin32-biarch.h: Likewise.
! 	* config/rs6000/darwin64-biarch.h: Likewise.
! 	* config.gcc: Missed commit from r273746
! 	(*-*-darwin*): Don't include CPU t-darwin here.
! 	(i[34567]86-*-darwin*): Adjust to use biarch files. Produce
! 	an error message if i686-darwin configuration is attempted for
! 	Darwin >= 18.
  
! 	Backport from mainline
! 	2019-07-23  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	PR bootstrap/87030
! 	* config.gcc (*-*-darwin*): Don't include CPU t-darwin here.
! 	(i[34567]86-*-darwin*): Adjust to use biarch files. Produce
! 	an error message if i686-darwin configuration is attempted for
! 	Darwin >= 18.
! 	(x86_64-*-darwin*): Switch to single multilib for Darwin >= 18.
! 	(powerpc-*-darwin*): Use biarch files where needed.
! 	(powerpc64-*-darwin*): Likewise.
! 	* config/i386/darwin.h (REAL_LIBGCC_SPEC): Move to new biarch file.
! 	(DARWIN_ARCH_SPEC, DARWIN_SUBARCH_SPEC): Revise for default single
! 	arch case.
! 	* config/i386/darwin32-biarch.h: New.
! 	* config/i386/darwin64.h: Rename.
! 	* gcc/config/i386/darwin64-biarch.h: To this.
! 	* config/i386/t-darwin: Rename.
! 	* gcc/config/i386/t-darwin32-biarch: To this.
! 	* config/i386/t-darwin64: Rename.
! 	* gcc/config/i386/t-darwin64-biarch: To this.
! 	* config/rs6000/darwin32-biarch.h: New.
! 	* config/rs6000/darwin64.h: Rename.
! 	* config/rs6000/darwin64-biarch.h: To this.
! 	(DARWIN_ARCH_SPEC, DARWIN_SUBARCH_SPEC): Revise for default single
! 	arch case.
! 	* config/rs6000/t-darwin8: Rename.
! 	* config/rs6000/t-darwin32-biarch: To this.
! 	* config/rs6000/t-darwin64 Rename.
! 	* config/rs6000/t-darwin64-biarch: To this.
  
! 2019-08-03  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-07-07  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin.c (darwin_override_options): Make a final check on PIC
! 	options.
  
! 2019-08-03  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-07-07  Iain Sandoe  <iain@sandoe.co.uk>
! 	* config/darwin.c (darwin_override_options): Don't jam symbol stubs
! 	on for kernel code.
  
! 2019-08-03  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-06-28  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config.gcc (powerpc-*-darwin*, powerpc64-*-darwin*): Remove
! 	override on extra_headers.
  
! 2019-08-03  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-06-27  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/rs6000/rs6000.c (darwin_rs6000_override_options): Honour
! 	user-specified float mode choice for kernel mode code.
  
! 2019-08-03  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-06-27  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/rs6000/rs6000.c (darwin_rs6000_override_options): Do not
! 	use longcall for 64b code.
  
! 2019-08-03  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-06-23  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/rs6000/darwin.h: Handle GCC target pragma.
  
! 2019-08-03  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-06-23  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/rs6000/darwin.h: (__PPC__, __PPC64__): New.
  
! 2019-08-02  Martin Sebor  <msebor@redhat.com>
  
! 	Backport from mainline
! 	2019-07-09  Martin Sebor  <msebor@redhat.com>
  
! 	PR tree-optimization/90989
! 	* tree-ssa-strlen.c (handle_char_store): Constrain a single character
! 	optimization to just single character stores.
  
! 2019-08-02  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-06-19  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin-driver.c (darwin_driver_init): Fix off-by-one errors
! 	in computing the number of options to be moved.
  
! 	Backport from mainline
! 	2019-06-13  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin-driver.c (validate_macosx_version_min): New.
! 	(darwin_default_min_version): Cleanup and validate supplied version.
! 	(darwin_driver_init): Likewise and push cleaned version into opts.
  
! 2019-08-02  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-05-31  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/i386/darwin.h (ASM_OUTPUT_MAX_SKIP_ALIGN): New.
  
! 2019-08-02  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-05-18  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin-c.c (darwin_register_objc_includes): Do not
! 	prepend the sysroot when building gnu-runtime header search
! 	paths.
  
! 2019-08-02  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-05-18  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/darwin.c (darwin_file_end): Use switch_to_section ()
! 	instead of direct output of the asm.
  
! 2019-08-02  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-07-31  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91280
! 	* tree-ssa-structalias.c (get_constraint_for_component_ref):
! 	Decompose MEM_REF manually for offset handling.
  
! 	2019-07-31  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91293
! 	* tree-vect-slp.c (vect_build_slp_tree_2): Do not swap operands
! 	of reduction stmts.
  
! 2019-08-02  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-07-31  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91178
! 	* tree-ssa-sccvn.c (vn_reference_maybe_forwprop_address):
! 	Use tail-recursion.
  
! 	2019-07-17  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91178
! 	* tree-ssa.c (release_defs_bitset): Iterate from higher to
! 	lower SSA names to avoid quadratic behavior in the common case.
! 	* tree-data-ref.c (split_constant_offset): Add limit argument
! 	and pass it down.  Initialize it from PARAM_SSA_NAME_DEF_CHAIN_LIMIT.
! 	(split_constant_offset_1): Add limit argument and use it to
! 	limit SSA def walking.  Optimize the common plus/minus case.
  
! 	2019-07-12  Martin Sebor  <msebor@redhat.com>
  
! 	* doc/invoke.texi (ssa-name-def-chain-limit): Document new --param.
! 	* params.def (PARAM_SSA_NAME_DEF_CHAIN_LIMIT): Add new --param.
! 	* tree-vrp.c (vrp_prop::check_mem_ref): Use
! 	PARAM_SSA_NAME_DEF_CHAIN_LIMIT.
  
! 2019-08-01  Jakub Jelinek  <jakub@redhat.com>
  
! 	Backported from mainline
! 	2019-07-31  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/91301
! 	* gimplify.c (gimplify_omp_for): If for class iterator on
! 	distribute parallel for there is no data sharing clause
! 	on inner_for_stmt, look for private clause on combined
! 	parallel too and if found, move it to inner_for_stmt.
  
! 	2019-07-30  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/91216
! 	* omp-low.c (global_nonaddressable_vars): New variable.
! 	(use_pointer_for_field): For global decls, if they are non-addressable,
! 	remember it in the global_nonaddressable_vars bitmap, if they are
! 	addressable and in the global_nonaddressable_vars bitmap, ignore their
! 	TREE_ADDRESSABLE bit.
! 	(omp_copy_decl_2): Clear TREE_ADDRESSABLE also on private copies of
! 	vars in global_nonaddressable_vars bitmap.
! 	(execute_lower_omp): Free global_nonaddressable_vars bitmap.
  
! 	PR target/91150
! 	* config/i386/i386.c (expand_vec_perm_blend): Change mask type
! 	from unsigned to unsigned HOST_WIDE_INT.  For E_V64QImode cast
! 	comparison to unsigned HOST_WIDE_INT before shifting it left.
  
! 	2019-07-17  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/91157
! 	* tree-vect-generic.c (expand_vector_comparison): Handle lhs being
! 	a vector boolean with scalar mode.
! 	(expand_vector_condition): Handle first operand being a vector boolean
! 	with scalar mode.
! 	(expand_vector_operations_1): For comparisons, don't bail out early
! 	if the return type is vector boolean with scalar mode, but comparison
! 	operand type is not.
  
! 2019-08-01  Alan Modra  <amodra@gmail.com>
  
! 	PR target/91135
! 	* config/rs6000/linux.h (GNU_USER_TARGET_D_OS_VERSIONS): Don't
! 	define.
! 	* config/rs6000/linux64.h (TARGET_OS_CPP_BUILTINS): Invoke
! 	GNU_USER_TARGET_OS_CPP_BUILTINS for aixdesc abi.
! 	(GNU_USER_TARGET_D_OS_VERSIONS): Don't define.
  
! 2019-07-31  Jonathan Wakely  <jwakely@redhat.com>
  
! 	Backport from mainline
! 	2019-06-24  Jonathan Wakely  <jwakely@redhat.com>
  
! 	* ginclude/float.h (FLT_DECIMAL_DIG, DBL_DECIMAL_DIG, LDBL_DECIMAL_DIG)
! 	(FLT_HAS_SUBNORM, DBL_HAS_SUBNORM, LDBL_HAS_SUBNORM, FLT_TRUE_MIN)
! 	(DBL_TRUE_MIN, LDBL_TRUE_MIN): Also define for C++17.
  
! 2019-07-31  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-07-19  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91200
! 	* tree-ssa-phiopt.c (cond_store_replacement): Check we have
! 	no PHI nodes in middle-bb.
  
! 	2019-07-15  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/91162
! 	* tree-cfg.c (move_block_to_fn): When releasing a virtual PHI
! 	node make sure to replace all uses with something valid.
  
! 	2019-07-12  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91145
! 	* tree-vect-slp.c (vect_build_slp_tree_2): Fix reduction
! 	chain check.
  
! 	2019-07-11  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/91131
! 	* gimplify.c (gimplify_compound_literal_expr): Force a temporary
! 	when the object is volatile and we have not cleared it even though
! 	there are no nonzero elements.
  
! 	2019-07-10  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91126
! 	* tree-ssa-sccvn.c (n_walk_cb_data::push_partial_def): Adjust
! 	native encoding offset for BYTES_BIG_ENDIAN.
! 	(vn_reference_lookup_3): Likewise.
  
! 2019-07-30  Jan Hubicka  <jh@suse.cz>
  
! 	Backport from mainline
! 	2019-07-23  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* i386-common.c: Use PROCESSOR_ZNVER2 scheduler for znver2.
! 	* config/i386/znver1.md: Enable patterns for znver2 and add store
! 	variants which use extra AGU unit.
  
! 2019-07-30  Jan Hubicka  <jh@suse.cz>
  
! 	Backport from mainline
! 	2019-07-23  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* config/i386/i386.c (ix86_option_override_internal): Default
! 	PARAM_AVOID_FMA_MAX_BITS to 256 for znver2.
! 	* config/i386/x86-tune.def (X86_TUNE_AVOID_256FMA_CHAINS): Set
! 	for ZNVER2.
  
! 2019-07-30  Jan Hubicka  <jh@suse.cz>
  
! 	Backport from mainline
! 	2019-07-23  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* config/i386/x86-tune-costs.h (znver2_memcpy): Update.
! 	(znver2_costs): Update 256 bit SSE costs and multiplication.
  
! 2019-07-24  Bin Cheng  <bin.cheng@linux.alibaba.com>
  
! 	Backport from mainline
! 	2019-07-18  Bin Cheng  <bin.cheng@linux.alibaba.com>
  
! 	PR tree-optimization/91137
! 	* tree-ssa-loop-ivopts.c (struct ivopts_data): New field.
! 	(tree_ssa_iv_optimize_init, alloc_iv, tree_ssa_iv_optimize_finalize):
! 	Init, use and fini the above new field.
! 	(determine_base_object_1): New function.
! 	(determine_base_object): Reimplement using walk_tree.
  
! 2019-07-23  Matthew Beliveau  <mbelivea@redhat.com>
! 	
! 	Backported from mainline
! 	2019-07-16  Jeff Law  <law@redhat.com>
  	
! 	PR rtl-optimization/91173
! 	* tree-ssa-address.c (addr_for_mem_ref): If the base is an
! 	SSA_NAME with a constant value, fold its value into the offset
! 	and clear the base before calling gen_addr_rtx.
! 	* g++.dg/pr91173.C: New test.
! 
! 2019-07-23  Richard Biener  <rguenther@suse.de>
! 
! 	PR debug/91231
! 	* lto-streamer-in.c (input_function): Drop inline-entry markers
! 	that ended up with an unknown location block.
! 
! 2019-07-22  Paul A. Clarke  <pc@us.ibm.com>
! 
! 	Backport from mainline
! 	* config/rs6000/smmintrin.h (_mm_blend_epi16): New.
! 	(_mm_blendv_epi8): New.
! 
! 2019-07-22  Martin Liska  <mliska@suse.cz>
! 
! 	Backport from mainline
! 	2019-07-22  Martin Liska  <mliska@suse.cz>
! 
! 	PR driver/91172
! 	* opts-common.c (decode_cmdline_option): Decode
! 	argument of -Werror and check it for a wrong language.
! 	* opts-global.c (complain_wrong_lang): Remove such case.
! 
! 2019-07-22  Claudiu Zissulescu  <claziss@synopsys.com>
! 
! 	Backport from mainline.
! 	* config/arc/arc.c (prepare_move_operands): Always use an
! 	intermediate register when storing a TLS symbols.
! 
! 2019-07-20  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	Backport from mainline
! 	2019-07-10  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* fold-const.c (fold_relational_const): Fix folding of
! 	vector-to-scalar NE_EXPRs.
! 	(test_vector_folding): Add more tests.
! 
! 2019-07-19  Jason Merrill  <jason@redhat.com>
! 
! 	PR c++/82081 - tail call optimization breaks noexcept
! 	* tree-tailcall.c (find_tail_calls): Don't turn a call from a
! 	nothrow function to a might-throw function into a tail call.
! 
! 2019-07-18  Kito Cheng  <kito.cheng@sifive.com>
! 
! 	Backport from mainline
! 	2019-07-08  Andrew Waterman  <andrew@sifive.com>
! 		    Jim Wilson  <jimw@sifive.com>
! 
! 	* config/riscv/riscv.md (lshrsi3_zero_extend_3+1): Use operands[1]
! 	bitsize	instead of BITS_PER_WORD.
! 	gcc/testsuite/
! 
! 2019-07-17  John David Anglin  <danglin@gcc.gnu.org>
! 
! 	* config/pa/pa.c (pa_som_asm_init_sections): Don't force all constant
! 	data into data section when generating PIC code.
! 	(pa_select_section): Use pa_reloc_rw_mask() to qualify relocs.
! 	(pa_reloc_rw_mask): Return 3 when generating PIC code and when
! 	generating code for SOM targets earlier than HP-UX 11.  Otherwise,
! 	return 2 for SOM and 0 for other targets.
! 	 
! 2019-07-17  Andreas Krebbel  <krebbel@linux.ibm.com>
! 
! 	Backport from mainline
! 	2019-07-01  Andreas Krebbel  <krebbel@linux.ibm.com>
! 
! 	* config/s390/vector.md: Fix shift count operand printing.
! 
! 2019-07-16  Wilco Dijkstra  <wdijkstr@arm.com>
! 
! 	Backport from mainline
! 	2019-05-30  Wilco Dijkstra  <wdijkstr@arm.com>
! 
! 	PR driver/90684
! 	* gcc/opts.c (parse_and_check_align_values): Allow 4 alignment values.
! 
! 2019-07-14  Jakub Jelinek  <jakub@redhat.com>
! 
! 	Backported from mainline
! 	2019-07-04  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR middle-end/78884
! 	* gimplify.c (struct gimplify_omp_ctx): Add add_safelen1 member.
! 	(gimplify_bind_expr): If seeing TREE_ADDRESSABLE VLA inside of simd
! 	loop body, set ctx->add_safelen1 instead of making it GOVD_PRIVATE.
! 	(gimplify_adjust_omp_clauses): Add safelen (1) clause if
! 	ctx->add_safelen1 is set.
! 
! 	PR rtl-optimization/90756
! 	* explow.c (promote_ssa_mode): Always use TYPE_MODE, don't bypass it
! 	for VECTOR_TYPE_P.
! 
! 2019-07-12  Richard Biener  <rguenther@suse.de>
! 
! 	Backport from mainline
! 	2019-07-04  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR tree-optimization/91063
! 	* tree-vect-stmts.c (vect_init_vector): Call gsi_remove to remove
! 	stmt from stmts sequence before calling vect_init_vector_1.
! 	Formatting fix.
! 
! 	2019-07-04  Richard Biener  <rguenther@suse.de>
! 
! 	PR ipa/91062
! 	* tree-pass.h (execute_all_ipa_transforms): Add a flag
! 	parameter whether to disable GC collection.
! 	* passes.c (execute_one_ipa_transform_pass): Likewise, and
! 	honor it.
! 	(execute_all_ipa_transforms): Likewise and pass it down.
! 	* cgraph.c (cgraph_node::get_body): Do not invoke garbage
! 	collection from applying IPA transforms.
! 	* cgraphunit.c (cgraph_node::expand): Allow garbage collection
! 	from applying IPA transforms.
! 
! 	2019-06-26  Richard Biener  <rguenther@suse.de>
! 
! 	PR ipa/90982
! 	* tree-inline.c (remap_ssa_name): Copy SSA range info.
! 
! 	2019-06-24  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/90972
! 	* tree-vect-stmts.c (vect_init_vector): Handle CONSTANT_CLASS_P
! 	in common code, dealing with STRING_CST properly.
! 
! 	2019-06-21  Richard Biener  <rguenther@suse.de>
! 
! 	PR debug/90914
! 	* dwarf2out.c (prune_unused_types_walk): Always consider
! 	function-local extern declarations as used.
! 
! 	2019-06-18  Richard Biener  <rguenther@suse.de>
! 
! 	PR debug/90900
! 	* cfgexpand.c (expand_debug_expr): Treat NOTE_P DECL_RTL
! 	as if optimized away.
! 
! 	2019-05-07  Richard Biener  <rguenther@suse.de>
! 
! 	PR lto/90369
! 	* lto-wrapper.c (debug_objcopy): Use the original filename
! 	including archive offset for the filename used for -save-temps.
! 
! 2019-07-12  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	PR rtl-optimization/91136
! 	* df-core.c (ACCESSING REFS): Fix typos in comment.
! 	* resource.c (mark_target_live_reg): Add artificial defs that occur at
! 	the beginning of the block to the initial set of live registers.
! 
! 2019-07-11  Uroš Bizjak  <ubizjak@gmail.com>
! 
! 	Backport from mainline
! 	2019-07-06  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* config/i386/sse.md (*andnot<mode>3_bcst): Fix VI/VI48_AVX512VL typo.
! 
! 2019-07-11  Segher Boessenkool  <segher@kernel.crashing.org>
! 
! 	* config/rs6000/rs6000.c (rs6000_output_function_epilogue): Handle
! 	Modula-2.
! 
! 2019-07-08  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/91108
! 	* tree-ssa-sccvn.c: Include builtins.h.
! 	(vn_reference_lookup_3): Use only alignment constraints to
! 	verify same-valued store disambiguation.
  
! 2019-07-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  
! 	Backport from mainline
! 	2019-06-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  
! 	* config/aarch64/aarch64-protos.h (aarch64_asm_output_alias): Declare.
! 	(aarch64_asm_output_external): Declare.
! 	* config/aarch64/aarch64.c (aarch64_asm_output_variant_pcs): New.
! 	(aarch64_declare_function_name): Call aarch64_asm_output_variant_pcs.
! 	(aarch64_asm_output_alias): New.
! 	(aarch64_asm_output_external): New.
! 	* config/aarch64/aarch64.h (ASM_OUTPUT_DEF_FROM_DECLS): Define.
! 	(ASM_OUTPUT_EXTERNAL): Define.
  
! 	2019-06-04  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  
! 	* config/aarch64/aarch64-protos.h (aarch64_asm_output_external): Remove
! 	const.
! 	* config/aarch64/aarch64.c (aarch64_asm_output_external): Call
! 	default_elf_asm_output_external.
  
! 2019-07-04  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-07-03  Martin Liska  <mliska@suse.cz>
  
! 	PR tree-optimization/90892
! 	* builtins.c (inline_expand_builtin_string_cmp): Handle '\0'
! 	in string constants.
  
! 2019-07-04  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-07-03  Martin Liska  <mliska@suse.cz>
  
! 	PR middle-end/90899
! 	* multiple_target.c (create_dispatcher_calls): Add to comdat
! 	group only if set for ifunc.
  
! 2019-07-03  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* dwarf2out.c (add_scalar_info): Add back refererence to existing DIE
! 	if it has the DW_AT_data_member_location attribute.
  
! 2019-07-02  Andrew Stubbs  <ams@codesourcery.com>
  
! 	Backport from mainline:
! 	2019-07-02  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn.md (movdi_symbol_save_scc): Convert to define_insn
! 	with inlined save and restore.
  
! 2019-07-01  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR middle-end/64242
! 	* config/sparc/sparc.md (nonlocal_goto): Restore frame pointer last.
! 	Add frame clobber and schedule blockage.
  
! 2019-06-29  Jakub Jelinek  <jakub@redhat.com>
  
! 	Backported from mainline
! 	2019-06-27  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c++/91024
! 	* gimplify.c (collect_fallthrough_labels): Ignore GIMPLE_PREDICT
! 	statements.
  
! 	2019-06-26  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/90991
! 	* config/i386/sse.md
! 	(*<extract_type>_vinsert<shuffletype><extract_suf>_0): Use vmovupd,
! 	vmovups, vmovdqu, vmovdqu32 or vmovdqu64 instead of the aligned
! 	insns if operands[2] is misaligned_operand.
  
! 	2019-06-12  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c/90760
! 	* symtab.c (symtab_node::set_section): Allow being called on aliases
! 	as long as they aren't analyzed yet.
  
! 2019-06-28  Jeff Law  <law@redhat.com>
  
! 	Backport from mainline
! 	2019-06-21  Jeff Law  <law@redhat.com>
  
! 	PR tree-optimization/90949
! 	* tree-ssa-copy.c (fini_copy_prop): Use reset_flow_sensitive_info.
! 	* tree-ssanames.c (reset_flow_sensitive_info): Reset non-null state.
  
! 2019-06-28  Andrew Stubbs  <ams@codesourcery.com>
  
! 	Backport from mainline:
! 	2019-05-22  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn.c (gcn_trampoline_init): Call "sorry" on GCN5.
  
! 2019-06-26  Martin Jambor  <mjambor@suse.cz>
  
! 	Backport from mainline
! 	2019-06-25  Martin Jambor  <mjambor@suse.cz>
  
! 	PR ipa/90939
! 	* ipa-cp.c (ipcp_bits_lattice::meet_with): Remove assert.
  
! 2019-06-26  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
  
! 	Backport from mainline
! 	2019-06-17  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
  
! 	* configure.ac (ld_vers) <*-*-solaris2*>: Remove support for
! 	alternative Solaris 11.4 format.
! 	* configure: Regenerate.
  
! 2019-06-25  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	Backport from mainline
! 	2019-06-25  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.c (arc_symbol_binds_local_p): New function.
! 	(arc_legitimize_pic_address): Simplify and cleanup the function.
! 	(SYMBOLIC_CONST): Remove.
! 	(prepare_pic_move): Likewise.
! 	(prepare_move_operands): Handle complex mov cases here.
! 	(arc_legitimize_address_0): Remove call to
! 	arc_legitimize_pic_address.
! 	(arc_legitimize_address): Remove call to
! 	arc_legitimize_tls_address.
! 	* config/arc/arc.md (movqi_insn): Allow Cm3 match.
! 	(movhi_insn): Likewise.
  
! 2019-06-25  Andrew Stubbs  <ams@codesourcery.com>
  
! 	Backport from mainline
! 	2019-05-24  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-run.c (main): Set a non-zero return value if the
! 	kernel does not exit cleanly.
! 	* config/gcn/gcn.md (gcn_return): Insert s_waitcnt before s_dcache_wb.
  
! 2019-06-25  Andrew Stubbs  <ams@codesourcery.com>
  
! 	Backport from mainline
! 	2019-05-24  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn.c (gcn_expand_prologue): Use gen_addsi3_scalar_carry
! 	for lo-part.
  
! 2019-06-21  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90930
! 	* tree-ssa-reassoc.c (rewrite_expr_tree_parallel): Set visited
! 	flag on new stmts to avoid re-processing them.
  
! 2019-06-24  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90930
! 	PR tree-optimization/90316
! 	* tree-ssa-alias.c (walk_non_aliased_vuses): Add missing
! 	decrement of limit.
  
! 2019-06-16  Jeff Law  <law@redhat.com>
  
! 	Backport from mainline
! 	2019-06-16  Prachi Godbole  <prachi.godbole@imgtec.com>
! 		    Robert Suchanek  <robert.suchanek@mips.com>
! 	* config/mips/mips.c (mips_expand_builtin_insn): Swap the 1st
! 	and 3rd operands of the fmadd/fmsub/maddv builtin.
  
! 2019-06-16  John David Anglin  <danglin@gcc.gnu.org>
  
! 	PR middle-end/64242
! 	* config/pa/pa.md (nonlocal_goto): Restore frame pointer last.  Add
! 	frame clobbers and schedule block.
! 	(builtin_longjmp): Likewise.
  
! 2019-06-11  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/90811
! 	* config/nvptx/nvptx.c (nvptx_output_softstack_switch): Use and.b%d
! 	instead of and.u%d.
  
! 2019-06-07  John David Anglin  <danglin@gcc.gnu.orig>
  
! 	PR target/90751
! 	* config/pa/pa-linux.h (ASM_DECLARE_FUNCTION_NAME): Update comment.
! 	Call pa_output_function_label.
! 	(TARGET_ASM_FUNCTION_PROLOGUE): define.
! 	* config/pa/pa-protos.h (pa_output_function_label): Declare.
! 	* config/pa/pa.c (pa_output_function_prologue): Add ATTRIBUTE_UNUSED
! 	to declaration.
! 	(pa_linux_output_function_prologue): Declare.
! 	(TARGET_ASM_FUNCTION_PROLOGUE): Delete define.
! 	(pa_output_function_label): New.
! 	(pa_output_function_prologue): Revise to use pa_output_function_label.
! 	(pa_linux_output_function_prologue): New.
! 	* config/pa/pa.h (TARGET_ASM_FUNCTION_PROLOGUE): Define.
  
! 2019-06-06  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-05-22  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90450
! 	* tree-ssa-loop-im.c (struct im_mem_ref): Add ref_decomposed.
! 	(mem_ref_hasher::equal): Check it.
! 	(mem_ref_alloc): Initialize it.
! 	(gather_mem_refs_stmt): Set it.
  
! 	2019-05-13  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90402
! 	* tree-if-conv.c (tree_if_conversion): Value number only
! 	the loop body by making the latch an exit of the region
  	as well.
! 	* tree-ssa-sccvn.c (process_bb): Add flag whether to skip
! 	processing PHIs.
! 	(do_rpo_vn): Deal with multiple edges into the entry block
! 	that are not backedges inside the region by skipping PHIs
! 	of the entry block.
! 
! 	2019-05-06  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/90328
! 	* tree-data-ref.h (dr_may_alias_p): Pass in the actual loop nest.
! 	* tree-data-ref.c (dr_may_alias_p): Check whether the clique
! 	is valid in the loop nest before using it.
! 	(initialize_data_dependence_relation): Adjust.
! 	* graphite-scop-detection.c (build_alias_set): Pass the SCOP enclosing
! 	loop as loop-nest to dr_may_alias_p.
! 
! 2019-06-05  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* fold-const.c (extract_muldiv_1) <PLUS_EXPR>: Do not distribute a
! 	multiplication by a power-of-two value.
! 	(fold_plusminus_mult_expr): Use pow2p_hwi to spot a power-of-two value
! 	and turn the modulo operation into a masking operation.
! 
! 2019-06-05  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR debug/90733
! 	* var-tracking.c (vt_expand_loc_callback): Don't create raw subregs
! 	with VOIDmode inner operands.
! 
! 2019-06-05  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline.
! 	2019-05-23  Iain Sandoe  <iain@sandoe.co.uk>
! 	* doc/sourcebuild.texi: Document mfentry target support.
! 
! 2019-05-30  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* tree-predcom.c (is_inv_store_elimination_chain): Fix a typo - lenght
! 	to length.
! 
! 2019-05-30  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline.
! 	2019-05-23  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	* config/i386/darwin.h: Reject -mfentry*.
! 
! 2019-05-30  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline.
! 	2019-05-12  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	PR target/82920
! 	* config/i386/darwin.h (CC1_SPEC): Report -mx32 as an error for
! 	Darwin.
! 
! 2019-05-30  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline.
! 	2019-05-12  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	PR target/82920
! 	* config/i386/i386.c (ix86_output_jmp_thunk_or_indirect): New.
! 	(ix86_output_indirect_branch_via_reg): Use output mechanism
! 	accounting for __USER_LABEL_PREFIX__.
! 	(ix86_output_indirect_branch_via_push): Likewise.
! 	(ix86_output_function_return): Likewise.
! 	(ix86_output_indirect_function_return): Likewise.
! 
! 2019-05-29  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR fortran/90329
! 	* lto-streamer.h (LTO_minor_version): Bump to 1.
! 
! 	Backported from mainline
! 	2019-05-16  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR fortran/90329
! 	* tree-core.h (struct tree_decl_common): Document
! 	decl_nonshareable_flag for PARM_DECLs.
! 	* tree.h (DECL_HIDDEN_STRING_LENGTH): Define.
! 	* calls.c (expand_call): Don't try tail call if caller
! 	has any DECL_HIDDEN_STRING_LENGTH PARM_DECLs that are or might be
! 	passed on the stack and callee needs to pass any arguments on the
! 	stack.
! 	* tree-streamer-in.c (unpack_ts_decl_common_value_fields): Use
! 	else if instead of series of mutually exclusive ifs.  Handle
! 	DECL_HIDDEN_STRING_LENGTH for PARM_DECLs.
! 	* tree-streamer-out.c (pack_ts_decl_common_value_fields): Likewise.
! 
! 2019-05-29  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR bootstrap/90543
! 	* optc-save-gen.awk: In cl_optimization_print, use correct condition
! 	for var_opt_string printing.  In cl_optimization_print_diff, print
! 	(null) instead of invoking undefined behavior if one of the
! 	var_opt_string pointers is NULL and use && instead of first || in the
! 	guarding condition.  For var_target_other options, handle const char *
! 	target variables similarly to const char * optimize node variables.
! 
! 2019-05-28  John David Anglin  <danglin@gcc.gnu.org>
! 
! 	* config/pa/pa.c (hppa_profile_hook): Remove offset adjustment.
! 
! 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* dwarf2out.c (resolve_args_picking_1): Deal with DW_OP_GNU_addr_index
! 	and DW_OP_GNU_const_index opcodes.
! 
! 2019-05-24  John David Anglin  <danglin@gcc.gnu.org>
! 
! 	PR target/90530
! 	* config/pa/pa.c (pa_can_change_mode_class): Accept mode changes from
! 	DImode to SImode in floating-point registers on 64-bit target.
! 	* config/pa/pa.md (umulsidi3): Change nonimmediate_operand to
! 	register_operand in xmpyu patterns.
! 
! 2019-05-24  Martin Liska  <mliska@suse.cz>
! 
! 	Backport from mainline
! 	2019-05-23  Martin Liska  <mliska@suse.cz>
! 
! 	PR sanitizer/90570
! 	* gimplify.c (gimplify_target_expr): Skip TREE_STATIC target
! 	expression similarly to gimplify_decl_expr.
! 
! 2019-05-22  Uroš Bizjak  <ubizjak@gmail.com>
! 
! 	Backported from mainline
! 	2019-05-21  Uroš Bizjak  <ubizjak@gmail.com>
  
- 	* config/i386/cpuid.h (__cpuid): For 32bit targets, zero
- 	%ebx and %ecx bafore calling cpuid with leaf 1 or
- 	non-constant leaf argument.
  
! 	2019-05-21  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/90547
! 	* config/i386/i386.md (anddi_1 to andsi_1_zext splitter):
! 	Avoid calling gen_lowpart with CONST operand.
  
- 2019-05-21  Sebastian Huber  <sebastian.huber@embedded-brains.de>
  
! 	Backported from mainline
! 	2019-05-16  Sebastian Huber  <sebastian.huber@embedded-brains.de>
  
! 	* config/arm/t-rtems: Replace ARMv7-M multilibs with Cortex-M
! 	multilibs.
  
! 2019-05-20  Jeff Law  <law@redhat.com>
  
! 	Backported from mainline
! 	2019-05-17  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
  
! 	* config/mips/mips.c (mips_dwarf_frame_reg_mode): Replace
! 	TARGET_FLOAT64 with !TARGET_FLOAT32, thus handling both fp64
! 	and fpxx modes.
  
! 2019-05-17  Jakub Jelinek  <jakub@redhat.com>
  
! 	Backported from mainline
! 	2019-05-16  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c++/90484
! 	* tree-ssa-scopedtables.c (equal_mem_array_ref_p): Don't assert that
! 	sz0 is equal to sz1, instead return false in that case.
  
! 	* omp-low.c (lower_rec_input_clauses): If OMP_CLAUSE_IF
! 	has non-constant expression, force sctx.lane and use two
! 	argument IFN_GOMP_SIMD_LANE instead of single argument.
! 	* tree-ssa-dce.c (eliminate_unnecessary_stmts): Don't DCE
! 	two argument IFN_GOMP_SIMD_LANE without lhs.
! 	* tree-vectorizer.h (struct _loop_vec_info): Add simd_if_cond
! 	member.
! 	(LOOP_VINFO_SIMD_IF_COND, LOOP_REQUIRES_VERSIONING_FOR_SIMD_IF_COND):
! 	Define.
! 	(LOOP_REQUIRES_VERSIONING): Or in
! 	LOOP_REQUIRES_VERSIONING_FOR_SIMD_IF_COND.
! 	* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
! 	simd_if_cond.
! 	(vect_analyze_loop_2): Punt if LOOP_VINFO_SIMD_IF_COND is constant 0.
! 	* tree-vect-loop-manip.c (vect_loop_versioning): Add runtime check
! 	from simd if clause if needed.
  
! 	2019-05-15  Jakub Jelinek  <jakub@redhat.com>
  
! 	* omp-low.c (lower_rec_input_clauses): For if (0) or simdlen (1) set
! 	max_vf to 1.
! 	* omp-expand.c (expand_omp_simd): For if (0) or simdlen (1) clear
! 	safelen_int and set loop->dont_vectorize.
  
! 	2019-05-10  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/90385
! 	* tree-parloops.c (try_create_reduction_list): Punt on non-SSA_NAME
! 	arguments of the exit phis.
  
! 	PR c++/90383
! 	* tree-inline.h (struct copy_body_data): Add do_not_fold member.
! 	* tree-inline.c (remap_gimple_op_r): Avoid folding expressions if
! 	id->do_not_fold.
! 	(copy_tree_body_r): Likewise.
! 	(copy_fn): Set id.do_not_fold to true.
  
! 	2019-05-03  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/90303
! 	* ipa-devirt.c (obj_type_ref_class, get_odr_type): Don't use
! 	TYPE_CANONICAL for TYPE_STRUCTURAL_EQUALITY_P types in !in_lto_p mode.
  
! 2019-05-17  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-05-07  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90316
! 	* tree-ssa-alias.h (get_continuation_for_phi): Take walking
! 	limit by reference.
! 	(walk_non_aliased_vuses): Take walking limit argument.
! 	* tree-ssa-alias.c (maybe_skip_until): Take limit and abort
! 	walking if it is reached instead of just counting.
! 	(get_continuation_for_phi): Likewise.
! 	(walk_non_aliased_vuses): Likewise, instead of leaving counter
! 	limiting to the callback.
! 	* tree-ssa-sccvn.c (vn_reference_lookup_2): Adjust.
! 	(vn_reference_lookup_3): Likewise.
! 	(vn_reference_lookup_pieces): Likewise.
! 	(vn_reference_lookup): Likewise.
! 	* tree-ssa-pre.c (translate_vuse_through_block): Limit walking.
! 	* tree-ssa-scopedtables.c (vuse_eq): Adjust.
! 	(avail_exprs_stack::lookup_avail_expr): Likewise.
  
! 	2019-05-06  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90316
! 	* tree-ssa-alias.c (maybe_skip_until): Pass in target BB,
! 	compute target on demand.
! 	(get_continuation_for_phi): Remove code walking stmts to
! 	get to a target virtual operand which could end up being
! 	quadratic.
  
! 2019-05-15  Li Jia He  <helijia@linux.ibm.com>
  
! 	Backport from mainline.
! 	2019-05-07  Li Jia He  <helijia@linux.ibm.com>
  
! 	* tree-ssa-phiopt.c (two_value_replacement): Fix a typo in parameter
! 	detection.
  
! 2019-05-14  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-05-13  Martin Liska  <mliska@suse.cz>
  
! 	PR tree-optimization/90416
! 	* tree-vect-stmts.c (vect_check_load_store_mask): Concatenate
! 	string instead of passing the second part as va_arg argument.
  
! 2019-05-14  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-05-13  Martin Liska  <mliska@suse.cz>
  
! 	PR gcov-profile/90380
! 	* gcov.c (handle_cycle): Do not support zero cycle count,
! 	it should not be possible.
! 	(path_contains_zero_cycle_arc): New function.
! 	(circuit): Ignore zero cycle arc counts.
  
! 2019-05-14  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-05-13  Martin Liska  <mliska@suse.cz>
  
! 	PR gcov-profile/90380
! 	* gcov.c (enum loop_type): Remove the enum and
! 	the operator.
! 	(handle_cycle): Assert that we should not reach
! 	a negative count.
! 	(circuit): Use loop_found instead of a tri-state loop_type.
! 	(get_cycles_count): Do not handle NEGATIVE_LOOP as it can't
! 	happen.
  
! 2019-05-14  Chenghua Xu  <paul.hua.gm@gmail.com>
  
! 	Backport from mainline.
! 	2019-05-14  Chenghua Xu  <paul.hua.gm@gmail.com>
  
! 	PR target/90357
! 	* config/mips/mips.c (mips_split_move): Skip forward SRC into
! 	next insn when the SRC reg is dead.
  
! 2019-05-11  Andreas Tobler <andreast@gcc.gnu.org>
  
! 	Backport from mainline.
! 	2019-04-25  Andreas Tobler  <andreast@gcc.gnu.org>
  
! 	* config/i386/freebsd64.h: Add bits for 32-bit multilib support.
! 	* config/i386/t-freebsd64: New file.
! 	* config.gcc: Add the t-freebsd64 for multilib support.
  
! 2019-05-10  Kelvin Nilsen  <kelvin@gcc.gnu.org>
  
! 	Backport from mainline.
! 	2019-05-07  Kelvin Nilsen  <kelvin@gcc.gnu.org>
  
! 	PR target/89765
! 	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
! 	In handling of ALTIVEC_BUILTIN_VEC_INSERT, use modular arithmetic
! 	to compute vector element selector for both constant and variable
! 	operands.
  
! 2019-05-10  Richard Biener  <rguenther@suse.de>
  
! 	* tree-ssa-sccvn.c (visit_reference_op_call): Initialize value-id.
! 	(do_rpo_vn): Initialize next_value_id.
  
! 2019-05-09  Thomas Schwinge  <thomas@codesourcery.com>
  
! 	* cif-code.def (CHKP): Remove.
  
! 2019-05-07  Kelvin Nilsen  <kelvin@gcc.gnu.org>
  
! 	Backport from mainline.
! 	2019-05-06  Kelvin Nilsen  <kelvin@gcc.gnu.org>
  
! 	PR target/89424
! 	* config/rs6000/rs6000.c (rs6000_expand_vector_extract): Add
! 	handling of V1TImode.
  
! 2019-05-06  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-05-06  Martin Liska  <mliska@suse.cz>
  
! 	PR sanitizer/90312
! 	* config/i386/i386-options.c (ix86_option_override_internal): Error only
! 	when -mabi is selected to a non-default version.
  
! 2019-05-04  Michael Meissner  <meissner@linux.ibm.com>
  
! 	* ChangeLog.ibm: Delete unintentional commit on the wrong branch.
! 	* REVISION: Likewise.
  
! 2019-05-03  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90316
! 	* tree-ssa-pre.c (pass_pre::execute): Re-compute DOM fast queries
! 	before running VN.
  
! 2019-05-03  Jakub Jelinek  <jakub@redhat.com>
  
! 	* BASE-VER: Set to 9.1.1.
  
! 2019-05-03  Release Manager
  
! 	* GCC 9.1.0 released.
  
! 2019-04-30  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
  
! 	Backport from mainline.
! 	2019-04-30  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
! 	PR target/86538
! 	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
! 	Define __ARM_FEATURE_ATOMICS.
  
! 2019-04-30  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-04-30  Martin Liska  <mliska@suse.cz>
  
! 	PR translation/90274
! 	* opts.c (print_filtered_help): Wrap string in _(...).
  
! 2019-04-30  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-04-27  Martin Liska  <mliska@suse.cz>
  
! 	PR middle-end/90258
! 	* opt-suggestions.c (option_proposer::build_option_suggestions):
! 	When get_valid_option_values returns empty values, add the
! 	misspelling candidate.
  
! 2019-04-30  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90273
! 	* tree-ssa-dce.c (eliminate_unnecessary_stmts): Eliminate
! 	useless debug stmts.
  
! 2019-04-27  Iain Buclaw  <ibuclaw@gdcproject.org>
  
! 	* config/netbsd-d.c: Include memmodel.h.  Remove unused tree.h,
! 	varasm.h, and netbsd-protos.h.
  
! 2019-04-26  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	PR other/90257
! 	Revert the revert:
! 	2019-04-21  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/90178
! 	Revert:
! 	2018-11-21  Uros Bizjak  <ubizjak@gmail.com>
  
! 	Revert the revert:
! 	2013-10-26  Vladimir Makarov  <vmakarov@redhat.com>
  
  	Revert:
- 	2013-10-25  Vladimir Makarov  <vmakarov@redhat.com>
- 
- 	* lra-spills.c (lra_final_code_change): Remove useless move insns.
  
! 2019-04-25  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/90240
! 	Revert:
! 	2019-04-23  Bin Cheng  <bin.cheng@linux.alibaba.com>
!  
! 	PR tree-optimization/90078
! 	* tree-ssa-loop-ivopts.c (comp_cost::operator +,-,+=,-+,/=,*=): Add
! 	checks for infinite_cost overflow.
  
! 2019-04-25  Jakub Jelinek  <jakub@redhat.com>
  
! 	* DEV-PHASE: Set to prerelease.
  
! 2019-04-25  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/89765
! 	* gimplify.c (gimplify_expr): Avoid turning a lvalue
! 	VIEW_CONVERT_EXPR into one operating on an rvalue.
  
! 2019-04-25  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/89929
! 	* config/i386/i386.c (feature_priority): Moved to file scope.
! 	(processor_features): Likewise.
! 	(processor_model): Likewise.
! 	(_arch_names_table): Likewise.
! 	(arch_names_table): Likewise.
! 	(_feature_list): Removed.
! 	(feature_list): Likewise.
! 	(_isa_names_table): Moved to file scope.  Add priority.
! 	(isa_names_table): Likewise.
! 	(get_builtin_code_for_version): Replace feature_list with
! 	isa_names_table.  Update error message for P_ZERO priority.
  
! 2019-04-25  Richard Biener  <rguenther@suse.de>
  
! 	* tree-pass.h (make_pass_phi_only_cprop): Remove.
! 	* timevar.def (TV_TREE_PHI_CPROP): Likewise.
  
! 2019-04-24  Jeff Law  <law@redhat.com>
  
! 	PR tree-optimization/90037
! 	* Makefile.in (OBJS): Remove tree-ssa-phionlycprop.c
! 	* passes.def: Replace all instance of phi-only cprop with the
! 	lattice propagator.  Move propagation pass from after erroneous
! 	path isolation to before erroneous path isolation.
! 	* tree-ssa-phionlycprop.c: Remove.
  
! 2019-04-24  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/90213
! 	* gimple-fold.c (fold_const_aggregate_ref_1): Do multiplication
! 	by size and BITS_PER_UNIT on poly-wide-ints.
  
! 2019-04-25  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/90194
! 	* match.pd: Add pattern to simplify view-conversion of an
! 	empty constructor.
  
! 2019-04-24  Clement Chigot  <clement.chigot@atos.net>
  
! 	* config/rs6000/aix71.h (SUBTARGET_OVERRIDE_OPTIONS): Disable
! 	OPTION_MASK_VSX and OPTION_MASK_ALTIVEC from rs6000_isa_flags
! 	for Go on 32 bit AIX.
! 	* config/rs6000/aix72.h: Likewise.
  
! 2019-04-24  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/90193
! 	* rtl.c (classify_insn): Return JUMP_INSN for asm goto.
! 	* emit-rtl.c (try_split): Copy over REG_LABEL_TARGET.
  
! 2019-04-24  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	PR target/89952
! 	* config/s390/s390.c (s390_restore_gprs_from_fprs): Restore GPRs
!     	from FPRs in reverse order.  Generate REG_CFA_DEF_CFA note also
!     	for restored hard frame pointer.
! 	(s390_sched_dependencies_evaluation): Implement new target hook.
! 	(TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK): New macro definition.
  
! 2019-04-24  Claudiu Zissulescu  <claziss@sysnopsys.com>
  
! 	* config/arc/arc-options.def: Fix typos and spelling mistakes.
! 	* config/arc/arc.c (arc_init): Cleanup warning message.
! 	(arc_override_options): Likewise.
  
! 2019-04-24  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/90187
! 	* config/i386/i386.c (ix86_expand_sse_fp_minmax): Force if_true into
! 	a register if both if_true and if_false are MEMs.
  
! 	PR tree-optimization/90208
! 	* tree-cfg.c (remove_bb): Move forced labels from removed bbs
! 	after labels of new_bb, not before them.
  
! 	PR tree-optimization/90211
! 	* tree-parloops.c (try_create_reduction_list): Ignore phi arguments
! 	which are not SSA_NAMEs.
  
! 2018-04-23  Sudakshina Das  <sudi.das@arm.com>
  
! 	* config/aarch64/aarch64-linux.h (TARGET_ASM_FILE_END): Define for
! 	AArch64.
! 	(aarch64_file_end_indicate_exec_stack): Add gnu note section.
  
! 2019-04-23  Roman Zhuykov  <zhroma@ispras.ru>
  
! 	PR rtl-optimization/87979
! 	* modulo-sched.c (sms_schedule): Start ii value "mii" should
! 	not equal zero.
  
! 2019-04-23  Roman Zhuykov  <zhroma@ispras.ru>
  
! 	PR rtl-optimization/84032
! 	* modulo-sched.c (ps_insn_find_column): Change condition so that
! 	branch will always be the last insn in a row inside partial
! 	schedule.
  
! 2019-04-23  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/90131
! 	* tree-cfgcleanup.c (move_debug_stmts_from_forwarder): Add
! 	dest_single_pred_p argument.
! 	(remove_forwarder_block): Adjust.
! 	(remove_forwarder_block_with_phi): Likewise.
  
! 2019-04-23  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
! 	    Bernd Edlinger  <bernd.edlinger@hotmail.de>
  	    Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/89093
! 	* config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Diagnose
! 	if used with general-regs-only.
! 	(arm_conditional_register_usage): Don't add non-general regs if
! 	general-regs-only.
! 	(arm_valid_target_attribute_rec): Handle general-regs-only.
! 	* config/arm/arm.h (TARGET_HARD_FLOAT): Return false if
! 	general-regs-only.
! 	(TARGET_HARD_FLOAT_SUB): Define.
! 	(TARGET_SOFT_FLOAT): Define as negation of TARGET_HARD_FLOAT_SUB.
! 	(TARGET_REALLY_IWMMXT): Add && !TARGET_GENERAL_REGS_ONLY.
! 	(TARGET_REALLY_IWMMXT2): Likewise.
! 	* config/arm/arm.opt: Add -mgeneral-regs-only.
! 	* doc/extend.texi: Document ARM general-regs-only target.
! 	* doc/invoke.texi: Document ARM -mgeneral-regs-only.
! 
! 2019-04-23  Bin Cheng  <bin.cheng@linux.alibaba.com>
! 
! 	PR tree-optimization/90078
! 	* tree-ssa-loop-ivopts.c (comp_cost::operator +,-,+=,-+,/=,*=): Add
! 	checks for infinite_cost overflow.
! 
! 2019-04-23  Bin Cheng  <bin.cheng@linux.alibaba.com>
! 
! 	PR tree-optimization/90021
! 	* tree-chrec.c (evolution_function_is_univariate_p): New parameter
! 	and check univariate against it.
! 	* tree-chrec.h (evolution_function_is_univariate_p): New parameter.
! 	* tree-data-ref.c (add_other_self_distances): Pass new argument.
! 
! 2019-04-21  H.J. Lu  <hongjiu.lu@intel.com>
! 
! 	PR target/90178
! 	Revert:
! 	2018-11-21  Uros Bizjak  <ubizjak@gmail.com>
! 
! 	Revert the revert:
! 	2013-10-26  Vladimir Makarov  <vmakarov@redhat.com>
! 
! 	Revert:
! 	2013-10-25  Vladimir Makarov  <vmakarov@redhat.com>
! 
! 	* lra-spills.c (lra_final_code_change): Remove useless move insns.
! 
! 2019-04-21  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	* config/rs6000/rs6000.md (group_end_nop): Emit insn register
! 	names using operand format, rather than hard-wired.
! 	(speculation_barrier): Likewise.
! 
! 2019-04-19  Segher Boessenkool  <segher@kernel.crashing.org>
! 
! 	PR tree-optimization/88055
! 	* tree-call-cdce.c (comparison_code_if_no_nans): New function.
! 	(gen_one_condition): Use it if !HONOR_NANS.
! 
! 2019-04-19  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR middle-end/90139
! 	* tree-outof-ssa.c (get_temp_reg): If reg_mode is BLKmode, return
! 	assign_temp instead of gen_reg_rtx.
! 
! 2019-04-19  Christophe Lyon  <christophe.lyon@linaro.org>
! 
! 	PR translation/90118
! 	* config/aarch64/aarch64.c (aarch64_override_options_internal):
! 	Add missing space before %<.
! 
! 2019-04-18  Peter Bergner  <bergner@linux.ibm.com>
! 
! 	PR rtl-optimization/87871
! 	* ira-lives.c (make_object_dead): Don't add conflicts to
! 	TOTAL_CONFLICT_HARD_REGS for register ignore_reg_for_conflicts.
! 
! 2019-04-18  Martin Sebor  <msebor@redhat.com>
! 
! 	PR middle-end/89797
! 	* tree.h (TYPE_VECTOR_SUBPARTS): Use HOST_WIDE_INT_1U.
! 	* config/aarch64/aarch64.c (aarch64_simd_vector_alignment): Avoid
! 	assuming type size fits in SHWI.
! 
! 2019-04-18  Jan Hubicka  <hubicka@ucw.cz>
! 
! 	PR ipa/85051
! 	* ipa-inline.c (flatten_function): New parameter UPDATE.
! 	(ipa_inline, early_inliner): Use it.
! 
! 2019-04-18  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* fold-const.c (int_const_binop): Return early on failure.
! 
! 2019-04-18  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	PR middle-end/85164
! 	* combine.c (force_int_to_mode): Cast the argument rather than
! 	the result of known_alignment.
! 	* rtlanal.c (rtx_addr_can_trap_p_1): Use known_subrange_p.
! 
! 2019-04-18  Richard Biener  <rguenther@suse.de>
! 
! 	PR debug/90131
! 	* tree-cfgcleanup.c (move_debug_stmts_from_forwarder): Split
! 	out from ...
! 	(remove_forwarder_block): ... here.
! 	(remove_forwarder_block_with_phi): Also move debug stmts here.
! 
! 2019-04-18  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR translation/79183
! 	* gimple-ssa-sprintf.c (format_directive): Use inform_n instead of
! 	inform where appropriate.
! 
! 2019-04-18  Richard Biener  <rguenther@suse.de>
! 
! 	* tree.c (get_qualified_type): Put found type variants at the
! 	head of the variant list.
! 
! 2018-04-17  Segher Boessenkool  <segher@kernel.crashing.org>
! 
! 	* config/rs6000/rs6000.c (rs6000_register_move_cost): Fix typo.
! 
! 2019-04-17  Hongtao Liu  <hongtao.liu@intel.com>
! 
! 	PR target/90125
! 	* config/i386/avx512fintrin.h (_mm_maskz_fmadd_round_sd,
! 	_mm_maskz_fmadd_round_ss, _mm_maskz_fmsub_round_sd,
! 	_mm_maskz_fmsub_round_ss, _mm_maskz_fnmadd_round_sd,
! 	_mm_maskz_fnmadd_round_ss, _mm_maskz_fnmsub_round_sd,
! 	_mm_maskz_fnmsub_round_ss): Use _maskz builtin instead of _mask3.
! 
! 2019-04-17  Peter Bergner  <bergner@linux.ibm.com>
! 
! 	* ira-conflicts.c (print_allocno_conflicts): Always print something,
! 	even for allocno's with no conflicts.
! 	(print_conflicts): Print an extra newline.
! 
! 2019-04-17  Segher Boessenkool  <segher@kernel.crashing.org>
! 
! 	* auto-inc-dec.c (attempt_change): Set the alignment of the
! 	temporary memory to that of the original.
! 
! 2019-04-17  Joao Moreira  <jmoreira@suse.de>
! 
! 	* targhooks.c (default_print_patchable_function_entry): Emit
! 	__patchable_function_entries section with writable flags to allow
! 	relocation resolution.
! 
! 2019-04-17  Jonny Grant  <jg@jguk.org>
! 
! 	* collect2.c (main): Change gcc.gnu.org URL to HTTPS.
! 
! 2019-04-17  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR middle-end/90095
! 	* internal-fn.c (expand_mul_overflow): Don't set SUBREG_PROMOTED_VAR_P
! 	on lowpart SUBREGs.
! 
! 2019-04-17  Claudiu Zissulescu  <claziss@synopsys.com>
! 
! 	* config/arc/arc.c (arc_init): Format diagnostic string.
! 	(arc_override_options): Likewise.
! 	(check_if_valid_regno_const): Likewise.
! 	(arc_reorg): Likewise.
! 
! 2019-04-17  Segher Boessenkool  <segher@kernel.crashing.org>
! 
! 	PR target/17108
! 	* config/rs6000/rs6000.c (rs6000_split_multireg_move): Adjust pattern
! 	name.
! 	(rs6000_emit_allocate_stack_1): Simplify condition.  Adjust pattern
! 	name.
! 	* config/rs6000/rs6000.md (bits): Add entries for SF and DF.
! 	(*movdi_update1): Use Pmode.
! 	(movdi_<mode>_update): Fix argument to avoiding_indexed_address_p.
! 	(movdi_<mode>_update_stack): Rename to ...
! 	(movdi_update_stack): ... this.  Fix comment.  Change condition. Don't
! 	use Pmode.
! 	(*movsi_update1): Use Pmode.
! 	(*movsi_update2): Use Pmode.
! 	(movsi_update): Rename to ...
! 	(movsi_<mode>_update): ... this.  Use Pmode.
! 	(movsi_update_stack): Fix condition.
! 	(*movhi_update1): Use Pmode.  Fix argument to
! 	avoiding_indexed_address_p.
! 	(*movhi_update2): Ditto.
! 	(*movhi_update3): Ditto.
! 	(*movhi_update4): Ditto.
! 	(*movqi_update1): Ditto.
! 	(*movqi_update2): Ditto.
! 	(*movqi_update3): Ditto.
! 	(*movsf_update1, *movdf_update1): Merge, rename to...
! 	(*mov<mode>_update1): This.  Use Pmode.  Fix argument to
! 	avoiding_indexed_address_p.  Add "size" attribute.
! 	(*movsf_update2, *movdf_update2): Merge, rename to...
! 	(*mov<mode>_update2): This.  Ditto.
! 	(*movsf_update3): Use Pmode.  Fix argument to
! 	avoiding_indexed_address_p.
! 	(*movsf_update4): Ditto.
! 	(allocate_stack): Simplify condition.  Adjust pattern names.
! 
! 2019-04-17  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/89093
! 	* config/arm/arm.c (arm_valid_target_attribute_rec): Don't skip
! 	whitespace at the start of target attribute string.
! 
! 2019-04-16  Pat Haugen  <pthaugen@us.ibm.com>
! 
! 	PR target/84369
! 	* config/rs6000/power9.md: Add store forwarding bypass.
! 
! 2019-04-16  Alexandre Oliva <aoliva@redhat.com>
! 
! 	PR debug/89528
! 	* valtrack.c (dead_debug_insert_temp): Reset debug references
! 	to the return value of a call being removed.
! 
! 2019-04-16  Claudiu Zissulescu  <claziss@synopsys.com>
! 
! 	* config/arc/arc-protos.h (arc_register_move_cost): Remove.
! 	* config/arc/arc.c (arc_register_move_cost): Re-purpose it to
! 	implement target hook.
! 	(arc_memory_move_cost): New function.
! 	(TARGET_REGISTER_MOVE_COST): Define.
! 	(TARGET_MEMORY_MOVE_COST): Likewise.
! 	* config/arc/arc.h (REGISTER_MOVE_COST): Remove.
! 	(MEMORY_MOVE_COST): Likewise.
! 
! 2019-04-16  Claudiu Zissulescu  <claziss@synopsys.com>
! 
! 	* config/arc/arc.md (sibcall_insn): Use Rcd constraint.
! 	(sibcall_value_insn): Likewise.
! 	* config/arc/constraints.md (Rs5): Remove.
! 
! 2019-04-16  Claudiu Zissulescu  <claziss@synopsys.com>
! 
! 	* config/arc/arc.c (arc_hard_regno_modes): Add two missing modes
! 	for last two fake registers.
! 	(arc_conditional_register_usage): Make sure fake frame and arg
! 	pointer regs are in general regs class.
! 	(FRAME_POINTER_MASK): Remove.
! 	(RETURN_ADDR_MASK): Remove.
! 	(arc_must_save_register): Use hard frame regnum.
! 	(frame_restore_reg): Use hard_frame_pointer_rtx.
! 	(arc_save_callee_saves): Likewise.
! 	(arc_restore_callee_saves): Likewise.
! 	(arc_save_callee_enter): Likewise.
! 	(arc_restore_callee_leave): Likewise.
! 	(arc_save_callee_milli): Likewise.
! 	(arc_eh_return_address_location): Likewise.
! 	(arc_check_multi): Use hard frame regnum.
! 	(arc_can_eliminate): Likewise.
! 	* config/arc/arc.h (FIXED_REGISTERS): Make FP register available
! 	for register allocator.
! 	(REG_CLASS_CONTENTS): Update GENERAL_REGS.
! 	(REGNO_OK_FOR_BASE_P): Consider FRAME_POINTER_REGNUM.
! 	(FRAME_POINTER_REGNUM): Change it to a fake register.
! 	(HARD_FRAME_POINTER_REGNUM): Defined.
! 	(ARG_POINTER_REGNUM): Change it to a new fake register.
! 	(ELIMINABLE_REGS): Update.
! 	(REGISTER_NAMES): Update names.
! 	* config/arc/arc.md (LP_START): Remove.
! 	(LP_END): Likewise.
! 	(shift_si3_loop): Update pattern.
! 
! 2019-04-16  Claudiu Zissulescu  <claziss@synopsys.com>
! 
! 	* config/arc/arc.c (arc_expand_prologue): Emit blockage regardless
! 	to avoid delay slot scheduling.
! 	(arc_must_save_register): Don't save SP.
! 	* config/arc/arc.md (stack_tie): Remove.
! 	(UNSPEC_ARC_STKTIE): Likewise.
! 
! 2019-04-16  Kito Cheng  <kito.cheng@gmail.com>
! 	    Shiva Chen  <shiva0217@gmail.com>
! 
! 	* config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Fix wrong
! 	code gen with large shift amount.
! 
! 2019-04-16  Chung-Ju Wu  <jasonwucj@gmail.com>
! 
! 	* config/nds32/nds32-pipelines-auxiliary.c (wext_odd_dep_p): Handle
! 	subreg.
! 
! 2019-04-16  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/90096
! 	* config/i386/i386.c (ix86_target_string): Add ADD_ABI_P argument, only
! 	print -m64/-mx32/-m32 if it is true.
! 	(ix86_debug_options, ix86_function_specific_print): Pass true as
! 	ADD_ABI_P to ix86_target_string.
! 	(ix86_expand_builtin): Adjust ix86_target_string caller, pass true as
! 	ADD_ABI_P only if OPTION_MASK_ISA_64BIT is set in bisa and in that case
! 	or into it OPTION_MASK_ISA_ABI_64 or OPTION_MASK_ISA_ABI_X32.
! 
! 	PR rtl-optimization/90082
! 	* dce.c (can_delete_call): New function.
! 	(deletable_insn_p, mark_insn): Use it.
! 
! 	PR tree-optimization/90090
! 	* tree-ssa-math-opts.c (is_division_by): Ignore divisions that can
! 	throw internally.
! 	(is_division_by_square): Likewise.  Formatting fix.
! 
! 2019-04-16  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/56049
! 	* tree-ssa-loop-im.c (mem_ref_hasher::equal): Elide alias-set
! 	equality check if alias-set zero will prevail.
  
! 2019-04-15  Jeff Law  <law@redhat.com>
  
! 	* config/microblaze/microblaze.c (microblaze_expand_block_move): Treat
! 	size and alignment as unsigned.
!  
! 2019-04-15  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/90074
! 	* tree-loop-distribution.c (destroy_loop): Preserve correct
! 	debug info.
  
! 2019-04-15  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90071
! 	* tree-ssa-reassoc.c (init_range_entry): Do not pick up
! 	abnormal operands from def stmts.
  
! 2019-04-15  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	PR rtl-optimization/89794
! 	* combine.c (count_auto_inc): New function.
! 	(try_combine): Count how many auto_inc expressions there were in the
! 	original instructions.  Ensure we have the same number in the new
! 	instructions.  Remove the code that tried to ensure auto_inc side
! 	effects on i1 and i0 are not lost.
  
! 2019-04-15  Richard Biener  <rguenther@suse.de>
  
! 	PR ipa/88936
! 	* tree.h (auto_var_p): Declare.
! 	* tree.c (auto_var_p): New function, split out from ...
! 	(auto_var_in_fn_p): ... here.
! 	* tree-ssa-structalias.c (struct variable_info): Add shadow_var_uid
! 	member.
! 	(new_var_info): Initialize it.
! 	(set_uids_in_ptset): Also set the shadow variable uid if required.
! 	(ipa_pta_execute): Postprocess points-to solutions assigning
! 	shadow variable uids for locals that may reach their containing
! 	function recursively.
! 	* tree-ssa-ccp.c (fold_builtin_alloca_with_align): Do not
! 	assert but instead check whether the points-to solution is
! 	a singleton.
  
! 2019-04-15  Martin Jambor  <mjambor@suse.cz>
  
! 	PR ipa/pr89693
! 	* cgraph.c (clone_of_p): Loop over clone chain for each step in
! 	the thunk chain.
  
! 2019-04-15  Monk Chiang  <sh.chiang04@gmail.com>
  
! 	* config.gcc (nds32*-*-linux*): Set gcc_cv_initfini_array to yes.
  
! 2019-04-15  Monk Chiang  <sh.chiang04@gmail.com>
! 	    Kito Cheng  <kito.cheng@gmail.com>
! 	    Shiva Chen  <shiva0217@gmail.com>
  
! 	* config/nds32/nds32-md-auxiliary.c
! 	(nds32_legitimize_pic_address): Use new PIC pattern.
! 	(nds32_legitimize_tls_address): Use new TLS pattern.
! 	(nds32_output_symrel): New.
! 	* config/nds32/nds32-protos.h (nds32_output_symrel): Declare.
! 	(nds32_alloc_relax_group_id): Ditto.
! 	* config/nds32/nds32-relax-opt.c (nds32_alloc_relax_group_id): New.
! 	(nds32_group_insns): Use nds32_alloc_relax_group_id instead of use
! 	relax_group_id.
! 	(nds32_group_tls_insn): Ditto.
! 	(nds32_group_float_insns): Ditto.
! 	* config/nds32/nds32.md (tls_le): New.
! 	(sym_got): Ditto.
  
! 2019-04-15  Chung-Ju Wu  <jasonwucj@gmail.com>
  
! 	* configure: Add nds32 target for dwarf2 debug_line checking.
! 	* configure.ac: Regenerated.
  
! 2019-04-14  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR lto/89358
! 	* ipa-devirt.c (skip_in_fields_list_p): New.
! 	(odr_types_equivalent_p): Use it.
  
! 2019-04-13  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/89093
! 	* config/arm/arm.c (arm_valid_target_attribute_rec): Use strcmp
! 	instead of strncmp when checking for thumb and arm.  Formatting fixes.
  
! 2019-04-12  Iain Buclaw  <ibuclaw@gdcproject.org>
  
! 	* doc/install.texi: Document --with-target-system-zlib.
  
! 2019-04-12  Martin Sebor  <msebor@redhat.com>
  
! 	PR c/88383
! 	PR c/89288
! 	PR c/89798
! 	PR c/89797
! 	* targhooks.c (default_vector_alignment): Avoid assuming
! 	argument fits in SHWI.
! 	* tree.h (TYPE_VECTOR_SUBPARTS): Avoid sign overflow in
! 	a shift expression.
! 	* doc/extend.texi (__builtin_has_attribute): Add a clarifying note.
  
! 2019-04-12  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/89965
! 	* dce.c: Include rtl-iter.h.
! 	(struct check_argument_load_data): New type.
! 	(check_argument_load): New function.
! 	(find_call_stack_args): Check for loads from stack slots still tracked
! 	in sp_bytes and punt if any is found.
  
! 	* config/mips/loongson-mmiintrin.h: Fix up #error message.
  
! 2019-04-12  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* params.def (PARAM_MAX_LTO_STREAMING_PARALLELISM): New parameter.
! 	* doc/invoke.texi (max-lto-streaming-paralellism): New --param.
  
! 2019-04-12  Martin Liska  <mliska@suse.cz>
  
! 	PR middle-end/89970
! 	* multiple_target.c (create_dispatcher_calls): Wrap ifunc
! 	in error message.
! 	(separate_attrs): Handle multiple 'default's.
! 	(expand_target_clones): Rework error handling code.
  
! 2019-04-12  Kelvin Nilsen  <kelvin@gcc.gnu.org>
  
! 	PR target/87532
! 	* config/rs6000/rs6000.c (rs6000_split_vec_extract_var): Use inner
! 	mode of vector rather than mode of destination for move instruction.
! 	* config/rs6000/vsx.md (*vsx_extract_<mode>_<VS_scalar>mode_var):
! 	Use QI inner mode with V16QI vector mode.
  
! 2019-04-12  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/52726
! 	* config/tilepro/tilepro.c (tilepro_print_operand): Use just
! 	"invalid %%t operand" in output_operand_lossage message.
  
! 2019-04-12  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/predicates.md (permute_pattern_operand): New
! 	predicate.
! 	* config/s390/vector.md ("*vec_splats_bswap_vec<mode>"): Add USE
! 	operand for the permute pattern.
! 	("*vec_perm<mode>"): New insn definition.
! 	("bswap<mode>"): Generate the permute pattern operand in the
! 	expander and perform the operand reloads for pre arch13 level
! 	already.
! 	("*bswap<mode>_emu"): Rename to ...
! 	("*bswap<mode>"): ... this. And make the splitter vxe2 only.
! 	* config/s390/vx-builtins.md ("*vec_insert_and_zero_bswap<mode>"):
! 	Add the USE operand for the permute pattern.
! 	("*vec_set_bswap_vec<mode>"): Likewise.
  
! 2019-04-12  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c/89946
! 	* varasm.c (assemble_start_function): Don't use tree_fits_uhwi_p
! 	and gcc_unreachable if it fails, just call tree_to_uhwi which
! 	verifies that too.  Test TREE_CHAIN instead of list_length > 1.
! 	Start warning message with a lower-case letter.  Formatting fixes.
  
! 	PR rtl-optimization/90026
! 	* cfgcleanup.c (try_optimize_cfg): When removing empty bb with no
! 	successors, look for BARRIERs inside of the whole BB_FOOTER chain
! 	rather than just at the start of it.  If e->src BB_FOOTER is not NULL
! 	in cfglayout mode, use emit_barrier_after_bb.
  
! 2018-04-11  Steve Ellcey  <sellcey@marvell.com>
  
! 	PR rtl-optimization/87763
! 	* config/aarch64/aarch64.md (*aarch64_bfi<GPI:mode>4_noshift_alt):
! 	New Instruction.
  
! 2019-04-11  Tom de Vries  <tdevries@suse.de>
  
! 	* doc/extend.texi (@node Statement Exprs): Note variable shadowing at
! 	max macro using statement expression.
  
! 2019-04-11  David Edelsohn  <dje.gcc@gmail.com>
  
! 	* xcoffout.h (xcoff_private_rodata_section_name): Declare.
! 	* xcoffout.c (xcoff_private_rodata_section_name): Define.
! 	* config/rs6000/rs6000.c (rs6000_xcoff_asm_init_sections): Create
! 	read_only_private_data_section using xcoff_private_rodata_section_name.
! 	(rs6000_xcoff_file_start): Generate xcoff_private_rodata_section_name.
  
! 2019-04-11  Christophe Lyon  <christophe.lyon@linaro.org>
  
! 	PR target/90016
! 	* config/aarch64/aarch64.opt (msve-vector-bits): Add missing final '.'.
  
! 2019-04-11  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/89965
! 	* dce.c (sp_based_mem_offset): New function.
! 	(find_call_stack_args): Use sp_based_mem_offset.
  
! 2019-04-11  Jonathan Wakely  <jwakely@redhat.com>
  
! 	* doc/invoke.texi (Optimize Options): Clarify -flive-patching docs.
  
! 2019-04-11  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90020
! 	* tree-ssa-sccvn.c (vn_reference_may_trap): New function.
! 	* tree-ssa-sccvn.h (vn_reference_may_trap): Declare.
! 	* tree-ssa-pre.c (compute_avail): Use it to not put
! 	possibly trapping references after a call that might not
! 	return into EXP_GEN.
! 	* gcse.c (compute_hash_table_work): Do not elide
! 	marking a block containing a call if the call might not
! 	return.
  
! 2019-04-11  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90018
! 	* tree-vect-data-refs.c (vect_preserves_scalar_order_p):
! 	Test both SLP and interleaving variants.
  
! 2019-04-11  Robin Dapp  <rdapp@linux.ibm.com>
  
! 	* config/s390/8561.md: New file.
! 	* config/s390/driver-native.c (s390_host_detect_local_cpu):
! 	Add arch13 cpu model.
! 	* config/s390/s390-opts.h (enum processor_type): Likewise.
! 	* config/s390/s390.c (s390_get_sched_attrmask): Add arch13.
! 	(s390_get_unit_mask): Likewise.
! 	(s390_is_fpd): Likewise.
! 	(s390_is_fxd): Likewise.
! 	* config/s390/s390.h (s390_tune_attr): Likewise.
! 	* config/s390/s390.md: Include arch13 pipeline description.
! 	* config/s390/s390.opt: Add arch13.
  
! 2018-04-10  Steve Ellcey  <sellcey@marvell.com>
  
! 	PR rtl-optimization/87763
! 	* config/aarch64/aarch64-protos.h (aarch64_masks_and_shift_for_bfi_p):
! 	New prototype.
! 	* config/aarch64/aarch64.c (aarch64_masks_and_shift_for_bfi_p):
! 	New function.
! 	* config/aarch64/aarch64.md (*aarch64_bfi<GPI:mode>5_shift):
! 	New instruction.
! 	(*aarch64_bfi<GPI:mode>5_shift_alt): Ditto.
! 	(*aarch64_bfi<GPI:mode>4_noand): Ditto.
! 	(*aarch64_bfi<GPI:mode>4_noand_alt): Ditto.
! 	(*aarch64_bfi<GPI:mode>4_noshift): Ditto.
  
! 2019-04-10  Jonathan Wakely  <jwakely@redhat.com>
  
! 	* doc/invoke.texi (Optimize Options): Change "Nevertheless" to
! 	"Although" in -fipa-icf documentation.
  
! 	* doc/invoke.texi (Debugging Options): Explicitly state the semantics
! 	of using multiple -g options.
  
! 2019-04-10  Martin Liska  <mliska@suse.cz>
  
! 	PR gcov-profile/89959
! 	* doc/gcov.texi: Make documentation of -x option
! 	more precise.
  
! 2019-04-10  Richard Biener  <rguenther@suse.de>
  
! 	* tree-vectorizer.h (_stmt_vec_info): Remove same_dr_stmt
! 	member.
! 	(DR_GROUP_SAME_DR_STMT): Remove.
! 	* tree-vect-stmts.c (vectorizable_load): Remove unreachable code.
! 	* tree-vect-data-refs.c (vect_analyze_group_access_1): Likewise,
! 	replace with assert.
! 	(vect_analyze_data_ref_accesses): Fix INTEGER_CST comparison.
! 	(vect_record_grouped_load_vectors): Remove unreachable code.
  
! 2019-04-10  Richard Earnshaw  <rearnsha@arm.com>
  
! 	PR target/90016
! 	* config/aarch64/aarch64.opt (msve-vector-bits): Remove redundant and
! 	obsolete reference to N.
  
! 2019-04-10  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/90025
! 	* expr.c (store_expr): Set properly size on the MEM passed to
! 	clear_storage.
  
! 	PR c++/90010
! 	* gimple-ssa-sprintf.c (target_to_host): Fix handling of targstr
! 	with strlen in between hostsz-3 and hostsz-1 inclusive when no
! 	translation is needed, and when translation is needed, only append
! 	... if the string length is hostsz or more bytes long.  Avoid using
! 	strncpy or strcat.
  
! 2019-04-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  
! 	PR target/90024
! 	* config/arm/arm.c (neon_valid_immediate): Disallow VOIDmode parameter.
! 	* config/arm/constraints.md (Dm, DN, Dn): Split previous Dn constraint
! 	into three.
! 	* config/arm/neon.md (*neon_mov<mode>): Account for TImode and DImode
! 	differences directly.
! 	(*smax<mode>3_neon, vashl<mode>3, vashr<mode>3_imm): Use Dm constraint.
  
! 2019-04-09  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR translation/90011
! 	* ipa-devirt.c (compare_virtual_tables): Remove two trailing spaces
! 	from diagnostics.
! 	* config/arm/freebsd.h (LINK_SPEC): Remove trailing space from -p
! 	diagnostics.
! 	* config/riscv/freebsd.h (LINK_SPEC): Likewise.
! 	* config/aarch64/aarch64-freebsd.h (FBSD_TARGET_LINK_SPEC): Likewise.
! 	* config/darwin.h (DRIVER_SELF_SPECS, ASM_FINAL_SPEC): Remove
! 	trailing space from -gsplit-dwarf diagnostics.
  
! 	PR tree-optimization/89998
! 	* gimple-ssa-sprintf.c (try_substitute_return_value): Use lhs type
! 	instead of integer_type_node if possible, don't add ranges if return
! 	type is not compatible with int.
! 	* gimple-fold.c (gimple_fold_builtin_sprintf,
! 	gimple_fold_builtin_snprintf): Use lhs type instead of hardcoded
! 	integer_type_node.
  
! 2019-04-09  Martin Liska  <mliska@suse.cz>
  
! 	* Makefile.in: Use GENERATOR_CFLAGS for all generators.
! 	* doc/install.texi: Document the new config.
  
! 2019-04-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* tree-vect-data-refs.c (vect_get_smallest_scalar_type): Always
! 	use gimple_expr_type for load and store calls.  Skip over the
! 	condition argument in a conditional internal function.
! 	Protect use of TREE_INT_CST_LOW.
  
! 2019-04-09  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/90015
! 	* config/riscv/riscv.c (riscv_get_interrupt_type): Fix comment typo.
! 	(riscv_merge_decl_attributes): Fix typo in diagnostics.  Remove
! 	trailing period from it too.
  
! 2019-04-08  wu yuan  <wuyuan5@huawei.com>
  
! 	* config/aarch64/aarch64-cores.def (tsv1100): Change scheduling model.
! 	* config/aarch64/aarch64.md : Add "tsv110.md"
! 	* config/aarch64/tsv110.md: New file.
  
! 2019-04-08  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/90006
! 	* tree-vect-data-refs.c (vect_get_smallest_scalar_type): Handle
! 	calls like lrint.
  
! 2019-04-08  Andrea Corallo  <andrea.corallo@arm.com>
  
! 	PR target/83033
! 	* config/aarch64/cortex-a57-fma-steering.c (fma_forest): Prohibit copy
! 	construction.
! 	(fma_root_node): Likewise.
! 	(func_fma_steering): Likewise.
  
! 2019-04-08  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/89865
! 	* config/i386/i386.md: Add peepholes for z = x; x ^= y; x != z.
  
! 	PR rtl-optimization/89865
! 	* config/i386/i386.md
! 	(SWI12 peephole for mem {+,-,&,|,^}= x; mem != 0): Fix up operand
! 	numbers not to clash with the additional operands[4].
! 	(peepholes for mem {+,-,&,|,^}= x; mem != 0): New peephole2s
! 	with extra register copy in the middle.
  
! 2019-04-08  Martin Liska  <mliska@suse.cz>
  
! 	PR gcov-profile/89961
! 	* doc/gcov.texi: Document data_file.
! 	* gcov.c (generate_results): Add data_info into JSON output.
  
! 2019-04-01  Bin Cheng  <bin.cheng@linux.alibaba.com>
  
! 	PR tree-optimization/89725
! 	* tree-chrec.c (chrec_contains_symbols): New parameter.  Handle outer
! 	loop's chrec as invariant symbol.
! 	* tree-chrec.h (chrec_contains_symbols): New parameter.
! 	* tree-data-ref.c (analyze_miv_subscript): Pass new argument.
! 	(build_classic_dist_vector_1, add_other_self_distances): Bypass access
! 	function of loops not in DDR's loop_nest.
! 	* tree-data-ref.h (index_in_loop_nest): Add unreachable check.
  
! 2019-04-08  Chenghua Xu  <paul.hua.gm@gmail.com>
  
! 	PR target/89623
! 	* config/mips/mips.opt (LOONGSON_EXT2): Use Var instead of
! 	Mask.
  
! 2019-04-07  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/89945
! 	* config/i386/i386.md (anddi_1 to andsi_1_zext splitter):
! 	Avoid calling gen_lowpart with SYMBOL_REF and LABEL_REF operand.
  
! 2019-04-05  Joern Rennecke  <joern.rennecke@embecosm.com>
  
! 	* sched-deps.c (sched_macro_fuse_insns): Check return value of
! 	targetm.fixed_condition_code_regs.
  
! 2019-04-05  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/89892
! 	PR debug/89905
! 	* tree-cfgcleanup.c (remove_forwarder_block): Always move
! 	debug bind stmts but reset them if they are not valid at the
! 	destination.
  
! 2019-04-05  Martin Liska  <mliska@suse.cz>
  
! 	PR translation/89936
! 	* collect-utils.c (collect_execute): Use %< and %>, or %qs in
! 	order to wrap keywords or arguments.
! 	* collect2.c (main): Likewise.
! 	(scan_prog_file): Likewise.
! 	(scan_libraries): Likewise.
! 	* common/config/riscv/riscv-common.c
! 	(riscv_subset_list::parsing_subset_version): Likewise.
! 	(riscv_subset_list::parse_std_ext): Likewise.
! 	* config/aarch64/aarch64.c (aarch64_override_options_internal):
! 	Likewise.
! 	* config/arm/arm.c (arm_option_override): Likewise.
! 	* config/cris/cris.c (cris_print_operand): Likewise.
! 	* config/darwin-c.c (darwin_pragma_options): Likewise.
! 	(darwin_pragma_unused): Likewise.
! 	(darwin_pragma_ms_struct): Likewise.
! 	* config/ft32/ft32.c (ft32_print_operand): Likewise.
! 	* config/i386/i386.c (print_reg): Likewise.
! 	(ix86_print_operand): Likewise.
! 	* config/i386/xm-djgpp.h: Likewise.
! 	* config/iq2000/iq2000.c (iq2000_print_operand): Likewise.
! 	* config/m32c/m32c.c (m32c_option_override): Likewise.
! 	* config/msp430/msp430.c (msp430_option_override): Likewise.
! 	* config/nds32/nds32.c (nds32_option_override): Likewise.
! 	* config/nvptx/mkoffload.c (main): Likewise.
! 	* config/rx/rx.c (rx_print_operand): Likewise.
! 	(valid_psw_flag): Likewise.
! 	* config/vms/vms-c.c (vms_pragma_member_alignment): Likewise.
! 	(vms_pragma_nomember_alignment): Likewise.
! 	(vms_pragma_extern_model): Likewise.
! 	* lto-wrapper.c (compile_offload_image): Likewise.
! 	* omp-offload.c (oacc_parse_default_dims): Likewise.
! 	* symtab.c (symtab_node::verify_base): Likewise.
! 	* tlink.c (recompile_files): Likewise.
! 	(start_tweaking): Likewise.
! 	* tree-profile.c (parse_profile_filter): Likewise.
  
! 2019-04-05  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/89956
! 	* tree-ssa-math-opts.c (convert_mult_to_fma): Protect against
! 	multiple negates of the same value.
  
! 2019-04-04  Martin Sebor  <msebor@redhat.com>
  
! 	PR middle-end/89957
! 	PR middle-end/89911
! 	* builtins.c (expand_builtin_strnlen): Make sure wi::ltu_p operands
! 	have the same precision since the function crashes otherwise.
! 	* calls.c (maybe_warn_nonstring_arg): Avoid assuming strnlen() call
! 	has non-zero arguments.
  
! 2019-04-04  Martin Sebor  <msebor@redhat.com>
  
! 	PR middle-end/89934
! 	* gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Bail
! 	out if the number of arguments is less than expected.
  
! 2019-04-04  Jeff Law  <law@redhat.com>
  
! 	PR rtl-optimization/89399
! 	* ree.c (combine_set_extension): Use single_set rather than
! 	digging into PATTERN for items on the candidate list.
! 	(combine_reaching_defs): Likewise.
  
! 2019-04-04  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/46590
! 	* loop-invariant.c (find_defs): Move df_remove_problem and
! 	df_process_deferred_rescans to move_invariants.
! 	Move df_live_add_problem and df_live_set_all_dirty calls
! 	to move_invariants.
! 	(move_invariants): Likewise.
! 	(move_loop_invariants): Likewise, making the df_live calls
! 	conditional on -O.  Remove the problem again if we added it
! 	locally.
  
! 2019-04-03  qing zhao  <qing.zhao@oracle.com>
  
! 	PR tree-optimization/89730
! 	* ipa-inline.c (can_inline_edge_p): Delete the checking for
! 	-flive-patching=inline-only-static.
! 	(can_inline_edge_by_limits_p): Add the checking for
! 	-flive-patching=inline-only-static and grant always_inline
! 	even when -flive-patching=inline-only-static is specified.
  
! 2019-04-03  Jeff Law  <law@redhat.com>
  
! 	PR rtl-optimization/81025
! 	* reorg.c (skip_consecutive_labels): Do not skip past a BARRIER.
  
! 2019-04-03  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/84101
! 	* tree-vect-stmts.c: Include explow.h for hard_function_value,
! 	regs.h for hard_regno_nregs.
! 	(cfun_returns): New helper.
! 	(vect_model_store_cost): When vectorizing a store to a decl
! 	we return and the function ABI returns in a multi-reg location
! 	account for the possible spilling that will happen.
  
! 2019-04-03  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390.c (s390_legitimate_address_p): Reject long
! 	displacement addresses for vector mode operands.
  
! 2019-04-03  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.c (GMASK_LEN): Define.
! 	(arc_restore_callee_saves): Restore first blink when
! 	!optimize_size.
  
! 2019-04-03  Sudakshina Das  <sudi.das@arm.com>
  
! 	* doc/extend.texi: Add deprecated comment on sign-return-address
! 	function attribute and add mbranch-protection.
! 	* doc/invoke.texi: Add bti to the options for mbranch-protection.
  
! 2019-04-03  Richard Biener  <rguenther@suse.de>
  
! 	PR lto/89896
! 	* lto-wrapper.c (run_gcc): Avoid implicit rules making
! 	the all target phony.
  
! 2019-04-02  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/89902
! 	PR target/89903
! 	* config/i386/i386.c (dimode_scalar_to_vector_candidate_p):
! 	Return false for variable DImode shifts.
! 	(dimode_scalar_chain::compute_convert_gain): Do not handle
! 	register count operand in variable DImode shifts.
! 	(dimode_scalar_chain::make_vector_copies): Remove support to copy
! 	count argument of a variable shift instruction to a vector register.
! 	(dimode_scalar_chain::convert_reg): Remove support to convert
! 	count argument of a variable shift instruction.
  
! 2019-04-02  Andrey Belevantsev  <abel@ispras.ru>
  
! 	PR rtl-optimization/84206
! 	* sel-sched-ir.h (get_all_loop_exits): Avoid the outer loop when
! 	iterating over loop headers.
  
! 2019-04-02  Andrey Belevantsev  <abel@ispras.ru>
  
! 	PR rtl-optimization/85876
! 	* sel-sched.c (code_motion_path_driver): Avoid unwinding first_insn
! 	beyond the original fence.
  
! 2019-04-02  Ulrich Weigand  <uweigand@de.ibm.com>
  
! 	* config.gcc: Mark spu* targets as deprecated/obsolete.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390-builtin-types.def: New builtin function type
! 	definitions. Remove unused types.
! 	* config/s390/s390-builtins.def (s390_vcdgb, s390_vcdlgb)
! 	(s390_vcgdb, s390_vclgdb): Remove low-level builtin definitions.
! 	(s390_vec_float, s390_vec_signed, s390_vec_unsigned): New
! 	overloaded builtins.
! 	(s390_vcefb, s390_vcdgb, s390_vcelfb, s390_vcdlgb, s390_vcfeb)
! 	(s390_vcgdb, s390_vclfeb, s390_vclgdb): New low-level builtins.
! 	* config/s390/vecintrin.h (vec_float): New builtin macro definition.
! 	(vec_double, vec_signed, vec_unsigned): Define to use the new
! 	overloaded builtins.
! 	* config/s390/vx-builtins.md ("vec_double_s64", "vec_double_u64"):
! 	Remove expanders.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390-builtin-types.def: New builtin function type
! 	definitions.
! 	* config/s390/s390-builtins.def (s390_vec_search_string_cc)
! 	(s390_vec_search_string_until_zero_cc): New overloaded builtins.
! 	(s390_vstrsb, s390_vstrsh, s390_vstrsf, s390_vstrszb)
! 	(s390_vstrszh, s390_vstrszf): New low-level builtins.
! 	* config/s390/s390.md (UNSPEC_VEC_VSTRS, UNSPEC_VEC_VSTRSCC): New
! 	constant definitions.
! 	* config/s390/vecintrin.h (vec_search_string_cc)
! 	(vec_search_string_until_zero_cc): New builtin name definitions.
! 	* config/s390/vx-builtins.md ("vstrs<mode>", "vstrsz<mode>"): New
! 	expanders.
! 	("vec_vstrs<mode>"): New insn definition.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390-builtin-types.def: Add new builtin function
! 	types.
! 	* config/s390/s390-builtins.def (s390_vec_sldb, s390_vec_srdb):
! 	New overloaded builtins.
! 	(s390_vec_sldb, s390_vec_srdb): New low-level builtins.  and
! 	s390_vsrd.
! 	* config/s390/s390.md (UNSPEC_VEC_SLDB): Rename to ...
! 	(UNSPEC_VEC_SLDBYTE): ... this.
! 	(UNSPEC_VEC_SLDBIT, UNSPEC_VEC_SRDBIT): New constant definitions.
! 	* config/s390/vecintrin.h (vec_sldb, vec_srdb): New builtin name
! 	definitions.
! 	* config/s390/vx-builtins.md ("vec_sld<mode>", "vec_sldw<mode>"):
! 	Rename UNSPEC_VEC_SLDB to UNSPEC_VEC_SLDBYTE.
! 	("vec_sldb<mode>", "vec_srdb<mode>"): New insn definitions.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	("*vec_splats_bswap_vec<mode>", "*vec_splats_bswap_elem<mode>"):
! 	New insn definition.
! 	* config/s390/vx-builtins.md (V_HW_HSD): Move to ...
! 	* config/s390/vector.md (V_HW_HSD): ... here.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/vecintrin.h: Map vec_vster low-level builtins to vec_vler.
! 	* config/s390/vx-builtins.md ("*vec_insert_and_zero_bswap<mode>")
! 	("*vec_set_bswap_elem<mode>", "*vec_set_bswap_vec<mode>")
! 	("*vec_extract_bswap_vec<mode>", "*vec_extract_bswap_elem<mode>"):
! 	New insn definitions.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390-builtin-types.def: Add new builtin function type.
! 	* config/s390/s390-builtins.def: Add overloaded builtin
! 	s390_vec_reve and low-level builtins for s390_vler and s390_vster.
! 	* config/s390/s390.md (UNSPEC_VEC_ELTSWAP): New constant definition.
! 	* config/s390/vecintrin.h (vec_reve): New builtin name definition.
! 	* config/s390/vx-builtins.md (V_HW_HSD): New mode iterator.
! 	("eltswap<mode>"): New expander.
! 	("*eltswapv16qi", "*eltswap<mode>", "*eltswap<mode>_emu"): New
! 	insn definitions.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390-builtin-types.def: Add new builtin function types.
! 	* config/s390/s390-builtins.def: Add overloaded builtin
! 	s390_vec_revb. Add low-level builtins for vlbr and vstbr
! 	instructions.
! 	* config/s390/vecintrin.h (vec_revb): New builtin name definition.
! 	* config/s390/vector.md (VT_HW_HSDT): New mode iterator.
! 	("bswap<mode>"): New expander.
! 	("*bswap<mode>", "*bswap<mode>_emu"): New insn definitions.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390-builtins.def (B_VXE2): New builtin flag definition.
! 	* config/s390/s390-c.c (s390_cpu_cpp_builtins_internal): Increment
! 	vector builtin version number in __VEC__.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390.md (VX_CONV_BFP, VX_CONV_INT): New mode
! 	iterators.
! 	(SFSI): New mode attribute.
! 	("*fixuns_truncdfdi2_vx", "*fix_truncdfdi2_bfp_z13")
! 	("*floatunsdidf2_z13", ): Add support for 32 bit conversions and
! 	rename to ...
! 	("*fixuns_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_z13")
! 	("*fix_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_bfp_z13")
! 	("*floatuns<VX_CONV_INT:mode><VX_CONV_BFP:mode>2_z13"): ... these.
! 	("floatsi<mode>2"): Add wcefb instruction.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390.md ("xde"): Extend mode attribute to vector types.
! 	* config/s390/vector.md (VX_VEC_CONV_BFP, VX_VEC_CONV_INT): New
! 	mode iterators.
! 	("floatv2div2df2", "floatunsv2div2df2", "fix_truncv2dfv2di2")
! 	("fixuns_truncv2dfv2di2"): Enhance with mode iterator to also
! 	support 32 bit fp-int conversions. Rename to ...
! 	("float<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2")
! 	("floatuns<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2")
! 	("fix_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2")
! 	("fixuns_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2"):
! 	... to these.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390.c (s390_rtx_costs): Do not add extra costs for
! 	if-then-else constructs if we can use the select instruction.
! 	* config/s390/s390.md ("*mov<mode>cc"): Add the new instructions.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390.md ("*popcountdi_arch13_cc")
! 	("*popcountdi_arch13_cconly", "*popcountdi_arch13"): New insn
! 	definition.
! 	("*popcount<mode>", "popcountdi2", "popcountsi2", "popcounthi2"):
! 	Append _z196 to make it ...
! 	("*popcount<mode>_z196", "popcountdi2_z196", "popcountsi2_z196")
! 	("popcounthi2_z196"): ... this.
! 	("popcountdi2_z196"): Remove TARGET_64BIT from the insn condition.
! 	("popcountdi2", "popcountsi2", "popcounthi2"): New expanders.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390.c (s390_canonicalize_comparison): Convert
! 	certain compares for arch13 in order to make use of the condition
! 	code result produced by the new instructions.
! 	(s390_rtx_costs): Adjust the costs for nnrk, nngrk, nork, nogrk,
! 	nxrk, and nxgrk instruction patterns.
! 	* config/s390/s390.md (ANDOR, bitops_name, inv_bitops_name)
! 	(inv_no): Add new code iterator together with some attributes.
! 	("*andc_split_<mode>"): Disable splitter for arch13.
! 	("*<ANDOR:bitops_name>c<GPR:mode>_cc")
! 	("*<ANDOR:bitops_name>c<GPR:mode>_cconly")
! 	("*<ANDOR:bitops_name>c<GPR:mode>")
! 	("*n<ANDOR:inv_bitops_name><GPR:mode>_cc")
! 	("*n<ANDOR:inv_bitops_name><mode>_cconly")
! 	("*n<ANDOR:inv_bitops_name><mode>", "*nxor<GPR:mode>_cc")
! 	("*nxor<mode>_cconly", "*nxor<mode>"): New insn definitions.
  
! 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* common/config/s390/s390-common.c (processor_flags_table): New
! 	entry for arch13.
! 	* config.gcc: Support arch13 with the --with-arch= configure flag.
! 	* config/s390/driver-native.c (s390_host_detect_local_cpu):
! 	* config/s390/s390-opts.h (enum processor_type): Add PROCESSOR_ARCH13.
! 	* config/s390/s390.c (s390_get_sched_attrmask)
! 	(s390_get_unit_mask): Add PROCESSOR_ARCH13.
! 	* config/s390/s390.h (enum processor_flags): Add PF_VXE2 and PF_ARCH13.
! 	* config/s390/s390.md (TARGET_CPU_ARCH13, TARGET_CPU_ARCH13_P)
! 	(TARGET_CPU_VXE2, TARGET_CPU_VXE2_P, TARGET_ARCH13)
! 	(TARGET_ARCH13_P, TARGET_VXE2, TARGET_VXE2_P): New macro
! 	definitions.
! 	* config/s390/s390.opt: Support arch13 as processor type in
! 	command line options.
  
! 2019-04-02  Martin Liska  <mliska@suse.cz>
  
! 	PR translation/89912
! 	* params.def (PARAM_GRAPHITE_MAX_ARRAYS_PER_SCOP):
! 	Fix param description of graphite-max-arrays-per-scop.
  
! 2019-04-02  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* config/sparc/linux64.h (ASAN_REJECT_SPEC): New macro.
! 	(ASAN_CC1_SPEC): Use it in 64-bit mode.
! 	* config/sparc/sol2.h (ASAN_REJECT_SPEC): Remove superfluous colon.
  
! 2019-04-01  Andrey Belevantsev  <abel@ispras.ru>
  
! 	PR rtl-optimization/85412
! 	* sel-sched.c (sel_sched_region): Assign reset_sched_cycles_p before
! 	sel_sched_region_1, not after.
  
! 2019-04-01  Andrey Belevantsev  <abel@ispras.ru>
  
! 	PR rtl-optimization/86928
! 	* sel-sched-ir.c (sel_redirect_edge_and_branch_force): Invoke
! 	compute_live if necessary.
! 	(sel_redirect_edge_and_branch): Likewise.
  
! 2019-04-01  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR rtl-optimization/89865
! 	* ira-costs.c (process_bb_node_for_hard_reg_moves): Skip hard
! 	register if it is a part of small class.
  
! 2019-04-01  Andrey Belevantsev  <abel@ispras.ru>
  
! 	PR rtl-optimization/87273
! 	* sel-sched-ir.c (merge_fences): Remove assert.
  
! 2019-04-01  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/46590
! 	* domwalk.h (dom_walker::dom_walker): Consolidate constructors.
! 	(dom_walker::m_reachability): Add in place of...
! 	(dom_walker::m_skip_unreachable_blocks): ...this.
! 	* domwalk.c (dom_walker::dom_walker): Consoliate constructors.
! 	Move complex initialization ...
! 	(dom_walker::walk): Here.  Especially compute m_bb_to_rpo
! 	lazily and initialize edge flags on each invocation.
! 	(dom_walker::bb_reachable): Use m_reachability.
  
! 2019-04-01  Martin Liska  <mliska@suse.cz>
  
! 	PR driver/89861
! 	* opt-suggestions.c (option_proposer::build_option_suggestions):
! 	Add variant without any argument in order to provide better
! 	hints.
  
! 2019-04-01  Richard Biener  <rguenther@suse.de>
  
! 	PR c/71598
! 	* gimple.c: Include langhooks.h.
! 	(gimple_get_alias_set): Treat enumeral types as the underlying
! 	integer type.
  
! 2019-03-29  Kugan Vivekanandarajah  <kuganv@linaro.org>
! 	    Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR rtl-optimization/89862
! 	* rtl.h (word_register_operation_p): Exclude CONST_INT from operations
! 	that operates on the full registers for WORD_REGISTER_OPERATIONS
! 	architectures.
  
! 2019-03-29  Jim Wilson  <jimw@sifive.com>
  
! 	* common/config/riscv/riscv-common.c (riscv_parse_arch_string):
! 	Clear MASK_RVC and then set if C subset supported.
  
! 2019-03-29  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c/89872
! 	* gimplify.c (gimplify_compound_literal_expr): Don't optimize a
! 	non-addressable complit into its initializer if it is volatile.
  
! 2019-03-29  Roman Zhuykov  <zhroma@ispras.ru>
  
! 	* opts-common.c (integral_argument): Set errno properly in one case.
  
! 2019-03-29  Martin Liska  <mliska@suse.cz>
  
! 	* doc/invoke.texi: Remove -Wchkp from documentation.
  
! 2019-03-29  Martin Liska  <mliska@suse.cz>
  
! 	* dbgcnt.c (print_limit_reach): New function.
! 	(dbg_cnt): Use it.
  
! 2019-03-29  Martin Liska  <mliska@suse.cz>
  
! 	* dbgcnt.c (dbg_cnt_process_single_pair): Fix GNU coding style.
! 	(dbg_cnt_process_opt): Parse first tokens aas
! 	dbg_cnt_process_single_pair is also using strtok.
  
! 2019-03-29  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/87485
! 	* function.c (expand_function_end): Move stack_protect_epilogue
! 	before loading of return value into hard register(s).
  
! 2019-03-28  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/89621
! 	* tree-inline.h (struct copy_body_data): Add
! 	dont_remap_vla_if_no_change flag.
! 	* tree-inline.c (remap_type_3, remap_type_2): New functions.
! 	(remap_type): Don't remap vla types if id->dont_remap_vla_if_no_change
! 	and remap_type_2 returns false.
! 	* omp-low.c (new_omp_context): Set ctx->cb.dont_remap_vla_if_no_change.
! 	Move ctx->cb.adjust_array_error_bounds setting to the outermost ctx
! 	only from where it is copied to nested contexts.
  
! 2019-03-28  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/89865
! 	* config/i386/i386.md (RMW operation with LEA peephole):
! 	Use LEAMODE mode attribute instead of SWI mode iterator for
! 	LEA pattern.
  
! 2019-03-28  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/89848
! 	* config/i386/i386.c (dimode_scalar_chain::make_vector_copies):
! 	Also process XEXP (src, 0) of a shift insn.
  
! 2019-03-28  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR middle-end/89725
! 	* optinfo-emit-json.cc (optrecord_json_writer::optinfo_to_json):
! 	Use DECL_ASSEMBLER_NAME rather than get_fnname_from_decl.
  
! 2019-03-28  Jakub Jelinek  <jakub@redhat.com>
  
! 	* regcprop.c (copyprop_hardreg_forward_1): Remove redundant INSN_P
! 	test.
! 	(cprop_hardreg_bb, cprop_hardreg_debug): New functions.
! 	(pass_cprop_hardreg::execute): Use those.  Don't repeat bb processing
! 	immediately after first one with df_analyze in between, but rather
! 	process all bbs, queueing ones that need second pass in a worklist,
! 	df_analyze, process queued debug insn changes and if second pass is
! 	needed, process bbs from worklist, df_analyze, process queued debug
! 	insns again.
  
! 	* rtl.h (NONDEBUG_INSN_P): Define as NONJUMP_INSN_P or JUMP_P
! 	or CALL_P instead of INSN_P && !DEBUG_INSN_P.
! 	(INSN_P): Define using NONDEBUG_INSN_P or DEBUG_INSN_P.
  
! 2019-03-28  Jonathan Wakely  <jwakely@redhat.com>
  
! 	PR c/79022
! 	* gengtype.h (create_nested_ptr_option): Fix parameter names to match
! 	definition.
  
! 2019-03-27  Mateusz B  <mateuszb@poczta.onet.pl>
  
! 	PR target/85667
! 	* config/i386/i386.c (ix86_function_value_1): Call the newly added
! 	function for 32-bit MS_ABI.
! 	(function_value_ms_32): New function.
  
! 2019-03-27  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn.md (CC_SAVE_REG): New constant.
! 	(movdi): Call gen_movdi_symbol_save_scc.
! 	(gen_movdi_symbol_save_scc): New insn and split.
  
! 2019-03-27  Peter Bergner  <bergner@linux.ibm.com>
  
! 	PR rtl-optimization/89313
! 	* function.c (matching_constraint_num): New static function.
! 	(match_asm_constraints_1): Use it.  Fixup white space and comment.
! 	Don't replace inputs with non-matching constraints which conflict
! 	with early clobber outputs.
  
! 2019-03-27  Jeff Law  <law@redhat.com>
  
  
! 	PR rtl-optimization/87761
! 	PR rtl-optimization/89826
! 	* regcprop.c (copyprop_hardreg_forward_1): Move may_trap_p test
! 	slightly later.
! 	(pass_cprop_hardreg::execute): Call df_analyze after adding the
! 	note problem to get REG_DEAD/REG_UNUSED notes updated.
  
! 2019-03-27  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/89463
! 	* tree-ssa-dce.c (remove_dead_stmt): Take output vector to
! 	queue edges to remove.
! 	(eliminate_unnecessary_stmts): Remove dead PHIs alongside
! 	dead stmts.  Delay edge removal until PHIs are removed to
! 	make debug-stmt creation not confused by seemingly degenerate
! 	PHIs.
  
! 2019-03-27  Alan Modra  <amodra@gmail.com>
  
! 	* config/rs6000/rs6000.h: Rename NON_SPECIAL_REGS to GEN_OR_FLOAT_REGS
! 	throughout file.
! 	* config/rs6000/darwin.h: Likewise.
! 	* config/rs6000/rs6000.c: Likewise.
  
! 2019-03-27  Alan Modra  <amodra@gmail.com>
  
! 	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Always
! 	assign rs6000_hard_regno_mode_ok_p[m][r].  Formatting.
  
! 2019-03-26  Andrew Waterman  <andrew@sifive.com>
! 	    Jim Wilson  <jimw@sifive.com>
  
! 	* config/riscv/generic.md (generic_alu, generic_load, generic_store)
! 	(generic_xfer, generic_branch, generic_imul, generic_idivsi)
! 	(generic_idivdi, generic_fmul_single, generic_fmul_double)
! 	(generic_fdiv, generic_fsqrt): Add check for generic tune.
! 	(generic_alu): Add auipc to type list.
! 	* config/riscv/riscv-opts.h (enum riscv_microarchitecture_type): New.
! 	(riscv_microarchitecture): Declare.
! 	* config/riscv/riscv-protos.h (riscv_store_data_bypass_p): Declare.
! 	* config/riscv/riscv.c (struct riscv_cpu_info): Add microarchitecture
! 	field.
! 	(riscv_microarchitecture): New.
! 	(sifive_7_tune_info): New.
! 	(riscv_cpu_info_table): Add microarchitecture value for rocket and
! 	size.  Add sifive-3-series, sifive-5-series, and sifive-7-series
! 	entries.
! 	(riscv_store_data_bypass_p): New.
! 	(riscv_option_override): Set riscv_microarchitecture from
! 	cpu->microarchitecture.
! 	* config/riscv/riscv.md: Include sifive-7.md.
! 	(type): Add auipc.
! 	(tune): New.
! 	(auipc<mode>): Change type to auipc.
! 	(restore_stack_nonlocal): New.
! 	* config/riscv/sifive-7.md: New.
! 	* doc/invoke.texi (RISC-V Options): Update mtune docs.
  
! 2019-03-26  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/89827
! 	* config/i386/i386.c (dimode_scalar_chain::convert_reg):
! 	Also process XEXP (src, 0) of a shift insn.
  
! 2019-03-26  Richard Biener  <rguenther@suse.de>
  
! 	* tree-inline.c (remap_gimple_stmt): Cache gimple_block.
! 	(copy_debug_stmt): Likewise.
! 	(expand_call_inline): Likewise.
! 	(copy_bb): Avoid redundant lookup & set of gimple_block.
! 	* gimple-low.c (lower_gimple_return): Likewise.
! 	(lower_builtin_setjmp): Likewise.
  
! 2019-03-26  Jakub Jelinek  <jakub@redhat.com>
  
! 	* hash-table.h (hash_table::m_gather_mem_stats): If GATHER_STATISTICS
! 	is constant 0, turn into static const data member initialized to false.
! 	(hash_table::hash_table): Only initialize m_gather_mem_stats #if
! 	GATHER_STATISTICS.  Add ATTRIBUTE_UNUSED to gather_mem_stats param.
  
! 2019-03-26  Jason Merrill  <jason@redhat.com>
! 	    Jakub Jelinek  <jakub@redhat.com>
  
! 	* mem-stats.h (mem_alloc_description::unregister_descriptor): New
! 	method.
! 	(mem_alloc_description::release_object_overhead): Fix comment typos.
! 	* hash-table.h (hash_table::~hash_table): Call
! 	release_instance_overhead only if m_entries is non-NULL, otherwise
! 	call unregister_descriptor.
  
! 2019-03-26  Bin Cheng  <bin.cheng@linux.alibaba.com>
  
! 	PR tree-optimization/81740
! 	* tree-vect-data-refs.c (vect_analyze_data_ref_dependence):
! 	In case of outer loop vectorization, check for backward dependence
! 	at the inner loop if outer loop dependence is reversed.
  
! 2019-03-26  Alan Modra  <amodra@gmail.com>
  
! 	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Correct
! 	rs6000_vector_mem init.  Correct wI and wJ comment.
  
! 2019-03-25  Alexander Monakov  <amonakov@ispras.ru>
  
! 	PR rtl-optimization/88347
! 	PR rtl-optimization/88423
! 	* sched-deps.c (sched_analyze_insn): Take into account that for
! 	tablejumps the barrier appears after a label and a jump_table_data.
  
! 2019-03-25  Martin Sebor  <msebor@redhat.com>
  
! 	PR c/89812
! 	* c-common.c (check_user_alignment): Rename local.  Correct maximum
! 	alignment in diagnostic.  Avoid assuming argument fits in SHWI,
! 	convert it to UHWI when it fits.
  
! 2019-03-25  Johan Karlsson <johan.karlsson@enea.com>
  
! 	PR debug/86964
! 	* dwarf2out.c (premark_used_variables): New function.
! 	(prune_unused_types_walk): Do not mark not premarked external
! 	variables.
! 	(prune_unused_types): Call premark_used_variables.
  
! 2019-03-25  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR rtl-optimization/89676
! 	* lra-constraints.c (curr_insn_transform): Do match reload for
! 	early clobbers when the match was successful only for different
  	registers.
  
! 2019-03-25  Martin Sebor  <msebor@redhat.com>
! 
! 	* doc/extend.texi (Common Type Attributes): Document vector_size.
! 	(Common Variable Attributes): Mention size constraint.  Correct
! 	quoting and typos.
! 	(Vector Extensions): Use @dfn when defining bas type.  Clarify
! 	base type and size constraints.
! 
! 2019-03-25  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/89789
! 	* tree-ssa-sccvn.c (set_ssa_val_to): Do not allow lattice
! 	changes from non-undefined back to undefined.
! 
! 2019-03-25  Thomas Otto  <thomas.otto@pdv-fs.de>
! 
! 	* dwarf2out.c (comp_dir_string): cached_wd could be set to both a
! 	heap string and a gc string, but since this variable is unknown to
! 	ggc the gc string might get reused and corrupted. Fixed by always
! 	using a heap string.
! 
! 2019-03-25  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/89779
! 	* tree-ssa-loop-ivopts.c (remove_unused_ivs): Return
! 	to remove IV defs, delay actual removal.
! 	(tree_ssa_iv_optimize_loop): Likewise.  Avoid SCEV reset.
! 	(tree_ssa_iv_optimize): Remove eliminated IV defs at the
! 	very end, properly also reset loop control IV information.
! 
! 2019-03-25  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/89802
! 	* tree-ssa-math-opts.c (convert_mult_to_fma_1): Properly
! 	move EH data to folded stmt.
! 
! 2019-03-25  Andreas Krebbel  <krebbel@linux.ibm.com>
! 
! 	* config/s390/s390-builtin-types.def: Remove few unused types and
! 	fix sort order for others.
! 
! 2019-03-25  Andreas Krebbel  <krebbel@linux.ibm.com>
! 
! 	* config/s390/s390-c.c (s390_fn_types_compatible): Print the
! 	expected and found types with -mdebug during builtin matching.
! 
! 2019-03-25  Richard Biener  <rguenther@suse.de>
! 
! 	PR middle-end/89790
! 	* fold-const.c (operand_equal_p): Revert last change with
! 	updated comment.
! 
! 2019-03-24  Segher Boessenkool  <segher@kernel.crashing.org>
! 
! 	* config/rs6000/rs6000.c (rs6000_legitimize_tls_address): Add REG_EQUAL
! 	notes for the result of the __tls_get_addr calls.
! 	* config/rs6000/rs6000.md (unspec UNSPEC_TLS_GET_ADDR): New.
! 
! 2019-03-24  Jeff Law  <law@redhat.com>
! 
! 	* config/bfin/bfin.md (movpdi): Fix length for alternative 1.
! 
! 	PR rtl-optimization/87761
! 	* regcprop.c (copyprop_hardreg_forward_1): Check may_trap_p on SET,
! 	not INSN.  Also check RTX_FRAME_RELATED_P.  Queue insns for DF rescan
! 	as needed.
! 	(pass_cprop_hardreg::execute): Add df note problem and defer insn
! 	rescans.  Reprocess blocks as needed, calling df_analyze before
! 	reprocessing.  Always call df_analyze before fixing up debug bind
! 	insns.
! 
! 2019-03-23  Segher Boessenkool  <segher@kernel.crashing.org>
! 
! 	* config/rs6000/xmmintrin.h (_mm_movemask_pi8): Implement for 32-bit
! 	big endian.
! 
! 2019-03-22  Andrew Pinski  <apinski@marvell.com>
! 
! 	* config/aarch64/aarch64.md (zero_extendsidi2_aarch64): Fix type
! 	attrribute for uxtw.
! 
! 2019-03-26  Jeff Law  <law@redhat.com>
! 
! 	PR rtl-optimization/87761
! 	* config/mips/mips-protos.h (mips_split_move): Add new argument.
! 	(mips_emit_move_or_split): Pass NULL for INSN into mips_split_move.
! 	(mips_split_move): Accept new INSN argument.  Try to forward SRC
! 	into the next instruction.
! 	(mips_split_move_insn): Pass INSN through to mips_split_move.
! 
! 2019-03-22  Vladimir Makarov  <vmakarov@redhat.com>
! 
! 	PR rtl-optimization/89676
! 	* lra-constraints.c (curr_insn_transform): Do match reload for
! 	early clobbers even if the match was successful.
! 
! 2019-03-22  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c++/87481
! 	* doc/invoke.texi (-fconstexpr-ops-limit=): Document.
! 
! 2019-03-22  Bill Schmidt  <wschmidt@linux.ibm.com>
! 
! 	* config/rs6000/mmintrin.h (_mm_sub_pi32): Fix typo.
! 
! 2019-03-22  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* config/i386/sse.md (<avx512>_fmadd_<mode>_mask3<round_name>,
! 	<avx512>_fmsub_<mode>_mask3<round_name>,
! 	<avx512>_fnmadd_<mode>_mask3<round_name>,
! 	<avx512>_fnmsub_<mode>_mask3<round_name>,
! 	avx512f_vmfmadd_<mode>_mask3<round_name>,
! 	avx512f_vmfmsub_<mode>_mask3<round_name>,
! 	*avx512f_vmfnmadd_<mode>_mask3<round_name>): Use <round_nimm_predicate>
! 	instead of register_operand and %v instead of v for match_operand 1.
! 	(avx512f_vmfnmsub_<mode>_mask3<round_name>): Rename to ...
! 	(*avx512f_vmfnmsub_<mode>_mask3<round_name>): ... this.  Use
! 	<round_nimm_predicate> instead of register_operand and %v instead of v
! 	for match_operand 1.
! 
! 	* config/i386/sse.md (<avx512>_fmadd_<mode>_mask<round_name>,
! 	<avx512>_fmadd_<mode>_mask3<round_name>,
! 	<avx512>_fmsub_<mode>_mask<round_name>,
! 	<avx512>_fmsub_<mode>_mask3<round_name>,
! 	<avx512>_fnmadd_<mode>_mask<round_name>,
! 	<avx512>_fnmadd_<mode>_mask3<round_name>,
! 	<avx512>_fnmsub_<mode>_mask<round_name>,
! 	<avx512>_fnmsub_<mode>_mask3<round_name>,
! 	<avx512>_fmaddsub_<mode>_mask<round_name>,
! 	<avx512>_fmaddsub_<mode>_mask3<round_name>,
! 	<avx512>_fmsubadd_<mode>_mask<round_name>,
! 	<avx512>_fmsubadd_<mode>_mask3<round_name>): Use
! 	<round_nimm_predicate> instead of nonimmediate_operand.
! 	(fmai_vmfmadd_<mode><round_name>, fmai_vmfmsub_<mode><round_name>,
! 	fmai_vmfnmadd_<mode><round_name>, fmai_vmfnmsub_<mode><round_name>):
! 	Use register_operand instead of <round_nimm_predicate> for the
! 	operand that needs to match output.
! 	(*fmai_fmadd_<mode>, *fmai_fmsub_<mode>,
! 	*fmai_fnmadd_<mode><round_name>, *fmai_fnmsub_<mode><round_name>):
! 	Likewise.  Formatting fixes.
! 
! 	PR target/89784
! 	* config/i386/i386.c (enum ix86_builtins): Remove
! 	IX86_BUILTIN_VFMSUBSD3_MASK3 and IX86_BUILTIN_VFMSUBSS3_MASK3.
! 	* config/i386/i386-builtin.def (__builtin_ia32_vfmaddsd3_mask,
! 	__builtin_ia32_vfmaddsd3_mask3, __builtin_ia32_vfmaddsd3_maskz,
! 	__builtin_ia32_vfmsubsd3_mask3, __builtin_ia32_vfmaddss3_mask,
! 	__builtin_ia32_vfmaddss3_mask3, __builtin_ia32_vfmaddss3_maskz,
! 	__builtin_ia32_vfmsubss3_mask3): New builtins.
! 	* config/i386/sse.md (avx512f_vmfmadd_<mode>_mask<round_name>,
! 	avx512f_vmfmadd_<mode>_mask3<round_name>,
! 	avx512f_vmfmadd_<mode>_maskz_1<round_name>,
! 	*avx512f_vmfmsub_<mode>_mask<round_name>,
! 	avx512f_vmfmsub_<mode>_mask3<round_name>,
! 	*avx512f_vmfmasub_<mode>_maskz_1<round_name>,
! 	*avx512f_vmfnmadd_<mode>_mask<round_name>,
! 	*avx512f_vmfnmadd_<mode>_mask3<round_name>,
! 	*avx512f_vmfnmadd_<mode>_maskz_1<round_name>,
! 	*avx512f_vmfnmsub_<mode>_mask<round_name>,
! 	avx512f_vmfnmsub_<mode>_mask3<round_name>,
! 	*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): New define_insns.
! 	(avx512f_vmfmadd_<mode>_maskz<round_expand_name>): New define_expand.
! 	* config/i386/avx512fintrin.h (_mm_mask_fmadd_sd, _mm_mask_fmadd_ss,
! 	_mm_mask3_fmadd_sd, _mm_mask3_fmadd_ss, _mm_maskz_fmadd_sd,
! 	_mm_maskz_fmadd_ss, _mm_mask_fmsub_sd, _mm_mask_fmsub_ss,
! 	_mm_mask3_fmsub_sd, _mm_mask3_fmsub_ss, _mm_maskz_fmsub_sd,
! 	_mm_maskz_fmsub_ss, _mm_mask_fnmadd_sd, _mm_mask_fnmadd_ss,
! 	_mm_mask3_fnmadd_sd, _mm_mask3_fnmadd_ss, _mm_maskz_fnmadd_sd,
! 	_mm_maskz_fnmadd_ss, _mm_mask_fnmsub_sd, _mm_mask_fnmsub_ss,
! 	_mm_mask3_fnmsub_sd, _mm_mask3_fnmsub_ss, _mm_maskz_fnmsub_sd,
! 	_mm_maskz_fnmsub_ss, _mm_mask_fmadd_round_sd, _mm_mask_fmadd_round_ss,
! 	_mm_mask3_fmadd_round_sd, _mm_mask3_fmadd_round_ss,
! 	_mm_maskz_fmadd_round_sd, _mm_maskz_fmadd_round_ss,
! 	_mm_mask_fmsub_round_sd, _mm_mask_fmsub_round_ss,
! 	_mm_mask3_fmsub_round_sd, _mm_mask3_fmsub_round_ss,
! 	_mm_maskz_fmsub_round_sd, _mm_maskz_fmsub_round_ss,
! 	_mm_mask_fnmadd_round_sd, _mm_mask_fnmadd_round_ss,
! 	_mm_mask3_fnmadd_round_sd, _mm_mask3_fnmadd_round_ss,
! 	_mm_maskz_fnmadd_round_sd, _mm_maskz_fnmadd_round_ss,
! 	_mm_mask_fnmsub_round_sd, _mm_mask_fnmsub_round_ss,
! 	_mm_mask3_fnmsub_round_sd, _mm_mask3_fnmsub_round_ss,
! 	_mm_maskz_fnmsub_round_sd, _mm_maskz_fnmsub_round_ss): New intrinsics.
! 
! 2019-03-21  Martin Sebor  <msebor@redhat.com>
! 
! 	PR tree-optimization/89350
! 	* builtins.c (compute_objsize): Also ignore offsets whose upper
! 	bound is negative.
! 	* gimple-ssa-warn-restrict.c (builtin_memref): Add new member.
! 	(builtin_memref::builtin_memref): Initialize new member.
! 	Allow EXPR to be null.
! 	(builtin_memref::extend_offset_range): Replace local with a member.
! 	Avoid assuming pointer offsets are unsigned.
! 	(builtin_memref::set_base_and_offset): Determine base object
! 	before computing offset range.
! 	(builtin_access::builtin_access): Handle memset.
! 	(builtin_access::generic_overlap): Replace local with a member.
! 	(builtin_access::strcat_overlap): Same.
! 	(builtin_access::overlap): Same.
! 	(maybe_diag_overlap): Same.
! 	(maybe_diag_access_bounds): Same.
! 	(wrestrict_dom_walker::check_call): Handle memset.
! 	(check_bounds_or_overlap): Same.
! 
! 2019-03-21  Jan Hubicka  <hubicka@ucw.cz>
! 	    Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR lto/89692
! 	* tree.c (fld_type_variant, fld_incomplete_type_of,
! 	fld_process_array_type): Call fld->pset.add and don't call
! 	add_tree_to_fld_list if it returns true.
! 	(free_lang_data_in_type): Similarly with self-recursive call.  Purge
! 	non-marked types from TYPE_NEXT_VARIANT list.
! 	(find_decls_types_r): Call fld_worklist_push for TYPE_CANONICAL (t).
! 
! 2019-03-21  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* hash-table.h (hash_table): Add Lazy template parameter defaulted
! 	to false, if true, don't alloc_entries during construction, but defer
! 	it to the first method that needs m_entries allocated.
! 	(hash_table::hash_table, hash_table::~hash_table,
! 	hash_table::alloc_entries, hash_table::find_empty_slot_for_expand,
! 	hash_table::too_empty_p, hash_table::expand, hash_table::empty_slow,
! 	hash_table::clear_slot, hash_table::traverse_noresize,
! 	hash_table::traverse, hash_table::iterator::slide): Adjust all methods.
! 	* hash-set.h (hash_set): Add Lazy template parameter defaulted to
! 	false.
! 	(hash_set::contains): If Lazy is true, use find_slot_with_hash with
! 	NO_INSERT instead of find_with_hash.
! 	(hash_set::traverse, hash_set::iterator, hash_set::iterator::m_iter,
! 	hash_set::m_table): Add Lazy to template params of hash_table.
! 	(gt_ggc_mx, gt_pch_nx): Use false as Lazy in hash_set template param.
! 	* attribs.c (test_attribute_exclusions): Likewise.
! 	* hash-set-tests.c (test_set_of_strings): Add iterator tests for
! 	hash_set.  Add tests for hash_set with Lazy = true.
! 
! 2019-03-21  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/89779
! 	* tree.c (tree_nop_conversion): Consolidate and fix defensive
! 	checks with respect to released SSA names now having error_mark_node
! 	type.
! 	* fold-const.c (operand_equal_p): Likewise.
! 
! 2019-03-20  Andreas Krebbel  <krebbel@linux.ibm.com>
! 
! 	PR target/89775
! 	* config/s390/s390.c (global_not_special_regno_p): Move to make it
! 	available to ...
! 	(s390_optimize_register_info): Use global_not_special_regno_p to
! 	check for global regs.
! 
! 2019-03-20  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/89752
! 	* lra-constraints.c (process_alt_operands) <reg>: For BLKmode, don't
! 	update this_alternative nor this_alternative_set.
! 
! 2019-03-19  Jim Wilson  <jimw@sifive.com>
! 
! 	PR target/89411
! 	* config/riscv/riscv.c (riscv_valid_lo_sum_p): New arg x.  New locals
! 	align, size, offset.  Use them to handle a BLKmode reference.  Update
! 	comment.
! 	(riscv_classify_address): Pass info->offset to riscv_valid_lo_sum_p.
! 
! 2019-03-19  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR rtl-optimization/89768
! 	* loop-unroll.c (unroll_loop_constant_iterations): Use gen_int_mode
! 	instead of GEN_INT.
! 	(unroll_loop_runtime_iterations): Likewise.
  
! 2019-03-19  Martin Sebor  <msebor@redhat.com>
  
! 	PR tree-optimization/89644
! 	* tree-ssa-strlen.c (handle_builtin_stxncpy): Use full_string_p
! 	rather than endptr as an indicator of nul-termination.
  
! 	PR tree-optimization/89644
! 	* tree-ssa-strlen.c (handle_builtin_stxncpy): Consider unterminated
! 	arrays in determining sequence sizes in strncpy and stpncpy.
  
! 2019-03-19  Martin Liska  <mliska@suse.cz>
  
! 	PR middle-end/89737
! 	* predict.c (combine_predictions_for_bb): Empty likely_edges and
! 	unlikely_edges if there's an edge that belongs to both these sets.
  
! 2018-03-19  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	PR target/89746
! 	* config/rs6000/rs6000.md (fix_trunc<mode>si2_stfiwx): If we have a
! 	non-TARGET_MFCRF target, and the dest is memory but not 32-bit aligned,
! 	go via a stack temporary.
  
! 2019-03-19  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/89378
! 	* config/mips/mips.c (mips_expand_vec_cond_expr): Use gen_lowpart
! 	instead of gen_rtx_SUBREG.
! 	* config/mips/mips-msa.md (vec_extract<mode><unitmode>): Likewise.
  
! 2019-03-19  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/88389
! 	* opts.c (finish_options): Disable -gsplit-dwarf when doing LTO.
  
! 2019-03-19  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR lto/87809
! 	PR lto/89335
! 	* tree.c (free_lang_data_in_decl): Do not free context of C++
! 	destrutors.
  
! 2019-03-19  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/89506
! 	* config/arm/arm.md (cmpsi2_addneg): Swap the alternatives and use
! 	subs for the first alternative except when operands[3] is 1.
  
! 	PR target/89752
! 	* gimplify.c (gimplify_asm_expr): For output argument with
! 	TREE_ADDRESSABLE type, clear allows_reg if it allows memory, otherwise
! 	diagnose error.
  
! 2019-03-19  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR rtl-optimization/89753
! 	* loop-unroll.c (decide_unroll_constant_iterations): Make guard for
! 	explicit unrolling factor even more robust.
  
! 2019-03-19  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/89726
! 	* config/i386/i386.c (ix86_expand_floorceildf_32): In ceil
! 	compensation use x2 += 1 instead of x2 -= -1 and when honoring
! 	signed zeros, do another copysign after the compensation.
  
! 2019-03-18  Martin Sebor  <msebor@redhat.com>
  
! 	PR tree-optimization/89720
! 	* tree-vrp.c (vrp_prop::check_mem_ref): Treat range with max < min
! 	more conservatively, the same as anti-range.
  
! 2019-03-18  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/88945
! 	* tree-ssanames.c (release_ssa_name_fn): For released SSA names
! 	use a TREE_TYPE of error_mark_node to avoid ICEs when dumping
! 	basic-blocks that are removed.  Remove restoring SSA_NAME_VAR.
! 	* tree-outof-ssa.c (eliminate_useless_phis): Remove redundant checking.
  
! 2019-03-18  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-run.c (struct output): Make next_output unsigned.
! 	Extend queue to 1024 entries.
! 	Add "consumed" field.
! 	(gomp_print_output): Remove print_index parameter.
! 	Add final parameter.
! 	Change limit to unsigned.
! 	Use consumed field to implement circular buffer.
! 	Detect interrupted print in final pass.
! 	Flush output at the end.
! 	(run): Update gomp_print_output usage.
! 	(main): Initialize kernargs->output_data.consumed.
  
! 2019-03-18  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* tree-vect-loop.c (vect_estimate_min_profitable_iters): Fix the
! 	calculation of the minimum number of scalar iterations for
! 	fully-predicated loops.
  
! 2019-03-18  Martin Jambor  <mjambor@suse.cz>
  
! 	PR tree-optimization/89546
! 	* tree-sra.c (propagate_subaccesses_across_link): Requeue new_acc if
! 	any propagation to its children took place.
  
! 2019-03-18  Andrew Burgess  <andrew.burgess@embecosm.com>
  
! 	PR target/89627
! 	* config/riscv/riscv.c (riscv_pass_fpr_single): Add offset
! 	parameter, and make use of it.
! 	(riscv_get_arg_info): Pass offset to riscv_pass_fpr_single.
  
! 2019-03-18  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.opt (mcode-density-frame): Get the inital value
! 	from TARGET_CODE_DENSITY_FRAME_DEFAULT.
! 	* config/arc/elf.h (TARGET_CODE_DENSITY_FRAME_DEFAULT): Define.
! 	* config/arc/linux.h (TARGET_CODE_DENSITY_FRAME_DEFAULT): Define.
! 	* config/arc/arc.md (pop_multi_fp_blink): Adjust constraints to
! 	match what the ops is doing.
! 	(push_multi_fp_blink): Likewise.
! 	* config/arc/arc.c (arc_override_options): Enable enter/leave when
! 	compiling for size and elf target.
! 	(arc_save_callee_enter): Adjust note to match what enter/leave
! 	operation does.
  
! 2019-03-18  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.md (tst_movb): Fix constraint.
  
! 2019-03-18  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define.
  
! 2019-03-18  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc-protos.h (arc_adjust_reg_alloc_order): Declare.
! 	* config/arc/arc.c (arc_conditional_register_usage): Remove all
! 	reg_alloc_order references.
! 	(size_alloc_order): Define.
! 	(arc_adjust_reg_alloc_order): New function.
! 	* config/arc/arc.h (REG_ALLOC_ORDER): Proper define the register
! 	order.
! 	(ADJUST_REG_ALLOC_ORDER): Define.
! 	(HONOR_REG_ALLOC_ORDER): Likewise.
  
! 2019-03-18  Richard Biener  <rguenther@suse.de>
  
! 	PR target/87561
! 	* config/i386/i386.c (ix86_add_stmt_cost): Pessimize strided
! 	loads and stores a bit more.
  
! 2019-03-18  Richard Biener  <rguenther@suse.de>
  
! 	PR target/87561
! 	* config/i386/i386.c (ix86_add_stmt_cost): Apply strided
! 	load pessimization to stores as well.
  
! 2019-03-18  Andrey Belevantsev  <abel@ispras.ru>
  
! 	PR middle-end/86979
! 	* sel-sched.c (compute_av_set_at_bb_end): When we have an ineligible
! 	successor, use NULL as its av set.
  
! 2019-03-15  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	PR rtl-optimization/89721
! 	* lra-constraints (invariant_p): Return false if side_effects_p holds.
  
! 2019-03-15  Kelvin Nilsen  <kelvin@gcc.gnu.org>
  
! 	PR target/87532
! 	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
! 	When handling vec_extract, use modular arithmetic to allow
! 	constant selectors greater than vector length.
! 	* config/rs6000/rs6000.c (rs6000_expand_vector_extract): Allow
! 	V1TImode vectors to have constant selector values greater than 0.
! 	Use modular arithmetic to compute vector index.
! 	(rs6000_split_vec_extract_var): Use modular arithmetic to compute
! 	index for in-memory vectors.  Correct code generation for
! 	in-register vectors.
! 	(altivec_expand_vec_ext_builtin): Use modular arithmetic to
! 	compute index.
  
! 2019-03-15  Alexandre Oliva <aoliva@redhat.com>
  
! 	PR c++/88534
! 	PR c++/88537
! 	* dwarf2out.c (generic_parameter_die): Follow DECL_INITIAL of
! 	VAR_DECL args.
  
! 2019-03-15  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c++/89709
! 	* tree.c (inchash::add_expr): Strip any location wrappers.
! 	* fold-const.c (operand_equal_p): Move stripping of location wrapper
! 	after hash verification.
  
! 	PR debug/89704
! 	* dwarf2out.c (add_const_value_attribute): Return false for MINUS,
! 	SIGN_EXTEND and ZERO_EXTEND.
  
! 2019-03-14  Jason Merrill  <jason@redhat.com>
  	    Jakub Jelinek  <jakub@redhat.com>
  
! 	* hash-table.h (remove_elt_with_hash): Return if slot is NULL rather
! 	than if is_empty (*slot).
! 	* hash-set-tests.c (test_set_of_strings): Add tests for addition of
! 	existing elt and for elt removal.
! 	* hash-map-tests.c (test_map_of_strings_to_int): Add test for removal
! 	of already removed elt.
! 
! 2019-03-15  H.J. Lu  <hongjiu.lu@intel.com>
! 
! 	PR target/89650
! 	* config/i386/i386.c (remove_partial_avx_dependency): Handle
! 	REG_EH_REGION note.
! 
! 2019-03-14  Martin Liska  <mliska@suse.cz>
! 
! 	PR other/89712
! 	* doc/invoke.texi: Remove -fdump-class-hierarchy option.
! 
! 2019-03-14  Richard Biener  <rguenther@suse.de>
! 
! 	PR target/89711
! 	* config/i386/i386.c (make_resolver_func): Properly set
! 	DECL_CONTEXT on the RESULT_DECL.
! 	* config/rs6000/rs6000.c (make_resolver_func): Likewise.
! 
! 2019-03-14  Richard Biener  <rguenther@suse.de>
! 
! 	* gimple-pretty-print.c: Include cfgloop.h.
! 	(dump_gimple_phi): Adjust.
! 	(dump_gimple_bb_header): Dump loop header for GIMPLE.
! 	(pp_cfg_jump): Adjust.
! 	(dump_implicit_edges): Dump fallthru to next block for GIMPLE as well.
! 	* tree-cfg.c (build_gimple_cfg): Remove lower_phi_internal_fn call.
! 	(lower_phi_internal_fn): Remove.
! 	(verify_gimple_call): Remove IFN_PHI special-casing.
! 	(dump_function_to_file): Dump IL state.
! 	* tree-into-ssa.c (rewrite_add_phi_arguments): Revert changes
! 	done to deal with PHI nodes being present in non-SSA state.
! 
! 2019-03-14  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR ipa/89684
! 	* multiple_target.c (create_dispatcher_calls): Change
! 	references_to_redirect from vector of ipa_ref * to vector of ipa_ref.
! 	In the node->iterate_referring loop, push *ref rather than ref, call
! 	ref->remove_reference () and always pass 0 to iterate_referring.
! 
! 	PR rtl-optimization/89679
! 	* expmed.c (expand_mult_const): Don't add a REG_EQUAL note if it
! 	would contain a paradoxical SUBREG.
! 
! 2019-03-14  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/89710
! 	* tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Use
! 	safe_dyn_cast.
! 
! 2019-03-14  Martin Liska  <mliska@suse.cz>
! 
! 	* coverage.c (coverage_begin_function): Stream also
! 	end_column.
! 	* doc/gcov.texi: Document 2 new fields in JSON file.  Improve
! 	documentation about function declaration location.
! 	* gcov-dump.c (tag_function): Print whole range
! 	of function declaration.
! 	* gcov.c (struct function_info): Add end_column field.
! 	(function_info::function_info): Initialize it.
! 	(output_json_intermediate_file): Output {start,end}_column
! 	fields.
! 	(read_graph_file): Read end_column.
! 
! 2019-03-14  Richard Biener  <rguenther@suse.de>
! 
! 	PR middle-end/89698
! 	* fold-const.c (operand_equal_p): For INDIRECT_REF check
! 	that the access types are similar.
! 
! 2019-03-14  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR tree-optimization/89703
! 	* tree-ssa-strlen.c (valid_builtin_call): Punt if stmt call types
! 	aren't compatible also with builtin_decl_explicit.  Check pure
! 	or non-pure status of BUILT_IN_STR{{,N}CMP,N{LEN,{CAT,CPY}{,_CHK}}}
! 	and BUILT_IN_STPNCPY{,_CHK}.
! 
! 2019-03-14  H.J. Lu  <hongjiu.lu@intel.com>
! 
! 	PR target/89523
! 	* config/i386/i386.c (ix86_print_operand): Handle 'M' to add
! 	addr32 prefix to VSIB address for X32.
! 	* config/i386/sse.md (*avx512pf_gatherpf<mode>sf_mask): Prepend
! 	"%M2" to opcode.
! 	(*avx512pf_gatherpf<mode>df_mask): Likewise.
! 	(*avx512pf_scatterpf<mode>sf_mask): Likewise.
! 	(*avx512pf_scatterpf<mode>df_mask): Likewise.
! 	(*avx2_gathersi<mode>): Prepend "%M3" to opcode.
! 	(*avx2_gathersi<mode>_2): Prepend "%M2" to opcode.
! 	(*avx2_gatherdi<mode>): Prepend "%M3" to opcode.
! 	(*avx2_gatherdi<mode>_2): Prepend "%M2" to opcode.
! 	(*avx2_gatherdi<mode>_3): Prepend "%M3" to opcode.
! 	(*avx2_gatherdi<mode>_4): Prepend "%M2" to opcode.`
! 	(*avx512f_gathersi<mode>): Prepend "%M4" to opcode.
! 	(*avx512f_gathersi<mode>_2): Prepend "%M3" to opcode.
! 	(*avx512f_gatherdi<mode>): Prepend "%M4" to opcode.
! 	(*avx512f_gatherdi<mode>_2): Prepend "%M3" to opcode.
! 	(*avx512f_scattersi<mode>): Prepend "%M0" to opcode.
! 	(*avx512f_scatterdi<mode>): Likewise.
! 
! 2019-03-13  Vladimir Makarov  <vmakarov@redhat.com>
! 
! 	PR target/85860
! 	* lra-constraints.c (inherit_in_ebb): Update
! 	potential_reload_hard_regs along with live_hard_regs.
! 
! 2019-03-13  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR debug/89498
! 	* dwarf2out.c (size_of_die): For dw_val_class_view_list always use
! 	DWARF_OFFSET_SIZE.
! 	(value_format): For dw_val_class_view_list never use DW_FORM_loclistx.
! 
! 2019-03-13  Martin Sebor  <msebor@redhat.com>
! 
! 	PR tree-optimization/89662
! 	* tree-vrp.c (vrp_prop::check_mem_ref): Avoid assuming every type
! 	has a size.
! 
! 2019-03-13  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/89677
! 	* tree-scalar-evolution.c (simplify_peeled_chrec): Do not
! 	throw FP expressions at tree-affine.
  
! 2019-03-14  Richard Biener  <rguenther@suse.de>
  
! 	* tree-pretty-print.c (dump_generic_node): For -gimple properly
! 	dump negative integer constants using _Literal (type) -num.
  
! 2019-03-13  Jakub Jelinek  <jakub@redhat.com>
  
! 	* ipa-param-manipulation.h (struct ipa_parm_adjustment): Remove
! 	nonlocal_value member.
  
! 	PR middle-end/88588
! 	* omp-simd-clone.c (ipa_simd_modify_stmt_ops): Handle PHI args.
! 	(ipa_simd_modify_function_body): Handle PHIs.
  
! 2019-03-12  Robin Dapp  <rdapp@linux.ibm.com>
  
! 	* config/s390/s390.c (s390_option_override_internal): Use more
! 	aggressive inlining parameters.
  
! 2019-03-12  Robin Dapp  <rdapp@linux.ibm.com>
  
! 	* config/s390/3906.md: New file.
! 	* config/s390/s390.c (MAX_SCHED_UNITS): Increase.
! 	(LONGRUNNING_THRESHOLD): Remove.
! 	(MAX_SCHED_MIX_SCORE): Decrease.
! 	(MAX_SCHED_MIX_DISTANCE): Decrease.
! 	(s390_bb_fallthru_entry_likely): Assume fallthru for less than likely.
! 	(struct s390_sched_state): New struct to hold scheduling state.
! 	(S390_SCHED_STATE_NORMAL): Remove.
! 	(S390_SCHED_STATE_CRACKED): Remove.
! 	(S390_SCHED_ATTR_MASK_GROUPOFTWO): Add.
! 	(s390_get_sched_attrmask): Use new attribute.
! 	(s390_get_unit_mask): Use new units.
! 	(s390_is_fpd): New function.
! 	(s390_is_fxd): New function.
! 	(s390_is_longrunning): New function.
! 	(s390_sched_score): Use new functions.
! 	(s390_sched_reorder): Likewise.
! 	(s390_sched_variable_issue): Rework and use new functions.
! 	(s390_sched_init): Use new functions.
! 	* config/s390/s390.h (s390_tune_attr):  Add z14.
! 	* config/s390/s390.md: Add z14.
  
! 2019-03-12  Robin Dapp  <rdapp@linux.ibm.com>
  
! 	* config/s390/2964.md: Update pipeline description.
! 	* config/s390/s390.c (MAX_SCHED_UNITS): Increase.
! 	(LONGRUNNING_THRESHOLD): Remove.
! 	(LATENCY_FACTOR): Remove.
! 	(s390_get_unit_mask): Add unit.
! 	(s390_sched_score): Use fxd/fpd.
! 	(s390_sched_variable_issue): Use fxd/fpd.
  
! 2019-03-12  Martin Liska  <mliska@suse.cz>
  
! 	* config/i386/i386.c: Reword an error message.
  
! 2019-03-12  Martin Jambor  <mjambor@suse.cz>
  
! 	* cgraph.c (cgraph_node::dump): Dump more info for former thunks,
! 	terminate with newline.
  
! 2019-03-12  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/52726
! 	* config/s390/s390.md (tabort): Use %wd instead of
! 	HOST_WIDE_INT_PRINT_DEC in error message, reword to avoid two capital
! 	letters and periods.
! 	* config/tilepro/tilepro.c (tilepro_print_operand): Use %wd in
! 	output_operand_lossage instead of HOST_WIDE_INT_PRINT_DEC, replace
! 	's with %< and %>.
  
! 	PR middle-end/89663
! 	* builtins.c (expand_builtin_int_roundingfn,
! 	expand_builtin_int_roundingfn_2): Return NULL_RTX instead of
! 	gcc_unreachable if validate_arglist fails.
  
! 2019-03-12  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/89664
! 	* tree-ssa-math-opts.c (execute_cse_reciprocals_1): Properly
! 	free the occurance tree after the early out.
  
! 2019-03-11  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/89655
! 	PR bootstrap/89656
! 	* vr-values.c (vr_values::update_value_range): If
! 	old_vr->varying_p (), don't update it, make new_vr also VARYING
! 	and return false.
  
! 2019-03-11  Martin Liska  <mliska@suse.cz>
  
! 	* config/aarch64/aarch64.c (aarch64_override_options_internal):
! 	Fix double string quoting.
  
! 2019-03-11  Martin Liska  <mliska@suse.cz>
  
! 	* collect-utils.c (collect_wait): Wrap apostrophes
! 	in gcc internal format with %'.
! 	* collect2.c (main): Likewise.
! 	(scan_prog_file): Likewise.
! 	(scan_libraries): Likewise.
! 	* config/i386/i386.c (ix86_expand_call): Likewise.
! 	(ix86_handle_interrupt_attribute): Likewise.
! 	* config/nds32/nds32-intrinsic.c (nds32_expand_builtin_impl): Likewise.
! 	* config/nds32/nds32.c (nds32_insert_attributes): Likewise.
! 	* config/rl78/rl78.c (rl78_handle_saddr_attribute): Likewise.
! 	* lto-wrapper.c (find_crtoffloadtable): Likewise.
! 	* symtab.c (symtab_node::verify_base): Likewise.
! 	* tree-cfg.c (verify_gimple_label): Likewise.
! 	* tree.c (verify_type_variant): Likewise.
  
! 2019-03-11  Martin Liska  <mliska@suse.cz>
  
! 	* builtins.c (expand_builtin_thread_pointer): Wrap an option name
! 	in a string format message and fix GNU coding style.
! 	(expand_builtin_set_thread_pointer): Likewise.
! 	* common/config/aarch64/aarch64-common.c
! 	(aarch64_rewrite_selected_cpu): Likewise.
! 	* common/config/alpha/alpha-common.c (alpha_handle_option): Likewise.
! 	* common/config/arc/arc-common.c (arc_handle_option): Likewise.
! 	* common/config/arm/arm-common.c (arm_parse_fpu_option): Likewise.
! 	* common/config/bfin/bfin-common.c (bfin_handle_option): Likewise.
! 	* common/config/i386/i386-common.c (ix86_handle_option): Likewise.
! 	* common/config/ia64/ia64-common.c (ia64_handle_option): Likewise.
! 	* common/config/m68k/m68k-common.c (m68k_handle_option): Likewise.
! 	* common/config/msp430/msp430-common.c (msp430_handle_option): Likewise.
! 	* common/config/nds32/nds32-common.c (nds32_handle_option): Likewise.
! 	* common/config/powerpcspe/powerpcspe-common.c (rs6000_handle_option):
! 	Likewise.
! 	* common/config/riscv/riscv-common.c
! 	(riscv_subset_list::parsing_subset_version): Likewise.
! 	(riscv_subset_list::parse_std_ext): Likewise.
! 	(riscv_subset_list::parse_sv_or_non_std_ext): Likewise.
! 	(riscv_subset_list::parse): Likewise.
! 	* common/config/rs6000/rs6000-common.c (rs6000_handle_option): Likewise.
! 	* config/aarch64/aarch64.c (aarch64_parse_one_option_token): Likewise.
! 	(aarch64_override_options_internal): Likewise.
! 	(aarch64_validate_mcpu): Likewise.
! 	(aarch64_validate_march): Likewise.
! 	(aarch64_validate_mtune): Likewise.
! 	(aarch64_override_options): Likewise.
! 	* config/alpha/alpha.c (alpha_option_override): Likewise.
! 	* config/arc/arc.c (arc_init): Likewise.
! 	(parse_mrgf_banked_regs_option): Likewise.
! 	(arc_override_options): Likewise.
! 	(arc_expand_builtin_aligned): Likewise.
! 	* config/arm/arm-builtins.c (arm_expand_neon_builtin): Likewise.
! 	(arm_expand_builtin): Likewise.
! 	* config/arm/arm.c (arm_option_check_internal): Likewise.
! 	(arm_configure_build_target): Likewise.
! 	(arm_option_override): Likewise.
! 	(arm_options_perform_arch_sanity_checks): Likewise.
! 	(arm_handle_cmse_nonsecure_entry): Likewise.
! 	(arm_handle_cmse_nonsecure_call): Likewise.
! 	(arm_tls_referenced_p): Likewise.
! 	(thumb1_expand_prologue): Likewise.
! 	* config/avr/avr.c (avr_option_override): Likewise.
! 	* config/bfin/bfin.c (bfin_option_override): Likewise.
! 	* config/c6x/c6x.c (c6x_option_override): Likewise.
! 	* config/cr16/cr16.c (cr16_override_options): Likewise.
! 	* config/cris/cris.c (cris_option_override): Likewise.
! 	* config/csky/csky.c (csky_handle_isr_attribute): Likewise.
! 	* config/darwin-c.c (macosx_version_as_macro): Likewise.
! 	* config/darwin.c (darwin_override_options): Likewise.
! 	* config/frv/frv.c (frv_expand_builtin): Likewise.
! 	* config/h8300/h8300.c (h8300_option_override): Likewise.
! 	* config/i386/i386.c (parse_mtune_ctrl_str): Likewise.
! 	(ix86_option_override_internal): Likewise.
! 	(warn_once_call_ms2sysv_xlogues): Likewise.
! 	(ix86_expand_prologue): Likewise.
! 	(split_stack_prologue_scratch_regno): Likewise.
! 	(ix86_warn_parameter_passing_abi): Likewise.
! 	* config/ia64/ia64.c (fix_range): Likewise.
! 	* config/m68k/m68k.c (m68k_option_override): Likewise.
! 	* config/microblaze/microblaze.c (microblaze_option_override): Likewise.
! 	* config/mips/mips.c (mips_emit_probe_stack_range): Likewise.
! 	(mips_set_compression_mode): Likewise.
! 	* config/mmix/mmix.c (mmix_option_override): Likewise.
! 	* config/mn10300/mn10300.c (mn10300_option_override): Likewise.
! 	* config/msp430/msp430.c (msp430_option_override): Likewise.
! 	* config/nds32/nds32.c (nds32_option_override): Likewise.
! 	* config/nios2/nios2.c (nios2_custom_check_insns): Likewise.
! 	(nios2_option_override): Likewise.
! 	(nios2_expand_custom_builtin): Likewise.
! 	* config/nvptx/mkoffload.c (main): Likewise.
! 	* config/nvptx/nvptx.c (diagnose_openacc_conflict): Likewise.
! 	* config/pa/pa.c (fix_range): Likewise.
! 	(pa_option_override): Likewise.
! 	* config/riscv/riscv.c (riscv_parse_cpu): Likewise.
! 	(riscv_option_override): Likewise.
! 	* config/rl78/rl78.c (rl78_option_override): Likewise.
! 	* config/rs6000/aix61.h: Likewise.
! 	* config/rs6000/aix71.h: Likewise.
! 	* config/rs6000/aix72.h: Likewise.
! 	* config/rs6000/driver-rs6000.c (elf_platform): Likewise.
! 	* config/rs6000/freebsd64.h: Likewise.
! 	* config/rs6000/linux64.h: Likewise.
! 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
! 	(rs6000_expand_zeroop_builtin): Likewise.
! 	(rs6000_expand_mtfsb_builtin): Likewise.
! 	(rs6000_expand_set_fpscr_rn_builtin): Likewise.
! 	(rs6000_expand_set_fpscr_drn_builtin): Likewise.
! 	(rs6000_invalid_builtin): Likewise.
! 	(rs6000_expand_split_stack_prologue): Likewise.
! 	* config/rs6000/rtems.h: Likewise.
! 	* config/rx/rx.c (valid_psw_flag): Likewise.
! 	(rx_expand_builtin): Likewise.
! 	* config/s390/s390-c.c (s390_resolve_overloaded_builtin): Likewise.
! 	* config/s390/s390.c (s390_expand_builtin): Likewise.
! 	(s390_function_profiler): Likewise.
! 	(s390_option_override_internal): Likewise.
! 	(s390_option_override): Likewise.
! 	* config/sh/sh.c (sh_option_override): Likewise.
! 	(sh_builtin_saveregs): Likewise.
! 	(sh_fix_range): Likewise.
! 	* config/sh/vxworks.h: Likewise.
! 	* config/sparc/sparc.c (sparc_option_override): Likewise.
! 	* config/spu/spu.c (spu_option_override): Likewise.
! 	(fix_range): Likewise.
! 	* config/visium/visium.c (visium_option_override): Likewise.
! 	(visium_handle_interrupt_attr): Likewise.
! 	* config/xtensa/xtensa.c (xtensa_option_override): Likewise.
! 	* dbgcnt.c (dbg_cnt_set_limit_by_name): Likewise.
! 	(dbg_cnt_process_opt): Likewise.
! 	* dwarf2out.c (output_dwarf_version): Likewise.
! 	* except.c (expand_eh_return): Likewise.
! 	* gcc.c (defined): Likewise.
! 	(driver_handle_option): Likewise.
! 	(process_command): Likewise.
! 	(compare_files): Likewise.
! 	(driver::prepare_infiles): Likewise.
! 	(driver::do_spec_on_infiles): Likewise.
! 	(driver::maybe_run_linker): Likewise.
! 	* omp-offload.c (oacc_parse_default_dims): Likewise.
! 	* opts-global.c (handle_common_deferred_options): Likewise.
! 	* opts.c (parse_sanitizer_options): Likewise.
! 	(common_handle_option): Likewise.
! 	(enable_warning_as_error): Likewise.
! 	* passes.c (enable_disable_pass): Likewise.
! 	* plugin.c (parse_plugin_arg_opt): Likewise.
! 	(default_plugin_dir_name): Likewise.
! 	* targhooks.c (default_expand_builtin_saveregs): Likewise.
! 	(default_pch_valid_p): Likewise.
! 	* toplev.c (init_asm_output): Likewise.
! 	(process_options): Likewise.
! 	(toplev::run_self_tests): Likewise.
! 	* tree-cfg.c (verify_gimple_call): Likewise.
! 	* tree-inline.c (inline_forbidden_p_stmt): Likewise.
! 	(tree_inlinable_function_p): Likewise.
! 	* var-tracking.c (vt_find_locations): Likewise.
  
! 2019-03-11  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390.c (s390_expand_builtin): Do the copy_to_reg not
! 	only on the else branch.
  
! 2019-03-11  Martin Liska  <mliska@suse.cz>
  
! 	* gcov.c (output_intermediate_json_line): Print function
! 	name of each line.
! 	(output_json_intermediate_file): Add new argument.
! 	* doc/gcov.texi: Document the change.
  
! 2019-03-11  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR rtl-optimization/89588
! 	* loop-unroll.c (decide_unroll_constant_iterations): Make guard for
! 	explicit unrolling factor more robust.
  
! 2019-03-11  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/89649
! 	* tree-vectorizer.h (vect_loop_versioning): Adjust prototype.
! 	* tree-vect-loop-manip.c (vect_do_peeling): Unset force_vectorize
! 	on the prolog and epilog loops.
! 	(vect_loop_versioning): Return copy of loop.
! 	* tree-vect-loop.c (vect_transform_loop): Unset force_vectorize
! 	on the non-vectorized version of the loop.
  
! 2019-03-10  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/68924
! 	* config/i386/sse.md (*vec_extractv2di_0_sse):
! 	Add (=r,x) alternative and corresponding splitter.
  
! 2019-03-10  Martin Jambor  <mjambor@suse.cz>
  
! 	PR tree-optimization/85762
! 	PR tree-optimization/87008
! 	PR tree-optimization/85459
! 	* tree-sra.c (contains_vce_or_bfcref_p): New parameter, set the bool
! 	it points to if there is a type changing MEM_REF.  Adjust all callers.
! 	(build_accesses_from_assign): Disable total scalarization if
! 	contains_vce_or_bfcref_p returns true through the new parameter, for
! 	both rhs and lhs.
  
! 2019-03-09  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c/88568
! 	* attribs.c (handle_dll_attribute): Don't clear TREE_STATIC for
! 	dllimport on VAR_DECLs with RECORD_TYPE or UNION_TYPE DECL_CONTEXT.
  
! 	PR target/79645
! 	* common.opt (fdiagnostics-show-labels,
! 	fdiagnostics-show-line-numbers, fdiagnostics-format=,
! 	fdiagnostics-minimum-margin-width=, fgnat-encodings=, gas-loc-support,
! 	gas-locview-support, ginline-points, ginternal-reset-location-views):
! 	Terminate description text with a dot.
! 	* config/microblaze/microblaze.opt (mxl-prefetch): Likewise.
! 	* config/mcore/mcore.opt (m210, m340): Likewise.
! 	* config/epiphany/epiphany.opt (mprefer-short-insn-regs, mcmove,
! 	mnops=): Start description text with a capital letter.
! 	* config/arc/arc.opt (msize-level=): Likewise.
! 	* config/sh/sh.opt (minline-ic_invalidate): Likewise.
! 	* config/rs6000/sysv4.opt (mno-toc, mtoc, mno-traceback, mshlib,
! 	mnewlib): Likewise.
! 	* config/ft32/ft32.opt (msim): Likewise.
! 	(mft32b, mcompress): Likewise.  Terminate description text with a dot.
! 	(mnodiv, mnopm): Terminate description text with a dot.
! 	* config/c6x/c6x.opt (c6x_sdata): Terminate Enum description with
! 	a colon.
! 	* config/i386/i386.opt (prefer_vector_width, instrument_return):
! 	Likewise.
! 	* config/rx/rx.opt (nofpu): Remove trailing spaces from description
! 	text.
  
! 	PR rtl-optimization/89634
! 	* cfgcleanup.c (thread_jump): Punt if registers mentioned in cond1
! 	are modified in BB_END (e->src) instruction.
  
! 2019-03-08  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR target/79926
! 	* config/i386/i386.c (ix86_set_current_function): Make "sorry"
! 	messages more amenable to translation, and improve wording.
  
! 2019-03-08  Bill Schmidt  <wschmidt@linux.ibm.com>
  
! 	* config/rs6000/rs6000-p8swap.c (rs6000_analyze_swaps): Rebuild
! 	ud- and du-chains between phases.
  
! 2019-03-08  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR debug/89631
! 	* dwarf2cfi.c (dwarf2out_frame_debug_expr): Use CONST_POLY_INT
! 	instead of POLY_INT_CST.
  
! 2019-03-08  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm.h (TARGET_FP16_TO_DOUBLE): Add TARGET_VFP_DOUBLE
! 	requirement.
  
! 2019-03-08  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/68924
! 	PR target/78782
! 	PR target/87558
! 	* config/i386/emmintrin.h (_mm_loadu_si64): New intrinsic.
! 	(_mm_storeu_si64): Ditto.
  
! 2019-03-08  Martin Liska  <mliska@suse.cz>
  
! 	PR target/86952
! 	* config/i386/i386.c (ix86_option_override_internal): Disable
! 	jump tables when retpolines are used.
  
! 2019-03-08  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR go/63560
! 	* ipa-split.c (execute_split_functions): Do not split
! 	'noinline' or 'section' function.
  
! 2019-03-08  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/79846
! 	* config/s390/s390.c (s390_const_operand_ok): Use %wu instead of
! 	HOST_WIDE_INT_PRINT_UNSIGNED and %wd instead of
! 	HOST_WIDE_INT_PRINT_DEC.  Formatting fixes.
  
! 	PR ipa/80000
! 	* ipa-devirt.c (compare_virtual_tables): Remove two trailing spaces
! 	from diagnostics.  Formatting fixes.
  
! 	PR target/85665
! 	* ipa-devirt.c (odr_types_equivalent_p): Fix grammar in
! 	warn_odr diagnostics.
  
! 	PR other/80058
! 	* lra-constraints.c (process_alt_operands): Avoid one space before
! 	" at the end of line and another after " on another line in a string
! 	literal.
! 	* attribs.c (handle_dll_attribute): Likewise.
! 	* config/avr/avr-devices.c (avr_texinfo): Likewise.
  
! 	* gimple-ssa-warn-alloca.c (pass_walloca::execute): Don't wrap
! 	warning_at or inform messages in G_() if there is no ?:.
  
! 	PR tree-optimization/89550
! 	* builtins.c (c_strlen): Only set TREE_NO_WARNING if warning_at
! 	returned true.  Formatting fixes.
! 	(expand_builtin_strnlen): Formatting fixes.
! 	* tree-vrp.c (vrp_prop::check_mem_ref): Only set TREE_NO_WARNING
! 	if warning_at returned true.
! 	* tree-cfg.c (pass_warn_function_return::execute): Likewise.
  
! 2019-03-08  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/89578
! 	* cfgloop.h (struct loop): Add owned_clique field.
! 	* cfgloopmanip.c (copy_loop_info): Copy it.
! 	* tree-cfg.c (gimple_duplicate_bb): Do not remap owned_clique
! 	cliques.
! 	* tree-inline.c (copy_loops): Remap owned_clique.
! 	* lto-streamer-in.c (input_cfg): Stream owned_clique.
! 	* lto-streamer-out.c (output_cfg): Likewise.
  
! 2019-03-08  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/80190
! 	* config/darwin.c: Include intl.h.
! 	(darwin_build_constant_cfstring): Improve i18n of diagnostics by not
! 	composing the message out of two separate parts.
  
! 2019-03-07  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/80003
! 	* config/i386/i386.c (ix86_set_func_type): Make sure diagnostics
! 	doesn't start with a capital letter and doesn't end with a dot.
! 	(ix86_function_arg_boundary): Make sure diagnostics doesn't start
! 	with a capital letter.
! 	(ix86_mangle_function_version_assembler_name): Likewise.
! 	(ix86_generate_version_dispatcher_body): Likewise.
! 	(fold_builtin_cpu): Likewise.
! 	(get_builtin_code_for_version): Likewise.  Remove extraneous space.
! 	(ix86_handle_interrupt_attribute): Make the diagnostics easier for
! 	translators, wrap full type name in %qs.
  
! 	PR translation/79999
! 	* gimplify.c (gimplify_omp_ordered): Reword diagnostics to talk about
! 	depend clause with source (or sink) modifier.
! 	* omp-expand.c (expand_omp_ordered_sink): Likewise.
  
! 	PR target/89602
! 	* config/i386/sse.md (avx512f_mov<ssescalarmodelower>_mask,
! 	*avx512f_load<mode>_mask, avx512f_store<mode>_mask): New define_insns.
! 	(avx512f_load<mode>_mask): New define_expand.
! 	* config/i386/i386-builtin.def (__builtin_ia32_loadsd_mask,
! 	__builtin_ia32_loadss_mask, __builtin_ia32_storesd_mask,
! 	__builtin_ia32_storess_mask, __builtin_ia32_movesd_mask,
! 	__builtin_ia32_movess_mask): New builtins.
! 	* config/i386/avx512fintrin.h (_mm_mask_load_ss, _mm_maskz_load_ss,
! 	_mm_mask_load_sd, _mm_maskz_load_sd, _mm_mask_move_ss,
! 	_mm_maskz_move_ss, _mm_mask_move_sd, _mm_maskz_move_sd,
! 	_mm_mask_store_ss, _mm_mask_store_sd): New intrinsics.
  
! 2019-03-07  Martin Jambor  <mjambor@suse.cz>
  
! 	PR lto/87525
! 	* ipa-cp.c (perform_estimation_of_a_value): Account zero time benefit
! 	for extern inline functions.
  
! 2019-03-07  Martin Jambor  <mjambor@suse.cz>
  
! 	PR ipa/88235
! 	* cgraph.h (cgraph_node): New inline method former_thunk_p.
! 	* cgraph.c (cgraph_node::dump): Dump a note if node is a former thunk.
! 	(clone_of_p): Treat expanded thunks like thunks, be optimistic if they
! 	have multiple callees.  At the end check if declarations match as
! 	opposed to cgraph_nodes.
  
! 2019-03-07  Martin Liska  <mliska@suse.cz>
  
! 	* cgraph.c (cgraph_node::verify_node): Verify with a neighbour
! 	which is equivalent to searching for this in clones chain.
! 	* symtab.c (symtab_node::verify_base): Similarly compare ASM
! 	names with a neighbour and special case first node in a chain.
  
! 2019-01-25  Jason Merrill  <jason@redhat.com>
  
! 	PR c++/80916 - spurious "static but not defined" warning.
! 	* gimple-fold.c (can_refer_decl_in_current_unit_p): Return false
! 	for an internal symbol with DECL_EXTERNAL.
  
! 2019-04-07  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/89618
! 	* cfgloopmanip.c (copy_loop_info): Copy forgotten fields.
! 	* tree-inline.c (copy_loops): Simplify.
  
! 2019-03-07  Martin Liska  <mliska@suse.cz>
  
! 	* dwarf2out.c (add_AT_vms_delta): Revert function removal.
  
! 2019-03-07  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/89595
! 	* tree-ssa-dom.c (dom_opt_dom_walker::optimize_stmt): Take
! 	stmt iterator as reference, take boolean output parameter to
! 	indicate whether the stmt was removed and thus the iterator
! 	already advanced.
! 	(dom_opt_dom_walker::before_dom_children): Re-iterate over
! 	stmts created by folding.
  
! 2019-03-07  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c++/89585
! 	* doc/extend.texi (Basic Asm): Document qualifiers are not allowed
! 	at toplevel.
  
! 2019-03-06  Peter Bergner  <bergner@linux.ibm.com>
  
! 	PR rtl-optimization/88845
! 	* config/rs6000/rs6000.c (rs6000_emit_move_si_sf_subreg): Enable during
! 	LRA.
! 	* lra.c (remove_scratches_1): New function.
! 	(remove_scratches): Use it.
! 	(lra_emit_move): Likewise.
  
! 2019-03-06  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc-c.def (__ARC_UNALIGNED__): Set it on
! 	unaligned_access variable.
! 	* config/arc/arc.c (arc_override_options): Set unaligned access
! 	default on for HS CPUs.
! 	* config/arc/arc.h (STRICT_ALIGNMENT): Fix logic.
  
! 2019-03-06  Martin Liska  <mliska@suse.cz>
  
! 	PR gcov-profile/89577
! 	* doc/gcov.texi: Prefer to use --coverage.
! 	* doc/sourcebuild.texi: Likewise.
  
! 2019-03-02  Jason Merrill  <jason@redhat.com>
  
! 	PR c++/86485 - -Wmaybe-unused with empty class ?:
! 	* gimplify.c (gimplify_cond_expr): Use INIT_EXPR.
  
! 2019-03-05  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/89587
! 	* config/rs6000/t-linux (MULTIARCH_DIRNAME): Set to non-empty only
! 	if_multiarch.
  
! 	PR middle-end/89590
! 	* builtins.c (maybe_emit_free_warning): Punt if free doesn't have
! 	exactly one argument.
  
! 2019-03-05  Jakub Jelinek  <jakub@redhat.com>
  	    Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/89570
! 	* match.pd (vec_cond into cond_op simplification): Don't use
! 	get_conditional_internal_fn, use as_internal_fn (cond_op).
! 
! 2019-03-05  Wilco Dijkstra  <wdijkstr@arm.com>
! 
! 	PR target/89222
! 	* config/arm/arm.md (movsi): Use targetm.cannot_force_const_mem
! 	to decide when to split off a non-zero offset from a symbol.
! 	* config/arm/arm.c (arm_cannot_force_const_mem): Disallow offsets
! 	in function symbols.
! 
! 2019-03-05  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/89594
! 	* tree-if-conv.c (pass_if_conversion::execute): Handle
! 	case where .LOOP_VECTORIZED_FUNCTION was removed.
! 
! 2019-03-05  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR bootstrap/89560
! 	* fold-const.c (fold_checksum_tree): Don't use fixed size buffer,
! 	instead alloca it only when needed with the needed size.
! 
! 	PR tree-optimization/89570
! 	* match.pd (vec_cond into cond_op simplification): Guard with
! 	vectorized_internal_fn_supported_p test and #if GIMPLE.
! 
! 	PR tree-optimization/89566
! 	* gimple-ssa-sprintf.c (sprintf_dom_walker::handle_gimple_call):
! 	Set info.fncode to BUILT_IN_NONE if gimple_call_builtin_p failed.
! 	Punt if get_user_idx_format succeeds, but idx_format argument is
! 	not provided or doesn't have pointer type, or if idx_args is above
! 	number of provided arguments.
! 
! 2019-03-04  Wilco Dijkstra  <wdijkstr@arm.com>
! 
! 	PR tree-optimization/89437
! 	* match.pd: Use lt in sin(atan(x)) and cos(atan(x)) simplifications.
! 
! 2019-03-04  Richard Biener  <rguenther@suse.de>
! 
! 	PR middle-end/89572
! 	* tree-scalar-evolution.c: (get_loop_exit_condition): Use
! 	safe_dyn_cast.
! 
! 2019-03-04  Bin Cheng  <bin.cheng@linux.alibaba.com>
! 
! 	PR tree-optimization/89487
! 	* tree-loop-distribution.c (has_nonaddressable_dataref_p): New.
! 	(create_rdg_vertices): Compute has_nonaddressable_dataref_p.
! 	(distribute_loop): Don't do runtime alias check if there is non-
! 	addressable data reference.
! 	* tree-ssa-loop-ivopts.c (may_be_nonaddressable_p): Check if VAR_DECL
! 	is a register variable.
! 
! 2019-03-02  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/89506
! 	* config/arm/arm.md (cmpsi2_addneg): Use
! 	trunc_int_for_mode (-INTVAL (...), SImode) instead of -INTVAL (...).
! 	If operands[2] is 0 or INT_MIN, force use of subs.
! 	(*compare_scc splitter): Use gen_int_mode.
! 	(*negscc): Likewise.
! 	* config/arm/thumb2.md (*thumb2_negscc): Likewise.
! 
! 2019-03-01  Kito Cheng  <kito.cheng@gmail.com>
! 	    Monk Chiang  <sh.chiang04@gmail.com>
! 
! 	* common/config/riscv/riscv-common.c: Include sstream.
! 	(riscv_subset_list::to_string): New.
! 	(riscv_arch_str): Likewise.
! 	* config.gcc (riscv*-*-*): Handle --with-riscv-attribute=
! 	* config.in: Regen.
! 	* config/riscv/riscv-protos.h (riscv_arch_str): New.
! 	* config/riscv/riscv.c (INCLUDE_STRING): Defined.
! 	(riscv_emit_attribute): New.
! 	(riscv_file_start): Emit attribute if needed.
! 	(riscv_option_override): Init riscv_emit_attribute_p.
! 	* config/riscv/riscv.opt (mriscv-attribute): New option.
! 	* configure.ac (riscv*-*-*): Check binutils is supporting ELF
! 	* configure: Regen.
! 	* doc/install.texi: Document --with-riscv-attribute.
! 	* doc/invoke.texi: Document -mriscv-attribute.
! 
! 	* common/config/riscv/riscv-common.c:
! 	Include config/riscv/riscv-protos.h.
! 	(INCLUDE_STRING): Defined.
! 	(RISCV_DONT_CARE_VERSION): Defined.
! 	(riscv_subset_t): Declare.
! 	(riscv_subset_t::riscv_subset_t): New.
! 	(riscv_subset_list): Declare.
! 	(riscv_subset_list::riscv_subset_list): New.
! 	(riscv_subset_list::~riscv_subset_list): Likewise.
! 	(riscv_subset_list::parsing_subset_version): Likewise.
! 	(riscv_subset_list::parse_std_ext): Likewise.
! 	(riscv_subset_list::parse_sv_or_non_std_ext): Likewise.
! 	(riscv_subset_list::add): Likewise.
! 	(riscv_subset_list::lookup): Likewise.
! 	(riscv_subset_list::xlen): Likewise.
! 	(riscv_subset_list::parse): Likewise.
! 	(riscv_supported_std_ext): Likewise.
! 	(current_subset_list): Likewise.
! 	(riscv_parse_arch_string): Using riscv_subset_list::parse to
! 	parse.
! 
! 2019-03-01  Segher Boessenkool  <segher@kernel.crashing.org>
! 
! 	* config/rs6000/rs6000.c (rs6000_option_override_internal): If
! 	rs6000_dejagnu_cpu_index is set, use that to override rs6000_cpu_index.
! 	* config/rs6000/rs6000.opt (mdejagnu-cpu=): New option.
! 
! 2019-03-01  Alexander Monakov  <amonakov@ispras.ru>
! 
! 	PR rtl-optimization/85899
! 	* haifa-sched.c (find_fallthru_edge_from): Relax assert to account for
! 	fallthru edges leading to the exit block.
! 
! 2019-03-01  Tamar Christina  <tamar.christina@arm.com>
! 
! 	PR target/89517
! 	* config/aarch64/aarch64-option-extensions.def (fp, simd, crypto, fp16,
! 	rdma, dotprod, sha2, sha3, sm4, fp16fml, sve): Collapse line.
! 
! 2019-03-01  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	PR tree-optimization/89535
! 	* tree-vect-stmts.c (vectorizable_call): Record the vector types
! 	for each operand.  Calculate the fallback choice for mask operands
! 	and pass it to vect_get_vec_def_for_operand.
! 
! 2019-03-01  Richard Biener  <rguenther@suse.de>
! 
! 	PR middle-end/89541
! 	* tree-ssa-operands.c (add_stmt_operand): CONST_DECL may
! 	get virtual operands.
! 	(get_expr_operands): Handle CONST_DECL like other decls.
! 
! 2019-03-01  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR middle-end/89503
! 	* fold-const.c (fold_checksum_tree): Ignore TREE_NO_WARNING bit
! 	on DECL_P and EXPR_P.
! 
! 2019-03-01  Richard Biener  <rguenther@suse.de>
! 
! 	PR middle-end/89497
! 	* tree-cfgcleanup.h (cleanup_tree_cfg): Add SSA update flags
! 	argument, defaulted to zero.
! 	* passes.c (execute_function_todo): Pass down SSA update flags
! 	to cleanup_tree_cfg.
! 	* tree-cfgcleanup.c: Include tree-into-ssa.h and tree-cfgcleanup.h.
! 	(cleanup_tree_cfg_noloop): After cleanup_control_flow_pre update SSA
! 	form if requested.
! 	(cleanup_tree_cfg): Get and pass down SSA update flags.
! 
! 2019-03-01  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR bootstrap/89539
! 	* dwarf2out.c (output_comdat_type_unit): Add ATTRIBUTE_UNUSED to
! 	early_lto_debug argument.
! 
! 2019-02-28  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	PR tree-optimization/89536
! 	* tree-ssa-dom.c (edge_info::derive_equivalences) <BIT_NOT_EXPR>: Test
! 	only whether bit #0 of the value is 0 instead of the entire value.
! 
! 2019-02-28  Marek Polacek  <polacek@redhat.com>
! 
! 	PR c++/87068 - missing diagnostic with fallthrough statement.
! 	* gimplify.c (expand_FALLTHROUGH_r): If IFN_FALLTHROUGH was found
! 	at the end of a seq, save its location to walk_stmt_info.
! 	(expand_FALLTHROUGH): Warn if IFN_FALLTHROUGH is at the end of
! 	a switch.
! 
! 2019-02-28  Jan Hubicka  <hubicka@ucw.cz>
! 
! 	PR lto/88585
! 	* tree.c (find_atomic_core_type): Move ahead in file.
! 	(check_base_type): Correctly compare alignments of atomic types.
! 
! 2019-02-28  H.J. Lu  <hongjiu.lu@intel.com>
! 
! 	PR target/89455
! 	* config/i386/i386.c (get_builtin_code_for_version): Identify
! 	Westmere from PCLMUL, instead of AES.
! 
! 2019-02-28  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/89434
! 	* config/arm/arm.md (*subsi3_carryin_compare_const): Use
! 	trunc_int_for_mode (-INTVAL (...), SImode), just instead of
! 	-UINTVAL (...).
! 
! 2019-02-28  Tamar Christina  <tamar.christina@arm.com>
! 
! 	PR target/88530
! 	* config/aarch64/aarch64-option-extensions.def: Document it.
! 	* config/aarch64/driver-aarch64.c (host_detect_local_cpu): Skip feature
! 	if empty hwcaps.
! 
! 2019-02-28  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c/89520
! 	* convert.c (convert_to_real_1, convert_to_integer_1): Punt for
! 	builtins if they don't have a single scalar floating point argument.
! 	Formatting fixes.
! 
! 2019-02-27  Bernd Edlinger  <bernd.edlinger@hotmail.de>
! 
! 	PR rtl-optimization/89490
! 	* varasm.c (get_block_for_section): Bail out for mergeable sections.
! 	(default_use_anchors_for_symbol_p, output_object_block): Assert the
! 	block section is not mergeable.
! 
! 2019-02-27  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/70341
! 	* config/arm/arm.md (arm_casesi_internal): New define_expand.  Rename
! 	old define_insn to ...
! 	(*arm_casesi_internal): ... this.  Add mode to LABEL_REFs.
! 	* config/arm/thumb2.md (thumb2_casesi_internal): New define_expand.
! 	Rename old define_insn to ...
! 	(*thumb2_casesi_internal): ... this.  Add mode to LABEL_REFs.
! 	(thumb2_casesi_internal_pic): New define_expand.  Rename old
! 	define_insn to ...
! 	(*thumb2_casesi_internal_pic): ... this.  Add mode to LABEL_REFs.
! 	* config/aarch64/aarch64.md (casesi): Create the casesi_dispatch
! 	MEM manually here, set MEM_READONLY_P and MEM_NOTRAP_P on it.
! 
! 2019-02-27  Richard Biener  <rguenther@suse.de>
! 
! 	PR debug/88878
! 	* dwarf2out.c (use_debug_types): Disable when in_lto_p.
! 
! 2019-02-27  Richard Biener  <rguenther@suse.de>
! 
! 	* passes.c (should_skip_pass_p): Do not skip cgraph-edge
! 	building.
! 
! 2019-02-27  Richard Biener  <rguenther@suse.de>
! 
! 	PR debug/88878
! 	* dwarf2out.c (output_comdat_type_unit): Add early_lto_debug
! 	parameter, prefix section name with .gnu.debuglto_ if true.
! 	(dwarf2out_finish): Pass false to output_comdat_type_unit.
! 	(dwarf2out_early_finish): Pass true to output_comdat_type_unit.
! 
! 2019-02-27  Richard Biener  <rguenther@suse.de>
! 
! 	PR debug/89514
! 	* dwarf2out.c (size_of_die): Key on AT_ref (a)->comdat_type_p
! 	rather than on use_debug_types, doing what output_die does.
! 	(value_format): Likewise.
! 
! 2019-02-27  Martin Jambor  <mjambor@suse.cz>
! 	    Martin Sebor  <msebor@redhat.com>
! 
! 	* doc/invoke.texi (Warning Options): Reword description of
! 	-Wno-absolute-value.
! 
! 2019-02-27  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR tree-optimization/89280
! 	* tree-cfgcleanup.c (maybe_dead_abnormal_edge_p,
! 	builtin_setjmp_setup_bb): New functions.
! 	(cleanup_control_flow_pre): Ignore maybe_dead_abnormal_edge_p edges.
! 	When visiting __builtin_setjmp_setup block, queue in special
! 	setjmp_vec vector edges from .ABNORMAL_DISPATCHER to corresponding
! 	__builtin_setjmp_receiver.  Remove .ABNORMAL_DISPATCHER basic blocks
! 	from visited after the loop if they don't have any visited successor
! 	blocks.
! 
! 2018-02-26  Steve Ellcey  <sellcey@marvell.com>
! 
! 	* config/aarch64/aarch64.c (aarch64_get_multilib_abi_name):
! 	New function.
! 	(TARGET_GET_MULTILIB_ABI_NAME): New macro.
! 
! 2019-02-26  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c++/89507
! 	* tree.c (valid_constant_size_p): Deal with size INTEGER_CSTs
! 	with types other than sizetype/ssizetype.
! 
! 2019-02-26  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* config/sparc/sparc-opts.h (enum processor_type): Rename to...
! 	(enum sparc_processor_type): ...this.
! 	(enum sparc_code_model_type): New enumeration type.
! 	(enum sparc_memory_model_type): Tweak comments.
! 	* config/sparc/sparc.opt (mcpu): Adjust to above renaming.
! 	(mtune): Likewise.
! 	(mcmodel): Use sparc_code_model enumeration and variable.
! 	(sparc_code_model): New enumeration.
! 	(mdebug): Add Undocumented marker.
! 	* config/sparc/sparc.h (enum cmodel): Delete.
! 	(sparc_cmodel): Likewise.
! 	(TARGET_CM_MEDLOW): Adjust to above renaming.
! 	(TARGET_CM_MEDMID): Likewise.
! 	(TARGET_CM_MEDANY): Likewise.
! 	(TARGET_CM_EMBMEDANY): Likewise.
! 	* config/sparc/sparc.c (sparc_cmodel): Delete.
! 	(sparc_option_override): Remove string/value mapping support for the
! 	code model.  Move code and memory model support to after the handling
! 	of target flags.  Do private machine setup last.
! 	(sparc_emit_set_symbolic_const64): Use sparc_code_model.
! 	(sparc_legitimize_reload_address): Likewise.
! 	(sparc_output_mi_thunk): Likewise.
! 	* config/sparc/sparc.md (cpu): Adjust comment to above renaming.
! 
! 2019-02-26  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR tree-optimization/89500
! 	* tree-ssa-strlen.c (stridx_strlenloc): Adjust comment.
! 	(handle_builtin_strlen): Remove noncst_bound variable.  Always
! 	optimize strnlen (x, 0) to 0.  Optimize strnlen (x, cst) to
! 	cst if the first cst bytes starting at x are known to be non-zero,
! 	even if the string is not zero terminated.  Don't try to modify
! 	*si for strnlen.  Update strlen_to_stridx only for strlen or if
! 	we can prove strnlen returns the same value as strlen would.
! 
! 2019-02-26  Martin Liska  <mliska@suse.cz>
! 
! 	* alloc-pool.h (struct pool_usage): Remove extra
! 	print_dash_line.
! 	* bitmap.h (struct bitmap_usage): Likewise.
! 	* ggc-common.c (struct ggc_usage): Likewise.
! 	* mem-stats.h (struct mem_usage): Likewise.
! 	(mem_alloc_description::dump): Print dash lines
! 	here and repeat header at the end of a table report.
! 	It's then more readable.
! 	* tree-phinodes.c (phinodes_print_statistics): Make
! 	horizontal alignment.
! 	* tree-ssanames.c (ssanames_print_statistics): Likewise.
! 	* vec.c (struct vec_usage): Remove extra print_dash_line.
! 	* vec.h (vec_safe_grow_cleared): Pass PASS_MEM_STAT.
! 
! 2019-02-26  Uroš Bizjak  <ubizjak@gmail.com>
! 
! 	* doc/extend.texi (__builtin_object_size):
! 	Use @pxref instead of @xref inside parenthesis.
! 	(__builtin_has_attribute): Add missing comma after @xref.
! 	(__builtin_object_size): Ditto.
! 	* doc/md.texi (cond_*{mode}): Use @samp instead of @var around op1[i].
! 	* fortran/invoke.texi (-ffpe-trap): Use @var for every item
! 	in the list.
! 
! 2019-02-26  Jeff Law  <law@redhat.com>
! 
! 	PR rtl-optimization/87761
! 	* regcprop.c (copyprop_hardreg_forward_1): Use REG_UNUSED notes to
! 	detect obviously dead insns and delete them.
! 
! 2019-02-26  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/89505
! 	* tree-ssa-structalias.c (compute_dependence_clique): Make sure
! 	to handle restrict pointed-to vars with multiple subvars
! 	correctly.
! 
! 2019-02-26  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/89489
! 	* tree-parloops.c (create_loop_fn): Copy over last_clique.
! 
! 2019-02-26  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* tree-ssa-dom.c (edge_info::derive_equivalences) <BIT_IOR_EXPR>: Fix
! 	and move around comment.
! 	<BIT_AND_EXPR>: Likewise.
! 	<BIT_NOT_EXPR>: Add specific handling for boolean types.
! 
! 2019-02-26  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/89474
! 	* config/i386/i386.c (remove_partial_avx_dependency): Call
! 	df_analyze etc. before creation of the v4sf_const0 pseudo, rather than
! 	after changing possibly many instructions to use that pseudo.  Fix up
! 	insertion of v4sf_const0 setter at the start of bb.
! 
! 2019-02-25  Sandra Loosemore  <sandra@codesourcery.com>
! 
! 	PR c/80409
! 	* doc/extend.texi (Variadic Pointer Args): New section.
! 
! 2019-02-25  Sandra Loosemore  <sandra@codesourcery.com>
! 	    Martin Sebor  <msebor@gmail.com>
! 
! 	* common.opt (Wattribute-alias): Likewise.
! 	* doc/invoke.texi (Option Summary): List general form of
! 	-Wattribute-alias=.  List positive form of -Wmissing-attributes.
! 	(-Wmissing-attributes): Invert entry, rewrite and correct default.
! 	Add cross-references.
! 	(-Wattribute-alias): Rewrite and correct default.  Mention
! 	considered attributes (same as for -Wmissing-attributes).
! 
! 2019-02-25  Paul A. Clarke  <pc@us.ibm.com>
! 
! 	* config/rs6000/emmintrin.h (_mm_cvtpd_epi32): Fix big endian.
! 	(_mm_cvtpd_ps): Likewise.
! 	(_mm_cvttpd_epi32): Likewise.
! 
! 	PR target/89338
! 	* config/rs6000/xmmintrin.h (_mm_cvtss_f32):  Fix type mismatch.
! 	(_mm_cvt_ss2si): Fix type mismatch and 32-bit.
! 
! 	PR target/89339
! 	* config/rs6000/xmmintrin.h (_mm_movemask_pi8): Fix 32-bit.
! 
! 2019-02-25  Tamar Christina  <tamar.christina@arm.com>
! 
! 	PR target/88530
! 	* common/config/aarch64/aarch64-common.c
! 	(struct aarch64_option_extension): Add is_synthetic.
! 	(all_extensions): Use it.
! 	(TARGET_OPTION_INIT_STRUCT): Define hook.
! 	(struct gcc_targetm_common): Moved to end.
! 	(all_extensions_by_on): New.
! 	(opt_ext_cmp, typedef opt_ext): New.
! 	(aarch64_option_init_struct): New.
! 	(aarch64_contains_opt): New.
! 	(aarch64_get_extension_string_for_isa_flags): Output smallest set.
! 	* config/aarch64/aarch64-option-extensions.def
! 	(AARCH64_OPT_EXTENSION): Explicitly include AES and SHA2 in crypto.
! 	(fp, simd, crc, lse, fp16, rcpc, rdma, dotprod, aes, sha2, sha3,
! 	sm4, fp16fml, sve, profile, rng, memtag, sb, ssbs, predres):
! 	Set is_synthetic to false.
! 	(crypto): Set is_synthetic to true.
! 	* config/aarch64/driver-aarch64.c (AARCH64_OPT_EXTENSION): Add
! 	SYNTHETIC.
! 
! 2019-02-25  Tamar Christina  <tamar.christina@arm.com>
! 
! 	* config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
! 	vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32, vfmlslq_low_u32,
! 	vfmlalq_high_u32, vfmlslq_high_u32, vfmlal_lane_low_u32,
! 	vfmlal_lane_high_u32, vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32,
! 	vfmlal_laneq_low_u32, vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32,
! 	vfmlal_laneq_high_u32, vfmlsl_lane_low_u32, vfmlsl_lane_high_u32,
! 	vfmlslq_laneq_low_u32, vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32,
! 	vfmlslq_laneq_high_u32, vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32):
! 	Rename ...
! 	(vfmlal_low_f16, vfmlsl_low_f16, vfmlal_high_f16, vfmlsl_high_f16,
! 	vfmlalq_low_f16, vfmlslq_low_f16, vfmlalq_high_f16, vfmlslq_high_f16,
! 	vfmlal_lane_low_f16, vfmlal_lane_high_f16, vfmlalq_laneq_low_f16,
! 	vfmlalq_lane_low_f16, vfmlal_laneq_low_f16, vfmlalq_laneq_high_f16,
! 	vfmlalq_lane_high_f16, vfmlal_laneq_high_f16, vfmlsl_lane_low_f16,
! 	vfmlsl_lane_high_f16, vfmlslq_laneq_low_f16, vfmlslq_lane_low_f16,
! 	vfmlsl_laneq_low_f16, vfmlslq_laneq_high_f16, vfmlslq_lane_high_f16,
! 	vfmlsl_laneq_high_f16): ... To this.
! 	* config/arm/neon.md: Update comments.
! 
! 2019-02-25  Tamar Christina  <tamar.christina@arm.com>
! 
! 	* config/aarch64/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
! 	vfmlalq_low_u32, vfmlslq_low_u32, vfmlal_high_u32, vfmlsl_high_u32,
! 	vfmlalq_high_u32, vfmlslq_high_u32, vfmlal_lane_low_u32,
! 	vfmlsl_lane_low_u32, vfmlal_laneq_low_u32, vfmlsl_laneq_low_u32,
! 	vfmlalq_lane_low_u32, vfmlslq_lane_low_u32, vfmlalq_laneq_low_u32,
! 	vfmlslq_laneq_low_u32, vfmlal_lane_high_u32, vfmlsl_lane_high_u32,
! 	vfmlal_laneq_high_u32, vfmlsl_laneq_high_u32, vfmlalq_lane_high_u32,
! 	vfmlslq_lane_high_u32, vfmlalq_laneq_high_u32, vfmlslq_laneq_high_u32):
! 	Rename ...
! 	(vfmlal_low_f16, vfmlsl_low_f16, vfmlalq_low_f16, vfmlslq_low_f16,
! 	vfmlal_high_f16, vfmlsl_high_f16, vfmlalq_high_f16, vfmlslq_high_f16,
! 	vfmlal_lane_low_f16, vfmlsl_lane_low_f16, vfmlal_laneq_low_f16,
! 	vfmlsl_laneq_low_f16, vfmlalq_lane_low_f16, vfmlslq_lane_low_f16,
! 	vfmlalq_laneq_low_f16, vfmlslq_laneq_low_f16, vfmlal_lane_high_f16,
! 	vfmlsl_lane_high_f16, vfmlal_laneq_high_f16, vfmlsl_laneq_high_f16,
! 	vfmlalq_lane_high_f16, vfmlslq_lane_high_f16, vfmlalq_laneq_high_f16,
! 	vfmlslq_laneq_high_f16): ... To this.
! 
! 2019-02-25  Alexander Monakov  <amonakov@ispras.ru>
! 
! 	PR rtl-optimization/86096
! 	* df-scan.c (df_mw_compare): Do not check mw_reg fields when
! 	comparing mw_order values.
! 
! 2019-02-25  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/89434
! 	* config/arm/arm.md (*subsi3_carryin_const): Use
! 	arm_neg_immediate_operand predicate instead of
! 	arm_not_immediate_operand, "L" constraint instead of "K" and
! 	print it using %n2 instead of %B2.
! 	(*subsi3_carryin_const0): New define_insn.
! 	(*subsi3_carryin_compare_const): Use const_int_I_operand predicate
! 	instead of arm_not_operand and "I" constraint instead of "K" and
! 	print it using %n3 instead of %B2.  Instead of using match_dup 2 add
! 	another match_operand and in the condition check that it is negation
! 	of operands[2].
! 	(*subsi3_carryin_compare_const0): New define_ins.
! 	(*subdi_di_zesidi): Adjust to use *subsi3_carryin_const0 instead of
! 	*subsi3_carryin_const.
! 	(*arm_cmpdi_insn): Fix splitting into *subsi3_carryin_compare_const,
! 	split into *subsi3_carryin_compare_const0 if the highpart is zero.
! 
! 	PR target/89438
! 	* config/arm.vfp.md (*negdf2_vfp): Use
! 	gen_int_mode (0x80000000, SImode) instead of GEN_INT (0x80000000).
! 	* config/arm/neon.md (neon_copysignf<mode>): Likewise.
! 
! 2019-02-24  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR rtl-optimization/89445
! 	* simplify-rtx.c (simplify_ternary_operation): Don't use
! 	simplify_merge_mask on operands that may trap.
! 	* rtlanal.c (may_trap_p_1): Use FLOAT_MODE_P instead of
! 	SCALAR_FLOAT_MODE_P checks.  For integral division by zero, if
! 	second operand is CONST_VECTOR, check if any element could be zero.
! 	Don't expect traps for VEC_{MERGE,SELECT,CONCAT,DUPLICATE} unless
! 	their operands can trap.
! 
! 2019-02-23  Martin Sebor  <msebor@redhat.com>
! 
! 	* gimple-ssa-sprintf.c (target_strtol): Rename...
! 	(target_strtohwi): ...to this.  Handle values up to HOST_WIDE_INT_MAX.
! 	(parse_directive): Adjust to name change.  Use HOST_WIDE_INT_MAX to
! 	check for range error.
! 
! 2019-02-23  H.J. Lu  <hongjiu.lu@intel.com>
! 
! 	PR driver/69471
! 	* opts-common.c (prune_options): Also prune joined switches
! 	with Negative and RejectNegative.
! 	* config/i386/i386.opt (march=): Add Negative(march=).
! 	(mtune=): Add Negative(mtune=).
! 	* doc/options.texi: Document Negative used together with Joined
! 	and RejectNegative.
! 
! 2019-02-22  Martin Sebor  <msebor@redhat.com>
! 
! 	* doc/extend.texi (Other Builtins): Add
! 	__builtin_is_constant_evaluated.
! 
! 2019-02-22  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/87609
! 	* tree-cfg.c (gimple_duplicate_bb): Only remap inlined cliques.
! 
! 2019-02-22  Jeff Law  <law@redhat.com>
! 
! 	PR rtl-optimization/87761
! 	* config/mips/mips.md: Add new combiner pattern to recognize
! 	a bitfield extraction using (ashiftrt (truncate (ashift (...)))).
! 
! 2019-02-22  Matthew Malcomson  <matthew.malcomson@arm.com>
! 
! 	PR target/89324
! 	* config/aarch64/aarch64.md: Use aarch64_general_reg predicate on
! 	destination register in peepholes generating patterns for ADDS/SUBS.
! 	(add<mode>3_compare0,
! 	*addsi3_compare0_uxtw, add<mode>3_compareC,
! 	add<mode>3_compareV_imm, add<mode>3_compareV,
! 	*adds_<optab><ALLX:mode>_<GPI:mode>,
! 	*subs_<optab><ALLX:mode>_<GPI:mode>,
! 	*adds_<optab><ALLX:mode>_shift_<GPI:mode>,
! 	*subs_<optab><ALLX:mode>_shift_<GPI:mode>,
! 	*adds_<optab><mode>_multp2, *subs_<optab><mode>_multp2,
! 	*sub<mode>3_compare0, *subsi3_compare0_uxtw,
! 	sub<mode>3_compare1): Allow stack pointer for source register.
! 	* config/aarch64/predicates.md (aarch64_general_reg): New predicate.
! 
! 2019-02-22  Martin Sebor  <msebor@redhat.com>
! 
! 	PR tree-optimization/88993
! 	PR tree-optimization/88853
! 	* gimple-ssa-sprintf.c (sprintf_dom_walker::call_info::is_file_func):
! 	New helper.
! 	(sprintf_dom_walker::call_info::is_string_func): New helper.
! 	(format_directive): Only issue "may exceed" 4095/INT_MAX warnings
! 	for formatted string functions.
! 	(sprintf_dom_walker::handle_gimple_call): Fix a typo in a comment.
! 
! 2019-02-22  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c/89425
! 	* c-parser.c (sizeof_ptr_memacc_comptypes): Avoid warning in
! 	unreachable subexpressions.
! 
! 2019-02-22  H.J. Lu  <hongjiu.lu@intel.com>
! 	    Hongtao Liu  <hongtao.liu@intel.com>
! 	    Sunil K Pandey  <sunil.k.pandey@intel.com>
! 
! 	PR target/87007
! 	* config/i386/i386-passes.def: Add
! 	pass_remove_partial_avx_dependency.
! 	* config/i386/i386-protos.h
! 	(make_pass_remove_partial_avx_dependency): New.
! 	* config/i386/i386.c (make_pass_remove_partial_avx_dependency):
! 	New function.
! 	(pass_data_remove_partial_avx_dependency): New.
! 	(pass_remove_partial_avx_dependency): Likewise.
! 	(make_pass_remove_partial_avx_dependency): Likewise.
! 	* config/i386/i386.md (avx_partial_xmm_update): New attribute.
! 	(*extendsfdf2): Add avx_partial_xmm_update.
! 	(truncdfsf2): Likewise.
! 	(*float<SWI48:mode><MODEF:mode>2): Likewise.
! 	(SF/DF conversion splitters): Disabled for TARGET_AVX.
! 
! 2019-02-22  Aldy Hernandez  <aldyh@redhat.com>
! 
! 	PR middle-end/85598
! 	* gimple-ssa-sprintf.c (pass_sprintf_length::execute): Enable loop
! 	analysis for pass.
! 
! 2019-02-22  Thiago Macieira  <thiago.macieira@intel.com>
  
! 	PR target/89444
! 	* config/i386/i386.h (PTA_WESTMERE): Remove PTA_AES.
! 	(PTA_SKYLAKE): Add PTA_AES.
! 	(PTA_GOLDMONT): Likewise.
  
! 2019-02-22  Sudakshina Das  <sudi.das@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_output_mi_thunk): Add bti
! 	instruction if enabled.
! 	(aarch64_override_options): Remove reference to return address key.
  
! 2019-02-22  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/89440
! 	* tree-vect-loop.c (vect_create_epilog_for_reduction): Remove
! 	not necessary assert.
  
! 2019-02-22  Thomas Schwinge  <thomas@codesourcery.com>
  
! 	PR fortran/72741
! 	* omp-general.c (oacc_replace_fn_attrib): Mostly split out into...
! 	(oacc_replace_fn_attrib_attr): ... this new function.
! 	* omp-general.h (oacc_replace_fn_attrib_attr): New prototype.
! 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Revert workaround.
  
! 2019-02-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
! 	* config/arm/arm-cpus.in (ares): Rename to...
! 	(neoverse-n1): ... This.  Add ares as alias.
! 	* config/arm/arm-tables.opt: Regenerate.
! 	* config/arm/arm-tune.md: Likewise.
! 	* doc/invoke.txt (ARM Options): Document neoverse-n1.
  
! 2019-02-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
! 	* config/aarch64/aarch64-cores.def (neoverse-e1): Define.
! 	* config/aarch64/aarch64-tune.md: Regenerate.
! 	* doc/invoke.texi (AArch64 Options): Document neoverse-e1 -mcpu option.
  
! 2019-02-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
! 	* config/aarch64/aarch64.c (ares_tunings): Rename to...
! 	(neoversen1_tunings): ... This.
! 	* config/aarch64/aarch64-cores.def (ares): Change tuning to the above.
! 	(neoverse-n1): New CPU.
! 	* config/aarch64/aarch64-tune.md: Regenerate.
! 	* doc/invoke.txt (AArch64 Options): Document neoverse-n1.
  
! 2019-02-22  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/87609
! 	* cfghooks.h (dependence_hash): New typedef.
! 	(struct copy_bb_data): New type.
! 	(cfg_hooks::duplicate_block): Adjust to take a copy_bb_data argument.
! 	(duplicate_block): Likewise.
! 	* cfghooks.c (duplicate_block): Pass down copy_bb_data.
! 	(copy_bbs): Create and pass down copy_bb_data.
! 	* cfgrtl.c (cfg_layout_duplicate_bb): Adjust.
! 	(rtl_duplicate_bb): Likewise.
! 	* tree-cfg.c (gimple_duplicate_bb): If the copy_bb_data arg is not NULL
! 	remap dependence info.
  
! 2019-02-22  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/87609
! 	* tree-core.h (tree_base): Document special clique values.
! 	* tree-inline.c (remap_dependence_clique): Do not use the
! 	special clique value of one.
! 	(maybe_set_dependence_info): Use clique one.
! 	(clear_dependence_clique): New callback.
! 	(compute_dependence_clique): Clear clique one from all refs
! 	before assigning it (again).
  
! 2019-02-21  Martin Sebor  <msebor@redhat.com>
  
! 	* doc/extend.texi (__clear_cache): Correct signature.
  
! 2019-02-21  Ian Lance Taylor  <iant@golang.org>
  
! 	PR go/89170
! 	* varasm.c (decode_addr_const): Call lookup_constant_def rather
! 	than output_constant_def.
! 	(add_constant_to_table): New static function.
! 	(output_constant_def): Call add_constant_to_table.
! 	(tree_output_constant_def): Likewise.
  
! 2019-02-21  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c++/89285
! 	* builtins.c (fold_builtin_arith_overflow): If first two args are
! 	INTEGER_CSTs, set intres and ovfres to constants rather than calls
! 	to ifn.
  
! 2019-02-21  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/87412
! 	* config/i386/i386.c (ix86_set_indirect_branch_type): Issue an
! 	error for -mindirect-branch/-mfunction-return with incompatible
! 	-fcf-protection.
  
! 2019-02-21  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR bootstrap/88714
! 	* constraints.md (q): Remove.
! 	* config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use rk constraint
! 	instead of q.
  
! 2019-02-21  Martin Jambor  <mjambor@suse.cz>
  
! 	PR hsa/89302
! 	* omp-general.c (omp_extract_for_data): Removed a duplicate call
! 	to omp_adjust_for_condition, moved NE_EXPR code_cond processing...
! 	(omp_adjust_for_condition): ...here.  Added necessary parameters.
! 	* omp-general.h (omp_adjust_for_condition): Updated declaration.
! 	* omp-grid.c (grid_attempt_target_gridification): Adjust to pass
! 	proper values to new parameters of omp_adjust_for_condition.
  
! 2019-02-20  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/89412
! 	* expr.c (expand_assignment): If result is a MEM, use change_address
! 	instead of simplify_gen_subreg.
  
! 2019-02-20  Jakub Jelinek  <jakub@redhat.com>
! 	    David Malcolm  <dmalcolm@redhat.com>
  
! 	PR middle-end/89091
! 	* fold-const.c (decode_field_reference): Return NULL_TREE if
! 	lang_hooks.types.type_for_size returns NULL.  Check it before
! 	overwriting *exp_.  Use return NULL_TREE instead of return 0.
  
! 2019-02-20  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/88074
! 	PR middle-end/89415
! 	* toplev.c (do_compile): Double the emin/emax exponents to workaround
! 	buggy mpc_norm.
  
! 2019-02-20  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/89397
! 	* config/i386/i386.c (ix86_atomic_assign_expand_fenv): Check
! 	TARGET_SSE in addition to TARGET_SSE_MATH.
  
! 	(ix86_excess_precision): Ditto.
! 	(ix86_float_exceptions_rounding_supported_p): Ditto.
! 	(use_rsqrt_p): Ditto.
! 	* config/i386/sse.md (rsqrt<mode>2): Ditto.
  
! 2019-02-20  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR c/89410
! 	* diagnostic-show-locus.c (layout::calculate_line_spans): Use
! 	linenum_arith_t when determining if two adjacent line spans are
! 	close enough to merge.
! 	(diagnostic_show_locus): Use linenum_arith_t when iterating over
! 	lines within each line_span.
  
! 2019-02-20 Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	PR target/86487
! 	* lra-constraints.c(uses_hard_regs_p): Fix handling of
! 	paradoxical SUBREGS.
  
! 2019-02-20  Li Jia He  <helijia@linux.ibm.com>
  
! 	PR target/88100
! 	* gcc/config/rs6000/rs6000.c (rs6000_gimple_fold_builtin)
! 	<case ALTIVEC_BUILTIN_VSPLTISB, ALTIVEC_BUILTIN_VSPLTISH,
! 	ALTIVEC_BUILTIN_VSPLTISW>: Don't convert the operand before
! 	range checking it.
  
! 2019-02-19  Jonathan Wakely  <jwakely@redhat.com>
  
! 	* config/gcn/gcn.c (print_operand): Fix typo.
  
! 2019-02-19  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/88074
! 	* toplev.c (do_compile): Initialize mpfr's exponent range
! 	based on available float modes.
  
! 2019-02-19  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* rtlanal.c (get_initial_register_offset): Fall back to the estimate
! 	as long as the epilogue isn't completed.
  
! 2019-02-18  Martin Sebor  <msebor@redhat.com>
  
! 	* doc/cpp.texi (Conditional syntax): Add __has_attribute,
! 	__has_cpp_attribute, and __has_include.
  
! 2019-02-18  Martin Sebor  <msebor@redhat.com>
  
! 	* doc/invoke.texi (-Wreturn-type): Correct and expand.
  
! 2019-02-18  Martin Sebor  <msebor@redhat.com>
  
! 	PR middle-end/89294
! 	* tree.c (valid_constant_size_p): Avoid assuming size is a constant
! 	expression.
! 	* tree.h (cst_size_error): Add the cst_size_not_constant enumerator.
  
! 2019-02-18  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/89296
! 	* tree-ssa-loop-ch.c (ch_base::copy_headers): Restrict setting
! 	of no-warning flag to cases that might emit the bogus warning.
  
! 2019-02-18  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR bootstrap/88714
! 	* config/arm/arm.md (*arm_movdi, *movdf_soft_insn): Use "r" instead of
! 	"q" constraint.
! 	* config/arm/vfp.md (*movdi_vfp): Likewise.
! 	* config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use "r" instead of
! 	"q" constraint for operands[0].
  
! 	PR target/89369
! 	* config/s390/s390.md (*r<noxa>sbg_<mode>_srl_bitmask,
! 	*r<noxa>sbg_<mode>_sll, *r<noxa>sbg_<mode>_srl): Don't construct
! 	pattern in a temporary buffer.
! 	(*r<noxa>sbg_sidi_srl): Likewise.  Always use 32 as I3 rather
! 	than 64-operands[2].
  
! 	PR target/89361
! 	* config/s390/s390.c (s390_indirect_branch_attrvalue,
! 	s390_indirect_branch_settings): Define unconditionally.
! 	(s390_set_current_function): Likewise, but guard the whole body except
! 	the s390_indirect_branch_settings call with
! 	#if S390_USE_TARGET_ATTRIBUTE.
! 	(TARGET_SET_CURRENT_FUNCTION): Redefine unconditionally.
  
! 	* config/s390/s390.md (*<risbg_n>_ior_and_sr_ze,
! 	*<risbg_n>_<mode>_ior_and_lshiftrt, *<risbg_n>_sidi_ior_and_lshiftrt):
! 	Use HOST_WIDE_INT_M1U instead of ~(0ULL).
! 	(*<risbg_n>_and_subregdi_rotr, *<risbg_n>_and_subregdi_rotl): Use
! 	HOST_WIDE_INT_1U instead of 1ULL.
! 	(*pre_z10_extzv<mode>, *pre_z10_extv<mode>): Change mask type from int
! 	to unsigned HOST_WIDE_INT, use HOST_WIDE_INT_1U instead of 1ul.
! 	(*insv<mode><clobbercc_or_nocc>_appendbitsleft,
! 	z = (x << c) | (y >> d) splitters): Use HOST_WIDE_INT_1U
! 	instead of 1UL.
! 	(*insv<mode>_mem_reg, *insvdi_mem_reghigh): Use HOST_WIDE_INT_1U
! 	instead of 1ul.
  
! 2019-02-18  Martin Jambor  <mjambor@suse.cz>
  
! 	PR tree-optimization/89209
! 	* tree-sra.c (create_access_replacement): New optional parameter
! 	reg_tree.  Use it as a type if non-NULL and access type is not of
! 	a register type.
! 	(get_repl_default_def_ssa_name): New parameter REG_TYPE, pass it
! 	to create_access_replacement.
! 	(sra_modify_assign): Pass LHS type to get_repl_default_def_ssa_name.
! 	Check lacc is non-NULL before attempting to re-create it on the RHS.
  
! 2019-02-18  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/89306
! 	* cgraph.c (symbol_table::create_edge): Set m_summary_id to -1
! 	by default.
! 	(symbol_table::free_edge): Recycle m_summary_id.
! 	* cgraph.h (get_summary_id): New.
! 	(symbol_table::release_symbol): Set m_summary_id to -1
! 	by default.
! 	(symbol_table::allocate_cgraph_symbol): Recycle m_summary_id.
! 	* ipa-fnsummary.c (ipa_fn_summary_t): Switch from
! 	function_summary to fast_function_summary.
! 	* ipa-fnsummary.h (ipa_fn_summary_t): Likewise.
! 	* ipa-pure-const.c (class funct_state_summary_t):
! 	Switch from function_summary to fast_function_summary.
! 	* ipa-reference.c (class ipa_ref_var_info_summary_t): Likewise.
! 	(class ipa_ref_opt_summary_t): Switch from function_summary
! 	to fast_function_summary.
! 	* symbol-summary.h (class function_summary_base): New class
! 	that is created from base of former function_summary.
! 	(function_summary_base::unregister_hooks): New.
! 	(class function_summary): Inherit from function_summary_base.
! 	(class call_summary_base): New class
! 	that is created from base of former call_summary.
! 	(class call_summary): Inherit from call_summary_base.
! 	(struct is_same): New.
! 	(class fast_function_summary): New summary class.
! 	(class fast_call_summary): New summary class.
! 	* vec.h (vec_safe_grow_cleared): New function.
  
! 2019-02-18  Martin Liska  <mliska@suse.cz>
  
! 	* config/i386/i386.c (ix86_get_multilib_abi_name): New function.
! 	(TARGET_GET_MULTILIB_ABI_NAME): New macro defined.
! 	* doc/tm.texi: Document new target hook.
! 	* doc/tm.texi.in: Likewise.
! 	* target.def: Add new target macro.
! 	* gcc.c (find_fortran_preinclude_file): Do not search multilib
! 	suffixes.
  
! 2019-02-17  Alan Modra  <amodra@gmail.com>
  
! 	PR target/89271
! 	* config/rs6000/rs6000.md (<bd>_<mode> split): Check for an int
! 	output reg on add insn.
! 	(<bd>tf_<mode> split): Likewise.  Match predicates with insn.
  
! 2019-02-16  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/89372
! 	* config/i386/sse.md (ssedoublemode): Remove V4HI.
! 	(PMULHRSW): Likewise.
! 	(<ssse3_avx2>_pmulhrsw<mode>3): Require TARGET_SSSE3, not
! 	TARGET_AVX2.
! 	(ssse3_pmulhrswv4hi3): New expander.
  
! 2019-02-16  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	* config/i386/mmx.md (*vec_extractv2si_zext_mem): Doesn't require
! 	MMX.  Add isa attribute.
  
! 2019-02-16  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/66152
! 	* builtins.h (c_readstr): Declare.
! 	* builtins.c (c_readstr): Remove forward declaration.  Add
! 	null_terminated_p argument, if false, read all bytes from the
! 	string instead of stopping after '\0'.
! 	* expr.c (string_cst_read_str): New function.
! 	(store_expr): Use string_cst_read_str instead of
! 	builtin_strncpy_read_str.  Try to store by pieces the whole
! 	exp_len first, and only if that fails, split it up into
! 	store by pieces followed by clear_storage.  Formatting fix.
  
! 	* config/i386/i386.md (*movqi_internal): Remove static from
! 	buf variable.  Use output_asm_insn (buf, operands); return "";
! 	instead of return buf;.
! 	* config/i386/sse.md (<sse>_andnot<mode>3<mask_name>,
! 	*<code><mode>3<mask_name>, *andnot<mode>3, *andnottf3, *<code><mode>3,
! 	*<code>tf3, <mask_codefor><code><mode>3<mask_name>): Likewise.
  
! 2019-02-15  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* config/sparc/linux.h (ASAN_CC1_SPEC): Define.
! 	(CC1_SPEC): Use GNU_USER_TARGET_CC1_SPEC and ASAN_CC1_SPEC.
! 	* config/sparc/linux64.h (ASAN_CC1_SPEC): Likewise.
! 	(CC1_SPEC): Likewise.
! 	* config/sparc/sparc.c (sparc_asan_shadow_offset): Adjust for 64-bit.
  
! 2019-02-15  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* asan.c (asan_emit_stack_protection): Use full-sized mask to align
! 	the base address on 64-bit strict-alignment platforms.
  
! 2019-02-15  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	* config/i386/i386.h (VALID_MMX_REG_MODE): Correct the misplaced ')'.
  
! 2019-02-15  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	* config/i386/darwin.h (TARGET_FPMATH_DEFAULT_P): New define.
  
! 2019-02-15  Aaron Sawdey  <acsawdey@linux.ibm.com>
  
! 	PR rtl-optimization/88308
! 	* shrink-wrap.c (move_insn_for_shrink_wrap): Fix LABEL_NUSES counts
! 	on copied instruction.
  
! 2019-02-15  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* final.c (insn_current_reference_address): Replace test on JUMP_P
! 	with test on jump_to_label_p.
! 	* config/visium/visium-passes.def: New file.
! 	* config/visium/t-visium (PASSES_EXTRA): Define.
! 	* config/visium/visium-protos.h (make_pass_visium_reorg): Declare.
! 	* config/visium/visium.h (TRAMPOLINE_SIZE): Adjust.
! 	(TRAMPOLINE_ALIGNMENT): Define.
! 	* config/visium/visium.c (visium_option_override): Do not register
! 	the machine-specific reorg pass here.
! 	(visium_trampoline_init): Align the BRA insn on a 64-bit boundary
! 	for the GR6.
! 	(output_branch): Adjust threshold for long branch instruction.
! 	* config/visium/visium.md (cpu): Move around.
! 	(length): Adjust for the GR6.
  
! 2019-02-15  Richard Biener  <rguenther@suse.de>
! 	    Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/89278
! 	* tree-loop-distribution.c: Include tree-eh.h.
! 	(generate_memset_builtin, generate_memcpy_builtin): Call
! 	rewrite_to_non_trapping_overflow on builtin->size before passing it
! 	to force_gimple_operand_gsi.
  
! 2019-02-15  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR other/89342
! 	* optc-save-gen.awk: Handle optimize_fast like optimize_size or
! 	optimize_debug.
! 	* opth-gen.awk: Likewise.
  
! 2019-02-15  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	* config/i386/i386.h (TARGET_SUBTARGET64_ISA_DEFAULT):
! 	Enable MMX, SSE and SSE2 by default.
! 	* config/i386/i386.c (ix86_option_override_internal): Do not
! 	explicitly set MMX, SSE and SSE2 flags for TARGET_64BIT here.
  
! 2019-02-14  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/89354
! 	* combine.c (make_extraction): Punt if extraction_mode is narrower
! 	than len bits.
  
! 2019-02-14  Maya Rashish  <coypu@sdf.org>
  
! 	* config.gcc (*-*-netbsd*): Add netbsd-d.o.
! 	* config/netbsd-d.c: New file.
! 	* config/t-netbsd: Add netbsd-d.o
  
! 2018-02-14  Steve Ellcey  <sellcey@marvell.com>
  
! 	* config/aarch64/aarch64.c (aarch64_attribute_table): Change
! 	affects_type_identity to true for aarch64_vector_pcs.
! 	(aarch64_comp_type_attributes): New function.
! 	(TARGET_COMP_TYPE_ATTRIBUTES): New macro.
  
! 2019-02-14  Tamar Christina  <tamar.christina@arm.com>
  
! 	PR target/88850
! 	* config/arm/iterators.md (ANY64): Add V4HF.
  
! 2019-02-14  Martin Liska  <mliska@suse.cz>
  
! 	PR rtl-optimization/89242
! 	* dce.c (delete_unmarked_insns): Call free_dominance_info we
! 	process a transformation.
  
! 2019-02-14  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/89314
! 	* fold-const.c (fold_binary_loc): Cast strlen argument to
! 	const char * before dereferencing it.  Formatting fixes.
  
! 	PR middle-end/89284
! 	* passes.def: Swap pass_ubsan and pass_early_warn_uninitialized.
  
! 2019-02-13  Ian Lance Taylor  <iant@golang.org>
  
! 	* optc-save-gen.awk: Set var_opt_hash for initial optimizations
! 	and set current index for other optimizations.
  
! 2019-02-13  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	* config/i386/sse.md (vec_set<VI4F_256_512:mode>_0): Use
! 	nonimmediate_operand as operand 2 predicate.
! 	(vec_set<VF2_512_256:mode>_0): Ditto.
! 	(vec_set<VI8_AVX_AVX512F:mode>_0): Ditto.
! 	(*vec_concatv2si): Remove alternative 2.
! 	(*vec_concatv4si_0): Use vm constraint for alternative 0.
! 	(*vec_concatv4si_0): Remove preferred_for_speed attribute.
! 	(vec_concatv2di): Split alternatives 4,5,6 to ...
! 	(*vec_concatv2di_0) ... new pattern.
  
! 2019-02-13  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	PR target/89190
! 	* config/arm/arm.c (ldm_stm_operation_p) Set
! 	addr_reg_in_reglist correctly for first register.
! 	(load_multiple_sequence): Remove dead base check.
! 	(gen_ldm_seq): Correctly set write_back for Thumb-1.
  
! 2019-02-13  Tamar Christina  <tamar.christina@arm.com>
  
! 	PR target/88847
! 	* config/aarch64/aarch64-sve.md (*pred_mov<mode>, pred_mov<mode>):
! 	Expose as @aarch64_pred_mov.
! 	* config/aarch64/aarch64.c (aarch64_classify_address):
! 	Use expand_insn which legitimizes operands.
  
! 2019-02-13  Martin Liska  <mliska@suse.cz>
  
! 	* builtins.h (expand_builtin_with_bounds): Remove declaration.
! 	* calls.c (struct arg_data): Remove special_slot, pointer_arg
! 	and pointer_offset fields.
! 	(initialize_argument_information): Remove usage of dead
! 	fields.
! 	* cgraph.h (struct cgraph_thunk_info): Remove
! 	add_pointer_bounds_args.
! 	* cgraphunit.c (cgraph_node::expand_thunk): Remove usage of dead
! 	fields.
! 	(cgraph_node::assemble_thunks_and_aliases): Remove usage of dead
! 	fields.
! 	* config/i386/i386.c (ix86_function_arg_advance): Remove
! 	unrelated comment.
! 	(struct builtin_isa): Remove leaf_p and nothrow_p fields.
! 	(def_builtin):  Remove usage of dead
! 	fields.
! 	(ix86_add_new_builtins): Likewise.
! 	* ipa-fnsummary.c (compute_fn_summary): Likewise.
! 	* ipa-icf.c (sem_function::equals_wpa): Likewise.
! 	(sem_function::init): Likewise.
! 	(sem_variable::merge): Likewise.
! 	* ipa-visibility.c (function_and_variable_visibility): Likewise.
! 	* ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
! 	* lto-cgraph.c (lto_output_node): Likewise.
! 	(lto_output_varpool_node): Likewise.
! 	(input_node): Likewise.
! 	(input_varpool_node): Likewise.
! 	* lto-streamer-out.c (lto_output): Likewise.
! 	* tree-inline.c (expand_call_inline): Remove usage of
! 	assign_stmts.
! 	* tree-inline.h (struct copy_body_data): Likewise.
! 	* varpool.c (varpool_node::dump): Likewise.
  
! 2019-02-13  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/89303
! 	* tree-ssa-structalias.c (set_uids_in_ptset): Or in vi->is_heap_var
! 	into pt->vars_contains_escaped_heap instead of setting
! 	pt->vars_contains_escaped_heap to it.
  
! 	PR middle-end/89281
! 	* optabs.c (prepare_cmp_insn): Use UINTVAL (size) instead of
! 	INTVAL (size), compare it to GET_MODE_MASK instead of
! 	1 << GET_MODE_BITSIZE.
  
! 	PR target/89290
! 	* config/i386/predicates.md (x86_64_immediate_operand): Allow
! 	TLS UNSPECs offsetted by signed 32-bit CONST_INT even with
! 	-mcmodel=large.
  
! 2019-02-13  Martin Liska  <mliska@suse.cz>
  
! 	PR lto/88858
! 	* cfgrtl.c (remove_barriers_from_footer): New function.
! 	(try_redirect_by_replacing_jump): Use it.
! 	(cfg_layout_redirect_edge_and_branch): Likewise.
  
! 2019-02-13  Xiong Hu Luo  <luoxhu@linux.vnet.ibm.com>
  
! 	* config/rs6000/altivec.h (vec_sbox_be, vec_cipher_be,
! 	vec_cipherlast_be, vec_ncipher_be, vec_ncipherlast_be): New #defines.
! 	* config/rs6000/crypto.md (CR_vqdi): New define_mode_iterator.
! 	(crypto_vsbox_<mode>, crypto_<CR_insn>_<mode>): New define_insns.
! 	* config/rs6000/rs6000-builtin.def (VSBOX_BE): New BU_CRYPTO_1.
! 	(VCIPHER_BE, VCIPHERLAST_BE, VNCIPHER_BE, VNCIPHERLAST_BE):
! 	New BU_CRYPTO_2.
! 	* config/rs6000/rs6000.c (builtin_function_type)
! 	<CRYPTO_BUILTIN_VSBOX_BE, CRYPTO_BUILTIN_VCIPHER_BE,
! 	CRYPTO_BUILTIN_VCIPHERLAST_BE, CRYPTO_BUILTIN_VNCIPHER_BE,
! 	CRYPTO_BUILTIN_VNCIPHERLAST_BE>: New switch options.
! 	* doc/extend.texi (vec_sbox_be, vec_cipher_be, vec_cipherlast_be,
! 	vec_ncipher_be, vec_ncipherlast_be): New builtin functions.
  
! 2019-02-12  Pat Haugen  <pthaugen@us.ibm.com>
  
! 	* doc/invoke.texi (RS/6000 and PowerPC Options): Remove duplicate
! 	-maltivec. Delete -maltivec=be and -maltivec=le documentation.
  
! 2019-02-12  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/89229
! 	* config/i386/i386.md (*movoi_internal_avx): Revert revision
! 	268678 and revision 268657.
! 	(*movti_internal): Likewise.
  
! 2019-02-12  Ilya Leoshkevich  <iii@linux.ibm.com>
  
! 	PR target/89233
! 	* config/s390/s390.c (s390_decompose_address): Update comment.
! 	(s390_check_qrst_address): Reject invalid address forms after
! 	LRA.
  
! 2019-02-12  Martin Liska  <mliska@suse.cz>
  
! 	PR lto/88876
! 	* ipa-pure-const.c (propagate_pure_const): Revert hunk as
! 	we need default values of funct_state for a function that
! 	is not optimized.
  
! 2019-02-12  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* asan.c (asan_expand_mark_ifn): Take into account the alignment of
! 	the object to pick the size of stores on strict-alignment platforms.
  
! 	* config/sparc/sparc.md (*movsi_insn): Minor tweak.
! 	(*movdi_insn_sp32): Likewise.
! 	(*movdi_insn_sp64): Likewise.
  
! 2019-02-12  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR lto/88677
! 	* cgraphunit.c (analyze_functions): Clear READONLY flag for external
! 	types that needs constructiong.
! 	* tree.h (may_be_aliased): Do not check TYPE_NEEDS_CONSTRUCTING.
  
! 2019-02-12  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/89253
! 	* tree-ssa-loop-split.c (tree_ssa_split_loops): Check we can
! 	duplicate the loop.
  
! 2019-02-11  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR lto/88147
! 	* input.c (selftest::test_line_offset_overflow): New selftest.
! 	(selftest::input_c_tests): Call it.
  
! 2019-02-11  Martin Sebor  <msebor@redhat.com>
  
! 	PR tree-optimization/88771
! 	* gimple-ssa-warn-restrict.c (pass_wrestrict::gate): Also enable
! 	when -Wstringop-overflow is set.
! 	(builtin_memref::builtin_memref): Adjust excessive upper bound
! 	only when lower bound is not excessive.
! 	(maybe_diag_overlap): Detect and diagnose excessive bounds via
! 	-Wstringop-ovefflow.
! 	(maybe_diag_offset_bounds): Rename...
! 	(maybe_diag_access_bounds): ...to this.
! 	(check_bounds_or_overlap): Adjust for name change above.
  
! 2019-02-11  Martin Sebor  <msebor@redhat.com>
  
! 	PR c++/87996
! 	* builtins.c (max_object_size): Move from here...
! 	* builtins.h (max_object_size): ...and here...
! 	* tree.c (max_object_size): ...to here...
! 	* tree.h (max_object_size): ...and here.
  
! 2019-02-11  Bill Schmidt  <wschmidt@linux.ibm.com>
  
! 	* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Shift-right
! 	and shift-left vector built-ins need to include a TRUNC_MOD_EXPR
! 	for correct semantics.
  
! 2019-02-11  Alan Modra  <amodra@gmail.com>
  
! 	* doc/invoke.texi (man page RS/6000 and PowerPC Options): Mention
! 	-mlongcall and -mpltseq.
! 	(RS/6000 and PowerPC Options <-mlongcall>): Mention inline PLT calls.
! 	(RS/6000 and PowerPC Options <-mpltseq>): Document.
! 	* config/rs6000/rs6000.h (TARGET_PLTSEQ): Define.
! 	* config/rs6000/sysv4.opt (mpltseq): New option.
! 	* config/rs6000/sysv4.h (TARGET_PLTSEQ): Redefine.
! 	(SUBTARGET_OVERRIDE_OPTIONS): Error if given -mpltseq when assembler
! 	support is lacking.  Don't allow -mpltseq with -mbss-plt.
! 	* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Warn if
! 	-mpltseq given for ELFv1.
! 	* config/rs6000/rs6000.c (rs6000_call_aix): Comment on UNSPEC_PLTSEQ.
! 	Only use UNSPEC_PLTSEQ for inline PLT calls.
! 	(rs6000_call_sysv, rs6000_sibcall_sysv): Expand comments.  Only
! 	use UNSPEC_PLTSEQ for inline PLT calls.
! 	(rs6000_indirect_call_template_1, rs6000_longcall_ref),
! 	(rs6000_call_aix, rs6000_call_sysv, rs6000_sibcall_sysv): Replace
! 	uses of HAVE_AS_PLTSEQ with TARGET_PLTSEQ, simplifying.
! 	* config/rs6000/rs6000.md (pltseq_tocsave_<mode>),
! 	(pltseq_plt16_ha_<mode>, pltseq_plt16_lo_<mode>),
! 	(pltseq_mtctr_<mode>): Likewise.
  
! 2019-02-11  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
  
! 	* acinclude.m4 (gcc_AC_INITFINI_ARRAY): Use 8-byte strings with
! 	Solaris ld.
! 	* configure: Regenerate.
  
! 2019-02-11  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR bootstrap/88714
! 	* config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use q constraint
! 	instead of r.
  
! 2019-02-11  Hans-Peter Nilsson  <hp@axis.com>
  
! 	* function.c (assign_parm_setup_block): Use the stored
! 	size, not the passed size, when allocating stack-space,
! 	also for a parameter with alignment larger than
! 	MAX_SUPPORTED_STACK_ALIGNMENT.
  
! 2019-02-11  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/89009
! 	* ipa-cp.c (build_toporder_info): Remove usage of a param.
! 	* ipa-inline.c (inline_small_functions): Likewise.
! 	* ipa-pure-const.c (propagate_pure_const): Likewise.
! 	(propagate_nothrow): Likewise.
! 	* ipa-reference.c (propagate): Likewise.
! 	* ipa-utils.c (struct searchc_env): Remove unused field.
! 	(searchc): Always search across AVAIL_INTERPOSABLE.
! 	(ipa_reduced_postorder): Always allow AVAIL_INTERPOSABLE as
! 	the only called IPA pure const can properly not propagate
! 	across interposable boundary.
! 	* ipa-utils.h (ipa_reduced_postorder): Remove param.
  
! 2019-02-11  Chung-Ju Wu  <jasonwucj@gmail.com>
  
! 	* config/nds32/nds32.md (call_internal, call_value_internal,
! 	sibcall_internal, sibcall_value_internal): Use SImode for mem rtx.
  
! 2019-02-11  Hans-Peter Nilsson  <hp@axis.com>
  
! 	* config/cris/cris.c (cris_preferred_minimum_alignment): Fix name
! 	typo.
  
! 2019-02-10  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	* config/i386/constraints.md (Yd): Replace AVX512BW with AVX512DQ
! 	in comments
  
! 2019-02-10  Chung-Ju Wu  <jasonwucj@gmail.com>
  
! 	* config.gcc (with_nds32_lib): Set default --with-nds32-lib correctly.
  
! 2019-02-10  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/89268
! 	* tree-if-conv.c (version_loop_for_if_conversion): Push to preds only
! 	if preds is non-NULL.
  
! 2019-02-09  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR lto/89272
! 	* tree.c (fld_simplified_type_name): Also keep TYPE_DECL for
! 	polymorphic types.
  
! 2019-02-10  Monk Chiang  <sh.chiang04@gmail.com>
  
! 	* config/nds32/nds32.md (trap): New pattern.
  
! 2019-02-10  Monk Chiang  <sh.chiang04@gmail.com>
  
! 	* config/nds32/nds32.c (nds32_dwarf_register_span): Refine register
! 	dwarf span.
  
! 2019-02-10  Chung-Ju Wu  <jasonwucj@gmail.com>
  
! 	* config/nds32/nds32-md-auxiliary.c (nds32_spilt_doubleword): Support
! 	to split POST_INC.
  
! 2019-02-09  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* ipa-visibility.c (localize_node): Also do not localize
! 	LDPR_PREVAILING_DEF_IRONLY_EXP.
  
! 2019-02-09  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR lto/87957
! 	* tree.c (fld_simplified_type_name): Use DECL_ASSEMBLER_NAME_SET_P
! 	instead of type_with_linkage.
  
! 2019-02-09  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR ipa/88755
! 	* params.def (uninlined-function-insns, uninlined-function-time,
! 	uninlined-thunk-insns, uninlined-thunk-time): Add artificial upper
! 	bound so we don't get overflows.
  
! 2019-02-09  Aaron Sawdey  <acsawdey@linux.ibm.com>
  
! 	* config/rs6000/rs6000-string.c (expand_compare_loop,
! 	expand_block_compare): Insert REG_BR_PROB notes in inline expansion of
! 	memcmp/strncmp.
  
! 2019-02-09  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/89246
! 	* config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
! 	If !node->definition and TYPE_ARG_TYPES is non-NULL, use
! 	TYPE_ARG_TYPES instead of DECL_ARGUMENTS.
  
! 2019-02-09  Alan Modra  <amodra@gmail.com>
  
! 	PR target/88343
! 	* config/rs6000/rs6000.c (save_reg_p): Correct calls_eh_return
! 	case.  Match logic in rs6000_emit_prologue emitting pic_offset_table
! 	setup.
  
! 2019-02-08  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR middle-end/88560
! 	* lra-constraints.c (process_alt_operands): Don't increase reject
! 	for memory when offset memory is required.
  
! 2019-02-08  Robin Dapp  <rdapp@linux.ibm.com>
  
! 	* config/s390/vector.md: Implement vector copysign.
  
! 2019-02-08  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	* expr.c (expand_constructor): Correct indentations.
  
! 2019-02-08  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/89247
! 	* tree-if-conv.c: Include tree-cfgcleanup.h.
! 	(version_loop_for_if_conversion): Record LOOP_VECTORIZED call.
! 	(tree_if_conversion): Pass through predicate vector.
! 	(pass_if_conversion::execute): Do CFG cleanup and SSA update
! 	inline, see if any if-converted loops we refrece in
! 	LOOP_VECTORIZED calls vanished and fixup.
! 	* tree-if-conv.h (tree_if_conversion): Adjust prototype.
  
! 2019-02-08  Ilya Leoshkevich  <iii@linux.ibm.com>
  
! 	* config/s390/constraints.md (jdd): New constraint.
  
! 2019-02-08  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/89229
! 	* config/i386/i386.md (*movoi_internal_avx): Set mode to XI for
! 	upper 16 vector registers without TARGET_AVX512VL.
! 	(*movti_internal): Likewise.
  
! 2019-02-08  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/89234
! 	* except.c (copy_reg_eh_region_note_forward): Return if note_or_insn
! 	is a NOTE, CODE_LABEL etc. - rtx_insn * other than INSN_P.
! 	(copy_reg_eh_region_note_backward): Likewise.
  
! 2019-02-08  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/89223
! 	* tree-data-ref.c (initialize_matrix_A): Fail if constant
! 	doesn't fit in HWI.
! 	(analyze_subscript_affine_affine): Handle failure from
! 	initialize_matrix_A.
  
! 2019-02-08  Jakub Jelinek  <jakub@redhat.com>
  
! 	* cfganal.c (pre_and_rev_post_order_compute_fn): Use fn instead of
! 	cfun everywhere.
  
! 2019-02-07  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR tree-optimization/86637
! 	PR tree-optimization/89235
! 	* tree-vect-loop.c (optimize_mask_stores): Add an
! 	auto_purge_vect_location sentinel to ensure that vect_location is
! 	purged on exit.
! 	* tree-vectorizer.c
! 	(auto_purge_vect_location::~auto_purge_vect_location): New dtor.
! 	(try_vectorize_loop_1): Add an auto_purge_vect_location sentinel
! 	to ensure that vect_location is purged on exit.
! 	(pass_slp_vectorize::execute): Likewise, replacing the manual
! 	reset.
! 	* tree-vectorizer.h (class auto_purge_vect_location): New class.
  
! 2019-02-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
! 	* config/aarch64/iterators.md (max_opp): New code_attr.
! 	(USMAX): New code iterator.
! 	* config/aarch64/predicates.md (aarch64_smin): New predicate.
! 	(aarch64_smax): Likewise.
! 	* config/aarch64/aarch64-simd.md (abd<mode>_3): Rename to...
! 	(*aarch64_<su>abd<mode>_3): ... Change RTL representation to
! 	MINUS (MAX MIN).
  
! 2019-02-07  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/89229
! 	* config/i386/i386.md (*movoi_internal_avx): Set mode to OI
! 	for TARGET_AVX512VL.
! 	(*movti_internal): Set mode to TI for TARGET_AVX512VL.
  
! 2019-02-07  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390-builtin-types.def: Add new types.
! 	* config/s390/s390-builtins.def: (s390_vec_xl, s390_vec_xld2)
! 	(s390_vec_xlw4): Make the memory operand into a const pointer.
! 	(s390_vec_xld2, s390_vec_xlw4): Add a variant for single precision
! 	float.
! 	* config/s390/s390-c.c (s390_expand_overloaded_builtin): Generate
! 	a new vector type with the alignment of the scalar memory operand.
  
! 2019-02-07  Matthew Malcomson  <matthew.malcomson@arm.com>
! 	    Jakub Jelinek  <jakub@redhat.com>
  
! 	PR bootstrap/88714
! 	* config/arm/arm-protos.h (valid_operands_ldrd_strd,
! 	arm_count_ldrdstrd_insns): New declarations.
! 	* config/arm/arm.c (mem_ok_for_ldrd_strd): Remove broken handling of
! 	MINUS.
! 	(valid_operands_ldrd_strd): New function.
! 	(arm_count_ldrdstrd_insns): New function.
! 	* config/arm/ldrdstrd.md: Change peepholes to generate PARALLEL SImode
! 	sets instead of single DImode set and define new insns to match this.
  
! 2019-02-07  Tamar Christina  <tamar.christina@arm.com>
  
! 	* config/aarch64/aarch64-builtins.c (aarch64_fcmla_lane_builtin_data):
! 	Make it a C initializer.
  
! 2019-02-07  Tamar Christina  <tamar.christina@arm.com>
  
! 	PR/target 88850
! 	* config/arm/neon.md (*neon_mov<mode>): Add r -> r case.
  
! 2019-02-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
! 	* config/arm/neon.md (neon_<sup>dot<vsi2qi>):
! 	Use neon_dot<q> for type.
! 	(neon_<sup>dot_lane<vsi2qi>): Likewise.
  
! 2019-02-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
! 	* config/aarch64/aarch64-simd.md (aarch64_<sur>dot<vsi2qi>):
! 	Use neon_dot<q> for type.
! 	(aarch64_<sur>dot_lane<vsi2qi>): Likewise.
! 	(aarch64_<sur>dot_laneq<vsi2qi>): Likewise.
  
! 2019-02-06  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR rtl-optimization/89225
! 	* lra-constaints.c (simplify_operand_subreg): Add subreg mode
! 	sizes check.
  
! 2019-02-06  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* config/i386/i386.c (ix86_expand_prologue): Emit a memory blockage
! 	after restoring registers saved to allocate the frame on Windows.
  
! 2019-02-06  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/89182
! 	* graphite.h (cached_scalar_evolution_in_region): Declare.
! 	* graphite.c (struct seir_cache_key): New.
! 	(struct sese_scev_hash): Likewise.
! 	(seir_cache): New global.
! 	(cached_scalar_evolution_in_region): New function.
! 	(graphite_transform_loops): Allocate and release seir_cache.
! 	* graphite-isl-ast-to-gimple.c (get_rename_from_scev): Use
! 	cached_scalar_evolution_in_region.
! 	* graphite-scop-detection.c (scop_detection::can_represent_loop):
! 	Simplify.
! 	(scop_detection::graphite_can_represent_expr: Use
! 	cached_scalar_evolution_in_region.
! 	(scop_detection::stmt_simple_for_scop_p): Likewise.
! 	(find_params_in_bb): Likewise.
! 	(gather_bbs::before_dom_children): Likewise.
! 	* graphite-sese-to-poly.c (create_pw_aff_from_tree): Likewise.
! 	(add_loop_constraints): Likewise.
  
! 2019-02-06  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/89210
! 	* fold-const-call.c (fold_const_vec_convert): Pass true as last
! 	operand to new_unary_operation only if both element types are integral
! 	and it isn't a widening conversion.  Return NULL_TREE if
! 	new_unary_operation failed.
  
! 2019-02-05  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	PR target/88856
! 	* config/s390/s390.md: Remove load and test FP splitter.
  
! 2019-02-05  Aaron Sawdey  <acsawdey@linux.ibm.com>
  
! 	PR target/89112
! 	* config/rs6000/rs6000-string.c (do_ifelse, expand_cmp_vec_sequence,
! 	expand_compare_loop, expand_block_compare_gpr,
! 	expand_strncmp_align_check, expand_strncmp_gpr_sequence): Insert
! 	REG_BR_PROB notes in inline expansion of memcmp/strncmp. Add
! 	#include "profile-count.h" and "predict.h" for types and functions
! 	needed to work with REG_BR_PROB notes.
  
! 2019-02-05  Aaron Sawdey  <acsawdey@linux.ibm.com>
  
! 	PR target/89112
! 	* config/rs6000/rs6000.md (<bd>tf_<mode>): Generate a local label
! 	for the long branch case.
  
! 2019-02-05  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/89188
! 	* dce.c (delete_unmarked_insns): Don't remove no-op moves if they
! 	can throw, non-call exceptions are enabled and we can't delete
! 	dead exceptions or alter cfg.  Set must_clean if
! 	delete_insn_and_edges returns true, don't set it blindly for calls.
! 	Assert that delete_unreachable_blocks is called only if can_alter_cfg.
  
! 	PR rtl-optimization/89195
! 	* combine.c (make_extraction): For MEMs, don't extract bytes outside
! 	of the original MEM.
  
! 2019-02-05  Martin Liska  <mliska@suse.cz>
  
! 	PR gcov-profile/89000
! 	* gcov.c (function_summary): Remove argument.
! 	(file_summary): New function.
! 	(print_usage): Replace tabs with spaces.
! 	(generate_results): Use new function file_summary.
  
! 2019-02-05  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/89186
! 	* optabs.c (prepare_cmp_insn): Pass x and y to
! 	emit_block_comp_via_libcall rather than XEXP (x, 0) and XEXP (y, 0).
  
! 2019-02-05  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/89150
! 	* bitmap.h (struct bitmap_obstack): Do not mark GTY.
! 	(struct bitmap_element): Drop chain_prev so we properly recurse on
! 	the prev member, supporting tree views.
! 	(struct bitmap_head): GTY skip the obstack member.
  
! 2019-02-04  Alexander Monakov  <amonakov@ispras.ru>
  
! 	PR c/88698
! 	* doc/extend.texi (Vector Extensions): Add an example of using vector
! 	types together with x86 intrinsics.
  
! 2019-02-04  Alan Modra  <amodra@gmail.com>
  
! 	* config/rs6000/rs6000.c (rs6000_indirect_call_template_1): Increase
! 	str[] size to 160, and comment.
  
! 2019-02-04  Alan Modra  <amodra@gmail.com>
  
! 	* config/rs6000/rs6000.c (rs6000_indirect_call_template_1),
! 	(rs6000_pltseq_template): Guard output of TLS markers with
! 	TARGET_TLS_MARKERS.
! 	(rs6000_longcall_ref, rs6000_call_aix, rs6000_call_sysv),
! 	(rs6000_sibcall_sysv): Ignore TARGET_TLS_MARKERS when deciding
! 	to use inline PLT sequences.
! 	* config/rs6000/rs6000.md (pltseq_tocsave_<mode>),
! 	(pltseq_plt16_ha_<mode>, pltseq_plt16_lo_<mode>),
! 	(pltseq_mtctr_<mode>): Don't test TARGET_TLS_MARKERS in predicate.
  
! 2019-02-04  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/88985
! 	* ipa-fnsummary.c (estimate_edge_devirt_benefit): Bail
! 	out when ipa_fn_summaries does not contain entry for callee.
  
! 2019-02-04  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* config/sparc/sparc.h: Remove superfluous blank lines.
! 	* config/sparc/sparc.c (global_offset_table_rtx): Rename into...
! 	(got_register_rtx): ...this.
! 	(sparc_got): Adjust to above renaming.
! 	(sparc_tls_got): Likewise.
! 	(sparc_delegitimize_address): Likewise.
! 	(sparc_output_mi_thunk): Likewise.
! 	(sparc_init_pic_reg): Likewise.
! 	(save_local_or_in_reg_p): Fix test on the GOT register.
! 	(USE_HIDDEN_LINKONCE): Move around.
! 	(get_pc_thunk_name): Likewise.
! 	(gen_load_pcrel_sym): Likewise.
! 	(load_got_register): Likewise.
  
! 2019-02-04  Kito Cheng  <kito.cheng@gmail.com>
  
! 	* config/nds32/linux.h (GLIBC_DYNAMIC_LINKER): Define the naming rule
! 	of the dynamic linker: "ld-linux-nds32[le|be][f].so.1".
  
! 2019-02-04  Chung-Ju Wu  <jasonwucj@gmail.com>
  
! 	* config/nds32/nds32.c (nds32_legitimate_address_p): Add TLS model
! 	into consideration.
  
! 2019-02-04  Chung-Ju Wu  <jasonwucj@gmail.com>
  
! 	* config.gcc (with_nds32_lib, glibc):
! 	Remove TARGET_DEFAULT_TLSDESC_TRAMPOLINE=0 setting.
! 	* config/nds32/linux.h (TARGET_DEFAULT_TLSDESC_TRAMPOLINE): Delete.
! 	(NDS32_TLSDESC_TRAMPOLINE_SPEC): Delete.
  
! 2019-02-03  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/89071
! 	* config/i386/i386.md (*sqrt<mode>2_sse): Add (v,0) alternative.
! 	Do not prefer (v,v) alternative for non-AVX targets and (m,v)
! 	alternative for speed when TARGET_SSE_PARTIAL_REG_DEPENDENCY is set.
! 	(*rcpsf2_sse): Ditto.
! 	(*rsqrtsf2_sse): Ditto.
! 	(sse4_1_round<mode<2): Ditto.
  
! 2019-02-03  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/87295
! 	* dwarf2out.c (copy_ancestor_tree): Register non-stubs as
! 	orig.
  
! 2019-02-02  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/87887
! 	* config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
! 	Punt with warning on aggregate return or argument types.  Ignore
! 	type/mode checking for uniform arguments.
  
! 2019-02-01  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	* combine.c (try_combine): Do not print "Can't combine" messages unless
! 	printing failed combination attempts.
  
! 2019-02-01  Martin Jambor  <mjambor@suse.cz>
  
! 	PR hsa/87863
! 	* omp-grid.c (grid_mark_variable_segment): Set assembler name of group
! 	segment and global segment variables before making them static.
  
! 2019-02-01  Martin Jambor  <mjambor@suse.cz>
  
! 	* omp-grid.c (grid_target_follows_gridifiable_pattern): Guard two
! 	missed optimization dump with dump_enabled_p.
  
! 2019-02-01  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/88597
! 	* tree-scalar-evolution.c (analyze_scalar_evolution): Set up
! 	the instantiate cache.
! 	(instantiate_scev_binary): Elide second operand procesing
! 	if equal to the first.
! 	* tree-chrec.c (chrec_contains_symbols): Add visited set.
! 	(chrec_contains_undetermined): Likewise.
! 	(tree_contains_chrecs): Likewise.
  
! 2019-02-01  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* parms.def (MAX_INLINE_INSNS_SINGLE): Reduce from 400 to 200.
  
! 2019-02-01  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/89143
! 	* wide-int-range.h (wide_int_range_absu): Declare.
! 	* wide-int-range.cc (wide_int_range_absu): New function.
! 	* tree-vrp.c (extract_range_from_unary_expr): Handle ABSU_EXPR.
  
! 	PR tree-optimization/88107
! 	* tree-cfg.c (find_outermost_region_in_block): Add ALL argument,
! 	instead of assertion that eh_region_outermost is non-NULL, if it
! 	is NULL, set *ALL to true and return NULL.
! 	(move_sese_region_to_fn): Adjust caller, if all is set, call
! 	duplicate_eh_regions with NULL region.
  
! 2019-02-01  Richard Biener  <rguenth@suse.de>
  
! 	PR rtl-optimization/88593
! 	* mode-switching.c (optimize_mode_switching): Free dominators before
! 	calling cleanup_cfg.
  
! 2019-02-01  Bin Cheng  <bin.cheng@linux.alibaba.com>
  
! 	PR tree-optimization/88932
! 	* tree-predcom.c (try_combine_chains): Get loop bbs in dom order.
  
! 2019-01-31  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/89137
! 	* omp-low.c (lower_omp_task_reductions): Drop redundant test to avoid
! 	bogus clang warning.
  
! 2019-01-31  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/89071
! 	* config/i386/i386.md (*extendsfdf2): Split out reg->reg
! 	alternative to avoid partial SSE register stall for TARGET_AVX.
! 	(truncdfsf2): Ditto.
! 	(sse4_1_round<mode>2): Ditto.
  
! 2018-01-31  Bill Schmidt  <wschmidt@linux.ibm.com>
  
! 	PR tree-optimization/89008
! 	* gimple-ssa-strength-reduction.c (slsr_process_mul): Don't
! 	process anything of the form X * 0.
  
! 2019-01-31  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/89135
! 	* tree-ssa-phiprop.c (pass_phiprop::execute): Skip blocks
! 	with abnormal preds.
  
! 2019-01-31  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR sanitizer/89124
! 	* ipa-inline.c (sanitize_attrs_match_for_inline_p): Allow inlining
! 	always_inline callees into no_sanitize_address callers.
  
! 2019-01-31  Richard Biener  <rguenther@suse.de>
  
! 	PR rtl-optimization/89115
! 	* lra.c (lra_rtx_hash): Properly hash CONST_INT values.
  
! 2019-01-30  Martin Sebor  <msebor@redhat.com>
  
! 	PR other/89106
! 	* doc/extend.texi (cast to a union): Correct and expand.
  
! 2019-01-30  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR rtl-optimization/87246
! 	* lra-constraints.c (simplify_operand_subreg): Reload memory
! 	in subreg if the address became invalid.
  
! 2019-01-30  Bill Schmidt  <wschmidt@linux.ibm.com>
  
! 	PR target/87064
! 	* config/rs6000/vsx.md (*vsx_reduc_<VEC_reduc_name>_v4sf_scalar):
! 	Disable for little-endian.
  
! 2019-01-30  Richard Biener  <rguenther@suse.de>
  
! 	PR rtl-optimization/89115
! 	* opts.c (default_options_optimization): Reduce
! 	PARAM_MAX_DSE_ACTIVE_LOCAL_STORES by a factor of 10 at -O1.
! 	Make PARAM_LOOP_INVARIANT_MAX_BBS_IN_LOOP reduction relative
! 	to the default.
  
! 2019-01-30  Kelvin Nilsen  <kelvin@gcc.gnu.org>
  
! 	* config/rs6000/rs6000-c.c (altivec-resolve_overloaded_builtin):
! 	Change handling of ALTIVEC_BUILTIN_VEC_EXTRACT.  Coerce result to
! 	type of vector element when vec_extract is implemented by direct
! 	move.
  
! 2019-01-30  Thomas Schwinge  <thomas@codesourcery.com>
  
! 	* doc/invoke.texi (C Language Options): List "-fopenacc-dim".
  
! 2019-01-30  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/89111
! 	* tree-ssa-loop-im.c (gather_mem_refs_stmt): Restrict
! 	canonicalization to appropriately sized access types.
  
! 2019-01-30  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c++/89105
! 	* config/i386/i386.c (ix86_warn_parameter_passing_abi): Don't warn
! 	for arguments to functions that are TU-local and shouldn't be
! 	referenced by assembly.
  
! 2019-01-30  Ulrich Drepper  <drepper@redhat.com>
  
! 	* dumpfile.c (opt_info_switch_p_1): Ignore '-' if it appears
! 	after '='.
  
! 2019-01-29  Martin Sebor  <msebor@redhat.com>
  
! 	PR c/88956
! 	* gimple-fold.c (fold_array_ctor_reference): Avoid zero-length arrays.
  
! 2019-01-29  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c++/66676
! 	PR ipa/89104
! 	* omp-simd-clone.c (simd_clone_clauses_extract)
! 	<case OMP_CLAUSE_ALIGNED>: Ignore clauses with NULL
! 	OMP_CLAUSE_ALIGNED_ALIGNMENT.
  
! 2019-01-29  Vineet Gupta  <vgupta@synopsys.com>
  
! 	* config.gcc: Force .init_array for ARC.
  
! 2019-01-29  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/87295
! 	* dwarf2out.c (collect_skeleton_dies): New helper.
! 	(copy_decls_for_unworthy_types): Call it.
! 	(build_abbrev_table): Assert we do not try to replace
! 	DW_AT_signature refs with local refs.
  
! 2019-01-28  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/89002
! 	* gimplify.c (gimplify_omp_for): When adding OMP_CLAUSE_*_GIMPLE_SEQ
! 	for lastprivate/linear IV, push gimplify context around gimplify_assign
! 	and, if it needed any temporaries, pop it into a gimple bind around the
! 	sequence.
  
! 2019-01-28  Bernd Edlinger  <bernd.edlinger@hotmail.de>
  
! 	* common.opt (-Wattribute-alias): Remove "no-" from name.
! 	Make -Wattribute-alias command line option and
! 	#pragma GCC diagnostic ignored "-Wattribute-alias" work again.
  
! 2019-01-28  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/89073
! 	* doc/invoke.texi (-mclwb, -mprfchw, -mrdpid, -mrdseed, -msgx,
! 	-madx, -mhle, -mavx5124fmaps, -mavx512vnni, -mavx5124vnniw): Document
! 	x86 ISA options.
! 	(bmi2): Add missing @opindex.
! 	* doc/extend.texi (x86 target attribute): Move fma4, lwp, ssse3
! 	options alphabetically.  Add missing 3dnow, 3dnowa, adx, avx, avx2,
! 	avx5124fmaps, avx5124vnniw, avx512bitalg, avx512bw, avx512cd,
! 	avx512dq, avx512er, avx512f, avx512ifma, avx512pf, avx512vbmi,
! 	avx512vbmi2, avx512vl, avx512vnni, avx512vpopcntdq, bmi, bmi2,
! 	cldemote, clflushopt, clwb, clzero, crc32, cx16, f16c, fma, fsgsbase,
! 	fxsr, gfni, hle, lzcnt, movbe, movdir64b, movdiri, mwaitx, pconfig,
! 	pku, prefetchwt1, prfchw, ptwrite, rdpid, rdrnd, rdseed, rtm, sahf,
! 	sgx, sha, shstk, tbm, vaes, vpclmulqdq, waitpkg, wbnoinvd, xsave,
! 	xsavec, xsaveopt and xsaves options.
  
! 2019-01-28  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/89076
! 	* dwarf2out.c (gen_subprogram_die): Remove leftover from MPX
! 	support removal.
  
! 2019-01-28  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/88739
! 	* tree-cfg.c (verify_types_in_gimple_reference): Verify
! 	BIT_FIELD_REFs only are applied to mode-precision operands
! 	when they are integral.
! 	(verify_gimple_assign_ternary): Likewise for BIT_INSERT_EXPR.
! 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Avoid generating
! 	BIT_FIELD_REFs of non-mode-precision integral operands.
  
! 2019-01-27  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/87214
  	* config/i386/sse.md
! 	(<mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>,
! 	avx512f_shuf_<shuffletype>64x2_1<mask_name>): Ensure the
! 	first constants in pairs are multiples of 2.  Formatting fixes.
! 	(avx512vl_shuf_<shuffletype>32x4_1<mask_name>,
! 	avx512vl_shuf_<shuffletype>32x4_1<mask_name>): Ensure the
! 	first constants in each quadruple are multiples of 4.  Formatting fixes.
! 
! 2019-01-26  Martin Jambor  <mjambor@suse.cz>
! 
! 	PR ipa/88933
! 	* tree-inline.c: Include tree-cfgcleanup.h.
! 	(delete_unreachable_blocks_update_callgraph): Move...
! 	* tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
! 	...here, make externally visible, make second argument bool, adjust
! 	all callers.
! 	* tree-cfgcleanup.c: Include cgraph.h.
! 	* tree-cfgcleanup.h (delete_unreachable_blocks_update_callgraph):
! 	Declare.
! 	* ipa-prop.c: Include tree-cfgcleanup.h.
! 	(ipcp_transform_function): Call
! 	delete_unreachable_blocks_update_callgraph instead of cleaning uo CFG.
! 
! 2019-01-25  Vladimir Makarov  <vmakarov@redhat.com>
! 
! 	PR rtl-optimization/88846
! 	* ira.c (process_set_for_memref_referenced_p): New.
! 	(memref_referenced_p): Add new param.  Use
! 	process_set_for_memref_referenced_p.  Add new switch cases.
! 	(memref_used_between_p): Pass new arg to memref_referenced_p.
! 
! 2019-01-25  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	PR target/88469
! 	* config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add new
! 	argument ABI_BREAK.  Set to true if the calculated alignment has
! 	changed in gcc-9.  Check bit-fields for their base type alignment.
! 	(aarch64_layout_arg): Warn if argument passing has changed in gcc-9.
! 	(aarch64_function_arg_boundary): Likewise.
! 	(aarch64_gimplify_va_arg_expr): Likewise.
! 
! 2019-01-25  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	PR middle-end/89037
! 	* varasm.c (output_constructor_bitfield): Use wi::extract_uhwi
! 	instead of accessing TREE_INT_CST_ELT directly.
! 
! 2019-01-25  Christophe Lyon  <christophe.lyon@linaro.org>
! 
! 	* doc/sourcebuild.texi (Environment attributes): Add fenv and
! 	fenv_exceptions description.
! 
! 2019-01-25  Wilco Dijkstra  <wdijkstr@arm.com>
! 
! 	PR rtl-optimization/87763
! 	* config/aarch64/aarch64.c (aarch64_select_cc_mode):
! 	Allow SUBREG when matching CC_NZmode compare.
! 
! 2019-01-25  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/89049
! 	* tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
! 	Look at the pattern stmt to determine if the stmt is vectorized.
! 
! 2019-01-25  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* config/aarch64/aarch64-sve.md (*pred_mov<mode>)
! 	(pred_mov<mode>): Handle all-register forms using both a new
! 	alternative and a split.
! 
! 2019-01-25  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/86865
! 	* graphite-scop-detection.c (scop_detection::can_represent_loop):
! 	Reject non-do-while loops.
! 
! 2019-01-24  Peter Bergner  <bergner@linux.ibm.com>
! 
! 	* config/rs6000/altivec.md (build_vector_mask_for_load): Use MEM_P.
! 	* config/rs6000/constraints.md (Q constraint): Use REG_P.
! 	* config/rs6000/darwin.h (PREFERRED_RELOAD_CLASS): Use SYMBOL_REF_P.
! 	* config/rs6000/freebsd64.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Use
! 	SYMBOL_REF_P, CONST_INT_P and CONST_DOUBLE_P.
! 	* config/rs6000/linux64.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
! 	* config/rs6000/predicates.md (altivec_register_operand, vint_operand,
! 	vsx_register_operand, vsx_reg_sfsubreg_ok, vfloat_operand,
! 	vlogical_operand, gpc_reg_operand, int_reg_operand,
! 	int_reg_operand_not_pseudo): Use SUBREG_P and HARD_REGISTER_P.
! 	(ca_operand, base_reg_operand, htm_spr_reg_operand, cc_reg_operand,
! 	cc_reg_not_cr0_operand, input_operand): Use SUBREG_P.
! 	(save_world_operation, restore_world_operation, lmw_operation,
! 	stmw_operation): Use MEM_P and REG_P.
! 	(tie_operand): Use MEM_P.
! 	(vrsave_operation, crsave_operation): Use REG_P.
! 	(mfcr_operation, mtcrf_operation): Use REG_P and CONST_INT_P.
! 	(fpr_reg_operand): Use SUBREG_P and HARD_REGISTER_NUM_P.
! 	(quad_int_reg_operand): Use HARD_REGISTER_NUM_P.
! 	(call_operand): Use HARD_REGISTER_P.
! 	(indexed_or_indirect_operand, altivec_indexed_or_indirect_operand):
! 	Use CONST_INT_P.
! 	(lwa_operand): Use SUBREG_P, REG_P and CONST_INT_P.
! 	* config/rs6000/rs6000-p8swap.c (insn_is_load_p, insn_is_store_p,
! 	quad_aligned_load_p, replace_swapped_aligned_store,
! 	recombine_lvx_pattern, replace_swapped_aligned_load,
! 	recombine_stvx_pattern): Use MEM_P.
! 	(const_load_sequence_p, adjust_vperm, replace_swapped_load_constant):
! 	Use MEM_P and SYMBOL_REF_P.
! 	(rtx_is_swappable_p): Use REG_P and CONST_INT_P.
! 	(insn_is_swappable_p): Use REG_P and MEM_P.
! 	(insn_is_swap_p, (alignment_mask): Use CONST_INT_P.
! 	* config/rs6000/rs6000-string.c (expand_block_clear, expand_block_move):
! 	Use CONST_INT_P.
! 	* config/rs6000/rs6000.c (rs6000_secondary_reload, rs6000_emit_cmove):
! 	Use CONST_DOUBLE_P.
! 	(rs6000_output_move_128bit): Use CONST_DOUBLE_P, CONST_INT_P and
! 	CONST_WIDE_INT_P.
! 	(rs6000_legitimize_address): Use CONST_DOUBLE_P, CONST_INT_P,
! 	CONST_WIDE_INT_P, REG_P and SYMBOL_REF_P.
! 	(rs6000_emit_move): Use CONST_DOUBLE_P, CONST_INT_P, HARD_REGISTER_P,
! 	HARD_REGISTER_NUM_P, MEM_P, REG_P, SUBREG_P, SYMBOL_REF_P and
! 	reg_or_subregno:
! 	(output_toc): Use CONST_DOUBLE_P, CONST_INT_P and SYMBOL_REF_P.
! 	(easy_altivec_constant, rs6000_legitimate_offset_address_p,
! 	rs6000_mode_dependent_address, rs6000_expand_mtfsf_builtin,
! 	rs6000_expand_set_fpscr_rn_builtin, rs6000_expand_set_fpscr_drn_builtin,
! 	rs6000_expand_unop_builtin, INT_P, rs6000_generate_compare,
! 	rs6000_machopic_legitimize_pic_address, rs6000_split_logical_inner,
! 	rs6000_split_logical_di): Use CONST_INT_P.
! 	(rs6000_legitimize_reload_address): Use CONST_INT_P, HARD_REGISTER_P,
! 	REG_P and SYMBOL_REF_P.
! 	(setup_incoming_varargs, rs6000_rtx_costs): Use CONST_INT_P and MEM_P.
! 	(print_operand): Use CONST_INT_P, MEM_P and REG_P.
! 	(virtual_stack_registers_memory_p, rs6000_legitimate_address_p,
! 	mems_ok_for_quad_peep): Use CONST_INT_P and REG_P.
! 	(rs6000_secondary_reload_memory): Use CONST_INT_P and SUBREG_P.
! 	(small_data_operand, print_operand_address): Use CONST_INT_P and
! 	SYMBOL_REF_P.
! 	(split_stack_arg_pointer_used_p): Use HARD_REGISTER_P.
! 	(rs6000_init_hard_regno_mode_ok, direct_move_p):
! 	Use HARD_REGISTER_NUM_P.
! 	(rs6000_secondary_reload_gpr): Use HARD_REGISTER_NUM_P and MEM_P.
! 	(rs6000_secondary_reload_class): Use HARD_REGISTER_NUM_P, REG_P,
! 	SUBREG_P and SYMBOL_REF_P.
! 	(register_to_reg_type, rs6000_secondary_reload_inner): Use SUBREG_P
! 	and HARD_REGISTER_NUM_P.
! 	(rs6000_adjust_vec_address): Use HARD_REGISTER_NUM_P and
! 	reg_or_subregno.
! 	(rs6000_adjust_cost, find_mem_ref): Use MEM_P.
! 	(macho_lo_sum_memory_operand, rs6000_eliminate_indexed_memrefs): Use
! 	MEM_P and REG_P.
! 	(legitimate_indirect_address_p, legitimate_lo_sum_address_p,
! 	registers_ok_for_quad_peep, rs6000_output_function_epilogue,
! 	find_addr_reg): Use REG_P.
! 	(altivec_expand_vec_perm_const): Use REG_P and SUBREG_P.
! 	(rs6000_emit_le_vsx_move): Use SUBREG_P.
! 	(offsettable_ok_by_alignment, constant_pool_expr_p,
! 	legitimate_small_data_p, rs6000_output_dwarf_dtprel,
! 	rs6000_delegitimize_address, rs6000_const_not_ok_for_debug_p,
! 	rs6000_cannot_force_const_mem, rs6000_output_addr_const_extra,
! 	rs6000_assemble_integer, create_TOC_reference,
! 	rs6000_emit_allocate_stack, rs6000_xcoff_encode_section_info,
! 	rs6000_call_aix, rs6000_call_aix): Use SYMBOL_REF_P.
! 	(rs6000_split_vec_extract_var): Use reg_or_subregno.
! 	* config/rs6000/rtems.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Use
! 	CONST_DOUBLE_P, CONST_INT_P and SYMBOL_REF_P.
! 	* config/rs6000/sysv4.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
! 	* config/rs6000/xcoff.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
! 	* config/rs6000/rs6000.h (RS6000_SYMBOL_REF_TLS_P): Use SYMBOL_REF_P.
! 	(REGNO_OK_FOR_INDEX_P, REGNO_OK_FOR_BASE_P): Use HARD_REGISTER_NUM_P.
! 	(INT_REG_OK_FOR_INDEX_P, INT_REG_OK_FOR_BASE_P): Use HARD_REGISTER_P.
! 	(CONSTANT_ADDRESS_P): Use CONST_INT_P and SYMBOL_REF_P.
! 	* config/rs6000/rs6000.md (define_expands strlensi, mod<mode>3
! 	and cbranch<mode>4): Use CONST_INT_P.
! 	(multiple define_splits): Use REG_P and SUBREG_P.
! 	(define_expands call, call_value): Use MEM_P.
! 	(define_expands sibcall, sibcall_value): Use CONST_INT_P and  MEM_P.
! 	(define insn *mtcrfsi): Use CONST_INT_P and REG_P.
! 	* config/rs6000/vsx.md (*vsx_le_perm_load_<mode>,
! 	*vsx_le_perm_load_v8hi, *vsx_le_perm_load_v16qi): Use HARD_REGISTER_P
! 	and HARD_REGISTER_NUM_P.
! 	(multiple define_splits): Use HARD_REGISTER_NUM_P.
! 
! 2019-01-24  Uroš Bizjak  <ubizjak@gmail.com>
! 
! 	PR rtl-optimization/88948
! 	* rtl.h (prepare_copy_insn): New prototype.
! 	* gcse.c (prepare_copy_insn): New function, split out from
! 	process_insert_insn.
! 	(process_insert_insn): Use prepare_copy_insn.
! 	* store-motion.c (replace_store_insn): Use prepare_copy_insn
! 	instead of gen_move_insn.
! 
! 2019-01-24  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR debug/89006
! 	* config/i386/i386.c (ix86_pic_register_p): Return true for
! 	UNSPEC_SET_GOT too.
! 
! 	PR tree-optimization/88964
! 	* gimple-loop-interchange.cc (loop_cand::analyze_induction_var): Also
! 	punt if HONOR_SNANS (chrec).
! 
! 	PR middle-end/89015
! 	* tree-nested.c (convert_nonlocal_reference_stmt,
! 	convert_local_reference_stmt, convert_tramp_reference_stmt,
! 	convert_gimple_call) <case GIMPLE_OMP_TEAMS>: Treat
! 	gimple_omp_teams_host teams stmts like GIMPLE_OMP_PARALLEL
! 	or GIMPLE_OMP_TASK.
! 
! 	PR tree-optimization/89027
! 	* tree-inline.c (add_clobbers_to_eh_landing_pad): Don't add clobbers
! 	for "omp simd array" variables.
! 
! 2019-01-24  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	PR target/88469
! 	* profile-count.h (profile_count): On ARM systems using GCC 6/7/8
! 	force the alignment of m_val.
! 
! 2019-01-24  Richard Biener  <rguenther@suse.de>
! 
! 	PR lto/87187
! 	* tree-streamer-out.c (write_ts_decl_common_tree_pointers):
! 	When in "legacy" debug mode make sure to reset self-origins.
! 
! 2019-01-24  Martin Liska  <mliska@suse.cz>
! 
! 	PR gcov-profile/88994
! 	* gcov-io.c (mangle_path): Do not allocate a bigger buffer,
! 	result will be always smaller or equal to the original.
! 	* gcov.c (mangle_name): Fix else branch where we should
! 	also copy to PTR and shift the pointer.
! 
! 2019-01-24  Xiong Hu Luo  <luoxhu@linux.vnet.ibm.com>
! 
! 	* tree-ssa-dom.c (test_for_singularity): Fix a comment typo.
! 	* vr-values.c (find_case_label_ranges): Fix a comment typo.
! 
! 2019-01-23  Bin Cheng  <bin.cheng@arm.com>
! 	    Steve Ellcey <sellcey@marvell.com>
! 
! 	PR target/85711
! 	* recog.c (address_operand): Return false on wrong mode for address.
! 	(constrain_operands): Check for mode with 'p' constraint.
! 
! 2019-01-23  Uroš Bizjak  <ubizjak@gmail.com>
! 
! 	PR target/88998
! 	* config/i386/sse.md (sse2_cvtpi2pd): Add SSE alternatives.
! 	Disparage MMX alternative.
! 	(sse2_cvtpd2pi): Ditto.
! 	(sse2_cvttpd2pi): Ditto.
! 
! 2019-01-23  David Malcolm  <dmalcolm@redhat.com>
! 
! 	PR driver/89014
! 	* config/aarch64/driver-aarch64.c (host_detect_local_cpu): Fix
! 	use-after-free of the result of
! 	aarch64_get_extension_string_for_isa_flags.
! 
! 2019-01-23  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c/44715
! 	* doc/extend.texi: Document break and continue behavior in
! 	statement expressions.
! 
! 2019-01-23  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/89008
! 	* tree-ssa-reassoc.c (eliminate_using_constants): For * 0 do
! 	not leave another stray operand.
! 
! 2019-01-23  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* BASE-VER: Bump to 9.0.1.
! 
! 2019-01-23  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* cgraphunit.c (cgraph_node::expand_thunk): When expanding a GIMPLE
! 	thunk that returns by reference, use the type of the return object
! 	of the thunk instead of that of the alias to build the dereference.
! 
! 2019-01-23  Vineet Gupta  <vgupta@synopsys.com>
! 
! 	* config/arc/atomic.md: Add operand to DMB instruction.
! 
! 2019-01-23  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR tree-optimization/88964
! 	* gimple-loop-interchange.cc (loop_cand::analyze_induction_var): Use
! 	build_zero_cst instead of build_int_cst.  Return false for loop
! 	invariants which honor signed zeros.
! 
! 2019-01-22  Segher Boessenkool  <segher@kernel.crashing.org>
! 
! 	* doc/invoke.texi (-fsplit-paths): This is enabled by default at -O3.
! 
! 2019-01-22  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/88965
! 	* config/rs6000/rs6000.c: Include tree-vrp.h and tree-ssanames.h.
! 	(rs6000_gimple_fold_builtin): If MEM_REF address doesn't satisfy
! 	is_gimple_mem_ref_addr predicate, force it into a SSA_NAME first.
! 
! 	PR middle-end/88968
! 	* gimplify.c (gimplify_omp_atomic): Handle bitfield atomics with
! 	non-integral DECL_BIT_FIELD_REPRESENTATIVEs.
! 
! 	PR target/87064
! 	* config/rs6000/vsx.md (*vsx_reduc_<VEC_reduc_name>_v2df_scalar):
! 	Disable for little endian.
! 
! 2019-01-22  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	PR target/88469
! 	* config/arm/arm.c (arm_needs_double_word_align): Check
! 	DECL_BIT_FIELD_TYPE.
! 
! 2019-01-22  Hongtao Liu  <hongtao.liu@intel.com>
! 	    H.J. Lu  <hongjiu.lu@intel.com>
! 
! 	PR target/88909
! 	* config/i386/i386-builtin.def: Add mask2 to all builtin
! 	initializations.  Merge ARGS2 and SPECIAL_ARGS2 into ARGS and
! 	SPECIAL_ARGS.
! 	* config/i386/i386.c (BDESC): Add mask2 to the definition.
! 	(BDESC_FIRST): Likewise.
! 	(define_builtin): Add an argument for mask2.  Updated to handle
! 	both ix86_isa_flags and ix86_isa_flags2.
! 	(define_builtin_const): Likewise.
! 	(define_builtin_pure): Likewise.
! 	(define_builtin2): Deleted.
! 	(define_builtin_const2): Likewise.
! 	(builtin_description): Add a member, mask2.
! 	(bdesc_*): Add mask2 to builtin initializations.
! 	(ix86_init_mmx_sse_builtins): Update calls to def_builtin,
! 	def_builtin_const and def_builtin_pure.  Remove SPECIAL_ARGS2
! 	support.
! 	(ix86_get_builtin_func_type): Remove SPECIAL_ARGS2 support.
! 
! 2019-01-22  H.J. Lu  <hongjiu.lu@intel.com>
! 
! 	PR target/88954
! 	* config/i386/i386.c (ix86_force_load_from_GOT_p): Also check
! 	noplt attribute.
! 
! 2019-01-22  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	PR target/88469
! 	* config/arm/arm.c (arm_needs_doubleword_align): Return 2 if a record's
! 	alignment is dominated by a bitfield with 64-bit aligned base type.
! 	(arm_function_arg): Emit a warning if the alignment has changed since
! 	earlier GCC releases.
! 	(arm_function_arg_boundary): Likewise.
! 	(arm_setup_incoming_varargs): Likewise.
! 
! 2019-01-22  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/88862
! 	* graphite-scop-detection.c
! 	(scop_detection::graphite_can_represent_scev): Reject ADDR_EXPR.
! 
! 2019-01-22  Andrew Stubbs  <ams@codesourcery.com>
! 
! 	* doc/extend.tex (AMD GCN Function Attributes): New section.
! 	* doc/install.texi (amdgcn-unknown-amdhsa): New instructions.
! 	* doc/invoke.texi (AMD GCN Options): New section.
! 	* doc/md.texi (Constraints for Particular Machines): Add AMD GCN.
! 
! 2019-01-22  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* config/sparc/sparc.c (parc_delegitimize_address): Recognize the GOT
! 	register and decoded HIGH/LO_SUM combinations for labels in PIC mode.
! 
! 2019-01-22  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR tree-optimization/88044
! 	* tree-ssa-loop-niter.c (number_of_iterations_cond): If condition
! 	is false in the first iteration, but !every_iteration, return false
! 	instead of true with niter->niter zero.
! 
! 	PR rtl-optimization/88904
! 	* cfgcleanup.c (thread_jump): Verify cond2 doesn't mention
! 	any nonequal registers before processing BB_END (b).
! 
! 	PR target/88905
! 	* optabs.c (add_equal_note): Add op0_mode argument, use it instead of
! 	GET_MODE (op0).
! 	(expand_binop_directly, expand_doubleword_clz,
! 	expand_doubleword_popcount, expand_ctz, expand_ffs,
! 	expand_unop_direct, maybe_emit_unop_insn): Adjust callers.
! 
! 	PR rtl-optimization/49429
! 	PR target/49454
! 	PR rtl-optimization/86334
! 	PR target/88906
! 	* expr.c (emit_block_move_hints): Move marking of MEM_EXPRs
! 	addressable from here...
! 	(emit_block_op_via_libcall): ... to here.
! 
! 2019-01-22  Richard Biener  <rguenther@suse.de>
! 
! 	* tree-vect-loop.c (vect_analyze_loop_operations): Use
! 	auto_vec for cost vector to fix memleak.
! 	(vectorize_fold_left_reduction): Properly gather SLP defs.
! 	(vectorizable_comparison): Do not swap operands to properly
! 	gather SLP defs.
! 
! 2019-01-22  Alan Modra  <amodra@gmail.com>
! 
! 	PR target/88614
! 	* config/rs6000/predicates.md (unspec_tls): Ensure GOT reg
! 	stays a reg.  Allow a const_int.
! 	* config/rs6000/rs6000-protos.h (rs6000_output_tlsargs): Declare.
! 	* config/rs6000/rs6000.h (IS_V4_FP_ARGS): Define.
! 	(IS_NOMARK_TLSGETADDR): Define.
! 	* config/rs6000/rs6000.c (edit_tls_call_insn): Delete.
! 	(rs6000_output_tlsargs): New function.
! 	(rs6000_legitimize_tls_address): Don't say a !TARGET_TLS_MARKERS
! 	__tls_get_addr call takes an arg.
! 	(rs6000_call_sysv): Generate sysv4 secure plt call pattern here..
! 	* config/rs6000/rs6000.md (call_nonlocal_sysv): ..rather than here,
! 	delete split..
! 	(call_value_nonlocal_sysv): ..or here, delete split.
! 	(tls_gdld_nomark): Delete.
! 	(call_value_indirect_nonlocal_sysv): Use unspec_tls as operand2
! 	predicate.  Call rs6000_output_tlsargs.  Adjust length to suit.
! 	(call_value_nonlocal_sysv): Likewise.
! 	(call_value_nonlocal_sysv_secure): Likewise.
! 	(call_value_nonlocal_aix): Likewise.
! 	(call_value_indirect_aix): Likewise.
! 	(call_value_indirect_elfv2): Likewise.
! 	(call_value_local32, call_value_local64): Disable for no-mark tls.
! 	(call_value_local_aix): Likewise.
! 
! 2019-01-21  Uroš Bizjak  <ubizjak@gmail.com>
! 
! 	PR target/88938
! 	* config/i386/i386.c (ix86_expand_builtin) [case IX86_BUILTIN_BEXTRI32,
! 	case IX86_BUILTIN_BEXTRI64]: Sanitize operands.
! 
! 2019-01-21  Michael Ploujnikov  <michael.ploujnikov@oracle.com>
! 
! 	* hash-map-tests.c (test_map_of_strings_to_int): Show how to use
! 	string contents as hash_map keys.
! 
! 2019-01-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>
! 
! 	PR c/88928
! 	* c-warn.c (check_alignment_of_packed_member): Add a boolean parameter
! 	for rvalue context.  Handle rvalues correctly.  Use min_align_of_type
! 	instead of TYPE_ALIGN.
! 	(check_address_or_pointer_of_packed_member): Handle rvalues coorrectly.
! 	Use min_align_of_type instead of TYPE_ALIGN_UNIT.  Check for NULL
! 	pointer from TYPE_STUB_DECL.
! 
! 2019-01-21  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/88934
! 	* tree-vect-slp.c (vect_mask_constant_operand_p): Always look
! 	at the possibly non-constant operand.
! 	(vect_get_constant_vectors): Adjust.
! 
! 2019-01-21  H.J. Lu  <hongjiu.lu@intel.com>
! 
! 	PR target/71659
! 	* config/i386/adxintrin.h: Just check _IMMINTRIN_H_INCLUDED.
! 	* config/i386/clflushoptintrin.h: Check _IMMINTRIN_H_INCLUDED
! 	instead of _X86INTRIN_H_INCLUDED.
! 	* onfig/i386/clwbintrin.h: Likewise.
! 	* config/i386/pkuintrin.h: Likewise.
! 	* config/i386/prfchwintrin.h: Likewise.
! 	* config/i386/rdseedintrin.h: Likewise.
! 	* config/i386/wbnoinvdintrin.h: Likewise.
! 	* config/i386/xsavecintrin.h: Likewise.
! 	* config/i386/xsavesintrin.h: Likewise.
! 	* config/i386/fxsrintrin.h: Enable _IMMINTRIN_H_INCLUDED check.
! 	* config/i386/xsaveintrin.h: Likewise.
! 	* config/i386/xsaveoptintrin.h: Likewise.
! 	* config/i386/x86intrin.h: Move "#include" <rdseedintrin.h>,
! 	<prfchwintrin.h>, <fxsrintrin.h>, <xsaveintrin.h>,
! 	<xsaveoptintrin.h>, <adxintrin.h>, <clwbintrin.h>,
! 	<clflushoptintrin.h>, <xsavesintrin.h>, <xsavecintrin.h>,
! 	<wbnoinvdintrin.h> and <pkuintrin.h> to ...
! 	* config/i386/immintrin.h: Here.
! 
! 2019-01-20  Martin Jambor  <mjambor@suse.cz>
! 
! 	PR ipa/87615
! 	* ipa-prop.h (struct ipa_func_body_info): Replaced field aa_walked
! 	with aa_walk_budget.
! 	* cgraph.h (ipa_polymorphic_call_context::get_dynamic_type): Add
! 	aa_walk_budget_p parameter.
! 	* ipa-fnsummary.c (unmodified_parm_1): New parameter fbi.  Limit AA
! 	walk.  Updated all callers.
! 	(unmodified_parm): New parameter fbi, pass it to unmodified_parm_1.
! 	(eliminated_by_inlining_prob): New parameter fbi, pass it on to
! 	unmodified_parm.
! 	(will_be_nonconstant_expr_predicate): New parameter fbi, removed
! 	parameter info.  Extract info from fbi.  Pass fbi to recursive calls
! 	and to unmodified_parm.
! 	(phi_result_unknown_predicate): New parameter fbi, removed parameter
! 	info, updated call to will_be_nonconstant_expr_predicate.
! 	(param_change_prob): New parameter fbi, limit AA walking.
! 	(analyze_function_body): Initialize aa_walk_budget in fbi.  Update
! 	calls to various above functions.
! 	* ipa-polymorphic-call.c (get_dynamic_type): Add aa_walk_budget_p
! 	parameter.  Use it to limit AA walking.
! 	* ipa-prop.c (detect_type_change_from_memory_writes): New parameter
! 	fbi, limit AA walk.
! 	(detect_type_change): New parameter fbi, pass it on to
! 	detect_type_change_from_memory_writes.
! 	(detect_type_change_ssa): Likewise.
! 	(aa_overwalked): Removed.
! 	(parm_preserved_before_stmt_p): Assume fbi is never NULL, stream line
! 	accordingly, adjust to the neew AA limiting scheme.
! 	(parm_ref_data_preserved_p): Likewise.
! 	(ipa_compute_jump_functions_for_edge): Adjust call to
! 	get_dynamic_type.
! 	(ipa_analyze_call_uses): Likewise.
! 	(ipa_analyze_virtual_call_uses): Pass fbi to detect_type_change_ssa.
! 	(ipa_analyze_node): Initialize aa_walk_budget.
! 	(ipcp_transform_function): Likewise.
! 	* tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt): Update call
! 	to get_dynamic_type.
! 
! 2019-01-19  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* config/aarch64/aarch64.c (aarch64_stack_protect_guard): Move
! 	outside of #if CHECKING_P code.
! 
! 2019-01-19  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* gimple-loop-versioning.cc (loop_versioning::dump_inner_likelihood):
! 	New function, split out from...
! 	(loop_versioning::analyze_stride): ...here.
! 	(loop_versioning::find_per_loop_multiplication): Use gassign.
! 	(loop_versioning::analyze_term_using_scevs): Return a success code.
! 	(loop_versioning::analyze_arbitrary_term): New function.
! 	(loop_versioning::analyze_address_fragment): Use
! 	analyze_arbitrary_term if all else fails.
! 
! 2019-01-18  Segher Boessenkool  <segher@kernel.crashing.org>
! 
! 	PR target/88892
! 	* config/rs6000/rs6000.md (*movsi_from_df): Allow only register
! 	operands.
! 
! 2019-01-18  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/88903
! 	* tree-vect-stmts.c (vectorizable_shift): Verify we see all
! 	scalar stmts a SLP shift amount is composed of when detecting
! 	shifts by scalars.
! 
! 2019-01-18  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	PR target/88799
! 	* config/arm/arm-cpus.in (mp): New feature.
! 	(sec): New feature.
! 	(fgroup ARMv7ve): Add mp and sec features.
! 	(arch armv7-a): Add options to allow mp and sec extensions.
! 	(cpu generic-armv7-a): Add options to allow mp and sec extensions.
! 	(cpu cortex-a5, cpu cortex-7, cpu cortex-a9): Add mp and sec
! 	extenstions to the base architecture.
! 	(cpu cortex-a8): Add sec extension to the base architecture.
! 	(cpu marvell-pj4): Add mp and sec extensions to the base architecture.
! 	* config/arm/t-aprofile (MULTILIB_MATCHES): Map all armv7-a arch
! 	variants down to the base v7-a varaint.
! 	* config/arm/t-multilib (v7_a_arch_variants): New variable.
! 	* doc/invoke.texi (ARM Options): Add +mp and +sec to the list
! 	of permitted extensions for -march=armv7-a and for
! 	-mcpu=generic-armv7-a.
! 
! 2019-01-18  Martin Liska  <mliska@suse.cz>
! 
! 	* params.def: Fix comment.
! 	* tree-profile.c (gimple_init_gcov_profiler): Bump function
! 	name.
! 	(gimple_gen_ic_func_profiler): Likewise.
! 
! 2019-01-18  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
! 
! 	* config/aarch64/aarch64-opts.h (enum stack_protector_guard): New
! 	* config/aarch64/aarch64.c (aarch64_override_options_internal): Handle
! 	and put in error checks for stack protector guard options.
! 	(aarch64_stack_protect_guard): New.
! 	(TARGET_STACK_PROTECT_GUARD): Define.
! 	* config/aarch64/aarch64.md (UNSPEC_SSP_SYSREG): New.
! 	(reg_stack_protect_address<mode>): New.
! 	(stack_protect_set): Adjust for SSP_GLOBAL.
! 	(stack_protect_test): Likewise.
! 	* config/aarch64/aarch64.opt (-mstack-protector-guard-reg): New.
! 	(-mstack-protector-guard): Likewise.
! 	(-mstack-protector-guard-offset): Likewise.
! 
! 2019-01-18  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR tree-optimization/86214
! 	* tree-inline.h (struct copy_body_data): Add
! 	add_clobbers_to_eh_landing_pads member.
! 	* tree-inline.c (add_clobbers_to_eh_landing_pad): New function.
! 	(copy_edges_for_bb): Call it if EH edge destination is <
! 	id->add_clobbers_to_eh_landing_pads.  Fix a comment typo.
! 	(expand_call_inline): Set id->add_clobbers_to_eh_landing_pads
! 	if flag_stack_reuse != SR_NONE and clear it afterwards.
! 
! 2019-01-18  Christophe Lyon  <christophe.lyon@linaro.org>
! 
! 	PR target/85596
! 	* doc/install.texi (with-multilib-list): Document for aarch64.
! 
! 2019-01-18  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/88734
! 	* config/arm/arm_neon.h: Fix #pragma GCC target syntax - replace
! 	(("..."))) with ("...").
! 
! 2019-01-18  Sebastian Huber  <sebastian.huber@embedded-brains.de>
! 
! 	* doc/extend.texi (Built-in Functions for Memory Model Aware
! 	Atomic Operations): Document atomic fetch and nand.
! 
! 2019-01-18  Martin Liska  <mliska@suse.cz>
! 	    Richard Biener  <rguenther@suse.de>
! 
! 	PR middle-end/88587
! 	* cgraph.h (create_version_clone_with_body): Add new argument
! 	with attributes.
! 	* cgraphclones.c (cgraph_node::create_version_clone): Add
! 	DECL_ATTRIBUTES to a newly created decl.  And call
! 	valid_attribute_p so that proper cl_target_optimization_node
! 	is set for the newly created declaration.
! 	* multiple_target.c (create_target_clone): Set DECL_ATTRIBUTES
! 	for declaration.
! 	(expand_target_clones): Do not call valid_attribute_p, it must
! 	be already done.
! 	* tree-inline.c (copy_decl_for_dup_finish): Reset mode for
! 	vector types.
! 
! 2019-01-17  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/88734
! 	* config/aarch64/arm_neon.h: Fix #pragma GCC target syntax - replace
! 	(("..."))) with ("...").  Use arch=armv8.2-a+sha3 instead of
! 	arch=armv8.2-a+crypto for vsha512hq_u64 etc. intrinsics.
! 
! 2019-01-17  Martin Sebor  <msebor@redhat.com>
! 
! 	PR middle-end/88273
! 	* gimple-ssa-warn-restrict.c (builtin_memref::extend_offset_range):
! 	Handle anti-ranges the same as no range at all.
! 
! 2018-01-17  Steve Ellcey  <sellcey@cavium.com>
! 
! 	* config/aarch64/aarch64.c (cgraph.h): New include.
! 	(intl.h): New include.
! 	(supported_simd_type): New function.
! 	(currently_supported_simd_type): Ditto.
! 	(aarch64_simd_clone_compute_vecsize_and_simdlen): Ditto.
! 	(aarch64_simd_clone_adjust): Ditto.
! 	(aarch64_simd_clone_usable): Ditto.
! 	(TARGET_SIMD_CLONE_COMPUTE_VECSIZE_AND_SIMDLEN): New macro.
! 	(TARGET_SIMD_CLONE_ADJUST): Ditto.
! 	(TARGET_SIMD_CLONE_USABLE): Ditto.
! 	* config/i386/i386.c (ix86_simd_clone_adjust): Add definition check.
! 	* omp-simd-clone.c (expand_simd_clones): Add targetm.simd_clone.adjust
! 	call.
! 
! 2019-01-17  Martin Sebor  <msebor@redhat.com>
! 
! 	PR tree-optimization/88800
! 	* gimple-fold.c (gimple_fold_builtin_memory_op): Avoid checking
! 	NO_WARNING bit here.  Avoid folding out-of-bounds calls.
! 	* gimple-ssa-warn-restrict.c (maybe_diag_offset_bounds): Remove
! 	redundant argument.  Add new argument and issue diagnostics under
! 	its control.  Detect out-of-bounds access even with warnings
! 	disabled.
! 	(check_bounds_or_overlap): Change return type.  Add argument.
! 	(wrestrict_dom_walker::check_call): Adjust.
! 	* gimple-ssa-warn-restrict.h (check_bounds_or_overlap): Add argument.
! 	* tree-ssa-strlen.c (handle_builtin_strcpy): Adjust to change in
! 	check_bounds_or_overlap's return value.
! 	(handle_builtin_stxncpy): Same.
! 	(handle_builtin_strcat): Same.
! 
! 2019-01-17  Andrew Stubbs  <ams@codesourcery.com>
! 	    Kwok Cheung Yeung  <kcy@codesourcery.com>
! 	    Julian Brown  <julian@codesourcery.com>
! 	    Tom de Vries  <tom@codesourcery.com>
! 
! 	* doc/sourcebuild.texi: Document dg-add-options sqrt_insn.
! 
! 2019-01-17  Andrew Stubbs  <ams@codesourcery.com>
! 
! 	* doc/sourcebuild.texi: Document dg-require-effective-target
! 	llvm_binutils and offload_gcn.
  
! 2019-01-17  Andrew Stubbs  <ams@codesourcery.com>
! 	    Kwok Cheung Yeung  <kcy@codesourcery.com>
! 	    Julian Brown  <julian@codesourcery.com>
! 	    Tom de Vries  <tom@codesourcery.com>
  
! 	* doc/sourcebuild.texi: Document dg-required-effective-target
! 	exceptions.
  
! 2019-01-17  Andrew Stubbs  <ams@codesourcery.com>
! 	    Kwok Cheung Yeung  <kcy@codesourcery.com>
! 	    Julian Brown  <julian@codesourcery.com>
! 	    Tom de Vries  <tom@codesourcery.com>
! 	    Jan Hubicka  <hubicka@ucw.cz>
! 	    Martin Jambor  <mjambor@suse.cz>
  
! 	* config.gcc: Add amdgcn*-*-amdhsa configuration.
! 	* configure.ac: Check for dlopen.
  	* configure: Regenerate.
  
! 2019-01-17  Andrew Stubbs  <ams@codesourcery.com>
! 	    Kwok Cheung Yeung  <kcy@codesourcery.com>
! 	    Julian Brown  <julian@codesourcery.com>
! 	    Tom de Vries  <tom@codesourcery.com>
! 	    Jan Hubicka  <hubicka@ucw.cz>
! 	    Martin Jambor  <mjambor@suse.cz>
! 
! 	* common/config/gcn/gcn-common.c: New file.
! 	* config/gcn/driver-gcn.c: New file.
! 	* config/gcn/gcn-builtins.def: New file.
! 	* config/gcn/gcn-hsa.h: New file.
! 	* config/gcn/gcn-modes.def: New file.
! 	* config/gcn/gcn-opts.h: New file.
! 	* config/gcn/gcn-passes.def: New file.
! 	* config/gcn/gcn-protos.h: New file.
! 	* config/gcn/gcn-run.c: New file.
! 	* config/gcn/gcn-tree.c: New file.
! 	* config/gcn/gcn.c: New file.
! 	* config/gcn/gcn.h: New file.
! 	* config/gcn/gcn.opt: New file.
! 	* config/gcn/t-gcn-hsa: New file.
! 
! 2019-01-17  Andrew Stubbs  <ams@codesourcery.com>
! 	    Kwok Cheung Yeung  <kcy@codesourcery.com>
! 	    Julian Brown  <julian@codesourcery.com>
! 	    Tom de Vries  <tom@codesourcery.com>
! 	    Jan Hubicka  <hubicka@ucw.cz>
! 	    Martin Jambor  <mjambor@suse.cz>
! 
! 	* config/gcn/constraints.md: New file.
! 	* config/gcn/gcn-valu.md: New file.
! 	* config/gcn/gcn.md: New file.
! 	* config/gcn/predicates.md: New file.
! 
! 2019-01-17  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* gimple-ssa-isolate-paths.c (stmt_uses_name_in_undefined_way): Replace
! 	flag_non_call_exceptions with cfun->can_throw_non_call_exceptions.
! 	(stmt_uses_0_or_null_in_undefined_way): Likewise.
! 	* tree-ssa-alias.c (same_addr_size_stores_p): Likewise.
  
! 2019-01-17  Tamar Christina  <tamar.christina@arm.com>
  
! 	PR target/88851
! 	* config/aarch64/aarch64.md (STACK_CLASH_SVE_CFA_REGNUM): New.
! 	* config/aarch64/aarch64.c (aarch64_allocate_and_probe_stack_space): Use
! 	it and document registers.
  
! 2019-01-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
! 	* config/aarch64/aarch64.c (ares_tunings): Define.
! 	* config/aarch64/aarch64-cores.def (ares): Use the above.
  
! 2019-01-17  Wei Xiao  <wei3.xiao@intel.com>
  
! 	PR target/88794
! 	Revert:
! 	2018-11-06  Wei Xiao  <wei3.xiao@intel.com>
  
! 	* config/i386/avx512fintrin.h: Update VFIXUPIMM* intrinsics.
! 	(_mm512_fixupimm_round_pd): Update parameters and builtin.
! 	(_mm512_maskz_fixupimm_round_pd): Ditto.
! 	(_mm512_fixupimm_round_ps): Ditto.
! 	(_mm512_maskz_fixupimm_round_ps): Ditto.
! 	(_mm_fixupimm_round_sd): Ditto.
! 	(_mm_maskz_fixupimm_round_sd): Ditto.
! 	(_mm_fixupimm_round_ss): Ditto.
! 	(_mm_maskz_fixupimm_round_ss): Ditto.
! 	(_mm512_fixupimm_pd): Ditto.
! 	(_mm512_maskz_fixupimm_pd): Ditto.
! 	(_mm512_fixupimm_ps): Ditto.
! 	(_mm512_maskz_fixupimm_ps): Ditto.
! 	(_mm_fixupimm_sd): Ditto.
! 	(_mm_maskz_fixupimm_sd): Ditto.
! 	(_mm_fixupimm_ss): Ditto.
! 	(_mm_maskz_fixupimm_ss): Ditto.
! 	(_mm512_mask_fixupimm_round_pd): Update builtin.
! 	(_mm512_mask_fixupimm_round_ps): Ditto.
! 	(_mm_mask_fixupimm_round_sd): Ditto.
! 	(_mm_mask_fixupimm_round_ss): Ditto.
! 	(_mm512_mask_fixupimm_pd): Ditto.
! 	(_mm512_mask_fixupimm_ps): Ditto.
! 	(_mm_mask_fixupimm_sd): Ditto.
! 	(_mm_mask_fixupimm_ss): Ditto.
! 	* config/i386/avx512vlintrin.h:
! 	(_mm256_fixupimm_pd): Update parameters and builtin.
! 	(_mm256_maskz_fixupimm_pd): Ditto.
! 	(_mm256_fixupimm_ps): Ditto.
! 	(_mm256_maskz_fixupimm_ps): Ditto.
! 	(_mm_fixupimm_pd): Ditto.
! 	(_mm_maskz_fixupimm_pd): Ditto.
! 	(_mm_fixupimm_ps): Ditto.
! 	(_mm_maskz_fixupimm_ps): Ditto.
! 	(_mm256_mask_fixupimm_pd): Update builtin.
! 	(_mm256_mask_fixupimm_ps): Ditto.
! 	(_mm_mask_fixupimm_pd): Ditto.
! 	(_mm_mask_fixupimm_ps): Ditto.
! 	* config/i386/i386-builtin-types.def: Add new types and remove useless ones.
! 	* config/i386/i386-builtin.def: Update builtin definitions.
! 	* config/i386/i386.c: Handle new builtin types and remove useless ones.
! 	* config/i386/sse.md: Update VFIXUPIMM* patterns.
! 	(<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
! 	(<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
! 	(<avx512>_fixupimm<mode>_mask<round_saeonly_name>): Update.
! 	(avx512f_sfixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
! 	(avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
! 	(avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Update.
! 	* config/i386/subst.md:
! 	(round_saeonly_sd_mask_operand4): Add new subst_attr.
! 	(round_saeonly_sd_mask_op4): Ditto.
! 	(round_saeonly_expand_operand5): Ditto.
! 	(round_saeonly_expand): Update.
  
! 2019-01-17  Wei Xiao  <wei3.xiao@intel.com>
  
! 	PR target/88794
! 	Revert:
! 	2018-11-12  Wei Xiao  <wei3.xiao@intel.com>
  
! 	* config/i386/sse.md: Combine VFIXUPIMM* patterns
! 	(<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
! 	(<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
! 	(<avx512>_fixupimm<mode>_mask<round_saeonly_name>): Remove.
! 	(avx512f_sfixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
! 	(avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
! 	(avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Remove.
  
! 2019-01-17  Wei Xiao  <wei3.xiao@intel.com>
  
! 	PR target/88794
! 	Revert:
! 	2018-12-15  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/88489
! 	* config/i386/sse.md (UNSPEC_SFIXUPIMM): New unspec enumerator.
! 	(avx512f_sfixupimm<mode><mask_name><round_saeonly_name>): Use it
! 	instead of UNSPEC_FIXUPIMM.
  
! 2019-01-17  Richard Biener  <rguenther@suse.de>
  
! 	PR lto/86736
! 	* dwarf2out.c (want_pubnames): Never generate pubnames sections
! 	and friends for the LTO part of debug info.
  
! 2019-01-17  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/86214
! 	* cfgexpand.c (add_stack_var_conflict): Don't add any conflicts
! 	if x == y.
  
! 	PR rtl-optimization/88870
! 	* dce.c (deletable_insn_p): Never delete const/pure calls that can
! 	throw if we can't alter the cfg or delete dead exceptions.
! 	(mark_insn): Don't call find_call_stack_args for such calls.
  
! 2019-01-17  Kewen Lin  <linkw@gcc.gnu.org>
  
! 	* doc/extend.texi: Add four new prototypes for vec_ld and seven new
! 	prototypes for vec_st.
! 	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add entries
! 	for scalar address type variants of altivec_vec_ld/altivec_vec_st,
! 	mainly on signed/unsigned long long and double.
  
! 2019-01-16  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR target/88861
! 	* combine.c (delete_noop_moves): Convert to "bool" return,
! 	returning true if any edges are eliminated.
! 	(combine_instructions): Also return true if delete_noop_moves
! 	returns true.
  
! 2019-01-16  Tamar Christina  <tamar.christina@arm.com>
  
! 	* config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
! 	correct max nunits for endian swap.
! 	(aarch64_expand_fcmla_builtin): Correct subreg code.
! 	* config/aarch64/aarch64-simd.md (aarch64_fcmla_lane<rot><mode>,
! 	aarch64_fcmla_laneq<rot>v4hf, aarch64_fcmlaq_lane<rot><mode>): Correct
! 	lane endianness.
  
! 2019-01-16  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	* config/alpha/alpha.c (alpha_gimplify_va_arg):
! 	Handle split indirect COMPLEX_TYPE arguments.
  
! 2019-01-16  Richard Earnshaw  <rearnsha@arm.com>
  
! 	PR target/86891
! 	* config/aarch64/aarch64-modes.def: Add comment about how the carry
! 	bit is set by add and compare.
! 	(CC_ADC): New CC_MODE.
! 	* config/aarch64/aarch64.c (aarch64_select_cc_mode): Use variables
! 	to cache the code and mode of X.  Adjust the shape of a CC_Cmode
! 	comparison.  Add detection for CC_ADCmode.
! 	(aarch64_get_condition_code_1): Update code support for CC_Cmode.  Add
! 	CC_ADCmode.
! 	* config/aarch64/aarch64.md (uaddv<mode>4): Use LTU with CCmode.
! 	(uaddvti4): Comparison result is in CC_ADCmode and the condition is GEU.
! 	(add<mode>3_compareC_cconly_imm): Delete.  Merge into...
! 	(add<mode>3_compareC_cconly): ... this.  Restructure the comparison
! 	to eliminate the need for zero-extending the operands.
! 	(add<mode>3_compareC_imm): Delete.  Merge into ...
! 	(add<mode>3_compareC): ... this.  Restructure the comparison to
! 	eliminate the need for zero-extending the operands.
! 	(add<mode>3_carryin): Use LTU for the overflow detection.
! 	(add<mode>3_carryinC): Use CC_ADCmode for the result of the carry out.
! 	Reexpress comparison for overflow.
! 	(add<mode>3_carryinC_zero): Update for change to add<mode>3_carryinC.
! 	(add<mode>3_carryinC): Likewise.
! 	(add<mode>3_carryinV): Use LTU for carry between partials.
! 	* config/aarch64/predicates.md (aarch64_carry_operation): Update
! 	handling of CC_Cmode and add CC_ADCmode.
! 	(aarch64_borrow_operation): Likewise.
  
! 2019-01-16  Tamar Christina  <tamar.christina@arm.com>
  
! 	* config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): Remove patternmode.
! 	* config/arm/arm.c (neon_vcmla_lane_prepare_operands): Likewise.
! 	* config/arm/neon.md (neon_vcmla_lane<rot><mode>, neon_vcmla_laneq<rot><mode>,
! 	neon_vcmlaq_lane<rot><mode>): Remove endianness conversion.
  
! 2019-01-16  Martin Liska  <mliska@suse.cz>
  
! 	* Makefile.in: Set TOOL_INCLUDE_DIR and NATIVE_SYSTEM_HEADER_DIR
! 	for GCC driver.
! 	* config/gnu-user.h (TARGET_F951_OPTIONS): Add 'finclude%s/' as
! 	a new argument.
! 	* gcc.c (add_sysrooted_hdrs_prefix): New function.
! 	(path_prefix_reset): Move up in the source file.
! 	(find_fortran_preinclude_file): Make complex search for the
! 	fortran header files.
  
! 2019-01-15  Nikhil Benesch  <nikhil.benesch@gmail.com>
  
! 	* godump.c (go_output_typedef): When outputting a typedef, refer
! 	to the underlying type by its name and not its structure.
  
! 2019-01-15  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR c++/88795
! 	* tree.c (build_function_type): Assert that arg_types is not
! 	error_mark_node.
  
! 2019-01-15  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR inline-asm/52813
! 	* doc/extend.texi: Document that listing the stack pointer in the
! 	clobber list of an asm is a deprecated feature.
! 	* common.opt (Wdeprecated): Moved from c-family/c.opt.
! 	* cfgexpand.c (asm_clobber_reg_is_valid): Issue a -Wdeprecated
! 	warning instead of an error for clobbers of the stack pointer.
! 	Add a note explaining why.
  
! 2019-01-15  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/88046
! 	* dwarf2out.c (gen_member_die): Do not generate inheritance
! 	DIEs late.
  
! 2019-01-15  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/88855
! 	* tree-if-conv.c (combine_blocks): Collect
! 	SSA_NAME_OCCURS_IN_ABNORMAL_PHI from propagated out virtuals.
  
! 2019-01-15  Tom de Vries  <tdevries@suse.de>
  
! 	PR target/80547
! 	* config/nvptx/nvptx.c (nvptx_goacc_reduction_init): Handle
! 	lhs == NULL_TREE for gang-level reduction.
  
! 2019-01-15  Richard Biener  <rguenther@suse.de>
! 	    Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
  
! 	PR ipa/88788
! 	* ipa-pure-const.c (malloc_candidate_p_1): Add parameter visited and
! 	return true if SSA_NAME is already marked in visited bitmap.
! 	(malloc_candidate_p): Pass visited to malloc_candidate_p_1.
  
! 2019-01-15  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/88775
! 	* match.pd (cmp (convert1?@2 addr@0) (convert2? addr@1)): Optimize
! 	equal == 0 equality pointer comparisons some more if compared in
! 	integral types and either one points to an automatic var and the
! 	other to a global, or we can prove at least one points to the middle
! 	or both point to start or both point to end.
  
! 2019-01-14  Andi Kleen  <ak@linux.intel.com>
  
! 	* Makefile.in: Lower autofdo sampling rate by 10x.
! 	* Makefile.tpl: Dito.
  
! 2019-01-14  Tom Honermann  <tom@honermann.net>
  
! 	* defaults.h: Define CHAR8_TYPE.
  
! 2019-01-14  Martin Sebor  <msebor@redhat.com>
  
! 	PR target/88638
! 	* doc/extend.texi (Darwin Format Checks): Clarify.
  
! 2019-01-14  Richard Biener  <rguenther@suse.de>
  
! 	* genmatch.c (dt_simplify::gen_1): Change dumping dependent on
! 	whether we are in (simplify ...) or (match ...) context.
  
! 2019-01-14  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/88796
! 	* emit-rtl.h (struct rtl_data): Add stack_protect_guard_decl field.
! 	* cfgexpand.c (stack_protect_prologue): Initialize
! 	crtl->stack_protect_guard_decl.
! 	* function.c (stack_protect_epilogue): Use it instead of calling
! 	targetm.stack_protect_guard again.
! 	* dse.c (check_mem_read_rtx): Ignore MEM_VOLATILE_P reads from
! 	MEMs with MEM_EXPR equal to crtl->stack_protect_guard or
! 	crtl->stack_protect_guard_decl.
! 	* config/i386/i386.c (ix86_stack_protect_guard): Set TREE_THIS_VOLATILE
! 	on the returned MEM_EXPR.
  
! 2019-01-12  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Alow setting
! 	vector length using -fopenacc-dim.
  
! 2019-01-12  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims): Take larger vector
! 	lengths into account.
  
! 2019-01-12  Svante Signell  <svante.signell@gmail.com>
  
! 	* config/i386/gnu.h (TARGET_THREAD_SSP_OFFSET): Define.
! 	(TARGET_CAN_SPLIT_STACK): Define.
! 	(TARGET_THREAD_SPLIT_STACK_OFFSET): Define.
  
! 2019-01-05  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* params.def (inline-unit-growth): Set to 40.
  
! 2019-01-12  Jakub Jelinek  <jakub@redhat.com>
  
! 	* tree-ssa-loop-ivopts.c (find_inv_vars): Fix a comment typo.
  
! 2019-01-12  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): In offloading
! 	region calling vector-partitionable routine, set default_vector_length
! 	to WARP_SIZE.
  
! 2019-01-12  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Add an use new
! 	variable default_vector_length.
  
! 2019-01-12  Tom de Vries  <tdevries@suse.de>
  
! 	PR middle-end/88703
! 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Apply defaults
! 	from oacc_default_dims, as oacc_validate_dims would do it, and apply
! 	dimensions limits.
  
! 2019-01-12  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1)
! 	(nvptx_goacc_validate_dims): Add used parameter.
! 	* doc/tm.texi: Regenerate.
! 	* omp-offload.c (oacc_parse_default_dims, oacc_validate_dims): Add
! 	argument to call to targetm.goacc.validate_dims.
! 	(default_goacc_validate_dims): Add used
! 	parameter.
! 	* target.def (validate_dims): Add used parameter in DEFHOOK.
! 	* targhooks.h (default_goacc_validate_dims): Add used parameter.
  
! 2019-01-11  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/85956
! 	PR lto/88733
! 	* tree-inline.h (struct copy_body_data): Add adjust_array_error_bounds
! 	field.
! 	* tree-inline.c (remap_type_1): Formatting fix.  If TYPE_MAX_VALUE of
! 	ARRAY_TYPE's TYPE_DOMAIN is newly error_mark_node, replace it with
! 	a dummy "omp dummy var" variable if id->adjust_array_error_bounds.
! 	* omp-low.c (new_omp_context): Set cb.adjust_array_error_bounds.
  
! 2019-01-11  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR rtl-optimization/87305
! 	* lra-assigns.c
! 	(setup_live_pseudos_and_spill_after_risky_transforms): Add code
! 	for little endian pseudos used as paradoxical subreg.
  
! 2019-01-11  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/88693
! 	* tree-ssa-strlen.c (get_min_string_length): Don't set *full_string_p
! 	for STRING_CSTs that don't contain any NUL characters in the first
! 	TREE_STRING_LENGTH bytes.
  
! 2019-01-11  Alan Modra  <amodra@gmail.com>
  
! 	PR 88777
! 	PR 88614
! 	* genattrtab.c (min_fn): Don't translate values.
! 	(min_attr_value): Return INT_MAX when the value can't be calculated.
! 	Return minimum among any values that can be calculated.
! 	(max_attr_value): Adjust.
  
! 2019-01-11  Jakub Jelinek  <jakub@redhat.com>
  
! 	* Makefile.in (PLUGIN_HEADERS): Add $(INSN_ATTR_H).
  
! 2019-01-11  Steve Ellcey  <sellcey@marvell.com>
  
! 	* config/aarch64/aarch64.c (aarch64_simd_call_p): New function.
! 	(aarch64_hard_regno_call_part_clobbered): Add insn argument.
! 	(aarch64_return_call_with_max_clobbers): New function.
! 	(TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): New macro.
! 	* config/avr/avr.c (avr_hard_regno_call_part_clobbered): Add insn
! 	argument.
! 	* config/i386/i386.c (ix86_hard_regno_call_part_clobbered): Ditto.
! 	* config/mips/mips.c (mips_hard_regno_call_part_clobbered): Ditto.
! 	* config/rs6000/rs6000.c (rs6000_hard_regno_call_part_clobbered): Ditto.
! 	* config/s390/s390.c (s390_hard_regno_call_part_clobbered): Ditto.
! 	* cselib.c (cselib_process_insn): Add argument to
! 	targetm.hard_regno_call_part_clobbered call.
! 	* ira-conflicts.c (ira_build_conflicts): Ditto.
! 	* ira-costs.c (ira_tune_allocno_costs): Ditto.
! 	* lra-constraints.c (inherit_reload_reg): Ditto.
! 	* lra-int.h (struct lra_reg): Add call_insn field, remove call_p field.
! 	* lra-lives.c (check_pseudos_live_through_calls): Add call_insn
! 	argument.  Call targetm.return_call_with_max_clobbers.
! 	Add argument to targetm.hard_regno_call_part_clobbered call.
! 	(calls_have_same_clobbers_p): New function.
! 	(process_bb_lives): Add call_insn and last_call_insn variables.
! 	Pass call_insn to check_pseudos_live_through_calls.
! 	Modify if stmt to check targetm.return_call_with_max_clobbers.
! 	Update setting of flush variable.
! 	(lra_create_live_ranges_1): Set call_insn to NULL instead of call_p
! 	to false.
! 	* lra.c (initialize_lra_reg_info_element): Set call_insn to NULL.
! 	* regcprop.c (copyprop_hardreg_forward_1): Add argument to
! 	targetm.hard_regno_call_part_clobbered call.
! 	* reginfo.c (choose_hard_reg_mode): Ditto.
! 	* regrename.c (check_new_reg_p): Ditto.
! 	* reload.c (find_equiv_reg): Ditto.
! 	* reload1.c (emit_reload_insns): Ditto.
! 	* sched-deps.c (deps_analyze_insn): Ditto.
! 	* sel-sched.c (init_regs_for_mode): Ditto.
! 	(mark_unavailable_hard_regs): Ditto.
! 	* targhooks.c (default_dwarf_frame_reg_mode): Ditto.
! 	* target.def (hard_regno_call_part_clobbered): Add insn argument.
! 	(return_call_with_max_clobbers): New target function.
! 	* doc/tm.texi: Regenerate.
! 	* doc/tm.texi.in (TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): New hook.
! 	* hooks.c (hook_bool_uint_mode_false): Change to
! 	hook_bool_insn_uint_mode_false.
! 	* hooks.h (hook_bool_uint_mode_false): Ditto.
  
! 2019-01-11  Steve Ellcey  <sellcey@marvell.com>
  
! 	* config/aarch64/aarch64.c (aarch64_simd_call_p): New function.
! 	(aarch64_remove_extra_call_preserved_regs): New function.
! 	(TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): New macro.
! 	* doc/tm.texi.in (TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): New hook.
  	* doc/tm.texi: Regenerate.
! 	* final.c (get_call_reg_set_usage): Call new hook.
! 	* target.def (remove_extra_call_preserved_regs): New hook.
! 	* targhooks.c (default_remove_extra_call_preserved_regs): New function.
! 	* targhooks.h (default_remove_extra_call_preserved_regs): New function.
! 
! 2019-01-11  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR bootstrap/88714
! 	* passes.c (finish_optimization_passes): Call print_combine_total_stats
! 	inside of pass_combine_1 dump rather than pass_profile_1.
! 
! 2019-01-11  Tom de Vries  <tdevries@suse.de>
! 
! 	* config/nvptx/nvptx.c (PTX_CTA_NUM_BARRIERS, PTX_PER_CTA_BARRIER)
! 	(PTX_NUM_PER_CTA_BARRIER, PTX_FIRST_PER_WORKER_BARRIER)
! 	(PTX_NUM_PER_WORKER_BARRIERS): Define.
! 	(nvptx_apply_dim_limits): Prevent vector_length 64 and
! 	num_workers 16.
! 
! 2019-01-11  Tom de Vries  <tdevries@suse.de>
! 
! 	* config/nvptx/nvptx.c (PTX_CTA_SIZE): Move up.
! 
! 2019-01-11  Jan Beulich  <jbeulich@suse.com>
! 
! 	* config/i386/i386.md (rex64suffix): Add L suffix for SI.
! 	* config/i386/sse.md (cvtusi2<ssescalarmodesuffix>32<round_name>,
! 	sse2_cvtsi2sd): Add {l}.
! 	(sse2_cvtsi2sdq<round_name>): Make q conditional upon AT&T
! 	syntax.
! 
! 2019-01-10  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/88785
! 	* config/i386/sse.md (float<floatunssuffix>v2div2sf2): Turn into
! 	define_expand.
! 	(*float<floatunssuffix>v2div2sf2): New define_insn.
! 	(float<floatunssuffix>v2div2sf2_mask): Turn into define_expand.
! 	(*float<floatunssuffix>v2div2sf2_mask): New define_insn.
! 	(*float<floatunssuffix>v2div2sf2_mask_1): Replace
! 	subrtxes (const_vector:V2SF [(const_int 0) (const_int 0)]) with
! 	match_operands with "const0_operand" "C".
! 
! 2019-01-10  Tamar Christina  <tamar.christina@arm.com>
! 
! 	* config/aarch64/aarch64-builtins.c
! 	(aarch64_init_builtins): Move aarch64_init_fcmla_laneq_builtins...
! 	(aarch64_init_simd_builtins): ...Here
! 
! 2019-01-10  Vladimir Makarov  <vmakarov@redhat.com>
! 
! 	PR rtl-optimization/87305
! 	* lra-assigns.c
! 	(setup_live_pseudos_and_spill_after_risky_transforms): Check
! 	allocation for big endian pseudos used as paradoxical subregs and
! 	spill them if it is wrong.
! 	* lra-constraints.c (lra_constraints): Add a comment.
! 
! 2019-01-10  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/88792
! 	* tree-ssa-pre.c (get_representative_for): Do not return a
! 	value-number here.
! 
! 2019-01-10  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR middle-end/84877
! 	PR bootstrap/88450
! 	* function.c (assign_stack_local_1): Revert the 2018-11-21 changes.
! 	(assign_parm_setup_block): Do the argument slot realignment here
! 	instead.
! 
! 2019-01-10  Stefan Agner  <stefan@agner.ch>
! 
! 	PR target/88648
! 	* config/arm/arm.c (arm_option_override_internal): Force
! 	opts->x_inline_asm_unified to true only if TARGET_THUMB2_P.
! 
! 2019-01-10  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c/88568
! 	* attribs.c (handle_dll_attribute): Clear TREE_STATIC after setting
! 	DECL_EXTERNAL.
! 
! 2019-01-10  Tamar Christina  <tamar.christina@arm.com>
! 
! 	* config/arm/arm-builtins.c
! 	(enum arm_type_qualifiers): Add qualifier_lane_pair_index.
! 	(MAC_LANE_PAIR_QUALIFIERS): New.
! 	(arm_expand_builtin_args): Use it.
! 	(arm_expand_builtin_1): Likewise.
! 	* config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): New.
! 	* config/arm/arm.c (neon_vcmla_lane_prepare_operands): New.
! 	* config/arm/arm-c.c (arm_cpu_builtins): Add __ARM_FEATURE_COMPLEX.
! 	* config/arm/arm_neon.h:
! 	(vcadd_rot90_f16): New.
! 	(vcaddq_rot90_f16): New.
! 	(vcadd_rot270_f16): New.
! 	(vcaddq_rot270_f16): New.
! 	(vcmla_f16): New.
! 	(vcmlaq_f16): New.
! 	(vcmla_lane_f16): New.
! 	(vcmla_laneq_f16): New.
! 	(vcmlaq_lane_f16): New.
! 	(vcmlaq_laneq_f16): New.
! 	(vcmla_rot90_f16): New.
! 	(vcmlaq_rot90_f16): New.
! 	(vcmla_rot90_lane_f16): New.
! 	(vcmla_rot90_laneq_f16): New.
! 	(vcmlaq_rot90_lane_f16): New.
! 	(vcmlaq_rot90_laneq_f16): New.
! 	(vcmla_rot180_f16): New.
! 	(vcmlaq_rot180_f16): New.
! 	(vcmla_rot180_lane_f16): New.
! 	(vcmla_rot180_laneq_f16): New.
! 	(vcmlaq_rot180_lane_f16): New.
! 	(vcmlaq_rot180_laneq_f16): New.
! 	(vcmla_rot270_f16): New.
! 	(vcmlaq_rot270_f16): New.
! 	(vcmla_rot270_lane_f16): New.
! 	(vcmla_rot270_laneq_f16): New.
! 	(vcmlaq_rot270_lane_f16): New.
! 	(vcmlaq_rot270_laneq_f16): New.
! 	(vcadd_rot90_f32): New.
! 	(vcaddq_rot90_f32): New.
! 	(vcadd_rot270_f32): New.
! 	(vcaddq_rot270_f32): New.
! 	(vcmla_f32): New.
! 	(vcmlaq_f32): New.
! 	(vcmla_lane_f32): New.
! 	(vcmla_laneq_f32): New.
! 	(vcmlaq_lane_f32): New.
! 	(vcmlaq_laneq_f32): New.
! 	(vcmla_rot90_f32): New.
! 	(vcmlaq_rot90_f32): New.
! 	(vcmla_rot90_lane_f32): New.
! 	(vcmla_rot90_laneq_f32): New.
! 	(vcmlaq_rot90_lane_f32): New.
! 	(vcmlaq_rot90_laneq_f32): New.
! 	(vcmla_rot180_f32): New.
! 	(vcmlaq_rot180_f32): New.
! 	(vcmla_rot180_lane_f32): New.
! 	(vcmla_rot180_laneq_f32): New.
! 	(vcmlaq_rot180_lane_f32): New.
! 	(vcmlaq_rot180_laneq_f32): New.
! 	(vcmla_rot270_f32): New.
! 	(vcmlaq_rot270_f32): New.
! 	(vcmla_rot270_lane_f32): New.
! 	(vcmla_rot270_laneq_f32): New.
! 	(vcmlaq_rot270_lane_f32): New.
! 	(vcmlaq_rot270_laneq_f32): New.
! 	* config/arm/arm_neon_builtins.def (vcadd90, vcadd270, vcmla0, vcmla90,
! 	vcmla180, vcmla270, vcmla_lane0, vcmla_lane90, vcmla_lane180,
! 	vcmla_lane270, vcmla_laneq0, vcmla_laneq90, vcmla_laneq180,
! 	vcmla_laneq270, vcmlaq_lane0, vcmlaq_lane90, vcmlaq_lane180,
! 	vcmlaq_lane270): New.
! 	* config/arm/neon.md (neon_vcmla_lane<rot><mode>,
! 	neon_vcmla_laneq<rot><mode>, neon_vcmlaq_lane<rot><mode>): New.
! 	* config/arm/arm.c (arm_arch8_3, arm_arch8_4): New.
! 	* config/arm/arm.h (TARGET_COMPLEX, arm_arch8_3, arm_arch8_4): New.
! 	(arm_option_reconfigure_globals): Use them.
! 	* config/arm/iterators.md (VDF, VQ_HSF): New.
! 	(VCADD, VCMLA): New.
! 	(VF_constraint, rot, rotsplit1, rotsplit2): Add V4HF and V8HF.
! 	* config/arm/neon.md (neon_vcadd<rot><mode>, neon_vcmla<rot><mode>):
! 	New.
! 	* config/arm/unspecs.md (UNSPEC_VCADD90, UNSPEC_VCADD270,
! 	UNSPEC_VCMLA, UNSPEC_VCMLA90, UNSPEC_VCMLA180, UNSPEC_VCMLA270): New.
! 
! 2019-01-10  Tamar Christina  <tamar.christina@arm.com>
! 
! 	* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
! 	Add qualifier_lane_pair_index.
! 	(emit-rtl.h): Include.
! 	(TYPES_QUADOP_LANE_PAIR): New.
! 	(aarch64_simd_expand_args): Use it.
! 	(aarch64_simd_expand_builtin): Likewise.
! 	(AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_laneq_builtin_datum):
! 	New.
! 	(FCMLA_LANEQ_BUILTIN, AARCH64_SIMD_FCMLA_LANEQ_BUILTIN_BASE,
! 	AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_lane_builtin_data,
! 	aarch64_init_fcmla_laneq_builtins, aarch64_expand_fcmla_builtin): New.
! 	(aarch64_init_builtins): Add aarch64_init_fcmla_laneq_builtins.
! 	(aarch64_expand_buildin): Add AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V2SF,
! 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V2SF,
! 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V2SF,
! 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ2700_V2SF,
! 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V4HF,
! 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V4HF,
! 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V4HF,
! 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ270_V4HF.
! 	* config/aarch64/iterators.md (FCMLA_maybe_lane): New.
! 	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
! 	Add __ARM_FEATURE_COMPLEX.
! 	* config/aarch64/aarch64-simd-builtins.def (fcadd90, fcadd270, fcmla0,
! 	fcmla90, fcmla180, fcmla270, fcmla_lane0, fcmla_lane90, fcmla_lane180,
! 	fcmla_lane270, fcmla_laneq0, fcmla_laneq90, fcmla_laneq180,
! 	fcmla_laneq270, fcmlaq_lane0, fcmlaq_lane90, fcmlaq_lane180,
! 	fcmlaq_lane270): New.
! 	* config/aarch64/aarch64-simd.md (aarch64_fcmla_lane<rot><mode>,
! 	aarch64_fcmla_laneq<rot>v4hf, aarch64_fcmlaq_lane<rot><mode>,
! 	aarch64_fcadd<rot><mode>, aarch64_fcmla<rot><mode>): New.
! 	* config/aarch64/arm_neon.h:
! 	(vcadd_rot90_f16): New.
! 	(vcaddq_rot90_f16): New.
! 	(vcadd_rot270_f16): New.
! 	(vcaddq_rot270_f16): New.
! 	(vcmla_f16): New.
! 	(vcmlaq_f16): New.
! 	(vcmla_lane_f16): New.
! 	(vcmla_laneq_f16): New.
! 	(vcmlaq_lane_f16): New.
! 	(vcmlaq_rot90_lane_f16): New.
! 	(vcmla_rot90_laneq_f16): New.
! 	(vcmla_rot90_lane_f16): New.
! 	(vcmlaq_rot90_f16): New.
! 	(vcmla_rot90_f16): New.
! 	(vcmlaq_laneq_f16): New.
! 	(vcmla_rot180_laneq_f16): New.
! 	(vcmla_rot180_lane_f16): New.
! 	(vcmlaq_rot180_f16): New.
! 	(vcmla_rot180_f16): New.
! 	(vcmlaq_rot90_laneq_f16): New.
! 	(vcmlaq_rot270_laneq_f16): New.
! 	(vcmlaq_rot270_lane_f16): New.
! 	(vcmla_rot270_laneq_f16): New.
! 	(vcmlaq_rot270_f16): New.
! 	(vcmla_rot270_f16): New.
! 	(vcmlaq_rot180_laneq_f16): New.
! 	(vcmlaq_rot180_lane_f16): New.
! 	(vcmla_rot270_lane_f16): New.
! 	(vcadd_rot90_f32): New.
! 	(vcaddq_rot90_f32): New.
! 	(vcaddq_rot90_f64): New.
! 	(vcadd_rot270_f32): New.
! 	(vcaddq_rot270_f32): New.
! 	(vcaddq_rot270_f64): New.
! 	(vcmla_f32): New.
! 	(vcmlaq_f32): New.
! 	(vcmlaq_f64): New.
! 	(vcmla_lane_f32): New.
! 	(vcmla_laneq_f32): New.
! 	(vcmlaq_lane_f32): New.
! 	(vcmlaq_laneq_f32): New.
! 	(vcmla_rot90_f32): New.
! 	(vcmlaq_rot90_f32): New.
! 	(vcmlaq_rot90_f64): New.
! 	(vcmla_rot90_lane_f32): New.
! 	(vcmla_rot90_laneq_f32): New.
! 	(vcmlaq_rot90_lane_f32): New.
! 	(vcmlaq_rot90_laneq_f32): New.
! 	(vcmla_rot180_f32): New.
! 	(vcmlaq_rot180_f32): New.
! 	(vcmlaq_rot180_f64): New.
! 	(vcmla_rot180_lane_f32): New.
! 	(vcmla_rot180_laneq_f32): New.
! 	(vcmlaq_rot180_lane_f32): New.
! 	(vcmlaq_rot180_laneq_f32): New.
! 	(vcmla_rot270_f32): New.
! 	(vcmlaq_rot270_f32): New.
! 	(vcmlaq_rot270_f64): New.
! 	(vcmla_rot270_lane_f32): New.
! 	(vcmla_rot270_laneq_f32): New.
! 	(vcmlaq_rot270_lane_f32): New.
! 	(vcmlaq_rot270_laneq_f32): New.
! 	* config/aarch64/aarch64.h (TARGET_COMPLEX): New.
! 	* config/aarch64/iterators.md (UNSPEC_FCADD90, UNSPEC_FCADD270,
! 	UNSPEC_FCMLA, UNSPEC_FCMLA90, UNSPEC_FCMLA180, UNSPEC_FCMLA270): New.
! 	(FCADD, FCMLA): New.
! 	(rot): New.
! 	* config/arm/types.md (neon_fcadd, neon_fcmla): New.
! 
! 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
! 
! 	PR other/16615
! 
! 	* config/pa/pa.c: Change "can not" to "cannot".
! 	* gimple-ssa-evrp-analyze.c: Likewise.
! 	* ipa-icf.c: Likewise.
! 	* ipa-polymorphic-call.c: Likewise.
! 	* ipa-pure-const.c: Likewise.
! 	* lra-constraints.c: Likewise.
! 	* lra-remat.c: Likewise.
! 	* reload1.c: Likewise.
! 	* reorg.c: Likewise.
! 	* tree-ssa-uninit.c: Likewise.
! 
! 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
! 
! 	PR other/16615
  
! 	* Makefile.in: Mechanically replace "can not" with "cannot".
! 	* alias.c: Likewise.
! 	* builtins.c: Likewise.
! 	* calls.c: Likewise.
! 	* cgraph.c: Likewise.
! 	* cgraph.h: Likewise.
! 	* cgraphclones.c: Likewise.
! 	* cgraphunit.c: Likewise.
! 	* combine-stack-adj.c: Likewise.
! 	* combine.c: Likewise.
! 	* common/config/i386/i386-common.c: Likewise.
! 	* config/aarch64/aarch64.c: Likewise.
! 	* config/alpha/sync.md: Likewise.
! 	* config/arc/arc.c: Likewise.
! 	* config/arc/predicates.md: Likewise.
! 	* config/arm/arm-c.c: Likewise.
! 	* config/arm/arm.c: Likewise.
! 	* config/arm/arm.h: Likewise.
! 	* config/arm/arm.md: Likewise.
! 	* config/arm/cortex-r4f.md: Likewise.
! 	* config/csky/csky.c: Likewise.
! 	* config/csky/csky.h: Likewise.
! 	* config/darwin-f.c: Likewise.
! 	* config/epiphany/epiphany.md: Likewise.
! 	* config/i386/i386.c: Likewise.
! 	* config/i386/sol2.h: Likewise.
! 	* config/m68k/m68k.c: Likewise.
! 	* config/mcore/mcore.h: Likewise.
! 	* config/microblaze/microblaze.md: Likewise.
! 	* config/mips/20kc.md: Likewise.
! 	* config/mips/sb1.md: Likewise.
! 	* config/nds32/nds32.c: Likewise.
! 	* config/nds32/predicates.md: Likewise.
! 	* config/pa/pa.c: Likewise.
! 	* config/rs6000/e300c2c3.md: Likewise.
! 	* config/rs6000/rs6000.c: Likewise.
! 	* config/s390/s390.h: Likewise.
! 	* config/sh/sh.c: Likewise.
! 	* config/sh/sh.md: Likewise.
! 	* config/spu/vmx2spu.h: Likewise.
! 	* cprop.c: Likewise.
! 	* dbxout.c: Likewise.
! 	* df-scan.c: Likewise.
! 	* doc/cfg.texi: Likewise.
! 	* doc/extend.texi: Likewise.
! 	* doc/fragments.texi: Likewise.
! 	* doc/gty.texi: Likewise.
! 	* doc/invoke.texi: Likewise.
! 	* doc/lto.texi: Likewise.
! 	* doc/md.texi: Likewise.
! 	* doc/objc.texi: Likewise.
! 	* doc/rtl.texi: Likewise.
! 	* doc/tm.texi: Likewise.
! 	* dse.c: Likewise.
! 	* emit-rtl.c: Likewise.
! 	* emit-rtl.h: Likewise.
! 	* except.c: Likewise.
! 	* expmed.c: Likewise.
! 	* expr.c: Likewise.
! 	* fold-const.c: Likewise.
! 	* genautomata.c: Likewise.
! 	* gimple-fold.c: Likewise.
! 	* hard-reg-set.h: Likewise.
! 	* ifcvt.c: Likewise.
! 	* ipa-comdats.c: Likewise.
! 	* ipa-cp.c: Likewise.
! 	* ipa-devirt.c: Likewise.
! 	* ipa-fnsummary.c: Likewise.
! 	* ipa-icf.c: Likewise.
! 	* ipa-inline-transform.c: Likewise.
! 	* ipa-inline.c: Likewise.
! 	* ipa-polymorphic-call.c: Likewise.
! 	* ipa-profile.c: Likewise.
! 	* ipa-prop.c: Likewise.
! 	* ipa-pure-const.c: Likewise.
! 	* ipa-reference.c: Likewise.
! 	* ipa-split.c: Likewise.
! 	* ipa-visibility.c: Likewise.
! 	* ipa.c: Likewise.
! 	* ira-build.c: Likewise.
! 	* ira-color.c: Likewise.
! 	* ira-conflicts.c: Likewise.
! 	* ira-costs.c: Likewise.
! 	* ira-int.h: Likewise.
! 	* ira-lives.c: Likewise.
! 	* ira.c: Likewise.
! 	* ira.h: Likewise.
! 	* loop-invariant.c: Likewise.
! 	* loop-unroll.c: Likewise.
! 	* lower-subreg.c: Likewise.
! 	* lra-assigns.c: Likewise.
! 	* lra-constraints.c: Likewise.
! 	* lra-eliminations.c: Likewise.
! 	* lra-lives.c: Likewise.
! 	* lra-remat.c: Likewise.
! 	* lra-spills.c: Likewise.
! 	* lra.c: Likewise.
! 	* lto-cgraph.c: Likewise.
! 	* lto-streamer-out.c: Likewise.
! 	* postreload-gcse.c: Likewise.
! 	* predict.c: Likewise.
! 	* profile-count.h: Likewise.
! 	* profile.c: Likewise.
! 	* recog.c: Likewise.
! 	* ree.c: Likewise.
! 	* reload.c: Likewise.
! 	* reload1.c: Likewise.
! 	* reorg.c: Likewise.
! 	* resource.c: Likewise.
! 	* rtl.def: Likewise.
! 	* rtl.h: Likewise.
! 	* rtlanal.c: Likewise.
! 	* sched-deps.c: Likewise.
! 	* sched-ebb.c: Likewise.
! 	* sched-rgn.c: Likewise.
! 	* sel-sched-ir.c: Likewise.
! 	* sel-sched.c: Likewise.
! 	* shrink-wrap.c: Likewise.
! 	* simplify-rtx.c: Likewise.
! 	* symtab.c: Likewise.
! 	* target.def: Likewise.
! 	* toplev.c: Likewise.
! 	* tree-call-cdce.c: Likewise.
! 	* tree-cfg.c: Likewise.
! 	* tree-complex.c: Likewise.
! 	* tree-core.h: Likewise.
! 	* tree-eh.c: Likewise.
! 	* tree-inline.c: Likewise.
! 	* tree-loop-distribution.c: Likewise.
! 	* tree-nrv.c: Likewise.
! 	* tree-profile.c: Likewise.
! 	* tree-sra.c: Likewise.
! 	* tree-ssa-alias.c: Likewise.
! 	* tree-ssa-dce.c: Likewise.
! 	* tree-ssa-dom.c: Likewise.
! 	* tree-ssa-forwprop.c: Likewise.
! 	* tree-ssa-loop-im.c: Likewise.
! 	* tree-ssa-loop-ivcanon.c: Likewise.
! 	* tree-ssa-loop-ivopts.c: Likewise.
! 	* tree-ssa-loop-niter.c: Likewise.
! 	* tree-ssa-phionlycprop.c: Likewise.
! 	* tree-ssa-phiopt.c: Likewise.
! 	* tree-ssa-propagate.c: Likewise.
! 	* tree-ssa-threadedge.c: Likewise.
! 	* tree-ssa-threadupdate.c: Likewise.
! 	* tree-ssa-uninit.c: Likewise.
! 	* tree-ssanames.c: Likewise.
! 	* tree-streamer-out.c: Likewise.
! 	* tree.c: Likewise.
! 	* tree.h: Likewise.
! 	* vr-values.c: Likewise.
  
! 2019-01-09  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	* config/i386/i386-protos.h (ix86_expand_xorsign): New prototype.
! 	(ix86_split_xorsign): Ditto.
! 	* config/i386/i386.c (ix86_expand_xorsign): New function.
! 	(ix86_split_xorsign): Ditto.
! 	* config/i386/i386.md (UNSPEC_XORSIGN): New unspec.
! 	(xorsign<mode>3): New expander.
! 	(xorsign<mode>3_1): New insn_and_split pattern.
! 	* config/i386/sse.md (xorsign<mode>3): New expander.
  
! 2019-01-09  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* config/sparc/sparc.md (*tablejump_sp32): Merge into...
! 	(*tablejump_sp64): Likewise.
! 	(*tablejump<P:mode>): ...this.
! 	(*call_address_sp32): Merge into...
! 	(*call_address_sp64): Likewise.
! 	(*call_address<P:mode>): ...this.
! 	(*call_symbolic_sp32): Merge into...
! 	(*call_symbolic_sp64): Likewise.
! 	(*call_symbolic<P:mode>): ...this.
! 	(call_value): Remove constraint and add predicate.
! 	(*call_value_address_sp32): Merge into...
! 	(*call_value_address_sp64): Likewise.
! 	(*call_value_address<P:mode>): ...this.
! 	(*call_value_symbolic_sp32): Merge into...
! 	(*call_value_symbolic_sp64): Likewise.
! 	(*call_value_symbolic<P:mode>): ...this.
! 	(*sibcall_symbolic_sp32): Merge into...
! 	(*sibcall_symbolic_sp64): Likewise.
! 	(*sibcall_symbolic<P:mode>): ...this.
! 	(sibcall_value): Remove constraint and add predicate.
! 	(*sibcall_value_symbolic_sp32): Merge into...
! 	(*sibcall_value_symbolic_sp64): Likewise.
! 	(*sibcall_value_symbolic<P:mode>): ...this.
! 	(window_save): Minor tweak.
! 	(*branch_sp32): Merge into...
! 	(*branch_sp64): Likewise.
! 	(*branch<P:mode>): ...this.
  
! 2019-01-09  Eric Botcazou  <ebotcazou@adacore.com>
! 	    James Clarke  <jrtc27@jrtc27.com>
  
! 	PR target/84010
! 	* config/sparc/sparc.c (sparc_legitimize_tls_address): Only use Pmode
! 	consistently in TLS address generation and adjust code to the renaming
! 	of patterns.  Mark calls to __tls_get_addr as const.
! 	* config/sparc/sparc.md (tgd_hi22): Turn into...
! 	(tgd_hi22<P:mode>): ...this and use Pmode throughout.
! 	(tgd_lo10): Turn into...
! 	(tgd_lo10<P:mode>): ...this and use Pmode throughout.
! 	(tgd_add32): Merge into...
! 	(tgd_add64): Likewise.
! 	(tgd_add<P:mode>): ...this and use Pmode throughout.
! 	(tldm_hi22): Turn into...
! 	(tldm_hi22<P:mode>): ...this and use Pmode throughout.
! 	(tldm_lo10): Turn into...
! 	(tldm_lo10<P:mode>): ...this and use Pmode throughout.
! 	(tldm_add32): Merge into...
! 	(tldm_add64): Likewise.
! 	(tldm_add<P:mode>): ...this and use Pmode throughout.
! 	(tldm_call32): Merge into...
! 	(tldm_call64): Likewise.
! 	(tldm_call<P:mode>): ...this and use Pmode throughout.
! 	(tldo_hix22): Turn into...
! 	(tldo_hix22<P:mode>): ...this and use Pmode throughout.
! 	(tldo_lox10): Turn into...
! 	(tldo_lox10<P:mode>): ...this and use Pmode throughout.
! 	(tldo_add32): Merge into...
! 	(tldo_add64): Likewise.
! 	(tldo_add<P:mode>): ...this and use Pmode throughout.
! 	(tie_hi22): Turn into...
! 	(tie_hi22<P:mode>): ...this and use Pmode throughout.
! 	(tie_lo10): Turn into...
! 	(tie_lo10<P:mode>): ...this and use Pmode throughout.
! 	(tie_ld64): Use DImode throughout.
! 	(tie_add32): Merge into...
! 	(tie_add64): Likewise.
! 	(tie_add<P:mode>): ...this and use Pmode throughout.
! 	(tle_hix22_sp32): Merge into...
! 	(tle_hix22_sp64): Likewise.
! 	(tle_hix22<P:mode>): ...this and use Pmode throughout.
! 	(tle_lox22_sp32): Merge into...
! 	(tle_lox22_sp64): Likewise.
! 	(tle_lox22<P:mode>): ...this and use Pmode throughout.
! 	(*tldo_ldub_sp32): Merge into...
! 	(*tldo_ldub_sp64): Likewise.
! 	(*tldo_ldub<P:mode>): ...this and use Pmode throughout.
! 	(*tldo_ldub1_sp32): Merge into...
! 	(*tldo_ldub1_sp64): Likewise.
! 	(*tldo_ldub1<P:mode>): ...this and use Pmode throughout.
! 	(*tldo_ldub2_sp32): Merge into...
! 	(*tldo_ldub2_sp64): Likewise.
! 	(*tldo_ldub2<P:mode>): ...this and use Pmode throughout.
! 	(*tldo_ldsb1_sp32): Merge into...
! 	(*tldo_ldsb1_sp64): Likewise.
! 	(*tldo_ldsb1<P:mode>): ...this and use Pmode throughout.
! 	(*tldo_ldsb2_sp32): Merge into...
! 	(*tldo_ldsb2_sp64): Likewise.
! 	(*tldo_ldsb2<P:mode>): ...this and use Pmode throughout.
! 	(*tldo_ldub3_sp64): Use DImode throughout.
! 	(*tldo_ldsb3_sp64): Likewise.
! 	(*tldo_lduh_sp32): Merge into...
! 	(*tldo_lduh_sp64): Likewise.
! 	(*tldo_lduh<P:mode>): ...this and use Pmode throughout.
! 	(*tldo_lduh1_sp32): Merge into...
! 	(*tldo_lduh1_sp64): Likewise.
! 	(*tldo_lduh1<P:mode>): ...this and use Pmode throughout.
! 	(*tldo_ldsh1_sp32): Merge into...
! 	(*tldo_ldsh1_sp64): Likewise.
! 	(*tldo_ldsh1<P:mode>): ...this and use Pmode throughout.
! 	(*tldo_lduh2_sp64): Use DImode throughout.
! 	(*tldo_ldsh2_sp64): Likewise.
! 	(*tldo_lduw_sp32): Merge into...
! 	(*tldo_lduw_sp64): Likewise.
! 	(*tldo_lduw<P:mode>): ...this and use Pmode throughout.
! 	(*tldo_lduw1_sp64): Use DImode throughout.
! 	(*tldo_ldsw1_sp64): Likewise.
! 	(*tldo_ldx_sp64): Likewise.
! 	(*tldo_stb_sp32): Merge into...
! 	(*tldo_stb_sp64): Likewise.
! 	(*tldo_stb<P:mode>): ...this and use Pmode throughout.
! 	(*tldo_sth_sp32): Merge into...
! 	(*tldo_sth_sp64): Likewise.
! 	(*tldo_sth<P:mode>): ...this and use Pmode throughout.
! 	(*tldo_stw_sp32): Merge into...
! 	(*tldo_stw_sp64): Likewise.
! 	(*tldo_stw<P:mode>): ...this and use Pmode throughout.
! 	(*tldo_stx_sp64): Use DImode throughout.
  
! 2018-01-09  Sudakshina Das  <sudi.das@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_override_options): Add case to
! 	check configure option to set BTI and Return Address Signing.
! 	* configure.ac: Add --enable-standard-branch-protection and
! 	--disable-standard-branch-protection.
! 	* configure: Regenerated.
! 	* doc/install.texi: Document the same.
  
! 2018-01-09  Sudakshina Das  <sudi.das@arm.com>
! 	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
  
! 	* config.gcc (aarch64*-*-*): Add aarch64-bti-insert.o.
! 	* config/aarch64/aarch64.h: Update comment for TRAMPOLINE_SIZE.
! 	* config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Update
! 	if bti is enabled.
! 	* config/aarch64/aarch64-bti-insert.c: New file.
! 	* config/aarch64/aarch64-passes.def (INSERT_PASS_BEFORE): Insert bti
! 	pass.
! 	* config/aarch64/aarch64-protos.h (make_pass_insert_bti): Declare the
! 	new bti pass.
! 	* config/aarch64/aarch64.md (unspecv): Add UNSPECV_BTI_NOARG,
! 	UNSPECV_BTI_C, UNSPECV_BTI_J and UNSPECV_BTI_JC.
! 	(bti_noarg, bti_j, bti_c, bti_jc): New define_insns.
! 	* config/aarch64/t-aarch64: Add rule for aarch64-bti-insert.o.
  
! 2018-01-09  Sudakshina Das  <sudi.das@arm.com>
  
! 	* config/aarch64/aarch64-protos.h (aarch64_bti_enabled): Declare.
! 	* config/aarch64/aarch64.c (aarch64_handle_no_branch_protection):
! 	Disable bti for -mbranch-protection=none.
! 	(aarch64_handle_standard_branch_protection): Enable bti for
! 	-mbranch-protection=standard.
! 	(aarch64_handle_bti_protection): Enable bti for "bti" in the string to
! 	-mbranch-protection.
! 	(aarch64_bti_enabled): Check if bti is enabled.
! 	* config/aarch64/aarch64.opt: Declare target variable.
! 	* doc/invoke.texi: Add bti to the -mbranch-protection documentation.
  
! 2018-01-09  Sudakshina Das  <sudi.das@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_expand_prologue): Use new
! 	epilogue/prologue scratch registers EP0_REGNUM and EP1_REGNUM.
! 	(aarch64_expand_epilogue): Likewise.
! 	(aarch64_output_mi_thunk): Likewise
! 	* config/aarch64/aarch64.h (REG_CLASS_CONTENTS): Change
! 	TAILCALL_ADDR_REGS to x16 and x17.
! 	* config/aarch64/aarch64.md: Define EP0_REGNUM and EP1_REGNUM.
  
! 2018-01-09  Sudakshina Das  <sudi.das@arm.com>
  
! 	* config/aarch64/aarch64-option-extensions.def: Define
! 	AARCH64_OPT_EXTENSION for memtag, rng, sb, ssbs and predres.
! 	* config/aarch64/aarch64.h (AARCH64_FL_RNG): New.
! 	(AARCH64_FL_MEMTAG, ARCH64_FL_SB, AARCH64_FL_SSBS): New.
! 	(AARCH64_FL_PREDRES): New.
! 	(AARCH64_FL_FOR_ARCH8_5): Add AARCH64_FL_SB, AARCH64_FL_SSBS and
! 	AARCH64_FL_PREDRES by default.
! 	* doc/invoke.texi: Document rng, memtag, sb, ssbs and predres.
  
! 2018-01-09  Sudakshina Das  <sudi.das@arm.com>
  
! 	* config/aarch64/aarch64-arches.def: Define AARCH64_ARCH for
! 	ARMv8.5-A.
! 	* config/aarch64/aarch64.h (AARCH64_FL_V8_5): New.
! 	(AARCH64_FL_FOR_ARCH8_5, AARCH64_ISA_V8_5): New.
! 	* doc/invoke.texi: Document ARMv8.5-A.
  
! 2019-01-09  Alejandro Martinez  <alejandro.martinezvicente@arm.com>
  
! 	* config/aarch64/aarch64-sve.md (copysign<mode>3): New define_expand.
! 	(xorsign<mode>3): Likewise.
  
! 2019-01-09  Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/88758
! 	* tree.c (initializer_each_zero_or_onep) <case VECTOR_CST>: Use
! 	vector_cst_elt instead of VECTOR_CST_ENCODED_ELT.
  
! 	PR rtl-optimization/88331
! 	* function.c (assign_stack_local_1): Don't set dynamic_align_addr if
! 	not currently_expanding_to_rtl.
  
! 2019-01-09  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* doc/invoke.texi (-Os): Remove trailing spaces.
! 	(-finline-functions): Remove reference to -O2.
  
! 2019-01-08  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/79593
! 	* config/i386/i386.md (reg = mem; mem = reg): New define_peephole2.
  
! 	* config/rs6000/rs6000.c (rs6000_delegitimize_address): Delegitimize
! 	UNSPEC_FUSION_GPR to its argument.  Formatting fixes.
  
! 2019-01-08  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR bootstrap/88721
! 	* config/sparc/sparc.c (function_arg_slotno): Set *PPREGNO & *PPADDING
! 	to -1 on entry.
  
! 	PR debug/88723
! 	* config/sparc/sparc.c (sparc_delegitimize_address): Deal with naked
! 	UNSPECs and UNSPEC_MOVE_GOTDATA specifically.
  
! 2019-01-08  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/88717
! 	* config/i386/i386.c (ix86_avx_u128_mode_exit): Call
! 	ix86_avx_u128_mode_entry.
  
! 2019-01-08  Martin Liska  <mliska@suse.cz>
  
! 	PR tree-optimization/88753
! 	* tree-switch-conversion.c (switch_conversion::build_one_array):
! 	Come up with local variable constructor.  Convert first to
! 	type of constructor values.
  
  2019-01-08  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/86554
! 	* tree-ssa-sccvn.c (eliminate_dom_walker, rpo_elim,
! 	rpo_avail): Move earlier.
! 	(visit_nary_op): When value-numbering to expressions
! 	with different overflow behavior make sure there's an
! 	available expression on the path.
! 
! 2019-01-08  Sam Tebbs  <sam.tebbs@arm.com>
! 
! 	* config/aarch64/aarch64.c (BRANCH_PROTECT_STR_MAX,
! 	aarch64_parse_branch_protection,
! 	struct aarch64_branch_protect_type,
! 	aarch64_handle_no_branch_protection,
! 	aarch64_handle_standard_branch_protection,
! 	aarch64_validate_mbranch_protection,
! 	aarch64_handle_pac_ret_protection,
! 	aarch64_handle_attr_branch_protection,
! 	accepted_branch_protection_string,
! 	aarch64_pac_ret_subtypes,
! 	aarch64_branch_protect_types,
! 	aarch64_handle_pac_ret_leaf): Define.
! 	(aarch64_override_options_after_change_1, aarch64_override_options):
! 	Add check for accepted_branch_protection_string.
! 	(aarch64_option_save): Save accepted_branch_protection_string.
! 	(aarch64_option_restore): Save accepted_branch_protection_string.
! 	* config/aarch64/aarch64.c (aarch64_attributes): Add branch-protection.
! 	* config/aarch64/aarch64.opt: Add mbranch-protection. Deprecate
! 	msign-return-address.
! 	* doc/invoke.texi: Add mbranch-protection.
! 
! 2019-01-08  Alan Modra  <amodra@gmail.com>
! 
! 	PR target/88614
! 	* genattrtab.c (max_attr_value, min_attr_value, or_attr_value):
! 	Delete "unknownp" parameter.  Adjust callers.  Handle
! 	CONST_INT, PLUS, MINUS, and MULT.
! 	(attr_value_aligned): Renamed from or_attr_value.
! 	(min_attr_value): Return INT_MIN for unhandled rtl case..
! 	(min_fn): ..and translate to INT_MAX here.
! 	(write_length_unit_log): Modify to cope without "unknown".
! 	(write_attr_value): Handle IF_THEN_ELSE.
! 
! 2019-01-07  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* tree-vect-stmts.c (vectorizable_store): Don't use the dataref_offset
! 	optimization for masked stores.
! 
! 2019-01-07  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	PR middle-end/88567
! 	* tree-vect-loop.c (get_initial_defs_for_reduction): Pass the
! 	output vector directly to duplicate_and_interleave instead of
! 	going through a temporary.  Postpone insertion of ctor_seq to
! 	the end of the loop.
! 
! 2019-01-07  Richard Earnshaw  <rearnsha@arm.com>
! 
! 	PR target/86891
! 	* config/aarch64/aarch64.c (aarch64_expand_subvti): New parameter
! 	unsigned_p.  Handle signed and unsigned overflow correction as
! 	required.
! 	* config/aarch64/aarch64-protos.h (aarch64_expand_subvti): Update
! 	prototype.
! 	* config/aarch64/aarch64.md (addv<mode>4): Use aarch64_plus_operand
! 	for operand 2.
! 	(add<mode>3_compareV_imm): Make this callable for expanding.
! 	(subv<GPI:mode>4): Use register_operand for operand 1.  Use
! 	aarch64_plus_operand for operand 2.
! 	(subv<GPI:mode>_insn): New insn pattern.
! 	(subv<GPI:mode>_imm): Likewise.
! 	(negv<GPI:mode>3): New expand pattern.
! 	(negv<GPI:mode>_insn): New insn pattern.
! 	(negv<GPI:mode>_cmp_only): Likewise.
! 	(cmpv<GPI:mode>_insn): Likewise.
! 	(subvti4): Use register_operand for operand 1.  Update call to
! 	aarch64_expand_subvti.
! 	(usubvti4): Likewise.
! 	(negvti3): New expand pattern.
! 	(negdi_carryout): New insn pattern.
! 	(negvdi_carryinV): New insn pattern.
! 	(sub<mode3>_compare1_imm): Delete named insn pattern, make anonymous
! 	version the named version.
! 	(peepholes to convert to sub<mode3>_compare1_imm): Adjust order of
! 	operands.
! 	(usub<GPI:mode>3_carryinC, usub<GPI:mode>3_carryinC_z1): New insn
! 	patterns.
! 	(usub<GPI:mode>3_carryinC_z2, usub<GPI:mode>3_carryinC): New insn
! 	patterns.
! 	(sub<mode>3_carryinCV, sub<mode>3_carryinCV_z1_z2): Delete.
! 	(sub<mode>3_carryinCV_z1, sub<mode>3_carryinCV_z2): Delete.
! 	(sub<mode>3_carryinCV): Delete.
! 	(sub<GPI:mode>3_carryinV): New expand pattern.
! 	sub<mode>3_carryinV, sub<mode>3_carryinV_z2): New insn patterns.
! 
! 2019-01-07  Richard Biener  <rguenther@suse.de>
! 
! 	* tree-ssa-uncprop.c (ssa_equip_hash_traits): Remove in favor
! 	of tree_operand_hash.
! 
! 2019-01-07  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	PR tree-optimization/88598
! 	* tree.h (single_nonzero_element): Declare.
! 	* tree.c (single_nonzero_element): New function.
! 	* match.pd: Fold certain reductions of X & CST to X[I] & CST[I]
! 	if I is the only nonzero element of CST.
! 
! 2019-01-07  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	PR tree-optimization/88598
! 	* tree.h (initializer_each_zero_or_onep): Declare.
! 	* tree.c (initializer_each_zero_or_onep): New function.
! 	(signed_or_unsigned_type_for): Handle float types too.
! 	(unsigned_type_for, signed_type_for): Update comments accordingly.
! 	* match.pd: Fold x * { 0 or 1, 0 or 1, ...} to
! 	x & { 0 or -1, 0 or -1, ... }.
! 
! 2019-01-07  Jonathan Wakely  <jwakely@redhat.com>
! 
! 	* doc/install.texi: Replace references to x86_64-unknown-linux-gnu
! 	with x86_64-pc-linux-gnu.
! 
! 2019-01-07  Tom de Vries  <tdevries@suse.de>
! 
! 	PR target/85486
! 	* config/nvptx/nvptx.c (has_vector_partitionable_routine_calls_p): New
! 	function.
! 	(nvptx_goacc_validate_dims): Force vl32 if calling vector-partitionable
! 	routines.
! 
! 2019-01-07  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* config/i386/sse.md (vec_extract<mode><ssehalfvecmodelower>): Use
! 	V_256_512 iterator instead of V_512 and TARGET_AVX instead of
! 	TARGET_AVX512F as condition.
! 
! 	PR debug/88723
! 	* dwarf2out.c (const_ok_for_output_1): Remove redundant call to
! 	const_not_ok_for_debug_p target hook.
! 	(mem_loc_descriptor) <case UNSPEC>: Only call const_ok_for_output_1
! 	on UNSPEC and subexpressions thereof if all subexpressions of the
! 	UNSPEC are CONSTANT_P.
! 
! 	PR tree-optimization/88676
! 	* tree-ssa-phiopt.c (two_value_replacement): New function.
! 	(tree_ssa_phiopt_worker): Call it.
  
! 	PR sanitizer/88619
! 	* cfgexpand.c (expand_stack_vars): Only align prev_offset to
! 	ASAN_MIN_RED_ZONE_SIZE, not to maximum of that and alignb.
  
! 	PR c++/85052
! 	* tree-vect-generic.c: Include insn-config.h and recog.h.
! 	(expand_vector_piecewise): Add defaulted ret_type argument,
! 	if non-NULL, use that in preference to type for the result type.
! 	(expand_vector_parallel): Formatting fix.
! 	(do_vec_conversion, do_vec_narrowing_conversion,
! 	expand_vector_conversion): New functions.
! 	(expand_vector_operations_1): Call expand_vector_conversion
! 	for VEC_CONVERT ifn calls.
! 	* internal-fn.def (VEC_CONVERT): New internal function.
! 	* internal-fn.c (expand_VEC_CONVERT): New function.
! 	* fold-const-call.c (fold_const_vec_convert): New function.
! 	(fold_const_call): Use it for CFN_VEC_CONVERT.
! 	* doc/extend.texi (__builtin_convertvector): Document.
  
! 2019-01-07  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx-protos.h (nvptx_output_red_partition): Declare.
! 	* config/nvptx/nvptx.c (vector_red_size, vector_red_align,
! 	vector_red_partition, vector_red_sym): New global variables.
! 	(nvptx_option_override): Initialize vector_red_sym.
! 	(nvptx_declare_function_name): Restore red_partition register.
! 	(nvptx_file_end): Emit code to declare the vector reduction variables.
! 	(nvptx_output_red_partition): New function.
! 	(nvptx_expand_shared_addr): Add vector argument. Use it to handle
! 	large vector reductions.
! 	(enum nvptx_builtins): Add NVPTX_BUILTIN_VECTOR_ADDR.
! 	(nvptx_init_builtins): Add VECTOR_ADDR.
! 	(nvptx_expand_builtin): Update call to nvptx_expand_shared_addr.
! 	Handle nvptx_expand_shared_addr.
! 	(nvptx_get_shared_red_addr): Add vector argument and handle large
! 	vectors.
! 	(nvptx_goacc_reduction_setup): Add offload_attrs argument and handle
! 	large vectors.
! 	(nvptx_goacc_reduction_init): Likewise.
! 	(nvptx_goacc_reduction_fini): Likewise.
! 	(nvptx_goacc_reduction_teardown): Likewise.
! 	(nvptx_goacc_reduction): Update calls to nvptx_goacc_reduction_{setup,
! 	init,fini,teardown}.
! 	(nvptx_init_axis_predicate): Initialize vector_red_partition.
! 	(nvptx_set_current_function): Init vector_red_partition.
! 	* config/nvptx/nvptx.md (UNSPECV_RED_PART): New unspecv.
! 	(nvptx_red_partition): New insn.
! 	* config/nvptx/nvptx.h (struct machine_function): Add red_partition.
  
! 2019-01-07  Tom de Vries  <tdevries@suse.de>
  
! 	PR target/85381
! 	* config/nvptx/nvptx.c (nvptx_process_pars): Don't emit barriers for
! 	empty loops.
  
! 2019-01-07  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (oacc_bcast_partition): Declare.
! 	(nvptx_option_override): Init oacc_bcast_partition.
! 	(nvptx_init_oacc_workers): New function.
! 	(nvptx_declare_function_name): Call nvptx_init_oacc_workers.
! 	(nvptx_needs_shared_bcast): New function.
! 	(nvptx_find_par): Generalize to enable vectors to use shared-memory
! 	to propagate state.
! 	(nvptx_shared_propagate): Initialize vector bcast partition and
! 	synchronization state.
! 	(nvptx_single):  Generalize to enable vectors to use shared-memory
! 	to propagate state.
! 	(nvptx_process_pars): Likewise.
! 	(nvptx_set_current_function): Initialize oacc_broadcast_partition.
! 	* config/nvptx/nvptx.h (struct machine_function): Add
! 	bcast_partition and sync_bar members.
  
! 2019-01-07  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (nvptx_welformed_vector_length_p)
! 	(nvptx_apply_dim_limits): New function.
! 	(nvptx_goacc_validate_dims_1): Allow PTX_MAX_VECTOR_LENGTH larger than
! 	PTX_WARP_SIZE.
  
! 2019-01-07  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Move warnings to
! 	as late as possible.
  
! 2019-01-07  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (PTX_VECTOR_LENGTH): Remove.
! 	(PTX_DEFAULT_VECTOR_LENGTH, PTX_MAX_VECTOR_LENGTH): Define.
! 	(nvptx_goacc_validate_dims_1, nvptx_dim_limit)
! 	(nvptx_goacc_reduction_fini): Use PTX_DEFAULT_VECTOR_LENGTH,
! 	PTX_MAX_VECTOR_LENGTH and PTX_WARP_SIZE instead of PTX_VECTOR_LENGTH.
  
! 2019-01-07  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims): Add asserts.
  
! 2019-01-07  Tom de Vries  <tdevries@suse.de>
  
! 	* omp-offload.c (oacc_get_min_dim): New function.
! 	* omp-offload.h (oacc_get_min_dim): Declare.
  
! 2018-12-26  Mateusz B  <mateuszb@poczta.onet.pl>
  
! 	PR target/88521
! 	* config/i386/i386.c (function_value_ms_64): Return small sturct in
! 	AX_REG and float/double in FIRST_SSE_REG for 4 or 8 byte modes.
  
! 2019-01-05  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR tree-opt/86020
! 	Revert:
! 	2017-05-22  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* ipa-inline.c (edge_badness): Use inlined_time instead of
! 	inline_summaries->get.
  
! 2019-01-05  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* opts.c (enable_fdo_optimizations): Enable
! 	version-loops-for-strides, loop-interchange, unrol-and-jam
! 	and tree-loop-distribution.
! 	* invoke.texi: Document newly enabled options.
  
! 2019-01-05  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* doc/invoke.texi (max-inline-insns-small): New parameters.
! 	* ipa-inline.c (want_early_inline_function_p): simplify.
! 	(want_inline_small_function_p): Fix pasto from previous patch;
! 	use max-inline-insns-small bound.
! 	* params.def (max-inline-insns-small): New param.
! 	* ipa-fnsummary.c (analyze_function_body): Initialize time/size
! 	variables correctly.
  
! 2019-01-05  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* doc/invoke.texi: Document max-inline-insns-size,
! 	uninlined-function-insns, uninlined-function-time,
! 	uninlined-thunk-insns and uninlined-thunk-time.
! 	* params.def: Add max-inline-insns-size,
! 	uninlined-function-insns, uninlined-function-time,
! 	uninlined-thunk-insns and uninlined-thunk-time.
! 	* ipa-fnsummary.c (compute_fn_summary, analyze_function_body): Use
! 	new parameters.
! 	* ipa-inline.c (can_inline_edge_by_limits_p,
! 	want_inline_small_function_p): Use new parameters.
  
! 2019-01-05  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* ipa-fnsummary.c (analyze_function_body): Fix accounting of time.
  
! 2019-01-05  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/82564
! 	PR target/88620
! 	* expr.c (expand_assignment): For calls returning VLA structures
! 	if to_rtx is not a MEM, force it into a stack temporary.
  
! 	PR debug/88635
! 	* dwarf2out.c (const_ok_for_output_1): Reject MINUS that contains
! 	SYMBOL_REF, CODE_LABEL or UNSPEC in subexpressions of second argument.
! 	Reject PLUS that contains SYMBOL_REF, CODE_LABEL or UNSPEC in
! 	subexpressions of both operands.
! 	(mem_loc_descriptor): Handle UNSPEC if target hook acks it and all the
! 	subrtxes are CONSTANT_P.
! 	* config/i386/i386.c (ix86_const_not_ok_for_debug_p): Revert
! 	2018-11-09 changes.
  
! 2019-01-04  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* params.def (hot-bb-count-ws-permille): Set to 990.
  
! 2019-01-04  Martin Sebor  <msebor@redhat.com>
  
! 	PR c/88546
! 	* attribs.c (decls_mismatched_attributes): Avoid warning for attribute
! 	leaf.
  
! 2019-01-04  Martin Sebor  <msebor@redhat.com>
  
! 	PR c/88363
! 	* doc/extend.texi (attribute alloc_align, alloc_size): Update.
  
! 2019-01-04  Jakub Jelinek  <jakub@redhat.com>
  
! 	* gdbinit.in: Turn off pagination for the skip commands, restore
! 	it to previous state afterwards.
  
! 2019-01-04  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/88594
! 	* config/i386/i386.c (ix86_expand_divmod_libfunc): Use mode instead
! 	of GET_MODE (opN) as modes of the libcall arguments.
  
! 2019-01-04  Jan Beulich  <jbeulich@suse.com>
  
! 	* config/i386/sse.md
! 	(<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>,
! 	<avx512>_cmp<mode>3<mask_scalar_merge_name>,
! 	<avx512>_ucmp<mode>3<mask_scalar_merge_name>,
! 	<avx512>_ucmp<mode>3<mask_scalar_merge_name>,
! 	avx512f_vmcmp<mode>3<round_saeonly_name>,
! 	avx512f_vmcmp<mode>3_mask<round_saeonly_name>,
! 	avx512f_maskcmp<mode>3,
! 	<avx512>_cvt<ssemodesuffix>2mask<mode>,
! 	<avx512>_cvt<ssemodesuffix>2mask<mode>,
! 	*<avx512>_cvtmask2<ssemodesuffix><mode>,
! 	*<avx512>_cvtmask2<ssemodesuffix><mode>,
! 	<avx512>_eq<mode>3<mask_scalar_merge_name>_1,
! 	<avx512>_eq<mode>3<mask_scalar_merge_name>_1,
! 	<avx512>_gt<mode>3<mask_scalar_merge_name>,
! 	<avx512>_gt<mode>3<mask_scalar_merge_name>,
! 	<avx512>_testm<mode>3<mask_scalar_merge_name>,
! 	<avx512>_testnm<mode>3<mask_scalar_merge_name>,
! 	*<avx512>_testm<VI1248_AVX512VLBW:mode>3_zext,
! 	*<avx512>_testm<VI1248_AVX512VLBW:mode>3_zext_mask,
! 	*<avx512>_testnm<VI1248_AVX512VLBW:mode>3_zext,
! 	*<avx512>_testnm<VI1248_AVX512VLBW:mode>3_zext_mask,
! 	avx512cd_maskb_vec_dup<mode>,
! 	avx512cd_maskw_vec_dup<mode>,
! 	avx512dq_fpclass<mode><mask_scalar_merge_name>,
! 	avx512dq_vmfpclass<mode>,
! 	avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>): Use =k
! 	instead of =Yk.
  
! 2019-01-03  Martin Sebor  <msebor@redhat.com>
  
! 	PR tree-optimization/88659
! 	* calls.c (maybe_warn_nonstring_arg): Avoid assuming maxlen is set.
  
! 2019-01-03  Aaron Sawdey  <acsawdey@linux.ibm.com>
  
! 	* config/rs6000/rs6000-string.c (expand_block_move): Don't use
! 	unaligned vsx and avoid lxvd2x/stxvd2x.
! 	(gen_lvx_v4si_move): New function.
  
! 2019-01-03  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (MACH_VECTOR_LENGTH, MACH_MAX_WORKERS): Define.
! 	(init_axis_dim, nvptx_mach_max_workers, nvptx_mach_vector_length): New
! 	function.
! 	* config/nvptx/nvptx.h (struct machine_function): Add axis_dims.
  
! 2019-01-03  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (struct offload_attrs): New.
! 	(populate_offload_attrs): New function.  Factor mask extraction out of
! 	nvptx_reorg.  Add extraction of dimensions.
! 	(nvptx_reorg): Use populate_offload_attrs.
  
! 2019-01-03  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Add early-out
! 	cases for oacc_min_dims_p and routine_p.  Add asserts for
! 	oacc_default_dims_p and offload_region_p.
  
! 2019-01-03  Tom de Vries  <tdevries@suse.de>
  
! 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): New function,
! 	factored out of ...
! 	(nvptx_goacc_validate_dims): ... here.
  
! 2019-01-03  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR tree-optimization/85574
! 	* tree-ssa-uncprop.c (struct equiv_hash_elt): Remove unused
! 	structure.
! 	(struct ssa_equip_hash_traits): Declare.
! 	(val_ssa_equiv): Use custom hash traits using operand_equal_p.
  
! 2019-01-03  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR debug/88644
! 	* dwarf2out.c (modified_type_die): If type is equal to sizetype,
! 	change it to qualified_type.
  
! 2019-01-03  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* ipa-utils.c (scale_ipa_profile_for_fn): Break out from ...
! 	(ipa_merge_profiles): ... here; do not ICE on thunks and aliases.
  
! 2019-01-02  Martin Sebor  <msebor@redhat.com>
! 	    Jeff Law  <law@redhat.com>
  
! 	* gimple-fold.c (strlen_range_kind): Remove SRK_LENRANGE_2.
! 	(get_range_strlen_tree): Update appropriately.
! 	(get_range_strlen)
! 	* gimple-fold.h (get_range_strlen): Drop unused last argument.
  
! 	* gimple-fold.c (gimple_fold_builtin_strlen): Use set_strlen_range
! 	rather than set_range_info.
! 	* tree-ssa-strlen.c (set_strlen_range): Extracted from
! 	maybe_set_strlen_range.  Handle potentially boundary crossing
! 	cases more conservatively.
! 	(maybe_set_strlen_range): Parts refactored into set_strlen_range.
! 	Call set_strlen_range.
! 	* tree-ssa-strlen.h (set_strlen_range): Add prototype.
  
! 	PR middle-end/88663
! 	* gimple-fold.c (get_range_strlen): Update prototype to no longer
! 	need the flexp argument.
! 	(get_range_strlen_tree): Drop flexp argument.  Drop flexp argument
! 	from calls to get_range_strlen.  Update comments.  Just update
! 	VAL for an unterminated const char array and let the reset of the
! 	code handle it normally.  No longer try to set *flexp.  Adjust
! 	return value.
! 	(get_range_strlen): Update for the new get_range_strlen API.
! 	(get_maxval_strlen): Similarly.
! 	(gimple_fold_builtin_strlen): Handle update meaning of return value
! 	from get_range_strlen.
! 	* gimple-ssa-sprintf.c (get_string_length): Update for the new
! 	get_range_strlen API.
  
! 2019-01-02  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR lto/88130
! 	* varpool.c (varpool_node::ctor_useable_for_folding_p): Also return
! 	false at WPA time when body was removed.
  
! 2019-01-02  Martin Liska  <mliska@suse.cz>
  
! 	PR tree-optimization/88650
! 	* predict.c (set_even_probabilities): Calculate probability
! 	remainer only when really used.
  
! 2019-01-02  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/88651
! 	* tree-data-ref.c (analyze_subscript_affine_affine): Use
! 	widest_ints when mangling max_stmt_execution results.
  
! 2019-01-02  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/88621
! 	* tree-ssa-loop-im.c (gather_mem_refs_stmt): Fix pastos, avoid
! 	bitfields when canoncalizing.
  
! 2019-01-02  Richard Biener  <rguenther@suse.de>
  
! 	PR target/87545
! 	* config/i386/x86-tune-costs.h (intel_cost): Adjust
! 	cost of cheap SSE instruction.
  
! 2019-01-02  Richard Biener  <rguenther@suse.de>
  
! 	PR ipa/85574
! 	* ipa-icf.h (sem_item_optimizer::sort_congruence_split): Declare.
! 	* ipa-icf.c (sem_item_optimizer::sort_congruence_split): New
! 	function.
! 	(sem_item_optimizer::do_congruence_step_f): Sort the congruence
! 	set after UIDs before splitting them.
  
! 2019-01-01  Martin Sebor  <msebor@redhat.com>
! 	    Jeff Law  <law@redhat.com>
  
! 	* gimple-fold.c (get_range_strlen_tree): Record if the computed
! 	length is optimistic.  If it is, then arrange to compute the
! 	conservative length as well.
  
! 	* gimple-fold.h (get_range_strlen): Update prototype.
! 	* builtins.c (check_access): Update call to get_range_strlen to use
! 	c_strlen_data pointer.   Change various variable accesses to instead
! 	pull data from the c_strlen_data structure.
! 	(check_strncat_sizes, expand_builtin_strncat): Likewise.
! 	* calls.c (maybe_warn_nonstring_arg): Likewise.
! 	* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.  Reset
! 	minimum length if maximum lengh is unknown.
! 	* gimple-ssa-sprintf.c (get_string_length): Likewise.  Drop code
! 	that used c_strlen, it's no longer needed.  Restructure slightly.
! 	(format_string): Set unlikely range appropriately.
! 	* gimple-fold.c (get_range_strlen): Update comments.  Fix minor
! 	formatting issues.
! 	(get_range_strlen):  Accept c_strlen_data pointer for external
! 	call sites as well.  Pass through to call to internal get_range_strlen.
! 	Adjust minlen, maxlen and maxbound as needed.
! 	(get_maxval_strlen): Update comments.
! 	(gimple_fold_builtin_strlen):  Update call to get_range_strlen
! 	to use c_strlen_data pointer.  Change variable accesses to instead
! 	use c_strlen_data data members.
  
! 	* gimple-fold.c (get_range_strlen): Update prototype.
! 	(get_range_strlen_tree): Update prototype.  Drop minlen/maxlen
! 	local variables.  Use pdata to return information to caller.
! 	Update calls to get_range_strlen.  Update pdata->maxbound.
! 	(get_range_strlen -- static version): Similarly.
! 	(get_range_strlen -- extern version): Update for internal
! 	get_range_strlen API change.  Convert to external data format.
! 	(get_maxval_strlen): Similarly.
  
! 2019-01-01  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* coverage.c (get_coverage_counts): Use current_function_decl.
! 	* profile.c (read_thunk_profile): New function.
! 	(branch_prob): Add THUNK parameter.
! 	* tree-profile.c (tree_profiling): Handle thunks.
! 	* value-prof.c (init_node_map): Handle thunks.
! 	* value-prof.h (branch_prob): Upate prototype.
! 	(read_thunk_profile): Declare.
  
! 2019-01-01  Jakub Jelinek  <jakub@redhat.com>
  
  	Update copyright years.
  
--- 1,15839 ----
! 2020-05-07  Release Manager
  
! 	* GCC 10.1.0 released.
  
! 2020-05-06  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
  
! 	* doc/install.texi: Replace Sun with Solaris as appropriate.
! 	(Tools/packages necessary for building GCC, Perl version between
! 	5.6.1 and 5.6.24): Remove Solaris 8 reference.
! 	(Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
! 	TGCware reference.
! 	(Specific, i?86-*-solaris2*): Update version references for
! 	Solaris 11.3 and later.  Remove gas 2.26 caveat.
! 	(Specific, *-*-solaris2*): Update version references for
! 	Solaris 11.3 and later.  Remove boehm-gc reference.
! 	Document GMP, MPFR caveats on Solaris 11.3.
! 	(Specific, sparc-sun-solaris2*): Update Solaris 9 references.
! 	(Specific, sparc64-*-solaris2*): Likewise.
! 	Document --build requirement.
  
! 2020-05-05  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
  
! 	* configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
  	* configure: Regenerate.
  
! 2020-05-04  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR middle-end/94941
! 	* internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
! 	chosen lhs is different from the gcall lhs.
! 	(expand_mask_load_optab_fn): Likewise.
! 	(expand_gather_load_optab_fn): Likewise.
  
! 2020-05-04  Marek Polacek  <polacek@redhat.com>
  
! 	Revert:
! 	2020-04-30  Marek Polacek  <polacek@redhat.com>
  
! 	PR c++/94775
! 	* tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
! 	(check_aligned_type): Check if TYPE_USER_ALIGN match.
  
! 2020-05-02  Jakub Jelinek  <jakub@redhat.com>
  
! 	* config/tilegx/tilegx.md
! 	(insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
! 	rather than just <n>.
  
! 2020-04-30  Alexandre Oliva <oliva@adacore.com>
  
! 	* doc/sourcebuild.texi (Effective-Target Keywords): Document
! 	the newly-introduced fileio effective target.
  
! 2020-04-30  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/94740
! 	* cse.c (cse_process_notes_1): Replace with...
! 	(cse_process_note_1): ...this new function, acting as a
! 	simplify_replace_fn_rtx callback to process_note.  Handle only
! 	REGs and MEMs directly.  Validate the MEM if cse_process_note
! 	changes its address.
! 	(cse_process_notes): Replace with...
! 	(cse_process_note): ...this new function.
! 	(cse_extended_basic_block): Update accordingly, iterating over
! 	the register notes and passing individual notes to cse_process_note.
  
! 2020-04-30  Martin Jambor  <mjambor@suse.cz>
  
! 	PR ipa/94856
! 	* cgraph.c (clone_of_p): Also consider thunks whih had their bodies
! 	saved by the inliner and thunks which had their call inlined.
! 	* ipa-inline-transform.c (save_inline_function_body): Fill in
! 	former_clone_of of new body holders.
  
! 2020-04-30  Jakub Jelinek  <jakub@redhat.com>
  
! 	* DEV-PHASE: Set to prerelease.
  
! 2020-04-30  Jonathan Wakely  <jwakely@redhat.com>
  
! 	* pretty-print.c (pp_take_prefix): Fix spelling in comment.
  
! 2020-04-30  Marek Polacek  <polacek@redhat.com>
  
! 	PR c++/94775
! 	* tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
! 	(check_aligned_type): Check if TYPE_USER_ALIGN match.
  
! 2020-04-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
! 	* config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
! 	* config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
! 	* doc/invoke.texi (moutline-atomics): Document as on by default.
  
! 2020-04-30  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  
! 	PR target/94748
! 	* config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
! 	the check for NOTE_INSN_DELETED_LABEL.
  
! 2020-04-30  Jakub Jelinek  <jakub@redhat.com>
  
! 	* configure.ac (--with-documentation-root-url,
! 	--with-changes-root-url): Diagnose URL not ending with /,
! 	use AC_DEFINE_UNQUOTED instead of AC_SUBST.
! 	* opts.h (get_changes_url): Remove.
! 	* opts.c (get_changes_url): Remove.
! 	* Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
! 	or -DCHANGES_ROOT_URL.
! 	* doc/install.texi (--with-documentation-root-url,
! 	--with-changes-root-url): Document.
! 	* config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
! 	get_changes_url and free, change url variable type to const char * and
! 	set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
! 	* config/s390/s390.c (s390_function_arg_vector,
! 	s390_function_arg_float): Likewise.
! 	* config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
! 	Likewise.
! 	* config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
! 	Likewise.
! 	* config.in: Regenerate.
! 	* configure: Regenerate.
  
! 2020-04-30  Christophe Lyon  <christophe.lyon@linaro.org>
  
! 	PR target/57002
! 	* config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
  
! 2020-04-30  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/constraints.md ("j>f", "jb4"): New constraints.
! 	* config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
! 	macro definitions.
! 	* config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
! 	separate expander.
! 	("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
! 	Change constraint for vlrl/vstrl to jb4.
  
! 2020-04-30  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
  
! 	* var-tracking.c (vt_initialize): Move variables pre and post
! 	into inner block and initialize both in order to fix warning
! 	about uninitialized use.  Remove unnecessary checks for
! 	frame_pointer_needed.
  
! 2020-04-30  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
  
! 	* toplev.c (output_stack_usage_1): Ensure that first
! 	argument to fprintf is not null.
  
! 2020-04-29  Jakub Jelinek  <jakub@redhat.com>
  
! 	* configure.ac (-with-changes-root-url): New configure option,
! 	defaulting to https://gcc.gnu.org/.
! 	* Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
! 	opts.c.
! 	* pretty-print.c (get_end_url_string): New function.
! 	(pp_format): Handle %{ and %} for URLs.
! 	(pp_begin_url): Use pp_string instead of pp_printf.
! 	(pp_end_url): Use get_end_url_string.
! 	* opts.h (get_changes_url): Declare.
! 	* opts.c (get_changes_url): New function.
! 	* config/rs6000/rs6000-call.c: Include opts.h.
! 	(rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
! 	of just in GCC 10.1 in diagnostics and add URL.
! 	* config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
! 	* config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
! 	Likewise.
! 	* config/s390/s390.c (s390_function_arg_vector,
! 	s390_function_arg_float): Likewise.
! 	* configure: Regenerated.
  
! 	PR target/94704
! 	* config/s390/s390.c (s390_function_arg_vector,
! 	s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
! 	cxx17_empty_base_field_p.  In -Wpsabi diagnostics use the type
! 	passed to the function rather than the type of the single element.
! 	Rename cxx17_empty_base_seen variable to empty_base_seen, change
! 	type to int, and adjust diagnostics depending on if the field
! 	has [[no_unique_attribute]] or not.
  
! 	PR target/94832
! 	* config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
! 	_mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
! 	used in casts into parens.
! 	* config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
! 	_mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
! 	_mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
! 	_mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
! 	_mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
! 	_mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
! 	_mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
! 	* config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
! 	_mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
! 	_mm256_mask_cmp_epu8_mask): Likewise.
! 	* config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
! 	_mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
! 	* config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
! 	* config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
  
! 	PR target/94832
! 	* config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
! 	_mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
! 	_mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
! 	_mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
! 	_mm256_mask_i64gather_ps, _mm_i32gather_epi64,
! 	_mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
! 	_mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
! 	_mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
! 	_mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
! 	_mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
! 	_mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
! 	_mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
! 	_mm256_mask_i64gather_epi32): Surround macro parameter uses with
! 	parens.
! 	(_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
! 	_mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
! 	_mm_i64gather_ps, _mm256_i64gather_ps): Likewise.  Don't use
! 	as mask vector containing -1.0 or -1.0f elts, but instead vector
! 	with all bits set using _mm*_cmpeq_p? with zero operands.
! 	* config/i386/avx512fintrin.h (_mm512_i32gather_ps,
! 	_mm512_mask_i32gather_ps, _mm512_i32gather_pd,
! 	_mm512_mask_i32gather_pd, _mm512_i64gather_ps,
! 	_mm512_mask_i64gather_ps, _mm512_i64gather_pd,
! 	_mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
! 	_mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
! 	_mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
! 	_mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
! 	_mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
! 	_mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
! 	_mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
! 	_mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
! 	_mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
! 	_mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
! 	_mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
! 	_mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
! 	_mm512_mask_i64scatter_epi64): Surround macro parameter uses with
! 	parens.
! 	* config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
! 	_mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
! 	_mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
! 	_mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
! 	_mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
! 	_mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
! 	_mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
! 	_mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
! 	_mm512_mask_prefetch_i64scatter_ps): Likewise.
! 	* config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
! 	_mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
! 	_mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
! 	_mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
! 	_mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
! 	_mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
! 	_mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
! 	_mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
! 	_mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
! 	_mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
! 	_mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
! 	_mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
! 	_mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
! 	_mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
! 	_mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
! 	_mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
! 	_mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
! 	_mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
! 	_mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
! 	_mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
! 	_mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
! 	_mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
! 	_mm_mask_i64scatter_epi64): Likewise.
  
! 2020-04-29  Jeff Law  <law@redhat.com>
  
! 	* config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
! 	division instructions are 4 bytes long.
  
! 2020-04-29  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94826
! 	* config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
! 	TARGET_EXPR instead of MODIFY_EXPR for first assignment to
! 	fenv_var, fenv_clear and old_fenv variables.  For fenv_addr
! 	take address of TARGET_EXPR of fenv_var with void_node initializer.
! 	Formatting fixes.
  
! 2020-04-29  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
  
! 	PR tree-optimization/94774
! 	* gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
! 	variable retval.
  
! 2020-04-29  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
! 	* calls.c (cxx17_empty_base_field_p): New function.  Check
! 	DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
! 	previous checks.
  
! 2020-04-29  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/93654
! 	* config/i386/i386-options.c (ix86_set_indirect_branch_type):
! 	Allow -fcf-protection with -mindirect-branch=thunk-extern and
! 	-mfunction-return=thunk-extern.
! 	* doc/invoke.texi: Update notes for -fcf-protection=branch with
! 	-mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
  
! 2020-04-29  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
  
! 2020-04-29  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
! 	TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
! 	fenv_var and new_fenv_var.
  
! 2020-04-29  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
! 	effective-target keyword.
! 	(arm_arch_v8a_hard_multilib): Likewise.
! 	(arm_arch_v8a_hard): Document new dg-add-options keyword.
! 	* config/arm/arm.c (arm_return_in_memory): Note that the APCS
! 	code is deprecated and has not been updated to handle
! 	DECL_FIELD_ABI_IGNORED.
! 	(WARN_PSABI_EMPTY_CXX17_BASE): New constant.
! 	(WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
! 	(aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
! 	avoid_cxx17_empty_base with a pointer to a bitmask.  Ignore fields
! 	whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
! 	something actually is a HFA or HVA.  Record whether we see a
! 	[[no_unique_address]] field that previous GCCs would not have
! 	ignored in this way.
! 	(aapcs_vfp_is_call_or_return_candidate): Update the calls to
! 	aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
! 	[[no_unique_address]] case.  Use TYPE_MAIN_VARIANT in the
! 	diagnostic messages.
! 	(arm_needs_doubleword_align): Add a comment explaining why we
! 	consider even zero-sized fields.
  
! 2020-04-29  Richard Biener  <rguenther@suse.de>
! 	    Li Zekun  <lizekun1@huawei.com>
  
! 	PR lto/94822
! 	* tree.c (component_ref_size): Guard against error_mark_node
! 	DECL_INITIAL as it happens with LTO.
  
! 2020-04-29  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
! 	comment explaining why we consider even zero-sized fields.
! 	(WARN_PSABI_EMPTY_CXX17_BASE): New constant.
! 	(WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
! 	(aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
! 	avoid_cxx17_empty_base with a pointer to a bitmask.  Ignore fields
! 	whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
! 	something actually is a HFA or HVA.  Record whether we see a
! 	[[no_unique_address]] field that previous GCCs would not have
! 	ignored in this way.
! 	(aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
! 	whether diagnostics should be suppressed.  Update the calls to
! 	aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
! 	[[no_unique_address]] case.
! 	(aarch64_return_in_msb): Update call accordingly, never silencing
! 	diagnostics.
! 	(aarch64_function_value): Likewise.
! 	(aarch64_return_in_memory_1): Likewise.
! 	(aarch64_init_cumulative_args): Likewise.
! 	(aarch64_gimplify_va_arg_expr): Likewise.
! 	(aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
! 	use it to decide whether arch64_vfp_is_call_or_return_candidate
! 	should be silent.
! 	(aarch64_pass_by_reference): Update calls accordingly.
! 	(aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
! 	to decide whether arch64_vfp_is_call_or_return_candidate should be
! 	silent.
  
! 2020-04-29  Haijian Zhang  <z.zhanghaijian@huawei.com>
  
! 	PR target/94820
! 	* config/aarch64/aarch64-builtins.c
! 	(aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
! 	MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
! 	new_fenv_var.
  
! 2020-04-29  Thomas Schwinge  <thomas@codesourcery.com>
  
! 	* configure.ac <$enable_offload_targets>: Do parsing as done
! 	elsewhere.
! 	* configure: Regenerate.
  
! 	* configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
! 	* configure: Regenerate.
  
! 	PR target/94279
! 	* rtlanal.c (set_noop_p): Handle non-constant selectors.
  
! 	PR target/94282
! 	* common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
! 	function.
! 	(TARGET_EXCEPT_UNWIND_INFO): Define.
  
! 2020-04-29  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94248
! 	* config/gcn/gcn.md (*mov<mode>_insn): Use
! 	'reg_overlap_mentioned_p' to check for overlap.
  
! 	PR target/94706
! 	* config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
! 	instead of cxx17_empty_base_field_p.
  
! 	PR target/94707
! 	* tree-core.h (tree_decl_common): Note decl_flag_0 used for
! 	DECL_FIELD_ABI_IGNORED.
! 	* tree.h (DECL_FIELD_ABI_IGNORED): Define.
! 	* calls.h (cxx17_empty_base_field_p): Change into a temporary
! 	macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
! 	attribute.
! 	* calls.c (cxx17_empty_base_field_p): Remove.
! 	* tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
! 	DECL_FIELD_ABI_IGNORED.
! 	* tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
! 	* lto-streamer-out.c (hash_tree): Likewise.
! 	* config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
! 	cxx17_empty_base_seen to empty_base_seen, change type to int *,
! 	adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
! 	cxx17_empty_base_field_p, if "no_unique_address" attribute is
! 	present, propagate that to the caller too.
! 	(rs6000_discover_homogeneous_aggregate): Adjust
! 	rs6000_aggregate_candidate caller, emit different diagnostics
! 	when c++17 empty base fields are present and when empty
! 	[[no_unique_address]] fields are present.
! 	* config/rs6000/rs6000.c (rs6000_special_round_type_align,
! 	darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
! 	fields.
  
! 2020-04-29  Richard Biener  <rguenther@suse.de>
  
! 	* tree-ssa-loop-im.c (ref_always_accessed::operator ()):
! 	Just check whether the stmt stores.
  
! 2020-04-28  Alexandre Oliva <oliva@adacore.com>
  
! 	PR target/94812
! 	* gcc/config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
! 	output operand in emulation.  Don't overwrite pseudos.
  
! 2020-04-28  Jeff Law  <law@redhat.com>
  
! 	* config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
! 	multiply patterns are 4 bytes long.
  
! 2020-04-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
! 	* config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
! 	* doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
  
! 2020-04-28  Matthew Malcomson  <matthew.malcomson@arm.com>
! 	    Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94711
! 	* config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
! 	base class artificial fields.
! 	(aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
! 	decision is different after this fix.
  
! 2020-04-28  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR analyzer/94447
! 	PR analyzer/94639
! 	PR analyzer/94732
! 	PR analyzer/94754
! 	* doc/invoke.texi (Static Analyzer Options): Remove
! 	-Wanalyzer-use-of-uninitialized-value.
! 	(-Wno-analyzer-use-of-uninitialized-value): Remove item.
  
! 2020-04-28  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/94809
! 	* tree.c (build_call_expr_internal_loc_array): Call
! 	process_call_operands.
  
! 2020-04-27  Anton Youdkevitch  <anton.youdkevitch@bell-sw.com>
  
! 	* config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
! 	* config/aarch64/aarch64-tune.md: Regenerate.
! 	* config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
! 	(thunderx3t110_regmove_cost): Likewise.
! 	(thunderx3t110_vector_cost): Likewise.
! 	(thunderx3t110_prefetch_tune): Likewise.
! 	(thunderx3t110_tunings): Likewise.
! 	* config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
! 	Define.
! 	* config/aarch64/thunderx3t110.md: New file.
! 	* config/aarch64/aarch64.md: Include thunderx3t110.md.
! 	* doc/invoke.texi (AArch64 options): Add thunderx3t110.
  
! 2020-04-28  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94704
! 	* config/s390/s390.c (s390_function_arg_vector,
! 	s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
  
! 2020-04-28  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/94727
! 	* tree-vect-stmts.c (vect_is_simple_cond): If both comparison
! 	operands are invariant booleans, use the mask type associated with the
! 	STMT_VINFO_VECTYPE.  Use !slp_node instead of !vectype to exclude SLP.
! 	(vectorizable_condition): Pass vectype unconditionally to
! 	vect_is_simple_cond.
  
! 2020-04-27  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94780
! 	* config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
! 	TARGET_EXPR instead of MODIFY_EXPR for first assignment to
! 	sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
  
! 2020-04-27  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR 92830
! 	* configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
! 	default value, so that it can by supplied by get_option_html_page.
! 	* configure: Regenerate.
! 	* opts.c: Include "selftest.h".
! 	(get_option_html_page): New function.
! 	(get_option_url): Use it.  Reformat to place comments next to the
! 	expressions they refer to.
! 	(selftest::test_get_option_html_page): New.
! 	(selftest::opts_c_tests): New.
! 	* selftest-run-tests.c (selftest::run_tests): Call
! 	selftest::opts_c_tests.
! 	* selftest.h (selftest::opts_c_tests): New decl.
  
! 2020-04-27  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
! 	UINTVAL to CONST_INTs.
  
! 2020-04-27  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/constraints.md (e): Remove constraint.
! 	(Te): Define constraint.
! 	* config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
! 	operand 0 from "e" to "Te".
! 	(vaddvaq_<supf><mode>): Likewise.
! 	(vaddvq_p_<supf><mode>): Likewise.
! 	(vmladavq_<supf><mode>): Likewise.
! 	(vmladavxq_s<mode>): Likewise.
! 	(vmlsdavq_s<mode>): Likewise.
! 	(vmlsdavxq_s<mode>): Likewise.
! 	(vaddvaq_p_<supf><mode>): Likewise.
! 	(vmladavaq_<supf><mode>): Likewise.
! 	(vmladavq_p_<supf><mode>): Likewise.
! 	(vmladavxq_p_s<mode>): Likewise.
! 	(vmlsdavq_p_s<mode>): Likewise.
! 	(vmlsdavxq_p_s<mode>): Likewise.
! 	(vmlsdavaxq_s<mode>): Likewise.
! 	(vmlsdavaq_s<mode>): Likewise.
! 	(vmladavaxq_s<mode>): Likewise.
! 	(vmladavaq_p_<supf><mode>): Likewise.
! 	(vmladavaxq_p_s<mode>): Likewise.
! 	(vmlsdavaq_p_s<mode>): Likewise.
! 	(vmlsdavaxq_p_s<mode>): Likewise.
  
! 2020-04-27  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm.c (output_move_neon): Only get the first operand if
! 	addr is PLUS.
  
! 2020-04-27  Felix Yang  <felix.yang@huawei.com>
  
! 	PR tree-optimization/94784
! 	* tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
! 	assert around so that it checks that the two vectors have equal
! 	TYPE_VECTOR_SUBPARTS and that converting the corresponding element
! 	types is a useless_type_conversion_p.
  
! 2020-04-27  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  
! 	PR target/94515
! 	* dwarf2cfi.c (struct GTY): Add ra_mangled.
! 	(cfi_row_equal_p): Check ra_mangled.
! 	(dwarf2out_frame_debug_cfa_window_save): Remove the argument,
! 	this only handles the sparc logic now.
! 	(dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
! 	the aarch64 specific logic.
! 	(dwarf2out_frame_debug): Update to use the new subroutines.
! 	(change_cfi_row): Check ra_mangled.
  
! 2020-04-27  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94704
! 	* config/s390/s390.c (s390_function_arg_vector,
! 	s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
  
! 2020-04-27  Jiufu Guo   <guojiufu@cn.ibm.com>
  
! 	* common/config/rs6000/rs6000-common.c
! 	(rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
! 	-fweb.
! 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
! 	set flag_web.
  
! 2020-04-27  Martin Liska  <mliska@suse.cz>
  
! 	PR lto/94659
! 	* cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
! 	Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
  
! 2020-04-27  Xiong Hu Luo  <luoxhu@linux.ibm.com>
  
! 	PR target/91518
! 	* config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
! 	New variable.
! 	(rs6000_emit_prologue_components):
! 	Check with frame_pointer_needed_indeed.
! 	(rs6000_emit_epilogue_components): Likewise.
! 	(rs6000_emit_prologue): Likewise.
! 	(rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
  
! 2020-04-25  David Edelsohn  <dje.gcc@gmail.com>
  
! 	* config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
! 	stack frame when debugging and flag_compare_debug is enabled.
  
! 2020-04-25  Michael Meissner  <meissner@linux.ibm.com>
  
! 	* config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
! 	enable PC-relative addressing for -mcpu=future.
! 	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
! 	after OTHER_FUTURE_MASKS.  Use OTHER_FUTURE_MASKS.
! 	* config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
! 	suppress PC-relative addressing.
! 	(rs6000_option_override_internal): Split up error messages
! 	checking for -mprefixed and -mpcrel.  Enable -mpcrel if the target
! 	system supports it.
  
! 2020-04-25  Jakub Jelinek  <jakub@redhat.com>
! 	    Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/94734
! 	PR tree-optimization/89430
! 	* tree-ssa-phiopt.c: Include tree-eh.h.
! 	(cond_store_replacement): Return false if an automatic variable
! 	access could trap.  If -fstore-data-races, don't return false
! 	just because an automatic variable is addressable.
  
! 2020-04-24  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
! 	of high-part.
! 	(add<mode>_sext_dup2_exec): Likewise.
  
! 2020-04-24  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	PR target/94710
! 	* config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
! 	endian byteshift_val calculation.
  
! 2020-04-24  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
  
! 2020-04-24  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/arm_sve.h: Add a comment.
  
! 2020-04-24  Haijian Zhang <z.zhanghaijian@huawei.com>
  
! 	PR rtl-optimization/94708
! 	* combine.c (simplify_if_then_else): Add check for
! 	!HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
  
! 2020-04-23  Martin Sebor  <msebor@redhat.com>
  
! 	PR driver/90983
! 	* common.opt (-Wno-frame-larger-than): New option.
! 	(-Wno-larger-than, -Wno-stack-usage): Same.
  
! 2020-04-23  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
! 	2 and 3.
! 	(mov<mode>_exec): Likewise.
! 	(trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
! 	(<convop><mode><vndi>2_exec): Likewise.
  
! 2019-04-23  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR tree-optimization/94717
! 	* gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
! 	of the stores doesn't have the same landing pad number as the first.
! 	(coalesce_immediate_stores): Do not try to coalesce the store using
! 	bswap if it doesn't have the same landing pad number as the first.
  
! 2020-04-23  Bill Schmidt  <wschmidt@linux.ibm.com>
  
! 	* gcc/doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
! 	Replace outdated link to ELFv2 ABI.
  
! 2020-04-23  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94710
! 	* optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
! 	just return v2.
  
! 	PR middle-end/94724
! 	* tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
! 	temporarily with non-final second operand and updating it later,
! 	push COMPOUND_EXPRs into a vector and process it in reverse,
! 	creating COMPOUND_EXPRs with the final operands.
  
! 2020-04-23  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  
! 	PR target/94697
! 	* config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
! 	bti c and bti j handling.
  
! 2020-04-23  Andrew Stubbs  <ams@codesourcery.com>
! 	    Thomas Schwinge  <thomas@codesourcery.com>
  
! 	PR middle-end/93488
  
! 	* omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
! 	t_async and the wait arguments.
  
! 2020-04-23  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/94727
! 	* tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
! 	comparing invariant scalar booleans.
  
! 2020-04-23  Matthew Malcomson  <matthew.malcomson@arm.com>
! 	    Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94383
! 	* config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
! 	empty base class artificial fields.
! 	(aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
! 	different after this fix.
  
! 2020-04-23  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94707
! 	* config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
! 	Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
! 	if the same type has been diagnosed most recently already.
  
! 2020-04-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
! 	datatype.
! 	(__arm_vbicq_n_s16): Likewise.
! 	(__arm_vbicq_n_u32): Likewise.
! 	(__arm_vbicq_n_s32): Likewise.
! 	(__arm_vbicq): Likewise.
! 	(__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
! 	(__arm_vbicq_n_s32): Likewise.
! 	(__arm_vbicq_n_u16): Likewise.
! 	(__arm_vbicq_n_u32): Likewise.
! 	(__arm_vdupq_m_n_s8): Likewise.
! 	(__arm_vdupq_m_n_s16): Likewise.
! 	(__arm_vdupq_m_n_s32): Likewise.
! 	(__arm_vdupq_m_n_u8): Likewise.
! 	(__arm_vdupq_m_n_u16): Likewise.
! 	(__arm_vdupq_m_n_u32): Likewise.
! 	(__arm_vdupq_m_n_f16): Likewise.
! 	(__arm_vdupq_m_n_f32): Likewise.
! 	(__arm_vldrhq_gather_offset_s16): Likewise.
! 	(__arm_vldrhq_gather_offset_s32): Likewise.
! 	(__arm_vldrhq_gather_offset_u16): Likewise.
! 	(__arm_vldrhq_gather_offset_u32): Likewise.
! 	(__arm_vldrhq_gather_offset_f16): Likewise.
! 	(__arm_vldrhq_gather_offset_z_s16): Likewise.
! 	(__arm_vldrhq_gather_offset_z_s32): Likewise.
! 	(__arm_vldrhq_gather_offset_z_u16): Likewise.
! 	(__arm_vldrhq_gather_offset_z_u32): Likewise.
! 	(__arm_vldrhq_gather_offset_z_f16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_s16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_s32): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_u16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_u32): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_f16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
! 	(__arm_vldrwq_gather_offset_s32): Likewise.
! 	(__arm_vldrwq_gather_offset_u32): Likewise.
! 	(__arm_vldrwq_gather_offset_f32): Likewise.
! 	(__arm_vldrwq_gather_offset_z_s32): Likewise.
! 	(__arm_vldrwq_gather_offset_z_u32): Likewise.
! 	(__arm_vldrwq_gather_offset_z_f32): Likewise.
! 	(__arm_vldrwq_gather_shifted_offset_s32): Likewise.
! 	(__arm_vldrwq_gather_shifted_offset_u32): Likewise.
! 	(__arm_vldrwq_gather_shifted_offset_f32): Likewise.
! 	(__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
! 	(__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
! 	(__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
! 	(__arm_vdwdupq_x_n_u8): Likewise.
! 	(__arm_vdwdupq_x_n_u16): Likewise.
! 	(__arm_vdwdupq_x_n_u32): Likewise.
! 	(__arm_viwdupq_x_n_u8): Likewise.
! 	(__arm_viwdupq_x_n_u16): Likewise.
! 	(__arm_viwdupq_x_n_u32): Likewise.
! 	(__arm_vidupq_x_n_u8): Likewise.
! 	(__arm_vddupq_x_n_u8): Likewise.
! 	(__arm_vidupq_x_n_u16): Likewise.
! 	(__arm_vddupq_x_n_u16): Likewise.
! 	(__arm_vidupq_x_n_u32): Likewise.
! 	(__arm_vddupq_x_n_u32): Likewise.
! 	(__arm_vldrdq_gather_offset_s64): Likewise.
! 	(__arm_vldrdq_gather_offset_u64): Likewise.
! 	(__arm_vldrdq_gather_offset_z_s64): Likewise.
! 	(__arm_vldrdq_gather_offset_z_u64): Likewise.
! 	(__arm_vldrdq_gather_shifted_offset_s64): Likewise.
! 	(__arm_vldrdq_gather_shifted_offset_u64): Likewise.
! 	(__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
! 	(__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
! 	(__arm_vidupq_m_n_u8): Likewise.
! 	(__arm_vidupq_m_n_u16): Likewise.
! 	(__arm_vidupq_m_n_u32): Likewise.
! 	(__arm_vddupq_m_n_u8): Likewise.
! 	(__arm_vddupq_m_n_u16): Likewise.
! 	(__arm_vddupq_m_n_u32): Likewise.
! 	(__arm_vidupq_n_u16): Likewise.
! 	(__arm_vidupq_n_u32): Likewise.
! 	(__arm_vidupq_n_u8): Likewise.
! 	(__arm_vddupq_n_u16): Likewise.
! 	(__arm_vddupq_n_u32): Likewise.
! 	(__arm_vddupq_n_u8): Likewise.
  
! 2020-04-23  Iain Buclaw  <ibuclaw@gdcproject.org>
  
! 	* doc/install.texi (D-Specific Options): Document
! 	--enable-libphobos-checking and --with-libphobos-druntime-only.
  
! 2020-04-23  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94707
! 	* config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
! 	cxx17_empty_base_seen argument.  Pass it to recursive calls.
! 	Ignore cxx17_empty_base_field_p fields after setting
! 	*cxx17_empty_base_seen to true.
! 	(rs6000_discover_homogeneous_aggregate): Adjust
! 	rs6000_aggregate_candidate caller.  With -Wpsabi, diagnose homogeneous
! 	aggregates with C++17 empty base fields.
  
! 	PR c/94705
! 	* attribs.c (decl_attribute): Don't diagnose attribute exclusions
! 	if last_decl is error_mark_node or has such a TREE_TYPE.
  
! 	PR c/94705
! 	* attribs.c (decl_attribute): Don't diagnose attribute exclusions
! 	if last_decl is error_mark_node or has such a TREE_TYPE.
  
! 2020-04-22  Felix Yang  <felix.yang@huawei.com>
  
! 	PR target/94678
! 	* config/aarch64/aarch64.h (TARGET_SVE):
! 	Add && !TARGET_GENERAL_REGS_ONLY.
! 	(TARGET_SVE2): Add && TARGET_SVE.
! 	(TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
! 	TARGET_SVE2_SM4): Add && TARGET_SVE2.
! 	* config/aarch64/aarch64-sve-builtins.h
! 	(sve_switcher::m_old_general_regs_only): New member.
! 	* config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
! 	New function.
! 	(reported_missing_registers_p): New variable.
! 	(check_required_extensions): Call check_required_registers before
! 	return if all required extenstions are present.
! 	(sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
! 	m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
! 	global_options.x_target_flags.
! 	(sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
! 	global_options.x_target_flags if m_old_general_regs_only is true.
  
! 2020-04-22  Zackery Spytz  <zspytz@gmail.com>
  
! 	* doc/extend.exi: Add "free" to list of other builtin functions
! 	supported by GCC.
  
! 2020-04-20  Aaron Sawdey  <acsawdey@linux.ibm.com>
  
! 	PR target/94622
! 	* config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
! 	if TARGET_PREFIXED.
! 	(store_quadpti): Ditto.
! 	(atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
! 	plq will be used and doesn't need it.
! 	(atomic_store<mode>): Ditto, for pstq.
  
! 2020-04-22  Erick Ochoa  <erick.ochoa@theobroma-systems.com>
  
! 	* doc/invoke.texi: Update flags turned on by -O3.
  
! 2020-04-22  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94706
! 	* config/ia64/ia64.c (hfa_element_mode): Ignore
! 	cxx17_empty_base_field_p fields.
  
! 	PR target/94383
! 	* calls.h (cxx17_empty_base_field_p): Declare.
! 	* calls.c (cxx17_empty_base_field_p): Define.
  
! 2020-04-22  Christophe Lyon  <christophe.lyon@linaro.org>
  
! 	* doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
  
! 2020-04-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
!             Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
! 	* config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
! 	(ALL_QUIRKS): Add quirk_no_asmcpu.
! 	(cortex-m55): Define new cpu.
! 	* config/arm/arm-tables.opt: Regenerate.
! 	* config/arm/arm-tune.md: Likewise.
! 	* doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
  
! 2020-04-22  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/94700
! 	* tree-ssa-forwprop.c (simplify_vector_constructor): When processing
! 	an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
! 	of similarly-structured but distinct vector types.
  
! 2020-04-21  Martin Sebor  <msebor@redhat.com>
  
! 	PR middle-end/94647
! 	* gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
! 	the computation of the lower bound of the source access size.
! 	(builtin_access::generic_overlap): Remove a hack for setting ranges
! 	of overlap offsets.
  
! 2020-04-21  John David Anglin  <danglin@gcc.gnu.org>
  
! 	* config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
! 	(ASM_WEAKEN_DECL): New define.
! 	(HAVE_GAS_WEAKREF): Undefine.
  
! 2020-04-21  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/94683
! 	* tree-ssa-forwprop.c (simplify_vector_constructor): Use a
! 	VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
! 	but distinct vector types.
  
! 2020-04-21  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c/94641
! 	* stor-layout.c (place_field, finalize_record_size): Don't emit
! 	-Wpadded warning on TYPE_ARTIFICIAL rli->t.
! 	* ubsan.c (ubsan_get_type_descriptor_type,
! 	ubsan_get_source_location_type, ubsan_create_data): Set
! 	TYPE_ARTIFICIAL.
! 	* asan.c (asan_global_struct): Likewise.
  
! 2020-04-21  Duan bo  <duanbo3@huawei.com>
  
! 	PR target/94577
! 	* config/aarch64/aarch64.c: Add an error message for option conflict.
! 	* doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
! 	incompatible with -fpic, -fPIC and -mabi=ilp32.
  
! 2020-04-21  Frederik Harwath  <frederik@codesourcery.com>
  
! 	PR other/94629
! 	* omp-low.c (new_omp_context): Remove assignments to
! 	ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
  
! 2020-04-20  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
! 	("popcountv2di2_vx"): Use simplify_gen_subreg.
  
! 2020-04-20  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	PR target/94613
! 	* config/s390/s390-builtin-types.def: Add 3 new function modes.
! 	* config/s390/s390-builtins.def: Add mode dependent low-level
! 	builtin and map the overloaded builtins to these.
! 	* config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
! 	("vsel<V_HW"): ... this and rewrite the pattern with bitops.
  
! 2020-04-20  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
! 	has a variable VF, prefer new_loop_vinfo if it is cheaper for the
! 	estimated VF and is no worse at double the estimated VF.
  
! 2020-04-20  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR target/94668
! 	* config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
! 	order of arguments to rtx_vector_builder.
! 	(aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
! 	When extending the trailing constants to a full vector, replace any
! 	variables with zeros.
  
! 2020-04-20  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR ipa/94582
! 	* tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
! 	flag.
  
! 2020-04-20  Martin Liska  <mliska@suse.cz>
  
! 	* symtab.c (symtab_node::dump_references): Add space after
! 	one entry.
! 	(symtab_node::dump_referring): Likewise.
  
! 2020-04-18  Jeff Law  <law@redhat.com>
  
! 	PR debug/94439
! 	* regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
! 	the chain.
  
! 2020-04-18  Iain Buclaw  <ibuclaw@gdcproject.org>
  
! 	* doc/sourcebuild.texi (Effective-Target Keywords, Environment
! 	attributes): Document d_runtime_has_std_library.
  
! 2020-04-17  Jeff Law  <law@redhat.com>
  
! 	PR rtl-optimization/90275
! 	* cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
! 	when the destination has a REG_UNUSED note.
  
! 2020-04-17  Tobias Burnus  <tobias@codesourcery.com>
  
! 	PR middle-end/94635
! 	* gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
! 	MAP_DELETE.
  
! 2020-04-17  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
! 	(aarch64_sve_adjust_stmt_cost): Add a vectype parameter.  Double the
! 	cost of load and store insns if one loop iteration has enough scalar
! 	elements to use an Advanced SIMD LDP or STP.
! 	(aarch64_add_stmt_cost): Update call accordingly.
  
! 2020-04-17  Jakub Jelinek  <jakub@redhat.com>
! 	    Jeff Law  <law@redhat.com>
  
! 	PR target/94567
! 	* config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
! 	CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
! 	or pos + len >= 32, or pos + len is equal to operands[2] precision
! 	and operands[2] is not a register operand.  During splitting perform
! 	SImode AND if operands[0] doesn't have CCZmode and pos + len is
! 	equal to mode precision.
  
! 2020-04-17  Richard Biener  <rguenther@suse.de>
  
! 	PR other/94629
! 	* cgraphclones.c (cgraph_node::create_clone): Remove duplicate
! 	initialization.
! 	* dwarf2out.c (dw_val_equal_p): Fix pasto in
! 	dw_val_class_vms_delta comparison.
! 	* optabs.c (expand_binop_directly): Fix pasto in commutation
! 	check.
! 	* tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
! 	initialization.
  
! 2020-04-17  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/94618
! 	* cfgrtl.c (delete_insn_and_edges): Set purge not just when
! 	insn is the BB_END of its block, but also when it is only followed
! 	by DEBUG_INSNs in its block.
  
! 	PR tree-optimization/94621
! 	* tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
! 	Move id->adjust_array_error_bounds check first in the condition.
  
! 2020-04-17  Martin Liska  <mliska@suse.cz>
! 	    Jonathan Yong <10walls@gmail.com>
  
! 	PR gcov-profile/94570
! 	* coverage.c (coverage_init): Use separator properly.
  
! 2020-04-16  Peter Bergner  <bergner@linux.ibm.com>
  
! 	PR rtl-optimization/93974
! 	* config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
! 	(rs6000_cannot_substitute_mem_equiv_p): New function.
  
! 2020-04-16  Martin Jambor  <mjambor@suse.cz>
  
! 	PR ipa/93621
! 	* ipa-inline.h (ipa_saved_clone_sources): Declare.
! 	* ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
! 	(save_inline_function_body): Link the new body holder with the
! 	previous one.
! 	* cgraph.c: Include ipa-inline.h.
! 	(cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
! 	the statement in ipa_saved_clone_sources.
! 	* cgraphunit.c: Include ipa-inline.h.
! 	(expand_all_functions): Free ipa_saved_clone_sources.
  
! 2020-04-16  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR target/94606
! 	* config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
! 	the VNx16BI lowpart of the recursively-generated constant.
  
! 2020-04-16  Martin Liska  <mliska@suse.cz>
! 	    Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c++/94314
! 	* cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
! 	DECL_IS_REPLACEABLE_OPERATOR during cloning.
! 	* tree-ssa-dce.c (valid_new_delete_pair_p): New function.
! 	(propagate_necessity): Check operator names.
  
! 2020-04-16  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/94605
! 	* early-remat.c (early_remat::process_block): Handle insns that
! 	set multiple candidate registers.
! 2020-04-16  Jan Hubicka  <hubicka@ucw.cz>
! 	
! 	PR gcov-profile/93401
! 	* common.opt (profile-prefix-path): New option.
! 	* coverae.c: Include diagnostics.h.
! 	(coverage_init): Strip profile prefix path.
! 	* doc/invoke.texi (-fprofile-prefix-path): Document.
  
! 2020-04-16  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/94614
! 	* expr.c (emit_move_multi_word): Do not generate code when
! 	the destination part is undefined_operand_subword_p.
! 	* lower-subreg.c (resolve_clobber): Look through a paradoxica
! 	subreg.
  
! 2020-04-16  Martin Jambor  <mjambor@suse.cz>
  
! 	PR tree-optimization/94598
! 	* tree-sra.c (verify_sra_access_forest): Fix verification of total
! 	scalarization accesses under access to one-element arrays.
  
! 2020-04-16  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR bootstrap/89494
! 	* function.c (assign_parm_find_data_types): Add workaround for
! 	BROKEN_VALUE_INITIALIZATION compilers.
  
! 2020-04-16  Richard Biener  <rguenther@suse.de>
  
! 	* gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
! 	nodes.
  
! 2020-04-15  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/94603
! 	* config/i386/i386-builtin.def (__builtin_ia32_movq128):
! 	Require OPTION_MASK_ISA_SSE2.
  
! 2020-04-15  Gustavo Romero  <gromero@linux.ibm.com>
  
! 	PR bootstrap/89494
! 	* dumpfile.c (selftest::temp_dump_context::temp_dump_context):
! 	Don't construct a dump_context temporary to call static method.
  
! 2020-04-15  Andrea Corallo  <andrea.corallo@arm.com>
  
! 	* config/aarch64/falkor-tag-collision-avoidance.c
! 	(valid_src_p): Check for aarch64_address_info type before
! 	accessing base field.
  
! 2020-04-15  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
! 	(V_sz_elem2): Remove unused mode attribute.
  
! 2020-04-15  Matthew Malcomson  <matthew.malcomson@arm.com>
  
! 	* config/arm/arm.md (arm_movdi): Disallow for MVE.
  
! 2020-04-15  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/94539
! 	* tree-ssa-alias.c (same_type_for_tbaa): Defer to
! 	alias_sets_conflict_p for pointers.
  
! 2020-04-14  Max Filippov  <jcmvbkbc@gmail.com>
  
! 	PR target/94584
! 	* config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
! 	(extendhisi2_internal): Add %v1 before the load instructions.
  
! 2020-04-14  Aaron Sawdey  <acsawdey@linux.ibm.com>
  
! 	PR target/94542
! 	* config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
! 	use PC-relative addressing for TLS references.
  
! 2020-04-14  Martin Jambor  <mjambor@suse.cz>
  
! 	PR ipa/94434
! 	* ipa-sra.c: Include internal-fn.h.
! 	(enum isra_scan_context): Update comment.
! 	(scan_function): Treat calls to internal_functions like loads or stores.
  
! 2020-04-14  Yang Yang <yangyang305@huawei.com>
  
! 	PR tree-optimization/94574
! 	* tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
! 	whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
  
! 2020-04-14  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/94561
! 	* config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
  
! 2020-04-13  Martin Sebor  <msebor@redhat.com>
  
! 	* doc/extend.texi (-Wall): Mention -Wformat-overflow and
! 	-Wformat-truncation.  Move -Wzero-length-bounds last.
! 	(-Wrestrict): Document positive form of option enabled by -Wall.
  
! 2020-04-13 Zachary Spytz  <zspytz@gmail.com>
  
! 	* doc/extend.texi: Add realloc to list of built-in functions
! 	are recognized by the compiler.
  
! 2020-04-13  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/94556
! 	* config/i386/i386.c (ix86_expand_epilogue): Restore the frame
! 	pointer in word_mode for eh_return epilogues.
  
! 2020-04-13  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
  
! 	* config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
! 	memory references in %B, %C and %D operand selectors when the inner
! 	operand is a post increment address.
  
! 2020-04-13  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
  
! 	* config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
! 	reference by 4 bytes, and %D memory reference by 6 bytes.
  
! 2020-04-11  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/94494
! 	* config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
! 	condition for V4SI, V8HI and V16QI modes.
  
! 2020-04-11  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR debug/94495
! 	PR target/94551
! 	* cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
! 	val->val_rtx.
  
! 2020-04-10  Thomas Schwinge  <thomas@codesourcery.com>
  
! 	PR middle-end/89433
! 	PR middle-end/93465
! 	* omp-general.c (oacc_verify_routine_clauses): Diagnose if
! 	"#pragma omp declare target" has also been applied.
  
! 2020-04-09  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
  
! 	* config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
! 	when to emit the epilogue_helper insn.
! 	* config/msp430/msp430.md (epilogue_helper): Add a return insn to the
! 	RTL pattern.
  
! 2020-04-09  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR debug/94495
! 	* cselib.h (cselib_record_sp_cfa_base_equiv,
! 	cselib_sp_derived_value_p): Declare.
! 	* cselib.c (cselib_record_sp_cfa_base_equiv,
! 	cselib_sp_derived_value_p): New functions.
! 	* var-tracking.c (add_stores): Don't record MO_VAL_SET for
! 	cselib_sp_derived_value_p values.
! 	(vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
! 	start of extended basic blocks other than the first one
! 	for !frame_pointer_needed functions.
  
! 2020-04-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
! 	(aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
! 	(aarch64_sve2048_hw): Document.
! 	* config/aarch64/aarch64-protos.h
! 	(aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
! 	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
! 	__ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
! 	* config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
! 	function.
! 	(find_type_suffix_for_scalar_type): Use it instead of comparing
! 	TYPE_MAIN_VARIANTs.
! 	(function_resolver::infer_vector_or_tuple_type): Likewise.
! 	(function_resolver::require_vector_type): Likewise.
! 	(handle_arm_sve_vector_bits_attribute): New function.
! 	* config/aarch64/aarch64.c (pure_scalable_type_info): New class.
! 	(aarch64_attribute_table): Add arm_sve_vector_bits.
! 	(aarch64_return_in_memory_1):
! 	(pure_scalable_type_info::piece::get_rtx): New function.
! 	(pure_scalable_type_info::num_zr): Likewise.
! 	(pure_scalable_type_info::num_pr): Likewise.
! 	(pure_scalable_type_info::get_rtx): Likewise.
! 	(pure_scalable_type_info::analyze): Likewise.
! 	(pure_scalable_type_info::analyze_registers): Likewise.
! 	(pure_scalable_type_info::analyze_array): Likewise.
! 	(pure_scalable_type_info::analyze_record): Likewise.
! 	(pure_scalable_type_info::add_piece): Likewise.
! 	(aarch64_some_values_include_pst_objects_p): Likewise.
! 	(aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
! 	to analyze whether the type is returned in SVE registers.
! 	(aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
! 	is passed in SVE registers.
! 	(aarch64_pass_by_reference_1): New function, extracted from...
! 	(aarch64_pass_by_reference): ...here.  Use pure_scalable_type_info
! 	to analyze whether the type is a pure scalable type and, if so,
! 	whether it should be passed by reference.
! 	(aarch64_return_in_msb): Return false for pure scalable types.
! 	(aarch64_function_value_1): Fold back into...
! 	(aarch64_function_value): ...this function.  Use
! 	pure_scalable_type_info to analyze whether the type is a pure
! 	scalable type and, if so, which registers it should use.  Handle
! 	types that include pure scalable types but are not themselves
! 	pure scalable types.
! 	(aarch64_return_in_memory_1): New function, split out from...
! 	(aarch64_return_in_memory): ...here.  Use pure_scalable_type_info
! 	to analyze whether the type is a pure scalable type and, if so,
! 	whether it should be returned by reference.
! 	(aarch64_layout_arg): Remove orig_mode argument.  Use
! 	pure_scalable_type_info to analyze whether the type is a pure
! 	scalable type and, if so, which registers it should use.  Handle
! 	types that include pure scalable types but are not themselves
! 	pure scalable types.
! 	(aarch64_function_arg): Update call accordingly.
! 	(aarch64_function_arg_advance): Likewise.
! 	(aarch64_pad_reg_upward): On big-endian targets, return false for
! 	pure scalable types that are smaller than 16 bytes.
! 	(aarch64_member_type_forces_blk): New function.
! 	(aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
! 	(aarch64_short_vector_p): Return false for VECTOR_TYPEs that
! 	correspond to built-in SVE types.  Do not rely on a vector mode
! 	if the type includes an pure scalable type.  When returning true,
! 	assert that the mode is not an SVE mode.
! 	(aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
! 	built-in types here.  When returning true, assert that the type
! 	does not have an SVE mode.
! 	(aarch64_can_change_mode_class): Don't allow anything to change
! 	between a predicate mode and a non-predicate mode.  Also don't
! 	allow changes between SVE vector modes and other modes that
! 	might be bigger than 128 bits.
! 	(aarch64_invalid_binary_op): Reject binary operations that mix
! 	SVE and GNU vector types.
! 	(TARGET_MEMBER_TYPE_FORCES_BLK): Define.
  
! 2020-04-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_attribute_table): Add
! 	"SVE sizeless type".
! 	* config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
! 	(sizeless_type_p): New functions.
! 	(register_builtin_types): Apply make_type_sizeless to the type.
! 	(register_tuple_type): Likewise.
! 	(verify_type_context): Use sizeless_type_p instead of builin_type_p.
  
! 2020-04-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  
! 	* config/arm/arm_cde.h: Remove `extern "C"` when compiling for
! 	C++.
  
! 2020-04-09  Martin Jambor  <mjambor@suse.cz>
! 	    Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/94482
! 	* tree-sra.c (create_access_replacement): Dump new replacement with
! 	TDF_UID.
! 	(sra_modify_expr): Fix handling of cases when the original EXPR writes
! 	to only part of the replacement.
! 	* tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
! 	the first operand of combinations into REAL/IMAGPART_EXPR and
! 	BIT_FIELD_REF.
  
! 2020-04-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* doc/sourcebuild.texi (check-function-bodies): Treat the third
! 	parameter as a list of option regexps and require each regexp
! 	to match.
  
! 2020-04-09  Andrea Corallo  <andrea.corallo@arm.com>
  
! 	PR target/94530
! 	* config/aarch64/falkor-tag-collision-avoidance.c
! 	(valid_src_p): Fix missing rtx type check.
  
! 2020-04-09  Bin Cheng  <bin.cheng@linux.alibaba.com>
! 	    Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93674
! 	* tree-ssa-loop-ivopts.c (langhooks.h): New include.
! 	(add_iv_candidate_for_use): For iv_use of non integer or pointer type,
! 	or non-mode precision type, add candidate in unsigned type with the
! 	same precision.
  
! 2020-04-08  Clement Chigot  <clement.chigot@atos.net>
  
! 	* config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
! 	* config/rs6000/aix71.h (LIB_SPEC): Likewise.
! 	* config/rs6000/aix72.h (LIB_SPEC): Likewise.
  
! 2020-04-08  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/94526
! 	* cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
! 	with zero offset.
! 	* reload1.c (eliminate_regs_1): Avoid creating
! 	(plus (reg) (const_int 0)) in DEBUG_INSNs.
  
! 	PR tree-optimization/94524
! 	* tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
! 	negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
! 	op1 rather than op1 itself at the end.  Punt for signed modulo by
! 	most negative constant.
! 	* tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
! 	modulo by most negative constant.
  
! 2020-04-08  Richard Biener  <rguenther@suse.de>
  
! 	PR rtl-optimization/93946
! 	* cse.c (cse_insn): Record the tabled expression in
! 	src_related.  Verify a redundant store removal is valid.
  
! 2020-04-08  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/94417
! 	* config/i386/i386-features.c (rest_of_insert_endbranch): Insert
! 	ENDBR at function entry if function will be called indirectly.
  
! 2020-04-08  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94438
! 	* config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
! 	1, 2, 4 and 8.
  
! 2020-04-08  Martin Liska  <mliska@suse.cz>
  
! 	PR c++/94314
! 	* gimple.c (gimple_call_operator_delete_p): Rename to...
! 	(gimple_call_replaceable_operator_delete_p): ... this.
! 	Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
! 	* gimple.h (gimple_call_operator_delete_p): Rename to ...
! 	(gimple_call_replaceable_operator_delete_p): ... this.
! 	* tree-core.h (tree_function_decl): Add replaceable_operator
  	flag.
! 	* tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
! 	Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
! 	(propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
! 	(eliminate_unnecessary_stmts): Likewise.
! 	* tree-streamer-in.c (unpack_ts_function_decl_value_fields):
! 	Pack DECL_IS_REPLACEABLE_OPERATOR.
! 	* tree-streamer-out.c (pack_ts_function_decl_value_fields):
! 	Unpack the field here.
! 	* tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
! 	(DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
! 	(DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
! 	* cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
! 	* ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
! 	replaceable operator flags.
  
! 2020-04-08  Dennis Zhang  <dennis.zhang@arm.com>
! 	    Matthew Malcomson  <matthew.malcomson@arm.com>
  
! 	* config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
! 	(CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
! 	(CX_TERNARY_QUALIFIERS): Likewise.
! 	(ARM_BUILTIN_CDE_PATTERN_START): Likewise.
! 	(ARM_BUILTIN_CDE_PATTERN_END): Likewise.
! 	(arm_init_acle_builtins): Initialize CDE builtins.
! 	(arm_expand_acle_builtin): Check CDE constant operands.
! 	* config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
! 	of CDE constant operand.
! 	* config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
! 	TARGET_VFP_BASE.
! 	(ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
! 	* config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
! 	(__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
! 	(__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
! 	(__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
! 	(__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
! 	* config/arm/arm_cde_builtins.def: New file.
! 	* config/arm/iterators.md (V_reg): New attribute of SI.
! 	* config/arm/predicates.md (const_int_coproc_operand): New.
! 	(const_int_vcde1_operand, const_int_vcde2_operand): New.
! 	(const_int_vcde3_operand): New.
! 	* config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
! 	* config/arm/vfp.md (arm_vcx1<mode>): New entry.
! 	(arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
! 	(arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
  
! 2020-04-08  Dennis Zhang  <dennis.zhang@arm.com>
  
! 	* config.gcc: Add arm_cde.h.
! 	* config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
! 	__ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
! 	* config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
! 	* config/arm/arm.c (arm_option_reconfigure_globals): Configure
! 	arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
! 	* config/arm/arm.h (TARGET_CDE): New macro.
! 	* config/arm/arm_cde.h: New file.
! 	* doc/invoke.texi: Document CDE options +cdecp[0-7].
! 	* doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
! 	supports option.
! 	(arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
  
! 2020-04-08  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/94516
! 	* postreload.c: Include rtl-iter.h.
! 	(reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
! 	looking for all MEMs with RTX_AUTOINC operand.
! 	(move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
  
! 2020-04-08  Tobias Burnus  <tobias@codesourcery.com>
  
! 	* omp-grid.c (grid_eliminate_combined_simd_part): Use
! 	OMP_CLAUSE_CODE to access the omp clause code.
  
! 2020-04-07  Jeff Law  <law@redhat.com>
  
! 	PR rtl-optimization/92264
! 	* config/h8300/h8300.md (mov;add peephole2): Avoid applying when
! 	the destination is the stack pointer.
  
! 2020-04-07  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/94291
! 	PR rtl-optimization/84169
! 	* combine.c (try_combine): For split_i2i3, don't assume SET_DEST
! 	must be a REG or SUBREG of REG; if it is not one of these, don't
! 	update LOG_LINKs.
  
! 2020-04-07  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/94479
! 	* gimplify.c (gimplify_addr_expr): Also consider generated
! 	MEM_REFs.
  
! 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
  
! 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm_mve.h: Cast some pointers to expected types.
  
! 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
! 	same with '__arm_' prefix.
  
! 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
  
! 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm.c (arm_mve_immediate_check): Removed.
! 	* config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
! 	(mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
! 	 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
! 	 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
! 	 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
! 	 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
  
! 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
  
! 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
! 	* config/arm/mve/md: Fix v[id]wdup patterns.
  
! 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm.c (output_move_neon): Deal with label + offset cases.
! 	* config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
  
! 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
! 	and remove const_ptr enums.
  
! 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm_mve.h (vsubq_n): Merge with...
! 	(vsubq): ... this.
! 	(vmulq_n): Merge with...
! 	(vmulq): ... this.
! 	(__ARM_mve_typeid): Simplify scalar and constant detection.
  
! 2020-04-07  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94509
! 	* config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
! 	for inter-lane permutation for 64-byte modes.
  
! 	PR target/94488
! 	* config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
! 	ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
! 	Assume it is a REG after that instead of testing it and doing FAIL
! 	otherwise.  Formatting fix.
  
! 2020-04-07  Sebastian Huber  <sebastian.huber@embedded-brains.de>
  
! 	* config/rs6000/t-rtems: Delete mcpu=8540 multilib.
  
! 2020-04-07  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94500
! 	* config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
! 	handle i < 64 using avx512bw_lshrv4ti3.  Formatting fixes.
  
! 2020-04-06  Jakub Jelinek  <jakub@redhat.com>
  
! 	* cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
! 	+ const0_rtx return the SP_DERIVED_VALUE_P.
  
! 2020-04-06  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/92989
! 	* lra-lives.c (process_bb_lives): Do not treat eh_return data
! 	registers as being live at the beginning of the EH receiver.
  
! 2020-04-05 Zachary Spytz  <zspytz@gmail.com>
  
! 	* extend.texi: Add free to list of ISO C90 functions that
! 	are recognized by the compiler.
  
! 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
  
! 	* config/microblaze/microblaze.c (microblaze_must_save_register): Check
! 	for fast_interrupt.
!  
! 	* config/microblaze/microblaze.md (trap): Update output pattern.
  
! 2020-04-04  Hannes Domani  <ssbssa@yahoo.de>
! 	    Jakub Jelinek  <jakub@redhat.com>
  
! 	PR debug/94459
! 	* dwarf2out.c (gen_subprogram_die): Look through references, pointers,
! 	arrays, pointer-to-members, function types and qualifiers when
! 	checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
! 	to emit type again on definition.
  
! 2020-04-04  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR ipa/93940
! 	* ipa-fnsummary.c (vrp_will_run_p): New function.
! 	(fre_will_run_p): New function.
! 	(evaluate_properties_for_edge): Use it.
! 	* ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
! 	!optimize_debug to optimize_debug.
  
! 2020-04-04  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/94468
! 	* cselib.c (references_value_p): Formatting fix.
! 	(cselib_useless_value_p): New function.
! 	(discard_useless_locs, discard_useless_values,
! 	cselib_invalidate_regno_val, cselib_invalidate_mem,
! 	cselib_record_set): Use it instead of
! 	v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
  
! 	PR debug/94441
! 	* tree-iterator.h (expr_single): Declare.
! 	* tree-iterator.c (expr_single): New function.
! 	* tree.h (protected_set_expr_location_if_unset): Declare.
! 	* tree.c (protected_set_expr_location): Use expr_single.
! 	(protected_set_expr_location_if_unset): New function.
  
! 2020-04-03  Jeff Law  <law@redhat.com>
  
! 	PR rtl-optimization/92264
! 	* config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
! 	reloading of auto-increment addressing modes.
  
! 2020-04-03  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/94467
! 	* config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
! 	as earlyclobber.
  
! 2020-04-03  Jeff Law  <law@redhat.com>
  
! 	PR rtl-optimization/92264
! 	* config/m32r/m32r.c (m32r_output_block_move): Properly account for
! 	post-increment addressing of source operands as well as residuals
! 	when computing any adjustments to the input pointer.
  
! 2020-04-03  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94460
! 	* config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
! 	avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
! 	second half of first lane from first lane of second operand and
! 	first half of second lane from second lane of first operand.
  
! 2020-04-03  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
  
! 2020-04-03  Tamar Christina  <tamar.christina@arm.com>
  
! 	PR target/94396
! 	* common/config/aarch64/aarch64-common.c
! 	(aarch64_get_extension_string_for_isa_flags): Handle default flags.
  
! 2020-04-03  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/94465
! 	* tree.c (array_ref_low_bound): Deal with released SSA names
! 	in index position.
  
! 2020-04-03  Kwok Cheung Yeung  <kcy@codesourcery.com>
  
! 	* config/gcn/gcn.c (print_operand): Handle unordered comparison
! 	operators.
! 	* config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
! 	comparison operators.
  
! 2020-04-03  Kewen Lin  <linkw@gcc.gnu.org>
  
! 	PR tree-optimization/94443
! 	* tree-vect-loop.c (vectorizable_live_operation): Use
! 	gsi_insert_seq_before to replace gsi_insert_before.
  
! 2020-04-03  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/94445
! 	* ipa-icf-gimple.c (func_checker::compare_gimple_call):
! 	  Compare type attributes for gimple_call_fntypes.
  
! 2020-04-02  Sandra Loosemore  <sandra@codesourcery.com>
  
! 	* alias.c (get_alias_set): Fix comment typos.
  
! 2020-04-02  Fritz Reese  <foreese@gcc.gnu.org>
  
! 	PR fortran/85982
! 	* fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
! 	attribute checking used by TYPE.
  
! 2020-04-02  Martin Jambor  <mjambor@suse.cz>
  
! 	PR ipa/92676
! 	* ipa-sra.c (struct caller_issues): New fields candidate and
! 	call_from_outside_comdat.
! 	(check_for_caller_issues): Check for calls from outsied of
! 	candidate's same_comdat_group.
! 	(check_all_callers_for_issues): Set up issues.candidate, check result
! 	of the new check.
! 	(mark_callers_calls_comdat_local): New function.
! 	(process_isra_node_results): Set calls_comdat_local of callers if
! 	appropriate.
  
! 2020-04-02  Richard Biener  <rguenther@suse.de>
  
! 	PR c/94392
! 	* common.opt (ffinite-loops): Initialize to zero.
! 	* opts.c (default_options_table): Remove OPT_ffinite_loops
! 	entry.
! 	* cfgloop.h (loop::finite_p): New member.
! 	* cfgloopmanip.c (copy_loop_info): Copy finite_p.
! 	* ipa-icf-gimple.c (func_checker::compare_loops): Compare
! 	finite_p.
! 	* lto-streamer-in.c (input_cfg): Stream finite_p.
! 	* lto-streamer-out.c (output_cfg): Likewise.
! 	* tree-cfg.c (replace_loop_annotate): Initialize finite_p
! 	from flag_finite_loops at CFG build time.
! 	* tree-ssa-loop-niter.c (finite_loop_p): Check the loops
! 	finite_p flag instead of flag_finite_loops.
! 	* doc/invoke.texi (ffinite-loops): Adjust documentation of
! 	default setting.
  
! 2020-04-02  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/94450
! 	* dwarf2out.c (dwarf2out_early_finish): Remove code emitting
! 	DW_TAG_imported_unit.
  
! 2020-04-02  Maciej W. Rozycki  <macro@wdc.com>
  
! 	* doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
! 	<riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
! 	2.30.
  
! 2020-04-02  Kewen Lin  <linkw@gcc.gnu.org>
  
! 	PR tree-optimization/94401
! 	* tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
! 	access type when loading halves of vector to avoid peeling for gaps.
  
! 2020-04-02  Jakub Jelinek  <jakub@redhat.com>
  
! 	* config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
! 	between a string literal and MIPS_SYSVERSION_SPEC macro.
  
! 2020-04-02  Martin Jambor  <mjambor@suse.cz>
  
! 	* doc/invoke.texi (Optimize Options): Document sra-max-propagations.
  
+ 2020-04-02  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/92264
! 	* params.opt (-param=max-find-base-term-values=): Decrease default
! 	from 2000 to 200.
  
! 	PR rtl-optimization/92264
! 	* rtl.h (struct rtx_def): Mention that call bit is used as
! 	SP_DERIVED_VALUE_P in cselib.c.
! 	* cselib.c (SP_DERIVED_VALUE_P): Define.
! 	(PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
! 	(cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
! 	val_rtx and sp based expression where offsets cancel each other.
! 	(preserve_constants_and_equivs): Formatting fix.
! 	(cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
! 	locs list for cfa_base_preserved_val if needed.  Formatting fix.
! 	(autoinc_split): If the to be returned value is a REG, MEM or
! 	VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
! 	locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
! 	(rtx_equal_for_cselib_1): Call autoinc_split even if both
! 	expressions are PLUS in Pmode with CONST_INT second operands.
! 	Handle SP_DERIVED_VALUE_P cases.
! 	(cselib_hash_plus_const_int): New function.
! 	(cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
! 	second operand, as well as for PRE_DEC etc. that ought to be
! 	hashed the same way.
! 	(cselib_subst_to_values): Substitute PLUS with Pmode and
! 	CONST_INT operand if the first operand is a VALUE which has
! 	SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
! 	SP_DERIVED_VALUE_P + adjusted offset.
! 	(cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
! 	set SP_DERIVED_VALUE_P on it.  Set PRESERVED_VALUE_P when adding
! 	SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
! 	* var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
! 	on the sp value before calling cselib_add_permanent_equiv on the
! 	cfa_base value.
! 	* dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
! 	in the insn without REG_INC note.
! 	(replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
! 	Punt on invalid insns added by copy_to_mode_reg.  Formatting fixes.
  
! 	PR target/94435
! 	* config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
! 	y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
  
! 2020-04-02  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	PR target/94317
! 	* config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
! 	(LDRGBWBXU_Z_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
! 	intrinsic defintion by adding a new builtin call to writeback into base
! 	address.
! 	(__arm_vldrdq_gather_base_wb_u64): Likewise.
! 	(__arm_vldrdq_gather_base_wb_z_s64): Likewise.
! 	(__arm_vldrdq_gather_base_wb_z_u64): Likewise.
! 	(__arm_vldrwq_gather_base_wb_s32): Likewise.
! 	(__arm_vldrwq_gather_base_wb_u32): Likewise.
! 	(__arm_vldrwq_gather_base_wb_z_s32): Likewise.
! 	(__arm_vldrwq_gather_base_wb_z_u32): Likewise.
! 	(__arm_vldrwq_gather_base_wb_f32): Likewise.
! 	(__arm_vldrwq_gather_base_wb_z_f32): Likewise.
! 	* config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
! 	builtin's qualifier.
! 	(vldrdq_gather_base_wb_z_u): Likewise.
! 	(vldrwq_gather_base_wb_u): Likewise.
! 	(vldrdq_gather_base_wb_u): Likewise.
! 	(vldrwq_gather_base_wb_z_s): Likewise.
! 	(vldrwq_gather_base_wb_z_f): Likewise.
! 	(vldrdq_gather_base_wb_z_s): Likewise.
! 	(vldrwq_gather_base_wb_s): Likewise.
! 	(vldrwq_gather_base_wb_f): Likewise.
! 	(vldrdq_gather_base_wb_s): Likewise.
! 	(vldrwq_gather_base_nowb_z_u): Define builtin.
! 	(vldrdq_gather_base_nowb_z_u): Likewise.
! 	(vldrwq_gather_base_nowb_u): Likewise.
! 	(vldrdq_gather_base_nowb_u): Likewise.
! 	(vldrwq_gather_base_nowb_z_s): Likewise.
! 	(vldrwq_gather_base_nowb_z_f): Likewise.
! 	(vldrdq_gather_base_nowb_z_s): Likewise.
! 	(vldrwq_gather_base_nowb_s): Likewise.
! 	(vldrwq_gather_base_nowb_f): Likewise.
! 	(vldrdq_gather_base_nowb_s): Likewise.
! 	* config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
! 	pattern.
! 	(mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
! 	(mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
! 	(mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
! 	(mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
! 	(mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
! 	(mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
! 	(mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
! 	(mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
! 	(mve_vldrdq_gather_base_wb_<supf>v4di):  Modify RTL pattern.
! 	(mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
! 	(mve_vldrdq_gather_base_wb_z_<supf>v4di):  Modify RTL pattern.
  
! 2020-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
! 	("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
! 	("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
! 	("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
! 	("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
! 	("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
! 	("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
! 	("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
! 	("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
! 	modifier.
! 	("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
! 	("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
! 	Remove constraints from expander.
! 	* config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
! 	("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
! 	("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
! 	("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
! 	("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
! 	("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
  
! 2020-04-01  Peter Bergner  <bergner@linux.ibm.com>
  
! 	PR rtl-optimization/94123
! 	* lower-subreg.c (pass_lower_subreg3::gate): Remove test for
! 	flag_split_wide_types_early.
  
! 2020-04-01  Joerg Sonnenberger  <joerg@bec.de>
  
! 	* doc/extend.texi (Common Function Attributes): Fix typo.
  
! 2020-04-01  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	PR target/94420
! 	* config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
! 	on operands[1].
  
! 2020-04-01  Zackery Spytz  <zspytz@gmail.com>
  
! 	* doc/extend.texi: Fix a typo in the documentation of the
! 	copy function attribute.
  
! 2020-04-01  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/94423
! 	* tree-object-size.c (pass_object_sizes::execute): Don't call
! 	replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
! 	call replace_call_with_value.
  
! 2020-04-01  Kewen Lin  <linkw@gcc.gnu.org>
  
! 	PR tree-optimization/94043
! 	* tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
! 	phi for vec_lhs and use it for lane extraction.
  
! 2020-03-31  Felix Yang  <felix.yang@huawei.com>
  
! 	PR tree-optimization/94398
! 	* tree-vect-stmts.c (vectorizable_store): Instead of calling
! 	vect_supportable_dr_alignment, set alignment_support_scheme to
! 	dr_unaligned_supported for gather-scatter accesses.
! 	(vectorizable_load): Likewise.
  
! 2020-03-31  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
! 	New mode iterators.
! 	(vnsi, VnSI, vndi, VnDI): New mode attributes.
! 	(mov<mode>): Use <VnDI> in place of V64DI.
! 	(mov<mode>_exec): Likewise.
! 	(mov<mode>_sgprbase): Likewise.
! 	(reload_out<mode>): Likewise.
! 	(*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
! 	(gather_load<mode>v64si): Rename to ...
! 	(gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
! 	and <VnDI> in place of V64DI.
! 	(gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
! 	(gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
! 	(gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
! 	(scatter_store<mode>v64si): Rename to ...
! 	(scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
! 	(scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
! 	(scatter<mode>_insn_1offset<exec_scatter>): Likewise.
! 	(scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
! 	(scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
! 	(ds_bpermute<mode>): Use <VnSI>.
! 	(addv64si3_vcc<exec_vcc>): Rename to ...
! 	(add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
! 	(addv64si3_vcc_dup<exec_vcc>): Rename to ...
! 	(add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
! 	(addcv64si3<exec_vcc>): Rename to ...
! 	(addc<mode>3<exec_vcc>): ... this, and use V_SI.
! 	(subv64si3_vcc<exec_vcc>): Rename to ...
! 	(sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
! 	(subcv64si3<exec_vcc>): Rename to ...
! 	(subc<mode>3<exec_vcc>): ... this, and use V_SI.
! 	(addv64di3): Rename to ...
! 	(add<mode>3): ... this, and use V_DI.
! 	(addv64di3_exec): Rename to ...
! 	(add<mode>3_exec): ... this, and use V_DI.
! 	(subv64di3): Rename to ...
! 	(sub<mode>3): ... this, and use V_DI.
! 	(subv64di3_exec): Rename to ...
! 	(sub<mode>3_exec): ... this, and use V_DI.
! 	(addv64di3_zext): Rename to ...
! 	(add<mode>3_zext): ... this, and use V_DI and <VnSI>.
! 	(addv64di3_zext_exec): Rename to ...
! 	(add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
! 	(addv64di3_zext_dup): Rename to ...
! 	(add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
! 	(addv64di3_zext_dup_exec): Rename to ...
! 	(add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
! 	(addv64di3_zext_dup2): Rename to ...
! 	(add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
! 	(addv64di3_zext_dup2_exec): Rename to ...
! 	(add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
! 	(addv64di3_sext_dup2): Rename to ...
! 	(add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
! 	(addv64di3_sext_dup2_exec): Rename to ...
! 	(add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
! 	(<su>mulv64si3_highpart<exec>): Rename to ...
! 	(<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
! 	(mulv64di3): Rename to ...
! 	(mul<mode>3): ... this, and use V_DI and <VnSI>.
! 	(mulv64di3_exec): Rename to ...
! 	(mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
! 	(mulv64di3_zext): Rename to ...
! 	(mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
! 	(mulv64di3_zext_exec): Rename to ...
! 	(mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
! 	(mulv64di3_zext_dup2): Rename to ...
! 	(mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
! 	(mulv64di3_zext_dup2_exec): Rename to ...
! 	(mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
! 	(<expander>v64di3): Rename to ...
! 	(<expander><mode>3): ... this, and use V_DI and <VnSI>.
! 	(<expander>v64di3_exec): Rename to ...
! 	(<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
! 	(<expander>v64si3<exec>): Rename to ...
! 	(<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
! 	(v<expander>v64si3<exec>): Rename to ...
! 	(v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
! 	(<expander>v64si3<exec>): Rename to ...
! 	(<expander><vnsi>3<exec>): ... this, and use V_SI.
! 	(subv64df3<exec>): Rename to ...
! 	(sub<mode>3<exec>): ... this, and use V_DF.
! 	(truncv64di<mode>2): Rename to ...
! 	(trunc<vndi><mode>2): ... this, and use <VnDI>.
! 	(truncv64di<mode>2_exec): Rename to ...
! 	(trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
! 	(<convop><mode>v64di2): Rename to ...
! 	(<convop><mode><vndi>2): ... this, and use <VnDI>.
! 	(<convop><mode>v64di2_exec): Rename to ...
! 	(<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
! 	(vec_cmp<u>v64qidi): Rename to ...
! 	(vec_cmp<u><mode>di): ... this, and use <VnSI>.
! 	(vec_cmp<u>v64qidi_exec): Rename to ...
! 	(vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
! 	(vcond_mask_<mode>di): Use <VnDI>.
! 	(maskload<mode>di): Likewise.
! 	(maskstore<mode>di): Likewise.
! 	(mask_gather_load<mode>v64si): Rename to ...
! 	(mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
! 	(mask_scatter_store<mode>v64si): Rename to ...
! 	(mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
! 	(*<reduc_op>_dpp_shr_v64di): Rename to ...
! 	(*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
! 	(*plus_carry_in_dpp_shr_v64si): Rename to ...
! 	(*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
! 	(*plus_carry_dpp_shr_v64di): Rename to ...
! 	(*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
! 	(vec_seriesv64si): Rename to ...
! 	(vec_series<mode>): ... this, and use V_SI.
! 	(vec_seriesv64di): Rename to ...
! 	(vec_series<mode>): ... this, and use V_DI.
  
! 2020-03-31  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.c (arc_print_operand): Use
! 	HOST_WIDE_INT_PRINT_DEC macro.
  
! 2020-03-31  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
  
! 2020-03-31  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
! 	variant.
! 	(__arm_vbicq): Likewise.
  
! 2020-03-31  Vineet Gupta <vgupta@synopsys.com>
  
! 	* config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
  
! 2020-03-31  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
! 	common section of both MVE Integer and MVE Floating Point.
! 	(vaddvq): Likewise.
! 	(vaddlvq_p): Likewise.
! 	(vaddvaq): Likewise.
! 	(vaddvq_p): Likewise.
! 	(vcmpcsq): Likewise.
! 	(vmlsdavxq): Likewise.
! 	(vmlsdavq): Likewise.
! 	(vmladavxq): Likewise.
! 	(vmladavq): Likewise.
! 	(vminvq): Likewise.
! 	(vminavq): Likewise.
! 	(vmaxvq): Likewise.
! 	(vmaxavq): Likewise.
! 	(vmlaldavq): Likewise.
! 	(vcmphiq): Likewise.
! 	(vaddlvaq): Likewise.
! 	(vrmlaldavhq): Likewise.
! 	(vrmlaldavhxq): Likewise.
! 	(vrmlsldavhq): Likewise.
! 	(vrmlsldavhxq): Likewise.
! 	(vmlsldavxq): Likewise.
! 	(vmlsldavq): Likewise.
! 	(vabavq): Likewise.
! 	(vrmlaldavhaq): Likewise.
! 	(vcmpgeq_m_n): Likewise.
! 	(vmlsdavxq_p): Likewise.
! 	(vmlsdavq_p): Likewise.
! 	(vmlsdavaxq): Likewise.
! 	(vmlsdavaq): Likewise.
! 	(vaddvaq_p): Likewise.
! 	(vcmpcsq_m_n): Likewise.
! 	(vcmpcsq_m): Likewise.
! 	(vmladavxq_p): Likewise.
! 	(vmladavq_p): Likewise.
! 	(vmladavaxq): Likewise.
! 	(vmladavaq): Likewise.
! 	(vminvq_p): Likewise.
! 	(vminavq_p): Likewise.
! 	(vmaxvq_p): Likewise.
! 	(vmaxavq_p): Likewise.
! 	(vcmphiq_m): Likewise.
! 	(vaddlvaq_p): Likewise.
! 	(vmlaldavaq): Likewise.
! 	(vmlaldavaxq): Likewise.
! 	(vmlaldavq_p): Likewise.
! 	(vmlaldavxq_p): Likewise.
! 	(vmlsldavaq): Likewise.
! 	(vmlsldavaxq): Likewise.
! 	(vmlsldavq_p): Likewise.
! 	(vmlsldavxq_p): Likewise.
! 	(vrmlaldavhaxq): Likewise.
! 	(vrmlaldavhq_p): Likewise.
! 	(vrmlaldavhxq_p): Likewise.
! 	(vrmlsldavhaq): Likewise.
! 	(vrmlsldavhaxq): Likewise.
! 	(vrmlsldavhq_p): Likewise.
! 	(vrmlsldavhxq_p): Likewise.
! 	(vabavq_p): Likewise.
! 	(vmladavaq_p): Likewise.
! 	(vstrbq_scatter_offset): Likewise.
! 	(vstrbq_p): Likewise.
! 	(vstrbq_scatter_offset_p): Likewise.
! 	(vstrdq_scatter_base_p): Likewise.
! 	(vstrdq_scatter_base): Likewise.
! 	(vstrdq_scatter_offset_p): Likewise.
! 	(vstrdq_scatter_offset): Likewise.
! 	(vstrdq_scatter_shifted_offset_p): Likewise.
! 	(vstrdq_scatter_shifted_offset): Likewise.
! 	(vmaxq_x): Likewise.
! 	(vminq_x): Likewise.
! 	(vmovlbq_x): Likewise.
! 	(vmovltq_x): Likewise.
! 	(vmulhq_x): Likewise.
! 	(vmullbq_int_x): Likewise.
! 	(vmullbq_poly_x): Likewise.
! 	(vmulltq_int_x): Likewise.
! 	(vmulltq_poly_x): Likewise.
! 	(vstrbq): Likewise.
  
! 2020-03-31  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94368
! 	* config/aarch64/constraints.md (Uph): New constraint.
! 	* config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
! 	(@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
! 	constraint.
  
! 2020-03-31  Marc Glisse  <marc.glisse@inria.fr>
! 	    Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/94412
! 	* fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
! 	ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
  
! 2020-03-31  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/94403
! 	* gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
! 	ENUMERAL_TYPE lhs_type.
  
! 	PR rtl-optimization/94344
! 	* tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
! 	conversions, either on both operands of |^+ or just one.  Handle
! 	also extra same precision conversion on RSHIFT_EXPR first operand
! 	provided RSHIFT_EXPR is performed in unsigned type.
  
! 2020-03-30  David Malcolm  <dmalcolm@redhat.com>
  
! 	* lra.c (finish_insn_code_data_once): Set the array elements
! 	to NULL after freeing them.
  
! 2020-03-30  Andreas Schwab  <schwab@suse.de>
  
! 	* config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
! 	Define.
  
! 2020-03-30  Will Schmidt  <will_schmidt@vnet.ibm.com>
  
! 	* config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
! 	to skip defining builtins based on builtin_mask.
  
! 2020-03-30  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94343
! 	* config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
! 	!TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
! 	operand is a register.  Don't enable masked variants for V*[QH]Imode.
  
! 	PR target/93069
! 	* config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
! 	<store_mask_constraint> instead of m in output operand constraint.
! 	(vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
! 	%{%3%}.
  
! 2020-03-30  Alan Modra  <amodra@gmail.com>
  
! 	* config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
! 	(rs6000_indirect_call_template_1): Adjust to suit.
! 	* config/rs6000/rs6000.md (call_local): Merge call_local32,
! 	call_local64, and call_local_aix.
! 	(call_value_local): Simlarly.
! 	(call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
! 	and disable pattern when CALL_LONG.
! 	(call_indirect_aix, call_value_indirect_aix): Adjust rtl.
! 	(call_indirect_elfv2, call_indirect_pcrel): Likewise.
! 	(call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
  
! 2020-03-29  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR driver/94381
! 	* doc/invoke.texi: Update -falign-functions, -falign-loops and
! 	-falign-jumps documentation.
  
! 2020-03-29  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/94363
! 	* cgraphunit.c (process_function_and_variable_attributes): Remove
! 	double 'attribute' words.
  
! 2020-03-29  John David Anglin  <dave.anglin@bell.net>
  
! 	* gcc/config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
! 	.align output.
  
! 2020-03-28  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c/93573
! 	* c-decl.c (grokdeclarator): After issuing errors, set size_int_const
! 	to true after setting size to integer_one_node.
  
! 	PR tree-optimization/94329
! 	* tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
! 	on the last stmt in a bb, make sure gsi_prev isn't done immediately
! 	after gsi_last_bb.
  
! 2020-03-27  Alan Modra  <amodra@gmail.com>
  
! 	PR target/94145
! 	* config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
! 	for PLT16_LO and PLT_PCREL.
! 	* config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
! 	(UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
! 	(pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
  
! 2020-03-27  Martin Sebor  <msebor@redhat.com>
  
! 	PR c++/94098
! 	* calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
  
! 2020-03-27  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md:
! 	(VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
! 	(VEC_1REG_MODE): Delete.
! 	(VEC_1REG_ALT): Delete.
! 	(VEC_ALL1REG_MODE): Rename to V_1REG throughout.
! 	(VEC_1REG_INT_MODE): Delete.
! 	(VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
! 	(VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
! 	(VEC_2REG_MODE): Rename to V_2REG throughout.
! 	(VEC_REG_MODE): Rename to V_noHI throughout.
! 	(VEC_ALLREG_MODE): Rename to V_ALL throughout.
! 	(VEC_ALLREG_ALT):  Rename to V_ALL_ALT throughout.
! 	(VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
! 	(VEC_INT_MODE): Delete.
! 	(VEC_FP_MODE): Rename to V_FP throughout and move to top.
! 	(VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
! 	(FP_MODE): Delete and replace with FP throughout.
! 	(FP_1REG_MODE): Delete and replace with FP_1REG throughout.
! 	(VCMP_MODE): Rename to V_noQI throughout and move to top.
! 	(VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
! 	* config/gcn/gcn.md (FP): New mode iterator.
! 	(FP_1REG): New mode iterator.
  
! 2020-03-27  David Malcolm  <dmalcolm@redhat.com>
  
! 	* doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
! 	now emits two .dot files.
! 	* graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
! 	(graphviz_out::end_tr): Only close a TR, not a TD.
! 	(graphviz_out::begin_td): New.
! 	(graphviz_out::end_td): New.
! 	(graphviz_out::begin_trtd): New, replacing the old implementation
! 	of graphviz_out::begin_tr.
! 	(graphviz_out::end_tdtr): New, replacing the old implementation
! 	of graphviz_out::end_tr.
! 	* graphviz.h (graphviz_out::begin_td): New decl.
! 	(graphviz_out::end_td): New decl.
! 	(graphviz_out::begin_trtd): New decl.
! 	(graphviz_out::end_tdtr): New decl.
  
! 2020-03-27  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/94273
! 	* dwarf2out.c (should_emit_struct_debug): Return false for
! 	DINFO_LEVEL_TERSE.
  
! 2020-03-27  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/94352
! 	* tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
! 	worklist ...
! 	(ssa_propagation_engine::ssa_propagate): ... here after
! 	initializing curr_order.
  
! 2020-03-27  Kewen Lin  <linkw@gcc.gnu.org>
  
! 	PR tree-optimization/90332
! 	* tree-vect-stmts.c (vector_vector_composition_type): New function.
! 	(get_group_load_store_type): Adjust to call
! 	vector_vector_composition_type, extend it to construct with scalar
! 	types.
! 	(vectorizable_load): Likewise.
  
! 2020-03-27  Roman Zhuykov  <zhroma@ispras.ru>
  
! 	* ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
! 	(create_ddg_dep_no_link): Likewise.
! 	(add_cross_iteration_register_deps): Move debug instruction check.
! 	Other minor refactoring.
! 	(add_intra_loop_mem_dep): Do not check for debug instructions.
! 	(add_inter_loop_mem_dep): Likewise.
! 	(build_intra_loop_deps): Likewise.
! 	(create_ddg): Do not include debug insns into the graph.
! 	* ddg.h (struct ddg): Remove num_debug field.
! 	* modulo-sched.c (doloop_register_get): Adjust condition.
! 	(res_MII): Remove DDG num_debug field usage.
! 	(sms_schedule_by_order): Use assertion against debug insns.
! 	(ps_has_conflicts): Drop debug insn check.
  
! 2020-03-26  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR debug/94323
! 	* tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
! 	that contains exactly one non-DEBUG_BEGIN_STMT statement.
  
! 	PR debug/94281
! 	* gimple.h (gimple_seq_first_nondebug_stmt): New function.
! 	(gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
! 	a single non-debug stmt followed by one or more debug stmts.
! 	* gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
! 	instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
! 	and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
! 	gimple_seq_last to check if outer_stmt gbind could be reused and
! 	if yes and it is surrounded by any debug stmts, move them into the
! 	gbind body.
  
! 	PR rtl-optimization/92264
! 	* var-tracking.c (add_stores): Call cselib_set_value_sp_based even
! 	for sp based values in !frame_pointer_needed
! 	&& !ACCUMULATE_OUTGOING_ARGS functions.
  
! 2020-03-26  Felix Yang  <felix.yang@huawei.com>
  
! 	PR tree-optimization/94269
! 	* tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
! 	this
! 	operation to single basic block.
  
! 2020-03-25  Jeff Law  <law@redhat.com>
  
! 	PR rtl-optimization/90275
! 	* config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
! 	pattern.
  
! 2020-03-25  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94292
! 	* config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
! 	mode rather than VOIDmode.
  
! 2020-03-25  Martin Sebor  <msebor@redhat.com>
  
! 	PR middle-end/94004
! 	* gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
! 	even for alloca calls resulting from system macro expansion.
! 	Include inlining context in all warnings.
  
! 2020-03-25  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR target/94254
! 	* config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
! 	FPRs to change between SDmode and DDmode.
  
! 2020-03-25  Martin Sebor  <msebor@redhat.com>
  
! 	PR tree-optimization/94131
! 	* gimple-fold.c (get_range_strlen_tree): Fail for variable-length
! 	types and decls.
! 	* tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
! 	types have constant sizes.
  
! 2020-03-25  Martin Liska  <mliska@suse.cz>
  
! 	PR lto/94259
! 	* configure.ac: Report error only when --with-zstd
! 	is used.
! 	* configure: Regenerate.
  
! 2020-03-25  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94308
! 	* config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
! 	INSN_CODE (insn) to -1 when changing the pattern.
  
! 2020-03-25  Martin Liska  <mliska@suse.cz>
  
! 	PR target/93274
! 	PR ipa/94271
! 	* config/i386/i386-features.c (make_resolver_func): Drop
! 	public flag for resolver.
! 	* config/rs6000/rs6000.c (make_resolver_func): Add comdat
! 	group for resolver and drop public flag if possible.
! 	* multiple_target.c (create_dispatcher_calls): Drop unique_name
! 	and resolution as we want to enable LTO privatization of the default
! 	symbol.
  
! 2020-03-25  Martin Liska  <mliska@suse.cz>
  
! 	PR lto/94259
! 	* configure.ac: Respect --without-zstd and report
! 	error when we can't find header file with --with-zstd.
! 	* configure: Regenerate.
  
! 2020-03-25  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/94303
! 	* varasm.c (output_constructor_array_range): If local->index
! 	RANGE_EXPR doesn't start at the current location in the constructor,
! 	skip needed number of bytes using assemble_zeros or assert we don't
! 	go backwards.
  
! 	PR c++/94223
! 	* langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
! 	counter instead of DECL_UID.
  
! 	PR tree-optimization/94300
! 	* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
! 	is positive, make sure that off + size isn't larger than needed_len.
  
! 2020-03-25  Richard Biener  <rguenther@suse.de>
! 	    Jakub Jelinek  <jakub@redhat.com>
  
! 	PR debug/94283
! 	* tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
  
! 2020-03-24  Christophe Lyon  <christophe.lyon@linaro.org>
  
! 	* doc/sourcebuild.texi (ARM-specific attributes): Add
! 	arm_fp_dp_ok.
! 	(Features for dg-add-options): Add arm_fp_dp.
  
! 2020-03-24  John David Anglin  <danglin@gcc.gnu.org>
  
! 	PR lto/94249
! 	* config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
  
! 2020-03-24  Tobias Burnus  <tobias@codesourcery.com>
  
! 	PR libgomp/81689
! 	* omp-offload.c (omp_finish_file): Fix target-link handling if
! 	targetm_common.have_named_sections is false.
  
! 2020-03-24  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94286
! 	* config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
! 	instead of GEN_INT.
  
! 	PR debug/94285
! 	* tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
! 	e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
! 	If not after and at *incr_pos is a debug stmt, set stmt location to
! 	location of next non-debug stmt after it if any.
  
! 	PR debug/94283
! 	* tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
! 	GF_PLF_2, but don't add them to worklist.  Don't add an assigment to
! 	worklist or set GF_PLF_2 just because it is used in a debug stmt in
! 	another bb.  Formatting improvements.
  
! 	PR debug/94277
! 	* cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
! 	non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
! 	regardless of whether TREE_NO_WARNING is set on it or whether
! 	warn_unused_function is true or not.
  
! 2020-03-23  Jeff Law  <law@redhat.com>
  
! 	PR rtl-optimization/90275
! 	PR target/94238
! 	PR target/94144
! 	* simplify-rtx.c (comparison_code_valid_for_mode): New function.
! 	(simplify_logical_relational_operation): Use it.
  
! 2020-03-23  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c++/91993
! 	* tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
! 	ultimate rhs and if returned something different, reconstructing
! 	the COMPOUND_EXPRs.
  
! 2020-03-23  Lewis Hyatt  <lhyatt@gmail.com>
  
! 	* opts.c (print_filtered_help): Improve the help text for alias options.
  
! 2020-03-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
!             Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
! 	(vshlcq_m_u8): Likewise.
! 	(vshlcq_m_s16): Likewise.
! 	(vshlcq_m_u16): Likewise.
! 	(vshlcq_m_s32): Likewise.
! 	(vshlcq_m_u32): Likewise.
! 	(__arm_vshlcq_m_s8): Define intrinsic.
! 	(__arm_vshlcq_m_u8): Likewise.
! 	(__arm_vshlcq_m_s16): Likewise.
! 	(__arm_vshlcq_m_u16): Likewise.
! 	(__arm_vshlcq_m_s32): Likewise.
! 	(__arm_vshlcq_m_u32): Likewise.
! 	(vshlcq_m): Define polymorphic variant.
! 	* config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
! 	Use builtin qualifier.
! 	(QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
! 	* config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
! 	(mve_vshlcq_m_carry_<supf><mode>): Likewise.
! 	(mve_vshlcq_m_<supf><mode>): Likewise.
  
! 2020-03-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
! 	(UQSHL_QUALIFIERS): Likewise.
! 	(ASRL_QUALIFIERS): Likewise.
! 	(SQSHL_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
! 	Big-Endian Mode.
! 	(sqrshr): Define macro.
! 	(sqrshrl): Likewise.
! 	(sqrshrl_sat48): Likewise.
! 	(sqshl): Likewise.
! 	(sqshll): Likewise.
! 	(srshr): Likewise.
! 	(srshrl): Likewise.
! 	(uqrshl): Likewise.
! 	(uqrshll): Likewise.
! 	(uqrshll_sat48): Likewise.
! 	(uqshl): Likewise.
! 	(uqshll): Likewise.
! 	(urshr): Likewise.
! 	(urshrl): Likewise.
! 	(lsll): Likewise.
! 	(asrl): Likewise.
! 	(__arm_lsll): Define intrinsic.
! 	(__arm_asrl): Likewise.
! 	(__arm_uqrshll): Likewise.
! 	(__arm_uqrshll_sat48): Likewise.
! 	(__arm_sqrshrl): Likewise.
! 	(__arm_sqrshrl_sat48): Likewise.
! 	(__arm_uqshll): Likewise.
! 	(__arm_urshrl): Likewise.
! 	(__arm_srshrl): Likewise.
! 	(__arm_sqshll): Likewise.
! 	(__arm_uqrshl): Likewise.
! 	(__arm_sqrshr): Likewise.
! 	(__arm_uqshl): Likewise.
! 	(__arm_urshr): Likewise.
! 	(__arm_sqshl): Likewise.
! 	(__arm_srshr): Likewise.
! 	* config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
! 	qualifier.
! 	(UQSHL_QUALIFIERS): Likewise.
! 	(ASRL_QUALIFIERS): Likewise.
! 	(SQSHL_QUALIFIERS): Likewise.
! 	* config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
! 	(mve_sqrshrl_sat<supf>_di): Likewise.
! 	(mve_uqrshl_si): Likewise.
! 	(mve_sqrshr_si): Likewise.
! 	(mve_uqshll_di): Likewise.
! 	(mve_urshrl_di): Likewise.
! 	(mve_uqshl_si): Likewise.
! 	(mve_urshr_si): Likewise.
! 	(mve_sqshl_si): Likewise.
! 	(mve_srshr_si): Likewise.
! 	(mve_srshrl_di): Likewise.
! 	(mve_sqshll_di): Likewise.
  
! 2020-03-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
!             Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
! 	(vsetq_lane_f32): Likewise.
! 	(vsetq_lane_s16): Likewise.
! 	(vsetq_lane_s32): Likewise.
! 	(vsetq_lane_s8): Likewise.
! 	(vsetq_lane_s64): Likewise.
! 	(vsetq_lane_u8): Likewise.
! 	(vsetq_lane_u16): Likewise.
! 	(vsetq_lane_u32): Likewise.
! 	(vsetq_lane_u64): Likewise.
! 	(vgetq_lane_f16): Likewise.
! 	(vgetq_lane_f32): Likewise.
! 	(vgetq_lane_s16): Likewise.
! 	(vgetq_lane_s32): Likewise.
! 	(vgetq_lane_s8): Likewise.
! 	(vgetq_lane_s64): Likewise.
! 	(vgetq_lane_u8): Likewise.
! 	(vgetq_lane_u16): Likewise.
! 	(vgetq_lane_u32): Likewise.
! 	(vgetq_lane_u64): Likewise.
! 	(__ARM_NUM_LANES): Likewise.
! 	(__ARM_LANEQ): Likewise.
! 	(__ARM_CHECK_LANEQ): Likewise.
! 	(__arm_vsetq_lane_s16): Define intrinsic.
! 	(__arm_vsetq_lane_s32): Likewise.
! 	(__arm_vsetq_lane_s8): Likewise.
! 	(__arm_vsetq_lane_s64): Likewise.
! 	(__arm_vsetq_lane_u8): Likewise.
! 	(__arm_vsetq_lane_u16): Likewise.
! 	(__arm_vsetq_lane_u32): Likewise.
! 	(__arm_vsetq_lane_u64): Likewise.
! 	(__arm_vgetq_lane_s16): Likewise.
! 	(__arm_vgetq_lane_s32): Likewise.
! 	(__arm_vgetq_lane_s8): Likewise.
! 	(__arm_vgetq_lane_s64): Likewise.
! 	(__arm_vgetq_lane_u8): Likewise.
! 	(__arm_vgetq_lane_u16): Likewise.
! 	(__arm_vgetq_lane_u32): Likewise.
! 	(__arm_vgetq_lane_u64): Likewise.
! 	(__arm_vsetq_lane_f16): Likewise.
! 	(__arm_vsetq_lane_f32): Likewise.
! 	(__arm_vgetq_lane_f16): Likewise.
! 	(__arm_vgetq_lane_f32): Likewise.
! 	(vgetq_lane): Define polymorphic variant.
! 	(vsetq_lane): Likewise.
! 	* config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
! 	pattern.
! 	(mve_vec_extractv2didi): Likewise.
! 	(mve_vec_extract_sext_internal<mode>): Likewise.
! 	(mve_vec_extract_zext_internal<mode>): Likewise.
! 	(mve_vec_set<mode>_internal): Likewise.
! 	(mve_vec_setv2di_internal): Likewise.
! 	* config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
! 	file.
! 	(vec_extract<mode><V_elem_l>): Rename to
! 	"neon_vec_extract<mode><V_elem_l>".
! 	(vec_extractv2didi): Rename to "neon_vec_extractv2didi".
! 	* config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
! 	pattern common for MVE and NEON.
! 	(vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
! 	MVE and NEON.
  
! 2020-03-23  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/mve.md (earlyclobber_32): New mode attribute.
! 	(mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
! 	 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
  
! 2020-03-23  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/94261
! 	* tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
! 	IL operand swapping code.
! 	(vect_slp_rearrange_stmts): Do not arrange isomorphic
! 	nodes that would need operation code adjustments.
  
! 2020-03-23  Tobias Burnus  <tobias@codesourcery.com>
  
! 	* doc/install.texi (amdgcn-*-amdhsa): Renamed
! 	from amdgcn-unknown-amdhsa; change
! 	amdgcn-unknown-amdhsa to amdgcn-amdhsa.
  
! 2020-03-23  Richard Biener  <rguenther@suse.de>
  
! 	PR ipa/94245
! 	* ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
! 	directly rather than also folding it via build_fold_addr_expr.
  
! 2020-03-23  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/94266
! 	* tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
! 	addresses of TARGET_MEM_REFs.
  
! 2020-03-23  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/94250
! 	* symtab.c (symtab_node::clone_references): Save speculative_id
! 	as ref may be overwritten by create_reference.
! 	(symtab_node::clone_referring): Likewise.
! 	(symtab_node::clone_reference): Likewise.
  
! 2020-03-22  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
! 	references to Darwin.
! 	* config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
! 	unconditionally and comment on why.
  
! 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
  
! 	* config/darwin.c (darwin_mergeable_constant_section): Collect
! 	section anchor checks into the caller.
! 	(machopic_select_section): Collect section anchor checks into
! 	the determination of 'effective zero-size' objects. When the
! 	size is unknown, assume it is non-zero, and thus return the
! 	'generic' section for the DECL.
  
! 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
  
! 	PR target/93694
! 	* gcc/config/darwin.opt: Amend options descriptions.
  
! 2020-03-21  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/94052
! 	* lra-constraints.c (simplify_operand_subreg): Reload the inner
! 	register of a paradoxical subreg if simplify_subreg_regno fails
! 	to give a valid hard register for the outer mode.
  
! 2020-03-20  Martin Jambor  <mjambor@suse.cz>
  
! 	PR tree-optimization/93435
! 	* params.opt (sra-max-propagations): New parameter.
! 	* tree-sra.c (propagation_budget): New variable.
! 	(budget_for_propagation_access): New function.
! 	(propagate_subaccesses_from_rhs): Use it.
! 	(propagate_subaccesses_from_lhs): Likewise.
! 	(propagate_all_subaccesses): Set up and destroy propagation_budget.
  
! 2020-03-20  Carl Love  <cel@us.ibm.com>
  
! 	PR/target 87583
! 	* gcc/config/rs6000/rs6000.c (rs6000_option_override_internal):
! 	Add check for TARGET_FPRND for Power 7 or newer.
  
! 2020-03-20  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR ipa/93347
! 	* cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
! 	(cgraph_edge::redirect_callee): Move here; likewise.
! 	(cgraph_node::remove_callees): Update calls_comdat_local flag.
! 	(cgraph_node::verify_node): Verify that calls_comdat_local flag match
! 	reality.
! 	(cgraph_node::check_calls_comdat_local_p): New member function.
! 	* cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
! 	(cgraph_edge::redirect_callee): Move offline.
! 	* ipa-fnsummary.c (compute_fn_summary): Do not compute
! 	calls_comdat_local flag here.
! 	* ipa-inline-transform.c (inline_call): Fix updating of
! 	calls_comdat_local flag.
! 	* ipa-split.c (split_function): Use true instead of 1 to set the flag.
! 	* symtab.c (symtab_node::add_to_same_comdat_group): Update
! 	calls_comdat_local flag.
  
! 2020-03-20  Richard Biener  <rguenther@suse.de>
  
! 	* tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
! 	from the possibly modified root.
  
! 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
!             Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/arm/arm_mve.h (vst1q_p_u8): Define macro.
! 	(vst1q_p_s8): Likewise.
! 	(vst2q_s8): Likewise.
! 	(vst2q_u8): Likewise.
! 	(vld1q_z_u8): Likewise.
! 	(vld1q_z_s8): Likewise.
! 	(vld2q_s8): Likewise.
! 	(vld2q_u8): Likewise.
! 	(vld4q_s8): Likewise.
! 	(vld4q_u8): Likewise.
! 	(vst1q_p_u16): Likewise.
! 	(vst1q_p_s16): Likewise.
! 	(vst2q_s16): Likewise.
! 	(vst2q_u16): Likewise.
! 	(vld1q_z_u16): Likewise.
! 	(vld1q_z_s16): Likewise.
! 	(vld2q_s16): Likewise.
! 	(vld2q_u16): Likewise.
! 	(vld4q_s16): Likewise.
! 	(vld4q_u16): Likewise.
! 	(vst1q_p_u32): Likewise.
! 	(vst1q_p_s32): Likewise.
! 	(vst2q_s32): Likewise.
! 	(vst2q_u32): Likewise.
! 	(vld1q_z_u32): Likewise.
! 	(vld1q_z_s32): Likewise.
! 	(vld2q_s32): Likewise.
! 	(vld2q_u32): Likewise.
! 	(vld4q_s32): Likewise.
! 	(vld4q_u32): Likewise.
! 	(vld4q_f16): Likewise.
! 	(vld2q_f16): Likewise.
! 	(vld1q_z_f16): Likewise.
! 	(vst2q_f16): Likewise.
! 	(vst1q_p_f16): Likewise.
! 	(vld4q_f32): Likewise.
! 	(vld2q_f32): Likewise.
! 	(vld1q_z_f32): Likewise.
! 	(vst2q_f32): Likewise.
! 	(vst1q_p_f32): Likewise.
! 	(__arm_vst1q_p_u8): Define intrinsic.
! 	(__arm_vst1q_p_s8): Likewise.
! 	(__arm_vst2q_s8): Likewise.
! 	(__arm_vst2q_u8): Likewise.
! 	(__arm_vld1q_z_u8): Likewise.
! 	(__arm_vld1q_z_s8): Likewise.
! 	(__arm_vld2q_s8): Likewise.
! 	(__arm_vld2q_u8): Likewise.
! 	(__arm_vld4q_s8): Likewise.
! 	(__arm_vld4q_u8): Likewise.
! 	(__arm_vst1q_p_u16): Likewise.
! 	(__arm_vst1q_p_s16): Likewise.
! 	(__arm_vst2q_s16): Likewise.
! 	(__arm_vst2q_u16): Likewise.
! 	(__arm_vld1q_z_u16): Likewise.
! 	(__arm_vld1q_z_s16): Likewise.
! 	(__arm_vld2q_s16): Likewise.
! 	(__arm_vld2q_u16): Likewise.
! 	(__arm_vld4q_s16): Likewise.
! 	(__arm_vld4q_u16): Likewise.
! 	(__arm_vst1q_p_u32): Likewise.
! 	(__arm_vst1q_p_s32): Likewise.
! 	(__arm_vst2q_s32): Likewise.
! 	(__arm_vst2q_u32): Likewise.
! 	(__arm_vld1q_z_u32): Likewise.
! 	(__arm_vld1q_z_s32): Likewise.
! 	(__arm_vld2q_s32): Likewise.
! 	(__arm_vld2q_u32): Likewise.
! 	(__arm_vld4q_s32): Likewise.
! 	(__arm_vld4q_u32): Likewise.
! 	(__arm_vld4q_f16): Likewise.
! 	(__arm_vld2q_f16): Likewise.
! 	(__arm_vld1q_z_f16): Likewise.
! 	(__arm_vst2q_f16): Likewise.
! 	(__arm_vst1q_p_f16): Likewise.
! 	(__arm_vld4q_f32): Likewise.
! 	(__arm_vld2q_f32): Likewise.
! 	(__arm_vld1q_z_f32): Likewise.
! 	(__arm_vst2q_f32): Likewise.
! 	(__arm_vst1q_p_f32): Likewise.
! 	(vld1q_z): Define polymorphic variant.
! 	(vld2q): Likewise.
! 	(vld4q): Likewise.
! 	(vst1q_p): Likewise.
! 	(vst2q): Likewise.
! 	* config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
! 	(LOAD1): Likewise.
! 	* config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
! 	(mve_vld2q<mode>): Likewise.
! 	(mve_vld4q<mode>): Likewise.
  
! 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
!             Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
! 	(ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.	
! 	(arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
! 	"__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array. 
! 	(arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
! 	and ARM_BUILTIN_SET_FPSCR_NZCVQC.
! 	* config/arm/arm_mve.h (vadciq_s32): Define macro.
! 	(vadciq_u32): Likewise.
! 	(vadciq_m_s32): Likewise.
! 	(vadciq_m_u32): Likewise.
! 	(vadcq_s32): Likewise.
! 	(vadcq_u32): Likewise.
! 	(vadcq_m_s32): Likewise.
! 	(vadcq_m_u32): Likewise.
! 	(vsbciq_s32): Likewise.
! 	(vsbciq_u32): Likewise.
! 	(vsbciq_m_s32): Likewise.
! 	(vsbciq_m_u32): Likewise.
! 	(vsbcq_s32): Likewise.
! 	(vsbcq_u32): Likewise.
! 	(vsbcq_m_s32): Likewise.
! 	(vsbcq_m_u32): Likewise.
! 	(__arm_vadciq_s32): Define intrinsic.
! 	(__arm_vadciq_u32): Likewise.
! 	(__arm_vadciq_m_s32): Likewise.
! 	(__arm_vadciq_m_u32): Likewise.
! 	(__arm_vadcq_s32): Likewise.
! 	(__arm_vadcq_u32): Likewise.
! 	(__arm_vadcq_m_s32): Likewise.
! 	(__arm_vadcq_m_u32): Likewise.
! 	(__arm_vsbciq_s32): Likewise.
! 	(__arm_vsbciq_u32): Likewise.
! 	(__arm_vsbciq_m_s32): Likewise.
! 	(__arm_vsbciq_m_u32): Likewise.
! 	(__arm_vsbcq_s32): Likewise.
! 	(__arm_vsbcq_u32): Likewise.
! 	(__arm_vsbcq_m_s32): Likewise.
! 	(__arm_vsbcq_m_u32): Likewise.
! 	(vadciq_m): Define polymorphic variant.
! 	(vadciq): Likewise.
! 	(vadcq_m): Likewise.
! 	(vadcq): Likewise.
! 	(vsbciq_m): Likewise.
! 	(vsbciq): Likewise.
! 	(vsbcq_m): Likewise.
! 	(vsbcq): Likewise.
! 	* config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
! 	qualifier.
! 	(BINOP_UNONE_UNONE_UNONE): Likewise.
! 	(QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
! 	(QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
! 	* config/arm/mve.md (VADCIQ): Define iterator.
! 	(VADCIQ_M): Likewise.
! 	(VSBCQ): Likewise.
! 	(VSBCQ_M): Likewise.
! 	(VSBCIQ): Likewise.
! 	(VSBCIQ_M): Likewise.
! 	(VADCQ): Likewise.
! 	(VADCQ_M): Likewise.
! 	(mve_vadciq_m_<supf>v4si): Define RTL pattern.
! 	(mve_vadciq_<supf>v4si): Likewise.
! 	(mve_vadcq_m_<supf>v4si): Likewise.
! 	(mve_vadcq_<supf>v4si): Likewise.
! 	(mve_vsbciq_m_<supf>v4si): Likewise.
! 	(mve_vsbciq_<supf>v4si): Likewise.
! 	(mve_vsbcq_m_<supf>v4si): Likewise.
! 	(mve_vsbcq_<supf>v4si): Likewise.
! 	(get_fpscr_nzcvqc): Define isns.
! 	(set_fpscr_nzcvqc): Define isns.
! 	* config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
! 	(UNSPEC_SET_FPSCR_NZCVQC): Define.
  
! 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
! 	(vddupq_x_n_u16): Likewise.
! 	(vddupq_x_n_u32): Likewise.
! 	(vddupq_x_wb_u8): Likewise.
! 	(vddupq_x_wb_u16): Likewise.
! 	(vddupq_x_wb_u32): Likewise.
! 	(vdwdupq_x_n_u8): Likewise.
! 	(vdwdupq_x_n_u16): Likewise.
! 	(vdwdupq_x_n_u32): Likewise.
! 	(vdwdupq_x_wb_u8): Likewise.
! 	(vdwdupq_x_wb_u16): Likewise.
! 	(vdwdupq_x_wb_u32): Likewise.
! 	(vidupq_x_n_u8): Likewise.
! 	(vidupq_x_n_u16): Likewise.
! 	(vidupq_x_n_u32): Likewise.
! 	(vidupq_x_wb_u8): Likewise.
! 	(vidupq_x_wb_u16): Likewise.
! 	(vidupq_x_wb_u32): Likewise.
! 	(viwdupq_x_n_u8): Likewise.
! 	(viwdupq_x_n_u16): Likewise.
! 	(viwdupq_x_n_u32): Likewise.
! 	(viwdupq_x_wb_u8): Likewise.
! 	(viwdupq_x_wb_u16): Likewise.
! 	(viwdupq_x_wb_u32): Likewise.
! 	(vdupq_x_n_s8): Likewise.
! 	(vdupq_x_n_s16): Likewise.
! 	(vdupq_x_n_s32): Likewise.
! 	(vdupq_x_n_u8): Likewise.
! 	(vdupq_x_n_u16): Likewise.
! 	(vdupq_x_n_u32): Likewise.
! 	(vminq_x_s8): Likewise.
! 	(vminq_x_s16): Likewise.
! 	(vminq_x_s32): Likewise.
! 	(vminq_x_u8): Likewise.
! 	(vminq_x_u16): Likewise.
! 	(vminq_x_u32): Likewise.
! 	(vmaxq_x_s8): Likewise.
! 	(vmaxq_x_s16): Likewise.
! 	(vmaxq_x_s32): Likewise.
! 	(vmaxq_x_u8): Likewise.
! 	(vmaxq_x_u16): Likewise.
! 	(vmaxq_x_u32): Likewise.
! 	(vabdq_x_s8): Likewise.
! 	(vabdq_x_s16): Likewise.
! 	(vabdq_x_s32): Likewise.
! 	(vabdq_x_u8): Likewise.
! 	(vabdq_x_u16): Likewise.
! 	(vabdq_x_u32): Likewise.
! 	(vabsq_x_s8): Likewise.
! 	(vabsq_x_s16): Likewise.
! 	(vabsq_x_s32): Likewise.
! 	(vaddq_x_s8): Likewise.
! 	(vaddq_x_s16): Likewise.
! 	(vaddq_x_s32): Likewise.
! 	(vaddq_x_n_s8): Likewise.
! 	(vaddq_x_n_s16): Likewise.
! 	(vaddq_x_n_s32): Likewise.
! 	(vaddq_x_u8): Likewise.
! 	(vaddq_x_u16): Likewise.
! 	(vaddq_x_u32): Likewise.
! 	(vaddq_x_n_u8): Likewise.
! 	(vaddq_x_n_u16): Likewise.
! 	(vaddq_x_n_u32): Likewise.
! 	(vclsq_x_s8): Likewise.
! 	(vclsq_x_s16): Likewise.
! 	(vclsq_x_s32): Likewise.
! 	(vclzq_x_s8): Likewise.
! 	(vclzq_x_s16): Likewise.
! 	(vclzq_x_s32): Likewise.
! 	(vclzq_x_u8): Likewise.
! 	(vclzq_x_u16): Likewise.
! 	(vclzq_x_u32): Likewise.
! 	(vnegq_x_s8): Likewise.
! 	(vnegq_x_s16): Likewise.
! 	(vnegq_x_s32): Likewise.
! 	(vmulhq_x_s8): Likewise.
! 	(vmulhq_x_s16): Likewise.
! 	(vmulhq_x_s32): Likewise.
! 	(vmulhq_x_u8): Likewise.
! 	(vmulhq_x_u16): Likewise.
! 	(vmulhq_x_u32): Likewise.
! 	(vmullbq_poly_x_p8): Likewise.
! 	(vmullbq_poly_x_p16): Likewise.
! 	(vmullbq_int_x_s8): Likewise.
! 	(vmullbq_int_x_s16): Likewise.
! 	(vmullbq_int_x_s32): Likewise.
! 	(vmullbq_int_x_u8): Likewise.
! 	(vmullbq_int_x_u16): Likewise.
! 	(vmullbq_int_x_u32): Likewise.
! 	(vmulltq_poly_x_p8): Likewise.
! 	(vmulltq_poly_x_p16): Likewise.
! 	(vmulltq_int_x_s8): Likewise.
! 	(vmulltq_int_x_s16): Likewise.
! 	(vmulltq_int_x_s32): Likewise.
! 	(vmulltq_int_x_u8): Likewise.
! 	(vmulltq_int_x_u16): Likewise.
! 	(vmulltq_int_x_u32): Likewise.
! 	(vmulq_x_s8): Likewise.
! 	(vmulq_x_s16): Likewise.
! 	(vmulq_x_s32): Likewise.
! 	(vmulq_x_n_s8): Likewise.
! 	(vmulq_x_n_s16): Likewise.
! 	(vmulq_x_n_s32): Likewise.
! 	(vmulq_x_u8): Likewise.
! 	(vmulq_x_u16): Likewise.
! 	(vmulq_x_u32): Likewise.
! 	(vmulq_x_n_u8): Likewise.
! 	(vmulq_x_n_u16): Likewise.
! 	(vmulq_x_n_u32): Likewise.
! 	(vsubq_x_s8): Likewise.
! 	(vsubq_x_s16): Likewise.
! 	(vsubq_x_s32): Likewise.
! 	(vsubq_x_n_s8): Likewise.
! 	(vsubq_x_n_s16): Likewise.
! 	(vsubq_x_n_s32): Likewise.
! 	(vsubq_x_u8): Likewise.
! 	(vsubq_x_u16): Likewise.
! 	(vsubq_x_u32): Likewise.
! 	(vsubq_x_n_u8): Likewise.
! 	(vsubq_x_n_u16): Likewise.
! 	(vsubq_x_n_u32): Likewise.
! 	(vcaddq_rot90_x_s8): Likewise.
! 	(vcaddq_rot90_x_s16): Likewise.
! 	(vcaddq_rot90_x_s32): Likewise.
! 	(vcaddq_rot90_x_u8): Likewise.
! 	(vcaddq_rot90_x_u16): Likewise.
! 	(vcaddq_rot90_x_u32): Likewise.
! 	(vcaddq_rot270_x_s8): Likewise.
! 	(vcaddq_rot270_x_s16): Likewise.
! 	(vcaddq_rot270_x_s32): Likewise.
! 	(vcaddq_rot270_x_u8): Likewise.
! 	(vcaddq_rot270_x_u16): Likewise.
! 	(vcaddq_rot270_x_u32): Likewise.
! 	(vhaddq_x_n_s8): Likewise.
! 	(vhaddq_x_n_s16): Likewise.
! 	(vhaddq_x_n_s32): Likewise.
! 	(vhaddq_x_n_u8): Likewise.
! 	(vhaddq_x_n_u16): Likewise.
! 	(vhaddq_x_n_u32): Likewise.
! 	(vhaddq_x_s8): Likewise.
! 	(vhaddq_x_s16): Likewise.
! 	(vhaddq_x_s32): Likewise.
! 	(vhaddq_x_u8): Likewise.
! 	(vhaddq_x_u16): Likewise.
! 	(vhaddq_x_u32): Likewise.
! 	(vhcaddq_rot90_x_s8): Likewise.
! 	(vhcaddq_rot90_x_s16): Likewise.
! 	(vhcaddq_rot90_x_s32): Likewise.
! 	(vhcaddq_rot270_x_s8): Likewise.
! 	(vhcaddq_rot270_x_s16): Likewise.
! 	(vhcaddq_rot270_x_s32): Likewise.
! 	(vhsubq_x_n_s8): Likewise.
! 	(vhsubq_x_n_s16): Likewise.
! 	(vhsubq_x_n_s32): Likewise.
! 	(vhsubq_x_n_u8): Likewise.
! 	(vhsubq_x_n_u16): Likewise.
! 	(vhsubq_x_n_u32): Likewise.
! 	(vhsubq_x_s8): Likewise.
! 	(vhsubq_x_s16): Likewise.
! 	(vhsubq_x_s32): Likewise.
! 	(vhsubq_x_u8): Likewise.
! 	(vhsubq_x_u16): Likewise.
! 	(vhsubq_x_u32): Likewise.
! 	(vrhaddq_x_s8): Likewise.
! 	(vrhaddq_x_s16): Likewise.
! 	(vrhaddq_x_s32): Likewise.
! 	(vrhaddq_x_u8): Likewise.
! 	(vrhaddq_x_u16): Likewise.
! 	(vrhaddq_x_u32): Likewise.
! 	(vrmulhq_x_s8): Likewise.
! 	(vrmulhq_x_s16): Likewise.
! 	(vrmulhq_x_s32): Likewise.
! 	(vrmulhq_x_u8): Likewise.
! 	(vrmulhq_x_u16): Likewise.
! 	(vrmulhq_x_u32): Likewise.
! 	(vandq_x_s8): Likewise.
! 	(vandq_x_s16): Likewise.
! 	(vandq_x_s32): Likewise.
! 	(vandq_x_u8): Likewise.
! 	(vandq_x_u16): Likewise.
! 	(vandq_x_u32): Likewise.
! 	(vbicq_x_s8): Likewise.
! 	(vbicq_x_s16): Likewise.
! 	(vbicq_x_s32): Likewise.
! 	(vbicq_x_u8): Likewise.
! 	(vbicq_x_u16): Likewise.
! 	(vbicq_x_u32): Likewise.
! 	(vbrsrq_x_n_s8): Likewise.
! 	(vbrsrq_x_n_s16): Likewise.
! 	(vbrsrq_x_n_s32): Likewise.
! 	(vbrsrq_x_n_u8): Likewise.
! 	(vbrsrq_x_n_u16): Likewise.
! 	(vbrsrq_x_n_u32): Likewise.
! 	(veorq_x_s8): Likewise.
! 	(veorq_x_s16): Likewise.
! 	(veorq_x_s32): Likewise.
! 	(veorq_x_u8): Likewise.
! 	(veorq_x_u16): Likewise.
! 	(veorq_x_u32): Likewise.
! 	(vmovlbq_x_s8): Likewise.
! 	(vmovlbq_x_s16): Likewise.
! 	(vmovlbq_x_u8): Likewise.
! 	(vmovlbq_x_u16): Likewise.
! 	(vmovltq_x_s8): Likewise.
! 	(vmovltq_x_s16): Likewise.
! 	(vmovltq_x_u8): Likewise.
! 	(vmovltq_x_u16): Likewise.
! 	(vmvnq_x_s8): Likewise.
! 	(vmvnq_x_s16): Likewise.
! 	(vmvnq_x_s32): Likewise.
! 	(vmvnq_x_u8): Likewise.
! 	(vmvnq_x_u16): Likewise.
! 	(vmvnq_x_u32): Likewise.
! 	(vmvnq_x_n_s16): Likewise.
! 	(vmvnq_x_n_s32): Likewise.
! 	(vmvnq_x_n_u16): Likewise.
! 	(vmvnq_x_n_u32): Likewise.
! 	(vornq_x_s8): Likewise.
! 	(vornq_x_s16): Likewise.
! 	(vornq_x_s32): Likewise.
! 	(vornq_x_u8): Likewise.
! 	(vornq_x_u16): Likewise.
! 	(vornq_x_u32): Likewise.
! 	(vorrq_x_s8): Likewise.
! 	(vorrq_x_s16): Likewise.
! 	(vorrq_x_s32): Likewise.
! 	(vorrq_x_u8): Likewise.
! 	(vorrq_x_u16): Likewise.
! 	(vorrq_x_u32): Likewise.
! 	(vrev16q_x_s8): Likewise.
! 	(vrev16q_x_u8): Likewise.
! 	(vrev32q_x_s8): Likewise.
! 	(vrev32q_x_s16): Likewise.
! 	(vrev32q_x_u8): Likewise.
! 	(vrev32q_x_u16): Likewise.
! 	(vrev64q_x_s8): Likewise.
! 	(vrev64q_x_s16): Likewise.
! 	(vrev64q_x_s32): Likewise.
! 	(vrev64q_x_u8): Likewise.
! 	(vrev64q_x_u16): Likewise.
! 	(vrev64q_x_u32): Likewise.
! 	(vrshlq_x_s8): Likewise.
! 	(vrshlq_x_s16): Likewise.
! 	(vrshlq_x_s32): Likewise.
! 	(vrshlq_x_u8): Likewise.
! 	(vrshlq_x_u16): Likewise.
! 	(vrshlq_x_u32): Likewise.
! 	(vshllbq_x_n_s8): Likewise.
! 	(vshllbq_x_n_s16): Likewise.
! 	(vshllbq_x_n_u8): Likewise.
! 	(vshllbq_x_n_u16): Likewise.
! 	(vshlltq_x_n_s8): Likewise.
! 	(vshlltq_x_n_s16): Likewise.
! 	(vshlltq_x_n_u8): Likewise.
! 	(vshlltq_x_n_u16): Likewise.
! 	(vshlq_x_s8): Likewise.
! 	(vshlq_x_s16): Likewise.
! 	(vshlq_x_s32): Likewise.
! 	(vshlq_x_u8): Likewise.
! 	(vshlq_x_u16): Likewise.
! 	(vshlq_x_u32): Likewise.
! 	(vshlq_x_n_s8): Likewise.
! 	(vshlq_x_n_s16): Likewise.
! 	(vshlq_x_n_s32): Likewise.
! 	(vshlq_x_n_u8): Likewise.
! 	(vshlq_x_n_u16): Likewise.
! 	(vshlq_x_n_u32): Likewise.
! 	(vrshrq_x_n_s8): Likewise.
! 	(vrshrq_x_n_s16): Likewise.
! 	(vrshrq_x_n_s32): Likewise.
! 	(vrshrq_x_n_u8): Likewise.
! 	(vrshrq_x_n_u16): Likewise.
! 	(vrshrq_x_n_u32): Likewise.
! 	(vshrq_x_n_s8): Likewise.
! 	(vshrq_x_n_s16): Likewise.
! 	(vshrq_x_n_s32): Likewise.
! 	(vshrq_x_n_u8): Likewise.
! 	(vshrq_x_n_u16): Likewise.
! 	(vshrq_x_n_u32): Likewise.
! 	(vdupq_x_n_f16): Likewise.
! 	(vdupq_x_n_f32): Likewise.
! 	(vminnmq_x_f16): Likewise.
! 	(vminnmq_x_f32): Likewise.
! 	(vmaxnmq_x_f16): Likewise.
! 	(vmaxnmq_x_f32): Likewise.
! 	(vabdq_x_f16): Likewise.
! 	(vabdq_x_f32): Likewise.
! 	(vabsq_x_f16): Likewise.
! 	(vabsq_x_f32): Likewise.
! 	(vaddq_x_f16): Likewise.
! 	(vaddq_x_f32): Likewise.
! 	(vaddq_x_n_f16): Likewise.
! 	(vaddq_x_n_f32): Likewise.
! 	(vnegq_x_f16): Likewise.
! 	(vnegq_x_f32): Likewise.
! 	(vmulq_x_f16): Likewise.
! 	(vmulq_x_f32): Likewise.
! 	(vmulq_x_n_f16): Likewise.
! 	(vmulq_x_n_f32): Likewise.
! 	(vsubq_x_f16): Likewise.
! 	(vsubq_x_f32): Likewise.
! 	(vsubq_x_n_f16): Likewise.
! 	(vsubq_x_n_f32): Likewise.
! 	(vcaddq_rot90_x_f16): Likewise.
! 	(vcaddq_rot90_x_f32): Likewise.
! 	(vcaddq_rot270_x_f16): Likewise.
! 	(vcaddq_rot270_x_f32): Likewise.
! 	(vcmulq_x_f16): Likewise.
! 	(vcmulq_x_f32): Likewise.
! 	(vcmulq_rot90_x_f16): Likewise.
! 	(vcmulq_rot90_x_f32): Likewise.
! 	(vcmulq_rot180_x_f16): Likewise.
! 	(vcmulq_rot180_x_f32): Likewise.
! 	(vcmulq_rot270_x_f16): Likewise.
! 	(vcmulq_rot270_x_f32): Likewise.
! 	(vcvtaq_x_s16_f16): Likewise.
! 	(vcvtaq_x_s32_f32): Likewise.
! 	(vcvtaq_x_u16_f16): Likewise.
! 	(vcvtaq_x_u32_f32): Likewise.
! 	(vcvtnq_x_s16_f16): Likewise.
! 	(vcvtnq_x_s32_f32): Likewise.
! 	(vcvtnq_x_u16_f16): Likewise.
! 	(vcvtnq_x_u32_f32): Likewise.
! 	(vcvtpq_x_s16_f16): Likewise.
! 	(vcvtpq_x_s32_f32): Likewise.
! 	(vcvtpq_x_u16_f16): Likewise.
! 	(vcvtpq_x_u32_f32): Likewise.
! 	(vcvtmq_x_s16_f16): Likewise.
! 	(vcvtmq_x_s32_f32): Likewise.
! 	(vcvtmq_x_u16_f16): Likewise.
! 	(vcvtmq_x_u32_f32): Likewise.
! 	(vcvtbq_x_f32_f16): Likewise.
! 	(vcvttq_x_f32_f16): Likewise.
! 	(vcvtq_x_f16_u16): Likewise.
! 	(vcvtq_x_f16_s16): Likewise.
! 	(vcvtq_x_f32_s32): Likewise.
! 	(vcvtq_x_f32_u32): Likewise.
! 	(vcvtq_x_n_f16_s16): Likewise.
! 	(vcvtq_x_n_f16_u16): Likewise.
! 	(vcvtq_x_n_f32_s32): Likewise.
! 	(vcvtq_x_n_f32_u32): Likewise.
! 	(vcvtq_x_s16_f16): Likewise.
! 	(vcvtq_x_s32_f32): Likewise.
! 	(vcvtq_x_u16_f16): Likewise.
! 	(vcvtq_x_u32_f32): Likewise.
! 	(vcvtq_x_n_s16_f16): Likewise.
! 	(vcvtq_x_n_s32_f32): Likewise.
! 	(vcvtq_x_n_u16_f16): Likewise.
! 	(vcvtq_x_n_u32_f32): Likewise.
! 	(vrndq_x_f16): Likewise.
! 	(vrndq_x_f32): Likewise.
! 	(vrndnq_x_f16): Likewise.
! 	(vrndnq_x_f32): Likewise.
! 	(vrndmq_x_f16): Likewise.
! 	(vrndmq_x_f32): Likewise.
! 	(vrndpq_x_f16): Likewise.
! 	(vrndpq_x_f32): Likewise.
! 	(vrndaq_x_f16): Likewise.
! 	(vrndaq_x_f32): Likewise.
! 	(vrndxq_x_f16): Likewise.
! 	(vrndxq_x_f32): Likewise.
! 	(vandq_x_f16): Likewise.
! 	(vandq_x_f32): Likewise.
! 	(vbicq_x_f16): Likewise.
! 	(vbicq_x_f32): Likewise.
! 	(vbrsrq_x_n_f16): Likewise.
! 	(vbrsrq_x_n_f32): Likewise.
! 	(veorq_x_f16): Likewise.
! 	(veorq_x_f32): Likewise.
! 	(vornq_x_f16): Likewise.
! 	(vornq_x_f32): Likewise.
! 	(vorrq_x_f16): Likewise.
! 	(vorrq_x_f32): Likewise.
! 	(vrev32q_x_f16): Likewise.
! 	(vrev64q_x_f16): Likewise.
! 	(vrev64q_x_f32): Likewise.
! 	(__arm_vddupq_x_n_u8): Define intrinsic.
! 	(__arm_vddupq_x_n_u16): Likewise.
! 	(__arm_vddupq_x_n_u32): Likewise.
! 	(__arm_vddupq_x_wb_u8): Likewise.
! 	(__arm_vddupq_x_wb_u16): Likewise.
! 	(__arm_vddupq_x_wb_u32): Likewise.
! 	(__arm_vdwdupq_x_n_u8): Likewise.
! 	(__arm_vdwdupq_x_n_u16): Likewise.
! 	(__arm_vdwdupq_x_n_u32): Likewise.
! 	(__arm_vdwdupq_x_wb_u8): Likewise.
! 	(__arm_vdwdupq_x_wb_u16): Likewise.
! 	(__arm_vdwdupq_x_wb_u32): Likewise.
! 	(__arm_vidupq_x_n_u8): Likewise.
! 	(__arm_vidupq_x_n_u16): Likewise.
! 	(__arm_vidupq_x_n_u32): Likewise.
! 	(__arm_vidupq_x_wb_u8): Likewise.
! 	(__arm_vidupq_x_wb_u16): Likewise.
! 	(__arm_vidupq_x_wb_u32): Likewise.
! 	(__arm_viwdupq_x_n_u8): Likewise.
! 	(__arm_viwdupq_x_n_u16): Likewise.
! 	(__arm_viwdupq_x_n_u32): Likewise.
! 	(__arm_viwdupq_x_wb_u8): Likewise.
! 	(__arm_viwdupq_x_wb_u16): Likewise.
! 	(__arm_viwdupq_x_wb_u32): Likewise.
! 	(__arm_vdupq_x_n_s8): Likewise.
! 	(__arm_vdupq_x_n_s16): Likewise.
! 	(__arm_vdupq_x_n_s32): Likewise.
! 	(__arm_vdupq_x_n_u8): Likewise.
! 	(__arm_vdupq_x_n_u16): Likewise.
! 	(__arm_vdupq_x_n_u32): Likewise.
! 	(__arm_vminq_x_s8): Likewise.
! 	(__arm_vminq_x_s16): Likewise.
! 	(__arm_vminq_x_s32): Likewise.
! 	(__arm_vminq_x_u8): Likewise.
! 	(__arm_vminq_x_u16): Likewise.
! 	(__arm_vminq_x_u32): Likewise.
! 	(__arm_vmaxq_x_s8): Likewise.
! 	(__arm_vmaxq_x_s16): Likewise.
! 	(__arm_vmaxq_x_s32): Likewise.
! 	(__arm_vmaxq_x_u8): Likewise.
! 	(__arm_vmaxq_x_u16): Likewise.
! 	(__arm_vmaxq_x_u32): Likewise.
! 	(__arm_vabdq_x_s8): Likewise.
! 	(__arm_vabdq_x_s16): Likewise.
! 	(__arm_vabdq_x_s32): Likewise.
! 	(__arm_vabdq_x_u8): Likewise.
! 	(__arm_vabdq_x_u16): Likewise.
! 	(__arm_vabdq_x_u32): Likewise.
! 	(__arm_vabsq_x_s8): Likewise.
! 	(__arm_vabsq_x_s16): Likewise.
! 	(__arm_vabsq_x_s32): Likewise.
! 	(__arm_vaddq_x_s8): Likewise.
! 	(__arm_vaddq_x_s16): Likewise.
! 	(__arm_vaddq_x_s32): Likewise.
! 	(__arm_vaddq_x_n_s8): Likewise.
! 	(__arm_vaddq_x_n_s16): Likewise.
! 	(__arm_vaddq_x_n_s32): Likewise.
! 	(__arm_vaddq_x_u8): Likewise.
! 	(__arm_vaddq_x_u16): Likewise.
! 	(__arm_vaddq_x_u32): Likewise.
! 	(__arm_vaddq_x_n_u8): Likewise.
! 	(__arm_vaddq_x_n_u16): Likewise.
! 	(__arm_vaddq_x_n_u32): Likewise.
! 	(__arm_vclsq_x_s8): Likewise.
! 	(__arm_vclsq_x_s16): Likewise.
! 	(__arm_vclsq_x_s32): Likewise.
! 	(__arm_vclzq_x_s8): Likewise.
! 	(__arm_vclzq_x_s16): Likewise.
! 	(__arm_vclzq_x_s32): Likewise.
! 	(__arm_vclzq_x_u8): Likewise.
! 	(__arm_vclzq_x_u16): Likewise.
! 	(__arm_vclzq_x_u32): Likewise.
! 	(__arm_vnegq_x_s8): Likewise.
! 	(__arm_vnegq_x_s16): Likewise.
! 	(__arm_vnegq_x_s32): Likewise.
! 	(__arm_vmulhq_x_s8): Likewise.
! 	(__arm_vmulhq_x_s16): Likewise.
! 	(__arm_vmulhq_x_s32): Likewise.
! 	(__arm_vmulhq_x_u8): Likewise.
! 	(__arm_vmulhq_x_u16): Likewise.
! 	(__arm_vmulhq_x_u32): Likewise.
! 	(__arm_vmullbq_poly_x_p8): Likewise.
! 	(__arm_vmullbq_poly_x_p16): Likewise.
! 	(__arm_vmullbq_int_x_s8): Likewise.
! 	(__arm_vmullbq_int_x_s16): Likewise.
! 	(__arm_vmullbq_int_x_s32): Likewise.
! 	(__arm_vmullbq_int_x_u8): Likewise.
! 	(__arm_vmullbq_int_x_u16): Likewise.
! 	(__arm_vmullbq_int_x_u32): Likewise.
! 	(__arm_vmulltq_poly_x_p8): Likewise.
! 	(__arm_vmulltq_poly_x_p16): Likewise.
! 	(__arm_vmulltq_int_x_s8): Likewise.
! 	(__arm_vmulltq_int_x_s16): Likewise.
! 	(__arm_vmulltq_int_x_s32): Likewise.
! 	(__arm_vmulltq_int_x_u8): Likewise.
! 	(__arm_vmulltq_int_x_u16): Likewise.
! 	(__arm_vmulltq_int_x_u32): Likewise.
! 	(__arm_vmulq_x_s8): Likewise.
! 	(__arm_vmulq_x_s16): Likewise.
! 	(__arm_vmulq_x_s32): Likewise.
! 	(__arm_vmulq_x_n_s8): Likewise.
! 	(__arm_vmulq_x_n_s16): Likewise.
! 	(__arm_vmulq_x_n_s32): Likewise.
! 	(__arm_vmulq_x_u8): Likewise.
! 	(__arm_vmulq_x_u16): Likewise.
! 	(__arm_vmulq_x_u32): Likewise.
! 	(__arm_vmulq_x_n_u8): Likewise.
! 	(__arm_vmulq_x_n_u16): Likewise.
! 	(__arm_vmulq_x_n_u32): Likewise.
! 	(__arm_vsubq_x_s8): Likewise.
! 	(__arm_vsubq_x_s16): Likewise.
! 	(__arm_vsubq_x_s32): Likewise.
! 	(__arm_vsubq_x_n_s8): Likewise.
! 	(__arm_vsubq_x_n_s16): Likewise.
! 	(__arm_vsubq_x_n_s32): Likewise.
! 	(__arm_vsubq_x_u8): Likewise.
! 	(__arm_vsubq_x_u16): Likewise.
! 	(__arm_vsubq_x_u32): Likewise.
! 	(__arm_vsubq_x_n_u8): Likewise.
! 	(__arm_vsubq_x_n_u16): Likewise.
! 	(__arm_vsubq_x_n_u32): Likewise.
! 	(__arm_vcaddq_rot90_x_s8): Likewise.
! 	(__arm_vcaddq_rot90_x_s16): Likewise.
! 	(__arm_vcaddq_rot90_x_s32): Likewise.
! 	(__arm_vcaddq_rot90_x_u8): Likewise.
! 	(__arm_vcaddq_rot90_x_u16): Likewise.
! 	(__arm_vcaddq_rot90_x_u32): Likewise.
! 	(__arm_vcaddq_rot270_x_s8): Likewise.
! 	(__arm_vcaddq_rot270_x_s16): Likewise.
! 	(__arm_vcaddq_rot270_x_s32): Likewise.
! 	(__arm_vcaddq_rot270_x_u8): Likewise.
! 	(__arm_vcaddq_rot270_x_u16): Likewise.
! 	(__arm_vcaddq_rot270_x_u32): Likewise.
! 	(__arm_vhaddq_x_n_s8): Likewise.
! 	(__arm_vhaddq_x_n_s16): Likewise.
! 	(__arm_vhaddq_x_n_s32): Likewise.
! 	(__arm_vhaddq_x_n_u8): Likewise.
! 	(__arm_vhaddq_x_n_u16): Likewise.
! 	(__arm_vhaddq_x_n_u32): Likewise.
! 	(__arm_vhaddq_x_s8): Likewise.
! 	(__arm_vhaddq_x_s16): Likewise.
! 	(__arm_vhaddq_x_s32): Likewise.
! 	(__arm_vhaddq_x_u8): Likewise.
! 	(__arm_vhaddq_x_u16): Likewise.
! 	(__arm_vhaddq_x_u32): Likewise.
! 	(__arm_vhcaddq_rot90_x_s8): Likewise.
! 	(__arm_vhcaddq_rot90_x_s16): Likewise.
! 	(__arm_vhcaddq_rot90_x_s32): Likewise.
! 	(__arm_vhcaddq_rot270_x_s8): Likewise.
! 	(__arm_vhcaddq_rot270_x_s16): Likewise.
! 	(__arm_vhcaddq_rot270_x_s32): Likewise.
! 	(__arm_vhsubq_x_n_s8): Likewise.
! 	(__arm_vhsubq_x_n_s16): Likewise.
! 	(__arm_vhsubq_x_n_s32): Likewise.
! 	(__arm_vhsubq_x_n_u8): Likewise.
! 	(__arm_vhsubq_x_n_u16): Likewise.
! 	(__arm_vhsubq_x_n_u32): Likewise.
! 	(__arm_vhsubq_x_s8): Likewise.
! 	(__arm_vhsubq_x_s16): Likewise.
! 	(__arm_vhsubq_x_s32): Likewise.
! 	(__arm_vhsubq_x_u8): Likewise.
! 	(__arm_vhsubq_x_u16): Likewise.
! 	(__arm_vhsubq_x_u32): Likewise.
! 	(__arm_vrhaddq_x_s8): Likewise.
! 	(__arm_vrhaddq_x_s16): Likewise.
! 	(__arm_vrhaddq_x_s32): Likewise.
! 	(__arm_vrhaddq_x_u8): Likewise.
! 	(__arm_vrhaddq_x_u16): Likewise.
! 	(__arm_vrhaddq_x_u32): Likewise.
! 	(__arm_vrmulhq_x_s8): Likewise.
! 	(__arm_vrmulhq_x_s16): Likewise.
! 	(__arm_vrmulhq_x_s32): Likewise.
! 	(__arm_vrmulhq_x_u8): Likewise.
! 	(__arm_vrmulhq_x_u16): Likewise.
! 	(__arm_vrmulhq_x_u32): Likewise.
! 	(__arm_vandq_x_s8): Likewise.
! 	(__arm_vandq_x_s16): Likewise.
! 	(__arm_vandq_x_s32): Likewise.
! 	(__arm_vandq_x_u8): Likewise.
! 	(__arm_vandq_x_u16): Likewise.
! 	(__arm_vandq_x_u32): Likewise.
! 	(__arm_vbicq_x_s8): Likewise.
! 	(__arm_vbicq_x_s16): Likewise.
! 	(__arm_vbicq_x_s32): Likewise.
! 	(__arm_vbicq_x_u8): Likewise.
! 	(__arm_vbicq_x_u16): Likewise.
! 	(__arm_vbicq_x_u32): Likewise.
! 	(__arm_vbrsrq_x_n_s8): Likewise.
! 	(__arm_vbrsrq_x_n_s16): Likewise.
! 	(__arm_vbrsrq_x_n_s32): Likewise.
! 	(__arm_vbrsrq_x_n_u8): Likewise.
! 	(__arm_vbrsrq_x_n_u16): Likewise.
! 	(__arm_vbrsrq_x_n_u32): Likewise.
! 	(__arm_veorq_x_s8): Likewise.
! 	(__arm_veorq_x_s16): Likewise.
! 	(__arm_veorq_x_s32): Likewise.
! 	(__arm_veorq_x_u8): Likewise.
! 	(__arm_veorq_x_u16): Likewise.
! 	(__arm_veorq_x_u32): Likewise.
! 	(__arm_vmovlbq_x_s8): Likewise.
! 	(__arm_vmovlbq_x_s16): Likewise.
! 	(__arm_vmovlbq_x_u8): Likewise.
! 	(__arm_vmovlbq_x_u16): Likewise.
! 	(__arm_vmovltq_x_s8): Likewise.
! 	(__arm_vmovltq_x_s16): Likewise.
! 	(__arm_vmovltq_x_u8): Likewise.
! 	(__arm_vmovltq_x_u16): Likewise.
! 	(__arm_vmvnq_x_s8): Likewise.
! 	(__arm_vmvnq_x_s16): Likewise.
! 	(__arm_vmvnq_x_s32): Likewise.
! 	(__arm_vmvnq_x_u8): Likewise.
! 	(__arm_vmvnq_x_u16): Likewise.
! 	(__arm_vmvnq_x_u32): Likewise.
! 	(__arm_vmvnq_x_n_s16): Likewise.
! 	(__arm_vmvnq_x_n_s32): Likewise.
! 	(__arm_vmvnq_x_n_u16): Likewise.
! 	(__arm_vmvnq_x_n_u32): Likewise.
! 	(__arm_vornq_x_s8): Likewise.
! 	(__arm_vornq_x_s16): Likewise.
! 	(__arm_vornq_x_s32): Likewise.
! 	(__arm_vornq_x_u8): Likewise.
! 	(__arm_vornq_x_u16): Likewise.
! 	(__arm_vornq_x_u32): Likewise.
! 	(__arm_vorrq_x_s8): Likewise.
! 	(__arm_vorrq_x_s16): Likewise.
! 	(__arm_vorrq_x_s32): Likewise.
! 	(__arm_vorrq_x_u8): Likewise.
! 	(__arm_vorrq_x_u16): Likewise.
! 	(__arm_vorrq_x_u32): Likewise.
! 	(__arm_vrev16q_x_s8): Likewise.
! 	(__arm_vrev16q_x_u8): Likewise.
! 	(__arm_vrev32q_x_s8): Likewise.
! 	(__arm_vrev32q_x_s16): Likewise.
! 	(__arm_vrev32q_x_u8): Likewise.
! 	(__arm_vrev32q_x_u16): Likewise.
! 	(__arm_vrev64q_x_s8): Likewise.
! 	(__arm_vrev64q_x_s16): Likewise.
! 	(__arm_vrev64q_x_s32): Likewise.
! 	(__arm_vrev64q_x_u8): Likewise.
! 	(__arm_vrev64q_x_u16): Likewise.
! 	(__arm_vrev64q_x_u32): Likewise.
! 	(__arm_vrshlq_x_s8): Likewise.
! 	(__arm_vrshlq_x_s16): Likewise.
! 	(__arm_vrshlq_x_s32): Likewise.
! 	(__arm_vrshlq_x_u8): Likewise.
! 	(__arm_vrshlq_x_u16): Likewise.
! 	(__arm_vrshlq_x_u32): Likewise.
! 	(__arm_vshllbq_x_n_s8): Likewise.
! 	(__arm_vshllbq_x_n_s16): Likewise.
! 	(__arm_vshllbq_x_n_u8): Likewise.
! 	(__arm_vshllbq_x_n_u16): Likewise.
! 	(__arm_vshlltq_x_n_s8): Likewise.
! 	(__arm_vshlltq_x_n_s16): Likewise.
! 	(__arm_vshlltq_x_n_u8): Likewise.
! 	(__arm_vshlltq_x_n_u16): Likewise.
! 	(__arm_vshlq_x_s8): Likewise.
! 	(__arm_vshlq_x_s16): Likewise.
! 	(__arm_vshlq_x_s32): Likewise.
! 	(__arm_vshlq_x_u8): Likewise.
! 	(__arm_vshlq_x_u16): Likewise.
! 	(__arm_vshlq_x_u32): Likewise.
! 	(__arm_vshlq_x_n_s8): Likewise.
! 	(__arm_vshlq_x_n_s16): Likewise.
! 	(__arm_vshlq_x_n_s32): Likewise.
! 	(__arm_vshlq_x_n_u8): Likewise.
! 	(__arm_vshlq_x_n_u16): Likewise.
! 	(__arm_vshlq_x_n_u32): Likewise.
! 	(__arm_vrshrq_x_n_s8): Likewise.
! 	(__arm_vrshrq_x_n_s16): Likewise.
! 	(__arm_vrshrq_x_n_s32): Likewise.
! 	(__arm_vrshrq_x_n_u8): Likewise.
! 	(__arm_vrshrq_x_n_u16): Likewise.
! 	(__arm_vrshrq_x_n_u32): Likewise.
! 	(__arm_vshrq_x_n_s8): Likewise.
! 	(__arm_vshrq_x_n_s16): Likewise.
! 	(__arm_vshrq_x_n_s32): Likewise.
! 	(__arm_vshrq_x_n_u8): Likewise.
! 	(__arm_vshrq_x_n_u16): Likewise.
! 	(__arm_vshrq_x_n_u32): Likewise.
! 	(__arm_vdupq_x_n_f16): Likewise.
! 	(__arm_vdupq_x_n_f32): Likewise.
! 	(__arm_vminnmq_x_f16): Likewise.
! 	(__arm_vminnmq_x_f32): Likewise.
! 	(__arm_vmaxnmq_x_f16): Likewise.
! 	(__arm_vmaxnmq_x_f32): Likewise.
! 	(__arm_vabdq_x_f16): Likewise.
! 	(__arm_vabdq_x_f32): Likewise.
! 	(__arm_vabsq_x_f16): Likewise.
! 	(__arm_vabsq_x_f32): Likewise.
! 	(__arm_vaddq_x_f16): Likewise.
! 	(__arm_vaddq_x_f32): Likewise.
! 	(__arm_vaddq_x_n_f16): Likewise.
! 	(__arm_vaddq_x_n_f32): Likewise.
! 	(__arm_vnegq_x_f16): Likewise.
! 	(__arm_vnegq_x_f32): Likewise.
! 	(__arm_vmulq_x_f16): Likewise.
! 	(__arm_vmulq_x_f32): Likewise.
! 	(__arm_vmulq_x_n_f16): Likewise.
! 	(__arm_vmulq_x_n_f32): Likewise.
! 	(__arm_vsubq_x_f16): Likewise.
! 	(__arm_vsubq_x_f32): Likewise.
! 	(__arm_vsubq_x_n_f16): Likewise.
! 	(__arm_vsubq_x_n_f32): Likewise.
! 	(__arm_vcaddq_rot90_x_f16): Likewise.
! 	(__arm_vcaddq_rot90_x_f32): Likewise.
! 	(__arm_vcaddq_rot270_x_f16): Likewise.
! 	(__arm_vcaddq_rot270_x_f32): Likewise.
! 	(__arm_vcmulq_x_f16): Likewise.
! 	(__arm_vcmulq_x_f32): Likewise.
! 	(__arm_vcmulq_rot90_x_f16): Likewise.
! 	(__arm_vcmulq_rot90_x_f32): Likewise.
! 	(__arm_vcmulq_rot180_x_f16): Likewise.
! 	(__arm_vcmulq_rot180_x_f32): Likewise.
! 	(__arm_vcmulq_rot270_x_f16): Likewise.
! 	(__arm_vcmulq_rot270_x_f32): Likewise.
! 	(__arm_vcvtaq_x_s16_f16): Likewise.
! 	(__arm_vcvtaq_x_s32_f32): Likewise.
! 	(__arm_vcvtaq_x_u16_f16): Likewise.
! 	(__arm_vcvtaq_x_u32_f32): Likewise.
! 	(__arm_vcvtnq_x_s16_f16): Likewise.
! 	(__arm_vcvtnq_x_s32_f32): Likewise.
! 	(__arm_vcvtnq_x_u16_f16): Likewise.
! 	(__arm_vcvtnq_x_u32_f32): Likewise.
! 	(__arm_vcvtpq_x_s16_f16): Likewise.
! 	(__arm_vcvtpq_x_s32_f32): Likewise.
! 	(__arm_vcvtpq_x_u16_f16): Likewise.
! 	(__arm_vcvtpq_x_u32_f32): Likewise.
! 	(__arm_vcvtmq_x_s16_f16): Likewise.
! 	(__arm_vcvtmq_x_s32_f32): Likewise.
! 	(__arm_vcvtmq_x_u16_f16): Likewise.
! 	(__arm_vcvtmq_x_u32_f32): Likewise.
! 	(__arm_vcvtbq_x_f32_f16): Likewise.
! 	(__arm_vcvttq_x_f32_f16): Likewise.
! 	(__arm_vcvtq_x_f16_u16): Likewise.
! 	(__arm_vcvtq_x_f16_s16): Likewise.
! 	(__arm_vcvtq_x_f32_s32): Likewise.
! 	(__arm_vcvtq_x_f32_u32): Likewise.
! 	(__arm_vcvtq_x_n_f16_s16): Likewise.
! 	(__arm_vcvtq_x_n_f16_u16): Likewise.
! 	(__arm_vcvtq_x_n_f32_s32): Likewise.
! 	(__arm_vcvtq_x_n_f32_u32): Likewise.
! 	(__arm_vcvtq_x_s16_f16): Likewise.
! 	(__arm_vcvtq_x_s32_f32): Likewise.
! 	(__arm_vcvtq_x_u16_f16): Likewise.
! 	(__arm_vcvtq_x_u32_f32): Likewise.
! 	(__arm_vcvtq_x_n_s16_f16): Likewise.
! 	(__arm_vcvtq_x_n_s32_f32): Likewise.
! 	(__arm_vcvtq_x_n_u16_f16): Likewise.
! 	(__arm_vcvtq_x_n_u32_f32): Likewise.
! 	(__arm_vrndq_x_f16): Likewise.
! 	(__arm_vrndq_x_f32): Likewise.
! 	(__arm_vrndnq_x_f16): Likewise.
! 	(__arm_vrndnq_x_f32): Likewise.
! 	(__arm_vrndmq_x_f16): Likewise.
! 	(__arm_vrndmq_x_f32): Likewise.
! 	(__arm_vrndpq_x_f16): Likewise.
! 	(__arm_vrndpq_x_f32): Likewise.
! 	(__arm_vrndaq_x_f16): Likewise.
! 	(__arm_vrndaq_x_f32): Likewise.
! 	(__arm_vrndxq_x_f16): Likewise.
! 	(__arm_vrndxq_x_f32): Likewise.
! 	(__arm_vandq_x_f16): Likewise.
! 	(__arm_vandq_x_f32): Likewise.
! 	(__arm_vbicq_x_f16): Likewise.
! 	(__arm_vbicq_x_f32): Likewise.
! 	(__arm_vbrsrq_x_n_f16): Likewise.
! 	(__arm_vbrsrq_x_n_f32): Likewise.
! 	(__arm_veorq_x_f16): Likewise.
! 	(__arm_veorq_x_f32): Likewise.
! 	(__arm_vornq_x_f16): Likewise.
! 	(__arm_vornq_x_f32): Likewise.
! 	(__arm_vorrq_x_f16): Likewise.
! 	(__arm_vorrq_x_f32): Likewise.
! 	(__arm_vrev32q_x_f16): Likewise.
! 	(__arm_vrev64q_x_f16): Likewise.
! 	(__arm_vrev64q_x_f32): Likewise.
! 	(vabdq_x): Define polymorphic variant.
! 	(vabsq_x): Likewise.
! 	(vaddq_x): Likewise.
! 	(vandq_x): Likewise.
! 	(vbicq_x): Likewise.
! 	(vbrsrq_x): Likewise.
! 	(vcaddq_rot270_x): Likewise.
! 	(vcaddq_rot90_x): Likewise.
! 	(vcmulq_rot180_x): Likewise.
! 	(vcmulq_rot270_x): Likewise.
! 	(vcmulq_x): Likewise.
! 	(vcvtq_x): Likewise.
! 	(vcvtq_x_n): Likewise.
! 	(vcvtnq_m): Likewise.
! 	(veorq_x): Likewise.
! 	(vmaxnmq_x): Likewise.
! 	(vminnmq_x): Likewise.
! 	(vmulq_x): Likewise.
! 	(vnegq_x): Likewise.
! 	(vornq_x): Likewise.
! 	(vorrq_x): Likewise.
! 	(vrev32q_x): Likewise.
! 	(vrev64q_x): Likewise.
! 	(vrndaq_x): Likewise.
! 	(vrndmq_x): Likewise.
! 	(vrndnq_x): Likewise.
! 	(vrndpq_x): Likewise.
! 	(vrndq_x): Likewise.
! 	(vrndxq_x): Likewise.
! 	(vsubq_x): Likewise.
! 	(vcmulq_rot90_x): Likewise.
! 	(vadciq): Likewise.
! 	(vclsq_x): Likewise.
! 	(vclzq_x): Likewise.
! 	(vhaddq_x): Likewise.
! 	(vhcaddq_rot270_x): Likewise.
! 	(vhcaddq_rot90_x): Likewise.
! 	(vhsubq_x): Likewise.
! 	(vmaxq_x): Likewise.
! 	(vminq_x): Likewise.
! 	(vmovlbq_x): Likewise.
! 	(vmovltq_x): Likewise.
! 	(vmulhq_x): Likewise.
! 	(vmullbq_int_x): Likewise.
! 	(vmullbq_poly_x): Likewise.
! 	(vmulltq_int_x): Likewise.
! 	(vmulltq_poly_x): Likewise.
! 	(vmvnq_x): Likewise.
! 	(vrev16q_x): Likewise.
! 	(vrhaddq_x): Likewise.
! 	(vrmulhq_x): Likewise.
! 	(vrshlq_x): Likewise.
! 	(vrshrq_x): Likewise.
! 	(vshllbq_x): Likewise.
! 	(vshlltq_x): Likewise.
! 	(vshlq_x_n): Likewise.
! 	(vshlq_x): Likewise.
! 	(vdwdupq_x_u8): Likewise.
! 	(vdwdupq_x_u16): Likewise.
! 	(vdwdupq_x_u32): Likewise.
! 	(viwdupq_x_u8): Likewise.
! 	(viwdupq_x_u16): Likewise.
! 	(viwdupq_x_u32): Likewise.
! 	(vidupq_x_u8): Likewise.
! 	(vddupq_x_u8): Likewise.
! 	(vidupq_x_u16): Likewise.
! 	(vddupq_x_u16): Likewise.
! 	(vidupq_x_u32): Likewise.
! 	(vddupq_x_u32): Likewise.
! 	(vshrq_x): Likewise.
  
! 2020-03-20  Richard Biener  <rguenther@suse.de>
  
! 	* tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
! 	to vectorize for CTOR defs.
  
! 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
!             Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
! 	qualifier.
! 	(LDRGBWBU_QUALIFIERS): Likewise.
! 	(LDRGBWBS_Z_QUALIFIERS): Likewise.
! 	(LDRGBWBU_Z_QUALIFIERS): Likewise.
! 	(STRSBWBS_QUALIFIERS): Likewise.
! 	(STRSBWBU_QUALIFIERS): Likewise.
! 	(STRSBWBS_P_QUALIFIERS): Likewise.
! 	(STRSBWBU_P_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
! 	(vldrdq_gather_base_wb_u64): Likewise.
! 	(vldrdq_gather_base_wb_z_s64): Likewise.
! 	(vldrdq_gather_base_wb_z_u64): Likewise.
! 	(vldrwq_gather_base_wb_f32): Likewise.
! 	(vldrwq_gather_base_wb_s32): Likewise.
! 	(vldrwq_gather_base_wb_u32): Likewise.
! 	(vldrwq_gather_base_wb_z_f32): Likewise.
! 	(vldrwq_gather_base_wb_z_s32): Likewise.
! 	(vldrwq_gather_base_wb_z_u32): Likewise.
! 	(vstrdq_scatter_base_wb_p_s64): Likewise.
! 	(vstrdq_scatter_base_wb_p_u64): Likewise.
! 	(vstrdq_scatter_base_wb_s64): Likewise.
! 	(vstrdq_scatter_base_wb_u64): Likewise.
! 	(vstrwq_scatter_base_wb_p_s32): Likewise.
! 	(vstrwq_scatter_base_wb_p_f32): Likewise.
! 	(vstrwq_scatter_base_wb_p_u32): Likewise.
! 	(vstrwq_scatter_base_wb_s32): Likewise.
! 	(vstrwq_scatter_base_wb_u32): Likewise.
! 	(vstrwq_scatter_base_wb_f32): Likewise.
! 	(__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
! 	(__arm_vldrdq_gather_base_wb_u64): Likewise.
! 	(__arm_vldrdq_gather_base_wb_z_s64): Likewise.
! 	(__arm_vldrdq_gather_base_wb_z_u64): Likewise.
! 	(__arm_vldrwq_gather_base_wb_s32): Likewise.
! 	(__arm_vldrwq_gather_base_wb_u32): Likewise.
! 	(__arm_vldrwq_gather_base_wb_z_s32): Likewise.
! 	(__arm_vldrwq_gather_base_wb_z_u32): Likewise.
! 	(__arm_vstrdq_scatter_base_wb_s64): Likewise.
! 	(__arm_vstrdq_scatter_base_wb_u64): Likewise.
! 	(__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
! 	(__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
! 	(__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
! 	(__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
! 	(__arm_vstrwq_scatter_base_wb_s32): Likewise.
! 	(__arm_vstrwq_scatter_base_wb_u32): Likewise.
! 	(__arm_vldrwq_gather_base_wb_f32): Likewise.
! 	(__arm_vldrwq_gather_base_wb_z_f32): Likewise.
! 	(__arm_vstrwq_scatter_base_wb_f32): Likewise.
! 	(__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
! 	(vstrwq_scatter_base_wb): Define polymorphic variant.
! 	(vstrwq_scatter_base_wb_p): Likewise.
! 	(vstrdq_scatter_base_wb_p): Likewise.
! 	(vstrdq_scatter_base_wb): Likewise.
! 	* config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
! 	qualifier.
! 	* config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
! 	pattern.
! 	(mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
! 	(mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
! 	(mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
! 	(mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
! 	(mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
! 	(mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
! 	(mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
! 	(mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
! 	(mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
! 	(mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
! 	(mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
! 	(mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
! 	(mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
! 	(mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
! 	(mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
! 	(mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
! 	(mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
! 	(mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
! 	(mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
! 	(mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
! 	(mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
! 	(mve_vldrwq_gather_base_wb_fv4sf): Likewise.
! 	(mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
! 	(mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
! 	(mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
! 	(mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
! 	(mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
! 	(mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
! 	(mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
  
! 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
!             Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/arm/arm-builtins.c
! 	(QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
! 	builtin qualifier.
! 	* config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
! 	(vddupq_m_n_u32): Likewise.
! 	(vddupq_m_n_u16): Likewise.
! 	(vddupq_m_wb_u8): Likewise.
! 	(vddupq_m_wb_u16): Likewise.
! 	(vddupq_m_wb_u32): Likewise.
! 	(vddupq_n_u8): Likewise.
! 	(vddupq_n_u32): Likewise.
! 	(vddupq_n_u16): Likewise.
! 	(vddupq_wb_u8): Likewise.
! 	(vddupq_wb_u16): Likewise.
! 	(vddupq_wb_u32): Likewise.
! 	(vdwdupq_m_n_u8): Likewise.
! 	(vdwdupq_m_n_u32): Likewise.
! 	(vdwdupq_m_n_u16): Likewise.
! 	(vdwdupq_m_wb_u8): Likewise.
! 	(vdwdupq_m_wb_u32): Likewise.
! 	(vdwdupq_m_wb_u16): Likewise.
! 	(vdwdupq_n_u8): Likewise.
! 	(vdwdupq_n_u32): Likewise.
! 	(vdwdupq_n_u16): Likewise.
! 	(vdwdupq_wb_u8): Likewise.
! 	(vdwdupq_wb_u32): Likewise.
! 	(vdwdupq_wb_u16): Likewise.
! 	(vidupq_m_n_u8): Likewise.
! 	(vidupq_m_n_u32): Likewise.
! 	(vidupq_m_n_u16): Likewise.
! 	(vidupq_m_wb_u8): Likewise.
! 	(vidupq_m_wb_u16): Likewise.
! 	(vidupq_m_wb_u32): Likewise.
! 	(vidupq_n_u8): Likewise.
! 	(vidupq_n_u32): Likewise.
! 	(vidupq_n_u16): Likewise.
! 	(vidupq_wb_u8): Likewise.
! 	(vidupq_wb_u16): Likewise.
! 	(vidupq_wb_u32): Likewise.
! 	(viwdupq_m_n_u8): Likewise.
! 	(viwdupq_m_n_u32): Likewise.
! 	(viwdupq_m_n_u16): Likewise.
! 	(viwdupq_m_wb_u8): Likewise.
! 	(viwdupq_m_wb_u32): Likewise.
! 	(viwdupq_m_wb_u16): Likewise.
! 	(viwdupq_n_u8): Likewise.
! 	(viwdupq_n_u32): Likewise.
! 	(viwdupq_n_u16): Likewise.
! 	(viwdupq_wb_u8): Likewise.
! 	(viwdupq_wb_u32): Likewise.
! 	(viwdupq_wb_u16): Likewise.
! 	(__arm_vddupq_m_n_u8): Define intrinsic.
! 	(__arm_vddupq_m_n_u32): Likewise.
! 	(__arm_vddupq_m_n_u16): Likewise.
! 	(__arm_vddupq_m_wb_u8): Likewise.
! 	(__arm_vddupq_m_wb_u16): Likewise.
! 	(__arm_vddupq_m_wb_u32): Likewise.
! 	(__arm_vddupq_n_u8): Likewise.
! 	(__arm_vddupq_n_u32): Likewise.
! 	(__arm_vddupq_n_u16): Likewise.
! 	(__arm_vdwdupq_m_n_u8): Likewise.
! 	(__arm_vdwdupq_m_n_u32): Likewise.
! 	(__arm_vdwdupq_m_n_u16): Likewise.
! 	(__arm_vdwdupq_m_wb_u8): Likewise.
! 	(__arm_vdwdupq_m_wb_u32): Likewise.
! 	(__arm_vdwdupq_m_wb_u16): Likewise.
! 	(__arm_vdwdupq_n_u8): Likewise.
! 	(__arm_vdwdupq_n_u32): Likewise.
! 	(__arm_vdwdupq_n_u16): Likewise.
! 	(__arm_vdwdupq_wb_u8): Likewise.
! 	(__arm_vdwdupq_wb_u32): Likewise.
! 	(__arm_vdwdupq_wb_u16): Likewise.
! 	(__arm_vidupq_m_n_u8): Likewise.
! 	(__arm_vidupq_m_n_u32): Likewise.
! 	(__arm_vidupq_m_n_u16): Likewise.
! 	(__arm_vidupq_n_u8): Likewise.
! 	(__arm_vidupq_m_wb_u8): Likewise.
! 	(__arm_vidupq_m_wb_u16): Likewise.
! 	(__arm_vidupq_m_wb_u32): Likewise.
! 	(__arm_vidupq_n_u32): Likewise.
! 	(__arm_vidupq_n_u16): Likewise.
! 	(__arm_vidupq_wb_u8): Likewise.
! 	(__arm_vidupq_wb_u16): Likewise.
! 	(__arm_vidupq_wb_u32): Likewise.
! 	(__arm_vddupq_wb_u8): Likewise.
! 	(__arm_vddupq_wb_u16): Likewise.
! 	(__arm_vddupq_wb_u32): Likewise.
! 	(__arm_viwdupq_m_n_u8): Likewise.
! 	(__arm_viwdupq_m_n_u32): Likewise.
! 	(__arm_viwdupq_m_n_u16): Likewise.
! 	(__arm_viwdupq_m_wb_u8): Likewise.
! 	(__arm_viwdupq_m_wb_u32): Likewise.
! 	(__arm_viwdupq_m_wb_u16): Likewise.
! 	(__arm_viwdupq_n_u8): Likewise.
! 	(__arm_viwdupq_n_u32): Likewise.
! 	(__arm_viwdupq_n_u16): Likewise.
! 	(__arm_viwdupq_wb_u8): Likewise.
! 	(__arm_viwdupq_wb_u32): Likewise.
! 	(__arm_viwdupq_wb_u16): Likewise.
! 	(vidupq_m): Define polymorphic variant.
! 	(vddupq_m): Likewise.
! 	(vidupq_u16): Likewise.
! 	(vidupq_u32): Likewise.
! 	(vidupq_u8): Likewise.
! 	(vddupq_u16): Likewise.
! 	(vddupq_u32): Likewise.
! 	(vddupq_u8): Likewise.
! 	(viwdupq_m): Likewise.
! 	(viwdupq_u16): Likewise.
! 	(viwdupq_u32): Likewise.
! 	(viwdupq_u8): Likewise.
! 	(vdwdupq_m): Likewise.
! 	(vdwdupq_u16): Likewise.
! 	(vdwdupq_u32): Likewise.
! 	(vdwdupq_u8): Likewise.
! 	* config/arm/arm_mve_builtins.def
! 	(QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
! 	qualifier.
! 	* config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
! 	(mve_vidupq_u<mode>_insn): Likewise.
! 	(mve_vidupq_m_n_u<mode>): Likewise.
! 	(mve_vidupq_m_wb_u<mode>_insn): Likewise.
! 	(mve_vddupq_n_u<mode>): Likewise.
! 	(mve_vddupq_u<mode>_insn): Likewise.
! 	(mve_vddupq_m_n_u<mode>): Likewise.
! 	(mve_vddupq_m_wb_u<mode>_insn): Likewise.
! 	(mve_vdwdupq_n_u<mode>): Likewise.
! 	(mve_vdwdupq_wb_u<mode>): Likewise.
! 	(mve_vdwdupq_wb_u<mode>_insn): Likewise.
! 	(mve_vdwdupq_m_n_u<mode>): Likewise.
! 	(mve_vdwdupq_m_wb_u<mode>): Likewise.
! 	(mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
! 	(mve_viwdupq_n_u<mode>): Likewise.
! 	(mve_viwdupq_wb_u<mode>): Likewise.
! 	(mve_viwdupq_wb_u<mode>_insn): Likewise.
! 	(mve_viwdupq_m_n_u<mode>): Likewise.
! 	(mve_viwdupq_m_wb_u<mode>): Likewise.
! 	(mve_viwdupq_m_wb_u<mode>_insn): Likewise.
  
! 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
! 	(vreinterpretq_s16_s64): Likewise.
! 	(vreinterpretq_s16_s8): Likewise.
! 	(vreinterpretq_s16_u16): Likewise.
! 	(vreinterpretq_s16_u32): Likewise.
! 	(vreinterpretq_s16_u64): Likewise.
! 	(vreinterpretq_s16_u8): Likewise.
! 	(vreinterpretq_s32_s16): Likewise.
! 	(vreinterpretq_s32_s64): Likewise.
! 	(vreinterpretq_s32_s8): Likewise.
! 	(vreinterpretq_s32_u16): Likewise.
! 	(vreinterpretq_s32_u32): Likewise.
! 	(vreinterpretq_s32_u64): Likewise.
! 	(vreinterpretq_s32_u8): Likewise.
! 	(vreinterpretq_s64_s16): Likewise.
! 	(vreinterpretq_s64_s32): Likewise.
! 	(vreinterpretq_s64_s8): Likewise.
! 	(vreinterpretq_s64_u16): Likewise.
! 	(vreinterpretq_s64_u32): Likewise.
! 	(vreinterpretq_s64_u64): Likewise.
! 	(vreinterpretq_s64_u8): Likewise.
! 	(vreinterpretq_s8_s16): Likewise.
! 	(vreinterpretq_s8_s32): Likewise.
! 	(vreinterpretq_s8_s64): Likewise.
! 	(vreinterpretq_s8_u16): Likewise.
! 	(vreinterpretq_s8_u32): Likewise.
! 	(vreinterpretq_s8_u64): Likewise.
! 	(vreinterpretq_s8_u8): Likewise.
! 	(vreinterpretq_u16_s16): Likewise.
! 	(vreinterpretq_u16_s32): Likewise.
! 	(vreinterpretq_u16_s64): Likewise.
! 	(vreinterpretq_u16_s8): Likewise.
! 	(vreinterpretq_u16_u32): Likewise.
! 	(vreinterpretq_u16_u64): Likewise.
! 	(vreinterpretq_u16_u8): Likewise.
! 	(vreinterpretq_u32_s16): Likewise.
! 	(vreinterpretq_u32_s32): Likewise.
! 	(vreinterpretq_u32_s64): Likewise.
! 	(vreinterpretq_u32_s8): Likewise.
! 	(vreinterpretq_u32_u16): Likewise.
! 	(vreinterpretq_u32_u64): Likewise.
! 	(vreinterpretq_u32_u8): Likewise.
! 	(vreinterpretq_u64_s16): Likewise.
! 	(vreinterpretq_u64_s32): Likewise.
! 	(vreinterpretq_u64_s64): Likewise.
! 	(vreinterpretq_u64_s8): Likewise.
! 	(vreinterpretq_u64_u16): Likewise.
! 	(vreinterpretq_u64_u32): Likewise.
! 	(vreinterpretq_u64_u8): Likewise.
! 	(vreinterpretq_u8_s16): Likewise.
! 	(vreinterpretq_u8_s32): Likewise.
! 	(vreinterpretq_u8_s64): Likewise.
! 	(vreinterpretq_u8_s8): Likewise.
! 	(vreinterpretq_u8_u16): Likewise.
! 	(vreinterpretq_u8_u32): Likewise.
! 	(vreinterpretq_u8_u64): Likewise.
! 	(vreinterpretq_s32_f16): Likewise.
! 	(vreinterpretq_s32_f32): Likewise.
! 	(vreinterpretq_u16_f16): Likewise.
! 	(vreinterpretq_u16_f32): Likewise.
! 	(vreinterpretq_u32_f16): Likewise.
! 	(vreinterpretq_u32_f32): Likewise.
! 	(vreinterpretq_u64_f16): Likewise.
! 	(vreinterpretq_u64_f32): Likewise.
! 	(vreinterpretq_u8_f16): Likewise.
! 	(vreinterpretq_u8_f32): Likewise.
! 	(vreinterpretq_f16_f32): Likewise.
! 	(vreinterpretq_f16_s16): Likewise.
! 	(vreinterpretq_f16_s32): Likewise.
! 	(vreinterpretq_f16_s64): Likewise.
! 	(vreinterpretq_f16_s8): Likewise.
! 	(vreinterpretq_f16_u16): Likewise.
! 	(vreinterpretq_f16_u32): Likewise.
! 	(vreinterpretq_f16_u64): Likewise.
! 	(vreinterpretq_f16_u8): Likewise.
! 	(vreinterpretq_f32_f16): Likewise.
! 	(vreinterpretq_f32_s16): Likewise.
! 	(vreinterpretq_f32_s32): Likewise.
! 	(vreinterpretq_f32_s64): Likewise.
! 	(vreinterpretq_f32_s8): Likewise.
! 	(vreinterpretq_f32_u16): Likewise.
! 	(vreinterpretq_f32_u32): Likewise.
! 	(vreinterpretq_f32_u64): Likewise.
! 	(vreinterpretq_f32_u8): Likewise.
! 	(vreinterpretq_s16_f16): Likewise.
! 	(vreinterpretq_s16_f32): Likewise.
! 	(vreinterpretq_s64_f16): Likewise.
! 	(vreinterpretq_s64_f32): Likewise.
! 	(vreinterpretq_s8_f16): Likewise.
! 	(vreinterpretq_s8_f32): Likewise.
! 	(vuninitializedq_u8): Likewise.
! 	(vuninitializedq_u16): Likewise.
! 	(vuninitializedq_u32): Likewise.
! 	(vuninitializedq_u64): Likewise.
! 	(vuninitializedq_s8): Likewise.
! 	(vuninitializedq_s16): Likewise.
! 	(vuninitializedq_s32): Likewise.
! 	(vuninitializedq_s64): Likewise.
! 	(vuninitializedq_f16): Likewise.
! 	(vuninitializedq_f32): Likewise.
! 	(__arm_vuninitializedq_u8): Define intrinsic.
! 	(__arm_vuninitializedq_u16): Likewise.
! 	(__arm_vuninitializedq_u32): Likewise.
! 	(__arm_vuninitializedq_u64): Likewise.
! 	(__arm_vuninitializedq_s8): Likewise.
! 	(__arm_vuninitializedq_s16): Likewise.
! 	(__arm_vuninitializedq_s32): Likewise.
! 	(__arm_vuninitializedq_s64): Likewise.
! 	(__arm_vreinterpretq_s16_s32): Likewise.
! 	(__arm_vreinterpretq_s16_s64): Likewise.
! 	(__arm_vreinterpretq_s16_s8): Likewise.
! 	(__arm_vreinterpretq_s16_u16): Likewise.
! 	(__arm_vreinterpretq_s16_u32): Likewise.
! 	(__arm_vreinterpretq_s16_u64): Likewise.
! 	(__arm_vreinterpretq_s16_u8): Likewise.
! 	(__arm_vreinterpretq_s32_s16): Likewise.
! 	(__arm_vreinterpretq_s32_s64): Likewise.
! 	(__arm_vreinterpretq_s32_s8): Likewise.
! 	(__arm_vreinterpretq_s32_u16): Likewise.
! 	(__arm_vreinterpretq_s32_u32): Likewise.
! 	(__arm_vreinterpretq_s32_u64): Likewise.
! 	(__arm_vreinterpretq_s32_u8): Likewise.
! 	(__arm_vreinterpretq_s64_s16): Likewise.
! 	(__arm_vreinterpretq_s64_s32): Likewise.
! 	(__arm_vreinterpretq_s64_s8): Likewise.
! 	(__arm_vreinterpretq_s64_u16): Likewise.
! 	(__arm_vreinterpretq_s64_u32): Likewise.
! 	(__arm_vreinterpretq_s64_u64): Likewise.
! 	(__arm_vreinterpretq_s64_u8): Likewise.
! 	(__arm_vreinterpretq_s8_s16): Likewise.
! 	(__arm_vreinterpretq_s8_s32): Likewise.
! 	(__arm_vreinterpretq_s8_s64): Likewise.
! 	(__arm_vreinterpretq_s8_u16): Likewise.
! 	(__arm_vreinterpretq_s8_u32): Likewise.
! 	(__arm_vreinterpretq_s8_u64): Likewise.
! 	(__arm_vreinterpretq_s8_u8): Likewise.
! 	(__arm_vreinterpretq_u16_s16): Likewise.
! 	(__arm_vreinterpretq_u16_s32): Likewise.
! 	(__arm_vreinterpretq_u16_s64): Likewise.
! 	(__arm_vreinterpretq_u16_s8): Likewise.
! 	(__arm_vreinterpretq_u16_u32): Likewise.
! 	(__arm_vreinterpretq_u16_u64): Likewise.
! 	(__arm_vreinterpretq_u16_u8): Likewise.
! 	(__arm_vreinterpretq_u32_s16): Likewise.
! 	(__arm_vreinterpretq_u32_s32): Likewise.
! 	(__arm_vreinterpretq_u32_s64): Likewise.
! 	(__arm_vreinterpretq_u32_s8): Likewise.
! 	(__arm_vreinterpretq_u32_u16): Likewise.
! 	(__arm_vreinterpretq_u32_u64): Likewise.
! 	(__arm_vreinterpretq_u32_u8): Likewise.
! 	(__arm_vreinterpretq_u64_s16): Likewise.
! 	(__arm_vreinterpretq_u64_s32): Likewise.
! 	(__arm_vreinterpretq_u64_s64): Likewise.
! 	(__arm_vreinterpretq_u64_s8): Likewise.
! 	(__arm_vreinterpretq_u64_u16): Likewise.
! 	(__arm_vreinterpretq_u64_u32): Likewise.
! 	(__arm_vreinterpretq_u64_u8): Likewise.
! 	(__arm_vreinterpretq_u8_s16): Likewise.
! 	(__arm_vreinterpretq_u8_s32): Likewise.
! 	(__arm_vreinterpretq_u8_s64): Likewise.
! 	(__arm_vreinterpretq_u8_s8): Likewise.
! 	(__arm_vreinterpretq_u8_u16): Likewise.
! 	(__arm_vreinterpretq_u8_u32): Likewise.
! 	(__arm_vreinterpretq_u8_u64): Likewise.
! 	(__arm_vuninitializedq_f16): Likewise.
! 	(__arm_vuninitializedq_f32): Likewise.
! 	(__arm_vreinterpretq_s32_f16): Likewise.
! 	(__arm_vreinterpretq_s32_f32): Likewise.
! 	(__arm_vreinterpretq_s16_f16): Likewise.
! 	(__arm_vreinterpretq_s16_f32): Likewise.
! 	(__arm_vreinterpretq_s64_f16): Likewise.
! 	(__arm_vreinterpretq_s64_f32): Likewise.
! 	(__arm_vreinterpretq_s8_f16): Likewise.
! 	(__arm_vreinterpretq_s8_f32): Likewise.
! 	(__arm_vreinterpretq_u16_f16): Likewise.
! 	(__arm_vreinterpretq_u16_f32): Likewise.
! 	(__arm_vreinterpretq_u32_f16): Likewise.
! 	(__arm_vreinterpretq_u32_f32): Likewise.
! 	(__arm_vreinterpretq_u64_f16): Likewise.
! 	(__arm_vreinterpretq_u64_f32): Likewise.
! 	(__arm_vreinterpretq_u8_f16): Likewise.
! 	(__arm_vreinterpretq_u8_f32): Likewise.
! 	(__arm_vreinterpretq_f16_f32): Likewise.
! 	(__arm_vreinterpretq_f16_s16): Likewise.
! 	(__arm_vreinterpretq_f16_s32): Likewise.
! 	(__arm_vreinterpretq_f16_s64): Likewise.
! 	(__arm_vreinterpretq_f16_s8): Likewise.
! 	(__arm_vreinterpretq_f16_u16): Likewise.
! 	(__arm_vreinterpretq_f16_u32): Likewise.
! 	(__arm_vreinterpretq_f16_u64): Likewise.
! 	(__arm_vreinterpretq_f16_u8): Likewise.
! 	(__arm_vreinterpretq_f32_f16): Likewise.
! 	(__arm_vreinterpretq_f32_s16): Likewise.
! 	(__arm_vreinterpretq_f32_s32): Likewise.
! 	(__arm_vreinterpretq_f32_s64): Likewise.
! 	(__arm_vreinterpretq_f32_s8): Likewise.
! 	(__arm_vreinterpretq_f32_u16): Likewise.
! 	(__arm_vreinterpretq_f32_u32): Likewise.
! 	(__arm_vreinterpretq_f32_u64): Likewise.
! 	(__arm_vreinterpretq_f32_u8): Likewise.
! 	(vuninitializedq): Define polymorphic variant.
! 	(vreinterpretq_f16): Likewise.
! 	(vreinterpretq_f32): Likewise.
! 	(vreinterpretq_s16): Likewise.
! 	(vreinterpretq_s32): Likewise.
! 	(vreinterpretq_s64): Likewise.
! 	(vreinterpretq_s8): Likewise.
! 	(vreinterpretq_u16): Likewise.
! 	(vreinterpretq_u32): Likewise.
! 	(vreinterpretq_u64): Likewise.
! 	(vreinterpretq_u8): Likewise.
  
! 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
!             Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/arm/arm_mve.h (vaddq_s8): Define macro.
! 	(vaddq_s16): Likewise.
! 	(vaddq_s32): Likewise.
! 	(vaddq_u8): Likewise.
! 	(vaddq_u16): Likewise.
! 	(vaddq_u32): Likewise.
! 	(vaddq_f16): Likewise.
! 	(vaddq_f32): Likewise.
! 	(__arm_vaddq_s8): Define intrinsic.
! 	(__arm_vaddq_s16): Likewise.
! 	(__arm_vaddq_s32): Likewise.
! 	(__arm_vaddq_u8): Likewise.
! 	(__arm_vaddq_u16): Likewise.
! 	(__arm_vaddq_u32): Likewise.
! 	(__arm_vaddq_f16): Likewise.
! 	(__arm_vaddq_f32): Likewise.
! 	(vaddq): Define polymorphic variant.
! 	* config/arm/iterators.md (VNIM): Define mode iterator for common types
! 	Neon, IWMMXT and MVE.
! 	(VNINOTM): Likewise.
! 	* config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
! 	(mve_vaddq_f<mode>): Define RTL pattern.
! 	* config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
! 	(addv8hf3_neon): Define RTL pattern.
! 	* config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
! 	to support MVE.
! 	(addv8hf3): Define standard RTL pattern for MVE and Neon.
! 	(add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
  
! 2020-03-20  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/94232
! 	* ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
! 	build_ref_for_offset function was used and it transforms off to bytes
! 	from bits.
  
! 2020-03-20  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/94266
! 	* gimple-ssa-sprintf.c (get_origin_and_offset): Use the
! 	type of the underlying object to adjust for the containing
! 	field if available.
  
! 2020-03-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
! 	(VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
! 	* config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
  
! 2020-03-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/mve.md (mve_mov<mode>): Fix R->R case.
  
! 2020-03-20  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/94224
! 	* gimple-ssa-store-merging.c
! 	(imm_store_chain_info::coalesce_immediate): Don't consider overlapping
! 	or adjacent INTEGER_CST rhs_code stores as mergeable if they have
! 	different lp_nr.
  
! 2020-03-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
  
! 2020-03-19  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR ipa/94202
! 	* cgraph.c (cgraph_node::function_symbol): Fix availability computation.
! 	(cgraph_node::function_or_virtual_thunk_symbol): Likewise.
  
! 2020-03-19  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR ipa/92372
! 	* cgraphunit.c (process_function_and_variable_attributes): warn
! 	for flatten attribute on alias.
! 	* ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
  
! 2020-03-19  Martin Liska  <mliska@suse.cz>
  
! 	* lto-section-in.c: Add ext_symtab.
! 	* lto-streamer-out.c (write_symbol_extension_info): New.
! 	(produce_symtab_extension): New.
! 	(produce_asm_for_decls): Stream also produce_symtab_extension.
! 	* lto-streamer.h (enum lto_section_type): New section.
  
! 2020-03-19  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/94211
! 	* tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
! 	instead of estimate_num_insns for bb_seq (middle_bb).  Rename
! 	emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
! 	all uses.
  
! 2020-03-19  Richard Biener  <rguenther@suse.de>
  
! 	PR ipa/94217
! 	* ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
! 	and build_ref_for_offset.
  
! 2020-03-19  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/94216
! 	* fold-const.c (fold_binary_loc): Avoid using
! 	build_fold_addr_expr when we really want an ADDR_EXPR.
  
! 2020-03-18  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	* config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
! 	aliases for "wa".
  
! 2020-03-12  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/90275
! 	* cse.c (cse_insn): Delete no-op register moves too.
  
! 2020-03-18  Martin Sebor  <msebor@redhat.com>
  
! 	PR ipa/92799
! 	* cgraphunit.c (process_function_and_variable_attributes): Also
! 	complain about weakref function definitions and drop all effects
! 	of the attribute.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
! 	(vstrdq_scatter_base_p_u64): Likewise.
! 	(vstrdq_scatter_base_s64): Likewise.
! 	(vstrdq_scatter_base_u64): Likewise.
! 	(vstrdq_scatter_offset_p_s64): Likewise.
! 	(vstrdq_scatter_offset_p_u64): Likewise.
! 	(vstrdq_scatter_offset_s64): Likewise.
! 	(vstrdq_scatter_offset_u64): Likewise.
! 	(vstrdq_scatter_shifted_offset_p_s64): Likewise.
! 	(vstrdq_scatter_shifted_offset_p_u64): Likewise.
! 	(vstrdq_scatter_shifted_offset_s64): Likewise.
! 	(vstrdq_scatter_shifted_offset_u64): Likewise.
! 	(vstrhq_scatter_offset_f16): Likewise.
! 	(vstrhq_scatter_offset_p_f16): Likewise.
! 	(vstrhq_scatter_shifted_offset_f16): Likewise.
! 	(vstrhq_scatter_shifted_offset_p_f16): Likewise.
! 	(vstrwq_scatter_base_f32): Likewise.
! 	(vstrwq_scatter_base_p_f32): Likewise.
! 	(vstrwq_scatter_offset_f32): Likewise.
! 	(vstrwq_scatter_offset_p_f32): Likewise.
! 	(vstrwq_scatter_offset_p_s32): Likewise.
! 	(vstrwq_scatter_offset_p_u32): Likewise.
! 	(vstrwq_scatter_offset_s32): Likewise.
! 	(vstrwq_scatter_offset_u32): Likewise.
! 	(vstrwq_scatter_shifted_offset_f32): Likewise.
! 	(vstrwq_scatter_shifted_offset_p_f32): Likewise.
! 	(vstrwq_scatter_shifted_offset_p_s32): Likewise.
! 	(vstrwq_scatter_shifted_offset_p_u32): Likewise.
! 	(vstrwq_scatter_shifted_offset_s32): Likewise.
! 	(vstrwq_scatter_shifted_offset_u32): Likewise.
! 	(__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
! 	(__arm_vstrdq_scatter_base_p_u64): Likewise.
! 	(__arm_vstrdq_scatter_base_s64): Likewise.
! 	(__arm_vstrdq_scatter_base_u64): Likewise.
! 	(__arm_vstrdq_scatter_offset_p_s64): Likewise.
! 	(__arm_vstrdq_scatter_offset_p_u64): Likewise.
! 	(__arm_vstrdq_scatter_offset_s64): Likewise.
! 	(__arm_vstrdq_scatter_offset_u64): Likewise.
! 	(__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
! 	(__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
! 	(__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
! 	(__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
! 	(__arm_vstrwq_scatter_offset_p_s32): Likewise.
! 	(__arm_vstrwq_scatter_offset_p_u32): Likewise.
! 	(__arm_vstrwq_scatter_offset_s32): Likewise.
! 	(__arm_vstrwq_scatter_offset_u32): Likewise.
! 	(__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
! 	(__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
! 	(__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
! 	(__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
! 	(__arm_vstrhq_scatter_offset_f16): Likewise.
! 	(__arm_vstrhq_scatter_offset_p_f16): Likewise.
! 	(__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
! 	(__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
! 	(__arm_vstrwq_scatter_base_f32): Likewise.
! 	(__arm_vstrwq_scatter_base_p_f32): Likewise.
! 	(__arm_vstrwq_scatter_offset_f32): Likewise.
! 	(__arm_vstrwq_scatter_offset_p_f32): Likewise.
! 	(__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
! 	(__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
! 	(vstrhq_scatter_offset): Define polymorphic variant.
! 	(vstrhq_scatter_offset_p): Likewise.
! 	(vstrhq_scatter_shifted_offset): Likewise.
! 	(vstrhq_scatter_shifted_offset_p): Likewise.
! 	(vstrwq_scatter_base): Likewise.
! 	(vstrwq_scatter_base_p): Likewise.
! 	(vstrwq_scatter_offset): Likewise.
! 	(vstrwq_scatter_offset_p): Likewise.
! 	(vstrwq_scatter_shifted_offset): Likewise.
! 	(vstrwq_scatter_shifted_offset_p): Likewise.
! 	(vstrdq_scatter_base_p): Likewise.
! 	(vstrdq_scatter_base): Likewise.
! 	(vstrdq_scatter_offset_p): Likewise.
! 	(vstrdq_scatter_offset): Likewise.
! 	(vstrdq_scatter_shifted_offset_p): Likewise.
! 	(vstrdq_scatter_shifted_offset): Likewise.
! 	* config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
! 	(STRSBS_P): Likewise.
! 	(STRSBU): Likewise.
! 	(STRSBU_P): Likewise.
! 	(STRSS): Likewise.
! 	(STRSS_P): Likewise.
! 	(STRSU): Likewise.
! 	(STRSU_P): Likewise.
! 	* config/arm/constraints.md (Ri): Define.
! 	* config/arm/mve.md (VSTRDSBQ): Define iterator.
! 	(VSTRDSOQ): Likewise.
! 	(VSTRDSSOQ): Likewise.
! 	(VSTRWSOQ): Likewise.
! 	(VSTRWSSOQ): Likewise.
! 	(mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
! 	(mve_vstrdq_scatter_base_<supf>v2di): Likewise.
! 	(mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
! 	(mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
! 	(mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
! 	(mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
! 	(mve_vstrhq_scatter_offset_fv8hf): Likewise.
! 	(mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
! 	(mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
! 	(mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
! 	(mve_vstrwq_scatter_base_fv4sf): Likewise.
! 	(mve_vstrwq_scatter_base_p_fv4sf): Likewise.
! 	(mve_vstrwq_scatter_offset_fv4sf): Likewise.
! 	(mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
! 	(mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
! 	(mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
! 	(mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
! 	(mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
! 	(mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
! 	(mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
! 	* config/arm/predicates.md (Ri): Define predicate to check immediate
! 	is the range +/-1016 and multiple of 8.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (vst1q_f32): Define macro.
! 	(vst1q_f16): Likewise.
! 	(vst1q_s8): Likewise.
! 	(vst1q_s32): Likewise.
! 	(vst1q_s16): Likewise.
! 	(vst1q_u8): Likewise.
! 	(vst1q_u32): Likewise.
! 	(vst1q_u16): Likewise.
! 	(vstrhq_f16): Likewise.
! 	(vstrhq_scatter_offset_s32): Likewise.
! 	(vstrhq_scatter_offset_s16): Likewise.
! 	(vstrhq_scatter_offset_u32): Likewise.
! 	(vstrhq_scatter_offset_u16): Likewise.
! 	(vstrhq_scatter_offset_p_s32): Likewise.
! 	(vstrhq_scatter_offset_p_s16): Likewise.
! 	(vstrhq_scatter_offset_p_u32): Likewise.
! 	(vstrhq_scatter_offset_p_u16): Likewise.
! 	(vstrhq_scatter_shifted_offset_s32): Likewise.
! 	(vstrhq_scatter_shifted_offset_s16): Likewise.
! 	(vstrhq_scatter_shifted_offset_u32): Likewise.
! 	(vstrhq_scatter_shifted_offset_u16): Likewise.
! 	(vstrhq_scatter_shifted_offset_p_s32): Likewise.
! 	(vstrhq_scatter_shifted_offset_p_s16): Likewise.
! 	(vstrhq_scatter_shifted_offset_p_u32): Likewise.
! 	(vstrhq_scatter_shifted_offset_p_u16): Likewise.
! 	(vstrhq_s32): Likewise.
! 	(vstrhq_s16): Likewise.
! 	(vstrhq_u32): Likewise.
! 	(vstrhq_u16): Likewise.
! 	(vstrhq_p_f16): Likewise.
! 	(vstrhq_p_s32): Likewise.
! 	(vstrhq_p_s16): Likewise.
! 	(vstrhq_p_u32): Likewise.
! 	(vstrhq_p_u16): Likewise.
! 	(vstrwq_f32): Likewise.
! 	(vstrwq_s32): Likewise.
! 	(vstrwq_u32): Likewise.
! 	(vstrwq_p_f32): Likewise.
! 	(vstrwq_p_s32): Likewise.
! 	(vstrwq_p_u32): Likewise.
! 	(__arm_vst1q_s8): Define intrinsic.
! 	(__arm_vst1q_s32): Likewise.
! 	(__arm_vst1q_s16): Likewise.
! 	(__arm_vst1q_u8): Likewise.
! 	(__arm_vst1q_u32): Likewise.
! 	(__arm_vst1q_u16): Likewise.
! 	(__arm_vstrhq_scatter_offset_s32): Likewise.
! 	(__arm_vstrhq_scatter_offset_s16): Likewise.
! 	(__arm_vstrhq_scatter_offset_u32): Likewise.
! 	(__arm_vstrhq_scatter_offset_u16): Likewise.
! 	(__arm_vstrhq_scatter_offset_p_s32): Likewise.
! 	(__arm_vstrhq_scatter_offset_p_s16): Likewise.
! 	(__arm_vstrhq_scatter_offset_p_u32): Likewise.
! 	(__arm_vstrhq_scatter_offset_p_u16): Likewise.
! 	(__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
! 	(__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
! 	(__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
! 	(__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
! 	(__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
! 	(__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
! 	(__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
! 	(__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
! 	(__arm_vstrhq_s32): Likewise.
! 	(__arm_vstrhq_s16): Likewise.
! 	(__arm_vstrhq_u32): Likewise.
! 	(__arm_vstrhq_u16): Likewise.
! 	(__arm_vstrhq_p_s32): Likewise.
! 	(__arm_vstrhq_p_s16): Likewise.
! 	(__arm_vstrhq_p_u32): Likewise.
! 	(__arm_vstrhq_p_u16): Likewise.
! 	(__arm_vstrwq_s32): Likewise.
! 	(__arm_vstrwq_u32): Likewise.
! 	(__arm_vstrwq_p_s32): Likewise.
! 	(__arm_vstrwq_p_u32): Likewise.
! 	(__arm_vstrwq_p_f32): Likewise.
! 	(__arm_vstrwq_f32): Likewise.
! 	(__arm_vst1q_f32): Likewise.
! 	(__arm_vst1q_f16): Likewise.
! 	(__arm_vstrhq_f16): Likewise.
! 	(__arm_vstrhq_p_f16): Likewise.
! 	(vst1q): Define polymorphic variant.
! 	(vstrhq): Likewise.
! 	(vstrhq_p): Likewise.
! 	(vstrhq_scatter_offset_p): Likewise.
! 	(vstrhq_scatter_offset): Likewise.
! 	(vstrhq_scatter_shifted_offset_p): Likewise.
! 	(vstrhq_scatter_shifted_offset): Likewise.
! 	(vstrwq_p): Likewise.
! 	(vstrwq): Likewise.
! 	* config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
! 	(STRS_P): Likewise.
! 	(STRSS): Likewise.
! 	(STRSS_P): Likewise.
! 	(STRSU): Likewise.
! 	(STRSU_P): Likewise.
! 	(STRU): Likewise.
! 	(STRU_P): Likewise.
! 	* config/arm/mve.md (VST1Q): Define iterator.
! 	(VSTRHSOQ): Likewise.
! 	(VSTRHSSOQ): Likewise.
! 	(VSTRHQ): Likewise.
! 	(VSTRWQ): Likewise.
! 	(mve_vstrhq_fv8hf): Define RTL pattern.
! 	(mve_vstrhq_p_fv8hf): Likewise.
! 	(mve_vstrhq_p_<supf><mode>): Likewise.
! 	(mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
! 	(mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
! 	(mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
! 	(mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
! 	(mve_vstrhq_<supf><mode>): Likewise.
! 	(mve_vstrwq_fv4sf): Likewise.
! 	(mve_vstrwq_p_fv4sf): Likewise.
! 	(mve_vstrwq_p_<supf>v4si): Likewise.
! 	(mve_vstrwq_<supf>v4si): Likewise.
! 	(mve_vst1q_f<mode>): Define expand.
! 	(mve_vst1q_<supf><mode>): Likewise.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (vld1q_s8): Define macro.
! 	(vld1q_s32): Likewise.
! 	(vld1q_s16): Likewise.
! 	(vld1q_u8): Likewise.
! 	(vld1q_u32): Likewise.
! 	(vld1q_u16): Likewise.
! 	(vldrhq_gather_offset_s32): Likewise.
! 	(vldrhq_gather_offset_s16): Likewise.
! 	(vldrhq_gather_offset_u32): Likewise.
! 	(vldrhq_gather_offset_u16): Likewise.
! 	(vldrhq_gather_offset_z_s32): Likewise.
! 	(vldrhq_gather_offset_z_s16): Likewise.
! 	(vldrhq_gather_offset_z_u32): Likewise.
! 	(vldrhq_gather_offset_z_u16): Likewise.
! 	(vldrhq_gather_shifted_offset_s32): Likewise.
! 	(vldrhq_gather_shifted_offset_s16): Likewise.
! 	(vldrhq_gather_shifted_offset_u32): Likewise.
! 	(vldrhq_gather_shifted_offset_u16): Likewise.
! 	(vldrhq_gather_shifted_offset_z_s32): Likewise.
! 	(vldrhq_gather_shifted_offset_z_s16): Likewise.
! 	(vldrhq_gather_shifted_offset_z_u32): Likewise.
! 	(vldrhq_gather_shifted_offset_z_u16): Likewise.
! 	(vldrhq_s32): Likewise.
! 	(vldrhq_s16): Likewise.
! 	(vldrhq_u32): Likewise.
! 	(vldrhq_u16): Likewise.
! 	(vldrhq_z_s32): Likewise.
! 	(vldrhq_z_s16): Likewise.
! 	(vldrhq_z_u32): Likewise.
! 	(vldrhq_z_u16): Likewise.
! 	(vldrwq_s32): Likewise.
! 	(vldrwq_u32): Likewise.
! 	(vldrwq_z_s32): Likewise.
! 	(vldrwq_z_u32): Likewise.
! 	(vld1q_f32): Likewise.
! 	(vld1q_f16): Likewise.
! 	(vldrhq_f16): Likewise.
! 	(vldrhq_z_f16): Likewise.
! 	(vldrwq_f32): Likewise.
! 	(vldrwq_z_f32): Likewise.
! 	(__arm_vld1q_s8): Define intrinsic.
! 	(__arm_vld1q_s32): Likewise.
! 	(__arm_vld1q_s16): Likewise.
! 	(__arm_vld1q_u8): Likewise.
! 	(__arm_vld1q_u32): Likewise.
! 	(__arm_vld1q_u16): Likewise.
! 	(__arm_vldrhq_gather_offset_s32): Likewise.
! 	(__arm_vldrhq_gather_offset_s16): Likewise.
! 	(__arm_vldrhq_gather_offset_u32): Likewise.
! 	(__arm_vldrhq_gather_offset_u16): Likewise.
! 	(__arm_vldrhq_gather_offset_z_s32): Likewise.
! 	(__arm_vldrhq_gather_offset_z_s16): Likewise.
! 	(__arm_vldrhq_gather_offset_z_u32): Likewise.
! 	(__arm_vldrhq_gather_offset_z_u16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_s32): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_s16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_u32): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_u16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
! 	(__arm_vldrhq_s32): Likewise.
! 	(__arm_vldrhq_s16): Likewise.
! 	(__arm_vldrhq_u32): Likewise.
! 	(__arm_vldrhq_u16): Likewise.
! 	(__arm_vldrhq_z_s32): Likewise.
! 	(__arm_vldrhq_z_s16): Likewise.
! 	(__arm_vldrhq_z_u32): Likewise.
! 	(__arm_vldrhq_z_u16): Likewise.
! 	(__arm_vldrwq_s32): Likewise.
! 	(__arm_vldrwq_u32): Likewise.
! 	(__arm_vldrwq_z_s32): Likewise.
! 	(__arm_vldrwq_z_u32): Likewise.
! 	(__arm_vld1q_f32): Likewise.
! 	(__arm_vld1q_f16): Likewise.
! 	(__arm_vldrwq_f32): Likewise.
! 	(__arm_vldrwq_z_f32): Likewise.
! 	(__arm_vldrhq_z_f16): Likewise.
! 	(__arm_vldrhq_f16): Likewise.
! 	(vld1q): Define polymorphic variant.
! 	(vldrhq_gather_offset): Likewise.
! 	(vldrhq_gather_offset_z): Likewise.
! 	(vldrhq_gather_shifted_offset): Likewise.
! 	(vldrhq_gather_shifted_offset_z): Likewise.
! 	* config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
! 	(LDRS): Likewise.
! 	(LDRU_Z): Likewise.
! 	(LDRS_Z): Likewise.
! 	(LDRGU_Z): Likewise.
! 	(LDRGU): Likewise.
! 	(LDRGS_Z): Likewise.
! 	(LDRGS): Likewise.
! 	* config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
! 	(V_sz_elem1): Likewise.
! 	(VLD1Q): Define iterator.
! 	(VLDRHGOQ): Likewise.
! 	(VLDRHGSOQ): Likewise.
! 	(VLDRHQ): Likewise.
! 	(VLDRWQ): Likewise.
! 	(mve_vldrhq_fv8hf): Define RTL pattern.
! 	(mve_vldrhq_gather_offset_<supf><mode>): Likewise.
! 	(mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
! 	(mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
! 	(mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
! 	(mve_vldrhq_<supf><mode>): Likewise.
! 	(mve_vldrhq_z_fv8hf): Likewise.
! 	(mve_vldrhq_z_<supf><mode>): Likewise.
! 	(mve_vldrwq_fv4sf): Likewise.
! 	(mve_vldrwq_<supf>v4si): Likewise.
! 	(mve_vldrwq_z_fv4sf): Likewise.
! 	(mve_vldrwq_z_<supf>v4si): Likewise.
! 	(mve_vld1q_f<mode>): Define RTL expand pattern.
! 	(mve_vld1q_<supf><mode>): Likewise.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (vld1q_s8): Define macro.
! 	(vld1q_s32): Likewise.
! 	(vld1q_s16): Likewise.
! 	(vld1q_u8): Likewise.
! 	(vld1q_u32): Likewise.
! 	(vld1q_u16): Likewise.
! 	(vldrhq_gather_offset_s32): Likewise.
! 	(vldrhq_gather_offset_s16): Likewise.
! 	(vldrhq_gather_offset_u32): Likewise.
! 	(vldrhq_gather_offset_u16): Likewise.
! 	(vldrhq_gather_offset_z_s32): Likewise.
! 	(vldrhq_gather_offset_z_s16): Likewise.
! 	(vldrhq_gather_offset_z_u32): Likewise.
! 	(vldrhq_gather_offset_z_u16): Likewise.
! 	(vldrhq_gather_shifted_offset_s32): Likewise.
! 	(vldrhq_gather_shifted_offset_s16): Likewise.
! 	(vldrhq_gather_shifted_offset_u32): Likewise.
! 	(vldrhq_gather_shifted_offset_u16): Likewise.
! 	(vldrhq_gather_shifted_offset_z_s32): Likewise.
! 	(vldrhq_gather_shifted_offset_z_s16): Likewise.
! 	(vldrhq_gather_shifted_offset_z_u32): Likewise.
! 	(vldrhq_gather_shifted_offset_z_u16): Likewise.
! 	(vldrhq_s32): Likewise.
! 	(vldrhq_s16): Likewise.
! 	(vldrhq_u32): Likewise.
! 	(vldrhq_u16): Likewise.
! 	(vldrhq_z_s32): Likewise.
! 	(vldrhq_z_s16): Likewise.
! 	(vldrhq_z_u32): Likewise.
! 	(vldrhq_z_u16): Likewise.
! 	(vldrwq_s32): Likewise.
! 	(vldrwq_u32): Likewise.
! 	(vldrwq_z_s32): Likewise.
! 	(vldrwq_z_u32): Likewise.
! 	(vld1q_f32): Likewise.
! 	(vld1q_f16): Likewise.
! 	(vldrhq_f16): Likewise.
! 	(vldrhq_z_f16): Likewise.
! 	(vldrwq_f32): Likewise.
! 	(vldrwq_z_f32): Likewise.
! 	(__arm_vld1q_s8): Define intrinsic.
! 	(__arm_vld1q_s32): Likewise.
! 	(__arm_vld1q_s16): Likewise.
! 	(__arm_vld1q_u8): Likewise.
! 	(__arm_vld1q_u32): Likewise.
! 	(__arm_vld1q_u16): Likewise.
! 	(__arm_vldrhq_gather_offset_s32): Likewise.
! 	(__arm_vldrhq_gather_offset_s16): Likewise.
! 	(__arm_vldrhq_gather_offset_u32): Likewise.
! 	(__arm_vldrhq_gather_offset_u16): Likewise.
! 	(__arm_vldrhq_gather_offset_z_s32): Likewise.
! 	(__arm_vldrhq_gather_offset_z_s16): Likewise.
! 	(__arm_vldrhq_gather_offset_z_u32): Likewise.
! 	(__arm_vldrhq_gather_offset_z_u16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_s32): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_s16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_u32): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_u16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
! 	(__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
! 	(__arm_vldrhq_s32): Likewise.
! 	(__arm_vldrhq_s16): Likewise.
! 	(__arm_vldrhq_u32): Likewise.
! 	(__arm_vldrhq_u16): Likewise.
! 	(__arm_vldrhq_z_s32): Likewise.
! 	(__arm_vldrhq_z_s16): Likewise.
! 	(__arm_vldrhq_z_u32): Likewise.
! 	(__arm_vldrhq_z_u16): Likewise.
! 	(__arm_vldrwq_s32): Likewise.
! 	(__arm_vldrwq_u32): Likewise.
! 	(__arm_vldrwq_z_s32): Likewise.
! 	(__arm_vldrwq_z_u32): Likewise.
! 	(__arm_vld1q_f32): Likewise.
! 	(__arm_vld1q_f16): Likewise.
! 	(__arm_vldrwq_f32): Likewise.
! 	(__arm_vldrwq_z_f32): Likewise.
! 	(__arm_vldrhq_z_f16): Likewise.
! 	(__arm_vldrhq_f16): Likewise.
! 	(vld1q): Define polymorphic variant.
! 	(vldrhq_gather_offset): Likewise.
! 	(vldrhq_gather_offset_z): Likewise.
! 	(vldrhq_gather_shifted_offset): Likewise.
! 	(vldrhq_gather_shifted_offset_z): Likewise.
! 	* config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
! 	(LDRS): Likewise.
! 	(LDRU_Z): Likewise.
! 	(LDRS_Z): Likewise.
! 	(LDRGU_Z): Likewise.
! 	(LDRGU): Likewise.
! 	(LDRGS_Z): Likewise.
! 	(LDRGS): Likewise.
! 	* config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
! 	(V_sz_elem1): Likewise.
! 	(VLD1Q): Define iterator.
! 	(VLDRHGOQ): Likewise.
! 	(VLDRHGSOQ): Likewise.
! 	(VLDRHQ): Likewise.
! 	(VLDRWQ): Likewise.
! 	(mve_vldrhq_fv8hf): Define RTL pattern.
! 	(mve_vldrhq_gather_offset_<supf><mode>): Likewise.
! 	(mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
! 	(mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
! 	(mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
! 	(mve_vldrhq_<supf><mode>): Likewise.
! 	(mve_vldrhq_z_fv8hf): Likewise.
! 	(mve_vldrhq_z_<supf><mode>): Likewise.
! 	(mve_vldrwq_fv4sf): Likewise.
! 	(mve_vldrwq_<supf>v4si): Likewise.
! 	(mve_vldrwq_z_fv4sf): Likewise.
! 	(mve_vldrwq_z_<supf>v4si): Likewise.
! 	(mve_vld1q_f<mode>): Define RTL expand pattern.
! 	(mve_vld1q_<supf><mode>): Likewise.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
! 	qualifier.
! 	(LDRGBU_Z_QUALIFIERS): Likewise.
! 	(LDRGS_Z_QUALIFIERS): Likewise.
! 	(LDRGU_Z_QUALIFIERS): Likewise.
! 	(LDRS_Z_QUALIFIERS): Likewise.
! 	(LDRU_Z_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
! 	(vldrbq_gather_offset_z_u8): Likewise.
! 	(vldrbq_gather_offset_z_s32): Likewise.
! 	(vldrbq_gather_offset_z_u16): Likewise.
! 	(vldrbq_gather_offset_z_u32): Likewise.
! 	(vldrbq_gather_offset_z_s8): Likewise.
! 	(vldrbq_z_s16): Likewise.
! 	(vldrbq_z_u8): Likewise.
! 	(vldrbq_z_s8): Likewise.
! 	(vldrbq_z_s32): Likewise.
! 	(vldrbq_z_u16): Likewise.
! 	(vldrbq_z_u32): Likewise.
! 	(vldrwq_gather_base_z_u32): Likewise.
! 	(vldrwq_gather_base_z_s32): Likewise.
! 	(__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
! 	(__arm_vldrbq_gather_offset_z_s32): Likewise.
! 	(__arm_vldrbq_gather_offset_z_s16): Likewise.
! 	(__arm_vldrbq_gather_offset_z_u8): Likewise.
! 	(__arm_vldrbq_gather_offset_z_u32): Likewise.
! 	(__arm_vldrbq_gather_offset_z_u16): Likewise.
! 	(__arm_vldrbq_z_s8): Likewise.
! 	(__arm_vldrbq_z_s32): Likewise.
! 	(__arm_vldrbq_z_s16): Likewise.
! 	(__arm_vldrbq_z_u8): Likewise.
! 	(__arm_vldrbq_z_u32): Likewise.
! 	(__arm_vldrbq_z_u16): Likewise.
! 	(__arm_vldrwq_gather_base_z_s32): Likewise.
! 	(__arm_vldrwq_gather_base_z_u32): Likewise.
! 	(vldrbq_gather_offset_z): Define polymorphic variant.
! 	* config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
! 	qualifier.
! 	(LDRGBU_Z_QUALIFIERS): Likewise.
! 	(LDRGS_Z_QUALIFIERS): Likewise.
! 	(LDRGU_Z_QUALIFIERS): Likewise.
! 	(LDRS_Z_QUALIFIERS): Likewise.
! 	(LDRU_Z_QUALIFIERS): Likewise.
! 	* config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
! 	RTL pattern.
! 	(mve_vldrbq_z_<supf><mode>): Likewise.
! 	(mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
! 	qualifier.
! 	(STRU_P_QUALIFIERS): Likewise.
! 	(STRSU_P_QUALIFIERS): Likewise.
! 	(STRSS_P_QUALIFIERS): Likewise.
! 	(STRSBS_P_QUALIFIERS): Likewise.
! 	(STRSBU_P_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
! 	(vstrbq_p_s32): Likewise.
! 	(vstrbq_p_s16): Likewise.
! 	(vstrbq_p_u8): Likewise.
! 	(vstrbq_p_u32): Likewise.
! 	(vstrbq_p_u16): Likewise.
! 	(vstrbq_scatter_offset_p_s8): Likewise.
! 	(vstrbq_scatter_offset_p_s32): Likewise.
! 	(vstrbq_scatter_offset_p_s16): Likewise.
! 	(vstrbq_scatter_offset_p_u8): Likewise.
! 	(vstrbq_scatter_offset_p_u32): Likewise.
! 	(vstrbq_scatter_offset_p_u16): Likewise.
! 	(vstrwq_scatter_base_p_s32): Likewise.
! 	(vstrwq_scatter_base_p_u32): Likewise.
! 	(__arm_vstrbq_p_s8): Define intrinsic.
! 	(__arm_vstrbq_p_s32): Likewise.
! 	(__arm_vstrbq_p_s16): Likewise.
! 	(__arm_vstrbq_p_u8): Likewise.
! 	(__arm_vstrbq_p_u32): Likewise.
! 	(__arm_vstrbq_p_u16): Likewise.
! 	(__arm_vstrbq_scatter_offset_p_s8): Likewise.
! 	(__arm_vstrbq_scatter_offset_p_s32): Likewise.
! 	(__arm_vstrbq_scatter_offset_p_s16): Likewise.
! 	(__arm_vstrbq_scatter_offset_p_u8): Likewise.
! 	(__arm_vstrbq_scatter_offset_p_u32): Likewise.
! 	(__arm_vstrbq_scatter_offset_p_u16): Likewise.
! 	(__arm_vstrwq_scatter_base_p_s32): Likewise.
! 	(__arm_vstrwq_scatter_base_p_u32): Likewise.
! 	(vstrbq_p): Define polymorphic variant.
! 	(vstrbq_scatter_offset_p): Likewise.
! 	(vstrwq_scatter_base_p): Likewise.
! 	* config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
! 	qualifier.
! 	(STRU_P_QUALIFIERS): Likewise.
! 	(STRSU_P_QUALIFIERS): Likewise.
! 	(STRSS_P_QUALIFIERS): Likewise.
! 	(STRSBS_P_QUALIFIERS): Likewise.
! 	(STRSBU_P_QUALIFIERS): Likewise.
! 	* config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
! 	RTL pattern.
! 	(mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
! 	(mve_vstrbq_p_<supf><mode>): Likewise.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
! 	qualifier.
! 	(LDRGS_QUALIFIERS): Likewise.
! 	(LDRS_QUALIFIERS): Likewise.
! 	(LDRU_QUALIFIERS): Likewise.
! 	(LDRGBS_QUALIFIERS): Likewise.
! 	(LDRGBU_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
! 	(vldrbq_gather_offset_s8): Likewise.
! 	(vldrbq_s8): Likewise.
! 	(vldrbq_u8): Likewise.
! 	(vldrbq_gather_offset_u16): Likewise.
! 	(vldrbq_gather_offset_s16): Likewise.
! 	(vldrbq_s16): Likewise.
! 	(vldrbq_u16): Likewise.
! 	(vldrbq_gather_offset_u32): Likewise.
! 	(vldrbq_gather_offset_s32): Likewise.
! 	(vldrbq_s32): Likewise.
! 	(vldrbq_u32): Likewise.
! 	(vldrwq_gather_base_s32): Likewise.
! 	(vldrwq_gather_base_u32): Likewise.
! 	(__arm_vldrbq_gather_offset_u8): Define intrinsic.
! 	(__arm_vldrbq_gather_offset_s8): Likewise.
! 	(__arm_vldrbq_s8): Likewise.
! 	(__arm_vldrbq_u8): Likewise.
! 	(__arm_vldrbq_gather_offset_u16): Likewise.
! 	(__arm_vldrbq_gather_offset_s16): Likewise.
! 	(__arm_vldrbq_s16): Likewise.
! 	(__arm_vldrbq_u16): Likewise.
! 	(__arm_vldrbq_gather_offset_u32): Likewise.
! 	(__arm_vldrbq_gather_offset_s32): Likewise.
! 	(__arm_vldrbq_s32): Likewise.
! 	(__arm_vldrbq_u32): Likewise.
! 	(__arm_vldrwq_gather_base_s32): Likewise.
! 	(__arm_vldrwq_gather_base_u32): Likewise.
! 	(vldrbq_gather_offset): Define polymorphic variant.
! 	* config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
! 	qualifier.
! 	(LDRGS_QUALIFIERS): Likewise.
! 	(LDRS_QUALIFIERS): Likewise.
! 	(LDRU_QUALIFIERS): Likewise.
! 	(LDRGBS_QUALIFIERS): Likewise.
! 	(LDRGBU_QUALIFIERS): Likewise.
! 	* config/arm/mve.md (VLDRBGOQ): Define iterator.
! 	(VLDRBQ): Likewise. 
! 	(VLDRWGBQ): Likewise.
! 	(mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
! 	(mve_vldrbq_<supf><mode>): Likewise.
! 	(mve_vldrwq_gather_base_<supf>v4si): Likewise.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
! 	(STRU_QUALIFIERS): Likewise.
! 	(STRSS_QUALIFIERS): Likewise.
! 	(STRSU_QUALIFIERS): Likewise.
! 	(STRSBS_QUALIFIERS): Likewise.
! 	(STRSBU_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (vstrbq_s8): Define macro.
! 	(vstrbq_u8): Likewise.
! 	(vstrbq_u16): Likewise.
! 	(vstrbq_scatter_offset_s8): Likewise.
! 	(vstrbq_scatter_offset_u8): Likewise.
! 	(vstrbq_scatter_offset_u16): Likewise.
! 	(vstrbq_s16): Likewise.
! 	(vstrbq_u32): Likewise.
! 	(vstrbq_scatter_offset_s16): Likewise.
! 	(vstrbq_scatter_offset_u32): Likewise.
! 	(vstrbq_s32): Likewise.
! 	(vstrbq_scatter_offset_s32): Likewise.
! 	(vstrwq_scatter_base_s32): Likewise.
! 	(vstrwq_scatter_base_u32): Likewise.
! 	(__arm_vstrbq_scatter_offset_s8): Define intrinsic.
! 	(__arm_vstrbq_scatter_offset_s32): Likewise.
! 	(__arm_vstrbq_scatter_offset_s16): Likewise.
! 	(__arm_vstrbq_scatter_offset_u8): Likewise.
! 	(__arm_vstrbq_scatter_offset_u32): Likewise.
! 	(__arm_vstrbq_scatter_offset_u16): Likewise.
! 	(__arm_vstrbq_s8): Likewise.
! 	(__arm_vstrbq_s32): Likewise.
! 	(__arm_vstrbq_s16): Likewise.
! 	(__arm_vstrbq_u8): Likewise.
! 	(__arm_vstrbq_u32): Likewise.
! 	(__arm_vstrbq_u16): Likewise.
! 	(__arm_vstrwq_scatter_base_s32): Likewise.
! 	(__arm_vstrwq_scatter_base_u32): Likewise.
! 	(vstrbq): Define polymorphic variant.
! 	(vstrbq_scatter_offset): Likewise.
! 	(vstrwq_scatter_base): Likewise.
! 	* config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
! 	qualifier.
! 	(STRU_QUALIFIERS): Likewise.
! 	(STRSS_QUALIFIERS): Likewise.
! 	(STRSU_QUALIFIERS): Likewise.
! 	(STRSBS_QUALIFIERS): Likewise.
! 	(STRSBU_QUALIFIERS): Likewise.
! 	* config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
! 	(VSTRWSBQ): Define iterators.
! 	(VSTRBSOQ): Likewise. 
! 	(VSTRBQ): Likewise.
! 	(mve_vstrbq_<supf><mode>): Define RTL pattern.
! 	(mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
! 	(mve_vstrwq_scatter_base_<supf>v4si): Likewise.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (vabdq_m_f32): Define macro.
! 	(vabdq_m_f16): Likewise.
! 	(vaddq_m_f32): Likewise.
! 	(vaddq_m_f16): Likewise.
! 	(vaddq_m_n_f32): Likewise.
! 	(vaddq_m_n_f16): Likewise.
! 	(vandq_m_f32): Likewise.
! 	(vandq_m_f16): Likewise.
! 	(vbicq_m_f32): Likewise.
! 	(vbicq_m_f16): Likewise.
! 	(vbrsrq_m_n_f32): Likewise.
! 	(vbrsrq_m_n_f16): Likewise.
! 	(vcaddq_rot270_m_f32): Likewise.
! 	(vcaddq_rot270_m_f16): Likewise.
! 	(vcaddq_rot90_m_f32): Likewise.
! 	(vcaddq_rot90_m_f16): Likewise.
! 	(vcmlaq_m_f32): Likewise.
! 	(vcmlaq_m_f16): Likewise.
! 	(vcmlaq_rot180_m_f32): Likewise.
! 	(vcmlaq_rot180_m_f16): Likewise.
! 	(vcmlaq_rot270_m_f32): Likewise.
! 	(vcmlaq_rot270_m_f16): Likewise.
! 	(vcmlaq_rot90_m_f32): Likewise.
! 	(vcmlaq_rot90_m_f16): Likewise.
! 	(vcmulq_m_f32): Likewise.
! 	(vcmulq_m_f16): Likewise.
! 	(vcmulq_rot180_m_f32): Likewise.
! 	(vcmulq_rot180_m_f16): Likewise.
! 	(vcmulq_rot270_m_f32): Likewise.
! 	(vcmulq_rot270_m_f16): Likewise.
! 	(vcmulq_rot90_m_f32): Likewise.
! 	(vcmulq_rot90_m_f16): Likewise.
! 	(vcvtq_m_n_s32_f32): Likewise.
! 	(vcvtq_m_n_s16_f16): Likewise.
! 	(vcvtq_m_n_u32_f32): Likewise.
! 	(vcvtq_m_n_u16_f16): Likewise.
! 	(veorq_m_f32): Likewise.
! 	(veorq_m_f16): Likewise.
! 	(vfmaq_m_f32): Likewise.
! 	(vfmaq_m_f16): Likewise.
! 	(vfmaq_m_n_f32): Likewise.
! 	(vfmaq_m_n_f16): Likewise.
! 	(vfmasq_m_n_f32): Likewise.
! 	(vfmasq_m_n_f16): Likewise.
! 	(vfmsq_m_f32): Likewise.
! 	(vfmsq_m_f16): Likewise.
! 	(vmaxnmq_m_f32): Likewise.
! 	(vmaxnmq_m_f16): Likewise.
! 	(vminnmq_m_f32): Likewise.
! 	(vminnmq_m_f16): Likewise.
! 	(vmulq_m_f32): Likewise.
! 	(vmulq_m_f16): Likewise.
! 	(vmulq_m_n_f32): Likewise.
! 	(vmulq_m_n_f16): Likewise.
! 	(vornq_m_f32): Likewise.
! 	(vornq_m_f16): Likewise.
! 	(vorrq_m_f32): Likewise.
! 	(vorrq_m_f16): Likewise.
! 	(vsubq_m_f32): Likewise.
! 	(vsubq_m_f16): Likewise.
! 	(vsubq_m_n_f32): Likewise.
! 	(vsubq_m_n_f16): Likewise.
! 	(__attribute__): Likewise.
! 	(__arm_vabdq_m_f32): Likewise.
! 	(__arm_vabdq_m_f16): Likewise.
! 	(__arm_vaddq_m_f32): Likewise.
! 	(__arm_vaddq_m_f16): Likewise.
! 	(__arm_vaddq_m_n_f32): Likewise.
! 	(__arm_vaddq_m_n_f16): Likewise.
! 	(__arm_vandq_m_f32): Likewise.
! 	(__arm_vandq_m_f16): Likewise.
! 	(__arm_vbicq_m_f32): Likewise.
! 	(__arm_vbicq_m_f16): Likewise.
! 	(__arm_vbrsrq_m_n_f32): Likewise.
! 	(__arm_vbrsrq_m_n_f16): Likewise.
! 	(__arm_vcaddq_rot270_m_f32): Likewise.
! 	(__arm_vcaddq_rot270_m_f16): Likewise.
! 	(__arm_vcaddq_rot90_m_f32): Likewise.
! 	(__arm_vcaddq_rot90_m_f16): Likewise.
! 	(__arm_vcmlaq_m_f32): Likewise.
! 	(__arm_vcmlaq_m_f16): Likewise.
! 	(__arm_vcmlaq_rot180_m_f32): Likewise.
! 	(__arm_vcmlaq_rot180_m_f16): Likewise.
! 	(__arm_vcmlaq_rot270_m_f32): Likewise.
! 	(__arm_vcmlaq_rot270_m_f16): Likewise.
! 	(__arm_vcmlaq_rot90_m_f32): Likewise.
! 	(__arm_vcmlaq_rot90_m_f16): Likewise.
! 	(__arm_vcmulq_m_f32): Likewise.
! 	(__arm_vcmulq_m_f16): Likewise.
! 	(__arm_vcmulq_rot180_m_f32): Define intrinsic.
! 	(__arm_vcmulq_rot180_m_f16): Likewise.
! 	(__arm_vcmulq_rot270_m_f32): Likewise.
! 	(__arm_vcmulq_rot270_m_f16): Likewise.
! 	(__arm_vcmulq_rot90_m_f32): Likewise.
! 	(__arm_vcmulq_rot90_m_f16): Likewise.
! 	(__arm_vcvtq_m_n_s32_f32): Likewise.
! 	(__arm_vcvtq_m_n_s16_f16): Likewise.
! 	(__arm_vcvtq_m_n_u32_f32): Likewise.
! 	(__arm_vcvtq_m_n_u16_f16): Likewise.
! 	(__arm_veorq_m_f32): Likewise.
! 	(__arm_veorq_m_f16): Likewise.
! 	(__arm_vfmaq_m_f32): Likewise.
! 	(__arm_vfmaq_m_f16): Likewise.
! 	(__arm_vfmaq_m_n_f32): Likewise.
! 	(__arm_vfmaq_m_n_f16): Likewise.
! 	(__arm_vfmasq_m_n_f32): Likewise.
! 	(__arm_vfmasq_m_n_f16): Likewise.
! 	(__arm_vfmsq_m_f32): Likewise.
! 	(__arm_vfmsq_m_f16): Likewise.
! 	(__arm_vmaxnmq_m_f32): Likewise.
! 	(__arm_vmaxnmq_m_f16): Likewise.
! 	(__arm_vminnmq_m_f32): Likewise.
! 	(__arm_vminnmq_m_f16): Likewise.
! 	(__arm_vmulq_m_f32): Likewise.
! 	(__arm_vmulq_m_f16): Likewise.
! 	(__arm_vmulq_m_n_f32): Likewise.
! 	(__arm_vmulq_m_n_f16): Likewise.
! 	(__arm_vornq_m_f32): Likewise.
! 	(__arm_vornq_m_f16): Likewise.
! 	(__arm_vorrq_m_f32): Likewise.
! 	(__arm_vorrq_m_f16): Likewise.
! 	(__arm_vsubq_m_f32): Likewise.
! 	(__arm_vsubq_m_f16): Likewise.
! 	(__arm_vsubq_m_n_f32): Likewise.
! 	(__arm_vsubq_m_n_f16): Likewise.
! 	(vabdq_m): Define polymorphic variant.
! 	(vaddq_m): Likewise.
! 	(vaddq_m_n): Likewise.
! 	(vandq_m): Likewise.
! 	(vbicq_m): Likewise.
! 	(vbrsrq_m_n): Likewise.
! 	(vcaddq_rot270_m): Likewise.
! 	(vcaddq_rot90_m): Likewise.
! 	(vcmlaq_m): Likewise.
! 	(vcmlaq_rot180_m): Likewise.
! 	(vcmlaq_rot270_m): Likewise.
! 	(vcmlaq_rot90_m): Likewise.
! 	(vcmulq_m): Likewise.
! 	(vcmulq_rot180_m): Likewise.
! 	(vcmulq_rot270_m): Likewise.
! 	(vcmulq_rot90_m): Likewise.
! 	(veorq_m): Likewise.
! 	(vfmaq_m): Likewise.
! 	(vfmaq_m_n): Likewise.
! 	(vfmasq_m_n): Likewise.
! 	(vfmsq_m): Likewise.
! 	(vmaxnmq_m): Likewise.
! 	(vminnmq_m): Likewise.
! 	(vmulq_m): Likewise.
! 	(vmulq_m_n): Likewise.
! 	(vornq_m): Likewise.
! 	(vsubq_m): Likewise.
! 	(vsubq_m_n): Likewise.
! 	(vorrq_m): Likewise.
! 	* config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
! 	builtin qualifier.
! 	(QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
! 	(QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
! 	* config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
! 	(mve_vaddq_m_f<mode>): Likewise.
! 	(mve_vaddq_m_n_f<mode>): Likewise.
! 	(mve_vandq_m_f<mode>): Likewise.
! 	(mve_vbicq_m_f<mode>): Likewise.
! 	(mve_vbrsrq_m_n_f<mode>): Likewise.
! 	(mve_vcaddq_rot270_m_f<mode>): Likewise.
! 	(mve_vcaddq_rot90_m_f<mode>): Likewise.
! 	(mve_vcmlaq_m_f<mode>): Likewise.
! 	(mve_vcmlaq_rot180_m_f<mode>): Likewise.
! 	(mve_vcmlaq_rot270_m_f<mode>): Likewise.
! 	(mve_vcmlaq_rot90_m_f<mode>): Likewise.
! 	(mve_vcmulq_m_f<mode>): Likewise.
! 	(mve_vcmulq_rot180_m_f<mode>): Likewise.
! 	(mve_vcmulq_rot270_m_f<mode>): Likewise.
! 	(mve_vcmulq_rot90_m_f<mode>): Likewise.
! 	(mve_veorq_m_f<mode>): Likewise.
! 	(mve_vfmaq_m_f<mode>): Likewise.
! 	(mve_vfmaq_m_n_f<mode>): Likewise.
! 	(mve_vfmasq_m_n_f<mode>): Likewise.
! 	(mve_vfmsq_m_f<mode>): Likewise.
! 	(mve_vmaxnmq_m_f<mode>): Likewise.
! 	(mve_vminnmq_m_f<mode>): Likewise.
! 	(mve_vmulq_m_f<mode>): Likewise.
! 	(mve_vmulq_m_n_f<mode>): Likewise.
! 	(mve_vornq_m_f<mode>): Likewise.
! 	(mve_vorrq_m_f<mode>): Likewise.
! 	(mve_vsubq_m_f<mode>): Likewise.
! 	(mve_vsubq_m_n_f<mode>): Likewise.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-protos.h (arm_mve_immediate_check): 
! 	* config/arm/arm.c (arm_mve_immediate_check): Define fuction to	check
! 	mode and interger value.
! 	* config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
! 	(vmlaldavaq_p_s16): Likewise.
! 	(vmlaldavaq_p_u32): Likewise.
! 	(vmlaldavaq_p_u16): Likewise.
! 	(vmlaldavaxq_p_s32): Likewise.
! 	(vmlaldavaxq_p_s16): Likewise.
! 	(vmlaldavaxq_p_u32): Likewise.
! 	(vmlaldavaxq_p_u16): Likewise.
! 	(vmlsldavaq_p_s32): Likewise.
! 	(vmlsldavaq_p_s16): Likewise.
! 	(vmlsldavaxq_p_s32): Likewise.
! 	(vmlsldavaxq_p_s16): Likewise.
! 	(vmullbq_poly_m_p8): Likewise.
! 	(vmullbq_poly_m_p16): Likewise.
! 	(vmulltq_poly_m_p8): Likewise.
! 	(vmulltq_poly_m_p16): Likewise.
! 	(vqdmullbq_m_n_s32): Likewise.
! 	(vqdmullbq_m_n_s16): Likewise.
! 	(vqdmullbq_m_s32): Likewise.
! 	(vqdmullbq_m_s16): Likewise.
! 	(vqdmulltq_m_n_s32): Likewise.
! 	(vqdmulltq_m_n_s16): Likewise.
! 	(vqdmulltq_m_s32): Likewise.
! 	(vqdmulltq_m_s16): Likewise.
! 	(vqrshrnbq_m_n_s32): Likewise.
! 	(vqrshrnbq_m_n_s16): Likewise.
! 	(vqrshrnbq_m_n_u32): Likewise.
! 	(vqrshrnbq_m_n_u16): Likewise.
! 	(vqrshrntq_m_n_s32): Likewise.
! 	(vqrshrntq_m_n_s16): Likewise.
! 	(vqrshrntq_m_n_u32): Likewise.
! 	(vqrshrntq_m_n_u16): Likewise.
! 	(vqrshrunbq_m_n_s32): Likewise.
! 	(vqrshrunbq_m_n_s16): Likewise.
! 	(vqrshruntq_m_n_s32): Likewise.
! 	(vqrshruntq_m_n_s16): Likewise.
! 	(vqshrnbq_m_n_s32): Likewise.
! 	(vqshrnbq_m_n_s16): Likewise.
! 	(vqshrnbq_m_n_u32): Likewise.
! 	(vqshrnbq_m_n_u16): Likewise.
! 	(vqshrntq_m_n_s32): Likewise.
! 	(vqshrntq_m_n_s16): Likewise.
! 	(vqshrntq_m_n_u32): Likewise.
! 	(vqshrntq_m_n_u16): Likewise.
! 	(vqshrunbq_m_n_s32): Likewise.
! 	(vqshrunbq_m_n_s16): Likewise.
! 	(vqshruntq_m_n_s32): Likewise.
! 	(vqshruntq_m_n_s16): Likewise.
! 	(vrmlaldavhaq_p_s32): Likewise.
! 	(vrmlaldavhaq_p_u32): Likewise.
! 	(vrmlaldavhaxq_p_s32): Likewise.
! 	(vrmlsldavhaq_p_s32): Likewise.
! 	(vrmlsldavhaxq_p_s32): Likewise.
! 	(vrshrnbq_m_n_s32): Likewise.
! 	(vrshrnbq_m_n_s16): Likewise.
! 	(vrshrnbq_m_n_u32): Likewise.
! 	(vrshrnbq_m_n_u16): Likewise.
! 	(vrshrntq_m_n_s32): Likewise.
! 	(vrshrntq_m_n_s16): Likewise.
! 	(vrshrntq_m_n_u32): Likewise.
! 	(vrshrntq_m_n_u16): Likewise.
! 	(vshllbq_m_n_s8): Likewise.
! 	(vshllbq_m_n_s16): Likewise.
! 	(vshllbq_m_n_u8): Likewise.
! 	(vshllbq_m_n_u16): Likewise.
! 	(vshlltq_m_n_s8): Likewise.
! 	(vshlltq_m_n_s16): Likewise.
! 	(vshlltq_m_n_u8): Likewise.
! 	(vshlltq_m_n_u16): Likewise.
! 	(vshrnbq_m_n_s32): Likewise.
! 	(vshrnbq_m_n_s16): Likewise.
! 	(vshrnbq_m_n_u32): Likewise.
! 	(vshrnbq_m_n_u16): Likewise.
! 	(vshrntq_m_n_s32): Likewise.
! 	(vshrntq_m_n_s16): Likewise.
! 	(vshrntq_m_n_u32): Likewise.
! 	(vshrntq_m_n_u16): Likewise.
! 	(__arm_vmlaldavaq_p_s32): Define intrinsic.
! 	(__arm_vmlaldavaq_p_s16): Likewise.
! 	(__arm_vmlaldavaq_p_u32): Likewise.
! 	(__arm_vmlaldavaq_p_u16): Likewise.
! 	(__arm_vmlaldavaxq_p_s32): Likewise.
! 	(__arm_vmlaldavaxq_p_s16): Likewise.
! 	(__arm_vmlaldavaxq_p_u32): Likewise.
! 	(__arm_vmlaldavaxq_p_u16): Likewise.
! 	(__arm_vmlsldavaq_p_s32): Likewise.
! 	(__arm_vmlsldavaq_p_s16): Likewise.
! 	(__arm_vmlsldavaxq_p_s32): Likewise.
! 	(__arm_vmlsldavaxq_p_s16): Likewise.
! 	(__arm_vmullbq_poly_m_p8): Likewise.
! 	(__arm_vmullbq_poly_m_p16): Likewise.
! 	(__arm_vmulltq_poly_m_p8): Likewise.
! 	(__arm_vmulltq_poly_m_p16): Likewise.
! 	(__arm_vqdmullbq_m_n_s32): Likewise.
! 	(__arm_vqdmullbq_m_n_s16): Likewise.
! 	(__arm_vqdmullbq_m_s32): Likewise.
! 	(__arm_vqdmullbq_m_s16): Likewise.
! 	(__arm_vqdmulltq_m_n_s32): Likewise.
! 	(__arm_vqdmulltq_m_n_s16): Likewise.
! 	(__arm_vqdmulltq_m_s32): Likewise.
! 	(__arm_vqdmulltq_m_s16): Likewise.
! 	(__arm_vqrshrnbq_m_n_s32): Likewise.
! 	(__arm_vqrshrnbq_m_n_s16): Likewise.
! 	(__arm_vqrshrnbq_m_n_u32): Likewise.
! 	(__arm_vqrshrnbq_m_n_u16): Likewise.
! 	(__arm_vqrshrntq_m_n_s32): Likewise.
! 	(__arm_vqrshrntq_m_n_s16): Likewise.
! 	(__arm_vqrshrntq_m_n_u32): Likewise.
! 	(__arm_vqrshrntq_m_n_u16): Likewise.
! 	(__arm_vqrshrunbq_m_n_s32): Likewise.
! 	(__arm_vqrshrunbq_m_n_s16): Likewise.
! 	(__arm_vqrshruntq_m_n_s32): Likewise.
! 	(__arm_vqrshruntq_m_n_s16): Likewise.
! 	(__arm_vqshrnbq_m_n_s32): Likewise.
! 	(__arm_vqshrnbq_m_n_s16): Likewise.
! 	(__arm_vqshrnbq_m_n_u32): Likewise.
! 	(__arm_vqshrnbq_m_n_u16): Likewise.
! 	(__arm_vqshrntq_m_n_s32): Likewise.
! 	(__arm_vqshrntq_m_n_s16): Likewise.
! 	(__arm_vqshrntq_m_n_u32): Likewise.
! 	(__arm_vqshrntq_m_n_u16): Likewise.
! 	(__arm_vqshrunbq_m_n_s32): Likewise.
! 	(__arm_vqshrunbq_m_n_s16): Likewise.
! 	(__arm_vqshruntq_m_n_s32): Likewise.
! 	(__arm_vqshruntq_m_n_s16): Likewise.
! 	(__arm_vrmlaldavhaq_p_s32): Likewise.
! 	(__arm_vrmlaldavhaq_p_u32): Likewise.
! 	(__arm_vrmlaldavhaxq_p_s32): Likewise.
! 	(__arm_vrmlsldavhaq_p_s32): Likewise.
! 	(__arm_vrmlsldavhaxq_p_s32): Likewise.
! 	(__arm_vrshrnbq_m_n_s32): Likewise.
! 	(__arm_vrshrnbq_m_n_s16): Likewise.
! 	(__arm_vrshrnbq_m_n_u32): Likewise.
! 	(__arm_vrshrnbq_m_n_u16): Likewise.
! 	(__arm_vrshrntq_m_n_s32): Likewise.
! 	(__arm_vrshrntq_m_n_s16): Likewise.
! 	(__arm_vrshrntq_m_n_u32): Likewise.
! 	(__arm_vrshrntq_m_n_u16): Likewise.
! 	(__arm_vshllbq_m_n_s8): Likewise.
! 	(__arm_vshllbq_m_n_s16): Likewise.
! 	(__arm_vshllbq_m_n_u8): Likewise.
! 	(__arm_vshllbq_m_n_u16): Likewise.
! 	(__arm_vshlltq_m_n_s8): Likewise.
! 	(__arm_vshlltq_m_n_s16): Likewise.
! 	(__arm_vshlltq_m_n_u8): Likewise.
! 	(__arm_vshlltq_m_n_u16): Likewise.
! 	(__arm_vshrnbq_m_n_s32): Likewise.
! 	(__arm_vshrnbq_m_n_s16): Likewise.
! 	(__arm_vshrnbq_m_n_u32): Likewise.
! 	(__arm_vshrnbq_m_n_u16): Likewise.
! 	(__arm_vshrntq_m_n_s32): Likewise.
! 	(__arm_vshrntq_m_n_s16): Likewise.
! 	(__arm_vshrntq_m_n_u32): Likewise.
! 	(__arm_vshrntq_m_n_u16): Likewise.
! 	(vmullbq_poly_m): Define polymorphic variant.
! 	(vmulltq_poly_m): Likewise.
! 	(vshllbq_m): Likewise.
! 	(vshrntq_m_n): Likewise.
! 	(vshrnbq_m_n): Likewise.
! 	(vshlltq_m_n): Likewise.
! 	(vshllbq_m_n): Likewise.
! 	(vrshrntq_m_n): Likewise.
! 	(vrshrnbq_m_n): Likewise.
! 	(vqshruntq_m_n): Likewise.
! 	(vqshrunbq_m_n): Likewise.
! 	(vqdmullbq_m_n): Likewise.
! 	(vqdmullbq_m): Likewise.
! 	(vqdmulltq_m_n): Likewise.
! 	(vqdmulltq_m): Likewise.
! 	(vqrshrnbq_m_n): Likewise.
! 	(vqrshrntq_m_n): Likewise.
! 	(vqrshrunbq_m_n): Likewise.
! 	(vqrshruntq_m_n): Likewise.
! 	(vqshrnbq_m_n): Likewise.
! 	(vqshrntq_m_n): Likewise.
! 	* config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
! 	builtin qualifiers.
! 	(QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
! 	(QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
! 	(QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
! 	(QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
! 	* config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
! 	(VMLALDAVAXQ_P): Likewise.
! 	(VQRSHRNBQ_M_N): Likewise.
! 	(VQRSHRNTQ_M_N): Likewise.
! 	(VQSHRNBQ_M_N): Likewise.
! 	(VQSHRNTQ_M_N): Likewise.
! 	(VRSHRNBQ_M_N): Likewise.
! 	(VRSHRNTQ_M_N): Likewise.
! 	(VSHLLBQ_M_N): Likewise.
! 	(VSHLLTQ_M_N): Likewise.
! 	(VSHRNBQ_M_N): Likewise.
! 	(VSHRNTQ_M_N): Likewise.
! 	(mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
! 	(mve_vmlaldavaxq_p_<supf><mode>): Likewise.
! 	(mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
! 	(mve_vqrshrntq_m_n_<supf><mode>): Likewise.
! 	(mve_vqshrnbq_m_n_<supf><mode>): Likewise.
! 	(mve_vqshrntq_m_n_<supf><mode>): Likewise.
! 	(mve_vrmlaldavhaq_p_sv4si): Likewise.
! 	(mve_vrshrnbq_m_n_<supf><mode>): Likewise.
! 	(mve_vrshrntq_m_n_<supf><mode>): Likewise.
! 	(mve_vshllbq_m_n_<supf><mode>): Likewise.
! 	(mve_vshlltq_m_n_<supf><mode>): Likewise.
! 	(mve_vshrnbq_m_n_<supf><mode>): Likewise.
! 	(mve_vshrntq_m_n_<supf><mode>): Likewise.
! 	(mve_vmlsldavaq_p_s<mode>): Likewise.
! 	(mve_vmlsldavaxq_p_s<mode>): Likewise.
! 	(mve_vmullbq_poly_m_p<mode>): Likewise.
! 	(mve_vmulltq_poly_m_p<mode>): Likewise.
! 	(mve_vqdmullbq_m_n_s<mode>): Likewise.
! 	(mve_vqdmullbq_m_s<mode>): Likewise.
! 	(mve_vqdmulltq_m_n_s<mode>): Likewise.
! 	(mve_vqdmulltq_m_s<mode>): Likewise.
! 	(mve_vqrshrunbq_m_n_s<mode>): Likewise.
! 	(mve_vqrshruntq_m_n_s<mode>): Likewise.
! 	(mve_vqshrunbq_m_n_s<mode>): Likewise.
! 	(mve_vqshruntq_m_n_s<mode>): Likewise.
! 	(mve_vrmlaldavhaq_p_uv4si): Likewise.
! 	(mve_vrmlaldavhaxq_p_sv4si): Likewise.
! 	(mve_vrmlsldavhaq_p_sv4si): Likewise.
! 	(mve_vrmlsldavhaxq_p_sv4si): Likewise.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  	
! 	* config/arm/arm_mve.h (vabdq_m_s8): Define macro.
! 	(vabdq_m_s32): Likewise.
! 	(vabdq_m_s16): Likewise.
! 	(vabdq_m_u8): Likewise.
! 	(vabdq_m_u32): Likewise.
! 	(vabdq_m_u16): Likewise.
! 	(vaddq_m_n_s8): Likewise.
! 	(vaddq_m_n_s32): Likewise.
! 	(vaddq_m_n_s16): Likewise.
! 	(vaddq_m_n_u8): Likewise.
! 	(vaddq_m_n_u32): Likewise.
! 	(vaddq_m_n_u16): Likewise.
! 	(vaddq_m_s8): Likewise.
! 	(vaddq_m_s32): Likewise.
! 	(vaddq_m_s16): Likewise.
! 	(vaddq_m_u8): Likewise.
! 	(vaddq_m_u32): Likewise.
! 	(vaddq_m_u16): Likewise.
! 	(vandq_m_s8): Likewise.
! 	(vandq_m_s32): Likewise.
! 	(vandq_m_s16): Likewise.
! 	(vandq_m_u8): Likewise.
! 	(vandq_m_u32): Likewise.
! 	(vandq_m_u16): Likewise.
! 	(vbicq_m_s8): Likewise.
! 	(vbicq_m_s32): Likewise.
! 	(vbicq_m_s16): Likewise.
! 	(vbicq_m_u8): Likewise.
! 	(vbicq_m_u32): Likewise.
! 	(vbicq_m_u16): Likewise.
! 	(vbrsrq_m_n_s8): Likewise.
! 	(vbrsrq_m_n_s32): Likewise.
! 	(vbrsrq_m_n_s16): Likewise.
! 	(vbrsrq_m_n_u8): Likewise.
! 	(vbrsrq_m_n_u32): Likewise.
! 	(vbrsrq_m_n_u16): Likewise.
! 	(vcaddq_rot270_m_s8): Likewise.
! 	(vcaddq_rot270_m_s32): Likewise.
! 	(vcaddq_rot270_m_s16): Likewise.
! 	(vcaddq_rot270_m_u8): Likewise.
! 	(vcaddq_rot270_m_u32): Likewise.
! 	(vcaddq_rot270_m_u16): Likewise.
! 	(vcaddq_rot90_m_s8): Likewise.
! 	(vcaddq_rot90_m_s32): Likewise.
! 	(vcaddq_rot90_m_s16): Likewise.
! 	(vcaddq_rot90_m_u8): Likewise.
! 	(vcaddq_rot90_m_u32): Likewise.
! 	(vcaddq_rot90_m_u16): Likewise.
! 	(veorq_m_s8): Likewise.
! 	(veorq_m_s32): Likewise.
! 	(veorq_m_s16): Likewise.
! 	(veorq_m_u8): Likewise.
! 	(veorq_m_u32): Likewise.
! 	(veorq_m_u16): Likewise.
! 	(vhaddq_m_n_s8): Likewise.
! 	(vhaddq_m_n_s32): Likewise.
! 	(vhaddq_m_n_s16): Likewise.
! 	(vhaddq_m_n_u8): Likewise.
! 	(vhaddq_m_n_u32): Likewise.
! 	(vhaddq_m_n_u16): Likewise.
! 	(vhaddq_m_s8): Likewise.
! 	(vhaddq_m_s32): Likewise.
! 	(vhaddq_m_s16): Likewise.
! 	(vhaddq_m_u8): Likewise.
! 	(vhaddq_m_u32): Likewise.
! 	(vhaddq_m_u16): Likewise.
! 	(vhcaddq_rot270_m_s8): Likewise.
! 	(vhcaddq_rot270_m_s32): Likewise.
! 	(vhcaddq_rot270_m_s16): Likewise.
! 	(vhcaddq_rot90_m_s8): Likewise.
! 	(vhcaddq_rot90_m_s32): Likewise.
! 	(vhcaddq_rot90_m_s16): Likewise.
! 	(vhsubq_m_n_s8): Likewise.
! 	(vhsubq_m_n_s32): Likewise.
! 	(vhsubq_m_n_s16): Likewise.
! 	(vhsubq_m_n_u8): Likewise.
! 	(vhsubq_m_n_u32): Likewise.
! 	(vhsubq_m_n_u16): Likewise.
! 	(vhsubq_m_s8): Likewise.
! 	(vhsubq_m_s32): Likewise.
! 	(vhsubq_m_s16): Likewise.
! 	(vhsubq_m_u8): Likewise.
! 	(vhsubq_m_u32): Likewise.
! 	(vhsubq_m_u16): Likewise.
! 	(vmaxq_m_s8): Likewise.
! 	(vmaxq_m_s32): Likewise.
! 	(vmaxq_m_s16): Likewise.
! 	(vmaxq_m_u8): Likewise.
! 	(vmaxq_m_u32): Likewise.
! 	(vmaxq_m_u16): Likewise.
! 	(vminq_m_s8): Likewise.
! 	(vminq_m_s32): Likewise.
! 	(vminq_m_s16): Likewise.
! 	(vminq_m_u8): Likewise.
! 	(vminq_m_u32): Likewise.
! 	(vminq_m_u16): Likewise.
! 	(vmladavaq_p_s8): Likewise.
! 	(vmladavaq_p_s32): Likewise.
! 	(vmladavaq_p_s16): Likewise.
! 	(vmladavaq_p_u8): Likewise.
! 	(vmladavaq_p_u32): Likewise.
! 	(vmladavaq_p_u16): Likewise.
! 	(vmladavaxq_p_s8): Likewise.
! 	(vmladavaxq_p_s32): Likewise.
! 	(vmladavaxq_p_s16): Likewise.
! 	(vmlaq_m_n_s8): Likewise.
! 	(vmlaq_m_n_s32): Likewise.
! 	(vmlaq_m_n_s16): Likewise.
! 	(vmlaq_m_n_u8): Likewise.
! 	(vmlaq_m_n_u32): Likewise.
! 	(vmlaq_m_n_u16): Likewise.
! 	(vmlasq_m_n_s8): Likewise.
! 	(vmlasq_m_n_s32): Likewise.
! 	(vmlasq_m_n_s16): Likewise.
! 	(vmlasq_m_n_u8): Likewise.
! 	(vmlasq_m_n_u32): Likewise.
! 	(vmlasq_m_n_u16): Likewise.
! 	(vmlsdavaq_p_s8): Likewise.
! 	(vmlsdavaq_p_s32): Likewise.
! 	(vmlsdavaq_p_s16): Likewise.
! 	(vmlsdavaxq_p_s8): Likewise.
! 	(vmlsdavaxq_p_s32): Likewise.
! 	(vmlsdavaxq_p_s16): Likewise.
! 	(vmulhq_m_s8): Likewise.
! 	(vmulhq_m_s32): Likewise.
! 	(vmulhq_m_s16): Likewise.
! 	(vmulhq_m_u8): Likewise.
! 	(vmulhq_m_u32): Likewise.
! 	(vmulhq_m_u16): Likewise.
! 	(vmullbq_int_m_s8): Likewise.
! 	(vmullbq_int_m_s32): Likewise.
! 	(vmullbq_int_m_s16): Likewise.
! 	(vmullbq_int_m_u8): Likewise.
! 	(vmullbq_int_m_u32): Likewise.
! 	(vmullbq_int_m_u16): Likewise.
! 	(vmulltq_int_m_s8): Likewise.
! 	(vmulltq_int_m_s32): Likewise.
! 	(vmulltq_int_m_s16): Likewise.
! 	(vmulltq_int_m_u8): Likewise.
! 	(vmulltq_int_m_u32): Likewise.
! 	(vmulltq_int_m_u16): Likewise.
! 	(vmulq_m_n_s8): Likewise.
! 	(vmulq_m_n_s32): Likewise.
! 	(vmulq_m_n_s16): Likewise.
! 	(vmulq_m_n_u8): Likewise.
! 	(vmulq_m_n_u32): Likewise.
! 	(vmulq_m_n_u16): Likewise.
! 	(vmulq_m_s8): Likewise.
! 	(vmulq_m_s32): Likewise.
! 	(vmulq_m_s16): Likewise.
! 	(vmulq_m_u8): Likewise.
! 	(vmulq_m_u32): Likewise.
! 	(vmulq_m_u16): Likewise.
! 	(vornq_m_s8): Likewise.
! 	(vornq_m_s32): Likewise.
! 	(vornq_m_s16): Likewise.
! 	(vornq_m_u8): Likewise.
! 	(vornq_m_u32): Likewise.
! 	(vornq_m_u16): Likewise.
! 	(vorrq_m_s8): Likewise.
! 	(vorrq_m_s32): Likewise.
! 	(vorrq_m_s16): Likewise.
! 	(vorrq_m_u8): Likewise.
! 	(vorrq_m_u32): Likewise.
! 	(vorrq_m_u16): Likewise.
! 	(vqaddq_m_n_s8): Likewise.
! 	(vqaddq_m_n_s32): Likewise.
! 	(vqaddq_m_n_s16): Likewise.
! 	(vqaddq_m_n_u8): Likewise.
! 	(vqaddq_m_n_u32): Likewise.
! 	(vqaddq_m_n_u16): Likewise.
! 	(vqaddq_m_s8): Likewise.
! 	(vqaddq_m_s32): Likewise.
! 	(vqaddq_m_s16): Likewise.
! 	(vqaddq_m_u8): Likewise.
! 	(vqaddq_m_u32): Likewise.
! 	(vqaddq_m_u16): Likewise.
! 	(vqdmladhq_m_s8): Likewise.
! 	(vqdmladhq_m_s32): Likewise.
! 	(vqdmladhq_m_s16): Likewise.
! 	(vqdmladhxq_m_s8): Likewise.
! 	(vqdmladhxq_m_s32): Likewise.
! 	(vqdmladhxq_m_s16): Likewise.
! 	(vqdmlahq_m_n_s8): Likewise.
! 	(vqdmlahq_m_n_s32): Likewise.
! 	(vqdmlahq_m_n_s16): Likewise.
! 	(vqdmlahq_m_n_u8): Likewise.
! 	(vqdmlahq_m_n_u32): Likewise.
! 	(vqdmlahq_m_n_u16): Likewise.
! 	(vqdmlsdhq_m_s8): Likewise.
! 	(vqdmlsdhq_m_s32): Likewise.
! 	(vqdmlsdhq_m_s16): Likewise.
! 	(vqdmlsdhxq_m_s8): Likewise.
! 	(vqdmlsdhxq_m_s32): Likewise.
! 	(vqdmlsdhxq_m_s16): Likewise.
! 	(vqdmulhq_m_n_s8): Likewise.
! 	(vqdmulhq_m_n_s32): Likewise.
! 	(vqdmulhq_m_n_s16): Likewise.
! 	(vqdmulhq_m_s8): Likewise.
! 	(vqdmulhq_m_s32): Likewise.
! 	(vqdmulhq_m_s16): Likewise.
! 	(vqrdmladhq_m_s8): Likewise.
! 	(vqrdmladhq_m_s32): Likewise.
! 	(vqrdmladhq_m_s16): Likewise.
! 	(vqrdmladhxq_m_s8): Likewise.
! 	(vqrdmladhxq_m_s32): Likewise.
! 	(vqrdmladhxq_m_s16): Likewise.
! 	(vqrdmlahq_m_n_s8): Likewise.
! 	(vqrdmlahq_m_n_s32): Likewise.
! 	(vqrdmlahq_m_n_s16): Likewise.
! 	(vqrdmlahq_m_n_u8): Likewise.
! 	(vqrdmlahq_m_n_u32): Likewise.
! 	(vqrdmlahq_m_n_u16): Likewise.
! 	(vqrdmlashq_m_n_s8): Likewise.
! 	(vqrdmlashq_m_n_s32): Likewise.
! 	(vqrdmlashq_m_n_s16): Likewise.
! 	(vqrdmlashq_m_n_u8): Likewise.
! 	(vqrdmlashq_m_n_u32): Likewise.
! 	(vqrdmlashq_m_n_u16): Likewise.
! 	(vqrdmlsdhq_m_s8): Likewise.
! 	(vqrdmlsdhq_m_s32): Likewise.
! 	(vqrdmlsdhq_m_s16): Likewise.
! 	(vqrdmlsdhxq_m_s8): Likewise.
! 	(vqrdmlsdhxq_m_s32): Likewise.
! 	(vqrdmlsdhxq_m_s16): Likewise.
! 	(vqrdmulhq_m_n_s8): Likewise.
! 	(vqrdmulhq_m_n_s32): Likewise.
! 	(vqrdmulhq_m_n_s16): Likewise.
! 	(vqrdmulhq_m_s8): Likewise.
! 	(vqrdmulhq_m_s32): Likewise.
! 	(vqrdmulhq_m_s16): Likewise.
! 	(vqrshlq_m_s8): Likewise.
! 	(vqrshlq_m_s32): Likewise.
! 	(vqrshlq_m_s16): Likewise.
! 	(vqrshlq_m_u8): Likewise.
! 	(vqrshlq_m_u32): Likewise.
! 	(vqrshlq_m_u16): Likewise.
! 	(vqshlq_m_n_s8): Likewise.
! 	(vqshlq_m_n_s32): Likewise.
! 	(vqshlq_m_n_s16): Likewise.
! 	(vqshlq_m_n_u8): Likewise.
! 	(vqshlq_m_n_u32): Likewise.
! 	(vqshlq_m_n_u16): Likewise.
! 	(vqshlq_m_s8): Likewise.
! 	(vqshlq_m_s32): Likewise.
! 	(vqshlq_m_s16): Likewise.
! 	(vqshlq_m_u8): Likewise.
! 	(vqshlq_m_u32): Likewise.
! 	(vqshlq_m_u16): Likewise.
! 	(vqsubq_m_n_s8): Likewise.
! 	(vqsubq_m_n_s32): Likewise.
! 	(vqsubq_m_n_s16): Likewise.
! 	(vqsubq_m_n_u8): Likewise.
! 	(vqsubq_m_n_u32): Likewise.
! 	(vqsubq_m_n_u16): Likewise.
! 	(vqsubq_m_s8): Likewise.
! 	(vqsubq_m_s32): Likewise.
! 	(vqsubq_m_s16): Likewise.
! 	(vqsubq_m_u8): Likewise.
! 	(vqsubq_m_u32): Likewise.
! 	(vqsubq_m_u16): Likewise.
! 	(vrhaddq_m_s8): Likewise.
! 	(vrhaddq_m_s32): Likewise.
! 	(vrhaddq_m_s16): Likewise.
! 	(vrhaddq_m_u8): Likewise.
! 	(vrhaddq_m_u32): Likewise.
! 	(vrhaddq_m_u16): Likewise.
! 	(vrmulhq_m_s8): Likewise.
! 	(vrmulhq_m_s32): Likewise.
! 	(vrmulhq_m_s16): Likewise.
! 	(vrmulhq_m_u8): Likewise.
! 	(vrmulhq_m_u32): Likewise.
! 	(vrmulhq_m_u16): Likewise.
! 	(vrshlq_m_s8): Likewise.
! 	(vrshlq_m_s32): Likewise.
! 	(vrshlq_m_s16): Likewise.
! 	(vrshlq_m_u8): Likewise.
! 	(vrshlq_m_u32): Likewise.
! 	(vrshlq_m_u16): Likewise.
! 	(vrshrq_m_n_s8): Likewise.
! 	(vrshrq_m_n_s32): Likewise.
! 	(vrshrq_m_n_s16): Likewise.
! 	(vrshrq_m_n_u8): Likewise.
! 	(vrshrq_m_n_u32): Likewise.
! 	(vrshrq_m_n_u16): Likewise.
! 	(vshlq_m_n_s8): Likewise.
! 	(vshlq_m_n_s32): Likewise.
! 	(vshlq_m_n_s16): Likewise.
! 	(vshlq_m_n_u8): Likewise.
! 	(vshlq_m_n_u32): Likewise.
! 	(vshlq_m_n_u16): Likewise.
! 	(vshrq_m_n_s8): Likewise.
! 	(vshrq_m_n_s32): Likewise.
! 	(vshrq_m_n_s16): Likewise.
! 	(vshrq_m_n_u8): Likewise.
! 	(vshrq_m_n_u32): Likewise.
! 	(vshrq_m_n_u16): Likewise.
! 	(vsliq_m_n_s8): Likewise.
! 	(vsliq_m_n_s32): Likewise.
! 	(vsliq_m_n_s16): Likewise.
! 	(vsliq_m_n_u8): Likewise.
! 	(vsliq_m_n_u32): Likewise.
! 	(vsliq_m_n_u16): Likewise.
! 	(vsubq_m_n_s8): Likewise.
! 	(vsubq_m_n_s32): Likewise.
! 	(vsubq_m_n_s16): Likewise.
! 	(vsubq_m_n_u8): Likewise.
! 	(vsubq_m_n_u32): Likewise.
! 	(vsubq_m_n_u16): Likewise.
! 	(__arm_vabdq_m_s8): Define intrinsic.
! 	(__arm_vabdq_m_s32): Likewise.
! 	(__arm_vabdq_m_s16): Likewise.
! 	(__arm_vabdq_m_u8): Likewise.
! 	(__arm_vabdq_m_u32): Likewise.
! 	(__arm_vabdq_m_u16): Likewise.
! 	(__arm_vaddq_m_n_s8): Likewise.
! 	(__arm_vaddq_m_n_s32): Likewise.
! 	(__arm_vaddq_m_n_s16): Likewise.
! 	(__arm_vaddq_m_n_u8): Likewise.
! 	(__arm_vaddq_m_n_u32): Likewise.
! 	(__arm_vaddq_m_n_u16): Likewise.
! 	(__arm_vaddq_m_s8): Likewise.
! 	(__arm_vaddq_m_s32): Likewise.
! 	(__arm_vaddq_m_s16): Likewise.
! 	(__arm_vaddq_m_u8): Likewise.
! 	(__arm_vaddq_m_u32): Likewise.
! 	(__arm_vaddq_m_u16): Likewise.
! 	(__arm_vandq_m_s8): Likewise.
! 	(__arm_vandq_m_s32): Likewise.
! 	(__arm_vandq_m_s16): Likewise.
! 	(__arm_vandq_m_u8): Likewise.
! 	(__arm_vandq_m_u32): Likewise.
! 	(__arm_vandq_m_u16): Likewise.
! 	(__arm_vbicq_m_s8): Likewise.
! 	(__arm_vbicq_m_s32): Likewise.
! 	(__arm_vbicq_m_s16): Likewise.
! 	(__arm_vbicq_m_u8): Likewise.
! 	(__arm_vbicq_m_u32): Likewise.
! 	(__arm_vbicq_m_u16): Likewise.
! 	(__arm_vbrsrq_m_n_s8): Likewise.
! 	(__arm_vbrsrq_m_n_s32): Likewise.
! 	(__arm_vbrsrq_m_n_s16): Likewise.
! 	(__arm_vbrsrq_m_n_u8): Likewise.
! 	(__arm_vbrsrq_m_n_u32): Likewise.
! 	(__arm_vbrsrq_m_n_u16): Likewise.
! 	(__arm_vcaddq_rot270_m_s8): Likewise.
! 	(__arm_vcaddq_rot270_m_s32): Likewise.
! 	(__arm_vcaddq_rot270_m_s16): Likewise.
! 	(__arm_vcaddq_rot270_m_u8): Likewise.
! 	(__arm_vcaddq_rot270_m_u32): Likewise.
! 	(__arm_vcaddq_rot270_m_u16): Likewise.
! 	(__arm_vcaddq_rot90_m_s8): Likewise.
! 	(__arm_vcaddq_rot90_m_s32): Likewise.
! 	(__arm_vcaddq_rot90_m_s16): Likewise.
! 	(__arm_vcaddq_rot90_m_u8): Likewise.
! 	(__arm_vcaddq_rot90_m_u32): Likewise.
! 	(__arm_vcaddq_rot90_m_u16): Likewise.
! 	(__arm_veorq_m_s8): Likewise.
! 	(__arm_veorq_m_s32): Likewise.
! 	(__arm_veorq_m_s16): Likewise.
! 	(__arm_veorq_m_u8): Likewise.
! 	(__arm_veorq_m_u32): Likewise.
! 	(__arm_veorq_m_u16): Likewise.
! 	(__arm_vhaddq_m_n_s8): Likewise.
! 	(__arm_vhaddq_m_n_s32): Likewise.
! 	(__arm_vhaddq_m_n_s16): Likewise.
! 	(__arm_vhaddq_m_n_u8): Likewise.
! 	(__arm_vhaddq_m_n_u32): Likewise.
! 	(__arm_vhaddq_m_n_u16): Likewise.
! 	(__arm_vhaddq_m_s8): Likewise.
! 	(__arm_vhaddq_m_s32): Likewise.
! 	(__arm_vhaddq_m_s16): Likewise.
! 	(__arm_vhaddq_m_u8): Likewise.
! 	(__arm_vhaddq_m_u32): Likewise.
! 	(__arm_vhaddq_m_u16): Likewise.
! 	(__arm_vhcaddq_rot270_m_s8): Likewise.
! 	(__arm_vhcaddq_rot270_m_s32): Likewise.
! 	(__arm_vhcaddq_rot270_m_s16): Likewise.
! 	(__arm_vhcaddq_rot90_m_s8): Likewise.
! 	(__arm_vhcaddq_rot90_m_s32): Likewise.
! 	(__arm_vhcaddq_rot90_m_s16): Likewise.
! 	(__arm_vhsubq_m_n_s8): Likewise.
! 	(__arm_vhsubq_m_n_s32): Likewise.
! 	(__arm_vhsubq_m_n_s16): Likewise.
! 	(__arm_vhsubq_m_n_u8): Likewise.
! 	(__arm_vhsubq_m_n_u32): Likewise.
! 	(__arm_vhsubq_m_n_u16): Likewise.
! 	(__arm_vhsubq_m_s8): Likewise.
! 	(__arm_vhsubq_m_s32): Likewise.
! 	(__arm_vhsubq_m_s16): Likewise.
! 	(__arm_vhsubq_m_u8): Likewise.
! 	(__arm_vhsubq_m_u32): Likewise.
! 	(__arm_vhsubq_m_u16): Likewise.
! 	(__arm_vmaxq_m_s8): Likewise.
! 	(__arm_vmaxq_m_s32): Likewise.
! 	(__arm_vmaxq_m_s16): Likewise.
! 	(__arm_vmaxq_m_u8): Likewise.
! 	(__arm_vmaxq_m_u32): Likewise.
! 	(__arm_vmaxq_m_u16): Likewise.
! 	(__arm_vminq_m_s8): Likewise.
! 	(__arm_vminq_m_s32): Likewise.
! 	(__arm_vminq_m_s16): Likewise.
! 	(__arm_vminq_m_u8): Likewise.
! 	(__arm_vminq_m_u32): Likewise.
! 	(__arm_vminq_m_u16): Likewise.
! 	(__arm_vmladavaq_p_s8): Likewise.
! 	(__arm_vmladavaq_p_s32): Likewise.
! 	(__arm_vmladavaq_p_s16): Likewise.
! 	(__arm_vmladavaq_p_u8): Likewise.
! 	(__arm_vmladavaq_p_u32): Likewise.
! 	(__arm_vmladavaq_p_u16): Likewise.
! 	(__arm_vmladavaxq_p_s8): Likewise.
! 	(__arm_vmladavaxq_p_s32): Likewise.
! 	(__arm_vmladavaxq_p_s16): Likewise.
! 	(__arm_vmlaq_m_n_s8): Likewise.
! 	(__arm_vmlaq_m_n_s32): Likewise.
! 	(__arm_vmlaq_m_n_s16): Likewise.
! 	(__arm_vmlaq_m_n_u8): Likewise.
! 	(__arm_vmlaq_m_n_u32): Likewise.
! 	(__arm_vmlaq_m_n_u16): Likewise.
! 	(__arm_vmlasq_m_n_s8): Likewise.
! 	(__arm_vmlasq_m_n_s32): Likewise.
! 	(__arm_vmlasq_m_n_s16): Likewise.
! 	(__arm_vmlasq_m_n_u8): Likewise.
! 	(__arm_vmlasq_m_n_u32): Likewise.
! 	(__arm_vmlasq_m_n_u16): Likewise.
! 	(__arm_vmlsdavaq_p_s8): Likewise.
! 	(__arm_vmlsdavaq_p_s32): Likewise.
! 	(__arm_vmlsdavaq_p_s16): Likewise.
! 	(__arm_vmlsdavaxq_p_s8): Likewise.
! 	(__arm_vmlsdavaxq_p_s32): Likewise.
! 	(__arm_vmlsdavaxq_p_s16): Likewise.
! 	(__arm_vmulhq_m_s8): Likewise.
! 	(__arm_vmulhq_m_s32): Likewise.
! 	(__arm_vmulhq_m_s16): Likewise.
! 	(__arm_vmulhq_m_u8): Likewise.
! 	(__arm_vmulhq_m_u32): Likewise.
! 	(__arm_vmulhq_m_u16): Likewise.
! 	(__arm_vmullbq_int_m_s8): Likewise.
! 	(__arm_vmullbq_int_m_s32): Likewise.
! 	(__arm_vmullbq_int_m_s16): Likewise.
! 	(__arm_vmullbq_int_m_u8): Likewise.
! 	(__arm_vmullbq_int_m_u32): Likewise.
! 	(__arm_vmullbq_int_m_u16): Likewise.
! 	(__arm_vmulltq_int_m_s8): Likewise.
! 	(__arm_vmulltq_int_m_s32): Likewise.
! 	(__arm_vmulltq_int_m_s16): Likewise.
! 	(__arm_vmulltq_int_m_u8): Likewise.
! 	(__arm_vmulltq_int_m_u32): Likewise.
! 	(__arm_vmulltq_int_m_u16): Likewise.
! 	(__arm_vmulq_m_n_s8): Likewise.
! 	(__arm_vmulq_m_n_s32): Likewise.
! 	(__arm_vmulq_m_n_s16): Likewise.
! 	(__arm_vmulq_m_n_u8): Likewise.
! 	(__arm_vmulq_m_n_u32): Likewise.
! 	(__arm_vmulq_m_n_u16): Likewise.
! 	(__arm_vmulq_m_s8): Likewise.
! 	(__arm_vmulq_m_s32): Likewise.
! 	(__arm_vmulq_m_s16): Likewise.
! 	(__arm_vmulq_m_u8): Likewise.
! 	(__arm_vmulq_m_u32): Likewise.
! 	(__arm_vmulq_m_u16): Likewise.
! 	(__arm_vornq_m_s8): Likewise.
! 	(__arm_vornq_m_s32): Likewise.
! 	(__arm_vornq_m_s16): Likewise.
! 	(__arm_vornq_m_u8): Likewise.
! 	(__arm_vornq_m_u32): Likewise.
! 	(__arm_vornq_m_u16): Likewise.
! 	(__arm_vorrq_m_s8): Likewise.
! 	(__arm_vorrq_m_s32): Likewise.
! 	(__arm_vorrq_m_s16): Likewise.
! 	(__arm_vorrq_m_u8): Likewise.
! 	(__arm_vorrq_m_u32): Likewise.
! 	(__arm_vorrq_m_u16): Likewise.
! 	(__arm_vqaddq_m_n_s8): Likewise.
! 	(__arm_vqaddq_m_n_s32): Likewise.
! 	(__arm_vqaddq_m_n_s16): Likewise.
! 	(__arm_vqaddq_m_n_u8): Likewise.
! 	(__arm_vqaddq_m_n_u32): Likewise.
! 	(__arm_vqaddq_m_n_u16): Likewise.
! 	(__arm_vqaddq_m_s8): Likewise.
! 	(__arm_vqaddq_m_s32): Likewise.
! 	(__arm_vqaddq_m_s16): Likewise.
! 	(__arm_vqaddq_m_u8): Likewise.
! 	(__arm_vqaddq_m_u32): Likewise.
! 	(__arm_vqaddq_m_u16): Likewise.
! 	(__arm_vqdmladhq_m_s8): Likewise.
! 	(__arm_vqdmladhq_m_s32): Likewise.
! 	(__arm_vqdmladhq_m_s16): Likewise.
! 	(__arm_vqdmladhxq_m_s8): Likewise.
! 	(__arm_vqdmladhxq_m_s32): Likewise.
! 	(__arm_vqdmladhxq_m_s16): Likewise.
! 	(__arm_vqdmlahq_m_n_s8): Likewise.
! 	(__arm_vqdmlahq_m_n_s32): Likewise.
! 	(__arm_vqdmlahq_m_n_s16): Likewise.
! 	(__arm_vqdmlahq_m_n_u8): Likewise.
! 	(__arm_vqdmlahq_m_n_u32): Likewise.
! 	(__arm_vqdmlahq_m_n_u16): Likewise.
! 	(__arm_vqdmlsdhq_m_s8): Likewise.
! 	(__arm_vqdmlsdhq_m_s32): Likewise.
! 	(__arm_vqdmlsdhq_m_s16): Likewise.
! 	(__arm_vqdmlsdhxq_m_s8): Likewise.
! 	(__arm_vqdmlsdhxq_m_s32): Likewise.
! 	(__arm_vqdmlsdhxq_m_s16): Likewise.
! 	(__arm_vqdmulhq_m_n_s8): Likewise.
! 	(__arm_vqdmulhq_m_n_s32): Likewise.
! 	(__arm_vqdmulhq_m_n_s16): Likewise.
! 	(__arm_vqdmulhq_m_s8): Likewise.
! 	(__arm_vqdmulhq_m_s32): Likewise.
! 	(__arm_vqdmulhq_m_s16): Likewise.
! 	(__arm_vqrdmladhq_m_s8): Likewise.
! 	(__arm_vqrdmladhq_m_s32): Likewise.
! 	(__arm_vqrdmladhq_m_s16): Likewise.
! 	(__arm_vqrdmladhxq_m_s8): Likewise.
! 	(__arm_vqrdmladhxq_m_s32): Likewise.
! 	(__arm_vqrdmladhxq_m_s16): Likewise.
! 	(__arm_vqrdmlahq_m_n_s8): Likewise.
! 	(__arm_vqrdmlahq_m_n_s32): Likewise.
! 	(__arm_vqrdmlahq_m_n_s16): Likewise.
! 	(__arm_vqrdmlahq_m_n_u8): Likewise.
! 	(__arm_vqrdmlahq_m_n_u32): Likewise.
! 	(__arm_vqrdmlahq_m_n_u16): Likewise.
! 	(__arm_vqrdmlashq_m_n_s8): Likewise.
! 	(__arm_vqrdmlashq_m_n_s32): Likewise.
! 	(__arm_vqrdmlashq_m_n_s16): Likewise.
! 	(__arm_vqrdmlashq_m_n_u8): Likewise.
! 	(__arm_vqrdmlashq_m_n_u32): Likewise.
! 	(__arm_vqrdmlashq_m_n_u16): Likewise.
! 	(__arm_vqrdmlsdhq_m_s8): Likewise.
! 	(__arm_vqrdmlsdhq_m_s32): Likewise.
! 	(__arm_vqrdmlsdhq_m_s16): Likewise.
! 	(__arm_vqrdmlsdhxq_m_s8): Likewise.
! 	(__arm_vqrdmlsdhxq_m_s32): Likewise.
! 	(__arm_vqrdmlsdhxq_m_s16): Likewise.
! 	(__arm_vqrdmulhq_m_n_s8): Likewise.
! 	(__arm_vqrdmulhq_m_n_s32): Likewise.
! 	(__arm_vqrdmulhq_m_n_s16): Likewise.
! 	(__arm_vqrdmulhq_m_s8): Likewise.
! 	(__arm_vqrdmulhq_m_s32): Likewise.
! 	(__arm_vqrdmulhq_m_s16): Likewise.
! 	(__arm_vqrshlq_m_s8): Likewise.
! 	(__arm_vqrshlq_m_s32): Likewise.
! 	(__arm_vqrshlq_m_s16): Likewise.
! 	(__arm_vqrshlq_m_u8): Likewise.
! 	(__arm_vqrshlq_m_u32): Likewise.
! 	(__arm_vqrshlq_m_u16): Likewise.
! 	(__arm_vqshlq_m_n_s8): Likewise.
! 	(__arm_vqshlq_m_n_s32): Likewise.
! 	(__arm_vqshlq_m_n_s16): Likewise.
! 	(__arm_vqshlq_m_n_u8): Likewise.
! 	(__arm_vqshlq_m_n_u32): Likewise.
! 	(__arm_vqshlq_m_n_u16): Likewise.
! 	(__arm_vqshlq_m_s8): Likewise.
! 	(__arm_vqshlq_m_s32): Likewise.
! 	(__arm_vqshlq_m_s16): Likewise.
! 	(__arm_vqshlq_m_u8): Likewise.
! 	(__arm_vqshlq_m_u32): Likewise.
! 	(__arm_vqshlq_m_u16): Likewise.
! 	(__arm_vqsubq_m_n_s8): Likewise.
! 	(__arm_vqsubq_m_n_s32): Likewise.
! 	(__arm_vqsubq_m_n_s16): Likewise.
! 	(__arm_vqsubq_m_n_u8): Likewise.
! 	(__arm_vqsubq_m_n_u32): Likewise.
! 	(__arm_vqsubq_m_n_u16): Likewise.
! 	(__arm_vqsubq_m_s8): Likewise.
! 	(__arm_vqsubq_m_s32): Likewise.
! 	(__arm_vqsubq_m_s16): Likewise.
! 	(__arm_vqsubq_m_u8): Likewise.
! 	(__arm_vqsubq_m_u32): Likewise.
! 	(__arm_vqsubq_m_u16): Likewise.
! 	(__arm_vrhaddq_m_s8): Likewise.
! 	(__arm_vrhaddq_m_s32): Likewise.
! 	(__arm_vrhaddq_m_s16): Likewise.
! 	(__arm_vrhaddq_m_u8): Likewise.
! 	(__arm_vrhaddq_m_u32): Likewise.
! 	(__arm_vrhaddq_m_u16): Likewise.
! 	(__arm_vrmulhq_m_s8): Likewise.
! 	(__arm_vrmulhq_m_s32): Likewise.
! 	(__arm_vrmulhq_m_s16): Likewise.
! 	(__arm_vrmulhq_m_u8): Likewise.
! 	(__arm_vrmulhq_m_u32): Likewise.
! 	(__arm_vrmulhq_m_u16): Likewise.
! 	(__arm_vrshlq_m_s8): Likewise.
! 	(__arm_vrshlq_m_s32): Likewise.
! 	(__arm_vrshlq_m_s16): Likewise.
! 	(__arm_vrshlq_m_u8): Likewise.
! 	(__arm_vrshlq_m_u32): Likewise.
! 	(__arm_vrshlq_m_u16): Likewise.
! 	(__arm_vrshrq_m_n_s8): Likewise.
! 	(__arm_vrshrq_m_n_s32): Likewise.
! 	(__arm_vrshrq_m_n_s16): Likewise.
! 	(__arm_vrshrq_m_n_u8): Likewise.
! 	(__arm_vrshrq_m_n_u32): Likewise.
! 	(__arm_vrshrq_m_n_u16): Likewise.
! 	(__arm_vshlq_m_n_s8): Likewise.
! 	(__arm_vshlq_m_n_s32): Likewise.
! 	(__arm_vshlq_m_n_s16): Likewise.
! 	(__arm_vshlq_m_n_u8): Likewise.
! 	(__arm_vshlq_m_n_u32): Likewise.
! 	(__arm_vshlq_m_n_u16): Likewise.
! 	(__arm_vshrq_m_n_s8): Likewise.
! 	(__arm_vshrq_m_n_s32): Likewise.
! 	(__arm_vshrq_m_n_s16): Likewise.
! 	(__arm_vshrq_m_n_u8): Likewise.
! 	(__arm_vshrq_m_n_u32): Likewise.
! 	(__arm_vshrq_m_n_u16): Likewise.
! 	(__arm_vsliq_m_n_s8): Likewise.
! 	(__arm_vsliq_m_n_s32): Likewise.
! 	(__arm_vsliq_m_n_s16): Likewise.
! 	(__arm_vsliq_m_n_u8): Likewise.
! 	(__arm_vsliq_m_n_u32): Likewise.
! 	(__arm_vsliq_m_n_u16): Likewise.
! 	(__arm_vsubq_m_n_s8): Likewise.
! 	(__arm_vsubq_m_n_s32): Likewise.
! 	(__arm_vsubq_m_n_s16): Likewise.
! 	(__arm_vsubq_m_n_u8): Likewise.
! 	(__arm_vsubq_m_n_u32): Likewise.
! 	(__arm_vsubq_m_n_u16): Likewise.
! 	(vqdmladhq_m): Define polymorphic variant.
! 	(vqdmladhxq_m): Likewise.
! 	(vqdmlsdhq_m): Likewise.
! 	(vqdmlsdhxq_m): Likewise.
! 	(vabdq_m): Likewise.
! 	(vandq_m): Likewise.
! 	(vbicq_m): Likewise.
! 	(vbrsrq_m_n): Likewise.
! 	(vcaddq_rot270_m): Likewise.
! 	(vcaddq_rot90_m): Likewise.
! 	(veorq_m): Likewise.
! 	(vmaxq_m): Likewise.
! 	(vminq_m): Likewise.
! 	(vmladavaq_p): Likewise.
! 	(vmlaq_m_n): Likewise.
! 	(vmlasq_m_n): Likewise.
! 	(vmulhq_m): Likewise.
! 	(vmullbq_int_m): Likewise.
! 	(vmulltq_int_m): Likewise.
! 	(vornq_m): Likewise.
! 	(vorrq_m): Likewise.
! 	(vqdmlahq_m_n): Likewise.
! 	(vqrdmlahq_m_n): Likewise.
! 	(vqrdmlashq_m_n): Likewise.
! 	(vqrshlq_m): Likewise.
! 	(vqshlq_m_n): Likewise.
! 	(vqshlq_m): Likewise.
! 	(vrhaddq_m): Likewise.
! 	(vrmulhq_m): Likewise.
! 	(vrshlq_m): Likewise.
! 	(vrshrq_m_n): Likewise.
! 	(vshlq_m_n): Likewise.
! 	(vshrq_m_n): Likewise.
! 	(vsliq_m): Likewise.
! 	(vaddq_m_n): Likewise.
! 	(vaddq_m): Likewise.
! 	(vhaddq_m_n): Likewise.
! 	(vhaddq_m): Likewise.
! 	(vhcaddq_rot270_m): Likewise.
! 	(vhcaddq_rot90_m): Likewise.
! 	(vhsubq_m): Likewise.
! 	(vhsubq_m_n): Likewise.
! 	(vmulq_m_n): Likewise.
! 	(vmulq_m): Likewise.
! 	(vqaddq_m_n): Likewise.
! 	(vqaddq_m): Likewise.
! 	(vqdmulhq_m_n): Likewise.
! 	(vqdmulhq_m): Likewise.
! 	(vsubq_m_n): Likewise.
! 	(vsliq_m_n): Likewise.
! 	(vqsubq_m_n): Likewise.
! 	(vqsubq_m): Likewise.
! 	(vqrdmulhq_m): Likewise.
! 	(vqrdmulhq_m_n): Likewise.
! 	(vqrdmlsdhxq_m): Likewise.
! 	(vqrdmlsdhq_m): Likewise.
! 	(vqrdmladhq_m): Likewise.
! 	(vqrdmladhxq_m): Likewise.
! 	(vmlsdavaxq_p): Likewise.
! 	(vmlsdavaq_p): Likewise.
! 	(vmladavaxq_p): Likewise.
! 	* config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
! 	builtin qualifier.
! 	(QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
! 	(QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
! 	(QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
! 	(QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
! 	* config/arm/mve.md (VHSUBQ_M): Define iterators.
! 	(VSLIQ_M_N): Likewise.
! 	(VQRDMLAHQ_M_N): Likewise.
! 	(VRSHLQ_M): Likewise.
! 	(VMINQ_M): Likewise.
! 	(VMULLBQ_INT_M): Likewise.
! 	(VMULHQ_M): Likewise.
! 	(VMULQ_M): Likewise.
! 	(VHSUBQ_M_N): Likewise.
! 	(VHADDQ_M_N): Likewise.
! 	(VORRQ_M): Likewise.
! 	(VRMULHQ_M): Likewise.
! 	(VQADDQ_M): Likewise.
! 	(VRSHRQ_M_N): Likewise.
! 	(VQSUBQ_M_N): Likewise.
! 	(VADDQ_M): Likewise.
! 	(VORNQ_M): Likewise.
! 	(VQDMLAHQ_M_N): Likewise.
! 	(VRHADDQ_M): Likewise.
! 	(VQSHLQ_M): Likewise.
! 	(VANDQ_M): Likewise.
! 	(VBICQ_M): Likewise.
! 	(VSHLQ_M_N): Likewise.
! 	(VCADDQ_ROT270_M): Likewise.
! 	(VQRSHLQ_M): Likewise.
! 	(VQADDQ_M_N): Likewise.
! 	(VADDQ_M_N): Likewise.
! 	(VMAXQ_M): Likewise.
! 	(VQSUBQ_M): Likewise.
! 	(VMLASQ_M_N): Likewise.
! 	(VMLADAVAQ_P): Likewise.
! 	(VBRSRQ_M_N): Likewise.
! 	(VMULQ_M_N): Likewise.
! 	(VCADDQ_ROT90_M): Likewise.
! 	(VMULLTQ_INT_M): Likewise.
! 	(VEORQ_M): Likewise.
! 	(VSHRQ_M_N): Likewise.
! 	(VSUBQ_M_N): Likewise.
! 	(VHADDQ_M): Likewise.
! 	(VABDQ_M): Likewise.
! 	(VQRDMLASHQ_M_N): Likewise.
! 	(VMLAQ_M_N): Likewise.
! 	(VQSHLQ_M_N): Likewise.
! 	(mve_vabdq_m_<supf><mode>): Define RTL pattern.
! 	(mve_vaddq_m_n_<supf><mode>): Likewise.
! 	(mve_vaddq_m_<supf><mode>): Likewise.
! 	(mve_vandq_m_<supf><mode>): Likewise.
! 	(mve_vbicq_m_<supf><mode>): Likewise.
! 	(mve_vbrsrq_m_n_<supf><mode>): Likewise.
! 	(mve_vcaddq_rot270_m_<supf><mode>): Likewise.
! 	(mve_vcaddq_rot90_m_<supf><mode>): Likewise.
! 	(mve_veorq_m_<supf><mode>): Likewise.
! 	(mve_vhaddq_m_n_<supf><mode>): Likewise.
! 	(mve_vhaddq_m_<supf><mode>): Likewise.
! 	(mve_vhsubq_m_n_<supf><mode>): Likewise.
! 	(mve_vhsubq_m_<supf><mode>): Likewise.
! 	(mve_vmaxq_m_<supf><mode>): Likewise.
! 	(mve_vminq_m_<supf><mode>): Likewise.
! 	(mve_vmladavaq_p_<supf><mode>): Likewise.
! 	(mve_vmlaq_m_n_<supf><mode>): Likewise.
! 	(mve_vmlasq_m_n_<supf><mode>): Likewise.
! 	(mve_vmulhq_m_<supf><mode>): Likewise.
! 	(mve_vmullbq_int_m_<supf><mode>): Likewise.
! 	(mve_vmulltq_int_m_<supf><mode>): Likewise.
! 	(mve_vmulq_m_n_<supf><mode>): Likewise.
! 	(mve_vmulq_m_<supf><mode>): Likewise.
! 	(mve_vornq_m_<supf><mode>): Likewise.
! 	(mve_vorrq_m_<supf><mode>): Likewise.
! 	(mve_vqaddq_m_n_<supf><mode>): Likewise.
! 	(mve_vqaddq_m_<supf><mode>): Likewise.
! 	(mve_vqdmlahq_m_n_<supf><mode>): Likewise.
! 	(mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
! 	(mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
! 	(mve_vqrshlq_m_<supf><mode>): Likewise.
! 	(mve_vqshlq_m_n_<supf><mode>): Likewise.
! 	(mve_vqshlq_m_<supf><mode>): Likewise.
! 	(mve_vqsubq_m_n_<supf><mode>): Likewise.
! 	(mve_vqsubq_m_<supf><mode>): Likewise.
! 	(mve_vrhaddq_m_<supf><mode>): Likewise.
! 	(mve_vrmulhq_m_<supf><mode>): Likewise.
! 	(mve_vrshlq_m_<supf><mode>): Likewise.
! 	(mve_vrshrq_m_n_<supf><mode>): Likewise.
! 	(mve_vshlq_m_n_<supf><mode>): Likewise.
! 	(mve_vshrq_m_n_<supf><mode>): Likewise.
! 	(mve_vsliq_m_n_<supf><mode>): Likewise.
! 	(mve_vsubq_m_n_<supf><mode>): Likewise.
! 	(mve_vhcaddq_rot270_m_s<mode>): Likewise.
! 	(mve_vhcaddq_rot90_m_s<mode>): Likewise.
! 	(mve_vmladavaxq_p_s<mode>): Likewise.
! 	(mve_vmlsdavaq_p_s<mode>): Likewise.
! 	(mve_vmlsdavaxq_p_s<mode>): Likewise.
! 	(mve_vqdmladhq_m_s<mode>): Likewise.
! 	(mve_vqdmladhxq_m_s<mode>): Likewise.
! 	(mve_vqdmlsdhq_m_s<mode>): Likewise.
! 	(mve_vqdmlsdhxq_m_s<mode>): Likewise.
! 	(mve_vqdmulhq_m_n_s<mode>): Likewise.
! 	(mve_vqdmulhq_m_s<mode>): Likewise.
! 	(mve_vqrdmladhq_m_s<mode>): Likewise.
! 	(mve_vqrdmladhxq_m_s<mode>): Likewise.
! 	(mve_vqrdmlsdhq_m_s<mode>): Likewise.
! 	(mve_vqrdmlsdhxq_m_s<mode>): Likewise.
! 	(mve_vqrdmulhq_m_n_s<mode>): Likewise.
! 	(mve_vqrdmulhq_m_s<mode>): Likewise.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
! 	Define builtin qualifier.
! 	(QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
! 	(QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
! 	(QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
! 	(QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
! 	(QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
! 	(QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
! 	(QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
! 	(vsubq_m_s8): Likewise.
! 	(vcvtq_m_n_f16_u16): Likewise.
! 	(vqshluq_m_n_s8): Likewise.
! 	(vabavq_p_s8): Likewise.
! 	(vsriq_m_n_u8): Likewise.
! 	(vshlq_m_u8): Likewise.
! 	(vsubq_m_u8): Likewise.
! 	(vabavq_p_u8): Likewise.
! 	(vshlq_m_s8): Likewise.
! 	(vcvtq_m_n_f16_s16): Likewise.
! 	(vsriq_m_n_s16): Likewise.
! 	(vsubq_m_s16): Likewise.
! 	(vcvtq_m_n_f32_u32): Likewise.
! 	(vqshluq_m_n_s16): Likewise.
! 	(vabavq_p_s16): Likewise.
! 	(vsriq_m_n_u16): Likewise.
! 	(vshlq_m_u16): Likewise.
! 	(vsubq_m_u16): Likewise.
! 	(vabavq_p_u16): Likewise.
! 	(vshlq_m_s16): Likewise.
! 	(vcvtq_m_n_f32_s32): Likewise.
! 	(vsriq_m_n_s32): Likewise.
! 	(vsubq_m_s32): Likewise.
! 	(vqshluq_m_n_s32): Likewise.
! 	(vabavq_p_s32): Likewise.
! 	(vsriq_m_n_u32): Likewise.
! 	(vshlq_m_u32): Likewise.
! 	(vsubq_m_u32): Likewise.
! 	(vabavq_p_u32): Likewise.
! 	(vshlq_m_s32): Likewise.
! 	(__arm_vsriq_m_n_s8): Define intrinsic.
! 	(__arm_vsubq_m_s8): Likewise.
! 	(__arm_vqshluq_m_n_s8): Likewise.
! 	(__arm_vabavq_p_s8): Likewise.
! 	(__arm_vsriq_m_n_u8): Likewise.
! 	(__arm_vshlq_m_u8): Likewise.
! 	(__arm_vsubq_m_u8): Likewise.
! 	(__arm_vabavq_p_u8): Likewise.
! 	(__arm_vshlq_m_s8): Likewise.
! 	(__arm_vsriq_m_n_s16): Likewise.
! 	(__arm_vsubq_m_s16): Likewise.
! 	(__arm_vqshluq_m_n_s16): Likewise.
! 	(__arm_vabavq_p_s16): Likewise.
! 	(__arm_vsriq_m_n_u16): Likewise.
! 	(__arm_vshlq_m_u16): Likewise.
! 	(__arm_vsubq_m_u16): Likewise.
! 	(__arm_vabavq_p_u16): Likewise.
! 	(__arm_vshlq_m_s16): Likewise.
! 	(__arm_vsriq_m_n_s32): Likewise.
! 	(__arm_vsubq_m_s32): Likewise.
! 	(__arm_vqshluq_m_n_s32): Likewise.
! 	(__arm_vabavq_p_s32): Likewise.
! 	(__arm_vsriq_m_n_u32): Likewise.
! 	(__arm_vshlq_m_u32): Likewise.
! 	(__arm_vsubq_m_u32): Likewise.
! 	(__arm_vabavq_p_u32): Likewise.
! 	(__arm_vshlq_m_s32): Likewise.
! 	(__arm_vcvtq_m_n_f16_u16): Likewise.
! 	(__arm_vcvtq_m_n_f16_s16): Likewise.
! 	(__arm_vcvtq_m_n_f32_u32): Likewise.
! 	(__arm_vcvtq_m_n_f32_s32): Likewise.
! 	(vcvtq_m_n): Define polymorphic variant.
! 	(vqshluq_m_n): Likewise.
! 	(vshlq_m): Likewise.
! 	(vsriq_m_n): Likewise.
! 	(vsubq_m): Likewise.
! 	(vabavq_p): Likewise.
! 	* config/arm/arm_mve_builtins.def
! 	(QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
! 	(QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
! 	(QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
! 	(QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
! 	(QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
! 	(QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
! 	(QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
! 	(QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
! 	* config/arm/mve.md (VABAVQ_P): Define iterator.
! 	(VSHLQ_M): Likewise.
! 	(VSRIQ_M_N): Likewise.
! 	(VSUBQ_M): Likewise.
! 	(VCVTQ_M_N_TO_F): Likewise.
! 	(mve_vabavq_p_<supf><mode>): Define RTL pattern.
! 	(mve_vqshluq_m_n_s<mode>): Likewise.
! 	(mve_vshlq_m_<supf><mode>): Likewise.
! 	(mve_vsriq_m_n_<supf><mode>): Likewise.
! 	(mve_vsubq_m_<supf><mode>): Likewise.
! 	(mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
! 	(vrmlsldavhaq_s32): Likewise.
! 	(vrmlsldavhaxq_s32): Likewise.
! 	(vaddlvaq_p_s32): Likewise.
! 	(vcvtbq_m_f16_f32): Likewise.
! 	(vcvtbq_m_f32_f16): Likewise.
! 	(vcvttq_m_f16_f32): Likewise.
! 	(vcvttq_m_f32_f16): Likewise.
! 	(vrev16q_m_s8): Likewise.
! 	(vrev32q_m_f16): Likewise.
! 	(vrmlaldavhq_p_s32): Likewise.
! 	(vrmlaldavhxq_p_s32): Likewise.
! 	(vrmlsldavhq_p_s32): Likewise.
! 	(vrmlsldavhxq_p_s32): Likewise.
! 	(vaddlvaq_p_u32): Likewise.
! 	(vrev16q_m_u8): Likewise.
! 	(vrmlaldavhq_p_u32): Likewise.
! 	(vmvnq_m_n_s16): Likewise.
! 	(vorrq_m_n_s16): Likewise.
! 	(vqrshrntq_n_s16): Likewise.
! 	(vqshrnbq_n_s16): Likewise.
! 	(vqshrntq_n_s16): Likewise.
! 	(vrshrnbq_n_s16): Likewise.
! 	(vrshrntq_n_s16): Likewise.
! 	(vshrnbq_n_s16): Likewise.
! 	(vshrntq_n_s16): Likewise.
! 	(vcmlaq_f16): Likewise.
! 	(vcmlaq_rot180_f16): Likewise.
! 	(vcmlaq_rot270_f16): Likewise.
! 	(vcmlaq_rot90_f16): Likewise.
! 	(vfmaq_f16): Likewise.
! 	(vfmaq_n_f16): Likewise.
! 	(vfmasq_n_f16): Likewise.
! 	(vfmsq_f16): Likewise.
! 	(vmlaldavaq_s16): Likewise.
! 	(vmlaldavaxq_s16): Likewise.
! 	(vmlsldavaq_s16): Likewise.
! 	(vmlsldavaxq_s16): Likewise.
! 	(vabsq_m_f16): Likewise.
! 	(vcvtmq_m_s16_f16): Likewise.
! 	(vcvtnq_m_s16_f16): Likewise.
! 	(vcvtpq_m_s16_f16): Likewise.
! 	(vcvtq_m_s16_f16): Likewise.
! 	(vdupq_m_n_f16): Likewise.
! 	(vmaxnmaq_m_f16): Likewise.
! 	(vmaxnmavq_p_f16): Likewise.
! 	(vmaxnmvq_p_f16): Likewise.
! 	(vminnmaq_m_f16): Likewise.
! 	(vminnmavq_p_f16): Likewise.
! 	(vminnmvq_p_f16): Likewise.
! 	(vmlaldavq_p_s16): Likewise.
! 	(vmlaldavxq_p_s16): Likewise.
! 	(vmlsldavq_p_s16): Likewise.
! 	(vmlsldavxq_p_s16): Likewise.
! 	(vmovlbq_m_s8): Likewise.
! 	(vmovltq_m_s8): Likewise.
! 	(vmovnbq_m_s16): Likewise.
! 	(vmovntq_m_s16): Likewise.
! 	(vnegq_m_f16): Likewise.
! 	(vpselq_f16): Likewise.
! 	(vqmovnbq_m_s16): Likewise.
! 	(vqmovntq_m_s16): Likewise.
! 	(vrev32q_m_s8): Likewise.
! 	(vrev64q_m_f16): Likewise.
! 	(vrndaq_m_f16): Likewise.
! 	(vrndmq_m_f16): Likewise.
! 	(vrndnq_m_f16): Likewise.
! 	(vrndpq_m_f16): Likewise.
! 	(vrndq_m_f16): Likewise.
! 	(vrndxq_m_f16): Likewise.
! 	(vcmpeqq_m_n_f16): Likewise.
! 	(vcmpgeq_m_f16): Likewise.
! 	(vcmpgeq_m_n_f16): Likewise.
! 	(vcmpgtq_m_f16): Likewise.
! 	(vcmpgtq_m_n_f16): Likewise.
! 	(vcmpleq_m_f16): Likewise.
! 	(vcmpleq_m_n_f16): Likewise.
! 	(vcmpltq_m_f16): Likewise.
! 	(vcmpltq_m_n_f16): Likewise.
! 	(vcmpneq_m_f16): Likewise.
! 	(vcmpneq_m_n_f16): Likewise.
! 	(vmvnq_m_n_u16): Likewise.
! 	(vorrq_m_n_u16): Likewise.
! 	(vqrshruntq_n_s16): Likewise.
! 	(vqshrunbq_n_s16): Likewise.
! 	(vqshruntq_n_s16): Likewise.
! 	(vcvtmq_m_u16_f16): Likewise.
! 	(vcvtnq_m_u16_f16): Likewise.
! 	(vcvtpq_m_u16_f16): Likewise.
! 	(vcvtq_m_u16_f16): Likewise.
! 	(vqmovunbq_m_s16): Likewise.
! 	(vqmovuntq_m_s16): Likewise.
! 	(vqrshrntq_n_u16): Likewise.
! 	(vqshrnbq_n_u16): Likewise.
! 	(vqshrntq_n_u16): Likewise.
! 	(vrshrnbq_n_u16): Likewise.
! 	(vrshrntq_n_u16): Likewise.
! 	(vshrnbq_n_u16): Likewise.
! 	(vshrntq_n_u16): Likewise.
! 	(vmlaldavaq_u16): Likewise.
! 	(vmlaldavaxq_u16): Likewise.
! 	(vmlaldavq_p_u16): Likewise.
! 	(vmlaldavxq_p_u16): Likewise.
! 	(vmovlbq_m_u8): Likewise.
! 	(vmovltq_m_u8): Likewise.
! 	(vmovnbq_m_u16): Likewise.
! 	(vmovntq_m_u16): Likewise.
! 	(vqmovnbq_m_u16): Likewise.
! 	(vqmovntq_m_u16): Likewise.
! 	(vrev32q_m_u8): Likewise.
! 	(vmvnq_m_n_s32): Likewise.
! 	(vorrq_m_n_s32): Likewise.
! 	(vqrshrntq_n_s32): Likewise.
! 	(vqshrnbq_n_s32): Likewise.
! 	(vqshrntq_n_s32): Likewise.
! 	(vrshrnbq_n_s32): Likewise.
! 	(vrshrntq_n_s32): Likewise.
! 	(vshrnbq_n_s32): Likewise.
! 	(vshrntq_n_s32): Likewise.
! 	(vcmlaq_f32): Likewise.
! 	(vcmlaq_rot180_f32): Likewise.
! 	(vcmlaq_rot270_f32): Likewise.
! 	(vcmlaq_rot90_f32): Likewise.
! 	(vfmaq_f32): Likewise.
! 	(vfmaq_n_f32): Likewise.
! 	(vfmasq_n_f32): Likewise.
! 	(vfmsq_f32): Likewise.
! 	(vmlaldavaq_s32): Likewise.
! 	(vmlaldavaxq_s32): Likewise.
! 	(vmlsldavaq_s32): Likewise.
! 	(vmlsldavaxq_s32): Likewise.
! 	(vabsq_m_f32): Likewise.
! 	(vcvtmq_m_s32_f32): Likewise.
! 	(vcvtnq_m_s32_f32): Likewise.
! 	(vcvtpq_m_s32_f32): Likewise.
! 	(vcvtq_m_s32_f32): Likewise.
! 	(vdupq_m_n_f32): Likewise.
! 	(vmaxnmaq_m_f32): Likewise.
! 	(vmaxnmavq_p_f32): Likewise.
! 	(vmaxnmvq_p_f32): Likewise.
! 	(vminnmaq_m_f32): Likewise.
! 	(vminnmavq_p_f32): Likewise.
! 	(vminnmvq_p_f32): Likewise.
! 	(vmlaldavq_p_s32): Likewise.
! 	(vmlaldavxq_p_s32): Likewise.
! 	(vmlsldavq_p_s32): Likewise.
! 	(vmlsldavxq_p_s32): Likewise.
! 	(vmovlbq_m_s16): Likewise.
! 	(vmovltq_m_s16): Likewise.
! 	(vmovnbq_m_s32): Likewise.
! 	(vmovntq_m_s32): Likewise.
! 	(vnegq_m_f32): Likewise.
! 	(vpselq_f32): Likewise.
! 	(vqmovnbq_m_s32): Likewise.
! 	(vqmovntq_m_s32): Likewise.
! 	(vrev32q_m_s16): Likewise.
! 	(vrev64q_m_f32): Likewise.
! 	(vrndaq_m_f32): Likewise.
! 	(vrndmq_m_f32): Likewise.
! 	(vrndnq_m_f32): Likewise.
! 	(vrndpq_m_f32): Likewise.
! 	(vrndq_m_f32): Likewise.
! 	(vrndxq_m_f32): Likewise.
! 	(vcmpeqq_m_n_f32): Likewise.
! 	(vcmpgeq_m_f32): Likewise.
! 	(vcmpgeq_m_n_f32): Likewise.
! 	(vcmpgtq_m_f32): Likewise.
! 	(vcmpgtq_m_n_f32): Likewise.
! 	(vcmpleq_m_f32): Likewise.
! 	(vcmpleq_m_n_f32): Likewise.
! 	(vcmpltq_m_f32): Likewise.
! 	(vcmpltq_m_n_f32): Likewise.
! 	(vcmpneq_m_f32): Likewise.
! 	(vcmpneq_m_n_f32): Likewise.
! 	(vmvnq_m_n_u32): Likewise.
! 	(vorrq_m_n_u32): Likewise.
! 	(vqrshruntq_n_s32): Likewise.
! 	(vqshrunbq_n_s32): Likewise.
! 	(vqshruntq_n_s32): Likewise.
! 	(vcvtmq_m_u32_f32): Likewise.
! 	(vcvtnq_m_u32_f32): Likewise.
! 	(vcvtpq_m_u32_f32): Likewise.
! 	(vcvtq_m_u32_f32): Likewise.
! 	(vqmovunbq_m_s32): Likewise.
! 	(vqmovuntq_m_s32): Likewise.
! 	(vqrshrntq_n_u32): Likewise.
! 	(vqshrnbq_n_u32): Likewise.
! 	(vqshrntq_n_u32): Likewise.
! 	(vrshrnbq_n_u32): Likewise.
! 	(vrshrntq_n_u32): Likewise.
! 	(vshrnbq_n_u32): Likewise.
! 	(vshrntq_n_u32): Likewise.
! 	(vmlaldavaq_u32): Likewise.
! 	(vmlaldavaxq_u32): Likewise.
! 	(vmlaldavq_p_u32): Likewise.
! 	(vmlaldavxq_p_u32): Likewise.
! 	(vmovlbq_m_u16): Likewise.
! 	(vmovltq_m_u16): Likewise.
! 	(vmovnbq_m_u32): Likewise.
! 	(vmovntq_m_u32): Likewise.
! 	(vqmovnbq_m_u32): Likewise.
! 	(vqmovntq_m_u32): Likewise.
! 	(vrev32q_m_u16): Likewise.
! 	(__arm_vrmlaldavhaxq_s32): Define intrinsic.
! 	(__arm_vrmlsldavhaq_s32): Likewise.
! 	(__arm_vrmlsldavhaxq_s32): Likewise.
! 	(__arm_vaddlvaq_p_s32): Likewise.
! 	(__arm_vrev16q_m_s8): Likewise.
! 	(__arm_vrmlaldavhq_p_s32): Likewise.
! 	(__arm_vrmlaldavhxq_p_s32): Likewise.
! 	(__arm_vrmlsldavhq_p_s32): Likewise.
! 	(__arm_vrmlsldavhxq_p_s32): Likewise.
! 	(__arm_vaddlvaq_p_u32): Likewise.
! 	(__arm_vrev16q_m_u8): Likewise.
! 	(__arm_vrmlaldavhq_p_u32): Likewise.
! 	(__arm_vmvnq_m_n_s16): Likewise.
! 	(__arm_vorrq_m_n_s16): Likewise.
! 	(__arm_vqrshrntq_n_s16): Likewise.
! 	(__arm_vqshrnbq_n_s16): Likewise.
! 	(__arm_vqshrntq_n_s16): Likewise.
! 	(__arm_vrshrnbq_n_s16): Likewise.
! 	(__arm_vrshrntq_n_s16): Likewise.
! 	(__arm_vshrnbq_n_s16): Likewise.
! 	(__arm_vshrntq_n_s16): Likewise.
! 	(__arm_vmlaldavaq_s16): Likewise.
! 	(__arm_vmlaldavaxq_s16): Likewise.
! 	(__arm_vmlsldavaq_s16): Likewise.
! 	(__arm_vmlsldavaxq_s16): Likewise.
! 	(__arm_vmlaldavq_p_s16): Likewise.
! 	(__arm_vmlaldavxq_p_s16): Likewise.
! 	(__arm_vmlsldavq_p_s16): Likewise.
! 	(__arm_vmlsldavxq_p_s16): Likewise.
! 	(__arm_vmovlbq_m_s8): Likewise.
! 	(__arm_vmovltq_m_s8): Likewise.
! 	(__arm_vmovnbq_m_s16): Likewise.
! 	(__arm_vmovntq_m_s16): Likewise.
! 	(__arm_vqmovnbq_m_s16): Likewise.
! 	(__arm_vqmovntq_m_s16): Likewise.
! 	(__arm_vrev32q_m_s8): Likewise.
! 	(__arm_vmvnq_m_n_u16): Likewise.
! 	(__arm_vorrq_m_n_u16): Likewise.
! 	(__arm_vqrshruntq_n_s16): Likewise.
! 	(__arm_vqshrunbq_n_s16): Likewise.
! 	(__arm_vqshruntq_n_s16): Likewise.
! 	(__arm_vqmovunbq_m_s16): Likewise.
! 	(__arm_vqmovuntq_m_s16): Likewise.
! 	(__arm_vqrshrntq_n_u16): Likewise.
! 	(__arm_vqshrnbq_n_u16): Likewise.
! 	(__arm_vqshrntq_n_u16): Likewise.
! 	(__arm_vrshrnbq_n_u16): Likewise.
! 	(__arm_vrshrntq_n_u16): Likewise.
! 	(__arm_vshrnbq_n_u16): Likewise.
! 	(__arm_vshrntq_n_u16): Likewise.
! 	(__arm_vmlaldavaq_u16): Likewise.
! 	(__arm_vmlaldavaxq_u16): Likewise.
! 	(__arm_vmlaldavq_p_u16): Likewise.
! 	(__arm_vmlaldavxq_p_u16): Likewise.
! 	(__arm_vmovlbq_m_u8): Likewise.
! 	(__arm_vmovltq_m_u8): Likewise.
! 	(__arm_vmovnbq_m_u16): Likewise.
! 	(__arm_vmovntq_m_u16): Likewise.
! 	(__arm_vqmovnbq_m_u16): Likewise.
! 	(__arm_vqmovntq_m_u16): Likewise.
! 	(__arm_vrev32q_m_u8): Likewise.
! 	(__arm_vmvnq_m_n_s32): Likewise.
! 	(__arm_vorrq_m_n_s32): Likewise.
! 	(__arm_vqrshrntq_n_s32): Likewise.
! 	(__arm_vqshrnbq_n_s32): Likewise.
! 	(__arm_vqshrntq_n_s32): Likewise.
! 	(__arm_vrshrnbq_n_s32): Likewise.
! 	(__arm_vrshrntq_n_s32): Likewise.
! 	(__arm_vshrnbq_n_s32): Likewise.
! 	(__arm_vshrntq_n_s32): Likewise.
! 	(__arm_vmlaldavaq_s32): Likewise.
! 	(__arm_vmlaldavaxq_s32): Likewise.
! 	(__arm_vmlsldavaq_s32): Likewise.
! 	(__arm_vmlsldavaxq_s32): Likewise.
! 	(__arm_vmlaldavq_p_s32): Likewise.
! 	(__arm_vmlaldavxq_p_s32): Likewise.
! 	(__arm_vmlsldavq_p_s32): Likewise.
! 	(__arm_vmlsldavxq_p_s32): Likewise.
! 	(__arm_vmovlbq_m_s16): Likewise.
! 	(__arm_vmovltq_m_s16): Likewise.
! 	(__arm_vmovnbq_m_s32): Likewise.
! 	(__arm_vmovntq_m_s32): Likewise.
! 	(__arm_vqmovnbq_m_s32): Likewise.
! 	(__arm_vqmovntq_m_s32): Likewise.
! 	(__arm_vrev32q_m_s16): Likewise.
! 	(__arm_vmvnq_m_n_u32): Likewise.
! 	(__arm_vorrq_m_n_u32): Likewise.
! 	(__arm_vqrshruntq_n_s32): Likewise.
! 	(__arm_vqshrunbq_n_s32): Likewise.
! 	(__arm_vqshruntq_n_s32): Likewise.
! 	(__arm_vqmovunbq_m_s32): Likewise.
! 	(__arm_vqmovuntq_m_s32): Likewise.
! 	(__arm_vqrshrntq_n_u32): Likewise.
! 	(__arm_vqshrnbq_n_u32): Likewise.
! 	(__arm_vqshrntq_n_u32): Likewise.
! 	(__arm_vrshrnbq_n_u32): Likewise.
! 	(__arm_vrshrntq_n_u32): Likewise.
! 	(__arm_vshrnbq_n_u32): Likewise.
! 	(__arm_vshrntq_n_u32): Likewise.
! 	(__arm_vmlaldavaq_u32): Likewise.
! 	(__arm_vmlaldavaxq_u32): Likewise.
! 	(__arm_vmlaldavq_p_u32): Likewise.
! 	(__arm_vmlaldavxq_p_u32): Likewise.
! 	(__arm_vmovlbq_m_u16): Likewise.
! 	(__arm_vmovltq_m_u16): Likewise.
! 	(__arm_vmovnbq_m_u32): Likewise.
! 	(__arm_vmovntq_m_u32): Likewise.
! 	(__arm_vqmovnbq_m_u32): Likewise.
! 	(__arm_vqmovntq_m_u32): Likewise.
! 	(__arm_vrev32q_m_u16): Likewise.
! 	(__arm_vcvtbq_m_f16_f32): Likewise.
! 	(__arm_vcvtbq_m_f32_f16): Likewise.
! 	(__arm_vcvttq_m_f16_f32): Likewise.
! 	(__arm_vcvttq_m_f32_f16): Likewise.
! 	(__arm_vrev32q_m_f16): Likewise.
! 	(__arm_vcmlaq_f16): Likewise.
! 	(__arm_vcmlaq_rot180_f16): Likewise.
! 	(__arm_vcmlaq_rot270_f16): Likewise.
! 	(__arm_vcmlaq_rot90_f16): Likewise.
! 	(__arm_vfmaq_f16): Likewise.
! 	(__arm_vfmaq_n_f16): Likewise.
! 	(__arm_vfmasq_n_f16): Likewise.
! 	(__arm_vfmsq_f16): Likewise.
! 	(__arm_vabsq_m_f16): Likewise.
! 	(__arm_vcvtmq_m_s16_f16): Likewise.
! 	(__arm_vcvtnq_m_s16_f16): Likewise.
! 	(__arm_vcvtpq_m_s16_f16): Likewise.
! 	(__arm_vcvtq_m_s16_f16): Likewise.
! 	(__arm_vdupq_m_n_f16): Likewise.
! 	(__arm_vmaxnmaq_m_f16): Likewise.
! 	(__arm_vmaxnmavq_p_f16): Likewise.
! 	(__arm_vmaxnmvq_p_f16): Likewise.
! 	(__arm_vminnmaq_m_f16): Likewise.
! 	(__arm_vminnmavq_p_f16): Likewise.
! 	(__arm_vminnmvq_p_f16): Likewise.
! 	(__arm_vnegq_m_f16): Likewise.
! 	(__arm_vpselq_f16): Likewise.
! 	(__arm_vrev64q_m_f16): Likewise.
! 	(__arm_vrndaq_m_f16): Likewise.
! 	(__arm_vrndmq_m_f16): Likewise.
! 	(__arm_vrndnq_m_f16): Likewise.
! 	(__arm_vrndpq_m_f16): Likewise.
! 	(__arm_vrndq_m_f16): Likewise.
! 	(__arm_vrndxq_m_f16): Likewise.
! 	(__arm_vcmpeqq_m_n_f16): Likewise.
! 	(__arm_vcmpgeq_m_f16): Likewise.
! 	(__arm_vcmpgeq_m_n_f16): Likewise.
! 	(__arm_vcmpgtq_m_f16): Likewise.
! 	(__arm_vcmpgtq_m_n_f16): Likewise.
! 	(__arm_vcmpleq_m_f16): Likewise.
! 	(__arm_vcmpleq_m_n_f16): Likewise.
! 	(__arm_vcmpltq_m_f16): Likewise.
! 	(__arm_vcmpltq_m_n_f16): Likewise.
! 	(__arm_vcmpneq_m_f16): Likewise.
! 	(__arm_vcmpneq_m_n_f16): Likewise.
! 	(__arm_vcvtmq_m_u16_f16): Likewise.
! 	(__arm_vcvtnq_m_u16_f16): Likewise.
! 	(__arm_vcvtpq_m_u16_f16): Likewise.
! 	(__arm_vcvtq_m_u16_f16): Likewise.
! 	(__arm_vcmlaq_f32): Likewise.
! 	(__arm_vcmlaq_rot180_f32): Likewise.
! 	(__arm_vcmlaq_rot270_f32): Likewise.
! 	(__arm_vcmlaq_rot90_f32): Likewise.
! 	(__arm_vfmaq_f32): Likewise.
! 	(__arm_vfmaq_n_f32): Likewise.
! 	(__arm_vfmasq_n_f32): Likewise.
! 	(__arm_vfmsq_f32): Likewise.
! 	(__arm_vabsq_m_f32): Likewise.
! 	(__arm_vcvtmq_m_s32_f32): Likewise.
! 	(__arm_vcvtnq_m_s32_f32): Likewise.
! 	(__arm_vcvtpq_m_s32_f32): Likewise.
! 	(__arm_vcvtq_m_s32_f32): Likewise.
! 	(__arm_vdupq_m_n_f32): Likewise.
! 	(__arm_vmaxnmaq_m_f32): Likewise.
! 	(__arm_vmaxnmavq_p_f32): Likewise.
! 	(__arm_vmaxnmvq_p_f32): Likewise.
! 	(__arm_vminnmaq_m_f32): Likewise.
! 	(__arm_vminnmavq_p_f32): Likewise.
! 	(__arm_vminnmvq_p_f32): Likewise.
! 	(__arm_vnegq_m_f32): Likewise.
! 	(__arm_vpselq_f32): Likewise.
! 	(__arm_vrev64q_m_f32): Likewise.
! 	(__arm_vrndaq_m_f32): Likewise.
! 	(__arm_vrndmq_m_f32): Likewise.
! 	(__arm_vrndnq_m_f32): Likewise.
! 	(__arm_vrndpq_m_f32): Likewise.
! 	(__arm_vrndq_m_f32): Likewise.
! 	(__arm_vrndxq_m_f32): Likewise.
! 	(__arm_vcmpeqq_m_n_f32): Likewise.
! 	(__arm_vcmpgeq_m_f32): Likewise.
! 	(__arm_vcmpgeq_m_n_f32): Likewise.
! 	(__arm_vcmpgtq_m_f32): Likewise.
! 	(__arm_vcmpgtq_m_n_f32): Likewise.
! 	(__arm_vcmpleq_m_f32): Likewise.
! 	(__arm_vcmpleq_m_n_f32): Likewise.
! 	(__arm_vcmpltq_m_f32): Likewise.
! 	(__arm_vcmpltq_m_n_f32): Likewise.
! 	(__arm_vcmpneq_m_f32): Likewise.
! 	(__arm_vcmpneq_m_n_f32): Likewise.
! 	(__arm_vcvtmq_m_u32_f32): Likewise.
! 	(__arm_vcvtnq_m_u32_f32): Likewise.
! 	(__arm_vcvtpq_m_u32_f32): Likewise.
! 	(__arm_vcvtq_m_u32_f32): Likewise.
! 	(vcvtq_m): Define polymorphic variant.
! 	(vabsq_m): Likewise.
! 	(vcmlaq): Likewise.
! 	(vcmlaq_rot180): Likewise.
! 	(vcmlaq_rot270): Likewise.
! 	(vcmlaq_rot90): Likewise.
! 	(vcmpeqq_m_n): Likewise.
! 	(vcmpgeq_m_n): Likewise.
! 	(vrndxq_m): Likewise.
! 	(vrndq_m): Likewise.
! 	(vrndpq_m): Likewise.
! 	(vcmpgtq_m_n): Likewise.
! 	(vcmpgtq_m): Likewise.
! 	(vcmpleq_m): Likewise.
! 	(vcmpleq_m_n): Likewise.
! 	(vcmpltq_m_n): Likewise.
! 	(vcmpltq_m): Likewise.
! 	(vcmpneq_m): Likewise.
! 	(vcmpneq_m_n): Likewise.
! 	(vcvtbq_m): Likewise.
! 	(vcvttq_m): Likewise.
! 	(vcvtmq_m): Likewise.
! 	(vcvtnq_m): Likewise.
! 	(vcvtpq_m): Likewise.
! 	(vdupq_m_n): Likewise.
! 	(vfmaq_n): Likewise.
! 	(vfmaq): Likewise.
! 	(vfmasq_n): Likewise.
! 	(vfmsq): Likewise.
! 	(vmaxnmaq_m): Likewise.
! 	(vmaxnmavq_m): Likewise.
! 	(vmaxnmvq_m): Likewise.
! 	(vmaxnmavq_p): Likewise.
! 	(vmaxnmvq_p): Likewise.
! 	(vminnmaq_m): Likewise.
! 	(vminnmavq_p): Likewise.
! 	(vminnmvq_p): Likewise.
! 	(vrndnq_m): Likewise.
! 	(vrndaq_m): Likewise.
! 	(vrndmq_m): Likewise.
! 	(vrev64q_m): Likewise.
! 	(vrev32q_m): Likewise.
! 	(vpselq): Likewise.
! 	(vnegq_m): Likewise.
! 	(vcmpgeq_m): Likewise.
! 	(vshrntq_n): Likewise.
! 	(vrshrntq_n): Likewise.
! 	(vmovlbq_m): Likewise.
! 	(vmovnbq_m): Likewise.
! 	(vmovntq_m): Likewise.
! 	(vmvnq_m_n): Likewise.
! 	(vmvnq_m): Likewise.
! 	(vshrnbq_n): Likewise.
! 	(vrshrnbq_n): Likewise.
! 	(vqshruntq_n): Likewise.
! 	(vrev16q_m): Likewise.
! 	(vqshrunbq_n): Likewise.
! 	(vqshrntq_n): Likewise.
! 	(vqrshruntq_n): Likewise.
! 	(vqrshrntq_n): Likewise.
! 	(vqshrnbq_n): Likewise.
! 	(vqmovuntq_m): Likewise.
! 	(vqmovntq_m): Likewise.
! 	(vqmovnbq_m): Likewise.
! 	(vorrq_m_n): Likewise.
! 	(vmovltq_m): Likewise.
! 	(vqmovunbq_m): Likewise.
! 	(vaddlvaq_p): Likewise.
! 	(vmlaldavaq): Likewise.
! 	(vmlaldavaxq): Likewise.
! 	(vmlaldavq_p): Likewise.
! 	(vmlaldavxq_p): Likewise.
! 	(vmlsldavaq): Likewise.
! 	(vmlsldavaxq): Likewise.
! 	(vmlsldavq_p): Likewise.
! 	(vmlsldavxq_p): Likewise.
! 	(vrmlaldavhaxq): Likewise.
! 	(vrmlaldavhq_p): Likewise.
! 	(vrmlaldavhxq_p): Likewise.
! 	(vrmlsldavhaq): Likewise.
! 	(vrmlsldavhaxq): Likewise.
! 	(vrmlsldavhq_p): Likewise.
! 	(vrmlsldavhxq_p): Likewise.
! 	* config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
! 	builtin qualifier.
! 	(TERNOP_NONE_NONE_NONE_IMM): Likewise.
! 	(TERNOP_NONE_NONE_NONE_NONE): Likewise.
! 	(TERNOP_NONE_NONE_NONE_UNONE): Likewise.
! 	(TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
! 	(TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
! 	(TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
! 	(TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
! 	(TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
! 	(TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
! 	* config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
! 	(MVE_pred3): Likewise.
! 	(MVE_constraint1): Likewise.
! 	(MVE_pred1): Likewise.
! 	(VMLALDAVQ_P): Define iterator.
! 	(VQMOVNBQ_M): Likewise.
! 	(VMOVLTQ_M): Likewise.
! 	(VMOVNBQ_M): Likewise.
! 	(VRSHRNTQ_N): Likewise.
! 	(VORRQ_M_N): Likewise.
! 	(VREV32Q_M): Likewise.
! 	(VREV16Q_M): Likewise.
! 	(VQRSHRNTQ_N): Likewise.
! 	(VMOVNTQ_M): Likewise.
! 	(VMOVLBQ_M): Likewise.
! 	(VMLALDAVAQ): Likewise.
! 	(VQSHRNBQ_N): Likewise.
! 	(VSHRNBQ_N): Likewise.
! 	(VRSHRNBQ_N): Likewise.
! 	(VMLALDAVXQ_P): Likewise.
! 	(VQMOVNTQ_M): Likewise.
! 	(VMVNQ_M_N): Likewise.
! 	(VQSHRNTQ_N): Likewise.
! 	(VMLALDAVAXQ): Likewise.
! 	(VSHRNTQ_N): Likewise.
! 	(VCVTMQ_M): Likewise.
! 	(VCVTNQ_M): Likewise.
! 	(VCVTPQ_M): Likewise.
! 	(VCVTQ_M_N_FROM_F): Likewise.
! 	(VCVTQ_M_FROM_F): Likewise.
! 	(VRMLALDAVHQ_P): Likewise.
! 	(VADDLVAQ_P): Likewise.
! 	(mve_vrndq_m_f<mode>): Define RTL pattern.
! 	(mve_vabsq_m_f<mode>): Likewise.
! 	(mve_vaddlvaq_p_<supf>v4si): Likewise.
! 	(mve_vcmlaq_f<mode>): Likewise.
! 	(mve_vcmlaq_rot180_f<mode>): Likewise.
! 	(mve_vcmlaq_rot270_f<mode>): Likewise.
! 	(mve_vcmlaq_rot90_f<mode>): Likewise.
! 	(mve_vcmpeqq_m_n_f<mode>): Likewise.
! 	(mve_vcmpgeq_m_f<mode>): Likewise.
! 	(mve_vcmpgeq_m_n_f<mode>): Likewise.
! 	(mve_vcmpgtq_m_f<mode>): Likewise.
! 	(mve_vcmpgtq_m_n_f<mode>): Likewise.
! 	(mve_vcmpleq_m_f<mode>): Likewise.
! 	(mve_vcmpleq_m_n_f<mode>): Likewise.
! 	(mve_vcmpltq_m_f<mode>): Likewise.
! 	(mve_vcmpltq_m_n_f<mode>): Likewise.
! 	(mve_vcmpneq_m_f<mode>): Likewise.
! 	(mve_vcmpneq_m_n_f<mode>): Likewise.
! 	(mve_vcvtbq_m_f16_f32v8hf): Likewise.
! 	(mve_vcvtbq_m_f32_f16v4sf): Likewise.
! 	(mve_vcvttq_m_f16_f32v8hf): Likewise.
! 	(mve_vcvttq_m_f32_f16v4sf): Likewise.
! 	(mve_vdupq_m_n_f<mode>): Likewise.
! 	(mve_vfmaq_f<mode>): Likewise.
! 	(mve_vfmaq_n_f<mode>): Likewise.
! 	(mve_vfmasq_n_f<mode>): Likewise.
! 	(mve_vfmsq_f<mode>): Likewise.
! 	(mve_vmaxnmaq_m_f<mode>): Likewise.
! 	(mve_vmaxnmavq_p_f<mode>): Likewise.
! 	(mve_vmaxnmvq_p_f<mode>): Likewise.
! 	(mve_vminnmaq_m_f<mode>): Likewise.
! 	(mve_vminnmavq_p_f<mode>): Likewise.
! 	(mve_vminnmvq_p_f<mode>): Likewise.
! 	(mve_vmlaldavaq_<supf><mode>): Likewise.
! 	(mve_vmlaldavaxq_<supf><mode>): Likewise.
! 	(mve_vmlaldavq_p_<supf><mode>): Likewise.
! 	(mve_vmlaldavxq_p_<supf><mode>): Likewise.
! 	(mve_vmlsldavaq_s<mode>): Likewise.
! 	(mve_vmlsldavaxq_s<mode>): Likewise.
! 	(mve_vmlsldavq_p_s<mode>): Likewise.
! 	(mve_vmlsldavxq_p_s<mode>): Likewise.
! 	(mve_vmovlbq_m_<supf><mode>): Likewise.
! 	(mve_vmovltq_m_<supf><mode>): Likewise.
! 	(mve_vmovnbq_m_<supf><mode>): Likewise.
! 	(mve_vmovntq_m_<supf><mode>): Likewise.
! 	(mve_vmvnq_m_n_<supf><mode>): Likewise.
! 	(mve_vnegq_m_f<mode>): Likewise.
! 	(mve_vorrq_m_n_<supf><mode>): Likewise.
! 	(mve_vpselq_f<mode>): Likewise.
! 	(mve_vqmovnbq_m_<supf><mode>): Likewise.
! 	(mve_vqmovntq_m_<supf><mode>): Likewise.
! 	(mve_vqmovunbq_m_s<mode>): Likewise.
! 	(mve_vqmovuntq_m_s<mode>): Likewise.
! 	(mve_vqrshrntq_n_<supf><mode>): Likewise.
! 	(mve_vqrshruntq_n_s<mode>): Likewise.
! 	(mve_vqshrnbq_n_<supf><mode>): Likewise.
! 	(mve_vqshrntq_n_<supf><mode>): Likewise.
! 	(mve_vqshrunbq_n_s<mode>): Likewise.
! 	(mve_vqshruntq_n_s<mode>): Likewise.
! 	(mve_vrev32q_m_fv8hf): Likewise.
! 	(mve_vrev32q_m_<supf><mode>): Likewise.
! 	(mve_vrev64q_m_f<mode>): Likewise.
! 	(mve_vrmlaldavhaxq_sv4si): Likewise.
! 	(mve_vrmlaldavhxq_p_sv4si): Likewise.
! 	(mve_vrmlsldavhaxq_sv4si): Likewise.
! 	(mve_vrmlsldavhq_p_sv4si): Likewise.
! 	(mve_vrmlsldavhxq_p_sv4si): Likewise.
! 	(mve_vrndaq_m_f<mode>): Likewise.
! 	(mve_vrndmq_m_f<mode>): Likewise.
! 	(mve_vrndnq_m_f<mode>): Likewise.
! 	(mve_vrndpq_m_f<mode>): Likewise.
! 	(mve_vrndxq_m_f<mode>): Likewise.
! 	(mve_vrshrnbq_n_<supf><mode>): Likewise.
! 	(mve_vrshrntq_n_<supf><mode>): Likewise.
! 	(mve_vshrnbq_n_<supf><mode>): Likewise.
! 	(mve_vshrntq_n_<supf><mode>): Likewise.
! 	(mve_vcvtmq_m_<supf><mode>): Likewise.
! 	(mve_vcvtpq_m_<supf><mode>): Likewise.
! 	(mve_vcvtnq_m_<supf><mode>): Likewise.
! 	(mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
! 	(mve_vrev16q_m_<supf>v16qi): Likewise.
! 	(mve_vcvtq_m_from_f_<supf><mode>): Likewise.
! 	(mve_vrmlaldavhq_p_<supf>v4si): Likewise.
! 	(mve_vrmlsldavhaq_sv4si): Likewise.
  
! 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (vpselq_u8): Define macro.
! 	(vpselq_s8): Likewise.
! 	(vrev64q_m_u8): Likewise.
! 	(vqrdmlashq_n_u8): Likewise.
! 	(vqrdmlahq_n_u8): Likewise.
! 	(vqdmlahq_n_u8): Likewise.
! 	(vmvnq_m_u8): Likewise.
! 	(vmlasq_n_u8): Likewise.
! 	(vmlaq_n_u8): Likewise.
! 	(vmladavq_p_u8): Likewise.
! 	(vmladavaq_u8): Likewise.
! 	(vminvq_p_u8): Likewise.
! 	(vmaxvq_p_u8): Likewise.
! 	(vdupq_m_n_u8): Likewise.
! 	(vcmpneq_m_u8): Likewise.
! 	(vcmpneq_m_n_u8): Likewise.
! 	(vcmphiq_m_u8): Likewise.
! 	(vcmphiq_m_n_u8): Likewise.
! 	(vcmpeqq_m_u8): Likewise.
! 	(vcmpeqq_m_n_u8): Likewise.
! 	(vcmpcsq_m_u8): Likewise.
! 	(vcmpcsq_m_n_u8): Likewise.
! 	(vclzq_m_u8): Likewise.
! 	(vaddvaq_p_u8): Likewise.
! 	(vsriq_n_u8): Likewise.
! 	(vsliq_n_u8): Likewise.
! 	(vshlq_m_r_u8): Likewise.
! 	(vrshlq_m_n_u8): Likewise.
! 	(vqshlq_m_r_u8): Likewise.
! 	(vqrshlq_m_n_u8): Likewise.
! 	(vminavq_p_s8): Likewise.
! 	(vminaq_m_s8): Likewise.
! 	(vmaxavq_p_s8): Likewise.
! 	(vmaxaq_m_s8): Likewise.
! 	(vcmpneq_m_s8): Likewise.
! 	(vcmpneq_m_n_s8): Likewise.
! 	(vcmpltq_m_s8): Likewise.
! 	(vcmpltq_m_n_s8): Likewise.
! 	(vcmpleq_m_s8): Likewise.
! 	(vcmpleq_m_n_s8): Likewise.
! 	(vcmpgtq_m_s8): Likewise.
! 	(vcmpgtq_m_n_s8): Likewise.
! 	(vcmpgeq_m_s8): Likewise.
! 	(vcmpgeq_m_n_s8): Likewise.
! 	(vcmpeqq_m_s8): Likewise.
! 	(vcmpeqq_m_n_s8): Likewise.
! 	(vshlq_m_r_s8): Likewise.
! 	(vrshlq_m_n_s8): Likewise.
! 	(vrev64q_m_s8): Likewise.
! 	(vqshlq_m_r_s8): Likewise.
! 	(vqrshlq_m_n_s8): Likewise.
! 	(vqnegq_m_s8): Likewise.
! 	(vqabsq_m_s8): Likewise.
! 	(vnegq_m_s8): Likewise.
! 	(vmvnq_m_s8): Likewise.
! 	(vmlsdavxq_p_s8): Likewise.
! 	(vmlsdavq_p_s8): Likewise.
! 	(vmladavxq_p_s8): Likewise.
! 	(vmladavq_p_s8): Likewise.
! 	(vminvq_p_s8): Likewise.
! 	(vmaxvq_p_s8): Likewise.
! 	(vdupq_m_n_s8): Likewise.
! 	(vclzq_m_s8): Likewise.
! 	(vclsq_m_s8): Likewise.
! 	(vaddvaq_p_s8): Likewise.
! 	(vabsq_m_s8): Likewise.
! 	(vqrdmlsdhxq_s8): Likewise.
! 	(vqrdmlsdhq_s8): Likewise.
! 	(vqrdmlashq_n_s8): Likewise.
! 	(vqrdmlahq_n_s8): Likewise.
! 	(vqrdmladhxq_s8): Likewise.
! 	(vqrdmladhq_s8): Likewise.
! 	(vqdmlsdhxq_s8): Likewise.
! 	(vqdmlsdhq_s8): Likewise.
! 	(vqdmlahq_n_s8): Likewise.
! 	(vqdmladhxq_s8): Likewise.
! 	(vqdmladhq_s8): Likewise.
! 	(vmlsdavaxq_s8): Likewise.
! 	(vmlsdavaq_s8): Likewise.
! 	(vmlasq_n_s8): Likewise.
! 	(vmlaq_n_s8): Likewise.
! 	(vmladavaxq_s8): Likewise.
! 	(vmladavaq_s8): Likewise.
! 	(vsriq_n_s8): Likewise.
! 	(vsliq_n_s8): Likewise.
! 	(vpselq_u16): Likewise.
! 	(vpselq_s16): Likewise.
! 	(vrev64q_m_u16): Likewise.
! 	(vqrdmlashq_n_u16): Likewise.
! 	(vqrdmlahq_n_u16): Likewise.
! 	(vqdmlahq_n_u16): Likewise.
! 	(vmvnq_m_u16): Likewise.
! 	(vmlasq_n_u16): Likewise.
! 	(vmlaq_n_u16): Likewise.
! 	(vmladavq_p_u16): Likewise.
! 	(vmladavaq_u16): Likewise.
! 	(vminvq_p_u16): Likewise.
! 	(vmaxvq_p_u16): Likewise.
! 	(vdupq_m_n_u16): Likewise.
! 	(vcmpneq_m_u16): Likewise.
! 	(vcmpneq_m_n_u16): Likewise.
! 	(vcmphiq_m_u16): Likewise.
! 	(vcmphiq_m_n_u16): Likewise.
! 	(vcmpeqq_m_u16): Likewise.
! 	(vcmpeqq_m_n_u16): Likewise.
! 	(vcmpcsq_m_u16): Likewise.
! 	(vcmpcsq_m_n_u16): Likewise.
! 	(vclzq_m_u16): Likewise.
! 	(vaddvaq_p_u16): Likewise.
! 	(vsriq_n_u16): Likewise.
! 	(vsliq_n_u16): Likewise.
! 	(vshlq_m_r_u16): Likewise.
! 	(vrshlq_m_n_u16): Likewise.
! 	(vqshlq_m_r_u16): Likewise.
! 	(vqrshlq_m_n_u16): Likewise.
! 	(vminavq_p_s16): Likewise.
! 	(vminaq_m_s16): Likewise.
! 	(vmaxavq_p_s16): Likewise.
! 	(vmaxaq_m_s16): Likewise.
! 	(vcmpneq_m_s16): Likewise.
! 	(vcmpneq_m_n_s16): Likewise.
! 	(vcmpltq_m_s16): Likewise.
! 	(vcmpltq_m_n_s16): Likewise.
! 	(vcmpleq_m_s16): Likewise.
! 	(vcmpleq_m_n_s16): Likewise.
! 	(vcmpgtq_m_s16): Likewise.
! 	(vcmpgtq_m_n_s16): Likewise.
! 	(vcmpgeq_m_s16): Likewise.
! 	(vcmpgeq_m_n_s16): Likewise.
! 	(vcmpeqq_m_s16): Likewise.
! 	(vcmpeqq_m_n_s16): Likewise.
! 	(vshlq_m_r_s16): Likewise.
! 	(vrshlq_m_n_s16): Likewise.
! 	(vrev64q_m_s16): Likewise.
! 	(vqshlq_m_r_s16): Likewise.
! 	(vqrshlq_m_n_s16): Likewise.
! 	(vqnegq_m_s16): Likewise.
! 	(vqabsq_m_s16): Likewise.
! 	(vnegq_m_s16): Likewise.
! 	(vmvnq_m_s16): Likewise.
! 	(vmlsdavxq_p_s16): Likewise.
! 	(vmlsdavq_p_s16): Likewise.
! 	(vmladavxq_p_s16): Likewise.
! 	(vmladavq_p_s16): Likewise.
! 	(vminvq_p_s16): Likewise.
! 	(vmaxvq_p_s16): Likewise.
! 	(vdupq_m_n_s16): Likewise.
! 	(vclzq_m_s16): Likewise.
! 	(vclsq_m_s16): Likewise.
! 	(vaddvaq_p_s16): Likewise.
! 	(vabsq_m_s16): Likewise.
! 	(vqrdmlsdhxq_s16): Likewise.
! 	(vqrdmlsdhq_s16): Likewise.
! 	(vqrdmlashq_n_s16): Likewise.
! 	(vqrdmlahq_n_s16): Likewise.
! 	(vqrdmladhxq_s16): Likewise.
! 	(vqrdmladhq_s16): Likewise.
! 	(vqdmlsdhxq_s16): Likewise.
! 	(vqdmlsdhq_s16): Likewise.
! 	(vqdmlahq_n_s16): Likewise.
! 	(vqdmladhxq_s16): Likewise.
! 	(vqdmladhq_s16): Likewise.
! 	(vmlsdavaxq_s16): Likewise.
! 	(vmlsdavaq_s16): Likewise.
! 	(vmlasq_n_s16): Likewise.
! 	(vmlaq_n_s16): Likewise.
! 	(vmladavaxq_s16): Likewise.
! 	(vmladavaq_s16): Likewise.
! 	(vsriq_n_s16): Likewise.
! 	(vsliq_n_s16): Likewise.
! 	(vpselq_u32): Likewise.
! 	(vpselq_s32): Likewise.
! 	(vrev64q_m_u32): Likewise.
! 	(vqrdmlashq_n_u32): Likewise.
! 	(vqrdmlahq_n_u32): Likewise.
! 	(vqdmlahq_n_u32): Likewise.
! 	(vmvnq_m_u32): Likewise.
! 	(vmlasq_n_u32): Likewise.
! 	(vmlaq_n_u32): Likewise.
! 	(vmladavq_p_u32): Likewise.
! 	(vmladavaq_u32): Likewise.
! 	(vminvq_p_u32): Likewise.
! 	(vmaxvq_p_u32): Likewise.
! 	(vdupq_m_n_u32): Likewise.
! 	(vcmpneq_m_u32): Likewise.
! 	(vcmpneq_m_n_u32): Likewise.
! 	(vcmphiq_m_u32): Likewise.
! 	(vcmphiq_m_n_u32): Likewise.
! 	(vcmpeqq_m_u32): Likewise.
! 	(vcmpeqq_m_n_u32): Likewise.
! 	(vcmpcsq_m_u32): Likewise.
! 	(vcmpcsq_m_n_u32): Likewise.
! 	(vclzq_m_u32): Likewise.
! 	(vaddvaq_p_u32): Likewise.
! 	(vsriq_n_u32): Likewise.
! 	(vsliq_n_u32): Likewise.
! 	(vshlq_m_r_u32): Likewise.
! 	(vrshlq_m_n_u32): Likewise.
! 	(vqshlq_m_r_u32): Likewise.
! 	(vqrshlq_m_n_u32): Likewise.
! 	(vminavq_p_s32): Likewise.
! 	(vminaq_m_s32): Likewise.
! 	(vmaxavq_p_s32): Likewise.
! 	(vmaxaq_m_s32): Likewise.
! 	(vcmpneq_m_s32): Likewise.
! 	(vcmpneq_m_n_s32): Likewise.
! 	(vcmpltq_m_s32): Likewise.
! 	(vcmpltq_m_n_s32): Likewise.
! 	(vcmpleq_m_s32): Likewise.
! 	(vcmpleq_m_n_s32): Likewise.
! 	(vcmpgtq_m_s32): Likewise.
! 	(vcmpgtq_m_n_s32): Likewise.
! 	(vcmpgeq_m_s32): Likewise.
! 	(vcmpgeq_m_n_s32): Likewise.
! 	(vcmpeqq_m_s32): Likewise.
! 	(vcmpeqq_m_n_s32): Likewise.
! 	(vshlq_m_r_s32): Likewise.
! 	(vrshlq_m_n_s32): Likewise.
! 	(vrev64q_m_s32): Likewise.
! 	(vqshlq_m_r_s32): Likewise.
! 	(vqrshlq_m_n_s32): Likewise.
! 	(vqnegq_m_s32): Likewise.
! 	(vqabsq_m_s32): Likewise.
! 	(vnegq_m_s32): Likewise.
! 	(vmvnq_m_s32): Likewise.
! 	(vmlsdavxq_p_s32): Likewise.
! 	(vmlsdavq_p_s32): Likewise.
! 	(vmladavxq_p_s32): Likewise.
! 	(vmladavq_p_s32): Likewise.
! 	(vminvq_p_s32): Likewise.
! 	(vmaxvq_p_s32): Likewise.
! 	(vdupq_m_n_s32): Likewise.
! 	(vclzq_m_s32): Likewise.
! 	(vclsq_m_s32): Likewise.
! 	(vaddvaq_p_s32): Likewise.
! 	(vabsq_m_s32): Likewise.
! 	(vqrdmlsdhxq_s32): Likewise.
! 	(vqrdmlsdhq_s32): Likewise.
! 	(vqrdmlashq_n_s32): Likewise.
! 	(vqrdmlahq_n_s32): Likewise.
! 	(vqrdmladhxq_s32): Likewise.
! 	(vqrdmladhq_s32): Likewise.
! 	(vqdmlsdhxq_s32): Likewise.
! 	(vqdmlsdhq_s32): Likewise.
! 	(vqdmlahq_n_s32): Likewise.
! 	(vqdmladhxq_s32): Likewise.
! 	(vqdmladhq_s32): Likewise.
! 	(vmlsdavaxq_s32): Likewise.
! 	(vmlsdavaq_s32): Likewise.
! 	(vmlasq_n_s32): Likewise.
! 	(vmlaq_n_s32): Likewise.
! 	(vmladavaxq_s32): Likewise.
! 	(vmladavaq_s32): Likewise.
! 	(vsriq_n_s32): Likewise.
! 	(vsliq_n_s32): Likewise.
! 	(vpselq_u64): Likewise.
! 	(vpselq_s64): Likewise.
! 	(__arm_vpselq_u8): Define intrinsic.
! 	(__arm_vpselq_s8): Likewise.
! 	(__arm_vrev64q_m_u8): Likewise.
! 	(__arm_vqrdmlashq_n_u8): Likewise.
! 	(__arm_vqrdmlahq_n_u8): Likewise.
! 	(__arm_vqdmlahq_n_u8): Likewise.
! 	(__arm_vmvnq_m_u8): Likewise.
! 	(__arm_vmlasq_n_u8): Likewise.
! 	(__arm_vmlaq_n_u8): Likewise.
! 	(__arm_vmladavq_p_u8): Likewise.
! 	(__arm_vmladavaq_u8): Likewise.
! 	(__arm_vminvq_p_u8): Likewise.
! 	(__arm_vmaxvq_p_u8): Likewise.
! 	(__arm_vdupq_m_n_u8): Likewise.
! 	(__arm_vcmpneq_m_u8): Likewise.
! 	(__arm_vcmpneq_m_n_u8): Likewise.
! 	(__arm_vcmphiq_m_u8): Likewise.
! 	(__arm_vcmphiq_m_n_u8): Likewise.
! 	(__arm_vcmpeqq_m_u8): Likewise.
! 	(__arm_vcmpeqq_m_n_u8): Likewise.
! 	(__arm_vcmpcsq_m_u8): Likewise.
! 	(__arm_vcmpcsq_m_n_u8): Likewise.
! 	(__arm_vclzq_m_u8): Likewise.
! 	(__arm_vaddvaq_p_u8): Likewise.
! 	(__arm_vsriq_n_u8): Likewise.
! 	(__arm_vsliq_n_u8): Likewise.
! 	(__arm_vshlq_m_r_u8): Likewise.
! 	(__arm_vrshlq_m_n_u8): Likewise.
! 	(__arm_vqshlq_m_r_u8): Likewise.
! 	(__arm_vqrshlq_m_n_u8): Likewise.
! 	(__arm_vminavq_p_s8): Likewise.
! 	(__arm_vminaq_m_s8): Likewise.
! 	(__arm_vmaxavq_p_s8): Likewise.
! 	(__arm_vmaxaq_m_s8): Likewise.
! 	(__arm_vcmpneq_m_s8): Likewise.
! 	(__arm_vcmpneq_m_n_s8): Likewise.
! 	(__arm_vcmpltq_m_s8): Likewise.
! 	(__arm_vcmpltq_m_n_s8): Likewise.
! 	(__arm_vcmpleq_m_s8): Likewise.
! 	(__arm_vcmpleq_m_n_s8): Likewise.
! 	(__arm_vcmpgtq_m_s8): Likewise.
! 	(__arm_vcmpgtq_m_n_s8): Likewise.
! 	(__arm_vcmpgeq_m_s8): Likewise.
! 	(__arm_vcmpgeq_m_n_s8): Likewise.
! 	(__arm_vcmpeqq_m_s8): Likewise.
! 	(__arm_vcmpeqq_m_n_s8): Likewise.
! 	(__arm_vshlq_m_r_s8): Likewise.
! 	(__arm_vrshlq_m_n_s8): Likewise.
! 	(__arm_vrev64q_m_s8): Likewise.
! 	(__arm_vqshlq_m_r_s8): Likewise.
! 	(__arm_vqrshlq_m_n_s8): Likewise.
! 	(__arm_vqnegq_m_s8): Likewise.
! 	(__arm_vqabsq_m_s8): Likewise.
! 	(__arm_vnegq_m_s8): Likewise.
! 	(__arm_vmvnq_m_s8): Likewise.
! 	(__arm_vmlsdavxq_p_s8): Likewise.
! 	(__arm_vmlsdavq_p_s8): Likewise.
! 	(__arm_vmladavxq_p_s8): Likewise.
! 	(__arm_vmladavq_p_s8): Likewise.
! 	(__arm_vminvq_p_s8): Likewise.
! 	(__arm_vmaxvq_p_s8): Likewise.
! 	(__arm_vdupq_m_n_s8): Likewise.
! 	(__arm_vclzq_m_s8): Likewise.
! 	(__arm_vclsq_m_s8): Likewise.
! 	(__arm_vaddvaq_p_s8): Likewise.
! 	(__arm_vabsq_m_s8): Likewise.
! 	(__arm_vqrdmlsdhxq_s8): Likewise.
! 	(__arm_vqrdmlsdhq_s8): Likewise.
! 	(__arm_vqrdmlashq_n_s8): Likewise.
! 	(__arm_vqrdmlahq_n_s8): Likewise.
! 	(__arm_vqrdmladhxq_s8): Likewise.
! 	(__arm_vqrdmladhq_s8): Likewise.
! 	(__arm_vqdmlsdhxq_s8): Likewise.
! 	(__arm_vqdmlsdhq_s8): Likewise.
! 	(__arm_vqdmlahq_n_s8): Likewise.
! 	(__arm_vqdmladhxq_s8): Likewise.
! 	(__arm_vqdmladhq_s8): Likewise.
! 	(__arm_vmlsdavaxq_s8): Likewise.
! 	(__arm_vmlsdavaq_s8): Likewise.
! 	(__arm_vmlasq_n_s8): Likewise.
! 	(__arm_vmlaq_n_s8): Likewise.
! 	(__arm_vmladavaxq_s8): Likewise.
! 	(__arm_vmladavaq_s8): Likewise.
! 	(__arm_vsriq_n_s8): Likewise.
! 	(__arm_vsliq_n_s8): Likewise.
! 	(__arm_vpselq_u16): Likewise.
! 	(__arm_vpselq_s16): Likewise.
! 	(__arm_vrev64q_m_u16): Likewise.
! 	(__arm_vqrdmlashq_n_u16): Likewise.
! 	(__arm_vqrdmlahq_n_u16): Likewise.
! 	(__arm_vqdmlahq_n_u16): Likewise.
! 	(__arm_vmvnq_m_u16): Likewise.
! 	(__arm_vmlasq_n_u16): Likewise.
! 	(__arm_vmlaq_n_u16): Likewise.
! 	(__arm_vmladavq_p_u16): Likewise.
! 	(__arm_vmladavaq_u16): Likewise.
! 	(__arm_vminvq_p_u16): Likewise.
! 	(__arm_vmaxvq_p_u16): Likewise.
! 	(__arm_vdupq_m_n_u16): Likewise.
! 	(__arm_vcmpneq_m_u16): Likewise.
! 	(__arm_vcmpneq_m_n_u16): Likewise.
! 	(__arm_vcmphiq_m_u16): Likewise.
! 	(__arm_vcmphiq_m_n_u16): Likewise.
! 	(__arm_vcmpeqq_m_u16): Likewise.
! 	(__arm_vcmpeqq_m_n_u16): Likewise.
! 	(__arm_vcmpcsq_m_u16): Likewise.
! 	(__arm_vcmpcsq_m_n_u16): Likewise.
! 	(__arm_vclzq_m_u16): Likewise.
! 	(__arm_vaddvaq_p_u16): Likewise.
! 	(__arm_vsriq_n_u16): Likewise.
! 	(__arm_vsliq_n_u16): Likewise.
! 	(__arm_vshlq_m_r_u16): Likewise.
! 	(__arm_vrshlq_m_n_u16): Likewise.
! 	(__arm_vqshlq_m_r_u16): Likewise.
! 	(__arm_vqrshlq_m_n_u16): Likewise.
! 	(__arm_vminavq_p_s16): Likewise.
! 	(__arm_vminaq_m_s16): Likewise.
! 	(__arm_vmaxavq_p_s16): Likewise.
! 	(__arm_vmaxaq_m_s16): Likewise.
! 	(__arm_vcmpneq_m_s16): Likewise.
! 	(__arm_vcmpneq_m_n_s16): Likewise.
! 	(__arm_vcmpltq_m_s16): Likewise.
! 	(__arm_vcmpltq_m_n_s16): Likewise.
! 	(__arm_vcmpleq_m_s16): Likewise.
! 	(__arm_vcmpleq_m_n_s16): Likewise.
! 	(__arm_vcmpgtq_m_s16): Likewise.
! 	(__arm_vcmpgtq_m_n_s16): Likewise.
! 	(__arm_vcmpgeq_m_s16): Likewise.
! 	(__arm_vcmpgeq_m_n_s16): Likewise.
! 	(__arm_vcmpeqq_m_s16): Likewise.
! 	(__arm_vcmpeqq_m_n_s16): Likewise.
! 	(__arm_vshlq_m_r_s16): Likewise.
! 	(__arm_vrshlq_m_n_s16): Likewise.
! 	(__arm_vrev64q_m_s16): Likewise.
! 	(__arm_vqshlq_m_r_s16): Likewise.
! 	(__arm_vqrshlq_m_n_s16): Likewise.
! 	(__arm_vqnegq_m_s16): Likewise.
! 	(__arm_vqabsq_m_s16): Likewise.
! 	(__arm_vnegq_m_s16): Likewise.
! 	(__arm_vmvnq_m_s16): Likewise.
! 	(__arm_vmlsdavxq_p_s16): Likewise.
! 	(__arm_vmlsdavq_p_s16): Likewise.
! 	(__arm_vmladavxq_p_s16): Likewise.
! 	(__arm_vmladavq_p_s16): Likewise.
! 	(__arm_vminvq_p_s16): Likewise.
! 	(__arm_vmaxvq_p_s16): Likewise.
! 	(__arm_vdupq_m_n_s16): Likewise.
! 	(__arm_vclzq_m_s16): Likewise.
! 	(__arm_vclsq_m_s16): Likewise.
! 	(__arm_vaddvaq_p_s16): Likewise.
! 	(__arm_vabsq_m_s16): Likewise.
! 	(__arm_vqrdmlsdhxq_s16): Likewise.
! 	(__arm_vqrdmlsdhq_s16): Likewise.
! 	(__arm_vqrdmlashq_n_s16): Likewise.
! 	(__arm_vqrdmlahq_n_s16): Likewise.
! 	(__arm_vqrdmladhxq_s16): Likewise.
! 	(__arm_vqrdmladhq_s16): Likewise.
! 	(__arm_vqdmlsdhxq_s16): Likewise.
! 	(__arm_vqdmlsdhq_s16): Likewise.
! 	(__arm_vqdmlahq_n_s16): Likewise.
! 	(__arm_vqdmladhxq_s16): Likewise.
! 	(__arm_vqdmladhq_s16): Likewise.
! 	(__arm_vmlsdavaxq_s16): Likewise.
! 	(__arm_vmlsdavaq_s16): Likewise.
! 	(__arm_vmlasq_n_s16): Likewise.
! 	(__arm_vmlaq_n_s16): Likewise.
! 	(__arm_vmladavaxq_s16): Likewise.
! 	(__arm_vmladavaq_s16): Likewise.
! 	(__arm_vsriq_n_s16): Likewise.
! 	(__arm_vsliq_n_s16): Likewise.
! 	(__arm_vpselq_u32): Likewise.
! 	(__arm_vpselq_s32): Likewise.
! 	(__arm_vrev64q_m_u32): Likewise.
! 	(__arm_vqrdmlashq_n_u32): Likewise.
! 	(__arm_vqrdmlahq_n_u32): Likewise.
! 	(__arm_vqdmlahq_n_u32): Likewise.
! 	(__arm_vmvnq_m_u32): Likewise.
! 	(__arm_vmlasq_n_u32): Likewise.
! 	(__arm_vmlaq_n_u32): Likewise.
! 	(__arm_vmladavq_p_u32): Likewise.
! 	(__arm_vmladavaq_u32): Likewise.
! 	(__arm_vminvq_p_u32): Likewise.
! 	(__arm_vmaxvq_p_u32): Likewise.
! 	(__arm_vdupq_m_n_u32): Likewise.
! 	(__arm_vcmpneq_m_u32): Likewise.
! 	(__arm_vcmpneq_m_n_u32): Likewise.
! 	(__arm_vcmphiq_m_u32): Likewise.
! 	(__arm_vcmphiq_m_n_u32): Likewise.
! 	(__arm_vcmpeqq_m_u32): Likewise.
! 	(__arm_vcmpeqq_m_n_u32): Likewise.
! 	(__arm_vcmpcsq_m_u32): Likewise.
! 	(__arm_vcmpcsq_m_n_u32): Likewise.
! 	(__arm_vclzq_m_u32): Likewise.
! 	(__arm_vaddvaq_p_u32): Likewise.
! 	(__arm_vsriq_n_u32): Likewise.
! 	(__arm_vsliq_n_u32): Likewise.
! 	(__arm_vshlq_m_r_u32): Likewise.
! 	(__arm_vrshlq_m_n_u32): Likewise.
! 	(__arm_vqshlq_m_r_u32): Likewise.
! 	(__arm_vqrshlq_m_n_u32): Likewise.
! 	(__arm_vminavq_p_s32): Likewise.
! 	(__arm_vminaq_m_s32): Likewise.
! 	(__arm_vmaxavq_p_s32): Likewise.
! 	(__arm_vmaxaq_m_s32): Likewise.
! 	(__arm_vcmpneq_m_s32): Likewise.
! 	(__arm_vcmpneq_m_n_s32): Likewise.
! 	(__arm_vcmpltq_m_s32): Likewise.
! 	(__arm_vcmpltq_m_n_s32): Likewise.
! 	(__arm_vcmpleq_m_s32): Likewise.
! 	(__arm_vcmpleq_m_n_s32): Likewise.
! 	(__arm_vcmpgtq_m_s32): Likewise.
! 	(__arm_vcmpgtq_m_n_s32): Likewise.
! 	(__arm_vcmpgeq_m_s32): Likewise.
! 	(__arm_vcmpgeq_m_n_s32): Likewise.
! 	(__arm_vcmpeqq_m_s32): Likewise.
! 	(__arm_vcmpeqq_m_n_s32): Likewise.
! 	(__arm_vshlq_m_r_s32): Likewise.
! 	(__arm_vrshlq_m_n_s32): Likewise.
! 	(__arm_vrev64q_m_s32): Likewise.
! 	(__arm_vqshlq_m_r_s32): Likewise.
! 	(__arm_vqrshlq_m_n_s32): Likewise.
! 	(__arm_vqnegq_m_s32): Likewise.
! 	(__arm_vqabsq_m_s32): Likewise.
! 	(__arm_vnegq_m_s32): Likewise.
! 	(__arm_vmvnq_m_s32): Likewise.
! 	(__arm_vmlsdavxq_p_s32): Likewise.
! 	(__arm_vmlsdavq_p_s32): Likewise.
! 	(__arm_vmladavxq_p_s32): Likewise.
! 	(__arm_vmladavq_p_s32): Likewise.
! 	(__arm_vminvq_p_s32): Likewise.
! 	(__arm_vmaxvq_p_s32): Likewise.
! 	(__arm_vdupq_m_n_s32): Likewise.
! 	(__arm_vclzq_m_s32): Likewise.
! 	(__arm_vclsq_m_s32): Likewise.
! 	(__arm_vaddvaq_p_s32): Likewise.
! 	(__arm_vabsq_m_s32): Likewise.
! 	(__arm_vqrdmlsdhxq_s32): Likewise.
! 	(__arm_vqrdmlsdhq_s32): Likewise.
! 	(__arm_vqrdmlashq_n_s32): Likewise.
! 	(__arm_vqrdmlahq_n_s32): Likewise.
! 	(__arm_vqrdmladhxq_s32): Likewise.
! 	(__arm_vqrdmladhq_s32): Likewise.
! 	(__arm_vqdmlsdhxq_s32): Likewise.
! 	(__arm_vqdmlsdhq_s32): Likewise.
! 	(__arm_vqdmlahq_n_s32): Likewise.
! 	(__arm_vqdmladhxq_s32): Likewise.
! 	(__arm_vqdmladhq_s32): Likewise.
! 	(__arm_vmlsdavaxq_s32): Likewise.
! 	(__arm_vmlsdavaq_s32): Likewise.
! 	(__arm_vmlasq_n_s32): Likewise.
! 	(__arm_vmlaq_n_s32): Likewise.
! 	(__arm_vmladavaxq_s32): Likewise.
! 	(__arm_vmladavaq_s32): Likewise.
! 	(__arm_vsriq_n_s32): Likewise.
! 	(__arm_vsliq_n_s32): Likewise.
! 	(__arm_vpselq_u64): Likewise.
! 	(__arm_vpselq_s64): Likewise.
! 	(vcmpneq_m_n): Define polymorphic variant.
! 	(vcmpneq_m): Likewise.
! 	(vqrdmlsdhq): Likewise.
! 	(vqrdmlsdhxq): Likewise.
! 	(vqrshlq_m_n): Likewise.
! 	(vqshlq_m_r): Likewise.
! 	(vrev64q_m): Likewise.
! 	(vrshlq_m_n): Likewise.
! 	(vshlq_m_r): Likewise.
! 	(vsliq_n): Likewise.
! 	(vsriq_n): Likewise.
! 	(vqrdmlashq_n): Likewise.
! 	(vqrdmlahq): Likewise.
! 	(vqrdmladhxq): Likewise.
! 	(vqrdmladhq): Likewise.
! 	(vqnegq_m): Likewise.
! 	(vqdmlsdhxq): Likewise.
! 	(vabsq_m): Likewise.
! 	(vclsq_m): Likewise.
! 	(vclzq_m): Likewise.
! 	(vcmpgeq_m): Likewise.
! 	(vcmpgeq_m_n): Likewise.
! 	(vdupq_m_n): Likewise.
! 	(vmaxaq_m): Likewise.
! 	(vmlaq_n): Likewise.
! 	(vmlasq_n): Likewise.
! 	(vmvnq_m): Likewise.
! 	(vnegq_m): Likewise.
! 	(vpselq): Likewise.
! 	(vqdmlahq_n): Likewise.
! 	(vqrdmlahq_n): Likewise.
! 	(vqdmlsdhq): Likewise.
! 	(vqdmladhq): Likewise.
! 	(vqabsq_m): Likewise.
! 	(vminaq_m): Likewise.
! 	(vrmlaldavhaq): Likewise.
! 	(vmlsdavxq_p): Likewise.
! 	(vmlsdavq_p): Likewise.	
! 	(vmlsdavaxq): Likewise.	
! 	(vmlsdavaq): Likewise.	
! 	(vaddvaq_p): Likewise.	
! 	(vcmpcsq_m_n): Likewise.	
! 	(vcmpcsq_m): Likewise.	
! 	(vcmpeqq_m_n): Likewise.	
! 	(vcmpeqq_m): Likewise.	
! 	(vmladavxq_p): Likewise.	
! 	(vmladavq_p): Likewise.	
! 	(vmladavaxq): Likewise.	
! 	(vmladavaq): Likewise.	
! 	(vminvq_p): Likewise.	
! 	(vminavq_p): Likewise.	
! 	(vmaxvq_p): Likewise.	
! 	(vmaxavq_p): Likewise.	
! 	(vcmpltq_m_n): Likewise.	
! 	(vcmpltq_m): Likewise.	
! 	(vcmpleq_m): Likewise.	
! 	(vcmpleq_m_n): Likewise.	
! 	(vcmphiq_m_n): Likewise.	
! 	(vcmphiq_m): Likewise.	
! 	(vcmpgtq_m_n): Likewise.	
! 	(vcmpgtq_m): Likewise.	
! 	* config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
! 	builtin qualifier.
! 	(TERNOP_NONE_NONE_NONE_NONE): Likewise.
! 	(TERNOP_NONE_NONE_NONE_UNONE): Likewise.
! 	(TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
! 	(TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
! 	(TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
! 	(TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
! 	* config/arm/constraints.md (Rc): Define constraint to check constant is
! 	in the range of 0 to 15.
! 	(Re): Define constraint to check constant is in the range of 0 to 31.
! 	* config/arm/mve.md (VADDVAQ_P): Define iterator.
! 	(VCLZQ_M): Likewise.
! 	(VCMPEQQ_M_N): Likewise.
! 	(VCMPEQQ_M): Likewise.
! 	(VCMPNEQ_M_N): Likewise.
! 	(VCMPNEQ_M): Likewise.
! 	(VDUPQ_M_N): Likewise.
! 	(VMAXVQ_P): Likewise.
! 	(VMINVQ_P): Likewise.
! 	(VMLADAVAQ): Likewise.
! 	(VMLADAVQ_P): Likewise.
! 	(VMLAQ_N): Likewise.
! 	(VMLASQ_N): Likewise.
! 	(VMVNQ_M): Likewise.
! 	(VPSELQ): Likewise.
! 	(VQDMLAHQ_N): Likewise.
! 	(VQRDMLAHQ_N): Likewise.
! 	(VQRDMLASHQ_N): Likewise.
! 	(VQRSHLQ_M_N): Likewise.
! 	(VQSHLQ_M_R): Likewise.
! 	(VREV64Q_M): Likewise.
! 	(VRSHLQ_M_N): Likewise.
! 	(VSHLQ_M_R): Likewise.
! 	(VSLIQ_N): Likewise.
! 	(VSRIQ_N): Likewise.
! 	(mve_vabsq_m_s<mode>): Define RTL pattern.
! 	(mve_vaddvaq_p_<supf><mode>): Likewise.
! 	(mve_vclsq_m_s<mode>): Likewise.
! 	(mve_vclzq_m_<supf><mode>): Likewise.
! 	(mve_vcmpcsq_m_n_u<mode>): Likewise.
! 	(mve_vcmpcsq_m_u<mode>): Likewise.
! 	(mve_vcmpeqq_m_n_<supf><mode>): Likewise.
! 	(mve_vcmpeqq_m_<supf><mode>): Likewise.
! 	(mve_vcmpgeq_m_n_s<mode>): Likewise.
! 	(mve_vcmpgeq_m_s<mode>): Likewise.
! 	(mve_vcmpgtq_m_n_s<mode>): Likewise.
! 	(mve_vcmpgtq_m_s<mode>): Likewise.
! 	(mve_vcmphiq_m_n_u<mode>): Likewise.
! 	(mve_vcmphiq_m_u<mode>): Likewise.
! 	(mve_vcmpleq_m_n_s<mode>): Likewise.
! 	(mve_vcmpleq_m_s<mode>): Likewise.
! 	(mve_vcmpltq_m_n_s<mode>): Likewise.
! 	(mve_vcmpltq_m_s<mode>): Likewise.
! 	(mve_vcmpneq_m_n_<supf><mode>): Likewise.
! 	(mve_vcmpneq_m_<supf><mode>): Likewise.
! 	(mve_vdupq_m_n_<supf><mode>): Likewise.
! 	(mve_vmaxaq_m_s<mode>): Likewise.
! 	(mve_vmaxavq_p_s<mode>): Likewise.
! 	(mve_vmaxvq_p_<supf><mode>): Likewise.
! 	(mve_vminaq_m_s<mode>): Likewise.
! 	(mve_vminavq_p_s<mode>): Likewise.
! 	(mve_vminvq_p_<supf><mode>): Likewise.
! 	(mve_vmladavaq_<supf><mode>): Likewise.
! 	(mve_vmladavq_p_<supf><mode>): Likewise.
! 	(mve_vmladavxq_p_s<mode>): Likewise.
! 	(mve_vmlaq_n_<supf><mode>): Likewise.
! 	(mve_vmlasq_n_<supf><mode>): Likewise.
! 	(mve_vmlsdavq_p_s<mode>): Likewise.
! 	(mve_vmlsdavxq_p_s<mode>): Likewise.
! 	(mve_vmvnq_m_<supf><mode>): Likewise.
! 	(mve_vnegq_m_s<mode>): Likewise.
! 	(mve_vpselq_<supf><mode>): Likewise.
! 	(mve_vqabsq_m_s<mode>): Likewise.
! 	(mve_vqdmlahq_n_<supf><mode>): Likewise.
! 	(mve_vqnegq_m_s<mode>): Likewise.
! 	(mve_vqrdmladhq_s<mode>): Likewise.
! 	(mve_vqrdmladhxq_s<mode>): Likewise.
! 	(mve_vqrdmlahq_n_<supf><mode>): Likewise.
! 	(mve_vqrdmlashq_n_<supf><mode>): Likewise.
! 	(mve_vqrdmlsdhq_s<mode>): Likewise.
! 	(mve_vqrdmlsdhxq_s<mode>): Likewise.
! 	(mve_vqrshlq_m_n_<supf><mode>): Likewise.
! 	(mve_vqshlq_m_r_<supf><mode>): Likewise.
! 	(mve_vrev64q_m_<supf><mode>): Likewise.
! 	(mve_vrshlq_m_n_<supf><mode>): Likewise.
! 	(mve_vshlq_m_r_<supf><mode>): Likewise.
! 	(mve_vsliq_n_<supf><mode>): Likewise.
! 	(mve_vsriq_n_<supf><mode>): Likewise.
! 	(mve_vqdmlsdhxq_s<mode>): Likewise.
! 	(mve_vqdmlsdhq_s<mode>): Likewise.
! 	(mve_vqdmladhxq_s<mode>): Likewise.
! 	(mve_vqdmladhq_s<mode>): Likewise.
! 	(mve_vmlsdavaxq_s<mode>): Likewise.
! 	(mve_vmlsdavaq_s<mode>): Likewise.
! 	(mve_vmladavaxq_s<mode>): Likewise.
! 	* config/arm/predicates.md (mve_imm_15):Define predicate to check the
! 	matching constraint Rc.
! 	(mve_imm_31): Define predicate to check	the matching constraint Re.
  
! 2020-03-18  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
! 	(vec_cmp<mode>di_dup): Likewise.
! 	* config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
  
! 2020-03-18  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (COND_MODE): Delete.
! 	(COND_INT_MODE): Delete.
! 	(cond_op): Add "mult".
! 	(cond_<expander><mode>): Use VEC_ALLREG_MODE.
! 	(cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
  
! 2020-03-18   Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/94206
! 	* gimple-fold.c (gimple_fold_builtin_memset): Avoid using
! 	partial int modes or not mode-precision integer types for
! 	the store.
  
! 2020-03-18  Jakub Jelinek  <jakub@redhat.com>
  
! 	* asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
! 	in a comment.
! 	* config/arc/arc.c (frame_stack_add): Likewise.
! 	* gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
! 	Likewise.
! 	* ipa-predicate.c (predicate::remap_after_inlining): Likewise.
! 	* tree-ssa-strlen.h (handle_printf_call): Likewise.
! 	* tree-ssa-strlen.c (is_strlen_related_p): Likewise.
! 	* optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
  
! 2020-03-18  Duan bo  <duanbo3@huawei.com>
  
! 	PR target/94201
! 	* config/aarch64/aarch64.md (ldr_got_tiny): Delete.
! 	(@ldr_got_tiny_<mode>): New pattern.
! 	(ldr_got_tiny_sidi): Likewise.
! 	* config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
! 	them to handle SYMBOL_TINY_GOT for ILP32.
  
! 2020-03-18  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
! 	call-preserved for SVE PCS functions.
! 	(aarch64_layout_frame): Cope with up to 12 predicate save slots.
! 	Optimize the case in which there are no following vector save slots.
  
! 2020-03-18  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/94188
! 	* fold-const.c (build_fold_addr_expr): Convert address to
! 	correct type.
! 	* asan.c (maybe_create_ssa_name): Strip useless type conversions.
! 	* gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
! 	to build the ADDR_EXPR which we don't really want to simplify.
! 	* tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
! 	* tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
! 	* tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
! 	(simplify_builtin_call): Strip useless type conversions.
! 	* tree-ssa-strlen.c (new_strinfo): Likewise.
  
! 2020-03-17  Alexey Neyman  <stilor@att.net>
  
! 	PR debug/93751
! 	* dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
! 	the debug level is terse and the declaration is public. Do not
! 	generate type info.
! 	(dwarf2out_decl): Same.
! 	(add_type_attribute): Return immediately if debug level is
! 	terse.
  
! 2020-03-17  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
  
! 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
! 	Define qualifier for ternary operands.
! 	(TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
! 	(TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
! 	(TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
! 	(TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
! 	(TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
! 	(TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (vabavq_s8): Define macro.
! 	(vabavq_s16): Likewise.
! 	(vabavq_s32): Likewise.
! 	(vbicq_m_n_s16): Likewise.
! 	(vbicq_m_n_s32): Likewise.
! 	(vbicq_m_n_u16): Likewise.
! 	(vbicq_m_n_u32): Likewise.
! 	(vcmpeqq_m_f16): Likewise.
! 	(vcmpeqq_m_f32): Likewise.
! 	(vcvtaq_m_s16_f16): Likewise.
! 	(vcvtaq_m_u16_f16): Likewise.
! 	(vcvtaq_m_s32_f32): Likewise.
! 	(vcvtaq_m_u32_f32): Likewise.
! 	(vcvtq_m_f16_s16): Likewise.
! 	(vcvtq_m_f16_u16): Likewise.
! 	(vcvtq_m_f32_s32): Likewise.
! 	(vcvtq_m_f32_u32): Likewise.
! 	(vqrshrnbq_n_s16): Likewise.
! 	(vqrshrnbq_n_u16): Likewise.
! 	(vqrshrnbq_n_s32): Likewise.
! 	(vqrshrnbq_n_u32): Likewise.
! 	(vqrshrunbq_n_s16): Likewise.
! 	(vqrshrunbq_n_s32): Likewise.
! 	(vrmlaldavhaq_s32): Likewise.
! 	(vrmlaldavhaq_u32): Likewise.
! 	(vshlcq_s8): Likewise.
! 	(vshlcq_u8): Likewise.
! 	(vshlcq_s16): Likewise.
! 	(vshlcq_u16): Likewise.
! 	(vshlcq_s32): Likewise.
! 	(vshlcq_u32): Likewise.
! 	(vabavq_u8): Likewise.
! 	(vabavq_u16): Likewise.
! 	(vabavq_u32): Likewise.
! 	(__arm_vabavq_s8): Define intrinsic.
! 	(__arm_vabavq_s16): Likewise.
! 	(__arm_vabavq_s32): Likewise.
! 	(__arm_vabavq_u8): Likewise.
! 	(__arm_vabavq_u16): Likewise.
! 	(__arm_vabavq_u32): Likewise.
! 	(__arm_vbicq_m_n_s16): Likewise.
! 	(__arm_vbicq_m_n_s32): Likewise.
! 	(__arm_vbicq_m_n_u16): Likewise.
! 	(__arm_vbicq_m_n_u32): Likewise.
! 	(__arm_vqrshrnbq_n_s16): Likewise.
! 	(__arm_vqrshrnbq_n_u16): Likewise.
! 	(__arm_vqrshrnbq_n_s32): Likewise.
! 	(__arm_vqrshrnbq_n_u32): Likewise.
! 	(__arm_vqrshrunbq_n_s16): Likewise.
! 	(__arm_vqrshrunbq_n_s32): Likewise.
! 	(__arm_vrmlaldavhaq_s32): Likewise.
! 	(__arm_vrmlaldavhaq_u32): Likewise.
! 	(__arm_vshlcq_s8): Likewise.
! 	(__arm_vshlcq_u8): Likewise.
! 	(__arm_vshlcq_s16): Likewise.
! 	(__arm_vshlcq_u16): Likewise.
! 	(__arm_vshlcq_s32): Likewise.
! 	(__arm_vshlcq_u32): Likewise.
! 	(__arm_vcmpeqq_m_f16): Likewise.
! 	(__arm_vcmpeqq_m_f32): Likewise.
! 	(__arm_vcvtaq_m_s16_f16): Likewise.
! 	(__arm_vcvtaq_m_u16_f16): Likewise.
! 	(__arm_vcvtaq_m_s32_f32): Likewise.
! 	(__arm_vcvtaq_m_u32_f32): Likewise.
! 	(__arm_vcvtq_m_f16_s16): Likewise.
! 	(__arm_vcvtq_m_f16_u16): Likewise.
! 	(__arm_vcvtq_m_f32_s32): Likewise.
! 	(__arm_vcvtq_m_f32_u32): Likewise.
! 	(vcvtaq_m): Define polymorphic variant.
! 	(vcvtq_m): Likewise.
! 	(vabavq): Likewise.
! 	(vshlcq): Likewise.
! 	(vbicq_m_n): Likewise.
! 	(vqrshrnbq_n): Likewise.
! 	(vqrshrunbq_n): Likewise.
! 	* config/arm/arm_mve_builtins.def
! 	(TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
! 	(TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
! 	(TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
! 	(TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
! 	(TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
! 	(TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
! 	(TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
! 	(TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
! 	* config/arm/mve.md (VBICQ_M_N): Define iterator.
! 	(VCVTAQ_M): Likewise.
! 	(VCVTQ_M_TO_F): Likewise.
! 	(VQRSHRNBQ_N): Likewise.
! 	(VABAVQ): Likewise.
! 	(VSHLCQ): Likewise.
! 	(VRMLALDAVHAQ): Likewise.
! 	(mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
! 	(mve_vcmpeqq_m_f<mode>): Likewise.
! 	(mve_vcvtaq_m_<supf><mode>): Likewise.
! 	(mve_vcvtq_m_to_f_<supf><mode>): Likewise.
! 	(mve_vqrshrnbq_n_<supf><mode>): Likewise.
! 	(mve_vqrshrunbq_n_s<mode>): Likewise.
! 	(mve_vrmlaldavhaq_<supf>v4si): Likewise.
! 	(mve_vabavq_<supf><mode>): Likewise.
! 	(mve_vshlcq_<supf><mode>): Likewise.
! 	(mve_vshlcq_<supf><mode>): Likewise.
! 	(mve_vshlcq_vec_<supf><mode>): Define RTL expand.
! 	(mve_vshlcq_carry_<supf><mode>): Likewise.
  
! 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (vqmovntq_u16): Define macro.
! 	(vqmovnbq_u16): Likewise.
! 	(vmulltq_poly_p8): Likewise.
! 	(vmullbq_poly_p8): Likewise.
! 	(vmovntq_u16): Likewise.
! 	(vmovnbq_u16): Likewise.
! 	(vmlaldavxq_u16): Likewise.
! 	(vmlaldavq_u16): Likewise.
! 	(vqmovuntq_s16): Likewise.
! 	(vqmovunbq_s16): Likewise.
! 	(vshlltq_n_u8): Likewise.
! 	(vshllbq_n_u8): Likewise.
! 	(vorrq_n_u16): Likewise.
! 	(vbicq_n_u16): Likewise.
! 	(vcmpneq_n_f16): Likewise.
! 	(vcmpneq_f16): Likewise.
! 	(vcmpltq_n_f16): Likewise.
! 	(vcmpltq_f16): Likewise.
! 	(vcmpleq_n_f16): Likewise.
! 	(vcmpleq_f16): Likewise.
! 	(vcmpgtq_n_f16): Likewise.
! 	(vcmpgtq_f16): Likewise.
! 	(vcmpgeq_n_f16): Likewise.
! 	(vcmpgeq_f16): Likewise.
! 	(vcmpeqq_n_f16): Likewise.
! 	(vcmpeqq_f16): Likewise.
! 	(vsubq_f16): Likewise.
! 	(vqmovntq_s16): Likewise.
! 	(vqmovnbq_s16): Likewise.
! 	(vqdmulltq_s16): Likewise.
! 	(vqdmulltq_n_s16): Likewise.
! 	(vqdmullbq_s16): Likewise.
! 	(vqdmullbq_n_s16): Likewise.
! 	(vorrq_f16): Likewise.
! 	(vornq_f16): Likewise.
! 	(vmulq_n_f16): Likewise.
! 	(vmulq_f16): Likewise.
! 	(vmovntq_s16): Likewise.
! 	(vmovnbq_s16): Likewise.
! 	(vmlsldavxq_s16): Likewise.
! 	(vmlsldavq_s16): Likewise.
! 	(vmlaldavxq_s16): Likewise.
! 	(vmlaldavq_s16): Likewise.
! 	(vminnmvq_f16): Likewise.
! 	(vminnmq_f16): Likewise.
! 	(vminnmavq_f16): Likewise.
! 	(vminnmaq_f16): Likewise.
! 	(vmaxnmvq_f16): Likewise.
! 	(vmaxnmq_f16): Likewise.
! 	(vmaxnmavq_f16): Likewise.
! 	(vmaxnmaq_f16): Likewise.
! 	(veorq_f16): Likewise.
! 	(vcmulq_rot90_f16): Likewise.
! 	(vcmulq_rot270_f16): Likewise.
! 	(vcmulq_rot180_f16): Likewise.
! 	(vcmulq_f16): Likewise.
! 	(vcaddq_rot90_f16): Likewise.
! 	(vcaddq_rot270_f16): Likewise.
! 	(vbicq_f16): Likewise.
! 	(vandq_f16): Likewise.
! 	(vaddq_n_f16): Likewise.
! 	(vabdq_f16): Likewise.
! 	(vshlltq_n_s8): Likewise.
! 	(vshllbq_n_s8): Likewise.
! 	(vorrq_n_s16): Likewise.
! 	(vbicq_n_s16): Likewise.
! 	(vqmovntq_u32): Likewise.
! 	(vqmovnbq_u32): Likewise.
! 	(vmulltq_poly_p16): Likewise.
! 	(vmullbq_poly_p16): Likewise.
! 	(vmovntq_u32): Likewise.
! 	(vmovnbq_u32): Likewise.
! 	(vmlaldavxq_u32): Likewise.
! 	(vmlaldavq_u32): Likewise.
! 	(vqmovuntq_s32): Likewise.
! 	(vqmovunbq_s32): Likewise.
! 	(vshlltq_n_u16): Likewise.
! 	(vshllbq_n_u16): Likewise.
! 	(vorrq_n_u32): Likewise.
! 	(vbicq_n_u32): Likewise.
! 	(vcmpneq_n_f32): Likewise.
! 	(vcmpneq_f32): Likewise.
! 	(vcmpltq_n_f32): Likewise.
! 	(vcmpltq_f32): Likewise.
! 	(vcmpleq_n_f32): Likewise.
! 	(vcmpleq_f32): Likewise.
! 	(vcmpgtq_n_f32): Likewise.
! 	(vcmpgtq_f32): Likewise.
! 	(vcmpgeq_n_f32): Likewise.
! 	(vcmpgeq_f32): Likewise.
! 	(vcmpeqq_n_f32): Likewise.
! 	(vcmpeqq_f32): Likewise.
! 	(vsubq_f32): Likewise.
! 	(vqmovntq_s32): Likewise.
! 	(vqmovnbq_s32): Likewise.
! 	(vqdmulltq_s32): Likewise.
! 	(vqdmulltq_n_s32): Likewise.
! 	(vqdmullbq_s32): Likewise.
! 	(vqdmullbq_n_s32): Likewise.
! 	(vorrq_f32): Likewise.
! 	(vornq_f32): Likewise.
! 	(vmulq_n_f32): Likewise.
! 	(vmulq_f32): Likewise.
! 	(vmovntq_s32): Likewise.
! 	(vmovnbq_s32): Likewise.
! 	(vmlsldavxq_s32): Likewise.
! 	(vmlsldavq_s32): Likewise.
! 	(vmlaldavxq_s32): Likewise.
! 	(vmlaldavq_s32): Likewise.
! 	(vminnmvq_f32): Likewise.
! 	(vminnmq_f32): Likewise.
! 	(vminnmavq_f32): Likewise.
! 	(vminnmaq_f32): Likewise.
! 	(vmaxnmvq_f32): Likewise.
! 	(vmaxnmq_f32): Likewise.
! 	(vmaxnmavq_f32): Likewise.
! 	(vmaxnmaq_f32): Likewise.
! 	(veorq_f32): Likewise.
! 	(vcmulq_rot90_f32): Likewise.
! 	(vcmulq_rot270_f32): Likewise.
! 	(vcmulq_rot180_f32): Likewise.
! 	(vcmulq_f32): Likewise.
! 	(vcaddq_rot90_f32): Likewise.
! 	(vcaddq_rot270_f32): Likewise.
! 	(vbicq_f32): Likewise.
! 	(vandq_f32): Likewise.
! 	(vaddq_n_f32): Likewise.
! 	(vabdq_f32): Likewise.
! 	(vshlltq_n_s16): Likewise.
! 	(vshllbq_n_s16): Likewise.
! 	(vorrq_n_s32): Likewise.
! 	(vbicq_n_s32): Likewise.
! 	(vrmlaldavhq_u32): Likewise.
! 	(vctp8q_m): Likewise.
! 	(vctp64q_m): Likewise.
! 	(vctp32q_m): Likewise.
! 	(vctp16q_m): Likewise.
! 	(vaddlvaq_u32): Likewise.
! 	(vrmlsldavhxq_s32): Likewise.
! 	(vrmlsldavhq_s32): Likewise.
! 	(vrmlaldavhxq_s32): Likewise.
! 	(vrmlaldavhq_s32): Likewise.
! 	(vcvttq_f16_f32): Likewise.
! 	(vcvtbq_f16_f32): Likewise.
! 	(vaddlvaq_s32): Likewise.
! 	(__arm_vqmovntq_u16): Define intrinsic.
! 	(__arm_vqmovnbq_u16): Likewise.
! 	(__arm_vmulltq_poly_p8): Likewise.
! 	(__arm_vmullbq_poly_p8): Likewise.
! 	(__arm_vmovntq_u16): Likewise.
! 	(__arm_vmovnbq_u16): Likewise.
! 	(__arm_vmlaldavxq_u16): Likewise.
! 	(__arm_vmlaldavq_u16): Likewise.
! 	(__arm_vqmovuntq_s16): Likewise.
! 	(__arm_vqmovunbq_s16): Likewise.
! 	(__arm_vshlltq_n_u8): Likewise.
! 	(__arm_vshllbq_n_u8): Likewise.
! 	(__arm_vorrq_n_u16): Likewise.
! 	(__arm_vbicq_n_u16): Likewise.
! 	(__arm_vcmpneq_n_f16): Likewise.
! 	(__arm_vcmpneq_f16): Likewise.
! 	(__arm_vcmpltq_n_f16): Likewise.
! 	(__arm_vcmpltq_f16): Likewise.
! 	(__arm_vcmpleq_n_f16): Likewise.
! 	(__arm_vcmpleq_f16): Likewise.
! 	(__arm_vcmpgtq_n_f16): Likewise.
! 	(__arm_vcmpgtq_f16): Likewise.
! 	(__arm_vcmpgeq_n_f16): Likewise.
! 	(__arm_vcmpgeq_f16): Likewise.
! 	(__arm_vcmpeqq_n_f16): Likewise.
! 	(__arm_vcmpeqq_f16): Likewise.
! 	(__arm_vsubq_f16): Likewise.
! 	(__arm_vqmovntq_s16): Likewise.
! 	(__arm_vqmovnbq_s16): Likewise.
! 	(__arm_vqdmulltq_s16): Likewise.
! 	(__arm_vqdmulltq_n_s16): Likewise.
! 	(__arm_vqdmullbq_s16): Likewise.
! 	(__arm_vqdmullbq_n_s16): Likewise.
! 	(__arm_vorrq_f16): Likewise.
! 	(__arm_vornq_f16): Likewise.
! 	(__arm_vmulq_n_f16): Likewise.
! 	(__arm_vmulq_f16): Likewise.
! 	(__arm_vmovntq_s16): Likewise.
! 	(__arm_vmovnbq_s16): Likewise.
! 	(__arm_vmlsldavxq_s16): Likewise.
! 	(__arm_vmlsldavq_s16): Likewise.
! 	(__arm_vmlaldavxq_s16): Likewise.
! 	(__arm_vmlaldavq_s16): Likewise.
! 	(__arm_vminnmvq_f16): Likewise.
! 	(__arm_vminnmq_f16): Likewise.
! 	(__arm_vminnmavq_f16): Likewise.
! 	(__arm_vminnmaq_f16): Likewise.
! 	(__arm_vmaxnmvq_f16): Likewise.
! 	(__arm_vmaxnmq_f16): Likewise.
! 	(__arm_vmaxnmavq_f16): Likewise.
! 	(__arm_vmaxnmaq_f16): Likewise.
! 	(__arm_veorq_f16): Likewise.
! 	(__arm_vcmulq_rot90_f16): Likewise.
! 	(__arm_vcmulq_rot270_f16): Likewise.
! 	(__arm_vcmulq_rot180_f16): Likewise.
! 	(__arm_vcmulq_f16): Likewise.
! 	(__arm_vcaddq_rot90_f16): Likewise.
! 	(__arm_vcaddq_rot270_f16): Likewise.
! 	(__arm_vbicq_f16): Likewise.
! 	(__arm_vandq_f16): Likewise.
! 	(__arm_vaddq_n_f16): Likewise.
! 	(__arm_vabdq_f16): Likewise.
! 	(__arm_vshlltq_n_s8): Likewise.
! 	(__arm_vshllbq_n_s8): Likewise.
! 	(__arm_vorrq_n_s16): Likewise.
! 	(__arm_vbicq_n_s16): Likewise.
! 	(__arm_vqmovntq_u32): Likewise.
! 	(__arm_vqmovnbq_u32): Likewise.
! 	(__arm_vmulltq_poly_p16): Likewise.
! 	(__arm_vmullbq_poly_p16): Likewise.
! 	(__arm_vmovntq_u32): Likewise.
! 	(__arm_vmovnbq_u32): Likewise.
! 	(__arm_vmlaldavxq_u32): Likewise.
! 	(__arm_vmlaldavq_u32): Likewise.
! 	(__arm_vqmovuntq_s32): Likewise.
! 	(__arm_vqmovunbq_s32): Likewise.
! 	(__arm_vshlltq_n_u16): Likewise.
! 	(__arm_vshllbq_n_u16): Likewise.
! 	(__arm_vorrq_n_u32): Likewise.
! 	(__arm_vbicq_n_u32): Likewise.
! 	(__arm_vcmpneq_n_f32): Likewise.
! 	(__arm_vcmpneq_f32): Likewise.
! 	(__arm_vcmpltq_n_f32): Likewise.
! 	(__arm_vcmpltq_f32): Likewise.
! 	(__arm_vcmpleq_n_f32): Likewise.
! 	(__arm_vcmpleq_f32): Likewise.
! 	(__arm_vcmpgtq_n_f32): Likewise.
! 	(__arm_vcmpgtq_f32): Likewise.
! 	(__arm_vcmpgeq_n_f32): Likewise.
! 	(__arm_vcmpgeq_f32): Likewise.
! 	(__arm_vcmpeqq_n_f32): Likewise.
! 	(__arm_vcmpeqq_f32): Likewise.
! 	(__arm_vsubq_f32): Likewise.
! 	(__arm_vqmovntq_s32): Likewise.
! 	(__arm_vqmovnbq_s32): Likewise.
! 	(__arm_vqdmulltq_s32): Likewise.
! 	(__arm_vqdmulltq_n_s32): Likewise.
! 	(__arm_vqdmullbq_s32): Likewise.
! 	(__arm_vqdmullbq_n_s32): Likewise.
! 	(__arm_vorrq_f32): Likewise.
! 	(__arm_vornq_f32): Likewise.
! 	(__arm_vmulq_n_f32): Likewise.
! 	(__arm_vmulq_f32): Likewise.
! 	(__arm_vmovntq_s32): Likewise.
! 	(__arm_vmovnbq_s32): Likewise.
! 	(__arm_vmlsldavxq_s32): Likewise.
! 	(__arm_vmlsldavq_s32): Likewise.
! 	(__arm_vmlaldavxq_s32): Likewise.
! 	(__arm_vmlaldavq_s32): Likewise.
! 	(__arm_vminnmvq_f32): Likewise.
! 	(__arm_vminnmq_f32): Likewise.
! 	(__arm_vminnmavq_f32): Likewise.
! 	(__arm_vminnmaq_f32): Likewise.
! 	(__arm_vmaxnmvq_f32): Likewise.
! 	(__arm_vmaxnmq_f32): Likewise.
! 	(__arm_vmaxnmavq_f32): Likewise.
! 	(__arm_vmaxnmaq_f32): Likewise.
! 	(__arm_veorq_f32): Likewise.
! 	(__arm_vcmulq_rot90_f32): Likewise.
! 	(__arm_vcmulq_rot270_f32): Likewise.
! 	(__arm_vcmulq_rot180_f32): Likewise.
! 	(__arm_vcmulq_f32): Likewise.
! 	(__arm_vcaddq_rot90_f32): Likewise.
! 	(__arm_vcaddq_rot270_f32): Likewise.
! 	(__arm_vbicq_f32): Likewise.
! 	(__arm_vandq_f32): Likewise.
! 	(__arm_vaddq_n_f32): Likewise.
! 	(__arm_vabdq_f32): Likewise.
! 	(__arm_vshlltq_n_s16): Likewise.
! 	(__arm_vshllbq_n_s16): Likewise.
! 	(__arm_vorrq_n_s32): Likewise.
! 	(__arm_vbicq_n_s32): Likewise.
! 	(__arm_vrmlaldavhq_u32): Likewise.
! 	(__arm_vctp8q_m): Likewise.
! 	(__arm_vctp64q_m): Likewise.
! 	(__arm_vctp32q_m): Likewise.
! 	(__arm_vctp16q_m): Likewise.
! 	(__arm_vaddlvaq_u32): Likewise.
! 	(__arm_vrmlsldavhxq_s32): Likewise.
! 	(__arm_vrmlsldavhq_s32): Likewise.
! 	(__arm_vrmlaldavhxq_s32): Likewise.
! 	(__arm_vrmlaldavhq_s32): Likewise.
! 	(__arm_vcvttq_f16_f32): Likewise.
! 	(__arm_vcvtbq_f16_f32): Likewise.
! 	(__arm_vaddlvaq_s32): Likewise.
! 	(vst4q): Define polymorphic variant.
! 	(vrndxq): Likewise.
! 	(vrndq): Likewise.
! 	(vrndpq): Likewise.
! 	(vrndnq): Likewise.
! 	(vrndmq): Likewise.
! 	(vrndaq): Likewise.
! 	(vrev64q): Likewise.
! 	(vnegq): Likewise.
! 	(vdupq_n): Likewise.
! 	(vabsq): Likewise.
! 	(vrev32q): Likewise.
! 	(vcvtbq_f32): Likewise.
! 	(vcvttq_f32): Likewise.
! 	(vcvtq): Likewise.
! 	(vsubq_n): Likewise.
! 	(vbrsrq_n): Likewise.
! 	(vcvtq_n): Likewise.
! 	(vsubq): Likewise.
! 	(vorrq): Likewise.
! 	(vabdq): Likewise.
! 	(vaddq_n): Likewise.
! 	(vandq): Likewise.
! 	(vbicq): Likewise.
! 	(vornq): Likewise.
! 	(vmulq_n): Likewise.
! 	(vmulq): Likewise.
! 	(vcaddq_rot270): Likewise.
! 	(vcmpeqq_n): Likewise.
! 	(vcmpeqq): Likewise.
! 	(vcaddq_rot90): Likewise.
! 	(vcmpgeq_n): Likewise.
! 	(vcmpgeq): Likewise.
! 	(vcmpgtq_n): Likewise.
! 	(vcmpgtq): Likewise.
! 	(vcmpgtq): Likewise.
! 	(vcmpleq_n): Likewise.
! 	(vcmpleq_n): Likewise.
! 	(vcmpleq): Likewise.
! 	(vcmpleq): Likewise.
! 	(vcmpltq_n): Likewise.
! 	(vcmpltq_n): Likewise.
! 	(vcmpltq): Likewise.
! 	(vcmpltq): Likewise.
! 	(vcmpneq_n): Likewise.
! 	(vcmpneq_n): Likewise.
! 	(vcmpneq): Likewise.
! 	(vcmpneq): Likewise.
! 	(vcmulq): Likewise.
! 	(vcmulq): Likewise.
! 	(vcmulq_rot180): Likewise.
! 	(vcmulq_rot180): Likewise.
! 	(vcmulq_rot270): Likewise.
! 	(vcmulq_rot270): Likewise.
! 	(vcmulq_rot90): Likewise.
! 	(vcmulq_rot90): Likewise.
! 	(veorq): Likewise.
! 	(veorq): Likewise.
! 	(vmaxnmaq): Likewise.
! 	(vmaxnmaq): Likewise.
! 	(vmaxnmavq): Likewise.
! 	(vmaxnmavq): Likewise.
! 	(vmaxnmq): Likewise.
! 	(vmaxnmq): Likewise.
! 	(vmaxnmvq): Likewise.
! 	(vmaxnmvq): Likewise.
! 	(vminnmaq): Likewise.
! 	(vminnmaq): Likewise.
! 	(vminnmavq): Likewise.
! 	(vminnmavq): Likewise.
! 	(vminnmq): Likewise.
! 	(vminnmq): Likewise.
! 	(vminnmvq): Likewise.
! 	(vminnmvq): Likewise.
! 	(vbicq_n): Likewise.
! 	(vqmovntq): Likewise.
! 	(vqmovntq): Likewise.
! 	(vqmovnbq): Likewise.
! 	(vqmovnbq): Likewise.
! 	(vmulltq_poly): Likewise.
! 	(vmulltq_poly): Likewise.
! 	(vmullbq_poly): Likewise.
! 	(vmullbq_poly): Likewise.
! 	(vmovntq): Likewise.
! 	(vmovntq): Likewise.
! 	(vmovnbq): Likewise.
! 	(vmovnbq): Likewise.
! 	(vmlaldavxq): Likewise.
! 	(vmlaldavxq): Likewise.
! 	(vqmovuntq): Likewise.
! 	(vqmovuntq): Likewise.
! 	(vshlltq_n): Likewise.
! 	(vshlltq_n): Likewise.
! 	(vshllbq_n): Likewise.
! 	(vshllbq_n): Likewise.
! 	(vorrq_n): Likewise.
! 	(vorrq_n): Likewise.
! 	(vmlaldavq): Likewise.
! 	(vmlaldavq): Likewise.
! 	(vqmovunbq): Likewise.
! 	(vqmovunbq): Likewise.
! 	(vqdmulltq_n): Likewise.
! 	(vqdmulltq_n): Likewise.
! 	(vqdmulltq): Likewise.
! 	(vqdmulltq): Likewise.
! 	(vqdmullbq_n): Likewise.
! 	(vqdmullbq_n): Likewise.
! 	(vqdmullbq): Likewise.
! 	(vqdmullbq): Likewise.
! 	(vaddlvaq): Likewise.
! 	(vaddlvaq): Likewise.
! 	(vrmlaldavhq): Likewise.
! 	(vrmlaldavhq): Likewise.
! 	(vrmlaldavhxq): Likewise.
! 	(vrmlaldavhxq): Likewise.
! 	(vrmlsldavhq): Likewise.
! 	(vrmlsldavhq): Likewise.
! 	(vrmlsldavhxq): Likewise.
! 	(vrmlsldavhxq): Likewise.
! 	(vmlsldavxq): Likewise.
! 	(vmlsldavxq): Likewise.
! 	(vmlsldavq): Likewise.
! 	(vmlsldavq): Likewise.
! 	* config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
! 	(BINOP_NONE_NONE_NONE): Likewise.
! 	(BINOP_UNONE_NONE_NONE): Likewise.
! 	(BINOP_UNONE_UNONE_IMM): Likewise.
! 	(BINOP_UNONE_UNONE_NONE): Likewise.
! 	(BINOP_UNONE_UNONE_UNONE): Likewise.
! 	* config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
! 	(mve_vaddlvaq_<supf>v4si): Likewise.
! 	(mve_vaddq_n_f<mode>): Likewise.
! 	(mve_vandq_f<mode>): Likewise.
! 	(mve_vbicq_f<mode>): Likewise.
! 	(mve_vbicq_n_<supf><mode>): Likewise.
! 	(mve_vcaddq_rot270_f<mode>): Likewise.
! 	(mve_vcaddq_rot90_f<mode>): Likewise.
! 	(mve_vcmpeqq_f<mode>): Likewise.
! 	(mve_vcmpeqq_n_f<mode>): Likewise.
! 	(mve_vcmpgeq_f<mode>): Likewise.
! 	(mve_vcmpgeq_n_f<mode>): Likewise.
! 	(mve_vcmpgtq_f<mode>): Likewise.
! 	(mve_vcmpgtq_n_f<mode>): Likewise.
! 	(mve_vcmpleq_f<mode>): Likewise.
! 	(mve_vcmpleq_n_f<mode>): Likewise.
! 	(mve_vcmpltq_f<mode>): Likewise.
! 	(mve_vcmpltq_n_f<mode>): Likewise.
! 	(mve_vcmpneq_f<mode>): Likewise.
! 	(mve_vcmpneq_n_f<mode>): Likewise.
! 	(mve_vcmulq_f<mode>): Likewise.
! 	(mve_vcmulq_rot180_f<mode>): Likewise.
! 	(mve_vcmulq_rot270_f<mode>): Likewise.
! 	(mve_vcmulq_rot90_f<mode>): Likewise.
! 	(mve_vctp<mode1>q_mhi): Likewise.
! 	(mve_vcvtbq_f16_f32v8hf): Likewise.
! 	(mve_vcvttq_f16_f32v8hf): Likewise.
! 	(mve_veorq_f<mode>): Likewise.
! 	(mve_vmaxnmaq_f<mode>): Likewise.
! 	(mve_vmaxnmavq_f<mode>): Likewise.
! 	(mve_vmaxnmq_f<mode>): Likewise.
! 	(mve_vmaxnmvq_f<mode>): Likewise.
! 	(mve_vminnmaq_f<mode>): Likewise.
! 	(mve_vminnmavq_f<mode>): Likewise.
! 	(mve_vminnmq_f<mode>): Likewise.
! 	(mve_vminnmvq_f<mode>): Likewise.
! 	(mve_vmlaldavq_<supf><mode>): Likewise.
! 	(mve_vmlaldavxq_<supf><mode>): Likewise.
! 	(mve_vmlsldavq_s<mode>): Likewise.
! 	(mve_vmlsldavxq_s<mode>): Likewise.
! 	(mve_vmovnbq_<supf><mode>): Likewise.
! 	(mve_vmovntq_<supf><mode>): Likewise.
! 	(mve_vmulq_f<mode>): Likewise.
! 	(mve_vmulq_n_f<mode>): Likewise.
! 	(mve_vornq_f<mode>): Likewise.
! 	(mve_vorrq_f<mode>): Likewise.
! 	(mve_vorrq_n_<supf><mode>): Likewise.
! 	(mve_vqdmullbq_n_s<mode>): Likewise.
! 	(mve_vqdmullbq_s<mode>): Likewise.
! 	(mve_vqdmulltq_n_s<mode>): Likewise.
! 	(mve_vqdmulltq_s<mode>): Likewise.
! 	(mve_vqmovnbq_<supf><mode>): Likewise.
! 	(mve_vqmovntq_<supf><mode>): Likewise.
! 	(mve_vqmovunbq_s<mode>): Likewise.
! 	(mve_vqmovuntq_s<mode>): Likewise.
! 	(mve_vrmlaldavhxq_sv4si): Likewise.
! 	(mve_vrmlsldavhq_sv4si): Likewise.
! 	(mve_vrmlsldavhxq_sv4si): Likewise.
! 	(mve_vshllbq_n_<supf><mode>): Likewise.
! 	(mve_vshlltq_n_<supf><mode>): Likewise.
! 	(mve_vsubq_f<mode>): Likewise.
! 	(mve_vmulltq_poly_p<mode>): Likewise.
! 	(mve_vmullbq_poly_p<mode>): Likewise.
! 	(mve_vrmlaldavhq_<supf>v4si): Likewise.
  
! 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm_mve.h (vsubq_u8): Define macro.
! 	(vsubq_n_u8): Likewise.
! 	(vrmulhq_u8): Likewise.
! 	(vrhaddq_u8): Likewise.
! 	(vqsubq_u8): Likewise.
! 	(vqsubq_n_u8): Likewise.
! 	(vqaddq_u8): Likewise.
! 	(vqaddq_n_u8): Likewise.
! 	(vorrq_u8): Likewise.
! 	(vornq_u8): Likewise.
! 	(vmulq_u8): Likewise.
! 	(vmulq_n_u8): Likewise.
! 	(vmulltq_int_u8): Likewise.
! 	(vmullbq_int_u8): Likewise.
! 	(vmulhq_u8): Likewise.
! 	(vmladavq_u8): Likewise.
! 	(vminvq_u8): Likewise.
! 	(vminq_u8): Likewise.
! 	(vmaxvq_u8): Likewise.
! 	(vmaxq_u8): Likewise.
! 	(vhsubq_u8): Likewise.
! 	(vhsubq_n_u8): Likewise.
! 	(vhaddq_u8): Likewise.
! 	(vhaddq_n_u8): Likewise.
! 	(veorq_u8): Likewise.
! 	(vcmpneq_n_u8): Likewise.
! 	(vcmphiq_u8): Likewise.
! 	(vcmphiq_n_u8): Likewise.
! 	(vcmpeqq_u8): Likewise.
! 	(vcmpeqq_n_u8): Likewise.
! 	(vcmpcsq_u8): Likewise.
! 	(vcmpcsq_n_u8): Likewise.
! 	(vcaddq_rot90_u8): Likewise.
! 	(vcaddq_rot270_u8): Likewise.
! 	(vbicq_u8): Likewise.
! 	(vandq_u8): Likewise.
! 	(vaddvq_p_u8): Likewise.
! 	(vaddvaq_u8): Likewise.
! 	(vaddq_n_u8): Likewise.
! 	(vabdq_u8): Likewise.
! 	(vshlq_r_u8): Likewise.
! 	(vrshlq_u8): Likewise.
! 	(vrshlq_n_u8): Likewise.
! 	(vqshlq_u8): Likewise.
! 	(vqshlq_r_u8): Likewise.
! 	(vqrshlq_u8): Likewise.
! 	(vqrshlq_n_u8): Likewise.
! 	(vminavq_s8): Likewise.
! 	(vminaq_s8): Likewise.
! 	(vmaxavq_s8): Likewise.
! 	(vmaxaq_s8): Likewise.
! 	(vbrsrq_n_u8): Likewise.
! 	(vshlq_n_u8): Likewise.
! 	(vrshrq_n_u8): Likewise.
! 	(vqshlq_n_u8): Likewise.
! 	(vcmpneq_n_s8): Likewise.
! 	(vcmpltq_s8): Likewise.
! 	(vcmpltq_n_s8): Likewise.
! 	(vcmpleq_s8): Likewise.
! 	(vcmpleq_n_s8): Likewise.
! 	(vcmpgtq_s8): Likewise.
! 	(vcmpgtq_n_s8): Likewise.
! 	(vcmpgeq_s8): Likewise.
! 	(vcmpgeq_n_s8): Likewise.
! 	(vcmpeqq_s8): Likewise.
! 	(vcmpeqq_n_s8): Likewise.
! 	(vqshluq_n_s8): Likewise.
! 	(vaddvq_p_s8): Likewise.
! 	(vsubq_s8): Likewise.
! 	(vsubq_n_s8): Likewise.
! 	(vshlq_r_s8): Likewise.
! 	(vrshlq_s8): Likewise.
! 	(vrshlq_n_s8): Likewise.
! 	(vrmulhq_s8): Likewise.
! 	(vrhaddq_s8): Likewise.
! 	(vqsubq_s8): Likewise.
! 	(vqsubq_n_s8): Likewise.
! 	(vqshlq_s8): Likewise.
! 	(vqshlq_r_s8): Likewise.
! 	(vqrshlq_s8): Likewise.
! 	(vqrshlq_n_s8): Likewise.
! 	(vqrdmulhq_s8): Likewise.
! 	(vqrdmulhq_n_s8): Likewise.
! 	(vqdmulhq_s8): Likewise.
! 	(vqdmulhq_n_s8): Likewise.
! 	(vqaddq_s8): Likewise.
! 	(vqaddq_n_s8): Likewise.
! 	(vorrq_s8): Likewise.
! 	(vornq_s8): Likewise.
! 	(vmulq_s8): Likewise.
! 	(vmulq_n_s8): Likewise.
! 	(vmulltq_int_s8): Likewise.
! 	(vmullbq_int_s8): Likewise.
! 	(vmulhq_s8): Likewise.
! 	(vmlsdavxq_s8): Likewise.
! 	(vmlsdavq_s8): Likewise.
! 	(vmladavxq_s8): Likewise.
! 	(vmladavq_s8): Likewise.
! 	(vminvq_s8): Likewise.
! 	(vminq_s8): Likewise.
! 	(vmaxvq_s8): Likewise.
! 	(vmaxq_s8): Likewise.
! 	(vhsubq_s8): Likewise.
! 	(vhsubq_n_s8): Likewise.
! 	(vhcaddq_rot90_s8): Likewise.
! 	(vhcaddq_rot270_s8): Likewise.
! 	(vhaddq_s8): Likewise.
! 	(vhaddq_n_s8): Likewise.
! 	(veorq_s8): Likewise.
! 	(vcaddq_rot90_s8): Likewise.
! 	(vcaddq_rot270_s8): Likewise.
! 	(vbrsrq_n_s8): Likewise.
! 	(vbicq_s8): Likewise.
! 	(vandq_s8): Likewise.
! 	(vaddvaq_s8): Likewise.
! 	(vaddq_n_s8): Likewise.
! 	(vabdq_s8): Likewise.
! 	(vshlq_n_s8): Likewise.
! 	(vrshrq_n_s8): Likewise.
! 	(vqshlq_n_s8): Likewise.
! 	(vsubq_u16): Likewise.
! 	(vsubq_n_u16): Likewise.
! 	(vrmulhq_u16): Likewise.
! 	(vrhaddq_u16): Likewise.
! 	(vqsubq_u16): Likewise.
! 	(vqsubq_n_u16): Likewise.
! 	(vqaddq_u16): Likewise.
! 	(vqaddq_n_u16): Likewise.
! 	(vorrq_u16): Likewise.
! 	(vornq_u16): Likewise.
! 	(vmulq_u16): Likewise.
! 	(vmulq_n_u16): Likewise.
! 	(vmulltq_int_u16): Likewise.
! 	(vmullbq_int_u16): Likewise.
! 	(vmulhq_u16): Likewise.
! 	(vmladavq_u16): Likewise.
! 	(vminvq_u16): Likewise.
! 	(vminq_u16): Likewise.
! 	(vmaxvq_u16): Likewise.
! 	(vmaxq_u16): Likewise.
! 	(vhsubq_u16): Likewise.
! 	(vhsubq_n_u16): Likewise.
! 	(vhaddq_u16): Likewise.
! 	(vhaddq_n_u16): Likewise.
! 	(veorq_u16): Likewise.
! 	(vcmpneq_n_u16): Likewise.
! 	(vcmphiq_u16): Likewise.
! 	(vcmphiq_n_u16): Likewise.
! 	(vcmpeqq_u16): Likewise.
! 	(vcmpeqq_n_u16): Likewise.
! 	(vcmpcsq_u16): Likewise.
! 	(vcmpcsq_n_u16): Likewise.
! 	(vcaddq_rot90_u16): Likewise.
! 	(vcaddq_rot270_u16): Likewise.
! 	(vbicq_u16): Likewise.
! 	(vandq_u16): Likewise.
! 	(vaddvq_p_u16): Likewise.
! 	(vaddvaq_u16): Likewise.
! 	(vaddq_n_u16): Likewise.
! 	(vabdq_u16): Likewise.
! 	(vshlq_r_u16): Likewise.
! 	(vrshlq_u16): Likewise.
! 	(vrshlq_n_u16): Likewise.
! 	(vqshlq_u16): Likewise.
! 	(vqshlq_r_u16): Likewise.
! 	(vqrshlq_u16): Likewise.
! 	(vqrshlq_n_u16): Likewise.
! 	(vminavq_s16): Likewise.
! 	(vminaq_s16): Likewise.
! 	(vmaxavq_s16): Likewise.
! 	(vmaxaq_s16): Likewise.
! 	(vbrsrq_n_u16): Likewise.
! 	(vshlq_n_u16): Likewise.
! 	(vrshrq_n_u16): Likewise.
! 	(vqshlq_n_u16): Likewise.
! 	(vcmpneq_n_s16): Likewise.
! 	(vcmpltq_s16): Likewise.
! 	(vcmpltq_n_s16): Likewise.
! 	(vcmpleq_s16): Likewise.
! 	(vcmpleq_n_s16): Likewise.
! 	(vcmpgtq_s16): Likewise.
! 	(vcmpgtq_n_s16): Likewise.
! 	(vcmpgeq_s16): Likewise.
! 	(vcmpgeq_n_s16): Likewise.
! 	(vcmpeqq_s16): Likewise.
! 	(vcmpeqq_n_s16): Likewise.
! 	(vqshluq_n_s16): Likewise.
! 	(vaddvq_p_s16): Likewise.
! 	(vsubq_s16): Likewise.
! 	(vsubq_n_s16): Likewise.
! 	(vshlq_r_s16): Likewise.
! 	(vrshlq_s16): Likewise.
! 	(vrshlq_n_s16): Likewise.
! 	(vrmulhq_s16): Likewise.
! 	(vrhaddq_s16): Likewise.
! 	(vqsubq_s16): Likewise.
! 	(vqsubq_n_s16): Likewise.
! 	(vqshlq_s16): Likewise.
! 	(vqshlq_r_s16): Likewise.
! 	(vqrshlq_s16): Likewise.
! 	(vqrshlq_n_s16): Likewise.
! 	(vqrdmulhq_s16): Likewise.
! 	(vqrdmulhq_n_s16): Likewise.
! 	(vqdmulhq_s16): Likewise.
! 	(vqdmulhq_n_s16): Likewise.
! 	(vqaddq_s16): Likewise.
! 	(vqaddq_n_s16): Likewise.
! 	(vorrq_s16): Likewise.
! 	(vornq_s16): Likewise.
! 	(vmulq_s16): Likewise.
! 	(vmulq_n_s16): Likewise.
! 	(vmulltq_int_s16): Likewise.
! 	(vmullbq_int_s16): Likewise.
! 	(vmulhq_s16): Likewise.
! 	(vmlsdavxq_s16): Likewise.
! 	(vmlsdavq_s16): Likewise.
! 	(vmladavxq_s16): Likewise.
! 	(vmladavq_s16): Likewise.
! 	(vminvq_s16): Likewise.
! 	(vminq_s16): Likewise.
! 	(vmaxvq_s16): Likewise.
! 	(vmaxq_s16): Likewise.
! 	(vhsubq_s16): Likewise.
! 	(vhsubq_n_s16): Likewise.
! 	(vhcaddq_rot90_s16): Likewise.
! 	(vhcaddq_rot270_s16): Likewise.
! 	(vhaddq_s16): Likewise.
! 	(vhaddq_n_s16): Likewise.
! 	(veorq_s16): Likewise.
! 	(vcaddq_rot90_s16): Likewise.
! 	(vcaddq_rot270_s16): Likewise.
! 	(vbrsrq_n_s16): Likewise.
! 	(vbicq_s16): Likewise.
! 	(vandq_s16): Likewise.
! 	(vaddvaq_s16): Likewise.
! 	(vaddq_n_s16): Likewise.
! 	(vabdq_s16): Likewise.
! 	(vshlq_n_s16): Likewise.
! 	(vrshrq_n_s16): Likewise.
! 	(vqshlq_n_s16): Likewise.
! 	(vsubq_u32): Likewise.
! 	(vsubq_n_u32): Likewise.
! 	(vrmulhq_u32): Likewise.
! 	(vrhaddq_u32): Likewise.
! 	(vqsubq_u32): Likewise.
! 	(vqsubq_n_u32): Likewise.
! 	(vqaddq_u32): Likewise.
! 	(vqaddq_n_u32): Likewise.
! 	(vorrq_u32): Likewise.
! 	(vornq_u32): Likewise.
! 	(vmulq_u32): Likewise.
! 	(vmulq_n_u32): Likewise.
! 	(vmulltq_int_u32): Likewise.
! 	(vmullbq_int_u32): Likewise.
! 	(vmulhq_u32): Likewise.
! 	(vmladavq_u32): Likewise.
! 	(vminvq_u32): Likewise.
! 	(vminq_u32): Likewise.
! 	(vmaxvq_u32): Likewise.
! 	(vmaxq_u32): Likewise.
! 	(vhsubq_u32): Likewise.
! 	(vhsubq_n_u32): Likewise.
! 	(vhaddq_u32): Likewise.
! 	(vhaddq_n_u32): Likewise.
! 	(veorq_u32): Likewise.
! 	(vcmpneq_n_u32): Likewise.
! 	(vcmphiq_u32): Likewise.
! 	(vcmphiq_n_u32): Likewise.
! 	(vcmpeqq_u32): Likewise.
! 	(vcmpeqq_n_u32): Likewise.
! 	(vcmpcsq_u32): Likewise.
! 	(vcmpcsq_n_u32): Likewise.
! 	(vcaddq_rot90_u32): Likewise.
! 	(vcaddq_rot270_u32): Likewise.
! 	(vbicq_u32): Likewise.
! 	(vandq_u32): Likewise.
! 	(vaddvq_p_u32): Likewise.
! 	(vaddvaq_u32): Likewise.
! 	(vaddq_n_u32): Likewise.
! 	(vabdq_u32): Likewise.
! 	(vshlq_r_u32): Likewise.
! 	(vrshlq_u32): Likewise.
! 	(vrshlq_n_u32): Likewise.
! 	(vqshlq_u32): Likewise.
! 	(vqshlq_r_u32): Likewise.
! 	(vqrshlq_u32): Likewise.
! 	(vqrshlq_n_u32): Likewise.
! 	(vminavq_s32): Likewise.
! 	(vminaq_s32): Likewise.
! 	(vmaxavq_s32): Likewise.
! 	(vmaxaq_s32): Likewise.
! 	(vbrsrq_n_u32): Likewise.
! 	(vshlq_n_u32): Likewise.
! 	(vrshrq_n_u32): Likewise.
! 	(vqshlq_n_u32): Likewise.
! 	(vcmpneq_n_s32): Likewise.
! 	(vcmpltq_s32): Likewise.
! 	(vcmpltq_n_s32): Likewise.
! 	(vcmpleq_s32): Likewise.
! 	(vcmpleq_n_s32): Likewise.
! 	(vcmpgtq_s32): Likewise.
! 	(vcmpgtq_n_s32): Likewise.
! 	(vcmpgeq_s32): Likewise.
! 	(vcmpgeq_n_s32): Likewise.
! 	(vcmpeqq_s32): Likewise.
! 	(vcmpeqq_n_s32): Likewise.
! 	(vqshluq_n_s32): Likewise.
! 	(vaddvq_p_s32): Likewise.
! 	(vsubq_s32): Likewise.
! 	(vsubq_n_s32): Likewise.
! 	(vshlq_r_s32): Likewise.
! 	(vrshlq_s32): Likewise.
! 	(vrshlq_n_s32): Likewise.
! 	(vrmulhq_s32): Likewise.
! 	(vrhaddq_s32): Likewise.
! 	(vqsubq_s32): Likewise.
! 	(vqsubq_n_s32): Likewise.
! 	(vqshlq_s32): Likewise.
! 	(vqshlq_r_s32): Likewise.
! 	(vqrshlq_s32): Likewise.
! 	(vqrshlq_n_s32): Likewise.
! 	(vqrdmulhq_s32): Likewise.
! 	(vqrdmulhq_n_s32): Likewise.
! 	(vqdmulhq_s32): Likewise.
! 	(vqdmulhq_n_s32): Likewise.
! 	(vqaddq_s32): Likewise.
! 	(vqaddq_n_s32): Likewise.
! 	(vorrq_s32): Likewise.
! 	(vornq_s32): Likewise.
! 	(vmulq_s32): Likewise.
! 	(vmulq_n_s32): Likewise.
! 	(vmulltq_int_s32): Likewise.
! 	(vmullbq_int_s32): Likewise.
! 	(vmulhq_s32): Likewise.
! 	(vmlsdavxq_s32): Likewise.
! 	(vmlsdavq_s32): Likewise.
! 	(vmladavxq_s32): Likewise.
! 	(vmladavq_s32): Likewise.
! 	(vminvq_s32): Likewise.
! 	(vminq_s32): Likewise.
! 	(vmaxvq_s32): Likewise.
! 	(vmaxq_s32): Likewise.
! 	(vhsubq_s32): Likewise.
! 	(vhsubq_n_s32): Likewise.
! 	(vhcaddq_rot90_s32): Likewise.
! 	(vhcaddq_rot270_s32): Likewise.
! 	(vhaddq_s32): Likewise.
! 	(vhaddq_n_s32): Likewise.
! 	(veorq_s32): Likewise.
! 	(vcaddq_rot90_s32): Likewise.
! 	(vcaddq_rot270_s32): Likewise.
! 	(vbrsrq_n_s32): Likewise.
! 	(vbicq_s32): Likewise.
! 	(vandq_s32): Likewise.
! 	(vaddvaq_s32): Likewise.
! 	(vaddq_n_s32): Likewise.
! 	(vabdq_s32): Likewise.
! 	(vshlq_n_s32): Likewise.
! 	(vrshrq_n_s32): Likewise.
! 	(vqshlq_n_s32): Likewise.
! 	(__arm_vsubq_u8): Define intrinsic.
! 	(__arm_vsubq_n_u8): Likewise.
! 	(__arm_vrmulhq_u8): Likewise.
! 	(__arm_vrhaddq_u8): Likewise.
! 	(__arm_vqsubq_u8): Likewise.
! 	(__arm_vqsubq_n_u8): Likewise.
! 	(__arm_vqaddq_u8): Likewise.
! 	(__arm_vqaddq_n_u8): Likewise.
! 	(__arm_vorrq_u8): Likewise.
! 	(__arm_vornq_u8): Likewise.
! 	(__arm_vmulq_u8): Likewise.
! 	(__arm_vmulq_n_u8): Likewise.
! 	(__arm_vmulltq_int_u8): Likewise.
! 	(__arm_vmullbq_int_u8): Likewise.
! 	(__arm_vmulhq_u8): Likewise.
! 	(__arm_vmladavq_u8): Likewise.
! 	(__arm_vminvq_u8): Likewise.
! 	(__arm_vminq_u8): Likewise.
! 	(__arm_vmaxvq_u8): Likewise.
! 	(__arm_vmaxq_u8): Likewise.
! 	(__arm_vhsubq_u8): Likewise.
! 	(__arm_vhsubq_n_u8): Likewise.
! 	(__arm_vhaddq_u8): Likewise.
! 	(__arm_vhaddq_n_u8): Likewise.
! 	(__arm_veorq_u8): Likewise.
! 	(__arm_vcmpneq_n_u8): Likewise.
! 	(__arm_vcmphiq_u8): Likewise.
! 	(__arm_vcmphiq_n_u8): Likewise.
! 	(__arm_vcmpeqq_u8): Likewise.
! 	(__arm_vcmpeqq_n_u8): Likewise.
! 	(__arm_vcmpcsq_u8): Likewise.
! 	(__arm_vcmpcsq_n_u8): Likewise.
! 	(__arm_vcaddq_rot90_u8): Likewise.
! 	(__arm_vcaddq_rot270_u8): Likewise.
! 	(__arm_vbicq_u8): Likewise.
! 	(__arm_vandq_u8): Likewise.
! 	(__arm_vaddvq_p_u8): Likewise.
! 	(__arm_vaddvaq_u8): Likewise.
! 	(__arm_vaddq_n_u8): Likewise.
! 	(__arm_vabdq_u8): Likewise.
! 	(__arm_vshlq_r_u8): Likewise.
! 	(__arm_vrshlq_u8): Likewise.
! 	(__arm_vrshlq_n_u8): Likewise.
! 	(__arm_vqshlq_u8): Likewise.
! 	(__arm_vqshlq_r_u8): Likewise.
! 	(__arm_vqrshlq_u8): Likewise.
! 	(__arm_vqrshlq_n_u8): Likewise.
! 	(__arm_vminavq_s8): Likewise.
! 	(__arm_vminaq_s8): Likewise.
! 	(__arm_vmaxavq_s8): Likewise.
! 	(__arm_vmaxaq_s8): Likewise.
! 	(__arm_vbrsrq_n_u8): Likewise.
! 	(__arm_vshlq_n_u8): Likewise.
! 	(__arm_vrshrq_n_u8): Likewise.
! 	(__arm_vqshlq_n_u8): Likewise.
! 	(__arm_vcmpneq_n_s8): Likewise.
! 	(__arm_vcmpltq_s8): Likewise.
! 	(__arm_vcmpltq_n_s8): Likewise.
! 	(__arm_vcmpleq_s8): Likewise.
! 	(__arm_vcmpleq_n_s8): Likewise.
! 	(__arm_vcmpgtq_s8): Likewise.
! 	(__arm_vcmpgtq_n_s8): Likewise.
! 	(__arm_vcmpgeq_s8): Likewise.
! 	(__arm_vcmpgeq_n_s8): Likewise.
! 	(__arm_vcmpeqq_s8): Likewise.
! 	(__arm_vcmpeqq_n_s8): Likewise.
! 	(__arm_vqshluq_n_s8): Likewise.
! 	(__arm_vaddvq_p_s8): Likewise.
! 	(__arm_vsubq_s8): Likewise.
! 	(__arm_vsubq_n_s8): Likewise.
! 	(__arm_vshlq_r_s8): Likewise.
! 	(__arm_vrshlq_s8): Likewise.
! 	(__arm_vrshlq_n_s8): Likewise.
! 	(__arm_vrmulhq_s8): Likewise.
! 	(__arm_vrhaddq_s8): Likewise.
! 	(__arm_vqsubq_s8): Likewise.
! 	(__arm_vqsubq_n_s8): Likewise.
! 	(__arm_vqshlq_s8): Likewise.
! 	(__arm_vqshlq_r_s8): Likewise.
! 	(__arm_vqrshlq_s8): Likewise.
! 	(__arm_vqrshlq_n_s8): Likewise.
! 	(__arm_vqrdmulhq_s8): Likewise.
! 	(__arm_vqrdmulhq_n_s8): Likewise.
! 	(__arm_vqdmulhq_s8): Likewise.
! 	(__arm_vqdmulhq_n_s8): Likewise.
! 	(__arm_vqaddq_s8): Likewise.
! 	(__arm_vqaddq_n_s8): Likewise.
! 	(__arm_vorrq_s8): Likewise.
! 	(__arm_vornq_s8): Likewise.
! 	(__arm_vmulq_s8): Likewise.
! 	(__arm_vmulq_n_s8): Likewise.
! 	(__arm_vmulltq_int_s8): Likewise.
! 	(__arm_vmullbq_int_s8): Likewise.
! 	(__arm_vmulhq_s8): Likewise.
! 	(__arm_vmlsdavxq_s8): Likewise.
! 	(__arm_vmlsdavq_s8): Likewise.
! 	(__arm_vmladavxq_s8): Likewise.
! 	(__arm_vmladavq_s8): Likewise.
! 	(__arm_vminvq_s8): Likewise.
! 	(__arm_vminq_s8): Likewise.
! 	(__arm_vmaxvq_s8): Likewise.
! 	(__arm_vmaxq_s8): Likewise.
! 	(__arm_vhsubq_s8): Likewise.
! 	(__arm_vhsubq_n_s8): Likewise.
! 	(__arm_vhcaddq_rot90_s8): Likewise.
! 	(__arm_vhcaddq_rot270_s8): Likewise.
! 	(__arm_vhaddq_s8): Likewise.
! 	(__arm_vhaddq_n_s8): Likewise.
! 	(__arm_veorq_s8): Likewise.
! 	(__arm_vcaddq_rot90_s8): Likewise.
! 	(__arm_vcaddq_rot270_s8): Likewise.
! 	(__arm_vbrsrq_n_s8): Likewise.
! 	(__arm_vbicq_s8): Likewise.
! 	(__arm_vandq_s8): Likewise.
! 	(__arm_vaddvaq_s8): Likewise.
! 	(__arm_vaddq_n_s8): Likewise.
! 	(__arm_vabdq_s8): Likewise.
! 	(__arm_vshlq_n_s8): Likewise.
! 	(__arm_vrshrq_n_s8): Likewise.
! 	(__arm_vqshlq_n_s8): Likewise.
! 	(__arm_vsubq_u16): Likewise.
! 	(__arm_vsubq_n_u16): Likewise.
! 	(__arm_vrmulhq_u16): Likewise.
! 	(__arm_vrhaddq_u16): Likewise.
! 	(__arm_vqsubq_u16): Likewise.
! 	(__arm_vqsubq_n_u16): Likewise.
! 	(__arm_vqaddq_u16): Likewise.
! 	(__arm_vqaddq_n_u16): Likewise.
! 	(__arm_vorrq_u16): Likewise.
! 	(__arm_vornq_u16): Likewise.
! 	(__arm_vmulq_u16): Likewise.
! 	(__arm_vmulq_n_u16): Likewise.
! 	(__arm_vmulltq_int_u16): Likewise.
! 	(__arm_vmullbq_int_u16): Likewise.
! 	(__arm_vmulhq_u16): Likewise.
! 	(__arm_vmladavq_u16): Likewise.
! 	(__arm_vminvq_u16): Likewise.
! 	(__arm_vminq_u16): Likewise.
! 	(__arm_vmaxvq_u16): Likewise.
! 	(__arm_vmaxq_u16): Likewise.
! 	(__arm_vhsubq_u16): Likewise.
! 	(__arm_vhsubq_n_u16): Likewise.
! 	(__arm_vhaddq_u16): Likewise.
! 	(__arm_vhaddq_n_u16): Likewise.
! 	(__arm_veorq_u16): Likewise.
! 	(__arm_vcmpneq_n_u16): Likewise.
! 	(__arm_vcmphiq_u16): Likewise.
! 	(__arm_vcmphiq_n_u16): Likewise.
! 	(__arm_vcmpeqq_u16): Likewise.
! 	(__arm_vcmpeqq_n_u16): Likewise.
! 	(__arm_vcmpcsq_u16): Likewise.
! 	(__arm_vcmpcsq_n_u16): Likewise.
! 	(__arm_vcaddq_rot90_u16): Likewise.
! 	(__arm_vcaddq_rot270_u16): Likewise.
! 	(__arm_vbicq_u16): Likewise.
! 	(__arm_vandq_u16): Likewise.
! 	(__arm_vaddvq_p_u16): Likewise.
! 	(__arm_vaddvaq_u16): Likewise.
! 	(__arm_vaddq_n_u16): Likewise.
! 	(__arm_vabdq_u16): Likewise.
! 	(__arm_vshlq_r_u16): Likewise.
! 	(__arm_vrshlq_u16): Likewise.
! 	(__arm_vrshlq_n_u16): Likewise.
! 	(__arm_vqshlq_u16): Likewise.
! 	(__arm_vqshlq_r_u16): Likewise.
! 	(__arm_vqrshlq_u16): Likewise.
! 	(__arm_vqrshlq_n_u16): Likewise.
! 	(__arm_vminavq_s16): Likewise.
! 	(__arm_vminaq_s16): Likewise.
! 	(__arm_vmaxavq_s16): Likewise.
! 	(__arm_vmaxaq_s16): Likewise.
! 	(__arm_vbrsrq_n_u16): Likewise.
! 	(__arm_vshlq_n_u16): Likewise.
! 	(__arm_vrshrq_n_u16): Likewise.
! 	(__arm_vqshlq_n_u16): Likewise.
! 	(__arm_vcmpneq_n_s16): Likewise.
! 	(__arm_vcmpltq_s16): Likewise.
! 	(__arm_vcmpltq_n_s16): Likewise.
! 	(__arm_vcmpleq_s16): Likewise.
! 	(__arm_vcmpleq_n_s16): Likewise.
! 	(__arm_vcmpgtq_s16): Likewise.
! 	(__arm_vcmpgtq_n_s16): Likewise.
! 	(__arm_vcmpgeq_s16): Likewise.
! 	(__arm_vcmpgeq_n_s16): Likewise.
! 	(__arm_vcmpeqq_s16): Likewise.
! 	(__arm_vcmpeqq_n_s16): Likewise.
! 	(__arm_vqshluq_n_s16): Likewise.
! 	(__arm_vaddvq_p_s16): Likewise.
! 	(__arm_vsubq_s16): Likewise.
! 	(__arm_vsubq_n_s16): Likewise.
! 	(__arm_vshlq_r_s16): Likewise.
! 	(__arm_vrshlq_s16): Likewise.
! 	(__arm_vrshlq_n_s16): Likewise.
! 	(__arm_vrmulhq_s16): Likewise.
! 	(__arm_vrhaddq_s16): Likewise.
! 	(__arm_vqsubq_s16): Likewise.
! 	(__arm_vqsubq_n_s16): Likewise.
! 	(__arm_vqshlq_s16): Likewise.
! 	(__arm_vqshlq_r_s16): Likewise.
! 	(__arm_vqrshlq_s16): Likewise.
! 	(__arm_vqrshlq_n_s16): Likewise.
! 	(__arm_vqrdmulhq_s16): Likewise.
! 	(__arm_vqrdmulhq_n_s16): Likewise.
! 	(__arm_vqdmulhq_s16): Likewise.
! 	(__arm_vqdmulhq_n_s16): Likewise.
! 	(__arm_vqaddq_s16): Likewise.
! 	(__arm_vqaddq_n_s16): Likewise.
! 	(__arm_vorrq_s16): Likewise.
! 	(__arm_vornq_s16): Likewise.
! 	(__arm_vmulq_s16): Likewise.
! 	(__arm_vmulq_n_s16): Likewise.
! 	(__arm_vmulltq_int_s16): Likewise.
! 	(__arm_vmullbq_int_s16): Likewise.
! 	(__arm_vmulhq_s16): Likewise.
! 	(__arm_vmlsdavxq_s16): Likewise.
! 	(__arm_vmlsdavq_s16): Likewise.
! 	(__arm_vmladavxq_s16): Likewise.
! 	(__arm_vmladavq_s16): Likewise.
! 	(__arm_vminvq_s16): Likewise.
! 	(__arm_vminq_s16): Likewise.
! 	(__arm_vmaxvq_s16): Likewise.
! 	(__arm_vmaxq_s16): Likewise.
! 	(__arm_vhsubq_s16): Likewise.
! 	(__arm_vhsubq_n_s16): Likewise.
! 	(__arm_vhcaddq_rot90_s16): Likewise.
! 	(__arm_vhcaddq_rot270_s16): Likewise.
! 	(__arm_vhaddq_s16): Likewise.
! 	(__arm_vhaddq_n_s16): Likewise.
! 	(__arm_veorq_s16): Likewise.
! 	(__arm_vcaddq_rot90_s16): Likewise.
! 	(__arm_vcaddq_rot270_s16): Likewise.
! 	(__arm_vbrsrq_n_s16): Likewise.
! 	(__arm_vbicq_s16): Likewise.
! 	(__arm_vandq_s16): Likewise.
! 	(__arm_vaddvaq_s16): Likewise.
! 	(__arm_vaddq_n_s16): Likewise.
! 	(__arm_vabdq_s16): Likewise.
! 	(__arm_vshlq_n_s16): Likewise.
! 	(__arm_vrshrq_n_s16): Likewise.
! 	(__arm_vqshlq_n_s16): Likewise.
! 	(__arm_vsubq_u32): Likewise.
! 	(__arm_vsubq_n_u32): Likewise.
! 	(__arm_vrmulhq_u32): Likewise.
! 	(__arm_vrhaddq_u32): Likewise.
! 	(__arm_vqsubq_u32): Likewise.
! 	(__arm_vqsubq_n_u32): Likewise.
! 	(__arm_vqaddq_u32): Likewise.
! 	(__arm_vqaddq_n_u32): Likewise.
! 	(__arm_vorrq_u32): Likewise.
! 	(__arm_vornq_u32): Likewise.
! 	(__arm_vmulq_u32): Likewise.
! 	(__arm_vmulq_n_u32): Likewise.
! 	(__arm_vmulltq_int_u32): Likewise.
! 	(__arm_vmullbq_int_u32): Likewise.
! 	(__arm_vmulhq_u32): Likewise.
! 	(__arm_vmladavq_u32): Likewise.
! 	(__arm_vminvq_u32): Likewise.
! 	(__arm_vminq_u32): Likewise.
! 	(__arm_vmaxvq_u32): Likewise.
! 	(__arm_vmaxq_u32): Likewise.
! 	(__arm_vhsubq_u32): Likewise.
! 	(__arm_vhsubq_n_u32): Likewise.
! 	(__arm_vhaddq_u32): Likewise.
! 	(__arm_vhaddq_n_u32): Likewise.
! 	(__arm_veorq_u32): Likewise.
! 	(__arm_vcmpneq_n_u32): Likewise.
! 	(__arm_vcmphiq_u32): Likewise.
! 	(__arm_vcmphiq_n_u32): Likewise.
! 	(__arm_vcmpeqq_u32): Likewise.
! 	(__arm_vcmpeqq_n_u32): Likewise.
! 	(__arm_vcmpcsq_u32): Likewise.
! 	(__arm_vcmpcsq_n_u32): Likewise.
! 	(__arm_vcaddq_rot90_u32): Likewise.
! 	(__arm_vcaddq_rot270_u32): Likewise.
! 	(__arm_vbicq_u32): Likewise.
! 	(__arm_vandq_u32): Likewise.
! 	(__arm_vaddvq_p_u32): Likewise.
! 	(__arm_vaddvaq_u32): Likewise.
! 	(__arm_vaddq_n_u32): Likewise.
! 	(__arm_vabdq_u32): Likewise.
! 	(__arm_vshlq_r_u32): Likewise.
! 	(__arm_vrshlq_u32): Likewise.
! 	(__arm_vrshlq_n_u32): Likewise.
! 	(__arm_vqshlq_u32): Likewise.
! 	(__arm_vqshlq_r_u32): Likewise.
! 	(__arm_vqrshlq_u32): Likewise.
! 	(__arm_vqrshlq_n_u32): Likewise.
! 	(__arm_vminavq_s32): Likewise.
! 	(__arm_vminaq_s32): Likewise.
! 	(__arm_vmaxavq_s32): Likewise.
! 	(__arm_vmaxaq_s32): Likewise.
! 	(__arm_vbrsrq_n_u32): Likewise.
! 	(__arm_vshlq_n_u32): Likewise.
! 	(__arm_vrshrq_n_u32): Likewise.
! 	(__arm_vqshlq_n_u32): Likewise.
! 	(__arm_vcmpneq_n_s32): Likewise.
! 	(__arm_vcmpltq_s32): Likewise.
! 	(__arm_vcmpltq_n_s32): Likewise.
! 	(__arm_vcmpleq_s32): Likewise.
! 	(__arm_vcmpleq_n_s32): Likewise.
! 	(__arm_vcmpgtq_s32): Likewise.
! 	(__arm_vcmpgtq_n_s32): Likewise.
! 	(__arm_vcmpgeq_s32): Likewise.
! 	(__arm_vcmpgeq_n_s32): Likewise.
! 	(__arm_vcmpeqq_s32): Likewise.
! 	(__arm_vcmpeqq_n_s32): Likewise.
! 	(__arm_vqshluq_n_s32): Likewise.
! 	(__arm_vaddvq_p_s32): Likewise.
! 	(__arm_vsubq_s32): Likewise.
! 	(__arm_vsubq_n_s32): Likewise.
! 	(__arm_vshlq_r_s32): Likewise.
! 	(__arm_vrshlq_s32): Likewise.
! 	(__arm_vrshlq_n_s32): Likewise.
! 	(__arm_vrmulhq_s32): Likewise.
! 	(__arm_vrhaddq_s32): Likewise.
! 	(__arm_vqsubq_s32): Likewise.
! 	(__arm_vqsubq_n_s32): Likewise.
! 	(__arm_vqshlq_s32): Likewise.
! 	(__arm_vqshlq_r_s32): Likewise.
! 	(__arm_vqrshlq_s32): Likewise.
! 	(__arm_vqrshlq_n_s32): Likewise.
! 	(__arm_vqrdmulhq_s32): Likewise.
! 	(__arm_vqrdmulhq_n_s32): Likewise.
! 	(__arm_vqdmulhq_s32): Likewise.
! 	(__arm_vqdmulhq_n_s32): Likewise.
! 	(__arm_vqaddq_s32): Likewise.
! 	(__arm_vqaddq_n_s32): Likewise.
! 	(__arm_vorrq_s32): Likewise.
! 	(__arm_vornq_s32): Likewise.
! 	(__arm_vmulq_s32): Likewise.
! 	(__arm_vmulq_n_s32): Likewise.
! 	(__arm_vmulltq_int_s32): Likewise.
! 	(__arm_vmullbq_int_s32): Likewise.
! 	(__arm_vmulhq_s32): Likewise.
! 	(__arm_vmlsdavxq_s32): Likewise.
! 	(__arm_vmlsdavq_s32): Likewise.
! 	(__arm_vmladavxq_s32): Likewise.
! 	(__arm_vmladavq_s32): Likewise.
! 	(__arm_vminvq_s32): Likewise.
! 	(__arm_vminq_s32): Likewise.
! 	(__arm_vmaxvq_s32): Likewise.
! 	(__arm_vmaxq_s32): Likewise.
! 	(__arm_vhsubq_s32): Likewise.
! 	(__arm_vhsubq_n_s32): Likewise.
! 	(__arm_vhcaddq_rot90_s32): Likewise.
! 	(__arm_vhcaddq_rot270_s32): Likewise.
! 	(__arm_vhaddq_s32): Likewise.
! 	(__arm_vhaddq_n_s32): Likewise.
! 	(__arm_veorq_s32): Likewise.
! 	(__arm_vcaddq_rot90_s32): Likewise.
! 	(__arm_vcaddq_rot270_s32): Likewise.
! 	(__arm_vbrsrq_n_s32): Likewise.
! 	(__arm_vbicq_s32): Likewise.
! 	(__arm_vandq_s32): Likewise.
! 	(__arm_vaddvaq_s32): Likewise.
! 	(__arm_vaddq_n_s32): Likewise.
! 	(__arm_vabdq_s32): Likewise.
! 	(__arm_vshlq_n_s32): Likewise.
! 	(__arm_vrshrq_n_s32): Likewise.
! 	(__arm_vqshlq_n_s32): Likewise.
! 	(vsubq): Define polymorphic variant.
! 	(vsubq_n): Likewise.
! 	(vshlq_r): Likewise.
! 	(vrshlq_n): Likewise.
! 	(vrshlq): Likewise.
! 	(vrmulhq): Likewise.
! 	(vrhaddq): Likewise.
! 	(vqsubq_n): Likewise.
! 	(vqsubq): Likewise.
! 	(vqshlq): Likewise.
! 	(vqshlq_r): Likewise.
! 	(vqshluq): Likewise.
! 	(vrshrq_n): Likewise.
! 	(vshlq_n): Likewise.
! 	(vqshluq_n): Likewise.
! 	(vqshlq_n): Likewise.
! 	(vqrshlq_n): Likewise.
! 	(vqrshlq): Likewise.
! 	(vqrdmulhq_n): Likewise.
! 	(vqrdmulhq): Likewise.
! 	(vqdmulhq_n): Likewise.
! 	(vqdmulhq): Likewise.
! 	(vqaddq_n): Likewise.
! 	(vqaddq): Likewise.
! 	(vorrq_n): Likewise.
! 	(vorrq): Likewise.
! 	(vornq): Likewise.
! 	(vmulq_n): Likewise.
! 	(vmulq): Likewise.
! 	(vmulltq_int): Likewise.
! 	(vmullbq_int): Likewise.
! 	(vmulhq): Likewise.
! 	(vminq): Likewise.
! 	(vminaq): Likewise.
! 	(vmaxq): Likewise.
! 	(vmaxaq): Likewise.
! 	(vhsubq_n): Likewise.
! 	(vhsubq): Likewise.
! 	(vhcaddq_rot90): Likewise.
! 	(vhcaddq_rot270): Likewise.
! 	(vhaddq_n): Likewise.
! 	(vhaddq): Likewise.
! 	(veorq): Likewise.
! 	(vcaddq_rot90): Likewise.
! 	(vcaddq_rot270): Likewise.
! 	(vbrsrq_n): Likewise.
! 	(vbicq_n): Likewise.
! 	(vbicq): Likewise.
! 	(vaddq): Likewise.
! 	(vaddq_n): Likewise.
! 	(vandq): Likewise.
! 	(vabdq): Likewise.
! 	* config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
! 	(BINOP_NONE_NONE_NONE): Likewise.
! 	(BINOP_NONE_NONE_UNONE): Likewise.
! 	(BINOP_UNONE_NONE_IMM): Likewise.
! 	(BINOP_UNONE_NONE_NONE): Likewise.
! 	(BINOP_UNONE_UNONE_IMM): Likewise.
! 	(BINOP_UNONE_UNONE_NONE): Likewise.
! 	(BINOP_UNONE_UNONE_UNONE): Likewise.
! 	* config/arm/constraints.md (Ra): Define constraint to check constant is
! 	in the range of 0 to 7.
! 	(Rg): Define constriant to check the constant is one among 1, 2, 4
! 	and 8.
! 	* config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
! 	(mve_vaddq_n_<supf>): Likewise.
! 	(mve_vaddvaq_<supf>): Likewise.
! 	(mve_vaddvq_p_<supf>): Likewise.
! 	(mve_vandq_<supf>): Likewise.
! 	(mve_vbicq_<supf>): Likewise.
! 	(mve_vbrsrq_n_<supf>): Likewise.
! 	(mve_vcaddq_rot270_<supf>): Likewise.
! 	(mve_vcaddq_rot90_<supf>): Likewise.
! 	(mve_vcmpcsq_n_u): Likewise.
! 	(mve_vcmpcsq_u): Likewise.
! 	(mve_vcmpeqq_n_<supf>): Likewise.
! 	(mve_vcmpeqq_<supf>): Likewise.
! 	(mve_vcmpgeq_n_s): Likewise.
! 	(mve_vcmpgeq_s): Likewise.
! 	(mve_vcmpgtq_n_s): Likewise.
! 	(mve_vcmpgtq_s): Likewise.
! 	(mve_vcmphiq_n_u): Likewise.
! 	(mve_vcmphiq_u): Likewise.
! 	(mve_vcmpleq_n_s): Likewise.
! 	(mve_vcmpleq_s): Likewise.
! 	(mve_vcmpltq_n_s): Likewise.
! 	(mve_vcmpltq_s): Likewise.
! 	(mve_vcmpneq_n_<supf>): Likewise.
! 	(mve_vddupq_n_u): Likewise.
! 	(mve_veorq_<supf>): Likewise.
! 	(mve_vhaddq_n_<supf>): Likewise.
! 	(mve_vhaddq_<supf>): Likewise.
! 	(mve_vhcaddq_rot270_s): Likewise.
! 	(mve_vhcaddq_rot90_s): Likewise.
! 	(mve_vhsubq_n_<supf>): Likewise.
! 	(mve_vhsubq_<supf>): Likewise.
! 	(mve_vidupq_n_u): Likewise.
! 	(mve_vmaxaq_s): Likewise.
! 	(mve_vmaxavq_s): Likewise.
! 	(mve_vmaxq_<supf>): Likewise.
! 	(mve_vmaxvq_<supf>): Likewise.
! 	(mve_vminaq_s): Likewise.
! 	(mve_vminavq_s): Likewise.
! 	(mve_vminq_<supf>): Likewise.
! 	(mve_vminvq_<supf>): Likewise.
! 	(mve_vmladavq_<supf>): Likewise.
! 	(mve_vmladavxq_s): Likewise.
! 	(mve_vmlsdavq_s): Likewise.
! 	(mve_vmlsdavxq_s): Likewise.
! 	(mve_vmulhq_<supf>): Likewise.
! 	(mve_vmullbq_int_<supf>): Likewise.
! 	(mve_vmulltq_int_<supf>): Likewise.
! 	(mve_vmulq_n_<supf>): Likewise.
! 	(mve_vmulq_<supf>): Likewise.
! 	(mve_vornq_<supf>): Likewise.
! 	(mve_vorrq_<supf>): Likewise.
! 	(mve_vqaddq_n_<supf>): Likewise.
! 	(mve_vqaddq_<supf>): Likewise.
! 	(mve_vqdmulhq_n_s): Likewise.
! 	(mve_vqdmulhq_s): Likewise.
! 	(mve_vqrdmulhq_n_s): Likewise.
! 	(mve_vqrdmulhq_s): Likewise.
! 	(mve_vqrshlq_n_<supf>): Likewise.
! 	(mve_vqrshlq_<supf>): Likewise.
! 	(mve_vqshlq_n_<supf>): Likewise.
! 	(mve_vqshlq_r_<supf>): Likewise.
! 	(mve_vqshlq_<supf>): Likewise.
! 	(mve_vqshluq_n_s): Likewise.
! 	(mve_vqsubq_n_<supf>): Likewise.
! 	(mve_vqsubq_<supf>): Likewise.
! 	(mve_vrhaddq_<supf>): Likewise.
! 	(mve_vrmulhq_<supf>): Likewise.
! 	(mve_vrshlq_n_<supf>): Likewise.
! 	(mve_vrshlq_<supf>): Likewise.
! 	(mve_vrshrq_n_<supf>): Likewise.
! 	(mve_vshlq_n_<supf>): Likewise.
! 	(mve_vshlq_r_<supf>): Likewise.
! 	(mve_vsubq_n_<supf>): Likewise.
! 	(mve_vsubq_<supf>): Likewise.
! 	* config/arm/predicates.md (mve_imm_7): Define predicate to check
! 	the matching constraint Ra.
! 	(mve_imm_selective_upto_8): Define predicate to check the matching
! 	constraint Rg.
  
! 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
! 	qualifier for binary operands.
! 	(BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
! 	(BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
! 	(vaddlvq_p_u32): Likewise.
! 	(vcmpneq_s8): Likewise.
! 	(vcmpneq_s16): Likewise.
! 	(vcmpneq_s32): Likewise.
! 	(vcmpneq_u8): Likewise.
! 	(vcmpneq_u16): Likewise.
! 	(vcmpneq_u32): Likewise.
! 	(vshlq_s8): Likewise.
! 	(vshlq_s16): Likewise.
! 	(vshlq_s32): Likewise.
! 	(vshlq_u8): Likewise.
! 	(vshlq_u16): Likewise.
! 	(vshlq_u32): Likewise.
! 	(__arm_vaddlvq_p_s32): Define intrinsic.
! 	(__arm_vaddlvq_p_u32): Likewise.
! 	(__arm_vcmpneq_s8): Likewise.
! 	(__arm_vcmpneq_s16): Likewise.
! 	(__arm_vcmpneq_s32): Likewise.
! 	(__arm_vcmpneq_u8): Likewise.
! 	(__arm_vcmpneq_u16): Likewise.
! 	(__arm_vcmpneq_u32): Likewise.
! 	(__arm_vshlq_s8): Likewise.
! 	(__arm_vshlq_s16): Likewise.
! 	(__arm_vshlq_s32): Likewise.
! 	(__arm_vshlq_u8): Likewise.
! 	(__arm_vshlq_u16): Likewise.
! 	(__arm_vshlq_u32): Likewise.
! 	(vaddlvq_p): Define polymorphic variant.
! 	(vcmpneq): Likewise.
! 	(vshlq): Likewise.
! 	* config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
! 	Use it.
! 	(BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
! 	(BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
! 	* config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
! 	(mve_vcmpneq_<supf><mode>): Likewise.
! 	(mve_vshlq_<supf><mode>): Likewise.
  
! 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
! 	qualifier for binary operands.
! 	(BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
! 	(BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
! 	(vcvtq_n_s32_f32): Likewise.
! 	(vcvtq_n_u16_f16): Likewise.
! 	(vcvtq_n_u32_f32): Likewise.
! 	(vcreateq_u8): Likewise.
! 	(vcreateq_u16): Likewise.
! 	(vcreateq_u32): Likewise.
! 	(vcreateq_u64): Likewise.
! 	(vcreateq_s8): Likewise.
! 	(vcreateq_s16): Likewise.
! 	(vcreateq_s32): Likewise.
! 	(vcreateq_s64): Likewise.
! 	(vshrq_n_s8): Likewise.
! 	(vshrq_n_s16): Likewise.
! 	(vshrq_n_s32): Likewise.
! 	(vshrq_n_u8): Likewise.
! 	(vshrq_n_u16): Likewise.
! 	(vshrq_n_u32): Likewise.
! 	(__arm_vcreateq_u8): Define intrinsic.
! 	(__arm_vcreateq_u16): Likewise.
! 	(__arm_vcreateq_u32): Likewise.
! 	(__arm_vcreateq_u64): Likewise.
! 	(__arm_vcreateq_s8): Likewise.
! 	(__arm_vcreateq_s16): Likewise.
! 	(__arm_vcreateq_s32): Likewise.
! 	(__arm_vcreateq_s64): Likewise.
! 	(__arm_vshrq_n_s8): Likewise.
! 	(__arm_vshrq_n_s16): Likewise.
! 	(__arm_vshrq_n_s32): Likewise.
! 	(__arm_vshrq_n_u8): Likewise.
! 	(__arm_vshrq_n_u16): Likewise.
! 	(__arm_vshrq_n_u32): Likewise.
! 	(__arm_vcvtq_n_s16_f16): Likewise.
! 	(__arm_vcvtq_n_s32_f32): Likewise.
! 	(__arm_vcvtq_n_u16_f16): Likewise.
! 	(__arm_vcvtq_n_u32_f32): Likewise.
! 	(vshrq_n): Define polymorphic variant.
! 	* config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
! 	Use it.
! 	(BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
! 	(BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
! 	* config/arm/constraints.md (Rb): Define constraint to check constant is
! 	in the range of 1 to 8.
! 	(Rf): Define constraint to check constant is in the range of 1 to 32.
! 	* config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
! 	(mve_vshrq_n_<supf><mode>): Likewise.
! 	(mve_vcvtq_n_from_f_<supf><mode>): Likewise.
! 	* config/arm/predicates.md (mve_imm_8): Define predicate to check
! 	the matching constraint Rb.
! 	(mve_imm_32): Define predicate to check the matching constraint Rf.
  
! 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
! 	qualifier for binary operands.
! 	(BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
! 	(BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
! 	(BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (vsubq_n_f16): Define macro.
! 	(vsubq_n_f32): Likewise.
! 	(vbrsrq_n_f16): Likewise.
! 	(vbrsrq_n_f32): Likewise.
! 	(vcvtq_n_f16_s16): Likewise.
! 	(vcvtq_n_f32_s32): Likewise.
! 	(vcvtq_n_f16_u16): Likewise.
! 	(vcvtq_n_f32_u32): Likewise.
! 	(vcreateq_f16): Likewise.
! 	(vcreateq_f32): Likewise.
! 	(__arm_vsubq_n_f16): Define intrinsic.
! 	(__arm_vsubq_n_f32): Likewise.
! 	(__arm_vbrsrq_n_f16): Likewise.
! 	(__arm_vbrsrq_n_f32): Likewise.
! 	(__arm_vcvtq_n_f16_s16): Likewise.
! 	(__arm_vcvtq_n_f32_s32): Likewise.
! 	(__arm_vcvtq_n_f16_u16): Likewise.
! 	(__arm_vcvtq_n_f32_u32): Likewise.
! 	(__arm_vcreateq_f16): Likewise.
! 	(__arm_vcreateq_f32): Likewise.
! 	(vsubq): Define polymorphic variant.
! 	(vbrsrq): Likewise.
! 	(vcvtq_n): Likewise.
! 	* config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
! 	it.
! 	(BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
! 	(BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
! 	(BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
! 	* config/arm/constraints.md (Rd): Define constraint to check constant is
! 	in the range of 1 to 16.
! 	* config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
! 	mve_vbrsrq_n_f<mode>: Likewise.
! 	mve_vcvtq_n_to_f_<supf><mode>: Likewise.
! 	mve_vcreateq_f<mode>: Likewise.
! 	* config/arm/predicates.md (mve_imm_16): Define predicate to check
! 	the matching constraint Rd.
  
! 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (hi_UP): Define mode.
! 	* config/arm/arm.h (IS_VPR_REGNUM): Move.
! 	* config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
! 	(APSRQ_REGNUM): Modify.
! 	(APSRGE_REGNUM): Modify.
! 	* config/arm/arm_mve.h (vctp16q): Define macro.
! 	(vctp32q): Likewise.
! 	(vctp64q): Likewise.
! 	(vctp8q): Likewise.
! 	(vpnot): Likewise.
! 	(__arm_vctp16q): Define intrinsic.
! 	(__arm_vctp32q): Likewise.
! 	(__arm_vctp64q): Likewise.
! 	(__arm_vctp8q): Likewise.
! 	(__arm_vpnot): Likewise.
! 	* config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
! 	qualifier.
! 	* config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
! 	(mve_vpnothi): Likewise.
  
! 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
! 	* config/arm/arm_mve.h (vdupq_n_s8): Define macro.
! 	(vdupq_n_s16): Likewise.
! 	(vdupq_n_s32): Likewise.
! 	(vabsq_s8): Likewise.
! 	(vabsq_s16): Likewise.
! 	(vabsq_s32): Likewise.
! 	(vclsq_s8): Likewise.
! 	(vclsq_s16): Likewise.
! 	(vclsq_s32): Likewise.
! 	(vclzq_s8): Likewise.
! 	(vclzq_s16): Likewise.
! 	(vclzq_s32): Likewise.
! 	(vnegq_s8): Likewise.
! 	(vnegq_s16): Likewise.
! 	(vnegq_s32): Likewise.
! 	(vaddlvq_s32): Likewise.
! 	(vaddvq_s8): Likewise.
! 	(vaddvq_s16): Likewise.
! 	(vaddvq_s32): Likewise.
! 	(vmovlbq_s8): Likewise.
! 	(vmovlbq_s16): Likewise.
! 	(vmovltq_s8): Likewise.
! 	(vmovltq_s16): Likewise.
! 	(vmvnq_s8): Likewise.
! 	(vmvnq_s16): Likewise.
! 	(vmvnq_s32): Likewise.
! 	(vrev16q_s8): Likewise.
! 	(vrev32q_s8): Likewise.
! 	(vrev32q_s16): Likewise.
! 	(vqabsq_s8): Likewise.
! 	(vqabsq_s16): Likewise.
! 	(vqabsq_s32): Likewise.
! 	(vqnegq_s8): Likewise.
! 	(vqnegq_s16): Likewise.
! 	(vqnegq_s32): Likewise.
! 	(vcvtaq_s16_f16): Likewise.
! 	(vcvtaq_s32_f32): Likewise.
! 	(vcvtnq_s16_f16): Likewise.
! 	(vcvtnq_s32_f32): Likewise.
! 	(vcvtpq_s16_f16): Likewise.
! 	(vcvtpq_s32_f32): Likewise.
! 	(vcvtmq_s16_f16): Likewise.
! 	(vcvtmq_s32_f32): Likewise.
! 	(vmvnq_u8): Likewise.
! 	(vmvnq_u16): Likewise.
! 	(vmvnq_u32): Likewise.
! 	(vdupq_n_u8): Likewise.
! 	(vdupq_n_u16): Likewise.
! 	(vdupq_n_u32): Likewise.
! 	(vclzq_u8): Likewise.
! 	(vclzq_u16): Likewise.
! 	(vclzq_u32): Likewise.
! 	(vaddvq_u8): Likewise.
! 	(vaddvq_u16): Likewise.
! 	(vaddvq_u32): Likewise.
! 	(vrev32q_u8): Likewise.
! 	(vrev32q_u16): Likewise.
! 	(vmovltq_u8): Likewise.
! 	(vmovltq_u16): Likewise.
! 	(vmovlbq_u8): Likewise.
! 	(vmovlbq_u16): Likewise.
! 	(vrev16q_u8): Likewise.
! 	(vaddlvq_u32): Likewise.
! 	(vcvtpq_u16_f16): Likewise.
! 	(vcvtpq_u32_f32): Likewise.
! 	(vcvtnq_u16_f16): Likewise.
! 	(vcvtmq_u16_f16): Likewise.
! 	(vcvtmq_u32_f32): Likewise.
! 	(vcvtaq_u16_f16): Likewise.
! 	(vcvtaq_u32_f32): Likewise.
! 	(__arm_vdupq_n_s8): Define intrinsic.
! 	(__arm_vdupq_n_s16): Likewise.
! 	(__arm_vdupq_n_s32): Likewise.
! 	(__arm_vabsq_s8): Likewise.
! 	(__arm_vabsq_s16): Likewise.
! 	(__arm_vabsq_s32): Likewise.
! 	(__arm_vclsq_s8): Likewise.
! 	(__arm_vclsq_s16): Likewise.
! 	(__arm_vclsq_s32): Likewise.
! 	(__arm_vclzq_s8): Likewise.
! 	(__arm_vclzq_s16): Likewise.
! 	(__arm_vclzq_s32): Likewise.
! 	(__arm_vnegq_s8): Likewise.
! 	(__arm_vnegq_s16): Likewise.
! 	(__arm_vnegq_s32): Likewise.
! 	(__arm_vaddlvq_s32): Likewise.
! 	(__arm_vaddvq_s8): Likewise.
! 	(__arm_vaddvq_s16): Likewise.
! 	(__arm_vaddvq_s32): Likewise.
! 	(__arm_vmovlbq_s8): Likewise.
! 	(__arm_vmovlbq_s16): Likewise.
! 	(__arm_vmovltq_s8): Likewise.
! 	(__arm_vmovltq_s16): Likewise.
! 	(__arm_vmvnq_s8): Likewise.
! 	(__arm_vmvnq_s16): Likewise.
! 	(__arm_vmvnq_s32): Likewise.
! 	(__arm_vrev16q_s8): Likewise.
! 	(__arm_vrev32q_s8): Likewise.
! 	(__arm_vrev32q_s16): Likewise.
! 	(__arm_vqabsq_s8): Likewise.
! 	(__arm_vqabsq_s16): Likewise.
! 	(__arm_vqabsq_s32): Likewise.
! 	(__arm_vqnegq_s8): Likewise.
! 	(__arm_vqnegq_s16): Likewise.
! 	(__arm_vqnegq_s32): Likewise.
! 	(__arm_vmvnq_u8): Likewise.
! 	(__arm_vmvnq_u16): Likewise.
! 	(__arm_vmvnq_u32): Likewise.
! 	(__arm_vdupq_n_u8): Likewise.
! 	(__arm_vdupq_n_u16): Likewise.
! 	(__arm_vdupq_n_u32): Likewise.
! 	(__arm_vclzq_u8): Likewise.
! 	(__arm_vclzq_u16): Likewise.
! 	(__arm_vclzq_u32): Likewise.
! 	(__arm_vaddvq_u8): Likewise.
! 	(__arm_vaddvq_u16): Likewise.
! 	(__arm_vaddvq_u32): Likewise.
! 	(__arm_vrev32q_u8): Likewise.
! 	(__arm_vrev32q_u16): Likewise.
! 	(__arm_vmovltq_u8): Likewise.
! 	(__arm_vmovltq_u16): Likewise.
! 	(__arm_vmovlbq_u8): Likewise.
! 	(__arm_vmovlbq_u16): Likewise.
! 	(__arm_vrev16q_u8): Likewise.
! 	(__arm_vaddlvq_u32): Likewise.
! 	(__arm_vcvtpq_u16_f16): Likewise.
! 	(__arm_vcvtpq_u32_f32): Likewise.
! 	(__arm_vcvtnq_u16_f16): Likewise.
! 	(__arm_vcvtmq_u16_f16): Likewise.
! 	(__arm_vcvtmq_u32_f32): Likewise.
! 	(__arm_vcvtaq_u16_f16): Likewise.
! 	(__arm_vcvtaq_u32_f32): Likewise.
! 	(__arm_vcvtaq_s16_f16): Likewise.
! 	(__arm_vcvtaq_s32_f32): Likewise.
! 	(__arm_vcvtnq_s16_f16): Likewise.
! 	(__arm_vcvtnq_s32_f32): Likewise.
! 	(__arm_vcvtpq_s16_f16): Likewise.
! 	(__arm_vcvtpq_s32_f32): Likewise.
! 	(__arm_vcvtmq_s16_f16): Likewise.
! 	(__arm_vcvtmq_s32_f32): Likewise.
! 	(vdupq_n): Define polymorphic variant.
! 	(vabsq): Likewise.
! 	(vclsq): Likewise.
! 	(vclzq): Likewise.
! 	(vnegq): Likewise.
! 	(vaddlvq): Likewise.
! 	(vaddvq): Likewise.
! 	(vmovlbq): Likewise.
! 	(vmovltq): Likewise.
! 	(vmvnq): Likewise.
! 	(vrev16q): Likewise.
! 	(vrev32q): Likewise.
! 	(vqabsq): Likewise.
! 	(vqnegq): Likewise.
! 	* config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
! 	(UNOP_SNONE_NONE): Likewise.
! 	(UNOP_UNONE_UNONE): Likewise.
! 	(UNOP_UNONE_NONE): Likewise.
! 	* config/arm/constraints.md (e): Define new constriant to allow only
! 	even registers.
! 	* config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
! 	(mve_vnegq_s<mode>): Likewise.
! 	(mve_vmvnq_<supf><mode>): Likewise.
! 	(mve_vdupq_n_<supf><mode>): Likewise.
! 	(mve_vclzq_<supf><mode>): Likewise.
! 	(mve_vclsq_s<mode>): Likewise.
! 	(mve_vaddvq_<supf><mode>): Likewise.
! 	(mve_vabsq_s<mode>): Likewise.
! 	(mve_vrev32q_<supf><mode>): Likewise.
! 	(mve_vmovltq_<supf><mode>): Likewise.
! 	(mve_vmovlbq_<supf><mode>): Likewise.
! 	(mve_vcvtpq_<supf><mode>): Likewise.
! 	(mve_vcvtnq_<supf><mode>): Likewise.
! 	(mve_vcvtmq_<supf><mode>): Likewise.
! 	(mve_vcvtaq_<supf><mode>): Likewise.
! 	(mve_vrev16q_<supf>v16qi): Likewise.
! 	(mve_vaddlvq_<supf>v4si): Likewise.
  
! 2020-03-17  Jakub Jelinek  <jakub@redhat.com>
  
! 	* lra-spills.c (remove_pseudos): Fix up duplicated word issue in
! 	a dump message.
! 	* tree-sra.c (create_access_replacement): Fix up duplicated word issue
! 	in a comment.
! 	* read-rtl-function.c (find_param_by_name,
! 	function_reader::parse_enum_value, function_reader::get_insn_by_uid):
! 	Likewise.
! 	* spellcheck.c (get_edit_distance_cutoff): Likewise.
! 	* tree-data-ref.c (create_ifn_alias_checks): Likewise.
! 	* tree.def (SWITCH_EXPR): Likewise.
! 	* selftest.c (assert_str_contains): Likewise.
! 	* ipa-param-manipulation.h (class ipa_param_body_adjustments):
! 	Likewise.
! 	* tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
! 	* tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
! 	* langhooks.h (struct lang_hooks_for_decls): Likewise.
! 	* ipa-prop.h (struct ipa_param_descriptor): Likewise.
! 	* tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
! 	Likewise.
! 	* tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
! 	* tree-ssa-reassoc.c (reassociate_bb): Likewise.
! 	* tree.c (component_ref_size): Likewise.
! 	* hsa-common.c (hsa_init_compilation_unit_data): Likewise.
! 	* gimple-ssa-sprintf.c (get_string_length, format_string,
! 	format_directive): Likewise.
! 	* omp-grid.c (grid_process_kernel_body_copy): Likewise.
! 	* input.c (string_concat_db::get_string_concatenation,
! 	test_lexer_string_locations_ucn4): Likewise.
! 	* cfgexpand.c (pass_expand::execute): Likewise.
! 	* gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
! 	maybe_diag_overlap): Likewise.
! 	* rtl.c (RTX_CODE_HWINT_P_1): Likewise.
! 	* shrink-wrap.c (spread_components): Likewise.
! 	* tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
! 	Likewise.
! 	* tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
! 	Likewise.
! 	* dwarf2out.c (dwarf2out_early_finish): Likewise.
! 	* gimple-ssa-store-merging.c: Likewise.
! 	* ira-costs.c (record_operand_costs): Likewise.
! 	* tree-vect-loop.c (vectorizable_reduction): Likewise.
! 	* target.def (dispatch): Likewise.
! 	(validate_dims, gen_ccmp_first): Fix up duplicated word issue
! 	in documentation text.
! 	* doc/tm.texi: Regenerated.
! 	* config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
! 	duplicated word issue in a comment.
! 	* config/i386/i386.c (ix86_test_loading_unspec): Likewise.
! 	* config/i386/i386-features.c (remove_partial_avx_dependency):
! 	Likewise.
! 	* config/msp430/msp430.c (msp430_select_section): Likewise.
! 	* config/gcn/gcn-run.c (load_image): Likewise.
! 	* config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
! 	* config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
! 	* config/aarch64/falkor-tag-collision-avoidance.c
! 	(single_dest_per_chain): Likewise.
! 	* config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
! 	* config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
! 	* config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
! 	* config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
! 	Likewise.
! 	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
! 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
! 	* config/rs6000/rs6000-logue.c
! 	(rs6000_emit_probe_stack_range_stack_clash): Likewise.
! 	* config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
! 	Fix various other issues in the comment.
  
! 2020-03-17  Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/arm/t-rmprofile: create new multilib for
! 	armv8.1-m.main+mve hard float and reuse v8-m.main ones for
! 	v8.1-m.main+mve.
  
! 2020-03-17  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/94015
! 	* tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
! 	function where EXP is address of the bytes being stored rather than
! 	the bytes themselves into count_nonzero_bytes_addr.  Punt on zero
! 	sized MEM_REF.  Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
! 	Use ctor_for_folding instead of looking at DECL_INITIAL.  Punt before
! 	calling native_encode_expr if host or target doesn't have 8-bit
! 	chars.  Formatting fixes.
! 	(count_nonzero_bytes_addr): New function.
  
! 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
! 	(UNOP_SNONE_NONE_QUALIFIERS): Likewise.
! 	(UNOP_SNONE_IMM_QUALIFIERS): Likewise.
! 	(UNOP_UNONE_NONE_QUALIFIERS): Likewise.
! 	(UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
! 	(UNOP_UNONE_IMM_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
! 	(vmvnq_n_s32): Likewise.
! 	(vrev64q_s8): Likewise.
! 	(vrev64q_s16): Likewise.
! 	(vrev64q_s32): Likewise.
! 	(vcvtq_s16_f16): Likewise.
! 	(vcvtq_s32_f32): Likewise.
! 	(vrev64q_u8): Likewise.
! 	(vrev64q_u16): Likewise.
! 	(vrev64q_u32): Likewise.
! 	(vmvnq_n_u16): Likewise.
! 	(vmvnq_n_u32): Likewise.
! 	(vcvtq_u16_f16): Likewise.
! 	(vcvtq_u32_f32): Likewise.
! 	(__arm_vmvnq_n_s16): Define intrinsic.
! 	(__arm_vmvnq_n_s32): Likewise.
! 	(__arm_vrev64q_s8): Likewise.
! 	(__arm_vrev64q_s16): Likewise.
! 	(__arm_vrev64q_s32): Likewise.
! 	(__arm_vrev64q_u8): Likewise.
! 	(__arm_vrev64q_u16): Likewise.
! 	(__arm_vrev64q_u32): Likewise.
! 	(__arm_vmvnq_n_u16): Likewise.
! 	(__arm_vmvnq_n_u32): Likewise.
! 	(__arm_vcvtq_s16_f16): Likewise.
! 	(__arm_vcvtq_s32_f32): Likewise.
! 	(__arm_vcvtq_u16_f16): Likewise.
! 	(__arm_vcvtq_u32_f32): Likewise.
! 	(vrev64q): Define polymorphic variant.
! 	* config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
! 	(UNOP_SNONE_NONE): Likewise.
! 	(UNOP_SNONE_IMM): Likewise.
! 	(UNOP_UNONE_UNONE): Likewise.
! 	(UNOP_UNONE_NONE): Likewise.
! 	(UNOP_UNONE_IMM): Likewise.
! 	* config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
! 	(mve_vcvtq_from_f_<supf><mode>): Likewise.
! 	(mve_vmvnq_n_<supf><mode>): Likewise.
  
! 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
! 	(UNOP_NONE_SNONE_QUALIFIERS): Likewise.
! 	(UNOP_NONE_UNONE_QUALIFIERS): Likewise.
! 	* config/arm/arm_mve.h (vrndxq_f16): Define macro.
! 	(vrndxq_f32): Likewise.
! 	(vrndq_f16) Likewise.
! 	(vrndq_f32): Likewise.
! 	(vrndpq_f16): Likewise.
! 	(vrndpq_f32): Likewise.
! 	(vrndnq_f16): Likewise.
! 	(vrndnq_f32): Likewise.
! 	(vrndmq_f16): Likewise.
! 	(vrndmq_f32): Likewise. 
! 	(vrndaq_f16): Likewise.
! 	(vrndaq_f32): Likewise.
! 	(vrev64q_f16): Likewise.
! 	(vrev64q_f32): Likewise.
! 	(vnegq_f16): Likewise.
! 	(vnegq_f32): Likewise.
! 	(vdupq_n_f16): Likewise.
! 	(vdupq_n_f32): Likewise.
! 	(vabsq_f16): Likewise.
! 	(vabsq_f32): Likewise.
! 	(vrev32q_f16): Likewise.
! 	(vcvttq_f32_f16): Likewise.
! 	(vcvtbq_f32_f16): Likewise.
! 	(vcvtq_f16_s16): Likewise.
! 	(vcvtq_f32_s32): Likewise.
! 	(vcvtq_f16_u16): Likewise.
! 	(vcvtq_f32_u32): Likewise.
! 	(__arm_vrndxq_f16): Define intrinsic.
! 	(__arm_vrndxq_f32): Likewise.
! 	(__arm_vrndq_f16): Likewise.
! 	(__arm_vrndq_f32): Likewise.
! 	(__arm_vrndpq_f16): Likewise.
! 	(__arm_vrndpq_f32): Likewise.
! 	(__arm_vrndnq_f16): Likewise.
! 	(__arm_vrndnq_f32): Likewise.
! 	(__arm_vrndmq_f16): Likewise.
! 	(__arm_vrndmq_f32): Likewise.
! 	(__arm_vrndaq_f16): Likewise.
! 	(__arm_vrndaq_f32): Likewise.
! 	(__arm_vrev64q_f16): Likewise.
! 	(__arm_vrev64q_f32): Likewise.
! 	(__arm_vnegq_f16): Likewise.
! 	(__arm_vnegq_f32): Likewise.
! 	(__arm_vdupq_n_f16): Likewise.
! 	(__arm_vdupq_n_f32): Likewise.
! 	(__arm_vabsq_f16): Likewise.
! 	(__arm_vabsq_f32): Likewise.
! 	(__arm_vrev32q_f16): Likewise.
! 	(__arm_vcvttq_f32_f16): Likewise.
! 	(__arm_vcvtbq_f32_f16): Likewise.
! 	(__arm_vcvtq_f16_s16): Likewise.
! 	(__arm_vcvtq_f32_s32): Likewise.
! 	(__arm_vcvtq_f16_u16): Likewise.
! 	(__arm_vcvtq_f32_u32): Likewise.
! 	(vrndxq): Define polymorphic variants.
! 	(vrndq): Likewise.
! 	(vrndpq): Likewise.
! 	(vrndnq): Likewise.
! 	(vrndmq): Likewise.
! 	(vrndaq): Likewise.
! 	(vrev64q): Likewise.
! 	(vnegq): Likewise.
! 	(vabsq): Likewise.
! 	(vrev32q): Likewise.
! 	(vcvtbq_f32): Likewise.
! 	(vcvttq_f32): Likewise.
! 	(vcvtq): Likewise.
! 	* config/arm/arm_mve_builtins.def (VAR2): Define.
! 	(VAR1): Define.
! 	* config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
! 	(mve_vrndq_f<mode>): Likewise.
! 	(mve_vrndpq_f<mode>): Likewise.
! 	(mve_vrndnq_f<mode>): Likewise.
! 	(mve_vrndmq_f<mode>): Likewise.
! 	(mve_vrndaq_f<mode>): Likewise.
! 	(mve_vrev64q_f<mode>): Likewise.
! 	(mve_vnegq_f<mode>): Likewise.
! 	(mve_vdupq_n_f<mode>): Likewise.
! 	(mve_vabsq_f<mode>): Likewise.
! 	(mve_vrev32q_fv8hf): Likewise.
! 	(mve_vcvttq_f32_f16v4sf): Likewise.
! 	(mve_vcvtbq_f32_f16v4sf): Likewise.
! 	(mve_vcvtq_to_f_<supf><mode>): Likewise.
  
! 2020-03-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm-builtins.c (CF): Define mve_builtin_data.
! 	(VAR1): Define.
! 	(ARM_BUILTIN_MVE_PATTERN_START): Define.
! 	(arm_init_mve_builtins): Define function.
! 	(arm_init_builtins): Add TARGET_HAVE_MVE check.
! 	(arm_expand_builtin_1): Check the range of fcode.
! 	(arm_expand_mve_builtin): Define function to expand MVE builtins.
! 	(arm_expand_builtin): Check the range of fcode.
! 	* config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
! 	types.
! 	(__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
! 	(vst4q_s8): Define macro.
! 	(vst4q_s16): Likewise.
! 	(vst4q_s32): Likewise.
! 	(vst4q_u8): Likewise.
! 	(vst4q_u16): Likewise.
! 	(vst4q_u32): Likewise.
! 	(vst4q_f16): Likewise.
! 	(vst4q_f32): Likewise.
! 	(__arm_vst4q_s8): Define inline builtin.
! 	(__arm_vst4q_s16): Likewise.
! 	(__arm_vst4q_s32): Likewise.
! 	(__arm_vst4q_u8): Likewise.
! 	(__arm_vst4q_u16): Likewise.
! 	(__arm_vst4q_u32): Likewise.
! 	(__arm_vst4q_f16): Likewise.
! 	(__arm_vst4q_f32): Likewise.
! 	(__ARM_mve_typeid): Define macro with MVE types.
! 	(__ARM_mve_coerce): Define macro with _Generic feature.
! 	(vst4q): Define polymorphic variant for different vst4q builtins.
! 	* config/arm/arm_mve_builtins.def: New file.
! 	* config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
! 	modes in MVE.
! 	* config/arm/mve.md (MVE_VLD_ST): Define iterator.
! 	(unspec): Define unspec.
! 	(mve_vst4q<mode>): Define RTL pattern.
! 	* config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
! 	modes in MVE.
! 	(neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
! 	in MVE.
! 	(define_split): Allow OI mode split for MVE after reload.
! 	(define_split): Allow XI mode split for MVE after reload.
! 	* config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
! 	(arm-builtins.o): Likewise.
  
! 2020-03-17  Christophe Lyon  <christophe.lyon@linaro.org>
  
! 	* c-typeck.c (process_init_element): Handle constructor_type with
! 	type size represented by POLY_INT_CST.
  
! 2020-03-17  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/94187
! 	* tree-ssa-strlen.c (count_nonzero_bytes): Punt if
! 	nchars - offset < nbytes.
  
! 	PR middle-end/94189
! 	* builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
! 	emit a warning if it was enabled and don't depend on TREE_NO_WARNING
! 	for code-generation.
  
! 2020-03-16  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR target/94185
! 	* lra-spills.c (remove_pseudos): Do not reuse insn alternative
! 	after changing memory subreg.
  
! 2020-03-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
! 	emulator calls for dobule precision arithmetic operations for MVE.
  
! 2020-03-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
! 	feature bit is on and -mfpu=auto is passed as compiler option, do not
! 	generate error on not finding any matching fpu. Because in this case
! 	fpu is not required.
! 	* config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
! 	enabled for MVE and also for all VFP extensions.
! 	(VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
! 	is enabled.
! 	(MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
! 	(MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
! 	along with feature bits mve_float.
! 	(mve): Modify add options in armv8.1-m.main arch for MVE.
! 	(mve.fp): Modify add options in armv8.1-m.main arch for MVE with
! 	floating point.
! 	* config/arm/arm.c (use_return_insn): Replace the
! 	check with TARGET_VFP_BASE.
! 	(thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
! 	TARGET_VFP_BASE.
! 	(arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
! 	with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
! 	well.
! 	(arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
! 	TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
  	as well.
! 	(arm_compute_frame_layout): Likewise.
! 	(arm_save_coproc_regs): Likewise.
! 	(arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
! 	in MVE as well.
! 	(arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
! 	with equivalent macro TARGET_VFP_BASE.
! 	(arm_expand_epilogue_apcs_frame): Likewise.
! 	(arm_expand_epilogue): Likewise.
! 	(arm_conditional_register_usage): Likewise.
! 	(arm_declare_function_name): Add check to skip printing .fpu directive
! 	in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
! 	"softvfp".
! 	* config/arm/arm.h (TARGET_VFP_BASE): Define.
! 	* config/arm/arm.md (arch): Add "mve" to arch.
! 	(eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
! 	(vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
! 	|| TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
! 	* config/arm/constraints.md (Uf): Define to allow modification to FPCCR
! 	in MVE.
! 	* config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
! 	to not allow for MVE.
! 	* config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
! 	enum.
! 	(VUNSPEC_GET_FPSCR): Define.
! 	* config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
! 	instructions which move to general-purpose Register from Floating-point
! 	Special register and vice-versa.
! 	(thumb2_movhi_fp16): Likewise.
! 	(thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
! 	with MCR and MRC instructions which set and get Floating-point Status
! 	and Control Register (FPSCR).
! 	(movdi_vfp): Modify pattern to enable Single-precision scalar float move
! 	in MVE.
! 	(thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
! 	float move patterns in MVE.
! 	(thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
! 	code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
! 	(thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
! 	code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
! 	(push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
! 	TARGET_VFP_BASE check.
! 	(set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
! 	using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
! 	register.
! 	(get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
! 	using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
! 	register.
  
  
! 2020-03-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
!             Mihail Ionescu  <mihail.ionescu@arm.com>
!             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
  
! 	* config.gcc (arm_mve.h): Include mve intrinsics header file.
! 	* config/arm/aout.h (p0): Add new register name for MVE predicated
! 	cases.
! 	* config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
! 	common to Neon and MVE.
! 	(ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
! 	(arm_init_simd_builtin_types): Disable poly types for MVE.
! 	(arm_init_neon_builtins): Move a check to arm_init_builtins function.
! 	(arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
! 	ARM_BUILTIN_NEON_LANE_CHECK.
! 	(mve_dereference_pointer): Add function.
! 	(arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
! 	enabled.
! 	(arm_expand_neon_builtin): Moved to arm_expand_builtin function.
! 	(arm_expand_builtin): Moved from arm_expand_neon_builtin function.
! 	* config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
! 	with floating point enabled.
! 	* config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
! 	simd_immediate_valid_for_move.
! 	(simd_immediate_valid_for_move): Renamed from
! 	neon_immediate_valid_for_move function.
! 	* config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
! 	error if vfpv2 feature bit is disabled and mve feature bit is also
! 	disabled for HARD_FLOAT_ABI.
! 	(use_return_insn): Check to not push VFP regs for MVE.
! 	(aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
! 	as Neon.
! 	(aapcs_vfp_allocate_return_reg): Likewise.
! 	(thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
! 	address operand for MVE.
! 	(arm_rtx_costs_internal): MVE check to determine cost of rtx.
! 	(neon_valid_immediate): Rename to simd_valid_immediate.
! 	(simd_valid_immediate): Rename from neon_valid_immediate.
! 	(simd_valid_immediate): MVE check on size of vector is 128 bits.
! 	(neon_immediate_valid_for_move): Rename to
! 	simd_immediate_valid_for_move.
! 	(simd_immediate_valid_for_move): Rename from
! 	neon_immediate_valid_for_move.
! 	(neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
! 	function.
! 	(neon_make_constant): Modify call to neon_valid_immediate function.
! 	(neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
! 	for MVE.
! 	(output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
! 	(arm_compute_frame_layout): Calculate space for saved VFP registers for
! 	MVE.
! 	(arm_save_coproc_regs): Save coproc registers for MVE.
! 	(arm_print_operand): Add case 'E' to print memory operands for MVE.
! 	(arm_print_operand_address): Check to print register number for MVE.
! 	(arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
! 	(arm_modes_tieable_p): Check to allow structure mode for MVE.
! 	(arm_regno_class): Add VPR_REGNUM check.
! 	(arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
! 	for APCS frame.
! 	(arm_expand_epilogue): MVE check for enabling pop instructions in
! 	epilogue.
! 	(arm_print_asm_arch_directives): Modify function to disable print of
! 	.arch_extension "mve" and "fp" for cases where MVE is enabled with
! 	"SOFT FLOAT ABI".
! 	(arm_vector_mode_supported_p): Check for modes available in MVE interger
! 	and MVE floating point.
! 	(arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
! 	pointer support.
! 	(arm_conditional_register_usage): Enable usage of conditional regsiter
! 	for MVE.
! 	(fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
! 	(arm_declare_function_name): Modify function to disable print of
! 	.arch_extension "mve" and "fp" for cases where MVE is enabled with
! 	"SOFT FLOAT ABI".
! 	* config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
! 	when target general registers are required.
! 	(TARGET_HAVE_MVE_FLOAT): Likewise.
! 	(FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
! 	for MVE.
! 	(CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
! 	which indicate this is not available for across function calls.
! 	(FIRST_PSEUDO_REGISTER): Modify.
! 	(VALID_MVE_MODE): Define valid MVE mode.
! 	(VALID_MVE_SI_MODE): Define valid MVE SI mode.
! 	(VALID_MVE_SF_MODE): Define valid MVE SF mode.
! 	(VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
! 	(VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
! 	for MVE.
! 	(IS_VPR_REGNUM): Macro to check for VPR_REG register.
! 	(REG_ALLOC_ORDER): Add VPR_REGNUM entry.
! 	(enum reg_class): Add VPR_REG entry.
! 	(REG_CLASS_NAMES): Add VPR_REG entry.
! 	* config/arm/arm.md (VPR_REGNUM): Define.
! 	(conds): Check is_mve_type attrbiute to differentiate "conditional" and
! 	"unconditional" instructions.
! 	(arm_movsf_soft_insn): Modify RTL to not allow for MVE.
! 	(movdf_soft_insn): Modify RTL to not allow for MVE.
! 	(vfp_pop_multiple_with_writeback): Enable for MVE.
! 	(include "mve.md"): Include mve.md file.
! 	* config/arm/arm_mve.h: Add MVE intrinsics head file.
! 	* config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
! 	for vector predicated operands.
! 	* config/arm/iterators.md (VNIM1): Define.
! 	(VNINOTM1): Define.
! 	(VHFBF_split): Define
! 	* config/arm/mve.md: New file.
! 	(mve_mov<mode>): Define RTL for move, store and load in MVE.
! 	(mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
! 	second operand.
! 	* config/arm/neon.md (neon_immediate_valid_for_move): Rename with
! 	simd_immediate_valid_for_move.
! 	(neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
! 	is common to MVE and  NEON to vec-common.md file.
! 	(vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
! 	* config/arm/predicates.md (vpr_register_operand): Define.
! 	* config/arm/t-arm: Add mve.md file.
! 	* config/arm/types.md (mve_move): Add MVE instructions mve_move to
! 	attribute "type".
! 	(mve_store): Add MVE instructions mve_store to attribute "type".
! 	(mve_load): Add MVE instructions mve_load to attribute "type".
! 	(is_mve_type): Define attribute.
! 	* config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
! 	standard move patterns in MVE along with NEON and IWMMXT with mode
! 	iterator VNIM1.
! 	(mov<mode>): Modify RTL expand to support standard move patterns in NEON
! 	and IWMMXT with mode iterator V8HF.
! 	(movv8hf): Define RTL expand to support standard "movv8hf" pattern in
! 	NEON and MVE.
! 	* config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
! 	simd_immediate_valid_for_move.
  
  
! 2020-03-16  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/89229
! 	* config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
! 	for TYPE_SSEMOV.  Remove ext_sse_reg_operand and TARGET_AVX512VL
! 	check.
! 	* config/i386/predicates.md (ext_sse_reg_operand): Removed.
  
! 2020-03-16  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR debug/94167
! 	* tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
! 	DEBUG_STMTs.
  
! 	PR tree-optimization/94166
! 	* tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
! 	as secondary comparison key.
  
! 2020-03-16  Bin Cheng  <bin.cheng@linux.alibaba.com>
  
! 	PR tree-optimization/94125
! 	* tree-loop-distribution.c
! 	(loop_distribution::break_alias_scc_partitions): Update post order
! 	number for merged scc.
  
! 2020-03-15  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/89229
! 	* config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
! 	MODE_SF.
! 	* config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
! 	for TYPE_SSEMOV.  Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
! 	and ext_sse_reg_operand check.
  
! 2020-03-15  Lewis Hyatt  <lhyatt@gmail.com>
  
! 	* common.opt: Avoid redundancy in the help text.
! 	* config/arc/arc.opt: Likewise.
! 	* config/cr16/cr16.opt: Likewise.
  
! 2020-03-14  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/93566
! 	* tree-nested.c (convert_nonlocal_omp_clauses,
! 	convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
! 	with C/C++ array sections.
  
! 2020-03-14  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/89229
! 	* config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
! 	for TYPE_SSEMOV.  Remove ext_sse_reg_operand and TARGET_AVX512VL
! 	check.
  
! 2020-03-14  Jakub Jelinek  <jakub@redhat.com>
  
! 	* gimple-fold.c (gimple_fold_builtin_strncpy): Change
! 	"a an" to "an" in a comment.
! 	* hsa-common.h (is_a_helper): Likewise.
! 	* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
! 	* config/arc/arc.c (arc600_corereg_hazard): Likewise.
! 	* config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
  
! 2020-03-13  Aaron Sawdey  <acsawdey@linux.ibm.com>
  
! 	PR target/92379
! 	* config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
! 	64-bit value by 64 bits (UB).
  
! 2020-03-13  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR rtl-optimization/92303
! 	* lra-spills.c (remove_pseudos): Try to simplify memory subreg.
  
! 2020-03-13  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	PR rtl-optimization/94148
! 	PR rtl-optimization/94042
! 	* df-core.c (BB_LAST_CHANGE_AGE): Delete.
! 	(df_worklist_propagate_forward): New parameter last_change_age, use
! 	that instead of bb->aux.
! 	(df_worklist_propagate_backward): Ditto.
! 	(df_worklist_dataflow_doublequeue): Use a local array last_change_age.
  
! 2020-03-13  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/94163
! 	* tree-ssa-pre.c (create_expression_by_pieces): Check
! 	whether alignment would be zero.
  
! 2020-03-13  Martin Liska  <mliska@suse.cz>
  
! 	PR lto/94157
! 	* lto-wrapper.c (run_gcc): Use concat for appending
! 	to collect_gcc_options.
  
! 2020-03-13  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94121
! 	* config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
! 	instead of GEN_INT.
  
! 2020-03-13  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/89229
! 	* config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
! 	* config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
! 	for TYPE_SSEMOV.  Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
! 	TARGET_AVX512VL and ext_sse_reg_operand check.
  
! 2020-03-13  Bu Le  <bule1@huawei.com>
  
! 	PR target/94154
! 	* config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
! 	(-param=aarch64-double-recp-precision=): New options.
! 	* doc/invoke.texi: Document them.
! 	* config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
! 	instead of hard-coding the choice of 1 for float and 2 for double.
  
! 2020-03-13  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR rtl-optimization/94119
! 	* resource.h (clear_hashed_info_until_next_barrier): Declare.
! 	* resource.c (clear_hashed_info_until_next_barrier): New function.
! 	* reorg.c (add_to_delay_list): Fix formatting.
! 	(relax_delay_slots): Call clear_hashed_info_until_next_barrier on
! 	the next instruction after removing a BARRIER.
  
! 2020-03-13  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR middle-end/92071
! 	* expmed.c (store_integral_bit_field): For fields larger than a word,
! 	call extract_bit_field on the value if the mode is BLKmode.  Remove
! 	specific path for big-endian targets and tidy things up a little bit.
  
! 2020-03-12  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/90275
! 	* cse.c (cse_insn): Delete no-op register moves too.
  
! 2020-03-12  Darius Galis  <darius.galis@cyberthorstudios.com>
  
! 	* config/rx/rx.md (CTRLREG_CPEN): Remove.
! 	* config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
  
! 2020-03-12  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/94103
! 	* tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
! 	punning when the mode precision is not sufficient.
  
! 2020-03-12  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/89229
! 	* config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
! 	MODE_V1DF and MODE_V2SF.
! 	* config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
! 	ix86_output_ssemov for TYPE_SSEMOV.  Remove ext_sse_reg_operand
! 	check.
  
! 2020-03-12  Jakub Jelinek  <jakub@redhat.com>
  
! 	* doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
! 	ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
! 	and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
! 	* doc/tm.texi: Regenerated.
  
! 	PR tree-optimization/94130
! 	* tree-ssa-dse.c: Include gimplify.h.
! 	(increment_start_addr): If stmt has lhs, drop the lhs from call and
! 	set it after the call to the original value of the first argument.
! 	Formatting fixes.
! 	(decrement_count): Formatting fix.
  
! 2020-03-11  Delia Burduv  <delia.burduv@arm.com>
  
! 	* config/arm/arm-builtins.c
! 	(arm_init_simd_builtin_scalar_types): New.
! 	* config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
! 	(vld2q_bf16): Used new builtin type.
! 	(vld3_bf16): Used new builtin type.
! 	(vld3q_bf16): Used new builtin type.
! 	(vld4_bf16): Used new builtin type.
! 	(vld4q_bf16): Used new builtin type.
! 	(vld2_dup_bf16): Used new builtin type.
! 	(vld2q_dup_bf16): Used new builtin type.
! 	(vld3_dup_bf16): Used new builtin type.
! 	(vld3q_dup_bf16): Used new builtin type.
! 	(vld4_dup_bf16): Used new builtin type.
! 	(vld4q_dup_bf16): Used new builtin type.
  
! 2020-03-11  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94134
! 	* config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
! 	at the start to switch to data section.  Don't print extra newline if
! 	.globl directive has not been emitted.
  
! 2020-03-11  Richard Biener  <rguenther@suse.de>
  
! 	* match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
! 	New pattern.
  
! 2020-03-11  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR middle-end/93961
! 	* tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
! 	whose type is a qualified union.
  
! 2020-03-11  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94121
! 	* config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
! 	instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
  
! 	PR bootstrap/93962
! 	* value-prof.c (dump_histogram_value): Use abs_hwi instead of
! 	std::abs.
! 	(get_nth_most_common_value): Use abs_hwi instead of abs.
  
! 	PR middle-end/94111
! 	* dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
! 	is rvc_normal, otherwise use real_to_decimal to print the number to
! 	string.
  
! 	PR tree-optimization/94114
! 	* tree-loop-distribution.c (generate_memset_builtin): Call
! 	rewrite_to_non_trapping_overflow even on mem.
! 	(generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
! 	on dest and src.
  
! 2020-03-10  Jeff Law  <law@redhat.com>
  
! 	* config/bfin/bfin.md (movsi_insv): Add length attribute.
  
! 2020-03-10  Jiufu Guo  <guojiufu@linux.ibm.com>
  
! 	PR target/93709
! 	* gcc/config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
! 	NAN and SIGNED_ZEROR for smax/smin.
  
! 2020-03-10  Will Schmidt  <will_schmidt@vnet.ibm.com>
  
! 	PR target/90763
! 	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
! 	clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
  
! 2020-03-10  Roman Zhuykov  <zhroma@ispras.ru>
  
! 	* loop-iv.c (find_simple_exit): Make it static.
! 	* cfgloop.h: Remove the corresponding prototype.
  
! 2020-03-10  Roman Zhuykov  <zhroma@ispras.ru>
  
! 	* ddg.c (create_ddg): Fix intendation.
! 	(set_recurrence_length): Likewise.
! 	(create_ddg_all_sccs): Likewise.
  
! 2020-03-10  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94088
! 	* config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
! 	CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
! 	is 32.
  
! 2020-03-09  Jason Merrill  <jason@redhat.com>
  
! 	* gdbinit.in (pgs): Fix typo in documentation.
  
! 2020-03-09  Vladimir Makarov  <vmakarov@redhat.com>
  
  	Revert:
  
! 	2020-02-28  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR rtl-optimization/93564
! 	* ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
! 	do not honor reg alloc order.
  
! 2020-03-09  Andrew Pinski  <apinski@marvell.com>
  
! 	PR inline-asm/94095
! 	* doc/extend.texi (x86 Operand Modifiers): Fix column
! 	for 'A' modifier.
  
! 2020-03-09  Martin Liska  <mliska@suse.cz>
  
! 	PR target/93800
! 	* config/rs6000/rs6000.c (rs6000_option_override_internal):
! 	Remove set of str_align_loops and str_align_jumps as these
! 	should be set in previous 2 conditions in the function.
  
! 2020-03-09  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/94045
! 	* params.opt (-param=max-find-base-term-values=): New option.
! 	* alias.c (find_base_term): Add cut-off for number of visited VALUEs
! 	in a single toplevel find_base_term call.
  
! 2020-03-06  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	PR target/91598
! 	* config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
! 	* config/aarch64/aarch64-simd.md
! 	(aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
! 	(aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
! 	* config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
! 	* config/aarch64/arm_neon.h:
! 	(vmlal_lane_s16): Expand using intrinsics rather than inline asm.
! 	(vmlal_lane_u16): Likewise.
! 	(vmlal_lane_s32): Likewise.
! 	(vmlal_lane_u32): Likewise.
! 	(vmlal_laneq_s16): Likewise.
! 	(vmlal_laneq_u16): Likewise.
! 	(vmlal_laneq_s32): Likewise.
! 	(vmlal_laneq_u32): Likewise.
! 	(vmull_lane_s16): Likewise.
! 	(vmull_lane_u16): Likewise.
! 	(vmull_lane_s32): Likewise.
! 	(vmull_lane_u32): Likewise.
! 	(vmull_laneq_s16): Likewise.
! 	(vmull_laneq_u16): Likewise.
! 	(vmull_laneq_s32): Likewise.
! 	(vmull_laneq_u32): Likewise.
! 	* config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
! 	(Qlane): Likewise.
  
! 2020-03-06  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	* aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
! 	(aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
! 	(aarch64_mls_elt<mode>): Likewise.
! 	(aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
! 	(aarch64_fma4_elt<mode>): Likewise.
! 	(aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
! 	(aarch64_fma4_elt_to_64v2df): Likewise.
! 	(aarch64_fnma4_elt<mode>): Likewise.
! 	(aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
! 	(aarch64_fnma4_elt_to_64v2df): Likewise.
  
! 2020-03-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
! 	* config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
! 	Specify movprfx attribute.
! 	(@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
  
! 2020-03-06  David Edelsohn  <dje.gcc@gmail.com>
  
! 	PR target/94065
! 	* config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
! 	cmodel=large.
! 	(TARGET_NO_FP_IN_TOC): Same.
! 	* config/rs6000/aix71.h: Same.
! 	* config/rs6000/aix72.h: Same.
  
! 2020-03-06  Andrew Pinski  <apinski@marvell.com>
! 	    Jeff Law  <law@redhat.com>
  
! 	PR rtl-optimization/93996
! 	* haifa-sched.c (remove_notes): Be more careful when adding
! 	REG_SAVE_NOTE.
  
! 2020-03-06  Delia Burduv  <delia.burduv@arm.com>
  
! 	* config/arm/arm_neon.h (vld2_bf16): New.
! 	(vld2q_bf16): New.
! 	(vld3_bf16): New.
! 	(vld3q_bf16): New.
! 	(vld4_bf16): New.
! 	(vld4q_bf16): New.
! 	(vld2_dup_bf16): New.
! 	(vld2q_dup_bf16): New.
! 	(vld3_dup_bf16): New.
! 	(vld3q_dup_bf16): New.
! 	(vld4_dup_bf16): New.
! 	(vld4q_dup_bf16): New.
! 	* config/arm/arm_neon_builtins.def
! 	(vld2): Changed to VAR13 and added v4bf, v8bf
! 	(vld2_dup): Changed to VAR8 and added v4bf, v8bf
! 	(vld3): Changed to VAR13 and added v4bf, v8bf
! 	(vld3_dup): Changed to VAR8 and added v4bf, v8bf
! 	(vld4): Changed to VAR13 and added v4bf, v8bf
! 	(vld4_dup): Changed to VAR8 and added v4bf, v8bf
! 	* config/arm/iterators.md (VDXBF2): New iterator.
! 	*config/arm/neon.md (neon_vld2): Use new iterators.
! 	(neon_vld2_dup<mode): Use new iterators.
! 	(neon_vld3<mode>): Likewise.
! 	(neon_vld3qa<mode>): Likewise.
! 	(neon_vld3qb<mode>): Likewise.
! 	(neon_vld3_dup<mode>): Likewise.
! 	(neon_vld4<mode>): Likewise.
! 	(neon_vld4qa<mode>): Likewise.
! 	(neon_vld4qb<mode>): Likewise.
! 	(neon_vld4_dup<mode>): Likewise.
! 	(neon_vld2_dupv8bf): New.
! 	(neon_vld3_dupv8bf): Likewise.
! 	(neon_vld4_dupv8bf): Likewise.
  
! 2020-03-06  Delia Burduv  <delia.burduv@arm.com>
  
! 	* config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
! 	(bfloat16x8x2_t): New typedef.
! 	(bfloat16x4x3_t): New typedef.
! 	(bfloat16x8x3_t): New typedef.
! 	(bfloat16x4x4_t): New typedef.
! 	(bfloat16x8x4_t): New typedef.
! 	(vst2_bf16): New.
! 	(vst2q_bf16): New.
! 	(vst3_bf16): New.
! 	(vst3q_bf16): New.
! 	(vst4_bf16): New.
! 	(vst4q_bf16): New.
! 	* config/arm/arm-builtins.c (v2bf_UP): Define.
! 	(VAR13): New.
! 	(arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
! 	* config/arm/arm-modes.def (V2BF): New mode.
! 	* config/arm/arm-simd-builtin-types.def
! 	(Bfloat16x2_t): New entry.
! 	* config/arm/arm_neon_builtins.def
! 	(vst2): Changed to VAR13 and added v4bf, v8bf
! 	(vst3): Changed to VAR13 and added v4bf, v8bf
! 	(vst4): Changed to VAR13 and added v4bf, v8bf
! 	* config/arm/iterators.md (VDXBF): New iterator.
! 	(VQ2BF): New iterator.
! 	*config/arm/neon.md (neon_vst2<mode>): Used new iterators.
! 	(neon_vst2<mode>): Used new iterators.
! 	(neon_vst3<mode>): Used new iterators.
! 	(neon_vst3<mode>): Used new iterators.
! 	(neon_vst3qa<mode>): Used new iterators.
! 	(neon_vst3qb<mode>): Used new iterators.
! 	(neon_vst4<mode>): Used new iterators.
! 	(neon_vst4<mode>): Used new iterators.
! 	(neon_vst4qa<mode>): Used new iterators.
! 	(neon_vst4qb<mode>): Used new iterators.
  
! 2020-03-06  Delia Burduv  <delia.burduv@arm.com>
  
! 	* config/aarch64/aarch64-simd-builtins.def
! 	(bfcvtn): New built-in function.
! 	(bfcvtn_q): New built-in function.
! 	(bfcvtn2): New built-in function.
! 	(bfcvt): New built-in function.
! 	* config/aarch64/aarch64-simd.md
! 	(aarch64_bfcvtn<q><mode>): New pattern.
! 	(aarch64_bfcvtn2v8bf): New pattern.
! 	(aarch64_bfcvtbf): New pattern.
! 	* config/aarch64/arm_bf16.h (float32_t): New typedef.
! 	(vcvth_bf16_f32): New intrinsic.
! 	* config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
! 	(vcvtq_low_bf16_f32): New intrinsic.
! 	(vcvtq_high_bf16_f32): New intrinsic.
! 	* config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
! 	(UNSPEC_BFCVTN): New UNSPEC.
! 	(UNSPEC_BFCVTN2): New UNSPEC.
! 	(UNSPEC_BFCVT): New UNSPEC.
! 	* config/arm/types.md (bf_cvt): New type.
  
! 2020-03-06  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390.md ("tabort"): Get rid of two consecutive
! 	blanks in format string.
  
! 2020-03-05  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/89229
! 	PR target/89346
! 	* config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
! 	* config/i386/i386.c (ix86_get_ssemov): New function.
! 	(ix86_output_ssemov): Likewise.
! 	* config/i386/sse.md (VMOVE:mov<mode>_internal): Call
! 	ix86_output_ssemov for TYPE_SSEMOV.  Remove TARGET_AVX512VL
! 	check.
! 	(*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
! 	(*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
! 	Remove ext_sse_reg_operand and TARGET_AVX512VL check.
! 	(*movti_internal): Likewise.
! 	(*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
  
! 2020-03-05  Jeff Law  <law@redhat.com>
  
! 	PR tree-optimization/91890
! 	* gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
! 	Use gimple_or_expr_nonartificial_location.
! 	(check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
! 	Use gimple_or_expr_nonartificial_location.
! 	* gimple.c (gimple_or_expr_nonartificial_location): New function.
! 	* gimple.h (gimple_or_expr_nonartificial_location): Declare it.
! 	* tree-ssa-strlen.c (maybe_warn_overflow): Use
! 	gimple_or_expr_nonartificial_location.
! 	(maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
! 	(maybe_warn_pointless_strcmp): Likewise.
  
! 2020-03-05  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/94046
! 	* config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
! 	SRC and MASK arguments to __m128 from __m128d.
! 	(_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
! 	from __m256d.
! 	(_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
! 	from __m128d.
! 	* config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
! 	argument to __m128i from __m128d.
! 	(_mm256_permute2_pd): Fix first cast of C argument to __m256i from
! 	__m256d.
! 	(_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
! 	(_mm256_permute2_ps): Fix first cast of C argument to __m256i from
! 	__m256.
  
! 2020-03-05  Delia Burduv  <delia.burduv@arm.com>
  
! 	* config/arm/arm_neon.h (vbfmmlaq_f32): New.
! 	(vbfmlalbq_f32): New.
! 	(vbfmlaltq_f32): New.
! 	(vbfmlalbq_lane_f32): New.
! 	(vbfmlaltq_lane_f32): New.
! 	(vbfmlalbq_laneq_f32): New.
! 	(vbfmlaltq_laneq_f32): New.
! 	* config/arm/arm_neon_builtins.def (vmmla): New.
! 	(vfmab): New.
! 	(vfmat): New.
! 	(vfmab_lane): New.
! 	(vfmat_lane): New.
! 	(vfmab_laneq): New.
! 	(vfmat_laneq): New.
! 	* config/arm/iterators.md (BF_MA): New int iterator.
! 	(bt): New int attribute.
! 	(VQXBF): Copy of VQX with V8BF.
! 	* config/arm/neon.md (neon_vmmlav8bf): New insn.
! 	(neon_vfma<bt>v8bf): New insn.
! 	(neon_vfma<bt>_lanev8bf): New insn.
! 	(neon_vfma<bt>_laneqv8bf): New expand.
! 	(neon_vget_high<mode>): Changed iterator to VQXBF.
! 	* config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
! 	(UNSPEC_BFMAB): New UNSPEC.
! 	(UNSPEC_BFMAT): New UNSPEC.
  
! 2020-03-05  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/93399
! 	* tree-pretty-print.h (pretty_print_string): Declare.
! 	* tree-pretty-print.c (pretty_print_string): Remove forward
! 	declaration, no longer static.  Change nbytes parameter type
! 	from unsigned to size_t.
! 	* print-rtl.c (print_value) <case CONST_STRING>: Use
! 	pretty_print_string and for shrink way too long strings.
  
! 2020-03-05  Richard Biener  <rguenther@suse.de>
  	    Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/93582
! 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
! 	last operand as signed when looking for memset offset.  Formatting
! 	fix.
  
! 2020-03-04  Andrew Pinski  <apinski@marvell.com>
  
! 	PR bootstrap/93962
! 	* value-prof.c (dump_histogram_value): Use std::abs.
  
! 2020-03-04  Martin Sebor  <msebor@redhat.com>
  
! 	PR tree-optimization/93986
! 	* tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
! 	operands to the same precision widest_int to avoid ICEs.
  
! 2020-03-04  Bill Schmidt  <wschmidt@linux.ibm.com>
  
! 	PR target/87560
! 	* rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
! 	* rs6000.c (rs6000_disable_incompatible_switches): Add table entry
! 	for OPTION_MASK_ALTIVEC.
  
! 2020-03-04  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config.gcc: Include the glibc-stdint.h header for zTPF.
  
! 2020-03-04  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390.c (s390_secondary_memory_needed): Disallow
! 	direct FPR-GPR copies.
! 	(s390_register_info_gprtofpr): Disallow GPR content to be saved in
! 	FPRs.
  
! 2020-03-04  Andreas Krebbel  <krebbel@linux.ibm.com>
  
! 	* config/s390/s390.c (s390_emit_prologue): Specify the 2 new
! 	operands to the prologue_tpf expander.
! 	(s390_emit_epilogue): Likewise.
! 	(s390_option_override_internal): Do error checking and setup for
! 	the new options.
! 	* config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
! 	(TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
! 	(TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
! 	(TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
! 	* config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
! 	operands for the check flag and the branch target.
! 	* config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
! 	("mtpf-trace-hook-prologue-target")
! 	("mtpf-trace-hook-epilogue-check")
! 	("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
! 	options.
! 	* doc/invoke.texi: Document -mtpf-trace-skip option. The other
! 	options are for debugging purposes and will not be documented
! 	here.
  
! 2020-03-04  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR debug/93888
! 	* tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
  
! 	* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
! 	argument.  Change pd argument so that it can be modified.  Turn
! 	constant non-CONSTRUCTOR store into non-constant if it is too large.
! 	Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
! 	overflows.
! 	(vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
! 	callers.
  
! 2020-02-04  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93964
! 	* graphite-isl-ast-to-gimple.c
! 	(gcc_expression_from_isl_ast_expr_id): Add intermediate
! 	conversion for pointer to integer converts.
! 	* graphite-scop-detection.c (assign_parameter_index_in_region):
! 	Relax assert.
  
! 2020-03-04  Martin Liska  <mliska@suse.cz>
  
! 	PR c/93886
! 	PR c/93887
! 	* doc/invoke.texi: Clarify --help=language and --help=common
! 	interaction.
  
! 2020-03-04  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/94001
! 	* tree-tailcall.c (process_assignment): Before comparing op1 to
! 	*ass_var, verify *ass_var is non-NULL.
  
! 2020-03-04  Kito Cheng  <kito.cheng@sifive.com>
  
! 	PR target/93995
! 	* config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
! 	the result of IOR.
  
! 2020-03-03  Dennis Zhang  <dennis.zhang@arm.com>
  
! 	* config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
! 	* config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
! 	(vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
! 	(vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
! 	* config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
! 	(vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
! 	* config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
! 	(V_bf_low, V_bf_cvt_m): New mode attributes.
! 	* config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
! 	(neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
! 	(neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
! 	(neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
! 	* config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
  
! 2020-03-03  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/93582
! 	* tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
! 	* tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
! 	members, initialize them in the constructor and if mask is non-NULL,
! 	artificially push_partial_def {} for the portions of the mask that
! 	contain zeros.
! 	(vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
! 	val and return (void *)-1.  Formatting fix.
! 	(vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
! 	Formatting fix.
! 	(vn_reference_lookup): Add mask argument.  If non-NULL, don't call
! 	fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
! 	data.mask_result.
! 	(visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
! 	mask.
! 	(visit_stmt): Formatting fix.
  
! 2020-03-03  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93946
! 	* alias.h (refs_same_for_tbaa_p): Declare.
! 	* alias.c (refs_same_for_tbaa_p): New function.
! 	* tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
! 	zero.
! 	* tree-ssa-scopedtables.h
! 	(avail_exprs_stack::lookup_avail_expr): Add output argument
! 	giving access to the hashtable entry.
! 	* tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
! 	Likewise.
! 	* tree-ssa-dom.c: Include alias.h.
! 	(dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
! 	removing redundant store.
! 	* tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
! 	(ao_ref_init_from_vn_reference): Adjust prototype.
! 	(vn_reference_lookup_pieces): Likewise.
! 	(vn_reference_insert_pieces): Likewise.
! 	* tree-ssa-sccvn.c: Track base alias set in addition to alias
! 	set everywhere.
! 	(eliminate_dom_walker::eliminate_stmt): Also check base alias
! 	set when removing redundant stores.
! 	(visit_reference_op_store): Likewise.
! 	* dse.c (record_store): Adjust valdity check for redundant
! 	store removal.
  
! 2020-03-03  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/26877
! 	* config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
  
! 	PR rtl-optimization/94002
! 	* explow.c (plus_constant): Punt if cst has VOIDmode and
! 	get_pool_mode is different from mode.
  
! 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.c (leigitimate_small_data_address_p): Check if an
! 	address has an offset which fits the scalling constraint for a
! 	load/store operation.
! 	(legitimate_scaled_address_p): Update use
! 	leigitimate_small_data_address_p.
! 	(arc_print_operand): Likewise.
! 	(arc_legitimate_address_p): Likewise.
! 	(legitimate_small_data_address_p): Likewise.
  
! 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
! 	(fnmasf4_fpu): Likewise.
  
! 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.md (adddi3): Early expand the 64bit operation into
! 	32bit ops.
! 	(subdi3): Likewise.
! 	(adddi3_i): Remove pattern.
! 	(subdi3_i): Likewise.
  
! 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.md (eh_return): Add length info.
  
! 2020-03-02  David Malcolm  <dmalcolm@redhat.com>
  
! 	* doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
  
! 2020-03-02  David Malcolm  <dmalcolm@redhat.com>
  
! 	* doc/invoke.texi (Static Analyzer Options): Add
! 	-Wanalyzer-stale-setjmp-buffer to the list of options enabled
! 	by -fanalyzer.
  
! 2020-03-02  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/93997
! 	* config/i386/i386.md (movstrict<mode>): Allow only
! 	registers with VALID_INT_MODE_P modes.
  
! 2020-03-02  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (dpp_move<mode>): New.
! 	(reduc_insn): Use 'U' and 'B' operand codes.
! 	(reduc_<reduc_op>_scal_<mode>): Allow all types.
! 	(reduc_<reduc_op>_scal_v64di): Delete.
! 	(*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
! 	(*plus_carry_dpp_shr_v64si): Change to ...
! 	(*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
! 	(mov_from_lane63_v64di): Change to ...
! 	(mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
! 	* config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
! 	Support UNSPEC_MOV_DPP_SHR output formats.
! 	(gcn_expand_reduc_scalar): Add "use_moves" reductions.
! 	Add "use_extends" reductions.
! 	(print_operand_address): Add 'I' and 'U' codes.
! 	* config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
  
! 2020-03-02  Martin Liska  <mliska@suse.cz>
  
! 	* lto-wrapper.c: Fix typo in comment about
! 	C++ standard version.
  
! 2020-03-01  Martin Sebor  <msebor@redhat.com>
  
! 	PR c++/92721
! 	* calls.c (init_attr_rdwr_indices): Correctly handle attribute.
  
! 2020-03-01  Martin Sebor  <msebor@redhat.com>
  
! 	PR middle-end/93829
! 	* tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
! 	  of a pointer in the outermost ADDR_EXPRs.
  
! 2020-02-28  Jeff Law  <law@redhat.com>
  
! 	* config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
! 	* config/v850/v850.c (v850_asm_trampoline_template): Update
! 	accordingly.
  
! 2020-02-28  Michael Meissner  <meissner@linux.ibm.com>
  
! 	PR target/93937
! 	* config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
! 	Delete insn.
  
! 2020-02-28  Martin Liska  <mliska@suse.cz>
  
! 	PR other/93965
! 	* configure.ac: Improve detection of ld_date by requiring
! 	either two dashes or none.
! 	* configure: Regenerate.
  
! 2020-02-28  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR rtl-optimization/93564
! 	* ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
! 	do not honor reg alloc order.
  
! 2020-02-27  Joel Hutton  <Joel.Hutton@arm.com>
  
! 	PR target/87612
! 	* config/aarch64/aarch64.c (aarch64_override_options): Fix
! 	misleading warning string.
  
! 2020-02-27  Martin Sebor  <msebor@redhat.com>
  
! 	* doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
  
! 2020-02-27  Michael Meissner  <meissner@linux.ibm.com>
  
! 	PR target/93932
! 	* config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
! 	Split the insn into two parts.  This insn only does variable
! 	extract from a register.
! 	(vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
! 	variable extract from memory.
! 	(vsx_extract_v4sf_var): Split the insn into two parts.  This insn
! 	only does variable extract from a register.
! 	(vsx_extract_v4sf_var_load): New insn, do variable extract from
! 	memory.
! 	(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
! 	into two parts.  This insn only does variable extract from a
! 	register.
! 	(vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
! 	do variable extract from memory.
  
! 2020-02-27  Martin Jambor  <mjambor@suse.cz>
! 	    Feng Xue  <fxue@os.amperecomputing.com>
  
! 	PR ipa/93707
! 	* ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
! 	new function calls_same_node_or_its_all_contexts_clone_p.
! 	(cgraph_edge_brings_value_p): Use it.
! 	(cgraph_edge_brings_value_p): Likewise.
! 	(self_recursive_pass_through_p): Return false if caller is a clone.
! 	(self_recursive_agg_pass_through_p): Likewise.
  
! 2020-02-27  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR middle-end/92152
! 	* alias.c (ends_tbaa_access_path_p): Break out from ...
! 	(component_uses_parent_alias_set_from): ... here.
! 	* alias.h (ends_tbaa_access_path_p): Declare.
! 	* tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
! 	handle trailing arrays past end of tbaa access path.
! 	(aliasing_component_refs_p): ... here; likewise.
! 	(nonoverlapping_refs_since_match_p): Track TBAA segment of the access
! 	path; disambiguate also past end of it.
! 	(nonoverlapping_component_refs_p): Use only TBAA segment of the access
! 	path.
  
! 2020-02-27  Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
! 	beginning of the file.
! 	(vcreate_bf16, vcombine_bf16): New.
! 	(vdup_n_bf16, vdupq_n_bf16): New.
! 	(vdup_lane_bf16, vdup_laneq_bf16): New.
! 	(vdupq_lane_bf16, vdupq_laneq_bf16): New.
! 	(vduph_lane_bf16, vduph_laneq_bf16): New.
! 	(vset_lane_bf16, vsetq_lane_bf16): New.
! 	(vget_lane_bf16, vgetq_lane_bf16): New.
! 	(vget_high_bf16, vget_low_bf16): New.
! 	(vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
! 	(vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
! 	(vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
! 	(vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
! 	(vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
! 	(vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
! 	(vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
! 	(vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
! 	(vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
! 	(vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
! 	(vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
! 	(vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
! 	(vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
! 	(vreinterpretq_bf16_p128): New.
! 	(vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
! 	(vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
! 	(vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
! 	(vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
! 	(vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
! 	(vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
! 	(vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
! 	(vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
! 	(vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
! 	(vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
! 	(vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
! 	(vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
! 	(vreinterpretq_p128_bf16): New.
! 	* config/arm/arm_neon_builtins.def (VDX): Add V4BF.
! 	(V_elem): Likewise.
! 	(V_elem_l): Likewise.
! 	(VD_LANE): Likewise.
! 	(VQX) Add V8BF.
! 	(V_DOUBLE): Likewise.
! 	(VDQX): Add V4BF and V8BF.
! 	(V_two_elem, V_three_elem, V_four_elem): Likewise.
! 	(V_reg): Likewise.
! 	(V_HALF): Likewise.
! 	(V_double_vector_mode): Likewise.
! 	(V_cmp_result): Likewise.
! 	(V_uf_sclr): Likewise.
! 	(V_sz_elem): Likewise.
! 	(Is_d_reg): Likewise.
! 	(V_mode_nunits): Likewise.
! 	* config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
  
! 2020-02-27  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
! 	(<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
! 	(<expander><mode>3<exec>): Likewise.
! 	(<expander><mode>3): New.
! 	(v<expander><mode>3): New.
! 	(<expander><mode>3): New.
! 	(<expander><mode>3<exec>): Rename to ...
! 	(<expander>v64si3<exec>): ... this, and change modes to V64SI.
! 	* config/gcn/gcn.md (mnemonic): Use '%B' for not.
  
! 2020-02-27  Alexandre Oliva <oliva@adacore.com>
  
! 	* config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
! 	them alone on vx7.
  
! 2020-02-27  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93508
! 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
! 	non-_CHK variants.  Valueize their length arguments.
  
! 2020-02-27  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93953
! 	* tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
! 	to the hash-map entry.
  
! 2020-02-27  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
  
! 2020-02-27  Mark Williams  <mwilliams@fb.com>
  
! 	* dwarf2out.c (file_name_acquire): Call remap_debug_filename.
! 	* lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
! 	-ffile-prefix-map and -fmacro-prefix-map.
! 	* lto-streamer-out.c: Include file-prefix-map.h.
! 	(lto_output_location): Remap the file part of locations.
  
! 2020-02-27  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c/93949
! 	* gimplify.c (gimplify_init_constructor): Don't promote readonly
! 	DECL_REGISTER variables to TREE_STATIC.
  
! 	PR tree-optimization/93582
! 	PR tree-optimization/93945
! 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
! 	non-zero INTEGER_CST second argument and ref->offset or ref->size
! 	not a multiple of BITS_PER_UNIT.
  
! 2020-02-27  Jonathan Wakely  <jwakely@redhat.com>
  
! 	* doc/install.texi (Binaries): Update description of BullFreeware.
  
! 2020-02-26  Sandra Loosemore  <sandra@codesourcery.com>
  
! 	PR c++/90467
  
! 	* doc/invoke.texi (Option Summary): Re-alphabetize warnings in
! 	C++ Language Options, Warning Options, and Static Analyzer
! 	Options lists.  Document negative form of options enabled by
! 	default.  Move some things around to more accurately sort
! 	warnings by category.
! 	(C++ Dialect Options, Warning Options, Static Analyzer
! 	Options): Document negative form of options when enabled by
! 	default.  Move some things around to more accurately sort
! 	warnings by category.  Add some missing index entries.
! 	Light copy-editing.
  
! 2020-02-26  Carl Love  <cel@us.ibm.com>
  
! 	PR target/91276
! 	* doc/extend.texi (PowerPC AltiVec Built-in Functions available on
! 	ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
! 	for the vector unsigned short arguments.  It is also listed as the
! 	name of the built-in for arguments vector unsigned short,
! 	vector unsigned int and vector unsigned long long built-ins.  The
! 	name of the builtins for these arguments should be:
! 	__builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
! 	__builtin_crypto_vpmsumd respectively.
  
! 2020-02-26  Richard Biener  <rguenther@suse.de>
  
! 	* tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
! 	and load permutation.
  
! 2020-02-26  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR middle-end/93843
! 	* optabs-tree.c (supportable_convert_operation): Reject types with
! 	scalar modes.
  
! 2020-02-26  David Malcolm  <dmalcolm@redhat.com>
  
! 	* Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
  
! 2020-02-26  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/93820
! 	* gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
! 	argument to ALL_INTEGER_CST_P boolean.
! 	(imm_store_chain_info::try_coalesce_bswap): Adjust caller.
! 	(imm_store_chain_info::coalesce_immediate_stores): Likewise.  Handle
! 	adjacent INTEGER_CST store into merged_store->only_constants like
! 	overlapping one.
  
! 2020-02-25  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR other/93912
! 	* config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
! 	-> probability.
! 	* cfghooks.c (verify_flow_info): Likewise.
! 	* predict.c (combine_predictions_for_bb): Likewise.
! 	* bb-reorder.c (connect_better_edge_p): Likewise.  Fix comment typo,
! 	sucessor -> successor.
! 	(find_traces_1_round): Fix comment typo, destinarion -> destination.
! 	* omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
! 	successors.
! 	* tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
! 	message typo, sucessors -> successors.
  
! 2020-02-25  Martin Sebor  <msebor@redhat.com>
  
! 	* doc/extend.texi (attribute access): Correct an example.
  
! 2020-02-25  Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
! 	Add simd_bf.
! 	(aarch64_init_simd_builtin_scalar_types): Register simd_bf.
! 	(VAR15, VAR16): New.
! 	* config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
! 	(VD): Enable for V4BF.
! 	(VDC): Likewise.
! 	(VQ): Enable for V8BF.
! 	(VQ2): Likewise.
! 	(VQ_NO2E): Likewise.
! 	(VDBL, Vdbl): Add V4BF.
! 	(V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
! 	* config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
! 	(bfloat16x8x2_t): Likewise.
! 	(bfloat16x4x3_t): Likewise.
! 	(bfloat16x8x3_t): Likewise.
! 	(bfloat16x4x4_t): Likewise.
! 	(bfloat16x8x4_t): Likewise.
! 	(vcombine_bf16): New.
! 	(vld1_bf16, vld1_bf16_x2): New.
! 	(vld1_bf16_x3, vld1_bf16_x4): New.
! 	(vld1q_bf16, vld1q_bf16_x2): New.
! 	(vld1q_bf16_x3, vld1q_bf16_x4): New.
! 	(vld1_lane_bf16): New.
! 	(vld1q_lane_bf16): New.
! 	(vld1_dup_bf16): New.
! 	(vld1q_dup_bf16): New.
! 	(vld2_bf16): New.
! 	(vld2q_bf16): New.
! 	(vld2_dup_bf16): New.
! 	(vld2q_dup_bf16): New.
! 	(vld3_bf16): New.
! 	(vld3q_bf16): New.
! 	(vld3_dup_bf16): New.
! 	(vld3q_dup_bf16): New.
! 	(vld4_bf16): New.
! 	(vld4q_bf16): New.
! 	(vld4_dup_bf16): New.
! 	(vld4q_dup_bf16): New.
! 	(vst1_bf16, vst1_bf16_x2): New.
! 	(vst1_bf16_x3, vst1_bf16_x4): New.
! 	(vst1q_bf16, vst1q_bf16_x2): New.
! 	(vst1q_bf16_x3, vst1q_bf16_x4): New.
! 	(vst1_lane_bf16): New.
! 	(vst1q_lane_bf16): New.
! 	(vst2_bf16): New.
! 	(vst2q_bf16): New.
! 	(vst3_bf16): New.
! 	(vst3q_bf16): New.
! 	(vst4_bf16): New.
! 	(vst4q_bf16): New.
  
! 2020-02-25  Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
! 	(VALL_F16): Likewise.
! 	(VALLDI_F16): Likewise.
! 	(Vtype): Likewise.
! 	(Vetype): Likewise.
! 	(vswap_width_name): Likewise.
! 	(VSWAP_WIDTH): Likewise.
! 	(Vel): Likewise.
! 	(VEL): Likewise.
! 	(q): Likewise.
! 	* config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
! 	(vget_lane_bf16, vgetq_lane_bf16): New.
! 	(vcreate_bf16): New.
! 	(vdup_n_bf16, vdupq_n_bf16): New.
! 	(vdup_lane_bf16, vdup_laneq_bf16): New.
! 	(vdupq_lane_bf16, vdupq_laneq_bf16): New.
! 	(vduph_lane_bf16, vduph_laneq_bf16): New.
! 	(vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
! 	(vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
! 	(vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
! 	(vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
! 	(vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
! 	(vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
! 	(vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
! 	(vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
! 	(vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
! 	(vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
! 	(vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
! 	(vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
! 	(vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
! 	(vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
! 	(vreinterpretq_bf16_p128): New.
! 	(vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
! 	(vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
! 	(vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
! 	(vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
! 	(vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
! 	(vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
! 	(vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
! 	(vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
! 	(vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
! 	(vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
! 	(vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
! 	(vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
! 	(vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
! 	(vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
! 	(vreinterpretq_p128_bf16): New.
  
! 2020-02-25  Dennis Zhang  <dennis.zhang@arm.com>
  
! 	* config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
! 	(vbfdot_lane_f32, vbfdotq_laneq_f32): New.
! 	(vbfdot_laneq_f32, vbfdotq_lane_f32): New.
! 	* config/arm/arm_neon_builtins.def (vbfdot): New entry.
! 	(vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
! 	* config/arm/iterators.md (VSF2BF): New attribute.
! 	* config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
! 	(neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
! 	(neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
  
! 2020-02-25  Christophe Lyon  <christophe.lyon@linaro.org>
  
! 	* config/arm/arm.md (required_for_purecode): New attribute.
! 	(enabled): Handle required_for_purecode.
! 	* config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
! 	work with -mpure-code.
  
! 2020-02-25  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/93908
! 	* combine.c (find_split_point): For store into ZERO_EXTRACT, and src
! 	with mask.
  
! 2019-02-25  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
  
! 2020-02-25  Roman Zhuykov  <zhroma@ispras.ru>
  
! 	* doc/install.texi (--enable-checking): Adjust wording.
  
! 2020-02-25  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93868
! 	* tree-vect-slp.c (slp_copy_subtree): New function.
! 	(vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
! 	re-arranging stmts in it.
  
! 2020-02-25  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/93874
! 	* passes.c (pass_manager::dump_passes): Create a cgraph node for the
! 	dummy function and remove it at the end.
  
! 	PR translation/93864
! 	* config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
! 	paramter -> parameter.
! 	* config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
! 	* ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
  
! 2020-02-24  Roman Zhuykov  <zhroma@ispras.ru>
  
! 	* doc/install.texi (--enable-checking): Properly document current
! 	behavior.
! 	(--enable-stage1-checking): Minor clarification about bootstrap.
  
! 2020-02-24  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR analyzer/93032
! 	* doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
! 	-fanalyzer-checker=taint is also required.
! 	(-fanalyzer-checker=): Note that providing this option enables the
! 	given checker, and doing so may be required for checkers that are
! 	disabled by default.
  
! 2020-02-24  David Malcolm  <dmalcolm@redhat.com>
  
! 	* doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
! 	significant control flow events; add a "3" which shows all
! 	control flow events; the old "3" becomes "4".
  
! 2020-02-24  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/93582
! 	* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
! 	pd.offset and pd.size to be counted in bits rather than bytes, add
! 	support for maxsizei that is not a multiple of BITS_PER_UNIT and
! 	handle bitfield stores and loads.
! 	(vn_reference_lookup_3): Don't call ranges_known_overlap_p with
! 	uncomparable quantities - bytes vs. bits.  Allow push_partial_def
! 	on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
! 	pd.offset/pd.size to be counted in bits rather than bytes.
! 	Formatting fix.  Rename shadowed len variable to buflen.
  
! 2020-02-24  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
! 	    Kugan Vivekandarajah  <kugan.vivekanandarajah@linaro.org>
  
! 	PR driver/47785
! 	* gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
! 	(driver::main): Call putenv_COLLECT_AS_OPTIONS.
! 	* opts-common.c (parse_options_from_collect_gcc_options): New function.
! 	(prepend_xassembler_to_collect_as_options): Likewise.
! 	* opts.h (parse_options_from_collect_gcc_options): Declare prototype.
! 	(prepend_xassembler_to_collect_as_options): Likewise.
! 	* lto-opts.c (lto_write_options): Stream assembler options
! 	in COLLECT_AS_OPTIONS.
! 	* lto-wrapper.c (xassembler_options_error): New static variable.
! 	(get_options_from_collect_gcc_options): Move parsing options code to
! 	parse_options_from_collect_gcc_options and call it.
! 	(merge_and_complain): Validate -Xassembler options.
! 	(append_compiler_options): Handle OPT_Xassembler.
! 	(run_gcc): Append command line -Xassembler options to
! 	collect_gcc_options.
! 	* doc/invoke.texi: Add documentation about using Xassembler
! 	options with LTO.
  
! 2020-02-24  Kito Cheng  <kito.cheng@sifive.com>
  
! 	* config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
! 	for LTGT.
! 	(riscv_rtx_costs): Update cost model for LTGT.
  
! 2020-02-23  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR rtl-optimization/93564
! 	* ira-color.c (struct update_cost_queue_elem): New member start.
! 	(queue_update_cost, get_next_update_cost): Add new arg start.
! 	(allocnos_conflict_p): New function.
! 	(update_costs_from_allocno): Add new arg conflict_cost_update_p.
! 	Add checking conflicts with allocnos_conflict_p.
! 	(update_costs_from_prefs, restore_costs_from_copies): Adjust
! 	update_costs_from_allocno calls.
! 	(update_conflict_hard_regno_costs): Add checking conflicts with
! 	allocnos_conflict_p.  Adjust calls of queue_update_cost and
! 	get_next_update_cost.
! 	(assign_hard_reg): Adjust calls of queue_update_cost.  Add
! 	debugging print.
! 	(bucket_allocno_compare_func): Restore previous version.
  
! 2020-02-21  John David Anglin  <danglin@gcc.gnu.org>
  
! 	* gcc/config/pa/pa.c (pa_function_value): Fix check for word and
! 	double-word size when handling aggregate return values.
! 	* gcc/config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
! 	that homogeneous SFmode and DFmode aggregates are passed and returned
! 	in general registers.
  
! 2020-02-21  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR translation/93759
! 	* opts.c (print_filtered_help): Translate help before appending
! 	messages to it rather than after that.
  
! 2020-02-19  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/PR92989
! 	* lra-lives.c (process_bb_lives): Restore the original order
! 	of the bb liveness update.  Call make_hard_regno_dead for each
! 	register clobbered at the start of an EH receiver.
  
! 2020-02-18  Feng Xue  <fxue@os.amperecomputing.com>
  
! 	PR ipa/93763
! 	* ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
! 	self-recursively generated.
  
! 2020-02-21  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	PR target/93860
! 	* config/darwin-c.c (pop_field_alignment): Adjust quoting of
! 	error string.
  
! 2020-02-21  Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* doc/sourcebuild.texi (arm_v8_1m_mve_ok):
! 	Document new target supports option.
  
! 2020-02-21  Dennis Zhang  <dennis.zhang@arm.com>
  
! 	* config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
! 	* config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
! 	* config/arm/iterators.md (MATMUL): New iterator.
! 	(sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
! 	(mmla_sfx): New attribute.
! 	* config/arm/neon.md (neon_<sup>mmlav16qi): New.
! 	* config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
! 	(UNSPEC_MATMUL_US): New.
  
! 2020-02-21  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/arm/arm.md: Prevent scalar shifts from being used when big
! 	endian is enabled.
  
! 2020-02-21  Jan Hubicka  <hubicka@ucw.cz>
! 	    Richard Biener  <rguenther@suse.de>
  
!   	PR tree-optimization/93586
! 	* tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
! 	after mismatched array refs; do not sure type size information to
! 	recover from unmatched referneces with !flag_strict_aliasing_p.
  
! 2020-02-21  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
! 	(gather_load<mode>v64si): ... this and set operand 2 to V64SI.
! 	(scatter_store<mode>): Rename to ...
! 	(scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
! 	(scatter<mode>_exec): Delete. Move contents ...
! 	(mask_scatter_store<mode>): ... here, and rename that to ...
! 	(mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
! 	Remove mode conversion.
! 	(mask_gather_load<mode>): Rename to ...
! 	(mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
! 	Remove mode conversion.
! 	* config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
  
! 2020-02-21  Martin Jambor  <mjambor@suse.cz>
  
! 	PR tree-optimization/93845
! 	* tree-sra.c (verify_sra_access_forest): Only test access size of
! 	scalar types.
  
! 2020-02-21  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
! 	* config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
! 	(addv64di3_exec): Likewise.
! 	(subv64di3): Likewise.
! 	(subv64di3_exec): Likewise.
! 	(addv64di3_zext): Likewise.
! 	(addv64di3_zext_exec): Likewise.
! 	(addv64di3_zext_dup): Likewise.
! 	(addv64di3_zext_dup_exec): Likewise.
! 	(addv64di3_zext_dup2): Likewise.
! 	(addv64di3_zext_dup2_exec): Likewise.
! 	(addv64di3_sext_dup2): Likewise.
! 	(addv64di3_sext_dup2_exec): Likewise.
! 	(<expander>v64di3): Likewise.
! 	(<expander>v64di3_exec): Likewise.
! 	(*<reduc_op>_dpp_shr_v64di): Likewise.
! 	(*plus_carry_dpp_shr_v64di): Likewise.
! 	* config/gcn/gcn.md (adddi3): Likewise.
! 	(addptrdi3): Likewise.
! 	(<expander>di3): Likewise.
  
! 2020-02-21  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
  
! 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
! 	support.  Use aarch64_emit_mult instead of emitting multiplication
! 	instructions directly.
! 	* config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
! 	(@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
  
! 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_emit_mult): New function.
! 	(aarch64_emit_approx_div): Add SVE support.  Use aarch64_emit_mult
! 	instead of emitting multiplication instructions directly.
! 	* config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
! 	* config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
! 	(@aarch64_frecps<mode>): New expanders.
  
! 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
! 	on and produce uint64_ts rather than ints.
! 	(AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
! 	(cpu_approx_modes): Change the fields from unsigned int to uint64_t.
  
! 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
! 	an unused xmsk register when handling approximate rsqrt.
  
! 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
! 	flag_finite_math_only condition.
  
! 2020-02-20  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/93828
! 	* config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
! 	to destination operand for shufps alternative.
! 	(*vec_extractv2si_1): Ditto.
  
! 2020-02-20  Peter Bergner  <bergner@linux.ibm.com>
  
! 	PR target/93658
! 	* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
! 	vector modes.
  
! 2020-02-20  Martin Liska  <mliska@suse.cz>
  
! 	PR translation/93831
! 	* config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
  
! 2020-02-20  Martin Liska  <mliska@suse.cz>
  
! 	PR translation/93830
! 	* common/config/avr/avr-common.c: Remote trailing "|".
  
! 2020-02-19  Bernd Edlinger  <bernd.edlinger@hotmail.de>
  
! 	* collect2.c (maybe_run_lto_and_relink): Fix typo in
! 	comment.
  
! 2020-02-19  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/93767
! 	* tree-vect-data-refs.c (vect_compile_time_alias): Remove the
! 	access-size bias from the offset calculations for negative strides.
  
! 2020-02-19  Bernd Edlinger  <bernd.edlinger@hotmail.de>
  
! 	* collect2.c (c_file, o_file): Make const again.
! 	(ldout,lderrout, dump_ld_file): Remove.
! 	(tool_cleanup): Avoid calling not signal-safe functions.
! 	(maybe_run_lto_and_relink): Avoid possible signal handler
! 	access to unintialzed memory (lto_o_files).
! 	(main): Avoid leaking temp files in $TMPDIR.
! 	Initialize c_file/o_file with concat, which avoids exposing
! 	uninitialized memory to signal handler, which calls unlink(!).
! 	Avoid calling maybe_unlink when the main function returns,
! 	since the atexit handler is already doing this.
! 	* collect2.h (dump_ld_file, ldout, lderrout): Remove.
  
! 2020-02-19  Martin Jambor  <mjambor@suse.cz>
  
! 	PR tree-optimization/93776
! 	* tree-sra.c (create_access): Do not create zero size accesses.
! 	(get_access_for_expr): Do not search for zero sized accesses.
  
! 2020-02-19  Martin Jambor  <mjambor@suse.cz>
  
! 	PR tree-optimization/93667
! 	* tree-sra.c (scalarizable_type_p): Return false if record fields
! 	do not follow wach other.
  
! 2020-01-21  Kito Cheng  <kito.cheng@sifive.com>
  
! 	* config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
! 	rather than fmv.x.s/fmv.s.x.
  
! 2020-02-18  James Greenhalgh  <james.greenhalgh@arm.com>
  
! 	* config/aarch64/aarch64-simd-builtins.def
! 	(intrinsic_vec_smult_lo_): New.
! 	(intrinsic_vec_umult_lo_): Likewise.
! 	(vec_widen_smult_hi_): Likewise.
! 	(vec_widen_umult_hi_): Likewise.
! 	* config/aarch64/aarch64-simd.md
! 	(aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
! 	* config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
! 	(vmull_high_s16): Likewise.
! 	(vmull_high_s32): Likewise.
! 	(vmull_high_u8): Likewise.
! 	(vmull_high_u16): Likewise.
! 	(vmull_high_u32): Likewise.
! 	(vmull_s8): Likewise.
! 	(vmull_s16): Likewise.
! 	(vmull_s32): Likewise.
! 	(vmull_u8): Likewise.
! 	(vmull_u16): Likewise.
! 	(vmull_u32): Likewise.
  
! 2020-02-18  Martin Liska  <mliska@suse.cz>
  
! 	* value-prof.c (stream_out_histogram_value): Restore LTO PGO
! 	bootstrap by missing removal of invalid sanity check.
  
! 2020-02-18  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/92518
! 	* ipa-icf-gimple.c (func_checker::compare_gimple_assign):
! 	Always compare LHS of gimple_assign.
  
! 2020-02-18  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/93583
! 	* cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
! 	and return type of functions.
! 	* ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
! 	Drop MALLOC attribute for void functions.
! 	* ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
! 	malloc_state for a new VOID clone.
  
! 2020-02-18  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/92924
! 	* common.opt: Add -fprofile-reproducibility.
! 	* doc/invoke.texi: Document it.
! 	* value-prof.c (dump_histogram_value):
! 	Document and support behavior for counters[0]
! 	being a negative value.
! 	(get_nth_most_common_value): Handle negative
! 	counters[0] in respect to flag_profile_reproducible.
  
! 2020-02-18  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR ipa/93797
! 	* cgraph.c (verify_speculative_call): Use speculative_id instead of
! 	speculative_uid in messages.  Remove trailing whitespace from error
! 	message.  Use num_speculative_call_targets instead of
! 	num_speculative_targets in a message.
! 	(cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
! 	edge messages and stmt instead of cal_stmt in reference message.
  
! 	PR tree-optimization/93780
! 	* tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
! 	before calling build_vector_type.
! 	(execute_update_addresses_taken): Likewise.
  
! 	PR driver/93796
! 	* params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
! 	typo, functoin -> function.
! 	* tree.c (free_lang_data_in_decl): Fix comment typo,
! 	functoin -> function.
! 	* ipa-visibility.c (cgraph_externally_visible_p): Likewise.
  
! 2020-02-17  David Malcolm  <dmalcolm@redhat.com>
  
! 	* diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
! 	won't be printed.
! 	(print_option_information): Don't call get_option_url if URLs
! 	won't be printed.
  
! 2020-02-17  Alexandre Oliva  <oliva@adacore.com>
  
! 	* tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
! 	handling of register_common-less targets.
  
! 2020-02-17  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/93760
! 	* ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
  
! 2020-02-17  Martin Liska  <mliska@suse.cz>
  
! 	PR translation/93755
! 	* config/rs6000/rs6000.c (rs6000_option_override_internal):
! 	Fix double quotes.
  
! 2020-02-17  Martin Liska  <mliska@suse.cz>
  
! 	PR other/93756
! 	* config/rx/elf.opt: Fix typo.
  
+ 2020-02-17  Richard Biener  <rguenther@suse.de>
  
! 	PR c/86134
! 	* opts-global.c (print_ignored_options): Use inform and
! 	amend message.
  
! 2020-02-17  Jiufu Guo  <guojiufu@linux.ibm.com>
  
! 	PR target/93047
! 	* config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
  
! 2020-02-16  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/93743
! 	* config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
! 	(atan2<mode>3): Update operand order in the call to gen_atan2xf3.
  
! 2020-02-15  Jason Merrill  <jason@redhat.com>
  
! 	* doc/invoke.texi (C Dialect Options): Add -std=c++20.
  
! 2020-02-15  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/93744
! 	* match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
! 	A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
! 	A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
! 	sure @2 in the first and @1 in the other patterns has no side-effects.
  
! 2020-02-15  David Malcolm  <dmalcolm@redhat.com>
! 	    Bernd Edlinger  <bernd.edlinger@hotmail.de>
  
! 	PR 87488
! 	PR other/93168
! 	* config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
! 	* configure.ac (--with-diagnostics-urls): New configuration
! 	option, based on --with-diagnostics-color.
! 	(DIAGNOSTICS_URLS_DEFAULT): New define.
! 	* config.h: Regenerate.
! 	* configure: Regenerate.
! 	* diagnostic.c (diagnostic_urls_init): Handle -1 for
! 	DIAGNOSTICS_URLS_DEFAULT from configure-time
! 	--with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
! 	and TERM_URLS environment variable.
! 	* diagnostic-url.h (diagnostic_url_format): New enum type.
! 	(diagnostic_urls_enabled_p): rename to...
! 	(determine_url_format): ... this, and change return type.
! 	* diagnostic-color.c (parse_env_vars_for_urls): New helper function.
! 	(auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
! 	the linux console, and mingw.
! 	(diagnostic_urls_enabled_p): rename to...
! 	(determine_url_format): ... this, and adjust.
! 	* pretty-print.h (pretty_printer::show_urls): rename to...
! 	(pretty_printer::url_format): ... this, and change to enum.
! 	* pretty-print.c (pretty_printer::pretty_printer,
! 	pp_begin_url, pp_end_url, test_urls): Adjust.
! 	* doc/install.texi (--with-diagnostics-urls): Document the new
! 	configuration option.
! 	(--with-diagnostics-color): Document the existing interaction
! 	with GCC_COLORS better.
! 	* doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
! 	vindex reference.  Update description of defaults based on the above.
! 	(-fdiagnostics-color): Update description of how -fdiagnostics-color
! 	interacts with GCC_COLORS.
  
! 2020-02-14  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR target/93704
! 	* config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
! 	conjunction with TARGET_GNU_TLS in early return.
  
! 2020-02-14  Alexander Monakov  <amonakov@ispras.ru>
  
! 	* rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
! 	the mode is not wider than UNITS_PER_WORD.
  
! 2020-02-14  Martin Jambor  <mjambor@suse.cz>
  
! 	PR tree-optimization/93516
! 	* tree-sra.c (propagate_subaccesses_from_rhs): Do not create
! 	access of the same type as the parent.
! 	(propagate_subaccesses_from_lhs): Likewise.
  
! 2020-02-14 Hongtao Liu  <hongtao.liu@intel.com>
  
! 	PR target/93724
! 	* config/i386/avx512vbmi2intrin.h
! 	(_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
! 	_mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
! 	_mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
! 	_m512_shrdi_epi64, _m512_mask_shrdi_epi64,
! 	_m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
! 	_mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
! 	_mm512_shldi_epi32, _mm512_mask_shldi_epi32,
! 	_mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
! 	_mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
! 	of lacking a closing parenthesis.
! 	* config/i386/avx512vbmi2vlintrin.h
! 	(_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
! 	_mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
! 	_mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
! 	_m256_shrdi_epi64, _m256_mask_shrdi_epi64,
! 	_m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
! 	_mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
! 	_mm256_shldi_epi32, _mm256_mask_shldi_epi32,
! 	_mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
! 	_mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
! 	_mm_shrdi_epi16, _mm_mask_shrdi_epi16,
! 	_mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
! 	_mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
! 	_mm_shrdi_epi64, _mm_mask_shrdi_epi64,
! 	_m_maskz_shrdi_epi64, _mm_shldi_epi16,
! 	_mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
! 	_mm_shldi_epi32, _mm_mask_shldi_epi32,
! 	_mm_maskz_shldi_epi32, _mm_shldi_epi64,
! 	_mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
  
! 2020-02-13  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/93656
! 	* config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
! 	the target function entry.
  
! 2020-02-13  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* common/config/arc/arc-common.c (arc_option_optimization_table):
! 	Disable if-conversion step when optimized for size.
  
! 2020-02-13  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
! 	R12-R15 are always in ARCOMPACT16_REGS register class.
! 	* config/arc/arc.opt (mq-class): Deprecate.
! 	* config/arc/constraint.md ("q"): Remove dependency on mq-class
! 	option.
! 	* doc/invoke.texi (mq-class): Update text.
! 	* common/config/arc/arc-common.c (arc_option_optimization_table):
! 	Update list.
  
! 2020-02-13  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.c (arc_insn_cost): New function.
! 	(TARGET_INSN_COST): Define.
! 	* config/arc/arc.md (cost): New attribute.
! 	(add_n): Use arc_nonmemory_operand.
! 	(ashlsi3_insn): Likewise, also update constraints.
! 	(ashrsi3_insn): Likewise.
! 	(rotrsi3): Likewise.
! 	(add_shift): Likewise.
! 	* config/arc/predicates.md (arc_nonmemory_operand): New predicate.
  
! 2020-02-13  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
  	registers.
+ 	(umulsidi_600): Likewise.
  
! 2020-02-13  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93696
! 	* config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
! 	_mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
! 	_mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
! 	_mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
! 	pass __A to the builtin followed by __W instead of __A followed by
! 	__B.
! 	* config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
! 	_mm512_mask_popcnt_epi64): Likewise.
! 	* config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
! 	_mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
! 	_mm256_mask_popcnt_epi64): Likewise.
  
! 	PR tree-optimization/93582
! 	* fold-const.h (shift_bytes_in_array_left,
! 	shift_bytes_in_array_right): Declare.
! 	* fold-const.c (shift_bytes_in_array_left,
! 	shift_bytes_in_array_right): New function, moved from
! 	gimple-ssa-store-merging.c, no longer static.
! 	* gimple-ssa-store-merging.c (shift_bytes_in_array): Move
! 	to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
! 	(shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
! 	(encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
! 	shift_bytes_in_array.
! 	(verify_shift_bytes_in_array): Rename to ...
! 	(verify_shift_bytes_in_array_left): ... this.  Use
! 	shift_bytes_in_array_left instead of shift_bytes_in_array.
! 	(store_merging_c_tests): Call verify_shift_bytes_in_array_left
! 	instead of verify_shift_bytes_in_array.
! 	* tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
! 	/ native_interpret_expr where the store covers all needed bits,
! 	punt on PDP-endian, otherwise allow all involved offsets and sizes
! 	not to be byte-aligned.
  
! 	PR target/93673
! 	* config/i386/sse.md (k<code><mode>): Drop mode from last operand and
! 	use const_0_to_255_operand predicate instead of immediate_operand.
! 	(avx512dq_fpclass<mode><mask_scalar_merge_name>,
! 	avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
! 	vgf2p8affineinvqb_<mode><mask_name>,
! 	vgf2p8affineqb_<mode><mask_name>): Drop mode from
! 	const_0_to_255_operand predicated operands.
  
! 2020-02-12  Jeff Law  <law@redhat.com>
  
! 	* config/h8300/h8300.md (comparison shortening peepholes): Use
! 	a mode iterator to merge the HImode and SImode peepholes.
  
! 2020-02-12  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/93663
! 	* real.c (is_even): Make static.  Function comment fix.
! 	(is_halfway_below): Make static, don't assert R is not inf/nan,
! 	instead return false for those.  Small formatting fixes.
  
! 2020-02-12  Martin Sebor  <msebor@redhat.com>
  
! 	PR middle-end/93646
! 	* tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
! 	(handle_builtin_stxncpy_strncat): ...to this.  Change first argument.
! 	Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
! 	(strlen_check_and_optimize_call): Adjust callee name.
  
! 2020-02-12  Jeff Law  <law@redhat.com>
  
! 	* config/h8300/h8300.md (comparison shortening peepholes): Drop
! 	(and (xor)) variant.  Combine other two into single peephole.
  
! 2020-02-12  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	PR rtl-optimization/93565
! 	* config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
  
! 2020-02-12  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	* config/aarch64/aarch64-simd.md
! 	(aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
! 	* config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
! 	generating separate ADDV and zero_extend patterns.
! 	* config/aarch64/iterators.md (VDQV_E): New iterator.
  
! 2020-02-12  Jeff Law  <law@redhat.com>
  
! 	* config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
! 	expanders, splits, etc.
! 	(movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
! 	(stpcpy_internal_<mode>, stpcpy splitter): Likewise.
! 	(peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
! 	* config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
! 	(h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
! 	* config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
! 	function prototype.
! 	(h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
  
! 2020-02-12  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93670
! 	* config/i386/sse.md (VI48F_256_DQ): New mode iterator.
! 	(avx512vl_vextractf128<mode>): Use it instead of VI48F_256.  Remove
! 	TARGET_AVX512DQ from condition.
! 	(vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
! 	instead of <mask_mode512bit_condition> in condition.  If
! 	TARGET_AVX512DQ is false, emit vextract*64x4 instead of
! 	vextract*32x8.
! 	(vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
! 	from condition.
  
! 2020-02-12  Kewen Lin  <linkw@gcc.gnu.org>
  
! 	PR target/91052
! 	* ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
  
! 2020-02-12  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	* config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
! 	where strlen is more legible.
! 	(rs6000_builtin_vectorized_libmass): Ditto.
! 	(rs6000_print_options_internal): Ditto.
  
! 2020-02-11  Martin Sebor  <msebor@redhat.com>
  
! 	PR tree-optimization/93683
! 	* tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
  
! 2020-02-11  Michael Meissner  <meissner@linux.ibm.com>
  
! 	* config/rs6000/predicates.md (cint34_operand): Rename the
! 	-mprefixed-addr option to be -mprefixed.
! 	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
! 	the -mprefixed-addr option to be -mprefixed.
! 	(OTHER_FUTURE_MASKS): Likewise.
! 	(POWERPC_MASKS): Likewise.
! 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
! 	the -mprefixed-addr option to be -mprefixed.  Change error
! 	messages to refer to -mprefixed.
! 	(num_insns_constant_gpr): Rename the -mprefixed-addr option to be
! 	-mprefixed.
! 	(rs6000_legitimate_offset_address_p): Likewise.
! 	(rs6000_mode_dependent_address): Likewise.
! 	(rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
! 	"-mprefixed" for target attributes and pragmas.
! 	(address_to_insn_form): Rename the -mprefixed-addr option to be
! 	-mprefixed.
! 	(rs6000_adjust_insn_length): Likewise.
! 	* config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
! 	-mprefixed-addr option to be -mprefixed.
! 	(ASM_OUTPUT_OPCODE): Likewise.
! 	* config/rs6000/rs6000.md (prefixed insn attribute): Rename the
! 	-mprefixed-addr option to be -mprefixed.
! 	* config/rs6000/rs6000.opt (-mprefixed): Rename the
! 	-mprefixed-addr option to be prefixed.  Change the option from
! 	being undocumented to being documented.
! 	* doc/invoke.texi (RS/6000 and PowerPC Options): Document the
! 	-mprefixed option.  Update the -mpcrel documentation to mention
! 	-mprefixed.
  
! 2020-02-11  Hans-Peter Nilsson  <hp@axis.com>
  
! 	* ira-conflicts.c (print_hard_reg_set): Correct output for sets
! 	including FIRST_PSEUDO_REGISTER - 1.
! 	* ira-color.c (print_hard_reg_set): Ditto.
  
! 2020-02-11  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
  
! 	* config/arm/arm-builtins.c (enum arm_type_qualifiers): 
! 	(USTERNOP_QUALIFIERS): New define.
! 	(USMAC_LANE_QUADTUP_QUALIFIERS): New define.
! 	(SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
! 	(arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
! 	(arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
! 	* config/arm/arm_neon.h (vusdot_s32): New.
! 	(vusdot_lane_s32): New.
! 	(vusdotq_lane_s32): New.
! 	(vsudot_lane_s32): New.
! 	(vsudotq_lane_s32): New.
! 	* config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
! 	* config/arm/iterators.md (DOTPROD_I8MM): New.
! 	(sup, opsuffix): Add <us/su>.
! 	* config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
! 	* config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
  
! 2020-02-11  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93661
! 	PR tree-optimization/93662
! 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
! 	tree_to_poly_int64.
! 	* tree-sra.c (get_access_for_expr): Likewise.
  
! 2020-02-10  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93637
! 	* config/i386/sse.md (VI_256_AVX2): New mode iterator.
! 	(vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
! 	Change condition from TARGET_AVX2 to TARGET_AVX.
  
! 2020-02-10  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	PR other/93641
! 	* config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
! 	argument of strncmp.
  
! 2020-02-10  Hans-Peter Nilsson  <hp@axis.com>
  
! 	Try to generate zero-based comparisons.
! 	* config/cris/cris.c (cris_reduce_compare): New function.
! 	* config/cris/cris-protos.h  (cris_reduce_compare): Add prototype.
! 	* config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
! 	(cstore<mode>4"): Apply cris_reduce_compare in expanders.
  
! 2020-02-10  Richard Earnshaw  <rearnsha@arm.com>
  
! 	PR target/91913
! 	* config/arm/arm.md (movsi_compare0): Allow SP as a source register
! 	in Thumb state and also as a destination in Arm state.  Add T16
! 	variants.
  
! 2020-02-10  Hans-Peter Nilsson  <hp@axis.com>
  
! 	* md.texi (Define Subst): Match closing paren in example.
  
! 2020-02-10  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/58218
! 	PR other/93641
! 	* config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
! 	arguments of strncmp.
  
! 2020-02-10  Feng Xue  <fxue@os.amperecomputing.com>
  
! 	PR ipa/93203
! 	* ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
! 	but different source value.
! 	(adjust_callers_for_value_intersection): New function.
! 	(gather_edges_for_value): Adjust order of callers to let a
! 	non-self-recursive caller be the first element.
! 	(self_recursive_pass_through_p): Add a new parameter "simple", and
! 	check generalized self-recursive pass-through jump function.
! 	(self_recursive_agg_pass_through_p): Likewise.
! 	(find_more_scalar_values_for_callers_subset): Compute value from
! 	pass-through jump function for self-recursive.
! 	(intersect_with_plats): Cleanup previous implementation code for value
! 	itersection with self-recursive call edge.
! 	(intersect_with_agg_replacements): Likewise.
! 	(intersect_aggregates_with_edge): Deduce value from pass-through jump
! 	function for self-recursive call edge.  Cleanup previous implementation
! 	code for value intersection with self-recursive call edge.
! 	(decide_whether_version_node): Remove dead callers and adjust order
! 	to let a non-self-recursive caller be the first element.
  
! 2020-02-09  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	* recog.c: Move pass_split_before_sched2 code in front of
! 	pass_split_before_regstack.
! 	(pass_data_split_before_sched2): Rename pass to split3 from split4.
! 	(pass_data_split_before_regstack): Rename pass to split4 from split3.
! 	(rest_of_handle_split_before_sched2): Remove.
! 	(pass_split_before_sched2::execute): Unconditionally call
! 	split_all_insns.
! 	(enable_split_before_sched2): New function.
! 	(pass_split_before_sched2::gate): Use enable_split_before_sched2.
! 	(pass_split_before_regstack::gate): Ditto.
! 	* config/nds32/nds32.c (nds32_split_double_word_load_store_p):
! 	Update name check for renamed split4 pass.
! 	* config/sh/sh.c (register_sh_passes): Update pass insertion
! 	point for renamed split4 pass.
  
! 2020-02-09  Jakub Jelinek  <jakub@redhat.com>
  
! 	* gimplify.c (gimplify_adjust_omp_clauses_1): Promote
! 	DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
! 	copying them around between host and target.
  
! 2020-02-08  Andrew Pinski  <apinski@marvell.com>
  
! 	PR target/91927
! 	* config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
! 	STRICT_ALIGNMENT also.
  
! 2020-02-08  Jim Wilson  <jimw@sifive.com>
  
! 	PR target/93532
! 	* config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
  
! 2020-02-08  Uroš Bizjak  <ubizjak@gmail.com>
  	    Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/65782
! 	* config/i386/i386.h (CALL_USED_REGISTERS): Make
! 	xmm16-xmm31 call-used even in 64-bit ms-abi.
  
! 2020-02-07  Dennis Zhang  <dennis.zhang@arm.com>
  
! 	* config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
! 	(simd_ummla, simd_usmmla): Likewise.
! 	* config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
! 	* config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
! 	(vusmmlaq_s32): New.
  
! 2020-02-07  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/93519
! 	* tree-inline.c (fold_marked_statements): Do a PRE walk,
! 	skipping unreachable regions.
! 	(optimize_inline_calls): Skip folding stmts when we didn't
! 	inline.
  
! 2020-02-07  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/85667
! 	* config/i386/i386.c (function_arg_ms_64): Add a type argument.
! 	Don't return aggregates with only SFmode and DFmode in SSE
! 	register.
! 	(ix86_function_arg): Pass arg.type to function_arg_ms_64.
  
! 2020-02-07  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93122
! 	* config/rs6000/rs6000-logue.c
! 	(rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
! 	if it fails, move rs into end_addr and retry.  Add
! 	REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
! 	the insn pattern doesn't describe well what exactly happens to
! 	dwarf2cfi.c.
  
! 	PR target/93594
! 	* config/i386/predicates.md (avx_identity_operand): Remove.
! 	* config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
! 	(avx_<castmode><avxsizesuffix>_<castmode>,
! 	avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
! 	a VEC_CONCAT of the operand and UNSPEC_CAST.
! 	(avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
! 	a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
! 	UNSPEC_CAST.
  
! 	PR target/93611
! 	* config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
! 	recog_data.insn if distance_non_agu_define changed it.
  
! 2020-02-06  Michael Meissner  <meissner@linux.ibm.com>
  
! 	PR target/93569
! 	* config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
! 	we only had X-FORM (reg+reg) addressing for vectors.  Also before
! 	ISA 3.0, we only had X-FORM addressing for scalars in the
! 	traditional Altivec registers.
  
! 2020-02-06  <zhongyunde@huawei.com>
!   	    Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR rtl-optimization/93561
! 	* lra-assigns.c (spill_for): Check that tested hard regno is not out of
! 	hard register range.
  
! 2020-02-06  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
! 	attribute.
  
! 2020-02-06  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	* config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
! 	where the low and the high 32 bits are equal to each other specially,
! 	with an rldimi instruction.
  
! 2020-02-06  Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
  
! 2020-02-06  Mihail Ionescu  <mihail.ionescu@arm.com>
  
! 	* config/arm/arm-tables.opt: Regenerate.
  
! 2020-02-06  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR target/87763
! 	* config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
! 	* config/aarch64/aarch64.c (aarch64_movk_shift): New function.
! 	* config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
  
! 2020-02-06  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/87763
! 	* config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
  
! 2020-02-06  Delia Burduv  <delia.burduv@arm.com>
  
! 	* config/aarch64/aarch64-simd-builtins.def
! 	(bfmlaq): New built-in function.
! 	(bfmlalb): New built-in function.
! 	(bfmlalt): New built-in function.
! 	(bfmlalb_lane): New built-in function.
! 	(bfmlalt_lane): New built-in function.
! 	* config/aarch64/aarch64-simd.md
! 	(aarch64_bfmmlaqv4sf): New pattern.
! 	(aarch64_bfmlal<bt>v4sf): New pattern.
! 	(aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
! 	* config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
! 	(vbfmlalbq_f32): New intrinsic.
! 	(vbfmlaltq_f32): New intrinsic.
! 	(vbfmlalbq_lane_f32): New intrinsic.
! 	(vbfmlaltq_lane_f32): New intrinsic.
! 	(vbfmlalbq_laneq_f32): New intrinsic.
! 	(vbfmlaltq_laneq_f32): New intrinsic.
! 	* config/aarch64/iterators.md (BF_MLA): New int iterator.
! 	(bt): New int attribute.
  
! 2020-02-06  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	* config/i386/i386.md (*pushtf): Emit "#" instead of
! 	calling gcc_unreachable in insn output.
! 	(*pushxf): Ditto.
! 	(*pushdf): Ditto.
! 	(*pushsf_rex64): Ditto for alternatives other than 1.
! 	(*pushsf): Ditto for alternatives other than 1.
  
! 2020-02-06  Martin Liska  <mliska@suse.cz>
  
! 	PR gcov-profile/91971
! 	PR gcov-profile/93466
! 	* coverage.c (coverage_init): Revert mangling of
! 	path into filename.  It can lead to huge filename length.
! 	Creation of subfolders seem more natural.
  
! 2020-02-06  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
  
! 	PR target/93300
! 	* config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
! 	(arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
! 	Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
  
! 2020-02-06  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93594
! 	* config/i386/predicates.md (avx_identity_operand): New predicate.
! 	* config/i386/sse.md (*avx_vec_concat<mode>_1): New
! 	define_insn_and_split.
  
! 	PR libgomp/93515
! 	* omp-low.c (use_pointer_for_field): For nested constructs, also
! 	look for map clauses on target construct.
! 	(scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
! 	taskreg_nesting_level.
  
! 	PR libgomp/93515
! 	* gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
! 	shared clause, call omp_notice_variable on outer context if any.
  
! 2020-02-05  Jason Merrill  <jason@redhat.com>
  
! 	PR c++/92003
! 	* symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
! 	non-zero address even if weak and not yet defined.
  
! 2020-02-05  Martin Sebor  <msebor@redhat.com>
  
! 	PR tree-optimization/92765
! 	* gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
! 	* tree-ssa-strlen.c (compute_string_length): Remove.
! 	(determine_min_objsize): Remove.
! 	(get_len_or_size): Add an argument.  Call get_range_strlen_dynamic.
! 	Avoid using type size as the upper bound on string length.
! 	(handle_builtin_string_cmp): Add an argument.  Adjust.
! 	(strlen_check_and_optimize_call): Pass additional argument to
! 	handle_builtin_string_cmp.
  
! 2020-02-05  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	* config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
! 	(*pushdi2_rex64 peephole2): Unconditionally split after
! 	epilogue_completed.
! 	(*ashl<mode>3_doubleword): Ditto.
! 	(*<shift_insn><mode>3_doubleword): Ditto.
  
! 2020-02-05  Michael Meissner  <meissner@linux.ibm.com>
  
! 	PR target/93568
! 	* config/rs6000/rs6000.c (get_vector_offset): Fix
  
! 2020-02-05  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
  
! 2020-02-05  David Malcolm  <dmalcolm@redhat.com>
  
! 	* doc/analyzer.texi
! 	(Special Functions for Debugging the Analyzer): Update description
! 	of __analyzer_dump_exploded_nodes.
  
! 2020-02-05  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/92190
! 	* config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
! 	include sets and not clobbers in the vzeroupper pattern.
! 	* config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
! 	the parallel has 17 (64-bit) or 9 (32-bit) elts.
! 	(*avx_vzeroupper_1): New define_insn_and_split.
  
! 	PR target/92190
! 	* recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
! 	don't run when !optimize.
! 	(pass_split_before_regstack::gate): For STACK_REGS targets, run even
! 	when !optimize.
  
! 2020-02-05  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/90648
! 	* genmatch.c (dt_node::gen_kids_1): Emit number of argument
! 	checks before matching calls.
  
! 2020-02-05  Jakub Jelinek  <jakub@redhat.com>
  
! 	* tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
! 	function comment typo.
  
! 	PR middle-end/93555
! 	* omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
! 	simd_clone_create failed when i == 0, adjust clone->nargs by
! 	clone->inbranch.
  
! 2020-02-05  Martin Liska  <mliska@suse.cz>
  
! 	PR c++/92717
! 	* doc/invoke.texi: Document that one should
! 	not combine ASLR and -fpch.
  
! 2020-02-04  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93538
! 	* match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
  
! 2020-02-04  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/91123
! 	* tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
! 	(vn_walk_cb_data::last_vuse): New member.
! 	(vn_walk_cb_data::saved_operands): Likewsie.
! 	(vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
! 	(vn_walk_cb_data::push_partial_def): Use finish.
! 	(vn_reference_lookup_2): Update last_vuse and use finish if
! 	we've saved operands.
! 	(vn_reference_lookup_3): Use finish and update calls to
! 	push_partial_defs everywhere.  When translating through
! 	memcpy or aggregate copies save off operands and alias-set.
! 	(eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
! 	operation for redundant store removal.
  
! 2020-02-04  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/92819
! 	* tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
! 	generating more stmts than before.
  
! 2020-02-04  Martin Liska  <mliska@suse.cz>
  
! 	* config/arm/arm.c (arm_gen_far_branch): Move the function
! 	outside of selftests.
  
! 2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
  
! 	* config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
! 	function to adjust PC-relative vector addresses.
! 	(rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
! 	handle vectors with PC-relative addresses.
  
! 2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
  
! 	* config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
! 	reference.
! 	(hard_reg_and_mode_to_addr_mask): Delete.
! 	(rs6000_adjust_vec_address): If the original vector address
! 	was REG+REG or REG+OFFSET and the element is not zero, do the add
! 	of the elements in the original address before adding the offset
! 	for the vector element.  Use address_to_insn_form to validate the
! 	address using the register being loaded, rather than guessing
! 	whether the address is a DS-FORM or DQ-FORM address.
  
! 2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
  
! 	* config/rs6000/rs6000.c (get_vector_offset): New helper function
! 	to calculate the offset in memory from the start of a vector of a
! 	particular element.  Add code to keep the element number in
! 	bounds if the element number is variable.
! 	(rs6000_adjust_vec_address): Move calculation of offset of the
! 	vector element to get_vector_offset.
! 	(rs6000_split_vec_extract_var): Do not do the initial AND of
! 	element here, move the code to get_vector_offset.
  
! 2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
  
! 	* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
! 	gcc_asserts.
  
! 2020-02-03  Segher Boessenkool  <segher@kernel.crashing.org>
  
! 	* config/rs6000/constraints.md: Improve documentation.
  
! 2020-02-03  Richard Earnshaw  <rearnsha@arm.com>
  
! 	PR target/93548
! 	* config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
! 	($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
  
! 2020-02-03  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config.gcc: Remove "carrizo" support.
! 	* config/gcn/gcn-opts.h (processor_type): Likewise.
! 	* config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
! 	* config/gcn/gcn.opt (gpu_type): Likewise.
! 	* config/gcn/t-omp-device: Likewise.
  
! 2020-02-03  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
  
! 	PR target/91816
! 	* config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
! 	* config/arm/arm.c (arm_gen_far_branch): New function
! 	arm_gen_far_branch.
! 	* config/arm/arm.md: Update b<cond> for Thumb2 range checks.
  
! 2020-02-03  Julian Brown  <julian@codesourcery.com>
! 	    Tobias Burnus  <tobias@codesourcery.com>
  
! 	* doc/invoke.texi: Update mention of OpenACC version to 2.6.
  
! 2020-02-03  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93533
! 	* config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
! 	valid RTL to sum up the lowest and second lowest bytes of the popcnt
! 	result.
  
! 2020-02-02  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR rtl-optimization/91333
! 	* ira-color.c (struct allocno_color_data): Add member
! 	hard_reg_prefs.
! 	(init_allocno_threads): Set the member up.
! 	(bucket_allocno_compare_func): Add compare hard reg
! 	prefs.
  
! 2020-01-31  Sandra Loosemore  <sandra@codesourcery.com>
  
! 	nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
  
! 	* configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
! 	* config.in: Regenerated.
! 	* configure: Regenerated.
! 	* config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
! 	for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
! 	(ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
  
! 2020-02-01  Andrew Burgess  <andrew.burgess@embecosm.com>
  
! 	* configure: Regenerate.
  
! 2020-01-31  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR rtl-optimization/91333
! 	* ira-color.c (bucket_allocno_compare_func): Move conflict hard
! 	reg preferences comparison up.
  
! 2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
! 	* config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
! 	aarch64-sve-builtins-base.h.
! 	* config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
! 	aarch64-sve-builtins-base.cc.
! 	* config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
! 	(svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
! 	(svcvtnt): Declare.
! 	* config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
! 	(svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
! 	(svcvtnt): New functions.
! 	* config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
! 	(svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
! 	(svcvtnt): New functions.
! 	(svcvt): Add a form that converts f32 to bf16.
! 	* config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
! 	(ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
! 	Declare.
! 	* config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
! 	Treat B as bfloat16_t.
! 	(ternary_bfloat_lane_base): New class.
! 	(ternary_bfloat_def): Likewise.
! 	(ternary_bfloat): New shape.
! 	(ternary_bfloat_lane_def): New class.
! 	(ternary_bfloat_lane): New shape.
! 	(ternary_bfloat_lanex2_def): New class.
! 	(ternary_bfloat_lanex2): New shape.
! 	(ternary_bfloat_opt_n_def): New class.
! 	(ternary_bfloat_opt_n): New shape.
! 	* config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
! 	* config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
! 	(@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
! 	(@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
! 	(@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
! 	(*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
! 	(@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
! 	* config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
! 	the pattern off the narrow mode instead of the wider one.
! 	* config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
! 	(UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
! 	(sve_fp_op): Handle them.
! 	(SVE_BFLOAT_TERNARY_LONG): New int itertor.
! 	(SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
  
! 2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/arm_sve.h: Include arm_bf16.h.
! 	* config/aarch64/aarch64-modes.def (BF): Move definition before
! 	VECTOR_MODES.  Remove separate VECTOR_MODES for V4BF and V8BF.
! 	(SVE_MODES): Handle BF modes.
! 	* config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
! 	BF modes.
! 	(aarch64_full_sve_mode): Likewise.
! 	* config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
! 	and VNx32BF.
! 	(SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
! 	(Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
! 	(V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
! 	(insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
! 	new SVE BF modes.
! 	* config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
! 	type_class_index.
! 	* config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
! 	(TYPES_all_data): Add bf16.
! 	(TYPES_reinterpret1, TYPES_reinterpret): Likewise.
! 	(register_tuple_type): Increase buffer size.
! 	* config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
! 	(bf16): New type suffix.
! 	* config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
! 	(svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
! 	(svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
! 	Change type from all_data to all_arith.
! 	* config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
! 	(svminp): Likewise.
  
! 2020-01-31  Dennis Zhang  <dennis.zhang@arm.com>
! 	    Matthew Malcomson  <matthew.malcomson@arm.com>
  	    Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
! 	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
! 	__ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
! 	__ARM_FEATURE_SVE_MATMUL_FP64 as appropriate.  Don't define
! 	__ARM_FEATURE_MATMUL_FP64.
! 	* config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
! 	(sve): Add AARCH64_FL_F32MM to the list of extensions that should
! 	be disabled at the same time.
! 	(f32mm): New extension.
! 	* config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
! 	(AARCH64_FL_F64MM): Bump to the next bit up.
! 	(AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
! 	(TARGET_SVE_F64MM): New macros.
! 	* config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
! 	(UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
! 	(UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
! 	(UNSPEC_ZIP2Q): New unspeccs.
! 	(DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
! 	(optab, sur, perm_insn): Handle the new unspecs.
! 	(sve_fp_op): Handle UNSPEC_FMMLA.  Resort.
! 	* config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
! 	TARGET_SVE_F64MM instead of separate tests.
! 	(@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
! 	(@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
! 	(@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
! 	(@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
! 	(@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
! 	* config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
! 	(TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
! 	(TYPES_s_signed): New macro.
! 	(TYPES_s_integer): Use it.
! 	(TYPES_d_float): New macro.
! 	(TYPES_d_data): Use it.
! 	* config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
! 	(ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
! 	(ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
! 	* config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
! 	(svmmla): New shape.
! 	(ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
! 	template parameters.
! 	(ternary_resize2_lane_base): Likewise.
! 	(ternary_resize2_base): New class.
! 	(ternary_qq_lane_base): Likewise.
! 	(ternary_intq_uintq_lane_def): Likewise.
! 	(ternary_intq_uintq_lane): New shape.
! 	(ternary_intq_uintq_opt_n_def): New class
! 	(ternary_intq_uintq_opt_n): New shape.
! 	(ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
! 	(ternary_uintq_intq_def): New class.
! 	(ternary_uintq_intq): New shape.
! 	(ternary_uintq_intq_lane_def): New class.
! 	(ternary_uintq_intq_lane): New shape.
! 	(ternary_uintq_intq_opt_n_def): New class.
! 	(ternary_uintq_intq_opt_n): New shape.
! 	* config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
! 	(svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
! 	(svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
! 	* config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
! 	Generalize to...
! 	(svdotprod_lane_impl): ...this new class.
! 	(svmmla_impl, svusdot_impl): New classes.
! 	(svdot_lane): Update to use svdotprod_lane_impl.
! 	(svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
! 	(svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
! 	functions.
! 	* config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
! 	function, with no types defined.
! 	(svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
! 	AARCH64_FL_I8MM functions.
! 	(svmmla): New AARCH64_FL_F32MM function.
! 	(svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
! 	(svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
! 	AARCH64_FL_F64MM function.
! 	(REQUIRED_EXTENSIONS):
  
! 2020-01-31  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
! 	alternative only.
  
! 2020-01-31  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	* config/i386/i386.md (*movoi_internal_avx): Do not check for
! 	TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.  Remove MODE_V8SF handling.
! 	(*movti_internal): Do not check for
! 	TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
! 	(*movtf_internal): Move check for TARGET_SSE2 and size optimization
! 	just after check for TARGET_AVX.
! 	(*movdf_internal): Ditto.
! 	* config/i386/mmx.md (*mov<mode>_internal): Do not check for
! 	TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
! 	* config/i386/sse.md (mov<mode>_internal): Only check
! 	TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode.  Move check
! 	for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
! 	(<sse>_andnot<mode>3<mask_name>): Move check for
! 	TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
! 	(<code><mode>3<mask_name>): Ditto.
! 	(*andnot<mode>3): Ditto.
! 	(*andnottf3): Ditto.
! 	(*<code><mode>3): Ditto.
! 	(*<code>tf3): Ditto.
! 	(*andnot<VI:mode>3): Remove
! 	TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
! 	(<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
! 	(*<code><VI12_AVX_AVX512F:mode>3): Ditto.
! 	(sse4_1_blendv<ssemodesuffix>): Ditto.
! 	* config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
! 	Explain that tune applies to 128bit instructions only.
  
! 2020-01-31  Kwok Cheung Yeung  <kcy@codesourcery.com>
  
! 	* config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
! 	to definition of hsa_kernel_description.  Parse assembly to find SGPR
! 	and VGPR count of kernel and store in hsa_kernel_description.
  
! 2020-01-31  Tamar Christina  <tamar.christina@arm.com>
  
! 	PR rtl-optimization/91838
! 	* simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
! 	to truncate if allowed or reject combination.
  
! 2020-01-31  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
! 	(find_inv_vars_cb): Likewise.
  
! 2020-01-31  David Malcolm  <dmalcolm@redhat.com>
  
! 	* calls.c (special_function_p): Split out the check for DECL_NAME
! 	being non-NULL and fndecl being extern at file scope into a
! 	new maybe_special_function_p and call it.  Drop check for fndecl
! 	being non-NULL that was after a usage of DECL_NAME (fndecl).
! 	* tree.h (maybe_special_function_p): New inline function.
  
! 2020-01-30  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
! 	(mask_gather_load<mode>): ... here, and zero-initialize the
! 	destination.
! 	(maskload<mode>di): Zero-initialize the destination.
! 	* config/gcn/gcn.c:
  
! 2020-01-30  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR analyzer/93356
! 	* doc/analyzer.texi (Limitations): Note that constraints on
! 	floating-point values are currently ignored.
  
! 2020-01-30  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR lto/93384
! 	* symtab.c (symtab_node::noninterposable_alias): If localalias
! 	already exists, but is not usable, append numbers after it until
! 	a unique name is found.  Formatting fix.
  
! 	PR middle-end/93505
! 	* combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
! 	rotate counts.
  
! 2020-01-30  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn.c (print_operand): Handle LTGT.
! 	* config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
  
! 2020-01-30  Richard Biener  <rguenther@suse.de>
  
! 	* tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
! 	and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
  
! 2020-01-30  John David Anglin  <danglin@gcc.gnu.org>
  
! 	* config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
! 	without a DECL in .data.rel.ro.local.
  
! 2020-01-30  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93494
! 	* config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
! 	returned.
  
! 	PR target/91824
! 	* config/i386/sse.md
! 	(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
! 	(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this.  Use
! 	any_extend code iterator instead of always zero_extend.
! 	(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
! 	(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
! 	Use any_extend code iterator instead of always zero_extend.
! 	(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
! 	(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
! 	Use any_extend code iterator instead of always zero_extend.
! 	(*sse2_pmovmskb_ext): New define_insn.
! 	(*sse2_pmovmskb_ext_lt): New define_insn_and_split.
  
! 	PR target/91824
! 	* config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
! 	(*popcountsi2_zext_falsedep): New define_insn.
  
! 2020-01-30  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
  
! 	* config.in: Regenerated.
! 	* configure: Regenerated.
  
! 2020-01-29  Tobias Burnus  <tobias@codesourcery.com>
  
! 	PR bootstrap/93409
! 	* config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
! 	LLVM's assembler changed the default in version 9.
  
! 2020-01-24  Jeff Law  <law@redhat.com>
  
! 	PR tree-optimization/89689
! 	* builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
  
! 2020-01-29  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	Revert:
  
! 	2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/87763
! 	* simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
! 	simplification to handle subregs as well as bare regs.
! 	* config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
  
! 2020-01-29  Joel Hutton  <Joel.Hutton@arm.com>
  
! 	PR target/93221
! 	* ira.c (ira): Revert use of simplified LRA algorithm.
  
! 2020-01-29  Martin Jambor  <mjambor@suse.cz>
  
! 	PR tree-optimization/92706
! 	* tree-sra.c (struct access): Fields first_link, last_link,
! 	next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
! 	next_rhs_queued and grp_rhs_queued respectively, new fields
! 	first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
! 	(struct assign_link): Field next renamed to next_rhs, new field
! 	next_lhs.  Updated comment.
! 	(work_queue_head): Renamed to rhs_work_queue_head.
! 	(lhs_work_queue_head): New variable.
! 	(add_link_to_lhs): New function.
! 	(relink_to_new_repr): Also relink LHS lists.
! 	(add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
! 	(add_access_to_lhs_work_queue): New function.
! 	(pop_access_from_work_queue): Renamed to
! 	pop_access_from_rhs_work_queue.
! 	(pop_access_from_lhs_work_queue): New function.
! 	(build_accesses_from_assign): Also add links to LHS lists and to LHS
! 	work_queue.
! 	(child_would_conflict_in_lacc): Renamed to
! 	child_would_conflict_in_acc.  Adjusted parameter names.
! 	(create_artificial_child_access): New parameter set_grp_read, use it.
! 	(subtree_mark_written_and_enqueue): Renamed to
! 	subtree_mark_written_and_rhs_enqueue.
! 	(propagate_subaccesses_across_link): Renamed to
! 	propagate_subaccesses_from_rhs.
! 	(propagate_subaccesses_from_lhs): New function.
! 	(propagate_all_subaccesses): Also propagate subaccesses from LHSs to
! 	RHSs.
  
! 2020-01-29  Martin Jambor  <mjambor@suse.cz>
  
! 	PR tree-optimization/92706
! 	* tree-sra.c (struct access): Adjust comment of
! 	grp_total_scalarization.
! 	(find_access_in_subtree): Look for single children spanning an entire
! 	access.
! 	(scalarizable_type_p): Allow register accesses, adjust callers.
! 	(completely_scalarize): Remove function.
! 	(scalarize_elem): Likewise.
! 	(create_total_scalarization_access): Likewise.
! 	(sort_and_splice_var_accesses): Do not track total scalarization
! 	flags.
! 	(analyze_access_subtree): New parameter totally, adjust to new meaning
! 	of grp_total_scalarization.
! 	(analyze_access_trees): Pass new parameter to analyze_access_subtree.
! 	(can_totally_scalarize_forest_p): New function.
! 	(create_total_scalarization_access): Likewise.
! 	(create_total_access_and_reshape): Likewise.
! 	(total_should_skip_creating_access): Likewise.
! 	(totally_scalarize_subtree): Likewise.
! 	(analyze_all_variable_accesses): Perform total scalarization after
! 	subaccess propagation using the new functions above.
! 	(initialize_constant_pool_replacements): Output initializers by
! 	traversing the access tree.
  
! 2020-01-29  Martin Jambor  <mjambor@suse.cz>
  
! 	* tree-sra.c (verify_sra_access_forest): New function.
! 	(verify_all_sra_access_forests): Likewise.
! 	(create_artificial_child_access): Set parent.
! 	(analyze_all_variable_accesses): Call the verifier.
  
! 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
! 	if called on indirect edge.
! 	(cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
! 	speculative call if needed.
  
! 2020-01-29  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93428
! 	* tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
! 	permutation when the load node is created.
! 	(vect_analyze_slp_instance): Re-use it here.
  
! 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
  
! 2020-01-28  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR rtl-optimization/93272
! 	* ira-lives.c (process_out_of_region_eh_regs): New function.
! 	(process_bb_node_lives): Call it.
  
! 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* coverage.c (read_counts_file): Make error message lowercase.
  
! 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* profile-count.c (profile_quality_display_names): Fix ordering.
  
! 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR lto/93318	
! 	* cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
! 	hash only when edge is first within the sequence.
! 	(cgraph_edge::set_call_stmt): Update handling of speculative calls.
! 	(symbol_table::create_edge): Do not set target_prob.
! 	(cgraph_edge::remove_caller): Watch for speculative calls when updating
! 	the call site hash.
! 	(cgraph_edge::make_speculative): Drop target_prob parameter.
! 	(cgraph_edge::speculative_call_info): Remove.
! 	(cgraph_edge::first_speculative_call_target): New member function.
! 	(update_call_stmt_hash_for_removing_direct_edge): New function.
! 	(cgraph_edge::resolve_speculation): Rewrite to new API.
! 	(cgraph_edge::speculative_call_for_target): New member function.
! 	(cgraph_edge::make_direct): Rewrite to new API; fix handling of
! 	multiple speculation targets.
! 	(cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
! 	of profile.
! 	(verify_speculative_call): Verify that targets form an interval.
! 	* cgraph.h (cgraph_edge::speculative_call_info): Remove.
! 	(cgraph_edge::first_speculative_call_target): New member function.
! 	(cgraph_edge::next_speculative_call_target): New member function.
! 	(cgraph_edge::speculative_call_target_ref): New member function.
! 	(cgraph_edge;:speculative_call_indirect_edge): New member funtion.
! 	(cgraph_edge): Remove target_prob.
! 	* cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
! 	Fix handling of speculative calls.
! 	* ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
! 	* ipa-fnsummary.c (analyze_function_body): Likewise.
! 	* ipa-inline.c (speculation_useful_p): Use new speculative call API.
! 	* ipa-profile.c (dump_histogram): Fix formating.
! 	(ipa_profile_generate_summary): Watch for overflows.
! 	(ipa_profile): Do not require probablity to be 1/2; update to new API.
! 	* ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
! 	(update_indirect_edges_after_inlining): Update to new API.
! 	* ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
! 	profiles.
! 	* profile-count.h: (profile_probability::adjusted): New.
! 	* tree-inline.c (copy_bb): Update to new speculative call API; fix
! 	updating of profile.
! 	* value-prof.c (gimple_ic_transform): Rename to ...
! 	(dump_ic_profile): ... this one; update dumping.
! 	(stream_in_histogram_value): Fix formating.
! 	(gimple_value_profile_transformations): Update.
  
! 2020-01-28  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/91461
! 	* config/i386/i386.md (*movoi_internal_avx): Remove
! 	TARGET_SSE_TYPELESS_STORES check.
! 	(*movti_internal): Prefer TARGET_AVX over
! 	TARGET_SSE_TYPELESS_STORES.
! 	(*movtf_internal): Likewise.
! 	* config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
! 	TARGET_SSE_TYPELESS_STORES.  Remove "<MODE_SIZE> == 16" check
! 	from TARGET_SSE_TYPELESS_STORES.
  
! 2020-01-28  David Malcolm  <dmalcolm@redhat.com>
  
! 	* diagnostic-core.h (warning_at): Rename overload to...
! 	(warning_meta): ...this.
! 	(emit_diagnostic_valist): Delete decl of overload taking
! 	diagnostic_metadata.
! 	* diagnostic.c (emit_diagnostic_valist): Likewise for defn.
! 	(warning_at): Rename overload taking diagnostic_metadata to...
! 	(warning_meta): ...this.
  
! 2020-01-28  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93439
! 	* tree-parloops.c (create_loop_fn): Move clique bookkeeping...
! 	* tree-cfg.c (move_sese_region_to_fn): ... here.
! 	(verify_types_in_gimple_reference): Verify used cliques are
! 	tracked.
  
! 2020-01-28  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/91399
! 	* config/i386/i386-options.c (set_ix86_tune_features): Add an
! 	argument of a pointer to struct gcc_options and pass it to
! 	parse_mtune_ctrl_str.
! 	(ix86_function_specific_restore): Pass opts to
! 	set_ix86_tune_features.
! 	(ix86_option_override_internal): Likewise.
! 	(parse_mtune_ctrl_str): Add an argument of a pointer to struct
! 	gcc_options and use it for x_ix86_tune_ctrl_string.
  
! 2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/87763
! 	* simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
! 	simplification to handle subregs as well as bare regs.
! 	* config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
  
! 2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* tree-vect-loop.c (vectorizable_reduction): Fail gracefully
! 	for reduction chains that (now) include a call.
  
! 2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/92822
! 	* tree-ssa-forwprop.c (simplify_vector_constructor): When filling
! 	out the don't-care elements of a vector whose significant elements
! 	are duplicates, make the don't-care elements duplicates too.
  
! 2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/93434
! 	* tree-predcom.c (split_data_refs_to_components): Record which
! 	components have had aliasing loads removed.  Prevent store-store
! 	commoning for all such components.
  
! 2020-01-28  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93418
! 	* config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
! 	-1 or is_vshift is true, use new_vector with number of elts npatterns
! 	rather than new_unary_operation.
  
! 	PR tree-optimization/93454
! 	* gimple-fold.c (fold_array_ctor_reference): Perform
! 	elt_size.to_uhwi () just once, instead of calling it in every
! 	iteration.  Punt if that value is above size of the temporary
! 	buffer.  Decrease third native_encode_expr argument when
! 	bufoff + elt_sz is above size of buf.
  
! 2020-01-27  Joseph Myers  <joseph@codesourcery.com>
  
! 	* config/mips/mips.c (mips_declare_object_name)
! 	[USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
  
! 2020-01-27  Martin Liska  <mliska@suse.cz>
  
! 	PR gcov-profile/93403
! 	* tree-profile.c (gimple_init_gcov_profiler): Generate
! 	both __gcov_indirect_call_profiler_v4 and
! 	__gcov_indirect_call_profiler_v4_atomic.
  
! 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR target/92822
! 	* config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
! 	expander.
! 	(@aarch64_split_simd_mov<mode>): Use it.
! 	(aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
! 	Leave the vec_extract patterns to handle 2-element vectors.
! 	(aarch64_simd_mov_from_<mode>high): Likewise.
! 	(vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
! 	(vec_extractv2dfv1df): Likewise.
  
! 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
! 	jump conditions for *compare_condjump<GPI:mode>.
  
! 2020-01-27  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR analyzer/93276
! 	* digraph.cc (test_edge::test_edge): Specify template for base
! 	class initializer.
  
! 2020-01-27  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
  
! 2020-01-27  Claudiu Zissulescu  <claziss@synopsys.com>
  
! 	* config/arc/arc-protos.h (gen_mlo): Remove.
! 	(gen_mhi): Likewise.
! 	* config/arc/arc.c (AUX_MULHI): Define.
! 	(arc_must_save_reister): Special handling for r58/59.
! 	(arc_compute_frame_size): Consider mlo/mhi registers.
! 	(arc_save_callee_saves): Emit fp/sp move only when emit_move
! 	paramter is true.
! 	(arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
! 	mlo/mhi name selection.
! 	(arc_restore_callee_saves): Don't early restore blink when ISR.
! 	(arc_expand_prologue): Add mlo/mhi saving.
! 	(arc_expand_epilogue): Add mlo/mhi restoring.
! 	(gen_mlo): Remove.
! 	(gen_mhi): Remove.
! 	* config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
! 	numbering when MUL64 option is used.
! 	(DWARF2_FRAME_REG_OUT): Define.
! 	* config/arc/arc.md (arc600_stall): New pattern.
! 	(VUNSPEC_ARC_ARC600_STALL): Define.
! 	(mulsi64): Use correct mlo/mhi registers.
! 	(mulsi_600): Clean it up.
! 	* config/arc/predicates.md (mlo_operand): Remove any dependency on
! 	TARGET_BIG_ENDIAN.
! 	(mhi_operand): Likewise.
  
! 2020-01-27  Claudiu Zissulescu  <claziss@synopsys.com>
! 	    Petro Karashchenko  <petro.karashchenko@ring.com>
  
! 	* config/arc/arc.c (arc_is_uncached_mem_p): Check struct
! 	attributes if needed.
! 	(prepare_move_operands): Generate special unspec instruction for
! 	direct access.
! 	(arc_isuncached_mem_p): Propagate uncached attribute to each
! 	structure member.
! 	* config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
! 	(VUNSPEC_ARC_STDI): Likewise.
! 	(ALLI): New mode iterator.
! 	(mALLI): New mode attribute.
! 	(lddi): New instruction pattern.
! 	(stdi): Likewise.
! 	(stdidi_split): Split instruction for architectures which are not
! 	supporting ll64 option.
! 	(lddidi_split): Likewise.
  
! 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/92989
! 	* lra-lives.c (process_bb_lives): Update the live-in set before
! 	processing additional clobbers.
  
! 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/93170
! 	* cselib.c (cselib_invalidate_regno_val): New function, split out
! 	from...
! 	(cselib_invalidate_regno): ...here.
! 	(cselib_invalidated_by_call_p): New function.
! 	(cselib_process_insn): Iterate over all the hard-register entries in
! 	REG_VALUES and invalidate any that cross call-clobbered registers.
  
! 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* dojump.c (split_comparison): Use HONOR_NANS rather than
! 	HONOR_SNANS when splitting LTGT.
  
! 2020-01-27  Martin Liska  <mliska@suse.cz>
  
! 	PR driver/91220
! 	* opts.c (print_filtered_help): Exclude language-specific
! 	options from --help=common unless enabled in all FEs.
  
! 2020-01-27  Martin Liska  <mliska@suse.cz>
  
! 	* opts.c (print_help): Exclude params from
! 	all except --help=param.
  
! 2020-01-27  Martin Liska  <mliska@suse.cz>
  
! 	PR target/93274
! 	* config/i386/i386-features.c (make_resolver_func):
! 	Align the code with ppc64 target implementation.
! 	Do not generate a unique name for resolver function.
  
! 2020-01-27  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93397
! 	* tree-vect-slp.c (vect_analyze_slp_instance): Delay
! 	converted reduction chain SLP graph adjustment.
  
! 2020-01-26  Marek Polacek  <polacek@redhat.com>
  
! 	PR sanitizer/93436
! 	* sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
! 	null DECL_NAME.
  
! 2020-01-26  Jason Merrill  <jason@redhat.com>
  
! 	PR c++/92601
! 	* tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
! 	of complete types.
  
! 2020-01-26  Darius Galis  <darius.galis@cyberthorstudios.com>
  
! 	* config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
! 	(rx_setmem): Likewise.
  
! 2020-01-26  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93412
! 	* config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
! 	Use nonimmediate_operand instead of x86_64_hilo_general_operand and
! 	drop <di> from constraint of last operand.
  
! 	PR target/93430
! 	* config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
! 	TARGET_AVX2 and V4DFmode not in the split condition, but in the
! 	pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
  
! 2020-01-25  Feng Xue  <fxue@os.amperecomputing.com>
  
! 	PR ipa/93166
! 	* ipa-cp.c (get_info_about_necessary_edges): Remove value
! 	check assertion.
  
! 2020-01-24  Jeff Law  <law@redhat.com>
  
! 	PR tree-optimization/92788
! 	* tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
! 	not EDGE_ABNORMAL.
  
! 2020-01-24  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93395
! 	* config/i386/sse.md (*avx_vperm_broadcast_v4sf,
! 	*avx_vperm_broadcast_<mode>,
! 	<sse2_avx_avx512f>_vpermil<mode><mask_name>,
! 	*<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
! 	Move before avx2_perm<mode>/avx512f_perm<mode>.
  
! 	PR target/93376
! 	* simplify-rtx.c (simplify_const_unary_operation,
! 	simplify_const_binary_operation): Punt for mode precision above
! 	MAX_BITSIZE_MODE_ANY_INT.
  
! 2020-01-24  Andrew Pinski  <apinski@marvell.com>
  
! 	* config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
! 	alu.shift_reg to 0.
  
! 2020-01-24  Jeff Law  <law@redhat.com>
  
! 	PR target/13721
! 	* config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
! 	for REGs.  Call output_operand_lossage to get more reasonable
! 	diagnostics.
  
! 2020-01-24  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
! 	gcn_fp_compare_operator.
! 	(vec_cmpu<mode>di): Use gcn_compare_operator.
! 	(vec_cmp<u>v64qidi): Use gcn_compare_operator.
! 	(vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
! 	(vec_cmpu<mode>di_exec): Use gcn_compare_operator.
! 	(vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
! 	(vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
! 	(vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
! 	(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
! 	gcn_fp_compare_operator.
! 	(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
! 	gcn_fp_compare_operator.
! 	(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
! 	gcn_fp_compare_operator.
! 	(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
! 	gcn_fp_compare_operator.
  
! 2020-01-24  Maciej W. Rozycki  <macro@wdc.com>
  
! 	* doc/install.texi (Cross-Compiler-Specific Options): Document
! 	`--with-toolexeclibdir' option.
  
! 2020-01-24  Hans-Peter Nilsson  <hp@axis.com>
  
! 	* target.def (flags_regnum): Also mention effect on delay slot filling.
! 	* doc/tm.texi: Regenerate.
  
! 2020-01-23  Jeff Law  <law@redhat.com>
  
! 	PR translation/90162
! 	* config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
  
! 2020-01-23  Mikael Tillenius  <mti-1@tillenius.com>
  
! 	PR target/92269
! 	* config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
! 	profiling label
  
! 2020-01-23  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR rtl-optimization/93402
! 	* postreload.c (reload_combine_recognize_pattern): Don't try to adjust
! 	USE insns.
  
! 2020-01-23  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
  
! 	* config.in: Regenerated.
! 	* config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
! 	for TARGET_LIBC_GNUSTACK.
! 	* configure: Regenerated.
! 	* configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
! 	found to be 2.31 or greater.
  
! 2020-01-23  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
  
! 	* config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
! 	TARGET_SOFT_FLOAT.
! 	* config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
! 	(mips_asm_file_end): New function. Delegate to
! 	file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
! 	* config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
  
! 2020-01-23  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93376
! 	* config/i386/i386-modes.def (POImode): New mode.
! 	(MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
! 	* config/i386/i386.md (DPWI): New mode attribute.
! 	(addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
! 	(QWI): Rename to...
! 	(QPWI): ... this.  Use POI instead of OI for TImode.
! 	(*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
! 	*subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
! 	instead of <QWI>.
  
! 2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR target/93341
! 	* config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
! 	unspec.
! 	(speculation_tracker_rev): New pattern.
! 	* config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
! 	Use speculation_tracker_rev to track the inverse condition.
  
! 2020-01-23  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93381
! 	* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
! 	alias-set of the def as argument and record the first one.
! 	(vn_walk_cb_data::first_set): New member.
! 	(vn_reference_lookup_3): Pass the alias-set of the current def
! 	to push_partial_def.  Fix alias-set used in the aggregate copy
! 	case.
! 	(vn_reference_lookup): Consistently set *last_vuse_ptr.
! 	* real.c (clear_significand_below): Fix out-of-bound access.
  
! 2020-01-23  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93346
! 	* config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
! 	New define_insn patterns.
  
! 2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* doc/sourcebuild.texi (check-function-bodies): Add an
! 	optional target/xfail selector.
  
! 2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR rtl-optimization/93124
! 	* auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
! 	bare USE and CLOBBER insns.
  
! 2020-01-22  Andrew Pinski  <apinski@marvell.com>
  
! 	* config/arc/arc.c (output_short_suffix): Check insn for nullness.
  
! 2020-01-22  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR analyzer/93307
! 	* gdbinit.in (break-on-saved-diagnostic): Update for move of
! 	diagnostic_manager into "ana" namespace.
! 	* selftest-run-tests.c (selftest::run_tests): Update for move of
! 	selftest::run_analyzer_selftests to
! 	ana::selftest::run_analyzer_selftests.
  
! 2020-01-22  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* cfgexpand.c (union_stack_vars): Update the size.
  
! 2020-01-22  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93381
! 	* tree-ssa-structalias.c (find_func_aliases): Assume offsetting
! 	throughout, handle all conversions the same.
  
! 2020-01-22  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93335
! 	* config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
! 	gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
! 	predicate, not whenever it is CONST_INT.  Otherwise, force_reg it.
! 	Call force_reg on high_in2 unconditionally.
  
! 2020-01-22  Martin Liska  <mliska@suse.cz>
  
! 	PR tree-optimization/92924
! 	* profile.c (compute_value_histograms): Divide
! 	all counter values.
  
! 2020-01-22  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/91298
! 	* output.h (assemble_name_resolve): Declare.
! 	* varasm.c (assemble_name_resolve): New function.
! 	(assemble_name): Use it.
! 	* config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
  
! 2020-01-22  Joseph Myers  <joseph@codesourcery.com>
  
! 	* doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
! 	update_web_docs_git instead of update_web_docs_svn.
  
! 2020-01-21  Andrew Pinski  <apinski@marvell.com>
  
! 	PR target/9311
! 	* config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
! 	as PTR mode. Have operand 1 as being modeless, it can be P mode.
! 	(*tlsgd_small_<mode>): Likewise.
! 	* config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
! 	<case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
! 	register.  Convert that register back to dest using convert_mode.
  
! 2020-01-21  Jim Wilson  <jimw@sifive.com>
  
! 	* config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
! 	instead of XINT.
  
! 2020-01-21  H.J. Lu  <hongjiu.lu@intel.com>
! 	    Uros Bizjak    <ubizjak@gmail.com>
  
! 	PR target/93319
! 	* config/i386/i386.c (ix86_tls_module_base): Replace Pmode
! 	with ptr_mode.
! 	(legitimize_tls_address): Do GNU2 TLS address computation in
! 	ptr_mode and zero-extend result to Pmode.
! 	*  config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
! 	:P with :PTR and Pmode with ptr_mode.
! 	(*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
! 	(*tls_dynamic_gnu2_call_64_<mode>): Likewise.
! 	(*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
  
! 2020-01-21  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93333
! 	* config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
! 	the last two operands are CONST_INT_P before using them as such.
  
! 2020-01-21  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
! 	to get the integer element types.
  
! 2020-01-21  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64-sve-builtins.h
! 	(function_expander::convert_to_pmode): Declare.
! 	* config/aarch64/aarch64-sve-builtins.cc
! 	(function_expander::convert_to_pmode): New function.
! 	(function_expander::get_contiguous_base): Use it.
! 	(function_expander::prepare_gather_address_operands): Likewise.
! 	* config/aarch64/aarch64-sve-builtins-sve2.cc
! 	(svwhilerw_svwhilewr_impl::expand): Likewise.
  
! 2020-01-21  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  
! 	PR target/92424
! 	* config/aarch64/aarch64.c (aarch64_declare_function_name): Set
! 	cfun->machine->label_is_assembled.
! 	(aarch64_print_patchable_function_entry): New.
! 	(TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
! 	* config/aarch64/aarch64.h (struct machine_function): New field,
! 	label_is_assembled.
  
! 2020-01-21  David Malcolm  <dmalcolm@redhat.com>
  
! 	PR ipa/93315
! 	* ipa-profile.c (ipa_profile): Delete call_sums and set it to
! 	NULL on exit.
  
! 2020-01-18  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR lto/93318	
! 	* cgraph.c (cgraph_edge::resolve_speculation,
! 	cgraph_edge::redirect_call_stmt_to_callee): Fix update of
! 	call_stmt_site_hash.
  
! 2020-01-21  Martin Liska  <mliska@suse.cz>
  
! 	* config/rs6000/rs6000.c (common_mode_defined): Remove
! 	unused variable.
  
! 2020-01-21  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/92328
! 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
! 	type when value-numbering same-sized store by inserting a
! 	VIEW_CONVERT_EXPR.
! 	(eliminate_dom_walker::eliminate_stmt): When eliminating
! 	a redundant store handle bit-reinterpretation of the same value.
  
! 2020-01-21  Andrew Pinski  <apinski@marvel.com>
  
! 	PR tree-opt/93321
! 	* tree-into-ssa.c (prepare_block_for_update_1): Split out
! 	from ...
! 	(prepare_block_for_update): This.  Use a worklist instead of
! 	recursing.
  
! 2020-01-21  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
  
! 	* gcc/config/arm/arm.c (clear_operation_p):
! 	Initialise last_regno, skip first iteration
! 	based on the first_set value and use ints instead
! 	of the unnecessary HOST_WIDE_INTs.
  
! 2020-01-21  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93073
! 	* config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
! 	compare_mode other than SFmode or DFmode.
  
! 2020-01-21  Kito Cheng  <kito.cheng@sifive.com>
  
! 	PR target/93304
! 	* config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
! 	* config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
! 	* config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
  
! 2020-01-20  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	* config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
  
! 2020-01-20  Andrew Pinski  <apinski@marvell.com>
  
! 	PR middle-end/93242
! 	* targhooks.c (default_print_patchable_function_entry): Use
! 	output_asm_insn to emit the nop instruction.
  
! 2020-01-20  Fangrui Song  <maskray@google.com>
  
! 	PR middle-end/93194
! 	* targhooks.c (default_print_patchable_function_entry): Align to
! 	POINTER_SIZE.
  
! 2020-01-20  H.J. Lu  <hongjiu.lu@intel.com>
  
! 	PR target/93319
! 	* config/i386/i386.c (legitimize_tls_address): Pass Pmode to
! 	gen_tls_dynamic_gnu2_64.  Compute GNU2 TLS address in ptr_mode.
! 	* config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
! 	(@tls_dynamic_gnu2_64_<mode>): This.  Replace DI with P.
! 	(*tls_dynamic_gnu2_lea_64): Renamed to ...
! 	(*tls_dynamic_gnu2_lea_64_<mode>): This.  Replace DI with P.
! 	Remove the {q} suffix from lea.
! 	(*tls_dynamic_gnu2_call_64): Renamed to ...
! 	(*tls_dynamic_gnu2_call_64_<mode>): This.  Replace DI with P.
! 	(*tls_dynamic_gnu2_combine_64): Renamed to ...
! 	(*tls_dynamic_gnu2_combine_64_<mode>): This.  Replace DI with P.
! 	Pass Pmode to gen_tls_dynamic_gnu2_64.
  
! 2020-01-20  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	* config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
  
! 2020-01-20  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64-sve-builtins-base.cc
! 	(svld1ro_impl::memory_vector_mode): Remove parameter name.
  
! 2020-01-20  Richard Biener  <rguenther@suse.de>
  
! 	PR debug/92763
! 	* dwarf2out.c (prune_unused_types): Unconditionally mark
! 	called function DIEs.
  
! 2020-01-20  Martin Liska  <mliska@suse.cz>
  
! 	PR tree-optimization/93199
! 	* tree-eh.c (struct leh_state): Add
! 	new field outer_non_cleanup.
! 	(cleanup_is_dead_in): Pass leh_state instead
! 	of eh_region.  Add a checking that state->outer_non_cleanup
! 	points to outer non-clean up region.
! 	(lower_try_finally): Record outer_non_cleanup
! 	for this_state.
! 	(lower_catch): Likewise.
! 	(lower_eh_filter): Likewise.
! 	(lower_eh_must_not_throw): Likewise.
! 	(lower_cleanup): Likewise.
  
! 2020-01-20  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93094
! 	* tree-vectorizer.h (vect_loop_versioning): Adjust.
! 	(vect_transform_loop): Likewise.
! 	* tree-vectorizer.c (try_vectorize_loop_1): Pass down
! 	loop_vectorized_call to vect_transform_loop.
! 	* tree-vect-loop.c (vect_transform_loop): Pass down
! 	loop_vectorized_call to vect_loop_versioning.
! 	* tree-vect-loop-manip.c (vect_loop_versioning): Use
! 	the earlier discovered loop_vectorized_call.
  
! 2020-01-19  Eric S. Raymond <esr@thyrsus.com>
  
! 	* doc/contribute.texi: Update for SVN -> Git transition.
! 	* doc/install.texi: Likewise.
  
! 2020-01-18  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR lto/93318
! 	* cgraph.c (cgraph_edge::make_speculative): Increase number of
! 	speculative targets.
! 	(verify_speculative_call): New function
! 	(cgraph_node::verify_node): Use it.
! 	* ipa-profile.c (ipa_profile): Fix formating; do not set number of
! 	speculations.
  
! 2020-01-18  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR lto/93318
! 	* cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
! 	(cgraph_edge::make_direct): Remove all indirect targets.
! 	(cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
! 	(cgraph_node::verify_node): Verify that only one call_stmt or
! 	lto_stmt_uid is set.
! 	* cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
! 	lto_stmt_uid.
! 	* lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
! 	(lto_output_ref): Simplify streaming of stmt.
! 	* lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
  
! 2020-01-18  Tamar Christina  <tamar.christina@arm.com>
  
! 	* config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
! 	Mark parameter unused.
  
! 2020-01-18  Hans-Peter Nilsson  <hp@axis.com>
  
! 	* config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
  
! 2019-01-18  Gerald Pfeifer  <gerald@pfeifer.com>
  
! 	* varpool.c (ctor_useable_for_folding_p): Fix grammar.
  
! 2020-01-18  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	* Makefile.in: Add coroutine-passes.o.
! 	* builtin-types.def (BT_CONST_SIZE): New.
! 	(BT_FN_BOOL_PTR): New.
! 	(BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
! 	* builtins.def (DEF_COROUTINE_BUILTIN): New.
! 	* coroutine-builtins.def: New file.
! 	* coroutine-passes.cc: New file.
! 	* function.h (struct GTY function): Add a bit to indicate that the
! 	function is a coroutine component.
! 	* internal-fn.c (expand_CO_FRAME): New.
! 	(expand_CO_YIELD): New.
! 	(expand_CO_SUSPN): New.
! 	(expand_CO_ACTOR): New.
! 	* internal-fn.def (CO_ACTOR): New.
! 	(CO_YIELD): New.
! 	(CO_SUSPN): New.
! 	(CO_FRAME): New.
! 	* passes.def: Add pass_coroutine_lower_builtins,
! 	pass_coroutine_early_expand_ifns.
! 	* tree-pass.h (make_pass_coroutine_lower_builtins): New.
! 	(make_pass_coroutine_early_expand_ifns): New.
! 	* doc/invoke.texi: Document the fcoroutines command line
! 	switch.
  
! 2020-01-18  Jakub Jelinek  <jakub@redhat.com>
  
! 	* config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
  
! 	PR target/93312
! 	* config/arm/arm.c (clear_operation_p): Don't use REGNO until
! 	after checking the argument is a REG.  Don't use REGNO (reg)
! 	again to set last_regno, reuse regno variable instead.
  
! 2020-01-17  David Malcolm  <dmalcolm@redhat.com>
  
! 	* doc/analyzer.texi (Limitations): Add note about NaN.
  
! 2020-01-17  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
! 	    Sudakshina Das  <sudi.das@arm.com>
  
! 	* config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
! 	and valid immediate.
! 	(ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
! 	(lshrdi3): Generate thumb2_lsrl for valid immediates.
! 	* config/arm/constraints.md (Pg): New.
! 	* config/arm/predicates.md (long_shift_imm): New.
! 	(arm_reg_or_long_shift_imm): Likewise.
! 	* config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
! 	(thumb2_lsll): Likewise.
! 	(thumb2_lsrl): New.
  
! 2020-01-17  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
! 	    Sudakshina Das  <sudi.das@arm.com>
  
! 	* config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
! 	(ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
! 	* config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
! 	register pairs for doubleword quantities for ARMv8.1M-Mainline.
! 	* config/arm/thumb2.md (thumb2_asrl): New.
! 	(thumb2_lsll): Likewise.
  
! 2020-01-17  Jakub Jelinek  <jakub@redhat.com>
  
! 	* config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
! 	unused variable.
  
! 2020-01-17  Alexander Monakov  <amonakov@ispras.ru>
  
! 	* gdbinit.in (help-gcc-hooks): New command.
! 	(pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
! 	pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
! 	documentation.
  
! 2020-01-17  Matthew Malcomson  <matthew.malcomson@arm.com>
  
! 	* config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
! 	correct target macro.
  
! 2020-01-17  Matthew Malcomson  <matthew.malcomson@arm.com>
  
! 	* config/aarch64/aarch64-protos.h
! 	(aarch64_sve_ld1ro_operand_p): New.
! 	* config/aarch64/aarch64-sve-builtins-base.cc
! 	(class load_replicate): New.
! 	(class svld1ro_impl): New.
! 	(class svld1rq_impl): Change to inherit from load_replicate.
! 	(svld1ro): New sve intrinsic function base.
! 	* config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
! 	New DEF_SVE_FUNCTION.
! 	* config/aarch64/aarch64-sve-builtins-base.h
! 	(svld1ro): New decl.
! 	* config/aarch64/aarch64-sve-builtins.cc
! 	(function_expander::add_mem_operand): Modify assert to allow
! 	OImode.
! 	* config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
! 	pattern.
! 	* config/aarch64/aarch64.c
! 	(aarch64_sve_ld1rq_operand_p): Implement in terms of ...
! 	(aarch64_sve_ld1rq_ld1ro_operand_p): This.
! 	(aarch64_sve_ld1ro_operand_p): New.
! 	* config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
! 	* config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
! 	* config/aarch64/predicates.md
! 	(aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
  
! 2020-01-17  Matthew Malcomson  <matthew.malcomson@arm.com>
  
! 	* config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
! 	Introduce this ACLE specified predefined macro.
! 	* config/aarch64/aarch64-option-extensions.def (f64mm): New.
! 	(fp): Disabling this disables f64mm.
! 	(simd): Disabling this disables f64mm.
! 	(fp16): Disabling this disables f64mm.
! 	(sve): Disabling this disables f64mm.
! 	* config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
! 	(AARCH64_ISA_F64MM): New.
! 	(TARGET_F64MM): New.
! 	* doc/invoke.texi (f64mm): Document new option.
  
! 2020-01-17  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	* config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
! 	(neoversen1_tunings): Likewise.
  
! 2020-01-17  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	PR target/92692
! 	* config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
! 	Add assert to ensure prolog has been emitted.
! 	(aarch64_split_atomic_op): Likewise.
! 	* config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
! 	Use epilogue_completed rather than reload_completed.
! 	(aarch64_atomic_exchange<mode>): Likewise.
! 	(aarch64_atomic_<atomic_optab><mode>): Likewise.
! 	(atomic_nand<mode>): Likewise.
! 	(aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
! 	(atomic_fetch_nand<mode>): Likewise.
! 	(aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
! 	(atomic_nand_fetch<mode>): Likewise.
  
! 2020-01-17  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR target/93133
! 	* config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
! 	for FP modes.
! 	(REVERSE_CONDITION): Delete.
! 	* config/aarch64/iterators.md (CC_ONLY): New mode iterator.
! 	(CCFP_CCFPE): Likewise.
! 	(e): New mode attribute.
! 	* config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
! 	(@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
! 	(fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
! 	(@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
! 	(@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
! 	(@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
! 	* config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
! 	name of generator from gen_ccmpdi to gen_ccmpccdi.
! 	(aarch64_gen_ccmp_next): Use code_for_ccmp.  If we want to reverse
! 	the previous comparison but aren't able to, use the new ccmp_rev
! 	patterns instead.
  
! 2020-01-17  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
! 	than testing directly for INTEGER_CST.
! 	(gimplify_target_expr, gimplify_omp_depend): Likewise.
  
! 2020-01-17  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/93292
! 	* tree-vect-stmts.c (vectorizable_comparison): Punt also if
! 	get_vectype_for_scalar_type returns NULL.
  
! 2020-01-16  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* params.opt (-param=max-predicted-iterations): Increase range from 0.
! 	* predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
  
! 2020-01-16  Jan Hubicka  <hubicka@ucw.cz>
  
! 	* ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
! 	dump.
! 	* params.opt: (max-predicted-iterations): Set bounds.
! 	* predict.c (real_almost_one, real_br_prob_base,
! 	real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
! 	(propagate_freq): Add max_cyclic_prob parameter; cap cyclic
! 	probabilities; do not truncate to reg_br_prob_bases.
! 	(estimate_loops_at_level): Pass max_cyclic_prob.
! 	(estimate_loops): Compute max_cyclic_prob.
! 	(estimate_bb_frequencies): Do not initialize real_*; update calculation
! 	of back edge prob.
! 	* profile-count.c (profile_probability::to_sreal): New.
! 	* profile-count.h (class sreal): Move up in file.
! 	(profile_probability::to_sreal): Declare.
  
! 2020-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
  
! 	* config/arm/arm.c
! 	(arm_invalid_conversion): New function for target hook.
! 	(arm_invalid_unary_op): New function for target hook.
! 	(arm_invalid_binary_op): New function for target hook.
  
! 2020-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
  
! 	* config.gcc: Add arm_bf16.h.
! 	* config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
! 	(arm_simd_builtin_std_type): Add BFmode.
! 	(arm_init_simd_builtin_types): Define element types for vector types.
! 	(arm_init_bf16_types): New function.
! 	(arm_init_builtins): Add arm_init_bf16_types function call.
! 	* config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
! 	* config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
! 	* config/arm/arm.c (aapcs_vfp_sub_candidate):  Add BFmode.
! 	(arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
! 	(arm_vector_mode_supported_p): Add V4BF, V8BF.
! 	(arm_mangle_type):  Add __bf16.
! 	* config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE, 
! 	VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
! 	arm_bf16_ptr_type_node.
! 	* config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
! 	define_split between ARM registers.
! 	* config/arm/arm_bf16.h: New file.
! 	* config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
! 	* config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
! 	(VQXMOV): Add V8BF.
! 	* config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
! 	* config/arm/vfp.md: Add BFmode to movhf patterns.
  
! 2020-01-16  Mihail Ionescu  <mihail.ionescu@arm.com>
! 	    Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* config/arm/arm-cpus.in (mve, mve_float): New features.
! 	(dsp, mve, mve.fp): New options.
! 	* config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
! 	* config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
! 	* doc/invoke.texi: Document the armv8.1-m mve and dps options.
  
! 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
! 	    Thomas Preud'homme  <thomas.preudhomme@arm.com>
  
! 	* config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
! 	Armv8-M Mainline.
! 	* config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
! 	error for using -mcmse when targeting Armv8.1-M Mainline.
  
! 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
! 	    Thomas Preud'homme  <thomas.preudhomme@arm.com>
  
! 	* config/arm/arm.md (nonsecure_call_internal): Do not force memory
! 	address in r4 when targeting Armv8.1-M Mainline.
! 	(nonsecure_call_value_internal): Likewise.
! 	* config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
! 	a register match_operand again.  Emit BLXNS when targeting
! 	Armv8.1-M Mainline.
! 	(nonsecure_call_value_reg_thumb2): Likewise.
  
! 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
! 	    Thomas Preud'homme  <thomas.preudhomme@arm.com>
  
! 	* config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
! 	(cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
! 	variable as true when floating-point ABI is not hard.  Replace
! 	check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
! 	Generate VLSTM and VLLDM instruction respectively before and
! 	after a function call to cmse_nonsecure_call function.
! 	* config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
! 	(VUNSPEC_VLLDM): Likewise.
! 	* config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
! 	(lazy_load_multiple_insn): Likewise.
  
! 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
! 	    Thomas Preud'homme  <thomas.preudhomme@arm.com>
  
! 	* config/arm/arm.c (vfp_emit_fstmd): Declare early.
! 	(arm_emit_vfp_multi_reg_pop): Likewise.
! 	(cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
! 	registers to clear in max_fp_regno.  Emit VPUSH and VPOP to save and
! 	restore callee-saved VFP registers.
  
! 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
! 	    Thomas Preud'homme  <thomas.preudhomme@arm.com>
  
! 	* config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
! 	(cmse_nonsecure_call_clear_caller_saved): Rename into ...
! 	(cmse_nonsecure_call_inline_register_clear): This.  Save and clear
! 	callee-saved GPRs as well as clear ip register before doing a nonsecure
! 	call then restore callee-saved GPRs after it when targeting
! 	Armv8.1-M Mainline.
! 	(arm_reorg): Adapt to function rename.
  
! 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
! 	    Thomas Preud'homme  <thomas.preudhomme@arm.com>
  
! 	* config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
! 	* config/arm/arm.c (clear_operation_p): Extend to be able to check a
! 	clear_vfp_multiple pattern based on a new vfp parameter.
! 	(cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
! 	targeting Armv8.1-M Mainline.
! 	(cmse_nonsecure_entry_clear_before_return): Clear VFP registers
! 	unconditionally when targeting Armv8.1-M Mainline architecture.  Check
! 	whether VFP registers are available before looking call_used_regs for a
! 	VFP register.
! 	* config/arm/predicates.md (clear_multiple_operation): Adapt to change
! 	of prototype of clear_operation_p.
! 	(clear_vfp_multiple_operation): New predicate.
! 	* config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
! 	* config/arm/vfp.md (clear_vfp_multiple): New define_insn.
  
! 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
! 	    Thomas Preud'homme  <thomas.preudhomme@arm.com>
  
! 	* config/arm/arm-protos.h (clear_operation_p): Declare.
! 	* config/arm/arm.c (clear_operation_p): New function.
! 	(cmse_clear_registers): Generate clear_multiple instruction pattern if
! 	targeting Armv8.1-M Mainline or successor.
! 	(output_return_instruction): Only output APSR register clearing if
! 	Armv8.1-M Mainline instructions not available.
! 	(thumb_exit): Likewise.
! 	* config/arm/predicates.md (clear_multiple_operation): New predicate.
! 	* config/arm/thumb2.md (clear_apsr): New define_insn.
! 	(clear_multiple): Likewise.
! 	* config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
  
! 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
! 	    Thomas Preud'homme  <thomas.preudhomme@arm.com>
  
! 	* config/arm/arm.c (fp_sysreg_names): Declare and define.
! 	(use_return_insn): Also return false for Armv8.1-M Mainline.
! 	(output_return_instruction): Skip FPSCR clearing if Armv8.1-M
! 	Mainline instructions are available.
! 	(arm_compute_frame_layout): Allocate space in frame for FPCXTNS
! 	when targeting Armv8.1-M Mainline Security Extensions.
! 	(arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
! 	Mainline entry function.
! 	(cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
! 	targeting Armv8.1-M Mainline or successor.
! 	(arm_expand_epilogue): Fix indentation of caller-saved register
! 	clearing.  Restore FPCXTNS if this is an Armv8.1-M Mainline
! 	entry function.
! 	* config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
! 	(FP_SYSREGS): Likewise.
! 	(enum vfp_sysregs_encoding): Define enum.
! 	(fp_sysreg_names): Declare.
! 	* config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
! 	* config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
! 	(pop_fpsysreg_insn): Likewise.
  
! 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
! 	    Thomas Preud'homme  <thomas.preudhomme@arm.com>
  
! 	* config/arm/arm-cpus.in (armv8_1m_main): New feature.
! 	(ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
! 	ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
! 	ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
! 	ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
! 	(ARMv8_1m_main): New feature group.
! 	(armv8.1-m.main): New architecture.
! 	* config/arm/arm-tables.opt: Regenerate.
! 	* config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
! 	(arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
! 	(arm_options_perform_arch_sanity_checks): Error out when targeting
! 	Armv8.1-M Mainline Security Extensions.
! 	* config/arm/arm.h (arm_arch8_1m_main): Declare.
  
! 2020-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
  
! 	* config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
! 	aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
! 	* config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
! 	aarch64_bfdot_laneq): New.
! 	* config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
! 	vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
! 	vbfdotq_laneq_f32): New.
! 	* config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
! 	VBFMLA_W, VBF): New.
! 	(isquadop): Add V4BF, V8BF.
  
! 2020-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
  
! 	* config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
! 	New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
! 	TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
! 	(aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
! 	(aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
! 	* config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
! 	usdot_laneq, sudot_lane,sudot_laneq): New.
! 	* config/aarch64/aarch64-simd.md (aarch64_usdot): New.
! 	(aarch64_<sur>dot_lane): New.
! 	* config/aarch64/arm_neon.h (vusdot_s32): New.
! 	(vusdotq_s32): New.
! 	(vusdot_lane_s32): New.
! 	(vsudot_lane_s32): New.
! 	* config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
! 	(UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
  
! 2020-01-16  Martin Liska  <mliska@suse.cz>
  
! 	* value-prof.c (dump_histogram_value): Fix
! 	obvious spacing issue.
  
! 2020-01-16  Andrew Pinski  <apinski@marvell.com>
  
! 	* tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
! 	!storage_order_barrier_p.
  
! 2020-01-16  Andrew Pinski  <apinski@marvell.com>
  
! 	* sched-int.h (_dep): Add unused bit-field field for the padding.
! 	* sched-deps.c (init_dep_1): Init unused field.
  
! 2020-01-16  Andrew Pinski  <apinski@marvell.com>
  
! 	* optabs.h (create_expand_operand): Initialize target field also.
  
! 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	PR tree-optimization/92429
! 	* tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
! 	* tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
! 	control folding.
! 	* tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
! 	tree.
  
! 2020-01-16  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
! 	aarch64_sve_int_mode to each mode.
  
! 2020-01-15  David Malcolm  <dmalcolm@redhat.com>
  
! 	* doc/analyzer.texi (Overview): Add note about
! 	-fdump-ipa-analyzer.
  
! 2020-01-15  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	PR tree-optimization/93231
! 	* tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
! 	input_type is unsigned.  Use tree_to_shwi for shift constant.
! 	Check CST_STRING element size is CHAR_TYPE_SIZE bits.
! 	(simplify_count_trailing_zeroes): Add test to handle known non-zero
! 	inputs more efficiently.
  
! 2020-01-15  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	* config/i386/i386.md (*movsf_internal): Do not require
! 	SSE2 ISA for alternatives 14 and 15.
  
! 2020-01-15  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/93273
! 	* tree-eh.c (sink_clobbers): If we already visited the destination
! 	block do not defer insertion.
! 	(pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
! 	the purpose of defered insertion.
  
! 2020-01-15  Jakub Jelinek  <jakub@redhat.com>
  
! 	* BASE-VER: Bump to 10.0.1.
  
! 2020-01-15  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR tree-optimization/93247
! 	* tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
! 	type of the stmt that we're going to vectorize.
  
! 2020-01-15  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
! 	VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
! 	type from the lhs.
  
! 2020-01-15  Martin Liska  <mliska@suse.cz>
  
! 	* ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
! 	2 calls of streamer_read_hwi in a function call.
  
! 2020-01-15  Richard Biener  <rguenther@suse.de>
  
! 	* alias.c (record_alias_subset): Avoid redundant work when
! 	subset is already recorded.
  
! 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
  
! 	* doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
! 	the analyzer options provide CWE identifiers.
  
! 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
  
! 	* tree-diagnostic-path.cc (path_summary::event_range::print):
! 	When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
! 	using get_pure_location.
  
! 2020-01-15  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/93262
! 	* tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
! 	perform head trimming only if the last argument is constant,
! 	either all ones, or larger or equal to head trim, in the latter
! 	case decrease the last argument by head_trim.
  
! 	PR tree-optimization/93249
! 	* tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
! 	(maybe_trim_memstar_call): Move head_trim and tail_trim vars to
! 	function body scope, reindent.  For BUILTIN_IN_STRNCPY*, don't
! 	perform head trim unless we can prove there are no '\0' chars
! 	from the source among the first head_trim chars.
  
! 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
  
! 	* Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
  
! 2020-01-15  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93009
  	* config/i386/sse.md
! 	(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
! 	*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
! 	*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
! 	*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
! 	just a single alternative instead of two, make operands 1 and 2
! 	commutative.
  
! 2020-01-14  Jan Hubicka  <hubicka@ucw.cz>
  
! 	PR lto/91576
! 	* ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
! 	TYPE_MODE.
  
! 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
  
! 	* Makefile.in (lang_opt_files): Add analyzer.opt.
! 	(ANALYZER_OBJS): New.
! 	(OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
! 	tristate.o and ANALYZER_OBJS.
! 	(TEXI_GCCINT_FILES): Add analyzer.texi.
! 	* common.opt (-fanalyzer): New driver option.
! 	* config.in: Regenerate.
  	* configure: Regenerate.
+ 	* configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
+ 	(gccdepdir): Also create depdir for "analyzer" subdir.
+ 	* digraph.cc: New file.
+ 	* digraph.h: New file.
+ 	* doc/analyzer.texi: New file.
+ 	* doc/gccint.texi ("Static Analyzer") New menu item.
+ 	(analyzer.texi): Include it.
+ 	* doc/invoke.texi ("Static Analyzer Options"): New list and new section.
+ 	("Warning Options"): Add static analysis warnings to the list.
+ 	(-Wno-analyzer-double-fclose): New option.
+ 	(-Wno-analyzer-double-free): New option.
+ 	(-Wno-analyzer-exposure-through-output-file): New option.
+ 	(-Wno-analyzer-file-leak): New option.
+ 	(-Wno-analyzer-free-of-non-heap): New option.
+ 	(-Wno-analyzer-malloc-leak): New option.
+ 	(-Wno-analyzer-possible-null-argument): New option.
+ 	(-Wno-analyzer-possible-null-dereference): New option.
+ 	(-Wno-analyzer-null-argument): New option.
+ 	(-Wno-analyzer-null-dereference): New option.
+ 	(-Wno-analyzer-stale-setjmp-buffer): New option.
+ 	(-Wno-analyzer-tainted-array-index): New option.
+ 	(-Wno-analyzer-use-after-free): New option.
+ 	(-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
+ 	(-Wno-analyzer-use-of-uninitialized-value): New option.
+ 	(-Wanalyzer-too-complex): New option.
+ 	(-fanalyzer-call-summaries): New warning.
+ 	(-fanalyzer-checker=): New warning.
+ 	(-fanalyzer-fine-grained): New warning.
+ 	(-fno-analyzer-state-merge): New warning.
+ 	(-fno-analyzer-state-purge): New warning.
+ 	(-fanalyzer-transitivity): New warning.
+ 	(-fanalyzer-verbose-edges): New warning.
+ 	(-fanalyzer-verbose-state-changes): New warning.
+ 	(-fanalyzer-verbosity=): New warning.
+ 	(-fdump-analyzer): New warning.
+ 	(-fdump-analyzer-callgraph): New warning.
+ 	(-fdump-analyzer-exploded-graph): New warning.
+ 	(-fdump-analyzer-exploded-nodes): New warning.
+ 	(-fdump-analyzer-exploded-nodes-2): New warning.
+ 	(-fdump-analyzer-exploded-nodes-3): New warning.
+ 	(-fdump-analyzer-supergraph): New warning.
+ 	* doc/sourcebuild.texi (dg-require-dot): New.
+ 	(dg-check-dot): New.
+ 	* gdbinit.in (break-on-saved-diagnostic): New command.
+ 	* graphviz.cc: New file.
+ 	* graphviz.h: New file.
+ 	* ordered-hash-map-tests.cc: New file.
+ 	* ordered-hash-map.h: New file.
+ 	* passes.def (pass_analyzer): Add before
+ 	pass_ipa_whole_program_visibility.
+ 	* selftest-run-tests.c (selftest::run_tests): Call
+ 	selftest::ordered_hash_map_tests_cc_tests.
+ 	* selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
+ 	decl.
+ 	* shortest-paths.h: New file.
+ 	* timevar.def (TV_ANALYZER): New timevar.
+ 	(TV_ANALYZER_SUPERGRAPH): Likewise.
+ 	(TV_ANALYZER_STATE_PURGE): Likewise.
+ 	(TV_ANALYZER_PLAN): Likewise.
+ 	(TV_ANALYZER_SCC): Likewise.
+ 	(TV_ANALYZER_WORKLIST): Likewise.
+ 	(TV_ANALYZER_DUMP): Likewise.
+ 	(TV_ANALYZER_DIAGNOSTICS): Likewise.
+ 	(TV_ANALYZER_SHORTEST_PATHS): Likewise.
+ 	* tree-pass.h (make_pass_analyzer): New decl.
+ 	* tristate.cc: New file.
+ 	* tristate.h: New file.
  
! 2020-01-14  Uroš Bizjak  <ubizjak@gmail.com>
  
! 	PR target/93254
! 	* config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
! 	alternatives 9 and 10.
  
! 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
  
! 	* attribs.c (excl_hash_traits::empty_zero_p): New static constant.
! 	* gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
! 	* graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
! 	* hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
! 	(selftest::hash_map_tests_c_tests): Call it.
! 	* hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
! 	New static constant, using the value of = H::empty_zero_p.
! 	(unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
! 	from default_hash_traits <Value>.
! 	* hash-map.h (hash_map::empty_zero_p): Likewise, using the value
! 	from Traits.
! 	* hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
! 	* hash-table.h (hash_table::alloc_entries): Guard the loop of
! 	calls to mark_empty with !Descriptor::empty_zero_p.
! 	(hash_table::empty_slow): Conditionalize the memset call with a
! 	check that Descriptor::empty_zero_p; otherwise, loop through the
! 	entries calling mark_empty on them.
! 	* hash-traits.h (int_hash::empty_zero_p): New static constant.
! 	(pointer_hash::empty_zero_p): Likewise.
! 	(pair_hash::empty_zero_p): Likewise.
! 	* ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
! 	Likewise.
! 	* ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
! 	(ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
! 	* profile.c (location_triplet_hash::empty_zero_p): Likewise.
! 	* sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
! 	(sanopt_tree_couple_hash::empty_zero_p): Likewise.
! 	* tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
! 	* tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
! 	* tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
! 	* tree-vectorizer.h
! 	(default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
! 	Likewise.
  
! 2020-01-14  Kewen Lin  <linkw@gcc.gnu.org>
  
! 	* cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
! 	fix typo on return value.
  
! 2020-01-14  Xiong Hu Luo  <luoxhu@linux.ibm.com>
  
! 	PR ipa/69678
! 	* cgraph.c (symbol_table::create_edge): Init speculative_id and
! 	target_prob.
! 	(cgraph_edge::make_speculative): Add param for setting speculative_id
! 	and target_prob.
! 	(cgraph_edge::speculative_call_info): Update comments and find reference
! 	by speculative_id for multiple indirect targets.
! 	(cgraph_edge::resolve_speculation): Decrease the speculations
! 	for indirect edge, drop it's speculative if not direct target
! 	left. Update comments.
! 	(cgraph_edge::redirect_call_stmt_to_callee): Likewise.
! 	(cgraph_node::dump): Print num_speculative_call_targets.
! 	(cgraph_node::verify_node): Don't report error if speculative
! 	edge not include statement.
! 	(cgraph_edge::num_speculative_call_targets_p): New function.
! 	* cgraph.h (int common_target_id): Remove.
! 	(int common_target_probability): Remove.
! 	(num_speculative_call_targets): New variable.
! 	(make_speculative): Add param for setting speculative_id.
! 	(cgraph_edge::num_speculative_call_targets_p): New declare.
! 	(target_prob): New variable.
! 	(speculative_id): New variable.
! 	* ipa-fnsummary.c (analyze_function_body): Create and duplicate
! 	  call summaries for multiple speculative call targets.
! 	* cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
! 	* ipa-profile.c (struct speculative_call_target): New struct.
! 	(class speculative_call_summary): New class.
! 	(class speculative_call_summaries): New class.
! 	(call_sums): New variable.
! 	(ipa_profile_generate_summary): Generate indirect multiple targets summaries.
! 	(ipa_profile_write_edge_summary): New function.
! 	(ipa_profile_write_summary): Stream out indirect multiple targets summaries.
! 	(ipa_profile_dump_all_summaries): New function.
! 	(ipa_profile_read_edge_summary): New function.
! 	(ipa_profile_read_summary_section): New function.
! 	(ipa_profile_read_summary): Stream in indirect multiple targets summaries.
! 	(ipa_profile): Generate num_speculative_call_targets from
! 	profile summaries.
! 	* ipa-ref.h (speculative_id): New variable.
! 	* ipa-utils.c (ipa_merge_profiles): Update with target_prob.
! 	* lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
! 	common_target_probability.   Stream out speculative_id and
! 	num_speculative_call_targets.
! 	(input_edge): Likewise.
! 	* predict.c (dump_prediction): Remove edges count assert to be
! 	precise.
! 	* symtab.c (symtab_node::create_reference): Init speculative_id.
! 	(symtab_node::clone_references): Clone speculative_id.
! 	(symtab_node::clone_referring): Clone speculative_id.
! 	(symtab_node::clone_reference): Clone speculative_id.
! 	(symtab_node::clear_stmts_in_references): Clear speculative_id.
! 	* tree-inline.c (copy_bb): Duplicate all the speculative edges
! 	if indirect call contains multiple speculative targets.
! 	* value-prof.h  (check_ic_target): Remove.
! 	* value-prof.c  (gimple_value_profile_transformations):
! 	Use void function gimple_ic_transform.
! 	* value-prof.c  (gimple_ic_transform): Handle topn case.
! 	Fix comment typos.  Change it to a void function.
  
! 2020-01-13  Andrew Pinski  <apinski@marvell.com>
  
! 	* config/aarch64/aarch64-cores.def (octeontx2): New define.
! 	(octeontx2t98): New define.
! 	(octeontx2t96): New define.
! 	(octeontx2t93): New define.
! 	(octeontx2f95): New define.
! 	(octeontx2f95n): New define.
! 	(octeontx2f95mm): New define.
! 	* config/aarch64/aarch64-tune.md: Regenerate.
! 	* doc/invoke.texi (-mcpu=): Document the new cpu types.
  
! 2020-01-13  Jason Merrill  <jason@redhat.com>
  
! 	PR c++/33799 - destroy return value if local cleanup throws.
! 	* gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
  
! 2020-01-13  Martin Liska  <mliska@suse.cz>
  
! 	* ipa-cp.c (get_max_overall_size): Use newly
! 	renamed param param_ipa_cp_unit_growth.
! 	* params.opt: Remove legacy param name.
  
! 2020-01-13  Martin Sebor  <msebor@redhat.com>
  
! 	PR tree-optimization/93213
! 	* tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
! 	stores to be eliminated.
  
! 2020-01-13  Martin Liska  <mliska@suse.cz>
  
! 	* opts.c (print_help): Do not print CL_PARAM
! 	and CL_WARNING for CL_OPTIMIZATION.
  
! 2020-01-13  Jonathan Wakely  <jwakely@redhat.com>
  
! 	PR driver/92757
! 	* doc/invoke.texi (Warning Options): Add caveat about some warnings
! 	depending on optimization settings.
  
! 2020-01-13  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/90838
! 	* tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
! 	SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
! 	argument rather than to initialize temporary for targets that
! 	don't use the mode argument at all.  Initialize ctzval to avoid
! 	warning at -O0.
  
! 2020-01-10  Thomas Schwinge  <thomas@codesourcery.com>
  
! 	* tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
! 	* tree-core.h: Document it.
! 	* gimplify.c (gimplify_omp_workshare): Set it.
! 	* omp-low.c (lower_omp_target): Use it.
! 	* tree-pretty-print.c (dump_omp_clause): Print it.
  
! 	* omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
! 	Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
  
! 2020-01-10  David Malcolm  <dmalcolm@redhat.com>
  
! 	* Makefile.in (OBJS): Add tree-diagnostic-path.o.
! 	* common.opt (fdiagnostics-path-format=): New option.
! 	(diagnostic_path_format): New enum.
! 	(fdiagnostics-show-path-depths): New option.
! 	* coretypes.h (diagnostic_event_id_t): New forward decl.
! 	* diagnostic-color.c (color_dict): Add "path".
! 	* diagnostic-event-id.h: New file.
! 	* diagnostic-format-json.cc (json_from_expanded_location): Make
! 	non-static.
! 	(json_end_diagnostic): Call context->make_json_for_path if it
! 	exists and the diagnostic has a path.
! 	(diagnostic_output_format_init): Clear context->print_path.
! 	* diagnostic-path.h: New file.
! 	* diagnostic-show-locus.c (colorizer::set_range): Special-case
! 	when printing a run of events in a diagnostic_path so that they
! 	all get the same color.
! 	(layout::m_diagnostic_path_p): New field.
! 	(layout::layout): Initialize it.
! 	(layout::print_any_labels): Don't colorize the label text for an
! 	event in a diagnostic_path.
! 	(gcc_rich_location::add_location_if_nearby): Add
! 	"restrict_to_current_line_spans" and "label" params.  Pass the
! 	former to layout.maybe_add_location_range; pass the latter
! 	when calling add_range.
! 	* diagnostic.c: Include "diagnostic-path.h".
! 	(diagnostic_initialize): Initialize context->path_format and
! 	context->show_path_depths.
! 	(diagnostic_show_any_path): New function.
! 	(diagnostic_path::interprocedural_p): New function.
! 	(diagnostic_report_diagnostic): Call diagnostic_show_any_path.
! 	(simple_diagnostic_path::num_events): New function.
! 	(simple_diagnostic_path::get_event): New function.
! 	(simple_diagnostic_path::add_event): New function.
! 	(simple_diagnostic_event::simple_diagnostic_event): New ctor.
! 	(simple_diagnostic_event::~simple_diagnostic_event): New dtor.
! 	(debug): New overload taking a diagnostic_path *.
! 	* diagnostic.def (DK_DIAGNOSTIC_PATH): New.
! 	* diagnostic.h (enum diagnostic_path_format): New enum.
! 	(json::value): New forward decl.
! 	(diagnostic_context::path_format): New field.
! 	(diagnostic_context::show_path_depths): New field.
! 	(diagnostic_context::print_path): New callback field.
! 	(diagnostic_context::make_json_for_path): New callback field.
! 	(diagnostic_show_any_path): New decl.
! 	(json_from_expanded_location): New decl.
! 	* doc/invoke.texi (-fdiagnostics-path-format=): New option.
! 	(-fdiagnostics-show-path-depths): New option.
! 	(-fdiagnostics-color): Add "path" to description of default
! 	GCC_COLORS; describe it.
! 	(-fdiagnostics-format=json): Document how diagnostic paths are
! 	represented in the JSON output format.
! 	* gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
! 	Add optional params "restrict_to_current_line_spans" and "label".
! 	* opts.c (common_handle_option): Handle
! 	OPT_fdiagnostics_path_format_ and
! 	OPT_fdiagnostics_show_path_depths.
! 	* pretty-print.c: Include "diagnostic-event-id.h".
! 	(pp_format): Implement "%@" format code for printing
! 	diagnostic_event_id_t *.
! 	(selftest::test_pp_format): Add tests for "%@".
! 	* selftest-run-tests.c (selftest::run_tests): Call
! 	selftest::tree_diagnostic_path_cc_tests.
! 	* selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
! 	* toplev.c (general_init): Initialize global_dc->path_format and
! 	global_dc->show_path_depths.
! 	* tree-diagnostic-path.cc: New file.
! 	* tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
! 	non-static.  Drop "diagnostic" param in favor of storing the
! 	original value of "where" and re-using it.
! 	(virt_loc_aware_diagnostic_finalizer): Update for dropped param of
! 	maybe_unwind_expanded_macro_loc.
! 	(tree_diagnostics_defaults): Initialize context->print_path and
! 	context->make_json_for_path.
! 	* tree-diagnostic.h (default_tree_diagnostic_path_printer): New
! 	decl.
! 	(default_tree_make_json_for_path): New decl.
! 	(maybe_unwind_expanded_macro_loc): New decl.
  
! 2020-01-10  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/93210
! 	* fold-const.h (native_encode_initializer,
! 	can_native_interpret_type_p): Declare.
! 	* fold-const.c (native_encode_string): Fix up handling with off != -1,
! 	simplify.
! 	(native_encode_initializer): New function, moved from dwarf2out.c.
! 	Adjust to native_encode_expr compatible arguments, including dry-run
! 	and partial extraction modes.  Don't handle STRING_CST.
! 	(can_native_interpret_type_p): No longer static.
! 	* gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
! 	offset / BITS_PER_UNIT fits into int and don't call it if
! 	can_native_interpret_type_p fails.  If suboff is NULL and for
! 	CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
! 	native_encode_initializer.
! 	(fold_const_aggregate_ref_1): Formatting fix.
! 	* dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
! 	(tree_add_const_value_attribute): Adjust caller.
  
! 	PR tree-optimization/90838
! 	* tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
! 	SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
! 	CTZ_DEFINED_VALUE_AT_ZERO.
  
! 2020-01-10  Vladimir Makarov  <vmakarov@redhat.com>
  
! 	PR inline-asm/93027
! 	* lra-constraints.c (match_reload): Permit input operands have the
! 	same mode as output while other input operands have a different
! 	mode.
  
! 2020-01-10  Wilco Dijkstra  <wdijkstr@arm.com>
  
! 	PR tree-optimization/90838
! 	* tree-ssa-forwprop.c (check_ctz_array): Add new function.
! 	(check_ctz_string): Likewise.
! 	(optimize_count_trailing_zeroes): Likewise.
! 	(simplify_count_trailing_zeroes): Likewise.
! 	(pass_forwprop::execute): Try ctz simplification.
! 	* match.pd: Add matching for ctz idioms.
  
! 2020-01-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
! 	for target hook.
! 	(aarch64_invalid_unary_op): New function for target hook.
! 	(aarch64_invalid_binary_op): New function for target hook.
  
! 2020-01-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
  
! 	* config.gcc: Add arm_bf16.h.
! 	* config/aarch64/aarch64-builtins.c
! 	(aarch64_simd_builtin_std_type): Add BFmode.
! 	(aarch64_init_simd_builtin_types): Define element types for vector
! 	types.
! 	(aarch64_init_bf16_types): New function.
! 	(aarch64_general_init_builtins): Add arm_init_bf16_types function call.
! 	* config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
! 	modes.
! 	* config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
! 	* config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
! 	patterns.
! 	* config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
! 	(AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
! 	* config/aarch64/aarch64.c
! 	(aarch64_classify_vector_mode): Add support for BF types.
! 	(aarch64_gimplify_va_arg_expr): Add support for BF types.
! 	(aarch64_vq_mode): Add support for BF types.
! 	(aarch64_simd_container_mode): Add support for BF types.
! 	(aarch64_mangle_type): Add support for BF scalar type.
! 	* config/aarch64/aarch64.md: Add BFmode to movhf pattern.
! 	* config/aarch64/arm_bf16.h: New file.
! 	* config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
! 	* config/aarch64/iterators.md: Add BF types to mode attributes.
! 	(HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
  
! 2020-01-10  Jason Merrill  <jason@redhat.com>
  
! 	PR c++/93173 - incorrect tree sharing.
! 	* gimplify.c (copy_if_shared): No longer static.
! 	* gimplify.h: Declare it.
  
! 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* doc/invoke.texi (-msve-vector-bits=): Document that
! 	-msve-vector-bits=128 now generates VL-specific code for
! 	little-endian targets.
! 	* config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
! 	build_vector_type_for_mode to construct the data vector types.
! 	* config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
! 	VL-specific code for -msve-vector-bits=128 on little-endian targets.
! 	(aarch64_simd_container_mode): Always prefer Advanced SIMD modes
! 	for 128-bit vectors.
  
! 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
! 	invocation.
  
! 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64-builtins.c
! 	(aarch64_builtin_vectorized_function): Check for specific vector modes,
! 	rather than checking the number of elements and the element mode.
  
! 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* tree-vect-loop.c (vect_create_epilog_for_reduction): Use
! 	get_related_vectype_for_scalar_type rather than build_vector_type
! 	to create the index type for a conditional reduction.
  
! 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
! 	for any type of gather or scatter, including strided accesses.
  
! 2020-01-10  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
! 	 comment.
  
! 2020-01-10  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
! 	get_dr_vinfo_offset
! 	* tree-vect-loop.c (update_epilogue_loop_vinfo):  Remove orig_drs_init
! 	parameter and its use to reset DR_OFFSET's.
! 	(vect_transform_loop): Remove orig_drs_init argument.
! 	* tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
! 	member of dr_vec_info rather than the offset of the associated
! 	data_reference's innermost_loop_behavior.
! 	(vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
! 	(vect_do_peeling): Remove orig_drs_init parameter and its construction.
! 	* tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
! 	get_dr_vinfo_offset.
! 	(vectorizable_store): Likewise.
! 	(vectorizable_load): Likewise.
  
! 2020-01-10  Richard Biener  <rguenther@suse.de>
  
! 	* gimple-ssa-store-merging
! 	(pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
  
! 2020-01-10  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/93217
! 	* ipa-inline-analysis.c (offline_size): Make proper parenthesis
! 	encapsulation that was there before r280040.
  
! 2020-01-10  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/93199
! 	* tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
! 	sequences to avoid walking them again for secondary opportunities.
! 	(pass_lower_eh_dispatch::execute): Instead actually insert
! 	them here.
  
! 2020-01-10  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/93199
! 	* tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
! 	(cleanup_all_empty_eh): Walk landing pads in reverse order to
! 	avoid quadraticness.
  
! 2020-01-10  Martin Jambor  <mjambor@suse.cz>
  
! 	* params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
! 	* ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
! 	to get param_ipa_sra_max_replacements.
! 	(param_splitting_across_edge): Pass the caller to
! 	pull_accesses_from_callee.
  
! 2020-01-10  Martin Jambor  <mjambor@suse.cz>
  
! 	* params.opt (param_ipcp_unit_growth): Mark as Optimization.
! 	* ipa-cp.c (max_new_size): Removed.
! 	(orig_overall_size): New variable.
! 	(get_max_overall_size): New function.
! 	(estimate_local_effects): Use it.  Adjust dump.
! 	(decide_about_value): Likewise.
! 	(ipcp_propagate_stage): Do not calculate max_new_size, just store
! 	orig_overall_size.  Adjust dump.
! 	(ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
  
! 2020-01-10  Martin Jambor  <mjambor@suse.cz>
  
! 	* params.opt (param_ipa_max_agg_items): Mark as Optimization
! 	* ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
! 	instead of param_ipa_max_agg_items.
! 	(merge_aggregate_lattices): Extract param_ipa_max_agg_items from
! 	optimization info for the callee.
  
! 2020-01-09  Kwok Cheung Yeung  <kcy@codesourcery.com>
  
! 	* lto-streamer-in.c (input_function): Remove streamed-in inline debug
! 	markers	if debug_inline_points is false.
  
! 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
! 	extra_objs.
! 	* config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
! 	aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
! 	aarch64-sve-builtins-sve2.h.
! 	(aarch64-sve-builtins-sve2.o): New rule.
! 	* config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
! 	(AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
! 	(AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
! 	(TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
! 	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
! 	TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
! 	TARGET_SVE2_SM4.
! 	* config/aarch64/aarch64-sve.md: Update comments with SVE2
! 	instructions that are handled here.
! 	(@cond_asrd<mode>): Generalize to...
! 	(@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
! 	(*cond_asrd<mode>_2): Generalize to...
! 	(*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
! 	(*cond_asrd<mode>_z): Generalize to...
! 	(*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
! 	* config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
! 	(UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
! 	(UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
! 	* config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
! 	pattern.
! 	(@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
! 	(@aarch64_scatter_stnt<mode>): Likewise.
! 	(@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
! 	(@aarch64_mul_lane_<mode>): Likewise.
! 	(@aarch64_sve_suqadd<mode>_const): Likewise.
! 	(*<sur>h<addsub><mode>): Generalize to...
! 	(@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
! 	new pattern.
! 	(@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
! 	(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
! 	(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
! 	(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
! 	(*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
! 	(@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
! 	(@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
! 	(@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
! 	(@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
! 	(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
! 	(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
! 	(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
! 	(@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
! 	(@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
! 	(@aarch64_sve_add_mul_lane_<mode>): Likewise.
! 	(@aarch64_sve_sub_mul_lane_<mode>): Likewise.
! 	(@aarch64_sve2_xar<mode>): Likewise.
! 	(@aarch64_sve2_bcax<mode>): Likewise.
! 	(*aarch64_sve2_eor3<mode>): Rename to...
! 	(@aarch64_sve2_eor3<mode>): ...this.
! 	(@aarch64_sve2_bsl<mode>): New expander.
! 	(@aarch64_sve2_nbsl<mode>): Likewise.
! 	(@aarch64_sve2_bsl1n<mode>): Likewise.
! 	(@aarch64_sve2_bsl2n<mode>): Likewise.
! 	(@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
! 	(*aarch64_sve2_sra<mode>): Add MOVPRFX support.
! 	(@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
! 	(@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
! 	(@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
! 	(*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
! 	(@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
! 	(<su>mull<bt><Vwide>): Generalize to...
! 	(@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
! 	pattern.
! 	(@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
! 	(@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
! 	(@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
! 	(@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
! 	(@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
! 	(@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
! 	(@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
! 	(@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
! 	(@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
! 	(@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
! 	(@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
! 	(@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
! 	(@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
! 	(@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
! 	(@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
! 	(@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
! 	(<SHRNB:r>shrnb<mode>): Generalize to...
! 	(@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
! 	new pattern.
! 	(<SHRNT:r>shrnt<mode>): Generalize to...
! 	(@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
! 	new pattern.
! 	(@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
! 	(@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
! 	(@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
! 	(*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
! 	(*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
! 	(@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
! 	(@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
! 	(@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
! 	(@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
! 	(@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
! 	(@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
! 	(@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
! 	(*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
! 	(@aarch64_sve2_cvtnt<mode>): Likewise.
! 	(@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
! 	(@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
! 	(*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
! 	(@aarch64_sve2_cvtxnt<mode>): Likewise.
! 	(@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
! 	(@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
! 	(*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
! 	(@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
! 	(@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
! 	(*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
! 	(@aarch64_sve2_pmul<mode>): Likewise.
! 	(@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
! 	(@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
! 	(@aarch64_sve2_tbl2<mode>): Likewise.
! 	(@aarch64_sve2_tbx<mode>): Likewise.
! 	(@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
! 	(@aarch64_sve2_histcnt<mode>): Likewise.
! 	(@aarch64_sve2_histseg<mode>): Likewise.
! 	(@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
! 	(*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
! 	(*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
! 	(aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
! 	(aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
! 	(*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
! 	(aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
! 	(<su>mulh<r>s<mode>3): Update after above pattern name changes.
! 	* config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
! 	(SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
! 	(SVE2_PMULL_PAIR_I): New mode iterators.
! 	(UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
! 	(UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
! 	(UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
! 	(UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
! 	(UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
! 	(UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
! 	(UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
! 	(UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
! 	(UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
! 	(UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
! 	(UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
! 	(UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
! 	(UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
! 	(UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
! 	(UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
! 	(UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
! 	(UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
! 	(UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
! 	(UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
! 	(UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
! 	(UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
! 	(UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
! 	(UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
! 	(UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
! 	(UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
! 	(UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
! 	(UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
! 	(UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
! 	(UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
! 	(UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
! 	(UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
! 	further down file.
! 	(VNARROW, Ventype): New mode attributes.
! 	(Vewtype): Handle VNx2DI.  Fix typo in comment.
! 	(VDOUBLE): New mode attribute.
! 	(sve_lane_con): Handle VNx8HI.
! 	(SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
! 	(SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
! 	(sve_int_op, sve_int_op_rev): Handle the above codes.
! 	(sve_pred_int_rhs2_operand): Likewise.
! 	(MULLBT, SHRNB, SHRNT): Delete.
! 	(SVE_INT_SHIFT_IMM): New int iterator.
! 	(SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
! 	and UNSPEC_WHILEHS for TARGET_SVE2.
! 	(SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
! 	(SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
! 	(SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
! 	(SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
! 	(SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
! 	(SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
! 	(SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
! 	(SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
! 	(SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
! 	(SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
! 	(SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
! 	(SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
! 	(SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
! 	(SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
! 	(SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
! 	(SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
! 	(SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
! 	(optab): Handle the new unspecs.
! 	(su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
! 	and UNSPEC_RSHRNT.
! 	(lr): Handle the new unspecs.
! 	(bt): Delete.
! 	(cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
! 	(sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
! 	(sve_int_qsub_op): New int attributes.
! 	(sve_fp_op, rot): Handle the new unspecs.
! 	* config/aarch64/aarch64-sve-builtins.h
! 	(function_resolver::require_matching_pointer_type): Declare.
! 	(function_resolver::resolve_unary): Add an optional boolean argument.
! 	(function_resolver::finish_opt_n_resolution): Add an optional
! 	type_suffix_index argument.
! 	(gimple_folder::redirect_call): Declare.
! 	(gimple_expander::prepare_gather_address_operands): Add an optional
! 	bool parameter.
! 	* config/aarch64/aarch64-sve-builtins.cc: Include
! 	aarch64-sve-builtins-sve2.h.
! 	(TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
! 	(TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
! 	(TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
! 	(TYPES_hsd_integer): Use TYPES_hsd_signed.
! 	(TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
! 	(TYPES_s_unsigned): Likewise.
! 	(TYPES_s_integer): Use TYPES_s_unsigned.
! 	(TYPES_sd_signed, TYPES_sd_unsigned): New macros.
! 	(TYPES_sd_integer): Use them.
! 	(TYPES_d_unsigned): New macro.
! 	(TYPES_d_integer): Use it.
! 	(TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
! 	(TYPES_cvt_narrow): Likewise.
! 	(DEF_SVE_TYPES_ARRAY): Include the new types macros above.
! 	(preds_mx): New variable.
! 	(function_builder::add_overloaded_function): Allow the new feature
! 	set to be more restrictive than the original one.
! 	(function_resolver::infer_pointer_type): Remove qualifiers from
! 	the pointer type before printing it.
! 	(function_resolver::require_matching_pointer_type): New function.
! 	(function_resolver::resolve_sv_displacement): Handle functions
! 	that don't support 32-bit vector indices or svint32_t vector offsets.
! 	(function_resolver::finish_opt_n_resolution): Take the inferred type
! 	as a separate argument.
! 	(function_resolver::resolve_unary): Optionally treat all forms in
! 	the same way as normal merging functions.
! 	(gimple_folder::redirect_call): New function.
! 	(function_expander::prepare_gather_address_operands): Add an argument
! 	that says whether scaled forms are available.  If they aren't,
! 	handle scaling of vector indices and don't add the extension and
! 	scaling operands.
! 	(function_expander::map_to_unspecs): If aarch64_sve isn't available,
! 	fall back to using cond_* instead.
! 	* config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
! 	Split out the member variables into...
! 	(rtx_code_function_base): ...this new base class.
! 	(rtx_code_function_rotated): Inherit rtx_code_function_base.
! 	(unspec_based_function): Split out the member variables into...
! 	(unspec_based_function_base): ...this new base class.
! 	(unspec_based_function_rotated): Inherit unspec_based_function_base.
! 	(unspec_based_function_exact_insn): New class.
! 	(unspec_based_add_function, unspec_based_add_lane_function)
! 	(unspec_based_lane_function, unspec_based_pred_function)
! 	(unspec_based_qadd_function, unspec_based_qadd_lane_function)
! 	(unspec_based_qsub_function, unspec_based_qsub_lane_function)
! 	(unspec_based_sub_function, unspec_based_sub_lane_function): New
! 	typedefs.
! 	(unspec_based_fused_function): New class.
! 	(unspec_based_mla_function, unspec_based_mls_function): New typedefs.
! 	(unspec_based_fused_lane_function): New class.
! 	(unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
! 	typedefs.
! 	(CODE_FOR_MODE1): New macro.
! 	(fixed_insn_function): New class.
! 	(while_comparison): Likewise.
! 	* config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
! 	(binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
! 	(binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
! 	(load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
! 	(load_gather_sv_restricted, shift_left_imm_long): Declare.
! 	(shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
! 	(shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
! 	(shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
! 	(store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
! 	(ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
! 	(ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
! 	(unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
! 	(unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
! 	* config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
! 	Also add an initial argument for unary_convert_narrowt, regardless
! 	of the predication type.
! 	(build_32_64): Allow loads and stores to specify MODE_none.
! 	(build_sv_index64, build_sv_uint_offset): New functions.
! 	(long_type_suffix): New function.
! 	(binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
! 	(binary_imm_long_base, load_gather_sv_base): Likewise.
! 	(shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
! 	(ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
! 	(unary_narrowb_base, unary_narrowt_base): Likewise.
! 	(binary_long_lane_def, binary_long_lane): New shape.
! 	(binary_long_opt_n_def, binary_long_opt_n): Likewise.
! 	(binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
! 	(binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
! 	(binary_to_uint_def, binary_to_uint): Likewise.
! 	(binary_wide_def, binary_wide): Likewise.
! 	(binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
! 	(compare_def, compare): Likewise.
! 	(compare_ptr_def, compare_ptr): Likewise.
! 	(load_ext_gather_index_restricted_def,
! 	load_ext_gather_index_restricted): Likewise.
! 	(load_ext_gather_offset_restricted_def,
! 	load_ext_gather_offset_restricted): Likewise.
! 	(load_gather_sv_def): Inherit from load_gather_sv_base.
! 	(load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
! 	(shift_left_imm_def, shift_left_imm): Likewise.
! 	(shift_left_imm_long_def, shift_left_imm_long): Likewise.
! 	(shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
! 	(store_scatter_index_restricted_def,
! 	store_scatter_index_restricted): Likewise.
! 	(store_scatter_offset_restricted_def,
! 	store_scatter_offset_restricted): Likewise.
! 	(tbl_tuple_def, tbl_tuple): Likewise.
! 	(ternary_long_lane_def, ternary_long_lane): Likewise.
! 	(ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
! 	(ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
! 	(ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
! 	(ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
! 	(ternary_qq_rotate_def, ternary_qq_rotate): New shape.
! 	(ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
! 	(ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
! 	(ternary_uint_def, ternary_uint): Likewise.
! 	(unary_convert): Fix typo in comment.
! 	(unary_convert_narrowt_def, unary_convert_narrowt): New shape.
! 	(unary_long_def, unary_long): Likewise.
! 	(unary_narrowb_def, unary_narrowb): Likewise.
! 	(unary_narrowt_def, unary_narrowt): Likewise.
! 	(unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
! 	(unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
! 	(unary_to_int_def, unary_to_int): Likewise.
! 	* config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
! 	(unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
! 	(svasrd_impl): Delete.
! 	(svcadd_impl::expand): Handle integer operations too.
! 	(svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
! 	new functions to derive the unspec numbers.
! 	(svmla_svmls_lane_impl): Replace with...
! 	(svmla_lane_impl, svmls_lane_impl): ...these new classes.  Handle
! 	integer operations too.
! 	(svwhile_impl): Rename to...
! 	(svwhilelx_impl): ...this and inherit from while_comparison.
! 	(svasrd): Use unspec_based_function.
! 	(svmla_lane): Use svmla_lane_impl.
! 	(svmls_lane): Use svmls_lane_impl.
! 	(svrecpe, svrsqrte): Handle unsigned integer operations too.
! 	(svwhilele, svwhilelt): Use svwhilelx_impl.
! 	* config/aarch64/aarch64-sve-builtins-sve2.h: New file.
! 	* config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
! 	* config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
! 	* config/aarch64/aarch64-sve-builtins.def: Include
! 	aarch64-sve-builtins-sve2.def.
  
! 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
! 	(aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
! 	* config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
! 	(aarch64_sve_sqadd_sqsub_immediate_p): Likewise.  Handle scalar
! 	immediates as well as vector ones.
! 	* config/aarch64/predicates.md (aarch64_sve_arith_immediate)
! 	(aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
! 	(aarch64_sve_qsub_immediate): Update calls accordingly.
  
! 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64-sve2.md: Add banner comments.
! 	(<su>mulh<r>s<mode>3): Move further up file.
! 	(<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
! 	(*aarch64_sve2_sra<mode>): Move further down file.
! 	* config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
  
! 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
! 	and UNSPEC_WHILEWR.
! 	(while_optab_cmp): Handle them.
! 	* config/aarch64/aarch64-sve.md
! 	(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
! 	and add a "@" marker.
! 	* config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
! 	instead of gen_aarch64_sve2_while_ptest.
! 	(@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
  
! 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
! 	(UNSPEC_WHILELE): ...this.
! 	(UNSPEC_WHILE_LO): Rename to...
! 	(UNSPEC_WHILELO): ...this.
! 	(UNSPEC_WHILE_LS): Rename to...
! 	(UNSPEC_WHILELS): ...this.
! 	(UNSPEC_WHILE_LT): Rename to...
! 	(UNSPEC_WHILELT): ...this.
! 	* config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
! 	(cmp_op, while_optab_cmp): Likewise.
! 	* config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
! 	* config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
! 	(svwhilelt): Likewise.
  
! 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
! 	(unary_to_uint): Define.
! 	* config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
! 	(unary_count): Rename to...
! 	(unary_to_uint_def, unary_to_uint): ...this.
! 	* config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
  
! 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64-sve-builtins-functions.h
! 	(code_for_mode_function): New class.
! 	(CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
! 	* config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
! 	(svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
! 	(svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
! 	(svmul_lane, svtmad): Use CODE_FOR_MODE0.
  
! 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/iterators.md (addsub): New code attribute.
! 	* config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
! 	Re-express as...
! 	(aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
! 	in the asm string and attributes.  Fix indentation.
! 	* config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
! 	Re-express as...
! 	(@aarch64_sve_<optab><mode>): ...this.
! 	* config/aarch64/aarch64-sve-builtins.h
! 	(function_expander::expand_signed_unpred_op): Delete.
! 	* config/aarch64/aarch64-sve-builtins.cc
! 	(function_expander::expand_signed_unpred_op): Likewise.
! 	(function_expander::map_to_rtx_codes): If the optab isn't defined,
! 	try using code_for_aarch64_sve instead.
! 	* config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
! 	(svqsub_impl): Likewise.
! 	(svqadd, svqsub): Use rtx_code_function instead.
  
! 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
! 	(HADDSUB, sur, addsub): Remove them.
  
! 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* tree-nrv.c (pass_return_slot::execute): Handle all internal
! 	functions the same way, rather than singling out those that
! 	aren't mapped directly to optabs.
  
! 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* target.def (compatible_vector_types_p): New target hook.
! 	* hooks.h (hook_bool_const_tree_const_tree_true): Declare.
! 	* hooks.c (hook_bool_const_tree_const_tree_true): New function.
! 	* doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
  	* doc/tm.texi: Regenerate.
! 	* gimple-expr.c: Include target.h.
! 	(useless_type_conversion_p): Use targetm.compatible_vector_types_p.
! 	* config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
! 	function.
! 	(TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
! 	* config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
! 	Use the original predicate if it already has a suitable type.
  
! 2020-01-09  Martin Jambor  <mjambor@suse.cz>
  
! 	* cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
! 	resolve_speculation and redirect_call_stmt_to_callee static.  Change
! 	return type of set_call_stmt to cgraph_edge *.
! 	* auto-profile.c (afdo_indirect_call): Adjust call to
! 	redirect_call_stmt_to_callee.
! 	* cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
! 	make the this pointer explicit, adjust self-recursive calls and the
! 	call top make_direct.  Return the resulting edge.
! 	(cgraph_edge::remove): Make this pointer explicit.
! 	(cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
! 	(cgraph_edge::make_direct): Likewise, adjust call to
! 	resolve_speculation.
! 	(cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
! 	call to set_call_stmt.
! 	(cgraph_update_edges_for_call_stmt_node): Update call to
! 	set_call_stmt and remove.
! 	* cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
! 	Renamed edge to master_edge.  Adjusted calls to set_call_stmt.
! 	(cgraph_node::create_edge_including_clones): Moved "first" definition
! 	of edge to the block where it was used.  Adjusted calls to
! 	set_call_stmt.
! 	(cgraph_node::remove_symbol_and_inline_clones): Adjust call to
! 	cgraph_edge::remove.
! 	* cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
! 	make_direct and redirect_call_stmt_to_callee.
! 	* ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
! 	resolve_speculation and make_direct.
! 	* ipa-inline-transform.c (inline_transform): Adjust call to
! 	redirect_call_stmt_to_callee.
! 	(check_speculations_1):: Adjust call to resolve_speculation.
! 	* ipa-inline.c (resolve_noninline_speculation): Adjust call to
! 	resolve-speculation.
! 	(inline_small_functions): Adjust call to resolve_speculation.
! 	(ipa_inline): Likewise.
! 	* ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
! 	make_direct.
! 	* ipa-visibility.c (function_and_variable_visibility): Make iteration
! 	safe with regards to edge removal, adjust calls to
! 	redirect_call_stmt_to_callee.
! 	* ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
! 	and redirect_call_stmt_to_callee.
! 	* multiple_target.c (create_dispatcher_calls): Adjust call to
! 	redirect_call_stmt_to_callee
! 	(redirect_to_specific_clone): Likewise.
! 	* tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
! 	Adjust calls to cgraph_edge::remove.
! 	* tree-inline.c (copy_bb): Adjust call to set_call_stmt.
! 	(redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
! 	(expand_call_inline): Adjust call to cgraph_edge::remove.
  
! 2020-01-09  Martin Liska  <mliska@suse.cz>
  
! 	* params.opt: Set Optimization for
! 	param_max_speculative_devirt_maydefs.
  
! 2020-01-09  Martin Sebor  <msebor@redhat.com>
  
! 	PR middle-end/93200
! 	PR fortran/92956
! 	* builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
  
! 2020-01-09  Martin Liska  <mliska@suse.cz>
  
! 	* auto-profile.c (auto_profile): Use opt_for_fn
! 	for a parameter.
! 	* ipa-cp.c (ipcp_lattice::add_value): Likewise.
! 	(propagate_vals_across_arith_jfunc): Likewise.
! 	(hint_time_bonus): Likewise.
! 	(incorporate_penalties): Likewise.
! 	(good_cloning_opportunity_p): Likewise.
! 	(perform_estimation_of_a_value): Likewise.
! 	(estimate_local_effects): Likewise.
! 	(ipcp_propagate_stage): Likewise.
! 	* ipa-fnsummary.c (decompose_param_expr): Likewise.
! 	(set_switch_stmt_execution_predicate): Likewise.
! 	(analyze_function_body): Likewise.
! 	* ipa-inline-analysis.c (offline_size): Likewise.
! 	* ipa-inline.c (early_inliner): Likewise.
! 	* ipa-prop.c (ipa_analyze_node): Likewise.
! 	(ipcp_transform_function): Likewise.
! 	* ipa-sra.c (process_scan_results): Likewise.
! 	(ipa_sra_summarize_function): Likewise.
! 	* params.opt: Rename ipcp-unit-growth to
! 	ipa-cp-unit-growth.  Add Optimization for various
! 	IPA-related parameters.
  
! 2020-01-09  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/93054
! 	* gimplify.c (gimplify_expr): Deal with NOP definitions.
  
! 2020-01-09  Richard Biener  <rguenther@suse.de>
  
! 	PR tree-optimization/93040
! 	* gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
  
! 2020-01-09  Georg-Johann Lay  <avr@gjlay.de>
  
! 	* common/config/avr/avr-common.c (avr_option_optimization_table)
! 	[OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
  
! 2020-01-09  Martin Liska  <mliska@suse.cz>
  
! 	* cgraphclones.c (symbol_table::materialize_all_clones):
! 	Use cgraph_node::dump_name.
  
! 2020-01-09  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR inline-asm/93202
! 	* config/riscv/riscv.c (riscv_print_operand_reloc): Use
! 	output_operand_lossage instead of gcc_unreachable.
! 	* doc/md.texi (riscv f constraint): Fix typo.
  
! 	PR target/93141
! 	* config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
! 	SWI.  Use <general_hilo_operand> instead of <general_operand>.  Use
! 	CONST_SCALAR_INT_P instead of CONST_INT_P.
! 	(*subv<mode>4_1): Rename to ...
! 	(subv<mode>4_1): ... this.
! 	(*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
! 	define_insn_and_split patterns.
! 	(*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
! 	patterns.
  
! 2020-01-08  David Malcolm  <dmalcolm@redhat.com>
  
! 	* vec.c (class selftest::count_dtor): New class.
! 	(selftest::test_auto_delete_vec): New test.
! 	(selftest::vec_c_tests): Call it.
! 	* vec.h (class auto_delete_vec): New class template.
! 	(auto_delete_vec<T>::~auto_delete_vec): New dtor.
  
! 2020-01-08  David Malcolm  <dmalcolm@redhat.com>
  
! 	* sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
  
! 2020-01-08  Jim Wilson  <jimw@sifive.com>
  
! 	* config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
! 	use of TLS_MODEL_LOCAL_EXEC when not pic.
  
! 2020-01-08  David Malcolm  <dmalcolm@redhat.com>
  
! 	* hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
! 	memory leak.
  
! 2020-01-08  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93187
! 	* config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
! 	*stack_protect_set_3 peephole2): Also check that the second
! 	insns source is general_operand.
  
! 	PR target/93174
! 	* config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
! 	predicate for output operand instead of register_operand.
! 	(addcarry<mode>, addcarry<mode>_1): Likewise.  Add alternative with
! 	memory destination and non-memory operands[2].
  
! 2020-01-08  Martin Liska  <mliska@suse.cz>
  
! 	* cgraph.c (cgraph_node::dump): Use ::dump_name or
! 	::dump_asm_name instead of (::name or ::asm_name).
! 	* cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
! 	* cgraphunit.c (walk_polymorphic_call_targets): Likewise.
! 	(analyze_functions): Likewise.
! 	(expand_all_functions): Likewise.
! 	* ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
! 	(propagate_bits_across_jump_function): Likewise.
! 	(dump_profile_updates): Likewise.
! 	(ipcp_store_bits_results): Likewise.
! 	(ipcp_store_vr_results): Likewise.
! 	* ipa-devirt.c (dump_targets): Likewise.
! 	* ipa-fnsummary.c (analyze_function_body): Likewise.
! 	* ipa-hsa.c (check_warn_node_versionable): Likewise.
! 	(process_hsa_functions): Likewise.
! 	* ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
! 	(set_alias_uids): Likewise.
! 	* ipa-inline-transform.c (save_inline_function_body): Likewise.
! 	* ipa-inline.c (recursive_inlining): Likewise.
! 	(inline_to_all_callers_1): Likewise.
! 	(ipa_inline): Likewise.
! 	* ipa-profile.c (ipa_propagate_frequency_1): Likewise.
! 	(ipa_propagate_frequency): Likewise.
! 	* ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
! 	(remove_described_reference): Likewise.
! 	* ipa-pure-const.c (worse_state): Likewise.
! 	(check_retval_uses): Likewise.
! 	(analyze_function): Likewise.
! 	(propagate_pure_const): Likewise.
! 	(propagate_nothrow): Likewise.
! 	(dump_malloc_lattice): Likewise.
! 	(propagate_malloc): Likewise.
! 	(pass_local_pure_const::execute): Likewise.
! 	* ipa-visibility.c (optimize_weakref): Likewise.
! 	(function_and_variable_visibility): Likewise.
! 	* ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
! 	(ipa_discover_variable_flags): Likewise.
! 	* lto-streamer-out.c (output_function): Likewise.
! 	(output_constructor): Likewise.
! 	* tree-inline.c (copy_bb): Likewise.
! 	* tree-ssa-structalias.c (ipa_pta_execute): Likewise.
! 	* varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
  
! 2020-01-08  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/93199
! 	* tree-eh.c (sink_clobbers): Update virtual operands for
! 	the first and last stmt only.  Add a dry-run capability.
! 	(pass_lower_eh_dispatch::execute): Perform clobber sinking
! 	after CFG manipulations and in RPO order to catch all
! 	secondary opportunities reliably.
  
! 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
  
! 	PR target/93182
! 	* doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
  
  2019-01-08  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/93199
! 	* gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
! 	* tree-ssa-loop-im.c (move_computations_worker): Properly adjust
! 	virtual operand, also updating SSA use.
! 	* gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
! 	Update stmt after resetting virtual operand.
! 	(tree_loop_interchange::move_code_to_inner_loop): Likewise.
! 	* gimple-iterator.c (gsi_remove): When not removing the stmt
! 	permanently do not delink immediate uses or mark the stmt modified.
  
! 2020-01-08  Martin Liska  <mliska@suse.cz>
  
! 	* ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
! 	(ipa_call_context::estimate_size_and_time): Likewise.
! 	(inline_analyze_function): Likewise.
  
! 2020-01-08  Martin Liska  <mliska@suse.cz>
  
! 	* cgraph.c (cgraph_node::dump): Use systematically
! 	dump_asm_name.
  
! 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
  
! 	Add -nodevicespecs option for avr.
  
! 	PR target/93182
! 	* config/avr/avr.opt (-nodevicespecs): New driver option.
! 	* config/avr/driver-avr.c (avr_devicespecs_file): Only issue
! 	"-specs=device-specs/..." if that option is not set.
! 	* doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
  
! 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
  
! 	Implement 64-bit double functions for avr.
  
! 	PR target/92055
! 	* config.gcc (tm_defines) [target=avr]: Support --with-libf7,
! 	--with-double-comparison.
! 	* doc/install.texi: Document them.
! 	* config/avr/avr-c.c (avr_cpu_cpp_builtins)
! 	<WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
! 	<WITH_DOUBLE_COMPARISON>: New built-in defines.
! 	* doc/invoke.texi (AVR Built-in Macros): Document them.
! 	* config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
! 	* config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
! 	* config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
  
! 2020-01-08  Richard Earnshaw  <rearnsha@arm.com>
  
! 	PR target/93188
! 	* config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
! 	armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
! 	when only building rm-profile multilibs.
  
! 2020-01-08  Feng Xue  <fxue@os.amperecomputing.com>
  
! 	PR ipa/93084
! 	* ipa-cp.c (self_recursively_generated_p): Find matched aggregate
! 	lattice for a value to check.
! 	(propagate_vals_across_arith_jfunc): Add an assertion to ensure
! 	finite propagation in self-recursive scc.
  
! 2020-01-08  Luo Xiong Hu  <luoxhu@linux.ibm.com>
  
! 	* ipa-inline.c (caller_growth_limits): Restore the AND.
  
! 2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
! 	(VEC_ALLREG_ALT): New iterator.
! 	(VEC_ALLREG_INT_MODE): New iterator.
! 	(VCMP_MODE): New iterator.
! 	(VCMP_MODE_INT): New iterator.
! 	(vec_cmpu<mode>di): Use VCMP_MODE_INT.
! 	(vec_cmp<u>v64qidi): New define_expand.
! 	(vec_cmp<mode>di_exec): Use VCMP_MODE.
! 	(vec_cmpu<mode>di_exec): New define_expand.
! 	(vec_cmp<u>v64qidi_exec): New define_expand.
! 	(vec_cmp<mode>di_dup): Use VCMP_MODE.
! 	(vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
! 	(vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
! 	(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
! 	(vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
! 	(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
! 	(vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
! 	(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
! 	(vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
! 	(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
! 	this.
! 	* config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
! 	* config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
  
! 2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/constraints.md (DA): Update description and match.
! 	(DB): Likewise.
! 	(Db): New constraint.
! 	* config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
! 	parameter.
! 	* config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
! 	Implement 'Db' mixed immediate type.
! 	* config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
! 	(addcv64si3_dup<exec_vcc>): Delete.
! 	(subcv64si3<exec_vcc>): Rework constraints.
! 	(addv64di3): Rework constraints.
! 	(addv64di3_exec): Rework constraints.
! 	(subv64di3): Rework constraints.
! 	(addv64di3_dup): Delete.
! 	(addv64di3_dup_exec): Delete.
! 	(addv64di3_zext): Rework constraints.
! 	(addv64di3_zext_exec): Rework constraints.
! 	(addv64di3_zext_dup): Rework constraints.
! 	(addv64di3_zext_dup_exec): Rework constraints.
! 	(addv64di3_zext_dup2): Rework constraints.
! 	(addv64di3_zext_dup2_exec): Rework constraints.
! 	(addv64di3_sext_dup2): Rework constraints.
! 	(addv64di3_sext_dup2_exec): Rework constraints.
  
! 2020-01-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  
! 	* doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
! 	existing target checks.
  
! 2020-01-07  Richard Biener  <rguenther@suse.de>
  
! 	* doc/install.texi: Bump minimal supported MPC version.
  
! 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* langhooks-def.h (lhd_simulate_enum_decl): Declare.
! 	(LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
! 	* langhooks.c: Include stor-layout.h.
! 	(lhd_simulate_enum_decl): New function.
! 	* config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
! 	handle_arm_sve_h for the LTO frontend.
! 	(register_vector_type): Cope with null returns from pushdecl.
  
! 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
! 	(aarch64_sve::nvectors_if_data_type): Replace with...
! 	(aarch64_sve::builtin_type_p): ...this.
! 	* config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
! 	(find_vector_type): Delete.
! 	(add_sve_type_attribute): New function.
! 	(lookup_sve_type_attribute): Likewise.
! 	(register_builtin_types): Add an "SVE type" attribute to each type.
! 	(register_tuple_type): Likewise.
! 	(svbool_type_p, nvectors_if_data_type): Delete.
! 	(mangle_builtin_type): Use lookup_sve_type_attribute.
! 	(builtin_type_p): Likewise.  Add an overload that returns the
! 	number of constituent vector and predicate registers.
! 	* config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
! 	(aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
! 	instead of aarch64_sve_argument_p.
! 	(aarch64_takes_arguments_in_sve_regs_p): Likewise.
! 	(aarch64_pass_by_reference): Likewise.
! 	(aarch64_function_value_1): Likewise.
! 	(aarch64_return_in_memory): Likewise.
! 	(aarch64_layout_arg): Likewise.
  
! 2020-01-07  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR tree-optimization/93156
! 	* tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
! 	least significant bit is always clear.
  
! 	PR tree-optimization/93118
! 	* match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?.  Add new
! 	simplifier with two intermediate conversions.
  
! 2020-01-07  Martin Liska  <mliska@suse.cz>
  
! 	* params.opt: Add Optimization for various parameters.
  
! 2020-01-07  Martin Liska  <mliska@suse.cz>
  
! 	PR ipa/83411
! 	* doc/extend.texi: Explain cloning for target_clone
! 	attribute.
  
! 2020-01-07  Martin Liska  <mliska@suse.cz>
  
! 	PR tree-optimization/92860
! 	* common.opt: Make in Optimization option
! 	as it is affected by -O0, which is an Optimization
! 	option.
! 	* tree-inline.c (tree_inlinable_function_p):
! 	Use opt_for_fn for warn_inline.
! 	(expand_call_inline): Likewise.
  
! 2020-01-07  Martin Liska  <mliska@suse.cz>
  
! 	PR tree-optimization/92860
! 	* common.opt: Make flag_ree as optimization
! 	attribute. 
  
! 2020-01-07  Martin Liska  <mliska@suse.cz>
  
! 	PR optimization/92860
! 	* params.opt: Mark param_min_crossjump_insns with Optimization
! 	keyword.
  
! 2020-01-07  Luo Xiong Hu  <luoxhu@linux.ibm.com>
  
! 	* ipa-inline-analysis.c (estimate_growth): Fix typo.
! 	* ipa-inline.c (caller_growth_limits): Use OR instead of AND.
  
! 2020-01-06  Michael Meissner  <meissner@linux.ibm.com>
  
! 	* config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
! 	helper function to return the valid addressing formats for a given
! 	hard register and mode.
! 	(rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
  
! 	* config/rs6000/constraints.md (Q constraint): Update
! 	documentation.
! 	* doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
! 	documentation.
  
! 	* config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
! 	Use 'Q' for doing vector extract from memory.
! 	(vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
! 	memory.
! 	(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
! 	doing vector extract from memory.
! 	(vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
! 	extract from memory.
  
! 	* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
! 	for the offset being 34-bits when -mcpu=future is used.
  
! 2020-01-06  John David Anglin  <danglin@gcc.gnu.org>
  
! 	* config/pa/pa.md: Revert change to use ordered_comparison_operator
! 	instead of cmpib_comparison_operator in cmpib patterns.
! 	* config/pa/predicates.md (cmpib_comparison_operator): Revert removal
! 	of cmpib_comparison_operator.  Revise comment.
  
! 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
! 	in an IFN_DIV_POW2 node to be equal.
  
! 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
! 	(vect_check_scalar_mask): ...this.
! 	(vectorizable_store, vectorizable_load): Update call accordingly.
! 	(vectorizable_call): Use vect_check_scalar_mask to check the mask
! 	argument in calls to conditional internal functions.
  
! 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
! 	'0' matching inputs.
! 	(subv64di3_exec): Likewise.
  
! 2020-01-06  Bryan Stenson  <bryan@siliconvortex.com>
  
! 	* config/mips/mips.c (vr4130_align_insns): Fix typo.
! 	* doc/md.texi (movstr): Likewise.
  
! 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
! 	clobber.
  
! 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
! 	Depend on...
! 	(s-aarch64-tune-md): ...this new stamp file.  Pipe the new contents
! 	to a temporary file and use move-if-change to update the real
! 	file where necessary.
  
! 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
! 	rather than Upa for CPY /M.
  
! 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
  
! 	* config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
! 	immediate.
  
! 2020-01-06  Martin Liska  <mliska@suse.cz>
  
!     PR tree-optimization/92860
!     * params.opt: Mark param_max_combine_insns with Optimization
!     keyword. 
  
! 2020-01-05  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93141
! 	* config/i386/i386.md (SWIDWI): New mode iterator.
! 	(DWI, dwi): Add TImode variants.
! 	(addv<mode>4): Use SWIDWI iterator instead of SWI.  Use
! 	<general_hilo_operand> instead of <general_operand>.  Use
! 	CONST_SCALAR_INT_P instead of CONST_INT_P.
! 	(*addv<mode>4_1): Rename to ...
! 	(addv<mode>4_1): ... this.
! 	(QWI): New mode attribute.
! 	(*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
! 	define_insn_and_split patterns.
! 	(*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
! 	patterns.
! 	(uaddv<mode>4): Use SWIDWI iterator instead of SWI.  Use
! 	<general_hilo_operand> instead of <general_operand>.
! 	(*addcarry<mode>_1): New define_insn.
! 	(*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
  
! 2020-01-03  Konstantin Kharlamov  <Hi-Angel@yandex.ru>
  
! 	* gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
! 	Use "call" instead of "set".
  
! 2020-01-03  Martin Jambor  <mjambor@suse.cz>
  
! 	PR ipa/92917
! 	* ipa-cp.c (print_all_lattices): Skip functions without info.
  
! 2020-01-03  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR target/93089
! 	* config/i386/i386-options.c (ix86_simd_clone_adjust): If
! 	TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
! 	simd clones.  If TARGET_PREFER_AVX256, use prefer-vector-width=512
! 	for 'e' simd clones.
  
! 	PR target/93089
! 	* config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
! 	entry.
! 	(mprefer-vector-width=): Add Save.
! 	* config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
! 	-mprefer-vector-width= if non-zero.  Fix up -mfpmath= comment.
! 	(ix86_debug_options, ix86_function_specific_print): Adjust
! 	ix86_target_string callers.
! 	(ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
! 	(ix86_valid_target_attribute_tree): Likewise.
! 	* config/i386/i386-options.h (ix86_target_string): Add PVW argument.
! 	* config/i386/i386-expand.c (ix86_expand_builtin): Adjust
! 	ix86_target_string caller.
  
! 	PR target/93110
! 	* config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
! 	emitting ASHIFTRT, XOR and MINUS by hand.  Use gen_int_mode with QImode
! 	instead of gen_int_shift_amount + convert_modes.
  
! 	PR rtl-optimization/93088
! 	* loop-iv.c (find_single_def_src): Punt after looking through
! 	128 reg copies for regs with single definitions.  Move definitions
! 	to first uses.
  
! 2020-01-02  Dennis Zhang  <dennis.zhang@arm.com>
  
! 	* config/arm/arm-c.c (arm_cpu_builtins): Define
! 	__ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
! 	__ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
! 	__ARM_BF16_FORMAT_ALTERNATIVE when enabled.
! 	* config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
! 	* config/arm/arm-tables.opt: Regenerated.
! 	* config/arm/arm.c (arm_option_reconfigure_globals): Initialize
! 	arm_arch_i8mm and arm_arch_bf16 when enabled.
! 	* config/arm/arm.h (TARGET_I8MM): New macro.
! 	(TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
! 	* config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
! 	* config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
! 	* config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
! 	(v8_6_a_simd_variants): New.
! 	(v8_*_a_simd_variants): Add i8mm and bf16.
! 	* doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
  
! 2020-01-02  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR ipa/93087
! 	* predict.c (compute_function_frequency): Don't call
! 	warn_function_cold on functions that already have cold attribute.
  
! 2020-01-01  John David Anglin  <danglin@gcc.gnu.org>
  
! 	PR target/67834
! 	* config/pa/pa.c (pa_elf_select_rtx_section): New.  Put references to
! 	COMDAT group function labels in .data.rel.ro.local section.
! 	* config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
  
! 	PR target/93111
! 	* config/pa/pa.md (scc): Use ordered_comparison_operator instead of
! 	comparison_operator in B and S integer comparisons.  Likewise, use
! 	ordered_comparison_operator instead of cmpib_comparison_operator in
! 	cmpib patterns.
! 	* config/pa/predicates.md (cmpib_comparison_operator): Remove.
  
! 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
  
  	Update copyright years.
  
***************
*** 10542,10549 ****
  	* doc/gcov.texi: Ditto.
  	* doc/install.texi: Ditto.
  	* doc/invoke.texi: Ditto.
  
! Copyright (C) 2019 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
--- 15849,15870 ----
  	* doc/gcov.texi: Ditto.
  	* doc/install.texi: Ditto.
  	* doc/invoke.texi: Ditto.
+ 
+ 2020-01-01  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa.c (walk_polymorphic_call_targets): Fix updating of overall
+ 	summary.
+ 
+ 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/93098
+ 	* match.pd (popcount): For shift amounts, use integer_onep
+ 	or wi::to_widest () == cst instead of tree_to_uhwi () == cst
+ 	tests.  Make sure that precision is power of two larger than or equal
+ 	to 16.  Ensure shift is never negative.  Use HOST_WIDE_INT_UC macro
+ 	instead of ULL suffixed constants.  Formatting fixes.
  
! Copyright (C) 2020 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
diff -Nrcpad gcc-9.3.0/gcc/ChangeLog-2009 gcc-10.1.0/gcc/ChangeLog-2009
*** gcc-9.3.0/gcc/ChangeLog-2009	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ChangeLog-2009	Thu May  7 10:49:59 2020
***************
*** 14477,14483 ****
  	(aapcs_layout_arg): New function.
  	(arm_init_cumulative_args): Initialize AAPCS args data.
  	(arm_function_arg): Handle AAPCS variants using new interface.
! 	(arm_arg_parital_bytes): Likewise.
  	(arm_function_arg_advance): New function.
  	(arm_function_ok_for_sibcall): Ensure that sibling calls agree on
  	calling conventions.
--- 14477,14483 ----
  	(aapcs_layout_arg): New function.
  	(arm_init_cumulative_args): Initialize AAPCS args data.
  	(arm_function_arg): Handle AAPCS variants using new interface.
! 	(arm_arg_partial_bytes): Likewise.
  	(arm_function_arg_advance): New function.
  	(arm_function_ok_for_sibcall): Ensure that sibling calls agree on
  	calling conventions.
diff -Nrcpad gcc-9.3.0/gcc/ChangeLog-2018 gcc-10.1.0/gcc/ChangeLog-2018
*** gcc-9.3.0/gcc/ChangeLog-2018	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ChangeLog-2018	Thu May  7 10:49:59 2020
***************
*** 836,841 ****
--- 836,843 ----
  	substituting by zero.
  
  2018-12-17  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+ 	    Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  
  	* doc/invoke.texi (-fversion-loops-for-strides): Document
  	(loop-versioning-group-size, loop-versioning-max-inner-insns)
diff -Nrcpad gcc-9.3.0/gcc/ChangeLog-2019 gcc-10.1.0/gcc/ChangeLog-2019
*** gcc-9.3.0/gcc/ChangeLog-2019	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ChangeLog-2019	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,37052 ----
+ 2020-12-31  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vectorizable_condition): Only nullify cond_expr
+ 	if we've created a new condition.  Don't nullify it if we've decided
+ 	to keep it and then invert the result.
+ 
+ 2020-12-31  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-loop-manip.c (create_lcssa_for_virtual_phi): Return
+ 	the incoming virtual operand definition.
+ 	(vect_do_peeling): When vectorizing an epilogue loop, handle the
+ 	case in which the main loop has a virtual phi and the epilogue
+ 	and scalar loops don't.  Restore an earlier comment about the
+ 	update_ssa call.
+ 
+ 2019-12-30  Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* config/vxworks/stdint.h: New file.  Include _yvals.h
+ 	then stdint-gcc.h.
+ 	* config/t-vxworks: Arrange to install the stdint.h wrapper.
+ 	* config.gcc (*-*-vxworks*): Add stdint-gcc.h to $extra_headers
+ 	so it gets copied.  Set use_gcc_stdint to request _not_ crafting
+ 	stdint.h through the common Makefile rules.
+ 
+ 2019-12-30  Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* config/vxworks/_yvals.h: New file.
+ 	* config/vxworks/_yvals-wrapper.h: New file.
+ 	* gcc/config/vxworks/math.h: Use it to wrap the VxWorks
+ 	math.h header.
+ 	* gcc/config/vxworks/complex.h: Likewise.
+ 	* gcc/config/vxworks/setjmp.h: Likewise.
+ 	* gcc/config/vxworks/inttypes.h: Likewise.
+ 	* config.gcc (*-*-vxworks*): Add system header wrappers
+ 	to extra_headers.
+ 	(powerpc-*-vxworks*): Reuse the common extra_headers.
+ 
+ 2019-12-30  Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* config/vxworks/_vxworks-versions.h: New file.
+ 	* config.gcc (*-*-vxworks*): Add it to extra_headers.
+ 
+ 2019-12-30  Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* config/t-vxworks: Rework the vxworks.o compilation
+ 	rules to use $(COMPILE).
+ 
+ 2019-12-30  Joel Brobecker  <brobecker@adacore.com>
+ 
+ 	* config.gcc <*-*-vxworks*>: Add vxworks-c.o to c_target_objs
+ 	and cxx_target_objs. Set target_has_targetcm to "yes". Add
+ 	vxworks-predef.h to extra_headers.
+ 	* config/t-vxworks (vxworks-c.o): New target.
+ 	* config/vxworks-c.c: New file.
+ 	* config/vxworks/vxworks-predef.h: New file.
+ 
+ 2019-12-30  Alexandre Oliva  <oliva@adacore.com>
+             Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* config/vx-common.h (WCHAR_TYPE_SIZE): 32 on VxWorks 7.
+ 	(WCHAR_TYPE): Pick accordingly.
+ 	(WINT_TYPE_SIZE): Define in terms of WCHAR_TYPE_SIZE.
+ 	(WINT_TYPE): Define in terms of WCHAR_TYPE.
+ 
+ 2019-12-30  Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* config/vx-common.h: Minor reorganization and add
+ 	sectioning comments.
+ 
+ 2019-12-30  Doug Rupp  <rupp@adacore.com>
+ 
+ 	* config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Define.
+ 
+ 2019-12-30  Olivier Hainque  <hainque@adacore.com>
+             Jerome Lambourg  <labourg@adacore.com>
+ 
+ 	* config/t-vxworks: Arrange to alter/restore glimits.h
+ 	before/after stmp-int-hdrs, so it uses a different macro
+ 	name to protect itself against recursive inclusions.
+ 
+ 2019-12-30  Peter Bergner <bergner@linux.ibm.com>
+ 
+ 	PR target/92923
+ 	* config/rs6000/rs6000-builtin.def (VAND, VANDC, VNOR, VOR, VXOR):
+ 	Delete.
+ 	(EQV_V16QI_UNS, EQV_V8HI_UNS, EQV_V4SI_UNS, EQV_V2DI_UNS, EQV_V1TI_UNS,
+ 	NAND_V16QI_UNS, NAND_V8HI_UNS, NAND_V4SI_UNS, NAND_V2DI_UNS,
+ 	NAND_V1TI_UNS, ORC_V16QI_UNS, ORC_V8HI_UNS, ORC_V4SI_UNS, ORC_V2DI_UNS,
+ 	ORC_V1TI_UNS, VAND_V16QI_UNS, VAND_V16QI, VAND_V8HI_UNS, VAND_V8HI,
+ 	VAND_V4SI_UNS, VAND_V4SI, VAND_V2DI_UNS, VAND_V2DI, VAND_V4SF,
+ 	VAND_V2DF, VANDC_V16QI_UNS, VANDC_V16QI, VANDC_V8HI_UNS, VANDC_V8HI,
+ 	VANDC_V4SI_UNS, VANDC_V4SI, VANDC_V2DI_UNS, VANDC_V2DI, VANDC_V4SF,
+ 	VANDC_V2DF, VNOR_V16QI_UNS, VNOR_V16QI, VNOR_V8HI_UNS, VNOR_V8HI,
+ 	VNOR_V4SI_UNS, VNOR_V4SI, VNOR_V2DI_UNS, VNOR_V2DI, VNOR_V4SF,
+ 	VNOR_V2DF, VOR_V16QI_UNS, VOR_V16QI, VOR_V8HI_UNS, VOR_V8HI,
+ 	VOR_V4SI_UNS, VOR_V4SI, VOR_V2DI_UNS, VOR_V2DI, VOR_V4SF, VOR_V2DF,
+ 	VXOR_V16QI_UNS, VXOR_V16QI, VXOR_V8HI_UNS, VXOR_V8HI,
+ 	VXOR_V4SI_UNS, VXOR_V4SI, VXOR_V2DI_UNS, VXOR_V2DI, VXOR_V4SF,
+ 	VXOR_V2DF): Add definitions.
+ 	* config/rs6000/rs6000-call.c (altivec_overloaded_builtins)
+ 	<ALTIVEC_BUILTIN_VAND, ALTIVEC_BUILTIN_VANDC, ALTIVEC_BUILTIN_VNOR,
+ 	ALTIVEC_BUILTIN_VOR, ALTIVEC_BUILTIN_VXOR>: Remove.
+ 	<ALTIVEC_BUILTIN_VAND_V4SF, ALTIVEC_BUILTIN_VAND_V2DF,
+ 	ALTIVEC_BUILTIN_VAND_V2DI, ALTIVEC_BUILTIN_VAND_V2DI_UNS,
+ 	ALTIVEC_BUILTIN_VAND_V4SI_UNS, ALTIVEC_BUILTIN_VAND_V4SI,
+ 	ALTIVEC_BUILTIN_VAND_V8HI_UNS, ALTIVEC_BUILTIN_VAND_V8HI,
+ 	ALTIVEC_BUILTIN_VAND_V16QI, ALTIVEC_BUILTIN_VAND_V16QI_UNS,
+ 	ALTIVEC_BUILTIN_VANDC_V4SF, ALTIVEC_BUILTIN_VANDC_V2DF,
+ 	ALTIVEC_BUILTIN_VANDC_V2DI, ALTIVEC_BUILTIN_VANDC_V2DI_UNS,
+ 	ALTIVEC_BUILTIN_VANDC_V4SI_UNS, ALTIVEC_BUILTIN_VANDC_V4SI,
+ 	ALTIVEC_BUILTIN_VANDC_V8HI_UNS, ALTIVEC_BUILTIN_VANDC_V8HI,
+ 	ALTIVEC_BUILTIN_VANDC_V16QI, ALTIVEC_BUILTIN_VANDC_V16QI_UNS,
+ 	ALTIVEC_BUILTIN_VNOR_V4SF, ALTIVEC_BUILTIN_VNOR_V2DF,
+ 	ALTIVEC_BUILTIN_VNOR_V2DI, ALTIVEC_BUILTIN_VNOR_V2DI_UNS,
+ 	ALTIVEC_BUILTIN_VNOR_V4SI, ALTIVEC_BUILTIN_VNOR_V4SI_UNS,
+ 	ALTIVEC_BUILTIN_VNOR_V8HI, ALTIVEC_BUILTIN_VNOR_V8HI_UNS,
+ 	ALTIVEC_BUILTIN_VNOR_V16QI, ALTIVEC_BUILTIN_VNOR_V16QI_UNS,
+ 	ALTIVEC_BUILTIN_VOR_V4SF, ALTIVEC_BUILTIN_VOR_V2DF,
+ 	ALTIVEC_BUILTIN_VOR_V2DI, ALTIVEC_BUILTIN_VOR_V2DI_UNS,
+ 	ALTIVEC_BUILTIN_VOR_V4SI_UNS, ALTIVEC_BUILTIN_VOR_V4SI,
+ 	ALTIVEC_BUILTIN_VOR_V8HI_UNS, ALTIVEC_BUILTIN_VOR_V8HI,
+ 	ALTIVEC_BUILTIN_VOR_V16QI, ALTIVEC_BUILTIN_VOR_V16QI_UNS,
+ 	ALTIVEC_BUILTIN_VXOR_V4SF, ALTIVEC_BUILTIN_VXOR_V2DF,
+ 	ALTIVEC_BUILTIN_VXOR_V2DI, ALTIVEC_BUILTIN_VXOR_V2DI_UNS,
+ 	ALTIVEC_BUILTIN_VXOR_V4SI_UNS, ALTIVEC_BUILTIN_VXOR_V4SI,
+ 	ALTIVEC_BUILTIN_VXOR_V8HI, ALTIVEC_BUILTIN_VXOR_V8HI_UNS,
+ 	ALTIVEC_BUILTIN_VXOR_V16QI, ALTIVEC_BUILTIN_VXOR_V16QI_UNS>: Add
+ 	definitions.
+ 	<P8V_BUILTIN_EQV_V16QI, P8V_BUILTIN_EQV_V8HI, P8V_BUILTIN_EQV_V4SI,
+ 	P8V_BUILTIN_EQV_V2DI, P8V_BUILTIN_NAND_V16QI, P8V_BUILTIN_NAND_V8HI,
+ 	P8V_BUILTIN_NAND_V4SI, P8V_BUILTIN_NAND_V2DI, P8V_BUILTIN_ORC_V16QI,
+ 	P8V_BUILTIN_ORC_V8HI, P8V_BUILTIN_ORC_V4SI,
+ 	P8V_BUILTIN_ORC_V2DI>: Change unsigned usages to use the new *_UNS
+ 	definition names.
+ 	(rs6000_gimple_fold_builtin) <ALTIVEC_BUILTIN_VAND_V16QI_UNS,
+ 	ALTIVEC_BUILTIN_VAND_V16QI, ALTIVEC_BUILTIN_VAND_V8HI_UNS,
+ 	ALTIVEC_BUILTIN_VAND_V8HI, ALTIVEC_BUILTIN_VAND_V4SI_UNS,
+ 	ALTIVEC_BUILTIN_VAND_V4SI, ALTIVEC_BUILTIN_VAND_V2DI_UNS,
+ 	ALTIVEC_BUILTIN_VAND_V2DI, ALTIVEC_BUILTIN_VAND_V4SF,
+ 	ALTIVEC_BUILTIN_VAND_V2DF, ALTIVEC_BUILTIN_VANDC_V16QI_UNS,
+ 	ALTIVEC_BUILTIN_VANDC_V16QI, ALTIVEC_BUILTIN_VANDC_V8HI_UNS,
+ 	ALTIVEC_BUILTIN_VANDC_V8HI, ALTIVEC_BUILTIN_VANDC_V4SI_UNS,
+ 	ALTIVEC_BUILTIN_VANDC_V4SI, ALTIVEC_BUILTIN_VANDC_V2DI_UNS,
+ 	ALTIVEC_BUILTIN_VANDC_V2DI, ALTIVEC_BUILTIN_VANDC_V4SF,
+ 	ALTIVEC_BUILTIN_VANDC_V2DF, P8V_BUILTIN_NAND_V16QI_UNS,
+ 	P8V_BUILTIN_NAND_V8HI_UNS, P8V_BUILTIN_NAND_V4SI_UNS,
+ 	P8V_BUILTIN_NAND_V2DI_UNS, P8V_BUILTIN_NAND_V2DI,
+ 	ALTIVEC_BUILTIN_VOR_V16QI_UNS, ALTIVEC_BUILTIN_VOR_V16QI,
+ 	ALTIVEC_BUILTIN_VOR_V8HI_UNS, ALTIVEC_BUILTIN_VOR_V8HI,
+ 	ALTIVEC_BUILTIN_VOR_V4SI_UNS, ALTIVEC_BUILTIN_VOR_V4SI,
+ 	ALTIVEC_BUILTIN_VOR_V2DI_UNS, ALTIVEC_BUILTIN_VOR_V2DI,
+ 	ALTIVEC_BUILTIN_VOR_V4SF, ALTIVEC_BUILTIN_VOR_V2DF,
+ 	P8V_BUILTIN_ORC_V16QI_UNS, P8V_BUILTIN_ORC_V8HI_UNS,
+ 	P8V_BUILTIN_ORC_V4SI_UNS, P8V_BUILTIN_ORC_V2DI_UNS,
+ 	P8V_BUILTIN_ORC_V2DI, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
+ 	ALTIVEC_BUILTIN_VXOR_V16QI, ALTIVEC_BUILTIN_VXOR_V8HI_UNS,
+ 	ALTIVEC_BUILTIN_VXOR_V8HI, ALTIVEC_BUILTIN_VXOR_V4SI_UNS,
+ 	ALTIVEC_BUILTIN_VXOR_V4SI, ALTIVEC_BUILTIN_VXOR_V2DI_UNS,
+ 	ALTIVEC_BUILTIN_VXOR_V2DI, ALTIVEC_BUILTIN_VXOR_V4SF,
+ 	ALTIVEC_BUILTIN_VXOR_V2DF, ALTIVEC_BUILTIN_VNOR_V16QI_UNS,
+ 	ALTIVEC_BUILTIN_VNOR_V16QI, ALTIVEC_BUILTIN_VNOR_V8HI_UNS,
+ 	ALTIVEC_BUILTIN_VNOR_V8HI, ALTIVEC_BUILTIN_VNOR_V4SI_UNS,
+ 	ALTIVEC_BUILTIN_VNOR_V4SI, ALTIVEC_BUILTIN_VNOR_V2DI_UNS,
+ 	ALTIVEC_BUILTIN_VNOR_V2DI, ALTIVEC_BUILTIN_VNOR_V4SF,
+ 	ALTIVEC_BUILTIN_VNOR_V2DF>: Use new definition names.
+ 	(builtin_function_type) <ALTIVEC_BUILTIN_VAND_V16QI_UNS,
+ 	ALTIVEC_BUILTIN_VAND_V8HI_UNS, ALTIVEC_BUILTIN_VAND_V4SI_UNS,
+ 	ALTIVEC_BUILTIN_VAND_V2DI_UNS, ALTIVEC_BUILTIN_VANDC_V16QI_UNS,
+ 	ALTIVEC_BUILTIN_VANDC_V8HI_UNS, ALTIVEC_BUILTIN_VANDC_V4SI_UNS,
+ 	ALTIVEC_BUILTIN_VANDC_V2DI_UNS, ALTIVEC_BUILTIN_VNOR_V16QI_UNS,
+ 	ALTIVEC_BUILTIN_VNOR_V8HI_UNS, ALTIVEC_BUILTIN_VNOR_V4SI_UNS,
+ 	ALTIVEC_BUILTIN_VNOR_V2DI_UNS, ALTIVEC_BUILTIN_VOR_V16QI_UNS,
+ 	ALTIVEC_BUILTIN_VOR_V8HI_UNS, ALTIVEC_BUILTIN_VOR_V4SI_UNS,
+ 	ALTIVEC_BUILTIN_VOR_V2DI_UNS, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
+ 	ALTIVEC_BUILTIN_VXOR_V8HI_UNS, ALTIVEC_BUILTIN_VXOR_V4SI_UNS,
+ 	ALTIVEC_BUILTIN_VXOR_V2DI_UNS, P8V_BUILTIN_EQV_V16QI_UNS,
+ 	P8V_BUILTIN_EQV_V8HI_UNS, P8V_BUILTIN_EQV_V4SI_UNS,
+ 	P8V_BUILTIN_EQV_V2DI_UNS, P8V_BUILTIN_EQV_V1TI_UNS,
+ 	P8V_BUILTIN_NAND_V16QI_UNS, P8V_BUILTIN_NAND_V8HI_UNS,
+ 	P8V_BUILTIN_NAND_V4SI_UNS, P8V_BUILTIN_NAND_V2DI_UNS,
+ 	P8V_BUILTIN_NAND_V1TI_UNS, P8V_BUILTIN_ORC_V16QI_UNS,
+ 	P8V_BUILTIN_ORC_V8HI_UNS, P8V_BUILTIN_ORC_V4SI_UNS,
+ 	P8V_BUILTIN_ORC_V2DI_UNS, P8V_BUILTIN_ORC_V1TI_UNS>: Handle unsigned
+ 	builtins.
+ 
+ 2019-12-29  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/93078
+ 	* config/i386/i386-builtins.c (ix86_builtin_vectorized_function):
+ 	Remove CASE_CFN_RINT handling.
+ 	* config/i386/i386-builtin.def (IX86_BUILTIN_RINTPD,
+ 	IX86_BUILTIN_RINTPS, IX86_BUILTIN_RINTPD256, IX86_BUILTIN_RINTPS256):
+ 	Remove.
+ 	* config/i386/sse.md (nearbyint<mode>2, rint<mode>2): New expanders
+ 	with VF iterator.
+ 
+ 2019-12-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vect_get_strided_load_store_ops): Copy
+ 	DR_STEP before gimplifying it.
+ 
+ 2019-12-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vectorizable_condition): For extract-last
+ 	reductions, check that the target supports the required comparison
+ 	operation.
+ 
+ 2019-12-27  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (V_INT_CONTAINER): Fix VNx2SF entry.
+ 
+ 2019-12-27  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-loop.c (vectorizable_reduction): Check whether the
+ 	target supports the required VEC_COND_EXPR operation before
+ 	allowing the fallback handling of masked fold-left reductions.
+ 
+ 2019-12-24  Jiufu Guo  <guojiufu@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Enable
+ 	-fweb and -frename-registers with -funroll-loops
+ 
+ 2019-12-22  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* doc/invoke.texi (-flto): Use "compile time" as a noun.
+ 
+ 2019-12-21  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/93015
+ 	* ipa-cp.c (ipcp_store_vr_results): Check that info exists
+ 
+ 2019-12-20   Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/predicates.md (cint34_operand): Use
+ 	SIGNED_INTEGER_34BIT_P macro.
+ 	* config/rs6000/rs6000.c (num_insns_constant_gpr): Use the
+ 	SIGNED_INTEGER_16BIT_P and SIGNED_INTEGER_34BIT_P macros.
+ 	(address_to_insn_form): Use the SIGNED_INTEGER_16BIT_P and
+ 	SIGNED_INTEGER_34BIT_P macros.
+ 	* config/rs6000/rs6000.h (SIGNED_INTEGER_NBIT_P): New macro.
+ 	(SIGNED_INTEGER_16BIT_P): Rename SIGNED_16BIT_OFFSET_P to be
+ 	SIGNED_INTEGER_34BIT_P.
+ 	(SIGNED_INTEGER_34BIT_P): Rename SIGNED_34BIT_OFFSET_P to be
+ 	SIGNED_INTEGER_34BIT_P.
+ 
+ 2019-12-20  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* doc/sourcebuild.texi
+ 	(arm_v8_2a_bf16_neon_ok): Document new target supports option.
+ 	(arm_v8_2a_i8mm_ok): Likewise.
+ 
+ 2019-12-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/92841
+ 	* config/i386/i386.md (*stack_protect_set_3): For pic_32bit_operand
+ 	always use lea{q}, no matter what value which_alternative has.
+ 
+ 	PR target/93002
+ 	* config/i386/i386.md (dec reg; cmp $-1, reg; jne lab): New
+ 	define_peephole2.
+ 
+ 2019-12-19  Julian Brown  <julian@codesourcery.com>
+ 
+ 	* gimplify.c (gimplify_omp_var_data): Add GOVD_MAP_HAS_ATTACHMENTS.
+ 	(insert_struct_comp_map): Support derived-type member mappings
+ 	for arrays with descriptors which use GOMP_MAP_TO_PSET.  Support
+ 	GOMP_MAP_ATTACH_DETACH.
+ 	(gimplify_scan_omp_clauses): Tidy up OACC_ENTER_DATA/OACC_EXIT_DATA
+ 	mappings.  Handle attach/detach clauses and component references.
+ 	(gimplify_adjust_omp_clauses_1): Skip adjustments for explicit
+ 	attach/detach clauses.
+ 	(gimplify_omp_target_update): Handle struct mappings and finalize for
+ 	detach operations.
+ 	* omp-low.c (lower_omp_target): Support GOMP_MAP_ATTACH,
+ 	GOMP_MAP_DETACH, GOMP_MAP_FORCE_DETACH.
+ 	* tree-pretty-print.c (dump_omp_clause): Likewise, plus
+ 	GOMP_MAP_ATTACH_DETACH.
+ 
+ 2019-12-19  Julian Brown  <julian@codesourcery.com>
+ 
+ 	* gimplify.c (insert_struct_comp_map, extract_base_bit_offset): New.
+ 	(gimplify_scan_omp_clauses): Outline duplicated code into calls to
+ 	above two functions.
+ 
+ 2019-12-19  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR target/92905
+ 	* lra-constraints.c (process_alt_operands): Check offmemok when
+ 	processing preferred_reload_class.
+ 
+ 2019-12-19  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-valu.md
+ 	(<convop><VEC_ALL1REG_INT_ALT:mode><VEC_ALL1REG_INT_MODE:mode>2<exec>):
+ 	Change input predcate to gcn_alu_operand.
+ 	(extend<VEC_ALL1REG_INT_ALT:mode><VEC_ALL1REG_INT_MODE:mode>2<exec>):
+ 	Likewise.
+ 	(truncv64di<mode>2): Likewise.
+ 	(truncv64di<mode>2_exec): Likewise.
+ 	(<convop><mode>v64di2): Likewise.
+ 	(<convop><mode>v64di2_exec): Likewise.
+ 
+ 2019-12-19  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-valu.md (*plus_carry_dpp_shr_<mode>): Rename to ...
+ 	(*plus_carry_dpp_shr_v64si): ... this, and replace all
+ 	VEC_1REG_INT_MODE with V64SI.
+ 
+ 2019-12-19  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* hash-map-tests.c (selftest::test_map_of_int_to_strings): New
+ 	selftest.
+ 	(selftest::hash_map_tests_c_tests): Call it.
+ 
+ 2019-12-19  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* gimple-predict.h (gimple_predict_predictor): Make "gs" param
+ 	const.
+ 	(gimple_predict_outcome): Likewise.
+ 	* gimple-pretty-print.c (do_niy): Likewise.
+ 	(dump_unary_rhs): Likewise.
+ 	(dump_binary_rhs): Likewise.
+ 	(dump_ternary_rhs): Likewise.
+ 	(dump_gimple_assign): Likewise.
+ 	(dump_gimple_return): Likewise.
+ 	(dump_gimple_call_args): Likewise.
+ 	(pp_points_to_solution): Make "pt" param const.
+ 	(dump_gimple_call): Make "gs" param const.
+ 	(dump_gimple_switch): Likewise.
+ 	(dump_gimple_cond): Likewise.
+ 	(dump_gimple_label): Likewise.
+ 	(dump_gimple_goto): Likewise.
+ 	(dump_gimple_bind): Likewise.
+ 	(dump_gimple_try): Likewise.
+ 	(dump_gimple_catch): Likewise.
+ 	(dump_gimple_eh_filter): Likewise.
+ 	(dump_gimple_eh_must_not_throw): Likewise.
+ 	(dump_gimple_eh_else): Likewise.
+ 	(dump_gimple_resx): Likewise.
+ 	(dump_gimple_eh_dispatch): Likewise.
+ 	(dump_gimple_debug): Likewise.
+ 	(dump_gimple_omp_for): Likewise.
+ 	(dump_gimple_omp_continue): Likewise.
+ 	(dump_gimple_omp_single): Likewise.
+ 	(dump_gimple_omp_taskgroup): Likewise.
+ 	(dump_gimple_omp_target): Likewise.
+ 	(dump_gimple_omp_teams): Likewise.
+ 	(dump_gimple_omp_sections): Likewise.
+ 	(dump_gimple_omp_block): Likewise.
+ 	(dump_gimple_omp_critical): Likewise.
+ 	(dump_gimple_omp_ordered): Likewise.
+ 	(dump_gimple_omp_scan): Likewise.
+ 	(dump_gimple_omp_return): Likewise.
+ 	(dump_gimple_transaction): Likewise.
+ 	(dump_gimple_asm): Likewise.
+ 	(dump_gimple_phi): Make "phi" param const.
+ 	(dump_gimple_omp_parallel): Make "gs" param const.
+ 	(dump_gimple_omp_task): Likewise.
+ 	(dump_gimple_omp_atomic_load): Likewise.
+ 	(dump_gimple_omp_atomic_store): Likewise.
+ 	(dump_gimple_mem_ops): Likewise.
+ 	(pp_gimple_stmt_1): Likewise.  Add "const" to the various as_a <>
+ 	casts throughout.
+ 	* gimple-pretty-print.h (gimple_stmt_1): Make gimple * param const.
+ 	* gimple.h (is_a_helper <const gdebug *>::test): New.
+ 	(is_a_helper <const ggoto *>::test): New.
+ 	(is_a_helper <const glabel *>::test): New.
+ 	(is_a_helper <const geh_else *>::test): New.
+ 	(is_a_helper <const geh_mnt *>::test): New.
+ 	(is_a_helper <const gswitch *>::test): New.
+ 	(is_a_helper <const gtry *>::test): New.
+ 	(is_a_helper <const greturn *>::test): New.
+ 	(gimple_call_tail_p): Make param const.
+ 	(gimple_call_return_slot_opt_p): Likewise.
+ 	(gimple_call_va_arg_pack_p): Likewise.
+ 	(gimple_call_use_set): Add const overload.
+ 	(gimple_call_clobber_set): Likewise.
+ 	(gimple_has_lhs): Make param const.
+ 	(gimple_bind_body): Likewise.
+ 	(gimple_catch_handler): Likewise.
+ 	(gimple_eh_filter_failure): Likewise.
+ 	(gimple_eh_must_not_throw_fndecl): Likewise.
+ 	(gimple_eh_else_n_body): Likewise.
+ 	(gimple_eh_else_e_body): Likewise.
+ 	(gimple_try_eval): Likewise.
+ 	(gimple_try_cleanup): Likewise.
+ 	(gimple_phi_arg): Add const overload.
+ 	(gimple_phi_arg_def): Make param const.
+ 	(gimple_phi_arg_edge): Likewise.
+ 	(gimple_phi_arg_location): Likewise.
+ 	(gimple_phi_arg_has_location): Likewise.
+ 	(gimple_debug_bind_get_var): Likewise.
+ 	(gimple_debug_bind_get_value): Likewise.
+ 	(gimple_debug_source_bind_get_var): Likewise.
+ 	(gimple_debug_source_bind_get_value): Likewise.
+ 	(gimple_omp_body): Likewise.
+ 	(gimple_omp_for_collapse): Likewise.
+ 	(gimple_omp_for_pre_body): Likewise.
+ 	(gimple_transaction_body): Likewise.
+ 	* tree-eh.c (lookup_stmt_eh_lp_fn): Make param "t" const.
+ 	(lookup_stmt_eh_lp): Likewise.
+ 	* tree-eh.h (lookup_stmt_eh_lp_fn): Make param const.
+ 	(lookup_stmt_eh_lp): Likewise.
+ 	* tree-ssa-alias.h (pt_solution_empty_p): Make param const.
+ 	* tree-ssa-structalias.c (pt_solution_empty_p): Likewise.
+ 
+ 2019-12-19  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_simd_valid_immediate): When
+ 	handling partial SVE vectors, use the container mode rather than
+ 	the element mode if the constant isn't a single-element duplicate.
+ 	* config/aarch64/aarch64-sve.md (@aarch64_sve_reinterpret<mode>):
+ 	Check targetm.can_change_mode_class instead of BYTES_BIG_ENDIAN.
+ 
+ 2019-12-19  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-valu.md (addv64si3<exec_clobber>): Rename to ...
+ 	(add<mode>3<exec_clobber>): ... this, and use VEC_ALL1REG_INT_MODE.
+ 	(addv64si3_dup<exec_clobber>): Rename to ...
+ 	(add<mode>3_dup<exec_clobber>): ... this, and use VEC_ALL1REG_INT_MODE.
+ 	(subv64si3<exec_clobber>): Rename to ...
+ 	(sub<mode>3<exec_clobber>): ... this, and use VEC_ALL1REG_INT_MODE.
+ 
+ 2019-12-19  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_can_change_mode_class):
+ 	Don't allow changes between partial SVE modes and other kinds
+ 	of mode.  Don't allow changes between two partial SVE modes
+ 	if they have different container or element sizes.
+ 
+ 2019-12-19  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_function_value_1): New function,
+ 	split out from...
+ 	(aarch64_function_value): ...here.  Handle partial SVE modes by
+ 	pretending that they have the associated/traditional integer mode,
+ 	then wrap the result in the real mode.
+ 	(aarch64_layout_arg): Take an orig_mode argument and pass it to
+ 	aarch64_function_arg_alignment.  Handle partial SVE modes analogously
+ 	to aarch64_function_value.
+ 	(aarch64_function_arg): Update call accordingly.
+ 	(aarch64_function_arg_advance): Likewise.
+ 
+ 2019-12-19  Jan Hubicka  <hubicka@ucw.cz>
+ 	    Xi Ruoyao  <xry111@mengyan1223.wang>
+ 
+ 	* cgraph.c (cgraph_node_cannot_be_local_p_1): Prevent targets of
+ 	symver attributes to be localized.
+ 	* ipa-visibility.c (cgraph_externally_visible_p,
+ 	varpool_node::externally_visible_p): Likewise.
+ 	* symtab.c (symtab_node::verify_base): Check visibility of symbol
+ 	versions.
+ 
+ 2019-12-19  Jan Hubicka  <hubicka@ucw.cz>
+ 	    Luo Xiong Hu  <luoxhu@linux.ibm.com
+ 
+ 	* ipa-fnsummary.h (ipa_size_summary): Remove copy consturctor.
+ 	(ipa_size_summary_t): Add duplicate method; move to heap.
+ 	* ipa-fnsumary.c (ipa_fn_summary_alloc): Fix allocation.
+ 
+ 2019-12-19  Feng Xue  <fxue@os.amperecomputing.com>
+ 
+ 	PR ipa/92794
+ 	* ipa-cp.c (self_recursive_agg_pass_through_p): New function.
+ 	(intersect_with_plats): Use error_mark_node as place holder
+ 	when aggregate jump function is simple pass-through for
+ 	self-recursive call.
+ 	(intersect_with_agg_replacements): Likewise.
+ 	(intersect_aggregates_with_edge): Likewise.
+ 	(find_aggregate_values_for_callers_subset): Likewise.
+ 
+ 2019-12-18  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* common.opt (fdiagnostics-show-cwe): Add.
+ 	* diagnostic-core.h (class diagnostic_metadata): New forward decl.
+ 	(warning_at): Add overload taking a const diagnostic_metadata &.
+ 	(emit_diagnostic_valist): Add overload taking a
+ 	const diagnostic_metadata *.
+ 	* diagnostic-format-json.cc: Include "diagnostic-metadata.h".
+ 	(json_from_metadata): New function.
+ 	(json_end_diagnostic): Call it to add "metadata" child for
+ 	diagnostics with metadata.
+ 	(diagnostic_output_format_init): Clear context->show_cwe.
+ 	* diagnostic-metadata.h: New file.
+ 	* diagnostic.c: Include "diagnostic-metadata.h".
+ 	(diagnostic_impl): Add const diagnostic_metadata * param.
+ 	(diagnostic_n_impl): Likewise.
+ 	(diagnostic_initialize): Initialize context->show_cwe.
+ 	(diagnostic_set_info_translated): Initialize diagnostic->metadata.
+ 	(get_cwe_url): New function.
+ 	(print_any_cwe): New function.
+ 	(diagnostic_report_diagnostic): Call print_any_cwe if the
+ 	diagnostic has non-NULL metadata.
+ 	(emit_diagnostic): Pass NULL as the metadata in the call to
+ 	diagnostic_impl.
+ 	(emit_diagnostic_valist): Likewise.
+ 	(emit_diagnostic_valist): New overload taking a
+ 	const diagnostic_metadata *.
+ 	(inform): Pass NULL as the metadata in the call to
+ 	diagnostic_impl.
+ 	(inform_n): Likewise for diagnostic_n_impl.
+ 	(warning): Likewise.
+ 	(warning_at): Likewise.  Add overload that takes a
+ 	const diagnostic_metadata &.
+ 	(warning_n): Pass NULL as the metadata in the call to
+ 	diagnostic_n_impl.
+ 	(pedwarn): Likewise for diagnostic_impl.
+ 	(permerror): Likewise.
+ 	(error): Likewise.
+ 	(error_n): Likewise.
+ 	(error_at): Likewise.
+ 	(sorry): Likewise.
+ 	(sorry_at): Likewise.
+ 	(fatal_error): Likewise.
+ 	(internal_error): Likewise.
+ 	(internal_error_no_backtrace): Likewise.
+ 	* diagnostic.h (diagnostic_info::metadata): New field.
+ 	(diagnostic_context::show_cwe): New field.
+ 	* doc/invoke.texi (-fno-diagnostics-show-cwe): New option.
+ 	* opts.c (common_handle_option): Handle OPT_fdiagnostics_show_cwe.
+ 	* toplev.c (general_init): Initialize global_dc->show_cwe.
+ 
+ 2019-12-19  Julian Brown  <julian@codesourcery.com>
+ 	    Maciej W. Rozycki  <macro@codesourcery.com>
+ 	    Tobias Burnus  <tobias@codesourcery.com>
+ 	    Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	* omp-low.c (lower_omp_target): Support GOMP_MAP_NO_ALLOC.
+ 	* tree-pretty-print.c (dump_omp_clause): Likewise.
+ 
+ 2019-12-18  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* ira.c (ira): Use simple LRA algorithm when not optimizing.
+ 
+ 2019-12-18  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	* gimplify.c (gimplify_omp_target_update): Elaborate 'exit data'
+ 	'finalize' handling.
+ 
+ 2019-12-18  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	PR middle-end/86416
+ 	*  Makefile.in (CFLAGS-lto-streamer-in.o): Pass target_noncanonical on.
+ 	* lto-streamer-in.c (lto_input_mode_table): Improve unsupported-mode
+ 	diagnostic.
+ 
+ 2019-12-18  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/aarch64/aarch64-cores.def: 
+ 	("cortex-a76ae"): Use neoversen1 tuning.
+ 	("cortex-a77"): Likewise.
+ 	("cortex-a65"): Use cortexa53 scheduler.
+ 	("cortex-a65ae"): Likewise.
+ 	("neoverse-e1"): Use cortexa73 tuning.
+ 
+ 2019-12-18  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/92971
+ 	* ipa-cp.c (cgraph_edge_brings_all_agg_vals_for_node): Fix
+ 	definition of values, release memory on exit.
+ 
+ 2019-12-17  Jan Hubicka  <hubicka@ucw.cz>
+ 	    Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* ipa-param-manipulation.h (get_original_index): Declare.
+ 	* ipa-param-manipulation.c (ipa_param_adjustments::get_original_index):
+ 	New member function.
+ 	* ipa-prop.c (ipcp_get_parm_bits): New function.
+ 	* ipa-prop.h (ipcp_get_parm_bits): Declare.
+ 	* tree-ssa-ccp.c: Include cgraph.h, alloc-pool.h, symbol-summary.h,
+ 	ipa-utils.h and ipa-prop.h
+ 	(get_default_value): Use ipcp_get_parm_bits.
+ 
+ 2019-12-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR lto/92972
+ 	* lto-wrapper.c (merge_and_complain): Use just "-fno-pie" instead of
+ 	big ? "-fno-pie" : "-fno-pie".  Formatting fixes.  Fix comment typo.
+ 
+ 2019-12-17  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR c++/61339
+ 	* doc/invoke.texi (-Wmismatched-tags, -Wredundant-tags): Document
+ 	new C++ options.
+ 
+ 2019-12-17  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.c (num_insns_constant_gpr): Return 1 if the
+ 	constant can be loaded with PLI if -mcpu=future.
+ 	* config/rs6000/rs6000.md (add<mode>3): Add alternative to
+ 	generate PADDI for 34-bit constants if -mcpu=future.
+ 	(movdi_internal64): Add alternative to use PLI to load up 34-bit
+ 	constants if -mcpu=future.
+ 	(movsi_internal1): Add alternative to use PLI to load up 32-bit
+ 	constants if -mcpu=future.
+ 	* config/rs6000/predicates.md (add_operand): Allow eI constants.
+ 
+ 2019-12-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/92841
+ 	* config/i386/i386.md (@stack_protect_set_1_<mode>,
+ 	@stack_protect_test_1_<mode>): Use output_asm_insn.
+ 	(*stack_protect_set_2_<mode>, *stack_protect_set_3): New define_insns
+ 	and corresponding define_peephole2s.
+ 
+ 2019-12-17  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* symtab.c (symtab_node::get_partitioning_class): Aliases of external
+ 	symbols are external.
+ 
+ 2019-12-17  Christophe Lyon  <christophe.lyon@linaro.org>
+ 
+ 	* config/arm/arm-protos.h (thumb1_gen_const_int): Add new prototype.
+ 	* config/arm/arm.c (arm_option_check_internal): Remove restriction
+ 	on MOVT for -mpure-code.
+ 	(thumb1_gen_const_int): New function.
+ 	(thumb1_legitimate_address_p): Support -mpure-code.
+ 	(thumb1_rtx_costs): Likewise.
+ 	(thumb1_size_rtx_costs): Likewise.
+ 	(arm_thumb1_mi_thunk): Likewise.
+ 	* config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Likewise.
+ 	* config/arm/thumb1.md (thumb1_movsi_symbol_ref): New.
+ 	(*thumb1_movhf): Support -mpure-code.
+ 	* doc/invoke.texi (-mpure-code): Remove restriction on MOVT.
+ 
+ 2019-12-17  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): Mention pr92772
+ 	in the comments.
+ 
+ 2019-12-17  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-valu.md (extract_last_<mode>): New expander.
+ 	(fold_extract_last_<mode>): New expander.
+ 
+ 2019-12-17  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn.h (CLZ_DEFINED_VALUE_AT_ZERO): Define.
+ 	(CTZ_DEFINED_VALUE_AT_ZERO): Define.
+ 	* config/gcn/gcn.md (s_mnemonic): Add clz and ctz.
+ 	(expander): Likewise.
+ 	(countzeros): New code iterator.
+ 	(<expander>si2): New insn pattern.
+ 	(<expander>di2): New insn pattern.
+ 
+ 2019-12-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/92962
+ 	* common/config/i386/i386-common.c (processor_alias_table): Formatting
+ 	fixes.
+ 	* doc/invoke.texi (bdver3, bdver4, znver1): Add missing closing paren.
+ 	(znver2): Likewise.  Add RDPID and WBNOINVD, remove spurious comma
+ 	before CLWB.
+ 
+ 2019-12-17  Hongyu Wang  <hongyu.wang@intel.com>
+ 
+ 	PR target/92651
+ 	* config/i386/i386.h (TARGET_EXPAND_ABS): New macro.
+ 	* config/i386/x86-tune.def (X86_TUNE_EXPAND_ABS): New.
+ 	* config/i386/i386.md (abs<SWI48x>2): New define_expand.
+ 
+ 2019-12-17  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR target/92807
+ 	* config/i386/i386.c (ix86_lea_outperforms): Check !TARGET_BONNELL.
+ 	(ix86_avoid_lea_for_addr): When not optimizing for Bonnell, use add
+ 	for a = a + b and a = b + a.
+ 
+ 2019-12-16  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/92952
+ 	* builtins.c (compute_objsize): Adjust offset by the array low bound.
+ 
+ 2019-12-16  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* pretty-print.c (pp_write_text_as_html_like_dot_to_stream): New
+ 	function.
+ 	* pretty-print.h (pp_write_text_as_html_like_dot_to_stream): New decl.
+ 
+ 2019-12-16  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (movsi_to_cr_one): Use CR0_REGNO instead of
+ 	hardcoding the (old, expired) register number.
+ 	(*mtcrfsi): Ditto.
+ 
+ 2019-12-16  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config.gcc: s/msp430*-*-*/msp430-*-*.
+ 	Handle msp430-*-elfbare.
+ 	* config/msp430/msp430-devices.c (TARGET_SUBDIR): Define.
+ 	(_MSPMKSTR): Define.
+ 	(__MSPMKSTR): Define.
+ 	(rest_of_devices_path): Use TARGET_SUBDIR value in string.
+ 	* config/msp430/msp430.c (msp430_option_override): Error if
+ 	-fuse-cxa-atexit is used when it has been disabled at configure time.
+ 	* config/msp430/t-msp430: Define TARGET_SUBDIR when building
+ 	msp430-devices.o.
+ 	* doc/install.texi: Document msp430-*-elf and msp430-*-elfbare.
+ 	* doc/invoke.texi: Update documentation about which path devices.csv is
+ 	searched for.
+ 
+ 2019-12-16  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	PR target/92950
+ 	* config/s390/vector.md ("mov<mode>" for V_8): Replace lh, lhy,
+ 	and lhrl with llc.
+ 
+ 2019-12-14  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* doc/extend.texi (attribute access): Correct typos.
+ 
+ 2019-12-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR ipa/92357
+ 	* ipa-fnsummary.c (ipa_fn_summary_write): Use
+ 	lto_symtab_encoder_iterator with lsei_start_function_in_partition and
+ 	lsei_next_function_in_partition instead of walking all cgraph nodes
+ 	in encoder.
+ 
+ 	PR tree-optimization/92930
+ 	* ipa-pure-const.c (special_builtin_state): Don't handle
+ 	BUILT_IN_APPLY.  Formatting fixes.
+ 	(check_call): Formatting fixes.
+ 
+ 2019-12-14  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.h (DARWIN_EXTRA_SPECS): Add new
+ 	bundle spec. (DARWIN_BUNDLE1_SPEC): New.
+ 	(STARTFILE_SPEC): Use darwin bundle spec.
+ 	* config/rs6000/darwin.h (DARWIN_BUNDLE1_SPEC): New.
+ 	(DARWIN_DYLIB1_SPEC): Delete duplicate.
+ 
+ 2019-12-13  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/91582
+ 	PR middle-end/92868
+ 	* builtins.c (addr_decl_size): New function.
+ 	(gimple_call_alloc_size): Add arguments.
+ 	(compute_objsize): Add an argument.  Set *PDECL even for allocated
+ 	objects.
+ 	Correct checking for negative wide_int.
+ 	Correct handling of negative outer offsets into unknown regions
+ 	or with unknown inner offsets.
+ 	Extend offsets to at most sizetype precision.
+ 	Only handle constant subobject sizes.
+ 	* builtins.h (gimple_call_alloc_size): Add arguments.
+ 	* tree.c (component_ref_size): Always return sizetype.
+ 	* tree-ssa-strlen.c (strinfo::alloc): New member.
+ 	(get_addr_stridx): Add argument.
+ 	(get_stridx): Use ptrdiff_t.  Add argument.
+ 	(new_strinfo): Set new member.
+ 	(get_string_length): Handle alloca and VLA.
+ 	(dump_strlen_info): Dump more state.
+ 	(maybe_invalidate): Print more info.  Decrease indentation.
+ 	(unshare_strinfo): Set new member.
+ 	(valid_builtin_call): Handle alloca and VLA.
+ 	(maybe_warn_overflow): Check and set no-warning bit.  Improve
+ 	handling of offsets.  Print allocated objects.
+ 	(handle_builtin_strlen): Handle strinfo records with null lengths.
+ 	(handle_builtin_strcpy): Add argument.  Call maybe_warn_overflow.
+ 	(is_strlen_related_p): Handle dynamically allocated objects.
+ 	(get_range): Add argument.
+ 	(handle_builtin_malloc): Rename...
+ 	(handle_alloc): ...to this and handle all allocation functions.
+ 	(handle_builtin_memset): Call maybe_warn_overflow.
+ 	(count_nonzero_bytes): Handle more MEM_REF forms.
+ 	(strlen_check_and_optimize_call): Call handle_alloc_call.  Pass
+ 	arguments to more callees.
+ 	(handle_integral_assign): Add argument.  Create strinfo entries
+ 	for MEM_REF assignments.
+ 	(check_and_optimize_stmt): Handle more MEM_REF forms.
+ 
+ 2019-12-13  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/darwin.h (DARWIN_DYLIB1_SPEC): New.
+ 
+ 2019-12-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* lto-streamer-in.c (input_function): Add node parameter.
+ 	(lto_read_body_or_constructor): Use it.
+ 
+ 2019-12-13  Roman Zhuykov  <zhroma@ispras.ru>
+ 
+ 	PR rtl-optimization/92591
+ 	* modulo-sched.c (ps_add_node_check_conflicts): Improve checking
+ 	for history > 0 case.
+ 
+ 2019-12-13  Roman Zhuykov  <zhroma@ispras.ru>
+ 
+ 	* modulo-sched.c (sms_schedule): Use param_sms_max_ii_factor
+ 	value instead of macro.  Adjust comment.
+ 	(sms_schedule_by_order): Use parameter value without macro.
+ 	* params.opt: Add ranges for modulo scheduler parameters,
+ 	set param_sms_max_ii_factor = 2 by default.
+ 
+ 2019-12-13  Roman Zhuykov  <zhroma@ispras.ru>
+ 
+ 	PR rtl-optimization/90001
+ 	* ddg.c (create_ddg): Init max_dist array for each node.
+ 	(free_ddg): Free max_dist array.
+ 	(create_ddg_edge): Use bool field instead of aux union.
+ 	(set_recurrence_length): Use prepared max_dist information instead
+ 	of calling longest_simple_path.
+ 	(create_scc): Remove graph argument, fill node's aux.count with
+ 	SCC id, and move set_recurrence_length call to...
+ 	(create_ddg_all_sccs): ...here, after filling all max_dist arrays
+ 	using Floyd–Warshall-like algorithm.
+ 	(update_dist_to_successors): Remove the whole function.
+ 	(longest_simple_path): Likewise.
+ 	* ddg.h (struct ddg_node): Add max_dist pointer.
+ 	(struct ddg_edge): Use bool field instead of unused aux union.
+ 
+ 2019-12-13  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-valu.md (mulv64si3<exec>): Rename to ...
+ 	(mul<mode>3<exec>): ... this, and implement sub-dword patterns.
+ 	(mulv64si3_dup<exec>): Rename to ...
+ 	(mul<mode>3_dup<exec>): ... this, and implement sub-dword patterns.
+ 
+ 2019-12-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-utils.c (ipa_merge_profiles): Improve dumping; merge common
+ 	targets.
+ 
+ 2019-12-13  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-valu.md (sdwa): New mode attribute.
+ 	(VCVT_FROM_MODE): Rename to ...
+ 	(VCVT_MODE): ... this.
+ 	(VCVT_TO_MODE): Delete mode iterator.
+ 	(VCVT_FMODE): New mode iterator.
+ 	(VCVT_IMODE): Likewise.
+ 	(<cvt_name><VCVT_FROM_MODE:mode><VCVT_TO_MODE:mode>2<exec>): Change ...
+ 	(<cvt_name><VCVT_MODE:mode><VCVT_FMODE:mode>2<exec>): ... to this.
+ 	(<cvt_name><VCVT_FMODE:mode><VCVT_IMODE:mode>2<exec>): New.
+ 	(zero_convert): New code iterator.
+ 	(convop): New code attribute.
+ 	(<convop><VEC_ALL1REG_INT_ALT:mode><VEC_ALL1REG_INT_MODE:mode>2<exec>)
+ 	: New.
+ 	(extend<VEC_ALL1REG_INT_ALT:mode><VEC_ALL1REG_INT_MODE:mode>2<exec>)
+ 	: New.
+ 	(vec_truncatev64div64si): Rename to ...
+ 	(truncv64di<mode>2): ... this and implement sub-dword patterns.
+ 	(vec_truncatev64div64si_exec): Rename to ...
+ 	(truncv64di<mode>2_exec): ... this and implement sub-dword patterns.
+ 	(<convop><mode>v64di2): New insn_and_split.
+ 	(<convop><mode>v64di2_exec): Likewise.
+ 	(mask_gather_load<mode>): Update truncate names.
+ 	(mask_scatter_store<mode>): Likewise.
+ 	* config/gcn/gcn.c (gcn_expand_scaled_offsets): Update truncate names.
+ 
+ 2019-12-13  Dennis Zhang  <dennis.zhang@arm.com>
+ 
+ 	* config/aarch64/aarch64-arches.def (armv8.6-a): New.
+ 	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
+ 	__ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC and
+ 	__ARM_FEATURE_BF16_SCALAR_ARITHMETIC when enabled.
+ 	* config/aarch64/aarch64-option-extensions.def (i8mm, bf16): New.
+ 	(fp): Disabling fp also disables i8mm and bf16.
+ 	(simd): Disabling simd also disables i8mm.
+ 	* config/aarch64/aarch64.h (AARCH64_FL_V8_6): New macro.
+ 	(AARCH64_FL_I8MM, AARCH64_FL_BF16, AARCH64_FL_FOR_ARCH8_6): Likewise.
+ 	(AARCH64_ISA_V8_6, AARCH64_ISA_I8MM, AARCH64_ISA_BF16): Likewise.
+ 	(TARGET_I8MM, TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
+ 	* doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options
+ 	and add a new table to list permissible values for ARCH.
+ 
+ 2019-12-13  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/92908
+ 	* simplify-rtx.c (simplify_relational_operation): Punt for vector
+ 	cmp_mode and scalar mode, if simplify_relational_operation returned
+ 	const_true_rtx.
+ 	(simplify_const_relational_operation): Change VOID_mode in function
+ 	comment to VOIDmode.
+ 
+ 2019-12-13  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	* config/rs6000/rs6000.c (adjust_vectorization_cost): New function.
+ 	(rs6000_add_stmt_cost): Call adjust_vectorization_cost and update
+ 	stmt_cost.
+ 
+ 2019-12-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/92904
+ 	* config/i386/i386.c (ix86_gimplify_va_arg): If need_intregs and
+ 	not need_temp, decrease alignment of the read because the GPR save
+ 	area only guarantees 8-byte alignment.
+ 
+ 2019-12-12  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Add support for some more AVR devices from avrxmega3 family.
+ 
+ 	* config/avr/avr-mcus.def (attiny1604, attiny1606, attiny1607)
+ 	(attiny402, attiny404, attiny406)
+ 	(attiny804, attiny806, attiny807)
+ 	(attiny202, attiny204): Add AVR_MCU lines to support them.
+ 	* doc/avr-mmcu.texi: Regenerate.
+ 
+ 2019-12-12  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-prop.c (read_ipcp_transformation_info): Fix undefined ordering
+ 	of execution of function call parameters.
+ 
+ 2019-12-12  Vineet Gupta  <vgupta@synopsys.com>
+ 
+ 	* config/arc/arc-modes.def (CC_FPUE): New Mode CC_FPUE which
+ 	helps codegen generate exceptions even for quiet NaN.
+ 	* config/arc/arc.c (arc_init_reg_tables): Handle New CC_FPUE mode.
+ 	(get_arc_condition_code): Likewise.
+ 	(arc_select_cc_mode): LT, LE, GT, GE to use the New CC_FPUE mode.
+ 	* config/arc/arc.h (REVERSE_CONDITION): Handle New CC_FPUE mode.
+ 	* config/arc/predicates.md (proper_comparison_operator): Likewise.
+ 	* config/arc/fpu.md (cmpsf_fpu_trap): New Pattern for CC_FPUE.
+ 	(cmpdf_fpu_trap): Likewise.
+ 
+ 2019-12-12  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.md (iterator SDF): Check TARGET_FP_DP_BASE.
+ 	(cstoredi4): Use TARGET_HARD_FLOAT.
+ 
+ 2019-12-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* opts.c (default_options_table): Move -ftree-loop-distribute-patterns
+ 	entry from -O3 or later section to -O2 or later section.
+ 	* doc/invoke.texi (-ftree-loop-distribute-patterns): Mention the
+ 	option is enabled by default at -O2+ rather than just at -O3.
+ 
+ 	PR target/92723
+ 	* tree-vect-patterns.c (vect_recog_rotate_pattern): If dt is not
+ 	vect_internal_def, use oprnd1 as is, without trying to cast it.
+ 	Formatting fix.
+ 
+ 2019-12-11  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* builtins.c (compute_objsize): Add an argument and set it to offset
+ 	into destination.
+ 	* builtins.h (compute_objsize): Add an argument.
+ 	* tree-object-size.c (addr_object_size): Add an argument and set it
+ 	to offset into destination.
+ 	(compute_builtin_object_size): Same.
+ 	* tree-object-size.h (compute_builtin_object_size): Add an argument.
+ 	* tree-ssa-strlen.c (get_addr_stridx): Add an argument and set it
+ 	to offset into destination.
+ 	(maybe_warn_overflow): New function.
+ 	(handle_store): Call maybe_warn_overflow to issue warnings.
+ 
+ 2019-12-11  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.h (STARTFILE_SPEC) [!fexceptions]: Use
+ 	crtbegin_no_eh.o if building for the C language.
+ 	[fno-exceptions]: Use crtbegin_no_eh.o if building for any language
+ 	except C.
+ 	(ENDFILE_SPEC) [!fexceptions]: Use crtend_no_eh.o if building for 
+ 	the C language.
+ 	[fno-exceptions]: Use crtend_no_eh.o if building for any language
+ 	except C.
+ 	* config/msp430/t-msp430: Add -fno-exceptions multilib.
+ 	* doc/install.texi: Document --disable-no-exceptions multilib configure
+ 	option.
+ 	* doc/sourcebuild.texi: Document exceptions_enabled effective target.
+ 
+ 2019-12-11  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* pretty-print.c (pretty_printer::pretty_printer): New copy-ctor.
+ 	(pretty_printer::clone): New vfunc implementation.
+ 	* pretty-print.h (format_postprocessor::clone): New pure vfunc
+ 	decl.
+ 	(pretty_printer::pretty_printer): New copy-ctor decl.
+ 	(pretty_printer::clone): New vfunc decl.
+ 
+ 2019-12-11  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* function-tests.c (selftest::make_fndecl): Make non-static.
+ 	* selftest.h (selftest::make_fndecl): New decl.
+ 
+ 2019-12-11  Lewis Hyatt  <lhyatt@gmail.com>
+ 
+ 	PR 91853
+ 	* pretty-print.c (pp_quoted_string): Avoid hex-escaping valid
+ 	multibyte input.  Fix off-by-one-bug printing the last byte before a
+ 	hex-escaped output.
+ 	(pp_character): Don't apply line wrapping in the middle of multibyte
+ 	characters.
+ 	(test_utf8): New test.
+ 	(pretty_print_c_tests): Call the new test.
+ 
+ 2019-12-11  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm-cpus.in (ALL_SIMD_EXTERNAL): New fgroup.
+ 	(ALL_SIMD): Use it.
+ 	(ALL_FPU_EXTERNAL): New fgroup.
+ 	(ALL_FP): Use it.
+ 	(cortex-a55, cortex-a75, cortex-a76, cortex-a76ae): Remove redundant
+ 	+simd from architecture specification.
+ 	(cortex-a77, neoverse-n1, cortex-a75.cortex-a55): Likewise.
+ 	* config/arm/arm.c (isa_all_fpubits, fpu_bitlist): Rename to ...
+ 	(isa_all_fpubits_internal, fpu_bitlist_internal): ... these.
+ 	(isa_all_fpbits): New bitmap.
+ 	(arm_option_override): Initialize it.
+ 	(arm_configure_build_target): If the target isa does not have any
+ 	FP enabled, do not warn about mismatches in FP-related feature bits.
+ 
+ 2019-12-11  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* real.c (struct arm_bfloat_half_format,
+ 	encode_arm_bfloat_half, decode_arm_bfloat_half): New.
+ 	* real.h (arm_bfloat_half_format): New.
+ 
+ 2019-12-11  Hongtao Liu  <hongtao.liu@intel.com>
+ 
+ 	PR target/92865
+ 	* config/i386/i386-expand.c (ix86_valid_mask_cmp_mode): Enable
+ 	integer mask cmov when available even with TARGET_XOP.
+ 
+ 2019-12-10  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/92891
+ 	* builtins.c (gimple_call_alloc_size): Convert size to sizetype
+ 	before returning it.
+ 
+ 2019-12-10  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/92796
+ 	* lra-int.h (lra_risky_transformations_p): Rename to
+ 	check_and_force_assignment_correctness_p.
+ 	* lra-assigns.c: Ditto.
+ 	(lra_assign): Reset check_and_force_assignment_correctness_p.
+ 	* lra-constraints.c (lra_risky_transformations_p): Rename to
+ 	check_and_force_assignment_correctness_p.
+ 	(lra_constraints): Set up check_and_force_assignment_correctness_p
+ 	only for the 1st sub-pass.
+ 	* lra-eliminations.c (process_insn_for_elimination): Set up
+ 	check_and_force_assignment_correctness_p if the insn chnaged its
+ 	code.
+ 
+ 2019-12-10  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/92882
+ 	* regstat.c (regstat_bb_compute_calls_crossed): Don't check
+ 	INSN_UID against DF_INSN_SIZE or use DF_INSN_INFO_GET unless
+ 	NONDEBUG_INSN_P.
+ 
+ 	PR ipa/92883
+ 	* ipa-cp.c (propagate_vr_across_jump_function): Pass jvr rather
+ 	than *jfunc->m_vr to intersect.  Formatting fix.
+ 
+ 	PR middle-end/92825
+ 	* cfgexpand.c (add_stack_protection_conflicts): Change return type
+ 	from void to bool, return true if at least one stack_vars[i].decl
+ 	is addressable.
+ 	(record_or_union_type_has_array_p, stack_protect_decl_p): Remove.
+ 	(expand_used_vars): Don't call stack_protect_decl_p, instead for
+ 	-fstack-protector-strong set gen_stack_protect_signal to true
+ 	if add_stack_protection_conflicts returned true.  Formatting fixes.
+ 	* doc/invoke.texi (-fstack-protector-strong): Clarify that optimized
+ 	out variables or variables not living on the stack don't count.
+ 	(-fstack-protector): Likewise.  Clarify it affects >= 8 byte arrays
+ 	rather than > 8 byte.
+ 
+ 	* ipa-param-manipulation.c
+ 	(ipa_param_body_adjustments::register_replacement): Fix comment typo
+ 	- accross -> across.
+ 	* ipa-sra.c (propagate_used_across_scc_edge, ipa_sra_analysis):
+ 	Likewise.
+ 	(param_splitting_across_edge): Fix typo in dump message - accross
+ 	-> across.
+ 
+ 2019-12-10  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cgraph.c (cgraph_node::verify_node): Verify tp_first_run.
+ 	* cgraph.h (cgrpah_node): Turn tp_first_run back to int.
+ 	* cgraphunit.c (tp_first_run_node_cmp): Do not watch for overflows.
+ 	(expand_all_functions): First expand ordered section and then
+ 	unordered.
+ 	* profile.c (compute_value_histograms): Error on out of range
+ 	tp_first_runs.
+ 
+ 2019-12-10  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* predict.c (compute_function_frequency): Check for presence of IPA
+ 	profile.
+ 
+ 2019-12-10  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* varasm.c (default_function_section): Fix confused tests for
+ 	tp_first_run reordering.
+ 
+ 2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Don't
+ 	allow SVE modes in GPRs.
+ 
+ 2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (vccore): New iterator.
+ 	* config/aarch64/aarch64-sve.md (vec_series<mode>): Use it instead
+ 	of vwcore.
+ 	(*vec_series<mode>_plus): Likewise.
+ 
+ 2019-12-10  Frederik Harwath  <frederik@codesourcery.com>
+ 
+ 	* omp-low.c (scan_omp_for): Use clause location in warning.
+ 
+ 2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* dwarf2out.c (loc_descriptor): Punt for MODE_VECTOR_BOOL.
+ 	(add_const_value_attribute): Likewise.
+ 
+ 2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): When
+ 	handling direct_slp_reduc, allow the PHI arguments to have
+ 	a different type from the vector elements.
+ 
+ 2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vectorizable_condition): Record the loop
+ 	masks required for extract-last reductions.
+ 
+ 2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vect_finish_replace_stmt): Always use the
+ 	original scalar statement rather than a pattern statement.
+ 	(vectorizable_condition): Likewise, in the handling of extract-last
+ 	reductions.
+ 
+ 2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-loop.c (vectorizable_reduction): Don't use
+ 	EXTRACT_LAST_REDUCTION for chained reductions.
+ 
+ 2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* ipa-utils.h (get_odr_name_for_type): Check for a TYPE_DECL.
+ 	* ipa-devirt.c (warn_types_mismatch): Don't call xstrdup for the
+ 	second demangled name.
+ 
+ 2019-12-10  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* config/i386/i386.c (IX86_LEA_PRIORITY): Fix comment typos.
+ 
+ 2019-12-10  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/92862
+ 	* predict.c (predict_paths_leading_to_edge): Fix typo from e to e2.
+ 	* tree-ssa-loop-niter.c (loop_only_exit_p): Return false
+ 	instead of true;
+ 
+ 2019-12-09  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* gcc-rich-location.c
+ 	(maybe_range_label_for_tree_type_mismatch::get_text): Replace
+ 	label_text ctor call with label_text::borrow.
+ 	* gcc-rich-location.h (text_range_label::get_text): Replace
+ 	label_text ctor called with false with label_text::borrow.
+ 
+ 2019-12-09  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* diagnostic-show-locus.c (diagnostic_show_locus): Remove initial
+ 	newline.
+ 	(selftest::test_diagnostic_show_locus_unknown_location): Remove
+ 	initial newline from expected outputs.
+ 	(selftest::test_one_liner_simple_caret): Likewise.
+ 	(selftest::test_one_liner_caret_and_range): Likewise.
+ 	(selftest::test_one_liner_multiple_carets_and_ranges): Likewise.
+ 	(selftest::test_one_liner_fixit_insert_before): Likewise.
+ 	(selftest::test_one_liner_fixit_insert_after): Likewise.
+ 	(selftest::test_one_liner_fixit_remove): Likewise.
+ 	(selftest::test_one_liner_fixit_replace): Likewise.
+ 	(selftest::test_one_liner_fixit_replace_non_equal_range):
+ 	Likewise.
+ 	(selftest::test_one_liner_fixit_replace_equal_secondary_range):
+ 	Likewise.
+ 	(selftest::test_one_liner_fixit_validation_adhoc_locations):
+ 	Likewise.
+ 	(selftest::test_one_liner_many_fixits_1): Likewise.
+ 	(selftest::test_one_liner_many_fixits_2): Likewise.
+ 	(selftest::test_one_liner_labels): Likewise.
+ 	(selftest::test_one_liner_simple_caret_utf8): Likewise.
+ 	(selftest::test_one_liner_caret_and_range_utf8): Likewise.
+ 	(selftest::test_one_liner_multiple_carets_and_ranges_utf8):
+ 	Likewise.
+ 	(selftest::test_one_liner_fixit_insert_before_utf8): Likewise.
+ 	(selftest::test_one_liner_fixit_insert_after_utf8): Likewise.
+ 	(selftest::test_one_liner_fixit_remove_utf8): Likewise.
+ 	(selftest::test_one_liner_fixit_replace_utf8): Likewise.
+ 	(selftest::test_one_liner_fixit_replace_non_equal_range_utf8):
+ 	Likewise.
+ 	(selftest::test_one_liner_fixit_replace_equal_secondary_range_utf8):
+ 	Likewise.
+ 	(selftest::test_one_liner_fixit_validation_adhoc_locations_utf8):
+ 	Likewise.
+ 	(selftest::test_one_liner_many_fixits_1_utf8): Likewise.
+ 	(selftest::test_one_liner_many_fixits_2_utf8): Likewise.
+ 	(selftest::test_one_liner_labels_utf8): Likewise.
+ 	(selftest::test_add_location_if_nearby): Likewise.
+ 	(selftest::test_diagnostic_show_locus_fixit_lines): Likewise.
+ 	(selftest::test_overlapped_fixit_printing): Likewise.
+ 	(selftest::test_overlapped_fixit_printing_utf8): Likewise.
+ 	(selftest::test_overlapped_fixit_printing_2): Likewise.
+ 	(selftest::test_fixit_insert_containing_newline): Likewise.
+ 	(selftest::test_fixit_insert_containing_newline_2): Likewise.
+ 	(selftest::test_fixit_replace_containing_newline): Likewise.
+ 	(selftest::test_fixit_deletion_affecting_newline): Likewise.
+ 	(selftest::test_line_numbers_multiline_range): Likewise.
+ 	* diagnostic.c (default_diagnostic_finalizer): Add pp_newline call
+ 	before call to diagnostic_show_locus.
+ 	(diagnostic_append_note): Likewise.
+ 
+ 2019-12-09  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/92761
+ 	PR middle-end/92762
+ 	* hash-map-tests.c (test_map_of_type_with_ctor_and_dtor): Tighten
+ 	up tests.
+ 	* hash-table.h (hash_table::expand): Use placement new to copy
+ 	construct objects in uninitialized storage.
+ 	(hash_table::empty_slow): Avoid invoking copy assignment on
+ 	uninitialized objects.
+ 
+ 2019-12-09  Lewis Hyatt  <lhyatt@gmail.com>
+ 
+ 	PR preprocessor/49973
+ 	* input.c (location_compute_display_column): New function to help with
+ 	multibyte awareness in diagnostics.
+ 	(test_cpp_utf8): New self-test.
+ 	(input_c_tests): Call the new test.
+ 	* input.h (location_compute_display_column): Declare.
+ 	* diagnostic-show-locus.c: Pervasive changes to add multibyte awareness
+ 	to all classes and functions.
+ 	(enum column_unit): New enum.
+ 	(class exploc_with_display_col): New class.
+ 	(class layout_point): Convert m_column member to array m_columns[2].
+ 	(layout_range::contains_point): Add col_unit argument.
+ 	(test_layout_range_for_single_point): Pass new argument.
+ 	(test_layout_range_for_single_line): Likewise.
+ 	(test_layout_range_for_multiple_lines): Likewise.
+ 	(line_bounds::convert_to_display_cols): New function.
+ 	(layout::get_state_at_point): Add col_unit argument.
+ 	(make_range): Use empty filename rather than dummy filename.
+ 	(get_line_width_without_trailing_whitespace): Rename to...
+ 	(get_line_bytes_without_trailing_whitespace): ...this.
+ 	(test_get_line_width_without_trailing_whitespace): Rename to...
+ 	(test_get_line_bytes_without_trailing_whitespace): ...this.
+ 	(class layout): m_exploc changed to exploc_with_display_col from
+ 	plain expanded_location.
+ 	(layout::get_linenum_width): New accessor member function.
+ 	(layout::get_x_offset_display): Likewise.
+ 	(layout::calculate_linenum_width): New subroutine for the constuctor.
+ 	(layout::calculate_x_offset_display): Likewise.
+ 	(layout::layout): Use the new subroutines. Add multibyte awareness.
+ 	(layout::print_source_line): Add multibyte awareness.
+ 	(layout::print_line): Likewise.
+ 	(layout::print_annotation_line): Likewise.
+ 	(line_label::line_label): Likewise.
+ 	(layout::print_any_labels): Likewise.
+ 	(layout::annotation_line_showed_range_p): Likewise.
+ 	(get_printed_columns): Likewise.
+ 	(class line_label): Rename m_length to m_display_width.
+ 	(get_affected_columns): Rename to...
+ 	(get_affected_range): ...this; add col_unit argument and multibyte
+ 	awareness.
+ 	(class correction): Add m_affected_bytes and m_display_cols
+ 	members.  Rename m_len to m_byte_length for clarity.  Add multibyte
+ 	awareness throughout.
+ 	(correction::insertion_p): Add multibyte awareness.
+ 	(correction::compute_display_cols): New function.
+ 	(correction::ensure_terminated): Use new member name m_byte_length.
+ 	(line_corrections::add_hint): Add multibyte awareness.
+ 	(layout::print_trailing_fixits): Likewise.
+ 	(layout::get_x_bound_for_row): Likewise.
+ 	(test_one_liner_simple_caret_utf8): New self-test analogous to the one
+ 	with _utf8 suffix removed, testing multibyte awareness.
+ 	(test_one_liner_caret_and_range_utf8): Likewise.
+ 	(test_one_liner_multiple_carets_and_ranges_utf8): Likewise.
+ 	(test_one_liner_fixit_insert_before_utf8): Likewise.
+ 	(test_one_liner_fixit_insert_after_utf8): Likewise.
+ 	(test_one_liner_fixit_remove_utf8): Likewise.
+ 	(test_one_liner_fixit_replace_utf8): Likewise.
+ 	(test_one_liner_fixit_replace_non_equal_range_utf8): Likewise.
+ 	(test_one_liner_fixit_replace_equal_secondary_range_utf8): Likewise.
+ 	(test_one_liner_fixit_validation_adhoc_locations_utf8): Likewise.
+ 	(test_one_liner_many_fixits_1_utf8): Likewise.
+ 	(test_one_liner_many_fixits_2_utf8): Likewise.
+ 	(test_one_liner_labels_utf8): Likewise.
+ 	(test_diagnostic_show_locus_one_liner_utf8): Likewise.
+ 	(test_overlapped_fixit_printing_utf8): Likewise.
+ 	(test_overlapped_fixit_printing): Adapt for changes to
+ 	get_affected_columns, get_printed_columns and class corrections.
+ 	(test_overlapped_fixit_printing_2): Likewise.
+ 	(test_linenum_sep): New constant.
+ 	(test_left_margin): Likewise.
+ 	(test_offset_impl): Helper function for new test.
+ 	(test_layout_x_offset_display_utf8): New test.
+ 	(diagnostic_show_locus_c_tests): Call new tests.
+ 
+ 2019-12-09  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* tree.c (build_array_type_1): Add SET_CANONICAL parameter and compute
+ 	TYPE_CANONICAL from the element type only if it is true.  Remove a few
+ 	obsolete lines and adjust recursive call.
+ 	(fld_process_array_type): Adjust call to build_array_type_1.
+ 	(build_array_type): Likewise.
+ 	(build_nonshared_array_type): Likewise.
+ 
+ 2019-12-09  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-valu.md (gather<mode>_insn_1offset<exec>): Change
+ 	%s to %o in asm output.
+ 	(gather<mode>_insn_2offsets<exec>): Likewise.
+ 
+ 2019-12-09  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/t-multilib: Use arm->thumb multilib reuse rules
+ 	on a-profile.
+ 
+ 2019-12-09  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (unnamed mfcr define_insn): Name this
+ 	set<mode>_cc.
+ 	(unnamed define_insn_and_split): Delete.
+ 	(unnamed define_insn): Delete.
+ 	(unnamed define_insn): Delete.
+ 	(unnamed define_split): Delete.
+ 
+ 2019-12-09  Matthew Malcomson  <matthew.malcomson@arm.com>
+ 
+ 	* regstat.c (regstat_bb_compute_calls_crossed): Add a cast to
+ 	avoid a warning.
+ 
+ 2019-12-09  Matthew Malcomson  <matthew.malcomson@arm.com>
+ 
+ 	PR middle-end/92410
+ 	* bb-reorder.c (pass_reorder_blocks::execute): Recompute
+ 	dataflow luids once basic blocks have been reordered.
+ 	* haifa-sched.c (reemit_notes): Create df insn record for each
+ 	new note.
+ 	* regstat.c (regstat_bb_compute_calls_crossed): Assert every
+ 	insn has an insn record before trying to use it.
+ 
+ 2019-12-09  Hongtao Liu  <hongtao.liu@intel.com>
+ 
+ 	* common/config/i386/i386-common.c
+ 	(OPTION_MASK_ISA_AVX5124FMAPS_SET): Rename to
+ 	OPTION_MASK_ISA2_AVX5124FMAPS_SET.
+ 	(OPTION_MASK_ISA_AVX5124VNNIW_SET, OPTION_MASK_ISA_AVX512BF16_SET,
+ 	OPTION_MASK_ISA_AVX512VP2INTERSECT_SET,
+ 	OPTION_MASK_ISA_PCONFIG_SET, OPTION_MASK_ISA_WBNOINVD_SET,
+ 	OPTION_MASK_ISA_SGX_SET, OPTION_MASK_ISA_CX16_SET,
+ 	OPTION_MASK_ISA_MOVBE_SET, OPTION_MASK_ISA_PTWRITE_SET,
+ 	OPTION_MASK_ISA_MWAITX_SET, OPTION_MASK_ISA_CLZERO_SET,
+ 	OPTION_MASK_ISA_RDPID_SET, OPTION_MASK_ISA_VAES_SET,
+ 	OPTION_MASK_ISA_MOVDIR64B_SET, OPTION_MASK_ISA_WAITPKG_SET,
+ 	OPTION_MASK_ISA_CLDEMOTE_SET, OPTION_MASK_ISA_ENQCMD_SET,
+ 	OPTION_MASK_ISA_AVX5124FMAPS_UNSET,
+ 	OPTION_MASK_ISA_AVX5124VNNIW_UNSET,
+ 	OPTION_MASK_ISA_AVX512BF16_UNSET,
+ 	OPTION_MASK_ISA_AVX512VP2INTERSECT_UNSET,
+ 	OPTION_MASK_ISA_PCONFIG_UNSET, OPTION_MASK_ISA_WBNOINVD_UNSET,
+ 	OPTION_MASK_ISA_SGX_UNSET, OPTION_MASK_ISA_CX16_UNSET,
+ 	OPTION_MASK_ISA_MOVBE_UNSET, OPTION_MASK_ISA_PTWRITE_UNSET,
+ 	OPTION_MASK_ISA_MWAITX_UNSET, OPTION_MASK_ISA_CLZERO_UNSET,
+ 	OPTION_MASK_ISA_RDPID_UNSET, OPTION_MASK_ISA_VAES_UNSET,
+ 	OPTION_MASK_ISA_MOVDIR64B_UNSET, OPTION_MASK_ISA_WAITPKG_UNSET,
+ 	OPTION_MASK_ISA_CLDEMOTE_UNSET, OPTION_MASK_ISA_ENQCMD_UNSET,
+ 	OPTION_MASK_ISA_AVX5124FMAPS, OPTION_MASK_ISA_AVX5124VNNIW,
+ 	OPTION_MASK_ISA_AVX512BF16, OPTION_MASK_ISA_AVX512VP2INTERSECT,
+ 	OPTION_MASK_ISA_PCONFIG, OPTION_MASK_ISA_WBNOINVD,
+ 	OPTION_MASK_ISA_SGX, OPTION_MASK_ISA_CX16, OPTION_MASK_ISA_MOVBE,
+ 	OPTION_MASK_ISA_PTWRITE, OPTION_MASK_ISA_MWAITX,
+ 	OPTION_MASK_ISA_CLZERO, OPTION_MASK_ISA_RDPID,
+ 	OPTION_MASK_ISA_VAES, OPTION_MASK_ISA_MOVDIR64B,
+ 	OPTION_MASK_ISA_WAITPKG, OPTION_MASK_ISA_CLDEMOTE,
+ 	OPTION_MASK_ISA_ENQCMD): Ditto.
+ 	* config/i386/i386-builtin.def
+ 	(OPTION_MASK_ISA_AVX5124FMAPS, OPTION_MASK_ISA_AVX5124VNNIW,
+ 	OPTION_MASK_ISA_AVX512BF16, OPTION_MASK_ISA_AVX512VP2INTERSECT,
+ 	OPTION_MASK_ISA_WBNOINVD, OPTION_MASK_ISA_PTWRITE,
+ 	OPTION_MASK_ISA_RDPID, OPTION_MASK_ISA_VAES,
+ 	OPTION_MASK_ISA_MOVDIR64B, OPTION_MASK_ISA_ENQCMD): Ditto.
+ 	* config/i386/i386-builtins.c (OPTION_MASK_ISA_MWAITX,
+ 	OPTION_MASK_ISA_CLZERO, OPTION_MASK_ISA_WAITPKG,
+ 	OPTION_MASK_ISA_CLDEMOTE, OPTION_MASK_ISA_WBNOINVD): Ditto.
+ 	* config/i386/i386-c.c
+ 	(OPTION_MASK_ISA_AVX5124FMAPS, OPTION_MASK_ISA_AVX5124VNNIW,
+ 	OPTION_MASK_ISA_AVX512BF16, OPTION_MASK_ISA_AVX512VP2INTERSECT,
+ 	OPTION_MASK_ISA_PCONFIG, OPTION_MASK_ISA_WBNOINVD,
+ 	OPTION_MASK_ISA_SGX, OPTION_MASK_ISA_CX16, OPTION_MASK_ISA_MOVBE,
+ 	OPTION_MASK_ISA_PTWRITE, OPTION_MASK_ISA_MWAITX,
+ 	OPTION_MASK_ISA_CLZERO, OPTION_MASK_ISA_RDPID,
+ 	OPTION_MASK_ISA_VAES, OPTION_MASK_ISA_MOVDIR64B,
+ 	OPTION_MASK_ISA_WAITPKG, OPTION_MASK_ISA_CLDEMOTE,
+ 	OPTION_MASK_ISA_ENQCMD): Ditto.
+ 	* config/i386/i386-option.c: Ditto
+ 	* config/i386/i386.opt: Ditto..
+ 	* config/i386/i386.h: (TARGET_ISA_AVX5124FMAPS,
+ 	TARGET_ISA_AVX5124VNNIW,  TARGET_ISA_AVX512BF16,
+ 	TARGET_ISA_AVX512VP2INTERSECT, TARGET_ISA_PCONFIG,
+ 	TARGET_ISA_WBNOINVD, TARGET_ISA_SGX, TARGET_ISA_CX16,
+ 	TARGET_ISA_MOVBE, TARGET_ISA_PTWRITE, TARGET_ISA_MWAITX,
+ 	TARGET_ISA_CLZERO, TARGET_ISA_RDPID, TARGET_ISA_VAES,
+ 	TARGET_ISA_MOVDIR64B, TARGET_ISA_WAITPKG, TARGET_ISA_CLDEMOTE)
+ 	TARGET_ISA_ENQCMD): Ditto.
+ 
+ 2019-12-09  Sudakshina Das  <sudi.das@arm.com>
+ 	    Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmt.c (vectorizable_shift): Condition ndts for
+ 	vect_model_simple_cost call on scalar_shift_arg.
+ 
+ 2019-12-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/92834
+ 	* match.pd (A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
+ 	A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): New simplifications.
+ 
+ 2019-12-09  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	PR tree-optimization/89007
+ 	* tree-vect-patterns.c (vect_recog_average_pattern): If there is no
+ 	target support available, generate code to distribute rshift over plus
+ 	and add a carry.
+ 
+ 2019-12-09  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/92737
+ 	* cgraph.c (symbol_table_test::symbol_table_test): Fix
+ 	coding style.
+ 	* cgraph.h (symtab_node::symtab_node): New constructor.
+ 	(cgraph_node::cgraph_node): Likewise.
+ 	(varpool_node::varpool_node): Likewise.
+ 	(symbol_table::allocate_cgraph_symbol): Use newly
+ 	created constructor.
+ 	(symbol_table::allocate_cgraph_symbol): Remove.
+ 	* cgraphunit.c (symtab_terminator): Likewise.
+ 	* varpool.c (varpool_node::create_empty): Use newly
+ 	created constructor.
+ 
+ 2019-12-09  Hongtao Liu  <hongtao.liu@intel.com>
+ 
+ 	PR target/92686
+ 	* config/i386/sse.md
+ 	(*<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>,
+ 	*<avx512>_cmp<mode>3<mask_scalar_merge_name>,
+ 	*<avx512>_ucmp<mode>3<mask_scalar_merge_name>,
+ 	*<avx512>_ucmp<mode>3<mask_scalar_merge_name>): New.
+ 	* config/i386/i386.c (ix86_print_operand): New operand substitution.
+ 	* config/i386/i386-expand.c (ix86_valid_mask_cmp_mode):
+ 	New function.
+ 	(ix86_expand_sse_cmp): Relax condition for integer mask from
+ 	512-bit vector to all 128/256/512-bit vector. Delete code gen
+ 	for avx512f compare patterns since we have generic pattern now.
+ 	(ix86_expand_sse_movcc): Adjust condition and codegen for
+ 	maskcmp.
+ 	(ix86_expand_int_sse_cmp): Don't canonicalize the comparison
+ 	when corresponding vector compare is available.
+ 
+ 2019-12-08  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	Revert:
+ 	2019-12-05  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	* config/nios2/linux.h (LINK_EH_SPEC): Define.
+ 
+ 2019-12-07  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cgraph.c (cgraph_node::dump): Make tp_first_run 64bit.
+ 	* cgraph.h (cgrpah_node): Likewise.
+ 	(tp_first_run_node_cmp): Deeclare.
+ 	* cgraphunit.c (node_cmp): Rename to ...
+ 	(tp_first_run_node_cmp): ... this; export; watch for 64bit overflows;
+ 	clear tp_first_run for no_reorder and !flag_profile_reorder_functions.
+ 	(expand_all_functions): Collect tp_first_run and normal functions to
+ 	two vectors so the other functions remain sorted. Do not check for
+ 	flag_profile_reorder_functions it is function local flag.
+ 	* profile.c (compute_value_histograms): Update tp_first_run printing.
+ 
+ 2019-12-07  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* opts.c (common_handle_option): Do not clear ipa_reference for
+ 	-fprofile-use.
+ 
+ 2019-12-07  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-split.c (split_function): Preserve 0 tp_first_run.
+ 
+ 2019-12-07  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline-analysis.c (do_estimate_edge_time): Silence overactive
+ 	sanity check.
+ 
+ 2019-12-07  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR tree-optimization/92860
+ 	* common.opt (fprofile-reorder-functions, ftoplevel-reorder): Add
+ 	Optimization flag.
+ 
+ 2019-12-07  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/91678 - wrong error with decltype and location wrapper.
+ 	* fold-const.c (maybe_lvalue_p): Handle VIEW_CONVERT_EXPR.
+ 
+ 2019-12-07  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR middle-end/90840
+ 	* expr.c (expand_assignment): In the case of a CONCAT on the LHS, make
+ 	sure to pass a valid inner mode in calls to simplify_gen_subreg.
+ 
+ 2019-12-07  Tobias Burnus  <tobias@codesourcery.com>
+ 	    David Malcolm  <dmalcolm@redhat.com>
+ 	    Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/87488
+ 	* pretty-print.c (pp_begin_url, pp_end_url, test_urls): Use BEL
+ 	instead of ST sequence to terminate OSC 8 strings.
+ 
+ 2019-12-06  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 	    Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/92176
+ 	* lra.c (simplify_subreg_regno): Don't permit unconditional
+ 	changing mode for LRA too.
+ 
+ 2019-12-06  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.h (TCTX_ALLOCATION, TCTX_DEALLOCATION, TCTX_EXCEPTIONS)
+ 	(TCTX_CAPTURE_BY_COPY): New type_context_kinds.
+ 	* config/aarch64/aarch64-sve-builtins.cc (verify_type_context):
+ 	Handle them.
+ 
+ 2019-12-06  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-valu.md (gather<mode>_insn_1offset<exec>): Use %o
+ 	in the asm output.
+ 
+ 2019-12-06  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-valu.md (VEC_1REG_MODE): Remove V64QI and V64HI.
+ 	(VEC_1REG_ALT): Likewise.
+ 	(VEC_ALL1REG_MODE): New mode iterator.
+ 	(VEC_1REG_INT_MODE): Remove V64QI and V64HI.
+ 	(VEC_1REG_INT_ALT): Likewise.
+ 	(VEC_ALL1REG_INT_MODE): New mode interator.
+ 	(VEC_ALL1REG_INT_ALT): Likewise.
+ 	(VEC_REG_MODE): Remove V64QI and V64HI.
+ 	(VEC_ALLREG_MODE): New mode interator.
+ 	(vec_merge): Change to VEC_ALLREG_MODE.
+ 	(vec_merge_with_clobber): Likewise.
+ 	(vec_merge_with_vcc): Likewise.
+ 	(mov<mode>): Likewise.
+ 	(mov<mode>_unspec): Likewise.
+ 	(*mov<mode>): Change to VEC_ALL1REG_MODE.
+ 	(mov<mode>_exec): Likewise.
+ 	(*mov<mode>_exec_match): Likewise.
+ 	(mov<mode>_sgprbase): Likewise.
+ 	(reload_in<mode>): Change to VEC_ALLREG_MODE.
+ 	(reload_out<mode>): Likewise.
+ 	(scalar address splits): Likewise.
+ 	(*vec_set<mode>): Change to VEC_ALL1REG_MODE.
+ 	(vec_set<mode>): Change to VEC_ALLREG_MODE.
+ 	(*vec_set<mode>_1): Change to VEC_ALL1REG_MODE.
+ 	(vec_duplicate<mode><exec>): Likewise.
+ 	(vec_extract<mode><scalar_mode>): Likewise.
+ 	(vec_init<mode><scalar_mode>): Change to VEC_ALLREG_MODE.
+ 	(gather_load<mode>): Likewise.
+ 	(gather<mode>_exec): Likewise.
+ 	(gather<mode>_expr<exec>): Likewise.
+ 	(gather<mode>_insn_1offset<exec>): Likewise.
+ 	(gather<mode>_insn_1offset_ds<exec>): Likewise.
+ 	(gather<mode>_insn_2offsets<exec>): Likewise.
+ 	(ds_bpermute<mode>): Change to VEC_ALL1REG_MODE.
+ 	(VEC_INT_MODE): Remove V64QI and V64HI.
+ 	(vcond_mask_<mode>di): Change to VEC_ALLREG_MODE.
+ 	(vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>): Change to
+ 	VEC_ALL1REG_MODE.
+ 	(vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Likewise.
+ 	(vcondu<VEC_1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Likewise.
+ 	(vcondu<VEC_1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Likewise.
+ 	(maskload<mode>di): Change to VEC_ALL1REG_MODE.
+ 	(maskstore<mode>di): Likewise.
+ 	(mask_gather_load<mode>): Likewise.
+ 	(mov_from_lane63_<mode>): Likewise.
+ 	* config/gcn/gcn.c (gcn_vector_mode_supported_p): Renable V64QImode
+ 	and V64HImode vectorization.
+ 	(gcn_related_vector_mode): New function.
+ 	(TARGET_VECTORIZE_RELATED_MODE): New define.
+ 
+ 2019-12-06  Tobias Burnus  <tobias@codesourcery.com>
+ 	    Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 
+ 	* omp-low.c (lower_omp_target): For optional arguments, deref once
+ 	more to obtain the type.
+ 
+ 2019-12-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	* match.pd (nop_convert): Remove empty match.  Use nop_convert?
+ 	everywhere.
+ 
+ 2019-12-06  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-data-ref.c (prune_runtime_alias_test_list): Exit early
+ 	for empty vectors.  Avoid using ordered_remove and instead
+ 	shuffle the vector as we go.
+ 
+ 2019-12-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	* genmatch.c (enum tree_code): Remove CONVERT{0,1,2} and
+ 	VIEW_CONVERT{0,1,2}.
+ 	(expr::opt_grp): Add and initialize.
+ 	(lower_opt_convert): Rename to ...
+ 	(lower_opt): ... and work on opt_grp, simply switching operations
+ 	from being optional to being present or not.
+ 	(has_opt_convert): Rename to ...
+ 	(has_opt): ... and adjust.
+ 	(parser::parse_operation): Return the optional opt_grp,
+ 	remove special-casing of conditional operations and more generally
+ 	parse [digit]'?'.
+ 	(parser::parse_expr): Stick on the parsed opt_grp and perform
+ 	rough verification.
+ 	(parser::parse_for): Remove now unnecessary code.
+ 	(main): Likewise.
+ 	* doc/match-and-simplify.texi: Mention ? now works on all
+ 	unary operations and also match predicates.
+ 
+ 2019-12-06  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cgraphclones.c (cgraph_node::create_clone): Only localize toplevel
+ 	functions, not inline clones.
+ 
+ 2019-12-06  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cfgexpand.c (expand_debug_expr): Do not ICE on SAD_EXPR.
+ 
+ 2019-12-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	* genmatch.c (c_expr::gen_transform): Emit newlines from line
+ 	number changes rather than after every semicolon.
+ 
+ 2019-12-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92819
+ 	* match.pd (VEC_PERM_EXPR -> BIT_INSERT_EXPR): Handle inserts
+ 	into the last lane.  For two-element vectors try inserting
+ 	into the last lane when inserting into the first fails.
+ 
+ 2019-12-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* common.opt (fprofile-partial-training): Terminate description with
+ 	full stop.
+ 
+ 2019-12-05  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/92622
+ 	* tree-vrp.c (vrp_prop::check_array_ref): Avoid using a variable
+ 	left uninitialized by get_addr_base_and_unit_offset on failure.
+ 
+ 2019-12-05  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-prop.c (ipa_set_jf_unknown): Do not clear bits and m_vr.
+ 	(detect_type_change_from_memory_writes): Remoe parameter JFUNC.
+ 	(detect_type_change): Likewise.
+ 	(detect_type_change_ssa): Likewise.
+ 	(ipa_analyze_virtual_call_uses): Update.
+ 
+ 2019-12-05  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	* config/nios2/linux.h (LINK_EH_SPEC): Define.
+ 
+ 2019-12-05  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline-transform.c (inline_call): Fix maintenatnce of comdat_local
+ 
+ 2019-12-05  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cgraphclones.c (localize_profile): New function.
+ 	(cgraph_node::create_clone): Use it for partial profiles.
+ 	* common.opt (fprofile-partial-training): New flag.
+ 	* doc/invoke.texi (-fprofile-partial-training): Document.
+ 	* ipa-cp.c (update_profiling_info): For partial profiles do not
+ 	set function profile to zero.
+ 	* profile.c (compute_branch_probabilities): With partial profile
+ 	watch if edge count is zero and turn all probabilities to guessed.
+ 	(compute_branch_probabilities): For partial profiles do not apply
+ 	profile when entry count is zero.
+ 	* tree-profile.c (tree_profiling): Only do value_profile_transformations
+ 	when profile is read.
+ 
+ 2019-12-05  Sudakshina Das  <sudi.das@arm.com>
+ 
+ 	* tree-vect-loop.c (vect_model_reduction_cost): Remove reduction_type
+ 	check from if condition.
+ 
+ 2019-12-05  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	* omp-low.c (lower_omp_target): For use_device_ptr/use_derice_addr
+ 	and Fortran's optional arguments, unconditionally add the is-present
+ 	condition before the libgomp call.
+ 
+ 2019-12-05  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/92768
+ 	* tree-core.h (OEP_BITWISE): New flag.
+ 	* fold-const.c (operand_compare::operand_equal_p): Handle it.
+ 	* tree-vector-builder.h (tree_vector_builder::equal_p): Pass it.
+ 
+ 2019-12-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/92818
+ 	* tree-ssa-forwprop.c (simplify_vector_constructor): Improve
+ 	heuristics on what don't care element to choose.
+ 	* match.pd (VEC_PERM_EXPR -> BIT_INSERT_EXPR): Fix typo.
+ 
+ 2019-12-05  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR gcov-profile/92817
+ 	* coverage.c (build_gcov_exit_decl): Remove superfluous
+ 	void_type_node.
+ 
+ 2019-12-05  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.md (cbranch<mode>4): Use
+ 	msp430_general_dst_nonv_operand instead of nonimmediate_operand for
+ 	dest operand of CMP instruction.
+ 	(cbranchpsi4_real): Likewise.
+ 	(cbranchqi4_real): Likewise.
+ 	(cbranchhi4_real): Likewise.
+ 	(cbranchpsi4_reversed): Likewise.
+ 	(cbranchqi4_reversed): Likewise.
+ 	(cbranchhi4_reversed): Likewise.
+ 
+ 2019-12-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92803
+ 	* tree-ssa-forwprop.c (simplify_vector_constructor): Fix
+ 	invariant vector construction.
+ 
+ 2019-12-05  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR gcov-profile/91971
+ 	* coverage.c (coverage_init): Mangle full path
+ 	only when -fprofile-dir is used.
+ 
+ 2019-12-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/92791
+ 	* config/i386/i386.md (movstrict<mode>): Move test for
+ 	TARGET_PARTIAL_REG_STALL and not optimizing for size from
+ 	expander's condition to the body - FAIL; in that case.
+ 
+ 2019-12-03  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/91582
+ 	* builtins.c (gimple_call_alloc_size): New function.
+ 	(compute_objsize): Add argument.  Call gimple_call_alloc_size.
+ 	Handle variable offsets and indices.
+ 	* builtins.h (gimple_call_alloc_size): Declare.
+ 	(compute_objsize): Add argument.
+ 	* gimple-ssa-warn-restrict.c: Remove assertions.
+ 	* tree-ssa-strlen.c (handle_store): Handle calls to allocated objects.
+ 
+ 2019-12-04  Julian Brown  <julian@codesourcery.com>
+ 
+ 	* config/gcn/gcn.h (FIXED_REGISTERS): Make s6/s7 fixed registers.
+ 
+ 2019-12-04  Peter Bergner <bergner@linux.ibm.com>
+ 
+ 	PR bootstrap/92661
+ 	* config/rs6000/rs6000-c.c (struct altivec_builtin_types): Move to
+ 	rs6000.h.
+ 	(altivec_overloaded_builtins): Move to rs6000-call.c.
+ 	* config/rs6000/rs6000.h (struct altivec_builtin_types): Moved from
+ 	rs6000-c.c.
+ 	* config/rs6000/rs6000-call.c (rs6000_builtin_info): Make static.
+ 	(altivec_overloaded_builtins): Moved from rs6000-c.c.
+ 	(rs6000_common_init_builtins): Do no define builtins that overload
+ 	builtins that have been disabled.
+ 
+ 2019-12-04  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/arm.c (arm_option_override_internal):
+ 	Use max_cond_insns from CPU tuning unless -mrestrict-it is used.
+ 
+ 2019-12-04  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/aarch64/aarch64.c
+ 	(thunderxt88_tunings): Use AARCH64_FUSE_ALU_BRANCH.
+ 	(thunderx_tunings): Likewise.
+ 	(tsv110_tunings): Use AARCH64_FUSE_ALU_BRANCH and AARCH64_FUSE_ALU_CBZ.
+ 	(thunderx2t99_tunings): Likewise.
+ 	(aarch_macro_fusion_pair_p): Add support for AARCH64_FUSE_CMP_BRANCH.
+ 	* config/aarch64/aarch64-fusion-pairs.def: Add ALU_CBZ fusion.
+ 
+ 2019-12-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
+ 	empty CTOR and memset partial-def registering.  Take advantage
+ 	of fancy offset analysis in memset handling.
+ 
+ 2019-12-04  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* fold-const.c (native_encode_vector_part): Handle
+ 	VECTOR_BOOLEAN_TYPE_Ps that have subbyte precision.
+ 	(native_decode_vector_tree): Delete, moving the bulk of the code to...
+ 	(native_interpret_vector_part): ...this new function.  Use a pointer
+ 	and length instead of a vec<> and start index.
+ 	(native_interpret_vector): Use native_interpret_vector_part.
+ 	(fold_view_convert_vector_encoding): Likewise.
+ 
+ 2019-12-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Handle
+ 	non-constant defs in the most trivial way.
+ 	(vn_reference_lookup_3): Also push down SSA partial defs.
+ 
+ 2019-12-04  Martin Liska  <mliska@suse.cz>
+ 
+ 	* tree-switch-conversion.c (switch_decision_tree::try_switch_expansion):
+ 	Initialize count of newly created BB.
+ 
+ 2019-12-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/92734
+ 	* match.pd ((A +- B) - A -> +- B, (A +- B) -+ B -> A,
+ 	A - (A +- B) -> -+ B, A +- (B -+ A) -> +- B): Handle nop_convert.
+ 
+ 2019-12-04  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	PR target/92760
+ 	* config/rs6000/rs6000.c (rs6000_preferred_simd_mode): Use
+ 	VECTOR_MEM_NONE_P instead of VECTOR_UNIT_NONE_P.
+ 
+ 2019-12-03  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-fnsummary.c: Include tree-into-ssa.h.
+ 	(compute_fn_summary): Call update_ssa.
+ 
+ 2019-12-03  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cgraph.c (cgraph_node::verify_node): Check that calls_comdat_local
+ 	is set only for symbol in comdat group.
+ 	* symtab.c (symtab_node::dissolve_same_comdat_group_1): Clear it.
+ 
+ 2019-12-03  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cgraph.c: Include tree-into-ssa.h
+ 	(cgraph_node::get_body): Call update_ssa.
+ 	* cgraphunit.c (cgraph_node::expand): Likewise.
+ 	* lto-streamer-in.c (input_function): Do not call update_ssa.
+ 
+ 2019-12-03  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* gimplify.c (gimplify_compound_lval): Don't gimplify and install
+ 	an array element size if array_element_size is already an invariant.
+ 	Similarly don't gimplify and install a field offset if
+ 	component_ref_field_offset is already an invariant.
+ 
+ 2019-12-03  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* cfgexpand.c (discover_nonconstant_array_refs_r): If an access
+ 	with POLY_INT_CST size is made to a fixed-size object, force the
+ 	object to live in memory.
+ 
+ 2019-12-03  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-valu.md: Change "vcondu" patterns to use VEC_1REG_MODE
+ 	for the data mode.
+ 
+ 2019-12-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92758
+ 	* tree-ssa-forwprop.c (simplify_vector_constructor): Restore
+ 	operation on uniform vectors.
+ 
+ 2019-12-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92645
+ 	* gimple-fold.c (gimple_fold_builtin_memory_op): Fold memcpy
+ 	from or to a properly aligned register variable.
+ 
+ 2019-12-03  Matthias Klose  <doko@ubuntu.com>
+ 
+ 	* Makefile.in (SOURCES): Add doc/lto-dump.1.
+ 	(install-man): Add $(LTO_DUMP_INSTALL_NAME)$(man1ext).
+ 	($(LTO_DUMP_INSTALL_NAME)$(man1ext): New.
+ 
+ 2019-12-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92751
+ 	* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Fail
+ 	when a clobber ends up in the partial-def vector.
+ 	(vn_reference_lookup_3): Let clobbers be handled by the
+ 	assignment from CTOR handling.
+ 
+ 2019-12-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/92734
+ 	* match.pd ((CST1 - A) +- CST2 -> CST3 - A,
+ 	CST1 - (CST2 - A) -> CST3 + A): Handle nop casts around
+ 	inner subtraction.
+ 
+ 2019-12-03  Uroš Bizjak  <ubizjak@gmail.com>
+ 	    Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/92744
+ 	* config/i386/i386.md (peephole2 for *swap<mode>): Use
+ 	general_reg_operand predicates instead of register_operand.
+ 
+ 2019-12-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92645
+ 	* tree-ssa.c (execute_update_addresses_taken): Avoid representing
+ 	a full def of a vector via a BIT_INSERT_EXPR.
+ 
+ 2019-12-02  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-call.c (rs6000_invalid_builtin): Make
+ 	static.
+ 	* config/rs6000/rs6000-internal.h (rs6000_invalid_builtin): Remove
+ 	decl.
+ 
+ 2019-12-02  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/92741
+ 	* fold-const.c (fold_convertible_p): Check vector types more
+ 	thoroughly.
+ 
+ 2019-12-02  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_report_sve_required): New function.
+ 	(aarch64_expand_mov_immediate): Use it when attempting to measure
+ 	the length of an SVE vector.
+ 	(aarch64_mov_operand_p): Only allow SVE CNT immediates when
+ 	SVE is enabled.
+ 
+ 2019-12-02  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve-builtins.h
+ 	(gimple_folder::force_vector): Declare.
+ 	* config/aarch64/aarch64-sve-builtins.cc
+ 	(gimple_folder::force_vector): New function.
+ 	* config/aarch64/aarch64-sve-builtins-base.cc
+ 	(svcmp_impl::fold): Likewise.
+ 	(svdup_impl::fold): Handle svdup_z too.
+ 
+ 2019-12-02  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-devirt.c (warn_types_mismatch): Use get_odr_name_for_type
+ 	function.
+ 	(debug_tree_odr_name): New.
+ 	* ipa-utils.h (get_odr_name_for_type): New.
+ 
+ 2019-12-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92742
+ 	* tree-vect-loop.c (vect_fixup_reduc_chain): Do not
+ 	touch the def-type but verify it is consistent with the
+ 	original stmts.
+ 
+ 2019-12-02  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/92712
+ 	* match.pd ((A * B) +- A -> (B +- 1) * A,
+ 	A +- (A * B) -> (1 +- B) * A): Allow optimizing signed integers
+ 	even when we don't know anything about range of A, but do know
+ 	something about range of B and the simplification won't introduce
+ 	new UB.
+ 
+ 2019-12-02  Feng Xue  <fxue@os.amperecomputing.com>
+ 
+ 	PR ipa/92133
+ 	* doc/invoke.texi (ipa-cp-max-recursive-depth): Document new option.
+ 	(ipa-cp-min-recursive-probability): Likewise.
+ 	* params.opt (ipa-cp-max-recursive-depth): New.
+ 	(ipa-cp-min-recursive-probability): Likewise.
+ 	* ipa-cp.c (ipcp_lattice<valtype>::add_value): Add two new parameters
+ 	val_p and unlimited.
+ 	(self_recursively_generated_p): New function.
+ 	(get_val_across_arith_op): Likewise.
+ 	(propagate_vals_across_arith_jfunc): Add constant propagation for
+ 	self-recursive function.
+ 	(incorporate_penalties): Do not penalize pure self-recursive function.
+ 	(good_cloning_opportunity_p): Dump node_is_self_scc flag.
+ 	(propagate_constants_topo): Set node_is_self_scc flag for cgraph node.
+ 	(get_info_about_necessary_edges): Relax hotness check for edge to
+ 	self-recursive function.
+ 	* ipa-prop.h (ipa_node_params): Add new field node_is_self_scc.
+ 
+ 2019-12-01  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	PR target/92499
+ 
+ 	* config/nios2/nios2.c (nios2_in_small_data_p): Do not consider
+ 	objects of flexible types to be small if they have internal linkage
+ 	or are declared extern.
+ 	* config/nios2/nios2.h (ASM_OUTPUT_ALIGNED_LOCAL): Replace with...
+ 	(ASM_OUTPUT_ALIGNED_DECL_LOCAL): ...this.  Use targetm.in_small_data_p
+ 	instead of the size of the object initializer.
+ 	* tree.c (flexible_array_type_p): Move from C front end, and
+ 	generalize to handle fields in non-C structures.
+ 	* tree.h (flexible_array_type_p): Declare.
+ 
+ 2019-11-30  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* profile-count.h (profile_count::operator<): Use IPA value for
+ 	comparsion.
+ 	(profile_count::operator>): Likewise.
+ 	(profile_count::operator<=): Likewise.
+ 	(profile_count::operator>=): Likewise.
+ 	* predict.c (maybe_hot_count_p): Do not convert to gcov_type.
+ 
+ 2019-11-30  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline.c (compute_max_insns): Return int64_t.
+ 	(inline_small_functions): Simplify.
+ 
+ 2019-11-30  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-cfg.c (execute_fixup_cfg): Update also max_bb_count when
+ 	scaling happen.
+ 
+ 2019-11-30  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cgraph.h (symtab_node): Add symver flag.
+ 	* cgraphunit.c (process_symver_attribute): New.
+ 	(process_common_attributes): Use process_symver_attribute.
+ 	* lto-cgraph.c (lto_output_node): Stream symver.
+ 	(lto_output_varpool_node): Stream symver.
+ 	(input_overwrite_node): Stream symver.
+ 	(input_varpool_node): Stream symver.
+ 	* output.h (do_assemble_symver): Decalre.
+ 	* symtab.c (symtab_node::dump_base): Dump symver.
+ 	(symtab_node::verify_base): Verify symver.
+ 	(symtab_node::resolve_alias): Handle symver.
+ 	* varasm.c (do_assemble_symver): New function.
+ 	* varpool.c (varpool_node::assemble_aliases): Use it.
+ 	* doc/extend.texi: (symver attribute): Document.
+ 	* config/elfos.h (ASM_OUTPUT_SYMVER_DIRECTIVE): New.
+ 
+ 2019-11-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.h (type_context_kind): New enum.
+ 	(verify_type_context): Declare.
+ 	* target.def (verify_type_context): New target hook.
+ 	* doc/tm.texi.in (TARGET_VERIFY_TYPE_CONTEXT): Likewise.
+ 	* doc/tm.texi: Regenerate.
+ 	* tree.c (verify_type_context): New function.
+ 	* config/aarch64/aarch64-protos.h (aarch64_sve::verify_type_context):
+ 	Declare.
+ 	* config/aarch64/aarch64-sve-builtins.cc (verify_type_context):
+ 	New function.
+ 	* config/aarch64/aarch64.c (aarch64_verify_type_context): Likewise.
+ 	(TARGET_VERIFY_TYPE_CONTEXT): Define.
+ 
+ 2019-11-30  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cgraph.c (cgraph_node::dump): Dump unit_id and merged_extern_inline.
+ 	* cgraph.h (cgraph_node): Add unit_id and
+ 	merged_extern_inline.
+ 	(symbol_table): Add max_unit.
+ 	(symbol_table::symbol_table): Initialize it.
+ 	* cgraphclones.c (duplicate_thunk_for_node): Copy unit_id.
+ 	merged_comdat, merged_extern_inline.
+ 	(cgraph_node::create_clone): Likewise.
+ 	(cgraph_node::create_version_clone): Likewise.
+ 	* ipa-fnsummary.c (dump_ipa_call_summary): Dump info about cross module
+ 	calls.
+ 	* ipa-fnsummary.h (cross_module_call_p): New inline function.
+ 	* ipa-inline-analyssi.c (simple_edge_hints): Use it.
+ 	* ipa-inline.c (inline_small_functions): Likewise.
+ 	* lto-symtab.c (lto_cgraph_replace_node): Record merged_extern_inline;
+ 	copy merged_comdat and merged_extern_inline.
+ 	* lto-cgraph.c (lto_output_node): Stream out merged_comdat,
+ 	merged_extern_inline and unit_id.
+ 	(input_overwrite_node): Stream in these.
+ 	(input_cgraph_1): Set unit_base.
+ 	* lto-streamer.h (lto_file_decl_data): Add unit_base.
+ 	* symtab.c (symtab_node::make_decl_local): Record former_comdat.
+ 
+ 2019-11-30  Maciej W. Rozycki  <macro@wdc.com>
+ 
+ 	* gcc.c (process_command): Only warn about an ineffective `-x'
+ 	option if any input files have actually been supplied.
+ 
+ 2019-11-30  Maciej W. Rozycki  <macro@wdc.com>
+ 
+ 	* doc/install.texi (Options specification): Remove the list of
+ 	target library subdirectories supporting
+ 	`--enable-version-specific-runtime-libs'.  Document defaults for
+ 	the option.
+ 
+ 2019-11-29  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/92283
+ 	* lra.c (lra): Update reg notes after inheritance sub-pass and
+ 	before constraint sub-pass.
+ 
+ 2019-11-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91003
+ 	* tree-vect-slp.c (vect_mask_constant_operand_p): Pass in the
+ 	operand number, avoid handling the non-condition operands of
+ 	COND_EXPRs as comparisons.
+ 	(vect_get_constant_vectors): Pass down the operand number.
+ 	(vect_get_slp_defs): Likewise.
+ 
+ 2019-11-29  Frederik Harwath  <frederik@codesourcery.com>
+ 
+ 	* gimple-match-head.c (maybe_resimplify_conditional_op): Use
+   	generic_expr_could_trap_p to check if the condition of COND_EXPR or
+   	VEC_COND_EXPR can trap.
+ 
+ 2019-11-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/92677
+ 	* tree-vect-loop.c (vect_dissolve_slp_only_groups): Set the gap
+ 	to zero when dissolving a group of strided accesses.
+ 
+ 2019-11-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/92596
+ 	* tree-vect-stmts.c (vectorizable_call): Punt on hybrid mask/nonmask
+ 	operations.
+ 	(vectorizable_operation): Likewise, instead of relying on
+ 	vect_get_mask_type_for_stmt to do this.
+ 	(vect_get_vector_types_for_stmt): Always return a vector type
+ 	immediately, rather than deferring the choice for boolean results.
+ 	Use a vector mask type instead of a normal vector if
+ 	vect_use_mask_type_p.
+ 	(vect_get_mask_type_for_stmt): Delete.
+ 	* tree-vect-loop.c (vect_determine_vf_for_stmt_1): Remove
+ 	mask_producers argument and special boolean_type_node handling.
+ 	(vect_determine_vf_for_stmt): Remove mask_producers argument and
+ 	update calls to vect_determine_vf_for_stmt_1.  Remove doubled call.
+ 	(vect_determine_vectorization_factor): Update call accordingly.
+ 	* tree-vect-slp.c (vect_build_slp_tree_1): Remove special
+ 	boolean_type_node handling.
+ 	(vect_slp_analyze_node_operations_1): Likewise.
+ 
+ 2019-11-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (stmt_vec_info::mask_precision): New field.
+ 	(vect_use_mask_type_p): New function.
+ 	* tree-vect-patterns.c (vect_init_pattern_stmt): Copy the
+ 	mask precision to the pattern statement.
+ 	(append_pattern_def_seq): Add a scalar_type_for_mask parameter
+ 	and use it to initialize the new stmt's mask precision.
+ 	(search_type_for_mask_1): Delete.
+ 	(search_type_for_mask): Replace with...
+ 	(integer_type_for_mask): ...this new function.  Use the information
+ 	cached in the stmt_vec_info.
+ 	(vect_recog_bool_pattern): Update accordingly.
+ 	(build_mask_conversion): Pass the scalar type associated with the
+ 	mask type to append_pattern_def_seq.
+ 	(vect_recog_mask_conversion_pattern): Likewise.  Call
+ 	integer_type_for_mask instead of search_type_for_mask.
+ 	(vect_convert_mask_for_vectype): Call integer_type_for_mask instead
+ 	of search_type_for_mask.
+ 	(possible_vector_mask_operation_p): New function.
+ 	(vect_determine_mask_precision): Likewise.
+ 	(vect_determine_stmt_precisions): Call it.
+ 
+ 2019-11-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (get_mask_type_for_scalar_type): Replace
+ 	the slp_tree parameter with a group size parameter.
+ 	(vect_get_mask_type_for_stmt): Likewise.
+ 	* tree-vect-stmts.c (get_mask_type_for_scalar_type): Likewise.
+ 	(vect_get_mask_type_for_stmt): Likewise.
+ 	* tree-vect-slp.c (vect_slp_analyze_node_operations_1): Update
+ 	call accordingly.
+ 
+ 2019-11-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vectorizable_operation): Punt early
+ 	on codes that are handled elsewhere.
+ 
+ 2019-11-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* doc/sourcebuild.texi (vect_bool_cmp): Document.
+ 	* tree-vect-patterns.c (search_type_for_mask_1): If neither
+ 	operand to a boolean comparison is a natural vector mask,
+ 	handle both operands like normal integers instead.
+ 
+ 2019-11-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Bail
+ 	out early for too large objects.
+ 
+ 2019-11-29  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/92476
+ 	* ipa-cp.c (set_single_call_flag): Set node_calling_single_call in
+ 	the summary only if the summary exists.
+ 	(find_more_scalar_values_for_callers_subset): Check node_dead in
+ 	the summary only if the summary exists.
+ 	(ipcp_store_bits_results): Ignore nodes without lattices.
+ 	(ipcp_store_vr_results): Likewise.
+ 	* cgraphclones.c: Include ipa-fnsummary.h and ipa-prop.h and the
+ 	header files required by them.
+ 	(cgraph_node::expand_all_artificial_thunks): Analyze expanded thunks.
+ 
+ 2019-11-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/92710
+ 	* tree-vect-stmts.c (vectorizable_simd_clone_call): Reject
+ 	vector mask arguments.
+ 
+ 2019-11-29  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* profile-count.c (profile_count::to_cgraph_frequency,
+ 	profile_count::to_sreal_scale): Check for compaibility of counts.
+ 	* profile-count.h (compatible_p): Make public; add checking for
+ 	global0 versus global types.
+ 	* cgraph.c (cgraph_node::verify_node): Verify count compatibility.
+ 
+ 2019-11-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92715
+ 	* tree-ssa-forwprop.c (simplify_vector_constructor): Bail
+ 	out for uniform vectors and source vectors with less elements
+ 	than the destination.
+ 
+ 2019-11-29  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR lto/91574
+ 	* ipa-devirt.c (types_same_for_odr): Check for existence
+ 	of TYPE_NAMEs first.
+ 
+ 2019-11-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92704
+ 	* tree-if-conv.c (combine_blocks): Deal with virtual PHIs
+ 	in loops performing only loads.
+ 
+ 2019-11-29  Julian Brown  <julian@codesourcery.com>
+ 
+ 	* builtin-types.def (BT_DFLOAT32_PTR, BT_DFLOAT64_PTR,
+ 	BT_DFLOAT128_PTR) Remove.
+ 	* tree-core.h (TI_DFLOAT32_PTR_TYPE, TI_DFLOAT64_PTR_TYPE,
+ 	TI_DFLOAT128_PTR_TYPE): Remove.
+ 	* tree.c (build_common_type_nodes): Remove dfloat32_ptr_type_node,
+ 	dfloat64_ptr_type_node and dfloat128_ptr_type_node initialisation.
+ 	* tree.h (dfloat32_ptr_type_node, dfloat64_ptr_type_node,
+ 	dfloat128_ptr_type_node): Remove macros.
+ 
+ 2019-11-28  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (*movsi_internal1): Fix formatting.  Improve
+ 	formatting.
+ 	(*movdi_internal64): Ditto.
+ 
+ 2019-11-28  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR target/92602
+ 	* config/rs6000/rs6000.md (bswap<mode>2_load for HSI): Change the
+ 	indexed_or_indirect_operand to be memory_operand.
+ 	(bswap<mode>2_store for HSI): Ditto.
+ 	(bswapdi2_load): Ditto.
+ 	(bswapdi2_store): Ditto.
+ 
+ 2019-11-28  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR debug/46558
+ 	* dbgcnt.c (dbg_cnt_list_all_counters): Mark table
+ 	headers for translation.
+ 
+ 2019-11-28  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR lto/92609
+ 	* ipa-devirt.c (warn_types_mismatch): Use TYPE_MAIN_VARIANT
+ 	consistently.
+ 
+ 2019-11-28  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline.c (want_early_inline_function_p): Remove leftover optimize
+ 	checks.
+ 
+ 2019-11-28  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* profile-count.c (profile_count::combine_with_ipa_count): Return
+ 	uninitialized count if called on ininitialized count.
+ 
+ 2019-11-28  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline-transform.c (inline_transform): Scale profile before
+ 	redirecting.
+ 
+ 2019-11-28  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* profile-count.h (profile_count::max): Work on profiles of different
+ 	type.
+ 	(profile_count::apply_scale): Be sure that ret is not local or global0
+ 	type if num is global.
+ 
+ 2019-11-28  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* profile-count.h (profile_count::max): Work on profiles of different
+ 	type.
+ 	(profile_count::apply_scale): Be sure that ret is not local or global0
+ 	type if num is global.
+ 
+ 2019-11-28  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/92697
+ 	* cgraph.c (cgraph_node_cannot_be_local_p_1): Return true for
+ 	ifunc_resolvers.
+ 	* symtab.c (symtab_node::dump_base): Dump ifunc_resolver flag.
+ 	Removed trailig whitespace.
+ 
+ 2019-11-28  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* profile-count.h (profile_count::combine_with_ipa_count_within):
+ 	Declare.
+ 	* profile-count.c (profile_count::combine_with_ipa_count_within):
+ 	New.
+ 	* cgraphclones.c (cgraph_edge::clone, cgraph_node::create_clone): Use
+ 	it.
+ 
+ 2019-11-28  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-utils.c (ipa_merge_profiles): Be sure that all type transtions
+ 	of counters are done same way.
+ 
+ 2019-11-28  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-cp.c (update_profiling_info): Fix scaling.
+ 
+ 2019-11-28  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92645
+ 	* tree-inline.c (remap_gimple_stmt): When the return value
+ 	is not wanted, elide GIMPLE_RETURN.
+ 
+ 2019-11-28  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92645
+ 	* tree-ssa-forwprop.c (get_bit_field_ref_def): Also handle
+ 	conversions inside a mode class.  Remove restriction on
+ 	preserving the element size.
+ 	(simplify_vector_constructor): Deal with the above and for
+ 	identity permutes also try using VEC_UNPACK_[FLOAT_]LO_EXPR
+ 	and VEC_PACK_TRUNC_EXPR.
+ 
+ 2019-11-28  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Must use push insn to pass varargs arguments of DFmode because
+ 	otherwise the middle-end generates wrong code.
+ 
+ 	PR target/92055
+ 	* config/avr/avr.md (MPUSH) [DF, DC]: Add modes to mode iterator.
+ 
+ 2019-11-28  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/92691
+ 	* tree-ssa-strlen.c (handle_store): Clarify return value meaning
+ 	in function comment.
+ 	(strlen_check_and_optimize_call): Likewise.  For handle_printf_call
+ 	calls, return !handle_printf_call rather than always returning true.
+ 	(check_and_optimize_stmt): Describe return value meaning in function
+ 	comment.  Formatting fix.
+ 
+ 2019-11-28  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* profile-count.c (profile_count::to_sreal_scale): Handle correctly
+ 	combination of globa0 and global counters..
+ 
+ 2019-11-28  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	PR target/92566
+ 	* config/rs6000/rs6000.c (rs6000_preferred_simd_mode): Check
+ 	by VECTOR_UNIT_NONE_P instead.
+ 
+ 2019-11-28  Hongtao Liu  <hongtao.liu@inte.com>
+ 
+ 	* config/i386/sse.md (avx512f_maskcmp<mode>3):
+ 	Refine VF to VF_AVX512VL.
+ 
+ 2019-11-27  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.md (movsi_internal): Reformat.
+ 	(movdi_internal64): Reformat.
+ 
+ 2019-11-27  Peter Bergner <bergner@linux.ibm.com>
+ 
+ 	PR bootstrap/92661
+ 	* config/rs6000/rs6000-call.c: (def_builtin): Do not define the
+ 	builtin if we don't have an actual type.
+ 	(builtin_function_type): If the builtin function uses a DFP type
+ 	and decimal float has been disabled, then return NULL_TREE.
+ 
+ 2019-11-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/92510
+ 	* combine.c (gen_lowpart_for_combine): Only transform lowpart subreg
+ 	of comparison into a comparison with different mode if both imode and
+ 	omode are scalar integral modes.
+ 
+ 2019-11-27  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/90007
+ 	* recog.c (constrain_operands): Permit hard registers too for
+ 	memory when LRA is used.
+ 
+ 2019-11-27  Bernd Schmidt  <bernds_cb1@t-online.de>
+ 
+ 	* config/m68k/m68k.c (m68k_output_compare_fp): Restore differences
+ 	between Coldfire and regular m68k.
+ 	* config/m68k/m68k.md (cmp1_cf_constraints): Disallow constants.
+ 
+ 2019-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	* target.def (TARGET_VECTORIZE_BUILTIN_CONVERSION): Remove.
+ 	* targhooks.c (default_builtin_vectorized_conversion): Likewise.
+ 	* targhooks.h (default_builtin_vectorized_conversion): Likewise.
+ 	* optabs-tree.c (supportable_convert_operation): Do not call
+ 	targetm.vectorize.builtin_conversion.  Remove unused decl parameter.
+ 	* optabs-tree.h (supportable_convert_operation): Adjust.
+ 	* doc/tm.texi.in (TARGET_VECTORIZE_BUILTIN_CONVERSION): Remove.
+ 	* doc/tm.texi: Regenerate.
+ 	* tree-ssa-forwprop.c (simplify_vector_constructor): Adjust.
+ 	* tree-vect-generic.c (expand_vector_conversion): Likewise.
+ 	* tree-vect-stmts.c (vect_gen_widened_results_half): Remove
+ 	unused decl parameter and adjust.
+ 	(vect_create_vectorized_promotion_stmts): Likewise.
+ 	(vectorizable_conversion): Adjust.
+ 
+ 2019-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92690
+ 	* tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
+ 	converting elements not originally converted.
+ 
+ 2019-11-27  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	PR middle-end/92463
+ 	* builtins.c (do_mpfr_ckconv, do_mpc_ckconv, do_mpfr_remquo,
+ 	do_mpfr_lgamma_r, do_mpc_arg2): Use MPFR_RNDx instead of GMP_RNDx,
+ 	mpfr_rnd_t instead of mp_rnd_t.
+ 	* fold-const-call.c (do_mpfr_ckconv, do_mpfr_arg1, do_mpfr_sincos,
+ 	do_mpfr_arg2, do_mpfr_arg3, do_mpc_arg1, do_mpc_arg2): Likewise.
+ 	* gimple-ssa-sprintf.c (format_floating_max, format_floating):
+ 	Use mpfr_exp_t instead of mp_exp_t.
+ 	* real.c (real_from_string, dconst_e_ptr, dconst_sqrt2_ptr): Use
+ 	MPFR_RNDx instead of GMP_RNDx.
+ 	* realmpfr.c (real_from_mpfr, mpfr_from_real): Use mpfr_rnd_t and
+ 	mpfr_exp_t instead mp_rnd_t and mp_exp_t, respectively.
+ 	* realmpfr.h (real_from_mpfr, mpfr_from_real): Use mpfr_rnd_t instead
+ 	of mp_rnd_t and remove MPFR_RNDx poisoning.
+ 	* ubsan.c (ubsan_instrument_float_cast): MPFR_RNDx instead of GMP_RNDx.
+ 
+ 2019-11-27  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	PR tree-optimization/91790
+ 	* tree-vect-stmts.c (vectorizable_load): Use the adjusted
+ 	DR for vect_setup_realignment when first_stmt_info is different
+ 	from first_stmt_info_for_drptr.
+ 
+ 2019-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92645
+ 	* tree-ssa-forwprop.c (simplify_vector_constructor): Handle
+ 	CTORs with just a subset of the original vectors.
+ 
+ 2019-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/92674
+ 	* tree-inline.c (expand_call_inline): Delay purging EH/abnormal
+ 	edges and instead record blocks in bitmap.
+ 	(gimple_expand_calls_inline): Adjust.
+ 	(fold_marked_statements): Delay EH cleanup until all folding is
+ 	done.
+ 	(optimize_inline_calls): Do EH/abnormal cleanup for calls after
+ 	inlining finished.
+ 
+ 2019-11-27  Bernd Schmidt  <bernds_cb1@t-online.de>
+ 
+ 	* auto-inc-dec.c (merge_in_block): Allow autoinc in jumps unless
+ 	LRA is enabled.
+ 	* combine.c (can_combine_p): Disallow autoinc in jumps unless LRA is
+ 	disabled.
+ 
+ 2019-11-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR debug/92664
+ 	* dwarf2out.c (lookup_filename): Use "<stdin>" instead of "".
+ 
+ 2019-11-26  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/92683
+ 	* gimple-fold.c (gimple_fold_builtin_string_compare): Restore a test
+ 	inadvertently removed in a previous change.  Rename local variable
+ 	for clarity.
+ 
+ 2019-11-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/92669
+ 	* cfganal.c (pre_and_rev_post_order_compute_fn): Deal with
+ 	NULL pre_order.
+ 
+ 2019-11-26  Robin Dapp  <rdapp@linux.ibm.com>
+ 
+ 	* config/s390/linux.h: Add undef for MUSL_DYNAMIC_LINKERxx.
+ 
+ 2019-11-26  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/92644
+ 	* tree-ssa-phiopt.c (minmax_replacement): Add INTEGRAL_TYPE_P check
+ 	next to INTEGER_CST checks.
+ 
+ 2019-11-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92645
+ 	* tree-vect-slp.c (vect_build_slp_tree_2): For unary ops
+ 	do not build the operation from scalars if the operand is.
+ 
+ 2019-11-25  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	* config/gcn/mkoffload.c (COMMENT_PREFIX, struct id_map,
+ 	func_ids, funcs_tail, var_ids, vars_tail) Remove unused
+ 	definitions.
+ 
+ 2019-11-25  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf.c (sem_item_optimizer::dump_cong_classes): Clean
+ 	up used dump message.
+ 
+ 2019-11-25  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR bootstrap/92653
+ 	* ipa-fnsummary.c (ipa_fn_summary::account_size_time): Comment out
+ 	too strict checking assert.
+ 
+ 2019-11-25  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	PR c/91985
+ 	* builtin-types.def (BT_DFLOAT32, BT_DFLOAT64, BT_DFLOAT128)
+ 	(BT_DFLOAT32_PTR, BT_DFLOAT64_PTR, BT_DFLOAT128_PTR): Define to
+ 	error_mark_node if corresponding global tree node is NULL.
+ 	* tree.c (build_common_tree_nodes): Do not initialize
+ 	dfloat32_type_node, dfloat64_type_node or dfloat128_type_node if
+ 	decimal floating-point not supported.
+ 
+ 2019-11-25  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* attribs.c (decl_attributes): Do not ignore C++11 attributes on
+ 	types.
+ 
+ 2019-11-25  Bernd Schmidt  <bernds_cb1@t-online.de>
+ 
+ 	* config/m68k/m68k.c (output_move_himode, output_move_qimode):
+ 	Replace code for non-CONST_INT constants with gcc_unreachable.
+ 	* config/m68k/m68k.md (cbranchdi): Don't generate individual
+ 	compare and test.
+ 	(CMPMODE): New mode_iterator.
+ 	(cbranchsi4, cbranchqi4, cbranchhi4): Replace expanders with
+ 	cbranch<mode>4.
+ 	(cstoresi4, cstoreqi4, cstorehi4): Replace expanders with
+ 	cstore<mode>4.
+ 	(cmp<mode>_68881): Remove 'F' constraint from first comparison
+ 	operand.
+ 	(bit test insns patterns): Use nonimmediate_operand, not
+ 	register_operand, for source operands that allow memory in
+ 	their constraints.
+ 	(divmodsi4, udivmodsi4, divmodhi4 and related unnamed patterns):
+ 	Use register_operand, not nonimmediate_operand, for the
+ 	destinations.
+ 	(DBCC): New mode_iterator.
+ 	(dbcc peepholes): Use it to reduce duplication.
+ 	(trap): Use const_true_rtx, not const1_rtx.
+ 	* config/m68k/predicates.md (m68k_comparison_operand): Renamed
+ 	from m68k_subword_comparison_operand and changed to handle
+ 	SImode.
+ 
+ 	PR target/91851
+ 	* config/m68k/m68k-protos.h (output-dbcc_and_branch): Adjust
+ 	declaration.
+ 	(m68k_init_cc): New declaration.
+ 	(m68k_output_compare_di, m68k_output_compare_si)
+ 	(m68k_output_compare_hi, m68k_output_compare_qi)
+ 	(m68k_output_compare_fp, m68k_output_btst, m68k_output_bftst)
+ 	(m68k_find_flags_value, m68k_output_scc, m68k_output_scc_float)
+ 	(m68k_output_branch_integer, m68k_output_branch_integer_rev.
+ 	m68k_output_branch_float, m68k_output_branch_float_rev):
+ 	Likewise.
+ 	(valid_dbcc_comparison_p_2, flags_in_68881)
+ 	(output_btst): Remove declaration.
+ 	* config/m68k/m68k.c (INCLDUE_STRING): Define.
+ 	(TARGET_ASM_FINAL_POSTSCAN_INSN): Define.
+ 	(valid_dbcc_comparison_p_2, flags_in_68881): Delete functions.
+ 	(flags_compare_op0, flags_compare_op1, flags_operand1,
+ 	flags_operand2, flags_valid): New static variables.
+ 	(m68k_find_flags_value, m68k_init_cc): New functions.
+ 	(handle_flags_for_move, m68k_asm_final_postscan_insn,
+ 	remember_compare_flags): New static functions.
+ 	(output_dbcc_and_branch): New argument CODE.  Use it, and add
+ 	PLUS and MINUS to the possible codes.  All callers changed.
+ 	(m68k_output_btst): Renamed from output_btst.  Remove OPERANDS
+ 	and INSN arguments, add CODE arg.  Return the comparison code
+ 	to use.  All callers changed.  Use CODE instead of
+ 	next_insn_tests_no_inequality, and replace cc_status management
+ 	with changing the return code.
+ 	(m68k_rtx_costs): Instead of testing for COMPARE, test for
+ 	RTX_COMPARE or RTX_COMM_COMPARE.
+ 	(output_move_simode, output_move_qimode): Call
+ 	handle_flags_for_move.
+ 	(notice_update_cc): Delete function.
+ 	(m68k_output_bftst, m68k_output_compare_di, m68k_output_compare_si,
+ 	m68k_output_compare_hi, m68k_output_compare_qi,
+ 	m68k_output_compare_fp, m68k_output_branch_integer,
+ 	m68k_output_branch_integer_rev, m68k_output_scc,
+ 	m68k_output_branch_float, m68k_output_branch_float_rev,
+ 	m68k_output_scc_float): New functions.
+ 	(output_andsi3, output_iorsi3, output_xorsi3): Call CC_STATUS_INIT
+ 	once at the start, and set flags_valid and flags_operand1 if the
+ 	flags are usable.
+ 	* config/m68k/m68k.h (CC_IN_68881, NOTICE_UPDATE_CC,
+ 	CC_OVERFLOW_UNUSABLE, CC_NO_CARRY, OUTPUT_JUMP): Remove
+ 	definitions.
+ 	(CC_STATUS_INIT): Define.
+ 	* config/m68k/m68k.md (flags_valid): New define_attr.
+ 	(tstdi, tstsi_internal_68020_cf, tstsi_internal, tsthi_internal,
+ 	tstqi_internal, tst<mode>_68881, tst<mode>_cf, cmpdi_internal,
+ 	cmpdi, unnamed cmpsi/cmphi/cmpqi patterns, cmpsi_cf,
+ 	cmp<mode>_68881, cmp<mode>_cf, unnamed btst patterns,
+ 	tst_bftst_reg, tst_bftst_reg, unnamed scc patterns, scc,
+ 	sls, sordered_1, sunordered_1, suneq_1, sunge_1, sungt_1,
+ 	sunle_1, sunlt_1, sltgt_1, fsogt_1, fsoge_1, fsolt_1, fsole_1,
+ 	bge0_di, blt0_di, beq, bne, bgt, bgtu, blt, bltu, bge, bgeu,
+ 	ble, bleu, bordered, bunordered, buneq, bunge, bungt, bunle,
+ 	bunlt, bltgt, beq_rev, bne_rev, bgt_rev, bgtu_rev,
+ 	blt_rev, bltu_rev, bge_rev, bgeu_rev, ble_rev, bleu_rev,
+ 	bordered_rev, bunordered_rev, buneq_rev, bunge_rv, bungt_rev,
+ 	bunle_rev, bunlt_rev, bltgt_rev, ctrapdi4, ctrapsi4, ctraphi4,
+ 	ctrapqi4, conditional_trap): Delete patterns.
+ 	(cbranchdi4_insn): New pattern.
+ 	(cbranchdi4): Don't generate cc0 patterns.  When testing LT or GE,
+ 	test high part only.  When testing EQ or NE, generate beq0_di
+ 	and bne0_di patterns directly.
+ 	(cstoredi4): When testing LT or GE, test high part only.
+ 	(both sets of cbranch<mode>4, cstore<mode>4): Don't generate cc0
+ 	patterns.
+ 	(scc0_constraints, cmp1_constraints, cmp2_constraints,
+ 	scc0_cf_constraints, cmp1_cf_constraints, cmp2_cf_constraints,
+ 	cmp2_cf_predicate): New define_mode_attrs.
+ 	(cbranch<mode>4_insn, cbranch<mode>4_insn_rev,
+ 	cbranch<mode>4_insn_cf, cbranch<mode>4_insn_cf_rev,
+ 	cstore<mode>4_insn, cstore<mode>4_insn_cf for integer modes)
+ 	New patterns.
+ 	(cbranch<mode>4_insn_68881, cbranch<mode>4_insn_rev_68881):
+ 	(cbranch<mode>4_insn_cf, cbranch<mode>4_insn_rev_cf,
+ 	cstore<mode>4_insn_68881, cstore<mode>4_insn_cf for FP):
+ 	New patterns.
+ 	(cbranchsi4_btst_mem_insn, cbranchsi4_btst_reg_insn,
+ 	cbranchsi4_btst_mem_insn_1, cbranchsi4_btst_reg_insn_1):
+ 	Likewise.
+ 	(BTST): New define_mode_iterator.
+ 	(btst_predicate, btst_constraint, btst_range): New
+ 	define_mode_attrs.
+ 	(cbranch_bftst<mode>_insn, cstore_bftst<mode>_insn): New
+ 	patterns.
+ 	(movsi_m68k_movsi_m68k2, movsi_cf, unnamed movstrict patterns,
+ 	unnamed movhi and movqi patterns, unnamed movsf, movdf and movxf
+ 	patterns): Set attr "flags_valid".
+ 	(truncsiqi2, trunchiqi2, truncsihi2): Remove manual CC_STATUS
+ 	management.  Set attr "flags_valid".
+ 	(extendsidi2, extendplussidi, unnamed float_extendsfdf pattern,
+ 	extendsfdf2_cf, fix_truncdfsi2, fix_truncdfhi2, fix_truncdfqi2,
+ 	addi_sexthishl32, adddi_dilshr32, adddi_dilshr32_cf,
+ 	addi_dishl32, subdi_sexthishl32, subdi_dishl32, subdi3): Remove
+ 	manual CC_STATUS management.
+ 	(addsi3_internal, addhi3, addqi3, subsi3, subhi3, subqi3,
+ 	unnamed strict_lowpart subhi and subqi patterns): Set attr
+ 	"flags_valid".
+ 	(unnamed strict_lowpart addhi3 and addqi3 patterns): Likewise.
+ 	Remove code to operate on address regs and assert the case
+ 	does not occur.
+ 	(unnamed mulsidi patterns, divmodhi4, udivmodhi4): Remove
+ 	manual CC_STATUS_INIT.
+ 	(andsi3_internal, andhi3, andqi3, iorsi3_internal, iorhi3, iorqi3,
+ 	xorsi3_internal, xorhi3, xorqi3, negsi2_internal,
+ 	negsi2_5200, neghi2, negqi2, one_cmplsi2_internal, one_cmplhi2,
+ 	one_cmplqi2, unnamed strict_lowpart patterns
+ 	for andhi, andqi, iorhi, iorqi, xorhi, xorqi, neghi, negqi,
+ 	one_cmplhi and one_cmplqi): Set attr "flags_valid".
+ 	(iorsi_zext_ashl16, iorsi_zext): Remove manual CC_STATUS_INIT.
+ 	(ashldi_sexthi, ashlsi_16, ashlsi_17_24): Remove manual
+ 	CC_STATUS_INIT.
+ 	(ashlsi3, ashlhi3, ashlqi3, ashrsi3, ashrhi3, ashrqi3, lshrsi3,
+ 	lshrhi3, shrqi3, rotlsi3, rotlhi3, rotlhi3_lowpart, rotlqi3,
+ 	rotlqi3_lowpart, rotrsi3, rotrhi3, rotrhi_lowpart, rotrqi3,
+ 	unnamed strict_low_part patterns for HI and
+ 	QI versions): Set attr "flags_valid".
+ 	(bsetmemqi, bsetmemqi_ext, bsetdreg, bchgdreg, bclrdreg,
+ 	bclrmemqi, extzv_8_16_reg, extzv_bfextu_mem, insv_bfchg_mem,
+ 	insv_bfclr_mem, insv_bfset_mem, extv_bfextu_reg,
+ 	insv_bfclr_reg, insv_bfset_reg, dbne_hi, dbne_si, dbge_hi,
+ 	dbge_si, extendsfxf2, extenddfxf2, ): Remove manual cc_status management.
+ 	(various unnamed peepholes): Adjust compare/branch sequences
+ 	for new cbranch patterns.
+ 	(dbcc peepholes): Likewise, and output the comparison here
+ 	as well.
+ 	* config/m68k/predicates.md (valid_dbcc_comparison_p): Delete.
+ 	(fp_src_operand): Allow constant zero.
+ 	(address_reg_operand): New predicate.
+ 
+ 	* rtl.h (inequality_comparisons_p): Remove declaration.
+ 	* recog.h (next_insn_tests_no_inequality): Likewise.
+ 	* rtlanal.c (inequality_comparisons_p): Delete function.
+ 	* recog.c (next_insn_tests_no_inequality): Likewise.
+ 
+ 2019-11-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-slp.c (vect_detect_hybrid_slp_stmts): Add assertion.
+ 	(vect_detect_hybrid_slp): Swap lane and instance iteration,
+ 	properly re-building the visited hash-map for each lane.
+ 
+ 2019-11-25  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	* config/gcn/gcn.c (gcn_expand_scalar_to_vector_address,
+ 	gcn_md_reorg): Remove unused variables.
+ 	(gcn_emutls_var_init): Add missing (but unreachable) return
+ 	to silence warning.
+ 	(gcn_hsa_declare_function_name): Add gcc_unreachable to ensure
+ 	target != TARGET_GCN3 or TARGET_GCN3 will fail instead of use
+ 	an uninitialized variable.
+ 
+ 2019-11-25  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/92109
+ 	* cgraph.h (cgraph_node::remove_from_clone_tree): Declare.
+ 	* cgraphclones.c (cgraph_node::remove_from_clone_tree): New method.
+ 	(cgraph_materialize_clone): Move removel from clone tree to the
+ 	the new method and use it instead.
+ 	* ipa.c (symbol_table::remove_unreachable_nodes): When removing
+ 	bodies of clones, also remove it from the clone tree.
+ 
+ 2019-11-25  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/91956
+ 	* ipa-sra.c (process_isra_node_results): Put the new node to the
+ 	same comdat group as the original node.
+ 
+ 2019-11-25  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Build double32 / long-double32 multilibs if needed.
+ 
+ 	PR target/92055
+ 	* config/avr/t-avr:
+ 	(HAVE_DOUBLE_MULTILIB, HAVE_LONG_DOUBLE_MULTILIB): Remove vars.
+ 	(HAVE_DOUBLE32, HAVE_LONG_DOUBLE32, WITH_LONG_DOUBLE)
+ 	(HAVE_DOUBLE64, HAVE_LONG_DOUBLE64, WITH_DOUBLE): Set from
+ 	tm_defines and pass to genmultilib.awk.
+ 	* config/avr/genmultilib.awk: Use these variables to add double32
+ 	and / or long-double32 multilib(s) as needed.
+ 	* config/avr/driver-avr.c (avr_double_lib): Adjust comment.
+ 
+ 2019-11-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	* cfgloop.h (get_loop_exit_edges): Add extra parameter denoting
+ 	loop body, defaulted to NULL.
+ 	(single_likely_exit): Add exit vector argument
+ 	* tree-ssa-loop-niter.h (loop_only_exit_p): Add loop body argument.
+ 	(number_of_iterations_exit): Likewise.
+ 	(number_of_iterations_exit_assumptions): Likewise.
+ 	* cfgloop.c (get_loop_exit_edges): Use passed in loop body
+ 	if not NULL.
+ 	* cfgloopanal.c (single_likely_exit): Use passed in exit vector.
+ 	* tree-ssa-loop-ivcanon.c (canonicalize_loop_induction_variables):
+ 	Compute exit vector around call to single_likely_exit.
+ 	* tree-ssa-loop-ivopts.c (tree_ssa_iv_optimize_loop): Pass down
+ 	loop body to loop_only_exit_p.
+ 	* tree-ssa-loop-niter.c (loop_only_exit_p): Get loop body from
+ 	caller.
+ 	(number_of_iterations_exit_assumptions): Get loop body from caller
+ 	if not NULL.
+ 	(number_of_iterations_exit): Pass through new loop body arg.
+ 	(infer_loop_bounds_from_undefined): Get loop body from caller.
+ 	(estimate_numbers_of_iterations): Compute loop body once.
+ 
+ 2019-11-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	* cfganal.c (pre_and_rev_post_order_compute_fn): Use an
+ 	auto_bb_flag instead of an sbitmap for visited handling.
+ 
+ 2019-11-25 Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	* config/rs6000/vector.md (vector_fp_comparison_simple): New code
+ 	iterator.
+ 	(vector_fp_comparison_complex): Likewise.
+ 	(vector_<code><mode> for VEC_F and vector_fp_comparison_simple): New
+ 	define_and_split.
+ 	(vector_<code><mode> for VEC_F and vector_fp_comparison_complex):
+ 	Likewise.
+ 	(vector_lt<mode> for VEC_F): Refactor with
+ 	vector_fp_comparison_simple.
+ 	(vector_le<mode> for VEC_F): Likewise.
+ 	(vector_unge<mode> for VEC_F): Likewise.
+ 	(vector_unle<mode> for VEC_F): Likewise.
+ 	(vector_ne<mode> for VEC_F): Likewise.
+ 	(vector_ungt<mode> for VEC_F): Likewise.
+ 	(vector_unlt<mode> for VEC_F): Likewise.
+ 	(vector_ltgt<mode> for VEC_F): Refactor with
+ 	vector_fp_comparison_complex.
+ 	(vector_ordered<mode> for VEC_F): Likewise.
+ 	(vector_uneq<mode> for VEC_F): Likewise.
+ 	(vector_unordered<mode> for VEC_F): Likewise.
+ 
+ 2019-11-24  Bernd Schmidt  <bernds_cb1@t-online.de>
+ 
+ 	* config/i386/i386.c (ix86_rtx_costs): Handle care of a PLUS in a
+ 	COMPARE, representing an overflow detection.
+ 
+ 	* combine.c (combine_instructions): Record costs for jumps.
+ 
+ 	* combine.c (can_combine_p): Allow autoinc in jumps.
+ 
+ 2019-11-23  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cif-code.def (MAX_INLINE_INSNS_SINGLE_O2_LIMIT): Remove.
+ 	* doc/invoke.texi (max-inline-insns-single-O2,
+ 	inline-heuristics-hint-percent-O2, inline-min-speedup-O2,
+ 	early-inlining-insns-O2): Remove documentation.
+ 	* ipa-fnsummary.c (analyze_function_body,
+ 	compute_fn_summary): Use opt_for_fn when accessing parameters.
+ 	* ipa-inline.c (caller_growth_limits, can_inline_edge_p,
+ 	inline_insns_auto, can_inline_edge_by_limits_p,
+ 	want_early_inline_function_p, big_speedup_p,
+ 	want_inline_small_function_p, want_inline_self_recursive_call_p,
+ 	recursive_inlining, compute_max_insns, inline_small_functions):
+ 	Likewise.
+ 	* opts.c (default_options): Add -O3 defaults for
+ 	OPT__param_early_inlining_insns_,
+ 	OPT__param_inline_heuristics_hint_percent_,
+ 	OPT__param_inline_min_speedup_, OPT__param_max_inline_insns_single_.
+ 	* params.opt (-param=early-inlining-insns-O2=,
+ 	-param=inline-heuristics-hint-percent-O2=,
+ 	-param=inline-min-speedup-O2=, -param=max-inline-insns-single-O2=
+ 	-param=early-inlining-insns=, -param=inline-heuristics-hint-percent=,
+ 	-param=inline-min-speedup=, -param=inline-unit-growth=,
+ 	-param=large-function-growth=, -param=large-stack-frame=,
+ 	-param=large-stack-frame-growth=, -param=large-unit-insns=,
+ 	-param=max-inline-insns-recursive=,
+ 	-param=max-inline-insns-recursive-auto=,
+ 	-param=max-inline-insns-single=,
+ 	-param=max-inline-insns-size=, -param=max-inline-insns-small=,
+ 	-param=max-inline-recursive-depth=,
+ 	-param=max-inline-recursive-depth-auto=,
+ 	-param=min-inline-recursive-probability=,
+ 	-param=partial-inlining-entry-probability=,
+ 	-param=uninlined-function-insns=, -param=uninlined-function-time=,
+ 	-param=uninlined-thunk-insns=, -param=uninlined-thunk-time=): Add
+ 	Optimization.
+ 
+ 2019-11-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* ipa-fnsummary.c: Fix comment typos.
+ 	* ipa-ref.h: Likewise.
+ 	* ipa-predicate.h: Likewise.
+ 	* ipa-split.c: Likewise.
+ 	* ipa-inline-analysis.c: Likewise.
+ 	* ipa-predicate.c: Likewise.
+ 	* ipa-devirt.c: Likewise.
+ 	* ipa-icf.h: Likewise.
+ 	* profile-count.c: Likewise.
+ 	* ipa-icf.c: Likewise.
+ 	(sem_function::equals_wpa): Fix typos in dump messages.
+ 	* ipa-icf-gimple.h: Fix comment typos.
+ 	* ipa-inline-transform.c: Likewise.
+ 	* ipa-polymorphic-call.c: Likewise.
+ 	* ipa-fnsummary.h: Likewise.
+ 	* ipa-inline.c: Likewise.
+ 	(dump_inline_stats): Fix typo in debug dump message.
+ 	* profile-count.h: Fix comment typos.
+ 
+ 	PR target/92615
+ 	* config/i386/i386.c (ix86_md_asm_adjust): If dest_mode is
+ 	GET_MODE (dest), is not QImode, using ZERO_EXTEND and dest is not
+ 	register_operand, force x into register before storing it into dest.
+ 	Formatting fix.
+ 
+ 	PR middle-end/83859
+ 	* doc/extend.texi (attribute access): Fix a typo.
+ 
+ 	PR rtl-optimization/92610
+ 	* cse.c (rest_of_handle_cse2): Call cleanup_cfg (0) also if
+ 	cse_cfg_altered is set, even when tem is 0.
+ 	(rest_of_handle_cse_after_global_opts): Likewise.
+ 
+ 2019-11-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/92458
+ 	* tree-hash-traits.h (tree_decl_hash, tree_ssa_name_hash,
+ 	tree_hash): Move to ...
+ 	* tree.h (tree_decl_hash, tree_ssa_name_hash, tree_hash): ... here.
+ 	(struct decl_tree_cache_traits, struct type_tree_cache_traits): New
+ 	types.
+ 	(decl_tree_cache_map, tree_tree_cache_map): New typedefs.
+ 
+ 	PR tree-optimization/92618
+ 	* tree-ssa-reassoc.c (v_info): Change from auto_vec to a struct
+ 	containing the auto_vec and a tree.
+ 	(undistribute_bitref_for_vector): Handle the case when element type
+ 	of vec is not the same as type of the BIT_FIELD_REF.  Formatting
+ 	fixes.
+ 
+ 2019-11-22  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/83859
+ 	* attribs.h (struct attr_access): New.
+ 	* attribs.c (decl_attributes): Add an informational note.
+ 	* builtins.c (check_access): Make extern.  Consistently set no-warning
+ 	after issuing a warning.  Handle calls through function pointers.  Set
+ 	no-warning.
+ 	* builtins.h (check_access): Declare.
+ 	* calls.c (rdwr_access_hash): New type.
+ 	(rdwr_map): Same.
+ 	(init_attr_rdwr_indices): New function.
+ 	(maybe_warn_rdwr_sizes): Same.
+ 	(initialize_argument_information): Call init_attr_rdwr_indices.
+ 	Call maybe_warn_rdwr_sizes.
+ 	(get_size_range): Avoid null argument.
+ 	* doc/extend.texi (attribute access): Document new attribute.
+ 
+ 2019-11-22  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn.c (OMP_LDS_SIZE): Define.
+ 	(ACC_LDS_SIZE): Define.
+ 	(OTHER_LDS_SIZE): Define.
+ 	(LDS_SIZE): Redefine using above.
+ 	(gcn_expand_prologue): Initialize m0 with LDS_SIZE-1.
+ 
+ 2019-11-22  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/88226
+ 	* builtins.c (check_nul_terminated_array): New function.
+ 	(fold_builtin_0): Remove declaration.
+ 	(fold_builtin_1): Same.
+ 	(fold_builtin_2): Same.
+ 	(fold_builtin_3): Same.
+ 	(fold_builtin_strpbrk): Add argument.
+ 	(fold_builtin_strspn): Same.
+ 	(fold_builtin_strcspn): Same.
+ 	(expand_builtin_strcat): Call it.  Remove unused argument.
+ 	(expand_builtin_stpncpy): Same.
+ 	(expand_builtin_strncat): Same.
+ 	(expand_builtin_strncpy): Same.  Adjust indentation.
+ 	(expand_builtin_strcmp): Same.
+ 	(expand_builtin_strncmp): Same.
+ 	(expand_builtin_fork_or_exec): Same.
+ 	(expand_builtin): Handle more built-ins.
+ 	(fold_builtin_2): Add argument.
+ 	(fold_builtin_n): Make static.  Add argument.
+ 	(fold_call_expr): Pass new argument to fold_builtin_n and fold_builtin_2.
+ 	(fold_builtin_call_array): Pass new argument to fold_builtin_n.
+ 	(fold_builtin_strpbrk): Add argument.  Call check_nul_terminated_array.
+ 	(fold_call_stmt): Pass new argument to fold_builtin_n.
+ 	* builtins.h: Correct a comment.
+ 	* gimple-fold.c (gimple_fold_builtin_strchr): Call
+ 	check_nul_terminated_array.
+ 	* tree-ssa-strlen.c (handle_builtin_strlen): Call
+ 	check_nul_terminated_array.
+ 	(handle_builtin_strchr): Same.
+ 	(handle_builtin_string_cmp): Same.
+ 
+ 2019-11-22  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/92501
+ 	* gimple-fold.c ((gimple_fold_builtin_string_compare): Let strncmp
+ 	handle unterminated arrays.  Rename local variables for clarity.
+ 
+ 2019-11-22  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn.c (gcn_hsa_declare_function_name): Calculate
+ 	granulated_sgprs according to architecture.
+ 
+ 2019-11-22  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ggc-page.c (ggc_collect): Call memory_block_pool::trim.
+ 	* memory-block.cc (memory_block_pool::clear_free_list): Rename to ...
+ 	(memory_block_pool::reduce_free_list): ... this one.
+ 	(memory_block_pool::trim): New static function.
+ 	* memory-block.h (memory_block_pool::freelist_size): New constant
+ 	(memory_block_pool::clear_free_list): Rename to ...
+ 	(memory_block_pool::reduce_free_list): ... this one.
+ 	(memory_block_pool::trim): Declare.
+ 
+ 2019-11-22  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vect_model_simple_cost): Take an optional
+ 	vect_cost_for_stmt.
+ 	(vectorizable_condition): Calculate the cost of EXTRACT_LAST_REDUCTION
+ 	here rather than...
+ 	* tree-vect-loop.c (vect_model_reduction_cost): ...here.
+ 
+ 2019-11-22  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.md (bic_f): Use cc_set_register predicate.
+ 	(bic_cmp0_noout): New pattern.
+ 	(bic_cmp0): Likewise.
+ 	(neg_scc_insn): Remove pattern.
+ 	(not_scc_insn): Likewise.
+ 
+ 2019-11-21  Harald van Dijk  <harald@gigawatt.nl>
+ 
+ 	* doc/invoke.texi (-fcommon): Remove claim about ISO C.
+ 
+ 2019-11-21  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* gimplify.c (expand_FALLTHROUGH_r, expand_FALLTHROUGH): Use
+ 	pedwarn instead of warning_at for fallthrough not preceding a case
+ 	or default label.
+ 
+ 2019-11-22  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	PR tree-optimization/92608
+ 	* tree-ssa-loop-unswitch.c (find_loop_guard): Use safe_dyn_cast instead
+ 	of dyn_cast.
+ 
+ 2019-11-21  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/predicates.md (extra_insn_branch_comparison_operator):
+ 	New predicate.
+ 	* config/rs6000/rs6000-protos.h (rs6000_emit_fp_cror): New declaration.
+ 	* config/rs6000/rs6000.c (rs6000_generate_compare): Don't do anything
+ 	special for FP comparisons that need a cror instruction eventually.
+ 	(rs6000_emit_fp_cror): New function.
+ 	(rs6000_emit_sCOND): Expand all floating point comparisons to one
+ 	instruction, for normal FP modes, with HONOR_NANS.
+ 	(rs6000_emit_cbranch): Reformat.
+ 	* config/rs6000/rs6000.md (fp_rev): New iterator.
+ 	(fp_two): New iterator.
+ 	*<code><mode>_cc for fp_rev and GPR: New define_insn_and_split.
+ 	*<code><mode>_cc for fp_two and GPR: New define_insn_and_split.
+ 	*cbranch_2insn: New define_insn_and_split.
+ 
+ 2019-11-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/92526
+ 	* tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Reject
+ 	versioning for alignment if the accesses do not have a consistent
+ 	mask, rather than asserting that the masks are consistent.
+ 
+ 2019-11-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/92595
+ 	* tree-vect-stmts.c (get_group_load_store_type): Add a VECTOR_MODE_P
+ 	check.
+ 	(vectorizable_store, vectorizable_load): Likewise.
+ 
+ 2019-11-21  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ipa-inline.c (update_callee_keys): Add parameter UPDATE_SINCE.
+ 	(resolve_noninline_speculation, inline_small_functions): Avoid
+ 	redundant updates.
+ 
+ 2019-11-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	* lra.c (lra_insn_recog_data_pool): New.
+ 	(free_insn_recog_data): Adjust.
+ 	(finish_insn_recog_data): Release lra_insn_recog_data_pool.
+ 	(lra_set_insn_recog_data): Allocate from lra_insn_recog_data_pool.
+ 
+ 2019-11-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92596
+ 	* tree-vect-slp.c (vect_build_slp_tree): Fix pasto.
+ 
+ 2019-11-21  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ipa-fnsummary.c (evaluate_conditions_for_known_args): Be
+ 	ready for some vectors to not be allocated.
+ 	(evaluate_properties_for_edge): Document better; make
+ 	known_vals and known_aggs caller allocated; avoid determining
+ 	values of parameters which are not used.
+ 	(ipa_merge_fn_summary_after_inlining): Pre allocate known_vals and
+ 	known_aggs.
+ 	* ipa-inline-analysis.c (do_estimate_edge_time): Likewise.
+ 	(do_estimate_edge_size): Likewise.
+ 	(do_estimate_edge_hints): Likewise.
+ 	* ipa-cp.c (ipa_get_indirect_edge_target_1): Do not early exit when
+ 	values are not known.
+ 	(ipa_release_agg_values): Add option to not release vector itself.
+ 	* ipa-prop.h (ipa_release_agg_values): Add parameter RELEASE_VECTOR.
+ 
+ 2019-11-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	* cfgloop.h (loop_iterator::~loop_iterator): Remove.
+ 	(loop_iterator::to_visit): Use an auto_vec with internal storage.
+ 	(loop_iterator::loop_iterator): Adjust.
+ 	* cfganal.c (compute_dominance_frontiers_1): Fold into...
+ 	(compute_dominance_frontiers): ... this.  Hoist invariant
+ 	get_immediate_dominator call.
+ 	(compute_idf): Use a work-set instead of a work-list for more
+ 	optimal iteration order and duplicate avoidance.
+ 	* tree-into-ssa.c (mark_phi_for_rewrite): Avoid re-allocating
+ 	the vector all the time, instead pre-allocate the vector only
+ 	once.
+ 	(delete_update_ssa): Simplify.
+ 	* vec.h (va_heap::release): Disable -Wfree-nonheap-object around it.
+ 
+ 2019-11-21  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/91355
+ 	* tree-ssa-sink.c (select_best_block): Use >= rather than >
+ 	for early_bb scaled count with best_bb count comparison.
+ 
+ 	* ipa-fnsummary.h (enum ipa_hints_vals): Fix comment typo,
+ 	preffer -> prefer.
+ 	* ipa-inline.c (edge_badness): Likewise.
+ 	* lto-streamer.h (class lto_location_cache): Likewise.
+ 	* tree-ssa-sink.c (select_best_block): Likewise.  Fix comment typos,
+ 	gratutious -> gratuitous.
+ 
+ 2019-11-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	Revert
+ 	2019-09-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91790
+ 	* tree-vect-stmts.c (vectorizable_load): For BB vectorization
+ 	use the correct DR for setting up realignment.
+ 
+ 2019-11-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-structalias.c (equiv_class_hasher): Change to nofree.
+ 	(equiv_class_obstack): New.
+ 	(equiv_class_lookup_or_add): Allocate from equiv_class_obstack.
+ 	(perform_var_substitution): Initialize equiv_class_obstack.
+ 	(free_var_substitution_info): Free equiv_class_obstack.
+ 
+ 2019-11-20  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ipa-inline.c (want_early_inline_function_p): Do not estimate
+ 	edge growth when callee function is very large.
+ 	* ipa-inline.h (estimate_min_edge_growth): New.
+ 
+ 2019-11-20  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ipa-fnsummary.c (ipa_fn_summary::account_size_time): Allow
+ 	negative time in calls summary; correct roundoff errors
+ 	leading to negative times.
+ 	(ipa_merge_fn_summary_after_inlining): Update calls size time table
+ 	if present.
+ 	(ipa_update_overall_fn_summary): Add RESET parameter.
+ 	* ipa-fnsummary.h (ipa_update_overall_fn_summary): Update prototype.
+ 	* ipa-inline-transform.c (inline_call): Enable incremental updates.
+ 
+ 2019-11-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-slp.c (vect_schedule_slp_instance): Restore stmt
+ 	def types for two-operation SLP.
+ 
+ 2019-11-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR testsuite/92366
+ 	* doc/sourcebuild.texi (vect_char_add): Document.
+ 
+ 2019-11-20  Alexandre Oliva <oliva@adacore.com>
+ 
+ 	* function.h (CALLEE_FROM_CGRAPH_P): Remove.
+ 	* function.c (record_final_call): Record even calls that might
+ 	have been in the cgraph.
+ 	* toplev.c (dump_final_node_vcg): Skip iteration over cgraph
+ 	callees.
+ 
+ 2019-11-20  Janne Blomqvist  <jb@gcc.gnu.org>
+ 
+ 	* configure.ac: Use https for gcc.gnu.org
+ 	* configure: Regenerated.
+ 	* doc/install.texi: Use https for gcc.gnu.org.
+ 	* doc/sourcebuild.texi: Likewise.
+ 
+ 2019-11-20  Julian Brown  <julian@codesourcery.com>
+ 
+ 	* config/gcn/gcn.c (gcn_asm_output_symbol_ref): Handle null cfun.
+ 
+ 2019-11-20  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ipa-fnsummary.c (ipa_fn_summary::account_size_time): Add CALL
+ 	parameter and update call_size_time_table.
+ 	(ipa_fn_summary::max_size_time_table_size): New constant.
+ 	(estimate_calls_size_and_time_1): Break out from ...
+ 	(estimate_calls_size_and_time): ... here; implement summary production.
+ 	(summarize_calls_size_and_time): New function.
+ 	(ipa_call_context::estimate_size_and_time): Bypass
+ 	estimate_calls_size_and_time for leaf functions.
+ 	(ipa_update_overall_fn_summary): Likewise.
+ 	* ipa-fnsummary.h (call_size_time_table): New.
+ 	(ipa_fn_summary::account_size_time): Update prototype.
+ 
+ 2019-11-20  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* doc/invoke.texi (-Wc11-c2x-compat): Document.
+ 
+ 2019-11-20  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	PR85678
+ 	* common.opt (fcommon): Change init to 1.
+ 	* doc/invoke.texi (-fcommon): Update documentation.
+ 
+ 2019-11-20  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* fibonacci_heap.h (fibonacci_heap<K,V>::consolidate): Turn auto_vec
+ 	to ordinary array.
+ 
+ 2019-11-20  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* fibonacci_heap.h (fibonacci_heap<K,V>::fibonacci_heap):
+ 	Add allocator parameter.
+ 	(fibonacci_heap<K,V>::~fibonacci_heap): Optimize destruction.
+ 	(fibonacci_heap<K,V>::m_allocator): New.
+ 	(fibonacci_heap<K,V>::m_own_allocator): New.
+ 	(fibonacci_heap<K,V>::insert): Use allocator.
+ 	(fibonacci_heap<K,V>::extract_min): Likewise.
+ 	(fibonacci_heap<K,V>::union_with): Assert that both heaps share
+ 	allocator.
+ 	(fibonacci_heap<K,V>::consolidate): Allocate constant sized vector
+ 	on stack.
+ 	* fibonacci_heap.c: Include alloc-pool
+ 	(test_empty_heap): Initialize allocator.
+ 	(test_union): Likewise.
+ 	* bb-reorder.c: Include alloc-pool.h.
+ 	* tracer.c: Inlclude alloc-pool.h.
+ 
+ 2019-11-20  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* lto-streamer-out.c (DFS::sccstack): Turn into auto-vec.
+ 	Preallocate for 32 entries.
+ 	(DFS::worklist): Likewise.
+ 	(DFS::DFS): Do not initialize sccstack and worklist.
+ 	(DFS::~DFS): Do not release sccstack.
+ 
+ 2019-11-20  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR target/92573
+ 	* config/rs6000/dfp.md (dfptstsfi_<code>_<mode> for DFP_TEST and DDTD):
+ 	Handle UNORDERED if !HONOR_NANS.
+ 
+ 2019-11-20  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ipa-inline.c (wrapper_heuristics_may_apply): Break out from ...
+ 	(edge_badness): ... here.
+ 	(inline_small_functions): Use monotonicity of badness calculation
+ 	to avoid redundant updates.
+ 
+ 2019-11-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-slp.c (vect_analyze_slp_instance): Dump
+ 	constructors we are actually analyzing.
+ 	(vect_slp_check_for_constructors): Do not vectorize uniform
+ 	constuctors, do not dump here.
+ 
+ 2019-11-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92537
+ 	* tree-vect-slp.c (vect_analyze_slp_instance): Move CTOR
+ 	vectorization validity check...
+ 	(vect_slp_analyze_operations): ... here.
+ 
+ 2019-11-20  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc-protos.h (make_pass_arc_ifcvt): Declare.
+ 	(make_pass_arc_predicate_delay_insns): Likewise.
+ 	* config/arc/arc.c (class pass_arc_ifcvt): Reformat text, add gate
+ 	method, remove clone.
+ 	(class pass_arc_predicate_delay_insns): Likewise.
+ 	(arc_init): Remove registering of ARC specific passes.
+ 	* config/arc/t-arc (PASSES_EXTRA): Add arc-passes.def.
+ 	* config/arc/arc-passes.def: New file.
+ 
+ 2019-11-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/90840
+ 	* expmed.c (store_bit_field_1): Handle the case where op0 is not a MEM
+ 	and has a mode that doesn't have corresponding integral type.
+ 
+ 	PR target/90867
+ 	* config/i386/i386-options.c (ix86_valid_target_attribute_tree): Don't
+ 	clear opts->x_ix86_isa_flags{,2} here...
+ 	(ix86_valid_target_attribute_inner_p): ... but here when seeing
+ 	arch=.  Also clear opts->x_ix86_isa_flags{,2}_explicit.
+ 
+ 	PR c/90898
+ 	* tree-ssa-ccp.c (insert_clobber_before_stack_restore): Remove
+ 	assertion.
+ 	(insert_clobbers_for_var): Fix a typo in function comment.
+ 
+ 2019-11-20  Jiangning Liu  <jiangning.liu@amperecomputing.com>
+ 	    Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/91195
+ 	* tree-ssa-phiopt.c (cond_store_replacement): Move lhs unsharing
+ 	earlier.  Set TREE_NO_WARNING on the rhs1 of the artificially added
+ 	load.
+ 
+ 2019-11-20  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Make 0-series device specs work with older versions of avr-gcc.
+ 
+ 	PR target/92545
+ 	* config/avr/specs.h (LINK_SPEC) <%(link_pm_base_address)>: Remove.
+ 	* config/avr/gen-avr-mmcu-specs.c (print_mcu)
+ 	<*link_pm_base_address>: Don't write spec.
+ 	<*link_arch>: Add --defsym=__RODATA_PM_OFFSET__= as needed.
+ 
+ 2019-11-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR c/92088
+ 	* builtins.c (compute_objsize): Deal with VLAs.
+ 
+ 2019-11-19  Pat Haugen  <pthaugen@us.ibm.com>
+ 
+ 	* config/rs6000/rs6000.c (move_to_end_of_ready): New, factored out
+ 	from common code.
+ 	(power6_sched_reorder2): Factored out from rs6000_sched_reorder2,
+ 	call new function.
+ 	(power9_sched_reorder2): Call new function.
+ 	(rs6000_sched_reorder2): Likewise.
+ 
+ 2019-11-18  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ipa-fnsummary.c (estimate_edge_size_and_time): Drop parameter PROB.
+ 	(estimate_calls_size_and_time): Update.
+ 
+ 2019-11-18  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ipa-inline.c (inlining_speedup): New function.
+ 	(edge_badness): Use it.
+ 
+ 2019-11-19  Zoran Jovanovic <zoran.jovanovic@mips.com>
+ 			Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
+ 
+ 	* config/mips/mips-msa.md (msa_<msabr>_<msafmt_f>, msa_<msabr>_v_<msafmt_f>):
+ 	Mark as not having "likely" version.
+ 	* config/mips/mips.md (insn_count): The simd_div instruction with
+ 	TARGET_CHECK_ZERO_DIV consists of 3 instructions.
+ 	(can_delay): Exclude simd_branch.
+ 	(defile_delay *): Add simd_branch instructions.
+ 	They have one regular delay slot.
+ 
+ 2019-11-19  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	Revert:
+ 	2019-11-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* cse.c (cse_insn): Delete no-op register moves too.
+ 	* simplify-rtx.c (comparison_to_mask): Handle unsigned comparisons.
+ 	Take a second comparison to control the value for NE.
+ 	(mask_to_comparison): Handle unsigned comparisons.
+ 	(simplify_logical_relational_operation): Likewise.  Update call
+ 	to comparison_to_mask.  Handle AND if !HONOR_NANs.
+ 	(simplify_binary_operation_1): Call the above for AND too.
+ 
+ 2019-11-19  Martin Liska  <mliska@suse.cz>
+ 
+ 	* toplev.c (general_init): Move the call...
+ 	(toplev::main): ... here as we need init_options_struct
+ 	being called.
+ 
+ 2019-11-19  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	PR target/79262
+ 	* config/aarch64/aarch64.c (generic_vector_cost): Adjust
+ 	vec_to_scalar_cost.
+ 
+ 2019-11-19  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/arm-cpus.in (armv7): Set tune to Cortex-A53.
+ 	(armv7-a): Likewise.
+ 	(armv7ve): Likewise.
+ 
+ 2019-11-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92581
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): For
+ 	condition reduction chains gather all conditions involved
+ 	for computing the index reduction vector.
+ 
+ 2019-11-19  Dennis Zhang  <dennis.zhang@arm.com>
+ 
+ 	* config/aarch64/aarch64-builtins.c (enum aarch64_builtins): Add
+ 	AARCH64_MEMTAG_BUILTIN_START, AARCH64_MEMTAG_BUILTIN_IRG,
+ 	AARCH64_MEMTAG_BUILTIN_GMI, AARCH64_MEMTAG_BUILTIN_SUBP,
+ 	AARCH64_MEMTAG_BUILTIN_INC_TAG, AARCH64_MEMTAG_BUILTIN_SET_TAG,
+ 	AARCH64_MEMTAG_BUILTIN_GET_TAG, and AARCH64_MEMTAG_BUILTIN_END.
+ 	(aarch64_init_memtag_builtins): New.
+ 	(AARCH64_INIT_MEMTAG_BUILTINS_DECL): New macro.
+ 	(aarch64_general_init_builtins): Call aarch64_init_memtag_builtins.
+ 	(aarch64_expand_builtin_memtag): New.
+ 	(aarch64_general_expand_builtin): Call aarch64_expand_builtin_memtag.
+ 	(AARCH64_BUILTIN_SUBCODE): New macro.
+ 	(aarch64_resolve_overloaded_memtag): New.
+ 	(aarch64_resolve_overloaded_builtin_general): New. Call
+ 	aarch64_resolve_overloaded_memtag to handle overloaded MTE builtins.
+ 	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
+ 	__ARM_FEATURE_MEMORY_TAGGING when enabled.
+ 	(aarch64_resolve_overloaded_builtin): Call
+ 	aarch64_resolve_overloaded_builtin_general.
+ 	* config/aarch64/aarch64-protos.h
+ 	(aarch64_resolve_overloaded_builtin_general): New declaration.
+ 	* config/aarch64/aarch64.h (AARCH64_ISA_MEMTAG): New macro.
+ 	(TARGET_MEMTAG): Likewise.
+ 	* config/aarch64/aarch64.md (UNSPEC_GEN_TAG): New unspec.
+ 	(UNSPEC_GEN_TAG_RND, and UNSPEC_TAG_SPACE): Likewise.
+ 	(irg, gmi, subp, addg, ldg, stg): New instructions.
+ 	* config/aarch64/arm_acle.h (__arm_mte_create_random_tag): New macro.
+ 	(__arm_mte_exclude_tag, __arm_mte_ptrdiff): Likewise.
+ 	(__arm_mte_increment_tag, __arm_mte_set_tag): Likewise.
+ 	(__arm_mte_get_tag): Likewise.
+ 	* config/aarch64/predicates.md (aarch64_memtag_tag_offset): New.
+ 	(aarch64_granule16_uimm6, aarch64_granule16_simm9): New.
+ 	* config/arm/types.md (memtag): New.
+ 	* doc/invoke.texi (-memtag): Update description.
+ 
+ 2019-11-19  Richard Henderson  <richard.henderson@linaro.org>
+ 
+ 	* config/arm/arm-c.c (arm_cpu_builtins): Use def_or_undef_macro
+ 	to define __GCC_ASM_FLAG_OUTPUTS__.
+ 	* config/arm/arm.c (thumb1_md_asm_adjust): New function.
+ 	(arm_option_params_internal): Swap out targetm.md_asm_adjust
+ 	depending on TARGET_THUMB1.
+ 	* doc/extend.texi (FlagOutputOperands): Document thumb1 restriction.
+ 
+ 2019-11-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/92549
+ 	* config/i386/i386.md (peephole2 for *swap<mode>): New peephole2.
+ 
+ 	PR middle-end/91450
+ 	* internal-fn.c (expand_mul_overflow): For s1 * s2 -> ur, if one
+ 	operand is negative and one non-negative, compare the non-negative
+ 	one against 0 rather than comparing s1 & s2 against 0.  Otherwise,
+ 	don't compare (s1 & s2) == 0, but compare separately both s1 == 0
+ 	and s2 == 0, unless one of them is known to be negative.  Remove
+ 	tem2 variable, use tem where tem2 has been used before.
+ 
+ 2019-11-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* doc/invoke.texi (-gno-internal-reset-location-views): Fix typo.
+ 
+ 2019-11-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/92557
+ 	* omp-low.c (omp_clause_aligned_alignment): Punt if TYPE_MODE is not
+ 	vmode rather than asserting it always is.
+ 
+ 2019-11-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92554
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): Look
+ 	for the actual condition stmt and deal with sign-changes.
+ 
+ 2019-11-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92555
+ 	* tree-vect-loop.c (vect_update_vf_for_slp): Also scan PHIs
+ 	for non-SLP stmts.
+ 
+ 2019-11-19  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR bootstrap/92540
+ 	* config/riscv/riscv.c (riscv_address_insns): Initialize
+ 	addr in order to remove boostrap -Wmaybe-uninitialized
+ 	error.
+ 
+ 2019-11-18  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/92493
+ 	* gimple-ssa-sprintf.c (get_origin_and_offset): Remove spurious
+ 	assignment.
+ 
+ 2019-11-18  Giuliano Belinassi  <giuliano.belinassi@usp.br>
+ 
+ 	* cfgloop.c (get_loop_body_in_custom_order): New.
+ 	* cfgloop.h (get_loop_body_in_custom_order): New prototype.
+ 	* tree-loop-distribution.c (class loop_distribution): New.
+ 	(bb_top_order_cmp): Remove.
+ 	(bb_top_order_cmp_r): New.
+ 	(create_rdg_vertices): Move into class loop_distribution.
+ 	(stmts_from_loop): Same as above.
+ 	(update_for_merge): Same as above.
+ 	(partition_merge_into): Same as above.
+ 	(get_data_dependence): Same as above.
+ 	(data_dep_in_cycle_p): Same as above.
+ 	(update_type_for_merge): Same as above.
+ 	(build_rdg_partition_for-vertex): Same as above.
+ 	(classify_builtin_ldst): Same as above.
+ 	(classify_partition): Same as above.
+ 	(share_memory_accesses): Same as above.
+ 	(rdg_build_partitions): Same as above.
+ 	(pg_add_dependence_edges): Same as above.
+ 	(build_partition_graph): Same as above.
+ 	(merge_dep_scc_partitions): Same as above.
+ 	(break_alias_scc_partitions): Same as above.
+ 	(finalize_partitions): Same as above.
+ 	(distribute_loop): Same as above.
+ 	(bb_top_order_init): New method
+ 	(bb_top_order_destroy): New method.
+ 	(get_bb_top_order_index_size): New method.
+ 	(get_bb_top_order_index_index): New method.
+ 	(get_bb_top_order_index_index): New method.
+ 	(loop_distribution::execute): New method.
+ 	(pass_loop_distribution::execute): Instantiate loop_distribution.
+ 
+ 2019-11-18  Jan Hubicka  <jh@suse.cz>
+ 
+ 	PR ipa/92508
+ 	* ipa-inline.c (inline_small_functions): Add new edges after reseting
+ 	caches.
+ 	* ipa-inline-analysis.c (do_estimate_edge_time): Fix sanity check.
+ 
+ 2019-11-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* doc/sourcebuild.texi (vect_check_ptrs): Document.
+ 	* optabs.def (check_raw_ptrs_optab, check_war_ptrs_optab): New optabs.
+ 	* doc/md.texi: Document them.
+ 	* internal-fn.def (IFN_CHECK_RAW_PTRS, IFN_CHECK_WAR_PTRS): New
+ 	internal functions.
+ 	* internal-fn.h (internal_check_ptrs_fn_supported_p): Declare.
+ 	* internal-fn.c (check_ptrs_direct): New macro.
+ 	(expand_check_ptrs_optab_fn): Likewise.
+ 	(direct_check_ptrs_optab_supported_p): Likewise.
+ 	(internal_check_ptrs_fn_supported_p): New fuction.
+ 	* tree-data-ref.c: Include internal-fn.h.
+ 	(create_ifn_alias_checks): New function.
+ 	(create_intersect_range_checks): Use it.
+ 	* config/aarch64/iterators.md (SVE2_WHILE_PTR): New int iterator.
+ 	(optab, cmp_op): Handle it.
+ 	(raw_war, unspec): New int attributes.
+ 	* config/aarch64/aarch64.md (UNSPEC_WHILERW, UNSPEC_WHILE_WR): New
+ 	constants.
+ 	* config/aarch64/predicates.md (aarch64_bytes_per_sve_vector_operand):
+ 	New predicate.
+ 	* config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): New
+ 	expander.
+ 	(@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): New
+ 	pattern.
+ 
+ 2019-11-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree.c (build_vector_from_ctor): Directly return a zero vector for
+ 	empty constructors.
+ 
+ 2019-11-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* cse.c (cse_insn): Delete no-op register moves too.
+ 	* simplify-rtx.c (comparison_to_mask): Handle unsigned comparisons.
+ 	Take a second comparison to control the value for NE.
+ 	(mask_to_comparison): Handle unsigned comparisons.
+ 	(simplify_logical_relational_operation): Likewise.  Update call
+ 	to comparison_to_mask.  Handle AND if !HONOR_NANs.
+ 	(simplify_binary_operation_1): Call the above for AND too.
+ 
+ 2019-11-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* fold-const.c (native_encode_vector): Turn into a wrapper function,
+ 	splitting the main code out into...
+ 	(native_encode_vector_part): ...this new function.
+ 	(native_decode_vector_tree): New function.
+ 	(fold_view_convert_vector_encoding): Likewise.
+ 	(fold_view_convert_expr): Use it for converting VECTOR_CSTs
+ 	to VECTOR_TYPEs.
+ 
+ 2019-11-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-data-ref.c (create_intersect_range_checks_index): If the
+ 	alias pair describes simple WAW and WAR dependencies, just check
+ 	whether the first B access overlaps later A accesses.
+ 	(create_waw_or_war_checks): New function that performs the same
+ 	optimization on addresses.
+ 	(create_intersect_range_checks): Call it.
+ 
+ 2019-11-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* lra-constraints.c (valid_address_p): Take the operand and a
+ 	constraint as argument.  If the operand is a MEM and the constraint
+ 	is a memory constraint, check whether the eliminated form of the
+ 	MEM already satisfies the constraint.
+ 	(process_address_1): Update calls accordingly.
+ 
+ 2019-11-18  Tom Tromey  <tromey@adacore.com>
+ 
+ 	* doc/tm.texi: Rebuild.
+ 	* doc/tm.texi.in (Misc): Don't document MODIFY_JNI_METHOD_CALL.
+ 	* config/i386/cygming.h (MODIFY_JNI_METHOD_CALL): Don't define.
+ 
+ 2019-11-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92516
+ 	* tree-vect-slp.c (vect_analyze_slp_instance): Add bst_map
+ 	argument, hoist bst_map creation/destruction to ...
+ 	(vect_analyze_slp): ... here, forming a true graph with
+ 	SLP instances being the entries.
+ 	(vect_detect_hybrid_slp_stmts): Remove wrapper.
+ 	(vect_detect_hybrid_slp): Use one visited set for all
+ 	graph entries.
+ 	(vect_slp_analyze_node_operations): Simplify visited/lvisited
+ 	to hash-sets of slp_tree.
+ 	(vect_slp_analyze_operations): Likewise.
+ 	(vect_bb_slp_scalar_cost): Remove wrapper.
+ 	(vect_bb_vectorization_profitable_p): Use one visited set for
+ 	all graph entries.
+ 	(vect_schedule_slp_instance): Elide bst_map use.
+ 	(vect_schedule_slp): Likewise.
+ 
+ 2019-11-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-slp.c (vect_analyze_slp_instance): When a CTOR
+ 	was vectorized with just external refs fail.
+ 
+ 2019-11-18  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/92525
+ 	* ipa-icf.c (sem_function::init): Unset m_checker
+ 	at the end of the function.
+ 
+ 2019-11-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92558
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): When
+ 	reducting the width of a reduction vector def update new_phis.
+ 
+ 2019-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+ 
+ 	* configure.ac (gcc_cv_target_ldbl128): Set for powerpc*-*-linux-musl*
+ 	and s390*-*-linux-musl* targets.
+ 	* configure: Regenerate.
+ 
+ 2019-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+ 
+ 	* config/s390/linux.h (MUSL_DYNAMIC_LINKER32): Define.
+ 	(MUSL_DYNAMIC_LINKER64): Define.
+ 
+ 2019-11-18  Martin Liska  <mliska@suse.cz>
+ 
+ 	* dbgcnt.c (dbg_cnt_set_limit_by_name): Provide error
+ 	message for an unknown counter.
+ 	(dbg_cnt_process_single_pair): Support 0 as minimum value.
+ 	(dbg_cnt_process_opt): Remove unreachable code.
+ 
+ 2019-11-18  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/92529
+ 	* ipa-icf-gimple.c (func_checker::compare_gimple_assign):
+ 	Compare LHS types of NOP_EXPR.
+ 
+ 2019-11-18  Matthew Malcomson  <matthew.malcomson@arm.com>
+ 
+ 	* run-rtl-passes.c (run_rtl_passes): Accept and handle empty
+ 	"initial_pass_name" argument -- by running "*clean_state" pass.
+ 	Also free the "initial_pass_name" when done.
+ 
+ 2019-11-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR rtl-optimization/92462
+ 	* alias.c (find_base_term): Restrict the look through ANDs.
+ 	(find_base_value): Likewise.
+ 
+ 2019-11-18  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Add support for AVR devices from the 0-series.
+ 
+ 	PR target/92545
+ 	* config/avr/avr-arch.h (avr_mcu_t) <flash_pm_offset>: New field.
+ 	* config/avr/avr-devices.c (avr_mcu_types): Adjust initializers.
+ 	* config/avr/avr-mcus.def (AVR_MCU): Add respective field.
+ 	* config/avr/specs.h (LINK_SPEC) <%(link_pm_base_address)>: Add.
+ 	* config/avr/gen-avr-mmcu-specs.c (print_mcu)
+ 	<*cpp, *cpp_mcu, *cpp_avrlibc, *link_pm_base_address>: Emit code
+ 	for spec definitions.
+ 	* doc/avr-mmcu.texi: Regenerate.
+ 
+ 2019-11-18  Hongtao Liu  <hongtao.liu@intel.com>
+ 
+ 	PR target/92448
+ 	* config/i386/i386-expand.c (ix86_expand_set_or_cpymem):
+ 	Replace TARGET_AVX128_OPTIMAL with TARGET_AVX256_SPLIT_REGS.
+ 	* config/i386/i386-option.c (ix86_vec_cost): Ditto.
+ 	(ix86_reassociation_width): Ditto.
+ 	* config/i386/i386-options.c (ix86_option_override_internal):
+ 	Replace TARGET_AVX128_OPTIAML with
+ 	ix86_tune_features[X86_TUNE_AVX128_OPTIMAL]
+ 	* config/i386/i386.h (TARGET_AVX256_SPLIT_REGS): New macro.
+ 	(TARGET_AVX128_OPTIMAL): Deleted.
+ 	* config/i386/x86-tune.def (X86_TUNE_AVX256_SPLIT_REGS): New
+ 	DEF_TUNE.
+ 
+ 2019-11-16  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (cceq_ior_compare): Rename to...
+ 	(@cceq_ior_compare_<mode> for GPR): ... this.  Allow GPR instead of
+ 	just SI.
+ 	(cceq_rev_compare): Rename to...
+ 	(@cceq_rev_compare_<mode> for GPR): ... this.  Allow GPR instead of
+ 	just SI.
+ 	(define_split for <bd>tf_<mode>): Add SImode first argument to
+ 	gen_cceq_ior_compare.
+ 
+ 2019-11-16  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* common/config/powerpcspe: Delete.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (aarch64_wrffr): Wrap the FFRT
+ 	output in UNSPEC_WRFFR.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-data-ref.c (create_intersect_range_checks_index): Rewrite
+ 	the index tests to have the form (unsigned T) (B - A + bias) <= limit.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-data-ref.c (create_intersect_range_checks_index)
+ 	(create_intersect_range_checks): Print dump messages.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-data-ref.c (dump_alias_pair): New function.
+ 	(prune_runtime_alias_test_list): Use it to dump each merged alias pair.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-data-ref.h (DR_ALIAS_MIXED_STEPS): New flag.
+ 	* tree-data-ref.c (prune_runtime_alias_test_list): Set it when
+ 	merging data references with different steps.
+ 	(create_intersect_range_checks_index): Take a
+ 	dr_with_seg_len_pair_t instead of two dr_with_seg_lens.
+ 	Bail out if DR_ALIAS_MIXED_STEPS is set.
+ 	(create_intersect_range_checks): Take a dr_with_seg_len_pair_t
+ 	instead of two dr_with_seg_lens.  Update call to
+ 	create_intersect_range_checks_index.
+ 	(create_runtime_alias_checks): Update call accordingly.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-data-ref.h (DR_ALIAS_RAW, DR_ALIAS_WAR, DR_ALIAS_WAW)
+ 	(DR_ALIAS_ARBITRARY, DR_ALIAS_SWAPPED, DR_ALIAS_UNSWAPPED): New flags.
+ 	(dr_with_seg_len_pair_t::sequencing): New enum.
+ 	(dr_with_seg_len_pair_t::flags): New member variable.
+ 	(dr_with_seg_len_pair_t::dr_with_seg_len_pair_t): Take a sequencing
+ 	parameter and initialize the flags member variable.
+ 	* tree-loop-distribution.c (compute_alias_check_pairs): Update
+ 	call accordingly.
+ 	* tree-vect-data-refs.c (vect_prune_runtime_alias_test_list): Likewise.
+ 	Ensure the two data references in an alias pair are in statement
+ 	order, if there is a defined order.
+ 	* tree-data-ref.c (prune_runtime_alias_test_list): Use
+ 	DR_ALIAS_SWAPPED and DR_ALIAS_UNSWAPPED to record whether we've
+ 	swapped the references in a dr_with_seg_len_pair_t.  OR together
+ 	the flags when merging two dr_with_seg_len_pair_ts.  After merging,
+ 	try to restore the original dr_with_seg_len order, updating the
+ 	flags if that fails.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-data-ref.c (prune_runtime_alias_test_list): Delay
+ 	swapping the dr_as based on init values until we've decided
+ 	whether to merge them.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-data-ref.c (prune_runtime_alias_test_list): Sort the
+ 	two accesses in each dr_with_seg_len_pair_t before trying to
+ 	combine separate dr_with_seg_len_pair_ts.
+ 	* tree-loop-distribution.c (compute_alias_check_pairs): Don't do
+ 	that here.
+ 	* tree-vect-data-refs.c (vect_prune_runtime_alias_test_list): Likewise.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md
+ 	(scatter_store<SVE_FULL_SD:mode><v_int_equiv>): Extend to...
+ 	(scatter_store<SVE_24:mode><v_int_container>): ...this.
+ 	(mask_scatter_store<SVE_FULL_S:mode><v_int_equiv>): Extend to...
+ 	(mask_scatter_store<SVE_4:mode><v_int_equiv>): ...this.
+ 	(mask_scatter_store<SVE_FULL_D:mode><v_int_equiv>): Extend to...
+ 	(mask_scatter_store<SVE_2:mode><v_int_equiv>): ...this.
+ 	(*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked): New
+ 	pattern.
+ 	(*mask_scatter_store<SVE_FULL_D:mode><v_int_equiv>_sxtw): Extend to...
+ 	(*mask_scatter_store<SVE_2:mode><v_int_equiv>_sxtw): ...this.
+ 	(*mask_scatter_store<SVE_FULL_D:mode><v_int_equiv>_uxtw): Extend to...
+ 	(*mask_scatter_store<SVE_2:mode><v_int_equiv>_uxtw): ...this.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (SVE_2BHSI, SVE_2HSDI, SVE_4BHI)
+ 	(SVE_4HSI): New mode iterators.
+ 	(ANY_EXTEND2): New code iterator.
+ 	* config/aarch64/aarch64-sve.md
+ 	(@aarch64_gather_load_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>):
+ 	Extend to...
+ 	(@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
+ 	...this, handling extension to partial modes as well as full modes.
+ 	Describe the extension as a predicated rather than unpredicated
+ 	extension.
+ 	(@aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>):
+ 	Likewise extend to...
+ 	(@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
+ 	...this, making the same adjustments.
+ 	(*aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_sxtw):
+ 	Likewise extend to...
+ 	(*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>_sxtw)
+ 	...this, making the same adjustments.
+ 	(*aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_uxtw):
+ 	Likewise extend to...
+ 	(*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>_uxtw)
+ 	...this, making the same adjustments.
+ 	(*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked):
+ 	New pattern.
+ 	(*aarch64_ldff1_gather<mode>_sxtw): Canonicalize to a constant
+ 	extension predicate.
+ 	(@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
+ 	(@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>)
+ 	(*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_uxtw):
+ 	Describe the extension as a predicated rather than unpredicated
+ 	extension.
+ 	(*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_sxtw):
+ 	Likewise.  Canonicalize to a constant extension predicate.
+ 	* config/aarch64/aarch64-sve-builtins-base.cc
+ 	(svld1_gather_extend_impl::expand): Add an extra predicate for
+ 	the extension.
+ 	(svldff1_gather_extend_impl::expand): Likewise.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (SVE_24, SVE_2, SVE_4): New mode
+ 	iterators.
+ 	* config/aarch64/aarch64-sve.md
+ 	(gather_load<SVE_FULL_SD:mode><v_int_equiv>): Extend to...
+ 	(gather_load<SVE_24:mode><v_int_container>): ...this.
+ 	(mask_gather_load<SVE_FULL_S:mode><v_int_equiv>): Extend to...
+ 	(mask_gather_load<SVE_4:mode><v_int_container>): ...this.
+ 	(mask_gather_load<SVE_FULL_D:mode><v_int_equiv>): Extend to...
+ 	(mask_gather_load<SVE_2:mode><v_int_container>): ...this.
+ 	(*mask_gather_load<SVE_2:mode><v_int_container>_<su>xtw_unpacked):
+ 	New pattern.
+ 	(*mask_gather_load<SVE_FULL_D:mode><v_int_equiv>_sxtw): Extend to...
+ 	(*mask_gather_load<SVE_2:mode><v_int_equiv>_sxtw): ...this.
+ 	Allow the nominal extension predicate to be different from the
+ 	load predicate.
+ 	(*mask_gather_load<SVE_FULL_D:mode><v_int_equiv>_uxtw): Extend to...
+ 	(*mask_gather_load<SVE_2:mode><v_int_equiv>_uxtw): ...this.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md
+ 	(trunc<SVE_HSDI:mode><SVE_PARTIAL_I:mode>2): New pattern.
+ 	* config/aarch64/aarch64.c (aarch64_integer_truncation_p): New
+ 	function.
+ 	(aarch64_sve_adjust_stmt_cost): Call it.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md
+ 	(@aarch64_load_<ANY_EXTEND:optab><VNx8_WIDE:mode><VNx8_NARROW:mode>):
+ 	(@aarch64_load_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
+ 	(@aarch64_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>):
+ 	Combine into...
+ 	(@aarch64_load_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PARTIAL_I:mode>):
+ 	...this new pattern, handling extension to partial modes as well
+ 	as full modes.  Describe the extension as a predicated rather than
+ 	unpredicated extension.
+ 	(@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx8_WIDE:mode><VNx8_NARROW:mode>)
+ 	(@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
+ 	(@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>):
+ 	Combine into...
+ 	(@aarch64_ld<fn>f1_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PARTIAL_I:mode>):
+ 	...this new pattern, handling extension to partial modes as well
+ 	as full modes.  Describe the extension as a predicated rather than
+ 	unpredicated extension.
+ 	* config/aarch64/aarch64-sve-builtins.cc
+ 	(function_expander::use_contiguous_load_insn): Add an extra
+ 	predicate for extending loads.
+ 	* config/aarch64/aarch64.c (aarch64_extending_load_p): New function.
+ 	(aarch64_sve_adjust_stmt_cost): Likewise.
+ 	(aarch64_add_stmt_cost): Use aarch64_sve_adjust_stmt_cost to adjust
+ 	the cost of SVE vector stmts.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (SVE_HSDI): New mode iterator.
+ 	(narrower_mask): Handle VNx4HI, VNx2HI and VNx2SI.
+ 	* config/aarch64/aarch64-sve.md
+ 	(<ANY_EXTEND:optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2): New pattern.
+ 	(*<ANY_EXTEND:optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2): Likewise.
+ 	(@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>): Update
+ 	comment.  Avoid new narrower_mask ambiguity.
+ 	(@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>): Likewise.
+ 	(*cond_uxt<mode>_2): Update comment.
+ 	(*cond_uxt<mode>_any): Likewise.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-modes.def: Define partial SVE vector
+ 	float modes.
+ 	* config/aarch64/aarch64-protos.h (aarch64_sve_pred_mode): New
+ 	function.
+ 	* config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle the
+ 	new vector float modes.
+ 	(aarch64_sve_container_bits): New function.
+ 	(aarch64_sve_pred_mode): Likewise.
+ 	(aarch64_get_mask_mode): Use it.
+ 	(aarch64_sve_element_int_mode): Handle structure modes and partial
+ 	modes.
+ 	(aarch64_sve_container_int_mode): New function.
+ 	(aarch64_vectorize_related_mode): Return SVE modes when given
+ 	SVE modes.  Handle partial modes, taking the preferred number
+ 	of units from the size of the given mode.
+ 	(aarch64_hard_regno_mode_ok): Allow partial modes to be stored
+ 	in registers.
+ 	(aarch64_expand_sve_ld1rq): Use the mode form of aarch64_sve_pred_mode.
+ 	(aarch64_expand_sve_const_vector): Handle partial SVE vectors.
+ 	(aarch64_split_sve_subreg_move): Use the mode form of
+ 	aarch64_sve_pred_mode.
+ 	(aarch64_secondary_reload): Handle partial modes in the same way
+ 	as full big-endian vectors.
+ 	(aarch64_vector_mode_supported_p): Allow partial SVE vectors.
+ 	(aarch64_autovectorize_vector_modes): Try unpacked SVE vectors,
+ 	merging with the Advanced SIMD modes.  If two modes have the
+ 	same size, try the Advanced SIMD mode first.
+ 	(aarch64_simd_valid_immediate): Use the container rather than
+ 	the element mode for INDEX constants.
+ 	(aarch64_simd_vector_alignment): Make the alignment of partial
+ 	SVE vector modes the same as their minimum size.
+ 	(aarch64_evpc_sel): Use the mode form of aarch64_sve_pred_mode.
+ 	* config/aarch64/aarch64-sve.md (mov<SVE_FULL:mode>): Extend to...
+ 	(mov<SVE_ALL:mode>): ...this.
+ 	(movmisalign<SVE_FULL:mode>): Extend to...
+ 	(movmisalign<SVE_ALL:mode>): ...this.
+ 	(*aarch64_sve_mov<mode>_le): Rename to...
+ 	(*aarch64_sve_mov<mode>_ldr_str): ...this.
+ 	(*aarch64_sve_mov<SVE_FULL:mode>_be): Rename and extend to...
+ 	(*aarch64_sve_mov<SVE_ALL:mode>_no_ldr_str): ...this.  Handle
+ 	partial modes regardless of endianness.
+ 	(aarch64_sve_reload_be): Rename to...
+ 	(aarch64_sve_reload_mem): ...this and enable for little-endian.
+ 	Use aarch64_sve_pred_mode to get the appropriate predicate mode.
+ 	(@aarch64_pred_mov<SVE_FULL:mode>): Extend to...
+ 	(@aarch64_pred_mov<SVE_ALL:mode>): ...this.
+ 	(*aarch64_sve_mov<SVE_FULL:mode>_subreg_be): Extend to...
+ 	(*aarch64_sve_mov<SVE_ALL:mode>_subreg_be): ...this.
+ 	(@aarch64_sve_reinterpret<SVE_FULL:mode>): Extend to...
+ 	(@aarch64_sve_reinterpret<SVE_ALL:mode>): ...this.
+ 	(*aarch64_sve_reinterpret<SVE_FULL:mode>): Extend to...
+ 	(*aarch64_sve_reinterpret<SVE_ALL:mode>): ...this.
+ 	(maskload<SVE_FULL:mode><vpred>): Extend to...
+ 	(maskload<SVE_ALL:mode><vpred>): ...this.
+ 	(maskstore<SVE_FULL:mode><vpred>): Extend to...
+ 	(maskstore<SVE_ALL:mode><vpred>): ...this.
+ 	(vec_duplicate<SVE_FULL:mode>): Extend to...
+ 	(vec_duplicate<SVE_ALL:mode>): ...this.
+ 	(*vec_duplicate<SVE_FULL:mode>_reg): Extend to...
+ 	(*vec_duplicate<SVE_ALL:mode>_reg): ...this.
+ 	(sve_ld1r<SVE_FULL:mode>): Extend to...
+ 	(sve_ld1r<SVE_ALL:mode>): ...this.
+ 	(vec_series<SVE_FULL_I:mode>): Extend to...
+ 	(vec_series<SVE_I:mode>): ...this.
+ 	(*vec_series<SVE_FULL_I:mode>_plus): Extend to...
+ 	(*vec_series<SVE_I:mode>_plus): ...this.
+ 	(@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>): Avoid
+ 	new VPRED ambiguity.
+ 	(@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>): Likewise.
+ 	(add<SVE_FULL_I:mode>3): Extend to...
+ 	(add<SVE_I:mode>3): ...this.
+ 	* config/aarch64/iterators.md (SVE_ALL, SVE_I): New mode iterators.
+ 	(Vetype, Vesize, VEL, Vel, vwcore): Handle partial SVE vector modes.
+ 	(VPRED, vpred): Likewise.
+ 	(Vctype): New iterator.
+ 	(vw): Remove SVE modes.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (SVE_PARTIAL): Rename to...
+ 	(SVE_PARTIAL_I): ...this.
+ 	* config/aarch64/aarch64-sve.md: Apply the above renaming throughout.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (SVE_ALL): Rename to...
+ 	(SVE_FULL): ...this.
+ 	(SVE_I): Rename to...
+ 	(SVE_FULL_I): ...this.
+ 	(SVE_F): Rename to...
+ 	(SVE_FULL_F): ...this.
+ 	(SVE_BHSI): Rename to...
+ 	(SVE_FULL_BHSI): ...this.
+ 	(SVE_HSD): Rename to...
+ 	(SVE_FULL_HSD): ...this.
+ 	(SVE_HSDI): Rename to...
+ 	(SVE_FULL_HSDI): ...this.
+ 	(SVE_HSF): Rename to...
+ 	(SVE_FULL_HSF): ...this.
+ 	(SVE_SD): Rename to...
+ 	(SVE_FULL_SD): ...this.
+ 	(SVE_SDI): Rename to...
+ 	(SVE_FULL_SDI): ...this.
+ 	(SVE_SDF): Rename to...
+ 	(SVE_FULL_SDF): ...this.
+ 	(SVE_S): Rename to...
+ 	(SVE_FULL_S): ...this.
+ 	(SVE_D): Rename to...
+ 	(SVE_FULL_D): ...this.
+ 	* config/aarch64/aarch64-sve.md: Apply the above renaming throughout.
+ 	* config/aarch64/aarch64-sve2.md: Likewise.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.opt (--param=aarch64-sve-compare-costs):
+ 	New option.
+ 	* doc/invoke.texi: Document it.
+ 	* config/aarch64/aarch64.c (aarch64_autovectorize_vector_modes):
+ 	By default, return VECT_COMPARE_COSTS for SVE.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.h (VECT_COMPARE_COSTS): New constant.
+ 	* target.def (autovectorize_vector_modes): Return a bitmask of flags.
+ 	* doc/tm.texi: Regenerate.
+ 	* targhooks.h (default_autovectorize_vector_modes): Update accordingly.
+ 	* targhooks.c (default_autovectorize_vector_modes): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_autovectorize_vector_modes):
+ 	Likewise.
+ 	* config/arc/arc.c (arc_autovectorize_vector_modes): Likewise.
+ 	* config/arm/arm.c (arm_autovectorize_vector_modes): Likewise.
+ 	* config/i386/i386.c (ix86_autovectorize_vector_modes): Likewise.
+ 	* config/mips/mips.c (mips_autovectorize_vector_modes): Likewise.
+ 	* tree-vectorizer.h (_loop_vec_info::vec_outside_cost)
+ 	(_loop_vec_info::vec_inside_cost): New member variables.
+ 	* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize them.
+ 	(vect_better_loop_vinfo_p, vect_joust_loop_vinfos): New functions.
+ 	(vect_analyze_loop): When autovectorize_vector_modes returns
+ 	VECT_COMPARE_COSTS, try vectorizing the loop with each available
+ 	vector mode and picking the one with the lowest cost.
+ 	(vect_estimate_min_profitable_iters): Record the computed costs
+ 	in the loop_vec_info.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (can_duplicate_and_interleave_p): Take an
+ 	element type rather than an element mode.
+ 	* tree-vect-slp.c (can_duplicate_and_interleave_p): Likewise.
+ 	Use get_vectype_for_scalar_type to query the natural types
+ 	for a given element type rather than basing everything on
+ 	GET_MODE_SIZE (vinfo->vector_mode).  Limit int_mode_for_size
+ 	query to MAX_FIXED_MODE_SIZE.
+ 	(duplicate_and_interleave): Update call accordingly.
+ 	* tree-vect-loop.c (vectorizable_reduction): Likewise.
+ 
+ 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (vect_get_vector_types_for_stmt): Take an
+ 	optional maximum nunits.
+ 	(get_vectype_for_scalar_type): Likewise.  Also declare a form that
+ 	takes an slp_tree.
+ 	(get_mask_type_for_scalar_type): Take an optional slp_tree.
+ 	(vect_get_mask_type_for_stmt): Likewise.
+ 	* tree-vect-data-refs.c (vect_analyze_data_refs): Don't store
+ 	the vector type in STMT_VINFO_VECTYPE for BB vectorization.
+ 	* tree-vect-patterns.c (vect_recog_bool_pattern): Use
+ 	vect_get_vector_types_for_stmt instead of STMT_VINFO_VECTYPE
+ 	to get an assumed vector type for data references.
+ 	* tree-vect-slp.c (vect_update_shared_vectype): New function.
+ 	(vect_update_all_shared_vectypes): Likewise.
+ 	(vect_build_slp_tree_1): Pass the group size to
+ 	vect_get_vector_types_for_stmt.  Use vect_update_shared_vectype
+ 	for BB vectorization.
+ 	(vect_build_slp_tree_2): Call vect_update_all_shared_vectypes
+ 	before building the vectof from scalars.
+ 	(vect_analyze_slp_instance): Pass the group size to
+ 	get_vectype_for_scalar_type.
+ 	(vect_slp_analyze_node_operations_1): Don't recompute the vector
+ 	types for BB vectorization here; just handle the case in which
+ 	we deferred the choice for booleans.
+ 	(vect_get_constant_vectors): Pass the slp_tree to
+ 	get_vectype_for_scalar_type.
+ 	* tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Likewise.
+ 	(vectorizable_call): Likewise.
+ 	(vectorizable_simd_clone_call): Likewise.
+ 	(vectorizable_conversion): Likewise.
+ 	(vectorizable_shift): Likewise.
+ 	(vectorizable_operation): Likewise.
+ 	(vectorizable_comparison): Likewise.
+ 	(vect_is_simple_cond): Take the slp_tree as argument and
+ 	pass it to get_vectype_for_scalar_type.
+ 	(vectorizable_condition): Update call accordingly.
+ 	(get_vectype_for_scalar_type): Take a group_size argument.
+ 	For BB vectorization, limit the the vector to that number
+ 	of elements.  Also define an overload that takes an slp_tree.
+ 	(get_mask_type_for_scalar_type): Add an slp_tree argument and
+ 	pass it to get_vectype_for_scalar_type.
+ 	(vect_get_vector_types_for_stmt): Add a group_size argument
+ 	and pass it to get_vectype_for_scalar_type.  Don't use the
+ 	cached vector type for BB vectorization if a group size is given.
+ 	Handle data references in that case.
+ 	(vect_get_mask_type_for_stmt): Take an slp_tree argument and
+ 	pass it to get_mask_type_for_scalar_type.
+ 
+ 2019-11-15  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline.h (do_estimate_edge_time): Add nonspec_time
+ 	parameter.
+ 	(estimate_edge_time): Use it.
+ 	* ipa-inline-analysis.c (do_estimate_edge_time): Add
+ 	ret_nonspec_time parameter.
+ 
+ 2019-11-15  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+ 
+ 	* config/m68k/linux.h (MUSL_DYNAMIC_LINKER): Define.
+ 
+ 2019-11-15  Nick Clifton  <nickc@redhat.com>
+ 	    Szabolcs Nagy  <szabolcs.nagy@arm.com>
+ 
+ 	PR target/65649
+ 	* config/microblaze/microblaze.c (print_operand): Print value as long.
+ 
+ 2019-11-15  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline.c (edge_badness, inline_small_functions): Revert
+ 	accidental commit.
+ 
+ 2019-11-15  Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 
+ 	* config/gcn/gcn.h (FIXED_REGISTERS): Unfix frame pointer.
+ 	(CALL_USED_REGISTERS): Make frame pointer callee-saved.
+ 
+ 2019-11-15  Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 
+ 	* config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT, MAX_NORMAL_VGPR_COUNT): New.
+ 	(gcn_conditional_register_usage): Use constants in place of hard-coded
+ 	values.
+ 	(gcn_hsa_declare_function_name): Set lower bound for number of
+ 	SGPRs/VGPRs in non-leaf kernels to MAX_NORMAL_SGPR_COUNT and
+ 	MAX_NORMAL_VGPR_COUNT.
+ 
+ 2019-11-15  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* ipa-utils.h (ipa_remove_useless_jump_functions): Remove stray
+ 	declaration.
+ 
+ 2019-11-15  Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 
+ 	* config/gcn/gcn.c (default_requested_args): New.
+ 	(gcn_parse_amdgpu_hsa_kernel_attribute): Initialize requested args
+ 	set with default_requested_args.
+ 	(gcn_conditional_register_usage): Limit register usage of non-kernel
+ 	functions.  Reassign fixed registers if a non-standard set of args is
+ 	requested.
+ 	* config/gcn/gcn.h (FIXED_REGISTERS): Fix registers according to ABI.
+ 
+ 2019-11-15  Feng Xue  <fxue@os.amperecomputing.com>
+ 
+ 	PR ipa/92528
+ 	* ipa-prop.c (update_jump_functions_after_inlining): Invalidate
+ 	aggregate jump function when inlined-to caller has no edge summary.
+ 
+ 2019-11-15  Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 
+ 	* config/gcn/gcn.c (gcn_init_cumulative_args): Call reinit_regs.
+ 
+ 2019-11-15  Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 
+ 	* config/gcn/gcn.c (gcn_expand_prologue): Remove initialization and
+ 	prologue use of v0.
+ 	(print_operand_address): Use v1 for zero vector offset.
+ 
+ 2019-11-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/92515
+ 	* tree-vect-stmts.c (vectorizable_shift): Record incompatible op1
+ 	types when converting a vector/scalar shift into a vector/vector one,
+ 	using tree_nop_conversion_p instead of useless_type_conversion_p.
+ 	Move the conversion code to the transform block.
+ 
+ 2019-11-15  Matthew Malcomson  <matthew.malcomson@arm.com>
+ 
+ 	* read-rtl-function.c
+ 	(function_reader::add_fixup_source_location): Take additional
+ 	parameter of a column.
+ 	(function_reader::maybe_read_location): Optionally parse column
+ 	information and pass to add_fixup_source_location.
+ 
+ 2019-11-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92512
+ 	* tree-vect-loop.c (check_reduction_path): Fix operand index
+ 	computability check.  Add check for second use in COND_EXPRs.
+ 
+ 2019-11-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR target/92515
+ 	* config/rs6000/rs6000-call.c (rs6000_gimple_fold_builtin): Use
+ 	VIEW_CONVERT_EXPR to reinterpret vectors as different types.
+ 
+ 2019-11-15  Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 
+ 	* config/gcn/gcn.c (gcn_regno_reg_class): Return VCC_CONDITIONAL_REG
+ 	register class for VCC_LO and VCC_HI.
+ 	(gcn_spill_class): Use SGPR_REGS to spill registers in
+ 	VCC_CONDITIONAL_REG.
+ 
+ 2019-11-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92324
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): Fix
+ 	singedness of SLP reduction epilouge operations.  Also reduce
+ 	the vector width for SLP reductions before doing elementwise
+ 	operations if possible.
+ 
+ 2019-11-15  Matthew Malcomson  <matthew.malcomson@arm.com>
+ 
+ 	* passes.c (skip_pass): Set epilogue_completed if skipping the
+ 	pro_and_epilogue pass.
+ 
+ 2019-11-15  Matthew Malcomson  <matthew.malcomson@arm.com>
+ 
+ 	* passes.c (should_skip_pass_p): Always run "dfinish".
+ 
+ 2019-11-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	* ipa-inline.c (inline_small_functions): Move assignment
+ 	to next before call destroying edge.
+ 
+ 2019-11-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92039
+ 	PR tree-optimization/91975
+ 	* tree-ssa-loop-ivcanon.c (constant_after_peeling): Revert
+ 	previous change, treat invariants consistently as non-constant.
+ 	(tree_estimate_loop_size): Ternary ops with just the first op
+ 	constant are not optimized away.
+ 
+ 2019-11-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gimplify.c (gimplify_call_expr): Don't call
+ 	omp_resolve_declare_variant after gimplification.
+ 	* omp-general.c (omp_context_selector_matches): For isa that might
+ 	match in some other function, defer if in declare simd function.
+ 	(omp_context_compute_score): Don't look for " score" in construct
+ 	trait set.  Set *score to -1 if it can't ever match.
+ 	(omp_resolve_declare_variant): If any variants need to be deferred,
+ 	don't punt immediately, but compute scores of all variants and if
+ 	ther eis a score winner that doesn't need to be deferred, return that.
+ 
+ 2019-11-15  Luo Xiong Hu  <luoxhu@linux.ibm.com>
+ 
+ 	* ipa-comdats.c: Fix comments typo.
+ 	* ipa-profile.c: Fix comments typo.
+ 	* tree-profile.c (gimple_gen_ic_profiler): Use the new variable
+ 	__gcov_indirect_call.counters and __gcov_indirect_call.callee.
+ 	(gimple_gen_ic_func_profiler): Likewise.
+ 	(pass_ipa_tree_profile::gate): Fix comments typo.
+ 
+ 2019-11-15  Xiong Hu Luo  <luoxhu@linux.ibm.com>
+ 
+ 	* ipa-inline.c (inline_small_functions): Update iterator of next.
+ 
+ 2019-11-14  Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 
+ 	* lra-spills.c (assign_spill_hard_regs): Check that the spill
+ 	register is suitable for the mode.
+ 
+ 2019-11-14  Andrew MacLeod  <amacleod@redhat.com>
+ 
+ 	* range-op.h (range_operator::fold_range): Return a bool.
+ 	* range-op.cc (range_operator::wi_fold): Assert supported type.
+ 	(range_operator::fold_range): Assert supported type and return true.
+ 	(operator_equal::fold_range): Return true.
+ 	(operator_not_equal::fold_range): Same.
+ 	(operator_lt::fold_range): Same.
+ 	(operator_le::fold_range): Same.
+ 	(operator_gt::fold_range): Same.
+ 	(operator_ge::fold_range): Same.
+ 	(operator_plus::op1_range): Adjust call to fold_range.
+ 	(operator_plus::op2_range): Same.
+ 	(operator_minus::op1_range): Same.
+ 	(operator_minus::op2_range): Same.
+ 	(operator_exact_divide::op1_range): Same.
+ 	(operator_lshift::fold_range): Return true and adjust fold_range call.
+ 	(operator_rshift::fold_range): Same.
+ 	(operator_cast::fold_range): Return true.
+ 	(operator_logical_and::fold_range): Same.
+ 	(operator_logical_or::fold_range): Same.
+ 	(operator_logical_not::fold_range): Same.
+ 	(operator_bitwise_not::fold_range): Adjust call to fold_range.
+ 	(operator_bitwise_not::op1_range): Same.
+ 	(operator_cst::fold_range): Return true.
+ 	(operator_identity::fold_range): Return true.
+ 	(operator_negate::fold_range): Return true and adjust fold_range call.
+ 	(operator_addr_expr::fold_range): Return true.
+ 	(operator_addr_expr::op1_range): Adjust call to fold_range.
+ 	(range_cast): Same.
+ 	* tree-vrp.c (range_fold_binary_symbolics_p): Adjust call to fold_range.
+ 	(range_fold_unary_symbolics_p): Same.
+ 
+ 2019-11-14  Andrew MacLeod  <amacleod@redhat.com>
+ 
+ 	PR tree-optimization/92506
+ 	* range-op.cc (range_operator::fold_range): Start with range undefined.
+ 	(operator_abs::wi_fold): Fix wrong line copy... With wrapv, abs with
+ 	overflow is varying.
+ 
+ 2019-11-14  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* range-op.cc (*operator*::*range): Remove calls to
+ 	range_intersect, range_invert, and range_union in favor of calling
+ 	the in-place API methods.
+ 	(range_tests): Same.
+ 	* range.cc (range_intersect): Remove.
+ 	(range_union): Remove.
+ 	(range_invert): Remove.
+ 	* range.h (range_intersect): Remove.
+ 	(range_union): Remove.
+ 	(range_intersect): Remove.
+ 
+ 2019-11-14  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	PR rtl-optimization/92430
+ 	* cfgcleanup.c (pass_jump_after_combine::gate): New function.
+ 	(pass_jump_after_combine::execute): Perform jump threading
+ 	unconditionally.
+ 
+ 2019-11-14  Jerome Lambourg  <lambourg@adacore.com>
+ 	    Doug Rupp <rupp@adacore.com>
+ 	    Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* config.gcc: Collapse the arm-vxworks entries into
+ 	a single arm-wrs-vxworks7* one, bpabi based.  Update
+ 	the default cpu from arm8 to armv7-a
+ 	* config/arm/vxworks.h (CC1_SPEC): Simplify, knowing that
+ 	we always use ARM_UNWIND_INFO.
+ 	(DWARF2_UNWIND_INFO): Remove redefinition.
+ 	(ARM_TARGET2_DWARF_FORMAT): Likewise.
+ 	(VXWORKS_PERSONALITY): Define, to "llvm".
+ 	(VXWORKS_EXTRA_LIBS_RTP): Define, to "-lllvm".
+ 
+ 2019-11-14  Jerome Lambourg  <lambourg@adacore.com>
+ 
+ 	* config/arm/vxworks.h (TARGET_OS_CPP_BUILTINS): Use
+ 	_VX_CPU instead of CPU and handle arm_arch8.
+ 
+ 2019-11-14  Doug Rupp  <rupp@adacore.com>
+ 	    Olivier Hainque  <hainque@adacore.com>
+ 	    Jerome Lambourg  <lambourg@adacore.com>
+ 
+ 	* config.gcc: Handle aarch64*-wrs-vxworks7*.
+ 	* config/aarch64/aarch64-vxworks.h: New file.
+ 	* config/aarch64/t-aarch64-vxworks: New file.
+ 
+ 2019-11-06  Jerome Lambourg  <lambourg@adacore.com>
+ 	    Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* config/vx-common.h (USE_TM_CLONE_REGISTRY): Remove
+ 	definition, pointless with a VxWorks specific version
+ 	of crtstuff.
+ 	(DWARF2_UNWIND_INFO): Conditionalize on !ARM_UNWIND_INFO.
+ 	* config/vxworks.h (VX_CRTBEGIN_SPEC, VX_CRTEND_SPEC):
+ 	New local macros, controlling the addition of vxworks specific
+ 	crtstuff objects depending on the EH mechanism and kind of
+ 	module being linked.
+ 	(VXWORKS_STARTFILE_SPEC, VXWORKS_ENDFILE_SPEC): Use them.
+ 
+ 2019-11-06  Pat Bernardi  <bernardi@adacore.com>
+             Jerome Lambourg  <lambourg@adacore.com>
+             Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* config.gcc: Add comment to introduce the TARGET_VXWORKS
+ 	common macro definitions, conveying VXWORKS7 or 64bit general
+ 	variations.  Add a block to set gcc_cv_initfini_array
+ 	unconditionally to "yes" for VxWorks7.
+ 	config/vx-common.h (VXWORKS_CC1_SPEC): New macro, empty string
+ 	by default.  Update some comments.
+ 	config/vxworks.h (VXWORKS_EXTRA_LIBS_RTP): New macro, empty by
+ 	default, to be added the end of VXWORKS_LIBS_RTP.
+ 	(VXWORKS_LIBS_RTP): Replace hardcoded part by VXWORKS_BASE_LIBS_RTP
+ 	and append VXWORKS_EXTRA_LIBS_RTP, both of which specific ports may
+ 	redefine.
+ 	(VXWORKS_NET_LIBS_RTP): Account for VxWorks7 specificities.
+ 	(VXWORKS_CC1_SPEC): Common base definition, with VxWorks7 variation
+ 	to account for the now available TLS abilities.
+ 	(TARGET_LIBC_HAS_FUNCTION): Account for VxWorks7 abilities.
+ 	(VXWORKS_HAVE_TLS): Likewise.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-slp.c (vect_contains_pattern_stmt_p): New function.
+ 	(vect_slp_convert_to_external): Likewise.
+ 	(vect_slp_analyze_node_operations): If analysis fails, try building
+ 	the node from scalars instead.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-cfg.c (verify_gimple_assign_unary): Handle conversions
+ 	between vector types.
+ 	* tree-vect-stmts.c (vectorizable_conversion): Extend the
+ 	non-widening and non-narrowing path to handle standard
+ 	conversion codes, if the target supports them.
+ 	* expr.c (convert_move): Try using the extend and truncate optabs
+ 	for vectors.
+ 	* optabs-tree.c (supportable_convert_operation): Likewise.
+ 	* config/aarch64/iterators.md (Vnarroqw): New iterator.
+ 	* config/aarch64/aarch64-simd.md (<optab><Vnarrowq><mode>2)
+ 	(trunc<mode><Vnarrowq>2): New patterns.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vect_get_vector_types_for_stmt): Don't
+ 	require vectype and nunits_vectype to have the same size;
+ 	instead assert that nunits_vectype has at least as many
+ 	elements as vectype.  Don't compute a separate nunits_vectype
+ 	if the scalar type is obviously the same as vectype's.
+ 	Tweak dump messages.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_vectorize_related_mode): New
+ 	function.
+ 	(aarch64_autovectorize_vector_modes): Also add V4HImode and V2SImode.
+ 	(TARGET_VECTORIZE_RELATED_MODE): Define.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (vec_info::mode_set): New typedef.
+ 	(vec_info::used_vector_mode): New member variable.
+ 	(vect_chooses_same_modes_p): Declare.
+ 	* tree-vect-stmts.c (get_vectype_for_scalar_type): Record each
+ 	chosen vector mode in vec_info::used_vector_mode.
+ 	(vect_chooses_same_modes_p): New function.
+ 	* tree-vect-loop.c (vect_analyze_loop): Use it to avoid trying
+ 	the same vector statements multiple times.
+ 	* tree-vect-slp.c (vect_slp_bb_region): Likewise.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* machmode.h (opt_machine_mode::operator==): New function.
+ 	(opt_machine_mode::operator!=): Likewise.
+ 	* tree-vectorizer.h (vec_info::vector_mode): Update comment.
+ 	(get_related_vectype_for_scalar_type): Delete.
+ 	(get_vectype_for_scalar_type_and_size): Declare.
+ 	* tree-vect-slp.c (vect_slp_bb_region): Print dump messages to say
+ 	whether analysis passed or failed, and with what vector modes.
+ 	Use related_vector_mode to check whether trying a particular
+ 	vector mode would be redundant with the autodetected mode,
+ 	and print a dump message if we decide to skip it.
+ 	* tree-vect-loop.c (vect_analyze_loop): Likewise.
+ 	(vect_create_epilog_for_reduction): Use
+ 	get_related_vectype_for_scalar_type instead of
+ 	get_vectype_for_scalar_type_and_size.
+ 	* tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Replace
+ 	with...
+ 	(get_related_vectype_for_scalar_type): ...this new function.
+ 	Take a starting/"prevailing" vector mode rather than a vector size.
+ 	Take an optional nunits argument, with the same meaning as for
+ 	related_vector_mode.  Use related_vector_mode when not
+ 	auto-detecting a mode, falling back to mode_for_vector if no
+ 	target mode exists.
+ 	(get_vectype_for_scalar_type): Update accordingly.
+ 	(get_same_sized_vectype): Likewise.
+ 	* tree-vectorizer.c (get_vec_alignment_for_array_type): Likewise.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vectorizable_call): Require the types
+ 	to have the same size.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vectorizable_call): If an operand is
+ 	constant or external, use get_vectype_for_scalar_type
+ 	rather than get_same_sized_vectype to get its vector type.
+ 	(vectorizable_conversion, vectorizable_shift): Likewise.
+ 	(vectorizable_operation): Likewise.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (vec_info::vector_size): Replace with...
+ 	(vec_info::vector_mode): ...this new field.
+ 	* tree-vect-loop.c (vect_update_vf_for_slp): Update accordingly.
+ 	(vect_analyze_loop, vect_transform_loop): Likewise.
+ 	* tree-vect-loop-manip.c (vect_do_peeling): Likewise.
+ 	* tree-vect-slp.c (can_duplicate_and_interleave_p): Likewise.
+ 	(vect_make_slp_decision, vect_slp_bb_region): Likewise.
+ 	* tree-vect-stmts.c (get_vectype_for_scalar_type): Likewise.
+ 	* tree-vectorizer.c (try_vectorize_loop_1): Likewise.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.h (vector_sizes, auto_vector_sizes): Delete.
+ 	(vector_modes, auto_vector_modes): New typedefs.
+ 	* target.def (autovectorize_vector_sizes): Replace with...
+ 	(autovectorize_vector_modes): ...this new hook.
+ 	* doc/tm.texi.in (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES):
+ 	Replace with...
+ 	(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): ...this new hook.
+ 	* doc/tm.texi: Regenerate.
+ 	* targhooks.h (default_autovectorize_vector_sizes): Delete.
+ 	(default_autovectorize_vector_modes): New function.
+ 	* targhooks.c (default_autovectorize_vector_sizes): Delete.
+ 	(default_autovectorize_vector_modes): New function.
+ 	* omp-general.c (omp_max_vf): Use autovectorize_vector_modes instead
+ 	of autovectorize_vector_sizes.  Use the number of units in the mode
+ 	to calculate the maximum VF.
+ 	* omp-low.c (omp_clause_aligned_alignment): Use
+ 	autovectorize_vector_modes instead of autovectorize_vector_sizes.
+ 	Use a loop based on related_mode to iterate through all supported
+ 	vector modes for a given scalar mode.
+ 	* optabs-query.c (can_vec_mask_load_store_p): Use
+ 	autovectorize_vector_modes instead of autovectorize_vector_sizes.
+ 	* tree-vect-loop.c (vect_analyze_loop, vect_transform_loop): Likewise.
+ 	* tree-vect-slp.c (vect_slp_bb_region): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
+ 	Replace with...
+ 	(aarch64_autovectorize_vector_modes): ...this new function.
+ 	(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Delete.
+ 	(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
+ 	* config/arc/arc.c (arc_autovectorize_vector_sizes): Replace with...
+ 	(arc_autovectorize_vector_modes): ...this new function.
+ 	(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Delete.
+ 	(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
+ 	* config/arm/arm.c (arm_autovectorize_vector_sizes): Replace with...
+ 	(arm_autovectorize_vector_modes): ...this new function.
+ 	(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Delete.
+ 	(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
+ 	* config/i386/i386.c (ix86_autovectorize_vector_sizes): Replace with...
+ 	(ix86_autovectorize_vector_modes): ...this new function.
+ 	(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Delete.
+ 	(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
+ 	* config/mips/mips.c (mips_autovectorize_vector_sizes): Replace with...
+ 	(mips_autovectorize_vector_modes): ...this new function.
+ 	(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Delete.
+ 	(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vectorizable_shift): Check the number
+ 	of vector elements as well as the type mode when deciding
+ 	whether an op1_vectype is compatible.  Reuse the result of
+ 	this check when generating vector statements.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): If
+ 	targetm.vectorize.preferred_simd_mode returns an integer mode,
+ 	use mode_for_vector to decide what the vector type's mode
+ 	should actually be.  Use build_vector_type_for_mode instead
+ 	of build_vector_type.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (get_mask_mode): Take a vector mode itself as argument,
+ 	instead of properties about the vector mode.
+ 	* doc/tm.texi: Regenerate.
+ 	* targhooks.h (default_get_mask_mode): Update to reflect new
+ 	get_mode_mask interface.
+ 	* targhooks.c (default_get_mask_mode): Likewise.  Use
+ 	related_int_vector_mode.
+ 	* optabs-query.c (can_vec_mask_load_store_p): Update call
+ 	to get_mask_mode.
+ 	* tree-vect-stmts.c (check_load_store_masking): Likewise, checking
+ 	first that the original mode really is a vector.
+ 	* tree.c (build_truth_vector_type_for): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_get_mask_mode): Update for new
+ 	get_mode_mask interface.
+ 	(aarch64_expand_sve_vcond): Update call accordingly.
+ 	* config/gcn/gcn.c (gcn_vectorize_get_mask_mode): Update for new
+ 	get_mode_mask interface.
+ 	* config/i386/i386.c (ix86_get_mask_mode): Likewise.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree.h (build_truth_vector_type): Delete.
+ 	(build_same_sized_truth_vector_type): Likewise.
+ 	* tree.c (build_truth_vector_type): Rename to...
+ 	(build_truth_vector_type_for): ...this.  Make static and take
+ 	a vector type as argument.
+ 	(truth_type_for): Update accordingly.
+ 	(build_same_sized_truth_vector_type): Delete.
+ 	* tree-vect-generic.c (expand_vector_divmod): Use truth_type_for
+ 	instead of build_same_sized_truth_vector_type.
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
+ 	(vect_record_loop_mask, vect_get_loop_mask): Likewise.
+ 	* tree-vect-patterns.c (build_mask_conversion): Likeise.
+ 	* tree-vect-slp.c (vect_get_constant_vectors): Likewise.
+ 	* tree-vect-stmts.c (vect_get_vec_def_for_operand): Likewise.
+ 	(vect_build_gather_load_calls, vectorizable_call): Likewise.
+ 	(scan_store_can_perm_p, vectorizable_scan_store): Likewise.
+ 	(vectorizable_store, vectorizable_condition): Likewise.
+ 	(get_mask_type_for_scalar_type, get_same_sized_vectype): Likewise.
+ 	(vect_get_mask_type_for_stmt): Use truth_type_for instead of
+ 	build_truth_vector_type.
+ 	* config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
+ 	Use truth_type_for instead of build_same_sized_truth_vector_type.
+ 	* config/rs6000/rs6000-call.c (fold_build_vec_cmp): Likewise.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree.h (build_truth_vector_type_for_mode): Declare.
+ 	* tree.c (build_truth_vector_type_for_mode): New function,
+ 	split out from...
+ 	(build_truth_vector_type): ...here.
+ 	(build_opaque_vector_type): Fix head comment.
+ 	* tree-vectorizer.h (supportable_narrowing_operation): Remove
+ 	vec_info parameter.
+ 	(vect_halve_mask_nunits): Replace vec_info parameter with the
+ 	mode of the new vector.
+ 	(vect_double_mask_nunits): Likewise.
+ 	* tree-vect-loop.c (vect_halve_mask_nunits): Likewise.
+ 	(vect_double_mask_nunits): Likewise.
+ 	* tree-vect-loop-manip.c: Include insn-config.h, rtl.h and recog.h.
+ 	(vect_maybe_permute_loop_masks): Remove vinfo parameter.  Update call
+ 	to vect_halve_mask_nunits, getting the required mode from the unpack
+ 	patterns.
+ 	(vect_set_loop_condition_masked): Update call accordingly.
+ 	* tree-vect-stmts.c (supportable_narrowing_operation): Remove vec_info
+ 	parameter and update call to vect_double_mask_nunits.
+ 	(vectorizable_conversion): Update call accordingly.
+ 	(simple_integer_narrowing): Likewise.  Remove vec_info parameter.
+ 	(vectorizable_call): Update call accordingly.
+ 	(supportable_widening_operation): Update call to
+ 	vect_halve_mask_nunits.
+ 	* config/aarch64/aarch64-sve-builtins.cc (register_builtin_types):
+ 	Use build_truth_vector_type_mode instead of build_truth_vector_type.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* machmode.h (mode_for_int_vector): Delete.
+ 	(related_int_vector_mode): Declare.
+ 	* stor-layout.c (mode_for_int_vector): Delete.
+ 	(related_int_vector_mode): New function.
+ 	* optabs.c (expand_vec_perm_1): Use related_int_vector_mode
+ 	instead of mode_for_int_vector.
+ 	(expand_vec_perm_const): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Likewise.
+ 	(aarch64_evpc_sve_tbl): Likewise.
+ 	* config/s390/s390.c (s390_expand_vec_compare_cc): Likewise.
+ 	(s390_expand_vcond): Likewise.
+ 
+ 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (related_mode): New hook.
+ 	* doc/tm.texi.in (TARGET_VECTORIZE_RELATED_MODE): New hook.
+ 	* doc/tm.texi: Regenerate.
+ 	* targhooks.h (default_vectorize_related_mode): Declare.
+ 	* targhooks.c (default_vectorize_related_mode): New function.
+ 	* machmode.h (related_vector_mode): Declare.
+ 	* stor-layout.c (related_vector_mode): New function.
+ 	* expmed.c (extract_bit_field_1): Use it instead of mode_for_vector.
+ 	* optabs-query.c (qimode_for_vec_perm): Likewise.
+ 	* tree-vect-stmts.c (get_group_load_store_type): Likewise.
+ 	(vectorizable_store, vectorizable_load): Likewise
+ 
+ 2019-11-14  Richard Henderson  <richard.henderson@linaro.org>
+ 
+ 	* config/arm/aarch-common-protos.h (arm_md_asm_adjust): Declare.
+ 	* config/arm/aarch-common.c (arm_md_asm_adjust): New.
+ 	* config/arm/arm-c.c (arm_cpu_builtins): Define
+ 	__GCC_ASM_FLAG_OUTPUTS__.
+ 	* config/arm/arm.c (TARGET_MD_ASM_ADJUST): New.
+ 	* config/aarch64/aarch64-c.c (aarch64_define_unconditional_macros):
+ 	Define __GCC_ASM_FLAG_OUTPUTS__.
+ 	* config/aarch64/aarch64.c (TARGET_MD_ASM_ADJUST): New.
+ 	* doc/extend.texi (FlagOutputOperands): Add documentation
+ 	for ARM and AArch64.
+ 
+ 	* config/arm/arm-modes.def (CC_NZ): Rename from CC_NOOV.
+ 	* config/arm/predicates.md (nz_comparison_operator): Rename
+ 	from noov_comparison_operator.
+ 	* config/arm/arm.c (arm_select_cc_mode): Use CC_NZmode name.
+ 	(arm_gen_dicompare_reg): Likewise.
+ 	(maybe_get_arm_condition_code): Likewise.
+ 	(thumb1_final_prescan_insn): Likewise.
+ 	(arm_emit_coreregs_64bit_shift): Likewise.
+ 	* config/arm/arm.md (addsi3_compare0): Likewise.
+ 	(*addsi3_compare0_scratch, subsi3_compare0): Likewise.
+ 	(*mulsi3_compare0, *mulsi3_compare0_v6): Likewise.
+ 	(*mulsi3_compare0_scratch, *mulsi3_compare0_scratch_v6): Likewise.
+ 	(*mulsi3addsi_compare0, *mulsi3addsi_compare0_v6): Likewise.
+ 	(*mulsi3addsi_compare0_scratch): Likewise.
+ 	(*mulsi3addsi_compare0_scratch_v6): Likewise.
+ 	(*andsi3_compare0, *andsi3_compare0_scratch): Likewise.
+ 	(*zeroextractsi_compare0_scratch): Likewise.
+ 	(*ne_zeroextractsi, *ne_zeroextractsi_shifted): Likewise.
+ 	(*ite_ne_zeroextractsi, *ite_ne_zeroextractsi_shifted): Likewise.
+ 	(andsi_not_shiftsi_si_scc_no_reuse): Likewise.
+ 	(andsi_not_shiftsi_si_scc): Likewise.
+ 	(*andsi_notsi_si_compare0, *andsi_notsi_si_compare0_scratch): Likewise.
+ 	(*iorsi3_compare0, *iorsi3_compare0_scratch): Likewise.
+ 	(*xorsi3_compare0, *xorsi3_compare0_scratch): Likewise.
+ 	(*shiftsi3_compare0, *shiftsi3_compare0_scratch): Likewise.
+ 	(*not_shiftsi_compare0, *not_shiftsi_compare0_scratch): Likewise.
+ 	(*notsi_compare0, *notsi_compare0_scratch): Likewise.
+ 	(return_addr_mask, *check_arch2): Likewise.
+ 	(*arith_shiftsi_compare0, *arith_shiftsi_compare0_scratch): Likewise.
+ 	(*sub_shiftsi_compare0, *sub_shiftsi_compare0_scratch): Likewise.
+ 	(compare_scc splitters): Likewise.
+ 	(movcond_addsi): Likewise.
+ 	* config/arm/thumb2.md (thumb2_addsi3_compare0): Likewise.
+ 	(*thumb2_addsi3_compare0_scratch): Likewise.
+ 	(*thumb2_mulsi_short_compare0): Likewise.
+ 	(*thumb2_mulsi_short_compare0_scratch): Likewise.
+ 	(compare peephole2s): Likewise.
+ 	* config/arm/thumb1.md (thumb1_cbz): Use CC_NZmode and
+ 	nz_comparison_operator names.
+ 	(cbranchsi4_insn): Likewise.
+ 
+ 	* config/arm/constraints.md (c): Use cc_register predicate.
+ 
+ 	* config/aarch64/constraints.md (c): New constraint.
+ 
+ 2019-11-14  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-fnsummary.c (ipa_call_context::estimate_size_and_time,
+ 	ipa_merge_fn_summary_after_inlining): Micro optimize.
+ 
+ 2019-11-14  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* params.opt (max-inline-insns-single-O2): Set to 70 (instead of 30).
+ 
+ 2019-11-14  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-cp.c (ipa_vr_operation_and_type_effects): Move up in file.
+ 	(ipa_value_range_from_jfunc): New function.
+ 	* ipa-fnsummary.c (evaluate_conditions_for_known_args): Add
+ 	known_value_ranges parameter; use it to evalulate conditions.
+ 	(evaluate_properties_for_edge): Compute known value ranges.
+ 	(ipa_fn_summary_t::duplicate): Update use of
+ 	evaluate_conditions_for_known_args.
+ 	(estimate_ipcp_clone_size_and_time): Likewise.
+ 	(ipa_merge_fn_summary_after_inlining): Likewise.
+ 	* ipa-prop.h (ipa_value_range_from_jfunc): Declare.
+ 
+ 2019-11-14  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-inline.c (want_inline_small_function_p): Use
+ 	CIF_MAX_INLINE_INSNS_AUTO_LIMIT instead
+ 	of CIF_MAX_INLINE_INSNS_SINGLE_O2_LIMIT.
+ 
+ 2019-11-14  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-cp.c (devirtualization_time_bonus): Use opt_for_fn
+ 	of a callee to get value of the param.
+ 	* ipa-inline.c (inline_insns_auto): Use proper
+ 	opt_for_fn.
+ 	* opts.c (maybe_default_option): Do not overwrite param
+ 	value if optimization level does not match.  Note that
+ 	params usually have default value set via Init() keyword.
+ 	* params.opt: Remove -param=max-inline-insns-auto-O2.
+ 	* cif-code.def (MAX_INLINE_INSNS_AUTO_O2_LIMIT): Remove.
+ 	* doc/invoke.texi: Remove documentation of
+ 	max-inline-insns-auto-O2.
+ 
+ 2019-11-14  Martin Liska  <mliska@suse.cz>
+ 
+ 	* tree-switch-conversion.c (switch_conversion::switch_conversion):
+ 	Do not initialize m_other_count.
+ 	(switch_conversion::collect): Do not count m_default_count and
+ 	m_other_count as we use frequencies for edges.
+ 	* tree-switch-conversion.h: Remove m_default_count and m_other_count.
+ 
+ 2019-11-14  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR other/92329
+ 	* doc/invoke.texi: Document -fallocation-dce.
+ 
+ 2019-11-14  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR target/92389
+ 	* config/i386/i386.h: Add PTA_AVX512VPOPCNTDQ to
+ 	PTA_ICELAKE_CLIENT which is later interited by
+ 	PTA_ICELAKE_SERVER and PTA_TIGERLAKE.
+ 
+ 2019-11-14  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf.c (sem_item_optimizer::execute): Save
+ 	loaded_symbols.
+ 	(sem_item_optimizer::parse_nonsingleton_classes):
+ 	Return number of loaded symbols.
+ 	(sem_item_optimizer::merge_classes): Print
+ 	statistics about totally needed symbols.
+ 	* ipa-icf.h (parse_nonsingleton_classes): Change return
+ 	type.
+ 	(merge_classes): Add one argument.
+ 
+ 2019-11-14  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf-gimple.c (func_checker::hash_operand): Improve
+ 	func_checker::hash_operand by handling of FIELD_DECLs.
+ 
+ 2019-11-14  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf-gimple.h (func_checker::func_checker): Add
+ 	default constructor.
+ 	* ipa-icf.c (sem_function::init): Make operand_equal_p
+ 	and hash_operand public.
+ 	(sem_item::add_expr): Remove.
+ 	(sem_item::add_type): Remove.
+ 	(sem_function::hash_stmt): Use m_checker for hashing
+ 	of GIMPLE statements.
+ 	(sem_function::parse): Init with checker.
+ 	(sem_variable::parse): Pass NULL as checker.
+ 	(sem_item_optimizer::parse_funcs_and_vars):
+ 	Pass checker to ::parse function.
+ 	(sem_item_optimizer::parse_nonsingleton_classes): Likewise.
+ 	(sem_variable::parse): New function.
+ 	(sem_variable::get_hash): Only return computed hash value.
+ 	(sem_variable::init): Initialize hash of a variable.
+ 	* ipa-icf.h: Remove add_expr, add_type and add func_checker
+ 	to couple of functions as a new argument.
+ 
+ 2019-11-14  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf-gimple.c (func_checker::compare_gimple_call): Update
+ 	bail out reason.
+ 	(func_checker::compare_gimple_assign): Likewise.
+ 
+ 2019-11-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* config/i386/i386-options.c (ix86_omp_device_kind_arch_isa): Don't
+ 	change sse4.2 to sse4_2 and sse4.1 to sse4.1.
+ 	* config/i386/t-omp-device (omp-device-properties-i386): Likewise.
+ 
+ 	* omp-general.c (omp_context_name_list_prop): New function.
+ 	(omp_context_selector_matches): Use it.  Return 0 if it returns
+ 	NULL.
+ 	(omp_context_selector_props_compare): Allow equivalency of an
+ 	identifier and a string literal containing no embedded zeros.
+ 
+ 2019-11-14  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* range-op.cc (RANGE3): Remove.
+ 	(range_tests): Remove all selftest that check for multi-ranges.
+ 	Put tests in namespace selftest.
+ 	* selftest.h: Move range_tests into namespace selftest.
+ 	* value-range.h (class value_range): Unfriend range_tests.
+ 
+ 2019-11-14  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.c (range_fold_binary_symbolics_p): Adapt for
+ 	normalize_symbolics and normalize_addresses working in place.
+ 	(range_fold_unary_symbolics_p): Same.
+ 	(range_fold_unary_symbolics_p): Same.
+ 	* value-range.cc (num_pairs): Same.
+ 	(lower_bound): Same.
+ 	(upper_bound): Same.
+ 	(contains_p): Same.
+ 	(normalize_addresses): Same.
+ 	(normalize_symbolics): Same.
+ 	* value-range.h (normalize_symbolics): Same.
+ 	(normalize_addresses): Same.
+ 
+ 2019-11-14  Feng Xue  <fxue@os.amperecomputing.com>
+ 
+ 	PR ipa/91682
+ 	* ipa-prop.h (jump_func_type): New value IPA_JF_LOAD_AGG.
+ 	(ipa_load_agg_data, ipa_agg_value, ipa_agg_value_set): New structs.
+ 	(ipa_agg_jf_item): Add new field jftype and type, redefine field value.
+ 	(ipa_agg_jump_function): Remove member function equal_to.
+ 	(ipa_agg_jump_function_p): Remove typedef.
+ 	(ipa_copy_agg_values, ipa_release_agg_values): New functions.
+ 	* ipa-prop.c (ipa_print_node_jump_functions_for_edge): Dump
+ 	information for aggregate jump function.
+ 	(get_ssa_def_if_simple_copy): Add new parameter rhs_stmt to
+ 	record last definition statement.
+ 	(load_from_unmodified_param_or_agg): New function.
+ 	(ipa_known_agg_contents_list): Add new field type and value, remove
+ 	field constant.
+ 	(build_agg_jump_func_from_list): Rename parameter const_count to
+ 	value_count, build aggregate jump function from ipa_load_agg_data.
+ 	(analyze_agg_content_value): New function.
+ 	(extract_mem_content): Analyze memory store assignment to prepare
+ 	information for aggregate jump function generation.
+ 	(determine_known_aggregate_parts): Add new parameter fbi, remove
+ 	parameter aa_walk_budeget_p.
+ 	(update_jump_functions_after_inlining): Update aggregate jump function.
+ 	(ipa_find_agg_cst_for_param): Change type of parameter agg.
+ 	(try_make_edge_direct_simple_call): Add new parameter new_root.
+ 	(try_make_edge_direct_virtual_call): Add new parameter new_root and
+ 	new_root_info.
+ 	(update_indirect_edges_after_inlining): Pass new argument to
+ 	try_make_edge_direct_simple_call and try_make_edge_direct_virtual_call.
+ 	(ipa_write_jump_function): Write aggregate jump function to file.
+ 	(ipa_read_jump_function): Read aggregate jump function from file.
+ 	(ipa_agg_value::equal_to): Migrate from ipa_agg_jf_item::equal_to.
+ 	* ipa-cp.c (ipa_get_jf_arith_result): New function.
+ 	(ipa_agg_value_from_node): Likewise.
+ 	(ipa_agg_value_set_from_jfunc): Likewise.
+ 	(propagate_vals_across_arith_jfunc): Likewise.
+ 	(propagate_aggregate_lattice): Likewise.
+ 	(ipa_get_jf_pass_through_result): Call ipa_get_jf_arith_result.
+ 	(propagate_vals_across_pass_through): Call
+ 	propagate_vals_across_arith_jfunc.
+ 	(get_clone_agg_value): Move forward.
+ 	(propagate_aggs_across_jump_function): Handle value propagation for
+ 	aggregate jump function.
+ 	(agg_jmp_p_vec_for_t_vec): Remove.
+ 	(context_independent_aggregate_values): Replace vec<ipa_agg_jf_item>
+ 	with vec<ipa_agg_value>.
+ 	(copy_plats_to_inter, intersect_with_plats): Likewise.
+ 	(agg_replacements_to_vector, intersect_with_agg_replacements): Likewise.
+ 	(intersect_aggregate_with_edge): Likewise.
+ 	(find_aggregate_values_for_callers_subset): Likewise.
+ 	(cgraph_edge_brings_all_agg_vals_for_node): Likewise.
+ 	(estimate_local_effects): Replace vec<ipa_agg_jump_function> and
+ 	vec<ipa_agg_jump_function_p> with vec<ipa_agg_value_set>.
+ 	(gather_context_independent_values): Likewise.
+ 	(perform_estimation_of_a_value, decide_whether_version_node): Likewise.
+ 	* ipa-fnsummary.c (evaluate_conditions_for_known_args): Replace
+ 	vec<ipa_agg_jump_function_p> with vec<ipa_agg_value_set>.
+ 	(evaluate_properties_for_edge): Likewise.
+ 	(estimate_edge_devirt_benefit): Likewise.
+ 	(estimate_edge_size_and_time):  Likewise.
+ 	(estimate_calls_size_and_time): Likewise.
+ 	(ipa_call_context::ipa_call_context): Likewise.
+ 	(estimate_ipcp_clone_size_and_time):  Likewise.
+ 	* ipa-fnsummary.h (ipa_call_context): Replace
+ 	vec<ipa_agg_jump_function_p> with vec<ipa_agg_value_set>.
+ 	* ipa-inline-analysis.c (do_estimate_edge_time): Replace
+ 	vec<ipa_agg_jump_function_p> with vec<ipa_agg_value_set>.
+ 	(do_estimate_edge_size): Likewise.
+ 	(do_estimate_edge_hints): Likewise.
+ 
+ 2019-11-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-cp.c (propagate_vr_across_jump_function): Propagate also across
+ 	binary operations.
+ 
+ 2019-11-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-profile.c (check_argument_count): Check properly that e_info
+ 	is non-NULL; do not check descriptors.
+ 
+ 2019-11-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline-analysis.c (do_estimate_edge_time): Relax
+ 	check for ipa profiles.
+ 
+ 2019-11-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR c++/92421
+ 	* ipa-prop.c (update_indirect_edges_after_inlining):
+ 	Mark parameter as used.
+ 	* ipa-inline.c (recursive_inlining): Reset node cache
+ 	after inlining.
+ 	(inline_small_functions): Remove checking ifdef.
+ 	* ipa-inline-analysis.c (do_estimate_edge_time): Verify
+ 	cache consistency.
+ 
+ 2019-11-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR ipa/92498
+ 	* ipa-profile.c (check_argument_count): Do not ICE when descriptors
+ 	is NULL.
+ 	(ipa_profile): Fix reversed test.
+ 
+ 2019-11-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-cp.c (ignore_edge_p): Do not check caller flags.
+ 	(propagate_constants_topo): Fix typo.
+ 
+ 2019-11-13  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* Makefile.in (OBJS): Add value-range.o.
+ 	(GTFILES): Add value-range.h.
+ 	* gengtype.c (open_base_files): Add value-range.h to list of
+ 	header files.
+ 	* tree-vrp.c: Move the following value_range related functions:
+ 	ranges_from_anti_range, value_range, check, equal_p, symbolic_p,
+ 	constant_p, set_undefined, set_varying, may_contain_p,
+ 	singleton_p, type, dump, dump_value_range, debug, vrp_val_max,
+ 	vrp_val_min, vrp_val_is_min, vrp_val_is_max, set, set_nonzero,
+ 	set_zero, vrp_operand_equal_p, range_has_numeric_bounds_p,
+ 	value_inside_range, ranges_from_anti_range, union_ranges,
+ 	intersect_ranges, intersect_helper, union_helper, union_,
+ 	normalize_addresses, normalize_symbolics, num_pairs, lower_bound,
+ 	upper_bound, contains_p, invert, intersect...
+ 	* value-range.cc: ...to here.
+ 	* tree-vrp.h: Move class value_range, enum_value_range_kind, and
+ 	associated inline methods from here...
+ 	* value-range.h: ...to here.
+ 
+ 2019-11-13  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
+ 
+ 	* config/mips/mips.md (rotr<mode>3): Sanitize the constant argument
+ 	instead of asserting its value.
+ 
+ (2019-11-13  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* gimple-fold.c (size_must_be_zero_p): Rewrite use of value_range
+ 	constructors and set methods so value_range_kind is the last
+ 	argument and defaults to VR_RANGE.
+ 	* gimple-ssa-evrp-analyze.c (record_ranges_from_stmt): Same.
+ 	* ipa-cp.c (propagate_vr_across_jump_function): Same.
+ 	* ipa-prop.c (ipa_get_value_range): Same.
+ 	(ipa_compute_jump_functions_for_edge): Same.
+ 	* range-op.cc (value_range_from_overflowed_bounds): Same.
+ 	(operator_cast::op1_range): Same.
+ 	(range_tests): Same.
+ 	* range.cc (range_nonzero): Same.
+ 	* tree-ssanames.c (get_range_info): Same.
+ 	* tree-vrp.c (value_range_equiv::set): Same.
+ 	(value_range::value_range): Same.
+ 	(value_range_equiv::value_range_equiv): Same.
+ 	(value_range_equiv::update): Same.
+ 	(value_range_equiv::deep_copy): Same.
+ 	(value_range_equiv::move): Same.
+ 	(value_range_equiv::set_undefined): Same.
+ 	(value_range::set): Same.
+ 	(value_range::set_nonzero): Same.
+ 	(ranges_from_anti_range): Same.
+ 	(extract_range_from_plus_minus_expr): Same.
+ 	(value_range::intersect_helper): Same.
+ 	(value_range_equiv::intersect): Same.
+ 	(value_range::union_helper): Same.
+ 	(value_range_equiv::union_): Same.
+ 	(value_range::normalize_symbolics): Same.
+ 	(value_range::invert): Same.
+ 	(determine_value_range_1): Same.
+ 	* tree-vrp.h (class value_range): Same.
+ 	(class value_range_equiv): Same.
+ 	* vr-values.c (set_value_range_to_nonnegative): Same.
+ 	(set_value_range_to_truthvalue): Same.
+ 	(vr_values::update_value_range): Same.
+ 	(vr_values::extract_range_for_var_from_comparison_expr): Same.
+ 	(vr_values::extract_range_from_binary_expr): Same.
+ 	(vr_values::extract_range_from_comparison): Same.
+ 	(vr_values::extract_range_basic): Same.
+ 	(vr_values::adjust_range_with_scev): Same.
+ 	(vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
+ 	(vr_values::extract_range_from_phi_node): Same.
+ 
+ 2019-11-13  Ulrich Drepper  <drepper@redhat.com>
+ 
+ 	* tree-dump.c (dequeue_and_dump): Print first tree operand
+ 	for VIEW_CONVERT_EXPR.
+ 
+ 2019-11-13  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* ginclude/float.c [__STDC_VERSION__ > 201710L] (FLT_NORM_MAX,
+ 	DBL_NORM_MAX, LDBL_NORM_MAX): Define.
+ 	* real.c (get_max_float): Add norm_max argument.
+ 	* real.h (get_max_float): Update prototype.
+ 	* builtins.c (fold_builtin_interclass_mathfn): Update calls to
+ 	get_max_float.
+ 
+ 2019-11-13  Martin Liska  <mliska@suse.cz>
+ 
+ 	* dbgcnt.c (test_sorted_dbg_counters): New.
+ 	(dbgcnt_c_tests): Likewise.
+ 	* selftest-run-tests.c (selftest::run_tests): Likewise.
+ 	* selftest.h (dbgcnt_c_tests): Likewise.
+ 
+ 2019-11-13  Jan Hubicka  <hubicka@ucw.cz>
+ 	    Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/92454
+ 	* ipa-cp.c (spread_undeadness): Check that IPA_NODE_REF exists.
+ 	(identify_dead_nodes): Likewise.
+ 
+ 2019-11-13  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf.c (sem_function::equals_private): Do not overuse
+ 	push/pop_cfun functions.
+ 
+ 2019-11-13  Martin Liska  <mliska@suse.cz>
+ 
+ 	* common.opt: Document change of -fdbg-cnt option.
+ 	* dbgcnt.c (DEBUG_COUNTER): Remove.
+ 	(dbg_cnt_is_enabled): Remove.
+ 	(dbg_cnt): Work with new intervals.
+ 	(dbg_cnt_set_limit_by_index): Set to new
+ 	list of intervals.
+ 	(dbg_cnt_set_limit_by_name): Likewise.
+ 	(dbg_cnt_process_single_pair): Process new format.
+ 	(dbg_cnt_process_opt): Likewise.
+ 	(dbg_cnt_list_all_counters): Likewise.
+ 	* doc/invoke.texi: Document change of -fdbg-cnt option.
+ 	(cmp_tuples): New.
+ 
+ 2019-11-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline.c (ipa_inline): Check that function is defined before
+ 	flattening.
+ 
+ 2019-11-13  Andrew Stubbs  <ams@codesourcery.com>
+ 	    Julian Brown  <julian@codesourcery.com>
+ 
+ 	* config/gcn/gcn.c (gcn_goacc_validate_dims): Ensure
+ 	flag_worker_partitioning is not set.
+ 	(TARGET_GOACC_WORKER_PARTITIONING): Remove target hook definition.
+ 	* config/gcn/gcn.opt (macc-experimental-workers): Default to off.
+ 
+ 2019-11-13  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-run.c (heap_region): New global variable.
+ 	(struct hsa_runtime_fn_info): Add hsa_memory_assign_agent_fn.
+ 	(init_hsa_runtime_functions): Initialize hsa_memory_assign_agent.
+ 	(get_kernarg_region): Move contents to ....
+ 	(get_memory_region): .... here.
+ 	(get_heap_region): New function.
+ 	(init_device): Initialize the heap_region.
+ 	(device_malloc): Add region parameter.
+ 	(struct kernargs): Move heap ....
+ 	(heap): ... to global scope.
+ 	(main): Allocate heap separate to kernargs.
+ 
+ 2019-11-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-prop.c (ipa_print_node_jump_functions,
+ 	ipa_print_node_params): Print info about missing summaries.
+ 
+ 2019-11-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-loop.c (vect_estimate_min_profitable_iters): Include
+ 	the cost of generating loop masks.
+ 
+ 2019-11-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (vect_apply_runtime_profitability_check_p):
+ 	New function.
+ 	* tree-vect-loop-manip.c (vect_loop_versioning): Use it.
+ 	* tree-vect-loop.c (vect_analyze_loop_2): Likewise.
+ 	(vect_transform_loop): Likewise.
+ 	(vect_analyze_loop_costing): Don't take the cost of versioning
+ 	into account for the static profitability threshold if it turns
+ 	out that no versioning is needed.
+ 
+ 2019-11-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa.c (cgraph_build_static_cdtor): Pass optimization_default_node
+ 	and target_option_default_node to get -fprofile-generate ctors working
+ 	right with LTO.
+ 
+ 2019-11-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (vect_nop_conversion_p): Declare.
+ 	* tree-vect-stmts.c (vect_nop_conversion_p): New function.
+ 	(vectorizable_assignment): Don't add a cost for nop conversions.
+ 	* tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
+ 	Likewise.
+ 	* tree-vect-slp.c (vect_bb_slp_scalar_cost): Likewise.
+ 
+ 2019-11-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vect_model_promotion_demotion_cost): Take the
+ 	number of ncopies as an additional argument.
+ 	(vectorizable_conversion): Update call accordingly.  Use "modifier"
+ 	to check whether a conversion is between vectors with the same
+ 	numbers of units.
+ 
+ 2019-11-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve-builtins-functions.h
+ 	(unary_count::expand): Use aarch64_sve_int_mode instead of
+ 	mode_for_int_vector.
+ 
+ 2019-11-13  Martin Liska  <mliska@suse.cz>
+ 
+ 	* opts.c: Update comment about OPT_LEVELS_2_PLUS_SPEED_ONLY.
+ 
+ 2019-11-13  Martin Liska  <mliska@suse.cz>
+ 
+ 	* tree-streamer-in.c (lto_input_ts_function_decl_tree_pointers):
+ 	Remove call to finalize_options_struct.
+ 
+ 2019-11-13  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/92055
+ 	* config/avr/t-avr (avr-mcus): Do not depend on
+ 	$(srcdir)/config/avr/t-multilib.
+ 
+ 2019-11-13  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92473
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): Perform
+ 	direct optab reduction in the correct type.
+ 
+ 2019-11-12  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (rs6000_set_fpscr_drn): Use ULL on big
+ 	hexadecimal literal.
+ 
+ 2019-11-12  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/vsx.md (xscmpexpdp_<code> for CMP_TEST): Handle
+ 	UNORDERED if !HONOR_NANS (DFmode).
+ 	(xscmpexpqp_<code>_<mode> for CMP_TEST and IEEE128): Handle UNORDERED
+ 	if !HONOR_NANS (<MODE>mode).
+ 
+ 2019-11-12  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-cp.c (ignore_edge_p): Also look for optimize flag.
+ 	(ipcp_verify_propagated_values): Likewise.
+ 	(propagate_constants_across_call): Likewise.
+ 	(propagate_constants_topo): Likewise.
+ 	(ipcp_propagate_stage): Likewise.
+ 
+ 2019-11-12  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR ipa/92471
+ 	* ipa-profile.c (check_argument_count): Break out from ...;
+ 	watch for missing summaries.
+ 	(ipa_profile): Here.
+ 
+ 2019-11-12  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/92412
+ 	* targhooks.c (default_ref_may_alias_errno): Errono can only alias
+ 	extern variables.
+ 
+ 2019-11-12  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/83688
+ 	* gimple-ssa-sprintf.c (format_result::alias_info): New struct.
+ 	(directive::argno): New member.
+ 	(format_result::aliases, format_result::alias_count): New data members.
+ 	(format_result::append_alias): New member function.
+ 	(fmtresult::dst_offset): New data member.
+ 	(pass_sprintf_length::call_info::dst_origin): New data member.
+ 	(pass_sprintf_length::call_info::dst_field, dst_offset): Same.
+ 	(char_type_p, array_elt_at_offset, field_at_offset): New functions.
+ 	(get_origin_and_offset): Same.
+ 	(format_string): Call it.
+ 	(format_directive): Call append_alias and set directive argument
+ 	number.
+ 	(maybe_warn_overlap): New function.
+ 	(pass_sprintf_length::compute_format_length): Call it.
+ 	(pass_sprintf_length::handle_gimple_call): Initialize new members.
+ 	* tree-ssa-strlen.c (): Also enable when -Wrestrict is on.
+ 
+ 2019-11-12  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	PR rtl-optimization/92430
+ 	* cfgcleanup.c (pass_jump_after_combine::execute): Free
+ 	dominance info at the beginning.
+ 
+ 2019-11-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92460
+ 	* tree-vect-stmts.c (vectorizable_simd_clone_call): Unshare
+ 	expression before gimplifying.
+ 
+ 2019-11-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92461
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): Update
+ 	stmt after propagation.
+ 
+ 2019-11-12  Martin Liska  <mliska@suse.cz>
+ 
+ 	* config/i386/i386-options.c (ix86_recompute_optlev_based_flags):
+ 	Use SET_OPTION_IF_UNSET.
+ 	(ix86_option_override_internal): Likewise.
+ 	* opts.c (default_options_optimization): Likewise.
+ 	(finish_options): Likewise.
+ 	(enable_fdo_optimizations): Likewise.
+ 	(common_handle_option): Likewise.
+ 
+ 2019-11-12  Martin Liska  <mliska@suse.cz>
+ 
+ 	* common/common-target.def: Remove option_validate_param and
+ 	option_default_params.
+ 	* common/common-targhooks.c (default_option_validate_param):
+ 	Remove.
+ 	* common/common-targhooks.h (default_option_validate_param):
+ 	Remove.
+ 	* common/config/aarch64/aarch64-common.c (TARGET_OPTION_DEFAULT_PARAMS):
+ 	Remove usage of this.
+ 	(TARGET_OPTION_VALIDATE_PARAM): Likewise.
+ 	(aarch64_option_validate_param): Likewise.
+ 	(aarch64_option_default_params): Likewise
+ 	* common/config/bpf/bpf-common.c (bpf_option_default_params): Likewise.
+ 	(TARGET_OPTION_DEFAULT_PARAMS): Likewise.
+ 	* common/config/ia64/ia64-common.c (ia64_option_default_params): Likewise.
+ 	(TARGET_OPTION_DEFAULT_PARAMS): Likewise.
+ 	* common/config/powerpcspe/powerpcspe-common.c (rs6000_option_default_params): Likewise.
+ 	(TARGET_OPTION_DEFAULT_PARAMS): Likewise.
+ 	* common/config/rs6000/rs6000-common.c (rs6000_option_default_params): Likewise.
+ 	(TARGET_OPTION_DEFAULT_PARAMS): Likewise.
+ 	* common/config/sh/sh-common.c (sh_option_default_params): Likewise.
+ 	(TARGET_OPTION_DEFAULT_PARAMS): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_override_options_internal): Validate
+ 	guard_size here.
+ 	* doc/tm.texi: Remove option_default_params and option_validate_param.
+ 	* doc/tm.texi.in: Likewise.
+ 
+ 2019-11-12  Martin Liska  <mliska@suse.cz>
+ 
+ 	* common/common-target.def:
+ 	Do not mention set_default_param_value
+ 	and set_param_value.
+ 	* doc/tm.texi: Likewise.
+ 
+ 2019-11-12  Martin Liska  <mliska@suse.cz>
+ 
+ 	* common.opt: Remove param_values.
+ 	* config/i386/i386-options.c (ix86_valid_target_attribute_p):
+ 	Remove finalize_options_struct.
+ 	* gcc.c (driver::decode_argv): Do not call global_init_params
+ 	and finish_params.
+ 	(driver::finalize): Do not call params_c_finalize
+ 	and finalize_options_struct.
+ 	* opt-suggestions.c (option_proposer::get_completions): Remove
+ 	special casing of params.
+ 	(option_proposer::find_param_completions): Remove.
+ 	(test_completion_partial_match): Update expected output.
+ 	* opt-suggestions.h: Remove find_param_completions.
+ 	* opts-common.c (add_misspelling_candidates): Add
+ 	--param with a space.
+ 	* opts.c (handle_param): Remove.
+ 	(init_options_struct):. Remove init_options_struct and
+ 	similar calls.
+ 	(finalize_options_struct): Remove.
+ 	(common_handle_option): Use SET_OPTION_IF_UNSET.
+ 	* opts.h (finalize_options_struct): Remove.
+ 	* toplev.c (general_init): Do not call global_init_params.
+ 	(toplev::finalize): Do not call params_c_finalize and
+ 	finalize_options_struct.
+ 
+ 2019-11-12  Martin Liska  <mliska@suse.cz>
+ 
+ 	* Makefile.in: Remove PARAMS_H and params.list
+ 	and params.options.
+ 	* params-enum.h: Remove.
+ 	* params-list.h: Remove.
+ 	* params-options.h: Remove.
+ 	* params.c: Remove.
+ 	* params.def: Remove.
+ 	* params.h: Remove.
+ 	* asan.c: Do not include params.h.
+ 	* auto-profile.c: Likewise.
+ 	* bb-reorder.c: Likewise.
+ 	* builtins.c: Likewise.
+ 	* cfgcleanup.c: Likewise.
+ 	* cfgexpand.c: Likewise.
+ 	* cfgloopanal.c: Likewise.
+ 	* cgraph.c: Likewise.
+ 	* combine.c: Likewise.
+ 	* common/config/aarch64/aarch64-common.c: Likewise.
+ 	* common/config/gcn/gcn-common.c: Likewise.
+ 	* common/config/ia64/ia64-common.c: Likewise.
+ 	* common/config/powerpcspe/powerpcspe-common.c: Likewise.
+ 	* common/config/rs6000/rs6000-common.c: Likewise.
+ 	* common/config/sh/sh-common.c: Likewise.
+ 	* config/aarch64/aarch64.c: Likewise.
+ 	* config/alpha/alpha.c: Likewise.
+ 	* config/arm/arm.c: Likewise.
+ 	* config/avr/avr.c: Likewise.
+ 	* config/csky/csky.c: Likewise.
+ 	* config/i386/i386-builtins.c: Likewise.
+ 	* config/i386/i386-expand.c: Likewise.
+ 	* config/i386/i386-features.c: Likewise.
+ 	* config/i386/i386-options.c: Likewise.
+ 	* config/i386/i386.c: Likewise.
+ 	* config/ia64/ia64.c: Likewise.
+ 	* config/rs6000/rs6000-logue.c: Likewise.
+ 	* config/rs6000/rs6000.c: Likewise.
+ 	* config/s390/s390.c: Likewise.
+ 	* config/sparc/sparc.c: Likewise.
+ 	* config/visium/visium.c: Likewise.
+ 	* coverage.c: Likewise.
+ 	* cprop.c: Likewise.
+ 	* cse.c: Likewise.
+ 	* cselib.c: Likewise.
+ 	* dse.c: Likewise.
+ 	* emit-rtl.c: Likewise.
+ 	* explow.c: Likewise.
+ 	* final.c: Likewise.
+ 	* fold-const.c: Likewise.
+ 	* gcc.c: Likewise.
+ 	* gcse.c: Likewise.
+ 	* ggc-common.c: Likewise.
+ 	* ggc-page.c: Likewise.
+ 	* gimple-loop-interchange.cc: Likewise.
+ 	* gimple-loop-jam.c: Likewise.
+ 	* gimple-loop-versioning.cc: Likewise.
+ 	* gimple-ssa-split-paths.c: Likewise.
+ 	* gimple-ssa-sprintf.c: Likewise.
+ 	* gimple-ssa-store-merging.c: Likewise.
+ 	* gimple-ssa-strength-reduction.c: Likewise.
+ 	* gimple-ssa-warn-alloca.c: Likewise.
+ 	* gimple-ssa-warn-restrict.c: Likewise.
+ 	* graphite-isl-ast-to-gimple.c: Likewise.
+ 	* graphite-optimize-isl.c: Likewise.
+ 	* graphite-scop-detection.c: Likewise.
+ 	* graphite-sese-to-poly.c: Likewise.
+ 	* graphite.c: Likewise.
+ 	* haifa-sched.c: Likewise.
+ 	* hsa-gen.c: Likewise.
+ 	* ifcvt.c: Likewise.
+ 	* ipa-cp.c: Likewise.
+ 	* ipa-fnsummary.c: Likewise.
+ 	* ipa-inline-analysis.c: Likewise.
+ 	* ipa-inline.c: Likewise.
+ 	* ipa-polymorphic-call.c: Likewise.
+ 	* ipa-profile.c: Likewise.
+ 	* ipa-prop.c: Likewise.
+ 	* ipa-split.c: Likewise.
+ 	* ipa-sra.c: Likewise.
+ 	* ira-build.c: Likewise.
+ 	* ira-conflicts.c: Likewise.
+ 	* loop-doloop.c: Likewise.
+ 	* loop-invariant.c: Likewise.
+ 	* loop-unroll.c: Likewise.
+ 	* lra-assigns.c: Likewise.
+ 	* lra-constraints.c: Likewise.
+ 	* modulo-sched.c: Likewise.
+ 	* opt-suggestions.c: Likewise.
+ 	* opts.c: Likewise.
+ 	* postreload-gcse.c: Likewise.
+ 	* predict.c: Likewise.
+ 	* reload.c: Likewise.
+ 	* reorg.c: Likewise.
+ 	* resource.c: Likewise.
+ 	* sanopt.c: Likewise.
+ 	* sched-deps.c: Likewise.
+ 	* sched-ebb.c: Likewise.
+ 	* sched-rgn.c: Likewise.
+ 	* sel-sched-ir.c: Likewise.
+ 	* sel-sched.c: Likewise.
+ 	* shrink-wrap.c: Likewise.
+ 	* stmt.c: Likewise.
+ 	* targhooks.c: Likewise.
+ 	* toplev.c: Likewise.
+ 	* tracer.c: Likewise.
+ 	* trans-mem.c: Likewise.
+ 	* tree-chrec.c: Likewise.
+ 	* tree-data-ref.c: Likewise.
+ 	* tree-if-conv.c: Likewise.
+ 	* tree-inline.c: Likewise.
+ 	* tree-loop-distribution.c: Likewise.
+ 	* tree-parloops.c: Likewise.
+ 	* tree-predcom.c: Likewise.
+ 	* tree-profile.c: Likewise.
+ 	* tree-scalar-evolution.c: Likewise.
+ 	* tree-sra.c: Likewise.
+ 	* tree-ssa-ccp.c: Likewise.
+ 	* tree-ssa-dom.c: Likewise.
+ 	* tree-ssa-dse.c: Likewise.
+ 	* tree-ssa-ifcombine.c: Likewise.
+ 	* tree-ssa-loop-ch.c: Likewise.
+ 	* tree-ssa-loop-im.c: Likewise.
+ 	* tree-ssa-loop-ivcanon.c: Likewise.
+ 	* tree-ssa-loop-ivopts.c: Likewise.
+ 	* tree-ssa-loop-manip.c: Likewise.
+ 	* tree-ssa-loop-niter.c: Likewise.
+ 	* tree-ssa-loop-prefetch.c: Likewise.
+ 	* tree-ssa-loop-unswitch.c: Likewise.
+ 	* tree-ssa-math-opts.c: Likewise.
+ 	* tree-ssa-phiopt.c: Likewise.
+ 	* tree-ssa-pre.c: Likewise.
+ 	* tree-ssa-reassoc.c: Likewise.
+ 	* tree-ssa-sccvn.c: Likewise.
+ 	* tree-ssa-scopedtables.c: Likewise.
+ 	* tree-ssa-sink.c: Likewise.
+ 	* tree-ssa-strlen.c: Likewise.
+ 	* tree-ssa-structalias.c: Likewise.
+ 	* tree-ssa-tail-merge.c: Likewise.
+ 	* tree-ssa-threadbackward.c: Likewise.
+ 	* tree-ssa-threadedge.c: Likewise.
+ 	* tree-ssa-uninit.c: Likewise.
+ 	* tree-switch-conversion.c: Likewise.
+ 	* tree-vect-data-refs.c: Likewise.
+ 	* tree-vect-loop.c: Likewise.
+ 	* tree-vect-slp.c: Likewise.
+ 	* tree-vrp.c: Likewise.
+ 	* tree.c: Likewise.
+ 	* value-prof.c: Likewise.
+ 	* var-tracking.c: Likewise.
+ 
+ 2019-11-12  Martin Liska  <mliska@suse.cz>
+ 
+ 	* asan.c (asan_sanitize_stack_p): Replace old parameter syntax
+ 	with the new one, include opts.h if needed.  Use SET_OPTION_IF_UNSET
+ 	macro.
+ 	(asan_sanitize_allocas_p): Likewise.
+ 	(asan_emit_stack_protection): Likewise.
+ 	(asan_protect_global): Likewise.
+ 	(instrument_derefs): Likewise.
+ 	(instrument_builtin_call): Likewise.
+ 	(asan_expand_mark_ifn): Likewise.
+ 	* auto-profile.c (auto_profile): Likewise.
+ 	* bb-reorder.c (copy_bb_p): Likewise.
+ 	(duplicate_computed_gotos): Likewise.
+ 	* builtins.c (inline_expand_builtin_string_cmp): Likewise.
+ 	* cfgcleanup.c (try_crossjump_to_edge): Likewise.
+ 	(try_crossjump_bb): Likewise.
+ 	* cfgexpand.c (defer_stack_allocation): Likewise.
+ 	(stack_protect_classify_type): Likewise.
+ 	(pass_expand::execute): Likewise.
+ 	* cfgloopanal.c (expected_loop_iterations_unbounded): Likewise.
+ 	(estimate_reg_pressure_cost): Likewise.
+ 	* cgraph.c (cgraph_edge::maybe_hot_p): Likewise.
+ 	* combine.c (combine_instructions): Likewise.
+ 	(record_value_for_reg): Likewise.
+ 	* common/config/aarch64/aarch64-common.c (aarch64_option_validate_param): Likewise.
+ 	(aarch64_option_default_params): Likewise.
+ 	* common/config/ia64/ia64-common.c (ia64_option_default_params): Likewise.
+ 	* common/config/powerpcspe/powerpcspe-common.c (rs6000_option_default_params): Likewise.
+ 	* common/config/rs6000/rs6000-common.c (rs6000_option_default_params): Likewise.
+ 	* common/config/sh/sh-common.c (sh_option_default_params): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_output_probe_stack_range): Likewise.
+ 	(aarch64_allocate_and_probe_stack_space): Likewise.
+ 	(aarch64_expand_epilogue): Likewise.
+ 	(aarch64_override_options_internal): Likewise.
+ 	* config/alpha/alpha.c (alpha_option_override): Likewise.
+ 	* config/arm/arm.c (arm_option_override): Likewise.
+ 	(arm_valid_target_attribute_p): Likewise.
+ 	* config/i386/i386-options.c (ix86_option_override_internal): Likewise.
+ 	* config/i386/i386.c (get_probe_interval): Likewise.
+ 	(ix86_adjust_stack_and_probe_stack_clash): Likewise.
+ 	(ix86_max_noce_ifcvt_seq_cost): Likewise.
+ 	* config/ia64/ia64.c (ia64_adjust_cost): Likewise.
+ 	* config/rs6000/rs6000-logue.c (get_stack_clash_protection_probe_interval): Likewise.
+ 	(get_stack_clash_protection_guard_size): Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
+ 	* config/s390/s390.c (allocate_stack_space): Likewise.
+ 	(s390_emit_prologue): Likewise.
+ 	(s390_option_override_internal): Likewise.
+ 	* config/sparc/sparc.c (sparc_option_override): Likewise.
+ 	* config/visium/visium.c (visium_option_override): Likewise.
+ 	* coverage.c (get_coverage_counts): Likewise.
+ 	(coverage_compute_profile_id): Likewise.
+ 	(coverage_begin_function): Likewise.
+ 	(coverage_end_function): Likewise.
+ 	* cse.c (cse_find_path): Likewise.
+ 	(cse_extended_basic_block): Likewise.
+ 	(cse_main): Likewise.
+ 	* cselib.c (cselib_invalidate_mem): Likewise.
+ 	* dse.c (dse_step1): Likewise.
+ 	* emit-rtl.c (set_new_first_and_last_insn): Likewise.
+ 	(get_max_insn_count): Likewise.
+ 	(make_debug_insn_raw): Likewise.
+ 	(init_emit): Likewise.
+ 	* explow.c (compute_stack_clash_protection_loop_data): Likewise.
+ 	* final.c (compute_alignments): Likewise.
+ 	* fold-const.c (fold_range_test): Likewise.
+ 	(fold_truth_andor): Likewise.
+ 	(tree_single_nonnegative_warnv_p): Likewise.
+ 	(integer_valued_real_single_p): Likewise.
+ 	* gcse.c (want_to_gcse_p): Likewise.
+ 	(prune_insertions_deletions): Likewise.
+ 	(hoist_code): Likewise.
+ 	(gcse_or_cprop_is_too_expensive): Likewise.
+ 	* ggc-common.c: Likewise.
+ 	* ggc-page.c (ggc_collect): Likewise.
+ 	* gimple-loop-interchange.cc (MAX_NUM_STMT): Likewise.
+ 	(MAX_DATAREFS): Likewise.
+ 	(OUTER_STRIDE_RATIO): Likewise.
+ 	* gimple-loop-jam.c (tree_loop_unroll_and_jam): Likewise.
+ 	* gimple-loop-versioning.cc (loop_versioning::max_insns_for_loop): Likewise.
+ 	* gimple-ssa-split-paths.c (is_feasible_trace): Likewise.
+ 	* gimple-ssa-store-merging.c (imm_store_chain_info::try_coalesce_bswap): Likewise.
+ 	(imm_store_chain_info::coalesce_immediate_stores): Likewise.
+ 	(imm_store_chain_info::output_merged_store): Likewise.
+ 	(pass_store_merging::process_store): Likewise.
+ 	* gimple-ssa-strength-reduction.c (find_basis_for_base_expr): Likewise.
+ 	* graphite-isl-ast-to-gimple.c (class translate_isl_ast_to_gimple): Likewise.
+ 	(scop_to_isl_ast): Likewise.
+ 	* graphite-optimize-isl.c (get_schedule_for_node_st): Likewise.
+ 	(optimize_isl): Likewise.
+ 	* graphite-scop-detection.c (build_scops): Likewise.
+ 	* haifa-sched.c (set_modulo_params): Likewise.
+ 	(rank_for_schedule): Likewise.
+ 	(model_add_to_worklist): Likewise.
+ 	(model_promote_insn): Likewise.
+ 	(model_choose_insn): Likewise.
+ 	(queue_to_ready): Likewise.
+ 	(autopref_multipass_dfa_lookahead_guard): Likewise.
+ 	(schedule_block): Likewise.
+ 	(sched_init): Likewise.
+ 	* hsa-gen.c (init_prologue): Likewise.
+ 	* ifcvt.c (bb_ok_for_noce_convert_multiple_sets): Likewise.
+ 	(cond_move_process_if_block): Likewise.
+ 	* ipa-cp.c (ipcp_lattice::add_value): Likewise.
+ 	(merge_agg_lats_step): Likewise.
+ 	(devirtualization_time_bonus): Likewise.
+ 	(hint_time_bonus): Likewise.
+ 	(incorporate_penalties): Likewise.
+ 	(good_cloning_opportunity_p): Likewise.
+ 	(ipcp_propagate_stage): Likewise.
+ 	* ipa-fnsummary.c (decompose_param_expr): Likewise.
+ 	(set_switch_stmt_execution_predicate): Likewise.
+ 	(analyze_function_body): Likewise.
+ 	(compute_fn_summary): Likewise.
+ 	* ipa-inline-analysis.c (estimate_growth): Likewise.
+ 	* ipa-inline.c (caller_growth_limits): Likewise.
+ 	(inline_insns_single): Likewise.
+ 	(inline_insns_auto): Likewise.
+ 	(can_inline_edge_by_limits_p): Likewise.
+ 	(want_early_inline_function_p): Likewise.
+ 	(big_speedup_p): Likewise.
+ 	(want_inline_small_function_p): Likewise.
+ 	(want_inline_self_recursive_call_p): Likewise.
+ 	(edge_badness): Likewise.
+ 	(recursive_inlining): Likewise.
+ 	(compute_max_insns): Likewise.
+ 	(early_inliner): Likewise.
+ 	* ipa-polymorphic-call.c (csftc_abort_walking_p): Likewise.
+ 	* ipa-profile.c (ipa_profile): Likewise.
+ 	* ipa-prop.c (determine_known_aggregate_parts): Likewise.
+ 	(ipa_analyze_node): Likewise.
+ 	(ipcp_transform_function): Likewise.
+ 	* ipa-split.c (consider_split): Likewise.
+ 	* ipa-sra.c (allocate_access): Likewise.
+ 	(process_scan_results): Likewise.
+ 	(ipa_sra_summarize_function): Likewise.
+ 	(pull_accesses_from_callee): Likewise.
+ 	* ira-build.c (loop_compare_func): Likewise.
+ 	(mark_loops_for_removal): Likewise.
+ 	* ira-conflicts.c (build_conflict_bit_table): Likewise.
+ 	* loop-doloop.c (doloop_optimize): Likewise.
+ 	* loop-invariant.c (gain_for_invariant): Likewise.
+ 	(move_loop_invariants): Likewise.
+ 	* loop-unroll.c (decide_unroll_constant_iterations): Likewise.
+ 	(decide_unroll_runtime_iterations): Likewise.
+ 	(decide_unroll_stupid): Likewise.
+ 	(expand_var_during_unrolling): Likewise.
+ 	* lra-assigns.c (spill_for): Likewise.
+ 	* lra-constraints.c (EBB_PROBABILITY_CUTOFF): Likewise.
+ 	* modulo-sched.c (sms_schedule): Likewise.
+ 	(DFA_HISTORY): Likewise.
+ 	* opts.c (default_options_optimization): Likewise.
+ 	(finish_options): Likewise.
+ 	(common_handle_option): Likewise.
+ 	* postreload-gcse.c (eliminate_partially_redundant_load): Likewise.
+ 	(if): Likewise.
+ 	* predict.c (get_hot_bb_threshold): Likewise.
+ 	(maybe_hot_count_p): Likewise.
+ 	(probably_never_executed): Likewise.
+ 	(predictable_edge_p): Likewise.
+ 	(predict_loops): Likewise.
+ 	(expr_expected_value_1): Likewise.
+ 	(tree_predict_by_opcode): Likewise.
+ 	(handle_missing_profiles): Likewise.
+ 	* reload.c (find_equiv_reg): Likewise.
+ 	* reorg.c (redundant_insn): Likewise.
+ 	* resource.c (mark_target_live_regs): Likewise.
+ 	(incr_ticks_for_insn): Likewise.
+ 	* sanopt.c (pass_sanopt::execute): Likewise.
+ 	* sched-deps.c (sched_analyze_1): Likewise.
+ 	(sched_analyze_2): Likewise.
+ 	(sched_analyze_insn): Likewise.
+ 	(deps_analyze_insn): Likewise.
+ 	* sched-ebb.c (schedule_ebbs): Likewise.
+ 	* sched-rgn.c (find_single_block_region): Likewise.
+ 	(too_large): Likewise.
+ 	(haifa_find_rgns): Likewise.
+ 	(extend_rgns): Likewise.
+ 	(new_ready): Likewise.
+ 	(schedule_region): Likewise.
+ 	(sched_rgn_init): Likewise.
+ 	* sel-sched-ir.c (make_region_from_loop): Likewise.
+ 	* sel-sched-ir.h (MAX_WS): Likewise.
+ 	* sel-sched.c (process_pipelined_exprs): Likewise.
+ 	(sel_setup_region_sched_flags): Likewise.
+ 	* shrink-wrap.c (try_shrink_wrapping): Likewise.
+ 	* targhooks.c (default_max_noce_ifcvt_seq_cost): Likewise.
+ 	* toplev.c (print_version): Likewise.
+ 	(process_options): Likewise.
+ 	* tracer.c (tail_duplicate): Likewise.
+ 	* trans-mem.c (tm_log_add): Likewise.
+ 	* tree-chrec.c (chrec_fold_plus_1): Likewise.
+ 	* tree-data-ref.c (split_constant_offset): Likewise.
+ 	(compute_all_dependences): Likewise.
+ 	* tree-if-conv.c (MAX_PHI_ARG_NUM): Likewise.
+ 	* tree-inline.c (remap_gimple_stmt): Likewise.
+ 	* tree-loop-distribution.c (MAX_DATAREFS_NUM): Likewise.
+ 	* tree-parloops.c (MIN_PER_THREAD): Likewise.
+ 	(create_parallel_loop): Likewise.
+ 	* tree-predcom.c (determine_unroll_factor): Likewise.
+ 	* tree-scalar-evolution.c (instantiate_scev_r): Likewise.
+ 	* tree-sra.c (analyze_all_variable_accesses): Likewise.
+ 	* tree-ssa-ccp.c (fold_builtin_alloca_with_align): Likewise.
+ 	* tree-ssa-dse.c (setup_live_bytes_from_ref): Likewise.
+ 	(dse_optimize_redundant_stores): Likewise.
+ 	(dse_classify_store): Likewise.
+ 	* tree-ssa-ifcombine.c (ifcombine_ifandif): Likewise.
+ 	* tree-ssa-loop-ch.c (ch_base::copy_headers): Likewise.
+ 	* tree-ssa-loop-im.c (LIM_EXPENSIVE): Likewise.
+ 	* tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Likewise.
+ 	(try_peel_loop): Likewise.
+ 	(tree_unroll_loops_completely): Likewise.
+ 	* tree-ssa-loop-ivopts.c (avg_loop_niter): Likewise.
+ 	(CONSIDER_ALL_CANDIDATES_BOUND): Likewise.
+ 	(MAX_CONSIDERED_GROUPS): Likewise.
+ 	(ALWAYS_PRUNE_CAND_SET_BOUND): Likewise.
+ 	* tree-ssa-loop-manip.c (can_unroll_loop_p): Likewise.
+ 	* tree-ssa-loop-niter.c (MAX_ITERATIONS_TO_TRACK): Likewise.
+ 	* tree-ssa-loop-prefetch.c (PREFETCH_BLOCK): Likewise.
+ 	(L1_CACHE_SIZE_BYTES): Likewise.
+ 	(L2_CACHE_SIZE_BYTES): Likewise.
+ 	(should_issue_prefetch_p): Likewise.
+ 	(schedule_prefetches): Likewise.
+ 	(determine_unroll_factor): Likewise.
+ 	(volume_of_references): Likewise.
+ 	(add_subscript_strides): Likewise.
+ 	(self_reuse_distance): Likewise.
+ 	(mem_ref_count_reasonable_p): Likewise.
+ 	(insn_to_prefetch_ratio_too_small_p): Likewise.
+ 	(loop_prefetch_arrays): Likewise.
+ 	(tree_ssa_prefetch_arrays): Likewise.
+ 	* tree-ssa-loop-unswitch.c (tree_unswitch_single_loop): Likewise.
+ 	* tree-ssa-math-opts.c (gimple_expand_builtin_pow): Likewise.
+ 	(convert_mult_to_fma): Likewise.
+ 	(math_opts_dom_walker::after_dom_children): Likewise.
+ 	* tree-ssa-phiopt.c (cond_if_else_store_replacement): Likewise.
+ 	(hoist_adjacent_loads): Likewise.
+ 	(gate_hoist_loads): Likewise.
+ 	* tree-ssa-pre.c (translate_vuse_through_block): Likewise.
+ 	(compute_partial_antic_aux): Likewise.
+ 	* tree-ssa-reassoc.c (get_reassociation_width): Likewise.
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_pieces): Likewise.
+ 	(vn_reference_lookup): Likewise.
+ 	(do_rpo_vn): Likewise.
+ 	* tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr): Likewise.
+ 	* tree-ssa-sink.c (select_best_block): Likewise.
+ 	* tree-ssa-strlen.c (new_stridx): Likewise.
+ 	(new_addr_stridx): Likewise.
+ 	(get_range_strlen_dynamic): Likewise.
+ 	(class ssa_name_limit_t): Likewise.
+ 	* tree-ssa-structalias.c (push_fields_onto_fieldstack): Likewise.
+ 	(create_variable_info_for_1): Likewise.
+ 	(init_alias_vars): Likewise.
+ 	* tree-ssa-tail-merge.c (find_clusters_1): Likewise.
+ 	(tail_merge_optimize): Likewise.
+ 	* tree-ssa-threadbackward.c (thread_jumps::profitable_jump_thread_path): Likewise.
+ 	(thread_jumps::fsm_find_control_statement_thread_paths): Likewise.
+ 	(thread_jumps::find_jump_threads_backwards): Likewise.
+ 	* tree-ssa-threadedge.c (record_temporary_equivalences_from_stmts_at_dest): Likewise.
+ 	* tree-ssa-uninit.c (compute_control_dep_chain): Likewise.
+ 	* tree-switch-conversion.c (switch_conversion::check_range): Likewise.
+ 	(jump_table_cluster::can_be_handled): Likewise.
+ 	* tree-switch-conversion.h (jump_table_cluster::case_values_threshold): Likewise.
+ 	(SWITCH_CONVERSION_BRANCH_RATIO): Likewise.
+ 	(param_switch_conversion_branch_ratio): Likewise.
+ 	* tree-vect-data-refs.c (vect_mark_for_runtime_alias_test): Likewise.
+ 	(vect_enhance_data_refs_alignment): Likewise.
+ 	(vect_prune_runtime_alias_test_list): Likewise.
+ 	* tree-vect-loop.c (vect_analyze_loop_costing): Likewise.
+ 	(vect_get_datarefs_in_loop): Likewise.
+ 	(vect_analyze_loop): Likewise.
+ 	* tree-vect-slp.c (vect_slp_bb): Likewise.
+ 	* tree-vectorizer.h: Likewise.
+ 	* tree-vrp.c (find_switch_asserts): Likewise.
+ 	(vrp_prop::check_mem_ref): Likewise.
+ 	* tree.c (wide_int_to_tree_1): Likewise.
+ 	(cache_integer_cst): Likewise.
+ 	* var-tracking.c (EXPR_USE_DEPTH): Likewise.
+ 	(reverse_op): Likewise.
+ 	(vt_find_locations): Likewise.
+ 
+ 2019-11-12  Martin Liska  <mliska@suse.cz>
+ 
+ 	* Makefile.in: Include params.opt.
+ 	* flag-types.h (enum parloops_schedule_type): Add
+ 	parloops_schedule_type used in params.opt.
+ 	* params.opt: New file.
+ 
+ 2019-11-12  Martin Liska  <mliska@suse.cz>
+ 
+ 	* common.opt: Remove --param and --param= options.
+ 	* opt-functions.awk: Mark CL_PARAMS for options
+ 	that have Param keyword.
+ 	* opts-common.c (decode_cmdline_options_to_array):
+ 	Replace --param key=value with --param=key=value.
+ 	* opts.c (print_filtered_help): Remove special
+ 	printing of params.
+ 	(print_specific_help): Update title for params.
+ 	(common_handle_option): Do not handle OPT__param.
+ 	opts.h (SET_OPTION_IF_UNSET): New macro.
+ 	* doc/options.texi: Document Param keyword.
+ 
+ 2019-11-12  Maciej W. Rozycki  <macro@codesourcery.com>
+ 	    Frederik Harwath  <frederik@codesourcery.com>
+ 	    Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	* gimple.h (gf_mask): Add GF_OMP_TARGET_KIND_OACC_SERIAL
+ 	enumeration constant.
+ 	(is_gimple_omp_oacc): Handle GF_OMP_TARGET_KIND_OACC_SERIAL.
+ 	(is_gimple_omp_offloaded): Likewise.
+ 	* gimplify.c (omp_region_type): Add ORT_ACC_SERIAL enumeration
+ 	constant.  Adjust the value of ORT_NONE accordingly.
+ 	(is_gimple_stmt): Handle OACC_SERIAL.
+ 	(oacc_default_clause): Handle ORT_ACC_SERIAL.
+ 	(gomp_needs_data_present): Likewise.
+ 	(gimplify_adjust_omp_clauses): Likewise.
+ 	(gimplify_omp_workshare): Handle OACC_SERIAL.
+ 	(gimplify_expr): Likewise.
+ 	* omp-expand.c (expand_omp_target):
+ 	Handle GF_OMP_TARGET_KIND_OACC_SERIAL.
+ 	(build_omp_regions_1, omp_make_gimple_edges): Likewise.
+ 	* omp-low.c (is_oacc_parallel): Rename function to...
+ 	(is_oacc_parallel_or_serial): ... this.
+ 	Handle GF_OMP_TARGET_KIND_OACC_SERIAL.
+ 	(scan_sharing_clauses): Adjust accordingly.
+ 	(scan_omp_for): Likewise.
+ 	(lower_oacc_head_mark): Likewise.
+ 	(convert_from_firstprivate_int): Likewise.
+ 	(lower_omp_target): Likewise.
+ 	(check_omp_nesting_restrictions): Handle
+ 	GF_OMP_TARGET_KIND_OACC_SERIAL.
+ 	(lower_oacc_reductions): Likewise.
+ 	(lower_omp_target): Likewise.
+ 	* tree.def (OACC_SERIAL): New tree code.
+ 	* tree-pretty-print.c (dump_generic_node): Handle OACC_SERIAL.
+ 
+ 	* doc/generic.texi (OpenACC): Document OACC_SERIAL.
+ 
+ 2019-11-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/92449
+ 	* tree-complex.c (expand_complex_multiplication): If !HONOR_NANS,
+ 	don't emit UNORDERED_EXPR guarded libcall.  Formatting fixes.
+ 
+ 	PR tree-optimization/92452
+ 	* tree-vrp.c (vrp_prop::check_array_ref): If TRUNC_DIV_EXPR folds
+ 	into NULL_TREE, set up_bound to NULL_TREE instead of computing
+ 	MINUS_EXPR on it.
+ 
+ 2019-11-12  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	* tree-vect-loop.c (vect_transform_loop): Don't overwrite epilogues
+ 	safelen with 0.
+ 
+ 2019-11-12  Alan Modra  <amodra@gmail.com>
+ 
+ 	* config/rs6000/predicates.md (unspec_tls): Allow const0_rtx for got
+ 	element of unspec vec.
+ 	* config/rs6000/rs6000.c (rs6000_legitimize_tls_address): Support
+ 	PC-relative TLS.
+ 	* config/rs6000/rs6000.md (UNSPEC_TLSTLS_PCREL): New unspec.
+ 	(tls_gd_pcrel, tls_ld_pcrel): New insns.
+ 	(tls_dtprel, tls_tprel): Set attr prefixed when tls_size is not 16.
+ 	(tls_got_tprel_pcrel, tls_tls_pcrel): New insns.
+ 
+ 2019-11-12  Alan Modra  <amodra@gmail.com>
+ 
+ 	* config/rs6000/rs6000.opt (mtls-markers): Delete.
+ 	* config/rs6000/rs6000.h (TARGET_TLS_MARKERS): Don't define.
+ 	(IS_NOMARK_TLSGETADDR): Likewise.
+ 	* config/rs6000/rs6000-protos.h (rs6000_output_tlsargs): Delete.
+ 	* config/rs6000/rs6000.c (rs6000_output_tlsargs): Delete.
+ 	(rs6000_legitimize_tls_address): Remove !TARGET_TLS_MARKERS code.
+ 	(rs6000_call_template_1): Delete TARGET_TLS_MARKERS test and
+ 	allow other UNSPECs besides UNSPEC_TLSGD and UNSPEC_TLSLD.
+ 	(rs6000_indirect_call_template_1): Likewise.
+ 	(rs6000_pltseq_template): Likewise.
+ 	(rs6000_opt_vars): Remove "tls-markers" entry.
+ 	* config/rs6000/rs6000.md (tls_gd<bits>): Replace TARGET_TLS_MARKERS
+ 	with TARGET_ELF.
+ 	(tls_gd_high<bits>, tls_gd_low<bits>): Likewise.
+ 	(tls_ld<bits>, tls_ld_high<bits>, tls_ld_low<bits>): Likewise.
+ 	(pltseq_plt_pcrel<mode>): Likewise.
+ 	(call_value_local32): Remove IS_NOMARK_TLSGETADDR predicate test.
+ 	(call_value_local64): Likewise.
+ 	(call_value_indirect_nonlocal_sysv<mode>): Remove IS_NOMARK_TLSGETADDR
+ 	output and length attribute sub-expression.
+ 	(call_value_nonlocal_sysv<mode>),
+ 	(call_value_nonlocal_sysv_secure<mode>),
+ 	(call_value_local_aix<mode>, call_value_nonlocal_aix<mode>),
+ 	(call_value_indirect_aix<mode>, call_value_indirect_elfv2<mode>),
+ 	(call_value_indirect_pcrel<mode>): Likewise.
+ 	* doc/install.texi (powerpc-*-*): Require binutils-2.20.
+ 	* configure.ac (HAVE_AS_TLS_MARKERS): Delete test.
+ 	* configure: Regenerate.
+ 	* config.in: Regenerate.
+ 
+ 2019-11-11  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/predicates.md (prefixed_memory): New predicate.
+ 	* config/rs6000/rs6000.md (stack_protect_setdi): Deal with either
+ 	address being a prefixed load/store.
+ 	(stack_protect_testdi): Deal with either address being a prefixed
+ 	load.
+ 
+ 2019-11-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR bootstrap/92433
+ 	* config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Guard
+ 	ALTIVEC_BUILTIN_VEC_VCMPGE_P argument swapping with n == 3 check.  Use
+ 	std::swap.
+ 
+ 2019-11-11  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/92420
+ 	* tree-vect-stmts.c (get_negative_load_store_type): Move further
+ 	up file.
+ 	(get_group_load_store_type): Use it for reversed SLP accesses.
+ 
+ 2019-11-11  Jan Hubicka  <hubcika@ucw.cz>
+ 
+ 	* ipa-prop.c (ipa_propagate_indirect_call_infos): Remove ipcp
+ 	summary.
+ 	(ipcp_transformation_t::duplicate): Break out from ...
+ 	(ipa_node_params_t::duplicate): ... here; add copying of agg
+ 	replacements.
+ 	* ipa-prop.h (ipcp_transformation): Add constructor and destructor.
+ 	(ipcp_transformation_t): Add duplicate.
+ 
+ 2019-11-11  Janne Blomqvist  <jb@gcc.gnu.org>
+ 
+         PR fortran/91828
+         * doc/install.texi: Document that the minimum MPFR version is
+         3.1.0.
+ 
+ 2019-11-11  Claudiu Zissulescu <claziss@gmail.com>
+ 
+ 	* config/arc/arc.md (movsi_ne): Reorder instruction variants and
+ 	use new register constraint letters.
+ 
+ 2019-11-11  Claudiu Zissulescu <claziss@gmail.com>
+ 
+ 	* config/arc/arc.c (arc_legitimize_pic_address): Consider UNSPECs
+ 	as well, if interesting recover the symbol and re-legitimize the
+ 	pic address.
+ 
+ 2019-11-11  Martin Liska  <mliska@suse.cz>
+ 
+ 	* dbgcnt.def (DEBUG_COUNTER): Sort counters
+ 	alphabetically.
+ 
+ 2019-11-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	* tree-vect-loop-manip.c (vect_do_peeling): Take epilogue gaps into
+ 	account when checking if there are enough iterations to vectorize
+ 	epilogue.
+ 
+ 2019-11-11  Tobias Burnus  <tobias@codesourcery.com>
+ 	    Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 
+ 	* langhooks-def.h (LANG_HOOKS_OMP_CHECK_OPTIONAL_ARGUMENT):
+ 	Renamed from LANG_HOOKS_OMP_IS_OPTIONAL_ARGUMENT; update define.
+ 	(LANG_HOOKS_DECLS): Rename also here.
+ 	* langhooks.h (lang_hooks_for_decls): Rename
+ 	omp_is_optional_argument to omp_check_optional_argument; take
+ 	additional bool argument.
+ 	* omp-general.h (omp_check_optional_argument): Likewise.
+ 	* omp-general.h (omp_check_optional_argument): Likewise.
+ 	* omp-low.c (lower_omp_target): Update calls; handle absent
+ 	Fortran optional arguments with USE_DEVICE_ADDR/USE_DEVICE_PTR.
+ 
+ 2019-11-11  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR target/87833
+ 	* config/i386/intelmic-mkoffload.c (prepare_target_image): Put
+ 	-fPIC and -shared the last to create offload image.
+ 
+ 2019-11-11  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	* gimplify.c (gimplify_scan_omp_clauses): Assert 'offset2' instead
+ 	of 'offset'.
+ 
+ 	* Makefile.in (LANG_CONFIGUREFRAGS): Define.
+ 	(config.status): Use/depend on it.
+ 	* configure.ac (all_lang_configurefrags): Track, 'AC_SUBST'.
+ 	* configure: Regenerate.
+ 
+ 2019-11-11  Jiufu Guo  <guojiufu@linux.ibm.com>
+ 
+ 	PR tree-optimization/88760
+ 	* config/rs6000/rs6000.opt (-munroll-only-small-loops): New option.
+ 	* common/config/rs6000/rs6000-common.c
+ 	(rs6000_option_optimization_table) [OPT_LEVELS_2_PLUS_SPEED_ONLY]:
+ 	Turn on -funroll-loops and -munroll-only-small-loops.
+ 	[OPT_LEVELS_ALL]: Turn off -fweb and -frename-registers.
+ 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Remove
+ 	set of PARAM_MAX_UNROLL_TIMES and PARAM_MAX_UNROLLED_INSNS.
+ 	Turn off -munroll-only-small-loops for explicit -funroll-loops.
+ 	(TARGET_LOOP_UNROLL_ADJUST): Add loop unroll adjust hook.
+ 	(rs6000_loop_unroll_adjust): Define it.  Use -munroll-only-small-loops.
+ 
+ 2019-11-11  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_builtin_vectorization_cost):
+ 	Make scalar_load, vector_load, unaligned_load and
+ 	vector_gather_load cost more to conform hardware latency and
+ 	insn cost settings.
+ 
+ 2019-11-10  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.h (MACHO_SYMBOL_FLAG_LINKER_VIS): New.
+ 	(MACHO_SYMBOL_LINKER_VIS_P): New.
+ 
+ 2019-11-10  Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 
+ 	* lra-spills.c (assign_spill_hard_regs): Do not spill into
+ 	registers in eliminable_regset.
+ 
+ 2019-11-10  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline.c (compute_uninlined_call_time,
+ 	compute_inlined_call_time): Take edge frequency as
+ 	parameter rather than computing it by itself.
+ 	(big_speedup_p, edge_badness): Manually CSE sreal
+ 	frequency calculations.
+ 
+ 2019-11-10  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* profile-count.c (profile_count::to_sreal_scale): Short circuit
+ 	case where profiles are same.
+ 
+ 2019-11-10  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cgraph.c (cgraph_edge::maybe_hot_p): Do not use sreal_frequency.
+ 
+ 2019-11-10  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-prop.c (ipa_propagate_indirect_call_infos): Remove ipa edge
+ 	args summaries of inlined edge unless it holds info about
+ 	described reference.
+ 
+ 2019-11-10  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (CC_any): New mode iterator.
+ 	(*movcc_internal1): Rename to...
+ 	(*movcc_<mode> for CC_any): ... this.  Support moves of all CC modes.
+ 
+ 2019-11-09  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cgraph.h (struct cgraph_node): Add ipcp_clone flag.
+ 	(cgraph_node::create_virtual_clone): Copy it.
+ 	* ipa-cp.c (ipcp_versionable_function_p): Watch for missing
+ 	summaries.
+ 	(ignore_edge_p): If caller has ipa-cp disabled, skip the edge, too.
+ 	(ipcp_verify_propagated_values): Do not verify nodes where ipcp
+ 	is disabled.
+ 	(propagate_constants_across_call): If callee is not analyzed, give up.
+ 	(propagate_constants_topo): Lower to bottom latties of all callees of
+ 	functions with ipa-cp disabled.
+ 	(ipcp_propagate_stage): Skip functions with ipa-cp disabled.
+ 	(cgraph_edge_brings_value_p): Check for availability first.
+ 	(create_specialized_node): Set ipcp_clone.
+ 	(ipcp_store_bits_results): Check that info is present.
+ 	* ipa-fnsummary.c (evaluate_properties_for_edge): Do not analyze
+ 	thunks.
+ 	(ipa_call_context::duplicate_from, ipa_call_context::equal_to): Be
+ 	conservative when callee summary is missing.
+ 	(remap_edge_summaries): Lookup call summary only when needed.
+ 	* ipa-icf.c (sem_function::param_used_p): Be ready for missing summary.
+ 	* ipa-prpo.c (ipa_alloc_node_params, ipa_initialize_node_params):
+ 	Use get_create.
+ 	(ipa_analyze_node): Use get_create.
+ 	(propagate_controlled_uses): Do not propagate when function is not
+ 	analyzed.
+ 	(ipa_propagate_indirect_call_infos): Remove summary of inline clone.
+ 	(ipa_read_node_info): Use get_create.
+ 	* ipa-prop.h (IPA_NODE_REF): Use get.
+ 	(IPA_NODE_REF_GET_CREATE): New.
+ 
+ 2019-11-09  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-fnsummary.c (evaluate_properties_for_edge): Call IPA_NODE_REF
+ 	on function symbol.
+ 
+ 2019-11-09  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree.c (fld_incomplete_type_of): Clear TYPE_FINAL_P, TYPE_EMPTY_P,
+ 	ENUM_IS_OPAQUE and ENUM_IS_SCOPED.
+ 	(free_lang_data_in_binfo): Clear TREE_PUBLIC in BINFO
+ 	(free_lang_data_in_type): Clear ENUM_IS_OPAQUE and ENUM_IS_SCOPED.
+ 
+ 2019-11-09  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline-analysis.c (do_estimate_growth_1): Add support for
+ 	capping the growth cumulated.
+ 	(offline_size): Break out from ...
+ 	(estimate_growth): ... here.
+ 	(check_callers): Add N, OFFLINE and MIN_SIZE and KNOWN_EDGE
+ 	parameters.
+ 	(growth_likely_positive): Turn to ...
+ 	(growth_positive_p): Re-implement.
+ 	* ipa-inline.h (growth_likely_positive): Remove.
+ 	(growth_positive_p): Declare.
+ 	* ipa-inline.c (want_inline_small_function_p): Use
+ 	growth_positive_p.
+ 	(want_inline_function_to_all_callers_p): Likewise.
+ 
+ 2019-11-09  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-fnsummary.c (ipa_call_context::estimate_size_and_time): Fix
+ 	calculation of min_size.
+ 	(ipa_update_overall_fn_summary): Likewise.
+ 
+ 2019-11-09  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-fnsummary.c (estimate_edge_size_and_time): Do not call
+ 	estimate_edge_devirt_benefit when not computing hints;
+ 	do not compute time when not asked for.
+ 	(estimate_calls_size_and_time): Pass NULL hints and time when
+ 	these are not computed; do not evaluate hint predicates when these are
+ 	not computed.
+ 	(ipa_merge_fn_summary_after_inlining): Do not re-evaluate edge
+ 	frequency.
+ 
+ 2019-11-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/92401
+ 	* gimple-match-head.c (gimple_resimplify1): Call const_unop only
+ 	if res_op->code is an expression with code length 1.
+ 	* gimple-match-head.c (gimple_resimplify2): Call const_binop only
+ 	if res_op->code is an expression with code length 2.
+ 	* gimple-match-head.c (gimple_resimplify3): Call fold_ternary only
+ 	if res_op->code is an expression with code length 3.
+ 
+ 2019-11-09  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (machopic_mcount_stub_name): Validate the
+ 	symbol stub name when it is created.
+ 	* config/i386/darwin.h (FUNCTION_PROFILER): Remove the symbol
+ 	stub validation.
+ 
+ 2019-11-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* symtab.c: Fix comment typos.
+ 	* cgraphunit.c: Likewise.
+ 	* cgraph.h: Likewise.
+ 	* cgraphclones.c: Likewise.
+ 	* cgraph.c: Likewise.
+ 	* varpool.c: Likewise.
+ 	* tree-ssa-strlen.c: Likewise.
+ 	* ipa-sra.c: Likewise.
+ 	(scan_expr_access, check_all_callers_for_issues): Fix typo
+ 	in a dump message.
+ 
+ 2019-11-08  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin-protos.h: Add include quard.
+ 
+ 2019-11-08  Andrew MacLeod  <amacleod@redhat.com>
+ 
+ 	* range-op.h (range_operator::fold_range): Return result in a
+ 	reference parameter instead of by value.
+ 	(range_operator::wi_fold): Same.
+ 	* range-op.cc (range_operator::wi_fold): Return result in a reference
+ 	parameter instead of by value.
+ 	(range_operator::fold_range): Same.
+ 	(value_range_from_overflowed_bounds): Same.
+ 	(value_range_with_overflow): Same
+ 	(create_possibly_reversed_range): Same.
+ 	(operator_equal::fold_range): Same.
+ 	(operator_not_equal::fold_range): Same.
+ 	(operator_lt::fold_range): Same.
+ 	(operator_le::fold_range): Same.
+ 	(operator_gt::fold_range): Same.
+ 	(operator_ge::fold_range): Same.
+ 	(operator_plus::wi_fold): Same.
+ 	(operator_plus::op1_range): Change call to fold_range.
+ 	(operator_plus::op2_range): Change call to fold_range.
+ 	(operator_minus::wi_fold): Return result via reference parameter.
+ 	(operator_minus::op1_range): Change call to fold_range.
+ 	(operator_minus::op2_range): Change call to fold_range.
+ 	(operator_min::wi_fold): Return result via reference parameter.
+ 	(operator_max::wi_fold): Same.
+ 	(cross_product_operator::wi_cross_product): Same.
+ 	(operator_mult::wi_fold): Same.
+ 	(operator_div::wi_fold): Same.
+ 	(operator_div op_floor_div): Fix whitespace.
+ 	(operator_exact_divide::op1_range): Change call to fold_range.
+ 	(operator_lshift::fold_range): Return result via reference parameter.
+ 	(operator_lshift::wi_fold): Same.
+ 	(operator_rshift::fold_range): Same.
+ 	(operator_rshift::wi_fold): Same.
+ 	(operator_cast::fold_range): Same.
+ 	(operator_cast::op1_range): Change calls to fold_range.
+ 	(operator_logical_and::fold_range): Return result via reference.
+ 	(wi_optimize_and_or): Adjust call to value_range_with_overflow.
+ 	(operator_bitwise_and::wi_fold): Return result via reference.
+ 	(operator_logical_or::fold_range): Same.
+ 	(operator_bitwise_or::wi_fold): Same.
+ 	(operator_bitwise_xor::wi_fold): Same.
+ 	(operator_trunc_mod::wi_fold): Same.
+ 	(operator_logical_not::fold_range): Same.
+ 	(operator_bitwise_not::fold_range): Same.
+ 	(operator_bitwise_not::op1_range): Change call to fold_range.
+ 	(operator_cst::fold_range): Return result via reference.
+ 	(operator_identity::fold_range): Same.
+ 	(operator_abs::wi_fold): Same.
+ 	(operator_absu::wi_fold): Same.
+ 	(operator_negate::fold_range): Same.
+ 	(operator_negate::op1_range): Change call to fold_range.
+ 	(operator_addr_expr::fold_range): Return result via reference.
+ 	(operator_addr_expr::op1_range): Change call to fold_range.
+ 	(operator_pointer_plus::wi_fold): Return result via reference.
+ 	(operator_pointer_min_max::wi_fold): Same.
+ 	(operator_pointer_and::wi_fold): Same.
+ 	(operator_pointer_or::wi_fold): Same.
+ 	(range_op_handler): Change call to fold_range.
+ 	(range_cast): Same.
+ 	* tree-vrp.c (range_fold_binary_symbolics_p): Change call to
+ 	fold_range.
+ 	(range_fold_unary_symbolics_p): Same.
+ 	(range_fold_binary_expr): Same.
+ 	(range_fold_unary_expr): Same.
+ 
+ 2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-loop.c (neutral_op_for_slp_reduction): Take the
+ 	vector type as an argument rather than reading it from the
+ 	stmt_vec_info.
+ 	(vect_create_epilog_for_reduction): Update accordingly.
+ 	(vectorizable_reduction): Likewise.
+ 	(vect_transform_cycle_phi): Likewise.
+ 
+ 2019-11-08  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/predicates.md (branch_comparison_operator): Allow only
+ 	the comparison codes that make sense for the mode used, and only the
+ 	codes that can be done with a single branch instruction.
+ 
+ 2019-11-08  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	PR tree-optimization/92351
+ 	* tree-vect-data-refs.c (vect_compute_data_ref_alignment): When we are
+ 	peeling the main loop for alignment, make sure to set the misalignment
+ 	of the epilogue's data references to DR_MISALIGNMENT_UNKNOWN.
+ 
+ 2019-11-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	* dbgcnt.def (ivopts_loop): Add.
+ 	* tree-ssa-loop-ivopts.c (tree_ssa_iv_optimize): Check
+ 	ivopts_loop before optimizing a loop.
+ 
+ 2019-11-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR ipa/92409
+ 	* tree-inline.c (declare_return_variable): Properly handle
+ 	type mismatches for the return slot.
+ 
+ 2019-11-08  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR target/92095
+ 	* config/sparc/sparc-protos.h (output_load_pcrel_sym): Declare.
+ 	* config/sparc/sparc.c (sparc_cannot_force_const_mem): Revert latest
+  	change.
+ 	(got_helper_needed): New static variable.
+ 	(output_load_pcrel_sym): New function.
+ 	(get_pc_thunk_name): Remove after inlining...
+ 	(load_got_register): ...here.  Rework the initialization of the GOT
+ 	register and of the GOT helper.
+ 	(save_local_or_in_reg_p): Test the REGNO of the GOT register.
+ 	(sparc_file_end): Test got_helper_needed to decide whether the GOT
+ 	helper must be emitted.  Use output_asm_insn instead of fprintf.
+ 	(sparc_init_pic_reg): In PIC mode, always initialize the PIC register
+ 	if optimization is enabled.
+ 	* config/sparc/sparc.md (load_pcrel_sym<P:mode>): Emit the assembly
+ 	by calling output_load_pcrel_sym.
+ 
+ 2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-sra.c (create_access): Delay disqualifying the base
+ 	for poly_int values until we know we have a base.
+ 
+ 2019-11-08  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	* tree-vect-loop.c (vect_analyze_loop): Disable epilogue vectorization
+ 	for loops with SIMDUID set.  Enable epilogue vectorization for loops
+ 	with SIMDLEN set after finding a main loop with a VF that matches it.
+ 
+ 2019-11-08  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/92038
+ 	* gimple-ssa-store-merging.c (find_constituent_stores): For return
+ 	value only, return non-NULL if there is a single non-clobber
+ 	constituent store even if there are constituent clobbers and return
+ 	one of clobber constituent stores if all constituent stores are
+ 	clobbers.
+ 	(split_group): Handle clobbers.
+ 	(imm_store_chain_info::output_merged_store): When computing
+ 	bzero_first, look after all clobbers at the start.  Don't count
+ 	clobber stmts in orig_num_stmts, except if the first orig store is
+ 	a clobber covering the whole area and split_stores cover the whole
+ 	area, consider equal number of stmts ok.  Punt if split_stores
+ 	contains only ->orig stores and their number plus number of original
+ 	clobbers is equal to original number of stmts.  For ->orig, look past
+ 	clobbers in the constituent stores.
+ 	(imm_store_chain_info::output_merged_stores): Don't remove clobber
+ 	stmts.
+ 	(rhs_valid_for_store_merging_p): Don't return false for clobber stmt
+ 	rhs.
+ 	(store_valid_for_store_merging_p): Allow clobber stmts.
+ 	(verify_clear_bit_region_be): Fix up a thinko in function comment.
+ 
+ 	PR c++/92384
+ 	* function.c (assign_parm_setup_block, assign_parm_setup_stack): Don't
+ 	copy TYPE_EMPTY_P arguments from data->entry_parm to data->stack_parm
+ 	slot.
+ 	(assign_parms): For TREE_ADDRESSABLE parms with TYPE_EMPTY_P type
+ 	force creation of a unique data.stack_parm slot.
+ 
+ 2019-11-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	* genmatch.c (expr::gen_transform): Use the resimplify
+ 	member function instead of hard-coding the gimple_resimplifyN variant.
+ 	(dt_simplify::gen_1): Likewise.
+ 
+ 2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-ssa-sccvn.c (copy_reference_ops_from_ref): Handle
+ 	POLY_INT_CST.
+ 
+ 2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-inline.c (declare_return_variable): Check for poly_int_tree_p
+ 	instead of INTEGER_CST.
+ 
+ 2019-11-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92324
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): Use
+ 	STMT_VINFO_REDUC_VECTYPE for all computations, inserting
+ 	sign-conversions as necessary.
+ 	(vectorizable_reduction): Reject conversions in the chain
+ 	that are not sign-conversions, base analysis on a non-converting
+ 	stmt and its operation sign.  Set STMT_VINFO_REDUC_VECTYPE.
+ 	* tree-vect-stmts.c (vect_stmt_relevant_p): Don't dump anything
+ 	for debug stmts.
+ 	* tree-vectorizer.h (_stmt_vec_info::reduc_vectype): New.
+ 	(STMT_VINFO_REDUC_VECTYPE): Likewise.
+ 
+ 2019-11-08  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/92055
+ 	* config/avr/avr.opt (-mdouble=, -mlong-double=):
+ 	Fix a missing '-' when displaying these options in the
+ 	help screen.
+ 
+ 2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (SVE_BH, SVE_BHS): Delete.
+ 
+ 2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-builtins.c
+ 	(aarch64_builtin_vectorized_function): Remove bswap handling.
+ 
+ 2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-core.h (tree_type_common::indivisible_p): New member variable.
+ 	* tree.h (TYPE_INDIVISIBLE_P): New macro.
+ 	* config/aarch64/aarch64-sve-builtins.cc (register_builtin_types):
+ 	Treat the vector types as indivisible.
+ 
+ 2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* optabs.def (gather_load_optab, mask_gather_load_optab)
+ 	(scatter_store_optab, mask_scatter_store_optab): Turn into
+ 	conversion optabs, with the offset mode given explicitly.
+ 	* doc/md.texi: Update accordingly.
+ 	* config/aarch64/aarch64-sve-builtins-base.cc
+ 	(svld1_gather_impl::expand): Likewise.
+ 	(svst1_scatter_impl::expand): Likewise.
+ 	* internal-fn.c (gather_load_direct, scatter_store_direct): Likewise.
+ 	(expand_scatter_store_optab_fn): Likewise.
+ 	(direct_gather_load_optab_supported_p): Likewise.
+ 	(direct_scatter_store_optab_supported_p): Likewise.
+ 	(expand_gather_load_optab_fn): Likewise.  Expect the mask argument
+ 	to be argument 4.
+ 	(internal_fn_mask_index): Return 4 for IFN_MASK_GATHER_LOAD.
+ 	(internal_gather_scatter_fn_supported_p): Replace the offset sign
+ 	argument with the offset vector type.  Require the two vector
+ 	types to have the same number of elements but allow their element
+ 	sizes to be different.  Treat the optabs as conversion optabs.
+ 	* internal-fn.h (internal_gather_scatter_fn_supported_p): Update
+ 	prototype accordingly.
+ 	* optabs-query.c (supports_at_least_one_mode_p): Replace with...
+ 	(supports_vec_convert_optab_p): ...this new function.
+ 	(supports_vec_gather_load_p): Update accordingly.
+ 	(supports_vec_scatter_store_p): Likewise.
+ 	* tree-vectorizer.h (vect_gather_scatter_fn_p): Take a vec_info.
+ 	Replace the offset sign and bits parameters with a scalar type tree.
+ 	* tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
+ 	Pass back the offset vector type instead of the scalar element type.
+ 	Allow the offset to be wider than the memory elements.  Search for
+ 	an offset type that the target supports, stopping once we've
+ 	reached the maximum of the element size and pointer size.
+ 	Update call to internal_gather_scatter_fn_supported_p.
+ 	(vect_check_gather_scatter): Update calls accordingly.
+ 	When testing a new scale before knowing the final offset type,
+ 	check whether the scale is supported for any signed or unsigned
+ 	offset type.  Check whether the target supports the source and
+ 	target types of a conversion before deciding whether to look
+ 	through the conversion.  Record the chosen offset_vectype.
+ 	* tree-vect-patterns.c (vect_get_gather_scatter_offset_type): Delete.
+ 	(vect_recog_gather_scatter_pattern): Get the scalar offset type
+ 	directly from the gs_info's offset_vectype instead.  Pass a zero
+ 	of the result type to IFN_GATHER_LOAD and IFN_MASK_GATHER_LOAD.
+ 	* tree-vect-stmts.c (check_load_store_masking): Update call to
+ 	internal_gather_scatter_fn_supported_p, passing the offset vector
+ 	type recorded in the gs_info.
+ 	(vect_truncate_gather_scatter_offset): Update call to
+ 	vect_check_gather_scatter, leaving it to search for a valid
+ 	offset vector type.
+ 	(vect_use_strided_gather_scatters_p): Convert the offset to the
+ 	element type of the gs_info's offset_vectype.
+ 	(vect_get_gather_scatter_ops): Get the offset vector type directly
+ 	from the gs_info.
+ 	(vect_get_strided_load_store_ops): Likewise.
+ 	(vectorizable_load): Pass a zero of the result type to IFN_GATHER_LOAD
+ 	and IFN_MASK_GATHER_LOAD.
+ 	* config/aarch64/aarch64-sve.md (gather_load<mode>): Rename to...
+ 	(gather_load<mode><v_int_equiv>): ...this.
+ 	(mask_gather_load<mode>): Rename to...
+ 	(mask_gather_load<mode><v_int_equiv>): ...this.
+ 	(scatter_store<mode>): Rename to...
+ 	(scatter_store<mode><v_int_equiv>): ...this.
+ 	(mask_scatter_store<mode>): Rename to...
+ 	(mask_scatter_store<mode><v_int_equiv>): ...this.
+ 
+ 2019-11-08  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	PR target/92132
+ 	* config/rs6000/predicates.md
+ 	(signed_or_equality_comparison_operator): New predicate.
+ 	(unsigned_or_equality_comparison_operator): Likewise.
+ 	* config/rs6000/rs6000.md (one_cmpl<mode>2): Remove expand.
+ 	(one_cmpl<mode>3_internal): Rename to one_cmpl<mode>2.
+ 	* config/rs6000/vector.md
+ 	(vcond_mask_<mode><mode> for VEC_I and VEC_I): New expand.
+ 	(vec_cmp<mode><mode> for VEC_I and VEC_I): Likewise.
+ 	(vec_cmpu<mode><mode> for VEC_I and VEC_I): Likewise.
+ 	(vcond_mask_<mode><VEC_int> for VEC_F): New expand for float
+ 	vector modes and same-size integer vector modes.
+ 	(vec_cmp<mode><VEC_int> for VEC_F): Likewise.
+ 	(vector_lt<mode> for VEC_F): New expand.
+ 	(vector_le<mode> for VEC_F): Likewise.
+ 	(vector_ne<mode> for VEC_F): Likewise.
+ 	(vector_unge<mode> for VEC_F): Likewise.
+ 	(vector_ungt<mode> for VEC_F): Likewise.
+ 	(vector_unle<mode> for VEC_F): Likewise.
+ 	(vector_unlt<mode> for VEC_F): Likewise.
+ 	(vector_uneq<mode>): Expose name.
+ 	(vector_ltgt<mode>): Likewise.
+ 	(vector_unordered<mode>): Likewise.
+ 	(vector_ordered<mode>): Likewise.
+ 
+ 2019-11-08  Hongtao Liu  <Hongtao.liu@intel.com>
+ 
+ 	PR target/92295
+ 	* config/i386/i386-expand.c (ix86_expand_vector_init_concat)
+ 	Enhance ix86_expand_vector_init_concat.
+ 
+ 2019-11-08  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* doc/invoke.texi (-Wold-style-definition): Document () not being
+ 	considered an old-style definition for C2x.
+ 
+ 2019-11-07  John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	* config/pa/pa.md (memory_barrier): Revise to use ldcw barriers.
+ 	Enhance comment.
+ 	(memory_barrier_coherent, memory_barrier_64, memory_barrier_32): New
+ 	insn patterns using ldcw instruction.
+ 	(memory_barrier): Remove insn pattern using sync instruction.
+ 	* config/pa/pa.opt (coherent-ldcw): New option.
+ 	(ordered): New option.
+ 
+ 2019-11-07  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.c (validate_condition_mode): Don't assert for
+ 	valid conditions.
+ 
+ 2019-11-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* ipa-utils.c (ipa_merge_profiles): Fix fprintf format string
+ 	typo - mistmatch -> mismatch.
+ 	* ipa-profile.c (ipa_profile): Likewise.
+ 	* ipa-devirt.c (compare_virtual_tables): Fix a comment typo
+ 	- mistmatch -> mismatch.
+ 
+ 2018-11-07  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* simplify-rtx.c (comparison_to_mask): New function.
+ 	(mask_to_comparison): New function.
+ 	(simplify_logical_relational_operation): New function.
+ 	(simplify_binary_operation_1): Call
+ 	simplify_logical_relational_operation.
+ 
+ 2019-11-07  Peter Bergner <bergner@linux.ibm.com>
+ 
+ 	PR other/92090
+ 	* config/rs6000/predicates.md (input_operand): Allow MODE_PARTIAL_INT
+ 	modes for integer constants.
+ 
+ 2019-11-07  Jan Hubicka  <jh@suse.cz>
+ 
+ 	PR ipa/92406
+ 	* ipa-fnsummary.c (analyze_function_body): Use get_create to copy
+ 	summary.
+ 
+ 2019-11-07  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* optc-save-gen.awk: Generate cl_target_option_free
+ 	and cl_optimization_option_free.
+ 	* opth-en.awk: Declare cl_target_option_free
+ 	and cl_optimization_option_free.
+ 	* tree.c (free_node): Use it.
+ 
+ 2019-11-06  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* lto-streamer-in.c: Include alloc-pool.h.
+ 	(freeing_string_slot_hasher): Remove.
+ 	(string_slot_allocator): New object allocator.
+ 	(file_name_hash_table): Turn to hash_table<string_slot_hasher>.
+ 	(file_name_obstack): New obstack.
+ 	(canon_file_name): Allocate in obstack and allocator.
+ 	(lto_reader_init): Initialize obstack and allocator.
+ 	(lto_free_file_name_hash): New function.
+ 	* lto-streamer.h (lto_free_file_name_hash): New.
+ 
+ 2019-11-07  Feng Xue  <fxue@os.amperecomputing.com>
+ 
+ 	PR tree-optimization/89134
+ 	* doc/invoke.texi (min-loop-cond-split-prob): Document new --params.
+ 	* params.def: Add min-loop-cond-split-prob.
+ 	* tree-ssa-loop-split.c (split_loop): Remove niter parameter, move some
+ 	outside checks on loop into the function.
+ 	(split_info): New class.
+ 	(find_vdef_in_loop, get_control_equiv_head_block): New functions.
+ 	(find_control_dep_blocks, vuse_semi_invariant_p): Likewise.
+ 	(ssa_semi_invariant_p, loop_iter_phi_semi_invariant_p): Likewise.
+ 	(control_dep_semi_invariant_p, stmt_semi_invariant_p_1): Likewise.
+ 	(stmt_semi_invariant_p, branch_removable_p): Likewise.
+ 	(get_cond_invariant_branch, compute_added_num_insns): Likewise.
+ 	(get_cond_branch_to_split_loop, do_split_loop_on_cond): Likewise.
+ 	(split_loop_on_cond): Likewise.
+ 	(tree_ssa_split_loops): Add loop split on conditional statement.
+ 
+ 2019-11-07  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390.md ("*cstorecc<mode>_z13"): New insn_and_split
+ 	pattern.
+ 
+ 2019-11-07  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92405
+ 	* tree-vect-loop.c (vectorizable_reduction): Appropriately
+ 	restrict lane-reducing ops to single stmt chains.
+ 
+ 2019-11-07  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR lto/70929
+ 	* cif-code.def (MISMATCHED_ARGUMENTS): Removed.
+ 	* cgraph.h (gimple_check_call_matching_types): Remove
+ 	* cgraph.c (gimple_check_call_args): Likewise.
+ 	(gimple_check_call_matching_types): Likewise.
+ 	(symbol_table::create_edge): Do not call
+ 	gimple_check_call_matching_types.
+ 	(cgraph_edge::make_direct): Likewise.
+ 	(cgraph_edge::redirect_call_stmt_to_callee): Likewise.
+ 	* value-prof.h (check_ic_target): Remove.
+ 	* value-prof.c (check_ic_target): Remove.
+ 	(gimple_ic_transform): Do nat call check_ic_target.
+ 	* auto-profile.c (function_instance::find_icall_target_map): Likewise.
+ 	(afdo_indirect_call): Likewise.
+ 	* ipa-prop.c (update_indirect_edges_after_inlining): Do not call
+ 	gimple_check_call_matching_types.
+ 	* ipa-inline.c (early_inliner): Likewise.
+ 
+ 2019-11-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/arm.md (arm_<simd32_op>): New define_expand.
+ 	(arm_<simd32_op><add_clobber_q_name>_insn): New define_insn.
+ 	* config/arm/arm_acle.h (__ssat16, __usat16): Define.
+ 	* config/arm/arm_acle_builtins.def: Define builtins for the above.
+ 	* config/arm/iterators.md (USSAT16): New int_iterator.
+ 	(simd32_op): Handle UNSPEC_SSAT16, UNSPEC_USAT16.
+ 	(sup): Likewise.
+ 	* config/arm/predicates.md (ssat16_imm): New predicate.
+ 	(usat16_imm): Likewise.
+ 	* config/arm/unspecs.md (UNSPEC_SSAT16, UNSPEC_USAT16): Define.
+ 
+ 2019-11-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/arm.md (arm_<simd32_op><add_clobber_q_name>_insn):
+ 	New define_insns.
+ 	(arm_<simd32_op>): New define_expands.
+ 	* config/arm/arm_acle.h (__smlad, __smladx, __smlsd, __smlsdx,
+ 	__smuad, __smuadx): Define.
+ 	* config/arm/arm_acle_builtins.def: Define builtins for the above.
+ 	* config/arm/iterators.md (SIMD32_TERNOP_Q): New int_iterator.
+ 	(SIMD32_BINOP_Q): Likewise.
+ 	(simd32_op): Handle the above.
+ 	* config/arm/unspecs.md: Define unspecs for the above.
+ 
+ 2019-11-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/aout.h (REGISTER_NAMES): Add apsrge.
+ 	* config/arm/arm.md (APSRGE_REGNUM): Define.
+ 	(arm_<simd32_op>): New define_insn.
+ 	(arm_sel): Likewise.
+ 	* config/arm/arm.h (FIXED_REGISTERS): Add entry for apsrge.
+ 	(CALL_USED_REGISTERS): Likewise.
+ 	(REG_ALLOC_ORDER): Likewise.
+ 	(FIRST_PSEUDO_REGISTER): Update value.
+ 	(ARM_GE_BITS_READ): Define.
+ 	* config/arm/arm.c (arm_conditional_register_usage): Clear
+ 	APSRGE_REGNUM from operand_reg_set.
+ 	(arm_ge_bits_access): Define.
+ 	* config/arm/arm-builtins.c (arm_check_builtin_call): Handle
+ 	ARM_BUIILTIN_sel.
+ 	* config/arm/arm-protos.h (arm_ge_bits_access): Declare prototype.
+ 	* config/arm/arm-fixed.md (add<mode>3): Convert to define_expand.
+ 	FAIL if ARM_GE_BITS_READ.
+ 	(*arm_add<mode>3): New define_insn.
+ 	(sub<mode>3): Convert to define_expand.  FAIL if ARM_GE_BITS_READ.
+ 	(*arm_sub<mode>3): New define_insn.
+ 	* config/arm/arm_acle.h (__sel, __sadd8, __ssub8, __uadd8, __usub8,
+ 	__sadd16, __sasx, __ssax, __ssub16, __uadd16, __uasx, __usax,
+ 	__usub16): Define.
+ 	* config/arm/arm_acle_builtins.def: Define builtins for the above.
+ 	* config/arm/iterators.md (SIMD32_GE): New int_iterator.
+ 	(simd32_op): Handle the above.
+ 	* config/arm/unspecs.md (UNSPEC_GE_SET): Define.
+ 	(UNSPEC_SEL, UNSPEC_SADD8, UNSPEC_SSUB8, UNSPEC_UADD8, UNSPEC_USUB8,
+ 	UNSPEC_SADD16, UNSPEC_SASX, UNSPEC_SSAX, UNSPEC_SSUB16, UNSPEC_UADD16,
+ 	UNSPEC_UASX, UNSPEC_USAX, UNSPEC_USUB16): Define.
+ 
+ 2019-11-07  Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/arm.md (arm_smlabb_setq): New define_insn.
+ 	(arm_smlabb): New define_expand.
+ 	(*maddhisi4tb): Rename to...
+ 	(maddhisi4tb): ... This.
+ 	(*maddhisi4tt): Rename to...
+ 	(maddhisi4tt): ... This.
+ 	(arm_smlatb_setq): New define_insn.
+ 	(arm_smlatb): New define_expand.
+ 	(arm_smlatt_setq): New define_insn.
+ 	(arm_smlatt): New define_expand.
+ 	(arm_<smlaw_op><add_clobber_name>_insn): New define_insn.
+ 	(arm_<smlaw_op>): New define_expand.
+ 	* config/arm/arm_acle.h (__smlabb, __smlatb, __smlabt, __smlatt,
+ 	__smlawb, __smlawt): Define.
+ 	* config/arm_acle_builtins.def: Define builtins for the above.
+ 	* config/arm/iterators.md (SMLAWBT): New int_iterator.
+ 	(slaw_op): New int_attribute.
+ 	* config/arm/unspecs.md (UNSPEC_SMLAWB, UNSPEC_SMLAWT): Define.
+ 
+ 2019-11-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/arm.md (arm_<ss_op>): New define_expand.
+ 	(arm_<ss_op><add_clobber_q_name>_insn): New define_insn.
+ 	* config/arm/arm_acle.h (__qadd, __qsub, __qdbl): Define.
+ 	* config/arm/arm_acle_builtins.def: Add builtins for qadd, qsub.
+ 	* config/arm/iterators.md (SSPLUSMINUS): New code iterator.
+ 	(ss_op): New code_attr.
+ 
+ 2019-11-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/aout.h (REGISTER_NAMES): Add apsrq.
+ 	* config/arm/arm.md (APSRQ_REGNUM): Define.
+ 	(add_setq): New define_subst.
+ 	(add_clobber_q_name): New define_subst_attr.
+ 	(add_clobber_q_pred): Likewise.
+ 	(maddhisi4): Change to define_expand.  Split into mult and add if
+ 	ARM_Q_BIT_READ.
+ 	(arm_maddhisi4): New define_insn.
+ 	(*maddhisi4tb): Disable for ARM_Q_BIT_READ.
+ 	(*maddhisi4tt): Likewise.
+ 	(arm_ssat): New define_expand.
+ 	(arm_usat): Likewise.
+ 	(arm_get_apsr): New define_insn.
+ 	(arm_set_apsr): Likewise.
+ 	(arm_saturation_occurred): New define_expand.
+ 	(arm_set_saturation): Likewise.
+ 	(*satsi_<SAT:code>): Rename to...
+ 	(satsi_<SAT:code><add_clobber_q_name>): ... This.
+ 	(*satsi_<SAT:code>_shift): Disable for ARM_Q_BIT_READ.
+ 	* config/arm/arm.h (FIXED_REGISTERS): Mark apsrq as fixed.
+ 	(CALL_USED_REGISTERS): Mark apsrq.
+ 	(FIRST_PSEUDO_REGISTER): Update value.
+ 	(REG_ALLOC_ORDER): Add APSRQ_REGNUM.
+ 	(machine_function): Add q_bit_access.
+ 	(ARM_Q_BIT_READ): Define.
+ 	* config/arm/arm.c (TARGET_CHECK_BUILTIN_CALL): Define.
+ 	(arm_conditional_register_usage): Clear APSRQ_REGNUM from
+ 	operand_reg_set.
+ 	(arm_q_bit_access): Define.
+ 	* config/arm/arm-builtins.c: Include stringpool.h.
+ 	(arm_sat_binop_imm_qualifiers,
+ 	arm_unsigned_sat_binop_unsigned_imm_qualifiers,
+ 	arm_sat_occurred_qualifiers, arm_set_sat_qualifiers): Define.
+ 	(SAT_BINOP_UNSIGNED_IMM_QUALIFIERS,
+ 	UNSIGNED_SAT_BINOP_UNSIGNED_IMM_QUALIFIERS, SAT_OCCURRED_QUALIFIERS,
+ 	SET_SAT_QUALIFIERS): Likewise.
+ 	(arm_builtins): Define ARM_BUILTIN_SAT_IMM_CHECK.
+ 	(arm_init_acle_builtins): Initialize __builtin_sat_imm_check.
+ 	Handle 0 argument expander.
+ 	(arm_expand_acle_builtin): Handle ARM_BUILTIN_SAT_IMM_CHECK.
+ 	(arm_check_builtin_call): Define.
+ 	* config/arm/arm.md (ssmulsa3, usmulusa3, usmuluha3,
+ 	arm_ssatsihi_shift, arm_usatsihi): Disable when ARM_Q_BIT_READ.
+ 	* config/arm/arm-protos.h (arm_check_builtin_call): Declare prototype.
+ 	(arm_q_bit_access): Likewise.
+ 	* config/arm/arm_acle.h (__ssat, __usat, __ignore_saturation,
+ 	__saturation_occurred, __set_saturation_occurred): Define.
+ 	* config/arm/arm_acle_builtins.def: Define builtins for ssat, usat,
+ 	saturation_occurred, set_saturation_occurred.
+ 	* config/arm/unspecs.md (UNSPEC_Q_SET): Define.
+ 	(UNSPEC_APSR_READ): Likewise.
+ 	(VUNSPEC_APSR_WRITE): Likewise.
+ 	* config/arm/arm-fixed.md (ssadd<mode>3): Convert to define_expand.
+ 	(*arm_ssadd<mode>3): New define_insn.
+ 	(sssub<mode>3): Convert to define_expand.
+ 	(*arm_sssub<mode>3): New define_insn.
+ 	(ssmulsa3): Convert to define_expand.
+ 	(*arm_ssmulsa3): New define_insn.
+ 	(usmulusa3): Convert to define_expand.
+ 	(*arm_usmulusa3): New define_insn.
+ 	(ssmulha3): FAIL if ARM_Q_BIT_READ.
+ 	(arm_ssatsihi_shift, arm_usatsihi): Disable for ARM_Q_BIT_READ.
+ 	* config/arm/iterators.md (qaddsub_clob_q): New mode attribute.
+ 
+ 2019-11-07  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR c++/92354
+ 	* cgraph.c (delete_function_version): Clear global
+ 	variable version_info_node if equal to deleted
+ 	function.
+ 
+ 2019-11-07  Martin Liska  <mliska@suse.cz>
+ 
+ 	* fold-const.c (operand_compare::operand_equal_p): Add comparison
+ 	of CONSTRUCTOR_NO_CLEARING.
+ 	(operand_compare::hash_operand): Likewise.
+ 
+ 2019-11-07  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Support 64-bit double and 64-bit long double configurations.
+ 
+ 	PR target/92055
+ 	* config.gcc (tm_defines) [avr]: Set from --with-double=,
+ 	--with-long-double=.
+ 	* config/avr/t-multilib: Remove.
+ 	* config/avr/t-avr: Output of genmultilib.awk is now fully
+ 	dynamically generated and no more part of the repo.
+ 	(HAVE_DOUBLE_MULTILIB, HAVE_LONG_DOUBLE_MULTILIB): New variables.
+ 	Pass them down to...
+ 	* config/avr/genmultilib.awk: ...here and handle them.
+ 	* config/avr/avr.opt (-mdouble=, avr_double). New option and var.
+ 	(-mlong-double=, avr_long_double). New option and var.
+ 	* common/config/avr/avr-common.c (opts.h, diagnostic.h): Include.
+ 	(TARGET_OPTION_OPTIMIZATION_TABLE) <-mdouble=, -mlong-double=>:
+ 	Set default as requested by --with-double=
+ 	(TARGET_HANDLE_OPTION): Define to this...
+ 	(avr_handle_option): ...new hook worker.
+ 	* config/avr/avr.h (DOUBLE_TYPE_SIZE): Define to avr_double.
+ 	(LONG_DOUBLE_TYPE_SIZE): Define to avr_long_double.
+ 	(avr_double_lib): New proto for spec function.
+ 	(EXTRA_SPEC_FUNCTIONS) <double-lib>: Add.
+ 	(DRIVER_SELF_SPECS): Call %:double-lib.
+ 	* config/avr/avr.c (avr_option_override): Assert
+ 	sizeof(long double) >= sizeof(double) for the target.
+ 	* config/avr/avr-c.c (avr_cpu_cpp_builtins)
+ 	[__HAVE_DOUBLE_MULTILIB__, __HAVE_LONG_DOUBLE_MULTILIB__]
+ 	[__HAVE_DOUBLE64__, __HAVE_DOUBLE32__, __DEFAULT_DOUBLE__=]
+ 	[__HAVE_LONG_DOUBLE64__, __HAVE_LONG_DOUBLE32__]
+ 	[__HAVE_LONG_DOUBLE_IS_DOUBLE__, __DEFAULT_LONG_DOUBLE__=]:
+ 	New built-in define depending on --with-double=, --with-long-double=.
+ 	* config/avr/driver-avr.c (avr_double_lib): New spec function.
+ 	* doc/invoke.tex (AVR Options) <-mdouble=,-mlong-double=>: Doc.
+ 	* doc/install.texi (Cross-Compiler-Specific Options)
+ 	<--with-double=, --with-long-double=>: Doc.
+ 
+ 2019-11-07  Richard Biener  <rguenther@suse.de>
+ 
+ 	* dbgcnt.def (gimple_unroll): New.
+ 	* tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Check
+ 	gimple_unroll debug counter before applying transform.
+ 	(try_peel_loop): Likewise.
+ 
+ 2019-11-07  Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 
+ 	* ira.c (setup_alloc_regs): Setup no_unit_alloc_regs for
+ 	frame pointer in multiple registers.
+ 	(ira_setup_eliminable_regset): Setup eliminable_regset,
+ 	ira_no_alloc_regs and regs_ever_live for frame pointer in
+ 	multiple registers.
+ 
+ 2019-11-06  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+ 
+ 	* config/rs6000/vsx.md (xxswapd_<mode>): Add support for V2DF and
+ 	V2DI modes.
+ 
+ 2019-11-06  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ggc-common.c (ggc_prune_overhead_list): Do not delete surviving
+ 	allocations.
+ 	* mem-stats.h (mem_alloc_description<T>::release_object_overhead):
+ 	Do not silently ignore summary corruptions.
+ 
+ 2019-11-06  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-loop.c (vect_analyze_loop): Only try to vectorize
+ 	the epilogue if there are peeled iterations for it to handle.
+ 
+ 2019-11-06  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.c (arc_split_ior): Add asserts.
+ 	(arc_split_mov_const): Likewise.
+ 	(arc_check_ior_const): Do not match known short immediate values.
+ 	* config/arc/arc.md (movsi): Don't split predicated instructions
+ 	(iorsi): Likewise.
+ 
+ 2019-11-06  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.opt (mea): Update help string.
+ 	* doc/invoke.texi(ARC): Update mea option info.
+ 
+ 2019-11-06  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.md (zero_extendqihi2_i): Cleanup pattern.
+ 	(zero_extendqisi2_ac): Likewise.
+ 	(zero_extendhisi2_i): Likewise.
+ 	(extendqihi2_i): Likewise.
+ 	(extendqisi2_ac): Likewise.
+ 	(extendhisi2_i): Likewise.
+ 
+ 2019-11-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (vectorizable_reduction): Remember reduction
+ 	PHI.  Use STMT_VINFO_REDUC_IDX to skip the reduction operand.
+ 	Simplify single_defuse_cycle condition.
+ 
+ 2019-11-06  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-loop.c (vect_analyze_loop_2): When vectorizing an
+ 	epilogue loop, make sure that the VF is small enough or that
+ 	the epilogue loop can be fully-masked.
+ 
+ 2019-11-06  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-loop.c (vect_analyze_loop): Break out of the main
+ 	loop when we've finished, rather than returning directly from
+ 	the loop.  Use a local variable to track whether we're still
+ 	searching for the preferred simdlen.  Make vect_epilogues
+ 	record whether the next iteration should try to treat the
+ 	loop as an epilogue.
+ 
+ 2019-11-06  Vineet Gupta  <vgupta@synopsys.com>
+ 
+ 	* config/arc/arc-c.c (arc_cpu_cpp_builtins) : Add
+ 	__arc_hard_float__, __ARC_HARD_FLOAT__,
+ 	__arc_soft_float__, __ARC_SOFT_FLOAT__
+ 
+ 2019-11-06  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	PR tree-optimization/92317
+ 	* tree-vect-loop-manip.c (slpeel_update_phi_nodes_for_guard2): Also
+ 	update phi's with constant phi arguments.
+ 
+ 2019-11-06  Eric Botcazou  <ebotcazou@adacore.com>
+ 	    Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	* common.opt (-fcallgraph-info[=]): New option.
+ 	* doc/invoke.texi (Developer options): Document it.
+ 	* opts.c (common_handle_option): Handle it.
+ 	* builtins.c (expand_builtin_alloca): Record allocation if
+ 	-fcallgraph-info=da.
+ 	* calls.c (expand_call): If -fcallgraph-info, record the call.
+ 	(emit_library_call_value_1): Likewise.
+ 	* flag-types.h (enum callgraph_info_type): New type.
+ 	* explow.c: Include stringpool.h.
+ 	(set_stack_check_libfunc): Set SET_SYMBOL_REF_DECL on the symbol.
+ 	* function.c (allocate_stack_usage_info): New.
+ 	(allocate_struct_function): Call it for -fcallgraph-info.
+ 	(prepare_function_start): Call it otherwise.
+ 	(record_final_call, record_dynamic_alloc): New.
+ 	* function.h (struct callinfo_callee): New.
+ 	(CALLEE_FROM_CGRAPH_P): New.
+ 	(struct callinfo_dalloc): New.
+ 	(struct stack_usage): Add callees and dallocs.
+ 	(record_final_call, record_dynamic_alloc): Declare.
+ 	* gimplify.c (gimplify_decl_expr): Record dynamically-allocated
+ 	object if -fcallgraph-info=da.
+ 	* optabs-libfuncs.c (build_libfunc_function): Keep SYMBOL_REF_DECL.
+ 	* print-tree.h (print_decl_identifier): Declare.
+ 	(PRINT_DECL_ORIGIN, PRINT_DECL_NAME, PRINT_DECL_UNIQUE_NAME): New.
+ 	* print-tree.c: Include print-tree.h.
+ 	(print_decl_identifier): New function.
+ 	* toplev.c: Include print-tree.h.
+ 	(callgraph_info_file): New global variable.
+ 	(callgraph_info_external_printed): Likewise.
+ 	(output_stack_usage): Rename to...
+ 	(output_stack_usage_1): ... this.  Make it static, add cf
+ 	parameter.  If -fcallgraph-info=su, print stack usage to cf.
+ 	If -fstack-usage, use print_decl_identifier for
+ 	pretty-printing.
+ 	(INDIRECT_CALL_NAME): New.
+ 	(dump_final_node_vcg_start): New.
+ 	(dump_final_callee_vcg, dump_final_node_vcg): New.
+ 	(output_stack_usage): New.
+ 	(lang_dependent_init): Open and start file if
+ 	-fcallgraph-info.  Allocated callgraph_info_external_printed.
+ 	(finalize): If callgraph_info_file is not null, finish it,
+ 	close it, and release callgraph_info_external_printed.
+ 
+ 2019-11-06  Gergö Barany  <gergo@codesourcery.com>
+ 	    Frederik Harwath  <frederik@codesourcery.com>
+ 	    Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	* omp-low.c (struct omp_context): New fields
+ 	local_reduction_clauses, outer_reduction_clauses.
+ 	(new_omp_context): Initialize these.
+ 	(scan_sharing_clauses): Record reduction clauses on OpenACC constructs.
+ 	(scan_omp_for): Check reduction clauses for incorrect nesting.
+ 
+ 2019-11-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR inline-asm/92352
+ 	* gimplify.c (gimplify_asm_expr): Reject VLA in output or input
+ 	operands with non-memory constraints.
+ 
+ 2019-11-05  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/92373
+ 	* tree.c (component_ref_size): Only consider initializers of objects
+ 	of matching struct types.
+ 	Return null for instances of interior zero-length arrays.
+ 
+ 2019-11-05  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* doc/md.texi (Insn Splitting): Fix combiner documentation.
+ 
+ 2019-11-05  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR tree-optimization/91825
+ 	* expmed.c: Reduce -Wmaybe-uninitialized to warning.
+ 
+ 2019-11-05  Jim Wilson  <jimw@sifive.com>
+ 
+ 	PR middle-end/92263
+ 	* expr.c (emit_move_complex): Only use BLOCK_OP_NO_LIBCALL when
+ 	optimize_insn_for_speed_p is true.
+ 
+ 2019-11-05  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/92333
+ 	PR middle-end/82608
+ 	* tree-vrp.c (vrp_prop::check_array_ref): Handle VLAs with constant
+ 	size.
+ 	* tree-ssa-ccp.c (fold_builtin_alloca_with_align): Use a meaninful
+ 	name and location for a temporary variable.
+ 
+ 2019-11-05  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.c (value_range::value_range): Fix whitespace.
+ 	(defined_ranges_p): Same.
+ 	(range_fold_binary_symbolics_p): Same.
+ 	(value_range::intersect_helper): Same.
+ 	(value_range::union_helper): Same.
+ 	* tree-vrp.h (range_fold_binary_expr): Same.
+ 
+ 2019-11-04  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/92341
+ 	PR middle-end/82612
+ 	* tree-sra.c (get_access_for_expr): Fail for out-of-bounds offsets.
+ 	* tree-vrp.c (vrp_prop::check_array_ref): Correct index and text
+ 	of message printed in a warning for empty arrays.
+ 	(vrp_prop::check_mem_ref): Also handle function parameters and
+ 	empty arrays.
+ 
+ 2019-11-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92371
+ 	* tree-vect-loop.c (vectorizable_reduction): Set STMT_VINFO_REDUC_DEF
+ 	on the original stmt of live stmts in the chain.
+ 	(vectorizable_live_operation): Look at the original stmt when
+ 	checking STMT_VINFO_REDUC_DEF.
+ 
+ 2019-11-05  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* gimple-fold.c, gimple-loop-versioning.cc,
+ 	gimple-ssa-evrp-analyze.[ch], gimple-ssa-evrp.c,
+ 	gimple-ssa-sprintf.c, ipa-cp.c, ipa-prop.c, ipa-prop.h,
+ 	range-op.[hc]*, range.[hc]*, selftest.h, tree-ssa-dom.c,
+ 	tree-ssa-strlen.c, tree-ssa-threadedge.c, tree-ssanames.[hc],
+ 	tree-vrp.[hc], vr-values.[hc]: Global rename of value_range to
+ 	value_range_equiv, and value_range_base to value_range.
+ 
+ 2019-11-05  Matthew Malcomson  <matthew.malcomson@arm.com>
+ 
+ 	* expr.c (build_personality_function): Fix generated type to
+ 	match actual personality functions.
+ 
+ 2019-11-05  Matthew Malcomson  <matthew.malcomson@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_handle_attr_cpu): Allocate
+ 	enough bytes for the NULL character.
+ 
+ 2019-11-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92280
+ 	* match.pd (BIT_FIELD_REF of CTOR): Unless the original CTOR
+ 	had a single use do not create a new CTOR.
+ 	* tree-ssa-forwprop.c (simplify_bitfield_ref): Do not re-fold
+ 	BIT_FIELD_REF of a CTOR via GENERIC.
+ 
+ 2019-11-05  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390.c (s390_vector_alignment): Check if the value
+ 	fits into uhwi before using it.
+ 
+ 2019-11-05  Martin Liska  <mliska@suse.cz>
+ 
+ 	* symbol-summary.h: Use ggc_delete.
+ 
+ 2019-11-05  Anton Youdkevitch  <anton.youdkevitch@bell-sw.com>
+ 
+ 	* config/aarch64/aarch64.c (thunderx2t99_vector_cost):
+ 	Change vec_perm field to 10.
+ 
+ 2019-11-05  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* doc/install.texi: Further fix syntax for html generation.
+ 
+ 2019-11-05  Martin Liska  <mliska@suse.cz>
+ 
+ 	* symbol-summary.h: Rename allocator to m_allocator and
+ 	add comment.
+ 
+ 2019-11-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92324
+ 	* tree-vect-loop.c (check_reduction_path): For MIN/MAX require
+ 	all signed or unsigned operations.
+ 
+ 2019-11-05  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* hsa-brig.c: Include alloc-pool.h
+ 	* hsa-dump.c: Likewise.
+ 	* hsa-gen.c: Likewise.
+ 	* hse-regalloc.c: Likewise.
+ 	* ipa-hsa.c: Likewise.
+ 	* ipa-predicate.c: Likewise.
+ 	* ipa-reference.c: Likewise.
+ 	* ipa-sra.c: Likewise.
+ 	* omp-expand.c: Likewise.
+ 	* omp-general.c: Likewise.
+ 	* omp-low.c: Likewise.
+ 	* sumbol-summary.h (function_summary_base): Add allocator.
+ 	(function_summary<T *>::function_summary): Update construction.
+ 	(fast_function_summary<T *, V>::fast_function_summary): Likewise.
+ 	(call_summary_base): Add allcator.
+ 	(call_summary<T *>::call_summary): Update construction.
+ 	(fast_call_summary<T *, V>::fast_call_summary): Likewise.
+ 
+ 2019-11-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/91945
+ 	* builtins.c (compute_objsize): For ARRAY_REF, only multiply off
+ 	by tpsize if it is both non-NULL and INTEGER_CST, otherwise punt.
+ 	Formatting fix.
+ 
+ 2019-11-05  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* range-op.cc (wi_set_zero_nonzero_bits): Remove static qualifier.
+ 	* range-op.h (wi_set_zero_nonzero_bits): New prototype.
+ 	* tree-vrp.h (vrp_set_zero_nonzero_bits): Remove.
+ 	* tree-vrp.c (wide_int_range_set_zero_nonzero_bits): Remove.
+ 	(vrp_set_zero_nonzero_bits): Move to...
+ 	* vr-values.c (vr_set_zero_nonzero_bits): ...here.
+ 	(vr_values::simplify_bit_ops_using_ranges): Rename
+ 	vrp_set_zero_nonzero_bits to vr_set_zero_nonzero_bits.
+ 
+ 2019-11-05  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR c++/92339
+ 	* fold-const.c (operand_compare::hash_operand): Remove
+ 	FIELD_DECL handling.
+ 
+ 2019-11-05  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.h (vrp_bitmap_equal_p): Remove.
+ 	* tree-vrp.c (vrp_bitmap_equal_p): Move before use and make
+ 	static.
+ 
+ 2019-11-05  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.c (value_range_base::operator==): Use equal_p to
+ 	properly handle symbolics.
+ 	(range_compatible_p): Remove.
+ 
+ 2019-11-04  Kamlesh Kumar  <kamleshbhalui@gmail.com>
+ 
+ 	* common.opt (-fabi-version): Document =14.
+ 	* doc/invoke.texi (C++ Dialect Options): Likewise.
+ 
+ 2019-11-04  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.c (value_range_base::set): Do not special case pointers.
+ 
+ 2019-11-04  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	* config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): New function.
+ 	(TARGET_OMP_DEVICE_KIND_ARCH_ISA): Redefine to
+ 	gcn_omp_device_kind_arch_isa.
+ 	* config/gcn/t-omp-device: New file.
+ 	* configure.ac: Support gcn for omp_device_property.
+ 	* configure: Regenerate.
+ 
+ 2019-11-04  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.h (vrp_val_min): Remove handle_pointers argument.
+ 	(vrp_val_max): Same.
+ 	(vrp_val_is_min): Same.
+ 	(vrp_val_is_max): Same.
+ 	(value_range_base::nonzero_p): Remove last argument to
+ 	vrp_val_is_max.
+ 	* tree-vrp.c (vrp_val_min): Remove handle_pointers argument.
+ 	(vrp_val_max): Same.
+ 	(vrp_val_is_min): Same.
+ 	(vrp_val_is_max): Same.
+ 	(value_range_base::set_varying): Remove last argument to vrp_val*.
+ 	(value_range_base::dump): Same.
+ 	(value_range_base::set): Same.
+ 	(value_range_base::normalize_symbolics): Same.
+ 	(value_range_base::num_pairs): Same.
+ 	(value_range_base::lower_bound): Same.
+ 	(value_range_base::upper_bound): Same.
+ 	(ranges_from_anti_range): Remove handle_pointers argument.
+ 	(value_range_base::singleton_p): Remove last argument to
+ 	ranges_from_anti_range.
+ 
+ 2019-11-04  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ipa-reference.c (init_function_info): Initialize
+ 	info->global.statics_read.
+ 
+ 2019-11-04  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.c (value_range_base::invert): Use constructors to build
+ 	range.
+ 
+ 2019-11-04  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.c (range_int_cst_singleton_p): Remove.
+ 	* tree-vrp.h (range_int_cst_singleton_p): Remove.
+ 
+ 2019-11-04  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.c (value_range_base::normalize_addresses): Handle
+ 	VR_UNDEFINED.
+ 
+ 2019-11-04  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.c (dump_assert_info): New.
+ 	(dump_asserts_info): New.
+ 
+ 2019-11-04  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ipa-inline-transform.c: Include ipa-utils.h
+ 	(inline_call): Set thunk_expansion flag.
+ 	* ipa-utils.h (thunk_expansion): Declare.
+ 	* ipa-devirt.c (thunk_expansion): New global var.
+ 	(devirt_node_removal_hook): Do not invalidate cache while
+ 	doing thunk expansion.
+ 
+ 2019-11-04  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	* tree-vect-slp.c (vectorize_slp_instance_root_stmt): Initialize rstmt.
+ 
+ 2019-11-04  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/92349
+ 	* tree-vrp.c (vrp_prop::check_array_ref): Avoid assuming struct
+ 	memebers have constant sizes.
+ 
+ 2019-11-04  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	* tree-vect-loop.c (vect_analyze_loop): Remove orig_loop_vinfo
+ 	parameter.
+ 	* tree-vectorizer.h (vect_analyze_loop): Update declaration.
+ 	* tree-vectorizer.c (try_vectorize_loop_1): Update calls to
+ 	vect_analyze_loop.
+ 
+ 2019-11-04  Joel Hutton  <Joel.Hutton@arm.com>
+ 
+ 	* expr.c (store_constructor): Modify to handle single element vectors.
+ 	* tree-vect-slp.c (vect_analyze_slp_instance): Add case for vector
+ 	constructors.
+ 	(vect_slp_check_for_constructors): New function.
+ 	(vect_slp_analyze_bb_1): Call new function to check for vector
+ 	constructors.
+ 	(vectorize_slp_instance_root_stmt): New function.
+ 	(vect_schedule_slp): Call new function to vectorize root stmt of vector
+ 	constructors.
+ 	* tree-vectorizer.h (SLP_INSTANCE_ROOT_STMT): New field.
+ 
+ 2019-11-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92345
+ 	* tree-vect-loop.c (vect_is_simple_reduction): Return whether
+ 	we produced a reduction chain.
+ 	(vect_analyze_scalar_cycles_1): Do not add reduction chains to
+ 	LOOP_VINFO_REDUCTIONS.
+ 
+ 2019-11-04  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* cgraphclones.c (cgraph_node::create_version_clone): Do not
+ 	duplicate summaries.
+ 	* ipa-fnsummary.c (ipa_fn_summary_alloc): Allocate size summary
+ 	first.
+ 	(ipa_fn_summary_t::duplicate): Use get instead of get_create to
+ 	access call summaries.
+ 	(dump_ipa_call_summary): Be ready for missing edge summaries.
+ 	(analyze_function_body): Use get instead of get_create to access
+ 	edge summary.
+ 	(estimate_calls_size_and_time): Do not access summaries of
+ 	inlined edges; sanity check they are missing.
+ 	(ipa_call_context::estimate_size_and_time): Use get instead
+ 	of get_create to access node summary.
+ 	(inline_update_callee_summaries): Do not update depth of
+ 	inlined edge.
+ 	(ipa_merge_fn_summary_after_inlining): Remove inline edge from
+ 	growth caches.
+ 	(ipa_merge_fn_summary_after_inlining): Use get instead
+ 	of get_create.
+ 	* ipa-fnsummary.h (ipa_remove_from_growth_caches): Declare.
+ 	* ipa-inline-analyssi.c (edge_growth_cache): Turn to
+ 	fast summary.
+ 	(initialize_growth_caches): Update.
+ 	(do_estimate_edge_time): Remove redundant copy of context.
+ 	(ipa_remove_from_growth_caches): New function.
+ 	* ipa-inline.c (flatten_function): Update overall summary
+ 	only when optimizing.
+ 	(inline_to_all_callers): Update overall summary of function
+ 	inlined to.
+ 	* ipa-inline.h (edge_growth_cache): Turn to fast summary.
+ 	* symbol-summary.h (call_summary_base): Set m_initialize_when_cloning
+ 	to false.
+ 
+ 2019-11-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	* system.h: Include malloc.h if INCLUDE_MALLOC_H and HAVE_MALLINFO.
+ 	* ggc-common.c: Remove inclusion of malloc.h, define INCLUDE_MALLOC_H.
+ 
+ 2019-11-04  David Edelsohn  <dje.gcc@gmail.com>
+ 
+ 	* ggc-common.c: Include system.h before malloc.h.
+ 
+ 2019-11-04  Alexandre Oliva <oliva@adacore.com>
+ 
+ 	* configure.ac: Pass --enable-obsolete=* and
+ 	--enable-option-checking=* down to build configure, and fail
+ 	if it fails.  AC_SUBST HAVE_AUTO_BUILD.
+ 	* configure: Rebuild.
+ 	* Makefile.in [HAVE_AUTO_BUILD] (auto-build.h): New rule.
+ 	[HAVE_AUTO_BUILD] (config.status): Depend on auto-build.h.
+ 
+ 2019-11-04  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config.in: Regenerate.
+ 	* config/msp430/msp430.c (msp430_option_override): Emit an error if
+ 	-mtiny-printf is used without GCC being configured with
+ 	--enable-newlib-nano-formatted-io.
+ 	* config/msp430/msp430.h (LINK_SPEC): Pass 
+ 	"--wrap puts --wrap printf" when -mtiny-printf is used.
+ 	* config/msp430/msp430.opt: Document -mtiny-printf.
+ 	* configure: Regenerate.
+ 	* configure.ac: Enable --enable-newlib-nano-formatted-io flag.
+ 	Define HAVE_NEWLIB_NANO_FORMATTED_IO if
+ 	--enable-newlib-nano-formatted-io is passed.
+ 	* doc/invoke.texi: Document -mtiny-printf.
+ 
+ 2019-11-04  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* configure: Regenerate.
+ 
+ 2019-11-04  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/driver-msp430.c
+ 	(msp430_get_linker_devices_include_path): New spec function.
+ 	* config/msp430/msp430-devices.c (msp430_dirname): New function.
+ 	(extract_devices_dir_from_exec_prefix): New function.
+ 	(extract_devices_dir_from_collect_gcc): New function.
+ 	(msp430_check_env_var_for_devices): New function.
+ 	(msp430_check_path_for_devices): Use xstrdup instead of ASTRDUP.
+ 	(parse_devices_csv): Call msp430_check_env_var_for_devices if
+ 	devices.csv was not found using other methods.
+ 	* config/msp430/msp430-devices.h (msp430_check_env_var_for_devices):
+ 	New prototype.
+ 	(msp430_dirname): Likewise.
+ 	* config/msp430/msp430.c (msp430_register_pre_includes): New function.
+ 	* config/msp430/msp430.h (EXTRA_SPEC_FUNCTIONS): Add
+ 	msp430_get_linker_devices_include_path.
+ 	(TARGET_EXTRA_PRE_INCLUDES): Define.
+ 	* doc/invoke.texi: Document new ways of searching for support files.
+ 
+ 2019-11-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92301
+ 	* tree-vect-stmts.c (process_use): Force reduction PHI defs live
+ 	as required by epilogue generation
+ 
+ 2019-11-04  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/92304
+ 	* fold-const.c (operand_compare::hash_operand): Fix field
+ 	hashing of CONSTRUCTOR.
+ 
+ 2019-11-04  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ggc.h (ggc_delete): New function.
+ 	* ipa-fnsummary.c (ipa_free_fn_summary): Use it.
+ 	* ipa-prop.c (ipa_free_all_edge_args): Likewise.
+ 	(ipa_free_all_node_params): Likewise.
+ 	* ipa-sra.c (ipa_sra_analysis): Likewise.
+ 
+ 2019-11-02  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-fnsummary.c (set_cond_stmt_execution_predicate,
+ 	set_switch_stmt_execution_predicate, compute_bb_predicates,
+ 	will_be_nonconstant_expr_predicate,
+ 	phi_result_unknown_predicate,
+ 	analyze_function_body): Pass arround params summary.
+ 	(ipa_call_context::duplicate_from): New comment;
+ 	only duplicate useful values.
+ 	(ipa_call_context::equal_to): Only compare useful values.
+ 	(remap_edge_summaries): Pass params_summary.
+ 	(remap_hint_predicate): Likewise.
+ 	(ipa_merge_fn_summary_after_inlining): Likewise.
+ 	(inline_read_section): Initialize params summary used flags.
+ 	* ipa-predicate.c (predicate::remap_after_inlining): Pass
+ 	around param_summary.
+ 	(add_condition): Initialized used params summary flags.
+ 	* ipa-predicate.h (inline_param_summary::equals_to): Make const.
+ 	(inline_param_summary::useless_p): New predicate.
+ 	(remap_after_inlining, add_condition): Update prototype
+ 	* ipa-prop.c (ipa_populate_param_decls): Watch overflow in
+ 	move_cost.
+ 	(ipa_note_param_call): Add parameter POLYMORPHIC; update params
+ 	summaries.
+ 	(ipa_analyze_indirect_call_uses): Update use of ipa_note_param_call.
+ 	(ipa_analyze_virtual_call_uses): Likewise.
+ 	(update_indirect_edges_after_inlining): Update param summaries.
+ 	(ipa_print_node_params): Print used flags.
+ 	(ipa_read_indirect_edge_info): Update param summareis.
+ 	* ipa-prop.h (ipa_param_descriptor): Add
+ 	used_by_ipa_predicates, used_by_indirect_call
+ 	and used_by_polymorphic_call.
+ 	(ipa_set_param_used_by_ipa_predicates,
+ 	ipa_set_param_used_by_indirect_call,
+ 	ipa_set_param_used_by_polymorphic_call,
+ 	ipa_is_param_used_by_ipa_predicates,
+ 	ipa_is_param_used_by_indirect_call,
+ 	ipa_is_param_used_by_polymorphic_call): New inline functions.
+ 
+ 2019-11-02  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-fnsummary.c (ipa_call_context::duplicate_from): New
+ 	member function.
+ 	(ipa_call_context::release): Add ALL parameter.
+ 	(ipa_call_context::equal_to): New member function.
+ 	* ipa-fnsummary.h (ipa_call_context): Add empty constructor;
+ 	duplicate_form, release, equal_to and exists_p member functoins.
+ 	* ipa-inline-analysis.c (node_context_cache_entry): New
+ 	class.
+ 	(node_context_summary): Likewise.
+ 	(node_context_cache, node_context_cache_hit, node_context_cache_miss,
+ 	node_context_clear): New static vars.
+ 	(initialize_growth_caches): New function.
+ 	(free_growth_caches): Also delete node_context_cache; output stats.
+ 	(do_estimate_edge_time): Cache contexts.
+ 	(reset_node_cache): New function.
+ 	* ipa-inline.c (reset_edge_caches): Reset also node cache.
+ 	(inline_small_functions): Initialize growth caches.
+ 	* ipa-inline.h (reset_node_cache, initialize_growth_caches):
+ 	Declare.
+ 	* ipa-predicate.h (inline_param_summary::equal_to): New.
+ 	* ipa-prop.c (ipa_agg_jf_item::equal_to): New.
+ 	* ipa-prop.h (ipa_agg_jf_item): Declare equal_to member function.
+ 	(ipa_agg_jump_function): Implement equal_to member function.
+ 
+ 2019-11-02  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-fnsummary.c (inline_read_section): Set vector size
+ 	ahead of time.
+ 
+ 2019-11-02  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-fnsummary.c (ipa_call_context): New constructor.
+ 	(estimate_node_size_and_time): Turn to ...
+ 	(ipa_call_context::estimate_size_and_time): ... this one.
+ 	(ipa_call_context::release): New.
+ 	* ipa-fnsummary.h (ipa_call_context): New class.
+ 	(estimate_node_size_and_time): Remove.
+ 	* ipa-inline-analysis.c (do_estimate_edge_time, do_estimate_edge_size,
+ 	do_estimate_edge_hints): Update.
+ 
+ 2019-11-02  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* config.in: Regenerate.
+ 	* configure: Regenerate.
+ 	* configure.ac: Check for mallinfo.
+ 	* ggc-common.c: Include malloc.h if available;
+ 	include options.h
+ 	(report_heap_memory_use): New functoin.
+ 	* ggc-page.c (ggc_grow): Do not print "start".
+ 	* ggc.h (report_heap_memory_use): Declare.
+ 	* pases.c (execute_one_pass): Report memory after IPA passes.
+ 	(ipa_read_summaries_1): Likewise.
+ 	(ipa_read_optimization_summaries_1): Likewise.
+ 
+ 2019-11-02  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gimplify.h (omp_construct_selector_matches): Change return
+ 	type to int, add a new SCORES argument.
+ 	* gimplify.c (omp_construct_selector_matches): Likewise.  If
+ 	SCORES is non-NULL, compute scores of each construct.
+ 	* omp-general.h (omp_get_context_selector): Declare.
+ 	* omp-general.c (omp_maybe_offloaded, omp_context_selector_matches):
+ 	Adjust omp_construct_selector_matches callers.
+ 	(omp_get_context_selector): New function, moved from c-family/c-omp.c.
+ 	(omp_context_compute_score): New function.
+ 	(omp_resolve_declare_variant): Compute scores and decide based on
+ 	that.
+ 
+ 	PR bootstrap/92314
+ 	* configure.ac: Don't look for omp-device-properties files from
+ 	installed offloading compilers.  Instead add tmake_file snippets
+ 	for configured offloading targets and use files they generate.
+ 	* Makefile.in (install): Don't depend on
+ 	install-omp-device-properties.
+ 	(install-omp-device-properties): Remove goal.
+ 	* config/i386/t-omp-device: New file.
+ 	* config/i386/t-intelmic (omp-device-properties): Remove goal.
+ 	* config/nvptx/t-omp-device: New file.
+ 	* config/nvptx/t-nvptx (omp-device-properties): Remove goal.
+ 	* configure: Regenerated.
+ 
+ 	* omp-general.h (omp_context_selector_set_compare): Declare.
+ 	* omp-general.c (omp_construct_simd_compare,
+ 	omp_context_selector_props_compare, omp_context_selector_set_compare,
+ 	omp_context_selector_compare): New functions.
+ 	(omp_resolve_declare_variant): Prune variants that are strict subset
+ 	of another variant.
+ 
+ 2019-11-01  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/91679
+ 	PR middle-end/91647
+ 	PR middle-end/91463
+ 	PR middle-end/92312
+ 	* doc/invoke.texi (-Wzero-length-bounds): Document.
+ 	* gimple-match-head.c (try_conditional_simplification): Use memcpy
+ 	instead of a hand-rolled loop to avoid PR 92323.
+ 	* tree-vrp.c (vrp_prop::check_array_ref): Handle trailing arrays
+ 	with initializers.
+ 	(vrp_prop::check_mem_ref): Handle declared struct objects.
+ 	* tree.c (last_field): New function.
+ 	(array_at_struct_end_p): Handle MEM_REF.
+ 	(get_initializer_for): New helper.
+ 	(component_ref_size): Add argument.  Rename locals.  Call
+ 	get_initializer_for instead of fold_ctor_reference.  Correct handling
+ 	of flexible array members.
+ 	* wide-int.h (generic_wide_int <storage>::sign_mask): Assert invariant.
+ 
+ 2019-11-01  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	* config/rs6000/rs6000-modes.def (V2SF, V2SI): New modes.
+ 	* config/rs6000/vsx.md (UNSPEC_VSX_CVSPSXDS,
+ 	UNSPEC_VSX_CVSPUXDS): Remove.
+ 	(vsx_xvcvspdp): New define_expand, old define_insn split to...
+ 	(vsx_xvcvspdp_be): ... this.  New.  And...
+ 	(vsx_xvcvspdp_le): ... this.  New.
+ 	(vsx_xvcv<su>xwdp): New define_expand, old define_insn split to...
+ 	(vsx_xvcv<su>xwdp_be): ... this.  New.  And...
+ 	(vsx_xvcv<su>xwdp_le): ... this.  New.
+ 	(vsx_xvcvsp<su>xds): New define_expand, old define_insn split to...
+ 	(vsx_xvcvsp<su>xds_be): ... this.  New.  And...
+ 	(vsx_xvcvsp<su>xds_le): ... this.  New.
+ 
+ 2019-11-01  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	* config/rs6000/vsx.md (UNSPEC_VSX_CVSXWSP, UNSPEC_VSX_CVUXWSP,
+ 	UNSPEC_VSX_XVCVSXDDP, UNSPEC_VSX_XVCVUXDDP,
+ 	UNSPEC_VSX_XVCVDPSXDS, UNSPEC_VSX_XVCVDPUXDS,
+ 	UNSPEC_VSX_XVCVSPSXWS): Remove.
+ 	(vsx_xvcv<su>xddp, vsx_xvcvdp<su>xds, vsx_xvcvsp<su>xws,
+ 	vsx_xvcv<su>xwsp): Update define_insn RTL patterns.
+ 
+ 2019-11-01  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	* config/rs6000/vsx.md (vsx_xvcdpsp): Remove define_insn.
+ 	(UNSPEC_VSX_XVCDPSP): Remove.
+ 	* config/rs6000/rs6000.c (rs6000_generate_float2_double_code):
+ 	Replace gen_vsx_xvcdpsp by gen_vsx_xvcvdpsp.
+ 
+ 2019-11-01  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	* hooks.c (hook_tree_tree_bool_null): New.
+ 	* hooks.h (hook_tree_tree_bool_null): Declare.
+ 	* langhooks-def.h (LANG_HOOKS_OMP_ARRAY_DATA): Define.
+ 	(LANG_HOOKS_DECLS): Add it.
+ 	* langhooks.h (lang_hooks_for_decls): Add omp_array_data.
+ 	* omp-low.c (install_var_field): New mode for Fortran descriptor arrays.
+ 	(lower_omp_target): Handle Fortran array with descriptor in
+ 	OMP_CLAUSE_USE_DEVICE_ADDR/OMP_CLAUSE_USE_DEVICE_PTR.
+ 
+ 2019-10-31  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve-builtins.cc (register_builtin_types):
+ 	Assert that the type we store in abi_vector_types is its own
+ 	main variant.
+ 	(svbool_type_p): Don't apply TYPE_MAIN_VARIANT here.
+ 
+ 2019-10-31  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.c (arm_legitimize_address): Don't form negative offsets
+ 	from a CONST_INT address when TARGET_THUMB2.
+ 
+ 2019-10-31  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (add_not_cin): New insn.
+ 	(add_not_shift_cin): Likewise.
+ 
+ 2019-10-31  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf-gimple.c (func_checker::compare_tree_ssa_label): Remove.
+ 	* ipa-icf-gimple.h: Remove declaration from compare_tree_ssa_label
+ 	and compare_memory_operand.
+ 
+ 2019-10-31  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* configure.ac: Compute and substitute omp_device_properties and
+ 	omp_device_property_deps.
+ 	* Makefile.in (generated_files): Add omp-device-properties.h.
+ 	(omp-general.o): Depend on omp-device-properties.h.
+ 	(omp_device_properties): New make variable.
+ 	(omp-device-properties.h, s-omp-device-properties-h,
+ 	install-omp-device-properties): New goals.
+ 	(install): Depend on install-omp-device-properties for accelerators.
+ 	* target.def (TARGET_OMP_DEVICE_KIND_ARCH_ISA): New target hook.
+ 	* target.h (enum omp_device_kind_arch_isa): New enum.
+ 	* doc/tm.texi.in: Add placeholder for TARGET_OMP_DEVICE_KIND_ARCH_ISA
+ 	documentation.
+ 	* omp-general.c: Include omp-device-properties.h.
+ 	(omp_max_simt_vf): Expect OFFLOAD_TARGET_NAMES to be separated by
+ 	colon instead of comma.
+ 	(omp_offload_device_kind_arch_isa, omp_maybe_offloaded): New
+ 	functions.
+ 	(omp_context_selector_matches): Implement device set arch/isa
+ 	selectors, improve device set kind selector handling.
+ 	* config/i386/i386-options.h (ix86_omp_device_kind_arch_isa): Declare.
+ 	* config/i386/i386.c (TARGET_SIMD_CLONE_ADJUST,
+ 	TARGET_SIMD_CLONE_USABLE): Formatting fix.
+ 	(TARGET_OMP_DEVICE_KIND_ARCH_ISA): Redefine to
+ 	ix86_omp_device_kind_arch_isa.
+ 	* config/i386/i386-options.c (struct ix86_target_opts): Move type
+ 	definition from ix86_target_string to file scope.
+ 	(isa2_opts, isa_opts): Moved arrays from ix86_target_string function
+ 	to file scope.
+ 	(ix86_omp_device_kind_arch_isa): New function.
+ 	(ix86_target_string): Moved struct ix86_target_opts, isa2_opts and
+ 	isa_opts definitions to file scope.
+ 	* config/i386/t-intelmic (omp-device-properties): New goal.
+ 	* config/nvptx/t-nvptx (omp-device-properties): Likewise.
+ 	* config/nvptx/nvptx.c (nvptx_omp_device_kind_arch_isa): New function.
+ 	(TARGET_OMP_DEVICE_KIND_ARCH_ISA): Redefine to
+ 	nvptx_omp_device_kind_arch_isa.
+ 	* configure: Regenerate.
+ 	* doc/tm.texi: Regenerate.
+ 
+ 	PR middle-end/92231
+ 	* tree.h (fndecl_built_in_p): Use fndecl_built_in_p instead of
+ 	DECL_BUILT_IN in comment.  Remove redundant ()s around return
+ 	argument.
+ 	* tree.c (free_lang_data_in_decl): Check if var is FUNCTION_DECL
+ 	before calling fndecl_built_in_p.
+ 	* gimple-fold.c (gimple_fold_stmt_to_constant_1): Check if
+ 	TREE_OPERAND (fn, 0) is a FUNCTION_DECL before calling
+ 	fndecl_built_in_p on it.
+ 
+ 2019-10-31  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	* params.def (PARAM_VECT_EPILOGUES_NOMASK): Enable by default.
+ 
+ 2019-10-31  Martin Liska  <mliska@suse.cz>
+ 
+ 	* config/arm/arm.c (arm_get_pcs_model): Remove usage
+ 	of cgraph_local_info and use local_info_node instead.
+ 	* config/bfin/bfin.c (bfin_load_pic_reg): Likewise.
+ 	(bfin_function_ok_for_sibcall): Likewise.
+ 	* config/c6x/c6x.c (c6x_function_ok_for_sibcall): Likewise.
+ 	(must_reload_pic_reg_p): Likewise.
+ 
+ 2019-10-31  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/90947
+ 	* tree.h (type_initializer_zero_p): Remove.
+ 	* tree.c (type_initializer_zero_p): Remove.
+ 
+ 2019-10-30  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* doc/invoke.texi (-Wshadow, -Wshadow=global
+ 	-Wshadow=local, -Wshadow=compatible-local): Update documentation.
+ 
+ 2019-10-30  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	* gimplify.c (gimplify_scan_omp_clauses): Remove FE-generated
+ 	GOMP_MAP_TO_PSET and GOMP_MAP_POINTER mapping for 'target update'
+ 	and 'target exit data'.
+ 
+ 2019-10-30  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	ipa/92278
+ 	* cgraph.c (cgraph_edge::possibly_call_in_translation_unit_p): Fix
+ 	availability comparison.
+ 
+ 2019-10-30  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.c (msp430_expand_helper): Support expansion of
+ 	calls to __mspabi_mpy* functions.
+ 	* config/msp430/msp430.md (mulhisi3): New define_expand.
+ 	(umulhisi3): New define_expand.
+ 	(*mulhisi3_inline): Use old mulhisi3 define_insn.
+ 	(*umulhisi3_inline): Use old umulhisi3 define_insn.
+ 
+ 2019-10-30  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.c (msp430_check_index_not_high_mem): New.
+ 	(msp430_check_plus_not_high_mem): New.
+ 	(msp430_op_not_in_high_mem): Use new functions to check if the operand
+ 	might be in low memory.
+ 	Indicate that a 16-bit absolute address is in lower memory.
+ 
+ 2019-10-30  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* ipa-prop.c (ipa_compute_jump_functions_for_bb): Fix the call to
+ 	ultimate_alias_target.
+ 
+ 2019-10-30  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92275
+ 	* tree-vect-loop-manip.c (slpeel_update_phi_nodes_for_loops):
+ 	Copy all loop-closed PHIs.
+ 
+ 2019-10-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf-gimple.c (func_checker::compare_ssa_name): Use
+ 	const_tree as function argument.
+ 	(func_checker::compare_decl): Likewise.
+ 	(func_checker::operand_equal_p): Likewise.
+ 	(func_checker::compare_variable_decl): Likewise.
+ 	(func_checker::parse_labels): Likewise.
+ 	* ipa-icf-gimple.h: Likewise.
+ 
+ 2019-10-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf-gimple.c (func_checker::compatible_types_p):
+ 	Do not compare alias sets.  It's handled by operand_equal_p.
+ 
+ 2019-10-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf-gimple.c (func_checker::func_checker): Do not
+ 	initialize m_compare_polymorphic.
+ 	(func_checker::compare_decl): Do not compare polymorphic types.
+ 	* ipa-icf-gimple.h (m_compare_polymorphic): Remove.
+ 	* ipa-icf.c (sem_function::equals_private): Do not call
+ 	compare_polymorphic_p.
+ 
+ 2019-10-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf-gimple.c (func_checker::compare_ssa_name): Call
+ 	compare_operand.
+ 	(func_checker::compare_memory_operand): Remove.
+ 	(func_checker::compare_cst_or_decl): Remove.
+ 	(func_checker::operand_equal_valueize): Do not handle
+ 	FIELD_DECL.
+ 	(func_checker::compare_gimple_call): Call compare_operand.
+ 	(func_checker::compare_gimple_assign): Likewise.
+ 	* ipa-icf-gimple.h: Remove compare_cst_or_decl.
+ 	* ipa-icf.c (sem_function::icf_handled_component_p): Remove.
+ 	* ipa-icf.h (icf_handled_component_p): Remove.
+ 
+ 2019-10-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf-gimple.c (func_checker::hash_operand): New.
+ 	(func_checker::compare_cst_or_decl): Remove handling
+ 	of FIELD_DECL.
+ 	(func_checker::compare_operand): Transform to ...
+ 	(func_checker::operand_equal_p): ... this.
+ 	* ipa-icf-gimple.h (class func_checker): Add
+ 	operand_equal_p and hash_operand.
+ 	* ipa-icf.c (sem_function::equals_private): Fix
+ 	pushing and popping of cfun.
+ 
+ 2019-10-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	* fold-const.c (operand_equal_p): Move to ...
+ 	(operand_compare::operand_equal_p): ... here.
+ 	(operand_compare::verify_hash_value): New.
+ 	(add_expr): Move to ...
+ 	(operand_compare::hash_operand): ... here.
+ 	* fold-const.h (operand_equal_p): Move to the class.
+ 	(class operand_compare): New.
+ 	* tree.c (add_expr): Remove.
+ 
+ 2019-10-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	* fold-const.c (operand_equal_p): Support OBJ_TYPE_REF.
+ 	* tree.c (add_expr): Hash parts of OBJ_TYPE_REF.
+ 
+ 2019-10-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR lto/91393
+ 	PR lto/88220
+ 	* cgraph.c (cgraph_node::get_create): Overwrite node->order
+ 	from a first_clone in order to get proper LTO section
+ 	in LTO stream.
+ 	(cgraph_node::get_untransformed_body):
+ 	Use lto_get_section_data where symtab_node::order
+ 	must be provided.
+ 	* cgraphclones.c (cgraph_node::find_replacement):
+ 	Update also symbol order.
+ 	* ipa-fnsummary.c (ipa_fn_summary_read):
+ 	Use new function lto_get_summary_section_data.
+ 	* ipa-hsa.c (ipa_hsa_read_summary): Likewise.
+ 	* ipa-icf.c (sem_item_optimizer::read_summary):
+ 	Likewise.
+ 	* ipa-prop.c (ipa_prop_read_jump_functions):
+ 	Likewise.
+ 	(ipcp_read_transformation_summaries): Likewise.
+ 	* ipa-sra.c (ipa_sra_read_summary): Likewise.
+ 	* lto-cgraph.c (input_node): Add also order_base.
+ 	(input_varpool_node): Likewise.
+ 	(input_cgraph_1): Assign the order_base.
+ 	(input_cgraph_opt_summary): Use new lto_get_summary_section_data.
+ 	* lto-opts.c (lto_write_options): Pass new argument.
+ 	* lto-section-in.c (lto_get_section_data): Add new argumente order.
+ 	(lto_get_summary_section_data): New.
+ 	(lto_get_raw_section_data): Add order argument.
+ 	(lto_create_simple_input_block): Likewise.
+ 	* lto-section-out.c (lto_destroy_simple_output_block):
+ 	Likewise.
+ 	* lto-streamer-in.c (lto_input_toplevel_asms):
+ 	Use lto_get_summary_section_data.
+ 	(lto_input_mode_table): Likewise.
+ 	* lto-streamer-out.c (produce_asm): Pass symtab_node::order.
+ 	(lto_output_toplevel_asms): Pass new argument.
+ 	(copy_function_or_variable): Likewise.
+ 	(produce_lto_section):Likewise.
+ 	(produce_symtab): Likewise.
+ 	(lto_write_mode_table): Likewise.
+ 	(produce_asm_for_decls): Likewise.
+ 	* lto-streamer.c (lto_get_section_name): Concat symbol name
+ 	and symbol order.
+ 	* lto-streamer.h (lto_get_section_data): Add order argument.
+ 	(lto_get_summary_section_data): New.
+ 	(lto_get_raw_section_data): Add order argument.
+ 	(lto_get_section_name): Likewise.
+ 	* varpool.c (varpool_node::get_constructor): Pass order argument.
+ 
+ 2019-10-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/92262
+ 	* tree-ssa-loop-ivopts.c (get_debug_computation_at): Don't unshare
+ 	ubase or cbase here.
+ 	(remove_unused_ivs): Unshare comp before using it.
+ 
+ 2019-10-30  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-prop.c (update_jump_functions_after_inlining):
+ 	Watch for missing summaries.
+ 
+ 2019-10-30  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/65930
+ 	* tree-vect-loop.c (vect_is_simple_reduction): For reduction
+ 	chains also allow a leading and trailing conversion.
+ 	* tree-vect-slp.c (vect_get_and_check_slp_defs): Handle
+ 	intermediate reduction chains.
+ 	(vect_analyze_slp_instance): Likewise.  Build a SLP
+ 	node for a trailing conversion manually.
+ 
+ 2019-10-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	* cgraph.c (cgraph_node::local_info): Transform to ...
+ 	(cgraph_node::local_info_node): ... this.
+ 	(cgraph_node::dump): Remove cgraph_local_info and
+ 	put its fields directly into cgraph_node.
+ 	(cgraph_node::get_availability): Likewise.
+ 	(cgraph_node::make_local): Likewise.
+ 	(cgraph_node::verify_node): Likewise.
+ 	* cgraph.h (struct GTY): Likewise.
+ 	* cgraphclones.c (set_new_clone_decl_and_node_flags): Likewise.
+ 	(duplicate_thunk_for_node): Likewise.
+ 	(cgraph_node::create_clone): Likewise.
+ 	(cgraph_node::create_virtual_clone): Likewise.
+ 	(cgraph_node::create_version_clone): Likewise.
+ 	* cgraphunit.c (cgraph_node::reset): Likewise.
+ 	(cgraph_node::finalize_function): Likewise.
+ 	(cgraph_node::add_new_function): Likewise.
+ 	(analyze_functions): Likewise.
+ 	* combine.c (setup_incoming_promotions): Likewise.
+ 	* config/i386/i386.c (ix86_function_regparm): Likewise.
+ 	(ix86_function_sseregparm): Likewise.
+ 	(init_cumulative_args): Likewise.
+ 	* ipa-cp.c (determine_versionability): Likewise.
+ 	(count_callers): Likewise.
+ 	(set_single_call_flag): Likewise.
+ 	(initialize_node_lattices): Likewise.
+ 	(estimate_local_effects): Likewise.
+ 	(create_specialized_node): Likewise.
+ 	(identify_dead_nodes): Likewise.
+ 	* ipa-fnsummary.c (compute_fn_summary): Likewise.
+ 	(ipa_fn_summary_generate): Likewise.
+ 	* ipa-hsa.c (check_warn_node_versionable): Likewise.
+ 	(process_hsa_functions): Likewise.
+ 	* ipa-icf.c (set_local): Likewise.
+ 	* ipa-inline-analysis.c (initialize_inline_failed): Likewise.
+ 	* ipa-inline.c (speculation_useful_p): Likewise.
+ 	* ipa-profile.c (ipa_propagate_frequency): Likewise.
+ 	(ipa_profile): Likewise.
+ 	* ipa-split.c (split_function): Likewise.
+ 	(execute_split_functions): Likewise.
+ 	* ipa-sra.c (ipa_sra_preliminary_function_checks): Likewise.
+ 	(ipa_sra_ipa_function_checks): Likewise.
+ 	* ipa-visibility.c (function_and_variable_visibility): Likewise.
+ 	* ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
+ 	* lto-cgraph.c (lto_output_node): Likewise.
+ 	(input_overwrite_node): Likewise.
+ 	* multiple_target.c (expand_target_clones): Likewise.
+ 	* omp-simd-clone.c (simd_clone_create): Likewise.
+ 	* trans-mem.c (expand_call_tm): Likewise.
+ 	(ipa_tm_mayenterirr_function): Likewise.
+ 	(ipa_tm_diagnose_tm_safe): Likewise.
+ 	(ipa_tm_diagnose_transaction): Likewise.
+ 	(ipa_tm_create_version): Likewise.
+ 	(ipa_tm_transform_calls_redirect): Likewise.
+ 	(ipa_tm_execute): Likewise.
+ 	* tree-inline.c (expand_call_inline): Likewise.
+ 
+ 2019-10-29  Martin Liska  <mliska@suse.cz>
+ 
+ 	* symbol-summary.h (function_summary): Pass memory location
+ 	to underlaying hash_map (or vec).
+ 	(V>::fast_function_summary): Likewise.
+ 
+ 2019-10-29  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ggc.h (ggc_alloc_no_dtor): New function.
+ 	* ipa-fnsummary.c (ipa_free_fn_summary): Call
+ 	destructor and ggc_free.
+ 	(ipa_free_size_summary): Call delete instead
+ 	of release.
+ 	* ipa-fnsummary.h: Use new function ggc_alloc_no_dtor.
+ 	* ipa-prop.c (ipa_check_create_edge_args): Likewise.
+ 	(ipa_free_all_edge_args): Call destructor and ggc_free.
+ 	(ipa_free_all_node_params): Likewise.
+ 	(ipcp_free_transformation_sum): Likewise.
+ 	* ipa-prop.h (ipa_check_create_node_params):
+ 	Call new ggc_alloc_no_dtor.
+ 	* ipa-sra.c (ipa_sra_generate_summary): Likewise.
+ 	(ipa_sra_analysis): Call destructor and ggc_free.
+ 	Replace release with delete operator.
+ 	* symbol-summary.h (release): Remove ..
+ 	(V>::~fast_function_summary): and move logic here.
+ 	Likewise for other classes.
+ 
+ 2019-10-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92260
+ 	* tree-vect-slp.c (vect_get_constant_vectors): Special-case
+ 	lane-reducing ops.
+ 
+ 2019-10-29  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	PR tree-optimization/88915
+ 	* tree-ssa-loop-niter.h (simplify_replace_tree): Change declaration.
+ 	* tree-ssa-loop-niter.c (simplify_replace_tree): Add context parameter
+ 	and make the valueize function pointer also take a void pointer.
+ 	* tree-ssa-sccvn.c (vn_valueize_wrapper): New function to wrap
+ 	around vn_valueize, to call it without a context.
+ 	(process_bb): Use vn_valueize_wrapper instead of vn_valueize.
+ 	* tree-vect-loop.c (_loop_vec_info): Initialize epilogue_vinfos.
+ 	(~_loop_vec_info): Release epilogue_vinfos.
+ 	(vect_analyze_loop_costing): Use knowledge of main VF to estimate
+ 	number of iterations of epilogue.
+ 	(vect_analyze_loop_2): Adapt to analyse main loop for all supported
+ 	vector sizes when vect-epilogues-nomask=1.  Also keep track of lowest
+ 	versioning threshold needed for main loop.
+ 	(vect_analyze_loop): Likewise.
+ 	(find_in_mapping): New helper function.
+ 	(update_epilogue_loop_vinfo): New function.
+ 	(vect_transform_loop): When vectorizing epilogues re-use analysis done
+ 	on main loop and call update_epilogue_loop_vinfo to update it.
+ 	* tree-vect-loop-manip.c (vect_update_inits_of_drs): No longer insert
+ 	stmts on loop preheader edge.
+ 	(vect_do_peeling): Enable skip-vectors when doing loop versioning if
+ 	we decided to vectorize epilogues.  Update epilogues NITERS and
+ 	construct ADVANCE to update epilogues data references where needed.
+ 	* tree-vectorizer.h (_loop_vec_info): Add epilogue_vinfos.
+ 	(vect_do_peeling, vect_update_inits_of_drs,
+ 	 determine_peel_for_niter, vect_analyze_loop): Add or update
+ 	declarations.
+ 	* tree-vectorizer.c (try_vectorize_loop_1): Make sure to use already
+ 	created loop_vec_info's for epilogues when available.  Otherwise analyse
+ 	epilogue separately.
+ 
+ 2019-10-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	* doc/tree-ssa.texi (Immediate Uses): Fix FOR_EACH_IMM_USE_STMT
+ 	example.
+ 
+ 2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vectorizable_condition): Get the reduction
+ 	index for the COND_EXPR from stmt_info rather than reduc_info.
+ 
+ 2019-10-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/65930
+ 	* tree-vect-loop.c (check_reduction_path): Relax single-use
+ 	check allowing out-of-loop uses.
+ 	(vect_is_simple_reduction): SLP reduction chains cannot have
+ 	intermediate stmts used outside of the loop.
+ 	(vect_create_epilog_for_reduction): The adjustment might need
+ 	to be converted.
+ 	(vectorizable_reduction): Annotate live stmts of the reduction
+ 	chain with STMT_VINFO_REDUC_DEF.
+ 	* tree-vect-stms.c (process_use): Remove no longer true asserts.
+ 
+ 2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* calls.c (pass_by_reference): Leave the target to decide whether
+ 	POLY_INT_CST-sized arguments should be passed by value or reference,
+ 	rather than forcing them to be passed by reference.
+ 	(must_pass_in_stack_var_size): Likewise.
+ 	* config/aarch64/aarch64.md (LAST_SAVED_REGNUM): Redefine from
+ 	V31_REGNUM to P15_REGNUM.
+ 	* config/aarch64/aarch64-protos.h (aarch64_init_cumulative_args):
+ 	Take an extra "silent_p" parameter, defaulting to false.
+ 	(aarch64_sve::svbool_type_p): Declare.
+ 	(aarch64_sve::nvectors_if_data_type): Likewise.
+ 	* config/aarch64/aarch64.h (NUM_PR_ARG_REGS): New macro.
+ 	(aarch64_frame::reg_offset): Turn into poly_int64s.
+ 	(aarch64_frame::save_regs_size): Likewise.
+ 	(aarch64_frame::below_hard_fp_saved_regs_size): New field.
+ 	(aarch64_frame::sve_callee_adjust): Likewise.
+ 	(aarch64_frame::spare_reg_reg): Likewise.
+ 	(ARM_PCS_SVE): New arm_pcs value.
+ 	(CUMULATIVE_ARGS::aapcs_nprn): New field.
+ 	(CUMULATIVE_ARGS::aapcs_nextnprn): Likewise.
+ 	(CUMULATIVE_ARGS::silent_p): Likewise.
+ 	(BITS_PER_SVE_PRED): New macro.
+ 	* config/aarch64/aarch64.c (handle_aarch64_vector_pcs_attribute): New
+ 	function.  Reject aarch64_vector_pcs attributes on SVE functions.
+ 	(aarch64_attribute_table): Use the above handler.
+ 	(aarch64_sve_abi): New function.
+ 	(aarch64_sve_argument_p): Likewise.
+ 	(aarch64_returns_value_in_sve_regs_p): Likewise.
+ 	(aarch64_takes_arguments_in_sve_regs_p): Likewise.
+ 	(aarch64_fntype_abi): Check for SVE functions and return the SVE PCS
+ 	descriptor for them.
+ 	(aarch64_simd_decl_p): Delete.
+ 	(aarch64_emit_cfi_for_reg_p): New function.
+ 	(aarch64_reg_save_mode): Remove the fndecl argument and instead use
+ 	crtl->abi to choose the mode for FP registers.  Handle the SVE PCS.
+ 	(aarch64_hard_regno_call_part_clobbered): Do not treat FP registers
+ 	as partly clobbered for the SVE PCS.
+ 	(aarch64_function_ok_for_sibcall): Check whether the two functions
+ 	use the same ABI, rather than checking specifically for whether
+ 	they're aarch64_vector_pcs functions.
+ 	(aarch64_pass_by_reference): Raise an error for attempts to pass
+ 	SVE arguments when SVE is disabled.  Pass SVE arguments by reference
+ 	if there are not enough free registers left, or if the argument is
+ 	variadic.
+ 	(aarch64_function_value): Handle SVE predicates, vectors and tuples.
+ 	(aarch64_return_in_memory): Do not return SVE predicates, vectors and
+ 	tuples in memory.
+ 	(aarch64_layout_arg): Take a function_arg_info rather than
+ 	individual properties.  Handle SVE predicates, vectors and tuples.
+ 	Raise an error if they are passed to unprototyped functions.
+ 	(aarch64_function_arg): If the silent_p flag is set, suppress the
+ 	usual error about using float registers without TARGET_FLOAT.
+ 	(aarch64_init_cumulative_args): Take a silent_p parameter and store
+ 	it in the cumulative_args structure.  Initialize aapcs_nprn and
+ 	aapcs_nextnprn.  If the silent_p flag is set, suppress the usual
+ 	error about using float registers without TARGET_FLOAT.
+ 	If the silent_p flag is not set, also raise an error about
+ 	using SVE functions when SVE is disabled.
+ 	(aarch64_function_arg_advance): Update the call to aarch64_layout_arg,
+ 	and call it for SVE functions too.  Update aapcs_nprn similarly
+ 	to the other register counts.
+ 	(aarch64_layout_frame): If a big-endian function needs to save
+ 	and restore Z8-Z15, search for a spare predicate that it can use.
+ 	Store SVE predicates at the bottom of the register save area,
+ 	followed by SVE vectors, then followed by the normal slots.
+ 	Keep pointing the hard frame pointer at the base of the normal slots,
+ 	above the SVE vectors.  Update the various frame creation and
+ 	tear-down strategies for the new layout, initializing the new
+ 	sve_callee_adjust field.  Add an additional layout for frames
+ 	whose saved registers are all SVE registers.
+ 	(aarch64_register_saved_on_entry): Cope with poly_int64 reg_offsets.
+ 	(aarch64_return_address_signing_enabled): Likewise.
+ 	(aarch64_push_regs, aarch64_pop_regs): Update calls to
+ 	aarch64_reg_save_mode.
+ 	(aarch64_adjust_sve_callee_save_base): New function.
+ 	(aarch64_add_cfa_expression): Move earlier in file.  Take the
+ 	saved register as an rtx rather than a register number and use
+ 	its mode for the MEM slot.
+ 	(aarch64_save_callee_saves): Remove the mode argument and instead
+ 	use aarch64_reg_save_mode to get the mode of each save slot.
+ 	Add a hard_fp_valid_p parameter.  Cope with poly_int64 register
+ 	offsets.  Allow GP offsets to be saved at a VL-based offset from
+ 	the stack, handling this case using the frame pointer if available
+ 	or a temporary register otherwise.  Use ST1D to save Z8-Z15 for
+ 	big-endian SVE functions; use normal moves for other SVE saves.
+ 	Only mark the save as frame-related if aarch64_emit_cfi_for_reg_p
+ 	returns true.  Add explicit CFA notes when not storing via the
+ 	stack pointer.  Do not try to pair SVE saves.
+ 	(aarch64_restore_callee_saves): Cope with poly_int64 register
+ 	offsets.  Use LD1D to restore Z8-Z15 for big-endian SVE functions;
+ 	use normal moves for other SVE restores.  Only add CFA restore notes
+ 	if aarch64_emit_cfi_for_reg_p returns true.  Do not try to pair
+ 	SVE restores.
+ 	(aarch64_get_separate_components): Always keep the first SVE save
+ 	in the prologue if we need to use it as a stack probe.  Don't allow
+ 	Z8-Z15 saves and loads to be shrink-wrapped for big-endian targets.
+ 	Likewise the spare predicate register that they need.  Update the
+ 	offset calculation to account for the SVE save area.  Use the
+ 	appropriate range check for SVE LDR and STR instructions.
+ 	(aarch64_components_for_bb): Cope with poly_int64 reg_offsets.
+ 	(aarch64_process_components): Likewise.  Update the offset
+ 	calculation to account for the SVE save area.  Only mark the
+ 	save as frame-related if aarch64_emit_cfi_for_reg_p returns true.
+ 	Do not try to pair SVE saves.
+ 	(aarch64_allocate_and_probe_stack_space): Cope with poly_int64
+ 	reg_offsets.  When handling the final allocation, expect the
+ 	first SVE register save to be part of the initial allocation
+ 	and for it to act as a probe at SP.  Account for the SVE callee
+ 	save area in the dump information.
+ 	(aarch64_expand_prologue): Update the frame diagram.  Fold the
+ 	SVE callee allocation into the initial allocation if stack clash
+ 	protection is enabled.  Use new variables to track the offset
+ 	of the frame chain (and hard frame pointer) from the current
+ 	stack pointer, and likewise the offset of the bottom of the
+ 	register save area.  Update calls to aarch64_save_callee_saves
+ 	and aarch64_add_cfa_expression.  Apply sve_callee_adjust before
+ 	saving the FP&SIMD registers.  Save the predicate registers.
+ 	(aarch64_expand_epilogue): Take below_hard_fp_saved_regs_size
+ 	into account when setting the stack pointer from the frame pointer,
+ 	and when deciding whether we can inherit the initial adjustment
+ 	amount from the prologue.  Restore the predicate registers after
+ 	the vector registers, then apply sve_callee_adjust, then restore
+ 	the general registers.
+ 	(aarch64_secondary_reload): Don't use secondary SVE reloads
+ 	for VNx16BImode.
+ 	(aapcs_vfp_sub_candidate): Assert that the type is not an SVE type.
+ 	(aarch64_short_vector_p): Return false for SVE types.
+ 	(aarch64_vfp_is_call_or_return_candidate): Initialize *is_ha
+ 	at the start of the function.  Return false for SVE types.
+ 	(aarch64_asm_output_variant_pcs): Output .variant_pcs for SVE
+ 	functions too.
+ 	(TARGET_STRICT_ARGUMENT_NAMING): Redefine to request strict naming.
+ 	* config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_le): Extend
+ 	to big-endian targets for bytewise moves.
+ 	(*aarch64_sve_mov<mode>_be): Exclude the bytewise case.
+ 
+ 2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 	    Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	* config.gcc (aarch64*-*-*): Add arm_sve.h to extra_headers.
+ 	Add aarch64-sve-builtins.o, aarch64-sve-builtins-shapes.o and
+ 	aarch64-sve-builtins-base.o to extra_objs.  Add
+ 	aarch64-sve-builtins.h and aarch64-sve-builtins.cc to target_gtfiles.
+ 	* config/aarch64/t-aarch64 (aarch64-sve-builtins.o): New rule.
+ 	(aarch64-sve-builtins-shapes.o): Likewise.
+ 	(aarch64-sve-builtins-base.o): New rules.
+ 	* config/aarch64/aarch64-c.c (aarch64_pragma_aarch64): New function.
+ 	(aarch64_resolve_overloaded_builtin): Likewise.
+ 	(aarch64_check_builtin_call): Likewise.
+ 	(aarch64_register_pragmas): Install aarch64_resolve_overloaded_builtin
+ 	and aarch64_check_builtin_call in targetm.  Register the GCC aarch64
+ 	pragma.
+ 	* config/aarch64/aarch64-protos.h (AARCH64_FOR_SVPRFOP): New macro.
+ 	(aarch64_svprfop): New enum.
+ 	(AARCH64_BUILTIN_SVE): New aarch64_builtin_class enum value.
+ 	(aarch64_sve_int_mode, aarch64_sve_data_mode): Declare.
+ 	(aarch64_fold_sve_cnt_pat, aarch64_output_sve_prefetch): Likewise.
+ 	(aarch64_output_sve_cnt_pat_immediate): Likewise.
+ 	(aarch64_output_sve_ptrues, aarch64_sve_ptrue_svpattern_p): Likewise.
+ 	(aarch64_sve_sqadd_sqsub_immediate_p, aarch64_sve_ldff1_operand_p)
+ 	(aarch64_sve_ldnf1_operand_p, aarch64_sve_prefetch_operand_p)
+ 	(aarch64_ptrue_all_mode, aarch64_convert_sve_data_to_pred): Likewise.
+ 	(aarch64_expand_sve_dupq, aarch64_replace_reg_mode): Likewise.
+ 	(aarch64_sve::init_builtins, aarch64_sve::handle_arm_sve_h): Likewise.
+ 	(aarch64_sve::builtin_decl, aarch64_sve::builtin_type_p): Likewise.
+ 	(aarch64_sve::mangle_builtin_type): Likewise.
+ 	(aarch64_sve::resolve_overloaded_builtin): Likewise.
+ 	(aarch64_sve::check_builtin_call, aarch64_sve::gimple_fold_builtin)
+ 	(aarch64_sve::expand_builtin): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_sve_data_mode): Make public.
+ 	(aarch64_sve_int_mode): Likewise.
+ 	(aarch64_ptrue_all_mode): New function.
+ 	(aarch64_convert_sve_data_to_pred): Make public.
+ 	(svprfop_token): New function.
+ 	(aarch64_output_sve_prefetch): Likewise.
+ 	(aarch64_fold_sve_cnt_pat): Likewise.
+ 	(aarch64_output_sve_cnt_pat_immediate): Likewise.
+ 	(aarch64_sve_move_pred_via_while): Use gen_while with UNSPEC_WHILE_LO
+ 	instead of gen_while_ult.
+ 	(aarch64_replace_reg_mode): Make public.
+ 	(aarch64_init_builtins): Call aarch64_sve::init_builtins.
+ 	(aarch64_fold_builtin): Handle AARCH64_BUILTIN_SVE.
+ 	(aarch64_gimple_fold_builtin, aarch64_expand_builtin): Likewise.
+ 	(aarch64_builtin_decl, aarch64_builtin_reciprocal): Likewise.
+ 	(aarch64_mangle_type): Call aarch64_sve::mangle_type.
+ 	(aarch64_sve_sqadd_sqsub_immediate_p): New function.
+ 	(aarch64_sve_ptrue_svpattern_p): Likewise.
+ 	(aarch64_sve_pred_valid_immediate): Check
+ 	aarch64_sve_ptrue_svpattern_p.
+ 	(aarch64_sve_ldff1_operand_p, aarch64_sve_ldnf1_operand_p)
+ 	(aarch64_sve_prefetch_operand_p, aarch64_output_sve_ptrues): New
+ 	functions.
+ 	* config/aarch64/aarch64.md (UNSPEC_LDNT1_SVE, UNSPEC_STNT1_SVE)
+ 	(UNSPEC_LDFF1_GATHER, UNSPEC_PTRUE, UNSPEC_WHILE_LE, UNSPEC_WHILE_LS)
+ 	(UNSPEC_WHILE_LT, UNSPEC_CLASTA, UNSPEC_UPDATE_FFR)
+ 	(UNSPEC_UPDATE_FFRT, UNSPEC_RDFFR, UNSPEC_WRFFR)
+ 	(UNSPEC_SVE_LANE_SELECT, UNSPEC_SVE_CNT_PAT, UNSPEC_SVE_PREFETCH)
+ 	(UNSPEC_SVE_PREFETCH_GATHER, UNSPEC_SVE_COMPACT, UNSPEC_SVE_SPLICE):
+ 	New unspecs.
+ 	* config/aarch64/iterators.md (SI_ONLY, DI_ONLY, VNx8HI_ONLY)
+ 	(VNx2DI_ONLY, SVE_PARTIAL, VNx8_NARROW, VNx8_WIDE, VNx4_NARROW)
+ 	(VNx4_WIDE, VNx2_NARROW, VNx2_WIDE, PRED_HSD): New mode iterators.
+ 	(UNSPEC_ADR, UNSPEC_BRKA, UNSPEC_BRKB, UNSPEC_BRKN, UNSPEC_BRKPA)
+ 	(UNSPEC_BRKPB, UNSPEC_PFIRST, UNSPEC_PNEXT, UNSPEC_CNTP, UNSPEC_SADDV)
+ 	(UNSPEC_UADDV, UNSPEC_FMLA, UNSPEC_FMLS, UNSPEC_FEXPA, UNSPEC_FTMAD)
+ 	(UNSPEC_FTSMUL, UNSPEC_FTSSEL, UNSPEC_COND_CMPEQ_WIDE): New unspecs.
+ 	(UNSPEC_COND_CMPGE_WIDE, UNSPEC_COND_CMPGT_WIDE): Likewise.
+ 	(UNSPEC_COND_CMPHI_WIDE, UNSPEC_COND_CMPHS_WIDE): Likewise.
+ 	(UNSPEC_COND_CMPLE_WIDE, UNSPEC_COND_CMPLO_WIDE): Likewise.
+ 	(UNSPEC_COND_CMPLS_WIDE, UNSPEC_COND_CMPLT_WIDE): Likewise.
+ 	(UNSPEC_COND_CMPNE_WIDE, UNSPEC_COND_FCADD90, UNSPEC_COND_FCADD270)
+ 	(UNSPEC_COND_FCMLA, UNSPEC_COND_FCMLA90, UNSPEC_COND_FCMLA180)
+ 	(UNSPEC_COND_FCMLA270, UNSPEC_COND_FMAX, UNSPEC_COND_FMIN): Likewise.
+ 	(UNSPEC_COND_FMULX, UNSPEC_COND_FRECPX, UNSPEC_COND_FSCALE): Likewise.
+ 	(UNSPEC_LASTA, UNSPEC_ASHIFT_WIDE, UNSPEC_ASHIFTRT_WIDE): Likewise.
+ 	(UNSPEC_LSHIFTRT_WIDE, UNSPEC_LDFF1, UNSPEC_LDNF1): Likewise.
+ 	(Vesize): Handle partial vector modes.
+ 	(self_mask, narrower_mask, sve_lane_con, sve_lane_pair_con): New
+ 	mode attributes.
+ 	(UBINQOPS, ANY_PLUS, SAT_PLUS, ANY_MINUS, SAT_MINUS): New code
+ 	iterators.
+ 	(s, paired_extend, inc_dec): New code attributes.
+ 	(SVE_INT_ADDV, CLAST, LAST): New int iterators.
+ 	(SVE_INT_UNARY): Add UNSPEC_RBIT.
+ 	(SVE_FP_UNARY, SVE_FP_UNARY_INT): New int iterators.
+ 	(SVE_FP_BINARY, SVE_FP_BINARY_INT): Likewise.
+ 	(SVE_COND_FP_UNARY): Add UNSPEC_COND_FRECPX.
+ 	(SVE_COND_FP_BINARY): Add UNSPEC_COND_FMAX, UNSPEC_COND_FMIN and
+ 	UNSPEC_COND_FMULX.
+ 	(SVE_COND_FP_BINARY_INT, SVE_COND_FP_ADD): New int iterators.
+ 	(SVE_COND_FP_SUB, SVE_COND_FP_MUL): Likewise.
+ 	(SVE_COND_FP_BINARY_I1): Add UNSPEC_COND_FMAX and UNSPEC_COND_FMIN.
+ 	(SVE_COND_FP_BINARY_REG): Add UNSPEC_COND_FMULX.
+ 	(SVE_COND_FCADD, SVE_COND_FP_MAXMIN, SVE_COND_FCMLA)
+ 	(SVE_COND_INT_CMP_WIDE, SVE_FP_TERNARY_LANE, SVE_CFP_TERNARY_LANE)
+ 	(SVE_WHILE, SVE_SHIFT_WIDE, SVE_LDFF1_LDNF1, SVE_BRK_UNARY)
+ 	(SVE_BRK_BINARY, SVE_PITER): New int iterators.
+ 	(optab): Handle UNSPEC_SADDV, UNSPEC_UADDV, UNSPEC_FRECPE,
+ 	UNSPEC_FRECPS, UNSPEC_RSQRTE, UNSPEC_RSQRTS, UNSPEC_RBIT,
+ 	UNSPEC_SMUL_HIGHPART, UNSPEC_UMUL_HIGHPART, UNSPEC_FMLA, UNSPEC_FMLS,
+ 	UNSPEC_FCMLA, UNSPEC_FCMLA90, UNSPEC_FCMLA180, UNSPEC_FCMLA270,
+ 	UNSPEC_FEXPA, UNSPEC_FTSMUL, UNSPEC_FTSSEL, UNSPEC_COND_FCADD90,
+ 	UNSPEC_COND_FCADD270, UNSPEC_COND_FCMLA, UNSPEC_COND_FCMLA90,
+ 	UNSPEC_COND_FCMLA180, UNSPEC_COND_FCMLA270, UNSPEC_COND_FMAX,
+ 	UNSPEC_COND_FMIN, UNSPEC_COND_FMULX, UNSPEC_COND_FRECPX and
+ 	UNSPEC_COND_FSCALE.
+ 	(maxmin_uns): Handle UNSPEC_COND_FMAX and UNSPEC_COND_FMIN.
+ 	(binqops_op, binqops_op_rev, last_op): New int attributes.
+ 	(su): Handle UNSPEC_SADDV and UNSPEC_UADDV.
+ 	(fn, ab): New int attributes.
+ 	(cmp_op): Handle UNSPEC_COND_CMP*_WIDE and UNSPEC_WHILE_*.
+ 	(while_optab_cmp, brk_op, sve_pred_op): New int attributes.
+ 	(sve_int_op): Handle UNSPEC_SMUL_HIGHPART, UNSPEC_UMUL_HIGHPART,
+ 	UNSPEC_ASHIFT_WIDE, UNSPEC_ASHIFTRT_WIDE, UNSPEC_LSHIFTRT_WIDE and
+ 	UNSPEC_RBIT.
+ 	(sve_fp_op): Handle UNSPEC_FRECPE, UNSPEC_FRECPS, UNSPEC_RSQRTE,
+ 	UNSPEC_RSQRTS, UNSPEC_FMLA, UNSPEC_FMLS, UNSPEC_FEXPA, UNSPEC_FTSMUL,
+ 	UNSPEC_FTSSEL, UNSPEC_COND_FMAX, UNSPEC_COND_FMIN, UNSPEC_COND_FMULX,
+ 	UNSPEC_COND_FRECPX and UNSPEC_COND_FSCALE.
+ 	(sve_fp_op_rev): Handle UNSPEC_COND_FMAX, UNSPEC_COND_FMIN and
+ 	UNSPEC_COND_FMULX.
+ 	(rot): Handle UNSPEC_COND_FCADD* and UNSPEC_COND_FCMLA*.
+ 	(brk_reg_con, brk_reg_opno): New int attributes.
+ 	(sve_pred_fp_rhs1_operand, sve_pred_fp_rhs2_operand): Handle
+ 	UNSPEC_COND_FMAX, UNSPEC_COND_FMIN and UNSPEC_COND_FMULX.
+ 	(sve_pred_fp_rhs2_immediate): Handle UNSPEC_COND_FMAX and
+ 	UNSPEC_COND_FMIN.
+ 	(max_elem_bits): New int attribute.
+ 	(min_elem_bits): Handle UNSPEC_RBIT.
+ 	* config/aarch64/predicates.md (subreg_lowpart_operator): Handle
+ 	TRUNCATE as well as SUBREG.
+ 	(ascending_int_parallel, aarch64_simd_reg_or_minus_one)
+ 	(aarch64_sve_ldff1_operand, aarch64_sve_ldnf1_operand)
+ 	(aarch64_sve_prefetch_operand, aarch64_sve_ptrue_svpattern_immediate)
+ 	(aarch64_sve_qadd_immediate, aarch64_sve_qsub_immediate)
+ 	(aarch64_sve_gather_immediate_b, aarch64_sve_gather_immediate_h)
+ 	(aarch64_sve_gather_immediate_w, aarch64_sve_gather_immediate_d)
+ 	(aarch64_sve_sqadd_operand, aarch64_sve_gather_offset_b)
+ 	(aarch64_sve_gather_offset_h, aarch64_sve_gather_offset_w)
+ 	(aarch64_sve_gather_offset_d, aarch64_gather_scale_operand_b)
+ 	(aarch64_gather_scale_operand_h): New predicates.
+ 	* config/aarch64/constraints.md (UPb, UPd, UPh, UPw, Utf, Utn, vgb)
+ 	(vgd, vgh, vgw, vsQ, vsS): New constraints.
+ 	* config/aarch64/aarch64-sve.md: Add a note on the FFR handling.
+ 	(*aarch64_sve_reinterpret<mode>): Allow any source register
+ 	instead of requiring an exact match.
+ 	(*aarch64_sve_ptruevnx16bi_cc, *aarch64_sve_ptrue<mode>_cc)
+ 	(*aarch64_sve_ptruevnx16bi_ptest, *aarch64_sve_ptrue<mode>_ptest)
+ 	(aarch64_wrffr, aarch64_update_ffr_for_load, aarch64_copy_ffr_to_ffrt)
+ 	(aarch64_rdffr, aarch64_rdffr_z, *aarch64_rdffr_z_ptest)
+ 	(*aarch64_rdffr_ptest, *aarch64_rdffr_z_cc, *aarch64_rdffr_cc)
+ 	(aarch64_update_ffrt): New patterns.
+ 	(@aarch64_load_<ANY_EXTEND:optab><VNx8_WIDE:mode><VNx8_NARROW:mode>)
+ 	(@aarch64_load_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
+ 	(@aarch64_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>)
+ 	(@aarch64_ld<fn>f1<mode>): New patterns.
+ 	(@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx8_WIDE:mode><VNx8_NARROW:mode>)
+ 	(@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
+ 	(@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>)
+ 	(@aarch64_ldnt1<mode>): New patterns.
+ 	(gather_load<mode>): Use aarch64_sve_gather_offset_<Vesize> for
+ 	the scalar part of the address.
+ 	(mask_gather_load<SVE_S:mode>): Use aarch64_sve_gather_offset_w for the
+ 	scalar part of the addresse and add an alternative for handling
+ 	nonzero offsets.
+ 	(mask_gather_load<SVE_D:mode>): Likewise aarch64_sve_gather_offset_d.
+ 	(*mask_gather_load<mode>_sxtw, *mask_gather_load<mode>_uxtw)
+ 	(@aarch64_gather_load_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
+ 	(@aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>)
+ 	(*aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_sxtw)
+ 	(*aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_uxtw)
+ 	(@aarch64_ldff1_gather<SVE_S:mode>, @aarch64_ldff1_gather<SVE_D:mode>)
+ 	(*aarch64_ldff1_gather<mode>_sxtw, *aarch64_ldff1_gather<mode>_uxtw)
+ 	(@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
+ 	(@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>)
+ 	(*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_sxtw)
+ 	(*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_uxtw)
+ 	(@aarch64_sve_prefetch<mode>): New patterns.
+ 	(@aarch64_sve_gather_prefetch<SVE_I:mode><VNx4SI_ONLY:mode>)
+ 	(@aarch64_sve_gather_prefetch<SVE_I:mode><VNx2DI_ONLY:mode>)
+ 	(*aarch64_sve_gather_prefetch<SVE_I:mode><VNx2DI_ONLY:mode>_sxtw)
+ 	(*aarch64_sve_gather_prefetch<SVE_I:mode><VNx2DI_ONLY:mode>_uxtw)
+ 	(@aarch64_store_trunc<VNx8_NARROW:mode><VNx8_WIDE:mode>)
+ 	(@aarch64_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
+ 	(@aarch64_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
+ 	(@aarch64_stnt1<mode>): New patterns.
+ 	(scatter_store<mode>): Use aarch64_sve_gather_offset_<Vesize> for
+ 	the scalar part of the address.
+ 	(mask_scatter_store<SVE_S:mode>): Use aarch64_sve_gather_offset_w for
+ 	the scalar part of the addresse and add an alternative for handling
+ 	nonzero offsets.
+ 	(mask_scatter_store<SVE_D:mode>): Likewise aarch64_sve_gather_offset_d.
+ 	(*mask_scatter_store<mode>_sxtw, *mask_scatter_store<mode>_uxtw)
+ 	(@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
+ 	(@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
+ 	(*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
+ 	(*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw):
+ 	New patterns.
+ 	(vec_duplicate<mode>): Use QI as the mode of the input operand.
+ 	(extract_last_<mode>): Generalize to...
+ 	(@extract_<LAST:last_op>_<mode>): ...this.
+ 	(*<SVE_INT_UNARY:optab><mode>2): Rename to...
+ 	(@aarch64_pred_<SVE_INT_UNARY:optab><mode>): ...this.
+ 	(@cond_<SVE_INT_UNARY:optab><mode>): New expander.
+ 	(@aarch64_pred_sxt<SVE_HSDI:mode><SVE_PARTIAL:mode>): New pattern.
+ 	(@aarch64_cond_sxt<SVE_HSDI:mode><SVE_PARTIAL:mode>): Likewise.
+ 	(@aarch64_pred_cnot<mode>, @cond_cnot<mode>): New expanders.
+ 	(@aarch64_sve_<SVE_FP_UNARY_INT:optab><mode>): New pattern.
+ 	(@aarch64_sve_<SVE_FP_UNARY:optab><mode>): Likewise.
+ 	(*<SVE_COND_FP_UNARY:optab><mode>2): Rename to...
+ 	(@aarch64_pred_<SVE_COND_FP_UNARY:optab><mode>): ...this.
+ 	(@cond_<SVE_COND_FP_UNARY:optab><mode>): New expander.
+ 	(*<SVE_INT_BINARY_IMM:optab><mode>3): Rename to...
+ 	(@aarch64_pred_<SVE_INT_BINARY_IMM:optab><mode>): ...this.
+ 	(@aarch64_adr<mode>, *aarch64_adr_sxtw): New patterns.
+ 	(*aarch64_adr_uxtw_unspec): Likewise.
+ 	(*aarch64_adr_uxtw): Rename to...
+ 	(*aarch64_adr_uxtw_and): ...this.
+ 	(@aarch64_adr<mode>_shift): New expander.
+ 	(*aarch64_adr_shift_sxtw): New pattern.
+ 	(aarch64_<su>abd<mode>_3): Rename to...
+ 	(@aarch64_pred_<su>abd<mode>): ...this.
+ 	(<su>abd<mode>_3): Update accordingly.
+ 	(@aarch64_cond_<su>abd<mode>): New expander.
+ 	(@aarch64_<SBINQOPS:su_optab><optab><mode>): New pattern.
+ 	(@aarch64_<UBINQOPS:su_optab><optab><mode>): Likewise.
+ 	(*<su>mul<mode>3_highpart): Rename to...
+ 	(@aarch64_pred_<optab><mode>): ...this.
+ 	(@cond_<MUL_HIGHPART:optab><mode>): New expander.
+ 	(*cond_<MUL_HIGHPART:optab><mode>_2): New pattern.
+ 	(*cond_<MUL_HIGHPART:optab><mode>_z): Likewise.
+ 	(*<SVE_INT_BINARY_SD:optab><mode>3): Rename to...
+ 	(@aarch64_pred_<SVE_INT_BINARY_SD:optab><mode>): ...this.
+ 	(cond_<SVE_INT_BINARY_SD:optab><mode>): Add a "@" marker.
+ 	(@aarch64_bic<mode>, @cond_bic<mode>): New expanders.
+ 	(*v<ASHIFT:optab><mode>3): Rename to...
+ 	(@aarch64_pred_<ASHIFT:optab><mode>): ...this.
+ 	(@aarch64_sve_<SVE_SHIFT_WIDE:sve_int_op><mode>): New pattern.
+ 	(@cond_<SVE_SHIFT_WIDE:sve_int_op><mode>): New expander.
+ 	(*cond_<SVE_SHIFT_WIDE:sve_int_op><mode>_m): New pattern.
+ 	(*cond_<SVE_SHIFT_WIDE:sve_int_op><mode>_z): Likewise.
+ 	(@cond_asrd<mode>): New expander.
+ 	(*cond_asrd<mode>_2, *cond_asrd<mode>_z): New patterns.
+ 	(sdiv_pow2<mode>3): Expand to *cond_asrd<mode>_2.
+ 	(*sdiv_pow2<mode>3): Delete.
+ 	(@cond_<SVE_COND_FP_BINARY_INT:optab><mode>): New expander.
+ 	(*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2): New pattern.
+ 	(*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_any): Likewise.
+ 	(@aarch64_sve_<SVE_FP_BINARY:optab><mode>): New pattern.
+ 	(@aarch64_sve_<SVE_FP_BINARY_INT:optab><mode>): Likewise.
+ 	(*<SVE_COND_FP_BINARY_REG:optab><mode>3): Rename to...
+ 	(@aarch64_pred_<SVE_COND_FP_BINARY_REG:optab><mode>): ...this.
+ 	(@aarch64_pred_<SVE_COND_FP_BINARY_INT:optab><mode>): New pattern.
+ 	(cond_<SVE_COND_FP_BINARY:optab><mode>): Add a "@" marker.
+ 	(*add<SVE_F:mode>3): Rename to...
+ 	(@aarch64_pred_add<SVE_F:mode>): ...this and add alternatives
+ 	for SVE_STRICT_GP.
+ 	(@aarch64_pred_<SVE_COND_FCADD:optab><mode>): New pattern.
+ 	(@cond_<SVE_COND_FCADD:optab><mode>): New expander.
+ 	(*cond_<SVE_COND_FCADD:optab><mode>_2): New pattern.
+ 	(*cond_<SVE_COND_FCADD:optab><mode>_any): Likewise.
+ 	(*sub<SVE_F:mode>3): Rename to...
+ 	(@aarch64_pred_sub<SVE_F:mode>): ...this and add alternatives
+ 	for SVE_STRICT_GP.
+ 	(@aarch64_pred_abd<SVE_F:mode>): New expander.
+ 	(*fabd<SVE_F:mode>3): Rename to...
+ 	(*aarch64_pred_abd<SVE_F:mode>): ...this.
+ 	(@aarch64_cond_abd<SVE_F:mode>): New expander.
+ 	(*mul<SVE_F:mode>3): Rename to...
+ 	(@aarch64_pred_<SVE_F:optab><mode>): ...this and add alternatives
+ 	for SVE_STRICT_GP.
+ 	(@aarch64_mul_lane_<SVE_F:mode>): New pattern.
+ 	(*<SVE_COND_FP_MAXMIN_PUBLIC:optab><mode>3): Rename and generalize
+ 	to...
+ 	(@aarch64_pred_<SVE_COND_FP_MAXMIN:optab><mode>): ...this.
+ 	(*<LOGICAL:optab><PRED_ALL:mode>3_ptest): New pattern.
+ 	(*<nlogical><PRED_ALL:mode>3): Rename to...
+ 	(aarch64_pred_<nlogical><PRED_ALL:mode>_z): ...this.
+ 	(*<nlogical><PRED_ALL:mode>3_cc): New pattern.
+ 	(*<nlogical><PRED_ALL:mode>3_ptest): Likewise.
+ 	(*<logical_nn><PRED_ALL:mode>3): Rename to...
+ 	(aarch64_pred_<logical_nn><mode>_z): ...this.
+ 	(*<logical_nn><PRED_ALL:mode>3_cc): New pattern.
+ 	(*<logical_nn><PRED_ALL:mode>3_ptest): Likewise.
+ 	(*fma<SVE_I:mode>4): Rename to...
+ 	(@aarch64_pred_fma<SVE_I:mode>): ...this.
+ 	(*fnma<SVE_I:mode>4): Rename to...
+ 	(@aarch64_pred_fnma<SVE_I:mode>): ...this.
+ 	(@aarch64_<sur>dot_prod_lane<vsi2qi>): New pattern.
+ 	(*<SVE_FP_TERNARY:optab><mode>4): Rename to...
+ 	(@aarch64_pred_<SVE_FP_TERNARY:optab><mode>): ...this.
+ 	(cond_<SVE_FP_TERNARY:optab><mode>): Add a "@" marker.
+ 	(@aarch64_<SVE_FP_TERNARY_LANE:optab>_lane_<mode>): New pattern.
+ 	(@aarch64_pred_<SVE_COND_FCMLA:optab><mode>): Likewise.
+ 	(@cond_<SVE_COND_FCMLA:optab><mode>): New expander.
+ 	(*cond_<SVE_COND_FCMLA:optab><mode>_4): New pattern.
+ 	(*cond_<SVE_COND_FCMLA:optab><mode>_any): Likewise.
+ 	(@aarch64_<FCMLA:optab>_lane_<mode>): Likewise.
+ 	(@aarch64_sve_tmad<mode>): Likewise.
+ 	(vcond_mask_<SVE_ALL:mode><vpred>): Add a "@" marker.
+ 	(*aarch64_sel_dup<mode>): Rename to...
+ 	(@aarch64_sel_dup<mode>): ...this.
+ 	(@aarch64_pred_cmp<cmp_op><SVE_I:mode>_wide): New pattern.
+ 	(*aarch64_pred_cmp<cmp_op><SVE_I:mode>_wide_cc): Likewise.
+ 	(*aarch64_pred_cmp<cmp_op><SVE_I:mode>_wide_ptest): Likewise.
+ 	(@while_ult<GPI:mode><PRED_ALL:mode>): Generalize to...
+ 	(@while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>): ...this.
+ 	(*while_ult<GPI:mode><PRED_ALL:mode>_cc): Generalize to.
+ 	(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_cc): ...this.
+ 	(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): New pattern.
+ 	(*fcm<cmp_op><mode>): Rename to...
+ 	(@aarch64_pred_fcm<cmp_op><mode>): ...this.  Make operand order
+ 	match @aarch64_pred_cmp<cmp_op><SVE_I:mode>.
+ 	(*fcmuo<mode>): Rename to...
+ 	(@aarch64_pred_fcmuo<mode>): ...this.  Make operand order
+ 	match @aarch64_pred_cmp<cmp_op><SVE_I:mode>.
+ 	(@aarch64_pred_fac<cmp_op><mode>): New expander.
+ 	(@vcond_mask_<PRED_ALL:mode><mode>): New pattern.
+ 	(fold_extract_last_<mode>): Generalize to...
+ 	(@fold_extract_<last_op>_<mode>): ...this.
+ 	(@aarch64_fold_extract_vector_<last_op>_<mode>): New pattern.
+ 	(*reduc_plus_scal_<SVE_I:mode>): Replace with...
+ 	(@aarch64_pred_reduc_<optab>_<mode>): ...this pattern, making the
+ 	DImode result explicit.
+ 	(reduc_plus_scal_<mode>): Update accordingly.
+ 	(*reduc_<optab>_scal_<SVE_I:mode>): Rename to...
+ 	(@aarch64_pred_reduc_<optab>_<SVE_I:mode>): ...this.
+ 	(*reduc_<optab>_scal_<SVE_F:mode>): Rename to...
+ 	(@aarch64_pred_reduc_<optab>_<SVE_F:mode>): ...this.
+ 	(*aarch64_sve_tbl<mode>): Rename to...
+ 	(@aarch64_sve_tbl<mode>): ...this.
+ 	(@aarch64_sve_compact<mode>): New pattern.
+ 	(*aarch64_sve_dup_lane<mode>): Rename to...
+ 	(@aarch64_sve_dup_lane<mode>): ...this.
+ 	(@aarch64_sve_dupq_lane<mode>): New pattern.
+ 	(@aarch64_sve_splice<mode>): Likewise.
+ 	(aarch64_sve_<perm_insn><mode>): Rename to...
+ 	(@aarch64_sve_<perm_insn><mode>): ...this.
+ 	(*aarch64_sve_ext<mode>): Rename to...
+ 	(@aarch64_sve_ext<mode>): ...this.
+ 	(aarch64_sve_<su>unpk<perm_hilo>_<SVE_BHSI:mode>): Add a "@" marker.
+ 	(*aarch64_sve_<optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>): Rename
+ 	to...
+ 	(@aarch64_sve_<optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>): ...this.
+ 	(*aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>):
+ 	Rename to...
+ 	(@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>):
+ 	...this.
+ 	(@cond_<optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>): New expander.
+ 	(@cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>): Likewise.
+ 	(*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>): New pattern.
+ 	(*aarch64_sve_<optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>): Rename
+ 	to...
+ 	(@aarch64_sve_<optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>): ...this.
+ 	(aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): Add
+ 	a "@" marker.
+ 	(@cond_<optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>): New expander.
+ 	(@cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): Likewise.
+ 	(*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): New
+ 	pattern.
+ 	(*aarch64_sve_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): Rename to...
+ 	(@aarch64_sve_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): ...this.
+ 	(@cond_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): New expander.
+ 	(*cond_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): New pattern.
+ 	(aarch64_sve_<optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>): Add a
+ 	"@" marker.
+ 	(@cond_<optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>): New expander.
+ 	(*cond_<optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>): New pattern.
+ 	(aarch64_sve_punpk<perm_hilo>_<mode>): Add a "@" marker.
+ 	(@aarch64_brk<SVE_BRK_UNARY:brk_op>): New pattern.
+ 	(*aarch64_brk<SVE_BRK_UNARY:brk_op>_cc): Likewise.
+ 	(*aarch64_brk<SVE_BRK_UNARY:brk_op>_ptest): Likewise.
+ 	(@aarch64_brk<SVE_BRK_BINARY:brk_op>): Likewise.
+ 	(*aarch64_brk<SVE_BRK_BINARY:brk_op>_cc): Likewise.
+ 	(*aarch64_brk<SVE_BRK_BINARY:brk_op>_ptest): Likewise.
+ 	(@aarch64_sve_<SVE_PITER:sve_pred_op><mode>): Likewise.
+ 	(*aarch64_sve_<SVE_PITER:sve_pred_op><mode>_cc): Likewise.
+ 	(*aarch64_sve_<SVE_PITER:sve_pred_op><mode>_ptest): Likewise.
+ 	(aarch64_sve_cnt_pat): Likewise.
+ 	(@aarch64_sve_<ANY_PLUS:inc_dec><DI_ONLY:mode>_pat): Likewise.
+ 	(*aarch64_sve_incsi_pat): Likewise.
+ 	(@aarch64_sve_<SAT_PLUS:inc_dec><SI_ONLY:mode>_pat): Likewise.
+ 	(@aarch64_sve_<ANY_PLUS:inc_dec><VNx2DI_ONLY:mode>_pat): Likewise.
+ 	(@aarch64_sve_<ANY_PLUS:inc_dec><VNx4SI_ONLY:mode>_pat): Likewise.
+ 	(@aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_pat): New expander.
+ 	(*aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_pat): New pattern.
+ 	(@aarch64_sve_<ANY_MINUS:inc_dec><DI_ONLY:mode>_pat): Likewise.
+ 	(*aarch64_sve_decsi_pat): Likewise.
+ 	(@aarch64_sve_<SAT_MINUS:inc_dec><SI_ONLY:mode>_pat): Likewise.
+ 	(@aarch64_sve_<ANY_MINUS:inc_dec><VNx2DI_ONLY:mode>_pat): Likewise.
+ 	(@aarch64_sve_<ANY_MINUS:inc_dec><VNx4SI_ONLY:mode>_pat): Likewise.
+ 	(@aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_pat): New expander.
+ 	(*aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_pat): New pattern.
+ 	(@aarch64_pred_cntp<mode>): Likewise.
+ 	(@aarch64_sve_<ANY_PLUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp):
+ 	New expander.
+ 	(*aarch64_sve_<ANY_PLUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp)
+ 	(*aarch64_incsi<PRED_ALL:mode>_cntp): New patterns.
+ 	(@aarch64_sve_<SAT_PLUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp):
+ 	New expander.
+ 	(*aarch64_sve_<SAT_PLUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp):
+ 	New pattern.
+ 	(@aarch64_sve_<ANY_PLUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New expander.
+ 	(*aarch64_sve_<ANY_PLUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New pattern.
+ 	(@aarch64_sve_<ANY_PLUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New expander.
+ 	(*aarch64_sve_<ANY_PLUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New pattern.
+ 	(@aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New expander.
+ 	(*aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New pattern.
+ 	(@aarch64_sve_<ANY_MINUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp):
+ 	New expander.
+ 	(*aarch64_sve_<ANY_MINUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp)
+ 	(*aarch64_incsi<PRED_ALL:mode>_cntp): New patterns.
+ 	(@aarch64_sve_<SAT_MINUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp):
+ 	New expander.
+ 	(*aarch64_sve_<SAT_MINUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp):
+ 	New pattern.
+ 	(@aarch64_sve_<ANY_MINUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New
+ 	expander.
+ 	(*aarch64_sve_<ANY_MINUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New pattern.
+ 	(@aarch64_sve_<ANY_MINUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New
+ 	expander.
+ 	(*aarch64_sve_<ANY_MINUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New pattern.
+ 	(@aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New
+ 	expander.
+ 	(*aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New pattern.
+ 	* config/aarch64/arm_sve.h: New file.
+ 	* config/aarch64/aarch64-sve-builtins.h: Likewise.
+ 	* config/aarch64/aarch64-sve-builtins.cc: Likewise.
+ 	* config/aarch64/aarch64-sve-builtins.def: Likewise.
+ 	* config/aarch64/aarch64-sve-builtins-base.h: Likewise.
+ 	* config/aarch64/aarch64-sve-builtins-base.cc: Likewise.
+ 	* config/aarch64/aarch64-sve-builtins-base.def: Likewise.
+ 	* config/aarch64/aarch64-sve-builtins-functions.h: Likewise.
+ 	* config/aarch64/aarch64-sve-builtins-shapes.h: Likewise.
+ 	* config/aarch64/aarch64-sve-builtins-shapes.cc: Likewise.
+ 
+ 2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (@aarch64_sve_rev<PRED_ALL:mode>):
+ 	New pattern.
+ 	* config/aarch64/aarch64.c (aarch64_evpc_rev_global): Handle all
+ 	SVE modes.
+ 
+ 2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.md (FFR_REGNUM, FFRT_REGNUM): New constants.
+ 	* config/aarch64/aarch64.h (FIRST_PSEUDO_REGISTER): Bump to
+ 	FFRT_REGNUM + 1.
+ 	(FFR_REGS, PR_AND_FFR_REGS): New register classes.
+ 	(REG_CLASS_NAMES, REG_CLASS_CONTENTS): Add entries for them.
+ 	* config/aarch64/aarch64.c (pr_or_ffr_regnum_p): New function.
+ 	(aarch64_hard_regno_nregs): Handle the new register classes.
+ 	(aarch64_hard_regno_mode_ok): Likewise.
+ 	(aarch64_regno_regclass): Likewise.
+ 	(aarch64_class_max_nregs): Likewise.
+ 	(aarch64_register_move_cost): Likewise.
+ 	(aarch64_conditional_register_usage): Don't treat FFR and FFRT
+ 	as general register_operands.
+ 
+ 2019-10-29  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ggc-common.c: One can't subtract unsigned types
+ 	in compare function.
+ 
+ 2019-10-29  Martin Liska  <mliska@suse.cz>
+ 
+ 	* cgraphunit.c (symbol_table::compile): Pass
+ 	title as dump_memory_report argument.
+ 	* toplev.c (dump_memory_report):  New argument.
+ 	(finalize): Pass new argument.
+ 	* toplev.h (dump_memory_report): Add argument.
+ 
+ 2019-10-29  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ggc-common.c: Move Leak to the first column.
+ 
+ 2019-10-29  Martin Liska  <mliska@suse.cz>
+ 
+ 	* cgraphunit.c (symbol_table::compile): Remove argument
+ 	for dump_memory_report.
+ 	* ggc-common.c (dump_ggc_loc_statistics): Likewise.
+ 	(compare_final): Remove in order to make report
+ 	better readable.
+ 	* ggc.h (dump_ggc_loc_statistics):  Remove argument.
+ 	* mem-stats.h (mem_alloc_description::get_list):
+ 	Do not pass cmp.
+ 	(mem_alloc_description::dump): Likewise here.
+ 	* toplev.c (dump_memory_report): Remove final
+ 	argument.
+ 	(finalize): Likewise.
+ 	* toplev.h (dump_memory_report): Remove argument.
+ 
+ 2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_sve_cmp_immediate_p)
+ 	(aarch64_simd_shift_imm_p): Accept scalars as well as vectors.
+ 	* config/aarch64/predicates.md (aarch64_sve_cmp_vsc_immediate)
+ 	(aarch64_sve_cmp_vsd_immediate): Accept "const_int", but don't
+ 	accept "const".
+ 
+ 2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* coretypes.h (string_int_pair): New typedef.
+ 	* langhooks-def.h (LANG_HOOKS_SIMULATE_ENUM_DECL): Define.
+ 	(LANG_HOOKS_FOR_TYPES_INITIALIZER): Include it.
+ 	* langhooks.h (lang_hooks_for_types::simulate_enum_decl): New hook.
+ 
+ 2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* langhooks.h (lang_hooks::simulate_builtin_function_decl): New hook.
+ 	(simulate_builtin_function_decl): Declare.
+ 	* langhooks-def.h (LANG_HOOKS_SIMULATE_BUILTIN_FUNCTION_DECL): Define.
+ 	(LANG_HOOKS_INITIALIZER): Include it.
+ 	* langhooks.c (add_builtin_function_common): Rename to...
+ 	(build_builtin_function): ...this.  Add a location parameter and use
+ 	it instead of BUILTINS_LOCATION.  Remove the hook parameter and return
+ 	the decl instead.
+ 	(add_builtin_function): Update accordingly, passing the returned
+ 	decl to the lang hook.
+ 	(add_builtin_function_ext_scope): Likewise
+ 	(simulate_builtin_function_decl): New function.
+ 
+ 2019-10-29  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* doc/install.texi (--enable-offload-targets): Fix up a typo in the
+ 	example, use actual names of supported offload targets.
+ 
+ 	PR target/92258
+ 	* config/i386/sse.md (iptr): Revert 2019-10-27 change.
+ 
+ 2019-10-28  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* tree-ssa-strlen.c (get_addr_stridx): Add argument and use it.
+ 	(handle_store): Pass argument to get_addr_stridx.
+ 
+ 2019-10-28  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/92226
+ 	* tree-ssa-strlen.c (compare_nonzero_chars): Return -1 also when
+ 	the offset is in the open range outlined by SI's length.
+ 
+ 2019-10-28  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR c/66970
+ 	* doc/cpp.texi (__has_builtin): Document.
+ 	* doc/extend.texi (__builtin_frob_return_addr): Correct spelling.
+ 
+ 2019-10-28  Mihailo Stojanovic  <mistojanovic@wavecomp.com>
+ 
+ 	PR target/82981
+ 	* config/mips/mips.md (<u>mulditi3): Generate patterns for high
+ 	doubleword and low doubleword result of multiplication on
+ 	MIPS64R6.
+ 
+ 	* config/mips/mips.c (DIRECT_BUILTIN_PURE): New macro. Add a
+ 	pure qualifier to the built-in.
+ 	(MSA_BUILTIN_PURE): New macro. Add a pure qualifier to the MSA
+ 	built-ins.
+ 	(struct mips_builtin_description): Add is_pure flag.
+ 	(mips_init_builtins): Mark built-in as pure if the flag in the
+ 	corresponding mips_builtin_description struct is set.
+ 
+ 	* config/mips/mips-msa.md (msa_insert_<msaftm_f>): Add an
+ 	alternative which covers the floating-point input value. Also
+ 	forbid the split of insert.d pattern for floating-point values.
+ 
+ 2019-10-28  Andrew Burgess  <andrew.burgess@embecosm.com>
+ 
+ 	* config.gcc: Add riscv-sr.o to extra_objs for riscv.
+ 	* config/riscv/riscv-sr.c: New file.
+ 	* config/riscv/riscv.c (riscv_reorg): New function.
+ 	(TARGET_MACHINE_DEPENDENT_REORG): Define.
+ 	* config/riscv/riscv.h (SIBCALL_REG_P): Define.
+ 	(riscv_remove_unneeded_save_restore_calls): Declare.
+ 	* config/riscv/t-riscv (riscv-sr.o): New build rule.
+ 
+ 2019-10-28  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	PR tree-optimization/92163
+ 	* tree-ssa-dse.c (delete_dead_or_redundant_assignment): New param
+ 	need_eh_cleanup with default value NULL. Gate on need_eh_cleanup
+ 	before calling bitmap_set_bit.
+ 	(dse_optimize_redundant_stores): Pass global need_eh_cleanup to
+ 	delete_dead_or_redundant_assignment.
+ 	(dse_dom_walker::dse_optimize_stmt): Likewise.
+ 	* tree-ssa-dse.h (delete_dead_or_redundant_assignment): Adjust prototype.
+ 
+ 2019-10-28  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	PR middle-end/91272
+ 	* tree-vect-stmts.c (vectorizable_condition): Support
+ 	EXTRACT_LAST_REDUCTION with fully-masked loops.
+ 
+ 2019-10-28  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92252
+ 	* tree-vect-slp.c (vect_get_and_check_slp_defs): Adjust
+ 	STMT_VINFO_REDUC_IDX when swapping operands.
+ 
+ 2019-10-28  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92241
+ 	* tree-vect-loop.c (vect_fixup_scalar_cycles_with_patterns): When
+ 	we failed to update the reduction index do not use the pattern
+ 	stmts for the reduction chain.
+ 	(vectorizable_reduction): When the reduction chain is corrupt,
+ 	fail.
+ 	* tree-vect-patterns.c (vect_mark_pattern_stmts): Stop when we
+ 	fail to update the reduction chain.
+ 
+ 2019-10-28  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): Use
+ 	STMT_VINFO_REDUC_IDX from the actual stmt.
+ 	(vect_transform_reduction): Likewise.
+ 	(vectorizable_reduction): Compute the reduction chain length,
+ 	do not recompute the reduction operand index.  Remove no longer
+ 	necessary restriction for condition reduction chains.
+ 
+ 2019-10-28  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/92225
+ 	* config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE4_2
+ 	condition for V2DImode.
+ 
+ 2019-10-28  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/sse.md (sse_cvtss2si<rex64namesuffix>_2):
+ 	Remove %k operand modifier.
+ 	(*vec_extractv2df_1_sse): Remove %q operand modifier.
+ 
+ 2019-10-28  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	PR rtl-optimization/92007
+ 	* cfgcleanup.c (thread_jump): Add an assertion that we don't
+ 	call it after reload if hot/cold partitioning has been done.
+ 	(class pass_postreload_jump): Rename to
+ 	pass_jump_after_combine.
+ 	(make_pass_postreload_jump): Rename to
+ 	make_pass_jump_after_combine.
+ 	* passes.def(pass_postreload_jump): Move before reload, rename
+ 	to pass_jump_after_combine.
+ 	* tree-pass.h (make_pass_postreload_jump): Rename to
+ 	make_pass_jump_after_combine.
+ 
+ 2019-10-25  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR ipa/92242
+ 	* ipa-fnsummary.c (ipa_merge_fn_summary_after_inlining): Check
+ 	for missing EDGE_REF
+ 	* ipa-prop.c (update_jump_functions_after_inlining): Likewise.
+ 
+ 2019-10-25  Jiufu Guo  <guojiufu@linux.ibm.com>
+ 
+ 	PR tree-optimization/88760
+ 	* config/rs6000/rs6000-common.c (rs6000_option_optimization_table):
+ 	Enable -funroll-loops for -O2 and above.
+ 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Set
+ 	PARAM_MAX_UNROLL_TIMES to 2 and PARAM_MAX_UNROLLED_INSNS to 20, and
+ 	do not turn on web and rngreg implicitly, if the unroller is not
+ 	explicitly enabled.
+ 
+ 2019-10-27  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-prop.c (ipa_propagate_indirect_call_infos): Do not remove
+ 	jump functions.
+ 
+ 2019-10-27  Eric Botcazou <ebotcazou@adacore.com>
+ 
+ 	* cgraph.c (cgraph_node::rtl_info): Fix cut&pasto in comment.
+ 	* cgraph.h (cgraph_node::rtl_info): Likewise.
+ 
+ 2019-10-27  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-cp.c (propagate_constants_across_call): If args are not available
+ 	just drop everything to varying.
+ 	(find_aggregate_values_for_callers_subset): Watch for missing
+ 	edge summary.
+ 	(find_more_scalar_values_for_callers_subs): Likewise.
+ 	* ipa-prop.c (ipa_compute_jump_functions_for_edge,
+ 	update_jump_functions_after_inlining, propagate_controlled_uses):
+ 	Watch for missing summaries.
+ 	(ipa_propagate_indirect_call_infos): Remove summary after propagation
+ 	is finished.
+ 	(ipa_write_node_info): Watch for missing summaries.
+ 	(ipa_read_edge_info): Create new ref.
+ 	(ipa_edge_args_sum_t): Add remove.
+ 	(IPA_EDGE_REF_GET_CREATE): New macro.
+ 	* ipa-fnsummary.c (evaluate_properties_for_edge): Watch for missing
+ 	edge summary.
+ 	(remap_edge_change_prob): Likewise.
+ 
+ 2019-10-27  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline-transform.c (inline_call): update function summaries
+ 	after expanidng thunk.
+ 
+ 2019-10-27  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-icf.c (sem_function::merge): Update function summaries.
+ 	* ipa-prop.h (ipa_get_param): Do not sanity check for WPA.
+ 
+ 2019-10-27  Hongtao Liu  <hongtao.liu@intel.com>
+ 
+ 	* config/i386/sse.md (*<sse>_vm<plusminus_insn><mode>3,
+ 	<sse>_vm<multdiv_mnemonic><mode>3): Remove <iptr> since
+ 	operand already has scalar mode.
+ 	(iptr): Remove SF/DF.
+ 
+ 2019-10-26  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR target/91289
+ 	* config/rs6000/rs6000-logue.c (rs6000_emit_allocate_stack): Don't add
+ 	an immediate to r0; use r11 instead.  Save and restore r11 to r0 around
+ 	this.
+ 
+ 2019-10-26  Hongtao Liu  <hongtao.liu@intel.com>
+ 
+ 	* config/i386/sse.md
+ 	(<sse>_vm<plusminus_insn><mode>3<mask_scalar_name><round_scalar_name>,
+ 	<sse>_vm<multdiv_mnemonic><mode>3<mask_scalar_name><round_scalar_name>,
+ 	<sse>_vmsqrt<mode>2<mask_scalar_name><round_scalar_name>,
+ 	<sse>_vm<code><mode>3<mask_scalar_name><round_saeonly_scalar_name>,
+ 	<sse>_vmmaskcmp<mode>3):
+ 	Change predicates from vector_operand to nonimmediate_operand,
+ 	constraints xBm to xm, since scalar operations don't need
+ 	memory address alignment.
+ 	(avx512f_vmcmp<mode>3<round_saeonly_name>,
+ 	avx512f_vmcmp<mode>3_mask<round_saeonly_name>): Replace
+ 	round_saeonly_nimm_predicate with
+ 	round_saeonly_nimm_scalar_predicate.
+ 	(fmai_vmfmadd_<mode><round_name>, fmai_vmfmsub_<mode><round_name>,
+ 	fmai_vmfnmadd_<mode><round_name>,fmai_vmfnmsub_<mode><round_name>,
+ 	*fmai_fmadd_<mode>, *fmai_fmsub_<mode>,
+ 	*fmai_fnmadd_<mode><round_name>, *fmai_fnmsub_<mode><round_name>,
+ 	avx512f_vmfmadd_<mode>_mask3<round_name>,
+ 	avx512f_vmfmadd_<mode>_maskz_1<round_name>,
+ 	*avx512f_vmfmsub_<mode>_mask<round_name>,
+ 	avx512f_vmfmsub_<mode>_mask3<round_name>,
+ 	*avx512f_vmfmsub_<mode>_maskz_1<round_name>,
+ 	*avx512f_vmfnmadd_<mode>_mask<round_name>,
+ 	*avx512f_vmfnmadd_<mode>_mask3<round_name>,
+ 	*avx512f_vmfnmadd_<mode>_maskz_1<round_name>,
+ 	*avx512f_vmfnmsub_<mode>_mask<round_name>,
+ 	*avx512f_vmfnmsub_<mode>_mask3<round_name>,
+ 	*avx512f_vmfnmsub_<mode>_maskz_1<round_name>,
+ 	cvtusi2<ssescalarmodesuffix>32<round_name>,
+ 	cvtusi2<ssescalarmodesuffix>64<round_name>, ): Replace
+ 	round_nimm_predicate with round_nimm_scalr_predicate.
+ 	(avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>,
+ 	avx512f_sfixupimm<mode>_mask<round_saeonly_name>,
+ 	avx512er_vmrcp28<mode><round_saeonly_name>,
+ 	avx512er_vmrsqrt28<mode><round_saeonly_name>,
+ 	): Replace round_saeonly_nimm_predicate with
+ 	round_saeonly_nimm_scalar_predicate.
+ 	(avx512dq_vmfpclass<mode><mask_scalar_merge_name>): Replace
+ 	vector_operand with nonimmediate_operand.
+ 	* config/i386/subst.md (round_scalar_nimm_predicate,
+ 	round_saeonly_scalar_nimm_predicate): Replace
+ 	vector_operand with nonimmediate_operand.
+ 
+ 2019-10-26  Hongtao Liu  <hongtao.liu@intel.com>
+ 
+ 	PR target/89071
+ 	* config/i386/i386.md (*rcpsf2_sse): Add
+ 	avx_partial_xmm_update, prefer m constraint for TARGET_AVX.
+ 	(*rsqrtsf2_sse): Ditto.
+ 	(*sqrt<mode>2_sse): Ditto.
+ 	(sse4_1_round<mode>2): separate constraint vm, add
+ 	avx_partail_xmm_update, prefer m constraint for TARGET_AVX.
+ 	* config/i386/sse.md (*sse_vmrcpv4sf2"): New define_insn used
+ 	by pass rpad.
+ 	(*<sse>_vmsqrt<mode>2<mask_scalar_name><round_scalar_name>*):
+ 	Ditto.
+ 	(*sse_vmrsqrtv4sf2): Ditto.
+ 	(*avx512f_rndscale<mode><round_saeonly_name>): Ditto.
+ 	(*sse4_1_round<ssescalarmodesuffix>): Ditto.
+ 	(sse4_1_round<ssescalarmodesuffix>): Add m constraint and
+ 	<iptr> pointer size modifier since vround support memory operand.
+ 
+ 2019-10-18  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/85969
+ 	* config/avr/gen-avr-mmcu-specs.c (str_prefix_p): Remove unused
+ 	static function.
+ 
+ 2019-10-25  Cesar Philippidis <cesar@codesourcery.com>
+ 	    Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	* gimplify.c (oacc_default_clause): Privatize fortran common blocks.
+ 	(omp_notice_variable): Defer the expansion of DECL_VALUE_EXPR for
+ 	common block decls.
+ 
+ 2019-10-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92222
+ 	* tree-vect-slp.c (_slp_oprnd_info::first_pattern): Remove.
+ 	(_slp_oprnd_info::second_pattern): Likewise.
+ 	(_slp_oprnd_info::any_pattern): New.
+ 	(vect_create_oprnd_info): Adjust.
+ 	(vect_get_and_check_slp_defs): Compute whether any stmt is
+ 	in a pattern.
+ 	(vect_build_slp_tree_2): Avoid building up a node from scalars
+ 	if any of the operand defs, not just the first, is in a pattern.
+ 
+ 2019-10-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-slp.c (vect_get_and_check_slp_defs): Only fail
+ 	swapping if we actually have to modify the IL on a shared stmt.
+ 	(vect_build_slp_tree_2): Never fail swapping on shared stmts
+ 	because we no longer modify the IL.
+ 
+ 2019-10-25  Martin Liska  <mliska@suse.cz>
+ 
+ 	* tree.c (dump_tree_statistics): Use sorted index 'j' and not 'i'.
+ 
+ 2019-10-25  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-loop.c (vectorizable_reduction): Restrict the
+ 	LOOP_VINFO_CAN_FULLY_MASK_P handling to cases that will be
+ 	handled by vect_transform_reduction.  Allow fully-masked loops
+ 	to be used with reduction chains.
+ 	* tree-vect-stmts.c (vectorizable_operation): Handle reduction
+ 	operations in fully-masked loops.
+ 	(vectorizable_condition): Reject EXTRACT_LAST_REDUCTION
+ 	operations in fully-masked loops.
+ 
+ 2019-10-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (vectorizable_reduction): Verify
+ 	STMT_VINFO_REDUC_IDX on the to be vectorized stmts is set up
+ 	correctly.
+ 	* tree-vect-patterns.c (vect_mark_pattern_stmts): Transfer
+ 	STMT_VINFO_REDUC_IDX from the original stmts to the pattern
+ 	stmts.
+ 
+ 2019-10-24  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gimplify.h (omp_construct_selector_matches): Declare.
+ 	* gimplify.c (struct gimplify_omp_ctx): Add code member.
+ 	(gimplify_call_expr): Call omp_resolve_declare_variant and remap
+ 	called function if needed for flag_openmp.
+ 	(gimplify_scan_omp_clauses): Set ctx->code.
+ 	(omp_construct_selector_matches): New function.
+ 	* omp-general.h (omp_constructor_traits_to_codes,
+ 	omp_context_selector_matches, omp_resolve_declare_variant): Declare.
+ 	* omp-general.c (omp_constructor_traits_to_codes,
+ 	omp_context_selector_matches, omp_resolve_declare_variant): New
+ 	functions.
+ 
+ 	* config/arc/arc.c (hwloop_optimize): Add missing space in string
+ 	literal.
+ 	* config/rx/rx.c (rx_print_operand): Likewise.
+ 	* tree-vect-data-refs.c (vect_analyze_data_refs): Likewise.
+ 	* tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Likewise.
+ 	* ipa-sra.c (create_parameter_descriptors, process_scan_results):
+ 	Likewise.
+ 	* genemit.c (emit_c_code): Likewise.
+ 	* plugin.c (try_init_one_plugin): Likewise.  Formatting fix.
+ 
+ 2019-10-24  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* symbols-summary.h (fast_function_summary<T *, V>::release,
+ 	fast_call_summary<T *, V>::release): Free m_vector.
+ 
+ 2019-10-24  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cgraphunit.c (symbol_table::process_new_functions): Call
+ 	ipa_free_size_summary.
+ 	* ipa-cp.c (ipcp_cloning_candidate_p): Update.
+ 	(devirtualization_time_bonus): Update.
+ 	(ipcp_propagate_stage): Update.
+ 	* ipa-fnsummary.c (ipa_size_summaries): New.
+ 	(ipa_fn_summary_alloc): Alloc size summary.
+ 	(dump_ipa_call_summary): Update.
+ 	(ipa_dump_fn_summary): Update.
+ 	(analyze_function_body): Update.
+ 	(compute_fn_summary): Likewise.
+ 	(ipa_get_stack_frame_offset): New function.
+ 	(inline_update_callee_summaries): Do not update frame offsets.
+ 	(ipa_merge_fn_summary_after_inlining): Update frame offsets here;
+ 	remove call and function summary.
+ 	(ipa_update_overall_fn_summary): Update.
+ 	(inline_read_section): Update.
+ 	(ipa_fn_summary_write): Update.
+ 	(ipa_free_fn_summary): Do not remove summaries.
+ 	(ipa_free_size_summary): New.
+ 	(release summary pass): Also run at WPA.
+ 	* ipa-fnsummary.h (ipa_size_summary): Declare.
+ 	(ipa_fn_summary): Remove size, self_size, stack_frame_offset,
+ 	estimated_self_stack_size.
+ 	(ipa_size_summary_t): New type.
+ 	(ipa_size_summaries): Declare.
+ 	(ipa_free_size_summary): Declare.
+ 	(ipa_get_stack_frame_offset): Declare.
+ 	* ipa-icf.c (sem_function::merge): Update.
+ 	* ipa-inline-analysis.c (estimate_size_after_inlining): Update.
+ 	(estimate_growth): Update.
+ 	(growth_likely_positive): Update.
+ 	(clone_inlined_nodes): Update.
+ 	(inline_call): Update.
+ 	* ipa-inline.c (caller_growth_limits): Update.
+ 	(edge_badness): Update.
+ 	(recursive_inlining): Update.
+ 	(inline_small_functions): Update.
+ 	(inline_to_all_callers_1): Update.
+ 	* ipa-prop.h (ipa_edge_args_sum_t): Update comment.
+ 
+ 2019-10-24  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/altivec.md (altivec_vavgu<VI_char>): Rename to...
+ 	(uavg<mode>3_ceil): ... This.
+ 	(altivec_vavgs<VI_char>): Rename to...
+ 	(avg<mode>3_ceil): ... This.
+ 	* config/rs6000/rs6000-builtin.def (VAVGUB, VAVGSB, VAVGUH, VAVGSH,
+ 	VAVGUW, VAVGSW): Adjust.
+ 
+ 2019-10-24  Nathan Sidwell  <nathan@acm.org>
+ 
+ 	* dumpfile.c (dump_begin): Reorder decls to use RAII.
+ 
+ 2019-10-24  Martin Liska  <mliska@suse.cz>
+ 
+ 	* symbol-summary.h (gt_pch_nx): Mark all functions
+ 	with gcc_unreachable as we do not expect to be called.
+ 
+ 2019-10-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-slp.c (vect_get_and_check_slp_defs): For reduction
+ 	chains try harder with operand swapping and instead of
+ 	putting a shifted chain into the reduction operands put
+ 	a repetition of the final reduction op there as if we'd
+ 	reassociate the expression.
+ 
+ 2019-10-24  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-reference.c (ipa_reference_optimization_summary_d): Rename
+ 	statics_not_read and statics_not_written to statics_read and
+ 	statics_written respectively.
+ 	(no_module_statics): New static var.
+ 	(ipa_reference_get_not_read_global): Rename to ...
+ 	(ipa_reference_get_read_global): ... this.
+ 	(ipa_reference_get_not_written_global): Rename to ...
+ 	(ipa_reference_get_written_global): ... this.
+ 	(dump_static_vars_set_to_file): Dump no_module_statics.
+ 	(copy_static_var_set): Add for propagation parameter.
+ 	(ipa_init): Initialize no_module_statics.
+ 	(ipa_ref_opt_summary_t::duplicate): Update.
+ 	(ipa_ref_opt_summary_t::remove): Update.
+ 	(propagate): Update.
+ 	(write_node_summary_p): Look correctly for bitmap differences.
+ 	(ipa_reference_write_optimization_summary): Update.
+ 	(ipa_reference_read_optimization_summary): Update.
+ 	* ipa-reference.h
+ 	(ipa_reference_get_not_read_global): Rename to ...
+ 	(ipa_reference_get_read_global): ... this.
+ 	(ipa_reference_get_not_written_global): Rename to ...
+ 	(ipa_reference_get_written_global): ... this.
+ 	* tree-ssa-alias.c (ref_maybe_used_by_call_p_1): Update.
+ 	(call_may_clobber_ref_p_1): Update.
+ 
+ 2019-10-24  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.c (msp430_hard_regno_nregs_has_padding): Remove
+ 	and add comment.
+ 	(msp430_hard_regno_nregs_with_padding): Remove.
+ 
+ 2019-10-24  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/constraints.md: Allow post_inc for "Ya" constraint.
+ 	* config/msp430/msp430.md (430x_shift_left): Use RLAM when the constant
+ 	shift amount is between 1 and 4.
+ 	(430x_arithmetic_shift_right): Use RRAM when the constant shift amount
+ 	is between 1 and 4.
+ 
+ 2019-10-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92205
+ 	* tree-vect-loop.c (vectorizable_reduction): Restrict
+ 	search for alternate vectype_in to lane-reducing patterns
+ 	we support.
+ 
+ 2019-10-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92203
+ 	* treee-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt):
+ 	Skip eliminating conversion stmts inserted by insertion.
+ 
+ 2019-10-24  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	* config/s390/s390.c (s390_get_thread_pointer): Use
+ 	gen_get_thread_pointer.
+ 	(s390_expand_split_stack_prologue): Likewise.
+ 	* config/s390/s390.md (UNSPEC_GET_TP): New UNSPEC.
+ 	(*get_tp_31): New 31-bit splitter for UNSPEC_GET_TP.
+ 	(*get_tp_64): New 64-bit splitter for UNSPEC_GET_TP.
+ 	(get_thread_pointer<mode>): Use UNSPEC_GET_TP, use
+ 	parameterized name.
+ 
+ 2019-10-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-slp.c (vect_analyze_slp): When reduction group
+ 	SLP discovery fails try to handle the reduction as part
+ 	of SLP reduction discovery.
+ 
+ 2019-10-23  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-protos.h (rs6000_adjust_insn_length): New
+ 	declaration.
+ 	* config/rs6000/rs6000.c (rs6000_insn_cost): Use num_insns insn
+ 	attribute if it exists, rather than the insn size.  If we use the
+ 	insn size, adjust the size to remove the extra size that prefixed
+ 	instructions take.
+ 	(rs6000_adjust_insn_length): New function.
+ 	* config/rs6000/rs6000.h (ADJUST_INSN_LENGTH): New target hook to
+ 	update the instruction sized if prefixed instructions are used.
+ 	* config/rs6000/rs6000.md (prefixed_length attribute): Delete.
+ 	(non_prefixed_length attribute): Delete.
+ 	(num_insns attribute): New insn attribute to return the number of
+ 	instructions.
+ 	(max_prefixed_insns attribute): New insn attribute to return the
+ 	maximum number of prefixed instructions in an insn.
+ 	(length attribute): Do not adjust for prefix instructions here,
+ 	punt to ADJUST_INSN_LENGTH.
+ 	(mov<mode>_64bit): Set max_prefixed_insns and num_insns.
+ 	(movtd_64bit_nodm): Set max_prefixed_insns and num_insns.
+ 	(mov<mode>_ppc64): Set max_prefixed_insns and num_insns.
+ 	* config/rs6000/vsx.md: (vsx_mov<mode>_64bit): Set
+ 	max_prefixed_insns and num_insns.
+ 
+ 	* config/rs6000/rs6000.md (mov<mode>_64bit_dm): Reformat.
+ 	(movtd_64bit_nodm): Reformat.
+ 	(mov<mode>_32bit): Reformat.
+ 	(mov<mode>_softfloat): Reformat.
+ 	(FMOVE128_GPR splitter): Reformat.
+ 	(DIFD splitter): Reformat.
+ 	(TI2 splitter): Reformat.
+ 	* config/rs6000/predicates.md (lwa_operand): If the bottom two
+ 	bits of the offset for the memory address are non-zero, use PLWA
+ 	if prefixed instructions are available.
+ 
+ 2019-10-23  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* lto-streamer-out.c (cmp_symbol_files): Watch for overflow.
+ 
+ 2019-10-23  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-reference.c (varpool_removal_hook, ipa_reference_c_finalize): Fix
+ 	previous patch.
+ 
+ 2019-10-23  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* lto-streamer-out.c (output_constructor): Push CTORS_OUT timevar.
+ 	(cmp_symbol_files): New.
+ 	(lto_output): Copy sections in file order.
+ 	* lto-streamer.h (lto_file_decl_data): Add field order.
+ 
+ 2019-10-23  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-reference.h (ipa_reference_var_uid): Move offline.
+ 	* ipa-reference.c (reference_vars_map_t): new type.
+ 	(ipa_reference_vars_map, ipa_reference_vars_uids): New static vars.
+ 	(ipa_reference_var_uid): Implement.
+ 	(varpool_node_hooks): New static var.
+ 	(varpool_removal_hook): New function.
+ 	(is_improper): Do not check bitmap for id==-1
+ 	(get_static_name): Update.
+ 	(ipa_init): Initialize new datastructures.
+ 	(analyze_function): Do not recompute ids.
+ 	(propagate): Free reference_vars_to_consider.
+ 	(stream_out_bitmap): Update.
+ 	(ipa_reference_read_optimization_summary): Update.
+ 
+ 2019-10-23  qing zhao  <qing.zhao@oracle.com>
+ 
+ 	PR gcov-profile/91971
+ 	* coverage.c (coverage_init): Mangle the full path of filename when
+ 	filename is a absolute path.
+ 
+ 2019-10-23  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430-protos.h (msp430_has_hwmult): New.
+ 	* config/msp430/msp430.c (msp430_no_hwmult): Remove.
+ 	(msp430_has_hwmult): New.
+ 	(msp430_output_labelref):
+ 	s/msp430_hwmult_type != MSP430_HWMULT_NONE/msp430_has_hwmult ()/
+ 	* config/msp430/msp430.md (mulhisi3): Likewise.
+ 	(umulhisi3): Likewise.
+ 	(mulsidi3): Likewise.
+ 	(umulsidi3): Likewise.
+ 
+ 2019-10-23  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR ipa/92074
+ 	* params.def (inline-heuristics-hint-percent): Set to 600.
+ 
+ 2019-10-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/65930
+ 	* tree-vect-loop.c (check_reduction_path): Allow conversions
+ 	that only change the sign.
+ 	(vectorizable_reduction): Relax latch def stmts we handle further.
+ 
+ 2019-10-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR debug/90231
+ 	* tree-ssa-loop-ivopts.c (get_debug_computation_at): New function.
+ 	(remove_unused_ivs): Use it instead of get_computation_at.  When
+ 	choosing best candidate, only consider candidates where
+ 	get_debug_computation_at actually returns non-NULL.
+ 
+ 2019-10-23  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR tree-optimization/92131
+ 	* tree-vrp.c (extract_range_from_plus_minus_expr): If the resulting
+ 	range would be symbolic, drop to varying for any explicit overflow
+ 	in the constant part or if neither range is a singleton.
+ 
+ 2019-10-23  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR middle-end/81669
+ 	* fibonacci_heap.h (fibonacci_node::fibonacci_node):
+ 	Initialize m_data.
+ 
+ 2019-10-23  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Use
+ 	int_mode_for_mode rather than mode_for_int_vector for scalars.
+ 
+ 2019-10-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92179
+ 	* tree-vect-stmts.c (vectorizable_shift): For shift args
+ 	that are all the same remove type restriction in the SLP case.
+ 	Adjust SLP code to handle converting of the shift arg to
+ 	only apply in case the modes are different.
+ 
+ 2019-10-23  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/91969
+ 	* ipa-inline.c (recursive_inlining): Do not print
+ 	when curr->count is not initialized.
+ 
+ 2019-10-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-slp.c (vect_build_slp_tree_2): Do not build
+ 	op from scalars in case there's a constant operand in its
+ 	definition.
+ 
+ 2019-10-23  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/darwin.h (ASM_OUTPUT_MAX_SKIP_ALIGN): Guard
+ 	against out of range max skip or log values.
+ 
+ 2019-10-22  Giuliano Belinassi  <giuliano.belinassi@usp.br>
+ 
+ 	* cgraph.c (dump_graphviz): Change name to dump_name
+ 
+ 2019-10-22  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (rsbsi_carryin_reg): New pattern.
+ 	* config/arm/arm.c (arm_rtx_costs_internal, case MINUS): Handle
+ 	subtraction from a carry operation.
+ 
+ 2019-10-22  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/predicates.md (arm_borrow_operation): Handle CC_ADCmode.
+ 
+ 2019-10-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92173
+ 	* tree-vect-loop.c (vectorizable_reduction): If
+ 	vect_transform_reduction cannot handle code-generation try without
+ 	the single-def-use-cycle optimization.  Pass optab_vector to
+ 	optab_for_tree_code to get vector shifts as that's what we'd
+ 	generate.
+ 
+ 2019-10-22  Michael Matz  <matz@suse.de>
+ 
+ 	PR middle-end/90796
+ 	* gimple-loop-jam.c (any_access_function_variant_p): New function.
+ 	(adjust_unroll_factor): Use it to constrain safety, new parameter.
+ 	(tree_loop_unroll_and_jam): Adjust call and profitable unroll factor.
+ 
+ 2019-10-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92173
+ 	* tree-vect-loop.c (vectorizable_reduction): If
+ 	vect_transform_reduction cannot handle code-generation try without
+ 	the single-def-use-cycle optimization.  Pass optab_vector to
+ 	optab_for_tree_code to get vector shifts as that's what we'd
+ 	generate.
+ 
+ 2019-10-22  Martin Liska  <mliska@suse.cz>
+ 
+ 	* diagnostic-format-json.cc (json_from_expanded_location):
+ 	Use json::integer_number.
+ 	* gcov.c (output_intermediate_json_line): Use new
+ 	json::integer_number.
+ 	(output_json_intermediate_file): Likewise.
+ 	* json.cc (number::print): Move to ...
+ 	(float_number::print): ... this.
+ 	(integer_number::print): New.
+ 	(test_writing_numbers): Move to ...
+ 	(test_writing_float_numbers): ... this.
+ 	(test_writing_integer_numbers): New.
+ 	(json_cc_tests): Register test_writing_integer_numbers.
+ 	* json.h (class value): Add forward declaration
+ 	for float_number and integer_number.
+ 	(enum kind): Add JSON_INTEGER and JSON_FLOAT.
+ 	(class number): Move to ...
+ 	(class float_number): ... this.
+ 	(class integer_number): New.
+ 	* optinfo-emit-json.cc (optrecord_json_writer::impl_location_to_json):
+ 	Use json::integer_number.
+ 	(optrecord_json_writer::location_to_json): Likewise.
+ 	(optrecord_json_writer::profile_count_to_json): Likewise.
+ 	(optrecord_json_writer::pass_to_json): Likewise.
+ 
+ 2019-10-22  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-slp.c (vect_slp_bb_region): Check whether
+ 	autodetected_vector_size rather than vector_size is zero.
+ 	* tree-vect-loop.c (vect_analyze_loop): Likewise.
+ 	Set autodetected_vector_size immediately after calling
+ 	vect_analyze_loop_2.  Check for a fatal error before advancing
+ 	next_size.
+ 
+ 2019-10-21  Jason Merrill  <jason@redhat.com>
+ 
+ 	* lock-and-run.sh: Check for process existence rather than timeout.
+ 
+ 2019-10-21  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* expr.c (expand_expr_real_2): Don't widen constant op1 when expanding
+ 	widening multiplication.
+ 
+ 2019-10-21  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/iterators.md (t2_binop0): Fix typo in comment.
+ 	* config/arm/arm.md (addsi3_carryin_shift): Simplify selection of the
+ 	type attribute.
+ 	(subsi3_carryin_shift): Separate into register and constant controlled
+ 	alternatives.  Use shift_amount_operand for operand 4.  Set shift
+ 	attribute and simplify type attribute.
+ 	(subsi3_carryin_shift_alt): Likewise.
+ 	(rsbsi3_carryin_shift): Likewise.
+ 	(rsbsi3_carryin_shift_alt): Likewise.
+ 	(andsi_not_shiftsi_si): Enable for TARGET_32BIT.  Separate constant
+ 	and register controlled shifts into distinct alternatives.
+ 	(andsi_not_shiftsi_si_scc_no_reuse): Likewise.
+ 	(andsi_not_shiftsi_si_scc): Likewise.
+ 	(arm_cmpsi_negshiftsi_si): Likewise.
+ 	(not_shiftsi): Remove redundant M constraint from alternative 1.
+ 	(not_shiftsi_compare0): Likewise.
+ 	(arm_cmpsi_insn): Remove redundant alternative 2.
+ 	(cmpsi_shift_swp): Likewise.
+ 	(sub_shiftsi): Likewise.
+ 	(sub_shiftsi_compare0_scratch): Likewise.
+ 	* config/arm/thumb2.md (thumb_andsi_not_shiftsi_si): Delete pattern.
+ 	(thumb2_cmpsi_neg_shiftsi): Likewise.
+ 
+ 2019-10-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92162
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): Lookup
+ 	STMT_VINFO_REDUC_IDX in reduc_info.
+ 	* tree-vect-stmts.c (vectorizable_condition): Likewise.
+ 
+ 2019-10-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vectorizer.h (_slp_tree::ops): New member.
+ 	(SLP_TREE_SCALAR_OPS): New.
+ 	(vect_get_slp_defs): Adjust prototype.
+ 	* tree-vect-slp.c (vect_free_slp_tree): Release
+ 	SLP_TREE_SCALAR_OPS.
+ 	(vect_create_new_slp_node): Initialize it.  New overload for
+ 	initializing by an operands array.
+ 	(_slp_oprnd_info::ops): New member.
+ 	(vect_create_oprnd_info): Initialize it.
+ 	(vect_free_oprnd_info): Release it.
+ 	(vect_get_and_check_slp_defs): Populate the operands array.
+ 	Do not swap operands in the IL when not necessary.
+ 	(vect_build_slp_tree_2): Build SLP nodes for invariant operands.
+ 	Record SLP_TREE_SCALAR_OPS for all invariant nodes.  Also
+ 	swap operands in the operands array.  Do not swap operands in
+ 	the IL.
+ 	(vect_slp_rearrange_stmts): Re-arrange SLP_TREE_SCALAR_OPS as well.
+ 	(vect_gather_slp_loads): Fix.
+ 	(vect_detect_hybrid_slp_stmts): Likewise.
+ 	(vect_slp_analyze_node_operations_1): Search for a internal
+ 	def child for computing reduction SLP_TREE_NUMBER_OF_VEC_STMTS.
+ 	(vect_slp_analyze_node_operations): Skip ops-only stmts for
+ 	the def-type push/pop dance.
+ 	(vect_get_constant_vectors): Compute number_of_vectors here.
+ 	Use SLP_TREE_SCALAR_OPS and simplify greatly.
+ 	(vect_get_slp_vect_defs): Use gimple_get_lhs also for PHIs.
+ 	(vect_get_slp_defs): Simplify greatly.
+ 	* tree-vect-loop.c (vectorize_fold_left_reduction): Simplify.
+ 	(vect_transform_reduction): Likewise.
+ 	* tree-vect-stmts.c (vect_get_vec_defs): Simplify.
+ 	(vectorizable_call): Likewise.
+ 	(vectorizable_operation): Likewise.
+ 	(vectorizable_load): Likewise.
+ 	(vectorizable_condition): Likewise.
+ 	(vectorizable_comparison): Likewise.
+ 
+ 2019-10-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92161
+ 	* tree-vect-loop.c (vect_analyze_loop_2): Reset stmts def-type
+ 	for reductions.
+ 
+ 2019-10-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/aarch64/aarch64.md (UNSPEC_RNDR, UNSPEC_RNDRRS): Define.
+ 	(aarch64_rndr): New define_insn.
+ 	(aarch64_rndrrs): Likewise.
+ 	* config/aarch64/aarch64.h (AARCH64_ISA_RNG): Define.
+ 	(TARGET_RNG): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_expand_builtin): Use IGNORE
+ 	argument.
+ 	* config/aarch64/aarch64-protos.h (aarch64_general_expand_builtin):
+ 	Add fourth argument in prototype.
+ 	* config/aarch64/aarch64-builtins.c (enum aarch64_builtins):
+ 	Add AARCH64_BUILTIN_RNG_RNDR, AARCH64_BUILTIN_RNG_RNDRRS.
+ 	(aarch64_init_rng_builtins): Define.
+ 	(aarch64_general_init_builtins): Call aarch64_init_rng_builtins.
+ 	(aarch64_expand_rng_builtin): Define.
+ 	(aarch64_general_expand_builtin): Use IGNORE argument, handle
+ 	RNG builtins.
+ 	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
+ 	__ARM_FEATURE_RNG when TARGET_RNG.
+ 	* config/aarch64/arm_acle.h (__rndr, __rndrrs): Define.
+ 
+ 2019-10-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	* tree-vect-stmts (ensure_base_align): Only change alignment if new
+ 	alignment is more restrictive.
+ 
+ 2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (vec_info::vector_size): New member variable.
+ 	(vect_update_max_nunits): Update comment.
+ 	(current_vector_size): Delete.
+ 	* tree-vect-stmts.c (current_vector_size): Likewise.
+ 	(get_vectype_for_scalar_type): Use vec_info::vector_size instead
+ 	of current_vector_size.
+ 	(get_mask_type_for_scalar_type): Likewise.
+ 	* tree-vectorizer.c (try_vectorize_loop_1): Likewise.
+ 	* tree-vect-loop.c (vect_update_vf_for_slp): Likewise.
+ 	(vect_analyze_loop, vect_halve_mask_nunits): Likewise.
+ 	(vect_double_mask_nunits, vect_transform_loop): Likewise.
+ 	* tree-vect-slp.c (can_duplicate_and_interleave_p): Likewise.
+ 	(vect_make_slp_decision, vect_slp_bb_region): Likewise.
+ 
+ 2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (vect_double_mask_nunits): Take a vec_info.
+ 	* tree-vect-loop.c (vect_double_mask_nunits): Likewise.
+ 	* tree-vect-stmts.c (supportable_narrowing_operation):  Update call
+ 	accordingly.
+ 
+ 2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (vect_halve_mask_nunits): Take a vec_info.
+ 	* tree-vect-loop.c (vect_halve_mask_nunits): Likewise.
+ 	* tree-vect-loop-manip.c (vect_maybe_permute_loop_masks): Update
+ 	call accordingly.
+ 	* tree-vect-stmts.c (supportable_widening_operation): Likewise.
+ 
+ 2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-loop-manip.c (vect_maybe_permute_loop_masks): Take
+ 	a loop_vec_info.
+ 	(vect_set_loop_condition_masked): Update call accordingly.
+ 
+ 2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (supportable_narrowing_operation): Take a vec_info.
+ 	* tree-vect-stmts.c (supportable_narrowing_operation): Likewise.
+ 	(simple_integer_narrowing): Update call accordingly.
+ 	(vectorizable_conversion): Likewise.
+ 
+ 2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (simple_integer_narrowing): Take a vec_info.
+ 	(vectorizable_call): Update call accordingly.
+ 
+ 2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (can_duplicate_and_interleave_p): Take a vec_info.
+ 	* tree-vect-slp.c (can_duplicate_and_interleave_p): Likewise.
+ 	(duplicate_and_interleave): Update call accordingly.
+ 	* tree-vect-loop.c (vectorizable_reduction): Likewise.
+ 
+ 2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (duplicate_and_interleave): Take a vec_info.
+ 	* tree-vect-slp.c (duplicate_and_interleave): Likewise.
+ 	(vect_get_constant_vectors): Update call accordingly.
+ 	* tree-vect-loop.c (get_initial_defs_for_reduction): Likewise.
+ 
+ 2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (get_vectype_for_scalar_type): Take a vec_info.
+ 	* tree-vect-stmts.c (get_vectype_for_scalar_type): Likewise.
+ 	(vect_prologue_cost_for_slp_op): Update call accordingly.
+ 	(vect_get_vec_def_for_operand, vect_get_gather_scatter_ops)
+ 	(vect_get_strided_load_store_ops, vectorizable_simd_clone_call)
+ 	(vect_supportable_shift, vect_is_simple_cond, vectorizable_comparison)
+ 	(get_mask_type_for_scalar_type): Likewise.
+ 	(vect_get_vector_types_for_stmt): Likewise.
+ 	* tree-vect-data-refs.c (vect_analyze_data_refs): Likewise.
+ 	* tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
+ 	(get_initial_def_for_reduction, build_vect_cond_expr): Likewise.
+ 	* tree-vect-patterns.c (vect_supportable_direct_optab_p): Likewise.
+ 	(vect_split_statement, vect_convert_input): Likewise.
+ 	(vect_recog_widen_op_pattern, vect_recog_pow_pattern): Likewise.
+ 	(vect_recog_over_widening_pattern, vect_recog_mulhs_pattern): Likewise.
+ 	(vect_recog_average_pattern, vect_recog_cast_forwprop_pattern)
+ 	(vect_recog_rotate_pattern, vect_recog_vector_vector_shift_pattern)
+ 	(vect_synth_mult_by_constant, vect_recog_mult_pattern): Likewise.
+ 	(vect_recog_divmod_pattern, vect_recog_mixed_size_cond_pattern)
+ 	(check_bool_pattern, adjust_bool_pattern_cast, adjust_bool_pattern)
+ 	(search_type_for_mask_1, vect_recog_bool_pattern): Likewise.
+ 	(vect_recog_mask_conversion_pattern): Likewise.
+ 	(vect_add_conversion_to_pattern): Likewise.
+ 	(vect_recog_gather_scatter_pattern): Likewise.
+ 	* tree-vect-slp.c (vect_build_slp_tree_2): Likewise.
+ 	(vect_analyze_slp_instance, vect_get_constant_vectors): Likewise.
+ 
+ 2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (get_mask_type_for_scalar_type): Take a vec_info.
+ 	* tree-vect-stmts.c (get_mask_type_for_scalar_type): Likewise.
+ 	(vect_check_load_store_mask): Update call accordingly.
+ 	(vect_get_mask_type_for_stmt): Likewise.
+ 	* tree-vect-patterns.c (check_bool_pattern): Likewise.
+ 	(search_type_for_mask_1, vect_recog_mask_conversion_pattern): Likewise.
+ 	(vect_convert_mask_for_vectype): Likewise.
+ 
+ 2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-patterns.c (vect_supportable_direct_optab_p): Take
+ 	a vec_info.
+ 	(vect_recog_dot_prod_pattern): Update call accordingly.
+ 	(vect_recog_sad_pattern, vect_recog_pow_pattern): Likewise.
+ 	(vect_recog_widen_sum_pattern): Likewise.
+ 
+ 2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (vect_supportable_shift): Take a vec_info.
+ 	* tree-vect-stmts.c (vect_supportable_shift): Likewise.
+ 	* tree-vect-patterns.c (vect_synth_mult_by_constant): Update call
+ 	accordingly.
+ 
+ 2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.c (get_vec_alignment_for_array_type): Use
+ 	get_vectype_for_scalar_type_and_size instead of
+ 	get_vectype_for_scalar_type.
+ 
+ 2019-10-20  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* common.opt (-fcommon): Fix description.
+ 
+ 2019-10-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* config/i386/i386-protos.h (ix86_pre_reload_split): Declare.
+ 	* config/i386/i386.c (ix86_pre_reload_split): New function.
+ 	* config/i386/i386.md (*fix_trunc<mode>_i387_1, *add<mode>3_eq,
+ 	*add<mode>3_ne, *add<mode>3_eq_0, *add<mode>3_ne_0, *add<mode>3_eq,
+ 	*add<mode>3_ne, *add<mode>3_eq_1, *add<mode>3_eq_0, *add<mode>3_ne_0,
+ 	*anddi3_doubleword, *andndi3_doubleword, *<code>di3_doubleword,
+ 	*one_cmpldi2_doubleword, *ashl<dwi>3_doubleword_mask,
+ 	*ashl<dwi>3_doubleword_mask_1, *ashl<mode>3_mask, *ashl<mode>3_mask_1,
+ 	*<shift_insn><mode>3_mask, *<shift_insn><mode>3_mask_1,
+ 	*<shift_insn><dwi>3_doubleword_mask,
+ 	*<shift_insn><dwi>3_doubleword_mask_1, *<rotate_insn><mode>3_mask,
+ 	*<rotate_insn><mode>3_mask_1, *<btsc><mode>_mask, *<btsc><mode>_mask_1,
+ 	*btr<mode>_mask, *btr<mode>_mask_1, *jcc_bt<mode>, *jcc_bt<mode>_1,
+ 	*jcc_bt<mode>_mask, *popcounthi2_1, frndintxf2_<rounding>,
+ 	*fist<mode>2_<rounding>_1, *<code><mode>3_1, *<code>di3_doubleword):
+ 	Use ix86_pre_reload_split instead of can_create_pseudo_p in condition.
+ 	* config/i386/sse.md (*sse4_1_<code>v8qiv8hi2<mask_name>_2,
+ 	*avx2_<code>v8qiv8si2<mask_name>_2,
+ 	*sse4_1_<code>v4qiv4si2<mask_name>_2,
+ 	*sse4_1_<code>v4hiv4si2<mask_name>_2,
+ 	*avx512f_<code>v8qiv8di2<mask_name>_2,
+ 	*avx2_<code>v4qiv4di2<mask_name>_2, *avx2_<code>v4hiv4di2<mask_name>_2,
+ 	*sse4_1_<code>v2hiv2di2<mask_name>_2,
+ 	*sse4_1_<code>v2siv2di2<mask_name>_2, sse4_2_pcmpestr,
+ 	sse4_2_pcmpistr): Likewise.
+ 
+ 2019-10-20  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* doc/install.texi (Configuration, --enable-objc-gc): hboehm.info
+ 	now defaults to https.
+ 
+ 2019-10-20  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (nonoverlapping_refs_since_match_p): Do not
+ 	skip non-zero array accesses.
+ 
+ 2019-10-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-slp.c (vect_slp_analyze_bb_1): Take a bb_vec_info
+ 	and return a boolean success value.  Move the allocation and
+ 	initialization of the bb_vec_info to...
+ 	(vect_slp_bb_region): ...here.  Update call accordingly.
+ 	(vect_slp_bb): Apply PARAM_SLP_MAX_INSNS_IN_BB here rather
+ 	than in vect_slp_analyze_bb_1.
+ 
+ 2019-10-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-slp.c (vect_slp_analyze_bb_1): Call save_datarefs
+ 	when processing the given datarefs for the first time and
+ 	check_datarefs subsequently.
+ 	(vect_slp_bb_region): New function, split out of...
+ 	(vect_slp_bb): ...here.  Don't recompute the region bounds and
+ 	dataref sets when retrying with a different vector size.
+ 
+ 2019-10-19  Jakub Jelinek  <jakub@redhat.com>
+ 	    Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/92140
+ 	* config/i386/predicates.md (int_nonimmediate_operand): New special
+ 	predicate.
+ 	* config/i386/i386.md (*add<mode>3_eq, *add<mode>3_ne,
+ 	*add<mode>3_eq_0, *add<mode>3_ne_0, *sub<mode>3_eq, *sub<mode>3_ne,
+ 	*sub<mode>3_eq_1, *sub<mode>3_eq_0, *sub<mode>3_ne_0): New
+ 	define_insn_and_split patterns.
+ 
+ 2019-10-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/rs6000.md: Delete out--of-date comment about
+ 	special-casing integer loads.
+ 
+ 2019-10-19  JeanHeyd Meneide  <phdofthehouse@gmail.com>
+ 
+ 	* escaped_string.h (escaped_string): New header.
+ 	* tree.c (escaped_string): Remove escaped_string class.
+ 
+ 2019-10-18  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/92157
+ 	* tree-ssa-strlen.c (handle_builtin_string_cmp): Be prepared for
+ 	compute_string_length to return a negative result.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (negv<SIDI:mode>3): New expansion rule.
+ 	(negvsi3, negvdi3): Delete.
+ 	(negdi2_compare): Delete.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (subvdi4): Decompose calculation into 32-bit
+ 	operations.
+ 	(subdi3_compare1): Delete pattern.
+ 	(subvsi3_borrow): New insn pattern.
+ 	(subvsi3_borrow_imm): Likewise.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (subv<mode>4): Delete.
+ 	(subvdi4): New expander pattern.
+ 	(subvsi4): Likewise.  Handle some immediate values.
+ 	(subvsi3_intmin): New insn pattern.
+ 	(subvsi3): Likewise.
+ 	(subvsi3_imm1): Likewise.
+ 	* config/arm/arm.c (select_cc_mode): Also allow minus for CC_V
+ 	idioms.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (usubvdi4): Allow registers or integers for
+ 	incoming operands.  Early split the calculation into SImode
+ 	operations.
+ 	(usubvsi3_borrow): New insn pattern.
+ 	(usubvsi3_borrow_imm): Likewise.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (usubv<mode>4): Delete expansion.
+ 	(usubvsi4): New pattern.  Allow some immediate values for inputs.
+ 	(usubvdi4): New pattern.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.c (arm_select_cc_mode): Allow either the first
+ 	or second operand of the PLUS inside a DImode equality test to be
+ 	sign-extend when selecting CC_Vmode.
+ 	* config/arm/arm.md (addvdi4): Early-split the operation into SImode
+ 	instructions.
+ 	(addsi3_cin_vout_reg, addsi3_cin_vout_imm, addsi3_cin_vout_0): New
+ 	expand patterns.
+ 	(addsi3_cin_vout_reg_insn, addsi3_cin_vout_imm_insn): New patterns.
+ 	(addsi3_cin_vout_0): Likewise.
+ 	(adddi3_compareV): Delete.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (addsi3_compareV_reg_nosum): New insn.
+ 	(addsi3_compareV_imm_nosum): New insn.  Also add peephole2 patterns
+ 	to transform this back into the summation version when that leads
+ 	to smaller code.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (addv<mode>4): Delete.
+ 	(addvsi4): New pattern.  Handle immediate values that the architecture
+ 	supports.
+ 	(addvdi4): New pattern.
+ 	(addsi3_compareV): Rename to ...
+ 	(addsi3_compareV_reg): ... this.  Add constraints for thumb2 variants
+ 	and use COMPARE rather than NE.
+ 	(addsi3_compareV_imm): New pattern.
+ 	* config/arm/arm.c (arm_select_cc_mode): Return CC_Vmode for
+ 	a signed-overflow check.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm-modes.def (CC_ADC): New CC mode.
+ 	* config/arm/arm.c (arm_select_cc_mode): Detect selection of
+ 	CC_ADCmode.
+ 	(maybe_get_arm_condition_code): Handle CC_ADCmode.
+ 	* config/arm/arm.md (uaddvdi4): Early expansion of unsigned addition
+ 	with overflow.
+ 	(addsi3_cin_cout_reg, addsi3_cin_cout_imm, addsi3_cin_cout_0): New
+ 	expand patterns.
+ 	(addsi3_cin_cout_reg_insn, addsi3_cin_cout_0_insn): New insn patterns
+ 	(addsi3_cin_cout_imm_insn): Likewise.
+ 	(adddi3_compareC): Delete insn.
+ 	* config/arm/predicates.md (arm_carry_operation): Handle CC_ADCmode.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (adddi3): Call gen_addsi3_compare_op1.
+ 	* (uaddv<mode>4): Delete expansion pattern.
+ 	(uaddvsi4): New pattern.
+ 	(uaddvdi4): Likewise.
+ 	(addsi3_compareC): Delete pattern, change callers to use
+ 	addsi3_compare_op1.
+ 	(addsi3_compare_op1): No-longer anonymous.  Clean up constraints to
+ 	reduce the number of alternatives and re-work type attribute handling.
+ 	(addsi3_compare_op2): Clean up constraints to reduce the number of
+ 	alternatives and re-work type attribute handling.
+ 	(compare_addsi2_op0): Likewise.
+ 	(compare_addsi2_op1): Likewise.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm-modes.def (CC_NCV, CC_CZ): Delete CC modes.
+ 	* config/arm/arm.c (arm_select_cc_mode): Remove old selection code
+ 	for DImode operands.
+ 	(arm_gen_dicompare_reg): Remove unreachable expansion code.
+ 	(maybe_get_arm_condition_code): Remove support for CC_CZmode and
+ 	CC_NCVmode.
+ 	* config/arm/arm.md (arm_cmpdi_insn): Delete.
+ 	(arm_cmpdi_unsigned): Delete.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.c (arm_const_double_prefer_rsbs_rsc): New function.
+ 	(arm_canonicalize_comparison): For GT/LE/GTU/GEU, use the constant
+ 	unchanged only if that will be cheaper.
+ 	(arm_select_cc_mode): Recognize a swapped comparison that will
+ 	be regenerated using RSBS or RSCS.  Relax restriction on selecting
+ 	CC_RSBmode.
+ 	(arm_gen_dicompare_reg): Handle LE/GT/LEU/GEU comparisons against
+ 	a constant.
+ 	(arm_gen_compare_reg): Handle compare (CONST, X) when the mode
+ 	is CC_RSBmode.
+ 	(maybe_get_arm_condition_code): CC_RSBmode now returns the same codes
+ 	as CCmode.
+ 	* config/arm/arm.md (rsb_imm_compare_scratch): New pattern.
+ 	(rscsi3_<CC_EXTEND>out_scratch): New pattern.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm-modes.def (CC_NV, CC_B): New CC modes.
+ 	* config/arm/arm.c (arm_select_cc_mode): Recognize constructs that
+ 	need these modes.
+ 	(arm_gen_dicompare_reg): New code to early expand the sub-operations
+ 	of EQ, NE, LT, GE, LTU and GEU.
+ 	* config/arm/iterators.md (CC_EXTEND): New code attribute.
+ 	* config/arm/predicates.md (arm_adcimm_operand): New predicate..
+ 	* config/arm/arm.md (cmpsi3_carryin_<CC_EXTEND>out): New pattern.
+ 	(cmpsi3_imm_carryin_<CC_EXTEND>out): Likewise.
+ 	(cmpsi3_0_carryin_<CC_EXTEND>out): Likewise.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (cbranchdi4): Accept reg_or_int_operand for
+ 	operand 2.
+ 	(cstoredi4): Similarly, but for operand 3.
+ 	* config/arm/arm.c (arm_canoncialize_comparison): Allow
+ 	canonicalization of unsigned compares with a constant on Arm.
+ 	Prefer using const+1 and adjusting the comparison over swapping the
+ 	operands whenever the original constant was not valid.
+ 	(arm_gen_dicompare_reg): If Y is not a valid operand, force it to a
+ 	register here.
+ 	(arm_validize_comparison): Do not force invalid DImode operands to
+ 	registers here.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.c (arm_select_cc_mode): For DImode equality tests
+ 	return CC_Zmode if comparing against a constant where one word is
+ 	zero.
+ 	(arm_gen_compare_reg): Split DImode handling to ...
+ 	(arm_gen_dicompare_reg): ... here.  Handle equality comparisons
+ 	against simple constants.
+ 	* config/arm/arm.md (arm_cmpdi_zero): Delete pattern.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (subsi3_carryin_shift_alt): New pattern.
+ 	(rsbsi3_carryin_shift_alt): Likewise.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (negscc_borrow): New pattern.
+ 	(mov_negscc): Don't split if the insn would match negscc_borrow.
+ 	* config/arm/thumb2.md (thumb2_mov_negscc): Likewise.
+ 	(thumb2_mov_negscc_strict_it): Likewise.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.c (arm_insn_cost): New function.
+ 	(TARGET_INSN_COST): Override default definition.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.c (arm_rtx_costs_internal, case MINUS): Handle
+ 	borrow operations.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.c (strip_carry_operation): New function.
+ 	(arm_rtx_costs_internal, case PLUS): Handle addtion with carry-in
+ 	for SImode.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/predicates.md (arm_carry_operation): New special
+ 	predicate.
+ 	* config/arm/iterators.md (LTUGEU): Delete iterator.
+ 	(cnb): Delete code attribute.
+ 	(optab): Delete ltu and geu elements.
+ 	* config/arm/arm.md (addsi3_carryin): Renamed from
+ 	addsi3_carryin_<optab>.  Remove iterator and use arm_carry_operand.
+ 	(add0si3_carryin): Similarly, but from add0si3_carryin_<optab>.
+ 	(addsi3_carryin_alt2): Similarly, but from addsi3_carryin_alt2_<optab>.
+ 	(addsi3_carryin_clobercc): Similarly.
+ 	(addsi3_carryin_shift): Similarly.  Do not allow register shifts in
+ 	Thumb2 state.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (arm_subdi3): Delete insn.
+ 	(zextendsidi_negsi, negdi_extendsidi): Delete insn_and_split.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm-modes.def (CC_RSB): New CC mode.
+ 	* config/arm/predicates.md (arm_borrow_operation): Handle CC_RSBmode.
+ 	* config/arm/arm.c (arm_select_cc_mode): Detect when we should
+ 	return CC_RSBmode.
+ 	(maybe_get_arm_condition_code): Handle CC_RSBmode.
+ 	* config/arm/arm.md (subsi3_carryin): Make this pattern available to
+ 	expand.
+ 	(subdi3): Rewrite to early-expand the sub-operations.
+ 	(rsb_im_compare): New pattern.
+ 	(negdi2): Delete.
+ 	(negdi2_insn): Delete.
+ 	(arm_negsi2): Correct type attribute to alu_imm.
+ 	(negsi2_0compare): New insn pattern.
+ 	(negsi2_carryin): New insn pattern.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (addsi3_carryin_alt2): Use arm_not_operand for
+ 	operand 2.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (addsi3_carryin_shift_<optab>): Reorder operands
+ 	to match canonical form.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (zero_extend<mode>di2): Convert to define_expand.
+ 	(extend<mode>di2): Likewise.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm-protos.h (arm_decompose_di_binop): New prototype.
+ 	* config/arm/arm.c (arm_decompose_di_binop): New function.
+ 	* config/arm/arm.md (adddi3): Also accept any const_int for op2.
+ 	If not generating Thumb-1 code, decompose the operation into 32-bit
+ 	pieces.
+ 	* add0si_carryin_<optab>: New pattern.
+ 
+ 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* arm.md (adddi3): Only accept register operands.
+ 	(arm_adddi3): Convert to simple insn with no split.  Do not accept
+ 	constants.
+ 	(adddi_sesidi_di): Delete patern.
+ 	(adddi_zesidi_di): Likewise.
+ 	(uaddv<mode>4): Use LTU as condition for branch.
+ 	(adddi3_compareV): Convert to simple insn with no split.
+ 	(addsi3_compareV_upper): Delete pattern.
+ 	(adddi3_compareC): Convert to simple insn with no split.  Correct
+ 	flags setting expression.
+ 	(addsi3_compareC_upper): Delete pattern.
+ 	(addsi3_compareC): Correct flags setting expression.
+ 	(subdi3_compare1): Convert to simple insn with no split.
+ 	(subsi3_carryin_compare): Delete pattern.
+ 	(arm_subdi3): Convert to simple insn with no split.
+ 	(subdi_zesidi): Delete pattern.
+ 	(subdi_di_sesidi): Delete pattern.
+ 	(subdi_zesidi_di): Delete pattern.
+ 	(subdi_sesidi_di): Delete pattern.
+ 	(subdi_zesidi_zesidi): Delete pattern.
+ 	(negvdi3): Use s_register_operand.
+ 	(negdi2_compare): Convert to simple insn with no split.
+ 	(negdi2_insn): Likewise.
+ 	(negsi2_carryin_compare): Delete pattern.
+ 	(negdi_zero_extendsidi): Delete pattern.
+ 	(arm_cmpdi_insn): Convert to simple insn with no split.
+ 	(negdi2): Don't call gen_negdi2_neon.
+ 	* config/arm/neon.md (adddi3_neon): Delete pattern.
+ 	(subdi3_neon): Delete pattern.
+ 	(negdi2_neon): Delete pattern.
+ 	(splits for negdi2_neon): Delete splits.
+ 
+ 2019-10-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/92153
+ 	* ggc-page.c (release_pages): Read g->alloc_size before free rather
+ 	than after it.
+ 
+ 2019-10-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	* config/arm/t-multilib: Add rule to regenerate mutlilib header file
+ 	with any change to t-multilib, t-aprofile and t-rmprofile.  Also add
+ 	new multilib variants and new mappings.
+ 
+ 2019-10-18  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/86040
+ 	* config/avr/avr.c (avr_out_lpm): Do not shortcut-return.
+ 
+ 2019-10-18  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 	    Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR target/86753
+ 	* tree-vectorizer.h (scalar_cond_masked_key): New struct,
+ 	and define hashmap traits for it.
+ 	(loop_vec_info::scalar_cond_masked_set): New member.
+ 	(vect_record_loop_mask): Adjust prototype.
+ 	* tree-vectorizer.c (scalar_cond_masked_key::get_cond_ops_from_tree):
+ 	Implement method.
+ 	* tree-vect-loop.c (vectorizable_reduction): Pass NULL as last arg to
+ 	vect_record_loop_mask.
+ 	(vectorizable_live_operation): Likewise.
+ 	(vect_record_loop_mask): New param scalar_mask. Add entry
+ 	cond, loop_mask	to scalar_cond_masked_set if scalar_mask is non NULL.
+ 	* tree-vect-stmts.c (check_load_store_masking): New param scalar_mask.
+ 	Pass it as last arg to vect_record_loop_mask.
+ 	(vectorizable_call): Pass scalar_mask as last arg to
+ 	vect_record_loop_mask.
+ 	(vectorizable_store): Likewise.
+ 	(vectorizable_load): Likewise.
+ 	(vectorizable_condition): Check if another part of vectorized code
+ 	applies loop_mask to condition or to it's inverse, and if yes,
+ 	apply loop_mask to result of vector comparison.
+ 
+ 2019-10-17  John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	* config/pa/pa.c (pa_output_indirect_call): Fix typos in last change.
+ 
+ 2019-10-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/92056
+ 	* tree-ssa-strlen.c (determine_min_objsize): Call init_object_sizes
+ 	before calling compute_builtin_object_size.
+ 
+ 2019-10-17  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/65342
+ 	* config/rs6000/darwin.md (movdi_low, movsi_low_st): Delete.
+ 	(movdi_low_st): Delete.
+ 	* config/rs6000/rs6000.c
+ 	(darwin_rs6000_legitimate_lo_sum_const_p): New.
+ 	(mem_operand_gpr): Validate Mach-O LO_SUM cases separately.
+ 	* config/rs6000/rs6000.md (movsi_low): Delete.
+ 
+ 2019-10-17  Jason Merrill  <jason@redhat.com>
+ 
+ 	* gimplify.h (get_initialized_tmp_var): Add default argument to
+ 	post_p.
+ 	* gimplify.c (gimplify_self_mod_expr, gimplify_omp_atomic): Remove
+ 	NULL post_p argument.
+ 	* targhooks (std_gimplify_va_arg_expr): Likewise.
+ 
+ 2019-10-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vectorizer.h (_stmt_vec_info::cond_reduc_code): Remove.
+ 	(STMT_VINFO_VEC_COND_REDUC_CODE): Likewise.
+ 	* tree-vectorizer.c (vec_info::new_stmt_vec_info): Do not
+ 	initialize STMT_VINFO_VEC_COND_REDUC_CODE.
+ 	* tree-vect-loop.c (vect_is_simple_reduction): Set
+ 	STMT_VINFO_REDUC_CODE.
+ 	(vectorizable_reduction): Remove dead and redundant code, use
+ 	STMT_VINFO_REDUC_CODE instead of STMT_VINFO_VEC_COND_REDUC_CODE.
+ 
+ 2019-10-17  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Fix breakage introduced by r276985.
+ 
+ 	* config/avr/avr.c (avr_option_override): Remove set of
+ 	PARAM_ALLOW_STORE_DATA_RACES.
+ 	* common/config/avr/avr-common.c (avr_option_optimization_table)
+ 	[OPT_LEVELS_ALL]: Turn on -fallow-store-data-races.
+ 
+ 2019-10-17  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	* config/i386/i386.h (processor_costs): Add clear_ratio.
+ 	(CLEAR_RATIO): Remove MIN and use ix86_cost->clear_ratio.
+ 	* config/i386/x86-tune-costs.h: Set clear_ratio to the minimum
+ 	of 6 and move_ratio in all cost models.
+ 
+ 2019-10-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (check_reduction_path): Compute reduction
+ 	operation here.
+ 	(vect_is_simple_reduction): Remove special-case of single-stmt
+ 	reduction path detection.
+ 
+ 2019-10-17  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm-cpus.in (marvel-pj4): Add +fp to the architecture.
+ 
+ 2019-10-17  Yuliang Wang  <yuliang.wang@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve2.md (aarch64_sve2_eor3<mode>)
+ 	(aarch64_sve2_nor<mode>, aarch64_sve2_nand<mode>)
+ 	(aarch64_sve2_bsl<mode>, aarch64_sve2_nbsl<mode>)
+ 	(aarch64_sve2_bsl1n<mode>, aarch64_sve2_bsl2n<mode>):
+ 	New combine patterns.
+ 	* config/aarch64/iterators.md (BSL_DUP): New int iterator for the
+ 	above.
+ 	(bsl_1st, bsl_2nd, bsl_dup, bsl_mov): Attributes for the above.
+ 
+ 2019-10-17  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.c (value_range_base::dump): Display +INF for both
+ 	pointers and integers when appropriate.
+ 
+ 2019-10-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	* tree-vect-loop.c (vect_analyze_loop_2): Use same condition to decide
+ 	when to use versioning threshold.
+ 
+ 2019-10-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	* tree-vect-loop.c (determine_peel_for_niter): New function contained
+ 	outlined code from ...
+ 	(vect_analyze_loop_2): ... here.
+ 
+ 2019-10-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	* tree-vect-loop.c (vect_transform_loop): Move code from here...
+ 	* tree-vect-loop-manip.c (vect_loop_versioning): ... to here.
+ 	* tree-vectorizer.h (vect_loop_versioning): Remove unused parameters.
+ 
+ 2019-10-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (needs_fold_left_reduction_p): Export.
+ 	(vect_is_simple_reduction): Move all validity checks ...
+ 	(vectorizable_reduction): ... here.  Compute whether we
+ 	need a fold-left reduction here.
+ 	* tree-vect-patterns.c (vect_reassociating_reduction_p): Merge
+ 	both overloads, check needs_fold_left_reduction_p directly.
+ 	* tree-vectorizer.h (needs_fold_left_reduction_p): Declare.
+ 
+ 2019-10-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-pre.c (create_component_ref_by_pieces_1): Fix
+ 	TARGET_MEM_REF creation.
+ 
+ 2019-10-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92129
+ 	* tree-vect-loop.c (vectorizable_reduction): Also fail
+ 	on GIMPLE_SINGLE_RHS.
+ 
+ 2019-10-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/92056
+ 	* tree-object-size.c (cond_expr_object_size): Return early if then_
+ 	processing resulted in unknown size.
+ 
+ 	PR tree-optimization/92115
+ 	* tree-ssa-ifcombine.c (ifcombine_ifandif): Force condition into
+ 	temporary if it could trap.
+ 
+ 2019-10-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/91887
+ 	* dwarf2out.c (gen_formal_parameter_die): Also try to match
+ 	context_die against a DW_TAG_GNU_formal_parameter_pack parent.
+ 
+ 2019-10-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree-ssa-strlen.c (maybe_invalidate): Use
+ 	HOST_WIDE_INT_PRINT_UNSIGNED instead of "%zu".
+ 
+ 2019-10-16  Andrew Burgess  <andrew.burgess@embecosm.com>
+ 	    Jim Wilson  <jimw@sifive.com>
+ 
+ 	* config/riscv/riscv.h (REG_CLASS_CONTENTS): Add argument passing
+ 	regs to SIBCALL_REGS.
+ 	* config/riscv/riscv.c (riscv_regno_to_class): Change argument
+ 	passing regs to SIBCALL_REGS.
+ 
+ 2019-10-16  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/83821
+ 	* tree-ssa-strlen.c (maybe_invalidate): Add argument.  Consider
+ 	the length of a string when available.
+ 	(handle_builtin_memset) Add argument.
+ 	(handle_store, strlen_check_and_optimize_call): Same.
+ 	(check_and_optimize_stmt): Same.  Pass it to callees.
+ 
+ 2019-10-16  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/91996
+ 	* tree-ssa-strlen.c (maybe_warn_pointless_strcmp): Improve location
+ 	information.
+ 	(compare_nonzero_chars): Add an overload.
+ 	(count_nonzero_bytes): Add an argument.  Call overload above.
+ 	Handle non-constant lengths in some range.
+ 	(handle_store): Add an argument.
+ 	(check_and_optimize_stmt): Pass an argument to handle_store.
+ 
+ 2019-10-16  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.c (neon_valid_immediate): Clear bytes before use.
+ 
+ 2019-10-16  Mihailo Stojanovic  <mistojanovic@wavecomp.com>
+ 
+ 	* config/mips/mips.c (mips_expand_builtin_insn): Force the
+ 	operands which correspond to the same input-output register to
+ 	have the same pseudo assigned to them.
+ 
+ 2019-10-16  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	* cfgrtl.c (find_partition_fixes): Remove bbs_in_cold_partition.
+ 
+ 2019-10-16  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_classify_symbol):
+ 	Apply reasonable limit to symbol offsets.
+ 
+ 2019-10-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (vect_valid_reduction_input_p): Remove.
+ 	(vect_is_simple_reduction): Delay checking to
+ 	vectorizable_reduction and relax the checking.
+ 	(vectorizable_reduction): Check we have a simple use.  Check
+ 	for bogus condition reductions.
+ 	* tree-vect-stmts.c (vect_transform_stmt): Make sure we
+ 	are looking at the last stmt in a pattern sequence when
+ 	filling in backedge PHI values.
+ 
+ 2019-10-16  Peter Bergner <bergner@linux.ibm.com>
+ 	    Jiufu Guo  <guojiufu@linux.ibm.com>
+ 
+ 	PR target/70010
+ 	* config/rs6000/rs6000.c (rs6000_can_inline_p): Prohibit inlining if
+ 	the callee explicitly disables some isa_flags the caller is using.
+ 
+ 2019-10-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* function-abi.cc (expr_callee_abi): Assert for POINTER_TYPE_P.
+ 
+ 2019-10-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* genmodes.c (mode_data::order): New field.
+ 	(blank_mode): Update accordingly.
+ 	(VECTOR_MODES_WITH_PREFIX): Add an order parameter.
+ 	(make_vector_modes): Likewise.
+ 	(VECTOR_MODES): Update use accordingly.
+ 	(cmp_modes): Sort by the new order field ahead of sorting by size.
+ 	* config/aarch64/aarch64-modes.def (VNx2QI, VN2xHI, VNx2SI)
+ 	(VNx4QI, VNx4HI, VNx8QI): New partial vector modes.
+ 	* config/aarch64/aarch64.c (VEC_PARTIAL): New flag value.
+ 	(aarch64_classify_vector_mode): Handle the new partial modes.
+ 	(aarch64_vl_bytes): New function.
+ 	(aarch64_hard_regno_nregs): Use it instead of BYTES_PER_SVE_VECTOR
+ 	when counting the number of registers in an SVE mode.
+ 	(aarch64_class_max_nregs): Likewise.
+ 	(aarch64_hard_regno_mode_ok): Don't allow partial vectors
+ 	in registers yet.
+ 	(aarch64_classify_address): Treat partial vectors analogously
+ 	to full vectors.
+ 	(aarch64_print_address_internal): Consolidate the printing of
+ 	MUL VL addresses, using aarch64_vl_bytes as the number of
+ 	bytes represented by "VL".
+ 	(aarch64_vector_mode_supported_p): Reject partial vector modes.
+ 
+ 2019-10-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_layout_frame): Use is_constant
+ 	rather than known_lt when choosing frame layouts.
+ 
+ 2019-10-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_layout_frame): Assert
+ 	that all the adjustments add up to the full frame size.
+ 	Use crtl->outgoing_args_size directly as the final adjustment
+ 	where appropriate.
+ 
+ 2019-10-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_layout_frame): Use a local
+ 	"frame" reference instead of always referring directly to
+ 	"cfun->machine->frame".
+ 
+ 2019-10-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92119
+ 	* tree-vect-patterns.c (vect_recog_rotate_pattern): Guard
+ 	against missing bswap lhs.
+ 
+ 2019-10-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/92033
+ 	* poly-int.h (constant_lower_bound_with_limit): New function.
+ 	(constant_upper_bound_with_limit): Likewise.
+ 	* doc/poly-int.texi: Document them.
+ 	* tree-vrp.c (value_range_base::set): Convert POLY_INT_CST bounds
+ 	into the worst-case INTEGER_CST bounds.
+ 
+ 2019-10-16  Feng Xue  <fxue@os.amperecomputing.com>
+ 
+ 	PR ipa/91088
+ 	* doc/invoke.texi (ipa-max-param-expr-ops): Document new option.
+ 	* params.def (PARAM_IPA_MAX_PARAM_EXPR_OPS): New.
+ 	* ipa-predicat.h (struct expr_eval_op): New struct.
+ 	(expr_eval_ops): New typedef.
+ 	(struct condition): Add type and param_ops fields, remove size field.
+ 	(add_condition): Replace size parameter with type parameter, add
+ 	param_ops parameter.
+ 	* ipa-predicat.c (expr_eval_ops_equal_p): New function.
+ 	(predicate::add_clause): Add comparisons on type and param_ops.
+ 	(dump_condition): Add debug dump for param_ops.
+ 	(remap_after_inlining): Adjust call arguments to add_condition.
+ 	(add_condition): Replace size parameter with type parameter, add
+ 	param_ops parameter. Unshare constant value used in conditions.
+ 	* ipa-fnsummary.c (evaluate_conditions_for_known_args): Fold
+ 	parameter expressions using param_ops.
+ 	(decompose_param_expr):  New function.
+ 	(set_cond_stmt_execution_predicate): Use call to decompose_param_expr
+ 	to replace call to unmodified_parm_or_parm_agg_item.
+ 	(set_switch_stmt_execution_predicate): Likewise.
+ 	(will_be_nonconstant_expr_predicate): Likewise. Replace usage of size
+ 	with type.
+ 	(inline_read_section): Read param_ops from summary stream.
+ 	(ipa_fn_summary_write): Write param_ops to summary stream.
+ 
+ 2019-10-15  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR rtl-optimization/92107
+ 	* genattrtab.c (write_attr_value) <do_operator>: Parenthesize the
+ 	expression written.
+ 
+ 2019-10-15  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c: Update description of fix and continue.
+ 
+ 2019-10-15  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (darwin_binds_local_p): Update to call
+ 	default_binds_local_p_3 () directly. amend comments.
+ 
+ 2019-10-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	* lto-streamer-out.c (lto_variably_modified_type_p): New.
+ 	(tree_is_indexable): Use it.
+ 	* tree-streamer-out.c (pack_ts_type_common_value_fields):
+ 	Stream variably_modified_type_p as TYPE_LANG_FLAG_0.
+ 	* tree-streamer-in.c (unpack_ts_type_common_value_fields): Likewise.
+ 
+ 2019-10-15  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.md (zero_extendqipsi2): New.
+ 	(zero_extendqisi2): Optimize case where src register and base dst
+ 	register are the same.
+ 	(zero_extendhipsi2): Don't use 430X insn for rYs->r case.
+ 	(zero_extendpsisi2): Optimize r->m case.
+ 	Add unnamed insn patterns to catch insns combine searches for when
+ 	optimizing pointer manipulation.
+ 
+ 2019-10-15  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.md: Group zero_extend* insns together.
+ 
+ 2019-10-15  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/constraints.md: Allow post_inc operand for "Ya"
+ 	constraint.
+ 	* config/msp430/msp430.c (msp430_legitimate_address_p): Handle
+ 	POST_INC.
+ 	(msp430_subreg): Likewise.
+ 	(msp430_split_addsi): Likewise.
+ 	(msp430_print_operand_addr): Likewise.
+ 	* config/msp430/msp430.h (HAVE_POST_INCREMENT): Define.
+ 	(USE_STORE_POST_INCREMENT): Define.
+ 	* config/msp430/msp430.md: Use the msp430_general_dst_operand or
+ 	msp430_general_dst_nonv_operand predicates for the lvalues of insns.
+ 	* config/msp430/predicates.md (msp430_nonpostinc_operand): New.
+ 	(msp430_general_dst_operand): New.
+ 	(msp430_general_dst_nonv_operand): New.
+ 	(msp430_nonsubreg_operand): Remove.
+ 	(msp430_nonsubreg_dst_operand): New.
+ 	(msp430_nonsubreg_or_imm_operand): Allow reg or mem operands in place
+ 	of defunct msp430_nonsubreg_operand.
+ 	(msp430_nonsubregnonpostinc_or_imm_operand): New.
+ 
+ 2019-10-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91929
+ 	* tree-ssa-pre.c (pre_expr_d::loc): New member.
+ 	(get_or_alloc_expr_for_name): Initialize it.
+ 	(get_or_alloc_expr_for_constant): Likewise.
+ 	(phi_translate_1): Copy it.
+ 	(create_expression_by_pieces): Use the original location
+ 	of the expression for the inserted stmt.
+ 	(compute_avail): Record the location of the stmt for the
+ 	expressions created.
+ 
+ 2019-10-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-ssa-strlen.c (count_nonzero_bytes): Check tree_fits_uhwi_p
+ 	before using tree_to_uhwi.
+ 
+ 2019-10-15  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	* config/s390/s390.md: Run %a0:DI splitters only after reload.
+ 
+ 2019-10-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92094
+ 	* tree-vect-loop.c (vectorizable_reduction): For nested cycles
+ 	do not adjust the reduction definition def type.
+ 	* tree-vect-stmts.c (vect_transform_stmt): Verify the scalar stmt
+ 	defines the latch argument of the PHI.
+ 
+ 2019-10-15  Hongyu Wang  <hongtao.wang@intel.com>
+ 
+ 	PR target/92035
+ 	* config/i386/avx512fintrin.h (_mm_mask_roundscale_ss,
+ 	_mm_maskz_roundscale_ss, _mm_maskz_roundscale_round_ss,
+ 	_mm_maskz_roundscale_round_ss, _mm_mask_roundscale_sd,
+ 	_mm_maskz_roundscale_sd, _mm_mask_roundscale_round_sd,
+ 	_mm_maskz_roundscale_round_sd): New intrinsics.
+ 	(_mm_roundscale_ss, _mm_roundscale_round_ss): Use
+ 	__builtin_ia32_rndscales?_mask_round builtins instead of
+ 	__builtin_ia32_rndscales?_round.
+ 	* config/i386/i386-builtin.def (__builtin_ia32_rndscaless_round,
+ 	__builtin_ia32_rndscalesd_round): Remove.
+ 	(__builtin_ia32_rndscaless_mask_round,
+ 	__builtin_ia32_rndscalesd_mask_round): New intrinsics.
+ 	* config/i386/sse.md
+ 	(avx512f_rndscale<mode><round_saeonly_name>): Renamed to ...
+ 	(avx512f_rndscale<mode><mask_scalar_name><round_saeonly_scalar_name>):
+ 	 ... this, adjust and add subst atrributes to make it maskable.
+ 
+ 2019-10-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/92046
+ 	* common.opt (fallow-store-data-races): New.
+ 	* params.def (PARAM_ALLOW_STORE_DATA_RACES): Remove.
+ 	* params.h (ALLOW_STORE_DATA_RACES): Likewise.
+ 	* doc/invoke.texi (fallow-store-data-races): Document.
+ 	(--param allow-store-data-races): Remove docs.
+ 	* opts.c (default_options_table): Enable -fallow-store-data-races
+ 	at -Ofast.
+ 	(default_options_optimization): Do not enable --param
+ 	allow-store-data-races at -Ofast.
+ 	* tree-if-conv.c (ifcvt_memrefs_wont_trap): Use flag_store_data_races
+ 	instead of PARAM_ALLOW_STORE_DATA_RACES.
+ 	* tree-ssa-loop-im.c (execute_sm): Likewise.
+ 
+ 2019-10-15  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	PR tree-optimization/92085
+ 	* tree-if-conv.c (ifcvt_local_dce): Call gsi_next in else clause,
+ 	instead of calling it unconditionally after
+ 	delete_dead_or_redundant_assignment and fix indentation.
+ 
+ 2019-10-15  Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/arm/vfp.md (fma<SDF:mode>4): Enable DF only when
+ 	TARGET_VFP_DOUBLE.
+ 	(*fmsub<SDF:mode>4): Likewise.
+ 	*fnmsub<SDF:mode>4): Likewise.
+ 	(*fnmadd<SDF:mode>4): Likewise.
+ 
+ 2019-10-14 Joel Hutton  <Joel.Hutton@arm.com>
+ 
+ 	* doc/tree-ssa.texi: Update renamed macro name.
+ 
+ 2019-10-14  Mihailo Stojanovic  <mistojanovic@wavecomp.com>
+ 
+ 	* config/mips/mips.c (mips_cannot_force_const_mem): Reject
+ 	vector constants.
+ 
+ 2019-10-14  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c: Use unsigned ints for the picbase label
+ 	counters, initialise the vars explicitly.
+ 	(update_pic_label_number_if_needed): Move a variable declaration
+ 	to where it's needed.
+ 	(machopic_output_function_base_name): Use a more strict checking
+ 	assert, and and unsigned int for the picbase label counter.
+ 	(machopic_get_function_picbase): Likewise.
+ 
+ 2019-10-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/92046
+ 	* dse.c (scan_insn): Use param max_active_local_stores.
+ 	(dse_step1): Get PARAM_MAX_DSE_ACTIVE_LOCAL_STORES and adjust
+ 	based on optimization level.
+ 	* loop-invariant.c (move_loop_invariants): Adjust
+ 	LOOP_INVARIANT_MAX_BBS_IN_LOOP based on optimization level.
+ 	* opts.c (default_options_optimization): Do not adjust
+ 	PARAM_MAX_DSE_ACTIVE_LOCAL_STORES and
+ 	LOOP_INVARIANT_MAX_BBS_IN_LOOP here.
+ 
+ 2019-10-14  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/arm.c (arm_legitimize_address): Remove Thumb-2 bailout.
+ 
+ 2019-10-14  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/arm.c (arm_option_override): Don't override sched
+ 	pressure algorithm.
+ 
+ 2019-10-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92069
+ 	* tree-vect-loop.c (vect_analyze_scalar_cycles_1): For nested
+ 	cycles do not set vect_nested_cycle on the latch definition.
+ 
+ 2019-10-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* function-abi.h (expr_callee_abi): Declare.
+ 	* function-abi.cc (expr_callee_abi): New function.
+ 
+ 2019-10-14  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.c (value_range_base::set): Normalize unsigned ~[0,0]
+ 	into [1,MAX].
+ 	* tree-vrp.h (value_range_base::nonzero_p): Adjust for unsigned
+ 	non-zero being represented as [1,MAX].
+ 
+ 2019-10-14  Xiong Hu Luo  <luoxhu@linux.ibm.com>
+ 
+ 	* tree-sra.c (dump_access): Add missing braces.
+ 
+ 2019-10-13  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (machopic_indirection_name): Rework the
+ 	function to emit linker-visible symbols only for indirections
+ 	in the data section.  Clean up the code and update comments.
+ 
+ 2019-10-13  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (machopic_indirect_data_reference): Remove
+ 	redundant code.
+ 
+ 2019-10-13  Nathan Sidwell  <nathan@acm.org>
+ 
+ 	* gengtype-lex.l (CXX_KEYWORD): Add 'mutable'.
+ 
+ 2019-10-13  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* doc/sourcebuild.texi (Test Directives, Add Options): Remove
+ 	c99_runtime.
+ 
+ 2019-10-12  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* lto-streamer-out.c (collect_block_tree_leafs): Renumber statements
+ 	so non-virutal are before virutals.
+ 	(output_function): Avoid body modifications.
+ 
+ 2019-10-12  John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	* config/pa/pa.c (pa_output_call): Load descriptor address to register
+ 	%r22.  Load function address before global pointer.
+ 	(pa_attr_length_indirect_call): Adjust length of inline versions of
+ 	$$dyncall.
+ 	(pa_output_indirect_call): Remove fast inline version of $$dyncall
+ 	before normal cases.  Update inline $$dyncall sequences to preserve
+ 	function descriptor address in register %r22.
+ 	(TRAMPOLINE_CODE_SIZE): Adjust.
+ 	(pa_asm_trampoline_template): Revise 32-bit trampoline.  Don't assume
+ 	register %r22 contains trampoline address.
+ 	(pa_trampoline_init): Adjust offsets.
+ 	(pa_trampoline_adjust_address): Likewise.
+ 	* config/pa/pa.h (TRAMPOLINE_SIZE): Adjust 32-bit size.
+ 
+ 2019-10-12  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/67183
+ 	* config/darwin.c (machopic_indirection): New field to flag
+ 	non-lazy-symbol-pointers in the data section.
+ 	(machopic_indirection_name): Compute if an indirection should
+ 	appear in the data section.
+ 	(machopic_output_data_section_indirection): New callback split
+ 	from machopic_output_indirection.
+ 	(machopic_output_stub_indirection): Likewise.
+ 	(machopic_output_indirection): Retain the code for non-lazy
+ 	symbol pointers in their regular section.
+ 	(machopic_finish): Use the new callbacks to order the indirection
+ 	output.
+ 
+ 2019-10-12  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin-protos.h (machopic_finish): Delete.
+ 	* config/darwin.c (machopic_finish): Make static.
+ 
+ 2019-10-12  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (darwin_file_end): Only emit empty CTOR/DTOR
+ 	sections when building kernel extension code.
+ 
+ 2019-10-12  Palmer Dabbelt  <palmer@sifive.com>
+ 
+ 	* doc/extend.texi (Alternate Keywords): Change "-std=c11" to "a
+ 	later standard."
+ 
+ 2019-10-12  John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	* config/pa/pa.c (pa_option_override): Remove trailing comma
+ 	from warning.
+ 
+ 2019-10-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/92063
+ 	* tree-eh.c (operation_could_trap_helper_p) <case COND_EXPR>
+ 	<case VEC_COND_EXPR>: Return false with *handled = false.
+ 	(tree_could_trap_p): For {,VEC_}COND_EXPR return false instead of
+ 	recursing on the first operand.
+ 	* fold-const.c (simple_operand_p_2): Use generic_expr_could_trap_p
+ 	instead of tree_could_trap_p.
+ 	* tree-ssa-sccvn.c (vn_nary_may_trap): Formatting fixes.
+ 
+ 2019-10-11  Jim Wilson  <jimw@sifive.com>
+ 
+ 	PR rtl-optimization/91860
+ 	* combine.c (subst): If new_rtx is a constant, also check for
+ 	SIGN_EXTEND when deciding whether to call simplify_unary_operation.
+ 
+ 2019-10-11  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* expr.c (store_expr): Use rtx_to_poly_int64 rather than
+ 	INTVAL when calling store_bit_field.
+ 
+ 2019-10-11  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/arm.h (HONOR_REG_ALLOC_ORDER): Set when optimizing for
+ 	size.
+ 
+ 2019-10-11  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* tree-vect-loop.c (vect_analyze_loop_operations): Adjust call to
+ 	vectorizable_live_operation.
+ 	(vectorizable_live_operation): Adjust parameters.
+ 	* tree-vect-stmts.c (vect_init_vector,
+ 	vect_gen_widened_results_half): Fix typo in function comment.
+ 	(can_vectorize_live_stmts): Adjust function comment.
+ 	Adjust parameters.  Adjust call to vectorizable_live_operation.
+ 	(vect_analyze_stmt): Adjust call to can_vectorize_live_stmts.
+ 	(vect_transform_stmt): Adjust function comment.  Adjust call to
+ 	can_vectorize_live_stmts.
+ 	* tree-vectorizer.h (vectorizable_live_operation): Adjust parameters.
+ 
+ 2019-10-11  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90883
+ 	PR tree-optimization/91091
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Use correct
+ 	alias-sets both for recording VN table entries and continuing
+ 	walking after translating through copies.  Handle same-sized
+ 	reads from SSA names by returning the plain SSA name.
+ 	(eliminate_dom_walker::eliminate_stmt): Properly handle
+ 	non-size precision stores in redundant store elimination.
+ 
+ 2019-10-11  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ggc-page.c (release_pages): Output statistics when !quiet_flag.
+ 	(ggc_collect): Dump later to not interfere with release_page dump.
+ 	(ggc_trim): New function.
+ 	* ggc-none.c (ggc_trim): New.
+ 	* ggc.h (ggc_trim): Declare.
+ 
+ 2019-10-11  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/92066
+ 	PR tree-optimization/92046
+ 	* tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
+ 	Fix bogus cost model check.
+ 
+ 2019-10-11  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	* langhooks-def.h (LANG_HOOKS_OMP_IS_ALLOCATABLE_OR_PTR): Define.
+ 	(LANG_HOOKS_DECLS): Add it.
+ 	* langhooks.h (lang_hooks_for_decls): Add omp_is_allocatable_or_ptr;
+ 	update comment for omp_is_optional_argument.
+ 	* omp-general.c (omp_is_allocatable_or_ptr): New.
+ 	* omp-general.h (omp_is_allocatable_or_ptr): Declare.
+ 	* omp-low.c (scan_sharing_clauses, lower_omp_target): Handle
+ 	Fortran's optional arguments and allocatable/pointer scalars
+ 	with use_device_addr.
+ 
+ 2019-10-11  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	PR target/77918
+ 	* config/s390/2827.md: Add new opcodes.
+ 	* config/s390/2964.md: Likewise.
+ 	* config/s390/3906.md: Likewise.
+ 	* config/s390/8561.md: Likewise.
+ 	* config/s390/s390-builtins.def (s390_vfchesb): Use
+ 	the new vec_cmpgev4sf_quiet_nocc.
+ 	(s390_vfchedb): Use the new vec_cmpgev2df_quiet_nocc.
+ 	(s390_vfchsb): Use the new vec_cmpgtv4sf_quiet_nocc.
+ 	(s390_vfchdb): Use the new vec_cmpgtv2df_quiet_nocc.
+ 	(vec_cmplev4sf): Use the new vec_cmplev4sf_quiet_nocc.
+ 	(vec_cmplev2df): Use the new vec_cmplev2df_quiet_nocc.
+ 	(vec_cmpltv4sf): Use the new vec_cmpltv4sf_quiet_nocc.
+ 	(vec_cmpltv2df): Use the new vec_cmpltv2df_quiet_nocc.
+ 	* config/s390/s390-modes.def (CCSFPS): New mode.
+ 	* config/s390/s390.c (s390_match_ccmode_set): Support CCSFPS.
+ 	(s390_select_ccmode): Return CCSFPS for LT, LE, GT, GE and LTGT.
+ 	(s390_branch_condition_mask): Reuse CCS for CCSFPS.
+ 	(s390_expand_vec_compare): Use non-signaling patterns where
+ 	necessary.
+ 	(s390_reverse_condition): Support CCSFPS.
+ 	* config/s390/s390.md (*cmp<mode>_ccsfps): New pattern.
+ 	* config/s390/vector.md: (VFCMP_HW_OP): Remove.
+ 	(asm_fcmp_op): Likewise.
+ 	(*smaxv2df3_vx): Use pattern for quiet comparison.
+ 	(*sminv2df3_vx): Likewise.
+ 	(*vec_cmp<VFCMP_HW_OP:code><mode>_nocc): Remove.
+ 	(*vec_cmpeq<mode>_quiet_nocc): New pattern.
+ 	(vec_cmpgt<mode>_quiet_nocc): Likewise.
+ 	(vec_cmplt<mode>_quiet_nocc): New expander.
+ 	(vec_cmpge<mode>_quiet_nocc): New pattern.
+ 	(vec_cmple<mode>_quiet_nocc): New expander.
+ 	(*vec_cmpeq<mode>_signaling_nocc): New pattern.
+ 	(*vec_cmpgt<mode>_signaling_nocc): Likewise.
+ 	(*vec_cmpgt<mode>_signaling_finite_nocc): Likewise.
+ 	(*vec_cmpge<mode>_signaling_nocc): Likewise.
+ 	(*vec_cmpge<mode>_signaling_finite_nocc): Likewise.
+ 	(vec_cmpungt<mode>): New expander.
+ 	(vec_cmpunge<mode>): Likewise.
+ 	(vec_cmpuneq<mode>): Use quiet patterns.
+ 	(vec_cmpltgt<mode>): Allow only on z14+.
+ 	(vec_cmpordered<mode>): Use quiet patterns.
+ 	(vec_cmpunordered<mode>): Likewise.
+ 	(VEC_CMP_EXPAND): Add ungt and unge.
+ 
+ 2019-10-11  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* gimple-streamer-out.c (output_gimple_stmt): Add explicit function
+ 	parameter.
+ 	* lto-streamer-out.c: Include tree-dfa.h.
+ 	(output_cfg): Do not use cfun.
+ 	(lto_prepare_function_for_streaming): New.
+ 	(output_function): Do not push cfun; do not initialize loop optimizer.
+ 	* lto-streamer.h (lto_prepare_function_for_streaming): Declare.
+ 	* passes.c (ipa_write_summaries): Use it.
+ 	(ipa_write_optimization_summaries): Do not modify bodies.
+ 	* tree-dfa.c (renumber_gimple_stmt_uids): Add function parameter.
+ 	* tree.dfa.h (renumber_gimple_stmt_uids): Update prototype.
+ 	* tree-ssa-dse.c (pass_dse::execute): Update use of
+ 	renumber_gimple_stmt_uids.
+ 	* tree-ssa-math-opts.c (pass_optimize_widening_mul::execute): Likewise.
+ 
+ 2019-10-11  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_builtin_vectorization_cost): Lower
+ 	vec_promote_demote cost to 1 for non-Power7 VSX architectures.
+ 
+ 2019-10-10  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* ginclude/float.h [!__DEC32_MANT_DIG__]: Do not define DFP
+ 	macros.
+ 	[__STDC_WANT_IEC_60559_DFP_EXT__ || __STDC_VERSION__ > 201710L]:
+ 	Also define DFP macros for these conditions.
+ 	[!__STDC_WANT_DEC_FP__] (DEC32_SUBNORMAL_MIN, DEC64_SUBNORMAL_MIN,
+ 	DEC128_SUBNORMAL_MIN): Do not define.
+ 	[__STDC_WANT_IEC_60559_DFP_EXT__ || __STDC_VERSION__ > 201710L]
+ 	(DEC32_TRUE_MIN, DEC64_TRUE_MIN, DEC128_TRUE_MIN): New macros.
+ 
+ 2019-10-10  Xiong Hu Luo  <luoxhu@linux.ibm.com>
+ 	    Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	PR middle-end/26241
+ 	* doc/lto.texi (IPA): Reference to the IPA passes.
+ 	* doc/passes.texi (Pass manager): Add node IPA passes and
+ 	  description for each IPA pass.
+ 
+ 2019-10-10  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-reference.c: Do not include splay-tree.h
+ 	(reference_vars_to_consider): Turn to hash map.
+ 	(get_static_name, ipa_init, analyze_function, propagate,
+ 	stream_out_bitmap, ipa_reference_write_optimization_summary,
+ 	ipa_reference_write_optimization_summary): Update.
+ 
+ 2019-10-10  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-reference.c (propagate): Fix releasing of IPA summaries.
+ 
+ 2019-10-10  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c: Lookup Objective C metadata and force indirection
+ 	for IVAR refs.
+ 
+ 2019-10-10  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.c (quad_address_p): Add check for prefixed
+ 	addresses.
+ 	(mem_operand_gpr): Add check for prefixed addresses.
+ 	(mem_operand_ds_form): Add check for prefixed addresses.
+ 	(rs6000_legitimate_offset_address_p): If we support prefixed
+ 	addresses, check for a 34-bit offset instead of 16-bit.
+ 	(rs6000_legitimate_address_p): Add check for prefixed addresses.
+ 	Do not allow load/store with update if the address is prefixed.
+ 	(rs6000_mode_dependent_address):  If we support prefixed
+ 	addresses, check for a 34-bit offset instead of 16-bit.
+ 
+ 2019-10-10  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	PR target/77918
+ 	* config/s390/vector.md (vcond_comparison_operator): New
+ 	predicate.
+ 	(vcond<V_HW:mode><V_HW2:mode>): Use vcond_comparison_operator.
+ 
+ 2019-10-10  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR 87488
+ 	* Makefile.in (CFLAGS-opts.o): Pass in DOCUMENTATION_ROOT_URL via
+ 	-D.
+ 	* configure.ac (--with-documentation-root-url): New option.
+ 	* configure: Regenerate.
+ 	* diagnostic-format-json.cc (json_end_diagnostic): If there is an
+ 	option URL, add it as a new string field of the diagnostic option.
+ 	* diagnostic.c (diagnostic_initialize): Initialize get_option_url.
+ 	(print_option_information): If get_option_url is non-NULL, call
+ 	it, and if the result is non-NULL, potentially emit an escape
+ 	sequence to markup the option text with the resulting URL.
+ 	* diagnostic.h (diagnostic_context::get_option_url): New callback.
+ 	* doc/invoke.texi (-fdiagnostics-format=): Add "option_url" to
+ 	example of JSON output.
+ 	* opts-diagnostic.h (get_option_url): New decl.
+ 	* opts.c (get_option_url): New function.
+ 	* toplev.c (general_init): Initialize the get_option_url callback.
+ 
+ 2019-10-10  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR 87488
+ 	* common.opt (fdiagnostics-urls=): New option.
+ 	(diagnostic-url.h): Add SourceInclude.
+ 	(diagnostic_url_rule): New enum.
+ 	* diagnostic-color.c: Include "diagnostic-url.h".
+ 	(diagnostic_urls_enabled_p): New function.
+ 	* diagnostic-url.h: New file.
+ 	* diagnostic.c: Include "diagnostic-url.h".
+ 	(diagnostic_urls_init): New function.
+ 	* diagnostic.h (diagnostic_urls_init): New decl.
+ 	* doc/invoke.texi (Diagnostic Message Formatting Options): Add
+ 	-fdiagnostics-urls to the list.
+ 	(-fdiagnostics-urls): New option.
+ 	* gcc.c (driver_handle_option): Handle OPT_fdiagnostics_urls_.
+ 	(driver::global_initializations): Call diagnostic_urls_init.
+ 	* opts-global.c (init_options_once): Likewise.
+ 	* opts.c (common_handle_option): Handle OPT_fdiagnostics_urls_.
+ 	* pretty-print.c (pretty_printer::pretty_printer): Initialize
+ 	show_urls.
+ 	(pp_begin_url): New function.
+ 	(pp_end_url): New function.
+ 	(selftest::test_urls): New selftest.
+ 	(selftest::pretty_print_c_tests): Call it.
+ 	* pretty-print.h (pretty_printer::show_urls): New field.
+ 	(pp_begin_url): New decl.
+ 	(pp_end_url): New decl.
+ 
+ 2019-10-10  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/92022
+ 	* config/alpha/alpha.c (alpha_handle_trap_shadows): Skip DEBUG_INSN.
+ 
+ 2019-10-10  Oleg Endo  <olegendo@gcc.gnu.org>
+ 
+ 	PR target/88630
+ 	* config/sh/sh.h (TARGET_FPU_SH4_300): New macro.
+ 	* config/sh/sh.c (sh_option_override): Enable fsca and fsrra insns
+ 	also for TARGET_FPU_SH4_300.
+ 	(sh_emit_mode_set): Check for TARGET_FPU_SH4_300 instead of
+ 	TARGET_SH4_300.
+ 	* config/sh/sh.md (toggle_pr): Add TARGET_FPU_SH4_300 condition.
+ 	(negsf2): Expand to either negsf2_fpscr or negsf2_no_fpscr.
+ 	(*negsf2_i): Split into ...
+ 	(negsf2_fpscr, negsf2_no_fpscr): ... these new patterns.
+ 	(abssf2): Expand to either abssf2_fpsc or abssf2_no_fpsc.
+ 	(**abssf2_i): Split into ...
+ 	(abssf2_fpscr, abssf2_no_fpscr): ... these new patterns.
+ 	(negdf2): Expand to either negdf2_fpscr or negdf2_no_fpscr.
+ 	(*negdf2_i): Split into ...
+ 	(negdf2_fpscr, negdf2_no_fpscr): ... these new patterns.
+ 	(absdf2): Expand to either absdf2_fpscr or absdf2_no_fpsc.
+ 	(**abssf2_i): Split into ...
+ 	(absdf2_fpscr, absdf2_no_fpscr): ... these new patterns.
+ 
+ 2019-10-10  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/92046
+ 	* opts.c (finish_options): Do not influence global --params
+ 	from options that are adjustable per function.
+ 	* tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
+ 	Apply --param adjustment based on active cost-model.
+ 	* tree-ssa-phiopt.c (cond_if_else_store_replacement): Disable
+ 	further store-sinking when vectorization or if-conversion
+ 	are not enabled.
+ 
+ 2019-10-10  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR middle-end/92037
+ 	* cgraph.c (symbol_table_test::symbol_table_test): Use ggc_alloc
+ 	rather than ggc_alloc_cleared to alloc symbol table.
+ 	* toplev.c (general_init): Likewise.
+ 	* cgraph.h (symbol_table): Explicitly construct every field.
+ 
+ 2019-10-10  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* common/config/s390/s390-common.c (PF_ARCH13): Rename to...
+ 	(PF_Z15): ... this.
+ 	* config.gcc: Add z15 as option for --with-arch and --with-tune
+ 	configure switches.
+ 	* config/s390/s390-c.c (s390_resolve_overloaded_builtin): Add
+ 	error reporting for unsupported builtins.
+ 	* config/s390/s390-opts.h (enum processor_type): Rename
+ 	PROCESSOR_8561_ARCH13 to PROCESSOR_8561_Z15.
+ 	* config/s390/8561.md: Rename arch13 to z15 throughout the file.
+ 	* config/s390/driver-native.c (s390_host_detect_local_cpu):
+ 	Likewise.
+ 	* config/s390/s390-builtins.def: Likewise.
+ 	* config/s390/s390.c (processor_table): Add z15 as option and keep arch13 as alternative.
+ 	(s390_expand_builtin): Add missing check for unsupported builtins.
+ 	(s390_canonicalize_comparison): Rename TARGET_ARCH13 to TARGET_Z15.
+ 	(s390_rtx_costs): Likewise.
+ 	(s390_get_sched_attrmask): Rename arch13 to z15.
+ 	(s390_get_unit_mask): Likewise.
+ 	(s390_is_fpd): Likewise.
+ 	(s390_is_fxd): Likewise.
+ 	* config/s390/s390.h (enum processor_flags): Likewise.
+ 	* config/s390/s390.md: Likewise.
+ 	* config/s390/vector.md: Likewise.
+ 	* config/s390/vx-builtins.md: Likewise.
+ 	* config/s390/s390.opt: Add z15 to processor_type value.
+ 
+ 2019-10-10  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	PR target/91035
+ 	* config/s390/s390-protos.h (s390_output_split_stack_data): Add
+ 	prototype.
+ 	* config/s390/s390.md (UNSPECV_SPLIT_STACK_DATA): Remove.
+ 	("split_stack_data", "split_stack_call")
+ 	("split_stack_call_<mode>", "split_stack_cond_call")
+ 	("split_stack_cond_call_<mode>"): Remove.
+ 	("@split_stack_call<mode>", "@split_stack_cond_call<mode>"): New
+ 	insn definition.
+ 	* config/s390/s390.c (s390_output_split_stack_data): New function.
+ 	(s390_expand_split_stack_prologue): Use the merged expander.
+ 
+ 2019-10-09  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/90879
+ 	* builtins.c (check_access): Avoid using maxbound when null.
+ 	* calls.c (maybe_warn_nonstring_arg): Adjust to get_range_strlen change.
+ 	* doc/invoke.texi (-Wstring-compare): Document new warning option.
+ 	* gimple-fold.c (get_range_strlen_tree): Make setting maxbound
+ 	conditional.
+ 	(get_range_strlen): Overwrite initial maxbound when non-null.
+ 	* gimple-ssa-sprintf.c (get_string_length): Adjust to get_range_strlen
+ 	changes.
+ 	* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Same.
+ 	(used_only_for_zero_equality): New function.
+ 	(handle_builtin_memcmp): Call it.
+ 	(determine_min_objsize): Return an integer instead of tree.
+ 	(get_len_or_size, strxcmp_eqz_result): New functions.
+ 	(maybe_warn_pointless_strcmp): New function.
+ 	(handle_builtin_string_cmp): Call it.  Fold zero-equality of strcmp
+ 	between a longer string and a smaller array.
+ 	(get_range_strlen_dynamic): Overwrite initial maxbound when non-null.
+ 
+ 2019-10-09  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (darwin_override_options): Make the check for
+ 	Objective-C ABI version more specific for 64bit code.
+ 
+ 2019-10-09  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (machopic_indirect_data_reference): Set flag to
+ 	indicate that the new symbol is an indirection.
+ 	(machopic_indirect_call_target): Likewise.
+ 	* config/darwin.h (MACHO_SYMBOL_FLAG_INDIRECTION): New.
+ 	(MACHO_SYMBOL_INDIRECTION_P): New.
+ 	(MACHO_SYMBOL_FLAG_STATIC): Adjust bit number.
+ 
+ 2019-10-08  Jason Merrill  <jason@redhat.com>
+ 
+ 	* doc/invoke.texi: Document -fconcepts-ts.
+ 
+ 2019-10-09  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (vect_is_simple_reduction): Simplify and
+ 	allow stmts other than GIMPLE_ASSIGN in nested cycles.
+ 
+ 2019-10-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vectorizer.h (_stmt_vec_info::reduc_vectype_in): New.
+ 	(_stmt_vec_info::force_single_cycle): Likewise.
+ 	(STMT_VINFO_FORCE_SINGLE_CYCLE): New.
+ 	(STMT_VINFO_REDUC_VECTYPE_IN): Likewise.
+ 	* tree-vect-loop.c (vectorizable_reduction): Set
+ 	STMT_VINFO_REDUC_VECTYPE_IN and STMT_VINFO_FORCE_SINGLE_CYCLE.
+ 	(vect_transform_reduction): Use them to remove redundant code.
+ 	(vect_transform_cycle_phi): Likewise.
+ 
+ 2019-10-08  Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
+ 
+ 	PR tree-optimization/90836
+ 	* match.pd (popcount): New pattern.
+ 
+ 2019-10-08  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/92026
+ 	PR middle-end/92014
+ 	* tree-ssa-strlen.c (count_nonzero_bytes): Avoid recursing for MEM_REF
+ 	again once nbytes has been set.  Set the access size when not yet set.
+ 
+ 2019-10-08  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (machopic_select_section): Remove dead code for
+ 	old Objective-C section selection method, replace with unreachable.
+ 
+ 2019-10-08  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (machopic_indirect_data_reference): Check for
+ 	required indirections before making direct access to defined
+ 	values.
+ 	(machopic_output_indirection): Place the indirected pointes for
+ 	required indirections into the non-lazy symbol pointers section.
+ 	(darwin_encode_section_info):
+ 	* config/darwin.h (MACHO_SYMBOL_FLAG_MUST_INDIRECT): New.
+ 	(MACHO_SYMBOL_MUST_INDIRECT_P): New.
+ 
+ 2019-10-08  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/91994
+ 	* config/i386/i386.c (x86_avx_u128_mode_needed): Use SSE_REG
+ 	instead of ALL_SSE_REG to check if function call preserves some
+ 	256-bit SSE registers.
+ 
+ 2019-10-08  Tulio Magno Quites Machado Filho  <tuliom@linux.ibm.com>
+ 
+ 	* config.gcc: Move -L usage from LINK_OS_EXTRA_SPEC32 and
+ 	LINK_OS_EXTRA_SPEC64 to MD_STARTFILE_PREFIX and
+ 	MD_STARTFILE_PREFIX_1 when using --with-advance-toolchain.
+ 
+ 2019-10-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vectorizer.h (_stmt_vec_info::v_reduc_type): Remove.
+ 	(_stmt_vec_info::is_reduc_info): Add.
+ 	(STMT_VINFO_VEC_REDUCTION_TYPE): Remove.
+ 	(vectorizable_condition): Remove.
+ 	(vectorizable_shift): Likewise.
+ 	(vectorizable_reduction): Adjust.
+ 	(info_for_reduction): New.
+ 	* tree-vect-loop.c (vect_force_simple_reduction): Fold into...
+ 	(vect_analyze_scalar_cycles_1): ... here.
+ 	(vect_analyze_loop_operations): Adjust.
+ 	(needs_fold_left_reduction_p): Simplify for single caller.
+ 	(vect_is_simple_reduction): Likewise.  Remove stmt restriction
+ 	for nested cycles not part of double reductions.
+ 	(vect_model_reduction_cost): Pass in the reduction type.
+ 	(info_for_reduction): New function.
+ 	(vect_create_epilog_for_reduction): Use it, access reduction
+ 	meta off the stmt info it returns.  Use STMT_VINFO_REDUC_TYPE
+ 	instead of STMT_VINFO_VEC_REDUCTION_TYPE.
+ 	(vectorize_fold_left_reduction): Remove pointless assert.
+ 	(vectorizable_reduction): Analyze the full reduction when
+ 	visiting the outermost PHI.  Simplify.  Use STMT_VINFO_REDUC_TYPE
+ 	instead of STMT_VINFO_VEC_REDUCTION_TYPE.  Direct reduction
+ 	stmt code-generation to vectorizable_* in most cases.  Verify
+ 	code-generation only for cases handled by
+ 	vect_transform_reductuon.
+ 	(vect_transform_reduction): Use info_for_reduction to get at
+ 	reduction meta.  Simplify.
+ 	(vect_transform_cycle_phi): Likewise.
+ 	(vectorizable_live_operation): Likewise.
+ 	* tree-vect-patterns.c (vect_reassociating_reduction_p): Look
+ 	at the PHI node for STMT_VINFO_REDUC_TYPE.
+ 	* tree-vect-slp.c (vect_schedule_slp_instance): Remove no
+ 	longer necessary code.
+ 	* tree-vect-stmts.c (vectorizable_shift): Make static again.
+ 	(vectorizable_condition): Likewise.  Get at reduction related
+ 	info via info_for_reduction.
+ 	(vect_analyze_stmt): Adjust.
+ 	(vect_transform_stmt): Likewise.
+ 	* tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
+ 	STMT_VINFO_REDUC_TYPE instead of STMT_VINFO_VEC_REDUCTION_TYPE.
+ 
+ 2019-10-08  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* doc/invoke.texi (-ffp-int-builtin-inexact): Document
+ 	-fno-fp-int-builtin-inexact default for C2X.
+ 
+ 2019-10-07  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 	    Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91532
+ 	* tree-if-conv.c: Include tree-ssa-dse.h.
+ 	(ifcvt_local_dce): Change param from bb to loop,
+ 	and call dse_classify_store.
+ 	(tree_if_conversion): Pass loop instead of loop->header as arg
+ 	to ifcvt_local_dce.
+ 	* tree-ssa-dse.c: Include tree-ssa-dse.h.
+ 	(delete_dead_or_redundant_assignment): Remove static qualifier from
+ 	declaration, and add prototype in tree-ssa-dse.h.
+ 	(dse_store_status): Move to tree-ssa-dse.h.
+ 	(dse_classify_store): Remove static qualifier and add new tree param
+ 	stop_at_vuse, and add prototype in tree-ssa-dse.h.
+ 	* tree-ssa-dse.h: New header.
+ 
+ 2019-10-07  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (machopic_output_indirection): Don't put
+ 	hidden symbol indirections into the .data section, use the
+ 	non-lazy symbol pointers section as normal.
+ 	(darwin_encode_section_info): Record if a symbol is hidden.
+ 	* config/darwin.h (MACHO_SYMBOL_FLAG_HIDDEN_VIS): New.
+ 	(MACHO_SYMBOL_HIDDEN_VIS_P): New.
+ 
+ 2019-10-07  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (machopic_symbol_defined_p): Use symbol flag
+ 	predicates instead of accessing bits directly.
+ 	(machopic_indirect_call_target): Likewise.
+ 	(machopic_output_indirection): Likewise.
+ 	(darwin_encode_section_info): Improve description.  Use renamed
+ 	symbol flags.  Use predicate macros for variables and functions.
+ 	* config/darwin.h:
+ 	Rename MACHO_SYMBOL_VARIABLE to MACHO_SYMBOL_FLAG_VARIABLE.
+ 	Rename MACHO_SYMBOL_DEFINED to MACHO_SYMBOL_FLAG_DEFINED.
+ 	Rename MACHO_SYMBOL_STATIC to MACHO_SYMBOL_FLAG_STATIC.
+ 	(MACHO_SYMBOL_VARIABLE_P): New.
+ 	(MACHO_SYMBOL_DEFINED_P):New.
+ 	(MACHO_SYMBOL_STATIC_P): New.
+ 	* config/i386/darwin.h (MACHO_SYMBOL_FLAG_VARIABLE): Delete.
+ 	(SYMBOL_FLAG_SUBT_DEP): New.
+ 	* config/rs6000/darwin.h (SYMBOL_FLAG_SUBT_DEP): New.
+ 
+ 2019-10-07  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.c (msp430_file_end): s/msp_/msp430_/
+ 	(msp430_expand_epilogue): Likewise.
+ 	* config/msp430/predicates.md: Likewise.
+ 	* config/msp430/msp430.md: Likewise.
+ 	Replace blocks of 8 spaces with tabs.
+ 
+ 2019-10-07  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430-protos.h (msp430_split_addsi): New prototype.
+ 	* config/msp430/msp430.c (msp430_split_addsi): New.
+ 	* config/msp430/msp430.md: Call msp430_split_addsi () instead of using
+ 	a block of C code for splitting addsi.
+ 
+ 2019-10-07  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386-expand.c (ix86_expand_floorceildf_32,
+ 	ix86_expand_rounddf_32): Reorder functions.
+ 	* config/i386/i386-protos.h: Update.
+ 
+ 2019-10-07  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config.in: Regenerate.
+ 	* config/msp430/constraints.md: Fix docstring for "Ys" constraint.
+ 	Add new "Yx" constraint.
+ 	* config/msp430/driver-msp430.c (msp430_propagate_region_opt): New spec
+ 	function.
+ 	* config/msp430/msp430-protos.h (msp430_op_not_in_high_mem): New
+ 	prototype.
+ 	* config/msp430/msp430.c (msp430_option_override): Allow the lower
+ 	code/data region to be selected in the small memory model.
+ 	(msp430_section_attr): Don't warn if the "section" and "lower"
+ 	attributes are used together.
+ 	(msp430_handle_generic_attribute): Likewise.
+ 	(msp430_var_in_low_mem): New function.
+ 	(TARGET_ENCODE_SECTION_INFO): Define.
+ 	(msp430_encode_section_info): New function.
+ 	(gen_prefix): Return early in the small memory model.
+ 	Require TARGET_USE_LOWER_REGION_PREFIX to be set before adding the
+ 	".lower" prefix if -m{code,data}-region=lower have been passed.
+ 	(msp430_output_aligned_decl_common): Emit common symbols when
+ 	-mdata-region=lower is passed unless TARGET_USE_LOWER_REGION_PREFIX is
+ 	set.
+ 	(TARGET_ASM_FILE_END): Define.
+ 	(msp430_file_end): New function.
+ 	(msp430_do_not_relax_short_jumps): Allow relaxation when
+ 	function will be in the lower region.
+ 	(msp430_op_not_in_high_mem): New function.
+ 	(msp430_print_operand): Check "msp430_op_not_in_high_mem" for
+ 	the 'X' operand selector.
+ 	Clarify comment for 'x' operand selector.
+ 	* config/msp430/msp430.h (LINK_SPEC): Propagate
+ 	-m{code,data}-region to the linker via spec function
+ 	msp430_propagate_region_opt.
+ 	(msp430_propagate_region_opt): New prototype.
+ 	(EXTRA_SPEC_FUNCTIONS): Add msp430_propagate_region_opt.
+ 	(SYMBOL_FLAG_LOW_MEM): Define.
+ 	* config/msp430/msp430.md (addsipsi3): Add missing "%X" operand
+ 	selector.
+ 	(zero_extendqihi2): Fix operand number used by "%X" selector.
+ 	(zero_extendqisi2): Likewise.
+ 	(zero_extendhisi2): Likewise.
+ 	(movqi): Use "Yx" constraint in place of "%X" operand selector.
+ 	(movhi): Likewise.
+ 	(addqi3): Likewise.
+ 	(addhi3): Likewise.
+ 	(addsi3): Likewise.
+ 	(addhi3_cy): Likewise.
+ 	(addchi4_cy): Likewise.
+ 	(subqi3): Likewise.
+ 	(subhi3): Likewise.
+ 	(subsi3): Likewise.
+ 	(bic<mode>3): Likewise.
+ 	(and<mode>3): Likewise.
+ 	(ior<mode>3): Likewise.
+ 	(xor<mode>3): Likewise.
+ 	(slli_1): Add missing "%X" operand selector.
+ 	(slll_1): Likewise.
+ 	(slll_2): Likewise.
+ 	(srai_1): Likewise.
+ 	(sral_1): Likewise.
+ 	(sral_2): Likewise.
+ 	(srli_1): Likewise.
+ 	(srll_1): Likewise.
+ 	(cbranchqi4_real): Use "Yx" constraint in place of "%X" operand
+ 	selector.
+ 	(cbranchhi4_real): Likewise.
+ 	(cbranchqi4_reversed): Likewise.
+ 	(cbranchhi4_reversed): Likewise.
+ 	(*bitbranch<mode>4): Likewise.
+ 	(*bitbranch<mode>4_z): Remove unnecessary "%x" operand selector.
+ 	* config/msp430/msp430.opt (mcode-region=): Set default to
+ 	MSP430_REGION_LOWER. Improve docstring.
+ 	(mdata-region=): Likewise.
+ 	(muse-lower-region-prefix): New option.
+ 	* config/msp430/t-msp430 (MULTILIB_OPTIONS): Add
+ 	mdata-region=none multilib.
+ 	(MULTILIB_MATCHES): Set mdata-region={upper,either} to match
+ 	mdata-region=none multilib.
+ 	MULTILIB_EXCEPTIONS: Remove.
+ 	MULTILIB_REQUIRED: Define.
+ 	* configure: Regenerate.
+ 	* configure.ac: Define HAVE_AS_GNU_ATTRIBUTE and
+ 	HAVE_AS_MSPABI_ATTRIBUTE if GAS version >= 2.33.50.
+ 	* doc/extend.texi: Clarify comment for {upper,lower,either}
+ 	function attributes.
+ 	Add separate description for "lower" variable attribute.
+ 
+ 2019-10-07  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	PR target/77918
+ 	* optabs-tree.c (vcond_icode_p): New function.
+ 	(vcond_eq_icode_p): Likewise.
+ 	(expand_vec_cond_expr_p): Use vcond_icode_p and
+ 	vcond_eq_icode_p.
+ 	* optabs.c (can_vcond_compare_p): New function.
+ 	* optabs.h (can_vcond_compare_p): Likewise.
+ 
+ 2019-10-07  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	PR target/77918
+ 	* gimple-expr.c (gimple_cond_get_ops_from_tree): Assert that the
+ 	caller passes a non-trapping condition.
+ 	(is_gimple_condexpr): Allow trapping conditions.
+ 	(is_gimple_condexpr_1): New helper function.
+ 	(is_gimple_condexpr_for_cond): New function, acts like old
+ 	is_gimple_condexpr.
+ 	* gimple-expr.h (is_gimple_condexpr_for_cond): New function.
+ 	* gimple.c (gimple_could_trap_p_1): Handle COND_EXPR and
+ 	VEC_COND_EXPR. Fix an issue with statements like i = (fp < 1.).
+ 	* gimplify.c (gimplify_cond_expr): Use
+ 	is_gimple_condexpr_for_cond.
+ 	(gimplify_expr): Allow is_gimple_condexpr_for_cond.
+ 	* tree-eh.c (operation_could_trap_p): Assert on COND_EXPR and
+ 	VEC_COND_EXPR.
+ 	(tree_could_trap_p): Handle COND_EXPR and VEC_COND_EXPR.
+ 	* tree-ssa-forwprop.c (forward_propagate_into_gimple_cond): Use
+ 	is_gimple_condexpr_for_cond, remove pointless tmp check
+ 	(forward_propagate_into_cond): Remove pointless tmp check.
+ 
+ 2019-10-07 Vladislav Ivanishin  <vlad@ispras.ru>
+ 
+ 	* gimple-iterator.h (gsi_next_nonvirtual_phi): Change the semantics to
+ 	match that of other gsi_next_* functions.  Adjust the comment.
+ 	(gsi_start_nonvirtual_phis): New function.
+ 	* ipa-icf.c (sem_function::compare_phi_node): Update uses of
+ 	gsi_next_nonvirtual_phi accordingly.  (No functional change.)
+ 
+ 2019-10-07 Vladislav Ivanishin  <vlad@ispras.ru>
+ 
+ 	* doc/invoke.texi (-Wuninitialized): Don't mention the clobbered by
+ 	setjmp situation here.  Fix a verb's ending: "the exact variables or
+ 	elements for which there are warnings depends" -> "... depend".
+ 
+ 2019-10-07  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* ipa-prop.c (ipa_vr::nonzero_p): Add TYPE_UNSIGNED check.
+ 
+ 2019-10-07  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* ipa-prop.c (ipa_vr::nonzero_p): New.
+ 	(ipcp_update_vr): Use nonzero_p instead of open-coding check for
+ 	non-zero range.
+ 	* ipa-prop.h (class ipa_vr): Add nonzero_p.
+ 	* tree-vrp.c (range_has_numeric_bounds_p): New.
+ 	(range_int_cst_p): Use range_has_numeric_bounds_p.
+ 	(get_range_op_handler): New.
+ 	(supported_types_p): New.
+ 	(defined_ranges_p): New.
+ 	(drop_undefines_to_varying): New.
+ 	(range_fold_binary_symbolics_p): New.
+ 	(range_fold_unary_symbolics_p): New.
+ 	(range_fold_unary_expr): Extract out into above functions.
+ 	(range_fold_binary_expr): Same.
+ 	(value_range_base::normalize_addresses): New.
+ 	(value_range_base::normalize_symbolics): Normalize addresses.
+ 	* tree-vrp.h (class value_range_base): Add normalize_addresses.
+ 
+ 2019-10-07  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.c (value_range_base::singleton_p): Use
+ 	value_range_base::num_pairs instead of vrp_val_is* to check
+ 	if a range has one sub-range.
+ 
+ 2019-10-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* ira-lives.c (check_and_make_def_conflict): Handle cases in which
+ 	DEF is not a true earlyclobber but is tied to a specific input
+ 	operand, and so is effectively earlyclobber wrt inputs that have
+ 	different values.
+ 	(make_early_clobber_and_input_conflicts): Pass this case to the above.
+ 
+ 2019-10-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* machmode.h (opt_mode): Mark constructors with CONSTEXPR.
+ 	(pod_mode): Mark operators likewise.
+ 	(scalar_int_mode): Mark non-default constructors and
+ 	operators with CONSTEXPR.
+ 	(scalar_float_mode, scalar_mode, complex_mode): Likewise.
+ 	(fixed_size_mode): Likewise.
+ 
+ 2019-10-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR target/91994
+ 	* config/i386/sse.md (avx_vzeroupper): Turn into a define_expand
+ 	and wrap the unspec_volatile in a parallel.
+ 	(*avx_vzeroupper): New define_insn.  Use a match_parallel around
+ 	the unspec_volatile.
+ 	* config/i386/predicates.md (vzeroupper_pattern): Expect the
+ 	unspec_volatile to be wrapped in a parallel.
+ 	* config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper)
+ 	(ix86_add_reg_usage_to_vzerouppers): New functions.
+ 	(rest_of_handle_insert_vzeroupper): Use them to add register
+ 	usage information to the vzeroupper instructions.
+ 
+ 2019-10-07  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91975
+ 	* tree-ssa-loop-ivcanon.c (constant_after_peeling): Consistently
+ 	handle invariants.
+ 
+ 2019-10-06  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* var-tracking.c (dataflow_set_clear_at_call): Hoist temporary
+ 	function result outside of EXECUTE_IF_SET_IN_HARD_REG_SET.
+ 
+ 2019-10-06  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (darwin_override_options): Adjust objective-c
+ 	ABI version error messages to avoid punctuation and contracted
+ 	negations.
+ 
+ 2019-10-05  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline.c: Fix type; compute size rather than self_size
+ 	for size of caller function.
+ 
+ 2019-10-05  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/59888
+ 	* config/darwin.c (darwin_rodata_section): Add relocation flag,
+ 	choose const_data section for constants with relocations.
+ 	(machopic_select_section): Pass relocation flag to
+ 	darwin_rodata_section ().
+ 
+ 2019-10-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/91734
+ 	* generic-match-head.c: Include fold-const-call.h.
+ 	* match.pd (sqrt(x) cmp c): Check the boundary value and
+ 	in case inexact computation of c*c affects comparison of the boundary,
+ 	turn LT_EXPR into LE_EXPR, GE_EXPR into GT_EXPR, LE_EXPR into LT_EXPR
+ 	or GT_EXPR into GE_EXPR.  Punt for sqrt comparisons against NaN and
+ 	for -frounding-math.  For c2, try the next smaller or larger floating
+ 	point constant depending on comparison code and if it has the same
+ 	sqrt as c2, use it instead of c2.
+ 
+ 2019-10-04  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/91977
+ 	* tree-ssa-strlen.c (count_nonzero_bytes): Handle assignments with
+ 	MEM_REF right operand.  Avoid failing for MEM_REF assignments from
+ 	uninitialized objects.
+ 
+ 2019-10-04  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* builtins.c (compute_objsize): Add an argument.
+ 	* tree-object-size.c (addr_object_size): Same.
+ 	(compute_builtin_object_size): Same.
+ 	* tree-object-size.h (compute_builtin_object): Same.
+ 
+ 2019-10-04  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline.c (inline_insns_single, inline_insns_auto): Fix typo.
+ 
+ 2019-10-04  Rafael Tsuha  <rafael.tsuha@usp.br>
+ 
+ 	* match.pd (sinh (x) / cosh (x)): New simplification rule.
+ 
+ 2019-10-04  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* tree-ssa-forwprop.c (simplify_builtin_call): Set gimple call
+ 	fntype when switching to calling memcpy instead of memset.
+ 
+ 2019-10-04  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* hash-table.h (hash_table::empty_slow): Don't assign
+ 	size_t values to int variables.
+ 
+ 2019-10-04  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* expr.c (convert_mode_scalar): Remove shadowing local var.
+ 	(emit_block_move): Rename local vars.
+ 	(block_move_libcall_safe_for_call_parm): Remove shadowing local var.
+ 	(emit_push_insn): Rename local vars.
+ 	(expand_assignment): Fix wrong mode in assign_stack_temp.  Remove
+ 	shadowing local vars.
+ 	(store_constructor): Remove shadowing local vars.  Rename local var.
+ 	(store_field, expand_cond_expr_using_cmove,
+ 	expand_expr_real_2): Remove shadowing local vars.
+ 	(expand_expr_real_1,
+ 	do_store_flag): Remove shadowing local vars.  Rename local vars.
+ 
+ 2019-10-04  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* cgraph.h (FOR_EACH_ALIAS): Avoid shadowing the loop variable.
+ 
+ 2019-10-04  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* genmatch.c (commutate): Rename local var.
+ 	(lower_cond): Reuse local var.
+ 	(dt_node::gen, dt_node::gen_kids, dt_node::gen_kids_1,
+ 	dt_operand::gen, dt_operand::gen_gimple_expr,
+ 	dt_simplify::gen): Add a param.  Rename generated vars.
+ 	(decision_tree::insert_operand,
+ 	(capture_info::walk_match, capture_info::walk_result,
+ 	capture_info::walk_c_expr): Rename local vars.
+ 	(expr::gen_transform): Rename generated vars.
+ 	Use snprintf.  Rename local vars.
+ 	(capture::gen_transform, dt_operand::get_name,
+ 	dt_operand::gen_opname): Rename generated vars.
+ 	(write_predicate): Adjust call to gen_kids.
+ 	(parser::get_internal_capture_id): Rename generated vars.
+ 	(parser::parse_expr): Rename local vars.
+ 	(parser::parse_if): Remove local var.
+ 	(parser::parse_pattern, add_operator): Rename local vars.
+ 
+ 2019-10-04  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* builtins.def (DEF_C2X_BUILTIN): New macro.
+ 	(exp10, exp10f, exp10l, fabsd32, fabsd64, fabsd128, nand32)
+ 	(nand64, nand128, roundeven, roundevenf, roundevenl, strdup)
+ 	(strndup): Use DEF_C2X_BUILTIN.
+ 	* coretypes.h (enum function_class): Add function_c2x_misc.
+ 
+ 2019-10-04  Maya Rashish  <coypu@sdf.org>
+ 
+ 	* ira-color.c (update_costs_from_allocno): Call
+ 	ira_init_register_move_cost_if_necessary.
+ 
+ 2019-10-04  Jeff Law  <law@redhat.com>
+ 
+ 	* config/h8300/h8300.md (cpymemsi): Disable.
+ 	(movmd, movmd_internal_<mode>, movstr, movsd):
+ 	(movstr, movsd, stpcpy_internal_<mode>: Likewise.
+ 	(movmd splitter, movsd splitter): Likewise.
+ 
+ 	* range-op.cc (range_tests): Avoid two tests when ints and
+ 	shorts are the same size.
+ 
+ 2019-10-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR lto/91968
+ 	* tree.c (find_decls_types_r): Do not remove LABEL_DECLs from
+ 	BLOCK_VARS.
+ 
+ 2019-10-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91982
+ 	* tree-vect-loop.c (vectorizable_live_operation): Also guard
+ 	against EXTRACT_LAST_REDUCTION.
+ 	* tree-vect-stmts.c (vect_transform_stmt): Likewise.
+ 
+ 2019-10-04  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* range-op.o (value_range_from_overflowed_bounds): Rename from
+ 	adjust_overflow_bound.
+ 	(value_range_with_overflow): Rename from
+ 	create_range_with_overflow.
+ 	(create_possibly_reversed_range): Adjusted for above renames.
+ 	(operator_*::wi_fold): Same.
+ 	(cross_product_operator::wi_cross_productor): Same.
+ 
+ 2019-10-04  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* doc/invoke.texi (-Wshadow=global, -Wshadow=local,
+ 	-Wshadow=compatible-local): Fix description.
+ 	Add an example where -Wshadow=compatible-local does not
+ 	warn.
+ 
+ 2019-10-03  John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	* config/pa/pa.h (MAX_PCREL17F_OFFSET): Adjust.
+ 
+ 	* config/pa/pa.c (pa_output_call): Remove 64-bit sibcall sequence.
+ 	(pa_attr_length_call): Adjust length for 64-bit plabel sequence.
+ 
+ 2019-10-03  Aaron Sawdey <acsawdey@linux.ibm.com>
+ 
+ 	* expr.c (emit_block_move_hints): Slightly cleaner fix to
+ 	can_move_by_pieces issue.
+ 
+ 2019-10-03  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/87243
+ 	* config/darwin-driver.c (maybe_get_sysroot_from_sdkroot): New.
+ 	(darwin_driver_init): Use the sysroot provided by SDKROOT when that
+ 	is available and the user has not set one on the command line.
+ 
+ 2019-10-03  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
+ 
+ 	PR target/91769
+ 	* config/mips/mips.c (mips_split_move): Use reg_overlap_mentioned_p
+ 	instead of REGNO equality check on addr.reg.
+ 
+ 2019-10-03  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* params.def (PARAM_INLINE_HEURISTICS_HINT_PERCENT,
+ 	PARAM_INLINE_HEURISTICS_HINT_PERCENT_O2): New.
+ 	* doc/invoke.texi (inline-heuristics-hint-percent,
+ 	inline-heuristics-hint-percent-O2): Document.
+ 	* tree-inline.c (inline_insns_single, inline_insns_auto): Add new
+ 	hint attribute.
+ 	(can_inline_edge_by_limits_p): Use it.
+ 
+ 2019-10-03  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/arm/arm.c (arm_print_value): Use real_to_decimal
+ 	to print CONST_DOUBLEs.
+ 
+ 2019-10-03  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* ipa-cp.c (ipa_cp_c_finalize): Release ipcp_transformation_sum.
+ 	* ipa-prop.c (ipcp_free_transformation_sum): New function.
+ 	* ipa-prop.h (ipcp_free_transformation_sum): Add declaration.
+ 
+ 2019-10-03  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* Makefile.in (OBJS): Add range.o and range-op.o.
+ 	Remove wide-int-range.o.
+ 	* function-tests.c (test_ranges): New.
+ 	(function_tests_c_tests): Call test_ranges.
+ 	* ipa-cp.c (ipa_vr_operation_and_type_effects): Call
+ 	range_fold_unary_expr instead of extract_range_from_unary_expr.
+ 	* ipa-prop.c (ipa_compute_jump_functions_for_edge): Same.
+ 	* range-op.cc: New file.
+ 	* range-op.h: New file.
+ 	* range.cc: New file.
+ 	* range.h: New file.
+ 	* selftest.h (range_tests): New prototype.
+ 	* ssa.h: Include range.h.
+ 	* tree-vrp.c (value_range_base::value_range_base): New
+ 	constructors.
+ 	(value_range_base::singleton_p): Do not call
+ 	ranges_from_anti_range until sure we will need to.
+ 	(value_range_base::type): Rename gcc_assert to
+ 	gcc_checking_assert.
+ 	(vrp_val_is_max): New argument.
+ 	(vrp_val_is_min): Same.
+ 	(wide_int_range_set_zero_nonzero_bits): Move from
+ 	wide-int-range.cc.
+ 	(extract_range_into_wide_ints): Remove.
+ 	(extract_range_from_multiplicative_op): Remove.
+ 	(extract_range_from_pointer_plus_expr): Abstract POINTER_PLUS code
+ 	from extract_range_from_binary_expr.
+ 	(extract_range_from_plus_minus_expr): Abstract PLUS/MINUS code
+ 	from extract_range_from_binary_expr.
+ 	(extract_range_from_binary_expr): Remove.
+ 	(normalize_for_range_ops): New.
+ 	(range_fold_binary_expr): New.
+ 	(range_fold_unary_expr): New.
+ 	(value_range_base::num_pairs): New.
+ 	(value_range_base::lower_bound): New.
+ 	(value_range_base::upper_bound): New.
+ 	(value_range_base::upper_bound): New.
+ 	(value_range_base::contains_p): New.
+ 	(value_range_base::invert): New.
+ 	(value_range_base::union_): New.
+ 	(value_range_base::intersect): New.
+ 	(range_compatible_p): New.
+ 	(value_range_base::operator==): New.
+ 	(determine_value_range_1): Call range_fold_*expr instead of
+ 	extract_range_from_*expr.
+ 	* tree-vrp.h (class value_range_base): Add new constructors.
+ 	Add methods for union_, intersect, operator==, contains_p,
+ 	num_pairs, lower_bound, upper_bound, invert.
+ 	(vrp_val_is_min): Add handle_pointers argument.
+ 	(vrp_val_is_max): Same.
+ 	(extract_range_from_unary_expr): Remove.
+ 	(extract_range_from_binary_expr): Remove.
+ 	(range_fold_unary_expr): New.
+ 	(range_fold_binary_expr): New.
+ 	* vr-values.c (vr_values::extract_range_from_binary_expr): Call
+ 	range_fold_binary_expr instead of extract_range_from_binary_expr.
+ 	(vr_values::extract_range_basic): Same.
+ 	(vr_values::extract_range_from_unary_expr): Call
+ 	range_fold_unary_expr instead of extract_range_from_unary_expr.
+ 	* wide-int-range.cc: Remove.
+ 	* wide-int-range.h: Remove.
+ 
+ 2019-10-02   Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.c (mem_operand_gpr): Use
+ 	SIGNED_16BIT_OFFSET_EXTRA_P macro.
+ 	(mem_operand_ds_form): Use SIGNED_16BIT_OFFSET_EXTRA_P macro.
+ 	(rs6000_mode_dependent_address): Use SIGNED_16BIT_OFFSET_EXTRA_P
+ 	macro.
+ 
+ 2019-10-02  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* ginclude/stdint-gcc.h [__STDC_WANT_IEC_60559_BFP_EXT__]: Change
+ 	condition on WIDTH macros to [__STDC_WANT_IEC_60559_BFP_EXT__ ||
+ 	(__STDC_VERSION__ && __STDC_VERSION__ > 201710L)].
+ 	* glimits.h: Likewise.
+ 
+ 2019-10-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/91976
+ 	* expr.c (emit_block_move_hints): Don't call can_move_by_pieces if
+ 	size is not CONST_INT_P, set pieces_ok to false in that case.  Simplify
+ 	CONST_INT_P (size) && pieces_ok to pieces_ok.  Formatting fix.
+ 
+ 2019-10-02  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/80936
+ 	* builtins.def (bcmp, bcopy, bzero): Declare nonnull.
+ 
+ 2019-10-02  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* cgraph.c (cgraph_node::rtl_info): Use SET_HARD_REG_SET
+ 	instead of reg_class_contents[ALL_REGS].
+ 
+ 2019-09-30  Jason Merrill  <jason@redhat.com>
+ 
+ 	Add some hash_map_safe_* functions like vec_safe_*.
+ 	* hash-map.h (default_hash_map_size): New variable.
+ 	(create_ggc): Use it as default argument.
+ 	(hash_map_maybe_create, hash_map_safe_get)
+ 	(hash_map_safe_get_or_insert, hash_map_safe_put): New fns.
+ 
+ 2019-10-02  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* cif-code.def (MAX_INLINE_INSNS_SINGLE_O2_LIMIT,
+ 	MAX_INLINE_INSNS_AUTO_O2_LIMIT): New.
+ 	* ipa-inline.c (inline_insns_single, inline_insns_auto): New functions.
+ 	(can_inline_edge_by_limits_p): Use it.
+ 	(big_speedup_p): Use PARAM_INLINE_MIN_SPEEDUP_O2.
+ 	(want_inline_small_function_p): Use O2 bounds.
+ 	(edge_badness): LIkewise.
+ 	* opts.c (default_options): Add OPT_finline_functions.
+ 	* params.def (PARAM_INLINE_MIN_SPEEDUP_O2,
+ 	PARAM_MAX_INLINE_INSNS_SINGLE_O2, PARAM_MAX_INLINE_INSNS_AUTO_O2):
+ 	New parameters.
+ 	* doc/invoke.texi (-finline-functions): Update documentation.
+ 	(max-inline-insns-single-O2, max-inline-insns-auto-O2,
+ 	inline-min-speedup-O2): Document.
+ 	(early-inlining-insns-O2): Simplify docs.
+ 
+ 2019-10-02  Alexander Monakov  <amonakov@ispras.ru>
+ 
+ 	PR rtl-optimization/87047
+ 	* ifcvt.c (average_cost): New static function.  Use it...
+ 	(noce_process_if_block): ... here.
+ 
+ 2019-10-02  Aaron Sawdey <acsawdey@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-protos.h (expand_block_move): Change prototype.
+ 	* config/rs6000/rs6000-string.c (expand_block_move): Add
+ 	might_overlap parm.
+ 	* config/rs6000/rs6000.md (movmemsi): Add new pattern.
+ 	(cpymemsi): Add might_overlap parm to expand_block_move() call.
+ 
+ 2019-10-02  Aaron Sawdey <acsawdey@linux.ibm.com>
+ 
+ 	* builtins.c (expand_builtin_memory_copy_args): Add might_overlap parm.
+ 	(expand_builtin_memcpy): Use might_overlap parm.
+ 	(expand_builtin_mempcpy_args): Use might_overlap parm.
+ 	(expand_builtin_memmove): Call expand_builtin_memory_copy_args.
+ 	(expand_builtin_memory_copy_args): Add might_overlap parm.
+ 	* expr.c (emit_block_move_via_cpymem): Rename to
+ 	emit_block_move_via_pattern, add might_overlap parm, use cpymem
+ 	or movmem optab as appropriate.
+ 	(emit_block_move_hints): Add might_overlap parm, do the right
+ 	thing for might_overlap==true.
+ 	* expr.h (emit_block_move_hints): Update prototype.
+ 
+ 2019-10-02  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* tree-eh.h (unsplit_eh_edges): Declare.
+ 	* tree-eh.c (maybe_remove_unreachable_handlers): Detect more cases.
+ 	(unsplit_eh_edges): New function wrapping unsplit_all_eh.
+ 	* gimple-ssa-store-merging.c: Include cfganal.h cfgcleanup.h except.h.
+ 	(struct store_immediate_info): Add lp_nr field.
+ 	(store_immediate_info::store_immediate_info): Add NR2 parameter and
+ 	initialize lp_nr with it.
+ 	(struct merged_store_group): Add lp_nr and only_constants fields.
+ 	(merged_store_group::merged_store_group): Initialize them.
+ 	(merged_store_group::can_be_merged_into): Deal with them.
+ 	(pass_store_merging): Rename terminate_and_release_chain into
+ 	terminate_and_process_chain.
+ 	(pass_store_merging::terminate_and_process_all_chains): Adjust to above
+ 	renaming and remove useless assertions.
+ 	(pass_store_merging::terminate_all_aliasing_chains): Small tweak.
+ 	(stmts_may_clobber_ref_p): Be prepared for different basic blocks.
+ 	(imm_store_chain_info::coalesce_immediate_stores): Use only_constants
+ 	instead of always recomputing it and compare lp_nr.
+ 	(imm_store_chain_info::output_merged_store): If the group is in an
+ 	active EH region, register new stores if they can throw.  Moreover,
+ 	if the insertion has created new basic blocks, adjust the PHI nodes
+ 	of the post landing pad.
+ 	(imm_store_chain_info::output_merged_stores): If the original stores
+ 	are in an active EH region, deregister them.
+ 	(lhs_valid_for_store_merging_p): Prettify.
+ 	(adjust_bit_pos): New function extracted from...
+ 	(mem_valid_for_store_merging): ...here.  Use it for the base address
+ 	and also for the offset if it is the addition of a constant.
+ 	(lp_nr_for_store): New function.
+ 	(pass_store_merging::process_store): Change return type to bool.
+ 	Call lp_nr_for_store to initialize the store info.  Propagate the
+ 	return status of various called functions to the return value.
+ 	(store_valid_for_store_merging_p): New predicate.
+ 	(enum basic_block_status): New enumeration.
+ 	(get_status_for_store_merging): New function.
+ 	(pass_store_merging::execute): If the function can throw and catch
+ 	non-call exceptions, unsplit the EH edges on entry and clean up the
+ 	CFG on exit if something changed.  Call get_status_for_store_merging
+ 	for every basic block and keep the chains open across basic blocks
+ 	when possible.  Terminate and process open chains at the end, if any.
+ 
+ 2019-10-02  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* reginfo.c (globalize_reg): Fix shadowed variable in
+ 	function_abis walk.
+ 
+ 2019-10-02  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* cgraph.c (symbol_table::create_edge): New parameter cloning_p,
+ 	do not compute some stuff when set.
+ 	(cgraph_node::create_edge): Likewise.
+ 	(cgraph_node::create_indirect_edge): Renamed last parameter to
+ 	coning_p and flipped its meaning, don't even calculate
+ 	inline_failed when set.
+ 	* cgraph.h (cgraph_node::create_edge): Add new parameter.
+ 	(symbol_table::::create_edge): Likewise.
+ 	(cgraph_node::create_indirect_edge): Rename last parameter, flip
+ 	the default value.
+ 	* cgraphclones.c (cgraph_edge::clone): Pass true cloning_p to all
+ 	call graph edge creating functions.
+ 
+ 2019-10-01  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR c++/91222
+ 	* ipa-devirt.c (warn_types_mismatch): Fix conditional on anonymous
+ 	namespace types.
+ 
+ 2019-10-02  Shahab Vahedi  <shahab@synopsys.com>
+ 
+ 	* config/arc/arc.h (ASM_SPEC): Pass -mcode-density.
+ 
+ 2019-10-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vectorizer.h (vect_transform_reduction): Declare.
+ 	* tree-vect-stmts.c (vect_transform_stmt): Use it.
+ 	* tree-vect-loop.c (vectorizable_reduction): Split out reduction
+ 	stmt transform to ...
+ 	(vect_transform_reduction): ... this.
+ 
+ 2019-10-02  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	* omp-low.c (lower_omp_target): Dereference optional argument
+ 	to work with the right pointer.
+ 
+ 2019-10-02  Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 
+ 	* langhooks-def.h (LANG_HOOKS_OMP_IS_OPTIONAL_ARGUMENT): Default to
+ 	false.
+ 	(LANG_HOOKS_DECLS): Add LANG_HOOKS_OMP_IS_OPTIONAL_ARGUMENT.
+ 	* langhooks.h (omp_is_optional_argument): New hook.
+ 	* omp-general.c (omp_is_optional_argument): New.
+ 	* omp-general.h (omp_is_optional_argument): New declaration.
+ 	* omp-low.c (lower_omp_target): Create temporary for received value
+ 	and take the address for new_var if the original variable was a
+ 	DECL_BY_REFERENCE.  Use size of referenced object when a
+ 	pass-by-reference optional argument used as argument to firstprivate.
+ 
+ 2019-10-02  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/91940
+ 	* tree-vect-patterns.c: Include tree-vector-builder.h and
+ 	vec-perm-indices.h.
+ 	(vect_recog_rotate_pattern): Also handle __builtin_bswap16, either by
+ 	unpromoting the argument back to uint16_t, or by converting into a
+ 	rotate, or into shifts plus ior.
+ 
+ 2019-10-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vectorizer.h (stmt_vec_info_type::cycle_phi_info_type):
+ 	New.
+ 	(vect_transform_cycle_phi): Declare.
+ 	* tree-vect-stmts.c (vect_transform_stmt): Call
+ 	vect_transform_cycle_phi.
+ 	* tree-vect-loop.c (vectorizable_reduction): Split out
+ 	PHI transformation stage to ...
+ 	(vect_transform_cycle_phi): ... here.
+ 
+ 2019-10-02  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/91957
+ 	* lra-lives.c (make_hard_regno_dead): Don't record conflicts for
+ 	eliminable registers.
+ 	(make_hard_regno_live): Likewise, and don't make them live.
+ 
+ 2019-10-01  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* diagnostic-show-locus.c (layout::print_gap_in_line_numbering):
+ 	Call pp_emit_prefix.
+ 	(layout::print_source_line): Likewise.
+ 	(layout::start_annotation_line): Likewise.
+ 	(diagnostic_show_locus): Remove call to temporarily clear the
+ 	prefix.
+ 	(selftest::test_one_liner_fixit_remove): Add test coverage for the
+ 	interaction of pp_set_prefix with rulers and fix-it hints.
+ 	* diagnostic.c (default_diagnostic_finalizer): Temporarily clear
+ 	prefix when calling diagnostic_show_locus, rather than destroying
+ 	it afterwards.
+ 	(print_parseable_fixits): Temporarily clear prefix.
+ 	* pretty-print.c (pp_format): Save and restore line_length, rather
+ 	than assuming it is zero.
+ 	(pp_output_formatted_text): Remove assertion that line_length is
+ 	zero.
+ 
+ 2019-10-01  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (nonoverlapping_component_refs_since_match_p):
+ 	Rename to ...
+ 	(nonoverlapping_refs_since_match_p): ... this; handle also
+ 	ARRAY_REFs.
+ 	(alias_stats): Update stats.
+ 	(dump_alias_stats): Likewise.
+ 	(cheap_array_ref_low_bound): New function.
+ 	(aliasing_matching_component_refs_p): Add partial_overlap
+ 	argument;
+ 	pass it to nonoverlapping_refs_since_match_p.
+ 	(aliasing_component_refs_walk): Update call of
+ 	aliasing_matching_component_refs_p
+ 	(nonoverlapping_array_refs_p): New function.
+ 	(decl_refs_may_alias_p, indirect_ref_may_alias_decl_p,
+ 	indirect_refs_may_alias_p): Update calls of
+ 	nonoverlapping_refs_since_match_p.
+ 
+ 2019-10-01  Maya Rashish  <coypu@sdf.org>
+ 
+ 	PR target/85401
+ 	* ira-color.c (allocno_copy_cost_saving): Call
+ 	ira_init_register_move_cost_if_necessary.
+ 
+ 2019-10-01  Maciej W. Rozycki  <macro@wdc.com>
+ 
+ 	* Makefile.in (gnat_install_lib): New variable.
+ 	* configure.ac: Substitute it.
+ 	* configure: Regenerate.
+ 
+ 2019-10-01  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR lto/91222
+ 	* ipa-devirt.c (warn_types_mismatch): Do not ICE when anonymous type
+ 	is matched with non-C++ type
+ 
+ 2019-10-01  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	* tree-if-conv.c (tree_if_conversion): Move call to ifcvt_local_dce
+ 	after local CSE.
+ 
+ 2019-10-01  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* doc/invoke.texi (early-inlining-insns-O2): Document.
+ 	(early-inlining-insns): Update.
+ 	* params.def (early-inlining-insns-O2): New bound.
+ 	(early-inlining-insns): Update docs.
+ 	* ipa-inline.c (want_early_inline_function_p): Use new bound.
+ 
+ 2019-10-01  Oleg Endo  <olegendo@gcc.gnu.org>
+ 
+ 	PR target/88562
+ 	* config/sh/sh.c (sh_extending_set_of_reg::use_as_extended_reg): Use
+ 	sh_check_add_incdec_notes to preserve REG_INC notes when replacing
+ 	a memory access insn.
+ 
+ 2019-10-01  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Don't swap
+ 	vpmsumd.
+ 
+ 2019-10-01  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	PR target/77918
+ 	* config/s390/s390.c (s390_expand_vec_compare): Use
+ 	gen_vec_cmpordered and gen_vec_cmpunordered.
+ 	* config/s390/vector.md (vec_cmpuneq, vec_cmpltgt, vec_ordered,
+ 	vec_unordered): Delete.
+ 	(vec_ordered<mode>): Rename to vec_cmpordered<mode>.
+ 	(vec_unordered<mode>): Rename to vec_cmpunordered<mode>.
+ 	(VEC_CMP_EXPAND): New iterator for the generic dispatcher.
+ 	(vec_cmp<code>): Generic dispatcher.
+ 
+ 2019-10-01  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	PR target/77918
+ 	* config/s390/vector.md (V_HW): Add V1TI in order to make
+ 	vcond$a$b generate vcondv1tiv1tf.
+ 
+ 2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR rtl-optimization/91948
+ 	* ira-build.c (ira_create_allocno): Initialize
+ 	ALLOCNO_CROSSED_CALLS_ABIS.
+ 	* ira-color.c (allocno_reload_assign): Pass hard_regno rather
+ 	than regno to ira_need_caller_save_p.
+ 
+ 2019-10-01  Alexandre Oliva <oliva@adacore.com>
+ 
+ 	* config/i386/i386-options.c
+ 	(ix86_recompute_optlev_based_flags): New, moved out of...
+ 	(ix86_option_override_internal): ... this.  Call it.
+ 	(ix86_override_options_after_change): Call it here too.
+ 
+ 	PR debug/91507
+ 	* dwarf2out.c (override_type_for_decl_p): New.
+ 	(gen_variable_die): Use it.
+ 
+ 2019-10-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (vectorizable_reduction): Move variables
+ 	to where they are used.
+ 
+ 2019-10-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* regrename.c (hide_operands): Use pc_rtx instead of cc0_rtx.
+ 	(build_def_use): Use PC instead of CC0 in a comment.
+ 
+ 2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* rtl.def (CLOBBER_HIGH): Delete.
+ 	* doc/rtl.texi (clobber_high): Remove documentation.
+ 	* rtl.h (SET_DEST): Remove CLOBBER_HIGH from the list of codes.
+ 	(reg_is_clobbered_by_clobber_high): Delete.
+ 	(gen_hard_reg_clobber_high): Likewise.
+ 	* alias.c (record_set): Remove CLOBBER_HIGH handling.
+ 	* cfgexpand.c (expand_gimple_stmt): Likewise.
+ 	* combine-stack-adj.c (single_set_for_csa): Likewise.
+ 	* combine.c (find_single_use_1, set_nonzero_bits_and_sign_copies)
+ 	(can_combine_p, is_parallel_of_n_reg_sets, try_combine)
+ 	(record_dead_and_set_regs_1, reg_dead_at_p_1): Likewise.
+ 	* cse.c (invalidate_reg): Remove clobber_high parameter.
+ 	(invalidate): Update call accordingly.
+ 	(canonicalize_insn): Remove CLOBBER_HIGH handling.
+ 	(invalidate_from_clobbers, invalidate_from_sets_and_clobbers)
+ 	(count_reg_usage, insn_live_p): Likewise.
+ 	* cselib.h (cselib_invalidate_rtx): Remove sett argument.
+ 	* cselib.c (cselib_invalidate_regno, cselib_invalidate_rtx): Likewise.
+ 	(cselib_invalidate_rtx_note_stores): Update call accordingly.
+ 	(cselib_expand_value_rtx_1): Remove CLOBBER_HIGH handling.
+ 	(cselib_invalidate_regno, cselib_process_insn): Likewise.
+ 	* dce.c (deletable_insn_p, mark_nonreg_stores_1): Likewise.
+ 	(mark_nonreg_stores_2): Likewise.
+ 	* df-scan.c (df_find_hard_reg_defs, df_uses_record): Likewise.
+ 	(df_get_call_refs): Likewise.
+ 	* dwarf2out.c (mem_loc_descriptor): Likewise.
+ 	* emit-rtl.c (verify_rtx_sharing): Likewise.
+ 	(copy_insn_1, copy_rtx_if_shared_1): Likewise.
+ 	(hard_reg_clobbers_high, gen_hard_reg_clobber_high): Delete.
+ 	* genconfig.c (walk_insn_part): Remove CLOBBER_HIGH handling.
+ 	* genemit.c (gen_exp, gen_insn): Likewise.
+ 	* genrecog.c (validate_pattern, remove_clobbers): Likewise.
+ 	* haifa-sched.c (haifa_classify_rtx): Likewise.
+ 	* ira-build.c (create_insn_allocnos): Likewise.
+ 	* ira-costs.c (scan_one_insn): Likewise.
+ 	* ira.c (equiv_init_movable_p, memref_referenced_p): Likewise.
+ 	(rtx_moveable_p, interesting_dest_for_shprep): Likewise.
+ 	* jump.c (mark_jump_label_1): Likewise.
+ 	* lra-int.h (lra_insn_reg::clobber_high): Delete.
+ 	* lra-eliminations.c (lra_eliminate_regs_1): Remove CLOBBER_HIGH
+ 	handling.
+ 	(mark_not_eliminable): Likewise.
+ 	* lra-lives.c (process_bb_lives): Likewise.
+ 	* lra.c (new_insn_reg): Remove clobber_high parameter.
+ 	(collect_non_operand_hard_regs): Likewise.  Update call to new
+ 	insn_reg.  Remove CLOBBER_HIGH handling.
+ 	(lra_set_insn_recog_data): Remove CLOBBER_HIGH handling.  Update call
+ 	to collect_non_operand_hard_regs.
+ 	(add_regs_to_insn_regno_info): Remove CLOBBER_HIGH handling.
+ 	Update call to new_insn_reg.
+ 	(lra_update_insn_regno_info): Remove CLOBBER_HIGH handling.
+ 	* postreload.c (reload_cse_simplify, reload_combine_note_use)
+ 	(move2add_note_store): Likewise.
+ 	* print-rtl.c (print_pattern): Likewise.
+ 	* recog.c (store_data_bypass_p_1, store_data_bypass_p): Likewise.
+ 	(if_test_bypass_p): Likewise.
+ 	* regcprop.c (kill_clobbered_value, kill_set_value): Likewise.
+ 	* reginfo.c (reg_scan_mark_refs): Likewise.
+ 	* reload1.c (maybe_fix_stack_asms, eliminate_regs_1): Likewise.
+ 	(elimination_effects, mark_not_eliminable, scan_paradoxical_subregs)
+ 	(forget_old_reloads_1): Likewise.
+ 	* reorg.c (find_end_label, try_merge_delay_insns, redundant_insn)
+ 	(own_thread_p, fill_simple_delay_slots, fill_slots_from_thread)
+ 	(dbr_schedule): Likewise.
+ 	* resource.c (update_live_status, mark_referenced_resources)
+ 	(mark_set_resources): Likewise.
+ 	* rtl.c (copy_rtx): Likewise.
+ 	* rtlanal.c (reg_referenced_p, set_of_1, single_set_2, noop_move_p)
+ 	(note_pattern_stores): Likewise.
+ 	(reg_is_clobbered_by_clobber_high): Delete.
+ 	* sched-deps.c (sched_analyze_reg, sched_analyze_insn): Remove
+ 	CLOBBER_HIGH handling.
+ 
+ 2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR target/91452
+ 	* config/aarch64/aarch64.h (ARM_PCS_TLSDESC): New arm_pcs.
+ 	* config/aarch64/aarch64-protos.h (aarch64_tlsdesc_abi_id): Declare.
+ 	* config/aarch64/aarch64.c (aarch64_hard_regno_call_part_clobbered):
+ 	Handle ARM_PCS_TLSDESC.
+ 	(aarch64_tlsdesc_abi_id): New function.
+ 	* config/aarch64/aarch64.md (tlsdesc_small_sve_<mode>): Use a call
+ 	rtx instead of a list of clobbers and clobber_highs.
+ 	(tlsdesc_small_<mode>): Update accordingly.
+ 
+ 2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_expand_call): Take an
+ 	extra callee_abi argument.
+ 	* config/aarch64/aarch64.c (aarch64_expand_call): Likewise.
+ 	Insert a CALLEE_ABI unspec into the call pattern as the second
+ 	element in the PARALLEL.
+ 	(aarch64_simd_call_p): Delete.
+ 	(aarch64_insn_callee_abi): Get the arm_pcs of the callee from
+ 	the new CALLEE_ABI element of the PARALLEL.
+ 	(aarch64_init_cumulative_args): Get the arm_pcs of the callee
+ 	from the function type, if given.
+ 	(aarch64_function_arg_advance): Handle ARM_PCS_SIMD.
+ 	(aarch64_function_arg): Likewise.  Return the arm_pcs of the callee
+ 	when passed the function_arg_info end marker.
+ 	(aarch64_output_mi_thunk): Pass the arm_pcs of the callee as the
+ 	final argument of gen_sibcall.
+ 	* config/aarch64/aarch64.md (UNSPEC_CALLEE_ABI): New unspec.
+ 	(call): Make operand 2 a const_int_operand and pass it to expand_call.
+ 	Wrap it in an UNSPEC_CALLEE_ABI unspec for the dummy define_expand
+ 	pattern.
+ 	(call_value): Likewise operand 3.
+ 	(sibcall): Likewise operand 2.  Place the unspec before rather than
+ 	after the return.
+ 	(sibcall_value): Likewise operand 3.
+ 	(*call_insn, *call_value_insn): Include an UNSPEC_CALLEE_ABI.
+ 	(tlsgd_small_<mode>, *tlsgd_small_<mode>): Likewise.
+ 	(*sibcall_insn, *sibcall_value_insn): Likewise.  Remove empty
+ 	constraint strings.
+ 	(untyped_call): Pass const0_rtx as the callee ABI to gen_call.
+ 
+ 2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* regs.h (HARD_REGNO_CALLER_SAVE_MODE): Update call to
+ 	choose_hard_reg_mode.
+ 	* config/sparc/sparc.h (HARD_REGNO_CALLER_SAVE_MODE): Likewise.
+ 
+ 2019-10-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* doc/md.texi (vec_pack_trunc_@var{m}): Fix typo.
+ 	(vec_pack_sfix_trunc_@var{m}, vec_pack_ufix_trunc_@var{m}): Ditto.
+ 	(vec_packs_float_@var{m}, vec_packu_float_@var{m}): Ditto.
+ 
+ 2019-09-30  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* diagnostic-show-locus.c (line_label::line_label): Initialize
+ 	m_has_vbar.
+ 	(line_label::comparator): Reverse the sort order by m_state_idx,
+ 	so that when the list is walked backwards the labels appear in
+ 	order of insertion into the rich_location.
+ 	(line_label::m_has_vbar): New field.
+ 	(layout::print_any_labels): When dealing with multiple labels at
+ 	the same line and column, only print vertical bars for the one
+ 	with the highest label_line.
+ 	(selftest::test_one_liner_labels): Update test for multiple labels
+ 	to expect the labels to be in the order of insertion into the
+ 	rich_location.  Add a test for many such labels, where the column
+ 	numbers are out-of-order relative to the insertion order.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/i386/i386.h (ix86_frame::expensive_p): New field.
+ 	(ix86_frame::expensive_count): Likewise.
+ 	* config/i386/i386.c (ix86_compute_frame_layout): Make the choice
+ 	of use_fast_prologue_epilogue robust against incidental changes
+ 	in function size.
+ 
+ 2019-09-30  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	PR target/77918
+ 	* config/s390/vector.md (vec_unordered<mode>): Call
+ 	gen_vec_ordered<mode>.
+ 
+ 2019-09-30  Yuliang Wang  <yuliang.wang@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (sdiv_pow2<mode>3):
+ 	New pattern for ASRD.
+ 	* config/aarch64/iterators.md (UNSPEC_ASRD): New unspec.
+ 	* internal-fn.def (IFN_DIV_POW2): New internal function.
+ 	* optabs.def (sdiv_pow2_optab): New optab.
+ 	* tree-vect-patterns.c (vect_recog_divmod_pattern):
+ 	Modify pattern to support new operation.
+ 	* doc/md.texi (sdiv_pow2$var{m3}): Documentation for the above.
+ 	* doc/sourcebuild.texi (vect_sdiv_pow2_si):
+ 	Document new target selector.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_layout_frame): Use crtl->abi
+ 	to test whether we're compiling a vector PCS function and to test
+ 	whether the function needs to save a particular register.
+ 	Remove the vector PCS handling of df_set_regs_ever_live.
+ 	(aarch64_components_for_bb): Use crtl->abi to test whether
+ 	the function needs to save a particular register.
+ 	(aarch64_process_components): Use crtl->abi to test whether
+ 	we're compiling a vector PCS function.
+ 	(aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
+ 	(aarch64_epilogue_uses): Remove handling of vector PCS functions.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_use_simple_return_insn_p):
+ 	Delete.
+ 	* config/aarch64/aarch64.c (aarch64_components_for_bb): Check
+ 	whether the block calls a function that clobbers more registers
+ 	than the current function is allowed to.
+ 	(aarch64_use_simple_return_insn_p): Delete.
+ 	* config/aarch64/aarch64.md (simple_return): Remove condition.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* function-abi.h (function_abi_aggregator): New class.
+ 	* function-abi.cc (function_abi_aggregator::caller_save_regs): New
+ 	function.
+ 	* ira.c (update_equiv_regs_prescan): New function.  Call
+ 	set_paradoxical_subreg here rather than...
+ 	(update_equiv_regs): ...here.
+ 	(ira): Call update_equiv_regs_prescan.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (regs_invalidated_by_call): Only define if
+ 	IN_TARGET_CODE.
+ 	(call_used_or_fixed_regs): Likewise.
+ 	(call_used_or_fixed_reg_p): Likewise.
+ 	* reginfo.c (regs_invalidated_by_call): New macro.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* shrink-wrap.c: Include function-abi.h.
+ 	(requires_stack_frame_p): Use crtl->abi to test whether the
+ 	current function can use a register without saving it first.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* sel-sched-ir.h (_def::crosses_call): Replace with...
+ 	(_def::crossed_call_abis): ..this new field.
+ 	(def_list_add): Take a mask of ABIs instead of a crosses_call
+ 	boolean.
+ 	* sel-sched-ir.c (def_list_add): Likewise.  Update initialization
+ 	of _def accordingly.
+ 	* sel-sched.c: Include function-abi.h.
+ 	(hard_regs_data::regs_for_call_clobbered): Delete.
+ 	(reg_rename::crosses_call): Replace with...
+ 	(reg_rename::crossed_call_abis): ...this new field.
+ 	(fur_static_params::crosses_call): Replace with...
+ 	(fur_static_params::crossed_call_abis): ...this new field.
+ 	(init_regs_for_mode): Don't initialize sel_hrd.regs_for_call_clobbered.
+ 	(init_hard_regs_data): Use crtl->abi to test which registers the
+ 	current function would need to save before it uses them.
+ 	(mark_unavailable_hard_regs): Update handling of call-clobbered
+ 	registers, using call_clobbers_in_region to find out which registers
+ 	might be call-clobbered (but without taking -fipa-ra into account
+ 	for now).  Remove separate handling of partially call-clobbered
+ 	registers.
+ 	(verify_target_availability): Use crossed_call_abis instead of
+ 	crosses_call.
+ 	(get_spec_check_type_for_insn, find_used_regs): Likewise.
+ 	(fur_orig_expr_found, fur_on_enter, fur_orig_expr_not_found): Likewise.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* sched-deps.c (deps_analyze_insn): Use the ABI of the target
+ 	function to test whether a register is fully or partly clobbered.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* rtlanal.c: Include function-abi.h.
+ 	(reg_set_p): Use insn_callee_abi to get the ABI of the called
+ 	function and clobbers_reg_p to test whether the register
+ 	is call-clobbered.
+ 	(find_all_hard_reg_sets): When implicit is true, use insn_callee_abi
+ 	to get the ABI of the called function and full_reg_clobbers to
+ 	get the set of fully call-clobbered registers.  Warn about the
+ 	pitfalls of using this mode.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* reload.c: Include function-abi.h.
+ 	(find_equiv_reg): Use clobbers_reg_p to test whether either
+ 	of the equivalent registers is clobbered by a call.
+ 	* reload1.c: Include function-abi.h.
+ 	(reg_reloaded_call_part_clobbered): Delete.
+ 	(reload): Use crtl->abi to test which registers would need
+ 	saving in the prologue before use.
+ 	(find_reg): Likewise.
+ 	(emit_reload_insns): Remove code for reg_reloaded_call_part_clobbered.
+ 	(reload_as_needed): Likewise.  Use full_and_partial_reg_clobbers
+ 	instead of call_used_or_fixed_regs | reg_reloaded_call_part_clobbered.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* regrename.h (du_head::call_clobber_mask): New field.
+ 	(du_head::need_caller_save_reg): Replace with...
+ 	(du_head::call_abis): ...this new field.
+ 	* regrename.c: Include function-abi.h.
+ 	(call_clobbered_in_chain_p): New function.
+ 	(check_new_reg_p): Use crtl->abi when deciding whether a register
+ 	is free for use after RA.  Use call_clobbered_in_chain_p to test
+ 	whether a candidate register would be clobbered by a call.
+ 	(find_rename_reg): Don't add call-clobber conflicts here.
+ 	(rename_chains): Check call_abis instead of need_caller_save_reg.
+ 	(merge_chains): Update for changes to du_head.
+ 	(build_def_use): Use insn_callee_abi to get the ABI of the call insn
+ 	target.  Record the ABI identifier in call_abis and the set of
+ 	fully or partially clobbered registers in call_clobber_mask.
+ 	Add fully-clobbered registers to hard_conflicts here rather
+ 	than in find_rename_reg.
+ 	* config/aarch64/cortex-a57-fma-steering.c: Include function-abi.h.
+ 	(rename_single_chain): Check call_abis instead of need_caller_save_reg.
+ 	* config/aarch64/falkor-tag-collision-avoidance.c: Include
+ 	function-abi.h.
+ 	* config/c6x/c6x.c: Likewise.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* regcprop.c (copyprop_hardreg_forward_1): Use the recorded
+ 	mode of the register when deciding whether it is no longer
+ 	available after a call.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* recog.c: Include function-abi.h.
+ 	(peep2_find_free_register): Use crtl->abi when deciding whether
+ 	a register is free for use after RA.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* postreload-gcse.c: Include regs.h and function-abi.h.
+ 	(record_opr_changes): Use insn_callee_abi to get the ABI of the
+ 	call insn target.  Conservatively assume that partially-clobbered
+ 	registers are altered.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* postreload.c (reload_combine_recognize_pattern): Use crtl->abi
+ 	when deciding whether a register is free for use after RA.
+ 	(reload_combine): Remove unnecessary use of fixed_reg_set.
+ 	(reload_cse_move2add): Use insn_callee_abi to get the ABI of the
+ 	call insn target.  Use reg_mode when testing whether a register
+ 	is no longer available.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (return_call_with_max_clobbers): Delete.
+ 	* doc/tm.texi.in (TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): Delete.
+ 	* doc/tm.texi: Regenerate.
+ 	* config/aarch64/aarch64.c (aarch64_return_call_with_max_clobbers)
+ 	(TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): Delete.
+ 	* lra-int.h (lra_reg::actual_call_used_reg_set): Delete.
+ 	(lra_reg::call_insn): Delete.
+ 	* lra.c: Include function-abi.h.
+ 	(initialize_lra_reg_info_element): Don't initialize the fields above.
+ 	(lra): Use crtl->abi to test whether the current function needs to
+ 	save a register in the prologue.  Remove special pre-inheritance
+ 	lra_create_live_ranges pass for flag_ipa_ra.
+ 	* lra-assigns.c: Include function-abi.h
+ 	(find_hard_regno_for_1): Use crtl->abi to test whether the current
+ 	function needs to save a register in the prologue.
+ 	(lra_assign): Assert that registers aren't allocated to a
+ 	conflicting register, rather than checking only for overlaps
+ 	with call_used_or_fixed_regs.  Do this even for flag_ipa_ra,
+ 	and for registers that are not live across a call.
+ 	* lra-constraints.c (last_call_for_abi): New variable.
+ 	(full_and_partial_call_clobbers): Likewise.
+ 	(setup_next_usage_insn): Remove the register from
+ 	full_and_partial_call_clobbers.
+ 	(need_for_call_save_p): Use call_clobbered_in_region_p to test
+ 	whether the register needs a caller save.
+ 	(need_for_split_p): Use full_and_partial_reg_clobbers instead
+ 	of call_used_or_fixed_regs.
+ 	(inherit_in_ebb): Initialize and maintain last_call_for_abi and
+ 	full_and_partial_call_clobbers.
+ 	* lra-lives.c (check_pseudos_live_through_calls): Replace
+ 	last_call_used_reg_set and call_insn arguments with an abi argument.
+ 	Remove handling of lra_reg::call_insn.  Use function_abi::mode_clobbers
+ 	as the set of conflicting registers.
+ 	(calls_have_same_clobbers_p): Delete.
+ 	(process_bb_lives): Track the ABI of the last call instead of an
+ 	insn/HARD_REG_SET pair.  Update calls to
+ 	check_pseudos_live_through_calls.  Use eh_edge_abi to calculate
+ 	the set of registers that could be clobbered by an EH edge.
+ 	Include partially-clobbered as well as fully-clobbered registers.
+ 	(lra_create_live_ranges_1): Don't initialize lra_reg::call_insn.
+ 	* lra-remat.c: Include function-abi.h.
+ 	(call_used_regs_arr_len, call_used_regs_arr): Delete.
+ 	(set_bb_regs): Use insn_callee_abi to get the set of call-clobbered
+ 	registers and bitmap_view to combine them into dead_regs.
+ 	(call_used_input_regno_present_p): Take a function_abi argument
+ 	and use it to test whether a register is call-clobbered.
+ 	(calculate_gen_cands): Use insn_callee_abi to get the ABI of the
+ 	call insn target.  Update tje call to call_used_input_regno_present_p.
+ 	(do_remat): Likewise.
+ 	(lra_remat): Remove the initialization of call_used_regs_arr_len
+ 	and call_used_regs_arr.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* loop-iv.c: Include regs.h and function-abi.h.
+ 	(simplify_using_initial_values): Use insn_callee_abi to get the
+ 	ABI of the call insn target.  Conservatively assume that
+ 	partially-clobbered registers are altered.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* function-abi.h (call_clobbers_in_region): Declare.
+ 	(call_clobbered_in_region_p): New function.
+ 	* function-abi.cc (call_clobbers_in_region): Likewise.
+ 	* ira-int.h: Include function-abi.h.
+ 	(ira_allocno::crossed_calls_abis): New field.
+ 	(ALLOCNO_CROSSED_CALLS_ABIS): New macro.
+ 	(ira_need_caller_save_regs): New function.
+ 	(ira_need_caller_save_p): Likewise.
+ 	* ira.c (setup_reg_renumber): Use ira_need_caller_save_p instead
+ 	of call_used_or_fixed_regs.
+ 	(do_reload): Use crtl->abi to test whether the current function
+ 	needs to save a register in the prologue.  Count registers that
+ 	need to be saved rather than registers that don't.
+ 	* ira-build.c (create_cap_allocno): Copy ALLOCNO_CROSSED_CALLS_ABIS.
+ 	Remove unnecessary | from ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS.
+ 	(propagate_allocno_info): Merge ALLOCNO_CROSSED_CALLS_ABIS too.
+ 	(propagate_some_info_from_allocno): Likewise.
+ 	(copy_info_to_removed_store_destinations): Likewise.
+ 	(ira_flattening): Say that ALLOCNO_CROSSED_CALLS_ABIS and
+ 	ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS are handled conservatively.
+ 	(ira_build): Use ira_need_caller_save_regs instead of
+ 	call_used_or_fixed_regs.
+ 	* ira-color.c (calculate_saved_nregs): Use crtl->abi to test
+ 	whether the current function would need to save a register
+ 	before using it.
+ 	(calculate_spill_cost): Likewise.
+ 	(allocno_reload_assign): Use ira_need_caller_save_regs and
+ 	ira_need_caller_save_p instead of call_used_or_fixed_regs.
+ 	* ira-conflicts.c (ira_build_conflicts): Use
+ 	ira_need_caller_save_regs rather than call_used_or_fixed_regs
+ 	as the set of call-clobbered registers.  Remove the
+ 	call_used_or_fixed_regs mask from the calculation of
+ 	temp_hard_reg_set and mask its use instead.  Remove special
+ 	handling of partially-clobbered registers.
+ 	* ira-costs.c (ira_tune_allocno_costs): Use ira_need_caller_save_p.
+ 	* ira-lives.c (process_bb_node_lives): Use mode_clobbers to
+ 	calculate the set of conflicting registers for calls that
+ 	can throw.  Record the ABIs of calls in ALLOCNO_CROSSED_CALLS_ABIS.
+ 	Use full_and_partial_reg_clobbers rather than full_reg_clobbers
+ 	for the calculation of ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS.
+ 	Use eh_edge_abi to calculate the set of registers that could
+ 	be clobbered by an EH edge.  Include partially-clobbered as
+ 	well as fully-clobbered registers.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* haifa-sched.c: Include function-abi.h.
+ 	(alloc_global_sched_pressure_data): Use crtl->abi to check whether
+ 	the function would need to save a register before using it.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* gcse.c: Include function-abi.h.
+ 	(compute_hash_table_work): Use insn_callee_abi to get the ABI of
+ 	the call insn target.  Invalidate partially call-clobbered
+ 	registers as well as fully call-clobbered ones.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* function.c (aggregate_value_p): Work out which ABI the
+ 	function is using before testing which registers are at least
+ 	partly preserved by a call.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* early-remat.c: Include regs.h and function-abi.h.
+ 	(early_remat::maybe_add_candidate): Don't check for call-clobbered
+ 	registers here.
+ 	(early_remat::restrict_remat_for_unavail_regs): New function.
+ 	(early_remat::restrict_remat_for_call): Likewise.
+ 	(early_remat::process_block): Before calling emit_remat_insns
+ 	for a previous call in the block, invalidate any candidates
+ 	that would clobber call-preserved registers.
+ 	(early_remat::emit_remat_insns_for_block): Likewise for the
+ 	final call in a block.  Do the same thing for live-in registers
+ 	when calling emit_remat_insns at the head of a block.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* df-scan.c (df_get_entry_block_def_set): Use crtl->abi to test
+ 	whether the current function needs to save at least part of a
+ 	register before using it.
+ 	(df_get_exit_block_use_set): Likewise for epilogue restores.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* df-problems.c: Include regs.h and function-abi.h.
+ 	(df_rd_problem_data): Rename sparse_invalidated_by_call to
+ 	sparse_invalidated_by_eh and dense_invalidated_by_call to
+ 	dense_invalidated_by_eh.
+ 	(df_print_bb_index): Update accordingly.
+ 	(df_rd_alloc, df_rd_start_dump, df_rd_confluence_n): Likewise.
+ 	(df_lr_confluence_n): Use eh_edge_abi to get the set of registers
+ 	that are clobbered by an EH edge.  Clobber partially-clobbered
+ 	registers as well as fully-clobbered ones.
+ 	(df_md_confluence_n): Likewise.
+ 	(df_rd_local_compute): Likewise.  Update for changes to
+ 	df_rd_problem_data.
+ 	* df-scan.c (df_scan_start_dump): Use eh_edge_abi to get the set
+ 	of registers that are clobbered by an EH edge.  Includde partially-
+ 	clobbered registers as well as fully-clobbered ones.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* cselib.c (cselib_process_insn): If we know what mode a
+ 	register was set in, check whether it is clobbered in that
+ 	mode by a call.  Only fall back to reg_raw_mode if that fails.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* cse.c: Include regs.h and function-abi.h.
+ 	(invalidate_for_call): Take the call insn as an argument.
+ 	Use insn_callee_abi to get the ABI of the call and invalidate
+ 	partially clobbered registers as well as fully clobbered ones.
+ 	(cse_insn): Update call accordingly.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* combine.c: Include function-abi.h.
+ 	(record_dead_and_set_regs): Use insn_callee_abi to get the ABI
+ 	of the target of call insns.  Invalidate partially-clobbered
+ 	registers as well as fully-clobbered ones.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* cfgloopanal.c: Include regs.h and function-abi.h.
+ 	(init_set_costs): Use default_function_abi to test whether
+ 	a general register is call-clobbered.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* cfgcleanup.c (old_insns_match_p): Compare the ABIs of calls
+ 	instead of the call-clobbered sets.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* caller-save.c (setup_save_areas): Remove redundant |s of
+ 	fixed_reg_set.
+ 	(save_call_clobbered_regs): Likewise.  Use the call ABI rather
+ 	than call_used_or_fixed_regs to decide whether a REG_RETURNED
+ 	value is useful.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* rtl.h (predefined_function_abi): Declare.
+ 	(choose_hard_reg_mode): Take a pointer to a predefined_function_abi
+ 	instead of a boolean call_save flag.
+ 	* config/gcn/gcn.c (gcn_hard_regno_caller_save_mode): Update call
+ 	accordingly.
+ 	* config/i386/i386.h (HARD_REGNO_CALLER_SAVE_MODE): Likewise.
+ 	* config/ia64/ia64.h (HARD_REGNO_CALLER_SAVE_MODE): Likewise.
+ 	* config/mips/mips.c (mips_hard_regno_caller_save_mode): Likewise.
+ 	* config/msp430/msp430.h (HARD_REGNO_CALLER_SAVE_MODE): Likewise.
+ 	* config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Likewise.
+ 	* config/sh/sh.c (sh_hard_regno_caller_save_mode): Likewise.
+ 	* reginfo.c (init_reg_modes_target): Likewise.
+ 	(choose_hard_reg_mode): Take a pointer to a predefined_function_abi
+ 	instead of a boolean call_save flag.
+ 	* targhooks.c: Include function-abi.h.
+ 	(default_dwarf_frame_reg_mode): Update call to choose_hard_reg_mode,
+ 	using eh_edge_abi to choose the mode.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (hard_regno_call_part_clobbered): Take an ABI
+ 	identifier instead of an rtx_insn.
+ 	* doc/tm.texi: Regenerate.
+ 	* hooks.h (hook_bool_insn_uint_mode_false): Delete.
+ 	(hook_bool_uint_uint_mode_false): New function.
+ 	* hooks.c (hook_bool_insn_uint_mode_false): Delete.
+ 	(hook_bool_uint_uint_mode_false): New function.
+ 	* config/aarch64/aarch64.c (aarch64_hard_regno_call_part_clobbered):
+ 	Take an ABI identifier instead of an rtx_insn.
+ 	* config/avr/avr.c (avr_hard_regno_call_part_clobbered): Likewise.
+ 	* config/i386/i386.c (ix86_hard_regno_call_part_clobbered): Likewise.
+ 	* config/mips/mips.c (mips_hard_regno_call_part_clobbered): Likewise.
+ 	* config/pru/pru.c (pru_hard_regno_call_part_clobbered): Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_hard_regno_call_part_clobbered):
+ 	Likewise.
+ 	* config/s390/s390.c (s390_hard_regno_call_part_clobbered): Likewise.
+ 	* cselib.c: Include function-abi.h.
+ 	(cselib_process_insn): Update call to
+ 	targetm.hard_regno_call_part_clobbered, using insn_callee_abi
+ 	to get the appropriate ABI identifier.
+ 	* function-abi.cc (predefined_function_abi::initialize): Update call
+ 	to targetm.hard_regno_call_part_clobbered.
+ 	* ira-conflicts.c (ira_build_conflicts): Likewise.
+ 	* ira-costs.c (ira_tune_allocno_costs): Likewise.
+ 	* lra-constraints.c: Include function-abi.h.
+ 	(need_for_call_save_p): Update call to
+ 	targetm.hard_regno_call_part_clobbered, using insn_callee_abi
+ 	to get the appropriate ABI identifier.
+ 	* lra-lives.c (check_pseudos_live_through_calls): Likewise.
+ 	* regcprop.c (copyprop_hardreg_forward_1): Update call
+ 	to targetm.hard_regno_call_part_clobbered.
+ 	* reginfo.c (choose_hard_reg_mode): Likewise.
+ 	* regrename.c (check_new_reg_p): Likewise.
+ 	* reload.c (find_equiv_reg): Likewise.
+ 	* reload1.c (emit_reload_insns): Likewise.
+ 	* sched-deps.c: Include function-abi.h.
+ 	(deps_analyze_insn): Update call to
+ 	targetm.hard_regno_call_part_clobbered, using insn_callee_abi
+ 	to get the appropriate ABI identifier.
+ 	* sel-sched.c (init_regs_for_mode, mark_unavailable_hard_regs): Update
+ 	call to targetm.hard_regno_call_part_clobbered.
+ 	* targhooks.c (default_dwarf_frame_reg_mode): Likewise.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/i386/i386.c: Include function-abi.h.
+ 	(ix86_avx_u128_mode_needed): Treat function calls as AVX_U128_ANY
+ 	if they preserve some 256-bit or 512-bit SSE registers.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (insn_callee_abi): New hook.
+ 	(remove_extra_call_preserved_regs): Delete.
+ 	* doc/tm.texi.in (TARGET_INSN_CALLEE_ABI): New macro.
+ 	(TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): Delete.
+ 	* doc/tm.texi: Regenerate.
+ 	* targhooks.h (default_remove_extra_call_preserved_regs): Delete.
+ 	* targhooks.c (default_remove_extra_call_preserved_regs): Delete.
+ 	* config/aarch64/aarch64.c (aarch64_simd_call_p): Constify the
+ 	insn argument.
+ 	(aarch64_remove_extra_call_preserved_regs): Delete.
+ 	(aarch64_insn_callee_abi): New function.
+ 	(TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): Delete.
+ 	(TARGET_INSN_CALLEE_ABI): New macro.
+ 	* rtl.h (get_call_fndecl): Declare.
+ 	(cgraph_rtl_info): Fix formatting.  Tweak comment for
+ 	function_used_regs.  Remove function_used_regs_valid.
+ 	* rtlanal.c (get_call_fndecl): Moved from final.c
+ 	* function-abi.h (insn_callee_abi): Declare.
+ 	(target_function_abi_info): Mention insn_callee_abi.
+ 	* function-abi.cc (fndecl_abi): Handle flag_ipa_ra in a similar
+ 	way to get_call_reg_set_usage did.
+ 	(insn_callee_abi): New function.
+ 	* regs.h (get_call_reg_set_usage): Delete.
+ 	* final.c: Include function-abi.h.
+ 	(collect_fn_hard_reg_usage): Add fixed and stack registers to
+ 	function_used_regs before the main loop rather than afterwards.
+ 	Use insn_callee_abi instead of get_call_reg_set_usage.  Exit early
+ 	if function_used_regs ends up not being useful.
+ 	(get_call_fndecl): Move to rtlanal.c
+ 	(get_call_cgraph_rtl_info, get_call_reg_set_usage): Delete.
+ 	* caller-save.c: Include function-abi.h.
+ 	(setup_save_areas, save_call_clobbered_regs): Use insn_callee_abi
+ 	instead of get_call_reg_set_usage.
+ 	* cfgcleanup.c: Include function-abi.h.
+ 	(old_insns_match_p): Use insn_callee_abi instead of
+ 	get_call_reg_set_usage.
+ 	* cgraph.h (cgraph_node::rtl_info): Take a const_tree instead of
+ 	a tree.
+ 	* cgraph.c (cgraph_node::rtl_info): Likewise.  Initialize
+ 	function_used_regs.
+ 	* df-scan.c: Include function-abi.h.
+ 	(df_get_call_refs): Use insn_callee_abi instead of
+ 	get_call_reg_set_usage.
+ 	* ira-lives.c: Include function-abi.h.
+ 	(process_bb_node_lives): Use insn_callee_abi instead of
+ 	get_call_reg_set_usage.
+ 	* lra-lives.c: Include function-abi.h.
+ 	(process_bb_lives): Use insn_callee_abi instead of
+ 	get_call_reg_set_usage.
+ 	* postreload.c: Include function-abi.h.
+ 	(reload_combine): Use insn_callee_abi instead of
+ 	get_call_reg_set_usage.
+ 	* regcprop.c: Include function-abi.h.
+ 	(copyprop_hardreg_forward_1): Use insn_callee_abi instead of
+ 	get_call_reg_set_usage.
+ 	* resource.c: Include function-abi.h.
+ 	(mark_set_resources, mark_target_live_regs): Use insn_callee_abi
+ 	instead of get_call_reg_set_usage.
+ 	* var-tracking.c: Include function-abi.h.
+ 	(dataflow_set_clear_at_call): Use insn_callee_abi instead of
+ 	get_call_reg_set_usage.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (fntype_abi): New target hook.
+ 	* doc/tm.texi.in (TARGET_FNTYPE_ABI): Likewise.
+ 	* doc/tm.texi: Regenerate.
+ 	* target.h (predefined_function_abi): Declare.
+ 	* function-abi.cc (fntype_abi): Call targetm.calls.fntype_abi,
+ 	if defined.
+ 	* config/aarch64/aarch64.h (ARM_PCS_SIMD): New arm_pcs value.
+ 	* config/aarch64/aarch64.c: Include function-abi.h.
+ 	(aarch64_simd_abi, aarch64_fntype_abi): New functions.
+ 	(TARGET_FNTYPE_ABI): Define.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* Makefile.in (OBJS): Add function-abi.o.
+ 	(GTFILES): Add function-abi.h.
+ 	* function-abi.cc: New file.
+ 	* function-abi.h: Likewise.
+ 	* emit-rtl.h (rtl_data::abi): New field.
+ 	* function.c: Include function-abi.h.
+ 	(prepare_function_start): Initialize crtl->abi.
+ 	* read-rtl-function.c: Include regs.h and function-abi.h.
+ 	(read_rtl_function_body): Initialize crtl->abi.
+ 	(read_rtl_function_body_from_file_range): Likewise.
+ 	* reginfo.c: Include function-abi.h.
+ 	(init_reg_sets_1): Initialize default_function_abi.
+ 	(globalize_reg): Call add_full_reg_clobber for each predefined ABI
+ 	when making a register global.
+ 	* target-globals.h (this_target_function_abi_info): Declare.
+ 	(target_globals::function_abi_info): New field.
+ 	(restore_target_globals): Copy it.
+ 	* target-globals.c: Include function-abi.h.
+ 	(default_target_globals): Initialize the function_abi_info field.
+ 	(target_globals): Allocate it.
+ 	(save_target_globals): Free it.
+ 
+ 2019-09-30  Nick Clifton  <nickc@redhat.com>
+ 
+ 	PR target/85978
+ 	* config/frv/frv.c (frv_register_move_cost): Add break statements
+ 	to avoid falling through to the wrong cases.  Tidy code.
+ 
+ 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_hard_regno_call_part_clobbered):
+ 	For multi-registers modes, test how big each register part is.
+ 
+ 2019-09-30  Nick Clifton  <nickc@redhat.com>
+ 
+ 	PR target/59205
+ 	* config/iq2000/iq2000.c (iq2000_select_section): Delete.
+ 	(TARGET_ASM_SELECT_SECTION): Remove definition.
+ 	(TARGET_HAVE_SWITCHABLE_BSS_SECTIONS): Allow definition.
+ 
+ 2019-09-30  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	* emit-rtl.c (init_raw_REG): New function.
+ 	(gen_raw_REG): Use init_raw_REG.
+ 	* gengenrtl.c (gendef): Emit init_* functions and alloca_*
+ 	macros.
+ 	* rtl.c (rtx_alloc_stat_v): Use rtx_init.
+ 	* rtl.h (rtx_init): New function.
+ 	(rtx_alloca): New function.
+ 	(init_raw_REG): New function.
+ 	(alloca_raw_REG): New macro.
+ 
+ 2019-09-30  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/predicates.md (pcrel_address): Delete predicate.
+ 	(pcrel_local_address): Replace pcrel_address predicate, use the
+ 	new function address_to_insn_form.
+ 	(pcrel_external_address): Replace with new implementation using
+ 	address_to_insn_form..
+ 	(prefixed_mem_operand): Delete predicate which is now unused.
+ 	(pcrel_external_mem_operand): Delete predicate which is now
+ 	unused.
+ 	* config/rs6000/rs6000-protos.h (enum insn_form): New
+ 	enumeration.
+ 	(enum non_prefixed_form): New enumeration.
+ 	(address_to_insn_form): New declaration.
+ 	(prefixed_load_p): New declaration.
+ 	(prefixed_store_p): New declaration.
+ 	(prefixed_paddi_p): New declaration.
+ 	(rs6000_asm_output_opcode): New declaration.
+ 	(rs6000_final_prescan_insn): Move declaration and update calling
+ 	signature.
+ 	(address_is_prefixed): New helper inline function.
+ 	* config/rs6000/rs6000.c(print_operand_address): Check for either
+ 	PC-relative local symbols or PC-relative external symbols.
+ 	(rs6000_emit_move): Support loading PC-relative addresses.
+ 	(mode_supports_prefixed_address_p): Delete, no longer used.
+ 	(rs6000_prefixed_address_mode_p): Delete, no longer used.
+ 	(address_to_insn_form): New function to decode an address format.
+ 	(reg_to_non_prefixed): New function to identify what the
+ 	non-prefixed memory instruction format is for a register.
+ 	(prefixed_load_p): New function to identify prefixed loads.
+ 	(prefixed_store_p): New function to identify prefixed stores.
+ 	(prefixed_paddi_p): New function to identify prefixed load
+ 	immediates.
+ 	(next_insn_prefixed_p): New static state variable.
+ 	(rs6000_final_prescan_insn): New function to determine if an insn
+ 	uses a prefixed instruction.
+ 	(rs6000_asm_output_opcode): New function to emit 'p' in front of a
+ 	prefixed instruction.
+ 	* config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): New target hook.
+ 	(ASM_OUTPUT_OPCODE): New target hook.
+ 	* config/rs6000/rs6000.md (prefixed): New insn attribute for
+ 	prefixed instructions.
+ 	(prefixed_length): New insn attribute for the size of prefixed
+ 	instructions.
+ 	(non_prefixed_length): New insn attribute for the size of
+ 	non-prefixed instructions.
+ 	(pcrel_local_addr): New insn to load up a local PC-relative
+ 	address.
+ 	(pcrel_extern_addr): New insn to load up an external PC-relative
+ 	address.
+ 	(mov<mode>_64bit_dm): Split the alternatives for loading 0.0 to a
+ 	GPR and loading a 128-bit floating point type to a GPR.
+ 
+ 2019-09-30  Richard Biener  <rguenther@suse.de>
+ 
+ 	* gimple.c (gimple_get_lhs): For PHIs return the result.
+ 	* tree-vectorizer.h (vectorizable_live_operation): Also get the
+ 	SLP instance as argument.
+ 	* tree-vect-loop.c (vect_analyze_loop_operations): Also handle
+ 	double-reduction PHIs with vectorizable_lc_phi.
+ 	(vect_analyze_loop_operations): Adjust.
+ 	(vect_create_epilog_for_reduction): Remove all code not dealing
+ 	with reduction LC PHI or epilogue generation.
+ 	(vectorizable_live_operation): Call vect_create_epilog_for_reduction
+ 	for live stmts of reductions.
+ 	* tree-vect-stmts.c (vectorizable_condition): When !for_reduction
+ 	do not handle defs that are not vect_internal_def.
+ 	(can_vectorize_live_stmts): Adjust.
+ 	(vect_analyze_stmt): When the vectorized stmt defined a value
+ 	used on backedges adjust the backedge uses of vectorized PHIs.
+ 
+ 2019-09-30  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/91853
+ 	* tree-inline.c (force_value_to_type): New function.
+ 	(setup_one_parameter): Use force_value_to_type to convert type.
+ 	* tree-inline.c (force_value_to_type): Declare.
+ 	* ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Deal
+ 	with register type mismatches.
+ 
+ 2019-09-30  Andreas Tobler  <andreast@gcc.gnu.org>
+ 
+ 	* config.gcc: Use the secure-plt on FreeBSD 13 and upwards for
+ 	32-bit PowerPC.
+ 	Define TARGET_FREEBSD32_SECURE_PLT for 64-bit PowerPC.
+ 	* config/rs6000/t-freebsd64: Make use of the above define and build
+ 	the 32-bit libraries with secure-plt.
+ 
+ 2019-09-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/91931
+ 	* config/i386/i386-expand.c (ix86_expand_adjust_ufix_to_sfix_si): Use
+ 	gen_int_mode instead of GEN_INT.
+ 
+ 2019-09-29  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (gen_macho_low): Amend to include the mode
+ 	argument.
+ 	(machopic_indirect_data_reference): Amend gen_macho_low call
+ 	to include mode argument
+ 	* config/rs6000/rs6000.c (emit_move): Likewise. Amend a comment.
+ 	* config/rs6000/darwin.md (@macho_low_<mode>): New, replaces
+ 	the macho_high expander and two define_insn entries.
+ 
+ 2019-09-29  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR bootstrap/90543
+ 	* optc-save-gen.awk: Fix up printing string option differences.
+ 
+ 2019-09-29  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_builtin_vectorization_cost): Lower
+ 	vec_perm cost to 1 for non-Power7 VSX architectures.
+ 
+ 2019-09-29  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	* config/rs6000/vsx.md (vec_pack[su]_float_v2di): New define_expand.
+ 	(vec_unpack_[su]fix_trunc_hi_v4sf): Likewise.
+ 	(vec_unpack_[su]fix_trunc_lo_v4sf): Likewise.
+ 
+ 2019-09-28  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (gen_macho_high): Amend to include the mode
+ 	argument.
+ 	(machopic_indirect_data_reference): Amend gen_macho_high call
+ 	to include mode argument.
+ 	(machopic_legitimize_pic_address): Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_legitimize_address):
+ 	* config/rs6000/darwin.md (@macho_high_<mode>): New, replaces
+ 	the macho_high expander and two define_insn entries.
+ 
+ 2019-09-28  Oleg Endo  <olegendo@gcc.gnu.org>
+ 
+ 	PR target/86805
+ 	* config/sh/sh.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define.
+ 
+ 2019-09-28  Oleg Endo  <olegendo@gcc.gnu.org>
+ 
+ 	PR target/80672
+ 	* config/sh/sh.c (parse_validate_atomic_model_option): Use
+ 	std::string::compare instead of std::string::find.
+ 
+ 2019-09-27  Maciej W. Rozycki  <macro@wdc.com>
+ 
+ 	* configure: Regenerate.
+ 
+ 2019-09-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/91920
+ 	* gimplify.c (omp_default_clause): Predetermine DECL_IN_CONSTANT_POOL
+ 	variables as shared.
+ 
+ 2019-09-27  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/darwin.md (@macho_correct_pic_<mode>): New,
+ 	replaces the expander and two define_insn entries.
+ 	(@reload_macho_picbase_<mode>): Update gen_macho_correct_pic
+ 	call.
+ 	* config/rs6000/rs6000.md (builtin_setjmp_receiver): Likewise.
+ 
+ 2019-09-27  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* fibonacci_heap.h (fibonacci_heap::empty): Make const.
+ 	(fibonacci_heap::nodes): Likewise.
+ 	(fibonacci_heap::min_key): Likewise.
+ 	(fibonacci_heap::min): Likewise.
+ 
+ 2019-09-27  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* cgraph.c (cgraph_node::get_fun): Make const.
+ 	* cgraph.h (cgraph_node::get_fun): Likewise.
+ 
+ 2019-09-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/91919
+ 	* config/arm/arm.md (<US>mlal): Remove SE wrappers around operands
+ 	of SImode MULT.
+ 
+ 2019-09-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vectorizer.h (_stmt_vec_info::reduc_fn): New.
+ 	(STMT_VINFO_REDUC_FN): Likewise.
+ 	* tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
+ 	STMT_VINFO_REDUC_FN.
+ 	* tree-vect-loop.c (vect_is_simple_reduction): Fix STMT_VINFO_REDUC_IDX
+ 	for condition reductions.
+ 	(vect_create_epilog_for_reduction): Compute all required state
+ 	from the stmt to be vectorized.
+ 	(vectorizable_reduction): Simplify vect_create_epilog_for_reduction
+ 	invocation and remove then dead code.  For single def-use chains
+ 	record only a single vector stmt.
+ 
+ 2019-09-27  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_builtin_class): New enum.
+ 	(AARCH64_BUILTIN_SHIFT, AARCH64_BUILTIN_CLASS): New constants.
+ 	(aarch64_gimple_fold_builtin, aarch64_mangle_builtin_type)
+ 	(aarch64_fold_builtin, aarch64_init_builtins, aarch64_expand_builtin):
+ 	(aarch64_builtin_decl, aarch64_builtin_rsqrt): Delete.
+ 	(aarch64_general_mangle_builtin_type, aarch64_general_init_builtins):
+ 	(aarch64_general_fold_builtin, aarch64_general_gimple_fold_builtin):
+ 	(aarch64_general_expand_builtin, aarch64_general_builtin_decl):
+ 	(aarch64_general_builtin_rsqrt): Declare.
+ 	* config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin):
+ 	New function.
+ 	(aarch64_mangle_builtin_type): Rename to...
+ 	(aarch64_general_mangle_builtin_type): ...this.
+ 	(aarch64_init_fcmla_laneq_builtins, aarch64_init_simd_builtins)
+ 	(aarch64_init_crc32_builtins, aarch64_init_builtin_rsqrt)
+ 	(aarch64_init_pauth_hint_builtins, aarch64_init_tme_builtins): Use
+ 	aarch64_general_add_builtin instead of add_builtin_function.
+ 	(aarch64_init_builtins): Rename to...
+ 	(aarch64_general_init_builtins): ...this.  Use
+ 	aarch64_general_add_builtin instead of add_builtin_function.
+ 	(aarch64_builtin_decl): Rename to...
+ 	(aarch64_general_builtin_decl): ...this and remove the unused
+ 	arguments.
+ 	(aarch64_expand_builtin): Rename to...
+ 	(aarch64_general_expand_builtin): ...this and remove the unused
+ 	arguments.
+ 	(aarch64_builtin_rsqrt): Rename to...
+ 	(aarch64_general_builtin_rsqrt): ...this.
+ 	(aarch64_fold_builtin): Rename to...
+ 	(aarch64_general_fold_builtin): ...this.  Take the function subcode
+ 	and return type as arguments.  Remove the "ignored" argument.
+ 	(aarch64_gimple_fold_builtin): Rename to...
+ 	(aarch64_general_gimple_fold_builtin): ...this.  Take the function
+ 	subcode and gcall as arguments, and return the new function call.
+ 	* config/aarch64/aarch64.c (aarch64_init_builtins)
+ 	(aarch64_fold_builtin, aarch64_gimple_fold_builtin)
+ 	(aarch64_expand_builtin, aarch64_builtin_decl): New functions.
+ 	(aarch64_builtin_reciprocal): Call aarch64_general_builtin_rsqrt
+ 	instead of aarch64_builtin_rsqrt.
+ 	(aarch64_mangle_type): Call aarch64_general_mangle_builtin_type
+ 	instead of aarch64_mangle_builtin_type.
+ 
+ 2019-09-27  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (check_builtin_call): New target hook.
+ 	* doc/tm.texi.in (TARGET_CHECK_BUILTIN_CALL): New @hook.
+ 	* doc/tm.texi: Regenerate.
+ 
+ 2019-09-27  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/91909
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): Take a
+ 	reduc_index parameter.  When handling COND_REDUCTION, make sure
+ 	that the reduction phi operand is in the correct arm of the
+ 	VEC_COND_EXPR.
+ 	(vectorizable_reduction): Pass reduc_index to the above.
+ 
+ 2019-09-27  Yuliang Wang  <yuliang.wang@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve2.md (aarch64_sve2_sra<mode>):
+ 	New combine pattern.
+ 
+ 2019-09-26  Max Filippov  <jcmvbkbc@gmail.com>
+ 
+ 	* config/xtensa/xtensa.c (hwloop_optimize): Insert zero overhead
+ 	loop instruction into new basic block before the loop when basic
+ 	block that precedes the loop is empty.
+ 
+ 2019-09-26  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* function.c (gimplify_parameters): Use build_clobber function.
+ 	* tree-ssa.c (execute_update_addresses_taken): Likewise.
+ 	* tree-inline.c (expand_call_inline): Likewise.
+ 	* tree-sra.c (clobber_subtree): Likewise.
+ 	* tree-ssa-ccp.c (insert_clobber_before_stack_restore): Likewise.
+ 	* omp-low.c (lower_rec_simd_input_clauses, lower_rec_input_clauses,
+ 	lower_omp_single, lower_depend_clauses, lower_omp_taskreg,
+ 	lower_omp_target): Likewise.
+ 	* omp-expand.c (expand_omp_for_generic): Likewise.
+ 	* omp-offload.c (ompdevlow_adjust_simt_enter): Likewise.
+ 
+ 2019-09-26  Will Schmidt <will_schmidt@vnet.ibm.com>
+ 
+ 	* config/rs6000/rs6000-builtin.def: (LVSL, LVSR, LVEBX, LVEHX,
+ 	LVEWX, LVXL, LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI,
+ 	LVXL_V16QI, LVX, LVX_V1TI, LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI,
+ 	LVX_V8HI, LVX_V16QI, LVLX, LVLXL, LVRX, LVRXL, LXSDX, LXVD2X_V1TI,
+ 	LXVD2X_V2DF, LXVD2X_V2DI, LXVDSX, LXVW4X_V4SF, LXVW4X_V4SI,
+ 	LXVW4X_V8HI, LXVW4X_V16QI, LD_ELEMREV_V1TI, LD_ELEMREV_V2DF,
+ 	LD_ELEMREV_V2DI, LD_ELEMREV_V4SF, LD_ELEMREV_V4SI, LD_ELEMREV_V8HI,
+ 	LD_ELEMREV_V16QI): Use the PURE attribute.
+ 
+ 2019-09-26  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/darwin.md: Replace the expanders for
+ 	load_macho_picbase and reload_macho_picbase with use of '@'
+ 	and <mode> in their respective define_insns.
+ 	(nonlocal_goto_receiver): Pass Pmode to gen_reload_macho_picbase.
+ 	* config/rs6000/rs6000-logue.c (rs6000_emit_prologue): Pass
+ 	Pmode to gen_load_macho_picbase.
+ 	* config/rs6000/rs6000.md: Likewise.
+ 
+ 2019-09-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91896
+ 	* tree-vect-loop.c (vectorizable_reduction): The single
+ 	def-use cycle optimization cannot apply when there's more
+ 	than one pattern stmt involved.
+ 
+ 2019-09-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (vect_analyze_loop_operations): Analyze
+ 	loop-closed PHIs that are vect_internal_def.
+ 	(vect_create_epilog_for_reduction): Exit early for nested cycles.
+ 	Simplify.
+ 	(vectorizable_lc_phi): New.
+ 	* tree-vect-stmts.c (vect_analyze_stmt): Call vectorize_lc_phi.
+ 	(vect_transform_stmt): Likewise.
+ 	* tree-vectorizer.h (stmt_vec_info_type): Add lc_phi_info_type.
+ 	(vectorizable_lc_phi): Declare.
+ 
+ 2019-09-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (vect_analyze_loop_operations): Also call
+ 	vectorizable_reduction for vect_double_reduction_def.
+ 	(vect_transform_loop): Likewise.
+ 	(vect_create_epilog_for_reduction): Move double-reduction
+ 	PHI creation and preheader argument setting of PHIs ...
+ 	(vectorizable_reduction): ... here.  Also process
+ 	vect_double_reduction_def PHIs, creating the vectorized
+ 	PHI nodes, remembering the scalar adjustment computed for
+ 	the epilogue in STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT.
+ 	Remember the original reduction code in STMT_VINFO_REDUC_CODE.
+ 	* tree-vectorizer.c (vec_info::new_stmt_vec_info):
+ 	Initialize STMT_VINFO_REDUC_CODE.
+ 	* tree-vectorizer.h (_stmt_vec_info::reduc_epilogue_adjustment): New.
+ 	(_stmt_vec_info::reduc_code): Likewise.
+ 	(STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT): Likewise.
+ 	(STMT_VINFO_REDUC_CODE): Likewise.
+ 
+ 2019-09-26  Matt Turner  <mattst88@gmail.com>
+ 
+ 	PR driver/69471
+ 	* config/aarch64/aarch64.opt (march=): Add Negative(march=).
+ 	(mtune=): Add Negative(mtune=).
+ 	(mcpu=): Add Negative(mcpu=).
+ 	* config/arm/arm.opt: Likewise.
+ 
+ 2019-09-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/arm.md (arm_<simd32_op>): New define_insn.
+ 	* config/arm/arm_acle.h (__smlald, __smlaldx, __smlsld, __smlsldx):
+ 	Define.
+ 	* config/arm/arm_acle.h: Define builtins for the above.
+ 	* config/arm/iterators.md (SIMD32_DIMODE): New int_iterator.
+ 	(simd32_op): Handle the above.
+ 	* config/arm/unspecs.md: Define unspecs for the above.
+ 
+ 2019-09-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/arm.md (arm_<simd32_op>): New define_insn.
+ 	(arm_<sup>xtb16): Likewise.
+ 	(arm_usada8): Likewise.
+ 	* config/arm/arm_acle.h (__qadd8, __qsub8, __shadd8, __shsub8,
+ 	__uhadd8, __uhsub8, __uqadd8, __uqsub8, __qadd16, __qasx, __qsax,
+ 	__qsub16, __shadd16, __shasx, __shsax, __shsub16, __uhadd16, __uhasx,
+ 	__uhsax, __uhsub16, __uqadd16, __uqasx, __uqsax, __uqsub16, __sxtab16,
+ 	__sxtb16, __uxtab16, __uxtb16): Define.
+ 	* config/arm/arm_acle_builtins.def: Define builtins for the above.
+ 	* config/arm/unspecs.md: Define unspecs for the above.
+ 	* config/arm/iterators.md (SIMD32_NOGE_BINOP): New int_iterator.
+ 	(USXTB16): Likewise.
+ 	(simd32_op): New int_attribute.
+ 	(sup): Handle UNSPEC_SXTB16, UNSPEC_UXTB16.
+ 	* doc/sourcebuild.exp (arm_simd32_ok): Document.
+ 
+ 2019-09-26  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* ipa-sra.c (verify_splitting_accesses): Fix quoting in a call to
+ 	internal_error.
+ 
+ 2019-09-26  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* ipa-sra.c (process_scan_results): Fix continue condition.
+ 
+ 2019-09-26  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/91885
+ 	* tree-vectorizer.c (try_vectorize_loop_1): Add
+ 	TODO_update_ssa_only_virtuals similarly to what slp pass does.
+ 
+ 2019-09-26  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_rtx_costs): Use
+ 	aarch64_plus_immediate rather than aarch64_uimm12_shift
+ 	to test for valid PLUS immediates.
+ 
+ 2019-09-25  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* tree-sra.c (no_accesses_p): Remove.
+ 	(no_accesses_representant): Likewise.
+ 
+ 2019-09-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/aarch64/arm_neon.h (vaba_s8): Use __ in identifiers
+ 	consistenly.
+ 	(vaba_s16): Likewise.
+ 	(vaba_s32): Likewise.
+ 	(vaba_u8): Likewise.
+ 	(vaba_u16): Likewise.
+ 	(vaba_u32): Likewise.
+ 	(vabal_high_s8): Likewise.
+ 	(vabal_high_s16): Likewise.
+ 	(vabal_high_s32): Likewise.
+ 	(vabal_high_u8): Likewise.
+ 	(vabal_high_u16): Likewise.
+ 	(vabal_high_u32): Likewise.
+ 	(vabal_s8): Likewise.
+ 	(vabal_s16): Likewise.
+ 	(vabal_s32): Likewise.
+ 	(vabal_u8): Likewise.
+ 	(vabal_u16): Likewise.
+ 	(vabal_u32): Likewise.
+ 	(vabaq_s8): Likewise.
+ 	(vabaq_s16): Likewise.
+ 	(vabaq_s32): Likewise.
+ 	(vabaq_u8): Likewise.
+ 	(vabaq_u16): Likewise.
+ 	(vabaq_u32): Likewise.
+ 	(vabd_s8): Likewise.
+ 	(vabd_s16): Likewise.
+ 	(vabd_s32): Likewise.
+ 	(vabd_u8): Likewise.
+ 	(vabd_u16): Likewise.
+ 	(vabd_u32): Likewise.
+ 	(vabdl_high_s8): Likewise.
+ 	(vabdl_high_s16): Likewise.
+ 	(vabdl_high_s32): Likewise.
+ 	(vabdl_high_u8): Likewise.
+ 	(vabdl_high_u16): Likewise.
+ 	(vabdl_high_u32): Likewise.
+ 	(vabdl_s8): Likewise.
+ 	(vabdl_s16): Likewise.
+ 	(vabdl_s32): Likewise.
+ 	(vabdl_u8): Likewise.
+ 	(vabdl_u16): Likewise.
+ 	(vabdl_u32): Likewise.
+ 	(vabdq_s8): Likewise.
+ 	(vabdq_s16): Likewise.
+ 	(vabdq_s32): Likewise.
+ 	(vabdq_u8): Likewise.
+ 	(vabdq_u16): Likewise.
+ 	(vabdq_u32): Likewise.
+ 	(vaddlv_s8): Likewise.
+ 	(vaddlv_s16): Likewise.
+ 	(vaddlv_u8): Likewise.
+ 	(vaddlv_u16): Likewise.
+ 	(vaddlvq_s8): Likewise.
+ 	(vaddlvq_s16): Likewise.
+ 	(vaddlvq_s32): Likewise.
+ 	(vaddlvq_u8): Likewise.
+ 	(vaddlvq_u16): Likewise.
+ 	(vaddlvq_u32): Likewise.
+ 	(vcvtx_f32_f64): Likewise.
+ 	(vcvtx_high_f32_f64): Likewise.
+ 	(vcvtxd_f32_f64): Likewise.
+ 	(vmla_n_f32): Likewise.
+ 	(vmla_n_s16): Likewise.
+ 	(vmla_n_s32): Likewise.
+ 	(vmla_n_u16): Likewise.
+ 	(vmla_n_u32): Likewise.
+ 	(vmla_s8): Likewise.
+ 	(vmla_s16): Likewise.
+ 	(vmla_s32): Likewise.
+ 	(vmla_u8): Likewise.
+ 	(vmla_u16): Likewise.
+ 	(vmla_u32): Likewise.
+ 	(vmlal_high_n_s16): Likewise.
+ 	(vmlal_high_n_s32): Likewise.
+ 	(vmlal_high_n_u16): Likewise.
+ 	(vmlal_high_n_u32): Likewise.
+ 	(vmlal_high_s8): Likewise.
+ 	(vmlal_high_s16): Likewise.
+ 	(vmlal_high_s32): Likewise.
+ 	(vmlal_high_u8): Likewise.
+ 	(vmlal_high_u16): Likewise.
+ 	(vmlal_high_u32): Likewise.
+ 	(vmlal_n_s16): Likewise.
+ 	(vmlal_n_s32): Likewise.
+ 	(vmlal_n_u16): Likewise.
+ 	(vmlal_n_u32): Likewise.
+ 	(vmlal_s8): Likewise.
+ 	(vmlal_s16): Likewise.
+ 	(vmlal_s32): Likewise.
+ 	(vmlal_u8): Likewise.
+ 	(vmlal_u16): Likewise.
+ 	(vmlal_u32): Likewise.
+ 	(vmlaq_n_f32): Likewise.
+ 	(vmlaq_n_s16): Likewise.
+ 	(vmlaq_n_s32): Likewise.
+ 	(vmlaq_n_u16): Likewise.
+ 	(vmlaq_n_u32): Likewise.
+ 	(vmlaq_s8): Likewise.
+ 	(vmlaq_s16): Likewise.
+ 	(vmlaq_s32): Likewise.
+ 	(vmlaq_u8): Likewise.
+ 	(vmlaq_u16): Likewise.
+ 	(vmlaq_u32): Likewise.
+ 	(vmls_n_f32): Likewise.
+ 	(vmls_n_s16): Likewise.
+ 	(vmls_n_s32): Likewise.
+ 	(vmls_n_u16): Likewise.
+ 	(vmls_n_u32): Likewise.
+ 	(vmls_s8): Likewise.
+ 	(vmls_s16): Likewise.
+ 	(vmls_s32): Likewise.
+ 	(vmls_u8): Likewise.
+ 	(vmls_u16): Likewise.
+ 	(vmls_u32): Likewise.
+ 	(vmlsl_high_n_s16): Likewise.
+ 	(vmlsl_high_n_s32): Likewise.
+ 	(vmlsl_high_n_u16): Likewise.
+ 	(vmlsl_high_n_u32): Likewise.
+ 	(vmlsl_high_s8): Likewise.
+ 	(vmlsl_high_s16): Likewise.
+ 	(vmlsl_high_s32): Likewise.
+ 	(vmlsl_high_u8): Likewise.
+ 	(vmlsl_high_u16): Likewise.
+ 	(vmlsl_high_u32): Likewise.
+ 	(vmlsl_n_s16): Likewise.
+ 	(vmlsl_n_s32): Likewise.
+ 	(vmlsl_n_u16): Likewise.
+ 	(vmlsl_n_u32): Likewise.
+ 	(vmlsl_s8): Likewise.
+ 	(vmlsl_s16): Likewise.
+ 	(vmlsl_s32): Likewise.
+ 	(vmlsl_u8): Likewise.
+ 	(vmlsl_u16): Likewise.
+ 	(vmlsl_u32): Likewise.
+ 	(vmlsq_n_f32): Likewise.
+ 	(vmlsq_n_s16): Likewise.
+ 	(vmlsq_n_s32): Likewise.
+ 	(vmlsq_n_u16): Likewise.
+ 	(vmlsq_n_u32): Likewise.
+ 	(vmlsq_s8): Likewise.
+ 	(vmlsq_s16): Likewise.
+ 	(vmlsq_s32): Likewise.
+ 	(vmlsq_u8): Likewise.
+ 	(vmlsq_u16): Likewise.
+ 	(vmlsq_u32): Likewise.
+ 	(vmovl_high_s8): Likewise.
+ 	(vmovl_high_s16): Likewise.
+ 	(vmovl_high_s32): Likewise.
+ 	(vmovl_high_u8): Likewise.
+ 	(vmovl_high_u16): Likewise.
+ 	(vmovl_high_u32): Likewise.
+ 	(vmovl_s8): Likewise.
+ 	(vmovl_s16): Likewise.
+ 	(vmovl_s32): Likewise.
+ 	(vmovl_u8): Likewise.
+ 	(vmovl_u16): Likewise.
+ 	(vmovl_u32): Likewise.
+ 	(vmovn_high_s16): Likewise.
+ 	(vmovn_high_s32): Likewise.
+ 	(vmovn_high_s64): Likewise.
+ 	(vmovn_high_u16): Likewise.
+ 	(vmovn_high_u32): Likewise.
+ 	(vmovn_high_u64): Likewise.
+ 	(vmovn_s16): Likewise.
+ 	(vmovn_s32): Likewise.
+ 	(vmovn_s64): Likewise.
+ 	(vmovn_u16): Likewise.
+ 	(vmovn_u32): Likewise.
+ 	(vmovn_u64): Likewise.
+ 	(vmull_high_n_s16): Likewise.
+ 	(vmull_high_n_s32): Likewise.
+ 	(vmull_high_n_u16): Likewise.
+ 	(vmull_high_n_u32): Likewise.
+ 	(vmull_high_p8): Likewise.
+ 	(vmull_high_s8): Likewise.
+ 	(vmull_high_s16): Likewise.
+ 	(vmull_high_s32): Likewise.
+ 	(vmull_high_u8): Likewise.
+ 	(vmull_high_u16): Likewise.
+ 	(vmull_high_u32): Likewise.
+ 	(vmull_n_s16): Likewise.
+ 	(vmull_n_s32): Likewise.
+ 	(vmull_n_u16): Likewise.
+ 	(vmull_n_u32): Likewise.
+ 	(vmull_p8): Likewise.
+ 	(vmull_s8): Likewise.
+ 	(vmull_s16): Likewise.
+ 	(vmull_s32): Likewise.
+ 	(vmull_u8): Likewise.
+ 	(vmull_u16): Likewise.
+ 	(vmull_u32): Likewise.
+ 	(vpadal_s8): Likewise.
+ 	(vpadal_s16): Likewise.
+ 	(vpadal_s32): Likewise.
+ 	(vpadal_u8): Likewise.
+ 	(vpadal_u16): Likewise.
+ 	(vpadal_u32): Likewise.
+ 	(vpadalq_s8): Likewise.
+ 	(vpadalq_s16): Likewise.
+ 	(vpadalq_s32): Likewise.
+ 	(vpadalq_u8): Likewise.
+ 	(vpadalq_u16): Likewise.
+ 	(vpadalq_u32): Likewise.
+ 	(vpaddl_s8): Likewise.
+ 	(vpaddl_s16): Likewise.
+ 	(vpaddl_s32): Likewise.
+ 	(vpaddl_u8): Likewise.
+ 	(vpaddl_u16): Likewise.
+ 	(vpaddl_u32): Likewise.
+ 	(vpaddlq_s8): Likewise.
+ 	(vpaddlq_s16): Likewise.
+ 	(vpaddlq_s32): Likewise.
+ 	(vpaddlq_u8): Likewise.
+ 	(vpaddlq_u16): Likewise.
+ 	(vpaddlq_u32): Likewise.
+ 	(vpaddq_s8): Likewise.
+ 	(vpaddq_s16): Likewise.
+ 	(vpaddq_s32): Likewise.
+ 	(vpaddq_s64): Likewise.
+ 	(vpaddq_u8): Likewise.
+ 	(vpaddq_u16): Likewise.
+ 	(vpaddq_u32): Likewise.
+ 	(vpaddq_u64): Likewise.
+ 	(vqdmulh_n_s16): Likewise.
+ 	(vqdmulh_n_s32): Likewise.
+ 	(vqdmulhq_n_s16): Likewise.
+ 	(vqdmulhq_n_s32): Likewise.
+ 	(vqmovn_high_s16): Likewise.
+ 	(vqmovn_high_s32): Likewise.
+ 	(vqmovn_high_s64): Likewise.
+ 	(vqmovn_high_u16): Likewise.
+ 	(vqmovn_high_u32): Likewise.
+ 	(vqmovn_high_u64): Likewise.
+ 	(vqmovun_high_s16): Likewise.
+ 	(vqmovun_high_s32): Likewise.
+ 	(vqmovun_high_s64): Likewise.
+ 	(vqrdmulh_n_s16): Likewise.
+ 	(vqrdmulh_n_s32): Likewise.
+ 	(vqrdmulhq_n_s16): Likewise.
+ 	(vqrdmulhq_n_s32): Likewise.
+ 	(vrsqrte_u32): Likewise.
+ 	(vrsqrteq_u32): Likewise.
+ 	(vtst_p8): Likewise.
+ 	(vtst_p16): Likewise.
+ 	(vtst_p64): Likewise.
+ 	(vtstq_p8): Likewise.
+ 	(vtstq_p16): Likewise.
+ 	(vtstq_p64): Likewise.
+ 	(vaddlv_s32): Likewise.
+ 	(vaddlv_u32): Likewise.
+ 	(vqtbl1_p8): Likewise.
+ 	(vqtbl1_s8): Likewise.
+ 	(vqtbl1_u8): Likewise.
+ 	(vqtbl1q_p8): Likewise.
+ 	(vqtbl1q_s8): Likewise.
+ 	(vqtbl1q_u8): Likewise.
+ 	(vqtbx1_s8): Likewise.
+ 	(vqtbx1_u8): Likewise.
+ 	(vqtbx1_p8): Likewise.
+ 	(vqtbx1q_s8): Likewise.
+ 	(vqtbx1q_u8): Likewise.
+ 	(vqtbx1q_p8): Likewise.
+ 	(vtbl1_s8): Likewise.
+ 	(vtbl1_u8): Likewise.
+ 	(vtbl1_p8): Likewise.
+ 	(vtbl2_s8): Likewise.
+ 	(vtbl2_u8): Likewise.
+ 	(vtbl2_p8): Likewise.
+ 	(vtbl3_s8): Likewise.
+ 	(vtbl3_u8): Likewise.
+ 	(vtbl3_p8): Likewise.
+ 	(vtbl4_s8): Likewise.
+ 	(vtbl4_u8): Likewise.
+ 	(vtbl4_p8): Likewise.
+ 	(vtbx2_s8): Likewise.
+ 	(vtbx2_u8): Likewise.
+ 	(vtbx2_p8): Likewise.
+ 	(vld1_f32): Likewise.
+ 	(vld1_f64): Likewise.
+ 	(vld1_p8): Likewise.
+ 	(vld1_p16): Likewise.
+ 	(vld1_p64): Likewise.
+ 	(vld1_s8): Likewise.
+ 	(vld1_s16): Likewise.
+ 	(vld1_s32): Likewise.
+ 	(vld1_s64): Likewise.
+ 	(vld1_u8): Likewise.
+ 	(vld1_u16): Likewise.
+ 	(vld1_u32): Likewise.
+ 	(vld1_u64): Likewise.
+ 	(vld1q_f32): Likewise.
+ 	(vld1q_f64): Likewise.
+ 	(vld1q_p8): Likewise.
+ 	(vld1q_p16): Likewise.
+ 	(vld1q_p64): Likewise.
+ 	(vld1q_s8): Likewise.
+ 	(vld1q_s16): Likewise.
+ 	(vld1q_s32): Likewise.
+ 	(vld1q_s64): Likewise.
+ 	(vld1q_u8): Likewise.
+ 	(vld1q_u16): Likewise.
+ 	(vld1q_u32): Likewise.
+ 	(vld1q_u64): Likewise.
+ 	(vpmax_s8): Likewise.
+ 	(vpmax_s16): Likewise.
+ 	(vpmax_s32): Likewise.
+ 	(vpmax_u8): Likewise.
+ 	(vpmax_u16): Likewise.
+ 	(vpmax_u32): Likewise.
+ 	(vpmaxq_s8): Likewise.
+ 	(vpmaxq_s16): Likewise.
+ 	(vpmaxq_s32): Likewise.
+ 	(vpmaxq_u8): Likewise.
+ 	(vpmaxq_u16): Likewise.
+ 	(vpmaxq_u32): Likewise.
+ 	(vpmax_f32): Likewise.
+ 	(vpmaxq_f32): Likewise.
+ 	(vpmaxq_f64): Likewise.
+ 	(vpmaxqd_f64): Likewise.
+ 	(vpmaxs_f32): Likewise.
+ 	(vpmaxnm_f32): Likewise.
+ 	(vpmaxnmq_f32): Likewise.
+ 	(vpmaxnmq_f64): Likewise.
+ 	(vpmaxnmqd_f64): Likewise.
+ 	(vpmaxnms_f32): Likewise.
+ 	(vpmin_s8): Likewise.
+ 	(vpmin_s16): Likewise.
+ 	(vpmin_s32): Likewise.
+ 	(vpmin_u8): Likewise.
+ 	(vpmin_u16): Likewise.
+ 	(vpmin_u32): Likewise.
+ 	(vpminq_s8): Likewise.
+ 	(vpminq_s16): Likewise.
+ 	(vpminq_s32): Likewise.
+ 	(vpminq_u8): Likewise.
+ 	(vpminq_u16): Likewise.
+ 	(vpminq_u32): Likewise.
+ 	(vpmin_f32): Likewise.
+ 	(vpminq_f32): Likewise.
+ 	(vpminq_f64): Likewise.
+ 	(vpminqd_f64): Likewise.
+ 	(vpmins_f32): Likewise.
+ 	(vpminnm_f32): Likewise.
+ 	(vpminnmq_f32): Likewise.
+ 	(vpminnmq_f64): Likewise.
+ 	(vpminnmqd_f64): Likewise.
+ 	(vpminnms_f32): Likewise.
+ 	(vmla_f32): Likewise.
+ 	(vmlaq_f32): Likewise.
+ 	(vmlaq_f64): Likewise.
+ 	(vmls_f32): Likewise.
+ 	(vmlsq_f32): Likewise.
+ 	(vmlsq_f64): Likewise.
+ 	(vqtbl2_s8): Likewise.
+ 	(vqtbl2_u8): Likewise.
+ 	(vqtbl2_p8): Likewise.
+ 	(vqtbl2q_s8): Likewise.
+ 	(vqtbl2q_u8): Likewise.
+ 	(vqtbl2q_p8): Likewise.
+ 	(vqtbl3_s8): Likewise.
+ 	(vqtbl3_u8): Likewise.
+ 	(vqtbl3_p8): Likewise.
+ 	(vqtbl3q_s8): Likewise.
+ 	(vqtbl3q_u8): Likewise.
+ 	(vqtbl3q_p8): Likewise.
+ 	(vqtbl4_s8): Likewise.
+ 	(vqtbl4_u8): Likewise.
+ 	(vqtbl4_p8): Likewise.
+ 	(vqtbl4q_s8): Likewise.
+ 	(vqtbl4q_u8): Likewise.
+ 	(vqtbl4q_p8): Likewise.
+ 	(vqtbx2_s8): Likewise.
+ 	(vqtbx2_u8): Likewise.
+ 	(vqtbx2_p8): Likewise.
+ 	(vqtbx2q_s8): Likewise.
+ 	(vqtbx2q_u8): Likewise.
+ 	(vqtbx2q_p8): Likewise.
+ 	(vqtbx3_s8): Likewise.
+ 	(vqtbx3_u8): Likewise.
+ 	(vqtbx3_p8): Likewise.
+ 	(vqtbx3q_s8): Likewise.
+ 	(vqtbx3q_u8): Likewise.
+ 	(vqtbx3q_p8): Likewise.
+ 	(vqtbx4_s8): Likewise.
+ 	(vqtbx4_u8): Likewise.
+ 	(vqtbx4_p8): Likewise.
+ 	(vqtbx4q_s8): Likewise.
+ 	(vqtbx4q_u8): Likewise.
+ 	(vqtbx4q_p8): Likewise.
+ 	(vrev16_p8): Likewise.
+ 	(vrev16_s8): Likewise.
+ 	(vrev16_u8): Likewise.
+ 	(vrev16q_p8): Likewise.
+ 	(vrev16q_s8): Likewise.
+ 	(vrev16q_u8): Likewise.
+ 	(vrev32_p8): Likewise.
+ 	(vrev32_p16): Likewise.
+ 	(vrev32_s8): Likewise.
+ 	(vrev32_s16): Likewise.
+ 	(vrev32_u8): Likewise.
+ 	(vrev32_u16): Likewise.
+ 	(vrev32q_p8): Likewise.
+ 	(vrev32q_p16): Likewise.
+ 	(vrev32q_s8): Likewise.
+ 	(vrev32q_s16): Likewise.
+ 	(vrev32q_u8): Likewise.
+ 	(vrev32q_u16): Likewise.
+ 	(vrev64_f32): Likewise.
+ 	(vrev64_p8): Likewise.
+ 	(vrev64_p16): Likewise.
+ 	(vrev64_s8): Likewise.
+ 	(vrev64_s16): Likewise.
+ 	(vrev64_s32): Likewise.
+ 	(vrev64_u8): Likewise.
+ 	(vrev64_u16): Likewise.
+ 	(vrev64_u32): Likewise.
+ 	(vrev64q_f32): Likewise.
+ 	(vrev64q_p8): Likewise.
+ 	(vrev64q_p16): Likewise.
+ 	(vrev64q_s8): Likewise.
+ 	(vrev64q_s16): Likewise.
+ 	(vrev64q_s32): Likewise.
+ 	(vrev64q_u8): Likewise.
+ 	(vrev64q_u16): Likewise.
+ 	(vrev64q_u32): Likewise.
+ 	(vsha1cq_u32): Likewise.
+ 	(vsha1mq_u32): Likewise.
+ 	(vsha1pq_u32): Likewise.
+ 	(vsha1h_u32): Likewise.
+ 	(vsha1su0q_u32): Likewise.
+ 	(vsha1su1q_u32): Likewise.
+ 	(vsha256hq_u32): Likewise.
+ 	(vsha256h2q_u32): Likewise.
+ 	(vsha256su0q_u32): Likewise.
+ 	(vsha256su1q_u32): Likewise.
+ 	(vmull_p64): Likewise.
+ 	(vmull_high_p64): Likewise.
+ 	(vsqrt_f32): Likewise.
+ 	(vsqrtq_f32): Likewise.
+ 	(vsqrt_f64): Likewise.
+ 	(vsqrtq_f64): Likewise.
+ 	(vst1_f32): Likewise.
+ 	(vst1_f64): Likewise.
+ 	(vst1_p8): Likewise.
+ 	(vst1_p16): Likewise.
+ 	(vst1_p64): Likewise.
+ 	(vst1_s8): Likewise.
+ 	(vst1_s16): Likewise.
+ 	(vst1_s32): Likewise.
+ 	(vst1_s64): Likewise.
+ 	(vst1_u8): Likewise.
+ 	(vst1_u16): Likewise.
+ 	(vst1_u32): Likewise.
+ 	(vst1_u64): Likewise.
+ 	(vst1q_f32): Likewise.
+ 	(vst1q_f64): Likewise.
+ 	(vst1q_p8): Likewise.
+ 	(vst1q_p16): Likewise.
+ 	(vst1q_p64): Likewise.
+ 	(vst1q_s8): Likewise.
+ 	(vst1q_s16): Likewise.
+ 	(vst1q_s32): Likewise.
+ 	(vst1q_s64): Likewise.
+ 	(vst1q_u8): Likewise.
+ 	(vst1q_u16): Likewise.
+ 	(vst1q_u32): Likewise.
+ 	(vst1q_u64): Likewise.
+ 	(vst1_s64_x2): Likewise.
+ 	(vst1_u64_x2): Likewise.
+ 	(vst1_f64_x2): Likewise.
+ 	(vst1_s8_x2): Likewise.
+ 	(vst1_p8_x2): Likewise.
+ 	(vst1_s16_x2): Likewise.
+ 	(vst1_p16_x2): Likewise.
+ 	(vst1_s32_x2): Likewise.
+ 	(vst1_u8_x2): Likewise.
+ 	(vst1_u16_x2): Likewise.
+ 	(vst1_u32_x2): Likewise.
+ 	(vst1_f16_x2): Likewise.
+ 	(vst1_f32_x2): Likewise.
+ 	(vst1_p64_x2): Likewise.
+ 	(vst1q_s8_x2): Likewise.
+ 	(vst1q_p8_x2): Likewise.
+ 	(vst1q_s16_x2): Likewise.
+ 	(vst1q_p16_x2): Likewise.
+ 	(vst1q_s32_x2): Likewise.
+ 	(vst1q_s64_x2): Likewise.
+ 	(vst1q_u8_x2): Likewise.
+ 	(vst1q_u16_x2): Likewise.
+ 	(vst1q_u32_x2): Likewise.
+ 	(vst1q_u64_x2): Likewise.
+ 	(vst1q_f16_x2): Likewise.
+ 	(vst1q_f32_x2): Likewise.
+ 	(vst1q_f64_x2): Likewise.
+ 	(vst1q_p64_x2): Likewise.
+ 	(vst1_s64_x3): Likewise.
+ 	(vst1_u64_x3): Likewise.
+ 	(vst1_f64_x3): Likewise.
+ 	(vst1_s8_x3): Likewise.
+ 	(vst1_p8_x3): Likewise.
+ 	(vst1_s16_x3): Likewise.
+ 	(vst1_p16_x3): Likewise.
+ 	(vst1_s32_x3): Likewise.
+ 	(vst1_u8_x3): Likewise.
+ 	(vst1_u16_x3): Likewise.
+ 	(vst1_u32_x3): Likewise.
+ 	(vst1_f16_x3): Likewise.
+ 	(vst1_f32_x3): Likewise.
+ 	(vst1_p64_x3): Likewise.
+ 	(vst1q_s8_x3): Likewise.
+ 	(vst1q_p8_x3): Likewise.
+ 	(vst1q_s16_x3): Likewise.
+ 	(vst1q_p16_x3): Likewise.
+ 	(vst1q_s32_x3): Likewise.
+ 	(vst1q_s64_x3): Likewise.
+ 	(vst1q_u8_x3): Likewise.
+ 	(vst1q_u16_x3): Likewise.
+ 	(vst1q_u32_x3): Likewise.
+ 	(vst1q_u64_x3): Likewise.
+ 	(vst1q_f16_x3): Likewise.
+ 	(vst1q_f32_x3): Likewise.
+ 	(vst1q_f64_x3): Likewise.
+ 	(vst1q_p64_x3): Likewise.
+ 	(vst2_s64): Likewise.
+ 	(vst2_u64): Likewise.
+ 	(vst2_f64): Likewise.
+ 	(vst2_s8): Likewise.
+ 	(vst2_p8): Likewise.
+ 	(vst2_s16): Likewise.
+ 	(vst2_p16): Likewise.
+ 	(vst2_s32): Likewise.
+ 	(vst2_u8): Likewise.
+ 	(vst2_u16): Likewise.
+ 	(vst2_u32): Likewise.
+ 	(vst2_f16): Likewise.
+ 	(vst2_f32): Likewise.
+ 	(vst2_p64): Likewise.
+ 	(vst2q_s8): Likewise.
+ 	(vst2q_p8): Likewise.
+ 	(vst2q_s16): Likewise.
+ 	(vst2q_p16): Likewise.
+ 	(vst2q_s32): Likewise.
+ 	(vst2q_s64): Likewise.
+ 	(vst2q_u8): Likewise.
+ 	(vst2q_u16): Likewise.
+ 	(vst2q_u32): Likewise.
+ 	(vst2q_u64): Likewise.
+ 	(vst2q_f16): Likewise.
+ 	(vst2q_f32): Likewise.
+ 	(vst2q_f64): Likewise.
+ 	(vst2q_p64): Likewise.
+ 	(vst3_s64): Likewise.
+ 	(vst3_u64): Likewise.
+ 	(vst3_f64): Likewise.
+ 	(vst3_s8): Likewise.
+ 	(vst3_p8): Likewise.
+ 	(vst3_s16): Likewise.
+ 	(vst3_p16): Likewise.
+ 	(vst3_s32): Likewise.
+ 	(vst3_u8): Likewise.
+ 	(vst3_u16): Likewise.
+ 	(vst3_u32): Likewise.
+ 	(vst3_f16): Likewise.
+ 	(vst3_f32): Likewise.
+ 	(vst3_p64): Likewise.
+ 	(vst3q_s8): Likewise.
+ 	(vst3q_p8): Likewise.
+ 	(vst3q_s16): Likewise.
+ 	(vst3q_p16): Likewise.
+ 	(vst3q_s32): Likewise.
+ 	(vst3q_s64): Likewise.
+ 	(vst3q_u8): Likewise.
+ 	(vst3q_u16): Likewise.
+ 	(vst3q_u32): Likewise.
+ 	(vst3q_u64): Likewise.
+ 	(vst3q_f16): Likewise.
+ 	(vst3q_f32): Likewise.
+ 	(vst3q_f64): Likewise.
+ 	(vst3q_p64): Likewise.
+ 	(vst4_s64): Likewise.
+ 	(vst4_u64): Likewise.
+ 	(vst4_f64): Likewise.
+ 	(vst4_s8): Likewise.
+ 	(vst4_p8): Likewise.
+ 	(vst4_s16): Likewise.
+ 	(vst4_p16): Likewise.
+ 	(vst4_s32): Likewise.
+ 	(vst4_u8): Likewise.
+ 	(vst4_u16): Likewise.
+ 	(vst4_u32): Likewise.
+ 	(vst4_f16): Likewise.
+ 	(vst4_f32): Likewise.
+ 	(vst4_p64): Likewise.
+ 	(vst4q_s8): Likewise.
+ 	(vst4q_p8): Likewise.
+ 	(vst4q_s16): Likewise.
+ 	(vst4q_p16): Likewise.
+ 	(vst4q_s32): Likewise.
+ 	(vst4q_s64): Likewise.
+ 	(vst4q_u8): Likewise.
+ 	(vst4q_u16): Likewise.
+ 	(vst4q_u32): Likewise.
+ 	(vst4q_u64): Likewise.
+ 	(vst4q_f16): Likewise.
+ 	(vst4q_f32): Likewise.
+ 	(vst4q_f64): Likewise.
+ 	(vst4q_p64): Likewise.
+ 	(vtbx4_s8): Likewise.
+ 	(vtbx4_u8): Likewise.
+ 	(vtbx4_p8): Likewise.
+ 	(vtrn_f32): Likewise.
+ 	(vtrn_p8): Likewise.
+ 	(vtrn_p16): Likewise.
+ 	(vtrn_s8): Likewise.
+ 	(vtrn_s16): Likewise.
+ 	(vtrn_s32): Likewise.
+ 	(vtrn_u8): Likewise.
+ 	(vtrn_u16): Likewise.
+ 	(vtrn_u32): Likewise.
+ 	(vtrnq_f32): Likewise.
+ 	(vtrnq_p8): Likewise.
+ 	(vtrnq_p16): Likewise.
+ 	(vtrnq_s8): Likewise.
+ 	(vtrnq_s16): Likewise.
+ 	(vtrnq_s32): Likewise.
+ 	(vtrnq_u8): Likewise.
+ 	(vtrnq_u16): Likewise.
+ 	(vtrnq_u32): Likewise.
+ 	(vrsqrte_f16): Likewise.
+ 	(vrsqrteq_f16): Likewise.
+ 	(vsqrt_f16): Likewise.
+ 	(vsqrtq_f16): Likewise.
+ 	(vabd_f16): Likewise.
+ 	(vabdq_f16): Likewise.
+ 	(vpadd_f16): Likewise.
+ 	(vpaddq_f16): Likewise.
+ 	(vpmax_f16): Likewise.
+ 	(vpmaxq_f16): Likewise.
+ 	(vpmaxnm_f16): Likewise.
+ 	(vpmaxnmq_f16): Likewise.
+ 	(vpmin_f16): Likewise.
+ 	(vpminq_f16): Likewise.
+ 	(vpminnm_f16): Likewise.
+ 	(vpminnmq_f16): Likewise.
+ 	(vrsqrts_f16): Likewise.
+ 	(vrsqrtsq_f16): Likewise.
+ 
+ 2019-09-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91896
+ 	* tree-vect-loop.c (vectorizable_reduction): The single
+ 	def-use cycle optimization cannot apply when there's more
+ 	than one pattern stmt involved.
+ 
+ 2019-09-24  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/rs6000.md (load_macho_picbase_<mode>): New, using
+ 	the 'P' mode iterator, replacing the (removed) SI and DI variants.
+ 	(reload_macho_picbase_<mode>): Likewise.
+ 
+ 2019-09-24  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/rs6000.md: Move darwin.md include until
+ 	after the definition of the mode iterators.
+ 
+ 2019-09-23  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/91570
+ 	* tree-ssa-strlen.c (get_range_strlen_dynamic): Handle null and
+ 	non-constant minlen, maxlen and maxbound.
+ 
+ 2019-09-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vectorizer.h (_stmt_vec_info::const_cond_reduc_code):
+ 	Rename to...
+ 	(_stmt_vec_info::cond_reduc_code): ... this.
+ 	(_stmt_vec_info::induc_cond_initial_val): Add.
+ 	(STMT_VINFO_VEC_CONST_COND_REDUC_CODE): Rename to...
+ 	(STMT_VINFO_VEC_COND_REDUC_CODE): ... this.
+ 	(STMT_VINFO_VEC_INDUC_COND_INITIAL_VAL): Add.
+ 	* tree-vectorizer.c (vec_info::new_stmt_vec_info): Adjust.
+ 	* tree-vect-loop.c (get_initial_def_for_reduction): Pass in
+ 	the reduction code.
+ 	(vect_create_epilog_for_reduction): Drop special
+ 	induction condition reduction params, pass in reduction code
+ 	and simplify.
+ 	(vectorizable_reduction): Perform condition reduction kind
+ 	selection only at analysis time.  Adjust passing on state.
+ 
+ 2019-09-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/aarch64/aarch64.md (mov<mode>): Don't call
+ 	aarch64_split_dimode_const_store on volatile MEM.
+ 
+ 2019-09-24  Stamatis Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* config/aarch64/aarch64-option-extensions.def (fp16fml):
+ 	Update hwcap string for fp16fml.
+ 
+ 2019-09-24  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/91866
+ 	* match.pd (((T)(A)) + CST -> (T)(A + CST)): Formatting fix.
+ 	(((T)(A + CST1)) + CST2 -> (T)(A) + (T)CST1 + CST2): New optimization.
+ 
+ 2019-09-24  Martin Liska  <mliska@suse.cz>
+ 
+ 	* cfgexpand.c (gimple_assign_rhs_to_tree): Use switch statement
+ 	instead of if-elseif-elseif-...
+ 	* gimple-expr.c (extract_ops_from_tree): Likewise.
+ 	* gimple.c (get_gimple_rhs_num_ops): Likewise.
+ 	* tree-ssa-forwprop.c (rhs_to_tree): Likewise.
+ 
+ 2019-09-24  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/91831
+ 	* ipa-param-manipulation.c (carry_over_param): Make a method of
+ 	ipa_param_body_adjustments, remove now unnecessary argument.  Also copy
+ 	in case of a context mismatch.
+ 	(ipa_param_body_adjustments::common_initialization): Adjust call to
+ 	carry_over_param.
+ 	* ipa-param-manipulation.h (class ipa_param_body_adjustments): Add
+ 	private method carry_over_param.
+ 
+ 2019-09-24  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/91832
+ 	* ipa-sra.c (scan_expr_access): Check that offset is non-negative.
+ 
+ 2019-09-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Valueize MEM_REF
+ 	base.
+ 
+ 2019-09-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/t-arm (arm-builtins.o): Add dependency on
+ 	arm_acle_builtins.def.
+ 
+ 2019-09-23  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR target/91823
+ 	* config/rs6000/altivec.md (altivec_copysign_v4sf3): Generate
+ 	canonical CONST_INTs.  Use gen_rtvec.
+ 
+ 2019-09-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (get_initial_def_for_reduction): Simplify,
+ 	avoid adjusting by + 0 or * 1.
+ 	(vect_create_epilog_for_reduction): Get reduction code only
+ 	when necessary.  Deal with adjustment_def only when necessary.
+ 
+ 2019-09-23  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/atomics.md (aarch64_store_exclusive_pair): Fix
+ 	memmodel index.
+ 
+ 2019-09-23  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	PR ipa/91835
+ 	* lto-section-in.c (lto_section_name): Use "ipa_sra" instead of
+ 	"ipa-sra".
+ 
+ 2019-09-22  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/rs6000.c (machopic_output_stub): Remove dead
+ 	code.  Merge code blocks with common conditionals. Use declared
+ 	macro instead of a magic number for PIC level.
+ 
+ 2019-09-21  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/91830
+ 	* gimple-ssa-warn-restrict.c (builtin_memref::set_base_and_offset):
+ 	Simplify computation of the offset of the referenced subobject.
+ 
+ 2019-09-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (machopic_legitimize_pic_address): Check
+ 	for lra not reload.
+ 
+ 2019-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* ira-conflicts.c (can_use_same_reg_p): New function.
+ 	(process_reg_shuffles): Take an insn parameter.  Ignore cases
+ 	in which input operand op_num could seemingly never be allocated
+ 	to the same register as the destination.
+ 	(add_insn_allocno_copies): Update call to process_reg_shuffles.
+ 
+ 2019-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* simplify-rtx.c (neg_const_int): Replace with...
+ 	(neg_poly_int_rtx): ...this new function.
+ 	(simplify_binary_operation_1): Extend (minus x C) -> (plus X -C)
+ 	to all CONST_SCALAR_INTs and to CONST_POLY_INT.
+ 	(simplify_plus_minus): Likewise for constant terms here.
+ 
+ 2019-09-20  Jonas Pfeil  <jonas.pfeil@uli-ulm.de>
+ 
+ 	* config/microblaze/microblaze.h (ASM_OUTPUT_SKIP): Use
+ 	HOST_WIDE_PRINT_UNSIGNED.
+ 
+ 2019-09-20  John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	* config/pa/pa.c (pa_trampoline_init): Remove spurious extended
+ 	character.
+ 
+ 2019-09-20  Maya Rashish  <coypu@sdf.org>
+ 
+ 	PR target/86811
+ 	* config/vax/vax.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
+ 	Define to speculation_safe_value_not_needed.
+ 
+ 2019-09-20  Richard Biener  <rguenther@suse.de>
+ 	    Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/91814
+ 	* config/i386/i386-features.c (gen_gpr_to_xmm_move_src): Revert
+ 	previous change.
+ 	(general_scalar_chain::convert_op): Force not suitable memory
+ 	operands to a register.
+ 
+ 2019-09-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91821
+ 	* tree-vect-loop.c (check_reduction_path): Check we can compute
+ 	reduc_idx.
+ 	(vect_is_simple_reduction): Set STMT_VINFO_REDUC_IDX.
+ 	* tree-vect-patterns.c (vect_reassociating_reduction_p): Return
+ 	operands in canonical order.
+ 	* tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
+ 	STMT_VINFO_REDUC_IDX.
+ 	* tree-vectorizer.h (_stmt_vec_info::reduc_idx): New.
+ 	(STMT_VINFO_REDUC_IDX): Likewise.
+ 
+ 2019-09-20  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR target/91269
+ 	* config/sparc/sparc.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
+ 
+ 2019-09-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91822
+ 	* tree-vectorizer.h (vectorizable_condition): Restore for_reduction
+ 	parameter.
+ 	* tree-vect-loop.c (vectorizable_reduction): Adjust asserts
+ 	for reduc_index in nested cycles, adjust vectorizable_condition
+ 	calls.
+ 	* tree-vect-stmts.c (vectorizable_condition): Restore for_reduction
+ 	parameter.
+ 	(vect_analyze_stmt): Adjust.
+ 	(vect_transform_stmt): Likewise.
+ 
+ 2019-09-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR target/91767
+ 	* config/i386/i386-features.c (general_scalar_chain::convert_registers):
+ 	Ensure there's a sequence point between allocating the new register
+ 	and passing a reference to a reg via regno_reg_rtx.
+ 
+ 2019-09-20  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* coretypes.h (cgraph_edge): Declare.
+ 	* ipa-param-manipulation.c: Rewrite.
+ 	* ipa-param-manipulation.h: Likewise.
+ 	* Makefile.in (GTFILES): Added ipa-param-manipulation.h and ipa-sra.c.
+ 	(OBJS): Added ipa-sra.o.
+ 	* cgraph.h (ipa_replace_map): Removed fields old_tree, replace_p
+ 	and ref_p, added fields param_adjustments and performed_splits.
+ 	(struct cgraph_clone_info): Remove ags_to_skip and
+ 	combined_args_to_skip, new field param_adjustments.
+ 	(cgraph_node::create_clone): Changed parameters to use
+ 	ipa_param_adjustments.
+ 	(cgraph_node::create_virtual_clone): Likewise.
+ 	(cgraph_node::create_virtual_clone_with_body): Likewise.
+ 	(tree_function_versioning): Likewise.
+ 	(cgraph_build_function_type_skip_args): Removed.
+ 	* cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Convert to
+ 	using ipa_param_adjustments.
+ 	(clone_of_p): Likewise.
+ 	* cgraphclones.c (cgraph_build_function_type_skip_args): Removed.
+ 	(build_function_decl_skip_args): Likewise.
+ 	(duplicate_thunk_for_node): Adjust parameters using
+ 	ipa_param_body_adjustments, copy param_adjustments instead of
+ 	args_to_skip.
+ 	(cgraph_node::create_clone): Convert to using ipa_param_adjustments.
+ 	(cgraph_node::create_virtual_clone): Likewise.
+ 	(cgraph_node::create_version_clone_with_body): Likewise.
+ 	(cgraph_materialize_clone): Likewise.
+ 	(symbol_table::materialize_all_clones): Likewise.
+ 	* ipa-fnsummary.c (ipa_fn_summary_t::duplicate): Simplify
+ 	ipa_replace_map check.
+ 	* ipa-cp.c (get_replacement_map): Do not initialize removed fields.
+ 	(initialize_node_lattices): Make aware that some parameters might have
+ 	already been removed.
+ 	(want_remove_some_param_p): New function.
+ 	(create_specialized_node): Convert to using ipa_param_adjustments and
+ 	deal with possibly pre-existing adjustments.
+ 	* lto-cgraph.c (output_cgraph_opt_summary_p): Likewise.
+ 	(output_node_opt_summary): Do not stream removed fields.  Stream
+ 	parameter adjustments instead of argumetns to skip.
+ 	(input_node_opt_summary): Likewise.
+ 	(input_node_opt_summary): Likewise.
+ 	* lto-section-in.c (lto_section_name): Added ipa-sra section.
+ 	* lto-streamer.h (lto_section_type): Likewise.
+ 	* tree-inline.h (copy_body_data): New fields killed_new_ssa_names and
+ 	param_body_adjs.
+ 	(copy_decl_to_var): Declare.
+ 	* tree-inline.c (update_clone_info): Do not remap old_tree.
+ 	(remap_gimple_stmt): Use ipa_param_body_adjustments to modify gimple
+ 	statements, walk all extra generated statements and remap their
+ 	operands.
+ 	(redirect_all_calls): Add killed SSA names to a hash set.
+ 	(remap_ssa_name): Do not remap killed SSA names.
+ 	(copy_arguments_for_versioning): Renames to copy_arguments_nochange,
+ 	half of functionality moved to ipa_param_body_adjustments.
+ 	(copy_decl_to_var): Make exported.
+ 	(copy_body): Destroy killed_new_ssa_names hash set.
+ 	(expand_call_inline): Remap performed splits.
+ 	(update_clone_info): Likewise.
+ 	(tree_function_versioning): Simplify tree_map processing.  Updated to
+ 	accept ipa_param_adjustments and use ipa_param_body_adjustments.
+ 	* omp-simd-clone.c (simd_clone_vector_of_formal_parm_types): Adjust
+ 	for the new interface.
+ 	(simd_clone_clauses_extract): Likewise, make args an auto_vec.
+ 	(simd_clone_compute_base_data_type): Likewise.
+ 	(simd_clone_init_simd_arrays): Adjust for the new interface.
+ 	(simd_clone_adjust_argument_types): Likewise.
+ 	(struct modify_stmt_info): Likewise.
+ 	(ipa_simd_modify_stmt_ops): Likewise.
+ 	(ipa_simd_modify_function_body): Likewise.
+ 	(simd_clone_adjust): Likewise.
+ 	* tree-sra.c: Removed IPA-SRA.  Include tree-sra.h.
+ 	(type_internals_preclude_sra_p): Make public.
+ 	* tree-sra.h: New file.
+ 	* ipa-inline-transform.c (save_inline_function_body): Update to
+ 	refelct new tree_function_versioning signature.
+ 	* ipa-prop.c (adjust_agg_replacement_values): Use a helper from
+ 	ipa_param_adjustments to get current parameter indices.
+ 	(ipcp_modif_dom_walker::before_dom_children): Likewise.
+ 	(ipcp_update_bits): Likewise.
+ 	(ipcp_update_vr): Likewise.
+ 	* ipa-split.c (split_function): Convert to using ipa_param_adjustments.
+ 	* ipa-sra.c: New file.
+ 	* multiple_target.c (create_target_clone): Update to reflet new type
+ 	of create_version_clone_with_body.
+ 	* trans-mem.c (ipa_tm_create_version): Update to reflect new type of
+ 	tree_function_versioning.
+ 	(modify_function): Update to reflect new type of
+ 	tree_function_versioning.
+ 	* params.def (PARAM_IPA_SRA_MAX_REPLACEMENTS): New.
+ 	* passes.def: Remove old IPA-SRA and add new one.
+ 	* tree-pass.h (make_pass_early_ipa_sra): Remove declaration.
+ 	(make_pass_ipa_sra): Declare.
+ 	* dbgcnt.def: Remove eipa_sra.  Added ipa_sra_params and
+ 	ipa_sra_retvalues.
+ 	* doc/invoke.texi (ipa-sra-max-replacements): New.
+ 
+ 2019-09-19  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/91631
+ 	* builtins.c (component_size): Correct trailing array computation,
+ 	rename to component_ref_size and move...
+ 	(compute_objsize): Adjust.
+ 	* gimple-ssa-warn-restrict.c (builtin_memref::refsize): New member.
+ 	(builtin_access::strict): Do not consider memmove.
+ 	(builtin_access::write_off): New function.
+ 	(builtin_memref::builtin_memref): Initialize refsize.
+ 	(builtin_memref::set_base_and_offset): Adjust refoff and compute
+ 	refsize.
+ 	(builtin_memref::offset_out_of_bounds): Use ooboff input values.
+ 	Handle refsize.
+ 	(builtin_access::builtin_access): Initialize dstoff to destination
+ 	refeence offset here instead of in maybe_diag_overlap.  Adjust
+ 	referencess even to unrelated objects.	Adjust sizrange of bounded
+ 	string functions to reflect bound.  For strcat, adjust destination
+ 	sizrange by that of source.
+ 	(builtin_access::strcat_overlap):  Adjust offsets and sizes
+ 	to reflect the increase in destination sizrange above.
+ 	(builtin_access::overlap): Do not set dstoff here but instead
+ 	in builtin_access::builtin_access.
+ 	(check_bounds_or_overlap): Use builtin_access::write_off.
+ 	(maybe_diag_access_bounds): Add argument.  Add informational notes.
+ 	(dump_builtin_memref, dump_builtin_access): New functions.
+ 	* tree.c (component_ref_size): ...to here.
+ 	* tree.h (component_ref_size): Declare.
+ 	* tree-ssa-strlen (handle_builtin_strcat): Include the terminating
+ 	nul in the size of the source string.
+ 
+ 2019-09-19  Lewis Hyatt  <lhyatt@gmail.com>
+ 
+ 	PR c/67224
+ 	* doc/cpp.texi: Document support for extended characters in
+ 	identifiers.
+ 	* doc/cppopts.texi: Likewise.
+ 
+ 2019-09-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (vect_is_slp_reduction): Remove.
+ 	(check_reduction_path): New overload having the path as result.
+ 	(vect_is_simple_reduction): From the detected reduction
+ 	path build a SLP reduction chain if possible.
+ 
+ 2019-09-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR target/91814
+ 	* config/i386/i386-features.c (gen_gpr_to_xmm_move_src):
+ 	Force operand to a register if it isn't nonimmediate_operand.
+ 
+ 2019-09-19  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/arm.md (<logical_op>di3): Use <optab> and <CODE>.
+ 	* config/arm/iterators.md (optab): Add and, ior, xor entries.
+ 	(logical_op): Remove code attribute.
+ 	(logical_OP): Likewise.
+ 
+ 2019-09-19  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf.c (sort_congruence_class_groups_by_decl_uid):
+ 	Use proper casting.
+ 
+ 2019-09-19  Richard Henderson  <richard.henderson@linaro.org>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_print_operand): Allow integer
+ 	registers with %R.
+ 
+ 	* config/aarch64/aarch64.c (aarch64_gen_compare_reg): Add support
+ 	for NE comparison of TImode values.
+ 	(aarch64_emit_load_exclusive): Add support for TImode.
+ 	(aarch64_emit_store_exclusive): Likewise.
+ 	(aarch64_split_compare_and_swap): Disable strong_zero_p for TImode.
+ 	* config/aarch64/atomics.md (@atomic_compare_and_swap<ALLI_TI>):
+ 	Change iterator from ALLI to ALLI_TI.
+ 	(@atomic_compare_and_swap<JUST_TI>): New.
+ 	(@atomic_compare_and_swap<JUST_TI>_lse): New.
+ 	(aarch64_load_exclusive_pair): New.
+ 	(aarch64_store_exclusive_pair): New.
+ 	* config/aarch64/iterators.md (JUST_TI): New.
+ 
+ 	* config/aarch64/aarch64 (aarch64_split_compare_and_swap): Disable
+ 	strong_zero_p for aarch64_track_speculation; unify some code paths;
+ 	use aarch64_gen_compare_reg instead of open-coding.
+ 
+ 	* config/aarch64/aarch64.opt (-moutline-atomics): New.
+ 	* config/aarch64/aarch64.c (aarch64_atomic_ool_func): New.
+ 	(aarch64_ool_cas_names, aarch64_ool_swp_names): New.
+ 	(aarch64_ool_ldadd_names, aarch64_ool_ldset_names): New.
+ 	(aarch64_ool_ldclr_names, aarch64_ool_ldeor_names): New.
+ 	(aarch64_expand_compare_and_swap): Honor TARGET_OUTLINE_ATOMICS.
+ 	* config/aarch64/atomics.md (atomic_exchange<ALLI>): Likewise.
+ 	(atomic_<atomic_op><ALLI>): Likewise.
+ 	(atomic_fetch_<atomic_op><ALLI>): Likewise.
+ 	(atomic_<atomic_op>_fetch<ALLI>): Likewise.
+ 	* doc/invoke.texi: Document -moutline-atomics.
+ 
+ 2019-09-19  Feng Xue  <fxue@os.amperecomputing.com>
+ 
+ 	* ipa-fnsummary.c (set_cond_stmt_execution_predicate): Do not compute
+ 	trivial predicate for condition branch.
+ 	(set_switch_stmt_execution_predicate): Do not compute trivial predicate
+ 	for switch case.
+ 	(compute_bb_predicates): Update predicate based on post-dominating
+ 	relationship.
+ 	(analyze_function_body): Calculate post-dominating information.
+ 
+ 2019-09-19  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vectorizer.h (vectorizable_condition): Take an int
+ 	reduction index instead of a boolean flag.
+ 	* tree-vect-stmts.c (vectorizable_condition): Likewise.
+ 	Swap the "then" and "else" values for EXTRACT_LAST_REDUCTION
+ 	reductions if the reduction accumulator is the "then" rather
+ 	than the "else" value.
+ 	(vect_analyze_stmt): Update call accordingly.
+ 	(vect_transform_stmt): Likewise.
+ 	* tree-vect-loop.c (vectorizable_reduction): Likewise,
+ 	asserting that the index is > 0.
+ 
+ 2019-09-19  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf.c (sort_sem_items_by_decl_uid): Simplify comparator.
+ 	(sort_congruence_classes_by_decl_uid): Likewise.
+ 	(sort_congruence_class_groups_by_decl_uid): Use std::pair for
+ 	easier sorting.
+ 	(sem_item_optimizer::merge_classes): Likewise.
+ 
+ 2019-09-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91812
+ 	* tree-ssa-phiprop.c (propagate_with_phi): Do not replace
+ 	volatile loads.
+ 
+ 2019-09-19  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* defaults.h (TARGET_UNIT): New macro.
+ 	(target_unit): New type.
+ 	* rtl.h (native_encode_rtx, native_decode_rtx)
+ 	(native_decode_vector_rtx, subreg_size_lsb): Declare.
+ 	(subreg_lsb_1): Turn into an inline wrapper around subreg_size_lsb.
+ 	* rtlanal.c (subreg_lsb_1): Delete.
+ 	(subreg_size_lsb): New function.
+ 	* simplify-rtx.c: Include rtx-vector-builder.h
+ 	(simplify_immed_subreg): Delete.
+ 	(native_encode_rtx, native_decode_vector_rtx, native_decode_rtx)
+ 	(simplify_const_vector_byte_offset, simplify_const_vector_subreg): New
+ 	functions.
+ 	(simplify_subreg): Use them.
+ 	(test_vector_subregs_modes, test_vector_subregs_repeating)
+ 	(test_vector_subregs_fore_back, test_vector_subregs_stepped)
+ 	(test_vector_subregs): New functions.
+ 	(test_vector_ops): Call test_vector_subregs for integer vector
+ 	modes with at least 2 elements.
+ 
+ 2019-09-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-parloops.c (parloops_is_slp_reduction): Do not set
+ 	LOOP_VINFO_OPERANDS_SWAPPED.
+ 	(parloops_is_simple_reduction): Likewise.
+ 	* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Do not
+ 	initialize operands_swapped.
+ 	(_loop_vec_info::~_loop_vec_info): Do not re-canonicalize stmts.
+ 	(vect_is_slp_reduction): Do not swap operands.
+ 	* tree-vectorizer.h (_loop_vec_info::operands_swapped): Remove.
+ 	(LOOP_VINFO_OPERANDS_SWAPPED): Likewise.
+ 
+ 2019-09-19  Hongtao Liu <hongtao.liu@intel.com>
+ 
+ 	PR target/87007
+ 	* config/i386.md (*floatuns<SWI48:mode><MODEF:mode>2_avx512):
+ 	Add avx_partial_xmm_update.
+ 
+ 2019-09-18  Jim Wilson  <jimw@sifive.com>
+ 
+ 	PR target/91683
+ 	* config/riscv/riscv-protos.h (riscv_split_symbol): New bool parameter.
+ 	(riscv_move_integer): Likewise.
+ 	* config/riscv/riscv.c (riscv_split_integer): Pass FALSE for new
+ 	riscv_move_integer arg.
+ 	(riscv_legitimize_move): Likewise.
+ 	(riscv_force_temporary): New parameter in_splitter.  Don't call
+ 	force_reg if true.
+ 	(riscv_unspec_offset_high): Pass FALSE for new riscv_force_temporary
+ 	arg.
+ 	(riscv_add_offset): Likewise.
+ 	(riscv_split_symbol): New parameter in_splitter.  Pass to
+ 	riscv_force_temporary.
+ 	(riscv_legitimize_address): Pass FALSE for new riscv_split_symbol
+ 	arg.
+ 	(riscv_move_integer): New parameter in_splitter.  New local
+ 	can_create_psuedo.  Don't call riscv_split_integer or force_reg when
+ 	in_splitter TRUE.
+ 	(riscv_legitimize_const_move): Pass FALSE for new riscv_move_integer,
+ 	riscv_split_symbol, and riscv_force_temporary args.
+ 	* config/riscv/riscv.md (low<mode>+1): Pass TRUE for new
+ 	riscv_move_integer arg.
+ 	(low<mode>+2): Pass TRUE for new riscv_split_symbol arg.
+ 
+ 2019-09-18  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/90878
+ 	* config/i386/x86-tune-costs.h (skylake_cost): Restore SImode
+ 	hard register store cost to 6.
+ 
+ 2019-09-18  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/91446
+ 	* config/i386/x86-tune-costs.h (skylake_cost): Increase SImode
+ 	pseudo register store cost from 3 to 6 to make it the same as
+ 	QImode and HImode.
+ 
+ 2019-09-18  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	PR target/91738
+ 	* config/arm/arm.md (<logical_op>di3): Expand explicitly.
+ 	(one_cmpldi2): Likewise.
+ 	* config/arm/arm.c (const_ok_for_dimode_op): Return true if one
+ 	of the constant parts is simple.
+ 	* config/arm/iterators.md (LOGICAL): Add new code iterator.
+ 	(logical_op): Add new code attribute.
+ 	(logical_OP): Likewise.
+ 	* config/arm/predicates.md (arm_anddi_operand): Add predicate.
+ 	(arm_iordi_operand): Add predicate.
+ 	(arm_xordi_operand): Add predicate.
+ 
+ 2019-09-18  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/arm.md (maddsidi4): Remove expander.
+ 	(mulsidi3adddi): Remove pattern.
+ 	(mulsidi3adddi_v6): Likewise.
+ 	(mulsidi3_nov6): Likewise.
+ 	(mulsidi3_v6): Likewise.
+ 	(umulsidi3): Remove expander.
+ 	(umulsidi3_nov6): Remove pattern.
+ 	(umulsidi3_v6): Likewise.
+ 	(umulsidi3adddi): Likewise.
+ 	(umulsidi3adddi_v6): Likewise.
+ 	(<Us>mulsidi3): Add combined expander.
+ 	(<Us>maddsidi4): Likewise.
+ 	(<US>mull): Add combined umull and smull pattern.
+ 	(<US>mlal): Likewise.
+ 	* config/arm/iterators.md (Us): Add new iterator.
+ 
+ 2019-09-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (vect_is_simple_reduction): Remove operand
+ 	swapping.
+ 	(vectorize_fold_left_reduction): Remove assert.
+ 	(vectorizable_reduction): Also expect COND_EXPR non-reduction
+ 	operand in position 2.  Remove assert.
+ 
+ 2019-09-18  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/arm.md (smulsi3_highpart): Use <US> and <SE> iterators.
+ 	(smulsi3_highpart_nov6): Remove pattern.
+ 	(smulsi3_highpart_v6): Likewise.
+ 	(umulsi3_highpart): Likewise.
+ 	(umulsi3_highpart_nov6): Likewise.
+ 	(umulsi3_highpart_v6): Likewise.
+ 	(<US>mull_high): Add new combined multiply pattern.
+ 
+ 2019-09-18  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/arm.md (arm_mulsi3): Remove pattern.
+ 	(arm_mulsi3_v6): Likewise.
+ 	(mulsi3addsi_v6): Likewise.
+ 	(mulsi3subsi): Likewise.
+ 	(mul): Add new multiply pattern.
+ 	(mla): Likewise.
+ 	(mls): Likewise.
+ 
+ 2019-09-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-parloops.c (report_ploop_op): Copy from report_vect_op.
+ 	(parloops_valid_reduction_input_p): Copy from
+ 	valid_reduction_input_p.
+ 	(parloops_is_slp_reduction): Copy from vect_is_slp_reduction.
+ 	(parloops_needs_fold_left_reduction_p): Copy from
+ 	needs_fold_left_reduction_p.
+ 	(parloops_is_simple_reduction): Copy from
+ 	vect_is_simple_reduction.
+ 	(parloops_force_simple_reduction): Copy from
+ 	vect_force_simple_reduction.
+ 	(gather_scalar_reductions): Adjust.
+ 	* tree-vect-loop.c (vect_force_simple_reduction): Make static.
+ 	* tree-vectorizer.h (vect_force_simple_reduction): Remove.
+ 
+ 2019-09-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vectorizer.h (get_initial_def_for_reduction): Remove.
+ 	* tree-vect-loop.c (get_initial_def_for_reduction): Make
+ 	static.
+ 	(vect_create_epilog_for_reduction): Remove dead code.
+ 
+ 2019-09-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* varasm.c (assemble_real): Generate canonical const_ints.
+ 
+ 2019-09-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR lto/91763
+ 	* lto-streamer-in.c (input_eh_regions): Move EH init to
+ 	lto_materialize_function.
+ 	* tree-streamer-in.c (lto_input_ts_function_decl_tree_pointers):
+ 	Likewise.
+ 
+ 2019-09-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-ssa-ccp.c (get_value_for_expr): Check whether CONSTANTs
+ 	are INTEGER_CSTs.
+ 
+ 2019-09-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* gimplify.c (gimplify_decl_expr): Use poly_int_tree_p instead
+ 	of checking specifically for INTEGER_CST.
+ 
+ 2019-09-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* stor-layout.c (compute_record_mode): Operate on poly_uint64
+ 	sizes instead of uhwi sizes.
+ 
+ 2019-09-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* dwarf2out.c (loc_list_from_tree_1): Handle POLY_INT_CST.
+ 	(add_const_value_attribute): Handle CONST_POLY_INT.
+ 
+ 2019-09-18  Martin Liska  <mliska@suse.cz>
+ 
+ 	* dbgcnt.def (store_merging): New counter.
+ 	* gimple-ssa-store-merging.c (imm_store_chain_info::output_merged_stores):
+ 	Use it in store merging.
+ 
+ 2019-09-17  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_sched_variable_issue): New
+ 	function.
+ 	(TARGET_SCHED_VARIABLE_ISSUE): New macro.
+ 	* config/arm/arm.c (arm_sched_variable_issue): New function.
+ 	(TARGET_SCHED_VARIABLE_ISSUE): New macro.
+ 
+ 2019-09-17  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/arm/types.md (no_reservation): New reservation.
+ 	* config/aarch64/falkor.md (falkor_other_0_nothing): Don't handle
+ 	no_insn here.
+ 	* config/aarch64/saphira.md (saphira_other_0_nothing): Likewise.
+ 	* config/aarch64/thunderx2t99.md (thunderx2t99_nothing): Likewise.
+ 	* config/aarch64/tsv110.md (tsv110_alu): Likewise.
+ 	* config/arm/arm1020e.md (1020alu_op): Likewise.
+ 	* config/arm/arm1026ejs.md (alu_op): Likewise.
+ 	* config/arm/arm1136jfs.md (11_alu_op): Likewise.
+ 	* config/arm/arm926ejs.md (9_alu_op): Likewise.
+ 	* config/arm/cortex-a15.md (cortex_a15_alu): Likewise.
+ 	* config/arm/cortex-a17.md (cortex_a17_alu): Likewise.
+ 	* config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
+ 	* config/arm/cortex-a53.md (cortex_a53_alu): Likewise.
+ 	* config/arm/cortex-a57.md (cortex_a57_alu): Likewise.
+ 	* config/arm/cortex-a7.md (cortex_a7_alu_shift): Likewise.
+ 	* config/arm/cortex-a8.md (cortex_a8_alu): Likewise.
+ 	* config/arm/cortex-a9.md (cortex_a9_dp): Likewise.
+ 	* config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
+ 	* config/arm/cortex-m7.md (cortex_m7_alu_simple): Likewise.
+ 	* config/arm/cortex-r4.md (cortex_r4_alu_shift_reg): Likewise.
+ 	* config/arm/fa526.md (526_alu_op): Likewise.
+ 	* config/arm/fa606te.md (606te_alu_op): Likewise.
+ 	* config/arm/fa626te.md (626te_alu_op): Likewise.
+ 	* config/arm/fa726te.md (726te_alu_op): Likewise.
+ 	* config/arm/xgene1.md (xgene1_nop): Likewise.
+ 
+ 2019-09-17  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/arm/thumb1.md (*thumb1_tablejump): Change type from
+ 	"no_insn" to "branch".
+ 
+ 2019-09-17  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* array-traits.h (array_traits<T[N]>::size): Remove parameter name.
+ 
+ 2019-09-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/91772
+ 	* dwarf2out.c (dwarf2out_late_global_decl): If early dwarf
+ 	was missing generate locations only once.
+ 
+ 2019-09-17  Feng Xue  <fxue@os.amperecomputing.com>
+ 
+ 	PR ipa/91089
+ 	* doc/invoke.texi (ipa-max-switch-predicate-bounds): Document new
+ 	option.
+ 	* params.def (PARAM_IPA_MAX_SWITCH_PREDICATE_BOUNDS): New.
+ 	* ipa-fnsummary.c (set_switch_stmt_execution_predicate): Add predicate
+ 	for switch default case using range analysis information.
+ 
+ 2019-09-17  Christophe Lyon  <christophe.lyon@linaro.org>
+ 
+ 	PR target/91749
+ 	* config/arm/arm.c (arm_valid_target_attribute_rec): Make sure the
+ 	mode attributed is supported by FDPIC.
+ 
+ 2019-09-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91790
+ 	* tree-vect-stmts.c (vectorizable_load): For BB vectorization
+ 	use the correct DR for setting up realignment.
+ 
+ 2019-09-16  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/91719
+ 	* config/i386/i386.h (TARGET_USE_XCHG_FOR_ATOMIC_STORE): New macro.
+ 	* config/i386/x86-tune.def (X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE): New.
+ 	* config/i386/sync.md (atomic_store<mode>): emit XCHG for
+ 	TARGET_USE_XCHG_FOR_ATOMIC_STORE.
+ 
+ 2019-09-16  Jason Merrill  <jason@redhat.com>
+ 
+ 	* Makefile.in (build/genmatch.o): Depend on $(CPPLIB_H).
+ 
+ 2019-09-16  Martin Liska  <mliska@suse.cz>
+ 
+ 	* gimple-fold.c (or_comparisons_1): Remove rules moved
+ 	to ...
+ 	* match.pd: ... here.
+ 
+ 2019-09-16  Martin Liska  <mliska@suse.cz>
+ 
+ 	* gimple-fold.c (or_comparisons_1): Remove rules
+ 	moved to ...
+ 	* match.pd: ... here.
+ 
+ 2019-09-16  Martin Liska  <mliska@suse.cz>
+ 
+ 	* genmatch.c (dt_node::append_simplify): Do not print
+ 	warning when we have duplicate patterns belonging
+ 	to a same simplify rule.
+ 	* gimple-fold.c (and_comparisons_1): Remove matching moved to match.pd.
+ 	(maybe_fold_comparisons_from_match_pd): Handle
+ 	tcc_comparison as a results.
+ 	* match.pd: Handle (X == CST1) && (X OP2 CST2) conditions.
+ 
+ 2019-09-16  Li Jia He  <helijia@linux.ibm.com>
+ 	    Qi Feng  <ffengqi@linux.ibm.com>
+ 
+ 	PR middle-end/88784
+ 	* match.pd (x >  y  &&  x != XXX_MIN): Optimize into 'x > y'.
+ 	(x >  y  &&  x == XXX_MIN): Optimize into 'false'.
+ 	(x <= y  &&  x == XXX_MIN): Optimize into 'x == XXX_MIN'.
+ 	(x <  y  &&  x != XXX_MAX): Optimize into 'x < y'.
+ 	(x <  y  &&  x == XXX_MAX): Optimize into 'false'.
+ 	(x >= y  &&  x == XXX_MAX): Optimize into 'x == XXX_MAX'.
+ 	(x >  y  ||  x != XXX_MIN): Optimize into 'x != XXX_MIN'.
+ 	(x <= y  ||  x != XXX_MIN): Optimize into 'true'.
+ 	(x <= y  ||  x == XXX_MIN): Optimize into 'x <= y'.
+ 	(x <  y  ||  x != XXX_MAX): Optimize into 'x != XXX_MAX'.
+ 	(x >= y  ||  x != XXX_MAX): Optimize into 'true'.
+ 	(x >= y  ||  x == XXX_MAX): Optimize into 'x >= y'.
+ 
+ 2019-09-16  Li Jia He  <helijia@linux.ibm.com>
+ 	    Martin Liska  <mliska@suse.cz>
+ 
+ 	* gimple-fold.c (and_comparisons_1): Add type as first
+ 	argument.
+ 	(and_var_with_comparison): Likewise.
+ 	(and_var_with_comparison_1): Likewise.
+ 	(or_comparisons_1): Likewise.
+ 	(or_var_with_comparison): Likewise.
+ 	(or_var_with_comparison_1): Likewise.
+ 	(maybe_fold_and_comparisons): Call maybe_fold_comparisons_from_match_pd.
+ 	(maybe_fold_or_comparisons): Likewise.
+ 	(maybe_fold_comparisons_from_match_pd): New.
+ 	* gimple-fold.h (maybe_fold_and_comparisons): Add type argument.
+ 	(maybe_fold_or_comparisons): Likewise.
+ 	* gimple.c (gimple_size): Make it public and add num_ops argument.
+ 	(gimple_init): New function.
+ 	(gimple_alloc): Call gimple_init.
+ 	* gimple.h (gimple_size): New.
+ 	(gimple_init): Likewise.
+ 	* tree-if-conv.c (fold_or_predicates): Pass type.
+ 	* tree-ssa-ifcombine.c (ifcombine_ifandif): Likewise.
+ 	* tree-ssa-reassoc.c (eliminate_redundant_comparison): Likewise.
+ 	(optimize_vec_cond_expr): Likewise.
+ 	(ovce_extract_ops): Return type of conditional expression.
+ 	* tree-ssanames.c (init_ssa_name_imm_use): New.
+ 	(make_ssa_name_fn): Use init_ssa_name_imm_use.
+ 	* tree-ssanames.h (init_ssa_name_imm_use): New.
+ 
+ 2019-09-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91756
+ 	PR tree-optimization/87132
+ 	* tree-ssa-alias.h (enum translate_flags): New.
+ 	(get_continuation_for_phi): Use it instead of simple bool flag.
+ 	(walk_non_aliased_vuses): Likewise.
+ 	* tree-ssa-alias.c (maybe_skip_until): Adjust.
+ 	(get_continuation_for_phi): When looking across backedges only
+ 	disallow valueization.
+ 	(walk_non_aliased_vuses): Adjust.
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Avoid valueization
+ 	if requested.
+ 
+ 2019-09-14  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	PR middle-end/80791
+ 	* config/rs6000/rs6000.c (TARGET_HAVE_COUNT_REG_DECR_P): New macro.
+ 	(TARGET_DOLOOP_COST_FOR_GENERIC): Likewise.
+ 	(TARGET_DOLOOP_COST_FOR_ADDRESS): Likewise.
+ 	* target.def (have_count_reg_decr_p): New hook.
+ 	(doloop_cost_for_generic): Likewise.
+ 	(doloop_cost_for_address): Likewise.
+ 	* doc/tm.texi.in (TARGET_HAVE_COUNT_REG_DECR_P): Likewise.
+ 	(TARGET_DOLOOP_COST_FOR_GENERIC): Likewise.
+ 	(TARGET_DOLOOP_COST_FOR_ADDRESS): Likewise.
+ 	* doc/tm.texi: Regenerate.
+ 	* tree-ssa-loop-ivopts.c (comp_cost::operator+=): Consider infinite cost
+ 	addend.
+ 	(record_group): Init doloop_p.
+ 	(add_candidate_1): Add optional argument doloop, change the handlings
+ 	accordingly.
+ 	(add_candidate): Likewise.
+ 	(generic_predict_doloop_p): Update attribute.
+ 	(force_expr_to_var_cost): Add costing for expressions COND_EXPR/LT_EXPR/
+ 	LE_EXPR/GT_EXPR/GE_EXPR/EQ_EXPR/NE_EXPR/UNORDERED_EXPR/ORDERED_EXPR/
+ 	UNLT_EXPR/UNLE_EXPR/UNGT_EXPR/UNGE_EXPR/UNEQ_EXPR/LTGT_EXPR/MAX_EXPR/
+ 	MIN_EXPR.
+ 	(get_computation_cost): Update for doloop IV cand extra cost.
+ 	(determine_group_iv_cost_cond): Update for doloop IV cand.
+ 	(determine_iv_cost): Likewise.
+ 	(ivopts_estimate_reg_pressure): Likewise.
+ 	(may_eliminate_iv): Update handlings for doloop IV cand.
+ 	(add_iv_candidate_for_doloop): New function.
+ 	(find_iv_candidates): Call function add_iv_candidate_for_doloop.
+ 	(iv_ca_set_no_cp): Update for doloop IV cand.
+ 	(iv_ca_set_cp): Likewise.
+ 	(iv_ca_dump): Dump register cost.
+ 	(find_doloop_use): New function.
+ 	(analyze_and_mark_doloop_use): Likewise.
+ 	(tree_ssa_iv_optimize_loop): Call function analyze_and_mark_doloop_use.
+ 
+ 2019-09-13  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	PR middle-end/91708
+ 	* cse.c (cse_insn): Do not replace anything with a
+ 	MEM.
+ 
+ 2019-09-13  Ian Lance Taylor  <iant@golang.org>
+ 
+ 	* doc/invoke.texi (Optimize Options): Fix typo.
+ 
+ 2019-09-12  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR tree-optimization/89386
+ 	* config/i386/sse.md (smulhrs<mode>3): New expander.
+ 	(smulhrsv4hi3): Ditto.
+ 
+ 2019-09-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91750
+ 	* tree-vect-loop.c (vectorizable_induction): Compute IV increments
+ 	in the type of the evolution.
+ 
+ 2019-09-12  Yuliang Wang  <yuliang.wang@arm.com>
+ 
+ 	PR tree-optimization/89386
+ 	* config/aarch64/aarch64-sve2.md (<su>mull<bt><Vwide>)
+ 	(<r>shrnb<mode>, <r>shrnt<mode>): New SVE2 patterns.
+ 	(<su>mulh<r>s<mode>3): New pattern for MULHRS.
+ 	* config/aarch64/iterators.md (UNSPEC_SMULLB, UNSPEC_SMULLT)
+ 	(UNSPEC_UMULLB, UNSPEC_UMULLT, UNSPEC_SHRNB, UNSPEC_SHRNT)
+ 	(UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SMULHS, UNSPEC_SMULHRS)
+ 	UNSPEC_UMULHS, UNSPEC_UMULHRS): New unspecs.
+ 	(MULLBT, SHRNB, SHRNT, MULHRS): New int iterators.
+ 	(su, r): Handle the unspecs above.
+ 	(bt): New int attribute.
+ 	* internal-fn.def (IFN_MULHS, IFN_MULHRS): New internal functions.
+ 	* internal-fn.c (first_commutative_argument): Commutativity info for
+ 	above.
+ 	* optabs.def (smulhs_optab, smulhrs_optab, umulhs_optab)
+ 	(umulhrs_optab): New optabs.
+ 	* doc/md.texi (smulhs$var{m3}, umulhs$var{m3})
+ 	(smulhrs$var{m3}, umulhrs$var{m3}): Documentation for the above.
+ 	* tree-vect-patterns.c (vect_recog_mulhs_pattern): New pattern
+ 	function.
+ 	(vect_vect_recog_func_ptrs): Add it.
+ 
+ 2019-09-11  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/predicates.md (non_add_cint_operand): Simplify the
+ 	code.
+ 
+ 2019-09-11  Nathan Sidwell  <nathan@acm.org>
+ 
+ 	* tree.h (MARK_TS_TYPE_NON_COMMON): New.
+ 	* tree.c (tree_node_structure_for_code): Reformat and alphabetize.
+ 
+ 2019-09-11  Richard Biener  <rguenther@suse.de>
+ 
+ 	* lto-opts.c (lto_write_options): Stream -g when debug is enabled.
+ 	* lto-wrapper.c (merge_and_complain): Pick up -g.
+ 	(append_compiler_options): Likewise.
+ 	(run_gcc): Re-instantiate handling -g0 at link-time.
+ 	* doc/invoke.texi (flto): Document debug info generation.
+ 
+ 2019-09-11  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90387
+ 	* vr-values.c (vr_values::extract_range_basic): After inlining
+ 	simplify non-constant __builtin_constant_p to false.
+ 
+ 2019-09-11  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR rtl-optimization/89795
+ 	* rtlanal.c (nonzero_bits1) <SUBREG>: Do not propagate results from
+ 	inner REGs to paradoxical SUBREGs if WORD_REGISTER_OPERATIONS is set.
+ 
+ 2019-09-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/91723
+ 	* tree-vect-stmts.c (vectorizable_call): Use types_compatible_p check
+ 	instead of pointer equality when checking if argument vectypes are
+ 	the same.
+ 
+ 	PR middle-end/91725
+ 	* match.pd ((A / (1 << B)) -> (A >> B)): Call tree_nonzero_bits instead
+ 	of get_nonzero_bits, only call it for integral types.
+ 
+ 2019-09-11  Richard Biener  <rguenther@suse.de>
+ 
+ 	Revert
+ 	2019-09-09  Barnaby Wilks  <barnaby.wilks@arm.com>
+ 
+ 	* match.pd: Add flag_unsafe_math_optimizations check
+ 	before deciding on the widest type in a binary math operation.
+ 
+ 2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* doc/tm.texi.in: Document that exactly one of CALL_USED_REGISTERS
+ 	and CALL_REALLY_USED_REGISTERS must be defined, and that
+ 	CALL_REALLY_USED_REGISTERS is preferred.
+ 	* doc/tm.texi: Regenerate.
+ 	* hard-reg-set.h (target_hard_regs::x_call_really_used_regs): Delete.
+ 	(call_really_used_regs): Likewise.
+ 	* reginfo.c: Raise an #error if both CALL_USED_REGISTERS and
+ 	CALL_REALLY_USED_REGISTERS are defined.
+ 	(initial_call_used_regs): Use CALL_REALLY_USED_REGISTERS as the
+ 	initial value if defined.
+ 	(initial_call_really_used_regs): Delete.
+ 	(saved_call_really_used_regs): Likewise.
+ 	(CALL_REALLY_USED_REGNO_P): Likewise.
+ 	(init_reg_sets): Remove handling of call_really_used_regs.
+ 	(save_register_info, restore_register_info, globalize_reg): Likewise.
+ 	(init_reg_sets_1): Likewise.  Use call_used_regs instead of
+ 	CALL_REALLY_USED_REGNO_P.  Don't set call_used_regs for registers
+ 	outside operand_reg_set.
+ 	(fix_register): Don't change call_used_regs if
+ 	CALL_REALLY_USED_REGISTERS is defined.
+ 	* config/csky/csky.h (CALL_USED_REGISTERS): Delete.
+ 	* config/csky/csky.c (get_csky_live_regs): Use call_used_regs
+ 	instead of call_really_used_regs.
+ 	(csky_conditional_register_usage): Remove the old handling of
+ 	call_used_regs and change the handling of call_really_used_regs
+ 	to use call_used_regs instead.
+ 	* config/ia64/ia64.h (CALL_USED_REGISTERS): Delete.
+ 	* config/ia64/ia64.c (fix_range): Don't set call_used_regs when
+ 	making a register fixed.
+ 	* config/m32r/m32r.h (CALL_USED_REGISTERS): Delete.
+ 	* config/m32r/m32r.c (MUST_SAVE_REGISTER): Use call_used_regs
+ 	instead of call_really_used_regs.
+ 	(m32r_conditional_register_usage): Don't set call_used_regs when
+ 	making a register fixed.
+ 	* config/mips/mips.h (CALL_USED_REGISTERS): Delete.
+ 	* config/mips/mips.c (mips_global_pointer): Use call_used_regs
+ 	instead of call_really_used_regs.
+ 	(mips_interrupt_extra_call_saved_reg_p): Likewise.
+ 	(mips_cfun_call_saved_reg_p): Likewise.
+ 	(mips_swap_registers): Remove the old handling of call_used_regs
+ 	and change the handling of call_really_used_regs to use call_used_regs
+ 	instead.
+ 	(mips_conditional_register_usage): Likewise.
+ 	* config/mn10300/mn10300.h (CALL_USED_REGISTERS): Delete.
+ 	* config/mn10300/mn10300.c (fp_regs_to_save): Use call_used_regs
+ 	instead of call_really_used_regs.
+ 	(mn10300_get_live_callee_saved_regs): Likewise.
+ 	(mn10300_expand_prologue, mn10300_expand_epilogue): Likewise.
+ 	(mn10300_conditional_register_usage): Don't set call_used_regs when
+ 	making a register fixed.
+ 	* config/rs6000/rs6000.h (CALL_USED_REGISTERS): Delete.
+ 	* config/rs6000/rs6000.c (rs6000_conditional_register_usage):
+ 	Remove the old handling of call_used_regs and change the handling
+ 	of call_really_used_regs to use call_used_regs instead.
+ 	* config/s390/s390.h (CALL_USED_REGISTERS): Delete.
+ 	* config/s390/s390.c (s390_regs_ever_clobbered): Use call_used_regs
+ 	instead of call_really_used_regs.
+ 	(s390_register_info_gprtofpr, s390_register_info): Likewise.
+ 	(s390_hard_regno_rename_ok, s390_hard_regno_scratch_ok): Likewise.
+ 	(s390_emit_prologue, s300_set_up_by_prologue): Likewise.
+ 	(s390_can_use_return_insn, s390_optimize_prologue): Likewise.
+ 	(s390_conditional_register_usage): Remove the old handling of
+ 	call_used_regs and change the handling of call_really_used_regs
+ 	to use call_used_regs instead.
+ 	* config/sh/sh.h (CALL_USED_REGISTERS): Delete.
+ 	* config/sh/sh.c (output_stack_adjust, calc_live_regs): Likewise.
+ 	(sh_fix_range, reg_unused_after): Likewise.
+ 	(sh_conditional_register_usage): Remove the old handling of
+ 	call_used_regs and change the handling of call_really_used_regs
+ 	to use call_used_regs instead.
+ 	* config/sparc/sparc.h (CALL_USED_REGISTERS): Delete.
+ 	* config/sparc/sparc.c (sparc_conditional_register_usage): Don't set
+ 	call_used_regs when making a register fixed.
+ 	* config/tilegx/tilegx.h (CALL_USED_REGISTERS): Delete.
+ 	* config/tilegx/tilegx.c (tilegx_conditional_register_usage): Don't set
+ 	call_used_regs when making a register fixed.
+ 	* config/tilepro/tilepro.h (CALL_USED_REGISTERS): Delete.
+ 	* config/tilepro/tilepro.c (tilepro_conditional_register_usage): Don't
+ 	set call_used_regs when making a register fixed.
+ 	* config/visium/visium.h (CALL_USED_REGISTERS): Delete.
+ 	* config/visium/visium.c (visium_conditional_register_usage): Remove
+ 	the old handling of call_used_regs and change the handling of
+ 	call_really_used_regs to use call_used_regs instead.
+ 
+ 2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (call_used_regs): Only define if IN_TARGET_CODE.
+ 	(call_used_or_fixed_reg_p): Expand definition of call_used_regs.
+ 	* reginfo.c (call_used_regs): New macro.
+ 
+ 2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/alpha/alpha.c (alpha_compute_frame_layout): Remove redundant
+ 	fixed_regs test.
+ 	* config/bpf/bpf.c (bpf_compute_frame_layout, bpf_expand_prologue)
+ 	(bpf_expand_epilogue): Likewise.
+ 	* config/c6x/c6x.c (c6x_save_reg): Likewise.
+ 	* config/ft32/ft32.c (ft32_expand_prologue): Likewise.
+ 	(ft32_expand_epilogue): Likewise.
+ 	* config/i386/i386.c (ix86_save_reg): Likewise.
+ 	* config/moxie/moxie.c (moxie_expand_prologue): Likewise.
+ 	(moxie_expand_epilogue): Likewise.
+ 	* config/tilegx/tilegx.c (need_to_save_reg): Likewise.
+ 	* config/tilepro/tilepro.c (need_to_save_reg): Likewise.
+ 	* config/xtensa/xtensa.c (xtensa_call_save_reg): Likewise.
+ 
+ 2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (call_used_or_fixed_reg_p): New macro.
+ 	* cfgloopanal.c (init_set_costs): Use call_used_or_fixed_reg_p
+ 	instead of testing call_used_regs directly.
+ 	* config/aarch64/aarch64.c (aarch64_layout_frame): Likewise.
+ 	(aarch64_components_for_bb): Likewise.
+ 	* config/alpha/alpha.c (alpha_compute_frame_layout): Likewise.
+ 	* config/arc/arc.c (arc_must_save_register): Likewise.
+ 	(arc_epilogue_uses): Likewise.
+ 	* config/arm/arm.c (arm_option_override, use_return_insn): Likewise.
+ 	(legitimize_pic_address, callee_saved_reg_p): Likewise.
+ 	(arm_compute_save_reg0_reg12_mask): Likewise.
+ 	(arm_compute_save_core_reg_mask): Likewise.
+ 	(arm_get_vfp_saved_size, arm_compute_frame_layout): Likewise.
+ 	(arm_save_coproc_regs, thumb1_extra_regs_pushed): Likewise.
+ 	(cmse_nonsecure_entry_clear_before_return): Likewise.
+ 	(thumb1_expand_epilogue, arm_expand_epilogue_apcs_frame): Likewise.
+ 	(arm_expand_epilogue): Likewise.
+ 	* config/avr/avr.c (avr_regs_to_save, sequent_regs_live): Likewise.
+ 	(avr_function_arg_advance, avr_find_unused_d_reg): Likewise.
+ 	(_reg_unused_after): Likewise.
+ 	* config/bfin/bfin.c (must_save_p, expand_prologue_reg_save): Likewise.
+ 	(expand_epilogue_reg_restore, n_regs_saved_by_prologue): Likewise.
+ 	(add_to_reg, hwloop_optimize): Likewise.
+ 	* config/bpf/bpf.c (bpf_compute_frame_layout, bpf_expand_prologue)
+ 	(bpf_expand_epilogue): Likewise.
+ 	* config/c6x/c6x.c (c6x_save_reg, c6x_regno_reg_class): Likewise.
+ 	* config/cr16/cr16.c (cr16_compute_save_regs): Likewise.
+ 	* config/cris/cris.c (cris_reg_saved_in_regsave_area): Likewise.
+ 	* config/epiphany/epiphany.c (epiphany_init_reg_tables): Likewise.
+ 	(epiphany_compute_function_type, MUST_SAVE_REGISTER): Likewise.
+ 	(epiphany_output_mi_thunk, epiphany_start_function): Likewise.
+ 	* config/fr30/fr30.c (fr30_num_arg_regs): Likewise.
+ 	* config/frv/frv.c (frv_stack_info): Likewise.
+ 	* config/ft32/ft32.c (ft32_compute_frame): Likewise.
+ 	(ft32_expand_prologue, ft32_expand_epilogue): Likewise.
+ 	* config/gcn/gcn.c (gcn_compute_frame_offsets): Likewise.
+ 	(move_callee_saved_registers): Likewise.
+ 	* config/h8300/h8300.c (byte_reg): Likewise.
+ 	* config/i386/i386-options.c (ix86_set_current_function): Likewise.
+ 	* config/i386/i386.c (ix86_save_reg, ix86_expand_prologue): Likewise.
+ 	(ix86_expand_epilogue, x86_order_regs_for_local_alloc): Likewise.
+ 	* config/i386/predicates.md (sibcall_memory_operand): Likewise.
+ 	* config/ia64/ia64.c (emit_safe_across_calls, find_gr_spill): Likewise.
+ 	(next_scratch_gr_reg, ia64_compute_frame_size): Likewise.
+ 	* config/iq2000/iq2000.h (MUST_SAVE_REGISTER): Likewise.
+ 	* config/lm32/lm32.c (lm32_compute_frame_size): Likewise.
+ 	* config/m32c/m32c.c (need_to_save): Likewise.
+ 	* config/m68k/m68k.c (m68k_save_reg): Likewise.
+ 	* config/mcore/mcore.c (calc_live_regs): Likewise.
+ 	* config/microblaze/microblaze.c (microblaze_must_save_register):
+ 	Likewise.
+ 	* config/mmix/mmix.c (mmix_local_regno): Likewise.
+ 	(mmix_initial_elimination_offset, mmix_reorg): Likewise.
+ 	(mmix_use_simple_return, mmix_expand_prologue): Likewise.
+ 	(mmix_expand_epilogue): Likewise.
+ 	* config/moxie/moxie.c (moxie_compute_frame): Likewise.
+ 	(moxie_expand_prologue, moxie_expand_epilogue): Likewise.
+ 	* config/msp430/msp430.c (msp430_preserve_reg_p): Likewise.
+ 	* config/nds32/nds32.h (nds32_16bit_address_type): Likewise.
+ 	(NDS32_REQUIRED_CALLEE_SAVED_P): Likewise.
+ 	* config/nios2/nios2.c (prologue_saved_reg_p): Likewise.
+ 	* config/or1k/or1k.c (callee_saved_regno_p): Likewise.
+ 	* config/pa/pa.c (pa_expand_prologue, pa_expand_epilogue): Likewise.
+ 	* config/pdp11/pdp11.c (pdp11_saved_regno): Likewise.
+ 	* config/pru/pru.c (prologue_saved_reg_p): Likewise.
+ 	* config/riscv/riscv.c (riscv_save_reg_p): Likewise.
+ 	(riscv_epilogue_uses, riscv_hard_regno_mode_ok): Likewise.
+ 	* config/rl78/rl78.c (need_to_save): Likewise.
+ 	* config/rs6000/rs6000-logue.c (save_reg_p): Likewise.
+ 	(rs6000_stack_info, generate_set_vrsave): Likewise.
+ 	(rs6000_emit_prologue, rs6000_emit_epilogue): Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_print): Likewise.
+ 	* config/rx/rx.c (rx_get_stack_layout): Likewise.
+ 	* config/s390/s390.c (s390_call_saved_register_used): Likewise.
+ 	* config/sh/sh.c (calc_live_regs, sh_output_mi_thunk): Likewise.
+ 	* config/sparc/sparc.c (save_global_or_fp_reg_p): Likewise.
+ 	(save_local_or_in_reg_p): Likewise.
+ 	* config/stormy16/stormy16.c (REG_NEEDS_SAVE): Likewise.
+ 	(xstormy16_epilogue_uses): Likewise.
+ 	* config/tilegx/tilegx.c (need_to_save_reg): Likewise.
+ 	* config/tilepro/tilepro.c (need_to_save_reg): Likewise.
+ 	* config/v850/v850.c (compute_register_save_size): Likewise.
+ 	* config/vax/vax.c (vax_expand_prologue): Likewise.
+ 	* config/visium/visium.c (visium_save_reg_p): Likewise.
+ 	* config/xtensa/xtensa.c (xtensa_call_save_reg): Likewise.
+ 	* cselib.c (cselib_process_insn): Likewise.
+ 	* df-scan.c (df_get_entry_block_def_set): Likewise.
+ 	* function.c (aggregate_value_p): Likewise.
+ 	* haifa-sched.c (alloc_global_sched_pressure_data): Likewise.
+ 	* ira-lives.c (process_bb_node_lives): Likewise.
+ 	* ira.c (do_reload): Likewise.
+ 	* lra-lives.c (process_bb_lives): Likewise.
+ 	* lra-remat.c (lra_remat): Likewise.
+ 	* lra.c (lra): Likewise.
+ 	* postreload.c (reload_combine_recognize_pattern): Likewise.
+ 	(reload_cse_move2add): Likewise.
+ 	* recog.c (peep2_find_free_register): Likewise.
+ 	* regrename.c (check_new_reg_p): Likewise.
+ 	* reload.c (find_equiv_reg): Likewise.
+ 	* reload1.c (reload, find_reg): Likewise.
+ 	* sel-sched.c (init_hard_regs_data): Likewise.
+ 
+ 2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/frv/frv.c (frv_ifcvt_modify_tests): Use
+ 	regs_invalidated_by_call & ~fixed_reg_set instead of
+ 	call_used_or_fixed_regs & ~fixed_reg_set.
+ 	* config/sh/sh.c (output_stack_adjust): Likewise.
+ 
+ 2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (target_hard_regs::x_call_used_reg_set): Delete.
+ 	(call_used_reg_set): Delete.
+ 	(call_used_or_fixed_regs): New macro.
+ 	* reginfo.c (init_reg_sets_1, globalize_reg): Remove initialization
+ 	of call_used_reg_set.
+ 	* caller-save.c (setup_save_areas): Use call_used_or_fixed_regs
+ 	instead of call_used_regs.
+ 	(save_call_clobbered_regs): Likewise.
+ 	* cfgcleanup.c (old_insns_match_p): Likewise.
+ 	* config/c6x/c6x.c (c6x_call_saved_register_used): Likewise.
+ 	* config/epiphany/epiphany.c (epiphany_conditional_register_usage):
+ 	Likewise.
+ 	* config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
+ 	* config/sh/sh.c (output_stack_adjust): Likewise.
+ 	* final.c (collect_fn_hard_reg_usage): Likewise.
+ 	* ira-build.c (ira_build): Likewise.
+ 	* ira-color.c (calculate_saved_nregs): Likewise.
+ 	(allocno_reload_assign, calculate_spill_cost): Likewise.
+ 	* ira-conflicts.c (ira_build_conflicts): Likewise.
+ 	* ira-costs.c (ira_tune_allocno_costs): Likewise.
+ 	* ira-lives.c (process_bb_node_lives): Likewise.
+ 	* ira.c (setup_reg_renumber): Likewise.
+ 	* lra-assigns.c (find_hard_regno_for_1, lra_assign): Likewise.
+ 	* lra-constraints.c (need_for_call_save_p): Likewise.
+ 	(need_for_split_p, inherit_in_ebb): Likewise.
+ 	* lra-lives.c (process_bb_lives): Likewise.
+ 	* lra-remat.c (call_used_input_regno_present_p): Likewise.
+ 	* postreload.c (reload_combine): Likewise.
+ 	* regrename.c (find_rename_reg): Likewise.
+ 	* reload1.c (reload_as_needed): Likewise.
+ 	* rtlanal.c (find_all_hard_reg_sets): Likewise.
+ 	* sel-sched.c (mark_unavailable_hard_regs): Likewise.
+ 	* shrink-wrap.c (requires_stack_frame_p): Likewise.
+ 
+ 2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (target_hard_regs::x_no_caller_save_reg_set): Delete.
+ 	(no_caller_save_reg_set): Delete.
+ 	* caller-save.c (init_caller_save): Don't initialize it.
+ 	* ira-conflicts.c (ira_build_conflicts): Calculate
+ 	no_caller_save_reg_set locally from call_used_reg_set and savable_regs.
+ 
+ 2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (target_hard_regs::x_call_fixed_reg_set): Delete.
+ 	(target_hard_regs::x_savable_regs): New field.
+ 	(call_fixed_reg_set): Delete.
+ 	(savable_regs): New macro,
+ 	* reginfo.c (globalize_reg): Don't set call_fixed_reg_set.
+ 	(init_reg_sets_1): Likewise.  Initialize savable_regs.
+ 	* caller-save.c (init_caller_save): Invoke HARD_REGNO_CALLER_SAVE_MODE
+ 	for all registers.  Set savable_regs instead of call_fixed_reg_set.
+ 	(setup_save_areas, save_call_clobbered_regs): Replace uses of
+ 	~call_fixed_reg_set with ~fixed_reg_set & savable_regs.
+ 	* config/sh/sh.c (output_stack_adjust): Likewise.
+ 
+ 2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/c6x/c6x-protos.h (c6x_set_return_address): Declare.
+ 	* config/c6x/c6x.h (REGNO_REG_CLASS): Move implementation to
+ 	* config/c6x/c6x.c (c6x_regno_reg_class): ...this new function.
+ 
+ 2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* rtl.h (get_call_rtx_from): Take a const rtx_insn * instead of an rtx.
+ 	* rtlanal.c (get_call_rtx_from): Likewise.
+ 	* dwarf2out.c (dwarf2out_var_location): Pass the insn rather
+ 	than the pattern to get_call_rtx_from.
+ 	* config/i386/i386-expand.h (ix86_notrack_prefixed_insn_p): Take
+ 	an rtx_insn * instead of an rtx.
+ 	* config/i386/i386-expand.c (ix86_notrack_prefixed_insn_p): Likewise.
+ 
+ 2019-09-10  Martin Liska  <mliska@suse.cz>
+ 
+ 	* common.opt: Use newly added WarnRemoved.
+ 	* config/aarch64/aarch64.opt: Likewise.
+ 	* config/arm/arm.opt: Likewise.
+ 	* config/i386/i386.opt: Likewise.
+ 	* config/ia64/ia64.opt: Likewise.
+ 	* config/rs6000/rs6000.opt: Likewise.
+ 	* doc/options.texi: Document WarnRemoved properly.
+ 	* dwarf2out.c (gen_producer_string): Handle renamed
+ 	OPT_SPECIAL_warn_removed.
+ 	* lto-opts.c (lto_write_options): Likewise.
+ 	* lto-wrapper.c (merge_and_complain): Likewise.
+ 	* opts-common.c (decode_cmdline_option): Likewise.
+ 	(prune_options): Likewise.
+ 	(read_cmdline_option): Likewise.
+ 	(control_warning_option): Likewise.
+ 	* opts.c (print_filtered_help): Likewise.
+ 	* optc-gen.awk: Parse for WarnRemoved and make usage
+ 	of Deprecated an error.
+ 	* opth-gen.awk: Generate new OPT_SPECIAL_warn_removed.
+ 
+ 2019-09-10  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* doc/install.texi: Fix syntax for html generation.
+ 
+ 2019-09-10  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/91680
+ 	* match.pd ((A / (1 << B)) -> (A >> B)): Allow widening cast from
+ 	the shift type to type.
+ 
+ 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
+ 
+ 	* config/arm/arm.md (stack_protect_combined_set_insn): Handle
+ 	FDPIC mode.
+ 	(stack_protect_combined_test_insn): Likewise.
+ 
+ 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
+ 	    Mickaël Guêné <mickael.guene@st.com>
+ 
+ 	* config/arm/arm.c (arm_load_tp): Add FDPIC support.
+ 	* config/arm/arm.md (FDPIC_REGNUM): New constant.
+ 	(load_tp_soft_fdpic): New pattern.
+ 	(load_tp_soft): Disable in FDPIC mode.
+ 
+ 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
+ 	    Mickaël Guêné <mickael.guene@st.com>
+ 
+ 	* config/arm/arm.c (tls_reloc): Add TLS_GD32_FDPIC,
+ 	TLS_LDM32_FDPIC and TLS_IE32_FDPIC.
+ 	(arm_call_tls_get_addr): Add FDPIC support.
+ 	(legitimize_tls_address): Likewise.
+ 	(arm_emit_tls_decoration): Likewise.
+ 
+ 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
+ 	    Mickaël Guêné <mickael.guene@st.com>
+ 
+ 	* config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
+ 	support.
+ 	(arm_trampoline_init): Likewise.
+ 	(arm_trampoline_adjust_address): Likewise.
+ 	* config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.
+ 
+ 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
+ 	    Mickaël Guêné <mickael.guene@st.com>
+ 
+ 	* config/arm/arm.c (arm_fdpic_local_funcdesc_p): New function.
+ 	(legitimize_pic_address): Enforce binding rules on function
+ 	pointers in FDPIC mode.
+ 	(arm_assemble_integer): Likewise.
+ 
+ 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
+ 	    Mickaël Guêné <mickael.guene@st.com>
+ 
+ 	* config/arm/arm.h (PIC_REGISTER_MAY_NEED_SAVING): New helper.
+ 	* config/arm/arm.c (arm_compute_save_reg0_reg12_mask): Handle
+ 	FDPIC.
+ 
+ 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
+ 	    Mickaël Guêné <mickael.guene@st.com>
+ 
+ 	* ginclude/unwind-arm-common.h (unwinder_cache): Add reserved5
+ 	field.
+ 
+ 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
+ 	    Mickaël Guêné <mickael.guene@st.com>
+ 
+ 	* config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
+ 	in FDPIC mode.
+ 	* config/arm/arm-protos.h (arm_load_function_descriptor): Declare
+ 	new function.
+ 	* config/arm/arm.c (arm_option_override): Define pic register to
+ 	FDPIC_REGNUM.
+ 	(arm_function_ok_for_sibcall): Disable sibcall optimization if we
+ 	have no decl or go through PLT.
+ 	(calculate_pic_address_constant): New function.
+ 	(legitimize_pic_address): Call calculate_pic_address_constant.
+ 	(arm_load_pic_register): Handle TARGET_FDPIC.
+ 	(arm_is_segment_info_known): New function.
+ 	(arm_pic_static_addr): Add support for FDPIC.
+ 	(arm_load_function_descriptor): New function.
+ 	(arm_emit_call_insn): Add support for FDPIC.
+ 	(arm_assemble_integer): Add support for FDPIC.
+ 	* config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED):
+ 	Define. (FDPIC_REGNUM): New define.
+ 	* config/arm/arm.md (call): Add support for FDPIC.
+ 	(call_value): Likewise.
+ 	(restore_pic_register_after_call): New pattern.
+ 	(untyped_call): Disable if FDPIC.
+ 	(untyped_return): Likewise.
+ 	* config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.
+ 
+ 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
+ 	    Mickaël Guêné <mickael.guene@st.com>
+ 
+ 	* config.gcc: Handle arm*-*-uclinuxfdpiceabi.
+ 	* config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): New.
+ 	(SUBTARGET_EXTRA_ASM_SPEC): Use TARGET_FDPIC_ASM_SPEC.
+ 	* config/arm/linux-eabi.h (FDPIC_CC1_SPEC): New.
+ 	(CC1_SPEC): Use FDPIC_CC1_SPEC.
+ 	(MUSL_DYNAMIC_LINKER): Add -fdpic suffix when needed.
+ 	* config/arm/uclinuxfdpiceabi.h: New file.
+ 
+ 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
+ 
+ 	* config.gcc: Handle *-*-uclinuxfdpiceabi.
+ 
+ 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
+ 	    Mickaël Guêné  <mickael.guene@st.com>
+ 
+ 	* config/arm/arm.opt: Add -mfdpic option.
+ 	* doc/invoke.texi: Add documentation for -mfdpic.
+ 
+ 2019-09-09  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* expmed.c (extract_bit_field): Update function comment
+ 	regarding alt_rtl.
+ 	* expr.c (expand_expr_real): Update function comment
+ 	regarding alt_rtl.
+ 	(expand_misaligned_mem_ref): New helper function.
+ 	(expand_expr_real_2): Use expand_misaligned_mem_ref.
+ 	Remove duplicate assignment to "base" at case MEM_REF.
+ 	Remove a shadowed variable "unsignedp" at case VCE. 
+ 
+ 2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* regset.h (regs_invalidated_by_call_regset): Delete.
+ 	(fixed_reg_set_regset): Likewise.
+ 	* reginfo.c (regs_invalidated_by_call_regset): Likewise.
+ 	(fixed_reg_set_regset, persistent_obstack): Likewise.
+ 	(init_reg_sets_1, globalize_reg): Update accordingly.
+ 	* df.h (df_print_regset, df_print_word_regset): Take a const_bitmap
+ 	instead of a bitmap.
+ 	* df-core.c (df_print_regset, df_print_word_regset): Likewise.
+ 	* df-problems.c (df_rd_local_compute): Use regs_invalidated_by_call
+ 	instead of regs_invalidated_by_call_regset.
+ 	(df_lr_confluence_n, df_md_confluence_n): Likewise.
+ 	* df-scan.c (df_scan_start_dump): Likewise.
+ 	* dse.c (copy_fixed_regs): Likewise.
+ 	* config/sh/sh.c (sh_find_equiv_gbr_addr): Likewise.
+ 
+ 2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* array-traits.h: New file.
+ 	* coretypes.h (array_traits, bitmap_view): New types.
+ 	* bitmap.h: Include "array-traits.h"
+ 	(bitmap_bit_p): Take a const_bitmap instead of a bitmap.
+ 	(base_bitmap_view, bitmap_view): New classes.
+ 	* bitmap.c (bitmap_bit_p): Take a const_bitmap instead of a bitmap.
+ 	* hard-reg-set.h: Include array-traits.h.
+ 	(array_traits<HARD_REG_SET>): New struct.
+ 	* regset.h (IOR_REG_SET_HRS): New macro.
+ 	* loop-iv.c (simplify_using_initial_values): Use IOR_REG_SET_HRS
+ 	rather than iterating over each hard register.
+ 	* sched-deps.c (sched_analyze_insn): Likewise.
+ 	* sel-sched-ir.c (setup_id_implicit_regs): Likewise.
+ 
+ 2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* ira-int.h (ior_hard_reg_conflicts): Take a const_hard_reg_set
+ 	instead of a HARD_REG_SET *.
+ 	* ira-build.c (ior_hard_reg_conflicts): Likewise.
+ 	(ira_build): Update call accordingly.
+ 	* ira-emit.c (add_range_and_copies_from_move_list): Likewise.
+ 
+ 2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (HARD_REG_SET::operator==): New function.
+ 	(HARD_REG_SET::operator!=): Likewise.
+ 	(hard_reg_set_equal_p): Delete.
+ 	* cfgcleanup.c (old_insns_match_p): Use == instead of
+ 	hard_reg_set_equal_p and != instead of !hard_reg_set_equal_p.
+ 	* ira-color.c (allocno_hard_regs_hasher::equal): Likewise.
+ 	(add_allocno_hard_regs_to_forest): Likewise.
+ 	(setup_allocno_available_regs_num): Likewise.
+ 	* ira.c (setup_pressure_classes): Likewise.
+ 	(setup_allocno_and_important_classes): Likewise.
+ 	(setup_reg_class_relations): Likewise.
+ 	* lra-lives.c (process_bb_lives): Likewise.
+ 	* reg-stack.c (change_stack, convert_regs_1): Likewise.
+ 
+ 2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (IOR_COMPL_HARD_REG_SET): Delete.
+ 	* config/aarch64/cortex-a57-fma-steering.c (rename_single_chain):
+ 	Use "|~" instead of IOR_COMPL_HARD_REG_SET.
+ 	* config/aarch64/falkor-tag-collision-avoidance.c (init_unavailable):
+ 	Likewise.
+ 	* ira-build.c (ira_create_object, ira_set_allocno_class): Likewise.
+ 	* ira.c (setup_reg_renumber): Likewise.
+ 	* lra-assigns.c (find_hard_regno_for_1): Likewise.
+ 	* regrename.c (regrename_find_superclass): Likewise.
+ 	* reload1.c (find_reg): Likewise.
+ 
+ 2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (AND_COMPL_HARD_REG_SET): Delete.
+ 	* caller-save.c (setup_save_areas): Use "&~" instead of
+ 	AND_COMPL_HARD_REG_SET.
+ 	(save_call_clobbered_regs): Likewise.
+ 	* config/epiphany/epiphany.c (epiphany_conditional_register_usage):
+ 	Likewise.
+ 	* config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
+ 	* config/gcn/gcn.c (gcn_md_reorg): Likewise.
+ 	* config/i386/i386.c (ix86_conditional_register_usage): Likewise.
+ 	* config/mips/mips.c (mips_class_max_nregs): Likewise.
+ 	(mips_conditional_register_usage): Likewise.
+ 	* config/sh/sh.c (output_stack_adjust): Likewise.
+ 	* ira-color.c (form_allocno_hard_regs_nodes_forest): Likewise.
+ 	(setup_profitable_hard_regs): Likewise.
+ 	(get_conflict_and_start_profitable_regs): Likewise.
+ 	* ira-conflicts.c (print_allocno_conflicts): Likewise.
+ 	(ira_build_conflicts): Likewise.
+ 	* ira-costs.c (restrict_cost_classes): Likewise.
+ 	(setup_regno_cost_classes_by_aclass): Likewise.
+ 	* ira-lives.c (process_bb_node_lives): Likewise.
+ 	* ira.c (setup_class_hard_regs, setup_reg_subclasses): Likewise.
+ 	(setup_class_subset_and_memory_move_costs, setup_pressure_classes)
+ 	(setup_allocno_and_important_classes, setup_class_translate_array)
+ 	(setup_reg_class_relations, setup_prohibited_class_mode_regs):
+ 	Likewise.
+ 	* lra-assigns.c (find_hard_regno_for_1): Likewise.
+ 	* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
+ 	(process_alt_operands, inherit_in_ebb): Likewise.
+ 	* lra-eliminations.c (update_reg_eliminate): Likewise.
+ 	* lra-lives.c (process_bb_lives): Likewise.
+ 	* reload1.c (update_eliminables_and_spill, reload_as_needed): Likewise.
+ 	* resource.c (find_dead_or_set_registers): Likewise.
+ 	(mark_target_live_regs): Likewise.
+ 	* sched-deps.c (get_implicit_reg_pending_clobbers): Likewise.
+ 	* sel-sched.c (mark_unavailable_hard_regs): Likewise.
+ 	(implicit_clobber_conflict_p): Likewise.
+ 	* shrink-wrap.c (requires_stack_frame_p): Likewise.
+ 	(try_shrink_wrapping): Likewise.
+ 
+ 2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (HARD_REG_SET::operator|): New function.
+ 	(HARD_REG_SET::operator|=): Likewise.
+ 	(IOR_HARD_REG_SET): Delete.
+ 	* config/gcn/gcn.c (gcn_md_reorg): Use "|" instead of
+ 	IOR_HARD_REG_SET.
+ 	* config/m32c/m32c.c (m32c_register_move_cost): Likewise.
+ 	* config/s390/s390.c (s390_adjust_loop_scan_osc): Likewise.
+ 	* final.c (collect_fn_hard_reg_usage): Likewise.
+ 	* hw-doloop.c (scan_loop, optimize_loop): Likewise.
+ 	* ira-build.c (merge_hard_reg_conflicts): Likewise.
+ 	(ior_hard_reg_conflicts, create_cap_allocno, propagate_allocno_info)
+ 	(propagate_some_info_from_allocno): Likewise.
+ 	(copy_info_to_removed_store_destinations): Likewise.
+ 	* ira-color.c (add_allocno_hard_regs_to_forest, assign_hard_reg)
+ 	(allocno_reload_assign, ira_reassign_pseudos): Likewise.
+ 	(fast_allocation): Likewise.
+ 	* ira-conflicts.c (ira_build_conflicts): Likewise.
+ 	* ira-lives.c (make_object_dead, process_single_reg_class_operands)
+ 	(process_bb_node_lives): Likewise.
+ 	* ira.c (setup_pressure_classes, setup_reg_class_relations): Likewise.
+ 	* lra-assigns.c (find_hard_regno_for_1): Likewise.
+ 	(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
+ 	* lra-constraints.c (process_alt_operands, inherit_in_ebb): Likewise.
+ 	* lra-eliminations.c (spill_pseudos, update_reg_eliminate): Likewise.
+ 	* lra-lives.c (mark_pseudo_dead, check_pseudos_live_through_calls)
+ 	(process_bb_lives): Likewise.
+ 	* lra-spills.c (assign_spill_hard_regs): Likewise.
+ 	* postreload.c (reload_combine): Likewise.
+ 	* reginfo.c (init_reg_sets_1): Likewise.
+ 	* regrename.c (merge_overlapping_regs, find_rename_reg)
+ 	(merge_chains): Likewise.
+ 	* reload1.c (maybe_fix_stack_asms, order_regs_for_reload, find_reg)
+ 	(find_reload_regs, finish_spills, choose_reload_regs_init)
+ 	(emit_reload_insns): Likewise.
+ 	* reorg.c (redundant_insn): Likewise.
+ 	* resource.c (find_dead_or_set_registers, mark_set_resources)
+ 	(mark_target_live_regs): Likewise.
+ 	* rtlanal.c (find_all_hard_reg_sets): Likewise.
+ 	* sched-deps.c (sched_analyze_insn): Likewise.
+ 	* sel-sched.c (mark_unavailable_hard_regs): Likewise.
+ 	(find_best_reg_for_expr): Likewise.
+ 	* shrink-wrap.c (try_shrink_wrapping): Likewise.
+ 
+ 2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (HARD_REG_SET::operator&): New function.
+ 	(HARD_REG_SET::operator&): Likewise.
+ 	(AND_HARD_REG_SET): Delete.
+ 	* caller-save.c (setup_save_areas): Use "&" instead of
+ 	AND_HARD_REG_SET.
+ 	(save_call_clobbered_regs): Likewise.
+ 	* config/gcn/gcn.c (gcn_md_reorg): Likewise.
+ 	* config/m32c/m32c.c (reduce_class): Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise.
+ 	* final.c (get_call_reg_set_usage): Likewise.
+ 	* ira-color.c (add_allocno_hard_regs_to_forest): Likewise.
+ 	(setup_left_conflict_sizes_p): Likewise.
+ 	* ira-conflicts.c (print_allocno_conflicts): Likewise.
+ 	(ira_build_conflicts): Likewise.
+ 	* ira-costs.c (restrict_cost_classes): Likewise.
+ 	* ira.c (setup_stack_reg_pressure_class, setup_class_translate_array)
+ 	(setup_reg_class_relations): Likewise.
+ 	* reginfo.c (init_reg_sets_1, record_subregs_of_mode): Likewise.
+ 	* reload1.c (maybe_fix_stack_asms, finish_spills): Likewise.
+ 	* resource.c (find_dead_or_set_registers): Likewise.
+ 	* sel-sched.c (mark_unavailable_hard_regs): Likewise.
+ 
+ 2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (HARD_REG_SET::operator~): New function.
+ 	(COMPL_HARD_REG_SET): Delete.
+ 	* config/c6x/c6x.c (c6x_call_saved_register_used): Use ~ instead
+ 	of COMPL_HARD_REG_SET.
+ 	(try_rename_operands): Likewise.
+ 	* config/sh/sh.c (push_regs): Likewise.
+ 	* lra-assigns.c (find_hard_regno_for_1): Likewise.
+ 	* lra-constraints.c (contains_reg_p): Likewise.
+ 	* reload1.c (finish_spills, choose_reload_regs_init): Likewise.
+ 
+ 2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (COPY_HARD_REG_SET): Delete.
+ 	* caller-save.c (save_call_clobbered_regs): Use assignment instead
+ 	of COPY_HARD_REG_SET.
+ 	* config/epiphany/epiphany.c (epiphany_compute_frame_size): Likewise.
+ 	(epiphany_conditional_register_usage): Likewise.
+ 	* config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
+ 	* config/gcn/gcn.c (gcn_md_reorg): Likewise.
+ 	* config/ia64/ia64.c (ia64_compute_frame_size): Likewise.
+ 	* config/m32c/m32c.c (m32c_register_move_cost): Likewise.
+ 	* config/m68k/m68k.c (m68k_conditional_register_usage): Likewise.
+ 	* config/mips/mips.c (mips_class_max_nregs): Likewise.
+ 	* config/pdp11/pdp11.c (pdp11_conditional_register_usage): Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise.
+ 	* config/sh/sh.c (output_stack_adjust): Likewise.
+ 	* final.c (collect_fn_hard_reg_usage): Likewise.
+ 	(get_call_reg_set_usage): Likewise.
+ 	* ira-build.c (ira_create_object, remove_low_level_allocnos)
+ 	(ira_flattening): Likewise.
+ 	* ira-color.c (add_allocno_hard_regs, add_allocno_hard_regs_to_forest)
+ 	(setup_left_conflict_sizes_p, setup_profitable_hard_regs)
+ 	(get_conflict_and_start_profitable_regs, allocno_reload_assign)
+ 	(ira_reassign_pseudos): Likewise.
+ 	* ira-conflicts.c (print_allocno_conflicts): Likewise.
+ 	(ira_build_conflicts): Likewise.
+ 	* ira-costs.c (restrict_cost_classes): Likewise.
+ 	(setup_regno_cost_classes_by_aclass): Likewise.
+ 	* ira.c (setup_class_hard_regs, setup_alloc_regs): Likewise.
+ 	(setup_reg_subclasses, setup_class_subset_and_memory_move_costs)
+ 	(setup_stack_reg_pressure_class, setup_pressure_classes)
+ 	(setup_allocno_and_important_classes, setup_class_translate_array)
+ 	(setup_reg_class_relations, setup_prohibited_class_mode_regs)
+ 	(ira_setup_eliminable_regset): Likewise.
+ 	* lra-assigns.c (find_hard_regno_for_1): Likewise.
+ 	(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
+ 	* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
+ 	(process_alt_operands, inherit_in_ebb): Likewise.
+ 	* lra-lives.c (process_bb_lives): Likewise.
+ 	* lra-spills.c (assign_spill_hard_regs): Likewise.
+ 	* lra.c (lra): Likewise.
+ 	* mode-switching.c (new_seginfo): Likewise.
+ 	* postreload.c (reload_combine): Likewise.
+ 	* reg-stack.c (straighten_stack): Likewise.
+ 	* reginfo.c (save_register_info, restore_register_info): Likewise.
+ 	(init_reg_sets_1, record_subregs_of_mode): Likewise
+ 	* regrename.c (create_new_chain, rename_chains): Likewise.
+ 	* reload1.c (order_regs_for_reload, find_reg): Likewise.
+ 	(find_reload_regs): Likewise.
+ 	* resource.c (find_dead_or_set_registers): Likewise.
+ 	(mark_target_live_regs): Likewise.
+ 	* sel-sched.c (mark_unavailable_hard_regs): Likewise.
+ 
+ 2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* rtl.h (CALL_INSN_FUNCTION_USAGE): Document what SETs mean.
+ 	(note_pattern_stores): Declare.
+ 	(note_stores): Take an rtx_insn *.
+ 	* rtlanal.c (set_of): Use note_pattern_stores instead of note_stores.
+ 	(find_all_hard_reg_sets): Pass the insn rather than its pattern to
+ 	note_stores.  Remove explicit handling of CALL_INSN_FUNCTION_USAGE.
+ 	(note_stores): Take an rtx_insn * as argument and process
+ 	CALL_INSN_FUNCTION_USAGE.  Rename old function to...
+ 	(note_pattern_stores): ...this.
+ 	(find_first_parameter_load): Pass the insn rather than
+ 	its pattern to note_stores.
+ 	* alias.c (memory_modified_in_insn_p, init_alias_analysis): Likewise.
+ 	* caller-save.c (setup_save_areas, save_call_clobbered_regs)
+ 	(insert_one_insn): Likewise.
+ 	* combine.c (combine_instructions): Likewise.
+ 	(likely_spilled_retval_p): Likewise.
+ 	(try_combine): Use note_pattern_stores instead of note_stores.
+ 	(record_dead_and_set_regs): Pass the insn rather than its pattern
+ 	to note_stores.
+ 	(reg_dead_at_p): Likewise.
+ 	* config/bfin/bfin.c (workaround_speculation): Likewise.
+ 	* config/c6x/c6x.c (maybe_clobber_cond): Likewise.  Take an rtx_insn *
+ 	rather than an rtx.
+ 	* config/frv/frv.c (frv_registers_update): Use note_pattern_stores
+ 	instead of note_stores.
+ 	(frv_optimize_membar_local): Pass the insn rather than its pattern
+ 	to note_stores.
+ 	* config/gcn/gcn.c (gcn_md_reorg): Likewise.
+ 	* config/i386/i386.c (ix86_avx_u128_mode_after): Likewise.
+ 	* config/mips/mips.c (vr4130_true_reg_dependence_p): Likewise.
+ 	(r10k_needs_protection_p, mips_sim_issue_insn): Likewise.
+ 	(mips_reorg_process_insns): Likewise.
+ 	* config/s390/s390.c (s390_regs_ever_clobbered): Likewise.
+ 	* config/sh/sh.c (flow_dependent_p): Likewise.  Take rtx_insn *s
+ 	rather than rtxes.
+ 	* cse.c (delete_trivially_dead_insns): Pass the insn rather than
+ 	its pattern to note_stores.
+ 	* cselib.c (cselib_record_sets): Use note_pattern_stores instead
+ 	of note_stores.
+ 	* dce.c (mark_nonreg_stores): Remove the "body" parameter and pass
+ 	the insn to note_stores.
+ 	(prescan_insns_for_dce): Update call accordingly.
+ 	* ddg.c (mem_write_insn_p): Pass the insn rather than its pattern
+ 	to note_stores.
+ 	* df-problems.c (can_move_insns_across): Likewise.
+ 	* dse.c (emit_inc_dec_insn_before, replace_read): Likewise.
+ 	* function.c (assign_parm_setup_reg): Likewise.
+ 	* gcse-common.c (record_last_mem_set_info_common): Likewise.
+ 	* gcse.c (load_killed_in_block_p, compute_hash_table_work): Likewise.
+ 	(single_set_gcse): Likewise.
+ 	* ira.c (validate_equiv_mem): Likewise.
+ 	(update_equiv_regs): Use note_pattern_stores rather than note_stores
+ 	for no_equiv.
+ 	* loop-doloop.c (doloop_optimize): Pass the insn rather than its
+ 	pattern to note_stores.
+ 	* loop-invariant.c (calculate_loop_reg_pressure): Likewise.
+ 	* loop-iv.c (simplify_using_initial_values): Likewise.
+ 	* mode-switching.c (optimize_mode_switching): Likewise.
+ 	* optabs.c (emit_libcall_block_1): Likewise.
+ 	(expand_atomic_compare_and_swap): Likewise.
+ 	* postreload-gcse.c (load_killed_in_block_p): Likewise.
+ 	(record_opr_changes): Likewise.  Remove explicit handling of
+ 	CALL_INSN_FUNCTION_USAGE.
+ 	* postreload.c (reload_combine, reload_cse_move2add): Likewise.
+ 	* regcprop.c (kill_clobbered_values): Likewise.
+ 	(copyprop_hardreg_forward_1): Pass the insn rather than its pattern
+ 	to note_stores.
+ 	* regrename.c (build_def_use): Likewise.
+ 	* reload1.c (reload):  Use note_pattern_stores instead of note_stores
+ 	for mark_not_eliminable.
+ 	(reload_as_needed): Pass the insn rather than its pattern
+ 	to note_stores.
+ 	(emit_output_reload_insns): Likewise.
+ 	* resource.c (mark_target_live_regs): Likewise.
+ 	* sched-deps.c (init_insn_reg_pressure_info): Likewise.
+ 	* sched-rgn.c (sets_likely_spilled): Use note_pattern_stores
+ 	instead of note_stores.
+ 	* shrink-wrap.c (try_shrink_wrapping): Pass the insn rather than
+ 	its pattern to note_stores.
+ 	* stack-ptr-mod.c (pass_stack_ptr_mod::execute): Likewise.
+ 	* var-tracking.c (adjust_insn, add_with_sets): Likewise.
+ 
+ 2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* hard-reg-set.h (HARD_REG_SET): Define using a typedef rather
+ 	than a #define.  Use a structure rather than an array as the
+ 	fallback definition.  Remove special cases for low array sizes.
+ 	(const_hard_reg_set): New typedef.
+ 	(hard_reg_set_subset_p): Use it instead of "const HARD_REG_SET".
+ 	(hard_reg_set_equal_p, hard_reg_set_intersect_p): Likewise.
+ 	(hard_reg_set_empty_p): Likewise.
+ 	(SET_HARD_REG_BIT): Use a function rather than a macro to
+ 	handle the case in which HARD_REG_SET is a structure.
+ 	(CLEAR_HARD_REG_BIT, TEST_HARD_REG_BIT, CLEAR_HARD_REG_SET)
+ 	(SET_HARD_REG_SET, COPY_HARD_REG_SET, COMPL_HARD_REG_SET)
+ 	(AND_HARD_REG_SET, AND_COMPL_HARD_REG_SET, IOR_HARD_REG_SET)
+ 	(IOR_COMPL_HARD_REG_SET): Likewise.
+ 	(hard_reg_set_iterator::pset): Constify the pointer target.
+ 	(hard_reg_set_iter_init): Take a const_hard_reg_set instead
+ 	of a "const HARD_REG_SET".  Update the handling of non-integer
+ 	HARD_REG_SETs.
+ 	* recog.h: Test HARD_CONST instead of CLEAR_HARD_REG_SET.
+ 	* reload.h: Likewise.
+ 	* rtl.h (choose_hard_reg_mode): Remove unnecessary line break.
+ 	* regs.h (in_hard_reg_set_p): Take a const_hard_reg_set instead
+ 	of a "const HARD_REG_SET".
+ 	(overlaps_hard_reg_set_p, range_overlaps_hard_reg_set_p): Likewise.
+ 	(range_in_hard_reg_set_p): Likewise.
+ 	* ira-costs.c (restrict_cost_classes): Likewise.
+ 	* shrink-wrap.c (move_insn_for_shrink_wrap): Likewise.
+ 	* config/epiphany/resolve-sw-modes.c (pass_resolve_sw_modes::execute):
+ 	Pass a NO_REGS HARD_REG_SET rather than NULL to emit_set_fp_mode.
+ 	* config/ia64/ia64.c (rws_insn): In the CHECKING_P version,
+ 	use unsigned HOST_WIDEST_FAST_INT rather than HARD_REG_ELT_TYPE.
+ 	(rws_insn_set, rws_insn_test): In the CHECKING_P version,
+ 	take an unsigned int and open-code the HARD_REG_SET operations.
+ 
+ 2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* Makefile.in (OBJS): Remove bt-load.o.
+ 	* doc/invoke.texi (fbranch-target-load-optimize): Delete.
+ 	(fbranch-target-load-optimize2, fbtr-bb-exclusive): Likewise.
+ 	* common.opt (fbranch-target-load-optimize): Mark as Ignore and
+ 	document that the option no longer does anything.
+ 	(fbranch-target-load-optimize2, fbtr-bb-exclusive): Likewise.
+ 	* target.def (branch_target_register_class): Delete.
+ 	(branch_target_register_callee_saved): Likewise.
+ 	* doc/tm.texi.in (TARGET_BRANCH_TARGET_REGISTER_CLASS): Likewise.
+ 	(TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED): Likewise.
+ 	* doc/tm.texi: Regenerate.
+ 	* tree-pass.h (make_pass_branch_target_load_optimize1): Delete.
+ 	(make_pass_branch_target_load_optimize2): Likewise.
+ 	* passes.def (pass_branch_target_load_optimize1): Likewise.
+ 	(pass_branch_target_load_optimize2): Likewise.
+ 	* targhooks.h (default_branch_target_register_class): Likewise.
+ 	* targhooks.c (default_branch_target_register_class): Likewise.
+ 	* opt-suggestions.c (test_completion_valid_options): Remove
+ 	-fbtr-bb-exclusive from the list of test options.
+ 	* bt-load.c: Remove.
+ 
+ 2019-09-09  Barnaby Wilks  <barnaby.wilks@arm.com>
+ 
+ 	* match.pd: Add flag_unsafe_math_optimizations check
+ 	before deciding on the widest type in a binary math operation.
+ 
+ 2019-09-09  Martin Liska  <mliska@suse.cz>
+ 
+ 	* config/i386/i386.opt: Update comment of removed
+ 	options that are preserved only for backward
+ 	compatibility.
+ 
+ 2019-09-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/87853
+ 	* config/i386/emmintrin.h (_mm_cmpeq_epi8): Use casts to __v16qi
+ 	instead of __v16qs.
+ 
+ 	PR target/91704
+ 	* config/i386/avxintrin.h (__v32qs): New typedef.
+ 	* config/i386/avx2intrin.h (_mm256_cmpgt_epi8): Use casts to __v32qs
+ 	instead of __v32qi.
+ 
+ 2019-09-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
+ 
+ 	* doc/invoke.texi (Option Summary): Cover eBPF.
+ 	(eBPF Options): New section.
+ 	* doc/extend.texi (BPF Built-in Functions): Likewise.
+ 	(BPF Kernel Helpers): Likewise.
+ 
+ 2019-09-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
+ 
+ 	* config.gcc: Support for bpf-*-* targets.
+ 	* common/config/bpf/bpf-common.c: New file.
+ 	* config/bpf/t-bpf: Likewise.
+ 	* config/bpf/predicates.md: Likewise.
+ 	* config/bpf/constraints.md: Likewise.
+ 	* config/bpf/bpf.opt: Likewise.
+ 	* config/bpf/bpf.md: Likewise.
+ 	* config/bpf/bpf.h: Likewise.
+ 	* config/bpf/bpf.c: Likewise.
+ 	* config/bpf/bpf-protos.h: Likewise.
+ 	* config/bpf/bpf-opts.h: Likewise.
+ 	* config/bpf/bpf-helpers.h: Likewise.
+ 	* config/bpf/bpf-helpers.def: Likewise.
+ 
+ 2019-09-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
+ 
+ 	* doc/sourcebuild.texi (Effective-Target Keywords): Document
+ 	indirect_calls.
+ 
+ 2019-09-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
+ 
+ 	* opt-functions.awk (integer_range_info): Make sure values are in
+ 	numeric context before operating with them.
+ 
+ 2019-09-08  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* genemit.c (gen_split): Print the filename and line number where the
+ 	splitter (or peephole2) was defined, to the dump file.
+ 
+ 2019-09-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/91665
+ 	* tree-vect-loop.c (vectorizable_reduction): Punt if base has type
+ 	incompatible with the type of PHI result.
+ 
+ 2019-09-07  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	PR target/91684
+ 	* config/arm/arm.c (arm_block_set_aligned_non_vect): Use
+ 	gen_unaligned_storedi for 4-byte aligned addresses.
+ 
+ 2019-09-06  Jim Wilson  <jimw@sifive.com>
+ 
+ 	* config/riscv/riscv.c (riscv_option_override): Revert 2019-08-30
+ 	change.
+ 
+ 2019-09-06  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (unspec): Delete UNSPEC_MV_CR_OV.
+ 
+ 2019-09-06  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_rtx_costs) <case UNSPEC>: Delete.
+ 	* config/rs6000/rs6000.md (unspec): Delete UNSPEC_FRSP.
+ 
+ 2019-09-06  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/91654
+ 	* config/i386/x86-tune-costs.h (skylake_cost): Raise the
+ 	cost of SSE->integer and integer->SSE moves from 2 to 6.
+ 	(core_cost): Ditto.
+ 
+ 2019-09-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* function.c (assign_parm_find_data_types): Use RECORD_OR_UNION_TYPE_P
+ 	before testing TYPE_TRANSPARENT_AGGR.
+ 	* calls.c (initialize_argument_information, load_register_parameters):
+ 	Likewise.
+ 
+ 2019-09-06  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (cmp_and): Add short-it variant for thumb2 with
+ 	high regs.
+ 	(cmp_ior): Likewise.
+ 
+ 2019-09-06  Martin Liska  <mliska@suse.cz>
+ 
+ 	* doc/match-and-simplify.texi: Separate tuples with ;.
+ 
+ 2019-09-06  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR c++/91125
+ 	* Makefile.in: Remove tlink.o.
+ 	* collect2.c (do_link): New function isolated
+ 	from do_tlink.
+ 	(main): Use.
+ 	* collect2.h (do_tlink): Remove declaration of do_tlink.
+ 	* doc/extend.texi: Remove documentation of -frepo.
+ 	* doc/invoke.texi: Likewise.
+ 	* doc/sourcebuild.texi: Remove cleanup-repo-files.
+ 	* tlink.c: Remove.
+ 
+ 2019-09-05  Jakub Jelinek  <jakub@redhat.com>
+ 	    Jim Wilson  <jimw@sifive.com>
+ 
+ 	PR target/91635
+ 	* config/riscv/riscv.md (zero_extendsidi2, zero_extendhi<GPR:mode>2,
+ 	extend<SHORT:mode><SUPERQI:mode>2): Don't split if
+ 	paradoxical_subreg_p (operands[0]).
+ 	(*lshrsi3_zero_extend_3+1, *lshrsi3_zero_extend_3+2): Add clobber and
+ 	use as intermediate value.
+ 
+ 2019-09-05  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn.md (*movti_insn): Set delayeduse for global_store.
+ 	(sync_compare_and_swap<mode>_insn): Likewise.
+ 
+ 2019-09-05  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	PR middle-end/91615
+ 	* expr.c (expand_expr_real_1): Handle misaligned TARGET_MEM_REF
+ 	without movmisalign optab.
+ 
+ 2019-09-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/91001
+ 	PR middle-end/91105
+ 	PR middle-end/91106
+ 	* calls.c (load_register_parameters): For TYPE_TRANSPARENT_AGGR
+ 	types, use type of their first field instead of type of
+ 	args[i].tree_value.
+ 
+ 2019-09-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR rtl-optimization/91656
+ 	* postreload-gcse.c (record_last_mem_set_info): Revert addition
+ 	of early out.
+ 
+ 2019-09-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/90501
+ 	* tree-inline.c (declare_return_variable): Mark the return
+ 	slot as addressable after building an address of it.
+ 
+ 2019-09-05  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* doc/install.texi: Update and clarify requirements to build GNAT.
+ 
+ 2019-09-05  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/91577
+ 	* cfgexpand.c (discover_nonconstant_array_refs): Force the source
+ 	of an IFN_LOAD_LANES call and the destination of an IFN_STORE_LANES
+ 	call to be in memory.
+ 	(pass_expand::execute): Call discover_nonconstant_array_refs before
+ 	setting currently_expanding_to_rtl.
+ 
+ 2019-09-04  Caroline Tice  <cmtice@google.com>
+ 
+ 	* opts.c (finish_options): Disallow -fvtable-verify and -flto to be
+ 	specified together.
+ 
+ 2019-09-04  Marek Polacek  <polacek@redhat.com>
+ 
+ 	* doc/invoke.texi: Remove -fdeduce-init-list documentation.
+ 
+ 2019-09-04  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/32413
+ 	* config/i386/i386.c (inline_secondary_memory_needed): Return true
+ 	for QI and HImode moves between SSE and general registers.
+ 
+ 2019-09-04  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	PR c/78736
+ 	* doc/invoke.texi: Document -Wenum-conversion.
+ 
+ 2019-09-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR rtl-optimization/36262
+ 	* postreload-gcse.c: Include intl.h and gcse.h.
+ 	(insert_expr_in_table): Insert at the head of cur_expr->avail_occr
+ 	to avoid linear list walk.
+ 	(record_last_mem_set_info): Gate off if not computing transparentness.
+ 	(get_bb_avail_insn): If transparentness isn't computed give up
+ 	early.
+ 	(gcse_after_reload_main): Skip compute_transp and extended PRE
+ 	if gcse_or_cprop_is_too_expensive says so.
+ 
+ 2019-09-03  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.c (msp430_init_sections): Remove handling of the
+ 	noinit section.
+ 	(msp430_select_section): Handle decls with the "noinit" attribute with
+ 	default_elf_select_section.
+ 	Handle SECCAT_RODATA_MERGE_* section types with
+ 	default_elf_select_section.
+ 	Add comments about handling of unsupported section types.
+ 	(msp430_section_type_flags): Remove handling of the noinit section.
+ 
+ 2019-09-03  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.c (msp430_attr): Remove warnings about
+ 	conflicting msp430-specific attributes.
+ 	(msp430_section_attr): Likewise.
+ 	Add warnings about conflicts with generic "noinit" and "section"
+ 	attributes.
+ 	Fix grammar in -mlarge error message.
+ 	(msp430_data_attr): Rename to msp430_persist_attr.
+ 	Add warnings about conflicts with generic "noinit" and "section"
+ 	attributes.
+ 	Add warning for when variable is not initialized.
+ 	Chain conditionals which prevent the attribute being added.
+ 	(ATTR_EXCL): New helper.
+ 	(attr_reent_exclusions): New exclusion table.
+ 	(attr_naked_exclusions): Likewise.
+ 	(attr_crit_exclusions): Likewise.
+ 	(attr_lower_exclusions): Likewise.
+ 	(attr_upper_exclusions): Likewise.
+ 	(attr_either_exclusions): Likewise.
+ 	(attr_persist_exclusions): Likewise.
+ 	(msp430_attribute_table): Update with exclusion rules.
+ 	(msp430_output_aligned_decl_common): Don't output common symbol if decl
+ 	has a section.
+ 
+ 2019-09-03  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.c (TARGET_HANDLE_GENERIC_ATTRIBUTE): Define.
+ 	(msp430_handle_generic_attribute): New function.
+ 	* doc/tm.texi: Regenerate.
+ 	* doc/tm.texi.in: Add TARGET_HANDLE_GENERIC_ATTRIBUTE.
+ 	* hooks.c (hook_tree_treeptr_tree_tree_int_boolptr_null): New.
+ 	* hooks.h (hook_tree_treeptr_tree_tree_int_boolptr_null): New.
+ 	* target.def: Define new hook TARGET_HANDLE_GENERIC_ATTRIBUTE.
+ 
+ 2019-09-03  Kamlesh Kumar  <kamleshbhalui@gmail.com>
+ 
+ 	PR tree-optimization/91504
+ 	* match.pd: Add ((~a & b) ^a) --> (a | b).
+ 
+ 2019-09-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/91604
+ 	* config/i386/i386-expand.c (split_double_mode): If there is more than
+ 	one MEM operand and they are rtx_equal_p, reuse lo_half/hi_half from
+ 	already split matching MEM operand instead of calling adjust_address
+ 	again.
+ 
+ 2019-09-03  Ulrich Weigand  <uweigand@de.ibm.com>
+ 
+ 	* config.gcc: Obsolete spu target.  Remove references to spu.
+ 	* configure.ac: Remove references to spu.
+ 	* configure: Regenerate.
+ 	* config/spu/: Remove directory.
+ 	* common/config/spu/: Remove directory.
+ 
+ 	* doc/extend.texi: Remove references to spu.
+ 	* doc/invoke.texi: Likewise.
+ 	* doc/md.texi: Likewise.
+ 	* doc/sourcebuild.texi: Likewise.
+ 
+ 2019-09-03  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	PR middle-end/91603
+ 	PR middle-end/91612
+ 	PR middle-end/91613
+ 	* expr.c (expand_expr_real_1): Handle unaligned decl_rtl
+ 	and SSA_NAME referring to CONSTANT_P correctly.
+ 
+ 2019-09-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.h (vn_nary_op_lookup): Remove.
+ 	(vn_nary_op_insert): Likewise.
+ 	* tree-ssa-sccvn.c (init_vn_nary_op_from_op): Remove.
+ 	(vn_nary_op_lookup): Likewise.
+ 	(vn_nary_op_insert): Likewise.
+ 
+ 2019-09-03  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	* config/s390/s390.c (s390_canonicalize_comparison): Use XEXP
+ 	(*op0, 1) instead of XEXP (*op1, 0).
+ 
+ 2019-09-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/aarch64/aarch64.md (UNSPEC_FJCVTZS): Define.
+ 	(aarch64_fjcvtzs): New define_insn.
+ 	* config/aarch64/aarch64.h (TARGET_JSCVT): Define.
+ 	* config/aarch64/aarch64-builtins.c (aarch64_builtins):
+ 	Add AARCH64_JSCVT.
+ 	(aarch64_init_builtins): Initialize __builtin_aarch64_jcvtzs.
+ 	(aarch64_expand_builtin): Handle AARCH64_JSCVT.
+ 	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
+ 	__ARM_FEATURE_JCVT where appropriate.
+ 	* config/aarch64/arm_acle.h (__jcvt): Define.
+ 
+ 2019-09-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/aarch64/aarch64.md ("unspec"): Add UNSPEC_FRINT32Z,
+ 	UNSPEC_FRINT32X, UNSPEC_FRINT64Z, UNSPEC_FRINT64X.
+ 	(aarch64_<frintnzs_op><mode>): New define_insn.
+ 	* config/aarch64/aarch64.h (TARGET_FRINT): Define.
+ 	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
+ 	__ARM_FEATURE_FRINT when appropriate.
+ 	* config/aarch64/aarch64-simd-builtins.def: Add builtins for frint32z,
+ 	frint32x, frint64z, frint64x.
+ 	* config/aarch64/arm_acle.h (__rint32zf, __rint32z, __rint64zf,
+ 	__rint64z, __rint32xf, __rint32x, __rint64xf, __rint64x): Define.
+ 	* config/aarch64/arm_neon.h (vrnd32z_f32, vrnd32zq_f32, vrnd32z_f64,
+ 	vrnd32zq_f64, vrnd32x_f32, vrnd32xq_f32, vrnd32x_f64, vrnd32xq_f64,
+ 	vrnd64z_f32, vrnd64zq_f32, vrnd64z_f64, vrnd64zq_f64, vrnd64x_f32,
+ 	vrnd64xq_f32, vrnd64x_f64, vrnd64xq_f64): Define.
+ 	* config/aarch64/iterators.md (VSFDF): Define.
+ 	(FRINTNZX): Likewise.
+ 	(frintnzs_op): Likewise.
+ 
+ 2019-09-03  Dennis Zhang  <dennis.zhang@arm.com>
+ 
+ 	* config/aarch64/aarch64-cores.def (AARCH64_CORE): New entries
+ 	for Cortex-A77, Cortex-A76AE, Cortex-A65, Cortex-A65AE, and
+ 	Cortex-A34.
+ 	* config/aarch64/aarch64-tune.md: Regenerated.
+ 	* doc/invoke.texi: Document the new processors.
+ 
+ 2019-09-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/aarch64/aarch64-option-extensions.def (sb): Add feature
+ 	string.
+ 	(ssbs): Likewise.
+ 	(sve2): Likewise.
+ 	(sve2-sm4): Likewise.
+ 	(sveaes): Likewise.
+ 	(svesha3): Likewise.
+ 	(svebitperm): Likewise.
+ 
+ 2019-09-03  Jakub Jelinek  <jakub@redhat.com>
+ 	    Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91597
+ 	* tree-vrp.c (extract_range_from_binary_expr): Remove unsafe
+ 	BIT_AND_EXPR optimization for pointers, even if both operand
+ 	ranges don't include NULL, the result can be NULL.
+ 
+ 2019-09-02  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	PR middle-end/91605
+ 	* expr.c (addr_expr_of_non_mem_decl_p_1): Refactor into...
+ 	(non_mem_decl_p): ...this.
+ 	(mem_ref_refers_to_non_mem_p): Handle DECL_P as well as MEM_REF.
+ 	(expand_assignment): Call mem_ref_referes_to_non_mem_p
+ 	unconditionally as before.
+ 
+ 2019-09-02  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR target/91323
+ 	* doc/generic.texi (LTGT_EXPR): Merge with other comparison operators.
+ 	* rtl.def (LTGT): Likewise.  Add note about floating-point exceptions.
+ 	* tree.def (LTGT_EXPR): Likewise.
+ 	* config/sparc/sparc.c (select_cc_mode): Return CCFPEmode for LTGT.
+ 
+ 2019-09-02  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR go/91617
+ 	* fold-const.c (range_check_type): For enumeral and boolean
+ 	type, pass 1 to type_for_size langhook instead of
+ 	TYPE_UNSIGNED (etype).  Return unsigned_type_for result whenever
+ 	etype isn't TYPE_UNSIGNED INTEGER_TYPE.
+ 	(build_range_check): Don't call unsigned_type_for for pointer types.
+ 	* match.pd (X / C1 op C2): Don't call unsigned_type_for on
+ 	range_check_type result.
+ 
+ 2019-09-02  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gimple-ssa-strength-reduction.c (valid_mem_ref_cand_p): New function.
+ 	(replace_ref): Do not replace a chain of only two candidates which are
+ 	valid memory references.
+ 
+ 2019-09-02  Martin Liska  <mliska@suse.cz>
+ 
+ 	* tree-switch-conversion.c (jump_table_cluster::find_jump_tables):
+ 	Bail out when we'll end up with the same number of clusters as
+ 	at the beginning.
+ 	(bit_test_cluster::find_bit_tests): Likewise for bit tests.
+ 	(jump_table_cluster::can_be_handled): Remove the guard
+ 	as it's already handled in ::is_enabled.  Allocate output
+ 	after early bail out.
+ 
+ 2019-09-02  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR gcov-profile/91601
+ 	* gcov.c (path_contains_zero_cycle_arc): Rename to ...
+ 	(path_contains_zero_or_negative_cycle_arc): ... this and handle
+ 	also negative edges.
+ 	(circuit): Handle also negative edges as they can happen
+ 	in some situations.
+ 
+ 2019-09-01  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR target/91472
+ 	* config/sparc/sparc.c (sparc_cannot_force_const_mem): Return true
+ 	during LRA/reload in PIC mode if the PIC register hasn't been used yet.
+ 	(sparc_pic_register_p): Test reload_in_progress for consistency's sake.
+ 
+ 2019-09-01  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/91623
+ 	* optabs.c (expand_vec_cond_expr): If op0 is a VECTOR_CST and only
+ 	EQ_EXPR/NE_EXPR is supported, verify that op0 only contains
+ 	zeros or negative elements and use NE_EXPR instead of LT_EXPR against
+ 	zero vector.
+ 
+ 	PR lto/91572
+ 	* tree.c (find_decls_types_in_node): Also walk TREE_PURPOSE of
+ 	GIMPLE_ASM TREE_LIST operands.
+ 
+ 2019-08-31  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* doc/generic.texi (Unary and Binary Expressions): Mark up
+ 	an instance of TYPE_MIN.
+ 
+ 2019-08-31  Stafford Horne  <shorne@gmail.com>
+ 
+ 	* config/or1k/constraints.md (t): New constraint.
+ 	* config/or1k/or1k.h (GOT_REGS): New register class.
+ 	* config/or1k/or1k.md (set_got_tmp, set_got): Use t contraint.
+ 
+ 2019-08-30  Jim Wilson  <jimw@sifive.com>
+ 
+ 	* config/riscv/riscv.c (riscv_option_override): If -msave-restore
+ 	and -fpic and -mplt then disable -msave-restore and warn.
+ 
+ 2019-08-30  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/91599
+ 	* tree-ssa-strlen.c (handle_store): Use a fallback location if
+ 	the statement doesn't have one.
+ 	* gimple-pretty-print.c (percent_G_format): Same.
+ 
+ 	PR middle-end/91584
+ 	* tree-vrp.c (vrp_prop::check_mem_ref): Normalize type domain bounds
+ 	before using them to validate MEM_REF offset.
+ 
+ 2019-08-30  Marek Polacek  <polacek@redhat.com>
+ 
+ 	* doc/invoke.texi (-Wvolatile): Use @code for volatile.
+ 
+ 2019-08-30  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* config/arm/arm.md (unaligned_loaddi,
+ 	unaligned_storedi): New unspec insn patterns.
+ 	* config/arm/neon.md (unaligned_storev8qi): Likewise.
+ 	* config/arm/arm.c (gen_cpymem_ldrd_strd): Use unaligned_loaddi
+ 	and unaligned_storedi for 4-byte aligned memory.
+ 	(arm_block_set_aligned_vect): Use unaligned_storev8qi for
+ 	4-byte aligned memory.
+ 
+ 2019-08-30  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	tree-optimization/91579
+ 	* tree-tailcall.c (tailr_arg_needs_copy): New variable.
+ 	(find_tail_calls): Allocate tailr_arg_needs_copy and set its bits as
+ 	appropriate.
+ 	(arg_needs_copy_p): Removed.
+ 	(eliminate_tail_call): Test tailr_arg_needs_copy instead of calling
+ 	arg_needs_copy_p.
+ 	(tree_optimize_tail_calls_1): Likewise.  Free tailr_arg_needs_copy.
+ 
+ 2019-08-29  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386-features.c
+ 	(general_scalar_chain::compute_convert_gain):
+ 	Correct cost for double-word shifts.
+ 	(general_scalar_to_vector_candidate_p): Reject count operands
+ 	greater or equal to mode bitsize.
+ 
+ 2019-08-29  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.c (inline_secondary_memory_needed): Return true
+ 	for moves between SSE and non-general registers and between
+ 	mask and non-general registers.
+ 	(ix86_register_move_cost): Remove stalled comment.
+ 
+ 2019-08-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	* config/i386/i386-features.c (general_scalar_chain::convert_insn):
+ 	Guard debug work with MAY_HAVE_DEBUG_BIND_INSNS.
+ 
+ 2019-08-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR bootstrap/91580
+ 	* config/i386/i386-features.c (general_scalar_chain::convert_insn):
+ 	Do not emit scalar copies for debug-insns, instead replace
+ 	their uses with the reg copy used in the chain or reset them
+ 	if there is a reaching definition outside of the chain as well.
+ 
+ 2019-08-29  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/91560
+ 	* config/i386/i386-expand.c (expand_vec_perm_movs,
+ 	expand_vec_perm_blend, expand_vec_perm_vpermil,
+ 	expand_vec_perm_pshufb, expand_vec_perm_1,
+ 	expand_vec_perm_pshuflw_pshufhw, expand_vec_perm_palignr,
+ 	expand_vec_perm_interleave2, expand_vec_perm_vpermq_perm_1,
+ 	expand_vec_perm_vperm2f128, expand_vec_perm_interleave3,
+ 	expand_vec_perm_vperm2f128_vblend, expand_vec_perm_2vperm2f128_vshuf,
+ 	expand_vec_perm_even_odd, expand_vec_perm_broadcast): Adjust function
+ 	comments - replace ix86_expand_vec_perm_builtin_1 with
+ 	ix86_expand_vec_perm_const_1.
+ 	(expand_vec_perm2_vperm2f128_vblend): New function.
+ 	(ix86_expand_vec_perm_const_1): New forward declaration.  Call
+ 	expand_vec_perm2_vperm2f128_vblend as last resort.
+ 	(canonicalize_perm): Formatting fix.
+ 
+ 	PR tree-optimization/91351
+ 	* tree-cfg.c (generate_range_test): Use range_check_type instead of
+ 	unsigned_type_for.
+ 	* tree-cfgcleanup.c (convert_single_case_switch): Punt if
+ 	range_check_type returns NULL.
+ 	* tree-switch-conversion.c (switch_conversion::build_one_array):
+ 	Use range_check_type instead of unsigned_type_for, don't perform
+ 	linear opt if it returns NULL.
+ 	(bit_test_cluster::find_bit_tests): Formatting fix.
+ 	(bit_test_cluster::emit): Use range_check_type instead of
+ 	unsigned_type_for.
+ 	(switch_decision_tree::try_switch_expansion): Punt if range_check_type
+ 	returns NULL.
+ 
+ 2019-08-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91568
+ 	* tree-vectorizer.h (_slp_tree::max_nunits): Add.
+ 	(vect_update_max_nunits): Add overload for poly_uint64.
+ 	* tree-vect-slp.c (vect_create_new_slp_node): Initialize it.
+ 	(vect_build_slp_tree): Record max_nunits into the subtree
+ 	and merge it upwards.
+ 	(vect_print_slp_tree): Print max_nunits.
+ 
+ 2019-08-28  Marek Polacek  <polacek@redhat.com>
+ 
+ 	Implement P1152R4: Deprecating some uses of volatile.
+ 	PR c++/91361
+ 	* doc/invoke.texi: Document -Wvolatile.
+ 
+ 2019-08-28  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/91360 - Implement C++20 P1143R2: constinit.
+ 	* doc/invoke.texi: Document -Wc++20-compat.
+ 
+ 2019-08-28  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/91457
+ 	* builtins.c (component_size): New function.
+ 	(compute_objsize): Add argument. Handle ARRAY_REF and COMPONENT_REF.
+ 	* builtins.h (compute_objsize): Add argument.
+ 	* tree-ssa-strlen.c (handle_store): Handle no-warning bit.
+ 	* tree-vrp.c (vrp_prop::check_array_ref): Return warning result.
+ 	(vrp_prop::check_mem_ref): Same.
+ 	(vrp_prop::search_for_addr_array): Set no-warning bit.
+ 	(check_array_bounds): Same.
+ 
+ 2019-08-28  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR driver/80545
+ 	* opts-common.c (option_enabled): Correct checking for language
+ 	options.
+ 
+ 2019-08-28  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.c (ix86_register_move_cost): Do not
+ 	limit the cost of moves to/from XMM register to minimum 8.
+ 
+ 2019-08-28  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/91468
+ 	* ipa-cp.c (merge_agg_lats_step): Removed redundant test, made a
+ 	checking assert a normal assert to test it really is redundant.
+ 	* ipa-prop.c (compute_complex_assign_jump_func): Removed
+ 	redundant test.
+ 	(update_jump_functions_after_inlining): Removed combining unary
+ 	arithmetic operations with an ancestor jump function.
+ 	(ipcp_modif_dom_walker::before_dom_children): Fix wrong use of rhs
+ 	instead of t.
+ 
+ 2019-08-28  Richard Biener  <rguenther@suse.de>
+ 
+ 	* config/i386/i386-features.c (convert_scalars_to_vector): Do not
+ 	add the MD problem.
+ 
+ 2019-08-28  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 	    Richard Biener  <rguenther@suse.de>
+ 
+ 	* expr.c (expand_assignment): Handle misaligned DECLs.
+ 	(expand_expr_real_1): Handle FUNCTION_DECL as unaligned.
+ 	* function.c (assign_parm_adjust_stack_rtl): Check movmisalign optab
+ 	too.
+ 	(assign_parm_setup_stack): Allocate properly aligned stack slots.
+ 	* varasm.c (build_constant_desc): Align constants of misaligned types.
+ 	* config/arm/predicates.md (aligned_operand): New predicate.
+ 	* config/arm/arm.md (movdi, movsi, movhi, movhf, movsf, movdf): Use
+ 	aligned_operand to check restrictions on memory addresses.
+ 	* config/arm/neon.md (movti, mov<VSTRUCT>, mov<VH>): Likewise.
+ 	* config/arm/vec-common.md (mov<VALL>): Likewise.
+ 
+ 2019-08-28  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR libgomp/91530
+ 	* config/i386/sse.md (vec_shl_<mode>, vec_shr_<mode>): Use
+ 	V_128 iterator instead of VI_128.
+ 
+ 2019-08-28  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/90970
+ 	* builtins.c (check_access): Remove assignment to maxread
+ 	as it hasn't been used since when it was introduced in r255755.
+ 
+ 2019-08-27  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/91567
+ 	* gimple-ssa-sprintf.c (get_string_length): Handle more forms of lengths
+ 	of unknown strings.
+ 	* vr-values.c (vr_values::extract_range_basic): Set strlen upper bound
+ 	to PTRDIFF_MAX - 2.
+ 
+ 2019-08-27  Jeff Law  <law@redhat.com>
+ 
+ 	* tree-ssa-strlen.c (printf_strlen_execute): Initialize
+ 	the loop optimizer and SCEV before sizing ssa_ver_to_stridx.
+ 
+ 2019-08-27  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/91528
+ 	* config/i386/i386-features.c (convert_scalars_to_vector):
+ 	Update crtl->stack_realign_needed, crtl->stack_realign_tried and
+ 	crtl->stack_realign_processed.  Update crtl->drap_reg by calling
+ 	targetm.calls.get_drap_rtx.  If drap_rtx is non-null then
+ 	Update crtl->args.internal_arg_pointer and call fixup_tail_calls.
+ 
+ 2019-08-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	* config/i386/i386-features.h
+ 	(general_scalar_chain::~general_scalar_chain): Add.
+ 	(general_scalar_chain::insns_conv): New bitmap.
+ 	(general_scalar_chain::n_sse_to_integer): New.
+ 	(general_scalar_chain::n_integer_to_sse): Likewise.
+ 	(general_scalar_chain::make_vector_copies): Adjust signature.
+ 	* config/i386/i386-features.c
+ 	(general_scalar_chain::general_scalar_chain): Outline,
+ 	initialize new members.
+ 	(general_scalar_chain::~general_scalar_chain): New.
+ 	(general_scalar_chain::mark_dual_mode_def): Record insns
+ 	we need to insert conversions at and count them.
+ 	(general_scalar_chain::compute_convert_gain): Account
+ 	for conversion instructions at chain boundary.
+ 	(general_scalar_chain::make_vector_copies): Generate a single
+ 	copy for a def by a specific insn.
+ 	(general_scalar_chain::convert_registers): First populate
+ 	defs_map, then make copies at out-of chain insns.
+ 
+ 2019-08-27  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (stack_protect_set_insn): Add security-related
+ 	comment.
+ 	* config/aarch64/aarch64.md (stack_protect_set_<mode>): Likewise.
+ 
+ 2019-08-27  Martin Liska  <mliska@suse.cz>
+ 
+ 	* cgraph.c (cgraph_node::remove): Remove dead assignment before
+ 	loop.
+ 	* config/i386/i386-features.c (scalar_chain::emit_conversion_insns):
+ 	Enclose in anonymous namespace.
+ 	* config/i386/x86-tune-costs.h (struct processor_costs): Wrap
+ 	hard_register initialization in braces.
+ 	* tree-vrp.h (value_range_base::supports_type_p): Return false
+ 	for function with boolean return type.
+ 
+ 2019-08-26  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.c (emit_i387_cw_initialization)
+ 	<case I387_CW_ROUNDEVEN>: Fix masking operand value.
+ 
+ 2019-08-26  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR c++/83431
+ 	* gimple-ssa-sprintf.c (pass_data_sprintf_length): Remove object.
+ 	(sprintf_dom_walker): Remove class.
+ 	(get_int_range): Make argument const.
+ 	(directive::fmtfunc, directive::set_precision): Same.
+ 	(format_none): Same.
+ 	(build_intmax_type_nodes): Same.
+ 	(adjust_range_for_overflow): Same.
+ 	(format_floating): Same.
+ 	(format_character): Same.
+ 	(format_string): Same.
+ 	(format_plain): Same.
+ 	(get_int_range): Cast away constness.
+ 	(format_integer): Same.
+ 	(get_string_length): Call get_range_strlen_dynamic.  Handle
+ 	null lendata.maxbound.
+ 	(should_warn_p): Adjust argument scope qualifier.
+ 	(maybe_warn): Same.
+ 	(format_directive): Same.
+ 	(parse_directive): Same.
+ 	(is_call_safe): Same.
+ 	(try_substitute_return_value): Same.
+ 	(sprintf_dom_walker::handle_printf_call): Rename...
+ 	(handle_printf_call): ...to this.  Initialize target to host charmap
+ 	here instead of in pass_sprintf_length::execute.
+ 	(struct call_info): Make global.
+ 	(sprintf_dom_walker::compute_format_length): Make global.
+ 	(sprintf_dom_walker::handle_gimple_call): Same.
+ 	* passes.def (pass_sprintf_length): Replace with pass_strlen.
+ 	* print-rtl.c (print_pattern): Reduce the number of spaces to
+ 	avoid -Wformat-truncation.
+ 	* tree-pass.h (make_pass_warn_printf): New function.
+ 	* tree-ssa-strlen.c (strlen_optimize): New variable.
+ 	(get_string_length): Add comments.
+ 	(get_range_strlen_dynamic): New function.
+ 	(check_and_optimize_call): New function.
+ 	(handle_integral_assign): New function.
+ 	(strlen_check_and_optimize_stmt): Factor code out into
+ 	strlen_check_and_optimize_call and handle_integral_assign.
+ 	(strlen_dom_walker::evrp): New member.
+ 	(strlen_dom_walker::before_dom_children): Use evrp member.
+ 	(strlen_dom_walker::after_dom_children): Use evrp member.
+ 	(printf_strlen_execute): New function.
+ 	(pass_strlen::gate): Update to handle printf calls.
+ 	(dump_strlen_info): New function.
+ 	(pass_data_warn_printf): New variable.
+ 	(pass_warn_printf): New class.
+ 	* tree-ssa-strlen.h (get_range_strlen_dynamic): Declare.
+ 	(handle_printf_call): Same.
+ 	* tree-vrp.c (value_range_base::type): Adjust assertion.
+ 	* vr-values.c (vr_values::update_value_range): Use type of the first
+ 	argument rather than the second.
+ 
+ 2019-08-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	* config/i386/i386-features.c (general_remove_non_convertible_regs):
+ 	Remove.
+ 	(convert_scalars_to_vector): Do not call it.
+ 
+ 2019-08-26  Tejas Joshi  <tejasjoshi9673@gmail.com>
+ 	    Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	* builtins.c (mathfn_built_in_2): Change CASE_MATHFN to
+ 	CASE_MATHFN_FLOATN for roundeven.
+ 	* config/i386/i386.c (ix86_i387_mode_needed): Add case
+ 	I387_ROUNDEVEN.
+ 	(ix86_mode_needed): Likewise.
+ 	(ix86_mode_after): Likewise.
+ 	(ix86_mode_entry): Likewise.
+ 	(ix86_mode_exit): Likewise.
+ 	(ix86_emit_mode_set): Likewise.
+ 	(emit_i387_cw_initialization): Add case I387_CW_ROUNDEVEN.
+ 	* config/i386/i386.h (ix86_stack_slot): Add SLOT_CW_ROUNDEVEN.
+ 	(ix86_entity): Add I387_ROUNDEVEN.
+ 	(NUM_MODES_FOR_MODE_SWITCHING): Add I387_CW_ANY.
+ 	* config/i386/i386.md: Define UNSPEC_FRNDINT_ROUNDEVEN.
+ 	(define_int_iterator): Likewise.
+ 	(define_int_attr): Likewise for rounding_insn, rounding and ROUNDING.
+ 	(define_constant): Define ROUND_ROUNDEVEN mode.
+ 	(define_attr): Add roundeven mode for i387_cw.
+ 	(<rouding_insn><mode>2): Add condition for ROUND_ROUNDEVEN.
+ 	* internal-fn.def (ROUNDEVEN): New builtin function.
+ 	* optabs.def (roundeven_optab): New optab.
+ 
+ 2019-08-26  Tejas Joshi  <tejasjoshi9673@gmail.com>
+ 
+ 	* builtins.c (mathfn_built_in_2): Added CASE_MATHFN_FLOATN
+ 	for ROUNDEVEN.
+ 	* builtins.def: Added function definitions for roundeven function
+ 	variants.
+ 	* fold-const-call.c (fold_const_call_ss): Added case for roundeven
+ 	function call.  Adjust condition for floor, ceil, trunc and round.
+ 	* fold-const.c (negate_mathfn_p): Added case for roundeven function.
+ 	(tree_call_nonnegative_warnv_p): Added case for roundeven function.
+ 	(integer_valued_real_call_p): Added case for roundeven function.
+ 	* real.c (is_even): New function. Returns true if real number is even,
+ 	otherwise returns false.
+ 	(is_halfway_below): New function. Returns true if real number is
+ 	halfway between two integers, else return false.
+ 	(real_roundeven): New function. Round real number to nearest integer,
+ 	rounding halfway cases towards even.
+ 	* real.h (real_value): Added descriptive comments.  Added function
+ 	declaration for roundeven function.
+ 	* doc/extend.texi (Other Builtins): List roundeven variants among
+ 	functions which can be handled as builtins.
+ 
+ 2019-08-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR target/91522
+ 	PR target/91527
+ 	* config/i386/i386-features.h (general_scalar_chain::defs_map):
+ 	New member.
+ 	(general_scalar_chain::replace_with_subreg): Remove.
+ 	(general_scalar_chain::replace_with_subreg_in_insn): Likewise.
+ 	(general_scalar_chain::convert_reg): Adjust signature.
+ 	* config/i386/i386-features.c (scalar_chain::add_insn): Do not
+ 	iterate over all defs of a reg.
+ 	(general_scalar_chain::replace_with_subreg): Remove.
+ 	(general_scalar_chain::replace_with_subreg_in_insn): Likewise.
+ 	(general_scalar_chain::make_vector_copies): Populate defs_map,
+ 	place copy only after defs that are used as vectors in the chain.
+ 	(general_scalar_chain::convert_reg): Emit a copy for a specific
+ 	def in a specific instruction.
+ 	(general_scalar_chain::convert_op): All reg uses are converted here.
+ 	(general_scalar_chain::convert_insn): Emit copies for scalar
+ 	uses of defs here.  Replace uses with the copies we created.
+ 	Replace and convert the def.  Adjust REG_DEAD notes, remove
+ 	REG_EQUIV/EQUAL notes.
+ 	(general_scalar_chain::convert_registers): Only handle copies
+ 	into the chain here.
+ 
+ 2019-08-26  Robin Dapp  <rdapp@linux.ibm.com>
+ 
+ 	* match.pd: Add (T)(A) + CST -> (T)(A + CST).
+ 
+ 2019-08-26  Robin Dapp  <rdapp@linux.ibm.com>
+ 
+ 	* gimple-loop-versioning.cc (loop_versioning::record_address_fragment):
+ 	Add nop_convert case.
+ 	* tree-ssa-propagate.c (substitute_and_fold_dom_walker::before_dom_children):
+ 	Fold all statements if requested.
+ 	* tree-ssa-propagate.h (class substitute_and_fold_engine):
+ 	Allow to fold all statements.
+ 	* tree-vrp.c (class vrp_folder):
+ 	Let substitute_and_fold_engine fold all statements.
+ 
+ 2019-08-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91526
+ 	* passes.def: Note that after late FRE we do TODO_update_address_taken.
+ 	* tree-ssa-sccvn.c (pass_fre::execute): In late mode schedule
+ 	TODO_update_address_taken.
+ 
+ 2019-08-26  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* config/i386/gmm_malloc.h: Only use <errno.h> and errno if
+ 	__STDC_HOSTED__.
+ 
+ 2019-08-23  Mihailo Stojanovic  <mistojanovic@wavecomp.com>
+ 
+ 	* config/mips/mips.md (mips_get_fcsr, *mips_get_fcsr): Use SI
+ 	machine mode for unspec_volatile operand.
+ 
+ 2019-08-23  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* doc/invoke.texi (mneon-for-64bits): Deprecate option.
+ 	* config/arm/arm.opt (mneon-for-64bits): Deprecate option.
+ 	* config/arm/arm.h (TARGET_PREFER_NEON_64BITS): Remove.
+ 	(prefer_neon_for_64bits): Remove.
+ 	* config/arm/arm.c (prefer_neon_for_64bits): Remove.
+ 	(tune_params): Remove PREF_NEON_64_FALSE uses.
+ 	(arm_option_override): Remove prefer_neon selection code.
+ 	(arm_print_tune_info): Remove prefer_neon_for_64bits.
+ 	* config/arm/arm-protos.h (tune_params): Remove
+ 	prefer_neon_for_64bits.
+ 	(prefer_neon_for_64bits): Remove.
+ 
+ 2019-08-23  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR pch/61250
+ 	* ggc-page.c (ggc_pch_read): Read the ggc_pch_ondisk structure
+ 	and issue any diagnostics needed before collecting the pre-PCH
+ 	state.
+ 
+ 2019-08-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/91283
+ 	* common.opt (fexcess-precision=): Add Optimization flag.  Use
+ 	flag_excess_precision variable instead of
+ 	flag_excess_precision_cmdline.
+ 	* flags.h (class target_flag_state): Remove x_flag_excess_precision
+ 	member.
+ 	(flag_excess_precision): Don't define.
+ 	* langhooks.c (lhd_post_options): Set flag_excess_precision instead of
+ 	flag_excess_precision_cmdline.  Remove comment.
+ 	* opts.c (set_fast_math_flags): Use frontend_set_flag_excess_precision
+ 	and x_flag_excess_precision instead of
+ 	frontend_set_flag_excess_precision_cmdline and
+ 	x_flag_excess_precision_cmdline.
+ 	(fast_math_flags_set_p): Use x_flag_excess_precision instead of
+ 	x_flag_excess_precision_cmdline.
+ 	* toplev.c (init_excess_precision): Remove.
+ 	(lang_dependent_init_target): Don't call it.
+ 
+ 2019-08-23  Martin Liska  <mliska@suse.cz>
+ 
+ 	* lto-wrapper.c (run_gcc): When setting jobserver
+ 	set also parallel to 1.  This was done so before r273908.
+ 
+ 2019-08-23  Dennis Zhang  <dennis.zhang@arm.com>
+ 
+ 	* config/arm/arm-cpus.in (cortex-m35p): New entry.
+ 	(cortex-a76ae): Likewise.
+ 	(cortex-a77): Likewise
+ 	* config/arm/arm-tables.opt: Regenerate.
+ 	* config/arm/arm-tune.md: Likewise.
+ 	* doc/invoke.texi (ARM Options): Document cortex-m35p, cortx-a76ae,
+ 	cortex-a77 CPU options.
+ 
+ 2019-08-23  Martin Liska  <mliska@suse.cz>
+ 
+ 	* profile.c (instrument_values): Do not set
+ 	0 as last argument.
+ 	* tree-profile.c (gimple_gen_interval_profiler): Remove
+ 	last argument.
+ 	(gimple_gen_pow2_profiler): Likewise.
+ 	(gimple_gen_topn_values_profiler): Likewise.
+ 	(gimple_gen_ic_profiler): Likewise.
+ 	(gimple_gen_time_profiler): Likewise.
+ 	(gimple_gen_average_profiler): Likewise.
+ 	(gimple_gen_ior_profiler): Likewise.
+ 	* value-prof.c (dump_histogram_value): Use default
+ 	in switch statement instead of HIST_TYPE_MAX.
+ 	(stream_in_histogram_value): Likewise.
+ 	(gimple_duplicate_stmt_histograms): Do not
+ 	use NULL for implicitly set arguments.
+ 	(gimple_divmod_values_to_profile): Do not use
+ 	reserve+quick_push.
+ 	(gimple_indirect_call_to_profile): Likewise.
+ 	(gimple_find_values_to_profile): Use implicit
+ 	function call arguments.
+ 	* value-prof.h (gimple_alloc_histogram_value):
+ 	Set default values.
+ 	(gimple_gen_interval_profiler): Remove last argument.
+ 	(gimple_gen_pow2_profiler): Likewise.
+ 	(gimple_gen_topn_values_profiler): Likewise.
+ 	(gimple_gen_ic_profiler): Likewise.
+ 	(gimple_gen_time_profiler): Likewise.
+ 	(gimple_gen_average_profiler): Likewise.
+ 	(gimple_gen_ior_profiler): Likewise.
+ 
+ 2019-08-22  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/91490
+ 	* builtins.c (c_strlen): Rename argument and introduce new local.
+ 	Set no-warning bit on original argument.
+ 	* expr.c (string_constant): Pass argument type to fold_ctor_reference.
+ 	Fold empty and zero constructors into empty strings.
+ 	* gimple-fold.c (fold_nonarray_ctor_reference): Return a STRING_CST
+ 	for missing initializers.
+ 	* tree.c (build_string_literal): Handle optional argument.
+ 	* tree.h (build_string_literal): Add defaulted argument.
+ 	* gimple-ssa-warn-restrict.c (maybe_diag_access_bounds): Check
+ 	no-warning bit on original expression.
+ 
+ 2019-08-22  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR target/91481
+ 	* config/rs6000/rs6000.md (unspec): Delete UNSPEC_DARN, UNSPEC_DARN_32,
+ 	and UNSPEC_DARN_RAW.
+ 	(unspecv): New enumerator values UNSPECV_DARN, UNSPECV_DARN_32, and
+ 	UNSPECV_DARN_RAW.
+ 	(darn_32): Use an unspec_volatile, and UNSPECV_DARN_32.
+ 	(darn_raw): Use an unspec_volatile, and UNSPECV_DARN_RAW.
+ 	(darn): Use an unspec_volatile, and UNSPECV_DARN.
+ 
+ 2019-08-22  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/altivec.md (unspec): Delete UNSPEC_DARN, UNSPEC_DARN_32,
+ 	UNSPEC_DARN_RAW, UNSPEC_CMPRB, UNSPEC_CMPRB2, UNSPEC_CMPEQB; move to...
+ 	* config/rs6000/rs6000.md (unspec): ... here.
+ 	* config/rs6000/altivec.md (darn_32, darn_raw, darn, cmprb,
+ 	*cmprb_internal, setb_signed, setb_unsigned, cmprb2, *cmprb2_internal,
+ 	cmpeqb, *cmpeqb_internal): Delete, move to...
+ 	* config/rs6000/rs6000.md (darn_32, darn_raw, darn, cmprb,
+ 	*cmprb_internal, setb_signed, setb_unsigned, cmprb2, *cmprb2_internal,
+ 	cmpeqb, *cmpeqb_internal): ... here.
+ 
+ 2019-08-22  Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/arm_acle.h: Use arch=armv8-a+crc+simd pragma for CRC32
+ 	intrinsics if __ARM_FP.
+ 	Use __ARM_FEATURE_CRC32 ifdef guard.
+ 
+ 2019-08-22  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/arm.md (neon_for_64bits): Remove.
+ 	(avoid_neon_for_64bits): Remove.
+ 	(arm_adddi3): Always split early.
+ 	(arm_subdi3): Always split early.
+ 	(negdi2): Remove Neon expansion.
+ 	(split zero_extend): Split before reload.
+ 	(split sign_extend): Split before reload.
+ 
+ 2019-08-22  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/iterators.md (qhs_extenddi_cstr): Update.
+ 	(qhs_extenddi_cstr): Likewise.
+ 	* config/arm/arm.md (ashldi3): Always expand early.
+ 	(ashlsi3): Likewise.
+ 	(ashrsi3): Likewise.
+ 	(zero_extend<mode>di2): Remove Neon variants.
+ 	(extend<mode>di2): Likewise.
+ 	* config/arm/neon.md (ashldi3_neon_noclobber): Remove.
+ 	(signed_shift_di3_neon): Likewise.
+ 	(unsigned_shift_di3_neon): Likewise.
+ 	(ashrdi3_neon_imm_noclobber): Likewise.
+ 	(lshrdi3_neon_imm_noclobber): Likewise.
+ 	(<shift>di3_neon): Likewise.
+ 	(split extend): Remove DI extend split patterns.
+ 
+ 2019-08-22  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/arm.md (split and/eor/ior): Remove Neon check.
+ 	(split not): Add DImode not splitter.
+ 	(anddi3): Remove pattern.
+ 	(anddi3_insn): Likewise.
+ 	(anddi_zesidi_di): Likewise.
+ 	(anddi_sesdi_di): Likewise.
+ 	(anddi_notdi_di): Likewise.
+ 	(anddi_notzesidi_di): Likewise.
+ 	(anddi_notsesidi_di): Likewise.
+ 	(iordi3): Likewise.
+ 	(iordi3_insn): Likewise.
+ 	(iordi_zesidi_di): Likewise.
+ 	(iordi_sesidi_di): Likewise.
+ 	(xordi3): Likewise.
+ 	(xordi3_insn): Likewise.
+ 	(xordi_sesidi_di): Likewise.
+ 	(xordi_zesidi_di): Likewise.
+ 	(one_cmpldi2): Likewise.
+ 	(one_cmpldi2_insn): Likewise.
+ 	* config/arm/constraints.md: Remove De, Df, Dg constraints.
+ 	* config/arm/iwmmxt.md (iwmmxt_iordi3): Remove general register
+ 	alternative.
+ 	(iwmmxt_xordi3): Likewise.
+ 	(iwmmxt_anddi3): Likewise.
+ 	* config/arm/neon.md (orndi3_neon): Remove pattern.
+ 	(anddi_notdi_di): Likewise.
+ 	* config/arm/predicates.md (arm_anddi_operand_neon): Remove.
+ 	(arm_iordi_operand_neon): Likewise.
+ 	(arm_xordi_operand_neon): Likewise.
+ 	* config/arm/thumb2.md(iordi_notdi_di): Remove pattern.
+ 	(iordi_notzesidi_di): Likewise.
+ 	(iordi_notdi_zesidi): Likewise.
+ 	(iordi_notsesidi_di): Likewise.
+ 
+ 2019-08-22  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (iorsi3_compare0): Add alternative for 16-bit thumb
+ 	insn.
+ 	(iorsi3_compare0_scratch): Likewise.
+ 
+ 2019-08-22  Sylvia Taylor  <sylvia.taylor@arm.com>
+ 
+ 	* config/aarch64/aarch64-simd-builtins.def:
+ 	(ld1x4): New.
+ 	(st1x4): Likewise.
+ 	* config/aarch64/aarch64-simd.md:
+ 	(aarch64_ld1x4<VALLDIF:mode>): New pattern.
+ 	(aarch64_st1x4<VALLDIF:mode>): Likewise.
+ 	(aarch64_ld1_x4_<mode>): Likewise.
+ 	(aarch64_st1_x4_<mode>): Likewise.
+ 	* config/aarch64/arm_neon.h:
+ 	(vld1_s8_x4): New function.
+ 	(vld1q_s8_x4): Likewise.
+ 	(vld1_s16_x4): Likewise.
+ 	(vld1q_s16_x4): Likewise.
+ 	(vld1_s32_x4): Likewise.
+ 	(vld1q_s32_x4): Likewise.
+ 	(vld1_u8_x4): Likewise.
+ 	(vld1q_u8_x4): Likewise.
+ 	(vld1_u16_x4): Likewise.
+ 	(vld1q_u16_x4): Likewise.
+ 	(vld1_u32_x4): Likewise.
+ 	(vld1q_u32_x4): Likewise.
+ 	(vld1_f16_x4): Likewise.
+ 	(vld1q_f16_x4): Likewise.
+ 	(vld1_f32_x4): Likewise.
+ 	(vld1q_f32_x4): Likewise.
+ 	(vld1_p8_x4): Likewise.
+ 	(vld1q_p8_x4): Likewise.
+ 	(vld1_p16_x4): Likewise.
+ 	(vld1q_p16_x4): Likewise.
+ 	(vld1_s64_x4): Likewise.
+ 	(vld1_u64_x4): Likewise.
+ 	(vld1_p64_x4): Likewise.
+ 	(vld1q_s64_x4): Likewise.
+ 	(vld1q_u64_x4): Likewise.
+ 	(vld1q_p64_x4): Likewise.
+ 	(vld1_f64_x4): Likewise.
+ 	(vld1q_f64_x4): Likewise.
+ 	(vst1_s8_x4): Likewise.
+ 	(vst1q_s8_x4): Likewise.
+ 	(vst1_s16_x4): Likewise.
+ 	(vst1q_s16_x4): Likewise.
+ 	(vst1_s32_x4): Likewise.
+ 	(vst1q_s32_x4): Likewise.
+ 	(vst1_u8_x4): Likewise.
+ 	(vst1q_u8_x4): Likewise.
+ 	(vst1_u16_x4): Likewise.
+ 	(vst1q_u16_x4): Likewise.
+ 	(vst1_u32_x4): Likewise.
+ 	(vst1q_u32_x4): Likewise.
+ 	(vst1_f16_x4): Likewise.
+ 	(vst1q_f16_x4): Likewise.
+ 	(vst1_f32_x4): Likewise.
+ 	(vst1q_f32_x4): Likewise.
+ 	(vst1_p8_x4): Likewise.
+ 	(vst1q_p8_x4): Likewise.
+ 	(vst1_p16_x4): Likewise.
+ 	(vst1q_p16_x4): Likewise.
+ 	(vst1_s64_x4): Likewise.
+ 	(vst1_u64_x4): Likewise.
+ 	(vst1_p64_x4): Likewise.
+ 	(vst1q_s64_x4): Likewise.
+ 	(vst1q_u64_x4): Likewise.
+ 	(vst1q_p64_x4): Likewise.
+ 	(vst1_f64_x4): Likewise.
+ 	(vst1q_f64_x4): Likewise.
+ 
+ 2019-08-22  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	* config/aarch64/aarch64-sve.md (vcond_mask): Add "@".
+ 
+ 2019-08-22  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 	    Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR target/88839
+ 	* config/aarch64/aarch64.c (aarch64_evpc_sel): New function.
+ 	(aarch64_expand_vec_perm_const_1): Call aarch64_evpc_sel.
+ 
+ 2019-08-21  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	PR target/90724
+ 	* config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): Force y
+ 	in reg if it fails aarch64_plus_operand predicate.
+ 
+ 2019-08-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91482
+ 	* tree-ssa-ccp.c (ccp_folder::fold_stmt): Remove useless
+ 	BUILT_IN_ASSUME_ALIGNED calls.
+ 
+ 2019-08-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR target/91498
+ 	PR target/91503
+ 	* config/i386/i386-features.c
+ 	(general_scalar_chain::make_vector_copies): Copy stack temporary
+ 	rtx when using it multiple times.
+ 	(general_scalar_chain::convert_reg): Likewise.
+ 
+ 2019-08-20  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* function.c (assign_parm_find_stack_rtl): Use known_eq instead of ==.
+ 
+ 2019-08-20  Matthew Beliveau  <mbelivea@redhat.com>
+ 
+ 	* tree-ssa-dse.c (dse_optimize_redundant_stores): Improved check to
+ 	catch more redundant zero initialization cases.
+ 	(dse_dom_walker::dse_optimize_stmt): Likewise.
+ 
+ 2019-08-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR lto/91307
+ 	* ipa.c (cgraph_build_static_cdtor_1): Use names not recognizable
+ 	by collect2 when targetm.have_ctors_dtors which avoids dragging
+ 	in temporary filenames from LTO input objects.
+ 
+ 2019-08-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/37242
+ 	* tree-ssa-sccvn.c (visit_nary_op): Also CSE (T)(a + b)
+ 	to (T)a + (T)b if we know that a + b does not overflow.
+ 
+ 2019-08-20  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR rtl-optimization/91347
+ 	* dse.c (scan_insn): Call add_wild_read for non-const/memset tail calls
+ 	before reload if HARD_FRAME_POINTER_IS_ARG_POINTER.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* calls.h (function_arg_info): Add a pass_by_reference field,
+ 	defaulting to false.
+ 	* calls.c (apply_pass_by_reference_rules): Set pass_by_reference
+ 	when applying pass-by-reference semantics.
+ 	(initialize_argument_information): Likewise.
+ 	(emit_library_call_value_1): Likewise.
+ 	* function.c (assign_parm_data_one): Remove passed_pointer field.
+ 	(assign_parm_find_data_types): Don't set it.
+ 	(assign_parm_find_stack_rtl, assign_parm_adjust_stack_rtl)
+ 	(assign_parm_setup_reg, assign_parms, gimplify_parameters): Use
+ 	arg.pass_by_reference instead of passed_pointer.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* calls.c (emit_library_call_value_1): Merge arg and orig_arg
+ 	into a single function_arg_info, updating its fields when we
+ 	apply pass-by-reference and promotion semantics.  Use the
+ 	function_arg_info to track the mode rather than keeping it in
+ 	a separate local variable.
+ 	(initialize_argument_information): Likewise.  Base the final
+ 	arg_to_skip on this new function_arg_info rather than creating
+ 	a new one from scratch.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* function.c (assign_parm_data_one): Replace passed_type,
+ 	promoted_mode and named_arg with a function_arg_info field.
+ 	(assign_parm_find_data_types): Remove local variables and
+ 	assign directly to "data".  Make data->passed_mode shadow
+ 	data->arg.mode until promotion, then assign the promoted
+ 	mode to data->arg.mode.
+ 	(assign_parms_setup_varargs, assign_parm_find_entry_rtl)
+ 	(assign_parm_find_stack_rtl, assign_parm_adjust_entry_rtl)
+ 	(assign_parm_remove_parallels, assign_parm_setup_block_p)
+ 	(assign_parm_setup_block, assign_parm_setup_reg)
+ 	(assign_parm_setup_stack, assign_parms, gimplify_parameters): Use
+ 	arg.mode instead of promoted_mode, arg.type instead of passed_type
+ 	and arg.named instead of named_arg.  Use data->arg for
+ 	function_arg_info structures that had the field values passed_type,
+ 	promoted_mode and named_arg.  Base other function_arg_infos on
+ 	data->arg, changing the necessary properties.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* calls.h (apply_pass_by_reference_rules): Declare.
+ 	* calls.c (apply_pass_by_reference_rules): New function.
+ 	* config/c6x/c6x.c (c6x_call_saved_register_used): Use it.
+ 	* config/rs6000/rs6000-call.c (rs6000_parm_needs_stack): Likewise.
+ 	* config/s390/s390.c (s390_call_saved_register_used): Likewise.
+ 	* function.c (assign_parm_find_data_types): Likewise.
+ 	* var-tracking.c (prepare_call_arguments): Likewise.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (must_pass_in_stack): Take a function_arg_info instead
+ 	of a mode and a type.
+ 	* doc/tm.texi: Regenerate.
+ 	* calls.h (must_pass_in_stack_var_size): Take a function_arg_info
+ 	instead of a mode and a type.
+ 	(must_pass_in_stack_var_size_or_pad): Likewise.
+ 	* calls.c (must_pass_in_stack_var_size): Likewise.
+ 	(must_pass_in_stack_var_size_or_pad): Likewise.
+ 	(initialize_argument_information): Update call to
+ 	targetm.calls.must_pass_in_stack.
+ 	(must_pass_va_arg_on_stack): Likewise.
+ 	* function.c (assign_parm_find_entry_rtl): Likewise.
+ 	* targhooks.c (hook_pass_by_reference_must_pass_in_stack): Likewise.
+ 	* config/alpha/alpha.c (alpha_function_arg): Likewise.
+ 	(alpha_function_arg_advance): Likewise.
+ 	* config/cr16/cr16.c (cr16_function_arg): Likewise.
+ 	(cr16_function_arg_advance): Likewise.
+ 	* config/cris/cris.c (cris_pass_by_reference): Likewise.
+ 	(cris_arg_partial_bytes): Likewise.
+ 	* config/iq2000/iq2000.c (iq2000_pass_by_reference): Likewise.
+ 	* config/lm32/lm32.c (lm32_function_arg): Likewise.
+ 	* config/mcore/mcore.c (mcore_num_arg_regs): Likewise.
+ 	(mcore_function_arg, mcore_arg_partial_bytes): Likewise.
+ 	* config/mips/mips.c (mips_pass_by_reference): Likewise.
+ 	* config/mmix/mmix.c (mmix_function_arg_advance): Likewise.
+ 	(mmix_function_arg_1, mmix_pass_by_reference): Likewise.
+ 	* config/sh/sh.c (sh_pass_by_reference): Likewise.
+ 	* config/stormy16/stormy16.c (xstormy16_function_arg): Likewise.
+ 	* config/xtensa/xtensa.c (xtensa_function_arg_advance): Likewise.
+ 	* config/arm/arm.c (arm_must_pass_in_stack): Take a function_arg_info
+ 	instead of a mode and a type.
+ 	* config/fr30/fr30.c (fr30_must_pass_in_stack): Likewise.
+ 	(fr30_num_arg_regs): Likewise.
+ 	(fr30_setup_incoming_varargs): Update calls accordingly.
+ 	(fr30_arg_partial_bytes, fr30_function_arg): Likewise.
+ 	(fr30_function_arg_advance): Likewise.
+ 	* config/frv/frv.c (frv_must_pass_in_stack): Take a function_arg_info
+ 	instead of a mode and a type.
+ 	* config/gcn/gcn.c (num_arg_regs): Likewise.
+ 	(gcn_function_arg, gcn_function_arg_advance): Update calls to
+ 	num_arg_regs and targetm.calls.must_pass_in_stack.
+ 	(gcn_arg_partial_bytes): Likewise.
+ 	* config/i386/i386.c (ix86_must_pass_in_stack): Take a
+ 	function_arg_info instead of a mode and a type.
+ 	(classify_argument): Update call accordingly.
+ 	* config/nds32/nds32.c (nds32_must_pass_in_stack): Take a
+ 	function_arg_info instead of a mode and a type.
+ 	* config/rs6000/rs6000-internal.h (rs6000_must_pass_in_stack):
+ 	Likewise.
+ 	* config/rs6000/rs6000-call.c (rs6000_must_pass_in_stack): Likewise.
+ 	(rs6000_parm_needs_stack): Update call accordingly.
+ 	(setup_incoming_varargs): Likewise.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (callee_copies): Take a function_arg_info instead
+ 	of a mode, type and named flag.
+ 	* doc/tm.texi: Regenerate.
+ 	* targhooks.h (hook_callee_copies_named): Take a function_arg_info
+ 	instead of a mode, type and named flag.
+ 	(hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false): Delete.
+ 	(hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true): Likewise.
+ 	(hook_bool_CUMULATIVE_ARGS_arg_info_true): New function.
+ 	* targhooks.c (hook_callee_copies_named): Take a function_arg_info
+ 	instead of a mode, type and named flag.
+ 	(hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false): Delete.
+ 	(hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true): Likewise.
+ 	(hook_bool_CUMULATIVE_ARGS_arg_info_true): New function.
+ 	* calls.h (reference_callee_copied): Take a function_arg_info
+ 	instead of a mode, type and named flag.
+ 	* calls.c (reference_callee_copied): Likewise.
+ 	(initialize_argument_information): Update call accordingly.
+ 	(emit_library_call_value_1): Likewise.
+ 	* function.c (gimplify_parameters): Likewise.
+ 	* config/aarch64/aarch64.c (TARGET_CALLEE_COPIES): Define to
+ 	hook_bool_CUMULATIVE_ARGS_arg_info_false instead of
+ 	hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false.
+ 	* config/c6x/c6x.c (c6x_callee_copies): Delete.
+ 	(TARGET_CALLEE_COPIES): Define to
+ 	hook_bool_CUMULATIVE_ARGS_arg_info_true instead.
+ 	* config/epiphany/epiphany.c (TARGET_CALLEE_COPIES): Define to
+ 	hook_bool_CUMULATIVE_ARGS_arg_info_true instead of
+ 	hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true.
+ 	* config/mips/mips.c (mips_callee_copies): Take a function_arg_info
+ 	instead of a mode, type and named flag.
+ 	* config/mmix/mmix.c (TARGET_CALLEE_COPIES): Define to
+ 	hook_bool_CUMULATIVE_ARGS_arg_info_true instead of
+ 	hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true.
+ 	* config/mn10300/mn10300.c (TARGET_CALLEE_COPIES): Likewise.
+ 	* config/msp430/msp430.c (msp430_callee_copies): Delete.
+ 	(TARGET_CALLEE_COPIES): Define to
+ 	hook_bool_CUMULATIVE_ARGS_arg_info_true instead.
+ 	* config/pa/pa.c (pa_callee_copies): Take a function_arg_info
+ 	instead of a mode, type and named flag.
+ 	* config/sh/sh.c (sh_callee_copies): Likewise.
+ 	* config/v850/v850.c (TARGET_CALLEE_COPIES): Define to
+ 	hook_bool_CUMULATIVE_ARGS_arg_info_true instead of
+ 	hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (function_arg_advance): Take a function_arg_info instead
+ 	of a mode, type and named flag.
+ 	* doc/tm.texi: Regenerate.
+ 	* targhooks.h (default_function_arg_advance): Take a function_arg_info
+ 	instead of a mode, type and named flag.
+ 	* targhooks.c (default_function_arg_advance): Likewise.
+ 	* calls.c (initialize_argument_information): Update call to
+ 	targetm.calls.function_arg_advance.
+ 	(emit_library_call_value_1): Likewise.
+ 	* dse.c (get_call_args): Likewise.
+ 	* expr.c (block_move_libcall_safe_for_call_parm): Likewise.
+ 	* function.c (assign_parms, gimplify_parameters): Likewise.
+ 	* var-tracking.c (prepare_call_arguments): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	(aarch64_setup_incoming_varargs): Update call accordingly.
+ 	* config/alpha/alpha.c (alpha_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	(alpha_setup_incoming_varargs): Update call accordingly.
+ 	* config/arc/arc.c (arc_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	(arc_setup_incoming_varargs): Update call accordingly.
+ 	* config/arm/arm.c (arm_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	(cmse_func_args_or_return_in_stack): Update call accordingly.
+ 	(arm_function_ok_for_sibcall): Likewise.
+ 	(cmse_nonsecure_call_clear_caller_saved): Likewise.
+ 	* config/avr/avr.c (avr_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/bfin/bfin.c (bfin_function_arg_advance): Likewise.
+ 	* config/c6x/c6x.c (c6x_function_arg_advance): Likewise.
+ 	(c6x_call_saved_register_used): Update call accordingly.
+ 	* config/cr16/cr16.c (cr16_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/cris/cris.c (cris_function_arg_advance): Likewise.
+ 	* config/csky/csky.c (csky_function_arg_advance): Likewise.
+ 	(csky_setup_incoming_varargs): Update call accordingly.
+ 	* config/epiphany/epiphany.c (epiphany_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/fr30/fr30.c (fr30_function_arg_advance): Likewise.
+ 	* config/frv/frv.c (frv_function_arg_advance): Likewise.
+ 	* config/ft32/ft32.c (ft32_function_arg_advance): Likewise.
+ 	* config/gcn/gcn.c (gcn_function_arg_advance): Likewise.
+ 	* config/h8300/h8300.c (h8300_function_arg_advance): Likewise.
+ 	* config/i386/i386.c (ix86_function_arg_advance): Likewise.
+ 	(ix86_setup_incoming_varargs): Update call accordingly.
+ 	* config/ia64/ia64.c (ia64_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	(ia64_setup_incoming_varargs): Update call accordingly.
+ 	* config/iq2000/iq2000.c (iq2000_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	(iq2000_expand_prologue): Update call accordingly.
+ 	* config/lm32/lm32.c (lm32_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/m32c/m32c.c (m32c_function_arg_advance): Likewise.
+ 	* config/m32r/m32r.c (m32r_function_arg_advance): Likewise.
+ 	* config/m68k/m68k.c (m68k_function_arg_advance): Likewise.
+ 	* config/mcore/mcore.c (mcore_function_arg_advance): Likewise.
+ 	* config/microblaze/microblaze.c (microblaze_function_arg_advance):
+ 	Likewise.
+ 	(microblaze_expand_prologue): Update call accordingly.
+ 	* config/mips/mips.c (mips_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	(mips_setup_incoming_varargs): Update call accordingly.
+ 	(mips_output_args_xfer): Likewise.
+ 	* config/mmix/mmix.c (mmix_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/mn10300/mn10300.c (mn10300_function_arg_advance): Likewise.
+ 	* config/moxie/moxie.c (moxie_function_arg_advance): Likewise.
+ 	* config/msp430/msp430.c (msp430_function_arg_advance): Likewise.
+ 	* config/nds32/nds32.c (nds32_function_arg_advance): Likewise.
+ 	* config/nios2/nios2.c (nios2_function_arg_advance): Likewise.
+ 	(nios2_setup_incoming_varargs): Update call accordingly.
+ 	* config/nvptx/nvptx.c (nvptx_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/or1k/or1k.c (or1k_function_arg_advance): Likewise.
+ 	* config/pa/pa.c (pa_function_arg_advance): Likewise.
+ 	* config/pdp11/pdp11.c (pdp11_function_arg_advance): Likewise.
+ 	* config/pru/pru.c (pru_function_arg_advance): Likewise.
+ 	* config/riscv/riscv.c (riscv_function_arg_advance): Likewise.
+ 	(riscv_setup_incoming_varargs): Update call accordingly.
+ 	* config/rl78/rl78.c (rl78_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/rs6000/rs6000-internal.h (rs6000_function_arg_advance):
+ 	Likewise.
+ 	* config/rs6000/rs6000-call.c (rs6000_function_arg_advance): Likewise.
+ 	(rs6000_parm_needs_stack): Update call accordingly.
+ 	* config/rx/rx.c (rx_function_arg_advance): Take a function_arg_info
+ 	instead of a mode, type and named flag.
+ 	* config/s390/s390.c (s390_function_arg_advance): Likewise.
+ 	(s390_call_saved_register_used): Update call accordingly.
+ 	* config/sh/sh.c (sh_function_arg_advance): Take a function_arg_info
+ 	instead of a mode, type and named flag.
+ 	(sh_output_mi_thunk): Update call accordingly.
+ 	* config/sparc/sparc.c (sparc_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/spu/spu.c (spu_function_arg_advance): Likewise.
+ 	(spu_setup_incoming_varargs): Update call accordingly.
+ 	* config/stormy16/stormy16.c (xstormy16_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/tilegx/tilegx.c (tilegx_function_arg_advance): Likewise.
+ 	(tilegx_setup_incoming_varargs): Update call accordingly.
+ 	* config/tilepro/tilepro.c (tilepro_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	(tilegx_setup_incoming_varargs): Update call accordingly.
+ 	* config/v850/v850.c (v850_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/vax/vax.c (vax_function_arg_advance): Likewise.
+ 	* config/visium/visium.c (visium_function_arg_advance): Likewise.
+ 	(visium_setup_incoming_varargs): Update call accordingly.
+ 	* config/xtensa/xtensa.c (xtensa_function_arg_advance): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (function_arg, function_incoming_arg): Take a
+ 	function_arg_info instead of a mode, tree and named flag.
+ 	* doc/tm.texi: Regenerate.
+ 	* targhooks.h (default_function_arg): Take a function_arg_info
+ 	instead of a mode, tree and named flag.
+ 	(default_function_incoming_arg): Likewise.
+ 	* targhooks.c (default_function_arg): Likewise.
+ 	(default_function_incoming_arg): Likewise.
+ 	* calls.h (function_arg_info::end_marker_p): New function.
+ 	(function_arg_info::end_marker): Likewise.
+ 	* calls.c (prepare_call_address, initialize_argument_information)
+ 	(expand_call, emit_library_call_value_1): Update calls to
+ 	targetm.calls.function_arg and targetm.calls.function_incoming_arg.
+ 	* dse.c: Include calls.h.
+ 	(get_call_args): Update call to targetm.calls.function_arg.
+ 	* expr.c (block_move_libcall_safe_for_call_parm): Likewise.
+ 	* var-tracking.c (prepare_call_arguments): Likewise.
+ 	* function.c (assign_parm_find_entry_rtl): Update call to
+ 	targetm.calls.function_incoming_arg.
+ 	* config/aarch64/aarch64.c (aarch64_function_arg): Take a
+ 	function_arg_info instead of a mode, tree and named flag.
+ 	* config/alpha/alpha.c (alpha_function_arg): Likewise.
+ 	* config/arc/arc.c (arc_function_arg): Likewise.
+ 	* config/arm/arm.c (arm_function_arg): Likewise.
+ 	(cmse_func_args_or_return_in_stack): Update call accordingly.
+ 	(arm_function_ok_for_sibcall): Likewise.
+ 	(cmse_nonsecure_call_clear_caller_saved): Likewise.
+ 	* config/avr/avr.c (avr_function_arg): Take a function_arg_info
+ 	instead of a mode, tree and named flag.
+ 	* config/bfin/bfin.c (bfin_function_arg): Likewise.
+ 	* config/c6x/c6x.c (c6x_function_arg): Likewise.
+ 	(c6x_call_saved_register_used): Update call accordingly.
+ 	* config/cr16/cr16.c (cr16_function_arg): Take a function_arg_info
+ 	instead of a mode, tree and named flag.
+ 	* config/cris/cris.c (cris_function_arg, cris_function_incoming_arg)
+ 	(cris_function_arg_1): Likewise.
+ 	* config/csky/csky.c (csky_function_arg): Likewise.
+ 	* config/epiphany/epiphany.c (epiphany_function_arg): Likewise.
+ 	* config/fr30/fr30.c (fr30_function_arg): Likewise.
+ 	* config/frv/frv.c (frv_function_arg, frv_function_incoming_arg)
+ 	(frv_function_arg_1): Likewise.
+ 	* config/ft32/ft32.c (ft32_function_arg): Likewise.
+ 	* config/gcn/gcn.c (gcn_function_arg): Likewise.
+ 	* config/h8300/h8300.c (h8300_function_arg): Likewise.
+ 	* config/i386/i386.c (ix86_function_arg): Likewise.
+ 	* config/ia64/ia64.c (ia64_function_arg, ia64_function_incoming_arg)
+ 	(ia64_function_arg_1): Likewise.
+ 	* config/iq2000/iq2000.c (iq2000_function_arg): Likewise.
+ 	(iq2000_expand_prologue, iq2000_pass_by_reference): Update call
+ 	accordingly.
+ 	* config/lm32/lm32.c (lm32_function_arg): Take a function_arg_info
+ 	instead of a mode, tree and named flag.
+ 	* config/m32c/m32c.c (m32c_function_arg): Likewise.
+ 	* config/m32r/m32r.c (m32r_function_arg): Likewise.
+ 	* config/m68k/m68k.c (m68k_function_arg): Likewise.
+ 	* config/mcore/mcore.c (mcore_function_arg): Likewise.
+ 	* config/microblaze/microblaze.c (microblaze_function_arg): Likewise.
+ 	(microblaze_expand_prologue): Update call accordingly.
+ 	* config/mips/mips.c (mips_function_arg): Take a function_arg_info
+ 	instead of a mode, tree and named flag.
+ 	* config/mmix/mmix.c (mmix_function_incoming_arg, mmix_function_arg)
+ 	(mmix_function_arg_1): Likewise.
+ 	* config/mn10300/mn10300.c (mn10300_function_arg): Likewise.
+ 	* config/moxie/moxie.c (moxie_function_arg): Likewise.
+ 	* config/msp430/msp430.c (msp430_function_arg): Likewise.
+ 	* config/nds32/nds32.c (nds32_function_arg): Likewise.
+ 	* config/nios2/nios2.c (nios2_function_arg): Likewise.
+ 	* config/nvptx/nvptx.c (nvptx_function_arg): Likewise.
+ 	(nvptx_function_incoming_arg): Likewise.
+ 	* config/or1k/or1k.c (or1k_function_arg): Likewise.
+ 	* config/pa/pa.c (pa_function_arg): Likewise.
+ 	* config/pdp11/pdp11.c (pdp11_function_arg): Likewise.
+ 	* config/pru/pru.c (pru_function_arg): Likewise.
+ 	* config/riscv/riscv.c (riscv_function_arg): Likewise.
+ 	* config/rl78/rl78.c (rl78_function_arg): Likewise.
+ 	* config/rs6000/rs6000-internal.h (rs6000_function_arg): Likewise.
+ 	* config/rs6000/rs6000-call.c (rs6000_function_arg): Likewise.
+ 	(rs6000_parm_needs_stack): Update call accordingly.
+ 	* config/rx/rx.c (rx_function_arg): Take a function_arg_info
+ 	instead of a mode, tree and named flag.
+ 	* config/s390/s390.c (s390_function_arg): Likewise.
+ 	(s390_call_saved_register_used): Update call accordingly.
+ 	* config/sh/sh.c (sh_function_arg): Take a function_arg_info
+ 	instead of a mode, tree and named flag.
+ 	(sh_output_mi_thunk): Update call accordingly.
+ 	* config/sparc/sparc.c (sparc_function_arg_1, sparc_function_arg)
+ 	(sparc_function_incoming_arg): Take a function_arg_info instead of
+ 	a mode, tree and named flag.
+ 	* config/spu/spu.c (spu_function_arg): Likewise.
+ 	* config/stormy16/stormy16.c (xstormy16_function_arg): Likewise.
+ 	* config/tilegx/tilegx.c (tilegx_function_arg): Likewise.
+ 	* config/tilepro/tilepro.c (tilepro_function_arg): Likewise.
+ 	* config/v850/v850.c (v850_function_arg): Likewise.
+ 	* config/vax/vax.c (vax_function_arg): Likewise.
+ 	* config/visium/visium.c (visium_function_arg): Likewise.
+ 	* config/xtensa/xtensa.c (xtensa_function_arg_1, xtensa_function_arg)
+ 	(xtensa_function_incoming_arg): Likewise.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (setup_incoming_varargs): Take a function_arg_info
+ 	instead of a mode and tree.
+ 	* doc/tm.texi: Regenerate.
+ 	* targhooks.h (default_setup_incoming_varargs): Take a
+ 	function_arg_info instead of a mode and tree.
+ 	* targhooks.c (default_setup_incoming_varargs): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_setup_incoming_varargs): Likewise.
+ 	* config/alpha/alpha.c (alpha_setup_incoming_varargs): Likewise.
+ 	* config/arc/arc.c (arc_setup_incoming_varargs): Likewise.
+ 	* config/arm/arm.c (arm_setup_incoming_varargs): Likewise.
+ 	* config/bfin/bfin.c (setup_incoming_varargs): Likewise.
+ 	* config/cris/cris.c (cris_setup_incoming_varargs): Likewise.
+ 	* config/csky/csky.c (csky_setup_incoming_varargs): Likewise.
+ 	* config/epiphany/epiphany.c (epiphany_setup_incoming_varargs):
+ 	Likewise.
+ 	* config/fr30/fr30.c (fr30_setup_incoming_varargs): Likewise.
+ 	* config/frv/frv.c (frv_setup_incoming_varargs): Likewise.
+ 	* config/ft32/ft32.c (ft32_setup_incoming_varargs): Likewise.
+ 	* config/i386/i386.c (ix86_setup_incoming_varargs): Likewise.
+ 	* config/ia64/ia64.c (ia64_setup_incoming_varargs): Likewise.
+ 	* config/iq2000/iq2000.c (iq2000_setup_incoming_varargs): Likewise.
+ 	* config/lm32/lm32.c (lm32_setup_incoming_varargs): Likewise.
+ 	* config/m32r/m32r.c (m32r_setup_incoming_varargs): Likewise.
+ 	* config/mcore/mcore.c (mcore_setup_incoming_varargs): Likewise.
+ 	* config/mips/mips.c (mips_setup_incoming_varargs): Likewise.
+ 	* config/mmix/mmix.c (mmix_setup_incoming_varargs): Likewise.
+ 	* config/moxie/moxie.c (moxie_setup_incoming_varargs): Likewise.
+ 	* config/nds32/nds32.c (nds32_setup_incoming_varargs): Likewise.
+ 	* config/nios2/nios2.c (nios2_setup_incoming_varargs): Likewise.
+ 	* config/riscv/riscv.c (riscv_setup_incoming_varargs): Likewise.
+ 	* config/rs6000/rs6000-internal.h (setup_incoming_varargs): Likewise.
+ 	* config/rs6000/rs6000-call.c (setup_incoming_varargs): Likewise.
+ 	* config/sh/sh.c (sh_setup_incoming_varargs): Likewise.
+ 	* config/spu/spu.c (spu_setup_incoming_varargs): Likewise.
+ 	* config/tilegx/tilegx.c (tilegx_setup_incoming_varargs): Likewise.
+ 	* config/tilepro/tilepro.c (tilepro_setup_incoming_varargs): Likewise.
+ 	* config/visium/visium.c (visium_setup_incoming_varargs): Likewise.
+ 	* function.c (assign_parms_setup_varargs): Update call to
+ 	targetm.calls.setup_incoming_varargs.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (pass_by_reference): Take a function_arg_info instead
+ 	of a mode, type and named flag.
+ 	* doc/tm.texi: Regenerate.
+ 	* targhooks.h (hook_pass_by_reference_must_pass_in_stack): Update
+ 	accordingly.
+ 	(hook_bool_CUMULATIVE_ARGS_arg_info_false): Declare.
+ 	* targhooks.c (hook_pass_by_reference_must_pass_in_stack): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	(hook_bool_CUMULATIVE_ARGS_arg_info_false): New function.
+ 	* calls.h (pass_by_reference): Take a function_arg_info instead of a
+ 	mode, type and named flag.
+ 	* calls.c (pass_by_reference): Likewise.
+ 	(pass_va_arg_by_reference): Update call accordingly.
+ 	(initialize_argument_information): Likewise.
+ 	(emit_library_call_value_1): Likewise.
+ 	* function.c (assign_parm_find_data_types): Likewise.
+ 	* var-tracking.c (prepare_call_arguments): Likewise.
+ 	* stor-layout.c: Include calls.h.
+ 	(compute_record_mode): Update call to targetm.calls.pass_by_reference.
+ 	* config/aarch64/aarch64.c (aarch64_pass_by_reference): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/alpha/alpha.c (alpha_pass_by_reference): Likewise.
+ 	* config/arc/arc.c (arc_pass_by_reference): Likewise.
+ 	* config/arm/arm.c (arm_pass_by_reference): Likewise.
+ 	* config/bfin/bfin.c (bfin_pass_by_reference): Likewise.
+ 	* config/c6x/c6x.c (c6x_pass_by_reference): Likewise.
+ 	(c6x_call_saved_register_used): Update call to pass_by_reference.
+ 	* config/cris/cris.c (cris_pass_by_reference): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/epiphany/epiphany.c (epiphany_pass_by_reference): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	(epiphany_arg_partial_bytes): Update call accordingly.
+ 	* config/ft32/ft32.c (ft32_pass_by_reference): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	(ft32_arg_partial_bytes): Update call accordingly.
+ 	* config/i386/i386.c (ix86_pass_by_reference): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/iq2000/iq2000.c (iq2000_pass_by_reference): Likewise.
+ 	* config/m32c/m32c.c (m32c_pass_by_reference): Likewise.
+ 	* config/m32r/m32r.c (m32r_pass_by_reference): Likewise.
+ 	(m32r_return_in_memory): Update call accordingly.
+ 	* config/mips/mips.c (mips_pass_by_reference): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/mmix/mmix.c (mmix_pass_by_reference): Likewise.
+ 	* config/mn10300/mn10300.c (mn10300_pass_by_reference): Likewise.
+ 	* config/moxie/moxie.c (moxie_pass_by_reference): Likewise.
+ 	(moxie_arg_partial_bytes): Update call accordingly.
+ 	* config/msp430/msp430.c (msp430_pass_by_reference): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/nvptx/nvptx.c (nvptx_pass_by_reference): Likewise.
+ 	* config/or1k/or1k.c (or1k_pass_by_reference): Likewise.
+ 	* config/pa/pa.c (pa_pass_by_reference): Likewise.
+ 	* config/riscv/riscv.c (riscv_pass_by_reference): Likewise.
+ 	(riscv_return_in_memory): Update call accordingly.
+ 	* config/rs6000/rs6000-internal.h (rs6000_pass_by_reference): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/rs6000/rs6000-call.c (rs6000_pass_by_reference): Likewise.
+ 	(rs6000_parm_needs_stack): Update call to pass_by_reference.
+ 	* config/s390/s390.c (s390_pass_by_reference): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	(s390_call_saved_register_used): Update call accordingly.
+ 	* config/sh/sh.c (sh_pass_by_reference): Take a function_arg_info
+ 	instead of a mode, type and named flag.
+ 	* config/sparc/sparc.c (sparc_pass_by_reference): Likewise.
+ 	* config/spu/spu.c (spu_pass_by_reference): Likewise.
+ 	* config/tilegx/tilegx.c (tilegx_pass_by_reference): Likewise.
+ 	* config/tilepro/tilepro.c (tilepro_pass_by_reference): Likewise.
+ 	* config/v850/v850.c (v850_pass_by_reference): Likewise.
+ 	* config/visium/visium.c (visium_pass_by_reference): Likewise.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (arg_partial_bytes): Take a function_arg_info instead
+ 	of a mode, type and named flag.
+ 	* doc/tm.texi: Regenerate.
+ 	* target.h (function_arg_info): Declare.
+ 	* calls.h (function_arg_info): New class.
+ 	* targhooks.h (hook_int_CUMULATIVE_ARGS_mode_tree_bool_0): Delete.
+ 	(hook_int_CUMULATIVE_ARGS_arg_info_0): Declare.
+ 	* targhooks.c (hook_int_CUMULATIVE_ARGS_mode_tree_bool_0): Delete.
+ 	(hook_int_CUMULATIVE_ARGS_arg_info_0): New function.
+ 	* calls.c (initialize_argument_information): Update call to
+ 	targetm.calls.partial_bytes.
+ 	(emit_library_call_value_1): Likewise.
+ 	* expr.c (block_move_libcall_safe_for_call_parm): Likewise.
+ 	* function.c (assign_parm_find_entry_rtl): Likewise.
+ 	* config/alpha/alpha.c (alpha_arg_partial_bytes): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/arc/arc.c (arc_arg_partial_bytes): Likewise.
+ 	* config/arm/arm.c (arm_arg_partial_bytes): Likewise.
+ 	(cmse_func_args_or_return_in_stack): Update accordingly.
+ 	* config/bfin/bfin.c (bfin_arg_partial_bytes): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/cris/cris.c (cris_arg_partial_bytes): Likewise.
+ 	* config/csky/csky.c (csky_arg_partial_bytes): Likewise.
+ 	* config/epiphany/epiphany.c (epiphany_arg_partial_bytes): Likewise.
+ 	* config/fr30/fr30.c: Include calls.h.
+ 	(fr30_arg_partial_bytes): Take a function_arg_info instead of a mode,
+ 	type and named flag.
+ 	* config/frv/frv.c: Include calls.h.
+ 	(frv_arg_partial_bytes): Take a function_arg_info instead of a mode,
+ 	type and named flag.
+ 	* config/ft32/ft32.c (ft32_arg_partial_bytes): Likewise.
+ 	* config/gcn/gcn.c (gcn_arg_partial_bytes): Likewise.
+ 	* config/ia64/ia64.c (ia64_arg_partial_bytes): Likewise.
+ 	* config/iq2000/iq2000.c (iq2000_arg_partial_bytes): Likewise.
+ 	* config/m32r/m32r.c (m32r_arg_partial_bytes): Likewise.
+ 	* config/mcore/mcore.c (mcore_arg_partial_bytes): Likewise.
+ 	* config/microblaze/microblaze.c (function_arg_partial_bytes):
+ 	Likewise.
+ 	* config/mips/mips.c (mips_arg_partial_bytes): Likewise.
+ 	* config/mn10300/mn10300.c (mn10300_arg_partial_bytes): Likewise.
+ 	* config/moxie/moxie.c (moxie_arg_partial_bytes): Likewise.
+ 	* config/msp430/msp430.c (msp430_arg_partial_bytes): Likewise.
+ 	* config/nds32/nds32.c (nds32_arg_partial_bytes): Likewise.
+ 	* config/nios2/nios2.c (nios2_arg_partial_bytes): Likewise.
+ 	* config/pa/pa.c (pa_arg_partial_bytes): Likewise.
+ 	* config/pru/pru.c (pru_arg_partial_bytes): Likewise.
+ 	* config/riscv/riscv.c (riscv_arg_partial_bytes): Likewise.
+ 	* config/rs6000/rs6000-internal.h (rs6000_arg_partial_bytes): Likewise.
+ 	* config/rs6000/rs6000-call.c (rs6000_arg_partial_bytes): Likewise.
+ 	(rs6000_parm_needs_stack): Update call accordingly.
+ 	* config/sh/sh.c (sh_arg_partial_bytes): Take a
+ 	function_arg_info instead of a mode, type and named flag.
+ 	* config/sparc/sparc.c (sparc_arg_partial_bytes): Likewise.
+ 	* config/v850/v850.c (v850_arg_partial_bytes): Likewise.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* calls.h (must_pass_va_arg_in_stack): Declare.
+ 	* calls.c (must_pass_va_arg_in_stack): New function.
+ 	* config/alpha/alpha.c (alpha_gimplify_va_arg_1): Use it.
+ 	* config/sh/sh.c (sh_gimplify_va_arg_expr): Likewise.
+ 	* config/stormy16/stormy16.c (xstormy16_gimplify_va_arg_expr):
+ 	Likewise.
+ 	* config/xtensa/xtensa.c (xtensa_gimplify_va_arg_expr): Likewise.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* calls.h (pass_va_arg_by_reference): Declare.
+ 	* calls.c (pass_va_arg_by_reference): New function.
+ 	* config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr): Use it.
+ 	* config/alpha/alpha.c (alpha_gimplify_va_arg): Likewise.
+ 	* config/gcn/gcn.c (gcn_gimplify_va_arg_expr): Likewise.
+ 	* config/i386/i386.c (ix86_gimplify_va_arg): Likewise.
+ 	* config/ia64/ia64.c (ia64_gimplify_va_arg): Likewise.
+ 	* config/mips/mips.c (mips_std_gimplify_va_arg_expr): Likewise.
+ 	(mips_gimplify_va_arg_expr): Likewise.
+ 	* config/msp430/msp430.c (msp430_gimplify_va_arg_expr): Likewise.
+ 	* config/pa/pa.c (hppa_gimplify_va_arg_expr): Likewise.
+ 	* config/rs6000/rs6000-call.c (rs6000_gimplify_va_arg): Likewise.
+ 	* config/s390/s390.c (s390_gimplify_va_arg): Likewise.
+ 	* config/sparc/sparc.c (sparc_gimplify_va_arg): Likewise.
+ 	* config/spu/spu.c (spu_gimplify_va_arg_expr): Likewise.
+ 	* config/tilegx/tilegx.c (tilegx_gimplify_va_arg_expr): Likewise.
+ 	* config/tilepro/tilepro.c (tilepro_gimplify_va_arg_expr): Likewise.
+ 	* config/visium/visium.c (visium_gimplify_va_arg): Likewise.
+ 	* config/xtensa/xtensa.c (xtensa_gimplify_va_arg_expr): Likewise.
+ 	* targhooks.c (std_gimplify_va_arg_expr): Likewise.
+ 
+ 2019-08-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR target/91498
+ 	* config/i386/i386-features.c (general_scalar_chain::convert_op):
+ 	Use (vec_merge (vec_duplicate..)) style vector from scalar move.
+ 	(convert_scalars_to_vector): Add timode_p parameter and use it
+ 	to guard TImode-only operation.
+ 	(pass_stv::gate): Adjust so STV runs twice for TARGET_64BIT.
+ 	(pass_stv::execute): Pass down timode_p.
+ 
+ 2019-08-20  Lili Cui  <lili.cui@intel.com>
+ 
+ 	* common/config/i386/i386-common.c
+ 	(processor_names): Add tigerlake and cooperlake.
+ 	(processor_alias_table): Add tigerlake and cooperlake.
+ 	* config.gcc: Add -march=tigerlake and cooperlake.
+ 	* config/i386/driver-i386.c
+ 	(host_detect_local_cpu): Detect tigerlake and cooperlake.
+ 	Add "has_avx" to classify processor.
+ 	* config/i386/i386-builtins.c (processor_model) :
+ 	Add M_INTEL_COREI7_TIGERLAKE and M_INTEL_COREI7_COOPERLAKE.
+ 	(arch_names_table): Add tigerlake and cooperlake.
+ 	(get_builtin_code_for_version): Handle PROCESSOR_TIGERLAKE
+ 	and PROCESSOR_COOPERLAKE.
+ 	* config/i386/i386-c.c
+ 	(ix86_target_macros_internal): Handle tigerlake and cooperlake.
+ 	* config/i386/i386-options.c
+ 	(m_TIGERLAKE): Define.
+ 	(m_COOPERLAKE): Ditto.
+ 	(m_CORE_AVX512): Ditto.
+ 	(processor_cost_table): Add cascadelake.
+ 	(ix86_option_override_internal): Hadle PTA_MOVDIRI, PTA_MOVDIR64B.
+ 	* config/i386/i386.h
+ 	(ix86_size_cost): Define TARGET_TIGERLAKE and TARGET_COOPERLAKE.
+ 	(processor_type): Add PROCESSOR_TIGERLAKE and PROCESSOR_COOPERLAKE.
+ 	(PTA_MOVDIRI): Ditto.
+ 	(PTA_MOVDIR64B): Ditto.
+ 	(PTA_COOPERLAKE): Ditto.
+ 	(PTA_TIGERLAKE): Ditto.
+ 	(processor_type): Add PROCESSOR_TIGERLAKE and PROCESSOR_COOPERLAKE.
+ 	* doc/extend.texi: Add tigerlake and cooperlake.
+ 	* doc/invoke.texi: Add tigerlake and cooperlake.
+ 
+ 2019-08-20  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* doc/install.texi (Specific, alpha): Remove note to use
+ 	binutils 2.11.2 or later.
+ 
+ 2019-08-20  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	PR middle-end/89544
+ 	* function.c (assign_parm_find_stack_rtl): Use larger alignment
+ 	when possible.
+ 
+ 2019-08-19  Joel Hutton  <Joel.Hutton@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_fpconst_pow2_recip): New prototype
+ 	* config/aarch64/aarch64.c (aarch64_fpconst_pow2_recip): New function
+ 	* config/aarch64/aarch64.md (*aarch64_<su_optab>cvtf<fcvt_target><GPF:mode>2_mult): New pattern
+ 	(*aarch64_<su_optab>cvtf<fcvt_iesize><GPF:mode>2_mult): New pattern
+ 	* config/aarch64/constraints.md (Dt): New constraint
+ 	* config/aarch64/predicates.md (aarch64_fpconst_pow2_recip): New predicate
+ 
+ 2019-08-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91403
+ 	* tree-scalar-evolution.c (follow_ssa_edge_binary): Inline
+ 	cases we can handle with tail-recursion...
+ 	(follow_ssa_edge_expr): ... here.  Do so.
+ 
+ 2019-08-19  Kito Cheng  <kito.cheng@sifive.com>
+ 
+ 	PR target/91441
+ 	* toplev.c (process_options): Check TARGET_ASAN_SHADOW_OFFSET is
+ 	implemented for -fsanitize=kernel-address, and merge check logic
+ 	with -fsanitize=address.
+ 
+ 2019-08-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/darwin.h (TARGET_OS_CPP_BUILTINS): Add asserts
+ 	for cpu and machine.  Factor 64/32b builtins.
+ 
+ 2019-08-18  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* doc/install.texi (Specific, bfin): blackfin.uclinux.org is
+ 	gone, point to sourceforge.net.
+ 
+ 2019-08-17  Gerald Pfeifer  <gerald@pfeifer.com>
+ 	
+ 	* doc/ux.texi (User Experience Guidelines): Update reference.
+ 
+ 2019-08-17  Gerald Pfeifer  <gerald@pfeifer.com>
+ 	
+ 	* doc/include/gpl_v3.texi (Copying): Adjust the link to "Why
+ 	not LGPL".
+ 
+ 2019-08-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* tree-sra.c (build_reconstructed_reference): Return NULL_TREE instead
+ 	of NULL.  Add guard for broken VIEW_CONVERT_EXPRs.
+ 
+ 2019-08-16  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* tree.def (TYPE_SIZE): Clarify.
+ 	* tree.h (TYPE_SIZE, TYPE_SIZE_UNIT, DECL_SIZE): Add comments.
+ 
+ 2019-08-16  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	PR tree-optimization/91109
+ 	* lra-int.h (lra_need_for_scratch_reg_p): Declare.
+ 	* lra.c (lra): Use lra_need_for_scratch_reg_p.
+ 	* lra-spills.c (lra_need_for_scratch_reg_p): New function.
+ 
+ 2019-08-16  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/mmx.md (mmxdoublemode): New mode attribute.
+ 	(mmx_uavg<mode>3): Macroize expaner from mmx_uavgv8qi3 and
+ 	mmx_uavgv4hi3 using MMXMODE12 mode iterator.
+ 	(uavg<mode>3_ceil): New expander.
+ 	* config/i386/sse.md (uavg<mode>3_ceil): Use ssedoublemode
+ 	mode iterator when creating CONST1_RTX.
+ 	(<sse2_avx2>_uavg<mode>3<mask_name>): Ditto.
+ 	(*<sse2_avx2>_uavg<mode>3<mask_name>): Use ssedoublemode
+ 	mode iterator for const1_operand predicate.
+ 
+ 2019-08-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-scalar-evolution.c (follow_ssa_edge_expr): Declare.
+ 	(follow_ssa_edge_binary): Call follow_ssa_edge_expr instead of
+ 	follow_ssa_edge.
+ 	(follow_ssa_edge_in_condition_phi_branch): Likewise.
+ 	(analyze_evolution_in_loop): Likewise.
+ 	(follow_ssa_edge, follow_ssa_edge_in_rhs): Inline into ...
+ 	(follow_ssa_edge_expr): ... here.  Refactor code.
+ 
+ 2019-08-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR target/91469
+ 	* config/i386/i386-features.c
+ 	(general_scalar_chain::replace_with_subreg): Stop at memory operands.
+ 
+ 2019-08-16  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	PR other/91255
+ 	* gensupport.c (has_subst_attribute): Error out on set_attr_alternative
+ 	only if subst_name matches curr_attr string.
+ 
+ 2019-08-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-forwprop.c (simplify_builtin_call): Do not remove
+ 	stmt at gsi_p, instead replace it with a NOP removed later.
+ 	(pass_forwprop::execute): Fully propagate lattice, DCE stmts
+ 	that became dead because of that.
+ 
+ 2019-08-16  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* gimple-ssa-evrp-analyze.c (record_ranges_from_phis): Skip PHIs
+ 	for which we can't represent a range.
+ 	* ipa-cp.c (ipcp_vr_lattice::set_to_bottom): Pass type to
+ 	set_varying.
+ 	* tree-ssa-threadedge.c (record_temporary_equivalences_from_phis):
+ 	Set VR_UNDEFINED if type is not supported.
+ 	* tree-ssanames.c (get_range_info): Pass type to set_varying.
+ 	* tree-vrp.c (value_range_base::check): Assert that a varying has
+ 	min/max set.
+ 	(value_range_base::equal_p): Early bail for undefines.
+ 	(value_range_base::set_varying): Accept a type.
+ 	(value_range::set_varying): Same.
+ 	(value_range_base::type): VARYING can have a type, while UNDEFINE
+ 	is typeless.
+ 	(value_range_base::dump): Print type for VARYING nodes.
+ 	(value_range_base::set): Add type to VARYING.
+ 	(extract_range_from_multiplicative_op): Pass type to set_varying.
+ 	(extract_range_from_binary_expr): Same.
+ 	(value_range_base::intersect_helper): Same.
+ 	(value_range_base::union_helper): Same.
+ 	(value_range_base::normalize_symbolics): Same.
+ 	(determine_value_range_1): Same.
+ 	* tree-vrp.h (class value_range_base): Add type to set_varying.
+ 	Add prototype for dump(void).
+ 	Add prototype for supports_type_p.
+ 	(class value_range): Add type to set_varying.
+ 	Add prototype for dump(void).
+ 	* vr-values.c (set_value_range_to_truthvalue): Pass type to
+ 	set_varying.
+ 	(vr_values::get_lattice_entry): Set varying even if propagation
+ 	finished.
+ 	Pass type to set_varying.
+ 	(vr_values::get_value_range): Remove vr_const_varying.
+ 	Reallocate the lattice if needed.
+ 	(vr_values::update_value_range): Pass type to set_varying.
+ 	(vr_values::extract_range_for_var_from_comparison_expr): Same.
+ 	(vr_values::extract_range_from_binary_expr): Same.
+ 	(vr_values::extract_range_from_unary_expr): Same.
+ 	(vr_values::extract_range_from_cond_expr): Same.
+ 	(vr_values::check_for_binary_op_overflow): Same.
+ 	(vr_values::extract_range_basic): Same.
+ 	(vr_values::extract_range_from_assignment): Same.
+ 	(vr_values::vr_values): Increase size of num_vr_values.
+ 	(vr_values::extract_range_from_phi_node): Pass type to
+ 	set_varying.
+ 
+ 2019-08-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/90878
+ 	* config/i386/i386.c (inline_memory_move_cost): Use hard_register
+ 	for costs of hard register moves.
+ 	(ix86_register_move_cost): Likewise.
+ 	* config/i386/i386.h (processor_costs): Move costs of hard
+ 	register moves to hard_register.  Add int_load, int_store,
+ 	xmm_move, ymm_move, zmm_move, sse_to_integer, integer_to_sse,
+ 	sse_load, sse_store, sse_unaligned_load and sse_unaligned_store
+ 	for costs of RTL expressions.
+ 	* config/i386/x86-tune-costs.h: Move costs of hard register
+ 	moves to hard_register.  Duplicate int_load, int_store,
+ 	xmm_move, ymm_move, zmm_move, sse_to_integer, integer_to_sse,
+ 	sse_load, sse_store for costs of RTL expressions.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* target.def (setup_incoming_vararg_bounds): Remove.
+ 	* doc/tm.texi.in (TARGET_SETUP_INCOMING_VARARG_BOUNDS): Remove.
+ 	* doc/tm.texi: Regenerate.
+ 	* targhooks.c (default_setup_incoming_vararg_bounds): Delete.
+ 	* targhooks.h (default_setup_incoming_vararg_bounds): Likewise.
+ 	* config/i386/i386.c (ix86_setup_incoming_vararg_bounds): Likewise.
+ 	(TARGET_SETUP_INCOMING_VARARG_BOUNDS): Likewise.
+ 
+ 2019-08-15  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	MSP430: Fix lines over 80 characters long in
+ 	config/msp430/*.{c,h} files
+ 
+ 	* config/msp430/driver-msp430.c (msp430_select_cpu): Fix format
+ 	specifier in string.
+ 	(msp430_select_hwmult_lib): Split line more than 80 characters long.
+ 	* config/msp430/msp430-devices.c (msp430_extract_mcu_data): Remove
+ 	redundant old comment.
+ 	* config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
+ 	Split line more than 80 characters long.
+ 	* config/msp430/msp430.c (msp430_option_override): Likewise.
+ 	(msp430_return_in_memory): Likewise.
+ 	(msp430_gimplify_va_arg_expr): Likewise.
+ 	(TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P): Likewise.
+ 	(msp430_legitimate_constant): Likewise.
+ 	(TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS): Likewise.
+ 	(msp430_attr): Likewise.
+ 	(msp430_data_attr): Likewise.
+ 	(msp430_start_function): Likewise.
+ 	(gen_prefix): Likewise.
+ 	(msp430_init_sections): Likewise.
+ 	(msp430_select_section): Likewise.
+ 	(msp430_function_section): Likewise.
+ 	(msp430_unique_section): Likewise.
+ 	(msp430_output_aligned_decl_common): Likewise.
+ 	(msp430_do_not_relax_short_jumps): Likewise.
+ 	(msp430_init_builtins): Likewise.
+ 	(msp430_expand_delay_cycles): Likewise.
+ 	(msp430_expand_prologue): Likewise.
+ 	(msp430_expand_epilogue): Likewise.
+ 	(msp430_expand_helper): Likewise.
+ 	(msp430_split_movsi): Likewise.
+ 	(msp430_print_operand): Likewise.
+ 	(msp430_return_addr_rtx): Likewise.
+ 	(msp430x_extendhisi): Likewise.
+ 	* config/msp430/msp430.h (STARTFILE_SPEC): Likewise.
+ 	(ASM_SPEC): Likewise.
+ 	Remove very obvious comments.
+ 	(LIB_SPEC): Split line more than 80 characters long.
+ 	(EH_RETURN_HANDLER_RTX): Likewise.
+ 	(HARD_REGNO_CALLER_SAVE_MODE): Likewise.
+ 
+ 2019-08-15  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	MSP430: Fix whitespace errors and incorrect indentation in
+ 	config/msp430/*.{c,h} files
+ 
+ 	* config/msp430/driver-msp430.c (msp430_select_cpu): Fix indentation.
+ 	(msp430_select_hwmult_lib): Likewise.
+ 	* config/msp430/msp430-devices.c (parse_devices_csv_1): Likewise.
+ 	(msp430_extract_mcu_data): Likewise.
+ 	(struct t_msp430_mcu_data): Likewise.
+ 	* config/msp430/msp430.c (struct machine_function): Remove whitespace
+ 	before left square bracket.
+ 	(msp430_option_override): Fix indentation.
+ 	(msp430_hard_regno_nregs_with_padding): Likewise.
+ 	(msp430_initial_elimination_offset): Likewise.
+ 	(msp430_special_register_convention_p): Remove whitespace before left
+ 	square bracket and after exclamation mark.
+ 	(msp430_evaluate_arg): Likewise.
+ 	(msp430_callee_copies): Fix indentation.
+ 	(msp430_gimplify_va_arg_expr): Likewise.
+ 	(msp430_function_arg_advance): Remove whitespace before left square
+ 	bracket.
+ 	(reg_ok_for_addr): Likewise.
+ 	(msp430_preserve_reg_p): Likewise.
+ 	(msp430_compute_frame_info): Likewise.
+ 	(msp430_asm_output_addr_const_extra): Add space between function name
+ 	and open parenthesis.
+ 	(has_section_name): Fix indentation.
+ 	(msp430_attr): Remove trailing whitespace.
+ 	(msp430_section_attr): Likewise.
+ 	(msp430_data_attr): Likewise.
+ 	(struct msp430_attribute_table): Fix comment and whitespace.
+ 	(msp430_start_function): Remove whitespace before left square bracket.
+ 	Add space between function name and open parenthesis.
+ 	(msp430_select_section): Remove trailing whitespace.
+ 	(msp430_section_type_flags): Remove trailing whitespace.
+ 	(msp430_unique_section): Remove space before closing parenthesis.
+ 	(msp430_output_aligned_decl_common): Change 8 spaces to a tab.
+ 	(msp430_builtins): Remove whitespace before left square bracket.
+ 	(msp430_init_builtins):	Fix indentation.
+ 	(msp430_expand_prologue): Remove whitespace before left square bracket.
+ 	Remove space before closing parenthesis.
+ 	(msp430_expand_epilogue): Remove whitespace before left square bracket.
+ 	(msp430_split_movsi): Remove space before closing parenthesis.
+ 	(helper_function_name_mappings): Fix indentation.
+ 	(msp430_use_f5_series_hwmult): Fix whitespace.
+ 	(use_32bit_hwmult): Likewise.
+ 	(msp430_no_hwmult): Likewise.
+ 	(msp430_output_labelref): Remove whitespace before left square bracket.
+ 	(msp430_print_operand_raw): Likewise.
+ 	(msp430_print_operand_addr): Likewise.
+ 	(msp430_print_operand): Add two spaces after '.' in comment.
+ 	Fix trailing whitespace.
+ 	(msp430x_extendhisi): Fix indentation.
+ 	* config/msp430/msp430.h (TARGET_CPU_CPP_BUILTINS): Change 8 spaces to
+ 	tab.
+ 	(PC_REGNUM): Likewise.
+ 	(STACK_POINTER_REGNUM): Likewise.
+ 	(CC_REGNUM): Likewise.
+ 
+ 2019-08-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR target/91454
+ 	* config/i386/i386-features.c (gen_gpr_to_xmm_move_src): New
+ 	helper.
+ 	(general_scalar_chain::make_vector_copies): Use it.
+ 
+ 2019-08-15  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* function.c (assign_parm_setup_reg): Handle misaligned stack arguments.
+ 
+ 2019-08-15  Martin Liska  <mliska@suse.cz>
+ 
+ 	* tree-ssa-dce.c (propagate_necessity): We can't reach now
+ 	operators with no arguments.
+ 	(eliminate_unnecessary_stmts): Likewise here.
+ 
+ 2019-08-15  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386-features.c (general_scalar_chain::convert_insn)
+ 	<case COMPARE>: Revert 2019-08-14 change.
+ 	(convertible_comparison_p): Revert 2019-08-14 change.  Return false
+ 	for (TARGET_64BIT || mode != DImode).
+ 
+ 2019-08-15  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.c (value_range_base::set): Merge in code from
+ 	value_range_base::set_and_canonicalize.
+ 	Enforce canonicalization at set time.
+ 	Normalize [MIN, MAX] into VARYING and ~[MIN, MAX] into UNDEFINED.
+ 	(value_range_base::set_undefined): Inline call to set().
+ 	(value_range_base::set_varying): Same.
+ 	(value_range_base::singleton_p): Handle VR_ANTI_RANGEs.
+ 	(vrp_val_max): New argument handle_pointers.
+ 	(vrp_val_min): Same.
+ 	(ranges_from_anti_range): Same.
+ 	(extract_range_into_wide_ints): Use tree argument instead of sign
+ 	and precision.
+ 	(extract_range_from_multiplicative_op): Take in tree type instead
+ 	of precision and sign.  Adapt function for canonicalized ranges.
+ 	(extract_range_from_binary_expr): Pass type to
+ 	extract_range_from_multiplicative_op.
+ 	Adapt for canonicalized ranges.
+ 	(extract_range_from_unary_expr): Same.
+ 	(value_range_base::intersect_helper): Adjust for canonicalized
+ 	ranges.
+ 	(value_range_base::union_helper): Same.
+ 	(value_range_base::normalize_symbolics): New.
+ 	* tree-vrp.h (class value_range_base): Remove
+ 	set_and_canonicalize.
+ 	New prototype for normalize_symbolics.
+ 	(class value_range): Remove set_and_canonicalize.
+ 	(vrp_val_min): Adjust prototype.
+ 	(vrp_val_max): Same.
+ 	* vr-values.c
+ 	(vr_values::extract_range_for_var_from_comparison_expr):  Call set
+ 	instead of set_and_canonicalize.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/91444
+ 	* tree-vect-stmts.c (vectorizable_call): Check that the function
+ 	is a BUILT_IN_MD function before passing it to
+ 	targetm.vectorize.builtin_md_vectorized_function.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_sve_mode_p): Declare.
+ 	* config/aarch64/aarch64.c (aarch64_sve_mode_p): New function.
+ 	(aarch64_select_early_remat_modes): Use it.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_simd_vector_alignment): Return
+ 	16 for SVE predicates even if they are fixed-length.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (and<PRED_ALL:mode>3): Make the
+ 	operand order match the MOV /Z alias.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_output_sve_cnt_immediate): Take
+ 	the vector pattern as an aarch64_svpattern argument.  Update the
+ 	overloaded caller accordingly.
+ 	(aarch64_output_sve_scalar_inc_dec): Update call accordingly.
+ 	(aarch64_output_sve_vector_inc_dec): Likewise.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_add_offset): In the fallback
+ 	multiplication case, try to compute VG * (lowest set bit) directly
+ 	rather than always basing the multiplication on VG.  Use
+ 	expand_mult for the multiplication if we can.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h
+ 	(aarch64_sve_scalar_inc_dec_immediate_p): Declare.
+ 	(aarch64_sve_inc_dec_immediate_p): Rename to...
+ 	(aarch64_sve_vector_inc_dec_immediate_p): ...this.
+ 	(aarch64_output_sve_addvl_addpl): Take a single rtx argument.
+ 	(aarch64_output_sve_scalar_inc_dec): Declare.
+ 	(aarch64_output_sve_inc_dec_immediate): Rename to...
+ 	(aarch64_output_sve_vector_inc_dec): ...this.
+ 	* config/aarch64/aarch64.c (aarch64_sve_scalar_inc_dec_immediate_p)
+ 	(aarch64_output_sve_scalar_inc_dec): New functions.
+ 	(aarch64_output_sve_addvl_addpl): Remove the base and offset
+ 	arguments.  Only handle true ADDVL and ADDPL instructions;
+ 	don't emit an INC or DEC.
+ 	(aarch64_sve_inc_dec_immediate_p): Rename to...
+ 	(aarch64_sve_vector_inc_dec_immediate_p): ...this.
+ 	(aarch64_output_sve_inc_dec_immediate): Rename to...
+ 	(aarch64_output_sve_vector_inc_dec): ...this.  Update call to
+ 	aarch64_sve_vector_inc_dec_immediate_p.
+ 	* config/aarch64/predicates.md (aarch64_sve_scalar_inc_dec_immediate)
+ 	(aarch64_sve_plus_immediate): New predicates.
+ 	(aarch64_pluslong_operand): Accept aarch64_sve_plus_immediate
+ 	rather than aarch64_sve_addvl_addpl_immediate.
+ 	(aarch64_sve_inc_dec_immediate): Rename to...
+ 	(aarch64_sve_vector_inc_dec_immediate): ...this.  Update call to
+ 	aarch64_sve_vector_inc_dec_immediate_p.
+ 	(aarch64_sve_add_operand): Update accordingly.
+ 	* config/aarch64/constraints.md (Uai): New constraint.
+ 	(vsi): Update call to aarch64_sve_vector_inc_dec_immediate_p.
+ 	* config/aarch64/aarch64.md (add<GPI:mode>3): Don't force the second
+ 	operand into a register if it satisfies aarch64_sve_plus_immediate.
+ 	(*add<GPI:mode>3_aarch64, *add<GPI:mode>3_poly_1): Add an alternative
+ 	for Uai.  Update calls to aarch64_output_sve_addvl_addpl.
+ 	* config/aarch64/aarch64-sve.md (add<mode>3): Call
+ 	aarch64_output_sve_vector_inc_dec instead of
+ 	aarch64_output_sve_inc_dec_immediate.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (UNSPEC_REVB, UNSPEC_REVH)
+ 	(UNSPEC_REVW): New constants.
+ 	(elem_bits): New mode attribute.
+ 	(SVE_INT_UNARY): New int iterator.
+ 	(optab): Handle UNSPEC_REV[BHW].
+ 	(sve_int_op): New int attribute.
+ 	(min_elem_bits): Handle VNx16QI and the predicate modes.
+ 	* config/aarch64/aarch64-sve.md (*aarch64_sve_rev64<mode>)
+ 	(*aarch64_sve_rev32<mode>, *aarch64_sve_rev16vnx16qi): Delete.
+ 	(@aarch64_pred_<SVE_INT_UNARY:optab><SVE_I:mode>): New pattern.
+ 	* config/aarch64/aarch64.c (aarch64_sve_data_mode): New function.
+ 	(aarch64_sve_int_mode, aarch64_sve_rev_unspec): Likewise.
+ 	(aarch64_split_sve_subreg_move): Use UNSPEC_REV[BHW] instead of
+ 	unspecs based on the total width of the reversed data.
+ 	(aarch64_evpc_rev_local): Likewise (for SVE only).  Use a
+ 	reinterpret followed by a subreg on big-endian targets.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64-sve.md
+ 	(*cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>_any): Add /z
+ 	alternatives in which one of the inputs is in the same register
+ 	as the output.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (*vec_extract<mode><Vel>_ext)
+ 	(*aarch64_sve_ext<mode>): Add MOVPRFX alternatives.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (*sub<SVE_F:mode>3): Remove immediate
+ 	FADD and FSUB alternatives.  Add a MOVPRFX alternative for FSUBR.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64-sve.md (add<SVE_I:mode>3, sub<SVE_I:mode>3)
+ 	(<LOGICAL:optab><SVE_I:mode>3, *add<SVE_F:mode>3, *mul<SVE_F:mode>3)
+ 	(*fabd<SVE_F:mode>3): Add more MOVPRFX alternatives.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	* config/aarch64/aarch64-sve.md (*v<ASHIFT:optab><SVE_I:mode>3):
+ 	Add an alternative that uses reversed shifts.
+ 
+ 2019-08-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/aarch64/aarch64-cores.def (cortex-a76): Use neoversen1 tuning
+ 	struct.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (aarch64_<su>abd<mode>_3): Add
+ 	a commutativity marker.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_prepare_sve_int_fma)
+ 	(aarch64_prepare_sve_cond_int_fma): Declare.
+ 	* config/aarch64/aarch64.c (aarch64_convert_mult_to_shift)
+ 	(aarch64_prepare_sve_int_fma): New functions.
+ 	(aarch64_prepare_sve_cond_int_fma): Likewise.
+ 	* config/aarch64/aarch64-sve.md
+ 	(cond_<SVE_INT_BINARY:optab><SVE_I:mode>): Add a "@" marker.
+ 	(fma<SVE_I:mode>4, cond_fma<SVE_I:mode>, *cond_fma<SVE_I:mode>_2)
+ 	(*cond_fma<SVE_I:mode>_4, *cond_fma<SVE_I:mode>_any, fnma<SVE_I:mode>4)
+ 	(cond_fnma<SVE_I:mode>, *cond_fnma<SVE_I:mode>_2)
+ 	(*cond_fnma<SVE_I:mode>_4, *cond_fnma<SVE_I:mode>_any): New patterns.
+ 	(*madd<mode>): Rename to...
+ 	(*fma<mode>4): ...this.
+ 	(*msub<mode>): Rename to...
+ 	(*fnma<mode>4): ...this.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_print_vector_float_operand):
+ 	Print 2.0 naturally.
+ 	(aarch64_sve_float_mul_immediate_p): Return true for 2.0.
+ 	* config/aarch64/predicates.md
+ 	(aarch64_sve_float_negated_arith_immediate): New predicate,
+ 	renamed from aarch64_sve_float_arith_with_sub_immediate.
+ 	(aarch64_sve_float_arith_with_sub_immediate): Test for both
+ 	positive and negative constants.
+ 	(aarch64_sve_float_arith_with_sub_operand): Redefine as a register
+ 	or an aarch64_sve_float_arith_with_sub_immediate.
+ 	* config/aarch64/constraints.md (vsN): Use
+ 	aarch64_sve_float_negated_arith_immediate.
+ 	* config/aarch64/iterators.md (SVE_COND_FP_BINARY_I1): New int
+ 	iterator.
+ 	(sve_pred_fp_rhs2_immediate): New int attribute.
+ 	* config/aarch64/aarch64-sve.md
+ 	(cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>): Use
+ 	sve_pred_fp_rhs1_operand and sve_pred_fp_rhs2_operand.
+ 	(*cond_<SVE_COND_FP_BINARY_I1:optab><SVE_F:mode>_2_const)
+ 	(*cond_<SVE_COND_FP_BINARY_I1:optab><SVE_F:mode>_any_const)
+ 	(*cond_add<SVE_F:mode>_2_const, *cond_add<SVE_F:mode>_any_const)
+ 	(*cond_sub<mode>_3_const, *cond_sub<mode>_any_const): New patterns.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64-sve.md (*aarch64_cond_abd<SVE_F:mode>_2)
+ 	(*aarch64_cond_abd<SVE_F:mode>_3)
+ 	(*aarch64_cond_abd<SVE_F:mode>_any): New patterns.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64-sve.md (*aarch64_cond_<su>abd<mode>_2)
+ 	(*aarch64_cond_<su>abd<mode>_any): New patterns.
+ 
+ 2019-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	* internal-fn.def (IFN_COND_SHL, IFN_COND_SHR): New internal functions.
+ 	* internal-fn.c (FOR_EACH_CODE_MAPPING): Handle shifts.
+ 	* match.pd (UNCOND_BINARY, COND_BINARY): Likewise.
+ 	* optabs.def (cond_ashl_optab, cond_ashr_optab, cond_lshr_optab): New
+ 	optabs.
+ 	* optabs.h (create_convert_operand_from): Expand comment.
+ 	* optabs.c (maybe_legitimize_operand): Allow implicit broadcasts
+ 	when mapping scalar rtxes to vector operands.
+ 	* config/aarch64/iterators.md (SVE_INT_BINARY): Add ashift,
+ 	ashiftrt and lshiftrt.
+ 	(sve_int_op, sve_int_op_rev, sve_pred_int_rhs2_operand): Handle them.
+ 	* config/aarch64/aarch64-sve.md (*cond_<optab><mode>_2_const)
+ 	(*cond_<optab><mode>_any_const): New patterns.
+ 
+ 2019-08-15  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/91438
+ 	* cgraph.c (cgraph_node::remove): When setting
+ 	n->origin = NULL for all nested functions, reset
+ 	also next_nested.
+ 
+ 2019-08-15  Martin Liska  <mliska@suse.cz>
+ 
+ 	* cgraph.c (cgraph_node::verify_node): Verify origin, nested
+ 	and next_nested.
+ 
+ 2019-08-15  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/91404
+ 	* passes.c (order): Remove.
+ 	(uid_hash_t): Likewise).
+ 	(remove_cgraph_node_from_order): Remove from set
+ 	of pointers (cgraph_node *).
+ 	(insert_cgraph_node_to_order): New.
+ 	(duplicate_cgraph_node_to_order): New.
+ 	(do_per_function_toporder): Register all 3 cgraph hooks.
+ 	Skip removed_nodes now as we know about all of them.
+ 
+ 2019-08-14  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386-expand.c (ix86_expand_vector_init_one_nonzero)
+ 	<case E_V8QImode>: Use vector_set path for
+ 	TARGET_MMX_WITH_SSE && TARGET_SSE4_1.
+ 	(ix86_expand_vector_init_one_var) <case E_V8QImode>:
+ 	Do not widen for TARGET_MMX_WITH_SSE && TARGET_SSE4_1.
+ 
+ 2019-08-14  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* builtins.c (expand_builtin_init_descriptor): Set memory alignment.
+ 
+ 2019-08-14  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/91294
+ 	* tree-ssa-strlen.c (handle_store): Avoid treating lower bound of
+ 	source length as exact.
+ 
+ 2019-08-14  Christophe Lyon  <christophe.lyon@linaro.org>
+ 
+ 	* doc/extend.texi: Add "noinit" attribute documentation.
+ 	* doc/sourcebuild.texi: Add noinit effective target documentation.
+ 	* varasm.c (default_section_type_flags): Add support for "noinit"
+ 	section.
+ 	(default_elf_select_section): Add support for "noinit" attribute.
+ 	* config/msp430/msp430.c (msp430_attribute_table): Remove
+ 	"noinit" entry.
+ 
+ 2019-08-14  Richard Biener  <rguenther@suse.de>
+ 	    Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/91154
+ 	* config/i386/i386-features.h (scalar_chain::scalar_chain): Add
+ 	mode arguments.
+ 	(scalar_chain::smode): New member.
+ 	(scalar_chain::vmode): Likewise.
+ 	(dimode_scalar_chain): Rename to...
+ 	(general_scalar_chain): ... this.
+ 	(general_scalar_chain::general_scalar_chain): Take mode arguments.
+ 	(timode_scalar_chain::timode_scalar_chain): Initialize scalar_chain
+ 	base with TImode and V1TImode.
+ 	* config/i386/i386-features.c (scalar_chain::scalar_chain): Adjust.
+ 	(general_scalar_chain::vector_const_cost): Adjust for SImode
+ 	chains.
+ 	(general_scalar_chain::compute_convert_gain): Likewise.  Add
+ 	{S,U}{MIN,MAX} support.
+ 	(general_scalar_chain::replace_with_subreg): Use vmode/smode.
+ 	(general_scalar_chain::make_vector_copies): Likewise.  Handle
+ 	non-DImode chains appropriately.
+ 	(general_scalar_chain::convert_reg): Likewise.
+ 	(general_scalar_chain::convert_op): Likewise.
+ 	(general_scalar_chain::convert_insn): Likewise.  Add
+ 	fatal_insn_not_found if the result is not recognized.
+ 	(convertible_comparison_p): Pass in the scalar mode and use that.
+ 	(general_scalar_to_vector_candidate_p): Likewise.  Rename from
+ 	dimode_scalar_to_vector_candidate_p.  Add {S,U}{MIN,MAX} support.
+ 	(scalar_to_vector_candidate_p): Remove by inlining into single
+ 	caller.
+ 	(general_remove_non_convertible_regs): Rename from
+ 	dimode_remove_non_convertible_regs.
+ 	(remove_non_convertible_regs): Remove by inlining into single caller.
+ 	(convert_scalars_to_vector): Handle SImode and DImode chains
+ 	in addition to TImode chains.
+ 	* config/i386/i386.md (<maxmin><MAXMIN_IMODE>3): New expander.
+ 	(*<maxmin><MAXMIN_IMODE>3_1): New insn-and-split.
+ 	(*<maxmin>di3_doubleword): Likewise.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64-sve.md (*cond_bic<mode>_2)
+ 	(*cond_bic<mode>_any): New patterns.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_print_operand): Allow %e to
+ 	take the equivalent mask, as well as a bit count.
+ 	* config/aarch64/predicates.md (aarch64_sve_uxtb_immediate)
+ 	(aarch64_sve_uxth_immediate, aarch64_sve_uxt_immediate)
+ 	(aarch64_sve_pred_and_operand): New predicates.
+ 	* config/aarch64/iterators.md (sve_pred_int_rhs2_operand): New
+ 	code attribute.
+ 	* config/aarch64/aarch64-sve.md
+ 	(cond_<SVE_INT_BINARY:optab><SVE_I:mode>): Use it.
+ 	(*cond_uxt<mode>_2, *cond_uxt<mode>_any): New patterns.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md
+ 	(*cond_<SVE_COND_FCVTI:optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>)
+ 	(*cond_<SVE_COND_ICVTF:optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>):
+ 	New patterns.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64-sve.md
+ 	(*cond_<SVE_COND_FP_UNARY:optab><SVE_F:mode>_2): New pattern.
+ 	(*cond_<SVE_COND_FP_UNARY:optab><SVE_F:mode>_any): Likewise.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64-sve.md
+ 	(*cond_<SVE_INT_UNARY:optab><SVE_I:mode>_2): New pattern.
+ 	(*cond_<SVE_INT_UNARY:optab><SVE_I:mode>_any): Likewise.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (SVE_COND_FP_ABS_CMP): New iterator.
+ 	* config/aarch64/aarch64-sve.md (*aarch64_pred_fac<cmp_op><mode>):
+ 	New pattern.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64-sve.md (*aarch64_sel_dup<mode>): New pattern.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_bit_representation): New function.
+ 	(aarch64_print_vector_float_operand): Also handle 8-bit floats.
+ 	(aarch64_print_operand): Add support for %I.
+ 	(aarch64_sve_dup_immediate_p): Handle scalars as well as vectors.
+ 	Bitcast floating-point constants to the corresponding integer constant.
+ 	(aarch64_float_const_representable_p): Handle vectors as well
+ 	as scalars.
+ 	(aarch64_expand_sve_vcond): Make sure that the operands are valid
+ 	for the new vcond_mask_<mode><vpred> expander.
+ 	* config/aarch64/predicates.md (aarch64_sve_dup_immediate): Also
+ 	test aarch64_float_const_representable_p.
+ 	(aarch64_sve_reg_or_dup_imm): New predicate.
+ 	* config/aarch64/aarch64-sve.md (vec_extract<vpred><Vel>): Use
+ 	gen_vcond_mask_<mode><vpred> instead of
+ 	gen_aarch64_sve_dup<mode>_const.
+ 	(vcond_mask_<mode><vpred>): Turn into a define_expand that
+ 	accepts aarch64_sve_reg_or_dup_imm and aarch64_simd_reg_or_zero
+ 	for operands 1 and 2 respectively.  Force operand 2 into a
+ 	register if operand 1 is a register.  Fold old define_insn...
+ 	(aarch64_sve_dup<mode>_const): ...and this define_insn...
+ 	(*vcond_mask_<mode><vpred>): ...into this new pattern.  Handle
+ 	floating-point constants that can be moved as integers.  Add
+ 	alternatives for MOV /M and FMOV /M.
+ 	(vcond<mode><v_int_equiv>, vcondu<mode><v_int_equiv>)
+ 	(vcond<mode><v_fp_equiv>): Accept nonmemory_operand for operands
+ 	1 and 2 respectively.
+ 	* config/aarch64/constraints.md (Ufc): Handle vectors as well
+ 	as scalars.
+ 	(vss): New constraint.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/predicates.md (aarch64_sve_float_maxmin_immediate)
+ 	(aarch64_sve_float_maxmin_operand): New predicates.
+ 	* config/aarch64/constraints.md (vsB): New constraint.
+ 	(vsM): Fix typo.
+ 	* config/aarch64/iterators.md (sve_pred_fp_rhs2_operand): Use
+ 	aarch64_sve_float_maxmin_operand for UNSPEC_COND_FMAXNM and
+ 	UNSPEC_COND_FMINNM.
+ 	* config/aarch64/aarch64-sve.md (<maxmin_uns><SVE_F:mode>3):
+ 	Use aarch64_sve_float_maxmin_operand for operand 2.
+ 	(*<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3): Likewise.
+ 	Add alternatives for the constant forms.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/constraints.md (vsb): New constraint.
+ 	(vsm): Generalize description.
+ 	* config/aarch64/iterators.md (SVE_INT_BINARY_IMM): New code
+ 	iterator.
+ 	(sve_imm_con): Handle smax, smin, umax and umin.
+ 	(sve_imm_prefix): New code attribute.
+ 	* config/aarch64/predicates.md (aarch64_sve_vsb_immediate)
+ 	(aarch64_sve_vsb_operand): New predicates.
+ 	(aarch64_sve_mul_immediate): Rename to...
+ 	(aarch64_sve_vsm_immediate): ...this.
+ 	(aarch64_sve_mul_operand): Rename to...
+ 	(aarch64_sve_vsm_operand): ...this.
+ 	* config/aarch64/aarch64-sve.md (mul<mode>3): Generalize to...
+ 	(<SVE_INT_BINARY_IMM:optab><SVE_I:mode>3): ...this.
+ 	(*mul<mode>3, *post_ra_mul<mode>3): Generalize to...
+ 	(*<SVE_INT_BINARY_IMM:optab><SVE_I:mode>3)
+ 	(*post_ra_<SVE_INT_BINARY_IMM:optab><SVE_I:mode>3): ...these and
+ 	add movprfx support for the immediate alternatives.
+ 	(<su><maxmin><mode>3, *<su><maxmin><mode>3): Delete in favor
+ 	of the above.
+ 	(*<SVE_INT_BINARY_SD:optab><SVE_SDI:mode>3): Fix incorrect predicate
+ 	for operand 3.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/predicates.md (aarch64_simd_imm_one): New predicate.
+ 	* config/aarch64/aarch64-sve.md (*cnot<mode>): New pattern.
+ 	(*cond_cnot<mode>_2, *cond_cnot<mode>_any): Likewise.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (SVE_INT_UNARY): Add clrsb and clz.
+ 	(optab, sve_int_op): Handle them.
+ 	* config/aarch64/aarch64-sve.md: Expand comment.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/predicates.md (const_1_to_3_operand): New predicate.
+ 	* config/aarch64/aarch64-sve.md (*aarch64_adr_uxtw)
+ 	(*aarch64_adr<mode>_shift, *aarch64_adr_shift_uxtw): New patterns.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor)
+ 	(aarch64_expand_sve_const_pred_trn): New functions.
+ 	(aarch64_expand_sve_const_pred_1): Add a recurse_p parameter and
+ 	use the above functions when the parameter is true.
+ 	(aarch64_expand_sve_const_pred): Update call accordingly.
+ 	* config/aarch64/aarch64-sve.md (*aarch64_sve_<perm_insn><mode>):
+ 	Rename to...
+ 	(@aarch64_sve_<perm_insn><mode>): ...this.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_sve_same_pred_for_ptest_p):
+ 	Declare.
+ 	* config/aarch64/aarch64.c (aarch64_sve_same_pred_for_ptest_p)
+ 	(aarch64_sve_emit_int_cmp): New functions.
+ 	(aarch64_convert_sve_data_to_pred): Use aarch64_sve_emit_int_cmp.
+ 	(aarch64_sve_cmp_operand_p, aarch64_emit_sve_ptrue_op_cc): Delete.
+ 	(aarch64_expand_sve_vec_cmp_int): Use aarch64_sve_emit_int_cmp.
+ 	* config/aarch64/aarch64.md (UNSPEC_MERGE_PTRUE): Delete.
+ 	(UNSPEC_PRED_Z): New unspec.
+ 	(set_clobber_cc_nzc): Delete.
+ 	* config/aarch64/aarch64-sve.md: Add a block comment about
+ 	UNSPEC_PRED_Z.
+ 	(*cmp<SVE_INT_CMP:cmp_op><mode>): Rename to...
+ 	(@aarch64_pred_cmp<SVE_INT_CMP:cmp_op><mode>): ...this, replacing
+ 	the old pattern with that name.  Use UNSPEC_PRED_Z instead of
+ 	UNSPEC_MERGE_PTRUE.
+ 	(*cmp<SVE_INT_CMP:cmp_op><mode>_cc): Use UNSPEC_PRED_Z instead of
+ 	UNSPEC_MERGE_PTRUE.  Use aarch64_sve_same_pred_for_ptest_p to
+ 	check for compatible predicates.
+ 	(*cmp<cmp_op><SVE_INT_CMP:mode>_ptest): Likewise.
+ 	(*cmp<cmp_op><mode>_and): Match a known-ptrue UNSPEC_PRED_Z instead
+ 	of UNSPEC_MERGE_PTRUE.  Split into the new form of predicated
+ 	comparisons above.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.md (UNSPEC_PRED_X): New unspec.
+ 	* config/aarch64/aarch64-sve.md: Add a section describing it.
+ 	(@aarch64_pred_mov<mode>, @aarch64_pred_mov<mode>)
+ 	(<SVE_INT_UNARY:optab><mode>2, *<SVE_INT_UNARY:optab><mode>2)
+ 	(aarch64_<su>abd<mode>_3, mul<SVE_I:mode>3, *mul<SVE_I:mode>3)
+ 	(<su>mul<mode>3_highpart, *<su>mul<mode>3_highpart)
+ 	(<SVE_INT_BINARY:optab><mode>3, *<SVE_INT_BINARY:optab><mode>3)
+ 	(*bic<mode>3, v<ASHIFT:optab><mode>3, *v<ASHIFT:optab><mode>3)
+ 	(<su><maxmin><mode>3, *<su><maxmin><mode>3, *madd<SVE_I:mode>)
+ 	(*msub<SVE_I:mode>3, *aarch64_sve_rev64<mode>)
+ 	(*aarch64_sve_rev32<mode>, *aarch64_sve_rev16vnx16qi): Use
+ 	UNSPEC_PRED_X instead of UNSPEC_MERGE_PTRUE.
+ 	* config/aarch64/aarch64-sve2.md (<u>avg<mode>3_floor)
+ 	(<u>avg<mode>3_ceil, *<sur>h<addsub><mode>): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_split_sve_subreg_move)
+ 	(aarch64_evpc_rev_local): Update accordingly.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (VNx4SI_ONLY, VNx2DF_ONLY): New mode
+ 	iterators.
+ 	(SVE_BHSI, SVE_SDI): Tweak comment.
+ 	(SVE_HSDI): Likewise.  Fix definition.
+ 	(SVE_SDF): New mode iterator.
+ 	(elem_bits): New mode attribute.
+ 	(SVE_COND_FCVT): New int iterator.
+ 	* config/aarch64/aarch64-sve.md
+ 	(*<SVE_COND_ICVTF:optab>v16hsf<SVE_HSDI:mode>2)
+ 	(*<SVE_COND_ICVTF:optab>vnx4sf<SVE_SDI:mode>2)
+ 	(*<SVE_COND_ICVTF:optab>vnx2df<SVE_SDI:mode>2): Merge into...
+ 	(*aarch64_sve_<SVE_COND_ICVTF:optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>)
+ 	(*aarch64_sve_<SVE_COND_ICVTF:optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>):
+ 	...these new patterns.
+ 	(*<SVE_COND_FCVTI:optab><SVE_HSDI:mode>vnx8hf2)
+ 	(*<SVE_COND_FCVTI:optab><SVE_SDI:mode>vnx4sf2)
+ 	(aarch64_sve_<SVE_COND_FCVTI:optab><SVE_SDI:mode>vnx2df2):
+ 	Merge into...
+ 	(*aarch64_sve_<SVE_COND_FCVTI:optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>)
+ 	(aarch64_sve_<SVE_COND_FCVTI:optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>):
+ 	...these new patterns.
+ 	(vec_unpack<su_optab>_float_<perm_hilo>_vnx4si): Update accordingly.
+ 	(*trunc<Vwide><SVE_SDF:mode>2): Replace with...
+ 	(*aarch64_sve_<SVE_COND_FCVT:optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>):
+ 	...this new pattern.
+ 	(aarch64_sve_extend<SVE_HSDF:mode><Vwide>2): Replace with...
+ 	(aarch64_sve_<SVE_COND_FCVT:optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>):
+ 	...this new pattern.
+ 	(vec_unpacks_<perm_hilo>_<mode>): Update accordingly.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.md (UNSPEC_FLOAT_CONVERT): Delete.
+ 	* config/aarch64/iterators.md (UNSPEC_COND_FCVT, UNSPEC_COND_FCVTZS)
+ 	(UNSPEC_COND_FCVTZU, UNSPEC_COND_SCVTF, UNSPEC_COND_UCVTF): New
+ 	unspecs.
+ 	(optab, su): Handle them.
+ 	(SVE_COND_FCVTI, SVE_COND_ICVTF): New int iterators.
+ 	* config/aarch64/aarch64-sve.md
+ 	(<fix_trunc_optab><SVE_F:mode><v_int_equiv>2): Replace with...
+ 	(<SVE_COND_FCVTI:optab><SVE_F:mode><v_int_equiv>2): ...this.
+ 	(*<fix_trunc_optab>v16hsf<:SVE_HSDImode>2): Replace with...
+ 	(*<SVE_COND_FCVTI:optab>v16hsf<SVE_F:mode>2): ...this.
+ 	(*<fix_trunc_optab>vnx4sf<SVE_SDI:mode>2): Replace with...
+ 	(*<SVE_COND_FCVTI:optab>vnx4sf<SVE_SDI:mode>2): ...this.
+ 	(*<fix_trunc_optab>vnx2df<SVE_SDI:mode>2): Replace with...
+ 	(*<SVE_COND_FCVTI:optab>vnx2df<SVE_SDI:mode>2): ...this.
+ 	(vec_pack_<su>fix_trunc_vnx2df): Use SVE_COND_FCVTI instead of
+ 	FIXUORS.
+ 	(<FLOATUORS:optab><v_int_equiv><SVE_F:mode>2): Replace with...
+ 	(<SVE_COND_ICVTF:optab><v_int_equiv><SVE_F:mode>2): ...this.
+ 	(*<FLOATUORS:optab><SVE_HSDI:mode>vnx8hf2): Replace with...
+ 	(*<SVE_COND_ICVTF:optab><SVE_HSDI:mode>vnx8hf2): ...this.
+ 	(*<FLOATUORS:optab><SVE_SDI:mode>vnx4sf2): Replace with...
+ 	(*<SVE_COND_ICVTF:optab><SVE_SDI:mode>vnx4sf2): ...this.
+ 	(aarch64_sve_<FLOATUORS:optab><SVE_SDI:mode>vnx2df2): Replace with...
+ 	(aarch64_sve_<SVE_COND_ICVTF:optab><SVE_SDI:mode>vnx2df2): ...this.
+ 	(vec_unpack<su_optab>_float_<perm_hilo>_vnx4si): Pass a GP strictness
+ 	operand to aarch64_sve_<SVE_COND_ICVTF:optab><SVE_SDI:mode>vnx2df2.
+ 	(vec_pack_trunc_<SVE_HSF:Vwide>, *trunc<Vwide><SVE_HSF:mode>2)
+ 	(aarch64_sve_extend<mode><Vwide>2): Use UNSPEC_COND_FCVT instead
+ 	of UNSPEC_FLOAT_CONVERT.
+ 	(vec_unpacks_<perm_hilo>_<mode>): Pass a GP strictness operand to
+ 	aarch64_sve_extend<mode><Vwide>2.
+ 
+ 2019-08-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR target/91154
+ 	* config/i386/i386-features.c
+ 	(dimode_scalar_chain::compute_convert_gain): Compute and dump
+ 	individual instruction gain.  Fix reg-reg copy GRP cost.  Use
+ 	ix86_cost->sse_op for vector instruction costs.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (UNSPEC_COND_FCMUO): New unspec.
+ 	(cmp_op): Handle it.
+ 	(SVE_COND_FP_CMP): Rename to...
+ 	(SVE_COND_FP_CMP_I0): ...this.
+ 	(SVE_FP_CMP): Remove.
+ 	* config/aarch64/aarch64-sve.md
+ 	(*fcm<SVE_FP_CMP:cmp_op><SVE_F:mode>): Replace with...
+ 	(*fcm<SVE_COND_FP_CMP_I0:cmp_op><SVE_F:mode>): ...this new pattern,
+ 	using unspecs to represent the comparison.
+ 	(*fcmuo<SVE_F:mode>): Use UNSPEC_COND_FCMUO.
+ 	(*fcm<cmp_op><mode>_and_combine, *fcmuo<mode>_and_combine): Update
+ 	accordingly.
+ 	* config/aarch64/aarch64.c (aarch64_emit_sve_ptrue_op): Delete.
+ 	(aarch64_unspec_cond_code): Move after integer code.  Handle
+ 	UNORDERED.
+ 	(aarch64_emit_sve_predicated_cond): Replace with...
+ 	(aarch64_emit_sve_fp_cond): ...this new function.
+ 	(aarch64_emit_sve_or_conds): Replace with...
+ 	(aarch64_emit_sve_or_fp_conds): ...this new function.
+ 	(aarch64_emit_sve_inverted_cond): Replace with...
+ 	(aarch64_emit_sve_invert_fp_cond): ...this new function.
+ 	(aarch64_expand_sve_vec_cmp_float): Update accordingly.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (SVE_HSD): New mode iterator.
+ 	(V_FP_EQUIV, v_fp_equiv): Handle VNx8HI and VNx8HF.
+ 	* config/aarch64/aarch64-sve.md (vcond<mode><v_fp_equiv>): Use
+ 	SVE_HSD instead of SVE_SD.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/iterators.md (SVE_COND_FP_BINARY_REG): New int
+ 	iterator.
+ 	(sve_pred_fp_rhs1_operand, sve_pred_fp_rhs1_operand): New int
+ 	attributes.
+ 	* config/aarch64/aarch64-sve.md (add<SVE_F:mode>3, sub<SVE_F:mode>3)
+ 	(mul<SVE_F:mode>3, div<SVE_F:mode>3)
+ 	(<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3): Merge into...
+ 	(<SVE_COND_FP_BINARY:optab><SVE_F:mode>3): ...this new expander.
+ 	(*div<SVE_F:mode>3): Generalize to...
+ 	(*<SVE_COND_FP_BINARY:optab><SVE_F:mode>3): ...this.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64.md (SVE_RELAXED_GP, SVE_STRICT_GP): New
+ 	constants.
+ 	* config/aarch64/predicates.md (aarch64_sve_gp_strictness): New
+ 	predicate.
+ 	* config/aarch64/aarch64-protos.h (aarch64_sve_pred_dominates_p):
+ 	Declare.
+ 	* config/aarch64/aarch64.c (aarch64_sve_pred_dominates_p): New
+ 	function.
+ 	* config/aarch64/aarch64-sve.md: Add a block comment about the
+ 	handling of predicated FP operations.
+ 	(<SVE_COND_FP_UNARY:optab><SVE_F:mode>2, add<SVE_F:mode>3)
+ 	(sub<SVE_F:mode>3, mul<SVE_F:mode>3, div<SVE_F:mode>3)
+ 	(<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3)
+ 	(<SVE_COND_FP_MAXMIN_PUBLIC:maxmin_uns><SVE_F:mode>3)
+ 	(<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4): Add an SVE_RELAXED_GP
+ 	operand.
+ 	(cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>)
+ 	(cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>): Add an SVE_STRICT_GP
+ 	operand.
+ 	(*<SVE_COND_FP_UNARY:optab><SVE_F:mode>2)
+ 	(*cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>_2)
+ 	(*cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>_3)
+ 	(*cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>_any)
+ 	(*fabd<SVE_F:mode>3, *div<SVE_F:mode>3)
+ 	(*<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3)
+ 	(*<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4)
+ 	(*cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>_2)
+ 	(*cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>_4)
+ 	(*cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>_any): Match the
+ 	strictness operands.  Use aarch64_sve_pred_dominates_p to check
+ 	whether the predicate on the conditional operation is suitable
+ 	for merging.  Split patterns into the canonical equal-predicate form.
+ 	(*add<SVE_F:mode>3, *sub<SVE_F:mode>3, *mul<SVE_F:mode>3): Likewise.
+ 	Restrict the unpredicated alternatives to SVE_RELAXED_GP.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64-sve.md (add<mode>3, *add<mode>3)
+ 	(sub<mode>3, *sub<mode>3, *fabd<mode>3, mul<mode>3, *mul<mode>3)
+ 	(div<mode>3, *div<mode>3): Use SVE_COND_FP_* unspecs instead of
+ 	rtx codes.
+ 	(cond_<optab><mode>, *cond_<optab><mode>_2, *cond_<optab><mode>_3)
+ 	(*cond_<optab><mode>_any): Add the predicate to the SVE_COND_FP_*
+ 	unspecs.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/aarch64-sve.md (bic<mode>3): Rename to...
+ 	(*bic<SVE_I:mode>3): ...this.  Match the form that an SVE inverse
+ 	actually has, rather than relying on REG_EQUAL notes.
+ 	Make the insn operand order match the SVE operand order.
+ 	(*<nlogical><PRED_ALL:mode>3): Make the insn operand order match
+ 	the SVE operand order.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_target_reg): New function.
+ 	(aarch64_emit_set_immediate): Likewise.
+ 	(aarch64_ptrue_reg): Build a VNx16BI constant and then bitcast it.
+ 	(aarch64_pfalse_reg): Likewise.
+ 	(aarch64_convert_sve_data_to_pred): New function.
+ 	(aarch64_sve_move_pred_via_while): Take an optional target register
+ 	and the required register mode.
+ 	(aarch64_expand_sve_const_pred_1): New function.
+ 	(aarch64_expand_sve_const_pred): Likewise.
+ 	(aarch64_expand_mov_immediate): Build an all-true predicate
+ 	if the significant bits of the immediate are all true.  Use
+ 	aarch64_expand_sve_const_pred for all compile-time predicate constants.
+ 	(aarch64_mov_operand_p): Force predicate constants to be VNx16BI
+ 	before register allocation.
+ 	* config/aarch64/aarch64-sve.md (*vec_duplicate<mode>_reg): Use
+ 	a VNx16BI PTRUE when splitting the memory alternative.
+ 	(vec_duplicate<mode>): Update accordingly.
+ 	(*pred_cmp<cmp_op><mode>): Rename to...
+ 	(@aarch64_pred_cmp<cmp_op><mode>): ...this.
+ 
+ 2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_ptrue_all): Declare.
+ 	* config/aarch64/aarch64.c (aarch64_ptrue_all): New function.
+ 	* config/aarch64/aarch64.md (UNSPEC_PTEST_PTRUE): Delete.
+ 	(UNSPEC_PTEST): New unspec.
+ 	(SVE_MAYBE_NOT_PTRUE, SVE_KNOWN_PTRUE): New constants.
+ 	* config/aarch64/iterators.md (data_bytes): New mode attribute.
+ 	* config/aarch64/predicates.md (aarch64_sve_ptrue_flag): New predicate.
+ 	* config/aarch64/aarch64-sve.md: Add a new section describing the
+ 	handling of UNSPEC_PTEST.
+ 	(pred_<LOGICAL:optab><PRED_ALL:mode>3): Rename to...
+ 	(@aarch64_pred_<LOGICAL:optab><PRED_ALL:mode>_z): ...this.
+ 	(ptest_ptrue<mode>): Replace with...
+ 	(aarch64_ptest<mode>): ...this new pattern.
+ 	(cbranch<mode>4): Update after above changes.
+ 	(*<LOGICAL:optab><PRED_ALL:mode>3_cc): Use UNSPEC_PTEST instead of
+ 	UNSPEC_PTEST_PTRUE.
+ 	(*cmp<SVE_INT_CMP:cmp_op><SVE_I:mode>_cc): Likewise.
+ 	(*cmp<SVE_INT_CMP:cmp_op><SVE_I:mode>_ptest): Likewise.
+ 	(*while_ult<GPI:mode><PRED_ALL:mode>_cc): Likewise.
+ 
+ 2019-08-14  Xiong Hu Luo  <luoxhu@linux.ibm.com>
+ 
+ 	PR lto/91287
+ 	* builtins.c (builtin_with_linkage_p): New function.
+ 	* builtins.h (builtin_with_linkage_p): New function.
+ 	* symtab.c (write_symbol): Remove redundant assert.
+ 	* lto-streamer-out.c (symtab_node::output_to_lto_symbol_table_p):
+ 	Remove FIXME and use builtin_with_linkage_p.
+ 
+ 2019-08-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/91421
+ 	* tree-core.h (function_decl::function_code): Change type to
+ 	unsigned int.
+ 	* tree.h (DECL_FUNCTION_CODE): Rename old definition to...
+ 	(DECL_UNCHECKED_FUNCTION_CODE): ...this.
+ 	(DECL_BUILT_IN_CLASS): Make an rvalue macro only.
+ 	(DECL_FUNCTION_CODE): New function.  Assert that the built-in class
+ 	is BUILT_IN_NORMAL.
+ 	(DECL_MD_FUNCTION_CODE, DECL_FE_FUNCTION_CODE): New functions.
+ 	(set_decl_built_in_function, copy_decl_built_in_function): Likewise.
+ 	(fndecl_built_in_p): Change the type of the "name" argument to
+ 	unsigned int.
+ 	* builtins.c (expand_builtin): Move DECL_FUNCTION_CODE use
+ 	after check for DECL_BUILT_IN_CLASS.
+ 	* cgraphclones.c (build_function_decl_skip_args): Use
+ 	set_decl_built_in_function.
+ 	* ipa-param-manipulation.c (ipa_modify_formal_parameters): Likewise.
+ 	* ipa-split.c (split_function): Likewise.
+ 	* langhooks.c (add_builtin_function_common): Likewise.
+ 	* omp-simd-clone.c (simd_clone_create): Likewise.
+ 	* tree-streamer-in.c (unpack_ts_function_decl_value_fields): Likewise.
+ 	* config/darwin.c (darwin_init_cfstring_builtins): Likewise.
+ 	(darwin_fold_builtin): Use DECL_MD_FUNCTION_CODE instead of
+ 	DECL_FUNCTION_CODE.
+ 	* fold-const.c (operand_equal_p): Compare DECL_UNCHECKED_FUNCTION_CODE
+ 	instead of DECL_FUNCTION_CODE.
+ 	* lto-streamer-out.c (hash_tree): Use DECL_UNCHECKED_FUNCTION_CODE
+ 	instead of DECL_FUNCTION_CODE.
+ 	* tree-streamer-out.c (pack_ts_function_decl_value_fields): Likewise.
+ 	* print-tree.c (print_node): Use DECL_MD_FUNCTION_CODE when
+ 	printing DECL_BUILT_IN_MD.  Handle DECL_BUILT_IN_FRONTEND.
+ 	* config/aarch64/aarch64-builtins.c (aarch64_expand_builtin)
+ 	(aarch64_fold_builtin, aarch64_gimple_fold_builtin): Use
+ 	DECL_MD_FUNCTION_CODE instead of DECL_FUNCTION_CODE.
+ 	* config/aarch64/aarch64.c (aarch64_builtin_reciprocal): Likewise.
+ 	* config/alpha/alpha.c (alpha_expand_builtin, alpha_fold_builtin):
+ 	(alpha_gimple_fold_builtin): Likewise.
+ 	* config/arc/arc.c (arc_expand_builtin): Likewise.
+ 	* config/arm/arm-builtins.c (arm_expand_builtin): Likewise.
+ 	* config/avr/avr-c.c (avr_resolve_overloaded_builtin): Likewise.
+ 	* config/avr/avr.c (avr_expand_builtin, avr_fold_builtin): Likewise.
+ 	* config/bfin/bfin.c (bfin_expand_builtin): Likewise.
+ 	* config/c6x/c6x.c (c6x_expand_builtin): Likewise.
+ 	* config/frv/frv.c (frv_expand_builtin): Likewise.
+ 	* config/gcn/gcn.c (gcn_expand_builtin_1): Likewise.
+ 	(gcn_expand_builtin): Likewise.
+ 	* config/i386/i386-builtins.c (ix86_builtin_reciprocal): Likewise.
+ 	(fold_builtin_cpu): Likewise.
+ 	* config/i386/i386-expand.c (ix86_expand_builtin): Likewise.
+ 	* config/i386/i386.c (ix86_fold_builtin): Likewise.
+ 	(ix86_gimple_fold_builtin): Likewise.
+ 	* config/ia64/ia64.c (ia64_fold_builtin): Likewise.
+ 	(ia64_expand_builtin): Likewise.
+ 	* config/iq2000/iq2000.c (iq2000_expand_builtin): Likewise.
+ 	* config/mips/mips.c (mips_expand_builtin): Likewise.
+ 	* config/msp430/msp430.c (msp430_expand_builtin): Likewise.
+ 	* config/nds32/nds32-intrinsic.c (nds32_expand_builtin_impl): Likewise.
+ 	* config/nios2/nios2.c (nios2_expand_builtin): Likewise.
+ 	* config/nvptx/nvptx.c (nvptx_expand_builtin): Likewise.
+ 	* config/pa/pa.c (pa_expand_builtin): Likewise.
+ 	* config/pru/pru.c (pru_expand_builtin): Likewise.
+ 	* config/riscv/riscv-builtins.c (riscv_expand_builtin): Likewise.
+ 	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
+ 	Likewise.
+ 	* config/rs6000/rs6000-call.c (htm_expand_builtin): Likewise.
+ 	(altivec_expand_dst_builtin, altivec_expand_builtin): Likewise.
+ 	(rs6000_gimple_fold_builtin, rs6000_expand_builtin): Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_builtin_md_vectorized_function)
+ 	(rs6000_builtin_reciprocal): Likewise.
+ 	* config/rx/rx.c (rx_expand_builtin): Likewise.
+ 	* config/s390/s390-c.c (s390_resolve_overloaded_builtin): Likewise.
+ 	* config/s390/s390.c (s390_expand_builtin): Likewise.
+ 	* config/sh/sh.c (sh_expand_builtin): Likewise.
+ 	* config/sparc/sparc.c (sparc_expand_builtin): Likewise.
+ 	(sparc_fold_builtin): Likewise.
+ 	* config/spu/spu-c.c (spu_resolve_overloaded_builtin): Likewise.
+ 	* config/spu/spu.c (spu_expand_builtin): Likewise.
+ 	* config/stormy16/stormy16.c (xstormy16_expand_builtin): Likewise.
+ 	* config/tilegx/tilegx.c (tilegx_expand_builtin): Likewise.
+ 	* config/tilepro/tilepro.c (tilepro_expand_builtin): Likewise.
+ 	* config/xtensa/xtensa.c (xtensa_fold_builtin): Likewise.
+ 	(xtensa_expand_builtin): Likewise.
+ 
+ 2019-08-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/91421
+ 	* attribs.c (decl_attributes): Check the DECL_BUILT_IN_CLASS
+ 	before the DECL_FUNCTION_CODE.
+ 	* calls.c (maybe_warn_alloc_args_overflow): Use fndecl_built_in_p
+ 	to check for a BUILT_IN_ALLOCA call.
+ 	* ipa-cp.c (ipa_get_indirect_edge_target_1): Likewise for
+ 	BUILT_IN_UNREACHABLE.  Don't check for a FUNCTION_TYPE.
+ 	* ipa-devirt.c (possible_polymorphic_call_target_p): Likewise.
+ 	* ipa-prop.c (try_make_edge_direct_virtual_call): Likewise.
+ 	* gimple-ssa-isolate-paths.c (is_addr_local): Check specifically
+ 	for BUILT_IN_NORMAL functions.
+ 	* trans-mem.c (expand_block_edges): Use gimple_call_builtin_p to
+ 	test for BUILT_IN_TM_ABORT.
+ 	* tree-ssa-ccp.c (optimize_stack_restore): Use fndecl_built_in_p
+ 	to check for a BUILT_IN_STACK_RESTORE call.
+ 	(optimize_stdarg_builtin): Remove redundant check for GIMPLE_CALL.
+ 	* tree-ssa-threadedge.c
+ 	(record_temporary_equivalences_from_stmts_at_dest): Check for a
+ 	BUILT_IN_NORMAL decl before checking its DECL_FUNCTION_CODE.
+ 	* tree-vect-patterns.c (vect_recog_pow_pattern): Use a positive
+ 	test for a BUILT_IN_NORMAL call instead of a negative test for
+ 	an internal function call.
+ 
+ 2019-08-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree.h (build_vector_a_then_b): Declare.
+ 	* tree.c (build_vector_a_then_b): New function.
+ 	* fold-const-call.c (fold_while_ult): Likewise.
+ 	(fold_const_call): Use it to handle IFN_WHILE_ULT.
+ 	* config/aarch64/aarch64-protos.h (AARCH64_FOR_SVPATTERN): New macro.
+ 	(aarch64_svpattern): New enum.
+ 	* config/aarch64/aarch64-sve.md (mov<PRED_ALL:mode>): Pass
+ 	constants through aarch64_expand_mov_immediate.
+ 	(*aarch64_sve_mov<PRED_ALL:mode>): Use aarch64_mov_operand rather
+ 	than general_operand as the predicate for operand 1.
+ 	(while_ult<GPI:mode><PRED_ALL:mode>): Add a '@' marker.
+ 	* config/aarch64/aarch64.c (simd_immediate_info::PTRUE): New
+ 	insn_type.
+ 	(simd_immediate_info::simd_immediate_info): New overload that
+ 	takes a scalar_int_mode and an svpattern.
+ 	(simd_immediate_info::u): Add a "pattern" field.
+ 	(svpattern_token): New function.
+ 	(aarch64_get_sve_pred_bits, aarch64_widest_sve_pred_elt_size)
+ 	(aarch64_partial_ptrue_length, aarch64_svpattern_for_vl)
+ 	(aarch64_sve_move_pred_via_while): New functions.
+ 	(aarch64_expand_mov_immediate): Try using
+ 	aarch64_sve_move_pred_via_while for predicates that contain N ones
+ 	followed by M zeros but that do not correspond to a VLnnn pattern.
+ 	(aarch64_sve_pred_valid_immediate): New function.
+ 	(aarch64_simd_valid_immediate): Use it instead of dealing directly
+ 	with PTRUE and PFALSE.
+ 	(aarch64_output_sve_mov_immediate): Handle new simd_immediate_info
+ 	forms.
+ 
+ 2019-08-13 Iain Sandoe <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (machopic_indirect_call_target): Rename symbol stub
+ 	flag.
+ 	(darwin_override_options): Likewise.
+ 	* config/darwin.h: Likewise.
+ 	* config/darwin.opt: Likewise.
+ 	* config/i386/i386.c (output_pic_addr_const): Likewise.
+ 	* config/rs6000/darwin.h: Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_call_darwin_1): Likewise.
+ 	* config/i386/darwin.h (TARGET_MACHO_PICSYM_STUBS): Rename to ...
+ 	... this TARGET_MACHO_SYMBOL_STUBS.
+ 	(FUNCTION_PROFILER):Likewise.
+ 	* config/i386/i386.h: Likewise.
+ 
+ 2019-08-13  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386-expand.c (ix86_expand_vector_extract)
+ 	<case E_V2SImode>: Use vec_extr path for
+ 	TARGET_MMX_WITH_SSE && TARGET_SSE4_1.
+ 	<case E_V8QImode>: Ditto.
+ 	* config/i386/mmx.md (*mmx_pextrw_zext): Rename from mmx_pextrw.
+ 	Use SWI48 mode iterator.  Use %k to output operand 0.
+ 	(*mmx_pextrw): New insn pattern.
+ 	(*mmx_pextrb): Ditto.
+ 	(*mmx_pextrb_zext): Ditto.
+ 
+ 2019-08-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* target.def (libc_has_function, libc_has_fast_function): Improve
+ 	documentation strings.
+ 	* doc/tm.texi: Regenerate.
+ 
+ 2019-08-13  Caroline Tice  <cmtice@google.com>
+ 
+ 	PR other/91396
+ 	* config/gnu-user.h (GNU_USER_TARGET_ENDFILE_SPEC): Only add the
+ 	vtv_end.o or vtv_end_preinit.o files if !static.
+ 
+ 2019-08-13  Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* rtl.h (tablejump_casesi_pattern): Move declaration to proper spot.
+ 
+ 2019-08-13  Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* rtlanal.c (tablejump_casesi_pattern): New function, to
+ 	determine if a tablejump insn is a casesi dispatcher. Extracted
+ 	from patch_jump_insn.
+ 	* rtl.h (tablejump_casesi_pattern): Declare.
+ 	* cfgrtl.c (patch_jump_insn): Use it.
+ 	* dwarf2cfi.c (create_trace_edges): Use it.
+ 
+ 2019-08-13  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	PR target/81800
+ 	* config/aarch64/aarch64.md (lrint): Disable lrint pattern if GPF
+ 	operand is larger than a long int.
+ 
+ 2019-08-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* machmode.h (opt_mode::else_mode): New function.
+ 	(opt_mode::else_blk): Use it.
+ 	* config/aarch64/aarch64-protos.h (aarch64_vq_mode): Declare.
+ 	(aarch64_full_sve_mode, aarch64_sve_ld1rq_operand_p): Likewise.
+ 	(aarch64_gen_stepped_int_parallel): Likewise.
+ 	(aarch64_stepped_int_parallel_p): Likewise.
+ 	(aarch64_expand_mov_immediate): Remove the optional gen_vec_duplicate
+ 	argument.
+ 	* config/aarch64/aarch64.c
+ 	(aarch64_expand_sve_widened_duplicate): Delete.
+ 	(aarch64_expand_sve_dupq, aarch64_expand_sve_ld1rq): New functions.
+ 	(aarch64_expand_sve_const_vector): Rewrite to handle more cases.
+ 	(aarch64_expand_mov_immediate): Remove the optional gen_vec_duplicate
+ 	argument.  Use early returns in the !CONST_INT_P handling.
+ 	Pass all SVE data vectors to aarch64_expand_sve_const_vector rather
+ 	than handling some inline.
+ 	(aarch64_full_sve_mode, aarch64_vq_mode): New functions, split out
+ 	from...
+ 	(aarch64_simd_container_mode): ...here.
+ 	(aarch64_gen_stepped_int_parallel, aarch64_stepped_int_parallel_p)
+ 	(aarch64_sve_ld1rq_operand_p): New functions.
+ 	* config/aarch64/predicates.md (descending_int_parallel)
+ 	(aarch64_sve_ld1rq_operand): New predicates.
+ 	* config/aarch64/constraints.md (UtQ): New constraint.
+ 	* config/aarch64/aarch64.md (UNSPEC_REINTERPRET): New unspec.
+ 	* config/aarch64/aarch64-sve.md (mov<SVE_ALL:mode>): Remove the
+ 	gen_vec_duplicate from call to aarch64_expand_mov_immediate.
+ 	(@aarch64_sve_reinterpret<mode>): New expander.
+ 	(*aarch64_sve_reinterpret<mode>): New pattern.
+ 	(@aarch64_vec_duplicate_vq<mode>_le): New pattern.
+ 	(@aarch64_vec_duplicate_vq<mode>_be): Likewise.
+ 	(*sve_ld1rq<Vesize>): Replace with...
+ 	(@aarch64_sve_ld1rq<mode>): ...this new pattern.
+ 
+ 2019-08-13  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (generic_tunings): Set function alignment to
+ 	16:12.
+ 
+ 2019-08-13  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/driver-msp430.c (msp430_set_driver_var): New.
+ 	* config/msp430/msp430-devices.c (canonicalize_path_dirsep): New.
+ 	(msp430_check_path_for_devices): New.
+ 	(parse_devices_csv_1): New.
+ 	(parse_devices_csv): New.
+ 	(msp430_extract_mcu_data): Try to find devices.csv and search for the
+ 	MCU data in devices.csv before using the hard-coded data.
+ 	Warn if devices.csv isn't found and the MCU wasn't found in the
+ 	hard-coded data either.
+ 	* config/msp430/msp430.h (DRIVER_SELF_SPECS): Call
+ 	msp430_set_driver_var for -mno-warn-devices-csv and -mdevices-csv-loc.
+ 	Search for devices.csv on -I and -L paths.
+ 	(EXTRA_SPEC_FUNCTIONS): Add msp430_check_path_for_devices and
+ 	msp430_set_driver_var.
+ 	* config/msp430/msp430.opt: Add -mwarn-devices-csv and
+ 	-mdevices-csv-loc=.
+ 	* doc/invoke.texi (-mmcu): Document that -I and -L paths are
+ 	searched for devices.csv.
+ 	(mwarn-devices-csv): Document option.
+ 
+ 2019-08-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_output_ptrue): Delete.
+ 	* config/aarch64/aarch64-sve.md (*aarch64_sve_mov<PRED_ALL:mode>):
+ 	Use a single Dn alternative instead of separate Dz and Dm
+ 	alternatives.  Use aarch64_output_sve_move_immediate.
+ 	* config/aarch64/aarch64.c (aarch64_sve_element_int_mode): New
+ 	function.
+ 	(aarch64_simd_valid_immediate): Fill in the simd_immediate_info
+ 	for predicates too.
+ 	(aarch64_output_sve_mov_immediate): Handle predicate modes.
+ 	(aarch64_output_ptrue): Delete.
+ 
+ 2019-08-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (simd_immediate_info::insn_type): Add
+ 	INDEX.
+ 	(simd_immediate_info::value, simd_immediate_info::step)
+ 	(simd_immediate_info::modifier, simd_immediate_info::shift): Replace
+ 	with...
+ 	(simd_immediate_info::u): ...this new union.
+ 	(simd_immediate_info::simd_immediate_info): Update accordingly.
+ 	(aarch64_output_simd_mov_immediate): Likewise.
+ 	(aarch64_output_sve_mov_immediate): Likewise.
+ 
+ 2019-08-13  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config.gcc (msp430*-*-*): Add msp430-devices.o to extra_objs and
+ 	extra_gcc_objs.
+ 	* config/msp430/driver-msp430.c: Remove msp430_mcu_data.
+ 	(msp430_select_cpu): New spec function.
+ 	(msp430_select_hwmult_lib): Use msp430_extract_mcu_data to extract
+ 	MCU data.
+ 	* config/msp430/msp430-devices.c: New file.
+ 	* config/msp430/msp430-devices.h: New file.
+ 	* config/msp430/msp430.c: Remove msp430_mcu_data.
+ 	(msp430_option_override): Use msp430_extract_mcu_data to extract
+ 	MCU data.
+ 	(msp430_use_f5_series_hwmult): Likewise.
+ 	(use_32bit_hwmult): Likewise.
+ 	(msp430_no_hwmult): Likewise.
+ 	* config/msp430/msp430.h (ASM_SPEC): Don't pass -mmcu to the
+ 	assembler.
+ 	(DRIVER_SELF_SPECS): Call msp430_select_cpu if -mmcu is used without
+ 	and -mcpu option.
+ 	(EXTRA_SPEC_FUNCTIONS): Add msp430_select_cpu.
+ 	* config/msp430/t-msp430: Add rule to build msp430-devices.o.
+ 	Remove hard-coded MCU multilib data.
+ 
+ 2019-08-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_classify_vector_mode): Switch
+ 	based on the mode instead of testing properties of it.
+ 
+ 2019-08-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* doc/md.texi: Document the x and y constraints for AArch64.
+ 	* config/aarch64/aarch64.h (FP_LO8_REGNUM_P): New macro.
+ 	(FP_LO8_REGS): New reg_class.
+ 	(REG_CLASS_NAMES, REG_CLASS_CONTENTS): Add an entry for FP_LO8_REGS.
+ 	* config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
+ 	(aarch64_regno_regclass, aarch64_class_max_nregs): Handle FP_LO8_REGS.
+ 	* config/aarch64/predicates.md (aarch64_simd_register): Use
+ 	FP_REGNUM_P instead of checking the classes manually.
+ 	* config/aarch64/constraints.md (y): New constraint.
+ 
+ 2019-08-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (perm_insn): Include the "1"/"2" suffix.
+ 	(perm_hilo): Remove UNSPEC_ZIP*, UNSEPC_TRN* and UNSPEC_UZP*.
+ 	* config/aarch64/aarch64-simd.md
+ 	(aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>): Rename to..
+ 	(aarch64_<PERMUTE:perm_insn><mode>): ...this and remove perm_hilo
+ 	from the asm template.
+ 	* config/aarch64/aarch64-sve.md
+ 	(aarch64_<perm_insn><perm_hilo><PRED_ALL:mode>): Rename to..
+ 	(aarch64_<perm_insn><PRED_ALL:mode>): ...this and remove perm_hilo
+ 	from the asm template.
+ 	(aarch64_<perm_insn><perm_hilo><SVE_ALL:mode>): Rename to..
+ 	(aarch64_<perm_insn><SVE_ALL:mode>): ...this and remove perm_hilo
+ 	from the asm template.
+ 	* config/aarch64/aarch64-simd-builtins.def: Update comment.
+ 
+ 2019-08-13  Martin Liska  <mliska@suse.cz>
+ 
+ 	* value-prof.c (gimple_ic_transform): Add new line.
+ 	Print details with MSG_NOTE.
+ 
+ 2019-08-13  Martin Liska  <mliska@suse.cz>
+ 
+ 	* doc/invoke.texi: Document automatic detection of jobserver.
+ 	* lto-wrapper.c (run_gcc): Detect jobserver always.
+ 
+ 2019-08-13  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386-expand.c (ix86_expand_vector_set)
+ 	<case E_V2SImode>: Use vec_merge path for
+ 	TARGET_MMX_WITH_SSE && TARGET_SSE4_1.
+ 	<case E_V8QImode>: Ditto.
+ 	* config/i386/mmx.md (*mmx_pinsrd): New insn pattern.
+ 	(*mmx_pinsrb): Ditto.
+ 
+ 2019-08-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/83250
+ 	PR target/91340
+ 	* config/i386/avxintrin.h (_mm256_zextpd128_pd256,
+ 	_mm256_zextps128_ps256, _mm256_zextsi128_si256): New intrinsics.
+ 	* config/i386/avx512fintrin.h (_mm512_zextpd128_pd512,
+ 	_mm512_zextps128_ps512, _mm512_zextsi128_si512, _mm512_zextpd256_pd512,
+ 	_mm512_zextps256_ps512, _mm512_zextsi256_si512): Likewise.
+ 
+ 2019-08-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR lto/91375
+ 	* tree.c (free_lang_data_in_type): Do not free TYPE_BINFO dependent on
+ 	flag_devirtualize.
+ 
+ 2019-08-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR driver/91130
+ 	* lto-wrapper.c (get_options_from_collect_gcc_options): Remove
+ 	lang_mask option, always use CL_DRIVER.
+ 	(get_options_from_collect_gcc_options): Adjust.
+ 	(find_and_merge_options): Likewise.
+ 	(run_gcc): Likewise.
+ 
+ 2019-08-12  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* ipa-predicate.c (add_condition): Restore inverted test.
+ 
+ 2019-08-10  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_DEVICE_TYPE.
+ 	(enum omp_clause_device_type_kind): New enum.
+ 	(struct tree_omp_clause): Add subcode.device_type_kind.
+ 	* tree.h (OMP_CLAUSE_DEVICE_TYPE_KIND): Define.
+ 	* tree.c (omp_clause_num_ops, omp_clause_code_name): Add entries
+ 	for device_type clause.
+ 	(walk_tree_1): Handle OMP_CLAUSE_DEVICE_TYPE.
+ 	* tree-pretty-print.c (dump_omp_clause): Likewise.
+ 
+ 	PR target/91408
+ 	* config/i386/mmx.md (usadv8qi): Use register_operand instead of
+ 	vector_operand.
+ 
+ 2019-08-09  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	* reload1.c (finish_spills): Do not check ira_conflicts_p when
+ 	handling spilled pseudos.
+ 
+ 2019-08-09  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/91386
+ 	* config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Use copy_rtx
+ 	to preserve the contents of the original insns.
+ 
+ 2019-08-09  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/arm.md (addsi3_compare_op1): Add 16-bit thumb-2 variants.
+ 	(addsi3_compare_op2): Likewise.
+ 
+ 2019-08-09  Martin Liska  <mliska@suse.cz>
+ 
+ 	* alias.c (alias_ptr_types_compatible_p): Strengten
+ 	type comparison in LTO mode.
+ 
+ 2019-08-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/90313
+ 	* tree-tailcall.c (find_tail_calls): Reject calls that might
+ 	read from an escaped RESULT_DECL.
+ 
+ 2019-08-09  Martin Liska  <mliska@suse.cz>
+ 
+ 	* doc/invoke.texi: Document the option value.
+ 	* lto-wrapper.c (run_gcc): Set auto_parallel
+ 	only with -flto=auto.
+ 
+ 2019-08-09  Martin Liska  <mliska@suse.cz>
+ 
+ 	* opts.c (common_handle_option): Error for an invalid argument
+ 	to -flto=.
+ 
+ 2019-08-09  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf.c (sem_function::merge): Define AUTO_DUMP_SCOPE and
+ 	use dump_printf to report optimization.
+ 	(sem_variable::merge): Likwise.
+ 	(sem_item_optimizer::merge_classes): Use dump_printf to report
+ 	ICF hits.
+ 
+ 2019-08-09  Martin Liska  <mliska@suse.cz>
+ 
+ 	* value-prof.c (gimple_divmod_fixed_value_transform):
+ 	Use dump_printf_loc.
+ 	(gimple_mod_pow2_value_transform): Likewise.
+ 	(gimple_mod_subtract_transform): Likewise.
+ 	(init_node_map): Likewise.
+ 	(gimple_ic_transform): Likewise.
+ 	(gimple_stringops_transform): Likewise.
+ 
+ 2019-08-08  Mihailo Stojanovic  <mistojanovic@wavecomp.com>
+ 
+ 	* doc/extend.texi: Add const qualifier to ld intrinsics.
+ 
+ 2019-08-08  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/dfp.md (D64_D128): Rename to ...
+ 	(DDTD): ... this, throughout.
+ 	(dfp_suffix): Rename to ...
+ 	(q): ... this, throughout.
+ 
+ 2019-08-08  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/dfp.md (D64_D128): Move earlier in the file.
+ 	(dfp_suffix): Ditto.
+ 	(adddd3, addtd3): Merge to ...
+ 	(add<mode>3 for D64_D128): ... this.
+ 	(subdd3, subtd3): Merge to ...
+ 	(sub<mode>3 for D64_D128): ... this.
+ 	(muldd3, multd3): Merge to ...
+ 	(mul<mode>3 for D64_D128): ... this.
+ 	(divdd3, divtd3): Merge to ...
+ 	(div<mode>3 for D64_D128): ... this.
+ 	(*cmpdd_internal1, *cmptd_internal1): Merge to ...
+ 	(*cmp<mode>_internal1 for D64_D128): ... this.
+ 	(ftruncdd2, ftrunctd2): Merge to ...
+ 	(ftrunc<mode>2 for D64_D128): ... this.
+ 	(fixdddi2, fixtddi2): Merge to ...
+ 	(fix<mode>di2 for D64_D128): ... this.
+ 
+ 2019-08-08  Jim Wilson  <jimw@sifive.com>
+ 
+ 	PR target/91229
+ 	* config/riscv/riscv.c (riscv_flatten_aggregate_field): New arg
+ 	ignore_zero_width_bit_field_p.  Skip zero size bitfields when true.
+ 	Pass into recursive call.
+ 	(riscv_flatten_aggregate_argument): New arg.  Pass to
+ 	riscv_flatten_aggregate_field.
+ 	(riscv_pass_aggregate_in_fpr_pair_p): New local warned.  Call
+ 	riscv_flatten_aggregate_argument twice, with false and true as last
+ 	arg.  Process result twice.  Compare results and warn if different.
+ 	(riscv_pass_aggregate_in_fpr_and_gpr_p): Likewise.
+ 
+ 2019-08-08  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR bootstrap/91352
+ 	* gcc.c (driver::detect_jobserver): Use is_valid_fd.
+ 	* lto-wrapper.c (jobserver_active_p): Likewise.
+ 
+ 2019-08-08  Martin Liska  <mliska@suse.cz>
+ 
+ 	* cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
+ 	IS_OPERATOR_NEW and IS_OPERATOR_DELETE.
+ 	(create_version_clone_with_body): Likewise.
+ 
+ 2019-08-08  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gimplify.c (omp_add_variable): Use GOVD_PRIVATE | GOVD_EXPLICIT
+ 	for VLA helper variables on target data even if not GOVD_FIRSTPRIVATE.
+ 	(gimplify_scan_omp_clauses): For OMP_CLAUSE_USE_DEVICE_* use just
+ 	GOVD_EXPLICIT flags.
+ 	(gimplify_omp_workshare): For OMP_TARGET_DATA move all
+ 	OMP_CLAUSE_USE_DEVICE_* clauses to the end of clauses chain.
+ 	* omp-low.c (scan_sharing_clauses): For OMP_CLAUSE_USE_DEVICE_*
+ 	call install_var_field with mask 11 instead of 3.
+ 	(lower_omp_target): For OMP_CLAUSE_USE_DEVICE_* use pass
+ 	(splay_tree_key) &DECL_UID (var) to build_sender_ref instead of var.
+ 
+ 2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/constraints.md (Z): Handle floating-point zeros too.
+ 	* config/aarch64/predicates.md (aarch64_reg_or_zero): Likewise.
+ 
+ 2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): Add
+ 	MOVPRFX alternatives.  Make the GPR alternatives more expensive
+ 	than the FPR ones.
+ 
+ 2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (fold_extract_last_<mode>):
+ 	Disparage the GPR alternative relative to the FPR one.
+ 	Fix handling of 8-bit and 16-bit FPR values.
+ 
+ 2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (BITWISEV): Delete.
+ 	(SVE_INT_REDUCTION, SVE_FP_REDUCTION): New int iterators.
+ 	(optab): Handle UNSPEC_UMAXV, UNSPEC_UMINV, UNSPEC_SMAXV,
+ 	UNSPEC_SMINV, UNSPEC_FADDV, UNSPEC_FMAXNMV, UNSPEC_FMAXV,
+ 	UNSPEC_FMINNMV, UNSPEC_FMINV.
+ 	(bit_reduc_op): Delete.
+ 	(sve_int_op): New int attribute.
+ 	(sve_fp_op): Handle UNSPEC_FADDV, UNSPEC_FMAXNMV, UNSPEC_FMAXV,
+ 	UNSPEC_FMINNMV, UNSPEC_FMINV.
+ 	* config/aarch64/aarch64-sve.md
+ 	(reduc_<MAXMINV:maxmin_uns>_scal_<SVE_I:mode>)
+ 	(*reduc_<MAXMINV:maxmin_uns>_scal_<SVE_I:mode>)
+ 	(reduc_<BITWISEV:optab>_scal_<SVE_I:mode>)
+ 	(*reduc_<BITWISEV:optab>_scal_<SVE_I:mode>): Merge into...
+ 	(reduc_<SVE_INT_REDUCTION:optab>_scal_<SVE_I:mode>)
+ 	(*reduc_<SVE_INT_REDUCTION:optab>_scal_<SVE_I:mode>): ...these
+ 	new patterns.
+ 	(reduc_plus_scal_<SVE_F:mode>, *reduc_plus_scal_<SVE_I:mode>)
+ 	(reduc_<FMAXMINV:optab>_scal_<SVE_F:mode>)
+ 	(*reduc_<FMAXMINV:optab>_scal_<SVE_F:mode>): Merge into...
+ 	(reduc_<SVE_FP_REDUCTION:optab>_scal_<SVE_F:mode>)
+ 	(*reduc_<SVE_FP_REDUCTION:optab>_scal_<SVE_F:mode>): ...these
+ 	new patterns.
+ 
+ 2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (fma<mode>4, *fma<mode>4)
+ 	(fnma<mode>4, *fnma<mode>4, fnms<mode>4, *fnms<mode>4)
+ 	(fms<mode>4, *fms<mode>4): Replace with...
+ 	(<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4)
+ 	(*<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4): ...these new patterns.
+ 	Use unspecs instead of rtx codes.
+ 	(cond_<optab><mode>, *cond_<optab><mode>_2, *cond_<optab><mode>_4)
+ 	(*cond_<optab><mode>_any): Add the predicate to SVE_COND_FP_TERNARY.
+ 
+ 2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (SVE_COND_FP_MAXMIN_PUBLIC): New
+ 	int iterator.
+ 	(maxmin_uns_op): Handle UNSPEC_COND_FMAXNM and UNSPEC_COND_FMINNM.
+ 	* config/aarch64/aarch64-sve.md
+ 	(<FMAXMIN:su><FMAXMIN:maxmin><SVE_F:mode>3): Rename to...
+ 	(<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3): ...this and
+ 	use a single unspec for the rhs.
+ 	(*<su><maxmin><mode>3): Delete.
+ 	(<maxmin_uns><SVE_F:mode>3): Use a single unspec for the rhs.
+ 
+ 2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (UNSPEC_COND_FABS, UNSPEC_COND_FNEG)
+ 	(UNSPEC_COND_FRINTA, UNSPEC_COND_FRINTI, UNSPEC_COND_FRINTM)
+ 	(UNSPEC_COND_FRINTN, UNSPEC_COND_FRINTP, UNSPEC_COND_FRINTX)
+ 	(UNSPEC_COND_FRINTZ, UNSPEC_COND_FSQRT): New unspecs.
+ 	(optab, sve_fp_op): Handle them.
+ 	(SVE_FP_UNARY): Delete.
+ 	(optab): Remove sqrt entry.
+ 	(sve_fp_op): Remove neg, abs and sqrt entries.
+ 	(SVE_COND_FP_UNARY): New int iterator.
+ 	* config/aarch64/aarch64-sve.md (<frint_pattern><mode>2)
+ 	(*<frint_pattern><mode>2): Delete.
+ 	(<SVE_FP_UNARY:optab><SVE_F:mode>2): Replace with...
+ 	(<SVE_COND_FP_UNARY:optab><SVE_F:mode>2): ...this.
+ 	(*<SVE_FP_UNARY:optab><SVE_F:mode>2): Replace with...
+ 	(*<SVE_COND_FP_UNARY:optab><SVE_F:mode>2): ...this.
+ 
+ 2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (*pred_fold_left_plus_<mode>): Delete.
+ 
+ 2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (UNSPEC_COND_ADD): Rename to...
+ 	(UNSPEC_COND_FADD): ...this.
+ 	(UNSPEC_COND_SUB): Rename to...
+ 	(UNSPEC_COND_FSUB): ...this.
+ 	(UNSPEC_COND_MUL): Rename to...
+ 	(UNSPEC_COND_FMUL): ...this.
+ 	(UNSPEC_COND_DIV): Rename to...
+ 	(UNSPEC_COND_FDIV): ...this.
+ 	(UNSPEC_COND_MAX): Rename to...
+ 	(UNSPEC_COND_FMAXNM): ...this.
+ 	(UNSPEC_COND_MIN): Rename to...
+ 	(UNSPEC_COND_FMINNM): ...this.
+ 	(UNSPEC_COND_LT): Rename to...
+ 	(UNSPEC_COND_FCMLT): ...this.
+ 	(UNSPEC_COND_LE): Rename to...
+ 	(UNSPEC_COND_FCMLE): ...this.
+ 	(UNSPEC_COND_EQ): Rename to...
+ 	(UNSPEC_COND_FCMEQ): ...this.
+ 	(UNSPEC_COND_NE): Rename to...
+ 	(UNSPEC_COND_FCMNE): ...this.
+ 	(UNSPEC_COND_GE): Rename to...
+ 	(UNSPEC_COND_FCMGE): ...this.
+ 	(UNSPEC_COND_GT): Rename to...
+ 	(UNSPEC_COND_FCMGT): ...this.
+ 	(SVE_COND_FP_BINARY, SVE_COND_FP_CMP, optab, cmp_op, sve_fp_op)
+ 	(sve_fp_op_rev): Update accordingly.
+ 	* config/aarch64/aarch64.c (aarch64_unspec_cond_code): Likewise.
+ 
+ 2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md: Reorganize contents and add
+ 	banner comments.
+ 	* config/aarch64/check-sve-md.awk: New file.
+ 	* config/aarch64/t-aarch64 (s-check-sve-md): New rule.
+ 	(insn-conditions.md): Depend on it.
+ 
+ 2019-08-07  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/91385
+ 	* config/i386/sse.md (*negsi2_1_zext): Simplify insn pattern.
+ 	(*negsi2_cmpz_zext): Ditto.
+ 
+ 2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/iterators.md (commutative): Remove.
+ 
+ 2019-08-07  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR driver/91130
+ 	* lto-wrapper.c (find_and_merge_options): Use CL_DRIVER when
+ 	processing COLLECT_GCC_OPTIONS.
+ 	(run_gcc): Likewise.
+ 
+ 2019-08-07  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	PR tree-optimization/91109
+ 	* lra-remat.c (update_scratch_ops): Remove assignment of the
+ 	hard register.
+ 
+ 2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* data-streamer.h (streamer_write_poly_uint64): Declare.
+ 	(streamer_read_poly_uint64): Likewise.
+ 	* data-streamer-in.c (streamer_read_poly_uint64): New function.
+ 	* data-streamer-out.c (streamer_write_poly_uint64): Likewise.
+ 	* ipa-predicate.h (condition::size): Turn into a poly_int64.
+ 	(add_condition): Take a poly_int64 size.
+ 	* ipa-predicate.c (add_condition): Likewise.
+ 	* ipa-prop.h (ipa_load_from_parm_agg): Take a poly_int64 size pointer.
+ 	* ipa-prop.c (ipa_load_from_parm_agg): Likewise.
+ 	(ipcp_modif_dom_walker::before_dom_children): Update accordingly.
+ 	* ipa-fnsummary.c (evaluate_conditions_for_known_args): Handle
+ 	condition::size as a poly_int64.
+ 	(unmodified_parm_1): Take a poly_int64 size pointer.
+ 	(unmodified_parm): Likewise.
+ 	(unmodified_parm_or_parm_agg_item): Likewise.
+ 	(set_cond_stmt_execution_predicate): Update accordingly.
+ 	(set_switch_stmt_execution_predicate): Likewise.
+ 	(will_be_nonconstant_expr_predicate): Likewise.
+ 	(will_be_nonconstant_predicate): Likewise.
+ 	(inline_read_section): Stream condition::size as a poly_int.
+ 	(ipa_fn_summary_write): Likewise.
+ 
+ 2019-08-07  Martin Liska  <mliska@suse.cz>
+ 
+ 	* fold-const.c (twoval_comparison_p): Replace int
+ 	with bool as a return type.
+ 	(simple_operand_p): Likewise.
+ 	(operand_equal_p): Replace int with bool as a return type.
+ 	* fold-const.h (operand_equal_p): Likewise.
+ 
+ 2019-08-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree-core.h (enum omp_clause_code): Adjust OMP_CLAUSE_USE_DEVICE_PTR
+ 	OpenMP description.  Add OMP_CLAUSE_USE_DEVICE_ADDR clause.
+ 	* tree.c (omp_clause_num_ops, omp_clause_code_name): Add entries
+ 	for OMP_CLAUSE_USE_DEVICE_ADDR clause.
+ 	(walk_tree_1): Handle OMP_CLAUSE_USE_DEVICE_ADDR.
+ 	* tree-pretty-print.c (dump_omp_clause): Likewise.
+ 	* tree-nested.c (convert_nonlocal_omp_clauses,
+ 	convert_local_omp_clauses): Likewise.
+ 	* gimplify.c (gimplify_scan_omp_clauses, gimplify_adjust_omp_clauses):
+ 	Likewise.
+ 	* omp-low.c (scan_sharing_clauses, lower_omp_target): Likewise.
+ 	Treat OMP_CLAUSE_USE_DEVICE_ADDR like OMP_CLAUSE_USE_DEVICE_PTR
+ 	clause with array or reference to array types, no matter what type
+ 	except for reference it has.
+ 
+ 2019-08-07  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	* config/rs6000/vector.md (vrotr<mode>3): New define_expand.
+ 
+ 2019-08-07  Kito Cheng  <kito.cheng@sifive.com>
+ 
+ 	* config/riscv/multilib-generator: (canonical_order): Add 'g'.
+ 	(arch_canonicalize): Support rv32g and rv64g and fix error
+ 	handling.
+ 
+ 2019-08-06  Martin Liska  <mliska@suse.cz>
+ 
+ 	* cgraph.c (cgraph_node::dump): Dump DECL_IS_OPERATOR_NEW_P
+ 	and DECL_IS_OPERATOR_DELETE_P.
+ 
+ 2019-08-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree.h (OMP_CLAUSE_LASTPRIVATE_TASKLOOP_IV): Rename to ...
+ 	(OMP_CLAUSE_LASTPRIVATE_LOOP_IV): ... this.  Adjust comment.
+ 	* gimplify.c (gimple_add_tmp_var): In SIMD contexts, turn addressable
+ 	new vars into GOVD_PRIVATE rather than GOVD_LOCAL.
+ 	(gimplify_omp_for): Don't do C++ random access iterator clause
+ 	adjustments on combined constructs from OMP_LOOP.  For OMP_LOOP,
+ 	don't predetermine the artificial iterator in case of C++ random
+ 	access iterators as lastprivate, but private.  For OMP_LOOP, force
+ 	bind expr around simd body and force for_pre_body before the
+ 	construct.  Use OMP_CLAUSE_LASTPRIVATE_LOOP_IV instead of
+ 	OMP_CLAUSE_LASTPRIVATE_TASKLOOP_IV.
+ 	(gimplify_omp_loop): Add firstprivate clauses on OMP_PARALLEL for
+ 	diff var of C++ random access iterators.  Handle
+ 	OMP_CLAUSE_FIRSTPRIVATE.  For OMP_CLAUSE_LASTPRIVATE_LOOP_IV, if
+ 	not outermost also add OMP_CLAUSE_FIRSTPRIVATE, and in both cases
+ 	clear OMP_CLAUSE_LASTPRIVATE_LOOP_IV on the lastprivate clause
+ 	on the OMP_FOR and OMP_DISTRIBUTE constructs if any.
+ 	* omp-low.c (lower_rec_input_clauses): For
+ 	OMP_CLAUSE_LASTPRIVATE_LOOP_IV on simd copy construct the private
+ 	variables instead of default constructing them.
+ 	(lower_lastprivate_clauses): Use OMP_CLAUSE_LASTPRIVATE_LOOP_IV
+ 	instead of OMP_CLAUSE_LASTPRIVATE_TASKLOOP_IV and move the
+ 	is_taskloop_ctx check from the assert to the guarding condition.
+ 
+ 2019-08-06  Kito Cheng  <kito.cheng@sifive.com>
+ 
+ 	* config/riscv/multilib-generator: (canonical_order): New.
+ 	(arch_canonicalize): Dito.
+ 	Apply arch_canonicalize for alts.
+ 
+ 2019-08-05  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* doc/extend.texi (Common Variable Attributes): Document alias
+ 	attribute.
+ 
+ 2019-08-05  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/91338 - Implement P1161R3: Deprecate a[b,c].
+ 	* doc/invoke.texi: Document -Wcomma-subscript.
+ 
+ 2019-08-05  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-core.h (tree_function_decl): Make function_code an
+ 	independent field.  Group the remaining bitfields into bytes
+ 	and move decl_type so that it contines to be at a byte boundary.
+ 	Leave 12 bits for future expansion.
+ 
+ 2019-08-05  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* gimple-fold.c (gimple_fold_mask_load_store_mem_ref)
+ 	(gimple_fold_mask_load, gimple_fold_mask_store): New functions.
+ 	(gimple_fold_call): Use them to fold IFN_MASK_LOAD and
+ 	IFN_MASK_STORE.
+ 
+ 2019-08-05  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* gimple.h (gimple_move_vops): Declare.
+ 	* gimple.c (gimple_move_vops): New function
+ 	* gimple-fold.c (replace_call_with_call_and_fold)
+ 	(gimple_fold_builtin_memory_op, gimple_fold_builtin_memset)
+ 	(gimple_fold_builtin_stpcpy, fold_builtin_atomic_compare_exchange)
+ 	(gimple_fold_call): Use it.
+ 	* ipa-param-manipulation.c (ipa_modify_call_arguments): Likewise.
+ 	* tree-call-cdce.c (use_internal_fn): Likewise.
+ 	* tree-if-conv.c (predicate_load_or_store): Likewise.
+ 	* tree-ssa-ccp.c (optimize_atomic_bit_test_and): Likewise.
+ 	* tree-ssa-math-opts.c (pass_cse_reciprocals::execute): Likewise.
+ 	* tree-ssa-propagate.c (finish_update_gimple_call): Likewise.
+ 	(update_call_from_tree): Likewise.
+ 	* tree-vect-stmts.c (vectorizable_load): Likewise.
+ 	* tree-vectorizer.c (adjust_simduid_builtins): Likewise.
+ 
+ 2019-08-05  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR c++/91334
+ 	* tree-ssa-dce.c (propagate_necessity): Handle new operators
+ 	with not arguments.
+ 	(eliminate_unnecessary_stmts): Likewise.
+ 
+ 2019-08-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/91169
+ 	* fold-const.c (get_array_ctor_element_at_index): Create
+ 	offset_ints according to the sign of the index type and treat
+ 	that as signed if it is obviously so.
+ 
+ 2019-08-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/91341
+ 	* config/i386/avxintrin.h (_mm256_loadu2_m128, _mm256_storeu2_m128,
+ 	_mm256_loadu2_m128d, _mm256_storeu2_m128d, _mm256_loadu2_m128i,
+ 	_mm256_storeu2_m128i): New function.
+ 
+ 2019-08-05  Kito Cheng  <kito.cheng@sifive.com>
+ 
+ 	* config/riscv/riscv.c (riscv_promote_function_mode): New.
+ 	(TARGET_PROMOTE_FUNCTION_MODE): Use riscv_promote_function_mode.
+ 
+ 2019-08-05  Alan Modra  <amodra@gmail.com>
+ 
+ 	PR target/91349
+ 	* config/rs6000/freebsd64.h (CPLUSPLUS_CPP_SPEC),
+ 	(LINK_GCC_C_SEQUENCE_SPEC): Undef.
+ 
+ 2019-08-04  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* doc/install.texi (Prerequisites): Remove reference to Tcl 8.6
+ 	bug that was fixed in Tcl 8.6.1.
+ 
+ 2019-08-02  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/future.md: New file.
+ 	* config/rs6000/rs6000.md: Include future.md.
+ 	* config/rs6000/t-rs6000 (MD_INCLUDES): Add future.md.
+ 
+ 2019-08-02  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* function.c (assign_parm_adjust_stack_rtl): Revise STRICT_ALIGNMENT
+ 	check to use targetm.slow_unaligned_access instead.
+ 
+ 	* function.c (assign_param_data_one): Remove unused data members.
+ 
+ 2019-08-02  Steve Ellcey  <sellcey@marvell.com>
+ 
+ 	* omp-simd-clone.c (simd_clone_adjust_return_type): Remove call to
+ 	build_distinct_type_copy.
+ 	(simd_clone_adjust_argument_types): Ditto.
+ 	(simd_clone_adjust): Call build_distinct_type_copy here.
+ 	(expand_simd_clones): Ditto.
+ 
+ 2019-08-02  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/91201
+ 	* config/i386/sse.md (*vec_extractv16qi_zext): New insn pattern.
+ 
+ 2019-08-02  Alexander Monakov  <amonakov@ispras.ru>
+ 
+ 	* tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Simplify casts
+ 	from 'const void *'.
+ 	(sort_locs_in_loop_postorder_cmp): Likewise.
+ 
+ 2019-08-02  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* doc/invoke.texi (hot-bb-count-fraction): Rework description.
+ 	(hot-bb-count-ws-permille): Likewise.
+ 	(hot-bb-frequency-fraction): Likewise.
+ 	(unlikely-bb-count-fraction): Likewise.
+ 	* params.def (hot-bb-count-fraction): Rework description.
+ 	(hot-bb-count-ws-permille): Likewise.
+ 	(hot-bb-frequency-fraction): Likewise.
+ 	(unlikely-bb-count-fraction): Likewise.  Remove min and max values.
+ 	* predict.c (get_hot_bb_threshold): Deal with 0 HOT_BB_COUNT_FRACTION.
+ 
+ 2019-08-02  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/91323
+ 	* config/i386/i386-expand.c (ix86_unordered_fp_compare) <case LTGT>:
+ 	Return false.
+ 
+ 2019-08-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	* vec.h (vec::sort): Add gcc_qsort_r support.
+ 	(vec::bsearch): Add an overload with gcc_qsort_r style callbacks.
+ 	* tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Adjust
+ 	to gcc_qsort_r style callback.
+ 	(sort_locs_in_loop_postorder_cmp): Likewise.
+ 	(analyze_memory_references): Use gcc_sort_r interfaces.
+ 	(find_ref_loc_in_loop_cmp): Use new bsearch overload.
+ 
+ 2019-08-02  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR lto/91313
+ 	* gcc.c (driver::maybe_run_linker): Call detect_jobserver
+ 	to detect working job server.
+ 	(driver::detect_jobserver): Test whether jobserver
+ 	is active from GCC driver. That will prevent situation where
+ 	GCC is invoked from a LD plugin and the linker already uses
+ 	file descriptors suggested by make.  That leads to a wrong
+ 	detection.
+ 	* gcc.h (driver): Add detect_jobserver.
+ 	* lto-wrapper.c (jobserver_active_p): Simplify sscanf by
+ 	not scanning for --jobserver-auth prefix.
+ 
+ 2019-08-02  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/91201
+ 	* config/i386/i386-expand.c (ix86_expand_vector_extract): For elt == 0
+ 	V16QImode extraction without sse4.1 try to use V4SImode lowpart
+ 	extraction.
+ 
+ 2019-08-01  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR c++/90947
+ 	* tree.c (type_initializer_zero_p): Define.
+ 	* tree.h (type_initializer_zero_p): New function.
+ 
+ 2019-08-01  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* cfgrtl.c (relink_block_chain): Add line returns in dump file.
+ 
+ 2019-08-01  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* cgraph.h (cgraph_edge::maybe_hot_p): Tweak comment.
+ 	* cgraph.c (cgraph_edge::maybe_hot_p): Likewise.  Remove useless test.
+ 	* predict.c (maybe_hot_count_p): Likewise.
+ 	(maybe_hot_bb_p): Tweak comment.
+ 	(maybe_hot_edge_p): Likewise.
+ 	(probably_never_executed): Likewise.  Minor tweak.
+ 	(probably_never_executed_bb_p): Likewise.
+ 	(unlikely_executed_edge_p): Likewise.
+ 	(probably_never_executed_edge_p): Likewise.
+ 	(optimize_function_for_size_p): Likewise.
+ 	(optimize_function_for_speed_p): Likewise.
+ 	(function_optimization_type): Likewise.
+ 	(optimize_bb_for_size_p): Likewise.
+ 	(optimize_bb_for_speed_p): Likewise.
+ 	(bb_optimization_type): Likewise.
+ 	(optimize_edge_for_size_p): Likewise.
+ 	(optimize_edge_for_speed_p): Likewise.
+ 	(optimize_insn_for_size_p): Likewise.
+ 	(optimize_insn_for_speed_p): Likewise.
+ 	(optimize_loop_for_size_p): Likewise.
+ 	(optimize_loop_for_speed_p): Likewise.
+ 	(optimize_loop_nest_for_speed_p): Likewise.
+ 	(optimize_loop_nest_for_size_p): Likewise.
+ 	(predictable_edge_p): Likewise.
+ 	(handle_missing_profiles): Minor tweak.
+ 
+ 2019-08-01  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/predicates.md (pcrel_external_address): Update
+ 	comment.
+ 
+ 2019-08-01  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/85693
+ 	* config/i386/mmx.md (usadv8qi): New expander.
+ 
+ 2019-08-01  Matthew Beliveau  <mbelivea@redhat.com>
+ 
+ 	PR c++/90590
+ 	* c-warn.c (c_do_switch_warnings): Suppress warning for enumerators
+ 	with reserved names that are in a system header.
+ 
+ 2019-08-01  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/mmx.md (vec_extractv2si_0): Add (r,x) alternative.
+ 	(*vec_extractv2si_0_zext_sse4): New insn pattern.
+ 	(*vec_extractv2si_0_zext): Ditto.
+ 	(*vec_extractv2si_1): Add (rm,x) alternative.
+ 	(*vec_extractv2si_1_zext): New insn pattern.
+ 	(*vec_extractv2si_zext_mem): Add "TARGET_MMX || TARGET_MMX_WITH_SSE"
+ 	insn constraint.
+ 
+ 2019-08-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	* domwalk.c (bb_postorder): Remove static variable.
+ 	(cmp_bb_postorder): Adjust.
+ 	(sort_bbs_postorder): Adjust and use gcc_sort_r.
+ 	(dom_walker::walk): Adjust.
+ 
+ 2019-08-01  Alexander Monakov  <amonakov@ispras.ru>
+ 
+ 	* sort.cc (sort_r_ctx): New struct.
+ 	(reorder23): Make templated on context type.
+ 	(reorder45): Ditto.
+ 	(cmp1): Ditto.  Adjust signature.
+ 	(netsort): Ditto.
+ 	(mergesort): Ditto.
+ 	[CHECKING_P] (cmp2to3): New static function.  Use it...
+ 	(gcc_qsort) [CHECKING_P]: ...here.
+ 	(gcc_sort_r): New function.
+ 	* system.h (sort_r_cmp_fn): New function typedef.
+ 	(qsort_chk): Adjust signature.
+ 	(gcc_sort_r): Declare.
+ 	* vec.c (qsort_chk_error): Adjust.
+ 	(qsort_chk): Adjust.
+ 
+ 2019-08-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-pre.c (has_abnormal_preds): Remove global var.
+ 	(compute_antic): Localize it here.
+ 
+ 2019-07-31  Maxim Blinov  <maxim.blinov@embecosm.com>
+ 
+ 	* common/config/riscv/riscv-common.c: Check -march string ends
+ 	with null.
+ 
+ 2019-07-31  Alexander Monakov  <amonakov@ispras.ru>
+ 
+ 	* ipa-devirt.c (type_warning_cmp): Make static.
+ 	(decl_warning_cmp): Ditto.
+ 
+ 2019-07-31  Peter Bergner  <bergner@linux.ibm.com>
+ 
+ 	PR target/91050
+ 	* config/rs6000/rs6000.opt (mdejagnu-cpu=): Delete option.
+ 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Remove
+ 	use of deleted rs6000_dejagnu_cpu_index variable.
+ 	* config/rs6000/rs6000.h (DRIVER_SELF_SPECS): Define.
+ 	(SUBTARGET_DRIVER_SELF_SPECS): Likewise.
+ 	* config/darwin.h (DRIVER_SELF_SPECS): Rename from this ...
+ 	(SUBTARGET_DRIVER_SELF_SPECS): ...to this.
+ 	* config/i386/i386.h (DRIVER_SELF_SPECS): Define.
+ 	(SUBTARGET_DRIVER_SELF_SPECS): Likewise.
+ 
+ 2019-07-31  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91280
+ 	* tree-ssa-structalias.c (get_constraint_for_component_ref):
+ 	Decompose MEM_REF manually for offset handling.
+ 
+ 2019-07-31  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91293
+ 	* tree-vect-slp.c (vect_build_slp_tree_2): Do not swap operands
+ 	of reduction stmts.
+ 
+ 2019-07-31  Matt Thomas  <matt@3am-software.com>
+ 	    Nick Hudson  <nick@nthcliff.demon.co.uk>
+ 	    Matthew Green  <mrg@eterna.com.au>
+ 	    Maya Rashish  <coypu@sdf.org>
+ 
+ 	* config.gcc (hppa*-*-netbsd*): New target.
+ 	* config/pa/pa-netbsd.h: New file.
+ 	* config/pa/pa32-netbsd.h: New file.
+ 
+ 2019-07-31  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/91201
+ 	* config/i386/mmx.md (reduc_plus_scal_v8qi): New expander.
+ 
+ 2019-07-31  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-valu.md
+ 	(scatter<mode>_insn_1offset<exec_scatter>): Remove s_waitcnt.
+ 	(scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
+ 	(scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
+ 	* config/gcn/gcn.c (gcn_md_reorg): Add delayeduse and reads to
+ 	struct ilist. Add nops for delayeduse insns.
+ 	* config/gcn/gcn.md (delayeduse): New attribute.
+ 	(*movbi): Remove s_waitcnt from stores.
+ 	(*mov<mode>_insn): Likewise.
+ 	(*movti_insn): Likewise. Add delayeduse attribute.
+ 	(sync_compare_and_swap<mode>_insn): Add delayeduse attribute.
+ 	(atomic_store<mode>): Remove or adjust s_waitcnt.
+ 
+ 2019-07-31  Richard Biener  <rguenther@suse.de>
+ 
+ 	* vr-values.h (vr_values::swap_vr_value): New.
+ 	(vr_values::free_value_range): likewise.
+ 	* vr-values.c (vr_values::swap_vr_value): Implement.
+ 	* gimple-ssa-evrp-analyze.h (evrp_range_analyzer::pop_value_range):
+ 	Do not return a range or take a var.
+ 	(evrp_range_analyzer::stack): Change back to recording a non-const
+ 	value_range *.
+ 	* gimple-ssa-evrp-analyze.c
+ 	(evrp_range_analyzer::record_ranges_from_stmt): Free unused
+ 	value-range.
+ 	(evrp_range_analyzer::pop_to_marker): Adjust.
+ 	(evrp_range_analyzer::push_value_range): Use new swap_vr_value.
+ 	(evrp_range_analyzer::pop_value_range): Likewise.  Free the
+ 	no longer needed value-range.
+ 
+ 2019-07-31  Martin Liska  <mliska@suse.cz>
+ 
+ 	* tree-ssa-dce.c (propagate_necessity): Delete operator can
+ 	have size and (or) alignment as 2nd and later arguments.
+ 	Mark all of them as necessary.
+ 
+ 2019-07-31  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91178
+ 	* tree-ssa-sccvn.c (vn_reference_maybe_forwprop_address):
+ 	Use tail-recursion.
+ 
+ 2019-07-31  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/91201
+ 	* config/i386/sse.md (reduc_plus_scal_v16qi): New expander.
+ 	(REDUC_PLUS_MODE): Add V32QImode for TARGET_AVX and V64QImode for
+ 	TARGET_AVX512F.
+ 	(reduc_plus_scal_<mode>): Improve formatting by introducing
+ 	a temporary.
+ 
+ 2019-07-31  Sudakshina Das  <sudi.das@arm.com>
+ 
+ 	* config/aarch64/aarch64-builtins.c (enum aarch64_builtins): Add
+ 	AARCH64_TME_BUILTIN_TSTART, AARCH64_TME_BUILTIN_TCOMMIT,
+ 	AARCH64_TME_BUILTIN_TTEST and AARCH64_TME_BUILTIN_TCANCEL.
+ 	(aarch64_init_tme_builtins): New.
+ 	(aarch64_init_builtins): Call aarch64_init_tme_builtins.
+ 	(aarch64_expand_builtin_tme): New.
+ 	(aarch64_expand_builtin): Handle TME builtins.
+ 	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
+ 	__ARM_FEATURE_TME when enabled.
+ 	* config/aarch64/aarch64-option-extensions.def: Add "tme".
+ 	* config/aarch64/aarch64.h (AARCH64_FL_TME, AARCH64_ISA_TME): New.
+ 	(TARGET_TME): New.
+ 	* config/aarch64/aarch64.md (define_c_enum "unspec"): Add UNSPEC_TTEST.
+ 	(define_c_enum "unspecv"): Add UNSPECV_TSTART, UNSPECV_TCOMMIT and
+ 	UNSPECV_TCANCEL.
+ 	(tstart, ttest, tcommit, tcancel): New instructions.
+ 	* config/aarch64/arm_acle.h (__tstart, __tcommit): New.
+ 	(__tcancel, __ttest): New.
+ 	(_TMFAILURE_REASON, _TMFAILURE_RTRY, _TMFAILURE_CNCL): New macro.
+ 	(_TMFAILURE_MEM, _TMFAILURE_IMP, _TMFAILURE_ERR): Likewise.
+ 	(_TMFAILURE_SIZE, _TMFAILURE_NEST, _TMFAILURE_DBG): Likewise.
+ 	(_TMFAILURE_INT, _TMFAILURE_TRIVIAL): Likewise.
+ 	* config/arm/types.md: Add new tme type attr.
+ 	* doc/invoke.texi: Document "tme".
+ 
+ 2019-07-31  Joel Hutton  <Joel.Hutton@arm.com>
+ 
+ 	* config/arm/arm_cmse.h (cmse_nonsecure_caller): Add
+ 	warn_unused_result attribute.
+ 	(cmse_check_address_range): Add warn_unused_result attribute.
+ 
+ 2019-07-31  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91257
+ 	* tree-vrp.c (union_ranges): Unify equality and less tests
+ 	by using compare_values.  Re-order cheap tests first.
+ 
+ 2019-07-31  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/91301
+ 	* gimplify.c (gimplify_omp_for): If for class iterator on
+ 	distribute parallel for there is no data sharing clause
+ 	on inner_for_stmt, look for private clause on combined
+ 	parallel too and if found, move it to inner_for_stmt.
+ 
+ 2019-07-31  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* lra-int.h (lra_operand_data): Remove early_clobber field.
+ 	(lra_insn_reg): Likewise.
+ 	* lra.c (debug_operand_data): Update accordingly.
+ 	(setup_operand_alternative): Likewise.
+ 	(new_insn_reg): Likewise.  Remove early_clobber parameter.
+ 	(collect_non_operand_hard_regs): Update call accordingly.
+ 	Don't assign to lra_insn_reg::early_clobber.
+ 	(add_regs_to_insn_regno_info): Remove early_clobber parameter
+ 	and update calls to new_insn_reg.
+ 	(lra_update_insn_regno_info): Update calls accordingly.
+ 	* lra-constraints.c (update_and_check_small_class_inputs): Take the
+ 	alternative number as a parameter and test whether the operand
+ 	is earlyclobbered in that particular alternative.
+ 	(process_alt_operands): Update call accordingly.  Use per-alternative
+ 	checks for earyclobber here too.
+ 	* lra-lives.c (reg_early_clobber_p): Check early_clobber_alts
+ 	against zero for IRA_UNKNOWN_ALT.
+ 
+ 2019-07-30  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/alpha/alpha.c (alpha_option_override): Quote a C type.
+ 
+ 2019-07-30  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/thumb2.md (thumb2_movsi_insn): Adjust literal offset.
+ 	* config/arm/vfp.md (thumb2_movsi_vfp): Likewise.
+ 
+ 2019-07-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/89330
+ 	* cgraph.c (cgraph_edge::make_direct): Use
+ 	edge->indirect_unknown_callee as edge->resolve_speculation can
+ 	deallocate edge which is this pointer.
+ 
+ 2019-07-30  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91257
+ 	* bitmap.c (bitmap_ior_and_compl_into): Open-code.
+ 
+ 2019-07-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	* doc/invoke.texi: Document new behavior.
+ 	* lto-wrapper.c (cpuset_popcount): New function
+ 	is a copy of libgomp/config/linux/proc.c.
+ 	(init_num_threads): Likewise.
+ 	(run_gcc): Automatically detect core count for -flto.
+ 	(jobserver_active_p): New function.
+ 
+ 2019-07-30  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91257
+ 	* bitmap.h (bitmap_ior_into_and_free): Declare.
+ 	* bitmap.c (bitmap_list_unlink_element): Add defaulted param
+ 	whether to add the unliked element to the freelist.
+ 	(bitmap_list_insert_element_after): Add defaulted param for
+ 	an already allocated element.
+ 	(bitmap_ior_into_and_free): New function.
+ 	* tree-ssa-structalias.c (condense_visit): Reduce the
+ 	ponts-to and edge bitmaps of the SCC members in a
+ 	logarithmic fashion rather than all to one.
+ 
+ 2019-07-30  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-ssa-math-opts.c (convert_mult_to_fma): Add a mul_cond
+ 	parameter.  When nonnull, make sure that the addition or subtraction
+ 	has the same condition.
+ 	(math_opts_dom_walker::after_dom_children): Try convert_mult_to_fma
+ 	for CFN_COND_MUL too.
+ 
+ 2019-07-30  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91291
+ 	* tree-ssa-sccvn.c (rpo_elim::eliminate_push_avail): Ignore
+ 	constant values.
+ 
+ 2019-07-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/91216
+ 	* omp-low.c (global_nonaddressable_vars): New variable.
+ 	(use_pointer_for_field): For global decls, if they are non-addressable,
+ 	remember it in the global_nonaddressable_vars bitmap, if they are
+ 	addressable and in the global_nonaddressable_vars bitmap, ignore their
+ 	TREE_ADDRESSABLE bit.
+ 	(omp_copy_decl_2): Clear TREE_ADDRESSABLE also on private copies of
+ 	vars in global_nonaddressable_vars bitmap.
+ 	(execute_lower_omp): Free global_nonaddressable_vars bitmap.
+ 
+ 	PR target/91150
+ 	* config/i386/i386-expand.c (expand_vec_perm_blend): Change mask type
+ 	from unsigned to unsigned HOST_WIDE_INT.  For E_V64QImode cast
+ 	comparison to unsigned HOST_WIDE_INT before shifting it left.
+ 
+ 2019-07-30  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (movstrict<mode>): Use register_operand
+ 	predicate for operand 0.  Add expander condition.  Assert that
+ 	operand 0 is a SUBREG RTX.
+ 	(*movstrict<mode>_1): Use register_operand predicate for operand 0.
+ 	Update operand constraints and insn condition.
+ 	(zero_extend<mode>si2_and): Do not call gen_movstrict<mode>.
+ 	(zero_extendqihi2_and): Do not call gen_movstrictqi.
+ 	(*setcc_qi_slp): Use register_operand predicate for operand 0.
+ 	Update operand 0 constraints.
+ 	(setcc_qi_slp splitters): Use register_operand predicate for operand 0.
+ 
+ 2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.h (DRIVER_SELF_SPECS): Define and emit errors
+ 	when -m{code,data}-region are used without -mlarge.
+ 	* config/msp430/msp430.c (msp430_option_override): Error when a
+ 	non-default code or data region is used without -mlarge.
+ 	(msp430_section_attr): Emit a warning and do not add upper/lower/either
+ 	attributes when they are used without -mlarge.
+ 
+ 2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	PR target/70320
+ 	* config/msp430/msp430.h: Define ADDITIONAL_REGISTER_NAMES.
+ 
+ 2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/91242
+ 	* wide-int.h (generic_wide_int::sext_elt): New function.
+ 	* inchash.h (hash::add_wide_int): Use it instead of elt.
+ 
+ 2019-07-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/arm-builtins.c (acle_builtin_data): Expand VAR1 to
+ 	CODE_FOR_arm_##.
+ 	* config/arm/arm.md (<crc_variant>): Rename to...
+ 	(arm_<crc_variant>): ... This.
+ 	(<cdp>): Rename to...
+ 	(arm_<cdp>): ... This.
+ 	(<ldc>): Rename to...
+ 	(arm_<ldc>): ... This.
+ 	(<stc>): Rename to...
+ 	(arm_<stc>): ... This.
+ 	(<mcr>): Rename to...
+ 	(arm_<mcr>): ... This.
+ 	(<mrc>): Rename to...
+ 	(arm_<mrc>): ... This.
+ 	(<mcrr>): Rename to...
+ 	(arm_<mcrr>): ... This.
+ 	(<mrrc>): Rename to...
+ 	(arm_<mrrc>): ... This.
+ 
+ 2019-07-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91257
+ 	* tree-ssa-sccvn.h (struct vn_avail): New.
+ 	(struct vn_ssa_aux): Add avail member.
+ 	* tree-ssa-sccvn.c (class rpo_elim): Remove m_rpo_avail
+ 	member, add m_avail_freelist one.
+ 	(rpo_elim::~rpo_elim): Remove.
+ 	(rpo_elim::eliminate_avail): Adjust to new avail tracking
+ 	data structure.
+ 	(rpo_elim::eliminate_push_avail): Likewise.
+ 	(do_unwind): Likewise.
+ 	(do_rpo_vn): Likewise.
+ 
+ 2019-07-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91257
+ 	* tree-vrp.c (operand_less_p): Avoid dispatching to fold for
+ 	most cases, instead call compare_values which handles the
+ 	symbolic ranges we handle specially.
+ 	(compare_values_warnv): Do not call operand_less_p but open-code
+ 	the effective fold calls.  Avoid converting so much.
+ 
+ 2019-07-29  Martin Liska  <mliska@suse.cz>
+ 
+ 	* tree-ssa-dce.c (eliminate_unnecessary_stmts): Do not
+ 	remove LHS of operator new call.  It's handled latter.
+ 
+ 2019-07-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91267
+ 	* vr-values.c (vr_values::update_value_range): Add early return
+ 	for effectively VARYING lattice entry.
+ 
+ 2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR debug/86638
+ 	* tree-ssa-dce.c (keep_all_vdefs_p): New function.
+ 	(mark_stmt_if_obviously_necessary): Mark all stmts with vdefs as
+ 	necessary if keep_all_vdefs_p is true.
+ 	(mark_aliased_reaching_defs_necessary): Add a gcc_checking_assert
+ 	that keep_all_vdefs_p is false.
+ 	(mark_all_reaching_defs_necessary): Likewise.
+ 	(propagate_necessity): Skip the vuse scan if keep_all_vdefs_p is true.
+ 
+ 2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* common.opt (Og): Change the initial value of flag_dse to 0.
+ 	* opts.c (default_options_table): Move OPT_ftree_dse from
+ 	OPT_LEVELS_1_PLUS to OPT_LEVELS_1_PLUS_NOT_DEBUG.  Also add
+ 	OPT_fdse to OPT_LEVELS_1_PLUS_NOT_DEBUG.  Put the OPT_ftree_pta
+ 	entry before the OPT_ftree_sra entry.
+ 	* doc/invoke.texi (Og): Add -fdse and -ftree-dse to the list
+ 	of flags disabled by Og.
+ 
+ 2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-cfg.c (execute_fixup_cfg): Don't delete stores to write-only
+ 	variables for -Og.
+ 
+ 2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* doc/sourcebuild.texi (check-function-bodies): Document.
+ 
+ 2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* simplify-rtx.c (simplify_const_unary_operation): Fold a
+ 	VEC_DUPLICATE of a fixed-length vector even if the result
+ 	is variable-length.  Likewise fold a duplicate of a
+ 	variable-length vector if the variable-length vector is
+ 	itself a duplicate of a fixed-length sequence.
+ 	(test_vector_ops_duplicate): Test more cases.
+ 
+ 2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* vector-builder.h (vector_builder): Add a shape template parameter.
+ 	(vector_builder::new_unary_operation): New function, generalizing
+ 	the old tree_vector_builder function.
+ 	(vector_builder::new_binary_operation): Likewise.
+ 	(vector_builder::binary_encoded_nelts): Likewise.
+ 	* int-vector-builder.h (int_vector_builder): Update template
+ 	parameters to vector_builder.
+ 	(int_vector_builder::shape_nelts): New function.
+ 	* rtx-vector-builder.h (rtx_vector_builder): Update template
+ 	parameters to vector_builder.
+ 	(rtx_vector_builder::shape_nelts): New function.
+ 	(rtx_vector_builder::nelts_of): Likewise.
+ 	(rtx_vector_builder::npatterns_of): Likewise.
+ 	(rtx_vector_builder::nelts_per_pattern_of): Likewise.
+ 	* tree-vector-builder.h (tree_vector_builder): Update template
+ 	parameters to vector_builder.
+ 	(tree_vector_builder::shape_nelts): New function.
+ 	(tree_vector_builder::nelts_of): Likewise.
+ 	(tree_vector_builder::npatterns_of): Likewise.
+ 	(tree_vector_builder::nelts_per_pattern_of): Likewise.
+ 	* tree-vector-builder.c (tree_vector_builder::new_unary_operation)
+ 	(tree_vector_builder::new_binary_operation): Delete.
+ 	(tree_vector_builder::binary_encoded_nelts): Likewise.
+ 	* simplify-rtx.c: Include rtx-vector-builder.h.
+ 	(distributes_over_addition_p): New function.
+ 	(simplify_const_unary_operation)
+ 	(simplify_const_binary_operation): Generalize handling of vector
+ 	constants to include variable-length vectors.
+ 	(test_vector_ops_series): Add more tests.
+ 
+ 2019-07-28  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR lto/91222
+ 	* ipa-devirt.c (warn_types_mismatch): Compare indentifiers
+ 	than INDENTIFIER_POINTER.
+ 
+ 2019-07-28  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/89330
+ 	* cgraph.c (symbol_table::create_edge): Always allocate
+ 	a cgraph_edge.
+ 	(symbol_table::free_edge): Store summary_id to
+ 	edge_released_summary_ids if != -1;
+ 	* cgraph.h (NEXT_FREE_NODE): Remove.
+ 	(SET_NEXT_FREE_NODE): Likewise.
+ 	(NEXT_FREE_EDGE): Likewise.
+ 	(symbol_table::release_symbol): Store summary_id to
+ 	cgraph_released_summary_ids if != -1;
+ 	(symbol_table::allocate_cgraph_symbol): Always allocate
+ 	a cgraph_node.
+ 
+ 2019-07-28  Alan Modra  <amodra@gmail.com>
+ 
+ 	* config/rs6000/rs6000-call.c (rs6000_output_mi_thunk): Use
+ 	gen_sibcall.
+ 
+ 2019-07-28  Alan Modra  <amodra@gmail.com>
+ 
+ 	PR target/91135
+ 	* config/rs6000/linux.h (GNU_USER_TARGET_D_OS_VERSIONS): Don't
+ 	define.
+ 	* config/rs6000/linux64.h (TARGET_OS_CPP_BUILTINS): Invoke
+ 	GNU_USER_TARGET_OS_CPP_BUILTINS for aixdesc abi.
+ 	(GNU_USER_TARGET_D_OS_VERSIONS): Don't define.
+ 
+ 2019-07-28  Alan Modra  <amodra@gmail.com>
+ 
+ 	PR target/91050
+ 	* config/rs6000/sysv4.h (ASM_DEFAULT_SPEC): Modify if -m64.
+ 	* config/rs6000/default64.h (ASM_DEFAULT_SPEC): Define.
+ 	* config/rs6000/freebsd64.h (ASM_DEFAULT_SPEC): Don't define.
+ 	* config/rs6000/linux64.h (ASM_DEFAULT_SPEC): Likewise.
+ 	* config/rs6000/rtems.h (ASM_DEFAULT_SPEC): Likewise.
+ 	* config/rs6000/rs6000.h (ASM_DEFAULT_EXTRA): Define and use
+ 	in asm_default spec.
+ 	* config/rs6000/eabialtivec.h (ASM_DEFAULT_EXTRA): Redefine.
+ 	* config/rs6000/linuxaltivec.h (ASM_DEFAULT_EXTRA): Redefine.
+ 
+ 2019-07-28  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* doc/include/gpl_v3.texi (Copying): Use https for www.gnu.org.
+ 
+ 2019-07-26  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	PR target/89517
+ 	* config.gcc: Relax parsing of AARCH64_OPT_EXTENSION.
+ 	* config/aarch64/aarch64-option-extensions.def: Add new comments
+ 	and restore easier to read options.
+ 
+ 2019-07-26  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	* convert.c (convert_to_real_1): Move part of conversion code...
+ 	* match.pd: ...To here.
+ 
+ 2019-07-26  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/89330
+ 	* ipa-inline-transform.c (check_speculations_1): New function.
+ 	(push_all_edges_in_set_to_vec): Likewise.
+ 	(check_speculations): Use check_speculations_1, new parameter
+ 	new_edges.
+ 	(inline_call): Pass new_edges to check_speculations.
+ 	* ipa-inline.c (add_new_edges_to_heap): Assert edge_callee is not
+ 	NULL.
+ 	(speculation_useful_p): Early return true if edge is inlined, remove
+ 	later checks for inline_failed.
+ 
+ 2019-07-25  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/91223
+ 	* lra-constraints.c (process_alt_operands): Fail for unsuccessful
+ 	matching with INOUT operand.
+ 
+ 2019-07-25  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* stmt.c (expand_case): Try to narrow the index type if it's larger
+ 	than a word.  Tidy up.
+ 
+ 2019-07-25  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* cif-code.def (NEVER_CALL): New code.
+ 	* ipa-inline.c (want_inline_small_function_p): Fix formatting issues.
+ 	Set the failure to CIF_NEVER_CALL if the IPA count is zero.
+ 
+ 2019-07-25  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	* config/arm/thumb2.md (thumb2_movsi_insn): Fix load/store low reg.
+ 	* config/arm/vfp.md (thumb2_movsi_vfp): Likewise.
+ 
+ 2019-07-23  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-devirt.c (add_type_duplicate): Fix return value.
+ 
+ 2019-07-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vrp.c (extract_range_from_multiplicative_op): Add
+ 	type parameter and use it instead of guessing expression
+ 	type from the first operand.
+ 	(extract_range_from_binary_expr): Pass expr_type down.
+ 
+ 2019-07-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/arm.md (SATrev): Change to code attribute.
+ 	(*satsi_<SAT:code>): Adjust for the above.
+ 	(*satsi_<SAT:code>_shift): Likewise.
+ 
+ 2019-07-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	* gimple-loop-versioning.cc (loop_versioning::prune_loop_conditions):
+ 	Make value_range * temporary const.
+ 	* gimple-ssa-evrp-analyze.c (evrp_range_analyzer::try_find_new_range):
+ 	Likewise.
+ 	(evrp_range_analyzer::record_ranges_from_): Likewise.
+ 	(evrp_range_analyzer::pop_value_range): Return a const value_range *,
+ 	deal with having recorded a const one.
+ 	* gimple-ssa-evrp-analyze.h (evrp_range_analyzer::get_value_range):
+ 	Return a const value_range *.
+ 	(evrp_range_analyzer::pop_value_range): Likewise.
+ 	(evrp_range_analyzer::stack): Record const value_range *s.
+ 	* gimple-ssa-evrp.c (evrp_dom_walker::before_dom_children):
+ 	Adjust.
+ 	* gimple-ssa-sprintf.c (get_int_range): Likewise.
+ 	(format_integer): Likewise.
+ 	(sprintf_dom_walker::handle_gimple_call): Likewise.
+ 	* tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
+ 	* tree-vrp.c (vrp_prop::set_def_to_varying): Add.
+ 	(vrp_prop::get_value_range): Adjust.
+ 	(vrp_prop::vrp_initialize): Use set_def_to_varying instead of
+ 	modifying the lattice in-place.
+ 	(vrp_prop::visit_stmt): Likewise.
+ 	* vr-values.c (vr_values::get_lattice_entry): New private method.
+ 	(vr_values::get_value_range): Wrap it and return a const
+ 	value_range *.
+ 	(vr_values::set_def_to_varying): New.
+ 	(vr_values::set_defs_to_varying): Use it.
+ 	(vr_values::update_value_range): Likewise.
+ 	(vr_values::vrp_stmt_computes_nonzero): Adjust.
+ 	(values::op_with_constant_singleton_va): Likewise.
+ 	(vr_values::extract_range_for_var_from_co): Likewise.
+ 	(vr_values::extract_range_from_ssa_name): Likewise.
+ 	(vr_values::extract_range_from_cond_expr): Likewise.
+ 	(vr_values::extract_range_basic): Likewise.
+ 	(compare_ranges): Take const value_range *, adjust.
+ 	(compare_range_with_value): Likewise.
+ 	(vrp_valueize): Adjust.
+ 	(vrp_valueize_1): Likewise.
+ 	(vr_values::get_vr_for_comparison): Return a const value_range *.
+ 	(vr_values::compare_name_with_value): Adjust.
+ 	(vr_values::compare_names): Likewise.
+ 	(vr_values::vrp_evaluate_conditional_warnv_with_ops_using_ranges):
+ 	Likewise.
+ 	(vr_values::vrp_evaluate_conditional): Likewise.
+ 	(find_case_label_ranges): Take a const value_range *.
+ 	(vr_values::vrp_visit_switch_stmt): Adjust.
+ 	(vr_values::extract_range_from_phi_node): Likewise.
+ 	(vr_values::simplify_div_or_mod_using_ran): Likewise.
+ 	(vr_values::simplify_abs_using_ranges): Likewise.
+ 	(test_for_singularity): Take a const value_range *.
+ 	(range_fits_type_p): Likewise.
+ 	(vr_values::simplify_cond_using_ranges_1): Adjust.
+ 	(vr_values::simplify_cond_using_ranges_2): Likewise.
+ 	(vr_values::simplify_switch_using_ranges): Likewise.
+ 	(vr_values::simplify_float_conversion_usi): Likewise.
+ 	(vr_values::two_valued_val_range_p): Likewise.
+ 	* vr-values.h (vr_values::get_value_range): Return a const
+ 	value_range *.
+ 	(vr_values::set_def_to_varying): New.
+ 	(vr_values::get_lattice_entry): New private method.
+ 	(vr_values::get_vr_for_comparison): Return a const value_range *.
+ 
+ 2019-07-25  Martin Liska  <mliska@suse.cz>
+ 	    Dominik Infuhr  <dominik.infuehr@theobroma-systems.com>
+ 
+ 	PR c++/23383
+ 	* common.opt: Add -fallocation-dce
+ 	* gimple.c (gimple_call_operator_delete_p): New.
+ 	* gimple.h (gimple_call_operator_delete_p): Likewise.
+ 	* tree-core.h (enum function_decl_type): Add OPERATOR_DELETE.
+ 	* tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Handle
+ 	DECL_IS_OPERATOR_DELETE_P.
+ 	(mark_all_reaching_defs_necessary_1): Likewise.
+ 	(propagate_necessity): Likewise.
+ 	(eliminate_unnecessary_stmts): Handle
+ 	gimple_call_operator_delete_p.
+ 	* tree-streamer-in.c (unpack_ts_function_decl_value_fields):
+ 	Add packing of OPERATOR_DELETE.
+ 	* tree-streamer-out.c (pack_ts_function_decl_value_fields):
+ 	Similarly here.
+ 	* tree.h (DECL_IS_OPERATOR_DELETE_P): New.
+ 	(DECL_SET_IS_OPERATOR_DELETE): New.
+ 	(DECL_IS_REPLACEABLE_OPERATOR_NEW_P): Likewise.
+ 
+ 2019-07-25  Martin Liska  <mliska@suse.cz>
+ 
+ 	* calls.c (maybe_warn_alloc_args_overflow): Use new macros
+ 	(e.g. DECL_SET_LAMBDA_FUNCTION and DECL_LAMBDA_FUNCTION_P).
+ 	* coverage.c (coverage_begin_function): Likewise.
+ 	* fold-const.c (tree_expr_nonzero_warnv_p): Likewise.
+ 	* gimple.c (gimple_call_nonnull_result_p): Likewise.
+ 	* ipa-icf.c (sem_item::compare_referenced_symbol_properties): Likewise.
+ 	(sem_item::hash_referenced_symbol_properties): Likewise.
+ 	* lto-streamer-out.c (hash_tree): Likewise.
+ 	* predict.c (expr_expected_value_1): Likewise.
+ 	* tree-inline.c (expand_call_inline): Likewise.
+ 	* tree-streamer-in.c (unpack_ts_function_decl_value_fields): Likewise.
+ 	* tree-streamer-out.c (pack_ts_function_decl_value_fields): Likewise.
+ 	* tree-core.h (enum function_decl_type): New enum.
+ 	(struct tree_function_decl): Remove operator_new_flag and lambda_function.
+ 	* tree.h (FUNCTION_DECL_DECL_TYPE): New.
+ 	(set_function_decl_type): Likewise.
+ 	(DECL_IS_OPERATOR_NEW_P): New.
+ 	(DECL_SET_IS_OPERATOR_NEW): Likewise.
+ 	(DECL_LAMBDA_FUNCTION): Likewise.
+ 	(DECL_LAMBDA_FUNCTION_P): Likewise.
+ 	(DECL_IS_OPERATOR_NEW): Remove.
+ 	(DECL_SET_LAMBDA_FUNCTION): Likewise.
+ 
+ 2019-07-25  Xiong Hu Luo  <luoxhu@linux.ibm.com>
+ 
+ 	* ipa-profile.c (get_most_common_single_value): Use
+ 	get_nth_most_common_value.
+ 	* profile.c (sort_hist_value): New function.
+ 	(compute_value_histograms): Call sort_hist_value to sort the
+ 	values after loading from disk.
+ 	* value-prof.c (get_most_common_single_value): Rename to ...
+ 	get_nth_most_common_value.  Add input params n, return
+ 	the n_th value and count.
+ 	(gimple_divmod_fixed_value_transform): Use
+ 	get_nth_most_common_value.
+ 	(gimple_ic_transform): Likewise.
+ 	(gimple_stringops_transform): Likewise.
+ 	* value-prof.h (get_most_common_single_value): Add input params
+ 	n, default to 0.
+ 
+ 2019-07-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91236
+ 	* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Fix
+ 	size of CONSTRUCTOR write.  Fix buffer size we pass to
+ 	native_encode_expr.
+ 
+ 2019-07-24  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config.gcc (msp430*-*-*): Fix non-GNU style in r273774.
+ 	* config/msp430/msp430.h (ENDFILE_SPEC): Fix non-GNU style in
+ 	r273773.
+ 
+ 2019-07-24  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config.gcc (msp430*-*-*): Enable initfini_array by default unless
+ 	explicitly disabled with --disable-initfini-array.
+ 
+ 2019-07-24  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.h (ENDFILE_SPEC): Wrap uses of crtn*.o in
+ 	if-exists.
+ 
+ 2019-07-24  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/91183
+ 	PR tree-optimization/86688
+ 	* builtins.c (compute_objsize): Handle MEM_REF.
+ 	* tree-ssa-strlen.c (class ssa_name_limit_t): New.
+ 	(get_min_string_length): Remove.
+ 	(count_nonzero_bytes): New function.
+ 	(handle_char_store): Rename...
+ 	(handle_store): to this.  Handle multibyte stores via integer types.
+ 	(strlen_check_and_optimize_stmt): Adjust conditional and the called
+ 	function name.
+ 
+ 2019-07-24  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR driver/80545
+ 	* diagnostic.c (diagnostic_classify_diagnostic): Use lang_mask.
+ 	(diagnostic_report_diagnostic): Same.
+ 	* diagnostic.h (diagnostic_context::option_enabled): Add an argument.
+ 	(diagnostic_context::lang_mask): New data member.
+ 	* ipa-pure-const.c (suggest_attribute): Use
+ 	lang_hooks.option_lang_mask ().
+ 	* opts-common.c (option_enabled): Handle new argument.
+ 	(get_option_state): Pass an additional argument.
+ 	* opts.c (print_filtered_help): Print supported languages for
+ 	unsupported options.  Adjust printing of current state.
+ 	* opts.h (option_enabled): Add argument.
+ 	* toplev.c (print_switch_values): Use lang_mask.
+ 	(general_init): Set global_dc->lang_mask.
+ 
+ 2019-07-24  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR bootstrap/87030
+ 	* config/i386/darwin.h (REAL_LIBGCC_SPEC): Revert change from r273749.
+ 
+ 2019-07-24  Giuliano Belinassi  <giuliano.belinassi@usp.br>
+ 
+ 	* cgraphunit.c (symbol_table::compile): Start and stop
+ 	TV_CGRAPH_IPA_PASSES and TV_CGRAPH_FUNC_EXPANSION timers.
+ 	* timevar.def (TV_CGRAPH_IPA_PASSES, TV_CGRAPH_FUNC_EXPANSION): New.
+ 
+ 2019-07-24  Oliver Browne  <oliverbrowne62@gmail.com>
+ 
+ 	* gimplify.c (flag_instrument_functions_exclude_p): Include
+ 	namespace/class information in the printable name.
+ 	* opts.c (add_comma_separated_to_vector): Add NUL terminator
+ 	to tokens entered into the vector.
+ 
+ 2019-07-24  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* tree-nested.c (build_simple_mem_ref_notrap): New function.
+ 	(get_static_chain): Call it instead of build_simple_mem_ref.
+ 	(get_frame_field): Likewise.
+ 	(get_nonlocal_debug_decl): Likewise.
+ 	(convert_nonlocal_reference_op): Likewise.
+ 
+ 2019-07-24  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc-protos.h (arc_output_function_epilogue): Delete
+ 	declaration.
+ 	(arc_compute_frame_size): Millicode is disabled when compiling
+ 	ISR.
+ 	(arc_return_address_register): Likewise.
+ 	(arc_compute_function_type): Likewise.
+ 	(arc_compute_frame_size): Likewise.
+ 	(secondary_reload_info): Likewise.
+ 	(arc_get_unalign): Likewise.
+ 	(arc_can_use_return_insn): Declare.
+ 	* config/arc/arc.c (AUX_LP_START): Define
+ 	(AUX_LP_END): Likewise.
+ 	(arc_frame_info): Update gmask member to 64-bit datum.
+ 	(GMASK_LEN): Update.
+ 	(arc_compute_function_type): Make it static, move it forward.
+ 	(arc_must_save_register): Update, consider the extra regs.
+ 	(arc_compute_millicode_save_restore_regs): Update to use the 64
+ 	bit gmask.
+ 	(arc_compute_frame_size): Likewise.
+ 	(arc_enter_leave_p): Likewise.
+ 	(arc_save_callee_saves): Likewise.
+ 	(arc_restore_callee_saves): Likewise.
+ 	(arc_save_callee_enter): Likewise.
+ 	(arc_restore_callee_leave): Likewise.
+ 	(arc_save_callee_milli): Likewise.
+ 	(arc_restore_callee_milli): Likewise.
+ 	(arc_expand_prologue): Add new interrupt handling.
+ 	(arc_return_address_register): Make it static, move it forward.
+ 	(arc_expand_epilogue): Add new interrupt handling.
+ 	(arc_get_unalign): Delete.
+ 	(arc_epilogue_uses): Make sure we do not remove the extra
+ 	saved/restored registers when interrupt.
+ 	(arc_can_use_return_insn): New function.
+ 	(push_reg): Likewise.
+ 	(pop_reg): Likewise.
+ 	(arc_save_callee_saves): Add ZOL and FPX aux registers saving
+ 	procedures.
+ 	(arc_restore_callee_saves): Likewise, but restoring.
+ 	* config/arc/arc.md (VUNSPEC_ARC_ARC600_RTIE): Define.
+ 	(R33_REG): Likewise.
+ 	(R34_REG): Likewise.
+ 	(R35_REG): Likewise.
+ 	(R36_REG): Likewise.
+ 	(R37_REG): Likewise.
+ 	(R38_REG): Likewise.
+ 	(R39_REG): Likewise.
+ 	(R45_REG): Likewise.
+ 	(R46_REG): Likewise.
+ 	(R47_REG): Likewise.
+ 	(R48_REG): Likewise.
+ 	(R49_REG): Likewise.
+ 	(R50_REG): Likewise.
+ 	(R51_REG): Likewise.
+ 	(R52_REG): Likewise.
+ 	(R53_REG): Likewise.
+ 	(R54_REG): Likewise.
+ 	(R55_REG): Likewise.
+ 	(R56_REG): Likewise.
+ 	(R58_REG): Likewise.
+ 	(type): Add rtie attribute.
+ 	(in_call_delay_slot): Use RETURN_ADDR_REGNUM.
+ 	(movsi_insn): Accept moves to lp_count.
+ 	(rtie): Update pattern.
+ 	(simple_return): Simplify it, don't use this pattern as a return
+ 	from an interrupt.
+ 	(arc600_rtie): New pattern.
+ 	(p_return_i): Clean up.
+ 	(return): Likewise.
+ 	* config/arc/builtins.def (rtie): Only available for non ARC6xx
+ 	family CPUs.
+ 	* config/arc/predicates.md (move_src_operand): Consider lp_count
+ 	as a register.
+ 
+ 2019-07-24  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/predicates.md (addv_const_operand): New predicate.
+ 	* config/s390/s390-modes.def (CCO): New condition code mode.
+ 	* config/s390/s390.c (s390_match_ccmode_set): Handle E_CCOmode.
+ 	(s390_branch_condition_mask): Likewise.
+ 	* config/s390/s390.md ("addv<mode>4", "subv<mode>4")
+ 	("mulv<mode>4"): New expanders.
+ 	("*addv<mode>3_ccoverflow", "*addv<mode>3_ccoverflow_const")
+ 	("*subv<mode>3_ccoverflow", "*mulv<mode>3_ccoverflow"): New
+ 	pattern definitions.
+ 
+ 2019-07-24  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	PR middle-end/91166
+ 	* match.pd (vec_perm_expr(v, v, mask) -> v): New pattern.
+ 	(define_predicates): Add entry for uniform_vector_p.
+ 	(vec_same_elem_p): New match pattern.
+ 
+ 2019-07-24  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR bootstrap/87030
+ 	* config/i386/darwin.h (REAL_LIBGCC_SPEC): Move from here...
+ 	* config/i386/darwin32-biarch.h .. to here.
+ 	* config/i386/darwin64-biarch.h: Adjust comments.
+ 	* config/rs6000/darwin32-biarch.h: Likewise.
+ 	* config/rs6000/darwin64-biarch.h: Likewise.
+ 	* config.gcc: Missed commit from r273746
+ 	(*-*-darwin*): Don't include CPU t-darwin here.
+ 	(i[34567]86-*-darwin*): Adjust to use biarch files. Produce
+ 	an error message if i686-darwin configuration is attempted for
+ 	Darwin >= 18.
+ 
+ 2019-07-23  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR bootstrap/87030
+ 	* config.gcc (*-*-darwin*): Don't include CPU t-darwin here.
+ 	(i[34567]86-*-darwin*): Adjust to use biarch files. Produce
+ 	an error message if i686-darwin configuration is attempted for
+ 	Darwin >= 18.
+ 	(x86_64-*-darwin*): Switch to single multilib for Darwin >= 18.
+ 	(powerpc-*-darwin*): Use biarch files where needed.
+ 	(powerpc64-*-darwin*): Likewise.
+ 	* config/i386/darwin.h (REAL_LIBGCC_SPEC): Move to new biarch file.
+ 	(DARWIN_ARCH_SPEC, DARWIN_SUBARCH_SPEC): Revise for default single
+ 	arch case.
+ 	* config/i386/darwin32-biarch.h: New.
+ 	* config/i386/darwin64.h: Rename.
+ 	* config/i386/darwin64-biarch.h: To this.
+ 	* config/i386/t-darwin: Rename.
+ 	* config/i386/t-darwin32-biarch: To this.
+ 	* config/i386/t-darwin64: Rename.
+ 	* config/i386/t-darwin64-biarch: To this.
+ 	* config/rs6000/darwin32-biarch.h: New.
+ 	* config/rs6000/darwin64.h: Rename.
+ 	* config/rs6000/darwin64-biarch.h: To this.
+ 	(DARWIN_ARCH_SPEC, DARWIN_SUBARCH_SPEC): Revise for default single
+ 	arch case.
+ 	* config/rs6000/t-darwin8: Rename.
+ 	* config/rs6000/t-darwin32-biarch: To this.
+ 	* config/rs6000/t-darwin64 Rename.
+ 	* config/rs6000/t-darwin64-biarch: To this.
+ 
+ 2019-07-23  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* configure.ac (ACX_PROG_CXX_WARNING_OPTS): Revert r273311.
+ 
+ 2019-07-23  Vladislav Ivanishin  <vlad@ispras.ru>
+ 
+ 	* gdbinit.in (reload-gdbhooks): New command with an attached doc string.
+ 	(rh): New alias for it.
+ 
+ 2019-07-23  Vladislav Ivanishin  <vlad@ispras.ru>
+ 
+ 	* gdbhooks.py: Pass replace=True to
+ 	gdb.printing.register_pretty_printer.
+ 
+ 2019-07-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/91231
+ 	* lto-streamer-in.c (input_function): Drop inline-entry markers
+ 	that ended up with an unknown location block.
+ 
+ 2019-07-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/83518
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Handle aggregate
+ 	init from a constant even when partial defs are already recorded.
+ 
+ 2019-07-23  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* i386-common.c: Use PROCESSOR_ZNVER2 scheduler for znver2.
+ 	* config/i386/znver1.md: Enable patterns for znver2 and add store
+ 	variants which use extra AGU unit.
+ 
+ 2019-07-23  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* config/i386/i386-options.c (ix86_option_override_internal): Default
+ 	PARAM_AVOID_FMA_MAX_BITS to 256 for znver2.
+ 	* config/i386/x86-tune.def (X86_TUNE_AVOID_256FMA_CHAINS): Set
+ 	for ZNVER2.
+ 
+ 2019-07-23  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* config/i386/x86-tune-costs.h (znver2_memcpy): Update.
+ 	(znver2_costs): Update 256 bit SSE costs and multiplication.
+ 
+ 2019-07-23  Jan Beulich  <jbeulich@suse.com>
+ 
+ 	* config/i386/sse.md (<avx512>_cvtmask2<ssemodesuffix><mode>):
+ 	Require only AVX512F.
+ 	(*<avx512>_cvtmask2<ssemodesuffix><mode>): Likewise.  Add
+ 	alternative expanding to vpternlog.
+ 
+ 2019-07-23  Martin Liska  <mliska@suse.cz>
+ 
+ 	* dwarf2out.c (gen_producer_string): Canonize -flto=N
+ 	to -flto in dwarf producer string.
+ 
+ 2019-07-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-cfg.c (label_for_bb): Remove global var.
+ 	(main_block_label): Take label_for_bb as argument.
+ 	(cleanup_dead_labels_eh): Likewise, adjust.
+ 	(cleanup_dead_labels): Adjust.
+ 
+ 2019-07-22  Paul A. Clarke  <pc@us.ibm.com>
+ 
+ 	* doc/extend.texi (Basic PowerPC Built-in Functions Available on all
+ 	Configurations): Add documentation for __builtin_mtfsf.
+ 
+ 2019-07-22  Ilia Diachkov  <ilia.diachkov@optimitech.com>
+ 
+ 	* config/riscv/riscv-opts.h (struct riscv_align_data): New.
+ 	* config/riscv/riscv.c (riscv_constant_alignment): Use
+ 	riscv_align_data_type.
+ 	* config/riscv/riscv.h (RISCV_EXPAND_ALIGNMENT): New.
+ 	(DATA_ALIGNMENT): Use RISCV_EXPAND_ALIGNMENT.
+ 	(LOCAL_ALIGNMENT): Use RISCV_EXPAND_ALIGNMENT.
+ 	* config/riscv/riscv.opt (malign-data): New.
+ 	* doc/invoke.texi (RISC-V Options): Document -malign-data=.
+ 
+ 2019-07-02  Giuliano Belinassi  <giuliano.belinassi@usp.br>
+ 
+ 	* cgraph.c (dump_graphviz): New function.
+ 	* cgraph.h (dump_graphviz): New function.
+ 	* symtab.c (dump_graphviz): New function.
+ 
+ 2019-07-22  Sylvia Taylor  <sylvia.taylor@arm.com>
+ 
+ 	* config/aarch64/aarch64-simd.md
+ 	(*aarch64_simd_sra<mode>): New.
+ 	* config/aarch64/iterators.md
+ 	(SHIFTRT): New iterator.
+ 	(sra_op): New attribute.
+ 
+ 2019-07-22  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.c (msp430_preserve_reg_p): Don't save
+ 	callee-saved regs R4->R10 in an interrupt function that calls another
+ 	function.
+ 
+ 2019-07-22  Paul A. Clarke  <pc@us.ibm.com>
+ 
+ 	* config/rs6000/smmintrin.h (_mm_blend_epi16): New.
+ 	(_mm_blendv_epi8): New.
+ 
+ 2019-07-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91221
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Appropriately
+ 	restrict partial-def handling of empty constructors and
+ 	memset to refs with known offset.
+ 
+ 2019-07-22  Jan Beulich  <jbeulich@suse.com>
+ 
+ 	* config/i386/sse.md (ternlogsuffix): New.
+ 	(one_cmpl<mode>2): Don't force CONSTM1_RTX into a register when
+ 	AVX512F is in use.
+ 	(<mask_codefor>one_cmpl<mode>2<mask_name>): New.
+ 
+ 2019-07-22  Martin Liska  <mliska@suse.cz>
+ 
+ 	* config/avr/avr.c (avr_asm_output_aligned_decl_common): Update
+ 	comment.
+ 	* toplev.c (compile_file): Do not emit __gnu_lto_v1 symbol.
+ 
+ 2019-07-22  Martin Liska  <mliska@suse.cz>
+ 
+ 	* lto-section-in.c (lto_get_section_data):
+ 	Use new function get_compression.
+ 	* lto-streamer-out.c (produce_lto_section): Use
+ 	set_compression to encode compression algorithm.
+ 	* lto-streamer.h (struct lto_section): Do not
+ 	use bitfields in the format.
+ 
+ 2019-07-22  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR driver/91172
+ 	* opts-common.c (decode_cmdline_option): Decode
+ 	argument of -Werror and check it for a wrong language.
+ 	* opts-global.c (complain_wrong_lang): Remove such case.
+ 
+ 2019-07-22  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.c (prepare_move_operands): Always use an
+ 	intermediate register when storing a TLS symbols.
+ 
+ 2019-07-22  Stafford Horne  <shorne@gmail.com>
+ 
+ 	* config/or1k/or1k.c (or1k_expand_compare): Check for int before
+ 	force_reg.
+ 
+ 2019-07-22  Stafford Horne  <shorne@gmail.com>
+ 
+ 	* config.gcc (or1k*-*-*): Add mhard-float, mdouble-float, msoft-float
+ 	and munordered-float validations.
+ 	* config/or1k/constraints.md (d): New register constraint.
+ 	* config/or1k/predicates.md (fp_comparison_operator): New.
+ 	* config/or1k/or1k.c (or1k_print_operand): Add support for printing 'd'
+ 	operands.
+ 	(or1k_expand_compare): Normalize unordered comparisons.
+ 	* config/or1k/or1k.h (reg_class): Define DOUBLE_REGS.
+ 	(REG_CLASS_NAMES): Add "DOUBLE_REGS".
+ 	(REG_CLASS_CONTENTS): Add contents for DOUBLE_REGS.
+ 	* config/or1k/or1k.md (type): Add fpu.
+ 	(fpu): New instruction reservation.
+ 	(F, f, fr, fi, FI, FOP, fop): New.
+ 	(<fop><F:mode>3): New ALU instruction definition.
+ 	(float<fi><F:mode>2): New conversion instruction definition.
+ 	(fix_trunc<F:mode><fi>2): New conversion instruction definition.
+ 	(fpcmpcc): New code iterator.
+ 	(*sf_fp_insn): New instruction definition.
+ 	(cstore<F:mode>4): New expand definition.
+ 	(cbranch<F:mode>4): New expand definition.
+ 	* config/or1k/or1k.opt (msoft-float, mhard-float, mdouble-float,
+ 	munordered-float): New options.
+ 	* doc/invoke.texi: Document msoft-float, mhard-float, mdouble-float and
+ 	munordered-float.
+ 
+ 2019-07-22  Stafford Horne  <shorne@gmail.com>
+ 
+ 	* config.gcc (or1k*-*-*): Add mrori and mror to validation.
+ 	* doc/invoke.texi (OpenRISC Options): Add mrori option, rewrite all
+ 	documenation to be more clear.
+ 	* config/or1k/elf.opt (mboard=, mnewlib): Rewrite documentation to be
+ 	more clear.
+ 	* config/or1k/or1k.opt (mrori): New option.
+ 	(mhard-div, msoft-div, mhard-mul, msoft-mul, mcmov, mror, msext,
+ 	msfimm, mshftimm): Rewrite documentation to be more clear.
+ 	* config/or1k/or1k.md (insn_support): Add ror and rori.
+ 	(enabled): Add conditions for ror and rori.
+ 	(rotrsi3): Replace condition for shftimm with ror and rori.
+ 
+ 2019-07-22  Stafford Horne  <shorne@gmail.com>
+ 
+ 	PR target/90363
+ 	* config/or1k/or1k.md (zero_extend<mode>si2): Update predicate.
+ 	(extend<mode>si2): Update predicate.
+ 	* config/or1k/predicates.md (volatile_mem_operand): New.
+ 	(reg_or_mem_operand): New.
+ 
+ 2019-07-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/rs6000.c (TARGET_NO_PROTOTYPE): Move from here...
+ 	* config/rs6000/rs6000-call.c: ... to here.
+ 
+ 2019-07-20  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/predicates.md (offsettable_mem_operand): Allow volatile
+ 	memory.
+ 
+ 2019-07-20  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/predicates.md (input_operand): Allow volatile memory.
+ 
+ 2019-07-20  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/predicates.md (lwa_operand): Allow volatile memory.
+ 
+ 2019-07-20  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/predicates.md (volatile_mem_operand): Modernize syntax.
+ 	(any_memory_operand): New predicate.
+ 	(reg_or_mem_operand): Use it.
+ 
+ 2019-07-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/91204
+ 	* optabs.c (expand_unop): As fallback, expand ~op0 as op0 ^ -1.
+ 
+ 2019-07-20  John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	* config/pa/pa.h (hppa_profile_hook): Delete declaration.
+ 	* config/pa/pa-protos.h (hppa_profile_hook): Add declaration.
+ 
+ 2019-07-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree.def (OMP_LOOP): New tree code.
+ 	* tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_BIND.
+ 	(enum omp_clause_bind_kind): New enum.
+ 	(struct tree_omp_clause): Add subcode.bind_kind.
+ 	* tree.h (OMP_LOOP_CHECK): Rename to ...
+ 	(OMP_LOOPING_CHECK): ... this.
+ 	(OMP_FOR_BODY, OMP_FOR_CLAUSES, OMP_FOR_INIT, OMP_FOR_COND,
+ 	OMP_FOR_INCR, OMP_FOR_PRE_BODY, OMP_FOR_ORIG_DECLS): Use
+ 	OMP_LOOPING_CHECK instead of OMP_LOOP_CHECK.
+ 	(OMP_CLAUSE_BIND_KIND): Define.
+ 	* tree.c (omp_clause_num_ops, omp_clause_code_name): Add
+ 	bind clause entries.
+ 	(walk_tree_1): Handle OMP_CLAUSE_BIND.
+ 	* tree-pretty-print.c (dump_omp_clause): Likewise.
+ 	(dump_generic_node): Handle OMP_LOOP.
+ 	* gimplify.c (enum omp_region_type): Add ORT_IMPLICIT_TARGET.
+ 	(in_omp_construct): New variable.
+ 	(is_gimple_stmt): Handle OMP_LOOP.
+ 	(gimplify_scan_omp_clauses): For lastprivate don't set
+ 	check_non_private if code == OMP_LOOP.  For reduction clause
+ 	on OMP_LOOP combined with parallel or teams propagate as shared
+ 	on the combined construct.  Handle OMP_CLAUSE_BIND.
+ 	(gimplify_adjust_omp_clauses): Handle OMP_CLAUSE_BIND.
+ 	(gimplify_omp_for): Pass OMP_LOOP instead of OMP_{FOR,DISTRIBUTE}
+ 	for constructs from a loop construct to gimplify_scan_omp_clauses.
+ 	Don't predetermine iterator linear on OMP_SIMD from loop construct.
+ 	(replace_reduction_placeholders, gimplify_omp_loop): New functions.
+ 	(gimplify_omp_workshare): Use ORT_IMPLICIT_TARGET instead of trying
+ 	to match the implicit ORT_TARGET construct around whole body.
+ 	Temporarily clear in_omp_construct when processing body.
+ 	(gimplify_expr): Handle OMP_LOOP.  For OMP_MASTER, OMP_TASKGROUP
+ 	etc. temporarily set in_omp_construct when processing body.
+ 	(gimplify_body): Create ORT_IMPLICIT_TARGET instead of ORT_TARGET.
+ 	* omp-low.c (struct omp_context): Add loop_p.
+ 	(build_outer_var_ref): Treat ctx->loop_p similarly to simd construct
+ 	in that the original var might be private.
+ 	(scan_sharing_clauses): Handle OMP_CLAUSE_BIND.
+ 	(check_omp_nesting_restrictions): Adjust nesting restrictions for
+ 	addition of loop construct.
+ 	(scan_omp_1_stmt): Allow setjmp inside of loop construct.
+ 
+ 	* omp-low.c (lower_rec_input_clauses): Don't force simd arrays for
+ 	lastprivate non-addressable iterator of a collapse(1) simd.
+ 
+ 2019-07-17  Bill Seurer  <seurer@linux.vnet.ibm.com>
+ 
+ 	* config/rs6000/rs6000-call.c (HAVE_AS_GNU_ATTRIBUTE): define value
+ 	as in rs6000.c.
+ 
+ 2019-07-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.h (DRIVER_SELF_SPECS): Ignore X and Mach specs which
+ 	refer to default conditions.  Warn for the 'y' spec which is ignored
+ 	by current linkers.
+ 
+ 2019-07-19  Bill Seurer  <seurer@linux.vnet.ibm.com>
+ 
+ 	* config/rs6000/rs6000.c (builtin_description, cpu_is_info,
+ 	cpu_supports_info, builtin_hash_struct, builtin_hasher,
+ 	builtin_hash_table, rs6000_builtin_info_type, rs6000_builtin_info,
+ 	rs6000_aggregate_candidate, rs6000_discover_homogeneous_aggregate,
+ 	rs6000_return_in_memory, rs6000_return_in_msb, call_ABI_of_interest,
+ 	init_cumulative_args, rs6000_promote_function_mode,
+ 	rs6000_must_pass_in_stack, is_complex_IBM_long_double,
+ 	abi_v4_pass_in_fpr, rs6000_function_arg_padding,
+ 	rs6000_function_arg_boundary, rs6000_parm_offset,
+ 	rs6000_parm_start, rs6000_arg_size,
+ 	rs6000_darwin64_record_arg_advance_flush,
+ 	rs6000_darwin64_record_arg_advance_recurse,
+ 	rs6000_darwin64_struct_check_p, rs6000_function_arg_advance_1,
+ 	rs6000_function_arg_advance, rs6000_darwin64_record_arg_flush,
+ 	rs6000_darwin64_record_arg_recurse, rs6000_darwin64_record_arg,
+ 	rs6000_mixed_function_arg, rs6000_psave_function_arg,
+ 	rs6000_finish_function_arg, rs6000_function_arg,
+ 	rs6000_arg_partial_bytes, rs6000_pass_by_reference,
+ 	rs6000_parm_needs_stack, rs6000_function_parms_need_stack,
+ 	rs6000_reg_parm_stack_space, rs6000_move_block_from_reg,
+ 	setup_incoming_varargs, rs6000_build_builtin_va_list, rs6000_va_start,
+ 	rs6000_gimplify_va_arg, def_builtin, bdesc_3arg, bdesc_dst,
+ 	bdesc_2arg, bdesc_altivec_preds, bdesc_abs, bdesc_1arg, bdesc_0arg,
+ 	bdesc_htm, rs6000_overloaded_builtin_p, rs6000_overloaded_builtin_name,
+ 	rs6000_expand_zeroop_builtin, rs6000_expand_mtfsf_builtin,
+ 	rs6000_expand_mtfsb_builtin, rs6000_expand_set_fpscr_rn_builtin,
+ 	rs6000_expand_set_fpscr_drn_builtin, rs6000_expand_unop_builtin,
+ 	altivec_expand_abs_builtin, rs6000_expand_binop_builtin,
+ 	altivec_expand_predicate_builtin, swap_endian_selector_for_mode,
+ 	altivec_expand_lv_builtin, altivec_expand_stxvl_builtin,
+ 	altivec_expand_stv_builtin, htm_spr_num, rs6000_htm_spr_icode,
+ 	htm_expand_builtin, cpu_expand_builtin, rs6000_expand_ternop_builtin,
+ 	altivec_expand_dst_builtin, altivec_expand_vec_init_builtin,
+ 	get_element_number, altivec_expand_vec_set_builtin,
+ 	altivec_expand_vec_ext_builtin, altivec_expand_builtin,
+ 	rs6000_builtin_is_supported_p, rs6000_invalid_builtin,
+ 	rs6000_fold_builtin, rs6000_builtin_valid_without_lhs,
+ 	fold_build_vec_cmp, fold_compare_helper, fold_mergehl_helper,
+ 	fold_mergeeo_helper, rs6000_gimple_fold_builtin,
+ 	rs6000_expand_builtin, rs6000_vector_type,
+ 	rs6000_init_builtins, rs6000_builtin_decl, altivec_init_builtins,
+ 	htm_init_builtins, builtin_function_type, rs6000_common_init_builtins,
+ 	rs6000_internal_arg_pointer, rs6000_output_mi_thunk): Move
+ 	to rs6000-call.c.
+ 	* config/rs6000/rs6000-call.c (builtin_description, cpu_is_info,
+ 	cpu_supports_info, builtin_hash_struct, builtin_hasher,
+ 	builtin_hash_table, rs6000_builtin_info_type, rs6000_builtin_info,
+ 	rs6000_aggregate_candidate, rs6000_discover_homogeneous_aggregate,
+ 	rs6000_return_in_memory, rs6000_return_in_msb, call_ABI_of_interest,
+ 	init_cumulative_args, rs6000_promote_function_mode,
+ 	rs6000_must_pass_in_stack, is_complex_IBM_long_double,
+ 	abi_v4_pass_in_fpr, rs6000_function_arg_padding,
+ 	rs6000_function_arg_boundary, rs6000_parm_offset,
+ 	rs6000_parm_start, rs6000_arg_size,
+ 	rs6000_darwin64_record_arg_advance_flush,
+ 	rs6000_darwin64_record_arg_advance_recurse,
+ 	rs6000_darwin64_struct_check_p, rs6000_function_arg_advance_1,
+ 	rs6000_function_arg_advance, rs6000_darwin64_record_arg_flush,
+ 	rs6000_darwin64_record_arg_recurse, rs6000_darwin64_record_arg,
+ 	rs6000_mixed_function_arg, rs6000_psave_function_arg,
+ 	rs6000_finish_function_arg, rs6000_function_arg,
+ 	rs6000_arg_partial_bytes, rs6000_pass_by_reference,
+ 	rs6000_parm_needs_stack, rs6000_function_parms_need_stack,
+ 	rs6000_reg_parm_stack_space, rs6000_move_block_from_reg,
+ 	setup_incoming_varargs, rs6000_build_builtin_va_list, rs6000_va_start,
+ 	rs6000_gimplify_va_arg, def_builtin, bdesc_3arg, bdesc_dst,
+ 	bdesc_2arg, bdesc_altivec_preds, bdesc_abs, bdesc_1arg, bdesc_0arg,
+ 	bdesc_htm, rs6000_overloaded_builtin_p, rs6000_overloaded_builtin_name,
+ 	rs6000_expand_zeroop_builtin, rs6000_expand_mtfsf_builtin,
+ 	rs6000_expand_mtfsb_builtin, rs6000_expand_set_fpscr_rn_builtin,
+ 	rs6000_expand_set_fpscr_drn_builtin, rs6000_expand_unop_builtin,
+ 	altivec_expand_abs_builtin, rs6000_expand_binop_builtin,
+ 	altivec_expand_predicate_builtin, swap_endian_selector_for_mode,
+ 	altivec_expand_lv_builtin, altivec_expand_stxvl_builtin,
+ 	altivec_expand_stv_builtin, htm_spr_num, rs6000_htm_spr_icode,
+ 	htm_expand_builtin, cpu_expand_builtin, rs6000_expand_ternop_builtin,
+ 	altivec_expand_dst_builtin, altivec_expand_vec_init_builtin,
+ 	get_element_number, altivec_expand_vec_set_builtin,
+ 	altivec_expand_vec_ext_builtin, altivec_expand_builtin,
+ 	rs6000_builtin_is_supported_p, rs6000_invalid_builtin,
+ 	rs6000_fold_builtin, rs6000_builtin_valid_without_lhs,
+ 	fold_build_vec_cmp, fold_compare_helper, fold_mergehl_helper,
+ 	fold_mergeeo_helper, rs6000_gimple_fold_builtin,
+ 	rs6000_expand_builtin, rs6000_vector_type,
+ 	rs6000_init_builtins, rs6000_builtin_decl, altivec_init_builtins,
+ 	htm_init_builtins, builtin_function_type, rs6000_common_init_builtins,
+ 	rs6000_internal_arg_pointer, rs6000_output_mi_thunk: Move
+ 	to here from rs6000.c.
+ 	* config/rs6000/rs6000-internal.h: (rs6000_darwin64_struct_check_p,
+ 	rs6000_discover_homogeneous_aggregate, rs6000_output_mi_thunk,
+ 	rs6000_output_addr_const_extra, rs6000_gimple_fold_builtin,
+ 	rs6000_invalid_builtin, rs6000_build_builtin_va_list, rs6000_va_start,
+ 	rs6000_gimplify_va_arg, rs6000_promote_function_mode,
+ 	rs6000_return_in_memory, rs6000_return_in_msb,
+ 	rs6000_pass_by_reference, setup_incoming_varargs,
+ 	rs6000_function_arg_boundary, rs6000_must_pass_in_stack,
+ 	rs6000_arg_partial_bytes, rs6000_function_arg_advance,
+ 	rs6000_function_arg_padding, rs6000_function_arg,
+ 	rs6000_darwin64_record_arg, rs6000_internal_arg_pointer,
+ 	rs6000_init_builtins, rs6000_builtin_decl, rs6000_expand_builtin,
+ 	rs6000_fold_builtin, rs6000_passes_ieee128, rs6000_passes_float,
+ 	rs6000_passes_long_double, rs6000_passes_vector,
+ 	rs6000_returns_struct, cpu_builtin_p, tree builtin_mode_to_type,
+ 	altivec_builtin_mask_for_load) Add declarations.
+ 	* config/rs6000/t-rs6000: Add new source file rs6000-call.c.
+ 	* config/config.gcc: Add new source file rs6000-call.c to garbage
+ 	collector and extra_objs.
+ 
+ 2019-07-19  Jeff Law  <law@redhat.com>
+ 
+ 	PR tree-optimization/86061
+ 	* tree-ssa-dse.c (initialize_ao_ref_for_dse): Handle
+ 	strncpy.  Drop some trivial dead code.
+ 	(maybe_trim_memstar_call): Handle strncpy.
+ 
+ 2019-07-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91211
+ 	* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Fix
+ 	memset encoding size.
+ 
+ 2019-07-19  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/91204
+ 	* config/i386/mmx.md (one_cmpl<mode>2): New expander.
+ 
+ 2019-07-19  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR ipa/91194
+ 	* ipa-inline.c (recursive_inlining): Fix limits check.
+ 
+ 2019-07-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91200
+ 	* tree-ssa-phiopt.c (cond_store_replacement): Check we have
+ 	no PHI nodes in middle-bb.
+ 
+ 2019-07-19  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* doc/invoke.texi: Rename the AArch64 +bitperm extension flag
+ 	to +sve-bitperm.
+ 	* config/aarch64/aarch64-option-extensions.def: Likewise.
+ 
+ 2019-07-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/91190
+ 	* function.c (insert_temp_slot_address): Store into the hash table
+ 	a copy of address to avoid RTL sharing issues.
+ 
+ 2019-07-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91207
+ 	Revert
+ 	2019-07-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91178
+ 	* tree-vect-stmts.c (get_group_load_store_type): For SLP
+ 	loads with a gap larger than the vector size always use
+ 	VMAT_STRIDED_SLP.
+ 	(vectorizable_load): For VMAT_STRIDED_SLP with a permutation
+ 	avoid loading vectors that are only contained in the gap
+ 	and thus are not needed.
+ 
+ 2019-07-18  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (*addqi_2_slp): Remove.
+ 	(*<code>qi_2_slp): Ditto.
+ 
+ 2019-07-18  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/predicates.md (prefixed_mem_operand): Call
+ 	rs6000_prefixed_address_mode_p instead of rs6000_prefixed_address.
+ 	* config/rs6000/rs6000-protos.h (rs6000_prefixed_address_mode_p):
+ 	Rename function from rs6000_prefixed_address.
+ 	* config/rs6000/aix.h (TARGET_HAS_TOC): Rename TARGET_TOC to
+ 	TARGET_HAS_TOC.
+ 	(TARGET_TOC): Likewise.
+ 	(TARGET_NO_TOC): Delete here, define TARGET_NO_TOC_OR_PCREL in
+ 	rs6000.h.
+ 	* config/rs6000/darwin.h (TARGET_HAS_TOC): Rename TARGET_TOC to
+ 	TARGET_HAS_TOC.
+ 	(TARGET_TOC): Likewise.
+ 	(TARGET_NO_TOC): Delete here, define TARGET_NO_TOC_OR_PCREL in
+ 	rs6000.h.
+ 	* config/rs6000/linux64.h (TARGET_HAS_TOC): Rename TARGET_TOC to
+ 	TARGET_HAS_TOC.
+ 	(TARGET_TOC): Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
+ 	check to require -mcmodel=medium for pc-relative addressing.
+ 	(create_TOC_reference): Add assertion for TARGET_TOC.
+ 	(rs6000_legitimize_address): Use TARGET_NO_TOC_OR_PCREL instead of
+ 	TARGET_NO_TOC.
+ 	(rs6000_emit_move): Likewise.
+ 	(TOC_alias_set): Rename TOC alias set static variable from 'set'
+ 	to 'TOC_alias_set'.
+ 	(get_TOC_alias_set): Likewise.
+ 	(output_toc): Use TARGET_NO_TOC_OR_PCREL instead of
+ 	TARGET_NO_TOC.
+ 	(rs6000_can_eliminate): Likewise.
+ 	(rs6000_prefixed_address_mode_p): Rename function from
+ 	rs6000_prefixed_address.
+ 	* config/rs6000/rs6000.h (TARGET_TOC): Define in terms of
+ 	TARGET_HAS_TOC and not pc-relative.
+ 	(TARGET_NO_TOC_OR_PCREL): New macro to replace TARGET_NO_TOC.
+ 	* config/rs6000/sysv4.h (TARGET_HAS_TOC): Rename TARGET_TOC to
+ 	TARGET_HAS_TOC.
+ 	(TARGET_TOC): Likewise.
+ 	(TARGET_NO_TOC): Delete here, define TARGET_NO_TOC_OR_PCREL in
+ 	rs6000.h.
+ 
+ 2019-07-18  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/91188
+ 	* config/i386/i386.md (*addqi_1_slp): Use register_operand predicate
+ 	for operand 0.  Do not use (match_dup) to match operand 1 with
+ 	operand 0.  Add check in insn constraint that either input operand
+ 	matches operand 0.  Use SWI12 mode iterator to also handle
+ 	HImode operands.
+ 	(*and<mode>_1_slp): Ditto.
+ 	(*<code>qi_1_slp): Ditto.
+ 	(*sub<mode>_1_slp): Use register_operand predicate for operand 0.
+ 	Do not use (match_dup) to match operand 1 with operand 0.  Add
+ 	check in insn constraint that operand 1 matches operand 0.
+ 	Use SWI12 mode iterator to also handle HImode operands.
+ 	(*ashl<mode>3_1_slp): Ditto.
+ 	(*<shift_insn><mode>3_1_slp): Ditto.
+ 	(*<rotate_insn><mode>3_1_slp): Ditto.
+ 
+ 2019-07-18  Sylvia Taylor  <sylvia.taylor@arm.com>
+ 
+ 	* config/arm/arm-builtins.c
+ 	(arm_expand_ternop_builtin): Remove explicit sha1 builtin handling.
+ 	(arm_expand_unop_builtin): Likewise.
+ 	* config/arm/crypto.md
+ 	(crypto_sha1h): Convert from define_insn to define_expand.
+ 	(crypto_<crypto_pattern>): Likewise.
+ 	(crypto_sha1h_lb): New define_insn.
+ 	(crypto_<crypto_pattern>_lb): Likewise.
+ 
+ 2019-07-18  Sylvia Taylor  <sylvia.taylor@arm.com>
+ 
+ 	PR target/90317
+ 	* config/arm/arm_neon.h (vsha1h_u32): Refactor.
+ 	(vsha1cq_u32): Likewise.
+ 	(vsha1pq_u32): Likewise.
+ 	(vsha1mq_u32): Likewise.
+ 	* config/arm/crypto.md (crypto_sha1h): Remove zero extend, correct
+ 	vec select.
+ 	(crypto_sha1c): Correct vec select.
+ 	(crypto_sha1m): Likewise.
+ 	(crypto_sha1p): Likewise.
+ 
+ 2019-07-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/arm/predicates.md (arm_borrow_operation): New predicate.
+ 	* config/arm/arm.c (subdi3_compare1): Use CCmode for the split.
+ 	(arm_subdi3, subdi_di_zesidi, subdi_di_sesidi): Likewise.
+ 	(subdi_zesidi_zesidi): Likewise.
+ 	(negdi2_compare, negdi2_insn): Likewise.
+ 	(negdi_extensidi): Likewise.
+ 	(negdi_zero_extendsidi): Likewise.
+ 	(arm_cmpdi_insn): Likewise.
+ 	(subsi3_carryin): Use arm_borrow_operation.
+ 	(subsi3_carryin_const): Likewise.
+ 	(subsi3_carryin_const0): Likewise.
+ 	(subsi3_carryin_compare): Likewise.
+ 	(subsi3_carryin_compare_const): Likewise.
+ 	(subsi3_carryin_compare_const0): Likewise.
+ 	(subsi3_carryin_shift): Likewise.
+ 	(rsbsi3_carryin_shift): Likewise.
+ 	(negsi2_carryin_compare): Likewise.
+ 
+ 2019-07-18  Bin Cheng  <bin.cheng@linux.alibaba.com>
+ 
+ 	PR tree-optimization/91137
+ 	* tree-ssa-loop-ivopts.c (struct ivopts_data): New field.
+ 	(tree_ssa_iv_optimize_init, alloc_iv, tree_ssa_iv_optimize_finalize):
+ 	Init, use and fini the above new field.
+ 	(determine_base_object_1): New function.
+ 	(determine_base_object): Reimplement using walk_tree.
+ 
+ 2019-07-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* basic-block.h (CLEANUP_FORCE_FAST_DCE): New macro.
+ 	* cfgcleanup.c (cleanup_cfg): Call run_fast_dce if
+ 	CLEANUP_FORCE_FAST_DCE is set.
+ 	* ifcvt.c (rest_of_handle_if_conversion): Pass
+ 	CLEANUP_FORCE_FAST_DCE to the final cleanup_cfg call if
+ 	if-conversion succeeded.
+ 
+ 2019-07-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Refactor
+ 	branches to make code less indented.
+ 
+ 2019-07-17  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	PR middle-end/81824
+ 	* attribs.c (decls_mismatched_attributes): Simplify the logic
+ 	that avoids duplicates and false positives.
+ 
+ 2019-07-17  John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	* config/pa/pa.c (pa_som_asm_init_sections): Don't force all constant
+ 	data into data section when generating PIC code.
+ 	(pa_select_section): Use pa_reloc_rw_mask() to qualify relocs.
+ 	(pa_reloc_rw_mask): Return 3 when generating PIC code and when
+ 	generating code for SOM targets earlier than HP-UX 11.  Otherwise,
+ 	return 2 for SOM and 0 for other targets.
+ 
+ 2019-07-17  Jeff Law  <law@redhat.com>
+ 
+ 	* tree-ssa-dse.c (initialize_ao_ref_for_dse): Fix formatting.
+ 	(dse_walker::dse_optimize_stmt): Likewise.  Add missing return to
+ 	avoid unexpected switch statement fallthru.
+ 
+ 2019-07-17  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (*add<dwi>3_doubleword):
+ 	Remove redundant constraints.
+ 	(*add<mode>_1): Ditto.
+ 	(*addhi_1): Ditto.
+ 	(*addqi_1): Ditto.
+ 	(*addqi_1_slp): Ditto.
+ 	(*add<mode>_2): Ditto.
+ 	(*addv<mode>4): Ditto.
+ 	(*sub<dwi>3_doubleword): Ditto.
+ 	(*sub<mode>_1): Ditto.
+ 	(*subqi_1_slp): Ditto.
+ 	(*sub<mode>_2): Ditto.
+ 	(*subv<mode>4): Ditto.
+ 	(*sub<mode>_3): Ditto.
+ 	(@add<mode>3_carry): Ditto.
+ 	(@sub<mode>3_carry): Ditto.
+ 	(*add<mode>3_cc_overflow_1): Ditto.
+ 	(*add<mode>3_zext_cc_overflow_2): Ditto.
+ 	(*anddi_1): Ditto.
+ 	(*and<mode>_1): Ditto.
+ 	(*andqi_1): Ditto.
+ 	(*andqi_1_slp): Ditto.
+ 	(*anddi_2): Ditto.
+ 	(*andqi_2_maybe_si): Ditto.
+ 	(*and<mode>_2): Ditto.
+ 	(*andqi_2_slp): Ditto.
+ 	(*<code><mode>_1): Ditto.
+ 	(*<code>qi_1): Ditto.
+ 	(*<code>qi_1_slp): Ditto.
+ 	(*<code><mode>_2): Ditto.
+ 	(*<code>qi_2_slp): Ditto.
+ 
+ 2019-07-17  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* alias.c (record_component_aliases): Do not simplify pointed-to
+ 	types of ODR types.
+ 
+ 2019-07-17  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (*andqi_2_maybe_si): Handle potential
+ 	partial reg stall on alternative 2.
+ 
+ 2019-07-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91178
+ 	* tree-ssa.c (release_defs_bitset): Iterate from higher to
+ 	lower SSA names to avoid quadratic behavior in the common case.
+ 	* tree-data-ref.c (split_constant_offset): Add limit argument
+ 	and pass it down.  Initialize it from PARAM_SSA_NAME_DEF_CHAIN_LIMIT.
+ 	(split_constant_offset_1): Add limit argument and use it to
+ 	limit SSA def walking.  Optimize the common plus/minus case.
+ 
+ 2019-07-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91178
+ 	* tree-vect-stmts.c (get_group_load_store_type): For SLP
+ 	loads with a gap larger than the vector size always use
+ 	VMAT_STRIDED_SLP.
+ 	(vectorizable_load): For VMAT_STRIDED_SLP with a permutation
+ 	avoid loading vectors that are only contained in the gap
+ 	and thus are not needed.
+ 
+ 2019-07-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91180
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Fix offset
+ 	computation for memset partial defs.
+ 
+ 2019-07-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gimple.h (enum gf_mask): Remove GF_OMP_FOR_SIMD, change
+ 	GF_OMP_FOR_KIND_SIMD to a value serially after other kinds,
+ 	divide GF_OMP_FOR_KIND_MASK, GF_OMP_FOR_COMBINED,
+ 	GF_OMP_FOR_COMBINED_INTO, GF_OMP_FOR_GRID_PHONY,
+ 	GF_OMP_FOR_GRID_INTRA_GROUP and GF_OMP_FOR_GRID_GROUP_ITER by two.
+ 	* omp-grid.c (grid_process_grid_body,
+ 	grid_eliminate_combined_simd_part): Use GF_OMP_FOR_KIND_SIMD instead
+ 	of GF_OMP_FOR_SIMD, don't test & GF_OMP_FOR_SIMD but
+ 	== GF_OMP_FOR_KIND_SIMD.
+ 	* omp-low.c (build_outer_var_ref, scan_sharing_clauses,
+ 	check_omp_nesting_restrictions, scan_omp_1_stmt,
+ 	lower_rec_input_clauses, lower_lastprivate_conditional_clauses,
+ 	lower_lastprivate_clauses, lower_reduction_clauses, lower_omp_scan,
+ 	omp_find_scan): Likewise.
+ 	* omp-expand.c (expand_omp_for): Likewise.
+ 	* omp-general.c (omp_extract_for_data): Likewise.
+ 
+ 	PR tree-optimization/91157
+ 	* tree-vect-generic.c (expand_vector_comparison): Handle lhs being
+ 	a vector boolean with scalar mode.
+ 	(expand_vector_condition): Handle first operand being a vector boolean
+ 	with scalar mode.
+ 	(expand_vector_operations_1): For comparisons, don't bail out early
+ 	if the return type is vector boolean with scalar mode, but comparison
+ 	operand type is not.
+ 
+ 2019-07-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91181
+ 	* tree-vect-slp.c (vect_build_slp_tree_1): Do not compare
+ 	IFN_LOADs as calls.
+ 
+ 2019-07-16  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (*testdi_1): Match CCZmode for
+ 	constants that might have the SImode sign bit set.
+ 	(*testqi_1_maybe_si): Remove "!" constraint modifier.
+ 	Use correct constraints for pentium pairing.
+ 	(*test<mode>_1): Ditto.
+ 
+ 2019-07-16  Jeff Law  <law@redhat.com>
+ 
+ 	PR rtl-optimization/91173
+ 	* tree-ssa-address.c (addr_for_mem_ref): If the base is an
+ 	SSA_NAME with a constant value, fold its value into the offset
+ 	and clear the base before calling gen_addr_rtx.
+ 
+ 2019-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/91164
+ 	* dse.c (rest_of_handle_dse): If dead edges have been purged,
+ 	invalidate dominance info.
+ 
+ 2019-07-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* read-md.h (md_reader::record_potential_iterator_use): Add a
+ 	file_location parameter.
+ 	* read-rtl.c (attribute_use::loc): New field.
+ 	(map_attr_string): Take a file_location parameter.  Report cases
+ 	in which attributes map to multiple distinct values.
+ 	(apply_attribute_uses): Update call accordingly.
+ 	(md_reader::handle_overloaded_name): Likewise.
+ 	(md_reader::apply_iterator_to_string): Likewise.  Skip empty
+ 	nonnull strings.
+ 	(record_attribute_use): Take a file_location parameter.
+ 	Initialize attribute_use::loc.
+ 	(md_reader::record_potential_iterator_use): Take a file_location
+ 	parameter.  Update call to record_attribute_use.
+ 	(rtx_reader::rtx_alloc_for_name): Update call accordingly.
+ 	(rtx_reader::read_rtx_code): Likewise.
+ 	(rtx_reader::read_rtx_operand): Likewise.  Record a location
+ 	for implicitly-expanded empty strings.
+ 
+ 2019-07-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* read-md.h (md_reader::ptr_loc): Moved from read-md.c.
+ 	Use file_location instead of separate fields.
+ 	(md_reader::set_md_ptr_loc): Take a file_location instead of a
+ 	separate filename and line number.
+ 	* read-md.c (ptr_loc): As above.
+ 	(md_reader::copy_md_ptr_loc): Update for new ptr_loc layout.
+ 	(md_reader::fprint_md_ptr_loc): Likewise.
+ 	(md_reader::set_md_ptr_loc): Likewise.  Take a file_location
+ 	instead of a separate filename and line number.
+ 	(md_reader::read_string): Update call accordingly.
+ 
+ 2019-07-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/rs6000/rs6000.md (*mov<mode>_update1): Explicitly
+ 	use <SFDF:mode>, <SFDF:MODE>, <SFDF:Ff> and <SFDF:bits> rather than
+ 	leaving the choice between SFDF and P implicit.
+ 	(*mov<mode>_update2): Likewise.
+ 	(*cmp<IBM128:mode>_internal2): Explicitly use <IBM128:MODE>
+ 	rather than leaving the choice betweem IBM128 and GPR implicit.
+ 	(*fix<uns>_trunc<IEEE128:mode><QHSI:mode>2_mem): Explicitly use
+ 	<IEEE128:MODE> rather than leaving the choice between IEEE128 and
+ 	QHSI implicit.
+ 	(AltiVec define_peephole2s): Explicitly use <ALTIVEC_DFORM:MODE>
+ 	rather than leaving the choice between ALTIVEC_DFORM and P implicit.
+ 	* config/rs6000/vsx.md
+ 	(*vsx_ext_<VSX_EXTRACT_I:VS_scalar>_fl_<FL_CONV:mode>)
+ 	(*vsx_ext_<VSX_EXTRACT_I:VS_scalar>_ufl_<FL_CONV:mode>): Explicitly
+ 	use <FL_CONV:VSisa> rather than leaving the choice between FL_CONV
+ 	and VSX_EXTRACT_I implicit.
+ 
+ 2019-07-16  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/mips/micromips.md (*movep<MOVEP1:mode><MOVEP2:mode>):
+ 	Explicitly use <MOVEP1:MODE> for the mode attribute.
+ 
+ 2019-07-16  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR bootstrap/91176
+ 	* ipa-fnsummary.c (analyze_function_body): Skip debug stmts
+ 
+ 2019-07-15  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR target/91050
+ 	* config/rs6000/rs6000.c (rs6000_file_start): Never skip emitting a
+ 	.machine directive.
+ 
+ 2019-07-15  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (@test<mode>_ccno_1):
+ 	Rename from test<mode>_ccno_1.
+ 	(*testdi_1): Remove redundant alternatives.  Remove modrm attribute.
+ 	(*testqi_1_maybe_si): Remove modrm attribute.
+ 	(*test<mode>_1): Ditto.
+ 	* config/i386/i386-expand.c (ix86_split_idivmod): Use
+ 	gen_test_ccno_1 and gen_extend_insn.
+ 
+ 2019-07-15  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (aliasing_component_refs_walk): Initialize same_p
+ 	to 0.
+ 
+ 2019-07-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/91162
+ 	* tree-cfg.c (move_block_to_fn): When releasing a virtual PHI
+ 	node make sure to replace all uses with something valid.
+ 
+ 2019-07-15  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	PR tree-optimization/88497
+ 	* tree-ssa-reassoc.c (reassociate_bb): Swap the positions of
+ 	GIMPLE_BINARY_RHS check and gimple_visited_p check, call new
+ 	function undistribute_bitref_for_vector.
+ 	(undistribute_bitref_for_vector): New function.
+ 	(cleanup_vinfo_map): Likewise.
+ 	(sort_by_mach_mode): Likewise.
+ 
+ 2019-07-14  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (nonmemory_szext_operand): New mode attribute.
+ 	(test<mode>_ccno_1): Macroize insn pattern from testsi_ccno_1
+ 	and testdi_ccno_1 using SWI48 mode attribute.
+ 	(*testdi_1): Use x86_64_szext_nonmemory_operand instead of
+ 	x86_64_szext_general_operand.
+ 	(*testqi_1_maybe_si): Use nonmemory_operand instead of general_operand.
+ 	(*test<mode>_1): Use nonmemory_szext_operand mode attribute
+ 	instead of genera_operand mode attribute.
+ 
+ 2019-07-14  Vladislav Ivanishin  <vlad@ispras.ru>
+ 
+ 	* gdbhooks.py (DumpFn.invoke): Add explicit casts of return values of
+ 	fopen and fclose to their respective types.
+ 	(DotFn.invoke): Ditto.
+ 
+ 2019-07-14  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-fnsummary.c (ipa_dump_hints): Do not dump array_index.
+ 	(ipa_fn_summary::~ipa_fn_summary): Do not destroy array_index.
+ 	(ipa_fn_summary_t::duplicate): Do not duplicate array_index.
+ 	(array_index_predicate): Remove.
+ 	(analyze_function_body): Account cost for variable ofsetted array
+ 	indexing.
+ 	(estimate_node_size_and_time): Do not compute array index hint.
+ 	(ipa_merge_fn_summary_after_inlining): Do not merge array index hint.
+ 	(inline_read_section): Do not read array index hint.
+ 	(ipa_fn_summary_write): Do not write array index hint.
+ 	* doc/invoke.texi (ipa-cp-array-index-hint-bonus): Remove.
+ 	* ipa-cp.c (hint_time_bonus): Remove.
+ 	* ipa-fnsummary.h (ipa_hints_vals): Remove array_index.
+ 	(ipa_fnsummary): Remove array_index.
+ 	* ipa-inline.c (want_inline_small_function_p): Do not use
+ 	array_index.
+ 	(edge_badness): Likewise.
+ 	* params.def (PARAM_IPA_CP_ARRAY_INDEX_HINT_BONUS): Remove.
+ 
+ 2019-07-14  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR target/91148
+ 	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Remove
+ 	superfluous "builtin function" phrasing.
+ 
+ 2019-07-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (component_ref_to_zero_sized_trailing_array_p):
+ 	Break out from ...
+ 	(aliasing_component_refs_walk): Break out from ...
+ 	(aliasing_component_refs_p): ... here.
+ 
+ 2019-07-13  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR target/91148
+ 	* config/rs6000/rs6000.c (rs6000_invalid_builtin): Remove superfluous
+ 	"builtin function" phrasing.
+ 
+ 2019-07-13  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	PR target/90723
+ 	* recog.h (temporary_volatile_ok): New class.
+ 	* config/aarch64/aarch64.c (aarch64_emit_sve_pred_move): Set
+ 	volatile_ok temporarily to true using temporary_volatile_ok.
+ 	* expr.c (emit_block_move_via_cpymem): Likewise.
+ 	* optabs.c (maybe_legitimize_operand): Likewise.
+ 
+ 2019-07-13  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gimplify.c (struct gimplify_omp_ctx): Add order_concurrent member.
+ 	(omp_notice_threadprivate_variable): Diagnose threadprivate variable
+ 	uses inside of order(concurrent) constructs.
+ 	(gimplify_scan_omp_clauses): Set ctx->order_concurrent if
+ 	OMP_CLAUSE_ORDER is seen.
+ 	* omp-low.c (struct omp_context): Add order_concurrent member.
+ 	(scan_sharing_clauses): Set ctx->order_concurrent if
+ 	OMP_CLAUSE_ORDER is seen.
+ 	(check_omp_nesting_restrictions): Diagnose ordered or atomic inside
+ 	of simd order(concurrent).  Diagnose constructs not allowed inside of
+ 	for order(concurrent).
+ 	(setjmp_or_longjmp_p): Add a context and TREE_PUBLIC check to avoid
+ 	complaining about static double setjmp (double); or class static
+ 	methods or non-global namespace setjmps.
+ 	(omp_runtime_api_call): New function.
+ 	(scan_omp_1_stmt): Diagnose OpenMP runtime API calls inside of
+ 	order(concurrent) loops.
+ 
+ 2019-07-12  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* doc/invoke.texi (ssa-name-def-chain-limit): Document new --param.
+ 	* params.def (PARAM_SSA_NAME_DEF_CHAIN_LIMIT): Add new --param.
+ 	* tree-vrp.c (vrp_prop::check_mem_ref): Use
+ 	PARAM_SSA_NAME_DEF_CHAIN_LIMIT.
+ 
+ 2019-07-12  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* tree-ssa-alias.c (same_tmr_indexing_p): Break out from ...
+ 	(indirect_refs_may_alias_p): ... here.
+ 	(nonoverlapping_component_refs_since_match_p): Support also non-trivial
+ 	mem refs in the access paths.
+ 
+ 2019-07-12  Jiangning Liu  <jiangning.liu@amperecomputing.com>
+ 
+ 	PR tree-optimization/89430
+ 	* tree-ssa-phiopt.c (cond_store_replacement): Support conditional
+ 	store elimination for local variable without address escape.
+ 
+ 2019-07-12  Jeff Law  <law@redhat.com>
+ 
+ 	* config/c6x/c6x.c (c6x_section_type): Clear SECTION_NOTYPE
+ 	for the ".far" section.
+ 
+ 2019-07-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91145
+ 	* tree-vect-slp.c (vect_build_slp_tree_2): Fix reduction
+ 	chain check.
+ 
+ 2019-07-12  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	* tree-eh.c (honor_protect_cleanup_actions): Use outer_
+ 	rather than this_state as the lowering context for the ELSE
+ 	seq in a GIMPLE_EH_ELSE.
+ 
+ 2019-07-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* vector-builder.h (vector_builder::elt): Allow already-supplied
+ 	elements to be read back before building is complete.
+ 
+ 2019-07-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR rtl-optimization/91136
+ 	* df-core.c (ACCESSING REFS): Fix typos in comment.
+ 	* resource.c (mark_target_live_reg): Add artificial defs that occur at
+ 	the beginning of the block to the initial set of live registers.
+ 
+ 2019-07-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	* fold-const.h (get_array_ctor_element_at_index): Adjust.
+ 	* fold-const.c (get_array_ctor_element_at_index): Add
+ 	ctor_idx output parameter informing the caller where in
+ 	the constructor the element was (not) found.  Add early exit
+ 	for when the ctor is sorted.
+ 	* gimple-fold.c (fold_array_ctor_reference): Support constant
+ 	folding across multiple array elements.
+ 
+ 2019-07-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* cfgexpand.c (expand_gimple_stmt_1) <GIMPLE_RETURN>: If the statement
+ 	doesn't have location, set the current location to the function's end.
+ 
+ 2019-07-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.md (*compare_condjump<mode>)
+ 	(loadwb_pair<GPI:mode>_<P:mode>, loadwb_pair<GPF:mode>_<P:mode>)
+ 	(storewb_pair<GPI:mode>_<P:mode>, storewb_pair<GPF:mode>_<P:mode>)
+ 	(*ands<mode>_compare0): Fix ambiguous uses of .md attributes.
+ 	* config/aarch64/aarch64-simd.md
+ 	(*aarch64_get_lane_extend<GPI:mode><VDQQH:mode>): Likewise.
+ 	(*aarch64_get_lane_zero_extend<GPI:mode><VDQQH:mode>): Likewise.
+ 	* config/aarch64/aarch64-sve.md
+ 	(while_ult<GPI:mode><PRED_ALL:mode>): Likewise.
+ 	(*cond_<optab><mode>_any): Fix SVE_I/SVE_SDI typo.
+ 
+ 2019-07-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* doc/md.texi: Document that @ patterns can have different
+ 	numbers of operands.
+ 	* genemit.c (handle_overloaded_gen): Handle this case.
+ 	* genopinit.c (handle_overloaded_gen): Likewise.
+ 	* gensupport.c (replace_operands_with_dups): Iterate over
+ 	the new rtx's format rather than the old one's.
+ 
+ 2019-07-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_ORDER.
+ 	* tree.c (omp_clause_num_ops, omp_clause_code_name): Add
+ 	order clause entries.
+ 	(walk_tree_1): Handle OMP_CLAUSE_ORDER.
+ 	* tree-pretty-print.c (dump_omp_clause): Likewise.
+ 	* gimplify.c (gimplify_scan_omp_clauses, gimplify_adjust_omp_clauses):
+ 	Likewise.
+ 	* omp-low.c (scan_sharing_clauses): Likewise.
+ 	* tree-nested.c (convert_nonlocal_omp_clauses,
+ 	convert_local_omp_clauses): Likewise.
+ 
+ 2019-07-12  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	* cfgrtl.c (print_rtl_with_bb): Emit a hint if the
+ 	fallthrough target of current basic block isn't the placed
+ 	right next.
+ 
+ 2019-07-11  Sunil K Pandey  <sunil.k.pandey@intel.com>
+ 
+ 	PR target/90980
+ 	* config/i386/avx512fintrin.h (_mm512_loadu_epi64): New.
+ 	(_mm512_storeu_epi64): Likewise.
+ 	(_mm512_loadu_epi32): Likewise.
+ 	(_mm512_storeu_epi32): Likewise.
+ 	* config/i386/avx512vlintrin.h (_mm256_storeu_epi64): New.
+ 	(_mm_storeu_epi64): Likewise.
+ 	(_mm256_storeu_epi32): Likewise.
+ 	(_mm_storeu_epi32): Likewise.
+ 
+ 2019-07-11  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000-logue.c: Add Modula-2 to comment.
+ 
+ 2019-07-11  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000-logue.c (rs6000_output_function_epilogue):
+ 	Handle Modula-2.
+ 
+ 2019-07-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/91124
+ 	* config/i386/sse.md (sse2_cvtpd2dq<mask_name>): Change into ...
+ 	(sse2_cvtpd2dq): ... this.  Remove mask substitution macros.
+ 	(sse2_cvtpd2dq_mask, sse2_cvtpd2dq_mask_1): New define_insns.
+ 	(ufix_notruncv2dfv2si2<mask_name>): Change into ...
+ 	(ufix_notruncv2dfv2si2): ... this.  Remove mask substitution macros.
+ 	(ufix_notruncv2dfv2si2_mask, ufix_notruncv2dfv2si2_mask_1): New
+ 	define_insns.
+ 	(ufix_truncv2dfv2si2<mask_name>): Change into ...
+ 	(ufix_truncv2dfv2si2): ... this.  Remove mask substitution macros.
+ 	(ufix_truncv2dfv2si2_mask, ufix_truncv2dfv2si2_mask_1): New
+ 	define_insns.
+ 	(sse2_cvttpd2dq<mask_name>): Change into ...
+ 	(sse2_cvttpd2dq): ... this.  Remove mask substitution macros.
+ 	(sse2_cvttpd2dq_mask, sse2_cvttpd2dq_mask_1): New define_insns.
+ 	(*sse2_cvtpd2dq<mask_name>): Change into ...
+ 	(*sse2_cvtpd2dq): ... this.  Remove mask substitution macros.
+ 	Add "C" constraint to const0_operand.
+ 	(*sse2_cvtpd2dq_mask, *sse2_cvtpd2dq_mask_1): New define_insns.
+ 	(sse2_cvtpd2ps_mask): Adjust expand to match *sse2_cvtpd2ps_mask
+ 	changes.
+ 
+ 	PR target/91124
+ 	* config/i386/i386-builtin-types.def
+ 	(V32HI_FTYPE_V32HI_V32HI_V32HI_INT,
+ 	V16HI_FTYPE_V16HI_V16HI_V16HI_INT, V8HI_FTYPE_V8HI_V8HI_V8HI_INT,
+ 	V8SI_FTYPE_V8SI_V8SI_V8SI_INT, V4DI_FTYPE_V4DI_V4DI_V4DI_INT,
+ 	V8DI_FTYPE_V8DI_V8DI_V8DI_INT, V16SI_FTYPE_V16SI_V16SI_V16SI_INT,
+ 	V2DI_FTYPE_V2DI_V2DI_V2DI_INT, V4SI_FTYPE_V4SI_V4SI_V4SI_INT): Remove.
+ 	* config/i386/i386-builtin.def (__builtin_ia32_vpshrdv_v32hi_mask,
+ 	__builtin_ia32_vpshrdv_v32hi_maskz, __builtin_ia32_vpshrdv_v16hi_mask,
+ 	__builtin_ia32_vpshrdv_v16hi_maskz, __builtin_ia32_vpshrdv_v8hi_mask,
+ 	__builtin_ia32_vpshrdv_v8hi_maskz, __builtin_ia32_vpshrdv_v16si_mask,
+ 	__builtin_ia32_vpshrdv_v16si_maskz, __builtin_ia32_vpshrdv_v8si_mask,
+ 	__builtin_ia32_vpshrdv_v8si_maskz, __builtin_ia32_vpshrdv_v4si_mask,
+ 	__builtin_ia32_vpshrdv_v4si_maskz, __builtin_ia32_vpshrdv_v8di_mask,
+ 	__builtin_ia32_vpshrdv_v8di_maskz, __builtin_ia32_vpshrdv_v4di_mask,
+ 	__builtin_ia32_vpshrdv_v4di_maskz, __builtin_ia32_vpshrdv_v2di_mask,
+ 	__builtin_ia32_vpshrdv_v2di_maskz, __builtin_ia32_vpshldv_v32hi_mask,
+ 	__builtin_ia32_vpshldv_v32hi_maskz, __builtin_ia32_vpshldv_v16hi_mask,
+ 	__builtin_ia32_vpshldv_v16hi_maskz, __builtin_ia32_vpshldv_v8hi_mask,
+ 	__builtin_ia32_vpshldv_v8hi_maskz, __builtin_ia32_vpshldv_v16si_mask,
+ 	__builtin_ia32_vpshldv_v16si_maskz, __builtin_ia32_vpshldv_v8si_mask,
+ 	__builtin_ia32_vpshldv_v8si_maskz, __builtin_ia32_vpshldv_v4si_mask,
+ 	__builtin_ia32_vpshldv_v4si_maskz, __builtin_ia32_vpshldv_v8di_mask,
+ 	__builtin_ia32_vpshldv_v8di_maskz, __builtin_ia32_vpshldv_v4di_mask,
+ 	__builtin_ia32_vpshldv_v4di_maskz, __builtin_ia32_vpshldv_v2di_mask,
+ 	__builtin_ia32_vpshldv_v2di_maskz, __builtin_ia32_vpdpbusd_v16si_mask,
+ 	__builtin_ia32_vpdpbusd_v16si_maskz, __builtin_ia32_vpdpbusd_v8si_mask,
+ 	__builtin_ia32_vpdpbusd_v8si_maskz, __builtin_ia32_vpdpbusd_v4si_mask,
+ 	__builtin_ia32_vpdpbusd_v4si_maskz,
+ 	__builtin_ia32_vpdpbusds_v16si_mask,
+ 	__builtin_ia32_vpdpbusds_v16si_maskz,
+ 	__builtin_ia32_vpdpbusds_v8si_mask,
+ 	__builtin_ia32_vpdpbusds_v8si_maskz,
+ 	__builtin_ia32_vpdpbusds_v4si_mask,
+ 	__builtin_ia32_vpdpbusds_v4si_maskz,
+ 	__builtin_ia32_vpdpwssd_v16si_mask,
+ 	__builtin_ia32_vpdpwssd_v16si_maskz, __builtin_ia32_vpdpwssd_v8si_mask,
+ 	__builtin_ia32_vpdpwssd_v8si_maskz, __builtin_ia32_vpdpwssd_v4si_mask,
+ 	__builtin_ia32_vpdpwssd_v4si_maskz,
+ 	__builtin_ia32_vpdpwssds_v16si_mask,
+ 	__builtin_ia32_vpdpwssds_v16si_maskz,
+ 	__builtin_ia32_vpdpwssds_v8si_mask,
+ 	__builtin_ia32_vpdpwssds_v8si_maskz,
+ 	__builtin_ia32_vpdpwssds_v4si_mask,
+ 	__builtin_ia32_vpdpwssds_v4si_maskz): Use *_USI, *_UHI or *_UQI
+ 	suffixed types rather than *_INT.
+ 	* config/i386/i386-expand.c (ix86_expand_args_builtin): Don't handle
+ 	V32HI_FTYPE_V32HI_V32HI_V32HI_INT, V16HI_FTYPE_V16HI_V16HI_V16HI_INT,
+ 	V8HI_FTYPE_V8HI_V8HI_V8HI_INT, V8SI_FTYPE_V8SI_V8SI_V8SI_INT,
+ 	V4DI_FTYPE_V4DI_V4DI_V4DI_INT, V8DI_FTYPE_V8DI_V8DI_V8DI_INT,
+ 	V16SI_FTYPE_V16SI_V16SI_V16SI_INT, V2DI_FTYPE_V2DI_V2DI_V2DI_INT
+ 	and V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
+ 
+ 2019-07-11  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.c (intersect_ranges): If we know the intersection is
+ 	empty, there is no need to conservatively add anything else to
+ 	the set.
+ 
+ 2019-07-11  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/91131
+ 	* gimplify.c (gimplify_compound_literal_expr): Force a temporary
+ 	when the object is volatile and we have not cleared it even though
+ 	there are no nonzero elements.
+ 
+ 2019-07-10  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/predicates.md (cint34_operand): Update
+ 	SIGNED_34BIT_OFFSET_P call.
+ 	(pcrel_address): Update SIGNED_34BIT_OFFSET_P call.
+ 	(pcrel_external_address): Update SIGNED_34BIT_OFFSET_P call.
+ 	* config/rs6000/rs6000.c (rs6000_prefixed_address): Update
+ 	SIGNED_16BIT_OFFSET_P and SIGNED_34BIT_OFFSET_P calls.
+ 	* config/rs6000/rs6000.h (SIGNED_16BIT_OFFSET_P): Remove EXTRA
+ 	argument.
+ 	(SIGNED_34BIT_OFFSET_P): Remove EXTRA argument.
+ 	(SIGNED_16BIT_OFFSET_EXTRA_P): New macro, like
+ 	SIGNED_16BIT_OFFSET_P with an EXTRA argument.
+ 	(SIGNED_34BIT_OFFSET_EXTRA_P): New macro, like
+ 	SIGNED_34BIT_OFFSET_P with an EXTRA argument.
+ 
+ 2019-07-10  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/darwin.h (LIB_SPEC): Collate this spec here.
+ 	* config/rs6000/darwin7.h (LIB_SPEC): Remove.
+ 	* config/rs6000/darwin8.h (LIB_SPEC): Remove.
+ 	(DEF_MIN_OSX_VERSION): New.
+ 
+ 2019-07-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* fold-const.c (fold_relational_const): Fix folding of
+ 	vector-to-scalar NE_EXPRs.
+ 	(test_vector_folding): Add more tests.
+ 
+ 2019-07-10  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR target/91060
+ 	* config/arm/iterators.md (V2DI_ONLY): New mode iterator.
+ 	* config/arm/neon.md (vec_set<mode>_internal): Add a '@' prefix.
+ 	(vec_setv2di_internal): Reexpress as...
+ 	(@vec_set<V2DI_ONLY:mode>_internal): ...this.
+ 	* config/arm/arm.c (neon_expand_vector_init): Use gen_vec_set_internal
+ 	rather than gen_neon_vset_lane<mode>.
+ 
+ 2019-07-10  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR target/91102
+ 	* lra-constraints.c (process_alt_operands): Don't match user
+ 	defined regs only if they are early clobbers.
+ 
+ 2019-07-10  Marc Glisse  <marc.glisse@inria.fr>
+ 
+ 	* wide-int.h (wi::lshift): Reject negative values for the fast path.
+ 
+ 2019-07-10  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91126
+ 	* tree-ssa-sccvn.c (n_walk_cb_data::push_partial_def): Adjust
+ 	native encoding offset for BYTES_BIG_ENDIAN.
+ 	(vn_reference_lookup_3): Likewise.
+ 
+ 2019-07-10  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Look at valueized
+ 	LHS whenever possible.
+ 
+ 2019-07-09  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (nonoverlapping_component_refs_p_1): Break out
+ 	from ...; work also on duplicated types.
+ 	(nonoverlapping_component_refs_since_match): ... here
+ 	(ncr_type_uid): Break out from ...
+ 	(ncr_compar): ... here; look for TYPE_UID of canonical type if
+ 	available.
+ 	(nonoverlapping_component_refs_p): Use same_type_for_tbaa to match
+ 	the types and nonoverlapping_component_refs_p_1 to disambiguate.
+ 
+ 2019-07-09  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/90989
+ 	* tree-ssa-strlen.c (handle_char_store): Constrain a single character
+ 	optimization to just single character stores.
+ 
+ 2019-07-09  Joern Rennecke  <joern.rennecke@riscy-ip.com>
+ 
+ 	* tree-vect-stmts.c (vectorizable_comparison) <!slp_node>:
+ 	Swap operands only once.
+ 
+ 2019-07-09  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
+ 
+ 	* cfgcleanup.c (old_insns_match_p): Check if used hard regs set is equal
+ 	for both call instructions.
+ 
+ 2019-07-09  John Darrington  <john@darrington.wattle.id.au>
+ 
+ 	* simplify-rtx.c (simplify_unary_operation_1): Use GET_MODE_PRECISION
+ 	rather than GET_MODE_BITSIZE to better handle partial integer modes.
+ 
+ 2019-07-09  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-internal.h (create_TOC_reference): Delete.
+ 	* config/rs6000/rs6000-logue.c (create_TOC_reference): Move
+ 	function from rs6000-logue.c back to rs6000.c.
+ 	* config/rs6000/rs6000.c (create_TOC_reference): Likewise.
+ 
+ 2019-07-09  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR c++/61339
+ 	* auto-profile.c: Change class-key of PODs to struct and others
+ 	to class.
+ 	* basic-block.h: Same.
+ 	* bitmap.c (bitmap_alloc): Same.
+ 	* bitmap.h: Same.
+ 	* builtins.c (expand_builtin_prefetch): Same.
+ 	(expand_builtin_interclass_mathfn): Same.
+ 	(expand_builtin_strlen): Same.
+ 	(expand_builtin_mempcpy_args): Same.
+ 	(expand_cmpstr): Same.
+ 	(expand_builtin___clear_cache): Same.
+ 	(expand_ifn_atomic_bit_test_and): Same.
+ 	(expand_builtin_thread_pointer): Same.
+ 	(expand_builtin_set_thread_pointer): Same.
+ 	* caller-save.c (setup_save_areas): Same.
+ 	(replace_reg_with_saved_mem): Same.
+ 	(insert_restore): Same.
+ 	(insert_save): Same.
+ 	(add_used_regs): Same.
+ 	* cfg.c (get_bb_copy): Same.
+ 	(set_loop_copy): Same.
+ 	* cfg.h: Same.
+ 	* cfganal.h: Same.
+ 	* cfgexpand.c (alloc_stack_frame_space): Same.
+ 	(add_stack_var): Same.
+ 	(add_stack_var_conflict): Same.
+ 	(add_scope_conflicts_1): Same.
+ 	(update_alias_info_with_stack_vars): Same.
+ 	(expand_used_vars): Same.
+ 	* cfghooks.c (redirect_edge_and_branch_force): Same.
+ 	(delete_basic_block): Same.
+ 	(split_edge): Same.
+ 	(make_forwarder_block): Same.
+ 	(force_nonfallthru): Same.
+ 	(duplicate_block): Same.
+ 	(lv_flush_pending_stmts): Same.
+ 	* cfghooks.h: Same.
+ 	* cfgloop.c (flow_loops_cfg_dump): Same.
+ 	(flow_loop_nested_p): Same.
+ 	(superloop_at_depth): Same.
+ 	(get_loop_latch_edges): Same.
+ 	(flow_loop_dump): Same.
+ 	(flow_loops_dump): Same.
+ 	(flow_loops_free): Same.
+ 	(flow_loop_nodes_find): Same.
+ 	(establish_preds): Same.
+ 	(flow_loop_tree_node_add): Same.
+ 	(flow_loop_tree_node_remove): Same.
+ 	(flow_loops_find): Same.
+ 	(find_subloop_latch_edge_by_profile): Same.
+ 	(find_subloop_latch_edge_by_ivs): Same.
+ 	(mfb_redirect_edges_in_set): Same.
+ 	(form_subloop): Same.
+ 	(merge_latch_edges): Same.
+ 	(disambiguate_multiple_latches): Same.
+ 	(disambiguate_loops_with_multiple_latches): Same.
+ 	(flow_bb_inside_loop_p): Same.
+ 	(glb_enum_p): Same.
+ 	(get_loop_body_with_size): Same.
+ 	(get_loop_body): Same.
+ 	(fill_sons_in_loop): Same.
+ 	(get_loop_body_in_dom_order): Same.
+ 	(get_loop_body_in_custom_order): Same.
+ 	(release_recorded_exits): Same.
+ 	(get_loop_exit_edges): Same.
+ 	(num_loop_branches): Same.
+ 	(remove_bb_from_loops): Same.
+ 	(find_common_loop): Same.
+ 	(delete_loop): Same.
+ 	(cancel_loop): Same.
+ 	(verify_loop_structure): Same.
+ 	(loop_preheader_edge): Same.
+ 	(loop_exit_edge_p): Same.
+ 	(single_exit): Same.
+ 	(loop_exits_to_bb_p): Same.
+ 	(loop_exits_from_bb_p): Same.
+ 	(get_loop_location): Same.
+ 	(record_niter_bound): Same.
+ 	(get_estimated_loop_iterations_int): Same.
+ 	(max_stmt_executions_int): Same.
+ 	(likely_max_stmt_executions_int): Same.
+ 	(get_estimated_loop_iterations): Same.
+ 	(get_max_loop_iterations): Same.
+ 	(get_max_loop_iterations_int): Same.
+ 	(get_likely_max_loop_iterations): Same.
+ 	* cfgloop.h (simple_loop_desc): Same.
+ 	(get_loop): Same.
+ 	(loop_depth): Same.
+ 	(loop_outer): Same.
+ 	(loop_iterator::next): Same.
+ 	(loop_outermost): Same.
+ 	* cfgloopanal.c (mark_irreducible_loops): Same.
+ 	(num_loop_insns): Same.
+ 	(average_num_loop_insns): Same.
+ 	(expected_loop_iterations_unbounded): Same.
+ 	(expected_loop_iterations): Same.
+ 	(mark_loop_exit_edges): Same.
+ 	(single_likely_exit): Same.
+ 	* cfgloopmanip.c (fix_bb_placement): Same.
+ 	(fix_bb_placements): Same.
+ 	(remove_path): Same.
+ 	(place_new_loop): Same.
+ 	(add_loop): Same.
+ 	(scale_loop_frequencies): Same.
+ 	(scale_loop_profile): Same.
+ 	(create_empty_if_region_on_edge): Same.
+ 	(create_empty_loop_on_edge): Same.
+ 	(loopify): Same.
+ 	(unloop): Same.
+ 	(fix_loop_placements): Same.
+ 	(copy_loop_info): Same.
+ 	(duplicate_loop): Same.
+ 	(duplicate_subloops): Same.
+ 	(loop_redirect_edge): Same.
+ 	(can_duplicate_loop_p): Same.
+ 	(duplicate_loop_to_header_edge): Same.
+ 	(mfb_keep_just): Same.
+ 	(has_preds_from_loop): Same.
+ 	(create_preheader): Same.
+ 	(create_preheaders): Same.
+ 	(lv_adjust_loop_entry_edge): Same.
+ 	(loop_version): Same.
+ 	* cfgloopmanip.h: Same.
+ 	* cgraph.h: Same.
+ 	* cgraphbuild.c: Same.
+ 	* combine.c (make_extraction): Same.
+ 	* config/i386/i386-features.c: Same.
+ 	* config/i386/i386-features.h: Same.
+ 	* config/i386/i386.c (ix86_emit_outlined_ms2sysv_save): Same.
+ 	(ix86_emit_outlined_ms2sysv_restore): Same.
+ 	(ix86_noce_conversion_profitable_p): Same.
+ 	(ix86_init_cost): Same.
+ 	(ix86_simd_clone_usable): Same.
+ 	* configure.ac (ACX_PROG_CXX_WARNING_OPTS): Add -Wclass-is-pod and
+ 	Wstruct-not-pod.
+ 	* coretypes.h: Same.
+ 	* data-streamer-in.c (string_for_index): Change class-key of PODs
+ 	to struct and others to class.
+ 	(streamer_read_indexed_string): Same.
+ 	(streamer_read_string): Same.
+ 	(bp_unpack_indexed_string): Same.
+ 	(bp_unpack_string): Same.
+ 	(streamer_read_uhwi): Same.
+ 	(streamer_read_hwi): Same.
+ 	(streamer_read_gcov_count): Same.
+ 	(streamer_read_wide_int): Same.
+ 	* data-streamer.h (streamer_write_bitpack): Same.
+ 	(bp_unpack_value): Same.
+ 	(streamer_write_char_stream): Same.
+ 	(streamer_write_hwi_in_range): Same.
+ 	(streamer_write_record_start): Same.
+ 	* ddg.c (create_ddg_dep_from_intra_loop_link): Same.
+ 	(add_cross_iteration_register_deps): Same.
+ 	(build_intra_loop_deps): Same.
+ 	* df-core.c (df_analyze): Same.
+ 	(loop_post_order_compute): Same.
+ 	(loop_inverted_post_order_compute): Same.
+ 	* df-problems.c (df_rd_alloc): Same.
+ 	(df_rd_simulate_one_insn): Same.
+ 	(df_rd_local_compute): Same.
+ 	(df_rd_init_solution): Same.
+ 	(df_rd_confluence_n): Same.
+ 	(df_rd_transfer_function): Same.
+ 	(df_rd_free): Same.
+ 	(df_rd_dump_defs_set): Same.
+ 	(df_rd_top_dump): Same.
+ 	(df_lr_alloc): Same.
+ 	(df_lr_reset): Same.
+ 	(df_lr_local_compute): Same.
+ 	(df_lr_init): Same.
+ 	(df_lr_confluence_n): Same.
+ 	(df_lr_free): Same.
+ 	(df_lr_top_dump): Same.
+ 	(df_lr_verify_transfer_functions): Same.
+ 	(df_live_alloc): Same.
+ 	(df_live_reset): Same.
+ 	(df_live_init): Same.
+ 	(df_live_confluence_n): Same.
+ 	(df_live_finalize): Same.
+ 	(df_live_free): Same.
+ 	(df_live_top_dump): Same.
+ 	(df_live_verify_transfer_functions): Same.
+ 	(df_mir_alloc): Same.
+ 	(df_mir_reset): Same.
+ 	(df_mir_init): Same.
+ 	(df_mir_confluence_n): Same.
+ 	(df_mir_free): Same.
+ 	(df_mir_top_dump): Same.
+ 	(df_word_lr_alloc): Same.
+ 	(df_word_lr_reset): Same.
+ 	(df_word_lr_init): Same.
+ 	(df_word_lr_confluence_n): Same.
+ 	(df_word_lr_free): Same.
+ 	(df_word_lr_top_dump): Same.
+ 	(df_md_alloc): Same.
+ 	(df_md_simulate_one_insn): Same.
+ 	(df_md_reset): Same.
+ 	(df_md_init): Same.
+ 	(df_md_free): Same.
+ 	(df_md_top_dump): Same.
+ 	* df-scan.c (df_insn_delete): Same.
+ 	(df_insn_rescan): Same.
+ 	(df_notes_rescan): Same.
+ 	(df_sort_and_compress_mws): Same.
+ 	(df_install_mws): Same.
+ 	(df_refs_add_to_chains): Same.
+ 	(df_ref_create_structure): Same.
+ 	(df_ref_record): Same.
+ 	(df_def_record_1): Same.
+ 	(df_find_hard_reg_defs): Same.
+ 	(df_uses_record): Same.
+ 	(df_get_conditional_uses): Same.
+ 	(df_get_call_refs): Same.
+ 	(df_recompute_luids): Same.
+ 	(df_get_entry_block_def_set): Same.
+ 	(df_entry_block_defs_collect): Same.
+ 	(df_get_exit_block_use_set): Same.
+ 	(df_exit_block_uses_collect): Same.
+ 	(df_mws_verify): Same.
+ 	(df_bb_verify): Same.
+ 	* df.h (df_scan_get_bb_info): Same.
+ 	* doc/tm.texi: Same.
+ 	* dse.c (record_store): Same.
+ 	* dumpfile.h: Same.
+ 	* emit-rtl.c (const_fixed_hasher::equal): Same.
+ 	(set_mem_attributes_minus_bitpos): Same.
+ 	(change_address): Same.
+ 	(adjust_address_1): Same.
+ 	(offset_address): Same.
+ 	* emit-rtl.h: Same.
+ 	* except.c (dw2_build_landing_pads): Same.
+ 	(sjlj_emit_dispatch_table): Same.
+ 	* explow.c (allocate_dynamic_stack_space): Same.
+ 	(emit_stack_probe): Same.
+ 	(probe_stack_range): Same.
+ 	* expmed.c (store_bit_field_using_insv): Same.
+ 	(store_bit_field_1): Same.
+ 	(store_integral_bit_field): Same.
+ 	(extract_bit_field_using_extv): Same.
+ 	(extract_bit_field_1): Same.
+ 	(emit_cstore): Same.
+ 	* expr.c (emit_block_move_via_cpymem): Same.
+ 	(expand_cmpstrn_or_cmpmem): Same.
+ 	(set_storage_via_setmem): Same.
+ 	(emit_single_push_insn_1): Same.
+ 	(expand_assignment): Same.
+ 	(store_constructor): Same.
+ 	(expand_expr_real_2): Same.
+ 	(expand_expr_real_1): Same.
+ 	(try_casesi): Same.
+ 	* flags.h: Same.
+ 	* function.c (try_fit_stack_local): Same.
+ 	(assign_stack_local_1): Same.
+ 	(assign_stack_local): Same.
+ 	(cut_slot_from_list): Same.
+ 	(insert_slot_to_list): Same.
+ 	(max_slot_level): Same.
+ 	(move_slot_to_level): Same.
+ 	(temp_address_hasher::equal): Same.
+ 	(remove_unused_temp_slot_addresses): Same.
+ 	(assign_temp): Same.
+ 	(combine_temp_slots): Same.
+ 	(update_temp_slot_address): Same.
+ 	(preserve_temp_slots): Same.
+ 	* function.h: Same.
+ 	* fwprop.c: Same.
+ 	* gcc-rich-location.h: Same.
+ 	* gcov.c: Same.
+ 	* genattrtab.c (check_attr_test): Same.
+ 	(check_attr_value): Same.
+ 	(convert_set_attr_alternative): Same.
+ 	(convert_set_attr): Same.
+ 	(check_defs): Same.
+ 	(copy_boolean): Same.
+ 	(get_attr_value): Same.
+ 	(expand_delays): Same.
+ 	(make_length_attrs): Same.
+ 	(min_fn): Same.
+ 	(make_alternative_compare): Same.
+ 	(simplify_test_exp): Same.
+ 	(tests_attr_p): Same.
+ 	(get_attr_order): Same.
+ 	(clear_struct_flag): Same.
+ 	(gen_attr): Same.
+ 	(compares_alternatives_p): Same.
+ 	(gen_insn): Same.
+ 	(gen_delay): Same.
+ 	(find_attrs_to_cache): Same.
+ 	(write_test_expr): Same.
+ 	(walk_attr_value): Same.
+ 	(write_attr_get): Same.
+ 	(eliminate_known_true): Same.
+ 	(write_insn_cases): Same.
+ 	(write_attr_case): Same.
+ 	(write_attr_valueq): Same.
+ 	(write_attr_value): Same.
+ 	(write_dummy_eligible_delay): Same.
+ 	(next_comma_elt): Same.
+ 	(find_attr): Same.
+ 	(make_internal_attr): Same.
+ 	(copy_rtx_unchanging): Same.
+ 	(gen_insn_reserv): Same.
+ 	(check_tune_attr): Same.
+ 	(make_automaton_attrs): Same.
+ 	(handle_arg): Same.
+ 	* genextract.c (gen_insn): Same.
+ 	(VEC_char_to_string): Same.
+ 	* genmatch.c (print_operand): Same.
+ 	(lower): Same.
+ 	(parser::parse_operation): Same.
+ 	(parser::parse_capture): Same.
+ 	(parser::parse_c_expr): Same.
+ 	(parser::parse_simplify): Same.
+ 	(main): Same.
+ 	* genoutput.c (output_operand_data): Same.
+ 	(output_get_insn_name): Same.
+ 	(compare_operands): Same.
+ 	(place_operands): Same.
+ 	(process_template): Same.
+ 	(validate_insn_alternatives): Same.
+ 	(validate_insn_operands): Same.
+ 	(gen_expand): Same.
+ 	(note_constraint): Same.
+ 	* genpreds.c (write_one_predicate_function): Same.
+ 	(add_constraint): Same.
+ 	(process_define_register_constraint): Same.
+ 	(write_lookup_constraint_1): Same.
+ 	(write_lookup_constraint_array): Same.
+ 	(write_insn_constraint_len): Same.
+ 	(write_reg_class_for_constraint_1): Same.
+ 	(write_constraint_satisfied_p_array): Same.
+ 	* genrecog.c (optimize_subroutine_group): Same.
+ 	* gensupport.c (process_define_predicate): Same.
+ 	(queue_pattern): Same.
+ 	(remove_from_queue): Same.
+ 	(process_rtx): Same.
+ 	(is_predicable): Same.
+ 	(change_subst_attribute): Same.
+ 	(subst_pattern_match): Same.
+ 	(alter_constraints): Same.
+ 	(alter_attrs_for_insn): Same.
+ 	(shift_output_template): Same.
+ 	(alter_output_for_subst_insn): Same.
+ 	(process_one_cond_exec): Same.
+ 	(subst_dup): Same.
+ 	(process_define_cond_exec): Same.
+ 	(mnemonic_htab_callback): Same.
+ 	(gen_mnemonic_attr): Same.
+ 	(read_md_rtx): Same.
+ 	* ggc-page.c: Same.
+ 	* gimple-loop-interchange.cc (dump_reduction): Same.
+ 	(dump_induction): Same.
+ 	(loop_cand::~loop_cand): Same.
+ 	(free_data_refs_with_aux): Same.
+ 	(tree_loop_interchange::interchange_loops): Same.
+ 	(tree_loop_interchange::map_inductions_to_loop): Same.
+ 	(tree_loop_interchange::move_code_to_inner_loop): Same.
+ 	(compute_access_stride): Same.
+ 	(compute_access_strides): Same.
+ 	(proper_loop_form_for_interchange): Same.
+ 	(tree_loop_interchange_compute_ddrs): Same.
+ 	(prune_datarefs_not_in_loop): Same.
+ 	(prepare_data_references): Same.
+ 	(pass_linterchange::execute): Same.
+ 	* gimple-loop-jam.c (bb_prevents_fusion_p): Same.
+ 	(unroll_jam_possible_p): Same.
+ 	(fuse_loops): Same.
+ 	(adjust_unroll_factor): Same.
+ 	(tree_loop_unroll_and_jam): Same.
+ 	* gimple-loop-versioning.cc (loop_versioning::~loop_versioning): Same.
+ 	(loop_versioning::expensive_stmt_p): Same.
+ 	(loop_versioning::version_for_unity): Same.
+ 	(loop_versioning::dump_inner_likelihood): Same.
+ 	(loop_versioning::find_per_loop_multiplication): Same.
+ 	(loop_versioning::analyze_term_using_scevs): Same.
+ 	(loop_versioning::record_address_fragment): Same.
+ 	(loop_versioning::analyze_expr): Same.
+ 	(loop_versioning::analyze_blocks): Same.
+ 	(loop_versioning::prune_conditions): Same.
+ 	(loop_versioning::merge_loop_info): Same.
+ 	(loop_versioning::add_loop_to_queue): Same.
+ 	(loop_versioning::decide_whether_loop_is_versionable): Same.
+ 	(loop_versioning::make_versioning_decisions): Same.
+ 	(loop_versioning::implement_versioning_decisions): Same.
+ 	* gimple-ssa-evrp-analyze.c
+ 	(evrp_range_analyzer::record_ranges_from_phis): Same.
+ 	* gimple-ssa-store-merging.c (split_store::split_store): Same.
+ 	(count_multiple_uses): Same.
+ 	(split_group): Same.
+ 	(imm_store_chain_info::output_merged_store): Same.
+ 	(pass_store_merging::process_store): Same.
+ 	* gimple-ssa-strength-reduction.c (slsr_process_phi): Same.
+ 	* gimple-ssa-warn-alloca.c (adjusted_warn_limit): Same.
+ 	(is_max): Same.
+ 	(alloca_call_type): Same.
+ 	(pass_walloca::execute): Same.
+ 	* gimple-streamer-in.c (input_phi): Same.
+ 	(input_gimple_stmt): Same.
+ 	* gimple-streamer.h: Same.
+ 	* godump.c (go_force_record_alignment): Same.
+ 	(go_format_type): Same.
+ 	(go_output_type): Same.
+ 	(go_output_fndecl): Same.
+ 	(go_output_typedef): Same.
+ 	(keyword_hash_init): Same.
+ 	(find_dummy_types): Same.
+ 	* graph.c (draw_cfg_nodes_no_loops): Same.
+ 	(draw_cfg_nodes_for_loop): Same.
+ 	* hard-reg-set.h (hard_reg_set_iter_next): Same.
+ 	* hsa-brig.c: Same.
+ 	* hsa-common.h (hsa_internal_fn_hasher::equal): Same.
+ 	* hsa-dump.c (dump_hsa_cfun): Same.
+ 	* hsa-gen.c (gen_function_def_parameters): Same.
+ 	* hsa-regalloc.c (dump_hsa_cfun_regalloc): Same.
+ 	* input.c (dump_line_table_statistics): Same.
+ 	(test_lexer): Same.
+ 	* input.h: Same.
+ 	* internal-fn.c (get_multi_vector_move): Same.
+ 	(expand_load_lanes_optab_fn): Same.
+ 	(expand_GOMP_SIMT_ENTER_ALLOC): Same.
+ 	(expand_GOMP_SIMT_EXIT): Same.
+ 	(expand_GOMP_SIMT_LAST_LANE): Same.
+ 	(expand_GOMP_SIMT_ORDERED_PRED): Same.
+ 	(expand_GOMP_SIMT_VOTE_ANY): Same.
+ 	(expand_GOMP_SIMT_XCHG_BFLY): Same.
+ 	(expand_GOMP_SIMT_XCHG_IDX): Same.
+ 	(expand_addsub_overflow): Same.
+ 	(expand_neg_overflow): Same.
+ 	(expand_mul_overflow): Same.
+ 	(expand_call_mem_ref): Same.
+ 	(expand_mask_load_optab_fn): Same.
+ 	(expand_scatter_store_optab_fn): Same.
+ 	(expand_gather_load_optab_fn): Same.
+ 	* ipa-cp.c (ipa_get_parm_lattices): Same.
+ 	(print_all_lattices): Same.
+ 	(ignore_edge_p): Same.
+ 	(build_toporder_info): Same.
+ 	(free_toporder_info): Same.
+ 	(push_node_to_stack): Same.
+ 	(ipcp_lattice<valtype>::set_contains_variable): Same.
+ 	(set_agg_lats_to_bottom): Same.
+ 	(ipcp_bits_lattice::meet_with): Same.
+ 	(set_single_call_flag): Same.
+ 	(initialize_node_lattices): Same.
+ 	(ipa_get_jf_ancestor_result): Same.
+ 	(ipcp_verify_propagated_values): Same.
+ 	(propagate_scalar_across_jump_function): Same.
+ 	(propagate_context_across_jump_function): Same.
+ 	(propagate_bits_across_jump_function): Same.
+ 	(ipa_vr_operation_and_type_effects): Same.
+ 	(propagate_vr_across_jump_function): Same.
+ 	(set_check_aggs_by_ref): Same.
+ 	(set_chain_of_aglats_contains_variable): Same.
+ 	(merge_aggregate_lattices): Same.
+ 	(agg_pass_through_permissible_p): Same.
+ 	(propagate_aggs_across_jump_function): Same.
+ 	(call_passes_through_thunk_p): Same.
+ 	(propagate_constants_across_call): Same.
+ 	(devirtualization_time_bonus): Same.
+ 	(good_cloning_opportunity_p): Same.
+ 	(context_independent_aggregate_values): Same.
+ 	(gather_context_independent_values): Same.
+ 	(perform_estimation_of_a_value): Same.
+ 	(estimate_local_effects): Same.
+ 	(value_topo_info<valtype>::add_val): Same.
+ 	(add_all_node_vals_to_toposort): Same.
+ 	(value_topo_info<valtype>::propagate_effects): Same.
+ 	(ipcp_propagate_stage): Same.
+ 	(ipcp_discover_new_direct_edges): Same.
+ 	(same_node_or_its_all_contexts_clone_p): Same.
+ 	(cgraph_edge_brings_value_p): Same.
+ 	(gather_edges_for_value): Same.
+ 	(create_specialized_node): Same.
+ 	(find_more_scalar_values_for_callers_subset): Same.
+ 	(find_more_contexts_for_caller_subset): Same.
+ 	(copy_plats_to_inter): Same.
+ 	(intersect_aggregates_with_edge): Same.
+ 	(find_aggregate_values_for_callers_subset): Same.
+ 	(cgraph_edge_brings_all_agg_vals_for_node): Same.
+ 	(decide_about_value): Same.
+ 	(decide_whether_version_node): Same.
+ 	(spread_undeadness): Same.
+ 	(identify_dead_nodes): Same.
+ 	(ipcp_store_vr_results): Same.
+ 	* ipa-devirt.c (final_warning_record::grow_type_warnings): Same.
+ 	* ipa-fnsummary.c (ipa_fn_summary::account_size_time): Same.
+ 	(redirect_to_unreachable): Same.
+ 	(edge_set_predicate): Same.
+ 	(evaluate_conditions_for_known_args): Same.
+ 	(evaluate_properties_for_edge): Same.
+ 	(ipa_fn_summary_t::duplicate): Same.
+ 	(ipa_call_summary_t::duplicate): Same.
+ 	(dump_ipa_call_summary): Same.
+ 	(ipa_dump_fn_summary): Same.
+ 	(eliminated_by_inlining_prob): Same.
+ 	(set_cond_stmt_execution_predicate): Same.
+ 	(set_switch_stmt_execution_predicate): Same.
+ 	(compute_bb_predicates): Same.
+ 	(will_be_nonconstant_expr_predicate): Same.
+ 	(phi_result_unknown_predicate): Same.
+ 	(analyze_function_body): Same.
+ 	(compute_fn_summary): Same.
+ 	(estimate_edge_devirt_benefit): Same.
+ 	(estimate_edge_size_and_time): Same.
+ 	(estimate_calls_size_and_time): Same.
+ 	(estimate_node_size_and_time): Same.
+ 	(remap_edge_change_prob): Same.
+ 	(remap_edge_summaries): Same.
+ 	(ipa_merge_fn_summary_after_inlining): Same.
+ 	(ipa_fn_summary_generate): Same.
+ 	(inline_read_section): Same.
+ 	(ipa_fn_summary_read): Same.
+ 	(ipa_fn_summary_write): Same.
+ 	* ipa-fnsummary.h: Same.
+ 	* ipa-hsa.c (ipa_hsa_read_section): Same.
+ 	* ipa-icf-gimple.c (func_checker::compare_loops): Same.
+ 	* ipa-icf.c (sem_function::param_used_p): Same.
+ 	* ipa-inline-analysis.c (do_estimate_edge_time): Same.
+ 	* ipa-inline.c (edge_badness): Same.
+ 	(inline_small_functions): Same.
+ 	* ipa-polymorphic-call.c
+ 	(ipa_polymorphic_call_context::stream_out): Same.
+ 	* ipa-predicate.c (predicate::remap_after_duplication): Same.
+ 	(predicate::remap_after_inlining): Same.
+ 	(predicate::stream_out): Same.
+ 	* ipa-predicate.h: Same.
+ 	* ipa-profile.c (ipa_profile_read_summary): Same.
+ 	* ipa-prop.c (ipa_get_param_decl_index_1): Same.
+ 	(count_formal_params): Same.
+ 	(ipa_dump_param): Same.
+ 	(ipa_alloc_node_params): Same.
+ 	(ipa_print_node_jump_functions_for_edge): Same.
+ 	(ipa_print_node_jump_functions): Same.
+ 	(ipa_load_from_parm_agg): Same.
+ 	(get_ancestor_addr_info): Same.
+ 	(ipa_compute_jump_functions_for_edge): Same.
+ 	(ipa_analyze_virtual_call_uses): Same.
+ 	(ipa_analyze_stmt_uses): Same.
+ 	(ipa_analyze_params_uses_in_bb): Same.
+ 	(update_jump_functions_after_inlining): Same.
+ 	(try_decrement_rdesc_refcount): Same.
+ 	(ipa_impossible_devirt_target): Same.
+ 	(update_indirect_edges_after_inlining): Same.
+ 	(combine_controlled_uses_counters): Same.
+ 	(ipa_edge_args_sum_t::duplicate): Same.
+ 	(ipa_write_jump_function): Same.
+ 	(ipa_write_indirect_edge_info): Same.
+ 	(ipa_write_node_info): Same.
+ 	(ipa_read_edge_info): Same.
+ 	(ipa_prop_read_section): Same.
+ 	(read_replacements_section): Same.
+ 	* ipa-prop.h (ipa_get_param_count): Same.
+ 	(ipa_get_param): Same.
+ 	(ipa_get_type): Same.
+ 	(ipa_get_param_move_cost): Same.
+ 	(ipa_set_param_used): Same.
+ 	(ipa_get_controlled_uses): Same.
+ 	(ipa_set_controlled_uses): Same.
+ 	(ipa_get_cs_argument_count): Same.
+ 	* ipa-pure-const.c (analyze_function): Same.
+ 	(pure_const_read_summary): Same.
+ 	* ipa-ref.h: Same.
+ 	* ipa-reference.c (ipa_reference_read_optimization_summary): Same.
+ 	* ipa-split.c (test_nonssa_use): Same.
+ 	(dump_split_point): Same.
+ 	(dominated_by_forbidden): Same.
+ 	(split_part_set_ssa_name_p): Same.
+ 	(find_split_points): Same.
+ 	* ira-build.c (finish_loop_tree_nodes): Same.
+ 	(low_pressure_loop_node_p): Same.
+ 	* ira-color.c (ira_reuse_stack_slot): Same.
+ 	* ira-int.h: Same.
+ 	* ira.c (setup_reg_equiv): Same.
+ 	(print_insn_chain): Same.
+ 	(ira): Same.
+ 	* loop-doloop.c (doloop_condition_get): Same.
+ 	(add_test): Same.
+ 	(record_reg_sets): Same.
+ 	(doloop_optimize): Same.
+ 	* loop-init.c (loop_optimizer_init): Same.
+ 	(fix_loop_structure): Same.
+ 	* loop-invariant.c (merge_identical_invariants): Same.
+ 	(compute_always_reached): Same.
+ 	(find_exits): Same.
+ 	(may_assign_reg_p): Same.
+ 	(find_invariants_bb): Same.
+ 	(find_invariants_body): Same.
+ 	(replace_uses): Same.
+ 	(can_move_invariant_reg): Same.
+ 	(free_inv_motion_data): Same.
+ 	(move_single_loop_invariants): Same.
+ 	(change_pressure): Same.
+ 	(mark_ref_regs): Same.
+ 	(calculate_loop_reg_pressure): Same.
+ 	* loop-iv.c (biv_entry_hasher::equal): Same.
+ 	(iv_extend_to_rtx_code): Same.
+ 	(check_iv_ref_table_size): Same.
+ 	(clear_iv_info): Same.
+ 	(latch_dominating_def): Same.
+ 	(iv_get_reaching_def): Same.
+ 	(iv_constant): Same.
+ 	(iv_subreg): Same.
+ 	(iv_extend): Same.
+ 	(iv_neg): Same.
+ 	(iv_add): Same.
+ 	(iv_mult): Same.
+ 	(get_biv_step): Same.
+ 	(record_iv): Same.
+ 	(analyzed_for_bivness_p): Same.
+ 	(record_biv): Same.
+ 	(iv_analyze_biv): Same.
+ 	(iv_analyze_expr): Same.
+ 	(iv_analyze_def): Same.
+ 	(iv_analyze_op): Same.
+ 	(iv_analyze): Same.
+ 	(iv_analyze_result): Same.
+ 	(biv_p): Same.
+ 	(eliminate_implied_conditions): Same.
+ 	(simplify_using_initial_values): Same.
+ 	(shorten_into_mode): Same.
+ 	(canonicalize_iv_subregs): Same.
+ 	(determine_max_iter): Same.
+ 	(check_simple_exit): Same.
+ 	(find_simple_exit): Same.
+ 	(get_simple_loop_desc): Same.
+ 	* loop-unroll.c (report_unroll): Same.
+ 	(decide_unrolling): Same.
+ 	(unroll_loops): Same.
+ 	(loop_exit_at_end_p): Same.
+ 	(decide_unroll_constant_iterations): Same.
+ 	(unroll_loop_constant_iterations): Same.
+ 	(compare_and_jump_seq): Same.
+ 	(unroll_loop_runtime_iterations): Same.
+ 	(decide_unroll_stupid): Same.
+ 	(unroll_loop_stupid): Same.
+ 	(referenced_in_one_insn_in_loop_p): Same.
+ 	(reset_debug_uses_in_loop): Same.
+ 	(analyze_iv_to_split_insn): Same.
+ 	* lra-eliminations.c (lra_debug_elim_table): Same.
+ 	(setup_can_eliminate): Same.
+ 	(form_sum): Same.
+ 	(lra_get_elimination_hard_regno): Same.
+ 	(lra_eliminate_regs_1): Same.
+ 	(eliminate_regs_in_insn): Same.
+ 	(update_reg_eliminate): Same.
+ 	(init_elimination): Same.
+ 	(lra_eliminate): Same.
+ 	* lra-int.h: Same.
+ 	* lra-lives.c (initiate_live_solver): Same.
+ 	* lra-remat.c (create_remat_bb_data): Same.
+ 	* lra-spills.c (lra_spill): Same.
+ 	* lra.c (lra_set_insn_recog_data): Same.
+ 	(lra_set_used_insn_alternative_by_uid): Same.
+ 	(init_reg_info): Same.
+ 	(expand_reg_info): Same.
+ 	* lto-cgraph.c (output_symtab): Same.
+ 	(read_identifier): Same.
+ 	(get_alias_symbol): Same.
+ 	(input_node): Same.
+ 	(input_varpool_node): Same.
+ 	(input_ref): Same.
+ 	(input_edge): Same.
+ 	(input_cgraph_1): Same.
+ 	(input_refs): Same.
+ 	(input_symtab): Same.
+ 	(input_offload_tables): Same.
+ 	(output_cgraph_opt_summary): Same.
+ 	(input_edge_opt_summary): Same.
+ 	(input_cgraph_opt_section): Same.
+ 	* lto-section-in.c (lto_free_raw_section_data): Same.
+ 	(lto_create_simple_input_block): Same.
+ 	(lto_free_function_in_decl_state_for_node): Same.
+ 	* lto-streamer-in.c (lto_tag_check_set): Same.
+ 	(lto_location_cache::revert_location_cache): Same.
+ 	(lto_location_cache::input_location): Same.
+ 	(lto_input_location): Same.
+ 	(stream_input_location_now): Same.
+ 	(lto_input_tree_ref): Same.
+ 	(lto_input_eh_catch_list): Same.
+ 	(input_eh_region): Same.
+ 	(lto_init_eh): Same.
+ 	(make_new_block): Same.
+ 	(input_cfg): Same.
+ 	(fixup_call_stmt_edges): Same.
+ 	(input_struct_function_base): Same.
+ 	(input_function): Same.
+ 	(lto_read_body_or_constructor): Same.
+ 	(lto_read_tree_1): Same.
+ 	(lto_read_tree): Same.
+ 	(lto_input_scc): Same.
+ 	(lto_input_tree_1): Same.
+ 	(lto_input_toplevel_asms): Same.
+ 	(lto_input_mode_table): Same.
+ 	(lto_reader_init): Same.
+ 	(lto_data_in_create): Same.
+ 	* lto-streamer-out.c (output_cfg): Same.
+ 	* lto-streamer.h: Same.
+ 	* modulo-sched.c (duplicate_insns_of_cycles): Same.
+ 	(generate_prolog_epilog): Same.
+ 	(mark_loop_unsched): Same.
+ 	(dump_insn_location): Same.
+ 	(loop_canon_p): Same.
+ 	(sms_schedule): Same.
+ 	* omp-expand.c (expand_omp_for_ordered_loops): Same.
+ 	(expand_omp_for_generic): Same.
+ 	(expand_omp_for_static_nochunk): Same.
+ 	(expand_omp_for_static_chunk): Same.
+ 	(expand_omp_simd): Same.
+ 	(expand_omp_taskloop_for_inner): Same.
+ 	(expand_oacc_for): Same.
+ 	(expand_omp_atomic_pipeline): Same.
+ 	(mark_loops_in_oacc_kernels_region): Same.
+ 	* omp-offload.c (oacc_xform_loop): Same.
+ 	* omp-simd-clone.c (simd_clone_adjust): Same.
+ 	* optabs-query.c (get_traditional_extraction_insn): Same.
+ 	* optabs.c (expand_vector_broadcast): Same.
+ 	(expand_binop_directly): Same.
+ 	(expand_twoval_unop): Same.
+ 	(expand_twoval_binop): Same.
+ 	(expand_unop_direct): Same.
+ 	(emit_indirect_jump): Same.
+ 	(emit_conditional_move): Same.
+ 	(emit_conditional_neg_or_complement): Same.
+ 	(emit_conditional_add): Same.
+ 	(vector_compare_rtx): Same.
+ 	(expand_vec_perm_1): Same.
+ 	(expand_vec_perm_const): Same.
+ 	(expand_vec_cond_expr): Same.
+ 	(expand_vec_series_expr): Same.
+ 	(maybe_emit_atomic_exchange): Same.
+ 	(maybe_emit_sync_lock_test_and_set): Same.
+ 	(expand_atomic_compare_and_swap): Same.
+ 	(expand_atomic_load): Same.
+ 	(expand_atomic_store): Same.
+ 	(maybe_emit_op): Same.
+ 	(valid_multiword_target_p): Same.
+ 	(create_integer_operand): Same.
+ 	(maybe_legitimize_operand_same_code): Same.
+ 	(maybe_legitimize_operand): Same.
+ 	(create_convert_operand_from_type): Same.
+ 	(can_reuse_operands_p): Same.
+ 	(maybe_legitimize_operands): Same.
+ 	(maybe_gen_insn): Same.
+ 	(maybe_expand_insn): Same.
+ 	(maybe_expand_jump_insn): Same.
+ 	(expand_insn): Same.
+ 	* optabs.h (create_expand_operand): Same.
+ 	(create_fixed_operand): Same.
+ 	(create_output_operand): Same.
+ 	(create_input_operand): Same.
+ 	(create_convert_operand_to): Same.
+ 	(create_convert_operand_from): Same.
+ 	* optinfo.h: Same.
+ 	* poly-int.h: Same.
+ 	* predict.c (optimize_insn_for_speed_p): Same.
+ 	(optimize_loop_for_size_p): Same.
+ 	(optimize_loop_for_speed_p): Same.
+ 	(optimize_loop_nest_for_speed_p): Same.
+ 	(get_base_value): Same.
+ 	(predicted_by_loop_heuristics_p): Same.
+ 	(predict_extra_loop_exits): Same.
+ 	(predict_loops): Same.
+ 	(predict_paths_for_bb): Same.
+ 	(predict_paths_leading_to): Same.
+ 	(propagate_freq): Same.
+ 	(pass_profile::execute): Same.
+ 	* predict.h: Same.
+ 	* profile-count.c (profile_count::differs_from_p): Same.
+ 	(profile_probability::differs_lot_from_p): Same.
+ 	* profile-count.h: Same.
+ 	* profile.c (branch_prob): Same.
+ 	* regrename.c (free_chain_data): Same.
+ 	(mark_conflict): Same.
+ 	(create_new_chain): Same.
+ 	(merge_overlapping_regs): Same.
+ 	(init_rename_info): Same.
+ 	(merge_chains): Same.
+ 	(regrename_analyze): Same.
+ 	(regrename_do_replace): Same.
+ 	(scan_rtx_reg): Same.
+ 	(record_out_operands): Same.
+ 	(build_def_use): Same.
+ 	* regrename.h: Same.
+ 	* reload.h: Same.
+ 	* reload1.c (init_reload): Same.
+ 	(maybe_fix_stack_asms): Same.
+ 	(copy_reloads): Same.
+ 	(count_pseudo): Same.
+ 	(count_spilled_pseudo): Same.
+ 	(find_reg): Same.
+ 	(find_reload_regs): Same.
+ 	(select_reload_regs): Same.
+ 	(spill_hard_reg): Same.
+ 	(fixup_eh_region_note): Same.
+ 	(set_reload_reg): Same.
+ 	(allocate_reload_reg): Same.
+ 	(compute_reload_subreg_offset): Same.
+ 	(reload_adjust_reg_for_icode): Same.
+ 	(emit_input_reload_insns): Same.
+ 	(emit_output_reload_insns): Same.
+ 	(do_input_reload): Same.
+ 	(inherit_piecemeal_p): Same.
+ 	* rtl.h: Same.
+ 	* sanopt.c (maybe_get_dominating_check): Same.
+ 	(maybe_optimize_ubsan_ptr_ifn): Same.
+ 	(can_remove_asan_check): Same.
+ 	(maybe_optimize_asan_check_ifn): Same.
+ 	(sanopt_optimize_walker): Same.
+ 	* sched-deps.c (add_dependence_list): Same.
+ 	(chain_to_prev_insn): Same.
+ 	(add_insn_mem_dependence): Same.
+ 	(create_insn_reg_set): Same.
+ 	(maybe_extend_reg_info_p): Same.
+ 	(sched_analyze_reg): Same.
+ 	(sched_analyze_1): Same.
+ 	(get_implicit_reg_pending_clobbers): Same.
+ 	(chain_to_prev_insn_p): Same.
+ 	(deps_analyze_insn): Same.
+ 	(deps_start_bb): Same.
+ 	(sched_free_deps): Same.
+ 	(init_deps): Same.
+ 	(init_deps_reg_last): Same.
+ 	(free_deps): Same.
+ 	* sched-ebb.c: Same.
+ 	* sched-int.h: Same.
+ 	* sched-rgn.c (add_branch_dependences): Same.
+ 	(concat_insn_mem_list): Same.
+ 	(deps_join): Same.
+ 	(sched_rgn_compute_dependencies): Same.
+ 	* sel-sched-ir.c (reset_target_context): Same.
+ 	(copy_deps_context): Same.
+ 	(init_id_from_df): Same.
+ 	(has_dependence_p): Same.
+ 	(change_loops_latches): Same.
+ 	(bb_top_order_comparator): Same.
+ 	(make_region_from_loop_preheader): Same.
+ 	(sel_init_pipelining): Same.
+ 	(get_loop_nest_for_rgn): Same.
+ 	(make_regions_from_the_rest): Same.
+ 	(sel_is_loop_preheader_p): Same.
+ 	* sel-sched-ir.h (inner_loop_header_p): Same.
+ 	(get_all_loop_exits): Same.
+ 	* selftest.h: Same.
+ 	* sese.c (sese_build_liveouts): Same.
+ 	(sese_insert_phis_for_liveouts): Same.
+ 	* sese.h (defined_in_sese_p): Same.
+ 	* sreal.c (sreal::stream_out): Same.
+ 	* sreal.h: Same.
+ 	* streamer-hooks.h: Same.
+ 	* target-globals.c (save_target_globals): Same.
+ 	* target-globals.h: Same.
+ 	* target.def: Same.
+ 	* target.h: Same.
+ 	* targhooks.c (default_has_ifunc_p): Same.
+ 	(default_empty_mask_is_expensive): Same.
+ 	(default_init_cost): Same.
+ 	* targhooks.h: Same.
+ 	* toplev.c: Same.
+ 	* tree-affine.c (aff_combination_mult): Same.
+ 	(aff_combination_expand): Same.
+ 	(aff_combination_constant_multiple_p): Same.
+ 	* tree-affine.h: Same.
+ 	* tree-cfg.c (build_gimple_cfg): Same.
+ 	(replace_loop_annotate_in_block): Same.
+ 	(replace_uses_by): Same.
+ 	(remove_bb): Same.
+ 	(dump_cfg_stats): Same.
+ 	(gimple_duplicate_sese_region): Same.
+ 	(gimple_duplicate_sese_tail): Same.
+ 	(move_block_to_fn): Same.
+ 	(replace_block_vars_by_duplicates): Same.
+ 	(move_sese_region_to_fn): Same.
+ 	(print_loops_bb): Same.
+ 	(print_loop): Same.
+ 	(print_loops): Same.
+ 	(debug): Same.
+ 	(debug_loops): Same.
+ 	* tree-cfg.h: Same.
+ 	* tree-chrec.c (chrec_fold_plus_poly_poly): Same.
+ 	(chrec_fold_multiply_poly_poly): Same.
+ 	(chrec_evaluate): Same.
+ 	(chrec_component_in_loop_num): Same.
+ 	(reset_evolution_in_loop): Same.
+ 	(is_multivariate_chrec): Same.
+ 	(chrec_contains_symbols): Same.
+ 	(nb_vars_in_chrec): Same.
+ 	(chrec_convert_1): Same.
+ 	(chrec_convert_aggressive): Same.
+ 	* tree-chrec.h: Same.
+ 	* tree-core.h: Same.
+ 	* tree-data-ref.c (dump_data_dependence_relation): Same.
+ 	(canonicalize_base_object_address): Same.
+ 	(data_ref_compare_tree): Same.
+ 	(prune_runtime_alias_test_list): Same.
+ 	(get_segment_min_max): Same.
+ 	(create_intersect_range_checks): Same.
+ 	(conflict_fn_no_dependence): Same.
+ 	(object_address_invariant_in_loop_p): Same.
+ 	(analyze_ziv_subscript): Same.
+ 	(analyze_siv_subscript_cst_affine): Same.
+ 	(analyze_miv_subscript): Same.
+ 	(analyze_overlapping_iterations): Same.
+ 	(build_classic_dist_vector_1): Same.
+ 	(add_other_self_distances): Same.
+ 	(same_access_functions): Same.
+ 	(build_classic_dir_vector): Same.
+ 	(subscript_dependence_tester_1): Same.
+ 	(subscript_dependence_tester): Same.
+ 	(access_functions_are_affine_or_constant_p): Same.
+ 	(get_references_in_stmt): Same.
+ 	(loop_nest_has_data_refs): Same.
+ 	(graphite_find_data_references_in_stmt): Same.
+ 	(find_data_references_in_bb): Same.
+ 	(get_base_for_alignment): Same.
+ 	(find_loop_nest_1): Same.
+ 	(find_loop_nest): Same.
+ 	* tree-data-ref.h (dr_alignment): Same.
+ 	(ddr_dependence_level): Same.
+ 	* tree-if-conv.c (fold_build_cond_expr): Same.
+ 	(add_to_predicate_list): Same.
+ 	(add_to_dst_predicate_list): Same.
+ 	(phi_convertible_by_degenerating_args): Same.
+ 	(idx_within_array_bound): Same.
+ 	(all_preds_critical_p): Same.
+ 	(pred_blocks_visited_p): Same.
+ 	(predicate_bbs): Same.
+ 	(build_region): Same.
+ 	(if_convertible_loop_p_1): Same.
+ 	(is_cond_scalar_reduction): Same.
+ 	(predicate_scalar_phi): Same.
+ 	(remove_conditions_and_labels): Same.
+ 	(combine_blocks): Same.
+ 	(version_loop_for_if_conversion): Same.
+ 	(versionable_outer_loop_p): Same.
+ 	(ifcvt_local_dce): Same.
+ 	(tree_if_conversion): Same.
+ 	(pass_if_conversion::gate): Same.
+ 	* tree-if-conv.h: Same.
+ 	* tree-inline.c (maybe_move_debug_stmts_to_successors): Same.
+ 	* tree-loop-distribution.c (bb_top_order_cmp): Same.
+ 	(free_rdg): Same.
+ 	(stmt_has_scalar_dependences_outside_loop): Same.
+ 	(copy_loop_before): Same.
+ 	(create_bb_after_loop): Same.
+ 	(const_with_all_bytes_same): Same.
+ 	(generate_memset_builtin): Same.
+ 	(generate_memcpy_builtin): Same.
+ 	(destroy_loop): Same.
+ 	(build_rdg_partition_for_vertex): Same.
+ 	(compute_access_range): Same.
+ 	(data_ref_segment_size): Same.
+ 	(latch_dominated_by_data_ref): Same.
+ 	(compute_alias_check_pairs): Same.
+ 	(fuse_memset_builtins): Same.
+ 	(finalize_partitions): Same.
+ 	(find_seed_stmts_for_distribution): Same.
+ 	(prepare_perfect_loop_nest): Same.
+ 	* tree-parloops.c (lambda_transform_legal_p): Same.
+ 	(loop_parallel_p): Same.
+ 	(reduc_stmt_res): Same.
+ 	(add_field_for_name): Same.
+ 	(create_call_for_reduction_1): Same.
+ 	(replace_uses_in_bb_by): Same.
+ 	(transform_to_exit_first_loop_alt): Same.
+ 	(try_transform_to_exit_first_loop_alt): Same.
+ 	(transform_to_exit_first_loop): Same.
+ 	(num_phis): Same.
+ 	(gen_parallel_loop): Same.
+ 	(gather_scalar_reductions): Same.
+ 	(get_omp_data_i_param): Same.
+ 	(try_create_reduction_list): Same.
+ 	(oacc_entry_exit_single_gang): Same.
+ 	(parallelize_loops): Same.
+ 	* tree-pass.h: Same.
+ 	* tree-predcom.c (determine_offset): Same.
+ 	(last_always_executed_block): Same.
+ 	(split_data_refs_to_components): Same.
+ 	(suitable_component_p): Same.
+ 	(valid_initializer_p): Same.
+ 	(find_looparound_phi): Same.
+ 	(insert_looparound_copy): Same.
+ 	(add_looparound_copies): Same.
+ 	(determine_roots_comp): Same.
+ 	(predcom_tmp_var): Same.
+ 	(initialize_root_vars): Same.
+ 	(initialize_root_vars_store_elim_1): Same.
+ 	(initialize_root_vars_store_elim_2): Same.
+ 	(finalize_eliminated_stores): Same.
+ 	(initialize_root_vars_lm): Same.
+ 	(remove_stmt): Same.
+ 	(determine_unroll_factor): Same.
+ 	(execute_pred_commoning_cbck): Same.
+ 	(base_names_in_chain_on): Same.
+ 	(combine_chains): Same.
+ 	(pcom_stmt_dominates_stmt_p): Same.
+ 	(try_combine_chains): Same.
+ 	(prepare_initializers_chain_store_elim): Same.
+ 	(prepare_initializers_chain): Same.
+ 	(prepare_initializers): Same.
+ 	(prepare_finalizers_chain): Same.
+ 	(prepare_finalizers): Same.
+ 	(insert_init_seqs): Same.
+ 	* tree-scalar-evolution.c (loop_phi_node_p): Same.
+ 	(compute_overall_effect_of_inner_loop): Same.
+ 	(add_to_evolution_1): Same.
+ 	(add_to_evolution): Same.
+ 	(follow_ssa_edge_binary): Same.
+ 	(follow_ssa_edge_expr): Same.
+ 	(backedge_phi_arg_p): Same.
+ 	(follow_ssa_edge_in_condition_phi_branch): Same.
+ 	(follow_ssa_edge_in_condition_phi): Same.
+ 	(follow_ssa_edge_inner_loop_phi): Same.
+ 	(follow_ssa_edge): Same.
+ 	(analyze_evolution_in_loop): Same.
+ 	(analyze_initial_condition): Same.
+ 	(interpret_loop_phi): Same.
+ 	(interpret_condition_phi): Same.
+ 	(interpret_rhs_expr): Same.
+ 	(interpret_expr): Same.
+ 	(interpret_gimple_assign): Same.
+ 	(analyze_scalar_evolution_1): Same.
+ 	(analyze_scalar_evolution): Same.
+ 	(analyze_scalar_evolution_for_address_of): Same.
+ 	(get_instantiated_value_entry): Same.
+ 	(loop_closed_phi_def): Same.
+ 	(instantiate_scev_name): Same.
+ 	(instantiate_scev_poly): Same.
+ 	(instantiate_scev_binary): Same.
+ 	(instantiate_scev_convert): Same.
+ 	(instantiate_scev_not): Same.
+ 	(instantiate_scev_r): Same.
+ 	(instantiate_scev): Same.
+ 	(resolve_mixers): Same.
+ 	(initialize_scalar_evolutions_analyzer): Same.
+ 	(scev_reset_htab): Same.
+ 	(scev_reset): Same.
+ 	(derive_simple_iv_with_niters): Same.
+ 	(simple_iv_with_niters): Same.
+ 	(expression_expensive_p): Same.
+ 	(final_value_replacement_loop): Same.
+ 	* tree-scalar-evolution.h (block_before_loop): Same.
+ 	* tree-ssa-address.h: Same.
+ 	* tree-ssa-dce.c (find_obviously_necessary_stmts): Same.
+ 	* tree-ssa-dom.c (edge_info::record_simple_equiv): Same.
+ 	(record_edge_info): Same.
+ 	* tree-ssa-live.c (var_map_base_fini): Same.
+ 	(remove_unused_locals): Same.
+ 	* tree-ssa-live.h: Same.
+ 	* tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Same.
+ 	(pass_ch_vect::execute): Same.
+ 	(pass_ch::process_loop_p): Same.
+ 	* tree-ssa-loop-im.c (mem_ref_hasher::hash): Same.
+ 	(movement_possibility): Same.
+ 	(outermost_invariant_loop): Same.
+ 	(stmt_cost): Same.
+ 	(determine_max_movement): Same.
+ 	(invariantness_dom_walker::before_dom_children): Same.
+ 	(move_computations): Same.
+ 	(may_move_till): Same.
+ 	(force_move_till_op): Same.
+ 	(force_move_till): Same.
+ 	(memref_free): Same.
+ 	(record_mem_ref_loc): Same.
+ 	(set_ref_stored_in_loop): Same.
+ 	(mark_ref_stored): Same.
+ 	(sort_bbs_in_loop_postorder_cmp): Same.
+ 	(sort_locs_in_loop_postorder_cmp): Same.
+ 	(analyze_memory_references): Same.
+ 	(mem_refs_may_alias_p): Same.
+ 	(find_ref_loc_in_loop_cmp): Same.
+ 	(rewrite_mem_ref_loc::operator): Same.
+ 	(first_mem_ref_loc_1::operator): Same.
+ 	(sm_set_flag_if_changed::operator): Same.
+ 	(execute_sm_if_changed_flag_set): Same.
+ 	(execute_sm): Same.
+ 	(hoist_memory_references): Same.
+ 	(ref_always_accessed::operator): Same.
+ 	(refs_independent_p): Same.
+ 	(record_dep_loop): Same.
+ 	(ref_indep_loop_p_1): Same.
+ 	(ref_indep_loop_p): Same.
+ 	(can_sm_ref_p): Same.
+ 	(find_refs_for_sm): Same.
+ 	(loop_suitable_for_sm): Same.
+ 	(store_motion_loop): Same.
+ 	(store_motion): Same.
+ 	(fill_always_executed_in): Same.
+ 	* tree-ssa-loop-ivcanon.c (constant_after_peeling): Same.
+ 	(estimated_unrolled_size): Same.
+ 	(loop_edge_to_cancel): Same.
+ 	(remove_exits_and_undefined_stmts): Same.
+ 	(remove_redundant_iv_tests): Same.
+ 	(unloop_loops): Same.
+ 	(estimated_peeled_sequence_size): Same.
+ 	(try_peel_loop): Same.
+ 	(canonicalize_loop_induction_variables): Same.
+ 	(canonicalize_induction_variables): Same.
+ 	* tree-ssa-loop-ivopts.c (iv_inv_expr_hasher::equal): Same.
+ 	(name_info): Same.
+ 	(stmt_after_inc_pos): Same.
+ 	(contains_abnormal_ssa_name_p): Same.
+ 	(niter_for_exit): Same.
+ 	(find_bivs): Same.
+ 	(mark_bivs): Same.
+ 	(find_givs_in_bb): Same.
+ 	(find_induction_variables): Same.
+ 	(find_interesting_uses_cond): Same.
+ 	(outermost_invariant_loop_for_expr): Same.
+ 	(idx_find_step): Same.
+ 	(add_candidate_1): Same.
+ 	(add_iv_candidate_derived_from_uses): Same.
+ 	(alloc_use_cost_map): Same.
+ 	(prepare_decl_rtl): Same.
+ 	(generic_predict_doloop_p): Same.
+ 	(computation_cost): Same.
+ 	(determine_common_wider_type): Same.
+ 	(get_computation_aff_1): Same.
+ 	(get_use_type): Same.
+ 	(determine_group_iv_cost_address): Same.
+ 	(iv_period): Same.
+ 	(difference_cannot_overflow_p): Same.
+ 	(may_eliminate_iv): Same.
+ 	(determine_set_costs): Same.
+ 	(cheaper_cost_pair): Same.
+ 	(compare_cost_pair): Same.
+ 	(iv_ca_cand_for_group): Same.
+ 	(iv_ca_recount_cost): Same.
+ 	(iv_ca_set_remove_invs): Same.
+ 	(iv_ca_set_no_cp): Same.
+ 	(iv_ca_set_add_invs): Same.
+ 	(iv_ca_set_cp): Same.
+ 	(iv_ca_add_group): Same.
+ 	(iv_ca_cost): Same.
+ 	(iv_ca_compare_deps): Same.
+ 	(iv_ca_delta_reverse): Same.
+ 	(iv_ca_delta_commit): Same.
+ 	(iv_ca_cand_used_p): Same.
+ 	(iv_ca_delta_free): Same.
+ 	(iv_ca_new): Same.
+ 	(iv_ca_free): Same.
+ 	(iv_ca_dump): Same.
+ 	(iv_ca_extend): Same.
+ 	(iv_ca_narrow): Same.
+ 	(iv_ca_prune): Same.
+ 	(cheaper_cost_with_cand): Same.
+ 	(iv_ca_replace): Same.
+ 	(try_add_cand_for): Same.
+ 	(get_initial_solution): Same.
+ 	(try_improve_iv_set): Same.
+ 	(find_optimal_iv_set_1): Same.
+ 	(create_new_iv): Same.
+ 	(rewrite_use_compare): Same.
+ 	(remove_unused_ivs): Same.
+ 	(determine_scaling_factor): Same.
+ 	* tree-ssa-loop-ivopts.h: Same.
+ 	* tree-ssa-loop-manip.c (create_iv): Same.
+ 	(compute_live_loop_exits): Same.
+ 	(add_exit_phi): Same.
+ 	(add_exit_phis): Same.
+ 	(find_uses_to_rename_use): Same.
+ 	(find_uses_to_rename_def): Same.
+ 	(find_uses_to_rename_in_loop): Same.
+ 	(rewrite_into_loop_closed_ssa): Same.
+ 	(check_loop_closed_ssa_bb): Same.
+ 	(split_loop_exit_edge): Same.
+ 	(ip_end_pos): Same.
+ 	(ip_normal_pos): Same.
+ 	(copy_phi_node_args): Same.
+ 	(gimple_duplicate_loop_to_header_edge): Same.
+ 	(can_unroll_loop_p): Same.
+ 	(determine_exit_conditions): Same.
+ 	(scale_dominated_blocks_in_loop): Same.
+ 	(niter_for_unrolled_loop): Same.
+ 	(tree_transform_and_unroll_loop): Same.
+ 	(rewrite_all_phi_nodes_with_iv): Same.
+ 	* tree-ssa-loop-manip.h: Same.
+ 	* tree-ssa-loop-niter.c (number_of_iterations_ne_max): Same.
+ 	(number_of_iterations_ne): Same.
+ 	(assert_no_overflow_lt): Same.
+ 	(assert_loop_rolls_lt): Same.
+ 	(number_of_iterations_lt): Same.
+ 	(adjust_cond_for_loop_until_wrap): Same.
+ 	(tree_simplify_using_condition): Same.
+ 	(simplify_using_initial_conditions): Same.
+ 	(simplify_using_outer_evolutions): Same.
+ 	(loop_only_exit_p): Same.
+ 	(ssa_defined_by_minus_one_stmt_p): Same.
+ 	(number_of_iterations_popcount): Same.
+ 	(number_of_iterations_exit): Same.
+ 	(find_loop_niter): Same.
+ 	(finite_loop_p): Same.
+ 	(chain_of_csts_start): Same.
+ 	(get_val_for): Same.
+ 	(loop_niter_by_eval): Same.
+ 	(derive_constant_upper_bound_ops): Same.
+ 	(do_warn_aggressive_loop_optimizations): Same.
+ 	(record_estimate): Same.
+ 	(get_cst_init_from_scev): Same.
+ 	(record_nonwrapping_iv): Same.
+ 	(idx_infer_loop_bounds): Same.
+ 	(infer_loop_bounds_from_ref): Same.
+ 	(infer_loop_bounds_from_array): Same.
+ 	(infer_loop_bounds_from_pointer_arith): Same.
+ 	(infer_loop_bounds_from_signedness): Same.
+ 	(bound_index): Same.
+ 	(discover_iteration_bound_by_body_walk): Same.
+ 	(maybe_lower_iteration_bound): Same.
+ 	(estimate_numbers_of_iterations): Same.
+ 	(estimated_loop_iterations): Same.
+ 	(estimated_loop_iterations_int): Same.
+ 	(max_loop_iterations): Same.
+ 	(max_loop_iterations_int): Same.
+ 	(likely_max_loop_iterations): Same.
+ 	(likely_max_loop_iterations_int): Same.
+ 	(estimated_stmt_executions_int): Same.
+ 	(max_stmt_executions): Same.
+ 	(likely_max_stmt_executions): Same.
+ 	(estimated_stmt_executions): Same.
+ 	(stmt_dominates_stmt_p): Same.
+ 	(nowrap_type_p): Same.
+ 	(loop_exits_before_overflow): Same.
+ 	(scev_var_range_cant_overflow): Same.
+ 	(scev_probably_wraps_p): Same.
+ 	(free_numbers_of_iterations_estimates): Same.
+ 	* tree-ssa-loop-niter.h: Same.
+ 	* tree-ssa-loop-prefetch.c (release_mem_refs): Same.
+ 	(idx_analyze_ref): Same.
+ 	(analyze_ref): Same.
+ 	(gather_memory_references_ref): Same.
+ 	(mark_nontemporal_store): Same.
+ 	(emit_mfence_after_loop): Same.
+ 	(may_use_storent_in_loop_p): Same.
+ 	(mark_nontemporal_stores): Same.
+ 	(should_unroll_loop_p): Same.
+ 	(volume_of_dist_vector): Same.
+ 	(add_subscript_strides): Same.
+ 	(self_reuse_distance): Same.
+ 	(insn_to_prefetch_ratio_too_small_p): Same.
+ 	* tree-ssa-loop-split.c (split_at_bb_p): Same.
+ 	(patch_loop_exit): Same.
+ 	(find_or_create_guard_phi): Same.
+ 	(easy_exit_values): Same.
+ 	(connect_loop_phis): Same.
+ 	(connect_loops): Same.
+ 	(compute_new_first_bound): Same.
+ 	(split_loop): Same.
+ 	(tree_ssa_split_loops): Same.
+ 	* tree-ssa-loop-unswitch.c (tree_ssa_unswitch_loops): Same.
+ 	(is_maybe_undefined): Same.
+ 	(tree_may_unswitch_on): Same.
+ 	(simplify_using_entry_checks): Same.
+ 	(tree_unswitch_single_loop): Same.
+ 	(tree_unswitch_loop): Same.
+ 	(tree_unswitch_outer_loop): Same.
+ 	(empty_bb_without_guard_p): Same.
+ 	(used_outside_loop_p): Same.
+ 	(get_vop_from_header): Same.
+ 	(hoist_guard): Same.
+ 	* tree-ssa-loop.c (gate_oacc_kernels): Same.
+ 	(get_lsm_tmp_name): Same.
+ 	* tree-ssa-loop.h: Same.
+ 	* tree-ssa-reassoc.c (add_repeat_to_ops_vec): Same.
+ 	(build_and_add_sum): Same.
+ 	(no_side_effect_bb): Same.
+ 	(get_ops): Same.
+ 	(linearize_expr): Same.
+ 	(should_break_up_subtract): Same.
+ 	(linearize_expr_tree): Same.
+ 	* tree-ssa-scopedtables.c: Same.
+ 	* tree-ssa-scopedtables.h: Same.
+ 	* tree-ssa-structalias.c (condense_visit): Same.
+ 	(label_visit): Same.
+ 	(dump_pred_graph): Same.
+ 	(perform_var_substitution): Same.
+ 	(move_complex_constraints): Same.
+ 	(remove_preds_and_fake_succs): Same.
+ 	* tree-ssa-threadupdate.c (dbds_continue_enumeration_p): Same.
+ 	(determine_bb_domination_status): Same.
+ 	(duplicate_thread_path): Same.
+ 	(thread_through_all_blocks): Same.
+ 	* tree-ssa-threadupdate.h: Same.
+ 	* tree-streamer-in.c (streamer_read_string_cst): Same.
+ 	(input_identifier): Same.
+ 	(unpack_ts_type_common_value_fields): Same.
+ 	(unpack_ts_block_value_fields): Same.
+ 	(unpack_ts_translation_unit_decl_value_fields): Same.
+ 	(unpack_ts_omp_clause_value_fields): Same.
+ 	(streamer_read_tree_bitfields): Same.
+ 	(streamer_alloc_tree): Same.
+ 	(lto_input_ts_common_tree_pointers): Same.
+ 	(lto_input_ts_vector_tree_pointers): Same.
+ 	(lto_input_ts_poly_tree_pointers): Same.
+ 	(lto_input_ts_complex_tree_pointers): Same.
+ 	(lto_input_ts_decl_minimal_tree_pointers): Same.
+ 	(lto_input_ts_decl_common_tree_pointers): Same.
+ 	(lto_input_ts_decl_non_common_tree_pointers): Same.
+ 	(lto_input_ts_decl_with_vis_tree_pointers): Same.
+ 	(lto_input_ts_field_decl_tree_pointers): Same.
+ 	(lto_input_ts_function_decl_tree_pointers): Same.
+ 	(lto_input_ts_type_common_tree_pointers): Same.
+ 	(lto_input_ts_type_non_common_tree_pointers): Same.
+ 	(lto_input_ts_list_tree_pointers): Same.
+ 	(lto_input_ts_vec_tree_pointers): Same.
+ 	(lto_input_ts_exp_tree_pointers): Same.
+ 	(lto_input_ts_block_tree_pointers): Same.
+ 	(lto_input_ts_binfo_tree_pointers): Same.
+ 	(lto_input_ts_constructor_tree_pointers): Same.
+ 	(lto_input_ts_omp_clause_tree_pointers): Same.
+ 	(streamer_read_tree_body): Same.
+ 	* tree-streamer.h: Same.
+ 	* tree-switch-conversion.c (bit_test_cluster::is_beneficial): Same.
+ 	* tree-vect-data-refs.c (vect_get_smallest_scalar_type): Same.
+ 	(vect_analyze_possibly_independent_ddr): Same.
+ 	(vect_analyze_data_ref_dependence): Same.
+ 	(vect_compute_data_ref_alignment): Same.
+ 	(vect_enhance_data_refs_alignment): Same.
+ 	(vect_analyze_data_ref_access): Same.
+ 	(vect_check_gather_scatter): Same.
+ 	(vect_find_stmt_data_reference): Same.
+ 	(vect_create_addr_base_for_vector_ref): Same.
+ 	(vect_setup_realignment): Same.
+ 	(vect_supportable_dr_alignment): Same.
+ 	* tree-vect-loop-manip.c (rename_variables_in_bb): Same.
+ 	(adjust_phi_and_debug_stmts): Same.
+ 	(vect_set_loop_mask): Same.
+ 	(add_preheader_seq): Same.
+ 	(vect_maybe_permute_loop_masks): Same.
+ 	(vect_set_loop_masks_directly): Same.
+ 	(vect_set_loop_condition_masked): Same.
+ 	(vect_set_loop_condition_unmasked): Same.
+ 	(slpeel_duplicate_current_defs_from_edges): Same.
+ 	(slpeel_add_loop_guard): Same.
+ 	(slpeel_can_duplicate_loop_p): Same.
+ 	(create_lcssa_for_virtual_phi): Same.
+ 	(iv_phi_p): Same.
+ 	(vect_update_ivs_after_vectorizer): Same.
+ 	(vect_gen_vector_loop_niters_mult_vf): Same.
+ 	(slpeel_update_phi_nodes_for_loops): Same.
+ 	(slpeel_update_phi_nodes_for_guard1): Same.
+ 	(find_guard_arg): Same.
+ 	(slpeel_update_phi_nodes_for_guard2): Same.
+ 	(slpeel_update_phi_nodes_for_lcssa): Same.
+ 	(vect_do_peeling): Same.
+ 	(vect_create_cond_for_alias_checks): Same.
+ 	(vect_loop_versioning): Same.
+ 	* tree-vect-loop.c (vect_determine_vf_for_stmt): Same.
+ 	(vect_inner_phi_in_double_reduction_p): Same.
+ 	(vect_analyze_scalar_cycles_1): Same.
+ 	(vect_fixup_scalar_cycles_with_patterns): Same.
+ 	(vect_get_loop_niters): Same.
+ 	(bb_in_loop_p): Same.
+ 	(vect_get_max_nscalars_per_iter): Same.
+ 	(vect_verify_full_masking): Same.
+ 	(vect_compute_single_scalar_iteration_cost): Same.
+ 	(vect_analyze_loop_form_1): Same.
+ 	(vect_analyze_loop_form): Same.
+ 	(vect_active_double_reduction_p): Same.
+ 	(vect_analyze_loop_operations): Same.
+ 	(neutral_op_for_slp_reduction): Same.
+ 	(vect_is_simple_reduction): Same.
+ 	(vect_model_reduction_cost): Same.
+ 	(get_initial_def_for_reduction): Same.
+ 	(get_initial_defs_for_reduction): Same.
+ 	(vect_create_epilog_for_reduction): Same.
+ 	(vectorize_fold_left_reduction): Same.
+ 	(vectorizable_reduction): Same.
+ 	(vectorizable_induction): Same.
+ 	(vectorizable_live_operation): Same.
+ 	(loop_niters_no_overflow): Same.
+ 	(vect_get_loop_mask): Same.
+ 	(vect_transform_loop_stmt): Same.
+ 	(vect_transform_loop): Same.
+ 	* tree-vect-patterns.c (vect_reassociating_reduction_p): Same.
+ 	(vect_determine_precisions): Same.
+ 	(vect_pattern_recog_1): Same.
+ 	* tree-vect-slp.c (vect_analyze_slp_instance): Same.
+ 	* tree-vect-stmts.c (stmt_vectype): Same.
+ 	(process_use): Same.
+ 	(vect_init_vector_1): Same.
+ 	(vect_truncate_gather_scatter_offset): Same.
+ 	(get_group_load_store_type): Same.
+ 	(vect_build_gather_load_calls): Same.
+ 	(vect_get_strided_load_store_ops): Same.
+ 	(vectorizable_simd_clone_call): Same.
+ 	(vectorizable_store): Same.
+ 	(permute_vec_elements): Same.
+ 	(vectorizable_load): Same.
+ 	(vect_transform_stmt): Same.
+ 	(supportable_widening_operation): Same.
+ 	* tree-vectorizer.c (vec_info::replace_stmt): Same.
+ 	(vec_info::free_stmt_vec_info): Same.
+ 	(vect_free_loop_info_assumptions): Same.
+ 	(vect_loop_vectorized_call): Same.
+ 	(set_uid_loop_bbs): Same.
+ 	(vectorize_loops): Same.
+ 	* tree-vectorizer.h (STMT_VINFO_BB_VINFO): Same.
+ 	* tree.c (add_tree_to_fld_list): Same.
+ 	(fld_type_variant_equal_p): Same.
+ 	(fld_decl_context): Same.
+ 	(fld_incomplete_type_of): Same.
+ 	(free_lang_data_in_binfo): Same.
+ 	(need_assembler_name_p): Same.
+ 	(find_decls_types_r): Same.
+ 	(get_eh_types_for_runtime): Same.
+ 	(find_decls_types_in_eh_region): Same.
+ 	(find_decls_types_in_node): Same.
+ 	(assign_assembler_name_if_needed): Same.
+ 	* value-prof.c (stream_out_histogram_value): Same.
+ 	* value-prof.h: Same.
+ 	* var-tracking.c (use_narrower_mode): Same.
+ 	(prepare_call_arguments): Same.
+ 	(vt_expand_loc_callback): Same.
+ 	(resolve_expansions_pending_recursion): Same.
+ 	(vt_expand_loc): Same.
+ 	* varasm.c (const_hash_1): Same.
+ 	(compare_constant): Same.
+ 	(tree_output_constant_def): Same.
+ 	(simplify_subtraction): Same.
+ 	(get_pool_constant): Same.
+ 	(output_constant_pool_2): Same.
+ 	(output_constant_pool_1): Same.
+ 	(mark_constants_in_pattern): Same.
+ 	(mark_constant_pool): Same.
+ 	(get_section_anchor): Same.
+ 	* vr-values.c (compare_range_with_value): Same.
+ 	(vr_values::extract_range_from_phi_node): Same.
+ 	* vr-values.h: Same.
+ 	* web.c (unionfind_union): Same.
+ 	* wide-int.h: Same.
+ 
+ 2019-07-09  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR c++/61339
+ 	* align.h: Change class-key from class to struct and vice versa
+ 	to match convention and avoid -Wclass-is-pod and -Wstruct-no-pod.
+ 	* alloc-pool.h: Same.
+ 	* asan.c (shadow_mem_size): Same.
+ 	* auto-profile.c: Same.
+ 	* basic-block.h: Same.
+ 	* bitmap.h: Same.
+ 	* cfgexpand.c (set_rtl): Same.
+ 	(expand_one_stack_var_at): Same.
+ 	* cfghooks.h: Same.
+ 	* cfgloop.h: Same.
+ 	* cgraph.h: Same.
+ 	* config/i386/i386.h: Same.
+ 	* df-problems.c (df_print_bb_index): Same.
+ 	* df-scan.c: Same.
+ 	* df.h (df_single_use): Same.
+ 	* diagnostic-show-locus.c (layout::print_annotation_line): Same.
+ 	(layout::annotation_line_showed_range_p): Same.
+ 	(get_printed_columns): Same.
+ 	(correction::ensure_terminated): Same.
+ 	(line_corrections::~line_corrections): Same.
+ 	* dojump.h: Same.
+ 	* dse.c: Same.
+ 	* dump-context.h: Same.
+ 	* dumpfile.h: Same.
+ 	* dwarf2out.c: Same.
+ 	* edit-context.c: Same.
+ 	* fibonacci_heap.c (test_union_of_equal_heaps): Same.
+ 	* flags.h: Same.
+ 	* function.c (assign_stack_local): Same.
+ 	* function.h: Same.
+ 	* gcc.c: Same.
+ 	* gcov.c (block_info::block_info): Same.
+ 	* genattrtab.c: Same.
+ 	* genextract.c: Same.
+ 	* genmatch.c (comparison_code_p): Same.
+ 	(id_base::id_base): Same.
+ 	(decision_tree::print): Same.
+ 	* genoutput.c: Same.
+ 	* genpreds.c (write_one_predicate_function): Same.
+ 	* genrecog.c (validate_pattern): Same.
+ 	(find_operand_positions): Same.
+ 	(optimize_subroutine_group): Same.
+ 	(merge_pattern_transition::merge_pattern_transition): Same.
+ 	(merge_pattern_info::merge_pattern_info): Same.
+ 	(merge_state_result::merge_state_result): Same.
+ 	(merge_into_state): Same.
+ 	* gensupport.c: Same.
+ 	* gensupport.h: Same.
+ 	* ggc-common.c (init_ggc_heuristics): Same.
+ 	* ggc-tests.c (test_union): Same.
+ 	* gimple-loop-interchange.cc (dump_induction): Same.
+ 	* gimple-loop-versioning.cc: Same.
+ 	* gimple-match.h (gimple_match_cond::any_else): Same.
+ 	* gimple-ssa-backprop.c: Same.
+ 	* gimple-ssa-sprintf.c: Same.
+ 	* gimple-ssa-store-merging.c (store_operand_info::store_operand_info):
+ 	Same.
+ 	(store_immediate_info::store_immediate_info): Same.
+ 	(merged_store_group::apply_stores): Same.
+ 	(get_location_for_stmts): Same.
+ 	* gimple-ssa-strength-reduction.c: Same.
+ 	* gimple-ssa-warn-alloca.c: Same.
+ 	* gimple-ssa-warn-restrict.c (pass_wrestrict::execute): Same.
+ 	* godump.c (go_type_decl): Same.
+ 	* hash-map-tests.c (test_map_of_strings_to_int): Same.
+ 	* hash-map.h: Same.
+ 	* hash-set-tests.c (test_set_of_strings): Same.
+ 	* hsa-brig.c: Same.
+ 	* hsa-common.h: Same.
+ 	* hsa-gen.c (transformable_switch_to_sbr_p): Same.
+ 	* input.c (assert_loceq): Same.
+ 	* input.h: Same.
+ 	* ipa-cp.c: Same.
+ 	* ipa-devirt.c (possible_polymorphic_call_targets_1): Same.
+ 	* ipa-fnsummary.h: Same.
+ 	* ipa-inline.h: Same.
+ 	* ipa-prop.h: Same.
+ 	* ipa-split.c (visit_bb): Same.
+ 	* ira-int.h (minmax_set_iter_next): Same.
+ 	* loop-invariant.c: Same.
+ 	* loop-iv.c: Same.
+ 	* lra-eliminations.c: Same.
+ 	* lra-int.h: Same.
+ 	* lra-lives.c (mark_regno_dead): Same.
+ 	* lra-remat.c: Same.
+ 	* lra-spills.c: Same.
+ 	* lto-streamer.h: Same.
+ 	* mem-stats.h: Same.
+ 	* omp-grid.c (omp_grid_lastprivate_predicate): Same.
+ 	* omp-low.c (omp_clause_aligned_alignment): Same.
+ 	* optabs-query.h (get_vcond_eq_icode): Same.
+ 	* optabs.h: Same.
+ 	* opts.c (wrap_help): Same.
+ 	* poly-int.h: Same.
+ 	* predict.c (predict_paths_leading_to_edge): Same.
+ 	* pretty-print.h: Same.
+ 	* profile-count.h: Same.
+ 	* read-md.h: Same.
+ 	* read-rtl-function.c: Same.
+ 	* ree.c: Same.
+ 	* reginfo.c: Same.
+ 	* regrename.c: Same.
+ 	* regrename.h: Same.
+ 	* reload.h: Same.
+ 	* rtl-iter.h: Same.
+ 	* rtl.h (costs_add_n_insns): Same.
+ 	* sanopt.c: Same.
+ 	* sched-int.h: Same.
+ 	* sel-sched-ir.h: Same.
+ 	* selftest.h: Same.
+ 	* sese.h (vec_find): Same.
+ 	* stmt.c: Same.
+ 	* target-globals.h: Same.
+ 	* tree-affine.c (aff_combination_find_elt): Same.
+ 	* tree-affine.h: Same.
+ 	* tree-data-ref.h: Same.
+ 	* tree-outof-ssa.c (ssa_is_replaceable_p): Same.
+ 	* tree-predcom.c: Same.
+ 	* tree-scalar-evolution.c (find_var_scev_info): Same.
+ 	* tree-ssa-alias.h: Same.
+ 	* tree-ssa-ccp.c: Same.
+ 	* tree-ssa-coalesce.c (ssa_conflicts_dump): Same.
+ 	* tree-ssa-loop-im.c (for_all_locs_in_loop): Same.
+ 	(rewrite_mem_refs): Same.
+ 	(execute_sm_if_changed): Same.
+ 	(hoist_memory_references): Same.
+ 	* tree-ssa-loop-ivopts.c (operator<=): Same.
+ 	* tree-ssa-loop.h: Same.
+ 	* tree-ssa-pre.c (get_or_alloc_expr_for_name): Same.
+ 	* tree-ssa-structalias.c: Same.
+ 	* tree-switch-conversion.h (cluster::cluster): Same.
+ 	(simple_cluster::simple_cluster): Same.
+ 	* tree-vect-patterns.c (type_conversion_p): Same.
+ 	* tree-vectorizer.c (dump_stmt_cost): Same.
+ 	* tree-vectorizer.h (loop_vec_info_for_loop): Same.
+ 	* tree.c (protected_set_expr_location): Same.
+ 	* tree.h (desired_pro_or_demotion_p): Same.
+ 	(fndecl_built_in_p): Same.
+ 	* unique-ptr-tests.cc: Same.
+ 	* var-tracking.c (delete_variable_part): Same.
+ 	* varasm.c (assemble_real): Same.
+ 	(tree_output_constant_def): Same.
+ 	* vec.c: Same.
+ 	* wide-int-bitmask.h: Same.
+ 	* wide-int.h (decompose): Same.
+ 
+ 2019-07-09  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91114
+ 	* tree-vect-data-refs.c (vect_analyze_data_refs): Failure to
+ 	find a vector type isn't fatal.
+ 
+ 2019-07-09  Sylvia Taylor  <sylvia.taylor@arm.com>
+ 
+ 	* config/aarch64/aarch64-simd.md
+ 	(aarch64_crypto_aes<aes_op>v16qi): Redefine pattern with xor.
+ 	(aarch64_crypto_aes<aesmc_op>v16qi): Remove attribute enabled.
+ 	(*aarch64_crypto_aes<aes_op>v16qi_xor_combine): Remove both.
+ 	(*aarch64_crypto_aese_fused,
+ 	*aarch64_crypto_aesd_fused): Update to new definition.
+ 	* config/aarch64/aarch64.c
+ 	(aarch_macro_fusion_pair_p): Remove aese/aesmc fusion check.
+ 
+ 2019-07-09  Richard Biener  <rguenther@suse.de>
+ 
+ 	* gimple-match.h (gimple_match_op::resimplify): New.
+ 	(gimple_resimplify1, gimple_resimplify2, gimple_resimplify3,
+ 	gimple_resimplify4, gimple_resimplify5): Remove.
+ 	* gimple-match-head.c (gimple_resimplify1, gimple_resimplify2,
+ 	gimple_resimplify3, gimple_resimplify4, gimple_resimplify5):
+ 	Make static.
+ 	(gimple_match_op::resimplify): New.
+ 	* tree-ssa-sccvn.c (vn_nary_build_or_lookup_1): Valueize
+ 	according to availability.  Use gimple_match_op::resimplify.
+ 
+ 2019-07-09  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* ira-emit.c (emit_moves): Skip DEBUG_INSNs when setting the location.
+ 
+ 2019-07-09  Sylvia Taylor  <sylvia.taylor@arm.com>
+ 
+ 	* config/arm/crypto.md:
+ 	(crypto_<crypto_pattern>): Redefine aese/aesd pattern with xor.
+ 	(crypto_<crypto_pattern>): Remove attribute enabled for aesmc.
+ 	(crypto_<crypto_pattern>): Split CRYPTO_BINARY into 2 patterns.
+ 	(*aarch32_crypto_aese_fused, *aarch32_crypto_aesd_fused): New.
+ 	* config/arm/arm.c
+ 	(aarch_macro_fusion_pair_p): Remove aes/aesmc fusion check.
+ 	* config/arm/aarch-common-protos.h
+ 	(aarch_crypto_can_dual_issue): Remove.
+ 	* config/arm/aarch-common.c
+ 	(aarch_crypto_can_dual_issue): Likewise.
+ 	* config/arm/exynos-m1.md: Remove aese/aesmc fusion.
+ 	* config/arm/cortex-a53.md: Likewise.
+ 	* config/arm/cortex-a57.md: Likewise.
+ 	* config/arm/iterators.md:
+ 	(CRYPTO_BINARY): Redefine.
+ 	(CRYPTO_UNARY): Removed.
+ 	(CRYPTO_AES, CRYPTO_AESMC): New.
+ 
+ 2019-07-09  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (struct vn_walk_cb_data): Add orig_ref member.
+ 	(vn_reference_lookup_3): If the main ref has no access path recorded
+ 	but orig_ref has use it to do access-path based disambiguation.
+ 	(vn_reference_lookup_pieces): Adjust.
+ 	(vn_reference_lookup): Pass down original ref if we valueized.
+ 
+ 2019-07-09  Martin Liska  <mliska@suse.cz>
+ 
+ 	* doc/extend.texi: Document influence on loop
+ 	optimizers.
+ 
+ 2019-07-09  Martin Liska  <mliska@suse.cz>
+ 
+ 	* lto-compress.c (lto_normalized_zstd_level): Do not use
+ 	ZSTD_CLEVEL_DEFAULT as it is not default in old releases
+ 	of libzstd.  One can use 0 as a default compression level.
+ 
+ 2019-07-09  Martin Liska  <mliska@suse.cz>
+ 
+ 	* doc/invoke.texi: Add link from -fprofile-dir option.
+ 	Use better wording for 'gcno filename'.
+ 
+ 2019-07-08  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/71924
+ 	PR middle-end/90549
+ 	* gimple-ssa-isolate-paths.c (isolate_path): Add attribute.  Update
+ 	comment.
+ 	(args_loc_t): New type.
+ 	(args_loc_t, locmap_t): same.
+ 	(diag_returned_locals): New function.
+ 	(is_addr_local): Same.
+ 	(handle_return_addr_local_phi_arg, warn_return_addr_local): Same.
+ 	(find_implicit_erroneous_behavior): Call warn_return_addr_local_phi_arg.
+ 	(find_explicit_erroneous_behavior): Call warn_return_addr_local.
+ 
+ 2019-07-08  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree-vect-stmts.c (scan_operand_equal_p): Look through MEM_REF
+ 	with SSA_NAME address of POINTER_PLUS_EXPR.  Handle MULT_EXPR
+ 	and casts in offset when different, both through gimple stmts
+ 	and through trees.  Rewritten using loops to minimize code duplication
+ 	for each operand.
+ 
+ 2019-07-08  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* emit-rtl.c (set_insn_locations): New function moved from...
+ 	* function.c (set_insn_locations): ...here.
+ 	* ira-emit.c (emit_moves): Propagate location of the first instruction
+ 	to the inserted move instructions.
+ 	* reg-stack.c (compensate_edge): Set the location if the sequence is
+ 	inserted on the edge.
+ 	* rtl.h (set_insn_locations): Declare.
+ 
+ 2019-07-08  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_machine_from_flags): Ignore
+ 	OPTION_MASK_PPC_GFXOPT and OPTION_MASK_PPC_GPOPT for selecting the
+ 	.machine string.
+ 
+ 2019-07-08  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR rtl-optimization/88233
+ 	* common.opt (fsplit-wide-types-early): New option.
+ 	* common/config/rs6000/rs6000-common.c
+ 	(rs6000_option_optimization_table): Add OPT_fsplit_wide_types_early for
+ 	OPT_LEVELS_ALL.
+ 	* doc/invoke.texi (Optimization Options): Add -fsplit-wide-types-early.
+ 	* lower-subreg.c (pass_lower_subreg2::gate): Add test for
+ 	flag_split_wide_types_early.
+ 	(pass_data_lower_subreg3): New.
+ 	(pass_lower_subreg3): New.
+ 	(make_pass_lower_subreg3): New.
+ 	* passes.def (pass_lower_subreg2): Move after the loop passes.
+ 	(pass_lower_subreg3): New, inserted where pass_lower_subreg2 was.
+ 	* tree-pass.h (make_pass_lower_subreg2): Move up, to its new place in
+ 	the pass pipeline; its previous place is taken by ...
+ 	(make_pass_lower_subreg3): ... this.
+ 
+ 2019-07-08  Robin Dapp  <rdapp@linux.ibm.com>
+ 
+ 	* config/s390/s390.c (s390_shift_truncation_mask): Define.
+ 	(TARGET_SHIFT_TRUNCATION_MASK): Define.
+ 
+ 2019-07-08  Robin Dapp  <rdapp@linux.ibm.com>
+ 
+ 	* config/s390/constraints.md: Add new jsc constraint.
+ 	* config/s390/predicates.md: New predicates.
+ 	* config/s390/s390-protos.h (s390_valid_shift_count): New function.
+ 	* config/s390/s390.c (s390_valid_shift_count): New function.
+ 	(print_shift_count_operand): Use s390_valid_shift_count.
+ 	(print_operand): Likewise.
+ 	* config/s390/s390.md: Use new predicate.
+ 	* config/s390/subst.md: Remove addr_style_op and masked_op substs.
+ 	* config/s390/vector.md: Use new predicate.
+ 
+ 2019-07-08  Andrew Waterman  <andrew@sifive.com>
+ 	    Jim Wilson  <jimw@sifive.com>
+ 
+ 	* config/riscv/riscv.md (lshrsi3_zero_extend_3+1): Use operands[1]
+ 	bitsize	instead of BITS_PER_WORD.
+ 
+ 2019-07-08  Martin Liska  <mliska@suse.cz>
+ 
+ 	* collect2.c (defined): Revert to before r254460.
+ 	(scan_prog_file): Revert to before r254460.
+ 
+ 2019-07-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/83518
+ 	* tree-ssa-sccvn.c: Include splay-tree.h.
+ 	(struct pd_range, struct pd_data): New.
+ 	(struct vn_walk_cb_data): Add data to track partial definitions.
+ 	(vn_walk_cb_data::~vn_walk_cb_data): New.
+ 	(vn_walk_cb_data::push_partial_def): New.
+ 	(pd_tree_alloc, pd_tree_dealloc, pd_range_compare): New.
+ 	(vn_reference_lookup_2): When partial defs are registered give up.
+ 	(vn_reference_lookup_3): Track partial defs for memset and
+ 	constructor zeroing and for defs from constants.
+ 
+ 2019-07-08  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* doc/install.texi (bootstrap-Og): Document.
+ 
+ 2019-07-08  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/riscv/pic.md (*local_pic_load_s<mode>)
+ 	(*local_pic_load_u<mode>): Explicitly specify the mode iterator
+ 	referenced by <mode>, giving...
+ 	(*local_pic_load_s<SUBX:mode>, *local_pic_load_u<SUBX:mode>): ...these.
+ 	* config/riscv/riscv.md (*sge<u>_<X:mode><GPR:mode>)
+ 	(*slt<u>_<X:mode><GPR:mode>, *sle<u>_<X:mode><GPR:mode>): Explicitly
+ 	use <X:MODE> for the mode attribute.
+ 
+ 2019-07-07  Jeff Law  <law@redhat.com>
+ 
+ 	PR tree-optimization/91090
+ 	* tree-ssa-dom.c (simplify_stmt_for_jump_threading): Fix logic error
+ 	in handling of ranges to simplify switch statements.
+ 
+ 2019-07-07  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (darwin_override_options): Make a final check on PIC
+ 	options.
+ 
+ 2019-07-07  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (darwin_override_options): Don't jam symbol stubs
+ 	on for kernel code.
+ 
+ 2019-07-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR target/91068
+ 	* config/mips/mips.md (*mul_acc_si, *mul_acc_si_r3900, *macc)
+ 	(*msac, *msac_using_macc, *mul_sub_si): Use "l" for input operands
+ 	instead of matching them to "l" output operands.
+ 
+ 2019-07-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/mips/mips.c (mips_split_move): Zero-initialize addr
+ 	and check whether addr.reg is nonnull before using it.
+ 
+ 2019-07-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* omp-low.c (lower_rec_input_clauses): For lastprivate clauses in
+ 	ctx->for_simd_scan_phase simd copy the outer var to the privatized
+ 	variable(s).  For conditional lastprivate look through outer
+ 	GIMPLE_OMP_SCAN context.
+ 	(lower_omp_1): For conditional lastprivate look through outer
+ 	GIMPLE_OMP_SCAN context.
+ 
+ 	* omp-low.c (struct omp_context): Rename combined_into_simd_safelen0
+ 	member to combined_into_simd_safelen1.
+ 	(lower_rec_input_clauses, lower_omp_1): Adjust uses.
+ 	(lower_lastprivate_clauses): Likewise.  For conditional lastprivate
+ 	clauses if ctx->combined_into_simd_safelen1 put statements after the
+ 	predicate conditionalized block rather than into it.
+ 
+ 2019-07-06  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/s390/s390.md (*negabs<FP:mode>2_nocc): Use FP for
+ 	operand 1.
+ 	* config/s390/vx-builtins.md (*vec_cmp<insn_cmp><mode>_cconly):
+ 	Make the choice of <mode> explicit, giving...
+ 	(*vec_cmp<insn_cmp><VF_HW:mode>_cconly): ...this.
+ 
+ 2019-07-06  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/i386/i386.md (*fop_<X87MODEF:mode>_3_i387)
+ 	(l<rounding_insn><MODEF:mode><SWI48:mode>2): Fix ambiguous uses
+ 	of .md attributes.
+ 	* config/i386/sse.md (*avx512pf_gatherpf<mode>sf_mask)
+ 	(*avx512pf_gatherpf<mode>df_mask, *avx512pf_scatterpf<mode>sf_mask)
+ 	(*avx512pf_scatterpf<mode>df_mask, *avx2_gathersi<mode>)
+ 	(*avx2_gathersi<mode>_2, *avx2_gatherdi<mode>)
+ 	(*avx2_gatherdi<mode>_2, *avx2_gatherdi<mode>_3): Likewise.
+ 	(*avx2_gatherdi<mode>_4, *avx512f_gathersi<mode>): Likewise.
+ 	(*avx512f_gathersi<mode>_2, *avx512f_gatherdi<mode>): Likewise.
+ 	(*avx512f_gatherdi<mode>_2, *avx512f_scattersi<mode>): Likewise.
+ 	(*avx512f_scatterdi<mode>): Likewise.
+ 	(*andnot<mode>3_bcst): Fix VI/VI48_AVX512VL typo.
+ 
+ 2019-07-06  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/h8300/h8300.md (*push1_h8300hs_<mode>): Explicitly
+ 	specify the mode iterator referenced by <mode>, giving...
+ 	(*push1_h8300hs_<QHI:mode>): ...this.
+ 
+ 2019-07-06  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/gcn/gcn-valu.md
+ 	(vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>): Use
+ 	gen_vec_cmp<VEC_1REG_ALT:mode>di rather than (implicitly)
+ 	gen_vec_cmp<VEC_1REG_MODE:mode>di.  Explicitly use
+ 	gen_vcond_mask_<VEC_1REG_MODE:mode>di.
+ 	(vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Likewise,
+ 	but using the _exec comparison patterns.
+ 	(vcondu<VEC_1REG_INT_MODE:mode><VEC_1REG_INT_ALT:mode>): Use
+ 	gen_vec_cmp<VEC_1REG_INT_ALT:mode>di rather than (implicitly)
+ 	gen_vec_cmp<VEC_1REG_INT_MODE:mode>di.  Explicitly use
+ 	gen_vcond_mask_<VEC_1REG_INT_MODE:mode>di.
+ 	(vcondu<VEC_1REG_INT_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Likewise,
+ 	but using the _exec comparison patterns.
+ 
+ 2019-07-06  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/arm/sync.md
+ 	(@atomic_compare_and_swap<CCSI:arch><NARROW:mode>_1): Use
+ 	<NARROW:sync_predtab> instead of (implicitly) <CCSI:sync_predtab>.
+ 	(@atomic_compare_and_swap<CCSI:arch><SIDI:mode>_1): Likewise use
+ 	<SIDI:sync_predtab>.  Use <SIDI:cas_cmp_operand> and
+ 	<SIDI:cas_cmp_str>.
+ 
+ 2019-07-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* omp-low.c (struct omp_context): Add for_simd_scan_phase member.
+ 	(maybe_lookup_ctx): Add forward declaration.
+ 	(omp_find_scan): Likewise.  Walk into body of simd if composited
+ 	with worksharing loop.
+ 	(scan_omp_simd_scan): New function.
+ 	(scan_omp_1_stmt): Call it.
+ 	(lower_rec_simd_input_clauses): Don't create rvar nor rvar2 if
+ 	ctx->for_simd_scan_phase.
+ 	(lower_rec_input_clauses): Do much less work for inscan reductions
+ 	in ctx->for_simd_scan_phase is_simd regions.
+ 	(lower_omp_scan): Set is_simd also on simd constructs composited
+ 	with worksharing loop, unless ctx->for_simd_scan_phase.  Never emit
+ 	a sorry message.  Don't change GIMPLE_OMP_SCAN stmts into nops and
+ 	emit their body after in simd constructs composited with worksharing
+ 	loop.
+ 	(lower_omp_for_scan): Handle worksharing loop composited with simd.
+ 
+ 	* omp-low.c (omp_find_scan): Make static.
+ 	(lower_omp_for_scan): Fix order of merge arguments in input phase of
+ 	the second loop, var2 represents the first partial sum and so needs
+ 	to go before rprivb[ivar].
+ 
+ 2019-07-05  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/rs6000-logue.c: Remove unused code.
+ 
+ 2019-07-05  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* tree-ssa-loop-manip.c (create_iv): Add missing guard for gsi_end_p.
+ 
+ 2019-07-05  Sam Tebbs  <sam.tebbs@arm.com>
+ 
+ 	PR target/90712
+ 	* config/aarch64/aarch64.c (aarch64_post_cfi_startproc): Replace thunk
+ 	check with a frame laid out check.
+ 
+ 2019-07-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Valueize RHS
+ 	when comparing against a store with possibly the same value.
+ 
+ 2019-07-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91091
+ 	* tree-ssa-alias.h (get_continuation_for_phi): Add tbaa_p parameter.
+ 	(walk_non_aliased_vuses): Likewise.
+ 	* tree-ssa-alias.c (maybe_skip_until): Pass down tbaa_p.
+ 	(get_continuation_for_phi): New tbaa_p parameter and pass
+ 	it down.
+ 	(walk_non_aliased_vuses): Likewise.
+ 	* ipa-prop.c (determine_known_aggregate_parts): Adjust.
+ 	* tree-ssa-pre.c (translate_vuse_through_block): Likewise.
+ 	* tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
+ 	Likewise.
+ 	* tree-ssa-sccvn.c (struct vn_walk_cb_data): Add tbaa_p flag.
+ 	(adjust_offsets_for_equal_base_address): New function.
+ 	(vn_reference_lookup_3): Use it to catch more base equivalences.
+ 	Handle and pass down tbaa_p flag.
+ 	(vn_reference_lookup_pieces): Adjust.
+ 	(vn_reference_lookup): Remove alias-set altering, instead pass
+ 	down false as tbaa_p.
+ 
+ 2019-07-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91091
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Overlap of
+ 	accesses can happen with -fno-strict-aliasing.
+ 
+ 2019-07-05  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (alias_stats): Add
+ 	nonoverlapping_component_refs_since_match_p_must_overlap.
+ 	(dump_alias_stats): Print it.
+ 	(nonoverlapping_component_refs_since_match_p): Add early exit.
+ 	(nonoverlapping_component_refs_p): Do not account early exit.
+ 
+ 2019-07-05  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* except.c (emit_to_new_bb_before): Make sure to put a location on SEQ.
+ 	* tree-eh.c (replace_goto_queue_1) <GIMPLE_GOTO>: Propagate location.
+ 	(emit_eh_dispatch): Delete.
+ 	(lower_catch): Emit the eh_dispatch manually and set the location of
+ 	the first catch statement onto it.
+ 	(lower_eh_filter): Emit the eh_dispatch manually and set location.
+ 	(lower_eh_dispatch): Propagate location.
+ 	* tree-outof-ssa.c (set_location_for_edge): Handle EH edges specially.
+ 	(eliminate_build): Likewise.
+ 
+ 2019-07-05  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* tree-cfg.c (gimple_make_forwarder_block): Propagate location info on
+ 	phi nodes if possible.
+ 	* tree-scalar-evolution.c (final_value_replacement_loop): Propagate
+ 	location info on the newly created statement.
+ 	* tree-ssa-loop-manip.c (create_iv): Propagate location info on the
+ 	newly created increment if needed.
+ 
+ 2019-07-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/78884
+ 	* gimplify.c (struct gimplify_omp_ctx): Add add_safelen1 member.
+ 	(gimplify_bind_expr): If seeing TREE_ADDRESSABLE VLA inside of simd
+ 	loop body, set ctx->add_safelen1 instead of making it GOVD_PRIVATE.
+ 	(gimplify_adjust_omp_clauses): Add safelen (1) clause if
+ 	ctx->add_safelen1 is set.
+ 
+ 	* omp-expand.c (expand_omp_for_static_nochunk): Don't emit
+ 	GOMP_loop_start at the start of second worksharing loop in a scan.
+ 	For nowait, don't emit GOMP_loop_end_nowait at the end of first
+ 	worksharing loop in a scan even if there are conditional lastprivates,
+ 	and do emit GOMP_loop_end_nowait at the end of second worksharing loop.
+ 
+ 2019-07-04  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* tree-ssa-alias.c (nonoverlapping_component_refs_since_match_p):
+ 	Fix check for match in the ref walk.
+ 
+ 2019-07-04  Martin Liska  <mliska@suse.cz>
+ 
+ 	* tree-ssa-loop-niter.c
+ 	(get_upper_bound_based_on_builtin_expr_with_prob): New function.
+ 	(estimate_numbers_of_iterations):
+ 	Support __builtin_expect_with_probability for analysis
+ 	of # of loop iterations.
+ 
+ 2019-07-04  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	* doc/generic.texi (Cleanups): Document EH_ELSE_EXPR.
+ 	* except.c: Likewise.
+ 	* expr.c (expand_expr_real_1): Reject it.
+ 	* gimplify.c (gimplify_expr): Gimplify it, within
+ 	TRY_FINALLY_EXPR.
+ 	* tree-dump.c (dequeue_and_dump): Dump it.
+ 	* tree-pretty-print.c (dump_generic_node): Likewise.
+ 	* tree.c (block_may_fallthru): Handle it.
+ 	* tree.def (EH_ELSE_EXPR): Introduce it.
+ 	* gimple-pretty-print.c (dump_gimple_try): Dump TRY_FINALLY
+ 	with GIMPLE_EH_ELSE as try/finally/else.
+ 
+ 2019-07-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR ipa/91062
+ 	* tree-pass.h (execute_all_ipa_transforms): Add a flag
+ 	parameter whether to disable GC collection.
+ 	* passes.c (execute_one_ipa_transform_pass): Likewise, and
+ 	honor it.
+ 	(execute_all_ipa_transforms): Likewise and pass it down.
+ 	* cgraph.c (cgraph_node::get_body): Do not invoke garbage
+ 	collection from applying IPA transforms.
+ 	* cgraphunit.c (cgraph_node::expand): Allow garbage collection
+ 	from applying IPA transforms.
+ 
+ 2019-07-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90911
+ 	* tree-vectorizer.h (_loop_vec_info::scalar_loop_scaling): New field.
+ 	(LOOP_VINFO_SCALAR_LOOP_SCALING): new.
+ 	* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
+ 	scalar_loop_scaling.
+ 	(vect_transform_loop): Scale scalar loop profile if needed.
+ 	* tree-vect-loop-manip.c (vect_loop_versioning): When re-using
+ 	the loop copy from if-conversion adjust edge probabilities
+ 	and scale the vectorized loop body profile, queue the scalar
+ 	profile for updating after peeling.
+ 
+ 2019-07-04  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* tree-ssa-alias.c (decl_refs_may_alias_p): Add size1 and size2
+ 	parameters; return early for must-alias.
+ 	(indirect_ref_may_alias_decl_p): Likewise; when establishing
+ 	outer types match, try nonoverlapping_component_refs
+ 	if must-alias is not obvious.
+ 	(indirect_refs_may_alias_p): Likewise.
+ 	(refs_may_alias_p_2): Likewise.
+ 
+ 2019-07-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.h (vn_reference_lookup): Add last_vuse_ptr
+ 	argument.
+ 	* tree-ssa-sccvn.c (last_vuse_ptr, vn_walk_kind): Move
+ 	globals into...
+ 	(struct vn_walk_cb_data): New callback data struct.
+ 	(vn_reference_lookup_2): Adjust.
+ 	(vn_reference_lookup_3): Likewise.
+ 	(vn_reference_lookup_pieces): Likewise.
+ 	(vn_reference_lookup): Likewise, get last_vuse_ptr argument.
+ 	(visit_reference_op_load): Adjust.
+ 
+ 2019-07-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/91063
+ 	* tree-vect-stmts.c (vect_init_vector): Call gsi_remove to remove
+ 	stmt from stmts sequence before calling vect_init_vector_1.
+ 	Formatting fix.
+ 
+ 2019-07-04  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	PR target/88833
+ 	* fwprop.c (reg_single_def_p): New function.
+ 	(propagate_rtx_1): Add unconditional else inside RTX_EXTRA case.
+ 	(forward_propagate_into): New parameter reg_prop_only
+ 	with default value false.
+ 	Propagate def's src into loop only if SET_SRC and SET_DEST
+ 	of def_set have single definitions.
+ 	Likewise if reg_prop_only is set to true.
+ 	(fwprop): New param fwprop_addr_p.
+ 	Integrate fwprop_addr into fwprop.
+ 	(fwprop_addr): Remove.
+ 	(pass_rtl_fwprop_addr::execute): Call fwprop with arg set
+ 	to true.
+ 	(pass_rtl_fwprop::execute): Call fwprop with arg set to false.
+ 	* simplify-rtx.c (simplify_subreg): Add case for vector comparison.
+ 	* config/i386/sse.md (UNSPEC_BLENDV): Adjust pattern.
+ 
+ 2019-07-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* omp-low.c (lower_omp_scan): Call lower_omp on stmt's body
+ 	in worksharing loop scans.
+ 
+ 	PR tree-optimization/91074
+ 	* omp-low.c (lower_omp_for_scan): Set DECL_GIMPLE_REG_P on cplx
+ 	temporary.
+ 
+ 	PR rtl-optimization/90756
+ 	* explow.c (promote_ssa_mode): Always use TYPE_MODE, don't bypass it
+ 	for VECTOR_TYPE_P.
+ 
+ 2019-07-03  Dennis Zhang  <dennis.zhang@arm.com>
+ 
+ 	* config/aarch64/aarch64.md: Remove redundant constraints from
+ 	define_expand but keep some patterns untouched if they are
+ 	specially selected by TARGET_SECONDARY_RELOAD hook.
+ 	* config/aarch64/aarch64-sve.md: Likewise.
+ 	* config/aarch64/atomics.md: Remove redundant constraints from
+ 	define_expand.
+ 	* config/aarch64/aarch64-simd.md: Likewise.
+ 
+ 2019-07-03  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.h (DRIVER_SELF_SPECS): Remove the linker cases.
+ 	(RDYNAMIC): Rename to, DARWIN_RDYNAMIC.
+ 	(DARWIN_PIE_SPEC, DARWIN_NOPIE_SPEC): Adjust to remove the Xlinker
+ 	clauses.
+ 	(LINK_COMMAND_SPEC_A): Add DARWIN_RDYNAMIC, DARWIN_PIE_SPEC and
+ 	DARWIN_NOPIE_SPEC.
+ 
+ 2019-07-03  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.h (REAL_LIBGCC_SPEC): Adjust for earlier Darwin.
+ 	(STARTFILE_SPEC): Split crt3 into a separate spec.
+ 	(DARWIN_EXTRA_SPECS): Add crt2 and crt3 spec.
+ 	(DARWIN_CRT2_SPEC): New.
+ 	(DARWIN_CRT3_SPEC): New.
+ 	(MIN_LD64_OMIT_STUBS): Revise to 62.1.
+ 	* config/rs6000/darwin.h (DARWIN_CRT2_SPEC): Revise conditions.
+ 	(DARWIN_CRT3_SPEC): New.
+ 
+ 2019-07-03  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/altivec.md (altivec_mov<mode>, VM2 iterator):
+ 	Change the RTL attribute "length" from "4" to "*" to allow the
+ 	length attribute to be adjusted automatically for prefixed load,
+ 	store, and add immediate instructions.
+ 	* config/rs6000/rs6000.md (extendhi<mode>2, EXTHI iterator):
+ 	Likewise.
+ 	(extendsi<mode>2, EXTSI iterator): Likewise.
+ 	(movsi_internal1): Likewise.
+ 	(movsi_from_sf): Likewise.
+ 	(movdi_from_sf_zero_ext): Likewise.
+ 	(mov<mode>_internal): Likewise.
+ 	(movcc_internal1, QHI iterator): Likewise.
+ 	(mov<mode>_softfloat, FMOVE32 iterator): Likewise.
+ 	(movsf_from_si): Likewise.
+ 	(mov<mode>_hardfloat32, FMOVE64 iterator): Likewise.
+ 	(mov<mode>_softfloat64, FMOVE64 iterator): Likewise.
+ 	(mov<mode>, FMOVE128 iterator): Likewise.
+ 	(movdi_internal64): Likewise.
+ 	* config/rs6000/vsx.md (vsx_le_permute_<mode>, VSX_TI iterator):
+ 	Likewise.
+ 	(vsx_le_undo_permute_<mode>, VSX_TI iterator): Likewise.
+ 	(vsx_mov<mode>_64bit, VSX_M iterator): Likewise.
+ 	(vsx_mov<mode>_32bit, VSX_M iterator): Likewise.
+ 	(vsx_splat_v4sf): Likewise.
+ 
+ 2019-07-03  Mark Wielaard  <mark@klomp.org>
+ 
+ 	PR debug/90981
+ 	* dwarf2out.c (add_top_level_skeleton_die_attrs): Only add
+ 	DW_AT_addr_base if there is actually a .debug_addr section with
+ 	addresses.
+ 	(output_addr_table): Add DWARF5 table header generation here after
+ 	checking there are actually any addresses from...
+ 	(dwarf2out_finish): ...here.
+ 
+ 2019-07-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/91069
+ 	* match.pd (vec_perm -> bit_insert): Fix element read from
+ 	first vector.
+ 
+ 2019-07-03  Martin Liska  <mliska@suse.cz>
+ 
+ 	* dbgcnt.def (DEBUG_COUNTER): Add match debug counter.
+ 	* genmatch.c (dt_simplify::gen_1): Generate dbgcnt
+ 	condition.
+ 	* generic-match-head.c: Include dbgcnt.h.
+ 	* gimple-match-head.c: Likewise.
+ 
+ 2019-07-03  Martin Liska  <mliska@suse.cz>
+ 
+ 	* gcov-counter.def (GCOV_COUNTER_V_SINGLE): Remove.
+ 	(GCOV_COUNTER_V_TOPN): New.
+ 	(GCOV_COUNTER_V_INDIR): Use _topn.
+ 	* gcov-io.h (GCOV_DISK_SINGLE_VALUES): Remove.
+ 	(GCOV_TOPN_VALUES): New.
+ 	(GCOV_SINGLE_VALUE_COUNTERS): Remove.
+ 	(GCOV_TOPN_VALUES_COUNTERS): New.
+ 	* profile.c (instrument_values): Use HIST_TYPE_TOPN_VALUES.
+ 	* tree-profile.c:
+ 	(gimple_init_gcov_profiler): Rename variables from one_value
+ 	to topn_values.
+ 	(gimple_gen_one_value_profiler): Remove.
+ 	(gimple_gen_topn_values_profiler): New function.
+ 	* value-prof.c (dump_histogram_value): Use TOPN_VALUES
+ 	names instead of SINGLE_VALUE.
+ 	(stream_out_histogram_value): Likewise.
+ 	(stream_in_histogram_value): Likewise.
+ 	(get_most_common_single_value): Likewise.
+ 	(gimple_divmod_fixed_value_transform): Likewise.
+ 	(gimple_stringops_transform): Likewise.
+ 	(gimple_divmod_values_to_profile): Likewise.
+ 	(gimple_stringops_values_to_profile): Likewise.
+ 	(gimple_find_values_to_profile): Likewise.
+ 	* value-prof.h (enum hist_type): Rename to TOPN.
+ 	(gimple_gen_one_value_profiler): Remove.
+ 	(gimple_gen_topn_values_profiler): New.
+ 
+ 2019-07-03  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* dwarf2out.c (add_scalar_info): Add back refererence to existing DIE
+ 	if it has the DW_AT_data_member_location attribute.
+ 
+ 2019-07-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	* gimple-pretty-print.c (dump_ternary_rhs): Fix BIT_INSERT_EXPR
+ 	dumping.
+ 
+ 2019-07-03  Sylvia Taylor  <sylvia.taylor@arm.com>
+ 
+ 	* config/aarch64/aarch64.md (FP_REGNUM): New constant.
+ 	(tlsdesc_small_advsimd_<mode>): Add use of FP_REGNUM.
+ 	(tlsdesc_small_sve_<mode>): Likewise.
+ 
+ 2019-07-03  Martin Liska  <mliska@suse.cz>
+ 
+ 	* Makefile.in: Define ZSTD_LIB.
+ 	* common.opt: Adjust compression level
+ 	to support also zstd levels.
+ 	* config.in: Regenerate.
+ 	* configure: Likewise.
+ 	* configure.ac: Add --with-zstd and --with-zstd-include options
+ 	and detect ZSTD.
+ 	* doc/install.texi: Mention zstd dependency.
+ 	* gcc.c: Print supported LTO compression algorithms.
+ 	* lto-compress.c (lto_normalized_zstd_level): Likewise.
+ 	(lto_compression_zstd): Likewise.
+ 	(lto_uncompression_zstd): Likewise.
+ 	(lto_end_compression): Dispatch in between zlib and zstd.
+ 	(lto_compression_zlib): Mark with ATTRIBUTE_UNUSED.
+ 	(lto_uncompression_zlib): Make it static.
+ 	* lto-compress.h (lto_end_uncompression): Fix GNU coding style.
+ 	* lto-section-in.c (lto_get_section_data): Pass info
+ 	about used compression.
+ 	* lto-streamer-out.c: By default use zstd when possible.
+ 	* timevar.def (TV_IPA_LTO_DECOMPRESS): Rename to decompression
+ 	(TV_IPA_LTO_COMPRESS): Likewise for compression.
+ 
+ 2019-07-03  Martin Liska  <mliska@suse.cz>
+ 
+ 	* lto-section-in.c (lto_get_section_data): Add "lto" section.
+ 	* lto-section-out.c (lto_destroy_simple_output_block): Never
+ 	compress LTO_section_lto section.
+ 	* lto-streamer-out.c (produce_asm): Do not set major_version
+ 	and minor_version.
+ 	(lto_output_toplevel_asms): Likewise.
+ 	(produce_lto_section): New function.
+ 	(lto_output): Call produce_lto_section.
+ 	(lto_write_mode_table): Do not set major_version and
+ 	minor_version.
+ 	(produce_asm_for_decls): Likewise.
+ 	* lto-streamer.h (enum lto_section_type): Add LTO_section_lto
+ 	type.
+ 	(struct lto_header): Remove.
+ 	(struct lto_section): New struct.
+ 	(struct lto_simple_header): Do not inherit from lto_header.
+ 	(struct lto_file_decl_data): Add lto_section_header field.
+ 
+ 2019-07-03  Martin Liska  <mliska@suse.cz>
+ 
+ 	* lra-eliminations.c (eliminate_regs_in_insn): Remove
+ 	dead assignemts.
+ 	* reg-stack.c (check_asm_stack_operands): Likewise.
+ 	* tree-ssa-structalias.c (create_function_info_for): Likewise.
+ 	* tree-vect-generic.c (expand_vector_operations_1): Likewise.
+ 	* config/i386/i386-expand.c (ix86_expand_sse2_mulvxdi3): Use
+ 	force_expand_binop.
+ 
+ 2019-07-03  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/90892
+ 	* builtins.c (inline_expand_builtin_string_cmp): Handle '\0'
+ 	in string constants.
+ 
+ 2019-07-03  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR middle-end/90899
+ 	* multiple_target.c (create_dispatcher_calls): Add to comdat
+ 	group only if set for ifunc.
+ 
+ 2019-07-03  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR target/88056
+ 	* config/i386/host-mingw32.c (mingw32_gt_pch_use_address):
+ 	Define local_object_name in outer scope in order to handle
+ 	use-after-scope issue.
+ 
+ 2019-07-03  Martin Liska  <mliska@suse.cz>
+ 
+ 	* common.opt: Add fprofile-note.
+ 	* coverage.c (coverage_init): Append the option
+ 	to bbg_file_name.
+ 	* doc/invoke.texi: Document -fprofile-note.
+ 
+ 2019-07-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/91033
+ 	* tree-vectorizer.h (vect_mark_stmts_to_be_vectorized,
+ 	vect_analyze_data_refs): Add bool * arguments.
+ 	* tree-vect-data-refs.c (vect_analyze_data_refs): Add fatal argument,
+ 	if failure is due to scatter/gather, set *fatal to false if non-NULL.
+ 	* tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized): Likewise.
+ 	* tree-vect-loop.c (vect_analyze_loop_2): Adjust
+ 	vect_mark_stmts_to_be_vectorized and vect_analyze_data_refs callers.
+ 	* tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust
+ 	vect_analyze_data_refs caller.
+ 
+ 	* tree-core.h (enum omp_clause_code): Add OMP_CLAUSE__SCANTEMP_
+ 	clause.
+ 	* tree.h (OMP_CLAUSE_DECL): Use OMP_CLAUSE__SCANTEMP_ instead of
+ 	OMP_CLAUSE__CONDTEMP_ as range's upper bound.
+ 	(OMP_CLAUSE__SCANTEMP__ALLOC, OMP_CLAUSE__SCANTEMP__CONTROL): Define.
+ 	* tree.c (omp_clause_num_ops, omp_clause_code_name): Add
+ 	OMP_CLAUSE__SCANTEMP_ entry.
+ 	(walk_tree_1): Handle OMP_CLAUSE__SCANTEMP_.
+ 	* tree-pretty-print.c (dump_omp_clause): Likewise.
+ 	* tree-nested.c (convert_nonlocal_omp_clauses,
+ 	convert_local_omp_clauses): Likewise.
+ 	* omp-general.h (struct omp_for_data): Add have_scantemp and
+ 	have_nonctrl_scantemp members.
+ 	* omp-general.c (omp_extract_for_data): Initialize them.
+ 	* omp-low.c (struct omp_context): Add scan_exclusive member.
+ 	(scan_omp_1_stmt): Don't unnecessarily mask gimple_omp_for_kind
+ 	result again with GF_OMP_FOR_KIND_MASK.  Initialize also
+ 	ctx->scan_exclusive.
+ 	(lower_rec_simd_input_clauses): Use ctx->scan_exclusive instead
+ 	of !ctx->scan_inclusive.
+ 	(lower_rec_input_clauses): Simplify gimplification of dtors using
+ 	gimplify_and_add.  For non-is_simd test OMP_CLAUSE_REDUCTION_INSCAN
+ 	rather than rvarp.  Handle OMP_CLAUSE_REDUCTION_INSCAN in worksharing
+ 	loops.  Don't add barrier for reduction_omp_orig_ref if
+ 	ctx->scan_??xclusive.
+ 	(lower_reduction_clauses): Don't do anything for ctx->scan_??xclusive.
+ 	(lower_omp_scan): Use ctx->scan_exclusive instead
+ 	of !ctx->scan_inclusive.  Handle worksharing loops with inscan
+ 	reductions.  Use new_vard != new_var instead of repeated
+ 	omp_is_reference calls.
+ 	(omp_find_scan, lower_omp_for_scan): New functions.
+ 	(lower_omp_for): Call lower_omp_for_scan for worksharing loops with
+ 	inscan reductions.
+ 	* omp-expand.c (expand_omp_scantemp_alloc): New function.
+ 	(expand_omp_for_static_nochunk): Handle fd->have_nonctrl_scantemp
+ 	and fd->have_scantemp.
+ 
+ 	* gimplify.c (gimplify_scan_omp_clauses): For inscan reductions
+ 	on worksharing loop propagate it as shared clause to containing
+ 	combined parallel.
+ 
+ 	* omp-expand.c (expand_omp_for_static_nochunk,
+ 	expand_omp_for_static_chunk): For nowait worksharing loop with
+ 	conditional lastprivate clause(s), emit GOMP_loop_end_nowait call
+ 	at the end.
+ 
+ 2019-07-02  qing zhao  <qing.zhao@oracle.com>
+ 
+ 	PR preprocessor/90581
+ 	* doc/cppopts.texi: Add document for -fmax-include-depth.
+ 	* doc/invoke.texi (Preprocessor Options): List -fmax-include-depth.
+ 
+ 2019-07-02  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/mmx.md (mmx_pack<s_trunsuffix>swb):
+ 	Use TARGET_SSE2 && SSE_REGNO_P in split condition.
+ 	(mmx_packssdw): Ditto.
+ 	(mmx_punpckhbw): Ditto.
+ 	(mmx_punpcklbw): Ditto.
+ 	(mmx_punpckhwd): Ditto.
+ 	(mmx_punpcklwd): Ditto.
+ 	(mmx_punpckhdq): Ditto.
+ 	(mmx_punpckldq): Ditto.
+ 	(*vec_dupv4hi): Ditto.
+ 	(*vec_dupv2si): Ditto.
+ 	(mmx_pmovmskb): Ditto.
+ 	* config/i386/sse.md (sse_cvtpi2ps): Use
+ 	TARGET_SSE2 && SSE_REG_P in split condition.
+ 	(ssse3_ph<plusminus_mnemonic>wv4hi3): Use
+ 	TARGET_SSSE3 && SSE_REGNO_P in split condition.
+ 	(ssse3_ph<plusminus_mnemonic>dv2si3): Ditto.
+ 	(ssse3_pshufbv8qi3): Ditto.
+ 	(ssse3_palignrdi): Ditto.
+ 
+ 2019-07-02  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn.md (movdi_symbol_save_scc): Convert to define_insn
+ 	with inlined save and restore.
+ 
+ 2019-07-02  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* cfgexpand.c (pass_expand::execute): Deal specially with instructions
+ 	to be inserted on single successor edge of the entry block.  Then call
+ 	commit_edge_insertions instead of inserting the instructions manually.
+ 	* cfgrtl.c (commit_edge_insertions): Do not verify flow info during
+ 	RTL expansion and rebuild jump labels chain.
+ 
+ 2019-07-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-core.h (enum tree_index): Add TI_CHREC_DONT_KNOW and
+ 	TI_CHREC_KNOWN.
+ 	* tree.h (chrec_not_analyzed_yet, chrec_dont_know, chrec_known):
+ 	Define here.
+ 	* tree.c (build_common_tree_nodes): Initialize them.
+ 	* tree-chrec.h (chrec_not_analyzed_yet, chrec_dont_know, chrec_known):
+ 	Make declarations comments.
+ 	* tree-scalar-evolution.c (chrec_not_analyzed_yet, chrec_dont_know,
+ 	chrec_known): Remove definitions.
+ 	(initialize_scalar_evolutions_analyzer): Remove.
+ 	(scev_initialize): Do not call initialize_scalar_evolutions_analyzer.
+ 	* tree-streamer.c (preload_common_nodes): Do not preload
+ 	TI_CHREC_DONT_KNOW or TI_CHREC_KNOWN.
+ 
+ 2019-07-02  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* tree-ssa-alias.c (aliasing_component_refs_p): Remove forgotten
+ 	sanity check.
+ 
+ 2019-07-02  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* tree-ssa-alias.c (nonoverlapping_component_refs_for_decl_p): Rename
+ 	to ..
+ 	(nonoverlapping_component_refs_since_match_p): ... this one;
+ 	handle also non-decl bases; return -1 if search gave up.
+ 	(alias_stats): Rename nonoverlapping_component_refs_of_decl_p_may_alias,
+ 	nonoverlapping_component_refs_of_decl_p_no_alias to
+ 	nonoverlapping_component_refs_since_match_p_may_alias,
+ 	nonoverlapping_component_refs_since_match_p_no_alias.
+ 	(dump_alias_stats): Update dumping.
+ 	(aliasing_matching_component_refs_p): Break out from ...;
+ 	dispatch to nonoverlapping_component_refs_for_decl_p
+ 	and nonoverlapping_component_refs_since_match_p.
+ 	(aliasing_component_refs_p): ... here; call
+ 	nonoverlapping_component_refs_p in scenarios where we can not
+ 	precisely determine base match.
+ 	(decl_refs_may_alias_p): Use
+ 	nonoverlapping_component_refs_since_match_p.
+ 	(indirect_ref_may_alias_decl_p): Do not call
+ 	nonoverlapping_component_refs_p.
+ 	(indirect_refs_may_alias_p): Likewise.
+ 
+ 2019-07-02  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* tree-inline.c (remap_gimple_stmt): Do not subtitute handled components
+ 	to clobber of return value.
+ 
+ 2019-07-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/cortex-a57.md (cortex_a57_neon_type): Use neon_arith_basic
+ 	for is_neon_type instructions that have not already been categorized.
+ 
+ 2019-07-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/58483
+ 	* tree-ssa-scopedtables.c (avail_expr_hash): Use OEP_ADDRESS_OF
+ 	for MEM_REF base hashing.
+ 	(equal_mem_array_ref_p): Likewise for base comparison.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (signbit<mode>2_dm): Make this a
+ 	parameterized name.
+ 	(signbit<mode>2): Use that name.  Simplify.
+ 
+ 2019-07-01  Joern Rennecke  <joern.rennecke@riscy-ip.com>
+ 
+ 	PR middle-end/66726
+ 	* tree-ssa-phiopt.c (factor_out_conditional_conversion):
+ 	Tune heuristic from PR71016 to allow MIN / MAX.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (ieee_128bit_vsx_abs<mode>2): Make this a
+ 	parameterized name.
+ 	(abs<mode>2): Use that name.  Simplify.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (ieee_128bit_vsx_neg<mode>2): Make this a
+ 	parameterized name.
+ 	(neg<mode>2): Use that name.  Simplify.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (abs<mode>2_hw): Make this a parameterized
+ 	name.
+ 	(abs<mode>2): Use that name.  Simplify.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (neg<mode>2_hw): Make this a parameterized
+ 	name.
+ 	(neg<mode>2): Use that name.  Simplify.
+ 
+ 2019-07-01  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md ("isa" attribute): Add sse_noavx.
+ 	("enabled" attribute): Handle sse_noavx isa attribute.
+ 	* config/i386/mmx.md (*vec_dupv2sf): Add "isa" attribute.
+ 	Use TARGET_SSE && SSE_REGNO_P in split condition.
+ 	(*vec_dupv2sf): Ditto.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (extenddf<mode>2): Make this a parameterized
+ 	name.
+ 	(floatsi<mode>2): Use that name.  Simplify.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (extenddf<mode>2_fprs): Make this a
+ 	parameterized name.
+ 	(extenddf<mode>2_vsx): Make this a parameterized name.
+ 	(extenddf<mode>2): Use those names.  Simplify.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (eh_set_lr_<mode>): Make this a parameterized
+ 	name.
+ 	(eh_return): Use that name.  Simplify.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (ctr<mode>): Make this a parameterized name.
+ 	(doloop_end): Use that name.  Simplify.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (indirect_jump<mode>_nospec): Make this a
+ 	parameterized name.
+ 	(indirect_jump): Use that name.  Simplify.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (abs<mode>2_internal): Make this a
+ 	parameterized name.
+ 	(abs<mode>2): Use that name.  Simplify.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (fix_trunc<mode>si2_fprs): Make this a
+ 	parameterized name.
+ 	(fix_trunc<mode>si2): Use that name.  Simplify.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (neg<mode>2): Make this a parameterized name.
+ 	(allocate_stack): Use that name.  Simplify.
+ 
+ 2019-07-01  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/90923
+ 	* hash-map.h (hash_map::put): On insertion invoke element ctor.
+ 	(hash_map::get_or_insert): Same.  Reformat comment.
+ 	* hash-set.h (hash_set::add): On insertion invoke element ctor.
+ 	* hash-map-tests.c (test_map_of_type_with_ctor_and_dtor): New.
+ 	* hash-set-tests.c (test_map_of_type_with_ctor_and_dtor): New.
+ 	* hash-table.h (hash_table::operator=): Prevent copy assignment.
+ 	 (hash_table::hash_table (const hash_table&)): Use copy ctor
+ 	 instead of assignment to copy elements.
+ 
+ 2019-07-01  Wilco Dijkstra  <wdijkstr@arm.com>
+ 	    John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	PR target/90963
+ 	* config/pa/pa.md (builtin_longjmp): Restore hard_frame_pointer_rtx
+ 	using saved frame pointer.
+ 
+ 2019-07-01  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR middle-end/64242
+ 	* config/sparc/sparc.md (nonlocal_goto): Restore frame pointer last.
+ 	Add frame clobber and schedule blockage.
+ 
+ 2019-07-01  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	* doc/invoke.texi (Link Options): Further editorial changes to
+ 	-flinker-output docs.
+ 
+ 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_force_indexed_or_indirect_mem):
+ 	Load both operands of a PLUS into registers separately.
+ 
+ 2019-07-01  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/vector.md: Fix shift count operand printing.
+ 
+ 2019-07-01  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* ira-lives.c (process_bb_node_lives): Use ira_setup_alts.
+ 
+ 2019-07-01  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* ira.c (ira_get_dup_out_num): Don't punt for earlyclobbers.
+ 	Use recog_data to test for an output operand.
+ 
+ 2019-07-01  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* ira.c (ira_setup_alts): If any valid alternatives have zero cost,
+ 	exclude any others that are disparaged or that are bound to need
+ 	a reload or spill.
+ 	(ira_get_dup_out_num): Expand comment.
+ 
+ 2019-07-01  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* ira.c (ira_setup_alts): Use preprocess_constraints to get the
+ 	constraint string for each operand/alternative combo.  Only handle
+ 	'%' at the start of constraint strings, and look for it outside
+ 	the main loop.
+ 
+ 2019-07-01  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* ira-int.h (ira_setup_alts, ira_get_dup_out_num): Use
+ 	alternative_mask instead of HARD_REG_SET to represent a
+ 	bitmask of alternatives.
+ 	* ira.c (ira_setup_alts, ira_get_dup_out_num): Likewise.
+ 	* ira-conflicts.c (add_insn_allocno_copies): Likewise.
+ 
+ 2019-07-01  Martin Liska  <mliska@suse.cz>
+ 
+ 	* edit-context.c (test_applying_fixits_unreadable_file): Do not
+ 	use () for a constructor call.
+ 	(test_applying_fixits_line_out_of_range): Likewise.
+ 	* ggc-page.c (alloc_page): Use (void *) for %p printf format
+ 	argument.
+ 	(free_page): Likewise.
+ 
+ 2019-07-01  Vladislav Ivanishin  <vlad@ispras.ru>
+ 
+ 	* gdbhooks.py (GdbPrettyPrinters.add_printer_for_types): Reorder
+ 	parameter names to match usage (no functional change).
+ 	(GdbPrettyPrinters.add_printer_for_regex): Ditto.
+ 
+ 2019-07-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (class pass_fre): Add may_iterate
+ 	pass parameter.
+ 	(pass_fre::execute): Honor it.
+ 	* passes.def: Adjust pass_fre invocations to allow iterating,
+ 	add non-iterating pass_fre before late threading/dom.
+ 
+ 2019-07-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (copy_reference_ops_from_ref): Adjust
+ 	TARGET_MEM_REF handling to also handle address-taken ones.
+ 
+ 2019-07-01  Hongtao Liu  <hongtao.liu@intel.com>
+ 
+ 	* doc/sourcebuild.texi (Effective-Target Keywords, Other
+ 	hardware attributes): Document avx512vp2intersect.
+ 
+ 2019-06-30  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/sse.md (ssse3_abs<mode>2): Rename from abs<mode>2.
+ 	(abs<mode>2): New expander.
+ 	* config/i386/i386-builtin.def (__builtin_ia32_pabsb):
+ 	Use CODE_FOR_ssse3_absv8qi2.
+ 	(__builtin_ia32_pabsw): Use CODE_FOR_ssse3_absv4hi2.
+ 	(__builtin_ia32_pabsd): Use CODE_FOR_ssse3_absv2si2.
+ 
+ 2019-06-30  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (mmx_isa): Rename x64, x64_noavx and x64_avx
+ 	to sse, sse_noavx and avx.  Update all uses.
+ 
+ 2019-06-30  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/mmx.md (sse_movntq): Add "isa" attribute.
+ 	(*mmx_<plusminus_insn><mode>3): Ditto.
+ 	(*mmx_mulv4hi3"): Ditto.
+ 	(*mmx_smulv4hi3_highpart): Ditto.
+ 	(*mmx_umulv4hi3_highpart): Ditto.
+ 	(*mmx_pmaddwd): Ditto.
+ 	(*sse2_umulv1siv1di3): Ditto.
+ 	(*mmx_<code>v4hi3): Ditto.
+ 	(*mmx_<code>v8qi3): Ditto.
+ 	(mmx_ashr<mode>3): Ditto.
+ 	("mmx_<shift_insn><mode>3): Ditto.
+ 	(*mmx_eq<mode>3): Ditto.
+ 	(mmx_gt<mode>3): Ditto.
+ 	(mmx_andnot<mode>3): Ditto.
+ 	(*mmx_<code><mode>3): Ditto.
+ 	(*mmx_pinsrw): Ditto.
+ 	(*mmx_pextrw): Ditto.
+ 	(mmx_pshufw_1): Ditto.
+ 	(*mmx_uavgv8qi3): Ditto.
+ 	(*mmx_uavgv4hi3): Ditto.
+ 	("mmx_psadbw): Ditto.
+ 	* config/i386/sse.md (sse_cvtps2pi): Ditto.
+ 	(sse_cvttps2pi): Ditto.
+ 	(ssse3_pmaddubsw): Ditto.
+ 	(*ssse3_pmulhrswv4hi3): Ditto.
+ 	(ssse3_psign<mode>3): Ditto.
+ 
+ 2019-06-29  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* expr.c (expand_expr_real_1) <BIT_FIELD_REF>: Apply the big-endian
+ 	adjustment for bit-fields to all aggregate types.
+ 
+ 2019-06-28   Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/predicates.md (pcrel_address): Use
+ 	SYMBOL_REF_LOCAL_P to determine if a label is local.
+ 	(pcrel_external_address): New predicate.
+ 	(non_prefixed_mem_operand): Delete, predicate not used.
+ 	* config/rs6000/rs6000.h (SYMBOL_FLAG_PCREL_P): Delete, we now use
+ 	SYMBOL_REF_LOCAL_P to determine if we can use pc-relative
+ 	addressing.
+ 	(SYMBOL_REF_PCREL_P): Likewise.
+ 
+ 	PR target/91009
+ 	* config/rs6000/rs6000.md (floatsi<mode>2_lfiwax): Add non-VSX
+ 	alternative.
+ 	(floatsi<mode>2_lfiwax_mem): Add non-VSX alternative.
+ 	(floatunssi<mode>2_lfiwzx): Add non-VSX alternative.
+ 	(floatunssi<mode>2_lfiwzx_mem): Add non-VSX alternative.
+ 
+ 2019-06-28  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config.gcc (powerpc-*-darwin*, powerpc64-*-darwin*): Remove
+ 	override on extra_headers.
+ 
+ 2019-06-28  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin-c.c (pop_field_alignment): Quote #pragma options.
+ 	* config/darwin-driver.c (darwin_default_min_version): Remove newline
+ 	from warning.
+ 	(darwin_driver_init): Likewise.
+ 
+ 2019-06-28  Jan Beulich  <jbeulich@suse.com>
+ 
+ 	* config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
+ 	vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
+ 	Eliminate redundant alternative.
+ 
+ 2019-06-28  Jan Beulich  <jbeulich@suse.com>
+ 
+ 	* config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
+ 	vgf2p8affineqb_<mode><mask_name>): Drop % constraint modifier.
+ 	Use vector_operand.
+ 
+ 2019-06-28  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.c (arc_rtx_costs): All short instructions are
+ 	having a lower cost regardless of the speed option.
+ 
+ 2019-06-28  Jan Beulich  <jbeulich@suse.com>
+ 
+ 	* config/i386/sse.md (sse2_cvtpd2pi, sse2_cvttpd2pi): Use
+ 	vector_operand plus, on both alternatives, "Bm" constraint.
+ 
+ 2019-06-28  Dennis Zhang  <dennis.zhang@arm.com>
+ 
+ 	* config/arm/arm.md: Remove redundant constraints from
+ 	define_expand but leave reload_inm and reload_outm patterns
+ 	untouched since they need special constraints to work.
+ 	* config/arm/arm-fixed.md: Remove redundant constraints from
+ 	define_expand.
+ 	* config/arm/iwmmxt.md: Likewise.
+ 	* config/arm/neon.md: Likewise.
+ 	* config/arm/sync.md: Likewise.
+ 	* config/arm/thumb1.md: Likewise.
+ 	* config/arm/vec-common.md: Likewise.
+ 
+ 2019-06-27  Ilia Diachkov  <ilia.diachkov@optimitech.com>
+ 
+ 	* doc/install.texi: Document --disable-tm-clone-registry.
+ 
+ 2019-06-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/91024
+ 	* gimplify.c (collect_fallthrough_labels): Ignore GIMPLE_PREDICT
+ 	statements.
+ 
+ 	PR tree-optimization/91010
+ 	* tree-vect-stmts.c (scan_operand_equal_p): If offset1 == offset2,
+ 	return true.  Otherwise, don't call operand_equal_p if offset1 or
+ 	offset2 is NULL and just return false.
+ 
+ 2019-06-27  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/rs6000.c (darwin_rs6000_override_options): Honour
+ 	user-specified float mode choice for kernel mode code.
+ 
+ 2019-06-27  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/darwin.h (ENDFILE_SPEC): Correct whitespace in the
+ 	spec.
+ 
+ 2019-06-27  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/rs6000.c (darwin_rs6000_override_options): Do not
+ 	use longcall for 64b code.
+ 
+ 2019-06-27  Aaron Sawdey  <acsawdey@linux.ibm.com>
+ 
+ 	* builtins.c (get_memory_rtx): Fix comment.
+ 	* optabs.def (movmem_optab): Change to cpymem_optab.
+ 	* expr.c (emit_block_move_via_cpymem): Change movmem to cpymem.
+ 	(emit_block_move_hints): Change movmem to cpymem.
+ 	* defaults.h: Change movmem to cpymem.
+ 	* targhooks.c (get_move_ratio): Change movmem to cpymem.
+ 	(default_use_by_pieces_infrastructure_p): Ditto.
+ 	* config/aarch64/aarch64-protos.h: Change movmem to cpymem.
+ 	* config/aarch64/aarch64.c (aarch64_expand_movmem): Change movmem
+ 	to cpymem.
+ 	* config/aarch64/aarch64.h: Change movmem to cpymem.
+ 	* config/aarch64/aarch64.md (movmemdi): Change name to cpymemdi.
+ 	* config/alpha/alpha.h: Change movmem to cpymem in comment.
+ 	* config/alpha/alpha.md (movmemqi, movmemdi, *movmemdi_1): Change
+ 	movmem to cpymem.
+ 	* config/arc/arc-protos.h: Change movmem to cpymem.
+ 	* config/arc/arc.c (arc_expand_movmem): Change movmem to cpymem.
+ 	* config/arc/arc.h: Change movmem to cpymem in comment.
+ 	* config/arc/arc.md (movmemsi): Change movmem to cpymem.
+ 	* config/arm/arm-protos.h: Change movmem to cpymem in names.
+ 	* config/arm/arm.c (arm_movmemqi_unaligned, arm_gen_movmemqi,
+ 	gen_movmem_ldrd_strd, thumb_expand_movmemqi) Change movmem to cpymem.
+ 	* config/arm/arm.md (movmemqi): Change movmem to cpymem.
+ 	* config/arm/thumb1.md (movmem12b, movmem8b): Change movmem to cpymem.
+ 	* config/avr/avr-protos.h: Change movmem to cpymem.
+ 	* config/avr/avr.c (avr_adjust_insn_length, avr_emit_movmemhi,
+ 	avr_out_movmem): Change movmem to cpymem.
+ 	* config/avr/avr.md (movmemhi, movmem_<mode>, movmemx_<mode>):
+ 	Change movmem to cpymem.
+ 	* config/bfin/bfin-protos.h: Change movmem to cpymem.
+ 	* config/bfin/bfin.c (single_move_for_movmem, bfin_expand_movmem):
+ 	Change movmem to cpymem.
+ 	* config/bfin/bfin.h: Change movmem to cpymem in comment.
+ 	* config/bfin/bfin.md (movmemsi): Change name to cpymemsi.
+ 	* config/c6x/c6x-protos.h: Change movmem to cpymem.
+ 	* config/c6x/c6x.c (c6x_expand_movmem): Change movmem to cpymem.
+ 	* config/c6x/c6x.md (movmemsi): Change name to cpymemsi.
+ 	* config/frv/frv.md (movmemsi): Change name to cpymemsi.
+ 	* config/ft32/ft32.md (movmemsi): Change name to cpymemsi.
+ 	* config/h8300/h8300.md (movmemsi): Change name to cpymemsi.
+ 	* config/i386/i386-expand.c (expand_set_or_movmem_via_loop,
+ 	expand_set_or_movmem_via_rep, expand_movmem_epilogue,
+ 	expand_setmem_epilogue_via_loop, expand_set_or_cpymem_prologue,
+ 	expand_small_cpymem_or_setmem,
+ 	expand_set_or_cpymem_prologue_epilogue_by_misaligned_moves,
+ 	expand_set_or_cpymem_constant_prologue,
+ 	ix86_expand_set_or_cpymem): Change movmem to cpymem.
+ 	* config/i386/i386-protos.h: Change movmem to cpymem.
+ 	* config/i386/i386.h: Change movmem to cpymem in comment.
+ 	* config/i386/i386.md (movmem<mode>): Change name to cpymem.
+ 	(setmem<mode>): Change expansion function name.
+ 	* config/lm32/lm32.md (movmemsi): Change name to cpymemsi.
+ 	* config/m32c/blkmov.md (movmemhi, movmemhi_bhi_op, movmemhi_bpsi_op,
+ 	movmemhi_whi_op, movmemhi_wpsi_op): Change movmem to cpymem.
+ 	* config/m32c/m32c-protos.h: Change movmem to cpymem.
+ 	* config/m32c/m32c.c (m32c_expand_movmemhi): Change movmem to cpymem.
+ 	* config/m32r/m32r.c (m32r_expand_block_move): Change movmem to cpymem.
+ 	* config/m32r/m32r.md (movmemsi, movmemsi_internal): Change movmem
+ 	to cpymem.
+ 	* config/mcore/mcore.md (movmemsi): Change name to cpymemsi.
+ 	* config/microblaze/microblaze.c: Change movmem to cpymem in comment.
+ 	* config/microblaze/microblaze.md (movmemsi): Change name to cpymemsi.
+ 	* config/mips/mips.c (mips_use_by_pieces_infrastructure_p):
+ 	Change movmem to cpymem.
+ 	* config/mips/mips.h: Change movmem to cpymem.
+ 	* config/mips/mips.md (movmemsi): Change name to cpymemsi.
+ 	* config/nds32/nds32-memory-manipulation.c
+ 	(nds32_expand_movmemsi_loop_unknown_size,
+ 	nds32_expand_movmemsi_loop_known_size, nds32_expand_movmemsi_loop,
+ 	nds32_expand_movmemsi_unroll,
+ 	nds32_expand_movmemsi): Change movmem to cpymem.
+ 	* config/nds32/nds32-multiple.md (movmemsi): Change name to cpymemsi.
+ 	* config/nds32/nds32-protos.h: Change movmem to cpymem.
+ 	* config/pa/pa.c (compute_movmem_length): Change movmem to cpymem.
+ 	(pa_adjust_insn_length): Change call to compute_movmem_length.
+ 	* config/pa/pa.md (movmemsi, movmemsi_prereload, movmemsi_postreload,
+ 	movmemdi, movmemdi_prereload,
+ 	movmemdi_postreload): Change movmem to cpymem.
+ 	* config/pdp11/pdp11.md (movmemhi, movmemhi1,
+ 	movmemhi_nocc, UNSPEC_MOVMEM): Change movmem to cpymem.
+ 	* config/riscv/riscv.c: Change movmem to cpymem in comment.
+ 	* config/riscv/riscv.h: Change movmem to cpymem.
+ 	* config/riscv/riscv.md: (movmemsi) Change name to cpymemsi.
+ 	* config/rs6000/rs6000.md: (movmemsi) Change name to cpymemsi.
+ 	* config/rx/rx.md: (UNSPEC_MOVMEM, movmemsi, rx_movmem): Change
+ 	movmem to cpymem.
+ 	* config/s390/s390-protos.h: Change movmem to cpymem.
+ 	* config/s390/s390.c (s390_expand_movmem, s390_expand_setmem,
+ 	s390_expand_insv): Change movmem to cpymem.
+ 	* config/s390/s390.md (movmem<mode>, movmem_short, *movmem_short,
+ 	movmem_long, *movmem_long, *movmem_long_31z): Change movmem to cpymem.
+ 	* config/sh/sh.md (movmemsi): Change name to cpymemsi.
+ 	* config/sparc/sparc.h: Change movmem to cpymem in comment.
+ 	* config/vax/vax-protos.h (vax_output_movmemsi): Remove prototype
+ 	for nonexistent function.
+ 	* config/vax/vax.h: Change movmem to cpymem in comment.
+ 	* config/vax/vax.md (movmemhi, movmemhi1): Change movmem to cpymem.
+ 	* config/visium/visium.h: Change movmem to cpymem in comment.
+ 	* config/visium/visium.md (movmemsi): Change name to cpymemsi.
+ 	* config/xtensa/xtensa.md (movmemsi): Change name to cpymemsi.
+ 	* doc/md.texi: Change movmem to cpymem and update description to match.
+ 	* doc/rtl.texi: Change movmem to cpymem.
+ 	* target.def (use_by_pieces_infrastructure_p): Change movmem to cpymem.
+ 	* doc/tm.texi: Regenerate.
+ 
+ 2019-06-27  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Enable
+ 	-fvariable-expansion-in-unroller by default.
+ 	* doc/invoke.texi (-fvariable-expansion-in-unroller): Document new
+ 	default for Power.
+ 
+ 2019-06-27  David Edelsohn  <dje.gcc@gmail.com>
+ 
+ 	Revert
+ 	2019-06-26  David Edelsohn  <dje.gcc@gmail.com>
+ 	* config.gcc (powerpc-ibm-aix*): Define target_gtfiles.
+ 
+ 	* config.gcc(rs6000-*-*): Define target_gtfiles.
+ 
+ 2019-06-27  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ipa-devirt.c (odr_type_d): Add tbaa_enabled flag.
+ 	(add_type_duplicate): When odr hash is not allocated, to nothing.
+ 	(odr_based_tbaa_p): New function.
+ 	(set_type_canonical_for_odr_type): New function.
+ 	* ipa-utils.h (enable_odr_based_tbaa, odr_based_tbaa_p,
+ 	set_type_canonical_for_odr_type): New.
+ 	* tree.c (gimple_canonical_types_compatible_p): ODR types with
+ 	ODR based TBAA are not equivalent to non-ODR types.
+ 
+ 2019-06-27  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/90974
+ 	PR rtl-optimization/90975
+ 	PR rtl-optimization/90976
+ 	PR target/91016
+ 	PR tree-optimization/91017
+ 	* config/i386/i386-expand.c (ix86_expand_rounddf_32): Remove
+ 	unused tmp.
+ 	* lra.c (lra_set_insn_recog_data): Remove a leftover from
+ 	initial commit of IRA.
+ 	* optabs.c (expand_twoval_binop): Use xop0 and xop1 instead
+ 	of op0 and op1.
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction):
+ 	Remove unused mode1.
+ 	* tree-vect-stmts.c (vectorizable_call): Remove dead assignment
+ 	to new_stmt_info.
+ 
+ 2019-06-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/90991
+ 	* config/i386/sse.md (avx_vec_concat<mode>): Use nonimmediate_operand
+ 	instead of register_operand for operands[1], add m to its constraints
+ 	if operands[2] uses "C" constraint.  Ensure in condition that if
+ 	operands[2] is not 0, then operands[1] is not a MEM.  For last two
+ 	alternatives, use unaligned loads instead of aligned if operands[1] is
+ 	misaligned_operand.
+ 
+ 2019-06-27  Martin Liska  <mliska@suse.cz>
+ 
+ 	* asan.c (asan_emit_allocas_unpoison): Remove obviously
+ 	dead assignments.
+ 	* bt-load.c (move_btr_def): Likewise.
+ 	* builtins.c (expand_builtin_apply_args_1): Likewise.
+ 	(expand_builtin_apply): Likewise.
+ 	* cfgexpand.c (expand_asm_stmt): Likewise.
+ 	(construct_init_block): Likewise.
+ 	* cfghooks.c (verify_flow_info): Likewise.
+ 	* cfgloopmanip.c (remove_path): Likewise.
+ 	* cfgrtl.c (rtl_verify_bb_layout): Likewise.
+ 	* cgraph.c (cgraph_node::set_pure_flag): Likewise.
+ 	* combine.c (simplify_if_then_else): Likewise.
+ 	* config/i386/i386.c (ix86_setup_incoming_vararg_bounds): Likewise.
+ 	(choose_basereg): Likewise.
+ 	(ix86_expand_prologue): Likewise.
+ 	(ix86_preferred_output_reload_class): Likewise.
+ 	* cselib.c (cselib_record_sets): Likewise.
+ 	* df-scan.c (df_scan_alloc): Likewise.
+ 	* dojump.c (do_jump_by_parts_greater_rtx): Likewise.
+ 	* early-remat.c (early_remat::record_equiv_candidates): Likewise.
+ 	* emit-rtl.c (try_split): Likewise.
+ 	* graphite-scop-detection.c (assign_parameter_index_in_region):
+ 	Likewise.
+ 	* ipa-cp.c (cgraph_edge_brings_all_agg_vals_for_node): Likewise.
+ 	* ira-color.c (setup_profitable_hard_regs): Likewise.
+ 	* ira.c (rtx_moveable_p): Likewise.
+ 	* lra-eliminations.c (eliminate_regs_in_insn): Likewise.
+ 	* read-rtl.c (read_subst_mapping): Likewise.
+ 	* regrename.c (scan_rtx): Likewise.
+ 	* reorg.c (fill_slots_from_thread): Likewise.
+ 	* tree-inline.c (tree_function_versioning): Likewise.
+ 	* tree-ssa-reassoc.c (optimize_ops_list): Likewise.
+ 	* tree-ssa-sink.c (statement_sink_location): Likewise.
+ 	* tree-ssa-threadedge.c (thread_across_edge): Likewise.
+ 	* tree-vect-loop.c (vect_get_loop_niters): Likewise.
+ 	(vect_create_epilog_for_reduction): Likewise.
+ 	* tree.c (build_nonstandard_integer_type): Likewise.
+ 
+ 2019-06-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Encode valueized RHS.
+ 
+ 2019-06-27  Jun Ma  <JunMa@linux.alibaba.com>
+ 
+ 	PR tree-optimization/89772
+ 	* gimple-fold.c (gimple_fold_builtin_memchr): consider trailing nuls in
+ 	out-of-bound accesses checking.
+ 
+ 2019-06-27  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/91014
+ 	* tree-ssa-dse.c (initialize_ao_ref_for_dse): Bail out
+ 	when LHS is NULL_TREE.
+ 
+ 2019-06-27  Martin Liska  <mliska@suse.cz>
+ 
+ 	* symbol-summary.h (traverse): Pass
+ 	argument a to the call of callback.
+ 	(gt_ggc_mx): Mark arguments as unused.
+ 	(gt_pch_nx): Likewise.
+ 
+ 2019-06-27  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	PR target/62147
+ 	* loop-iv.c (find_simple_exit): Call finite_loop_p to update
+ 	finiteness.
+ 
+ 2019-06-26  Jeff Law  <law@redhat.com>
+ 
+ 	PR tree-optimization/90883
+ 	* tree-ssa-dse.c (delete_dead_or_redundant_call): Fix signature.
+ 	(delete_dead_or_redundant_assignment): Likewise.
+ 
+ 	PR tree-optimization/90883
+ 	* tree-ssa-alias.c (stmt_kills_ref_p): Handle BUILT_IN_CALLOC.
+ 	* tree-ssa-dse.c: Update various comments to distinguish between
+ 	dead and redundant stores.
+ 	(initialize_ao_ref_for_dse): Handle BUILT_IN_CALLOC.
+ 	(dse_optimize_redundant_stores): New function.
+ 	(delete_dead_or_redundant_call): Renamed from delete_dead_call.
+ 	Distinguish between dead and redundant calls in dump output.  All
+ 	callers updated.
+ 	(delete_dead_or_redundant_assignment): Similarly for assignments.
+ 	(dse_optimize_stmt): Handle _CHK variants.  For statements which
+ 	store 0 into multiple memory locations, try to prove a subsequent
+ 	store is redundant.
+ 
+ 2019-06-26  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89021
+ 	* config/i386/i386.c (ix86_autovectorize_vector_sizes):
+ 	Autovectorize 8-byte vectors for TARGET_MMX_WITH_SSE.
+ 
+ 2019-06-26  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/rs6000-internal.h (branch_island): New typedef.
+ 	(branch_islands): New extern.
+ 	* config/rs6000/rs6000-logue.c (macho_branch_islands): Moved from
+ 	* config/rs6000/rs6000.c: .. here.
+ 
+ 2019-06-26  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config.gcc (powerpc*-*-linux*): Move target_gtfiles from here..
+ 	(powerpc*-*-*) ... to here.
+ 
+ 2019-06-26  Jeff Law  <law@redhat.com>
+ 
+ 	* tree-ssa-dse.c (initialize_ao_ref_for_dse): Handle _chk variants of
+ 	memcpy, memmove and memset builtins.
+ 	(maybe_trim_memstar_call): Likewise.
+ 
+ 2019-06-26  David Edelsohn  <dje.gcc@gmail.com>
+ 
+ 	* config/rs6000/rs6000-logue.c: Add #ifndef TARGET_PROFILE_KERNEL.
+ 
+ 2019-06-26  David Edelsohn  <dje.gcc@gmail.com>
+ 
+ 	* config.gcc (powerpc-ibm-aix*): Define target_gtfiles.
+ 
+ 2019-06-26  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000-internal.h (rs6000_keep_leaf_when_profiled): New
+ 	declaration.
+ 	* config/rs6000/rs6000-logue.c (rs6000_keep_leaf_when_profiled): Remove
+ 	"static".
+ 	* config/rs6000/rs6000-logue.c (rs6000_keep_leaf_when_profiled): Delete
+ 	declaration.
+ 
+ 2019-06-26  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.c: Fix previous commit, it missed some changes.
+ 
+ 2019-06-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR ipa/90982
+ 	* tree-inline.c (remap_ssa_name): Copy SSA range info.
+ 
+ 2019-06-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	* lto-streamer.h (lto_bitmap_alloc): Remove.
+ 	(lto_bitmap_free): Likewise.
+ 	* lto-streamer.c (lto_bitmap_alloc): Remove.
+ 	(lto_bitmap_free): Likewise.
+ 	(lto_obstack): Likewise.
+ 	(lto_obstack_initialized): Likewise.
+ 	* lto-streamer-out.c (lto_output): Use own obstack for local
+ 	bitmap, free it consistently.
+ 
+ 2019-06-26  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/90991
+ 	* config/i386/sse.md
+ 	(*<extract_type>_vinsert<shuffletype><extract_suf>_0): Use vmovupd,
+ 	vmovups, vmovdqu, vmovdqu32 or vmovdqu64 instead of the aligned
+ 	insns if operands[2] is misaligned_operand.
+ 
+ 2019-06-26  Li Jia He  <helijia@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.h (TARGET_MADDLD): Remove the restriction of
+ 	TARGET_POWERPC64.
+ 	* config/rs6000/rs6000.md (maddld): Change maddld match_operand from DI
+ 	to GPR.
+ 
+ 2019-06-26  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* doc/invoke.texi (Warning Options): Fix some @opindex syntax.
+ 
+ 2019-06-26  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/90973
+ 	* tree-vect-loop.c (vect_get_known_peeling_cost): Use
+ 	epilogue_cost_vec instead of prologue_cost_vec for
+ 	a epilogue cost.
+ 
+ 2019-06-26  Martin Liska  <mliska@suse.cz>
+ 
+ 	* bb-reorder.c (connect_better_edge_p): Add missing else
+ 	statement in the middle of if-else statements.
+ 
+ 2019-06-25  Hongtao Liu  <hongtao.liu@intel.com>
+ 	    H.J. Lu  <hongjiu.lu@intel.com>
+ 	    Olga Makhotina  <olga.makhotina@intel.com>
+ 
+ 	* common/config/i386/i386-common.c
+ 	(OPTION_MASK_ISA_AVX512VP2INTERSECT_SET,
+ 	OPTION_MASK_ISA_AVX512VP2INTERSECT_UNSET): New macros.
+ 	(OPTION_MASK_ISA2_AVX512F_UNSET): Add
+ 	OPTION_MASK_ISA_AVX512VP2INTERSECT_UNSET.
+ 	(ix86_handle_option): Handle -mavx512vp2intersect.
+ 	* config/i386/avx512vp2intersectintrin.h: New.
+ 	* config/i386/avx512vp2intersectvlintrin.h: New.
+ 	* config/i386/cpuid.h (bit_AVX512VP2INTERSECT): New.
+ 	* config/i386/driver-i386.c (host_detect_local_cpu): Detect
+ 	AVX512VP2INTERSECT.
+ 	* config/i386/i386-builtin-types.def: Add new types.
+ 	* config/i386/i386-builtin.def: Add new builtins.
+ 	* config/i386/i386-builtins.c: (enum processor_features): Add
+ 	F_AVX512VP2INTERSECT.
+ 	(static const _isa_names_table isa_names_table): Ditto.
+ 	* config/i386/i386-c.c (ix86_target_macros_internal): Define
+ 	__AVX512VP2INTERSECT__.
+ 	* config/i386/i386-expand.c (ix86_expand_builtin): Expand
+ 	IX86_BUILTIN_2INTERSECTD512, IX86_BUILTIN_2INTERSECTQ512,
+ 	IX86_BUILTIN_2INTERSECTD256, IX86_BUILTIN_2INTERSECTQ256,
+ 	IX86_BUILTIN_2INTERSECTD128, IX86_BUILTIN_2INTERSECTQ128.
+ 	* config/i386/i386-modes.def (P2QI, P2HI): New modes.
+ 	* config/i386/i386-options.c (ix86_target_string): Add
+ 	-mavx512vp2intersect.
+ 	(ix86_option_override_internal): Handle AVX512VP2INTERSECT.
+ 	* config/i386/i386.c (ix86_hard_regno_nregs): Allocate two regs for
+ 	P2HImode and P2QImode.
+ 	(ix86_hard_regno_mode_ok): Register pair only starts at even hardreg
+ 	number for P2QImode and P2HImode.
+ 	(ix86_regmode_natural_size): New function.
+ 	* config/i386/i386.h (TARGET_AVX512VP2INTERSECT,
+ 	TARGET_AVX512VP2INTERSECT_P, PTA_AVX512VP2INTERSECT
+ 	REGMODE_NATURAL_SIZE, MASK_PAIR_REGNO_P): New.
+ 	* config/i386/i386-protos.h (ix86_regmode_natural_size): Declare
+ 	* config/i386/i386.opt: Add -mavx512vp2intersect.
+ 	* config/i386/immintrin.h: Include avx512vp2intersectintrin.h and
+ 	avx512vp2intersectvlintrin.h.
+ 	* config/i386/sse.md (define_c_enum "unspec"): Add UNSPEC_VP2INTERSECT.
+ 	(define_mode_iterator VI48_AVX512VP2VL): New.
+ 	(avx512vp2intersect_2intersect<mode>,
+ 	avx512vp2intersect_2intersectv16si): New define_insn patterns.
+ 	* config.gcc: Add avx512vp2intersectvlintrin.h and
+ 	avx512vp2intersectintrin.h to extra_headers.
+ 	* doc/invoke.texi: Document -mavx512vp2intersect.
+ 
+ 2019-06-25  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/darwin.h (ENDFILE_SPEC): New.
+ 
+ 2019-06-25  Bill Seurer  <seurer@linux.vnet.ibm.com>
+ 
+ 	* config/rs6000/rs6000.c (stack_info, rs6000_pic_labelno,
+ 	savres_routine_syms, savres_routine_name, morestack_ref,
+ 	rs6000_init_machine_status, save_reg_p, first_reg_to_save,
+ 	first_fp_reg_to_save, first_altivec_reg_to_save, compute_vrsave_mask,
+ 	compute_save_world_info, is_altivec_return_reg, fixed_reg_p,
+ 	rs6000_savres_strategy, rs6000_stack_info, debug_stack_info,
+ 	rs6000_return_addr, rs6000_decl_ok_for_sibcall,
+ 	rs6000_function_ok_for_sibcall, rs6000_ra_ever_killed,
+ 	rs6000_emit_load_toc_table, rs6000_emit_eh_reg_restore, uses_TOC,
+ 	create_TOC_reference, rs6000_aix_asm_output_dwarf_table_ref,
+ 	rs6000_emit_stack_tie, rs6000_emit_allocate_stack_1,
+ 	get_stack_clash_protection_probe_interval,
+ 	get_stack_clash_protection_guard_size,
+ 	rs6000_emit_probe_stack_range_stack_clash, rs6000_emit_allocate_stack,
+ 	rs6000_emit_probe_stack_range, output_probe_stack_range_1,
+ 	interesting_frame_related_regno, output_probe_stack_range_stack_clash,
+ 	output_probe_stack_range, rs6000_frame_related, generate_set_vrsave,
+ 	gen_frame_set, gen_frame_load, gen_frame_store, emit_frame_save,
+ 	gen_frame_mem_offset, rs6000_savres_routine_name,
+ 	rs6000_savres_routine_sym, rs6000_emit_stack_reset,
+ 	ptr_regno_for_savres, rs6000_emit_savres_rtx,
+ 	rs6000_emit_prologue_move_from_cr, split_stack_arg_pointer_used_p,
+ 	rs6000_global_entry_point_prologue_needed_p,
+ 	rs6000_get_separate_components, rs6000_components_for_bb,
+ 	rs6000_disqualify_components, rs6000_emit_prologue_components,
+ 	rs6000_emit_epilogue_components, rs6000_set_handled_components,
+ 	emit_vrsave_prologue, emit_split_stack_prologue, rs6000_emit_prologue,
+ 	rs6000_output_savres_externs, rs6000_output_function_prologue,
+ 	rs6000_keep_leaf_when_profiled, load_cr_save, restore_saved_cr,
+ 	load_lr_save, restore_saved_lr, add_crlr_cfa_restore,
+ 	offset_below_red_zone_p, emit_cfa_restores, rs6000_emit_epilogue,
+ 	rs6000_output_function_epilogue, gen_add3_const,
+ 	rs6000_expand_split_stack_prologue, rs6000_live_on_entry,
+ 	rs6000_split_stack_space_check, rs6000_save_toc_in_prologue_p): Moved
+ 	to rs6000-logue.c.
+ 	(machine_function): Moved to rs6000.h.
+ 	(rs6000_stack_t, ALTIVEC_REG_BIT, quad_address_offset_p) Moved to
+ 	rs6000-internal.h.
+ 	* config/rs6000/rs6000-logue.c(stack_info, rs6000_pic_labelno,
+ 	savres_routine_syms, savres_routine_name, morestack_ref,
+ 	rs6000_init_machine_status, save_reg_p, first_reg_to_save,
+ 	first_fp_reg_to_save, first_altivec_reg_to_save, compute_vrsave_mask,
+ 	compute_save_world_info, is_altivec_return_reg, fixed_reg_p,
+ 	rs6000_savres_strategy, rs6000_stack_info, debug_stack_info,
+ 	rs6000_return_addr, rs6000_decl_ok_for_sibcall,
+ 	rs6000_function_ok_for_sibcall, rs6000_ra_ever_killed,
+ 	rs6000_emit_load_toc_table, rs6000_emit_eh_reg_restore, uses_TOC,
+ 	create_TOC_reference, rs6000_aix_asm_output_dwarf_table_ref,
+ 	rs6000_emit_stack_tie, rs6000_emit_allocate_stack_1,
+ 	get_stack_clash_protection_probe_interval,
+ 	get_stack_clash_protection_guard_size,
+ 	rs6000_emit_probe_stack_range_stack_clash, rs6000_emit_allocate_stack,
+ 	rs6000_emit_probe_stack_range, output_probe_stack_range_1,
+ 	interesting_frame_related_regno, output_probe_stack_range_stack_clash,
+ 	output_probe_stack_range, rs6000_frame_related, generate_set_vrsave,
+ 	gen_frame_set, gen_frame_load, gen_frame_store, emit_frame_save,
+ 	gen_frame_mem_offset, rs6000_savres_routine_name,
+ 	rs6000_savres_routine_sym, rs6000_emit_stack_reset,
+ 	ptr_regno_for_savres, rs6000_emit_savres_rtx,
+ 	rs6000_emit_prologue_move_from_cr, split_stack_arg_pointer_used_p,
+ 	rs6000_global_entry_point_prologue_needed_p,
+ 	rs6000_get_separate_components, rs6000_components_for_bb,
+ 	rs6000_disqualify_components, rs6000_emit_prologue_components,
+ 	rs6000_emit_epilogue_components, rs6000_set_handled_components,
+ 	emit_vrsave_prologue, emit_split_stack_prologue, rs6000_emit_prologue,
+ 	rs6000_output_savres_externs, rs6000_output_function_prologue,
+ 	rs6000_keep_leaf_when_profiled, load_cr_save, restore_saved_cr,
+ 	load_lr_save, restore_saved_lr, add_crlr_cfa_restore,
+ 	offset_below_red_zone_p, emit_cfa_restores, rs6000_emit_epilogue,
+ 	rs6000_output_function_epilogue, gen_add3_const,
+ 	rs6000_expand_split_stack_prologue, rs6000_live_on_entry,
+ 	rs6000_split_stack_space_check, rs6000_save_toc_in_prologue_p): Moved
+ 	to here from rs6000.c.
+ 	* config/rs6000/rs6000.h (machine_function): Moved to here from rs6000.c.
+ 	* config/rs6000/rs6000-internal.h: (rs6000_stack_t, ALTIVEC_REG_BIT,
+ 	quad_address_offset_p) Moved to here from rs6000.c.
+ 	* config/rs6000/t-rs6000: Add new source file rs6000-logue.c.
+ 	* config/config.gcc: Add new source file rs6000-logue.c to garbage
+ 	collector.
+ 
+ 2019-06-25  Martin Liska  <mliska@suse.cz>
+ 
+ 	* hash-table.c (hashtab_chk_error): Move here from ...
+ 	* hash-table.h (hashtab_chk_error): ... here.
+ 
+ 2019-06-25  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/90978
+ 	* df-scan.c (df_update_entry_block_defs): Remove dead else
+ 	branch.
+ 	(df_update_exit_block_uses): Likewise.
+ 
+ 2019-06-25  Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 	    Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config.gcc (thread_file): Set to gcn for AMD GCN.
+ 	* config/gcn/gcn.c (gcn_emutls_var_init): New function.
+ 	(TARGET_EMUTLS_VAR_INIT): New hook.
+ 
+ 2019-06-25  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/90939
+ 	* ipa-cp.c (ipcp_bits_lattice::meet_with): Remove assert.
+ 
+ 2019-06-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90930
+ 	* tree-ssa-reassoc.c (reassociate_bb): Only rewrite expression
+ 	into parallel form in the last pass instance.
+ 
+ 2019-06-25  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.c (arc_symbol_binds_local_p): New function.
+ 	(arc_legitimize_pic_address): Simplify and cleanup the function.
+ 	(SYMBOLIC_CONST): Remove.
+ 	(prepare_pic_move): Likewise.
+ 	(prepare_move_operands): Handle complex mov cases here.
+ 	(arc_legitimize_address_0): Remove call to
+ 	arc_legitimize_pic_address.
+ 	(arc_legitimize_address): Remove call to
+ 	arc_legitimize_tls_address.
+ 	* config/arc/arc.md (movqi_insn): Allow Cm3 match.
+ 	(movhi_insn): Likewise.
+ 
+ 2019-06-25  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.h: Use __int20__ for SIZE_TYPE and
+ 	PTRDIFF_TYPE.
+ 	* gimple-ssa-sprintf.c (build_intmax_type_nodes): Accept "__intN__"
+ 	format of "__intN" types for UINTMAX_TYPE.
+ 	* stor-layout.c (initialize_sizetypes): Accept "__intN__"
+ 	format of "__intN" types for SIZETYPE.
+ 	* tree.c (build_common_tree_nodes): Accept "__intN__"
+ 	format of "__intN" types for SIZE_TYPE and PTRDIFF_TYPE.
+ 	* doc/invoke.texi: Document that __intN__ disables pedantic
+ 	warnings.
+ 
+ 2019-06-25  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* tree-ssa-alias.c (indirect_ref_may_alias_decl_p): Check that
+ 	base2_alias_set is non-zero before doing TBAA based disambiguation.
+ 
+ 2019-06-25  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/90973
+ 	* tree-vect-loop.c (vect_get_known_peeling_cost): Sum retval
+ 	of prologue and epilogue.
+ 
+ 2019-06-24  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* ipa-utils.h (type_with_linkage_p): Verify that type is
+ 	CXX_ODR_P.
+ 	(odr_type_p): Remove extra return.
+ 	* lto-streamer-out.c (hash_tree): Hash TYPE_CXX_ODR_P;
+ 	hash STRING_FLAG only for arrays and integers.
+ 	* tree-stremaer-in.c (unpack_ts_type_common_value_fields):
+ 	Update analogously.
+ 	* tree-streamer-out.c (pack_ts_type_common_value_fields):
+ 	Likewise.
+ 	* print-tree.c (print_node): Print cxx-odr-p
+ 	and string-flag.
+ 	* tree.c (need_assembler_name_p): Also check that type
+ 	is CXX_ODR_TYPE_P
+ 	(verify_type_variant): Update verification of SRING_FLAG;
+ 	also check CXX_ODR_P.
+ 	* tree.h (ARRAY_OR_INTEGER_TYPE_CHECK): New macro.
+ 	(TYPE_STRING_FLAG): Use it.
+ 	(TYPE_CXX_ODR_P): New macro.
+ 	* dwarf2out.c (gen_array_type_die): First check that type
+ 	is an array and then test string flag.
+ 
+ 2019-06-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90972
+ 	* tree-vect-stmts.c (vect_init_vector): Handle CONSTANT_CLASS_P
+ 	in common code, dealing with STRING_CST properly.
+ 
+ 2019-06-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90930
+ 	PR tree-optimization/90316
+ 	* tree-ssa-alias.c (walk_non_aliased_vuses): Add missing
+ 	decrement of limit.
+ 
+ 2019-06-24  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* tree-pretty-print.h: Remove unnecessary punctuation characters
+ 	from a diagnostic.
+ 	* tree-ssa.c (release_defs_bitset): Correct preprocessor conditional.
+ 
+ 2019-06-24  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* ginclude/float.h (FLT_DECIMAL_DIG, DBL_DECIMAL_DIG, LDBL_DECIMAL_DIG)
+ 	(FLT_HAS_SUBNORM, DBL_HAS_SUBNORM, LDBL_HAS_SUBNORM, FLT_TRUE_MIN)
+ 	(DBL_TRUE_MIN, LDBL_TRUE_MIN): Also define for C++17.
+ 
+ 2019-06-23  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/darwin.h: Handle GCC target pragma.
+ 
+ 2019-06-23  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/darwin.h: (__PPC__, __PPC64__): New.
+ 
+ 2019-06-22  Jeff Law  <law@redhat.com>
+ 
+ 	* config/avr/avr.c (TARGET_BUILTIN_SETJMP_FRAME_VALUE): Remove.
+ 
+ 2019-06-22  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* tree-ssa-alias.c (nonoverlapping_component_refs_p): Do not
+ 	give up on bitfields; continue searching for different refs
+ 	appearing later.
+ 
+ 2019-06-21  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree-vect-data-refs.c (vect_find_stmt_data_reference): Handle
+ 	even zero DR_OFFSET, but DR_BASE_ADDRESS of POINTER_PLUS_EXPR
+ 	containing the offset as possible simd lane access.  Look through
+ 	widening conversion.  Move the
+ 	TREE_CODE (DR_INIT (newdr)) == INTEGER_CST test earlier and reindent.
+ 
+ 2019-06-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90930
+ 	* tree-ssa-reassoc.c (rewrite_expr_tree_parallel): Set visited
+ 	flag on new stmts to avoid re-processing them.
+ 
+ 2019-06-21  Matthew Beliveau  <mbelivea@redhat.com>
+ 
+ 	PR c++/90875 - added -Wswitch-outside-range option
+ 	* doc/invoke.texi (Wswitch-outside-range): Document.
+ 
+ 2019-06-21  Jeff Law  <law@redhat.com>
+ 
+ 	PR tree-optimization/90949
+ 	* tree-ssa-copy.c (fini_copy_prop): Use reset_flow_sensitive_info.
+ 	* tree-ssanames.c (reset_flow_sensitive_info): Reset non-null state.
+ 
+ 2019-06-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/90914
+ 	* dwarf2out.c (prune_unused_types_walk): Always consider
+ 	function-local extern declarations as used.
+ 
+ 2019-06-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90913
+ 	* tree-vect-loop-manip.c (vect_loop_versioning): Do not re-use
+ 	the scalar variant of if-conversion versioning.
+ 
+ 2019-06-21  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* omp-low.c (lower_rec_simd_input_clauses): Add rvar2 argument,
+ 	create another "omp scan inscan exclusive" array if
+ 	!ctx->scan_inclusive.
+ 	(lower_rec_input_clauses): Handle exclusive scan inscan reductions.
+ 	(lower_omp_scan): Likewise.
+ 	* tree-vectorizer.h (struct _stmt_vec_info): Use 3-bit instead of
+ 	2-bit bitfield for simd_lane_access_p member.
+ 	* tree-vect-data-refs.c (vect_analyze_data_refs): Also handle
+ 	aux == (void *)-4 as simd lane access.
+ 	* tree-vect-stmts.c (check_scan_store): Handle exclusive scan.  Update
+ 	comment with permutations to show the canonical permutation order.
+ 	(vectorizable_scan_store): Handle exclusive scan.
+ 	(vectorizable_store): Call vectorizable_scan_store even for
+ 	STMT_VINFO_SIMD_LANE_ACCESS_P > 3.
+ 
+ 	* tree-vect-data-refs.c (vect_find_stmt_data_reference): Handle
+ 	"omp simd array" arrays with one byte elements.
+ 
+ 2019-06-20  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/alpha/alpha.md (@unaligned_store<mode>):
+ 	Rename from unaligned_store<mode>.
+ 	(@reload_in<mode>_aligned): Rename from reload_in<mode>_aligned.
+ 	* config/alpha/sync.md (@load_locked_<mode>): Rename
+ 	from load_locked_<mode>.
+ 	(@store_conditional_<mode>): Rename from store_conditional_<mode>.
+ 	(@atomic_compare_and_swap<mode>_1): Rename
+ 	from atomic_compare_and_swap<mode>_1.
+ 	(@atomic_exchange<mode>_1): Rename from atomic_exchange<mode>_1.
+ 	* config/alpha/alpha.c (alpha_expand_mov_nobwx):
+ 	Use gen_reload_in_aligned and gen_unaligned_store.
+ 	(emit_load_locked): Remove.
+ 	(emit_store_conditional): Ditto.
+ 	(alpha_split_atomic_op): Use gen_load_locked and gen_store_conditional.
+ 	(alpha_split_compare_and_swap): Ditto.
+ 	(alpha_expand_compare_and_swap_12): Use gen_atomic_compare_and_swap_1.
+ 	(alpha_split_compare_and_swap_12): Use gen_load_locked
+ 	and gen_store_conditional.
+ 	(alpha_split_atomic_exchange): Ditto.
+ 	(alpha_expand_atomic_exchange_12): Use gen_atomic_exchange_1.
+ 	(alpha_split_atomic_exchange_12): Use gen_load_locked
+ 	and gen_store_conditional.
+ 
+ 2019-06-20  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config/aarch64/aarch64-errata.h: New file.
+ 	* config/aarch64/aarch64-elf-raw.h (CA53_ERR_835769_SPEC): Delete.
+ 	(CA53_ERR_843419_SPEC): Delete.
+ 	(LINK_SPEC): Use AARCH64_ERRATA_LINK_SPEC instead of above.
+ 	* config/aarch64/aarch64-linux.h: Likewise.
+ 	* config/aarch64/aarch64-netbsd.h: Likewise.
+ 	* config/aarch64/aarch64-freebsd.h: Likewise.
+ 
+ 2019-06-20  Marek Polacek  <polacek@redhat.com>
+ 
+ 	* config/sh/sh.c (sh2a_function_vector_p): Use get_attribute_name.
+ 
+ 2019-06-20  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.md (isa attribute): Add support for
+ 	for a future processor.
+ 
+ 2019-06-20  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/54855
+ 	* config/i386/i386-expand.c (ix86_expand_vector_set): Generate
+ 	standard scalar operation pattern for V2DF.
+ 	* config/i386/sse.md (*<sse>_vm<plusminus_insn><mode>3): New.
+ 	(*<sse>_vm<multdiv_mnemonic><mode>3): Likewise.
+ 	(*ieee_<ieee_maxmin><mode>3): Likewise.
+ 	(vec_setv2df_0): Likewise.
+ 
+ 2019-06-20  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* tree-ssa-alias.c (aliasing_component_refs_p): Remove ref2_is_decl
+ 	parameter; it has no use in gimple memory model.
+ 	(indirect_ref_may_alias_decl_p): Update.
+ 
+ 2019-06-20  Martin Liska  <mliska@suse.cz>
+ 
+ 	* params.def (PARAM_HASH_TABLE_VERIFICATION_LIMIT): Decrease
+ 	to 10.
+ 
+ 2019-06-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree-vect-stmts.c (enum scan_store_kind): New type.
+ 	(scan_store_can_perm_p): Change last argument from int * to
+ 	vec<enum scan_store_kind> *, record precisely which permutations
+ 	need whole vector left shift or that plus VEC_COND_EXPR.
+ 	(vectorizable_scan_store): Adjust caller, use whole vector left shift
+ 	and additional VEC_COND_EXPR only for those iterations that need it.
+ 
+ 2019-06-20  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	* config.gcc: Fix ARM --with-fpu checking and error message.
+ 
+ 2019-06-19  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/60364 - noreturn after first decl not diagnosed.
+ 	* attribs.c (get_attribute_namespace): No longer static.
+ 	(decl_attributes): Avoid shadowing.  Preserve the C++11 form for C++11
+ 	attributes.
+ 	(attr_noreturn_exclusions): Make it extern.
+ 	* attribs.h (get_attribute_namespace): Declare.
+ 	* tree-inline.c (function_attribute_inlinable_p): Use
+ 	get_attribute_name.
+ 
+ 2019-06-19  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/90626
+ 	* tree-ssa-strlen.c (strxcmp_unequal): Fix typos.
+ 
+ 	PR tree-optimization/90626
+ 	* tree-ssa-strlen.c (strxcmp_unequal): New function.
+ 	(handle_builtin_string_cmp): Call it.
+ 
+ 2019-06-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.h (DRIVER_SELF_SPECS): Add RDYNAMIC, DARWIN_PIE_SPEC
+ 	and DARWIN_NOPIE_SPEC.
+ 	(RDYNAMIC): New, modified from DARWIN_EXPORT_DYNAMIC.
+ 	(DARWIN_PIE_SPEC): Collate from darwin.h and darwin9.h.
+ 	(DARWIN_NOPIE_SPEC): Collate from darwin10.h.
+ 	(DARWIN_NOCOMPACT_UNWIND): New from darwin10.h
+ 	(DARWIN_EXPORT_DYNAMIC): Delete.
+ 	* config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move no_compact_unwind
+ 	and pie options processing to  darwin.h.
+ 	* config/darwin9.h (DARWIN_PIE_SPEC): Move pie processing to darwin.h
+ 
+ 2019-06-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin-driver.c (darwin_driver_init): Fix off-by-one errors
+ 	in computing the number of options to be moved.
+ 
+ 2019-06-19  Maya Rashish  <coypu@sdf.org>
+ 
+ 	*  config/arm/netbsd-elf.h (SYSARCH_ARM_SYNC_ICACHE): New definition.
+ 	(CLEAR_INSN_CACHE) Use it.
+ 
+ 2019-06-19  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (cmpstrnsi): Remove dead code.
+ 
+ 2019-06-19  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	PR middle-end/84521
+ 	* builtins.c (expand_builtin_setjmp_setup): Save
+ 	hard_frame_pointer_rtx.
+ 	(expand_builtin_setjmp_receiver): Do not emit sfp = fp move since we
+ 	restore fp.
+ 	* function.c (expand_function_start): Save hard_frame_pointer_rtx for
+ 	non-local goto.
+ 	* lra-eliminations.c (eliminate_regs_in_insn): Remove sfp = fp
+ 	elimination code.
+ 	(remove_reg_equal_offset_note): Remove unused function.
+ 	* reload1.c (eliminate_regs_in_insn): Remove sfp = hfp elimination
+ 	code.
+ 	* config/arc/arc.c (TARGET_BUILTIN_SETJMP_FRAME_VALUE): Remove.
+ 	(arc_builtin_setjmp_frame_value): Remove function.
+ 	* config/avr/avr.c  (TARGET_BUILTIN_SETJMP_FRAME_VALUE): Remove.
+ 	(avr_builtin_setjmp_frame_value): Remove function.
+ 	* config/i386/i386.c (TARGET_BUILTIN_SETJMP_FRAME_VALUE): Remove.
+ 	(ix86_builtin_setjmp_frame_value): Remove function.
+ 	* config/pa/pa.md (nonlocal_goto): Remove FP adjustment.
+ 	* config/sparc/sparc.c (TARGET_BUILTIN_SETJMP_FRAME_VALUE): Remove.
+ 	(sparc_builtin_setjmp_frame_value): Remove function.
+ 	* config/vax/vax.c (TARGET_BUILTIN_SETJMP_FRAME_VALUE): Remove.
+ 	(vax_builtin_setjmp_frame_value): Remove function.
+ 	* config/xtensa/xtensa.c (xtensa_frame_pointer_required): Force frame
+ 	pointer	if has_nonlocal_label.
+ 
+ 2019-06-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* doc/md.texi: Document vec_shl_<mode> pattern.
+ 	* optabs.def (vec_shl_optab): New optab.
+ 	* optabs.c (shift_amt_for_vec_perm_mask): Add shift_optab
+ 	argument, if == vec_shl_optab, check for left whole vector shift
+ 	pattern rather than right shift.
+ 	(expand_vec_perm_const): Add vec_shl_optab support.
+ 	* optabs-query.c (can_vec_perm_var_p): Mention also vec_shl optab
+ 	in the comment.
+ 	* tree-vect-generic.c (lower_vec_perm): Support permutations which
+ 	can be handled by vec_shl_optab.
+ 	* tree-vect-stmts.c (scan_store_can_perm_p): New function.
+ 	(check_scan_store): Use it.
+ 	(vectorizable_scan_store): If target can't do normal permutations,
+ 	try to use whole vector left shifts and if needed a VEC_COND_EXPR
+ 	after it.
+ 	* config/i386/sse.md (vec_shl_<mode>): New expander.
+ 
+ 	* omp-low.c (lower_rec_input_clauses): Handle references properly
+ 	in inscan clauses.
+ 	(lower_omp_scan): Likewise.
+ 
+ 2019-06-19  Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* tree-ssa-address.c (preferred_mem_scale_factor): Handle when
+ 	mem_mode is BLKmode.
+ 
+ 2019-06-18  Max Filippov  <jcmvbkbc@gmail.com>
+ 
+ 	PR target/90922
+ 	* config/xtensa/xtensa.c (xtensa_expand_prologue): Add stack
+ 	pointer adjustment for the case of no callee-saved registers and
+ 	stack frame bigger than 128 bytes.
+ 
+ 2019-06-18  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	PR middle-end/90862
+ 	* omp-low.c (check_omp_nesting_restrictions): Handle
+ 	GF_OMP_TARGET_KIND_OACC_DECLARE.
+ 
+ 2019-06-18  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (@cmp<mode>_1): Rename from cmp<mode>_1.
+ 	(@add<mode>3_carry): Rename from add<mode>3_carry.
+ 	(@sub<mode>3_carry_ccc): Rename from sub<mode>3_carry_ccc.
+ 	(@sub<mode>3_carry_ccgz): Rename form sub<mode>3_carry_ccgz.
+ 	(@copysign<mode>3_const): Rename from copysign<mode>3_const.
+ 	(@copysign<mode>3_var): Rename from copysign<mode>3_var.
+ 	(@xorsign<mode>3_1): Rename from xorsign<mode>3_1.
+ 	(@x86_shift<mode>_adj_1): Rename from x86_shift<mode>_adj_1.
+ 	(@x86_shift<mode>_adj_2): Rename from x86_shift<mode>_adj_2.
+ 	(@x86_shift<mode>_adj_3): Rename from x86_shift<mode>_adj_3.
+ 	(cmpstrnsi): Use gen_cmp_1.
+ 	(lwp_slwpcb): Use gen_lwp_slwpcb_1.
+ 	(@lwp_slwpcb<mode>_1): Rename from lwp_slwpcb<mode>_1.
+ 	(@umonitor_<mode>): Rename from umonitor_<mode>.
+ 	* config/i386/i386-expand.c (ix86_expand_copysign):
+ 	Use gen_copysign3_const and gen_copysign3_var.
+ 	(ix86_expand_xorsign): Use gen_xorsign3_1.
+ 	(ix86_expand_branch): Use gen_sub3_carry_ccc,
+ 	gen_sub3_carry_ccgz and gen_cmp1.
+ 	(ix86_expand_int_addcc): Use gen_sub3_carry and gen_add3_carry.
+ 	(ix86_split_ashl): Use gen_x86_shift_adj_1 and gen_x86_shift_adj_2.
+ 	(ix86_split_ashr): Use gen_x86_shift_adj_1 and gen_x86_shift_adj_3.
+ 	(ix86_split_lshr): Ditto.
+ 	(ix86_expand_builtin) <case IX86_BUILTIN_UMONITOR>: Use gen_umonitor.
+ 
+ 2019-06-18  Jason Merrill  <jason@redhat.com>
+ 
+ 	* tree.c (build_constructor): Add MEM_STAT_DECL.
+ 
+ 2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-modes.def (CC_NZC): New CC_MODE.
+ 	* config/aarch64/aarch64-sve.md (*<optab><mode>3_cc)
+ 	(ptest_ptrue<mode>, while_ult<GPI:mode><PRED_ALL:mode>)
+ 	(*while_ult<GPI:mode><PRED_ALL:mode>_cc, *cmp<cmp_op><mode>)
+ 	(*cmp<cmp_op><mode>_ptest, *cmp<cmp_op><mode>_cc)
+ 	(*pred_cmp<cmp_op><mode>_combine, *pred_cmp<cmp_op><mode>)
+ 	(vec_cmp<mode><vpred>, vec_cmpu<mode><vpred>, cbranch<mode>4):
+ 	Use CC_NZC instead of CC.
+ 	* config/aarch64/aarch64.md (condjump): Print a '.' in SVE conditions.
+ 	* config/aarch64/aarch64.c (aarch64_sve_condition_codes): New variable.
+ 	(aarch64_print_operand): Handle E_CC_NZCmode.
+ 	(aarch64_emit_sve_ptrue_op_cc): Use gen_set_clobber_cc_nzc instead
+ 	of gen_set_clobber_cc.
+ 
+ 2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md: Tabify file.
+ 
+ 2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_pfalse_reg): Declare.
+ 	* config/aarch64/aarch64.c (aarch64_pfalse_reg): New function.
+ 	* config/aarch64/aarch64-sve.md: Use it.
+ 
+ 2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_ptrue_reg): Declare.
+ 	* config/aarch64/aarch64.c (aarch64_ptrue_reg): New functions.
+ 	(aarch64_expand_sve_widened_duplicate, aarch64_expand_sve_mem_move)
+ 	(aarch64_maybe_expand_sve_subreg_move, aarch64_evpc_rev_local)
+ 	(aarch64_expand_sve_vec_cmp_int): Use it.
+ 	(aarch64_expand_sve_vec_cmp_float): Likewise.
+ 	* config/aarch64/aarch64-sve.md: Likewise throughout.
+ 
+ 2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 	    Kugan Vivekanandarajah  <kuganv@linaro.org>
+ 
+ 	* config/aarch64/aarch64-sve.md (*cond_<optab><mode>_0): Delete.
+ 	(*cond_<optab><mode>_z): Fold into...
+ 	(*cond_<optab><mode>_any): ...here.  Also handle cases in which
+ 	operand 4 can be tied to operand 0 (either inherently or via RA).
+ 
+ 2019-06-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/90900
+ 	* cfgexpand.c (expand_debug_expr): Treat NOTE_P DECL_RTL
+ 	as if optimized away.
+ 
+ 2019-06-18  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx-protos.h (gen_set_softstack_insn): Remove.
+ 	* config/nvptx/nvptx.c (gen_set_softstack_insn): Remove.
+ 	* config/nvptx/nvptx.md (define_insn "set_softstack_<mode>"):
+ 	Rename to ...
+ 	(define_insn "@set_softstack_<mode>"): ... this.
+ 	(define_insn "omp_simt_enter_<mode>"): Rename to ...
+ 	(define_insn "@omp_simt_enter_<mode>"): ... this.
+ 	(define_insn "omp_simt_exit_<mode>"): Rename to ...
+ 	(define_insn "@omp_simt_exit_<mode>"): ... this.
+ 
+ 2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-loop-manip.c (vect_set_loop_masks_directly): Remove
+ 	vf parameter.  Restore the previous iv step of nscalars_step,
+ 	but give it iv_type rather than compare_type.  Tweak code order
+ 	to match the comments.
+ 	(vect_set_loop_condition_masked): Update accordingly.
+ 	* tree-vect-loop.c (vect_verify_full_masking): Use "unsigned int"
+ 	for iv_precision.  Tweak comment formatting.
+ 
+ 2019-06-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c: Strip trailing whitespace.
+ 
+ 2019-06-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (darwin_emit_unwind_label): New default to false.
+ 	(darwin_override_options): Set darwin_emit_unwind_label as needed.
+ 
+ 2019-06-18  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/90889
+ 	* ipa-cp.c (ignore_edge_p): Do not ignore edges when only the
+ 	caller does not have flag_ipa_cp set.
+ 
+ 2019-06-18  Alejandro Martinez  <alejandro.martinezvicente@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (mask_fold_left_plus_<mode>): Renamed
+ 	from "*fold_left_plus_<mode>", updated operands order.
+ 	* doc/md.texi (mask_fold_left_plus_@var{m}): Documented new optab.
+ 	* internal-fn.c (mask_fold_left_direct): New define.
+ 	(expand_mask_fold_left_optab_fn): Likewise.
+ 	(direct_mask_fold_left_optab_supported_p): Likewise.
+ 	* internal-fn.def (MASK_FOLD_LEFT_PLUS): New internal function.
+ 	* optabs.def (mask_fold_left_plus_optab): New optab.
+ 	* tree-vect-loop.c (mask_fold_left_plus_optab): New function to get a
+ 	masked internal_fn for a reduction ifn.
+ 	(vectorize_fold_left_reduction): Add support for masking reductions.
+ 
+ 2019-06-18  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	PR middle-end/80791
+ 	* target.def (predict_doloop_p): New hook.
+ 	* targhooks.h (default_predict_doloop_p): New declaration.
+ 	* targhooks.c (default_predict_doloop_p): New function.
+ 	* doc/tm.texi.in (TARGET_PREDICT_DOLOOP_P): New hook.
+ 	* doc/tm.texi: Regenerate.
+ 	* config/rs6000/rs6000.c (rs6000_predict_doloop_p): New function.
+ 	(TARGET_PREDICT_DOLOOP_P): New macro.
+ 	* tree-ssa-loop-ivopts.c (generic_predict_doloop_p): New function.
+ 
+ 2019-06-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* omp-low.c (struct omp_context): Add scan_inclusive field.
+ 	(scan_omp_1_stmt) <case GIMPLE_OMP_SCAN>: Set ctx->scan_inclusive
+ 	if inclusive scan.
+ 	(struct omplow_simd_context): Add lastlane member.
+ 	(lower_rec_simd_input_clauses): Add rvar argument, handle inscan
+ 	reductions.  Build 2 or 3 argument .GOMP_SIMD_LANE calls rather than
+ 	1 or 2 argument.
+ 	(lower_rec_input_clauses): Handle inscan reductions in simd contexts.
+ 	(lower_lastprivate_clauses): Set TREE_THIS_NOTRAP on the ARRAY_REF.
+ 	(lower_omp_scan): New function.
+ 	(lower_omp_1) <case GIMPLE_OMP_SCAN>: Use lower_omp_scan.
+ 	* tree-ssa-dce.c (eliminate_unnecessary_stmts): For IFN_GOMP_SIMD_LANE
+ 	check 3rd argument if present rather than 2nd.
+ 	* tree-vectorizer.h (struct _loop_vec_info): Add scan_map member.
+ 	(struct _stmt_vec_info): Change simd_lane_access_p from bool into
+ 	2-bit bitfield.
+ 	* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
+ 	scan_map.  For IFN_GOMP_SIMD_LANE check 3rd argument if present rather
+ 	than 2nd.
+ 	(_loop_vec_info::~_loop_vec_info): Delete scan_map.
+ 	* tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Allow two
+ 	different STMT_VINFO_SIMD_LANE_ACCESS_P refs if they have the same
+ 	init.
+ 	(vect_find_stmt_data_reference): Encode in ->aux the 2nd
+ 	IFN_GOMP_SIMD_LANE argument.
+ 	(vect_analyze_data_refs): Set STMT_VINFO_SIMD_LANE_ACCESS_P from the
+ 	encoded ->aux value.
+ 	* tree-vect-stmts.c: Include attribs.h.
+ 	(vectorizable_call): Adjust comment about IFN_GOMP_SIMD_LANE.
+ 	(scan_operand_equal_p, check_scan_store, vectorizable_scan_store): New
+ 	functions.
+ 	(vectorizable_load): For STMT_VINFO_SIMD_LANE_ACCESS_P tests use != 0.
+ 	(vectorizable_store): Handle STMT_VINFO_SIMD_LANE_ACCESS_P > 1.
+ 
+ 2019-06-17  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/62055
+ 	* config/i386/i386.md (*nabstf2_1): New insn pattern.
+ 	(*nabs<mode>2_1): Ditto.
+ 	(nabs sse-reg splitter): New splitter.
+ 	* config/i386/sse.md (*nabs<mode>2): New insn_and_split pattern.
+ 
+ 2019-06-17  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR bootstrap/90873.
+ 	* tree-ssa-alias.c (indirect_ref_may_alias_decl_p): Fix
+ 	TMR index check.
+ 
+ 2019-06-17  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx-protos.h (gen_set_softstack_insn): Declare.
+ 	* config/nvptx/nvptx.c (gen_set_softstack_insn): New function.
+ 	* config/nvptx/nvptx.md (define_insn "set_softstack_insn"): Rename to
+ 	...
+ 	(define_insn "set_softstack_<mode>"): ... this.  Use P iterator on
+ 	match_operand 0.
+ 	(define_insn "omp_simt_enter_insn"): Rename to ...
+ 	(define_insn "omp_simt_enter_<mode>"): ... this.  Use P iterator on
+ 	match_operand 0, 1 and 2, as well as the unspec_volatile result.
+ 	(define_expand "omp_simt_enter): Use gen_omp_simt_enter_di and
+ 	gen_omp_simt_enter_si.
+ 	(define_expand "omp_simt_exit"): New.
+ 	(define_insn "omp_simt_exit"): Rename to ...
+ 	(define_insn "omp_simt_exit_<mode>"): ... this.  Use P iterator on
+ 	match_operand 0.
+ 
+ 2019-06-17  Matthew Green  <mrg@eterna.com.au>
+ 	    Maya Rashish  <coypu@sdf.org>
+ 
+ 	* config.gcc (aarch64*-*-netbsd*): New target.
+ 	* config/aarch64/aarch64-netbsd.h: New file.
+ 	* config/aarch64/t-aarch64-netbsd: Likewise.
+ 
+ 2019-06-17  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (aliasing_component_refs_p): Consider only
+ 	the access path from base to first VIEW_CONVERT_EXPR or
+ 	BIT_FIELD_REF.
+ 
+ 2019-06-17  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (nonoverlapping_component_refs_p): Also truncate
+ 	access path on BIT_FIELD_REFs.
+ 
+ 2019-06-17  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/90874
+ 	* ipa-utils.h (odr_type_p): Remove dead code.
+ 
+ 2019-06-17  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* configure.ac (ld_vers) <*-*-solaris2*>: Remove support for
+ 	alternative Solaris 11.4 format.
+ 	* configure: Regenerate.
+ 
+ 2019-06-17  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.md (define_insn "call_insn"): Rename to ...
+ 	(define_insn "call_insn_<mode>"): ... this.  Use P iterator on
+ 	match_operand 0.
+ 	(define_insn "call_value_insn"): Rename to ...
+ 	(define_insn "call_value_insn_<mode>"): this.  Use P iterator on
+ 	match_operand 0.
+ 	(define_insn "nvptx_red_partition"): Set unspec_volatile result mode to
+ 	DI.
+ 
+ 2019-06-16  John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	PR middle-end/64242
+ 	* config/pa/pa.md (nonlocal_goto): Restore frame pointer last.  Add
+ 	frame clobbers and schedule block.
+ 	(builtin_longjmp): Likewise.
+ 
+ 2019-06-16  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.c (msp430_expand_helper): Setup arguments which
+ 	describe how to perform MSPABI compliant 64-bit shift.
+ 	* config/msp430/msp430.md (ashldi3): New define_expand.
+ 	(ashrdi3): New define_expand.
+ 	(lshrdi3): New define_expand.
+ 
+ 2019-06-16  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* doc/sourcebuild.texi: Document new effective target keyword
+ 	longlong64.
+ 
+ 2019-06-16  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (indirect_ref_may_alias_decl_p,
+ 	indirect_refs_may_alias_p): Revert accidental commits.
+ 
+ 	* tree-ssa-alias.c (aliasing_component_refs_p): Watch for arrays
+ 	at the end of structures.
+ 
+ 2019-06-16  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (machopic_indirect_call_target): Use renamed
+ 	darwin_picsymbol_stubs to decide on output.
+ 	(darwin_override_options): Handle darwin_picsymbol_stubs.
+ 	* config/darwin.h (MIN_LD64_OMIT_STUBS): New.
+ 	(LD64_VERSION): Revise default.
+ 	* config/darwin.opt: (mpic-symbol-stubs): New option.
+ 	(darwin_picsymbol_stubs): New variable.
+ 	* config/i386/darwin.h (TARGET_MACHO_BRANCH_ISLANDS):
+ 	rename to TARGET_MACHO_PICSYM_STUBS.
+ 	* config/i386/i386.c (output_pic_addr_const): Likewise.
+ 	* config/i386/i386.h Likewise.
+ 	* config/rs6000/darwin.h: Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_call_darwin_1): Use renamed
+ 	darwin_picsymbol_stubs.
+ 
+ 2019-06-16  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.opt (prebind, noprebind, seglinkedit,
+ 	noseglinkedit): Add RejectNegative.
+ 
+ 2019-06-16  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (nonoverlapping_component_refs_p): Fix pasto
+ 	in my previous patch.
+ 
+ 2019-06-16  Tom de Vries  <tdevries@suse.de>
+ 
+ 	PR tree-optimization/89376
+ 	* tree-parloops.c (oacc_entry_exit_ok_1): Handle red == NULL.
+ 
+ 2019-06-15  Maya Rashish  <coypu@sdf.org>
+ 
+ 	* doc/invoke.texi (Spec Files): Update location of the
+ 	Fortran spec file.
+ 
+ 2019-06-15  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* doc/extend.texi (Common Function Attributes): Clarify
+ 	no_sanitize.  Fix grammar.
+ 
+ 2019-06-15  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (alias_stats): Add
+ 	nonoverlapping_component_refs_p_may_alias,
+ 	nonoverlapping_component_refs_p_no_alias,
+ 	nonoverlapping_component_refs_of_decl_p_may_alias,
+ 	nonoverlapping_component_refs_of_decl_p_no_alias.
+ 	(dump_alias_stats): Dump them.
+ 	(nonoverlapping_component_refs_of_decl_p): Add stats.
+ 	(nonoverlapping_component_refs_p): Add stats; do not stop on first
+ 	ARRAY_REF.
+ 
+ 2019-06-15  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (and<mode>3): Generate zero-extends for
+ 	TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun))
+ 	only.
+ 	(*anddi3_doubleword): Split before reload. Merge with
+ 	anddi->zext pre-reload splitter.
+ 	(*andndi3_doubleword): Split before reload.
+ 	(*<code>di3_doubleword): Ditto.
+ 	(*one_cmpldi2_doubleword): Ditto.
+ 
+ 2019-06-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/90779
+ 	* gimplify.c: Include omp-offload.h and context.h.
+ 	(gimplify_bind_expr): Add "omp declare target" attributes
+ 	to static block scope variables inside of target region or target
+ 	functions.
+ 
+ 2019-06-15  Tom de Vries  <tdevries@suse.de>
+ 
+ 	PR tree-optimization/90009
+ 	* tree-ssa-threadbackward.c (thread_jumps::profitable_jump_thread_path):
+ 	Return NULL if bb contains IFN_UNIQUE.
+ 
+ 2019-06-14  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (CCEITHER): New define_mode_iterator.
+ 	(un): New define_mode_attr.
+ 	(isel_signed_<mode>, isel_unsigned_<mode>): Delete, merge into ...
+ 	(isel_<un>signed_<GPR:mode>): ... this.  New define_insn.
+ 	(isel_reversed_signed_<mode>, isel_reversed_unsigned_<mode>): Delete,
+ 	merge into ...
+ 	(isel_reversed_<un>signed_<GPR:mode>): ... this.  New define_insn.
+ 
+ 2019-06-14  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.opt: Add RejectNegative where needed, reorder
+ 	and add minimal functional descriptions.
+ 
+ 2019-06-14  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR rtl-optimization/90765
+ 	* calls.c (update_stack_alignment_for_call): New function.
+ 	(expand_call): Call update_stack_alignment_for_call when
+ 	outgoing parameter is passed in the stack.
+ 	(emit_library_call_value_1): Likewise.
+ 	* function.c (locate_and_pad_parm): Don't update
+ 	stack_alignment_needed and preferred_stack_boundary.
+ 
+ 2019-06-14  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/90877
+ 	* config/i386/i386-features.c
+ 	(dimode_scalar_chain::compute_convert_gain): Replace
+ 	mmxsse_to_integer with sse_to_integer.
+ 	* config/i386/i386.c (ix86_register_move_cost): Verify that
+ 	moves between MMX and non-MMX units require secondary memory.
+ 	Correct costs of moves between SSE and integer units.
+ 	* config/i386/i386.h (processor_costs): Rename cost of moving
+ 	SSE register to integer to sse_to_integer.  Rename cost of
+ 
+ 2019-06-14  Matt Thomas  <matt@3am-software.com>
+ 	    Matthew Green  <mrg@eterna.com.au>
+ 	    Nick Hudson  <skrll@netbsd.org>
+ 	    Maya Rashish  <coypu@sdf.org>
+ 	    Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* config.gcc (arm*-*-netbsdelf*) Add support for EABI configuration.
+ 	* config.host (arm*-*-netbsd*): Use driver-arm.o on native NetBSD.
+ 	* config/arm/netbsd-eabi.h: New file.
+ 	* config/arm/netbsd-elf.h (TARGET_OS_CPP_BUILTINS): Undefine before
+ 	redefining.
+ 	(SUBTARGET_EXTRA_ASM_SPEC): Don't pass -matpcs to the assembler.
+ 	* config/netbsd-elf.h (NETBSD_LINK_LD_ELF_SO_SPEC): New define.
+ 	(NETBSD_SUBTARGET_EXTRA_SPECS): New define.
+ 	(SUBTARGET_EXTRA_SPECS): Define to NETBSD_SUBTARGET_EXTRA_SPECS.
+ 
+ 2019-06-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-loop-distribution.c (classify_partition): Return
+ 	whether a reduction appeared in all partitions and do not
+ 	stop builtin detection because of this.
+ 	(distribute_loop): Sort a non-builtin partition last if
+ 	there's a reduction in all partitions and make sure the
+ 	partition prevailing as last is not a builtin.
+ 
+ 2019-06-14  Feng Xue  <fxue@os.amperecomputing.com>
+ 
+ 	PR ipa/90401
+ 	* ipa-prop.c (add_to_agg_contents_list): New function.
+ 	(clobber_by_agg_contents_list_p): Likewise.
+ 	(extract_mem_content): Likewise.
+ 	(get_place_in_agg_contents_list): Delete.
+ 	(determine_known_aggregate_parts): Renamed from
+ 	determine_locally_known_aggregate_parts.  New parameter
+ 	aa_walk_budget_p.
+ 
+ 2019-06-13  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/90662
+ 	* tree-ssa-strlen.c (get_stridx): Convert fold_build2 operands
+ 	to the same type.
+ 
+ 2019-06-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR bootstrap/90873
+ 	* tree-ssa-alias.c (indirect_ref_may_alias_decl_p): Also check that
+ 	dbase is not TARGET_MEM_REF.
+ 
+ 2019-06-13  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (SWIM1248s): Rename from SWIM1248x.
+ 	Update all uses.
+ 	(and<mode>3): Use gen_extend_insn instead of indirect functions.
+ 	Do not generate DImode extends for 32bit targets.
+ 	(and->zext post-reload splitter): Use gen_extend_insn
+ 	instead of indirect functions.
+ 	(anddi->zext pre-reload splitter): New.
+ 	(*zext<mode>_doubleword_and): Remove.
+ 	(*zext<mode>_doubleword): Ditto.
+ 	(*zextsi_doubleword): Dittto.
+ 
+ 2019-06-13  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386-expand.c (ix86_expand_int_sse_cmp):
+ 	Use gen_sub3_insn instead of indirect function.
+ 	(ix86_expand_ashl_const): Use gen_add2_insn instead of
+ 	indirect function.
+ 	(ix86_adjust_counter): Ditto.
+ 
+ 2019-06-13  Jiufu Guo  <guojiufu@linux.ibm.com>
+ 	    Lijia He  <helijia@linux.ibm.com>
+ 
+ 	PR tree-optimization/77820
+ 	* tree-ssa-threadedge.c
+ 	(edge_forwards_cmp_to_conditional_jump_through_empty_bb_p): New
+ 	function.
+ 	(thread_across_edge): Add call to
+ 	edge_forwards_cmp_to_conditional_jump_through_empty_bb_p.
+ 
+ 2019-06-13  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin-driver.c (validate_macosx_version_min): New.
+ 	(darwin_default_min_version): Cleanup and validate supplied version.
+ 	(darwin_driver_init): Likewise and push cleaned version into opts.
+ 
+ 2019-06-13  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR tree-optimization/90869
+ 	* tree-ssa-alias.c (indirect_ref_may_alias_decl_p): Watch for view
+ 	converts in MEM_REF referencing decl rather than view converts
+ 	from decl type to MEM_REF type.
+ 
+ 2019-06-13  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90856
+ 	* tree-sra.c (build_ref_for_model): Only use
+ 	build_reconstructed_reference when address-spaces are the same.
+ 
+ 2019-06-13  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* config/nvptx/nvptx.c (nvptx_sese_number, nvptx_sese_pseudo): Don't
+ 	wrap ei variable name in the declaration in ()s.
+ 	(nvptx_single): Actually use mode_label variable.  Formatting fix.
+ 
+ 2019-06-13  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vectorizer.h (vect_loop_vectorized_call): Declare.
+ 	* tree-vectorizer.c (vect_loop_vectorized_call): Export and
+ 	also return the condition stmt.
+ 	* tree-vect-loop-manip.c (vect_loop_versioning): Compute outermost
+ 	loop we can version and version that, reusing the loop version
+ 	created by if-conversion instead of versioning again.
+ 
+ 2019-06-13  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* gimple-loop-versioning.cc (prune_loop_conditions): Use
+ 	may_contain_p.
+ 	* tree-vrp (value_range_base::may_contain_p): Call into
+ 	value_inside_range.
+ 	(value_inside_range): Make private inside value_range_base class.
+ 	Take min/max from *this.
+ 	(range_includes_p): Remove.
+ 	* tree-vrp.h (value_range_base): Add value_inside_range.
+ 	(range_includes_p): Remove.
+ 	(range_includes_zero_p): Call may_contain_p.
+ 	* vr-values.c (compare_range_with_value): Same.
+ 
+ 2019-06-13  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* doc/extend.texi (ARC Function Attributes): Update info.
+ 
+ 2019-06-13  Feng Xue  <fxue@os.amperecomputing.com>
+ 
+ 	PR tree-optimization/89713
+ 	* doc/invoke.texi (-ffinite-loops): Document new option.
+ 	* common.opt (-ffinite-loops): New option.
+ 	* tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Mark
+ 	IFN_GOACC_LOOP calls as necessary.
+ 	* tree-ssa-loop-niter.c (finite_loop_p): Assume loop with an exit
+ 	is finite.
+ 	* omp-offload.c (oacc_xform_loop): Skip lowering if return value of
+ 	IFN_GOACC_LOOP call is not used.
+ 	* opts.c (default_options_table): Enable -ffinite-loops at -O2+.
+ 
+ 2019-06-13  Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	PR target/88838
+ 	* tree-vect-loop-manip.c (vect_set_loop_masks_directly): If the
+ 	compare_type is not with Pmode size, we will create an IV with
+ 	Pmode size with truncated use (i.e. converted to the correct type).
+ 	* tree-vect-loop.c (vect_verify_full_masking): Find IV type.
+ 	(vect_iv_limit_for_full_masking): New. Factored out of
+ 	vect_set_loop_condition_masked.
+ 	* tree-vectorizer.h (LOOP_VINFO_MASK_IV_TYPE): New.
+ 	(vect_iv_limit_for_full_masking): Declare.
+ 
+ 2019-06-13  Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	PR target/88834
+ 	* tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle
+ 	IFN_MASK_LOAD_LANES and IFN_MASK_STORE_LANES.
+ 	(get_alias_ptr_type_for_ptr_address): Likewise.
+ 	(add_iv_candidate_for_use): Add scaled index candidate if useful.
+ 	* tree-ssa-address.c (preferred_mem_scale_factor): New.
+ 	* config/aarch64/aarch64.c (aarch64_classify_address): Relax
+ 	allow_reg_index_p.
+ 
+ 2019-06-13  Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+ 
+ 	* config/aarch64/iterators.md (ADDSUB): Fix typo in comment.
+ 
+ 2019-06-12  Dimitar Dimitrov  <dimitar@dinux.eu>
+ 
+ 	* common/config/pru/pru-common.c: New file.
+ 	* config.gcc: Add PRU target.
+ 	* config/pru/alu-zext.md: New file.
+ 	* config/pru/constraints.md: New file.
+ 	* config/pru/predicates.md: New file.
+ 	* config/pru/pru-opts.h: New file.
+ 	* config/pru/pru-passes.c: New file.
+ 	* config/pru/pru-pragma.c: New file.
+ 	* config/pru/pru-protos.h: New file.
+ 	* config/pru/pru.c: New file.
+ 	* config/pru/pru.h: New file.
+ 	* config/pru/pru.md: New file.
+ 	* config/pru/pru.opt: New file.
+ 	* config/pru/t-pru: New file.
+ 	* doc/extend.texi: Document PRU pragmas.
+ 	* doc/invoke.texi: Document PRU-specific options.
+ 	* doc/md.texi: Document PRU asm constraints.
+ 
+ 2019-06-12  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/90676
+ 	* tree-pretty-print.c (dump_mem_ref): New function.  Include
+ 	MEM_REF type in output when different size than operand.
+ 	(dump_generic_node): Move code to dump_mem_ref and call it.
+ 
+ 2019-06-12  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/90662
+ 	* tree-ssa-strlen.c (get_stridx): Handle simple VLAs and pointers
+ 	to arrays.
+ 
+ 2019-06-12  Tom de Vries  <tdevries@suse.de>
+ 
+ 	PR tree-optimization/90009
+ 	* config/nvptx/nvptx.c (nvptx_find_par): Assert fork has at most join.
+ 
+ 2019-06-12  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ggc-common.c (ggc_prune_overhead_list): Do not sanitize
+ 	the created map.
+ 	* hash-map.h: Add sanitize_eq_and_hash into ::hash_map.
+ 	* mem-stats.h (mem_alloc_description::mem_alloc_description):
+ 	Do not sanitize created maps.
+ 
+ 2019-06-12  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* gimple-ssa-evrp.c (evrp_dom_walker::before_dom_children): Use
+ 	value_range::singleton_p.
+ 	* tree-vrp.c (value_range_constant_singleton): Remove.
+ 	* tree-vrp.h (value_range_constant_singleton): Remove.
+ 	* vr-values.c (vr_values::singleton): Use
+ 	value_range::singleton_p.
+ 
+ 2019-06-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/90811
+ 	* cfgexpand.c (align_local_variable): Add really_expand argument,
+ 	don't SET_DECL_ALIGN if it is false.
+ 	(add_stack_var): Add really_expand argument, pass it through to
+ 	align_local_variable.
+ 	(expand_one_stack_var_1): Pass true as really_expand to
+ 	align_local_variable.
+ 	(expand_one_ssa_partition): Pass true as really_expand to
+ 	add_stack_var.
+ 	(expand_one_var): Pass really_expand through to add_stack_var.
+ 
+ 2019-06-12  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>
+ 
+ 	* config/arm/iterators.md (VABAL): New int iterator.
+ 	* config/arm/neon.md (<sup>sadv16qi): New define_expand.
+ 	* config/arm/unspecs.md ("unspec"): Define UNSPEC_VABAL_S,
+ 	UNSPEC_VABAL_U values.
+ 
+ 2019-06-12  Martin Liska  <mliska@suse.cz>
+ 
+ 	* value-prof.c (stream_out_histogram_value): Only first value
+ 	can't be negative.
+ 
+ 2019-06-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/90760
+ 	* symtab.c (symtab_node::set_section): Allow being called on aliases
+ 	as long as they aren't analyzed yet.
+ 
+ 2019-06-11  Faraz Shahbazker  <fshahbazker@wavecomp.com>
+ 
+ 	* config/mips/mips.c (mips_final_postscan_insn): Modify call
+ 	to `mips_set_text_contents_type' to indicate whether a
+ 	non-debug insn follows.
+ 
+ 2019-06-11  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Delete
+ 	enabling -mpcrel by default.
+ 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Update
+ 	test for -mpcrel and/or -mprefixed-addr needing -mcpu=future, so
+ 	that the test against -mcpu=future is done first.  Then test if
+ 	-mprefixed-addr is on for -mpcrel.
+ 	(rs6000_disable_incompatible_switches): Add -mcpu=future support.
+ 
+ 2019-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/90811
+ 	* config/nvptx/nvptx.c (nvptx_output_softstack_switch): Use and.b%d
+ 	instead of and.u%d.
+ 
+ 2019-06-11  Marc Glisse  <marc.glisse@inria.fr>
+ 
+ 	* match.pd (X/[ex]4<Y/[ex]4): Handle conversions.
+ 
+ 2019-06-11  Matthew Beliveau  <mbelivea@redhat.com>
+ 
+ 	PR c++/90449 - add -Winaccessible-base option.
+ 	* doc/invoke.texi (Winaccessible-base): Document.
+ 
+ 2019-06-11  Marc Glisse  <marc.glisse@inria.fr>
+ 
+ 	PR tree-optimization/62041
+ 	* fold-const.c (fold_real_zero_addition_p): Handle vectors.
+ 
+ 2019-06-11  Jason Merrill  <jason@redhat.com>
+ 
+ 	* gdbhooks.py (TreePrinter.to_string): Recognize ggc_free'd memory.
+ 	* tree.c (get_tree_code_name): Likewise.
+ 	* print-tree.c (print_node): Only briefly print a node with an
+ 	invalid code.
+ 
+ 2019-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR bootstrap/90819
+ 	* trans-mem.c (tm_memopt_compute_available): Add assertion
+ 	that blocks is not empty.  Formatting fix.
+ 
+ 2019-06-11  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR c++/87847
+ 	* hash-table.h: Extend create_gcc, add one parameter
+ 	that is passed into hash_table::hash_table.
+ 
+ 2019-06-10  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386-protos.h (ix86_split_fp_absneg_operator):
+ 	New prototype.
+ 	* config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
+ 	Emit clobber also for non-sse operations.
+ 	(ix86_split_fp_absneg_operator): New function.
+ 	* config/i386/i386.md (SSEMODEF): New mode iterator.
+ 	(ssevecmodef): New mode attribute.
+ 	(<code>tf2): Use absneg code iterator.
+ 	(*<code>tf2_1): Rename from *absnegtf3_sse. Use absneg code iterator.
+ 	Add three-operand AVX alternatives.
+ 	(*<code><mode>2_i387_1): Rename from *absnegxf2_i387.
+ 	Use absneg code iterator and X87MODEF mode iterator.
+ 	(absneg fp_reg non-sse splitter): Call absneg code iterator
+ 	and X87MODEF mode iterator.
+ 	(absneg general_reg non-sse splitter): Use absneg code iterator
+ 	and X87MODEF mode iterator.  Use ix86_split_fp_absneg_operator.
+ 	(*<code><mode>2_1): Rename from *absneg<mode>2.  Use absneg
+ 	code iterator.  Add three-operand AVX alternative.
+ 	(absneg sse_reg splitter): Use absneg code iterator
+ 	and SSEMODEF mode iterator.  Handle AVX operands.
+ 	(absneg fp_reg splitter): Use absneg code iterator
+ 	and MODEF mode iterator.
+ 	(absneg general_reg splitter): Merge splitters using MODEF mode
+ 	iterator.  Use absneg code iterator.  Call
+ 	ix86_split_fp_absneg_operator.
+ 	(*<code><mode>2_i387): Rename from *<code><mode>2_1.
+ 	Do not enable for non-sse modes before reload.
+ 	(CSGNMODE): Remove.
+ 	(CSGNVMODE): Ditto.
+ 	(copysing<mode>3): Use SSEMODEF instead of CSGNMODE and
+ 	ssevecmodef mode attribute instaed of CSGNVMODE.
+ 	(copysign<mode>3_const): Ditto.
+ 	(copysign<mode>3_var): Ditto.
+ 	* config/i386/i386.md (*<code><mode>2): Rename from *absneg<mode>2.
+ 	Use absneg code iterator.  Simplify code using std::swap.
+ 	* config/i386/predicates.md (absneg_operator): Remove.
+ 
+ 2019-06-10  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* gimple-fold.c (get_range_strlen): Update comment that didn't
+ 	make it into r267503 or related commits.
+ 
+ 2019-06-10  Vladislav Ivanishin  <vlad@ispras.ru>
+ 
+ 	* gcov-tool.c (merge_usage, rewrite_usage): Mark with
+ 	ATTRIBUTE_NORETURN thus making consistent with overlap_usage.
+ 
+ 2019-06-10  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree.def (OMP_SCAN): New tree code.
+ 	* tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_INCLUSIVE and
+ 	OMP_CLAUSE_EXCLUSIVE.
+ 	* tree.h (OMP_CLAUSES): Use OMP_SCAN instead of OMP_TASKGROUP.
+ 	(OMP_SCAN_BODY, OMP_SCAN_CLAUSES): Define.
+ 	* tree.c (omp_clause_num_ops, omp_clause_code_name): Add entries for
+ 	OMP_CLAUSE_{IN,EX}CLUSIVE.
+ 	(walk_tree_1): Handle OMP_CLAUSE_{IN,EX}CLUSIVE.
+ 	* tree-nested.c (convert_nonlocal_reference_stmt,
+ 	convert_local_reference_stmt, convert_gimple_call): Handle
+ 	GIMPLE_OMP_SCAN.
+ 	* tree-pretty-print.c (dump_omp_clause): Handle
+ 	OMP_CLAUSE_{IN,EX}CLUSIVE.
+ 	(dump_generic_node): Handle OMP_SCAN.
+ 	* gimple.def (GIMPLE_OMP_SCAN): New gimple code.
+ 	* gimple.h (gomp_scan): New type.
+ 	(is_a_helper <gomp_scan *>::test,
+ 	is_a_helper <const gomp_scan *>::test): New templates.
+ 	(gimple_build_omp_scan): Declare.
+ 	(gimple_omp_scan_clauses, gimple_omp_scan_clauses_ptr,
+ 	gimple_omp_scan_set_clauses): New inline functions.
+ 	(CASE_GIMPLE_OMP): Add case GIMPLE_OMP_SCAN:.
+ 	* gimple.c (gimple_build_omp_scan): New function.
+ 	(gimple_copy): Handle GIMPLE_OMP_SCAN.
+ 	* gimple-walk.c (walk_gimple_op, walk_gimple_stmt): Likewise.
+ 	* gimple-pretty-print.c (dump_gimple_omp_block): Don't handle
+ 	GIMPLE_OMP_TASKGROUP.
+ 	(dump_gimple_omp_scan): New function.
+ 	(pp_gimple_stmt_1): Handle GIMPLE_OMP_SCAN.
+ 	* gimple-low.c (lower_stmt): Handle GIMPLE_OMP_SCAN.
+ 	* tree-inline.c (remap_gimple_stmt, estimate_num_insns): Likewise.
+ 	* gimplify.c (enum gimplify_omp_var_data): Add GOVD_REDUCTION_INSCAN.
+ 	(is_gimple_stmt): Handle OMP_SCAN.
+ 	(gimplify_scan_omp_clauses): Reject inscan reductions on constructs
+ 	other than OMP_FOR or OMP_SIMD.  Handle OMP_CLAUSE_{IN,EX}CLUSIVE.
+ 	(gimplify_adjust_omp_clauses): Diagnose inscan reductions not
+ 	mentioned in nested #pragma omp scan.  Handle
+ 	OMP_CLAUSE_{IN,EX}CLUSIVE.
+ 	(gimplify_expr): Handle OMP_SCAN.
+ 	* omp-low.c (check_omp_nesting_restrictions): For parent context,
+ 	look through GIMPLE_OMP_SCAN context.  Allow #pragma omp scan in
+ 	simd constructs.
+ 	(scan_omp_1_stmt, lower_omp_1, diagnose_sb_1, diagnose_sb_2): Handle
+ 	GIMPLE_OMP_SCAN.
+ 
+ 2019-06-10  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-cp.c (ignore_edge_p): New function.
+ 	(build_toporder_info): Use it.
+ 	* ipa-inline.c (ignore_edge_p): New function.
+ 	(inline_small_functions): Use it.
+ 	* ipa-pure-const.c (ignore_edge_for_nothrow):
+ 	Verify opt_for_fn for caller and callee.
+ 	(ignore_edge_for_pure_const): Likewise.
+ 	* ipa-reference.c (ignore_edge_p): Extend to check
+ 	for opt_for_fn.
+ 	* ipa-utils.c (searchc): Refactor.
+ 	* ipa-utils.h: Fix coding style.
+ 
+ 2019-06-10  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.c (arc_rtx_costs): Update costs.
+ 
+ 2019-06-10  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc-protos.h (arc_check_ior_const): Declare.
+ 	(arc_split_ior): Likewise.
+ 	(arc_check_mov_const): Likewise.
+ 	(arc_split_mov_const): Likewise.
+ 	* config/arc/arc.c (arc_print_operand): Fix 'z' letter.
+ 	(arc_rtx_costs): Replace check Crr with Cax constraint.
+ 	(prepare_move_operands): Cleanup, remove unused code.
+ 	(arc_split_ior): New function.
+ 	(arc_check_ior_const): Likewise.
+ 	(arc_split_mov_const): Likewise.
+ 	(arc_check_mov_const): Likewise.
+ 	* config/arc/arc.md (movsi_insn): Restructure it, and convert it
+ 	in define_insn_and_split pattern.
+ 	(iorsi3): Likewise.
+ 	(mulsi3_v2): Add new matching variant.
+ 	(andsi3_i): Cleanup pattern.
+ 	(rotrsi3_cnt1): Update pattern.
+ 	(rotrsi3_cnt8): New pattern.
+ 	(ashlsi2_cnt8): Likewise.
+ 	(ashlsi2_cnt16): Likewise.
+ 	* config/arc/constraints.md (C0p): Update constraint.
+ 	(Crr): Remove it.
+ 	(C0x): New pattern.
+ 	(Cax): New pattern.
+ 
+ 2019-06-10  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf.c (sem_item_optimizer::parse_nonsingleton_classes):
+ 	Update coding style.
+ 	(sem_item_optimizer::dump_cong_classes):
+ 	Print how many items are in a non-singular class.  Improve
+ 	coding style.
+ 
+ 2019-06-10  Martin Liska  <mliska@suse.cz>
+ 
+ 	* value-prof.c (dump_histogram_value): Change dump format.
+ 	(gimple_mod_subtract_transform): Remove legacy comment.
+ 
+ 2019-06-10  Martin Liska  <mliska@suse.cz>
+ 
+ 	* value-prof.c (dump_histogram_value): Print histogram values
+ 	only if present.
+ 
+ 2019-06-10  Martin Liska  <mliska@suse.cz>
+ 
+ 	* gcov-io.h (GCOV_DISK_SINGLE_VALUES): New.
+ 	(GCOV_SINGLE_VALUE_COUNTERS): Likewise.
+ 	* ipa-profile.c (ipa_profile_generate_summary):
+ 	Use get_most_common_single_value.
+ 	* tree-profile.c (gimple_init_gcov_profiler):
+ 	Instrument with __gcov_one_value_profiler_v2
+ 	and __gcov_indirect_call_profiler_v4.
+ 	* value-prof.c (dump_histogram_value):
+ 	Print all values for HIST_TYPE_SINGLE_VALUE.
+ 	(stream_out_histogram_value): Update assert for
+ 	N values.
+ 	(stream_in_histogram_value): Set number of
+ 	counters for HIST_TYPE_SINGLE_VALUE.
+ 	(get_most_common_single_value): New.
+ 	(gimple_divmod_fixed_value_transform):
+ 	Use get_most_common_single_value.
+ 	(gimple_ic_transform): Likewise.
+ 	(gimple_stringops_transform): Likewise.
+ 	(gimple_find_values_to_profile): Set number
+ 	of counters for HIST_TYPE_SINGLE_VALUE.
+ 	* value-prof.h (get_most_common_single_value): New.
+ 
+ 2019-06-10  Martin Liska  <mliska@suse.cz>
+ 
+ 	* hash-map.h: Pass default value to hash_table ctor.
+ 	* hash-table.h: Add default value to call of a ctor.
+ 
+ 2019-06-08  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/invoke.texi (C Dialect Options): Minor grammatical change.
+ 	(x86 Options): Replace all uses of "PCL_MUL" with "PCLMUL"
+ 
+ 2019-06-07  John David Anglin  <danglin@gcc.gnu.orig>
+ 
+ 	PR target/90751
+ 	* config/pa/pa-linux.h (ASM_DECLARE_FUNCTION_NAME): Update comment.
+ 	Call pa_output_function_label.
+ 	(TARGET_ASM_FUNCTION_PROLOGUE): define.
+ 	* config/pa/pa-protos.h (pa_output_function_label): Declare.
+ 	* config/pa/pa.c (pa_output_function_prologue): Add ATTRIBUTE_UNUSED
+ 	to declaration.
+ 	(pa_linux_output_function_prologue): Declare.
+ 	(TARGET_ASM_FUNCTION_PROLOGUE): Delete define.
+ 	(pa_output_function_label): New.
+ 	(pa_output_function_prologue): Revise to use pa_output_function_label.
+ 	(pa_linux_output_function_prologue): New.
+ 	* config/pa/pa.h (TARGET_ASM_FUNCTION_PROLOGUE): Define.
+ 
+ 2019-06-07  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	* tree-vrp.h (value_range_base::intersect): New.
+ 	(value_range::intersect_helper): Move from here...
+ 	(value_range_base::intersect_helper): ...to here.
+ 	* tree-vrp.c (value_range::intersect_helper): Rename to...
+ 	(value_range_base::intersect_helper): ...this, and rewrite to
+ 	return a value instead of modifying THIS in place.
+ 	Also, move equivalence handling...
+ 	(value_range::intersect): ...here, while calling intersect_helper.
+ 	* gimple-fold.c (size_must_be_zero_p): Use value_range_base when
+ 	calling intersect.
+ 	* gimple-ssa-evrp-analyze.c (ecord_ranges_from_incoming_edge):
+ 	Same.
+ 	* vr-values.c (vrp_evaluate_conditional_warnv_with_ops): Same.
+ 
+ 2019-06-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* Makefile.in (genprogerr): Add condmd.
+ 	(genprog): Remove it here.
+ 
+ 2019-06-07  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* doc/invoke.texi (AMD GCN Options): Add gfx906.
+ 
+ 2019-06-07  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/90574
+ 	* tree-cfg.c (stmt_starts_bb_p): Split blocks at labels
+ 	that appear after user labels.
+ 
+ 2019-06-07  Martin Liska  <mliska@suse.cz>
+ 
+ 	* cselib.c (cselib_init): Disable hash table
+ 	sanitization.
+ 	* hash-set.h: Pass new default argument to m_table.
+ 	* hash-table.c: Add global variable with hash table
+ 	sanitization limit.
+ 	* hash-table.h (Allocator>::hash_table): Add new argument
+ 	to ctor.
+ 	(hashtab_chk_error): New.
+ 	* params.def (PARAM_HASH_TABLE_VERIFICATION_LIMIT): New.
+ 	* toplev.c (process_options): Set hash_table_sanitize_eq_limit
+ 	from the PARAM_HASH_TABLE_VERIFICATION_LIMIT value.
+ 
+ 2019-06-07  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* common.opt (flto-odr-type-merging): Ignore.
+ 	* invoke.texi (-flto-odr-type-merging): Remove.
+ 	* ipa-devirt.c (odr_vtable_hasher:odr_name_hasher): Remove.
+ 	(can_be_vtable_hashed_p): Remove.
+ 	(hash_odr_vtable): Remove.
+ 	(odr_vtable_hasher::hash): Remove.
+ 	(types_same_for_odr): Remove.
+ 	(types_odr_comparable): Remove.
+ 	(odr_vtable_hasher::equal): Remove.
+ 	(odr_vtable_hash_type, odr_vtable_hash): Remove.
+ 	(add_type_duplicate): Do not synchronize vtable and name hashtables.
+ 	(get_odr_type): Do not use vtable hash.
+ 	(dump_odr_type): Remove commented out code.
+ 	(build_type_inheritance_graph): Do not allocate vtable hash.
+ 	(rebuild_type_inheritance_graph): Do not delete vtable hash.
+ 	* ipa-utils.h (type_with_linkage_p): Drop vtable hash path.
+ 	(odr_type_p): Likewise.
+ 	* tree.c (need_assembler_name_p): Remove flag_lto_odr_type_mering
+ 	test.
+ 
+ 2019-06-07  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (aliasing_component_refs_p): Do not give up
+ 	immediately after same_types_for_tbaa_p returns -1 and continue
+ 	looking for possible exact match; if matching types are arrays
+ 	watch for partial overlaps.
+ 	(indirect_ref_may_alias_decl_p): Watch for partial array overlaps.
+ 	(indirect_refs_may_alias_p): Do type based disambiguation first;
+ 	update comment.
+ 
+ 2019-06-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* fwprop.c (propagate_rtx): Fix call to paradoxical_subreg_p.
+ 
+ 2019-06-07  Martin Liska  <mliska@suse.cz>
+ 
+ 	* doc/invoke.texi: Remove param.
+ 	* gcov-counter.def (GCOV_COUNTER_ICALL_TOPNV):
+ 	Remove.
+ 	* gcov-io.h (GCOV_ICALL_TOPN_VAL): Likewise.
+ 	(GCOV_ICALL_TOPN_NCOUNTS): Likewise.
+ 	* params.def (PARAM_INDIR_CALL_TOPN_PROFILE): Likewise.
+ 	* profile.c (instrument_values): Remove
+ 	HIST_TYPE_INDIR_CALL_TOPN.
+ 	* tree-profile.c (init_ic_make_global_vars):
+ 	Always build __gcov_indirect_call only.
+ 	(gimple_init_gcov_profiler): Remove usage
+ 	of PARAM_INDIR_CALL_TOPN_PROFILE.
+ 	(gimple_gen_ic_profiler): Likewise.
+ 	* value-prof.c (dump_histogram_value): Likewise.
+ 	(stream_in_histogram_value): Likewise.
+ 	(gimple_indirect_call_to_profile): Likewise.
+ 	(gimple_find_values_to_profile): Likewise.
+ 	* value-prof.h (enum hist_type): Likewise.
+ 
+ 2019-06-07  Martin Liska  <mliska@suse.cz>
+ 
+ 	* tree-ssa-loop.c (get_lsm_tmp_name): Return at the end of the
+ 	function.
+ 
+ 2019-06-07  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/78902
+ 	* builtin-attrs.def (ATTR_WARN_UNUSED_RESULT): New.
+ 	(ATTR_MALLOC_NOTHROW_LEAF_LIST): Remove.
+ 	(ATTR_WARN_UNUSED_RESULT_NOTHROW_LEAF_LIST): New.
+ 	(ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_LEAF_LIST): New.
+ 	(ATTR_ALLOC_SIZE_2_NOTHROW_LIST): Remove.
+ 	(ATTR_MALLOC_SIZE_1_NOTHROW_LEAF_LIST): Remove.
+ 	(ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_LIST): New.
+ 	(ATTR_ALLOC_WARN_UNUSED_RESULT_SIZE_2_NOTHROW_LIST): New.
+ 	(ATTR_MALLOC_WARN_UNUSED_RESULT_SIZE_1_NOTHROW_LEAF_LIST): New.
+ 	(ATTR_ALLOCA_SIZE_1_NOTHROW_LEAF_LIST): Remove.
+ 	(ATTR_ALLOCA_WARN_UNUSED_RESULT_SIZE_1_NOTHROW_LEAF_LIST): New.
+ 	(ATTR_MALLOC_SIZE_1_2_NOTHROW_LEAF_LIST): Remove.
+ 	(ATTR_MALLOC_WARN_UNUSED_RESULT_SIZE_1_2_NOTHROW_LEAF_LIST):
+ 	New.
+ 	(ATTR_ALLOC_SIZE_2_NOTHROW_LEAF_LIST): Remove.
+ 	(ATTR_ALLOC_WARN_UNUSED_RESULT_SIZE_2_NOTHROW_LEAF_LIST): New.
+ 	(ATTR_MALLOC_NOTHROW_NONNULL): Remove.
+ 	(ATTR_WARN_UNUSED_RESULT_NOTHROW_NONNULL): New.
+ 	(ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_NONNULL): New.
+ 	(ATTR_MALLOC_NOTHROW_NONNULL_LEAF): Remove.
+ 	(ATTR_WARN_UNUSED_RESULT_NOTHROW_NONNULL_LEAF): New.
+ 	(ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_NONNULL_LEAF): New.
+ 	* builtins.def (BUILT_IN_ALIGNED_ALLOC): Change to use
+ 	warn_unused_result attribute.
+ 	(BUILT_IN_STRDUP): Likewise.
+ 	(BUILT_IN_STRNDUP): Likewise.
+ 	(BUILT_IN_ALLOCA): Likewise.
+ 	(BUILT_IN_CALLOC): Likewise.
+ 	(BUILT_IN_MALLOC): Likewise.
+ 	(BUILT_IN_REALLOC): Likewise.
+ 
+ 2019-06-06  Jim Wilson  <jimw@sifive.com>
+ 
+ 	PR target/89955
+ 	* config/riscv/riscv.h (STARTFILE_PREFIX_SPEC): Deleted.
+ 	* config/riscv/freebsd.h (STARTFILE_PREFIX_SPEC): Added.
+ 	* config/riscv/linux.h (STARTFILE_PREFIX_SPEC): Added.
+ 
+ 2019-06-06  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* tree-ssa-strlen.c (adjust_related_strinfos): Avoid trailing article.
+ 	(handle_builtin_malloc): Remove trailing spaces.
+ 	(handle_builtin_memset): Same.
+ 	(handle_builtin_memcmp): Same.
+ 	(compute_string_length): Same.
+ 	(determine_min_objsize): Same.
+ 	(handle_builtin_string_cmp): Same.
+ 	(handle_char_store): Same.  Break up excessively long line.
+ 
+ 2019-06-06  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* tree-sra.c (build_reconstructed_reference): Drop the alignment
+ 	check.
+ 
+ 2019-06-06  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* tree-sra.c (struct access): New field grp_same_access_path.
+ 	(dump_access): Dump it.
+ 	(build_reconstructed_reference): New function.
+ 	(build_ref_for_model): Use it if possible.
+ 	(path_comparable_for_same_access): New function.
+ 	(same_access_path_p): Likewise.
+ 	(sort_and_splice_var_accesses): Set the new flag.
+ 	(analyze_access_subtree): Likewise.
+ 	(propagate_subaccesses_across_link): Propagate zero value of the new
+ 	flag down the access tree.
+ 
+ 2019-06-06  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config.gcc (amdgcn-*-*): Allow --with-arch=gfx906.
+ 	* config/gcn/gcn.opt (gpu_type): Add gfx906.
+ 	* config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Add gfx906 multilib.
+ 	(MULTILIB_DIRNAMES): Rename gcn5 to gfx900.
+ 	Add gfx906.
+ 
+ 2019-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	PR tree-optimization/90332
+ 	* config/aarch64/aarch64.c (aarch64_expand_vector_init):
+ 	Handle VALS containing two vectors.
+ 	* config/aarch64/aarch64-simd.md (*aarch64_combinez<mode>): Rename
+ 	to...
+ 	(@aarch64_combinez<mode>): ... This.
+ 	(*aarch64_combinez_be<mode>): Rename to...
+ 	(@aarch64_combinez_be<mode>): ... This.
+ 	(vec_init<mode><Vhalf>): New define_expand.
+ 	* config/aarch64/iterators.md (Vhalf): Handle V8HF.
+ 
+ 2019-06-06  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.md (ashlhi3): Use the const_variant of shift
+ 	library functions only when not optimizing for size.
+ 	(ashlsi3): Likewise.
+ 	(ashrhi3): Likewise.
+ 	(ashrsi3): Likewise.
+ 	(lshrhi3): Likewise.
+ 	(lshrsi3): Likewise.
+ 
+ 2019-06-06  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	PR rtl-optimization/88751
+ 	* ira.c (ira): Use the number of the actually referenced registers
+ 	when calculating the threshold.
+ 
+ 2019-06-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* configure: Regenerate.
+ 
+ 2019-06-06  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+ 
+ 	* config/msp430/msp430.md (ashlhi3): Force shift src operand into a
+ 	register if it is in memory, so the shift can be emulated with a rotate
+ 	instruction.
+ 	(ashrhi3): Likewise.
+ 	(lshrhi3): Likewise.
+ 
+ 2019-06-06  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/87954
+ 	* match.pd: Simplify mult where both arguments are 0 or 1.
+ 
+ 2019-06-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	* vr-values.c (vr_values::extract_range_from_ssa_name): Do not
+ 	put equivalences on UNDEFINED ranges.
+ 	* gimple-ssa-evrp.c (evrp_dom_walker::before_dom_children):
+ 	Make sure to drop defs of stmts added during simplification
+ 	to VARYING.
+ 
+ 2019-06-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-structalias.c: Include tree-cfg.h.
+ 	(make_heapvar): Do not make heap vars artificial.
+ 	(find_func_aliases_for_builtin_call): Handle stack allocation
+ 	functions.
+ 	(find_func_aliases): Delay processing of simple enough returns
+ 	in non-IPA mode.
+ 	(set_uids_in_ptset): Adjust.
+ 	(find_what_var_points_to): Likewise.
+ 	(solve_constraints): Do not dump points-to sets here.
+ 	(compute_points_to_sets): Post-process return statements,
+ 	amending the escaped solution.  Dump points-to sets afterwards.
+ 	(ipa_pta_execute): Dump points-to sets.
+ 
+ 2019-06-06  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR web/87933
+ 	* doc/install.texi: Fix HTML headers and
+ 	titles for 'Installing GCC' pages.
+ 
+ 2019-06-06  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf-gimple.h (dump_message_1): Remove.
+ 	(dump_message): Likewise.
+ 	(return_false_with_message_1): Print also file.
+ 	(return_false_with_msg): Likewise.
+ 	(return_with_result): Likewise.
+ 	(return_with_debug): Likewise.
+ 	* ipa-icf.c (sem_function::equals_private): Remove call
+ 	to dump_message.
+ 
+ 2019-06-05  Hongtao Liu  <hongtao.liu@intel.com>
+ 
+ 	* config/i386/sse.md (define_mode_suffix vecmemsuffix): New.
+ 	(define_insn "avx512dq_fpclass<mode><mask_scalar_merge_name>"): Enable
+ 	memory operand for it.
+ 	(define_insn "avx512dq_vmfpclass<mode><mask_scalar_merge_name>"): Ditto.
+ 
+ 2019-06-05  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* config/i386/i386-features.c (ix86_get_function_versions_dispatcher):
+ 	Adjust quoting and hyphenation.
+ 	* convert.c (convert_to_real_1): Same.
+ 	* gcc.c (driver_wrong_lang_callback): Same.
+ 	(driver::handle_unrecognized_options): Same.
+ 	* gimple-ssa-nonnull-compare.c (do_warn_nonnull_compare): Same.
+ 	* opts-common.c (cmdline_handle_error): Same.
+ 	(read_cmdline_option): Same.
+ 	* opts-global.c (complain_wrong_lang): Same.
+ 	(print_ignored_options): Same.
+ 	(handle_common_deferred_options): Same.
+ 	* pretty-print.h: Same.
+ 	* print-rtl.c (debug_bb_n_slim): Same.
+ 	* sched-rgn.c (make_pass_sched_fusion): Same.
+ 	* tree-cfg.c (verify_gimple_assign_unary): Same.
+ 	(verify_gimple_label): Same.
+ 	* tree-ssa-operands.c (verify_ssa_operands): Same.
+ 	* varasm.c (do_assemble_alias): Same.
+ 	(assemble_alias): Same.
+ 
+ 2019-06-05  Richard Henderson  <rth@twiddle.net>
+ 
+ 	* config/alpha/alpha.c (direct_return): Move down after
+ 	struct machine_function definition; use saved frame_size;
+ 	return bool.
+ 	(struct machine_function): Add sa_mask, sa_size, frame_size.
+ 	(alpha_sa_mask, alpha_sa_size, compute_frame_size): Merge into ...
+ 	(alpha_compute_frame_layout): ... new function.
+ 	(TARGET_COMPUTE_FRAME_LAYOUT): New.
+ 	(alpha_initial_elimination_offset): Use saved sa_size.
+ 	(alpha_vms_initial_elimination_offset): Likewise.
+ 	(alpha_vms_can_eliminate): Remove alpha_sa_size call.
+ 	(alpha_expand_prologue): Use saved frame data.  Merge integer
+ 	and fp register save loops.
+ 	(alpha_expand_epilogue): Likewise.
+ 	(alpha_start_function): Use saved frame data.
+ 	* config/alpha/alpha-protos.h (direct_return): Update.
+ 	(alpha_sa_size): Remove.
+ 
+ 2019-06-05  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* fold-const.c (extract_muldiv_1) <PLUS_EXPR>: Do not distribute a
+ 	multiplication by a power-of-two value.
+ 	(fold_plusminus_mult_expr): Use pow2p_hwi to spot a power-of-two value
+ 	and turn the modulo operation into a masking operation.
+ 
+ 2019-06-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR debug/90733
+ 	* var-tracking.c (vt_expand_loc_callback): Don't create raw subregs
+ 	with VOIDmode inner operands.
+ 
+ 2019-06-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/90726
+ 	* tree-ssa-loop-niter.c (expand_simple_operations): Do not
+ 	turn an expression graph into a tree.
+ 
+ 2019-06-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* omp-expand.c (struct omp_region): Add has_lastprivate_conditional
+ 	member.
+ 	(expand_parallel_call): If region->inner->has_lastprivate_conditional,
+ 	treat it like explicit monotonic schedule modifier.
+ 	(expand_omp_for): Initialize has_lastprivate_conditional.
+ 	If fd.lastprivate_conditional != 0, treat it like explicit monotonic
+ 	schedule modifier.
+ 
+ 	* omp-low.c (lower_rec_input_clauses): For lastprivate conditional
+ 	references, lookup in in hash map MEM_REF operand instead of the
+ 	MEM_REF itself.
+ 	(lower_omp_1): When looking for lastprivate conditional assignments,
+ 	handle MEM_REFs with REFERENCE_TYPE operands.
+ 
+ 	* omp-low.c (lower_rec_input_clauses): Force max_vf if is_simd and
+ 	on privatization clauses OMP_CLAUSE_DECL is privatized by reference
+ 	and references a VLA.  Handle references to non-VLAs if is_simd
+ 	all privatization clauses like reductions.
+ 	(lower_rec_input_clauses) <case do_private, case do_firstprivate>:
+ 	If omp_is_reference, use always omp simd arrays and set
+ 	DECL_VALUE_EXPR in that case, if lower_rec_simd_input_clauses
+ 	fails, emit reference initialization.
+ 
+ 2019-06-05  Hongtao Liu  <hongtao.liu@intel.com>
+ 
+ 	PR target/89803
+ 	* config/i386/avx512dqintrin.h (_mm_mask_fpclass_ss_mask,
+ 	_mm_mask_fpclass_sd_mask): New intrinsics.
+ 	(_mm_fpclass_ss_mask, _mm_fpclass_sd_mask): Modified, use new builtins.
+ 	* config/i386/i386-builtin.def
+ 	(__builtin_ia32_fpclassss_mask, __builtin_ia32_fpclasssd_mask):
+ 	New builtins.
+ 	(__builtin_ia32_fpclassss, __builtin_ia32_fpclasssd): Deleted.
+ 	* config/i386/i386-builtin-types.def (DEF_FUNCTION_TYPE (QI, V2DF, INT),
+ 	DEF_FUNCTION_TYPE (QI, V4SF, INT)): Deleted.
+ 	* config/i386/i386-expand.c (case QI_FTYPE_V4SF_INT,
+ 	case QI_FTYPE_V2SF_INT): Ditto.
+ 	* config/i386/sse.md
+ 	(define_insn "avx512dq_vmfpclass<mode><mask_scalar_merge_name>):
+ 	Extended to insnstructions with mask operands.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wp"):
+ 	Delete.
+ 	(define_register_constraint "wq"): Delete.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wp and RS6000_CONSTRAINT_wq.
+ 	* config/rs6000/vsx.md (define_mode_attr VSr3): Delete.
+ 	(define_mode_attr VSa): Delete.
+ 	(define_mode_attr VSisa): New.
+ 	(rest of file): Adjust.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (define_attr "isa"): Add p9kf and p9tf.
+ 	(define_attr "enabled"): Handle those new isa values.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/vsx.md (define_mode_attr VSr4): Delete.
+ 	(define_mode_attr VSr5): Delete.
+ 	(define_mode_attr VStype_sqrt): Delete.
+ 	(define_mode_iterator VSX_SPDP): Delete.
+ 	(define_mode_attr VS_spdp_res): Delete.
+ 	(define_mode_attr VS_spdp_insn): Delete.
+ 	(define_mode_attr VS_spdp_type): Delete.
+ 	(*vsx_sqrt<mode>2): Adjust.
+ 	(vsx_<VS_spdp_insn>): Delete, split to...
+ 	(vsx_xscvdpsp): ... this.  New.  And...
+ 	(vsx_xvcvspdp): ... this.  New.  And...
+ 	(vsx_xvcvdpsp): ... this.  New.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (define_mode_attr sd): Add values for V4SF
+ 	and V2DF.
+ 	* config/rs6000/vsx.md (define_mode_attr VSs): Delete.
+ 	(rest of file): Adjust.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/vsx.md (vsx_<VS_spdp_insn>): Use wa instead of <VSa>.
+ 	(vsx_extract_<mode>_var): Ditto.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/vsx.md: Replace all <VSa> that are used with VSX_TI
+ 	with just "wa".
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "ww"):
+ 	Delete.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_ww.
+ 	* config/rs6000/rs6000.md: Adjust.
+ 	* config/rs6000/vsx.md: Adjust.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (SFDF, SFDF2): Adjust comments.
+ 	(define_mode_attr sd): New.
+ 	(define_mode_attr s): New.
+ 	(define_mode_attr Ftrad): Delete.
+ 	(define_mode_attr Fvsx): Delete.
+ 	(define_mode_attr Fs): Delete.
+ 	(rest of file): Use the new mode attributes.
+ 	* config.rs6000/vsx.md: Use the new mode attributes.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/vsx.md: Replace all <VSa> that are used with VSX_W
+ 	with just "wa".
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/vsx.md (define_mode_attr VSr2): Delete.
+ 	(rest of file): Replace all <VSa>, <VSr>, <VSr2>, and <VSr3> that are
+ 	used with VSX_B, VSX_D, or VSX_F, with just "wa".
+ 
+ 2019-06-04  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 
+ 	PR target/78263
+ 	* config/rs6000/altivec.h: Don't #define vector, pixel, bool for
+ 	C++ with strict ANSI requirements.
+ 
+ 2019-06-04  Marc Glisse  <marc.glisse@inria.fr>
+ 
+ 	* tree-ssa-loop-niter.c (number_of_iterations_ne): Skip
+ 	computations when step is 1.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wf"):
+ 	Delete.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wf.
+ 	* config/rs6000/rs6000.md: Adjust.
+ 	* config/rs6000/vsx.md: Adjust.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-06-04  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_asan_shadow_offset):
+ 	Fix ILP32 value.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wd"):
+ 	Delete.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wd.
+ 	* config/rs6000/rs6000.md: Adjust.
+ 	* config/rs6000/vsx.md: Adjust.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (define_mode_attr Fv2): Delete.
+ 	(rest of file): Adjust.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/vsx.md (define_mode_attr VS_64reg): Delete.
+ 	(*vsx_extract_<P:mode>_<VSX_D:mode>_load): Adjust.
+ 	(vsx_splat_<mode>_reg): Adjust.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "ws"):
+ 	Delete.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_ws.
+ 	* config/rs6000/rs6000.md: Adjust.
+ 	* config/rs6000/vsx.md: Adjust.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wv"):
+ 	Delete.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wv.
+ 	* config/rs6000/rs6000.md: Adjust.
+ 	* config/rs6000/vsx.md: Adjust.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wi"):
+ 	Delete.
+ 	(define_register_constraint "wt"): Delete.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wi and RS6000_CONSTRAINT_wt.
+ 	* config/rs6000/rs6000.md: Adjust.
+ 	* config/rs6000/vsx.md: Adjust.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-06-04  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_asm_output_external): Remove
+ 	const.
+ 	* config/aarch64/aarch64.c (aarch64_asm_output_external): Call
+ 	default_elf_asm_output_external.
+ 
+ 2019-06-04  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf.c (INCLUDE_LIST): Remove.
+ 	(sem_item_optimizer::execute): Remove call to init_wpa.
+ 	* ipa-icf.h (init_wpa): Remove.
+ 
+ 2019-06-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gimplify.c (gimplify_scan_omp_clauses): Don't sorry_at on lastprivate
+ 	conditional on combined for simd.
+ 	* omp-low.c (struct omp_context): Add combined_into_simd_safelen0
+ 	member.
+ 	(lower_rec_input_clauses): For gimple_omp_for_combined_into_p max_vf 1
+ 	constructs, don't remove lastprivate_conditional_map, but instead set
+ 	ctx->combined_into_simd_safelen0 and adjust hash_map, so that it points
+ 	to parent construct temporaries.
+ 	(lower_lastprivate_clauses): Handle ctx->combined_into_simd_safelen0
+ 	like !ctx->lastprivate_conditional_map.
+ 	(lower_omp_1) <case GIMPLE_ASSIGN>: If up->combined_into_simd_safelen0,
+ 	use up->outer context instead of up.
+ 	* omp-expand.c (expand_omp_for_generic): Perform cond_var bump even if
+ 	gimple_omp_for_combined_p.
+ 	(expand_omp_for_static_nochunk): Likewise.
+ 	(expand_omp_for_static_chunk): Add forgotten cond_var bump that was
+ 	probably moved over into expand_omp_for_generic rather than being copied
+ 	there.
+ 
+ 2019-06-04  Martin Liska  <mliska@suse.cz>
+ 
+ 	* value-prof.c (dump_histogram_value): Fix typo.
+ 	(gimple_mod_subtract_transform): Likewise.
+ 
+ 2019-06-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/90726
+ 	* tree-chrec.c (chrec_contains_symbols): Add to visited.
+ 	(tree_contains_chrecs): Likewise.
+ 	(chrec_contains_symbols_defined_in_loop): Move here and avoid
+ 	exponential behaivor from ...
+ 	* tree-scalar-evolution.c (chrec_contains_symbols_defined_in_loop):
+ 	... here.
+ 	(expression_expensive_p): Avoid exponential behavior and compute
+ 	expanded size, rejecting any expansion.
+ 	* tree-ssa-loop-ivopts.c (abnormal_ssa_name_p): Remove.
+ 	(idx_contains_abnormal_ssa_name_p): Likewise.
+ 	(contains_abnormal_ssa_name_p_1): New helper for walk_tree.
+ 	(contains_abnormal_ssa_name_p): Simplify and use
+ 	walk_tree_without_duplicates.
+ 
+ 2019-06-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90738
+ 	Revert
+ 	2019-06-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Get original
+ 	full reference tree and record in ref->ref.
+ 	(vn_reference_lookup_3): Pass in original ref to
+ 	ao_ref_init_from_vn_reference.
+ 	(vn_reference_lookup): Likewise.
+ 	* tree-ssa-sccvn.h (ao_ref_init_from_vn_reference): Adjust prototype.
+ 	* tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p):
+ 	Handle non-decl bases in the original reference.
+ 
+ 2019-06-04  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf.c (sem_item_optimizer::add_item_to_class): Count
+ 	number of references.
+ 	(sem_item_optimizer::do_congruence_step):
+ 	(sem_item_optimizer::worklist_push): Dump how references
+ 	a class has.
+ 	(sem_item_optimizer::worklist_pop): Use heap.
+ 	(sem_item_optimizer::process_cong_reduction): Likewise.
+ 	* ipa-icf.h: Use fibonacci_heap insteam of std::list.
+ 
+ 2019-06-04  Martin Liska  <mliska@suse.cz>
+ 
+ 	* ipa-icf.h (struct sem_usage_pair_hash): New.
+ 	(sem_usage_pair_hash::hash): Likewise.
+ 	(sem_usage_pair_hash::equal): Likewise.
+ 	(struct sem_usage_hash): Likewise.
+ 	* ipa-icf.c (sem_item::sem_item): Initialize
+ 	referenced_by_count.
+ 	(sem_item::add_reference): Register a reference
+ 	in ref_map and not in target->usages.
+ 	(sem_item::setup): Remove initialization of
+ 	dead vectors.
+ 	(sem_item::~sem_item): Remove usage of dead vectors.
+ 	(sem_item::dump): Remove dump of references.
+ 	(sem_item_optimizer::sem_item_optimizer): Initialize
+ 	m_references.
+ 	(sem_item_optimizer::read_section): Remove useless
+ 	dump.
+ 	(sem_item_optimizer::parse_funcs_and_vars): Likewise here.
+ 	(sem_item_optimizer::build_graph): Pass m_references
+ 	to ::add_reference.
+ 	(sem_item_optimizer::verify_classes): Remove usage of dead
+ 	vectors.
+ 	(sem_item_optimizer::traverse_congruence_split): Return true
+ 	when a class is split.
+ 	(sem_item_optimizer::do_congruence_step_for_index): Use
+ 	hash_map for look up of (sem_item *, index). That brings
+ 	significant speed up.
+ 	(sem_item_optimizer::do_congruence_step): Return true
+ 	when a split is done.
+ 	(congruence_class::is_class_used): Use referenced_by_count.
+ 
+ 2019-06-04  Alan Modra  <amodra@gmail.com>
+ 
+ 	PR target/90689
+ 	* config/rs6000/rs6000.c (rs6000_call_aix): Correct r271753 merge
+ 	error.
+ 
+ 2019-06-03  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.h (MASK_MFPGPR): Delete.
+ 	* config/rs6000/rs6000.c (direct_move_p): Adjust.
+ 	(rs6000_secondary_reload_simple_move): Adjust.
+ 	(rs6000_opt_masks): Neuter the "mfpgpr" option.
+ 	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Adjust.
+ 	* config/rs6000/rs6000-cpus.def (ISA_2_5_MASKS_EMBEDDED): Adjust
+ 	comment.
+ 	(power6x): Adjust.
+ 	* config/rs6000/rs6000.md (floatsi<mode>2_lfiwax): Adjust.
+ 	(floatunssi<mode>2_lfiwzx): Adjust.
+ 	(fix_trunc<mode>si2_stfiwx): Adjust.
+ 	(fixuns_trunc<mode>si2_stfiwx): Adjust.
+ 	* config/rs6000/rs6000.opt (mno-mfpgpr): New.
+ 	(mfpgpr): Mark as deprecated.
+ 	* doc/extend.texi (PowerPC Function Attributes): Delete mfpgpr.
+ 	(Basic PowerPC Built-in Functions Available on ISA 2.05): Adjust.
+ 	* doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mmfpgpr.
+ 
+ 2019-06-03  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wg"):
+ 	Delete.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wg.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.md (*mov<mode>_softfloat32, *movdi_internal64):
+ 	Delete "wg" alternatives.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-06-03  Alan Modra  <amodra@gmail.com>
+ 
+ 	* bb-reorder.c (copy_bb_p): Don't overflow size calculation.
+ 	(get_uncond_jump_length): Assert length less than INT_MAX and
+ 	non-negative.
+ 
+ 2019-06-03  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	PR middle-end/64242
+ 	* builtins.c (expand_builtin_longjmp): Add frame clobbers and schedule
+ 	block.
+ 	(expand_builtin_nonlocal_goto): Likewise.
+ 
+ 2019-06-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_asm_output_alias): Declare.
+ 	(aarch64_asm_output_external): Declare.
+ 	* config/aarch64/aarch64.c (aarch64_asm_output_variant_pcs): New.
+ 	(aarch64_declare_function_name): Call aarch64_asm_output_variant_pcs.
+ 	(aarch64_asm_output_alias): New.
+ 	(aarch64_asm_output_external): New.
+ 	* config/aarch64/aarch64.h (ASM_OUTPUT_DEF_FROM_DECLS): Define.
+ 	(ASM_OUTPUT_EXTERNAL): Define.
+ 
+ 2019-06-03  Aldy Hernandez  <aldyh@redhat.com>
+ 	* tree-vrp.h (value_range_base::nonzero_p): New.
+ 	(value_range_base::set_nonnull): Rename to...
+ 	(value_range_base::set_nonzero): ...this.
+ 	(value_range_base::set_null): Rename to...
+ 	(value_range_base::set_zero): ...this.
+ 	(value_range::set_nonnull): Remove.
+ 	(value_range::set_null): Remove.
+ 	* tree-vrp.c (range_is_null): Remove.
+ 	(range_is_nonnull): Remove.
+ 	(extract_range_from_binary_expr): Use value_range_base::*zero_p
+ 	instead of range_is_*null.
+ 	(extract_range_from_unary_expr): Same.
+ 	(value_range_base::set_nonnull): Rename to...
+ 	(value_range_base::set_nonzero): ...this.
+ 	(value_range::set_nonnull): Remove.
+ 	(value_range_base::set_null): Rename to...
+ 	(value_range_base::set_zero): ...this.
+ 	(value_range::set_null): Remove.
+ 	(extract_range_from_binary_expr): Rename set_*null uses to
+ 	set_*zero.
+ 	(extract_range_from_unary_expr): Same.
+ 	(union_helper): Same.
+ 	* vr-values.c (get_value_range): Use set_*zero instead of
+ 	set_*null.
+ 	(vr_values::extract_range_from_binary_expr): Same.
+ 	(vr_values::extract_range_basic): Same.
+ 
+ 2019-06-03  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	PR driver/90684
+ 	* opts.c (parse_and_check_align_values): Allow 4 alignment values.
+ 
+ 2019-06-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/aarch64/iterators.md (MAX_OPP): New code attr.
+ 	* config/aarch64/aarch64-simd.md (*aarch64_<su>abd<mode>_3):
+ 	Rename to...
+ 	(aarch64_<su>abd<mode>_3): ... This.
+ 	(<sur>sadv16qi): Add TARGET_DOTPROD expansion.
+ 
+ 2019-06-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Get original
+ 	full reference tree and record in ref->ref.
+ 	(vn_reference_lookup_3): Pass in original ref to
+ 	ao_ref_init_from_vn_reference.
+ 	(vn_reference_lookup): Likewise.
+ 	* tree-ssa-sccvn.h (ao_ref_init_from_vn_reference): Adjust prototype.
+ 	* tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p):
+ 	Handle non-decl bases in the original reference.
+ 
+ 2019-06-03  Martin Liska  <mliska@suse.cz>
+ 
+ 	* doc/generic.texi: Remove Java Trees.
+ 
+ 2019-06-03  Martin Liska  <mliska@suse.cz>
+ 
+ 	* fold-const.c (operand_equal_p): Fix typo as compare_tree_int
+ 	returns 0 when operands are equal.
+ 
+ 2019-06-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90716
+ 	* tree-loop-distribution.c (destroy_loop): Process blocks in
+ 	correct order.
+ 
+ 2019-06-03  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	PR target/88837
+ 	* vector-builder.h (vector_builder::count_dups): New method.
+ 	* config/aarch64/aarch64-protos.h (aarch64_expand_sve_vector_init):
+ 	Declare prototype.
+ 	* config/aarch64/aarch64/sve.md (aarch64_sve_rev64<mode>): Use @.
+ 	(vec_init<mode><Vel>): New pattern.
+ 	* config/aarch64/aarch64.c (emit_insr): New function.
+ 	(aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
+ 	(aarch64_sve_expand_vector_init_insert_elems): Likewise.
+ 	(aarch64_sve_expand_vector_init_handle_trailing_same_elem): Likewise.
+ 	(aarch64_sve_expand_vector_init): Define two overloaded functions.
+ 
+ 2019-06-03  Alejandro Martinez  <alejandro.martinezvicente@arm.com>
+ 
+ 	PR tree-optimization/90681
+ 	* internal-fn.c (mask_load_direct): Mark as non-vectorizable again.
+ 	* tree-vect-slp.c (vect_build_slp_tree_1): Add masked loads as a
+ 	special case for SLP, but fail on non-groupped loads.
+ 
+ 2019-06-03  Martin Liska  <mliska@suse.cz>
+ 
+ 	* cfg.c (debug): Use TDF_DETAILS for debug and
+ 	print edge info only once.
+ 
+ 2019-06-02  Thomas Koenig  <tkoenig@gcc.gnu.org>
+ 
+ 	PR fortran/90539
+ 	* predict.def (PRED_FORTRAN_CONTIGUOUS): New predictor.
+ 
+ 2019-06-01  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/90694
+ 	* tree-pretty-print.c (dump_generic_node): Add parentheses.
+ 
+ 2019-05-31  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* alias.c: Include ipa-utils.h.
+ 	(get_alias_set): Try to complete ODR type via ODR type hash lookup.
+ 	* ipa-devirt.c (prevailing_odr_type): New.
+ 	* ipa-utils.h (previaling_odr_type): Declare.
+ 
+ 2019-05-31  H.J. Lu  <hongjiu.lu@intel.com>
+ 	    Hongtao Liu  <hongtao.liu@intel.com>
+ 
+ 	PR target/89355
+ 	* config/i386/i386-features.c (rest_of_insert_endbranch): Remove
+ 	NOTE_INSN_DELETED_LABEL check.
+ 
+ 2019-05-31  Prachi Godbole  <prachi.godbole@imgtec.com>
+ 	    Robert Suchanek  <robert.suchanek@mips.com>
+ 
+ 	* config/mips/mips.c (mips_expand_builtin_insn): Swap the 1st
+ 	and 3rd operands of the fmadd/fmsub/maddv builtin.
+ 
+ 2019-05-31  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree.h (OMP_CLAUSE__CONDTEMP__ITER): Define.
+ 	* gimplify.c (gimplify_scan_omp_clauses): Allow lastprivate conditional
+ 	on OMP_SIMD if not nested inside of worksharing loop that also has
+ 	lastprivate conditional clause for the same decl.
+ 	(gimplify_omp_for): Add _condtemp_ clauses to OMP_SIMD if needed.
+ 	* omp-low.c (scan_sharing_clauses): Handle OMP_CLAUSE__CONDTEMP_ also
+ 	on simd.
+ 	(lower_rec_input_clauses): Likewise.  Handle lastprivate conditional
+ 	on simd construct.
+ 	(lower_lastprivate_conditional_clauses): Handle lastprivate conditional
+ 	on simd construct.
+ 	(lower_lastprivate_clauses): Likewise.
+ 	(lower_omp_sections): Call lower_lastprivate_conditional_clauses before
+ 	calling lower_rec_input_clauses.
+ 	(lower_omp_for): Likewise.
+ 	(lower_omp_1): Use first rather than second OMP_CLAUSE__CONDTEMP_
+ 	clause on simd construct.
+ 	* omp-expand.c (expand_omp_simd): Initialize cond_var if
+ 	OMP_CLAUSE__CONDTEMP_ clause is present.
+ 
+ 	* omp-low.c (lower_rec_simd_input_clauses): Set TREE_THIS_NOTRAP on
+ 	ivar and lvar.
+ 
+ 2019-05-31  Xiong Hu Luo  <luoxhu@linux.ibm.com>
+ 
+ 	PR c/43673
+ 	* c-format.c (print_char_table, scanf_char_table): Replace BADLEN with
+ 	TEX_D32, TEX_D64 or TEX_D128.
+ 
+ 2019-05-31  Marc Glisse  <marc.glisse@inria.fr>
+ 
+ 	* match.pd (~(vec?cst1:cst2)): New transformation.
+ 
+ 2019-05-31  Marc Glisse  <marc.glisse@inria.fr>
+ 
+ 	* match.pd (X/[ex]D<Y/[ex]D): Handle negative denominator.
+ 	((size_t)(A /[ex] B) CMP C): New transformation.
+ 
+ 2019-05-31  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* doc/md.texi: Document define_insn_and_rewrite.
+ 	* rtl.def (DEFINE_INSN_AND_REWRITE): New rtx code.
+ 	* gensupport.c (queue_elem): Update comment.
+ 	(replace_operands_with_dups): New function.
+ 	(gen_rewrite_sequence): Likewise.
+ 	(process_rtx): Handle DEFINE_INSN_AND_REWRITE.
+ 	* read-rtl.c (apply_subst_iterator): Likewise.
+ 	(add_condition_to_rtx, named_rtx_p): Likewise.
+ 	(rtx_reader::read_rtx_operand): Likewise.
+ 	* config/aarch64/aarch64-sve.md
+ 	(while_ult<GPI:mode><PRED_ALL:mode>_cc): Rename to...
+ 	(*while_ult<GPI:mode><PRED_ALL:mode>_cc): ...this and use
+ 	define_insn_and_rewrite.
+ 	(*cond_<optab><mode>_any): Turn into define_insn_and_rewrites.
+ 	Remove separate define_split.
+ 
+ 2019-05-31  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* tree-ssa-alias.c (type_has_components_p): New function.
+ 	(aliasing_component_refs_p): Use it.
+ 
+ 2019-05-31  Martin Liska  <mliska@suse.cz>
+ 
+ 	* gdbhooks.py: Add const_tree to TreePrinter.
+ 
+ 2019-05-31  Thomas De Schampheleire  <thomas.de_schampheleire@nokia.com>
+ 
+ 	PR debug/86964
+ 	* common.opt (feliminate-unused-debug-symbols): Enable by default.
+ 	* doc/invoke.texi (Debugging Options): Document new default of
+ 	-feliminate-unused-debug-symbols and remove restriction to 'stabs'.
+ 
+ 2019-05-31  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/90671
+ 	* tree-ssa-threadupdate.c (ssa_create_duplicates): If
+ 	template_block used to be empty on the first call, don't use
+ 	gsi_split_seq_after and gsi_insert_seq_after, but remember whole
+ 	seq with bb_seq and set it with set_bb_seq.
+ 
+ 2019-05-31  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/i386/darwin.h (ASM_OUTPUT_MAX_SKIP_ALIGN): New.
+ 
+ 2019-05-30  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 	    Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/predicates.md (pcrel_address): New define_predicate.
+ 	(prefixed_mem_operand): Likewise.
+ 	(non_prefixed_mem_operand): Likewise.
+ 	* config/rs6000/rs6000-protos.h (rs6000_prefixed_address): New
+ 	prototype.
+ 	* config/rs6000/rs6000.c (print_operand_address): Handle
+ 	PC-relative addresses.
+ 	(mode_supports_prefixed_address_p): New function.
+ 	(rs6000_prefixed_address): New function.
+ 	* config/rs6000/rs6000.h (SYMBOL_FLAG_PCREL): New #define.
+ 	(SYMBOL_REF_PCREL_P): Likewise.
+ 
+ 2019-05-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gimplify.c (enum gimplify_omp_var_data): Add GOVD_CONDTEMP.
+ 	(gimplify_adjust_omp_clauses_1): Handle GOVD_CONDTEMP.
+ 	(gimplify_omp_for): If worksharing loop with lastprivate conditional
+ 	is nested inside of parallel region, add _condtemp_ clause to both.
+ 	* tree-nested.c (convert_nonlocal_omp_clauses,
+ 	convert_local_omp_clauses): Ignore OMP_CLAUSE__CONDTEMP_ instead of
+ 	assertion failure.
+ 	* omp-general.h (struct omp_for_data): Add have_pointer_condtemp
+ 	member.
+ 	* omp-general.c (omp_extract_for_data): Compute it.
+ 	* omp-low.c (scan_sharing_clauses): Handle OMP_CLAUSE__CONDTEMP_.
+ 	(lower_rec_input_clauses): Likewise.
+ 	(lower_lastprivate_conditional_clauses): If OMP_CLAUSE__CONDTEMP_
+ 	clause is already present, just add one further one after it.
+ 	(lower_lastprivate_clauses): Handle cond_ptr with array type.
+ 	(lower_send_shared_vars): Clear _condtemp_ vars.
+ 	(lower_omp_1) <case GIMPLE_ASSIGN>: Handle target data like critical
+ 	or section or taskgroup.
+ 	* omp-expand.c (determine_parallel_type): Disallow combining only if
+ 	first OMP_CLAUSE__CONDTEMP_ has pointer type.  Disallow combining
+ 	of parallel sections if OMP_CLAUSE__CONDTEMP_ is present.
+ 	(expand_omp_for_generic, expand_omp_for_static_nochunk,
+ 	expand_omp_for_static_chunk, expand_omp_for): Use
+ 	fd->have_pointer_condtemp instead of fd->lastprivate_conditional to
+ 	determine if a special set of API routines are needed and if condtemp
+ 	needs to be initialized, while always initialize cond_var if
+ 	fd->lastprivate_conditional is non-zero.
+ 
+ 2019-05-30  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 	    Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/constraints.md (eI): New constraint.
+ 	* config/rs6000/predicates.md (cint34_operand): New predicate.
+ 	* config/rs6000/rs6000.h (SIGNED_16BIT_OFFSET_P): New #define.
+ 	(SIGNED_34BIT_OFFSET_P): Likewise.
+ 	* doc/md.texi (eI): Document constraint.
+ 
+ 2019-05-30  Sylvia Taylor  <sylvia.taylor@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (*fabd<mode>3): New.
+ 
+ 2019-05-30  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 	    Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* rs6000-cpus.def (OTHER_FUSION_MASKS): New #define.
+ 	(ISA_3_0_MASKS_SERVER): Mask off OTHER_FUSION_MASKS.
+ 	(ISA_3_0_MASKS_IEEE): Remove OPTION_MASK_DIRECT_MOVE.
+ 	(ISA_FUTURE_MASKS_SERVER): Add OPTION_MASK_PREFIXED_ADDR.
+ 	(OTHER_FUTURE_MASKS): Likewise.
+ 	(POWERPC_MASKS): Likewise.
+ 	* rs6000.c (rs6000_option_override_internal): Error if -mpcrel is
+ 	specified without -mprefixed-addr or -mcpu=future.  Error if
+ 	-mprefixed-addr is specified without -mcpu=future.
+ 	(rs6000_opt_masks): Add entry for prefixed-addr.
+ 	* rs6000.opt (mprefixed-addr): New option.
+ 
+ 2019-05-30  Sam Tebbs  <sam.tebbs@arm.com>
+ 
+ 	* aarch64/aarch64.c (aarch64_post_cfi_startproc): Add
+ 	cfun->is_thunk check.
+ 
+ 2019-05-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree-predcom.c (is_inv_store_elimination_chain): Fix a typo - lenght
+ 	to length.
+ 
+ 2019-05-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	* gdbinit.in: Fix 'ptc' command.  Add trt
+ 	that prints TREE_TYPE($).
+ 
+ 2019-05-29  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 	    Alan Modra  <amodra@gmail.com>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_call_template_1): Handle pcrel
+ 	calls here...
+ 	(rs6000_indirect_call_template_1): ...and here.
+ 	(rs6000_pltseq_template): Handle plt_pcrel34.  Rework tocsave,
+ 	plt16_ha, plt16_lo, mtctr indirect calls.  Use
+ 	rs6000_pltseq_enum.
+ 	(rs6000_decl_ok_for_sibcall): New function.
+ 	(rs6000_function_ok_for_sibcall): Refactor.
+ 	(rs6000_longcall_ref): Use UNSPEC_PLT_PCREL when pcrel.
+ 	(rs6000_call_aix): Don't emit toc restore rtl for indirect calls
+ 	when pcrel.  Reorganize.
+ 	(rs6000_sibcall_aix): Don't add r2 to function usage when pcrel.
+ 	* rs6000.h (rs6000_pltseq_enum): New enum.
+ 	* rs6000.md (UNSPEC_PLT_PCREL): New unspec.
+ 	(*pltseq_tocsave): Use rs6000_pltseq_enum.
+ 	(*pltseq_plt16_ha): Likewise.
+ 	(*pltseq_plt16_lo): Likewise.
+ 	(*pltseq_mtctr): Likewise.
+ 	(*pltseq_plt_pcrel): New insn.
+ 	(*call_local_aix): Handle @notoc calls.
+ 	(*call_value_local_aix): Likewise.
+ 	(*call_nonlocal_aix): Adjust lengths for pcrel calls.
+ 	(*call_value_nonlocal_aix): Likewise.
+ 	(*call_indirect_pcrel): New insn.
+ 	(*call_value_indirect_pcrel): Likewise.
+ 
+ 2019-05-29  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/sse.md (*save_multiple<mode>): Rename from
+ 	save_multiple<mode>.
+ 	(*restore_multiple<mode>): Rename from restore_multiple<mode>.
+ 	(*restore_multiple_and_return<mode>): Rename from
+ 	restore_multiple_and_return<mode>.
+ 	(*restore_multiple_leave_return<mode>): Rename from
+ 	restore_multiple_leave_return<mode>.
+ 
+ 2019-05-29  Yoshinori Sato  <ysato@users.sourceforge.jp>
+ 
+ 	* config.gcc (rx-*-linux*): New target.
+ 	* config/rx/elf.opt: New file.
+ 	* config/rx/linux.h: Likewise.
+ 	* config/rx/t-linux: Likewise.
+ 	* config/rx/rx.c (TARGET_SAVE_ACC_REGISTER): If not defined,
+ 	make it zero.
+ 	* config/rx/rx.h (ASM_APP_ON): Allow to be overridden.
+ 	(ASM_APP_OFF): Likewise.
+ 	* config/rx/rx.opt: Drop -msim and -mas100-syntax, they were
+ 	moved elsewhere.
+ 
+ 2019-05-29  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* tree-ssa-alias.c (same_type_for_tbaa): Return ture if main
+ 	variants are pointer equivalent.
+ 
+ 2019-05-29  Alejandro Martinez  <alejandro.martinezvicente@arm.com>
+ 
+ 	* config/aarch64/aarch64-c.c: Added TARGET_SVE2.
+ 	* config/aarch64/aarch64-sve2.md: New file.
+ 	(<u>avg<mode>3_floor): New pattern.
+ 	(<u>avg<mode>3_ceil): Likewise.
+ 	(*<sur>h<addsub><mode>): Likewise.
+ 	* config/aarch64/aarch64.h: Added AARCH64_ISA_SVE2 and TARGET_SVE2.
+ 	* config/aarch64/aarch64.md: Include aarch64-sve2.md.
+ 
+ 2019-05-29  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR bootstrap/90543
+ 	* optc-save-gen.awk: In cl_optimization_print, use correct condition
+ 	for var_opt_string printing.  In cl_optimization_print_diff, print
+ 	(null) instead of invoking undefined behavior if one of the
+ 	var_opt_string pointers is NULL and use && instead of first || in the
+ 	guarding condition.  For var_target_other options, handle const char *
+ 	target variables similarly to const char * optimize node variables.
+ 
+ 2019-05-29  Sam Tebbs  <sam.tebbs@arm.com>
+ 
+ 	* config/aarch64/aarch64-builtins.c (aarch64_builtins): Add
+ 	AARCH64_PAUTH_BUILTIN_AUTIB1716 and AARCH64_PAUTH_BUILTIN_PACIB1716.
+ 	* config/aarch64/aarch64-builtins.c (aarch64_init_pauth_hint_builtins):
+ 	Add autib1716 and pacib1716 initialisation.
+ 	* config/aarch64/aarch64-builtins.c (aarch64_expand_builtin): Add checks
+ 	for autib1716 and pacib1716.
+ 	* config/aarch64/aarch64-protos.h (aarch64_key_type,
+ 	aarch64_post_cfi_startproc): Define.
+ 	* config/aarch64/aarch64-protos.h (aarch64_ra_sign_key): Define extern.
+ 	* config/aarch64/aarch64.c (aarch64_handle_standard_branch_protection,
+ 	aarch64_handle_pac_ret_protection): Set default sign key to A.
+ 	* config/aarch64/aarch64.c (aarch64_expand_epilogue,
+ 	aarch64_expand_prologue): Add check for b-key.
+ 	* config/aarch64/aarch64.c (aarch64_ra_sign_key,
+ 	aarch64_post_cfi_startproc, aarch64_handle_pac_ret_b_key): Define.
+ 	* config/aarch64/aarch64.h (TARGET_ASM_POST_CFI_STARTPROC): Define.
+ 	* config/aarch64/aarch64.c (aarch64_pac_ret_subtypes): Add "b-key".
+ 	* config/aarch64/aarch64.md (unspec): Add UNSPEC_AUTIA1716,
+ 	UNSPEC_AUTIB1716, UNSPEC_AUTIASP, UNSPEC_AUTIBSP, UNSPEC_PACIA1716,
+ 	UNSPEC_PACIB1716, UNSPEC_PACIASP, UNSPEC_PACIBSP.
+ 	* config/aarch64/aarch64.md (do_return): Add check for b-key.
+ 	* config/aarch64/aarch64.md (<pauth_mnem_prefix>sp): Replace
+ 	pauth_hint_num_a with pauth_hint_num.
+ 	* config/aarch64/aarch64.md (<pauth_mnem_prefix>1716): Replace
+ 	pauth_hint_num_a with pauth_hint_num.
+ 	* config/aarch64/aarch64.opt (msign-return-address=): Deprecate.
+ 	* config/aarch64/iterators.md (PAUTH_LR_SP): Add UNSPEC_AUTIASP,
+ 	UNSPEC_AUTIBSP, UNSPEC_PACIASP, UNSPEC_PACIBSP.
+ 	* config/aarch64/iterators.md (PAUTH_17_16): Add UNSPEC_AUTIA1716,
+ 	UNSPEC_AUTIB1716, UNSPEC_PACIA1716, UNSPEC_PACIB1716.
+ 	* config/aarch64/iterators.md (pauth_mnem_prefix): Add UNSPEC_AUTIA1716,
+ 	UNSPEC_AUTIB1716, UNSPEC_PACIA1716, UNSPEC_PACIB1716, UNSPEC_AUTIASP,
+ 	UNSPEC_AUTIBSP, UNSPEC_PACIASP, UNSPEC_PACIBSP.
+ 	* config/aarch64/iterators.md (pauth_hint_num_a): Replace
+ 	UNSPEC_PACI1716 and UNSPEC_AUTI1716 with UNSPEC_PACIA1716 and
+ 	UNSPEC_AUTIA1716 respectively.
+ 	* config/aarch64/iterators.md (pauth_hint_num_a): Rename to
+ 	pauth_hint_num and add UNSPEC_PACIBSP, UNSPEC_AUTIBSP,
+ 	UNSPEC_PACIB1716, UNSPEC_AUTIB1716.
+ 	* doc/invoke.texi (-mbranch-protection): Add b-key type.
+ 	* config/aarch64/aarch64-bti-insert.c (aarch64_pac_insn_p): Rename
+ 	UNSPEC_PACISP to UNSPEC_PACIASP and UNSPEC_PACIBSP.
+ 
+ 2019-05-29  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gimplify.c (struct gimplify_omp_ctx): Add clauses member.
+ 	(gimplify_scan_omp_clauses): Initialize ctx->clauses.
+ 	(gimplify_adjust_omp_clauses_1): Transform lastprivate conditional
+ 	explicit clause on combined parallel into implicit shared clause.
+ 	(gimplify_adjust_omp_clauses): Move lastprivate conditional clause
+ 	and firstprivate if the decl has one too from combined parallel to
+ 	the worksharing construct.
+ 
+ 2019-05-28  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 	    Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-cpus.def (OTHER_FUTURES_MASK): New #define.
+ 
+ 2019-05-28  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* rtl.h (LABEL_REF_P): New #define.
+ 
+ 2019-05-28  John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	* config/pa/pa.c (hppa_profile_hook): Remove offset adjustment.
+ 
+ 2019-05-28  Alejandro Martinez  <alejandro.martinezvicente@arm.com>
+ 
+ 	* internal-fn.c: Marked mask_load_direct as vectorizable.
+ 	* tree-data-ref.c (data_ref_compare_tree): Fixed comment typo.
+ 	* tree-vect-data-refs.c (can_group_stmts_p): Allow masked loads to be
+ 	combined even if masks different with allow_slp_p param.
+ 	(vect_analyze_data_ref_accesses): Mark SLP only vectorizable groups.
+ 	* tree-vect-loop.c (vect_dissolve_slp_only_groups): New function to
+ 	dissolve SLP-only vectorizable groups when SLP has been discarded.
+ 	(vect_analyze_loop_2): Call vect_dissolve_slp_only_groups when needed.
+ 	* tree-vect-slp.c (vect_get_and_check_slp_defs): Check masked loads
+ 	masks.
+ 	(vect_build_slp_tree_1): Fixed comment typo.
+ 	(vect_build_slp_tree_2): Include masks from masked loads in SLP tree.
+ 	* tree-vect-stmts.c (vectorizable_load): Allow vectorizaion of masked
+ 	loads for SLP only.
+ 	* tree-vectorizer.h (_stmt_vec_info): Added flag for SLP-only
+ 	vectorizable.
+ 	* tree-vectorizer.c (vec_info::new_stmt_vec_info): Likewise.
+ 
+ 2019-05-28  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* config/alpha/alpha.c [TARGET_ABI_OSF] (alpha_output_mi_thunk_osf):
+ 	Remove obsolete use_thunk reference.
+ 	* config/i386/i386.c (x86_output_mi_thunk): Likewise.
+ 	* config/ia64/ia64.c (ia64_output_mi_thunk): Likewise.
+ 	* config/nios2/nios2.c (nios2_asm_output_mi_thunk): Likewise.
+ 	* config/or1k/or1k.c (or1k_output_mi_thunk): Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_output_mi_thunk): Likewise.
+ 	* config/sh/sh.c (sh_output_mi_thunk): Likewise.
+ 	* config/sparc/sparc.c (sparc_output_mi_thunk): Likewise.
+ 	* config/tilegx/tilegx.c (tilegx_output_mi_thunk): Likewise.
+ 	* config/tilepro/tilepro.c (tilepro_asm_output_mi_thunk): Likewise.
+ 
+ 2019-05-28  Nathan Sidwell  <nathan@acm.org>
+ 
+ 	* tree.h (IDENTIFIER_ANON_P): New.
+ 	(anon_aggrname_format, anon_aggname_p): Don't declare.
+ 	(make_anon_name): Declare.
+ 	* lto-streamer-out.c (DFS::DFS_write_tree_body): Use IDENTIFIER_ANON_P.
+ 	(hash_tree): Likewise.
+ 	* tree-streamer-out.c (write_ts_decl_minimal_tree): Likewise.
+ 	* tree.c (anon_aggrname_p, anon_aggrname_format): Delete.
+ 	(anon_cnt, make_anon_name): New.
+ 
+ 2019-05-28  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR other/90315
+ 	* opts-global.c (decode_options): Print help for all
+ 	help_option_arguments.
+ 	* opts.c (print_help): Add new argument.
+ 	(common_handle_option): Remember all values into
+ 	help_option_arguments.
+ 	* opts.h (print_help): Add new argument.
+ 
+ 2019-05-28  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/90555
+ 	* ipa-icf-gimple.c (func_checker::compare_loops): New function.
+ 	* ipa-icf-gimple.h (func_checker::compare_loops): Likewise.
+ 	(func_checker::compare_bb): Call compare_loops.
+ 
+ 2019-05-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gimplify.c (gimplify_scan_omp_clauses): Allow lastprivate conditional
+ 	on sections construct.
+ 	* omp-low.c (lower_lastprivate_conditional_clauses): Handle sections
+ 	construct.
+ 	(lower_omp_sections): Handle lastprivate conditional.
+ 	(lower_omp_1) <case GIMPLE_ASSIGN>: Handle sections construct with
+ 	lastprivate_conditional_map.
+ 	* omp-expand.c (expand_omp_sections): Handle lastprivate conditional.
+ 
+ 	* omp-low.c (lower_omp_1) <case GIMPLE_ASSIGN>: Look through ordered,
+ 	critical, taskgroup and section regions when looking for a region
+ 	with non-NULL lastprivate_conditional_map.
+ 
+ 2019-05-27  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.c (ix86_gen_add3): Remove indirect function.
+ 	(*ix86_gen_sub3): Ditto.
+ 	(*ix86_gen_sub3_carry): Ditto.
+ 	(*ix86_gen_one_cmpl2): Ditto.
+ 	(*ix86_gen_andsp): Ditto.
+ 	(ix86_init_large_pic_reg): Use gen_add2_insn instead of ix86_gen_add3.
+ 	(gen_and2_insn): New static function.
+ 	(ix86_expand_prologue): Use gen_and2_insn instead of ix86_gen_andsp.
+ 	Use gen_add3_insn instead of ix86_gen_add3.
+ 	(ix86_expand_split_stack_prologue): Use gen_add2_insn
+ 	instead of ix86_gen_add3.
+ 	(legitimize_tls_address): Use gen_add2_insn instead of ix86_gen_add3.
+ 	Use gen_sub3_insn instead of ix86_gen_sub3.
+ 	* config/i386-expand.c (ix86_split_long_move): Use gen_add2_insn
+ 	instead of ix86_gen_add3.
+ 	(ix86_expand_strlensi_unroll_1): Use gen_add2_insn instead of
+ 	ix86_gen_add3.  Use gen_sub3_insn instead of ix86_gen_sub3.
+ 	(construct_plt_address): Use gen_add2_insn instead of ix86_gen_add3.
+ 	* config/i386/i386-options.c (ix86_option_override_internal):
+ 	Do not initialize ix86_gen_add3, ix86_gen_sub3, ix86_gen_sub3_carry,
+ 	ix86_gen_one_cmpl2 and ix86_gen_andsp.
+ 
+ 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* dwarf2out.c (resolve_args_picking_1): Deal with DW_OP_GNU_addr_index
+ 	and DW_OP_GNU_const_index opcodes.
+ 
+ 2019-05-27  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.h (STACK_SIZE_MODE): Define.
+ 
+ 2019-05-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90637
+ 	* tree-ssa-sink.c (statement_sink_location): Honor the
+ 	computed sink location for single-uses.
+ 
+ 2019-05-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/90610
+ 	* match.pd (vec_perm): Avoid clobbering op0 when not generating
+ 	a bit-insert.
+ 
+ 2019-05-26  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (@sub<mode>3_carry): Rename
+ 	from sub<mode>3_carry.
+ 	(@leave_<mode>): New expander.
+ 	(*leave): Rename from leave.
+ 	(*leave_rex64): Rename from leave_rex64.
+ 	(@monitorx_<mode>): Rename from monitorx_<mode>.
+ 	(@clzero_<mode>): Rename from clzero_<mode>.
+ 	* config/i386/sse.md (@sse3_monitor_<mode>): Rename
+ 	from sse3_monitor_<mode>.
+ 	* config/i386/i386.c (ix86_gen_sub3_carry): Remove indirect function.
+ 	(*ix86_gen_leave): Ditto.
+ 	(*ix86_gen_monitor): Ditto.
+ 	(*ix86_gen_monitorx): Ditto.
+ 	(*ix86_gen_clzero): Ditto.
+ 	(ix86_emit_leave): Use gen_leave instead of ix86_gen_leave.
+ 	* config/i386/i386-expand.c (ix86_expand_strlensi_unroll_1):
+ 	Use gen_sub3_carry instead of ix86_gen_sub3_carry.
+ 	(ix86_expand_builtin) <case IX86_BUILTIN_MONITOR>:
+ 	Use gen_sse3_monitor instead of ix86_gen_monitor.
+ 	<case IX86_BUILTIN_MONITORX>: Use gen_monitorx
+ 	instead of ix86_gen_monitorx.
+ 	<case IX86_BUILTIN_CLZERO>: Use gen_clzero
+ 	instead of ix86_gen_clzero.
+ 	* config/i386/i386-options.c (ix86_option_override_internal):
+ 	Do not initialize ix86_gen_leave, ix86_gen_sub3_carry,
+ 	ix86_gen_monitor, ix86_gen_monitorx and ix86_gen_clzero.
+ 
+ 2019-05-26  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (@tls_global_dynamic_64_<mode>):
+ 	Rename from tls_global_dynamic_64_<mode>.
+ 	(@tls_local_dynamic_base_64_<mode>): Rename from
+ 	tls_local_dynamic_base_64_<mode>.
+ 	* config/i386/i386.c (*ix86_gen_tls_global_dynamic_64):
+ 	Remove indirect function.
+ 	(*ix86_gen_tls_local_dynamic_base_64): Ditto.
+ 	(legitimize_tls_address): Use gen_tls_global_dynamic_64 function
+ 	instead of ix86_gen_tls_global_dynamic_64.
+ 	Use gen_tls_local_dynamic_base_64 instead of
+ 	ix86_gen_tls_local_dynamic_base_64.
+ 	* config/i386/i386-options.c (ix86_option_override_internal):
+ 	Do not initialize ix86_gen_tls_global_dynamic_64 and
+ 	ix86_gen_tls_local_dynamic_base_64.
+ 
+ 2019-05-26  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (@pro_epilogue_adjust_stack_add_<mode>)
+ 	Rename from pro_epilogue_adjust_stack_<mode>_add.
+ 	(@pro_epilogue_adjust_stack_sub_<mode>)
+ 	Rename from pro_epilogue_adjust_stack_<mode>_sub.
+ 	(@allocate_stack_worker_probe_<mode>):
+ 	Rename from allocate_stack_worker_probe_<mode>.
+ 	(allocate_stack): Use gen_allocate_stack_worker_probe.
+ 	(probe_stack): Use gen_probe_stack_1.
+ 	(@probe_stack_1_<mode>): Rename from probe_stack_<mode>.
+ 	(@adjust_stack_and_probe_<mode>): Rename from
+ 	adjust_stack_and_probe<mode>.
+ 	(@probe_stack_range_<mode>): Rename from probe_stack_range<mode>.
+ 	(stack_protect_set): Use gen_stack_protect_set_1.
+ 	(@stack_protect_set_1_<mode>): Rename from stack_protect_set_<mode>.
+ 	(stack_protect_test): Use gen_stack_protect_test_1.
+ 	(@stack_protect_test_1_<mode>): Rename from stack_protect_test_<mode>.
+ 	* config/i386/i386.c (*ix86_gen_allocate_stack_worker):
+ 	Remove indirect function.
+ 	(*ix86_gen_adjust_stack_and_probe): Ditto.
+ 	(*ix86_gen_probe_stack_range): Ditto.
+ 	(pro_epilogue_adjust_stack): Use gen_pro_epilogue_adjust_stack_add
+ 	instead of gen_pro_epilogue_adjust_stack_{si,di}_add.
+ 	(ix86_adjust_stack_and_probe_stack_clash): Use
+ 	gen_adjust_stack_and_probe instead of ix86_gen_adjust_stack_and_probe.
+ 	(ix86_adjust_stack_and_probe): Ditto.
+ 	(ix86_emit_probe_stack_range): Use gen_probe_stack_range instead
+ 	of ix86_gen_probe_stack_range.
+ 	(ix86_expand_prologue): Use gen_pro_epilogue_adjust_stack_sub
+ 	instead of gen_pro_epilogue_adjust_stack_{si,di}_sub.
+ 	* config/i386/x86-tune-sched.c (ix86_macro_fusion_pair_p):
+ 	Include insn-opinit.h.  Use code_for_stack_protect_test_1 instead of
+ 	CODE_FOR_stack_protect_test_{si,di}.
+ 	* config/i386/i386-options.c (ix86_option_override_internal):
+ 	Do not initialize ix86_gen_allocate_stack_worker,
+ 	ix86_gen_adjust_stack_and_probe and ix86_gen_probe_stack_range.
+ 
+ 2019-05-26  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* doc/invoke.texi (Link Options): Many editorial changes around
+ 	-flinker-output.
+ 
+ 2019-05-26  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* doc/invoke.texi (x86 Options, -mvect8-ret-in-mem): Remove
+ 	pre-Solaris 11 referene and most Studio compiler details.
+ 
+ 2019-05-24  John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	PR target/90530
+ 	* config/pa/pa.c (pa_can_change_mode_class): Accept mode changes from
+ 	DImode to SImode in floating-point registers on 64-bit target.
+ 	* config/pa/pa.md (umulsidi3): Change nonimmediate_operand to
+ 	register_operand in xmpyu patterns.
+ 
+ 2019-05-24  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree-core.h (enum omp_clause_code): Add OMP_CLAUSE__CONDTEMP_.
+ 	* tree.h (OMP_CLAUSE_DECL): Use OMP_CLAUSE__CONDTEMP_ instead of
+ 	OMP_CLAUSE__REDUCTEMP_.
+ 	* tree.c (omp_clause_num_ops, omp_clause_code_name): Add
+ 	OMP_CLAUSE__CONDTEMP_.
+ 	(walk_tree_1): Handle OMP_CLAUSE__CONDTEMP_.
+ 	* tree-pretty-print.c (dump_omp_clause): Likewise.
+ 	* tree-nested.c (convert_nonlocal_omp_clauses,
+ 	convert_local_omp_clauses): Likewise.
+ 	* gimplify.c (enum gimplify_omp_var_data): Use hexadecimal constants
+ 	instead of decimal.  Add GOVD_LASTPRIVATE_CONDITIONAL.
+ 	(gimplify_scan_omp_clauses): Don't reject lastprivate conditional
+ 	on OMP_FOR.
+ 	(gimplify_omp_for): Warn and disable conditional modifier from
+ 	lastprivate on loop iterators.
+ 	* omp-general.h (struct omp_for_data): Add lastprivate_conditional
+ 	member.
+ 	* omp-general.c (omp_extract_for_data): Initialize it.
+ 	* omp-low.c (struct omp_context): Add lastprivate_conditional_map
+ 	member.
+ 	(delete_omp_context): Delete it.
+ 	(lower_lastprivate_conditional_clauses): New function.
+ 	(lower_lastprivate_clauses): Add BODY_P and CSTMT_LIST arguments,
+ 	handle lastprivate conditional clauses.
+ 	(lower_reduction_clauses): Add CLIST argument, emit it into
+ 	the critical section if any.
+ 	(lower_omp_sections): Adjust lower_lastprivate_clauses and
+ 	lower_reduction_clauses callers.
+ 	(lower_omp_for_lastprivate): Add CLIST argument, pass it through
+ 	to lower_lastprivate_clauses.
+ 	(lower_omp_for): Call lower_lastprivate_conditional_clauses, adjust
+ 	lower_omp_for_lastprivate and lower_reduction_clauses callers, emit
+ 	clist into a critical section if not emitted there already by
+ 	lower_reduction_clauses.
+ 	(lower_omp_taskreg, lower_omp_teams): Adjust lower_reduction_clauses
+ 	callers.
+ 	(lower_omp_1): Handle GIMPLE_ASSIGNs storing into lastprivate
+ 	conditional variables.
+ 	* omp-expand.c (determine_parallel_type): Punt if OMP_CLAUSE__CONDTEMP_
+ 	clause is present.
+ 	(expand_omp_for_generic, expand_omp_for_static_nochunk,
+ 	expand_omp_for_static_chunk): Handle lastprivate conditional.
+ 	(expand_omp_for): Handle fd.lastprivate_conditional like
+ 	fd.have_reductemp.
+ 
+ 2019-05-24  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-run.c (main): Set a non-zero return value if the
+ 	kernel does not exit cleanly.
+ 	* config/gcn/gcn.md (gcn_return): Insert s_waitcnt before s_dcache_wb.
+ 
+ 2019-05-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Revert:
+ 	* gimplify.c (gimplify_cond_expr): Don't check TREE_ADDRESSABLE.
+ 
+ 2019-05-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR testsuite/90607
+ 	* tree-loop-distribution.c (struct partition): Add location
+ 	member.
+ 	(partition_alloc): Initialize all fields.
+ 	(generate_memset_builtin): Use the location recorded in the
+ 	partition for the generated call.
+ 	(generate_memcpy_builtin): Likewise.
+ 	(classify_partition): Record the location of a single store
+ 	as location for the partition.
+ 
+ 2019-05-24  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn.c (gcn_expand_prologue): Use gen_addsi3_scalar_carry
+ 	for lo-part.
+ 
+ 2019-05-24  Matthew Malcomson  <matthew.malcomson@arm.com>
+ 
+ 	PR target/90588
+ 	* common/config/aarch64/aarch64-common.c
+ 	(aarch64_rewrite_selected_cpu): Change local temporary variable
+ 	type from unsigned long to uint64_t.
+ 	* config/aarch64/aarch64-protos.h (aarch64_parse_extension,
+ 	aarch64_get_extension_string_for_isa_flags): Change declaration to
+ 	match new definition by replacing unsigned long with uint64_t.
+ 
+ 2019-05-24  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/90568
+ 	* config/i386/x86-tune-sched.c (ix86_macro_funsion_pair_p): Call
+ 	gen_attr_type just once instead of 4-7 times.  Formatting fixes.
+ 	Handle stack_protect_test_<mode> codegen similarly to corresponding
+ 	sub instruction.
+ 
+ 2019-05-23  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/i386/darwin.h: Reject -mfentry*.
+ 	* doc/sourcebuild.texi: Document mfentry target support.
+ 
+ 2019-05-23  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_global_entry_point_needed_p):
+ 	Rename to rs6000_global_entry_point_prologue_needed_p.  Return
+ 	false for PC-relative functions.
+ 	(rs6000_output_function_prologue): Change called function name to
+ 	rs6000_global_entry_point_prologue_needed_p.  Emit ".localentry
+ 	name,1" for PC-relative functions.
+ 	(rs6000_elf_declare_function_name): Change called function name to
+ 	rs6000_global_entry_point_prologue_needed_p.
+ 
+ 2019-05-23  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/90552
+ 	* config/i386/i386.c (gen_rtx_cost):
+ 	Use ix86_tune_cost instead of ix86_cost.
+ 
+ 2019-05-23  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 	    Michael Meissner  <meissner@linux.ibm.com>
+ 	    Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Add
+ 	OPTION_MASK_PCREL.
+ 	(POWERPC_MASKS): Add OPTION_MASK_PCREL.
+ 	* config/rs6000/rs6000-protos.h (rs6000_pcrel_p): New prototype.
+ 	(rs6000_fndecl_pcrel_p): Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Report
+ 	error if -mpcrel is requested without -mcpu=future.
+ 	(rs6000_opt_masks): Add entry for pcrel.
+ 	(rs6000_fndecl_pcrel_p): New function.
+ 	(rs6000_pcrel_p): Likewise.
+ 	* config/rs6000/rs6000.opt (mpcrel): New option.
+ 	* doc/invoke.texi: Document -mpcrel and -mno-pcrel.
+ 
+ 2019-05-23  Jan Hubicka  <jh@suse.cz>
+ 	    Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/90576
+ 	* tree-ssa-alias.c (compare_sizes): Remove dead calls to
+ 	poly_int_tree_p.
+ 	(aliasing_component_refs_p): Fix three way size compare conditional;
+ 	give up earlier in case we can not decide on equivalence.
+ 
+ 2019-05-23  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 	    Michael Meissner  <meissner@linux.ibm.com>
+ 	    Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config.gcc: Add future cpu.
+ 	* config/rs6000/driver-rs6000.c (asm_names): Add future cpu.
+ 	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): New
+ 	#define.
+ 	(POWERPC_MASKS): Add OPTION_MASK_FUTURE.
+ 	(RS6000_CPU): New instantiation for future cpu.
+ 	* config/rs6000/rs6000-opts.h (enum processor_type): Add
+ 	PROCESSOR_FUTURE.
+ 	* config/rs6000/rs6000-string.c (expand_compare_loop): Treat
+ 	PROCESSOR_FUTURE like PROCESSOR_POWER9 for now.
+ 	* config/rs6000/rs6000-tables.opt: Regenerate.
+ 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Treat
+ 	PROCESSOR_FUTURE similarly to PROCESSOR_POWER9 for now.
+ 	(rs6000_machine_from_flags): Handle future cpu.
+ 	(rs6000_reassociation_width): Treat PROCESSOR_FUTURE like
+ 	PROCESSOR_POWER9 for now.
+ 	(rs6000_adjust_cost): Likewise.
+ 	(rs6000_issue_rate): Likewise.
+ 	(rs6000_register_move_cost): Likewise.
+ 	(rs6000_opt_masks): Add entry for future.
+ 	* config/rs6000/rs6000.h (ASM_CPU_SPEC): Add future cpu.
+ 	(MASK_FUTURE): New #define.
+ 	* config/rs6000/rs6000.md (define_attr "cpu"): Add future cpu.
+ 	* config/rs6000/rs6000.opt (mfuture): New target option.
+ 	* doc/invoke.texi (mcpu): Add future cpu.
+ 
+ 2019-05-23  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR c++/90587
+ 	* tree-ssa-uninit.c (value_sat_pred_p): The result of &
+ 	operation points to a temporary (pointed via tree_to_wide_ref)
+ 	that is out of scope after the &.
+ 
+ 2019-05-23  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR c++/90592
+ 	* doc/extend.texi (Function Names): Add missing word.
+ 
+ 2019-05-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/88440
+ 	* opts.c (default_options_table): Enable -ftree-loop-distribute-patterns
+ 	at -O[2s]+.
+ 	* tree-loop-distribution.c (generate_memset_builtin): Fold the
+ 	generated call.
+ 	(generate_memcpy_builtin): Likewise.
+ 	(distribute_loop): Pass in whether to only distribute patterns.
+ 	(prepare_perfect_loop_nest): Also allow size optimization.
+ 	(pass_loop_distribution::execute): When optimizing a loop
+ 	nest for size allow pattern replacement.
+ 
+ 2019-05-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/90568
+ 	* config/i386/i386.md (stack_protect_test_<mode>): Use sub instead
+ 	of xor.
+ 
+ 2019-05-23  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR sanitizer/90570
+ 	* gimplify.c (gimplify_target_expr): Skip TREE_STATIC target
+ 	expression similarly to gimplify_decl_expr.
+ 
+ 2019-05-23  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	* cse.c (cse_dump_path): s/dump_file/f.
+ 
+ 2019-05-22  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR c++/90462
+ 	* diagnostic-format-json.cc: Include "selftest.h".
+ 	(json_from_expanded_location): Only add "file" key for non-NULL
+ 	file strings.
+ 	(json_from_location_range): Don't add "start" and "finish"
+ 	children if they are UNKNOWN_LOCATION.
+ 	(selftest::test_unknown_location): New selftest.
+ 	(selftest::test_bad_endpoints): New selftest.
+ 	(selftest::diagnostic_format_json_cc_tests): New function.
+ 	* json.cc (json::object::get): New function.
+ 	(selftest::test_object_get): New selftest.
+ 	(selftest::json_cc_tests): Call it.
+ 	* json.h (json::object::get): New decl.
+ 	* selftest-run-tests.c (selftest::run_tests): Call
+ 	selftest::diagnostic_format_json_cc_tests.
+ 	* selftest.h (selftest::diagnostic_format_json_cc_tests): New
+ 	decl.
+ 
+ 2019-05-22  Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 	    Andrew Stubbs  <amd@codesourcery.com>
+ 
+ 	* config.gcc (gcc_cv_initfini_array): Set for AMD GCN.
+ 	* config/gcn/gcn-run.c (init_array_kernel, fini_array_kernel): New.
+ 	(kernel): Rename to...
+ 	(main_kernel): ... this.
+ 	(load_image): Load _init_array and _fini_array kernels.
+ 	(run): Add argument for kernel to run.
+ 	(main): Run init_array_kernel before main_kernel, and
+ 	fini_array_kernel after.
+ 	* config/gcn/gcn.c (gcn_handle_amdgpu_hsa_kernel_attribute): Allow
+ 	amdgpu_hsa_kernel attribute on functions.
+ 	(gcn_disable_constructors): Delete.
+ 	(TARGET_ASM_CONSTRUCTOR, TARGET_ASM_DESTRUCTOR): Delete.
+ 	* config/gcn/crt0.c (size_t): Define.
+ 	(_init_array, _fini_array): New.
+ 	(__preinit_array_start, __preinit_array_end,
+ 	__init_array_start, __init_array_end,
+ 	__fini_array_start, __fini_array_end): Declare weak references.
+ 
+ 2019-05-22  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn.c (gcn_trampoline_init): Call "sorry" on GCN5.
+ 
+ 2019-05-22  Jason Merrill  <jason@redhat.com>
+ 
+ 	* gimplify.c (gimplify_cond_expr): Don't check TREE_ADDRESSABLE.
+ 
+ 2019-05-22  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/88483
+ 	* config/i386/i386-options.c (ix86_init_machine_status): Set
+ 	stack_frame_required to true.
+ 	* config/i386/i386.c (ix86_get_frame_size): New function.
+ 	(ix86_frame_pointer_required): Replace get_frame_size with
+ 	ix86_get_frame_size.
+ 	(ix86_compute_frame_layout): Likewise.
+ 	(ix86_find_max_used_stack_alignment): Changed to void.  Set
+ 	stack_frame_required.
+ 	(ix86_finalize_stack_frame_flags): Always call
+ 	ix86_find_max_used_stack_alignment.  Replace get_frame_size with
+ 	ix86_get_frame_size.
+ 	* config/i386/i386.h (machine_function): Add stack_frame_required.
+ 
+ 2019-05-22  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/sse.md (sse_cvtpi2ps): Use TARGET_MMX in insn condition.
+ 
+ 2019-05-22  Matthew Malcomson  <matthew.malcomson@arm.com>
+ 
+ 	* common/config/aarch64/aarch64-common.c
+ 	(struct aarch64_option_extension, struct processor_name_to_arch,
+ 	struct arch_to_arch_name, aarch64_parse_extension, opt_ext_cmp,
+ 	aarch64_contains_opt,
+ 	aarch64_get_extension_string_for_isa_flags): Change type of
+ 	variables storing flags to uint64_t.
+ 	* config/aarch64/aarch64-option-extensions.def (sve2, sve2-sm4,
+ 	sve2-aes, sve2-sha3, bitperm): New optional SVE2 extension flags.
+ 	* config/aarch64/aarch64.c (struct processor,
+ 	aarch64_parse_arch, aarch64_parse_cpu, aarch64_validate_mcpu,
+ 	aarch64_validate_march, aarch64_override_options,
+ 	aarch64_option_print, aarch64_handle_attr_isa_flags,
+ 	aarch64_declare_function_name, aarch64_start_file): Make flag
+ 	variables uint64_t.
+ 	* config/aarch64/aarch64.h (AARCH64_FL_SVE2, AARCH64_FL_SVE2_AES,
+ 	AARCH64_FL_SVE2_SM4, AARCH64_FL_SVE2_SHA3,
+ 	AARCH64_FL_SVE2_BITPERM): New macro feature flags.
+ 	* config/aarch64/aarch64.opt (aarch64_isa_flags): Make uint64_t.
+ 	* config/aarch64/driver-aarch64.c
+ 	(struct aarch64_arch_extension, struct aarch64_core_data,
+ 	struct aarch64_arch_driver_info, host_detect_local_cpu): Make
+ 	flag variables uint64_t.
+ 	* doc/invoke.texi: Add documentation for new arguments.
+ 
+ 2019-05-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	* alias.c (ao_ref_from_mem): Move stack-slot sharing
+ 	rewrite ...
+ 	* emit-rtl.c (set_mem_attributes_minus_bitpos): ... here.
+ 
+ 2019-05-22  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR lto/90500
+ 	* doc/extend.texi: Document the change.
+ 
+ 2019-05-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90450
+ 	* tree-ssa-loop-im.c (struct im_mem_ref): Add ref_decomposed.
+ 	(mem_ref_hasher::equal): Check it.
+ 	(mem_ref_alloc): Initialize it.
+ 	(gather_mem_refs_stmt): Set it.
+ 
+ 2019-05-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	* gimple-fold.c (arith_code_with_undefined_signed_overflow):
+ 	Add ABS_EXPR.
+ 	(rewrite_to_defined_overflow): Handle rewriting ABS_EXPR
+ 	as ABSU_EXPR.
+ 
+ 2019-05-22  Alan Modra  <amodra@gmail.com>
+ 
+ 	* config/rs6000/rs6000.h (ASM_OPT_ANY): Define.
+ 	(ASM_CPU_SPEC): Conditionally add -many.
+ 	* config/rs6000/rs6000.c (rs6000_machine): New static var.
+ 	(rs6000_machine_from_flags, emit_asm_machine): New functions..
+ 	(rs6000_file_start): ..extracted from here, and modified to
+ 	test all ISA bits.
+ 	(rs6000_output_function_prologue): Emit .machine as necessary.
+ 
+ 2019-05-22  Hans-Peter Nilsson  <hp@axis.com>
+ 
+ 	PR middle-end/90553
+ 	* ira-lives.c (process_bb_node_lives): Consider defs
+ 	for a call insn to be die before the call, not after.
+ 
+ 	* function.c (assign_parm_setup_block): Raise alignment of
+ 	stacked parameter only for STRICT_ALIGNMENT targets.
+ 
+ 2019-05-21  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wz"):
+ 	Delete.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wz.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.md: Replace "wz" constraint by "d" with "p7".
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-05-21  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wl"):
+ 	Delete.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wl.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.md: Replace "wl" constraint by "d" with "p6".
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-05-21  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wm"):
+ 	Delete.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wm.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/vsx.md: Replace "wm" constraint by "wa" with "p8v".
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-05-21  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wk"):
+ 	Delete.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wk.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.md: Replace "wk" constraint by "ws" with "p8v".
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-05-21  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wj"):
+ 	Delete.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wj.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.md: Replace "wj" constraint by "wi" with "p8v".
+ 	(VS_64dm): Delete.
+ 	* config/rs6000/vsx.md: Ditto.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-05-21  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wh"):
+ 	Delete.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wh.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.md: Replace "wh" constraint by "wa" with "p8v".
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-05-21  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/90547
+ 	* config/i386/i386.md (anddi_1 to andsi_1_zext splitter):
+ 	Avoid calling gen_lowpart with CONST operand.
+ 
+ 2019-05-21  Alexandre Oliva  <aoliva@redhat.com>
+ 
+ 	* tree-ssa-threadupdate.c (struct ssa_local_info_t): Add
+ 	field template_last_to_copy.
+ 	(ssa_create_duplicates): Set it, and use it.  Attempt to
+ 	preserve more debug stmts.
+ 
+ 2019-05-21  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/sse.md (VF1_AVX2): New mode iterator.
+ 	(signbit<mode>2): New expander
+ 
+ 2019-05-21  James Clarke  <jrtc27@jrtc27.com>
+ 
+ 	PR bootstrap/87338
+ 	* dwarf2out.c (dwarf2out_inline_entry): Use ASM_OUTPUT_DEBUG_LABEL
+ 	instead of ASM_GENERATE_INTERNAL_LABEL and ASM_OUTPUT_LABEL.
+ 
+ 2019-05-21  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/cpuid.h (__cpuid): For 32bit targets, zero
+ 	%ebx and %ecx bafore calling cpuid with leaf 1 or
+ 	non-constant leaf argument.
+ 
+ 2019-05-21  Alan Modra  <amodra@gmail.com>
+ 
+ 	PR target/90545
+ 	* config/rs6000/rs6000.c (rs6000_register_move_cost): Increase
+ 	power9 direct move cost.
+ 
+ 2019-05-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/90510
+ 	* fold-const.c (fold_read_from_vector): New function.
+ 	* fold-const.h (fold_read_from_vector): Declare.
+ 	* match.pd (VEC_PERM_EXPR): Build BIT_INSERT_EXPRs for
+ 	single-element insert permutations.  Canonicalize selector
+ 	further and fix issue with last commit.
+ 
+ 2019-05-21  Vladislav Ivanishin  <vlad@ispras.ru>
+ 
+ 	* tree-cfg.h (split_critical_edges): Add for_edge_insertion_p
+ 	parameter with default value false to declaration.
+ 	(split_edges_for_insertion): New inline function.  Wrapper for
+ 	split_critical_edges with for_edge_insertion_p = true.
+ 	* tree-cfg.c (split_critical_edges): Don't split non-critical
+ 	edges if for_edge_insertion_p is false.  Fix whitespace.
+ 	* tree-ssa-pre.c (pass_pre::execute): Call
+ 	split_edges_for_insertion instead of split_critical_edges.
+ 	* tree-ssa-tail-merge.c (tail_merge_optimize): Ditto.
+ 	* tree-ssa-sink.c (pass_sink_code::execute): Ditto.
+ 	(pass_data_sink_code): Update function name in the comment.
+ 
+ 2019-05-21  Vladislav Ivanishin  <vlad@ispras.ru>
+ 
+ 	* tree-ssa-uninit.c (value_sat_pred_p): This new function is a wrapper
+ 	around is_value_included_in that knows how to handle BIT_AND_EXPR.
+ 	(is_pred_expr_subset_of): Use the new function.  Handle more cases where
+ 	code1 == EQ_EXPR and where code1 == BIT_AND_EXPR and thus fix some false
+ 	positives.
+ 
+ 2019-05-21  Martin Liska  <mliska@suse.cz>
+ 
+ 	* config/rs6000/driver-rs6000.c (elf_platform): Do not use
+ 	an extra newline.
+ 	* config/rs6000/rs6000-c.c (rs6000_pragma_longcal): Wrap pragma in %<%>.
+ 	(altivec_resolve_overloaded_builtin): Likewise for vec_lvsl and
+ 	vec_lvsr.
+ 	* config/rs6000/rs6000.c (rs6000_option_override_internal):
+ 	Quote a C type.
+ 	(rs6000_function_arg): Likewise.
+ 	(rs6000_expand_set_fpscr_drn_builtin): Remove trailing dot.
+ 	(rs6000_expand_ternop_builtin): Use interval syntax.
+ 	(get_element_number): Likewise.
+ 	(altivec_expand_builtin): Likewise.
+ 	(rs6000_get_function_versions_dispatcher): Quote target_clones.
+ 
+ 2019-05-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/59813
+ 	PR target/90418
+ 	* function.h (struct function): Add calls_eh_return member.
+ 	* gimplify.c (gimplify_call_expr): Set cfun->calls_eh_return when
+ 	gimplifying __builtin_eh_return call.
+ 	* tree-inline.c (initialize_cfun): Copy calls_eh_return from src_cfun
+ 	to cfun.
+ 	(expand_call_inline): Or in src_cfun->calls_eh_return into
+ 	dst_cfun->calls_eh_return.
+ 	* tree-tailcall.c (suitable_for_tail_call_opt_p): Return false if
+ 	cfun->calls_eh_return.
+ 	* lto-streamer-in.c (input_struct_function_base): Read calls_eh_return.
+ 	* lto-streamer-out.c (output_struct_function_base): Write
+ 	calls_eh_return.
+ 
+ 2019-05-20  Marc Glisse  <marc.glisse@inria.fr>
+ 
+ 	PR rtl-optimization/43147
+ 	* config/i386/i386.c (ix86_gimple_fold_builtin): Handle
+ 	IX86_BUILTIN_SHUFPD.
+ 
+ 2019-05-20  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (refs_may_alias_p_2): Break out from ...
+ 	(refs_may_alias_p_1): ... here; update stats.
+ 	(refs_may_alias_p): Do not update stats here.
+ 
+ 2019-05-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-structalias.c (find_func_aliases): POINTER_DIFF_EXPR
+ 	doesn't produce pointers.
+ 	{TRUNC,CEIL,FLOOR,ROUND,EXACT}_{DIV,MOD}_EXPR points to what
+ 	the first operand points to.
+ 
+ 2019-05-20  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (compare_sizes): New function.
+ 	(sompare_type_sizes): New function
+ 	(aliasing_component_refs_p): Use it.
+ 	(indirect_ref_may_alias_decl_p): Likewise.
+ 
+ 2019-05-20  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* config/i386/sol2.h (CC1_SPEC): Reject -mx32.
+ 
+ 2019-05-20  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* config/sol2.h (LIBTSAN_EARLY_SPEC): Remove : after %e.
+ 	(LIBLSAN_EARLY_SPEC): Likewise.
+ 	* config/i386/sol2.h (ASAN_REJECT_SPEC): Likewise.
+ 
+ 2019-05-20  Martin Liska  <mliska@suse.cz>
+ 
+ 	* config/i386/i386.c (ix86_libc_has_fast_function):
+ 	Add ATTRIBUTE_UNUSED for the argument.
+ 
+ 2019-05-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	* gimple-match-head.c: Include vec-perm-indices.h.
+ 	* generic-match-head.c: Likewise.
+ 	* fold-const.h (fold_vec_perm): Declare when vec-perm-indices.h
+ 	is included.
+ 	* fold-const.c (fold_vec_perm): Export.
+ 	(fold_ternary_loc): Move non-constant folding of VEC_PERM_EXPR...
+ 	(match.pd): ...here.
+ 
+ 2019-05-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* cfgloop.h (struct loop): Add simdlen member.
+ 	* cfgloopmanip.c (copy_loop_info): Copy simdlen as well.
+ 	* omp-expand.c (expand_omp_simd): Set it if simdlen clause is present.
+ 	* tree-vect-loop.c (vect_analyze_loop): Pass loop->simdlen != 0
+ 	as new argument to autovectorize_vector_sizes target hook.  If
+ 	loop->simdlen, pick up vector size where the vectorization factor
+ 	is equal to loop->simd, and if there is none, fall back to the first
+ 	successful one.
+ 	(vect_transform_loop): Adjust autovectorize_vector_sizes target hook
+ 	caller.
+ 	* omp-low.c (omp_clause_aligned_alignment): Likewise.
+ 	* omp-general.c (omp_max_vf): Likewise.
+ 	* optabs-query.c (can_vec_mask_load_store_p): Likewise.
+ 	* tree-vect-slp.c (vect_slp_bb): Likewise.
+ 	* target.def (autovectorize_vector_sizes): Add ALL argument and
+ 	document it.
+ 	* doc/tm.texi: Adjust documentation.
+ 	* targhooks.c (default_autovectorize_vector_sizes): Add bool argument.
+ 	* targhooks.h (default_autovectorize_vector_sizes): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes): Add
+ 	bool argument.
+ 	* config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
+ 	* config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
+ 	* config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
+ 	* config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.  If
+ 	true and TARGET_AVX512F or TARGET_AVX, push 3 or 2 sizes even if
+ 	preferred vector size is not 512-bit or 256-bit, just put those
+ 	unpreferred ones last.
+ 
+ 2019-05-20  Martin Liska  <mliska@suse.cz>
+ 
+ 	* targhooks.c (default_libc_has_fast_function): New function.
+ 	* targhooks.h (default_libc_has_fast_function): Likewise.
+ 
+ 2019-05-20  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR middle-end/90263
+ 	* builtins.c (expand_builtin_memory_copy_args): When having a
+ 	target with fast mempcpy implementation do now use memcpy.
+ 	* config/i386/i386.c (ix86_libc_has_fast_function): New.
+ 	(TARGET_LIBC_HAS_FAST_FUNCTION): Likewise.
+ 	* doc/tm.texi: Likewise.
+ 	* doc/tm.texi.in: Likewise.
+ 	* target.def:
+ 	* expr.c (emit_block_move_hints): Add 2 new arguments.
+ 	* expr.h (emit_block_move_hints): Bail out when libcall
+ 	to memcpy would be used.
+ 
+ 2019-05-20  Martin Liska  <mliska@suse.cz>
+ 
+ 	* profile-count.c: Add vertical spacing in order
+ 	to separate functions.
+ 	* profile-count.h: Likewise.
+ 
+ 2019-05-20  Martin Liska  <mliska@suse.cz>
+ 
+ 	* profile-count.h: Do not use full qualified
+ 	names if possible.
+ 	* profile-count.c (profile_count::to_frequency): Likewise.
+ 
+ 2019-05-20  Martin Liska  <mliska@suse.cz>
+ 
+ 	* profile-count.h (enum profile_quality): Use capital letters
+ 	for enum value names.  Use the adjusted names.
+ 	* profile-count.c: Use the adjusted names.
+ 
+ 2019-05-19  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wH"):
+ 	Delete.
+ 	(define_register_constraint "wI"): Delete.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wH and RS6000_CONSTRAINT_wI.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.md: Replace "wH" and "wI" constraints by "v"
+ 	resp. "d", or with "wa" as appropriate, all with "p8v".
+ 	* config/rs6000/vsx.md: Ditto.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-05-19  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wy"):
+ 	Delete.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wy.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.md: Replace "wy" constraint by "wa" with "p8v".
+ 	Use "<Fisa>" as "isa" in all alternatives that use "<Fv2>".
+ 	(define_mode_attr Fisa): New.
+ 	* config/rs6000/vsx.md: Replace "wy" constraint by "wa" with "p8v".
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-05-19  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wu"):
+ 	Delete.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wu.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.md: Replace "wu" constraint by "v" or "wa",
+ 	both with "p8v".
+ 	(define_mode_attr Fa): Delete.
+ 	* config/rs6000/vsx.md: Ditto.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-05-19  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wJ"):
+ 	Delete.
+ 	(define_register_constraint "wK"): Delete.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wJ and RS6000_CONSTRAINT_wK.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.md: Replace "wJ" constraint by "wI" with "p9v".
+ 	Replace "wK" constraint by "wH" with "p9v".
+ 	* config/rs6000/vsx.md: Ditto.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-05-19  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wb"):
+ 	Delete.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wb.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.md: Replace "wb" constraint by "v" with "p9v".
+ 	* config/rs6000/vsx.md: Ditto.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-05-19  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/constraints.md (define_register_constraint "wo"):
+ 	Delete.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
+ 	RS6000_CONSTRAINT_wo.
+ 	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
+ 	(rs6000_init_hard_regno_mode_ok): Adjust.
+ 	* config/rs6000/rs6000.md: Replace "wo" constraint by "wa" with "p9v".
+ 	* config/rs6000/altivec.md: Ditto.
+ 	* doc/md.texi (Machine Constraints): Adjust.
+ 
+ 2019-05-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin-c.c (darwin_register_objc_includes): Do not
+ 	prepend the sysroot when building gnu-runtime header search
+ 	paths.
+ 
+ 2019-05-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.c (darwin_file_end): Use switch_to_section ()
+ 	instead of direct output of the asm.
+ 
+ 2019-05-17  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.c (restore_saved_cr): Change a boolean
+ 	argument to be type bool (was int before).
+ 	(rs6000_emit_epilogue): Simplify some code.  Declare some variables
+ 	at first use.  Use type bool for some variables.  Fix a theoretical
+ 	eh_return bug for svr4.
+ 
+ 2019-05-17  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (isa): New attribute.
+ 	(enabled): New attribute.
+ 
+ 2019-05-17  Max Filippov  <jcmvbkbc@gmail.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_output_mi_thunk): Call
+ 	assemble_start_function and assemble_end_function.
+ 
+ 2019-05-17  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	PR middle-end/89433
+ 	* omp-general.c (oacc_verify_routine_clauses): Change formal
+ 	parameters.  Add checking if already marked with an OpenACC
+ 	'routine' directive.  Adjust all users.
+ 
+ 	PR middle-end/89433
+ 	* omp-general.c (oacc_build_routine_dims): Move some of its
+ 	processing into...
+ 	(oacc_verify_routine_clauses): ... this new function.
+ 	* omp-general.h (oacc_verify_routine_clauses): New prototype.
+ 
+ 2019-05-17  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/rs6000.c (machopic_output_stub): Adjust the
+ 	formating of picbase labels to match other ports.
+ 
+ 2019-05-17  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/rs6000.c (macho_branch_islands): Fix bad indent
+ 	in the generated code.
+ 
+ 2019-05-16  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* builtins.c (expand_builtin_atomic_always_lock_free): Quote
+ 	identifiers, keywords, operators, and types in diagnostics.  Correct
+ 	quoting, spelling, and sentence capitalization issues.
+ 	(expand_builtin_atomic_is_lock_free): Same.
+ 	(fold_builtin_next_arg): Same.
+ 	* cfgexpand.c (expand_one_var): Same.
+ 	(tree_conflicts_with_clobbers_p): Same.
+ 	(expand_asm_stmt): Same.
+ 	(verify_loop_structure): Same.
+ 	* cgraphunit.c (process_function_and_variable_attributes): Same.
+ 	* collect-utils.c (collect_execute): Same.
+ 	* collect2.c (maybe_run_lto_and_relink): Same.
+ 	(is_lto_object_file): Same.
+ 	(scan_prog_file): Same.
+ 	* convert.c (convert_to_real_1): Same.
+ 	* dwarf2out.c (dwarf2out_begin_prologue): Same.
+ 	* except.c (verify_eh_tree): Same.
+ 	* gcc.c (execute): Same.
+ 	(eval_spec_function): Same.
+ 	(run_attempt): Same.
+ 	(driver::set_up_specs): Same.
+ 	(compare_debug_auxbase_opt_spec_function): Same.
+ 	* gcov-tool.c (unlink_gcda_file): Same.
+ 	(do_merge): Same.
+ 	(do_rewrite): Same.
+ 	* gcse.c (gcse_or_cprop_is_too_expensive): Same.
+ 	* gimplify.c (gimplify_asm_expr): Same.
+ 	(gimplify_adjust_omp_clauses): Same.
+ 	* hsa-gen.c (gen_hsa_addr_insns): Same.
+ 	(gen_hsa_insns_for_load): Same.
+ 	(gen_hsa_cmp_insn_from_gimple): Same.
+ 	(gen_hsa_insns_for_operation_assignment): Same.
+ 	(gen_get_level): Same.
+ 	(gen_hsa_alloca): Same.
+ 	(omp_simple_builtin::generate): Same.
+ 	(gen_hsa_atomic_for_builtin): Same.
+ 	(gen_hsa_insns_for_call): Same.
+ 	* input.c (dump_location_info): Same.
+ 	* ipa-devirt.c (compare_virtual_tables): Same.
+ 	* ira.c (ira_setup_eliminable_regset): Same.
+ 	* lra-assigns.c (lra_assign): Same.
+ 	* lra-constraints.c (lra_constraints): Same.
+ 	* lto-streamer-in.c (lto_input_mode_table): Same.
+ 	* lto-wrapper.c (get_options_from_collect_gcc_options): Same.
+ 	(merge_and_complain): Same.
+ 	(compile_offload_image): Same.
+ 	(compile_images_for_offload_targets): Same.
+ 	(debug_objcopy): Same.
+ 	(run_gcc): Same.
+ 	(main): Same.
+ 	* opts.c (print_specific_help): Same.
+ 	(parse_no_sanitize_attribute): Same.
+ 	(print_help): Same.
+ 	(handle_param): Same.
+ 	* plugin.c (add_new_plugin): Same.
+ 	(parse_plugin_arg_opt): Same.
+ 	(try_init_one_plugin): Same.
+ 	* print-rtl.c (debug_bb_n_slim): Quote identifiers, keywords,
+ 	operators, and types in diagnostics.  Correct quoting and spelling
+ 	issues.
+ 	* read-rtl-function.c (parse_edge_flag_token): Same.
+ 	(function_reader::parse_enum_value): Same.
+ 	* reg-stack.c (check_asm_stack_operands): Same.
+ 	* regcprop.c (validate_value_data): Same.
+ 	* sched-rgn.c (make_pass_sched_fusion): Same.
+ 	* stmt.c (check_unique_operand_names): Same.
+ 	* targhooks.c (default_target_option_pragma_parse): Same.
+ 	* tlink.c (recompile_files): Same.
+ 	* toplev.c (process_options): Same.
+ 	(do_compile): Same.
+ 	* trans-mem.c (diagnose_tm_1): Same.
+ 	(ipa_tm_scan_irr_block): Same.
+ 	(ipa_tm_diagnose_transaction): Same.
+ 	* tree-cfg.c (verify_address): Same.  Use get_tree_code_name to
+ 	format a tree code name in a diagnostic.
+ 	(verify_types_in_gimple_min_lval): Same.
+ 	(verify_types_in_gimple_reference): Same.
+ 	(verify_gimple_call): Same.
+ 	(verify_gimple_assign_unary): Same.
+ 	(verify_gimple_assign_binary): Same.
+ 	(verify_gimple_assign_ternary): Same.
+ 	(verify_gimple_assign_single): Same.
+ 	(verify_gimple_switch): Same.
+ 	(verify_gimple_label): Same.
+ 	(verify_gimple_phi): Same.
+ 	(verify_gimple_in_seq): Same.
+ 	(verify_eh_throw_stmt_node): Same.
+ 	(collect_subblocks): Same.
+ 	(gimple_verify_flow_info): Same.
+ 	(do_warn_unused_result): Same.
+ 	* tree-inline.c (expand_call_inline): Same.
+ 	* tree-into-ssa.c (update_ssa): Same.
+ 	* tree.c (tree_int_cst_elt_check_failed): Same.
+ 	(tree_vec_elt_check_failed): Same.
+ 	(omp_clause_operand_check_failed): Same.
+ 	(verify_type_variant): Same.
+ 	(verify_type): Same.
+ 	* value-prof.c (verify_histograms): Same.
+ 	* varasm.c (assemble_start_function): Same.
+ 
+ 2019-05-16  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* config/i386/i386-expand.c (get_element_number): Quote keywords
+ 	and other internal names in diagnostics.  Adjust other diagnostic
+ 	formatting issues noted by -Wformat-diag.
+ 	* config/i386/i386-features.c
+ 	(ix86_mangle_function_version_assembler_name): Same.
+ 	* config/i386/i386-options.c (ix86_handle_abi_attribute): Same.
+ 	* config/i386/i386.c (ix86_function_type_abi): Same.
+ 	(ix86_function_ms_hook_prologue): Same.
+ 	(classify_argument): Same.
+ 	(ix86_expand_prologue): Same.
+ 	(ix86_md_asm_adjust): Same.
+ 	(ix86_memmodel_check): Same.
+ 
+ 2019-05-17  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
+ 
+ 	* config/mips/mips.c (mips_dwarf_frame_reg_mode): Replace
+ 	TARGET_FLOAT64 with !TARGET_FLOAT32, thus handling both fp64
+ 	and fpxx modes.
+ 
+ 2019-05-17  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/90497
+ 	* config/i386/i386-expand.c (ix86_expand_builtin): Enable MMX
+ 	intrinsics without SSE/SSE2/SSSE3.
+ 	* config/i386/mmx.md (mmx_uavgv8qi3): Restore TARGET_3DNOW
+ 	check.
+ 	(*mmx_uavgv8qi3): Likewise.
+ 
+ 2019-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	* gimple-pretty-print.c (dump_ternary_rhs): Handle dumping
+ 	VEC_PERM_EXPR as __VEC_PERM with -gimple.
+ 
+ 2019-05-17  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390-builtins.def (s390_vec_sldw_*): Use the
+ 	vec_sldw insn pattern.
+ 
+ 2019-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	* ccmp.c (expand_ccmp_expr_1): Do not use gimple_assign_rhs_to_tree.
+ 
+ 2019-05-17  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR driver/90496
+ 	* toplev.c (output_stack_usage): With LTO and sanitizer it
+ 	happens that a global ctor (_GLOBAL__sub_I_00099_0_main)
+ 	has no file location.
+ 
+ 2019-05-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/90484
+ 	* tree-ssa-scopedtables.c (equal_mem_array_ref_p): Don't assert that
+ 	sz0 is equal to sz1, instead return false in that case.
+ 
+ 	* omp-low.c (lower_rec_input_clauses): If OMP_CLAUSE_IF
+ 	has non-constant expression, force sctx.lane and use two
+ 	argument IFN_GOMP_SIMD_LANE instead of single argument.
+ 	* tree-ssa-dce.c (eliminate_unnecessary_stmts): Don't DCE
+ 	two argument IFN_GOMP_SIMD_LANE without lhs.
+ 	* tree-vectorizer.h (struct _loop_vec_info): Add simd_if_cond
+ 	member.
+ 	(LOOP_VINFO_SIMD_IF_COND, LOOP_REQUIRES_VERSIONING_FOR_SIMD_IF_COND):
+ 	Define.
+ 	(LOOP_REQUIRES_VERSIONING): Or in
+ 	LOOP_REQUIRES_VERSIONING_FOR_SIMD_IF_COND.
+ 	* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
+ 	simd_if_cond.
+ 	(vect_analyze_loop_2): Punt if LOOP_VINFO_SIMD_IF_COND is constant 0.
+ 	* tree-vect-loop-manip.c (vect_loop_versioning): Add runtime check
+ 	from simd if clause if needed.
+ 
+ 2019-05-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-affine.c (expr_to_aff_combination): New function split
+ 	out from...
+ 	(tree_to_aff_combination): ... here.
+ 	(aff_combination_expand): Avoid building a GENERIC tree.
+ 
+ 2019-05-16  Max Filippov  <jcmvbkbc@gmail.com>
+ 
+ 	* cgraphunit.c (cgraph_node::expand_thunk): Remove
+ 	assemble_start_function and assemble_end_function calls.
+ 	* config/alpha/alpha.c (alpha_output_mi_thunk_osf): Call
+ 	assemble_start_function and assemble_end_function.
+ 	* config/arc/arc.c (arc_output_mi_thunk): Likewise.
+ 	* config/arm/arm.c (arm_output_mi_thunk): Likewise.
+ 	* config/bfin/bfin.c (bfin_output_mi_thunk): Likewise.
+ 	* config/c6x/c6x.c (c6x_output_mi_thunk): Likewise.
+ 	* config/cris/cris.c (cris_asm_output_mi_thunk): Likewise.
+ 	* config/csky/csky.c (csky_output_mi_thunk): Likewise.
+ 	* config/epiphany/epiphany.c (epiphany_output_mi_thunk): Likewise.
+ 	* config/frv/frv.c (frv_asm_output_mi_thunk): Likewise.
+ 	* config/i386/i386.c (x86_output_mi_thunk): Likewise.
+ 	* config/ia64/ia64.c (ia64_output_mi_thunk): Likewise.
+ 	* config/m68k/m68k.c (m68k_output_mi_thunk): Likewise.
+ 	* config/microblaze/microblaze.c (microblaze_asm_output_mi_thunk):
+ 	Likewise.
+ 	* config/mips/mips.c (mips_output_mi_thunk): Likewise.
+ 	* config/mmix/mmix.c (mmix_asm_output_mi_thunk): Likewise.
+ 	* config/mn10300/mn10300.c (mn10300_asm_output_mi_thunk): Likewise.
+ 	* config/nds32/nds32.c (nds32_asm_output_mi_thunk): Likewise.
+ 	* config/nios2/nios2.c (nios2_asm_output_mi_thunk): Likewise.
+ 	* config/or1k/or1k.c (or1k_output_mi_thunk): Likewise.
+ 	* config/pa/pa.c (pa_asm_output_mi_thunk): Likewise.
+ 	* config/riscv/riscv.c (riscv_output_mi_thunk): Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_output_mi_thunk): Likewise.
+ 	* config/s390/s390.c (s390_output_mi_thunk): Likewise.
+ 	* config/sh/sh.c (sh_output_mi_thunk): Likewise.
+ 	* config/sparc/sparc.c (sparc_output_mi_thunk): Likewise.
+ 	* config/spu/spu.c (spu_output_mi_thunk): Likewise.
+ 	* config/stormy16/stormy16.c (xstormy16_asm_output_mi_thunk):
+ 	Likewise.
+ 	* config/tilegx/tilegx.c (tilegx_output_mi_thunk): Likewise.
+ 	* config/tilepro/tilepro.c (tilepro_asm_output_mi_thunk): Likewise.
+ 	* config/vax/vax.c (vax_output_mi_thunk): Likewise.
+ 
+ 2019-05-16  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (alias_stats): Add
+ 	aliasing_component_refs_p_may_alias and
+ 	aliasing_component_refs_p_no_alias.
+ 	(dump_alias_stats): Print aliasing_component_refs_p stats.
+ 	(aliasing_component_refs_p): Update stats.
+ 
+ 2019-05-16  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR lto/90500
+ 	* multiple_target.c (expand_target_clones): Do not allow
+ 	target_clones being used with a symbol that is an alias.
+ 
+ 2019-05-16  Vladislav Ivanishin  <vlad@ispras.ru>
+ 
+ 	PR tree-optimization/90394
+ 	* tree-ssa-uninit.c (is_pred_expr_subset_of): Potentially give false
+ 	positives rather than ICE for cases where (code2 == NE_EXPR
+ 	&& code1 == BIT_AND_EXPR).
+ 
+ 2019-05-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR fortran/90329
+ 	* tree-core.h (struct tree_decl_common): Document
+ 	decl_nonshareable_flag for PARM_DECLs.
+ 	* tree.h (DECL_HIDDEN_STRING_LENGTH): Define.
+ 	* calls.c (expand_call): Don't try tail call if caller
+ 	has any DECL_HIDDEN_STRING_LENGTH PARM_DECLs that are or might be
+ 	passed on the stack and callee needs to pass any arguments on the
+ 	stack.
+ 	* tree-streamer-in.c (unpack_ts_decl_common_value_fields): Use
+ 	else if instead of series of mutually exclusive ifs.  Handle
+ 	DECL_HIDDEN_STRING_LENGTH for PARM_DECLs.
+ 	* tree-streamer-out.c (pack_ts_decl_common_value_fields): Likewise.
+ 
+ 	* lto-streamer.h (LTO_major_version): Bump to 9.
+ 
+ 2019-05-16  Jun Ma  <JunMa@linux.alibaba.com>
+ 
+ 	PR tree-optimization/90106
+ 	* tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds): Add
+ 	new parameter as new internal function call, also move it to new
+ 	basic block.
+ 	(use_internal_fn): Pass internal function call to
+ 	shrink_wrap_one_built_in_call_with_conds.
+ 
+ 2019-05-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* omp-low.c (lower_rec_input_clauses): For if (0) or simdlen (1) set
+ 	max_vf to 1.
+ 	* omp-expand.c (expand_omp_simd): For if (0) or simdlen (1) clear
+ 	safelen_int and set loop->dont_vectorize.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/i386-builtin.def: Enable MMX intrinsics with
+ 	SSE/SSE2/SSSE3.
+ 	* config/i386/i386-builtins.c (ix86_init_mmx_sse_builtins):
+ 	Likewise.
+ 	* config/i386/i386-expand.c (ix86_expand_builtin): Allow
+ 	SSE/SSE2/SSSE3 to emulate MMX intrinsics with TARGET_MMX_WITH_SSE.
+ 	* config/i386/mmintrin.h: Only require SSE2 if __MMX_WITH_SSE__
+ 	is defined.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (*vec_dupv2sf): Changed to
+ 	define_insn_and_split to support SSE emulation.
+ 	(*vec_extractv2sf_0): Likewise.
+ 	(*vec_extractv2sf_1): Likewise.
+ 	(*vec_extractv2si_0): Likewise.
+ 	(*vec_extractv2si_1): Likewise.
+ 	(*vec_extractv2si_zext_mem): Likewise.
+ 	(vec_setv2sf): Also allow TARGET_MMX_WITH_SSE.
+ 	(vec_extractv2sf_1 splitter): Likewise.
+ 	(vec_extractv2sfsf): Likewise.
+ 	(vec_setv2si): Likewise.
+ 	(vec_extractv2si_1 splitter): Likewise.
+ 	(vec_extractv2sisi): Likewise.
+ 	(vec_setv4hi): Likewise.
+ 	(vec_extractv4hihi): Likewise.
+ 	(vec_setv8qi): Likewise.
+ 	(vec_extractv8qiqi): Likewise.
+ 	(vec_extractv2sfsf): Also allow TARGET_MMX_WITH_SSE.  Pass
+ 	TARGET_MMX_WITH_SSE ix86_expand_vector_extract.
+ 	(vec_extractv2sisi): Likewise.
+ 	(vec_extractv4hihi): Likewise.
+ 	(vec_extractv8qiqi): Likewise.
+ 	(vec_initv2sfsf): Also allow TARGET_MMX_WITH_SSE.  Pass
+ 	TARGET_MMX_WITH_SSE to ix86_expand_vector_init.
+ 	(vec_initv2sisi): Likewise.
+ 	(vec_initv4hihi): Likewise.
+ 	(vec_initv8qiqi): Likewise.
+ 	(vec_setv2si): Also allow TARGET_MMX_WITH_SSE.  Pass
+ 	TARGET_MMX_WITH_SSE to ix86_expand_vector_set.
+ 	(vec_setv4hi): Likewise.
+ 	(vec_setv8qi): Likewise.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (MMXMODE:mov<mode>): Also allow
+ 	TARGET_MMX_WITH_SSE.
+ 	(MMXMODE:*mov<mode>_internal): Likewise.
+ 	(MMXMODE:movmisalign<mode>): Likewise.
+ 
+ 2019-05-15  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89021
+ 	* config/i386/i386.md (*zero_extendsidi2): Add mmx_isa attribute.
+ 	* config/i386/sse.md (sse2_cvtpi2pd): Ditto.
+ 	(sse2_cvtpd2pi): Ditto.
+ 	(sse2_cvttpd2pi): Ditto.
+ 	(*vec_concatv2sf_sse4_1): Ditto.
+ 	(*vec_concatv2sf_sse): Ditto.
+ 	(*vec_concatv2si_sse4_1): Ditto.
+ 	(*vec_concatv2si): Ditto.
+ 	(*vec_concatv4si_0): Ditto.
+ 	(*vec_concatv2di_0): Ditto.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/sse.md (abs<mode>2): Add SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/sse.md (ssse3_palignrdi): Changed to
+ 	define_insn_and_split to support SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/sse.md (ssse3_psign<mode>3): Add SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/sse.md (ssse3_pshufbv8qi3): Changed to
+ 	define_insn_and_split.  Also allow TARGET_MMX_WITH_SSE.  Add
+ 	SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/sse.md (ssse3_pmulhrswv4hi3): Require TARGET_MMX
+ 	or TARGET_MMX_WITH_SSE.
+ 	(*ssse3_pmulhrswv4hi3): Add SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/sse.md (ssse3_pmaddubsw): Add SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/sse.md (ssse3_ph<plusminus_mnemonic>dv2si3):
+ 	Changed to define_insn_and_split to support SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/sse.md (ssse3_ph<plusminus_mnemonic>wv4hi3):
+ 	Changed to define_insn_and_split to support SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_<emms>): Renamed to ...
+ 	(*mmx_<emms>): This.
+ 	(mmx_<emms>): New expander.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (sse2_umulv1siv1di3): Add SSE emulation
+ 	support.
+ 	(*sse2_umulv1siv1di3): Add SSE2 emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (sse_movntq): Add SSE2 emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_psadbw): Add SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_uavgv4hi3): Also check TARGET_MMX and
+ 	TARGET_MMX_WITH_SSE.
+ 	(*mmx_uavgv4hi3): Add SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_uavgv8qi3): Also check TARGET_MMX
+ 	and TARGET_MMX_WITH_SSE.
+ 	(*mmx_uavgv8qi3): Add SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/xmmintrin.h: Emulate MMX maskmovq with SSE2
+ 	maskmovdqu for __MMX_WITH_SSE__.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_umulv4hi3_highpart): Also check
+ 	TARGET_MMX and TARGET_MMX_WITH_SSE.
+ 	(*mmx_umulv4hi3_highpart): Add SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_pmovmskb): Changed to
+ 	define_insn_and_split to support SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_<code>v4hi3): Also check TARGET_MMX
+ 	and TARGET_MMX_WITH_SSE.
+ 	(mmx_<code>v8qi3): Likewise.
+ 	(smaxmin:<code>v4hi3): New.
+ 	(umaxmin:<code>v8qi3): Likewise.
+ 	(smaxmin:*mmx_<code>v4hi3): Add SSE emulation.
+ 	(umaxmin:*mmx_<code>v8qi3): Likewise.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_pinsrw): Also check TARGET_MMX and
+ 	TARGET_MMX_WITH_SSE.
+ 	(*mmx_pinsrw): Add SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_pextrw): Add SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/sse.md (sse_cvtpi2ps): Changed to
+ 	define_insn_and_split.  Also allow TARGET_MMX_WITH_SSE.  Add
+ 	SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/sse.md (sse_cvtps2pi): Add SSE emulation.
+ 	(sse_cvttps2pi): Likewise.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_pshufw): Also check TARGET_MMX and
+ 	TARGET_MMX_WITH_SSE.
+ 	(mmx_pshufw_1): Add SSE emulation.
+ 	(*vec_dupv4hi): Changed to define_insn_and_split and also allow
+ 	TARGET_MMX_WITH_SSE to support SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/constraints.md (Yw): New constraint.
+ 	* config/i386/mmx.md (*vec_dupv2si): Changed to
+ 	define_insn_and_split and also allow TARGET_MMX_WITH_SSE to
+ 	support SSE emulation.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_eq<mode>3): Also allow
+ 	TARGET_MMX_WITH_SSE.
+ 	(*mmx_eq<mode>3): Also allow TARGET_MMX_WITH_SSE.  Add SSE
+ 	support.
+ 	(mmx_gt<mode>3): Likewise.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_andnot<mode>3): Also allow
+ 	TARGET_MMX_WITH_SSE.  Add SSE support.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (any_logic:mmx_<code><mode>3): Also allow
+ 	TARGET_MMX_WITH_SSE.
+ 	(any_logic:<code><mode>3): New.
+ 	(any_logic:*mmx_<code><mode>3): Also allow TARGET_MMX_WITH_SSE.
+ 	Add SSE support.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_ashr<mode>3): Also allow
+ 	TARGET_MMX_WITH_SSE.  Add SSE emulation.
+ 	(mmx_<shift_insn><mode>3): Likewise.
+ 	(ashr<mode>3): New.
+ 	(<shift_insn><mode>3): Likewise.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE.
+ 	(*mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE.  Add SSE support.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_smulv4hi3_highpart): Also allow
+ 	TARGET_MMX_WITH_SSE.
+ 	(*mmx_smulv4hi3_highpart): Also allow TARGET_MMX_WITH_SSE. Add
+ 	SSE support.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (mmx_mulv4hi3): Also allow
+ 	TARGET_MMX_WITH_SSE.
+ 	(mulv4hi3): New.
+ 	(*mmx_mulv4hi3): Also allow TARGET_MMX_WITH_SSE.  Add SSE
+ 	support.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/mmx.md (MMXMODEI8): Require TARGET_SSE2 for V1DI.
+ 	(plusminus:mmx_<plusminus_insn><mode>3): Check
+ 	TARGET_MMX_WITH_SSE.
+ 	(sat_plusminus:mmx_<plusminus_insn><mode>3): Likewise.
+ 	(<plusminus_insn><mode>3): New.
+ 	(*mmx_<plusminus_insn><mode>3): Add SSE emulation.
+ 	(*mmx_<plusminus_insn><mode>3): Likewise.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/i386-expand.c (ix86_split_mmx_punpck): New function.
+ 	* config/i386/i386-protos.h (ix86_split_mmx_punpck): New
+ 	prototype.
+ 	* config/i386/mmx.m (mmx_punpckhbw): Changed to
+ 	define_insn_and_split to support SSE emulation.
+ 	(mmx_punpcklbw): Likewise.
+ 	(mmx_punpckhwd): Likewise.
+ 	(mmx_punpcklwd): Likewise.
+ 	(mmx_punpckhdq): Likewise.
+ 	(mmx_punpckldq): Likewise.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 	    Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89021
+ 	* config/i386/i386-expand.c (ix86_move_vector_high_sse_to_mmx):
+ 	New function.
+ 	(ix86_split_mmx_pack): Likewise.
+ 	* config/i386/i386-protos.h (ix86_move_vector_high_sse_to_mmx):
+ 	New prototype.
+ 	(ix86_split_mmx_pack): Likewise.
+ 	* config/i386/i386.md (mmx_isa): New.
+ 	(enabled): Also check mmx_isa.
+ 	* config/i386/mmx.md (any_s_truncate): New code iterator.
+ 	(s_trunsuffix): New code attr.
+ 	(mmx_packsswb): Removed.
+ 	(mmx_packssdw): Likewise.
+ 	(mmx_packuswb): Likewise.
+ 	(mmx_pack<s_trunsuffix>swb): New define_insn_and_split to emulate
+ 	MMX packsswb/packuswb with SSE2.
+ 	(mmx_packssdw): Likewise.
+ 	* config/i386/predicates.md (register_mmxmem_operand): New.
+ 
+ 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89021
+ 	* config/i386/i386-c.c (ix86_target_macros_internal): Define
+ 	__MMX_WITH_SSE__ for TARGET_MMX_WITH_SSE.
+ 	* config/i386/i386.c (ix86_set_reg_reg_cost): Add support for
+ 	TARGET_MMX_WITH_SSE with VALID_MMX_REG_MODE.
+ 	(ix86_vector_mode_supported_p): Likewise.
+ 	* config/i386/i386.h (TARGET_MMX_WITH_SSE): New.
+ 
+ 2019-05-15  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR middle-end/90478
+ 	* tree-switch-conversion.c (jump_table_cluster::can_be_handled):
+ 	Check for overflow.
+ 
+ 2019-05-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-into-ssa.c (pass_build_ssa::execute): Run
+ 	update_address_taken before going into SSA.
+ 
+ 2019-05-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-pretty-print.c (dump_generic_node): Dump BIT_FIELD_REF
+ 	as __BIT_FIELD_REF with type with -gimple.
+ 
+ 2019-05-15  Vladislav Ivanishin  <vlad@ispras.ru>
+ 
+ 	* tree-ssa-uninit.c (is_value_included_in): Remove is_unsigned and merge
+ 	semantically equivalent branches (left over after prior refactorings).
+ 
+ 2019-05-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/88828
+ 	* tree-ssa-forwprop.c (simplify_vector_constructor): Fix
+ 	bogus check.
+ 
+ 2019-05-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-pretty-print.c (dump_generic_node): Dump VIEW_CONVERT_EXPR
+ 	as __VIEW_CONVERT with -gimple.
+ 
+ 2019-05-12  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/82920
+ 	* config/i386/darwin.h (CC1_SPEC): Report -mx32 as an error for
+ 	Darwin.
+ 
+ 2019-05-14  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (eh_set_lr_<mode>): Merge with following
+ 	define_split to become a define_insn_and_split.
+ 
+ 2019-05-14  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000-protos.h (rs6000_emit_epilogue): Change
+ 	arguments.
+ 	* config/rs6000/rs6000.c (rs6000_emit_epilogue): Change arguments.
+ 	* config/rs6000/rs6000.md (epilogue_type): New define_enum.
+ 	(sibcall_epilogue): Adjust.
+ 	(epilogue): Adjust.
+ 
+ 2019-05-14  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* config.gcc: Move *-*-solaris2.10* from obsolete configurations
+ 	to unsupported ones.
+ 	Simplify x86_64-*-solaris2.1[0-9]* to x86_64-*-solaris2*.
+ 	* config.host: Likewise.
+ 	* config/i386/sol2.h (ASM_COMMENT_START): Remove.
+ 	* config/sparc/driver-sparc.c (host_detect_local_cpu) [__sun__ &&
+ 	__svr4__]: Remove "brand" fallback.
+ 	[!KSTAT_DATA_STRING]: Remove.
+ 	* configure.ac (gcc_cv_ld_hidden): Simplify *-*-solaris2.1[0-9]*
+ 	to *-*-solaris2*.
+ 	(comdat_group): Likewise.
+ 	(set_have_as_tls): Likewise.
+ 	(gcc_cv_target_dl_iterate_phdr): Likewise.
+ 	(gcc_cv_as_shf_merge): Remove Solaris 10/x86 workaround.
+ 	(gcc_cv_ld_aligned_shf_merge): Remove Solaris 10/SPARC workaround.
+ 	* configure: Regenerate.
+ 	* doc/install.texi: Simplify Solaris target triplets.
+ 	(Specific, i?86-*-solaris2*): Remove Solaris 10 references.
+ 	(Specific, *-*-solaris2*): Document Solaris 10 removal.
+ 	Remove Solaris 10 references.
+ 	Remove obsolete Solaris bug reference.
+ 	(Specific, sparc-sun-solaris2.10): Remove.
+ 
+ 2019-05-14  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (any_div): New code iterator.
+ 	(paired_mod): New code attribute.
+ 	(sgnprefix): Handle DIV and UDIV RTXes.
+ 	(u): Ditto.
+ 	(<u>divmod<mode>4): Macroize expander from divmod<mode>4
+ 	and udivmod<mode>4 patterns using any_div code iterator.
+ 	(divmod splitters): Macroize splitters using any_div code iterator.
+ 	(*udivmodsi4_pow2_zext_1): Use exactl_log2 in insn condition.
+ 	(*udivmodsi4_pow2_zext_2): Ditto.
+ 	(*<u>divmod<mode>4_noext): Macroize insn from *divmod<mode>4_noext
+ 	and *udivmod<mode>4_noext patterns using any_div code iterator.
+ 	(*<u>divmod<mode>4_noext_zext_1): Macroize insn from
+ 	*divmod<mode>4_noext_zext_1 and *udivmod<mode>4_noext_zext_1
+ 	patterns using any_div code iterator.
+ 	(*<u>divmod<mode>4_noext_zext_2): Macroize insn from
+ 	*divmod<mode>4_noext_zext_2 and *udivmod<mode>4_noext_zext_2
+ 	patterns using any_div code iterator.
+ 	(<u>divmodhiqi3): Macroize insn from divmodhiqi3 and
+ 	udivmodhiqi3 patterns using any_extend code iterator.
+ 
+ 2019-05-14  Richard Biener  <rguenther@suse.de>
+ 	    H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR tree-optimization/88828
+ 	* tree-ssa-forwprop.c (simplify_vector_constructor): Handle
+ 	permuting in a single non-constant element not extracted
+ 	from a vector.
+ 
+ 2019-05-14  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>
+ 
+ 	* internal-fn.def (SIGNBIT): New.
+ 	* config/aarch64/aarch64-simd.md (signbitv2sf2): New expand
+ 	defined.
+ 	(signbitv4sf2): Likewise.
+ 
+ 2019-05-14  Chenghua Xu  <paul.hua.gm@gmail.com>
+ 
+ 	PR target/90357
+ 	* config/mips/mips.c (mips_split_move): Skip forward SRC into
+ 	next insn when the SRC reg is dead.
+ 
+ 2019-05-14  Bin Cheng  <bin.cheng@linux.alibaba.com>
+ 
+ 	* gimple-ssa-strength-reduction.c (lookup_cand): Adjust index by 1.
+ 	(alloc_cand_and_find_basis): Ditto.
+ 	(backtrace_base_for_ref, create_mul_ssa_cand): Remove if-then-else.
+ 	(create_mul_imm_cand, create_add_ssa_cand): Ditto.
+ 	(create_add_imm_cand, slsr_process_cast): Ditto.
+ 	(slsr_process_copy, replace_mult_candidate): Ditto.
+ 	(replace_rhs_if_not_dup, replace_one_candidate): Ditto.
+ 	(dump_cand_vec, analyze_candidates_and_replace): Skip NULL element.
+ 	(pass_strength_reduction::execute): Init the first NULL element.
+ 
+ 2019-05-13  Nathan Sidwell  <nathan@acm.org>
+ 
+ 	* gcc.c (execute): Simplify cond-expr into if.  Reformat comment.
+ 	(run_attempt): Reformat line break.
+ 
+ 2019-05-13  David Edelsohn  <dje.gcc@gmail.com>
+ 
+ 	PR target/90418
+ 	* config/rs6000/rs6000.c (rs6000_emit_epilogue): Don't load EH
+ 	data registers in sibcall epilogues.
+ 	Don't add EH_RETURN_STACKADJ_RTX to sp in sibcall epilogues.
+ 
+ 2019-05-13  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89221
+ 	* configure.ac (--enable-frame-pointer):
+ 	Disable by default for cygwin and mingw.
+ 	* configure: Regenerate.
+ 
+ 2019-05-13  Nathan Sidwell  <nathan@acm.org>
+ 
+ 	* dwarf2out.c (breakout_comdat_types): Move comment to correct
+ 	piece of code.
+ 	(const_ok_for_output_1): Balance parens around #if/#else/#endif
+ 	(gen_member_die): Move abstract origin check earlier.  Only VARs
+ 	can be static_inline_p.  Simplify splicing control flow.
+ 
+ 2019-05-13  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-slp.c (vect_get_and_check_slp_defs): Handle
+ 	VIEW_CONVERT_EXPR.
+ 	(vect_build_slp_tree_1): Likewise.
+ 
+ 2019-05-13  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90402
+ 	* tree-if-conv.c (tree_if_conversion): Value number only
+ 	the loop body by making the latch an exit of the region
+ 	as well.
+ 	* tree-ssa-sccvn.c (process_bb): Add flag whether to skip
+ 	processing PHIs.
+ 	(do_rpo_vn): Deal with multiple edges into the entry block
+ 	that are not backedges inside the region by skipping PHIs
+ 	of the entry block.
+ 
+ 2019-05-13  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90316
+ 	* tree-ssa-pre.c (insert_aux): Fold into ...
+ 	(insert): ... this function.  Use a RPO walk to reduce the
+ 	number of required iterations.
+ 
+ 2019-05-13  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/90416
+ 	* tree-vect-stmts.c (vect_check_load_store_mask): Concatenate
+ 	string instead of passing the second part as va_arg argument.
+ 
+ 2019-05-13  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR gcov-profile/90380
+ 	* gcov.c (handle_cycle): Do not support zero cycle count,
+ 	it should not be possible.
+ 	(path_contains_zero_cycle_arc): New function.
+ 	(circuit): Ignore zero cycle arc counts.
+ 
+ 2019-05-13  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR gcov-profile/90380
+ 	* gcov.c (enum loop_type): Remove the enum and
+ 	the operator.
+ 	(handle_cycle): Assert that we should not reach
+ 	a negative count.
+ 	(circuit): Use loop_found instead of a tri-state loop_type.
+ 	(get_cycles_count): Do not handle NEGATIVE_LOOP as it can't
+ 	happen.
+ 
+ 2019-05-12  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/82920
+ 	* config/i386/i386.c (ix86_output_jmp_thunk_or_indirect): New.
+ 	(ix86_output_indirect_branch_via_reg): Use output mechanism
+ 	accounting for __USER_LABEL_PREFIX__.
+ 	(ix86_output_indirect_branch_via_push): Likewise.
+ 	(ix86_output_function_return): Likewise.
+ 	(ix86_output_indirect_function_return): Likewise.
+ 
+ 2019-05-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* doc/md.texi: Document use of code attributes in rtx patterns.
+ 	* read-md.h (rtx_reader::rtx_alloc_for_name): New member function.
+ 	* read-rtl.c (find_code): Split out search loops into...
+ 	(maybe_find_code): ...this new function.
+ 	(check_code_iterator): Make the error message more informative.
+ 	(check_code_attribute): New function.
+ 	(rtx_reader::rtx_alloc_for_name): Likewise.
+ 	(rtx_reader::read_rtx_code): Use rtx_alloc_for_name.
+ 	* config/aarch64/predicates.md (aarch64_smin, aarch64_umin): Delete.
+ 	* config/aarch64/aarch64-simd.md (*aarch64_<su>abd<mode>_3): Use
+ 	<max_opp> directly as an rtx code instead of via a match_operator.
+ 	* config/aarch64/aarch64-sve.md (aarch64_<su>abd<mode>_3): Likewise.
+ 	(<su>abd<mode>_3): Update accordingly.
+ 
+ 2019-05-12  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/rs6000.c (debug_stack_info): When -mdebug=stack
+ 	is given, print the state of the EH "save world" computation for
+ 	Darwin.
+ 
+ 2019-05-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/59813
+ 	* config/aarch64/aarch64.c (aarch64_expand_epilogue): Don't add
+ 	EH_RETURN_STACKADJ_RTX to sp in sibcall epilogues.
+ 
+ 2019-05-11  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (floatdi<X87MODEF:mode>2_i387_with_xmm):
+ 	Use pinsrd for TARGET_SSE4_1.
+ 	* config/i386/sse.md (movdi_to_sse): Ditto.
+ 
+ 2019-05-10  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-sccvn.c (visit_reference_op_call): Initialize value-id.
+ 	(do_rpo_vn): Initialize next_value_id.
+ 
+ 2019-05-10  Martin Liska  <mliska@suse.cz>
+ 
+ 	* params.def (PARAM_GIMPLE_FE_COMPUTED_HOT_BB_THRESHOLD):
+ 	Fix plural form.
+ 
+ 2019-05-10  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/90385
+ 	* tree-parloops.c (try_create_reduction_list): Punt on non-SSA_NAME
+ 	arguments of the exit phis.
+ 
+ 	PR c++/90383
+ 	* tree-inline.h (struct copy_body_data): Add do_not_fold member.
+ 	* tree-inline.c (remap_gimple_op_r): Avoid folding expressions if
+ 	id->do_not_fold.
+ 	(copy_tree_body_r): Likewise.
+ 	(copy_fn): Set id.do_not_fold to true.
+ 
+ 2019-05-10  Martin Liska  <mliska@suse.cz>
+ 
+ 	* config/i386/i386-expand.c (ix86_expand_floorceildf_32):
+ 	Reapply changes from r269790.
+ 
+ 2019-05-10  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR middle-end/90340
+ 	* doc/invoke.texi: New params.
+ 	* params.def (PARAM_JUMP_TABLE_MAX_GROWTH_RATIO_FOR_SIZE): New.
+ 	(PARAM_JUMP_TABLE_MAX_GROWTH_RATIO_FOR_SPEED): Likewise.
+ 	* tree-switch-conversion.c (jump_table_cluster::can_be_handled):
+ 	Use it.
+ 	* tree-switch-conversion.h (struct jump_table_cluster):
+ 	Likewise.
+ 
+ 2019-05-09  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* combine.c (combine_simplify_rtx): Don't make IF_THEN_ELSE RTL.
+ 
+ 2019-05-09  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 
+ 	* doc/loop.texi: Remove reference to FOR_EACH_LOOP_BREAK.
+ 
+ 2019-05-09  Alexander Monakov  <amonakov@ispras.ru>
+ 
+ 	PR rtl-optimization/88879
+ 	* sel-sched.c (sel_target_adjust_priority): Remove assert.
+ 
+ 2019-05-09  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/90405
+ 	* config/arm/arm.c (callee_saved_reg_p): Move before
+ 	thumb_find_work_register.
+ 	(thumb1_prologue_unused_call_clobbered_lo_regs): Move before
+ 	thumb_find_work_register.  Only call df_get_live_out once.
+ 	(thumb1_epilogue_unused_call_clobbered_lo_regs): Likewise.
+ 	(thumb_find_work_register): Use
+ 	thumb1_prologue_unused_call_clobbered_lo_regs instead of ad hoc
+ 	algorithms to locate a spare call clobbered reg.
+ 
+ 2019-05-09  Martin Liska  <mliska@suse.cz>
+ 
+ 	* gimple-pretty-print.c (dump_binary_rhs): Dump MIN_EXPR
+ 	and MAX_EXPR in GIMPLE FE format.
+ 
+ 2019-05-09  Martin Liska  <mliska@suse.cz>
+ 
+ 	* tree-cfg.c (dump_function_to_file): Dump entry BB count.
+ 	* gimple-pretty-print.c (dump_gimple_bb_header):
+ 	Dump BB count.
+ 	(pp_cfg_jump): Dump edge probability.
+ 	* profile-count.c (profile_quality_as_string): Simplify
+ 	with a static array.
+ 	(parse_profile_quality): New function.
+ 	(profile_count::dump): Simplify with a static array.
+ 	(profile_count::from_gcov_type): Add new argument.
+ 	* profile-count.h (parse_profile_quality): Likewise.
+ 	* predict.h (set_hot_bb_threshold): New.
+ 	* params.def (PARAM_GIMPLE_FE_COMPUTED_HOT_BB_THRESHOLD):
+ 	New param.
+ 	* predict.c (get_hot_bb_threshold): Set from the new param.
+ 	(set_hot_bb_threshold): New.
+ 
+ 2019-05-09  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90395
+ 	* tree-ssa-forwprop.c (pass_forwprop::execute): Do not
+ 	rewrite vector stores that throw internally.
+ 
+ 2019-05-09  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	* cif-code.def (CHKP): Remove.
+ 
+ 	PR target/89221
+ 	* configure.ac (--enable-frame-pointer): Disable by default for
+ 	GNU systems.
+ 	* configure: Regenerate.
+ 
+ 2019-05-09  Alan Modra  <amodra@gmail.com>
+ 
+ 	PR target/89271
+ 	* config/rs6000/rs6000.h (enum reg_class, REG_CLASS_NAMES),
+ 	(REG_CLASS_CONTENTS): Add GEN_OR_VSX_REGS class.
+ 	* config/rs6000/rs6000.c (rs6000_register_move_cost): Correct
+ 	cost for general <-> vsx when direct moves are available.
+ 	Cost union classes at minimal cost for any reg in the class.
+ 	Correct calculation for moves between vsx, float, and altivec.
+ 	Don't return a low cost for moves between special regs.  Don't
+ 	use hard coded register numbers.
+ 	(TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS): Define.
+ 	(rs6000_ira_change_pseudo_allocno_class): New function.
+ 	* config/rs6000/rs6000.md (movsi_internal1, mov<mode>_internal),
+ 	(movdi_internal32, movdi_internal64): Remove '*' from vsx register
+ 	alternatives.
+ 	(movsi_internal1): Don't disparage vector alternatives.
+ 	(mov<mode>_internal): Likewise, excepting alternative that
+ 	will be split.
+ 	* config/rs6000/vsx.md (vsx_splat_<mode>_reg): Don't disparage
+ 	we <- b alternative.
+ 
+ 2019-05-08  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/59813
+ 	PR tree-optimization/89060
+ 	* tree-ssa-live.h (live_vars_map): New typedef.
+ 	(compute_live_vars, live_vars_at_stmt, destroy_live_vars): Declare.
+ 	* tree-ssa-live.c: Include gimple-walk.h and cfganal.h.
+ 	(struct compute_live_vars_data): New type.
+ 	(compute_live_vars_visit, compute_live_vars_1, compute_live_vars,
+ 	live_vars_at_stmt, destroy_live_vars): New functions.
+ 	* tree-tailcall.c: Include tree-ssa-live.h.
+ 	(live_vars, live_vars_vec): New global variables.
+ 	(find_tail_calls): Perform variable life analysis before punting.
+ 	(tree_optimize_tail_calls_1): Clean up live_vars and live_vars_vec.
+ 	* tree-inline.h (struct copy_body_data): Add eh_landing_pad_dest
+ 	member.
+ 	* tree-inline.c (add_clobbers_to_eh_landing_pad): Remove BB argument.
+ 	Perform variable life analysis to select variables that really need
+ 	clobbers added.
+ 	(copy_edges_for_bb): Don't call add_clobbers_to_eh_landing_pad here,
+ 	instead set id->eh_landing_pad_dest and assert it is the same.
+ 	(copy_cfg_body): Call it here if id->eh_landing_pad_dest is non-NULL.
+ 
+ 2019-05-08  Mihail Ionescu  <mihail.ionescu@arm.com>
+ 	    Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/88167
+ 	* config/arm/arm.c (thumb1_prologue_unused_call_clobbered_lo_regs): New
+ 	function.
+ 	(thumb1_epilogue_unused_call_clobbered_lo_regs): New function.
+ 	(thumb1_compute_save_core_reg_mask): Don't force a spare work
+ 	register if both the epilogue and prologue can use call-clobbered
+ 	regs.
+ 	(thumb1_unexpanded_epilogue): Use
+ 	thumb1_epilogue_unused_call_clobbered_lo_regs.  Reverse the logic for
+ 	picking temporaries for restoring high regs to match that of the
+ 	prologue where possible.
+ 	(thumb1_expand_prologue): Add any usable call-clobbered low registers to
+ 	the list of work registers.  Detect if the return address is still live
+ 	at the end of the prologue and avoid using it for a work register if so.
+ 	If the return address is not live, add LR to the list of pushable regs
+ 	after the first pass.
+ 
+ 2019-05-08  Bin Cheng  <bin.cheng@linux.alibaba.com>
+ 
+ 	PR tree-optimization/90078
+ 	* tree-ssa-loop-ivopts.c (inttypes.h): Include new header file.
+ 	(INFTY): Increase the value for infinite cost.
+ 	(struct comp_cost): Promote type of members to int64_t.
+ 	(infinite_cost): Don't set complexity in initialization.
+ 	(comp_cost::operator +,-,+=,-+,/=,*=): Assert when cost computation
+ 	overflows to infinite_cost.
+ 	(adjust_setup_cost): Promote type of parameter and cost computation
+ 	to int64_t.
+ 	(struct ainc_cost_data, struct iv_ca): Promote type of member to
+ 	int64_t.
+ 	(get_scaled_computation_cost_at, determine_iv_cost): Promote type of
+ 	cost computation to int64_t.
+ 	(determine_group_iv_costs, iv_ca_dump, find_optimal_iv_set): Use
+ 	int64_t's format specifier in dump.
+ 
+ 2019-05-08  Bin Cheng  <bin.cheng@linux.alibaba.com>
+ 
+ 	PR tree-optimization/90240
+ 	* tree-ssa-loop-ivopts.c (get_scaled_computation_cost_at): Scale cost
+ 	with respect to scaling factor pre-computed for each basic block.
+ 	(try_improve_iv_set): Return bool if best_cost equals to iv_ca cost.
+ 	(find_optimal_iv_set_1): Free iv_ca set if it has infinite_cost.
+ 	(COST_SCALING_FACTOR_BOUND, determine_scaling_factor): New.
+ 	(tree_ssa_iv_optimize_loop): Call determine_scaling_factor.  Extend
+ 	live range for array of loop's basic blocks.  Cleanup aux field of
+ 	loop's basic blocks.
+ 
+ 2019-05-08  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/90356
+ 	* match.pd ((X +/- 0.0) +/- 0.0): Optimize into X +/- 0.0 if possible.
+ 
+ 2019-05-07  Wei Xiao  <wei3.xiao@intel.com>
+ 
+ 	* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512BF16_SET
+ 	OPTION_MASK_ISA_AVX512BF16_UNSET, OPTION_MASK_ISA2_AVX512BW_UNSET): New.
+ 	(OPTION_MASK_ISA2_AVX512F_UNSET): Add OPTION_MASK_ISA_AVX512BF16_UNSET.
+ 	(ix86_handle_option): Handle -mavx512bf16.
+ 	* config.gcc: Add avx512bf16vlintrin.h and avx512bf16intrin.h
+ 	to extra_headers.
+ 	* config/i386/avx512bf16vlintrin.h: New.
+ 	* config/i386/avx512bf16intrin.h: New.
+ 	* config/i386/cpuid.h (bit_AVX512BF16): New.
+ 	* config/i386/driver-i386.c (host_detect_local_cpu): Detect BF16.
+ 	* config/i386/i386-builtin-types.def: Add new types.
+ 	* config/i386/i386-builtin.def: Add new builtins.
+ 	* config/i386/i386-c.c (ix86_target_macros_internal): Define
+ 	__AVX512BF16__.
+ 	* config/i386/i386-option.c (ix86_target_string): Add -mavx512bf16.
+ 	(ix86_option_override_internal): Handle BF16.
+ 	(ix86_valid_target_attribute_inner_p): Ditto.
+ 	* config/i386/i386-expand.c (ix86_expand_args_builtin): Ditto.
+ 	* config/i386/i386-builtin.c (enum processor_features): Add
+ 	F_AVX512BF16.
+ 	(static const _isa_names_table isa_names_table): Ditto.
+ 	* config/i386/i386.h (TARGET_AVX512BF16, TARGET_AVX512BF16_P): New.
+ 	(PTA_AVX512BF16): Ditto.
+ 	* config/i386/i386.opt: Add -mavx512bf16.
+ 	* config/i386/immintrin.h: Include avx512bf16intrin.h
+ 	and avx512bf16vlintrin.h.
+ 	* config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode><mask_name>,
+ 	avx512f_cvtneps2bf16_<mode><mask_name>,
+ 	avx512f_dpbf16ps_<mode><mask_half_name>): New define_insn patterns.
+ 	* config/i386/subst.md (mask_half): Add new subst.
+ 	* doc/invoke.texi: Document -mavx512bf16.
+ 
+ 2019-05-07  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000-protos.h (rs6000_legitimize_reload_address_ptr):
+ 	Delete declaration.
+ 	* config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Delete.
+ 	(rs6000_debug_legitimize_reload_address): Delete.
+ 	(rs6000_legitimize_reload_address_ptr): Delete.
+ 	(rs6000_option_override_internal): Adjust.
+ 	(mem_operand_gpr): Adjust comment.
+ 	(legitimate_lo_sum_address_p): Ditto.
+ 	(rs6000_legitimize_reload_address): Delete.
+ 	(rs6000_debug_legitimize_reload_address): Delete.
+ 	* config/rs6000/rs6000.h (LEGITIMIZE_RELOAD_ADDRESS): Delete.
+ 
+ 2019-05-07  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+ 
+ 	PR target/89765
+ 	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
+ 	In handling of ALTIVEC_BUILTIN_VEC_INSERT, use modular arithmetic
+ 	to compute vector element selector for both constant and variable
+ 	operands.
+ 
+ 2019-05-07  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (cvt_mnemonic): New mode attribute.
+ 	(ashr<mode>3_cvt): Merge insn pattern from ashrsi3_cvt and
+ 	ashrdi3_cvt using SWI48 mode iterator.
+ 
+ 2019-05-07  Alejandro Martinez  <alejandro.martinezvicente@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (<su>abd<mode>_3): New define_expand.
+ 	(aarch64_<su>abd<mode>_3): Likewise.
+ 	(*aarch64_<su>abd<mode>_3): New define_insn.
+ 	(<sur>sad<vsi2qi>): New define_expand.
+ 	* config/aarch64/iterators.md: Added MAX_OPP attribute.
+ 	* tree-vect-loop.c (use_mask_by_cond_expr_p): Add SAD_EXPR.
+ 	(build_vect_cond_expr): Likewise.
+ 
+ 2019-05-07  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* cfgexpand.c (asm_clobber_reg_is_valid): Reject
+ 	clobbers outside of accessible_reg_set.
+ 	* config/i386/i386.c (ix86_conditional_register_usage):
+ 	Disable register sets by clearing corresponding bits in
+ 	accessible_reg_set.  Do not set corresponding bits in fixed_regs,
+ 	call_used_regs and don't clear corresponding reg_names array members.
+ 
+ 2019-05-07  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-stmts.c (vect_is_simple_cond): When vectype is
+ 	not specified still compute a comp_vectype for invariant
+ 	compares.
+ 
+ 2019-05-07  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90316
+ 	* tree-ssa-pre.c (translate_vuse_through_block): When
+ 	same_valid is NULL do not bother to search for a virtual
+ 	PHI continuation.
+ 	(phi_translate_1): When operands changed we cannot keep
+ 	the same value-number so do not bother to ask whether
+ 	that's possible from translate_vuse_through_block.
+ 
+ 2019-05-07  Martin Liska  <mliska@suse.cz>
+ 
+ 	* bitmap.c (bitmap_register): Come up with
+ 	alloc_descriptor_max_uid and assign it for
+ 	a new bitmap.
+ 	(register_overhead): Use get_descriptor as
+ 	a descriptor.
+ 	(release_overhead): New.
+ 	(bitmap_elem_to_freelist): Call it.
+ 	(bitmap_elt_clear_from): Likewise.
+ 	(bitmap_obstack_free): Likewise.
+ 	(bitmap_move): Sensitively release memory.
+ 	* bitmap.h (struct GTY): Add alloc_descriptor and padding.
+ 	(bitmap_initialize): Initialize alloc_descriptor to zero.
+ 	* tree-ssa-pre.c (do_hoist_insertion): Use bitmap_move.
+ 
+ 2019-05-07  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-slp.c (vect_build_slp_tree_2): Bump size whenever
+ 	we build a SLP node.  Remove max_size and limiting.
+ 	(vect_analyze_slp_instance): Record and dump size of the SLP graph.
+ 
+ 2019-05-07  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90316
+ 	* tree-ssa-alias.h (get_continuation_for_phi): Take walking
+ 	limit by reference.
+ 	(walk_non_aliased_vuses): Take walking limit argument.
+ 	* tree-ssa-alias.c (maybe_skip_until): Take limit and abort
+ 	walking if it is reached instead of just counting.
+ 	(get_continuation_for_phi): Likewise.
+ 	(walk_non_aliased_vuses): Likewise, instead of leaving counter
+ 	limiting to the callback.
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_2): Adjust.
+ 	(vn_reference_lookup_3): Likewise.
+ 	(vn_reference_lookup_pieces): Likewise.
+ 	(vn_reference_lookup): Likewise.
+ 	* tree-ssa-pre.c (translate_vuse_through_block): Limit walking.
+ 	* tree-ssa-scopedtables.c (vuse_eq): Adjust.
+ 	(avail_exprs_stack::lookup_avail_expr): Likewise.
+ 
+ 2019-05-07  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* tree-ssa-alias.c (aliasing_component_refs_p): Continue looking
+ 	for comparaible types in the second direction even if first one
+ 	hits incomparable type.
+ 
+ 2019-05-07  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR lto/90369
+ 	* lto-wrapper.c (debug_objcopy): Use the original filename
+ 	including archive offset for the filename used for -save-temps.
+ 
+ 2019-05-07  Li Jia He  <helijia@linux.ibm.com>
+ 
+ 	* tree-ssa-phiopt.c (two_value_replacement): Fix a typo in parameter
+ 	detection.
+ 
+ 2019-05-06  H.J. Lu  <hongjiu.lu@intel.com>
+ 	    Hongtao Liu  <hongtao.liu@intel.com>
+ 
+ 	PR target/89750
+ 	PR target/86444
+ 	* config/i386/i386-expand.c (ix86_expand_sse_comi_round):
+ 	Modified, original implementation isn't correct.
+ 
+ 2019-05-06  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (FIRST_ALTIVEC_REGNO, LAST_ALTIVEC_REGNO)
+ 	(LR_REGNO, CTR_REGNO, CA_REGNO, ARG_POINTER_REGNUM, CR0_REGNO)
+ 	(CR1_REGNO, CR2_REGNO, CR3_REGNO, CR4_REGNO, CR5_REGNO, CR6_REGNO)
+ 	(CR7_REGNO, MAX_CR_REGNO, VRSAVE_REGNO, VSCR_REGNO)
+ 	(FRAME_POINTER_REGNUM): Change numbering.
+ 	* config/rs6000/rs6000.c (rs6000_reg_names): Adjust.
+ 	(alt_reg_names): Adjust.
+ 	(rs6000_conditional_register_usage): Don't mark hard register 64 as
+ 	fixed.
+ 	* config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTER): Adjust.
+ 	(DWARF_FRAME_REGISTERS): Delete.
+ 	(DWARF2_FRAME_REG_OUT): Fix whitespace.
+ 	(FIXED_REGISTERS, CALL_USED_REGISTERS, CALL_REALLY_USED_REGISTERS):
+ 	Adjust.
+ 	(REG_ALLOC_ORDER): Adjust.
+ 	(FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM): Adjust.
+ 	(REG_CLASS_CONTENTS): Adjust.
+ 	(RETURN_ADDR_RTX): Change comment.
+ 	(REGNO_OK_FOR_INDEX_P, REGNO_OK_FOR_BASE_P): Use ARG_POINTER_REGNUM
+ 	instead of 67.
+ 	(REGISTER_NAMES): Adjust.
+ 	(ADDITIONAL_REGISTER_NAMES): Adjust.
+ 	* config/rs6000/darwin.h (REGISTER_NAMES): Adjust.
+ 
+ 2019-05-06  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.md (TFHAR_REGNO, TFIAR_REGNO, TEXASR_REGNO):
+ 	Delete.
+ 	* config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTER): Adjust.
+ 	(DWARF_FRAME_REGISTERS): Adjust.
+ 	(FIXED_REGISTERS, CALL_USED_REGISTERS, CALL_REALLY_USED_REGISTERS):
+ 	Adjust.
+ 	(REG_ALLOC_ORDER): Adjust.
+ 	(enum reg_class): Delete SPR_REGS.
+ 	(REG_CLASS_NAMES): Delete SPR_REGS.
+ 	(REG_CLASS_CONTENTS): Delete SPR_REGS.  Adjust for deleted TM regs.
+ 	(REGISTER_NAMES): Adjust.
+ 	(ADDITIONAL_REGISTER_NAMES): Adjust.
+ 	* config/rs6000/darwin.h (REGISTER_NAMES): Adjust.
+ 	* config/rs6000/htm.md (htm_mfspr_<mode>, htm_mtspr_<mode>): Adjust.
+ 	* config/rs6000/predicates.md (htm_spr_reg_operand): Delete.
+ 	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Adjust.
+ 	(htm_spr_regno): Delete.
+ 	(htm_expand_builtin): Adjust: the HTM builtins now have one fewer
+ 	argument.
+ 	(rs6000_dbx_register_number): Adjust.
+ 
+ 2019-05-06  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.h (PRE_GCC3_DWARF_FRAME_REGISTERS): Delete.
+ 
+ 2019-05-06  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_dbx_register_number): Handle
+ 	FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM, and 64 (which was MQ).
+ 
+ 2019-05-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/88709
+ 	PR tree-optimization/90271
+ 	* params.def (PARAM_STORE_MERGING_MAX_SIZE): New parameter.
+ 	* gimple-ssa-store-merging.c (encode_tree_to_bitpos): Handle
+ 	non-clobber CONSTRUCTORs with no elts.  Remove useless tmp_int
+ 	variable.
+ 	(imm_store_chain_info::coalesce_immediate_stores): Punt if the size
+ 	of the store merging group is larger than
+ 	PARAM_STORE_MERGING_MAX_SIZE parameter.
+ 	(split_group): Add bzero_first argument.  If set, always emit first
+ 	the first store which must be = {} of the whole area and then for the
+ 	rest of the stores consider all zero bytes as paddings.
+ 	(imm_store_chain_info::output_merged_store): Check if first store
+ 	is = {} of the whole area and if yes, determine which setting of
+ 	bzero_first for split_group gives smaller number of stores.  Adjust
+ 	split_group callers.
+ 	(lhs_valid_for_store_merging_p): Allow decls.
+ 	(rhs_valid_for_store_merging_p): Allow non-clobber CONTRUCTORs with
+ 	no elts.
+ 	(pass_store_merging::process_store): Likewise.
+ 
+ 2019-05-06  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+ 
+ 	PR target/89424
+ 	* config/rs6000/rs6000.c (rs6000_expand_vector_extract): Add
+ 	handling of V1TImode.
+ 
+ 2019-05-06  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89221
+ 	* config.gcc (i[34567]86-*-*, x86_64-*-*): Move tests for enable_cld
+ 	and enable_frame_pointer ...
+ 	* configure.ac: ... here.  Update help strings for
+ 	--enable-frame-pointer.
+ 	* configure: Regenerate.
+ 	* config/i386/i386-options.c (ix86_option_override_internal): Remove
+ 	USE_X86_64_FRAME_POINTER define, use USE_IX86_FRAME_POINTER instead.
+ 	* config/i386/sol2.h (USE_IX86_FRAME_POINTER): Remove.
+ 	(USE_X86_64_FRAME_POINTER): Ditto.
+ 
+ 2019-05-06  Martin Liska  <mliska@suse.cz>
+ 
+ 	* config.gcc: Append to target_gtfiles and fix indentation.
+ 
+ 2019-05-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90358
+ 	* tree-vect-stmts.c (get_group_load_store_type): Properly
+ 	detect unused upper half of load.
+ 	(vectorizable_load): Likewise.
+ 
+ 2019-05-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/88828
+ 	* tree-ssa-forwprop.c (get_bit_field_ref_def): Split out from...
+ 	(simplify_vector_constructor): ...here.  Handle constants in
+ 	the constructor.
+ 
+ 2019-05-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90328
+ 	* tree-data-ref.h (dr_may_alias_p): Pass in the actual loop nest.
+ 	* tree-data-ref.c (dr_may_alias_p): Check whether the clique
+ 	is valid in the loop nest before using it.
+ 	(initialize_data_dependence_relation): Adjust.
+ 	* graphite-scop-detection.c (build_alias_set): Pass the SCOP enclosing
+ 	loop as loop-nest to dr_may_alias_p.
+ 
+ 2019-05-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	* dwarf2out.c (mem_loc_descriptor): Initialize int_mode.
+ 
+ 2019-05-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90316
+ 	* tree-ssa-alias.c (maybe_skip_until): Pass in target BB,
+ 	compute target on demand.
+ 	(get_continuation_for_phi): Remove code walking stmts to
+ 	get to a target virtual operand which could end up being
+ 	quadratic.
+ 
+ 2019-05-06  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR sanitizer/90312
+ 	* config/i386/i386-options.c (ix86_option_override_internal): Error only
+ 	when -mabi is selected to a non-default version.
+ 
+ 2019-05-06  Hrishikesh Kulkarni  <hrishikeshparag@gmail.com>
+ 	    Martin Liska  <mliska@suse.cz>
+ 
+ 	* Makefile.in: Add lto-dump.texi.
+ 	* cgraph.h: Add new functions get_visibility_string and
+ 	get_symtab_type_string.
+ 	* doc/gcc.texi: Include lto-dump section.
+ 	* doc/lto-dump.texi: New file.
+ 	* dumpfile.c (dump_switch_p_1): Use parse_dump_option.
+ 	(parse_dump_option): Factor out this function.
+ 	* dumpfile.h (enum dump_flag): Add new value TDF_ERROR.
+ 	(parse_dump_option): Export the function.
+ 	* symtab.c (symtab_node::get_visibility_string): New function.
+ 	(symtab_node::get_symtab_type_string): Likewise.
+ 
+ 2019-05-06  Martin Liska  <mliska@suse.cz>
+ 
+ 	* config/i386/i386-builtins.c: New file.
+ 	* config/i386/i386-builtins.h: New file.
+ 	* config/i386/i386-expand.c: New file.
+ 	* config/i386/i386-expand.h: New file.
+ 	* config/i386/i386-features.c: New file.
+ 	* config/i386/i386-features.h: New file.
+ 	* config/i386/i386-options.c: New file.
+ 	* config/i386/i386-options.h: New file.
+ 	* config.gcc: Add new files into extra_objs and
+ 	target_gtfiles.
+ 	* config/i386/i386.c: Split content of the file
+ 	into newly introduced files.
+ 	* config/i386/i386.h: Declare common variables
+ 	and macros.
+ 	* config/i386/t-i386: Define dependencies for new files.
+ 
+ 2019-05-03  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/89400
+ 	* config/arm/arm.md (unaligned_loadsi): Add variant for thumb1.
+ 	Restrict 'all' variant to 32-bit configurations.
+ 	(unaligned_loadhiu): Likewise.
+ 	(unaligned_storehi): Likewise.
+ 	(unaligned_storesi): Likewise.
+ 	(unaligned_loadhis): Disable when compiling for thumb1.
+ 
+ 2019-05-03  Marc Glisse  <marc.glisse@inria.fr>
+ 
+ 	PR tree-optimization/90269
+ 	* tree-loop-distribution.c (find_seed_stmts_for_distribution):
+ 	Ignore clobbers.
+ 
+ 2019-05-03  Martin Liska  <mliska@suse.cz>
+ 
+ 	* hash-map.h: Add is_empty function.
+ 	* hash-set.h: Likewise.
+ 	* hash-table.h: Likewise.
+ 	* dwarf2out.c (dwarf2out_finish): Use is_empty instead of
+ 	elements () == 0 (and similar usages).
+ 	* gimple-ssa-store-merging.c (pass_store_merging::terminate_and_process_all_chains): Likewise.
+ 	* gimplify.c (gimplify_bind_expr): Likewise.
+ 	(gimplify_switch_expr): Likewise.
+ 	* hash-map-tests.c (test_map_of_strings_to_int): Likewise.
+ 	* ipa-icf.c (sem_item_optimizer::remove_symtab_node): Likewise.
+ 	* postreload-gcse.c (dump_hash_table): Likewise.
+ 	(gcse_after_reload_main): Likewise.
+ 	* predict.c (combine_predictions_for_bb): Likewise.
+ 	* tree-parloops.c (reduction_phi): Likewise.
+ 	(separate_decls_in_region): Likewise.
+ 	(transform_to_exit_first_loop): Likewise.
+ 	(gen_parallel_loop): Likewise.
+ 	(gather_scalar_reductions): Likewise.
+ 	(try_create_reduction_list): Likewise.
+ 	* var-tracking.c (dump_vars): Likewise.
+ 	(emit_notes_for_changes): Likewise.
+ 	(vt_emit_notes): Likewise.
+ 
+ 2019-05-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90316
+ 	* tree-ssa-pre.c (pass_pre::execute): Re-compute DOM fast queries
+ 	before running VN.
+ 
+ 2019-05-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-stmts.c (get_group_load_store_type): Avoid
+ 	peeling for gaps by loading only lower halves of vectors
+ 	if possible.
+ 	(vectorizable_load): Likewise.
+ 
+ 2019-05-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/89518
+ 	* match.pd: Add pattern to optimize (A / B) * B + (A % B) to A.
+ 
+ 2019-05-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/87314
+ 	* match.pd (cmp (convert1?@2 addr@0) (convert2? addr@1)):
+ 	Handle STRING_CST vs DECL or STRING_CST.
+ 
+ 2019-05-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/88963
+ 	* tree-ssa-forwprop.c (pass_forwprop::execute): Rewrite
+ 	vector loads feeding only BIT_FIELD_REFs to component
+ 	loads.  Rewrite stores fed by CONSTRUCTORs to component
+ 	stores.
+ 
+ 2019-05-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* opts.h (finish_options): Remove lang_mask argument.
+ 	(print_help, help_option_argument): Declare.
+ 	* opts.c (print_help): Remove forward declaration, no longer static.
+ 	(finish_options): Remove lang_mask argument, don't call print_help
+ 	here.
+ 	* opts-global.c (decode_options): Adjust finish_option caller, call
+ 	print_help here.
+ 
+ 	PR tree-optimization/90303
+ 	* ipa-devirt.c (obj_type_ref_class, get_odr_type): Don't use
+ 	TYPE_CANONICAL for TYPE_STRUCTURAL_EQUALITY_P types in !in_lto_p mode.
+ 
+ 2019-05-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89698
+ 	* gimple-fold.c (canonicalize_constructor_val): Early out
+ 	for constants, handle unfolded INTEGER_CSTs as they appear in
+ 	C++ virtual table ctors.
+ 
+ 2019-05-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	* passes.c (execute_function_todo): Remove dead code.
+ 
+ 2019-05-02  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_dbx_register_number): Do not use
+ 	the internal register number, for any "real" register.
+ 
+ 2019-05-02  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_dbx_register_number): Return the
+ 	correct numbers for TFHAR, TFIAR, TEXASR.
+ 
+ 2019-05-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89653
+ 	* tree-ssa-loop.c (pass_data_tree_loop_init): Execute
+ 	update-address-taken before the pass.
+ 	* passes.def (pass_tree_loop_init): Put comment before it.
+ 
+ 2019-05-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89509
+ 	* tree-ssa-structalias.c (compute_dependence_clique): Look
+ 	at the first subvar when determining whether it is restrict.
+ 
+ 2019-05-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90273
+ 	* tree-ssa-dce.c (eliminate_unnecessary_stmts): Eliminate
+ 	useless debug stmts.
+ 
+ 2019-05-02  Alejandro Martinez  <alejandro.martinezvicente@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (<sur>dot_prod<vsi2qi>): Taken from SVE
+ 	ACLE branch.
+ 	* config/aarch64/iterators.md: Copied Vetype_fourth, VSI2QI and vsi2qi from
+ 	SVE ACLE branch.
+ 	* tree-vect-loop.c (use_mask_by_cond_expr_p): New function to check if a
+ 	VEC_COND_EXPR be inserted to emulate a conditional internal function.
+ 	(build_vect_cond_expr): Emit the VEC_COND_EXPR.
+ 	(vectorizable_reduction): Use the functions above to vectorize in a
+ 	fully masked loop codes that don't have a conditional internal
+ 	function.
+ 
+ 2019-05-02  Martin Liska  <mliska@suse.cz>
+ 
+ 	* cgraphclones.c: Call valid_attribute_p with 1 for
+ 	target_clone.
+ 	* config/i386/i386-c.c (ix86_pragma_target_parse): Use 0 as
+ 	it's for target attribute.
+ 	* config/i386/i386-protos.h (ix86_valid_target_attribute_tree):
+ 	Add new boolean argument.
+ 	* config/i386/i386.c (ix86_valid_target_attribute_inner_p):
+ 	Likewise.
+ 	(ix86_valid_target_attribute_tree): Pass target_clone_attr
+ 	to ix86_valid_target_attribute_inner_p.
+ 	(ix86_valid_target_attribute_p): Pass flags argument to
+ 	ix86_valid_target_attribute_inner_p.
+ 	(get_builtin_code_for_version): Use 0 as it's target attribute.
+ 
+ 2019-05-02  Martin Liska  <mliska@suse.cz>
+ 
+ 	* gcc.c (process_command): Add dummy file only
+ 	if n_infiles == 0.
+ 	* opts-global.c (decode_options): Pass lang_mask.
+ 	* opts.c (print_help): New function.
+ 	(finish_options): Print --help if help_option_argument
+ 	is set.
+ 	(common_handle_option): Factor out content of OPT__help_
+ 	into print_help.
+ 	* opts.h (finish_options): Add new argument.
+ 
+ 2019-05-02  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR target/88809
+ 	* config/i386/i386.c (ix86_expand_strlen): Use strlen call.
+ 	With -minline-all-stringops use inline expansion using 4B loop.
+ 	* doc/invoke.texi: Document the change of
+ 	-minline-all-stringops.
+ 
+ 2019-05-01  Jeff Law  <law@redhat.com>
+ 
+ 	PR tree-optimization/88797
+ 	* gimple-ssa-split-paths (is_feasible_trace): Reject cases where the
+ 	PHI feeds a conditional on the RHS of an assignment.
+ 
+ 2019-04-30  Andrew Waterman  <andrew@sifive.com>
+ 	    Jim Wilson  <jimw@sifive.com>
+ 
+ 	* config/riscv/constraints.md (L): New.
+ 	* config/riscv/predicates.md (lui_operand): New.
+ 	(sfb_alu_operand): New.
+ 	* config/riscv/riscv-protos.h (riscv_expand_conditional_move): Declare.
+ 	* config/riscv/riscv.c (riscv_expand_conditional_move): New.
+ 	* config/riscv/riscv.h (TARGET_SFB_ALU): New.
+ 	* config/riscv/risc.md (type): Add sfb_alu.
+ 	(branch<mode>): Renamed from branch_order<mode>.  Change predicate for
+ 	operand 3 to reg_or_0_operand.  In output string, change %3 to %z3.
+ 	(branch_zero<mode>): Delete.
+ 	(mov<mode>cc): New.
+ 	(mov<GPR:mode><X:mode>cc): Likewise.
+ 	* config/riscv/sifive-7.md (sifive_7_sfb_alu): New.  Use in bypasses.
+ 
+ 2019-04-30  Nathan Sidwell  <nathan@acm.org>
+ 
+ 	* tree.h (MARK_TS_EXP): New.
+ 
+ 2019-04-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	* opts.c (enable_warning_as_error): Provide hints
+ 	for unknown options.
+ 
+ 2019-04-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR debug/90288
+ 	* doc/invoke.texi: Add missing dash for gas-locview-support
+ 	and gno-as-locview-support.
+ 
+ 2019-04-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89093
+ 	* config/aarch64/aarch64.c (aarch64_process_one_target_attr): Don't skip
+ 	whitespace at the start of target attribute string.
+ 
+ 2019-04-30  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+ 
+ 	PR target/86538
+ 	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
+ 	Define __ARM_FEATURE_ATOMICS.
+ 
+ 2019-04-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	* gimple-fold.c (gimple_fold_builtin_memory_op): Change endp
+ 	into built_in_function enum. Remove code for endp == 2 and
+ 	use BUILT_IN_* constants.
+ 	(gimple_fold_builtin): Call the function with fcode.
+ 
+ 2019-04-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	* config/i386/i386.c (ix86_builtin_reciprocal): Cast
+ 	DECL_FUNCTION_CODE into ix86_builtins enum before
+ 	the switch statement.
+ 
+ 2019-04-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/89475
+ 	* tree-ssa-ccp.c (evaluate_stmt): Handle BUILT_IN_BSWAP{16,32,64}
+ 	calls.
+ 
+ 2019-04-30  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR translation/90274
+ 	* opts.c (print_filtered_help): Wrap string in _(...).
+ 
+ 2019-04-30  Bin Cheng  <bin.cheng@linux.alibaba.com>
+ 
+ 	PR tree-optimization/90240
+ 	Revert:
+ 	2019-04-23  Bin Cheng  <bin.cheng@linux.alibaba.com>
+ 
+ 	PR tree-optimization/90078
+ 	* tree-ssa-loop-ivopts.c (comp_cost::operator +,-,+=,-+,/=,*=): Add
+ 	checks for infinite_cost overflow.
+ 
+ 2019-04-29  Jeff Law  <law@redhat.com>
+ 
+ 	* passes.def: Move -Wrestrict pass after copy propagation.
+ 
+ 2019-04-29  Maya Rashish  <coypu@sdf.org>
+ 
+ 	* config.gcc (default_gnu_indirect_function): Default to yes
+ 	for arm*-*-netbsd*, i[34567]86-*-netbsd*, powerpc*-*-netbsd*,
+ 	sparc*-*-netbsd*, x86_64-*-netbsd*.
+ 
+ 2019-04-29  Vladislav Ivanishin  <vlad@ispras.ru>
+ 
+ 	* tree-ssa-uninit.c (is_pred_expr_subset_of): Correctly handle cases
+ 	where cond2 is NE_EXPR.
+ 	(is_value_included_in): Update comment.
+ 
+ 2019-04-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90278
+ 	* tree-ssa-forwprop.c (pass_forwprop::execute): Transfer/clean
+ 	EH on comparison simplification.
+ 
+ 2019-04-29  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/82081 - tail call optimization breaks noexcept
+ 	* tree-tailcall.c (find_tail_calls): Don't turn a call from a
+ 	nothrow function to a might-throw function into a tail call.
+ 
+ 2019-04-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-data-ref.h (data_dependence_relation::inner_loop): Delete.
+ 	(DDR_INNER_LOOP): Likewise.
+ 	* tree-data-ref.c (dump_data_dependence_relation): Update accordingly.
+ 	(initialize_data_dependence_relation): Likewise.
+ 	(insert_innermost_unit_dist_vector): Use 0 instead of DDR_INNER_LOOP.
+ 
+ 2019-04-29  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/90257
+ 	* cfgrtl.c (flow_active_insn_p): Return true for USE of a function
+ 	return value.
+ 
+ 	Revert the revert:
+ 	2019-04-21  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/90178
+ 	Revert:
+ 	2018-11-21  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	Revert the revert:
+ 	2013-10-26  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	Revert:
+ 	2013-10-25  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	* lra-spills.c (lra_final_code_change): Remove useless move insns.
+ 
+ 2019-04-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa.c (insert_debug_temp_for_var_def): For {CLOBBER}
+ 	rhs issue a reset.
+ 
+ 2019-04-27  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	* config/netbsd-d.c: Include memmodel.h.  Remove unused tree.h,
+ 	varasm.h, and netbsd-protos.h.
+ 
+ 2019-04-27  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89261
+ 	* config/i386/i386-protos.h (ix86_data_alignment): Change
+ 	the second argument type to unsigned int.
+ 	* config/i386/i386.c (ix86_data_alignment): Change "align"
+ 	argument type to unsigned int.
+ 
+ 2019-04-27  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR middle-end/90258
+ 	* opt-suggestions.c (option_proposer::build_option_suggestions):
+ 	When get_valid_option_values returns empty values, add the
+ 	misspelling candidate.
+ 
+ 2019-04-26  Jim Wilson  <jimw@sifive.com>
+ 
+ 	* config/riscv/riscv-protos.h (riscv_move_integer): Add machine_mode
+ 	parameter.
+ 	* config/riscv/riscv.c (riscv_move_integer): New parameter orig_mode.
+ 	Pass orig_mode to riscv_build_integer.
+ 	(riscv_split_integer): Pass mode to riscv_move_integer.
+ 	(riscv_legitimize_const_move): Likewise.
+ 	(riscv_legitimize_move): For MEM dest and CONST_INT src case, new local
+ 	promoted_mode.  Replace force_reg call with code to load constant into
+ 	promoted reg and then subreg it for the store.
+ 	* config/riscv/riscv.md (low<mode>+1): Pass <GPR:MODE>mode to
+ 	riscv_move_integer.
+ 
+ 2018-04-26  Eugene Sharygin  <eush@ispras.ru>
+ 
+ 	* gdbhooks.py: Fix UnicodeDecodeErrors when printing trees with
+ 	corrupt codes.
+ 
+ 2019-04-26  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree.h (TYPE_VECTOR_SUBPARTS, SET_TYPE_VECTOR_SUBPARTS): Add
+ 	commentary about the encoding of precision.
+ 
+ 2019-04-25  Andreas Tobler  <andreast@gcc.gnu.org>
+ 
+ 	* config/i386/freebsd64.h: Add bits for 32-bit multilib support.
+ 	* config/i386/t-freebsd64: New file.
+ 	* config.gcc: Add the t-freebsd64 for multilib support.
+ 
+ 2019-04-25  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* doc/extend.texi (vector_size): Add missing comma after @xref.
+ 
+ 2019-04-25  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* BASE-VER: Set to 10.0.0.
+ 
+ 2019-04-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/89765
+ 	* gimplify.c (gimplify_expr): Avoid turning a lvalue
+ 	VIEW_CONVERT_EXPR into one operating on an rvalue.
+ 
+ 2019-04-25  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89929
+ 	* config/i386/i386.c (feature_priority): Moved to file scope.
+ 	(processor_features): Likewise.
+ 	(processor_model): Likewise.
+ 	(_arch_names_table): Likewise.
+ 	(arch_names_table): Likewise.
+ 	(_feature_list): Removed.
+ 	(feature_list): Likewise.
+ 	(_isa_names_table): Moved to file scope.  Add priority.
+ 	(isa_names_table): Likewise.
+ 	(get_builtin_code_for_version): Replace feature_list with
+ 	isa_names_table.  Update error message for P_ZERO priority.
+ 
+ 2019-04-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-pass.h (make_pass_phi_only_cprop): Remove.
+ 	* timevar.def (TV_TREE_PHI_CPROP): Likewise.
+ 
+ 2019-04-24  Jeff Law  <law@redhat.com>
+ 
+ 	PR tree-optimization/90037
+ 	* Makefile.in (OBJS): Remove tree-ssa-phionlycprop.c
+ 	* passes.def: Replace all instance of phi-only cprop with the
+ 	lattice propagator.  Move propagation pass from after erroneous
+ 	path isolation to before erroneous path isolation.
+ 	* tree-ssa-phionlycprop.c: Remove.
+ 
+ 2019-04-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/90213
+ 	* gimple-fold.c (fold_const_aggregate_ref_1): Do multiplication
+ 	by size and BITS_PER_UNIT on poly-wide-ints.
+ 
+ 2019-04-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/90194
+ 	* match.pd: Add pattern to simplify view-conversion of an
+ 	empty constructor.
+ 
+ 2019-04-24  Clement Chigot  <clement.chigot@atos.net>
+ 
+ 	* config/rs6000/aix71.h (SUBTARGET_OVERRIDE_OPTIONS): Disable
+ 	OPTION_MASK_VSX and OPTION_MASK_ALTIVEC from rs6000_isa_flags
+ 	for Go on 32 bit AIX.
+ 	* config/rs6000/aix72.h: Likewise.
+ 
+ 2019-04-24  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/90193
+ 	* rtl.c (classify_insn): Return JUMP_INSN for asm goto.
+ 	* emit-rtl.c (try_split): Copy over REG_LABEL_TARGET.
+ 
+ 2019-04-24  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	PR target/89952
+ 	* config/s390/s390.c (s390_restore_gprs_from_fprs): Restore GPRs
+ 	from FPRs in reverse order.  Generate REG_CFA_DEF_CFA note also
+ 	for restored hard frame pointer.
+ 	(s390_sched_dependencies_evaluation): Implement new target hook.
+ 	(TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK): New macro definition.
+ 
+ 2019-04-24  Claudiu Zissulescu  <claziss@sysnopsys.com>
+ 
+ 	* config/arc/arc-options.def: Fix typos and spelling mistakes.
+ 	* config/arc/arc.c (arc_init): Cleanup warning message.
+ 	(arc_override_options): Likewise.
+ 
+ 2019-04-24  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/90187
+ 	* config/i386/i386.c (ix86_expand_sse_fp_minmax): Force if_true into
+ 	a register if both if_true and if_false are MEMs.
+ 
+ 	PR tree-optimization/90208
+ 	* tree-cfg.c (remove_bb): Move forced labels from removed bbs
+ 	after labels of new_bb, not before them.
+ 
+ 	PR tree-optimization/90211
+ 	* tree-parloops.c (try_create_reduction_list): Ignore phi arguments
+ 	which are not SSA_NAMEs.
+ 
+ 2018-04-23  Sudakshina Das  <sudi.das@arm.com>
+ 
+ 	* config/aarch64/aarch64-linux.h (TARGET_ASM_FILE_END): Define for
+ 	AArch64.
+ 	(aarch64_file_end_indicate_exec_stack): Add gnu note section.
+ 
+ 2019-04-23  Roman Zhuykov  <zhroma@ispras.ru>
+ 
+ 	PR rtl-optimization/87979
+ 	* modulo-sched.c (sms_schedule): Start ii value "mii" should
+ 	not equal zero.
+ 
+ 2019-04-23  Roman Zhuykov  <zhroma@ispras.ru>
+ 
+ 	PR rtl-optimization/84032
+ 	* modulo-sched.c (ps_insn_find_column): Change condition so that
+ 	branch will always be the last insn in a row inside partial
+ 	schedule.
+ 
+ 2019-04-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/90131
+ 	* tree-cfgcleanup.c (move_debug_stmts_from_forwarder): Add
+ 	dest_single_pred_p argument.
+ 	(remove_forwarder_block): Adjust.
+ 	(remove_forwarder_block_with_phi): Likewise.
+ 
+ 2019-04-23  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+ 	    Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 	    Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89093
+ 	* config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Diagnose
+ 	if used with general-regs-only.
+ 	(arm_conditional_register_usage): Don't add non-general regs if
+ 	general-regs-only.
+ 	(arm_valid_target_attribute_rec): Handle general-regs-only.
+ 	* config/arm/arm.h (TARGET_HARD_FLOAT): Return false if
+ 	general-regs-only.
+ 	(TARGET_HARD_FLOAT_SUB): Define.
+ 	(TARGET_SOFT_FLOAT): Define as negation of TARGET_HARD_FLOAT_SUB.
+ 	(TARGET_REALLY_IWMMXT): Add && !TARGET_GENERAL_REGS_ONLY.
+ 	(TARGET_REALLY_IWMMXT2): Likewise.
+ 	* config/arm/arm.opt: Add -mgeneral-regs-only.
+ 	* doc/extend.texi: Document ARM general-regs-only target.
+ 	* doc/invoke.texi: Document ARM -mgeneral-regs-only.
+ 
+ 2019-04-23  Bin Cheng  <bin.cheng@linux.alibaba.com>
+ 
+ 	PR tree-optimization/90078
+ 	* tree-ssa-loop-ivopts.c (comp_cost::operator +,-,+=,-+,/=,*=): Add
+ 	checks for infinite_cost overflow.
+ 
+ 2019-04-23  Bin Cheng  <bin.cheng@linux.alibaba.com>
+ 
+ 	PR tree-optimization/90021
+ 	* tree-chrec.c (evolution_function_is_univariate_p): New parameter
+ 	and check univariate against it.
+ 	* tree-chrec.h (evolution_function_is_univariate_p): New parameter.
+ 	* tree-data-ref.c (add_other_self_distances): Pass new argument.
+ 
+ 2019-04-21  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/90178
+ 	Revert:
+ 	2018-11-21  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	Revert the revert:
+ 	2013-10-26  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	Revert:
+ 	2013-10-25  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	* lra-spills.c (lra_final_code_change): Remove useless move insns.
+ 
+ 2019-04-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/rs6000.md (group_end_nop): Emit insn register
+ 	names using operand format, rather than hard-wired.
+ 	(speculation_barrier): Likewise.
+ 
+ 2019-04-19  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR tree-optimization/88055
+ 	* tree-call-cdce.c (comparison_code_if_no_nans): New function.
+ 	(gen_one_condition): Use it if !HONOR_NANS.
+ 
+ 2019-04-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/90139
+ 	* tree-outof-ssa.c (get_temp_reg): If reg_mode is BLKmode, return
+ 	assign_temp instead of gen_reg_rtx.
+ 
+ 2019-04-19  Christophe Lyon  <christophe.lyon@linaro.org>
+ 
+ 	PR translation/90118
+ 	* config/aarch64/aarch64.c (aarch64_override_options_internal):
+ 	Add missing space before %<.
+ 
+ 2019-04-18  Peter Bergner  <bergner@linux.ibm.com>
+ 
+ 	PR rtl-optimization/87871
+ 	* ira-lives.c (make_object_dead): Don't add conflicts to
+ 	TOTAL_CONFLICT_HARD_REGS for register ignore_reg_for_conflicts.
+ 
+ 2019-04-18  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/89797
+ 	* tree.h (TYPE_VECTOR_SUBPARTS): Use HOST_WIDE_INT_1U.
+ 	* config/aarch64/aarch64.c (aarch64_simd_vector_alignment): Avoid
+ 	assuming type size fits in SHWI.
+ 
+ 2019-04-18  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR ipa/85051
+ 	* ipa-inline.c (flatten_function): New parameter UPDATE.
+ 	(ipa_inline, early_inliner): Use it.
+ 
+ 2019-04-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* fold-const.c (int_const_binop): Return early on failure.
+ 
+ 2019-04-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/85164
+ 	* combine.c (force_int_to_mode): Cast the argument rather than
+ 	the result of known_alignment.
+ 	* rtlanal.c (rtx_addr_can_trap_p_1): Use known_subrange_p.
+ 
+ 2019-04-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/90131
+ 	* tree-cfgcleanup.c (move_debug_stmts_from_forwarder): Split
+ 	out from ...
+ 	(remove_forwarder_block): ... here.
+ 	(remove_forwarder_block_with_phi): Also move debug stmts here.
+ 
+ 2019-04-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR translation/79183
+ 	* gimple-ssa-sprintf.c (format_directive): Use inform_n instead of
+ 	inform where appropriate.
+ 
+ 2019-04-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree.c (get_qualified_type): Put found type variants at the
+ 	head of the variant list.
+ 
+ 2018-04-17  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_register_move_cost): Fix typo.
+ 
+ 2019-04-17  Hongtao Liu  <hongtao.liu@intel.com>
+ 
+ 	PR target/90125
+ 	* config/i386/avx512fintrin.h (_mm_maskz_fmadd_round_sd,
+ 	_mm_maskz_fmadd_round_ss, _mm_maskz_fmsub_round_sd,
+ 	_mm_maskz_fmsub_round_ss, _mm_maskz_fnmadd_round_sd,
+ 	_mm_maskz_fnmadd_round_ss, _mm_maskz_fnmsub_round_sd,
+ 	_mm_maskz_fnmsub_round_ss): Use _maskz builtin instead of _mask3.
+ 
+ 2019-04-17  Peter Bergner  <bergner@linux.ibm.com>
+ 
+ 	* ira-conflicts.c (print_allocno_conflicts): Always print something,
+ 	even for allocno's with no conflicts.
+ 	(print_conflicts): Print an extra newline.
+ 
+ 2019-04-17  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* auto-inc-dec.c (attempt_change): Set the alignment of the
+ 	temporary memory to that of the original.
+ 
+ 2019-04-17  Joao Moreira  <jmoreira@suse.de>
+ 
+ 	* targhooks.c (default_print_patchable_function_entry): Emit
+ 	__patchable_function_entries section with writable flags to allow
+ 	relocation resolution.
+ 
+ 2019-04-17  Jonny Grant  <jg@jguk.org>
+ 
+ 	* collect2.c (main): Change gcc.gnu.org URL to HTTPS.
+ 
+ 2019-04-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/90095
+ 	* internal-fn.c (expand_mul_overflow): Don't set SUBREG_PROMOTED_VAR_P
+ 	on lowpart SUBREGs.
+ 
+ 2019-04-17  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.c (arc_init): Format diagnostic string.
+ 	(arc_override_options): Likewise.
+ 	(check_if_valid_regno_const): Likewise.
+ 	(arc_reorg): Likewise.
+ 
+ 2019-04-17  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR target/17108
+ 	* config/rs6000/rs6000.c (rs6000_split_multireg_move): Adjust pattern
+ 	name.
+ 	(rs6000_emit_allocate_stack_1): Simplify condition.  Adjust pattern
+ 	name.
+ 	* config/rs6000/rs6000.md (bits): Add entries for SF and DF.
+ 	(*movdi_update1): Use Pmode.
+ 	(movdi_<mode>_update): Fix argument to avoiding_indexed_address_p.
+ 	(movdi_<mode>_update_stack): Rename to ...
+ 	(movdi_update_stack): ... this.  Fix comment.  Change condition. Don't
+ 	use Pmode.
+ 	(*movsi_update1): Use Pmode.
+ 	(*movsi_update2): Use Pmode.
+ 	(movsi_update): Rename to ...
+ 	(movsi_<mode>_update): ... this.  Use Pmode.
+ 	(movsi_update_stack): Fix condition.
+ 	(*movhi_update1): Use Pmode.  Fix argument to
+ 	avoiding_indexed_address_p.
+ 	(*movhi_update2): Ditto.
+ 	(*movhi_update3): Ditto.
+ 	(*movhi_update4): Ditto.
+ 	(*movqi_update1): Ditto.
+ 	(*movqi_update2): Ditto.
+ 	(*movqi_update3): Ditto.
+ 	(*movsf_update1, *movdf_update1): Merge, rename to...
+ 	(*mov<mode>_update1): This.  Use Pmode.  Fix argument to
+ 	avoiding_indexed_address_p.  Add "size" attribute.
+ 	(*movsf_update2, *movdf_update2): Merge, rename to...
+ 	(*mov<mode>_update2): This.  Ditto.
+ 	(*movsf_update3): Use Pmode.  Fix argument to
+ 	avoiding_indexed_address_p.
+ 	(*movsf_update4): Ditto.
+ 	(allocate_stack): Simplify condition.  Adjust pattern names.
+ 
+ 2019-04-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89093
+ 	* config/arm/arm.c (arm_valid_target_attribute_rec): Don't skip
+ 	whitespace at the start of target attribute string.
+ 
+ 2019-04-16  Pat Haugen  <pthaugen@us.ibm.com>
+ 
+ 	PR target/84369
+ 	* config/rs6000/power9.md: Add store forwarding bypass.
+ 
+ 2019-04-16  Alexandre Oliva  <aoliva@redhat.com>
+ 
+ 	PR debug/89528
+ 	* valtrack.c (dead_debug_insert_temp): Reset debug references
+ 	to the return value of a call being removed.
+ 
+ 2019-04-16  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc-protos.h (arc_register_move_cost): Remove.
+ 	* config/arc/arc.c (arc_register_move_cost): Re-purpose it to
+ 	implement target hook.
+ 	(arc_memory_move_cost): New function.
+ 	(TARGET_REGISTER_MOVE_COST): Define.
+ 	(TARGET_MEMORY_MOVE_COST): Likewise.
+ 	* config/arc/arc.h (REGISTER_MOVE_COST): Remove.
+ 	(MEMORY_MOVE_COST): Likewise.
+ 
+ 2019-04-16  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.md (sibcall_insn): Use Rcd constraint.
+ 	(sibcall_value_insn): Likewise.
+ 	* config/arc/constraints.md (Rs5): Remove.
+ 
+ 2019-04-16  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.c (arc_hard_regno_modes): Add two missing modes
+ 	for last two fake registers.
+ 	(arc_conditional_register_usage): Make sure fake frame and arg
+ 	pointer regs are in general regs class.
+ 	(FRAME_POINTER_MASK): Remove.
+ 	(RETURN_ADDR_MASK): Remove.
+ 	(arc_must_save_register): Use hard frame regnum.
+ 	(frame_restore_reg): Use hard_frame_pointer_rtx.
+ 	(arc_save_callee_saves): Likewise.
+ 	(arc_restore_callee_saves): Likewise.
+ 	(arc_save_callee_enter): Likewise.
+ 	(arc_restore_callee_leave): Likewise.
+ 	(arc_save_callee_milli): Likewise.
+ 	(arc_eh_return_address_location): Likewise.
+ 	(arc_check_multi): Use hard frame regnum.
+ 	(arc_can_eliminate): Likewise.
+ 	* config/arc/arc.h (FIXED_REGISTERS): Make FP register available
+ 	for register allocator.
+ 	(REG_CLASS_CONTENTS): Update GENERAL_REGS.
+ 	(REGNO_OK_FOR_BASE_P): Consider FRAME_POINTER_REGNUM.
+ 	(FRAME_POINTER_REGNUM): Change it to a fake register.
+ 	(HARD_FRAME_POINTER_REGNUM): Defined.
+ 	(ARG_POINTER_REGNUM): Change it to a new fake register.
+ 	(ELIMINABLE_REGS): Update.
+ 	(REGISTER_NAMES): Update names.
+ 	* config/arc/arc.md (LP_START): Remove.
+ 	(LP_END): Likewise.
+ 	(shift_si3_loop): Update pattern.
+ 
+ 2019-04-16  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.c (arc_expand_prologue): Emit blockage regardless
+ 	to avoid delay slot scheduling.
+ 	(arc_must_save_register): Don't save SP.
+ 	* config/arc/arc.md (stack_tie): Remove.
+ 	(UNSPEC_ARC_STKTIE): Likewise.
+ 
+ 2019-04-16  Kito Cheng  <kito.cheng@gmail.com>
+ 	    Shiva Chen  <shiva0217@gmail.com>
+ 
+ 	* config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Fix wrong
+ 	code gen with large shift amount.
+ 
+ 2019-04-16  Chung-Ju Wu  <jasonwucj@gmail.com>
+ 
+ 	* config/nds32/nds32-pipelines-auxiliary.c (wext_odd_dep_p): Handle
+ 	subreg.
+ 
+ 2019-04-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/90096
+ 	* config/i386/i386.c (ix86_target_string): Add ADD_ABI_P argument, only
+ 	print -m64/-mx32/-m32 if it is true.
+ 	(ix86_debug_options, ix86_function_specific_print): Pass true as
+ 	ADD_ABI_P to ix86_target_string.
+ 	(ix86_expand_builtin): Adjust ix86_target_string caller, pass true as
+ 	ADD_ABI_P only if OPTION_MASK_ISA_64BIT is set in bisa and in that case
+ 	or into it OPTION_MASK_ISA_ABI_64 or OPTION_MASK_ISA_ABI_X32.
+ 
+ 	PR rtl-optimization/90082
+ 	* dce.c (can_delete_call): New function.
+ 	(deletable_insn_p, mark_insn): Use it.
+ 
+ 	PR tree-optimization/90090
+ 	* tree-ssa-math-opts.c (is_division_by): Ignore divisions that can
+ 	throw internally.
+ 	(is_division_by_square): Likewise.  Formatting fix.
+ 
+ 2019-04-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/56049
+ 	* tree-ssa-loop-im.c (mem_ref_hasher::equal): Elide alias-set
+ 	equality check if alias-set zero will prevail.
+ 
+ 2019-04-15  Jeff Law  <law@redhat.com>
+ 
+ 	* config/microblaze/microblaze.c (microblaze_expand_block_move): Treat
+ 	size and alignment as unsigned.
+ 
+ 2019-04-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/90074
+ 	* tree-loop-distribution.c (destroy_loop): Preserve correct
+ 	debug info.
+ 
+ 2019-04-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90071
+ 	* tree-ssa-reassoc.c (init_range_entry): Do not pick up
+ 	abnormal operands from def stmts.
+ 
+ 2019-04-15  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR rtl-optimization/89794
+ 	* combine.c (count_auto_inc): New function.
+ 	(try_combine): Count how many auto_inc expressions there were in the
+ 	original instructions.  Ensure we have the same number in the new
+ 	instructions.  Remove the code that tried to ensure auto_inc side
+ 	effects on i1 and i0 are not lost.
+ 
+ 2019-04-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR ipa/88936
+ 	* tree.h (auto_var_p): Declare.
+ 	* tree.c (auto_var_p): New function, split out from ...
+ 	(auto_var_in_fn_p): ... here.
+ 	* tree-ssa-structalias.c (struct variable_info): Add shadow_var_uid
+ 	member.
+ 	(new_var_info): Initialize it.
+ 	(set_uids_in_ptset): Also set the shadow variable uid if required.
+ 	(ipa_pta_execute): Postprocess points-to solutions assigning
+ 	shadow variable uids for locals that may reach their containing
+ 	function recursively.
+ 	* tree-ssa-ccp.c (fold_builtin_alloca_with_align): Do not
+ 	assert but instead check whether the points-to solution is
+ 	a singleton.
+ 
+ 2019-04-15  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/pr89693
+ 	* cgraph.c (clone_of_p): Loop over clone chain for each step in
+ 	the thunk chain.
+ 
+ 2019-04-15  Monk Chiang  <sh.chiang04@gmail.com>
+ 
+ 	* config.gcc (nds32*-*-linux*): Set gcc_cv_initfini_array to yes.
+ 
+ 2019-04-15  Monk Chiang  <sh.chiang04@gmail.com>
+ 	    Kito Cheng  <kito.cheng@gmail.com>
+ 	    Shiva Chen  <shiva0217@gmail.com>
+ 
+ 	* config/nds32/nds32-md-auxiliary.c
+ 	(nds32_legitimize_pic_address): Use new PIC pattern.
+ 	(nds32_legitimize_tls_address): Use new TLS pattern.
+ 	(nds32_output_symrel): New.
+ 	* config/nds32/nds32-protos.h (nds32_output_symrel): Declare.
+ 	(nds32_alloc_relax_group_id): Ditto.
+ 	* config/nds32/nds32-relax-opt.c (nds32_alloc_relax_group_id): New.
+ 	(nds32_group_insns): Use nds32_alloc_relax_group_id instead of use
+ 	relax_group_id.
+ 	(nds32_group_tls_insn): Ditto.
+ 	(nds32_group_float_insns): Ditto.
+ 	* config/nds32/nds32.md (tls_le): New.
+ 	(sym_got): Ditto.
+ 
+ 2019-04-15  Chung-Ju Wu  <jasonwucj@gmail.com>
+ 
+ 	* configure: Add nds32 target for dwarf2 debug_line checking.
+ 	* configure.ac: Regenerated.
+ 
+ 2019-04-14  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR lto/89358
+ 	* ipa-devirt.c (skip_in_fields_list_p): New.
+ 	(odr_types_equivalent_p): Use it.
+ 
+ 2019-04-13  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89093
+ 	* config/arm/arm.c (arm_valid_target_attribute_rec): Use strcmp
+ 	instead of strncmp when checking for thumb and arm.  Formatting fixes.
+ 
+ 2019-04-12  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	* doc/install.texi: Document --with-target-system-zlib.
+ 
+ 2019-04-12  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR c/88383
+ 	PR c/89288
+ 	PR c/89798
+ 	PR c/89797
+ 	* targhooks.c (default_vector_alignment): Avoid assuming
+ 	argument fits in SHWI.
+ 	* tree.h (TYPE_VECTOR_SUBPARTS): Avoid sign overflow in
+ 	a shift expression.
+ 	* doc/extend.texi (__builtin_has_attribute): Add a clarifying note.
+ 
+ 2019-04-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/89965
+ 	* dce.c: Include rtl-iter.h.
+ 	(struct check_argument_load_data): New type.
+ 	(check_argument_load): New function.
+ 	(find_call_stack_args): Check for loads from stack slots still tracked
+ 	in sp_bytes and punt if any is found.
+ 
+ 	* config/mips/loongson-mmiintrin.h: Fix up #error message.
+ 
+ 2019-04-12  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* params.def (PARAM_MAX_LTO_STREAMING_PARALLELISM): New parameter.
+ 	* doc/invoke.texi (max-lto-streaming-paralellism): New --param.
+ 
+ 2019-04-12  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR middle-end/89970
+ 	* multiple_target.c (create_dispatcher_calls): Wrap ifunc
+ 	in error message.
+ 	(separate_attrs): Handle multiple 'default's.
+ 	(expand_target_clones): Rework error handling code.
+ 
+ 2019-04-12  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+ 
+ 	PR target/87532
+ 	* config/rs6000/rs6000.c (rs6000_split_vec_extract_var): Use inner
+ 	mode of vector rather than mode of destination for move instruction.
+ 	* config/rs6000/vsx.md (*vsx_extract_<mode>_<VS_scalar>mode_var):
+ 	Use QI inner mode with V16QI vector mode.
+ 
+ 2019-04-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/52726
+ 	* config/tilepro/tilepro.c (tilepro_print_operand): Use just
+ 	"invalid %%t operand" in output_operand_lossage message.
+ 
+ 2019-04-12  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/predicates.md (permute_pattern_operand): New
+ 	predicate.
+ 	* config/s390/vector.md ("*vec_splats_bswap_vec<mode>"): Add USE
+ 	operand for the permute pattern.
+ 	("*vec_perm<mode>"): New insn definition.
+ 	("bswap<mode>"): Generate the permute pattern operand in the
+ 	expander and perform the operand reloads for pre arch13 level
+ 	already.
+ 	("*bswap<mode>_emu"): Rename to ...
+ 	("*bswap<mode>"): ... this. And make the splitter vxe2 only.
+ 	* config/s390/vx-builtins.md ("*vec_insert_and_zero_bswap<mode>"):
+ 	Add the USE operand for the permute pattern.
+ 	("*vec_set_bswap_vec<mode>"): Likewise.
+ 
+ 2019-04-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/89946
+ 	* varasm.c (assemble_start_function): Don't use tree_fits_uhwi_p
+ 	and gcc_unreachable if it fails, just call tree_to_uhwi which
+ 	verifies that too.  Test TREE_CHAIN instead of list_length > 1.
+ 	Start warning message with a lower-case letter.  Formatting fixes.
+ 
+ 	PR rtl-optimization/90026
+ 	* cfgcleanup.c (try_optimize_cfg): When removing empty bb with no
+ 	successors, look for BARRIERs inside of the whole BB_FOOTER chain
+ 	rather than just at the start of it.  If e->src BB_FOOTER is not NULL
+ 	in cfglayout mode, use emit_barrier_after_bb.
+ 
+ 2018-04-11  Steve Ellcey  <sellcey@marvell.com>
+ 
+ 	PR rtl-optimization/87763
+ 	* config/aarch64/aarch64.md (*aarch64_bfi<GPI:mode>4_noshift_alt):
+ 	New Instruction.
+ 
+ 2019-04-11  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* doc/extend.texi (@node Statement Exprs): Note variable shadowing at
+ 	max macro using statement expression.
+ 
+ 2019-04-11  David Edelsohn  <dje.gcc@gmail.com>
+ 
+ 	* xcoffout.h (xcoff_private_rodata_section_name): Declare.
+ 	* xcoffout.c (xcoff_private_rodata_section_name): Define.
+ 	* config/rs6000/rs6000.c (rs6000_xcoff_asm_init_sections): Create
+ 	read_only_private_data_section using xcoff_private_rodata_section_name.
+ 	(rs6000_xcoff_file_start): Generate xcoff_private_rodata_section_name.
+ 
+ 2019-04-11  Christophe Lyon  <christophe.lyon@linaro.org>
+ 
+ 	PR target/90016
+ 	* config/aarch64/aarch64.opt (msve-vector-bits): Add missing final '.'.
+ 
+ 2019-04-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/89965
+ 	* dce.c (sp_based_mem_offset): New function.
+ 	(find_call_stack_args): Use sp_based_mem_offset.
+ 
+ 2019-04-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/invoke.texi (Optimize Options): Clarify -flive-patching docs.
+ 
+ 2019-04-11  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90020
+ 	* tree-ssa-sccvn.c (vn_reference_may_trap): New function.
+ 	* tree-ssa-sccvn.h (vn_reference_may_trap): Declare.
+ 	* tree-ssa-pre.c (compute_avail): Use it to not put
+ 	possibly trapping references after a call that might not
+ 	return into EXP_GEN.
+ 	* gcse.c (compute_hash_table_work): Do not elide
+ 	marking a block containing a call if the call might not
+ 	return.
+ 
+ 2019-04-11  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90018
+ 	* tree-vect-data-refs.c (vect_preserves_scalar_order_p):
+ 	Test both SLP and interleaving variants.
+ 
+ 2019-04-11  Robin Dapp  <rdapp@linux.ibm.com>
+ 
+ 	* config/s390/8561.md: New file.
+ 	* config/s390/driver-native.c (s390_host_detect_local_cpu):
+ 	Add arch13 cpu model.
+ 	* config/s390/s390-opts.h (enum processor_type): Likewise.
+ 	* config/s390/s390.c (s390_get_sched_attrmask): Add arch13.
+ 	(s390_get_unit_mask): Likewise.
+ 	(s390_is_fpd): Likewise.
+ 	(s390_is_fxd): Likewise.
+ 	* config/s390/s390.h (s390_tune_attr): Likewise.
+ 	* config/s390/s390.md: Include arch13 pipeline description.
+ 	* config/s390/s390.opt: Add arch13.
+ 
+ 2018-04-10  Steve Ellcey  <sellcey@marvell.com>
+ 
+ 	PR rtl-optimization/87763
+ 	* config/aarch64/aarch64-protos.h (aarch64_masks_and_shift_for_bfi_p):
+ 	New prototype.
+ 	* config/aarch64/aarch64.c (aarch64_masks_and_shift_for_bfi_p):
+ 	New function.
+ 	* config/aarch64/aarch64.md (*aarch64_bfi<GPI:mode>5_shift):
+ 	New instruction.
+ 	(*aarch64_bfi<GPI:mode>5_shift_alt): Ditto.
+ 	(*aarch64_bfi<GPI:mode>4_noand): Ditto.
+ 	(*aarch64_bfi<GPI:mode>4_noand_alt): Ditto.
+ 	(*aarch64_bfi<GPI:mode>4_noshift): Ditto.
+ 
+ 2019-04-10  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/invoke.texi (Optimize Options): Change "Nevertheless" to
+ 	"Although" in -fipa-icf documentation.
+ 
+ 	* doc/invoke.texi (Debugging Options): Explicitly state the semantics
+ 	of using multiple -g options.
+ 
+ 2019-04-10  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR gcov-profile/89959
+ 	* doc/gcov.texi: Make documentation of -x option
+ 	more precise.
+ 
+ 2019-04-10  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vectorizer.h (_stmt_vec_info): Remove same_dr_stmt
+ 	member.
+ 	(DR_GROUP_SAME_DR_STMT): Remove.
+ 	* tree-vect-stmts.c (vectorizable_load): Remove unreachable code.
+ 	* tree-vect-data-refs.c (vect_analyze_group_access_1): Likewise,
+ 	replace with assert.
+ 	(vect_analyze_data_ref_accesses): Fix INTEGER_CST comparison.
+ 	(vect_record_grouped_load_vectors): Remove unreachable code.
+ 
+ 2019-04-10  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/90016
+ 	* config/aarch64/aarch64.opt (msve-vector-bits): Remove redundant and
+ 	obsolete reference to N.
+ 
+ 2019-04-10  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/90025
+ 	* expr.c (store_expr): Set properly size on the MEM passed to
+ 	clear_storage.
+ 
+ 	PR c++/90010
+ 	* gimple-ssa-sprintf.c (target_to_host): Fix handling of targstr
+ 	with strlen in between hostsz-3 and hostsz-1 inclusive when no
+ 	translation is needed, and when translation is needed, only append
+ 	... if the string length is hostsz or more bytes long.  Avoid using
+ 	strncpy or strcat.
+ 
+ 2019-04-09  Matthew Malcomson  <matthew.malcomson@arm.com>
+ 
+ 	PR target/90024
+ 	* config/arm/arm.c (neon_valid_immediate): Disallow VOIDmode parameter.
+ 	* config/arm/constraints.md (Dm, DN, Dn): Split previous Dn constraint
+ 	into three.
+ 	* config/arm/neon.md (*neon_mov<mode>): Account for TImode and DImode
+ 	differences directly.
+ 	(*smax<mode>3_neon, vashl<mode>3, vashr<mode>3_imm): Use Dm constraint.
+ 
+ 2019-04-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR translation/90011
+ 	* ipa-devirt.c (compare_virtual_tables): Remove two trailing spaces
+ 	from diagnostics.
+ 	* config/arm/freebsd.h (LINK_SPEC): Remove trailing space from -p
+ 	diagnostics.
+ 	* config/riscv/freebsd.h (LINK_SPEC): Likewise.
+ 	* config/aarch64/aarch64-freebsd.h (FBSD_TARGET_LINK_SPEC): Likewise.
+ 	* config/darwin.h (DRIVER_SELF_SPECS, ASM_FINAL_SPEC): Remove
+ 	trailing space from -gsplit-dwarf diagnostics.
+ 
+ 	PR tree-optimization/89998
+ 	* gimple-ssa-sprintf.c (try_substitute_return_value): Use lhs type
+ 	instead of integer_type_node if possible, don't add ranges if return
+ 	type is not compatible with int.
+ 	* gimple-fold.c (gimple_fold_builtin_sprintf,
+ 	gimple_fold_builtin_snprintf): Use lhs type instead of hardcoded
+ 	integer_type_node.
+ 
+ 2019-04-09  Martin Liska  <mliska@suse.cz>
+ 
+ 	* Makefile.in: Use GENERATOR_CFLAGS for all generators.
+ 	* doc/install.texi: Document the new config.
+ 
+ 2019-04-09  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-data-refs.c (vect_get_smallest_scalar_type): Always
+ 	use gimple_expr_type for load and store calls.  Skip over the
+ 	condition argument in a conditional internal function.
+ 	Protect use of TREE_INT_CST_LOW.
+ 
+ 2019-04-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/90015
+ 	* config/riscv/riscv.c (riscv_get_interrupt_type): Fix comment typo.
+ 	(riscv_merge_decl_attributes): Fix typo in diagnostics.  Remove
+ 	trailing period from it too.
+ 
+ 2019-04-08  wu yuan  <wuyuan5@huawei.com>
+ 
+ 	* config/aarch64/aarch64-cores.def (tsv1100): Change scheduling model.
+ 	* config/aarch64/aarch64.md: Add "tsv110.md".
+ 	* config/aarch64/tsv110.md: New file.
+ 
+ 2019-04-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/90006
+ 	* tree-vect-data-refs.c (vect_get_smallest_scalar_type): Handle
+ 	calls like lrint.
+ 
+ 2019-04-08  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	PR target/83033
+ 	* config/aarch64/cortex-a57-fma-steering.c (fma_forest): Prohibit copy
+ 	construction.
+ 	(fma_root_node): Likewise.
+ 	(func_fma_steering): Likewise.
+ 
+ 2019-04-08  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/89865
+ 	* config/i386/i386.md: Add peepholes for z = x; x ^= y; x != z.
+ 
+ 	PR rtl-optimization/89865
+ 	* config/i386/i386.md
+ 	(SWI12 peephole for mem {+,-,&,|,^}= x; mem != 0): Fix up operand
+ 	numbers not to clash with the additional operands[4].
+ 	(peepholes for mem {+,-,&,|,^}= x; mem != 0): New peephole2s
+ 	with extra register copy in the middle.
+ 
+ 2019-04-08  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR gcov-profile/89961
+ 	* doc/gcov.texi: Document data_file.
+ 	* gcov.c (generate_results): Add data_info into JSON output.
+ 
+ 2019-04-01  Bin Cheng  <bin.cheng@linux.alibaba.com>
+ 
+ 	PR tree-optimization/89725
+ 	* tree-chrec.c (chrec_contains_symbols): New parameter.  Handle outer
+ 	loop's chrec as invariant symbol.
+ 	* tree-chrec.h (chrec_contains_symbols): New parameter.
+ 	* tree-data-ref.c (analyze_miv_subscript): Pass new argument.
+ 	(build_classic_dist_vector_1, add_other_self_distances): Bypass access
+ 	function of loops not in DDR's loop_nest.
+ 	* tree-data-ref.h (index_in_loop_nest): Add unreachable check.
+ 
+ 2019-04-08  Chenghua Xu  <paul.hua.gm@gmail.com>
+ 
+ 	PR target/89623
+ 	* config/mips/mips.opt (LOONGSON_EXT2): Use Var instead of
+ 	Mask.
+ 
+ 2019-04-07  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89945
+ 	* config/i386/i386.md (anddi_1 to andsi_1_zext splitter):
+ 	Avoid calling gen_lowpart with SYMBOL_REF and LABEL_REF operand.
+ 
+ 2019-04-05  Joern Rennecke  <joern.rennecke@embecosm.com>
+ 
+ 	* sched-deps.c (sched_macro_fuse_insns): Check return value of
+ 	targetm.fixed_condition_code_regs.
+ 
+ 2019-04-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/89892
+ 	PR debug/89905
+ 	* tree-cfgcleanup.c (remove_forwarder_block): Always move
+ 	debug bind stmts but reset them if they are not valid at the
+ 	destination.
+ 
+ 2019-04-05  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR translation/89936
+ 	* collect-utils.c (collect_execute): Use %< and %>, or %qs in
+ 	order to wrap keywords or arguments.
+ 	* collect2.c (main): Likewise.
+ 	(scan_prog_file): Likewise.
+ 	(scan_libraries): Likewise.
+ 	* common/config/riscv/riscv-common.c
+ 	(riscv_subset_list::parsing_subset_version): Likewise.
+ 	(riscv_subset_list::parse_std_ext): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_override_options_internal):
+ 	Likewise.
+ 	* config/arm/arm.c (arm_option_override): Likewise.
+ 	* config/cris/cris.c (cris_print_operand): Likewise.
+ 	* config/darwin-c.c (darwin_pragma_options): Likewise.
+ 	(darwin_pragma_unused): Likewise.
+ 	(darwin_pragma_ms_struct): Likewise.
+ 	* config/ft32/ft32.c (ft32_print_operand): Likewise.
+ 	* config/i386/i386.c (print_reg): Likewise.
+ 	(ix86_print_operand): Likewise.
+ 	* config/i386/xm-djgpp.h: Likewise.
+ 	* config/iq2000/iq2000.c (iq2000_print_operand): Likewise.
+ 	* config/m32c/m32c.c (m32c_option_override): Likewise.
+ 	* config/msp430/msp430.c (msp430_option_override): Likewise.
+ 	* config/nds32/nds32.c (nds32_option_override): Likewise.
+ 	* config/nvptx/mkoffload.c (main): Likewise.
+ 	* config/rx/rx.c (rx_print_operand): Likewise.
+ 	(valid_psw_flag): Likewise.
+ 	* config/vms/vms-c.c (vms_pragma_member_alignment): Likewise.
+ 	(vms_pragma_nomember_alignment): Likewise.
+ 	(vms_pragma_extern_model): Likewise.
+ 	* lto-wrapper.c (compile_offload_image): Likewise.
+ 	* omp-offload.c (oacc_parse_default_dims): Likewise.
+ 	* symtab.c (symtab_node::verify_base): Likewise.
+ 	* tlink.c (recompile_files): Likewise.
+ 	(start_tweaking): Likewise.
+ 	* tree-profile.c (parse_profile_filter): Likewise.
+ 
+ 2019-04-05  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/89956
+ 	* tree-ssa-math-opts.c (convert_mult_to_fma): Protect against
+ 	multiple negates of the same value.
+ 
+ 2019-04-04  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/89957
+ 	PR middle-end/89911
+ 	* builtins.c (expand_builtin_strnlen): Make sure wi::ltu_p operands
+ 	have the same precision since the function crashes otherwise.
+ 	* calls.c (maybe_warn_nonstring_arg): Avoid assuming strnlen() call
+ 	has non-zero arguments.
+ 
+ 2019-04-04  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/89934
+ 	* gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Bail
+ 	out if the number of arguments is less than expected.
+ 
+ 2019-04-04  Jeff Law  <law@redhat.com>
+ 
+ 	PR rtl-optimization/89399
+ 	* ree.c (combine_set_extension): Use single_set rather than
+ 	digging into PATTERN for items on the candidate list.
+ 	(combine_reaching_defs): Likewise.
+ 
+ 2019-04-04  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR rtl-optimization/46590
+ 	* loop-invariant.c (find_defs): Move df_remove_problem and
+ 	df_process_deferred_rescans to move_invariants.
+ 	Move df_live_add_problem and df_live_set_all_dirty calls
+ 	to move_invariants.
+ 	(move_invariants): Likewise.
+ 	(move_loop_invariants): Likewise, making the df_live calls
+ 	conditional on -O.  Remove the problem again if we added it
+ 	locally.
+ 
+ 2019-04-03  qing zhao  <qing.zhao@oracle.com>
+ 
+ 	PR tree-optimization/89730
+ 	* ipa-inline.c (can_inline_edge_p): Delete the checking for
+ 	-flive-patching=inline-only-static.
+ 	(can_inline_edge_by_limits_p): Add the checking for
+ 	-flive-patching=inline-only-static and grant always_inline
+ 	even when -flive-patching=inline-only-static is specified.
+ 
+ 2019-04-03  Jeff Law  <law@redhat.com>
+ 
+ 	PR rtl-optimization/81025
+ 	* reorg.c (skip_consecutive_labels): Do not skip past a BARRIER.
+ 
+ 2019-04-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/84101
+ 	* tree-vect-stmts.c: Include explow.h for hard_function_value,
+ 	regs.h for hard_regno_nregs.
+ 	(cfun_returns): New helper.
+ 	(vect_model_store_cost): When vectorizing a store to a decl
+ 	we return and the function ABI returns in a multi-reg location
+ 	account for the possible spilling that will happen.
+ 
+ 2019-04-03  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390.c (s390_legitimate_address_p): Reject long
+ 	displacement addresses for vector mode operands.
+ 
+ 2019-04-03  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.c (GMASK_LEN): Define.
+ 	(arc_restore_callee_saves): Restore first blink when
+ 	!optimize_size.
+ 
+ 2019-04-03  Sudakshina Das  <sudi.das@arm.com>
+ 
+ 	* doc/extend.texi: Add deprecated comment on sign-return-address
+ 	function attribute and add mbranch-protection.
+ 	* doc/invoke.texi: Add bti to the options for mbranch-protection.
+ 
+ 2019-04-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR lto/89896
+ 	* lto-wrapper.c (run_gcc): Avoid implicit rules making
+ 	the all target phony.
+ 
+ 2019-04-02  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89902
+ 	PR target/89903
+ 	* config/i386/i386.c (dimode_scalar_to_vector_candidate_p):
+ 	Return false for variable DImode shifts.
+ 	(dimode_scalar_chain::compute_convert_gain): Do not handle
+ 	register count operand in variable DImode shifts.
+ 	(dimode_scalar_chain::make_vector_copies): Remove support to copy
+ 	count argument of a variable shift instruction to a vector register.
+ 	(dimode_scalar_chain::convert_reg): Remove support to convert
+ 	count argument of a variable shift instruction.
+ 
+ 2019-04-02  Andrey Belevantsev  <abel@ispras.ru>
+ 
+ 	PR rtl-optimization/84206
+ 	* sel-sched-ir.h (get_all_loop_exits): Avoid the outer loop when
+ 	iterating over loop headers.
+ 
+ 2019-04-02  Andrey Belevantsev  <abel@ispras.ru>
+ 
+ 	PR rtl-optimization/85876
+ 	* sel-sched.c (code_motion_path_driver): Avoid unwinding first_insn
+ 	beyond the original fence.
+ 
+ 2019-04-02  Ulrich Weigand  <uweigand@de.ibm.com>
+ 
+ 	* config.gcc: Mark spu* targets as deprecated/obsolete.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390-builtin-types.def: New builtin function type
+ 	definitions. Remove unused types.
+ 	* config/s390/s390-builtins.def (s390_vcdgb, s390_vcdlgb)
+ 	(s390_vcgdb, s390_vclgdb): Remove low-level builtin definitions.
+ 	(s390_vec_float, s390_vec_signed, s390_vec_unsigned): New
+ 	overloaded builtins.
+ 	(s390_vcefb, s390_vcdgb, s390_vcelfb, s390_vcdlgb, s390_vcfeb)
+ 	(s390_vcgdb, s390_vclfeb, s390_vclgdb): New low-level builtins.
+ 	* config/s390/vecintrin.h (vec_float): New builtin macro definition.
+ 	(vec_double, vec_signed, vec_unsigned): Define to use the new
+ 	overloaded builtins.
+ 	* config/s390/vx-builtins.md ("vec_double_s64", "vec_double_u64"):
+ 	Remove expanders.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390-builtin-types.def: New builtin function type
+ 	definitions.
+ 	* config/s390/s390-builtins.def (s390_vec_search_string_cc)
+ 	(s390_vec_search_string_until_zero_cc): New overloaded builtins.
+ 	(s390_vstrsb, s390_vstrsh, s390_vstrsf, s390_vstrszb)
+ 	(s390_vstrszh, s390_vstrszf): New low-level builtins.
+ 	* config/s390/s390.md (UNSPEC_VEC_VSTRS, UNSPEC_VEC_VSTRSCC): New
+ 	constant definitions.
+ 	* config/s390/vecintrin.h (vec_search_string_cc)
+ 	(vec_search_string_until_zero_cc): New builtin name definitions.
+ 	* config/s390/vx-builtins.md ("vstrs<mode>", "vstrsz<mode>"): New
+ 	expanders.
+ 	("vec_vstrs<mode>"): New insn definition.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390-builtin-types.def: Add new builtin function
+ 	types.
+ 	* config/s390/s390-builtins.def (s390_vec_sldb, s390_vec_srdb):
+ 	New overloaded builtins.
+ 	(s390_vec_sldb, s390_vec_srdb): New low-level builtins.  and
+ 	s390_vsrd.
+ 	* config/s390/s390.md (UNSPEC_VEC_SLDB): Rename to ...
+ 	(UNSPEC_VEC_SLDBYTE): ... this.
+ 	(UNSPEC_VEC_SLDBIT, UNSPEC_VEC_SRDBIT): New constant definitions.
+ 	* config/s390/vecintrin.h (vec_sldb, vec_srdb): New builtin name
+ 	definitions.
+ 	* config/s390/vx-builtins.md ("vec_sld<mode>", "vec_sldw<mode>"):
+ 	Rename UNSPEC_VEC_SLDB to UNSPEC_VEC_SLDBYTE.
+ 	("vec_sldb<mode>", "vec_srdb<mode>"): New insn definitions.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	("*vec_splats_bswap_vec<mode>", "*vec_splats_bswap_elem<mode>"):
+ 	New insn definition.
+ 	* config/s390/vx-builtins.md (V_HW_HSD): Move to ...
+ 	* config/s390/vector.md (V_HW_HSD): ... here.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/vecintrin.h: Map vec_vster low-level builtins to vec_vler.
+ 	* config/s390/vx-builtins.md ("*vec_insert_and_zero_bswap<mode>")
+ 	("*vec_set_bswap_elem<mode>", "*vec_set_bswap_vec<mode>")
+ 	("*vec_extract_bswap_vec<mode>", "*vec_extract_bswap_elem<mode>"):
+ 	New insn definitions.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390-builtin-types.def: Add new builtin function type.
+ 	* config/s390/s390-builtins.def: Add overloaded builtin
+ 	s390_vec_reve and low-level builtins for s390_vler and s390_vster.
+ 	* config/s390/s390.md (UNSPEC_VEC_ELTSWAP): New constant definition.
+ 	* config/s390/vecintrin.h (vec_reve): New builtin name definition.
+ 	* config/s390/vx-builtins.md (V_HW_HSD): New mode iterator.
+ 	("eltswap<mode>"): New expander.
+ 	("*eltswapv16qi", "*eltswap<mode>", "*eltswap<mode>_emu"): New
+ 	insn definitions.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390-builtin-types.def: Add new builtin function types.
+ 	* config/s390/s390-builtins.def: Add overloaded builtin
+ 	s390_vec_revb. Add low-level builtins for vlbr and vstbr
+ 	instructions.
+ 	* config/s390/vecintrin.h (vec_revb): New builtin name definition.
+ 	* config/s390/vector.md (VT_HW_HSDT): New mode iterator.
+ 	("bswap<mode>"): New expander.
+ 	("*bswap<mode>", "*bswap<mode>_emu"): New insn definitions.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390-builtins.def (B_VXE2): New builtin flag definition.
+ 	* config/s390/s390-c.c (s390_cpu_cpp_builtins_internal): Increment
+ 	vector builtin version number in __VEC__.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390.md (VX_CONV_BFP, VX_CONV_INT): New mode
+ 	iterators.
+ 	(SFSI): New mode attribute.
+ 	("*fixuns_truncdfdi2_vx", "*fix_truncdfdi2_bfp_z13")
+ 	("*floatunsdidf2_z13", ): Add support for 32 bit conversions and
+ 	rename to ...
+ 	("*fixuns_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_z13")
+ 	("*fix_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_bfp_z13")
+ 	("*floatuns<VX_CONV_INT:mode><VX_CONV_BFP:mode>2_z13"): ... these.
+ 	("floatsi<mode>2"): Add wcefb instruction.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390.md ("xde"): Extend mode attribute to vector types.
+ 	* config/s390/vector.md (VX_VEC_CONV_BFP, VX_VEC_CONV_INT): New
+ 	mode iterators.
+ 	("floatv2div2df2", "floatunsv2div2df2", "fix_truncv2dfv2di2")
+ 	("fixuns_truncv2dfv2di2"): Enhance with mode iterator to also
+ 	support 32 bit fp-int conversions. Rename to ...
+ 	("float<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2")
+ 	("floatuns<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2")
+ 	("fix_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2")
+ 	("fixuns_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2"):
+ 	... to these.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390.c (s390_rtx_costs): Do not add extra costs for
+ 	if-then-else constructs if we can use the select instruction.
+ 	* config/s390/s390.md ("*mov<mode>cc"): Add the new instructions.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390.md ("*popcountdi_arch13_cc")
+ 	("*popcountdi_arch13_cconly", "*popcountdi_arch13"): New insn
+ 	definition.
+ 	("*popcount<mode>", "popcountdi2", "popcountsi2", "popcounthi2"):
+ 	Append _z196 to make it ...
+ 	("*popcount<mode>_z196", "popcountdi2_z196", "popcountsi2_z196")
+ 	("popcounthi2_z196"): ... this.
+ 	("popcountdi2_z196"): Remove TARGET_64BIT from the insn condition.
+ 	("popcountdi2", "popcountsi2", "popcounthi2"): New expanders.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390.c (s390_canonicalize_comparison): Convert
+ 	certain compares for arch13 in order to make use of the condition
+ 	code result produced by the new instructions.
+ 	(s390_rtx_costs): Adjust the costs for nnrk, nngrk, nork, nogrk,
+ 	nxrk, and nxgrk instruction patterns.
+ 	* config/s390/s390.md (ANDOR, bitops_name, inv_bitops_name)
+ 	(inv_no): Add new code iterator together with some attributes.
+ 	("*andc_split_<mode>"): Disable splitter for arch13.
+ 	("*<ANDOR:bitops_name>c<GPR:mode>_cc")
+ 	("*<ANDOR:bitops_name>c<GPR:mode>_cconly")
+ 	("*<ANDOR:bitops_name>c<GPR:mode>")
+ 	("*n<ANDOR:inv_bitops_name><GPR:mode>_cc")
+ 	("*n<ANDOR:inv_bitops_name><mode>_cconly")
+ 	("*n<ANDOR:inv_bitops_name><mode>", "*nxor<GPR:mode>_cc")
+ 	("*nxor<mode>_cconly", "*nxor<mode>"): New insn definitions.
+ 
+ 2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* common/config/s390/s390-common.c (processor_flags_table): New
+ 	entry for arch13.
+ 	* config.gcc: Support arch13 with the --with-arch= configure flag.
+ 	* config/s390/driver-native.c (s390_host_detect_local_cpu):
+ 	* config/s390/s390-opts.h (enum processor_type): Add PROCESSOR_ARCH13.
+ 	* config/s390/s390.c (s390_get_sched_attrmask)
+ 	(s390_get_unit_mask): Add PROCESSOR_ARCH13.
+ 	* config/s390/s390.h (enum processor_flags): Add PF_VXE2 and PF_ARCH13.
+ 	* config/s390/s390.md (TARGET_CPU_ARCH13, TARGET_CPU_ARCH13_P)
+ 	(TARGET_CPU_VXE2, TARGET_CPU_VXE2_P, TARGET_ARCH13)
+ 	(TARGET_ARCH13_P, TARGET_VXE2, TARGET_VXE2_P): New macro
+ 	definitions.
+ 	* config/s390/s390.opt: Support arch13 as processor type in
+ 	command line options.
+ 
+ 2019-04-02  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR translation/89912
+ 	* params.def (PARAM_GRAPHITE_MAX_ARRAYS_PER_SCOP):
+ 	Fix param description of graphite-max-arrays-per-scop.
+ 
+ 2019-04-02  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* config/sparc/linux64.h (ASAN_REJECT_SPEC): New macro.
+ 	(ASAN_CC1_SPEC): Use it in 64-bit mode.
+ 	* config/sparc/sol2.h (ASAN_REJECT_SPEC): Remove superfluous colon.
+ 
+ 2019-04-01  Andrey Belevantsev  <abel@ispras.ru>
+ 
+ 	PR rtl-optimization/85412
+ 	* sel-sched.c (sel_sched_region): Assign reset_sched_cycles_p before
+ 	sel_sched_region_1, not after.
+ 
+ 2019-04-01  Andrey Belevantsev  <abel@ispras.ru>
+ 
+ 	PR rtl-optimization/86928
+ 	* sel-sched-ir.c (sel_redirect_edge_and_branch_force): Invoke
+ 	compute_live if necessary.
+ 	(sel_redirect_edge_and_branch): Likewise.
+ 
+ 2019-04-01  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/89865
+ 	* ira-costs.c (process_bb_node_for_hard_reg_moves): Skip hard
+ 	register if it is a part of small class.
+ 
+ 2019-04-01  Andrey Belevantsev  <abel@ispras.ru>
+ 
+ 	PR rtl-optimization/87273
+ 	* sel-sched-ir.c (merge_fences): Remove assert.
+ 
+ 2019-04-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/46590
+ 	* domwalk.h (dom_walker::dom_walker): Consolidate constructors.
+ 	(dom_walker::m_reachability): Add in place of...
+ 	(dom_walker::m_skip_unreachable_blocks): ...this.
+ 	* domwalk.c (dom_walker::dom_walker): Consoliate constructors.
+ 	Move complex initialization ...
+ 	(dom_walker::walk): Here.  Especially compute m_bb_to_rpo
+ 	lazily and initialize edge flags on each invocation.
+ 	(dom_walker::bb_reachable): Use m_reachability.
+ 
+ 2019-04-01  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR driver/89861
+ 	* opt-suggestions.c (option_proposer::build_option_suggestions):
+ 	Add variant without any argument in order to provide better
+ 	hints.
+ 
+ 2019-04-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR c/71598
+ 	* gimple.c: Include langhooks.h.
+ 	(gimple_get_alias_set): Treat enumeral types as the underlying
+ 	integer type.
+ 
+ 2019-03-29  Kugan Vivekanandarajah  <kuganv@linaro.org>
+ 	    Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR rtl-optimization/89862
+ 	* rtl.h (word_register_operation_p): Exclude CONST_INT from operations
+ 	that operates on the full registers for WORD_REGISTER_OPERATIONS
+ 	architectures.
+ 
+ 2019-03-29  Jim Wilson  <jimw@sifive.com>
+ 
+ 	* common/config/riscv/riscv-common.c (riscv_parse_arch_string):
+ 	Clear MASK_RVC and then set if C subset supported.
+ 
+ 2019-03-29  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/89872
+ 	* gimplify.c (gimplify_compound_literal_expr): Don't optimize a
+ 	non-addressable complit into its initializer if it is volatile.
+ 
+ 2019-03-29  Roman Zhuykov  <zhroma@ispras.ru>
+ 
+ 	* opts-common.c (integral_argument): Set errno properly in one case.
+ 
+ 2019-03-29  Martin Liska  <mliska@suse.cz>
+ 
+ 	* doc/invoke.texi: Remove -Wchkp from documentation.
+ 
+ 2019-03-29  Martin Liska  <mliska@suse.cz>
+ 
+ 	* dbgcnt.c (print_limit_reach): New function.
+ 	(dbg_cnt): Use it.
+ 
+ 2019-03-29  Martin Liska  <mliska@suse.cz>
+ 
+ 	* dbgcnt.c (dbg_cnt_process_single_pair): Fix GNU coding style.
+ 	(dbg_cnt_process_opt): Parse first tokens aas
+ 	dbg_cnt_process_single_pair is also using strtok.
+ 
+ 2019-03-29  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/87485
+ 	* function.c (expand_function_end): Move stack_protect_epilogue
+ 	before loading of return value into hard register(s).
+ 
+ 2019-03-28  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/89621
+ 	* tree-inline.h (struct copy_body_data): Add
+ 	dont_remap_vla_if_no_change flag.
+ 	* tree-inline.c (remap_type_3, remap_type_2): New functions.
+ 	(remap_type): Don't remap vla types if id->dont_remap_vla_if_no_change
+ 	and remap_type_2 returns false.
+ 	* omp-low.c (new_omp_context): Set ctx->cb.dont_remap_vla_if_no_change.
+ 	Move ctx->cb.adjust_array_error_bounds setting to the outermost ctx
+ 	only from where it is copied to nested contexts.
+ 
+ 2019-03-28  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89865
+ 	* config/i386/i386.md (RMW operation with LEA peephole):
+ 	Use LEAMODE mode attribute instead of SWI mode iterator for
+ 	LEA pattern.
+ 
+ 2019-03-28  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89848
+ 	* config/i386/i386.c (dimode_scalar_chain::make_vector_copies):
+ 	Also process XEXP (src, 0) of a shift insn.
+ 
+ 2019-03-28  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR middle-end/89725
+ 	* optinfo-emit-json.cc (optrecord_json_writer::optinfo_to_json):
+ 	Use DECL_ASSEMBLER_NAME rather than get_fnname_from_decl.
+ 
+ 2019-03-28  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* regcprop.c (copyprop_hardreg_forward_1): Remove redundant INSN_P
+ 	test.
+ 	(cprop_hardreg_bb, cprop_hardreg_debug): New functions.
+ 	(pass_cprop_hardreg::execute): Use those.  Don't repeat bb processing
+ 	immediately after first one with df_analyze in between, but rather
+ 	process all bbs, queueing ones that need second pass in a worklist,
+ 	df_analyze, process queued debug insn changes and if second pass is
+ 	needed, process bbs from worklist, df_analyze, process queued debug
+ 	insns again.
+ 
+ 	* rtl.h (NONDEBUG_INSN_P): Define as NONJUMP_INSN_P or JUMP_P
+ 	or CALL_P instead of INSN_P && !DEBUG_INSN_P.
+ 	(INSN_P): Define using NONDEBUG_INSN_P or DEBUG_INSN_P.
+ 
+ 2019-03-28  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR c/79022
+ 	* gengtype.h (create_nested_ptr_option): Fix parameter names to match
+ 	definition.
+ 
+ 2019-03-27  Mateusz B  <mateuszb@poczta.onet.pl>
+ 
+ 	PR target/85667
+ 	* config/i386/i386.c (ix86_function_value_1): Call the newly added
+ 	function for 32-bit MS_ABI.
+ 	(function_value_ms_32): New function.
+ 
+ 2019-03-27  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn.md (CC_SAVE_REG): New constant.
+ 	(movdi): Call gen_movdi_symbol_save_scc.
+ 	(gen_movdi_symbol_save_scc): New insn and split.
+ 
+ 2019-03-27  Peter Bergner  <bergner@linux.ibm.com>
+ 
+ 	PR rtl-optimization/89313
+ 	* function.c (matching_constraint_num): New static function.
+ 	(match_asm_constraints_1): Use it.  Fixup white space and comment.
+ 	Don't replace inputs with non-matching constraints which conflict
+ 	with early clobber outputs.
+ 
+ 2019-03-27  Jeff Law  <law@redhat.com>
+ 
+ 	PR rtl-optimization/87761
+ 	PR rtl-optimization/89826
+ 	* regcprop.c (copyprop_hardreg_forward_1): Move may_trap_p test
+ 	slightly later.
+ 	(pass_cprop_hardreg::execute): Call df_analyze after adding the
+ 	note problem to get REG_DEAD/REG_UNUSED notes updated.
+ 
+ 2019-03-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89463
+ 	* tree-ssa-dce.c (remove_dead_stmt): Take output vector to
+ 	queue edges to remove.
+ 	(eliminate_unnecessary_stmts): Remove dead PHIs alongside
+ 	dead stmts.  Delay edge removal until PHIs are removed to
+ 	make debug-stmt creation not confused by seemingly degenerate
+ 	PHIs.
+ 
+ 2019-03-27  Alan Modra  <amodra@gmail.com>
+ 
+ 	* config/rs6000/rs6000.h: Rename NON_SPECIAL_REGS to GEN_OR_FLOAT_REGS
+ 	throughout file.
+ 	* config/rs6000/darwin.h: Likewise.
+ 	* config/rs6000/rs6000.c: Likewise.
+ 
+ 2019-03-27  Alan Modra  <amodra@gmail.com>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Always
+ 	assign rs6000_hard_regno_mode_ok_p[m][r].  Formatting.
+ 
+ 2019-03-26  Andrew Waterman  <andrew@sifive.com>
+ 	    Jim Wilson  <jimw@sifive.com>
+ 
+ 	* config/riscv/generic.md (generic_alu, generic_load, generic_store)
+ 	(generic_xfer, generic_branch, generic_imul, generic_idivsi)
+ 	(generic_idivdi, generic_fmul_single, generic_fmul_double)
+ 	(generic_fdiv, generic_fsqrt): Add check for generic tune.
+ 	(generic_alu): Add auipc to type list.
+ 	* config/riscv/riscv-opts.h (enum riscv_microarchitecture_type): New.
+ 	(riscv_microarchitecture): Declare.
+ 	* config/riscv/riscv-protos.h (riscv_store_data_bypass_p): Declare.
+ 	* config/riscv/riscv.c (struct riscv_cpu_info): Add microarchitecture
+ 	field.
+ 	(riscv_microarchitecture): New.
+ 	(sifive_7_tune_info): New.
+ 	(riscv_cpu_info_table): Add microarchitecture value for rocket and
+ 	size.  Add sifive-3-series, sifive-5-series, and sifive-7-series
+ 	entries.
+ 	(riscv_store_data_bypass_p): New.
+ 	(riscv_option_override): Set riscv_microarchitecture from
+ 	cpu->microarchitecture.
+ 	* config/riscv/riscv.md: Include sifive-7.md.
+ 	(type): Add auipc.
+ 	(tune): New.
+ 	(auipc<mode>): Change type to auipc.
+ 	(restore_stack_nonlocal): New.
+ 	* config/riscv/sifive-7.md: New.
+ 	* doc/invoke.texi (RISC-V Options): Update mtune docs.
+ 
+ 2019-03-26  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89827
+ 	* config/i386/i386.c (dimode_scalar_chain::convert_reg):
+ 	Also process XEXP (src, 0) of a shift insn.
+ 
+ 2019-03-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-inline.c (remap_gimple_stmt): Cache gimple_block.
+ 	(copy_debug_stmt): Likewise.
+ 	(expand_call_inline): Likewise.
+ 	(copy_bb): Avoid redundant lookup & set of gimple_block.
+ 	* gimple-low.c (lower_gimple_return): Likewise.
+ 	(lower_builtin_setjmp): Likewise.
+ 
+ 2019-03-26  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* hash-table.h (hash_table::m_gather_mem_stats): If GATHER_STATISTICS
+ 	is constant 0, turn into static const data member initialized to false.
+ 	(hash_table::hash_table): Only initialize m_gather_mem_stats #if
+ 	GATHER_STATISTICS.  Add ATTRIBUTE_UNUSED to gather_mem_stats param.
+ 
+ 2019-03-26  Jason Merrill  <jason@redhat.com>
+ 	    Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* mem-stats.h (mem_alloc_description::unregister_descriptor): New
+ 	method.
+ 	(mem_alloc_description::release_object_overhead): Fix comment typos.
+ 	* hash-table.h (hash_table::~hash_table): Call
+ 	release_instance_overhead only if m_entries is non-NULL, otherwise
+ 	call unregister_descriptor.
+ 
+ 2019-03-26  Bin Cheng  <bin.cheng@linux.alibaba.com>
+ 
+ 	PR tree-optimization/81740
+ 	* tree-vect-data-refs.c (vect_analyze_data_ref_dependence):
+ 	In case of outer loop vectorization, check for backward dependence
+ 	at the inner loop if outer loop dependence is reversed.
+ 
+ 2019-03-26  Alan Modra  <amodra@gmail.com>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Correct
+ 	rs6000_vector_mem init.  Correct wI and wJ comment.
+ 
+ 2019-03-25  Alexander Monakov  <amonakov@ispras.ru>
+ 
+ 	PR rtl-optimization/88347
+ 	PR rtl-optimization/88423
+ 	* sched-deps.c (sched_analyze_insn): Take into account that for
+ 	tablejumps the barrier appears after a label and a jump_table_data.
+ 
+ 2019-03-25  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR c/89812
+ 	* c-common.c (check_user_alignment): Rename local.  Correct maximum
+ 	alignment in diagnostic.  Avoid assuming argument fits in SHWI,
+ 	convert it to UHWI when it fits.
+ 
+ 2019-03-25  Johan Karlsson  <johan.karlsson@enea.com>
+ 
+ 	PR debug/86964
+ 	* dwarf2out.c (premark_used_variables): New function.
+ 	(prune_unused_types_walk): Do not mark not premarked external
+ 	variables.
+ 	(prune_unused_types): Call premark_used_variables.
+ 
+ 2019-03-25  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/89676
+ 	* lra-constraints.c (curr_insn_transform): Do match reload for
+ 	early clobbers when the match was successful only for different
+ 	registers.
+ 
+ 2019-03-25  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* doc/extend.texi (Common Type Attributes): Document vector_size.
+ 	(Common Variable Attributes): Mention size constraint.  Correct
+ 	quoting and typos.
+ 	(Vector Extensions): Use @dfn when defining bas type.  Clarify
+ 	base type and size constraints.
+ 
+ 2019-03-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89789
+ 	* tree-ssa-sccvn.c (set_ssa_val_to): Do not allow lattice
+ 	changes from non-undefined back to undefined.
+ 
+ 2019-03-25  Thomas Otto  <thomas.otto@pdv-fs.de>
+ 
+ 	* dwarf2out.c (comp_dir_string): cached_wd could be set to both a
+ 	heap string and a gc string, but since this variable is unknown to
+ 	ggc the gc string might get reused and corrupted. Fixed by always
+ 	using a heap string.
+ 
+ 2019-03-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89779
+ 	* tree-ssa-loop-ivopts.c (remove_unused_ivs): Return
+ 	to remove IV defs, delay actual removal.
+ 	(tree_ssa_iv_optimize_loop): Likewise.  Avoid SCEV reset.
+ 	(tree_ssa_iv_optimize): Remove eliminated IV defs at the
+ 	very end, properly also reset loop control IV information.
+ 
+ 2019-03-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89802
+ 	* tree-ssa-math-opts.c (convert_mult_to_fma_1): Properly
+ 	move EH data to folded stmt.
+ 
+ 2019-03-25  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390-builtin-types.def: Remove few unused types and
+ 	fix sort order for others.
+ 
+ 2019-03-25  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390-c.c (s390_fn_types_compatible): Print the
+ 	expected and found types with -mdebug during builtin matching.
+ 
+ 2019-03-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/89790
+ 	* fold-const.c (operand_equal_p): Revert last change with
+ 	updated comment.
+ 
+ 2019-03-24  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_legitimize_tls_address): Add REG_EQUAL
+ 	notes for the result of the __tls_get_addr calls.
+ 	* config/rs6000/rs6000.md (unspec UNSPEC_TLS_GET_ADDR): New.
+ 
+ 2019-03-24  Jeff Law  <law@redhat.com>
+ 
+ 	* config/bfin/bfin.md (movpdi): Fix length for alternative 1.
+ 
+ 	PR rtl-optimization/87761
+ 	* regcprop.c (copyprop_hardreg_forward_1): Check may_trap_p on SET,
+ 	not INSN.  Also check RTX_FRAME_RELATED_P.  Queue insns for DF rescan
+ 	as needed.
+ 	(pass_cprop_hardreg::execute): Add df note problem and defer insn
+ 	rescans.  Reprocess blocks as needed, calling df_analyze before
+ 	reprocessing.  Always call df_analyze before fixing up debug bind
+ 	insns.
+ 
+ 2019-03-23  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/xmmintrin.h (_mm_movemask_pi8): Implement for 32-bit
+ 	big endian.
+ 
+ 2019-03-22  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	* config/aarch64/aarch64.md (zero_extendsidi2_aarch64): Fix type
+ 	attrribute for uxtw.
+ 
+ 2019-03-26  Jeff Law  <law@redhat.com>
+ 
+ 	PR rtl-optimization/87761
+ 	* config/mips/mips-protos.h (mips_split_move): Add new argument.
+ 	(mips_emit_move_or_split): Pass NULL for INSN into mips_split_move.
+ 	(mips_split_move): Accept new INSN argument.  Try to forward SRC
+ 	into the next instruction.
+ 	(mips_split_move_insn): Pass INSN through to mips_split_move.
+ 
+ 2019-03-22  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/89676
+ 	* lra-constraints.c (curr_insn_transform): Do match reload for
+ 	early clobbers even if the match was successful.
+ 
+ 2019-03-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/87481
+ 	* doc/invoke.texi (-fconstexpr-ops-limit=): Document.
+ 
+ 2019-03-22  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 
+ 	* config/rs6000/mmintrin.h (_mm_sub_pi32): Fix typo.
+ 
+ 2019-03-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* config/i386/sse.md (<avx512>_fmadd_<mode>_mask3<round_name>,
+ 	<avx512>_fmsub_<mode>_mask3<round_name>,
+ 	<avx512>_fnmadd_<mode>_mask3<round_name>,
+ 	<avx512>_fnmsub_<mode>_mask3<round_name>,
+ 	avx512f_vmfmadd_<mode>_mask3<round_name>,
+ 	avx512f_vmfmsub_<mode>_mask3<round_name>,
+ 	*avx512f_vmfnmadd_<mode>_mask3<round_name>): Use <round_nimm_predicate>
+ 	instead of register_operand and %v instead of v for match_operand 1.
+ 	(avx512f_vmfnmsub_<mode>_mask3<round_name>): Rename to ...
+ 	(*avx512f_vmfnmsub_<mode>_mask3<round_name>): ... this.  Use
+ 	<round_nimm_predicate> instead of register_operand and %v instead of v
+ 	for match_operand 1.
+ 
+ 	* config/i386/sse.md (<avx512>_fmadd_<mode>_mask<round_name>,
+ 	<avx512>_fmadd_<mode>_mask3<round_name>,
+ 	<avx512>_fmsub_<mode>_mask<round_name>,
+ 	<avx512>_fmsub_<mode>_mask3<round_name>,
+ 	<avx512>_fnmadd_<mode>_mask<round_name>,
+ 	<avx512>_fnmadd_<mode>_mask3<round_name>,
+ 	<avx512>_fnmsub_<mode>_mask<round_name>,
+ 	<avx512>_fnmsub_<mode>_mask3<round_name>,
+ 	<avx512>_fmaddsub_<mode>_mask<round_name>,
+ 	<avx512>_fmaddsub_<mode>_mask3<round_name>,
+ 	<avx512>_fmsubadd_<mode>_mask<round_name>,
+ 	<avx512>_fmsubadd_<mode>_mask3<round_name>): Use
+ 	<round_nimm_predicate> instead of nonimmediate_operand.
+ 	(fmai_vmfmadd_<mode><round_name>, fmai_vmfmsub_<mode><round_name>,
+ 	fmai_vmfnmadd_<mode><round_name>, fmai_vmfnmsub_<mode><round_name>):
+ 	Use register_operand instead of <round_nimm_predicate> for the
+ 	operand that needs to match output.
+ 	(*fmai_fmadd_<mode>, *fmai_fmsub_<mode>,
+ 	*fmai_fnmadd_<mode><round_name>, *fmai_fnmsub_<mode><round_name>):
+ 	Likewise.  Formatting fixes.
+ 
+ 	PR target/89784
+ 	* config/i386/i386.c (enum ix86_builtins): Remove
+ 	IX86_BUILTIN_VFMSUBSD3_MASK3 and IX86_BUILTIN_VFMSUBSS3_MASK3.
+ 	* config/i386/i386-builtin.def (__builtin_ia32_vfmaddsd3_mask,
+ 	__builtin_ia32_vfmaddsd3_mask3, __builtin_ia32_vfmaddsd3_maskz,
+ 	__builtin_ia32_vfmsubsd3_mask3, __builtin_ia32_vfmaddss3_mask,
+ 	__builtin_ia32_vfmaddss3_mask3, __builtin_ia32_vfmaddss3_maskz,
+ 	__builtin_ia32_vfmsubss3_mask3): New builtins.
+ 	* config/i386/sse.md (avx512f_vmfmadd_<mode>_mask<round_name>,
+ 	avx512f_vmfmadd_<mode>_mask3<round_name>,
+ 	avx512f_vmfmadd_<mode>_maskz_1<round_name>,
+ 	*avx512f_vmfmsub_<mode>_mask<round_name>,
+ 	avx512f_vmfmsub_<mode>_mask3<round_name>,
+ 	*avx512f_vmfmasub_<mode>_maskz_1<round_name>,
+ 	*avx512f_vmfnmadd_<mode>_mask<round_name>,
+ 	*avx512f_vmfnmadd_<mode>_mask3<round_name>,
+ 	*avx512f_vmfnmadd_<mode>_maskz_1<round_name>,
+ 	*avx512f_vmfnmsub_<mode>_mask<round_name>,
+ 	avx512f_vmfnmsub_<mode>_mask3<round_name>,
+ 	*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): New define_insns.
+ 	(avx512f_vmfmadd_<mode>_maskz<round_expand_name>): New define_expand.
+ 	* config/i386/avx512fintrin.h (_mm_mask_fmadd_sd, _mm_mask_fmadd_ss,
+ 	_mm_mask3_fmadd_sd, _mm_mask3_fmadd_ss, _mm_maskz_fmadd_sd,
+ 	_mm_maskz_fmadd_ss, _mm_mask_fmsub_sd, _mm_mask_fmsub_ss,
+ 	_mm_mask3_fmsub_sd, _mm_mask3_fmsub_ss, _mm_maskz_fmsub_sd,
+ 	_mm_maskz_fmsub_ss, _mm_mask_fnmadd_sd, _mm_mask_fnmadd_ss,
+ 	_mm_mask3_fnmadd_sd, _mm_mask3_fnmadd_ss, _mm_maskz_fnmadd_sd,
+ 	_mm_maskz_fnmadd_ss, _mm_mask_fnmsub_sd, _mm_mask_fnmsub_ss,
+ 	_mm_mask3_fnmsub_sd, _mm_mask3_fnmsub_ss, _mm_maskz_fnmsub_sd,
+ 	_mm_maskz_fnmsub_ss, _mm_mask_fmadd_round_sd, _mm_mask_fmadd_round_ss,
+ 	_mm_mask3_fmadd_round_sd, _mm_mask3_fmadd_round_ss,
+ 	_mm_maskz_fmadd_round_sd, _mm_maskz_fmadd_round_ss,
+ 	_mm_mask_fmsub_round_sd, _mm_mask_fmsub_round_ss,
+ 	_mm_mask3_fmsub_round_sd, _mm_mask3_fmsub_round_ss,
+ 	_mm_maskz_fmsub_round_sd, _mm_maskz_fmsub_round_ss,
+ 	_mm_mask_fnmadd_round_sd, _mm_mask_fnmadd_round_ss,
+ 	_mm_mask3_fnmadd_round_sd, _mm_mask3_fnmadd_round_ss,
+ 	_mm_maskz_fnmadd_round_sd, _mm_maskz_fnmadd_round_ss,
+ 	_mm_mask_fnmsub_round_sd, _mm_mask_fnmsub_round_ss,
+ 	_mm_mask3_fnmsub_round_sd, _mm_mask3_fnmsub_round_ss,
+ 	_mm_maskz_fnmsub_round_sd, _mm_maskz_fnmsub_round_ss): New intrinsics.
+ 
+ 2019-03-21  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/89350
+ 	* builtins.c (compute_objsize): Also ignore offsets whose upper
+ 	bound is negative.
+ 	* gimple-ssa-warn-restrict.c (builtin_memref): Add new member.
+ 	(builtin_memref::builtin_memref): Initialize new member.
+ 	Allow EXPR to be null.
+ 	(builtin_memref::extend_offset_range): Replace local with a member.
+ 	Avoid assuming pointer offsets are unsigned.
+ 	(builtin_memref::set_base_and_offset): Determine base object
+ 	before computing offset range.
+ 	(builtin_access::builtin_access): Handle memset.
+ 	(builtin_access::generic_overlap): Replace local with a member.
+ 	(builtin_access::strcat_overlap): Same.
+ 	(builtin_access::overlap): Same.
+ 	(maybe_diag_overlap): Same.
+ 	(maybe_diag_access_bounds): Same.
+ 	(wrestrict_dom_walker::check_call): Handle memset.
+ 	(check_bounds_or_overlap): Same.
+ 
+ 2019-03-21  Jan Hubicka  <hubicka@ucw.cz>
+ 	    Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR lto/89692
+ 	* tree.c (fld_type_variant, fld_incomplete_type_of,
+ 	fld_process_array_type): Call fld->pset.add and don't call
+ 	add_tree_to_fld_list if it returns true.
+ 	(free_lang_data_in_type): Similarly with self-recursive call.  Purge
+ 	non-marked types from TYPE_NEXT_VARIANT list.
+ 	(find_decls_types_r): Call fld_worklist_push for TYPE_CANONICAL (t).
+ 
+ 2019-03-21  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* hash-table.h (hash_table): Add Lazy template parameter defaulted
+ 	to false, if true, don't alloc_entries during construction, but defer
+ 	it to the first method that needs m_entries allocated.
+ 	(hash_table::hash_table, hash_table::~hash_table,
+ 	hash_table::alloc_entries, hash_table::find_empty_slot_for_expand,
+ 	hash_table::too_empty_p, hash_table::expand, hash_table::empty_slow,
+ 	hash_table::clear_slot, hash_table::traverse_noresize,
+ 	hash_table::traverse, hash_table::iterator::slide): Adjust all methods.
+ 	* hash-set.h (hash_set): Add Lazy template parameter defaulted to
+ 	false.
+ 	(hash_set::contains): If Lazy is true, use find_slot_with_hash with
+ 	NO_INSERT instead of find_with_hash.
+ 	(hash_set::traverse, hash_set::iterator, hash_set::iterator::m_iter,
+ 	hash_set::m_table): Add Lazy to template params of hash_table.
+ 	(gt_ggc_mx, gt_pch_nx): Use false as Lazy in hash_set template param.
+ 	* attribs.c (test_attribute_exclusions): Likewise.
+ 	* hash-set-tests.c (test_set_of_strings): Add iterator tests for
+ 	hash_set.  Add tests for hash_set with Lazy = true.
+ 
+ 2019-03-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89779
+ 	* tree.c (tree_nop_conversion): Consolidate and fix defensive
+ 	checks with respect to released SSA names now having error_mark_node
+ 	type.
+ 	* fold-const.c (operand_equal_p): Likewise.
+ 
+ 2019-03-20  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	PR target/89775
+ 	* config/s390/s390.c (global_not_special_regno_p): Move to make it
+ 	available to ...
+ 	(s390_optimize_register_info): Use global_not_special_regno_p to
+ 	check for global regs.
+ 
+ 2019-03-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89752
+ 	* lra-constraints.c (process_alt_operands) <reg>: For BLKmode, don't
+ 	update this_alternative nor this_alternative_set.
+ 
+ 2019-03-19  Jim Wilson  <jimw@sifive.com>
+ 
+ 	PR target/89411
+ 	* config/riscv/riscv.c (riscv_valid_lo_sum_p): New arg x.  New locals
+ 	align, size, offset.  Use them to handle a BLKmode reference.  Update
+ 	comment.
+ 	(riscv_classify_address): Pass info->offset to riscv_valid_lo_sum_p.
+ 
+ 2019-03-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/89768
+ 	* loop-unroll.c (unroll_loop_constant_iterations): Use gen_int_mode
+ 	instead of GEN_INT.
+ 	(unroll_loop_runtime_iterations): Likewise.
+ 
+ 2019-03-19  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/89644
+ 	* tree-ssa-strlen.c (handle_builtin_stxncpy): Use full_string_p
+ 	rather than endptr as an indicator of nul-termination.
+ 
+ 	PR tree-optimization/89644
+ 	* tree-ssa-strlen.c (handle_builtin_stxncpy): Consider unterminated
+ 	arrays in determining sequence sizes in strncpy and stpncpy.
+ 
+ 2019-03-19  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR middle-end/89737
+ 	* predict.c (combine_predictions_for_bb): Empty likely_edges and
+ 	unlikely_edges if there's an edge that belongs to both these sets.
+ 
+ 2018-03-19  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR target/89746
+ 	* config/rs6000/rs6000.md (fix_trunc<mode>si2_stfiwx): If we have a
+ 	non-TARGET_MFCRF target, and the dest is memory but not 32-bit aligned,
+ 	go via a stack temporary.
+ 
+ 2019-03-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89378
+ 	* config/mips/mips.c (mips_expand_vec_cond_expr): Use gen_lowpart
+ 	instead of gen_rtx_SUBREG.
+ 	* config/mips/mips-msa.md (vec_extract<mode><unitmode>): Likewise.
+ 
+ 2019-03-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/88389
+ 	* opts.c (finish_options): Disable -gsplit-dwarf when doing LTO.
+ 
+ 2019-03-19  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR lto/87809
+ 	PR lto/89335
+ 	* tree.c (free_lang_data_in_decl): Do not free context of C++
+ 	destrutors.
+ 
+ 2019-03-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89506
+ 	* config/arm/arm.md (cmpsi2_addneg): Swap the alternatives and use
+ 	subs for the first alternative except when operands[3] is 1.
+ 
+ 	PR target/89752
+ 	* gimplify.c (gimplify_asm_expr): For output argument with
+ 	TREE_ADDRESSABLE type, clear allows_reg if it allows memory, otherwise
+ 	diagnose error.
+ 
+ 2019-03-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR rtl-optimization/89753
+ 	* loop-unroll.c (decide_unroll_constant_iterations): Make guard for
+ 	explicit unrolling factor even more robust.
+ 
+ 2019-03-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89726
+ 	* config/i386/i386.c (ix86_expand_floorceildf_32): In ceil
+ 	compensation use x2 += 1 instead of x2 -= -1 and when honoring
+ 	signed zeros, do another copysign after the compensation.
+ 
+ 2019-03-18  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/89720
+ 	* tree-vrp.c (vrp_prop::check_mem_ref): Treat range with max < min
+ 	more conservatively, the same as anti-range.
+ 
+ 2019-03-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/88945
+ 	* tree-ssanames.c (release_ssa_name_fn): For released SSA names
+ 	use a TREE_TYPE of error_mark_node to avoid ICEs when dumping
+ 	basic-blocks that are removed.  Remove restoring SSA_NAME_VAR.
+ 	* tree-outof-ssa.c (eliminate_useless_phis): Remove redundant checking.
+ 
+ 2019-03-18  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* config/gcn/gcn-run.c (struct output): Make next_output unsigned.
+ 	Extend queue to 1024 entries.
+ 	Add "consumed" field.
+ 	(gomp_print_output): Remove print_index parameter.
+ 	Add final parameter.
+ 	Change limit to unsigned.
+ 	Use consumed field to implement circular buffer.
+ 	Detect interrupted print in final pass.
+ 	Flush output at the end.
+ 	(run): Update gomp_print_output usage.
+ 	(main): Initialize kernargs->output_data.consumed.
+ 
+ 2019-03-18  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-loop.c (vect_estimate_min_profitable_iters): Fix the
+ 	calculation of the minimum number of scalar iterations for
+ 	fully-predicated loops.
+ 
+ 2019-03-18  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR tree-optimization/89546
+ 	* tree-sra.c (propagate_subaccesses_across_link): Requeue new_acc if
+ 	any propagation to its children took place.
+ 
+ 2019-03-18  Andrew Burgess  <andrew.burgess@embecosm.com>
+ 
+ 	PR target/89627
+ 	* config/riscv/riscv.c (riscv_pass_fpr_single): Add offset
+ 	parameter, and make use of it.
+ 	(riscv_get_arg_info): Pass offset to riscv_pass_fpr_single.
+ 
+ 2019-03-18  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.opt (mcode-density-frame): Get the inital value
+ 	from TARGET_CODE_DENSITY_FRAME_DEFAULT.
+ 	* config/arc/elf.h (TARGET_CODE_DENSITY_FRAME_DEFAULT): Define.
+ 	* config/arc/linux.h (TARGET_CODE_DENSITY_FRAME_DEFAULT): Define.
+ 	* config/arc/arc.md (pop_multi_fp_blink): Adjust constraints to
+ 	match what the ops is doing.
+ 	(push_multi_fp_blink): Likewise.
+ 	* config/arc/arc.c (arc_override_options): Enable enter/leave when
+ 	compiling for size and elf target.
+ 	(arc_save_callee_enter): Adjust note to match what enter/leave
+ 	operation does.
+ 
+ 2019-03-18  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.md (tst_movb): Fix constraint.
+ 
+ 2019-03-18  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define.
+ 
+ 2019-03-18  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc-protos.h (arc_adjust_reg_alloc_order): Declare.
+ 	* config/arc/arc.c (arc_conditional_register_usage): Remove all
+ 	reg_alloc_order references.
+ 	(size_alloc_order): Define.
+ 	(arc_adjust_reg_alloc_order): New function.
+ 	* config/arc/arc.h (REG_ALLOC_ORDER): Proper define the register
+ 	order.
+ 	(ADJUST_REG_ALLOC_ORDER): Define.
+ 	(HONOR_REG_ALLOC_ORDER): Likewise.
+ 
+ 2019-03-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR target/87561
+ 	* config/i386/i386.c (ix86_add_stmt_cost): Pessimize strided
+ 	loads and stores a bit more.
+ 
+ 2019-03-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR target/87561
+ 	* config/i386/i386.c (ix86_add_stmt_cost): Apply strided
+ 	load pessimization to stores as well.
+ 
+ 2019-03-18  Andrey Belevantsev  <abel@ispras.ru>
+ 
+ 	PR middle-end/86979
+ 	* sel-sched.c (compute_av_set_at_bb_end): When we have an ineligible
+ 	successor, use NULL as its av set.
+ 
+ 2019-03-15  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR rtl-optimization/89721
+ 	* lra-constraints (invariant_p): Return false if side_effects_p holds.
+ 
+ 2019-03-15  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+ 
+ 	PR target/87532
+ 	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
+ 	When handling vec_extract, use modular arithmetic to allow
+ 	constant selectors greater than vector length.
+ 	* config/rs6000/rs6000.c (rs6000_expand_vector_extract): Allow
+ 	V1TImode vectors to have constant selector values greater than 0.
+ 	Use modular arithmetic to compute vector index.
+ 	(rs6000_split_vec_extract_var): Use modular arithmetic to compute
+ 	index for in-memory vectors.  Correct code generation for
+ 	in-register vectors.
+ 	(altivec_expand_vec_ext_builtin): Use modular arithmetic to
+ 	compute index.
+ 
+ 2019-03-15  Alexandre Oliva  <aoliva@redhat.com>
+ 
+ 	PR c++/88534
+ 	PR c++/88537
+ 	* dwarf2out.c (generic_parameter_die): Follow DECL_INITIAL of
+ 	VAR_DECL args.
+ 
+ 2019-03-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/89709
+ 	* tree.c (inchash::add_expr): Strip any location wrappers.
+ 	* fold-const.c (operand_equal_p): Move stripping of location wrapper
+ 	after hash verification.
+ 
+ 	PR debug/89704
+ 	* dwarf2out.c (add_const_value_attribute): Return false for MINUS,
+ 	SIGN_EXTEND and ZERO_EXTEND.
+ 
+ 2019-03-14  Jason Merrill  <jason@redhat.com>
+ 	    Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* hash-table.h (remove_elt_with_hash): Return if slot is NULL rather
+ 	than if is_empty (*slot).
+ 	* hash-set-tests.c (test_set_of_strings): Add tests for addition of
+ 	existing elt and for elt removal.
+ 	* hash-map-tests.c (test_map_of_strings_to_int): Add test for removal
+ 	of already removed elt.
+ 
+ 2019-03-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89650
+ 	* config/i386/i386.c (remove_partial_avx_dependency): Handle
+ 	REG_EH_REGION note.
+ 
+ 2019-03-14  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR other/89712
+ 	* doc/invoke.texi: Remove -fdump-class-hierarchy option.
+ 
+ 2019-03-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR target/89711
+ 	* config/i386/i386.c (make_resolver_func): Properly set
+ 	DECL_CONTEXT on the RESULT_DECL.
+ 	* config/rs6000/rs6000.c (make_resolver_func): Likewise.
+ 
+ 2019-03-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	* gimple-pretty-print.c: Include cfgloop.h.
+ 	(dump_gimple_phi): Adjust.
+ 	(dump_gimple_bb_header): Dump loop header for GIMPLE.
+ 	(pp_cfg_jump): Adjust.
+ 	(dump_implicit_edges): Dump fallthru to next block for GIMPLE as well.
+ 	* tree-cfg.c (build_gimple_cfg): Remove lower_phi_internal_fn call.
+ 	(lower_phi_internal_fn): Remove.
+ 	(verify_gimple_call): Remove IFN_PHI special-casing.
+ 	(dump_function_to_file): Dump IL state.
+ 	* tree-into-ssa.c (rewrite_add_phi_arguments): Revert changes
+ 	done to deal with PHI nodes being present in non-SSA state.
+ 
+ 2019-03-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR ipa/89684
+ 	* multiple_target.c (create_dispatcher_calls): Change
+ 	references_to_redirect from vector of ipa_ref * to vector of ipa_ref.
+ 	In the node->iterate_referring loop, push *ref rather than ref, call
+ 	ref->remove_reference () and always pass 0 to iterate_referring.
+ 
+ 	PR rtl-optimization/89679
+ 	* expmed.c (expand_mult_const): Don't add a REG_EQUAL note if it
+ 	would contain a paradoxical SUBREG.
+ 
+ 2019-03-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89710
+ 	* tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Use
+ 	safe_dyn_cast.
+ 
+ 2019-03-14  Martin Liska  <mliska@suse.cz>
+ 
+ 	* coverage.c (coverage_begin_function): Stream also
+ 	end_column.
+ 	* doc/gcov.texi: Document 2 new fields in JSON file.  Improve
+ 	documentation about function declaration location.
+ 	* gcov-dump.c (tag_function): Print whole range
+ 	of function declaration.
+ 	* gcov.c (struct function_info): Add end_column field.
+ 	(function_info::function_info): Initialize it.
+ 	(output_json_intermediate_file): Output {start,end}_column
+ 	fields.
+ 	(read_graph_file): Read end_column.
+ 
+ 2019-03-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/89698
+ 	* fold-const.c (operand_equal_p): For INDIRECT_REF check
+ 	that the access types are similar.
+ 
+ 2019-03-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/89703
+ 	* tree-ssa-strlen.c (valid_builtin_call): Punt if stmt call types
+ 	aren't compatible also with builtin_decl_explicit.  Check pure
+ 	or non-pure status of BUILT_IN_STR{{,N}CMP,N{LEN,{CAT,CPY}{,_CHK}}}
+ 	and BUILT_IN_STPNCPY{,_CHK}.
+ 
+ 2019-03-14  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89523
+ 	* config/i386/i386.c (ix86_print_operand): Handle 'M' to add
+ 	addr32 prefix to VSIB address for X32.
+ 	* config/i386/sse.md (*avx512pf_gatherpf<mode>sf_mask): Prepend
+ 	"%M2" to opcode.
+ 	(*avx512pf_gatherpf<mode>df_mask): Likewise.
+ 	(*avx512pf_scatterpf<mode>sf_mask): Likewise.
+ 	(*avx512pf_scatterpf<mode>df_mask): Likewise.
+ 	(*avx2_gathersi<mode>): Prepend "%M3" to opcode.
+ 	(*avx2_gathersi<mode>_2): Prepend "%M2" to opcode.
+ 	(*avx2_gatherdi<mode>): Prepend "%M3" to opcode.
+ 	(*avx2_gatherdi<mode>_2): Prepend "%M2" to opcode.
+ 	(*avx2_gatherdi<mode>_3): Prepend "%M3" to opcode.
+ 	(*avx2_gatherdi<mode>_4): Prepend "%M2" to opcode.`
+ 	(*avx512f_gathersi<mode>): Prepend "%M4" to opcode.
+ 	(*avx512f_gathersi<mode>_2): Prepend "%M3" to opcode.
+ 	(*avx512f_gatherdi<mode>): Prepend "%M4" to opcode.
+ 	(*avx512f_gatherdi<mode>_2): Prepend "%M3" to opcode.
+ 	(*avx512f_scattersi<mode>): Prepend "%M0" to opcode.
+ 	(*avx512f_scatterdi<mode>): Likewise.
+ 
+ 2019-03-13  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR target/85860
+ 	* lra-constraints.c (inherit_in_ebb): Update
+ 	potential_reload_hard_regs along with live_hard_regs.
+ 
+ 2019-03-13  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR debug/89498
+ 	* dwarf2out.c (size_of_die): For dw_val_class_view_list always use
+ 	DWARF_OFFSET_SIZE.
+ 	(value_format): For dw_val_class_view_list never use DW_FORM_loclistx.
+ 
+ 2019-03-13  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/89662
+ 	* tree-vrp.c (vrp_prop::check_mem_ref): Avoid assuming every type
+ 	has a size.
+ 
+ 2019-03-13  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/89677
+ 	* tree-scalar-evolution.c (simplify_peeled_chrec): Do not
+ 	throw FP expressions at tree-affine.
+ 
+ 2019-03-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-pretty-print.c (dump_generic_node): For -gimple properly
+ 	dump negative integer constants using _Literal (type) -num.
+ 
+ 2019-03-13  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* ipa-param-manipulation.h (struct ipa_parm_adjustment): Remove
+ 	nonlocal_value member.
+ 
+ 	PR middle-end/88588
+ 	* omp-simd-clone.c (ipa_simd_modify_stmt_ops): Handle PHI args.
+ 	(ipa_simd_modify_function_body): Handle PHIs.
+ 
+ 2019-03-12  Robin Dapp  <rdapp@linux.ibm.com>
+ 
+ 	* config/s390/s390.c (s390_option_override_internal): Use more
+ 	aggressive inlining parameters.
+ 
+ 2019-03-12  Robin Dapp  <rdapp@linux.ibm.com>
+ 
+ 	* config/s390/3906.md: New file.
+ 	* config/s390/s390.c (MAX_SCHED_UNITS): Increase.
+ 	(LONGRUNNING_THRESHOLD): Remove.
+ 	(MAX_SCHED_MIX_SCORE): Decrease.
+ 	(MAX_SCHED_MIX_DISTANCE): Decrease.
+ 	(s390_bb_fallthru_entry_likely): Assume fallthru for less than likely.
+ 	(struct s390_sched_state): New struct to hold scheduling state.
+ 	(S390_SCHED_STATE_NORMAL): Remove.
+ 	(S390_SCHED_STATE_CRACKED): Remove.
+ 	(S390_SCHED_ATTR_MASK_GROUPOFTWO): Add.
+ 	(s390_get_sched_attrmask): Use new attribute.
+ 	(s390_get_unit_mask): Use new units.
+ 	(s390_is_fpd): New function.
+ 	(s390_is_fxd): New function.
+ 	(s390_is_longrunning): New function.
+ 	(s390_sched_score): Use new functions.
+ 	(s390_sched_reorder): Likewise.
+ 	(s390_sched_variable_issue): Rework and use new functions.
+ 	(s390_sched_init): Use new functions.
+ 	* config/s390/s390.h (s390_tune_attr): Add z14.
+ 	* config/s390/s390.md: Add z14.
+ 
+ 2019-03-12  Robin Dapp  <rdapp@linux.ibm.com>
+ 
+ 	* config/s390/2964.md: Update pipeline description.
+ 	* config/s390/s390.c (MAX_SCHED_UNITS): Increase.
+ 	(LONGRUNNING_THRESHOLD): Remove.
+ 	(LATENCY_FACTOR): Remove.
+ 	(s390_get_unit_mask): Add unit.
+ 	(s390_sched_score): Use fxd/fpd.
+ 	(s390_sched_variable_issue): Use fxd/fpd.
+ 
+ 2019-03-12  Martin Liska  <mliska@suse.cz>
+ 
+ 	* config/i386/i386.c: Reword an error message.
+ 
+ 2019-03-12  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* cgraph.c (cgraph_node::dump): Dump more info for former thunks,
+ 	terminate with newline.
+ 
+ 2019-03-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/52726
+ 	* config/s390/s390.md (tabort): Use %wd instead of
+ 	HOST_WIDE_INT_PRINT_DEC in error message, reword to avoid two capital
+ 	letters and periods.
+ 	* config/tilepro/tilepro.c (tilepro_print_operand): Use %wd in
+ 	output_operand_lossage instead of HOST_WIDE_INT_PRINT_DEC, replace
+ 	's with %< and %>.
+ 
+ 	PR middle-end/89663
+ 	* builtins.c (expand_builtin_int_roundingfn,
+ 	expand_builtin_int_roundingfn_2): Return NULL_RTX instead of
+ 	gcc_unreachable if validate_arglist fails.
+ 
+ 2019-03-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89664
+ 	* tree-ssa-math-opts.c (execute_cse_reciprocals_1): Properly
+ 	free the occurance tree after the early out.
+ 
+ 2019-03-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/89655
+ 	PR bootstrap/89656
+ 	* vr-values.c (vr_values::update_value_range): If
+ 	old_vr->varying_p (), don't update it, make new_vr also VARYING
+ 	and return false.
+ 
+ 2019-03-11  Martin Liska  <mliska@suse.cz>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_override_options_internal):
+ 	Fix double string quoting.
+ 
+ 2019-03-11  Martin Liska  <mliska@suse.cz>
+ 
+ 	* collect-utils.c (collect_wait): Wrap apostrophes
+ 	in gcc internal format with %'.
+ 	* collect2.c (main): Likewise.
+ 	(scan_prog_file): Likewise.
+ 	(scan_libraries): Likewise.
+ 	* config/i386/i386.c (ix86_expand_call): Likewise.
+ 	(ix86_handle_interrupt_attribute): Likewise.
+ 	* config/nds32/nds32-intrinsic.c (nds32_expand_builtin_impl): Likewise.
+ 	* config/nds32/nds32.c (nds32_insert_attributes): Likewise.
+ 	* config/rl78/rl78.c (rl78_handle_saddr_attribute): Likewise.
+ 	* lto-wrapper.c (find_crtoffloadtable): Likewise.
+ 	* symtab.c (symtab_node::verify_base): Likewise.
+ 	* tree-cfg.c (verify_gimple_label): Likewise.
+ 	* tree.c (verify_type_variant): Likewise.
+ 
+ 2019-03-11  Martin Liska  <mliska@suse.cz>
+ 
+ 	* builtins.c (expand_builtin_thread_pointer): Wrap an option name
+ 	in a string format message and fix GNU coding style.
+ 	(expand_builtin_set_thread_pointer): Likewise.
+ 	* common/config/aarch64/aarch64-common.c
+ 	(aarch64_rewrite_selected_cpu): Likewise.
+ 	* common/config/alpha/alpha-common.c (alpha_handle_option): Likewise.
+ 	* common/config/arc/arc-common.c (arc_handle_option): Likewise.
+ 	* common/config/arm/arm-common.c (arm_parse_fpu_option): Likewise.
+ 	* common/config/bfin/bfin-common.c (bfin_handle_option): Likewise.
+ 	* common/config/i386/i386-common.c (ix86_handle_option): Likewise.
+ 	* common/config/ia64/ia64-common.c (ia64_handle_option): Likewise.
+ 	* common/config/m68k/m68k-common.c (m68k_handle_option): Likewise.
+ 	* common/config/msp430/msp430-common.c (msp430_handle_option): Likewise.
+ 	* common/config/nds32/nds32-common.c (nds32_handle_option): Likewise.
+ 	* common/config/powerpcspe/powerpcspe-common.c (rs6000_handle_option):
+ 	Likewise.
+ 	* common/config/riscv/riscv-common.c
+ 	(riscv_subset_list::parsing_subset_version): Likewise.
+ 	(riscv_subset_list::parse_std_ext): Likewise.
+ 	(riscv_subset_list::parse_sv_or_non_std_ext): Likewise.
+ 	(riscv_subset_list::parse): Likewise.
+ 	* common/config/rs6000/rs6000-common.c (rs6000_handle_option): Likewise.
+ 	* config/aarch64/aarch64.c (aarch64_parse_one_option_token): Likewise.
+ 	(aarch64_override_options_internal): Likewise.
+ 	(aarch64_validate_mcpu): Likewise.
+ 	(aarch64_validate_march): Likewise.
+ 	(aarch64_validate_mtune): Likewise.
+ 	(aarch64_override_options): Likewise.
+ 	* config/alpha/alpha.c (alpha_option_override): Likewise.
+ 	* config/arc/arc.c (arc_init): Likewise.
+ 	(parse_mrgf_banked_regs_option): Likewise.
+ 	(arc_override_options): Likewise.
+ 	(arc_expand_builtin_aligned): Likewise.
+ 	* config/arm/arm-builtins.c (arm_expand_neon_builtin): Likewise.
+ 	(arm_expand_builtin): Likewise.
+ 	* config/arm/arm.c (arm_option_check_internal): Likewise.
+ 	(arm_configure_build_target): Likewise.
+ 	(arm_option_override): Likewise.
+ 	(arm_options_perform_arch_sanity_checks): Likewise.
+ 	(arm_handle_cmse_nonsecure_entry): Likewise.
+ 	(arm_handle_cmse_nonsecure_call): Likewise.
+ 	(arm_tls_referenced_p): Likewise.
+ 	(thumb1_expand_prologue): Likewise.
+ 	* config/avr/avr.c (avr_option_override): Likewise.
+ 	* config/bfin/bfin.c (bfin_option_override): Likewise.
+ 	* config/c6x/c6x.c (c6x_option_override): Likewise.
+ 	* config/cr16/cr16.c (cr16_override_options): Likewise.
+ 	* config/cris/cris.c (cris_option_override): Likewise.
+ 	* config/csky/csky.c (csky_handle_isr_attribute): Likewise.
+ 	* config/darwin-c.c (macosx_version_as_macro): Likewise.
+ 	* config/darwin.c (darwin_override_options): Likewise.
+ 	* config/frv/frv.c (frv_expand_builtin): Likewise.
+ 	* config/h8300/h8300.c (h8300_option_override): Likewise.
+ 	* config/i386/i386.c (parse_mtune_ctrl_str): Likewise.
+ 	(ix86_option_override_internal): Likewise.
+ 	(warn_once_call_ms2sysv_xlogues): Likewise.
+ 	(ix86_expand_prologue): Likewise.
+ 	(split_stack_prologue_scratch_regno): Likewise.
+ 	(ix86_warn_parameter_passing_abi): Likewise.
+ 	* config/ia64/ia64.c (fix_range): Likewise.
+ 	* config/m68k/m68k.c (m68k_option_override): Likewise.
+ 	* config/microblaze/microblaze.c (microblaze_option_override): Likewise.
+ 	* config/mips/mips.c (mips_emit_probe_stack_range): Likewise.
+ 	(mips_set_compression_mode): Likewise.
+ 	* config/mmix/mmix.c (mmix_option_override): Likewise.
+ 	* config/mn10300/mn10300.c (mn10300_option_override): Likewise.
+ 	* config/msp430/msp430.c (msp430_option_override): Likewise.
+ 	* config/nds32/nds32.c (nds32_option_override): Likewise.
+ 	* config/nios2/nios2.c (nios2_custom_check_insns): Likewise.
+ 	(nios2_option_override): Likewise.
+ 	(nios2_expand_custom_builtin): Likewise.
+ 	* config/nvptx/mkoffload.c (main): Likewise.
+ 	* config/nvptx/nvptx.c (diagnose_openacc_conflict): Likewise.
+ 	* config/pa/pa.c (fix_range): Likewise.
+ 	(pa_option_override): Likewise.
+ 	* config/riscv/riscv.c (riscv_parse_cpu): Likewise.
+ 	(riscv_option_override): Likewise.
+ 	* config/rl78/rl78.c (rl78_option_override): Likewise.
+ 	* config/rs6000/aix61.h: Likewise.
+ 	* config/rs6000/aix71.h: Likewise.
+ 	* config/rs6000/aix72.h: Likewise.
+ 	* config/rs6000/driver-rs6000.c (elf_platform): Likewise.
+ 	* config/rs6000/freebsd64.h: Likewise.
+ 	* config/rs6000/linux64.h: Likewise.
+ 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
+ 	(rs6000_expand_zeroop_builtin): Likewise.
+ 	(rs6000_expand_mtfsb_builtin): Likewise.
+ 	(rs6000_expand_set_fpscr_rn_builtin): Likewise.
+ 	(rs6000_expand_set_fpscr_drn_builtin): Likewise.
+ 	(rs6000_invalid_builtin): Likewise.
+ 	(rs6000_expand_split_stack_prologue): Likewise.
+ 	* config/rs6000/rtems.h: Likewise.
+ 	* config/rx/rx.c (valid_psw_flag): Likewise.
+ 	(rx_expand_builtin): Likewise.
+ 	* config/s390/s390-c.c (s390_resolve_overloaded_builtin): Likewise.
+ 	* config/s390/s390.c (s390_expand_builtin): Likewise.
+ 	(s390_function_profiler): Likewise.
+ 	(s390_option_override_internal): Likewise.
+ 	(s390_option_override): Likewise.
+ 	* config/sh/sh.c (sh_option_override): Likewise.
+ 	(sh_builtin_saveregs): Likewise.
+ 	(sh_fix_range): Likewise.
+ 	* config/sh/vxworks.h: Likewise.
+ 	* config/sparc/sparc.c (sparc_option_override): Likewise.
+ 	* config/spu/spu.c (spu_option_override): Likewise.
+ 	(fix_range): Likewise.
+ 	* config/visium/visium.c (visium_option_override): Likewise.
+ 	(visium_handle_interrupt_attr): Likewise.
+ 	* config/xtensa/xtensa.c (xtensa_option_override): Likewise.
+ 	* dbgcnt.c (dbg_cnt_set_limit_by_name): Likewise.
+ 	(dbg_cnt_process_opt): Likewise.
+ 	* dwarf2out.c (output_dwarf_version): Likewise.
+ 	* except.c (expand_eh_return): Likewise.
+ 	* gcc.c (defined): Likewise.
+ 	(driver_handle_option): Likewise.
+ 	(process_command): Likewise.
+ 	(compare_files): Likewise.
+ 	(driver::prepare_infiles): Likewise.
+ 	(driver::do_spec_on_infiles): Likewise.
+ 	(driver::maybe_run_linker): Likewise.
+ 	* omp-offload.c (oacc_parse_default_dims): Likewise.
+ 	* opts-global.c (handle_common_deferred_options): Likewise.
+ 	* opts.c (parse_sanitizer_options): Likewise.
+ 	(common_handle_option): Likewise.
+ 	(enable_warning_as_error): Likewise.
+ 	* passes.c (enable_disable_pass): Likewise.
+ 	* plugin.c (parse_plugin_arg_opt): Likewise.
+ 	(default_plugin_dir_name): Likewise.
+ 	* targhooks.c (default_expand_builtin_saveregs): Likewise.
+ 	(default_pch_valid_p): Likewise.
+ 	* toplev.c (init_asm_output): Likewise.
+ 	(process_options): Likewise.
+ 	(toplev::run_self_tests): Likewise.
+ 	* tree-cfg.c (verify_gimple_call): Likewise.
+ 	* tree-inline.c (inline_forbidden_p_stmt): Likewise.
+ 	(tree_inlinable_function_p): Likewise.
+ 	* var-tracking.c (vt_find_locations): Likewise.
+ 
+ 2019-03-11  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390.c (s390_expand_builtin): Do the copy_to_reg not
+ 	only on the else branch.
+ 
+ 2019-03-11  Martin Liska  <mliska@suse.cz>
+ 
+ 	* gcov.c (output_intermediate_json_line): Print function
+ 	name of each line.
+ 	(output_json_intermediate_file): Add new argument.
+ 	* doc/gcov.texi: Document the change.
+ 
+ 2019-03-11  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR rtl-optimization/89588
+ 	* loop-unroll.c (decide_unroll_constant_iterations): Make guard for
+ 	explicit unrolling factor more robust.
+ 
+ 2019-03-11  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89649
+ 	* tree-vectorizer.h (vect_loop_versioning): Adjust prototype.
+ 	* tree-vect-loop-manip.c (vect_do_peeling): Unset force_vectorize
+ 	on the prolog and epilog loops.
+ 	(vect_loop_versioning): Return copy of loop.
+ 	* tree-vect-loop.c (vect_transform_loop): Unset force_vectorize
+ 	on the non-vectorized version of the loop.
+ 
+ 2019-03-10  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/68924
+ 	* config/i386/sse.md (*vec_extractv2di_0_sse):
+ 	Add (=r,x) alternative and corresponding splitter.
+ 
+ 2019-03-10  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR tree-optimization/85762
+ 	PR tree-optimization/87008
+ 	PR tree-optimization/85459
+ 	* tree-sra.c (contains_vce_or_bfcref_p): New parameter, set the bool
+ 	it points to if there is a type changing MEM_REF.  Adjust all callers.
+ 	(build_accesses_from_assign): Disable total scalarization if
+ 	contains_vce_or_bfcref_p returns true through the new parameter, for
+ 	both rhs and lhs.
+ 
+ 2019-03-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/88568
+ 	* attribs.c (handle_dll_attribute): Don't clear TREE_STATIC for
+ 	dllimport on VAR_DECLs with RECORD_TYPE or UNION_TYPE DECL_CONTEXT.
+ 
+ 	PR target/79645
+ 	* common.opt (fdiagnostics-show-labels,
+ 	fdiagnostics-show-line-numbers, fdiagnostics-format=,
+ 	fdiagnostics-minimum-margin-width=, fgnat-encodings=, gas-loc-support,
+ 	gas-locview-support, ginline-points, ginternal-reset-location-views):
+ 	Terminate description text with a dot.
+ 	* config/microblaze/microblaze.opt (mxl-prefetch): Likewise.
+ 	* config/mcore/mcore.opt (m210, m340): Likewise.
+ 	* config/epiphany/epiphany.opt (mprefer-short-insn-regs, mcmove,
+ 	mnops=): Start description text with a capital letter.
+ 	* config/arc/arc.opt (msize-level=): Likewise.
+ 	* config/sh/sh.opt (minline-ic_invalidate): Likewise.
+ 	* config/rs6000/sysv4.opt (mno-toc, mtoc, mno-traceback, mshlib,
+ 	mnewlib): Likewise.
+ 	* config/ft32/ft32.opt (msim): Likewise.
+ 	(mft32b, mcompress): Likewise.  Terminate description text with a dot.
+ 	(mnodiv, mnopm): Terminate description text with a dot.
+ 	* config/c6x/c6x.opt (c6x_sdata): Terminate Enum description with
+ 	a colon.
+ 	* config/i386/i386.opt (prefer_vector_width, instrument_return):
+ 	Likewise.
+ 	* config/rx/rx.opt (nofpu): Remove trailing spaces from description
+ 	text.
+ 
+ 	PR rtl-optimization/89634
+ 	* cfgcleanup.c (thread_jump): Punt if registers mentioned in cond1
+ 	are modified in BB_END (e->src) instruction.
+ 
+ 2019-03-08  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR target/79926
+ 	* config/i386/i386.c (ix86_set_current_function): Make "sorry"
+ 	messages more amenable to translation, and improve wording.
+ 
+ 2019-03-08  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-p8swap.c (rs6000_analyze_swaps): Rebuild
+ 	ud- and du-chains between phases.
+ 
+ 2019-03-08  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR debug/89631
+ 	* dwarf2cfi.c (dwarf2out_frame_debug_expr): Use CONST_POLY_INT
+ 	instead of POLY_INT_CST.
+ 
+ 2019-03-08  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	* config/arm/arm.h (TARGET_FP16_TO_DOUBLE): Add TARGET_VFP_DOUBLE
+ 	requirement.
+ 
+ 2019-03-08  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/68924
+ 	PR target/78782
+ 	PR target/87558
+ 	* config/i386/emmintrin.h (_mm_loadu_si64): New intrinsic.
+ 	(_mm_storeu_si64): Ditto.
+ 
+ 2019-03-08  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR target/86952
+ 	* config/i386/i386.c (ix86_option_override_internal): Disable
+ 	jump tables when retpolines are used.
+ 
+ 2019-03-08  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR go/63560
+ 	* ipa-split.c (execute_split_functions): Do not split
+ 	'noinline' or 'section' function.
+ 
+ 2019-03-08  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/79846
+ 	* config/s390/s390.c (s390_const_operand_ok): Use %wu instead of
+ 	HOST_WIDE_INT_PRINT_UNSIGNED and %wd instead of
+ 	HOST_WIDE_INT_PRINT_DEC.  Formatting fixes.
+ 
+ 	PR ipa/80000
+ 	* ipa-devirt.c (compare_virtual_tables): Remove two trailing spaces
+ 	from diagnostics.  Formatting fixes.
+ 
+ 	PR target/85665
+ 	* ipa-devirt.c (odr_types_equivalent_p): Fix grammar in
+ 	warn_odr diagnostics.
+ 
+ 	PR other/80058
+ 	* lra-constraints.c (process_alt_operands): Avoid one space before
+ 	" at the end of line and another after " on another line in a string
+ 	literal.
+ 	* attribs.c (handle_dll_attribute): Likewise.
+ 	* config/avr/avr-devices.c (avr_texinfo): Likewise.
+ 
+ 	* gimple-ssa-warn-alloca.c (pass_walloca::execute): Don't wrap
+ 	warning_at or inform messages in G_() if there is no ?:.
+ 
+ 	PR tree-optimization/89550
+ 	* builtins.c (c_strlen): Only set TREE_NO_WARNING if warning_at
+ 	returned true.  Formatting fixes.
+ 	(expand_builtin_strnlen): Formatting fixes.
+ 	* tree-vrp.c (vrp_prop::check_mem_ref): Only set TREE_NO_WARNING
+ 	if warning_at returned true.
+ 	* tree-cfg.c (pass_warn_function_return::execute): Likewise.
+ 
+ 2019-03-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/89578
+ 	* cfgloop.h (struct loop): Add owned_clique field.
+ 	* cfgloopmanip.c (copy_loop_info): Copy it.
+ 	* tree-cfg.c (gimple_duplicate_bb): Do not remap owned_clique
+ 	cliques.
+ 	* tree-inline.c (copy_loops): Remap owned_clique.
+ 	* lto-streamer-in.c (input_cfg): Stream owned_clique.
+ 	* lto-streamer-out.c (output_cfg): Likewise.
+ 
+ 2019-03-08  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/80190
+ 	* config/darwin.c: Include intl.h.
+ 	(darwin_build_constant_cfstring): Improve i18n of diagnostics by not
+ 	composing the message out of two separate parts.
+ 
+ 2019-03-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/80003
+ 	* config/i386/i386.c (ix86_set_func_type): Make sure diagnostics
+ 	doesn't start with a capital letter and doesn't end with a dot.
+ 	(ix86_function_arg_boundary): Make sure diagnostics doesn't start
+ 	with a capital letter.
+ 	(ix86_mangle_function_version_assembler_name): Likewise.
+ 	(ix86_generate_version_dispatcher_body): Likewise.
+ 	(fold_builtin_cpu): Likewise.
+ 	(get_builtin_code_for_version): Likewise.  Remove extraneous space.
+ 	(ix86_handle_interrupt_attribute): Make the diagnostics easier for
+ 	translators, wrap full type name in %qs.
+ 
+ 	PR translation/79999
+ 	* gimplify.c (gimplify_omp_ordered): Reword diagnostics to talk about
+ 	depend clause with source (or sink) modifier.
+ 	* omp-expand.c (expand_omp_ordered_sink): Likewise.
+ 
+ 	PR target/89602
+ 	* config/i386/sse.md (avx512f_mov<ssescalarmodelower>_mask,
+ 	*avx512f_load<mode>_mask, avx512f_store<mode>_mask): New define_insns.
+ 	(avx512f_load<mode>_mask): New define_expand.
+ 	* config/i386/i386-builtin.def (__builtin_ia32_loadsd_mask,
+ 	__builtin_ia32_loadss_mask, __builtin_ia32_storesd_mask,
+ 	__builtin_ia32_storess_mask, __builtin_ia32_movesd_mask,
+ 	__builtin_ia32_movess_mask): New builtins.
+ 	* config/i386/avx512fintrin.h (_mm_mask_load_ss, _mm_maskz_load_ss,
+ 	_mm_mask_load_sd, _mm_maskz_load_sd, _mm_mask_move_ss,
+ 	_mm_maskz_move_ss, _mm_mask_move_sd, _mm_maskz_move_sd,
+ 	_mm_mask_store_ss, _mm_mask_store_sd): New intrinsics.
+ 
+ 2019-03-07  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR lto/87525
+ 	* ipa-cp.c (perform_estimation_of_a_value): Account zero time benefit
+ 	for extern inline functions.
+ 
+ 2019-03-07  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/88235
+ 	* cgraph.h (cgraph_node): New inline method former_thunk_p.
+ 	* cgraph.c (cgraph_node::dump): Dump a note if node is a former thunk.
+ 	(clone_of_p): Treat expanded thunks like thunks, be optimistic if they
+ 	have multiple callees.  At the end check if declarations match as
+ 	opposed to cgraph_nodes.
+ 
+ 2019-03-07  Martin Liska  <mliska@suse.cz>
+ 
+ 	* cgraph.c (cgraph_node::verify_node): Verify with a neighbour
+ 	which is equivalent to searching for this in clones chain.
+ 	* symtab.c (symtab_node::verify_base): Similarly compare ASM
+ 	names with a neighbour and special case first node in a chain.
+ 
+ 2019-01-25  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/80916 - spurious "static but not defined" warning.
+ 	* gimple-fold.c (can_refer_decl_in_current_unit_p): Return false
+ 	for an internal symbol with DECL_EXTERNAL.
+ 
+ 2019-04-07  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/89618
+ 	* cfgloopmanip.c (copy_loop_info): Copy forgotten fields.
+ 	* tree-inline.c (copy_loops): Simplify.
+ 
+ 2019-03-07  Martin Liska  <mliska@suse.cz>
+ 
+ 	* dwarf2out.c (add_AT_vms_delta): Revert function removal.
+ 
+ 2019-03-07  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89595
+ 	* tree-ssa-dom.c (dom_opt_dom_walker::optimize_stmt): Take
+ 	stmt iterator as reference, take boolean output parameter to
+ 	indicate whether the stmt was removed and thus the iterator
+ 	already advanced.
+ 	(dom_opt_dom_walker::before_dom_children): Re-iterate over
+ 	stmts created by folding.
+ 
+ 2019-03-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/89585
+ 	* doc/extend.texi (Basic Asm): Document qualifiers are not allowed
+ 	at toplevel.
+ 
+ 2019-03-06  Peter Bergner  <bergner@linux.ibm.com>
+ 
+ 	PR rtl-optimization/88845
+ 	* config/rs6000/rs6000.c (rs6000_emit_move_si_sf_subreg): Enable during
+ 	LRA.
+ 	* lra.c (remove_scratches_1): New function.
+ 	(remove_scratches): Use it.
+ 	(lra_emit_move): Likewise.
+ 
+ 2019-03-06  Claudiu Zissulescu  <claziss@synopsys.com>
+ 
+ 	* config/arc/arc-c.def (__ARC_UNALIGNED__): Set it on
+ 	unaligned_access variable.
+ 	* config/arc/arc.c (arc_override_options): Set unaligned access
+ 	default on for HS CPUs.
+ 	* config/arc/arc.h (STRICT_ALIGNMENT): Fix logic.
+ 
+ 2019-03-06  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR gcov-profile/89577
+ 	* doc/gcov.texi: Prefer to use --coverage.
+ 	* doc/sourcebuild.texi: Likewise.
+ 
+ 2019-03-02  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/86485 - -Wmaybe-unused with empty class ?:
+ 	* gimplify.c (gimplify_cond_expr): Use INIT_EXPR.
+ 
+ 2019-03-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89587
+ 	* config/rs6000/t-linux (MULTIARCH_DIRNAME): Set to non-empty only
+ 	if_multiarch.
+ 
+ 	PR middle-end/89590
+ 	* builtins.c (maybe_emit_free_warning): Punt if free doesn't have
+ 	exactly one argument.
+ 
+ 2019-03-05  Jakub Jelinek  <jakub@redhat.com>
+ 	    Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/89570
+ 	* match.pd (vec_cond into cond_op simplification): Don't use
+ 	get_conditional_internal_fn, use as_internal_fn (cond_op).
+ 
+ 2019-03-05  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	PR target/89222
+ 	* config/arm/arm.md (movsi): Use targetm.cannot_force_const_mem
+ 	to decide when to split off a non-zero offset from a symbol.
+ 	* config/arm/arm.c (arm_cannot_force_const_mem): Disallow offsets
+ 	in function symbols.
+ 
+ 2019-03-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89594
+ 	* tree-if-conv.c (pass_if_conversion::execute): Handle
+ 	case where .LOOP_VECTORIZED_FUNCTION was removed.
+ 
+ 2019-03-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR bootstrap/89560
+ 	* fold-const.c (fold_checksum_tree): Don't use fixed size buffer,
+ 	instead alloca it only when needed with the needed size.
+ 
+ 	PR tree-optimization/89570
+ 	* match.pd (vec_cond into cond_op simplification): Guard with
+ 	vectorized_internal_fn_supported_p test and #if GIMPLE.
+ 
+ 	PR tree-optimization/89566
+ 	* gimple-ssa-sprintf.c (sprintf_dom_walker::handle_gimple_call):
+ 	Set info.fncode to BUILT_IN_NONE if gimple_call_builtin_p failed.
+ 	Punt if get_user_idx_format succeeds, but idx_format argument is
+ 	not provided or doesn't have pointer type, or if idx_args is above
+ 	number of provided arguments.
+ 
+ 2019-03-04  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	PR tree-optimization/89437
+ 	* match.pd: Use lt in sin(atan(x)) and cos(atan(x)) simplifications.
+ 
+ 2019-03-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/89572
+ 	* tree-scalar-evolution.c: (get_loop_exit_condition): Use
+ 	safe_dyn_cast.
+ 
+ 2019-03-04  Bin Cheng  <bin.cheng@linux.alibaba.com>
+ 
+ 	PR tree-optimization/89487
+ 	* tree-loop-distribution.c (has_nonaddressable_dataref_p): New.
+ 	(create_rdg_vertices): Compute has_nonaddressable_dataref_p.
+ 	(distribute_loop): Don't do runtime alias check if there is non-
+ 	addressable data reference.
+ 	* tree-ssa-loop-ivopts.c (may_be_nonaddressable_p): Check if VAR_DECL
+ 	is a register variable.
+ 
+ 2019-03-02  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89506
+ 	* config/arm/arm.md (cmpsi2_addneg): Use
+ 	trunc_int_for_mode (-INTVAL (...), SImode) instead of -INTVAL (...).
+ 	If operands[2] is 0 or INT_MIN, force use of subs.
+ 	(*compare_scc splitter): Use gen_int_mode.
+ 	(*negscc): Likewise.
+ 	* config/arm/thumb2.md (*thumb2_negscc): Likewise.
+ 
+ 2019-03-01  Kito Cheng  <kito.cheng@gmail.com>
+ 	    Monk Chiang  <sh.chiang04@gmail.com>
+ 
+ 	* common/config/riscv/riscv-common.c: Include sstream.
+ 	(riscv_subset_list::to_string): New.
+ 	(riscv_arch_str): Likewise.
+ 	* config.gcc (riscv*-*-*): Handle --with-riscv-attribute=
+ 	* config.in: Regen.
+ 	* config/riscv/riscv-protos.h (riscv_arch_str): New.
+ 	* config/riscv/riscv.c (INCLUDE_STRING): Defined.
+ 	(riscv_emit_attribute): New.
+ 	(riscv_file_start): Emit attribute if needed.
+ 	(riscv_option_override): Init riscv_emit_attribute_p.
+ 	* config/riscv/riscv.opt (mriscv-attribute): New option.
+ 	* configure.ac (riscv*-*-*): Check binutils is supporting ELF
+ 	* configure: Regen.
+ 	* doc/install.texi: Document --with-riscv-attribute.
+ 	* doc/invoke.texi: Document -mriscv-attribute.
+ 
+ 	* common/config/riscv/riscv-common.c:
+ 	Include config/riscv/riscv-protos.h.
+ 	(INCLUDE_STRING): Defined.
+ 	(RISCV_DONT_CARE_VERSION): Defined.
+ 	(riscv_subset_t): Declare.
+ 	(riscv_subset_t::riscv_subset_t): New.
+ 	(riscv_subset_list): Declare.
+ 	(riscv_subset_list::riscv_subset_list): New.
+ 	(riscv_subset_list::~riscv_subset_list): Likewise.
+ 	(riscv_subset_list::parsing_subset_version): Likewise.
+ 	(riscv_subset_list::parse_std_ext): Likewise.
+ 	(riscv_subset_list::parse_sv_or_non_std_ext): Likewise.
+ 	(riscv_subset_list::add): Likewise.
+ 	(riscv_subset_list::lookup): Likewise.
+ 	(riscv_subset_list::xlen): Likewise.
+ 	(riscv_subset_list::parse): Likewise.
+ 	(riscv_supported_std_ext): Likewise.
+ 	(current_subset_list): Likewise.
+ 	(riscv_parse_arch_string): Using riscv_subset_list::parse to
+ 	parse.
+ 
+ 2019-03-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_option_override_internal): If
+ 	rs6000_dejagnu_cpu_index is set, use that to override rs6000_cpu_index.
+ 	* config/rs6000/rs6000.opt (mdejagnu-cpu=): New option.
+ 
+ 2019-03-01  Alexander Monakov  <amonakov@ispras.ru>
+ 
+ 	PR rtl-optimization/85899
+ 	* haifa-sched.c (find_fallthru_edge_from): Relax assert to account for
+ 	fallthru edges leading to the exit block.
+ 
+ 2019-03-01  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	PR target/89517
+ 	* config/aarch64/aarch64-option-extensions.def (fp, simd, crypto, fp16,
+ 	rdma, dotprod, sha2, sha3, sm4, fp16fml, sve): Collapse line.
+ 
+ 2019-03-01  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/89535
+ 	* tree-vect-stmts.c (vectorizable_call): Record the vector types
+ 	for each operand.  Calculate the fallback choice for mask operands
+ 	and pass it to vect_get_vec_def_for_operand.
+ 
+ 2019-03-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/89541
+ 	* tree-ssa-operands.c (add_stmt_operand): CONST_DECL may
+ 	get virtual operands.
+ 	(get_expr_operands): Handle CONST_DECL like other decls.
+ 
+ 2019-03-01  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/89503
+ 	* fold-const.c (fold_checksum_tree): Ignore TREE_NO_WARNING bit
+ 	on DECL_P and EXPR_P.
+ 
+ 2019-03-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/89497
+ 	* tree-cfgcleanup.h (cleanup_tree_cfg): Add SSA update flags
+ 	argument, defaulted to zero.
+ 	* passes.c (execute_function_todo): Pass down SSA update flags
+ 	to cleanup_tree_cfg.
+ 	* tree-cfgcleanup.c: Include tree-into-ssa.h and tree-cfgcleanup.h.
+ 	(cleanup_tree_cfg_noloop): After cleanup_control_flow_pre update SSA
+ 	form if requested.
+ 	(cleanup_tree_cfg): Get and pass down SSA update flags.
+ 
+ 2019-03-01  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR bootstrap/89539
+ 	* dwarf2out.c (output_comdat_type_unit): Add ATTRIBUTE_UNUSED to
+ 	early_lto_debug argument.
+ 
+ 2019-02-28  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR tree-optimization/89536
+ 	* tree-ssa-dom.c (edge_info::derive_equivalences) <BIT_NOT_EXPR>: Test
+ 	only whether bit #0 of the value is 0 instead of the entire value.
+ 
+ 2019-02-28  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/87068 - missing diagnostic with fallthrough statement.
+ 	* gimplify.c (expand_FALLTHROUGH_r): If IFN_FALLTHROUGH was found
+ 	at the end of a seq, save its location to walk_stmt_info.
+ 	(expand_FALLTHROUGH): Warn if IFN_FALLTHROUGH is at the end of
+ 	a switch.
+ 
+ 2019-02-28  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR lto/88585
+ 	* tree.c (find_atomic_core_type): Move ahead in file.
+ 	(check_base_type): Correctly compare alignments of atomic types.
+ 
+ 2019-02-28  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89455
+ 	* config/i386/i386.c (get_builtin_code_for_version): Identify
+ 	Westmere from PCLMUL, instead of AES.
+ 
+ 2019-02-28  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89434
+ 	* config/arm/arm.md (*subsi3_carryin_compare_const): Use
+ 	trunc_int_for_mode (-INTVAL (...), SImode), just instead of
+ 	-UINTVAL (...).
+ 
+ 2019-02-28  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	PR target/88530
+ 	* config/aarch64/aarch64-option-extensions.def: Document it.
+ 	* config/aarch64/driver-aarch64.c (host_detect_local_cpu): Skip feature
+ 	if empty hwcaps.
+ 
+ 2019-02-28  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/89520
+ 	* convert.c (convert_to_real_1, convert_to_integer_1): Punt for
+ 	builtins if they don't have a single scalar floating point argument.
+ 	Formatting fixes.
+ 
+ 2019-02-27  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	PR rtl-optimization/89490
+ 	* varasm.c (get_block_for_section): Bail out for mergeable sections.
+ 	(default_use_anchors_for_symbol_p, output_object_block): Assert the
+ 	block section is not mergeable.
+ 
+ 2019-02-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/70341
+ 	* config/arm/arm.md (arm_casesi_internal): New define_expand.  Rename
+ 	old define_insn to ...
+ 	(*arm_casesi_internal): ... this.  Add mode to LABEL_REFs.
+ 	* config/arm/thumb2.md (thumb2_casesi_internal): New define_expand.
+ 	Rename old define_insn to ...
+ 	(*thumb2_casesi_internal): ... this.  Add mode to LABEL_REFs.
+ 	(thumb2_casesi_internal_pic): New define_expand.  Rename old
+ 	define_insn to ...
+ 	(*thumb2_casesi_internal_pic): ... this.  Add mode to LABEL_REFs.
+ 	* config/aarch64/aarch64.md (casesi): Create the casesi_dispatch
+ 	MEM manually here, set MEM_READONLY_P and MEM_NOTRAP_P on it.
+ 
+ 2019-02-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/88878
+ 	* dwarf2out.c (use_debug_types): Disable when in_lto_p.
+ 
+ 2019-02-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	* passes.c (should_skip_pass_p): Do not skip cgraph-edge
+ 	building.
+ 
+ 2019-02-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/88878
+ 	* dwarf2out.c (output_comdat_type_unit): Add early_lto_debug
+ 	parameter, prefix section name with .gnu.debuglto_ if true.
+ 	(dwarf2out_finish): Pass false to output_comdat_type_unit.
+ 	(dwarf2out_early_finish): Pass true to output_comdat_type_unit.
+ 
+ 2019-02-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/89514
+ 	* dwarf2out.c (size_of_die): Key on AT_ref (a)->comdat_type_p
+ 	rather than on use_debug_types, doing what output_die does.
+ 	(value_format): Likewise.
+ 
+ 2019-02-27  Martin Jambor  <mjambor@suse.cz>
+ 	    Martin Sebor  <msebor@redhat.com>
+ 
+ 	* doc/invoke.texi (Warning Options): Reword description of
+ 	-Wno-absolute-value.
+ 
+ 2019-02-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/89280
+ 	* tree-cfgcleanup.c (maybe_dead_abnormal_edge_p,
+ 	builtin_setjmp_setup_bb): New functions.
+ 	(cleanup_control_flow_pre): Ignore maybe_dead_abnormal_edge_p edges.
+ 	When visiting __builtin_setjmp_setup block, queue in special
+ 	setjmp_vec vector edges from .ABNORMAL_DISPATCHER to corresponding
+ 	__builtin_setjmp_receiver.  Remove .ABNORMAL_DISPATCHER basic blocks
+ 	from visited after the loop if they don't have any visited successor
+ 	blocks.
+ 
+ 2018-02-26  Steve Ellcey  <sellcey@marvell.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_get_multilib_abi_name):
+ 	New function.
+ 	(TARGET_GET_MULTILIB_ABI_NAME): New macro.
+ 
+ 2019-02-26  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/89507
+ 	* tree.c (valid_constant_size_p): Deal with size INTEGER_CSTs
+ 	with types other than sizetype/ssizetype.
+ 
+ 2019-02-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* config/sparc/sparc-opts.h (enum processor_type): Rename to...
+ 	(enum sparc_processor_type): ...this.
+ 	(enum sparc_code_model_type): New enumeration type.
+ 	(enum sparc_memory_model_type): Tweak comments.
+ 	* config/sparc/sparc.opt (mcpu): Adjust to above renaming.
+ 	(mtune): Likewise.
+ 	(mcmodel): Use sparc_code_model enumeration and variable.
+ 	(sparc_code_model): New enumeration.
+ 	(mdebug): Add Undocumented marker.
+ 	* config/sparc/sparc.h (enum cmodel): Delete.
+ 	(sparc_cmodel): Likewise.
+ 	(TARGET_CM_MEDLOW): Adjust to above renaming.
+ 	(TARGET_CM_MEDMID): Likewise.
+ 	(TARGET_CM_MEDANY): Likewise.
+ 	(TARGET_CM_EMBMEDANY): Likewise.
+ 	* config/sparc/sparc.c (sparc_cmodel): Delete.
+ 	(sparc_option_override): Remove string/value mapping support for the
+ 	code model.  Move code and memory model support to after the handling
+ 	of target flags.  Do private machine setup last.
+ 	(sparc_emit_set_symbolic_const64): Use sparc_code_model.
+ 	(sparc_legitimize_reload_address): Likewise.
+ 	(sparc_output_mi_thunk): Likewise.
+ 	* config/sparc/sparc.md (cpu): Adjust comment to above renaming.
+ 
+ 2019-02-26  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/89500
+ 	* tree-ssa-strlen.c (stridx_strlenloc): Adjust comment.
+ 	(handle_builtin_strlen): Remove noncst_bound variable.  Always
+ 	optimize strnlen (x, 0) to 0.  Optimize strnlen (x, cst) to
+ 	cst if the first cst bytes starting at x are known to be non-zero,
+ 	even if the string is not zero terminated.  Don't try to modify
+ 	*si for strnlen.  Update strlen_to_stridx only for strlen or if
+ 	we can prove strnlen returns the same value as strlen would.
+ 
+ 2019-02-26  Martin Liska  <mliska@suse.cz>
+ 
+ 	* alloc-pool.h (struct pool_usage): Remove extra
+ 	print_dash_line.
+ 	* bitmap.h (struct bitmap_usage): Likewise.
+ 	* ggc-common.c (struct ggc_usage): Likewise.
+ 	* mem-stats.h (struct mem_usage): Likewise.
+ 	(mem_alloc_description::dump): Print dash lines
+ 	here and repeat header at the end of a table report.
+ 	It's then more readable.
+ 	* tree-phinodes.c (phinodes_print_statistics): Make
+ 	horizontal alignment.
+ 	* tree-ssanames.c (ssanames_print_statistics): Likewise.
+ 	* vec.c (struct vec_usage): Remove extra print_dash_line.
+ 	* vec.h (vec_safe_grow_cleared): Pass PASS_MEM_STAT.
+ 
+ 2019-02-26  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* doc/extend.texi (__builtin_object_size):
+ 	Use @pxref instead of @xref inside parenthesis.
+ 	(__builtin_has_attribute): Add missing comma after @xref.
+ 	(__builtin_object_size): Ditto.
+ 	* doc/md.texi (cond_*{mode}): Use @samp instead of @var around op1[i].
+ 
+ 2019-02-26  Jeff Law  <law@redhat.com>
+ 
+ 	PR rtl-optimization/87761
+ 	* regcprop.c (copyprop_hardreg_forward_1): Use REG_UNUSED notes to
+ 	detect obviously dead insns and delete them.
+ 
+ 2019-02-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89505
+ 	* tree-ssa-structalias.c (compute_dependence_clique): Make sure
+ 	to handle restrict pointed-to vars with multiple subvars
+ 	correctly.
+ 
+ 2019-02-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89489
+ 	* tree-parloops.c (create_loop_fn): Copy over last_clique.
+ 
+ 2019-02-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* tree-ssa-dom.c (edge_info::derive_equivalences) <BIT_IOR_EXPR>: Fix
+ 	and move around comment.
+ 	<BIT_AND_EXPR>: Likewise.
+ 	<BIT_NOT_EXPR>: Add specific handling for boolean types.
+ 
+ 2019-02-26  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89474
+ 	* config/i386/i386.c (remove_partial_avx_dependency): Call
+ 	df_analyze etc. before creation of the v4sf_const0 pseudo, rather than
+ 	after changing possibly many instructions to use that pseudo.  Fix up
+ 	insertion of v4sf_const0 setter at the start of bb.
+ 
+ 2019-02-25  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	PR c/80409
+ 	* doc/extend.texi (Variadic Pointer Args): New section.
+ 
+ 2019-02-25  Sandra Loosemore  <sandra@codesourcery.com>
+ 	    Martin Sebor  <msebor@gmail.com>
+ 
+ 	* common.opt (Wattribute-alias): Likewise.
+ 	* doc/invoke.texi (Option Summary): List general form of
+ 	-Wattribute-alias=.  List positive form of -Wmissing-attributes.
+ 	(-Wmissing-attributes): Invert entry, rewrite and correct default.
+ 	Add cross-references.
+ 	(-Wattribute-alias): Rewrite and correct default.  Mention
+ 	considered attributes (same as for -Wmissing-attributes).
+ 
+ 2019-02-25  Paul A. Clarke  <pc@us.ibm.com>
+ 
+ 	* config/rs6000/emmintrin.h (_mm_cvtpd_epi32): Fix big endian.
+ 	(_mm_cvtpd_ps): Likewise.
+ 	(_mm_cvttpd_epi32): Likewise.
+ 
+ 	PR target/89338
+ 	* config/rs6000/xmmintrin.h (_mm_cvtss_f32): Fix type mismatch.
+ 	(_mm_cvt_ss2si): Fix type mismatch and 32-bit.
+ 
+ 	PR target/89339
+ 	* config/rs6000/xmmintrin.h (_mm_movemask_pi8): Fix 32-bit.
+ 
+ 2019-02-25  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	PR target/88530
+ 	* common/config/aarch64/aarch64-common.c
+ 	(struct aarch64_option_extension): Add is_synthetic.
+ 	(all_extensions): Use it.
+ 	(TARGET_OPTION_INIT_STRUCT): Define hook.
+ 	(struct gcc_targetm_common): Moved to end.
+ 	(all_extensions_by_on): New.
+ 	(opt_ext_cmp, typedef opt_ext): New.
+ 	(aarch64_option_init_struct): New.
+ 	(aarch64_contains_opt): New.
+ 	(aarch64_get_extension_string_for_isa_flags): Output smallest set.
+ 	* config/aarch64/aarch64-option-extensions.def
+ 	(AARCH64_OPT_EXTENSION): Explicitly include AES and SHA2 in crypto.
+ 	(fp, simd, crc, lse, fp16, rcpc, rdma, dotprod, aes, sha2, sha3,
+ 	sm4, fp16fml, sve, profile, rng, memtag, sb, ssbs, predres):
+ 	Set is_synthetic to false.
+ 	(crypto): Set is_synthetic to true.
+ 	* config/aarch64/driver-aarch64.c (AARCH64_OPT_EXTENSION): Add
+ 	SYNTHETIC.
+ 
+ 2019-02-25  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	* config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
+ 	vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32, vfmlslq_low_u32,
+ 	vfmlalq_high_u32, vfmlslq_high_u32, vfmlal_lane_low_u32,
+ 	vfmlal_lane_high_u32, vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32,
+ 	vfmlal_laneq_low_u32, vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32,
+ 	vfmlal_laneq_high_u32, vfmlsl_lane_low_u32, vfmlsl_lane_high_u32,
+ 	vfmlslq_laneq_low_u32, vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32,
+ 	vfmlslq_laneq_high_u32, vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32):
+ 	Rename ...
+ 	(vfmlal_low_f16, vfmlsl_low_f16, vfmlal_high_f16, vfmlsl_high_f16,
+ 	vfmlalq_low_f16, vfmlslq_low_f16, vfmlalq_high_f16, vfmlslq_high_f16,
+ 	vfmlal_lane_low_f16, vfmlal_lane_high_f16, vfmlalq_laneq_low_f16,
+ 	vfmlalq_lane_low_f16, vfmlal_laneq_low_f16, vfmlalq_laneq_high_f16,
+ 	vfmlalq_lane_high_f16, vfmlal_laneq_high_f16, vfmlsl_lane_low_f16,
+ 	vfmlsl_lane_high_f16, vfmlslq_laneq_low_f16, vfmlslq_lane_low_f16,
+ 	vfmlsl_laneq_low_f16, vfmlslq_laneq_high_f16, vfmlslq_lane_high_f16,
+ 	vfmlsl_laneq_high_f16): ... To this.
+ 	* config/arm/neon.md: Update comments.
+ 
+ 2019-02-25  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	* config/aarch64/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
+ 	vfmlalq_low_u32, vfmlslq_low_u32, vfmlal_high_u32, vfmlsl_high_u32,
+ 	vfmlalq_high_u32, vfmlslq_high_u32, vfmlal_lane_low_u32,
+ 	vfmlsl_lane_low_u32, vfmlal_laneq_low_u32, vfmlsl_laneq_low_u32,
+ 	vfmlalq_lane_low_u32, vfmlslq_lane_low_u32, vfmlalq_laneq_low_u32,
+ 	vfmlslq_laneq_low_u32, vfmlal_lane_high_u32, vfmlsl_lane_high_u32,
+ 	vfmlal_laneq_high_u32, vfmlsl_laneq_high_u32, vfmlalq_lane_high_u32,
+ 	vfmlslq_lane_high_u32, vfmlalq_laneq_high_u32, vfmlslq_laneq_high_u32):
+ 	Rename ...
+ 	(vfmlal_low_f16, vfmlsl_low_f16, vfmlalq_low_f16, vfmlslq_low_f16,
+ 	vfmlal_high_f16, vfmlsl_high_f16, vfmlalq_high_f16, vfmlslq_high_f16,
+ 	vfmlal_lane_low_f16, vfmlsl_lane_low_f16, vfmlal_laneq_low_f16,
+ 	vfmlsl_laneq_low_f16, vfmlalq_lane_low_f16, vfmlslq_lane_low_f16,
+ 	vfmlalq_laneq_low_f16, vfmlslq_laneq_low_f16, vfmlal_lane_high_f16,
+ 	vfmlsl_lane_high_f16, vfmlal_laneq_high_f16, vfmlsl_laneq_high_f16,
+ 	vfmlalq_lane_high_f16, vfmlslq_lane_high_f16, vfmlalq_laneq_high_f16,
+ 	vfmlslq_laneq_high_f16): ... To this.
+ 
+ 2019-02-25  Alexander Monakov  <amonakov@ispras.ru>
+ 
+ 	PR rtl-optimization/86096
+ 	* df-scan.c (df_mw_compare): Do not check mw_reg fields when
+ 	comparing mw_order values.
+ 
+ 2019-02-25  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89434
+ 	* config/arm/arm.md (*subsi3_carryin_const): Use
+ 	arm_neg_immediate_operand predicate instead of
+ 	arm_not_immediate_operand, "L" constraint instead of "K" and
+ 	print it using %n2 instead of %B2.
+ 	(*subsi3_carryin_const0): New define_insn.
+ 	(*subsi3_carryin_compare_const): Use const_int_I_operand predicate
+ 	instead of arm_not_operand and "I" constraint instead of "K" and
+ 	print it using %n3 instead of %B2.  Instead of using match_dup 2 add
+ 	another match_operand and in the condition check that it is negation
+ 	of operands[2].
+ 	(*subsi3_carryin_compare_const0): New define_ins.
+ 	(*subdi_di_zesidi): Adjust to use *subsi3_carryin_const0 instead of
+ 	*subsi3_carryin_const.
+ 	(*arm_cmpdi_insn): Fix splitting into *subsi3_carryin_compare_const,
+ 	split into *subsi3_carryin_compare_const0 if the highpart is zero.
+ 
+ 	PR target/89438
+ 	* config/arm.vfp.md (*negdf2_vfp): Use
+ 	gen_int_mode (0x80000000, SImode) instead of GEN_INT (0x80000000).
+ 	* config/arm/neon.md (neon_copysignf<mode>): Likewise.
+ 
+ 2019-02-24  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/89445
+ 	* simplify-rtx.c (simplify_ternary_operation): Don't use
+ 	simplify_merge_mask on operands that may trap.
+ 	* rtlanal.c (may_trap_p_1): Use FLOAT_MODE_P instead of
+ 	SCALAR_FLOAT_MODE_P checks.  For integral division by zero, if
+ 	second operand is CONST_VECTOR, check if any element could be zero.
+ 	Don't expect traps for VEC_{MERGE,SELECT,CONCAT,DUPLICATE} unless
+ 	their operands can trap.
+ 
+ 2019-02-23  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* gimple-ssa-sprintf.c (target_strtol): Rename...
+ 	(target_strtohwi): ...to this.  Handle values up to HOST_WIDE_INT_MAX.
+ 	(parse_directive): Adjust to name change.  Use HOST_WIDE_INT_MAX to
+ 	check for range error.
+ 
+ 2019-02-23  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR driver/69471
+ 	* opts-common.c (prune_options): Also prune joined switches
+ 	with Negative and RejectNegative.
+ 	* config/i386/i386.opt (march=): Add Negative(march=).
+ 	(mtune=): Add Negative(mtune=).
+ 	* doc/options.texi: Document Negative used together with Joined
+ 	and RejectNegative.
+ 
+ 2019-02-22  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* doc/extend.texi (Other Builtins): Add
+ 	__builtin_is_constant_evaluated.
+ 
+ 2019-02-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/87609
+ 	* tree-cfg.c (gimple_duplicate_bb): Only remap inlined cliques.
+ 
+ 2019-02-22  Jeff Law  <law@redhat.com>
+ 
+ 	PR rtl-optimization/87761
+ 	* config/mips/mips.md: Add new combiner pattern to recognize
+ 	a bitfield extraction using (ashiftrt (truncate (ashift (...)))).
+ 
+ 2019-02-22  Matthew Malcomson  <matthew.malcomson@arm.com>
+ 
+ 	PR target/89324
+ 	* config/aarch64/aarch64.md: Use aarch64_general_reg predicate on
+ 	destination register in peepholes generating patterns for ADDS/SUBS.
+ 	(add<mode>3_compare0,
+ 	*addsi3_compare0_uxtw, add<mode>3_compareC,
+ 	add<mode>3_compareV_imm, add<mode>3_compareV,
+ 	*adds_<optab><ALLX:mode>_<GPI:mode>,
+ 	*subs_<optab><ALLX:mode>_<GPI:mode>,
+ 	*adds_<optab><ALLX:mode>_shift_<GPI:mode>,
+ 	*subs_<optab><ALLX:mode>_shift_<GPI:mode>,
+ 	*adds_<optab><mode>_multp2, *subs_<optab><mode>_multp2,
+ 	*sub<mode>3_compare0, *subsi3_compare0_uxtw,
+ 	sub<mode>3_compare1): Allow stack pointer for source register.
+ 	* config/aarch64/predicates.md (aarch64_general_reg): New predicate.
+ 
+ 2019-02-22  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/88993
+ 	PR tree-optimization/88853
+ 	* gimple-ssa-sprintf.c (sprintf_dom_walker::call_info::is_file_func):
+ 	New helper.
+ 	(sprintf_dom_walker::call_info::is_string_func): New helper.
+ 	(format_directive): Only issue "may exceed" 4095/INT_MAX warnings
+ 	for formatted string functions.
+ 	(sprintf_dom_walker::handle_gimple_call): Fix a typo in a comment.
+ 
+ 2019-02-22  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR c/89425
+ 	* c-parser.c (sizeof_ptr_memacc_comptypes): Avoid warning in
+ 	unreachable subexpressions.
+ 
+ 2019-02-22  H.J. Lu  <hongjiu.lu@intel.com>
+ 	    Hongtao Liu  <hongtao.liu@intel.com>
+ 	    Sunil K Pandey  <sunil.k.pandey@intel.com>
+ 
+ 	PR target/87007
+ 	* config/i386/i386-passes.def: Add
+ 	pass_remove_partial_avx_dependency.
+ 	* config/i386/i386-protos.h
+ 	(make_pass_remove_partial_avx_dependency): New.
+ 	* config/i386/i386.c (make_pass_remove_partial_avx_dependency):
+ 	New function.
+ 	(pass_data_remove_partial_avx_dependency): New.
+ 	(pass_remove_partial_avx_dependency): Likewise.
+ 	(make_pass_remove_partial_avx_dependency): Likewise.
+ 	* config/i386/i386.md (avx_partial_xmm_update): New attribute.
+ 	(*extendsfdf2): Add avx_partial_xmm_update.
+ 	(truncdfsf2): Likewise.
+ 	(*float<SWI48:mode><MODEF:mode>2): Likewise.
+ 	(SF/DF conversion splitters): Disabled for TARGET_AVX.
+ 
+ 2019-02-22  Aldy Hernandez  <aldyh@redhat.com>
+ 
+ 	PR middle-end/85598
+ 	* gimple-ssa-sprintf.c (pass_sprintf_length::execute): Enable loop
+ 	analysis for pass.
+ 
+ 2019-02-22  Thiago Macieira  <thiago.macieira@intel.com>
+ 
+ 	PR target/89444
+ 	* config/i386/i386.h (PTA_WESTMERE): Remove PTA_AES.
+ 	(PTA_SKYLAKE): Add PTA_AES.
+ 	(PTA_GOLDMONT): Likewise.
+ 
+ 2019-02-22  Sudakshina Das  <sudi.das@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_output_mi_thunk): Add bti
+ 	instruction if enabled.
+ 	(aarch64_override_options): Remove reference to return address key.
+ 
+ 2019-02-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89440
+ 	* tree-vect-loop.c (vect_create_epilog_for_reduction): Remove
+ 	not necessary assert.
+ 
+ 2019-02-22  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	PR fortran/72741
+ 	* omp-general.c (oacc_replace_fn_attrib): Mostly split out into...
+ 	(oacc_replace_fn_attrib_attr): ... this new function.
+ 	* omp-general.h (oacc_replace_fn_attrib_attr): New prototype.
+ 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Revert workaround.
+ 
+ 2019-02-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/arm-cpus.in (ares): Rename to...
+ 	(neoverse-n1): ... This.  Add ares as alias.
+ 	* config/arm/arm-tables.opt: Regenerate.
+ 	* config/arm/arm-tune.md: Likewise.
+ 	* doc/invoke.txt (ARM Options): Document neoverse-n1.
+ 
+ 2019-02-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/aarch64/aarch64-cores.def (neoverse-e1): Define.
+ 	* config/aarch64/aarch64-tune.md: Regenerate.
+ 	* doc/invoke.texi (AArch64 Options): Document neoverse-e1 -mcpu option.
+ 
+ 2019-02-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (ares_tunings): Rename to...
+ 	(neoversen1_tunings): ... This.
+ 	* config/aarch64/aarch64-cores.def (ares): Change tuning to the above.
+ 	(neoverse-n1): New CPU.
+ 	* config/aarch64/aarch64-tune.md: Regenerate.
+ 	* doc/invoke.txt (AArch64 Options): Document neoverse-n1.
+ 
+ 2019-02-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/87609
+ 	* cfghooks.h (dependence_hash): New typedef.
+ 	(struct copy_bb_data): New type.
+ 	(cfg_hooks::duplicate_block): Adjust to take a copy_bb_data argument.
+ 	(duplicate_block): Likewise.
+ 	* cfghooks.c (duplicate_block): Pass down copy_bb_data.
+ 	(copy_bbs): Create and pass down copy_bb_data.
+ 	* cfgrtl.c (cfg_layout_duplicate_bb): Adjust.
+ 	(rtl_duplicate_bb): Likewise.
+ 	* tree-cfg.c (gimple_duplicate_bb): If the copy_bb_data arg is not NULL
+ 	remap dependence info.
+ 
+ 2019-02-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/87609
+ 	* tree-core.h (tree_base): Document special clique values.
+ 	* tree-inline.c (remap_dependence_clique): Do not use the
+ 	special clique value of one.
+ 	(maybe_set_dependence_info): Use clique one.
+ 	(clear_dependence_clique): New callback.
+ 	(compute_dependence_clique): Clear clique one from all refs
+ 	before assigning it (again).
+ 
+ 2019-02-21  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* doc/extend.texi (__clear_cache): Correct signature.
+ 
+ 2019-02-21  Ian Lance Taylor  <iant@golang.org>
+ 
+ 	PR go/89170
+ 	* varasm.c (decode_addr_const): Call lookup_constant_def rather
+ 	than output_constant_def.
+ 	(add_constant_to_table): New static function.
+ 	(output_constant_def): Call add_constant_to_table.
+ 	(tree_output_constant_def): Likewise.
+ 
+ 2019-02-21  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/89285
+ 	* builtins.c (fold_builtin_arith_overflow): If first two args are
+ 	INTEGER_CSTs, set intres and ovfres to constants rather than calls
+ 	to ifn.
+ 
+ 2019-02-21  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/87412
+ 	* config/i386/i386.c (ix86_set_indirect_branch_type): Issue an
+ 	error for -mindirect-branch/-mfunction-return with incompatible
+ 	-fcf-protection.
+ 
+ 2019-02-21  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR bootstrap/88714
+ 	* constraints.md (q): Remove.
+ 	* config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use rk constraint
+ 	instead of q.
+ 
+ 2019-02-21  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR hsa/89302
+ 	* omp-general.c (omp_extract_for_data): Removed a duplicate call
+ 	to omp_adjust_for_condition, moved NE_EXPR code_cond processing...
+ 	(omp_adjust_for_condition): ...here.  Added necessary parameters.
+ 	* omp-general.h (omp_adjust_for_condition): Updated declaration.
+ 	* omp-grid.c (grid_attempt_target_gridification): Adjust to pass
+ 	proper values to new parameters of omp_adjust_for_condition.
+ 
+ 2019-02-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/89412
+ 	* expr.c (expand_assignment): If result is a MEM, use change_address
+ 	instead of simplify_gen_subreg.
+ 
+ 2019-02-20  Jakub Jelinek  <jakub@redhat.com>
+ 	    David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR middle-end/89091
+ 	* fold-const.c (decode_field_reference): Return NULL_TREE if
+ 	lang_hooks.types.type_for_size returns NULL.  Check it before
+ 	overwriting *exp_.  Use return NULL_TREE instead of return 0.
+ 
+ 2019-02-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/88074
+ 	PR middle-end/89415
+ 	* toplev.c (do_compile): Double the emin/emax exponents to workaround
+ 	buggy mpc_norm.
+ 
+ 2019-02-20  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89397
+ 	* config/i386/i386.c (ix86_atomic_assign_expand_fenv): Check
+ 	TARGET_SSE in addition to TARGET_SSE_MATH.
+ 
+ 	(ix86_excess_precision): Ditto.
+ 	(ix86_float_exceptions_rounding_supported_p): Ditto.
+ 	(use_rsqrt_p): Ditto.
+ 	* config/i386/sse.md (rsqrt<mode>2): Ditto.
+ 
+ 2019-02-20  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR c/89410
+ 	* diagnostic-show-locus.c (layout::calculate_line_spans): Use
+ 	linenum_arith_t when determining if two adjacent line spans are
+ 	close enough to merge.
+ 	(diagnostic_show_locus): Use linenum_arith_t when iterating over
+ 	lines within each line_span.
+ 
+ 2019-02-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	PR target/86487
+ 	* lra-constraints.c(uses_hard_regs_p): Fix handling of
+ 	paradoxical SUBREGS.
+ 
+ 2019-02-20  Li Jia He  <helijia@linux.ibm.com>
+ 
+ 	PR target/88100
+ 	* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin)
+ 	<case ALTIVEC_BUILTIN_VSPLTISB, ALTIVEC_BUILTIN_VSPLTISH,
+ 	ALTIVEC_BUILTIN_VSPLTISW>: Don't convert the operand before
+ 	range checking it.
+ 
+ 2019-02-19  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* config/gcn/gcn.c (print_operand): Fix typo.
+ 
+ 2019-02-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/88074
+ 	* toplev.c (do_compile): Initialize mpfr's exponent range
+ 	based on available float modes.
+ 
+ 2019-02-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* rtlanal.c (get_initial_register_offset): Fall back to the estimate
+ 	as long as the epilogue isn't completed.
+ 
+ 2019-02-18  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* doc/cpp.texi (Conditional syntax): Add __has_attribute,
+ 	__has_cpp_attribute, and __has_include.
+ 
+ 2019-02-18  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* doc/invoke.texi (-Wreturn-type): Correct and expand.
+ 
+ 2019-02-18  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/89294
+ 	* tree.c (valid_constant_size_p): Avoid assuming size is a constant
+ 	expression.
+ 	* tree.h (cst_size_error): Add the cst_size_not_constant enumerator.
+ 
+ 2019-02-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89296
+ 	* tree-ssa-loop-ch.c (ch_base::copy_headers): Restrict setting
+ 	of no-warning flag to cases that might emit the bogus warning.
+ 
+ 2019-02-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR bootstrap/88714
+ 	* config/arm/arm.md (*arm_movdi, *movdf_soft_insn): Use "r" instead of
+ 	"q" constraint.
+ 	* config/arm/vfp.md (*movdi_vfp): Likewise.
+ 	* config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use "r" instead of
+ 	"q" constraint for operands[0].
+ 
+ 	PR target/89369
+ 	* config/s390/s390.md (*r<noxa>sbg_<mode>_srl_bitmask,
+ 	*r<noxa>sbg_<mode>_sll, *r<noxa>sbg_<mode>_srl): Don't construct
+ 	pattern in a temporary buffer.
+ 	(*r<noxa>sbg_sidi_srl): Likewise.  Always use 32 as I3 rather
+ 	than 64-operands[2].
+ 
+ 	PR target/89361
+ 	* config/s390/s390.c (s390_indirect_branch_attrvalue,
+ 	s390_indirect_branch_settings): Define unconditionally.
+ 	(s390_set_current_function): Likewise, but guard the whole body except
+ 	the s390_indirect_branch_settings call with
+ 	#if S390_USE_TARGET_ATTRIBUTE.
+ 	(TARGET_SET_CURRENT_FUNCTION): Redefine unconditionally.
+ 
+ 	* config/s390/s390.md (*<risbg_n>_ior_and_sr_ze,
+ 	*<risbg_n>_<mode>_ior_and_lshiftrt, *<risbg_n>_sidi_ior_and_lshiftrt):
+ 	Use HOST_WIDE_INT_M1U instead of ~(0ULL).
+ 	(*<risbg_n>_and_subregdi_rotr, *<risbg_n>_and_subregdi_rotl): Use
+ 	HOST_WIDE_INT_1U instead of 1ULL.
+ 	(*pre_z10_extzv<mode>, *pre_z10_extv<mode>): Change mask type from int
+ 	to unsigned HOST_WIDE_INT, use HOST_WIDE_INT_1U instead of 1ul.
+ 	(*insv<mode><clobbercc_or_nocc>_appendbitsleft,
+ 	z = (x << c) | (y >> d) splitters): Use HOST_WIDE_INT_1U
+ 	instead of 1UL.
+ 	(*insv<mode>_mem_reg, *insvdi_mem_reghigh): Use HOST_WIDE_INT_1U
+ 	instead of 1ul.
+ 
+ 2019-02-18  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR tree-optimization/89209
+ 	* tree-sra.c (create_access_replacement): New optional parameter
+ 	reg_tree.  Use it as a type if non-NULL and access type is not of
+ 	a register type.
+ 	(get_repl_default_def_ssa_name): New parameter REG_TYPE, pass it
+ 	to create_access_replacement.
+ 	(sra_modify_assign): Pass LHS type to get_repl_default_def_ssa_name.
+ 	Check lacc is non-NULL before attempting to re-create it on the RHS.
+ 
+ 2019-02-18  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/89306
+ 	* cgraph.c (symbol_table::create_edge): Set m_summary_id to -1
+ 	by default.
+ 	(symbol_table::free_edge): Recycle m_summary_id.
+ 	* cgraph.h (get_summary_id): New.
+ 	(symbol_table::release_symbol): Set m_summary_id to -1
+ 	by default.
+ 	(symbol_table::allocate_cgraph_symbol): Recycle m_summary_id.
+ 	* ipa-fnsummary.c (ipa_fn_summary_t): Switch from
+ 	function_summary to fast_function_summary.
+ 	* ipa-fnsummary.h (ipa_fn_summary_t): Likewise.
+ 	* ipa-pure-const.c (class funct_state_summary_t):
+ 	Switch from function_summary to fast_function_summary.
+ 	* ipa-reference.c (class ipa_ref_var_info_summary_t): Likewise.
+ 	(class ipa_ref_opt_summary_t): Switch from function_summary
+ 	to fast_function_summary.
+ 	* symbol-summary.h (class function_summary_base): New class
+ 	that is created from base of former function_summary.
+ 	(function_summary_base::unregister_hooks): New.
+ 	(class function_summary): Inherit from function_summary_base.
+ 	(class call_summary_base): New class
+ 	that is created from base of former call_summary.
+ 	(class call_summary): Inherit from call_summary_base.
+ 	(struct is_same): New.
+ 	(class fast_function_summary): New summary class.
+ 	(class fast_call_summary): New summary class.
+ 	* vec.h (vec_safe_grow_cleared): New function.
+ 
+ 2019-02-18  Martin Liska  <mliska@suse.cz>
+ 
+ 	* config/i386/i386.c (ix86_get_multilib_abi_name): New function.
+ 	(TARGET_GET_MULTILIB_ABI_NAME): New macro defined.
+ 	* doc/tm.texi: Document new target hook.
+ 	* doc/tm.texi.in: Likewise.
+ 	* target.def: Add new target macro.
+ 	* gcc.c (find_fortran_preinclude_file): Do not search multilib
+ 	suffixes.
+ 
+ 2019-02-17  Alan Modra  <amodra@gmail.com>
+ 
+ 	PR target/89271
+ 	* config/rs6000/rs6000.md (<bd>_<mode> split): Check for an int
+ 	output reg on add insn.
+ 	(<bd>tf_<mode> split): Likewise.  Match predicates with insn.
+ 
+ 2019-02-16  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89372
+ 	* config/i386/sse.md (ssedoublemode): Remove V4HI.
+ 	(PMULHRSW): Likewise.
+ 	(<ssse3_avx2>_pmulhrsw<mode>3): Require TARGET_SSSE3, not
+ 	TARGET_AVX2.
+ 	(ssse3_pmulhrswv4hi3): New expander.
+ 
+ 2019-02-16  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	* config/i386/mmx.md (*vec_extractv2si_zext_mem): Doesn't require
+ 	MMX.  Add isa attribute.
+ 
+ 2019-02-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/66152
+ 	* builtins.h (c_readstr): Declare.
+ 	* builtins.c (c_readstr): Remove forward declaration.  Add
+ 	null_terminated_p argument, if false, read all bytes from the
+ 	string instead of stopping after '\0'.
+ 	* expr.c (string_cst_read_str): New function.
+ 	(store_expr): Use string_cst_read_str instead of
+ 	builtin_strncpy_read_str.  Try to store by pieces the whole
+ 	exp_len first, and only if that fails, split it up into
+ 	store by pieces followed by clear_storage.  Formatting fix.
+ 
+ 	* config/i386/i386.md (*movqi_internal): Remove static from
+ 	buf variable.  Use output_asm_insn (buf, operands); return "";
+ 	instead of return buf;.
+ 	* config/i386/sse.md (<sse>_andnot<mode>3<mask_name>,
+ 	*<code><mode>3<mask_name>, *andnot<mode>3, *andnottf3, *<code><mode>3,
+ 	*<code>tf3, <mask_codefor><code><mode>3<mask_name>): Likewise.
+ 
+ 2019-02-15  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* config/sparc/linux.h (ASAN_CC1_SPEC): Define.
+ 	(CC1_SPEC): Use GNU_USER_TARGET_CC1_SPEC and ASAN_CC1_SPEC.
+ 	* config/sparc/linux64.h (ASAN_CC1_SPEC): Likewise.
+ 	(CC1_SPEC): Likewise.
+ 	* config/sparc/sparc.c (sparc_asan_shadow_offset): Adjust for 64-bit.
+ 
+ 2019-02-15  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* asan.c (asan_emit_stack_protection): Use full-sized mask to align
+ 	the base address on 64-bit strict-alignment platforms.
+ 
+ 2019-02-15  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	* config/i386/i386.h (VALID_MMX_REG_MODE): Correct the misplaced ')'.
+ 
+ 2019-02-15  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/darwin.h (TARGET_FPMATH_DEFAULT_P): New define.
+ 
+ 2019-02-15  Aaron Sawdey  <acsawdey@linux.ibm.com>
+ 
+ 	PR rtl-optimization/88308
+ 	* shrink-wrap.c (move_insn_for_shrink_wrap): Fix LABEL_NUSES counts
+ 	on copied instruction.
+ 
+ 2019-02-15  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* final.c (insn_current_reference_address): Replace test on JUMP_P
+ 	with test on jump_to_label_p.
+ 	* config/visium/visium-passes.def: New file.
+ 	* config/visium/t-visium (PASSES_EXTRA): Define.
+ 	* config/visium/visium-protos.h (make_pass_visium_reorg): Declare.
+ 	* config/visium/visium.h (TRAMPOLINE_SIZE): Adjust.
+ 	(TRAMPOLINE_ALIGNMENT): Define.
+ 	* config/visium/visium.c (visium_option_override): Do not register
+ 	the machine-specific reorg pass here.
+ 	(visium_trampoline_init): Align the BRA insn on a 64-bit boundary
+ 	for the GR6.
+ 	(output_branch): Adjust threshold for long branch instruction.
+ 	* config/visium/visium.md (cpu): Move around.
+ 	(length): Adjust for the GR6.
+ 
+ 2019-02-15  Richard Biener  <rguenther@suse.de>
+ 	    Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/89278
+ 	* tree-loop-distribution.c: Include tree-eh.h.
+ 	(generate_memset_builtin, generate_memcpy_builtin): Call
+ 	rewrite_to_non_trapping_overflow on builtin->size before passing it
+ 	to force_gimple_operand_gsi.
+ 
+ 2019-02-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR other/89342
+ 	* optc-save-gen.awk: Handle optimize_fast like optimize_size or
+ 	optimize_debug.
+ 	* opth-gen.awk: Likewise.
+ 
+ 2019-02-15  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.h (TARGET_SUBTARGET64_ISA_DEFAULT):
+ 	Enable MMX, SSE and SSE2 by default.
+ 	* config/i386/i386.c (ix86_option_override_internal): Do not
+ 	explicitly set MMX, SSE and SSE2 flags for TARGET_64BIT here.
+ 
+ 2019-02-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/89354
+ 	* combine.c (make_extraction): Punt if extraction_mode is narrower
+ 	than len bits.
+ 
+ 2019-02-14  Maya Rashish  <coypu@sdf.org>
+ 
+ 	* config.gcc (*-*-netbsd*): Add netbsd-d.o.
+ 	* config/netbsd-d.c: New file.
+ 	* config/t-netbsd: Add netbsd-d.o
+ 
+ 2018-02-14  Steve Ellcey  <sellcey@marvell.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_attribute_table): Change
+ 	affects_type_identity to true for aarch64_vector_pcs.
+ 	(aarch64_comp_type_attributes): New function.
+ 	(TARGET_COMP_TYPE_ATTRIBUTES): New macro.
+ 
+ 2019-02-14  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	PR target/88850
+ 	* config/arm/iterators.md (ANY64): Add V4HF.
+ 
+ 2019-02-14  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR rtl-optimization/89242
+ 	* dce.c (delete_unmarked_insns): Call free_dominance_info we
+ 	process a transformation.
+ 
+ 2019-02-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/89314
+ 	* fold-const.c (fold_binary_loc): Cast strlen argument to
+ 	const char * before dereferencing it.  Formatting fixes.
+ 
+ 	PR middle-end/89284
+ 	* passes.def: Swap pass_ubsan and pass_early_warn_uninitialized.
+ 
+ 2019-02-13  Ian Lance Taylor  <iant@golang.org>
+ 
+ 	* optc-save-gen.awk: Set var_opt_hash for initial optimizations
+ 	and set current index for other optimizations.
+ 
+ 2019-02-13  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/sse.md (vec_set<VI4F_256_512:mode>_0): Use
+ 	nonimmediate_operand as operand 2 predicate.
+ 	(vec_set<VF2_512_256:mode>_0): Ditto.
+ 	(vec_set<VI8_AVX_AVX512F:mode>_0): Ditto.
+ 	(*vec_concatv2si): Remove alternative 2.
+ 	(*vec_concatv4si_0): Use vm constraint for alternative 0.
+ 	(*vec_concatv4si_0): Remove preferred_for_speed attribute.
+ 	(vec_concatv2di): Split alternatives 4,5,6 to ...
+ 	(*vec_concatv2di_0) ... new pattern.
+ 
+ 2019-02-13  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	PR target/89190
+ 	* config/arm/arm.c (ldm_stm_operation_p) Set
+ 	addr_reg_in_reglist correctly for first register.
+ 	(load_multiple_sequence): Remove dead base check.
+ 	(gen_ldm_seq): Correctly set write_back for Thumb-1.
+ 
+ 2019-02-13  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	PR target/88847
+ 	* config/aarch64/aarch64-sve.md (*pred_mov<mode>, pred_mov<mode>):
+ 	Expose as @aarch64_pred_mov.
+ 	* config/aarch64/aarch64.c (aarch64_classify_address):
+ 	Use expand_insn which legitimizes operands.
+ 
+ 2019-02-13  Martin Liska  <mliska@suse.cz>
+ 
+ 	* builtins.h (expand_builtin_with_bounds): Remove declaration.
+ 	* calls.c (struct arg_data): Remove special_slot, pointer_arg
+ 	and pointer_offset fields.
+ 	(initialize_argument_information): Remove usage of dead
+ 	fields.
+ 	* cgraph.h (struct cgraph_thunk_info): Remove
+ 	add_pointer_bounds_args.
+ 	* cgraphunit.c (cgraph_node::expand_thunk): Remove usage of dead
+ 	fields.
+ 	(cgraph_node::assemble_thunks_and_aliases): Remove usage of dead
+ 	fields.
+ 	* config/i386/i386.c (ix86_function_arg_advance): Remove
+ 	unrelated comment.
+ 	(struct builtin_isa): Remove leaf_p and nothrow_p fields.
+ 	(def_builtin): Remove usage of dead fields.
+ 	(ix86_add_new_builtins): Likewise.
+ 	* ipa-fnsummary.c (compute_fn_summary): Likewise.
+ 	* ipa-icf.c (sem_function::equals_wpa): Likewise.
+ 	(sem_function::init): Likewise.
+ 	(sem_variable::merge): Likewise.
+ 	* ipa-visibility.c (function_and_variable_visibility): Likewise.
+ 	* ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
+ 	* lto-cgraph.c (lto_output_node): Likewise.
+ 	(lto_output_varpool_node): Likewise.
+ 	(input_node): Likewise.
+ 	(input_varpool_node): Likewise.
+ 	* lto-streamer-out.c (lto_output): Likewise.
+ 	* tree-inline.c (expand_call_inline): Remove usage of
+ 	assign_stmts.
+ 	* tree-inline.h (struct copy_body_data): Likewise.
+ 	* varpool.c (varpool_node::dump): Likewise.
+ 
+ 2019-02-13  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/89303
+ 	* tree-ssa-structalias.c (set_uids_in_ptset): Or in vi->is_heap_var
+ 	into pt->vars_contains_escaped_heap instead of setting
+ 	pt->vars_contains_escaped_heap to it.
+ 
+ 	PR middle-end/89281
+ 	* optabs.c (prepare_cmp_insn): Use UINTVAL (size) instead of
+ 	INTVAL (size), compare it to GET_MODE_MASK instead of
+ 	1 << GET_MODE_BITSIZE.
+ 
+ 	PR target/89290
+ 	* config/i386/predicates.md (x86_64_immediate_operand): Allow
+ 	TLS UNSPECs offsetted by signed 32-bit CONST_INT even with
+ 	-mcmodel=large.
+ 
+ 2019-02-13  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR lto/88858
+ 	* cfgrtl.c (remove_barriers_from_footer): New function.
+ 	(try_redirect_by_replacing_jump): Use it.
+ 	(cfg_layout_redirect_edge_and_branch): Likewise.
+ 
+ 2019-02-13  Xiong Hu Luo  <luoxhu@linux.vnet.ibm.com>
+ 
+ 	* config/rs6000/altivec.h (vec_sbox_be, vec_cipher_be,
+ 	vec_cipherlast_be, vec_ncipher_be, vec_ncipherlast_be): New #defines.
+ 	* config/rs6000/crypto.md (CR_vqdi): New define_mode_iterator.
+ 	(crypto_vsbox_<mode>, crypto_<CR_insn>_<mode>): New define_insns.
+ 	* config/rs6000/rs6000-builtin.def (VSBOX_BE): New BU_CRYPTO_1.
+ 	(VCIPHER_BE, VCIPHERLAST_BE, VNCIPHER_BE, VNCIPHERLAST_BE):
+ 	New BU_CRYPTO_2.
+ 	* config/rs6000/rs6000.c (builtin_function_type)
+ 	<CRYPTO_BUILTIN_VSBOX_BE, CRYPTO_BUILTIN_VCIPHER_BE,
+ 	CRYPTO_BUILTIN_VCIPHERLAST_BE, CRYPTO_BUILTIN_VNCIPHER_BE,
+ 	CRYPTO_BUILTIN_VNCIPHERLAST_BE>: New switch options.
+ 	* doc/extend.texi (vec_sbox_be, vec_cipher_be, vec_cipherlast_be,
+ 	vec_ncipher_be, vec_ncipherlast_be): New builtin functions.
+ 
+ 2019-02-12  Pat Haugen  <pthaugen@us.ibm.com>
+ 
+ 	* doc/invoke.texi (RS/6000 and PowerPC Options): Remove duplicate
+ 	-maltivec. Delete -maltivec=be and -maltivec=le documentation.
+ 
+ 2019-02-12  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89229
+ 	* config/i386/i386.md (*movoi_internal_avx): Revert revision
+ 	268678 and revision 268657.
+ 	(*movti_internal): Likewise.
+ 
+ 2019-02-12  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	PR target/89233
+ 	* config/s390/s390.c (s390_decompose_address): Update comment.
+ 	(s390_check_qrst_address): Reject invalid address forms after
+ 	LRA.
+ 
+ 2019-02-12  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR lto/88876
+ 	* ipa-pure-const.c (propagate_pure_const): Revert hunk as
+ 	we need default values of funct_state for a function that
+ 	is not optimized.
+ 
+ 2019-02-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* asan.c (asan_expand_mark_ifn): Take into account the alignment of
+ 	the object to pick the size of stores on strict-alignment platforms.
+ 
+ 	* config/sparc/sparc.md (*movsi_insn): Minor tweak.
+ 	(*movdi_insn_sp32): Likewise.
+ 	(*movdi_insn_sp64): Likewise.
+ 
+ 2019-02-12  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR lto/88677
+ 	* cgraphunit.c (analyze_functions): Clear READONLY flag for external
+ 	types that needs constructiong.
+ 	* tree.h (may_be_aliased): Do not check TYPE_NEEDS_CONSTRUCTING.
+ 
+ 2019-02-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89253
+ 	* tree-ssa-loop-split.c (tree_ssa_split_loops): Check we can
+ 	duplicate the loop.
+ 
+ 2019-02-11  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR lto/88147
+ 	* input.c (selftest::test_line_offset_overflow): New selftest.
+ 	(selftest::input_c_tests): Call it.
+ 
+ 2019-02-11  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/88771
+ 	* gimple-ssa-warn-restrict.c (pass_wrestrict::gate): Also enable
+ 	when -Wstringop-overflow is set.
+ 	(builtin_memref::builtin_memref): Adjust excessive upper bound
+ 	only when lower bound is not excessive.
+ 	(maybe_diag_overlap): Detect and diagnose excessive bounds via
+ 	-Wstringop-ovefflow.
+ 	(maybe_diag_offset_bounds): Rename...
+ 	(maybe_diag_access_bounds): ...to this.
+ 	(check_bounds_or_overlap): Adjust for name change above.
+ 
+ 2019-02-11  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR c++/87996
+ 	* builtins.c (max_object_size): Move from here...
+ 	* builtins.h (max_object_size): ...and here...
+ 	* tree.c (max_object_size): ...to here...
+ 	* tree.h (max_object_size): ...and here.
+ 
+ 2019-02-11  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Shift-right
+ 	and shift-left vector built-ins need to include a TRUNC_MOD_EXPR
+ 	for correct semantics.
+ 
+ 2019-02-11  Alan Modra  <amodra@gmail.com>
+ 
+ 	* doc/invoke.texi (man page RS/6000 and PowerPC Options): Mention
+ 	-mlongcall and -mpltseq.
+ 	(RS/6000 and PowerPC Options <-mlongcall>): Mention inline PLT calls.
+ 	(RS/6000 and PowerPC Options <-mpltseq>): Document.
+ 	* config/rs6000/rs6000.h (TARGET_PLTSEQ): Define.
+ 	* config/rs6000/sysv4.opt (mpltseq): New option.
+ 	* config/rs6000/sysv4.h (TARGET_PLTSEQ): Redefine.
+ 	(SUBTARGET_OVERRIDE_OPTIONS): Error if given -mpltseq when assembler
+ 	support is lacking.  Don't allow -mpltseq with -mbss-plt.
+ 	* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Warn if
+ 	-mpltseq given for ELFv1.
+ 	* config/rs6000/rs6000.c (rs6000_call_aix): Comment on UNSPEC_PLTSEQ.
+ 	Only use UNSPEC_PLTSEQ for inline PLT calls.
+ 	(rs6000_call_sysv, rs6000_sibcall_sysv): Expand comments.  Only
+ 	use UNSPEC_PLTSEQ for inline PLT calls.
+ 	(rs6000_indirect_call_template_1, rs6000_longcall_ref),
+ 	(rs6000_call_aix, rs6000_call_sysv, rs6000_sibcall_sysv): Replace
+ 	uses of HAVE_AS_PLTSEQ with TARGET_PLTSEQ, simplifying.
+ 	* config/rs6000/rs6000.md (pltseq_tocsave_<mode>),
+ 	(pltseq_plt16_ha_<mode>, pltseq_plt16_lo_<mode>),
+ 	(pltseq_mtctr_<mode>): Likewise.
+ 
+ 2019-02-11  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* acinclude.m4 (gcc_AC_INITFINI_ARRAY): Use 8-byte strings with
+ 	Solaris ld.
+ 	* configure: Regenerate.
+ 
+ 2019-02-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR bootstrap/88714
+ 	* config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use q constraint
+ 	instead of r.
+ 
+ 2019-02-11  Hans-Peter Nilsson  <hp@axis.com>
+ 
+ 	* function.c (assign_parm_setup_block): Use the stored
+ 	size, not the passed size, when allocating stack-space,
+ 	also for a parameter with alignment larger than
+ 	MAX_SUPPORTED_STACK_ALIGNMENT.
+ 
+ 2019-02-11  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/89009
+ 	* ipa-cp.c (build_toporder_info): Remove usage of a param.
+ 	* ipa-inline.c (inline_small_functions): Likewise.
+ 	* ipa-pure-const.c (propagate_pure_const): Likewise.
+ 	(propagate_nothrow): Likewise.
+ 	* ipa-reference.c (propagate): Likewise.
+ 	* ipa-utils.c (struct searchc_env): Remove unused field.
+ 	(searchc): Always search across AVAIL_INTERPOSABLE.
+ 	(ipa_reduced_postorder): Always allow AVAIL_INTERPOSABLE as
+ 	the only called IPA pure const can properly not propagate
+ 	across interposable boundary.
+ 	* ipa-utils.h (ipa_reduced_postorder): Remove param.
+ 
+ 2019-02-11  Chung-Ju Wu  <jasonwucj@gmail.com>
+ 
+ 	* config/nds32/nds32.md (call_internal, call_value_internal,
+ 	sibcall_internal, sibcall_value_internal): Use SImode for mem rtx.
+ 
+ 2019-02-11  Hans-Peter Nilsson  <hp@axis.com>
+ 
+ 	* config/cris/cris.c (cris_preferred_minimum_alignment): Fix name
+ 	typo.
+ 
+ 2019-02-10  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	* config/i386/constraints.md (Yd): Replace AVX512BW with AVX512DQ
+ 	in comments
+ 
+ 2019-02-10  Chung-Ju Wu  <jasonwucj@gmail.com>
+ 
+ 	* config.gcc (with_nds32_lib): Set default --with-nds32-lib correctly.
+ 
+ 2019-02-10  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/89268
+ 	* tree-if-conv.c (version_loop_for_if_conversion): Push to preds only
+ 	if preds is non-NULL.
+ 
+ 2019-02-09  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR lto/89272
+ 	* tree.c (fld_simplified_type_name): Also keep TYPE_DECL for
+ 	polymorphic types.
+ 
+ 2019-02-10  Monk Chiang  <sh.chiang04@gmail.com>
+ 
+ 	* config/nds32/nds32.md (trap): New pattern.
+ 
+ 2019-02-10  Monk Chiang  <sh.chiang04@gmail.com>
+ 
+ 	* config/nds32/nds32.c (nds32_dwarf_register_span): Refine register
+ 	dwarf span.
+ 
+ 2019-02-10  Chung-Ju Wu  <jasonwucj@gmail.com>
+ 
+ 	* config/nds32/nds32-md-auxiliary.c (nds32_spilt_doubleword): Support
+ 	to split POST_INC.
+ 
+ 2019-02-09  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-visibility.c (localize_node): Also do not localize
+ 	LDPR_PREVAILING_DEF_IRONLY_EXP.
+ 
+ 2019-02-09  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR lto/87957
+ 	* tree.c (fld_simplified_type_name): Use DECL_ASSEMBLER_NAME_SET_P
+ 	instead of type_with_linkage.
+ 
+ 2019-02-09  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR ipa/88755
+ 	* params.def (uninlined-function-insns, uninlined-function-time,
+ 	uninlined-thunk-insns, uninlined-thunk-time): Add artificial upper
+ 	bound so we don't get overflows.
+ 
+ 2019-02-09  Aaron Sawdey  <acsawdey@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-string.c (expand_compare_loop,
+ 	expand_block_compare): Insert REG_BR_PROB notes in inline expansion of
+ 	memcmp/strncmp.
+ 
+ 2019-02-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/89246
+ 	* config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
+ 	If !node->definition and TYPE_ARG_TYPES is non-NULL, use
+ 	TYPE_ARG_TYPES instead of DECL_ARGUMENTS.
+ 
+ 2019-02-09  Alan Modra  <amodra@gmail.com>
+ 
+ 	PR target/88343
+ 	* config/rs6000/rs6000.c (save_reg_p): Correct calls_eh_return
+ 	case.  Match logic in rs6000_emit_prologue emitting pic_offset_table
+ 	setup.
+ 
+ 2019-02-08  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR middle-end/88560
+ 	* lra-constraints.c (process_alt_operands): Don't increase reject
+ 	for memory when offset memory is required.
+ 
+ 2019-02-08  Robin Dapp  <rdapp@linux.ibm.com>
+ 
+ 	* config/s390/vector.md: Implement vector copysign.
+ 
+ 2019-02-08  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	* expr.c (expand_constructor): Correct indentations.
+ 
+ 2019-02-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89247
+ 	* tree-if-conv.c: Include tree-cfgcleanup.h.
+ 	(version_loop_for_if_conversion): Record LOOP_VECTORIZED call.
+ 	(tree_if_conversion): Pass through predicate vector.
+ 	(pass_if_conversion::execute): Do CFG cleanup and SSA update
+ 	inline, see if any if-converted loops we refrece in
+ 	LOOP_VECTORIZED calls vanished and fixup.
+ 	* tree-if-conv.h (tree_if_conversion): Adjust prototype.
+ 
+ 2019-02-08  Ilya Leoshkevich  <iii@linux.ibm.com>
+ 
+ 	* config/s390/constraints.md (jdd): New constraint.
+ 
+ 2019-02-08  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89229
+ 	* config/i386/i386.md (*movoi_internal_avx): Set mode to XI for
+ 	upper 16 vector registers without TARGET_AVX512VL.
+ 	(*movti_internal): Likewise.
+ 
+ 2019-02-08  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/89234
+ 	* except.c (copy_reg_eh_region_note_forward): Return if note_or_insn
+ 	is a NOTE, CODE_LABEL etc. - rtx_insn * other than INSN_P.
+ 	(copy_reg_eh_region_note_backward): Likewise.
+ 
+ 2019-02-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/89223
+ 	* tree-data-ref.c (initialize_matrix_A): Fail if constant
+ 	doesn't fit in HWI.
+ 	(analyze_subscript_affine_affine): Handle failure from
+ 	initialize_matrix_A.
+ 
+ 2019-02-08  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* cfganal.c (pre_and_rev_post_order_compute_fn): Use fn instead of
+ 	cfun everywhere.
+ 
+ 2019-02-07  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR tree-optimization/86637
+ 	PR tree-optimization/89235
+ 	* tree-vect-loop.c (optimize_mask_stores): Add an
+ 	auto_purge_vect_location sentinel to ensure that vect_location is
+ 	purged on exit.
+ 	* tree-vectorizer.c
+ 	(auto_purge_vect_location::~auto_purge_vect_location): New dtor.
+ 	(try_vectorize_loop_1): Add an auto_purge_vect_location sentinel
+ 	to ensure that vect_location is purged on exit.
+ 	(pass_slp_vectorize::execute): Likewise, replacing the manual
+ 	reset.
+ 	* tree-vectorizer.h (class auto_purge_vect_location): New class.
+ 
+ 2019-02-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/aarch64/iterators.md (max_opp): New code_attr.
+ 	(USMAX): New code iterator.
+ 	* config/aarch64/predicates.md (aarch64_smin): New predicate.
+ 	(aarch64_smax): Likewise.
+ 	* config/aarch64/aarch64-simd.md (abd<mode>_3): Rename to...
+ 	(*aarch64_<su>abd<mode>_3): ... Change RTL representation to
+ 	MINUS (MAX MIN).
+ 
+ 2019-02-07  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/89229
+ 	* config/i386/i386.md (*movoi_internal_avx): Set mode to OI
+ 	for TARGET_AVX512VL.
+ 	(*movti_internal): Set mode to TI for TARGET_AVX512VL.
+ 
+ 2019-02-07  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	* config/s390/s390-builtin-types.def: Add new types.
+ 	* config/s390/s390-builtins.def: (s390_vec_xl, s390_vec_xld2)
+ 	(s390_vec_xlw4): Make the memory operand into a const pointer.
+ 	(s390_vec_xld2, s390_vec_xlw4): Add a variant for single precision
+ 	float.
+ 	* config/s390/s390-c.c (s390_expand_overloaded_builtin): Generate
+ 	a new vector type with the alignment of the scalar memory operand.
+ 
+ 2019-02-07  Matthew Malcomson  <matthew.malcomson@arm.com>
+ 	    Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR bootstrap/88714
+ 	* config/arm/arm-protos.h (valid_operands_ldrd_strd,
+ 	arm_count_ldrdstrd_insns): New declarations.
+ 	* config/arm/arm.c (mem_ok_for_ldrd_strd): Remove broken handling of
+ 	MINUS.
+ 	(valid_operands_ldrd_strd): New function.
+ 	(arm_count_ldrdstrd_insns): New function.
+ 	* config/arm/ldrdstrd.md: Change peepholes to generate PARALLEL SImode
+ 	sets instead of single DImode set and define new insns to match this.
+ 
+ 2019-02-07  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	* config/aarch64/aarch64-builtins.c (aarch64_fcmla_lane_builtin_data):
+ 	Make it a C initializer.
+ 
+ 2019-02-07  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	PR/target 88850
+ 	* config/arm/neon.md (*neon_mov<mode>): Add r -> r case.
+ 
+ 2019-02-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/arm/neon.md (neon_<sup>dot<vsi2qi>):
+ 	Use neon_dot<q> for type.
+ 	(neon_<sup>dot_lane<vsi2qi>): Likewise.
+ 
+ 2019-02-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/aarch64/aarch64-simd.md (aarch64_<sur>dot<vsi2qi>):
+ 	Use neon_dot<q> for type.
+ 	(aarch64_<sur>dot_lane<vsi2qi>): Likewise.
+ 	(aarch64_<sur>dot_laneq<vsi2qi>): Likewise.
+ 
+ 2019-02-06  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/89225
+ 	* lra-constaints.c (simplify_operand_subreg): Add subreg mode
+ 	sizes check.
+ 
+ 2019-02-06  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* config/i386/i386.c (ix86_expand_prologue): Emit a memory blockage
+ 	after restoring registers saved to allocate the frame on Windows.
+ 
+ 2019-02-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89182
+ 	* graphite.h (cached_scalar_evolution_in_region): Declare.
+ 	* graphite.c (struct seir_cache_key): New.
+ 	(struct sese_scev_hash): Likewise.
+ 	(seir_cache): New global.
+ 	(cached_scalar_evolution_in_region): New function.
+ 	(graphite_transform_loops): Allocate and release seir_cache.
+ 	* graphite-isl-ast-to-gimple.c (get_rename_from_scev): Use
+ 	cached_scalar_evolution_in_region.
+ 	* graphite-scop-detection.c (scop_detection::can_represent_loop):
+ 	Simplify.
+ 	(scop_detection::graphite_can_represent_expr: Use
+ 	cached_scalar_evolution_in_region.
+ 	(scop_detection::stmt_simple_for_scop_p): Likewise.
+ 	(find_params_in_bb): Likewise.
+ 	(gather_bbs::before_dom_children): Likewise.
+ 	* graphite-sese-to-poly.c (create_pw_aff_from_tree): Likewise.
+ 	(add_loop_constraints): Likewise.
+ 
+ 2019-02-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/89210
+ 	* fold-const-call.c (fold_const_vec_convert): Pass true as last
+ 	operand to new_unary_operation only if both element types are integral
+ 	and it isn't a widening conversion.  Return NULL_TREE if
+ 	new_unary_operation failed.
+ 
+ 2019-02-05  Andreas Krebbel  <krebbel@linux.ibm.com>
+ 
+ 	PR target/88856
+ 	* config/s390/s390.md: Remove load and test FP splitter.
+ 
+ 2019-02-05  Aaron Sawdey  <acsawdey@linux.ibm.com>
+ 
+ 	PR target/89112
+ 	* config/rs6000/rs6000-string.c (do_ifelse, expand_cmp_vec_sequence,
+ 	expand_compare_loop, expand_block_compare_gpr,
+ 	expand_strncmp_align_check, expand_strncmp_gpr_sequence): Insert
+ 	REG_BR_PROB notes in inline expansion of memcmp/strncmp. Add
+ 	#include "profile-count.h" and "predict.h" for types and functions
+ 	needed to work with REG_BR_PROB notes.
+ 
+ 2019-02-05  Aaron Sawdey  <acsawdey@linux.ibm.com>
+ 
+ 	PR target/89112
+ 	* config/rs6000/rs6000.md (<bd>tf_<mode>): Generate a local label
+ 	for the long branch case.
+ 
+ 2019-02-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89188
+ 	* dce.c (delete_unmarked_insns): Don't remove no-op moves if they
+ 	can throw, non-call exceptions are enabled and we can't delete
+ 	dead exceptions or alter cfg.  Set must_clean if
+ 	delete_insn_and_edges returns true, don't set it blindly for calls.
+ 	Assert that delete_unreachable_blocks is called only if can_alter_cfg.
+ 
+ 	PR rtl-optimization/89195
+ 	* combine.c (make_extraction): For MEMs, don't extract bytes outside
+ 	of the original MEM.
+ 
+ 2019-02-05  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR gcov-profile/89000
+ 	* gcov.c (function_summary): Remove argument.
+ 	(file_summary): New function.
+ 	(print_usage): Replace tabs with spaces.
+ 	(generate_results): Use new function file_summary.
+ 
+ 2019-02-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89186
+ 	* optabs.c (prepare_cmp_insn): Pass x and y to
+ 	emit_block_comp_via_libcall rather than XEXP (x, 0) and XEXP (y, 0).
+ 
+ 2019-02-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/89150
+ 	* bitmap.h (struct bitmap_obstack): Do not mark GTY.
+ 	(struct bitmap_element): Drop chain_prev so we properly recurse on
+ 	the prev member, supporting tree views.
+ 	(struct bitmap_head): GTY skip the obstack member.
+ 
+ 2019-02-04  Alexander Monakov  <amonakov@ispras.ru>
+ 
+ 	PR c/88698
+ 	* doc/extend.texi (Vector Extensions): Add an example of using vector
+ 	types together with x86 intrinsics.
+ 
+ 2019-02-04  Alan Modra  <amodra@gmail.com>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_indirect_call_template_1): Increase
+ 	str[] size to 160, and comment.
+ 
+ 2019-02-04  Alan Modra  <amodra@gmail.com>
+ 
+ 	* config/rs6000/rs6000.c (rs6000_indirect_call_template_1),
+ 	(rs6000_pltseq_template): Guard output of TLS markers with
+ 	TARGET_TLS_MARKERS.
+ 	(rs6000_longcall_ref, rs6000_call_aix, rs6000_call_sysv),
+ 	(rs6000_sibcall_sysv): Ignore TARGET_TLS_MARKERS when deciding
+ 	to use inline PLT sequences.
+ 	* config/rs6000/rs6000.md (pltseq_tocsave_<mode>),
+ 	(pltseq_plt16_ha_<mode>, pltseq_plt16_lo_<mode>),
+ 	(pltseq_mtctr_<mode>): Don't test TARGET_TLS_MARKERS in predicate.
+ 
+ 2019-02-04  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR ipa/88985
+ 	* ipa-fnsummary.c (estimate_edge_devirt_benefit): Bail
+ 	out when ipa_fn_summaries does not contain entry for callee.
+ 
+ 2019-02-04  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* config/sparc/sparc.h: Remove superfluous blank lines.
+ 	* config/sparc/sparc.c (global_offset_table_rtx): Rename into...
+ 	(got_register_rtx): ...this.
+ 	(sparc_got): Adjust to above renaming.
+ 	(sparc_tls_got): Likewise.
+ 	(sparc_delegitimize_address): Likewise.
+ 	(sparc_output_mi_thunk): Likewise.
+ 	(sparc_init_pic_reg): Likewise.
+ 	(save_local_or_in_reg_p): Fix test on the GOT register.
+ 	(USE_HIDDEN_LINKONCE): Move around.
+ 	(get_pc_thunk_name): Likewise.
+ 	(gen_load_pcrel_sym): Likewise.
+ 	(load_got_register): Likewise.
+ 
+ 2019-02-04  Kito Cheng  <kito.cheng@gmail.com>
+ 
+ 	* config/nds32/linux.h (GLIBC_DYNAMIC_LINKER): Define the naming rule
+ 	of the dynamic linker: "ld-linux-nds32[le|be][f].so.1".
+ 
+ 2019-02-04  Chung-Ju Wu  <jasonwucj@gmail.com>
+ 
+ 	* config/nds32/nds32.c (nds32_legitimate_address_p): Add TLS model
+ 	into consideration.
+ 
+ 2019-02-04  Chung-Ju Wu  <jasonwucj@gmail.com>
+ 
+ 	* config.gcc (with_nds32_lib, glibc):
+ 	Remove TARGET_DEFAULT_TLSDESC_TRAMPOLINE=0 setting.
+ 	* config/nds32/linux.h (TARGET_DEFAULT_TLSDESC_TRAMPOLINE): Delete.
+ 	(NDS32_TLSDESC_TRAMPOLINE_SPEC): Delete.
+ 
+ 2019-02-03  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89071
+ 	* config/i386/i386.md (*sqrt<mode>2_sse): Add (v,0) alternative.
+ 	Do not prefer (v,v) alternative for non-AVX targets and (m,v)
+ 	alternative for speed when TARGET_SSE_PARTIAL_REG_DEPENDENCY is set.
+ 	(*rcpsf2_sse): Ditto.
+ 	(*rsqrtsf2_sse): Ditto.
+ 	(sse4_1_round<mode<2): Ditto.
+ 
+ 2019-02-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/87295
+ 	* dwarf2out.c (copy_ancestor_tree): Register non-stubs as
+ 	orig.
+ 
+ 2019-02-02  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/87887
+ 	* config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
+ 	Punt with warning on aggregate return or argument types.  Ignore
+ 	type/mode checking for uniform arguments.
+ 
+ 2019-02-01  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* combine.c (try_combine): Do not print "Can't combine" messages unless
+ 	printing failed combination attempts.
+ 
+ 2019-02-01  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR hsa/87863
+ 	* omp-grid.c (grid_mark_variable_segment): Set assembler name of group
+ 	segment and global segment variables before making them static.
+ 
+ 2019-02-01  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* omp-grid.c (grid_target_follows_gridifiable_pattern): Guard two
+ 	missed optimization dump with dump_enabled_p.
+ 
+ 2019-02-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/88597
+ 	* tree-scalar-evolution.c (analyze_scalar_evolution): Set up
+ 	the instantiate cache.
+ 	(instantiate_scev_binary): Elide second operand procesing
+ 	if equal to the first.
+ 	* tree-chrec.c (chrec_contains_symbols): Add visited set.
+ 	(chrec_contains_undetermined): Likewise.
+ 	(tree_contains_chrecs): Likewise.
+ 
+ 2019-02-01  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* parms.def (MAX_INLINE_INSNS_SINGLE): Reduce from 400 to 200.
+ 
+ 2019-02-01  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/89143
+ 	* wide-int-range.h (wide_int_range_absu): Declare.
+ 	* wide-int-range.cc (wide_int_range_absu): New function.
+ 	* tree-vrp.c (extract_range_from_unary_expr): Handle ABSU_EXPR.
+ 
+ 	PR tree-optimization/88107
+ 	* tree-cfg.c (find_outermost_region_in_block): Add ALL argument,
+ 	instead of assertion that eh_region_outermost is non-NULL, if it
+ 	is NULL, set *ALL to true and return NULL.
+ 	(move_sese_region_to_fn): Adjust caller, if all is set, call
+ 	duplicate_eh_regions with NULL region.
+ 
+ 2019-02-01  Richard Biener  <rguenth@suse.de>
+ 
+ 	PR rtl-optimization/88593
+ 	* mode-switching.c (optimize_mode_switching): Free dominators before
+ 	calling cleanup_cfg.
+ 
+ 2019-02-01  Bin Cheng  <bin.cheng@linux.alibaba.com>
+ 
+ 	PR tree-optimization/88932
+ 	* tree-predcom.c (try_combine_chains): Get loop bbs in dom order.
+ 
+ 2019-01-31  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/89137
+ 	* omp-low.c (lower_omp_task_reductions): Drop redundant test to avoid
+ 	bogus clang warning.
+ 
+ 2019-01-31  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/89071
+ 	* config/i386/i386.md (*extendsfdf2): Split out reg->reg
+ 	alternative to avoid partial SSE register stall for TARGET_AVX.
+ 	(truncdfsf2): Ditto.
+ 	(sse4_1_round<mode>2): Ditto.
+ 
+ 2018-01-31  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 
+ 	PR tree-optimization/89008
+ 	* gimple-ssa-strength-reduction.c (slsr_process_mul): Don't
+ 	process anything of the form X * 0.
+ 
+ 2019-01-31  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89135
+ 	* tree-ssa-phiprop.c (pass_phiprop::execute): Skip blocks
+ 	with abnormal preds.
+ 
+ 2019-01-31  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR sanitizer/89124
+ 	* ipa-inline.c (sanitize_attrs_match_for_inline_p): Allow inlining
+ 	always_inline callees into no_sanitize_address callers.
+ 
+ 2019-01-31  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR rtl-optimization/89115
+ 	* lra.c (lra_rtx_hash): Properly hash CONST_INT values.
+ 
+ 2019-01-30  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR other/89106
+ 	* doc/extend.texi (cast to a union): Correct and expand.
+ 
+ 2019-01-30  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/87246
+ 	* lra-constraints.c (simplify_operand_subreg): Reload memory
+ 	in subreg if the address became invalid.
+ 
+ 2019-01-30  Bill Schmidt  <wschmidt@linux.ibm.com>
+ 
+ 	PR target/87064
+ 	* config/rs6000/vsx.md (*vsx_reduc_<VEC_reduc_name>_v4sf_scalar):
+ 	Disable for little-endian.
+ 
+ 2019-01-30  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR rtl-optimization/89115
+ 	* opts.c (default_options_optimization): Reduce
+ 	PARAM_MAX_DSE_ACTIVE_LOCAL_STORES by a factor of 10 at -O1.
+ 	Make PARAM_LOOP_INVARIANT_MAX_BBS_IN_LOOP reduction relative
+ 	to the default.
+ 
+ 2019-01-30  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+ 
+ 	* config/rs6000/rs6000-c.c (altivec-resolve_overloaded_builtin):
+ 	Change handling of ALTIVEC_BUILTIN_VEC_EXTRACT.  Coerce result to
+ 	type of vector element when vec_extract is implemented by direct
+ 	move.
+ 
+ 2019-01-30  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	* doc/invoke.texi (C Language Options): List "-fopenacc-dim".
+ 
+ 2019-01-30  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89111
+ 	* tree-ssa-loop-im.c (gather_mem_refs_stmt): Restrict
+ 	canonicalization to appropriately sized access types.
+ 
+ 2019-01-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/89105
+ 	* config/i386/i386.c (ix86_warn_parameter_passing_abi): Don't warn
+ 	for arguments to functions that are TU-local and shouldn't be
+ 	referenced by assembly.
+ 
+ 2019-01-30  Ulrich Drepper  <drepper@redhat.com>
+ 
+ 	* dumpfile.c (opt_info_switch_p_1): Ignore '-' if it appears
+ 	after '='.
+ 
+ 2019-01-29  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR c/88956
+ 	* gimple-fold.c (fold_array_ctor_reference): Avoid zero-length arrays.
+ 
+ 2019-01-29  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/66676
+ 	PR ipa/89104
+ 	* omp-simd-clone.c (simd_clone_clauses_extract)
+ 	<case OMP_CLAUSE_ALIGNED>: Ignore clauses with NULL
+ 	OMP_CLAUSE_ALIGNED_ALIGNMENT.
+ 
+ 2019-01-29  Vineet Gupta  <vgupta@synopsys.com>
+ 
+ 	* config.gcc: Force .init_array for ARC.
+ 
+ 2019-01-29  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/87295
+ 	* dwarf2out.c (collect_skeleton_dies): New helper.
+ 	(copy_decls_for_unworthy_types): Call it.
+ 	(build_abbrev_table): Assert we do not try to replace
+ 	DW_AT_signature refs with local refs.
+ 
+ 2019-01-28  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/89002
+ 	* gimplify.c (gimplify_omp_for): When adding OMP_CLAUSE_*_GIMPLE_SEQ
+ 	for lastprivate/linear IV, push gimplify context around gimplify_assign
+ 	and, if it needed any temporaries, pop it into a gimple bind around the
+ 	sequence.
+ 
+ 2019-01-28  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	* common.opt (-Wattribute-alias): Remove "no-" from name.
+ 	Make -Wattribute-alias command line option and
+ 	#pragma GCC diagnostic ignored "-Wattribute-alias" work again.
+ 
+ 2019-01-28  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89073
+ 	* doc/invoke.texi (-mclwb, -mprfchw, -mrdpid, -mrdseed, -msgx,
+ 	-madx, -mhle, -mavx5124fmaps, -mavx512vnni, -mavx5124vnniw): Document
+ 	x86 ISA options.
+ 	(bmi2): Add missing @opindex.
+ 	* doc/extend.texi (x86 target attribute): Move fma4, lwp, ssse3
+ 	options alphabetically.  Add missing 3dnow, 3dnowa, adx, avx, avx2,
+ 	avx5124fmaps, avx5124vnniw, avx512bitalg, avx512bw, avx512cd,
+ 	avx512dq, avx512er, avx512f, avx512ifma, avx512pf, avx512vbmi,
+ 	avx512vbmi2, avx512vl, avx512vnni, avx512vpopcntdq, bmi, bmi2,
+ 	cldemote, clflushopt, clwb, clzero, crc32, cx16, f16c, fma, fsgsbase,
+ 	fxsr, gfni, hle, lzcnt, movbe, movdir64b, movdiri, mwaitx, pconfig,
+ 	pku, prefetchwt1, prfchw, ptwrite, rdpid, rdrnd, rdseed, rtm, sahf,
+ 	sgx, sha, shstk, tbm, vaes, vpclmulqdq, waitpkg, wbnoinvd, xsave,
+ 	xsavec, xsaveopt and xsaves options.
+ 
+ 2019-01-28  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/89076
+ 	* dwarf2out.c (gen_subprogram_die): Remove leftover from MPX
+ 	support removal.
+ 
+ 2019-01-28  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/88739
+ 	* tree-cfg.c (verify_types_in_gimple_reference): Verify
+ 	BIT_FIELD_REFs only are applied to mode-precision operands
+ 	when they are integral.
+ 	(verify_gimple_assign_ternary): Likewise for BIT_INSERT_EXPR.
+ 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Avoid generating
+ 	BIT_FIELD_REFs of non-mode-precision integral operands.
+ 
+ 2019-01-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/87214
+ 	* config/i386/sse.md
+ 	(<mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>,
+ 	avx512f_shuf_<shuffletype>64x2_1<mask_name>): Ensure the
+ 	first constants in pairs are multiples of 2.  Formatting fixes.
+ 	(avx512vl_shuf_<shuffletype>32x4_1<mask_name>,
+ 	avx512vl_shuf_<shuffletype>32x4_1<mask_name>): Ensure the
+ 	first constants in each quadruple are multiples of 4.  Formatting fixes.
+ 
+ 2019-01-26  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/88933
+ 	* tree-inline.c: Include tree-cfgcleanup.h.
+ 	(delete_unreachable_blocks_update_callgraph): Move...
+ 	* tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
+ 	...here, make externally visible, make second argument bool, adjust
+ 	all callers.
+ 	* tree-cfgcleanup.c: Include cgraph.h.
+ 	* tree-cfgcleanup.h (delete_unreachable_blocks_update_callgraph):
+ 	Declare.
+ 	* ipa-prop.c: Include tree-cfgcleanup.h.
+ 	(ipcp_transform_function): Call
+ 	delete_unreachable_blocks_update_callgraph instead of cleaning uo CFG.
+ 
+ 2019-01-25  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/88846
+ 	* ira.c (process_set_for_memref_referenced_p): New.
+ 	(memref_referenced_p): Add new param.  Use
+ 	process_set_for_memref_referenced_p.  Add new switch cases.
+ 	(memref_used_between_p): Pass new arg to memref_referenced_p.
+ 
+ 2019-01-25  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/88469
+ 	* config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add new
+ 	argument ABI_BREAK.  Set to true if the calculated alignment has
+ 	changed in gcc-9.  Check bit-fields for their base type alignment.
+ 	(aarch64_layout_arg): Warn if argument passing has changed in gcc-9.
+ 	(aarch64_function_arg_boundary): Likewise.
+ 	(aarch64_gimplify_va_arg_expr): Likewise.
+ 
+ 2019-01-25  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/89037
+ 	* varasm.c (output_constructor_bitfield): Use wi::extract_uhwi
+ 	instead of accessing TREE_INT_CST_ELT directly.
+ 
+ 2019-01-25  Christophe Lyon  <christophe.lyon@linaro.org>
+ 
+ 	* doc/sourcebuild.texi (Environment attributes): Add fenv and
+ 	fenv_exceptions description.
+ 
+ 2019-01-25  Wilco Dijkstra  <wdijkstr@arm.com>
+ 
+ 	PR rtl-optimization/87763
+ 	* config/aarch64/aarch64.c (aarch64_select_cc_mode):
+ 	Allow SUBREG when matching CC_NZmode compare.
+ 
+ 2019-01-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89049
+ 	* tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
+ 	Look at the pattern stmt to determine if the stmt is vectorized.
+ 
+ 2019-01-25  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (*pred_mov<mode>)
+ 	(pred_mov<mode>): Handle all-register forms using both a new
+ 	alternative and a split.
+ 
+ 2019-01-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/86865
+ 	* graphite-scop-detection.c (scop_detection::can_represent_loop):
+ 	Reject non-do-while loops.
+ 
+ 2019-01-24  Peter Bergner  <bergner@linux.ibm.com>
+ 
+ 	* config/rs6000/altivec.md (build_vector_mask_for_load): Use MEM_P.
+ 	* config/rs6000/constraints.md (Q constraint): Use REG_P.
+ 	* config/rs6000/darwin.h (PREFERRED_RELOAD_CLASS): Use SYMBOL_REF_P.
+ 	* config/rs6000/freebsd64.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Use
+ 	SYMBOL_REF_P, CONST_INT_P and CONST_DOUBLE_P.
+ 	* config/rs6000/linux64.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
+ 	* config/rs6000/predicates.md (altivec_register_operand, vint_operand,
+ 	vsx_register_operand, vsx_reg_sfsubreg_ok, vfloat_operand,
+ 	vlogical_operand, gpc_reg_operand, int_reg_operand,
+ 	int_reg_operand_not_pseudo): Use SUBREG_P and HARD_REGISTER_P.
+ 	(ca_operand, base_reg_operand, htm_spr_reg_operand, cc_reg_operand,
+ 	cc_reg_not_cr0_operand, input_operand): Use SUBREG_P.
+ 	(save_world_operation, restore_world_operation, lmw_operation,
+ 	stmw_operation): Use MEM_P and REG_P.
+ 	(tie_operand): Use MEM_P.
+ 	(vrsave_operation, crsave_operation): Use REG_P.
+ 	(mfcr_operation, mtcrf_operation): Use REG_P and CONST_INT_P.
+ 	(fpr_reg_operand): Use SUBREG_P and HARD_REGISTER_NUM_P.
+ 	(quad_int_reg_operand): Use HARD_REGISTER_NUM_P.
+ 	(call_operand): Use HARD_REGISTER_P.
+ 	(indexed_or_indirect_operand, altivec_indexed_or_indirect_operand):
+ 	Use CONST_INT_P.
+ 	(lwa_operand): Use SUBREG_P, REG_P and CONST_INT_P.
+ 	* config/rs6000/rs6000-p8swap.c (insn_is_load_p, insn_is_store_p,
+ 	quad_aligned_load_p, replace_swapped_aligned_store,
+ 	recombine_lvx_pattern, replace_swapped_aligned_load,
+ 	recombine_stvx_pattern): Use MEM_P.
+ 	(const_load_sequence_p, adjust_vperm, replace_swapped_load_constant):
+ 	Use MEM_P and SYMBOL_REF_P.
+ 	(rtx_is_swappable_p): Use REG_P and CONST_INT_P.
+ 	(insn_is_swappable_p): Use REG_P and MEM_P.
+ 	(insn_is_swap_p, (alignment_mask): Use CONST_INT_P.
+ 	* config/rs6000/rs6000-string.c (expand_block_clear, expand_block_move):
+ 	Use CONST_INT_P.
+ 	* config/rs6000/rs6000.c (rs6000_secondary_reload, rs6000_emit_cmove):
+ 	Use CONST_DOUBLE_P.
+ 	(rs6000_output_move_128bit): Use CONST_DOUBLE_P, CONST_INT_P and
+ 	CONST_WIDE_INT_P.
+ 	(rs6000_legitimize_address): Use CONST_DOUBLE_P, CONST_INT_P,
+ 	CONST_WIDE_INT_P, REG_P and SYMBOL_REF_P.
+ 	(rs6000_emit_move): Use CONST_DOUBLE_P, CONST_INT_P, HARD_REGISTER_P,
+ 	HARD_REGISTER_NUM_P, MEM_P, REG_P, SUBREG_P, SYMBOL_REF_P and
+ 	reg_or_subregno:
+ 	(output_toc): Use CONST_DOUBLE_P, CONST_INT_P and SYMBOL_REF_P.
+ 	(easy_altivec_constant, rs6000_legitimate_offset_address_p,
+ 	rs6000_mode_dependent_address, rs6000_expand_mtfsf_builtin,
+ 	rs6000_expand_set_fpscr_rn_builtin, rs6000_expand_set_fpscr_drn_builtin,
+ 	rs6000_expand_unop_builtin, INT_P, rs6000_generate_compare,
+ 	rs6000_machopic_legitimize_pic_address, rs6000_split_logical_inner,
+ 	rs6000_split_logical_di): Use CONST_INT_P.
+ 	(rs6000_legitimize_reload_address): Use CONST_INT_P, HARD_REGISTER_P,
+ 	REG_P and SYMBOL_REF_P.
+ 	(setup_incoming_varargs, rs6000_rtx_costs): Use CONST_INT_P and MEM_P.
+ 	(print_operand): Use CONST_INT_P, MEM_P and REG_P.
+ 	(virtual_stack_registers_memory_p, rs6000_legitimate_address_p,
+ 	mems_ok_for_quad_peep): Use CONST_INT_P and REG_P.
+ 	(rs6000_secondary_reload_memory): Use CONST_INT_P and SUBREG_P.
+ 	(small_data_operand, print_operand_address): Use CONST_INT_P and
+ 	SYMBOL_REF_P.
+ 	(split_stack_arg_pointer_used_p): Use HARD_REGISTER_P.
+ 	(rs6000_init_hard_regno_mode_ok, direct_move_p):
+ 	Use HARD_REGISTER_NUM_P.
+ 	(rs6000_secondary_reload_gpr): Use HARD_REGISTER_NUM_P and MEM_P.
+ 	(rs6000_secondary_reload_class): Use HARD_REGISTER_NUM_P, REG_P,
+ 	SUBREG_P and SYMBOL_REF_P.
+ 	(register_to_reg_type, rs6000_secondary_reload_inner): Use SUBREG_P
+ 	and HARD_REGISTER_NUM_P.
+ 	(rs6000_adjust_vec_address): Use HARD_REGISTER_NUM_P and
+ 	reg_or_subregno.
+ 	(rs6000_adjust_cost, find_mem_ref): Use MEM_P.
+ 	(macho_lo_sum_memory_operand, rs6000_eliminate_indexed_memrefs): Use
+ 	MEM_P and REG_P.
+ 	(legitimate_indirect_address_p, legitimate_lo_sum_address_p,
+ 	registers_ok_for_quad_peep, rs6000_output_function_epilogue,
+ 	find_addr_reg): Use REG_P.
+ 	(altivec_expand_vec_perm_const): Use REG_P and SUBREG_P.
+ 	(rs6000_emit_le_vsx_move): Use SUBREG_P.
+ 	(offsettable_ok_by_alignment, constant_pool_expr_p,
+ 	legitimate_small_data_p, rs6000_output_dwarf_dtprel,
+ 	rs6000_delegitimize_address, rs6000_const_not_ok_for_debug_p,
+ 	rs6000_cannot_force_const_mem, rs6000_output_addr_const_extra,
+ 	rs6000_assemble_integer, create_TOC_reference,
+ 	rs6000_emit_allocate_stack, rs6000_xcoff_encode_section_info,
+ 	rs6000_call_aix, rs6000_call_aix): Use SYMBOL_REF_P.
+ 	(rs6000_split_vec_extract_var): Use reg_or_subregno.
+ 	* config/rs6000/rtems.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Use
+ 	CONST_DOUBLE_P, CONST_INT_P and SYMBOL_REF_P.
+ 	* config/rs6000/sysv4.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
+ 	* config/rs6000/xcoff.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
+ 	* config/rs6000/rs6000.h (RS6000_SYMBOL_REF_TLS_P): Use SYMBOL_REF_P.
+ 	(REGNO_OK_FOR_INDEX_P, REGNO_OK_FOR_BASE_P): Use HARD_REGISTER_NUM_P.
+ 	(INT_REG_OK_FOR_INDEX_P, INT_REG_OK_FOR_BASE_P): Use HARD_REGISTER_P.
+ 	(CONSTANT_ADDRESS_P): Use CONST_INT_P and SYMBOL_REF_P.
+ 	* config/rs6000/rs6000.md (define_expands strlensi, mod<mode>3
+ 	and cbranch<mode>4): Use CONST_INT_P.
+ 	(multiple define_splits): Use REG_P and SUBREG_P.
+ 	(define_expands call, call_value): Use MEM_P.
+ 	(define_expands sibcall, sibcall_value): Use CONST_INT_P and  MEM_P.
+ 	(define insn *mtcrfsi): Use CONST_INT_P and REG_P.
+ 	* config/rs6000/vsx.md (*vsx_le_perm_load_<mode>,
+ 	*vsx_le_perm_load_v8hi, *vsx_le_perm_load_v16qi): Use HARD_REGISTER_P
+ 	and HARD_REGISTER_NUM_P.
+ 	(multiple define_splits): Use HARD_REGISTER_NUM_P.
+ 
+ 2019-01-24  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR rtl-optimization/88948
+ 	* rtl.h (prepare_copy_insn): New prototype.
+ 	* gcse.c (prepare_copy_insn): New function, split out from
+ 	process_insert_insn.
+ 	(process_insert_insn): Use prepare_copy_insn.
+ 	* store-motion.c (replace_store_insn): Use prepare_copy_insn
+ 	instead of gen_move_insn.
+ 
+ 2019-01-24  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR debug/89006
+ 	* config/i386/i386.c (ix86_pic_register_p): Return true for
+ 	UNSPEC_SET_GOT too.
+ 
+ 	PR tree-optimization/88964
+ 	* gimple-loop-interchange.cc (loop_cand::analyze_induction_var): Also
+ 	punt if HONOR_SNANS (chrec).
+ 
+ 	PR middle-end/89015
+ 	* tree-nested.c (convert_nonlocal_reference_stmt,
+ 	convert_local_reference_stmt, convert_tramp_reference_stmt,
+ 	convert_gimple_call) <case GIMPLE_OMP_TEAMS>: Treat
+ 	gimple_omp_teams_host teams stmts like GIMPLE_OMP_PARALLEL
+ 	or GIMPLE_OMP_TASK.
+ 
+ 	PR tree-optimization/89027
+ 	* tree-inline.c (add_clobbers_to_eh_landing_pad): Don't add clobbers
+ 	for "omp simd array" variables.
+ 
+ 2019-01-24  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/88469
+ 	* profile-count.h (profile_count): On ARM systems using GCC 6/7/8
+ 	force the alignment of m_val.
+ 
+ 2019-01-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR lto/87187
+ 	* tree-streamer-out.c (write_ts_decl_common_tree_pointers):
+ 	When in "legacy" debug mode make sure to reset self-origins.
+ 
+ 2019-01-24  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR gcov-profile/88994
+ 	* gcov-io.c (mangle_path): Do not allocate a bigger buffer,
+ 	result will be always smaller or equal to the original.
+ 	* gcov.c (mangle_name): Fix else branch where we should
+ 	also copy to PTR and shift the pointer.
+ 
+ 2019-01-24  Xiong Hu Luo  <luoxhu@linux.vnet.ibm.com>
+ 
+ 	* tree-ssa-dom.c (test_for_singularity): Fix a comment typo.
+ 	* vr-values.c (find_case_label_ranges): Fix a comment typo.
+ 
+ 2019-01-23  Xuepeng Guo  <xuepeng.guo@intel.com>
+ 
+ 	* common/config/i386/i386-common.c
+ 	(OPTION_MASK_ISA_ENQCMD_SET,
+ 	OPTION_MASK_ISA_ENQCMD_UNSET): New macros.
+ 	(ix86_handle_option): Handle -menqcmd.
+ 	* config.gcc (enqcmdintrin.h): New header file.
+ 	* config/i386/cpuid.h (bit_ENQCMD): New bit.
+ 	* config/i386/driver-i386.c (host_detect_local_cpu): Handle
+ 	-menqcmd.
+ 	* config/i386/i386-builtin-types.def ((INT, PVOID, PCVOID)): New
+ 	function type.
+ 	* config/i386/i386-builtin.def (__builtin_ia32_enqcmd,
+ 	__builtin_ia32_enqcmds): New builtins.
+ 	* config/i386/i386-c.c (__ENQCMD__): New macro.
+ 	* config/i386/i386-option.c (ix86_target_string): Add
+ 	-menqcmd.
+ 	(ix86_valid_target_attribute_inner_p): Likewise.
+ 	* config/i386/i386-expand.c
+ 	(ix86_expand_builtin): Expand IX86_BUILTIN_ENQCMD and
+ 	IX86_BUILTIN_ENQCMDS.
+ 	* config/i386/i386.h (TARGET_ENQCMD): New.
+ 	* config/i386/i386.md (UNSPECV_ENQCMD, UNSPECV_ENQCMDS): New.
+ 	(@enqcmd<enqcmd_sfx>_<mode>): New insn pattern.
+ 	(movdir64b_<mode>): Parameterize to enable share expansion code
+ 	with ENQCMD in function ix86_expand_builtin.
+ 	* config/i386/i386.opt: Add -menqcmd.
+ 	* config/i386/immintrin.h: Include enqcmdintrin.h.
+ 	* config/i386/enqcmdintrin.h: New intrinsic file.
+ 	* doc/invoke.texi: Add -menqcmd.
+ 
+ 2019-01-23  Bin Cheng  <bin.cheng@arm.com>
+ 	    Steve Ellcey  <sellcey@marvell.com>
+ 
+ 	PR target/85711
+ 	* recog.c (address_operand): Return false on wrong mode for address.
+ 	(constrain_operands): Check for mode with 'p' constraint.
+ 
+ 2019-01-23  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/88998
+ 	* config/i386/sse.md (sse2_cvtpi2pd): Add SSE alternatives.
+ 	Disparage MMX alternative.
+ 	(sse2_cvtpd2pi): Ditto.
+ 	(sse2_cvttpd2pi): Ditto.
+ 
+ 2019-01-23  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR driver/89014
+ 	* config/aarch64/driver-aarch64.c (host_detect_local_cpu): Fix
+ 	use-after-free of the result of
+ 	aarch64_get_extension_string_for_isa_flags.
+ 
+ 2019-01-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/44715
+ 	* doc/extend.texi: Document break and continue behavior in
+ 	statement expressions.
+ 
+ 2019-01-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/89008
+ 	* tree-ssa-reassoc.c (eliminate_using_constants): For * 0 do
+ 	not leave another stray operand.
+ 
+ 2019-01-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* BASE-VER: Bump to 9.0.1.
+ 
+ 2019-01-23  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* cgraphunit.c (cgraph_node::expand_thunk): When expanding a GIMPLE
+ 	thunk that returns by reference, use the type of the return object
+ 	of the thunk instead of that of the alias to build the dereference.
+ 
+ 2019-01-23  Vineet Gupta  <vgupta@synopsys.com>
+ 
+ 	* config/arc/atomic.md: Add operand to DMB instruction.
+ 
+ 2019-01-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/88964
+ 	* gimple-loop-interchange.cc (loop_cand::analyze_induction_var): Use
+ 	build_zero_cst instead of build_int_cst.  Return false for loop
+ 	invariants which honor signed zeros.
+ 
+ 2019-01-22  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* doc/invoke.texi (-fsplit-paths): This is enabled by default at -O3.
+ 
+ 2019-01-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/88965
+ 	* config/rs6000/rs6000.c: Include tree-vrp.h and tree-ssanames.h.
+ 	(rs6000_gimple_fold_builtin): If MEM_REF address doesn't satisfy
+ 	is_gimple_mem_ref_addr predicate, force it into a SSA_NAME first.
+ 
+ 	PR middle-end/88968
+ 	* gimplify.c (gimplify_omp_atomic): Handle bitfield atomics with
+ 	non-integral DECL_BIT_FIELD_REPRESENTATIVEs.
+ 
+ 	PR target/87064
+ 	* config/rs6000/vsx.md (*vsx_reduc_<VEC_reduc_name>_v2df_scalar):
+ 	Disable for little endian.
+ 
+ 2019-01-22  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/88469
+ 	* config/arm/arm.c (arm_needs_double_word_align): Check
+ 	DECL_BIT_FIELD_TYPE.
+ 
+ 2019-01-22  Hongtao Liu  <hongtao.liu@intel.com>
+ 	    H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/88909
+ 	* config/i386/i386-builtin.def: Add mask2 to all builtin
+ 	initializations.  Merge ARGS2 and SPECIAL_ARGS2 into ARGS and
+ 	SPECIAL_ARGS.
+ 	* config/i386/i386.c (BDESC): Add mask2 to the definition.
+ 	(BDESC_FIRST): Likewise.
+ 	(define_builtin): Add an argument for mask2.  Updated to handle
+ 	both ix86_isa_flags and ix86_isa_flags2.
+ 	(define_builtin_const): Likewise.
+ 	(define_builtin_pure): Likewise.
+ 	(define_builtin2): Deleted.
+ 	(define_builtin_const2): Likewise.
+ 	(builtin_description): Add a member, mask2.
+ 	(bdesc_*): Add mask2 to builtin initializations.
+ 	(ix86_init_mmx_sse_builtins): Update calls to def_builtin,
+ 	def_builtin_const and def_builtin_pure.  Remove SPECIAL_ARGS2
+ 	support.
+ 	(ix86_get_builtin_func_type): Remove SPECIAL_ARGS2 support.
+ 
+ 2019-01-22  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/88954
+ 	* config/i386/i386.c (ix86_force_load_from_GOT_p): Also check
+ 	noplt attribute.
+ 
+ 2019-01-22  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/88469
+ 	* config/arm/arm.c (arm_needs_doubleword_align): Return 2 if a record's
+ 	alignment is dominated by a bitfield with 64-bit aligned base type.
+ 	(arm_function_arg): Emit a warning if the alignment has changed since
+ 	earlier GCC releases.
+ 	(arm_function_arg_boundary): Likewise.
+ 	(arm_setup_incoming_varargs): Likewise.
+ 
+ 2019-01-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/88862
+ 	* graphite-scop-detection.c
+ 	(scop_detection::graphite_can_represent_scev): Reject ADDR_EXPR.
+ 
+ 2019-01-22  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* doc/extend.tex (AMD GCN Function Attributes): New section.
+ 	* doc/install.texi (amdgcn-unknown-amdhsa): New instructions.
+ 	* doc/invoke.texi (AMD GCN Options): New section.
+ 	* doc/md.texi (Constraints for Particular Machines): Add AMD GCN.
+ 
+ 2019-01-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* config/sparc/sparc.c (parc_delegitimize_address): Recognize the GOT
+ 	register and decoded HIGH/LO_SUM combinations for labels in PIC mode.
+ 
+ 2019-01-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/88044
+ 	* tree-ssa-loop-niter.c (number_of_iterations_cond): If condition
+ 	is false in the first iteration, but !every_iteration, return false
+ 	instead of true with niter->niter zero.
+ 
+ 	PR rtl-optimization/88904
+ 	* cfgcleanup.c (thread_jump): Verify cond2 doesn't mention
+ 	any nonequal registers before processing BB_END (b).
+ 
+ 	PR target/88905
+ 	* optabs.c (add_equal_note): Add op0_mode argument, use it instead of
+ 	GET_MODE (op0).
+ 	(expand_binop_directly, expand_doubleword_clz,
+ 	expand_doubleword_popcount, expand_ctz, expand_ffs,
+ 	expand_unop_direct, maybe_emit_unop_insn): Adjust callers.
+ 
+ 	PR rtl-optimization/49429
+ 	PR target/49454
+ 	PR rtl-optimization/86334
+ 	PR target/88906
+ 	* expr.c (emit_block_move_hints): Move marking of MEM_EXPRs
+ 	addressable from here...
+ 	(emit_block_op_via_libcall): ... to here.
+ 
+ 2019-01-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.c (vect_analyze_loop_operations): Use
+ 	auto_vec for cost vector to fix memleak.
+ 	(vectorize_fold_left_reduction): Properly gather SLP defs.
+ 	(vectorizable_comparison): Do not swap operands to properly
+ 	gather SLP defs.
+ 
+ 2019-01-22  Alan Modra  <amodra@gmail.com>
+ 
+ 	PR target/88614
+ 	* config/rs6000/predicates.md (unspec_tls): Ensure GOT reg
+ 	stays a reg.  Allow a const_int.
+ 	* config/rs6000/rs6000-protos.h (rs6000_output_tlsargs): Declare.
+ 	* config/rs6000/rs6000.h (IS_V4_FP_ARGS): Define.
+ 	(IS_NOMARK_TLSGETADDR): Define.
+ 	* config/rs6000/rs6000.c (edit_tls_call_insn): Delete.
+ 	(rs6000_output_tlsargs): New function.
+ 	(rs6000_legitimize_tls_address): Don't say a !TARGET_TLS_MARKERS
+ 	__tls_get_addr call takes an arg.
+ 	(rs6000_call_sysv): Generate sysv4 secure plt call pattern here..
+ 	* config/rs6000/rs6000.md (call_nonlocal_sysv): ..rather than here,
+ 	delete split..
+ 	(call_value_nonlocal_sysv): ..or here, delete split.
+ 	(tls_gdld_nomark): Delete.
+ 	(call_value_indirect_nonlocal_sysv): Use unspec_tls as operand2
+ 	predicate.  Call rs6000_output_tlsargs.  Adjust length to suit.
+ 	(call_value_nonlocal_sysv): Likewise.
+ 	(call_value_nonlocal_sysv_secure): Likewise.
+ 	(call_value_nonlocal_aix): Likewise.
+ 	(call_value_indirect_aix): Likewise.
+ 	(call_value_indirect_elfv2): Likewise.
+ 	(call_value_local32, call_value_local64): Disable for no-mark tls.
+ 	(call_value_local_aix): Likewise.
+ 
+ 2019-01-21  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/88938
+ 	* config/i386/i386.c (ix86_expand_builtin) [case IX86_BUILTIN_BEXTRI32,
+ 	case IX86_BUILTIN_BEXTRI64]: Sanitize operands.
+ 
+ 2019-01-21  Michael Ploujnikov  <michael.ploujnikov@oracle.com>
+ 
+ 	* hash-map-tests.c (test_map_of_strings_to_int): Show how to use
+ 	string contents as hash_map keys.
+ 
+ 2019-01-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 
+ 	PR c/88928
+ 	* c-warn.c (check_alignment_of_packed_member): Add a boolean parameter
+ 	for rvalue context.  Handle rvalues correctly.  Use min_align_of_type
+ 	instead of TYPE_ALIGN.
+ 	(check_address_or_pointer_of_packed_member): Handle rvalues coorrectly.
+ 	Use min_align_of_type instead of TYPE_ALIGN_UNIT.  Check for NULL
+ 	pointer from TYPE_STUB_DECL.
+ 
+ 2019-01-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/88934
+ 	* tree-vect-slp.c (vect_mask_constant_operand_p): Always look
+ 	at the possibly non-constant operand.
+ 	(vect_get_constant_vectors): Adjust.
+ 
+ 2019-01-21  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/71659
+ 	* config/i386/adxintrin.h: Just check _IMMINTRIN_H_INCLUDED.
+ 	* config/i386/clflushoptintrin.h: Check _IMMINTRIN_H_INCLUDED
+ 	instead of _X86INTRIN_H_INCLUDED.
+ 	* onfig/i386/clwbintrin.h: Likewise.
+ 	* config/i386/pkuintrin.h: Likewise.
+ 	* config/i386/prfchwintrin.h: Likewise.
+ 	* config/i386/rdseedintrin.h: Likewise.
+ 	* config/i386/wbnoinvdintrin.h: Likewise.
+ 	* config/i386/xsavecintrin.h: Likewise.
+ 	* config/i386/xsavesintrin.h: Likewise.
+ 	* config/i386/fxsrintrin.h: Enable _IMMINTRIN_H_INCLUDED check.
+ 	* config/i386/xsaveintrin.h: Likewise.
+ 	* config/i386/xsaveoptintrin.h: Likewise.
+ 	* config/i386/x86intrin.h: Move "#include" <rdseedintrin.h>,
+ 	<prfchwintrin.h>, <fxsrintrin.h>, <xsaveintrin.h>,
+ 	<xsaveoptintrin.h>, <adxintrin.h>, <clwbintrin.h>,
+ 	<clflushoptintrin.h>, <xsavesintrin.h>, <xsavecintrin.h>,
+ 	<wbnoinvdintrin.h> and <pkuintrin.h> to ...
+ 	* config/i386/immintrin.h: Here.
+ 
+ 2019-01-20  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/87615
+ 	* ipa-prop.h (struct ipa_func_body_info): Replaced field aa_walked
+ 	with aa_walk_budget.
+ 	* cgraph.h (ipa_polymorphic_call_context::get_dynamic_type): Add
+ 	aa_walk_budget_p parameter.
+ 	* ipa-fnsummary.c (unmodified_parm_1): New parameter fbi.  Limit AA
+ 	walk.  Updated all callers.
+ 	(unmodified_parm): New parameter fbi, pass it to unmodified_parm_1.
+ 	(eliminated_by_inlining_prob): New parameter fbi, pass it on to
+ 	unmodified_parm.
+ 	(will_be_nonconstant_expr_predicate): New parameter fbi, removed
+ 	parameter info.  Extract info from fbi.  Pass fbi to recursive calls
+ 	and to unmodified_parm.
+ 	(phi_result_unknown_predicate): New parameter fbi, removed parameter
+ 	info, updated call to will_be_nonconstant_expr_predicate.
+ 	(param_change_prob): New parameter fbi, limit AA walking.
+ 	(analyze_function_body): Initialize aa_walk_budget in fbi.  Update
+ 	calls to various above functions.
+ 	* ipa-polymorphic-call.c (get_dynamic_type): Add aa_walk_budget_p
+ 	parameter.  Use it to limit AA walking.
+ 	* ipa-prop.c (detect_type_change_from_memory_writes): New parameter
+ 	fbi, limit AA walk.
+ 	(detect_type_change): New parameter fbi, pass it on to
+ 	detect_type_change_from_memory_writes.
+ 	(detect_type_change_ssa): Likewise.
+ 	(aa_overwalked): Removed.
+ 	(parm_preserved_before_stmt_p): Assume fbi is never NULL, stream line
+ 	accordingly, adjust to the neew AA limiting scheme.
+ 	(parm_ref_data_preserved_p): Likewise.
+ 	(ipa_compute_jump_functions_for_edge): Adjust call to
+ 	get_dynamic_type.
+ 	(ipa_analyze_call_uses): Likewise.
+ 	(ipa_analyze_virtual_call_uses): Pass fbi to detect_type_change_ssa.
+ 	(ipa_analyze_node): Initialize aa_walk_budget.
+ 	(ipcp_transform_function): Likewise.
+ 	* tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt): Update call
+ 	to get_dynamic_type.
+ 
+ 2019-01-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_stack_protect_guard): Move
+ 	outside of #if CHECKING_P code.
+ 
+ 2019-01-19  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* gimple-loop-versioning.cc (loop_versioning::dump_inner_likelihood):
+ 	New function, split out from...
+ 	(loop_versioning::analyze_stride): ...here.
+ 	(loop_versioning::find_per_loop_multiplication): Use gassign.
+ 	(loop_versioning::analyze_term_using_scevs): Return a success code.
+ 	(loop_versioning::analyze_arbitrary_term): New function.
+ 	(loop_versioning::analyze_address_fragment): Use
+ 	analyze_arbitrary_term if all else fails.
+ 
+ 2019-01-18  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	PR target/88892
+ 	* config/rs6000/rs6000.md (*movsi_from_df): Allow only register
+ 	operands.
+ 
+ 2019-01-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/88903
+ 	* tree-vect-stmts.c (vectorizable_shift): Verify we see all
+ 	scalar stmts a SLP shift amount is composed of when detecting
+ 	shifts by scalars.
+ 
+ 2019-01-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/88799
+ 	* config/arm/arm-cpus.in (mp): New feature.
+ 	(sec): New feature.
+ 	(fgroup ARMv7ve): Add mp and sec features.
+ 	(arch armv7-a): Add options to allow mp and sec extensions.
+ 	(cpu generic-armv7-a): Add options to allow mp and sec extensions.
+ 	(cpu cortex-a5, cpu cortex-7, cpu cortex-a9): Add mp and sec
+ 	extenstions to the base architecture.
+ 	(cpu cortex-a8): Add sec extension to the base architecture.
+ 	(cpu marvell-pj4): Add mp and sec extensions to the base architecture.
+ 	* config/arm/t-aprofile (MULTILIB_MATCHES): Map all armv7-a arch
+ 	variants down to the base v7-a varaint.
+ 	* config/arm/t-multilib (v7_a_arch_variants): New variable.
+ 	* doc/invoke.texi (ARM Options): Add +mp and +sec to the list
+ 	of permitted extensions for -march=armv7-a and for
+ 	-mcpu=generic-armv7-a.
+ 
+ 2019-01-18  Martin Liska  <mliska@suse.cz>
+ 
+ 	* params.def: Fix comment.
+ 	* tree-profile.c (gimple_init_gcov_profiler): Bump function
+ 	name.
+ 	(gimple_gen_ic_func_profiler): Likewise.
+ 
+ 2019-01-18  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+ 
+ 	* config/aarch64/aarch64-opts.h (enum stack_protector_guard): New
+ 	* config/aarch64/aarch64.c (aarch64_override_options_internal): Handle
+ 	and put in error checks for stack protector guard options.
+ 	(aarch64_stack_protect_guard): New.
+ 	(TARGET_STACK_PROTECT_GUARD): Define.
+ 	* config/aarch64/aarch64.md (UNSPEC_SSP_SYSREG): New.
+ 	(reg_stack_protect_address<mode>): New.
+ 	(stack_protect_set): Adjust for SSP_GLOBAL.
+ 	(stack_protect_test): Likewise.
+ 	* config/aarch64/aarch64.opt (-mstack-protector-guard-reg): New.
+ 	(-mstack-protector-guard): Likewise.
+ 	(-mstack-protector-guard-offset): Likewise.
+ 
+ 2019-01-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/86214
+ 	* tree-inline.h (struct copy_body_data): Add
+ 	add_clobbers_to_eh_landing_pads member.
+ 	* tree-inline.c (add_clobbers_to_eh_landing_pad): New function.
+ 	(copy_edges_for_bb): Call it if EH edge destination is <
+ 	id->add_clobbers_to_eh_landing_pads.  Fix a comment typo.
+ 	(expand_call_inline): Set id->add_clobbers_to_eh_landing_pads
+ 	if flag_stack_reuse != SR_NONE and clear it afterwards.
+ 
+ 2019-01-18  Christophe Lyon  <christophe.lyon@linaro.org>
+ 
+ 	PR target/85596
+ 	* doc/install.texi (with-multilib-list): Document for aarch64.
+ 
+ 2019-01-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/88734
+ 	* config/arm/arm_neon.h: Fix #pragma GCC target syntax - replace
+ 	(("..."))) with ("...").
+ 
+ 2019-01-18  Sebastian Huber  <sebastian.huber@embedded-brains.de>
+ 
+ 	* doc/extend.texi (Built-in Functions for Memory Model Aware
+ 	Atomic Operations): Document atomic fetch and nand.
+ 
+ 2019-01-18  Martin Liska  <mliska@suse.cz>
+ 	    Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/88587
+ 	* cgraph.h (create_version_clone_with_body): Add new argument
+ 	with attributes.
+ 	* cgraphclones.c (cgraph_node::create_version_clone): Add
+ 	DECL_ATTRIBUTES to a newly created decl.  And call
+ 	valid_attribute_p so that proper cl_target_optimization_node
+ 	is set for the newly created declaration.
+ 	* multiple_target.c (create_target_clone): Set DECL_ATTRIBUTES
+ 	for declaration.
+ 	(expand_target_clones): Do not call valid_attribute_p, it must
+ 	be already done.
+ 	* tree-inline.c (copy_decl_for_dup_finish): Reset mode for
+ 	vector types.
+ 
+ 2019-01-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/88734
+ 	* config/aarch64/arm_neon.h: Fix #pragma GCC target syntax - replace
+ 	(("..."))) with ("...").  Use arch=armv8.2-a+sha3 instead of
+ 	arch=armv8.2-a+crypto for vsha512hq_u64 etc. intrinsics.
+ 
+ 2019-01-17  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/88273
+ 	* gimple-ssa-warn-restrict.c (builtin_memref::extend_offset_range):
+ 	Handle anti-ranges the same as no range at all.
+ 
+ 2018-01-17  Steve Ellcey  <sellcey@cavium.com>
+ 
+ 	* config/aarch64/aarch64.c (cgraph.h): New include.
+ 	(intl.h): New include.
+ 	(supported_simd_type): New function.
+ 	(currently_supported_simd_type): Ditto.
+ 	(aarch64_simd_clone_compute_vecsize_and_simdlen): Ditto.
+ 	(aarch64_simd_clone_adjust): Ditto.
+ 	(aarch64_simd_clone_usable): Ditto.
+ 	(TARGET_SIMD_CLONE_COMPUTE_VECSIZE_AND_SIMDLEN): New macro.
+ 	(TARGET_SIMD_CLONE_ADJUST): Ditto.
+ 	(TARGET_SIMD_CLONE_USABLE): Ditto.
+ 	* config/i386/i386.c (ix86_simd_clone_adjust): Add definition check.
+ 	* omp-simd-clone.c (expand_simd_clones): Add targetm.simd_clone.adjust
+ 	call.
+ 
+ 2019-01-17  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/88800
+ 	* gimple-fold.c (gimple_fold_builtin_memory_op): Avoid checking
+ 	NO_WARNING bit here.  Avoid folding out-of-bounds calls.
+ 	* gimple-ssa-warn-restrict.c (maybe_diag_offset_bounds): Remove
+ 	redundant argument.  Add new argument and issue diagnostics under
+ 	its control.  Detect out-of-bounds access even with warnings
+ 	disabled.
+ 	(check_bounds_or_overlap): Change return type.  Add argument.
+ 	(wrestrict_dom_walker::check_call): Adjust.
+ 	* gimple-ssa-warn-restrict.h (check_bounds_or_overlap): Add argument.
+ 	* tree-ssa-strlen.c (handle_builtin_strcpy): Adjust to change in
+ 	check_bounds_or_overlap's return value.
+ 	(handle_builtin_stxncpy): Same.
+ 	(handle_builtin_strcat): Same.
+ 
+ 2019-01-17  Andrew Stubbs  <ams@codesourcery.com>
+ 	    Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 	    Julian Brown  <julian@codesourcery.com>
+ 	    Tom de Vries  <tom@codesourcery.com>
+ 
+ 	* doc/sourcebuild.texi: Document dg-add-options sqrt_insn.
+ 
+ 2019-01-17  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	* doc/sourcebuild.texi: Document dg-require-effective-target
+ 	llvm_binutils and offload_gcn.
+ 
+ 2019-01-17  Andrew Stubbs  <ams@codesourcery.com>
+ 	    Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 	    Julian Brown  <julian@codesourcery.com>
+ 	    Tom de Vries  <tom@codesourcery.com>
+ 
+ 	* doc/sourcebuild.texi: Document dg-required-effective-target
+ 	exceptions.
+ 
+ 2019-01-17  Andrew Stubbs  <ams@codesourcery.com>
+ 	    Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 	    Julian Brown  <julian@codesourcery.com>
+ 	    Tom de Vries  <tom@codesourcery.com>
+ 	    Jan Hubicka  <hubicka@ucw.cz>
+ 	    Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* config.gcc: Add amdgcn*-*-amdhsa configuration.
+ 	* configure.ac: Check for dlopen.
+ 	* configure: Regenerate.
+ 
+ 2019-01-17  Andrew Stubbs  <ams@codesourcery.com>
+ 	    Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 	    Julian Brown  <julian@codesourcery.com>
+ 	    Tom de Vries  <tom@codesourcery.com>
+ 	    Jan Hubicka  <hubicka@ucw.cz>
+ 	    Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* common/config/gcn/gcn-common.c: New file.
+ 	* config/gcn/driver-gcn.c: New file.
+ 	* config/gcn/gcn-builtins.def: New file.
+ 	* config/gcn/gcn-hsa.h: New file.
+ 	* config/gcn/gcn-modes.def: New file.
+ 	* config/gcn/gcn-opts.h: New file.
+ 	* config/gcn/gcn-passes.def: New file.
+ 	* config/gcn/gcn-protos.h: New file.
+ 	* config/gcn/gcn-run.c: New file.
+ 	* config/gcn/gcn-tree.c: New file.
+ 	* config/gcn/gcn.c: New file.
+ 	* config/gcn/gcn.h: New file.
+ 	* config/gcn/gcn.opt: New file.
+ 	* config/gcn/t-gcn-hsa: New file.
+ 
+ 2019-01-17  Andrew Stubbs  <ams@codesourcery.com>
+ 	    Kwok Cheung Yeung  <kcy@codesourcery.com>
+ 	    Julian Brown  <julian@codesourcery.com>
+ 	    Tom de Vries  <tom@codesourcery.com>
+ 	    Jan Hubicka  <hubicka@ucw.cz>
+ 	    Martin Jambor  <mjambor@suse.cz>
+ 
+ 	* config/gcn/constraints.md: New file.
+ 	* config/gcn/gcn-valu.md: New file.
+ 	* config/gcn/gcn.md: New file.
+ 	* config/gcn/predicates.md: New file.
+ 
+ 2019-01-17  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gimple-ssa-isolate-paths.c (stmt_uses_name_in_undefined_way): Replace
+ 	flag_non_call_exceptions with cfun->can_throw_non_call_exceptions.
+ 	(stmt_uses_0_or_null_in_undefined_way): Likewise.
+ 	* tree-ssa-alias.c (same_addr_size_stores_p): Likewise.
+ 
+ 2019-01-17  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	PR target/88851
+ 	* config/aarch64/aarch64.md (STACK_CLASH_SVE_CFA_REGNUM): New.
+ 	* config/aarch64/aarch64.c (aarch64_allocate_and_probe_stack_space): Use
+ 	it and document registers.
+ 
+ 2019-01-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (ares_tunings): Define.
+ 	* config/aarch64/aarch64-cores.def (ares): Use the above.
+ 
+ 2019-01-17  Wei Xiao  <wei3.xiao@intel.com>
+ 
+ 	PR target/88794
+ 	Revert:
+ 	2018-11-06  Wei Xiao  <wei3.xiao@intel.com>
+ 
+ 	* config/i386/avx512fintrin.h: Update VFIXUPIMM* intrinsics.
+ 	(_mm512_fixupimm_round_pd): Update parameters and builtin.
+ 	(_mm512_maskz_fixupimm_round_pd): Ditto.
+ 	(_mm512_fixupimm_round_ps): Ditto.
+ 	(_mm512_maskz_fixupimm_round_ps): Ditto.
+ 	(_mm_fixupimm_round_sd): Ditto.
+ 	(_mm_maskz_fixupimm_round_sd): Ditto.
+ 	(_mm_fixupimm_round_ss): Ditto.
+ 	(_mm_maskz_fixupimm_round_ss): Ditto.
+ 	(_mm512_fixupimm_pd): Ditto.
+ 	(_mm512_maskz_fixupimm_pd): Ditto.
+ 	(_mm512_fixupimm_ps): Ditto.
+ 	(_mm512_maskz_fixupimm_ps): Ditto.
+ 	(_mm_fixupimm_sd): Ditto.
+ 	(_mm_maskz_fixupimm_sd): Ditto.
+ 	(_mm_fixupimm_ss): Ditto.
+ 	(_mm_maskz_fixupimm_ss): Ditto.
+ 	(_mm512_mask_fixupimm_round_pd): Update builtin.
+ 	(_mm512_mask_fixupimm_round_ps): Ditto.
+ 	(_mm_mask_fixupimm_round_sd): Ditto.
+ 	(_mm_mask_fixupimm_round_ss): Ditto.
+ 	(_mm512_mask_fixupimm_pd): Ditto.
+ 	(_mm512_mask_fixupimm_ps): Ditto.
+ 	(_mm_mask_fixupimm_sd): Ditto.
+ 	(_mm_mask_fixupimm_ss): Ditto.
+ 	* config/i386/avx512vlintrin.h:
+ 	(_mm256_fixupimm_pd): Update parameters and builtin.
+ 	(_mm256_maskz_fixupimm_pd): Ditto.
+ 	(_mm256_fixupimm_ps): Ditto.
+ 	(_mm256_maskz_fixupimm_ps): Ditto.
+ 	(_mm_fixupimm_pd): Ditto.
+ 	(_mm_maskz_fixupimm_pd): Ditto.
+ 	(_mm_fixupimm_ps): Ditto.
+ 	(_mm_maskz_fixupimm_ps): Ditto.
+ 	(_mm256_mask_fixupimm_pd): Update builtin.
+ 	(_mm256_mask_fixupimm_ps): Ditto.
+ 	(_mm_mask_fixupimm_pd): Ditto.
+ 	(_mm_mask_fixupimm_ps): Ditto.
+ 	* config/i386/i386-builtin-types.def: Add new types and remove
+ 	useless ones.
+ 	* config/i386/i386-builtin.def: Update builtin definitions.
+ 	* config/i386/i386.c: Handle new builtin types and remove useless ones.
+ 	* config/i386/sse.md: Update VFIXUPIMM* patterns.
+ 	(<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
+ 	(<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
+ 	(<avx512>_fixupimm<mode>_mask<round_saeonly_name>): Update.
+ 	(avx512f_sfixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
+ 	(avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
+ 	(avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Update.
+ 	* config/i386/subst.md:
+ 	(round_saeonly_sd_mask_operand4): Add new subst_attr.
+ 	(round_saeonly_sd_mask_op4): Ditto.
+ 	(round_saeonly_expand_operand5): Ditto.
+ 	(round_saeonly_expand): Update.
+ 
+ 2019-01-17  Wei Xiao  <wei3.xiao@intel.com>
+ 
+ 	PR target/88794
+ 	Revert:
+ 	2018-11-12  Wei Xiao  <wei3.xiao@intel.com>
+ 
+ 	* config/i386/sse.md: Combine VFIXUPIMM* patterns
+ 	(<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
+ 	(<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
+ 	(<avx512>_fixupimm<mode>_mask<round_saeonly_name>): Remove.
+ 	(avx512f_sfixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
+ 	(avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
+ 	(avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Remove.
+ 
+ 2019-01-17  Wei Xiao  <wei3.xiao@intel.com>
+ 
+ 	PR target/88794
+ 	Revert:
+ 	2018-12-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/88489
+ 	* config/i386/sse.md (UNSPEC_SFIXUPIMM): New unspec enumerator.
+ 	(avx512f_sfixupimm<mode><mask_name><round_saeonly_name>): Use it
+ 	instead of UNSPEC_FIXUPIMM.
+ 
+ 2019-01-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR lto/86736
+ 	* dwarf2out.c (want_pubnames): Never generate pubnames sections
+ 	and friends for the LTO part of debug info.
+ 
+ 2019-01-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/86214
+ 	* cfgexpand.c (add_stack_var_conflict): Don't add any conflicts
+ 	if x == y.
+ 
+ 	PR rtl-optimization/88870
+ 	* dce.c (deletable_insn_p): Never delete const/pure calls that can
+ 	throw if we can't alter the cfg or delete dead exceptions.
+ 	(mark_insn): Don't call find_call_stack_args for such calls.
+ 
+ 2019-01-17  Kewen Lin  <linkw@gcc.gnu.org>
+ 
+ 	* doc/extend.texi: Add four new prototypes for vec_ld and seven new
+ 	prototypes for vec_st.
+ 	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add entries
+ 	for scalar address type variants of altivec_vec_ld/altivec_vec_st,
+ 	mainly on signed/unsigned long long and double.
+ 
+ 2019-01-16  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR target/88861
+ 	* combine.c (delete_noop_moves): Convert to "bool" return,
+ 	returning true if any edges are eliminated.
+ 	(combine_instructions): Also return true if delete_noop_moves
+ 	returns true.
+ 
+ 2019-01-16  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	* config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
+ 	correct max nunits for endian swap.
+ 	(aarch64_expand_fcmla_builtin): Correct subreg code.
+ 	* config/aarch64/aarch64-simd.md (aarch64_fcmla_lane<rot><mode>,
+ 	aarch64_fcmla_laneq<rot>v4hf, aarch64_fcmlaq_lane<rot><mode>): Correct
+ 	lane endianness.
+ 
+ 2019-01-16  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/alpha/alpha.c (alpha_gimplify_va_arg):
+ 	Handle split indirect COMPLEX_TYPE arguments.
+ 
+ 2019-01-16  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/86891
+ 	* config/aarch64/aarch64-modes.def: Add comment about how the carry
+ 	bit is set by add and compare.
+ 	(CC_ADC): New CC_MODE.
+ 	* config/aarch64/aarch64.c (aarch64_select_cc_mode): Use variables
+ 	to cache the code and mode of X.  Adjust the shape of a CC_Cmode
+ 	comparison.  Add detection for CC_ADCmode.
+ 	(aarch64_get_condition_code_1): Update code support for CC_Cmode.  Add
+ 	CC_ADCmode.
+ 	* config/aarch64/aarch64.md (uaddv<mode>4): Use LTU with CCmode.
+ 	(uaddvti4): Comparison result is in CC_ADCmode and the condition is GEU.
+ 	(add<mode>3_compareC_cconly_imm): Delete.  Merge into...
+ 	(add<mode>3_compareC_cconly): ... this.  Restructure the comparison
+ 	to eliminate the need for zero-extending the operands.
+ 	(add<mode>3_compareC_imm): Delete.  Merge into ...
+ 	(add<mode>3_compareC): ... this.  Restructure the comparison to
+ 	eliminate the need for zero-extending the operands.
+ 	(add<mode>3_carryin): Use LTU for the overflow detection.
+ 	(add<mode>3_carryinC): Use CC_ADCmode for the result of the carry out.
+ 	Reexpress comparison for overflow.
+ 	(add<mode>3_carryinC_zero): Update for change to add<mode>3_carryinC.
+ 	(add<mode>3_carryinC): Likewise.
+ 	(add<mode>3_carryinV): Use LTU for carry between partials.
+ 	* config/aarch64/predicates.md (aarch64_carry_operation): Update
+ 	handling of CC_Cmode and add CC_ADCmode.
+ 	(aarch64_borrow_operation): Likewise.
+ 
+ 2019-01-16  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	* config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands):
+ 	Remove patternmode.
+ 	* config/arm/arm.c (neon_vcmla_lane_prepare_operands): Likewise.
+ 	* config/arm/neon.md (neon_vcmla_lane<rot><mode>,
+ 	neon_vcmla_laneq<rot><mode>, neon_vcmlaq_lane<rot><mode>):
+ 	Remove endianness conversion.
+ 
+ 2019-01-16  Martin Liska  <mliska@suse.cz>
+ 
+ 	* Makefile.in: Set TOOL_INCLUDE_DIR and NATIVE_SYSTEM_HEADER_DIR
+ 	for GCC driver.
+ 	* config/gnu-user.h (TARGET_F951_OPTIONS): Add 'finclude%s/' as
+ 	a new argument.
+ 	* gcc.c (add_sysrooted_hdrs_prefix): New function.
+ 	(path_prefix_reset): Move up in the source file.
+ 	(find_fortran_preinclude_file): Make complex search for the
+ 	fortran header files.
+ 
+ 2019-01-15  Nikhil Benesch  <nikhil.benesch@gmail.com>
+ 
+ 	* godump.c (go_output_typedef): When outputting a typedef, refer
+ 	to the underlying type by its name and not its structure.
+ 
+ 2019-01-15  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR c++/88795
+ 	* tree.c (build_function_type): Assert that arg_types is not
+ 	error_mark_node.
+ 
+ 2019-01-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR inline-asm/52813
+ 	* doc/extend.texi: Document that listing the stack pointer in the
+ 	clobber list of an asm is a deprecated feature.
+ 	* common.opt (Wdeprecated): Moved from c-family/c.opt.
+ 	* cfgexpand.c (asm_clobber_reg_is_valid): Issue a -Wdeprecated
+ 	warning instead of an error for clobbers of the stack pointer.
+ 	Add a note explaining why.
+ 
+ 2019-01-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/88046
+ 	* dwarf2out.c (gen_member_die): Do not generate inheritance
+ 	DIEs late.
+ 
+ 2019-01-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/88855
+ 	* tree-if-conv.c (combine_blocks): Collect
+ 	SSA_NAME_OCCURS_IN_ABNORMAL_PHI from propagated out virtuals.
+ 
+ 2019-01-15  Tom de Vries  <tdevries@suse.de>
+ 
+ 	PR target/80547
+ 	* config/nvptx/nvptx.c (nvptx_goacc_reduction_init): Handle
+ 	lhs == NULL_TREE for gang-level reduction.
+ 
+ 2019-01-15  Richard Biener  <rguenther@suse.de>
+ 	    Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+ 
+ 	PR ipa/88788
+ 	* ipa-pure-const.c (malloc_candidate_p_1): Add parameter visited and
+ 	return true if SSA_NAME is already marked in visited bitmap.
+ 	(malloc_candidate_p): Pass visited to malloc_candidate_p_1.
+ 
+ 2019-01-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/88775
+ 	* match.pd (cmp (convert1?@2 addr@0) (convert2? addr@1)): Optimize
+ 	equal == 0 equality pointer comparisons some more if compared in
+ 	integral types and either one points to an automatic var and the
+ 	other to a global, or we can prove at least one points to the middle
+ 	or both point to start or both point to end.
+ 
+ 2019-01-14  Andi Kleen  <ak@linux.intel.com>
+ 
+ 	* Makefile.in: Lower autofdo sampling rate by 10x.
+ 	* Makefile.tpl: Dito.
+ 
+ 2019-01-14  Tom Honermann  <tom@honermann.net>
+ 
+ 	* defaults.h: Define CHAR8_TYPE.
+ 
+ 2019-01-14  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR target/88638
+ 	* doc/extend.texi (Darwin Format Checks): Clarify.
+ 
+ 2019-01-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	* genmatch.c (dt_simplify::gen_1): Change dumping dependent on
+ 	whether we are in (simplify ...) or (match ...) context.
+ 
+ 2019-01-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/88796
+ 	* emit-rtl.h (struct rtl_data): Add stack_protect_guard_decl field.
+ 	* cfgexpand.c (stack_protect_prologue): Initialize
+ 	crtl->stack_protect_guard_decl.
+ 	* function.c (stack_protect_epilogue): Use it instead of calling
+ 	targetm.stack_protect_guard again.
+ 	* dse.c (check_mem_read_rtx): Ignore MEM_VOLATILE_P reads from
+ 	MEMs with MEM_EXPR equal to crtl->stack_protect_guard or
+ 	crtl->stack_protect_guard_decl.
+ 	* config/i386/i386.c (ix86_stack_protect_guard): Set TREE_THIS_VOLATILE
+ 	on the returned MEM_EXPR.
+ 
+ 2019-01-12  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Alow setting
+ 	vector length using -fopenacc-dim.
+ 
+ 2019-01-12  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims): Take larger vector
+ 	lengths into account.
+ 
+ 2019-01-12  Svante Signell  <svante.signell@gmail.com>
+ 
+ 	* config/i386/gnu.h (TARGET_THREAD_SSP_OFFSET): Define.
+ 	(TARGET_CAN_SPLIT_STACK): Define.
+ 	(TARGET_THREAD_SPLIT_STACK_OFFSET): Define.
+ 
+ 2019-01-05  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* params.def (inline-unit-growth): Set to 40.
+ 
+ 2019-01-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* tree-ssa-loop-ivopts.c (find_inv_vars): Fix a comment typo.
+ 
+ 2019-01-12  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): In offloading
+ 	region calling vector-partitionable routine, set default_vector_length
+ 	to WARP_SIZE.
+ 
+ 2019-01-12  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Add an use new
+ 	variable default_vector_length.
+ 
+ 2019-01-12  Tom de Vries  <tdevries@suse.de>
+ 
+ 	PR middle-end/88703
+ 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Apply defaults
+ 	from oacc_default_dims, as oacc_validate_dims would do it, and apply
+ 	dimensions limits.
+ 
+ 2019-01-12  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1)
+ 	(nvptx_goacc_validate_dims): Add used parameter.
+ 	* doc/tm.texi: Regenerate.
+ 	* omp-offload.c (oacc_parse_default_dims, oacc_validate_dims): Add
+ 	argument to call to targetm.goacc.validate_dims.
+ 	(default_goacc_validate_dims): Add used
+ 	parameter.
+ 	* target.def (validate_dims): Add used parameter in DEFHOOK.
+ 	* targhooks.h (default_goacc_validate_dims): Add used parameter.
+ 
+ 2019-01-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/85956
+ 	PR lto/88733
+ 	* tree-inline.h (struct copy_body_data): Add adjust_array_error_bounds
+ 	field.
+ 	* tree-inline.c (remap_type_1): Formatting fix.  If TYPE_MAX_VALUE of
+ 	ARRAY_TYPE's TYPE_DOMAIN is newly error_mark_node, replace it with
+ 	a dummy "omp dummy var" variable if id->adjust_array_error_bounds.
+ 	* omp-low.c (new_omp_context): Set cb.adjust_array_error_bounds.
+ 
+ 2019-01-11  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/87305
+ 	* lra-assigns.c
+ 	(setup_live_pseudos_and_spill_after_risky_transforms): Add code
+ 	for little endian pseudos used as paradoxical subreg.
+ 
+ 2019-01-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/88693
+ 	* tree-ssa-strlen.c (get_min_string_length): Don't set *full_string_p
+ 	for STRING_CSTs that don't contain any NUL characters in the first
+ 	TREE_STRING_LENGTH bytes.
+ 
+ 2019-01-11  Alan Modra  <amodra@gmail.com>
+ 
+ 	PR 88777
+ 	PR 88614
+ 	* genattrtab.c (min_fn): Don't translate values.
+ 	(min_attr_value): Return INT_MAX when the value can't be calculated.
+ 	Return minimum among any values that can be calculated.
+ 	(max_attr_value): Adjust.
+ 
+ 2019-01-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* Makefile.in (PLUGIN_HEADERS): Add $(INSN_ATTR_H).
+ 
+ 2019-01-11  Steve Ellcey  <sellcey@marvell.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_simd_call_p): New function.
+ 	(aarch64_hard_regno_call_part_clobbered): Add insn argument.
+ 	(aarch64_return_call_with_max_clobbers): New function.
+ 	(TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): New macro.
+ 	* config/avr/avr.c (avr_hard_regno_call_part_clobbered): Add insn
+ 	argument.
+ 	* config/i386/i386.c (ix86_hard_regno_call_part_clobbered): Ditto.
+ 	* config/mips/mips.c (mips_hard_regno_call_part_clobbered): Ditto.
+ 	* config/rs6000/rs6000.c (rs6000_hard_regno_call_part_clobbered): Ditto.
+ 	* config/s390/s390.c (s390_hard_regno_call_part_clobbered): Ditto.
+ 	* cselib.c (cselib_process_insn): Add argument to
+ 	targetm.hard_regno_call_part_clobbered call.
+ 	* ira-conflicts.c (ira_build_conflicts): Ditto.
+ 	* ira-costs.c (ira_tune_allocno_costs): Ditto.
+ 	* lra-constraints.c (inherit_reload_reg): Ditto.
+ 	* lra-int.h (struct lra_reg): Add call_insn field, remove call_p field.
+ 	* lra-lives.c (check_pseudos_live_through_calls): Add call_insn
+ 	argument.  Call targetm.return_call_with_max_clobbers.
+ 	Add argument to targetm.hard_regno_call_part_clobbered call.
+ 	(calls_have_same_clobbers_p): New function.
+ 	(process_bb_lives): Add call_insn and last_call_insn variables.
+ 	Pass call_insn to check_pseudos_live_through_calls.
+ 	Modify if stmt to check targetm.return_call_with_max_clobbers.
+ 	Update setting of flush variable.
+ 	(lra_create_live_ranges_1): Set call_insn to NULL instead of call_p
+ 	to false.
+ 	* lra.c (initialize_lra_reg_info_element): Set call_insn to NULL.
+ 	* regcprop.c (copyprop_hardreg_forward_1): Add argument to
+ 	targetm.hard_regno_call_part_clobbered call.
+ 	* reginfo.c (choose_hard_reg_mode): Ditto.
+ 	* regrename.c (check_new_reg_p): Ditto.
+ 	* reload.c (find_equiv_reg): Ditto.
+ 	* reload1.c (emit_reload_insns): Ditto.
+ 	* sched-deps.c (deps_analyze_insn): Ditto.
+ 	* sel-sched.c (init_regs_for_mode): Ditto.
+ 	(mark_unavailable_hard_regs): Ditto.
+ 	* targhooks.c (default_dwarf_frame_reg_mode): Ditto.
+ 	* target.def (hard_regno_call_part_clobbered): Add insn argument.
+ 	(return_call_with_max_clobbers): New target function.
+ 	* doc/tm.texi: Regenerate.
+ 	* doc/tm.texi.in (TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): New hook.
+ 	* hooks.c (hook_bool_uint_mode_false): Change to
+ 	hook_bool_insn_uint_mode_false.
+ 	* hooks.h (hook_bool_uint_mode_false): Ditto.
+ 
+ 2019-01-11  Steve Ellcey  <sellcey@marvell.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_simd_call_p): New function.
+ 	(aarch64_remove_extra_call_preserved_regs): New function.
+ 	(TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): New macro.
+ 	* doc/tm.texi.in (TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): New hook.
+ 	* doc/tm.texi: Regenerate.
+ 	* final.c (get_call_reg_set_usage): Call new hook.
+ 	* target.def (remove_extra_call_preserved_regs): New hook.
+ 	* targhooks.c (default_remove_extra_call_preserved_regs): New function.
+ 	* targhooks.h (default_remove_extra_call_preserved_regs): New function.
+ 
+ 2019-01-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR bootstrap/88714
+ 	* passes.c (finish_optimization_passes): Call print_combine_total_stats
+ 	inside of pass_combine_1 dump rather than pass_profile_1.
+ 
+ 2019-01-11  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (PTX_CTA_NUM_BARRIERS, PTX_PER_CTA_BARRIER)
+ 	(PTX_NUM_PER_CTA_BARRIER, PTX_FIRST_PER_WORKER_BARRIER)
+ 	(PTX_NUM_PER_WORKER_BARRIERS): Define.
+ 	(nvptx_apply_dim_limits): Prevent vector_length 64 and
+ 	num_workers 16.
+ 
+ 2019-01-11  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (PTX_CTA_SIZE): Move up.
+ 
+ 2019-01-11  Jan Beulich  <jbeulich@suse.com>
+ 
+ 	* config/i386/i386.md (rex64suffix): Add L suffix for SI.
+ 	* config/i386/sse.md (cvtusi2<ssescalarmodesuffix>32<round_name>,
+ 	sse2_cvtsi2sd): Add {l}.
+ 	(sse2_cvtsi2sdq<round_name>): Make q conditional upon AT&T
+ 	syntax.
+ 
+ 2019-01-10  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/88785
+ 	* config/i386/sse.md (float<floatunssuffix>v2div2sf2): Turn into
+ 	define_expand.
+ 	(*float<floatunssuffix>v2div2sf2): New define_insn.
+ 	(float<floatunssuffix>v2div2sf2_mask): Turn into define_expand.
+ 	(*float<floatunssuffix>v2div2sf2_mask): New define_insn.
+ 	(*float<floatunssuffix>v2div2sf2_mask_1): Replace
+ 	subrtxes (const_vector:V2SF [(const_int 0) (const_int 0)]) with
+ 	match_operands with "const0_operand" "C".
+ 
+ 2019-01-10  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	* config/aarch64/aarch64-builtins.c
+ 	(aarch64_init_builtins): Move aarch64_init_fcmla_laneq_builtins...
+ 	(aarch64_init_simd_builtins): ...Here
+ 
+ 2019-01-10  Vladimir Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/87305
+ 	* lra-assigns.c
+ 	(setup_live_pseudos_and_spill_after_risky_transforms): Check
+ 	allocation for big endian pseudos used as paradoxical subregs and
+ 	spill them if it is wrong.
+ 	* lra-constraints.c (lra_constraints): Add a comment.
+ 
+ 2019-01-10  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/88792
+ 	* tree-ssa-pre.c (get_representative_for): Do not return a
+ 	value-number here.
+ 
+ 2019-01-10  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/84877
+ 	PR bootstrap/88450
+ 	* function.c (assign_stack_local_1): Revert the 2018-11-21 changes.
+ 	(assign_parm_setup_block): Do the argument slot realignment here
+ 	instead.
+ 
+ 2019-01-10  Stefan Agner  <stefan@agner.ch>
+ 
+ 	PR target/88648
+ 	* config/arm/arm.c (arm_option_override_internal): Force
+ 	opts->x_inline_asm_unified to true only if TARGET_THUMB2_P.
+ 
+ 2019-01-10  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/88568
+ 	* attribs.c (handle_dll_attribute): Clear TREE_STATIC after setting
+ 	DECL_EXTERNAL.
+ 
+ 2019-01-10  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	* config/arm/arm-builtins.c
+ 	(enum arm_type_qualifiers): Add qualifier_lane_pair_index.
+ 	(MAC_LANE_PAIR_QUALIFIERS): New.
+ 	(arm_expand_builtin_args): Use it.
+ 	(arm_expand_builtin_1): Likewise.
+ 	* config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): New.
+ 	* config/arm/arm.c (neon_vcmla_lane_prepare_operands): New.
+ 	* config/arm/arm-c.c (arm_cpu_builtins): Add __ARM_FEATURE_COMPLEX.
+ 	* config/arm/arm_neon.h:
+ 	(vcadd_rot90_f16): New.
+ 	(vcaddq_rot90_f16): New.
+ 	(vcadd_rot270_f16): New.
+ 	(vcaddq_rot270_f16): New.
+ 	(vcmla_f16): New.
+ 	(vcmlaq_f16): New.
+ 	(vcmla_lane_f16): New.
+ 	(vcmla_laneq_f16): New.
+ 	(vcmlaq_lane_f16): New.
+ 	(vcmlaq_laneq_f16): New.
+ 	(vcmla_rot90_f16): New.
+ 	(vcmlaq_rot90_f16): New.
+ 	(vcmla_rot90_lane_f16): New.
+ 	(vcmla_rot90_laneq_f16): New.
+ 	(vcmlaq_rot90_lane_f16): New.
+ 	(vcmlaq_rot90_laneq_f16): New.
+ 	(vcmla_rot180_f16): New.
+ 	(vcmlaq_rot180_f16): New.
+ 	(vcmla_rot180_lane_f16): New.
+ 	(vcmla_rot180_laneq_f16): New.
+ 	(vcmlaq_rot180_lane_f16): New.
+ 	(vcmlaq_rot180_laneq_f16): New.
+ 	(vcmla_rot270_f16): New.
+ 	(vcmlaq_rot270_f16): New.
+ 	(vcmla_rot270_lane_f16): New.
+ 	(vcmla_rot270_laneq_f16): New.
+ 	(vcmlaq_rot270_lane_f16): New.
+ 	(vcmlaq_rot270_laneq_f16): New.
+ 	(vcadd_rot90_f32): New.
+ 	(vcaddq_rot90_f32): New.
+ 	(vcadd_rot270_f32): New.
+ 	(vcaddq_rot270_f32): New.
+ 	(vcmla_f32): New.
+ 	(vcmlaq_f32): New.
+ 	(vcmla_lane_f32): New.
+ 	(vcmla_laneq_f32): New.
+ 	(vcmlaq_lane_f32): New.
+ 	(vcmlaq_laneq_f32): New.
+ 	(vcmla_rot90_f32): New.
+ 	(vcmlaq_rot90_f32): New.
+ 	(vcmla_rot90_lane_f32): New.
+ 	(vcmla_rot90_laneq_f32): New.
+ 	(vcmlaq_rot90_lane_f32): New.
+ 	(vcmlaq_rot90_laneq_f32): New.
+ 	(vcmla_rot180_f32): New.
+ 	(vcmlaq_rot180_f32): New.
+ 	(vcmla_rot180_lane_f32): New.
+ 	(vcmla_rot180_laneq_f32): New.
+ 	(vcmlaq_rot180_lane_f32): New.
+ 	(vcmlaq_rot180_laneq_f32): New.
+ 	(vcmla_rot270_f32): New.
+ 	(vcmlaq_rot270_f32): New.
+ 	(vcmla_rot270_lane_f32): New.
+ 	(vcmla_rot270_laneq_f32): New.
+ 	(vcmlaq_rot270_lane_f32): New.
+ 	(vcmlaq_rot270_laneq_f32): New.
+ 	* config/arm/arm_neon_builtins.def (vcadd90, vcadd270, vcmla0, vcmla90,
+ 	vcmla180, vcmla270, vcmla_lane0, vcmla_lane90, vcmla_lane180,
+ 	vcmla_lane270, vcmla_laneq0, vcmla_laneq90, vcmla_laneq180,
+ 	vcmla_laneq270, vcmlaq_lane0, vcmlaq_lane90, vcmlaq_lane180,
+ 	vcmlaq_lane270): New.
+ 	* config/arm/neon.md (neon_vcmla_lane<rot><mode>,
+ 	neon_vcmla_laneq<rot><mode>, neon_vcmlaq_lane<rot><mode>): New.
+ 	* config/arm/arm.c (arm_arch8_3, arm_arch8_4): New.
+ 	* config/arm/arm.h (TARGET_COMPLEX, arm_arch8_3, arm_arch8_4): New.
+ 	(arm_option_reconfigure_globals): Use them.
+ 	* config/arm/iterators.md (VDF, VQ_HSF): New.
+ 	(VCADD, VCMLA): New.
+ 	(VF_constraint, rot, rotsplit1, rotsplit2): Add V4HF and V8HF.
+ 	* config/arm/neon.md (neon_vcadd<rot><mode>, neon_vcmla<rot><mode>):
+ 	New.
+ 	* config/arm/unspecs.md (UNSPEC_VCADD90, UNSPEC_VCADD270,
+ 	UNSPEC_VCMLA, UNSPEC_VCMLA90, UNSPEC_VCMLA180, UNSPEC_VCMLA270): New.
+ 
+ 2019-01-10  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
+ 	Add qualifier_lane_pair_index.
+ 	(emit-rtl.h): Include.
+ 	(TYPES_QUADOP_LANE_PAIR): New.
+ 	(aarch64_simd_expand_args): Use it.
+ 	(aarch64_simd_expand_builtin): Likewise.
+ 	(AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_laneq_builtin_datum):
+ 	New.
+ 	(FCMLA_LANEQ_BUILTIN, AARCH64_SIMD_FCMLA_LANEQ_BUILTIN_BASE,
+ 	AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_lane_builtin_data,
+ 	aarch64_init_fcmla_laneq_builtins, aarch64_expand_fcmla_builtin): New.
+ 	(aarch64_init_builtins): Add aarch64_init_fcmla_laneq_builtins.
+ 	(aarch64_expand_buildin): Add AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V2SF,
+ 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V2SF,
+ 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V2SF,
+ 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ2700_V2SF,
+ 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V4HF,
+ 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V4HF,
+ 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V4HF,
+ 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ270_V4HF.
+ 	* config/aarch64/iterators.md (FCMLA_maybe_lane): New.
+ 	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
+ 	Add __ARM_FEATURE_COMPLEX.
+ 	* config/aarch64/aarch64-simd-builtins.def (fcadd90, fcadd270, fcmla0,
+ 	fcmla90, fcmla180, fcmla270, fcmla_lane0, fcmla_lane90, fcmla_lane180,
+ 	fcmla_lane270, fcmla_laneq0, fcmla_laneq90, fcmla_laneq180,
+ 	fcmla_laneq270, fcmlaq_lane0, fcmlaq_lane90, fcmlaq_lane180,
+ 	fcmlaq_lane270): New.
+ 	* config/aarch64/aarch64-simd.md (aarch64_fcmla_lane<rot><mode>,
+ 	aarch64_fcmla_laneq<rot>v4hf, aarch64_fcmlaq_lane<rot><mode>,
+ 	aarch64_fcadd<rot><mode>, aarch64_fcmla<rot><mode>): New.
+ 	* config/aarch64/arm_neon.h:
+ 	(vcadd_rot90_f16): New.
+ 	(vcaddq_rot90_f16): New.
+ 	(vcadd_rot270_f16): New.
+ 	(vcaddq_rot270_f16): New.
+ 	(vcmla_f16): New.
+ 	(vcmlaq_f16): New.
+ 	(vcmla_lane_f16): New.
+ 	(vcmla_laneq_f16): New.
+ 	(vcmlaq_lane_f16): New.
+ 	(vcmlaq_rot90_lane_f16): New.
+ 	(vcmla_rot90_laneq_f16): New.
+ 	(vcmla_rot90_lane_f16): New.
+ 	(vcmlaq_rot90_f16): New.
+ 	(vcmla_rot90_f16): New.
+ 	(vcmlaq_laneq_f16): New.
+ 	(vcmla_rot180_laneq_f16): New.
+ 	(vcmla_rot180_lane_f16): New.
+ 	(vcmlaq_rot180_f16): New.
+ 	(vcmla_rot180_f16): New.
+ 	(vcmlaq_rot90_laneq_f16): New.
+ 	(vcmlaq_rot270_laneq_f16): New.
+ 	(vcmlaq_rot270_lane_f16): New.
+ 	(vcmla_rot270_laneq_f16): New.
+ 	(vcmlaq_rot270_f16): New.
+ 	(vcmla_rot270_f16): New.
+ 	(vcmlaq_rot180_laneq_f16): New.
+ 	(vcmlaq_rot180_lane_f16): New.
+ 	(vcmla_rot270_lane_f16): New.
+ 	(vcadd_rot90_f32): New.
+ 	(vcaddq_rot90_f32): New.
+ 	(vcaddq_rot90_f64): New.
+ 	(vcadd_rot270_f32): New.
+ 	(vcaddq_rot270_f32): New.
+ 	(vcaddq_rot270_f64): New.
+ 	(vcmla_f32): New.
+ 	(vcmlaq_f32): New.
+ 	(vcmlaq_f64): New.
+ 	(vcmla_lane_f32): New.
+ 	(vcmla_laneq_f32): New.
+ 	(vcmlaq_lane_f32): New.
+ 	(vcmlaq_laneq_f32): New.
+ 	(vcmla_rot90_f32): New.
+ 	(vcmlaq_rot90_f32): New.
+ 	(vcmlaq_rot90_f64): New.
+ 	(vcmla_rot90_lane_f32): New.
+ 	(vcmla_rot90_laneq_f32): New.
+ 	(vcmlaq_rot90_lane_f32): New.
+ 	(vcmlaq_rot90_laneq_f32): New.
+ 	(vcmla_rot180_f32): New.
+ 	(vcmlaq_rot180_f32): New.
+ 	(vcmlaq_rot180_f64): New.
+ 	(vcmla_rot180_lane_f32): New.
+ 	(vcmla_rot180_laneq_f32): New.
+ 	(vcmlaq_rot180_lane_f32): New.
+ 	(vcmlaq_rot180_laneq_f32): New.
+ 	(vcmla_rot270_f32): New.
+ 	(vcmlaq_rot270_f32): New.
+ 	(vcmlaq_rot270_f64): New.
+ 	(vcmla_rot270_lane_f32): New.
+ 	(vcmla_rot270_laneq_f32): New.
+ 	(vcmlaq_rot270_lane_f32): New.
+ 	(vcmlaq_rot270_laneq_f32): New.
+ 	* config/aarch64/aarch64.h (TARGET_COMPLEX): New.
+ 	* config/aarch64/iterators.md (UNSPEC_FCADD90, UNSPEC_FCADD270,
+ 	UNSPEC_FCMLA, UNSPEC_FCMLA90, UNSPEC_FCMLA180, UNSPEC_FCMLA270): New.
+ 	(FCADD, FCMLA): New.
+ 	(rot): New.
+ 	* config/arm/types.md (neon_fcadd, neon_fcmla): New.
+ 
+ 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	PR other/16615
+ 
+ 	* config/pa/pa.c: Change "can not" to "cannot".
+ 	* gimple-ssa-evrp-analyze.c: Likewise.
+ 	* ipa-icf.c: Likewise.
+ 	* ipa-polymorphic-call.c: Likewise.
+ 	* ipa-pure-const.c: Likewise.
+ 	* lra-constraints.c: Likewise.
+ 	* lra-remat.c: Likewise.
+ 	* reload1.c: Likewise.
+ 	* reorg.c: Likewise.
+ 	* tree-ssa-uninit.c: Likewise.
+ 
+ 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	PR other/16615
+ 
+ 	* Makefile.in: Mechanically replace "can not" with "cannot".
+ 	* alias.c: Likewise.
+ 	* builtins.c: Likewise.
+ 	* calls.c: Likewise.
+ 	* cgraph.c: Likewise.
+ 	* cgraph.h: Likewise.
+ 	* cgraphclones.c: Likewise.
+ 	* cgraphunit.c: Likewise.
+ 	* combine-stack-adj.c: Likewise.
+ 	* combine.c: Likewise.
+ 	* common/config/i386/i386-common.c: Likewise.
+ 	* config/aarch64/aarch64.c: Likewise.
+ 	* config/alpha/sync.md: Likewise.
+ 	* config/arc/arc.c: Likewise.
+ 	* config/arc/predicates.md: Likewise.
+ 	* config/arm/arm-c.c: Likewise.
+ 	* config/arm/arm.c: Likewise.
+ 	* config/arm/arm.h: Likewise.
+ 	* config/arm/arm.md: Likewise.
+ 	* config/arm/cortex-r4f.md: Likewise.
+ 	* config/csky/csky.c: Likewise.
+ 	* config/csky/csky.h: Likewise.
+ 	* config/darwin-f.c: Likewise.
+ 	* config/epiphany/epiphany.md: Likewise.
+ 	* config/i386/i386.c: Likewise.
+ 	* config/i386/sol2.h: Likewise.
+ 	* config/m68k/m68k.c: Likewise.
+ 	* config/mcore/mcore.h: Likewise.
+ 	* config/microblaze/microblaze.md: Likewise.
+ 	* config/mips/20kc.md: Likewise.
+ 	* config/mips/sb1.md: Likewise.
+ 	* config/nds32/nds32.c: Likewise.
+ 	* config/nds32/predicates.md: Likewise.
+ 	* config/pa/pa.c: Likewise.
+ 	* config/rs6000/e300c2c3.md: Likewise.
+ 	* config/rs6000/rs6000.c: Likewise.
+ 	* config/s390/s390.h: Likewise.
+ 	* config/sh/sh.c: Likewise.
+ 	* config/sh/sh.md: Likewise.
+ 	* config/spu/vmx2spu.h: Likewise.
+ 	* cprop.c: Likewise.
+ 	* dbxout.c: Likewise.
+ 	* df-scan.c: Likewise.
+ 	* doc/cfg.texi: Likewise.
+ 	* doc/extend.texi: Likewise.
+ 	* doc/fragments.texi: Likewise.
+ 	* doc/gty.texi: Likewise.
+ 	* doc/invoke.texi: Likewise.
+ 	* doc/lto.texi: Likewise.
+ 	* doc/md.texi: Likewise.
+ 	* doc/objc.texi: Likewise.
+ 	* doc/rtl.texi: Likewise.
+ 	* doc/tm.texi: Likewise.
+ 	* dse.c: Likewise.
+ 	* emit-rtl.c: Likewise.
+ 	* emit-rtl.h: Likewise.
+ 	* except.c: Likewise.
+ 	* expmed.c: Likewise.
+ 	* expr.c: Likewise.
+ 	* fold-const.c: Likewise.
+ 	* genautomata.c: Likewise.
+ 	* gimple-fold.c: Likewise.
+ 	* hard-reg-set.h: Likewise.
+ 	* ifcvt.c: Likewise.
+ 	* ipa-comdats.c: Likewise.
+ 	* ipa-cp.c: Likewise.
+ 	* ipa-devirt.c: Likewise.
+ 	* ipa-fnsummary.c: Likewise.
+ 	* ipa-icf.c: Likewise.
+ 	* ipa-inline-transform.c: Likewise.
+ 	* ipa-inline.c: Likewise.
+ 	* ipa-polymorphic-call.c: Likewise.
+ 	* ipa-profile.c: Likewise.
+ 	* ipa-prop.c: Likewise.
+ 	* ipa-pure-const.c: Likewise.
+ 	* ipa-reference.c: Likewise.
+ 	* ipa-split.c: Likewise.
+ 	* ipa-visibility.c: Likewise.
+ 	* ipa.c: Likewise.
+ 	* ira-build.c: Likewise.
+ 	* ira-color.c: Likewise.
+ 	* ira-conflicts.c: Likewise.
+ 	* ira-costs.c: Likewise.
+ 	* ira-int.h: Likewise.
+ 	* ira-lives.c: Likewise.
+ 	* ira.c: Likewise.
+ 	* ira.h: Likewise.
+ 	* loop-invariant.c: Likewise.
+ 	* loop-unroll.c: Likewise.
+ 	* lower-subreg.c: Likewise.
+ 	* lra-assigns.c: Likewise.
+ 	* lra-constraints.c: Likewise.
+ 	* lra-eliminations.c: Likewise.
+ 	* lra-lives.c: Likewise.
+ 	* lra-remat.c: Likewise.
+ 	* lra-spills.c: Likewise.
+ 	* lra.c: Likewise.
+ 	* lto-cgraph.c: Likewise.
+ 	* lto-streamer-out.c: Likewise.
+ 	* postreload-gcse.c: Likewise.
+ 	* predict.c: Likewise.
+ 	* profile-count.h: Likewise.
+ 	* profile.c: Likewise.
+ 	* recog.c: Likewise.
+ 	* ree.c: Likewise.
+ 	* reload.c: Likewise.
+ 	* reload1.c: Likewise.
+ 	* reorg.c: Likewise.
+ 	* resource.c: Likewise.
+ 	* rtl.def: Likewise.
+ 	* rtl.h: Likewise.
+ 	* rtlanal.c: Likewise.
+ 	* sched-deps.c: Likewise.
+ 	* sched-ebb.c: Likewise.
+ 	* sched-rgn.c: Likewise.
+ 	* sel-sched-ir.c: Likewise.
+ 	* sel-sched.c: Likewise.
+ 	* shrink-wrap.c: Likewise.
+ 	* simplify-rtx.c: Likewise.
+ 	* symtab.c: Likewise.
+ 	* target.def: Likewise.
+ 	* toplev.c: Likewise.
+ 	* tree-call-cdce.c: Likewise.
+ 	* tree-cfg.c: Likewise.
+ 	* tree-complex.c: Likewise.
+ 	* tree-core.h: Likewise.
+ 	* tree-eh.c: Likewise.
+ 	* tree-inline.c: Likewise.
+ 	* tree-loop-distribution.c: Likewise.
+ 	* tree-nrv.c: Likewise.
+ 	* tree-profile.c: Likewise.
+ 	* tree-sra.c: Likewise.
+ 	* tree-ssa-alias.c: Likewise.
+ 	* tree-ssa-dce.c: Likewise.
+ 	* tree-ssa-dom.c: Likewise.
+ 	* tree-ssa-forwprop.c: Likewise.
+ 	* tree-ssa-loop-im.c: Likewise.
+ 	* tree-ssa-loop-ivcanon.c: Likewise.
+ 	* tree-ssa-loop-ivopts.c: Likewise.
+ 	* tree-ssa-loop-niter.c: Likewise.
+ 	* tree-ssa-phionlycprop.c: Likewise.
+ 	* tree-ssa-phiopt.c: Likewise.
+ 	* tree-ssa-propagate.c: Likewise.
+ 	* tree-ssa-threadedge.c: Likewise.
+ 	* tree-ssa-threadupdate.c: Likewise.
+ 	* tree-ssa-uninit.c: Likewise.
+ 	* tree-ssanames.c: Likewise.
+ 	* tree-streamer-out.c: Likewise.
+ 	* tree.c: Likewise.
+ 	* tree.h: Likewise.
+ 	* vr-values.c: Likewise.
+ 
+ 2019-01-09  Uroš Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386-protos.h (ix86_expand_xorsign): New prototype.
+ 	(ix86_split_xorsign): Ditto.
+ 	* config/i386/i386.c (ix86_expand_xorsign): New function.
+ 	(ix86_split_xorsign): Ditto.
+ 	* config/i386/i386.md (UNSPEC_XORSIGN): New unspec.
+ 	(xorsign<mode>3): New expander.
+ 	(xorsign<mode>3_1): New insn_and_split pattern.
+ 	* config/i386/sse.md (xorsign<mode>3): New expander.
+ 
+ 2019-01-09  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* config/sparc/sparc.md (*tablejump_sp32): Merge into...
+ 	(*tablejump_sp64): Likewise.
+ 	(*tablejump<P:mode>): ...this.
+ 	(*call_address_sp32): Merge into...
+ 	(*call_address_sp64): Likewise.
+ 	(*call_address<P:mode>): ...this.
+ 	(*call_symbolic_sp32): Merge into...
+ 	(*call_symbolic_sp64): Likewise.
+ 	(*call_symbolic<P:mode>): ...this.
+ 	(call_value): Remove constraint and add predicate.
+ 	(*call_value_address_sp32): Merge into...
+ 	(*call_value_address_sp64): Likewise.
+ 	(*call_value_address<P:mode>): ...this.
+ 	(*call_value_symbolic_sp32): Merge into...
+ 	(*call_value_symbolic_sp64): Likewise.
+ 	(*call_value_symbolic<P:mode>): ...this.
+ 	(*sibcall_symbolic_sp32): Merge into...
+ 	(*sibcall_symbolic_sp64): Likewise.
+ 	(*sibcall_symbolic<P:mode>): ...this.
+ 	(sibcall_value): Remove constraint and add predicate.
+ 	(*sibcall_value_symbolic_sp32): Merge into...
+ 	(*sibcall_value_symbolic_sp64): Likewise.
+ 	(*sibcall_value_symbolic<P:mode>): ...this.
+ 	(window_save): Minor tweak.
+ 	(*branch_sp32): Merge into...
+ 	(*branch_sp64): Likewise.
+ 	(*branch<P:mode>): ...this.
+ 
+ 2019-01-09  Eric Botcazou  <ebotcazou@adacore.com>
+ 	    James Clarke  <jrtc27@jrtc27.com>
+ 
+ 	PR target/84010
+ 	* config/sparc/sparc.c (sparc_legitimize_tls_address): Only use Pmode
+ 	consistently in TLS address generation and adjust code to the renaming
+ 	of patterns.  Mark calls to __tls_get_addr as const.
+ 	* config/sparc/sparc.md (tgd_hi22): Turn into...
+ 	(tgd_hi22<P:mode>): ...this and use Pmode throughout.
+ 	(tgd_lo10): Turn into...
+ 	(tgd_lo10<P:mode>): ...this and use Pmode throughout.
+ 	(tgd_add32): Merge into...
+ 	(tgd_add64): Likewise.
+ 	(tgd_add<P:mode>): ...this and use Pmode throughout.
+ 	(tldm_hi22): Turn into...
+ 	(tldm_hi22<P:mode>): ...this and use Pmode throughout.
+ 	(tldm_lo10): Turn into...
+ 	(tldm_lo10<P:mode>): ...this and use Pmode throughout.
+ 	(tldm_add32): Merge into...
+ 	(tldm_add64): Likewise.
+ 	(tldm_add<P:mode>): ...this and use Pmode throughout.
+ 	(tldm_call32): Merge into...
+ 	(tldm_call64): Likewise.
+ 	(tldm_call<P:mode>): ...this and use Pmode throughout.
+ 	(tldo_hix22): Turn into...
+ 	(tldo_hix22<P:mode>): ...this and use Pmode throughout.
+ 	(tldo_lox10): Turn into...
+ 	(tldo_lox10<P:mode>): ...this and use Pmode throughout.
+ 	(tldo_add32): Merge into...
+ 	(tldo_add64): Likewise.
+ 	(tldo_add<P:mode>): ...this and use Pmode throughout.
+ 	(tie_hi22): Turn into...
+ 	(tie_hi22<P:mode>): ...this and use Pmode throughout.
+ 	(tie_lo10): Turn into...
+ 	(tie_lo10<P:mode>): ...this and use Pmode throughout.
+ 	(tie_ld64): Use DImode throughout.
+ 	(tie_add32): Merge into...
+ 	(tie_add64): Likewise.
+ 	(tie_add<P:mode>): ...this and use Pmode throughout.
+ 	(tle_hix22_sp32): Merge into...
+ 	(tle_hix22_sp64): Likewise.
+ 	(tle_hix22<P:mode>): ...this and use Pmode throughout.
+ 	(tle_lox22_sp32): Merge into...
+ 	(tle_lox22_sp64): Likewise.
+ 	(tle_lox22<P:mode>): ...this and use Pmode throughout.
+ 	(*tldo_ldub_sp32): Merge into...
+ 	(*tldo_ldub_sp64): Likewise.
+ 	(*tldo_ldub<P:mode>): ...this and use Pmode throughout.
+ 	(*tldo_ldub1_sp32): Merge into...
+ 	(*tldo_ldub1_sp64): Likewise.
+ 	(*tldo_ldub1<P:mode>): ...this and use Pmode throughout.
+ 	(*tldo_ldub2_sp32): Merge into...
+ 	(*tldo_ldub2_sp64): Likewise.
+ 	(*tldo_ldub2<P:mode>): ...this and use Pmode throughout.
+ 	(*tldo_ldsb1_sp32): Merge into...
+ 	(*tldo_ldsb1_sp64): Likewise.
+ 	(*tldo_ldsb1<P:mode>): ...this and use Pmode throughout.
+ 	(*tldo_ldsb2_sp32): Merge into...
+ 	(*tldo_ldsb2_sp64): Likewise.
+ 	(*tldo_ldsb2<P:mode>): ...this and use Pmode throughout.
+ 	(*tldo_ldub3_sp64): Use DImode throughout.
+ 	(*tldo_ldsb3_sp64): Likewise.
+ 	(*tldo_lduh_sp32): Merge into...
+ 	(*tldo_lduh_sp64): Likewise.
+ 	(*tldo_lduh<P:mode>): ...this and use Pmode throughout.
+ 	(*tldo_lduh1_sp32): Merge into...
+ 	(*tldo_lduh1_sp64): Likewise.
+ 	(*tldo_lduh1<P:mode>): ...this and use Pmode throughout.
+ 	(*tldo_ldsh1_sp32): Merge into...
+ 	(*tldo_ldsh1_sp64): Likewise.
+ 	(*tldo_ldsh1<P:mode>): ...this and use Pmode throughout.
+ 	(*tldo_lduh2_sp64): Use DImode throughout.
+ 	(*tldo_ldsh2_sp64): Likewise.
+ 	(*tldo_lduw_sp32): Merge into...
+ 	(*tldo_lduw_sp64): Likewise.
+ 	(*tldo_lduw<P:mode>): ...this and use Pmode throughout.
+ 	(*tldo_lduw1_sp64): Use DImode throughout.
+ 	(*tldo_ldsw1_sp64): Likewise.
+ 	(*tldo_ldx_sp64): Likewise.
+ 	(*tldo_stb_sp32): Merge into...
+ 	(*tldo_stb_sp64): Likewise.
+ 	(*tldo_stb<P:mode>): ...this and use Pmode throughout.
+ 	(*tldo_sth_sp32): Merge into...
+ 	(*tldo_sth_sp64): Likewise.
+ 	(*tldo_sth<P:mode>): ...this and use Pmode throughout.
+ 	(*tldo_stw_sp32): Merge into...
+ 	(*tldo_stw_sp64): Likewise.
+ 	(*tldo_stw<P:mode>): ...this and use Pmode throughout.
+ 	(*tldo_stx_sp64): Use DImode throughout.
+ 
+ 2018-01-09  Sudakshina Das  <sudi.das@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_override_options): Add case to
+ 	check configure option to set BTI and Return Address Signing.
+ 	* configure.ac: Add --enable-standard-branch-protection and
+ 	--disable-standard-branch-protection.
+ 	* configure: Regenerated.
+ 	* doc/install.texi: Document the same.
+ 
+ 2018-01-09  Sudakshina Das  <sudi.das@arm.com>
+ 	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+ 
+ 	* config.gcc (aarch64*-*-*): Add aarch64-bti-insert.o.
+ 	* config/aarch64/aarch64.h: Update comment for TRAMPOLINE_SIZE.
+ 	* config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Update
+ 	if bti is enabled.
+ 	* config/aarch64/aarch64-bti-insert.c: New file.
+ 	* config/aarch64/aarch64-passes.def (INSERT_PASS_BEFORE): Insert bti
+ 	pass.
+ 	* config/aarch64/aarch64-protos.h (make_pass_insert_bti): Declare the
+ 	new bti pass.
+ 	* config/aarch64/aarch64.md (unspecv): Add UNSPECV_BTI_NOARG,
+ 	UNSPECV_BTI_C, UNSPECV_BTI_J and UNSPECV_BTI_JC.
+ 	(bti_noarg, bti_j, bti_c, bti_jc): New define_insns.
+ 	* config/aarch64/t-aarch64: Add rule for aarch64-bti-insert.o.
+ 
+ 2018-01-09  Sudakshina Das  <sudi.das@arm.com>
+ 
+ 	* config/aarch64/aarch64-protos.h (aarch64_bti_enabled): Declare.
+ 	* config/aarch64/aarch64.c (aarch64_handle_no_branch_protection):
+ 	Disable bti for -mbranch-protection=none.
+ 	(aarch64_handle_standard_branch_protection): Enable bti for
+ 	-mbranch-protection=standard.
+ 	(aarch64_handle_bti_protection): Enable bti for "bti" in the string to
+ 	-mbranch-protection.
+ 	(aarch64_bti_enabled): Check if bti is enabled.
+ 	* config/aarch64/aarch64.opt: Declare target variable.
+ 	* doc/invoke.texi: Add bti to the -mbranch-protection documentation.
+ 
+ 2018-01-09  Sudakshina Das  <sudi.das@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (aarch64_expand_prologue): Use new
+ 	epilogue/prologue scratch registers EP0_REGNUM and EP1_REGNUM.
+ 	(aarch64_expand_epilogue): Likewise.
+ 	(aarch64_output_mi_thunk): Likewise.
+ 	* config/aarch64/aarch64.h (REG_CLASS_CONTENTS): Change
+ 	TAILCALL_ADDR_REGS to x16 and x17.
+ 	* config/aarch64/aarch64.md: Define EP0_REGNUM and EP1_REGNUM.
+ 
+ 2018-01-09  Sudakshina Das  <sudi.das@arm.com>
+ 
+ 	* config/aarch64/aarch64-option-extensions.def: Define
+ 	AARCH64_OPT_EXTENSION for memtag, rng, sb, ssbs and predres.
+ 	* config/aarch64/aarch64.h (AARCH64_FL_RNG): New.
+ 	(AARCH64_FL_MEMTAG, ARCH64_FL_SB, AARCH64_FL_SSBS): New.
+ 	(AARCH64_FL_PREDRES): New.
+ 	(AARCH64_FL_FOR_ARCH8_5): Add AARCH64_FL_SB, AARCH64_FL_SSBS and
+ 	AARCH64_FL_PREDRES by default.
+ 	* doc/invoke.texi: Document rng, memtag, sb, ssbs and predres.
+ 
+ 2018-01-09  Sudakshina Das  <sudi.das@arm.com>
+ 
+ 	* config/aarch64/aarch64-arches.def: Define AARCH64_ARCH for
+ 	ARMv8.5-A.
+ 	* config/aarch64/aarch64.h (AARCH64_FL_V8_5): New.
+ 	(AARCH64_FL_FOR_ARCH8_5, AARCH64_ISA_V8_5): New.
+ 	* doc/invoke.texi: Document ARMv8.5-A.
+ 
+ 2019-01-09  Alejandro Martinez  <alejandro.martinezvicente@arm.com>
+ 
+ 	* config/aarch64/aarch64-sve.md (copysign<mode>3): New define_expand.
+ 	(xorsign<mode>3): Likewise.
+ 
+ 2019-01-09  Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/88758
+ 	* tree.c (initializer_each_zero_or_onep) <case VECTOR_CST>: Use
+ 	vector_cst_elt instead of VECTOR_CST_ENCODED_ELT.
+ 
+ 	PR rtl-optimization/88331
+ 	* function.c (assign_stack_local_1): Don't set dynamic_align_addr if
+ 	not currently_expanding_to_rtl.
+ 
+ 2019-01-09  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* doc/invoke.texi (-Os): Remove trailing spaces.
+ 	(-finline-functions): Remove reference to -O2.
+ 
+ 2019-01-08  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/79593
+ 	* config/i386/i386.md (reg = mem; mem = reg): New define_peephole2.
+ 
+ 	* config/rs6000/rs6000.c (rs6000_delegitimize_address): Delegitimize
+ 	UNSPEC_FUSION_GPR to its argument.  Formatting fixes.
+ 
+ 2019-01-08  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR bootstrap/88721
+ 	* config/sparc/sparc.c (function_arg_slotno): Set *PPREGNO & *PPADDING
+ 	to -1 on entry.
+ 
+ 	PR debug/88723
+ 	* config/sparc/sparc.c (sparc_delegitimize_address): Deal with naked
+ 	UNSPECs and UNSPEC_MOVE_GOTDATA specifically.
+ 
+ 2019-01-08  H.J. Lu  <hongjiu.lu@intel.com>
+ 
+ 	PR target/88717
+ 	* config/i386/i386.c (ix86_avx_u128_mode_exit): Call
+ 	ix86_avx_u128_mode_entry.
+ 
+ 2019-01-08  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/88753
+ 	* tree-switch-conversion.c (switch_conversion::build_one_array):
+ 	Come up with local variable constructor.  Convert first to
+ 	type of constructor values.
+ 
+ 2019-01-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/86554
+ 	* tree-ssa-sccvn.c (eliminate_dom_walker, rpo_elim,
+ 	rpo_avail): Move earlier.
+ 	(visit_nary_op): When value-numbering to expressions
+ 	with different overflow behavior make sure there's an
+ 	available expression on the path.
+ 
+ 2019-01-08  Sam Tebbs  <sam.tebbs@arm.com>
+ 
+ 	* config/aarch64/aarch64.c (BRANCH_PROTECT_STR_MAX,
+ 	aarch64_parse_branch_protection,
+ 	struct aarch64_branch_protect_type,
+ 	aarch64_handle_no_branch_protection,
+ 	aarch64_handle_standard_branch_protection,
+ 	aarch64_validate_mbranch_protection,
+ 	aarch64_handle_pac_ret_protection,
+ 	aarch64_handle_attr_branch_protection,
+ 	accepted_branch_protection_string,
+ 	aarch64_pac_ret_subtypes,
+ 	aarch64_branch_protect_types,
+ 	aarch64_handle_pac_ret_leaf): Define.
+ 	(aarch64_override_options_after_change_1, aarch64_override_options):
+ 	Add check for accepted_branch_protection_string.
+ 	(aarch64_option_save): Save accepted_branch_protection_string.
+ 	(aarch64_option_restore): Save accepted_branch_protection_string.
+ 	* config/aarch64/aarch64.c (aarch64_attributes): Add branch-protection.
+ 	* config/aarch64/aarch64.opt: Add mbranch-protection. Deprecate
+ 	msign-return-address.
+ 	* doc/invoke.texi: Add mbranch-protection.
+ 
+ 2019-01-08  Alan Modra  <amodra@gmail.com>
+ 
+ 	PR target/88614
+ 	* genattrtab.c (max_attr_value, min_attr_value, or_attr_value):
+ 	Delete "unknownp" parameter.  Adjust callers.  Handle
+ 	CONST_INT, PLUS, MINUS, and MULT.
+ 	(attr_value_aligned): Renamed from or_attr_value.
+ 	(min_attr_value): Return INT_MIN for unhandled rtl case..
+ 	(min_fn): ..and translate to INT_MAX here.
+ 	(write_length_unit_log): Modify to cope without "unknown".
+ 	(write_attr_value): Handle IF_THEN_ELSE.
+ 
+ 2019-01-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* tree-vect-stmts.c (vectorizable_store): Don't use the dataref_offset
+ 	optimization for masked stores.
+ 
+ 2019-01-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/88567
+ 	* tree-vect-loop.c (get_initial_defs_for_reduction): Pass the
+ 	output vector directly to duplicate_and_interleave instead of
+ 	going through a temporary.  Postpone insertion of ctor_seq to
+ 	the end of the loop.
+ 
+ 2019-01-07  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/86891
+ 	* config/aarch64/aarch64.c (aarch64_expand_subvti): New parameter
+ 	unsigned_p.  Handle signed and unsigned overflow correction as
+ 	required.
+ 	* config/aarch64/aarch64-protos.h (aarch64_expand_subvti): Update
+ 	prototype.
+ 	* config/aarch64/aarch64.md (addv<mode>4): Use aarch64_plus_operand
+ 	for operand 2.
+ 	(add<mode>3_compareV_imm): Make this callable for expanding.
+ 	(subv<GPI:mode>4): Use register_operand for operand 1.  Use
+ 	aarch64_plus_operand for operand 2.
+ 	(subv<GPI:mode>_insn): New insn pattern.
+ 	(subv<GPI:mode>_imm): Likewise.
+ 	(negv<GPI:mode>3): New expand pattern.
+ 	(negv<GPI:mode>_insn): New insn pattern.
+ 	(negv<GPI:mode>_cmp_only): Likewise.
+ 	(cmpv<GPI:mode>_insn): Likewise.
+ 	(subvti4): Use register_operand for operand 1.  Update call to
+ 	aarch64_expand_subvti.
+ 	(usubvti4): Likewise.
+ 	(negvti3): New expand pattern.
+ 	(negdi_carryout): New insn pattern.
+ 	(negvdi_carryinV): New insn pattern.
+ 	(sub<mode3>_compare1_imm): Delete named insn pattern, make anonymous
+ 	version the named version.
+ 	(peepholes to convert to sub<mode3>_compare1_imm): Adjust order of
+ 	operands.
+ 	(usub<GPI:mode>3_carryinC, usub<GPI:mode>3_carryinC_z1): New insn
+ 	patterns.
+ 	(usub<GPI:mode>3_carryinC_z2, usub<GPI:mode>3_carryinC): New insn
+ 	patterns.
+ 	(sub<mode>3_carryinCV, sub<mode>3_carryinCV_z1_z2): Delete.
+ 	(sub<mode>3_carryinCV_z1, sub<mode>3_carryinCV_z2): Delete.
+ 	(sub<mode>3_carryinCV): Delete.
+ 	(sub<GPI:mode>3_carryinV): New expand pattern.
+ 	sub<mode>3_carryinV, sub<mode>3_carryinV_z2): New insn patterns.
+ 
+ 2019-01-07  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-ssa-uncprop.c (ssa_equip_hash_traits): Remove in favor
+ 	of tree_operand_hash.
+ 
+ 2019-01-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/88598
+ 	* tree.h (single_nonzero_element): Declare.
+ 	* tree.c (single_nonzero_element): New function.
+ 	* match.pd: Fold certain reductions of X & CST to X[I] & CST[I]
+ 	if I is the only nonzero element of CST.
+ 
+ 2019-01-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/88598
+ 	* tree.h (initializer_each_zero_or_onep): Declare.
+ 	* tree.c (initializer_each_zero_or_onep): New function.
+ 	(signed_or_unsigned_type_for): Handle float types too.
+ 	(unsigned_type_for, signed_type_for): Update comments accordingly.
+ 	* match.pd: Fold x * { 0 or 1, 0 or 1, ...} to
+ 	x & { 0 or -1, 0 or -1, ... }.
+ 
+ 2019-01-07  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/install.texi: Replace references to x86_64-unknown-linux-gnu
+ 	with x86_64-pc-linux-gnu.
+ 
+ 2019-01-07  Tom de Vries  <tdevries@suse.de>
+ 
+ 	PR target/85486
+ 	* config/nvptx/nvptx.c (has_vector_partitionable_routine_calls_p): New
+ 	function.
+ 	(nvptx_goacc_validate_dims): Force vl32 if calling vector-partitionable
+ 	routines.
+ 
+ 2019-01-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* config/i386/sse.md (vec_extract<mode><ssehalfvecmodelower>): Use
+ 	V_256_512 iterator instead of V_512 and TARGET_AVX instead of
+ 	TARGET_AVX512F as condition.
+ 
+ 	PR debug/88723
+ 	* dwarf2out.c (const_ok_for_output_1): Remove redundant call to
+ 	const_not_ok_for_debug_p target hook.
+ 	(mem_loc_descriptor) <case UNSPEC>: Only call const_ok_for_output_1
+ 	on UNSPEC and subexpressions thereof if all subexpressions of the
+ 	UNSPEC are CONSTANT_P.
+ 
+ 	PR tree-optimization/88676
+ 	* tree-ssa-phiopt.c (two_value_replacement): New function.
+ 	(tree_ssa_phiopt_worker): Call it.
+ 
+ 	PR sanitizer/88619
+ 	* cfgexpand.c (expand_stack_vars): Only align prev_offset to
+ 	ASAN_MIN_RED_ZONE_SIZE, not to maximum of that and alignb.
+ 
+ 	PR c++/85052
+ 	* tree-vect-generic.c: Include insn-config.h and recog.h.
+ 	(expand_vector_piecewise): Add defaulted ret_type argument,
+ 	if non-NULL, use that in preference to type for the result type.
+ 	(expand_vector_parallel): Formatting fix.
+ 	(do_vec_conversion, do_vec_narrowing_conversion,
+ 	expand_vector_conversion): New functions.
+ 	(expand_vector_operations_1): Call expand_vector_conversion
+ 	for VEC_CONVERT ifn calls.
+ 	* internal-fn.def (VEC_CONVERT): New internal function.
+ 	* internal-fn.c (expand_VEC_CONVERT): New function.
+ 	* fold-const-call.c (fold_const_vec_convert): New function.
+ 	(fold_const_call): Use it for CFN_VEC_CONVERT.
+ 	* doc/extend.texi (__builtin_convertvector): Document.
+ 
+ 2019-01-07  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx-protos.h (nvptx_output_red_partition): Declare.
+ 	* config/nvptx/nvptx.c (vector_red_size, vector_red_align,
+ 	vector_red_partition, vector_red_sym): New global variables.
+ 	(nvptx_option_override): Initialize vector_red_sym.
+ 	(nvptx_declare_function_name): Restore red_partition register.
+ 	(nvptx_file_end): Emit code to declare the vector reduction variables.
+ 	(nvptx_output_red_partition): New function.
+ 	(nvptx_expand_shared_addr): Add vector argument. Use it to handle
+ 	large vector reductions.
+ 	(enum nvptx_builtins): Add NVPTX_BUILTIN_VECTOR_ADDR.
+ 	(nvptx_init_builtins): Add VECTOR_ADDR.
+ 	(nvptx_expand_builtin): Update call to nvptx_expand_shared_addr.
+ 	Handle nvptx_expand_shared_addr.
+ 	(nvptx_get_shared_red_addr): Add vector argument and handle large
+ 	vectors.
+ 	(nvptx_goacc_reduction_setup): Add offload_attrs argument and handle
+ 	large vectors.
+ 	(nvptx_goacc_reduction_init): Likewise.
+ 	(nvptx_goacc_reduction_fini): Likewise.
+ 	(nvptx_goacc_reduction_teardown): Likewise.
+ 	(nvptx_goacc_reduction): Update calls to nvptx_goacc_reduction_{setup,
+ 	init,fini,teardown}.
+ 	(nvptx_init_axis_predicate): Initialize vector_red_partition.
+ 	(nvptx_set_current_function): Init vector_red_partition.
+ 	* config/nvptx/nvptx.md (UNSPECV_RED_PART): New unspecv.
+ 	(nvptx_red_partition): New insn.
+ 	* config/nvptx/nvptx.h (struct machine_function): Add red_partition.
+ 
+ 2019-01-07  Tom de Vries  <tdevries@suse.de>
+ 
+ 	PR target/85381
+ 	* config/nvptx/nvptx.c (nvptx_process_pars): Don't emit barriers for
+ 	empty loops.
+ 
+ 2019-01-07  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (oacc_bcast_partition): Declare.
+ 	(nvptx_option_override): Init oacc_bcast_partition.
+ 	(nvptx_init_oacc_workers): New function.
+ 	(nvptx_declare_function_name): Call nvptx_init_oacc_workers.
+ 	(nvptx_needs_shared_bcast): New function.
+ 	(nvptx_find_par): Generalize to enable vectors to use shared-memory
+ 	to propagate state.
+ 	(nvptx_shared_propagate): Initialize vector bcast partition and
+ 	synchronization state.
+ 	(nvptx_single): Generalize to enable vectors to use shared-memory
+ 	to propagate state.
+ 	(nvptx_process_pars): Likewise.
+ 	(nvptx_set_current_function): Initialize oacc_broadcast_partition.
+ 	* config/nvptx/nvptx.h (struct machine_function): Add
+ 	bcast_partition and sync_bar members.
+ 
+ 2019-01-07  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (nvptx_welformed_vector_length_p)
+ 	(nvptx_apply_dim_limits): New function.
+ 	(nvptx_goacc_validate_dims_1): Allow PTX_MAX_VECTOR_LENGTH larger than
+ 	PTX_WARP_SIZE.
+ 
+ 2019-01-07  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Move warnings to
+ 	as late as possible.
+ 
+ 2019-01-07  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (PTX_VECTOR_LENGTH): Remove.
+ 	(PTX_DEFAULT_VECTOR_LENGTH, PTX_MAX_VECTOR_LENGTH): Define.
+ 	(nvptx_goacc_validate_dims_1, nvptx_dim_limit)
+ 	(nvptx_goacc_reduction_fini): Use PTX_DEFAULT_VECTOR_LENGTH,
+ 	PTX_MAX_VECTOR_LENGTH and PTX_WARP_SIZE instead of PTX_VECTOR_LENGTH.
+ 
+ 2019-01-07  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims): Add asserts.
+ 
+ 2019-01-07  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* omp-offload.c (oacc_get_min_dim): New function.
+ 	* omp-offload.h (oacc_get_min_dim): Declare.
+ 
+ 2018-12-26  Mateusz B  <mateuszb@poczta.onet.pl>
+ 
+ 	PR target/88521
+ 	* config/i386/i386.c (function_value_ms_64): Return small sturct in
+ 	AX_REG and float/double in FIRST_SSE_REG for 4 or 8 byte modes.
+ 
+ 2019-01-05  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR tree-opt/86020
+ 	Revert:
+ 	2017-05-22  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline.c (edge_badness): Use inlined_time instead of
+ 	inline_summaries->get.
+ 
+ 2019-01-05  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* opts.c (enable_fdo_optimizations): Enable
+ 	version-loops-for-strides, loop-interchange, unrol-and-jam
+ 	and tree-loop-distribution.
+ 	* invoke.texi: Document newly enabled options.
+ 
+ 2019-01-05  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* doc/invoke.texi (max-inline-insns-small): New parameters.
+ 	* ipa-inline.c (want_early_inline_function_p): simplify.
+ 	(want_inline_small_function_p): Fix pasto from previous patch;
+ 	use max-inline-insns-small bound.
+ 	* params.def (max-inline-insns-small): New param.
+ 	* ipa-fnsummary.c (analyze_function_body): Initialize time/size
+ 	variables correctly.
+ 
+ 2019-01-05  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* doc/invoke.texi: Document max-inline-insns-size,
+ 	uninlined-function-insns, uninlined-function-time,
+ 	uninlined-thunk-insns and uninlined-thunk-time.
+ 	* params.def: Add max-inline-insns-size,
+ 	uninlined-function-insns, uninlined-function-time,
+ 	uninlined-thunk-insns and uninlined-thunk-time.
+ 	* ipa-fnsummary.c (compute_fn_summary, analyze_function_body): Use
+ 	new parameters.
+ 	* ipa-inline.c (can_inline_edge_by_limits_p,
+ 	want_inline_small_function_p): Use new parameters.
+ 
+ 2019-01-05  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-fnsummary.c (analyze_function_body): Fix accounting of time.
+ 
+ 2019-01-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/82564
+ 	PR target/88620
+ 	* expr.c (expand_assignment): For calls returning VLA structures
+ 	if to_rtx is not a MEM, force it into a stack temporary.
+ 
+ 	PR debug/88635
+ 	* dwarf2out.c (const_ok_for_output_1): Reject MINUS that contains
+ 	SYMBOL_REF, CODE_LABEL or UNSPEC in subexpressions of second argument.
+ 	Reject PLUS that contains SYMBOL_REF, CODE_LABEL or UNSPEC in
+ 	subexpressions of both operands.
+ 	(mem_loc_descriptor): Handle UNSPEC if target hook acks it and all the
+ 	subrtxes are CONSTANT_P.
+ 	* config/i386/i386.c (ix86_const_not_ok_for_debug_p): Revert
+ 	2018-11-09 changes.
+ 
+ 2019-01-04  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* params.def (hot-bb-count-ws-permille): Set to 990.
+ 
+ 2019-01-04  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR c/88546
+ 	* attribs.c (decls_mismatched_attributes): Avoid warning for attribute
+ 	leaf.
+ 
+ 2019-01-04  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR c/88363
+ 	* doc/extend.texi (attribute alloc_align, alloc_size): Update.
+ 
+ 2019-01-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gdbinit.in: Turn off pagination for the skip commands, restore
+ 	it to previous state afterwards.
+ 
+ 2019-01-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/88594
+ 	* config/i386/i386.c (ix86_expand_divmod_libfunc): Use mode instead
+ 	of GET_MODE (opN) as modes of the libcall arguments.
+ 
+ 2019-01-04  Jan Beulich  <jbeulich@suse.com>
+ 
+ 	* config/i386/sse.md
+ 	(<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>,
+ 	<avx512>_cmp<mode>3<mask_scalar_merge_name>,
+ 	<avx512>_ucmp<mode>3<mask_scalar_merge_name>,
+ 	<avx512>_ucmp<mode>3<mask_scalar_merge_name>,
+ 	avx512f_vmcmp<mode>3<round_saeonly_name>,
+ 	avx512f_vmcmp<mode>3_mask<round_saeonly_name>,
+ 	avx512f_maskcmp<mode>3,
+ 	<avx512>_cvt<ssemodesuffix>2mask<mode>,
+ 	<avx512>_cvt<ssemodesuffix>2mask<mode>,
+ 	*<avx512>_cvtmask2<ssemodesuffix><mode>,
+ 	*<avx512>_cvtmask2<ssemodesuffix><mode>,
+ 	<avx512>_eq<mode>3<mask_scalar_merge_name>_1,
+ 	<avx512>_eq<mode>3<mask_scalar_merge_name>_1,
+ 	<avx512>_gt<mode>3<mask_scalar_merge_name>,
+ 	<avx512>_gt<mode>3<mask_scalar_merge_name>,
+ 	<avx512>_testm<mode>3<mask_scalar_merge_name>,
+ 	<avx512>_testnm<mode>3<mask_scalar_merge_name>,
+ 	*<avx512>_testm<VI1248_AVX512VLBW:mode>3_zext,
+ 	*<avx512>_testm<VI1248_AVX512VLBW:mode>3_zext_mask,
+ 	*<avx512>_testnm<VI1248_AVX512VLBW:mode>3_zext,
+ 	*<avx512>_testnm<VI1248_AVX512VLBW:mode>3_zext_mask,
+ 	avx512cd_maskb_vec_dup<mode>,
+ 	avx512cd_maskw_vec_dup<mode>,
+ 	avx512dq_fpclass<mode><mask_scalar_merge_name>,
+ 	avx512dq_vmfpclass<mode>,
+ 	avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>): Use =k
+ 	instead of =Yk.
+ 
+ 2019-01-03  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR tree-optimization/88659
+ 	* calls.c (maybe_warn_nonstring_arg): Avoid assuming maxlen is set.
+ 
+ 2019-01-03  Aaron Sawdey  <acsawdey@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-string.c (expand_block_move): Don't use
+ 	unaligned vsx and avoid lxvd2x/stxvd2x.
+ 	(gen_lvx_v4si_move): New function.
+ 
+ 2019-01-03  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (MACH_VECTOR_LENGTH, MACH_MAX_WORKERS): Define.
+ 	(init_axis_dim, nvptx_mach_max_workers, nvptx_mach_vector_length): New
+ 	function.
+ 	* config/nvptx/nvptx.h (struct machine_function): Add axis_dims.
+ 
+ 2019-01-03  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (struct offload_attrs): New.
+ 	(populate_offload_attrs): New function.  Factor mask extraction out of
+ 	nvptx_reorg.  Add extraction of dimensions.
+ 	(nvptx_reorg): Use populate_offload_attrs.
+ 
+ 2019-01-03  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Add early-out
+ 	cases for oacc_min_dims_p and routine_p.  Add asserts for
+ 	oacc_default_dims_p and offload_region_p.
+ 
+ 2019-01-03  Tom de Vries  <tdevries@suse.de>
+ 
+ 	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): New function,
+ 	factored out of ...
+ 	(nvptx_goacc_validate_dims): ... here.
+ 
+ 2019-01-03  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR tree-optimization/85574
+ 	* tree-ssa-uncprop.c (struct equiv_hash_elt): Remove unused
+ 	structure.
+ 	(struct ssa_equip_hash_traits): Declare.
+ 	(val_ssa_equiv): Use custom hash traits using operand_equal_p.
+ 
+ 2019-01-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR debug/88644
+ 	* dwarf2out.c (modified_type_die): If type is equal to sizetype,
+ 	change it to qualified_type.
+ 
+ 2019-01-03  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-utils.c (scale_ipa_profile_for_fn): Break out from ...
+ 	(ipa_merge_profiles): ... here; do not ICE on thunks and aliases.
+ 
+ 2019-01-02  Martin Sebor  <msebor@redhat.com>
+ 	    Jeff Law  <law@redhat.com>
+ 
+ 	* gimple-fold.c (strlen_range_kind): Remove SRK_LENRANGE_2.
+ 	(get_range_strlen_tree): Update appropriately.
+ 	(get_range_strlen)
+ 	* gimple-fold.h (get_range_strlen): Drop unused last argument.
+ 
+ 	* gimple-fold.c (gimple_fold_builtin_strlen): Use set_strlen_range
+ 	rather than set_range_info.
+ 	* tree-ssa-strlen.c (set_strlen_range): Extracted from
+ 	maybe_set_strlen_range.  Handle potentially boundary crossing
+ 	cases more conservatively.
+ 	(maybe_set_strlen_range): Parts refactored into set_strlen_range.
+ 	Call set_strlen_range.
+ 	* tree-ssa-strlen.h (set_strlen_range): Add prototype.
+ 
+ 	PR middle-end/88663
+ 	* gimple-fold.c (get_range_strlen): Update prototype to no longer
+ 	need the flexp argument.
+ 	(get_range_strlen_tree): Drop flexp argument.  Drop flexp argument
+ 	from calls to get_range_strlen.  Update comments.  Just update
+ 	VAL for an unterminated const char array and let the reset of the
+ 	code handle it normally.  No longer try to set *flexp.  Adjust
+ 	return value.
+ 	(get_range_strlen): Update for the new get_range_strlen API.
+ 	(get_maxval_strlen): Similarly.
+ 	(gimple_fold_builtin_strlen): Handle update meaning of return value
+ 	from get_range_strlen.
+ 	* gimple-ssa-sprintf.c (get_string_length): Update for the new
+ 	get_range_strlen API.
+ 
+ 2019-01-02  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	PR lto/88130
+ 	* varpool.c (varpool_node::ctor_useable_for_folding_p): Also return
+ 	false at WPA time when body was removed.
+ 
+ 2019-01-02  Martin Liska  <mliska@suse.cz>
+ 
+ 	PR tree-optimization/88650
+ 	* predict.c (set_even_probabilities): Calculate probability
+ 	remainer only when really used.
+ 
+ 2019-01-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/88651
+ 	* tree-data-ref.c (analyze_subscript_affine_affine): Use
+ 	widest_ints when mangling max_stmt_execution results.
+ 
+ 2019-01-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/88621
+ 	* tree-ssa-loop-im.c (gather_mem_refs_stmt): Fix pastos, avoid
+ 	bitfields when canoncalizing.
+ 
+ 2019-01-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR target/87545
+ 	* config/i386/x86-tune-costs.h (intel_cost): Adjust
+ 	cost of cheap SSE instruction.
+ 
+ 2019-01-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR ipa/85574
+ 	* ipa-icf.h (sem_item_optimizer::sort_congruence_split): Declare.
+ 	* ipa-icf.c (sem_item_optimizer::sort_congruence_split): New
+ 	function.
+ 	(sem_item_optimizer::do_congruence_step_f): Sort the congruence
+ 	set after UIDs before splitting them.
+ 
+ 2019-01-01  Martin Sebor  <msebor@redhat.com>
+ 	    Jeff Law  <law@redhat.com>
+ 
+ 	* gimple-fold.c (get_range_strlen_tree): Record if the computed
+ 	length is optimistic.  If it is, then arrange to compute the
+ 	conservative length as well.
+ 
+ 	* gimple-fold.h (get_range_strlen): Update prototype.
+ 	* builtins.c (check_access): Update call to get_range_strlen to use
+ 	c_strlen_data pointer.   Change various variable accesses to instead
+ 	pull data from the c_strlen_data structure.
+ 	(check_strncat_sizes, expand_builtin_strncat): Likewise.
+ 	* calls.c (maybe_warn_nonstring_arg): Likewise.
+ 	* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.  Reset
+ 	minimum length if maximum lengh is unknown.
+ 	* gimple-ssa-sprintf.c (get_string_length): Likewise.  Drop code
+ 	that used c_strlen, it's no longer needed.  Restructure slightly.
+ 	(format_string): Set unlikely range appropriately.
+ 	* gimple-fold.c (get_range_strlen): Update comments.  Fix minor
+ 	formatting issues.
+ 	(get_range_strlen): Accept c_strlen_data pointer for external
+ 	call sites as well.  Pass through to call to internal get_range_strlen.
+ 	Adjust minlen, maxlen and maxbound as needed.
+ 	(get_maxval_strlen): Update comments.
+ 	(gimple_fold_builtin_strlen): Update call to get_range_strlen
+ 	to use c_strlen_data pointer.  Change variable accesses to instead
+ 	use c_strlen_data data members.
+ 
+ 	* gimple-fold.c (get_range_strlen): Update prototype.
+ 	(get_range_strlen_tree): Update prototype.  Drop minlen/maxlen
+ 	local variables.  Use pdata to return information to caller.
+ 	Update calls to get_range_strlen.  Update pdata->maxbound.
+ 	(get_range_strlen -- static version): Similarly.
+ 	(get_range_strlen -- extern version): Update for internal
+ 	get_range_strlen API change.  Convert to external data format.
+ 	(get_maxval_strlen): Similarly.
+ 
+ 2019-01-01  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* coverage.c (get_coverage_counts): Use current_function_decl.
+ 	* profile.c (read_thunk_profile): New function.
+ 	(branch_prob): Add THUNK parameter.
+ 	* tree-profile.c (tree_profiling): Handle thunks.
+ 	* value-prof.c (init_node_map): Handle thunks.
+ 	* value-prof.h (branch_prob): Upate prototype.
+ 	(read_thunk_profile): Declare.
+ 
+ 2019-01-01  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Update copyright years.
+ 
+ 	* gcc.c (process_command): Update copyright notice dates.
+ 	* gcov-dump.c (print_version): Ditto.
+ 	* gcov.c (print_version): Ditto.
+ 	* gcov-tool.c (print_version): Ditto.
+ 	* gengtype.c (create_file): Ditto.
+ 	* doc/cpp.texi: Bump @copying's copyright year.
+ 	* doc/cppinternals.texi: Ditto.
+ 	* doc/gcc.texi: Ditto.
+ 	* doc/gccint.texi: Ditto.
+ 	* doc/gcov.texi: Ditto.
+ 	* doc/install.texi: Ditto.
+ 	* doc/invoke.texi: Ditto.
+ 
+ Copyright (C) 2019 Free Software Foundation, Inc.
+ 
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved.
diff -Nrcpad gcc-9.3.0/gcc/DATESTAMP gcc-10.1.0/gcc/DATESTAMP
*** gcc-9.3.0/gcc/DATESTAMP	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/DATESTAMP	Thu May  7 10:49:59 2020
***************
*** 1 ****
! 20200312
--- 1 ----
! 20200507
diff -Nrcpad gcc-9.3.0/gcc/LANGUAGES gcc-10.1.0/gcc/LANGUAGES
*** gcc-9.3.0/gcc/LANGUAGES	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/LANGUAGES	Thu May  7 10:49:59 2020
*************** Feb 1, 1998:
*** 57,63 ****
      DEFTREECODE (CLASS_METHOD_DECL, "class_method_decl", 'd', 0)
  
  
! Copyright (C) 1998-2019 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
--- 57,63 ----
      DEFTREECODE (CLASS_METHOD_DECL, "class_method_decl", 'd', 0)
  
  
! Copyright (C) 1998-2020 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
diff -Nrcpad gcc-9.3.0/gcc/Makefile.in gcc-10.1.0/gcc/Makefile.in
*** gcc-9.3.0/gcc/Makefile.in	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/Makefile.in	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  # Makefile for GNU Compiler Collection
  # Run 'configure' to generate Makefile from Makefile.in
  
! # Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  #This file is part of GCC.
  
--- 1,7 ----
  # Makefile for GNU Compiler Collection
  # Run 'configure' to generate Makefile from Makefile.in
  
! # Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  #This file is part of GCC.
  
*************** xm_include_list=@xm_include_list@
*** 567,573 ****
  xm_defines=@xm_defines@
  lang_checks=
  lang_checks_parallelized=
! lang_opt_files=@lang_opt_files@ $(srcdir)/c-family/c.opt $(srcdir)/common.opt
  lang_specs_files=@lang_specs_files@
  lang_tree_files=@lang_tree_files@
  target_cpu_default=@target_cpu_default@
--- 567,573 ----
  xm_defines=@xm_defines@
  lang_checks=
  lang_checks_parallelized=
! lang_opt_files=@lang_opt_files@ $(srcdir)/c-family/c.opt $(srcdir)/common.opt $(srcdir)/params.opt $(srcdir)/analyzer/analyzer.opt
  lang_specs_files=@lang_specs_files@
  lang_tree_files=@lang_tree_files@
  target_cpu_default=@target_cpu_default@
*************** RTL_BASE_H = $(CORETYPES_H) rtl.h rtl.de
*** 928,934 ****
  FIXED_VALUE_H = fixed-value.h
  RTL_H = $(RTL_BASE_H) $(FLAGS_H) genrtl.h
  READ_MD_H = $(OBSTACK_H) $(HASHTAB_H) read-md.h
- PARAMS_H = params.h params-enum.h params.def
  BUILTINS_DEF = builtins.def sync-builtins.def omp-builtins.def \
  	gtm-builtins.def sanitizer.def \
  	hsa-builtins.def
--- 928,933 ----
*************** BUILD_LIBDEPS= $(BUILD_LIBIBERTY)
*** 1065,1071 ****
  LIBS = @LIBS@ libcommon.a $(CPPLIB) $(LIBINTL) $(LIBICONV) $(LIBBACKTRACE) \
  	$(LIBIBERTY) $(LIBDECNUMBER) $(HOST_LIBS)
  BACKENDLIBS = $(ISLLIBS) $(GMPLIBS) $(PLUGINLIBS) $(HOST_LIBS) \
! 	$(ZLIB)
  # Any system libraries needed just for GNAT.
  SYSLIBS = @GNAT_LIBEXC@
  
--- 1064,1070 ----
  LIBS = @LIBS@ libcommon.a $(CPPLIB) $(LIBINTL) $(LIBICONV) $(LIBBACKTRACE) \
  	$(LIBIBERTY) $(LIBDECNUMBER) $(HOST_LIBS)
  BACKENDLIBS = $(ISLLIBS) $(GMPLIBS) $(PLUGINLIBS) $(HOST_LIBS) \
! 	$(ZLIB) $(ZSTD_LIB)
  # Any system libraries needed just for GNAT.
  SYSLIBS = @GNAT_LIBEXC@
  
*************** GNATMAKE = @GNATMAKE@
*** 1076,1081 ****
--- 1075,1082 ----
  # Libs needed (at present) just for jcf-dump.
  LDEXP_LIB = @LDEXP_LIB@
  
+ ZSTD_LIB = @ZSTD_LIB@
+ 
  # Likewise, for use in the tools that must run on this machine
  # even if we are cross-building GCC.
  BUILD_LIBS = $(BUILD_LIBIBERTY)
*************** C_COMMON_OBJS = c-family/c-common.o c-fa
*** 1213,1218 ****
--- 1214,1247 ----
    c-family/c-ubsan.o c-family/known-headers.o \
    c-family/c-attribs.o c-family/c-warn.o c-family/c-spellcheck.o
  
+ # Analyzer object files
+ ANALYZER_OBJS = \
+ 	analyzer/analysis-plan.o \
+ 	analyzer/analyzer.o \
+ 	analyzer/analyzer-logging.o \
+ 	analyzer/analyzer-pass.o \
+ 	analyzer/analyzer-selftests.o \
+ 	analyzer/bar-chart.o \
+ 	analyzer/call-string.o \
+ 	analyzer/checker-path.o \
+ 	analyzer/constraint-manager.o \
+ 	analyzer/diagnostic-manager.o \
+ 	analyzer/engine.o \
+ 	analyzer/function-set.o \
+ 	analyzer/pending-diagnostic.o \
+ 	analyzer/program-point.o \
+ 	analyzer/program-state.o \
+ 	analyzer/region-model.o \
+ 	analyzer/sm.o \
+ 	analyzer/sm-file.o \
+ 	analyzer/sm-malloc.o \
+ 	analyzer/sm-pattern-test.o \
+ 	analyzer/sm-sensitive.o \
+ 	analyzer/sm-signal.o \
+ 	analyzer/sm-taint.o \
+ 	analyzer/state-purge.o \
+ 	analyzer/supergraph.o
+ 
  # Language-independent object files.
  # We put the *-match.o and insn-*.o files first so that a parallel make
  # will build them sooner, because they are large and otherwise tend to be
*************** OBJS = \
*** 1240,1246 ****
  	auto-profile.o \
  	bb-reorder.o \
  	bitmap.o \
- 	bt-load.o \
  	builtins.o \
  	caller-save.o \
  	calls.o \
--- 1269,1274 ----
*************** OBJS = \
*** 1265,1270 ****
--- 1293,1299 ----
  	compare-elim.o \
  	context.o \
  	convert.o \
+ 	coroutine-passes.o \
  	coverage.o \
  	cppbuiltin.o \
  	cppdefault.o \
*************** OBJS = \
*** 1283,1288 ****
--- 1312,1318 ----
  	df-problems.o \
  	df-scan.o \
  	dfp.o \
+ 	digraph.o \
  	dojump.o \
  	dominance.o \
  	domwalk.o \
*************** OBJS = \
*** 1306,1311 ****
--- 1336,1342 ----
  	fold-const.o \
  	fold-const-call.o \
  	function.o \
+ 	function-abi.o \
  	function-tests.o \
  	fwprop.o \
  	gcc-rich-location.o \
*************** OBJS = \
*** 1343,1348 ****
--- 1374,1380 ----
  	godump.o \
  	graph.o \
  	graphds.o \
+ 	graphviz.o \
  	graphite.o \
  	graphite-isl-ast-to-gimple.o \
  	graphite-dependences.o \
*************** OBJS = \
*** 1368,1373 ****
--- 1400,1406 ----
  	init-regs.o \
  	internal-fn.o \
  	ipa-cp.o \
+ 	ipa-sra.o \
  	ipa-devirt.o \
  	ipa-fnsummary.o \
  	ipa-polymorphic-call.o \
*************** OBJS = \
*** 1441,1446 ****
--- 1474,1480 ----
  	optinfo-emit-json.o \
  	options-save.o \
  	opts-global.o \
+ 	ordered-hash-map-tests.o \
  	passes.o \
  	plugin.o \
  	postreload-gcse.o \
*************** OBJS = \
*** 1451,1456 ****
--- 1485,1492 ----
  	print-tree.o \
  	profile.o \
  	profile-count.o \
+ 	range.o \
+ 	range-op.o \
  	read-md.o \
  	read-rtl.o \
  	read-rtl-function.o \
*************** OBJS = \
*** 1517,1522 ****
--- 1553,1559 ----
  	tree-data-ref.o \
  	tree-dfa.o \
  	tree-diagnostic.o \
+ 	tree-diagnostic-path.o \
  	tree-dump.o \
  	tree-eh.o \
  	tree-emutls.o \
*************** OBJS = \
*** 1595,1603 ****
--- 1632,1642 ----
  	tree-vector-builder.o \
  	tree-vrp.o \
  	tree.o \
+ 	tristate.o \
  	typed-splay-tree.o \
  	unique-ptr-tests.o \
  	valtrack.o \
+ 	value-range.o \
  	value-prof.o \
  	var-tracking.o \
  	varasm.o \
*************** OBJS = \
*** 1609,1617 ****
  	web.o \
  	wide-int.o \
  	wide-int-print.o \
- 	wide-int-range.o \
  	xcoffout.o \
  	$(out_object_file) \
  	$(EXTRA_OBJS) \
  	$(host_hook_obj)
  
--- 1648,1656 ----
  	web.o \
  	wide-int.o \
  	wide-int-print.o \
  	xcoffout.o \
  	$(out_object_file) \
+ 	$(ANALYZER_OBJS) \
  	$(EXTRA_OBJS) \
  	$(host_hook_obj)
  
*************** OBJS-libcommon = diagnostic.o diagnostic
*** 1627,1633 ****
  
  # Objects in libcommon-target.a, used by drivers and by the core
  # compiler and containing target-dependent code.
! OBJS-libcommon-target = $(common_out_object_file) prefix.o params.o \
  	opts.o opts-common.o options.o vec.o hooks.o common/common-targhooks.o \
  	hash-table.o file-find.o spellcheck.o selftest.o opt-suggestions.o
  
--- 1666,1672 ----
  
  # Objects in libcommon-target.a, used by drivers and by the core
  # compiler and containing target-dependent code.
! OBJS-libcommon-target = $(common_out_object_file) prefix.o \
  	opts.o opts-common.o options.o vec.o hooks.o common/common-targhooks.o \
  	hash-table.o file-find.o spellcheck.o selftest.o opt-suggestions.o
  
*************** $(FULL_DRIVER_NAME): ./xgcc
*** 1704,1709 ****
--- 1743,1752 ----
  # language hooks, generated by configure
  @language_hooks@
  
+ # Wire in install-gnatlib invocation with `make install' for a configuration
+ # with top-level libada disabled.
+ gnat_install_lib = @gnat_install_lib@
+ 
  # per-language makefile fragments
  ifneq ($(LANG_MAKEFRAGS),)
  include $(LANG_MAKEFRAGS)
*************** cstamp-h: config.in config.status
*** 1892,1897 ****
--- 1935,1948 ----
  	CONFIG_FILES= \
  	LANGUAGES="$(CONFIG_LANGUAGES)" $(SHELL) config.status
  
+ # On configurations that require auto-build.h, it is created while
+ # running configure, so make config.status depend on it, so that
+ # config.status --recheck runs and updates or creates it.
+ @HAVE_AUTO_BUILD@auto-build.h: $(srcdir)/configure $(srcdir)/config.gcc
+ @HAVE_AUTO_BUILD@	@if test -f $@; then echo rerunning config.status to update $@; \
+ @HAVE_AUTO_BUILD@	else echo rerunning config.status to update $@; fi
+ @HAVE_AUTO_BUILD@config.status: auto-build.h
+ 
  # Really, really stupid make features, such as SUN's KEEP_STATE, may force
  # a target to build even if it is up-to-date.  So we must verify that
  # config.status does not exist before failing.
*************** gcc-ranlib.c: gcc-ar.c
*** 2117,2123 ****
  gcc-nm.c: gcc-ar.c
  	cp $^ $@
  
! COLLECT2_OBJS = collect2.o collect2-aix.o tlink.o vec.o ggc-none.o \
    collect-utils.o file-find.o hash-table.o selftest.o
  COLLECT2_LIBS = @COLLECT2_LIBS@
  collect2$(exeext): $(COLLECT2_OBJS) $(LIBDEPS)
--- 2168,2174 ----
  gcc-nm.c: gcc-ar.c
  	cp $^ $@
  
! COLLECT2_OBJS = collect2.o collect2-aix.o vec.o ggc-none.o \
    collect-utils.o file-find.o hash-table.o selftest.o
  COLLECT2_LIBS = @COLLECT2_LIBS@
  collect2$(exeext): $(COLLECT2_OBJS) $(LIBDEPS)
*************** version.o: $(REVISION) $(DATESTAMP) $(BA
*** 2226,2231 ****
--- 2277,2284 ----
  # lto-compress.o needs $(ZLIBINC) added to the include flags.
  CFLAGS-lto-compress.o += $(ZLIBINC)
  
+ CFLAGS-lto-streamer-in.o += -DTARGET_MACHINE=\"$(target_noncanonical)\"
+ 
  bversion.h: s-bversion; @true
  s-bversion: BASE-VER
  	echo "#define BUILDING_GCC_MAJOR `echo $(BASEVER_c) | sed -e 's/^\([0-9]*\).*$$/\1/'`" > bversion.h
*************** GTFILES = $(CPPLIB_H) $(srcdir)/input.h
*** 2522,2533 ****
    $(srcdir)/libfuncs.h $(SYMTAB_H) \
    $(srcdir)/real.h $(srcdir)/function.h $(srcdir)/insn-addr.h $(srcdir)/hwint.h \
    $(srcdir)/fixed-value.h \
    $(srcdir)/output.h $(srcdir)/cfgloop.h $(srcdir)/cfg.h $(srcdir)/profile-count.h \
    $(srcdir)/cselib.h $(srcdir)/basic-block.h  $(srcdir)/ipa-ref.h $(srcdir)/cgraph.h \
    $(srcdir)/reload.h $(srcdir)/caller-save.c $(srcdir)/symtab.c \
    $(srcdir)/alias.c $(srcdir)/bitmap.c $(srcdir)/cselib.c $(srcdir)/cgraph.c \
    $(srcdir)/ipa-prop.c $(srcdir)/ipa-cp.c $(srcdir)/ipa-utils.h \
!   $(srcdir)/dbxout.c \
    $(srcdir)/signop.h \
    $(srcdir)/dwarf2out.h \
    $(srcdir)/dwarf2asm.c \
--- 2575,2587 ----
    $(srcdir)/libfuncs.h $(SYMTAB_H) \
    $(srcdir)/real.h $(srcdir)/function.h $(srcdir)/insn-addr.h $(srcdir)/hwint.h \
    $(srcdir)/fixed-value.h \
+   $(srcdir)/function-abi.h \
    $(srcdir)/output.h $(srcdir)/cfgloop.h $(srcdir)/cfg.h $(srcdir)/profile-count.h \
    $(srcdir)/cselib.h $(srcdir)/basic-block.h  $(srcdir)/ipa-ref.h $(srcdir)/cgraph.h \
    $(srcdir)/reload.h $(srcdir)/caller-save.c $(srcdir)/symtab.c \
    $(srcdir)/alias.c $(srcdir)/bitmap.c $(srcdir)/cselib.c $(srcdir)/cgraph.c \
    $(srcdir)/ipa-prop.c $(srcdir)/ipa-cp.c $(srcdir)/ipa-utils.h \
!   $(srcdir)/ipa-param-manipulation.h $(srcdir)/ipa-sra.c $(srcdir)/dbxout.c \
    $(srcdir)/signop.h \
    $(srcdir)/dwarf2out.h \
    $(srcdir)/dwarf2asm.c \
*************** GTFILES = $(CPPLIB_H) $(srcdir)/input.h
*** 2571,2576 ****
--- 2625,2631 ----
    $(srcdir)/target-globals.h \
    $(srcdir)/ipa-predicate.h \
    $(srcdir)/ipa-fnsummary.h \
+   $(srcdir)/value-range.h \
    $(srcdir)/vtable-verify.c \
    $(srcdir)/asan.c \
    $(srcdir)/ubsan.c \
*************** generated_files = config.h tm.h $(TM_P_H
*** 2634,2641 ****
         options.h target-hooks-def.h insn-opinit.h \
         common/common-target-hooks-def.h pass-instances.def \
         c-family/c-target-hooks-def.h d/d-target-hooks-def.h \
!        params.list params.options case-cfn-macros.h \
!        cfn-operators.pd
  
  #
  # How to compile object files to run on the build machine.
--- 2689,2696 ----
         options.h target-hooks-def.h insn-opinit.h \
         common/common-target-hooks-def.h pass-instances.def \
         c-family/c-target-hooks-def.h d/d-target-hooks-def.h \
!        case-cfn-macros.h \
!        cfn-operators.pd omp-device-properties.h
  
  #
  # How to compile object files to run on the build machine.
*************** build/genmddump.o : genmddump.c $(RTL_BA
*** 2783,2789 ****
    $(CORETYPES_H) $(GTM_H) errors.h $(READ_MD_H) $(GENSUPPORT_H)
  build/genmatch.o : genmatch.c $(BCONFIG_H) $(SYSTEM_H) \
    $(CORETYPES_H) errors.h $(HASH_TABLE_H) hash-map.h $(GGC_H) is-a.h \
!   tree.def builtins.def internal-fn.def case-cfn-macros.h
  build/gencfn-macros.o : gencfn-macros.c $(BCONFIG_H) $(SYSTEM_H)	\
    $(CORETYPES_H) errors.h $(HASH_TABLE_H) hash-set.h builtins.def	\
    internal-fn.def
--- 2838,2844 ----
    $(CORETYPES_H) $(GTM_H) errors.h $(READ_MD_H) $(GENSUPPORT_H)
  build/genmatch.o : genmatch.c $(BCONFIG_H) $(SYSTEM_H) \
    $(CORETYPES_H) errors.h $(HASH_TABLE_H) hash-map.h $(GGC_H) is-a.h \
!   tree.def builtins.def internal-fn.def case-cfn-macros.h $(CPPLIB_H)
  build/gencfn-macros.o : gencfn-macros.c $(BCONFIG_H) $(SYSTEM_H)	\
    $(CORETYPES_H) errors.h $(HASH_TABLE_H) hash-set.h builtins.def	\
    internal-fn.def
*************** genprogmd = $(genprogrtl) mddeps constan
*** 2803,2813 ****
  $(genprogmd:%=build/gen%$(build_exeext)): $(BUILD_MD)
  
  # All these programs need to report errors.
! genprogerr = $(genprogmd) genrtl modes gtype hooks cfn-macros
  $(genprogerr:%=build/gen%$(build_exeext)): $(BUILD_ERRORS)
  
  # Remaining build programs.
! genprog = $(genprogerr) check checksum condmd match
  
  # These programs need libs over and above what they get from the above list.
  build/genautomata$(build_exeext) : BUILD_LIBS += -lm
--- 2858,2868 ----
  $(genprogmd:%=build/gen%$(build_exeext)): $(BUILD_MD)
  
  # All these programs need to report errors.
! genprogerr = $(genprogmd) genrtl modes gtype hooks cfn-macros condmd
  $(genprogerr:%=build/gen%$(build_exeext)): $(BUILD_ERRORS)
  
  # Remaining build programs.
! genprog = $(genprogerr) check checksum match
  
  # These programs need libs over and above what they get from the above list.
  build/genautomata$(build_exeext) : BUILD_LIBS += -lm
*************** $(genprog:%=build/gen%$(build_exeext)):
*** 2844,2849 ****
--- 2899,2928 ----
  	+$(LINKER_FOR_BUILD) $(BUILD_LINKERFLAGS) $(BUILD_LDFLAGS) -o $@ \
  	    $(filter-out $(BUILD_LIBDEPS), $^) $(BUILD_LIBS)
  
+ omp-general.o: omp-device-properties.h
+ 
+ omp_device_properties = @omp_device_properties@
+ omp-device-properties.h: s-omp-device-properties-h ; @true
+ s-omp-device-properties-h: @omp_device_property_deps@
+ 	-rm -f tmp-omp-device-properties.h; \
+ 	for kind in kind arch isa; do \
+ 	  echo 'const char omp_offload_device_'$${kind}'[] = ' \
+ 	    >> tmp-omp-device-properties.h; \
+ 	  for prop in none $(omp_device_properties); do \
+ 	    [ "$$prop" = "none" ] && continue; \
+ 	    tgt=`echo "$$prop" | sed 's/=.*$$//'`; \
+ 	    props=`echo "$$prop" | sed 's/.*=//'`; \
+ 	    echo "\"$$tgt\\0\"" >> tmp-omp-device-properties.h; \
+ 	    sed -n 's/^'$${kind}': //p' $${props} \
+ 	      | sed 's/[[:blank:]]/ /g;s/  */ /g;s/^ //;s/ $$//;s/ /\\0/g;s/^/"/;s/$$/\\0\\0"/' \
+ 	      >> tmp-omp-device-properties.h; \
+ 	  done; \
+ 	  echo '"";' >> tmp-omp-device-properties.h; \
+ 	done; \
+ 	$(SHELL) $(srcdir)/../move-if-change tmp-omp-device-properties.h \
+ 	  omp-device-properties.h
+ 	$(STAMP) s-omp-device-properties-h
+ 
  # Generated source files for gengtype.  Prepend inclusion of
  # config.h/bconfig.h because AIX requires _LARGE_FILES to be defined before
  # any system header is included.
*************** TEXI_GCC_FILES = gcc.texi gcc-common.tex
*** 3158,3164 ****
  	 gcov.texi trouble.texi bugreport.texi service.texi		\
  	 contribute.texi compat.texi funding.texi gnu.texi gpl_v3.texi	\
  	 fdl.texi contrib.texi cppenv.texi cppopts.texi avr-mmcu.texi	\
! 	 implement-c.texi implement-cxx.texi gcov-tool.texi gcov-dump.texi
  
  # we explicitly use $(srcdir)/doc/tm.texi here to avoid confusion with
  # the generated tm.texi; the latter might have a more recent timestamp,
--- 3237,3244 ----
  	 gcov.texi trouble.texi bugreport.texi service.texi		\
  	 contribute.texi compat.texi funding.texi gnu.texi gpl_v3.texi	\
  	 fdl.texi contrib.texi cppenv.texi cppopts.texi avr-mmcu.texi	\
! 	 implement-c.texi implement-cxx.texi gcov-tool.texi gcov-dump.texi \
! 	 lto-dump.texi
  
  # we explicitly use $(srcdir)/doc/tm.texi here to avoid confusion with
  # the generated tm.texi; the latter might have a more recent timestamp,
*************** TEXI_GCCINT_FILES = gccint.texi gcc-comm
*** 3172,3178 ****
  	 gnu.texi gpl_v3.texi fdl.texi contrib.texi languages.texi	\
  	 sourcebuild.texi gty.texi libgcc.texi cfg.texi tree-ssa.texi	\
  	 loop.texi generic.texi gimple.texi plugins.texi optinfo.texi   \
! 	 match-and-simplify.texi ux.texi poly-int.texi
  
  TEXI_GCCINSTALL_FILES = install.texi install-old.texi fdl.texi		\
  	 gcc-common.texi gcc-vers.texi
--- 3252,3258 ----
  	 gnu.texi gpl_v3.texi fdl.texi contrib.texi languages.texi	\
  	 sourcebuild.texi gty.texi libgcc.texi cfg.texi tree-ssa.texi	\
  	 loop.texi generic.texi gimple.texi plugins.texi optinfo.texi   \
! 	 match-and-simplify.texi analyzer.texi ux.texi poly-int.texi
  
  TEXI_GCCINSTALL_FILES = install.texi install-old.texi fdl.texi		\
  	 gcc-common.texi gcc-vers.texi
*************** $(build_htmldir)/gccinstall/index.html:
*** 3281,3287 ****
  	$(SHELL) $(srcdir)/doc/install.texi2html
  
  MANFILES = doc/gcov.1 doc/cpp.1 doc/gcc.1 doc/gfdl.7 doc/gpl.7 \
!            doc/fsf-funding.7 doc/gcov-tool.1 doc/gcov-dump.1
  
  generated-manpages: man
  
--- 3361,3368 ----
  	$(SHELL) $(srcdir)/doc/install.texi2html
  
  MANFILES = doc/gcov.1 doc/cpp.1 doc/gcc.1 doc/gfdl.7 doc/gpl.7 \
!            doc/fsf-funding.7 doc/gcov-tool.1 doc/gcov-dump.1 \
! 	   $(if $(filter yes,@enable_lto@),doc/lto-dump.1)
  
  generated-manpages: man
  
*************** installdirs:
*** 3471,3489 ****
  	$(mkinstalldirs) $(DESTDIR)$(man1dir)
  	$(mkinstalldirs) $(DESTDIR)$(man7dir)
  
- params.list: s-params.list; @true
- s-params.list: $(srcdir)/params-list.h $(srcdir)/params.def
- 	$(CPP) $(srcdir)/params-list.h | sed 's/^#.*//;/^$$/d' > tmp-params.list
- 	$(SHELL) $(srcdir)/../move-if-change tmp-params.list params.list
- 	$(STAMP) s-params.list
- 
- params.options: s-params.options; @true
- s-params.options: $(srcdir)/params-options.h $(srcdir)/params.def
- 	$(CPP) $(srcdir)/params-options.h | sed 's/^#.*//;/^$$/d' > tmp-params.options
- 	$(SHELL) $(srcdir)/../move-if-change tmp-params.options params.options
- 	$(STAMP) s-params.options
- 
- 
  PLUGIN_HEADERS = $(TREE_H) $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \
    toplev.h $(DIAGNOSTIC_CORE_H) $(BASIC_BLOCK_H) $(HASH_TABLE_H) \
    tree-ssa-alias.h $(INTERNAL_FN_H) gimple-fold.h tree-eh.h gimple-expr.h \
--- 3552,3557 ----
*************** install-man: lang.install-man \
*** 3691,3696 ****
--- 3759,3765 ----
  	$(DESTDIR)$(man1dir)/$(GCOV_INSTALL_NAME)$(man1ext) \
  	$(DESTDIR)$(man1dir)/$(GCOV_TOOL_INSTALL_NAME)$(man1ext) \
  	$(DESTDIR)$(man1dir)/$(GCOV_DUMP_INSTALL_NAME)$(man1ext) \
+ 	$(if $(filter yes,@enable_lto@),$(DESTDIR)$(man1dir)/$(LTO_DUMP_INSTALL_NAME)$(man1ext)) \
  	$(DESTDIR)$(man7dir)/fsf-funding$(man7ext) \
  	$(DESTDIR)$(man7dir)/gfdl$(man7ext) \
  	$(DESTDIR)$(man7dir)/gpl$(man7ext)
*************** $(DESTDIR)$(man1dir)/$(GCOV_DUMP_INSTALL
*** 3724,3729 ****
--- 3793,3803 ----
  	-rm -f $@
  	-$(INSTALL_DATA) $< $@
  	-chmod a-x $@
+ 
+ $(DESTDIR)$(man1dir)/$(LTO_DUMP_INSTALL_NAME)$(man1ext): doc/lto-dump.1 installdirs
+ 	-rm -f $@
+ 	-$(INSTALL_DATA) $< $@
+ 	-chmod a-x $@
  
  # Install all the header files built in the include subdirectory.
  install-headers: $(INSTALL_HEADERS_DIR)
diff -Nrcpad gcc-9.3.0/gcc/README.Portability gcc-10.1.0/gcc/README.Portability
*** gcc-9.3.0/gcc/README.Portability	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/README.Portability	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! Copyright (C) 2000-2019 Free Software Foundation, Inc.
  
  This file is intended to contain a few notes about writing C code
  within GCC so that it compiles without error on the full range of
--- 1,4 ----
! Copyright (C) 2000-2020 Free Software Foundation, Inc.
  
  This file is intended to contain a few notes about writing C code
  within GCC so that it compiles without error on the full range of
diff -Nrcpad gcc-9.3.0/gcc/acinclude.m4 gcc-10.1.0/gcc/acinclude.m4
*** gcc-9.3.0/gcc/acinclude.m4	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/acinclude.m4	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! dnl Copyright (C) 2005-2019 Free Software Foundation, Inc.
  dnl
  dnl This file is part of GCC.
  dnl
--- 1,4 ----
! dnl Copyright (C) 2005-2020 Free Software Foundation, Inc.
  dnl
  dnl This file is part of GCC.
  dnl
diff -Nrcpad gcc-9.3.0/gcc/ada/ChangeLog gcc-10.1.0/gcc/ada/ChangeLog
*** gcc-9.3.0/gcc/ada/ChangeLog	Thu Mar 12 11:08:03 2020
--- gcc-10.1.0/gcc/ada/ChangeLog	Thu May  7 10:50:32 2020
***************
*** 1,390 ****
! 2020-03-12  Release Manager
  
! 	* GCC 9.3.0 released.
  
  2020-03-11  Richard Wai  <richard@annexi-strayline.com>
  
  	* gcc-interface/decl.c (gnat_to_gnu_entity): Also test Is_Public on
  	the Alias of the entitiy, if it is present, in the main assertion.
  
! 2019-11-29  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	PR ada/92489
! 	Backport from mainline
! 	2019-07-01  Ed Schonberg  <schonberg@adacore.com>
! 
! 	* exp_attr.adb (Expand_Attribute_Reference, case Invalid_Value):
! 	Resolve result of call to Get_Simple_Init_Val, which may be a
! 	conversion of a literal.
! 
! 2019-11-25  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	PR ada/92362
! 	* gcc-interface/trans.c (gnat_to_gnu) <N_Attribute_Definition_Clause>:
! 	Use a temporary instead of clobbering the result with a freeze node.
! 
! 2019-11-25  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	PR ada/92575
! 	* expect.c (__gnat_expect_poll [VMS, HPUX]): Fix typo.
! 
! 2019-11-08  Jakub Jelinek  <jakub@redhat.com>
! 
! 	Backported from mainline
! 	2019-10-27  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* locales.c (iso_3166): Add missing comma after "United-States".
! 
! 2019-10-12  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	PR ada/91995
! 	* sem_ch8.adb (Chain_Use_Clause): Remove second argument in calls
! 	to Defining_Entity.
! 	* sem_elab.adb (Find_Unit_Entity): Likewise.  Deal with N_Subunit
! 	here in lieu of in Defining_Entity.
! 	* sem_spark.adb (Check_Callable_Body): Likewise.
! 	(Check_Package_Body): Likewise.
! 	* sem_util.ads (Defining_Entity): Remove 2nd and 3th parameters.
! 	* sem_util.adb (Defining_Entity): Remove 2nd and 3th parameters,
! 	and adjust accordingly.  Deal with N_Compilation_Unit.
! 
! 2019-10-11  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/decl.c (annotate_value) <INTEGER_CST>: Really test the
! 	sign of the value when deciding to build a NEGATE_EXPR.
! 	<PLUS_EXPR>: Remove redundant line.
! 	<BIT_AND_EXPR>: Do the negation here.
! 
! 2019-09-23  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (Attribute_to_gnu): Test Can_Use_Internal_Rep
! 	on the underlying type of the node.
! 	(Call_to_gnu): Likewise with the type of the prefix.
! 
! 2019-08-12  Release Manager
! 
! 	* GCC 9.2.0 released.
! 
! 2019-08-05  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline.
! 	2019-07-02  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	* libgnat/system-darwin-ppc.ads: Set Stack_Check_Probes True for
! 	PPC Darwin.
! 
! 2019-08-05  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	Backport from mainline.
! 	2019-06-30  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	* gnatlink.adb (Link_Step): Remove duplicate -static-libgcc switches.
! 	Push -shared-libgcc explicitly, when it is the target default (unless
! 	overidden by the static flag).
! 	When the user has put an instance of shared/static-libgcc do not push
! 	a duplicate of this.
! 
! 2019-07-04  James Clarke <jrtc27@debian.org>
! 
! 	* libgnarl/s-osinte__kfreebsd-gnu.ads (clockid_t): Make type
! 	definition public.
! 	(CLOCK_REALTIME): Make value public.
! 
! 2019-06-29  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/decl.c (gnat_to_gnu_entity): Beep up comment on SAVED,
! 	and tweak comment on the assertion about the scopes of Itypes.  Do not
! 	skip the regular processing for Itypes that are E_Record_Subtype with
! 	a Cloned_Subtype.  Get the Cloned_Subtype for every E_Record_Subtype
! 	if the type is dummy and hasn't got its own freeze node.
! 	<E_Record_Subtype>: Save again the DECL of the Cloned_Subtype, if any.
! 	<E_Access_Subtype>: Save again the DECL of the equivalent type.
! 	(Gigi_Equivalent_Type) <E_Access_Subtype>: New case.
! 
! 2019-06-29  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (mark_visited_r): Set TYPE_SIZES_GIMPLIFIED on
! 	the main variant of a type, if any.
! 
! 2019-06-29  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/decl.c (set_nonaliased_component_on_array_type): Add
! 	missing guard for the presence of TYPE_CANONICAL.
! 	(set_reverse_storage_order_on_array_type): Likewise.
! 
! 2019-06-18  Arnaud Charlet  <charlet@adacore.com>
! 
! 	PR ada/80590
! 	* sem_ch5.adb (Analyze_Loop_Statement): Avoid exception propagation
! 	during normal processing.
! 
! 2019-06-17  Arnaud Charlet  <charlet@adacore.com>
! 
! 	PR ada/80590
! 	* exp_ch9.adb (Expand_N_Delay_Relative_Statement): Swap the two
! 	conditions to avoid a unnecessary exception propagation in the default
! 	case.
! 
! 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (lvalue_required_for_attribute_p): Return 0
! 	for 'Size too.
! 	(Identifier_to_gnu): Use the actual subtype for a reference to a
! 	packed array in a return statement.
! 	(Attribute_to_gnu) <Attr_Size>: Do not strip VIEW_CONVERT_EXPRs from
! 	the prefix in every case.
! 
! 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (gnat_to_gnu): Remove superfluous tests on
! 	Backend_Overflow_Checks_On_Target and rework comments.
! 
! 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (walk_nesting_tree): New static function.
! 	(finalize_nrv): Use it to walk the entire nesting tree.
! 
! 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Record_Subtype>: Remove
! 	obsolete test on Is_For_Access_Subtype.
! 
! 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/decl.c (components_to_record): Set a name on the type
! 	created for the REP part, if any.
! 	* gcc-interface/utils.c (finish_record_type): Only take the maximum
! 	when merging sizes for a variant part at offset 0.
! 	(merge_sizes): Rename has_rep parameter into max.
! 
! 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (Call_to_gnu): Do not initialize the temporary
! 	created out of addressability concerns if it's for the _Init parameter
! 	of an initialization procedure.
! 
! 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/utils.c (maybe_pad_type): Issue the warning for the
! 	specific case of component types preferably.
! 
! 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (Identifier_to_gnu): Minor tweaks.
! 	(gnat_to_gnu): Do not convert the result if it is a reference to an
! 	unconstrained array used as the prefix of an attribute reference that
! 	requires an lvalue.
! 
! 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (Gigi_Types_Compatible): New predicate.
! 	(Identifier_to_gnu): Use it to assert that the type of the identifier
! 	and that of its entity are compatible for gigi.  Rename a couple of
! 	local variables and separate the processing of the result type.
! 
! 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (Call_to_gnu): Use the unpadded type when
! 	putting back an intermediate conversion the type of the actuals.
! 
! 2019-05-07  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
! 
! 	* gcc-interface/Makefile.in (install-gcc-specs): Use foreach.
! 	Honor DESTDIR.
! 
! 2019-05-03  Release Manager
! 
! 	* GCC 9.1.0 released.
! 
! 2019-04-24  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
! 	    Bernd Edlinger  <bernd.edlinger@hotmail.de>
! 	    Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR target/89093
! 	* raise-gcc.c (TARGET_ATTRIBUTE): Define.
! 	(continue_unwind, personality_body, PERSONALITY_FUNCTION): Add
! 	TARGET_ATTRIBUTE.
! 
! 2019-04-07  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* libgnat/i-cexten.ads (CFloat_128): New type.
! 
! 2019-03-22  Dmitriy Anisimkov  <anisimko@adacore.com>
! 
! 	PR ada/89583
! 	* libgnat/g-socket.adb (Bind_Socket, Connect_Socket,
! 	Send_Socket): Fix the computation of structure lengths passed to
! 	low level routines.
! 	(Is_IPv6_Address): Fix the number of expected colons.
! 
! 2019-03-11  Martin Liska  <mliska@suse.cz>
! 
! 	* gcc-interface/misc.c (gnat_post_options): Wrap option name in string
! 	format message and fix GNU coding style.
! 
! 2019-02-08  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (gnat_to_gnu) <N_Aggregate>: Minor tweak.
! 	* gcc-interface/utils.c (convert): Do not pad when doing an unchecked
! 	conversion here.  Use TREE_CONSTANT throughout the function.
! 	(unchecked_convert): Also pad if the source is a CONSTRUCTOR and the
! 	destination is a more aligned array type or a larger aggregate type,
! 	but not between original and packable versions of a type.
! 
! 2019-02-08  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/utils.c (max_size) <tcc_unary>: Be prepared for an
! 	operand with VOID_TYPE.
! 
! 2019-02-08  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (elaborate_all_entities): Do not elaborate the
! 	entities of a package renaming another one.
! 
! 2019-02-08  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (Regular_Loop_to_gnu): Replace tests on
! 	individual flag_unswitch_loops and flag_tree_loop_vectorize switches
! 	with test on global optimize switch.
! 	(Raise_Error_to_gnu): Likewise.
! 
! 2019-02-07  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* libgnarl/s-linux__sparc.ads (ETIMEDOUT): Set to correct value.
! 
! 2019-02-06  Arnaud Charlet  <charlet@adacore.com>
! 
! 	* libgnarl/s-linux__x32.ads: Resync list of signals with s-linux.ads
! 
! 2019-01-27  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* repinfo.adb (List_Component_Layout): Remove superfluous space for
! 	zero-sized field.
! 	* gcc-interface/ada-tree.h (TYPE_IS_EXTRA_SUBTYPE_P): New macro.
! 	* gcc-interface/gigi.h (create_extra_subtype): Declare.
! 	* gcc-interface/decl.c (TYPE_ARRAY_SIZE_LIMIT): Likewise.
! 	(update_n_elem): New function.
! 	(gnat_to_gnu_entity): Use create_extra_subtype to create extra subtypes
! 	instead of doing it manually.
! 	<E_Array_Type>: Use update_n_elem to compute the maximum size.  Use the
!  	index type instead of base type for the bounds. Set TYPE_ARRAY_MAX_SIZE
! 	of the array to the maximum size.
! 	<E_Array_Subtype>: Create an extra subtype using the index type of the
! 	base array type for self-referential bounds.  Use update_n_elem to
! 	compute the maximum size.  Set TYPE_ARRAY_MAX_SIZE of the array to the
! 	maximum size.
! 	(gnat_to_gnu_field): Clear DECL_NONADDRESSABLE_P on discriminants.
! 	* gcc-interface/misc.c (gnat_get_alias_set): Return the alias set of
! 	the base type for an extra subtype.
! 	(gnat_type_max_size): Remove obsolete code.
! 	* gcc-interface/trans.c (Attribute_to_gnu): Minor tweak.
! 	(can_be_lower_p): Deal with pathological types.
! 	* gcc-interface/utils.c (create_extra_subtype): New function.
! 	(create_field_decl): Minor tweak.
! 	(max_size) <tcc_reference>: Compute a better value by using the extra
!  	subtypes on the self-referential bounds.
! 	<tcc_binary>: Rewrite.  Deal with "negative value" in unsigned types.
! 	<tcc_expression>: Likewise.
! 	* gcc-interface/utils2.c (compare_arrays): Retrieve the original bounds
! 	of the arrays upfront.  Swap only if the second length is not constant.
! 	Use comparisons on the original bounds consistently for the null tests.
! 	(build_binary_op): Use TYPE_IS_EXTRA_SUBTYPE_P macro.
! 	(build_allocator): Minor tweak.
! 
! 2019-01-27  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/decl.c (array_type_has_nonaliased_component): Return
! 	the same value for every dimension of a multidimensional array type.
! 
! 2019-01-26  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (Regular_Loop_to_gnu): Use the SLOC of the
! 	iteration scheme, if present, throughout the translation.
! 
! 2019-01-26  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (gnat_to_gnu) <N_Assignment_Statement>: Use
! 	DECL_SIZE_UNIT instead of TYPE_SIZE_UNIT for the size to be assigned
! 	by a call to memset if the LHS is a DECL.
! 
! 2019-01-26  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (struct loop_info_d): Remove artificial field.
! 	(Loop_Statement_to_gnu): Do not set it.
! 
! 2019-01-26  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/trans.c (Iterate_Acc_Clause_Arg): Fix formatting.
! 	(Acc_gnat_to_gnu): Likewise.
! 	(Acc_Data_to_gnu): Likewise.
! 	(Acc_Var_to_gnu): Likewise.
! 	(Acc_Reduc_to_gnu): Likewise.
! 	(Acc_Size_List_to_gnu): Likewise.
! 	(Pragma_to_gnu) <Pragma_Acc_Loop>: Likewise.
! 	<Pragma_Acc_Data>): Likewise.
! 	(find_loop_for): Remove default value for parameters.
! 	* gcc-interface/trans.c (gnat_to_gnu) <N_Op_And>: Merge into...
! 	<N_Op_Eq>): ...this.
! 
! 2019-01-26  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* gcc-interface/decl.c (annotate_value) <INTEGER_CST>: Use test on
! 	the sign bit instead of on the sign of the value.
! 	<PLUS_EXPR>: Turn addition of negative constant into subtraction.
! 	<MULT_EXPR>: Add test for degenerate case.
! 	<BIT_AND_EXPR>: Simplify.
! 
! 2019-01-18  Sebastian Huber  <sebastian.huber@embedded-brains.de>
! 
! 	* s-oscons-tmplt.c (AF_INET6): Do not undefine for RTEMS.
! 
! 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
! 
! 	PR other/16615
! 	* exp_ch11.adb: Change "can not" to "cannot".
! 	* sem_ch4.adb: Likewise.
! 
! 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
! 
! 	PR other/16615
! 	* exp_ch9.adb: Mechanically replace "can not" with "cannot".
! 	* libgnat/s-regpat.ads: Likewise.
! 	* par-ch4.adb: Likewise.
! 	* set_targ.adb: Likewise.
! 	* types.ads: Likewise.
! 
! 2019-01-08  Justin Squirek  <squirek@adacore.com>
! 
! 	Revert:
! 	2018-07-31  Justin Squirek  <squirek@adacore.com>
! 
! 	* lib-writ.adb (Write_With_Lines): Modfiy the generation
! 	of dependencies within ali files so that source unit
! 	bodies are properly listed even if said bodies are
! 	missing.  Perform legacy behavior in GNATprove mode.
! 	* lib-writ.ads: Modify documentation to reflect current
! 	behavior.
! 
! 	and:
! 	2018-09-26  Justin Squirek  <squirek@adacore.com>
  
! 	* lib-writ.adb, lib-writ.ads (Write_With_Lines): Add
! 	documentation and an extra conditional check for RCI
! 	units so that generated ali files will list the spec
! 	only instead of a body when a body is not found.
  
! 2019-01-04  Eric Botcazou  <ebotcazou@adacore.com>
  
  	* gnatvsn.ads: Bump copyright year.
  
! 2019-01-01  Jakub Jelinek  <jakub@redhat.com>
  
  	Update copyright years.
  
!  	* gnat_ugn.texi: Bump @copying's copyright year.
!  	* gnat_rm.texi: Likewise.
  
! Copyright (C) 2019 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
--- 1,36 ----
! 2020-05-07  Release Manager
  
! 	* GCC 10.1.0 released.
! 
! 2020-05-04  Mikael Pettersson  <mikpelinux@gmail.com>
! 
! 	PR bootstrap/94918
! 	* mingw32.h: Prevent windows.h from including emmintrin.h on Cygwin64.
! 	* s-oscons-tmplt.c (Serial_Port_Descriptor): Use System.Win32.HANDLE
! 	also on Cygwin.
  
  2020-03-11  Richard Wai  <richard@annexi-strayline.com>
  
  	* gcc-interface/decl.c (gnat_to_gnu_entity): Also test Is_Public on
  	the Alias of the entitiy, if it is present, in the main assertion.
  
! 2020-02-06  Alexandre Oliva <oliva@adacore.com>
  
! 	* raise-gcc.c (personality_body) [__ARM_EABI_UNWINDER__]:
! 	Initialize barrier_cache.sp when ending phase1.
  
! 2020-01-04  Eric Botcazou  <ebotcazou@adacore.com>
  
  	* gnatvsn.ads: Bump copyright year.
  
! 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
  
  	Update copyright years.
  
!   	* gnat_ugn.texi: Bump @copying's copyright year.
!   	* gnat_rm.texi: Likewise.
  
! Copyright (C) 2020 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
diff -Nrcpad gcc-9.3.0/gcc/ada/ChangeLog-2019 gcc-10.1.0/gcc/ada/ChangeLog-2019
*** gcc-9.3.0/gcc/ada/ChangeLog-2019	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/ChangeLog-2019	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,6716 ----
+ 2019-12-22  Maciej W. Rozycki  <macro@wdc.com>
+ 
+ 	* gcc-interface/Makefile.in (toolexeclibdir): New variable.
+ 
+ 2019-12-18  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (Pragma_to_gnu) <Pragma_Warnings>: Push a
+ 	diagnostics state for pragma Warnings (Off) before turning off all
+ 	the warnings and only pop it for pragma Warnings (On).
+ 
+ 2019-12-18  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* sem_ch6.adb (Analyze_Function_Return): Modify handling of
+ 	extended return statements to check accessibility of access
+ 	discriminants.
+ 	(Check_Aggregate_Accessibility): Removed.
+ 	(Check_Return_Obj_Accessibility): Added to centralize checking
+ 	of return aggregates and subtype indications in the case of an
+ 	extended return statement.
+ 
+ 2019-12-18  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* libgnat/s-regpat.adb (Parse_Literal, Parse_Piece): Ensure
+ 	Expr_Flags is always fully initialized.
+ 
+ 2019-12-18  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* libgnat/s-atopar.ads, libgnat/s-atopex.ads (Atomic_Type): Can
+ 	now be marked Atomic. This requires marking the unit Ada 202x.
+ 
+ 2019-12-18  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* libgnat/a-nbnbin.ads, libgnat/a-nbnbin.adb,
+ 	libgnat/a-nbnbre.ads, libgnat/a-nbnbre.adb: Replace
+ 	Optional_Big_* types by a simple check and exception raise in
+ 	Get_Bignum.
+ 	(Set_Bignum): Arg should be 'out' and not 'in out'.
+ 	(Invalid_Big_Integer, No_Big_Real): Removed.
+ 	(Is_Valid): Now convention Intrinsic.
+ 
+ 2019-12-18  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst,
+ 	doc/gnat_rm/obsolescent_features.rst,
+ 	doc/gnat_ugn/gnat_and_program_execution.rst, exp_attr.adb,
+ 	exp_ch9.adb, init.c, libgnat/s-valrea.adb, par-ch6.adb,
+ 	sem_attr.adb, sem_ch4.adb, sem_util.ads: Fix trivial typos.
+ 	* gnat_rm.texi, gnat_ugn.texi: Regenerate.
+ 
+ 2019-12-18  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Type_Conversion): Add handling for access
+ 	types with designated operand and target types that are
+ 	referenced in places that have a limited view of an interface
+ 	type by retrieving the nonlimited view when it exists.  Add ???
+ 	comments related to missing limited_with_clause handling for
+ 	Target (in the non-access case).
+ 
+ 2019-12-18  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* par-ch12.adb (P_Formal_Derived_Type_Definition): In Ada_2020
+ 	the keyword WITH can indicate the start of aspect specifications
+ 	and not a private type extension.
+ 	* sem_ch12.adb (Analyze_Formal_Type): Indicate that it is a
+ 	first subtype.
+ 	(Instantiate_Type): New procedure
+ 	Check_Shared_Variable_Control_Aspects to verify matching rules
+ 	between formal and actual types. Note that an array type with
+ 	aspect Atomic_Components is considered compatible with an array
+ 	type whose component type is Atomic, even though the array types
+ 	do not carry the same aspect.
+ 	* sem_ch13.adb (Analyze_One_Aspect): Allow shared variable
+ 	control aspects to appear on formal types.
+ 	(Rep_Item_Too_Early): Exclude aspects on formal types.
+ 	* sem_prag.adb (Mark_Type): Handle properly pragmas that come
+ 	from aspects on formal types.
+ 	(Analyze_Pragma, case Atomic_Components): Handle formal types.
+ 
+ 2019-12-18  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* cstand.adb (Create_Standard): Remove duplicate line and
+ 	adjust.
+ 
+ 2019-12-18  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* debug.adb: Document -gnatd_K as a reserved switch for the
+ 	detection of known problem issues of previous releases.
+ 
+ 2019-12-18  Ghjuvan Lacambre  <lacambre@adacore.com>
+ 
+ 	* par-ch13.adb: Check if declarations allow aspect
+ 	specifications.
+ 
+ 2019-12-18  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* einfo.ads (Is_Ghost_Entity): Fix typo in comment.
+ 
+ 2019-12-18  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* layout.adb (Layout_Type): In the case of composite types, do
+ 	not copy the Esize onto the RM_Size if the latter is not set.
+ 	* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Record_Type>:
+ 	Also cap the alignment if an Object_Size clause has been
+ 	specified.  Pass VAR_DECL in the call to validate_size for the
+ 	Esize of a type.
+ 	(validate_size): Be prepared to give an error on an Object_Size
+ 	clause.
+ 
+ 2019-12-18  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* einfo.ads (Handling of Type'Size Value): Add references to the
+ 	introduction of Object_Size in Ada 2020.
+ 	* sem_eval.adb (Subtypes_Statically_Match): Likewise.
+ 
+ 2019-12-18  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_ch3.adb (Derive_Subprogram): Do not set the
+ 	Requires_Overriding flag in the above-mentioned case.
+ 
+ 2019-12-18  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_ch8.adb (Note_Redundant_Use): It was already checking for
+ 	a use clause in the visible part of the child. Add an additional
+ 	check for a use clause in the context clause of the child.
+ 
+ 2019-12-16  Bob Duff  <duff@adacore.com>
+ 
+ 	* errout.adb (Handle_Serious_Error): Disable the above-mentioned
+ 	warnings.
+ 
+ 2019-12-16  Bob Duff  <duff@adacore.com>
+ 
+ 	* errout.adb, errout.ads: Improve comments.
+ 
+ 2019-12-16  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_util.ads: Minor comment fix.
+ 
+ 2019-12-16  Bob Duff  <duff@adacore.com>
+ 
+ 	* errout.ads, errout.adb (Is_Size_Too_Small_Message): Check for
+ 	"size for" instead of "size for& too small, minimum allowed is
+ 	^".
+ 
+ 2019-12-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch13.adb (Analyze_Attribute_Definition_Clause): Set only
+ 	the RM_Size on the subtype built for a Component_Size clause
+ 	when the component type is a biased integer type.
+ 
+ 2019-12-16  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* socket.c: Shutdown warning.
+ 
+ 2019-12-16  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* libgnarl/s-tataat.ads (Deallocator): Mark as Favor_Top_Level.
+ 
+ 2019-12-16  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* libgnat/s-aotase.adb, libgnat/s-aotase.ads,
+ 	libgnat/s-atoope.ads, libgnat/s-atopar.adb,
+ 	libgnat/s-atopar.ads, libgnat/s-atopex.adb,
+ 	libgnat/s-atopex.ads: New files.
+ 	* libgnat/s-atopri.ads: Add new intrinsics.
+ 	* Makefile.rtl: Add new runtime files.
+ 	* impunit.adb: Add new units to Ada 2020 list.
+ 
+ 2019-12-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* freeze.adb (Check_Strict_Alignment): Remove new check on
+ 	Has_Aliased_Components for array types.
+ 
+ 2019-12-16  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch4.adb (Try_Container_Indexing): In the case of a derived
+ 	container type, use the base type to look for candidate indexing
+ 	operations, because the object may be a constrained subtype or
+ 	itype with no explicit declaration.  Candidate indexing
+ 	operations are found in the same scope and list of declarations
+ 	as the declaration of the base type.
+ 
+ 2019-12-16  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* scng.adb (Scan): In Ada2020, a left-bracket indicates the
+ 	start of an homogenous aggregate.
+ 	* par-ch4.adb (P_Reduction_Attribute_Reference): New procedure.
+ 	(P_Aggregate): Recognize Ada2020 bracket-delimited aggregates.
+ 	(P_Primary): Ditto.
+ 	* par-util.adb (Comma_Present): Return false on a right bracket
+ 	in Ada2020, indicating the end of an aggregate.
+ 	* snames.ads-tmpl: Introduce Name_Reduce and Attribute Reduce.
+ 	* sinfo.ads, sinfo.adb (Is_Homogeneous_Aggregate): New flag on
+ 	aggregates, to designate an Ada2020 array or container aggregate
+ 	that is bracket-delimited in the source.
+ 	* sem_attr.adb (Analyze_Attribute): For attribute Reduce, verify
+ 	that two arguments are present, and verify that the prefix is a
+ 	stream or an object that is iterable (array or contrainer).
+ 	(Resolve_Attribute): For attribute Reduce, resolve initial value
+ 	with the type of the context. Type-checking of element type of
+ 	prefix is performed after expansion.
+ 	* exp_attr.adb (Expand_N_Attribute_Reference): For attribute
+ 	Reduce, expand into a loop: a) If prefix is an aggregate with a
+ 	single iterated component association, use its iterator
+ 	specification to construct a loop, b) If prefix is a name, build
+ 	a loop using an element iterator loop.
+ 	* scans.ads: Add brackets tokens.
+ 
+ 2019-12-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (gnat_to_gnu_entity): Adjust calls to
+ 	validate_size.
+ 	(gnat_to_gnu_component_type): Likewise.
+ 	(gnat_to_gnu_field): Likewise and pass string for error messages.
+ 	(components_need_strict_alignment): Remove test on Is_Aliased and
+ 	add test for the independence of the component.
+ 	(validate_size): Add S1 and S2 string parameters and use them to
+ 	give better error messages for fields.  Tweak a couple of messages.
+ 	* einfo.ads (Has_Independent_Components): Document more cases.
+ 	(Is_Independent): Likewise.
+ 	(Strict_Alignment): Document new semantics.
+ 	* exp_ch9.adb (Install_Private_Data_Declarations): Also set the
+ 	Is_Independent flag along with Is_Aliased on the renaming
+ 	entity.
+ 	* freeze.adb (Size_Known): Remove always-false test and add test
+ 	for the strict-alignment on the record type.  Remove redundant
+ 	tests and add test for the strict-alignment on the component
+ 	type.
+ 	(Check_Strict_Alignment): Set the flag if the type is by-ref and
+ 	remove now redundant conditions.  Set the flag on an array type
+ 	if it has aliased components.  In the record type case, do not
+ 	set type for C_Pass_By_Copy convention.
+ 	(Freeze_Array_Type): Move code checking for conflicts between
+ 	representation aspects and clauses to before specific handling
+ 	of packed array types. Give a warnind instead of an error for a
+ 	conflict with pragma Pack.  Do not test Has_Pragma_Pack for the
+ 	specific handling of packed array types.
+ 	(Freeze_Record_Type): Move error checking of representation
+ 	clause to...
+ 	(Freeze_Entity): ...here after Check_Strict_Alignment is called.
+ 	* sem_aggr.adb (Array_Aggr_Subtype): Also set the Is_Independent
+ 	flag along with Is_Aliased on the Itype.
+ 	* sem_ch13.adb (Check_Record_Representation_Clause): Do not set
+ 	the RM size for a strict-alignment type.
+ 	* sem_ch3.adb (Add_Interface_Tag_Components): Also set the
+ 	Is_Independent flag along with Is_Aliased on the tag.
+ 	(Add_Interface_Tag_Components): Likewise on the offset.
+ 	(Analyze_Component_Declaration): Likewise on the component.
+ 	(Analyze_Object_Declaration): Likewise on the object.
+ 	(Constrain_Array): Likewise on the array.
+ 	(Record_Type_Declaration: Likewise on the tag.
+ 	(Array_Type_Declaration): Also set the
+ 	Has_Independent_Components flag along with
+ 	Has_Aliased_Components on the array.
+ 	(Copy_Array_Base_Type_Attributes): Copy
+ 	Has_Independent_Components.
+ 	(Copy_Array_Subtype_Attributes): Copy Is_Atomic, Is_Independent
+ 	and Is_Volatile_Full_Access.
+ 	(Analyze_Iterator_Specification): Set Is_Independent on the loop
+ 	variable according to Independent_Components on the array.
+ 	* sem_ch5.adb: Likewise.
+ 	* sem_ch6.adb (Process_Formals): Also set the Is_Independent
+ 	flag along with Is_Aliased on the formal.
+ 
+ 2019-12-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch8.adb (Analyze_Object_Renaming): Set Atomic, Independent
+ 	and Volatile_Full_Access aspects on the entity of the renaming
+ 	the same way as the Volatile aspect is set.
+ 	* sem_util.ads (Is_Atomic_Object_Entity): Move declaration to...
+ 	(Is_Independent_Object): New function.
+ 	(Is_Volatile_Full_Access_Object): Likewise.
+ 	* sem_util.adb (Is_Atomic_Object_Entity): ...here.
+ 	(Prefix_Has_Atomic_Components): Minor tweak.
+ 	(Is_Atomic_Object): Test Is_Atomic on the Etype uniformly.
+ 	(Is_Atomic_Or_VFA_Object): Call Is_Volatile_Full_Access_Object.
+ 	(Is_Independent_Object): New predicate.
+ 	(Is_Subcomponent_Of_Atomic_Object): Remove redundant test.
+ 	(Is_Volatile_Full_Access_Object): New predicate.
+ 	(Is_Volatile_Prefix): Rename into...
+ 	(Prefix_Has_Volatile_Components): ... and call
+ 	Is_Volatile_Object.
+ 	(Object_Has_Volatile_Components): Delete.
+ 	(Is_Volatile_Object): Simplify.
+ 	* gcc-interface/trans.c (node_is_volatile_full_access): Adjust
+ 	comment.
+ 
+ 2019-12-16  Bob Duff  <duff@adacore.com>
+ 
+ 	* par.adb: Add Scopes function to do range checking on the scope
+ 	stack.  Call Scopes all over the parser.  Add
+ 	SIS_Aspect_Import_Seen flag.
+ 	* par-ch6.adb (P_Subprogram): Initialize SIS_Aspect_Import_Seen
+ 	to False at the start, and check it at the end.
+ 	* par-ch13.adb (Get_Aspect_Specifications): Set
+ 	SIS_Aspect_Import_Seen to True when appropriate.
+ 	* par-ch10.adb, par-ch12.adb, par-ch2.adb, par-ch3.adb,
+ 	par-ch5.adb, par-ch7.adb, par-ch9.adb, par-endh.adb,
+ 	par-util.adb: Call Scopes.
+ 
+ 2019-12-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_prag.adb (Atomic_Components): Remove local variable and
+ 	fix consistency issues.  Call Component_Type on the Etype of E.
+ 	(Independent_Components): Remove local variable.
+ 	* sem_util.adb (Is_Subcomponent_Of_Atomic_Object): Properly deal
+ 	with prefixes that are access values.
+ 	* gcc-interface/trans.c (atomic_acces_t): New enumeral type.
+ 	(node_is_atomic) <N_Indexed_Component>: Test the prefix.
+ 	(node_has_volatile_full_access): Rename into...
+ 	(node_is_volatile_full_access): ...this.
+ 	(node_is_component): New predicare.
+ 	(gnat_strip_type_conversion): Delete.
+ 	(outer_atomic_access_required_p): Likewise.
+ 	(atomic_access_required_p): Rename into...
+ 	(get_atomic_access): ...this.  Implement the 3 different semantics
+ 	of Atomic and Volatile_Full_Access.
+ 	(simple_atomic_access_required_p): New predicate.
+ 	(Call_to_gnu): Remove outer_atomic_access parameter and change the
+ 	type of atomic_access parameter to atomic_acces_t.  Replace call to
+ 	atomic_access_required_p with simple_atomic_access_required_p for
+ 	the in direction and call get_atomic_access for the out direction
+ 	instead of [outer_]atomic_access_required_p.
+ 	(lhs_or_actual_p): Constify local variables.
+ 	(present_in_lhs_or_actual_p): Likewise.
+ 	(gnat_to_gnu) <N_Identifier>: Replace call to atomic_access_required_p
+ 	with simple_atomic_access_required_p.
+ 	<N_Explicit_Dereference>: Likewise.
+ 	<N_Indexed_Component>: Likewise.
+ 	<N_Selected_Component>: Likewise.
+ 	<N_Assignment_Statement>: Call get_atomic_access for the name instead
+ 	of [outer_]atomic_access_required_p.  Adjust call to Call_to_gnu.
+ 	<N_Function_Call>: Adjust call to Call_to_gnu.
+ 	(get_controlling_type): Fix typo in comment.
+ 
+ 2019-12-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* fe.h (Ada_Version_Type): New typedef.
+ 	(Ada_Version): Declare.
+ 	* opt.ads (Ada_Version_Type): Add Convention C and WARNING line.
+ 	(Ada_Version): Add WARNING line.
+ 	(Exception_Mechanism_Type): Likewise.
+ 
+ 2019-12-16  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* checks.adb, sem_util.adb: Minor reformatting and U.S. spelling
+ 	adjustment.
+ 
+ 2019-12-16  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_ch10.adb (Analyze_Subunit): Give an error if the subunit
+ 	is not a proper body. This hides the confusing "duplicate body"
+ 	message that was previously given.
+ 
+ 2019-12-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch8.adb (Expand_N_Object_Renaming_Declaration): Document
+ 	third special case of renamings requiring special handling.
+ 	(Evaluation_Required): Return true for an atomic or VFA prefix.
+ 
+ 2019-12-16  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* checks.adb (Apply_Float_Conversion_Check): Use node of type
+ 	conversion and not its parent, when inserting the declaration
+ 	for the temporary that hold the result of the conversion.
+ 	Previously the declaration was inserted above the parent of the
+ 	conversion, apparently as a small optimization for the
+ 	subsequent traversal in Insert_Actions.  Unfortunately a similar
+ 	optimization takes place in Insert_Actions, assuming that the
+ 	insertion point must be above the expression that creates the
+ 	actions to insert.  This is not correct in the presence of
+ 	conditional expressions (i.e.  since Ada2012), where the
+ 	insertion must be in the list of actions attached to the current
+ 	alternative.
+ 
+ 2019-12-16  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_attr.adb (Analyze_Attribute): Use Known_RM_Size. But we
+ 	still need Size_Known_At_Compile_Time, because when the size
+ 	really is known, sometimes only one or the other of these is
+ 	True.
+ 
+ 2019-12-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_util.adb (Is_Atomic_Or_VFA_Object): Also return true for
+ 	components whose type is Volatile_Full_Access or which are
+ 	subject to the aspect/pragma individually.
+ 	* sem_util.ads (Is_Atomic_Object_Entity): Small comment fix.
+ 
+ 2019-12-16  Yannick Moy  <moy@adacore.com>
+ 
+ 	* exp_ch6.adb: Fix comment.
+ 	* sem_res.adb (Resolve_Call): Do not check No_Recursion
+ 	restriction or indirectly No_Secondary_Stack restriction, when
+ 	inside an ignored ghost subprogram.
+ 
+ 2019-12-16  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* impunit.adb: Add a-nbnbin, a-nbnbre, a-nubinu to Ada 2020
+ 	units.
+ 	* Makefile.rtl: Enable new file.
+ 	* libgnat/a-nbnbin.adb, libgnat/a-nbnbin.ads,
+ 	libgnat/a-nbnbre.adb, libgnat/a-nbnbre.ads,
+ 	libgnat/a-nubinu.ads: New files. Provide default standalone
+ 	implementation of Ada.Numerics.Big_Numbers.Big_* based on
+ 	System.Generic_Bignum.
+ 	* libgnat/a-nbnbin__gmp.adb: Alternate implementation of
+ 	Ada.Numerics.Big_Numbers.Big_Integers based on GMP. Not enabled
+ 	for now.
+ 	* libgnat/s-bignum.ads, libgnat/s-bignum.adb: Now a simple
+ 	wrapper on top of s-genbig.ads.
+ 	* libgnat/s-genbig.ads, libgnat/s-genbig.adb: New files, making
+ 	s-bignum generic for reuse in Ada.Numerics.Big_Numbers.
+ 
+ 2019-12-16  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_ugn/building_executable_programs_with_gnat.rst:
+ 	Correct documentation of -gnatw_C switch
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-12-16  Joel Brobecker  <brobecker@adacore.com>
+ 
+ 	* doc/gnat_ugn/building_executable_programs_with_gnat.rst
+ 	(_Switches_for_gnatbind): Reword the section explaining the
+ 	impact of -minimal on debugging.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-12-16  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* libgnat/g-exptty.adb, libgnat/g-exptty.ads: Typo fixes and
+ 	minor reformatting.
+ 
+ 2019-12-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch6.adb (Requires_Atomic_Or_Volatile_Copy): New predicate.
+ 	(Expand_Actuals): Use it to decide whether to add call by copy
+ 	code as per the RM C.6(19) clause.
+ 	* fe.h (Is_Atomic_Object): Remove.
+ 	(Is_Volatile_Object): Likewise.
+ 	* sem_util.ads (Is_Atomic_Object): Remove WARNING note.
+ 	(Is_Volatile_Object): Likewise.
+ 	* gcc-interface/trans.c (atomic_or_volatile_copy_required_p): Delete.
+ 	(Call_to_gnu): Do not implement the  RM C.6(19) clause.
+ 
+ 2019-12-16  Ghjuvan Lacambre  <lacambre@adacore.com>
+ 
+ 	* sem_ch12.adb (Validate_Access_Subprogram_Instance): Add
+ 	Can_Never_Be_Null checks.
+ 
+ 2019-12-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst (VFA): Document
+ 	extension of the no-aliasing rule to any subcomponent.
+ 	* freeze.adb (Freeze_Object_Declaration): Small comment tweak.
+ 	(Freeze_Record_Type): Do not deal with delayed aspect
+ 	specifications for components here but...
+ 	(Freeze_Entity): ...here instead.
+ 	* sem_ch12.adb (Instantiate_Object): Improve wording of errors
+ 	given for legality rules in C.6(12) and implement the new rule
+ 	in C.6(13).
+ 	* sem_res.adb (Resolve_Actuals): Likewise.
+ 	* sem_prag.adb (Check_Atomic_VFA): New procedure implementing
+ 	the new legality rules in C.6(13).
+ 	(Process_Atomic_Independent_Shared_Volatile): Call
+ 	Check_Atomic_VFA to check the legality rules.  Factor out code
+ 	marking types into...
+ 	(Mark_Type): ...this new procedure.
+ 	(Check_VFA_Conflicts): Do not check the legality rules here.
+ 	(Pragma_Atomic_Components): Call Check_Atomic_VFA on component
+ 	type.
+ 	* sem_util.ads (Is_Subcomponent_Of_Atomic_Object): Declare.
+ 	* sem_util.adb (Is_Subcomponent_Of_Atomic_Object): New
+ 	predicate.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-12-13  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst: Minor
+ 	rewording of one sentence.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-12-13  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* exp_unst.adb (Unnest_Subprogram): Account for trees produced
+ 	by Annex E constructs.
+ 
+ 2019-12-13  Ghjuvan Lacambre  <lacambre@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst: Update
+ 	Initialize_Scalars documentation.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-12-13  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* sem_ch13.adb (Analyze_Aspect_Specification): Processing a
+ 	precondition, if the expression is of the form A and then B, do
+ 	not generate separate Pre/Post aspects for the separate clases
+ 	when we are processing a generic unit. Required to avoid
+ 	reporting spurious visibility errors on the instantiations.
+ 
+ 2019-12-13  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Actuals): Give canonical error for
+ 	illegal case of atomic/volatile parameter also if the formal is
+ 	aliased.
+ 
+ 2019-12-13  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_util.ads (Is_Atomic_Object): Mention relevant RM clauses.
+ 	* sem_util.adb (Is_Atomic_Object): For an indexed component,
+ 	only look at the Has_Atomic_Components aspect of the prefix and
+ 	do not recurse on it; for a selected component, do not look at
+ 	the prefix.
+ 	(Is_Atomic_Or_VFA_Object): Minor tweak.
+ 
+ 2019-12-13  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* libgnat/a-calfor.ads, libgnat/a-calfor.adb (Split_Duration):
+ 	New procedure.
+ 	(Split, Image): Use Split_Duration. Update Image spec.
+ 
+ 2019-12-13  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_unst.adb (Unnest_Subprogram): Generate an extra temporary
+ 	to facilitate the C backend processing dereferences.
+ 
+ 2019-12-13  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* sem_prag.adb (Analyze_Pragma): Propagate the
+ 	Linker_Section_Attribute to the ultimate alias of the subprogram
+ 	to facilitate the C backend processing this attribute.
+ 
+ 2019-12-13  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_util.adb (Original_Aspect_Pragma_Name): Go through
+ 	Original_Node for pragma.
+ 
+ 2019-12-13  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* exp_aggr.adb, exp_unst.adb: Minor fix typo in comment.
+ 
+ 2019-12-13  Steve Baird  <baird@adacore.com>
+ 
+ 	* sem_res.adb (Resolve, Valid_Conversion): Add Base_Type call
+ 	when testing whether a type is a general access type.
+ 
+ 2019-12-13  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_Unchecked_Type_Conversion): Generate an
+ 	extra temporary for cases unsupported by the C backend.
+ 
+ 2019-12-13  Steve Baird  <baird@adacore.com>
+ 
+ 	* einfo.ads: Correct comment for Derived_Type_Link to reflect
+ 	that fact that this function is now used for more than just
+ 	generation of warnings.
+ 	* sem_ch3.adb (Build_Derived_Type): Do not call
+ 	Set_Derived_Type_Link if the derived type and the parent type
+ 	are in different compilation units. Such a derivation cannot be
+ 	a problematic "early" derivation (identifying these is what the
+ 	Derived_Type_Link attribute is used for) and we don't like
+ 	inter-unit references that go in the opposite direction of
+ 	semantic dependencies.
+ 	* sem_ch13.adb (Is_Type_Related_Rep_Item): A new function,
+ 	analogous to the existing function Is_Operational_Item.
+ 	(Rep_Item_Too_Late): Generate a hard error (with same text as
+ 	the warning that was previously being generated) if the
+ 	AI12-0109 legality rule is violated.
+ 
+ 2019-12-13  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst: Minor tweak to
+ 	Volatile_Full_Access wording in GNAT RM.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-12-13  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* exp_attr.adb (Expand_N_Attribute_Reference,
+ 	Attribute_Address): Suppress generation of a call to
+ 	Base_Address in the case where the Address attribute is being
+ 	used to initialize a corresponding component of an activation
+ 	record.
+ 	(Is_Unnested_Component_Init): New function to determine whether
+ 	an attribute reference for Address is used to initialized a
+ 	component of an activation record object that corresponds to the
+ 	object denoted by the prefix of the attribute (an assignment
+ 	used in support of unnesting for back ends like LLVM).
+ 
+ 2019-12-13  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_res.adb (Resolve): IF an entity reference is overloaded
+ 	because its type has an Implicit_Dereference aspect, we must
+ 	examine the discriminants of the type to determine whether an
+ 	explicit dereference must be inserted for use in code
+ 	generation. Previously this was done for other expressions but
+ 	not for entity references by themselves.  This was sufficient to
+ 	handle uses of the aspect in container handling and iteration,
+ 	but not more generally.
+ 
+ 2019-12-13  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_disp.ads (Expand_Interface_Thunk): Adding one formal (the
+ 	interface type).
+ 	* exp_disp.adb (Expand_Interface_Thunk): Using the added formal
+ 	to ensure the correct profile of the thunk generated for
+ 	predefined primitives; in addition, the added formal is also
+ 	used to perform a check that ensures that the controlling type
+ 	of the thunk is the one expected by the GCC backend.
+ 	(Make_Secondary_DT, Register_Primitive): Adding the new formal
+ 	to the calls to Expand_Interface_Thunk.
+ 	* exp_ch6.adb (Register_Predefined_DT_Entry): Adding the new
+ 	formal to the call to Expand_Interface_Thunk.
+ 	* exp_intr.adb (Expand_Unc_Deallocation): When deallocating a
+ 	controlled type and the call to unchecked deallocation is
+ 	performed with a pointer to one of the convered interface types,
+ 	displace the pointer to the object to reference the base of the
+ 	object to deallocate its memory.
+ 	* gcc-interface/trans.c (maybe_make_gnu_thunk): Assert that the
+ 	controlling type of the thunk is an interface type.
+ 
+ 2019-12-13  Bob Duff  <duff@adacore.com>
+ 
+ 	* exp_attr.adb (Is_Available): Remove this function, and replace
+ 	all calls with RTE_Available. RTE_Available will return True if
+ 	"not Configurable_Run_Time_Mode". Remove the "???" comment.
+ 
+ 2019-12-13  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch7.adb (Analyze_Package_Body_Helper): Do not call
+ 	Declare_Inherited_Private_Subprograms on s child body: the
+ 	required operations have already been created when analyzing the
+ 	corresponding package declaration. This prevents a redeclaration
+ 	of inehrited operation, and a crash when inserting the new
+ 	operation in the current scope.
+ 
+ 2019-12-13  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_prag.adb (Analyze_Depends_In_Decl_Part,
+ 	Analyze_Global_In_Decl_Part,
+ 	Analyze_Refined_Depends_In_Decl_Part,
+ 	Analyze_Refined_Global_In_Decl_Part, Check_Missing_Part_Of):
+ 	Skip redundant checking involving visibility inside
+ 	instantiations.
+ 
+ 2019-12-13  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Call): Prevent inlining inside while loop
+ 	conditions.
+ 	* sem_util.adb, sem_util.ads (In_While_Loop_Condition): New
+ 	query function.
+ 
+ 2019-12-13  Bob Duff  <duff@adacore.com>
+ 
+ 	* impunit.ads: Add Ada_202X_Unit.
+ 	* impunit.adb: Add a table Non_Imp_File_Names_2X analogous to
+ 	the other tables. Add code to search this table.
+ 	* opt.ads: Add Warn_On_Ada_202X_Compatibility flag, currently
+ 	always True.
+ 	* sem_ch10.adb (Analyze_With_Clause): Give a warning if an Ada
+ 	2020 unit is with-ed when Ada_Version < Ada_2020.  Change 'if'
+ 	to 'case': Full coverage rules rule.
+ 
+ 2019-12-13  Bob Duff  <duff@adacore.com>
+ 
+ 	* rtsfind.ads: Minor comment fix.
+ 
+ 2019-12-13  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* sem_util.adb (Scope_Within): For the case of checking for a
+ 	task type procedure, check the Implementation_Base_Type of Curr.
+ 	(Scope_Within_Or_Same): For the case of checking for a task type
+ 	procedure, check the Implementation_Base_Type of Curr.
+ 
+ 2019-12-13  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* impunit.adb (Non_Imp_File_Names_12): Add
+ 	Ada.Containers.Vectors.Generic_Parallel_Sorting.
+ 
+ 2019-12-13  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Allocator): Add calls to
+ 	Check_Cond_Expr_Accessibility when a conditional expression is
+ 	found.
+ 	(Check_Allocator_Discrim_Accessibility_Exprs): Created to
+ 	recursively traverse a potentially compound conditional
+ 	expression and perform accessibility checks for each
+ 	alternative.
+ 	* sem_util.adb (Dynamic_Accessibility_Level): Avoid use of
+ 	original node of the expression in question so we can handle
+ 	dynamic accessibility in the limited case of a constant folded
+ 	conditional expression.
+ 
+ 2019-12-13  Steve Baird  <baird@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_Op_Eq.Is_Equality): Move this function
+ 	from within Expand_N_Op_Eq.Find_Equality out to immediately
+ 	within Expand_N_Op_Eq in order to give it greater visibility.
+ 	Add a new Typ parameter (defaulted to Empty) which, if
+ 	non-empty, means the function will return False in the case of
+ 	an equality op for some other type.
+ 	* (Expand_N_Op_Eq.User_Defined_Primitive_Equality_Op): A new
+ 	function. Given an untagged record type, finds the corresponding
+ 	user-defined primitive equality op (if any).  May return Empty.
+ 	Ignores visibility.
+ 	* (Expand_N_Op): For Ada2012 or later, check for presence of a
+ 	user-defined primitive equality op before falling back on the
+ 	usual predefined component-by-component comparison. If found,
+ 	then call the user-defined op instead.
+ 
+ 2019-12-13  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* sem_ch6.adb (Check_Overriding_Indicator): Modify condition to
+ 	take into account the modification of the Is_Hidden flag within
+ 	generic instances.
+ 	(Verify_Overriding_Indicator): Add an exception for controlled
+ 	primitives within an instance.
+ 
+ 2019-12-13  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sinfo.ads, sinfo.adb (Aspect_On_Partial_View,
+ 	Set_Aspect_On_Partial_View): New flag for use by SPARK, to
+ 	indicate whether an aspect that appears on a type declaration
+ 	applies to the partial view of that type.
+ 	* sem_ch13.adb (Analyze_Aspect_Specification): Set new flag
+ 	appropriately.
+ 
+ 2019-12-12  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch13.adb (Same_Reprewentation): if the actual in a call is
+ 	a generic actual type, use its bsae type to determine whether a
+ 	change of representastion may be necessary for proper parameter
+ 	passing.
+ 
+ 2019-12-12  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_type.adb (Find_Unique_Type): A call to the universal
+ 	access equality operator requires one operand to be a universal
+ 	access, and the other to be an access type. There is no
+ 	requirement, as previously implied by this routine, that
+ 	pool-specific access types were illegal in this context.
+ 
+ 2019-12-12  Steve Baird  <baird@adacore.com>
+ 
+ 	* sem_ch6.adb
+ 	(New_Overloaded_Entity.Check_Conforming_Paramters): Add new
+ 	Conformance_Type parameter. With the value of
+ 	Subtype_Conformant, the behavior of Check_Conforming_Parameters
+ 	is unchanged.  The call in Matching_Entry_Or_Subprogram to
+ 	instead passes in Type_Conformant. This corresponds to the use
+ 	of "type conformant" in Ada RM 9.4(11.4/3).
+ 	(New_Overloaded_Entity.Has_Matching_Entry_Or_Subprogram): Add
+ 	new Normalized_First_Parameter_Type function to help in ignoring
+ 	the distinction between protected and access-to-protected first
+ 	parameters when checking prefixed-view profile matching. Replace
+ 	computations of the type of the first parameter with calls to
+ 	this function as appropriate.
+ 
+ 2019-12-12  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch5.adb: (Analyze_Iterator_Specification): If the
+ 	iteration is over a slice, complete the resolution of its
+ 	bounds, which may be aebitrary expressions. The previous
+ 	pre-analysis may have created itypes for the slice but has not
+ 	performed the expansion that for example may introduce actions
+ 	that specify explicit dereferences and run-time checks.
+ 
+ 2019-12-12  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch8.adb: Improve error message for dispatching subprogram
+ 	formals.
+ 
+ 2019-12-12  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* exp_ch9.adb (Build_Protected_Entry): Set the Scope of the new
+ 	block to be the entity of the procedure created for the entry.
+ 
+ 2019-12-12  Steve Baird  <baird@adacore.com>
+ 
+ 	* sem_ch10.adb (Install_With_Clause): Check for the case of a
+ 	circular dependency involving a predefined (or GNAT-defined)
+ 	unit and handle that case by generating an appropropriate error
+ 	message.
+ 
+ 2019-12-12  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* sem_ch4.adb, sem_res.adb: Minor reformatting.
+ 
+ 2019-12-12  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* sem_ch4.adb (Analyze_One_Call): Add condition to check for
+ 	incorrectly resolved hidden controlled primitives.
+ 
+ 2019-12-12  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_res.adb: Fix processing of standard predefined operators.
+ 
+ 2019-12-12  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* libgnarl/a-dispat.ads (Yield): Update Global contract.
+ 
+ 2019-12-12  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* libgnat/g-altive.ads: Fix typo in comment.
+ 	* bindo-graphs.adb: Fix repeated words in comment.
+ 	* exp_ch4.adb: Likewise.
+ 	* exp_ch5.adb: Likewise.
+ 	* exp_ch7.adb: Likewise.
+ 	* exp_pakd.adb: Likewise.
+ 	* exp_unst.adb: Likewise.
+ 	* exp_util.adb: Likewise.
+ 	* freeze.adb: Likewise.
+ 	* inline.adb: Likewise.
+ 	* layout.adb: Likewise.
+ 	* sem_ch12.adb: Likewise.
+ 	* sem_ch13.adb: Likewise.
+ 	* sem_ch4.adb: Likewise.
+ 	* sem_ch9.adb: Likewise.
+ 	* sem_elab.adb: Likewise.
+ 	* doc/gnat_ugn/gnat_and_program_execution.rst: Fix repeated
+ 	words in user documentation.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-12-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_attr.adb (Expand_Size_Attribute): Look directly at the
+ 	prefix to detect the bit-packed slices.  Apply the checks last
+ 	in case the attribute needs to be processed by the back-end.
+ 	* exp_ch4.adb (Expand_N_Slice): Do not create a temporary for
+ 	a prefix of the Size attribute.
+ 
+ 2019-12-12  Steve Baird  <baird@adacore.com>
+ 
+ 	* sem_ch12.adb
+ 	(Instantiate_Type.Validate_Derived_Type_Instance): Implement the
+ 	legality check of AI12-0036
+ 
+ 2019-12-12  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch10.adb (Analyze_Subunit): Fix spurious visibility error
+ 	on subunit with optimization.
+ 
+ 2019-12-12  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* raise-gcc.c (__gnat_personality_v0): Define for SEH.
+ 
+ 2019-12-12  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* exp_ch9.adb (Build_Protected_Entry): Analyze the block created
+ 	to hold the declarations and statements of the protected entry
+ 	body right after it's created, and then call Reset_Scopes_To on
+ 	that block to reset the Scope of nested entities to the block
+ 	scope.
+ 	(Reset_Scope): Add handling for N_Freeze_Entity nodes, calling
+ 	Reset_Scopes recursively on the Actions of such nodes. Also, for
+ 	subprogram bodies that are encountered that might not have a
+ 	separate declaration (such as type init procedures), reset the
+ 	Scope of the subprogram's entity.
+ 
+ 2019-12-12  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* sem_attr.adb (Analyze_Attribute): Add error message for
+ 	invalid usage of Attribute_Result.
+ 
+ 2019-12-12  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_attr.adb (Eval_Attribute): Never mark T'Descriptor_Size as
+ 	static, even if T is a static subtype, because otherwise we will
+ 	request the value of the attribute, which will crash because we
+ 	have not evaluated it.
+ 
+ 2019-12-12  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_ch5.adb (Expand_N_Assognment_Statement): Extend the
+ 	processing involving private types with unknown discriminants to
+ 	handle the case where the full view of the type is an
+ 	unconstrained array type.
+ 
+ 2019-12-12  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_ch4.adb (Transform_Object_Operation): Deal properly with
+ 	prefix notation in instances.
+ 
+ 2019-12-12  Claire Dross  <dross@adacore.com>
+ 
+ 	* libgnat/a-cofove.adb, libgnat/a-cfinve.adb (Find_Index): Use
+ 	Extended_Index for call to Last.
+ 
+ 2019-12-12  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* sem_ch3.adb, sem_util.adb: Minor reformatting.
+ 
+ 2019-12-12  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_ugn/gnat_utility_programs.rst: Update gnatmetric
+ 	documentation for average lengths
+ 
+ 2019-12-12  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch3.adb (Constrain_Access): Remove obsolete comments and
+ 	warning concerning component types of an access type whose
+ 	designated type is a constrained record type. (Such constraints
+ 	were previously ignored). Set scope of itype for component to
+ 	the scope of the enclosing record.
+ 	* sem_ch4.adb: Remove call to Set_Ekind.
+ 	* sem_util.adb (Build_Actual_Subtype_Of_Component): Handle
+ 	components whose type is an access to a constrained
+ 	discriminant, where the constraints may be given by the
+ 	discriminants of the enclosing type. New subprogram
+ 	Build_Access_Record_Constraint.
+ 
+ 2019-12-12  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* exp_ch6.adb (Expand_Call_Helper): Added null case for
+ 	'Loop_Entry, 'Old, and 'Result when calculating whether to
+ 	create extra accessibility parameters.
+ 	* sem_util.adb (Dynamic_Accessibility_Level): Added null case
+ 	for 'Loop_Entry, 'Old, and 'Result when  calculating
+ 	accessibility level based on access-valued attributes.  Also
+ 	added special handling for uses of 'Loop_Entry when used in its
+ 	indexed component form.
+ 
+ 2019-12-12  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* raise-gcc.c: Remove references to VMS
+ 
+ 2019-12-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* atree.ads, comperr.ads, debug.ads, einfo.ads, elists.ads,
+ 	err_vars.ads, errout.ads, exp_ch11.ads, exp_code.ads,
+ 	exp_dbug.ads, exp_tss.ads, exp_util.ads, lib.ads, namet.ads,
+ 	nlists.ads, opt.ads, repinfo.ads, restrict.ads, scos.ads,
+ 	sem_aggr.ads, sem_aux.ads, sem_eval.ads, sem_util.ads,
+ 	sinfo.ads, sinput.ads, stringt.ads, targparm.ads, types.ads,
+ 	urealp.ads warnsw.ads: Add WARNING line(s) in commentary.
+ 	* atree.h, elists.h, namet.h, nlists.h, repinfo.h, scos.h,
+ 	stringt.h, types.h, uintp.h, urealp.h: Tidy up.
+ 	* fe.h: Likewise.  Document WARNING mark.
+ 
+ 2019-12-12  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/g-comlin.ads (Get_Argument): New routine similar to
+ 	original Get_Argument but with one more out parameter
+ 	End_Of_Arguments.
+ 	(Get_Arguments): Comment improved.
+ 	* libgnat/g-comlin.adb (Get_Argument): Implementation taken from
+ 	original Get_Argument and improved.
+ 	(Get_Argument): Calls new routine Get_Argument with additional
+ 	parameter.
+ 
+ 2019-12-03  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/utils.c (potential_alignment_gap): Delete.
+ 	(rest_of_record_type_compilation): Do not call above function.  Use
+ 	the alignment of the field instead of that of its type, if need be.
+ 	When the original field has variable size, always lower the alignment
+ 	of the pointer type.  Reset the bit-field status of the new field if
+ 	it does not encode a bit-field.
+ 
+ 2019-12-03  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/utils.c (fold_convert_size): New function.
+ 	(fold_bit_position): Invoke it to do further folding.
+ 
+ 2019-12-03  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (gnat_to_gnu_subprog_type): With the Copy-In/
+ 	Copy-Out mechanism, do not promote the mode of the return type to an
+ 	integral mode if it contains a field on a non-integral type and even
+ 	demote it for 64-bit targets.
+ 
+ 2019-11-25  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR ada/92362
+ 	* gcc-interface/trans.c (gnat_to_gnu) <N_Attribute_Definition_Clause>:
+ 	Use a temporary instead of clobbering the result with a freeze node.
+ 
+ 2019-11-25  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR ada/92575
+ 	* expect.c (__gnat_expect_poll [VMS, HPUX]): Fix typo.
+ 
+ 2019-11-06  Eric Botcazou  <ebotcazou@adacore.com>
+ 	    Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	* gcc-interface/misc.c (callgraph_info_file): Delete.
+ 
+ 2019-10-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* locales.c (iso_3166): Add missing comma after "United-States".
+ 
+ 2019-10-15  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* Makefile.rtl (a-except.o): Put -O1 earlier so that it can be
+ 	overriden if needed by other variables.
+ 
+ 2019-10-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR ada/91995
+ 	* sem_ch8.adb (Chain_Use_Clause): Remove second argument in calls
+ 	to Defining_Entity.
+ 	* sem_elab.adb (Find_Unit_Entity): Likewise.  Deal with N_Subunit
+ 	here in lieu of in Defining_Entity.
+ 	* sem_util.ads (Defining_Entity): Remove 2nd and 3th parameters.
+ 	* sem_util.adb (Defining_Entity): Remove 2nd and 3th parameters,
+ 	and adjust accordingly.  Deal with N_Compilation_Unit.
+ 
+ 2019-10-11  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (elaborate_reference_1): Specifically deal with
+ 	pointer displacement.
+ 
+ 	* gcc-interface/decl.c (components_to_record): Use proper name.
+ 
+ 	* gcc-interface/trans.c (Sloc_to_locus): Use standard types.
+ 
+ 2019-10-11  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (gnat_to_gnu_field): Adjust again the packing
+ 	for a field without strict alignment and with an oversized clause.
+ 
+ 2019-10-11  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (annotate_value) <INTEGER_CST>: Really test the
+ 	sign of the value when deciding to build a NEGATE_EXPR.
+ 	<PLUS_EXPR>: Remove redundant line.
+ 	<BIT_AND_EXPR>: Do the negation here.
+ 
+ 2019-10-11  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (Gigi_Equivalent_Type) <E_Array_Subtype>: New
+ 	case.  Return the base type if the subtype is not constrained.
+ 
+ 2019-10-11  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Named_{Integer|Real}>:
+ 	New case to deal with the definition of named numbers.
+ 	<E_Variable>: Minor tweaks.  Set DECL_IGNORED_P on the CONST_DECL
+ 	if a corresponding variable is built.
+ 	* gcc-interface/trans.c (gnat_to_gnu) <N_Integer_Literal>: Return
+ 	error_mark_node instead of aborting on overflow for named numbers.
+ 	<N_Number_Declaration>: Reuse the <N_Object_Declaration> case and
+ 	deal with error_mark_node specifically.
+ 	* gcc-interface/utils.c (create_var_decl): Do not set DECL_IGNORED_P
+ 	on CONST_DECLs.
+ 	(gnat_write_global_declarations): Output global constants.
+ 
+ 2019-10-10  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* exp_ch7.adb (Check_Unnesting_In_Decls_Or_Stmts): When
+ 	encountering a loop at the top level of a package declaration
+ 	list (that is, within the declarations of a package spec or
+ 	body) that has nested subprograms, call Unnest_Loop to create a
+ 	new library-level procedure that will contain the loop, to allow
+ 	for proper handling of up-level references from within nested
+ 	subprograms, such as to loop parameters.
+ 	(Unnest_Loop): New procedure that takes a loop statement and
+ 	creates a new procedure body to enclose the loop statement,
+ 	along with generating a call to the procedure.
+ 
+ 2019-10-10  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* freeze.adb (Freeze_Subprogram): Ensure constructor is a C++
+ 	constructor.
+ 
+ 2019-10-10  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* libgnat/a-ststio.ads (File_Type): Apply pragma
+ 	Preelaborable_Initialization to the type.
+ 
+ 2019-10-10  Yannick Moy  <moy@adacore.com>
+ 
+ 	* inline.adb (Can_Be_Inlined_In_GNATprove_Mode): Do not peek
+ 	under private types whose completion is SPARK_Mode Off.
+ 
+ 2019-10-10  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* exp_ch4.adb, sem_cat.adb, sem_ch12.adb, sem_ch3.adb,
+ 	sem_ch6.adb, sem_prag.adb, sem_util.adb, sem_util.ads: Minor
+ 	typo fixes.
+ 
+ 2019-10-10  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_warn.adb (Warn_On_Useless_Assignment): Do not warn if the
+ 	second assignment is at the same source position as the first.
+ 
+ 2019-10-10  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* sem_util.adb (Enclosing_Subprogram): Handle the case of
+ 	E_Entry_Family, returning the entry family's associated
+ 	Protected_Body_Subprogram (as was already done for E_Entry).
+ 	* exp_ch9.adb (Expand_N_Accept_Statement): Call Reset_Scopes_To
+ 	on the block created for an accept statement to reset the scopes
+ 	of any local entities to the block scope.
+ 
+ 2019-10-10  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch12.adb (Analyze_Formal_Package_Declaration): Propagate
+ 	an aspect specification for Abstract_State from generic package
+ 	to formal package, so that it is available when analyzing the
+ 	constructed formal.
+ 
+ 2019-10-10  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch6.adb (Set_Actual_Subtypes): Put the freeze node of the
+ 	actual subtype after its declaration when the type of the formal
+ 	has a predicate.
+ 
+ 2019-10-10  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch13.adb (Adjust_Record_For_Reverse_Bit_Order): Do not use
+ 	the Esize of the component to compute its layout, but only the
+ 	Component_Clause.  Do not issue a warning for the _Tag
+ 	component.  Also set the Esize of the component at the end of
+ 	the layout.
+ 	(Analyze_Record_Representation_Clause): Remove Hbit local
+ 	variable.  Lay out the Original_Record_Component only if it's
+ 	distinct from the component.
+ 	(Check_Record_Representation_Clause): Fix off-by-one bug for the
+ 	Last_Bit of the artificial clause built for the _Tag component.
+ 
+ 2019-10-10  Bob Duff  <duff@adacore.com>
+ 
+ 	* treepr.ads, treepr.adb (ppar): New procedure.
+ 
+ 2019-10-10  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_aggr.adb (Resolve_Aggregate): Add missing cases in the
+ 	Others_Allowed => True case -- N_Case_Expression_Alternative and
+ 	N_If_Expression.  Use Nkind_In.
+ 	* atree.adb, atree.ads, sinfo.adb, sinfo.ads (Nkind_In): New
+ 	16-parameter version.
+ 
+ 2019-10-10  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_aggr.adb (Resolve_Array_Aggregate): Set properly the
+ 	Predicated_Parent link of an itype created for an aggregate, so
+ 	that the predicate_function of the parent can support proofs on
+ 	the object that it initializes.
+ 
+ 2019-10-10  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch3.adb (Analyze_Number_Declaration): Set
+ 	Debug_Info_Needed in the case where the expression is an integer
+ 	literal.
+ 
+ 2019-10-10  Yannick Moy  <moy@adacore.com>
+ 
+ 	* inline.adb (Can_Be_Inlined_In_GNATprove_Mode): Add subprograms
+ 	with deep parameter or result type as not candidates for
+ 	inlining.
+ 
+ 2019-10-10  Vadim Godunko  <godunko@adacore.com>
+ 
+ 	* libgnat/g-exptty.ads (TTY_Process_Descriptor): Set default
+ 	value for Process.
+ 
+ 2019-10-10  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_prag.adb (Defer_Compile_Time_Warning_Error_To_BE): In
+ 	addition to saving the pragma for further processing, copy the
+ 	pragma into the main unit if necessary.
+ 
+ 2019-10-10  Bob Duff  <duff@adacore.com>
+ 
+ 	* einfo.ads, einfo.adb (Invariants_Ignored): New flag on types.
+ 	This leaves just one unused flag.
+ 	* sem_prag.adb (Invariant): Set the flag if appropriate.
+ 	* exp_util.adb (Make_Invariant_Call): Check the flag.
+ 
+ 2019-10-10  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* gnat1drv.adb (Gnat1drv): Skip code generation when handling an
+ 	incomplete unit with -gnatceg.
+ 
+ 2019-10-10  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* exp_ch7.adb (Check_Unnesting_Elaboration_Code): Various
+ 	cleanups.
+ 	(Set_Elab_Proc): New procedure to create the defining identifier
+ 	for a procedure created to encapsulate top-level blocks
+ 	occurring as a part of library package elaboration.
+ 	(First_Local_Scope): Function replaced by
+ 	Reset_Scopes_To_Elab_Proc.
+ 	(Reset_Scopes_To_Elab_Proc): New recursive procedure based on
+ 	First_Local_Scope, which it replaces, that is called to traverse
+ 	the statements of a library package body to locate top-level
+ 	blocks and determine whether they contain nested subprograms
+ 	that might address library-level objects of the package. Such
+ 	blocks (and loops) and certain top-level subprograms within the
+ 	statements will have their Scope reset here to match an
+ 	encapsulating procedure created by
+ 	Check_Unnesting_Elaboration_Code that will contain the
+ 	statements.
+ 	(Check_Unnesting_In_Decls_Or_Stmts): Code for handling blocks
+ 	factored out into Unnest_Block. Add handling for package
+ 	declarations and bodies, making recursive calls for
+ 	visible/private declarations, body declarations, statements, and
+ 	exception handlers. Also remove test for Is_Compilation_Unit:
+ 	caller tests for Is_Library_Level_Entity instead.  Also, this
+ 	proc's name was changed from Check_Unnesting_In_Declarations.
+ 	(Check_Unnesting_In_Handlers): New procedure to traverse a
+ 	sequence of exception handlers, calling
+ 	Check_Unnesting_In_Decls_Or_Stmts on the statements of each
+ 	handler.
+ 	(Expand_N_Package_Body): Call Check_Unnesting_* routines only
+ 	when Unnest_Subprogram_Mode is set and the current scope is a
+ 	library-level entity (which includes packages and instantiations
+ 	nested directly within a library unit).
+ 	(Expand_N_Package_Declaration): Call Check_Unnesting_* routines
+ 	only when Unnest_Subprogram_Mode is set and the current scope is
+ 	a library-level entity (which includes packages and
+ 	instantiations nested directly within a library unit).
+ 	(Unnest_Block): New procedure factored out of
+ 	Check_Unnesting_In_Decls_Or_Stmts, for creating a new procedure
+ 	to replace a block statement and resetting the Scope fields of
+ 	the block's top-level entities.
+ 
+ 2019-10-10  Anthony Leonardo Gracio  <leonardo@adacore.com>
+ 
+ 	* doc/gnat_ugn/about_this_guide.rst,
+ 	doc/gnat_ugn/building_executable_programs_with_gnat.rst,
+ 	doc/gnat_ugn/getting_started_with_gnat.rst,
+ 	doc/gnat_ugn/gnat_and_program_execution.rst, errout.ads,
+ 	exp_ch3.adb, gnatls.adb, impunit.adb, lib-writ.ads, opt.ads,
+ 	sem_ch7.adb, sem_prag.adb, sem_res.adb, sem_warn.adb,
+ 	terminals.c: Replace GPS by GNAT Studio.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-10-10  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_ch6.adb (Expand_Simple_Function_Return_Statement): If the
+ 	function to which the return statement applies is an
+ 	Ignored_Ghost_Function, do not indicate that it uses the
+ 	secondary stack when the return type is unconstrained.
+ 
+ 2019-10-10  Bob Duff  <duff@adacore.com>
+ 
+ 	* libgnat/a-cbdlli.adb, libgnat/a-cbhama.adb,
+ 	libgnat/a-cbhase.adb, libgnat/a-cbmutr.adb,
+ 	libgnat/a-cborma.adb, libgnat/a-cborse.adb,
+ 	libgnat/a-cdlili.adb, libgnat/a-cidlli.adb,
+ 	libgnat/a-cihama.adb, libgnat/a-cihase.adb,
+ 	libgnat/a-cimutr.adb, libgnat/a-ciorma.adb,
+ 	libgnat/a-ciorse.adb, libgnat/a-cobove.adb,
+ 	libgnat/a-cohama.adb, libgnat/a-cohase.adb,
+ 	libgnat/a-coinve.adb, libgnat/a-comutr.adb,
+ 	libgnat/a-conhel.adb, libgnat/a-convec.adb,
+ 	libgnat/a-coorma.adb, libgnat/a-coorse.adb (Reference,
+ 	Constant_Reference): Use Busy instead of Lock, so we forbid
+ 	tampering with cursors, rather than tampering with elements.
+ 
+ 2019-10-10  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_cat.adb (Set_Categorization_From_Pragma): Do not modify
+ 	any visibility settings if there are no compilation_unit pragmas
+ 	following the package declaration. Add comments for future
+ 	cleanup.
+ 
+ 2019-10-10  Patrick Bernardi  <bernardi@adacore.com>
+ 
+ 	* bindgen.adb (System_Secondary_Stack_Package_In_Closure):
+ 	Renamed flag System_Secondary_Stack_Used to be clearer of what
+ 	it represents.
+ 	(Gen_Adainit): Refactor secondary stack related code to make it
+ 	clearer.
+ 	* rtsfind.adb (Load_RTU): Don't set Sec_Stack_Used flag here
+ 	(RTE): Set Sec_Stack_Used if the System.Secondary_Stack is
+ 	referenced, but not if we're ignoring ghost code.
+ 
+ 2019-10-10  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* sem_prag.adb (Analyze_Global_In_Decl_Part): Simplify previous
+ 	test, just like in a recent commit we simplified a similar test
+ 	for Depends contract.
+ 
+ 2019-10-04  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* gcc-interface/utils.c (flag_isoc2x): New variable.
+ 
+ 2019-10-01  Maciej W. Rozycki  <macro@wdc.com>
+ 
+ 	* gcc-interface/Makefile.in (ADA_RTL_DSO_DIR): New variable.
+ 	(install-gnatlib): Use it in place of ADA_RTL_OBJ_DIR for shared 
+ 	library installation.
+ 
+ 2019-10-01  Maciej W. Rozycki  <macro@wdc.com>
+ 
+ 	* gcc-interface/Make-lang.in (ada.install-common): Split into...
+ 	(gnat-install-tools, gnat-install-lib): ... these.
+ 
+ 2019-09-26  Alexandre Oliva <oliva@adacore.com>
+ 
+ 	* gcc-interface/decl.c (components_to_record): Set
+ 	DECL_SIZE_UNIT for zero-sized fields.
+ 
+ 2019-09-26  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* osint.adb (OS_Time_To_GNAT_Time): Remove dependency on To_C/To_Ada
+ 
+ 2019-09-23  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* libgnarl/s-osinte__solaris.ads (sysconf): Declare.
+ 	(SC_NPROCESSORS_ONLN): Define.
+ 	* libgnarl/s-tasinf__solaris.ads (Number_Of_Processors): Declare.
+ 	* libgnarl/s-tasinf__solaris.adb (N_CPU): New variable.
+ 	(Number_Of_Processors): New function.
+ 
+ 2019-09-23  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (Regular_Loop_to_gnu): Do not rotate the loop
+ 	if -Og is enabled.
+ 	(build_return_expr): Do not perform NRV if -Og is enabled.
+ 	(Subprogram_Body_to_gnu): Likewise.
+ 	(gnat_to_gnu) <N_Simple_Return_Statement>: Likewise.
+ 	(Handled_Sequence_Of_Statements_to_gnu): Do not inline finalizers if
+ 	-Og is enabled.
+ 	* gcc-interface/utils.c (convert_to_index_type): Return early if -Og
+ 	is enabled.
+ 
+ 2019-09-23  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (gnat_compile_time_expr_list): New variable.
+ 	(Pragma_to_gnu): Rename local variable.  Save the (first) expression
+ 	of pragma Compile_Time_{Error|Warning} for later processing.
+ 	(Compilation_Unit_to_gnu): Process the expressions saved above.
+ 
+ 2019-09-23  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (Attribute_to_gnu): Test Can_Use_Internal_Rep
+ 	on the underlying type of the node.
+ 	(Call_to_gnu): Likewise with the type of the prefix.
+ 
+ 2019-09-23  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (components_to_record): Do not reorder fields
+ 	in packed record types if they contain fixed-size fields that cannot
+ 	be laid out in a packed manner.
+ 
+ 2019-09-19  Tom Tromey  <tromey@adacore.com>
+ 
+ 	* gcc-interface/misc.c (gnat_get_type_bias): Return the bias
+ 	when -fgnat-encodings=gdb.
+ 
+ 2019-09-19  Steve Baird  <baird@adacore.com>
+ 
+ 	* sem_prag.adb (Preferred_String_Type): A new function. Given an
+ 	expression, determines whether the preference rules defined for
+ 	the third-and-later arguments of pragma Annotate suffice to
+ 	determine the type of the expression. If so, then the preferred
+ 	type is returned; if not then Empty is returned. Handles
+ 	concatenations.
+ 	(Analyze_Pragma): Replace previous code, which dealt only with
+ 	string literals, with calls to the new Preferred_String_Type
+ 	function, which also handles concatenations.
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst: Update
+ 	documentation for pragma Annotate.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-09-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_util.adb (Is_Possibly_Unaligned_Slice): Do not return true
+ 	on pure alignment considerations if the target does not require
+ 	the strict alignment of memory accesses.
+ 
+ 2019-09-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch12.adb (Check_Private_View): Add a comment to indicate
+ 	future work.
+ 
+ 2019-09-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_aggr.adb (Has_Mutable_Components): Look at the underlying
+ 	type of components to find out whether they are mutable.
+ 
+ 2019-09-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch12.adb (Instantiate_Package_Body): Check that the body
+ 	has not already been instantiated when the body of the parent
+ 	was being loaded.
+ 
+ 2019-09-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_util.adb (In_Instance): Test whether the current unit has
+ 	been analyzed instead of being on the scope stack to detect the
+ 	case of actuals of an instantiation of a generic child unit done
+ 	as a compilation unit.
+ 
+ 2019-09-19  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/g-socket.ads, libgnat/g-socket.adb
+ 	(Create_Socket_Pair): New routine.
+ 	* libgnat/g-socthi.ads (OS_Has_Socketpair): Boolean constant.
+ 	(C_Socketpair): New imported routine.
+ 	* libgnat/g-socthi__mingw.ads, libgnat/g-socthi__vxworks.ads
+ 	(Default_Socket_Pair_Family): New constant.
+ 	(C_Socketpair): New routine.
+ 	* libgnat/g-socthi__mingw.adb, libgnat/g-socthi__vxworks.adb
+ 	(C_Socketpair): Is separated in anouther file.
+ 	* libgnat/g-sthcso.adb (C_Socketpair): Non UNIX implementation.
+ 	* libgnat/g-stsifd__sockets.adb: Reuse C_Socketpair.
+ 
+ 2019-09-19  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_prag.adb (Analyze_Depends_In_Decl_Part): Simplify previous
+ 	test.
+ 
+ 2019-09-19  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch7.adb (Install_Parent_Private_Declarations): If a
+ 	generic child unit is instantiated within a sibling child unit,
+ 	the analysis of its private part requires that the private part
+ 	of the ancestor be available, as is done when the context
+ 	includes an instance of the ancestor.
+ 
+ 2019-09-19  Yannick Moy  <moy@adacore.com>
+ 
+ 	* inline.adb (Can_Be_Inlined_In_GNATprove_Mode): Add special
+ 	case for traversal functions.
+ 
+ 2019-09-19  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_prag.adb (Analyze_Global_In_Decl_Part): Do not issue an
+ 	error when a constant of an access type is used as output in a
+ 	Global contract.
+ 	(Analyze_Depends_In_Decl_Part): Do not issue an error when a
+ 	constant of an access type is used as output in a Depends
+ 	contract.
+ 
+ 2019-09-19  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* exp_attr.adb: Remove obsolete comment.
+ 
+ 2019-09-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch3.adb (Build_Derived_Access_Type): If this is an access-
+ 	to-subprogram type, copy Can_Use_Internal_Rep from the parent.
+ 
+ 2019-09-19  Yannick Moy  <moy@adacore.com>
+ 
+ 	* gcc-interface/Make-lang.in: Remove references to sem_spark.
+ 	* sem_spark.adb, sem_spark.ads: Remove unit.
+ 
+ 2019-09-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_attr.adb (Is_Inline_Floating_Point_Attribute): Treat
+ 	Machine_Rounding as an alias for Rounding.
+ 	* sem_res.adb (Simplify_Type_Conversion): Likewise.
+ 
+ 2019-09-19  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* exp_unst.adb (Unnest_Subprogram): Bypass the transformation of
+ 	up-level references unless Opt.Generate_C_Code is enabled.
+ 
+ 2019-09-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_Array_Equality): If optimization is
+ 	enabled, generate a simple conjunction of comparisons for the
+ 	specific case of constrained 1-dimensional 2-element arrays.
+ 	Fix formatting.
+ 
+ 2019-09-19  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* exp_dbug.ads, exp_dbug.adb (Get_Homonym_Number): Remove.
+ 	(Append_Homonym_Number): Use Homonym_Number instead of
+ 	Get_Homonym_Number.
+ 	* exp_util.ads, exp_util.adb (Homonym_Number): Mirror style of
+ 	the removed Get_Homonym_Number routine, i.e. initialize local
+ 	objects at declaration and refine the type of result.
+ 	* sem_util.adb (Add_Homonym_Suffix): Use Homonym_Number instead
+ 	of Get_Homonym_Number.
+ 
+ 2019-09-19  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch13.adb (Check_Aspect_At_End_Of_Declarations): Simplify
+ 	handling of expressions in predicates when the context is a
+ 	generic unit.
+ 
+ 2019-09-19  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_attr.adb (Resolve_Attribute): Make sure the secondary
+ 	stack is properly managed in the case of a 'Range attribute in a
+ 	loop.
+ 
+ 2019-09-19  Raphael Amiard  <amiard@adacore.com>
+ 
+ 	* libgnat/a-cfhase.ads (Set): Add comments to public primitives.
+ 
+ 2019-09-19  Raphael Amiard  <amiard@adacore.com>
+ 
+ 	* libgnat/a-cbhama.ads, libgnat/a-cbhase.ads,
+ 	libgnat/a-chtgop.ads (Clear): Refine comments
+ 
+ 2019-09-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch12.adb (Restore_Private_Views): Comment out new code
+ 	that clear the Is_Generic_Actual_Type also on the full view.
+ 
+ 2019-09-19  Bob Duff  <duff@adacore.com>
+ 
+ 	* exp_ch3.adb (Rewrite_As_Renaming): Return False if there are
+ 	any aspect specifications, because otherwise Insert_Actions
+ 	blows up.
+ 
+ 2019-09-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch6.adb (Add_Simple_Call_By_Copy_Code): Add
+ 	Bit_Packed_Array parameter and documet it. Always insert a copy
+ 	if it is set True.
+ 	(Expand_Actuals): Adjust the calls to
+ 	Add_Simple_Call_By_Copy_Code.
+ 
+ 2019-09-19  Bob Duff  <duff@adacore.com>
+ 
+ 	* xref_lib.adb (Get_Symbol_Name): If we reach EOF in the first
+ 	loop without finding the symbol, return "???". Otherwise, it's
+ 	an infinite loop.
+ 	(Parse_EOL): Assert that we're not already at EOF.  Remove
+ 	processing of LF/CR -- there are no operating systems that use
+ 	that.
+ 
+ 2019-09-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch6.adb (Is_Legal_Copy): Also return false for an aliased
+ 	formal and a formal passed by reference in convention Ada.  Add
+ 	missing guard to the existing test on Is_Valued_Procedure.
+ 
+ 2019-09-19  Bob Duff  <duff@adacore.com>
+ 
+ 	* rtsfind.ads (RTE_Available): Improve comment.
+ 
+ 2019-09-18  Bob Duff  <duff@adacore.com>
+ 
+ 	* exp_ch5.adb (Expand_Assign_Array_Loop_Or_Bitfield): Move call
+ 	to RTE_Available later, so it doesn't disturb the elab order.
+ 	The RE_Copy_Bitfield entity is defined in package
+ 	System.Bitfields which has a dependency on package
+ 	System.Bitfield_Utils, which has it its spec:
+ 	   pragma Elaborate_Body;
+ 	The query on RTE_Available forces loading and analyzing
+ 	System.Bitfields and all its withed units.
+ 
+ 2019-09-18  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* checks.ads (Alignment_Warnings_Record): Add P component.
+ 	* checks.adb (Apply_Address_Clause_Check): Be prepared to kill
+ 	the warning also if the clause is of the form X'Address.
+ 	(Validate_Alignment_Check_Warning): Kill the warning if the
+ 	clause is of the form X'Address and the alignment of X is
+ 	compatible.
+ 
+ 2019-09-18  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_res.adb (Set_Mixed_Node_Expression): If a conditional
+ 	expression has universal_real alternaitves and the context is
+ 	Universal_Fixed, as when it is an operand in a fixed-point
+ 	multiplication or division, resolve the expression with a
+ 	visible fixed-point type, which must be unique.
+ 
+ 2019-09-18  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch3.adb (Constrain_Component_Type): For a discriminated
+ 	type, handle the case of a constraint given by a conversion of a
+ 	discriminant of the enclosing type. Necessary when compiling a
+ 	discriminated task for a restricted run-time, when the generated
+ 	Secondary_Stack component may be set by means of an aspect on
+ 	the task type.
+ 
+ 2019-09-18  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_aggr.adb (Expand_Record_Aggregate, Rewrite_Discriminant):
+ 	After rewriting a reference to an outer discriminant as a
+ 	selected component of the enclosing object, analyze the selected
+ 	component to ensure that the entity of the selector name is
+ 	properly set. This is necessary when the aggregate appears
+ 	within an expression that may have been analyzed already.
+ 
+ 2019-09-18  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* sem_ch8.adb (Use_One_Type): Add guard to prevent warning on a
+ 	reundant use package clause where there is no previous
+ 	use_clause in the chain.
+ 
+ 2019-09-18  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_Type_Conversion): Add calculation of an
+ 	alternative operand for the purposes of generating accessibility
+ 	checks.
+ 
+ 2019-09-18  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_aggr.adb (Build_Array_Aggr_Code): In STEP 1 (c), duplicate
+ 	the expression and reset the Loop_Actions for each loop
+ 	generated for an others choice.
+ 
+ 2019-09-18  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* einfo.adb, einfo.ads (Minimum_Accessibility): Added new field.
+ 	(Set_Minimum_Accessibility): Added to set new field.
+ 	(Minimum_Accessibility): Added to fetch new field.
+ 	* exp_ch6.adb (Expand_Subprogram_Call): Modify calls to fetch
+ 	accessibility levels to the new subprogram Get_Accessibility
+ 	which handles cases where minimum accessibility might be needed.
+ 	* sem_ch6.adb (Analyze_Subprogram_Body_Helper): Add section to
+ 	generate a Minimum_Accessibility object within relevant
+ 	subprograms.
+ 	* sem_util.adb, sem_util.ads (Dynamic_Accessibility_Level):
+ 	Additional documentation added and modify section to use new
+ 	function Get_Accessibility.
+ 	(Get_Accessibility): Added to centralize processing of
+ 	accessibility levels.
+ 
+ 2019-09-18  Steve Baird  <baird@adacore.com>
+ 
+ 	* sem_util.ads (Interval_Lists): A new visible package. This
+ 	package is visible because it is also intended for eventual use
+ 	in Sem_Eval.Subtypes_Statically_Compatible when that function is
+ 	someday upgraded to handle static predicates correctly.  This
+ 	new package doesn't really need to be visible for now, but it
+ 	still seems like a good idea.
+ 	* sem_util.adb (Gather_Components): Implement AI12-0086 via the
+ 	following strategy. The existing code knows how to take a static
+ 	discriminant value and identify the corresponding variant; in
+ 	the newly-permitted case of a non-static value of a static
+ 	subtype, we arbitrarily select a value of the subtype and find
+ 	the corresponding variant using the existing code. Subsequently,
+ 	we check that every other value of the discriminant's subtype
+ 	corresponds to the same variant; this is done using the newly
+ 	introduced Interval_Lists package.
+ 	(Interval_Lists): Provide a body for the new package.
+ 
+ 2019-09-18  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_Op_Eq): The frontend assumes that we can
+ 	do a bit-for-bit comparison of two access to protected
+ 	subprogram pointers. However, there are two reasons why we may
+ 	not be able to do that: (1) there may be padding bits for
+ 	alignment before the access to subprogram, and (2) the access to
+ 	subprogram itself may not be compared bit-for- bit because the
+ 	activation record part is undefined: two pointers are equal iff
+ 	the subprogram addresses are equal. This patch fixes it by
+ 	forcing a field-by-field comparison.
+ 	* bindgen.adb (Gen_Adainit): The type No_Param_Proc is defined
+ 	in the library as having Favor_Top_Level, but when we create an
+ 	object of that type in the binder file we don't have that
+ 	pragma, so the types are different. This patch fixes this issue.
+ 	* libgnarl/s-interr.adb, libgnarl/s-interr__hwint.adb,
+ 	libgnarl/s-interr__sigaction.adb, libgnarl/s-interr__vxworks.adb
+ 	(Is_Registered): This routine erroneously assumes that the
+ 	access to protected subprogram is two addresses. We need to
+ 	create the same record that the compiler makes to ensure that
+ 	any padding is the same. Then we have to look at just the first
+ 	word of the access to subprogram. This patch fixes this issue.
+ 
+ 2019-09-18  Bob Duff  <duff@adacore.com>
+ 
+ 	* exp_ch5.adb (Expand_Assign_Array_Loop_Or_Bitfield): The call
+ 	to Copy_Bitfield is now enabled.
+ 	(Expand_Assign_Array_Bitfield): Multiply 'Length times
+ 	'Component_Size "by hand" instead of using 'Size.
+ 
+ 2019-09-18  Vasiliy Fofanov  <fofanov@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst: Fix minor
+ 	formatting issue.
+ 
+ 2019-09-18  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_disp.adb (Make_DT, Make_Secondary_DT): Remove generation
+ 	of alignment representation clause for the following tables:
+ 	Predef_Prims, Iface_DT, TSD, ITable, DT.
+ 
+ 2019-09-18  Steve Baird  <baird@adacore.com>
+ 
+ 	* sem_eval.adb (Expr_Value): Do not fail "the type of a null
+ 	literal must be an access type" assertion if errors have already
+ 	been posted on the given node.
+ 
+ 2019-09-18  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* exp_dbug.ads, exp_dbug.adb (Get_Homonym_Number): Refine type
+ 	from Nat to Pos.
+ 	* sem_util.adb (Add_Homonym_Suffix): Refine type of a local
+ 	variable.
+ 
+ 2019-09-18  Yannick Moy  <moy@adacore.com>
+ 
+ 	* exp_dbug.adb (Append_Homonym_Number): Use new function
+ 	Get_Homonym_Number.
+ 	(Get_Homonym_Number): New function to return the homonym number.
+ 	(Qualify_Entity_Name): Remove special case for GNATprove.
+ 	* exp_dbug.ads (Get_Homonym_Number): Make the new function
+ 	public for use in GNATprove.
+ 	* frontend.adb (Frontend): Do not qualify names in GNATprove
+ 	mode.
+ 	* sem_util.adb (Unique_Name): Append homonym suffix where needed
+ 	for entities which have local homonyms in the same scope.
+ 
+ 2019-09-18  Nicolas Roche  <roche@adacore.com>
+ 
+ 	* libgnat/s-valrea.adb (Scan_Integral_Digits): New procedure.
+ 	(Scan_Decimal_Digits): New procedure.
+ 	(As_Digit): New function.
+ 	(Scan_Real): Use Scan_Integral_Digits and Scan_Decimal_Digits.
+ 
+ 2019-09-18  Claire Dross  <dross@adacore.com>
+ 
+ 	* exp_attr.adb (Expand_N_Attribute_Reference): Call routine from
+ 	Exp_Util to know the value of the Constrained attribute in the
+ 	static case.
+ 	* exp_spark.adb (Expand_SPARK_N_Attribute_Reference): Make
+ 	implicit dereferences inside the Constrained attribute explicit.
+ 	* exp_util.ads, exp_util.adb
+ 	(Attribute_Constrained_Static_Value): New routine to compute the
+ 	value of a statically known reference to the Constrained
+ 	attribute.
+ 
+ 2019-09-18  Vadim Godunko  <godunko@adacore.com>
+ 
+ 	* libgnat/g-expect.adb (Expect_Internal): Don't include invalid
+ 	file descriptors into the set of file descriptors for Poll.
+ 	Raise Process_Died exception when computed set of file
+ 	descriptors to monitor is empty.
+ 
+ 2019-09-18  Frederic Konrad  <konrad@adacore.com>
+ 
+ 	* adaint.c: Include dosFsLib.h and vwModNum.h for VxWorks 6.
+ 	(__gnat_rename): Map S_dosFsLib_FILE_NOT_FOUND to ENOENT.
+ 
+ 2019-09-18  Steve Baird  <baird@adacore.com>
+ 
+ 	* freeze.adb (Freeze_Object_Declaration): Do not call
+ 	Check_Large_Modular_Array when the object declaration being
+ 	frozen is an ignored ghost entity.
+ 
+ 2019-09-18  Tom Tromey  <tromey@adacore.com>
+ 
+ 	* make.adb (Initialize): Fix typo.
+ 
+ 2019-09-18  Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* libgnat/s-win32.ads (DWORD_PTR): New type, pointer size
+ 	unsigned int.
+ 	(SYSTEM_INFO): Use it for dwActiveProcessorMask.
+ 
+ 2019-09-18  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst: Improve doc on
+ 	Warning_As_Error.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-09-18  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_characteristics.rst,
+ 	doc/gnat_rm/implementation_defined_pragmas.rst,
+ 	doc/gnat_rm/implementation_of_specific_ada_features.rst: Remove
+ 	remaining references to VMS support
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-09-18  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* libgnat/s-stausa.adb: Fix a typo
+ 
+ 2019-09-18  Bob Duff  <duff@adacore.com>
+ 
+ 	* libgnat/a-cbhama.adb, libgnat/a-cbhase.adb,
+ 	libgnat/a-cbmutr.adb, libgnat/a-cborma.adb,
+ 	libgnat/a-cborse.adb, libgnat/a-cobove.adb (Copy): Avoid reading
+ 	the uninitialized variable C in the Checks = False case. Change
+ 	variable to be a constant.
+ 
+ 2019-09-18  Claire Dross  <dross@adacore.com>
+ 
+ 	* libgnat/a-cofuma.adb (Remove, Elements_Equal_Except,
+ 	Keys_Included, Keys_Included_Except): Rename loop indexes and
+ 	global constants from I to J.
+ 
+ 2019-09-18  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* exp_unst.adb (Unnest_Subprograms): Refine previous change.
+ 
+ 2019-09-17  Claire Dross  <dross@adacore.com>
+ 
+ 	* libgnat/a-cofuma.ads, libgnat/a-cofuma.adb (Remove): New
+ 	function which returns a copy of the input container without a
+ 	given mapping.
+ 
+ 2019-09-17  Yannick Moy  <moy@adacore.com>
+ 
+ 	* libgnat/s-arit64.adb (Double_Divide): Correctly handle the
+ 	special case when rounding.
+ 
+ 2019-09-17  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* sem_ch3.adb (Complete_Private_Subtype): Propagate attributes
+ 	Has_Attributes and Predicate_Function to the cloned subtype.
+ 
+ 2019-09-17  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem.adb (Do_Analyze): Save Style_Check_Max_Line_Length on
+ 	entry and restore it on exit instead of recomputing it.
+ 
+ 2019-09-17  Tom Tromey  <tromey@adacore.com>
+ 
+ 	* exp_dbug.ads: Update character type comment.
+ 
+ 2019-09-17  Yannick Moy  <moy@adacore.com>
+ 
+ 	* libgnat/s-arit64.adb (Double_Divide): Simplify needlessly
+ 	complex computation. Fix comments.
+ 	(Scaled_Divide): Fix comments. Explain why implementation does
+ 	not suffer from bugs in Algorithm D from 2nd Edition of TAOCP.
+ 
+ 2019-09-17  Yannick Moy  <moy@adacore.com>
+ 
+ 	* libgnat/s-arit64.adb (Scaled_Divide): Add protection against
+ 	undesirable wrap-around.
+ 
+ 2019-09-17  Yannick Moy  <moy@adacore.com>
+ 
+ 	* libgnat/s-arit64.adb (Double_Divide): Fix two possible
+ 	overflows.
+ 
+ 2019-09-17  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* make_util.ads (On_Windows): Move...
+ 	* osint.ads (On_Windows): There.
+ 	* osint.adb (OS_Time_To_GNAT_Time): If odd incremented on
+ 	Windows before conversion to Time_Stamp_Type.
+ 
+ 2019-09-17  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb (Check_Declaration): Do not check the assignment
+ 	from an illegal declaration.
+ 
+ 2019-09-17  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_ugn/gnat_and_program_execution.rst: Clarify
+ 	documentation.
+ 	* gnat_ugn.texi: Regenerate.
+ 	* libgnat/s-stausa.ads: Clarify comments.
+ 
+ 2019-09-17  Steve Baird  <baird@adacore.com>
+ 
+ 	* sem_util.adb (Wrong_Type): In deciding to suppress a message,
+ 	it is not enough for In_Instance to be True; in addition,
+ 	In_Generic_Actual (Expr) must be False.
+ 	* sem_type.adb (In_Generic_Actual): Fix bug where traversal of
+ 	parents skips every other node.
+ 
+ 2019-09-17  Claire Dross  <dross@adacore.com>
+ 
+ 	* sem_spark.adb (Get_Observed_Or_Borrowed_Expr): If the
+ 	definition of a local borrower contains calls to traversal
+ 	functions, the borrowed expression is the first parameter of the
+ 	first traversal function call in the definition.
+ 
+ 2019-09-17  Ed Falis  <falis@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst: Remove
+ 	section.
+ 	* gnat_rm.texi, gnat_ugn.texi: Regenerate.
+ 
+ 2019-09-17  Vadim Godunko  <godunko@adacore.com>
+ 
+ 	* libgnat/g-exptty.ads (Close_Input): New subprogram.
+ 	* libgnat/g-exptty.adb (Close_Input): New subprogram.
+ 	(Close): Move close of TTY to Close_Input.
+ 	* terminals.c (__gnat_close_tty): Set file descriptors to
+ 	invalid value after close.
+ 
+ 2019-09-17  Vadim Godunko  <godunko@adacore.com>
+ 
+ 	* libgnat/g-expect.adb (Expect_Internal): Try to call 'poll' few
+ 	times.
+ 
+ 2019-09-17  Vadim Godunko  <godunko@adacore.com>
+ 
+ 	* libgnat/g-expect.ads, libgnat/g-expect.adb (Close_Input): New
+ 	subprogram.
+ 	(Get_Command_Output): Call Close_Input to close input stream.
+ 	(Expect_Internal): Likewise.
+ 	(Close): Likewise.
+ 	* libgnat/g-exptty.adb (Close): Likewise.
+ 
+ 2019-09-17  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* sem_util.ads, sem_util.adb (Is_Attribute_Old): New utility
+ 	routine.
+ 
+ 2019-09-17  Yannick Moy  <moy@adacore.com>
+ 
+ 	* inline.adb (Can_Be_Inlined_In_GNATprove_Mode): Add handling
+ 	for dispatching operations.
+ 
+ 2019-09-17  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch13.adb (Check_Aspect_At_End_Of_Declarations): In a
+ 	generic context, for a Predicate aspect, use
+ 	Preanalyze_Spec_Expression to verify conformance.
+ 
+ 2019-09-17  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* sem_ch3.adb (Constrain_Corresponding_Record): Propagate
+ 	attribute Is_Tagged_Type.
+ 
+ 2019-09-17  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_ch3.adb (Build_Record_Init_Proc): Do not generate code to
+ 	adjust the tag component when the record is initialized with a
+ 	raise expression.
+ 	* sem_aggr.adb (Valid_Limited_Ancestor): Return True for
+ 	N_Raise_Expression nodes.
+ 	(Valid_Ancestor_Type): Return True for raise expressions.
+ 	* sem_ch3.adb (Analyze_Component_Declaration): Do not report an
+ 	error when a component is initialized with a raise expression.
+ 	* sem_ch4.adb (Analyze_Qualified_Expression): Do not report an
+ 	error when the aggregate has a raise expression.
+ 
+ 2019-09-17  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* ali.ads: Fix casing in comment.
+ 	* ali-util.ads, ali-util.adb (Read_Withed_ALIs): Remove
+ 	Ignore_Errors parameter; it was only set to non-default value of
+ 	True when running in GNATprove_Mode and wrongly reset to False
+ 	when calling this routine recursively. Now in GNATprove mode we
+ 	want it to be always True, so in fact it is equivalent to
+ 	GNATProve_Mode flag itself (which was already used in this
+ 	routine).
+ 
+ 2019-09-17  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* adaint.c (_REENTRANT, _THREAD_SAFE): Only define if needed.
+ 
+ 2019-09-17  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* libgnat/s-bitfie.ads (Val_Bits, Val_Bytes): Define from
+ 	Long_Long_Integer'Size.
+ 
+ 2019-09-17  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_ch6.ads (Needs_BIP_Task_Actuals): New subprogram.
+ 	* exp_ch6.adb (Add_Task_Actuals_To_Build_In_Place_Call): Code
+ 	cleanup.
+ 	(Check_Number_Of_Actuals): New subprogram.
+ 	(Make_Build_In_Place_Call_In_Allocator): Adding assertion.
+ 	(Make_Build_In_Place_Call_In_Anonymous_Context): Adding
+ 	assertion.
+ 	(Make_Build_In_Place_Call_In_Assignment): Adding assertion.
+ 	(Make_Build_In_Place_Call_In_Object_Declaration): Code cleanup
+ 	plus assertion addition.
+ 	(Needs_BIP_Task_Actuals): New subprogram.
+ 	* sem_ch6.adb (Create_Extra_Formals): Rely on
+ 	Needs_BIP_Task_Actuals() to check if the master of the tasks to
+ 	be created, and the caller's activation chain formals are
+ 	needed.
+ 
+ 2019-09-17  Bob Duff  <duff@adacore.com>
+ 
+ 	* libgnat/s-bituti.adb (Get_Val_2, Set_Val_2): Use new routines
+ 	for getting and setting a Val_2, avoiding touching the second
+ 	half when that half might not exist.
+ 	* exp_ch5.adb (Expand_Assign_Array_Loop_Or_Bitfield): Correct
+ 	tests for potential volatile or independent components. In
+ 	particular, do not call Prefix unless we know it's a slice.
+ 
+ 2019-09-17  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* gsocket.h: Include sys/un.h.
+ 	* s-oscons-tmplt.c (AF_UNIX): New constant generation.
+ 	(SIZEOF_sockaddr_un): Idem.
+ 	* libgnat/g-socket.ads (Family_Type): New value Family_Unix
+ 	added.
+ 	(Family_Inet_4_6): New subtype only for network families.
+ 	(Sock_Addr_Type): Add Unbounded_String field for Family_Unix
+ 	variant.
+ 	(Unix_Socket_Address): Create Sock_Addr_Type from socket
+ 	pathname.
+ 	(Network_Socket_Address): Create Sock_Addr_Type from
+ 	Inet_Addr_Type and Port_Type parameters.
+ 	* libgnat/g-socket.adb: Support local unix address in socket
+ 	routines.
+ 	(Get_Address_Info): Disable warning about Result may be
+ 	referenced before it has a value. Remove duplicated code to exit
+ 	from Look_For_Supported.
+ 	* libgnat/g-sothco.ads (Unix_Name_Length): New constant defining
+ 	maximum number of characters in local socket address path.
+ 	(Sockaddr): Add variant for Family_Unix address family. Move
+ 	Sin_Port and Sin_Family to Family_Inet section. Add Sin6_Port
+ 	and Sin6_Family to Family_Inet6 section.
+ 	(Set_Address): Add out parameter Length to return valuable
+ 	Sockaddr data length.
+ 	(Get_Address): Add input parameter Length to set valuable
+ 	Sockaddr data length.
+ 	* libgnat/g-sothco.adb: Support local unix address in socket
+ 	routines.
+ 
+ 2019-09-17  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_attr.adb (Expand_Size_Attribute): Chain the special cases
+ 	on the back-end path and rewrite the attribute appled to slices
+ 	of bit-packed arrays into the product of the Length and the
+ 	Compoent_Size attributes of the slices.
+ 	* exp_ch5.adb (Expand_Assign_Array_Bitfield): Use Size attribute
+ 	directly to compute the bitfield's size.
+ 
+ 2019-09-17  Bob Duff  <duff@adacore.com>
+ 
+ 	* exp_ch5.adb (Expand_Assign_Array_Loop_Or_Bitfield): Add tests
+ 	for potential volatile or independent components.
+ 	* libgnat/s-bituti.adb (Copy_Small_Bitfield,
+ 	Copy_Large_Bitfield): Move declarations to more appropriate
+ 	place.
+ 
+ 2019-09-13  Maciej W. Rozycki  <macro@wdc.com>
+ 
+ 	* make.adb (Scan_Make_Arg): Also accept `--sysroot=' for the 
+ 	compiler and the linker.
+  
+ 2019-08-30  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (maybe_saturate_size): New function.
+ 	(gnat_to_gnu_entity): Invoke it on the Esize of types before sending
+ 	it for back-annotations.
+ 	* gcc-interface/trans.c: Fix typo.
+ 
+ 2019-08-30  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/ada-tree.h (DECL_FORCED_BY_REF_P): New macro.
+ 	* gcc-interface/decl.c (gnat_to_gnu_param): Set it on parameters
+ 	whose mechanism was forced to by-reference.
+ 	* gcc-interface/trans.c (Call_to_gnu): Do not issue a warning about a
+ 	misaligned actual parameter if it is based on a CONSTRUCTOR.  Remove
+  	obsolete warning for users of Starlet.  Issue a warning if a temporary
+ 	is make around the call for a parameter with DECL_FORCED_BY_REF_P set.
+ 	(addressable_p): Return true for REAL_CST and ADDR_EXPR.
+ 
+ 2019-08-30  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (gnat_to_gnu): Do not set the location on an
+ 	expression used for a tag.
+ 
+ 2019-08-30  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/gigi.h (aggregate_type_contains_array_p): Declare.
+ 	* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Record_Type>: For an
+ 	extension, test Has_Record_Rep_Clause instead of Has_Specified_Layout.
+ 	(adjust_packed): Return 0 if the type of the field is an aggregate
+ 	type that contains (or is) a self-referential array.
+ 	(type_has_variable_size): Delete.
+ 	* gcc-interface/utils.c (inish_record_type): Constify a variable.
+ 	(aggregate_type_contains_array_p): Add parameter SELF_REFERENTIAL.
+ 	<RECORD_TYPE>: Pass it in the recursive call.
+ 	<ARRAY_TYPE>: If it is true, return true only if the array type is
+ 	self-referential.
+ 	(create_field_decl): Streamline the setting of the alignment on the
+ 	field.  Pass false to aggregate_type_contains_array_p.
+ 
+ 2019-08-30  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (lvalue_required_p) <N_Slice>: Adjust GNU_TYPE
+ 	in the recursive call.
+ 	<N_Selected_Component>: Likewise.
+ 
+ 2019-08-30  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/utils.c (build_template): Deal with parameters
+ 	passed by pointer to component of multi-dimensional arrays.
+ 
+ 2019-08-30  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (annotate_value) <CALL_EXPR>: Inline the call
+ 	also if List_Representation_Info is greater than 3.
+ 
+ 2019-08-30  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (Attribute_to_gnu) <Attr_Size>: Add assertion.
+ 
+ 2019-08-30  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/gigi.h (gigi_checking_assert): New macro.
+ 	* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Modular_Integer_Type>:
+ 	Remove redundant test and adjust comments.  Minor tweaks.
+ 	* gcc-interface/trans.c (Call_to_gnu): Do not generate range checks,
+ 	instead assert that the Do_Range_Check flag is not set.  Adjust call
+ 	to convert_with_check.
+ 	(gnat_to_gnu): Likewise.
+ 	(assoc_to_constructor): Likewise.
+ 	(pos_to_constructor): Likewise.  Remove GNAT_COMPONENT_TYPE parameter.
+ 	(emit_range_check): Delete.
+ 	(convert_with_check): Remove RANGE_P parameter and adjust.  Do a single
+ 	overflow check for modular types.
+ 
+ 2019-08-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/91283
+ 	* gcc-interface/misc.c (gnat_post_options): Set flag_excess_precision
+ 	instead of flag_excess_precision_cmdline.
+ 
+ 2019-08-21  Vadim Godunko  <godunko@adacore.com>
+ 
+ 	* libgnat/g-expect.adb (Expect_Internal): Attempt to read
+ 	several times when 'read' returns non-positive.
+ 
+ 2019-08-21  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* einfo.adb (Is_Discriminal): Remove extra parens.
+ 	(Is_Constant_Object): Simplify by reusing Ekind_In.
+ 	(Is_Prival): Remove extra parens.
+ 	* checks.adb, exp_ch4.adb, sem_ch3.adb, sem_spark.adb: Minor
+ 	reformattings.
+ 
+ 2019-08-21  Claire Dross  <dross@adacore.com>
+ 
+ 	* libgnat/a-cofove.ads (Vector): Add an Iterable aspect to allow
+ 	iteration.
+ 	(Iter_First, Iter_Next): Primitives used for iteration.
+ 
+ 2019-08-21  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_ch3.adb (Analyze_Subtype_Declaration): Inherit RM_Size
+ 	field for formal type parameters in generic instantiations.
+ 
+ 2019-08-21  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb: Update references to the SPARK RM.
+ 
+ 2019-08-21  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* repinfo.adb (List_Array_Info): In -gnatR4 mode, set the
+ 	relevant flag on the component type here instead of...
+ 	(List_Object_Info): Likewise for the object type.
+ 	(List_Entities): ...here.  In -gnatR4 mode, recurse into
+ 	entities local to a record type.
+ 	(List_Component_Layout): In -gnatR4 mode, mark the type as
+ 	relevant.
+ 
+ 2019-08-21  Bob Duff  <duff@adacore.com>
+ 
+ 	* Makefile.rtl (GNATRTL_NONTASKING_OBJS): Add s-bitutil.o and
+ 	s-biutin.o.
+ 	* exp_ch5.adb (Expand_Assign_Array_Bitfield): New function to
+ 	generate a call to Copy_Bitfield. This is disabled for now.
+ 	(Expand_Assign_Array_Loop_Or_Bitfield): New function to decide
+ 	whether to call Expand_Assign_Array_Bitfield.
+ 	(Expand_Assign_Array): Call Expand_Assign_Array_Loop_Or_Bitfield
+ 	instead of Expand_Assign_Array_Loop.
+ 	* libgnat/s-bitfie.ads, libgnat/s-bituti.adb,
+ 	libgnat/s-bituti.ads: New units.
+ 	* rtsfind.ads: Add enum literals for accessing Copy_Bitfield.
+ 
+ 2019-08-21  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* bindo-graphs.ads (Iterate_Edges_To_Successors): Fix typo in
+ 	pragma Inline.
+ 	* bindo-graphs.adb (Delete_Edge): Fix layout in parameter list.
+ 
+ 2019-08-21  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* exp_ch3.adb (Build_Master): Suppress call to
+ 	Build_Class_Wide_Master in the case where the
+ 	access-to-limited-class-wide type was created for a component in
+ 	an entry's formal parameter
+ 	block (Is_Parameter_Block_Component_Type), to prevent a master
+ 	from being created for such access types generated by the front
+ 	end in a task spec for entry formals in a parameter block.  Add
+ 	a ??? about whether this suppression should be done more
+ 	generally (such as by using Comes_From_Source).
+ 
+ 2019-08-21  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch6.adb (Expand_N_Extended_Return_Statement): In the case
+ 	of a built-in-place function that doesn't need a BIP_Alloc_Form
+ 	parameter but returns unconstrained, build the return
+ 	consistently using the function's result subtype.  Remove bypass
+ 	added in previous change.
+ 
+ 2019-08-21  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* sem_prag.adb (Max_Entry_Queue_Length): Do not substitute
+ 	expression of the pragma argument with its value during
+ 	analysis.
+ 	* sem_util.adb (Get_Max_Queue_Length): Compute value of the
+ 	pragma argument when needed.
+ 
+ 2019-08-21  Yannick Moy  <moy@adacore.com>
+ 
+ 	* checks.adb (Install_Null_Excluding_Check): Do not install
+ 	check in GNATprove mode.
+ 
+ 2019-08-21  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb (Process_Path): Do nothing on address of
+ 	subprogram.
+ 
+ 2019-08-21  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_util.adb (Finalize_Address): Deal consistently with
+ 	subtypes of private protected types.
+ 
+ 2019-08-21  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* exp_util.adb (Corresponding_Runtime_Package): Use high-level
+ 	Is_Protected_Type.
+ 	* sem_ch8.adb (Analyze_Renamed_Entry): Likewise.
+ 	* sem_ch9.adb (Analyze_Requeue): Likewise.
+ 
+ 2019-08-21  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* sem_util.adb (Update_Named_Associations): Update
+ 	First_Named_Actual when the subprogram call has a single named
+ 	actual.
+ 
+ 2019-08-21  Joel Brobecker  <brobecker@adacore.com>
+ 
+ 	* doc/Makefile (mk_empty_dirs): New (PHONY) rule.
+ 	(%.html, %.pdf, %.txt, %.info, %.texinfo): Add dependencies on
+ 	mk_empty_dirs.
+ 
+ 2019-08-21  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst: Modify
+ 	documentation to reflect expected behavior.
+ 	* gnat_rm.texi: Regenerate.
+ 	* sem_prag.adb (Analyze_Pragma): Modify handling of pragma
+ 	Max_Entry_Queue_Length to not reject integer values of negative
+ 	one.
+ 	* sem_util.adb (Get_Max_Queue_Length): Add processing for values
+ 	of negative one to fit within the current scheme.
+ 
+ 2019-08-20  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* exp_unst.adb (Unnest_Subprograms, Unnest_Subprogram): Take
+ 	inlining (-gnatn) into account.
+ 
+ 2019-08-20  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_ch13.adb (Expand_N_Attribute_Definition_Clause, case
+ 	Storage_Size): If the expression for Storage_Size is not static
+ 	it may depend on characterstics of another type that may bot be
+ 	frozen yet, so the elaboration of the expression for the aspect
+ 	must be attached directly to the freeze actions of the type to
+ 	which it applies.
+ 
+ 2019-08-20  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* exp_util.adb (Build_DIC_Procedure_Declaration): Set the last
+ 	entity of the generated Default_Initial_Condition procedure in
+ 	order to construct a proper entity chain.
+ 
+ 2019-08-20  Yannick Moy  <moy@adacore.com>
+ 
+ 	* exp_spark.adb (Expand_SPARK_N_Slice_Or_Indexed_Component):
+ 	Renaming of function to apply to slices as well.
+ 	(Expand_SPARK): Expand prefix of slices of access type.
+ 
+ 2019-08-20  Bob Duff  <duff@adacore.com>
+ 
+ 	* exp_aggr.adb (Expand_Array_Aggregate): Use build-in-place in
+ 	the nonlimited case in STEP 4. This improves the efficiency of
+ 	things like (1 .. 1000 => <>).  We still generate some code for
+ 	that, unfortunately, but it is much improved.
+ 	(Aggr_Assignment_OK_For_Backend): Return false if <> components
+ 	are present.
+ 
+ 2019-08-20  Bob Duff  <duff@adacore.com>
+ 
+ 	* exp_ch6.adb (Needs_BIP_Alloc_Form): Call
+ 	Requires_Transient_Scope rather than checking constrainedness
+ 	and so forth.  We have previously improved
+ 	Requires_Transient_Scope to return False in various cases,
+ 	notably a limited record with an access discriminant. This
+ 	change takes advantage of that to avoid using the secondary
+ 	stack for functions returning such types.
+ 	(Make_Build_In_Place_Call_In_Allocator): Be consistent by
+ 	calling Needs_BIP_Alloc_Form rather than Is_Constrained and so
+ 	forth.
+ 	* sem_ch4.adb (Analyze_Allocator): The above change causes the
+ 	compiler to generate code that is not legal Ada, in particular
+ 	an uninitialized allocator for indefinite subtype.  This is
+ 	harmless, so we suppress the error message in this case.
+ 
+ 2019-08-20  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* ali.adb, ali.ads, aspects.adb, checks.ads, checks.adb,
+ 	doc/gnat_rm/implementation_defined_pragmas.rst,
+ 	doc/gnat_ugn/building_executable_programs_with_gnat.rst,
+ 	einfo.ads, exp_aggr.adb, exp_ch11.adb, exp_ch3.ads, exp_ch4.adb,
+ 	exp_disp.adb, inline.adb, libgnat/a-locale.ads,
+ 	libgnat/s-soflin.ads, par_sco.adb, repinfo.adb, sem_ch5.adb,
+ 	sem_disp.adb, sem_elab.adb, sem_eval.adb, sem_spark.adb,
+ 	sem_spark.ads, sinfo.ads: Minor reformattings, typo fixes and
+ 	and rewordings.
+ 
+ 2019-08-20  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* adaint.c (__gnat_to_gm_time): On _WIN32, don't round time up
+ 	to even second.
+ 
+ 2019-08-20  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch3.adb (Analyze_Object_Declaration): If actual type is
+ 	private and distinct from nominal type in declaration, propagate
+ 	flags Is_Constr_Subt_For_U_Nominal and _UN_Aliased to full view
+ 	of private type.
+ 
+ 2019-08-20  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_attr.adb (Expand_Loop_Entry_Attribute): When expanding a
+ 	loop entry attribute for a while_loop we construct a function
+ 	that incorporates the expanded condition of the loop. The itypes
+ 	that may be generated in that expansion must carry the scope of
+ 	the constructed function for proper handling in gigi.
+ 
+ 2019-08-20  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_disp.adb (Build_Class_Wide_Check, Replace_Formals): When a
+ 	dispatching call tp a subprogram with a class-wide precondition
+ 	occurrs in the same declarative part as the ancestor subprogram
+ 	being called, the`expression for the precondition has not been
+ 	analyzed yet. Such a call may appear, e.g. in an expression
+ 	function. In that case, the replacement of formals by actuals in
+ 	the call cannot use the formal entities of the subprogram being
+ 	called, and the occurrence of the formals in the expression must
+ 	be located by name (Chars fields) as would be done at a later
+ 	freeze point, when the expression is resolved in the context of
+ 	the subprogram itself.
+ 
+ 2019-08-20  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_prag.adb (Persistent_BSS): If an initialization is present
+ 	because of Initialize_Scalars or Normalize_Scalars, generate an
+ 	implicit pragma Suppress_Initialization to remove that, because
+ 	initialization is not allowed for these variables. Other
+ 	initializations remain illegal.
+ 
+ 2019-08-20  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* sem_ch3.adb (OK_For_Limited_Init_In_05): In the case of type
+ 	conversions, apply the recursive call to the Original_Node of
+ 	the expression Exp rather than the Expression of the
+ 	Original_Node, in the case where Exp has been rewritten;
+ 	otherwise, when Original_Node is the same as Exp, apply the
+ 	recursive call to the Expression.
+ 	(Check_Initialization): Revise condition for special check on
+ 	type conversions of limited function calls to test Original_Node
+ 	(avoiding spurious errors on expanded unchecked conversions
+ 	applied to build-in-place dispatching calls).
+ 
+ 2019-08-20  Patrick Bernardi  <bernardi@adacore.com>
+ 
+ 	* exp_aggr.adb (Expand_Record_Aggregate): Always convert a
+ 	record Aggregate to assignment statements if the option
+ 	Aggregate_Individually_Assign is set.
+ 	* opt.ads (Aggregate_Individually_Assign): New option.
+ 	* par-prag.adb (Prag): Add Pragma_Aggregate_Individually_Assign.
+ 	* sem_prag.adb (Analyze_Pragma): Likewise.
+ 	* snames.ads-tmpl: Add Pragma_Aggregate_Individually_Assign and
+ 	Name_Aggregate_Individually_Assign.
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst: Document
+ 	pragma Aggregate_Individually_Assign.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-08-20  Bob Duff  <duff@adacore.com>
+ 
+ 	* par-ch4.adb: Minor wording change in error messages.
+ 	* sem_aggr.adb (Resolve_Delta_Aggregate): Emit an error for Ada
+ 	versions prior to Ada 2020.
+ 
+ 2019-08-20  Bob Duff  <duff@adacore.com>
+ 
+ 	* freeze.adb (Is_Atomic_VFA_Aggregate): Make the temp for
+ 	initialization of the atomic variable be constant. This is
+ 	cleaner, and might improve efficiency.
+ 
+ 2019-08-20  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* repinfo.adb (List_Record_Info): In -gnatR4 mode, set the
+ 	relevant flag on the implicit base type of a record subtype.
+ 
+ 2019-08-20  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_eval.adb (Expr_Value): Implement the case of an unchecked
+ 	conversion of a static expression.
+ 
+ 2019-08-20  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_ch13.adb (Is_Null_Array): New function, used to detect the
+ 	null array case; used to warn about uncheckedly converting to a
+ 	zero-sized array.  It is unfortunate that we can't just check
+ 	the size, and warn on all cases of converting from a
+ 	nonzero-sized type to a zero-sized one. That's because "0" means
+ 	two different things: "size is zero" and "size is unknown".
+ 	Until we fix that design flaw, we need this more targeted fix.
+ 
+ 2019-08-20  Bob Duff  <duff@adacore.com>
+ 
+ 	* libgnat/a-cborma.adb, libgnat/a-cborse.adb (Clear): Repeatedly
+ 	call Delete. This avoids clearing the free list, which
+ 	substantially speeds up future Delete operations.
+ 
+ 2019-08-20  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_ch13.adb (Component_Order_Check): New procedure to check
+ 	for out-of-order clauses.
+ 	* warnsw.ads, warnsw.adb: New -gnatw_r switch.
+ 	* doc/gnat_ugn/building_executable_programs_with_gnat.rst:
+ 	Document new switch.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-08-20  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_ch13.adb (Object_Size): Give an error for zero. It really
+ 	rubs me the wrong way that we don't honor "for T'Object_Size use
+ 	0;", but it's not important enough to fix. In any case, if we're
+ 	not going to obey the clause, we should give an error.
+ 
+ 2019-08-20  Bob Duff  <duff@adacore.com>
+ 
+ 	* errout.adb (Error_Msg_Internal): Set Warn_Err in case of
+ 	Is_Style_Msg.
+ 	* erroutc.adb (Output_Msg_Text): Do Warnings_Treated_As_Errors
+ 	processing and [warning-as-error] modification for style
+ 	messages.  Clean up code, simplify, remove unnecessary block
+ 	statement, add renaming of table entry.
+ 	* erroutc.ads (Warning_Treated_As_Error): Fix comment: no such
+ 	thing as Set_Warning_As_Error.
+ 	* opt.ads: Clean up comments and move related declarations near
+ 	each other.
+ 	* par-prag.adb: Process Warning_As_Error. This is necessary
+ 	because many style warning happen during parsing.
+ 	* sem_prag.adb: Use new Acquire_Warning_Match_String.
+ 	* sem_util.ads, sem_util.adb (Acquire_Warning_Match_String): New
+ 	function shared by par-prag.adb and sem_prag.adb. Replaces the
+ 	procedure in sem_prag.adb. Avoid use of global variables.
+ 	* stringt.ads, stringt.adb (To_String): New function to convert
+ 	String_Id to String.
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst: Document the
+ 	new feature.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-08-20  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* lib.ads: Add with clause for GNAT.HTable.
+ 	Add pragma Inline for Is_Loaded and alphabetize the list.
+ 	(Unit_Name_Table_Size): New constant.
+ 	(Unit_Name_Header_Num): New subtype.
+ 	(Unit_Name_Hash): New function declaration.
+ 	(Unit_Names): New simple hash table.
+ 	(Init_Unit_Name): New procedure declaration.
+ 	* lib.adb (Set_Unit_Name): Unregister the old name in the table,
+ 	if any, and then register the new name.
+ 	(Init_Unit_Name): New procedure.
+ 	(Is_Loaded): Reimplement using a lookup in the names table.
+ 	(Remove_Unit): Unregister the name.
+ 	(Unit_Name_Hash): New function.
+ 	* lib-load.adb (Create_Dummy_Package_Unit): Call Init_Unit_Name.
+ 	(Load_Unit): Use a lookup in the names table to find out whether
+ 	the unit has already been loaded.  Call Init_Unit_Name and then
+ 	Remove_Unit if the loading has failed.
+ 	(Make_Child_Decl_Unit): Call Init_Unit_Name.
+ 	(Make_Instance_Unit): Likewise.
+ 	* lib-writ.adb (Ensure_System_Dependency): Likewise.
+ 
+ 2019-08-20  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_ch13.adb (Record_Hole_Check): Initialize After_Last.
+ 
+ 2019-08-20  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* impunit.adb (Get_Kind_Of_Unit): Revert change for adapting
+ 	this routine for gnatprove.
+ 
+ 2019-08-20  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst: Document
+ 	requirements for Pragma Lock_Free.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-08-20  Philippe Gil  <gil@adacore.com>
+ 
+ 	* bindgen.adb (Gen_Main): Set gnat_argc/gnat_argv to argc/argv
+ 	only when still uninitialized.
+ 
+ 2019-08-20  Bob Duff  <duff@adacore.com>
+ 
+ 	* libgnat/g-comlin.ads (Exit_From_Command_Line): Fix
+ 	documentation for GNAT.Command_Line.
+ 
+ 2019-08-20  Pierre-Marie de Rodat  <derodat@adacore.com>
+ 
+ 	PR ada/91492
+ 	* gcc-interface/lang.opt (-fdump-scos): Add missing dot at the
+ 	end of the documentation.
+ 
+ 2019-08-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* gcc-interface/misc.c (default_pass_by_ref): Update call to
+ 	pass_by_reference.
+ 
+ 2019-08-19  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_advice.rst: Fix documentation for
+ 	stream oriented attributes.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-08-19  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* einfo.ads (E_Function, E_Procedure): Update comments to
+ 	reflect that Renamed_Entity is also used for nongeneric
+ 	subprograms.
+ 
+ 2019-08-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_prag.adb (Is_Before_First_Decl): Deal with rewritten
+ 	pragmas.
+ 
+ 2019-08-19  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_warn.adb (Warn_On_Unreferenced_Entity): Suppress warning
+ 	on formal parameters of dispatching operations.
+ 
+ 2019-08-19  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Call): A call to an expression function
+ 	freezes when expander is active, unless the call appears within
+ 	the body of another expression function,
+ 
+ 2019-08-19  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/s-os_lib.ads, libgnat/s-os_lib.adb (To_Ada, To_C): New
+ 	routines.
+ 
+ 2019-08-19  Bob Duff  <duff@adacore.com>
+ 
+ 	* exp_attr.adb (Attribute_Valid): Correct the handling of
+ 	private types where the full type is modular. System.Address is
+ 	an example. Otherwise, we convert uncheckedly to a signed type,
+ 	so we get an incorrect range 0 .. -1, for which all values will
+ 	fail.  The 'Valid attribute is illegal for such types, but we
+ 	generate such illegal attribute_references for 'Valid_Scalars,
+ 	and we generate 'Valid_Scalars when the -gnateV switch is used.
+ 	Rename Btyp --> PBtyp to avoid hiding the outer Btyp, which was
+ 	confusing.
+ 	* libgnat/a-except.adb: Set the Exception_Raised component.
+ 	Otherwise, we have incorrect reads of invalid data.
+ 
+ 2019-08-19  Pierre-Marie de Rodat  <derodat@adacore.com>
+ 
+ 	* libgnat/a-cgaaso.ads, libgnat/a-cgarso.ads,
+ 	libgnat/a-cogeso.ads, libgnat/a-contai.ads,
+ 	libgnat/a-locale.ads: Import documentation from the RM.
+ 
+ 2019-08-19  Jerome Guitton  <guitton@adacore.com>
+ 
+ 	* Makefile.rtl (system.o): New target to add generation of
+ 	target properties.
+ 	* gcc-interface/Makefile.in (install-gnatlib): Install
+ 	ada_target_properties.
+ 
+ 2019-08-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* inline.adb (Add_Inlined_Body): Do not special-case instances
+ 	that are compilation units.
+ 	(Add_Pending_Instantiation): Likewise.
+ 	(Instantiate_Body): Skip instantiations that are compilation
+ 	units and have already been performed.
+ 	* sem_ch12.adb (Needs_Body_Instantiated): Do not special-case
+ 	instances that are compilation units.
+ 	(Load_Parent_Of_Generic): Be prepared for parent that is a
+ 	compilation unit but whose instantiation node has not been
+ 	replaced.
+ 
+ 2019-08-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* inline.adb (Initialize, Lock): Deal with
+ 	Called_Pending_Instantiations.
+ 
+ 2019-08-19  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch6.adb (Check_Synchronized_Overriding): Complete
+ 	predicate that applies legality check in 9.4 (11.9/2): if an
+ 	inherited subprogram is implemented by a protected procedure or
+ 	entry, its first paarameter must be out, in_out or
+ 	access_to_varible.
+ 
+ 2019-08-19  Javier Miranda  <miranda@adacore.com>
+ 
+ 	PR ada/65696
+ 	* exp_atag.ads, exp_atag.adb (Build_Inherit_Predefined_Prims):
+ 	Adding formal to specify how many predefined primitives are
+ 	inherited from the parent type.
+ 	* exp_disp.adb (Number_Of_Predefined_Prims): New subprogram.
+ 	(Make_Secondary_DT): Compute the number of predefined primitives
+ 	of all tagged types (including tagged types not defined at
+ 	library level).  Previously we unconditionally relied on the
+ 	Max_Predef_Prims constant value when building the dispatch
+ 	tables of tagged types not defined at library level (thus
+ 	consuming more memory for their dispatch tables than required).
+ 	(Make_DT): Compute the number of predefined primitives that must
+ 	be inherited from their parent type when building the dispatch
+ 	tables of tagged types not defined at library level. Previously
+ 	we unconditionally relied on the Max_Predef_Prims constant value
+ 	when building the dispatch tables of tagged types not defined at
+ 	library level (thus copying more data than required from the
+ 	parent type).
+ 
+ 2019-08-19  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_ch13.adb (Record_Hole_Check): Procedure to check for holes
+ 	that incudes processing type extensions. A type extension is
+ 	processed by first calling Record_Hole_Check recursively on the
+ 	parent type to compute the bit number after the last component
+ 	of the parent.
+ 
+ 2019-08-19  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* checks.adb (Length_Mismatch_Info_Message): New function in
+ 	Selected_Length_Checks to return a message indicating the
+ 	element counts for the mismatched lengths for a failed
+ 	compile-time length check.
+ 	(Plural_Or_Singular_Ending): Support function in
+ 	Length_Mismatch_Info_Message to return either "" or "s", for
+ 	concatenating to the end of words.
+ 	(Selected_Length_Checks): Pass the result of
+ 	Length_Mismatch_Info_Message as an extra warning message to
+ 	Compile_Time_Constraint_Error to indicate the mismatched lengths
+ 	for a failed compile-time length check.
+ 	* sem_util.ads (Compile_Time_Constraint_Error): Add an optional
+ 	message formal (Extra_Msg), defaulted to the empty string.
+ 	* sem_util.adb (Compile_Time_Constraint_Error): Output an extra
+ 	message following the main warning message (when Extra_Msg is
+ 	not the empty string).
+ 
+ 2019-08-19  Patrick Bernardi  <bernardi@adacore.com>
+ 
+ 	* socket.c: Removed the redefinition of getaddrinfo, getnameinfo
+ 	and freeaddrinfo to internal VxWorks kernel calls because they
+ 	are, well, internal kernel calls and cannot be called from RTPs.
+ 	VxWorks provides the necessary components to call these routines
+ 	directly.
+ 
+ 2019-08-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_dist.adb (Is_Generic_Actual_Subtype): New predicate.
+ 	(Build_From_Any_Call, Build_To_Any_Call, Build_TypeCode_Call):
+ 	Use it instead of Is_Generic_Actual_Type flag to detect subtypes
+ 	representing generic actual types.
+ 
+ 2019-08-19  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_warn.adb (Check_References, Generic_Body_Formal): When a
+ 	formal parameter of a generic subprogram is not referenced in
+ 	the body, place the corresponding warning on the corresponding
+ 	entity in the specification of the generic body, as is done for
+ 	non-generic subprograms.
+ 
+ 2019-08-19  Bob Duff  <duff@adacore.com>
+ 
+ 	* errout.ads (Size_Too_Small_Message): New constant.
+ 	* errout.adb, freeze.adb, sem_ch13.adb: Use it.
+ 
+ 2019-08-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_dist.adb (Build_Package_Stubs): Do not specifically visit
+ 	the declarations of an N_Subprogram_Instantiation node.
+ 
+ 2019-08-19  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_ugn/gnat_utility_programs.rst: Document missing
+ 	metrics switches.
+ 
+ 2019-08-19  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* sem_ch12.adb (Get_Unit_Instantiation_Node): Simplify Nkind_In
+ 	membership test.
+ 	* sem.adb (Depends_On_Main): Whitespace cleanup; only assign a
+ 	local variable if needed.
+ 
+ 2019-08-19  Claire Dross  <dross@adacore.com>
+ 
+ 	* sem_spark.ads, sem_spark.adb (Is_Pledge_Function): New
+ 	parameter of the generic. Function used to decide whether a
+ 	function is a pledge function.
+ 	(Check_Not_Borrowed): Disable check inside the second parameter
+ 	of a pledge function for the path borrowed by the first
+ 	parameter. Also disable checks for entities inside a Global
+ 	contract.
+ 
+ 2019-08-19  Joffrey Huguet  <huguet@adacore.com>
+ 
+ 	* libgnat/a-cfdlli.ads, libgnat/a-cfhama.ads,
+ 	libgnat/a-cfinve.ads, libgnat/a-cforma.ads,
+ 	libgnat/a-cofove.ads, libgnat/a-cofuma.ads,
+ 	libgnat/a-cofuve.ads: Add formal function parameter "=" (L, R :
+ 	Element_Type) to the generic packages.
+ 
+ 2019-08-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* opt.ads: Clean up left-overs of earlier implementation in
+ 	comment:
+ 
+ 2019-08-19  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch3.adb (Derived_Enumeration_Type): Do no freeze anonymous
+ 	base type if the bounds in the derived type declaration are
+ 	literals of the type.
+ 
+ 2019-08-19  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Call): Check non-aliasing rules before
+ 	GNATprove inlining.
+ 
+ 2019-08-19  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* inline.adb (Add_Inlined_Body): Do not add pending
+ 	instantiations.
+ 	* sem_ch12.adb (Needs_Body_Instantiated): New predicate.
+ 	(Analyze_Package_Instantiation): Use it to decide whether to add
+ 	a pending instantiation for the body of the package.
+ 
+ 2019-08-19  Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* gcc-interface/trans.c (Acc_Loop_to_gnu): Return the openacc
+ 	BIND_EXPR node we have constructed on purpose.  Remove unused
+ 	variable.
+ 
+ 2019-08-19  Pierre-Marie de Rodat  <derodat@adacore.com>
+ 
+ 	* gcc-interface/lang.opt (fdump-scos): Define.
+ 	* gcc-interface/misc.c (gnat_handle_option): Handle
+ 	OPT_fdump_scos.
+ 
+ 2019-08-14  Joffrey Huguet  <huguet@adacore.com>
+ 
+ 	* libgnat/a-cofuba.ads: Add a Length attribute to type
+ 	Container. Add a type Array_Base which replaces the previous
+ 	Elements attribute of Container.
+ 	(Content_Init): New subprogram. It is used to initialize the
+ 	Base attribute of Container.
+ 	* libgnat/a-cofuba.adb (Resize): New subprogram. It is used to
+ 	resize the underlying array of a container if necessary.
+ 	(=, <=, Find, Get, Intersection, Length, Num_Overlaps, Set,
+ 	Union): Update to match changes in type declarations.
+ 	(Add): Modify body to damp the time and space cost in a specific
+ 	case.
+ 	(Content_Init): New subprogram. It is used to initialize the
+ 	Base attribute of Container.
+ 	(Remove): Modify body to damp the time and space cost in a
+ 	specific case.
+ 
+ 2019-08-14  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_ch13.adb (Get_Alignment_Value): Return 1 for Alignment 0,
+ 	and do not give an error.
+ 	* doc/gnat_rm/representation_clauses_and_pragmas.rst: Update the
+ 	corresponding documentation.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-08-14  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* inline.adb (Add_Pending_Instantiation): Fix off-by-one error
+ 	in the comparison against the maximum number of instantiations.
+ 
+ 2019-08-14  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* inline.adb (Add_Pending_Instantiation): Use greater-or-equal
+ 	in the comparison against the maximum number of instantiations.
+ 
+ 2019-08-14  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_aux.adb (Next_Rep_Item): If a node in the rep chain
+ 	involves a Ghost aspect it may have been replaced by a null
+ 	statement; use the original node to find next Rep_Item.
+ 	* repinfo.adb (List_Entities): Do not list an Ignored
+ 	Ghost_Entity, for which information may have been deleted.
+ 
+ 2019-08-14  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_prag.ads, sem_prag.adb
+ 	(Process_Compile_Time_Warning_Or_Error): In parameterless
+ 	version, improve detection of whether we are in a generic unit
+ 	to cover the case of an instance within a generic unit.
+ 	(Process_Compile_Time_Warning_Or_Error): Rename the
+ 	two-parameter version to be
+ 	Validate_Compile_Time_Warning_Or_Error, and do not export it.
+ 	Issue a warning if the condition is not known at compile time.
+ 	The key point is that the warning must be given only for pragmas
+ 	deferred to the back end, because the back end discovers
+ 	additional values that are known at compile time.  Previous
+ 	changes in this ticket have enabled this by deferring to the
+ 	back end without checking for special cases such as 'Size.
+ 	(Validate_Compile_Time_Warning_Or_Error): Rename to be
+ 	Defer_Compile_Time_Warning_Error_To_BE.
+ 	* warnsw.ads, warnsw.adb (Warn_On_Unknown_Compile_Time_Warning):
+ 	Add new switches -gnatw_c and -gnatw_C to control the above
+ 	warning.
+ 	* doc/gnat_ugn/building_executable_programs_with_gnat.rst:
+ 	Document new switches.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-08-14  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch12.adb (Might_Inline_Subp): Rework comment and restrict
+ 	the shortcut based on Is_Inlined to the back-end inlining case.
+ 
+ 2019-08-14  Bob Duff  <duff@adacore.com>
+ 
+ 	* inline.adb (Check_And_Split_Unconstrained_Function): Ignore
+ 	protected functions to get rid of spurious error. The
+ 	transformation done by this procedure triggers legality errors
+ 	in the generated code in this case.
+ 
+ 2019-08-14  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_prag.adb (Process_Compile_Time_Warning_Or_Error): Defer
+ 	processing to the back end in all cases where the pragma's
+ 	condition is not known at compile time during the front end
+ 	(except in generics), as opposed to detecting 'Size attributes
+ 	and the like. This ensures that we take advantage of whatever
+ 	can be compile-time known after running the back end, as opposed
+ 	to having the front end guess what the back end can do.  Remove
+ 	a little duplicated code at the call site.
+ 	* gnat1drv.adb (Post_Compilation_Validation_Checks): Unlock the
+ 	Elists while in Validate_Compile_Time_Warning_Errors, because it
+ 	does analysis and name resolution, which sometimes involves
+ 	adding Elists.
+ 
+ 2019-08-14  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* einfo.ads (Is_Called): Document new usage on E_Package
+ 	entities.
+ 	* einfo.adb (Is_Called): Accept E_Package entities.
+ 	(Set_Is_Called): Likewise.
+ 	* exp_ch6.adb (Expand_Call_Helper): Move code dealing with
+ 	instances for back-end inlining to Add_Inlined_Body.
+ 	* inline.ads: Remove with clauses for Alloc and Table.
+ 	(Pending_Instantiations): Move to...
+ 	* inline.adb: Add with clauses for Alloc, Uintp, Table and
+ 	GNAT.HTable.
+ 	(Backend_Instances): New variable.
+ 	(Pending_Instantiations): ...here.
+ 	(Called_Pending_Instantiations): New table.
+ 	(Node_Table_Size): New constant.
+ 	(Node_Header_Num): New subtype.
+ 	(Node_Hash): New function.
+ 	(To_Pending_Instantiations): New hash table.
+ 	(Add_Inlined_Body): Bail out early for subprograms in the main
+ 	unit or subunit.  Likewise if the Is_Called flag is set.  If the
+ 	subprogram is an instance, invoke Add_Inlined_Instance.  Call
+ 	Set_Is_Called earlier.  If the subrogram is within an instance,
+ 	invoke Add_Inlined_Instance.  Also deal with the case where the
+ 	call itself is within an instance.
+ 	(Add_Inlined_Instance): New procedure.
+ 	(Add_Inlined_Subprogram): Remove conditions always fulfilled.
+ 	(Add_Pending_Instantiation): Move the defence against ludicruous
+ 	number of instantiations to here. When back-end inlining is
+ 	enabled, associate an instantiation with its index in table and
+ 	mark a few selected kinds of instantiations as always needed.
+ 	(Initialize): Set Backend_Instances to No_Elist.
+ 	(Instantiate_Body): New procedure doing the work extracted
+ 	from...
+ 	(Instantiate_Bodies): ...here.  When back-end inlining is
+ 	enabled, loop over Called_Pending_Instantiations instead of
+ 	Pending_Instantiations.
+ 	(Is_Nested): Minor tweak.
+ 	(List_Inlining_Info): Also list the contents of
+ 	Backend_Instances.
+ 	* sem_ch12.adb (Might_Inline_Subp): Return early if Is_Inlined
+ 	is set and otherwise set it before returning true.
+ 	(Analyze_Package_Instantiation): Remove the defence against
+ 	ludicruous number of instantiations.  Invoke
+ 	Remove_Dead_Instance instead of doing the removal manually if
+ 	there is a guaranteed ABE.
+ 
+ 2019-08-14  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* exp_ch3.adb (Predef_Spec_Or_Body): For an equality operation
+ 	of an interface type, create an expression function (that
+ 	returns False) rather than declaring an abstract function.
+ 	* freeze.adb (Check_Inherited_Conditions): Set Needs_Wrapper to
+ 	False unconditionally at the start of the loop creating wrappers
+ 	for inherited operations.
+ 
+ 2019-08-14  Bob Duff  <duff@adacore.com>
+ 
+ 	* table.adb: Assert that the table is not locked when increasing
+ 	Last, even if it doesn't cause reallocation.  In other words,
+ 	assert that on operations that MIGHT cause reallocation.
+ 	* table.ads: Fix comment accordingly.
+ 
+ 2019-08-14  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* doc/gnat_ugn/gnat_and_program_execution.rst: Remove
+ 	documentation of gnatelim.
+ 
+ 2019-08-14  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_prag.adb (Validate_Compile_Time_Warning_Error): Attach the
+ 	warning to the Sloc of the first pragma argument, rather than to
+ 	the pragma itself. This is to make pragmas processed after the
+ 	back end use the same Sloc as pragmas processed earlier, in the
+ 	front end. There's no reason for this discrepancy, and it
+ 	hinders further work on this ticket.
+ 
+ 2019-08-14  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem.ads (Inside_A_Generic): Remove the ??? comment.
+ 
+ 2019-08-14  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* inline.ads (Pending_Descriptor): Delete.
+ 	* inline.adb (Initialize): Do not initialize it.
+ 	* sem_ch12.adb (Delay_Descriptors): Delete.
+ 	(Analyze_Package_Instantiation): Call
+ 	Set_Delay_Subprogram_Descriptors instead of Delay_Descriptors
+ 	throughout.
+ 
+ 2019-08-14  Bob Duff  <duff@adacore.com>
+ 
+ 	* exp_aggr.adb (Init_Hidden_Discriminants): Avoid processing the
+ 	wrong discriminant, which could be of the wrong type.
+ 
+ 2019-08-14  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch12.adb (Analyze_Instance_And_Renamings): Do not reset
+ 	the Is_Generic_Instance flag previously set on the package
+ 	generated for the instantiation of a generic subprogram.
+ 
+ 2019-08-14  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_Quantified_Expression): Freeze
+ 	explicitly the type of the loop parameter.
+ 
+ 2019-08-14  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* sem_util.adb (New_Copy_Tree.Copy_Node_With_Replacement):
+ 	Update the Chars attribute of identifiers.
+ 
+ 2019-08-14  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb, sem_spark.ads (Is_Legal): New function exposed
+ 	for use in GNATprove, to test legality rules not related to
+ 	permissions.
+ 	(Check_Declaration_Legality): Extract the part of
+ 	Check_Declaration that checks rules not related to permissions.
+ 	(Check_Declaration): Call the new Check_Declaration_Legality.
+ 	(Check_Type_Legality): Rename of Check_Type. Introduce
+ 	parameters to force or not checking, and update a flag detecting
+ 	illegalities.
+ 	(Check_Node): Ignore attribute references in statement position.
+ 
+ 2019-08-14  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb (Check_Old_Loop_Entry): New procedure to check
+ 	correct use of Old  and Loop_Entry.
+ 	(Check_Node): Check subprogram contracts.
+ 	(Check_Pragma): Check Loop_Variant.
+ 	(Check_Safe_Pointers): Apply checking to library-level
+ 	subprogram  declarations as well, in order to check their
+ 	contract.
+ 
+ 2019-08-14  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb (Is_Subpath_Expression): Take into account
+ 	conversion and qualification.
+ 
+ 2019-08-14  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch7.adb (Install_Private_Declarations)
+ 	<Swap_Private_Dependents>: Do not rely solely on the
+ 	Is_Child_Unit flag on the unit to recurse.
+ 	(Uninstall_Declarations) <Swap_Private_Dependents>: New
+ 	function.  Use it to recurse on the private dependent entities
+ 	for child units.
+ 
+ 2019-08-14  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_aggr.adb (Is_CCG_Supported_Aggregate): Return False for
+ 	arrays with bounds not known at compile time.
+ 
+ 2019-08-14  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_util.adb (New_Copy_Tree, Visit_Entity): A quantified
+ 	expression includes the implicit declaration of the loop
+ 	parameter. When a quantified expression is copied during
+ 	expansion, for example when building the precondition code from
+ 	the generated pragma, a new loop parameter must be created for
+ 	the new tree, to prevent duplicate declarations for the same
+ 	symbol.
+ 
+ 2019-08-14  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_disp.adb (Check_Dispatching_Operation): Update assertion
+ 	for the separate declarations created in GNATprove mode.
+ 	* sem_disp.ads (Is_Overriding_Subprogram): Update comment.
+ 	* sem_elab.adb (SPARK_Processor): Fix test for checking of
+ 	overriding primitives.
+ 
+ 2019-08-14  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* inline.adb (Add_Inlined_Body): Tweak comments.
+ 	(List_Inlining_Info): Also list information about non-main
+ 	units.
+ 
+ 2019-08-14  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* sem_ch4.adb (Analyze_Selected_Component): In the case where
+ 	the prefix is of a concurrent type, and the selected entity
+ 	matching the selector is the first private declaration of the
+ 	type (such as the first local variable in a task's body), set
+ 	Is_Private_Op.
+ 
+ 2019-08-14  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* einfo.adb (Is_Generic_Actual_Subprogram): Replace repeated
+ 	calls to Ekind with Ekind_In.
+ 
+ 2019-08-13  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR middle-end/91421
+ 	* gcc-interface/trans.c (gigi): Call set_decl_buillt_in_function.
+ 	(Call_to_gnu): Use DECL_FE_FUNCTION_CODE instead of DECL_FUNCTION_CODE.
+ 
+ 2019-08-13  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* ali.ads (Linker_Option_Record): Remove Original_Pos component.
+ 	* ali.adb (Scan_ALI): Do not set it.
+ 
+ 2019-08-13  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch3.adb (Build_Derived_Concurrent_Type): Add a couple of
+ 	local variables and use them.  When the derived type fully
+ 	constrains the parent type, rewrite it as a subtype of an
+ 	implicit (unconstrained) derived type instead of the other way
+ 	around.
+ 	(Copy_And_Build): Deal with concurrent types and use predicates.
+ 	(Build_Derived_Private_Type): Build the full derivation if
+ 	needed for concurrent types too.
+ 	(Build_Derived_Record_Type): Add marker comment.
+ 	(Complete_Private_Subtype): Use predicates.
+ 
+ 2019-08-13  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch3.adb (Check_Generic_Ancestor): New subprogram,
+ 	aubsidiary to Build_Derived_Record_Type. to enforce the rule
+ 	that a type extension declared in a generic body cznnot have an
+ 	ancestor that is a generic formal (RM 3.9.1 (4/2)). The rule
+ 	applies to all ancestors of the type, including interface
+ 	progenitors.
+ 
+ 2019-08-13  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch3.adb (Build_Underlying_Full_View): Delete.
+ 	(Complete_Private_Subtype): Do not set the full view on the
+ 	private subtype here.  If the full base is itself derived from
+ 	private, do not re-derive the parent type but instead constrain
+ 	an existing underlying full view.
+ 	(Prepare_Private_Subtype_Completion): Do not get to the
+ 	underlying full view, if any.  Set the full view on the private
+ 	subtype here.
+ 	(Process_Full_View): Likewise.
+ 	* sem_ch12.adb (Check_Generic_Actuals): Also set
+ 	Is_Generic_Actual_Type on the full view if the type of the
+ 	actual is private.
+ 	(Restore_Private_Views): Also reset Is_Generic_Actual_Type on
+ 	the full view if the type of the actual is private.
+ 	* sem_eval.adb (Subtypes_Statically_Match): Remove bypass for
+ 	generic actual types.
+ 
+ 2019-08-13  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Selected_Component): When the type of the
+ 	component is an access to a class-wide type and the type of the
+ 	context is an access to a tagged type the relevant type is that
+ 	of the component (since in such case we may need to generate
+ 	implicit type conversions or dispatching calls).
+ 
+ 2019-08-13  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_aggr.adb (Aggr_Assignment_OK_For_Backend):  Preanalyze
+ 	expression, rather do a full analysis, to prevent unwanted
+ 	removal of side effects which mask the intent of the expression.
+ 
+ 2019-08-13  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* impunit.adb (Non_Imp_File_Names_95): Add
+ 	GNAT.Branch_Prediction.
+ 
+ 2019-08-13  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch6.adb: Remove with and use clauses for Sem_Ch12.
+ 	(Expand_Call_Helper): Swap the back-end inlining case and the
+ 	special front-end expansion case.  In back-end inlining mode, do
+ 	not invoke Add_Inlined_Body unless the call may be inlined.
+ 	* inline.ads (Add_Pending_Instantiation): New function moved
+ 	from...
+ 	* inline.adb (Add_Inlined_Body): Simplify comment.  Turn test on
+ 	the enclosing unit into assertion.
+ 	(Add_Pending_Instantiation): New function moved from...
+ 	* sem_ch12.ads (Add_Pending_Instantiation): ...here.
+ 	* sem_ch12.adb (Add_Pending_Instantiation): ...here.
+ 
+ 2019-08-13  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem.adb (Do_Analyze): Recompute Style_Check_Max_Line_Length
+ 	after restoring Style_Max_Line_Length.
+ 
+ 2019-08-13  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* sem_ch13.adb (Check_Iterator_Functions): Protect against
+ 	cascaded errors.
+ 
+ 2019-08-13  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch8.adb (Analyze_Subprogram_Renaming): Do no suppress mode
+ 	conformance checks on child unit instance that is a compilation
+ 	unit.
+ 
+ 2019-08-13  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* exp_dbug.adb (Fully_Qualify_Name): Add full name qualification
+ 	for the E_Exception case.
+ 
+ 2019-08-13  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* exp_aggr.adb (Aggr_Size_OK): Compute the aggregate size using
+ 	universal arithmetic, to avoid situations where the size
+ 	computation overflows.
+ 
+ 2019-08-13  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* repinfo.adb (List_Scalar_Storage_Order): Modify conditionals
+ 	for displaying ordering to always be triggered when -gnatR4 is
+ 	in effect.
+ 
+ 2019-08-13  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* aspects.adb, aspects.ads: Register new aspect.
+ 	* par-prag.adb (Prag): Register new pragma
+ 	* sem_ch13.adb (Analyze_Aspect_Specifications): Add processing
+ 	for new aspect similar to Aspect_Max_Entry_Queue_Length.
+ 	* sem_prag.adb, sem_prag.ads (Analyze_Pragma): Register new
+ 	pragma and set it to use the same processing as
+ 	Pragma_Max_Queue_Length.
+ 	* snames.ads-tmpl: Move definition of
+ 	Name_Max_Entry_Queue_Length so that it can be processed as a
+ 	pragma in addition to a restriction and add an entry for the
+ 	pragma itself.
+ 
+ 2019-08-13  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_ch4.adb (Analyze_Allocator): Do not insert subtype
+ 	declaration for allocator inside a spec expression.
+ 
+ 2019-08-13  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Call): Do not inline calls inside record
+ 	types.
+ 
+ 2019-08-13  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch4.adb (Analyze_One_Call): Remove bypass for type
+ 	mismatch in nested instantiations.
+ 	* sem_ch8.adb (Find_Nearer_Entity): New function.
+ 	(Find_Renamed_Entity): Use it to disambiguate the candidates for
+ 	the renaming generated for an instantiation when it is
+ 	ambiguous.
+ 
+ 2019-08-13  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat1drv.adb (Adjust_Global_Switches): Do not set
+ 	Back_End_Inlining in ASIS mode either.
+ 
+ 2019-08-13  Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* libgnat/s-win32.ads: Define size_t and fix the MapViewOfFile
+ 	binding to use it instead of DWORD for the dwNumberOfBytesToMap
+ 	argument.
+ 	* libgnat/g-sercom__mingw.adb (Read): State which definition of
+ 	size_t to fetch in call to Last_Index.
+ 
+ 2019-08-13  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* gcc-interface/Make-lang.in: Remove unused TRACE variable. Pass
+ 	LN_S to relevant gnatlib targets.
+ 	* gcc-interface/Makefile.in: Systematically pass LN_S to
+ 	relevant gnatlib targets.
+ 
+ 2019-08-13  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_dim.adb (Analyze_Dimension,
+ 	Analyze_Dimension_Array_Aggregate, Analyze_Dimension_Call,
+ 	Analyze_Dimension_Extension_Or_Record_Aggregate): Return
+ 	immediately when inside an inlined body.
+ 	* sem_res.adb (Resolve_Call): Remove special checking now done
+ 	inside Analyze_Dimension_Call.
+ 
+ 2019-08-13  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_Allocator): Add condition to detect
+ 	library-level object declarations
+ 
+ 2019-08-13  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* doc/gnat_ugn/building_executable_programs_with_gnat.rst
+ 	(-gnateT): Document Double_Float_Alignment parameter and fix
+ 	description of Double_Scalar_Alignment parameter.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-08-13  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch6.adb (Expand_Call_Helper): If back-end inlining is
+ 	enabled, also instantiate the body of a generic unit containing
+ 	a subprogram subject to aspect/pragma Inline_Always at
+ 	optimization level zero.
+ 	* sem_ch12.adb (Might_Inline_Subp): Minor tweak.
+ 	(Analyze_Package_Instantiation): Do not instantiate the package
+ 	body because of inlining considerations if the instantiation is
+ 	done in a generic unit.  Move around similar condition involving
+ 	the main unit.  Add test on Back_End_Inlining to processing for
+ 	front-end inlining.
+ 
+ 2019-08-13  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_disp.adb (Make_Secondary_DT): Handle record type
+ 	derivations that have interface components located at fixed
+ 	positions and interface components located at variable offset.
+ 	The offset of components located at fixed positions is computed
+ 	using the dummy object (similar to the case where all the
+ 	interface components are located at fixed positions).
+ 	(Make_DT): Build the dummy object for all tagged types that
+ 	implement interface types (that is, build it also for types with
+ 	variable size components), and use the dummy object to compute
+ 	the offset of all tag components located at fixed positions when
+ 	initializing the Interface_Table object.
+ 
+ 2019-08-13  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* gnatcmd.adb (GNATCmd): Add constant for new compiler switch
+ 	--help-ada, and include usage subprogram. Add line to usage help
+ 	explaining the new flag.
+ 	(GNATCmd_Usage): Rename from locally declared Usage so as not to
+ 	confuse with the newly imported version. Add new argument case
+ 	for --help-ada and add bug report email to implicit display of
+ 	help without the --help flag so as to unify output between the
+ 	two cases.
+ 
+ 2019-08-13  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/g-comlin.adb (Getopt): Quote unrecognized switch in
+ 	Invalid_Switch exception message.
+ 
+ 2019-08-13  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_util.adb (Traverse_More_Func): Take into account
+ 	Loop_Actions inside N_Iterated_Component_Association nodes.
+ 	* sinfo.ads: Document correctly Loop_Actions as a field of nodes
+ 	of kind N_Iterated_Component_Association.
+ 
+ 2019-08-13  Claire Dross  <dross@adacore.com>
+ 
+ 	* libgnat/a-cfinve.adb, libgnat/a-cofove.adb (Find_Index,
+ 	Reverse_Find_Index): Use bigger type to avoid range check
+ 	failure at the last loop iteration.
+ 
+ 2019-08-12  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/g-socket.adb (Is_IPv6_Address): Check that no less
+ 	then 2 colons in IPv6 numeric address.
+ 
+ 2019-08-12  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/g-comlin.ads, libgnat/g-comlin.adb (Getopt): Add
+ 	parameter Quiet. Need to do not output error messages to
+ 	console. Invalid_Switch exception generation surrounded by an
+ 	error message.
+ 
+ 2019-08-12  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_ch6.adb (Expand_Actuals. Add_Call_By_Copy_Code): Add code
+ 	to generate proper checks when an actual for an in-out or out
+ 	parameter has a non-null access type.  No constraints are
+ 	applied to an inbound access parameter, but on exit a not-null
+ 	check must be performed if the type of the actual requires it.
+ 
+ 2019-08-12  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_util.adb (Is_Expaned_Priority_Attribute): Check whether
+ 	call comes from a rewritten attribute before comparing name with
+ 	Get_Ceiling run-time subprogram.
+ 
+ 2019-08-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_util.ads (Component_May_Be_Bit_Aligned): Small comment
+ 	tweaks.
+ 	(Possible_Bit_Aligned_Component): Likewise.
+ 	(Type_May_Have_Bit_Aligned_Components): Likewise.
+ 	* exp_util.adb (Component_May_Be_Bit_Aligned): Likewise.
+ 	(Possible_Bit_Aligned_Component): Likewise.
+ 	(Type_May_Have_Bit_Aligned_Components): Likewise.
+ 
+ 2019-08-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_Op_Eq): Expand the array equality if
+ 	either operand is a possibly unaligned slice.
+ 	* exp_ch6.adb (Expand_Simple_Function_Return): Do not generate a
+ 	copy for a possibly unaligned object if it is represented as a
+ 	scalar.
+ 	* exp_util.adb (Is_Possibly_Unaligned_Slice): Do not always
+ 	return false if the target doesn't have strict alignment.
+ 
+ 2019-08-12  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_ch12.adb (Instantiate_Package_Body): Remove suppression of
+ 	checks in instances of internal units.
+ 	* sem_ch6.adb (Analyze_Function_Return): Do not generate a
+ 	constraint check on an extended_return_statement if the subtype
+ 	of the return object in the statement is identical to the return
+ 	subtype of the function.
+ 
+ 2019-08-12  Bob Duff  <duff@adacore.com>
+ 
+ 	* libgnat/a-cbmutr.adb (Is_Reachable): Declare Idx to be of the
+ 	base subtype.  Clearly it makes no sense to loop "while Idx >=
+ 	0", if Idx is of a nonnegative subtype.
+ 
+ 2019-08-12  Bob Duff  <duff@adacore.com>
+ 
+ 	* libgnat/a-tifiio.adb (Put_Scaled): Prevent AA from being
+ 	negative, since Field is range 0 .. something.
+ 
+ 2019-08-12  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_ugn/gnat_utility_programs.rst (gnatmetric, gnatpp,
+ 	gnatstub): Remove documentation for Ada language version
+ 	switches, and note that they are no longer needed.
+ 
+ 2019-08-12  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* sem_ch5.adb (Prepare_Param_Spec_Loop): Set the parents of the
+ 	copied low and high bounds in the case where the loop range is
+ 	given by a discrete_subtype_indication, to prevent hanging (or
+ 	Assert_Failure) in Insert_Actions.
+ 
+ 2019-08-12  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch6.adb (heck_Untagged_Equality): Verify that user-defined
+ 	equality has the same profile as the predefined equality before
+ 	applying legality rule in RM 4.5.2 (9.8).
+ 
+ 2019-08-12  Bob Duff  <duff@adacore.com>
+ 
+ 	* libgnat/a-except.ads: Update obsolete comment, still making
+ 	clear that this is a variant.  Add explicit default for Id
+ 	component of Exception_Occurrence, because that value is used.
+ 	Define Null_Occurrence less redundantly.
+ 	* libgnat/a-einuoc.adb: Minor simplification of code.
+ 
+ 2019-08-12  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* libgnat/a-dhfina.adb, libgnat/a-dhfina.ads (Is_Simple_Name,
+ 	Is_Root_Directory, Is_Parent_Directory,
+ 	Is_Current_Directory_Name, Is_Relative_Name, Initial_Directory,
+ 	Relative_Name, Compose): Add implementation and documentation.
+ 	* libgnat/a-direct.adb (Containing_Directory): Modify routine to
+ 	use routines from Ada.Directories.Hierarchical_File_Names and
+ 	remove incorrect special case for parent directories.
+ 	(Fetch_Next_Entry): Add check for current directory and parent
+ 	directory and ignore them under certain circumstances.
+ 	(Simple_Nmae): Add check for null result from
+ 	Simple_Name_Internal and raise Name_Error.
+ 	(Simple_Name_Internal): Add explicit check for root directories,
+ 	sanitize trailing directory separators, and modify behavior so
+ 	that current and parent directories are considered valid
+ 	results.
+ 	* Makefile.rtl: Add entry to GNATRTL_NONTASKING_OBJS.
+ 
+ 2019-08-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* freeze.adb (Freeze_Entity): Give the same error for an
+ 	Object_Size clause on a variable-sized type as for a Size
+ 	clause.
+ 
+ 2019-08-12  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* sem_prag.adb (Analyze_Pragma, Pragma_Suppress_Initialization):
+ 	For private types, set the Suppress_Initialization flag on the
+ 	Full_View of the entity rather than the entity's base type.
+ 
+ 2019-08-12  Yannick Moy  <moy@adacore.com>
+ 
+ 	* aspects.adb, aspects.ads (Aspect_No_Caching): New aspect.
+ 	* contracts.adb, contracts.ads (Add_Contract_Item): Add handling
+ 	of No_Caching.
+ 	(Analyze_Object_Contract): Add handling of No_Caching.
+ 	* einfo.adb, einfo.ads
+ 	(Get_Pragma): Add handling of No_Caching.
+ 	* doc/gnat_rm/implementation_defined_aspects.rst,
+ 	doc/gnat_rm/implementation_defined_pragmas.rst: Document new
+ 	aspect/pragma.
+ 	* gnat_rm.texi: Regenerate.
+ 	* par-prag.adb (Prag): New pragma Pragma_No_Caching.
+ 	* sem_ch13.adb (Analyze_Aspect_Specifications,
+ 	Check_Aspect_At_Freeze_Point): Add handling of No_Caching.
+ 	* sem_prag.adb (Analyze_Pragma): Deal with pragma No_Caching.
+ 	* sem_prag.ads (Analyze_External_Property_In_Decl_Part): Now
+ 	applies to No_Caching.
+ 	* sem_util.adb, sem_util.ads (Is_Effectively_Volatile): Add
+ 	handling of No_Caching.
+ 	(No_Caching_Enabled): New query function.
+ 	* snames.ads-tmpl: New names for pragma.
+ 
+ 2019-08-12  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_util.adb, sem_util.ads (Traverse_More_Func,
+ 	Traverse_More_Proc): Add formal parameter for Itypes traversal.
+ 
+ 2019-08-12  Yannick Moy  <moy@adacore.com>
+ 
+ 	* exp_attr.adb, exp_attr.ads (Expand_Size_Attribute): New
+ 	procedure to share part of the attribute expansion with
+ 	GNATprove mode.
+ 	(Expand_N_Attribute_Reference): Extract part of the
+ 	Size/Object_Size expansion in the new procedure
+ 	Expand_Size_Attribute.
+ 	* exp_spark.adb (Expand_SPARK_N_Attribute_Reference): Expand
+ 	Size/Object_Size attributes using the new procedure
+ 	Expand_Size_Attribute.
+ 
+ 2019-08-12  Yannick Moy  <moy@adacore.com>
+ 
+ 	* exp_spark.adb (Expand_SPARK_N_Attribute_Reference): Only
+ 	expand Enum_Rep attribute when its parameter is a literal.
+ 
+ 2019-08-12  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* sem_eval.adb (Check_Non_Static_Context): Add a condition to
+ 	determine if a range violation constitues a warning or an error.
+ 	(Out_Of_Range): Add a condition to determine if a range
+ 	violation constitues a warning or an error.
+ 
+ 2019-08-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch4.adb (Real_Range_Check): Do not rewrite the conversion
+ 	node but its expression instead, after having fetched its
+ 	current value.  Clear the Do_Range_Check flag on entry.  Return
+ 	early for a rewritten float-to-float conversion.  Remove
+ 	redundant local variable.  Suppress all checks when inserting
+ 	the temporary and do not reanalyze the node.
+ 
+ 2019-08-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sprint.ads: Minor comment tweak.
+ 
+ 2019-08-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* checks.adb (Insert_Valid_Check): Do not retrieve the
+ 	Do_Range_Check flag from the Original_Node but from the
+ 	Validated_Object.  Remove useless bypass for floating-point
+ 	types.
+ 
+ 2019-08-12  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_util.adb, sem_util.ads (Traverse_More_Func,
+ 	Traverse_More_Proc): New traversal subprograms.
+ 
+ 2019-08-12  Jerome Lambourg  <lambourg@adacore.com>
+ 
+ 	* libgnarl/s-taprop__vxworks.adb (Abort_Handler): Only call
+ 	s-tpopsp.Self when actually needed.
+ 
+ 2019-08-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch4.adb (Discrete_Range_Check): Return if checks are
+ 	suppressed.
+ 
+ 2019-08-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_res.adb: Add with & use clause for Sem_Mech and
+ 	alphabetize.
+ 	(Resolve_Actuals): Do not apply a scalar range check for the
+ 	source of a conversion whose result is passed by reference to a
+ 	valued procedure.
+ 
+ 2019-08-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* checks.adb (Insert_Valid_Check): Reset the Do_Range_Check flag
+ 	on the validated object.
+ 	* exp_ch6.adb (Add_Call_By_Copy_Code): Reset the Do_Range_Check
+ 	flag on the actual here, as well as on the Expression if the
+ 	actual is a N_Type_Conversion node.
+ 	(Add_Validation_Call_By_Copy_Code): Generate the incoming range
+ 	check if needed and reset the Do_Range_Check flag on the
+ 	Expression if the actual is a N_Type_Conversion node.
+ 	(Expand_Actuals): Do not reset the Do_Range_Check flag here.
+ 	Generate the incoming range check for In parameters here instead
+ 	of...
+ 	(Expand_Call_Helper): ...here.  Remove redudant condition.
+ 	* sem_res.adb (Resolve_Actuals): Use local variable A_Typ and
+ 	remove obsolete comments.
+ 	(Resolve_Type_Conversion): Do not force the Do_Range_Check flag
+ 	on the operand if range checks are suppressed.
+ 
+ 2019-08-12  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* checks.adb (Activate_Range_Check): Remove redundant argument.
+ 	(Generate_Range_Check): Likewise.
+ 	(Apply_Float_Conversion_Check): Reset the Do_Range_Check flag on
+ 	entry and remove redundant condition.
+ 
+ 2019-08-02  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	* libgnat/a-exexpr.adb (Begin_Handler_v1, End_Handler_v1): New.
+ 	(Claimed_Cleanup): New.
+ 	(Begin_Handler, End_Handler): Document.
+ 	* gcc-interface/trans.c (gigi): Switch to exception handler
+ 	ABI #1.
+ 	(Exception_Handler_to_gnu_gcc): Save the original cleanup
+ 	returned by begin handler, pass it to end handler, and use
+ 	EH_ELSE_EXPR to pass a propagating exception to end handler.
+ 	(gnat_to_gnu): Leave the exception pointer alone for reraise.
+ 	(add_cleanup): Handle EH_ELSE_EXPR, require it by itself.
+ 
+ 2019-07-23  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch13.adb (Check_Aspect_At_End_Of_Declarations,
+ 	Freeze_Entity_Checks): Include Aspect_CPU with other aspects
+ 	whose expresssion may depend on a discriminant, and thus require
+ 	that components of the type be made visible.
+ 
+ 2019-07-23  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* checks.adb (Convert_And_Check_Range): Add Suppress parameter
+ 	and pass it in the call to Insert_Actions.  Rename local
+ 	variable.
+ 	(Generate_Range_Check): Minor comment fixes.  Pass Range_Check
+ 	in the first call to Convert_And_Check_Range and All_Checks in
+ 	the second call.
+ 	* exp_ch4.adb (Expand_N_Type_Conversion): Reset the
+ 	Do_Overflow_Check flag in the float-to-float case too if there
+ 	is also a range check.
+ 
+ 2019-07-23  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* checks.adb (Activate_Overflow_Check): Remove redundant
+ 	argument.
+ 	* exp_ch4.adb (Discrete_Range_Check): Reset the overflow flag.
+ 	(Expand_N_Type_Conversion): Do not reset it here.
+ 
+ 2019-07-23  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* repinfo.adb (List_Component_Layout): Pass Decimal to UI_Write.
+ 	(Write_Val): Likewise.
+ 
+ 2019-07-23  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* aspects.ads: New table Operational_Aspect, used to distinguish
+ 	between aspects that are view-specific, such as those related to
+ 	iterators, and representation aspects that apply to all views of
+ 	a type.
+ 	* aspects.adb (Find_Aspect): If the aspect being sought is
+ 	operational, do not ecamine the full view of a private type to
+ 	retrieve it.
+ 	* sem_ch5.adb (Analyze_Iterator_Specification): Improve error
+ 	message when the intended domain of iteration does not implement
+ 	the required iterator aspects.
+ 
+ 2019-07-23  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.ads (Is_Local_Context): New function.
+ 	* sem_spark.adb (Check_Declaration): Issue errors on violations
+ 	of SPARK RM 3.10(4)
+ 	(Process_Path): Do not issue error on borrow/observe during
+ 	elaboration, as these are caught by the new rule.
+ 
+ 2019-07-23  Yannick Moy  <moy@adacore.com>
+ 
+ 	* exp_ch7.adb (Create_Finalizer): Force finalizer not to be
+ 	Ghost enabled.
+ 	* exp_dbug.adb (Get_External_Name): Explain special case of
+ 	Ghost finalizer.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* repinfo.adb (List_Entities): Also list compiled-generated
+ 	types present as Etype of objects.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sinfo.ads: Update the documentation about the
+ 	Do_Division_Check, Do_Overflow_Check and Do_Range_Check flags.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_Type_Conversion): Beef up comment.
+ 	(Fixup_Universal_Fixed_Operation): Set the base type instead of
+ 	the type of the enclosing type conversion on the operation.
+ 
+ 2019-07-22  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_In): Do not suggest the use of attribute
+ 	'Valid as a replacement for a range check on a discrete type
+ 	when the bounds of the range are given by type conversions,
+ 	because in such a case there are distinct types involved and the
+ 	subbested attribute replacement would be misplaced.
+ 
+ 2019-07-22  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb (Get_Root_Object, Is_Path_Expression,
+ 	Is_Subpath_Expression): Add parameter Is_Traversal to adapt
+ 	these functions to the case of paths returned from a traversal
+ 	function.
+ 	(Read_Indexes): Handle the case of an if-expression or
+ 	case-expression.
+ 	(Check_Statement): Check Emit_Messages only when issuing an
+ 	error message. This is important as Emit_Messages may store the
+ 	information that an error was detected.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* checks.adb (Apply_Type_Conversion_Checks): Do not set
+ 	Do_Range_Check flag on conversions from fixed-point types
+ 	either.
+ 	* exp_attr.adb: Add use and with clause for Expander.
+ 	(Expand_N_Attribute_Reference) <Fixed_Value, Integer_Value>: Set
+ 	the Conversion_OK flag and do not generate overflow/range checks
+ 	manually.
+ 	* exp_ch4.adb (Expand_N_Qualified_Expression): Remove
+ 	superfluous clearing of Do_Range_Check flag.
+ 	(Discrete_Range_Check): New procedure to generate a range check
+ 	for discrete types.
+ 	(Real_Range_Check): Remove redundant local variable and adjust.
+ 	Remove useless shortcut.  Clear Do_Range_Check flag on all
+ 	paths.
+ 	(Expand_N_Type_Conversion): Remove redundant test on
+ 	Conversion_OK.  Call Discrete_Range_Check to generate range
+ 	checks on discrete types.  Remove obsolete code for
+ 	float-to-integer conversions.  Add code to generate range checks
+ 	for conversions involving fixed-point types.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sprint.ads: Fix pasto in comment.
+ 
+ 2019-07-22  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Actuals): Replace code that displaces the
+ 	pointer to an allocated object to reference its secondary
+ 	dispatch table by a type conversion (which takes care of
+ 	handling all cases).
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sprint.adb (Sprint_Node_Actual)
+ 	<N_Decimal_Fixed_Point_Definition>: Swap a couple of spaces.
+ 	(Write_Itype): Minor consistency fixes throughout.  Add support
+ 	for printing ordinary and decimal fixed-point types and
+ 	subtypes.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_attr.adb (Expand_Loop_Entry_Attribute): Beef up comment.
+ 
+ 2019-07-22  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* libgnat/s-valboo.ads, libgnat/s-valcha.ads,
+ 	libgnat/s-valdec.ads, libgnat/s-valenu.ads,
+ 	libgnat/s-valint.ads, libgnat/s-vallld.ads,
+ 	libgnat/s-vallli.ads, libgnat/s-valllu.ads,
+ 	libgnat/s-valrea.ads, libgnat/s-valuns.ads,
+ 	libgnat/s-valwch.ads: Change categorization of packages that
+ 	implement attribute 'Value from Pure to Preelaborate, to prevent
+ 	undesirable optimizations when the evaluation of the attribute
+ 	raises Constraint_Error, but subsequent use of the result of
+ 	this evsaluation is removed by a subsequent optimization.
+ 
+ 2019-07-22  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_warn.adb (Check_References): Do not emit s warning on a
+ 	referenced entity with no explicit assignment if the type of the
+ 	entity has Preelaborable_Initialixation, such as
+ 	Exception_Occurrence.
+ 
+ 2019-07-22  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_ch4.adb (Size_In_Storage_Elements): Improve the expansion
+ 	to handle array indexes that are modular type.
+ 	(Expand_N_Allocator): For 32-bit targets improve the generation
+ 	of the runtime check associated with large arrays supporting
+ 	arrays initialized with a qualified expression.
+ 	* libgnat/s-imenne.adb (Image_Enumeration_8,
+ 	Image_Enumeration_16, Image_Enumeration_32): Define the index of
+ 	Index_Table with range Natural'First .. Names'Length since in
+ 	the worst case all the literals of the enumeration type would be
+ 	single letter literals and the Table built by the frontend would
+ 	have as many components as the length of the names string. As a
+ 	result of this enhancement, the internal tables declared using
+ 	Index_Table have a length closer to the real needs, thus
+ 	avoiding the declaration of large arrays on 32-bit CCG targets.
+ 
+ 2019-07-22  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_ch3.adb (Constrain_Access): Issue a message about ignored
+ 	constraint.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch8.adb (End_Use_Type): Reset the In_Use flag on the
+ 	class-wide type if the type is tagged.
+ 	(Use_One_Type): Add commentary on the handling of the class-wide
+ 	type.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* einfo.ads (Is_For_Access_Subtype): Delete.
+ 	(Set_Is_For_Access_Subtype): Likewise.
+ 	* einfo.adb (Is_For_Access_Subtype): Likewise.
+ 	(Set_Is_For_Access_Subtype): Likewise.
+ 	(Write_Entity_Flags): Do not write Is_For_Access_Subtype.
+ 	* exp_ch4.adb (Expand_N_Selected_Component): Do not deal with
+ 	it.
+ 	* exp_spark.adb (Expand_SPARK_N_Selected_Component): Likewise.
+ 	* sem_ch4.adb (Analyze_Explicit_Dereference): Likewise.
+ 	* sem_ch3.adb (Build_Discriminated_Subtype): Do not build a
+ 	special private subtype for access-to-record subtypes.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch3.adb (Complete_Private_Subtype): Rework the setting of
+ 	the Etype of the full view for full base types that cannot
+ 	contain any discriminant.  Remove code and comment about it in
+ 	the main path.
+ 
+ 2019-07-22  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch3.adb (Convert_Bound): Subsidiary of
+ 	Floating_Point_Type_Declaration, to handle properly range
+ 	specifications with bounds that may include static constants of
+ 	a given type rather than real literals.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_aggr.adb (Rewrite_Bound): Be prepared for discriminals
+ 	too.
+ 	(Rewrite_Range;): Minor tweak.
+ 	(Resolve_Record_Aggregate): For a component with default
+ 	initialization whose expression is an array aggregate, also
+ 	rewrite the bounds of the component associations, if any.
+ 
+ 2019-07-22  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* exp_ch5.adb (Expand_N_Case_Statement): In the case where a
+ 	case statement is rewritten as an equivalent if statement,
+ 	inherit the From_Condition_Expression flag from the case
+ 	statement.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch8.adb (Check_Constrained_Object): Further extend the
+ 	special optimization to all limited types.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_attr.adb (Expand_N_Attribute_Reference)
+ 	<Attribute_Enum_Val>: Set No_Truncation on the
+ 	N_Unchecked_Type_Conversion built around the argument passed to
+ 	the attribute.
+ 
+ 2019-07-22  Nicolas Roche  <roche@adacore.com>
+ 
+ 	* libgnat/s-valrea.adb (Scan_Real): Ignore non significative
+ 	digits to avoid converging to infinity in some cases.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* libgnat/g-encstr.adb (Encode_Wide_String): Fix oversight.
+ 	(Encode_Wide_Wide_String): Likewise.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_warn.adb (Find_Var): Bail out for a function call with an
+ 	Out or In/Out parameter.
+ 
+ 2019-07-22  Nicolas Roche  <roche@adacore.com>
+ 
+ 	* terminals.c (__gnat_tty_waitpid): Support both blocking and
+ 	not blocking mode.
+ 	* libgnat/g-exptty.ads (Is_Process_Running): New function.
+ 	* libgnat/g-exptty.adb (Close): Don't try to interrupt/terminate
+ 	a process if it is already dead.
+ 
+ 2019-07-22  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* freeze.adb (Freeze_Fixed_Point_Type): When freezing a
+ 	fixed-point subtype, check whether the parent type declarastion
+ 	includes an aspect specification for the 'Small type attribute,
+ 	and inherit the specified value.
+ 
+ 2019-07-22  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* freeze.adb (Freeze_Subprogram): Check that C++ constructors
+ 	must have external or link name.
+ 
+ 2019-07-22  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Selected_Component): If the prefix has a
+ 	deferred reference, generate the correct reference now, to
+ 	indicate that the previous assignment is used.  This prevents
+ 	spurious warnings on useless assignments when compiling with all
+ 	warnings enabled. when there is a subsequent call in the same
+ 	stqtement list, in which the prefix of the selected component is
+ 	the actual for an out parameter.
+ 
+ 2019-07-22  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_attr.adb (Expand_Loop_Entry_Attribute): Copy the condition
+ 	of a while loop instead of simply relocating it.
+ 
+ 2019-07-18  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* Makefile.rtl, expect.c, env.c, aux-io.c, mkdir.c, initialize.c,
+ 	cstreams.c, raise.c, tracebak.c, adadecode.c, init.c, raise-gcc.c,
+ 	argv.c, adaint.c, adaint.h, ctrl_c.c, sysdep.c, rtinit.c, cio.c,
+ 	seh_init.c, exit.c, targext.c: Introduce a "STANDALONE" mode where C
+ 	runtime files do not have any dependency on GCC include files.
+ 	Remove unnecessary includes.
+ 	Remove remaining references to VMS in runtime C file.
+ 	* runtime.h: new File.
+ 
+ 2019-07-13  Andreas Schwab  <schwab@linux-m68k.org>
+ 
+ 	* Makefile.rtl: Use g-sercom__linux.adb for all linuxes.
+ 
+ 2019-07-11  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* lib-writ.adb (Ensure_System_Dependency,
+ 	Up_To_Date_ALI_File_Exists, Write_ALI): Replace low-level access
+ 	to table with a high-level query.
+ 
+ 2019-07-11  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* checks.adb: Fix typo in comment.
+ 	* sem.adb (Semantics): Avoid repeated calls to
+ 	In_Extended_Main_Source_Unit by reusing an already-cached
+ 	result.
+ 	* sem_util.adb (First_Global): Fix style.
+ 
+ 2019-07-11  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Call): Do not perform dimensionality
+ 	checking on inlined bodies.
+ 
+ 2019-07-11  Yannick Moy  <moy@adacore.com>
+ 
+ 	* debug.adb: Flip meaning of debug switch -gnatdF.
+ 
+ 2019-07-11  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_eval.adb (Is_Same_Value): Add special case for rewritten
+ 	Loop_Entry attribute.
+ 
+ 2019-07-11  Claire Dross  <dross@adacore.com>
+ 
+ 	* gnat1drv.adb: SPARK checking rules for pointer aliasing are
+ 	moved to GNATprove backend.
+ 	* sem_spark.ads, sem_spark.adb (Sem_SPARK): Is now a generic
+ 	unit. Takes as parameters:
+ 	 - Retysp which is used to query the most underlying type
+ 	   visible in SPARK. We do not introduce aliasing checks for
+ 	   types which are not visibly deep.
+ 	 - Component_Is_Visible_In_SPARK is used to avoid doing pointer
+ 	   aliasing checks on components which are not visible in SPARK.
+ 	 - Emit_Messages returns True in the second phase of SPARK
+ 	   analysis. Error messages for failed aliasing checks are only
+ 	   output in this case.
+ 	Additionally, errors on constructs not supported in SPARK are
+ 	removed as duplicates of marking errors. Components are stored
+ 	in the permission map using their original component to avoid
+ 	inconsistencies between components of different views of the
+ 	same type.
+ 	(Check_Expression): Handle delta constraints.
+ 	(Is_Deep): Exported so that we can check for SPARK restrictions
+ 	on deep types inside SPARK semantic checkings.
+ 	(Is_Traversal_Function): Exported so that we can check for SPARK
+ 	restrictions on traversal functions inside SPARK semantic
+ 	checkings.
+ 	(Check_Call_Statement, Read_Indexes): Check wether we are
+ 	dealing with a subprogram pointer type before querying called
+ 	entity.
+ 	(Is_Subpath_Expression): Image attribute can appear inside a
+ 	path.
+ 	(Check_Loop_Statement): Correct order of statements in the loop.
+ 	(Check_Node): Ignore raise nodes.
+ 	(Check_Statement): Use Last_Non_Pragma to get the object
+ 	declaration in an extended return statement.
+ 
+ 2019-07-11  Patrick Bernardi  <bernardi@adacore.com>
+ 
+ 	* bindgen.adb (Gen_Main): Do not generate a reference to
+ 	Ada_Main_Program_Name when the Minimal_Binder flag is set.
+ 	(Gen_Output_File_Ada): Do not output GNAT_Version and
+ 	Ada_Main_Program_Name info if Minimal_Binder flag is set.
+ 	* bindusg.adb: Add documentation for new -minimal switch.
+ 	* gnatbind.adb (Scan_Bind_Arg): Scan -minimal switch.
+ 	* opt.ads: Add new global flag Minimal_Binder to indicate if the
+ 	binder should not produce global variables.
+ 	* doc/gnat_ugn/building_executable_programs_with_gnat.rst:
+ 	Update documentation with new binder -minimal switch.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-07-11  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* Makefile.rtl: Add warning note about compilation flags and
+ 	capitalize.
+ 
+ 2019-07-11  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_ch9.adb (Expand_N_Protected_Type_Declaaration): New
+ 	subsidiary routine Replace_Access_Definition, to handle properly
+ 	a protected type PT one of whose private components is of type
+ 	access PT.
+ 
+ 2019-07-11  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/g-socket.ads (Level_Type): Add enumerators for
+ 	IP_Protocol_For_ICMP, IP_Protocol_For_IGMP,
+ 	IP_Protocol_For_RAW_Level.
+ 	* libgnat/g-socket.adb (Levels): Handle them.
+ 	* s-oscons-tmplt.c: Import socket protocols defined in
+ 	netinet/in.h.
+ 
+ 2019-07-11  Claire Dross  <dross@adacore.com>
+ 
+ 	* libgnat/a-cfhama.adb, libgnat/a-cfhase.adb (Free): Do not
+ 	reset the Has_Element flag if no element is freed.
+ 
+ 2019-07-11  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* errno.c: Remove obsolete support for MaRTE OS.
+ 
+ 2019-07-11  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_Type_Conversion): If a predicate check
+ 	is generated, analyze it with range check suppressed, because
+ 	that check has been previously applied.
+ 	* exp_ch5.adb (Expand_N_Assignment_Statement): If the RHS is a
+ 	type conversion to the type of the LHS, do not apply a predicate
+ 	check to the RHS because it will have been generated already
+ 	during its expansion.
+ 	* exp_ch6.adb (Can_Fold_Predicate_Call): Extend processing to
+ 	handle a predicate check on a constant entity whose value is
+ 	static.
+ 
+ 2019-07-11  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* bindo.adb: Remove the documentation of switch -d_N because it
+ 	is no longer in use.
+ 	* bindo-graphs.ads, bindo-graphs.adb (Is_Spec_Before_Body_Edge):
+ 	New routine.
+ 	* bindo-writers.adb (Write_Dependency_Edge): Add the missing
+ 	case of a spec-before-body edge.
+ 
+ 2019-07-11  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/g-socket.ads (Mode_Type): Add a Socket_Raw enumerator.
+ 	* libgnat/g-socket.adb (Modes): Handle Socket_Raw.
+ 
+ 2019-07-11  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* exp_ch9.adb (Build_Private_Protected_Declaration): Add
+ 	exception for the moving of pragmas to internally generated
+ 	specs for pragma Unreferenced.
+ 
+ 2019-07-11  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_ugn/gnat_utility_programs.rst: Fix inconsistent
+ 	documentation for gnatmetric.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-07-11  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_ugn/gnat_utility_programs.rst: Document gnatpp's
+ 	--spaces-only switch.
+ 
+ 2019-07-11  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* sem_util.adb (Null_Status): Assume that an erroneous construct
+ 	has an undefined null status.
+ 
+ 2019-07-11  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* checks.adb, exp_ch6.adb, gnat1drv.adb, sem_aux.adb,
+ 	sem_ch2.adb, sem_ch8.adb, sem_res.adb: Minor reformatting.
+ 
+ 2019-07-11  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* sem_ch8.adb (Analyze_Object_Renaming): Obtain the object being
+ 	renamed using routine Get_Object_Name which takes care of
+ 	various name forms.
+ 	(Get_Object_Name): New routine.
+ 
+ 2019-07-11  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_ch6.adb (Can_Fold_Predicate_Call): New function,
+ 	subsidiary of Expand_Call_Helper, to compute statically a
+ 	predicate check when the argument is a static integer.
+ 
+ 2019-07-11  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Op_Not): Do not rewrite an equality
+ 	operator into a function call when the operator is intrinsic.
+ 
+ 2019-07-11  Thomas Quinot  <quinot@adacore.com>
+ 
+ 	* sem_prag.adb (Analyze_Pragma, case pragma Check): Do not call
+ 	Set_SCO_Pragma_Enabled for the dynamic predicate case.
+ 
+ 2019-07-11  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* exp_util.ads, exp_util.adb (Needs_Finalization): Move to
+ 	Sem_Util.
+ 	* sem_ch9.adb (Analyze_Protected_Definition): Code cleanup. Mark
+ 	the protected type as having controlled components when it
+ 	contains at least one such component.
+ 	* sem_util.ads, sem_util.adb (Needs_Finalization): New
+ 	function.
+ 
+ 2019-07-11  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* alloc.ads (Rep_JSON_Table_Initial): New constant.
+ 	(Rep_JSON_Table_Increment): Likewise.
+ 	* debug.adb: Document -gnatd_j switch.
+ 	* gcc-interface/Make-lang.in (GNAT_ADA_OBJS): Add
+ 	repinfo-input.o.
+ 	* gnat1drv.adb: Add with clause for Repinfo.Input.
+ 	Add with and use clauses for Sinput.
+ 	(Read_JSON_Files_For_Repinfo): New procedure.
+ 	(Gnat1drv1): Deal with -gnatd_j switch.
+ 	* repinfo-input.ad[sb]: New unit.
+ 	* snames.ads-tmpl (Name_Discriminant): New constant.
+ 	(Name_Operands): Likewise.
+ 
+ 2019-07-11  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* checks.adb (Apply_Accessibility_Check): Add check for constant
+ 	folded conditions on accessibility checks.
+ 
+ 2019-07-11  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* libgnarl/g-thread.ads, libgnarl/g-thread.adb (Get_Thread):
+ 	Update comments. Add new version taking a Task_Id.
+ 
+ 2019-07-11  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* bindo.adb: Update the section of switches and debugging
+ 	elaboration issues.
+ 	* bindo.ads: Add type Elaboration_Phase.
+ 	* bindo-augmentors.adb: Add use clause for
+ 	Bindo.Writers.Phase_Writers.
+ 	(Augment_Library_Graph): Signal the start and end of the
+ 	aubmentation phase.
+ 	* bindo-builders.adb: Add with and use clause for Bindo.Writers.
+ 	Add use clause for Bindo.Writers.Phase_Writers.
+ 	(Build_Invocation_Graph): Signal the start and end of the
+ 	invocation graph construction phase.
+ 	(Build_Library_Graph): Signal the start and end of the library
+ 	graph construction phase.
+ 	* bindo-diagnostics.adb: Add use clause for
+ 	Bindo.Writers.Phase_Writers.
+ 	(Diagnose_Cycle): Signal the start and end of the cycle
+ 	diagnostic phase.
+ 	* bindo-elaborators.adb: Add use clause for
+ 	Bindo.Writers.Phase_Writers.
+ 	(Elaborate_Units): Signal the start and end of the unit
+ 	elaboration phase.
+ 	* bindo-graphs.adb: Add use clause for
+ 	Bindo.Writers.Phase_Writers.
+ 	(Find_Components): Signal the start and end of the component
+ 	discovery phase.
+ 	(Find_Cycles): Signal the start and end of the cycle discovery
+ 	phase.
+ 	* bindo-units.adb: Add with and use clause for Bindo.Writers.
+ 	Add use clause for Bindo.Writers.Phase_Writers.
+ 	(Collect_Elaborable_Units): Signal the start and end of the unit
+ 	collection phase.
+ 	* bindo-validators.adb: Add with and use clause for
+ 	Bindo.Writers.  Add use clause for Bindo.Writers.Phase_Writers.
+ 	(Validate_Cycles, Validate_Elaboration_Order,
+ 	Validate_Invocation_Graph, Validate_Library_Graph): Signal the
+ 	start and end of the libray graph validation phase.
+ 	* bindo-writers.ads, bindo-writers.adb: Add new nested package
+ 	Phase_Writers.
+ 	* debug.adb: Update the documentation of switch d_S.
+ 
+ 2019-07-11  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_res.adb (Check_Argument_Order): Special case calls to
+ 	operators.
+ 
+ 2019-07-10  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/s-ststop.adb: Remove System.Strings.Stream_Ops
+ 	dependence on System.Streams.Stream_IO.
+ 
+ 2019-07-10  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch2.adb (Analyze_Integer_Literal): Preserve the type of
+ 	the literal if prior analysis determined that its type is a
+ 	modular integer type.
+ 
+ 2019-07-10  Doug Rupp  <rupp@adacore.com>
+ 
+ 	* init.c: Do not attempt to re-arm guard page on x86_64-vx7(r2).
+ 
+ 2019-07-10  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch8.adb (Check_Constrained_Object): A record that is
+ 	limited because of the presence of a limited component is
+ 	constrained, and no subtype indiciation needs to be created for
+ 	it, just as is the case for declared limited records.
+ 
+ 2019-07-10  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_aux.adb, sem_aux.ads (Is_Protected_Operation): New
+ 	function to determine if a subprogram is protected.
+ 	* sem_spark.adb (Setup_Protected_Components): New procedure to
+ 	add protected components to the environment.
+ 	(Check_Callable_Body): Call the new Setup_Protected_Components.
+ 	(Check_Package_Spec): Merge local environment with enclosing one
+ 	when done.
+ 
+ 2019-07-10  Claire Dross  <dross@adacore.com>
+ 
+ 	* sem_spark.adb (Check_Expression): Allow digits constraints as
+ 	input.
+ 	(Illegal_Global_Usage): Pass in the entity.
+ 	(Is_Subpath_Expression): New function to allow different nodes
+ 	as inner parts of a path expression.
+ 	(Read_Indexes): Allow concatenation and aggregates with box
+ 	expressions.  Allow attributes Update and Loop_Entry.
+ 	(Check_Expression): Allow richer membership test.
+ 	(Check_Node): Ignore bodies of generics.
+ 	(Get_Root_Object): Allow concatenation and attributes.
+ 
+ 2019-07-10  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* sem_ch6.adb (Check_Discriminant_Conformance): Use Find_Type to
+ 	discover the type of a full view discriminant.
+ 
+ 2019-07-10  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* doc/gnat_ugn/gnat_and_program_execution.rst: Improve gnatmem's
+ 	doc for the depth switch.
+ 
+ 2019-07-10  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_ugn/gnat_utility_programs.rst: Document gnatpp's
+ 	--source-line-breaks switch.
+ 
+ 2019-07-10  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_attributes.rst: Add mention
+ 	of 'Image attribute with 'Img's entry to mention additional
+ 	added 2012 usage of Obj'Image.
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst: Correct
+ 	mispelling of Async_Writers.
+ 	* gnat_rm.texi: Regenerate.
+ 	* sem_prag.adb (Analyze_Pragma): Correct mispelling of
+ 	Async_Writers.
+ 	* sem_util.adb (State_Has_Enabled_Property): Correct mispelling
+ 	of Async_Writers.
+ 
+ 2019-07-10  Simon Buist  <buist@adacore.com>
+ 
+ 	* sem_util.ads (Child_Prefix): New constant.
+ 	* sem_util.adb (Unique_Name): Add a special prefix to child
+ 	units that have a nested subprogram or package.
+ 
+ 2019-07-10  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* sfn_scan.adb (Scan_SFN_Pragmas): Add pragma Assert.
+ 
+ 2019-07-10  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* sem_ch3.adb (Check_Nonoverridable_Aspects): Correct the
+ 	spelling in certain error messages.
+ 	(Check_Pragma_Implemented): Correct the spelling in certain
+ 	error messages.
+ 
+ 2019-07-10  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* Makefile.rtl (GNATRTL_NONTASKING_OBJS): Add g-brapre.
+ 	* libgnat/g-brapre.ads: New package specification.
+ 	* doc/gnat_rm/the_gnat_library.rst: Document it.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-07-10  Yannick Moy  <moy@adacore.com>
+ 
+ 	* osint-c.adb (Set_File_Name): Always add extension for multiple
+ 	units per file mode.
+ 
+ 2019-07-10  Corentin Gay  <gay@adacore.com>
+ 
+ 	* sysdep.c: Put include directive for 'vxWorks.h' before any
+ 	other VxWorks headers.
+ 
+ 2019-07-10  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_attributes.rst
+ 	(Scalar_Storage_Order): Minor tweaks.  Add note about debuggers.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-07-10  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_Case_Expression): Mark the generated
+ 	assignments to the temporary result as being OK because the
+ 	expansion of case expressions is correct by construction.
+ 	(Is_Copy_Type): Update the predicate to match the comment
+ 	within.
+ 
+ 2019-07-10  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* bindo-graphs.adb, bindo.adb, debug.adb, exp_ch6.adb,
+ 	sem_ch10.adb, sem_ch13.adb, sem_ch3.adb, sem_ch4.adb,
+ 	sem_ch6.adb, sem_ch7.adb, sem_res.adb, sem_spark.adb,
+ 	sem_util.adb, warnsw.ads: Minor reformatting.
+ 
+ 2019-07-10  Joffrey Huguet  <huguet@adacore.com>
+ 
+ 	* libgnat/a-strbou.ads, libgnat/a-strfix.ads,
+ 	libgnat/a-strunb.ads, libgnat/a-strunb__shared.ads: Add global
+ 	contracts, contract cases, preconditions and postconditions to
+ 	procedures and functions.
+ 
+ 2019-07-10  Doug Rupp  <rupp@adacore.com>
+ 
+ 	* sysdep.c (__gnat_is_file_not_found_error): Reformulate to also
+ 	work for vxworks7r2 SR0610.
+ 
+ 2019-07-10  Doug Rupp  <rupp@adacore.com>
+ 
+ 	* env.c (__gnat_environ): Reformulate to also work for
+ 	vxworks7r2 SR0610.
+ 
+ 2019-07-10  Patrick Bernardi  <bernardi@adacore.com>
+ 
+ 	* Makefile.rtl: Handle vxworks7r2 ppc target
+ 
+ 2019-07-10  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* bindo.adb: Update the section on switches.
+ 	* bindo-graphs.adb
+ 	(Add_Cycle, Add_Vertex_And_Complement): Remove.
+ 	(Create): The graph no longer needs a set of recorded cycles
+ 	because the cycles are not rediscovered in permuted forms.
+ 	(Cycle_End_Vertices): New routine.
+ 	(Destroy): The graph no longer needs a set of recorded cycles
+ 	because the cycles are not rediscovered in permuted forms.
+ 	(Destroy_Library_Graph_Vertex): Move to the library level.
+ 	(Find_All_Cycles_Through_Vertex, Find_All_Cycles_With_Edge):
+ 	Remove.
+ 	(Find_Cycles_From_Successor, Find_Cycles_From_Vertex,
+ 	Find_Cycles_In_Component, Has_Elaborate_All_Edge): New routines.
+ 	(Insert_And_Sort): Remove.
+ 	(Is_Elaborate_Body_Edge): Use predicate
+ 	Is_Vertex_With_Elaborate_Body.
+ 	(Is_Recorded_Cycle): Remove.
+ 	(Is_Vertex_With_Elaborate_Body): New routine.
+ 	(Normalize_And_Add_Cycle): Remove.
+ 	(Precedence): Rename to xxx_Precedence, where xxx relates to the
+ 	input.  These versions better reflect the desired input
+ 	precedence.
+ 	(Record_Cycle): New routine.
+ 	(Remove_Vertex_And_Complement, Set_Is_Recorded_Cycle): Remove.
+ 	(Trace_xxx): Update all versions to use debug switch -d_t.
+ 	(Trace_Component): New routine.
+ 	(Trace_Eol): Removed.
+ 	(Trace_Vertex): Do not output the component as this information
+ 	is already available when the component is traced.
+ 	(Unvisit, Visit): New routine.
+ 	* bindo-graphs.ads: Add new instance LGV_Lists.  Remove instance
+ 	RC_Sets.  Update the structure of type Library_Graph_Attributes
+ 	to remove the set of recorded cycles.
+ 	(Destroy_Library_Graph_Vertex): Move to the library level.
+ 	* bindo-writers.adb (Write_Component_Vertices): Output
+ 	information about the number of vertices.
+ 	* debug.adb: Document the use of binder switch -d_t.  Update the
+ 	use of binder switch -d_T.
+ 
+ 2019-07-10  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb (Get_Root_Object): Replace precondition by error
+ 	message.
+ 	(Read_Indexes): Replace precondition by error message.
+ 	(Check_Callable_Body): Check only traversal function returns an
+ 	anonymous access type.
+ 	(Check_Expression): Issue error on unexpected expression as
+ 	path.
+ 	* sem_util.adb (First_Global): Fix access to global on
+ 	entry/task.
+ 
+ 2019-07-10  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_ch6.adb (Is_Class_Wide_Interface_Type): New subprogram.
+ 	(Expand_Call_Helper): Handle non-limited views when we check if
+ 	any formal is a class-wide interface type.
+ 	* exp_disp.adb (Expand_Interface_Actuals): Handle non-limited
+ 	views when we look for interface type formals to force "this"
+ 	displacement.
+ 
+ 2019-07-10  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Equality_Op): Do not replace the resolved
+ 	operator by its alias if expander is not active, because the
+ 	operand type may not be frozen yet and its inherited operations
+ 	have not yet been created.
+ 
+ 2019-07-10  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* bindo-elaborators.adb (Elaborate_Units): Set attribute
+ 	Elab_Position of all elaborated units.
+ 	(Set_Unit_Elaboration_Positions): New routine.
+ 
+ 2019-07-10  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* exp_util.adb: Reformatting and a typo fix.
+ 
+ 2019-07-10  Yannick Moy  <moy@adacore.com>
+ 
+ 	* exp_util.adb (Remove_Side_Effects): Prefer renamings for
+ 	objects of possible owning type in GNATprove mode.
+ 
+ 2019-07-09  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch3.adb (Analyze_Object_Declaration): If the object type
+ 	is a composite type that has a dynamic predicate and, the
+ 	expression in the declaration is an aggregate, the generated
+ 	predicate check must appear after the expanded code for the
+ 	aggregate, which will appear after the rewritten object
+ 	declarastion.
+ 
+ 2019-07-09  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* sem_eval.adb (Expr_Value_E): Add conditional to correctly
+ 	handle constant enumerated character types.
+ 
+ 2019-07-09  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* libgnarl/s-osinte__mingw.ads (CRITICAL_SECTION): Use proper
+ 	type for SpinCount component.
+ 
+ 2019-07-09  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_Allocator): Add conditional to detect
+ 	the presence of anoymous access type allocators and issue a
+ 	warning if the appropriate warning flag is enabled.
+ 	* warnsw.ads: Add new warning flag for anonymous allocators
+ 	* warnsw.adb (All_Warnings, Restore_Warnings, Save_Warnings,
+ 	Set_Underscore_Warning_Switch): Register new flags.
+ 	(WA_Warnings): Register new flag as an "all warnings" switch
+ 	* usage.adb,
+ 	doc/gnat_ugn/building_executable_programs_with_gnat.rst:
+ 	Document new warning switches -gnatw_a and -gnatw_A.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-07-09  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch4.adb (Diagnose_Call): Improve error recovery when a
+ 	local subprogram name hides a possible candidate name declared
+ 	in a child package in the context of the current unit.
+ 	* sem_ch6.adb (Process_Formals): Protect against malformed
+ 	formal types when the parameter type does not denote an entity.
+ 
+ 2019-07-09  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* bindo-augmentors.adb (Visit_Elaboration_Root): Do not start a
+ 	DFS from an elaboration root whose corresponding unit lacks
+ 	elaboration code. This behavior mimics that of the old
+ 	elaboration order mechanism.
+ 	* bindo-graphs.adb (Find_All_Cycles_Through_Vertex): Move the
+ 	vertex tracing within the functional branches of the routine.
+ 	This prevents spurious trace output.
+ 	(Has_No_Elaboration_Code): New routine.
+ 	(Trace_Cycle, Trace_Edge): Update the various Ids to use the
+ 	"standard" trace format.
+ 	* bindo-graphs.ads (Has_No_Elaboration_Code): New routine.
+ 	* bindo-units.ads, bindo-units.adb (Has_No_Elaboration_Code):
+ 	New routine.
+ 
+ 2019-07-09  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* ali.ads, bindo-graphs.adb, bindo-validators.adb, clean.adb,
+ 	doc/gnat_ugn/elaboration_order_handling_in_gnat.rst, einfo.ads,
+ 	exp_aggr.adb, exp_ch13.adb, exp_ch4.adb, exp_ch5.adb,
+ 	exp_ch6.adb, exp_ch7.adb, exp_ch9.adb, exp_pakd.adb,
+ 	fname-uf.ads, gnatlink.adb, inline.adb, lib.ads, make.adb,
+ 	namet.ads, opt.ads, par-ch4.adb, par-ch6.adb, par-labl.adb,
+ 	prep.adb, sem_aggr.adb, sem_ch13.adb, sem_ch4.adb, sem_ch5.adb,
+ 	sem_ch6.adb, sem_ch6.ads, sem_ch7.adb, sem_ch8.adb, sem_dim.adb,
+ 	sem_disp.adb, sem_prag.adb, sem_res.adb, sem_warn.adb,
+ 	sinfo.ads: Replace ".  " with ". ". Minor reformatting and typo
+ 	corrections.
+ 	* gnat_ugn.texi: Generate.
+ 
+ 2019-07-09  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* bindo.ads: Move type Precedence_Kind from the private to the
+ 	visible part of the unit.
+ 	* bindo-augmentors.adb: Remove the use of global data as it is
+ 	bad practice.
+ 	(Augment_Library_Graph): Update the parameter profile.
+ 	(Is_Visited, Set_Is_Visited): Remove.
+ 	(Visit_Elaboration_Root, Visit_Elaboration_Roots): Update the
+ 	parameter profile and comment on usage.
+ 	(Visit_Vertex): Likewise.  Also keep track of which invocation
+ 	edge activates a task.
+ 	* bindo-augmentors.ads (Augment_Library_Graph): Update the
+ 	parameter profile and comment on usage.
+ 	* bindo-builders.adb (Create_Forced_Edge,
+ 	Create_Spec_And_Body_Edge, Create_With_Edge): Update the call to
+ 	Add_Edge.
+ 	* bindo-diagnostics.adb: Add with end use clauses for Restrict
+ 	and Rident.
+ 	(Output_Dynamic_Model_Suggestions): Remove.
+ 	(Output_Invocation_Related_Suggestions): New routine.
+ 	(Output_Suggestions): Output all invocation-related suggestions
+ 	together.
+ 	* bindo-elaborators.adb: Remove types Comparator_Ptr and
+ 	Predicate_Ptr.
+ 	(Find_Best_Vertex): Update the parameter profile.
+ 	* bindo-graphs.adb (Activates_Task): New routine.
+ 	(Add_Body_Before_Spec_Edge): Update the call to
+ 	Add_Edge_With_Return.
+ 	(Add_Edge): Update the parameter profile and the call to
+ 	Add_Edge_With_Return.
+ 	(Add_Edge_With_Return): Update the parameter profile and comment
+ 	on usage.
+ 	(At_Least_One_Edge_Satisfies): New routine.
+ 	(Contains_Elaborate_All_Edge): Reimplement.
+ 	(Contains_Static_Successor_Edge, Contains_Task_Activation): New
+ 	routine.
+ 	(Contains_Weak_Static_Successor): Remove.
+ 	(Is_Static_Successor_Edge): New routine.
+ 	* bindo-graphs.ads: Add types LGE_Predicate_Ptr,
+ 	LGV_Comparator_Ptr, and LGV_Predicate_Ptr.  Update type
+ 	Library_Graph_Edge_Attributes to capture whether an invocation
+ 	edge activates a task.  Update the value of
+ 	No_Library_Graph_Edge_Attributes.
+ 	(Activates_Task): Update the parameter profile and comment on
+ 	usage.
+ 	(Contains_Static_Successor_Edge, Contains_Task_Activation): New
+ 	routines.
+ 	(Contains_Weak_Static_Successor): Remove.
+ 	* doc/gnat_ugn/elaboration_order_handling_in_gnat.rst:
+ 	Update the documentation to reflect the new task-related advice.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-07-09  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* exp_util.adb (Containing_Package_With_Ext_Axioms): Replace
+ 	low-level Ekind test with a high-level wrapper.
+ 
+ 2019-07-09  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* libgnat/s-memory.adb: Disable calls to Abort defer/undefer
+ 	when ZCX_By_Default.
+ 
+ 2019-07-09  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* sem_ch13.adb (Rep_Item_Too_Early): Representation clauses are
+ 	not allowed for a derivation of a generic type. Extend the
+ 	current test to check that none of the parents is a generic
+ 	type.
+ 
+ 2019-07-09  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* exp_ch9.adb, exp_util.adb, repinfo.adb, sem_ch12.adb,
+ 	sem_prag.adb, sem_res.adb, sem_spark.adb, sem_util.adb: Minor
+ 	reformatting.
+ 
+ 2019-07-09  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Equality_Op): If the node was overloaded,
+ 	set properly the entity to which the node has been resolved. The
+ 	original entity is the first one found during analysis, and is
+ 	not necessarily the resolved one.
+ 	(Resolve_Op_Not): If the argument of negation is an overloaded
+ 	equality operation, call its resolution directly given that the
+ 	context type does not participate in overload resolution.
+ 
+ 2019-07-09  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* bindo.adb: Remove with and use clauses for Debug.  Add with
+ 	and use clauses for Opt.
+ 	(Find_Elaboration_Order): Enable the v4.0 elaboration order. The
+ 	v3.0 mechanism is now available under binder switch -H.
+ 	* bindusg.adb (Display): Enable switch -H.
+ 	* debug.adb: Free compiler switch -gnatd_G.  Free binder switch
+ 	-d_N.
+ 	* sem_elab.adb: Update the section on switches to remove
+ 	-gnatd_G.
+ 	(Invocation_Graph_Recording_OK): The invocation graph is now
+ 	unconditionally recorded in ALI files.
+ 	* switch-b.adb (Scan_Binder_Switches): Scan switch -H.
+ 	* doc/gnat_ugn/building_executable_programs_with_gnat.rst:
+ 	Update the documentation on compiler switches related to
+ 	elaboration.  Update the documentation on binder switches to
+ 	include switch -H.
+ 	* doc/gnat_ugn/elaboration_order_handling_in_gnat.rst: Update
+ 	the documentation on elaboration order handling in GNAT.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-07-09  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* repinfo.adb (List_Entities): Disregard formals altogether.
+ 	(List_Name): Properly escape the double quote in the JSON
+ 	output.
+ 
+ 2019-07-09  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_util.adb (Remove_Side_Effects): Preserve the
+ 	Do_Range_Check flag.
+ 
+ 2019-07-09  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sinfo.ads: Refine comment for Do_Range_Check.
+ 
+ 2019-07-09  Yannick Moy  <moy@adacore.com>
+ 
+ 	* exp_spark.adb (Expand_SPARK_N_Attribute_Reference): Expand
+ 	attribute reference on Enum_Rep.
+ 
+ 2019-07-09  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch12.adb (Instantiate_Formal_Package): Handle properly the
+ 	case where the actual for a formal package in an instance is the
+ 	current instance of an enclosing generic package.
+ 	(Check_Formal_Packages): If the formal package declaration is
+ 	box-initialized or lacks associations altogether, no internal
+ 	instance was created to verify conformance, and there is no
+ 	validating package to remove from tree.
+ 
+ 2019-07-09  Yannick Moy  <moy@adacore.com>
+ 
+ 	* freeze.adb (Build_Renamed_Body): Do not set body to inline in
+ 	GNATprove mode.
+ 
+ 2019-07-09  Yannick Moy  <moy@adacore.com>
+ 
+ 	* exp_util.adb (Expand_Subtype_From_Expr): Still expand the type
+ 	of static expressions in GNATprove_Mode.
+ 	* sem_ch3.adb (Analyze_Object_Declaration): Remove obsolete
+ 	special case for GNATprove_Mode.
+ 
+ 2019-07-09  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* doc/gnat_rm/the_gnat_library.rst,
+ 	doc/gnat_ugn/building_executable_programs_with_gnat.rst,
+ 	erroutc.adb, libgnat/g-comlin.adb, libgnat/g-comlin.ads,
+ 	libgnat/g-regexp.ads, libgnat/g-regpat.ads,
+ 	libgnat/g-spipat.ads, libgnat/s-os_lib.ads,
+ 	libgnat/s-regexp.ads: Reword "wild card" to "wildcard".
+ 	* gnat_rm.texi, gnat_ugn.texi: Regenerate.
+ 
+ 2019-07-09  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb (Check_Expression): Handle correctly implicit
+ 	assignments as part of allocators and (extension) aggregates.
+ 	(Get_Root_Object): Adapt for new path expressions.
+ 	(Is_Path_Expression): Return True for (extension) aggregate.
+ 
+ 2019-07-09  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* einfo.ads: Fix a typo.
+ 
+ 2019-07-09  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_util.adb (Scope_Within_Or_Same): Handle properly task
+ 	bodies and protected bodies, so that local variables within have
+ 	their proper scopes after these constructs have been rewritten
+ 	during expansion. This patch resembles but is not identical to
+ 	the code in Scope_Within.
+ 
+ 2019-07-09  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* gnat1drv.adb (Adjust_Global_Switches): Set
+ 	Dynamic_Elaboration_Checks to True in CodePeer mode.
+ 
+ 2019-07-09  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb (Get_Perm_Or_Tree): Issue an error when
+ 	encountering unknown global variable.
+ 
+ 2019-07-09  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb (Check_Expression): Change signature to take an
+ 	Extended_Checking_Mode, for handling read permission checking of
+ 	sub-expressions in an assignment.
+ 	(Check_Parameter_Or_Global): Adapt to new behavior of
+ 	Check_Expression for mode Assign.
+ 	(Check_Safe_Pointers): Do not analyze generic bodies.
+ 	(Check_Assignment): Separate checking of the target of an
+ 	assignment.
+ 
+ 2019-07-09  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* repinfo.ads (JSON format): Adjust.
+ 	* repinfo.adb (Need_Blank_Line): Rename to...
+ 	(Need_Separator): ...this.
+ 	(Blank_Line): Rename to...
+ 	(Write_Separator): ...this and add JSON specific handling.
+ 	(List_Array_Info): Adjust to above renaming.
+ 	(List_Object_Info): Likewise.
+ 	(List_Record_Info): Likewise.
+ 	(List_Subprogram_Info): Likewise.
+ 	(List_Type_Info): Likewise.
+ 	(List_Entities): Do not set Need_Blank_Line.
+ 	(List_Rep_Info): Set Need_Separator and add JSON specific
+ 	handling. Output a single JSON stream in the  normal case.
+ 
+ 2019-07-09  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* doc/gnat_ugn/the_gnat_compilation_model.rst: Update doc on
+ 	-fdump-ada-spec now that we generate Ada 2012.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-07-08  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* repinfo.adb (List_Common_Type_Info): New procedure extracted
+ 	from...
+ 	(List_Type_Info): ...here.  Call it for the common information,
+ 	start with a blank line and output the linker section at the
+ 	end, if any.
+ 	(List_Mechanisms): Rename to...
+ 	(List_Subprogram_Info): ...this.
+ 	(List_Array_Info): Call List_Common_Type_Info.
+ 	(List_Entities): Adjust to above change and renaming.
+ 	(List_Record_Info): Call List_Common_Type_Info.
+ 
+ 2019-07-08  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/g-sercom.ads
+ 	(Serial_Port_Descriptor): New type.
+ 	(Serial_Port): Add a comment, make it hold a
+ 	Serial_Port_Descriptor.
+ 	(To_Ada, To_C): New procedures.
+ 	(Port_Data, Port_Data_Access): Remove types.
+ 	* libgnat/g-sercom.adb (To_Ada): New stub.
+ 	* libgnat/g-sercom__linux.adb, libgnat/g-sercom__mingw.adb:
+ 	Update implementations accordingly.
+ 	* s-oscons-tmplt.c: Bind Serial_Port_Descriptor to
+ 	System.Win32.HANDLE on Windows, and to Interfaces.C.int on
+ 	Linux. Add "Interfaces.C." prefix for other basic integer type
+ 	bindings.
+ 	* xoscons.adb (Output_Info): Remove the "Interfaces.C." prefix
+ 	for subtypes generation.
+ 
+ 2019-07-08  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* doc/gnat_rm/standard_and_implementation_defined_restrictions.rst:
+ 	Update documentation on No_Exceptions restriction.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-07-08  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/s-os_lib.adb: Do not call __gnat_kill for Invalid_Pid.
+ 
+ 2019-07-08  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* sem_util.adb (Enclosing_Package_Or_Subprogram): Do not expect
+ 	package and subprogram bodies.
+ 
+ 2019-07-08  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_ugn/gnat_utility_programs.rst: Remove documentation
+ 	of ignored GNATpp switch.
+ 
+ 2019-07-08  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst:
+ 	Update the documentation of pragma Initialize_Scalars.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-07-08  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_ch4.adb (Tagged_Membership): Fix regression silently
+ 	introduced in r260738 that erroneouslusy causes the evaluation
+ 	to True of the membership test when the left operand of the
+ 	membership test is a class-wide interface object and the right
+ 	operand is a type that implements such interface type.
+ 
+ 2019-07-08  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* sem_ch13.adb (Analyze_Attribute_Definition_Clause): Do not
+ 	register an address clause when its prefix denotes a generic
+ 	formal object.
+ 
+ 2019-07-08  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* bindo-diagnostics.adb (Diagnose_Cycle): Capture the presence
+ 	of an Elaborate_All edge before iterating over the edges of the
+ 	cycle.
+ 	(Output_Elaborate_Body_Transition): Update the parameter profile
+ 	and the comment on usage. Add a missing case where the edge is
+ 	within the context of an Elaborate_All.
+ 	(Output_Transition): Update the call to
+ 	Output_Elaborate_Body_Transition.
+ 	* bindo-graphs.ads, bindo-graphs.adb
+ 	(Contains_Elaborate_All_Edge): New routine.
+ 
+ 2019-07-08  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* lib-xref-spark_specific.adb (Create_Heap): Set dummy Etype for
+ 	the fake __HEAP entity.
+ 
+ 2019-07-08  Daniel Mercier  <mercier@adacore.com>
+ 
+ 	* gnat1drv.adb: Suppress warnings on memory representation in
+ 	CodePeer compiler mode.
+ 
+ 2019-07-08  Nicolas Roche  <roche@adacore.com>
+ 
+ 	* rtinit.c (__gnat_runtime_initialize): Remove dependency on
+ 	CommandLineToArgvW.
+ 
+ 2019-07-08  Doug Rupp  <rupp@adacore.com>
+ 
+ 	* Makefile.rtl: Handle vxworks7r2 in x86_64 and x86 vxworks7.
+ 
+ 2019-07-08  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* Makefile.rtl: Use g-sercom__linux.adb for all linuxes.
+ 
+ 2019-07-08  Yannick Moy  <moy@adacore.com>
+ 
+ 	* expander.adb (Expand): Do not reset Analyzed flag always.
+ 	* sem_eval.adb (Fold_Ureal): Mark node as analyzed.
+ 
+ 2019-07-08  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_ch9.adb (Expand_N_Timed_Entry_Call): Do not insert twice
+ 	the assignment statement that computes the delay value, to
+ 	prevent improper tree sharing when the value is a type
+ 	conversion and Float_Overflow checks are enabled.
+ 
+ 2019-07-08  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* bindo.adb: Update the section on terminology to include new
+ 	concepts.  Update the section on switches to include new
+ 	entries.
+ 	* bindo.ads: Add type Precedence_Kind.
+ 	* bindo-builders.adb: Add with and use clauses for Debug and
+ 	Bindo.Validators.  Add use clauses for
+ 	Bindo.Validators.Invocation_Graph_Validators and
+ 	Bindo.Validators.Library_Graph_Validators.
+ 	(Build_Invocation_Graph): Validate the graph immediately after
+ 	it was built.
+ 	(Build_Library_Graph): Update the parameter profile. The
+ 	creation of the graph is now elaboration model-agnostic.
+ 	Validate the graph immediately after it was built.
+ 	(Create_With_Edge): Create regular with edges for Elaborate and
+ 	Elaborate_All edges when the appropriate debug switches are in
+ 	effect.
+ 	* bindo-builders.ads (Build_Library_Graph): Update the parameter
+ 	profile.
+ 	* bindo-diagnostics.adb (Diagnose_Cycle): Track the presence of
+ 	an Elaborate_All edge throughout the inspection of the cycle's
+ 	edges.
+ 	(Output_Dynamic_Model_Suggestions): Output the suggestion only
+ 	when the cycle contains at least one weak edge where the
+ 	successor was statically elaborated.
+ 	(Output_Elaborate_Body_Transition, Output_Forced_Transition,
+ 	Output_With_Transition): Update the assertions.
+ 	* bindo-elaborators.adb: Remove use clauses for
+ 	Bindo.Validators.Invocation_Graph_Validators and
+ 	Bindo.Validators.Library_Graph_Validators.  Remove strings
+ 	Add_To_All_Candidates_Msg and Add_To_Comp_Candidates_Msg.
+ 	Remove type String_Ptr.
+ 	(Add_Vertex, Add_Vertex_If_Elaborable, Create_All_Candidates_Set
+ 	Create_Component_Candidates_Set): Remove.
+ 	(Create_Component_Vertex_Sets, Create_Vertex_Sets): New routine.
+ 	(Elaborate_Component): Update the parameter profile and the
+ 	comment on usage.  Reimplement the elaboration of a component.
+ 	The algorithm will now attempt to elaborate as many vertices
+ 	possible. If this is not possible, and a weakly elaborable
+ 	vertex is available use unit was compiled using the dynamic
+ 	model, the algorithm will elaborate it.
+ 	(Elaborate_Library_Graph): Reimplement the elaboration of the
+ 	graph. The algorithm will now attempt to elaborate as many
+ 	vertices along with their components as possible. If this is not
+ 	possible, and a weakly elaborable vertex is available use unit
+ 	was compiled using the dynamic model, the algorithm will
+ 	elaborate it along with its component.
+ 	(Elaborate_Units): Merge with the functionality of
+ 	Elaborate_Units_Common.
+ 	(Elaborate_Units_Common, Elaborate_Units_Dynamic,
+ 	Elaborate_Units_Static): Remove.
+ 	(Elaborate_Vertex): Update the parameter profile and the comment
+ 	on usage.  Reimplemented.
+ 	(Find_Best_Candidate): Remove.
+ 	(Find_Best_Elaborable_Vertex, Find_Best_Vertex,
+ 	Find_Best_Weakly_Elaborable_Vertex, Has_Elaborable_Body,
+ 	Insert_Elaborable_Successor, Insert_Vertex): New routines.
+ 	(Is_Better_Candidate): Remove.
+ 	(Is_Better_Elaborable_Vertex,
+ 	Is_Better_Weakly_Elaborable_Vertex,
+ 	Is_Suitable_Elaborable_Vertex,
+ 	Is_Suitable_Weakly_Elaborable_Vertex): New routines.
+ 	(Trace_Candidate_Vertices): Remove.
+ 	(Trace_Component): Output the number of strong and weak
+ 	predecessors.
+ 	(Trace_Unelaborated_Vertices): Remove.
+ 	(Trace_Vertex): Output the number of strong and weak
+ 	predecessors.
+ 	(Trace_Vertices): New routine.
+ 	(Update_Successor, Update_Successors): Update the parameter
+ 	profile and the comment on usage.
+ 	* bindo-graphs.adb: Remove type Precedence_Kind.
+ 	(Add_Edge_With_Return): Update the increment of pending
+ 	predecessors.
+ 	(Add_Vertex): Provide default values for strong and weak
+ 	predecessors.
+ 	(Complementary_Vertex): Move the initial declaration to the
+ 	spec. Update the parameter profile and the comment on usage.
+ 	(Contains_Weak_Static_Successor): New routine.
+ 	(Create): Update the parameter profile. The creation of the
+ 	graph is now elaboration model-agnostic.
+ 	(Decrement_Pending_Predecessors): Update the parameter profile
+ 	and the comment on usage. Reimplemented.
+ 	(Delete_Edge): Update the decrement of pending predecesors.
+ 	(Has_Elaborate_Body): Do not treat a vertex as being subject to
+ 	Elaborate_Body when a debug switch is in effect.
+ 	(Increment_Pending_Predecessors): Update the parameter profile
+ 	and the comment on usage. Reimplemented.
+ 	(Is_Elaborable_Component): Reimplemented.
+ 	(Is_Elaborable_Vertex): Move the initial declaration to the
+ 	spec.  Reimplemented.
+ 	(Is_Elaborate_Body_Pair): New routine.
+ 	(Is_Dynamically_Elaborated): Update the parameter profile.
+ 	Reimplemented.
+ 	(Is_Weakly_Elaborable_Vertex): New routine.
+ 	(Pending_Predecessors): Removed.
+ 	(Pending_Predecessors_For_Elaboration,
+ 	Pending_Strong_Predecessors, Pending_Weak_Predecessors,
+ 	Update_Pending_Predecessors): New routines.
+ 	(Update_Pending_Predecessors_Of_Components): Update the
+ 	increment of pending predecessors.
+ 	* bindo-graphs.ads: Update the components of type
+ 	Component_Attributes.  Update the components of type
+ 	Library_Graph_Attributes.  Update the components of type
+ 	Library_Graph_Vertex_Attributes.  Update the initialization of
+ 	No_Component_Attributes.  Update the initialization of
+ 	No_Library_Graph_Vertex_Attributes.
+ 	(Complementary_Vertex, Contains_Weak_Static_Successor): New
+ 	routines.
+ 	(Create): Update the parameter profile and the comment on usage.
+ 	(Decrement_Pending_Predecessors, Is_Dynamically_Elaborated):
+ 	Update the parameter profile and the comment on usage.
+ 	(Is_Elaborate_Body_Pair, Is_Weakly_Elaborable_Vertex): New
+ 	routines.
+ 	(Pending_Predecessors): Removed.
+ 	(Pending_Predecessors_For_Elaboration,
+ 	Pending_Strong_Predecessors, Pending_Weak_Predecessors): New
+ 	routines.
+ 	* bindo-writers.adb (Write_Components): Moved from the spec.
+ 	(Write_Component): Output the strong and weak predecessors.
+ 	(Write_Library_Graph): Output the components as part of the
+ 	graph.
+ 	(Write_Library_Graph_Vertex): Output the strong and weak
+ 	predecessors.
+ 	* bindo-writers.ads (Write_Components): Moved to the body.
+ 	* debug.adb: Add and document new GNATbind switches -d_a, -d_b,
+ 	-d_e.
+ 	* bindo-validators.adb: Minor reformattings.
+ 
+ 2019-07-08  Bob Duff  <duff@adacore.com>
+ 
+ 	* libgnat/g-sercom.ads, libgnat/g-sercom__linux.adb (Data_Rate):
+ 	Support additional data rates.
+ 
+ 2019-07-08  Olivier Hainque  <hainque@adacore.com>
+ 
+ 	* gcc-interface/trans.c (Compilation_Unit_to_gnu): Don't request
+ 	DECL_ARTIFICIAL_P on elab proc declarations.
+ 
+ 2019-07-08  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* repinfo.adb (List_Record_Info): Declare Incomplete_Layout and
+ 	Not_In_Extended_Main local exceptions.
+ 	(List_Structural_Record_Layout): For an extension, raise the
+ 	former if the parent subtype has not been built and the latter
+ 	if it is not declared in the main source unit.  Fall back to the
+ 	flat layout if either exception has been raised.
+ 
+ 2019-07-08  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* libgnat/a-strfix.adb (Delete): The RM describes the semantics
+ 	of Delete as equivalent to that of Replace_String with a null
+ 	argument. As a result, deleting a null string that starts past
+ 	the end of its argument is a noop and must not raise
+ 	Index_Error.
+ 
+ 2019-07-08  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_disp.adb (Register_Primitive): When registering a
+ 	primitive in the secondary dispatch table, handle primitive
+ 	inherited through several levels of type derivation (required to
+ 	properly handle inherited 'null' primitive).
+ 
+ 2019-07-08  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_ugn/gnat_utility_programs.rst: Document handling of
+ 	preprocessor directives in GNATpp.
+ 
+ 2019-07-08  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* gnat1drv.adb (Post_Compilation_Validation_Checks:
+ 	Validate_Compile_Time_Warning_Errors is now located in sem_prag
+ 	(instead of sem_ch13).
+ 	* sem_ch13.ads (Validate_Compile_Time_Warning_Error,
+ 	Validate_Compile_Time_Warning_Errors): Move to sem_prag.
+ 	* sem_ch13.adb
+ 	(Compile_Time_Warnings_Errors): Move to sem_prag.
+ 	(Initialize): Remove initialization of table
+ 	Compile_Time_Warning_Errors.
+ 	(Validate_Compile_Time_Warning_Error,
+ 	Validate_Compile_Time_Warning_Errors): Move to sem_prag.
+ 	* sem_prag.ads (Validate_Compile_Time_Warning_Errors): New
+ 	procedure.
+ 	* sem_prag.adb (Initialize): Initialize table
+ 	Compile_Time_Warning_Errors.
+ 
+ 2019-07-08  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch13.adb (Analyze_Aspect_Specifications): For a
+ 	pre/postcondition of a generic subprogram declaration, do not
+ 	use Relocate_Node on the aspect expression to construct the
+ 	corresponding attribute specification, to prevent tree anomalies
+ 	when the expression is a call with named actual parameters.
+ 
+ 2019-07-08  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* sem_attr.adb (Analyze_Attribute [Attribute_Size]): For pragmas
+ 	used to report user defined compile time warning or errors
+ 	handle 'Size for types with known static RM size.
+ 
+ 2019-07-08  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* exp_imgv.adb (Build_Enumeration_Image_Tables): Default SSO for
+ 	the building of image tables.
+ 	(Expand_Image_Attribute): Minor cleanup.
+ 
+ 2019-07-08  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/g-socket.ads, libgnat/g-socket.adb: Improve
+ 	documentation.
+ 	(Get_Socket_Option, Set_Socket_Option): Remove default value for
+ 	the Level formal.
+ 
+ 2019-07-08  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch13.adb (Check_Aspect_At_End_Of_Declarations): For an
+ 	unanalized aspect in a generic context that has not been
+ 	analyzed yet, if the aspect applies to a type, place the type on
+ 	the scope stack to make its components visible, before checking
+ 	conformance with the version of the expression analyzed at the
+ 	freeze point.
+ 
+ 2019-07-05  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* checks.adb (Apply_Accessibility_Check): Add logic to fetch the
+ 	function result accessibility level if one is required within
+ 	the generated check.
+ 	* exp_ch6.adb (Needs_Result_Accessibility_Level): Modify
+ 	controlling elsif block to handle more cases such as anonymous
+ 	access results and disable checking for coextensions.
+ 
+ 2019-07-05  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch9.adb (Analyze_Accept_Statement): If this is an illegal
+ 	accept statement for an enclosing entry abandon analysis to
+ 	prevent scope mismatches and potential infinite loops in
+ 	compiler.
+ 
+ 2019-07-05  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* ali.adb (For_Each_Invocation_Construct,
+ 	For_Each_Invocation_Relation): New version.
+ 	(Scan_ALI): Initialize field Invocation_Graph_Encoding.
+ 	(Set_Invocation_Graph_Encoding): Update the setting of the
+ 	invocation graph encoding.
+ 	* ali.ads: Move field Invocation_Graph_Encoding from Unit_Record
+ 	to ALI_Record because the encoding applies to the whole ALI,
+ 	rather than one of the units (spec or body) for which the ALI
+ 	file was created.
+ 	(For_Each_Invocation_Construct, For_Each_Invocation_Relation):
+ 	New version.
+ 	* bindo.adb: Update the section on switches.  Complete the
+ 	section of debugging elaboration order issues.
+ 	(Find_Elaboration_Order): Prepare the routine for the switch
+ 	from the old to the new elaboration order mechanism.
+ 	* bindo-diagnostics.adb (Find_And_Output_Invocation_Paths):
+ 	Manage a visited set used by Visit_Vertex.
+ 	(Output_All_Cycles_Suggestions,
+ 	Output_Dynamic_Model_Suggestions): Clarify the nature of the
+ 	suggested switch.
+ 	(Output_Elaborate_Body_Transition): Update the diagnostic to
+ 	emit a better message.
+ 	(Output_Forced_Suggestions, Output_Full_Encoding_Suggestions):
+ 	Clarify the nature of the suggested switch.
+ 	(Visit_Vertex): Update the parameter profile to add a set of
+ 	invokers visited during the transition. This set prevents
+ 	infinite exploration of the graph in case the invocations are
+ 	recursive.
+ 	* bindo-elaborators.adb: Add a use clause for
+ 	Bindo.Writers.Dependency_Writers.
+ 	(Elaborate_Units_Common): Output the library graph after it has
+ 	been augmented with invocation edges. Output just the components
+ 	instead of outputting the whole library graph again.
+ 	(Elaborate_Units_Dynamic, Elaborate_Units_Static): Output the
+ 	dependencies as expressed in the library graph.
+ 	* bindo-units.adb (Invocation_Graph_Encoding): Update the
+ 	extraction of the invocation graph encoding.
+ 	* bindo-writers.adb: Add with and use clauses for Binderr and
+ 	Butil.
+ 	(palgc, plgc): New debug routine.
+ 	(Write_Components): Moved to the spec. Add a header for the
+ 	output.
+ 	(Write_Dependencies, Write_Dependencies_Of_Vertex,
+ 	Write_Dependency_Edge): New routine.
+ 	(Write_Elaboration_Order): Update the logic to follow the format
+ 	of Binde's order output.
+ 	(Write_Library_Graph): Do not output the components every time
+ 	the graph is written.
+ 	(Write_Unit): Output the invocation graph encoding of the unit.
+ 	Output the invocation constructs and relations for the unit
+ 	only.
+ 	* bindo-writers.ads (Write_Components): Moved from the body.
+ 	(Write_Dependencies): New routine.
+ 	* bindusg.adb: Prepare the routine for the switch from the old
+ 	to the new elaboration order mechanism.
+ 	* debug.adb: Binder switch -d_O is now not associated with any
+ 	functionality.
+ 	* einfo.adb (Is_Elaboration_Target): The attribute applies to
+ 	packages, as specified by the comment on the attribute usage.
+ 	* opt.ads: Add a global flag which controls the choice between
+ 	the new and the legacy elaboration order mechanism.
+ 	* sem_elab.adb: Add Package_Target to type Target_Kind.
+ 	(Build_Elaborate_Body_Procedure, Build_Elaborate_Procedure,
+ 	Build_Elaborate_Spec_Procedure, Check_Elaboration_Scenarios,
+ 	Check_SPARK_Model_In_Effect): Use Main_Unit_Entity to obtain the
+ 	entity of the main unit.
+ 	(Create_Package_Rep): New routine.
+ 	(Create_Target_Rep): Add processing for packages.
+ 	(Declaration_Placement_Of_Node, Has_Prior_Elaboration): Use
+ 	Main_Unit_Entity to obtain the entity of the main
+ 	 unit.
+ 	(Invocation_Graph_Recording_OK): Prepare the routine for the
+ 	switch from the old to the new elaboration order mechanism.
+ 	(Main_Unit_Entity): New routine.
+ 	(Meet_Elaboration_Requirement,
+ 	Process_Conditional_ABE_Variable_Reference): Use
+ 	Main_Unit_Entity to obtain the entity of the main unit.
+ 	(Process_Invocation_Instantiation): New routine.
+ 	(Process_Invocation_Scenario): Add processing for
+ 	instantiations.
+ 	* switch-b.adb (Scan_Binder_Switches): Prepare the routine for
+ 	the switch from the old to the new elaboration order mechanism.
+ 
+ 2019-07-05  Joffrey Huguet  <huguet@adacore.com>
+ 
+ 	* libgnat/a-textio.adb: Add abstract state refinment.
+ 	* libgnat/a-textio.ads: Add File_System abstract state.  Add
+ 	global contracts, contract cases, preconditions and
+ 	postconditions to procedures and functions.
+ 	(Set_Input, Set_Output, Set_Error, Standard_Input,
+ 	Standard_Output, Standard_Error, Current_Input, Current_Output,
+ 	Current_Error): Turn SPARK_Mode off.
+ 	(Get_Line): Turn SPARK_Mode off on Get_Line functions.
+ 	* libgnat/a-tideio.ads, libgnat/a-tienio.ads,
+ 	libgnat/a-tifiio.ads, libgnat/a-tiflio.ads,
+ 	libgnat/a-tiinio.ads, libgnat/a-timoio.ads: Add global
+ 	contracts, contract cases, preconditions and postconditions to
+ 	procedures and functions.
+ 
+ 2019-07-05  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* doc/gnat_ugn/platform_specific_information.rst: Refresh doc on
+ 	installing from the command line on Windows.  Remove obsolete
+ 	part.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-07-05  Vasiliy Fofanov  <fofanov@adacore.com>
+ 
+ 	* libgnat/a-wichha.ads (Is_Alphanumeric): Replace comment with
+ 	the correct one.  Also capitalize references to False
+ 	throughout.
+ 
+ 2019-07-05  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_Indexed_Component): Do not expand actual
+ 	parameters of function calls here either.
+ 
+ 2019-07-05  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* bindo-units.adb, checks.adb, exp_attr.adb, exp_ch3.adb,
+ 	exp_ch4.adb, exp_pakd.adb, lib-writ.adb, libgnat/g-traceb.adb,
+ 	libgnat/g-traceb.ads, libgnat/s-stratt.ads, sem_aux.ads,
+ 	sem_util.adb: Minor reformatting.
+ 
+ 2019-07-05  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch13.adb (Build_Predicate_Functions): If a subtype that
+ 	carries a static predicate aspect is frozen immediately after
+ 	its declaration, ensure that the generated function body created
+ 	for predicate checking is inserted after the corresponding
+ 	subprogram declaration, which is created at the point the
+ 	declaration is elaborated.
+ 
+ 2019-07-05  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* exp_ch7.adb (Cleanup_Record): Use the underlying type when
+ 	checking for components with tasks.
+ 
+ 2019-07-05  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* libgnarl/s-osinte__linux.ads: Link with -lrt before -lpthread.
+ 
+ 2019-07-05  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_pakd.adb (Expand_Bit_Packed_Element_Set): Add explicit
+ 	range checks when the index type of the bit-packed array is an
+ 	enumeration type with a non-standard representation,
+ 
+ 2019-07-05  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* sem_res.adb (Is_Control_Flow_Statement): Delay statements
+ 	contain an expression, which in turn may have side effects and
+ 	affect the infinite recursion. As a result, delay statements
+ 	should not be treated specially.
+ 
+ 2019-07-05  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* libgnarl/s-linux.ads, libgnarl/s-linux__alpha.ads,
+ 	libgnarl/s-linux__android.ads, libgnarl/s-linux__hppa.ads,
+ 	libgnarl/s-linux__mips.ads, libgnarl/s-linux__riscv.ads,
+ 	libgnarl/s-linux__sparc.ads: Fix typos in comments.
+ 
+ 2019-07-05  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* sem_res.adb (Check_Infinite_Recursion): Reimplemented.
+ 	(Enclosing_Declaration_Or_Statement,
+ 	Invoked_With_Different_Arguments, Is_Conditional_Statement,
+ 	Is_Control_Flow_Statement, Is_Immediately_Within_Body,
+ 	Is_Raise_Idiom, Is_Raise_Statement, Is_Sole_Statement,
+ 	Preceded_By_Control_Flow_Statement,
+ 	Within_Conditional_Statement): New routines.
+ 
+ 2019-07-05  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_N_Type_Conversion): Do not apply an
+ 	accessibility check when the conversion is an access to
+ 	class-wide interface type and it is an actual parameter.
+ 	* exp_ch6.adb (Expand_Call_Helper): Add documentation on the
+ 	accessibility level of an anonymous allocator defining the value
+ 	of an access parameter.
+ 	* sem_util.ads, sem_util.adb (Dynamic_Accessibility_Level): Add
+ 	support for an anonymous allocator whose type is that of a
+ 	stand-alone object of an anonymous access to object type.
+ 
+ 2019-07-05  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* einfo.ads, sem_res.adb: Typo fixes in comments.
+ 
+ 2019-07-05  Bob Duff  <duff@adacore.com>
+ 
+ 	* exp_ch6.adb (Is_Build_In_Place_Function): Narrow the check for
+ 	Has_Foreign_Convention to the imported case only.  If a
+ 	build-in-place function is exported, and called from Ada code,
+ 	build-in-place protocols should be used.
+ 
+ 2019-07-05  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_util.adb (Encloing_Subprogram): If Enclosing_Dynamic_Scope
+ 	is a loop, continue climbing the scope stack to find the
+ 	enclosing subprogram.
+ 	(Gather_Components): Handle properly a choice in a record
+ 	aggregate that is given by a subtype with a static predicate.
+ 
+ 2019-07-05  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* debug.adb (-gnatd.K): Leave available this switch.
+ 	* contracts.adb (Build_And_Analyze_Contract_Only_Subprograms):
+ 	Remove.
+ 	* scil_ll.ads, scil_ll.adb (Contract_Only_Body_Flag,
+ 	Contract_Only_Body_Nodes, Get_Contract_Only_Body,
+ 	Is_Contract_Only_Body, Set_Contract_Only_Body): Remove.
+ 
+ 2019-07-05  Pierre-Marie de Rodat  <derodat@adacore.com>
+ 
+ 	* libgnat/a-strunb.ads: Import documentation from the RM
+ 
+ 2019-07-05  Pierre-Marie de Rodat  <derodat@adacore.com>
+ 
+ 	* libgnat/a-strfix.ads: Import documentation from the RM
+ 
+ 2019-07-05  Yannick Moy  <moy@adacore.com>
+ 
+ 	* adabkend.adb (Scan_Back_End_Switches): Accept -Og and -Ofast
+ 	switches.
+ 
+ 2019-07-05  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* ali.adb: Relocate types Invocation_Construct_Record,
+ 	Invocation_Relation_Record, and Invocation_Signature_Record to
+ 	the body of ALI.  Relocate tables Invocation_Constructs,
+ 	Invocation_Relations, and Invocation_Signatures to the body of
+ 	ALI.  Remove type Body_Placement_Codes.  Add new types
+ 	Declaration_Placement_Codes, and
+ 	Invocation_Graph_Encoding_Codes.  Update the literals of type
+ 	Invocation_Graph_Line_Codes.
+ 	(Add_Invocation_Construct): Update the parameter profile. Add an
+ 	invocation construct built from all attributes provided.
+ 	(Add_Invocation_Relation): Update the parameter profile. Add an
+ 	invocation relation built from all attributes provided.
+ 	(Body_Placement): New routine.
+ 	(Body_Placement_Kind_To_Code, Code_To_Body_Placement_Kind):
+ 	Removed.
+ 	(Code_To_Declaration_Placement_Kind,
+ 	Code_To_Invocation_Graph_Encoding_Kind, Column,
+ 	Declaration_Placement_Kind_To_Code, Extra,
+ 	For_Each_Invocation_Construct, For_Each_Invocation_Relation,
+ 	Invocation_Graph_Encoding,
+ 	Invocation_Graph_Encoding_Kind_To_Code, Invoker, Kind, Line,
+ 	Locations, Name): New routine.
+ 	(Scan_Invocation_Construct_Line): Reimplement the scanning
+ 	mechanism.
+ 	(Scan_Invocation_Graph_Attributes_Line): New routine.
+ 	(Scan_Invocation_Graph_Line): Use a case statement to dispatch.
+ 	(Scan_Invocation_Relation_Line): Reimplement the scanning
+ 	mechanism.
+ 	(Scope): New routine.
+ 	(Set_Invocation_Graph_Encoding, Signature, Spec_Placement,
+ 	Target): New routine.
+ 	* ali.ads: Add new type Invocation_Graph_Encoding_Kind.  Add
+ 	component Invocation_Graph_Encoding to type Unit_Record.
+ 	Relocate various types and data structures to the body of ALI.
+ 	(Add_Invocation_Construct, Add_Invocation_Relation): Update the
+ 	parameter profile.
+ 	(Body_Placement): New routine.
+ 	(Body_Placement_Kind_To_Code, Code_To_Body_Placement_Kind):
+ 	Removed.
+ 	(Code_To_Declaration_Placement_Kind,
+ 	Code_To_Invocation_Graph_Encoding_Kind, Column,
+ 	Declaration_Placement_Kind_To_Code, Extra,
+ 	For_Each_Invocation_Construct, For_Each_Invocation_Relation,
+ 	Invocation_Graph_Encoding,
+ 	Invocation_Graph_Encoding_Kind_To_Code, Invoker, Kind, Line,
+ 	Locations, Name, Scope, Set_Invocation_Graph_Encoding,
+ 	Signature, Spec_Placement, Target): New routine.
+ 	* bindo.adb: Add with clause for Binde.  Add with and use
+ 	clauses for Debug.  Update the documentation.  Add new switches.
+ 	(Find_Elaboration_Order): Dispatch to the proper elaboration
+ 	mechanism.
+ 	* bindo-augmentors.adb:
+ 	Remove with and use clauses for GNAT and GNAT.Sets.  Remove
+ 	membership set VS.  Update the parameter profiles of most
+ 	routines to use better parameter names.  Update the
+ 	implementation of most routine to use the new parameter names.
+ 	Remove various redundant assertions.
+ 	* bindo-builders.adb: Use better names for instantiated data
+ 	structures. Update all references to these names.  Update the
+ 	parameter profiles of most routines to use better parameter
+ 	names.  Update the implementation of most routine to use the new
+ 	parameter names.
+ 	(Build_Library_Graph): Update the parameter profile. Update the
+ 	call to Create.
+ 	(Create_Vertex): Reimplemented.
+ 	(Declaration_Placement_Vertex): New routine.
+ 	* bindo-builders.ads (Build_Library_Graph): Update the parameter
+ 	profile and comment on usage.
+ 	* bindo-diagnostics.adb: Almost a new unit.
+ 	* bindo-diagnostics.ads: Add a use clause for
+ 	Bindo.Graphs.Invocation_Graphs.  Remove package
+ 	Cycle_Diagnostics.
+ 	(Diagnose_Circularities): New routine.
+ 	* bindo-elaborators.adb: Remove the with and use clauses for
+ 	Binderr and GNAT.Sets.  Remove the use clause for
+ 	Bindo.Diagnostics.Cycle_Diagnostics.  Remove membership set VS.
+ 	Update the parameter profiles of most routines to use better
+ 	parameter names.  Update the implementation of most routine to
+ 	use the new parameter names.  (Elaborate_Units_Common): Update
+ 	the parameter profile. Pass an infication to the library graph
+ 	builder whether the dynamic model is in effect.
+ 	(Elaborate_Units_Dynamic, Elaborate_Units_Static): Use
+ 	Diagnose_Circularities to provide diagnostics.
+ 	(Update_Successor): Use routine In_Same_Component to determine
+ 	whether the predecessor and successor reside in different
+ 	components.
+ 	* bindo-graphs.adb: Add with and use clauses for Butil, Debug,
+ 	Output, and Bindo.Writers.  Remove with and use clauses for
+ 	GNAT.Lists.  Update the parameter profiles of most routines to
+ 	use better parameter names.  Update the implementation of most
+ 	routine to use the new parameter names.  Remove various
+ 	redundant assertions.  Remove doubly linked list EL.  Add new
+ 	type Precedence_Kind.
+ 	(Add_Cycle): New routine.
+ 	(Add_Vertex): Update the parameter profile. Update the creation
+ 	of vertex attributes.
+ 	(Add_Vertex_And_Complement, Body_Vertex, Column,
+ 	Complementary_Vertex, Copy_Cycle_Path, Cycle_Kind_Of): New
+ 	routines.
+ 	(Destroy_Invocation_Graph_Edge, Destroy_Library_Graph_Cycle,
+ 	Destroy_Library_Graph_Edge, Extra, File_Name,
+ 	Find_All_Cycles_Through_Vertex, Find_All_Cycles_With_Edge,
+ 	Find_Cycles, Find_First_Lower_Precedence_Cycle,
+ 	Get_LGC_Attributes, Has_Next, Hash_Library_Graph_Cycle,
+ 	Hash_Library_Graph_Cycle_Attributes, Highest_Precedence_Cycle,
+ 	Highest_Precedence_Edge, In_Same_Component, Insert_And_Sort,
+ 	Invocation_Edge_Count, Invocation_Graph_Encoding,
+ 	Is_Cycle_Initiating_Edge, Is_Cyclic_Edge,
+ 	Is_Cyclic_Elaborate_All_Edge, Is_Cyclic_Elaborate_Body_Edge,
+ 	Is_Cyclic_Elaborate_Edge, Is_Cyclic_Forced_Edge,
+ 	Is_Cyclic_Invocation_Edge, Is_Cyclic_With_Edge,
+ 	Is_Dynamically_Elaborated, Is_Elaborate_All_Edge,
+ 	Is_Elaborate_Body_Edge, Is_Elaborate_Edge: New routines.
+ 	(Is_Existing_Predecessor_Successor_Relation): Removed.
+ 	(Is_Forced_Edge, Is_Invocation_Edge, Is_Recorded_Cycle,
+ 	Is_Recorded_Edge, Is_With_Edge, Iterate_Edges_Of_Cycle, Kind,
+ 	Length): New routine.
+ 	(Lib_Vertex): Removed.
+ 	(Line, Links_Vertices_In_Same_Component,
+ 	Maximum_Invocation_Edge_Count, Next, Normalize_And_Add_Cycle,
+ 	Normalize_Cycle_Path, Number_Of_Cycles, Path, Precedence,
+ 	Remove_Vertex_And_Complement, Sequence_Next_Cycle): New routines.
+ 	(Sequence_Next_IGE_Id): Renamed to Sequence_Next_Edge.
+ 	(Sequence_Next_IGV_Id): Renamed to Sequence_Next_Vertex.
+ 	(Sequence_Next_LGE_Id): Renamed to Sequence_Next_Edge.
+ 	(Sequence_Next_LGV_Id): Renamed to Sequence_Next_Vertex.
+ 	(Set_Is_Existing_Predecessor_Successor_Relation): Removed.
+ 	(Set_Is_Recorded_Cycle, Set_Is_Recorded_Edge,
+ 	Set_LGC_Attributes, Spec_Vertex, Trace_Cycle, Trace_Edge,
+ 	Trace_Eol, Trace_Vertex): New routines.
+ 	* bindo-graphs.ads: Add with and use clauses for Types and
+ 	GNAT.Lists.  Update the parameter profiles of most routines to
+ 	use better parameter names.  Update the implementation of most
+ 	routine to use the new parameter names.  Add the new
+ 	instantiated data structures IGE_Lists, IGV_Sets, LGC_Lists,
+ 	LGE_Lists, LGE_Sets, LGV_Sets, and RC_Sets.  Add new type
+ 	Library_Graph_Cycle_Id along with an empty and initial value.
+ 	Remove component Lib_Vertex and add new components Body_Vertex
+ 	and Spec_Vertex to type Invocation_Graph_Vertex_Attributes.  Add
+ 	new type Library_Graph_Cycle_Kind.  Add new iterators
+ 	All_Cycle_Iterator and Edges_Of_Cycle_Iterator.  Add new type
+ 	Library_Graph_Cycle_Attributes.  Add new components
+ 	Cycle_Attributes, Cycles, and Dynamically_Elaborated to type
+ 	Library_Graph_Attributes.
+ 	(Body_Vertex, Column, Destroy_Invocation_Graph_Edge,
+ 	Destroy_Library_Graph_Cycle_Attributes,
+ 	Destroy_Library_Graph_Edge, Extra, File_Name, Find_Cycles,
+ 	Has_Elaborate_All_Cycle, Has_Next, Hash_Library_Graph_Cycle,
+ 	Hash_Library_Graph_Cycle_Attributes, Highest_Precedence_Cycle,
+ 	In_Same_Component, Invocation_Edge_Count,
+ 	Invocation_Graph_Encoding, Is_Dynamically_Elaborated,
+ 	Is_Elaborate_All_Edge, Is_Elaborate_Body_Edge,
+ 	Is_Elaborate_Edge, Is_Forced_Edge, Is_Invocation_Edge,
+ 	Is_With_Edge, Iterate_All_Cycles, Iterate_Edges_Of_Cycle, Kind):
+ 	New routines.
+ 	(Length, Lib_Vertex, (Line, Next, Number_Of_Cycles, Present,
+ 	Same_Library_Graph_Cycle_Attributes, Spec_Vertex): New routines.
+ 	* bindo-units.adb (File_Name, Invocation_Graph_Encoding): New
+ 	routines.
+ 	* bindo-units.ads: Add new instantiated data structure
+ 	Unit_Sets.
+ 	(File_Name, Invocation_Graph_Encoding): New routine.
+ 	* bindo-validators.adb: Remove with and use clauses for GNAT and
+ 	GNAT.Sets.  Remove membership set US.  Update the parameter
+ 	profiles of most routines to use better parameter names.  Update
+ 	the implementation of most routine to use the new parameter
+ 	names.
+ 	(Validate_Cycle, Validate_Cycle_Path, Validate_Cycles,
+ 	Validate_Invocation_Graph_Vertex): Remove the validation of
+ 	component Lib_Vertex. Add the validation of components
+ 	Body_Vertex and Spec_Vertex.
+ 	(Write_Error): New routine.
+ 	* bindo-validators.ads (Validate_Cycles): New routine.
+ 	* bindo-writers.adb: Update the parameter profiles of most
+ 	routines to use better parameter names.  Update the
+ 	implementation of most routine to use the new parameter names.
+ 	(Write_Cycle, Write_Cyclic_Edge, Write_Cycles): New routines.
+ 	(Write_Invocation_Graph_Vertex): Remove the output of component
+ 	Lib_Vertex. Add the output of components Body_Vertex and
+ 	Spec_Vertex.
+ 	* bindo-writers.ads (Write_Cycles): New routine.
+ 	* debug.adb: Use binder switches -d_C and -d_P, add
+ 	documentation on their usage.
+ 	* gnatbind.adb: Remove with and use clauses for Binde.  Delegate
+ 	the choice of elaboration mechanism to Bindo.
+ 	* lib-writ.adb (Column, Extra, Invoker, Kind, Line, Locations,
+ 	Name, Placement, Scope, Signature, Target): Removed.
+ 	(Write_Invocation_Graph): Moved at the top level.
+ 	(Write_Invocation_Graph_Attributes): New routine.
+ 	(Write_Invocation_Relation, Write_Invocation_Signature): Moved
+ 	at the top level.
+ 	* lib-writ.ads: Add a documentation section on invocation graph
+ 	attributes.
+ 	* sem_elab.adb (Body_Placement_Of): New routine.
+ 	(Declare_Invocation_Construct): Update the call to
+ 	Add_Invocation_Construct.
+ 	(Declaration_Placement_Of_Node): New routine.
+ 	(Get_Invocation_Attributes): Correct the retrieval of the
+ 	enclosing subprogram where the postcondition procedure lives.
+ 	(Placement_Of, Placement_Of_Node): Removed.
+ 	(Record_Invocation_Graph): Record the encoding format used.
+ 	(Record_Invocation_Graph_Encoding): New routine.
+ 	(Record_Invocation_Relation): Update the call to
+ 	Add_Invocation_Relation.
+ 	(Spec_Placement_Of): Removed.
+ 	* libgnat/g-lists.ads, libgnat/g-lists.adb (Equal): New routine.
+ 
+ 2019-07-05  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* checks.adb (Apply_Predicate_Check): Except within the
+ 	subprogram body that defines the formal, do not apply predicate
+ 	check on a formal IN parameter: such a check is redundant and
+ 	its expansion can lead to out-of-scope references when it is
+ 	originates in a function call in a precondition,
+ 
+ 2019-07-05  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_res.adb (Resolve_Call): Cannot inline in quantified
+ 	expressions.
+ 	* sem_util.adb, sem_util.ads (In_Quantified_Expression): New
+ 	function.
+ 
+ 2019-07-05  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_rm/standard_and_implementation_defined_restrictions.rst:
+ 	Fix typo.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-07-05  Bob Duff  <duff@adacore.com>
+ 
+ 	* exp_attr.adb (Input): Take the No_Stream_Optimizations
+ 	restriction into account.
+ 
+ 2019-07-05  Claire Dross  <dross@adacore.com>
+ 
+ 	* libgnat/a-cofove.ads, libgnat/a-cofove.adb: Definite formal
+ 	vectors are now always bounded so that they do not need to be
+ 	limited anymore.
+ 
+ 2019-07-05  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/g-traceb.ads, libgnat/g-traceb.adb (Call_Chain): New
+ 	function.
+ 
+ 2019-07-04  James Clarke  <jrtc27@debian.org>
+ 
+ 	* libgnarl/s-osinte__kfreebsd-gnu.ads (clockid_t): Make type
+ 	definition public.
+ 	(CLOCK_REALTIME): Make value public.
+ 
+ 2019-07-04  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_tss.adb (Init_Proc): Adding missing support for access to
+ 	subprograms and access to protected subprograms of non-default
+ 	C++ constructors.
+ 
+ 2019-07-04  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat1drv.adb (Adjust_Global_Switches): Use proper interface to
+ 	set the validity settings in CodePeer mode.
+ 	* par-load.adb (Load): Remove all code dealing with validity
+ 	settings.
+ 	* validsw.ads (Validity_Check_Copies): Alphabetize.
+ 	* validsw.adb (Reset_Validity_Check_Options): Set all options to
+ 	off.
+ 	(Save_Validity_Check_Options): Save all options.
+ 
+ 2019-07-04  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* exp_ch3.adb, exp_ch4.adb, exp_ch4.ads, exp_ch5.adb,
+ 	exp_ch7.adb, exp_ch9.adb, exp_ch11.adb, exp_unst.adb,
+ 	rtsfind.ads, sem_attr.adb, sem_ch10.adb, sem_ch12.adb,
+ 	sem_ch13.adb, sem_dim.adb, sem_disp.adb, xref_lib.adb: Minor
+ 	reformatting.
+ 
+ 2019-07-04  Joffrey Huguet  <huguet@adacore.com>
+ 
+ 	* libgnarl/a-taside.ads: Add assertion policy to ignore
+ 	preconditions.
+ 	(Abort_Task, Is_Terminated, Is_Callable): Add preconditions.
+ 
+ 2019-07-04  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst: Fix
+ 	capitalization and parenthesis glitches.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-07-04  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch10.adb (Remove_Context_Clauses): Handle properly the
+ 	removal of a limited_with_clause which appears in the library
+ 	unit oF the main unit, when some other unit in the context has a
+ 	regular with_clause on the same unit, to prevent spurious
+ 	visibility errors in the subsequent analysis of pending instance
+ 	bodies.
+ 
+ 2019-07-04  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* sem_elab.adb: Add new type Elaboration_Phase_Status along with
+ 	a global to keep track of the elaboration phase status.
+ 	Initialize all internal data structures to Nil for services
+ 	Elaborated_Units, Internal_Representation, and Scenario_Storage.
+ 	(Build_Call_Marker): Do not create a call marker when the
+ 	elaboration phase is not active.
+ 	(Build_Variable_Reference_Marker): Do not create a call marker
+ 	when the elaboration phase is not active.
+ 	(Check_Elaboration_Scenarios): Destroy all internal structures
+ 	when the elaboration phase does not have to run. Do not execute
+ 	when the elaboration phase is not active.
+ 	(Elaboration_Phase_Active): New routine.
+ 	(Finalize_All_Data_Structures): New routine.
+ 	(Initialize): Initialize all internal data structures and signal
+ 	that the elaboration phase has started.
+ 	(Initialize_All_Data_Structures): New routine.
+ 	(Initialize_Elaborated_Units): Initialize all internal data
+ 	structures.
+ 	(Initialize_Internal_Representation): Initialize all internal
+ 	data structures.
+ 	(Initialize_Scenario_Storage): Initialize all internal data
+ 	structures.
+ 	(Kill_Elaboration_Scenario): Do not execute when the elaboration
+ 	phase is not active.
+ 	(Set_Elaboration_Phase): New routine.
+ 	(Update_Elaboration_Scenario): Do not execute when the
+ 	elaboration phase is not active.
+ 
+ 2019-07-04  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* sem_ch6.adb (Analyze_Subprogram_Body_Helper): The special
+ 	treatment of calling Mask_Unfrozen_Types must also be done in
+ 	the case of an Ignored_Ghost_Entity, because Expander_Active is
+ 	False in that case.
+ 
+ 2019-07-04  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_prag.adb (Check_Library_Level_Entity): Update for new rule
+ 	on SPARK_Mode.
+ 
+ 2019-07-04  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* sem_disp.adb (Check_Controlling_Formals): Obtain the full view
+ 	before type comparison.
+ 
+ 2019-07-04  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_ch4.ads, exp_ch4.adb (Build_Eq_Call): New visible
+ 	subprogram, extracted from Expand_Composite_Equality, to handle
+ 	properly the composition of equality for variant record types.
+ 	* exp_ch3.adb (MAke_Eq_If): Use Build_Eq_Call for each
+ 	component, to handle properly the case of a component with a
+ 	user-defined equality. Revert to predefined equality if the
+ 	user-defined operation is abstract, to maintain compatibility
+ 	with older versions,
+ 
+ 2019-07-04  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* exp_ch3.adb (Build_Initialization_Call): Fixup
+ 	*_skip_null_excluding_check argument to handle new default.
+ 	(Init_Formals): Make *_skip_null_excluding_check formal default
+ 	to False
+ 	* exp_ch4.adb (Expand_N_Allocator): Add comment to note heavy
+ 	code duplication
+ 
+ 2019-07-04  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_ch3.adb (Access_Definition): Do not create a master unless
+ 	Tasking_Allowed. Otherwise, this fails on restricted runtimes.
+ 
+ 2019-07-04  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* sem_util.adb (Propagate_DIC_Attributes): Do not propagate the
+ 	Default_Initial_Condition attributes to an incomplete type.
+ 
+ 2019-07-04  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_attr.adb (Check_Array_Type): An array type attribute such
+ 	as 'First can be applied to an unconstrained array tyope when
+ 	the attribute reference appears within an aspect specification
+ 	and the prefix is a current instance, given that the prefix of
+ 	the attribute will become a formal of the subprogram that
+ 	implements the aspect (typically a predicate check).
+ 
+ 2019-07-04  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* sem_util.adb (Yields_Synchronized_Object): Fix typos in
+ 	comments.
+ 
+ 2019-07-04  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_util.adb (Yields_Synchronized_Object): Adapt to new SPARK
+ 	rule.
+ 
+ 2019-07-04  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb (Check_Statement): Only check permission of
+ 	object in extended return when it is of a deep type.
+ 
+ 2019-07-04  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* sem_ch12.adb (Perform_Appropriate_Analysis): Added for
+ 	selecting which type of analysis based on wheither the
+ 	instantiation is a generic at the library-level. In which case
+ 	expansion during analysis.
+ 	(Preanalyze_Actuals): Modify calls to Analyze to use the new
+ 	routine.
+ 
+ 2019-07-04  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_unst.adb: Handle conditional expressions.
+ 
+ 2019-07-04  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb (Check_Package_Spec, Check_Package_Body): Only
+ 	analyze parts of the code marked in SPARK.
+ 
+ 2019-07-04  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* erroutc.adb, exp_aggr.adb, inline.adb, opt.adb, sem_ch3.adb:
+ 	Minor reformatting.
+ 
+ 2019-07-04  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb (Explanation, Get_Expl): New functions to get
+ 	the explanation for a permission mismatch.
+ 	(Perm_Error, Perm_Mismatch, Perm_Error_Loop_Exit): Take
+ 	explanation into account for issuing a more precise error
+ 	message.
+ 	(Set_Perm_Prefixes, Set_Perm_Extensions,
+ 	Set_Perm_Extensions_Move): Pass suitable argument for the
+ 	explanation node.
+ 
+ 2019-07-04  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* exp_aggr.adb (In_Place_Assign_OK): Moved to top level and add
+ 	support for record aggregates.
+ 	(Component_Check): Use Is_CCG_Supported_Aggregate instead of a
+ 	similar local predicate.
+ 	(Convert_To_Assignments): Take advantage of In_Place_Assign_OK
+ 	predicate when possible.
+ 	(Is_CCG_Supported_Aggregate): Return False for records with
+ 	representation clauses and fix the logic for dealing with nested
+ 	aggregates.
+ 
+ 2019-07-04  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* opt.adb (Set_Config_Switches): Keep assertions policy as
+ 	enabled when analysing internal units in GNATprove mode.
+ 
+ 2019-07-04  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* exp_ch4.adb (Expand_Short_Circuit_Operator): Strip
+ 	N_Variable_Reference_Marker when checking for the presence of
+ 	actions.
+ 
+ 2019-07-04  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* exp_aggr.adb (Check_Component): Take into account type
+ 	conversions.
+ 
+ 2019-07-04  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* doc/gnat_ugn/platform_specific_information.rst: Document
+ 	Windows socket timeout particularity.
+ 	* gnat_ugn.texi: Regenerate.
+ 	* gsocket.h: Include versionhelpers.h.
+ 	* socket.c (__gnat_minus_500ms): New function.
+ 	* libgnat/g-sothco.ads (Minus_500ms_Windows_Timeout): New
+ 	imported function.
+ 	* libgnat/g-socket.adb (Set_Socket_Option): Refactor to remove
+ 	500ms from the requested timeout only on old Windows version.
+ 
+ 2019-07-04  Thomas Quinot  <quinot@adacore.com>
+ 
+ 	* get_scos.adb: Remove bogus, dead code.
+ 
+ 2019-07-04  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_dim.adb (Analyze_Dimension_Array_Aggregate): If the
+ 	component is an entity name, its dimensions are those of its
+ 	type.
+ 
+ 2019-07-03  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_ugn/gnat_utility_programs.rst: Document new flags in
+ 	GNATpp.
+ 
+ 2019-07-03  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* binde.adb: Remove with clause for System.OS_Lib.
+ 	(Force_Elab_Order): Refactor the majority of the code in Butil.
+ 	Use the new forced units iterator to obtain unit names.
+ 	* bindo-builders.adb: Add with and use clauses for Binderr,
+ 	Butil, Opt, Output, Types, GNAT, and GNAT.Dynamic_HTables.  Add
+ 	a hash table which maps units to line number in the forced
+ 	elaboration order file.
+ 	(Add_Unit): New routine.
+ 	(Build_Library_Graph): Create forced edges between pairs of
+ 	units listed in the forced elaboration order file.
+ 	(Create_Forced_Edge, Create_Forced_Edges, Destroy_Line_Number,
+ 	Duplicate_Unit_Error, Hash_Unit, Internal_Unit_Info,
+ 	Is_Duplicate_Unit, Missing_Unit_Info): New routines.
+ 	* bindo-graphs.adb (Is_Internal_Unit, Is_Predefined_Unit):
+ 	Refactor some of the behavior to Bindo-Units.
+ 	* bindo-graphs.ads: Enable the enumeration literal for forced
+ 	edges.
+ 	* bindo-units.adb, bindo-units.ads (Is_Internal_Unit,
+ 	Is_Predefined_Unit): New routines.
+ 	* butil.adb: Add with and use clauses for Opt, GNAT, and
+ 	System.OS_Lib.  Add with clause for Unchecked_Deallocation.
+ 	(Has_Next, Iterate_Forced_Units, Next, Parse_Next_Unit_Name,
+ 	Read_Forced_Elab_Order_File): New routines.
+ 	* butil.ads: Add with and use clauses for Types.  Add new
+ 	iterator over the units listed in the forced elaboration order
+ 	file.
+ 	(Has_Next, Iterate_Forced_Units, Next): New routine.
+ 	* namet.adb, namet.ads (Present): New routine.
+ 
+ 2019-07-03  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_ch3.adb (Access_Definition): The code was creating a
+ 	master in the case where the designated type is a class-wide
+ 	interface type. Create a master in the noninterface case as
+ 	well. That is, create a master for all limited class-wide types.
+ 
+ 2019-07-03  Yannick Moy  <moy@adacore.com>
+ 
+ 	* erroutc.adb (Sloc_In_Range): New function to determine whether
+ 	the range of a pragma Warnings covers a location, taking
+ 	instantiations into account.
+ 
+ 2019-07-03  Johannes Kanig  <kanig@adacore.com>
+ 
+ 	* osint.ads, osint.adb (Get_First_Main_File_Name): New routine
+ 	to access the first file provided on the command line.
+ 
+ 2019-07-03  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* inline.adb (Process_Formals_In_Aspects): New procedure within
+ 	Expand_Inlined_Call, to perform a replacement of references to
+ 	formals that appear in aspect specifications within the body
+ 	being inlined.
+ 
+ 2019-07-03  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* sem_ch8.adb (Analyze_Object_Renaming): Add call to search for
+ 	the appropriate actual subtype of the object renaming being
+ 	analyzed.
+ 	(Check_Constrained_Object): Minor cleanup.
+ 
+ 2019-07-03  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb (Get_Observed_Or_Borrowed_Expr): New function to
+ 	return go through traversal function call.
+ 	(Check_Type): Consistently use underlying type.
+ 	(Get_Perm): Adapt for case of elaboration code where variables
+ 	are not declared in the environment. Remove incorrect handling
+ 	of borrow and observe.
+ 
+ 2019-07-03  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* inline.adb (Build_Return_Object_Formal): New routine.
+ 	(Can_Split_Unconstrained_Function): Code clean up.
+ 	(Copy_Formals,Copy_Return_Object): New routines.
+ 	(Split_Unconstrained_Function): Code clean up and refactoring.
+ 
+ 2019-07-03  Gary Dismukes  <dismukes@adacore.com>
+ 
+ 	* bindo-augmentors.adb, bindo-augmentors.ads,
+ 	bindo-builders.ads, bindo-elaborators.adb, sem_ch12.adb,
+ 	sem_ch13.adb, sem_spark.adb, sinfo.ads: Minor editorial
+ 	corrections and reformatting.
+ 
+ 2019-07-03  Bob Duff  <duff@adacore.com>
+ 
+ 	* sem_warn.adb (Check_Infinite_Loop_Warning): Avoid the warning
+ 	if an Iterator_Specification is present.
+ 
+ 2019-07-03  Bob Duff  <duff@adacore.com>
+ 
+ 	* doc/gnat_ugn/gnat_utility_programs.rst: Document default
+ 	new-line behavior.
+ 
+ 2019-07-03  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* ali.adb: Add with and use clauses for GNAT,
+ 	GNAT.Dynamic_HTables, and Snames.  Add a map from invocation
+ 	signature records to invocation signature ids.  Add various
+ 	encodings of invocation-related attributes.  Sort and update
+ 	table Known_ALI_Lines.
+ 	(Add_Invocation_Construct, Add_Invocation_Relation,
+ 	Body_Placement_Kind_To_Code, Code_To_Body_Placement_Kind,
+ 	Code_To_Invocation_Construct_Kind, Code_To_Invocation_Kind,
+ 	Code_To_Invocation_Graph_Line_Kind, Destroy, Hash): New
+ 	routines.
+ 	(Initialize_ALI): Sort the initialization sequence. Add
+ 	initialization for all invocation-related tables.
+ 	(Invocation_Construct_Kind_To_Code,
+ 	Invocation_Graph_Line_Kind_To_Code, Invocation_Kind_To_Code,
+ 	Invocation_Signature_Of, Present): New routines.
+ 	(Scan_ALI): Add the default values for invocation-related ids.
+ 	Scan invocation graph lines.
+ 	(Scan_Invocation_Graph_Line): New routine.
+ 	* ali.ads: Add with clause for GNAT.Dynamic_Tables.  Add types
+ 	for invocation constructs, relations, and signatures.  Add
+ 	tables for invocation constructs, relations, and signatures.
+ 	Update Unit_Record to capture invocation-related ids.  Relocate
+ 	table Unit_Id_Tables and subtypes Unit_Id_Table, Unit_Id_Array
+ 	from Binde.
+ 	(Add_Invocation_Construct, Add_Invocation_Relation,
+ 	Body_Placement_Kind_To_Code, Code_To_Body_Placement_Kind,
+ 	Code_To_Invocation_Construct_Kind, Code_To_Invocation_Kind,
+ 	Code_To_Invocation_Graph_Line_Kind,
+ 	Invocation_Construct_Kind_To_Code,
+ 	Invocation_Graph_Line_Kind_To_Code, Invocation_Kind_To_Code,
+ 	Invocation_Signature_Of, Present): New routines.
+ 	* binde.adb: Add with and use clause for Types.  Add use clause
+ 	for ALI.Unit_Id_Tables;
+ 	* binde.ads: Relocate table Unit_Id_Tables and subtypes
+ 	Unit_Id_Table, Unit_Id_Array to ALI.
+ 	* bindgen.adb: Remove with and use clause for ALI.
+ 	* bindgen.ads: Remove with and use clause for Binde.  Add with
+ 	and use clause for ALI.
+ 	* bindo.adb,  bindo.ads, bindo-augmentors.adb,
+ 	bindo-augmentors.ads, bindo-builders.adb, bindo-builders.ads,
+ 	bindo-diagnostics.adb, bindo-diagnostics.ads,
+ 	bindo-elaborators.adb, bindo-elaborators.ads, bindo-graphs.adb,
+ 	bindo-graphs.ads, bindo-units.adb, bindo-units.ads,
+ 	bindo-validators.adb, bindo-validators.ads, bindo-writers.adb,
+ 	bindo-writers.ads: New units.
+ 	* debug.adb: Use and describe GNAT debug switches -gnatd_F and
+ 	-gnatd_G.  Add GNATbind debug switches in the ranges dA .. dZ,
+ 	d.a .. d.z, d.A .. d.Z, d.1 .. d.9, d_a .. d_z, d_A .. d_Z, and
+ 	d_1 .. d_9.  Use and describe GNATbind debug switches -d_A,
+ 	-d_I, -d_L, -d_N, -d_O, -d_T, and -d_V.
+ 	* exp_util.adb, exp_util.ads (Exceptions_OK): Relocate to
+ 	Sem_Util.
+ 	* gnatbind.adb: Add with and use clause for Bindo.  Use the new
+ 	Bindo elaboration order only when -d_N is in effect.
+ 	* lib-writ.adb
+ 	(Column, Extra, Invoker, Kind, Line, Locations, Name, Placement,
+ 	Scope, Signature, Target): New routines.
+ 	(Write_ALI): Output all invocation-related data.
+ 	(Write_Invocation_Graph): New routine.
+ 	* lib-writ.ads: Document the invocation graph ALI line.
+ 	* namet.adb, namet.ads (Present): New routines.
+ 	* sem_ch8.adb (Find_Direct_Name): Capture the status of
+ 	elaboration checks and warnings of an identifier.
+ 	(Find_Expanded_Name): Capture the status of elaboration checks
+ 	and warnings of an expanded name.
+ 	* sem_ch12.adb (Analyze_Generic_Package_Declaration): Ensure
+ 	that invocation graph-related data within the body of the main
+ 	unit is encoded in the ALI file.
+ 	(Analyze_Generic_Subprogram_Declaration): Ensure that invocation
+ 	graph-related data within the body of the main unit is encoded
+ 	in the ALI file.
+ 	(Analyze_Package_Instantiation): Perform minimal decoration of
+ 	the instance entity.
+ 	(Analyze_Subprogram_Instantiation): Perform minimal decoration
+ 	of the instance entity.
+ 	* sem_elab.adb: Perform heavy refactoring of all code. The unit
+ 	is now split into "services" which specialize in one area of ABE
+ 	checks.  Add processing in order to capture invocation-graph
+ 	related attributes of the main unit, and encode them in the ALI
+ 	file.  The Processing phase can now operate in multiple modes,
+ 	all described by type Processing_Kind.  Scenarios and targets
+ 	are now distinct at the higher level, and carry their own
+ 	representations. This eliminates the need to constantly
+ 	recompute their attributes, and offers the various processors a
+ 	uniform interface.  The various initial states of the Processing
+ 	phase are now encoded using type Processing_In_State, and
+ 	xxx_State constants.
+ 	* sem_elab.ads: Update the literals of type
+ 	Enclosing_Level_Kind.  Add Inline pragmas on several routines.
+ 	* sem_prag.adb (Process_Inline): Ensure that invocation
+ 	graph-related data within the body of the main unit is encoded
+ 	in the ALI file.
+ 	* sem_util.adb (Enclosing_Generic_Body, Enclosing_Generic_Unit):
+ 	Code clean up.
+ 	(Exceptions_OK): Relocated from Sem_Util.
+ 	(Mark_Save_Invocation_Graph_Of_Body): New routine.
+ 	* sem_util.ads (Exceptions_OK): Relocated from Sem_Util.
+ 	(Mark_Save_Invocation_Graph_Of_Body): New routine.
+ 	* sinfo.adb (Is_Elaboration_Checks_OK_Node): Now applicable to
+ 	N_Variable_Reference_Marker.
+ 	(Is_Elaboration_Warnings_OK_Node): Now applicable to
+ 	N_Expanded_Name, N_Identifier, N_Variable_Reference_Marker.
+ 	(Is_Read): Use Flag4.
+ 	(Is_SPARK_Mode_On_Node): New applicable to
+ 	N_Variable_Reference_Marker.
+ 	(Is_Write): Use Flag5.
+ 	(Save_Invocation_Graph_Of_Body): New routine.
+ 	(Set_Is_Elaboration_Checks_OK_Node): Now applicable to
+ 	N_Variable_Reference_Marker.
+ 	(Set_Is_Elaboration_Warnings_OK_Node): Now applicable to
+ 	N_Expanded_Name, N_Identifier, N_Variable_Reference_Marker.
+ 	(Set_Is_SPARK_Mode_On_Node): New applicable to
+ 	N_Variable_Reference_Marker.
+ 	(Set_Save_Invocation_Graph_Of_Body): New routine.
+ 	* sinfo.ads: Update the documentation of attributes
+ 	Is_Elaboration_Checks_OK_Node, Is_Elaboration_Warnings_OK_Node,
+ 	Is_SPARK_Mode_On_Node.  Update the flag usage of attributes
+ 	Is_Read, Is_Write.  Add attribute Save_Invocation_Graph_Of_Body
+ 	and update its occurrence in nodes.
+ 	(Save_Invocation_Graph_Of_Body): New routine along with pragma
+ 	Inline.
+ 	(Set_Save_Invocation_Graph_Of_Body): New routine along with
+ 	pragma Inline.
+ 	* switch-b.adb (Scan_Binder_Switches): Refactor the scanning of
+ 	debug switches.
+ 	(Scan_Debug_Switches): New routine.
+ 	* libgnat/g-dynhta.adb, libgnat/g-dynhta.ads (Contains): New routine.
+ 	* libgnat/g-graphs.adb (Associate_Vertices): Update the use of
+ 	Component_Vertex_Iterator.
+ 	(Contains_Component, Contains_Edge, Contains_Vertex, Has_Next):
+ 	Reimplemented.
+ 	(Iterate_Component_Vertices): New routine.
+ 	(Iterate_Vertices): Removed.
+ 	(Next): Update the parameter profile.
+ 	(Number_Of_Component_Vertices, Number_Of_Outgoing_Edges): New
+ 	routines.
+ 	* libgnat/g-graphs.ads: Update the initialization of
+ 	No_Component.  Add type Component_Vertex_Iterator.  Remove type
+ 	Vertex_Iterator.
+ 	(Has_Next): Add new versions and remove old ones.
+ 	(Iterate_Component_Vertices): New routine.
+ 	(Iterate_Vertices): Removed.
+ 	(Next): Add new versions and remove old ones.
+ 	(Number_Of_Component_Vertices, Number_Of_Outgoing_Edges): New
+ 	routines.
+ 	* libgnat/g-sets.adb (Contains): Reimplemented.
+ 	* gcc-interface/Make-lang.in (GNATBIND_OBJS): Add
+ 	GNAT.Dynamic_HTables, GNAT.Graphs and Bindo units.
+ 	* rtsfind.ads: Remove extra space.
+ 
+ 2019-07-03  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb: Add support for locally borrowing and observing
+ 	a path.
+ 	(Get_Root_Object): Add parameter Through_Traversal to denote
+ 	when we are interesting in getting to the traversed parameter.
+ 	(Is_Prefix_Or_Almost): New function to support detection of
+ 	illegal access to borrowed or observed paths.
+ 	(Check_Pragma): Add analysis of assertion pragmas.
+ 
+ 2019-07-03  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch13.adb (Build_Predicate_Functions): In a generic context
+ 	we do not build the bodies of predicate fuctions, but the
+ 	expression in a static predicate must be elaborated to allow
+ 	case coverage checking within the generic unit.
+ 	(Build_Discrete_Static_Predicate): In a generic context, return
+ 	without building function body once the
+ 	Static_Discrete_Predicate expression for the type has been
+ 	constructed.
+ 
+ 2019-07-03  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* bindgen.adb, inline.adb, layout.adb, sem_ch12.adb,
+ 	sem_ch13.adb, sem_ch7.adb, styleg.adb: Minor reformatting.
+ 
+ 2019-07-03  Bob Duff  <duff@adacore.com>
+ 
+ 	* par-ch3.adb (P_Defining_Identifier): Call
+ 	Check_Defining_Identifier_Casing.
+ 	* style.ads, styleg.ads, styleg.adb
+ 	(Check_Defining_Identifier_Casing): New procedure to check for
+ 	mixed-case defining identifiers.
+ 	* stylesw.ads, stylesw.adb (Style_Check_Mixed_Case_Decls): New
+ 	flag for checking for mixed-case defining identifiers.
+ 	* doc/gnat_ugn/building_executable_programs_with_gnat.rst:
+ 	Document new feature.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-07-03  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* doc/gnat_ugn/building_executable_programs_with_gnat.rst
+ 	(Warning message control): Document that -gnatw.z/Z apply to
+ 	array types.
+ 	* freeze.adb (Freeze_Entity): Give -gnatw.z warning for array
+ 	types as well, but not if the specified alignment is the minimum
+ 	one.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-07-03  Bob Duff  <duff@adacore.com>
+ 
+ 	* einfo.ads, exp_util.adb, layout.ads, sinfo.ads: Spell "laid"
+ 	correctly.
+ 
+ 2019-07-03  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch13.adb (Analyze_Attribute_Definition_Clause): No error
+ 	message on attribute applied to a renaming when the renamed
+ 	object is an aggregate (from code reading).
+ 	(Check_Aspect_At_End_Of_Declarations): In a generic context
+ 	where freeze nodes are not generated, the original expression
+ 	for an aspect may need to be analyzed to precent spurious
+ 	conformance errors when compared with the expression that is
+ 	anakyzed at the end of the current declarative list.
+ 
+ 2019-07-03  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* layout.adb (Layout_Type): Do not set the component size of an
+ 	array with a scalar component if the component type is
+ 	overaligned.
+ 
+ 2019-07-03  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* inline.adb (Make_Loop_Labels_Unique): New procedure to modify
+ 	the source code of subprograms that are inlined by the
+ 	front-end, to prevent accidental duplication between loop labels
+ 	in the inlined code and the code surrounding the inlined call.
+ 
+ 2019-07-03  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* doc/gnat_ugn/elaboration_order_handling_in_gnat.rst: Update
+ 	the section on resolving elaboration circularities to eliminate
+ 	certain combinations of switches which together do not produce
+ 	the desired effect and confuse users.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-07-03  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* bindgen.adb (Gen_Main): Disable generation of reference to
+ 	Ada_Main_Program_Name for CCG.
+ 	* bindusg.adb (Display): Add -G to the command-line usage for
+ 	gnatbind.
+ 	* opt.ads (Generate_C_Code): Update comment.
+ 	* switch-b.adb (Scan_Binder_Switches): Add handling for -G.
+ 
+ 2019-07-03  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* sem_ch7.adb (Has_Referencer): Do not consider inlined
+ 	subprograms when generating C code, which allows us to generate
+ 	static inline subprograms.
+ 
+ 2019-07-03  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* sem_ch6.adb (Check_Conformance): Add expression checking for
+ 	constant modifiers in anonymous access types (in addition to
+ 	"non-null" types) so that they are considered "matching" for
+ 	subsequent conformance tests.
+ 
+ 2019-07-03  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* doc/gnat_rm/standard_and_implementation_defined_restrictions.rst:
+ 	Clarify wording on No_Multiple_Elaboration.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-07-03  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch8.adb (Find_Selected_Component): If the prefix is the
+ 	current instance of a type or subtype, complete the resolution
+ 	of the name by finding the component of the type denoted by the
+ 	selector name.
+ 
+ 2019-07-03  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* doc/gnat_rm/interfacing_to_other_languages.rst (Interfacing to C):
+ 	Document that boolean types with convention C now map to C99 bool.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-07-03  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_attr.adb (Expand_Min_Max_Attribute): Code cleanup:
+ 	removing code that it is now never executed in the CCG compiler
+ 	(dead code).
+ 
+ 2019-07-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* libgnat/system-darwin-ppc.ads: Set Stack_Check_Probes True for
+ 	PPC Darwin.
+ 
+ 2019-07-01  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch12.adb (Is_Defaulted): New predicate in
+ 	Check_Formal_Package_Intance, to skip the conformance of checks
+ 	on parameters of a formal package that are defaulted,
+ 
+ 2019-07-01  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* checks.adb, exp_ch9.adb, exp_unst.adb, sem_ch4.adb,
+ 	sem_prag.adb, sem_spark.adb: Minor reformatting.
+ 
+ 2019-07-01  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_attr.adb (Analyze_Attribute, case Enum_Rep): Allow prefix
+ 	of attribute to be an attribute reference of a discrete type.
+ 
+ 2019-07-01  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch12.adb (Analyze_Subprogram_Instantiation): Move up
+ 	handling of Has_Pragma_Inline_Always and deal with
+ 	Has_Pragma_No_Inline.
+ 
+ 2019-07-01  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_ch3.adb (Build_Derived_Record_Type): If the parent type is
+ 	declared as a subtype of a private type with an inherited
+ 	discriminant constraint, its generated full base appears as a
+ 	record subtype, so we need to retrieve its oen base type so that
+ 	the inherited constraint can be applied to it.
+ 
+ 2019-07-01  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_spark.adb: Completely rework the algorithm for ownership
+ 	checking, as the rules in SPARK RM have changed a lot.
+ 	* sem_spark.ads: Update comments.
+ 
+ 2019-07-01  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* gsocket.h (Has_Sockaddr_Len): Use the offset of sin_family offset in
+ 	the sockaddr_in structure to determine the existence of length field
+ 	before the sin_family.
+ 
+ 2019-07-01  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* sem_prag.adb (Analyze_Pragma, case Weak_External): Pragma only
+ 	applies to entities with run-time addresses, not to types.
+ 
+ 2019-07-01  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* einfo.adb, sem_ch7.adb, sem_prag.adb, sem_util.adb: Update
+ 	references to the SPARK RM after the removal of Rule 7.1.4(5).
+ 
+ 2019-07-01  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* sysdep.c: Cleanup references to LynuxWorks in docs and
+ 	comments.
+ 
+ 2019-07-01  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* checks.adb (Insert_Valid_Check): Do not apply validity check
+ 	to variable declared within a protected object that uses the
+ 	Lock_Free implementation, to prevent unwarranted constant
+ 	folding, because entities within such an object msut be treated
+ 	as volatile.
+ 
+ 2019-07-01  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* exp_ch9.adb (Check_Inlining): Deal with Has_Pragma_No_Inline.
+ 
+ 2019-07-01  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_unst.adb (Visit_Node, Check_Static_Type): Improve the
+ 	handling of private and incomplete types whose full view is an
+ 	access type, to detect additional uplevel references in dynamic
+ 	bounds. This is relevant to N_Free_Statement among others that
+ 	manipulate types whose full viww may be an access type.
+ 
+ 2019-07-01  Pat Rogers  <rogers@adacore.com>
+ 
+ 	* doc/gnat_rm/representation_clauses_and_pragmas.rst: Correct
+ 	size indicated for R as a component of an array.
+ 	* gnat_rm.texi: Regenerate.
+ 
+ 2019-07-01  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* libgnat/s-win32.ads: Add definition for ULONG, modify
+ 	OVERLAPPED type, and add appropriate pragmas.
+ 
+ 2019-07-01  Bob Duff  <duff@adacore.com>
+ 
+ 	* gnat1drv.adb (gnat1drv): Call Write_ALI if the main unit is
+ 	ignored-ghost.
+ 
+ 2019-07-01  Yannick Moy  <moy@adacore.com>
+ 
+ 	* sem_ch4.adb (Operator_Check): Refine error message.
+ 
+ 2019-07-01  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* libgnat/a-calend.ads: Revert "Global => null" contracts on
+ 	non-pure routines.
+ 
+ 2019-07-01  Piotr Trojanek  <trojanek@adacore.com>
+ 
+ 	* exp_attr.adb, libgnat/g-graphs.ads: Fix typos in comments:
+ 	componant -> component.
+ 
+ 2019-07-01  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* libgnat/g-graphs.adb: Use type Directed_Graph rather than
+ 	Instance in various routines.
+ 	* libgnat/g-graphs.ads: Change type Instance to Directed_Graph.
+ 	Update various routines that mention the type.
+ 
+ 2019-07-01  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* libgnat/g-sets.adb: Use type Membership_Set rathern than
+ 	Instance in various routines.
+ 	* libgnat/g-sets.ads: Change type Instance to Membership_Set.
+ 	Update various routines that mention the type.
+ 
+ 2019-07-01  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* libgnat/g-lists.adb: Use type Doubly_Linked_List rather than
+ 	Instance in various routines.
+ 	* libgnat/g-lists.ads: Change type Instance to
+ 	Doubly_Linked_List. Update various routines that mention the
+ 	type.
+ 
+ 2019-07-01  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* libgnat/g-dynhta.adb: Use type Dynamic_Hash_Table rather than
+ 	Instance in various routines.
+ 	* libgnat/g-dynhta.ads: Change type Instance to
+ 	Dynamic_Hash_Table. Update various routines that mention the
+ 	type.
+ 
+ 2019-07-01  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* exp_attr.adb, exp_ch7.adb, exp_unst.adb, sem_ch3.adb,
+ 	sem_util.adb, uintp.adb, uintp.ads: Minor reformatting.
+ 
+ 2019-07-01  Javier Miranda  <miranda@adacore.com>
+ 
+ 	* exp_attr.adb (Expand_Min_Max_Attribute): Disable expansion of
+ 	'Min/'Max on integer, enumeration, fixed point and floating
+ 	point types since the CCG backend now provides in file
+ 	standard.h routines to support it.
+ 
+ 2019-07-01  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* impunit.adb: Add GNAT.Graphs to list Non_Imp_File_Names_95.
+ 	* Makefile.rtl, gcc-interface/Make-lang.in: Register unit
+ 	GNAT.Graphs.
+ 	* libgnat/g-dynhta.adb: Various minor cleanups (use Present
+ 	rather than direct comparisons).
+ 	(Delete): Reimplement to use Delete_Node.
+ 	(Delete_Node): New routine.
+ 	(Destroy_Bucket): Invoke the provided destructor.
+ 	(Present): New routines.
+ 	* libgnat/g-dynhta.ads: Add new generic formal Destroy_Value.
+ 	Use better names for the components of iterators.
+ 	* libgnat/g-graphs.adb, libgnat/g-graphs.ads: New unit.
+ 	* libgnat/g-lists.adb: Various minor cleanups (use Present
+ 	rather than direct comparisons).
+ 	(Delete_Node): Invoke the provided destructor.
+ 	(Present): New routine.
+ 	* libgnat/g-lists.ads: Add new generic formal Destroy_Element.
+ 	Use better names for the components of iterators.
+ 	(Present): New routine.
+ 	* libgnat/g-sets.adb, libgnat/g-sets.ads (Destroy, Preset,
+ 	Reset): New routines.
+ 
+ 2019-07-01  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	* libgnat/g-sothco.adb (Get_Address): Fix the case when AF_INET6
+ 	is not defined.
+ 
+ 2019-07-01  Ed Schonberg  <schonberg@adacore.com>
+ 
+ 	* exp_attr.adb (Expand_Attribute_Reference, case Invalid_Value):
+ 	Resolve result of call to Get_Simple_Init_Val, which may be a
+ 	conversion of a literal.
+ 
+ 2019-07-01  Hristian Kirtchev  <kirtchev@adacore.com>
+ 
+ 	* freeze.adb (Freeze_Expression): Remove the horrible useless
+ 	name hiding of N. Insert the freeze nodes generated by the
+ 	expression prior to the expression when the nearest enclosing
+ 	scope is transient.
+ 
+ 2019-07-01  Pierre-Marie de Rodat  <derodat@adacore.com>
+ 
+ 	* doc/gnat_ugn/building_executable_programs_with_gnat.rst: Fix
+ 	formatting issues in the -gnatR section.
+ 	* gnat_ugn.texi: Regenerate.
+ 
+ 2019-06-30  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* gnatlink.adb (Link_Step): Remove duplicate -static-libgcc switches.
+ 	Push -shared-libgcc explicitly, when it is the target default (unless
+ 	overidden by the static flag).
+ 	When the user has put an instance of shared/static-libgcc do not push
+ 	a duplicate of this.
+ 
+ 2019-06-29  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (gnat_to_gnu_entity): Beep up comment on SAVED,
+ 	and tweak comment on the assertion about the scopes of Itypes.  Do not
+ 	skip the regular processing for Itypes that are E_Record_Subtype with
+ 	a Cloned_Subtype.  Get the Cloned_Subtype for every E_Record_Subtype
+ 	if the type is dummy and hasn't got its own freeze node.
+ 	<E_Record_Subtype>: Save again the DECL of the Cloned_Subtype, if any.
+ 	<E_Access_Subtype>: Save again the DECL of the equivalent type.
+ 	(Gigi_Equivalent_Type) <E_Access_Subtype>: New case.
+ 
+ 2019-06-29  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/utils.c (unchecked_convert): Tweak comment.  Only skip
+ 	dereferences when padding to have the same size on both sides.  Do it
+ 	for destination types with self-referential size too.
+ 
+ 2019-06-29  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Record_Type>: If the
+ 	type requires strict alignment, then set the RM size to the type size.
+ 	Rework handling of alignment and sizes of tagged types in ASIS mode.
+ 	(validate_size): Rename local variable and remove special handling for
+ 	strict-alignment types.
+ 	* gcc-interface/utils.c (finish_record_type): Constify local variables
+ 	and use properly typed constants.
+ 
+ 2019-06-29  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (gnat_to_gnu_field): Rework error messages for
+ 	fields requiring strict alignment, add explicit test on Storage_Unit
+ 	for position and size, and mention type alignment for position.
+ 
+ 2019-06-29  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (mark_visited_r): Set TYPE_SIZES_GIMPLIFIED on
+ 	the main variant of a type, if any.
+ 
+ 2019-06-29  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (set_nonaliased_component_on_array_type): Add
+ 	missing guard for the presence of TYPE_CANONICAL.
+ 	(set_reverse_storage_order_on_array_type): Likewise.
+ 
+ 2019-06-29  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/gigi.h (make_packable_type): Remove default value.
+ 	(value_factor_p): Tweak prototype.
+ 	* gcc-interface/decl.c (gnat_to_gnu_entity): Add comment.
+ 	(gnat_to_gnu_component_type): Likewise.
+ 	(gnat_to_gnu_field): Likewise.  Fetch the position of the field earlier
+ 	and simplify the condition under which the type is packed.  Declare
+  	local variable is_bitfield.  Pass 1 as max_align to make_packable_type
+ 	if it is set to true.
+ 	(copy_and_substitute_in_layout): Pass 0 to make_packable_type.
+ 	* gcc-interface/utils.c (make_packable_array_type): New function.
+ 	(make_packable_type): Use it to rewrite the type of array field.
+ 	(maybe_pad_type): Pass align parameter to make_packable_type.
+ 	(create_field_decl): Minor tweaks.
+ 	(value_factor_p): Assert that FACTOR is a power of 2 and replace the
+ 	modulo computation by a masking operation.
+ 
+ 2019-06-25  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (gnat_to_gnu_entity): Remove superfluous test
+ 	in previous change.
+ 	* gcc-interface/gigi.h (maybe_character_type): Fix formatting.
+ 	(maybe_character_value): Likewise.
+ 
+ 2019-06-24  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* gcc-interface/decl.c (gnat_to_gnu_entity): Check that
+ 	type is array or integer prior checking string flag.
+ 	* gcc-interface/gigi.h (maybe_character_type): Likewise.
+ 	(maybe_character_value): Likewise.
+ 
+ 2019-06-24  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* gcc-interface/utils.c (handle_nonnull_attribute): Quote attribute
+ 	name.
+ 
+ 2019-06-18  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	PR ada/80590
+ 	* sem_ch5.adb (Analyze_Loop_Statement): Avoid exception propagation
+ 	during normal processing.
+ 
+ 2019-06-17  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	PR ada/80590
+ 	* exp_ch9.adb (Expand_N_Delay_Relative_Statement): Swap the two
+ 	conditions to avoid a unnecessary exception propagation in the default
+ 	case.
+ 
+ 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/utils.c (handle_stack_protect_attribute): Move around.
+ 
+ 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* doc/gnat_rm/implementation_defined_pragmas.rst (Machine_Attribute):
+ 	Document additional optional parameters.
+ 	* sem_prag.adb (Analyze_Pragma) <Pragma_Machine_Attribute>: Accept
+ 	more than one optional parameter.
+ 	* gcc-interface/decl.c (prepend_one_attribute_pragma): Alphabetize
+ 	the list of supported pragmas.  Simplify the handling of parameters
+ 	and add support for more than one optional parameter.
+ 	* gcc-interface/utils.c (attr_cold_hot_exclusions): New constant.
+ 	(gnat_internal_attribute_table): Add entry for no_icf, noipa, flatten,
+ 	used, cold, hot, target and target_clones.
+ 	(begin_subprog_body): Do not create the RTL for the subprogram here.
+ 	(handle_noicf_attribute): New static function.
+ 	(handle_noipa_attribute): Likewise.
+ 	(handle_flatten_attribute): Likewise.
+ 	(handle_used_attribute): Likewise.
+ 	(handle_cold_attribute): Likewise.
+ 	(handle_hot_attribute): Likewise.
+ 	(handle_target_attribute): Likewise.
+ 	(handle_target_clones_attribute): Likewise.
+ 
+ 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (lvalue_required_for_attribute_p): Return 0
+ 	for 'Size too.
+ 	(Identifier_to_gnu): Use the actual subtype for a reference to a
+ 	packed array in a return statement.
+ 	(Attribute_to_gnu) <Attr_Size>: Do not strip VIEW_CONVERT_EXPRs from
+ 	the prefix in every case.
+ 
+ 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (gnat_to_gnu): Remove superfluous tests on
+ 	Backend_Overflow_Checks_On_Target and rework comments.
+ 
+ 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (walk_nesting_tree): New static function.
+ 	(finalize_nrv): Use it to walk the entire nesting tree.
+ 
+ 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Record_Subtype>: Remove
+ 	obsolete test on Is_For_Access_Subtype.
+ 
+ 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (components_to_record): Set a name on the type
+ 	created for the REP part, if any.
+ 	* gcc-interface/utils.c (finish_record_type): Only take the maximum
+ 	when merging sizes for a variant part at offset 0.
+ 	(merge_sizes): Rename has_rep parameter into max.
+ 
+ 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/utils.c (gnat_internal_attribute_table): Add support
+ 	for stack_protect attribute.
+ 	(handle_stack_protect_attribute): New static function.
+ 
+ 2019-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (intrin_arglists_compatible_p): Do not return
+ 	false if the internal builtin uses a variable list.
+ 
+ 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (Call_to_gnu): Do not initialize the temporary
+ 	created out of addressability concerns if it's for the _Init parameter
+ 	of an initialization procedure.
+ 
+ 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/ada-builtin-types.def: New file.
+ 	* gcc-interface/ada-builtins.def: Likewise.
+ 	* gcc-interface/ada-tree.h (BUILT_IN_LIKELY): New macro.
+ 	(BUILT_IN_UNLIKELY): Likewise.
+ 	* gcc-interface/trans.c (independent_iterations_p): Initialize the
+ 	auto-vector to 16 elements.
+ 	(Call_to_gnu): Remove local variable and change the vector of actual
+ 	parameters to an auto-vector.  Do not convert actual parameters to
+ 	the argument type for front-end built-in functions.  Add support for
+ 	front-end built-in functions.
+ 	(build_noreturn_cond): Use internal instead of built-in function.
+ 	* gcc-interface/utils.c (c_builtin_type): Include ada-builtin-types.def
+ 	(install_builtin_function_types): Likewise.
+ 	(install_builtin_functions): Include ada-builtins.def first.
+ 
+ 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/utils.c (maybe_pad_type): Issue the warning for the
+ 	specific case of component types preferably.
+ 
+ 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (Identifier_to_gnu): Minor tweaks.
+ 	(gnat_to_gnu): Do not convert the result if it is a reference to an
+ 	unconstrained array used as the prefix of an attribute reference that
+ 	requires an lvalue.
+ 
+ 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (Gigi_Types_Compatible): New predicate.
+ 	(Identifier_to_gnu): Use it to assert that the type of the identifier
+ 	and that of its entity are compatible for gigi.  Rename a couple of
+ 	local variables and separate the processing of the result type.
+ 
+ 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (Call_to_gnu): Use the unpadded type when
+ 	putting back an intermediate conversion the type of the actuals.
+ 
+ 2019-05-27  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (gnat_to_gnu) <Shift operations>: Convert the
+ 	count to the unsigned version of its base type before proceeding.
+ 
+ 2019-05-16  Martin Sebor  <msebor@redhat.com>
+ 
+ 	* gcc-interface/trans.c (check_inlining_for_nested_subprog): Quote
+ 	reserved names.
+ 
+ 2019-05-08  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* standard.ads.h: New file.
+ 
+ 2019-05-07  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* gcc-interface/Makefile.in (install-gcc-specs): Use foreach.
+ 	Honor DESTDIR.
+ 
+ 2019-04-29  Michael K. Darling  <darlingm@gmail.com>
+ 
+ 	* gnatvsn.ads: Bump Library_Version to 10.
+ 
+ 2019-04-24  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+ 	    Bernd Edlinger  <bernd.edlinger@hotmail.de>
+ 	    Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/89093
+ 	* raise-gcc.c (TARGET_ATTRIBUTE): Define.
+ 	(continue_unwind, personality_body, PERSONALITY_FUNCTION): Add
+ 	TARGET_ATTRIBUTE.
+ 
+ 2019-04-07  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* libgnat/i-cexten.ads (CFloat_128): New type.
+ 
+ 2019-03-22  Dmitriy Anisimkov  <anisimko@adacore.com>
+ 
+ 	PR ada/89583
+ 	* libgnat/g-socket.adb (Bind_Socket, Connect_Socket,
+ 	Send_Socket): Fix the computation of structure lengths passed to
+ 	low level routines.
+ 	(Is_IPv6_Address): Fix the number of expected colons.
+ 
+ 2019-03-11  Martin Liska  <mliska@suse.cz>
+ 
+ 	* gcc-interface/misc.c (gnat_post_options): Wrap option name in string
+ 	format message and fix GNU coding style.
+ 
+ 2019-02-08  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (gnat_to_gnu) <N_Aggregate>: Minor tweak.
+ 	* gcc-interface/utils.c (convert): Do not pad when doing an unchecked
+ 	conversion here.  Use TREE_CONSTANT throughout the function.
+ 	(unchecked_convert): Also pad if the source is a CONSTRUCTOR and the
+ 	destination is a more aligned array type or a larger aggregate type,
+ 	but not between original and packable versions of a type.
+ 
+ 2019-02-08  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/utils.c (max_size) <tcc_unary>: Be prepared for an
+ 	operand with VOID_TYPE.
+ 
+ 2019-02-08  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (elaborate_all_entities): Do not elaborate the
+ 	entities of a package renaming another one.
+ 
+ 2019-02-08  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (Regular_Loop_to_gnu): Replace tests on
+ 	individual flag_unswitch_loops and flag_tree_loop_vectorize switches
+ 	with test on global optimize switch.
+ 	(Raise_Error_to_gnu): Likewise.
+ 
+ 2019-02-07  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* libgnarl/s-linux__sparc.ads (ETIMEDOUT): Set to correct value.
+ 
+ 2019-02-06  Arnaud Charlet  <charlet@adacore.com>
+ 
+ 	* libgnarl/s-linux__x32.ads: Resync list of signals with s-linux.ads
+ 
+ 2019-01-27  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* repinfo.adb (List_Component_Layout): Remove superfluous space for
+ 	zero-sized field.
+ 	* gcc-interface/ada-tree.h (TYPE_IS_EXTRA_SUBTYPE_P): New macro.
+ 	* gcc-interface/gigi.h (create_extra_subtype): Declare.
+ 	* gcc-interface/decl.c (TYPE_ARRAY_SIZE_LIMIT): Likewise.
+ 	(update_n_elem): New function.
+ 	(gnat_to_gnu_entity): Use create_extra_subtype to create extra subtypes
+ 	instead of doing it manually.
+ 	<E_Array_Type>: Use update_n_elem to compute the maximum size.  Use the
+  	index type instead of base type for the bounds. Set TYPE_ARRAY_MAX_SIZE
+ 	of the array to the maximum size.
+ 	<E_Array_Subtype>: Create an extra subtype using the index type of the
+ 	base array type for self-referential bounds.  Use update_n_elem to
+ 	compute the maximum size.  Set TYPE_ARRAY_MAX_SIZE of the array to the
+ 	maximum size.
+ 	(gnat_to_gnu_field): Clear DECL_NONADDRESSABLE_P on discriminants.
+ 	* gcc-interface/misc.c (gnat_get_alias_set): Return the alias set of
+ 	the base type for an extra subtype.
+ 	(gnat_type_max_size): Remove obsolete code.
+ 	* gcc-interface/trans.c (Attribute_to_gnu): Minor tweak.
+ 	(can_be_lower_p): Deal with pathological types.
+ 	* gcc-interface/utils.c (create_extra_subtype): New function.
+ 	(create_field_decl): Minor tweak.
+ 	(max_size) <tcc_reference>: Compute a better value by using the extra
+  	subtypes on the self-referential bounds.
+ 	<tcc_binary>: Rewrite.  Deal with "negative value" in unsigned types.
+ 	<tcc_expression>: Likewise.
+ 	* gcc-interface/utils2.c (compare_arrays): Retrieve the original bounds
+ 	of the arrays upfront.  Swap only if the second length is not constant.
+ 	Use comparisons on the original bounds consistently for the null tests.
+ 	(build_binary_op): Use TYPE_IS_EXTRA_SUBTYPE_P macro.
+ 	(build_allocator): Minor tweak.
+ 
+ 2019-01-27  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (array_type_has_nonaliased_component): Return
+ 	the same value for every dimension of a multidimensional array type.
+ 
+ 2019-01-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (Regular_Loop_to_gnu): Use the SLOC of the
+ 	iteration scheme, if present, throughout the translation.
+ 
+ 2019-01-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (gnat_to_gnu) <N_Assignment_Statement>: Use
+ 	DECL_SIZE_UNIT instead of TYPE_SIZE_UNIT for the size to be assigned
+ 	by a call to memset if the LHS is a DECL.
+ 
+ 2019-01-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (struct loop_info_d): Remove artificial field.
+ 	(Loop_Statement_to_gnu): Do not set it.
+ 
+ 2019-01-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/trans.c (Iterate_Acc_Clause_Arg): Fix formatting.
+ 	(Acc_gnat_to_gnu): Likewise.
+ 	(Acc_Data_to_gnu): Likewise.
+ 	(Acc_Var_to_gnu): Likewise.
+ 	(Acc_Reduc_to_gnu): Likewise.
+ 	(Acc_Size_List_to_gnu): Likewise.
+ 	(Pragma_to_gnu) <Pragma_Acc_Loop>: Likewise.
+ 	<Pragma_Acc_Data>): Likewise.
+ 	(find_loop_for): Remove default value for parameters.
+ 	* gcc-interface/trans.c (gnat_to_gnu) <N_Op_And>: Merge into...
+ 	<N_Op_Eq>): ...this.
+ 
+ 2019-01-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.c (annotate_value) <INTEGER_CST>: Use test on
+ 	the sign bit instead of on the sign of the value.
+ 	<PLUS_EXPR>: Turn addition of negative constant into subtraction.
+ 	<MULT_EXPR>: Add test for degenerate case.
+ 	<BIT_AND_EXPR>: Simplify.
+ 
+ 2019-01-18  Sebastian Huber  <sebastian.huber@embedded-brains.de>
+ 
+ 	* s-oscons-tmplt.c (AF_INET6): Do not undefine for RTEMS.
+ 
+ 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	PR other/16615
+ 	* exp_ch11.adb: Change "can not" to "cannot".
+ 	* sem_ch4.adb: Likewise.
+ 
+ 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	PR other/16615
+ 	* exp_ch9.adb: Mechanically replace "can not" with "cannot".
+ 	* libgnat/s-regpat.ads: Likewise.
+ 	* par-ch4.adb: Likewise.
+ 	* set_targ.adb: Likewise.
+ 	* types.ads: Likewise.
+ 
+ 2019-01-08  Justin Squirek  <squirek@adacore.com>
+ 
+ 	Revert:
+ 	2018-07-31  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* lib-writ.adb (Write_With_Lines): Modfiy the generation
+ 	of dependencies within ali files so that source unit
+ 	bodies are properly listed even if said bodies are
+ 	missing.  Perform legacy behavior in GNATprove mode.
+ 	* lib-writ.ads: Modify documentation to reflect current
+ 	behavior.
+ 
+ 	and:
+ 	2018-09-26  Justin Squirek  <squirek@adacore.com>
+ 
+ 	* lib-writ.adb, lib-writ.ads (Write_With_Lines): Add
+ 	documentation and an extra conditional check for RCI
+ 	units so that generated ali files will list the spec
+ 	only instead of a body when a body is not found.
+ 
+ 2019-01-04  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnatvsn.ads: Bump copyright year.
+ 
+ 2019-01-01  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Update copyright years.
+ 
+  	* gnat_ugn.texi: Bump @copying's copyright year.
+  	* gnat_rm.texi: Likewise.
+ 
+ Copyright (C) 2019 Free Software Foundation, Inc.
+ 
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved.
diff -Nrcpad gcc-9.3.0/gcc/ada/Makefile.rtl gcc-10.1.0/gcc/ada/Makefile.rtl
*** gcc-9.3.0/gcc/ada/Makefile.rtl	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/Makefile.rtl	Thu May  7 10:49:59 2020
*************** GNATRTL_NONTASKING_OBJS= \
*** 171,176 ****
--- 171,177 ----
    a-cwila1$(objext) \
    a-cwila9$(objext) \
    a-decima$(objext) \
+   a-dhfina$(objext) \
    a-diocst$(objext) \
    a-direct$(objext) \
    a-direio$(objext) \
*************** GNATRTL_NONTASKING_OBJS= \
*** 204,209 ****
--- 205,212 ----
    a-lliwti$(objext) \
    a-llizti$(objext) \
    a-locale$(objext) \
+   a-nbnbin$(objext) \
+   a-nbnbre$(objext) \
    a-ncelfu$(objext) \
    a-ngcefu$(objext) \
    a-ngcoar$(objext) \
*************** GNATRTL_NONTASKING_OBJS= \
*** 223,228 ****
--- 226,232 ----
    a-nscefu$(objext) \
    a-nscoty$(objext) \
    a-nselfu$(objext) \
+   a-nubinu$(objext) \
    a-nucoar$(objext) \
    a-nucoty$(objext) \
    a-nudira$(objext) \
*************** GNATRTL_NONTASKING_OBJS= \
*** 387,392 ****
--- 391,397 ----
    g-arrspl$(objext) \
    g-awk$(objext) \
    g-binenv$(objext) \
+   g-brapre$(objext) \
    g-bubsor$(objext) \
    g-busora$(objext) \
    g-busorg$(objext) \
*************** GNATRTL_NONTASKING_OBJS= \
*** 421,426 ****
--- 426,432 ----
    g-exptty$(objext) \
    g-flocon$(objext) \
    g-forstr$(objext) \
+   g-graphs$(objext) \
    g-heasor$(objext) \
    g-hesora$(objext) \
    g-hesorg$(objext) \
*************** GNATRTL_NONTASKING_OBJS= \
*** 492,505 ****
--- 498,517 ----
    machcode$(objext) \
    s-addima$(objext) \
    s-addope$(objext) \
+   s-aotase$(objext) \
    s-arit64$(objext) \
    s-assert$(objext) \
    s-atacco$(objext) \
    s-atocou$(objext) \
+   s-atoope$(objext) \
+   s-atopar$(objext) \
+   s-atopex$(objext) \
    s-atopri$(objext) \
    s-auxdec$(objext) \
    s-bignum$(objext) \
+   s-bitfie$(objext) \
    s-bitops$(objext) \
+   s-bituti$(objext) \
    s-boarop$(objext) \
    s-boustr$(objext) \
    s-bytswa$(objext) \
*************** GNATRTL_NONTASKING_OBJS= \
*** 565,570 ****
--- 577,583 ----
    s-flocon$(objext) \
    s-fore$(objext)   \
    s-gearop$(objext) \
+   s-genbig$(objext) \
    s-geveop$(objext) \
    s-gloloc$(objext) \
    s-htable$(objext) \
*************** GCC_SPEC_FILES=
*** 866,872 ****
  # If what's left is null then it's a match.
  
  # PowerPC and e500v2 VxWorks
! ifeq ($(strip $(filter-out powerpc% wrs vxworks vxworksspe vxworks7 vxworks7spe,$(target_cpu) $(target_vendor) $(target_os))),)
  
    ifeq ($(strip $(filter-out e500%, $(target_alias))),)
       ARCH_STR=e500
--- 879,885 ----
  # If what's left is null then it's a match.
  
  # PowerPC and e500v2 VxWorks
! ifeq ($(strip $(filter-out powerpc% wrs vxworks vxworksspe vxworks7% vxworks7spe,$(target_cpu) $(target_vendor) $(target_os))),)
  
    ifeq ($(strip $(filter-out e500%, $(target_alias))),)
       ARCH_STR=e500
*************** ifeq ($(strip $(filter-out %86 wrs vxwor
*** 1117,1123 ****
  endif
  
  # x86/x86_64 VxWorks
! ifeq ($(strip $(filter-out %86 x86_64 wrs vxworks vxworks7,$(target_cpu) $(target_vendor) $(target_os))),)
  
    EH_MECHANISM=-gcc
  
--- 1130,1136 ----
  endif
  
  # x86/x86_64 VxWorks
! ifeq ($(strip $(filter-out %86 x86_64 wrs vxworks vxworks7%,$(target_cpu) $(target_vendor) $(target_os))),)
  
    EH_MECHANISM=-gcc
  
*************** ifeq ($(strip $(filter-out %86 linux%,$(
*** 1520,1526 ****
    s-intman.adb<libgnarl/s-intman__posix.adb \
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    $(TRASYM_DWARF_UNIX_PAIRS) \
-   g-sercom.adb<libgnat/g-sercom__linux.adb \
    s-tsmona.adb<libgnat/s-tsmona__linux.adb \
    a-exetim.adb<libgnarl/a-exetim__posix.adb \
    a-exetim.ads<libgnarl/a-exetim__default.ads \
--- 1533,1538 ----
*************** ifeq ($(strip $(filter-out mips% linux%,
*** 2045,2051 ****
    s-tasinf.adb<libgnarl/s-tasinf__linux.adb \
    s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
    s-tpopsp.adb<libgnarl/s-tpopsp__posix-foreign.adb \
-   g-sercom.adb<libgnat/g-sercom__linux.adb \
    system.ads<libgnat/system-linux-mips.ads
  
    TOOLS_TARGET_PAIRS = indepsw.adb<indepsw-gnu.adb
--- 2057,2062 ----
*************** ifeq ($(strip $(filter-out powerpc% linu
*** 2071,2077 ****
    s-linux.ads<libgnarl/s-linux.ads \
    s-osinte.adb<libgnarl/s-osinte__posix.adb \
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
-   g-sercom.adb<libgnat/g-sercom__linux.adb \
    $(TRASYM_DWARF_UNIX_PAIRS) \
    s-tsmona.adb<libgnat/s-tsmona__linux.adb \
    $(ATOMICS_TARGET_PAIRS) \
--- 2082,2087 ----
*************** ifeq ($(strip $(filter-out aarch64% linu
*** 2150,2156 ****
    s-tasinf.adb<libgnarl/s-tasinf__linux.adb \
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
-   g-sercom.adb<libgnat/g-sercom__linux.adb \
    $(ATOMICS_TARGET_PAIRS) \
    $(ATOMICS_BUILTINS_TARGET_PAIRS) \
    system.ads<libgnat/system-linux-arm.ads
--- 2160,2165 ----
*************** ifeq ($(strip $(filter-out %ia64 linux%,
*** 2295,2301 ****
    s-tasinf.adb<libgnarl/s-tasinf__linux.adb \
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
-   g-sercom.adb<libgnat/g-sercom__linux.adb \
    $(TRASYM_DWARF_UNIX_PAIRS) \
    s-tsmona.adb<libgnat/s-tsmona__linux.adb \
    $(ATOMICS_TARGET_PAIRS) \
--- 2304,2309 ----
*************** ifeq ($(strip $(filter-out %x86_64 linux
*** 2392,2398 ****
    s-tasinf.adb<libgnarl/s-tasinf__linux.adb \
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
-   g-sercom.adb<libgnat/g-sercom__linux.adb \
    $(TRASYM_DWARF_UNIX_PAIRS) \
    s-tsmona.adb<libgnat/s-tsmona__linux.adb \
    $(ATOMICS_TARGET_PAIRS) \
--- 2400,2405 ----
*************** ifeq ($(strip $(filter-out %x32 linux%,$
*** 2434,2440 ****
    s-tasinf.adb<libgnarl/s-tasinf__linux.adb \
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
-   g-sercom.adb<libgnat/g-sercom__linux.adb \
    $(ATOMICS_TARGET_PAIRS) \
    $(X86_64_TARGET_PAIRS) \
    system.ads<libgnat/system-linux-x86.ads
--- 2441,2446 ----
*************** ifeq ($(strip $(filter-out riscv% linux%
*** 2465,2471 ****
    s-tasinf.adb<libgnarl/s-tasinf__linux.adb \
    s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
    s-tpopsp.adb<libgnarl/s-tpopsp__posix-foreign.adb \
-   g-sercom.adb<libgnat/g-sercom__linux.adb \
    system.ads<libgnat/system-linux-riscv.ads
  
    TOOLS_TARGET_PAIRS = indepsw.adb<indepsw-gnu.adb
--- 2471,2476 ----
*************** ifeq ($(EH_MECHANISM),-arm)
*** 2593,2598 ****
--- 2598,2608 ----
    EXTRA_GNATRTL_NONTASKING_OBJS+=g-cppexc.o s-excmac.o
  endif
  
+ ifeq ($(strip $(filter-out linux%,$(target_os))),)
+   LIBGNAT_TARGET_PAIRS += \
+     g-sercom.adb<libgnat/g-sercom__linux.adb
+ endif
+ 
  # LIBGNAT_SRCS is the list of all C files (including headers) of the runtime
  # library.  LIBGNAT_OBJS is the list of object files for libgnat.
  # thread.c is special as put into GNATRTL_TASKING_OBJS
*************** LIBGNAT_OBJS = adadecode.o adaint.o argv
*** 2611,2617 ****
  
  LIBGNAT_SRCS = $(patsubst %.o,%.c,$(LIBGNAT_OBJS))			\
    adadecode.h adaint.h env.h gsocket.h raise.h standard.ads.h		\
!   tb-gcc.c libgnarl/thread.c $(EXTRA_LIBGNAT_SRCS)
  
  # memtrack.o is special as not put into libgnat.
  GNATRTL_OBJS = $(GNATRTL_NONTASKING_OBJS) $(GNATRTL_TASKING_OBJS) \
--- 2621,2627 ----
  
  LIBGNAT_SRCS = $(patsubst %.o,%.c,$(LIBGNAT_OBJS))			\
    adadecode.h adaint.h env.h gsocket.h raise.h standard.ads.h		\
!   tb-gcc.c runtime.h libgnarl/thread.c $(EXTRA_LIBGNAT_SRCS)
  
  # memtrack.o is special as not put into libgnat.
  GNATRTL_OBJS = $(GNATRTL_NONTASKING_OBJS) $(GNATRTL_TASKING_OBJS) \
*************** setup-rts: force
*** 2688,2696 ****
  	          $(LN_S) $(GNAT_SRC)/$(word 2,$(subst <, ,$(PAIR))) \
  	                $(RTSDIR)/$(word 1,$(subst <, ,$(PAIR)));)
  
! # Special flags
  
! # force no sibling call optimization on s-traceb.o so the number of stack
  # frames to be skipped when computing a call chain is not modified by
  # optimization. We don't want inlining, either.
  
--- 2698,2724 ----
  	          $(LN_S) $(GNAT_SRC)/$(word 2,$(subst <, ,$(PAIR))) \
  	                $(RTSDIR)/$(word 1,$(subst <, ,$(PAIR)));)
  
! # Special flags. It is recommended not to change the compilation flags
! # without a careful analysis of the consequences because (part of) the
! # runtime implements low-level support that is outside of the semantics
! # of the language and therefore needs to be treated differently from the
! # other units. For example, the part of the runtime implementing the
! # propagation of exceptions cannot itself be compiled with checks that
! # may give rise to exceptions, e.g. stack overflow checks.
  
! # Generate target-dependent info into a file named ada_target_properties.
! # This information is used by tools for static analysis: they need to know
! # the size of standard types for a given run-time library. This metadata
! # is meant to be saved at the root of the run-time directory.
! 
! ADA_TARGET_PROPERTIES = -gnatet=ada_target_properties
! 
! system.o  : system.ads
! 	$(ADAC) -c $(ALL_ADAFLAGS) $(ADA_INCLUDES) $< \
! 	  $(ADA_TARGET_PROPERTIES) \
! 	  $(OUTPUT_OPTION)
! 
! # Force no sibling call optimization on s-traceb.o so the number of stack
  # frames to be skipped when computing a call chain is not modified by
  # optimization. We don't want inlining, either.
  
*************** s-traceb.o  : s-traceb.adb s-traceb.ads
*** 2699,2723 ****
  	  $(NO_INLINE_ADAFLAGS) $(NO_SIBLING_ADAFLAGS) $(ADA_INCLUDES) $< \
  	  $(OUTPUT_OPTION)
  
! # compile s-tasdeb.o without optimization and with debug info so that it is
  # always possible to set conditional breakpoints on tasks.
  
  s-tasdeb.o  : s-tasdeb.adb s-tasdeb.ads
  	$(ADAC) -c $(ALL_ADAFLAGS) $(FORCE_DEBUG_ADAFLAGS) -O0 $(ADA_INCLUDES) \
  	  $< $(OUTPUT_OPTION)
  
! # force no function reordering on a-except.o because of the exclusion bounds
  # mechanism (see the source file for more detailed information).
  # force debugging information on a-except.o so that it is always
  # possible to set conditional breakpoints on exceptions.
  # use -O1 otherwise gdb isn't able to get a full backtrace on mips targets.
  
  a-except.o  : a-except.adb a-except.ads
! 	$(ADAC) -c $(ALL_ADAFLAGS) $(FORCE_DEBUG_ADAFLAGS) \
! 	  $(NO_INLINE_ADAFLAGS) $(NO_REORDER_ADAFLAGS) -O1 $(ADA_INCLUDES) \
  	  $< $(OUTPUT_OPTION)
  
! # compile s-excdeb.o without optimization and with debug info to let the
  # debugger set breakpoints and inspect subprogram parameters on exception
  # related events.
  
--- 2727,2751 ----
  	  $(NO_INLINE_ADAFLAGS) $(NO_SIBLING_ADAFLAGS) $(ADA_INCLUDES) $< \
  	  $(OUTPUT_OPTION)
  
! # Compile s-tasdeb.o without optimization and with debug info so that it is
  # always possible to set conditional breakpoints on tasks.
  
  s-tasdeb.o  : s-tasdeb.adb s-tasdeb.ads
  	$(ADAC) -c $(ALL_ADAFLAGS) $(FORCE_DEBUG_ADAFLAGS) -O0 $(ADA_INCLUDES) \
  	  $< $(OUTPUT_OPTION)
  
! # Force no function reordering on a-except.o because of the exclusion bounds
  # mechanism (see the source file for more detailed information).
  # force debugging information on a-except.o so that it is always
  # possible to set conditional breakpoints on exceptions.
  # use -O1 otherwise gdb isn't able to get a full backtrace on mips targets.
  
  a-except.o  : a-except.adb a-except.ads
! 	$(ADAC) -c $(ALL_ADAFLAGS) -O1 $(FORCE_DEBUG_ADAFLAGS) \
! 	  $(NO_INLINE_ADAFLAGS) $(NO_REORDER_ADAFLAGS) $(ADA_INCLUDES) \
  	  $< $(OUTPUT_OPTION)
  
! # Compile s-excdeb.o without optimization and with debug info to let the
  # debugger set breakpoints and inspect subprogram parameters on exception
  # related events.
  
*************** s-excdeb.o  : s-excdeb.adb s-excdeb.ads
*** 2725,2745 ****
  	$(ADAC) -c $(ALL_ADAFLAGS) $(FORCE_DEBUG_ADAFLAGS) -O0 \
  	  $(ADA_INCLUDES) $< $(OUTPUT_OPTION)
  
! # force debugging information on s-assert.o so that it is always
  # possible to set breakpoint on assert failures.
  
  s-assert.o  : s-assert.adb s-assert.ads
  	$(ADAC) -c $(ALL_ADAFLAGS) $(FORCE_DEBUG_ADAFLAGS) $(ADA_INCLUDES) \
  	  $< $(OUTPUT_OPTION)
  
! # force debugging information on a-tags.o so that the debugger can find
  # the description of Ada.Tags.Type_Specific_Data.
  
  a-tags.o  : a-tags.adb a-tags.ads
  	$(ADAC) -c $(ALL_ADAFLAGS) $(FORCE_DEBUG_ADAFLAGS) $(ADA_INCLUDES) \
  	  $< $(OUTPUT_OPTION)
  
! # force no sibling call optimization on s-memory.o to avoid turning the
  # tail recursion in Alloc into a loop that confuses branch prediction.
  
  s-memory.o  : s-memory.adb s-memory.ads
--- 2753,2773 ----
  	$(ADAC) -c $(ALL_ADAFLAGS) $(FORCE_DEBUG_ADAFLAGS) -O0 \
  	  $(ADA_INCLUDES) $< $(OUTPUT_OPTION)
  
! # Force debugging information on s-assert.o so that it is always
  # possible to set breakpoint on assert failures.
  
  s-assert.o  : s-assert.adb s-assert.ads
  	$(ADAC) -c $(ALL_ADAFLAGS) $(FORCE_DEBUG_ADAFLAGS) $(ADA_INCLUDES) \
  	  $< $(OUTPUT_OPTION)
  
! # Force debugging information on a-tags.o so that the debugger can find
  # the description of Ada.Tags.Type_Specific_Data.
  
  a-tags.o  : a-tags.adb a-tags.ads
  	$(ADAC) -c $(ALL_ADAFLAGS) $(FORCE_DEBUG_ADAFLAGS) $(ADA_INCLUDES) \
  	  $< $(OUTPUT_OPTION)
  
! # Force no sibling call optimization on s-memory.o to avoid turning the
  # tail recursion in Alloc into a loop that confuses branch prediction.
  
  s-memory.o  : s-memory.adb s-memory.ads
diff -Nrcpad gcc-9.3.0/gcc/ada/adabkend.adb gcc-10.1.0/gcc/ada/adabkend.adb
*** gcc-9.3.0/gcc/ada/adabkend.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/adabkend.adb	Thu May  7 10:49:59 2020
*************** package body Adabkend is
*** 117,125 ****
  
           --  Set optimization indicators appropriately. In gcc-based GNAT this
           --  is picked up from imported variables set by the gcc driver, but
!          --  for compilers with non-gcc back ends we do it here to allow use
!          --  of these switches by the front end. Allowed optimization switches
!          --  are -Os (optimize for size), -O[0123], and -O (same as -O1).
  
           elsif Switch_Chars (First) = 'O' then
              if First = Last then
--- 117,127 ----
  
           --  Set optimization indicators appropriately. In gcc-based GNAT this
           --  is picked up from imported variables set by the gcc driver, but
!          --  for compilers with non-gcc back ends we do it here to allow use of
!          --  these switches by the front end. Allowed optimization switches are
!          --  -Os (optimize for size), -O[0123], -O (same as -O1), -Ofast
!          --  (disregard strict standards compliance), and -Og (optimize
!          --  debugging experience).
  
           elsif Switch_Chars (First) = 'O' then
              if First = Last then
*************** package body Adabkend is
*** 134,143 ****
--- 136,156 ----
                    Optimization_Level :=
                      Character'Pos (Switch_Chars (Last)) - Character'Pos ('0');
  
+                --  Switch -Og is between -O0 and -O1 in GCC. Consider it like
+                --  -O0 for other back ends.
+ 
+                elsif Switch_Chars (Last) = 'g' then
+                   Optimization_Level := 0;
+ 
                 else
                    Fail ("invalid switch: " & Switch_Chars);
                 end if;
  
+             --  Switch -Ofast enables -O3
+ 
+             elsif Switch_Chars (First + 1 .. Last) = "fast" then
+                Optimization_Level := 3;
+ 
              else
                 Fail ("invalid switch: " & Switch_Chars);
              end if;
*************** package body Adabkend is
*** 169,175 ****
  
              return;
  
!          --  Special check, the back end switch -fno-inline also sets the
           --  front end flags to entirely inhibit all inlining. So we store it
           --  and set the appropriate flags.
  
--- 182,188 ----
  
              return;
  
!          --  Special check, the back-end switch -fno-inline also sets the
           --  front end flags to entirely inhibit all inlining. So we store it
           --  and set the appropriate flags.
  
*************** package body Adabkend is
*** 206,212 ****
                 end case;
              end if;
  
!          --  Ignore all other back end switches
  
           elsif Is_Back_End_Switch (Switch_Chars) then
              null;
--- 219,225 ----
                 end case;
              end if;
  
!          --  Ignore all other back-end switches
  
           elsif Is_Back_End_Switch (Switch_Chars) then
              null;
diff -Nrcpad gcc-9.3.0/gcc/ada/adadecode.c gcc-10.1.0/gcc/ada/adadecode.c
*** gcc-9.3.0/gcc/ada/adadecode.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/adadecode.c	Thu May  7 10:49:59 2020
***************
*** 29,43 ****
   *                                                                          *
   ****************************************************************************/
  
! 
! #if defined(IN_RTS)
! #include "tconfig.h"
! #include "tsystem.h"
! #elif defined(IN_GCC)
! #include "config.h"
! #include "system.h"
! #endif
! 
  #include <string.h>
  #include <stdio.h>
  #include <ctype.h>
--- 29,35 ----
   *                                                                          *
   ****************************************************************************/
  
! #include "runtime.h"
  #include <string.h>
  #include <stdio.h>
  #include <ctype.h>
diff -Nrcpad gcc-9.3.0/gcc/ada/adaint.c gcc-10.1.0/gcc/ada/adaint.c
*** gcc-9.3.0/gcc/ada/adaint.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/adaint.c	Thu May  7 10:49:59 2020
***************
*** 35,42 ****
--- 35,48 ----
     library calls directly. This file contains all other routines.  */
  
  /* Ensure access to errno is thread safe.  */
+ 
+ #ifndef _REENTRANT
  #define _REENTRANT
+ #endif
+ 
+ #ifndef _THREAD_SAFE
  #define _THREAD_SAFE
+ #endif
  
  /* Use 64 bit Large File API */
  #if defined (__QNX__)
***************
*** 68,73 ****
--- 74,85 ----
     (such as chmod) are only available on VxWorks 6.  */
  #include "version.h"
  
+ /* vwModNum.h and dosFsLib.h are needed for the VxWorks 6 rename workaround.
+    See below.  */
+ #if (_WRS_VXWORKS_MAJOR == 6)
+ #include <vwModNum.h>
+ #include <dosFsLib.h>
+ #endif /* 6.x */
  #endif /* VxWorks */
  
  #if defined (__APPLE__)
***************
*** 88,95 ****
--- 100,125 ----
  #endif
  
  #ifdef IN_RTS
+ 
+ #ifdef STANDALONE
+ #include <errno.h>
+ #include <sys/types.h>
+ #include <sys/stat.h>
+ #include <unistd.h>
+ #include <stdlib.h>
+ #include <string.h>
+ 
+ /* for CPU_SET/CPU_ZERO */
+ #define _GNU_SOURCE
+ #define __USE_GNU
+ 
+ #include "runtime.h"
+ 
+ #else
  #include "tconfig.h"
  #include "tsystem.h"
+ #endif
+ 
  #include <sys/stat.h>
  #include <fcntl.h>
  #include <time.h>
*************** int __gnat_use_acl = 1;
*** 326,332 ****
     system provides the routine readdir_r.
     ... but we never define it anywhere???  */
  #undef HAVE_READDIR_R
! 
  #define MAYBE_TO_PTR32(argv) argv
  
  static const char ATTR_UNSET = 127;
--- 356,362 ----
     system provides the routine readdir_r.
     ... but we never define it anywhere???  */
  #undef HAVE_READDIR_R
! 
  #define MAYBE_TO_PTR32(argv) argv
  
  static const char ATTR_UNSET = 127;
*************** __gnat_to_gm_time (OS_Time *p_time, int
*** 393,405 ****
    struct tm *res;
    time_t time = (time_t) *p_time;
  
- #ifdef _WIN32
-   /* On Windows systems, the time is sometimes rounded up to the nearest
-      even second, so if the number of seconds is odd, increment it.  */
-   if (time & 1)
-     time++;
- #endif
- 
    res = gmtime (&time);
    if (res)
      {
--- 423,428 ----
*************** __gnat_rename (char *from, char *to)
*** 737,742 ****
--- 760,779 ----
      S2WSC (wto, to, GNAT_MAX_PATH_LEN);
      return _trename (wfrom, wto);
    }
+ #elif defined (__vxworks) && (_WRS_VXWORKS_MAJOR == 6)
+   {
+     /* When used on a dos filesystem under VxWorks 6.9 rename will trigger a
+        S_dosFsLib_FILE_NOT_FOUND errno when the file is not found.  Let's map
+        that to ENOENT so Ada.Directory.Rename can detect that and raise the
+        Name_Error exception.  */
+     int ret = rename (from, to);
+ 
+     if (ret && (errno == S_dosFsLib_FILE_NOT_FOUND))
+       {
+         errno = ENOENT;
+       }
+     return ret;
+   }
  #else
    return rename (from, to);
  #endif
diff -Nrcpad gcc-9.3.0/gcc/ada/adaint.h gcc-10.1.0/gcc/ada/adaint.h
*** gcc-9.3.0/gcc/ada/adaint.h	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/adaint.h	Thu May  7 10:49:59 2020
*************** extern "C" {
*** 51,57 ****
     determine at compile time what support the system offers for large files.
     For now we just list the platforms we have manually tested. */
  
! #if defined (__GLIBC__) || defined (__sun__) || defined (__QNX__)
  #define GNAT_FOPEN fopen64
  #define GNAT_OPEN open64
  #define GNAT_STAT stat64
--- 51,57 ----
     determine at compile time what support the system offers for large files.
     For now we just list the platforms we have manually tested. */
  
! #if (defined (__GLIBC__) && !defined(STANDALONE)) || defined (__sun__) || defined (__QNX__)
  #define GNAT_FOPEN fopen64
  #define GNAT_OPEN open64
  #define GNAT_STAT stat64
diff -Nrcpad gcc-9.3.0/gcc/ada/ali-util.adb gcc-10.1.0/gcc/ada/ali-util.adb
*** gcc-9.3.0/gcc/ada/ali-util.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/ali-util.adb	Thu May  7 10:49:59 2020
*************** package body ALI.Util is
*** 215,224 ****
     -- Read_Withed_ALIs --
     ----------------------
  
!    procedure Read_Withed_ALIs
!      (Id            : ALI_Id;
!       Ignore_Errors : Boolean := False)
!    is
        Afile  : File_Name_Type;
        Text   : Text_Buffer_Ptr;
        Idread : ALI_Id;
--- 215,221 ----
     -- Read_Withed_ALIs --
     ----------------------
  
!    procedure Read_Withed_ALIs (Id : ALI_Id) is
        Afile  : File_Name_Type;
        Text   : Text_Buffer_Ptr;
        Idread : ALI_Id;
*************** package body ALI.Util is
*** 240,253 ****
              then
                 Text := Read_Library_Info (Afile);
  
!                --  Unless Ignore_Errors is true, return with an error if source
                 --  cannot be found. We used to skip this check when we did not
                 --  compile library generics separately, but we now always do,
                 --  so there is no special case here anymore.
  
                 if Text = null then
  
!                   if not Ignore_Errors then
                       Error_Msg_File_1 := Afile;
                       Error_Msg_File_2 := Withs.Table (W).Sfile;
                       Error_Msg ("{ not found, { must be compiled");
--- 237,250 ----
              then
                 Text := Read_Library_Info (Afile);
  
!                --  Unless in GNATprove mode, return with an error if source
                 --  cannot be found. We used to skip this check when we did not
                 --  compile library generics separately, but we now always do,
                 --  so there is no special case here anymore.
  
                 if Text = null then
  
!                   if not GNATprove_Mode then
                       Error_Msg_File_1 := Afile;
                       Error_Msg_File_2 := Withs.Table (W).Sfile;
                       Error_Msg ("{ not found, { must be compiled");
*************** package body ALI.Util is
*** 268,274 ****
                    Free (Text);
  
                    if ALIs.Table (Idread).Compile_Errors
!                     and then not Ignore_Errors
                    then
                       Error_Msg_File_1 := Withs.Table (W).Sfile;
                       Error_Msg ("{ had errors, must be fixed, and recompiled");
--- 265,271 ----
                    Free (Text);
  
                    if ALIs.Table (Idread).Compile_Errors
!                     and then not GNATprove_Mode
                    then
                       Error_Msg_File_1 := Withs.Table (W).Sfile;
                       Error_Msg ("{ had errors, must be fixed, and recompiled");
*************** package body ALI.Util is
*** 279,285 ****
  
                    elsif ALIs.Table (Idread).No_Object
                      and then not GNATprove_Mode
-                     and then not Ignore_Errors
                    then
                       Error_Msg_File_1 := Withs.Table (W).Sfile;
                       Error_Msg ("{ must be recompiled");
--- 276,281 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/ali-util.ads gcc-10.1.0/gcc/ada/ali-util.ads
*** gcc-9.3.0/gcc/ada/ali-util.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/ali-util.ads	Thu May  7 10:49:59 2020
*************** package ALI.Util is
*** 107,121 ****
     -- Subprograms for Manipulating ALI Information --
     --------------------------------------------------
  
!    procedure Read_Withed_ALIs
!      (Id            : ALI_Id;
!       Ignore_Errors : Boolean := False);
     --  Process an ALI file which has been read and scanned by looping through
     --  all withed units in the ALI file, checking if they have been processed.
     --  Each unit that has not yet been processed will be read, scanned, and
!    --  processed recursively. If Ignore_Errors is True, then failure to read an
!    --  ALI file is not reported as an error, and scanning continues with other
!    --  ALI files.
  
     procedure Set_Source_Table (A : ALI_Id);
     --  Build source table entry corresponding to the ALI file whose id is A
--- 107,119 ----
     -- Subprograms for Manipulating ALI Information --
     --------------------------------------------------
  
!    procedure Read_Withed_ALIs (Id : ALI_Id);
     --  Process an ALI file which has been read and scanned by looping through
     --  all withed units in the ALI file, checking if they have been processed.
     --  Each unit that has not yet been processed will be read, scanned, and
!    --  processed recursively. In GNATprove mode a failure to read an ALI file
!    --  is not reported as an error, and scanning continues with other ALI
!    --  files.
  
     procedure Set_Source_Table (A : ALI_Id);
     --  Build source table entry corresponding to the ALI file whose id is A
diff -Nrcpad gcc-9.3.0/gcc/ada/ali.adb gcc-10.1.0/gcc/ada/ali.adb
*** gcc-9.3.0/gcc/ada/ali.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/ali.adb	Thu May  7 10:49:59 2020
*************** with Fname;  use Fname;
*** 29,67 ****
  with Opt;    use Opt;
  with Osint;  use Osint;
  with Output; use Output;
  
  package body ALI is
  
     use ASCII;
     --  Make control characters visible
  
     --  The following variable records which characters currently are used as
     --  line type markers in the ALI file. This is used in Scan_ALI to detect
     --  (or skip) invalid lines. The following letters are still available:
     --
!    --    B F G H J K O Q Z
  
     Known_ALI_Lines : constant array (Character range 'A' .. 'Z') of Boolean :=
!      ('V'    => True,   -- version
!       'M'    => True,   -- main program
!       'A'    => True,   -- argument
!       'P'    => True,   -- program
!       'R'    => True,   -- restriction
!       'I'    => True,   -- interrupt
!       'U'    => True,   -- unit
!       'W'    => True,   -- with
!       'L'    => True,   -- linker option
!       'N'    => True,   -- notes
!       'E'    => True,   -- external
!       'D'    => True,   -- dependency
!       'X'    => True,   -- xref
!       'S'    => True,   -- specific dispatching
!       'Y'    => True,   -- limited_with
!       'Z'    => True,   -- implicit with from instantiation
!       'C'    => True,   -- SCO information
!       'T'    => True,   -- task stack information
        others => False);
  
     --------------------
     -- Initialize_ALI --
     --------------------
--- 29,612 ----
  with Opt;    use Opt;
  with Osint;  use Osint;
  with Output; use Output;
+ with Snames; use Snames;
+ 
+ with GNAT;                 use GNAT;
+ with GNAT.Dynamic_HTables; use GNAT.Dynamic_HTables;
  
  package body ALI is
  
     use ASCII;
     --  Make control characters visible
  
+    -----------
+    -- Types --
+    -----------
+ 
+    --  The following type represents an invocation construct
+ 
+    type Invocation_Construct_Record is record
+       Body_Placement : Declaration_Placement_Kind := No_Declaration_Placement;
+       --  The location of the invocation construct's body with respect to the
+       --  unit where it is declared.
+ 
+       Kind : Invocation_Construct_Kind := Regular_Construct;
+       --  The nature of the invocation construct
+ 
+       Signature : Invocation_Signature_Id := No_Invocation_Signature;
+       --  The invocation signature that uniquely identifies the invocation
+       --  construct in the ALI space.
+ 
+       Spec_Placement : Declaration_Placement_Kind := No_Declaration_Placement;
+       --  The location of the invocation construct's spec with respect to the
+       --  unit where it is declared.
+    end record;
+ 
+    --  The following type represents an invocation relation. It associates an
+    --  invoker that activates/calls/instantiates with a target.
+ 
+    type Invocation_Relation_Record is record
+       Extra : Name_Id := No_Name;
+       --  The name of an additional entity used in error diagnostics
+ 
+       Invoker : Invocation_Signature_Id := No_Invocation_Signature;
+       --  The invocation signature that uniquely identifies the invoker within
+       --  the ALI space.
+ 
+       Kind : Invocation_Kind := No_Invocation;
+       --  The nature of the invocation
+ 
+       Target : Invocation_Signature_Id := No_Invocation_Signature;
+       --  The invocation signature that uniquely identifies the target within
+       --  the ALI space.
+    end record;
+ 
+    --  The following type represents an invocation signature. Its purpose is
+    --  to uniquely identify an invocation construct within the ALI space. The
+    --  signature comprises several pieces, some of which are used in error
+    --  diagnostics by the binder. Identification issues are resolved as
+    --  follows:
+    --
+    --    * The Column, Line, and Locations attributes together differentiate
+    --      between homonyms. In most cases, the Column and Line are sufficient
+    --      except when generic instantiations are involved. Together, the three
+    --      attributes offer a sequence of column-line pairs that eventually
+    --      reflect the location within the generic template.
+    --
+    --    * The Name attribute differentiates between invocation constructs at
+    --      the scope level. Since it is illegal for two entities with the same
+    --      name to coexist in the same scope, the Name attribute is sufficient
+    --      to distinguish them. Overloaded entities are already handled by the
+    --      Column, Line, and Locations attributes.
+    --
+    --    * The Scope attribute differentiates between invocation constructs at
+    --      various levels of nesting.
+ 
+    type Invocation_Signature_Record is record
+       Column : Nat := 0;
+       --  The column number where the invocation construct is declared
+ 
+       Line : Nat := 0;
+       --  The line number where the invocation construct is declared
+ 
+       Locations : Name_Id := No_Name;
+       --  Sequence of column and line numbers within nested instantiations
+ 
+       Name : Name_Id := No_Name;
+       --  The name of the invocation construct
+ 
+       Scope : Name_Id := No_Name;
+       --  The qualified name of the scope where the invocation construct is
+       --  declared.
+    end record;
+ 
+    ---------------------
+    -- Data structures --
+    ---------------------
+ 
+    package Invocation_Constructs is new Table.Table
+      (Table_Index_Type     => Invocation_Construct_Id,
+       Table_Component_Type => Invocation_Construct_Record,
+       Table_Low_Bound      => First_Invocation_Construct,
+       Table_Initial        => 2500,
+       Table_Increment      => 200,
+       Table_Name           => "Invocation_Constructs");
+ 
+    package Invocation_Relations is new Table.Table
+      (Table_Index_Type     => Invocation_Relation_Id,
+       Table_Component_Type => Invocation_Relation_Record,
+       Table_Low_Bound      => First_Invocation_Relation,
+       Table_Initial        => 2500,
+       Table_Increment      => 200,
+       Table_Name           => "Invocation_Relation");
+ 
+    package Invocation_Signatures is new Table.Table
+      (Table_Index_Type     => Invocation_Signature_Id,
+       Table_Component_Type => Invocation_Signature_Record,
+       Table_Low_Bound      => First_Invocation_Signature,
+       Table_Initial        => 2500,
+       Table_Increment      => 200,
+       Table_Name           => "Invocation_Signatures");
+ 
+    procedure Destroy (IS_Id : in out Invocation_Signature_Id);
+    --  Destroy an invocation signature with id IS_Id
+ 
+    function Hash
+      (IS_Rec : Invocation_Signature_Record) return Bucket_Range_Type;
+    --  Obtain the hash of key IS_Rec
+ 
+    package Sig_Map is new Dynamic_Hash_Tables
+      (Key_Type              => Invocation_Signature_Record,
+       Value_Type            => Invocation_Signature_Id,
+       No_Value              => No_Invocation_Signature,
+       Expansion_Threshold   => 1.5,
+       Expansion_Factor      => 2,
+       Compression_Threshold => 0.3,
+       Compression_Factor    => 2,
+       "="                   => "=",
+       Destroy_Value         => Destroy,
+       Hash                  => Hash);
+ 
+    --  The following map relates invocation signature records to invocation
+    --  signature ids.
+ 
+    Sig_To_Sig_Map : constant Sig_Map.Dynamic_Hash_Table :=
+                       Sig_Map.Create (500);
+ 
+    --  The folowing table maps declaration placement kinds to character codes
+    --  for invocation construct encoding in ALI files.
+ 
+    Declaration_Placement_Codes :
+      constant array (Declaration_Placement_Kind) of Character :=
+        (In_Body                  => 'b',
+         In_Spec                  => 's',
+         No_Declaration_Placement => 'Z');
+ 
+    Compile_Time_Invocation_Graph_Encoding : Invocation_Graph_Encoding_Kind :=
+                                               No_Encoding;
+    --  The invocation-graph encoding format as specified at compile time. Do
+    --  not manipulate this value directly.
+ 
+    --  The following table maps invocation kinds to character codes for
+    --  invocation relation encoding in ALI files.
+ 
+    Invocation_Codes :
+      constant array (Invocation_Kind) of Character :=
+        (Accept_Alternative                     => 'a',
+         Access_Taken                           => 'b',
+         Call                                   => 'c',
+         Controlled_Adjustment                  => 'd',
+         Controlled_Finalization                => 'e',
+         Controlled_Initialization              => 'f',
+         Default_Initial_Condition_Verification => 'g',
+         Initial_Condition_Verification         => 'h',
+         Instantiation                          => 'i',
+         Internal_Controlled_Adjustment         => 'j',
+         Internal_Controlled_Finalization       => 'k',
+         Internal_Controlled_Initialization     => 'l',
+         Invariant_Verification                 => 'm',
+         Postcondition_Verification             => 'n',
+         Protected_Entry_Call                   => 'o',
+         Protected_Subprogram_Call              => 'p',
+         Task_Activation                        => 'q',
+         Task_Entry_Call                        => 'r',
+         Type_Initialization                    => 's',
+         No_Invocation                          => 'Z');
+ 
+    --  The following table maps invocation construct kinds to character codes
+    --  for invocation construct encoding in ALI files.
+ 
+    Invocation_Construct_Codes :
+      constant array (Invocation_Construct_Kind) of Character :=
+        (Elaborate_Body_Procedure => 'b',
+         Elaborate_Spec_Procedure => 's',
+         Regular_Construct        => 'Z');
+ 
+    --  The following table maps invocation-graph encoding kinds to character
+    --  codes for invocation-graph encoding in ALI files.
+ 
+    Invocation_Graph_Encoding_Codes :
+      constant array (Invocation_Graph_Encoding_Kind) of Character :=
+        (Full_Path_Encoding => 'f',
+         Endpoints_Encoding => 'e',
+         No_Encoding        => 'Z');
+ 
+    --  The following table maps invocation-graph line kinds to character codes
+    --  used in ALI files.
+ 
+    Invocation_Graph_Line_Codes :
+      constant array (Invocation_Graph_Line_Kind) of Character :=
+        (Invocation_Construct_Line        => 'c',
+         Invocation_Graph_Attributes_Line => 'a',
+         Invocation_Relation_Line         => 'r');
+ 
     --  The following variable records which characters currently are used as
     --  line type markers in the ALI file. This is used in Scan_ALI to detect
     --  (or skip) invalid lines. The following letters are still available:
     --
!    --    B F H J K O Q Z
  
     Known_ALI_Lines : constant array (Character range 'A' .. 'Z') of Boolean :=
!      ('A'    => True,  --  argument
!       'C'    => True,  --  SCO information
!       'D'    => True,  --  dependency
!       'E'    => True,  --  external
!       'G'    => True,  --  invocation graph
!       'I'    => True,  --  interrupt
!       'L'    => True,  --  linker option
!       'M'    => True,  --  main program
!       'N'    => True,  --  notes
!       'P'    => True,  --  program
!       'R'    => True,  --  restriction
!       'S'    => True,  --  specific dispatching
!       'T'    => True,  --  task stack information
!       'U'    => True,  --  unit
!       'V'    => True,  --  version
!       'W'    => True,  --  with
!       'X'    => True,  --  xref
!       'Y'    => True,  --  limited_with
!       'Z'    => True,  --  implicit with from instantiation
        others => False);
  
+    ------------------------------
+    -- Add_Invocation_Construct --
+    ------------------------------
+ 
+    procedure Add_Invocation_Construct
+      (Body_Placement : Declaration_Placement_Kind;
+       Kind           : Invocation_Construct_Kind;
+       Signature      : Invocation_Signature_Id;
+       Spec_Placement : Declaration_Placement_Kind;
+       Update_Units   : Boolean := True)
+    is
+    begin
+       pragma Assert (Present (Signature));
+ 
+       --  Create a invocation construct from the scanned attributes
+ 
+       Invocation_Constructs.Append
+         ((Body_Placement => Body_Placement,
+           Kind           => Kind,
+           Signature      => Signature,
+           Spec_Placement => Spec_Placement));
+ 
+       --  Update the invocation construct counter of the current unit only when
+       --  requested by the caller.
+ 
+       if Update_Units then
+          declare
+             Curr_Unit : Unit_Record renames Units.Table (Units.Last);
+ 
+          begin
+             Curr_Unit.Last_Invocation_Construct := Invocation_Constructs.Last;
+          end;
+       end if;
+    end Add_Invocation_Construct;
+ 
+    -----------------------------
+    -- Add_Invocation_Relation --
+    -----------------------------
+ 
+    procedure Add_Invocation_Relation
+      (Extra        : Name_Id;
+       Invoker      : Invocation_Signature_Id;
+       Kind         : Invocation_Kind;
+       Target       : Invocation_Signature_Id;
+       Update_Units : Boolean := True)
+    is
+    begin
+       pragma Assert (Present (Invoker));
+       pragma Assert (Kind /= No_Invocation);
+       pragma Assert (Present (Target));
+ 
+       --  Create an invocation relation from the scanned attributes
+ 
+       Invocation_Relations.Append
+         ((Extra   => Extra,
+           Invoker => Invoker,
+           Kind    => Kind,
+           Target  => Target));
+ 
+       --  Update the invocation relation counter of the current unit only when
+       --  requested by the caller.
+ 
+       if Update_Units then
+          declare
+             Curr_Unit : Unit_Record renames Units.Table (Units.Last);
+ 
+          begin
+             Curr_Unit.Last_Invocation_Relation := Invocation_Relations.Last;
+          end;
+       end if;
+    end Add_Invocation_Relation;
+ 
+    --------------------
+    -- Body_Placement --
+    --------------------
+ 
+    function Body_Placement
+      (IC_Id : Invocation_Construct_Id) return Declaration_Placement_Kind
+    is
+    begin
+       pragma Assert (Present (IC_Id));
+       return Invocation_Constructs.Table (IC_Id).Body_Placement;
+    end Body_Placement;
+ 
+    ----------------------------------------
+    -- Code_To_Declaration_Placement_Kind --
+    ----------------------------------------
+ 
+    function Code_To_Declaration_Placement_Kind
+      (Code : Character) return Declaration_Placement_Kind
+    is
+    begin
+       --  Determine which placement kind corresponds to the character code by
+       --  traversing the contents of the mapping table.
+ 
+       for Kind in Declaration_Placement_Kind loop
+          if Declaration_Placement_Codes (Kind) = Code then
+             return Kind;
+          end if;
+       end loop;
+ 
+       raise Program_Error;
+    end Code_To_Declaration_Placement_Kind;
+ 
+    ---------------------------------------
+    -- Code_To_Invocation_Construct_Kind --
+    ---------------------------------------
+ 
+    function Code_To_Invocation_Construct_Kind
+      (Code : Character) return Invocation_Construct_Kind
+    is
+    begin
+       --  Determine which invocation construct kind matches the character code
+       --  by traversing the contents of the mapping table.
+ 
+       for Kind in Invocation_Construct_Kind loop
+          if Invocation_Construct_Codes (Kind) = Code then
+             return Kind;
+          end if;
+       end loop;
+ 
+       raise Program_Error;
+    end Code_To_Invocation_Construct_Kind;
+ 
+    --------------------------------------------
+    -- Code_To_Invocation_Graph_Encoding_Kind --
+    --------------------------------------------
+ 
+    function Code_To_Invocation_Graph_Encoding_Kind
+      (Code : Character) return Invocation_Graph_Encoding_Kind
+    is
+    begin
+       --  Determine which invocation-graph encoding kind matches the character
+       --  code by traversing the contents of the mapping table.
+ 
+       for Kind in Invocation_Graph_Encoding_Kind loop
+          if Invocation_Graph_Encoding_Codes (Kind) = Code then
+             return Kind;
+          end if;
+       end loop;
+ 
+       raise Program_Error;
+    end Code_To_Invocation_Graph_Encoding_Kind;
+ 
+    -----------------------------
+    -- Code_To_Invocation_Kind --
+    -----------------------------
+ 
+    function Code_To_Invocation_Kind
+      (Code : Character) return Invocation_Kind
+    is
+    begin
+       --  Determine which invocation kind corresponds to the character code by
+       --  traversing the contents of the mapping table.
+ 
+       for Kind in Invocation_Kind loop
+          if Invocation_Codes (Kind) = Code then
+             return Kind;
+          end if;
+       end loop;
+ 
+       raise Program_Error;
+    end Code_To_Invocation_Kind;
+ 
+    ----------------------------------------
+    -- Code_To_Invocation_Graph_Line_Kind --
+    ----------------------------------------
+ 
+    function Code_To_Invocation_Graph_Line_Kind
+      (Code : Character) return Invocation_Graph_Line_Kind
+    is
+    begin
+       --  Determine which invocation-graph line kind matches the character
+       --  code by traversing the contents of the mapping table.
+ 
+       for Kind in Invocation_Graph_Line_Kind loop
+          if Invocation_Graph_Line_Codes (Kind) = Code then
+             return Kind;
+          end if;
+       end loop;
+ 
+       raise Program_Error;
+    end Code_To_Invocation_Graph_Line_Kind;
+ 
+    ------------
+    -- Column --
+    ------------
+ 
+    function Column (IS_Id : Invocation_Signature_Id) return Nat is
+    begin
+       pragma Assert (Present (IS_Id));
+       return Invocation_Signatures.Table (IS_Id).Column;
+    end Column;
+ 
+    ----------------------------------------
+    -- Declaration_Placement_Kind_To_Code --
+    ----------------------------------------
+ 
+    function Declaration_Placement_Kind_To_Code
+      (Kind : Declaration_Placement_Kind) return Character
+    is
+    begin
+       return Declaration_Placement_Codes (Kind);
+    end Declaration_Placement_Kind_To_Code;
+ 
+    -------------
+    -- Destroy --
+    -------------
+ 
+    procedure Destroy (IS_Id : in out Invocation_Signature_Id) is
+       pragma Unreferenced (IS_Id);
+    begin
+       null;
+    end Destroy;
+ 
+    -----------
+    -- Extra --
+    -----------
+ 
+    function Extra (IR_Id : Invocation_Relation_Id) return Name_Id is
+    begin
+       pragma Assert (Present (IR_Id));
+       return Invocation_Relations.Table (IR_Id).Extra;
+    end Extra;
+ 
+    -----------------------------------
+    -- For_Each_Invocation_Construct --
+    -----------------------------------
+ 
+    procedure For_Each_Invocation_Construct
+      (Processor : Invocation_Construct_Processor_Ptr)
+    is
+    begin
+       pragma Assert (Processor /= null);
+ 
+       for IC_Id in Invocation_Constructs.First ..
+                    Invocation_Constructs.Last
+       loop
+          Processor.all (IC_Id);
+       end loop;
+    end For_Each_Invocation_Construct;
+ 
+    -----------------------------------
+    -- For_Each_Invocation_Construct --
+    -----------------------------------
+ 
+    procedure For_Each_Invocation_Construct
+      (U_Id      : Unit_Id;
+       Processor : Invocation_Construct_Processor_Ptr)
+    is
+       pragma Assert (Present (U_Id));
+       pragma Assert (Processor /= null);
+ 
+       U_Rec : Unit_Record renames Units.Table (U_Id);
+ 
+    begin
+       for IC_Id in U_Rec.First_Invocation_Construct ..
+                    U_Rec.Last_Invocation_Construct
+       loop
+          Processor.all (IC_Id);
+       end loop;
+    end For_Each_Invocation_Construct;
+ 
+    ----------------------------------
+    -- For_Each_Invocation_Relation --
+    ----------------------------------
+ 
+    procedure For_Each_Invocation_Relation
+      (Processor : Invocation_Relation_Processor_Ptr)
+    is
+    begin
+       pragma Assert (Processor /= null);
+ 
+       for IR_Id in Invocation_Relations.First ..
+                    Invocation_Relations.Last
+       loop
+          Processor.all (IR_Id);
+       end loop;
+    end For_Each_Invocation_Relation;
+ 
+    ----------------------------------
+    -- For_Each_Invocation_Relation --
+    ----------------------------------
+ 
+    procedure For_Each_Invocation_Relation
+      (U_Id      : Unit_Id;
+       Processor : Invocation_Relation_Processor_Ptr)
+    is
+       pragma Assert (Present (U_Id));
+       pragma Assert (Processor /= null);
+ 
+       U_Rec : Unit_Record renames Units.Table (U_Id);
+ 
+    begin
+       for IR_Id in U_Rec.First_Invocation_Relation ..
+                    U_Rec.Last_Invocation_Relation
+       loop
+          Processor.all (IR_Id);
+       end loop;
+    end For_Each_Invocation_Relation;
+ 
+    ----------
+    -- Hash --
+    ----------
+ 
+    function Hash
+      (IS_Rec : Invocation_Signature_Record) return Bucket_Range_Type
+    is
+       Buffer : Bounded_String (2052);
+       IS_Nam : Name_Id;
+ 
+    begin
+       --  The hash is obtained in the following manner:
+       --
+       --    * A String signature based on the scope, name, line number, column
+       --      number, and locations, in the following format:
+       --
+       --         scope__name__line_column__locations
+       --
+       --    * The String is converted into a Name_Id
+       --    * The Name_Id is used as the hash
+ 
+       Append (Buffer, IS_Rec.Scope);
+       Append (Buffer, "__");
+       Append (Buffer, IS_Rec.Name);
+       Append (Buffer, "__");
+       Append (Buffer, IS_Rec.Line);
+       Append (Buffer, '_');
+       Append (Buffer, IS_Rec.Column);
+ 
+       if IS_Rec.Locations /= No_Name then
+          Append (Buffer, "__");
+          Append (Buffer, IS_Rec.Locations);
+       end if;
+ 
+       IS_Nam := Name_Find (Buffer);
+       return Bucket_Range_Type (IS_Nam);
+    end Hash;
+ 
     --------------------
     -- Initialize_ALI --
     --------------------
*************** package body ALI is
*** 90,107 ****
        --  Initialize all tables
  
        ALIs.Init;
        No_Deps.Init;
        Units.Init;
        Withs.Init;
-       Sdep.Init;
-       Linker_Options.Init;
-       Notes.Init;
-       Xref_Section.Init;
        Xref_Entity.Init;
        Xref.Init;
!       Version_Ref.Reset;
  
!       --  Add dummy zero'th item in Linker_Options and Notes for sort calls
  
        Linker_Options.Increment_Last;
        Notes.Increment_Last;
--- 635,655 ----
        --  Initialize all tables
  
        ALIs.Init;
+       Invocation_Constructs.Init;
+       Invocation_Relations.Init;
+       Invocation_Signatures.Init;
+       Linker_Options.Init;
        No_Deps.Init;
+       Notes.Init;
+       Sdep.Init;
        Units.Init;
+       Version_Ref.Reset;
        Withs.Init;
        Xref_Entity.Init;
        Xref.Init;
!       Xref_Section.Init;
  
!       --  Add dummy zeroth item in Linker_Options and Notes for sort calls
  
        Linker_Options.Increment_Last;
        Notes.Increment_Last;
*************** package body ALI is
*** 125,130 ****
--- 673,887 ----
        Zero_Cost_Exceptions_Specified         := False;
     end Initialize_ALI;
  
+    ---------------------------------------
+    -- Invocation_Construct_Kind_To_Code --
+    ---------------------------------------
+ 
+    function Invocation_Construct_Kind_To_Code
+      (Kind : Invocation_Construct_Kind) return Character
+    is
+    begin
+       return Invocation_Construct_Codes (Kind);
+    end Invocation_Construct_Kind_To_Code;
+ 
+    -------------------------------
+    -- Invocation_Graph_Encoding --
+    -------------------------------
+ 
+    function Invocation_Graph_Encoding return Invocation_Graph_Encoding_Kind is
+    begin
+       return Compile_Time_Invocation_Graph_Encoding;
+    end Invocation_Graph_Encoding;
+ 
+    --------------------------------------------
+    -- Invocation_Graph_Encoding_Kind_To_Code --
+    --------------------------------------------
+ 
+    function Invocation_Graph_Encoding_Kind_To_Code
+      (Kind : Invocation_Graph_Encoding_Kind) return Character
+    is
+    begin
+       return Invocation_Graph_Encoding_Codes (Kind);
+    end Invocation_Graph_Encoding_Kind_To_Code;
+ 
+    ----------------------------------------
+    -- Invocation_Graph_Line_Kind_To_Code --
+    ----------------------------------------
+ 
+    function Invocation_Graph_Line_Kind_To_Code
+      (Kind : Invocation_Graph_Line_Kind) return Character
+    is
+    begin
+       return Invocation_Graph_Line_Codes (Kind);
+    end Invocation_Graph_Line_Kind_To_Code;
+ 
+    -----------------------------
+    -- Invocation_Kind_To_Code --
+    -----------------------------
+ 
+    function Invocation_Kind_To_Code
+      (Kind : Invocation_Kind) return Character
+    is
+    begin
+       return Invocation_Codes (Kind);
+    end Invocation_Kind_To_Code;
+ 
+    -----------------------------
+    -- Invocation_Signature_Of --
+    -----------------------------
+ 
+    function Invocation_Signature_Of
+      (Column    : Nat;
+       Line      : Nat;
+       Locations : Name_Id;
+       Name      : Name_Id;
+       Scope     : Name_Id) return Invocation_Signature_Id
+    is
+       IS_Rec : constant Invocation_Signature_Record :=
+                  (Column    => Column,
+                   Line      => Line,
+                   Locations => Locations,
+                   Name      => Name,
+                   Scope     => Scope);
+       IS_Id  : Invocation_Signature_Id;
+ 
+    begin
+       IS_Id := Sig_Map.Get (Sig_To_Sig_Map, IS_Rec);
+ 
+       --  The invocation signature lacks an id. This indicates that it
+       --  is encountered for the first time during the construction of
+       --  the graph.
+ 
+       if not Present (IS_Id) then
+          Invocation_Signatures.Append (IS_Rec);
+          IS_Id := Invocation_Signatures.Last;
+ 
+          --  Map the invocation signature record to its corresponding id
+ 
+          Sig_Map.Put (Sig_To_Sig_Map, IS_Rec, IS_Id);
+       end if;
+ 
+       return IS_Id;
+    end Invocation_Signature_Of;
+ 
+    -------------
+    -- Invoker --
+    -------------
+ 
+    function Invoker
+      (IR_Id : Invocation_Relation_Id) return Invocation_Signature_Id
+    is
+    begin
+       pragma Assert (Present (IR_Id));
+       return Invocation_Relations.Table (IR_Id).Invoker;
+    end Invoker;
+ 
+    ----------
+    -- Kind --
+    ----------
+ 
+    function Kind
+      (IC_Id : Invocation_Construct_Id) return Invocation_Construct_Kind
+    is
+    begin
+       pragma Assert (Present (IC_Id));
+       return Invocation_Constructs.Table (IC_Id).Kind;
+    end Kind;
+ 
+    ----------
+    -- Kind --
+    ----------
+ 
+    function Kind (IR_Id : Invocation_Relation_Id) return Invocation_Kind is
+    begin
+       pragma Assert (Present (IR_Id));
+       return Invocation_Relations.Table (IR_Id).Kind;
+    end Kind;
+ 
+    ----------
+    -- Line --
+    ----------
+ 
+    function Line (IS_Id : Invocation_Signature_Id) return Nat is
+    begin
+       pragma Assert (Present (IS_Id));
+       return Invocation_Signatures.Table (IS_Id).Line;
+    end Line;
+ 
+    ---------------
+    -- Locations --
+    ---------------
+ 
+    function Locations (IS_Id : Invocation_Signature_Id) return Name_Id is
+    begin
+       pragma Assert (Present (IS_Id));
+       return Invocation_Signatures.Table (IS_Id).Locations;
+    end Locations;
+ 
+    ----------
+    -- Name --
+    ----------
+ 
+    function Name (IS_Id : Invocation_Signature_Id) return Name_Id is
+    begin
+       pragma Assert (Present (IS_Id));
+       return Invocation_Signatures.Table (IS_Id).Name;
+    end Name;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (IC_Id : Invocation_Construct_Id) return Boolean is
+    begin
+       return IC_Id /= No_Invocation_Construct;
+    end Present;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (IR_Id : Invocation_Relation_Id) return Boolean is
+    begin
+       return IR_Id /= No_Invocation_Relation;
+    end Present;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (IS_Id : Invocation_Signature_Id) return Boolean is
+    begin
+       return IS_Id /= No_Invocation_Signature;
+    end Present;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (Dep : Sdep_Id) return Boolean is
+    begin
+       return Dep /= No_Sdep_Id;
+    end Present;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (U_Id : Unit_Id) return Boolean is
+    begin
+       return U_Id /= No_Unit_Id;
+    end Present;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (W_Id : With_Id) return Boolean is
+    begin
+       return W_Id /= No_With_Id;
+    end Present;
+ 
     --------------
     -- Scan_ALI --
     --------------
*************** package body ALI is
*** 221,227 ****
        --
        --    If Ignore_Special is False (normal case), the scan is terminated by
        --    a typeref bracket or an equal sign except for the special case of
!       --    an operator name starting with a double quote which is terminated
        --    by another double quote.
        --
        --    If May_Be_Quoted is True and the first non blank character is '"'
--- 978,984 ----
        --
        --    If Ignore_Special is False (normal case), the scan is terminated by
        --    a typeref bracket or an equal sign except for the special case of
!       --    an operator name starting with a double quote that is terminated
        --    by another double quote.
        --
        --    If May_Be_Quoted is True and the first non blank character is '"'
*************** package body ALI is
*** 256,261 ****
--- 1013,1021 ----
           Standard_Entity : out Name_Id);
        --  Parse the definition of a typeref (<...>, {...} or (...))
  
+       procedure Scan_Invocation_Graph_Line;
+       --  Parse a single line that encodes a piece of the invocation graph
+ 
        procedure Skip_Eol;
        --  Skip past spaces, then skip past end of line (fatal error if not
        --  at end of line). Also skips past any following blank lines.
*************** package body ALI is
*** 771,776 ****
--- 1531,1769 ----
           return T (P);
        end Nextc;
  
+       --------------------------------
+       -- Scan_Invocation_Graph_Line --
+       --------------------------------
+ 
+       procedure Scan_Invocation_Graph_Line is
+          procedure Scan_Invocation_Construct_Line;
+          pragma Inline (Scan_Invocation_Construct_Line);
+          --  Parse an invocation construct line and construct the corresponding
+          --  construct. The following data structures are updated:
+          --
+          --    * Invocation_Constructs
+          --    * Units
+ 
+          procedure Scan_Invocation_Graph_Attributes_Line;
+          pragma Inline (Scan_Invocation_Graph_Attributes_Line);
+          --  Parse an invocation-graph attributes line. The following data
+          --  structures are updated:
+          --
+          --    * Units
+ 
+          procedure Scan_Invocation_Relation_Line;
+          pragma Inline (Scan_Invocation_Relation_Line);
+          --  Parse an invocation relation line and construct the corresponding
+          --  relation. The following data structures are updated:
+          --
+          --    * Invocation_Relations
+          --    * Units
+ 
+          function Scan_Invocation_Signature return Invocation_Signature_Id;
+          pragma Inline (Scan_Invocation_Signature);
+          --  Parse a single invocation signature while populating the following
+          --  data structures:
+          --
+          --    * Invocation_Signatures
+          --    * Sig_To_Sig_Map
+ 
+          ------------------------------------
+          -- Scan_Invocation_Construct_Line --
+          ------------------------------------
+ 
+          procedure Scan_Invocation_Construct_Line is
+             Body_Placement : Declaration_Placement_Kind;
+             Kind           : Invocation_Construct_Kind;
+             Signature      : Invocation_Signature_Id;
+             Spec_Placement : Declaration_Placement_Kind;
+ 
+          begin
+             --  construct-kind
+ 
+             Kind := Code_To_Invocation_Construct_Kind (Getc);
+             Checkc (' ');
+             Skip_Space;
+ 
+             --  construct-spec-placement
+ 
+             Spec_Placement := Code_To_Declaration_Placement_Kind (Getc);
+             Checkc (' ');
+             Skip_Space;
+ 
+             --  construct-body-placement
+ 
+             Body_Placement := Code_To_Declaration_Placement_Kind (Getc);
+             Checkc (' ');
+             Skip_Space;
+ 
+             --  construct-signature
+ 
+             Signature := Scan_Invocation_Signature;
+             Skip_Eol;
+ 
+             Add_Invocation_Construct
+               (Body_Placement => Body_Placement,
+                Kind           => Kind,
+                Signature      => Signature,
+                Spec_Placement => Spec_Placement);
+          end Scan_Invocation_Construct_Line;
+ 
+          -------------------------------------------
+          -- Scan_Invocation_Graph_Attributes_Line --
+          -------------------------------------------
+ 
+          procedure Scan_Invocation_Graph_Attributes_Line is
+          begin
+             --  encoding-kind
+ 
+             Set_Invocation_Graph_Encoding
+               (Code_To_Invocation_Graph_Encoding_Kind (Getc));
+             Skip_Eol;
+          end Scan_Invocation_Graph_Attributes_Line;
+ 
+          -----------------------------------
+          -- Scan_Invocation_Relation_Line --
+          -----------------------------------
+ 
+          procedure Scan_Invocation_Relation_Line is
+             Extra   : Name_Id;
+             Invoker : Invocation_Signature_Id;
+             Kind    : Invocation_Kind;
+             Target  : Invocation_Signature_Id;
+ 
+          begin
+             --  relation-kind
+ 
+             Kind := Code_To_Invocation_Kind (Getc);
+             Checkc (' ');
+             Skip_Space;
+ 
+             --  (extra-name | "none")
+ 
+             Extra := Get_Name;
+ 
+             if Extra = Name_None then
+                Extra := No_Name;
+             end if;
+ 
+             Checkc (' ');
+             Skip_Space;
+ 
+             --  invoker-signature
+ 
+             Invoker := Scan_Invocation_Signature;
+             Checkc (' ');
+             Skip_Space;
+ 
+             --  target-signature
+ 
+             Target := Scan_Invocation_Signature;
+             Skip_Eol;
+ 
+             Add_Invocation_Relation
+               (Extra   => Extra,
+                Invoker => Invoker,
+                Kind    => Kind,
+                Target  => Target);
+          end Scan_Invocation_Relation_Line;
+ 
+          -------------------------------
+          -- Scan_Invocation_Signature --
+          -------------------------------
+ 
+          function Scan_Invocation_Signature return Invocation_Signature_Id is
+             Column    : Nat;
+             Line      : Nat;
+             Locations : Name_Id;
+             Name      : Name_Id;
+             Scope     : Name_Id;
+ 
+          begin
+             --  [
+ 
+             Checkc ('[');
+ 
+             --  name
+ 
+             Name := Get_Name;
+             Checkc (' ');
+             Skip_Space;
+ 
+             --  scope
+ 
+             Scope := Get_Name;
+             Checkc (' ');
+             Skip_Space;
+ 
+             --  line
+ 
+             Line := Get_Nat;
+             Checkc (' ');
+             Skip_Space;
+ 
+             --  column
+ 
+             Column := Get_Nat;
+             Checkc (' ');
+             Skip_Space;
+ 
+             --  (locations | "none")
+ 
+             Locations := Get_Name;
+ 
+             if Locations = Name_None then
+                Locations := No_Name;
+             end if;
+ 
+             --  ]
+ 
+             Checkc (']');
+ 
+             --  Create an invocation signature from the scanned attributes
+ 
+             return
+               Invocation_Signature_Of
+                 (Column    => Column,
+                  Line      => Line,
+                  Locations => Locations,
+                  Name      => Name,
+                  Scope     => Scope);
+          end Scan_Invocation_Signature;
+ 
+          --  Local variables
+ 
+          Line : Invocation_Graph_Line_Kind;
+ 
+       --  Start of processing for Scan_Invocation_Graph_Line
+ 
+       begin
+          if Ignore ('G') then
+             return;
+          end if;
+ 
+          Checkc (' ');
+          Skip_Space;
+ 
+          --  line-kind
+ 
+          Line := Code_To_Invocation_Graph_Line_Kind (Getc);
+          Checkc (' ');
+          Skip_Space;
+ 
+          --  line-attributes
+ 
+          case Line is
+             when Invocation_Construct_Line =>
+                Scan_Invocation_Construct_Line;
+ 
+             when Invocation_Graph_Attributes_Line =>
+                Scan_Invocation_Graph_Attributes_Line;
+ 
+             when Invocation_Relation_Line =>
+                Scan_Invocation_Relation_Line;
+          end case;
+       end Scan_Invocation_Graph_Line;
+ 
        --------------
        -- Skip_Eol --
        --------------
*************** package body ALI is
*** 880,885 ****
--- 1873,1879 ----
          First_Specific_Dispatching   => Specific_Dispatching.Last + 1,
          First_Unit                   => No_Unit_Id,
          GNATprove_Mode               => False,
+         Invocation_Graph_Encoding    => No_Encoding,
          Last_Interrupt_State         => Interrupt_States.Last,
          Last_Sdep                    => No_Sdep_Id,
          Last_Specific_Dispatching    => Specific_Dispatching.Last,
*************** package body ALI is
*** 1716,1753 ****
              UL : Unit_Record renames Units.Table (Units.Last);
  
           begin
!             UL.Uname                    := Get_Unit_Name;
!             UL.Predefined               := Is_Predefined_Unit;
!             UL.Internal                 := Is_Internal_Unit;
!             UL.My_ALI                   := Id;
!             UL.Sfile                    := Get_File_Name (Lower => True);
!             UL.Pure                     := False;
!             UL.Preelab                  := False;
!             UL.No_Elab                  := False;
!             UL.Shared_Passive           := False;
!             UL.RCI                      := False;
!             UL.Remote_Types             := False;
!             UL.Serious_Errors           := False;
!             UL.Has_RACW                 := False;
!             UL.Init_Scalars             := False;
!             UL.Is_Generic               := False;
!             UL.Icasing                  := Mixed_Case;
!             UL.Kcasing                  := All_Lower_Case;
!             UL.Dynamic_Elab             := False;
!             UL.Elaborate_Body           := False;
!             UL.Set_Elab_Entity          := False;
!             UL.Version                  := "00000000";
!             UL.First_With               := Withs.Last + 1;
!             UL.First_Arg                := First_Arg;
!             UL.Elab_Position            := 0;
!             UL.SAL_Interface            := ALIs.Table (Id).SAL_Interface;
!             UL.Directly_Scanned         := Directly_Scanned;
!             UL.Body_Needed_For_SAL      := False;
!             UL.Elaborate_Body_Desirable := False;
!             UL.Optimize_Alignment       := 'O';
!             UL.Has_Finalizer            := False;
!             UL.Primary_Stack_Count      := 0;
!             UL.Sec_Stack_Count          := 0;
  
              if Debug_Flag_U then
                 Write_Str (" ----> reading unit ");
--- 2710,2751 ----
              UL : Unit_Record renames Units.Table (Units.Last);
  
           begin
!             UL.Uname                      := Get_Unit_Name;
!             UL.Predefined                 := Is_Predefined_Unit;
!             UL.Internal                   := Is_Internal_Unit;
!             UL.My_ALI                     := Id;
!             UL.Sfile                      := Get_File_Name (Lower => True);
!             UL.Pure                       := False;
!             UL.Preelab                    := False;
!             UL.No_Elab                    := False;
!             UL.Shared_Passive             := False;
!             UL.RCI                        := False;
!             UL.Remote_Types               := False;
!             UL.Serious_Errors             := False;
!             UL.Has_RACW                   := False;
!             UL.Init_Scalars               := False;
!             UL.Is_Generic                 := False;
!             UL.Icasing                    := Mixed_Case;
!             UL.Kcasing                    := All_Lower_Case;
!             UL.Dynamic_Elab               := False;
!             UL.Elaborate_Body             := False;
!             UL.Set_Elab_Entity            := False;
!             UL.Version                    := "00000000";
!             UL.First_With                 := Withs.Last + 1;
!             UL.First_Arg                  := First_Arg;
!             UL.First_Invocation_Construct := Invocation_Constructs.Last + 1;
!             UL.Last_Invocation_Construct  := No_Invocation_Construct;
!             UL.First_Invocation_Relation  := Invocation_Relations.Last + 1;
!             UL.Last_Invocation_Relation   := No_Invocation_Relation;
!             UL.Elab_Position              := 0;
!             UL.SAL_Interface              := ALIs.Table (Id).SAL_Interface;
!             UL.Directly_Scanned           := Directly_Scanned;
!             UL.Body_Needed_For_SAL        := False;
!             UL.Elaborate_Body_Desirable   := False;
!             UL.Optimize_Alignment         := 'O';
!             UL.Has_Finalizer              := False;
!             UL.Primary_Stack_Count        := 0;
!             UL.Sec_Stack_Count            := 0;
  
              if Debug_Flag_U then
                 Write_Str (" ----> reading unit ");
*************** package body ALI is
*** 2206,2214 ****
  
              Linker_Options.Table (Linker_Options.Last).Internal_File :=
                Is_Internal_File_Name (F);
- 
-             Linker_Options.Table (Linker_Options.Last).Original_Pos :=
-               Linker_Options.Last;
           end if;
  
           --  If there are notes present, scan them
--- 3204,3209 ----
*************** package body ALI is
*** 2444,2449 ****
--- 3439,3455 ----
  
        ALIs.Table (Id).Last_Sdep := Sdep.Last;
  
+       --  Loop through invocation-graph lines
+ 
+       G_Loop : loop
+          Check_Unknown_Line;
+          exit G_Loop when C /= 'G';
+ 
+          Scan_Invocation_Graph_Line;
+ 
+          C := Getc;
+       end loop G_Loop;
+ 
        --  We must at this stage be at an Xref line or the end of file
  
        if C = EOF then
*************** package body ALI is
*** 2786,2792 ****
              --  Record last entity
  
              XS.Last_Entity := Xref_Entity.Last;
- 
           end Read_Refs_For_One_File;
  
           C := Getc;
--- 3792,3797 ----
*************** package body ALI is
*** 2806,2811 ****
--- 3811,3826 ----
           return No_ALI_Id;
     end Scan_ALI;
  
+    -----------
+    -- Scope --
+    -----------
+ 
+    function Scope (IS_Id : Invocation_Signature_Id) return Name_Id is
+    begin
+       pragma Assert (Present (IS_Id));
+       return Invocation_Signatures.Table (IS_Id).Scope;
+    end Scope;
+ 
     ---------
     -- SEq --
     ---------
*************** package body ALI is
*** 2815,2820 ****
--- 3830,3860 ----
        return F1.all = F2.all;
     end SEq;
  
+    -----------------------------------
+    -- Set_Invocation_Graph_Encoding --
+    -----------------------------------
+ 
+    procedure Set_Invocation_Graph_Encoding
+      (Kind         : Invocation_Graph_Encoding_Kind;
+       Update_Units : Boolean := True)
+    is
+    begin
+       Compile_Time_Invocation_Graph_Encoding := Kind;
+ 
+       --  Update the invocation-graph encoding of the current unit only when
+       --  requested by the caller.
+ 
+       if Update_Units then
+          declare
+             Curr_Unit : Unit_Record renames Units.Table (Units.Last);
+             Curr_ALI  : ALIs_Record renames ALIs.Table  (Curr_Unit.My_ALI);
+ 
+          begin
+             Curr_ALI.Invocation_Graph_Encoding := Kind;
+          end;
+       end if;
+    end Set_Invocation_Graph_Encoding;
+ 
     -----------
     -- SHash --
     -----------
*************** package body ALI is
*** 2831,2834 ****
--- 3871,3910 ----
        return Vindex (Vindex'First + Vindex (H mod Vindex'Range_Length));
     end SHash;
  
+    ---------------
+    -- Signature --
+    ---------------
+ 
+    function Signature
+      (IC_Id : Invocation_Construct_Id) return Invocation_Signature_Id
+    is
+    begin
+       pragma Assert (Present (IC_Id));
+       return Invocation_Constructs.Table (IC_Id).Signature;
+    end Signature;
+ 
+    --------------------
+    -- Spec_Placement --
+    --------------------
+ 
+    function Spec_Placement
+      (IC_Id : Invocation_Construct_Id) return Declaration_Placement_Kind
+    is
+    begin
+       pragma Assert (Present (IC_Id));
+       return Invocation_Constructs.Table (IC_Id).Spec_Placement;
+    end Spec_Placement;
+ 
+    ------------
+    -- Target --
+    ------------
+ 
+    function Target
+      (IR_Id : Invocation_Relation_Id) return Invocation_Signature_Id
+    is
+    begin
+       pragma Assert (Present (IR_Id));
+       return Invocation_Relations.Table (IR_Id).Target;
+    end Target;
+ 
  end ALI;
diff -Nrcpad gcc-9.3.0/gcc/ada/ali.ads gcc-10.1.0/gcc/ada/ali.ads
*** gcc-9.3.0/gcc/ada/ali.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/ali.ads	Thu May  7 10:49:59 2020
*************** with Rident;  use Rident;
*** 34,39 ****
--- 34,40 ----
  with Table;
  with Types;   use Types;
  
+ with GNAT.Dynamic_Tables;
  with GNAT.HTable; use GNAT.HTable;
  
  package ALI is
*************** package ALI is
*** 66,71 ****
--- 67,105 ----
     type Priority_Specific_Dispatching_Id is range 0 .. 99_999_999;
     --  Id values used for Priority_Specific_Dispatching table entries
  
+    type Invocation_Construct_Id is range 0 .. 99_999_999;
+    --  Id values used for Invocation_Constructs table entries
+ 
+    type Invocation_Relation_Id is range 0 .. 99_999_999;
+    --  Id values used for Invocation_Relations table entries
+ 
+    type Invocation_Signature_Id is range 0 .. 99_999_999;
+    --  Id values used for Invocation_Signatures table entries
+ 
+    function Present (IC_Id : Invocation_Construct_Id) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether invocation construct IC_Id exists
+ 
+    function Present (IR_Id : Invocation_Relation_Id) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether invocation relation IR_Id exists
+ 
+    function Present (IS_Id : Invocation_Signature_Id) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether invocation signature IS_Id exists
+ 
+    function Present (Dep : Sdep_Id) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether dependant Dep exists
+ 
+    function Present (U_Id : Unit_Id) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether unit U_Id exists
+ 
+    function Present (W_Id : With_Id) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether with W_Id exists
+ 
     --------------------
     -- ALI File Table --
     --------------------
*************** package ALI is
*** 78,83 ****
--- 112,131 ----
     First_ALI_Entry : constant ALI_Id := No_ALI_Id + 1;
     --  Id of first actual entry in table
  
+    --  The following type enumerates all possible invocation-graph encoding
+    --  kinds.
+ 
+    type Invocation_Graph_Encoding_Kind is
+      (Endpoints_Encoding,
+       --  The invocation construct and relation lines contain information for
+       --  the start construct and end target found on an invocation-graph path.
+ 
+       Full_Path_Encoding,
+       --  The invocation construct and relation lines contain information for
+       --  all constructs and targets found on a invocation-graph path.
+ 
+       No_Encoding);
+ 
     type Main_Program_Type is (None, Proc, Func);
     --  Indicator of whether unit can be used as main program
  
*************** package ALI is
*** 178,184 ****
  
        No_Component_Reordering : Boolean;
        --  Set to True if file was compiled with a configuration pragma file
!       --  containing pragma No_Component_Reordering.  Not set if 'P' appears
        --  in Ignore_Lines.
  
        No_Object : Boolean;
--- 226,232 ----
  
        No_Component_Reordering : Boolean;
        --  Set to True if file was compiled with a configuration pragma file
!       --  containing pragma No_Component_Reordering. Not set if 'P' appears
        --  in Ignore_Lines.
  
        No_Object : Boolean;
*************** package ALI is
*** 225,230 ****
--- 273,283 ----
        --  Last_Specific_Dispatching = First_Specific_Dispatching - 1. That
        --  is why the 'Base reference is there, it can be one less than the
        --  lower bound of the subtype. Not set if 'S' appears in Ignore_Lines.
+ 
+       Invocation_Graph_Encoding : Invocation_Graph_Encoding_Kind;
+       --  The encoding format used to capture information about the invocation
+       --  constructs and relations within the corresponding ALI file of this
+       --  unit.
     end record;
  
     No_Main_Priority : constant Int := -1;
*************** package ALI is
*** 334,339 ****
--- 387,404 ----
        Last_Arg : Arg_Id;
        --  Id of last args table entry for this file
  
+       First_Invocation_Construct : Invocation_Construct_Id;
+       --  Id of the first invocation construct for this unit
+ 
+       Last_Invocation_Construct : Invocation_Construct_Id;
+       --  Id of the last invocation construct for this unit
+ 
+       First_Invocation_Relation : Invocation_Relation_Id;
+       --  Id of the first invocation relation for this unit
+ 
+       Last_Invocation_Relation : Invocation_Relation_Id;
+       --  Id of the last invocation relation for this unit
+ 
        Utype : Unit_Type;
        --  Type of entry
  
*************** package ALI is
*** 408,413 ****
--- 473,488 ----
       Table_Increment      => 200,
       Table_Name           => "Unit");
  
+    package Unit_Id_Tables is new GNAT.Dynamic_Tables
+      (Table_Component_Type => Unit_Id,
+       Table_Index_Type     => Nat,
+       Table_Low_Bound      => 1,
+       Table_Initial        => 500,
+       Table_Increment      => 200);
+ 
+    subtype Unit_Id_Table is Unit_Id_Tables.Instance;
+    subtype Unit_Id_Array is Unit_Id_Tables.Table_Type;
+ 
     ---------------------------
     -- Interrupt State Table --
     ---------------------------
*************** package ALI is
*** 650,664 ****
        --  Set True if the linker options are from an internal file. This is
        --  used to insert certain standard entries after all the user entries
        --  but before the entries from the run-time.
- 
-       Original_Pos : Positive;
-       --  Keep track of original position in the linker options table. This
-       --  is used to implement a stable sort when we sort the linker options
-       --  table.
     end record;
  
!    --  The indexes of active entries in this table range from 1 to the
!    --  value of Linker_Options.Last. The zero'th element is for sort call.
  
     package Linker_Options is new Table.Table (
       Table_Component_Type => Linker_Option_Record,
--- 725,735 ----
        --  Set True if the linker options are from an internal file. This is
        --  used to insert certain standard entries after all the user entries
        --  but before the entries from the run-time.
     end record;
  
!    --  The indexes of active entries in this table range from 1 to the value of
!    --  Linker_Options.Last. The zeroth element is for convenience if the table
!    --  needs to be sorted.
  
     package Linker_Options is new Table.Table (
       Table_Component_Type => Linker_Option_Record,
*************** package ALI is
*** 694,702 ****
        --  location to the last character on the line.
     end record;
  
!    --  The indexes of active entries in this table range from 1 to the
!    --  value of Linker_Options.Last. The zero'th element is for convenience
!    --  if the table needs to be sorted.
  
     package Notes is new Table.Table (
       Table_Component_Type => Notes_Record,
--- 765,773 ----
        --  location to the last character on the line.
     end record;
  
!    --  The indexes of active entries in this table range from 1 to the value of
!    --  Notes.Last. The zeroth element is for convenience if the table needs to
!    --  be sorted.
  
     package Notes is new Table.Table (
       Table_Component_Type => Notes_Record,
*************** package ALI is
*** 794,799 ****
--- 865,871 ----
  
        Unit_Name : Name_Id;
        --  Name_Id for the unit name if not a subunit (No_Name for a subunit)
+ 
        Rfile : File_Name_Type;
        --  Reference file name. Same as Sfile unless a Source_Reference pragma
        --  was used, in which case it reflects the name used in the pragma.
*************** package ALI is
*** 1026,1031 ****
--- 1098,1384 ----
       Table_Increment      => 300,
       Table_Name           => "Xref");
  
+    ----------------------------
+    -- Invocation Graph Types --
+    ----------------------------
+ 
+    --  The following type identifies an invocation construct
+ 
+    No_Invocation_Construct    : constant Invocation_Construct_Id :=
+                                   Invocation_Construct_Id'First;
+    First_Invocation_Construct : constant Invocation_Construct_Id :=
+                                   No_Invocation_Construct + 1;
+ 
+    --  The following type identifies an invocation relation
+ 
+    No_Invocation_Relation    : constant Invocation_Relation_Id :=
+                                  Invocation_Relation_Id'First;
+    First_Invocation_Relation : constant Invocation_Relation_Id :=
+                                  No_Invocation_Relation + 1;
+ 
+    --  The following type identifies an invocation signature
+ 
+    No_Invocation_Signature    : constant Invocation_Signature_Id :=
+                                   Invocation_Signature_Id'First;
+    First_Invocation_Signature : constant Invocation_Signature_Id :=
+                                   No_Invocation_Signature + 1;
+ 
+    --  The following type enumerates all possible placements of an invocation
+    --  construct's spec and body with respect to the unit it is declared in.
+ 
+    type Declaration_Placement_Kind is
+      (In_Body,
+       --  The declaration of the invocation construct is within the body of the
+       --  unit it is declared in.
+ 
+       In_Spec,
+       --  The declaration of the invocation construct is within the spec of the
+       --  unit it is declared in.
+ 
+       No_Declaration_Placement);
+       --  The invocation construct does not have a declaration
+ 
+    --  The following type enumerates all possible invocation construct kinds
+ 
+    type Invocation_Construct_Kind is
+      (Elaborate_Body_Procedure,
+       --  The invocation construct denotes the procedure which elaborates a
+       --  package body.
+ 
+       Elaborate_Spec_Procedure,
+       --  The invocation construct denotes the procedure which elaborates a
+       --  package spec.
+ 
+       Regular_Construct);
+       --  The invocation construct is a normal invocation construct
+ 
+    --  The following type enumerates all possible invocation kinds
+ 
+    type Invocation_Kind is
+      (Accept_Alternative,
+       Access_Taken,
+       Call,
+       Controlled_Adjustment,
+       Controlled_Finalization,
+       Controlled_Initialization,
+       Default_Initial_Condition_Verification,
+       Initial_Condition_Verification,
+       Instantiation,
+       Internal_Controlled_Adjustment,
+       Internal_Controlled_Finalization,
+       Internal_Controlled_Initialization,
+       Invariant_Verification,
+       Postcondition_Verification,
+       Protected_Entry_Call,
+       Protected_Subprogram_Call,
+       Task_Activation,
+       Task_Entry_Call,
+       Type_Initialization,
+       No_Invocation);
+ 
+    subtype Internal_Controlled_Invocation_Kind is Invocation_Kind range
+        Internal_Controlled_Adjustment ..
+    --  Internal_Controlled_Finalization
+        Internal_Controlled_Initialization;
+ 
+    --  The following type enumerates all possible invocation-graph ALI lines
+ 
+    type Invocation_Graph_Line_Kind is
+      (Invocation_Construct_Line,
+       Invocation_Graph_Attributes_Line,
+       Invocation_Relation_Line);
+ 
+    ----------------------------------
+    -- Invocation Graph Subprograms --
+    ----------------------------------
+ 
+    procedure Add_Invocation_Construct
+      (Body_Placement : Declaration_Placement_Kind;
+       Kind           : Invocation_Construct_Kind;
+       Signature      : Invocation_Signature_Id;
+       Spec_Placement : Declaration_Placement_Kind;
+       Update_Units   : Boolean := True);
+    pragma Inline (Add_Invocation_Construct);
+    --  Add a new invocation construct described by its attributes. Update_Units
+    --  should be set when this addition must be reflected in the attributes of
+    --  the current unit.
+ 
+    procedure Add_Invocation_Relation
+      (Extra        : Name_Id;
+       Invoker      : Invocation_Signature_Id;
+       Kind         : Invocation_Kind;
+       Target       : Invocation_Signature_Id;
+       Update_Units : Boolean := True);
+    pragma Inline (Add_Invocation_Relation);
+    --  Add a new invocation relation described by its attributes. Update_Units
+    --  should be set when this addition must be reflected in the attributes of
+    --  the current unit.
+ 
+    function Body_Placement
+      (IC_Id : Invocation_Construct_Id) return Declaration_Placement_Kind;
+    pragma Inline (Body_Placement);
+    --  Obtain the location of invocation construct IC_Id's body with respect to
+    --  the unit where it is declared.
+ 
+    function Code_To_Declaration_Placement_Kind
+      (Code : Character) return Declaration_Placement_Kind;
+    pragma Inline (Code_To_Declaration_Placement_Kind);
+    --  Obtain the declaration placement kind of character encoding Code
+ 
+    function Code_To_Invocation_Construct_Kind
+      (Code : Character) return Invocation_Construct_Kind;
+    pragma Inline (Code_To_Invocation_Construct_Kind);
+    --  Obtain the invocation construct kind of character encoding Code
+ 
+    function Code_To_Invocation_Graph_Encoding_Kind
+      (Code : Character) return Invocation_Graph_Encoding_Kind;
+    pragma Inline (Code_To_Invocation_Graph_Encoding_Kind);
+    --  Obtain the invocation-graph encoding kind of character encoding Code
+ 
+    function Code_To_Invocation_Kind
+      (Code : Character) return Invocation_Kind;
+    pragma Inline (Code_To_Invocation_Kind);
+    --  Obtain the invocation kind of character encoding Code
+ 
+    function Code_To_Invocation_Graph_Line_Kind
+      (Code : Character) return Invocation_Graph_Line_Kind;
+    pragma Inline (Code_To_Invocation_Graph_Line_Kind);
+    --  Obtain the invocation-graph line kind of character encoding Code
+ 
+    function Column (IS_Id : Invocation_Signature_Id) return Nat;
+    pragma Inline (Column);
+    --  Obtain the column number of invocation signature IS_Id
+ 
+    function Declaration_Placement_Kind_To_Code
+      (Kind : Declaration_Placement_Kind) return Character;
+    pragma Inline (Declaration_Placement_Kind_To_Code);
+    --  Obtain the character encoding of declaration placement kind Kind
+ 
+    function Extra (IR_Id : Invocation_Relation_Id) return Name_Id;
+    pragma Inline (Extra);
+    --  Obtain the name of the additional entity used in error diagnostics for
+    --  invocation relation IR_Id.
+ 
+    type Invocation_Construct_Processor_Ptr is
+      access procedure (IC_Id : Invocation_Construct_Id);
+ 
+    procedure For_Each_Invocation_Construct
+      (Processor : Invocation_Construct_Processor_Ptr);
+    pragma Inline (For_Each_Invocation_Construct);
+    --  Invoke Processor on each invocation construct
+ 
+    procedure For_Each_Invocation_Construct
+      (U_Id      : Unit_Id;
+       Processor : Invocation_Construct_Processor_Ptr);
+    pragma Inline (For_Each_Invocation_Construct);
+    --  Invoke Processor on each invocation construct of unit U_Id
+ 
+    type Invocation_Relation_Processor_Ptr is
+      access procedure (IR_Id : Invocation_Relation_Id);
+ 
+    procedure For_Each_Invocation_Relation
+      (Processor : Invocation_Relation_Processor_Ptr);
+    pragma Inline (For_Each_Invocation_Relation);
+    --  Invoke Processor on each invocation relation
+ 
+    procedure For_Each_Invocation_Relation
+      (U_Id      : Unit_Id;
+       Processor : Invocation_Relation_Processor_Ptr);
+    pragma Inline (For_Each_Invocation_Relation);
+    --  Invoke Processor on each invocation relation of unit U_Id
+ 
+    function Invocation_Construct_Kind_To_Code
+      (Kind : Invocation_Construct_Kind) return Character;
+    pragma Inline (Invocation_Construct_Kind_To_Code);
+    --  Obtain the character encoding of invocation kind Kind
+ 
+    function Invocation_Graph_Encoding return Invocation_Graph_Encoding_Kind;
+    pragma Inline (Invocation_Graph_Encoding);
+    --  Obtain the encoding format used to capture information about the
+    --  invocation constructs and relations within the ALI file of the main
+    --  unit.
+ 
+    function Invocation_Graph_Encoding_Kind_To_Code
+      (Kind : Invocation_Graph_Encoding_Kind) return Character;
+    pragma Inline (Invocation_Graph_Encoding_Kind_To_Code);
+    --  Obtain the character encoding for invocation-graph encoding kind Kind
+ 
+    function Invocation_Graph_Line_Kind_To_Code
+      (Kind : Invocation_Graph_Line_Kind) return Character;
+    pragma Inline (Invocation_Graph_Line_Kind_To_Code);
+    --  Obtain the character encoding for invocation line kind Kind
+ 
+    function Invocation_Kind_To_Code
+      (Kind : Invocation_Kind) return Character;
+    pragma Inline (Invocation_Kind_To_Code);
+    --  Obtain the character encoding of invocation kind Kind
+ 
+    function Invocation_Signature_Of
+      (Column    : Nat;
+       Line      : Nat;
+       Locations : Name_Id;
+       Name      : Name_Id;
+       Scope     : Name_Id) return Invocation_Signature_Id;
+    pragma Inline (Invocation_Signature_Of);
+    --  Obtain the invocation signature that corresponds to the input attributes
+ 
+    function Invoker
+      (IR_Id : Invocation_Relation_Id) return Invocation_Signature_Id;
+    pragma Inline (Invoker);
+    --  Obtain the signature of the invocation relation IR_Id's invoker
+ 
+    function Kind
+      (IC_Id : Invocation_Construct_Id) return Invocation_Construct_Kind;
+    pragma Inline (Kind);
+    --  Obtain the nature of invocation construct IC_Id
+ 
+    function Kind
+      (IR_Id : Invocation_Relation_Id) return Invocation_Kind;
+    pragma Inline (Kind);
+    --  Obtain the nature of invocation relation IR_Id
+ 
+    function Line (IS_Id : Invocation_Signature_Id) return Nat;
+    pragma Inline (Line);
+    --  Obtain the line number of invocation signature IS_Id
+ 
+    function Locations (IS_Id : Invocation_Signature_Id) return Name_Id;
+    pragma Inline (Locations);
+    --  Obtain the sequence of column and line numbers within nested instances
+    --  of invocation signature IS_Id
+ 
+    function Name (IS_Id : Invocation_Signature_Id) return Name_Id;
+    pragma Inline (Name);
+    --  Obtain the name of invocation signature IS_Id
+ 
+    function Scope (IS_Id : Invocation_Signature_Id) return Name_Id;
+    pragma Inline (Scope);
+    --  Obtain the scope of invocation signature IS_Id
+ 
+    procedure Set_Invocation_Graph_Encoding
+      (Kind         : Invocation_Graph_Encoding_Kind;
+       Update_Units : Boolean := True);
+    pragma Inline (Set_Invocation_Graph_Encoding);
+    --  Set the encoding format used to capture information about the invocation
+    --  constructs and relations within the ALI file of the main unit to Kind.
+    --  Update_Units should be set when this action must be reflected in the
+    --  attributes of the current unit.
+ 
+    function Signature
+      (IC_Id : Invocation_Construct_Id) return Invocation_Signature_Id;
+    pragma Inline (Signature);
+    --  Obtain the signature of invocation construct IC_Id
+ 
+    function Spec_Placement
+      (IC_Id : Invocation_Construct_Id) return Declaration_Placement_Kind;
+    pragma Inline (Spec_Placement);
+    --  Obtain the location of invocation construct IC_Id's spec with respect to
+    --  the unit where it is declared.
+ 
+    function Target
+      (IR_Id : Invocation_Relation_Id) return Invocation_Signature_Id;
+    pragma Inline (Target);
+    --  Obtain the signature of the invocation relation IR_Id's target
+ 
     --------------------------------------
     -- Subprograms for Reading ALI File --
     --------------------------------------
*************** package ALI is
*** 1076,1082 ****
     --    both. If both are provided then only the Read_Lines value is used,
     --    and the Ignore_Lines parameter is ignored.
     --
!    --    Read_XREF is set True to read and acquire the cross-reference
     --    information. If Read_XREF is set to True, then the effect is to ignore
     --    all lines other than U, W, D and X lines and the Ignore_Lines and
     --    Read_Lines parameters are ignored (i.e. the use of True for Read_XREF
--- 1429,1435 ----
     --    both. If both are provided then only the Read_Lines value is used,
     --    and the Ignore_Lines parameter is ignored.
     --
!    --    Read_Xref is set True to read and acquire the cross-reference
     --    information. If Read_XREF is set to True, then the effect is to ignore
     --    all lines other than U, W, D and X lines and the Ignore_Lines and
     --    Read_Lines parameters are ignored (i.e. the use of True for Read_XREF
diff -Nrcpad gcc-9.3.0/gcc/ada/alloc.ads gcc-10.1.0/gcc/ada/alloc.ads
*** gcc-9.3.0/gcc/ada/alloc.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/alloc.ads	Thu May  7 10:49:59 2020
*************** package Alloc is
*** 116,121 ****
--- 116,124 ----
     Rep_Table_Initial                : constant := 1000;       -- Repinfo
     Rep_Table_Increment              : constant := 200;
  
+    Rep_JSON_Table_Initial           : constant := 10;          -- Repinfo
+    Rep_JSON_Table_Increment         : constant := 200;
+ 
     Scope_Stack_Initial              : constant := 10;         -- Sem
     Scope_Stack_Increment            : constant := 200;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/argv.c gcc-10.1.0/gcc/ada/argv.c
*** gcc-9.3.0/gcc/ada/argv.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/argv.c	Thu May  7 10:49:59 2020
***************
*** 43,51 ****
     Ada.Command_Line.Environment package.  */
  
  #ifdef IN_RTS
! #include "tconfig.h"
! #include "tsystem.h"
! #include <sys/stat.h>
  #else
  #include "config.h"
  #include "system.h"
--- 43,50 ----
     Ada.Command_Line.Environment package.  */
  
  #ifdef IN_RTS
! #include "runtime.h"
! #include <string.h>
  #else
  #include "config.h"
  #include "system.h"
diff -Nrcpad gcc-9.3.0/gcc/ada/aspects.adb gcc-10.1.0/gcc/ada/aspects.adb
*** gcc-9.3.0/gcc/ada/aspects.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/aspects.adb	Thu May  7 10:49:59 2020
*************** package body Aspects is
*** 225,231 ****
              Owner := Root_Type (Owner);
           end if;
  
!          if Is_Private_Type (Owner) and then Present (Full_View (Owner)) then
              Owner := Full_View (Owner);
           end if;
        end if;
--- 225,234 ----
              Owner := Root_Type (Owner);
           end if;
  
!          if Is_Private_Type (Owner)
!            and then Present (Full_View (Owner))
!            and then not Operational_Aspect (A)
!          then
              Owner := Full_View (Owner);
           end if;
        end if;
*************** package body Aspects is
*** 569,575 ****
--- 572,580 ----
      Aspect_Lock_Free                    => Aspect_Lock_Free,
      Aspect_Machine_Radix                => Aspect_Machine_Radix,
      Aspect_Max_Entry_Queue_Depth        => Aspect_Max_Entry_Queue_Depth,
+     Aspect_Max_Entry_Queue_Length       => Aspect_Max_Entry_Queue_Length,
      Aspect_Max_Queue_Length             => Aspect_Max_Queue_Length,
+     Aspect_No_Caching                   => Aspect_No_Caching,
      Aspect_No_Elaboration_Code_All      => Aspect_No_Elaboration_Code_All,
      Aspect_No_Inline                    => Aspect_No_Inline,
      Aspect_No_Return                    => Aspect_No_Return,
diff -Nrcpad gcc-9.3.0/gcc/ada/aspects.ads gcc-10.1.0/gcc/ada/aspects.ads
*** gcc-9.3.0/gcc/ada/aspects.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/aspects.ads	Thu May  7 10:49:59 2020
*************** package Aspects is
*** 116,123 ****
        Aspect_Link_Name,
        Aspect_Linker_Section,                -- GNAT
        Aspect_Machine_Radix,
!       Aspect_Max_Entry_Queue_Depth,
        Aspect_Max_Queue_Length,              -- GNAT
        Aspect_Object_Size,                   -- GNAT
        Aspect_Obsolescent,                   -- GNAT
        Aspect_Output,
--- 116,125 ----
        Aspect_Link_Name,
        Aspect_Linker_Section,                -- GNAT
        Aspect_Machine_Radix,
!       Aspect_Max_Entry_Queue_Depth,         -- GNAT
!       Aspect_Max_Entry_Queue_Length,
        Aspect_Max_Queue_Length,              -- GNAT
+       Aspect_No_Caching,                    -- GNAT
        Aspect_Object_Size,                   -- GNAT
        Aspect_Obsolescent,                   -- GNAT
        Aspect_Output,
*************** package Aspects is
*** 252,257 ****
--- 254,260 ----
        Aspect_Invariant                  => True,
        Aspect_Lock_Free                  => True,
        Aspect_Max_Entry_Queue_Depth      => True,
+       Aspect_Max_Entry_Queue_Length     => True,
        Aspect_Max_Queue_Length           => True,
        Aspect_Object_Size                => True,
        Aspect_Persistent_BSS             => True,
*************** package Aspects is
*** 277,282 ****
--- 280,299 ----
        Aspect_Warnings                   => True,
        others                            => False);
  
+    --  The following array indicates aspects that specify operational
+    --  characteristics, and thus are view-specific. Representation
+    --  aspects break privacy, as they are needed during expansion and
+    --  code generation.
+    --  List is currently incomplete ???
+ 
+    Operational_Aspect : constant array (Aspect_Id) of Boolean :=
+      (Aspect_Constant_Indexing          => True,
+       Aspect_Default_Iterator           => True,
+       Aspect_Iterator_Element           => True,
+       Aspect_Iterable                   => True,
+       Aspect_Variable_Indexing          => True,
+       others                            => False);
+ 
     --  The following array indicates aspects for which multiple occurrences of
     --  the same aspect attached to the same declaration are allowed.
  
*************** package Aspects is
*** 361,367 ****
--- 378,386 ----
        Aspect_Linker_Section             => Expression,
        Aspect_Machine_Radix              => Expression,
        Aspect_Max_Entry_Queue_Depth      => Expression,
+       Aspect_Max_Entry_Queue_Length     => Expression,
        Aspect_Max_Queue_Length           => Expression,
+       Aspect_No_Caching                 => Optional_Expression,
        Aspect_Object_Size                => Expression,
        Aspect_Obsolescent                => Optional_Expression,
        Aspect_Output                     => Name,
*************** package Aspects is
*** 471,477 ****
--- 490,498 ----
        Aspect_Lock_Free                    => Name_Lock_Free,
        Aspect_Machine_Radix                => Name_Machine_Radix,
        Aspect_Max_Entry_Queue_Depth        => Name_Max_Entry_Queue_Depth,
+       Aspect_Max_Entry_Queue_Length       => Name_Max_Entry_Queue_Length,
        Aspect_Max_Queue_Length             => Name_Max_Queue_Length,
+       Aspect_No_Caching                   => Name_No_Caching,
        Aspect_No_Elaboration_Code_All      => Name_No_Elaboration_Code_All,
        Aspect_No_Inline                    => Name_No_Inline,
        Aspect_No_Return                    => Name_No_Return,
*************** package Aspects is
*** 748,754 ****
--- 769,777 ----
        Aspect_Initial_Condition            => Never_Delay,
        Aspect_Initializes                  => Never_Delay,
        Aspect_Max_Entry_Queue_Depth        => Never_Delay,
+       Aspect_Max_Entry_Queue_Length       => Never_Delay,
        Aspect_Max_Queue_Length             => Never_Delay,
+       Aspect_No_Caching                   => Never_Delay,
        Aspect_No_Elaboration_Code_All      => Never_Delay,
        Aspect_No_Tagged_Streams            => Never_Delay,
        Aspect_Obsolescent                  => Never_Delay,
diff -Nrcpad gcc-9.3.0/gcc/ada/atree.adb gcc-10.1.0/gcc/ada/atree.adb
*** gcc-9.3.0/gcc/ada/atree.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/atree.adb	Thu May  7 10:49:59 2020
*************** package body Atree is
*** 1924,1929 ****
--- 1924,1953 ----
                                    V11);
     end Nkind_In;
  
+    function Nkind_In
+      (N   : Node_Id;
+       V1  : Node_Kind;
+       V2  : Node_Kind;
+       V3  : Node_Kind;
+       V4  : Node_Kind;
+       V5  : Node_Kind;
+       V6  : Node_Kind;
+       V7  : Node_Kind;
+       V8  : Node_Kind;
+       V9  : Node_Kind;
+       V10 : Node_Kind;
+       V11 : Node_Kind;
+       V12 : Node_Kind;
+       V13 : Node_Kind;
+       V14 : Node_Kind;
+       V15 : Node_Kind;
+       V16 : Node_Kind) return Boolean
+    is
+    begin
+       return Nkind_In (Nkind (N), V1, V2, V3, V4, V5, V6, V7, V8, V9, V10,
+                                   V11, V12, V13, V14, V15, V16);
+    end Nkind_In;
+ 
     --------
     -- No --
     --------
diff -Nrcpad gcc-9.3.0/gcc/ada/atree.ads gcc-10.1.0/gcc/ada/atree.ads
*** gcc-9.3.0/gcc/ada/atree.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/atree.ads	Thu May  7 10:49:59 2020
*************** package Atree is
*** 309,314 ****
--- 309,316 ----
     --  switch -gnatQ is set. Initialized to zero at the start of compilation.
     --  Initialized for -gnatVa use, see comment above.
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     Total_Errors_Detected : Nat := 0;
     --  Number of errors detected so far. Includes count of serious errors and
     --  non-serious errors, so this value is always greater than or equal to the
*************** package Atree is
*** 780,785 ****
--- 782,808 ----
        V10 : Node_Kind;
        V11 : Node_Kind) return Boolean;
  
+    --  12..15-parameter versions are not yet needed
+ 
+    function Nkind_In
+      (N   : Node_Id;
+       V1  : Node_Kind;
+       V2  : Node_Kind;
+       V3  : Node_Kind;
+       V4  : Node_Kind;
+       V5  : Node_Kind;
+       V6  : Node_Kind;
+       V7  : Node_Kind;
+       V8  : Node_Kind;
+       V9  : Node_Kind;
+       V10 : Node_Kind;
+       V11 : Node_Kind;
+       V12 : Node_Kind;
+       V13 : Node_Kind;
+       V14 : Node_Kind;
+       V15 : Node_Kind;
+       V16 : Node_Kind) return Boolean;
+ 
     pragma Inline (Nkind_In);
     --  Inline all above functions
  
diff -Nrcpad gcc-9.3.0/gcc/ada/atree.h gcc-10.1.0/gcc/ada/atree.h
*** gcc-9.3.0/gcc/ada/atree.h	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/atree.h	Thu May  7 10:49:59 2020
***************
*** 23,31 ****
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header corresponding to the Ada package specification for
!    Atree. It also contains the implementations of inlined functions from the
!    package body for Atree.  It was generated manually from atree.ads and
     atree.adb and must be kept synchronized with changes in these files.
  
     Note that only routines for reading the tree are included, since the tree
--- 23,31 ----
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header that corresponds to the Ada package specification for
!    Atree.  It also contains the implementation of inlined functions from the
!    package body for Atree.  It was created manually from atree.ads and
     atree.adb and must be kept synchronized with changes in these files.
  
     Note that only routines for reading the tree are included, since the tree
diff -Nrcpad gcc-9.3.0/gcc/ada/aux-io.c gcc-10.1.0/gcc/ada/aux-io.c
*** gcc-9.3.0/gcc/ada/aux-io.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/aux-io.c	Thu May  7 10:49:59 2020
***************
*** 31,40 ****
  
  #include <stdio.h>
  
! #ifdef IN_RTS
! #include "tconfig.h"
! #include "tsystem.h"
! #else
  #include "config.h"
  #include "system.h"
  #endif
--- 31,37 ----
  
  #include <stdio.h>
  
! #ifndef IN_RTS
  #include "config.h"
  #include "system.h"
  #endif
diff -Nrcpad gcc-9.3.0/gcc/ada/binde.adb gcc-10.1.0/gcc/ada/binde.adb
*** gcc-9.3.0/gcc/ada/binde.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/binde.adb	Thu May  7 10:49:59 2020
***************
*** 23,42 ****
  --                                                                          --
  ------------------------------------------------------------------------------
  
! with Binderr;  use Binderr;
! with Butil;    use Butil;
! with Debug;    use Debug;
! with Fname;    use Fname;
! with Opt;      use Opt;
  with Osint;
! with Output;   use Output;
  with Table;
  
  with System.Case_Util; use System.Case_Util;
  with System.HTable;
- with System.OS_Lib;
  
  package body Binde is
  
     --  We now have Elab_New, a new elaboration-order algorithm.
     --
--- 23,43 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
! with Binderr; use Binderr;
! with Butil;   use Butil;
! with Debug;   use Debug;
! with Fname;   use Fname;
! with Opt;     use Opt;
  with Osint;
! with Output;  use Output;
  with Table;
+ with Types;   use Types;
  
  with System.Case_Util; use System.Case_Util;
  with System.HTable;
  
  package body Binde is
+    use Unit_Id_Tables;
  
     --  We now have Elab_New, a new elaboration-order algorithm.
     --
*************** package body Binde is
*** 113,119 ****
        --  elaborated before After is elaborated.
  
        Forced,
!       --  Before and After come from a pair of lines in the forced elaboration
        --  order file.
  
        Elab,
--- 114,120 ----
        --  elaborated before After is elaborated.
  
        Forced,
!       --  Before and After come from a pair of lines in the forced-elaboration-
        --  order file.
  
        Elab,
*************** package body Binde is
*** 380,386 ****
     --  "$ must be elaborated before $ ..." where ... is the reason.
  
     procedure Force_Elab_Order;
!    --  Gather dependencies from the forced elaboration order file (-f switch)
  
     procedure Gather_Dependencies;
     --  Compute dependencies, building the Succ and UNR tables
--- 381,387 ----
     --  "$ must be elaborated before $ ..." where ... is the reason.
  
     procedure Force_Elab_Order;
!    --  Gather dependencies from the forced-elaboration-order file (-f switch)
  
     procedure Gather_Dependencies;
     --  Compute dependencies, building the Succ and UNR tables
*************** package body Binde is
*** 1793,1822 ****
     ----------------------
  
     procedure Force_Elab_Order is
-       use System.OS_Lib;
-       --  There is a lot of fiddly string manipulation below, because we don't
-       --  want to depend on misc utility packages like Ada.Characters.Handling.
- 
-       function Get_Line return String;
-       --  Read the next line from the file content read by Read_File. Strip
-       --  all leading and trailing blanks. Convert "(spec)" or "(body)" to
-       --  "%s"/"%b". Remove comments (Ada style; "--" to end of line).
- 
-       function Read_File (Name : String) return String_Ptr;
-       --  Read the entire contents of the named file
- 
        subtype Header_Num is Unit_Name_Type'Base range 0 .. 2**16 - 1;
-       type Line_Number is new Nat;
-       No_Line_Number  : constant Line_Number := 0;
-       Cur_Line_Number : Line_Number := 0;
-       --  Current line number in the Force_Elab_Order_File.
-       --  Incremented by Get_Line. Used in error messages.
  
        function Hash (N : Unit_Name_Type) return Header_Num;
  
        package Name_Map is new System.HTable.Simple_HTable
          (Header_Num => Header_Num,
!          Element    => Line_Number,
           No_Element => No_Line_Number,
           Key        => Unit_Name_Type,
           Hash       => Hash,
--- 1794,1806 ----
     ----------------------
  
     procedure Force_Elab_Order is
        subtype Header_Num is Unit_Name_Type'Base range 0 .. 2**16 - 1;
  
        function Hash (N : Unit_Name_Type) return Header_Num;
  
        package Name_Map is new System.HTable.Simple_HTable
          (Header_Num => Header_Num,
!          Element    => Logical_Line_Number,
           No_Element => No_Line_Number,
           Key        => Unit_Name_Type,
           Hash       => Hash,
*************** package body Binde is
*** 1837,2070 ****
           return (N - Unit_Name_Type'First) mod (Header_Num'Last + 1);
        end Hash;
  
!       ---------------
!       -- Read_File --
!       ---------------
! 
!       function Read_File (Name : String) return String_Ptr is
! 
!          --  All of the following calls should succeed, because we checked the
!          --  file in Switch.B, but we double check and raise Program_Error on
!          --  failure, just in case.
! 
!          F : constant File_Descriptor := Open_Read (Name, Binary);
! 
!       begin
!          if F = Invalid_FD then
!             raise Program_Error;
!          end if;
! 
!          declare
!             Len      : constant Natural    := Natural (File_Length (F));
!             Result   : constant String_Ptr := new String (1 .. Len);
!             Len_Read : constant Natural    :=
!                          Read (F, Result (1)'Address, Len);
! 
!             Status : Boolean;
! 
!          begin
!             if Len_Read /= Len then
!                raise Program_Error;
!             end if;
! 
!             Close (F, Status);
! 
!             if not Status then
!                raise Program_Error;
!             end if;
! 
!             return Result;
!          end;
!       end Read_File;
! 
!       Cur : Positive   := 1;
!       S   : String_Ptr := Read_File (Force_Elab_Order_File.all);
! 
!       --------------
!       -- Get_Line --
!       --------------
! 
!       function Get_Line return String is
!          First : Positive := Cur;
!          Last  : Natural;
! 
!       begin
!          Cur_Line_Number := Cur_Line_Number + 1;
! 
!          --  Skip to end of line
! 
!          while Cur <= S'Last
!            and then S (Cur) /= ASCII.LF
!            and then S (Cur) /= ASCII.CR
!          loop
!             Cur := Cur + 1;
!          end loop;
! 
!          --  Strip leading blanks
! 
!          while First <= S'Last and then S (First) = ' ' loop
!             First := First + 1;
!          end loop;
! 
!          --  Strip trailing blanks and comment
! 
!          Last := Cur - 1;
  
!          for J in First .. Last - 1 loop
!             if S (J .. J + 1) = "--" then
!                Last := J - 1;
!                exit;
!             end if;
!          end loop;
  
!          while Last >= First and then S (Last) = ' ' loop
!             Last := Last - 1;
!          end loop;
  
!          --  Convert "(spec)" or "(body)" to "%s"/"%b", strip trailing blanks
!          --  again.
  
           declare
!             Body_String : constant String   := "(body)";
!             BL          : constant Positive := Body_String'Length;
!             Spec_String : constant String   := "(spec)";
!             SL          : constant Positive := Spec_String'Length;
! 
!             Line : String renames S (First .. Last);
! 
!             Is_Body : Boolean := False;
!             Is_Spec : Boolean := False;
! 
           begin
!             if Line'Length >= SL
!               and then Line (Last - SL + 1 .. Last) = Spec_String
!             then
!                Is_Spec := True;
!                Last := Last - SL;
!             elsif Line'Length >= BL
!               and then Line (Last - BL + 1 .. Last) = Body_String
!             then
!                Is_Body := True;
!                Last := Last - BL;
!             end if;
! 
!             while Last >= First and then S (Last) = ' ' loop
!                Last := Last - 1;
!             end loop;
! 
!             --  Skip past LF or CR/LF
  
!             if Cur <= S'Last and then S (Cur) = ASCII.CR then
!                Cur := Cur + 1;
!             end if;
  
!             if Cur <= S'Last and then S (Cur) = ASCII.LF then
!                Cur := Cur + 1;
!             end if;
  
-             if Is_Spec then
-                return Line (First .. Last) & "%s";
-             elsif Is_Body then
-                return Line (First .. Last) & "%b";
              else
!                return Line;
              end if;
           end;
-       end Get_Line;
- 
-       --  Local variables
- 
-       Empty_Name : constant Unit_Name_Type := Name_Find ("");
-       Prev_Unit  : Unit_Id := No_Unit_Id;
- 
-    --  Start of processing for Force_Elab_Order
- 
-    begin
-       --  Loop through the file content, and build a dependency link for each
-       --  pair of lines. Ignore lines that should be ignored.
- 
-       while Cur <= S'Last loop
-          declare
-             Uname : constant Unit_Name_Type := Name_Find (Get_Line);
-             Error : Boolean := False;
  
!          begin
!             if Uname = Empty_Name then
!                null; -- silently skip blank lines
!             else
!                declare
!                   Dup : constant Line_Number := Name_Map.Get (Uname);
!                begin
!                   if Dup = No_Line_Number then
!                      Name_Map.Set (Uname, Cur_Line_Number);
! 
!                      --  We don't need to give the "not present" message in
!                      --  the case of "duplicate unit", because we would have
!                      --  already given the "not present" message on the
!                      --  first occurrence.
! 
!                      if Get_Name_Table_Int (Uname) = 0
!                        or else Unit_Id (Get_Name_Table_Int (Uname)) =
!                                  No_Unit_Id
!                      then
!                         Error := True;
!                         if Doing_New then
!                            Write_Line
!                              ("""" & Get_Name_String (Uname)
!                               & """: not present; ignored");
!                         end if;
!                      end if;
  
!                   else
!                      Error := True;
                       if Doing_New then
!                         Error_Msg_Nat_1  := Nat (Cur_Line_Number);
!                         Error_Msg_Unit_1 := Uname;
!                         Error_Msg_Nat_2  := Nat (Dup);
!                         Error_Msg
!                           (Force_Elab_Order_File.all
!                            & ":#: duplicate unit name $ from line #");
                       end if;
-                   end if;
-                end;
- 
-                if not Error then
-                   declare
-                      Cur_Unit : constant Unit_Id := Unit_Id_Of (Uname);
-                   begin
-                      if Is_Internal_File_Name
-                           (Units.Table (Cur_Unit).Sfile)
-                      then
-                         if Doing_New then
-                            Write_Line
-                              ("""" & Get_Name_String (Uname)
-                               & """: predefined unit ignored");
-                         end if;
  
!                      else
!                         if Prev_Unit /= No_Unit_Id then
!                            if Doing_New then
!                               Write_Unit_Name (Units.Table (Prev_Unit).Uname);
!                               Write_Str (" <-- ");
!                               Write_Unit_Name (Units.Table (Cur_Unit).Uname);
!                               Write_Eol;
!                            end if;
! 
!                            Build_Link
!                              (Before => Prev_Unit,
!                               After  => Cur_Unit,
!                               R      => Forced);
!                         end if;
  
!                         Prev_Unit := Cur_Unit;
!                      end if;
!                   end;
                 end if;
!             end if;
!          end;
        end loop;
- 
-       Free (S);
     end Force_Elab_Order;
  
     -------------------------
--- 1821,1906 ----
           return (N - Unit_Name_Type'First) mod (Header_Num'Last + 1);
        end Hash;
  
!       --  Local variables
  
!       Cur_Line_Number : Logical_Line_Number;
!       Error           : Boolean := False;
!       Iter            : Forced_Units_Iterator;
!       Prev_Unit       : Unit_Id := No_Unit_Id;
!       Uname           : Unit_Name_Type;
  
!    --  Start of processing for Force_Elab_Order
  
!    begin
!       Iter := Iterate_Forced_Units;
!       while Has_Next (Iter) loop
!          Next (Iter, Uname, Cur_Line_Number);
  
           declare
!             Dup : constant Logical_Line_Number := Name_Map.Get (Uname);
           begin
!             if Dup = No_Line_Number then
!                Name_Map.Set (Uname, Cur_Line_Number);
  
!                --  We don't need to give the "not present" message in the case
!                --  of "duplicate unit", because we would have already given the
!                --  "not present" message on the first occurrence.
  
!                if Get_Name_Table_Int (Uname) = 0
!                  or else Unit_Id (Get_Name_Table_Int (Uname)) = No_Unit_Id
!                then
!                   Error := True;
!                   if Doing_New then
!                      Write_Line
!                        ("""" & Get_Name_String (Uname)
!                         & """: not present; ignored");
!                   end if;
!                end if;
  
              else
!                Error := True;
!                if Doing_New then
!                   Error_Msg_Nat_1  := Nat (Cur_Line_Number);
!                   Error_Msg_Unit_1 := Uname;
!                   Error_Msg_Nat_2  := Nat (Dup);
!                   Error_Msg
!                     (Force_Elab_Order_File.all
!                      & ":#: duplicate unit name $ from line #");
!                end if;
              end if;
           end;
  
!          if not Error then
!             declare
!                Cur_Unit : constant Unit_Id := Unit_Id_Of (Uname);
!             begin
!                if Is_Internal_File_Name (Units.Table (Cur_Unit).Sfile) then
!                   if Doing_New then
!                      Write_Line
!                        ("""" & Get_Name_String (Uname)
!                         & """: predefined unit ignored");
!                   end if;
  
!                else
!                   if Prev_Unit /= No_Unit_Id then
                       if Doing_New then
!                         Write_Unit_Name (Units.Table (Prev_Unit).Uname);
!                         Write_Str (" <-- ");
!                         Write_Unit_Name (Units.Table (Cur_Unit).Uname);
!                         Write_Eol;
                       end if;
  
!                      Build_Link
!                        (Before => Prev_Unit,
!                         After  => Cur_Unit,
!                         R      => Forced);
!                   end if;
  
!                   Prev_Unit := Cur_Unit;
                 end if;
!             end;
!          end if;
        end loop;
     end Force_Elab_Order;
  
     -------------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/binde.ads gcc-10.1.0/gcc/ada/binde.ads
*** gcc-9.3.0/gcc/ada/binde.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/binde.ads	Thu May  7 10:49:59 2020
***************
*** 28,50 ****
  
  with ALI;   use ALI;
  with Namet; use Namet;
- with Types; use Types;
- 
- with GNAT.Dynamic_Tables;
  
  package Binde is
  
-    package Unit_Id_Tables is new GNAT.Dynamic_Tables
-      (Table_Component_Type => Unit_Id,
-       Table_Index_Type     => Nat,
-       Table_Low_Bound      => 1,
-       Table_Initial        => 500,
-       Table_Increment      => 200);
-    use Unit_Id_Tables;
- 
-    subtype Unit_Id_Table is Unit_Id_Tables.Instance;
-    subtype Unit_Id_Array is Unit_Id_Tables.Table_Type;
- 
     procedure Find_Elab_Order
       (Elab_Order          : out Unit_Id_Table;
        First_Main_Lib_File : File_Name_Type);
--- 28,36 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/bindgen.adb gcc-10.1.0/gcc/ada/bindgen.adb
*** gcc-9.3.0/gcc/ada/bindgen.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/bindgen.adb	Thu May  7 10:49:59 2020
***************
*** 23,29 ****
  --                                                                          --
  ------------------------------------------------------------------------------
  
- with ALI;      use ALI;
  with Casing;   use Casing;
  with Fname;    use Fname;
  with Gnatvsn;  use Gnatvsn;
--- 23,28 ----
*************** package body Bindgen is
*** 82,88 ****
     --  domains just before calling the main procedure from the environment
     --  task.
  
!    System_Secondary_Stack_Used : Boolean := False;
     --  Flag indicating whether the unit System.Secondary_Stack is in the
     --  closure of the partition. This is set by Resolve_Binder_Options, and
     --  is used to initialize the package in cases where the run-time brings
--- 81,87 ----
     --  domains just before calling the main procedure from the environment
     --  task.
  
!    System_Secondary_Stack_Package_In_Closure : Boolean := False;
     --  Flag indicating whether the unit System.Secondary_Stack is in the
     --  closure of the partition. This is set by Resolve_Binder_Options, and
     --  is used to initialize the package in cases where the run-time brings
*************** package body Bindgen is
*** 525,530 ****
--- 524,530 ----
          and then not Configurable_Run_Time_On_Target
        then
           WBI ("   type No_Param_Proc is access procedure;");
+          WBI ("   pragma Favor_Top_Level (No_Param_Proc);");
           WBI ("");
        end if;
  
*************** package body Bindgen is
*** 585,613 ****
              WBI ("");
           end if;
  
!          --  A restricted run-time may attempt to initialize the main task's
!          --  secondary stack even if the stack is not used. Consequently,
!          --  the binder needs to initialize Binder_Sec_Stacks_Count anytime
!          --  System.Secondary_Stack is in the enclosure of the partition.
  
-          if System_Secondary_Stack_Used then
              WBI ("      Binder_Sec_Stacks_Count : Natural;");
              WBI ("      pragma Import (Ada, Binder_Sec_Stacks_Count, " &
                   """__gnat_binder_ss_count"");");
              WBI ("");
-          end if;
  
!          if Sec_Stack_Used then
!             WBI ("      Default_Secondary_Stack_Size : " &
!                  "System.Parameters.Size_Type;");
!             WBI ("      pragma Import (C, Default_Secondary_Stack_Size, " &
!                  """__gnat_default_ss_size"");");
  
!             WBI ("      Default_Sized_SS_Pool : System.Address;");
!             WBI ("      pragma Import (Ada, Default_Sized_SS_Pool, " &
!                  """__gnat_default_ss_pool"");");
  
!             WBI ("");
           end if;
  
           WBI ("   begin");
--- 585,617 ----
              WBI ("");
           end if;
  
!          if System_Secondary_Stack_Package_In_Closure then
!             --  System.Secondary_Stack is in the closure of the program
!             --  because the program uses the secondary stack or the restricted
!             --  run-time is unconditionally calling SS_Init. In both cases,
!             --  SS_Init needs to know the number of secondary stacks created by
!             --  the binder.
  
              WBI ("      Binder_Sec_Stacks_Count : Natural;");
              WBI ("      pragma Import (Ada, Binder_Sec_Stacks_Count, " &
                   """__gnat_binder_ss_count"");");
              WBI ("");
  
!             --  Import secondary stack pool variables if the secondary stack
!             --  used. They are not referenced otherwise.
  
!             if Sec_Stack_Used then
!                WBI ("      Default_Secondary_Stack_Size : " &
!                     "System.Parameters.Size_Type;");
!                WBI ("      pragma Import (C, Default_Secondary_Stack_Size, " &
!                     """__gnat_default_ss_size"");");
  
!                WBI ("      Default_Sized_SS_Pool : System.Address;");
!                WBI ("      pragma Import (Ada, Default_Sized_SS_Pool, " &
!                     """__gnat_default_ss_pool"");");
! 
!                WBI ("");
!             end if;
           end if;
  
           WBI ("   begin");
*************** package body Bindgen is
*** 642,689 ****
              WBI ("      null;");
           end if;
  
!          --  Generate default-sized secondary stack pool and set secondary
!          --  stack globals.
! 
!          if Sec_Stack_Used then
  
!             --  Elaborate the body of the binder to initialize the default-
!             --  sized secondary stack pool.
  
!             WBI ("");
!             WBI ("      " & Get_Ada_Main_Name & "'Elab_Body;");
  
!             --  Generate the default-sized secondary stack pool and set the
!             --  related secondary stack globals.
  
!             Set_String ("      Default_Secondary_Stack_Size := ");
  
!             if Opt.Default_Sec_Stack_Size /= Opt.No_Stack_Size then
!                Set_Int (Opt.Default_Sec_Stack_Size);
!             else
!                Set_String ("System.Parameters.Runtime_Default_Sec_Stack_Size");
!             end if;
  
!             Set_Char (';');
!             Write_Statement_Buffer;
  
!             Set_String ("      Binder_Sec_Stacks_Count := ");
!             Set_Int (Num_Sec_Stacks);
!             Set_Char (';');
!             Write_Statement_Buffer;
  
!             WBI ("      Default_Sized_SS_Pool := " &
!                    "Sec_Default_Sized_Stacks'Address;");
!             WBI ("");
  
!          --  When a restricted run-time initializes the main task's secondary
!          --  stack but the program does not use it, no secondary stack is
!          --  generated. Binder_Sec_Stacks_Count is set to zero so the run-time
!          --  is aware that the lack of pre-allocated secondary stack is
!          --  expected.
  
!          elsif System_Secondary_Stack_Used then
!             WBI ("      Binder_Sec_Stacks_Count := 0;");
           end if;
  
        --  Normal case (standard library not suppressed). Set all global values
--- 646,694 ----
              WBI ("      null;");
           end if;
  
!          --  Generate the default-sized secondary stack pool if the secondary
!          --  stack is used by the program.
  
!          if System_Secondary_Stack_Package_In_Closure then
!             if Sec_Stack_Used then
!                --  Elaborate the body of the binder to initialize the default-
!                --  sized secondary stack pool.
  
!                WBI ("");
!                WBI ("      " & Get_Ada_Main_Name & "'Elab_Body;");
  
!                --  Generate the default-sized secondary stack pool and set the
!                --  related secondary stack globals.
  
!                Set_String ("      Default_Secondary_Stack_Size := ");
  
!                if Opt.Default_Sec_Stack_Size /= Opt.No_Stack_Size then
!                   Set_Int (Opt.Default_Sec_Stack_Size);
!                else
!                   Set_String
!                     ("System.Parameters.Runtime_Default_Sec_Stack_Size");
!                end if;
  
!                Set_Char (';');
!                Write_Statement_Buffer;
  
!                Set_String ("      Binder_Sec_Stacks_Count := ");
!                Set_Int (Num_Sec_Stacks);
!                Set_Char (';');
!                Write_Statement_Buffer;
  
!                WBI ("      Default_Sized_SS_Pool := " &
!                       "Sec_Default_Sized_Stacks'Address;");
!                WBI ("");
  
!             else
!                --  The presence of System.Secondary_Stack in the closure of the
!                --  program implies the restricted run-time is unconditionally
!                --  calling SS_Init. Let SS_Init know that no stacks were
!                --  created.
  
!                WBI ("      Binder_Sec_Stacks_Count := 0;");
!             end if;
           end if;
  
        --  Normal case (standard library not suppressed). Set all global values
*************** package body Bindgen is
*** 1805,1817 ****
        --  referenced elsewhere in the generated program, but is needed by
        --  the debugger (that's why it is generated in the first place). The
        --  reference stops Ada_Main_Program_Name from being optimized away by
!       --  smart linkers, such as the AiX linker.
  
        --  Because this variable is unused, we make this variable "aliased"
        --  with a pragma Volatile in order to tell the compiler to preserve
        --  this variable at any level of optimization.
  
!       if Bind_Main_Program and not CodePeer_Mode then
           WBI ("      Ensure_Reference : aliased System.Address := " &
                "Ada_Main_Program_Name'Address;");
           WBI ("      pragma Volatile (Ensure_Reference);");
--- 1810,1829 ----
        --  referenced elsewhere in the generated program, but is needed by
        --  the debugger (that's why it is generated in the first place). The
        --  reference stops Ada_Main_Program_Name from being optimized away by
!       --  smart linkers.
  
        --  Because this variable is unused, we make this variable "aliased"
        --  with a pragma Volatile in order to tell the compiler to preserve
        --  this variable at any level of optimization.
  
!       --  CodePeer and CCG do not need this extra code. The code is also not
!       --  needed if the binder is in "Minimal Binder" mode.
! 
!       if Bind_Main_Program
!         and then not Minimal_Binder
!         and then not CodePeer_Mode
!         and then not Generate_C_Code
!       then
           WBI ("      Ensure_Reference : aliased System.Address := " &
                "Ada_Main_Program_Name'Address;");
           WBI ("      pragma Volatile (Ensure_Reference);");
*************** package body Bindgen is
*** 1820,1837 ****
  
        WBI ("   begin");
  
!       --  Acquire command line arguments if present on target
  
        if CodePeer_Mode then
           null;
  
        elsif Command_Line_Args_On_Target then
!          WBI ("      gnat_argc := argc;");
!          WBI ("      gnat_argv := argv;");
           WBI ("      gnat_envp := envp;");
           WBI ("");
  
!       --  If configurable run time and no command line args, then nothing needs
        --  to be done since the gnat_argc/argv/envp variables are suppressed in
        --  this case.
  
--- 1832,1856 ----
  
        WBI ("   begin");
  
!       --  Acquire command-line arguments if present on target
  
        if CodePeer_Mode then
           null;
  
        elsif Command_Line_Args_On_Target then
! 
!          --  Initialize gnat_argc/gnat_argv only if not already initialized,
!          --  to avoid losing the result of any command-line processing done by
!          --  earlier GNAT run-time initialization.
! 
!          WBI ("      if gnat_argc = 0 then");
!          WBI ("         gnat_argc := argc;");
!          WBI ("         gnat_argv := argv;");
!          WBI ("      end if;");
           WBI ("      gnat_envp := envp;");
           WBI ("");
  
!       --  If configurable run-time and no command-line args, then nothing needs
        --  to be done since the gnat_argc/argv/envp variables are suppressed in
        --  this case.
  
*************** package body Bindgen is
*** 2350,2374 ****
           --  program uses two Ada libraries). Also zero terminate the string
           --  so that its end can be found reliably at run time.
  
!          WBI ("");
!          WBI ("   GNAT_Version : constant String :=");
!          WBI ("                    """ & Ver_Prefix &
!                                    Gnat_Version_String &
!                                    """ & ASCII.NUL;");
!          WBI ("   pragma Export (C, GNAT_Version, ""__gnat_version"");");
  
!          WBI ("");
!          Set_String ("   Ada_Main_Program_Name : constant String := """);
!          Get_Name_String (Units.Table (First_Unit_Entry).Uname);
  
!          Set_Main_Program_Name;
!          Set_String (""" & ASCII.NUL;");
  
!          Write_Statement_Buffer;
  
!          WBI
!            ("   pragma Export (C, Ada_Main_Program_Name, " &
!             """__gnat_ada_main_program_name"");");
        end if;
  
        WBI ("");
--- 2369,2395 ----
           --  program uses two Ada libraries). Also zero terminate the string
           --  so that its end can be found reliably at run time.
  
!          if not Minimal_Binder then
!             WBI ("");
!             WBI ("   GNAT_Version : constant String :=");
!             WBI ("                    """ & Ver_Prefix &
!                                       Gnat_Version_String &
!                                       """ & ASCII.NUL;");
!             WBI ("   pragma Export (C, GNAT_Version, ""__gnat_version"");");
  
!             WBI ("");
!             Set_String ("   Ada_Main_Program_Name : constant String := """);
!             Get_Name_String (Units.Table (First_Unit_Entry).Uname);
  
!             Set_Main_Program_Name;
!             Set_String (""" & ASCII.NUL;");
  
!             Write_Statement_Buffer;
  
!             WBI
!               ("   pragma Export (C, Ada_Main_Program_Name, " &
!                """__gnat_ada_main_program_name"");");
!          end if;
        end if;
  
        WBI ("");
*************** package body Bindgen is
*** 3070,3076 ****
           --  Ditto for the use of System.Secondary_Stack
  
           Check_Package
!            (System_Secondary_Stack_Used, "system.secondary_stack%s");
  
           --  Ditto for use of an SMP bareboard runtime
  
--- 3091,3098 ----
           --  Ditto for the use of System.Secondary_Stack
  
           Check_Package
!            (System_Secondary_Stack_Package_In_Closure,
!             "system.secondary_stack%s");
  
           --  Ditto for use of an SMP bareboard runtime
  
diff -Nrcpad gcc-9.3.0/gcc/ada/bindgen.ads gcc-10.1.0/gcc/ada/bindgen.ads
*** gcc-9.3.0/gcc/ada/bindgen.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/bindgen.ads	Thu May  7 10:49:59 2020
***************
*** 32,41 ****
  
  --  See the body for exact details of the file that is generated
  
! with Binde; use Binde;
  
  package Bindgen is
- 
     procedure Gen_Output_File
       (Filename   : String;
        Elab_Order : Unit_Id_Array);
--- 32,40 ----
  
  --  See the body for exact details of the file that is generated
  
! with ALI; use ALI;
  
  package Bindgen is
     procedure Gen_Output_File
       (Filename   : String;
        Elab_Order : Unit_Id_Array);
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-augmentors.adb gcc-10.1.0/gcc/ada/bindo-augmentors.adb
*** gcc-9.3.0/gcc/ada/bindo-augmentors.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-augmentors.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,350 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                      B I N D O . A U G M E N T O R S                     --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Debug;  use Debug;
+ with Output; use Output;
+ with Types;  use Types;
+ 
+ with Bindo.Writers;
+ use  Bindo.Writers;
+ use  Bindo.Writers.Phase_Writers;
+ 
+ package body Bindo.Augmentors is
+ 
+    ------------------------------
+    -- Library_Graph_Augmentors --
+    ------------------------------
+ 
+    package body Library_Graph_Augmentors is
+ 
+       ----------------
+       -- Statistics --
+       ----------------
+ 
+       Longest_Path : Natural := 0;
+       --  The length of the longest path found during the traversal of the
+       --  invocation graph.
+ 
+       Total_Visited : Natural := 0;
+       --  The number of visited invocation graph vertices during the process
+       --  of augmentation.
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Visit_Elaboration_Root
+         (Inv_Graph : Invocation_Graph;
+          Lib_Graph : Library_Graph;
+          Root      : Invocation_Graph_Vertex_Id);
+       pragma Inline (Visit_Elaboration_Root);
+       --  Start a DFS traversal from elaboration root Root to:
+       --
+       --    * Detect transitions between units.
+       --
+       --    * Create invocation edges for each such transition where the
+       --      successor is Root.
+ 
+       procedure Visit_Elaboration_Roots
+         (Inv_Graph : Invocation_Graph;
+          Lib_Graph : Library_Graph);
+       pragma Inline (Visit_Elaboration_Roots);
+       --  Start a DFS traversal from all elaboration roots to:
+       --
+       --    * Detect transitions between units.
+       --
+       --    * Create invocation edges for each such transition where the
+       --      successor is the current root.
+ 
+       procedure Visit_Vertex
+         (Inv_Graph                  : Invocation_Graph;
+          Lib_Graph                  : Library_Graph;
+          Invoker                    : Invocation_Graph_Vertex_Id;
+          Last_Vertex                : Library_Graph_Vertex_Id;
+          Root_Vertex                : Library_Graph_Vertex_Id;
+          Visited_Invokers           : IGV_Sets.Membership_Set;
+          Activates_Task             : Boolean;
+          Internal_Controlled_Action : Boolean;
+          Path                       : Natural);
+       pragma Inline (Visit_Vertex);
+       --  Visit invocation graph vertex Invoker to:
+       --
+       --    * Detect a transition from the last library graph vertex denoted by
+       --      Last_Vertex to the library graph vertex of Invoker.
+       --
+       --    * Create an invocation edge in library graph Lib_Graph to reflect
+       --      the transition, where the predecessor is the library graph vertex
+       --      or Invoker, and the successor is Root_Vertex.
+       --
+       --    * Visit the neighbours of Invoker.
+       --
+       --  Flag Internal_Controlled_Action should be set when the DFS traversal
+       --  visited an internal controlled invocation edge. Path is the length of
+       --  the path.
+ 
+       procedure Write_Statistics;
+       pragma Inline (Write_Statistics);
+       --  Write the statistical information of the augmentation to standard
+       --  output.
+ 
+       ---------------------------
+       -- Augment_Library_Graph --
+       ---------------------------
+ 
+       procedure Augment_Library_Graph
+         (Inv_Graph : Invocation_Graph;
+          Lib_Graph : Library_Graph)
+       is
+       begin
+          pragma Assert (Present (Lib_Graph));
+ 
+          --  Nothing to do when there is no invocation graph
+ 
+          if not Present (Inv_Graph) then
+             return;
+          end if;
+ 
+          Start_Phase (Library_Graph_Augmentation);
+ 
+          --  Prepare the statistics data
+ 
+          Longest_Path  := 0;
+          Total_Visited := 0;
+ 
+          Visit_Elaboration_Roots (Inv_Graph, Lib_Graph);
+          Write_Statistics;
+ 
+          End_Phase (Library_Graph_Augmentation);
+       end Augment_Library_Graph;
+ 
+       ----------------------------
+       -- Visit_Elaboration_Root --
+       ----------------------------
+ 
+       procedure Visit_Elaboration_Root
+         (Inv_Graph : Invocation_Graph;
+          Lib_Graph : Library_Graph;
+          Root      : Invocation_Graph_Vertex_Id)
+       is
+          pragma Assert (Present (Inv_Graph));
+          pragma Assert (Present (Lib_Graph));
+          pragma Assert (Present (Root));
+ 
+          Root_Vertex : constant Library_Graph_Vertex_Id :=
+                          Body_Vertex (Inv_Graph, Root);
+ 
+          Visited : IGV_Sets.Membership_Set;
+ 
+       begin
+          --  Nothing to do when the unit where the elaboration root resides
+          --  lacks elaboration code. This implies that any invocation edges
+          --  going out of the unit are unwanted. This behavior emulates the
+          --  old elaboration order mechanism.
+ 
+          if Has_No_Elaboration_Code (Lib_Graph, Root_Vertex) then
+             return;
+          end if;
+ 
+          --  Prepare the global data
+ 
+          Visited := IGV_Sets.Create (Number_Of_Vertices (Inv_Graph));
+ 
+          Visit_Vertex
+            (Inv_Graph                  => Inv_Graph,
+             Lib_Graph                  => Lib_Graph,
+             Invoker                    => Root,
+             Last_Vertex                => Root_Vertex,
+             Root_Vertex                => Root_Vertex,
+             Visited_Invokers           => Visited,
+             Activates_Task             => False,
+             Internal_Controlled_Action => False,
+             Path                       => 0);
+ 
+          IGV_Sets.Destroy (Visited);
+       end Visit_Elaboration_Root;
+ 
+       -----------------------------
+       -- Visit_Elaboration_Roots --
+       -----------------------------
+ 
+       procedure Visit_Elaboration_Roots
+         (Inv_Graph : Invocation_Graph;
+          Lib_Graph : Library_Graph)
+       is
+          Iter : Elaboration_Root_Iterator;
+          Root : Invocation_Graph_Vertex_Id;
+ 
+       begin
+          pragma Assert (Present (Inv_Graph));
+          pragma Assert (Present (Lib_Graph));
+ 
+          Iter := Iterate_Elaboration_Roots (Inv_Graph);
+          while Has_Next (Iter) loop
+             Next (Iter, Root);
+ 
+             Visit_Elaboration_Root
+               (Inv_Graph => Inv_Graph,
+                Lib_Graph => Lib_Graph,
+                Root      => Root);
+          end loop;
+       end Visit_Elaboration_Roots;
+ 
+       ------------------
+       -- Visit_Vertex --
+       ------------------
+ 
+       procedure Visit_Vertex
+         (Inv_Graph                  : Invocation_Graph;
+          Lib_Graph                  : Library_Graph;
+          Invoker                    : Invocation_Graph_Vertex_Id;
+          Last_Vertex                : Library_Graph_Vertex_Id;
+          Root_Vertex                : Library_Graph_Vertex_Id;
+          Visited_Invokers           : IGV_Sets.Membership_Set;
+          Activates_Task             : Boolean;
+          Internal_Controlled_Action : Boolean;
+          Path                       : Natural)
+       is
+          New_Path : constant Natural := Path + 1;
+ 
+          Edge           : Invocation_Graph_Edge_Id;
+          Edge_Kind      : Invocation_Kind;
+          Invoker_Vertex : Library_Graph_Vertex_Id;
+          Iter           : Edges_To_Targets_Iterator;
+ 
+       begin
+          pragma Assert (Present (Inv_Graph));
+          pragma Assert (Present (Lib_Graph));
+          pragma Assert (Present (Invoker));
+          pragma Assert (Present (Last_Vertex));
+          pragma Assert (Present (Root_Vertex));
+          pragma Assert (IGV_Sets.Present (Visited_Invokers));
+ 
+          --  Nothing to do when the current invocation graph vertex has already
+          --  been visited.
+ 
+          if IGV_Sets.Contains (Visited_Invokers, Invoker) then
+             return;
+          end if;
+ 
+          IGV_Sets.Insert (Visited_Invokers, Invoker);
+ 
+          --  Update the statistics
+ 
+          Longest_Path  := Natural'Max (Longest_Path, New_Path);
+          Total_Visited := Total_Visited + 1;
+ 
+          --  The library graph vertex of the current invocation graph vertex
+          --  differs from that of the previous invocation graph vertex. This
+          --  indicates that elaboration is transitioning from one unit to
+          --  another. Add a library graph edge to capture this dependency.
+ 
+          Invoker_Vertex := Body_Vertex (Inv_Graph, Invoker);
+          pragma Assert (Present (Invoker_Vertex));
+ 
+          if Invoker_Vertex /= Last_Vertex then
+ 
+             --  The path ultimately reaches back into the unit where the root
+             --  resides, resulting in a self dependency. In most cases this is
+             --  a valid circularity, except when the path went through one of
+             --  the Deep_xxx finalization-related routines. Do not create a
+             --  library graph edge because the circularity is the result of
+             --  expansion and thus spurious.
+ 
+             if Invoker_Vertex = Root_Vertex
+               and then Internal_Controlled_Action
+             then
+                null;
+ 
+             --  Otherwise create the library graph edge, even if this results
+             --  in a self dependency.
+ 
+             else
+                Add_Edge
+                  (G              => Lib_Graph,
+                   Pred           => Invoker_Vertex,
+                   Succ           => Root_Vertex,
+                   Kind           => Invocation_Edge,
+                   Activates_Task => Activates_Task);
+             end if;
+          end if;
+ 
+          --  Extend the DFS traversal to all targets of the invocation graph
+          --  vertex.
+ 
+          Iter := Iterate_Edges_To_Targets (Inv_Graph, Invoker);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+             Edge_Kind := Kind (Inv_Graph, Edge);
+ 
+             Visit_Vertex
+               (Inv_Graph                  => Inv_Graph,
+                Lib_Graph                  => Lib_Graph,
+                Invoker                    => Target (Inv_Graph, Edge),
+                Last_Vertex                => Invoker_Vertex,
+                Root_Vertex                => Root_Vertex,
+                Visited_Invokers           => Visited_Invokers,
+                Activates_Task             =>
+                  Activates_Task
+                    or else Edge_Kind = Task_Activation,
+                Internal_Controlled_Action =>
+                  Internal_Controlled_Action
+                    or else Edge_Kind in Internal_Controlled_Invocation_Kind,
+                Path                       => New_Path);
+          end loop;
+       end Visit_Vertex;
+ 
+       ----------------------
+       -- Write_Statistics --
+       ----------------------
+ 
+       procedure Write_Statistics is
+       begin
+          --  Nothing to do when switch -d_L (output library item graph) is not
+          --  in effect.
+ 
+          if not Debug_Flag_Underscore_LL then
+             return;
+          end if;
+ 
+          Write_Str ("Library Graph Augmentation");
+          Write_Eol;
+          Write_Eol;
+ 
+          Write_Str ("Vertices visited   : ");
+          Write_Num (Int (Total_Visited));
+          Write_Eol;
+ 
+          Write_Str ("Longest path length: ");
+          Write_Num (Int (Longest_Path));
+          Write_Eol;
+          Write_Eol;
+ 
+          Write_Str ("Library Graph Augmentation end");
+          Write_Eol;
+          Write_Eol;
+       end Write_Statistics;
+    end Library_Graph_Augmentors;
+ 
+ end Bindo.Augmentors;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-augmentors.ads gcc-10.1.0/gcc/ada/bindo-augmentors.ads
*** gcc-9.3.0/gcc/ada/bindo-augmentors.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-augmentors.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,62 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                      B I N D O . A U G M E N T O R S                     --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  For full architecture, see unit Bindo.
+ 
+ --  The following unit contains facilities to enhance the library graph, which
+ --  reflects source dependencies between units, with information obtained from
+ --  the invocation graph, which reflects all activations of tasks, calls, and
+ --  instantiations within units.
+ 
+ with Bindo.Graphs;
+ use  Bindo.Graphs;
+ use  Bindo.Graphs.Invocation_Graphs;
+ use  Bindo.Graphs.Library_Graphs;
+ 
+ package Bindo.Augmentors is
+ 
+    ------------------------------
+    -- Library_Graph_Augmentors --
+    ------------------------------
+ 
+    package Library_Graph_Augmentors is
+       procedure Augment_Library_Graph
+         (Inv_Graph : Invocation_Graph;
+          Lib_Graph : Library_Graph);
+       --  Augment library graph Lib_Graph with information from invocation
+       --  graph Inv_Graph as follows:
+       --
+       --    1) Traverse the invocation graph starting from each elaboration
+       --       procedure of unit Root.
+       --
+       --    2) Each time the traversal transitions from one unit into another
+       --       unit Curr, add an invocation edge between predecessor Curr and
+       --       successor Root in the library graph.
+       --
+       --    3) Do the above steps for all units with an elaboration procedure.
+ 
+    end Library_Graph_Augmentors;
+ 
+ end Bindo.Augmentors;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-builders.adb gcc-10.1.0/gcc/ada/bindo-builders.adb
*** gcc-9.3.0/gcc/ada/bindo-builders.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-builders.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,769 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                        B I N D O . B U I L D E R S                       --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Binderr; use Binderr;
+ with Butil;   use Butil;
+ with Debug;   use Debug;
+ with Opt;     use Opt;
+ with Output;  use Output;
+ with Types;   use Types;
+ 
+ with Bindo.Units; use Bindo.Units;
+ 
+ with Bindo.Validators;
+ use  Bindo.Validators;
+ use  Bindo.Validators.Invocation_Graph_Validators;
+ use  Bindo.Validators.Library_Graph_Validators;
+ 
+ with Bindo.Writers;
+ use  Bindo.Writers;
+ use  Bindo.Writers.Phase_Writers;
+ 
+ with GNAT;                 use GNAT;
+ with GNAT.Dynamic_HTables; use GNAT.Dynamic_HTables;
+ 
+ package body Bindo.Builders is
+ 
+    -------------------------------
+    -- Invocation_Graph_Builders --
+    -------------------------------
+ 
+    package body Invocation_Graph_Builders is
+ 
+       -----------------
+       -- Global data --
+       -----------------
+ 
+       Inv_Graph : Invocation_Graph := Invocation_Graphs.Nil;
+       Lib_Graph : Library_Graph    := Library_Graphs.Nil;
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Create_Edge (IR_Id : Invocation_Relation_Id);
+       pragma Inline (Create_Edge);
+       --  Create a new edge for invocation relation IR_Id in invocation graph
+       --  Inv_Graph.
+ 
+       procedure Create_Edges (U_Id : Unit_Id);
+       pragma Inline (Create_Edges);
+       --  Create new edges for all invocation relations of unit U_Id
+ 
+       procedure Create_Vertex
+         (IC_Id  : Invocation_Construct_Id;
+          Vertex : Library_Graph_Vertex_Id);
+       pragma Inline (Create_Vertex);
+       --  Create a new vertex for invocation construct IC_Id in invocation
+       --  graph Inv_Graph. The vertex is linked to vertex Vertex of library
+       --  graph Lib_Graph.
+ 
+       procedure Create_Vertices (U_Id : Unit_Id);
+       pragma Inline (Create_Vertices);
+       --  Create new vertices for all invocation constructs of unit U_Id in
+       --  invocation graph Inv_Graph.
+ 
+       function Declaration_Placement_Vertex
+         (Vertex    : Library_Graph_Vertex_Id;
+          Placement : Declaration_Placement_Kind)
+          return Library_Graph_Vertex_Id;
+       pragma Inline (Declaration_Placement_Vertex);
+       --  Obtain the spec or body of vertex Vertex depending on the requested
+       --  placement in Placement.
+ 
+       ----------------------------
+       -- Build_Invocation_Graph --
+       ----------------------------
+ 
+       function Build_Invocation_Graph
+         (Lib_G : Library_Graph) return Invocation_Graph
+       is
+       begin
+          pragma Assert (Present (Lib_G));
+ 
+          Start_Phase (Invocation_Graph_Construction);
+ 
+          --  Prepare the global data
+ 
+          Inv_Graph :=
+            Create
+              (Initial_Vertices => Number_Of_Elaborable_Units,
+               Initial_Edges    => Number_Of_Elaborable_Units);
+          Lib_Graph := Lib_G;
+ 
+          For_Each_Elaborable_Unit (Create_Vertices'Access);
+          For_Each_Elaborable_Unit (Create_Edges'Access);
+ 
+          Validate_Invocation_Graph (Inv_Graph);
+          End_Phase (Invocation_Graph_Construction);
+ 
+          return Inv_Graph;
+       end Build_Invocation_Graph;
+ 
+       -----------------
+       -- Create_Edge --
+       -----------------
+ 
+       procedure Create_Edge (IR_Id : Invocation_Relation_Id) is
+          pragma Assert (Present (Inv_Graph));
+          pragma Assert (Present (Lib_Graph));
+          pragma Assert (Present (IR_Id));
+ 
+          Invoker_Sig : constant Invocation_Signature_Id := Invoker (IR_Id);
+          Target_Sig  : constant Invocation_Signature_Id := Target  (IR_Id);
+ 
+          pragma Assert (Present (Invoker_Sig));
+          pragma Assert (Present (Target_Sig));
+ 
+       begin
+          --  Nothing to do when the target denotes an invocation construct that
+          --  resides in a unit which will never be elaborated.
+ 
+          if not Needs_Elaboration (Target_Sig) then
+             return;
+          end if;
+ 
+          Add_Edge
+            (G      => Inv_Graph,
+             Source => Corresponding_Vertex (Inv_Graph, Invoker_Sig),
+             Target => Corresponding_Vertex (Inv_Graph, Target_Sig),
+             IR_Id  => IR_Id);
+       end Create_Edge;
+ 
+       ------------------
+       -- Create_Edges --
+       ------------------
+ 
+       procedure Create_Edges (U_Id : Unit_Id) is
+          pragma Assert (Present (Inv_Graph));
+          pragma Assert (Present (Lib_Graph));
+          pragma Assert (Present (U_Id));
+ 
+          U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+       begin
+          for IR_Id in U_Rec.First_Invocation_Relation ..
+                       U_Rec.Last_Invocation_Relation
+          loop
+             Create_Edge (IR_Id);
+          end loop;
+       end Create_Edges;
+ 
+       -------------------
+       -- Create_Vertex --
+       -------------------
+ 
+       procedure Create_Vertex
+         (IC_Id  : Invocation_Construct_Id;
+          Vertex : Library_Graph_Vertex_Id)
+       is
+       begin
+          pragma Assert (Present (Inv_Graph));
+          pragma Assert (Present (Lib_Graph));
+          pragma Assert (Present (IC_Id));
+          pragma Assert (Present (Vertex));
+ 
+          Add_Vertex
+            (G           => Inv_Graph,
+             IC_Id       => IC_Id,
+             Body_Vertex =>
+               Declaration_Placement_Vertex
+                 (Vertex    => Vertex,
+                  Placement => Body_Placement (IC_Id)),
+             Spec_Vertex =>
+               Declaration_Placement_Vertex
+                 (Vertex    => Vertex,
+                  Placement => Spec_Placement (IC_Id)));
+       end Create_Vertex;
+ 
+       ---------------------
+       -- Create_Vertices --
+       ---------------------
+ 
+       procedure Create_Vertices (U_Id : Unit_Id) is
+          pragma Assert (Present (Inv_Graph));
+          pragma Assert (Present (Lib_Graph));
+          pragma Assert (Present (U_Id));
+ 
+          U_Rec  : Unit_Record renames ALI.Units.Table (U_Id);
+          Vertex : constant Library_Graph_Vertex_Id :=
+                     Corresponding_Vertex (Lib_Graph, U_Id);
+ 
+       begin
+          for IC_Id in U_Rec.First_Invocation_Construct ..
+                       U_Rec.Last_Invocation_Construct
+          loop
+             Create_Vertex (IC_Id, Vertex);
+          end loop;
+       end Create_Vertices;
+ 
+       ----------------------------------
+       -- Declaration_Placement_Vertex --
+       ----------------------------------
+ 
+       function Declaration_Placement_Vertex
+         (Vertex    : Library_Graph_Vertex_Id;
+          Placement : Declaration_Placement_Kind)
+          return Library_Graph_Vertex_Id
+       is
+       begin
+          pragma Assert (Present (Lib_Graph));
+          pragma Assert (Present (Vertex));
+ 
+          if Placement = In_Body then
+             return Proper_Body (Lib_Graph, Vertex);
+          else
+             pragma Assert (Placement = In_Spec);
+             return Proper_Spec (Lib_Graph, Vertex);
+          end if;
+       end Declaration_Placement_Vertex;
+    end Invocation_Graph_Builders;
+ 
+    ----------------------------
+    -- Library_Graph_Builders --
+    ----------------------------
+ 
+    package body Library_Graph_Builders is
+ 
+       ---------------------
+       -- Data structures --
+       ---------------------
+ 
+       procedure Destroy_Line_Number (Line : in out Logical_Line_Number);
+       pragma Inline (Destroy_Line_Number);
+       --  Destroy line number Line
+ 
+       function Hash_Unit (U_Id : Unit_Id) return Bucket_Range_Type;
+       pragma Inline (Hash_Unit);
+       --  Obtain the hash value of key U_Id
+ 
+       package Unit_Line_Tables is new Dynamic_Hash_Tables
+         (Key_Type              => Unit_Id,
+          Value_Type            => Logical_Line_Number,
+          No_Value              => No_Line_Number,
+          Expansion_Threshold   => 1.5,
+          Expansion_Factor      => 2,
+          Compression_Threshold => 0.3,
+          Compression_Factor    => 2,
+          "="                   => "=",
+          Destroy_Value         => Destroy_Line_Number,
+          Hash                  => Hash_Unit);
+ 
+       -----------------
+       -- Global data --
+       -----------------
+ 
+       Lib_Graph : Library_Graph := Library_Graphs.Nil;
+ 
+       Unit_To_Line : Unit_Line_Tables.Dynamic_Hash_Table :=
+                        Unit_Line_Tables.Nil;
+       --  The map of unit name -> line number, used to detect duplicate unit
+       --  names in the forced-elaboration-order file and report errors.
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Add_Unit
+         (U_Id : Unit_Id;
+          Line : Logical_Line_Number);
+       pragma Inline (Add_Unit);
+       --  Create a relationship between unit U_Id and its declaration line in
+       --  map Unit_To_Line.
+ 
+       procedure Create_Forced_Edge
+         (Pred : Unit_Id;
+          Succ : Unit_Id);
+       pragma Inline (Create_Forced_Edge);
+       --  Create a new forced edge between predecessor unit Pred and successor
+       --  unit Succ.
+ 
+       procedure Create_Forced_Edges;
+       pragma Inline (Create_Forced_Edges);
+       --  Inspect the contents of the forced-elaboration-order file, and create
+       --  specialized edges for each valid pair of units listed within.
+ 
+       procedure Create_Spec_And_Body_Edge (U_Id : Unit_Id);
+       pragma Inline (Create_Spec_And_Body_Edge);
+       --  Establish a link between the spec and body of unit U_Id. In certain
+       --  cases this may result in a new edge which is added to library graph
+       --  Lib_Graph.
+ 
+       procedure Create_Vertex (U_Id : Unit_Id);
+       pragma Inline (Create_Vertex);
+       --  Create a new vertex for unit U_Id in library graph Lib_Graph
+ 
+       procedure Create_With_Edge
+         (W_Id : With_Id;
+          Succ : Library_Graph_Vertex_Id);
+       pragma Inline (Create_With_Edge);
+       --  Create a new edge for with W_Id where the predecessor is the library
+       --  graph vertex of the withed unit, and the successor is Succ. The edge
+       --  is added to library graph Lib_Graph.
+ 
+       procedure Create_With_Edges (U_Id : Unit_Id);
+       pragma Inline (Create_With_Edges);
+       --  Establish links between unit U_Id and its predecessor units. The new
+       --  edges are added to library graph Lib_Graph.
+ 
+       procedure Create_With_Edges
+         (U_Id : Unit_Id;
+          Succ : Library_Graph_Vertex_Id);
+       pragma Inline (Create_With_Edges);
+       --  Create new edges for all withs of unit U_Id where the predecessor is
+       --  some withed unit, and the successor is Succ. The edges are added to
+       --  library graph Lib_Graph.
+ 
+       procedure Duplicate_Unit_Error
+         (U_Id : Unit_Id;
+          Nam  : Unit_Name_Type;
+          Line : Logical_Line_Number);
+       pragma Inline (Duplicate_Unit_Error);
+       --  Emit an error concerning the duplication of unit U_Id with name Nam
+       --  that is redeclared in the forced-elaboration-order file at line Line.
+ 
+       procedure Internal_Unit_Info (Nam : Unit_Name_Type);
+       pragma Inline (Internal_Unit_Info);
+       --  Emit an information message concerning the omission of an internal
+       --  unit with name Nam from the creation of forced edges.
+ 
+       function Is_Duplicate_Unit (U_Id : Unit_Id) return Boolean;
+       pragma Inline (Is_Duplicate_Unit);
+       --  Determine whether unit U_Id is already recorded in map Unit_To_Line
+ 
+       function Is_Significant_With (W_Id : With_Id) return Boolean;
+       pragma Inline (Is_Significant_With);
+       --  Determine whether with W_Id plays a significant role in elaboration
+ 
+       procedure Missing_Unit_Info (Nam : Unit_Name_Type);
+       pragma Inline (Missing_Unit_Info);
+       --  Emit an information message concerning the omission of an undefined
+       --  unit found in the forced-elaboration-order file.
+ 
+       --------------
+       -- Add_Unit --
+       --------------
+ 
+       procedure Add_Unit
+         (U_Id : Unit_Id;
+          Line : Logical_Line_Number)
+       is
+       begin
+          pragma Assert (Present (U_Id));
+ 
+          Unit_Line_Tables.Put (Unit_To_Line, U_Id, Line);
+       end Add_Unit;
+ 
+       -------------------------
+       -- Build_Library_Graph --
+       -------------------------
+ 
+       function Build_Library_Graph return Library_Graph is
+       begin
+          Start_Phase (Library_Graph_Construction);
+ 
+          --  Prepare the global data
+ 
+          Lib_Graph :=
+            Create
+              (Initial_Vertices => Number_Of_Elaborable_Units,
+               Initial_Edges    => Number_Of_Elaborable_Units);
+ 
+          For_Each_Elaborable_Unit (Create_Vertex'Access);
+          For_Each_Elaborable_Unit (Create_Spec_And_Body_Edge'Access);
+          For_Each_Elaborable_Unit (Create_With_Edges'Access);
+          Create_Forced_Edges;
+ 
+          Validate_Library_Graph (Lib_Graph);
+          End_Phase (Library_Graph_Construction);
+ 
+          return Lib_Graph;
+       end Build_Library_Graph;
+ 
+       ------------------------
+       -- Create_Forced_Edge --
+       ------------------------
+ 
+       procedure Create_Forced_Edge
+         (Pred : Unit_Id;
+          Succ : Unit_Id)
+       is
+          pragma Assert (Present (Pred));
+          pragma Assert (Present (Succ));
+ 
+          Pred_Vertex : constant Library_Graph_Vertex_Id :=
+                          Corresponding_Vertex (Lib_Graph, Pred);
+          Succ_Vertex : constant Library_Graph_Vertex_Id :=
+                          Corresponding_Vertex (Lib_Graph, Succ);
+ 
+       begin
+          Write_Unit_Name (Name (Pred));
+          Write_Str (" <-- ");
+          Write_Unit_Name (Name (Succ));
+          Write_Eol;
+ 
+          Add_Edge
+            (G              => Lib_Graph,
+             Pred           => Pred_Vertex,
+             Succ           => Succ_Vertex,
+             Kind           => Forced_Edge,
+             Activates_Task => False);
+       end Create_Forced_Edge;
+ 
+       -------------------------
+       -- Create_Forced_Edges --
+       -------------------------
+ 
+       procedure Create_Forced_Edges is
+          Current_Unit  : Unit_Id;
+          Iter          : Forced_Units_Iterator;
+          Previous_Unit : Unit_Id;
+          Unit_Line     : Logical_Line_Number;
+          Unit_Name     : Unit_Name_Type;
+ 
+       begin
+          Previous_Unit := No_Unit_Id;
+          Unit_To_Line  := Unit_Line_Tables.Create (20);
+ 
+          --  Inspect the contents of the forced-elaboration-order file supplied
+          --  to the binder using switch -f, and diagnose each unit accordingly.
+ 
+          Iter := Iterate_Forced_Units;
+          while Has_Next (Iter) loop
+             Next (Iter, Unit_Name, Unit_Line);
+ 
+             Current_Unit := Corresponding_Unit (Unit_Name);
+ 
+             if not Present (Current_Unit) then
+                Missing_Unit_Info (Unit_Name);
+ 
+             elsif Is_Internal_Unit (Current_Unit) then
+                Internal_Unit_Info (Unit_Name);
+ 
+             elsif Is_Duplicate_Unit (Current_Unit) then
+                Duplicate_Unit_Error (Current_Unit, Unit_Name, Unit_Line);
+ 
+             --  Otherwise the unit is a valid candidate for a vertex. Create a
+             --  forced edge between each pair of units.
+ 
+             else
+                Add_Unit (Current_Unit, Unit_Line);
+ 
+                if Present (Previous_Unit) then
+                   Create_Forced_Edge
+                     (Pred => Previous_Unit,
+                      Succ => Current_Unit);
+                end if;
+ 
+                Previous_Unit := Current_Unit;
+             end if;
+          end loop;
+ 
+          Unit_Line_Tables.Destroy (Unit_To_Line);
+       end Create_Forced_Edges;
+ 
+       -------------------------------
+       -- Create_Spec_And_Body_Edge --
+       -------------------------------
+ 
+       procedure Create_Spec_And_Body_Edge (U_Id : Unit_Id) is
+          Extra_Vertex : Library_Graph_Vertex_Id;
+          Vertex       : Library_Graph_Vertex_Id;
+ 
+       begin
+          pragma Assert (Present (Lib_Graph));
+          pragma Assert (Present (U_Id));
+ 
+          Vertex := Corresponding_Vertex (Lib_Graph, U_Id);
+ 
+          --  The unit denotes a body that completes a previous spec. Link the
+          --  spec and body. Add an edge between the predecessor spec and the
+          --  successor body.
+ 
+          if Is_Body_With_Spec (Lib_Graph, Vertex) then
+             Extra_Vertex :=
+               Corresponding_Vertex (Lib_Graph, Corresponding_Spec (U_Id));
+             Set_Corresponding_Item (Lib_Graph, Vertex, Extra_Vertex);
+ 
+             Add_Edge
+               (G              => Lib_Graph,
+                Pred           => Extra_Vertex,
+                Succ           => Vertex,
+                Kind           => Spec_Before_Body_Edge,
+                Activates_Task => False);
+ 
+          --  The unit denotes a spec with a completing body. Link the spec and
+          --  body.
+ 
+          elsif Is_Spec_With_Body (Lib_Graph, Vertex) then
+             Extra_Vertex :=
+               Corresponding_Vertex (Lib_Graph, Corresponding_Body (U_Id));
+             Set_Corresponding_Item (Lib_Graph, Vertex, Extra_Vertex);
+          end if;
+       end Create_Spec_And_Body_Edge;
+ 
+       -------------------
+       -- Create_Vertex --
+       -------------------
+ 
+       procedure Create_Vertex (U_Id : Unit_Id) is
+       begin
+          pragma Assert (Present (Lib_Graph));
+          pragma Assert (Present (U_Id));
+ 
+          Add_Vertex
+            (G    => Lib_Graph,
+             U_Id => U_Id);
+       end Create_Vertex;
+ 
+       ----------------------
+       -- Create_With_Edge --
+       ----------------------
+ 
+       procedure Create_With_Edge
+         (W_Id : With_Id;
+          Succ : Library_Graph_Vertex_Id)
+       is
+          pragma Assert (Present (Lib_Graph));
+          pragma Assert (Present (W_Id));
+          pragma Assert (Present (Succ));
+ 
+          Withed_Rec  : With_Record renames Withs.Table (W_Id);
+          Withed_U_Id : constant Unit_Id :=
+                          Corresponding_Unit (Withed_Rec.Uname);
+ 
+          Kind          : Library_Graph_Edge_Kind;
+          Withed_Vertex : Library_Graph_Vertex_Id;
+ 
+       begin
+          --  Nothing to do when the withed unit does not need to be elaborated.
+          --  This prevents spurious dependencies that can never be satisfied.
+ 
+          if not Needs_Elaboration (Withed_U_Id) then
+             return;
+          end if;
+ 
+          Withed_Vertex := Corresponding_Vertex (Lib_Graph, Withed_U_Id);
+ 
+          --  The with comes with pragma Elaborate. Treat the edge as a with
+          --  edge when switch -d_e (ignore the effects of pragma Elaborate)
+          --  is in effect.
+ 
+          if Withed_Rec.Elaborate
+            and then not Debug_Flag_Underscore_E
+          then
+             Kind := Elaborate_Edge;
+ 
+             --  The withed unit is a spec with a completing body. Add an edge
+             --  between the body of the withed predecessor and the withing
+             --  successor.
+ 
+             if Is_Spec_With_Body (Lib_Graph, Withed_Vertex) then
+                Add_Edge
+                  (G              => Lib_Graph,
+                   Pred           =>
+                     Corresponding_Vertex
+                       (Lib_Graph, Corresponding_Body (Withed_U_Id)),
+                   Succ           => Succ,
+                   Kind           => Kind,
+                   Activates_Task => False);
+             end if;
+ 
+          --  The with comes with pragma Elaborate_All. Treat the edge as a with
+          --  edge when switch -d_a (ignore the effects of pragma Elaborate_All)
+          --  is in effect.
+ 
+          elsif Withed_Rec.Elaborate_All
+            and then not Debug_Flag_Underscore_A
+          then
+             Kind := Elaborate_All_Edge;
+ 
+          --  Otherwise this is a regular with
+ 
+          else
+             Kind := With_Edge;
+          end if;
+ 
+          --  Add an edge between the withed predecessor unit and the withing
+          --  successor.
+ 
+          Add_Edge
+            (G              => Lib_Graph,
+             Pred           => Withed_Vertex,
+             Succ           => Succ,
+             Kind           => Kind,
+             Activates_Task => False);
+       end Create_With_Edge;
+ 
+       -----------------------
+       -- Create_With_Edges --
+       -----------------------
+ 
+       procedure Create_With_Edges (U_Id : Unit_Id) is
+       begin
+          pragma Assert (Present (Lib_Graph));
+          pragma Assert (Present (U_Id));
+ 
+          Create_With_Edges
+            (U_Id => U_Id,
+             Succ => Corresponding_Vertex (Lib_Graph, U_Id));
+       end Create_With_Edges;
+ 
+       -----------------------
+       -- Create_With_Edges --
+       -----------------------
+ 
+       procedure Create_With_Edges
+         (U_Id : Unit_Id;
+          Succ : Library_Graph_Vertex_Id)
+       is
+          pragma Assert (Present (Lib_Graph));
+          pragma Assert (Present (U_Id));
+          pragma Assert (Present (Succ));
+ 
+          U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+       begin
+          for W_Id in U_Rec.First_With .. U_Rec.Last_With loop
+             if Is_Significant_With (W_Id) then
+                Create_With_Edge (W_Id, Succ);
+             end if;
+          end loop;
+       end Create_With_Edges;
+ 
+       ------------------
+       -- Destroy_Unit --
+       ------------------
+ 
+       procedure Destroy_Line_Number (Line : in out Logical_Line_Number) is
+          pragma Unreferenced (Line);
+       begin
+          null;
+       end Destroy_Line_Number;
+ 
+       --------------------------
+       -- Duplicate_Unit_Error --
+       --------------------------
+ 
+       procedure Duplicate_Unit_Error
+         (U_Id : Unit_Id;
+          Nam  : Unit_Name_Type;
+          Line : Logical_Line_Number)
+       is
+          pragma Assert (Present (U_Id));
+          pragma Assert (Present (Nam));
+ 
+          Prev_Line : constant Logical_Line_Number :=
+                        Unit_Line_Tables.Get (Unit_To_Line, U_Id);
+ 
+       begin
+          Error_Msg_Nat_1  := Nat (Line);
+          Error_Msg_Nat_2  := Nat (Prev_Line);
+          Error_Msg_Unit_1 := Nam;
+ 
+          Error_Msg
+            (Force_Elab_Order_File.all
+             & ":#: duplicate unit name $ from line #");
+       end Duplicate_Unit_Error;
+ 
+       ---------------
+       -- Hash_Unit --
+       ---------------
+ 
+       function Hash_Unit (U_Id : Unit_Id) return Bucket_Range_Type is
+       begin
+          pragma Assert (Present (U_Id));
+ 
+          return Bucket_Range_Type (U_Id);
+       end Hash_Unit;
+ 
+       ------------------------
+       -- Internal_Unit_Info --
+       ------------------------
+ 
+       procedure Internal_Unit_Info (Nam : Unit_Name_Type) is
+       begin
+          pragma Assert (Present (Nam));
+ 
+          Write_Line
+            ("""" & Get_Name_String (Nam) & """: predefined unit ignored");
+       end Internal_Unit_Info;
+ 
+       -----------------------
+       -- Is_Duplicate_Unit --
+       -----------------------
+ 
+       function Is_Duplicate_Unit (U_Id : Unit_Id) return Boolean is
+       begin
+          pragma Assert (Present (U_Id));
+ 
+          return Unit_Line_Tables.Contains (Unit_To_Line, U_Id);
+       end Is_Duplicate_Unit;
+ 
+       -------------------------
+       -- Is_Significant_With --
+       -------------------------
+ 
+       function Is_Significant_With (W_Id : With_Id) return Boolean is
+          pragma Assert (Present (W_Id));
+ 
+          Withed_Rec  : With_Record renames Withs.Table (W_Id);
+          Withed_U_Id : constant Unit_Id :=
+                          Corresponding_Unit (Withed_Rec.Uname);
+ 
+       begin
+          --  Nothing to do for a unit which does not exist any more
+ 
+          if not Present (Withed_U_Id) then
+             return False;
+ 
+          --  Nothing to do for a limited with
+ 
+          elsif Withed_Rec.Limited_With then
+             return False;
+ 
+          --  Nothing to do when the unit does not need to be elaborated
+ 
+          elsif not Needs_Elaboration (Withed_U_Id) then
+             return False;
+          end if;
+ 
+          return True;
+       end Is_Significant_With;
+ 
+       -----------------------
+       -- Missing_Unit_Info --
+       -----------------------
+ 
+       procedure Missing_Unit_Info (Nam : Unit_Name_Type) is
+       begin
+          pragma Assert (Present (Nam));
+ 
+          Write_Line
+            ("""" & Get_Name_String (Nam) & """: not present; ignored");
+       end Missing_Unit_Info;
+    end Library_Graph_Builders;
+ 
+ end Bindo.Builders;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-builders.ads gcc-10.1.0/gcc/ada/bindo-builders.ads
*** gcc-9.3.0/gcc/ada/bindo-builders.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-builders.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,65 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                        B I N D O . B U I L D E R S                       --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  For full architecture, see unit Bindo.
+ 
+ --  The following unit contains facilities to create various graphs that
+ --  reflect dependencies between units, as well as activations of tasks,
+ --  calls, and instantiations within them.
+ 
+ with Bindo.Graphs;
+ use  Bindo.Graphs;
+ use  Bindo.Graphs.Invocation_Graphs;
+ use  Bindo.Graphs.Library_Graphs;
+ 
+ package Bindo.Builders is
+ 
+    -------------------------------
+    -- Invocation_Graph_Builders --
+    -------------------------------
+ 
+    package Invocation_Graph_Builders is
+       function Build_Invocation_Graph
+         (Lib_G : Library_Graph) return Invocation_Graph;
+       --  Return a new invocation graph that reflects the activations of
+       --  tasks, calls, and instantiations in all units of the bind. Each
+       --  invocation graph vertex is linked with the corresponding vertex
+       --  of library graph Lib_G, which contains the body of the activated
+       --  task, invoked subprogram, or instantiated generic.
+ 
+    end Invocation_Graph_Builders;
+ 
+    ----------------------------
+    -- Library_Graph_Builders --
+    ----------------------------
+ 
+    package Library_Graph_Builders is
+       function Build_Library_Graph return Library_Graph;
+       --  Return a new library graph that reflects the dependencies between
+       --  all units of the bind.
+ 
+    end Library_Graph_Builders;
+ 
+ end Bindo.Builders;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-diagnostics.adb gcc-10.1.0/gcc/ada/bindo-diagnostics.adb
*** gcc-9.3.0/gcc/ada/bindo-diagnostics.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-diagnostics.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,1555 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                     B I N D O . D I A G N O S T I C S                    --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Binderr;  use Binderr;
+ with Debug;    use Debug;
+ with Restrict; use Restrict;
+ with Rident;   use Rident;
+ with Types;    use Types;
+ 
+ with Bindo.Validators;
+ use  Bindo.Validators;
+ use  Bindo.Validators.Cycle_Validators;
+ 
+ with Bindo.Writers;
+ use  Bindo.Writers;
+ use  Bindo.Writers.Cycle_Writers;
+ use  Bindo.Writers.Phase_Writers;
+ 
+ package body Bindo.Diagnostics is
+ 
+    -----------------------
+    -- Local subprograms --
+    -----------------------
+ 
+    procedure Diagnose_All_Cycles
+      (Inv_Graph : Invocation_Graph;
+       Lib_Graph : Library_Graph);
+    pragma Inline (Diagnose_All_Cycles);
+    --  Emit diagnostics for all cycles of library graph G
+ 
+    procedure Diagnose_Cycle
+      (Inv_Graph : Invocation_Graph;
+       Lib_Graph : Library_Graph;
+       Cycle     : Library_Graph_Cycle_Id);
+    pragma Inline (Diagnose_Cycle);
+    --  Emit diagnostics for cycle Cycle of library graph G
+ 
+    procedure Find_And_Output_Invocation_Paths
+      (Inv_Graph   : Invocation_Graph;
+       Lib_Graph   : Library_Graph;
+       Source      : Library_Graph_Vertex_Id;
+       Destination : Library_Graph_Vertex_Id);
+    pragma Inline (Find_And_Output_Invocation_Paths);
+    --  Find all paths in invocation graph Inv_Graph that originate from vertex
+    --  Source and reach vertex Destination of library graph Lib_Graph. Output
+    --  the transitions of each such path.
+ 
+    function Find_Elaboration_Root
+      (Inv_Graph : Invocation_Graph;
+       Lib_Graph : Library_Graph;
+       Vertex : Library_Graph_Vertex_Id) return Invocation_Graph_Vertex_Id;
+    pragma Inline (Find_Elaboration_Root);
+    --  Find the elaboration root in invocation graph Inv_Graph that corresponds
+    --  to vertex Vertex of library graph Lib_Graph.
+ 
+    procedure Output_All_Cycles_Suggestions (G : Library_Graph);
+    pragma Inline (Output_All_Cycles_Suggestions);
+    --  Suggest the diagnostic of all cycles in library graph G if circumstances
+    --  allow it.
+ 
+    procedure Output_Elaborate_All_Suggestions
+      (G    : Library_Graph;
+       Pred : Library_Graph_Vertex_Id;
+       Succ : Library_Graph_Vertex_Id);
+    pragma Inline (Output_Elaborate_All_Suggestions);
+    --  Suggest ways to break a cycle that involves an Elaborate_All edge that
+    --  links predecessor Pred and successor Succ of library graph G.
+ 
+    procedure Output_Elaborate_All_Transition
+      (G                    : Library_Graph;
+       Source               : Library_Graph_Vertex_Id;
+       Actual_Destination   : Library_Graph_Vertex_Id;
+       Expected_Destination : Library_Graph_Vertex_Id);
+    pragma Inline (Output_Elaborate_All_Transition);
+    --  Output a transition through an Elaborate_All edge of library graph G
+    --  with successor Source and predecessor Actual_Destination. Parameter
+    --  Expected_Destination denotes the predecessor as specified by the next
+    --  edge in a cycle.
+ 
+    procedure Output_Elaborate_Body_Suggestions
+      (G    : Library_Graph;
+       Succ : Library_Graph_Vertex_Id);
+    pragma Inline (Output_Elaborate_Body_Suggestions);
+    --  Suggest ways to break a cycle that involves an edge where successor Succ
+    --  is either a spec subject to pragma Elaborate_Body or the body of such a
+    --  spec.
+ 
+    procedure Output_Elaborate_Body_Transition
+      (G                    : Library_Graph;
+       Source               : Library_Graph_Vertex_Id;
+       Actual_Destination   : Library_Graph_Vertex_Id;
+       Expected_Destination : Library_Graph_Vertex_Id;
+       Elaborate_All_Active : Boolean);
+    pragma Inline (Output_Elaborate_Body_Transition);
+    --  Output a transition through an edge of library graph G with successor
+    --  Source and predecessor Actual_Destination. Vertex Source is either
+    --  a spec subject to pragma Elaborate_Body or denotes the body of such
+    --  a spec. Expected_Destination denotes the predecessor as specified by
+    --  the next edge in a cycle. Elaborate_All_Active should be set when the
+    --  transition occurs within a cycle that involves an Elaborate_All edge.
+ 
+    procedure Output_Elaborate_Suggestions
+      (G    : Library_Graph;
+       Pred : Library_Graph_Vertex_Id;
+       Succ : Library_Graph_Vertex_Id);
+    pragma Inline (Output_Elaborate_Suggestions);
+    --  Suggest ways to break a cycle that involves an Elaborate edge that links
+    --  predecessor Pred and successor Succ of library graph G.
+ 
+    procedure Output_Elaborate_Transition
+      (G                    : Library_Graph;
+       Source               : Library_Graph_Vertex_Id;
+       Actual_Destination   : Library_Graph_Vertex_Id;
+       Expected_Destination : Library_Graph_Vertex_Id);
+    pragma Inline (Output_Elaborate_Transition);
+    --  Output a transition through an Elaborate edge of library graph G
+    --  with successor Source and predecessor Actual_Destination. Parameter
+    --  Expected_Destination denotes the predecessor as specified by the next
+    --  edge in a cycle.
+ 
+    procedure Output_Forced_Suggestions
+      (G    : Library_Graph;
+       Pred : Library_Graph_Vertex_Id;
+       Succ : Library_Graph_Vertex_Id);
+    pragma Inline (Output_Forced_Suggestions);
+    --  Suggest ways to break a cycle that involves a Forced edge that links
+    --  predecessor Pred with successor Succ of library graph G.
+ 
+    procedure Output_Forced_Transition
+      (G                    : Library_Graph;
+       Source               : Library_Graph_Vertex_Id;
+       Actual_Destination   : Library_Graph_Vertex_Id;
+       Expected_Destination : Library_Graph_Vertex_Id;
+       Elaborate_All_Active : Boolean);
+    pragma Inline (Output_Forced_Transition);
+    --  Output a transition through a Forced edge of library graph G with
+    --  successor Source and predecessor Actual_Destination. Parameter
+    --  Expected_Destination denotes the predecessor as specified by the
+    --  next edge in a cycle. Elaborate_All_Active should be set when the
+    --  transition occurs within a cycle that involves an Elaborate_All edge.
+ 
+    procedure Output_Full_Encoding_Suggestions
+      (G          : Library_Graph;
+       Cycle      : Library_Graph_Cycle_Id;
+       First_Edge : Library_Graph_Edge_Id);
+    pragma Inline (Output_Full_Encoding_Suggestions);
+    --  Suggest the use of the full path invocation graph encoding to break
+    --  cycle Cycle with initial edge First_Edge of library graph G.
+ 
+    procedure Output_Invocation_Path
+      (Inv_Graph         : Invocation_Graph;
+       Lib_Graph         : Library_Graph;
+       Elaborated_Vertex : Library_Graph_Vertex_Id;
+       Path              : IGE_Lists.Doubly_Linked_List;
+       Path_Id           : in out Nat);
+    pragma Inline (Output_Invocation_Path);
+    --  Output path Path, which consists of invocation graph Inv_Graph edges.
+    --  Elaborated_Vertex is the vertex of library graph Lib_Graph whose
+    --  elaboration initiated the path. Path_Id is the unique id of the path.
+ 
+    procedure Output_Invocation_Path_Transition
+      (Inv_Graph : Invocation_Graph;
+       Lib_Graph : Library_Graph;
+       Edge      : Invocation_Graph_Edge_Id);
+    pragma Inline (Output_Invocation_Path_Transition);
+    --  Output a transition through edge Edge of invocation graph G, which is
+    --  part of an invocation path. Lib_Graph is the related library graph.
+ 
+    procedure Output_Invocation_Related_Suggestions
+      (G     : Library_Graph;
+       Cycle : Library_Graph_Cycle_Id);
+    pragma Inline (Output_Invocation_Related_Suggestions);
+    --  Suggest ways to break cycle Cycle of library graph G that involves at
+    --  least one invocation edge.
+ 
+    procedure Output_Invocation_Transition
+      (Inv_Graph   : Invocation_Graph;
+       Lib_Graph   : Library_Graph;
+       Source      : Library_Graph_Vertex_Id;
+       Destination : Library_Graph_Vertex_Id);
+    pragma Inline (Output_Invocation_Transition);
+    --  Output a transition through an invocation edge of library graph G with
+    --  successor Source and predecessor Destination. Inv_Graph is the related
+    --  invocation graph.
+ 
+    procedure Output_Reason_And_Circularity_Header
+      (G          : Library_Graph;
+       First_Edge : Library_Graph_Edge_Id);
+    pragma Inline (Output_Reason_And_Circularity_Header);
+    --  Output the reason and circularity header for a circularity of library
+    --  graph G with initial edge First_Edge.
+ 
+    procedure Output_Suggestions
+      (G          : Library_Graph;
+       Cycle      : Library_Graph_Cycle_Id;
+       First_Edge : Library_Graph_Edge_Id);
+    pragma Inline (Output_Suggestions);
+    --  Suggest various ways to break cycle Cycle with initial edge First_Edge
+    --  of library graph G.
+ 
+    procedure Output_Transition
+      (Inv_Graph            : Invocation_Graph;
+       Lib_Graph            : Library_Graph;
+       Current_Edge         : Library_Graph_Edge_Id;
+       Next_Edge            : Library_Graph_Edge_Id;
+       Elaborate_All_Active : Boolean);
+    pragma Inline (Output_Transition);
+    --  Output a transition described by edge Current_Edge, which is followed by
+    --  edge Next_Edge of library graph Lib_Graph. Inv_Graph denotes the related
+    --  invocation graph. Elaborate_All_Active should be set when the transition
+    --  occurs within a cycle that involves an Elaborate_All edge.
+ 
+    procedure Output_With_Transition
+      (G                    : Library_Graph;
+       Source               : Library_Graph_Vertex_Id;
+       Actual_Destination   : Library_Graph_Vertex_Id;
+       Expected_Destination : Library_Graph_Vertex_Id;
+       Elaborate_All_Active : Boolean);
+    pragma Inline (Output_With_Transition);
+    --  Output a transition through a regular with edge of library graph G
+    --  with successor Source and predecessor Actual_Destination. Parameter
+    --  Expected_Destination denotes the predecessor as specified by the next
+    --  edge in a cycle. Elaborate_All_Active should be set when the transition
+    --  occurs within a cycle that involves an Elaborate_All edge.
+ 
+    procedure Visit_Vertex
+      (Inv_Graph         : Invocation_Graph;
+       Lib_Graph         : Library_Graph;
+       Invoker           : Invocation_Graph_Vertex_Id;
+       Invoker_Vertex    : Library_Graph_Vertex_Id;
+       Last_Vertex       : Library_Graph_Vertex_Id;
+       Elaborated_Vertex : Library_Graph_Vertex_Id;
+       End_Vertex        : Library_Graph_Vertex_Id;
+       Visited_Invokers  : IGV_Sets.Membership_Set;
+       Path              : IGE_Lists.Doubly_Linked_List;
+       Path_Id           : in out Nat);
+    pragma Inline (Visit_Vertex);
+    --  Visit invocation graph vertex Invoker that resides in library graph
+    --  vertex Invoker_Vertex as part of a DFS traversal. Last_Vertex denotes
+    --  the previous vertex in the traversal. Elaborated_Vertex is the vertex
+    --  whose elaboration started the traversal. End_Vertex is the vertex that
+    --  terminates the traversal. Visited_Invoker is the set of all invokers
+    --  visited so far. All edges along the path are recorded in Path. Path_Id
+    --  is the id of the path.
+ 
+    -------------------------
+    -- Diagnose_All_Cycles --
+    -------------------------
+ 
+    procedure Diagnose_All_Cycles
+      (Inv_Graph : Invocation_Graph;
+       Lib_Graph : Library_Graph)
+    is
+       Cycle : Library_Graph_Cycle_Id;
+       Iter  : All_Cycle_Iterator;
+ 
+    begin
+       pragma Assert (Present (Inv_Graph));
+       pragma Assert (Present (Lib_Graph));
+ 
+       Iter := Iterate_All_Cycles (Lib_Graph);
+       while Has_Next (Iter) loop
+          Next (Iter, Cycle);
+ 
+          Diagnose_Cycle
+            (Inv_Graph => Inv_Graph,
+             Lib_Graph => Lib_Graph,
+             Cycle     => Cycle);
+       end loop;
+    end Diagnose_All_Cycles;
+ 
+    ----------------------------
+    -- Diagnose_Circularities --
+    ----------------------------
+ 
+    procedure Diagnose_Circularities
+      (Inv_Graph : Invocation_Graph;
+       Lib_Graph : Library_Graph)
+    is
+    begin
+       pragma Assert (Present (Inv_Graph));
+       pragma Assert (Present (Lib_Graph));
+ 
+       --  Find, validate, and output all cycles of the library graph
+ 
+       Find_Cycles     (Lib_Graph);
+       Validate_Cycles (Lib_Graph);
+       Write_Cycles    (Lib_Graph);
+ 
+       --  Diagnose all cycles in the graph regardless of their importance when
+       --  switch -d_C (diagnose all cycles) is in effect.
+ 
+       if Debug_Flag_Underscore_CC then
+          Diagnose_All_Cycles (Inv_Graph, Lib_Graph);
+ 
+       --  Otherwise diagnose the most important cycle in the graph
+ 
+       else
+          Diagnose_Cycle
+            (Inv_Graph => Inv_Graph,
+             Lib_Graph => Lib_Graph,
+             Cycle     => Highest_Precedence_Cycle (Lib_Graph));
+       end if;
+    end Diagnose_Circularities;
+ 
+    --------------------
+    -- Diagnose_Cycle --
+    --------------------
+ 
+    procedure Diagnose_Cycle
+      (Inv_Graph : Invocation_Graph;
+       Lib_Graph : Library_Graph;
+       Cycle     : Library_Graph_Cycle_Id)
+    is
+       pragma Assert (Present (Inv_Graph));
+       pragma Assert (Present (Lib_Graph));
+       pragma Assert (Present (Cycle));
+ 
+       Elaborate_All_Active : constant Boolean :=
+                                Contains_Elaborate_All_Edge
+                                  (G     => Lib_Graph,
+                                   Cycle => Cycle);
+ 
+       Current_Edge : Library_Graph_Edge_Id;
+       First_Edge   : Library_Graph_Edge_Id;
+       Iter         : Edges_Of_Cycle_Iterator;
+       Next_Edge    : Library_Graph_Edge_Id;
+ 
+    begin
+       Start_Phase (Cycle_Diagnostics);
+ 
+       First_Edge := No_Library_Graph_Edge;
+ 
+       --  Inspect the edges of the cycle in pairs, emitting diagnostics based
+       --  on their successors and predecessors.
+ 
+       Iter := Iterate_Edges_Of_Cycle (Lib_Graph, Cycle);
+       while Has_Next (Iter) loop
+ 
+          --  Emit the reason for the cycle using the initial edge, which is the
+          --  most important edge in the cycle.
+ 
+          if not Present (First_Edge) then
+             Next (Iter, Current_Edge);
+ 
+             First_Edge := Current_Edge;
+             Output_Reason_And_Circularity_Header
+               (G          => Lib_Graph,
+                First_Edge => First_Edge);
+          end if;
+ 
+          --  Obtain the other edge of the pair
+ 
+          exit when not Has_Next (Iter);
+          Next (Iter, Next_Edge);
+ 
+          --  Describe the transition from the current edge to the next edge by
+          --  taking into account the predecessors and successors involved, as
+          --  well as the nature of the edge.
+ 
+          Output_Transition
+            (Inv_Graph            => Inv_Graph,
+             Lib_Graph            => Lib_Graph,
+             Current_Edge         => Current_Edge,
+             Next_Edge            => Next_Edge,
+             Elaborate_All_Active => Elaborate_All_Active);
+ 
+          Current_Edge := Next_Edge;
+       end loop;
+ 
+       --  Describe the transition from the last edge to the first edge
+ 
+       Output_Transition
+         (Inv_Graph            => Inv_Graph,
+          Lib_Graph            => Lib_Graph,
+          Current_Edge         => Current_Edge,
+          Next_Edge            => First_Edge,
+          Elaborate_All_Active => Elaborate_All_Active);
+ 
+       --  Suggest various alternatives for breaking the cycle
+ 
+       Output_Suggestions
+         (G          => Lib_Graph,
+          Cycle      => Cycle,
+          First_Edge => First_Edge);
+ 
+       End_Phase (Cycle_Diagnostics);
+    end Diagnose_Cycle;
+ 
+    --------------------------------------
+    -- Find_And_Output_Invocation_Paths --
+    --------------------------------------
+ 
+    procedure Find_And_Output_Invocation_Paths
+      (Inv_Graph   : Invocation_Graph;
+       Lib_Graph   : Library_Graph;
+       Source      : Library_Graph_Vertex_Id;
+       Destination : Library_Graph_Vertex_Id)
+    is
+       Path    : IGE_Lists.Doubly_Linked_List;
+       Path_Id : Nat;
+       Visited : IGV_Sets.Membership_Set;
+ 
+    begin
+       pragma Assert (Present (Inv_Graph));
+       pragma Assert (Present (Lib_Graph));
+       pragma Assert (Present (Source));
+       pragma Assert (Present (Destination));
+ 
+       --  Nothing to do when the invocation graph encoding format of the source
+       --  vertex does not contain detailed information about invocation paths.
+ 
+       if Invocation_Graph_Encoding (Lib_Graph, Source) /=
+            Full_Path_Encoding
+       then
+          return;
+       end if;
+ 
+       Path    := IGE_Lists.Create;
+       Path_Id := 1;
+       Visited := IGV_Sets.Create (Number_Of_Vertices (Inv_Graph));
+ 
+       --  Start a DFS traversal over the invocation graph, in an attempt to
+       --  reach Destination from Source. The actual start of the path is the
+       --  elaboration root invocation vertex that corresponds to the Source.
+       --  Each unique path is emitted as part of the current cycle diagnostic.
+ 
+       Visit_Vertex
+         (Inv_Graph         => Inv_Graph,
+          Lib_Graph         => Lib_Graph,
+          Invoker           =>
+            Find_Elaboration_Root
+              (Inv_Graph => Inv_Graph,
+               Lib_Graph => Lib_Graph,
+               Vertex    => Source),
+          Invoker_Vertex    => Source,
+          Last_Vertex       => Source,
+          Elaborated_Vertex => Source,
+          End_Vertex        => Destination,
+          Visited_Invokers  => Visited,
+          Path              => Path,
+          Path_Id           => Path_Id);
+ 
+       IGE_Lists.Destroy (Path);
+       IGV_Sets.Destroy  (Visited);
+    end Find_And_Output_Invocation_Paths;
+ 
+    ---------------------------
+    -- Find_Elaboration_Root --
+    ---------------------------
+ 
+    function Find_Elaboration_Root
+      (Inv_Graph : Invocation_Graph;
+       Lib_Graph : Library_Graph;
+       Vertex    : Library_Graph_Vertex_Id) return Invocation_Graph_Vertex_Id
+    is
+       Current_Vertex : Invocation_Graph_Vertex_Id;
+       Iter           : Elaboration_Root_Iterator;
+       Root_Vertex    : Invocation_Graph_Vertex_Id;
+ 
+    begin
+       pragma Assert (Present (Inv_Graph));
+       pragma Assert (Present (Lib_Graph));
+       pragma Assert (Present (Vertex));
+ 
+       --  Assume that the vertex does not have a corresponding elaboration root
+ 
+       Root_Vertex := No_Invocation_Graph_Vertex;
+ 
+       --  Inspect all elaboration roots trying to find the one that resides in
+       --  the input vertex.
+       --
+       --  IMPORTANT:
+       --
+       --    * The iterator must run to completion in order to unlock the
+       --      invocation graph.
+ 
+       Iter := Iterate_Elaboration_Roots (Inv_Graph);
+       while Has_Next (Iter) loop
+          Next (Iter, Current_Vertex);
+ 
+          if not Present (Root_Vertex)
+            and then Body_Vertex (Inv_Graph, Current_Vertex) = Vertex
+          then
+             Root_Vertex := Current_Vertex;
+          end if;
+       end loop;
+ 
+       return Root_Vertex;
+    end Find_Elaboration_Root;
+ 
+    -----------------------------------
+    -- Output_All_Cycles_Suggestions --
+    -----------------------------------
+ 
+    procedure Output_All_Cycles_Suggestions (G : Library_Graph) is
+    begin
+       pragma Assert (Present (G));
+ 
+       --  The library graph contains at least one cycle and only the highest
+       --  priority cycle was diagnosed. Diagnosing all cycles may yield extra
+       --  information for decision making.
+ 
+       if Number_Of_Cycles (G) > 1 and then not Debug_Flag_Underscore_CC then
+          Error_Msg_Info
+            ("    diagnose all circularities (binder switch -d_C)");
+       end if;
+    end Output_All_Cycles_Suggestions;
+ 
+    --------------------------------------
+    -- Output_Elaborate_All_Suggestions --
+    --------------------------------------
+ 
+    procedure Output_Elaborate_All_Suggestions
+      (G    : Library_Graph;
+       Pred : Library_Graph_Vertex_Id;
+       Succ : Library_Graph_Vertex_Id)
+    is
+    begin
+       pragma Assert (Present (G));
+       pragma Assert (Present (Pred));
+       pragma Assert (Present (Succ));
+ 
+       Error_Msg_Unit_1 := Name (G, Pred);
+       Error_Msg_Unit_2 := Name (G, Succ);
+       Error_Msg_Info
+         ("    change pragma Elaborate_All for unit $ to Elaborate in unit $");
+       Error_Msg_Info
+         ("    remove pragma Elaborate_All for unit $ in unit $");
+    end Output_Elaborate_All_Suggestions;
+ 
+    -------------------------------------
+    -- Output_Elaborate_All_Transition --
+    -------------------------------------
+ 
+    procedure Output_Elaborate_All_Transition
+      (G                    : Library_Graph;
+       Source               : Library_Graph_Vertex_Id;
+       Actual_Destination   : Library_Graph_Vertex_Id;
+       Expected_Destination : Library_Graph_Vertex_Id)
+    is
+    begin
+       pragma Assert (Present (G));
+       pragma Assert (Present (Source));
+       pragma Assert (Present (Actual_Destination));
+       pragma Assert (Present (Expected_Destination));
+ 
+       --  The actual and expected destination vertices match, and denote the
+       --  initial declaration of a unit.
+       --
+       --            Elaborate_All   Actual_Destination
+       --    Source ---------------> spec -->
+       --                            Expected_Destination
+       --
+       --            Elaborate_All   Actual_Destination
+       --    Source ---------------> stand-alone body -->
+       --                            Expected_Destination
+ 
+       if Actual_Destination = Expected_Destination then
+          Error_Msg_Unit_1 := Name (G, Source);
+          Error_Msg_Unit_2 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ has with clause and pragma Elaborate_All for unit $");
+ 
+       --  Otherwise the actual destination vertex denotes the spec of a unit,
+       --  while the expected destination is the corresponding body.
+       --
+       --            Elaborate_All   Actual_Destination
+       --    Source ---------------> spec
+       --
+       --                            body -->
+       --                            Expected_Destination
+ 
+       else
+          pragma Assert (Is_Spec_With_Body (G, Actual_Destination));
+          pragma Assert (Is_Body_With_Spec (G, Expected_Destination));
+          pragma Assert
+            (Proper_Body (G, Actual_Destination) = Expected_Destination);
+ 
+          Error_Msg_Unit_1 := Name (G, Source);
+          Error_Msg_Unit_2 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ has with clause and pragma Elaborate_All for unit $");
+ 
+          Error_Msg_Unit_1 := Name (G, Expected_Destination);
+          Error_Msg_Info
+            ("    unit $ is in the closure of pragma Elaborate_All");
+       end if;
+    end Output_Elaborate_All_Transition;
+ 
+    ---------------------------------------
+    -- Output_Elaborate_Body_Suggestions --
+    ---------------------------------------
+ 
+    procedure Output_Elaborate_Body_Suggestions
+      (G    : Library_Graph;
+       Succ : Library_Graph_Vertex_Id)
+    is
+       Spec : Library_Graph_Vertex_Id;
+ 
+    begin
+       pragma Assert (Present (G));
+       pragma Assert (Present (Succ));
+ 
+       --  Find the initial declaration of the unit because it is the one
+       --  subject to pragma Elaborate_Body.
+ 
+       if Is_Body_With_Spec (G, Succ) then
+          Spec := Proper_Spec (G, Succ);
+       else
+          Spec := Succ;
+       end if;
+ 
+       Error_Msg_Unit_1 := Name (G, Spec);
+       Error_Msg_Info
+         ("    remove pragma Elaborate_Body in unit $");
+    end Output_Elaborate_Body_Suggestions;
+ 
+    --------------------------------------
+    -- Output_Elaborate_Body_Transition --
+    --------------------------------------
+ 
+    procedure Output_Elaborate_Body_Transition
+      (G                    : Library_Graph;
+       Source               : Library_Graph_Vertex_Id;
+       Actual_Destination   : Library_Graph_Vertex_Id;
+       Expected_Destination : Library_Graph_Vertex_Id;
+       Elaborate_All_Active : Boolean)
+    is
+    begin
+       pragma Assert (Present (G));
+       pragma Assert (Present (Source));
+       pragma Assert (Present (Actual_Destination));
+       pragma Assert (Present (Expected_Destination));
+ 
+       --  The actual and expected destination vertices match
+       --
+       --                     Actual_Destination
+       --    Source --------> spec -->
+       --    Elaborate_Body   Expected_Destination
+       --
+       --                     spec
+       --
+       --                     Actual_Destination
+       --    Source --------> body -->
+       --    Elaborate_Body   Expected_Destination
+ 
+       if Actual_Destination = Expected_Destination then
+          Error_Msg_Unit_1 := Name (G, Source);
+          Error_Msg_Unit_2 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ has with clause for unit $");
+ 
+       --  The actual destination vertex denotes the spec of a unit while the
+       --  expected destination is the corresponding body, and the unit is in
+       --  the closure of an earlier Elaborate_All pragma.
+       --
+       --                     Actual_Destination
+       --    Source --------> spec
+       --    Elaborate_Body
+       --                     body -->
+       --                     Expected_Destination
+ 
+       elsif Elaborate_All_Active then
+          pragma Assert (Is_Spec_With_Body (G, Actual_Destination));
+          pragma Assert (Is_Body_With_Spec (G, Expected_Destination));
+          pragma Assert
+            (Proper_Body (G, Actual_Destination) = Expected_Destination);
+ 
+          Error_Msg_Unit_1 := Name (G, Source);
+          Error_Msg_Unit_2 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ has with clause for unit $");
+ 
+          Error_Msg_Unit_1 := Name (G, Expected_Destination);
+          Error_Msg_Info
+            ("    unit $ is in the closure of pragma Elaborate_All");
+ 
+       --  Otherwise the actual destination vertex is the spec of a unit subject
+       --  to pragma Elaborate_Body and the expected destination vertex is the
+       --  completion body.
+       --
+       --                     Actual_Destination
+       --    Source --------> spec Elaborate_Body
+       --    Elaborate_Body
+       --                     body -->
+       --                     Expected_Destination
+ 
+       else
+          pragma Assert
+            (Is_Elaborate_Body_Pair
+              (G           => G,
+               Spec_Vertex => Actual_Destination,
+               Body_Vertex => Expected_Destination));
+ 
+          Error_Msg_Unit_1 := Name (G, Source);
+          Error_Msg_Unit_2 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ has with clause for unit $");
+ 
+          Error_Msg_Unit_1 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ is subject to pragma Elaborate_Body");
+ 
+          Error_Msg_Unit_1 := Name (G, Expected_Destination);
+          Error_Msg_Info
+            ("    unit $ is in the closure of pragma Elaborate_Body");
+       end if;
+    end Output_Elaborate_Body_Transition;
+ 
+    ----------------------------------
+    -- Output_Elaborate_Suggestions --
+    ----------------------------------
+ 
+    procedure Output_Elaborate_Suggestions
+      (G    : Library_Graph;
+       Pred : Library_Graph_Vertex_Id;
+       Succ : Library_Graph_Vertex_Id)
+    is
+    begin
+       pragma Assert (Present (G));
+       pragma Assert (Present (Pred));
+       pragma Assert (Present (Succ));
+ 
+       Error_Msg_Unit_1 := Name (G, Pred);
+       Error_Msg_Unit_2 := Name (G, Succ);
+       Error_Msg_Info
+         ("    remove pragma Elaborate for unit $ in unit $");
+    end Output_Elaborate_Suggestions;
+ 
+    ---------------------------------
+    -- Output_Elaborate_Transition --
+    ---------------------------------
+ 
+    procedure Output_Elaborate_Transition
+      (G                    : Library_Graph;
+       Source               : Library_Graph_Vertex_Id;
+       Actual_Destination   : Library_Graph_Vertex_Id;
+       Expected_Destination : Library_Graph_Vertex_Id)
+    is
+       Spec : Library_Graph_Vertex_Id;
+ 
+    begin
+       pragma Assert (Present (G));
+       pragma Assert (Present (Source));
+       pragma Assert (Present (Actual_Destination));
+       pragma Assert (Present (Expected_Destination));
+ 
+       --  The actual and expected destination vertices match, and denote the
+       --  initial declaration of a unit.
+       --
+       --            Elaborate   Actual_Destination
+       --    Source -----------> spec -->
+       --                        Expected_Destination
+       --
+       --            Elaborate   Actual_Destination
+       --    Source -----------> stand-alone body -->
+       --                        Expected_Destination
+       --
+       --  The processing of pragma Elaborate body generates an edge between a
+       --  successor and predecessor body.
+       --
+       --                        spec
+       --
+       --            Elaborate   Actual_Destination
+       --    Source -----------> body -->
+       --                        Expected_Destination
+ 
+       if Actual_Destination = Expected_Destination then
+ 
+          --  Find the initial declaration of the unit because it is the one
+          --  subject to pragma Elaborate.
+ 
+          if Is_Body_With_Spec (G, Actual_Destination) then
+             Spec := Proper_Spec (G, Actual_Destination);
+          else
+             Spec := Actual_Destination;
+          end if;
+ 
+          Error_Msg_Unit_1 := Name (G, Source);
+          Error_Msg_Unit_2 := Name (G, Spec);
+          Error_Msg_Info
+            ("    unit $ has with clause and pragma Elaborate for unit $");
+ 
+          if Actual_Destination /= Spec then
+             Error_Msg_Unit_1 := Name (G, Actual_Destination);
+             Error_Msg_Info
+               ("    unit $ is in the closure of pragma Elaborate");
+          end if;
+ 
+       --  Otherwise the actual destination vertex denotes the spec of a unit
+       --  while the expected destination vertex is the corresponding body.
+       --
+       --            Elaborate   Actual_Destination
+       --    Source -----------> spec
+       --
+       --                        body -->
+       --                        Expected_Destination
+ 
+       else
+          pragma Assert (Is_Spec_With_Body (G, Actual_Destination));
+          pragma Assert (Is_Body_With_Spec (G, Expected_Destination));
+          pragma Assert
+            (Proper_Body (G, Actual_Destination) = Expected_Destination);
+ 
+          Error_Msg_Unit_1 := Name (G, Source);
+          Error_Msg_Unit_2 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ has with clause and pragma Elaborate for unit $");
+ 
+          Error_Msg_Unit_1 := Name (G, Expected_Destination);
+          Error_Msg_Info
+            ("    unit $ is in the closure of pragma Elaborate");
+       end if;
+    end Output_Elaborate_Transition;
+ 
+    -------------------------------
+    -- Output_Forced_Suggestions --
+    -------------------------------
+ 
+    procedure Output_Forced_Suggestions
+      (G    : Library_Graph;
+       Pred : Library_Graph_Vertex_Id;
+       Succ : Library_Graph_Vertex_Id)
+    is
+    begin
+       pragma Assert (Present (G));
+       pragma Assert (Present (Pred));
+       pragma Assert (Present (Succ));
+ 
+       Error_Msg_Unit_1 := Name (G, Succ);
+       Error_Msg_Unit_2 := Name (G, Pred);
+       Error_Msg_Info
+         ("    remove the dependency of unit $ on unit $ from the argument of "
+          & "switch -f");
+       Error_Msg_Info
+         ("    remove switch -f");
+    end Output_Forced_Suggestions;
+ 
+    ------------------------------
+    -- Output_Forced_Transition --
+    ------------------------------
+ 
+    procedure Output_Forced_Transition
+      (G                    : Library_Graph;
+       Source               : Library_Graph_Vertex_Id;
+       Actual_Destination   : Library_Graph_Vertex_Id;
+       Expected_Destination : Library_Graph_Vertex_Id;
+       Elaborate_All_Active : Boolean)
+    is
+    begin
+       pragma Assert (Present (G));
+       pragma Assert (Present (Source));
+       pragma Assert (Present (Actual_Destination));
+       pragma Assert (Present (Expected_Destination));
+ 
+       --  The actual and expected destination vertices match
+       --
+       --            Forced   Actual_Destination
+       --    Source --------> spec -->
+       --                     Expected_Destination
+       --
+       --            Forced   Actual_Destination
+       --    Source --------> body -->
+       --                     Expected_Destination
+ 
+       if Actual_Destination = Expected_Destination then
+          Error_Msg_Unit_1 := Name (G, Source);
+          Error_Msg_Unit_2 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ has a dependency on unit $ forced by -f switch");
+ 
+       --  The actual destination vertex denotes the spec of a unit while the
+       --  expected destination is the corresponding body, and the unit is in
+       --  the closure of an earlier Elaborate_All pragma.
+       --
+       --            Forced   Actual_Destination
+       --    Source --------> spec
+       --
+       --                     body -->
+       --                     Expected_Destination
+ 
+       elsif Elaborate_All_Active then
+          pragma Assert (Is_Spec_With_Body (G, Actual_Destination));
+          pragma Assert (Is_Body_With_Spec (G, Expected_Destination));
+          pragma Assert
+            (Proper_Body (G, Actual_Destination) = Expected_Destination);
+ 
+          Error_Msg_Unit_1 := Name (G, Source);
+          Error_Msg_Unit_2 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ has a dependency on unit $ forced by -f switch");
+ 
+          Error_Msg_Unit_1 := Name (G, Expected_Destination);
+          Error_Msg_Info
+            ("    unit $ is in the closure of pragma Elaborate_All");
+ 
+       --  Otherwise the actual destination vertex denotes a spec subject to
+       --  pragma Elaborate_Body while the expected destination denotes the
+       --  corresponding body.
+       --
+       --            Forced   Actual_Destination
+       --    Source --------> spec Elaborate_Body
+       --
+       --                     body -->
+       --                     Expected_Destination
+ 
+       else
+          pragma Assert
+            (Is_Elaborate_Body_Pair
+              (G           => G,
+               Spec_Vertex => Actual_Destination,
+               Body_Vertex => Expected_Destination));
+ 
+          Error_Msg_Unit_1 := Name (G, Source);
+          Error_Msg_Unit_2 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ has a dependency on unit $ forced by -f switch");
+ 
+          Error_Msg_Unit_1 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ is subject to pragma Elaborate_Body");
+ 
+          Error_Msg_Unit_1 := Name (G, Expected_Destination);
+          Error_Msg_Info
+            ("    unit $ is in the closure of pragma Elaborate_Body");
+       end if;
+    end Output_Forced_Transition;
+ 
+    --------------------------------------
+    -- Output_Full_Encoding_Suggestions --
+    --------------------------------------
+ 
+    procedure Output_Full_Encoding_Suggestions
+      (G          : Library_Graph;
+       Cycle      : Library_Graph_Cycle_Id;
+       First_Edge : Library_Graph_Edge_Id)
+    is
+       Succ : Library_Graph_Vertex_Id;
+ 
+    begin
+       pragma Assert (Present (G));
+       pragma Assert (Present (Cycle));
+       pragma Assert (Present (First_Edge));
+ 
+       if Is_Invocation_Edge (G, First_Edge) then
+          Succ := Successor (G, First_Edge);
+ 
+          if Invocation_Graph_Encoding (G, Succ) /= Full_Path_Encoding then
+             Error_Msg_Info
+               ("    use detailed invocation information (compiler switch "
+                & "-gnatd_F)");
+          end if;
+       end if;
+    end Output_Full_Encoding_Suggestions;
+ 
+    ----------------------------
+    -- Output_Invocation_Path --
+    -----------------------------
+ 
+    procedure Output_Invocation_Path
+      (Inv_Graph         : Invocation_Graph;
+       Lib_Graph         : Library_Graph;
+       Elaborated_Vertex : Library_Graph_Vertex_Id;
+       Path              : IGE_Lists.Doubly_Linked_List;
+       Path_Id           : in out Nat)
+    is
+       Edge : Invocation_Graph_Edge_Id;
+       Iter : IGE_Lists.Iterator;
+ 
+    begin
+       pragma Assert (Present (Inv_Graph));
+       pragma Assert (Present (Lib_Graph));
+       pragma Assert (Present (Elaborated_Vertex));
+       pragma Assert (IGE_Lists.Present (Path));
+ 
+       Error_Msg_Nat_1 := Path_Id;
+       Error_Msg_Info ("      path #:");
+ 
+       Error_Msg_Unit_1 := Name (Lib_Graph, Elaborated_Vertex);
+       Error_Msg_Info ("        elaboration of unit $");
+ 
+       Iter := IGE_Lists.Iterate (Path);
+       while IGE_Lists.Has_Next (Iter) loop
+          IGE_Lists.Next (Iter, Edge);
+ 
+          Output_Invocation_Path_Transition
+            (Inv_Graph => Inv_Graph,
+             Lib_Graph => Lib_Graph,
+             Edge      => Edge);
+       end loop;
+ 
+       Path_Id := Path_Id + 1;
+    end Output_Invocation_Path;
+ 
+    ---------------------------------------
+    -- Output_Invocation_Path_Transition --
+    ---------------------------------------
+ 
+    procedure Output_Invocation_Path_Transition
+      (Inv_Graph : Invocation_Graph;
+       Lib_Graph : Library_Graph;
+       Edge      : Invocation_Graph_Edge_Id)
+    is
+       pragma Assert (Present (Inv_Graph));
+       pragma Assert (Present (Lib_Graph));
+       pragma Assert (Present (Edge));
+ 
+       Declared : constant String := "declared at {:#:#";
+ 
+       Targ        : constant Invocation_Graph_Vertex_Id :=
+                       Target (Inv_Graph, Edge);
+       Targ_Extra  : constant Name_Id                    :=
+                       Extra (Inv_Graph, Edge);
+       Targ_Vertex : constant Library_Graph_Vertex_Id    :=
+                       Spec_Vertex (Inv_Graph, Targ);
+ 
+    begin
+       Error_Msg_Name_1 := Name   (Inv_Graph, Targ);
+       Error_Msg_Nat_1  := Line   (Inv_Graph, Targ);
+       Error_Msg_Nat_2  := Column (Inv_Graph, Targ);
+       Error_Msg_File_1 := File_Name (Lib_Graph, Targ_Vertex);
+ 
+       case Kind (Inv_Graph, Edge) is
+          when Accept_Alternative =>
+             Error_Msg_Info
+               ("        selection of entry % "
+                & Declared);
+ 
+          when Access_Taken =>
+             Error_Msg_Info
+               ("        aliasing of subprogram % "
+                & Declared);
+ 
+          when Call =>
+             Error_Msg_Info
+               ("        call to subprogram % "
+                & Declared);
+ 
+          when Controlled_Adjustment
+             | Internal_Controlled_Adjustment
+          =>
+             Error_Msg_Name_1 := Targ_Extra;
+             Error_Msg_Info
+               ("        adjustment actions for type % "
+                & Declared);
+ 
+          when Controlled_Finalization
+             | Internal_Controlled_Finalization
+          =>
+             Error_Msg_Name_1 := Targ_Extra;
+             Error_Msg_Info
+               ("        finalization actions for type % "
+                & Declared);
+ 
+          when Controlled_Initialization
+             | Internal_Controlled_Initialization
+             | Type_Initialization
+          =>
+             Error_Msg_Name_1 := Targ_Extra;
+             Error_Msg_Info
+               ("        initialization actions for type % "
+                & Declared);
+ 
+          when Default_Initial_Condition_Verification =>
+             Error_Msg_Name_1 := Targ_Extra;
+             Error_Msg_Info
+               ("        verification of Default_Initial_Condition for type % "
+                & Declared);
+ 
+          when Initial_Condition_Verification =>
+             Error_Msg_Info
+               ("        verification of Initial_Condition "
+                & Declared);
+ 
+          when Instantiation =>
+             Error_Msg_Info
+               ("        instantiation % "
+                & Declared);
+ 
+          when Invariant_Verification =>
+             Error_Msg_Name_1 := Targ_Extra;
+             Error_Msg_Info
+               ("        verification of invariant for type % "
+                & Declared);
+ 
+          when Postcondition_Verification =>
+             Error_Msg_Name_1 := Targ_Extra;
+             Error_Msg_Info
+               ("        verification of postcondition for subprogram % "
+                & Declared);
+ 
+          when Protected_Entry_Call =>
+             Error_Msg_Info
+               ("        call to protected entry % "
+                & Declared);
+ 
+          when Protected_Subprogram_Call =>
+             Error_Msg_Info
+               ("        call to protected subprogram % "
+                & Declared);
+ 
+          when Task_Activation =>
+             Error_Msg_Info
+               ("        activation of local task "
+                & Declared);
+ 
+          when Task_Entry_Call =>
+             Error_Msg_Info
+               ("        call to task entry % "
+                & Declared);
+ 
+          when others =>
+             pragma Assert (False);
+             null;
+       end case;
+    end Output_Invocation_Path_Transition;
+ 
+    -------------------------------------------
+    -- Output_Invocation_Related_Suggestions --
+    -------------------------------------------
+ 
+    procedure Output_Invocation_Related_Suggestions
+      (G     : Library_Graph;
+       Cycle : Library_Graph_Cycle_Id)
+    is
+    begin
+       pragma Assert (Present (G));
+       pragma Assert (Present (Cycle));
+ 
+       --  Nothing to do when the cycle does not contain an invocation edge
+ 
+       if Invocation_Edge_Count (G, Cycle) = 0 then
+          return;
+       end if;
+ 
+       --  The cycle contains at least one invocation edge, where at least
+       --  one of the paths the edge represents activates a task. The use of
+       --  restriction No_Entry_Calls_In_Elaboration_Code may halt the flow
+       --  within the task body on a select or accept statement, eliminating
+       --  subsequent invocation edges, thus breaking the cycle.
+ 
+       if not Restriction_Active (No_Entry_Calls_In_Elaboration_Code)
+         and then Contains_Task_Activation (G, Cycle)
+       then
+          Error_Msg_Info
+            ("    use pragma Restrictions "
+             & "(No_Entry_Calls_In_Elaboration_Code)");
+       end if;
+ 
+       --  The cycle contains at least one invocation edge where the successor
+       --  was statically elaborated. The use of the dynamic model may remove
+       --  one of the invocation edges in the cycle, thus breaking the cycle.
+ 
+       if Contains_Static_Successor_Edge (G, Cycle) then
+          Error_Msg_Info
+            ("    use the dynamic elaboration model (compiler switch -gnatE)");
+       end if;
+    end Output_Invocation_Related_Suggestions;
+ 
+    ----------------------------------
+    -- Output_Invocation_Transition --
+    ----------------------------------
+ 
+    procedure Output_Invocation_Transition
+      (Inv_Graph   : Invocation_Graph;
+       Lib_Graph   : Library_Graph;
+       Source      : Library_Graph_Vertex_Id;
+       Destination : Library_Graph_Vertex_Id)
+    is
+    begin
+       pragma Assert (Present (Inv_Graph));
+       pragma Assert (Present (Lib_Graph));
+       pragma Assert (Present (Source));
+       pragma Assert (Present (Destination));
+ 
+       Error_Msg_Unit_1 := Name (Lib_Graph, Source);
+       Error_Msg_Unit_2 := Name (Lib_Graph, Destination);
+       Error_Msg_Info
+         ("    unit $ invokes a construct of unit $ at elaboration time");
+ 
+       Find_And_Output_Invocation_Paths
+         (Inv_Graph   => Inv_Graph,
+          Lib_Graph   => Lib_Graph,
+          Source      => Source,
+          Destination => Destination);
+    end Output_Invocation_Transition;
+ 
+    ------------------------------------------
+    -- Output_Reason_And_Circularity_Header --
+    ------------------------------------------
+ 
+    procedure Output_Reason_And_Circularity_Header
+      (G          : Library_Graph;
+       First_Edge : Library_Graph_Edge_Id)
+    is
+       pragma Assert (Present (G));
+       pragma Assert (Present (First_Edge));
+ 
+       Succ : constant Library_Graph_Vertex_Id := Successor (G, First_Edge);
+ 
+    begin
+       Error_Msg_Unit_1 := Name (G, Succ);
+       Error_Msg      ("Elaboration circularity detected");
+       Error_Msg_Info ("");
+       Error_Msg_Info ("  Reason:");
+       Error_Msg_Info ("");
+       Error_Msg_Info ("    unit $ depends on its own elaboration");
+       Error_Msg_Info ("");
+       Error_Msg_Info ("  Circularity:");
+       Error_Msg_Info ("");
+    end Output_Reason_And_Circularity_Header;
+ 
+    ------------------------
+    -- Output_Suggestions --
+    ------------------------
+ 
+    procedure Output_Suggestions
+      (G          : Library_Graph;
+       Cycle      : Library_Graph_Cycle_Id;
+       First_Edge : Library_Graph_Edge_Id)
+    is
+       pragma Assert (Present (G));
+       pragma Assert (Present (Cycle));
+       pragma Assert (Present (First_Edge));
+ 
+       Pred : constant Library_Graph_Vertex_Id := Predecessor (G, First_Edge);
+       Succ : constant Library_Graph_Vertex_Id := Successor   (G, First_Edge);
+ 
+    begin
+       Error_Msg_Info ("");
+       Error_Msg_Info ("  Suggestions:");
+       Error_Msg_Info ("");
+ 
+       --  Output edge-specific suggestions
+ 
+       if Is_Elaborate_All_Edge (G, First_Edge) then
+          Output_Elaborate_All_Suggestions
+            (G    => G,
+             Pred => Pred,
+             Succ => Succ);
+ 
+       elsif Is_Elaborate_Body_Edge (G, First_Edge) then
+          Output_Elaborate_Body_Suggestions
+            (G    => G,
+             Succ => Succ);
+ 
+       elsif Is_Elaborate_Edge (G, First_Edge) then
+          Output_Elaborate_Suggestions
+            (G    => G,
+             Pred => Pred,
+             Succ => Succ);
+ 
+       elsif Is_Forced_Edge (G, First_Edge) then
+          Output_Forced_Suggestions
+            (G    => G,
+             Pred => Pred,
+             Succ => Succ);
+       end if;
+ 
+       --  Output general purpose suggestions
+ 
+       Output_Invocation_Related_Suggestions
+         (G     => G,
+          Cycle => Cycle);
+ 
+       Output_Full_Encoding_Suggestions
+         (G          => G,
+          Cycle      => Cycle,
+          First_Edge => First_Edge);
+ 
+       Output_All_Cycles_Suggestions (G);
+ 
+       Error_Msg_Info ("");
+    end Output_Suggestions;
+ 
+    -----------------------
+    -- Output_Transition --
+    -----------------------
+ 
+    procedure Output_Transition
+      (Inv_Graph            : Invocation_Graph;
+       Lib_Graph            : Library_Graph;
+       Current_Edge         : Library_Graph_Edge_Id;
+       Next_Edge            : Library_Graph_Edge_Id;
+       Elaborate_All_Active : Boolean)
+    is
+       pragma Assert (Present (Inv_Graph));
+       pragma Assert (Present (Lib_Graph));
+       pragma Assert (Present (Current_Edge));
+       pragma Assert (Present (Next_Edge));
+ 
+       Actual_Destination   : constant Library_Graph_Vertex_Id :=
+                                Predecessor (Lib_Graph, Current_Edge);
+       Expected_Destination : constant Library_Graph_Vertex_Id :=
+                                Successor   (Lib_Graph, Next_Edge);
+       Source               : constant Library_Graph_Vertex_Id :=
+                                Successor   (Lib_Graph, Current_Edge);
+ 
+    begin
+       if Is_Elaborate_All_Edge (Lib_Graph, Current_Edge) then
+          Output_Elaborate_All_Transition
+            (G                    => Lib_Graph,
+             Source               => Source,
+             Actual_Destination   => Actual_Destination,
+             Expected_Destination => Expected_Destination);
+ 
+       elsif Is_Elaborate_Body_Edge (Lib_Graph, Current_Edge) then
+          Output_Elaborate_Body_Transition
+            (G                    => Lib_Graph,
+             Source               => Source,
+             Actual_Destination   => Actual_Destination,
+             Expected_Destination => Expected_Destination,
+             Elaborate_All_Active => Elaborate_All_Active);
+ 
+       elsif Is_Elaborate_Edge (Lib_Graph, Current_Edge) then
+          Output_Elaborate_Transition
+            (G                    => Lib_Graph,
+             Source               => Source,
+             Actual_Destination   => Actual_Destination,
+             Expected_Destination => Expected_Destination);
+ 
+       elsif Is_Forced_Edge (Lib_Graph, Current_Edge) then
+          Output_Forced_Transition
+            (G                    => Lib_Graph,
+             Source               => Source,
+             Actual_Destination   => Actual_Destination,
+             Expected_Destination => Expected_Destination,
+             Elaborate_All_Active => Elaborate_All_Active);
+ 
+       elsif Is_Invocation_Edge (Lib_Graph, Current_Edge) then
+          Output_Invocation_Transition
+            (Inv_Graph   => Inv_Graph,
+             Lib_Graph   => Lib_Graph,
+             Source      => Source,
+             Destination => Expected_Destination);
+ 
+       else
+          pragma Assert (Is_With_Edge (Lib_Graph, Current_Edge));
+ 
+          Output_With_Transition
+            (G                    => Lib_Graph,
+             Source               => Source,
+             Actual_Destination   => Actual_Destination,
+             Expected_Destination => Expected_Destination,
+             Elaborate_All_Active => Elaborate_All_Active);
+       end if;
+    end Output_Transition;
+ 
+    ----------------------------
+    -- Output_With_Transition --
+    ----------------------------
+ 
+    procedure Output_With_Transition
+      (G                    : Library_Graph;
+       Source               : Library_Graph_Vertex_Id;
+       Actual_Destination   : Library_Graph_Vertex_Id;
+       Expected_Destination : Library_Graph_Vertex_Id;
+       Elaborate_All_Active : Boolean)
+    is
+    begin
+       pragma Assert (Present (G));
+       pragma Assert (Present (Source));
+       pragma Assert (Present (Actual_Destination));
+       pragma Assert (Present (Expected_Destination));
+ 
+       --  The actual and expected destination vertices match, and denote the
+       --  initial declaration of a unit.
+       --
+       --            with   Actual_Destination
+       --    Source ------> spec -->
+       --                   Expected_Destination
+       --
+       --            with   Actual_Destination
+       --    Source ------> stand-alone body -->
+       --                   Expected_Destination
+ 
+       if Actual_Destination = Expected_Destination then
+          Error_Msg_Unit_1 := Name (G, Source);
+          Error_Msg_Unit_2 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ has with clause for unit $");
+ 
+       --  The actual destination vertex denotes the spec of a unit while the
+       --  expected destination is the corresponding body, and the unit is in
+       --  the closure of an earlier Elaborate_All pragma.
+       --
+       --            with   Actual_Destination
+       --    Source ------> spec
+       --
+       --                   body -->
+       --                   Expected_Destination
+ 
+       elsif Elaborate_All_Active then
+          pragma Assert (Is_Spec_With_Body (G, Actual_Destination));
+          pragma Assert (Is_Body_With_Spec (G, Expected_Destination));
+          pragma Assert
+            (Proper_Body (G, Actual_Destination) = Expected_Destination);
+ 
+          Error_Msg_Unit_1 := Name (G, Source);
+          Error_Msg_Unit_2 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ has with clause for unit $");
+ 
+          Error_Msg_Unit_1 := Name (G, Expected_Destination);
+          Error_Msg_Info
+            ("    unit $ is in the closure of pragma Elaborate_All");
+ 
+       --  Otherwise the actual destination vertex denotes a spec subject to
+       --  pragma Elaborate_Body while the expected destination denotes the
+       --  corresponding body.
+       --
+       --            with   Actual_Destination
+       --    Source ------> spec Elaborate_Body
+       --
+       --                   body -->
+       --                   Expected_Destination
+ 
+       else
+          pragma Assert
+            (Is_Elaborate_Body_Pair
+              (G           => G,
+               Spec_Vertex => Actual_Destination,
+               Body_Vertex => Expected_Destination));
+ 
+          Error_Msg_Unit_1 := Name (G, Source);
+          Error_Msg_Unit_2 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ has with clause for unit $");
+ 
+          Error_Msg_Unit_1 := Name (G, Actual_Destination);
+          Error_Msg_Info
+            ("    unit $ is subject to pragma Elaborate_Body");
+ 
+          Error_Msg_Unit_1 := Name (G, Expected_Destination);
+          Error_Msg_Info
+            ("    unit $ is in the closure of pragma Elaborate_Body");
+       end if;
+    end Output_With_Transition;
+ 
+    ------------------
+    -- Visit_Vertex --
+    ------------------
+ 
+    procedure Visit_Vertex
+      (Inv_Graph         : Invocation_Graph;
+       Lib_Graph         : Library_Graph;
+       Invoker           : Invocation_Graph_Vertex_Id;
+       Invoker_Vertex    : Library_Graph_Vertex_Id;
+       Last_Vertex       : Library_Graph_Vertex_Id;
+       Elaborated_Vertex : Library_Graph_Vertex_Id;
+       End_Vertex        : Library_Graph_Vertex_Id;
+       Visited_Invokers  : IGV_Sets.Membership_Set;
+       Path              : IGE_Lists.Doubly_Linked_List;
+       Path_Id           : in out Nat)
+    is
+       Edge : Invocation_Graph_Edge_Id;
+       Iter : Edges_To_Targets_Iterator;
+       Targ : Invocation_Graph_Vertex_Id;
+ 
+    begin
+       pragma Assert (Present (Inv_Graph));
+       pragma Assert (Present (Lib_Graph));
+       pragma Assert (Present (Invoker));
+       pragma Assert (Present (Invoker_Vertex));
+       pragma Assert (Present (Last_Vertex));
+       pragma Assert (Present (Elaborated_Vertex));
+       pragma Assert (Present (End_Vertex));
+       pragma Assert (IGV_Sets.Present (Visited_Invokers));
+       pragma Assert (IGE_Lists.Present (Path));
+ 
+       --  The current invocation vertex resides within the end library vertex.
+       --  Emit the path that started from some elaboration root and ultimately
+       --  reached the desired library vertex.
+ 
+       if Body_Vertex (Inv_Graph, Invoker) = End_Vertex
+         and then Invoker_Vertex /= Last_Vertex
+       then
+          Output_Invocation_Path
+            (Inv_Graph         => Inv_Graph,
+             Lib_Graph         => Lib_Graph,
+             Elaborated_Vertex => Elaborated_Vertex,
+             Path              => Path,
+             Path_Id           => Path_Id);
+ 
+       --  Otherwise extend the search for the end library vertex via all edges
+       --  to targets.
+ 
+       elsif not IGV_Sets.Contains (Visited_Invokers, Invoker) then
+ 
+          --  Prepare for invoker backtracking
+ 
+          IGV_Sets.Insert (Visited_Invokers, Invoker);
+ 
+          --  Extend the search via all edges to targets
+ 
+          Iter := Iterate_Edges_To_Targets (Inv_Graph, Invoker);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+ 
+             --  Prepare for edge backtracking
+ 
+             IGE_Lists.Append (Path, Edge);
+ 
+             --  The traversal proceeds through the library vertex that houses
+             --  the body of the target.
+ 
+             Targ := Target (Inv_Graph, Edge);
+ 
+             Visit_Vertex
+               (Inv_Graph         => Inv_Graph,
+                Lib_Graph         => Lib_Graph,
+                Invoker           => Targ,
+                Invoker_Vertex    => Body_Vertex (Inv_Graph, Targ),
+                Last_Vertex       => Invoker_Vertex,
+                Elaborated_Vertex => Elaborated_Vertex,
+                End_Vertex        => End_Vertex,
+                Visited_Invokers  => Visited_Invokers,
+                Path              => Path,
+                Path_Id           => Path_Id);
+ 
+             --  Backtrack the edge
+ 
+             IGE_Lists.Delete_Last (Path);
+          end loop;
+ 
+          --  Backtrack the invoker
+ 
+          IGV_Sets.Delete (Visited_Invokers, Invoker);
+       end if;
+    end Visit_Vertex;
+ 
+ end Bindo.Diagnostics;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-diagnostics.ads gcc-10.1.0/gcc/ada/bindo-diagnostics.ads
*** gcc-9.3.0/gcc/ada/bindo-diagnostics.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-diagnostics.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,61 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                     B I N D O . D I A G N O S T I C S                    --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  For full architecture, see unit Bindo.
+ 
+ --  The following unit contains facilities to diagnose various issues with the
+ --  elaboration order.
+ 
+ with Bindo.Graphs;
+ use  Bindo.Graphs;
+ use  Bindo.Graphs.Invocation_Graphs;
+ use  Bindo.Graphs.Library_Graphs;
+ 
+ package Bindo.Diagnostics is
+ 
+    -----------
+    -- Types --
+    -----------
+ 
+    --  The following type enumerates all possible statuses of the elaboration
+    --  order.
+ 
+    type Elaboration_Order_Status is
+      (Order_Has_Circularity,
+       Order_Has_Elaborate_All_Circularity,
+       Order_OK);
+ 
+    ---------
+    -- API --
+    ---------
+ 
+    procedure Diagnose_Circularities
+      (Inv_Graph : Invocation_Graph;
+       Lib_Graph : Library_Graph);
+    pragma Inline (Diagnose_Circularities);
+    --  Diagnose all cycles of library graph Lib_Graph with matching invocation
+    --  graph Inv_Graph.
+ 
+ end Bindo.Diagnostics;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-elaborators.adb gcc-10.1.0/gcc/ada/bindo-elaborators.adb
*** gcc-9.3.0/gcc/ada/bindo-elaborators.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-elaborators.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,1694 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                     B I N D O . E L A B O R A T O R S                    --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Butil;  use Butil;
+ with Debug;  use Debug;
+ with Output; use Output;
+ with Types;  use Types;
+ 
+ with Bindo.Augmentors;
+ use  Bindo.Augmentors;
+ use  Bindo.Augmentors.Library_Graph_Augmentors;
+ 
+ with Bindo.Builders;
+ use  Bindo.Builders;
+ use  Bindo.Builders.Invocation_Graph_Builders;
+ use  Bindo.Builders.Library_Graph_Builders;
+ 
+ with Bindo.Diagnostics;
+ use  Bindo.Diagnostics;
+ 
+ with Bindo.Units;
+ use  Bindo.Units;
+ 
+ with Bindo.Validators;
+ use  Bindo.Validators;
+ use  Bindo.Validators.Elaboration_Order_Validators;
+ 
+ with Bindo.Writers;
+ use  Bindo.Writers;
+ use  Bindo.Writers.ALI_Writers;
+ use  Bindo.Writers.Dependency_Writers;
+ use  Bindo.Writers.Elaboration_Order_Writers;
+ use  Bindo.Writers.Invocation_Graph_Writers;
+ use  Bindo.Writers.Library_Graph_Writers;
+ use  Bindo.Writers.Phase_Writers;
+ use  Bindo.Writers.Unit_Closure_Writers;
+ 
+ with GNAT;        use GNAT;
+ with GNAT.Graphs; use GNAT.Graphs;
+ 
+ package body Bindo.Elaborators is
+ 
+    --  The following type defines the advancement of the elaboration order
+    --  algorithm in terms of steps.
+ 
+    type Elaboration_Order_Step is new Natural;
+ 
+    Initial_Step : constant Elaboration_Order_Step :=
+                     Elaboration_Order_Step'First;
+ 
+    ----------------------------------------------
+    -- Invocation_And_Library_Graph_Elaborators --
+    ----------------------------------------------
+ 
+    package body Invocation_And_Library_Graph_Elaborators is
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Create_Component_Vertex_Sets
+         (G                   : Library_Graph;
+          Comp                : Component_Id;
+          Elaborable_Vertices : out LGV_Sets.Membership_Set;
+          Waiting_Vertices    : out LGV_Sets.Membership_Set;
+          Step                : Elaboration_Order_Step);
+       pragma Inline (Create_Component_Vertex_Sets);
+       --  Split all vertices of component Comp of library graph G as follows:
+       --
+       --    * Elaborable vertices are added to set Elaborable_Vertices.
+       --
+       --    * Vertices that are still waiting on their predecessors to be
+       --      elaborated are added to set Waiting_Vertices.
+       --
+       --  Step is the current step in the elaboration order.
+ 
+       procedure Create_Vertex_Sets
+         (G                   : Library_Graph;
+          Elaborable_Vertices : out LGV_Sets.Membership_Set;
+          Waiting_Vertices    : out LGV_Sets.Membership_Set;
+          Step                : Elaboration_Order_Step);
+       pragma Inline (Create_Vertex_Sets);
+       --  Split all vertices of library graph G as follows:
+       --
+       --    * Elaborable vertices are added to set Elaborable_Vertices.
+       --
+       --    * Vertices that are still waiting on their predecessors to be
+       --      elaborated are added to set Waiting_Vertices.
+       --
+       --  Step is the current step in the elaboration order.
+ 
+       procedure Elaborate_Component
+         (G                       : Library_Graph;
+          Comp                    : Component_Id;
+          All_Elaborable_Vertices : LGV_Sets.Membership_Set;
+          All_Waiting_Vertices    : LGV_Sets.Membership_Set;
+          Order                   : in out Unit_Id_Table;
+          Step                    : Elaboration_Order_Step);
+       pragma Inline (Elaborate_Component);
+       --  Elaborate as many vertices as possible that appear in component Comp
+       --  of library graph G. The sets contain vertices arranged as follows:
+       --
+       --    * All_Elaborable_Vertices - all elaborable vertices in the library
+       --      graph.
+       --
+       --    * All_Waiting_Vertices - all vertices in the library graph that are
+       --      waiting on predecessors to be elaborated.
+       --
+       --  Order is the elaboration order. Step denotes the current step in the
+       --  elaboration order.
+ 
+       procedure Elaborate_Library_Graph
+         (G      : Library_Graph;
+          Order  : out Unit_Id_Table;
+          Status : out Elaboration_Order_Status);
+       pragma Inline (Elaborate_Library_Graph);
+       --  Elaborate as many vertices as possible of library graph G. Order is
+       --  the elaboration order. Status is the condition of the elaboration
+       --  order.
+ 
+       procedure Elaborate_Vertex
+         (G                        : Library_Graph;
+          Vertex                   : Library_Graph_Vertex_Id;
+          All_Elaborable_Vertices  : LGV_Sets.Membership_Set;
+          All_Waiting_Vertices     : LGV_Sets.Membership_Set;
+          Comp_Elaborable_Vertices : LGV_Sets.Membership_Set;
+          Comp_Waiting_Vertices    : LGV_Sets.Membership_Set;
+          Order                    : in out Unit_Id_Table;
+          Step                     : Elaboration_Order_Step;
+          Indent                   : Indentation_Level);
+       pragma Inline (Elaborate_Vertex);
+       --  Elaborate vertex Vertex of library graph G by adding its unit to
+       --  elaboration order Order. The routine updates awaiting successors
+       --  where applicable. The sets contain vertices arranged as follows:
+       --
+       --    * All_Elaborable_Vertices - all elaborable vertices in the library
+       --      graph.
+       --
+       --    * All_Waiting_Vertices - all vertices in the library graph that are
+       --      waiting on predecessors to be elaborated.
+       --
+       --    * Comp_Elaborable_Vertices - all elaborable vertices found in the
+       --      component of Vertex.
+       --
+       --    * Comp_Waiting_Vertices - all vertices found in the component of
+       --      Vertex that are still waiting on predecessors to be elaborated.
+       --
+       --  Order denotes the elaboration order. Step is the current step in the
+       --  elaboration order. Indent denotes the desired indentation level for
+       --  tracing.
+ 
+       function Find_Best_Elaborable_Vertex
+         (G      : Library_Graph;
+          Set    : LGV_Sets.Membership_Set;
+          Step   : Elaboration_Order_Step;
+          Indent : Indentation_Level) return Library_Graph_Vertex_Id;
+       pragma Inline (Find_Best_Elaborable_Vertex);
+       --  Find the best vertex of library graph G from membership set S that
+       --  can be elaborated. Step is the current step in the elaboration order.
+       --  Indent is the desired indentation level for tracing.
+ 
+       function Find_Best_Vertex
+         (G                   : Library_Graph;
+          Set                 : LGV_Sets.Membership_Set;
+          Is_Suitable_Vertex  : LGV_Predicate_Ptr;
+          Compare_Vertices    : LGV_Comparator_Ptr;
+          Initial_Best_Msg    : String;
+          Subsequent_Best_Msg : String;
+          Step                : Elaboration_Order_Step;
+          Indent              : Indentation_Level)
+          return Library_Graph_Vertex_Id;
+       pragma Inline (Find_Best_Vertex);
+       --  Find the best vertex of library graph G from membership set S which
+       --  satisfies predicate Is_Suitable_Vertex and is preferred by comparator
+       --  Compare_Vertices. Initial_Best_Msg is emitted on the first candidate
+       --  vertex. Subsequent_Best_Msg is emitted whenever a better vertex is
+       --  discovered. Step is the current step in the elaboration order. Indent
+       --  is the desired indentation level for tracing.
+ 
+       function Find_Best_Weakly_Elaborable_Vertex
+         (G      : Library_Graph;
+          Set    : LGV_Sets.Membership_Set;
+          Step   : Elaboration_Order_Step;
+          Indent : Indentation_Level) return Library_Graph_Vertex_Id;
+       pragma Inline (Find_Best_Weakly_Elaborable_Vertex);
+       --  Find the best vertex of library graph G from membership set S that
+       --  can be weakly elaborated. Step is the current step in the elaboration
+       --  order. Indent is the desired indentation level for tracing.
+ 
+       function Has_Elaborable_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Has_Elaborable_Body);
+       --  Determine whether vertex Vertex of library graph G has a body that is
+       --  elaborable. It is assumed that the vertex has been elaborated.
+ 
+       procedure Insert_Elaborable_Successor
+         (G                     : Library_Graph;
+          Vertex                : Library_Graph_Vertex_Id;
+          Elaborable_Vertices   : LGV_Sets.Membership_Set;
+          All_Waiting_Vertices  : LGV_Sets.Membership_Set;
+          Comp_Waiting_Vertices : LGV_Sets.Membership_Set;
+          Msg                   : String;
+          Step                  : Elaboration_Order_Step;
+          Indent                : Indentation_Level);
+       pragma Inline (Insert_Elaborable_Successor);
+       --  Add elaborable successor Vertex of library graph G to membership set
+       --  Elaborable_Vertices and remove it from both All_Waiting_Vertices and
+       --  Comp_Waiting_Vertices. Msg is a message emitted for tracing purposes.
+       --  Step is the current step in the elaboration order. Indent denotes the
+       --  desired indentation level for tracing.
+ 
+       procedure Insert_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Set    : LGV_Sets.Membership_Set;
+          Msg    : String;
+          Step   : Elaboration_Order_Step;
+          Indent : Indentation_Level);
+       pragma Inline (Insert_Vertex);
+       --  Add vertex Vertex of library graph G to membership set Set. Msg is
+       --  a message emitted for tracing purposes. Step is the current step in
+       --  the elaboration order. Indent is the desired indentation level for
+       --  tracing.
+ 
+       function Is_Better_Elaborable_Vertex
+         (G           : Library_Graph;
+          Vertex      : Library_Graph_Vertex_Id;
+          Compared_To : Library_Graph_Vertex_Id) return Precedence_Kind;
+       pragma Inline (Is_Better_Elaborable_Vertex);
+       --  Determine whether vertex Vertex of library graph G is a better choice
+       --  for elaboration compared to vertex Compared_To.
+ 
+       function Is_Better_Weakly_Elaborable_Vertex
+         (G           : Library_Graph;
+          Vertex      : Library_Graph_Vertex_Id;
+          Compared_To : Library_Graph_Vertex_Id) return Precedence_Kind;
+       pragma Inline (Is_Better_Weakly_Elaborable_Vertex);
+       --  Determine whether vertex Vertex of library graph G is a better choice
+       --  for weak elaboration compared to vertex Compared_To.
+ 
+       function Is_Suitable_Elaborable_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Suitable_Elaborable_Vertex);
+       --  Determine whether vertex Vertex of library graph G is suitable for
+       --  elaboration.
+ 
+       function Is_Suitable_Weakly_Elaborable_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Suitable_Weakly_Elaborable_Vertex);
+       --  Determine whether vertex Vertex of library graph G is suitable for
+       --  weak elaboration.
+ 
+       procedure Set_Unit_Elaboration_Positions (Order : Unit_Id_Table);
+       pragma Inline (Set_Unit_Elaboration_Positions);
+       --  Set the ALI.Units positions of all elaboration units in order Order
+ 
+       procedure Trace_Component
+         (G    : Library_Graph;
+          Comp : Component_Id;
+          Msg  : String;
+          Step : Elaboration_Order_Step);
+       pragma Inline (Trace_Component);
+       --  Write elaboration-related information for component Comp of library
+       --  graph G to standard output, starting with message Msg. Step is the
+       --  current step in the elaboration order.
+ 
+       procedure Trace_Step (Step : Elaboration_Order_Step);
+       pragma Inline (Trace_Step);
+       --  Write current step Step of the elaboration order to standard output
+ 
+       procedure Trace_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Msg    : String;
+          Step   : Elaboration_Order_Step;
+          Indent : Indentation_Level);
+       pragma Inline (Trace_Vertex);
+       --  Write elaboration-related information for vertex Vertex of library
+       --  graph G to standard output, starting with message Msg. Step is the
+       --  current step in the elaboration order. Indent denotes the desired
+       --  indentation level for tracing.
+ 
+       procedure Trace_Vertices
+         (G          : Library_Graph;
+          Set        : LGV_Sets.Membership_Set;
+          Set_Msg    : String;
+          Vertex_Msg : String;
+          Step       : Elaboration_Order_Step;
+          Indent     : Indentation_Level);
+       pragma Inline (Trace_Vertices);
+       --  Write the candidate vertices of library graph G present in membership
+       --  set Set to standard output, starting with message Set_Msg. Vertex_Msg
+       --  is the message emitted prior to each vertex. Step denotes the current
+       --  step in the elaboration order. Indent denotes the desired indentation
+       --  level for tracing.
+ 
+       procedure Update_Successor
+         (G                        : Library_Graph;
+          Edge                     : Library_Graph_Edge_Id;
+          All_Elaborable_Vertices  : LGV_Sets.Membership_Set;
+          All_Waiting_Vertices     : LGV_Sets.Membership_Set;
+          Comp_Elaborable_Vertices : LGV_Sets.Membership_Set;
+          Comp_Waiting_Vertices    : LGV_Sets.Membership_Set;
+          Step                     : Elaboration_Order_Step;
+          Indent                   : Indentation_Level);
+       pragma Inline (Update_Successor);
+       --  Notify the successor of edge Edge of library graph G along with its
+       --  component that their predecessor has just been elaborated. This may
+       --  cause new vertices to become elaborable. The sets contain vertices
+       --  arranged as follows:
+       --
+       --    * All_Elaborable_Vertices - all elaborable vertices in the library
+       --      graph.
+       --
+       --    * All_Waiting_Vertices - all vertices in the library graph that are
+       --      waiting on predecessors to be elaborated.
+       --
+       --    * Comp_Elaborable_Vertices - all elaborable vertices found in the
+       --      component of Vertex.
+       --
+       --    * Comp_Waiting_Vertices - all vertices found in the component of
+       --      Vertex that are still waiting on predecessors to be elaborated.
+       --
+       --  Step is the current step in the elaboration order. Indent denotes the
+       --  desired indentation level for tracing.
+ 
+       procedure Update_Successors
+         (G                        : Library_Graph;
+          Vertex                   : Library_Graph_Vertex_Id;
+          All_Elaborable_Vertices  : LGV_Sets.Membership_Set;
+          All_Waiting_Vertices     : LGV_Sets.Membership_Set;
+          Comp_Elaborable_Vertices : LGV_Sets.Membership_Set;
+          Comp_Waiting_Vertices    : LGV_Sets.Membership_Set;
+          Step                     : Elaboration_Order_Step;
+          Indent                   : Indentation_Level);
+       pragma Inline (Update_Successors);
+       --  Notify all successors of vertex Vertex of library graph G along with
+       --  their components that their predecessor has just been elaborated.
+       --  This may cause new vertices to become elaborable. The sets contain
+       --  vertices arranged as follows:
+       --
+       --    * All_Elaborable_Vertices - all elaborable vertices in the library
+       --      graph.
+       --
+       --    * All_Waiting_Vertices - all vertices in the library graph that are
+       --      waiting on predecessors to be elaborated.
+       --
+       --    * Comp_Elaborable_Vertices - all elaborable vertices found in the
+       --      component of Vertex.
+       --
+       --    * Comp_Waiting_Vertices - all vertices found in the component of
+       --      Vertex that are still waiting on predecessors to be elaborated.
+       --
+       --  Step is the current step in the elaboration order. Indent denotes the
+       --  desired indentation level for tracing.
+ 
+       ----------------------------------
+       -- Create_Component_Vertex_Sets --
+       ----------------------------------
+ 
+       procedure Create_Component_Vertex_Sets
+         (G                   : Library_Graph;
+          Comp                : Component_Id;
+          Elaborable_Vertices : out LGV_Sets.Membership_Set;
+          Waiting_Vertices    : out LGV_Sets.Membership_Set;
+          Step                : Elaboration_Order_Step)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          Num_Of_Vertices : constant Natural :=
+                              Number_Of_Component_Vertices (G, Comp);
+ 
+          Iter   : Component_Vertex_Iterator;
+          Vertex : Library_Graph_Vertex_Id;
+ 
+       begin
+          Elaborable_Vertices := LGV_Sets.Create (Num_Of_Vertices);
+          Waiting_Vertices    := LGV_Sets.Create (Num_Of_Vertices);
+ 
+          Iter := Iterate_Component_Vertices (G, Comp);
+          while Has_Next (Iter) loop
+             Next (Iter, Vertex);
+ 
+             --  Add the vertex to the proper set depending on whether it can be
+             --  elaborated.
+ 
+             if Is_Elaborable_Vertex (G, Vertex) then
+                Insert_Vertex
+                  (G      => G,
+                   Vertex => Vertex,
+                   Set    => Elaborable_Vertices,
+                   Msg    => "add elaborable component vertex",
+                   Step   => Step,
+                   Indent => No_Indentation);
+ 
+             else
+                Insert_Vertex
+                  (G      => G,
+                   Vertex => Vertex,
+                   Set    => Waiting_Vertices,
+                   Msg    => "add waiting component vertex",
+                   Step   => Step,
+                   Indent => No_Indentation);
+             end if;
+          end loop;
+       end Create_Component_Vertex_Sets;
+ 
+       ------------------------
+       -- Create_Vertex_Sets --
+       ------------------------
+ 
+       procedure Create_Vertex_Sets
+         (G                   : Library_Graph;
+          Elaborable_Vertices : out LGV_Sets.Membership_Set;
+          Waiting_Vertices    : out LGV_Sets.Membership_Set;
+          Step                : Elaboration_Order_Step)
+       is
+          pragma Assert (Present (G));
+ 
+          Num_Of_Vertices : constant Natural := Number_Of_Vertices (G);
+ 
+          Iter   : Library_Graphs.All_Vertex_Iterator;
+          Vertex : Library_Graph_Vertex_Id;
+ 
+       begin
+          Elaborable_Vertices := LGV_Sets.Create (Num_Of_Vertices);
+          Waiting_Vertices    := LGV_Sets.Create (Num_Of_Vertices);
+ 
+          Iter := Iterate_All_Vertices (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Vertex);
+ 
+             --  Add the vertex to the proper set depending on whether it can be
+             --  elaborated.
+ 
+             if Is_Elaborable_Vertex (G, Vertex) then
+                Insert_Vertex
+                  (G      => G,
+                   Vertex => Vertex,
+                   Set    => Elaborable_Vertices,
+                   Msg    => "add elaborable vertex",
+                   Step   => Step,
+                   Indent => No_Indentation);
+ 
+             else
+                Insert_Vertex
+                  (G      => G,
+                   Vertex => Vertex,
+                   Set    => Waiting_Vertices,
+                   Msg    => "add waiting vertex",
+                   Step   => Step,
+                   Indent => No_Indentation);
+             end if;
+          end loop;
+       end Create_Vertex_Sets;
+ 
+       -------------------------
+       -- Elaborate_Component --
+       -------------------------
+ 
+       procedure Elaborate_Component
+         (G                       : Library_Graph;
+          Comp                    : Component_Id;
+          All_Elaborable_Vertices : LGV_Sets.Membership_Set;
+          All_Waiting_Vertices    : LGV_Sets.Membership_Set;
+          Order                   : in out Unit_Id_Table;
+          Step                    : Elaboration_Order_Step)
+       is
+          Comp_Elaborable_Vertices : LGV_Sets.Membership_Set;
+          Comp_Waiting_Vertices    : LGV_Sets.Membership_Set;
+          Vertex                   : Library_Graph_Vertex_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+          pragma Assert (LGV_Sets.Present (All_Elaborable_Vertices));
+          pragma Assert (LGV_Sets.Present (All_Waiting_Vertices));
+ 
+          Trace_Component
+            (G    => G,
+             Comp => Comp,
+             Msg  => "elaborating component",
+             Step => Step);
+ 
+          --  Divide all vertices of the component into an elaborable and
+          --  waiting vertex set.
+ 
+          Create_Component_Vertex_Sets
+            (G                   => G,
+             Comp                => Comp,
+             Elaborable_Vertices => Comp_Elaborable_Vertices,
+             Waiting_Vertices    => Comp_Waiting_Vertices,
+             Step                => Step);
+ 
+          loop
+             Trace_Vertices
+               (G          => G,
+                Set        => Comp_Elaborable_Vertices,
+                Set_Msg    => "elaborable component vertices",
+                Vertex_Msg => "elaborable component vertex",
+                Step       => Step,
+                Indent     => Nested_Indentation);
+ 
+             Trace_Vertices
+               (G          => G,
+                Set        => Comp_Waiting_Vertices,
+                Set_Msg    => "waiting component vertices",
+                Vertex_Msg => "waiting component vertex",
+                Step       => Step,
+                Indent     => Nested_Indentation);
+ 
+             Vertex :=
+               Find_Best_Elaborable_Vertex
+                 (G      => G,
+                  Set    => Comp_Elaborable_Vertices,
+                  Step   => Step,
+                  Indent => Nested_Indentation);
+ 
+             --  The component lacks an elaborable vertex. This indicates that
+             --  either all vertices of the component have been elaborated or
+             --  the graph has a circularity. Locate the best weak vertex that
+             --  was compiled with the dynamic model to elaborate from the set
+             --  waiting vertices. This action assumes that certain invocations
+             --  will not take place at elaboration time. An order produced in
+             --  this fashion may fail an ABE check at run time.
+ 
+             if not Present (Vertex) then
+                Vertex :=
+                  Find_Best_Weakly_Elaborable_Vertex
+                    (G      => G,
+                     Set    => Comp_Waiting_Vertices,
+                     Step   => Step,
+                     Indent => Nested_Indentation);
+             end if;
+ 
+             --  Stop the elaboration when either all vertices of the component
+             --  have been elaborated, or the graph contains a circularity.
+ 
+             exit when not Present (Vertex);
+ 
+             --  Try to elaborate as many vertices within the component as
+             --  possible. Each successful elaboration signals the appropriate
+             --  successors and components that they have one less predecessor
+             --  to wait on.
+ 
+             Elaborate_Vertex
+               (G                        => G,
+                Vertex                   => Vertex,
+                All_Elaborable_Vertices  => All_Elaborable_Vertices,
+                All_Waiting_Vertices     => All_Waiting_Vertices,
+                Comp_Elaborable_Vertices => Comp_Elaborable_Vertices,
+                Comp_Waiting_Vertices    => Comp_Waiting_Vertices,
+                Order                    => Order,
+                Step                     => Step,
+                Indent                   => Nested_Indentation);
+          end loop;
+ 
+          LGV_Sets.Destroy (Comp_Elaborable_Vertices);
+          LGV_Sets.Destroy (Comp_Waiting_Vertices);
+       end Elaborate_Component;
+ 
+       -----------------------------
+       -- Elaborate_Library_Graph --
+       -----------------------------
+ 
+       procedure Elaborate_Library_Graph
+         (G      : Library_Graph;
+          Order  : out Unit_Id_Table;
+          Status : out Elaboration_Order_Status)
+       is
+          Elaborable_Vertices : LGV_Sets.Membership_Set;
+          Step                : Elaboration_Order_Step;
+          Vertex              : Library_Graph_Vertex_Id;
+          Waiting_Vertices    : LGV_Sets.Membership_Set;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          Step := Initial_Step;
+ 
+          --  Divide all vertices of the library graph into an elaborable and
+          --  waiting vertex set.
+ 
+          Create_Vertex_Sets
+            (G                   => G,
+             Elaborable_Vertices => Elaborable_Vertices,
+             Waiting_Vertices    => Waiting_Vertices,
+             Step                => Step);
+ 
+          loop
+             Step := Step + 1;
+ 
+             Trace_Vertices
+               (G          => G,
+                Set        => Elaborable_Vertices,
+                Set_Msg    => "elaborable vertices",
+                Vertex_Msg => "elaborable vertex",
+                Step       => Step,
+                Indent     => No_Indentation);
+ 
+             Trace_Vertices
+               (G          => G,
+                Set        => Waiting_Vertices,
+                Set_Msg    => "waiting vertices",
+                Vertex_Msg => "waiting vertex",
+                Step       => Step,
+                Indent     => No_Indentation);
+ 
+             Vertex :=
+               Find_Best_Elaborable_Vertex
+                 (G      => G,
+                  Set    => Elaborable_Vertices,
+                  Step   => Step,
+                  Indent => No_Indentation);
+ 
+             --  The graph lacks an elaborable vertex. This indicates that
+             --  either all vertices have been elaborated or the graph has a
+             --  circularity. Find the best weak vertex that was compiled with
+             --  the dynamic model to elaborate from set of waiting vertices.
+             --  This action assumes that certain invocations will not take
+             --  place at elaboration time. An order produced in this fashion
+             --  may fail an ABE check at run time.
+ 
+             if not Present (Vertex) then
+                Vertex :=
+                  Find_Best_Weakly_Elaborable_Vertex
+                    (G      => G,
+                     Set    => Waiting_Vertices,
+                     Step   => Step,
+                     Indent => No_Indentation);
+             end if;
+ 
+             --  Stop the elaboration when either all vertices of the graph have
+             --  been elaborated, or the graph contains a circularity.
+ 
+             exit when not Present (Vertex);
+ 
+             --  Elaborate the component of the vertex by trying to elaborate as
+             --  many vertices within the component as possible. Each successful
+             --  elaboration signals the appropriate successors and components
+             --  that they have one less predecessor to wait on.
+ 
+             Elaborate_Component
+               (G                       => G,
+                Comp                    => Component (G, Vertex),
+                All_Elaborable_Vertices => Elaborable_Vertices,
+                All_Waiting_Vertices    => Waiting_Vertices,
+                Order                   => Order,
+                Step                    => Step);
+          end loop;
+ 
+          --  The graph contains an Elaborate_All circularity when at least one
+          --  edge subject to the related pragma appears in a component.
+ 
+          if Has_Elaborate_All_Cycle (G) then
+             Status := Order_Has_Elaborate_All_Circularity;
+ 
+          --  The graph contains a circularity when at least one vertex failed
+          --  to elaborate.
+ 
+          elsif LGV_Sets.Size (Waiting_Vertices) /= 0 then
+             Status := Order_Has_Circularity;
+ 
+          --  Otherwise the elaboration order is satisfactory
+ 
+          else
+             Status := Order_OK;
+          end if;
+ 
+          LGV_Sets.Destroy (Elaborable_Vertices);
+          LGV_Sets.Destroy (Waiting_Vertices);
+       end Elaborate_Library_Graph;
+ 
+       ---------------------
+       -- Elaborate_Units --
+       ---------------------
+ 
+       procedure Elaborate_Units
+         (Order         : out Unit_Id_Table;
+          Main_Lib_File : File_Name_Type)
+       is
+          pragma Unreferenced (Main_Lib_File);
+ 
+          Inv_Graph : Invocation_Graph;
+          Lib_Graph : Library_Graph;
+          Status    : Elaboration_Order_Status;
+ 
+       begin
+          Start_Phase (Unit_Elaboration);
+ 
+          --  Initialize all unit-related data structures and gather all units
+          --  that need elaboration.
+ 
+          Initialize_Units;
+          Collect_Elaborable_Units;
+ 
+          --  Create the library graph that captures the dependencies between
+          --  library items.
+ 
+          Lib_Graph := Build_Library_Graph;
+ 
+          --  Create the invocation graph that represents the flow of execution
+ 
+          Inv_Graph := Build_Invocation_Graph (Lib_Graph);
+ 
+          --  Traverse the invocation graph starting from elaboration code in
+          --  order to discover transitions of the execution flow from a unit
+          --  to a unit that result in extra edges within the library graph.
+ 
+          Augment_Library_Graph (Inv_Graph, Lib_Graph);
+ 
+          --  Create the component graph by collapsing all library items into
+          --  library units and traversing the library graph.
+ 
+          Find_Components (Lib_Graph);
+ 
+          --  Output the contents of the ALI tables and both graphs to standard
+          --  output now that they have been fully decorated.
+ 
+          Write_ALI_Tables;
+          Write_Invocation_Graph (Inv_Graph);
+          Write_Library_Graph    (Lib_Graph);
+ 
+          --  Traverse the library graph to determine the elaboration order of
+          --  units.
+ 
+          Elaborate_Library_Graph (Lib_Graph, Order, Status);
+ 
+          --  The elaboration order is satisfactory
+ 
+          if Status = Order_OK then
+             Validate_Elaboration_Order (Order);
+ 
+             --  Set attribute Elab_Position of table ALI.Units for all units in
+             --  the elaboration order.
+ 
+             Set_Unit_Elaboration_Positions (Order);
+ 
+             --  Output the dependencies among units when switch -e (output
+             --  complete list of elaboration order dependencies) is active.
+ 
+             Write_Dependencies (Lib_Graph);
+ 
+             --  Output the elaboration order when switch -l (output chosen
+             --  elaboration order) is in effect.
+ 
+             Write_Elaboration_Order (Order);
+ 
+             --  Output the sources referenced in the closure of the order when
+             --  switch -R (list sources referenced in closure) is in effect.
+ 
+             Write_Unit_Closure (Order);
+ 
+          --  Otherwise the library graph contains at least one circularity
+ 
+          else
+             Diagnose_Circularities (Inv_Graph, Lib_Graph);
+          end if;
+ 
+          Destroy (Inv_Graph);
+          Destroy (Lib_Graph);
+ 
+          --  Destroy all unit-related data structures
+ 
+          Finalize_Units;
+          End_Phase (Unit_Elaboration);
+ 
+          --  Halt the bind when there is no satisfactory elaboration order
+ 
+          if Status /= Order_OK then
+             raise Unrecoverable_Error;
+          end if;
+       end Elaborate_Units;
+ 
+       ----------------------
+       -- Elaborate_Vertex --
+       ----------------------
+ 
+       procedure Elaborate_Vertex
+         (G                        : Library_Graph;
+          Vertex                   : Library_Graph_Vertex_Id;
+          All_Elaborable_Vertices  : LGV_Sets.Membership_Set;
+          All_Waiting_Vertices     : LGV_Sets.Membership_Set;
+          Comp_Elaborable_Vertices : LGV_Sets.Membership_Set;
+          Comp_Waiting_Vertices    : LGV_Sets.Membership_Set;
+          Order                    : in out Unit_Id_Table;
+          Step                     : Elaboration_Order_Step;
+          Indent                   : Indentation_Level)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+          pragma Assert (Needs_Elaboration (G, Vertex));
+          pragma Assert (LGV_Sets.Present (All_Elaborable_Vertices));
+          pragma Assert (LGV_Sets.Present (All_Waiting_Vertices));
+          pragma Assert (LGV_Sets.Present (Comp_Elaborable_Vertices));
+          pragma Assert (LGV_Sets.Present (Comp_Waiting_Vertices));
+ 
+          Trace_Vertex
+            (G      => G,
+             Vertex => Vertex,
+             Msg    => "elaborating vertex",
+             Step   => Step,
+             Indent => Indent);
+ 
+          --  Remove the vertex from both elaborable sets. This is needed when
+          --  the vertex is both an overall best candidate among all vertices,
+          --  and the best candidate within the component.
+ 
+          LGV_Sets.Delete (All_Elaborable_Vertices,  Vertex);
+          LGV_Sets.Delete (Comp_Elaborable_Vertices, Vertex);
+ 
+          --  Remove the vertex from both waiting sets. This is needed when a
+          --  weakly elaborable vertex is both an overall best candidate among
+          --  all waiting vertices and the best waiting candidate within the
+          --  component.
+ 
+          LGV_Sets.Delete (All_Waiting_Vertices,  Vertex);
+          LGV_Sets.Delete (Comp_Waiting_Vertices, Vertex);
+ 
+          --  Mark the vertex as elaborated in order to prevent further attempts
+          --  to re-elaborate it.
+ 
+          Set_In_Elaboration_Order (G, Vertex);
+ 
+          --  Add the unit represented by the vertex to the elaboration order
+ 
+          Unit_Id_Tables.Append (Order, Unit (G, Vertex));
+ 
+          --  Notify all successors and their components that they have one
+          --  fewer predecessor to wait on. This may cause some successors to
+          --  be included in one of the sets.
+ 
+          Update_Successors
+            (G                        => G,
+             Vertex                   => Vertex,
+             All_Elaborable_Vertices  => All_Elaborable_Vertices,
+             All_Waiting_Vertices     => All_Waiting_Vertices,
+             Comp_Elaborable_Vertices => Comp_Elaborable_Vertices,
+             Comp_Waiting_Vertices    => Comp_Waiting_Vertices,
+             Step                     => Step,
+             Indent                   => Indent + Nested_Indentation);
+ 
+          --  Elaborate an eligible completing body immediately after its spec.
+          --  This action satisfies the semantics of pragma Elaborate_Body. In
+          --  addition, it ensures that a body will not "drift" too far from its
+          --  spec in case invocation edges are removed from the library graph.
+ 
+          if Has_Elaborable_Body (G, Vertex) then
+             Elaborate_Vertex
+               (G                        => G,
+                Vertex                   => Proper_Body (G, Vertex),
+                All_Elaborable_Vertices  => All_Elaborable_Vertices,
+                All_Waiting_Vertices     => All_Waiting_Vertices,
+                Comp_Elaborable_Vertices => Comp_Elaborable_Vertices,
+                Comp_Waiting_Vertices    => Comp_Waiting_Vertices,
+                Order                    => Order,
+                Step                     => Step,
+                Indent                   => Indent);
+          end if;
+       end Elaborate_Vertex;
+ 
+       ---------------------------------
+       -- Find_Best_Elaborable_Vertex --
+       ---------------------------------
+ 
+       function Find_Best_Elaborable_Vertex
+         (G      : Library_Graph;
+          Set    : LGV_Sets.Membership_Set;
+          Step   : Elaboration_Order_Step;
+          Indent : Indentation_Level) return Library_Graph_Vertex_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (LGV_Sets.Present (Set));
+ 
+          return
+            Find_Best_Vertex
+              (G                   => G,
+               Set                 => Set,
+               Is_Suitable_Vertex  =>
+                 Is_Suitable_Elaborable_Vertex'Access,
+               Compare_Vertices    =>
+                 Is_Better_Elaborable_Vertex'Access,
+               Initial_Best_Msg    => "initial best elaborable vertex",
+               Subsequent_Best_Msg => "better elaborable vertex",
+               Step                => Step,
+               Indent              => Indent);
+       end Find_Best_Elaborable_Vertex;
+ 
+       ----------------------
+       -- Find_Best_Vertex --
+       ----------------------
+ 
+       function Find_Best_Vertex
+         (G                   : Library_Graph;
+          Set                 : LGV_Sets.Membership_Set;
+          Is_Suitable_Vertex  : LGV_Predicate_Ptr;
+          Compare_Vertices    : LGV_Comparator_Ptr;
+          Initial_Best_Msg    : String;
+          Subsequent_Best_Msg : String;
+          Step                : Elaboration_Order_Step;
+          Indent              : Indentation_Level)
+          return Library_Graph_Vertex_Id
+       is
+          Best_Vertex    : Library_Graph_Vertex_Id;
+          Current_Vertex : Library_Graph_Vertex_Id;
+          Iter           : LGV_Sets.Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (LGV_Sets.Present (Set));
+          pragma Assert (Is_Suitable_Vertex /= null);
+          pragma Assert (Compare_Vertices /= null);
+ 
+          --  Assume that there is no candidate
+ 
+          Best_Vertex := No_Library_Graph_Vertex;
+ 
+          --  Inspect all vertices in the set, looking for the best candidate
+          --  according to the comparator.
+ 
+          Iter := LGV_Sets.Iterate (Set);
+          while LGV_Sets.Has_Next (Iter) loop
+             LGV_Sets.Next (Iter, Current_Vertex);
+             pragma Assert (Needs_Elaboration (G, Current_Vertex));
+ 
+             if Is_Suitable_Vertex.all (G, Current_Vertex) then
+ 
+                --  A previous iteration already picked the best candidate.
+                --  Update the best candidate when the current vertex is a
+                --  better choice.
+ 
+                if Present (Best_Vertex) then
+                   if Compare_Vertices.all
+                        (G           => G,
+                         Vertex      => Current_Vertex,
+                         Compared_To => Best_Vertex) = Higher_Precedence
+                   then
+                      Best_Vertex := Current_Vertex;
+ 
+                      Trace_Vertex
+                        (G      => G,
+                         Vertex => Best_Vertex,
+                         Msg    => Subsequent_Best_Msg,
+                         Step   => Step,
+                         Indent => Indent);
+                   end if;
+ 
+                --  Otherwise this is the first candidate
+ 
+                else
+                   Best_Vertex := Current_Vertex;
+ 
+                   Trace_Vertex
+                     (G      => G,
+                      Vertex => Best_Vertex,
+                      Msg    => Initial_Best_Msg,
+                      Step   => Step,
+                      Indent => Indent);
+                end if;
+             end if;
+          end loop;
+ 
+          return Best_Vertex;
+       end Find_Best_Vertex;
+ 
+       ----------------------------------------
+       -- Find_Best_Weakly_Elaborable_Vertex --
+       ----------------------------------------
+ 
+       function Find_Best_Weakly_Elaborable_Vertex
+         (G      : Library_Graph;
+          Set    : LGV_Sets.Membership_Set;
+          Step   : Elaboration_Order_Step;
+          Indent : Indentation_Level) return Library_Graph_Vertex_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (LGV_Sets.Present (Set));
+ 
+          return
+            Find_Best_Vertex
+              (G                   => G,
+               Set                 => Set,
+               Is_Suitable_Vertex  =>
+                 Is_Suitable_Weakly_Elaborable_Vertex'Access,
+               Compare_Vertices    =>
+                 Is_Better_Weakly_Elaborable_Vertex'Access,
+               Initial_Best_Msg    => "initial best weakly elaborable vertex",
+               Subsequent_Best_Msg => "better weakly elaborable vertex",
+               Step                => Step,
+               Indent              => Indent);
+       end Find_Best_Weakly_Elaborable_Vertex;
+ 
+       -------------------------
+       -- Has_Elaborable_Body --
+       -------------------------
+ 
+       function Has_Elaborable_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          --  The body of an already-elaborated spec subject to Elaborate_Body
+          --  is always elaborable.
+ 
+          if Is_Spec_With_Elaborate_Body (G, Vertex) then
+             return True;
+ 
+          elsif Is_Spec_With_Body (G, Vertex) then
+             return Is_Elaborable_Vertex (G, Proper_Body (G, Vertex));
+          end if;
+ 
+          return False;
+       end Has_Elaborable_Body;
+ 
+       ---------------------------------
+       -- Insert_Elaborable_Successor --
+       ---------------------------------
+ 
+       procedure Insert_Elaborable_Successor
+         (G                     : Library_Graph;
+          Vertex                : Library_Graph_Vertex_Id;
+          Elaborable_Vertices   : LGV_Sets.Membership_Set;
+          All_Waiting_Vertices  : LGV_Sets.Membership_Set;
+          Comp_Waiting_Vertices : LGV_Sets.Membership_Set;
+          Msg                   : String;
+          Step                  : Elaboration_Order_Step;
+          Indent                : Indentation_Level)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+          pragma Assert (LGV_Sets.Present (Elaborable_Vertices));
+          pragma Assert (LGV_Sets.Present (All_Waiting_Vertices));
+          pragma Assert (LGV_Sets.Present (Comp_Waiting_Vertices));
+ 
+          Complement : constant Library_Graph_Vertex_Id :=
+                         Complementary_Vertex
+                           (G                => G,
+                            Vertex           => Vertex,
+                            Force_Complement => False);
+ 
+       begin
+          --  Remove the successor from both waiting vertex sets because it may
+          --  be the best vertex to elaborate across the whole graph and within
+          --  its component.
+ 
+          LGV_Sets.Delete (All_Waiting_Vertices,  Vertex);
+          LGV_Sets.Delete (Comp_Waiting_Vertices, Vertex);
+ 
+          Insert_Vertex
+            (G      => G,
+             Vertex => Vertex,
+             Set    => Elaborable_Vertices,
+             Msg    => Msg,
+             Step   => Step,
+             Indent => Indent);
+ 
+          if Present (Complement) then
+ 
+             --  Remove the complement of the successor from both waiting vertex
+             --  sets because it may be the best vertex to elaborate across the
+             --  whole graph and within its component.
+ 
+             LGV_Sets.Delete (All_Waiting_Vertices,  Complement);
+             LGV_Sets.Delete (Comp_Waiting_Vertices, Complement);
+ 
+             Insert_Vertex
+               (G      => G,
+                Vertex => Complement,
+                Set    => Elaborable_Vertices,
+                Msg    => Msg,
+                Step   => Step,
+                Indent => Indent);
+          end if;
+       end Insert_Elaborable_Successor;
+ 
+       -------------------
+       -- Insert_Vertex --
+       -------------------
+ 
+       procedure Insert_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Set    : LGV_Sets.Membership_Set;
+          Msg    : String;
+          Step   : Elaboration_Order_Step;
+          Indent : Indentation_Level)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+          pragma Assert (Needs_Elaboration (G, Vertex));
+          pragma Assert (LGV_Sets.Present (Set));
+ 
+          --  Nothing to do when the vertex is already present in the set
+ 
+          if LGV_Sets.Contains (Set, Vertex) then
+             return;
+          end if;
+ 
+          Trace_Vertex
+            (G      => G,
+             Vertex => Vertex,
+             Msg    => Msg,
+             Step   => Step,
+             Indent => Indent);
+ 
+          --  Add the vertex to the set
+ 
+          LGV_Sets.Insert (Set, Vertex);
+       end Insert_Vertex;
+ 
+       ---------------------------------
+       -- Is_Better_Elaborable_Vertex --
+       ---------------------------------
+ 
+       function Is_Better_Elaborable_Vertex
+         (G           : Library_Graph;
+          Vertex      : Library_Graph_Vertex_Id;
+          Compared_To : Library_Graph_Vertex_Id) return Precedence_Kind
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+          pragma Assert (Present (Compared_To));
+ 
+          --  Prefer a spec with Elaborate_Body over its corresponding body
+ 
+          if Is_Elaborate_Body_Pair
+               (G           => G,
+                Spec_Vertex => Vertex,
+                Body_Vertex => Compared_To)
+          then
+             return Higher_Precedence;
+ 
+          elsif Is_Elaborate_Body_Pair
+                  (G           => G,
+                   Spec_Vertex => Compared_To,
+                   Body_Vertex => Vertex)
+          then
+             return Lower_Precedence;
+ 
+          --  Prefer a predefined unit over a non-predefined unit
+ 
+          elsif Is_Predefined_Unit (G, Vertex)
+            and then not Is_Predefined_Unit (G, Compared_To)
+          then
+             return Higher_Precedence;
+ 
+          elsif not Is_Predefined_Unit (G, Vertex)
+            and then Is_Predefined_Unit (G, Compared_To)
+          then
+             return Lower_Precedence;
+ 
+          --  Prefer an internal unit over a non-internal unit
+ 
+          elsif Is_Internal_Unit (G, Vertex)
+            and then not Is_Internal_Unit (G, Compared_To)
+          then
+             return Higher_Precedence;
+ 
+          elsif not Is_Internal_Unit (G, Vertex)
+            and then Is_Internal_Unit (G, Compared_To)
+          then
+             return Lower_Precedence;
+ 
+          --  Prefer a preelaborated unit over a non-preelaborated unit
+ 
+          elsif Is_Preelaborated_Unit (G, Vertex)
+            and then not Is_Preelaborated_Unit (G, Compared_To)
+          then
+             return Higher_Precedence;
+ 
+          elsif not Is_Preelaborated_Unit (G, Vertex)
+            and then Is_Preelaborated_Unit (G, Compared_To)
+          then
+             return Lower_Precedence;
+ 
+          --  Otherwise default to lexicographical order to ensure deterministic
+          --  behavior.
+ 
+          elsif Uname_Less (Name (G, Vertex), Name (G, Compared_To)) then
+             return Higher_Precedence;
+ 
+          else
+             return Lower_Precedence;
+          end if;
+       end Is_Better_Elaborable_Vertex;
+ 
+       ----------------------------------------
+       -- Is_Better_Weakly_Elaborable_Vertex --
+       ----------------------------------------
+ 
+       function Is_Better_Weakly_Elaborable_Vertex
+         (G           : Library_Graph;
+          Vertex      : Library_Graph_Vertex_Id;
+          Compared_To : Library_Graph_Vertex_Id) return Precedence_Kind
+       is
+          Comp_Strong_Preds   : Natural;
+          Comp_Weak_Preds     : Natural;
+          Vertex_Strong_Preds : Natural;
+          Vertex_Weak_Preds   : Natural;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+          pragma Assert (Present (Compared_To));
+ 
+          --  Obtain the number of pending predecessors for both candidates,
+          --  taking into account Elaborate_Body pairs.
+ 
+          Pending_Predecessors_For_Elaboration
+            (G            => G,
+             Vertex       => Vertex,
+             Strong_Preds => Vertex_Strong_Preds,
+             Weak_Preds   => Vertex_Weak_Preds);
+ 
+          Pending_Predecessors_For_Elaboration
+            (G            => G,
+             Vertex       => Compared_To,
+             Strong_Preds => Comp_Strong_Preds,
+             Weak_Preds   => Comp_Weak_Preds);
+ 
+          --  Neither candidate should be waiting on strong predecessors,
+          --  otherwise the candidate cannot be weakly elaborated.
+ 
+          pragma Assert (Vertex_Strong_Preds = 0);
+          pragma Assert (Comp_Strong_Preds   = 0);
+ 
+          --  Prefer a unit with fewer weak predecessors over a unit with more
+          --  weak predecessors.
+ 
+          if Vertex_Weak_Preds < Comp_Weak_Preds then
+             return Higher_Precedence;
+ 
+          elsif Vertex_Weak_Preds > Comp_Weak_Preds then
+             return Lower_Precedence;
+ 
+          --  Otherwise default to lexicographical order to ensure deterministic
+          --  behavior.
+ 
+          elsif Uname_Less (Name (G, Vertex), Name (G, Compared_To)) then
+             return Higher_Precedence;
+ 
+          else
+             return Lower_Precedence;
+          end if;
+       end Is_Better_Weakly_Elaborable_Vertex;
+ 
+       -----------------------------------
+       -- Is_Suitable_Elaborable_Vertex --
+       -----------------------------------
+ 
+       function Is_Suitable_Elaborable_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          --  A vertex is suitable for elaboration as long it is not waiting on
+          --  any predecessors, ignoring the static or dynamic model.
+ 
+          return Is_Elaborable_Vertex (G, Vertex);
+       end Is_Suitable_Elaborable_Vertex;
+ 
+       ------------------------------------------
+       -- Is_Suitable_Weakly_Elaborable_Vertex --
+       ------------------------------------------
+ 
+       function Is_Suitable_Weakly_Elaborable_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          --  A vertex is suitable for weak elaboration when it is waiting on
+          --  weak predecessors only, and the unit it represents was compiled
+          --  using the dynamic model.
+ 
+          return
+            Is_Dynamically_Elaborated (G, Vertex)
+              and then Is_Weakly_Elaborable_Vertex (G, Vertex);
+       end Is_Suitable_Weakly_Elaborable_Vertex;
+ 
+       ------------------------------------
+       -- Set_Unit_Elaboration_Positions --
+       ------------------------------------
+ 
+       procedure Set_Unit_Elaboration_Positions (Order : Unit_Id_Table) is
+          U_Id : Unit_Id;
+ 
+       begin
+          for Position in Unit_Id_Tables.First ..
+                          Unit_Id_Tables.Last (Order)
+          loop
+             U_Id := Order.Table (Position);
+ 
+             ALI.Units.Table (U_Id).Elab_Position := Position;
+          end loop;
+       end Set_Unit_Elaboration_Positions;
+ 
+       ---------------------
+       -- Trace_Component --
+       ---------------------
+ 
+       procedure Trace_Component
+         (G    : Library_Graph;
+          Comp : Component_Id;
+          Msg  : String;
+          Step : Elaboration_Order_Step)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          --  Nothing to do when switch -d_T (output elaboration order and cycle
+          --  detection trace information) is not in effect.
+ 
+          if not Debug_Flag_Underscore_TT then
+             return;
+          end if;
+ 
+          Trace_Step (Step);
+          Write_Str  (Msg);
+          Write_Str  (" (Comp_Id_");
+          Write_Int  (Int (Comp));
+          Write_Str  (")");
+          Write_Eol;
+ 
+          Trace_Step (Step);
+          Indent_By  (Nested_Indentation);
+          Write_Str  ("pending strong predecessors: ");
+          Write_Num  (Int (Pending_Strong_Predecessors (G, Comp)));
+          Write_Eol;
+ 
+          Trace_Step (Step);
+          Indent_By  (Nested_Indentation);
+          Write_Str  ("pending weak predecessors  : ");
+          Write_Num  (Int (Pending_Weak_Predecessors (G, Comp)));
+          Write_Eol;
+       end Trace_Component;
+ 
+       ----------------
+       -- Trace_Step --
+       ----------------
+ 
+       procedure Trace_Step (Step : Elaboration_Order_Step) is
+       begin
+          --  Nothing to do when switch -d_T (output elaboration order and cycle
+          --  detection trace information) is not in effect.
+ 
+          if not Debug_Flag_Underscore_TT then
+             return;
+          end if;
+ 
+          Write_Num
+            (Val        => Int (Step),
+             Val_Indent => Step_Column);
+          Write_Str (": ");
+       end Trace_Step;
+ 
+       ------------------
+       -- Trace_Vertex --
+       ------------------
+ 
+       procedure Trace_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Msg    : String;
+          Step   : Elaboration_Order_Step;
+          Indent : Indentation_Level)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          Attr_Indent : constant Indentation_Level :=
+                          Indent + Nested_Indentation;
+          Comp        : constant Component_Id := Component (G, Vertex);
+ 
+       begin
+          --  Nothing to do when switch -d_T (output elaboration order and cycle
+          --  detection trace information) is not in effect.
+ 
+          if not Debug_Flag_Underscore_TT then
+             return;
+          end if;
+ 
+          Trace_Step (Step);
+          Indent_By  (Indent);
+          Write_Str  (Msg);
+          Write_Str  (" (LGV_Id_");
+          Write_Int  (Int (Vertex));
+          Write_Str  (")");
+          Write_Eol;
+ 
+          Trace_Step (Step);
+          Indent_By  (Attr_Indent);
+          Write_Str  ("name = ");
+          Write_Name (Name (G, Vertex));
+          Write_Eol;
+ 
+          Trace_Step (Step);
+          Indent_By  (Attr_Indent);
+          Write_Str  ("Component (Comp_Id_");
+          Write_Int  (Int (Comp));
+          Write_Str  (")");
+          Write_Eol;
+ 
+          Trace_Step (Step);
+          Indent_By  (Attr_Indent);
+          Write_Str  ("pending strong predecessors: ");
+          Write_Num  (Int (Pending_Strong_Predecessors (G, Vertex)));
+          Write_Eol;
+ 
+          Trace_Step (Step);
+          Indent_By  (Attr_Indent);
+          Write_Str  ("pending weak predecessors  : ");
+          Write_Num  (Int (Pending_Weak_Predecessors (G, Vertex)));
+          Write_Eol;
+ 
+          Trace_Step (Step);
+          Indent_By  (Attr_Indent);
+          Write_Str  ("pending strong components  : ");
+          Write_Num  (Int (Pending_Strong_Predecessors (G, Comp)));
+          Write_Eol;
+ 
+          Trace_Step (Step);
+          Indent_By  (Attr_Indent);
+          Write_Str  ("pending weak components    : ");
+          Write_Num  (Int (Pending_Weak_Predecessors (G, Comp)));
+          Write_Eol;
+       end Trace_Vertex;
+ 
+       --------------------
+       -- Trace_Vertices --
+       --------------------
+ 
+       procedure Trace_Vertices
+         (G          : Library_Graph;
+          Set        : LGV_Sets.Membership_Set;
+          Set_Msg    : String;
+          Vertex_Msg : String;
+          Step       : Elaboration_Order_Step;
+          Indent     : Indentation_Level)
+       is
+          Vertex_Indent : constant Indentation_Level :=
+                            Indent + Nested_Indentation;
+ 
+          Iter   : LGV_Sets.Iterator;
+          Vertex : Library_Graph_Vertex_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (LGV_Sets.Present (Set));
+ 
+          --  Nothing to do when switch -d_T (output elaboration order and cycle
+          --  detection trace information) is not in effect.
+ 
+          if not Debug_Flag_Underscore_TT then
+             return;
+          end if;
+ 
+          Trace_Step (Step);
+          Indent_By  (Indent);
+          Write_Str  (Set_Msg);
+          Write_Str  (": ");
+          Write_Int  (Int (LGV_Sets.Size (Set)));
+          Write_Eol;
+ 
+          Iter := LGV_Sets.Iterate (Set);
+          while LGV_Sets.Has_Next (Iter) loop
+             LGV_Sets.Next (Iter, Vertex);
+ 
+             Trace_Vertex
+               (G      => G,
+                Vertex => Vertex,
+                Msg    => Vertex_Msg,
+                Step   => Step,
+                Indent => Vertex_Indent);
+          end loop;
+       end Trace_Vertices;
+ 
+       ----------------------
+       -- Update_Successor --
+       ----------------------
+ 
+       procedure Update_Successor
+         (G                        : Library_Graph;
+          Edge                     : Library_Graph_Edge_Id;
+          All_Elaborable_Vertices  : LGV_Sets.Membership_Set;
+          All_Waiting_Vertices     : LGV_Sets.Membership_Set;
+          Comp_Elaborable_Vertices : LGV_Sets.Membership_Set;
+          Comp_Waiting_Vertices    : LGV_Sets.Membership_Set;
+          Step                     : Elaboration_Order_Step;
+          Indent                   : Indentation_Level)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+          pragma Assert (LGV_Sets.Present (All_Elaborable_Vertices));
+          pragma Assert (LGV_Sets.Present (All_Waiting_Vertices));
+          pragma Assert (LGV_Sets.Present (Comp_Elaborable_Vertices));
+          pragma Assert (LGV_Sets.Present (Comp_Waiting_Vertices));
+ 
+          Pred : constant Library_Graph_Vertex_Id := Predecessor (G, Edge);
+          Succ : constant Library_Graph_Vertex_Id := Successor   (G, Edge);
+ 
+          pragma Assert (Needs_Elaboration (G, Pred));
+          pragma Assert (Needs_Elaboration (G, Succ));
+ 
+          In_Different_Components : constant Boolean :=
+                                      not In_Same_Component
+                                            (G     => G,
+                                             Left  => Pred,
+                                             Right => Succ);
+ 
+          Succ_Comp     : constant Component_Id      := Component (G, Succ);
+          Vertex_Indent : constant Indentation_Level :=
+                            Indent + Nested_Indentation;
+ 
+          Iter   : Component_Vertex_Iterator;
+          Vertex : Library_Graph_Vertex_Id;
+ 
+       begin
+          Trace_Vertex
+            (G      => G,
+             Vertex => Succ,
+             Msg    => "updating successor",
+             Step   => Step,
+             Indent => Indent);
+ 
+          --  Notify the successor that it has one less predecessor to wait on.
+          --  This effectively eliminates the edge that links the two.
+ 
+          Decrement_Pending_Predecessors
+            (G      => G,
+             Vertex => Succ,
+             Edge   => Edge);
+ 
+          --  The predecessor and successor reside in different components.
+          --  Notify the successor component it has one fewer components to
+          --  wait on.
+ 
+          if In_Different_Components then
+             Decrement_Pending_Predecessors
+               (G    => G,
+                Comp => Succ_Comp,
+                Edge => Edge);
+          end if;
+ 
+          --  At this point the successor may become elaborable when its final
+          --  predecessor or final predecessor component has been elaborated.
+ 
+          if Is_Elaborable_Vertex (G, Succ) then
+ 
+             --  The predecessor and successor reside in different components.
+             --  The successor must not be added to the candidates of Pred's
+             --  component because this will mix units from the two components.
+             --  Instead, the successor is added to the set of all elaborable
+             --  vertices.
+ 
+             if In_Different_Components then
+                Insert_Elaborable_Successor
+                  (G                     => G,
+                   Vertex                => Succ,
+                   Elaborable_Vertices   => All_Elaborable_Vertices,
+                   All_Waiting_Vertices  => All_Waiting_Vertices,
+                   Comp_Waiting_Vertices => Comp_Waiting_Vertices,
+                   Msg                   => "add elaborable successor",
+                   Step                  => Step,
+                   Indent                => Vertex_Indent);
+ 
+             --  Otherwise the predecessor and successor reside within the same
+             --  component. Pred's component gains another elaborable vertex.
+ 
+             else
+                Insert_Elaborable_Successor
+                  (G                     => G,
+                   Vertex                => Succ,
+                   Elaborable_Vertices   => Comp_Elaborable_Vertices,
+                   All_Waiting_Vertices  => All_Waiting_Vertices,
+                   Comp_Waiting_Vertices => Comp_Waiting_Vertices,
+                   Msg                   =>
+                     "add elaborable component successor",
+                   Step                  => Step,
+                   Indent                => Vertex_Indent);
+             end if;
+          end if;
+ 
+          --  At this point the successor component may become elaborable when
+          --  its final predecessor component is elaborated. This in turn may
+          --  allow vertices of the successor component to be elaborated.
+ 
+          if In_Different_Components
+            and then Is_Elaborable_Component (G, Succ_Comp)
+          then
+             Iter := Iterate_Component_Vertices (G, Succ_Comp);
+             while Has_Next (Iter) loop
+                Next (Iter, Vertex);
+ 
+                if Is_Elaborable_Vertex (G, Vertex) then
+                   Insert_Elaborable_Successor
+                     (G                     => G,
+                      Vertex                => Vertex,
+                      Elaborable_Vertices   => All_Elaborable_Vertices,
+                      All_Waiting_Vertices  => All_Waiting_Vertices,
+                      Comp_Waiting_Vertices => Comp_Waiting_Vertices,
+                      Msg                   => "add elaborable vertex",
+                      Step                  => Step,
+                      Indent                => Vertex_Indent);
+                end if;
+             end loop;
+          end if;
+       end Update_Successor;
+ 
+       -----------------------
+       -- Update_Successors --
+       -----------------------
+ 
+       procedure Update_Successors
+         (G                        : Library_Graph;
+          Vertex                   : Library_Graph_Vertex_Id;
+          All_Elaborable_Vertices  : LGV_Sets.Membership_Set;
+          All_Waiting_Vertices     : LGV_Sets.Membership_Set;
+          Comp_Elaborable_Vertices : LGV_Sets.Membership_Set;
+          Comp_Waiting_Vertices    : LGV_Sets.Membership_Set;
+          Step                     : Elaboration_Order_Step;
+          Indent                   : Indentation_Level)
+       is
+          Edge : Library_Graph_Edge_Id;
+          Iter : Edges_To_Successors_Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+          pragma Assert (Needs_Elaboration (G, Vertex));
+          pragma Assert (LGV_Sets.Present (All_Elaborable_Vertices));
+          pragma Assert (LGV_Sets.Present (All_Waiting_Vertices));
+          pragma Assert (LGV_Sets.Present (Comp_Elaborable_Vertices));
+          pragma Assert (LGV_Sets.Present (Comp_Waiting_Vertices));
+ 
+          Iter := Iterate_Edges_To_Successors (G, Vertex);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+             pragma Assert (Predecessor (G, Edge) = Vertex);
+ 
+             Update_Successor
+               (G                        => G,
+                Edge                     => Edge,
+                All_Elaborable_Vertices  => All_Elaborable_Vertices,
+                All_Waiting_Vertices     => All_Waiting_Vertices,
+                Comp_Elaborable_Vertices => Comp_Elaborable_Vertices,
+                Comp_Waiting_Vertices    => Comp_Waiting_Vertices,
+                Step                     => Step,
+                Indent                   => Indent);
+          end loop;
+       end Update_Successors;
+    end Invocation_And_Library_Graph_Elaborators;
+ 
+ end Bindo.Elaborators;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-elaborators.ads gcc-10.1.0/gcc/ada/bindo-elaborators.ads
*** gcc-9.3.0/gcc/ada/bindo-elaborators.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-elaborators.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,55 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                     B I N D O . E L A B O R A T O R S                    --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  For full architecture, see unit Bindo.
+ 
+ --  The following unit contains facilities to find the elaboration order of
+ --  units based on various graphs.
+ 
+ with Bindo.Graphs;
+ use  Bindo.Graphs;
+ use  Bindo.Graphs.Invocation_Graphs;
+ use  Bindo.Graphs.Library_Graphs;
+ 
+ package Bindo.Elaborators is
+ 
+    ----------------------------------------------
+    -- Invocation_And_Library_Graph_Elaborators --
+    ----------------------------------------------
+ 
+    package Invocation_And_Library_Graph_Elaborators is
+       procedure Elaborate_Units
+         (Order         : out Unit_Id_Table;
+          Main_Lib_File : File_Name_Type);
+       --  Find an order of all units in the bind that need to be elaborated
+       --  such that elaboration code flow, pragmas Elaborate, Elaborate_All,
+       --  and Elaborate_Body, and with clause dependencies are all honoured.
+       --  Main_Lib_File is the argument of the bind. If a satisfactory order
+       --  exists, it is returned in Order, otherwise Unrecoverable_Error is
+       --  raised.
+ 
+    end Invocation_And_Library_Graph_Elaborators;
+ 
+ end Bindo.Elaborators;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-graphs.adb gcc-10.1.0/gcc/ada/bindo-graphs.adb
*** gcc-9.3.0/gcc/ada/bindo-graphs.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-graphs.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,5714 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                         B I N D O . G R A P H S                          --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Ada.Unchecked_Deallocation;
+ 
+ with Butil;  use Butil;
+ with Debug;  use Debug;
+ with Output; use Output;
+ 
+ with Bindo.Writers;
+ use  Bindo.Writers;
+ use  Bindo.Writers.Phase_Writers;
+ 
+ package body Bindo.Graphs is
+ 
+    -----------------------
+    -- Local subprograms --
+    -----------------------
+ 
+    function Sequence_Next_Cycle return Library_Graph_Cycle_Id;
+    pragma Inline (Sequence_Next_Cycle);
+    --  Generate a new unique library graph cycle handle
+ 
+    function Sequence_Next_Edge return Invocation_Graph_Edge_Id;
+    pragma Inline (Sequence_Next_Edge);
+    --  Generate a new unique invocation graph edge handle
+ 
+    function Sequence_Next_Edge return Library_Graph_Edge_Id;
+    pragma Inline (Sequence_Next_Edge);
+    --  Generate a new unique library graph edge handle
+ 
+    function Sequence_Next_Vertex return Invocation_Graph_Vertex_Id;
+    pragma Inline (Sequence_Next_Vertex);
+    --  Generate a new unique invocation graph vertex handle
+ 
+    function Sequence_Next_Vertex return Library_Graph_Vertex_Id;
+    pragma Inline (Sequence_Next_Vertex);
+    --  Generate a new unique library graph vertex handle
+ 
+    -----------------------------------
+    -- Destroy_Invocation_Graph_Edge --
+    -----------------------------------
+ 
+    procedure Destroy_Invocation_Graph_Edge
+      (Edge : in out Invocation_Graph_Edge_Id)
+    is
+       pragma Unreferenced (Edge);
+    begin
+       null;
+    end Destroy_Invocation_Graph_Edge;
+ 
+    ---------------------------------
+    -- Destroy_Library_Graph_Cycle --
+    ---------------------------------
+ 
+    procedure Destroy_Library_Graph_Cycle
+      (Cycle : in out Library_Graph_Cycle_Id)
+    is
+       pragma Unreferenced (Cycle);
+    begin
+       null;
+    end Destroy_Library_Graph_Cycle;
+ 
+    --------------------------------
+    -- Destroy_Library_Graph_Edge --
+    --------------------------------
+ 
+    procedure Destroy_Library_Graph_Edge
+      (Edge : in out Library_Graph_Edge_Id)
+    is
+       pragma Unreferenced (Edge);
+    begin
+       null;
+    end Destroy_Library_Graph_Edge;
+ 
+    ----------------------------------
+    -- Destroy_Library_Graph_Vertex --
+    ----------------------------------
+ 
+    procedure Destroy_Library_Graph_Vertex
+      (Vertex : in out Library_Graph_Vertex_Id)
+    is
+       pragma Unreferenced (Vertex);
+    begin
+       null;
+    end Destroy_Library_Graph_Vertex;
+ 
+    --------------------------------
+    -- Hash_Invocation_Graph_Edge --
+    --------------------------------
+ 
+    function Hash_Invocation_Graph_Edge
+      (Edge : Invocation_Graph_Edge_Id) return Bucket_Range_Type
+    is
+    begin
+       pragma Assert (Present (Edge));
+ 
+       return Bucket_Range_Type (Edge);
+    end Hash_Invocation_Graph_Edge;
+ 
+    ----------------------------------
+    -- Hash_Invocation_Graph_Vertex --
+    ----------------------------------
+ 
+    function Hash_Invocation_Graph_Vertex
+      (Vertex : Invocation_Graph_Vertex_Id) return Bucket_Range_Type
+    is
+    begin
+       pragma Assert (Present (Vertex));
+ 
+       return Bucket_Range_Type (Vertex);
+    end Hash_Invocation_Graph_Vertex;
+ 
+    ------------------------------
+    -- Hash_Library_Graph_Cycle --
+    ------------------------------
+ 
+    function Hash_Library_Graph_Cycle
+      (Cycle : Library_Graph_Cycle_Id) return Bucket_Range_Type
+    is
+    begin
+       pragma Assert (Present (Cycle));
+ 
+       return Bucket_Range_Type (Cycle);
+    end Hash_Library_Graph_Cycle;
+ 
+    -----------------------------
+    -- Hash_Library_Graph_Edge --
+    -----------------------------
+ 
+    function Hash_Library_Graph_Edge
+      (Edge : Library_Graph_Edge_Id) return Bucket_Range_Type
+    is
+    begin
+       pragma Assert (Present (Edge));
+ 
+       return Bucket_Range_Type (Edge);
+    end Hash_Library_Graph_Edge;
+ 
+    -------------------------------
+    -- Hash_Library_Graph_Vertex --
+    -------------------------------
+ 
+    function Hash_Library_Graph_Vertex
+      (Vertex : Library_Graph_Vertex_Id) return Bucket_Range_Type
+    is
+    begin
+       pragma Assert (Present (Vertex));
+ 
+       return Bucket_Range_Type (Vertex);
+    end Hash_Library_Graph_Vertex;
+ 
+    -----------------------
+    -- Invocation_Graphs --
+    -----------------------
+ 
+    package body Invocation_Graphs is
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Free is
+         new Ada.Unchecked_Deallocation
+               (Invocation_Graph_Attributes, Invocation_Graph);
+ 
+       function Get_IGE_Attributes
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id)
+          return Invocation_Graph_Edge_Attributes;
+       pragma Inline (Get_IGE_Attributes);
+       --  Obtain the attributes of edge Edge of invocation graph G
+ 
+       function Get_IGV_Attributes
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id)
+          return Invocation_Graph_Vertex_Attributes;
+       pragma Inline (Get_IGV_Attributes);
+       --  Obtain the attributes of vertex Vertex of invocation graph G
+ 
+       procedure Increment_Invocation_Graph_Edge_Count
+         (G    : Invocation_Graph;
+          Kind : Invocation_Kind);
+       pragma Inline (Increment_Invocation_Graph_Edge_Count);
+       --  Increment the number of edges of king Kind in invocation graph G by
+       --  one.
+ 
+       function Is_Elaboration_Root
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Elaboration_Root);
+       --  Determine whether vertex Vertex of invocation graph denotes the
+       --  elaboration procedure of a spec or a body.
+ 
+       function Is_Existing_Source_Target_Relation
+         (G   : Invocation_Graph;
+          Rel : Source_Target_Relation) return Boolean;
+       pragma Inline (Is_Existing_Source_Target_Relation);
+       --  Determine whether a source vertex and a target vertex described by
+       --  relation Rel are already related in invocation graph G.
+ 
+       procedure Save_Elaboration_Root
+         (G    : Invocation_Graph;
+          Root : Invocation_Graph_Vertex_Id);
+       pragma Inline (Save_Elaboration_Root);
+       --  Save elaboration root Root of invocation graph G
+ 
+       procedure Set_Corresponding_Vertex
+         (G      : Invocation_Graph;
+          IS_Id  : Invocation_Signature_Id;
+          Vertex : Invocation_Graph_Vertex_Id);
+       pragma Inline (Set_Corresponding_Vertex);
+       --  Associate vertex Vertex of invocation graph G with signature IS_Id
+ 
+       procedure Set_Is_Existing_Source_Target_Relation
+         (G   : Invocation_Graph;
+          Rel : Source_Target_Relation;
+          Val : Boolean := True);
+       pragma Inline (Set_Is_Existing_Source_Target_Relation);
+       --  Mark a source vertex and a target vertex described by relation Rel as
+       --  already related in invocation graph G depending on value Val.
+ 
+       procedure Set_IGE_Attributes
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id;
+          Val  : Invocation_Graph_Edge_Attributes);
+       pragma Inline (Set_IGE_Attributes);
+       --  Set the attributes of edge Edge of invocation graph G to value Val
+ 
+       procedure Set_IGV_Attributes
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id;
+          Val    : Invocation_Graph_Vertex_Attributes);
+       pragma Inline (Set_IGV_Attributes);
+       --  Set the attributes of vertex Vertex of invocation graph G to value
+       --  Val.
+ 
+       --------------
+       -- Add_Edge --
+       --------------
+ 
+       procedure Add_Edge
+         (G      : Invocation_Graph;
+          Source : Invocation_Graph_Vertex_Id;
+          Target : Invocation_Graph_Vertex_Id;
+          IR_Id  : Invocation_Relation_Id)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Source));
+          pragma Assert (Present (Target));
+          pragma Assert (Present (IR_Id));
+ 
+          Rel : constant Source_Target_Relation :=
+                  (Source => Source,
+                   Target => Target);
+ 
+          Edge : Invocation_Graph_Edge_Id;
+ 
+       begin
+          --  Nothing to do when the source and target are already related by an
+          --  edge.
+ 
+          if Is_Existing_Source_Target_Relation (G, Rel) then
+             return;
+          end if;
+ 
+          Edge := Sequence_Next_Edge;
+ 
+          --  Add the edge to the underlying graph
+ 
+          DG.Add_Edge
+            (G           => G.Graph,
+             E           => Edge,
+             Source      => Source,
+             Destination => Target);
+ 
+          --  Build and save the attributes of the edge
+ 
+          Set_IGE_Attributes
+            (G    => G,
+             Edge => Edge,
+             Val  => (Relation => IR_Id));
+ 
+          --  Mark the source and target as related by the new edge. This
+          --  prevents all further attempts to link the same source and target.
+ 
+          Set_Is_Existing_Source_Target_Relation (G, Rel);
+ 
+          --  Update the edge statistics
+ 
+          Increment_Invocation_Graph_Edge_Count (G, Kind (IR_Id));
+       end Add_Edge;
+ 
+       ----------------
+       -- Add_Vertex --
+       ----------------
+ 
+       procedure Add_Vertex
+         (G           : Invocation_Graph;
+          IC_Id       : Invocation_Construct_Id;
+          Body_Vertex : Library_Graph_Vertex_Id;
+          Spec_Vertex : Library_Graph_Vertex_Id)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (IC_Id));
+          pragma Assert (Present (Body_Vertex));
+          pragma Assert (Present (Spec_Vertex));
+ 
+          Construct_Signature : constant Invocation_Signature_Id :=
+                                  Signature (IC_Id);
+          Vertex : Invocation_Graph_Vertex_Id;
+ 
+       begin
+          --  Nothing to do when the construct already has a vertex
+ 
+          if Present (Corresponding_Vertex (G, Construct_Signature)) then
+             return;
+          end if;
+ 
+          Vertex := Sequence_Next_Vertex;
+ 
+          --  Add the vertex to the underlying graph
+ 
+          DG.Add_Vertex (G.Graph, Vertex);
+ 
+          --  Build and save the attributes of the vertex
+ 
+          Set_IGV_Attributes
+            (G      => G,
+             Vertex => Vertex,
+             Val    => (Body_Vertex => Body_Vertex,
+                        Construct   => IC_Id,
+                        Spec_Vertex => Spec_Vertex));
+ 
+          --  Associate the construct with its corresponding vertex
+ 
+          Set_Corresponding_Vertex (G, Construct_Signature, Vertex);
+ 
+          --  Save the vertex for later processing when it denotes a spec or
+          --  body elaboration procedure.
+ 
+          if Is_Elaboration_Root (G, Vertex) then
+             Save_Elaboration_Root (G, Vertex);
+          end if;
+       end Add_Vertex;
+ 
+       -----------------
+       -- Body_Vertex --
+       -----------------
+ 
+       function Body_Vertex
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Library_Graph_Vertex_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Get_IGV_Attributes (G, Vertex).Body_Vertex;
+       end Body_Vertex;
+ 
+       ------------
+       -- Column --
+       ------------
+ 
+       function Column
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Nat
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Column (Signature (Construct (G, Vertex)));
+       end Column;
+ 
+       ---------------
+       -- Construct --
+       ---------------
+ 
+       function Construct
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Invocation_Construct_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Get_IGV_Attributes (G, Vertex).Construct;
+       end Construct;
+ 
+       --------------------------
+       -- Corresponding_Vertex --
+       --------------------------
+ 
+       function Corresponding_Vertex
+         (G     : Invocation_Graph;
+          IS_Id : Invocation_Signature_Id) return Invocation_Graph_Vertex_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (IS_Id));
+ 
+          return Signature_Tables.Get (G.Signature_To_Vertex, IS_Id);
+       end Corresponding_Vertex;
+ 
+       ------------
+       -- Create --
+       ------------
+ 
+       function Create
+         (Initial_Vertices : Positive;
+          Initial_Edges    : Positive) return Invocation_Graph
+       is
+          G : constant Invocation_Graph := new Invocation_Graph_Attributes;
+ 
+       begin
+          G.Edge_Attributes     := IGE_Tables.Create       (Initial_Edges);
+          G.Graph               :=
+            DG.Create
+              (Initial_Vertices => Initial_Vertices,
+               Initial_Edges    => Initial_Edges);
+          G.Relations           := Relation_Sets.Create    (Initial_Edges);
+          G.Roots               := IGV_Sets.Create         (Initial_Vertices);
+          G.Signature_To_Vertex := Signature_Tables.Create (Initial_Vertices);
+          G.Vertex_Attributes   := IGV_Tables.Create       (Initial_Vertices);
+ 
+          return G;
+       end Create;
+ 
+       -------------
+       -- Destroy --
+       -------------
+ 
+       procedure Destroy (G : in out Invocation_Graph) is
+       begin
+          pragma Assert (Present (G));
+ 
+          IGE_Tables.Destroy       (G.Edge_Attributes);
+          DG.Destroy               (G.Graph);
+          Relation_Sets.Destroy    (G.Relations);
+          IGV_Sets.Destroy         (G.Roots);
+          Signature_Tables.Destroy (G.Signature_To_Vertex);
+          IGV_Tables.Destroy       (G.Vertex_Attributes);
+ 
+          Free (G);
+       end Destroy;
+ 
+       -----------------------------------
+       -- Destroy_Invocation_Graph_Edge --
+       -----------------------------------
+ 
+       procedure Destroy_Invocation_Graph_Edge
+         (Edge : in out Invocation_Graph_Edge_Id)
+       is
+          pragma Unreferenced (Edge);
+       begin
+          null;
+       end Destroy_Invocation_Graph_Edge;
+ 
+       ----------------------------------------------
+       -- Destroy_Invocation_Graph_Edge_Attributes --
+       ----------------------------------------------
+ 
+       procedure Destroy_Invocation_Graph_Edge_Attributes
+         (Attrs : in out Invocation_Graph_Edge_Attributes)
+       is
+          pragma Unreferenced (Attrs);
+       begin
+          null;
+       end Destroy_Invocation_Graph_Edge_Attributes;
+ 
+       -------------------------------------
+       -- Destroy_Invocation_Graph_Vertex --
+       -------------------------------------
+ 
+       procedure Destroy_Invocation_Graph_Vertex
+         (Vertex : in out Invocation_Graph_Vertex_Id)
+       is
+          pragma Unreferenced (Vertex);
+       begin
+          null;
+       end Destroy_Invocation_Graph_Vertex;
+ 
+       ------------------------------------------------
+       -- Destroy_Invocation_Graph_Vertex_Attributes --
+       ------------------------------------------------
+ 
+       procedure Destroy_Invocation_Graph_Vertex_Attributes
+         (Attrs : in out Invocation_Graph_Vertex_Attributes)
+       is
+          pragma Unreferenced (Attrs);
+       begin
+          null;
+       end Destroy_Invocation_Graph_Vertex_Attributes;
+ 
+       -----------
+       -- Extra --
+       -----------
+ 
+       function Extra
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id) return Name_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return Extra (Relation (G, Edge));
+       end Extra;
+ 
+       ------------------------
+       -- Get_IGE_Attributes --
+       ------------------------
+ 
+       function Get_IGE_Attributes
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id)
+          return Invocation_Graph_Edge_Attributes
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return IGE_Tables.Get (G.Edge_Attributes, Edge);
+       end Get_IGE_Attributes;
+ 
+       ------------------------
+       -- Get_IGV_Attributes --
+       ------------------------
+ 
+       function Get_IGV_Attributes
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id)
+          return Invocation_Graph_Vertex_Attributes
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return IGV_Tables.Get (G.Vertex_Attributes, Vertex);
+       end Get_IGV_Attributes;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : All_Edge_Iterator) return Boolean is
+       begin
+          return DG.Has_Next (DG.All_Edge_Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : All_Vertex_Iterator) return Boolean is
+       begin
+          return DG.Has_Next (DG.All_Vertex_Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : Edges_To_Targets_Iterator) return Boolean is
+       begin
+          return DG.Has_Next (DG.Outgoing_Edge_Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : Elaboration_Root_Iterator) return Boolean is
+       begin
+          return IGV_Sets.Has_Next (IGV_Sets.Iterator (Iter));
+       end Has_Next;
+ 
+       -------------------------------
+       -- Hash_Invocation_Signature --
+       -------------------------------
+ 
+       function Hash_Invocation_Signature
+         (IS_Id : Invocation_Signature_Id) return Bucket_Range_Type
+       is
+       begin
+          pragma Assert (Present (IS_Id));
+ 
+          return Bucket_Range_Type (IS_Id);
+       end Hash_Invocation_Signature;
+ 
+       ---------------------------------
+       -- Hash_Source_Target_Relation --
+       ---------------------------------
+ 
+       function Hash_Source_Target_Relation
+         (Rel : Source_Target_Relation) return Bucket_Range_Type
+       is
+       begin
+          pragma Assert (Present (Rel.Source));
+          pragma Assert (Present (Rel.Target));
+ 
+          return
+            Hash_Two_Keys
+              (Bucket_Range_Type (Rel.Source),
+               Bucket_Range_Type (Rel.Target));
+       end Hash_Source_Target_Relation;
+ 
+       -------------------------------------------
+       -- Increment_Invocation_Graph_Edge_Count --
+       -------------------------------------------
+ 
+       procedure Increment_Invocation_Graph_Edge_Count
+         (G    : Invocation_Graph;
+          Kind : Invocation_Kind)
+       is
+          pragma Assert (Present (G));
+ 
+          Count : Natural renames G.Counts (Kind);
+ 
+       begin
+          Count := Count + 1;
+       end Increment_Invocation_Graph_Edge_Count;
+ 
+       ---------------------------------
+       -- Invocation_Graph_Edge_Count --
+       ---------------------------------
+ 
+       function Invocation_Graph_Edge_Count
+         (G    : Invocation_Graph;
+          Kind : Invocation_Kind) return Natural
+       is
+       begin
+          pragma Assert (Present (G));
+ 
+          return G.Counts (Kind);
+       end Invocation_Graph_Edge_Count;
+ 
+       -------------------------
+       -- Is_Elaboration_Root --
+       -------------------------
+ 
+       function Is_Elaboration_Root
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Boolean
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          Vertex_Kind : constant Invocation_Construct_Kind :=
+                          Kind (Construct (G, Vertex));
+ 
+       begin
+          return
+            Vertex_Kind = Elaborate_Body_Procedure
+              or else
+            Vertex_Kind = Elaborate_Spec_Procedure;
+       end Is_Elaboration_Root;
+ 
+       ----------------------------------------
+       -- Is_Existing_Source_Target_Relation --
+       ----------------------------------------
+ 
+       function Is_Existing_Source_Target_Relation
+         (G   : Invocation_Graph;
+          Rel : Source_Target_Relation) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+ 
+          return Relation_Sets.Contains (G.Relations, Rel);
+       end Is_Existing_Source_Target_Relation;
+ 
+       -----------------------
+       -- Iterate_All_Edges --
+       -----------------------
+ 
+       function Iterate_All_Edges
+         (G : Invocation_Graph) return All_Edge_Iterator
+       is
+       begin
+          pragma Assert (Present (G));
+ 
+          return All_Edge_Iterator (DG.Iterate_All_Edges (G.Graph));
+       end Iterate_All_Edges;
+ 
+       --------------------------
+       -- Iterate_All_Vertices --
+       --------------------------
+ 
+       function Iterate_All_Vertices
+         (G : Invocation_Graph) return All_Vertex_Iterator
+       is
+       begin
+          pragma Assert (Present (G));
+ 
+          return All_Vertex_Iterator (DG.Iterate_All_Vertices (G.Graph));
+       end Iterate_All_Vertices;
+ 
+       ------------------------------
+       -- Iterate_Edges_To_Targets --
+       ------------------------------
+ 
+       function Iterate_Edges_To_Targets
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Edges_To_Targets_Iterator
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return
+            Edges_To_Targets_Iterator
+              (DG.Iterate_Outgoing_Edges (G.Graph, Vertex));
+       end Iterate_Edges_To_Targets;
+ 
+       -------------------------------
+       -- Iterate_Elaboration_Roots --
+       -------------------------------
+ 
+       function Iterate_Elaboration_Roots
+         (G : Invocation_Graph) return Elaboration_Root_Iterator
+       is
+       begin
+          pragma Assert (Present (G));
+ 
+          return Elaboration_Root_Iterator (IGV_Sets.Iterate (G.Roots));
+       end Iterate_Elaboration_Roots;
+ 
+       ----------
+       -- Kind --
+       ----------
+ 
+       function Kind
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id) return Invocation_Kind
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return Kind (Relation (G, Edge));
+       end Kind;
+ 
+       ----------
+       -- Line --
+       ----------
+ 
+       function Line
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Nat
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Line (Signature (Construct (G, Vertex)));
+       end Line;
+ 
+       ----------
+       -- Name --
+       ----------
+ 
+       function Name
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Name_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Name (Signature (Construct (G, Vertex)));
+       end Name;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter : in out All_Edge_Iterator;
+          Edge : out Invocation_Graph_Edge_Id)
+       is
+       begin
+          DG.Next (DG.All_Edge_Iterator (Iter), Edge);
+       end Next;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter   : in out All_Vertex_Iterator;
+          Vertex : out Invocation_Graph_Vertex_Id)
+       is
+       begin
+          DG.Next (DG.All_Vertex_Iterator (Iter), Vertex);
+       end Next;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter : in out Edges_To_Targets_Iterator;
+          Edge : out Invocation_Graph_Edge_Id)
+       is
+       begin
+          DG.Next (DG.Outgoing_Edge_Iterator (Iter), Edge);
+       end Next;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter : in out Elaboration_Root_Iterator;
+          Root : out Invocation_Graph_Vertex_Id)
+       is
+       begin
+          IGV_Sets.Next (IGV_Sets.Iterator (Iter), Root);
+       end Next;
+ 
+       ---------------------
+       -- Number_Of_Edges --
+       ---------------------
+ 
+       function Number_Of_Edges (G : Invocation_Graph) return Natural is
+       begin
+          pragma Assert (Present (G));
+ 
+          return DG.Number_Of_Edges (G.Graph);
+       end Number_Of_Edges;
+ 
+       --------------------------------
+       -- Number_Of_Edges_To_Targets --
+       --------------------------------
+ 
+       function Number_Of_Edges_To_Targets
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Natural
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return DG.Number_Of_Outgoing_Edges (G.Graph, Vertex);
+       end Number_Of_Edges_To_Targets;
+ 
+       ---------------------------------
+       -- Number_Of_Elaboration_Roots --
+       ---------------------------------
+ 
+       function Number_Of_Elaboration_Roots
+         (G : Invocation_Graph) return Natural
+       is
+       begin
+          pragma Assert (Present (G));
+ 
+          return IGV_Sets.Size (G.Roots);
+       end Number_Of_Elaboration_Roots;
+ 
+       ------------------------
+       -- Number_Of_Vertices --
+       ------------------------
+ 
+       function Number_Of_Vertices (G : Invocation_Graph) return Natural is
+       begin
+          pragma Assert (Present (G));
+ 
+          return DG.Number_Of_Vertices (G.Graph);
+       end Number_Of_Vertices;
+ 
+       -------------
+       -- Present --
+       -------------
+ 
+       function Present (G : Invocation_Graph) return Boolean is
+       begin
+          return G /= Nil;
+       end Present;
+ 
+       --------------
+       -- Relation --
+       --------------
+ 
+       function Relation
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id) return Invocation_Relation_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return Get_IGE_Attributes (G, Edge).Relation;
+       end Relation;
+ 
+       ---------------------------
+       -- Save_Elaboration_Root --
+       ---------------------------
+ 
+       procedure Save_Elaboration_Root
+         (G    : Invocation_Graph;
+          Root : Invocation_Graph_Vertex_Id)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Root));
+ 
+          IGV_Sets.Insert (G.Roots, Root);
+       end Save_Elaboration_Root;
+ 
+       ------------------------------
+       -- Set_Corresponding_Vertex --
+       ------------------------------
+ 
+       procedure Set_Corresponding_Vertex
+         (G      : Invocation_Graph;
+          IS_Id  : Invocation_Signature_Id;
+          Vertex : Invocation_Graph_Vertex_Id)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (IS_Id));
+          pragma Assert (Present (Vertex));
+ 
+          Signature_Tables.Put (G.Signature_To_Vertex, IS_Id, Vertex);
+       end Set_Corresponding_Vertex;
+ 
+       --------------------------------------------
+       -- Set_Is_Existing_Source_Target_Relation --
+       --------------------------------------------
+ 
+       procedure Set_Is_Existing_Source_Target_Relation
+         (G   : Invocation_Graph;
+          Rel : Source_Target_Relation;
+          Val : Boolean := True)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Rel.Source));
+          pragma Assert (Present (Rel.Target));
+ 
+          if Val then
+             Relation_Sets.Insert (G.Relations, Rel);
+          else
+             Relation_Sets.Delete (G.Relations, Rel);
+          end if;
+       end Set_Is_Existing_Source_Target_Relation;
+ 
+       ------------------------
+       -- Set_IGE_Attributes --
+       ------------------------
+ 
+       procedure Set_IGE_Attributes
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id;
+          Val  : Invocation_Graph_Edge_Attributes)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          IGE_Tables.Put (G.Edge_Attributes, Edge, Val);
+       end Set_IGE_Attributes;
+ 
+       ------------------------
+       -- Set_IGV_Attributes --
+       ------------------------
+ 
+       procedure Set_IGV_Attributes
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id;
+          Val    : Invocation_Graph_Vertex_Attributes)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          IGV_Tables.Put (G.Vertex_Attributes, Vertex, Val);
+       end Set_IGV_Attributes;
+ 
+       -----------------
+       -- Spec_Vertex --
+       -----------------
+ 
+       function Spec_Vertex
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Library_Graph_Vertex_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Get_IGV_Attributes (G, Vertex).Spec_Vertex;
+       end Spec_Vertex;
+ 
+       ------------
+       -- Target --
+       ------------
+ 
+       function Target
+         (G      : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id) return Invocation_Graph_Vertex_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return DG.Destination_Vertex (G.Graph, Edge);
+       end Target;
+    end Invocation_Graphs;
+ 
+    --------------------
+    -- Library_Graphs --
+    --------------------
+ 
+    package body Library_Graphs is
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Add_Body_Before_Spec_Edge
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Edges  : LGE_Lists.Doubly_Linked_List);
+       pragma Inline (Add_Body_Before_Spec_Edge);
+       --  Create a new edge in library graph G between vertex Vertex and its
+       --  corresponding spec or body, where the body is a predecessor and the
+       --  spec a successor. Add the edge to list Edges.
+ 
+       procedure Add_Body_Before_Spec_Edges
+         (G     : Library_Graph;
+          Edges : LGE_Lists.Doubly_Linked_List);
+       pragma Inline (Add_Body_Before_Spec_Edges);
+       --  Create new edges in library graph G for all vertices and their
+       --  corresponding specs or bodies, where the body is a predecessor
+       --  and the spec is a successor. Add all edges to list Edges.
+ 
+       function Add_Edge_With_Return
+         (G              : Library_Graph;
+          Pred           : Library_Graph_Vertex_Id;
+          Succ           : Library_Graph_Vertex_Id;
+          Kind           : Library_Graph_Edge_Kind;
+          Activates_Task : Boolean) return Library_Graph_Edge_Id;
+       pragma Inline (Add_Edge_With_Return);
+       --  Create a new edge in library graph G with source vertex Pred and
+       --  destination vertex Succ, and return its handle. Kind denotes the
+       --  nature of the edge. Activates_Task should be set when the edge
+       --  involves a task activation. If Pred and Succ are already related,
+       --  no edge is created and No_Library_Graph_Edge is returned.
+ 
+       function At_Least_One_Edge_Satisfies
+         (G         : Library_Graph;
+          Cycle     : Library_Graph_Cycle_Id;
+          Predicate : LGE_Predicate_Ptr) return Boolean;
+       pragma Inline (At_Least_One_Edge_Satisfies);
+       --  Determine whether at least one edge of cycle Cycle of library graph G
+       --  satisfies predicate Predicate.
+ 
+       function Copy_Cycle_Path
+         (Cycle_Path : LGE_Lists.Doubly_Linked_List)
+          return LGE_Lists.Doubly_Linked_List;
+       pragma Inline (Copy_Cycle_Path);
+       --  Create a deep copy of list Cycle_Path
+ 
+       function Cycle_End_Vertices
+         (G                    : Library_Graph;
+          Vertex               : Library_Graph_Vertex_Id;
+          Elaborate_All_Active : Boolean) return LGV_Sets.Membership_Set;
+       pragma Inline (Cycle_End_Vertices);
+       --  Part of Tarjan's enumeration of the elementary circuits of a directed
+       --  graph algorithm. Collect the vertices that terminate a cycle starting
+       --  from vertex Vertex of library graph G in a set. This is usually the
+       --  vertex itself, unless the vertex is part of an Elaborate_Body pair,
+       --  or flag Elaborate_All_Active is set. In that case the complementary
+       --  vertex is also added to the set.
+ 
+       function Cycle_Kind_Of
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Library_Graph_Cycle_Kind;
+       pragma Inline (Cycle_Kind_Of);
+       --  Determine the cycle kind of edge Edge of library graph G if the edge
+       --  participated in a circuit.
+ 
+       function Cycle_Kind_Precedence
+         (Kind        : Library_Graph_Cycle_Kind;
+          Compared_To : Library_Graph_Cycle_Kind) return Precedence_Kind;
+       pragma Inline (Cycle_Kind_Precedence);
+       --  Determine the precedence of cycle kind Kind compared to cycle kind
+       --  Compared_To.
+ 
+       function Cycle_Path_Precedence
+         (G           : Library_Graph;
+          Path        : LGE_Lists.Doubly_Linked_List;
+          Compared_To : LGE_Lists.Doubly_Linked_List) return Precedence_Kind;
+       pragma Inline (Cycle_Path_Precedence);
+       --  Determine the precedence of cycle path Path of library graph G
+       --  compared to path Compared_To.
+ 
+       function Cycle_Precedence
+         (G           : Library_Graph;
+          Cycle       : Library_Graph_Cycle_Id;
+          Compared_To : Library_Graph_Cycle_Id) return Precedence_Kind;
+       pragma Inline (Cycle_Precedence);
+       --  Determine the precedence of cycle Cycle of library graph G compared
+       --  to cycle Compared_To.
+ 
+       procedure Decrement_Library_Graph_Edge_Count
+         (G    : Library_Graph;
+          Kind : Library_Graph_Edge_Kind);
+       pragma Inline (Decrement_Library_Graph_Edge_Count);
+       --  Decrement the number of edges of kind King in library graph G by one
+ 
+       procedure Delete_Body_Before_Spec_Edges
+         (G     : Library_Graph;
+          Edges : LGE_Lists.Doubly_Linked_List);
+       pragma Inline (Delete_Body_Before_Spec_Edges);
+       --  Delete all edges in list Edges from library graph G, that link spec
+       --  and bodies, where the body acts as the predecessor and the spec as a
+       --  successor.
+ 
+       procedure Delete_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id);
+       pragma Inline (Delete_Edge);
+       --  Delete edge Edge from library graph G
+ 
+       function Edge_Precedence
+         (G           : Library_Graph;
+          Edge        : Library_Graph_Edge_Id;
+          Compared_To : Library_Graph_Edge_Id) return Precedence_Kind;
+       pragma Inline (Edge_Precedence);
+       --  Determine the precedence of edge Edge of library graph G compared to
+       --  edge Compared_To.
+ 
+       procedure Find_Cycles_From_Successor
+         (G                     : Library_Graph;
+          Edge                  : Library_Graph_Edge_Id;
+          End_Vertices          : LGV_Sets.Membership_Set;
+          Deleted_Vertices      : LGV_Sets.Membership_Set;
+          Most_Significant_Edge : Library_Graph_Edge_Id;
+          Invocation_Edge_Count : Natural;
+          Cycle_Path_Stack      : LGE_Lists.Doubly_Linked_List;
+          Visited_Set           : LGV_Sets.Membership_Set;
+          Visited_Stack         : LGV_Lists.Doubly_Linked_List;
+          Cycle_Count           : in out Natural;
+          Cycle_Limit           : Natural;
+          Elaborate_All_Active  : Boolean;
+          Has_Cycle             : out Boolean;
+          Indent                : Indentation_Level);
+       pragma Inline (Find_Cycles_From_Successor);
+       --  Part of Tarjan's enumeration of the elementary circuits of a directed
+       --  graph algorithm. Find all cycles from the successor indicated by edge
+       --  Edge of library graph G. If at least one cycle exists, set Has_Cycle
+       --  to True. The remaining parameters are as follows:
+       --
+       --    * End vertices is the set of vertices that terminate a potential
+       --      cycle.
+       --
+       --    * Deleted vertices is the set of vertices that have been expanded
+       --      during previous depth-first searches and should not be visited
+       --      for the rest of the algorithm.
+       --
+       --    * Most_Significant_Edge is the current highest-precedence edge on
+       --      the path of the potential cycle.
+       --
+       --    * Invocation_Edge_Count is the number of invocation edges on the
+       --      path of the potential cycle.
+       --
+       --    * Cycle_Path_Stack is the path of the potential cycle.
+       --
+       --    * Visited_Set is the set of vertices that have been visited during
+       --      the current depth-first search.
+       --
+       --    * Visited_Stack maintains the vertices of Visited_Set in a stack
+       --      for later unvisiting.
+       --
+       --    * Cycle_Count is the number of cycles discovered so far.
+       --
+       --    * Cycle_Limit is the upper bound of the number of cycles to be
+       --      discovered.
+       --
+       --    * Elaborate_All_Active should be set when the component currently
+       --      being examined for cycles contains an Elaborate_All edge.
+       --
+       --    * Indent in the desired indentation level for tracing.
+ 
+       procedure Find_Cycles_From_Vertex
+         (G                     : Library_Graph;
+          Vertex                : Library_Graph_Vertex_Id;
+          End_Vertices          : LGV_Sets.Membership_Set;
+          Deleted_Vertices      : LGV_Sets.Membership_Set;
+          Most_Significant_Edge : Library_Graph_Edge_Id;
+          Invocation_Edge_Count : Natural;
+          Cycle_Path_Stack      : LGE_Lists.Doubly_Linked_List;
+          Visited_Set           : LGV_Sets.Membership_Set;
+          Visited_Stack         : LGV_Lists.Doubly_Linked_List;
+          Cycle_Count           : in out Natural;
+          Cycle_Limit           : Natural;
+          Elaborate_All_Active  : Boolean;
+          Is_Start_Vertex       : Boolean;
+          Has_Cycle             : out Boolean;
+          Indent                : Indentation_Level);
+       pragma Inline (Find_Cycles_From_Vertex);
+       --  Part of Tarjan's enumeration of the elementary circuits of a directed
+       --  graph algorithm. Find all cycles from vertex Vertex of library graph
+       --  G. If at least one cycle exists, set Has_Cycle to True. The remaining
+       --  parameters are as follows:
+       --
+       --    * End_Vertices is the set of vertices that terminate a potential
+       --      cycle.
+       --
+       --    * Deleted_Vertices is the set of vertices that have been expanded
+       --      during previous depth-first searches and should not be visited
+       --      for the rest of the algorithm.
+       --
+       --    * Most_Significant_Edge is the current highest-precedence edge on
+       --      the path of the potential cycle.
+       --
+       --    * Invocation_Edge_Count is the number of invocation edges on the
+       --      path of the potential cycle.
+       --
+       --    * Cycle_Path_Stack is the path of the potential cycle.
+       --
+       --    * Visited_Set is the set of vertices that have been visited during
+       --      the current depth-first search.
+       --
+       --    * Visited_Stack maintains the vertices of Visited_Set in a stack
+       --      for later unvisiting.
+       --
+       --    * Cycle_Count is the number of cycles discovered so far.
+       --
+       --    * Cycle_Limit is the upper bound of the number of cycles to be
+       --      discovered.
+       --
+       --    * Elaborate_All_Active should be set when the component currently
+       --      being examined for cycles contains an Elaborate_All edge.
+       --
+       --    * Indent in the desired indentation level for tracing.
+ 
+       procedure Find_Cycles_In_Component
+         (G           : Library_Graph;
+          Comp        : Component_Id;
+          Cycle_Count : in out Natural;
+          Cycle_Limit : Natural);
+       pragma Inline (Find_Cycles_In_Component);
+       --  Part of Tarjan's enumeration of the elementary circuits of a directed
+       --  graph algorithm. Find all cycles in component Comp of library graph
+       --  G. The remaining parameters are as follows:
+       --
+       --    * Cycle_Count is the number of cycles discovered so far.
+       --
+       --    * Cycle_Limit is the upper bound of the number of cycles to be
+       --      discovered.
+ 
+       function Find_First_Lower_Precedence_Cycle
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Library_Graph_Cycle_Id;
+       pragma Inline (Find_First_Lower_Precedence_Cycle);
+       --  Inspect the list of cycles of library graph G and return the first
+       --  cycle whose precedence is lower than that of cycle Cycle. If there
+       --  is no such cycle, return No_Library_Graph_Cycle.
+ 
+       procedure Free is
+         new Ada.Unchecked_Deallocation
+               (Library_Graph_Attributes, Library_Graph);
+ 
+       function Get_Component_Attributes
+         (G    : Library_Graph;
+          Comp : Component_Id) return Component_Attributes;
+       pragma Inline (Get_Component_Attributes);
+       --  Obtain the attributes of component Comp of library graph G
+ 
+       function Get_LGC_Attributes
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Library_Graph_Cycle_Attributes;
+       pragma Inline (Get_LGC_Attributes);
+       --  Obtain the attributes of cycle Cycle of library graph G
+ 
+       function Get_LGE_Attributes
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id)
+          return Library_Graph_Edge_Attributes;
+       pragma Inline (Get_LGE_Attributes);
+       --  Obtain the attributes of edge Edge of library graph G
+ 
+       function Get_LGV_Attributes
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id)
+          return Library_Graph_Vertex_Attributes;
+       pragma Inline (Get_LGV_Attributes);
+       --  Obtain the attributes of vertex Edge of library graph G
+ 
+       function Has_Elaborate_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Has_Elaborate_Body);
+       --  Determine whether vertex Vertex of library graph G is subject to
+       --  pragma Elaborate_Body.
+ 
+       function Has_Elaborate_All_Edge
+         (G    : Library_Graph;
+          Comp : Component_Id) return Boolean;
+       pragma Inline (Has_Elaborate_All_Edge);
+       --  Determine whether component Comp of library graph G contains an
+       --  Elaborate_All edge that links two vertices in the same component.
+ 
+       function Has_Elaborate_All_Edge
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Has_Elaborate_All_Edge);
+       --  Determine whether vertex Vertex of library graph G contains an
+       --  Elaborate_All edge to a successor where both the vertex and the
+       --  successor reside in the same component.
+ 
+       function Highest_Precedence_Edge
+         (G     : Library_Graph;
+          Left  : Library_Graph_Edge_Id;
+          Right : Library_Graph_Edge_Id) return Library_Graph_Edge_Id;
+       pragma Inline (Highest_Precedence_Edge);
+       --  Return the edge with highest precedence among edges Left and Right of
+       --  library graph G.
+ 
+       procedure Increment_Library_Graph_Edge_Count
+         (G    : Library_Graph;
+          Kind : Library_Graph_Edge_Kind);
+       pragma Inline (Increment_Library_Graph_Edge_Count);
+       --  Increment the number of edges of king Kind in library graph G by one
+ 
+       procedure Increment_Pending_Predecessors
+         (G    : Library_Graph;
+          Comp : Component_Id;
+          Edge : Library_Graph_Edge_Id);
+       pragma Inline (Increment_Pending_Predecessors);
+       --  Increment the number of pending predecessors component Comp which was
+       --  reached via edge Edge of library graph G must wait on before it can
+       --  be elaborated by one.
+ 
+       procedure Increment_Pending_Predecessors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Edge   : Library_Graph_Edge_Id);
+       pragma Inline (Increment_Pending_Predecessors);
+       --  Increment the number of pending predecessors vertex Vertex which was
+       --  reached via edge Edge of library graph G must wait on before it can
+       --  be elaborated by one.
+ 
+       procedure Initialize_Components (G : Library_Graph);
+       pragma Inline (Initialize_Components);
+       --  Initialize on the initial call or re-initialize on subsequent calls
+       --  all components of library graph G.
+ 
+       function Is_Cycle_Initiating_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Cycle_Initiating_Edge);
+       --  Determine whether edge Edge of library graph G starts a cycle
+ 
+       function Is_Cyclic_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Cyclic_Edge);
+       --  Determine whether edge Edge of library graph G participates in a
+       --  cycle.
+ 
+       function Is_Cyclic_Elaborate_All_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Cyclic_Elaborate_All_Edge);
+       --  Determine whether edge Edge of library graph G participates in a
+       --  cycle and has a predecessor that is subject to pragma Elaborate_All.
+ 
+       function Is_Cyclic_Elaborate_Body_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Cyclic_Elaborate_Body_Edge);
+       --  Determine whether edge Edge of library graph G participates in a
+       --  cycle and has a successor that is either a spec subject to pragma
+       --  Elaborate_Body, or a body that completes such a spec.
+ 
+       function Is_Cyclic_Elaborate_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Cyclic_Elaborate_Edge);
+       --  Determine whether edge Edge of library graph G participates in a
+       --  cycle and has a predecessor that is subject to pragma Elaborate.
+ 
+       function Is_Cyclic_Forced_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Cyclic_Forced_Edge);
+       --  Determine whether edge Edge of library graph G participates in a
+       --  cycle and came from the forced-elaboration-order file.
+ 
+       function Is_Cyclic_Invocation_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Cyclic_Invocation_Edge);
+       --  Determine whether edge Edge of library graph G participates in a
+       --  cycle and came from the traversal of the invocation graph.
+ 
+       function Is_Cyclic_With_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Cyclic_With_Edge);
+       --  Determine whether edge Edge of library graph G participates in a
+       --  cycle and is the result of a with dependency between its successor
+       --  and predecessor.
+ 
+       function Is_Recorded_Edge
+         (G   : Library_Graph;
+          Rel : Predecessor_Successor_Relation) return Boolean;
+       pragma Inline (Is_Recorded_Edge);
+       --  Determine whether a predecessor vertex and a successor vertex
+       --  described by relation Rel are already linked in library graph G.
+ 
+       function Is_Static_Successor_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Static_Successor_Edge);
+       --  Determine whether the successor of invocation edge Edge represents a
+       --  unit that was compiled with the static model.
+ 
+       function Is_Vertex_With_Elaborate_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Vertex_With_Elaborate_Body);
+       --  Determine whether vertex Vertex of library graph G denotes a spec
+       --  subject to pragma Elaborate_Body or the completing body of such a
+       --  spec.
+ 
+       function Links_Vertices_In_Same_Component
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Links_Vertices_In_Same_Component);
+       --  Determine whether edge Edge of library graph G links a predecessor
+       --  and successor that reside in the same component.
+ 
+       function Maximum_Invocation_Edge_Count
+         (G     : Library_Graph;
+          Edge  : Library_Graph_Edge_Id;
+          Count : Natural) return Natural;
+       pragma Inline (Maximum_Invocation_Edge_Count);
+       --  Determine whether edge Edge of library graph G is an invocation edge,
+       --  and if it is return Count + 1, otherwise return Count.
+ 
+       procedure Normalize_Cycle_Path
+         (Cycle_Path            : LGE_Lists.Doubly_Linked_List;
+          Most_Significant_Edge : Library_Graph_Edge_Id);
+       pragma Inline (Normalize_Cycle_Path);
+       --  Normalize cycle path Path by rotating it until its starting edge is
+       --  Sig_Edge.
+ 
+       procedure Order_Cycle
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id);
+       pragma Inline (Order_Cycle);
+       --  Insert cycle Cycle in library graph G and sort it based on its
+       --  precedence relative to all recorded cycles.
+ 
+       function Path
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return LGE_Lists.Doubly_Linked_List;
+       pragma Inline (Path);
+       --  Obtain the path of edges which comprises cycle Cycle of library
+       --  graph G.
+ 
+       procedure Record_Cycle
+         (G                     : Library_Graph;
+          Most_Significant_Edge : Library_Graph_Edge_Id;
+          Invocation_Edge_Count : Natural;
+          Cycle_Path            : LGE_Lists.Doubly_Linked_List;
+          Indent                : Indentation_Level);
+       pragma Inline (Record_Cycle);
+       --  Normalize a cycle described by its path Cycle_Path and add it to
+       --  library graph G. Most_Significant_Edge denotes the edge with the
+       --  highest significance along the cycle path. Invocation_Edge_Count
+       --  is the number of invocation edges along the cycle path. Indent is
+       --  the desired indentation level for tracing.
+ 
+       procedure Set_Component_Attributes
+         (G    : Library_Graph;
+          Comp : Component_Id;
+          Val  : Component_Attributes);
+       pragma Inline (Set_Component_Attributes);
+       --  Set the attributes of component Comp of library graph G to value Val
+ 
+       procedure Set_Corresponding_Vertex
+         (G    : Library_Graph;
+          U_Id : Unit_Id;
+          Val  : Library_Graph_Vertex_Id);
+       pragma Inline (Set_Corresponding_Vertex);
+       --  Associate vertex Val of library graph G with unit U_Id
+ 
+       procedure Set_Is_Recorded_Edge
+         (G   : Library_Graph;
+          Rel : Predecessor_Successor_Relation;
+          Val : Boolean := True);
+       pragma Inline (Set_Is_Recorded_Edge);
+       --  Mark a predecessor vertex and a successor vertex described by
+       --  relation Rel as already linked depending on value Val.
+ 
+       procedure Set_LGC_Attributes
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id;
+          Val   : Library_Graph_Cycle_Attributes);
+       pragma Inline (Set_LGC_Attributes);
+       --  Set the attributes of cycle Cycle of library graph G to value Val
+ 
+       procedure Set_LGE_Attributes
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id;
+          Val  : Library_Graph_Edge_Attributes);
+       pragma Inline (Set_LGE_Attributes);
+       --  Set the attributes of edge Edge of library graph G to value Val
+ 
+       procedure Set_LGV_Attributes
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Val    : Library_Graph_Vertex_Attributes);
+       pragma Inline (Set_LGV_Attributes);
+       --  Set the attributes of vertex Vertex of library graph G to value Val
+ 
+       procedure Trace_Component
+         (G      : Library_Graph;
+          Comp   : Component_Id;
+          Indent : Indentation_Level);
+       pragma Inline (Trace_Component);
+       --  Write the contents of component Comp of library graph G to standard
+       --  output. Indent is the desired indentation level for tracing.
+ 
+       procedure Trace_Cycle
+         (G      : Library_Graph;
+          Cycle  : Library_Graph_Cycle_Id;
+          Indent : Indentation_Level);
+       pragma Inline (Trace_Cycle);
+       --  Write the contents of cycle Cycle of library graph G to standard
+       --  output. Indent is the desired indentation level for tracing.
+ 
+       procedure Trace_Edge
+         (G      : Library_Graph;
+          Edge   : Library_Graph_Edge_Id;
+          Indent : Indentation_Level);
+       pragma Inline (Trace_Edge);
+       --  Write the contents of edge Edge of library graph G to standard
+       --  output. Indent is the desired indentation level for tracing.
+ 
+       procedure Trace_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Indent : Indentation_Level);
+       pragma Inline (Trace_Vertex);
+       --  Write the contents of vertex Vertex of library graph G to standard
+       --  output. Indent is the desired indentation level for tracing.
+ 
+       procedure Unvisit
+         (Vertex        : Library_Graph_Vertex_Id;
+          Visited_Set   : LGV_Sets.Membership_Set;
+          Visited_Stack : LGV_Lists.Doubly_Linked_List);
+       pragma Inline (Unvisit);
+       --  Part of Tarjan's enumeration of the elementary circuits of a directed
+       --  graph algorithm. Unwind the Visited_Stack by removing the top vertex
+       --  from set Visited_Set until vertex Vertex is reached, inclusive.
+ 
+       procedure Update_Pending_Predecessors
+         (Strong_Predecessors : in out Natural;
+          Weak_Predecessors   : in out Natural;
+          Update_Weak         : Boolean;
+          Value               : Integer);
+       pragma Inline (Update_Pending_Predecessors);
+       --  Update the number of pending strong or weak predecessors denoted by
+       --  Strong_Predecessors and Weak_Predecessors respectively depending on
+       --  flag Update_Weak by adding value Value.
+ 
+       procedure Update_Pending_Predecessors_Of_Components (G : Library_Graph);
+       pragma Inline (Update_Pending_Predecessors_Of_Components);
+       --  Update the number of pending predecessors all components of library
+       --  graph G must wait on before they can be elaborated.
+ 
+       procedure Update_Pending_Predecessors_Of_Components
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id);
+       pragma Inline (Update_Pending_Predecessors_Of_Components);
+       --  Update the number of pending predecessors the component of edge
+       --  LGE_Is's successor vertex of library graph G must wait on before
+       --  it can be elaborated.
+ 
+       function Vertex_Precedence
+         (G           : Library_Graph;
+          Vertex      : Library_Graph_Vertex_Id;
+          Compared_To : Library_Graph_Vertex_Id) return Precedence_Kind;
+       pragma Inline (Vertex_Precedence);
+       --  Determine the precedence of vertex Vertex of library graph G compared
+       --  to vertex Compared_To.
+ 
+       procedure Visit
+         (Vertex        : Library_Graph_Vertex_Id;
+          Visited_Set   : LGV_Sets.Membership_Set;
+          Visited_Stack : LGV_Lists.Doubly_Linked_List);
+       pragma Inline (Visit);
+       --  Part of Tarjan's enumeration of the elementary circuits of a directed
+       --  graph algorithm. Push vertex Vertex on the Visited_Stack and add it
+       --  to set Visited_Set.
+ 
+       --------------------
+       -- Activates_Task --
+       --------------------
+ 
+       function Activates_Task
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return
+            Kind (G, Edge) = Invocation_Edge
+             and then Get_LGE_Attributes (G, Edge).Activates_Task;
+       end Activates_Task;
+ 
+       -------------------------------
+       -- Add_Body_Before_Spec_Edge --
+       -------------------------------
+ 
+       procedure Add_Body_Before_Spec_Edge
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Edges  : LGE_Lists.Doubly_Linked_List)
+       is
+          Edge : Library_Graph_Edge_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+          pragma Assert (LGE_Lists.Present (Edges));
+ 
+          --  A vertex requires a special Body_Before_Spec edge to its
+          --  Corresponding_Item when it either denotes a
+          --
+          --    * Body that completes a previous spec
+          --
+          --    * Spec with a completing body
+          --
+          --  The edge creates an intentional circularity between the spec and
+          --  body in order to emulate a library unit, and guarantees that both
+          --  will appear in the same component.
+          --
+          --  Due to the structure of the library graph, either the spec or
+          --  the body may be visited first, yet Corresponding_Item will still
+          --  attempt to create the Body_Before_Spec edge. This is OK because
+          --  successor and predecessor are kept consistent in both cases, and
+          --  Add_Edge_With_Return will prevent the creation of the second edge.
+ 
+          --  Assume that no Body_Before_Spec is necessary
+ 
+          Edge := No_Library_Graph_Edge;
+ 
+          --  A body that completes a previous spec
+ 
+          if Is_Body_With_Spec (G, Vertex) then
+             Edge :=
+               Add_Edge_With_Return
+                 (G              => G,
+                  Pred           => Vertex,
+                  Succ           => Corresponding_Item (G, Vertex),
+                  Kind           => Body_Before_Spec_Edge,
+                  Activates_Task => False);
+ 
+          --  A spec with a completing body
+ 
+          elsif Is_Spec_With_Body (G, Vertex) then
+             Edge :=
+               Add_Edge_With_Return
+                 (G              => G,
+                  Pred           => Corresponding_Item (G, Vertex),
+                  Succ           => Vertex,
+                  Kind           => Body_Before_Spec_Edge,
+                  Activates_Task => False);
+          end if;
+ 
+          if Present (Edge) then
+             LGE_Lists.Append (Edges, Edge);
+          end if;
+       end Add_Body_Before_Spec_Edge;
+ 
+       --------------------------------
+       -- Add_Body_Before_Spec_Edges --
+       --------------------------------
+ 
+       procedure Add_Body_Before_Spec_Edges
+         (G     : Library_Graph;
+          Edges : LGE_Lists.Doubly_Linked_List)
+       is
+          Iter : Elaborable_Units_Iterator;
+          U_Id : Unit_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (LGE_Lists.Present (Edges));
+ 
+          Iter := Iterate_Elaborable_Units;
+          while Has_Next (Iter) loop
+             Next (Iter, U_Id);
+ 
+             Add_Body_Before_Spec_Edge
+               (G      => G,
+                Vertex => Corresponding_Vertex (G, U_Id),
+                Edges  => Edges);
+          end loop;
+       end Add_Body_Before_Spec_Edges;
+ 
+       --------------
+       -- Add_Edge --
+       --------------
+ 
+       procedure Add_Edge
+         (G              : Library_Graph;
+          Pred           : Library_Graph_Vertex_Id;
+          Succ           : Library_Graph_Vertex_Id;
+          Kind           : Library_Graph_Edge_Kind;
+          Activates_Task : Boolean)
+       is
+          Edge : Library_Graph_Edge_Id;
+          pragma Unreferenced (Edge);
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Pred));
+          pragma Assert (Present (Succ));
+          pragma Assert (Kind /= No_Edge);
+          pragma Assert (not Activates_Task or else Kind = Invocation_Edge);
+ 
+          Edge :=
+            Add_Edge_With_Return
+              (G              => G,
+               Pred           => Pred,
+               Succ           => Succ,
+               Kind           => Kind,
+               Activates_Task => Activates_Task);
+       end Add_Edge;
+ 
+       --------------------------
+       -- Add_Edge_With_Return --
+       --------------------------
+ 
+       function Add_Edge_With_Return
+         (G              : Library_Graph;
+          Pred           : Library_Graph_Vertex_Id;
+          Succ           : Library_Graph_Vertex_Id;
+          Kind           : Library_Graph_Edge_Kind;
+          Activates_Task : Boolean) return Library_Graph_Edge_Id
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Pred));
+          pragma Assert (Present (Succ));
+          pragma Assert (Kind /= No_Edge);
+ 
+          Rel : constant Predecessor_Successor_Relation :=
+                  (Predecessor => Pred,
+                   Successor   => Succ);
+ 
+          Edge : Library_Graph_Edge_Id;
+ 
+       begin
+          --  Nothing to do when the predecessor and successor are already
+          --  related by an edge.
+ 
+          if Is_Recorded_Edge (G, Rel) then
+             return No_Library_Graph_Edge;
+          end if;
+ 
+          Edge := Sequence_Next_Edge;
+ 
+          --  Add the edge to the underlying graph. Note that the predecessor
+          --  is the source of the edge because it will later need to notify
+          --  all its successors that it has been elaborated.
+ 
+          DG.Add_Edge
+            (G           => G.Graph,
+             E           => Edge,
+             Source      => Pred,
+             Destination => Succ);
+ 
+          --  Construct and save the attributes of the edge
+ 
+          Set_LGE_Attributes
+            (G    => G,
+             Edge => Edge,
+             Val  =>
+               (Activates_Task => Activates_Task,
+                Kind           => Kind));
+ 
+          --  Mark the predecessor and successor as related by the new edge.
+          --  This prevents all further attempts to link the same predecessor
+          --  and successor.
+ 
+          Set_Is_Recorded_Edge (G, Rel);
+ 
+          --  Update the number of pending predecessors the successor must wait
+          --  on before it is elaborated.
+ 
+          Increment_Pending_Predecessors
+            (G      => G,
+             Vertex => Succ,
+             Edge   => Edge);
+ 
+          --  Update the edge statistics
+ 
+          Increment_Library_Graph_Edge_Count (G, Kind);
+ 
+          return Edge;
+       end Add_Edge_With_Return;
+ 
+       ----------------
+       -- Add_Vertex --
+       ----------------
+ 
+       procedure Add_Vertex
+         (G    : Library_Graph;
+          U_Id : Unit_Id)
+       is
+          Vertex : Library_Graph_Vertex_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (U_Id));
+ 
+          --  Nothing to do when the unit already has a vertex
+ 
+          if Present (Corresponding_Vertex (G, U_Id)) then
+             return;
+          end if;
+ 
+          Vertex := Sequence_Next_Vertex;
+ 
+          --  Add the vertex to the underlying graph
+ 
+          DG.Add_Vertex (G.Graph, Vertex);
+ 
+          --  Construct and save the attributes of the vertex
+ 
+          Set_LGV_Attributes
+            (G      => G,
+             Vertex => Vertex,
+             Val    =>
+               (Corresponding_Item          => No_Library_Graph_Vertex,
+                In_Elaboration_Order        => False,
+                Pending_Strong_Predecessors => 0,
+                Pending_Weak_Predecessors   => 0,
+                Unit                        => U_Id));
+ 
+          --  Associate the unit with its corresponding vertex
+ 
+          Set_Corresponding_Vertex (G, U_Id, Vertex);
+       end Add_Vertex;
+ 
+       ---------------------------------
+       -- At_Least_One_Edge_Satisfies --
+       ---------------------------------
+ 
+       function At_Least_One_Edge_Satisfies
+         (G         : Library_Graph;
+          Cycle     : Library_Graph_Cycle_Id;
+          Predicate : LGE_Predicate_Ptr) return Boolean
+       is
+          Edge      : Library_Graph_Edge_Id;
+          Iter      : Edges_Of_Cycle_Iterator;
+          Satisfied : Boolean;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+          pragma Assert (Predicate /= null);
+ 
+          --  Assume that the predicate cannot be satisfied
+ 
+          Satisfied := False;
+ 
+          --  IMPORTANT:
+          --
+          --    * The iteration must run to completion in order to unlock the
+          --      edges of the cycle.
+ 
+          Iter := Iterate_Edges_Of_Cycle (G, Cycle);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+ 
+             Satisfied := Satisfied or else Predicate.all (G, Edge);
+          end loop;
+ 
+          return Satisfied;
+       end At_Least_One_Edge_Satisfies;
+ 
+       --------------------------
+       -- Complementary_Vertex --
+       --------------------------
+ 
+       function Complementary_Vertex
+         (G                : Library_Graph;
+          Vertex           : Library_Graph_Vertex_Id;
+          Force_Complement : Boolean) return Library_Graph_Vertex_Id
+       is
+          Complement : Library_Graph_Vertex_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          --  Assume that there is no complementary vertex
+ 
+          Complement := No_Library_Graph_Vertex;
+ 
+          --  The caller requests the complement explicitly
+ 
+          if Force_Complement then
+             Complement := Corresponding_Item (G, Vertex);
+ 
+          --  The vertex is a completing body of a spec subject to pragma
+          --  Elaborate_Body. The complementary vertex is the spec.
+ 
+          elsif Is_Body_Of_Spec_With_Elaborate_Body (G, Vertex) then
+             Complement := Proper_Spec (G, Vertex);
+ 
+          --  The vertex is a spec subject to pragma Elaborate_Body. The
+          --  complementary vertex is the body.
+ 
+          elsif Is_Spec_With_Elaborate_Body (G, Vertex) then
+             Complement := Proper_Body (G, Vertex);
+          end if;
+ 
+          return Complement;
+       end Complementary_Vertex;
+ 
+       ---------------
+       -- Component --
+       ---------------
+ 
+       function Component
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Component_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return DG.Component (G.Graph, Vertex);
+       end Component;
+ 
+       ---------------------------------
+       -- Contains_Elaborate_All_Edge --
+       ---------------------------------
+ 
+       function Contains_Elaborate_All_Edge
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          return
+            At_Least_One_Edge_Satisfies
+              (G         => G,
+               Cycle     => Cycle,
+               Predicate => Is_Elaborate_All_Edge'Access);
+       end Contains_Elaborate_All_Edge;
+ 
+       ------------------------------------
+       -- Contains_Static_Successor_Edge --
+       ------------------------------------
+ 
+       function Contains_Static_Successor_Edge
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          return
+            At_Least_One_Edge_Satisfies
+              (G         => G,
+               Cycle     => Cycle,
+               Predicate => Is_Static_Successor_Edge'Access);
+       end Contains_Static_Successor_Edge;
+ 
+       ------------------------------
+       -- Contains_Task_Activation --
+       ------------------------------
+ 
+       function Contains_Task_Activation
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          return
+            At_Least_One_Edge_Satisfies
+              (G         => G,
+               Cycle     => Cycle,
+               Predicate => Activates_Task'Access);
+       end Contains_Task_Activation;
+ 
+       ---------------------
+       -- Copy_Cycle_Path --
+       ---------------------
+ 
+       function Copy_Cycle_Path
+         (Cycle_Path : LGE_Lists.Doubly_Linked_List)
+          return LGE_Lists.Doubly_Linked_List
+       is
+          Edge : Library_Graph_Edge_Id;
+          Iter : LGE_Lists.Iterator;
+          Path : LGE_Lists.Doubly_Linked_List;
+ 
+       begin
+          pragma Assert (LGE_Lists.Present (Cycle_Path));
+ 
+          Path := LGE_Lists.Create;
+          Iter := LGE_Lists.Iterate (Cycle_Path);
+          while LGE_Lists.Has_Next (Iter) loop
+             LGE_Lists.Next (Iter, Edge);
+ 
+             LGE_Lists.Append (Path, Edge);
+          end loop;
+ 
+          return Path;
+       end Copy_Cycle_Path;
+ 
+       ------------------------
+       -- Corresponding_Item --
+       ------------------------
+ 
+       function Corresponding_Item
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Library_Graph_Vertex_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Get_LGV_Attributes (G, Vertex).Corresponding_Item;
+       end Corresponding_Item;
+ 
+       --------------------------
+       -- Corresponding_Vertex --
+       --------------------------
+ 
+       function Corresponding_Vertex
+         (G    : Library_Graph;
+          U_Id : Unit_Id) return Library_Graph_Vertex_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (U_Id));
+ 
+          return Unit_Tables.Get (G.Unit_To_Vertex, U_Id);
+       end Corresponding_Vertex;
+ 
+       ------------
+       -- Create --
+       ------------
+ 
+       function Create
+         (Initial_Vertices : Positive;
+          Initial_Edges    : Positive) return Library_Graph
+       is
+          G : constant Library_Graph := new Library_Graph_Attributes;
+ 
+       begin
+          G.Component_Attributes := Component_Tables.Create (Initial_Vertices);
+          G.Cycle_Attributes     := LGC_Tables.Create       (Initial_Vertices);
+          G.Cycles               := LGC_Lists.Create;
+          G.Edge_Attributes      := LGE_Tables.Create       (Initial_Edges);
+          G.Graph                :=
+            DG.Create
+              (Initial_Vertices => Initial_Vertices,
+               Initial_Edges    => Initial_Edges);
+          G.Recorded_Edges       := RE_Sets.Create          (Initial_Edges);
+          G.Unit_To_Vertex       := Unit_Tables.Create      (Initial_Vertices);
+          G.Vertex_Attributes    := LGV_Tables.Create       (Initial_Vertices);
+ 
+          return G;
+       end Create;
+ 
+       ------------------------
+       -- Cycle_End_Vertices --
+       ------------------------
+ 
+       function Cycle_End_Vertices
+         (G                    : Library_Graph;
+          Vertex               : Library_Graph_Vertex_Id;
+          Elaborate_All_Active : Boolean) return LGV_Sets.Membership_Set
+       is
+          Complement   : Library_Graph_Vertex_Id;
+          End_Vertices : LGV_Sets.Membership_Set := LGV_Sets.Nil;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          End_Vertices := LGV_Sets.Create (2);
+ 
+          --  The input vertex always terminates a cycle path
+ 
+          LGV_Sets.Insert (End_Vertices, Vertex);
+ 
+          --  Add the complementary vertex to the set of cycle terminating
+          --  vertices when either Elaborate_All is in effect, or the input
+          --  vertex is part of an Elaborat_Body pair.
+ 
+          if Elaborate_All_Active
+            or else Is_Vertex_With_Elaborate_Body (G, Vertex)
+          then
+             Complement :=
+               Complementary_Vertex
+                 (G                => G,
+                  Vertex           => Vertex,
+                  Force_Complement => Elaborate_All_Active);
+ 
+             if Present (Complement) then
+                LGV_Sets.Insert (End_Vertices, Complement);
+             end if;
+          end if;
+ 
+          return End_Vertices;
+       end Cycle_End_Vertices;
+ 
+       -------------------
+       -- Cycle_Kind_Of --
+       -------------------
+ 
+       function Cycle_Kind_Of
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Library_Graph_Cycle_Kind
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+       begin
+          if Is_Cyclic_Elaborate_All_Edge (G, Edge) then
+             return Elaborate_All_Cycle;
+ 
+          elsif Is_Cyclic_Elaborate_Body_Edge (G, Edge) then
+             return Elaborate_Body_Cycle;
+ 
+          elsif Is_Cyclic_Elaborate_Edge (G, Edge) then
+             return Elaborate_Cycle;
+ 
+          elsif Is_Cyclic_Forced_Edge (G, Edge) then
+             return Forced_Cycle;
+ 
+          elsif Is_Cyclic_Invocation_Edge (G, Edge) then
+             return Invocation_Cycle;
+ 
+          else
+             return No_Cycle_Kind;
+          end if;
+       end Cycle_Kind_Of;
+ 
+       ---------------------------
+       -- Cycle_Kind_Precedence --
+       ---------------------------
+ 
+       function Cycle_Kind_Precedence
+         (Kind        : Library_Graph_Cycle_Kind;
+          Compared_To : Library_Graph_Cycle_Kind) return Precedence_Kind
+       is
+          Comp_Pos : constant Integer :=
+                       Library_Graph_Cycle_Kind'Pos (Compared_To);
+          Kind_Pos : constant Integer := Library_Graph_Cycle_Kind'Pos (Kind);
+ 
+       begin
+          --  A lower ordinal indicates a higher precedence
+ 
+          if Kind_Pos < Comp_Pos then
+             return Higher_Precedence;
+ 
+          elsif Kind_Pos > Comp_Pos then
+             return Lower_Precedence;
+ 
+          else
+             return Equal_Precedence;
+          end if;
+       end Cycle_Kind_Precedence;
+ 
+       ---------------------------
+       -- Cycle_Path_Precedence --
+       ---------------------------
+ 
+       function Cycle_Path_Precedence
+         (G           : Library_Graph;
+          Path        : LGE_Lists.Doubly_Linked_List;
+          Compared_To : LGE_Lists.Doubly_Linked_List) return Precedence_Kind
+       is
+          procedure Next_Available
+            (Iter : in out LGE_Lists.Iterator;
+             Edge : out Library_Graph_Edge_Id);
+          pragma Inline (Next_Available);
+          --  Obtain the next edge available through iterator Iter, or return
+          --  No_Library_Graph_Edge if the iterator has been exhausted.
+ 
+          --------------------
+          -- Next_Available --
+          --------------------
+ 
+          procedure Next_Available
+            (Iter : in out LGE_Lists.Iterator;
+             Edge : out Library_Graph_Edge_Id)
+          is
+          begin
+             --  Assume that the iterator has been exhausted
+ 
+             Edge := No_Library_Graph_Edge;
+ 
+             if LGE_Lists.Has_Next (Iter) then
+                LGE_Lists.Next (Iter, Edge);
+             end if;
+          end Next_Available;
+ 
+          --  Local variables
+ 
+          Comp_Edge : Library_Graph_Edge_Id;
+          Comp_Iter : LGE_Lists.Iterator;
+          Path_Edge : Library_Graph_Edge_Id;
+          Path_Iter : LGE_Lists.Iterator;
+          Prec      : Precedence_Kind;
+ 
+       --  Start of processing for Cycle_Path_Precedence
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (LGE_Lists.Present (Path));
+          pragma Assert (LGE_Lists.Present (Compared_To));
+ 
+          --  Assume that the paths have equal precedence
+ 
+          Prec := Equal_Precedence;
+ 
+          Comp_Iter := LGE_Lists.Iterate (Compared_To);
+          Path_Iter := LGE_Lists.Iterate (Path);
+ 
+          Next_Available (Comp_Iter, Comp_Edge);
+          Next_Available (Path_Iter, Path_Edge);
+ 
+          --  IMPORTANT:
+          --
+          --    * The iteration must run to completion in order to unlock the
+          --      edges of both paths.
+ 
+          while Present (Comp_Edge) or else Present (Path_Edge) loop
+             if Prec = Equal_Precedence
+               and then Present (Comp_Edge)
+               and then Present (Path_Edge)
+             then
+                Prec :=
+                  Edge_Precedence
+                    (G           => G,
+                     Edge        => Path_Edge,
+                     Compared_To => Comp_Edge);
+             end if;
+ 
+             Next_Available (Comp_Iter, Comp_Edge);
+             Next_Available (Path_Iter, Path_Edge);
+          end loop;
+ 
+          return Prec;
+       end Cycle_Path_Precedence;
+ 
+       ----------------------
+       -- Cycle_Precedence --
+       ----------------------
+ 
+       function Cycle_Precedence
+         (G           : Library_Graph;
+          Cycle       : Library_Graph_Cycle_Id;
+          Compared_To : Library_Graph_Cycle_Id) return Precedence_Kind
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+          pragma Assert (Present (Compared_To));
+ 
+          Comp_Invs  : constant Natural :=
+                         Invocation_Edge_Count (G, Compared_To);
+          Comp_Len   : constant Natural := Length (G, Compared_To);
+          Cycle_Invs : constant Natural := Invocation_Edge_Count (G, Cycle);
+          Cycle_Len  : constant Natural := Length (G, Cycle);
+          Kind_Prec  : constant Precedence_Kind :=
+                         Cycle_Kind_Precedence
+                           (Kind        => Kind (G, Cycle),
+                            Compared_To => Kind (G, Compared_To));
+ 
+       begin
+          --  Prefer a cycle with higher precedence based on its kind
+ 
+          if Kind_Prec = Higher_Precedence
+               or else
+             Kind_Prec = Lower_Precedence
+          then
+             return Kind_Prec;
+ 
+          --  Prefer a shorter cycle
+ 
+          elsif Cycle_Len < Comp_Len then
+             return Higher_Precedence;
+ 
+          elsif Cycle_Len > Comp_Len then
+             return Lower_Precedence;
+ 
+          --  Prefer a cycle wih fewer invocation edges
+ 
+          elsif Cycle_Invs < Comp_Invs then
+             return Higher_Precedence;
+ 
+          elsif Cycle_Invs > Comp_Invs then
+             return Lower_Precedence;
+ 
+          --  Prefer a cycle with a higher path precedence
+ 
+          else
+             return
+               Cycle_Path_Precedence
+                 (G           => G,
+                  Path        => Path (G, Cycle),
+                  Compared_To => Path (G, Compared_To));
+          end if;
+       end Cycle_Precedence;
+ 
+       ----------------------------------------
+       -- Decrement_Library_Graph_Edge_Count --
+       ----------------------------------------
+ 
+       procedure Decrement_Library_Graph_Edge_Count
+         (G    : Library_Graph;
+          Kind : Library_Graph_Edge_Kind)
+       is
+          pragma Assert (Present (G));
+ 
+          Count : Natural renames G.Counts (Kind);
+ 
+       begin
+          Count := Count - 1;
+       end Decrement_Library_Graph_Edge_Count;
+ 
+       ------------------------------------
+       -- Decrement_Pending_Predecessors --
+       ------------------------------------
+ 
+       procedure Decrement_Pending_Predecessors
+         (G    : Library_Graph;
+          Comp : Component_Id;
+          Edge : Library_Graph_Edge_Id)
+       is
+          Attrs : Component_Attributes;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          Attrs := Get_Component_Attributes (G, Comp);
+ 
+          Update_Pending_Predecessors
+            (Strong_Predecessors => Attrs.Pending_Strong_Predecessors,
+             Weak_Predecessors   => Attrs.Pending_Weak_Predecessors,
+             Update_Weak         => Is_Invocation_Edge (G, Edge),
+             Value               => -1);
+ 
+          Set_Component_Attributes (G, Comp, Attrs);
+       end Decrement_Pending_Predecessors;
+ 
+       ------------------------------------
+       -- Decrement_Pending_Predecessors --
+       ------------------------------------
+ 
+       procedure Decrement_Pending_Predecessors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Edge   : Library_Graph_Edge_Id)
+       is
+          Attrs : Library_Graph_Vertex_Attributes;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          Attrs := Get_LGV_Attributes (G, Vertex);
+ 
+          Update_Pending_Predecessors
+            (Strong_Predecessors => Attrs.Pending_Strong_Predecessors,
+             Weak_Predecessors   => Attrs.Pending_Weak_Predecessors,
+             Update_Weak         => Is_Invocation_Edge (G, Edge),
+             Value               => -1);
+ 
+          Set_LGV_Attributes (G, Vertex, Attrs);
+       end Decrement_Pending_Predecessors;
+ 
+       -----------------------------------
+       -- Delete_Body_Before_Spec_Edges --
+       -----------------------------------
+ 
+       procedure Delete_Body_Before_Spec_Edges
+         (G     : Library_Graph;
+          Edges : LGE_Lists.Doubly_Linked_List)
+       is
+          Edge : Library_Graph_Edge_Id;
+          Iter : LGE_Lists.Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (LGE_Lists.Present (Edges));
+ 
+          Iter := LGE_Lists.Iterate (Edges);
+          while LGE_Lists.Has_Next (Iter) loop
+             LGE_Lists.Next (Iter, Edge);
+             pragma Assert (Kind (G, Edge) = Body_Before_Spec_Edge);
+ 
+             Delete_Edge (G, Edge);
+          end loop;
+       end Delete_Body_Before_Spec_Edges;
+ 
+       -----------------
+       -- Delete_Edge --
+       -----------------
+ 
+       procedure Delete_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          Pred : constant Library_Graph_Vertex_Id := Predecessor (G, Edge);
+          Succ : constant Library_Graph_Vertex_Id := Successor   (G, Edge);
+          Rel  : constant Predecessor_Successor_Relation :=
+                   (Predecessor => Pred,
+                    Successor   => Succ);
+ 
+       begin
+          --  Update the edge statistics
+ 
+          Decrement_Library_Graph_Edge_Count (G, Kind (G, Edge));
+ 
+          --  Update the number of pending predecessors the successor must wait
+          --  on before it is elaborated.
+ 
+          Decrement_Pending_Predecessors
+            (G      => G,
+             Vertex => Succ,
+             Edge   => Edge);
+ 
+          --  Delete the link between the predecessor and successor. This allows
+          --  for further attempts to link the same predecessor and successor.
+ 
+          RE_Sets.Delete (G.Recorded_Edges, Rel);
+ 
+          --  Delete the attributes of the edge
+ 
+          LGE_Tables.Delete (G.Edge_Attributes, Edge);
+ 
+          --  Delete the edge from the underlying graph
+ 
+          DG.Delete_Edge (G.Graph, Edge);
+       end Delete_Edge;
+ 
+       -------------
+       -- Destroy --
+       -------------
+ 
+       procedure Destroy (G : in out Library_Graph) is
+       begin
+          pragma Assert (Present (G));
+ 
+          Component_Tables.Destroy (G.Component_Attributes);
+          LGC_Tables.Destroy       (G.Cycle_Attributes);
+          LGC_Lists.Destroy        (G.Cycles);
+          LGE_Tables.Destroy       (G.Edge_Attributes);
+          DG.Destroy               (G.Graph);
+          RE_Sets.Destroy          (G.Recorded_Edges);
+          Unit_Tables.Destroy      (G.Unit_To_Vertex);
+          LGV_Tables.Destroy       (G.Vertex_Attributes);
+ 
+          Free (G);
+       end Destroy;
+ 
+       ----------------------------------
+       -- Destroy_Component_Attributes --
+       ----------------------------------
+ 
+       procedure Destroy_Component_Attributes
+         (Attrs : in out Component_Attributes)
+       is
+          pragma Unreferenced (Attrs);
+       begin
+          null;
+       end Destroy_Component_Attributes;
+ 
+       --------------------------------------------
+       -- Destroy_Library_Graph_Cycle_Attributes --
+       --------------------------------------------
+ 
+       procedure Destroy_Library_Graph_Cycle_Attributes
+         (Attrs : in out Library_Graph_Cycle_Attributes)
+       is
+       begin
+          LGE_Lists.Destroy (Attrs.Path);
+       end Destroy_Library_Graph_Cycle_Attributes;
+ 
+       -------------------------------------------
+       -- Destroy_Library_Graph_Edge_Attributes --
+       -------------------------------------------
+ 
+       procedure Destroy_Library_Graph_Edge_Attributes
+         (Attrs : in out Library_Graph_Edge_Attributes)
+       is
+          pragma Unreferenced (Attrs);
+       begin
+          null;
+       end Destroy_Library_Graph_Edge_Attributes;
+ 
+       ---------------------------------------------
+       -- Destroy_Library_Graph_Vertex_Attributes --
+       ---------------------------------------------
+ 
+       procedure Destroy_Library_Graph_Vertex_Attributes
+         (Attrs : in out Library_Graph_Vertex_Attributes)
+       is
+          pragma Unreferenced (Attrs);
+       begin
+          null;
+       end Destroy_Library_Graph_Vertex_Attributes;
+ 
+       ---------------------
+       -- Edge_Precedence --
+       ---------------------
+ 
+       function Edge_Precedence
+         (G           : Library_Graph;
+          Edge        : Library_Graph_Edge_Id;
+          Compared_To : Library_Graph_Edge_Id) return Precedence_Kind
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+          pragma Assert (Present (Compared_To));
+ 
+          Comp_Succ : constant Library_Graph_Vertex_Id :=
+                        Successor (G, Compared_To);
+          Edge_Succ : constant Library_Graph_Vertex_Id :=
+                        Successor (G, Edge);
+          Kind_Prec : constant Precedence_Kind :=
+                        Cycle_Kind_Precedence
+                          (Kind        => Cycle_Kind_Of (G, Edge),
+                           Compared_To => Cycle_Kind_Of (G, Compared_To));
+          Succ_Prec : constant Precedence_Kind :=
+                        Vertex_Precedence
+                          (G           => G,
+                           Vertex      => Edge_Succ,
+                           Compared_To => Comp_Succ);
+ 
+       begin
+          --  Prefer an edge with a higher cycle kind precedence
+ 
+          if Kind_Prec = Higher_Precedence
+               or else
+             Kind_Prec = Lower_Precedence
+          then
+             return Kind_Prec;
+ 
+          --  Prefer an edge whose successor has a higher precedence
+ 
+          elsif Comp_Succ /= Edge_Succ
+            and then (Succ_Prec = Higher_Precedence
+                        or else
+                      Succ_Prec = Lower_Precedence)
+          then
+             return Succ_Prec;
+ 
+          --  Prefer an edge whose predecessor has a higher precedence
+ 
+          else
+             return
+               Vertex_Precedence
+                 (G           => G,
+                  Vertex      => Predecessor (G, Edge),
+                  Compared_To => Predecessor (G, Compared_To));
+          end if;
+       end Edge_Precedence;
+ 
+       ---------------
+       -- File_Name --
+       ---------------
+ 
+       function File_Name
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return File_Name_Type
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return File_Name (Unit (G, Vertex));
+       end File_Name;
+ 
+       ---------------------
+       -- Find_Components --
+       ---------------------
+ 
+       procedure Find_Components (G : Library_Graph) is
+          Edges : LGE_Lists.Doubly_Linked_List;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          Start_Phase (Component_Discovery);
+ 
+          --  Initialize or reinitialize the components of the graph
+ 
+          Initialize_Components (G);
+ 
+          --  Create a set of special edges that link a predecessor body with a
+          --  successor spec. This is an illegal dependency, however using such
+          --  edges eliminates the need to create yet another graph, where both
+          --  spec and body are collapsed into a single vertex.
+ 
+          Edges := LGE_Lists.Create;
+          Add_Body_Before_Spec_Edges (G, Edges);
+ 
+          DG.Find_Components (G.Graph);
+ 
+          --  Remove the special edges that link a predecessor body with a
+          --  successor spec because they cause unresolvable circularities.
+ 
+          Delete_Body_Before_Spec_Edges (G, Edges);
+          LGE_Lists.Destroy (Edges);
+ 
+          --  Update the number of predecessors various components must wait on
+          --  before they can be elaborated.
+ 
+          Update_Pending_Predecessors_Of_Components (G);
+          End_Phase (Component_Discovery);
+       end Find_Components;
+ 
+       -----------------
+       -- Find_Cycles --
+       -----------------
+ 
+       procedure Find_Cycles (G : Library_Graph) is
+          All_Cycle_Limit : constant Natural := 64;
+          --  The performance of Tarjan's algorithm may degrate to exponential
+          --  when pragma Elaborate_All is in effect, or some vertex is part of
+          --  an Elaborate_Body pair. In this case the algorithm discovers all
+          --  combinations of edges that close a circuit starting and ending on
+          --  some start vertex while going through different vertices. Use a
+          --  limit on the total number of cycles within a component to guard
+          --  against such degradation.
+ 
+          Comp        : Component_Id;
+          Cycle_Count : Natural;
+          Iter        : Component_Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          Start_Phase (Cycle_Discovery);
+ 
+          --  The cycles of graph G are discovered using Tarjan's enumeration
+          --  of the elementary circuits of a directed-graph algorithm. Do not
+          --  modify this code unless you intimately understand the algorithm.
+          --
+          --  The logic of the algorithm is split among the following routines:
+          --
+          --    Cycle_End_Vertices
+          --    Find_Cycles_From_Successor
+          --    Find_Cycles_From_Vertex
+          --    Find_Cycles_In_Component
+          --    Unvisit
+          --    Visit
+          --
+          --  The original algorithm has been significantly modified in order to
+          --
+          --    * Accommodate the semantics of Elaborate_All and Elaborate_Body.
+          --
+          --    * Capture cycle paths as edges rather than vertices.
+          --
+          --    * Take advantage of graph components.
+ 
+          --  Assume that the graph does not contain a cycle
+ 
+          Cycle_Count := 0;
+ 
+          --  Run the modified version of the algorithm on each component of the
+          --  graph.
+ 
+          Iter := Iterate_Components (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Comp);
+ 
+             Find_Cycles_In_Component
+               (G           => G,
+                Comp        => Comp,
+                Cycle_Count => Cycle_Count,
+                Cycle_Limit => All_Cycle_Limit);
+          end loop;
+ 
+          End_Phase (Cycle_Discovery);
+       end Find_Cycles;
+ 
+       --------------------------------
+       -- Find_Cycles_From_Successor --
+       --------------------------------
+ 
+       procedure Find_Cycles_From_Successor
+         (G                     : Library_Graph;
+          Edge                  : Library_Graph_Edge_Id;
+          End_Vertices          : LGV_Sets.Membership_Set;
+          Deleted_Vertices      : LGV_Sets.Membership_Set;
+          Most_Significant_Edge : Library_Graph_Edge_Id;
+          Invocation_Edge_Count : Natural;
+          Cycle_Path_Stack      : LGE_Lists.Doubly_Linked_List;
+          Visited_Set           : LGV_Sets.Membership_Set;
+          Visited_Stack         : LGV_Lists.Doubly_Linked_List;
+          Cycle_Count           : in out Natural;
+          Cycle_Limit           : Natural;
+          Elaborate_All_Active  : Boolean;
+          Has_Cycle             : out Boolean;
+          Indent                : Indentation_Level)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+          pragma Assert (LGV_Sets.Present  (End_Vertices));
+          pragma Assert (LGV_Sets.Present  (Deleted_Vertices));
+          pragma Assert (LGE_Lists.Present (Cycle_Path_Stack));
+          pragma Assert (LGV_Sets.Present  (Visited_Set));
+          pragma Assert (LGV_Lists.Present (Visited_Stack));
+ 
+          Succ        : constant Library_Graph_Vertex_Id := Successor (G, Edge);
+          Succ_Indent : constant Indentation_Level       :=
+                          Indent + Nested_Indentation;
+ 
+       begin
+          --  Assume that the successor reached via the edge does not result in
+          --  a cycle.
+ 
+          Has_Cycle := False;
+ 
+          --  Nothing to do when the edge connects two vertices residing in two
+          --  different components.
+ 
+          if not Is_Cyclic_Edge (G, Edge) then
+             return;
+          end if;
+ 
+          Trace_Edge (G, Edge, Indent);
+ 
+          --  The modified version does not place vertices on the "point stack",
+          --  but instead collects the edges comprising the cycle. Prepare the
+          --  edge for backtracking.
+ 
+          LGE_Lists.Prepend (Cycle_Path_Stack, Edge);
+ 
+          Find_Cycles_From_Vertex
+            (G                     => G,
+             Vertex                => Succ,
+             End_Vertices          => End_Vertices,
+             Deleted_Vertices      => Deleted_Vertices,
+             Most_Significant_Edge => Most_Significant_Edge,
+             Invocation_Edge_Count => Invocation_Edge_Count,
+             Cycle_Path_Stack      => Cycle_Path_Stack,
+             Visited_Set           => Visited_Set,
+             Visited_Stack         => Visited_Stack,
+             Cycle_Count           => Cycle_Count,
+             Cycle_Limit           => Cycle_Limit,
+             Elaborate_All_Active  => Elaborate_All_Active,
+             Is_Start_Vertex       => False,
+             Has_Cycle             => Has_Cycle,
+             Indent                => Succ_Indent);
+ 
+          --  The modified version does not place vertices on the "point stack",
+          --  but instead collects the edges comprising the cycle. Backtrack the
+          --  edge.
+ 
+          LGE_Lists.Delete_First (Cycle_Path_Stack);
+       end Find_Cycles_From_Successor;
+ 
+       -----------------------------
+       -- Find_Cycles_From_Vertex --
+       -----------------------------
+ 
+       procedure Find_Cycles_From_Vertex
+         (G                     : Library_Graph;
+          Vertex                : Library_Graph_Vertex_Id;
+          End_Vertices          : LGV_Sets.Membership_Set;
+          Deleted_Vertices      : LGV_Sets.Membership_Set;
+          Most_Significant_Edge : Library_Graph_Edge_Id;
+          Invocation_Edge_Count : Natural;
+          Cycle_Path_Stack      : LGE_Lists.Doubly_Linked_List;
+          Visited_Set           : LGV_Sets.Membership_Set;
+          Visited_Stack         : LGV_Lists.Doubly_Linked_List;
+          Cycle_Count           : in out Natural;
+          Cycle_Limit           : Natural;
+          Elaborate_All_Active  : Boolean;
+          Is_Start_Vertex       : Boolean;
+          Has_Cycle             : out Boolean;
+          Indent                : Indentation_Level)
+       is
+          Edge_Indent : constant Indentation_Level :=
+                          Indent + Nested_Indentation;
+ 
+          Complement : Library_Graph_Vertex_Id;
+          Edge       : Library_Graph_Edge_Id;
+          Iter       : Edges_To_Successors_Iterator;
+ 
+          Complement_Has_Cycle : Boolean;
+          --  This flag is set when either Elaborate_All is in effect or the
+          --  current vertex is part of an Elaborate_Body pair, and visiting
+          --  the "complementary" vertex resulted in a cycle.
+ 
+          Successor_Has_Cycle : Boolean;
+          --  This flag is set when visiting at least one successor of the
+          --  current vertex resulted in a cycle.
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+          pragma Assert (LGV_Sets.Present  (End_Vertices));
+          pragma Assert (LGV_Sets.Present  (Deleted_Vertices));
+          pragma Assert (LGE_Lists.Present (Cycle_Path_Stack));
+          pragma Assert (LGV_Sets.Present  (Visited_Set));
+          pragma Assert (LGV_Lists.Present (Visited_Stack));
+ 
+          --  Assume that the vertex does not close a circuit
+ 
+          Has_Cycle := False;
+ 
+          --  Nothing to do when the limit on the number of saved cycles has
+          --  been reached. This protects against a combinatorial explosion
+          --  in components with Elaborate_All cycles.
+ 
+          if Cycle_Count >= Cycle_Limit then
+             return;
+ 
+          --  The vertex closes the circuit, thus resulting in a cycle. Save
+          --  the cycle for later diagnostics. The initial invocation of the
+          --  routine always ignores the starting vertex, to prevent a spurious
+          --  self-cycle.
+ 
+          elsif not Is_Start_Vertex
+            and then LGV_Sets.Contains (End_Vertices, Vertex)
+          then
+             Trace_Vertex (G, Vertex, Indent);
+ 
+             Record_Cycle
+               (G                     => G,
+                Most_Significant_Edge => Most_Significant_Edge,
+                Invocation_Edge_Count => Invocation_Edge_Count,
+                Cycle_Path            => Cycle_Path_Stack,
+                Indent                => Indent);
+ 
+             Has_Cycle   := True;
+             Cycle_Count := Cycle_Count + 1;
+             return;
+ 
+          --  Nothing to do when the vertex has already been deleted. This
+          --  indicates that all available cycles involving the vertex have
+          --  been discovered, and the vertex cannot contribute further to
+          --  the depth-first search.
+ 
+          elsif LGV_Sets.Contains (Deleted_Vertices, Vertex) then
+             return;
+ 
+          --  Nothing to do when the vertex has already been visited. This
+          --  indicates that the depth-first search initiated from some start
+          --  vertex already encountered this vertex, and the visited stack has
+          --  not been unrolled yet.
+ 
+          elsif LGV_Sets.Contains (Visited_Set, Vertex) then
+             return;
+          end if;
+ 
+          Trace_Vertex (G, Vertex, Indent);
+ 
+          --  Mark the vertex as visited
+ 
+          Visit
+            (Vertex        => Vertex,
+             Visited_Set   => Visited_Set,
+             Visited_Stack => Visited_Stack);
+ 
+          --  Extend the depth-first search via all the edges to successors
+ 
+          Iter := Iterate_Edges_To_Successors (G, Vertex);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+ 
+             Find_Cycles_From_Successor
+               (G                     => G,
+                Edge                  => Edge,
+                End_Vertices          => End_Vertices,
+                Deleted_Vertices      => Deleted_Vertices,
+ 
+                --  The edge may be more important than the most important edge
+                --  up to this point, thus "upgrading" the nature of the cycle,
+                --  and shifting its point of normalization.
+ 
+                Most_Significant_Edge =>
+                  Highest_Precedence_Edge
+                    (G     => G,
+                     Left  => Edge,
+                     Right => Most_Significant_Edge),
+ 
+                --  The edge may be an invocation edge, in which case the count
+                --  of invocation edges increases by one.
+ 
+                Invocation_Edge_Count =>
+                  Maximum_Invocation_Edge_Count
+                    (G     => G,
+                     Edge  => Edge,
+                     Count => Invocation_Edge_Count),
+ 
+                Cycle_Path_Stack      => Cycle_Path_Stack,
+                Visited_Set           => Visited_Set,
+                Visited_Stack         => Visited_Stack,
+                Cycle_Count           => Cycle_Count,
+                Cycle_Limit           => Cycle_Limit,
+                Elaborate_All_Active  => Elaborate_All_Active,
+                Has_Cycle             => Successor_Has_Cycle,
+                Indent                => Edge_Indent);
+ 
+             Has_Cycle := Has_Cycle or Successor_Has_Cycle;
+          end loop;
+ 
+          --  Visit the complementary vertex of the current vertex when pragma
+          --  Elaborate_All is in effect, or the current vertex is part of an
+          --  Elaborate_Body pair.
+ 
+          if Elaborate_All_Active
+            or else Is_Vertex_With_Elaborate_Body (G, Vertex)
+          then
+             Complement :=
+               Complementary_Vertex
+                 (G                => G,
+                  Vertex           => Vertex,
+                  Force_Complement => Elaborate_All_Active);
+ 
+             if Present (Complement) then
+                Find_Cycles_From_Vertex
+                  (G                     => G,
+                   Vertex                => Complement,
+                   End_Vertices          => End_Vertices,
+                   Deleted_Vertices      => Deleted_Vertices,
+                   Most_Significant_Edge => Most_Significant_Edge,
+                   Invocation_Edge_Count => Invocation_Edge_Count,
+                   Cycle_Path_Stack      => Cycle_Path_Stack,
+                   Visited_Set           => Visited_Set,
+                   Visited_Stack         => Visited_Stack,
+                   Cycle_Count           => Cycle_Count,
+                   Cycle_Limit           => Cycle_Limit,
+                   Elaborate_All_Active  => Elaborate_All_Active,
+                   Is_Start_Vertex       => Is_Start_Vertex,
+                   Has_Cycle             => Complement_Has_Cycle,
+                   Indent                => Indent);
+ 
+                Has_Cycle := Has_Cycle or Complement_Has_Cycle;
+             end if;
+          end if;
+ 
+          --  The original algorithm clears the "marked stack" in two places:
+          --
+          --     * When the depth-first search starting from the current vertex
+          --       discovers at least one cycle, and
+          --
+          --     * When the depth-first search initiated from a start vertex
+          --       completes.
+          --
+          --  The modified version handles both cases in one place.
+ 
+          if Has_Cycle or else Is_Start_Vertex then
+             Unvisit
+               (Vertex        => Vertex,
+                Visited_Set   => Visited_Set,
+                Visited_Stack => Visited_Stack);
+          end if;
+ 
+          --  Delete a start vertex from the graph once its depth-first search
+          --  completes. This action preserves the invariant where a cycle is
+          --  not rediscovered "later" in some permuted form.
+ 
+          if Is_Start_Vertex then
+             LGV_Sets.Insert (Deleted_Vertices, Vertex);
+          end if;
+       end Find_Cycles_From_Vertex;
+ 
+       ------------------------------
+       -- Find_Cycles_In_Component --
+       ------------------------------
+ 
+       procedure Find_Cycles_In_Component
+         (G           : Library_Graph;
+          Comp        : Component_Id;
+          Cycle_Count : in out Natural;
+          Cycle_Limit : Natural)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          Num_Of_Vertices : constant Natural :=
+                              Number_Of_Component_Vertices (G, Comp);
+ 
+          Elaborate_All_Active : constant Boolean :=
+                                   Has_Elaborate_All_Edge (G, Comp);
+          --  The presence of an Elaborate_All edge within a component causes
+          --  all spec-body pairs to be treated as one vertex.
+ 
+          Has_Cycle : Boolean;
+          Iter      : Component_Vertex_Iterator;
+          Vertex    : Library_Graph_Vertex_Id;
+ 
+          Cycle_Path_Stack : LGE_Lists.Doubly_Linked_List := LGE_Lists.Nil;
+          --  The "point stack" of Tarjan's algorithm. The original maintains
+          --  a stack of vertices, however for diagnostic purposes using edges
+          --  is preferable.
+ 
+          Deleted_Vertices : LGV_Sets.Membership_Set := LGV_Sets.Nil;
+          --  The original algorithm alters the graph by deleting vertices with
+          --  lower ordinals compared to some starting vertex. Since the graph
+          --  must remain intact for diagnostic purposes, vertices are instead
+          --  inserted in this set and treated as "deleted".
+ 
+          End_Vertices : LGV_Sets.Membership_Set := LGV_Sets.Nil;
+          --  The original algorithm uses a single vertex to indicate the start
+          --  and end vertex of a cycle. The semantics of pragmas Elaborate_All
+          --  and Elaborate_Body increase this number by one. The end vertices
+          --  are added to this set and treated as "cycle-terminating".
+ 
+          Visited_Set : LGV_Sets.Membership_Set := LGV_Sets.Nil;
+          --  The "mark" array of Tarjan's algorithm. Since the original visits
+          --  all vertices in increasing ordinal number 1 .. N, the array offers
+          --  a one-to-one mapping between a vertex and its "marked" state. The
+          --  modified version however visits vertices within components, where
+          --  their ordinals are not contiguous. Vertices are added to this set
+          --  and treated as "marked".
+ 
+          Visited_Stack : LGV_Lists.Doubly_Linked_List := LGV_Lists.Nil;
+          --  The "marked stack" of Tarjan's algorithm
+ 
+       begin
+          Trace_Component (G, Comp, No_Indentation);
+ 
+          --  Initialize all component-level data structures
+ 
+          Cycle_Path_Stack := LGE_Lists.Create;
+          Deleted_Vertices := LGV_Sets.Create (Num_Of_Vertices);
+          Visited_Set      := LGV_Sets.Create (Num_Of_Vertices);
+          Visited_Stack    := LGV_Lists.Create;
+ 
+          --  The modified version does not use ordinals to visit vertices in
+          --  1 .. N fashion. To preserve the invariant of the original, this
+          --  version deletes a vertex after its depth-first search completes.
+          --  The timing of the deletion is sound because all cycles through
+          --  that vertex have already been discovered, thus the vertex cannot
+          --  contribute to any cycles discovered "later" in the algorithm.
+ 
+          Iter := Iterate_Component_Vertices (G, Comp);
+          while Has_Next (Iter) loop
+             Next (Iter, Vertex);
+ 
+             --  Construct the set of vertices (at most 2) that terminates a
+             --  potential cycle that starts from the current vertex.
+ 
+             End_Vertices :=
+               Cycle_End_Vertices
+                 (G                    => G,
+                  Vertex               => Vertex,
+                  Elaborate_All_Active => Elaborate_All_Active);
+ 
+             --  The modified version maintains two additional attributes while
+             --  performing the depth-first search:
+             --
+             --    * The most significant edge of the current potential cycle.
+             --
+             --    * The number of invocation edges encountered along the path
+             --      of the current potential cycle.
+             --
+             --  Both attributes are used in the heuristic that determines the
+             --  importance of cycles.
+ 
+             Find_Cycles_From_Vertex
+               (G                     => G,
+                Vertex                => Vertex,
+                End_Vertices          => End_Vertices,
+                Deleted_Vertices      => Deleted_Vertices,
+                Most_Significant_Edge => No_Library_Graph_Edge,
+                Invocation_Edge_Count => 0,
+                Cycle_Path_Stack      => Cycle_Path_Stack,
+                Visited_Set           => Visited_Set,
+                Visited_Stack         => Visited_Stack,
+                Cycle_Count           => Cycle_Count,
+                Cycle_Limit           => Cycle_Limit,
+                Elaborate_All_Active  => Elaborate_All_Active,
+                Is_Start_Vertex       => True,
+                Has_Cycle             => Has_Cycle,
+                Indent                => Nested_Indentation);
+ 
+             --  Destroy the cycle-terminating vertices because a new set must
+             --  be constructed for the next vertex.
+ 
+             LGV_Sets.Destroy (End_Vertices);
+          end loop;
+ 
+          --  Destroy all component-level data structures
+ 
+          LGE_Lists.Destroy (Cycle_Path_Stack);
+          LGV_Sets.Destroy  (Deleted_Vertices);
+          LGV_Sets.Destroy  (Visited_Set);
+          LGV_Lists.Destroy (Visited_Stack);
+       end Find_Cycles_In_Component;
+ 
+       ---------------------------------------
+       -- Find_First_Lower_Precedence_Cycle --
+       ---------------------------------------
+ 
+       function Find_First_Lower_Precedence_Cycle
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Library_Graph_Cycle_Id
+       is
+          Current_Cycle : Library_Graph_Cycle_Id;
+          Iter          : All_Cycle_Iterator;
+          Lesser_Cycle  : Library_Graph_Cycle_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          --  Assume that there is no lesser cycle
+ 
+          Lesser_Cycle := No_Library_Graph_Cycle;
+ 
+          --  Find a cycle with a slightly lower precedence than the input
+          --  cycle.
+          --
+          --  IMPORTANT:
+          --
+          --    * The iterator must run to completion in order to unlock the
+          --      list of all cycles.
+ 
+          Iter := Iterate_All_Cycles (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Current_Cycle);
+ 
+             if not Present (Lesser_Cycle)
+               and then Cycle_Precedence
+                          (G           => G,
+                           Cycle       => Cycle,
+                           Compared_To => Current_Cycle) = Higher_Precedence
+             then
+                Lesser_Cycle := Current_Cycle;
+             end if;
+          end loop;
+ 
+          return Lesser_Cycle;
+       end Find_First_Lower_Precedence_Cycle;
+ 
+       ------------------------------
+       -- Get_Component_Attributes --
+       ------------------------------
+ 
+       function Get_Component_Attributes
+         (G    : Library_Graph;
+          Comp : Component_Id) return Component_Attributes
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          return Component_Tables.Get (G.Component_Attributes, Comp);
+       end Get_Component_Attributes;
+ 
+       ------------------------
+       -- Get_LGC_Attributes --
+       ------------------------
+ 
+       function Get_LGC_Attributes
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Library_Graph_Cycle_Attributes
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          return LGC_Tables.Get (G.Cycle_Attributes, Cycle);
+       end Get_LGC_Attributes;
+ 
+       ------------------------
+       -- Get_LGE_Attributes --
+       ------------------------
+ 
+       function Get_LGE_Attributes
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Library_Graph_Edge_Attributes
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return LGE_Tables.Get (G.Edge_Attributes, Edge);
+       end Get_LGE_Attributes;
+ 
+       ------------------------
+       -- Get_LGV_Attributes --
+       ------------------------
+ 
+       function Get_LGV_Attributes
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id)
+          return Library_Graph_Vertex_Attributes
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return LGV_Tables.Get (G.Vertex_Attributes, Vertex);
+       end Get_LGV_Attributes;
+ 
+       -----------------------------
+       -- Has_Elaborate_All_Cycle --
+       -----------------------------
+ 
+       function Has_Elaborate_All_Cycle (G : Library_Graph) return Boolean is
+          Edge : Library_Graph_Edge_Id;
+          Iter : All_Edge_Iterator;
+          Seen : Boolean;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          --  Assume that no cyclic Elaborate_All edge has been seen
+ 
+          Seen := False;
+ 
+          --  IMPORTANT:
+          --
+          --    * The iteration must run to completion in order to unlock the
+          --      graph.
+ 
+          Iter := Iterate_All_Edges (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+ 
+             if not Seen and then Is_Cyclic_Elaborate_All_Edge (G, Edge) then
+                Seen := True;
+             end if;
+          end loop;
+ 
+          return Seen;
+       end Has_Elaborate_All_Cycle;
+ 
+       ----------------------------
+       -- Has_Elaborate_All_Edge --
+       ----------------------------
+ 
+       function Has_Elaborate_All_Edge
+         (G    : Library_Graph;
+          Comp : Component_Id) return Boolean
+       is
+          Has_Edge : Boolean;
+          Iter     : Component_Vertex_Iterator;
+          Vertex   : Library_Graph_Vertex_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          --  Assume that there is no Elaborate_All edge
+ 
+          Has_Edge := False;
+ 
+          --  IMPORTANT:
+          --
+          --    * The iteration must run to completion in order to unlock the
+          --      component vertices.
+ 
+          Iter := Iterate_Component_Vertices (G, Comp);
+          while Has_Next (Iter) loop
+             Next (Iter, Vertex);
+ 
+             Has_Edge := Has_Edge or else Has_Elaborate_All_Edge (G, Vertex);
+          end loop;
+ 
+          return Has_Edge;
+       end Has_Elaborate_All_Edge;
+ 
+       ----------------------------
+       -- Has_Elaborate_All_Edge --
+       ----------------------------
+ 
+       function Has_Elaborate_All_Edge
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+          Edge     : Library_Graph_Edge_Id;
+          Has_Edge : Boolean;
+          Iter     : Edges_To_Successors_Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          --  Assume that there is no Elaborate_All edge
+ 
+          Has_Edge := False;
+ 
+          --  IMPORTANT:
+          --
+          --    * The iteration must run to completion in order to unlock the
+          --      edges to successors.
+ 
+          Iter := Iterate_Edges_To_Successors (G, Vertex);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+ 
+             Has_Edge :=
+               Has_Edge or else Is_Cyclic_Elaborate_All_Edge (G, Edge);
+          end loop;
+ 
+          return Has_Edge;
+       end Has_Elaborate_All_Edge;
+ 
+       ------------------------
+       -- Has_Elaborate_Body --
+       ------------------------
+ 
+       function Has_Elaborate_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          U_Id  : constant Unit_Id := Unit (G, Vertex);
+          U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+       begin
+          --  Treat the spec and body as decoupled when switch -d_b (ignore the
+          --  effects of pragma Elaborate_Body) is in effect.
+ 
+          return U_Rec.Elaborate_Body and not Debug_Flag_Underscore_B;
+       end Has_Elaborate_Body;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : All_Cycle_Iterator) return Boolean is
+       begin
+          return LGC_Lists.Has_Next (LGC_Lists.Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : All_Edge_Iterator) return Boolean is
+       begin
+          return DG.Has_Next (DG.All_Edge_Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : All_Vertex_Iterator) return Boolean is
+       begin
+          return DG.Has_Next (DG.All_Vertex_Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : Component_Iterator) return Boolean is
+       begin
+          return DG.Has_Next (DG.Component_Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : Component_Vertex_Iterator) return Boolean is
+       begin
+          return DG.Has_Next (DG.Component_Vertex_Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : Edges_Of_Cycle_Iterator) return Boolean is
+       begin
+          return LGE_Lists.Has_Next (LGE_Lists.Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : Edges_To_Successors_Iterator) return Boolean is
+       begin
+          return DG.Has_Next (DG.Outgoing_Edge_Iterator (Iter));
+       end Has_Next;
+ 
+       -----------------------------
+       -- Has_No_Elaboration_Code --
+       -----------------------------
+ 
+       function Has_No_Elaboration_Code
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Has_No_Elaboration_Code (Unit (G, Vertex));
+       end Has_No_Elaboration_Code;
+ 
+       -----------------------------------------
+       -- Hash_Library_Graph_Cycle_Attributes --
+       -----------------------------------------
+ 
+       function Hash_Library_Graph_Cycle_Attributes
+         (Attrs : Library_Graph_Cycle_Attributes) return Bucket_Range_Type
+       is
+          Edge : Library_Graph_Edge_Id;
+          Hash : Bucket_Range_Type;
+          Iter : LGE_Lists.Iterator;
+ 
+       begin
+          pragma Assert (LGE_Lists.Present (Attrs.Path));
+ 
+          --  The hash is obtained in the following manner:
+          --
+          --    (((edge1 * 31) + edge2) * 31) + edgeN
+ 
+          Hash := 0;
+          Iter := LGE_Lists.Iterate (Attrs.Path);
+          while LGE_Lists.Has_Next (Iter) loop
+             LGE_Lists.Next (Iter, Edge);
+ 
+             Hash := (Hash * 31) + Bucket_Range_Type (Edge);
+          end loop;
+ 
+          return Hash;
+       end Hash_Library_Graph_Cycle_Attributes;
+ 
+       -----------------------------------------
+       -- Hash_Predecessor_Successor_Relation --
+       -----------------------------------------
+ 
+       function Hash_Predecessor_Successor_Relation
+         (Rel : Predecessor_Successor_Relation) return Bucket_Range_Type
+       is
+       begin
+          pragma Assert (Present (Rel.Predecessor));
+          pragma Assert (Present (Rel.Successor));
+ 
+          return
+            Hash_Two_Keys
+              (Bucket_Range_Type (Rel.Predecessor),
+               Bucket_Range_Type (Rel.Successor));
+       end Hash_Predecessor_Successor_Relation;
+ 
+       ------------------------------
+       -- Highest_Precedence_Cycle --
+       ------------------------------
+ 
+       function Highest_Precedence_Cycle
+         (G : Library_Graph) return Library_Graph_Cycle_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (LGC_Lists.Present (G.Cycles));
+ 
+          if LGC_Lists.Is_Empty (G.Cycles) then
+             return No_Library_Graph_Cycle;
+ 
+          --  The highest precedence cycle is always the first in the list of
+          --  all cycles.
+ 
+          else
+             return LGC_Lists.First (G.Cycles);
+          end if;
+       end Highest_Precedence_Cycle;
+ 
+       -----------------------------
+       -- Highest_Precedence_Edge --
+       -----------------------------
+ 
+       function Highest_Precedence_Edge
+         (G     : Library_Graph;
+          Left  : Library_Graph_Edge_Id;
+          Right : Library_Graph_Edge_Id) return Library_Graph_Edge_Id
+       is
+          Edge_Prec : Precedence_Kind;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          --  Both edges are available, pick the one with highest precedence
+ 
+          if Present (Left) and then Present (Right) then
+             Edge_Prec :=
+               Edge_Precedence
+                 (G           => G,
+                  Edge        => Left,
+                  Compared_To => Right);
+ 
+             if Edge_Prec = Higher_Precedence then
+                return Left;
+ 
+             --  The precedence rules for edges are such that no two edges can
+             --  ever have the same precedence.
+ 
+             else
+                pragma Assert (Edge_Prec = Lower_Precedence);
+                return Right;
+             end if;
+ 
+          --  Otherwise at least one edge must be present
+ 
+          elsif Present (Left) then
+             return Left;
+ 
+          else
+             pragma Assert (Present (Right));
+ 
+             return Right;
+          end if;
+       end Highest_Precedence_Edge;
+ 
+       --------------------------
+       -- In_Elaboration_Order --
+       --------------------------
+ 
+       function In_Elaboration_Order
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Get_LGV_Attributes (G, Vertex).In_Elaboration_Order;
+       end In_Elaboration_Order;
+ 
+       -----------------------
+       -- In_Same_Component --
+       -----------------------
+ 
+       function In_Same_Component
+         (G     : Library_Graph;
+          Left  : Library_Graph_Vertex_Id;
+          Right : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Left));
+          pragma Assert (Present (Right));
+ 
+          return Component (G, Left) = Component (G, Right);
+       end In_Same_Component;
+ 
+       ----------------------------------------
+       -- Increment_Library_Graph_Edge_Count --
+       ----------------------------------------
+ 
+       procedure Increment_Library_Graph_Edge_Count
+         (G    : Library_Graph;
+          Kind : Library_Graph_Edge_Kind)
+       is
+          pragma Assert (Present (G));
+ 
+          Count : Natural renames G.Counts (Kind);
+ 
+       begin
+          Count := Count + 1;
+       end Increment_Library_Graph_Edge_Count;
+ 
+       ------------------------------------
+       -- Increment_Pending_Predecessors --
+       ------------------------------------
+ 
+       procedure Increment_Pending_Predecessors
+         (G    : Library_Graph;
+          Comp : Component_Id;
+          Edge : Library_Graph_Edge_Id)
+       is
+          Attrs : Component_Attributes;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          Attrs := Get_Component_Attributes (G, Comp);
+ 
+          Update_Pending_Predecessors
+            (Strong_Predecessors => Attrs.Pending_Strong_Predecessors,
+             Weak_Predecessors   => Attrs.Pending_Weak_Predecessors,
+             Update_Weak         => Is_Invocation_Edge (G, Edge),
+             Value               => 1);
+ 
+          Set_Component_Attributes (G, Comp, Attrs);
+       end Increment_Pending_Predecessors;
+ 
+       ------------------------------------
+       -- Increment_Pending_Predecessors --
+       ------------------------------------
+ 
+       procedure Increment_Pending_Predecessors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Edge   : Library_Graph_Edge_Id)
+       is
+          Attrs : Library_Graph_Vertex_Attributes;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          Attrs := Get_LGV_Attributes (G, Vertex);
+ 
+          Update_Pending_Predecessors
+            (Strong_Predecessors => Attrs.Pending_Strong_Predecessors,
+             Weak_Predecessors   => Attrs.Pending_Weak_Predecessors,
+             Update_Weak         => Is_Invocation_Edge (G, Edge),
+             Value               => 1);
+ 
+          Set_LGV_Attributes (G, Vertex, Attrs);
+       end Increment_Pending_Predecessors;
+ 
+       ---------------------------
+       -- Initialize_Components --
+       ---------------------------
+ 
+       procedure Initialize_Components (G : Library_Graph) is
+       begin
+          pragma Assert (Present (G));
+ 
+          --  The graph already contains a set of components. Reinitialize
+          --  them in order to accommodate the new set of components about to
+          --  be computed.
+ 
+          if Number_Of_Components (G) > 0 then
+             Component_Tables.Destroy (G.Component_Attributes);
+ 
+             G.Component_Attributes :=
+               Component_Tables.Create (Number_Of_Vertices (G));
+          end if;
+       end Initialize_Components;
+ 
+       ---------------------------
+       -- Invocation_Edge_Count --
+       ---------------------------
+ 
+       function Invocation_Edge_Count
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Natural
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          return Get_LGC_Attributes (G, Cycle).Invocation_Edge_Count;
+       end Invocation_Edge_Count;
+ 
+       -------------------------------
+       -- Invocation_Graph_Encoding --
+       -------------------------------
+ 
+       function Invocation_Graph_Encoding
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id)
+          return Invocation_Graph_Encoding_Kind
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Invocation_Graph_Encoding (Unit (G, Vertex));
+       end Invocation_Graph_Encoding;
+ 
+       -------------
+       -- Is_Body --
+       -------------
+ 
+       function Is_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          U_Id  : constant Unit_Id := Unit (G, Vertex);
+          U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+       begin
+          return U_Rec.Utype = Is_Body or else U_Rec.Utype = Is_Body_Only;
+       end Is_Body;
+ 
+       -----------------------------------------
+       -- Is_Body_Of_Spec_With_Elaborate_Body --
+       -----------------------------------------
+ 
+       function Is_Body_Of_Spec_With_Elaborate_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          if Is_Body_With_Spec (G, Vertex) then
+             return
+               Is_Spec_With_Elaborate_Body
+                 (G      => G,
+                  Vertex => Proper_Spec (G, Vertex));
+          end if;
+ 
+          return False;
+       end Is_Body_Of_Spec_With_Elaborate_Body;
+ 
+       -----------------------
+       -- Is_Body_With_Spec --
+       -----------------------
+ 
+       function Is_Body_With_Spec
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          U_Id  : constant Unit_Id := Unit (G, Vertex);
+          U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+       begin
+          return U_Rec.Utype = Is_Body;
+       end Is_Body_With_Spec;
+ 
+       ------------------------------
+       -- Is_Cycle_Initiating_Edge --
+       ------------------------------
+ 
+       function Is_Cycle_Initiating_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return
+            Is_Cyclic_Elaborate_All_Edge (G, Edge)
+              or else Is_Cyclic_Elaborate_Body_Edge (G, Edge)
+              or else Is_Cyclic_Elaborate_Edge (G, Edge)
+              or else Is_Cyclic_Forced_Edge (G, Edge)
+              or else Is_Cyclic_Invocation_Edge (G, Edge);
+       end Is_Cycle_Initiating_Edge;
+ 
+       --------------------
+       -- Is_Cyclic_Edge --
+       --------------------
+ 
+       function Is_Cyclic_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return
+            Is_Cycle_Initiating_Edge (G, Edge)
+              or else Is_Cyclic_With_Edge (G, Edge);
+       end Is_Cyclic_Edge;
+ 
+       ----------------------------------
+       -- Is_Cyclic_Elaborate_All_Edge --
+       ----------------------------------
+ 
+       function Is_Cyclic_Elaborate_All_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return
+            Is_Elaborate_All_Edge (G, Edge)
+              and then Links_Vertices_In_Same_Component (G, Edge);
+       end Is_Cyclic_Elaborate_All_Edge;
+ 
+       -----------------------------------
+       -- Is_Cyclic_Elaborate_Body_Edge --
+       -----------------------------------
+ 
+       function Is_Cyclic_Elaborate_Body_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return
+            Is_Elaborate_Body_Edge (G, Edge)
+              and then Links_Vertices_In_Same_Component (G, Edge);
+       end Is_Cyclic_Elaborate_Body_Edge;
+ 
+       ------------------------------
+       -- Is_Cyclic_Elaborate_Edge --
+       ------------------------------
+ 
+       function Is_Cyclic_Elaborate_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return
+            Is_Elaborate_Edge (G, Edge)
+              and then Links_Vertices_In_Same_Component (G, Edge);
+       end Is_Cyclic_Elaborate_Edge;
+ 
+       ---------------------------
+       -- Is_Cyclic_Forced_Edge --
+       ---------------------------
+ 
+       function Is_Cyclic_Forced_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return
+            Is_Forced_Edge (G, Edge)
+              and then Links_Vertices_In_Same_Component (G, Edge);
+       end Is_Cyclic_Forced_Edge;
+ 
+       -------------------------------
+       -- Is_Cyclic_Invocation_Edge --
+       -------------------------------
+ 
+       function Is_Cyclic_Invocation_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return
+            Is_Invocation_Edge (G, Edge)
+              and then Links_Vertices_In_Same_Component (G, Edge);
+       end Is_Cyclic_Invocation_Edge;
+ 
+       -------------------------
+       -- Is_Cyclic_With_Edge --
+       -------------------------
+ 
+       function Is_Cyclic_With_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          --  Ignore Elaborate_Body edges because they also appear as with
+          --  edges, but have special successors.
+ 
+          return
+            Is_With_Edge (G, Edge)
+              and then Links_Vertices_In_Same_Component (G, Edge)
+              and then not Is_Elaborate_Body_Edge (G, Edge);
+       end Is_Cyclic_With_Edge;
+ 
+       -------------------------------
+       -- Is_Dynamically_Elaborated --
+       -------------------------------
+ 
+       function Is_Dynamically_Elaborated
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Is_Dynamically_Elaborated (Unit (G, Vertex));
+       end Is_Dynamically_Elaborated;
+ 
+       -----------------------------
+       -- Is_Elaborable_Component --
+       -----------------------------
+ 
+       function Is_Elaborable_Component
+         (G    : Library_Graph;
+          Comp : Component_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          --  A component is elaborable when:
+          --
+          --    * It is not waiting on strong predecessors, and
+          --    * It is not waiting on weak predecessors
+ 
+          return
+            Pending_Strong_Predecessors (G, Comp) = 0
+              and then Pending_Weak_Predecessors (G, Comp) = 0;
+       end Is_Elaborable_Component;
+ 
+       --------------------------
+       -- Is_Elaborable_Vertex --
+       --------------------------
+ 
+       function Is_Elaborable_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          Complement : constant Library_Graph_Vertex_Id :=
+                         Complementary_Vertex
+                           (G                => G,
+                            Vertex           => Vertex,
+                            Force_Complement => False);
+ 
+          Strong_Preds : Natural;
+          Weak_Preds   : Natural;
+ 
+       begin
+          --  A vertex is elaborable when:
+          --
+          --    * It has not been elaborated yet, and
+          --    * The complement vertex of an Elaborate_Body pair has not been
+          --      elaborated yet, and
+          --    * It resides within an elaborable component, and
+          --    * It is not waiting on strong predecessors, and
+          --    * It is not waiting on weak predecessors
+ 
+          if In_Elaboration_Order (G, Vertex) then
+             return False;
+ 
+          elsif Present (Complement)
+            and then In_Elaboration_Order (G, Complement)
+          then
+             return False;
+ 
+          elsif not Is_Elaborable_Component (G, Component (G, Vertex)) then
+             return False;
+          end if;
+ 
+          Pending_Predecessors_For_Elaboration
+            (G            => G,
+             Vertex       => Vertex,
+             Strong_Preds => Strong_Preds,
+             Weak_Preds   => Weak_Preds);
+ 
+          return Strong_Preds = 0 and then Weak_Preds = 0;
+       end Is_Elaborable_Vertex;
+ 
+       ---------------------------
+       -- Is_Elaborate_All_Edge --
+       ---------------------------
+ 
+       function Is_Elaborate_All_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return Kind (G, Edge) = Elaborate_All_Edge;
+       end Is_Elaborate_All_Edge;
+ 
+       ----------------------------
+       -- Is_Elaborate_Body_Edge --
+       ----------------------------
+ 
+       function Is_Elaborate_Body_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return
+            Kind (G, Edge) = With_Edge
+              and then Is_Vertex_With_Elaborate_Body (G, Successor (G, Edge));
+       end Is_Elaborate_Body_Edge;
+ 
+       -----------------------
+       -- Is_Elaborate_Edge --
+       -----------------------
+ 
+       function Is_Elaborate_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return Kind (G, Edge) = Elaborate_Edge;
+       end Is_Elaborate_Edge;
+ 
+       ----------------------------
+       -- Is_Elaborate_Body_Pair --
+       ----------------------------
+ 
+       function Is_Elaborate_Body_Pair
+         (G           : Library_Graph;
+          Spec_Vertex : Library_Graph_Vertex_Id;
+          Body_Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Spec_Vertex));
+          pragma Assert (Present (Body_Vertex));
+ 
+          return
+            Is_Spec_With_Elaborate_Body (G, Spec_Vertex)
+              and then Is_Body_Of_Spec_With_Elaborate_Body (G, Body_Vertex)
+              and then Proper_Body (G, Spec_Vertex) = Body_Vertex;
+       end Is_Elaborate_Body_Pair;
+ 
+       --------------------
+       -- Is_Forced_Edge --
+       --------------------
+ 
+       function Is_Forced_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return Kind (G, Edge) = Forced_Edge;
+       end Is_Forced_Edge;
+ 
+       ----------------------
+       -- Is_Internal_Unit --
+       ----------------------
+ 
+       function Is_Internal_Unit
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Is_Internal_Unit (Unit (G, Vertex));
+       end Is_Internal_Unit;
+ 
+       ------------------------
+       -- Is_Invocation_Edge --
+       ------------------------
+ 
+       function Is_Invocation_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return Kind (G, Edge) = Invocation_Edge;
+       end Is_Invocation_Edge;
+ 
+       ------------------------
+       -- Is_Predefined_Unit --
+       ------------------------
+ 
+       function Is_Predefined_Unit
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Is_Predefined_Unit (Unit (G, Vertex));
+       end Is_Predefined_Unit;
+ 
+       ---------------------------
+       -- Is_Preelaborated_Unit --
+       ---------------------------
+ 
+       function Is_Preelaborated_Unit
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          U_Id  : constant Unit_Id := Unit (G, Vertex);
+          U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+       begin
+          return U_Rec.Preelab or else U_Rec.Pure;
+       end Is_Preelaborated_Unit;
+ 
+       ----------------------
+       -- Is_Recorded_Edge --
+       ----------------------
+ 
+       function Is_Recorded_Edge
+         (G   : Library_Graph;
+          Rel : Predecessor_Successor_Relation) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Rel.Predecessor));
+          pragma Assert (Present (Rel.Successor));
+ 
+          return RE_Sets.Contains (G.Recorded_Edges, Rel);
+       end Is_Recorded_Edge;
+ 
+       -------------
+       -- Is_Spec --
+       -------------
+ 
+       function Is_Spec
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          U_Id  : constant Unit_Id := Unit (G, Vertex);
+          U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+       begin
+          return U_Rec.Utype = Is_Spec or else U_Rec.Utype = Is_Spec_Only;
+       end Is_Spec;
+ 
+       ------------------------------
+       -- Is_Spec_Before_Body_Edge --
+       ------------------------------
+ 
+       function Is_Spec_Before_Body_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return Kind (G, Edge) = Spec_Before_Body_Edge;
+       end Is_Spec_Before_Body_Edge;
+ 
+       -----------------------
+       -- Is_Spec_With_Body --
+       -----------------------
+ 
+       function Is_Spec_With_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          U_Id  : constant Unit_Id := Unit (G, Vertex);
+          U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+       begin
+          return U_Rec.Utype = Is_Spec;
+       end Is_Spec_With_Body;
+ 
+       ---------------------------------
+       -- Is_Spec_With_Elaborate_Body --
+       ---------------------------------
+ 
+       function Is_Spec_With_Elaborate_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return
+            Is_Spec_With_Body (G, Vertex)
+              and then Has_Elaborate_Body (G, Vertex);
+       end Is_Spec_With_Elaborate_Body;
+ 
+       ------------------------------
+       -- Is_Static_Successor_Edge --
+       ------------------------------
+ 
+       function Is_Static_Successor_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return
+            Is_Invocation_Edge (G, Edge)
+              and then not Is_Dynamically_Elaborated (G, Successor (G, Edge));
+       end Is_Static_Successor_Edge;
+ 
+       -----------------------------------
+       -- Is_Vertex_With_Elaborate_Body --
+       -----------------------------------
+ 
+       function Is_Vertex_With_Elaborate_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return
+            Is_Spec_With_Elaborate_Body (G, Vertex)
+              or else
+            Is_Body_Of_Spec_With_Elaborate_Body (G, Vertex);
+       end Is_Vertex_With_Elaborate_Body;
+ 
+       ---------------------------------
+       -- Is_Weakly_Elaborable_Vertex --
+       ----------------------------------
+ 
+       function Is_Weakly_Elaborable_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          Complement : constant Library_Graph_Vertex_Id :=
+                         Complementary_Vertex
+                           (G                => G,
+                            Vertex           => Vertex,
+                            Force_Complement => False);
+ 
+          Strong_Preds : Natural;
+          Weak_Preds   : Natural;
+ 
+       begin
+          --  A vertex is weakly elaborable when:
+          --
+          --    * It has not been elaborated yet, and
+          --    * The complement vertex of an Elaborate_Body pair has not been
+          --      elaborated yet, and
+          --    * It resides within an elaborable component, and
+          --    * It is not waiting on strong predecessors, and
+          --    * It is waiting on at least one weak predecessor
+ 
+          if In_Elaboration_Order (G, Vertex) then
+             return False;
+ 
+          elsif Present (Complement)
+            and then In_Elaboration_Order (G, Complement)
+          then
+             return False;
+ 
+          elsif not Is_Elaborable_Component (G, Component (G, Vertex)) then
+             return False;
+          end if;
+ 
+          Pending_Predecessors_For_Elaboration
+            (G            => G,
+             Vertex       => Vertex,
+             Strong_Preds => Strong_Preds,
+             Weak_Preds   => Weak_Preds);
+ 
+          return Strong_Preds = 0 and then Weak_Preds >= 1;
+       end Is_Weakly_Elaborable_Vertex;
+ 
+       ------------------
+       -- Is_With_Edge --
+       ------------------
+ 
+       function Is_With_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return Kind (G, Edge) = With_Edge;
+       end Is_With_Edge;
+ 
+       ------------------------
+       -- Iterate_All_Cycles --
+       ------------------------
+ 
+       function Iterate_All_Cycles
+         (G : Library_Graph) return All_Cycle_Iterator
+       is
+       begin
+          pragma Assert (Present (G));
+ 
+          return All_Cycle_Iterator (LGC_Lists.Iterate (G.Cycles));
+       end Iterate_All_Cycles;
+ 
+       -----------------------
+       -- Iterate_All_Edges --
+       -----------------------
+ 
+       function Iterate_All_Edges
+         (G : Library_Graph) return All_Edge_Iterator
+       is
+       begin
+          pragma Assert (Present (G));
+ 
+          return All_Edge_Iterator (DG.Iterate_All_Edges (G.Graph));
+       end Iterate_All_Edges;
+ 
+       --------------------------
+       -- Iterate_All_Vertices --
+       --------------------------
+ 
+       function Iterate_All_Vertices
+         (G : Library_Graph) return All_Vertex_Iterator
+       is
+       begin
+          pragma Assert (Present (G));
+ 
+          return All_Vertex_Iterator (DG.Iterate_All_Vertices (G.Graph));
+       end Iterate_All_Vertices;
+ 
+       ------------------------
+       -- Iterate_Components --
+       ------------------------
+ 
+       function Iterate_Components
+         (G : Library_Graph) return Component_Iterator
+       is
+       begin
+          pragma Assert (Present (G));
+ 
+          return Component_Iterator (DG.Iterate_Components (G.Graph));
+       end Iterate_Components;
+ 
+       --------------------------------
+       -- Iterate_Component_Vertices --
+       --------------------------------
+ 
+       function Iterate_Component_Vertices
+         (G    : Library_Graph;
+          Comp : Component_Id) return Component_Vertex_Iterator
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          return
+            Component_Vertex_Iterator
+              (DG.Iterate_Component_Vertices (G.Graph, Comp));
+       end Iterate_Component_Vertices;
+ 
+       ----------------------------
+       -- Iterate_Edges_Of_Cycle --
+       ----------------------------
+ 
+       function Iterate_Edges_Of_Cycle
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Edges_Of_Cycle_Iterator
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          return Edges_Of_Cycle_Iterator (LGE_Lists.Iterate (Path (G, Cycle)));
+       end Iterate_Edges_Of_Cycle;
+ 
+       ---------------------------------
+       -- Iterate_Edges_To_Successors --
+       ---------------------------------
+ 
+       function Iterate_Edges_To_Successors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Edges_To_Successors_Iterator
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return
+            Edges_To_Successors_Iterator
+              (DG.Iterate_Outgoing_Edges (G.Graph, Vertex));
+       end Iterate_Edges_To_Successors;
+ 
+       ----------
+       -- Kind --
+       ----------
+ 
+       function Kind
+         (G      : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Library_Graph_Cycle_Kind
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          return Get_LGC_Attributes (G, Cycle).Kind;
+       end Kind;
+ 
+       ----------
+       -- Kind --
+       ----------
+ 
+       function Kind
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Library_Graph_Edge_Kind
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return Get_LGE_Attributes (G, Edge).Kind;
+       end Kind;
+ 
+       ------------
+       -- Length --
+       ------------
+ 
+       function Length
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Natural
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          return LGE_Lists.Size (Path (G, Cycle));
+       end Length;
+ 
+       ------------------------------
+       -- Library_Graph_Edge_Count --
+       ------------------------------
+ 
+       function Library_Graph_Edge_Count
+         (G    : Library_Graph;
+          Kind : Library_Graph_Edge_Kind) return Natural
+       is
+       begin
+          pragma Assert (Present (G));
+ 
+          return G.Counts (Kind);
+       end Library_Graph_Edge_Count;
+ 
+       --------------------------------------
+       -- Links_Vertices_In_Same_Component --
+       --------------------------------------
+ 
+       function Links_Vertices_In_Same_Component
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          --  An edge is part of a cycle when both the successor and predecessor
+          --  reside in the same component.
+ 
+          return
+            In_Same_Component
+              (G     => G,
+               Left  => Predecessor (G, Edge),
+               Right => Successor   (G, Edge));
+       end Links_Vertices_In_Same_Component;
+ 
+       -----------------------------------
+       -- Maximum_Invocation_Edge_Count --
+       -----------------------------------
+ 
+       function Maximum_Invocation_Edge_Count
+         (G     : Library_Graph;
+          Edge  : Library_Graph_Edge_Id;
+          Count : Natural) return Natural
+       is
+          New_Count : Natural;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          New_Count := Count;
+ 
+          if Present (Edge) and then Is_Invocation_Edge (G, Edge) then
+             New_Count := New_Count + 1;
+          end if;
+ 
+          return New_Count;
+       end Maximum_Invocation_Edge_Count;
+ 
+       ----------
+       -- Name --
+       ----------
+ 
+       function Name
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Unit_Name_Type
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Name (Unit (G, Vertex));
+       end Name;
+ 
+       -----------------------
+       -- Needs_Elaboration --
+       -----------------------
+ 
+       function Needs_Elaboration
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Needs_Elaboration (Unit (G, Vertex));
+       end Needs_Elaboration;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter  : in out All_Cycle_Iterator;
+          Cycle : out Library_Graph_Cycle_Id)
+       is
+       begin
+          LGC_Lists.Next (LGC_Lists.Iterator (Iter), Cycle);
+       end Next;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter : in out All_Edge_Iterator;
+          Edge : out Library_Graph_Edge_Id)
+       is
+       begin
+          DG.Next (DG.All_Edge_Iterator (Iter), Edge);
+       end Next;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter   : in out All_Vertex_Iterator;
+          Vertex : out Library_Graph_Vertex_Id)
+       is
+       begin
+          DG.Next (DG.All_Vertex_Iterator (Iter), Vertex);
+       end Next;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter : in out Edges_Of_Cycle_Iterator;
+          Edge : out Library_Graph_Edge_Id)
+       is
+       begin
+          LGE_Lists.Next (LGE_Lists.Iterator (Iter), Edge);
+       end Next;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter : in out Component_Iterator;
+          Comp : out Component_Id)
+       is
+       begin
+          DG.Next (DG.Component_Iterator (Iter), Comp);
+       end Next;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter : in out Edges_To_Successors_Iterator;
+          Edge : out Library_Graph_Edge_Id)
+       is
+       begin
+          DG.Next (DG.Outgoing_Edge_Iterator (Iter), Edge);
+       end Next;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter   : in out Component_Vertex_Iterator;
+          Vertex : out Library_Graph_Vertex_Id)
+       is
+       begin
+          DG.Next (DG.Component_Vertex_Iterator (Iter), Vertex);
+       end Next;
+ 
+       --------------------------
+       -- Normalize_Cycle_Path --
+       --------------------------
+ 
+       procedure Normalize_Cycle_Path
+         (Cycle_Path            : LGE_Lists.Doubly_Linked_List;
+          Most_Significant_Edge : Library_Graph_Edge_Id)
+       is
+          Edge : Library_Graph_Edge_Id;
+ 
+       begin
+          pragma Assert (LGE_Lists.Present (Cycle_Path));
+          pragma Assert (Present (Most_Significant_Edge));
+ 
+          --  Perform at most |Cycle_Path| rotations in case the cycle is
+          --  malformed and the significant edge does not appear within.
+ 
+          for Rotation in 1 .. LGE_Lists.Size (Cycle_Path) loop
+             Edge := LGE_Lists.First (Cycle_Path);
+ 
+             --  The cycle is already rotated such that the most significant
+             --  edge is first.
+ 
+             if Edge = Most_Significant_Edge then
+                return;
+ 
+             --  Otherwise rotate the cycle by relocating the current edge from
+             --  the start to the end of the path. This preserves the order of
+             --  the path.
+ 
+             else
+                LGE_Lists.Delete_First (Cycle_Path);
+                LGE_Lists.Append (Cycle_Path, Edge);
+             end if;
+          end loop;
+ 
+          pragma Assert (False);
+       end Normalize_Cycle_Path;
+ 
+       ----------------------------------
+       -- Number_Of_Component_Vertices --
+       ----------------------------------
+ 
+       function Number_Of_Component_Vertices
+         (G    : Library_Graph;
+          Comp : Component_Id) return Natural
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          return DG.Number_Of_Component_Vertices (G.Graph, Comp);
+       end Number_Of_Component_Vertices;
+ 
+       --------------------------
+       -- Number_Of_Components --
+       --------------------------
+ 
+       function Number_Of_Components (G : Library_Graph) return Natural is
+       begin
+          pragma Assert (Present (G));
+ 
+          return DG.Number_Of_Components (G.Graph);
+       end Number_Of_Components;
+ 
+       ----------------------
+       -- Number_Of_Cycles --
+       ----------------------
+ 
+       function Number_Of_Cycles (G : Library_Graph) return Natural is
+       begin
+          pragma Assert (Present (G));
+ 
+          return LGC_Lists.Size (G.Cycles);
+       end Number_Of_Cycles;
+ 
+       ---------------------
+       -- Number_Of_Edges --
+       ---------------------
+ 
+       function Number_Of_Edges (G : Library_Graph) return Natural is
+       begin
+          pragma Assert (Present (G));
+ 
+          return DG.Number_Of_Edges (G.Graph);
+       end Number_Of_Edges;
+ 
+       -----------------------------------
+       -- Number_Of_Edges_To_Successors --
+       -----------------------------------
+ 
+       function Number_Of_Edges_To_Successors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Natural
+       is
+       begin
+          pragma Assert (Present (G));
+ 
+          return DG.Number_Of_Outgoing_Edges (G.Graph, Vertex);
+       end Number_Of_Edges_To_Successors;
+ 
+       ------------------------
+       -- Number_Of_Vertices --
+       ------------------------
+ 
+       function Number_Of_Vertices (G : Library_Graph) return Natural is
+       begin
+          pragma Assert (Present (G));
+ 
+          return DG.Number_Of_Vertices (G.Graph);
+       end Number_Of_Vertices;
+ 
+       -----------------
+       -- Order_Cycle --
+       -----------------
+ 
+       procedure Order_Cycle
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id)
+       is
+          Lesser_Cycle : Library_Graph_Cycle_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+          pragma Assert (LGC_Lists.Present (G.Cycles));
+ 
+          --  The input cycle is the first to be inserted
+ 
+          if LGC_Lists.Is_Empty (G.Cycles) then
+             LGC_Lists.Prepend (G.Cycles, Cycle);
+ 
+          --  Otherwise the list of all cycles contains at least one cycle.
+          --  Insert the input cycle based on its precedence.
+ 
+          else
+             Lesser_Cycle := Find_First_Lower_Precedence_Cycle (G, Cycle);
+ 
+             --  The list contains at least one cycle, and the input cycle has a
+             --  higher precedence compared to some cycle in the list.
+ 
+             if Present (Lesser_Cycle) then
+                LGC_Lists.Insert_Before
+                  (L      => G.Cycles,
+                   Before => Lesser_Cycle,
+                   Elem   => Cycle);
+ 
+             --  Otherwise the input cycle has the lowest precedence among all
+             --  cycles.
+ 
+             else
+                LGC_Lists.Append (G.Cycles, Cycle);
+             end if;
+          end if;
+       end Order_Cycle;
+ 
+       ----------
+       -- Path --
+       ----------
+ 
+       function Path
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return LGE_Lists.Doubly_Linked_List
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          return Get_LGC_Attributes (G, Cycle).Path;
+       end Path;
+ 
+       ------------------------------------------
+       -- Pending_Predecessors_For_Elaboration --
+       ------------------------------------------
+ 
+       procedure Pending_Predecessors_For_Elaboration
+         (G            : Library_Graph;
+          Vertex       : Library_Graph_Vertex_Id;
+          Strong_Preds : out Natural;
+          Weak_Preds   : out Natural)
+       is
+          Complement         : Library_Graph_Vertex_Id;
+          Spec_Vertex        : Library_Graph_Vertex_Id;
+          Total_Strong_Preds : Natural;
+          Total_Weak_Preds   : Natural;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          Total_Strong_Preds := Pending_Strong_Predecessors (G, Vertex);
+          Total_Weak_Preds   := Pending_Weak_Predecessors   (G, Vertex);
+ 
+          --  Assume that there is no complementary vertex that needs to be
+          --  examined.
+ 
+          Complement  := No_Library_Graph_Vertex;
+          Spec_Vertex := No_Library_Graph_Vertex;
+ 
+          if Is_Body_Of_Spec_With_Elaborate_Body (G, Vertex) then
+             Complement  := Proper_Spec (G, Vertex);
+             Spec_Vertex := Complement;
+ 
+          elsif Is_Spec_With_Elaborate_Body (G, Vertex) then
+             Complement  := Proper_Body (G, Vertex);
+             Spec_Vertex := Vertex;
+          end if;
+ 
+          --  The vertex is part of an Elaborate_Body pair. Take into account
+          --  the strong and weak predecessors of the complementary vertex.
+ 
+          if Present (Complement) then
+             Total_Strong_Preds :=
+               Pending_Strong_Predecessors (G, Complement) + Total_Strong_Preds;
+             Total_Weak_Preds :=
+               Pending_Weak_Predecessors   (G, Complement) + Total_Weak_Preds;
+ 
+             --  The body of an Elaborate_Body pair is the successor of a strong
+             --  edge where the predecessor is the spec. This edge must not be
+             --  considered for elaboration purposes because the pair is treated
+             --  as one vertex. Account for the edge only when the spec has not
+             --  been elaborated yet.
+ 
+             if not In_Elaboration_Order (G, Spec_Vertex) then
+                Total_Strong_Preds := Total_Strong_Preds - 1;
+             end if;
+          end if;
+ 
+          Strong_Preds := Total_Strong_Preds;
+          Weak_Preds   := Total_Weak_Preds;
+       end Pending_Predecessors_For_Elaboration;
+ 
+       ---------------------------------
+       -- Pending_Strong_Predecessors --
+       ---------------------------------
+ 
+       function Pending_Strong_Predecessors
+         (G    : Library_Graph;
+          Comp : Component_Id) return Natural
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          return Get_Component_Attributes (G, Comp).Pending_Strong_Predecessors;
+       end Pending_Strong_Predecessors;
+ 
+       ---------------------------------
+       -- Pending_Strong_Predecessors --
+       ---------------------------------
+ 
+       function Pending_Strong_Predecessors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Natural
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Get_LGV_Attributes (G, Vertex).Pending_Strong_Predecessors;
+       end Pending_Strong_Predecessors;
+ 
+       -------------------------------
+       -- Pending_Weak_Predecessors --
+       -------------------------------
+ 
+       function Pending_Weak_Predecessors
+         (G    : Library_Graph;
+          Comp : Component_Id) return Natural
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          return Get_Component_Attributes (G, Comp).Pending_Weak_Predecessors;
+       end Pending_Weak_Predecessors;
+ 
+       -------------------------------
+       -- Pending_Weak_Predecessors --
+       -------------------------------
+ 
+       function Pending_Weak_Predecessors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Natural
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Get_LGV_Attributes (G, Vertex).Pending_Weak_Predecessors;
+       end Pending_Weak_Predecessors;
+ 
+       -----------------
+       -- Predecessor --
+       -----------------
+ 
+       function Predecessor
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Library_Graph_Vertex_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return DG.Source_Vertex (G.Graph, Edge);
+       end Predecessor;
+ 
+       -------------
+       -- Present --
+       -------------
+ 
+       function Present (G : Library_Graph) return Boolean is
+       begin
+          return G /= Nil;
+       end Present;
+ 
+       -----------------
+       -- Proper_Body --
+       -----------------
+ 
+       function Proper_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Library_Graph_Vertex_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          --  When the vertex denotes a spec with a completing body, return the
+          --  body.
+ 
+          if Is_Spec_With_Body (G, Vertex) then
+             return Corresponding_Item (G, Vertex);
+ 
+          --  Otherwise the vertex must be a body
+ 
+          else
+             pragma Assert (Is_Body (G, Vertex));
+             return Vertex;
+          end if;
+       end Proper_Body;
+ 
+       -----------------
+       -- Proper_Spec --
+       -----------------
+ 
+       function Proper_Spec
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Library_Graph_Vertex_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          --  When the vertex denotes a body that completes a spec, return the
+          --  spec.
+ 
+          if Is_Body_With_Spec (G, Vertex) then
+             return Corresponding_Item (G, Vertex);
+ 
+          --  Otherwise the vertex must denote a spec
+ 
+          else
+             pragma Assert (Is_Spec (G, Vertex));
+             return Vertex;
+          end if;
+       end Proper_Spec;
+ 
+       ------------------
+       -- Record_Cycle --
+       ------------------
+ 
+       procedure Record_Cycle
+         (G                     : Library_Graph;
+          Most_Significant_Edge : Library_Graph_Edge_Id;
+          Invocation_Edge_Count : Natural;
+          Cycle_Path            : LGE_Lists.Doubly_Linked_List;
+          Indent                : Indentation_Level)
+       is
+          Cycle : Library_Graph_Cycle_Id;
+          Path  : LGE_Lists.Doubly_Linked_List;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Most_Significant_Edge));
+          pragma Assert (LGE_Lists.Present (Cycle_Path));
+ 
+          --  Replicate the path of the cycle in order to avoid sharing lists
+ 
+          Path := Copy_Cycle_Path (Cycle_Path);
+ 
+          --  Normalize the path of the cycle such that its most significant
+          --  edge is the first in the list of edges.
+ 
+          Normalize_Cycle_Path
+            (Cycle_Path            => Path,
+             Most_Significant_Edge => Most_Significant_Edge);
+ 
+          --  Save the cycle for diagnostic purposes. Its kind is determined by
+          --  its most significant edge.
+ 
+          Cycle := Sequence_Next_Cycle;
+ 
+          Set_LGC_Attributes
+            (G     => G,
+             Cycle => Cycle,
+             Val   =>
+               (Invocation_Edge_Count => Invocation_Edge_Count,
+                Kind                  =>
+                  Cycle_Kind_Of
+                    (G    => G,
+                     Edge => Most_Significant_Edge),
+                Path                  => Path));
+ 
+          Trace_Cycle (G, Cycle, Indent);
+ 
+          --  Order the cycle based on its precedence relative to previously
+          --  discovered cycles.
+ 
+          Order_Cycle (G, Cycle);
+       end Record_Cycle;
+ 
+       -----------------------------------------
+       -- Same_Library_Graph_Cycle_Attributes --
+       -----------------------------------------
+ 
+       function Same_Library_Graph_Cycle_Attributes
+         (Left  : Library_Graph_Cycle_Attributes;
+          Right : Library_Graph_Cycle_Attributes) return Boolean
+       is
+       begin
+          --  Two cycles are the same when
+          --
+          --    * They are of the same kind
+          --    * They have the same number of invocation edges in their paths
+          --    * Their paths are the same length
+          --    * The edges comprising their paths are the same
+ 
+          return
+             Left.Invocation_Edge_Count = Right.Invocation_Edge_Count
+               and then Left.Kind = Right.Kind
+               and then LGE_Lists.Equal (Left.Path, Right.Path);
+       end Same_Library_Graph_Cycle_Attributes;
+ 
+       ------------------------------
+       -- Set_Component_Attributes --
+       ------------------------------
+ 
+       procedure Set_Component_Attributes
+         (G    : Library_Graph;
+          Comp : Component_Id;
+          Val  : Component_Attributes)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          Component_Tables.Put (G.Component_Attributes, Comp, Val);
+       end Set_Component_Attributes;
+ 
+       ----------------------------
+       -- Set_Corresponding_Item --
+       ----------------------------
+ 
+       procedure Set_Corresponding_Item
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Val    : Library_Graph_Vertex_Id)
+       is
+          Attrs : Library_Graph_Vertex_Attributes;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          Attrs := Get_LGV_Attributes (G, Vertex);
+          Attrs.Corresponding_Item := Val;
+          Set_LGV_Attributes (G, Vertex, Attrs);
+       end Set_Corresponding_Item;
+ 
+       ------------------------------
+       -- Set_Corresponding_Vertex --
+       ------------------------------
+ 
+       procedure Set_Corresponding_Vertex
+         (G    : Library_Graph;
+          U_Id : Unit_Id;
+          Val  : Library_Graph_Vertex_Id)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (U_Id));
+ 
+          Unit_Tables.Put (G.Unit_To_Vertex, U_Id, Val);
+       end Set_Corresponding_Vertex;
+ 
+       ------------------------------
+       -- Set_In_Elaboration_Order --
+       ------------------------------
+ 
+       procedure Set_In_Elaboration_Order
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Val    : Boolean := True)
+       is
+          Attrs : Library_Graph_Vertex_Attributes;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          Attrs := Get_LGV_Attributes (G, Vertex);
+          Attrs.In_Elaboration_Order := Val;
+          Set_LGV_Attributes (G, Vertex, Attrs);
+       end Set_In_Elaboration_Order;
+ 
+       --------------------------
+       -- Set_Is_Recorded_Edge --
+       --------------------------
+ 
+       procedure Set_Is_Recorded_Edge
+         (G   : Library_Graph;
+          Rel : Predecessor_Successor_Relation;
+          Val : Boolean := True)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Rel.Predecessor));
+          pragma Assert (Present (Rel.Successor));
+ 
+          if Val then
+             RE_Sets.Insert (G.Recorded_Edges, Rel);
+          else
+             RE_Sets.Delete (G.Recorded_Edges, Rel);
+          end if;
+       end Set_Is_Recorded_Edge;
+ 
+       ------------------------
+       -- Set_LGC_Attributes --
+       ------------------------
+ 
+       procedure Set_LGC_Attributes
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id;
+          Val   : Library_Graph_Cycle_Attributes)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          LGC_Tables.Put (G.Cycle_Attributes, Cycle, Val);
+       end Set_LGC_Attributes;
+ 
+       ------------------------
+       -- Set_LGE_Attributes --
+       ------------------------
+ 
+       procedure Set_LGE_Attributes
+         (G      : Library_Graph;
+          Edge : Library_Graph_Edge_Id;
+          Val    : Library_Graph_Edge_Attributes)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          LGE_Tables.Put (G.Edge_Attributes, Edge, Val);
+       end Set_LGE_Attributes;
+ 
+       ------------------------
+       -- Set_LGV_Attributes --
+       ------------------------
+ 
+       procedure Set_LGV_Attributes
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Val    : Library_Graph_Vertex_Attributes)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          LGV_Tables.Put (G.Vertex_Attributes, Vertex, Val);
+       end Set_LGV_Attributes;
+ 
+       ---------------
+       -- Successor --
+       ---------------
+ 
+       function Successor
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Library_Graph_Vertex_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          return DG.Destination_Vertex (G.Graph, Edge);
+       end Successor;
+ 
+       ---------------------
+       -- Trace_Component --
+       ---------------------
+ 
+       procedure Trace_Component
+         (G      : Library_Graph;
+          Comp   : Component_Id;
+          Indent : Indentation_Level)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          --  Nothing to do when switch -d_t (output cycle-detection trace
+          --  information) is not in effect.
+ 
+          if not Debug_Flag_Underscore_T then
+             return;
+          end if;
+ 
+          Write_Eol;
+          Indent_By (Indent);
+          Write_Str ("component (Comp_");
+          Write_Int (Int (Comp));
+          Write_Str (")");
+          Write_Eol;
+       end Trace_Component;
+ 
+       -----------------
+       -- Trace_Cycle --
+       -----------------
+ 
+       procedure Trace_Cycle
+         (G      : Library_Graph;
+          Cycle  : Library_Graph_Cycle_Id;
+          Indent : Indentation_Level)
+       is
+          Attr_Indent : constant Indentation_Level :=
+                          Indent + Nested_Indentation;
+          Edge_Indent : constant Indentation_Level :=
+                          Attr_Indent + Nested_Indentation;
+ 
+          Edge : Library_Graph_Edge_Id;
+          Iter : Edges_Of_Cycle_Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          --  Nothing to do when switch -d_t (output cycle-detection trace
+          --  information) is not in effect.
+ 
+          if not Debug_Flag_Underscore_T then
+             return;
+          end if;
+ 
+          Indent_By (Indent);
+          Write_Str ("cycle (LGC_Id_");
+          Write_Int (Int (Cycle));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Indent_By (Attr_Indent);
+          Write_Str ("kind = ");
+          Write_Str (Kind (G, Cycle)'Img);
+          Write_Eol;
+ 
+          Indent_By (Attr_Indent);
+          Write_Str ("invocation edges = ");
+          Write_Int (Int (Invocation_Edge_Count (G, Cycle)));
+          Write_Eol;
+ 
+          Indent_By (Attr_Indent);
+          Write_Str ("length: ");
+          Write_Int (Int (Length (G, Cycle)));
+          Write_Eol;
+ 
+          Iter := Iterate_Edges_Of_Cycle (G, Cycle);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+ 
+             Indent_By (Edge_Indent);
+             Write_Str ("library graph edge (LGE_Id_");
+             Write_Int (Int (Edge));
+             Write_Str (")");
+             Write_Eol;
+          end loop;
+       end Trace_Cycle;
+ 
+       ----------------
+       -- Trace_Edge --
+       ----------------
+ 
+       procedure Trace_Edge
+         (G      : Library_Graph;
+          Edge   : Library_Graph_Edge_Id;
+          Indent : Indentation_Level)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          Attr_Indent : constant Indentation_Level :=
+                          Indent + Nested_Indentation;
+ 
+          Pred : constant Library_Graph_Vertex_Id := Predecessor (G, Edge);
+          Succ : constant Library_Graph_Vertex_Id := Successor   (G, Edge);
+ 
+       begin
+          --  Nothing to do when switch -d_t (output cycle-detection trace
+          --  information) is not in effect.
+ 
+          if not Debug_Flag_Underscore_T then
+             return;
+          end if;
+ 
+          Indent_By (Indent);
+          Write_Str ("library graph edge (LGE_Id_");
+          Write_Int (Int (Edge));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Indent_By (Attr_Indent);
+          Write_Str ("kind = ");
+          Write_Str (Kind (G, Edge)'Img);
+          Write_Eol;
+ 
+          Indent_By  (Attr_Indent);
+          Write_Str  ("Predecessor (LGV_Id_");
+          Write_Int  (Int (Pred));
+          Write_Str  (") name = ");
+          Write_Name (Name (G, Pred));
+          Write_Eol;
+ 
+          Indent_By  (Attr_Indent);
+          Write_Str  ("Successor   (LGV_Id_");
+          Write_Int  (Int (Succ));
+          Write_Str  (") name = ");
+          Write_Name (Name (G, Succ));
+          Write_Eol;
+       end Trace_Edge;
+ 
+       ------------------
+       -- Trace_Vertex --
+       ------------------
+ 
+       procedure Trace_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Indent : Indentation_Level)
+       is
+          Attr_Indent : constant Indentation_Level :=
+                          Indent + Nested_Indentation;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          --  Nothing to do when switch -d_t (output cycle-detection trace
+          --  information) is not in effect.
+ 
+          if not Debug_Flag_Underscore_T then
+             return;
+          end if;
+ 
+          Indent_By (Indent);
+          Write_Str ("library graph vertex (LGV_Id_");
+          Write_Int (Int (Vertex));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Indent_By  (Attr_Indent);
+          Write_Str  ("Unit (U_Id_");
+          Write_Int  (Int (Unit (G, Vertex)));
+          Write_Str  (") name = ");
+          Write_Name (Name (G, Vertex));
+          Write_Eol;
+       end Trace_Vertex;
+ 
+       ----------
+       -- Unit --
+       ----------
+ 
+       function Unit
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Unit_Id
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          return Get_LGV_Attributes (G, Vertex).Unit;
+       end Unit;
+ 
+       -------------
+       -- Unvisit --
+       -------------
+ 
+       procedure Unvisit
+         (Vertex        : Library_Graph_Vertex_Id;
+          Visited_Set   : LGV_Sets.Membership_Set;
+          Visited_Stack : LGV_Lists.Doubly_Linked_List)
+       is
+          Current_Vertex : Library_Graph_Vertex_Id;
+ 
+       begin
+          pragma Assert (Present (Vertex));
+          pragma Assert (LGV_Sets.Present  (Visited_Set));
+          pragma Assert (LGV_Lists.Present (Visited_Stack));
+ 
+          while not LGV_Lists.Is_Empty (Visited_Stack) loop
+             Current_Vertex := LGV_Lists.First (Visited_Stack);
+ 
+             LGV_Lists.Delete_First (Visited_Stack);
+             LGV_Sets.Delete (Visited_Set, Current_Vertex);
+ 
+             exit when Current_Vertex = Vertex;
+          end loop;
+       end Unvisit;
+ 
+       ---------------------------------
+       -- Update_Pending_Predecessors --
+       ---------------------------------
+ 
+       procedure Update_Pending_Predecessors
+         (Strong_Predecessors : in out Natural;
+          Weak_Predecessors   : in out Natural;
+          Update_Weak         : Boolean;
+          Value               : Integer)
+       is
+       begin
+          if Update_Weak then
+             Weak_Predecessors := Weak_Predecessors + Value;
+          else
+             Strong_Predecessors := Strong_Predecessors + Value;
+          end if;
+       end Update_Pending_Predecessors;
+ 
+       -----------------------------------------------
+       -- Update_Pending_Predecessors_Of_Components --
+       -----------------------------------------------
+ 
+       procedure Update_Pending_Predecessors_Of_Components
+         (G : Library_Graph)
+       is
+          Edge : Library_Graph_Edge_Id;
+          Iter : All_Edge_Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          Iter := Iterate_All_Edges (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+ 
+             Update_Pending_Predecessors_Of_Components (G, Edge);
+          end loop;
+       end Update_Pending_Predecessors_Of_Components;
+ 
+       -----------------------------------------------
+       -- Update_Pending_Predecessors_Of_Components --
+       -----------------------------------------------
+ 
+       procedure Update_Pending_Predecessors_Of_Components
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          Pred_Comp : constant Component_Id :=
+                        Component (G, Predecessor (G, Edge));
+          Succ_Comp : constant Component_Id :=
+                        Component (G, Successor   (G, Edge));
+ 
+          pragma Assert (Present (Pred_Comp));
+          pragma Assert (Present (Succ_Comp));
+ 
+       begin
+          --  The edge links a successor and a predecessor coming from two
+          --  different SCCs. This indicates that the SCC of the successor
+          --  must wait on another predecessor until it can be elaborated.
+ 
+          if Pred_Comp /= Succ_Comp then
+             Increment_Pending_Predecessors
+               (G    => G,
+                Comp => Succ_Comp,
+                Edge => Edge);
+          end if;
+       end Update_Pending_Predecessors_Of_Components;
+ 
+       -----------------------
+       -- Vertex_Precedence --
+       -----------------------
+ 
+       function Vertex_Precedence
+         (G           : Library_Graph;
+          Vertex      : Library_Graph_Vertex_Id;
+          Compared_To : Library_Graph_Vertex_Id) return Precedence_Kind
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+          pragma Assert (Present (Compared_To));
+ 
+          --  Use lexicographical order to determine precedence and ensure
+          --  deterministic behavior.
+ 
+          if Uname_Less (Name (G, Vertex), Name (G, Compared_To)) then
+             return Higher_Precedence;
+          else
+             return Lower_Precedence;
+          end if;
+       end Vertex_Precedence;
+ 
+       -----------
+       -- Visit --
+       -----------
+ 
+       procedure Visit
+         (Vertex        : Library_Graph_Vertex_Id;
+          Visited_Set   : LGV_Sets.Membership_Set;
+          Visited_Stack : LGV_Lists.Doubly_Linked_List)
+       is
+       begin
+          pragma Assert (Present (Vertex));
+          pragma Assert (LGV_Sets.Present  (Visited_Set));
+          pragma Assert (LGV_Lists.Present (Visited_Stack));
+ 
+          LGV_Sets.Insert   (Visited_Set,   Vertex);
+          LGV_Lists.Prepend (Visited_Stack, Vertex);
+       end Visit;
+    end Library_Graphs;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (Edge : Invocation_Graph_Edge_Id) return Boolean is
+    begin
+       return Edge /= No_Invocation_Graph_Edge;
+    end Present;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (Vertex : Invocation_Graph_Vertex_Id) return Boolean is
+    begin
+       return Vertex /= No_Invocation_Graph_Vertex;
+    end Present;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (Cycle : Library_Graph_Cycle_Id) return Boolean is
+    begin
+       return Cycle /= No_Library_Graph_Cycle;
+    end Present;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (Edge : Library_Graph_Edge_Id) return Boolean is
+    begin
+       return Edge /= No_Library_Graph_Edge;
+    end Present;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (Vertex : Library_Graph_Vertex_Id) return Boolean is
+    begin
+       return Vertex /= No_Library_Graph_Vertex;
+    end Present;
+ 
+    --------------------------
+    -- Sequence_Next_Edge --
+    --------------------------
+ 
+    IGE_Sequencer : Invocation_Graph_Edge_Id := First_Invocation_Graph_Edge;
+    --  The counter for invocation graph edges. Do not directly manipulate its
+    --  value.
+ 
+    function Sequence_Next_Edge return Invocation_Graph_Edge_Id is
+       Edge : constant Invocation_Graph_Edge_Id := IGE_Sequencer;
+ 
+    begin
+       IGE_Sequencer := IGE_Sequencer + 1;
+       return Edge;
+    end Sequence_Next_Edge;
+ 
+    --------------------------
+    -- Sequence_Next_Vertex --
+    --------------------------
+ 
+    IGV_Sequencer : Invocation_Graph_Vertex_Id := First_Invocation_Graph_Vertex;
+    --  The counter for invocation graph vertices. Do not directly manipulate
+    --  its value.
+ 
+    function Sequence_Next_Vertex return Invocation_Graph_Vertex_Id is
+       Vertex : constant Invocation_Graph_Vertex_Id := IGV_Sequencer;
+ 
+    begin
+       IGV_Sequencer := IGV_Sequencer + 1;
+       return Vertex;
+    end Sequence_Next_Vertex;
+ 
+    --------------------------
+    -- Sequence_Next_Cycle --
+    --------------------------
+ 
+    LGC_Sequencer : Library_Graph_Cycle_Id := First_Library_Graph_Cycle;
+    --  The counter for library graph cycles. Do not directly manipulate its
+    --  value.
+ 
+    function Sequence_Next_Cycle return Library_Graph_Cycle_Id is
+       Cycle : constant Library_Graph_Cycle_Id := LGC_Sequencer;
+ 
+    begin
+       LGC_Sequencer := LGC_Sequencer + 1;
+       return Cycle;
+    end Sequence_Next_Cycle;
+ 
+    --------------------------
+    -- Sequence_Next_Edge --
+    --------------------------
+ 
+    LGE_Sequencer : Library_Graph_Edge_Id := First_Library_Graph_Edge;
+    --  The counter for library graph edges. Do not directly manipulate its
+    --  value.
+ 
+    function Sequence_Next_Edge return Library_Graph_Edge_Id is
+       Edge : constant Library_Graph_Edge_Id := LGE_Sequencer;
+ 
+    begin
+       LGE_Sequencer := LGE_Sequencer + 1;
+       return Edge;
+    end Sequence_Next_Edge;
+ 
+    --------------------------
+    -- Sequence_Next_Vertex --
+    --------------------------
+ 
+    LGV_Sequencer : Library_Graph_Vertex_Id := First_Library_Graph_Vertex;
+    --  The counter for library graph vertices. Do not directly manipulate its
+    --  value.
+ 
+    function Sequence_Next_Vertex return Library_Graph_Vertex_Id is
+       Vertex : constant Library_Graph_Vertex_Id := LGV_Sequencer;
+ 
+    begin
+       LGV_Sequencer := LGV_Sequencer + 1;
+       return Vertex;
+    end Sequence_Next_Vertex;
+ 
+ end Bindo.Graphs;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-graphs.ads gcc-10.1.0/gcc/ada/bindo-graphs.ads
*** gcc-9.3.0/gcc/ada/bindo-graphs.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-graphs.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,1727 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                         B I N D O . G R A P H S                          --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  For full architecture, see unit Bindo.
+ 
+ --  The following unit defines the various graphs used in determining the
+ --  elaboration order of units.
+ 
+ with Types; use Types;
+ 
+ with Bindo.Units; use Bindo.Units;
+ 
+ with GNAT;                 use GNAT;
+ with GNAT.Dynamic_HTables; use GNAT.Dynamic_HTables;
+ with GNAT.Graphs;          use GNAT.Graphs;
+ with GNAT.Lists;           use GNAT.Lists;
+ with GNAT.Sets;            use GNAT.Sets;
+ 
+ package Bindo.Graphs is
+ 
+    ---------------------------
+    -- Invocation graph edge --
+    ---------------------------
+ 
+    --  The following type denotes an invocation graph edge handle
+ 
+    type Invocation_Graph_Edge_Id is new Natural;
+    No_Invocation_Graph_Edge    : constant Invocation_Graph_Edge_Id :=
+                                    Invocation_Graph_Edge_Id'First;
+    First_Invocation_Graph_Edge : constant Invocation_Graph_Edge_Id :=
+                                    No_Invocation_Graph_Edge + 1;
+ 
+    procedure Destroy_Invocation_Graph_Edge
+      (Edge : in out Invocation_Graph_Edge_Id);
+    pragma Inline (Destroy_Invocation_Graph_Edge);
+    --  Destroy invocation graph edge Edge
+ 
+    function Hash_Invocation_Graph_Edge
+      (Edge : Invocation_Graph_Edge_Id) return Bucket_Range_Type;
+    pragma Inline (Hash_Invocation_Graph_Edge);
+    --  Obtain the hash value of key Edge
+ 
+    function Present (Edge : Invocation_Graph_Edge_Id) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether invocation graph edge Edge exists
+ 
+    package IGE_Lists is new Doubly_Linked_Lists
+      (Element_Type    => Invocation_Graph_Edge_Id,
+       "="             => "=",
+       Destroy_Element => Destroy_Invocation_Graph_Edge);
+ 
+    ------------------------------
+    --  Invocation graph vertex --
+    ------------------------------
+ 
+    --  The following type denotes an invocation graph vertex handle
+ 
+    type Invocation_Graph_Vertex_Id is new Natural;
+    No_Invocation_Graph_Vertex    : constant Invocation_Graph_Vertex_Id :=
+                                      Invocation_Graph_Vertex_Id'First;
+    First_Invocation_Graph_Vertex : constant Invocation_Graph_Vertex_Id :=
+                                      No_Invocation_Graph_Vertex + 1;
+ 
+    function Hash_Invocation_Graph_Vertex
+      (Vertex : Invocation_Graph_Vertex_Id) return Bucket_Range_Type;
+    pragma Inline (Hash_Invocation_Graph_Vertex);
+    --  Obtain the hash value of key Vertex
+ 
+    function Present (Vertex : Invocation_Graph_Vertex_Id) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether invocation graph vertex Vertex exists
+ 
+    package IGV_Sets is new Membership_Sets
+      (Element_Type => Invocation_Graph_Vertex_Id,
+       "="          => "=",
+       Hash         => Hash_Invocation_Graph_Vertex);
+ 
+    -------------------------
+    -- Library graph cycle --
+    -------------------------
+ 
+    type Library_Graph_Cycle_Id is new Natural;
+    No_Library_Graph_Cycle    : constant Library_Graph_Cycle_Id :=
+                                  Library_Graph_Cycle_Id'First;
+    First_Library_Graph_Cycle : constant Library_Graph_Cycle_Id :=
+                                  No_Library_Graph_Cycle + 1;
+ 
+    procedure Destroy_Library_Graph_Cycle
+      (Cycle : in out Library_Graph_Cycle_Id);
+    pragma Inline (Destroy_Library_Graph_Cycle);
+    --  Destroy library graph cycle Cycle
+ 
+    function Hash_Library_Graph_Cycle
+      (Cycle : Library_Graph_Cycle_Id) return Bucket_Range_Type;
+    pragma Inline (Hash_Library_Graph_Cycle);
+    --  Obtain the hash value of key Cycle
+ 
+    function Present (Cycle : Library_Graph_Cycle_Id) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether library graph cycle Cycle exists
+ 
+    package LGC_Lists is new Doubly_Linked_Lists
+      (Element_Type    => Library_Graph_Cycle_Id,
+       "="             => "=",
+       Destroy_Element => Destroy_Library_Graph_Cycle);
+ 
+    ------------------------
+    -- Library graph edge --
+    ------------------------
+ 
+    --  The following type denotes a library graph edge handle
+ 
+    type Library_Graph_Edge_Id is new Natural;
+    No_Library_Graph_Edge    : constant Library_Graph_Edge_Id :=
+                                 Library_Graph_Edge_Id'First;
+    First_Library_Graph_Edge : constant Library_Graph_Edge_Id :=
+                                 No_Library_Graph_Edge + 1;
+ 
+    procedure Destroy_Library_Graph_Edge
+      (Edge : in out Library_Graph_Edge_Id);
+    pragma Inline (Destroy_Library_Graph_Edge);
+    --  Destroy library graph edge Edge
+ 
+    function Hash_Library_Graph_Edge
+      (Edge : Library_Graph_Edge_Id) return Bucket_Range_Type;
+    pragma Inline (Hash_Library_Graph_Edge);
+    --  Obtain the hash value of key Edge
+ 
+    function Present (Edge : Library_Graph_Edge_Id) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether library graph edge Edge exists
+ 
+    package LGE_Lists is new Doubly_Linked_Lists
+      (Element_Type    => Library_Graph_Edge_Id,
+       "="             => "=",
+       Destroy_Element => Destroy_Library_Graph_Edge);
+ 
+    package LGE_Sets is new Membership_Sets
+      (Element_Type => Library_Graph_Edge_Id,
+       "="          => "=",
+       Hash         => Hash_Library_Graph_Edge);
+ 
+    --------------------------
+    -- Library graph vertex --
+    --------------------------
+ 
+    --  The following type denotes a library graph vertex handle
+ 
+    type Library_Graph_Vertex_Id is new Natural;
+    No_Library_Graph_Vertex    : constant Library_Graph_Vertex_Id :=
+                                   Library_Graph_Vertex_Id'First;
+    First_Library_Graph_Vertex : constant Library_Graph_Vertex_Id :=
+                                   No_Library_Graph_Vertex + 1;
+ 
+    procedure Destroy_Library_Graph_Vertex
+      (Vertex : in out Library_Graph_Vertex_Id);
+    pragma Inline (Destroy_Library_Graph_Vertex);
+    --  Destroy library graph vertex Vertex
+ 
+    function Hash_Library_Graph_Vertex
+      (Vertex : Library_Graph_Vertex_Id) return Bucket_Range_Type;
+    pragma Inline (Hash_Library_Graph_Vertex);
+    --  Obtain the hash value of key Vertex
+ 
+    function Present (Vertex : Library_Graph_Vertex_Id) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether library graph vertex Vertex exists
+ 
+    package LGV_Lists is new Doubly_Linked_Lists
+      (Element_Type    => Library_Graph_Vertex_Id,
+       "="             => "=",
+       Destroy_Element => Destroy_Library_Graph_Vertex);
+ 
+    package LGV_Sets is new Membership_Sets
+      (Element_Type => Library_Graph_Vertex_Id,
+       "="          => "=",
+       Hash         => Hash_Library_Graph_Vertex);
+ 
+    -----------------------
+    -- Invocation_Graphs --
+    -----------------------
+ 
+    package Invocation_Graphs is
+ 
+       -----------
+       -- Graph --
+       -----------
+ 
+       --  The following type denotes an invocation graph handle. Each instance
+       --  must be created using routine Create.
+ 
+       type Invocation_Graph is private;
+       Nil : constant Invocation_Graph;
+ 
+       ----------------------
+       -- Graph operations --
+       ----------------------
+ 
+       procedure Add_Edge
+         (G      : Invocation_Graph;
+          Source : Invocation_Graph_Vertex_Id;
+          Target : Invocation_Graph_Vertex_Id;
+          IR_Id  : Invocation_Relation_Id);
+       pragma Inline (Add_Edge);
+       --  Create a new edge in invocation graph G with source vertex Source and
+       --  destination vertex Target. IR_Id is the invocation relation the edge
+       --  describes.
+ 
+       procedure Add_Vertex
+         (G           : Invocation_Graph;
+          IC_Id       : Invocation_Construct_Id;
+          Body_Vertex : Library_Graph_Vertex_Id;
+          Spec_Vertex : Library_Graph_Vertex_Id);
+       pragma Inline (Add_Vertex);
+       --  Create a new vertex in invocation graph G. IC_Id is the invocation
+       --  construct the vertex describes. Body_Vertex denotes the library graph
+       --  vertex where the invocation construct's body is declared. Spec_Vertex
+       --  is the library graph vertex where the invocation construct's spec is
+       --  declared.
+ 
+       function Create
+         (Initial_Vertices : Positive;
+          Initial_Edges    : Positive) return Invocation_Graph;
+       pragma Inline (Create);
+       --  Create a new empty graph with vertex capacity Initial_Vertices and
+       --  edge capacity Initial_Edges.
+ 
+       procedure Destroy (G : in out Invocation_Graph);
+       pragma Inline (Destroy);
+       --  Destroy the contents of invocation graph G, rendering it unusable
+ 
+       function Present (G : Invocation_Graph) return Boolean;
+       pragma Inline (Present);
+       --  Determine whether invocation graph G exists
+ 
+       -----------------------
+       -- Vertex attributes --
+       -----------------------
+ 
+       function Body_Vertex
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Library_Graph_Vertex_Id;
+       pragma Inline (Body_Vertex);
+       --  Obtain the library graph vertex where the body of the invocation
+       --  construct represented by vertex Vertex of invocation graph G is
+       --  declared.
+ 
+       function Column
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Nat;
+       pragma Inline (Column);
+       --  Obtain the column number where the invocation construct vertex Vertex
+       --  of invocation graph G describes.
+ 
+       function Construct
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Invocation_Construct_Id;
+       pragma Inline (Construct);
+       --  Obtain the invocation construct vertex Vertex of invocation graph G
+       --  describes.
+ 
+       function Corresponding_Vertex
+         (G     : Invocation_Graph;
+          IS_Id : Invocation_Signature_Id) return Invocation_Graph_Vertex_Id;
+       pragma Inline (Corresponding_Vertex);
+       --  Obtain the vertex of invocation graph G that corresponds to signature
+       --  IS_Id.
+ 
+       function Line
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Nat;
+       pragma Inline (Line);
+       --  Obtain the line number where the invocation construct vertex Vertex
+       --  of invocation graph G describes.
+ 
+       function Name
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Name_Id;
+       pragma Inline (Name);
+       --  Obtain the name of the construct vertex Vertex of invocation graph G
+       --  describes.
+ 
+       function Spec_Vertex
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Library_Graph_Vertex_Id;
+       pragma Inline (Spec_Vertex);
+       --  Obtain the library graph vertex where the spec of the invocation
+       --  construct represented by vertex Vertex of invocation graph G is
+       --  declared.
+ 
+       ---------------------
+       -- Edge attributes --
+       ---------------------
+ 
+       function Extra
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id) return Name_Id;
+       pragma Inline (Extra);
+       --  Obtain the extra name used in error diagnostics of edge Edge of
+       --  invocation graph G.
+ 
+       function Kind
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id) return Invocation_Kind;
+       pragma Inline (Kind);
+       --  Obtain the nature of edge Edge of invocation graph G
+ 
+       function Relation
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id) return Invocation_Relation_Id;
+       pragma Inline (Relation);
+       --  Obtain the relation edge Edge of invocation graph G describes
+ 
+       function Target
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id) return Invocation_Graph_Vertex_Id;
+       pragma Inline (Target);
+       --  Obtain the target vertex edge Edge of invocation graph G designates
+ 
+       ----------------
+       -- Statistics --
+       ----------------
+ 
+       function Invocation_Graph_Edge_Count
+         (G    : Invocation_Graph;
+          Kind : Invocation_Kind) return Natural;
+       pragma Inline (Invocation_Graph_Edge_Count);
+       --  Obtain the total number of edges of kind Kind in invocation graph G
+ 
+       function Number_Of_Edges (G : Invocation_Graph) return Natural;
+       pragma Inline (Number_Of_Edges);
+       --  Obtain the total number of edges in invocation graph G
+ 
+       function Number_Of_Edges_To_Targets
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Natural;
+       pragma Inline (Number_Of_Edges_To_Targets);
+       --  Obtain the total number of edges to targets vertex Vertex of
+       --  invocation graph G has.
+ 
+       function Number_Of_Elaboration_Roots
+         (G : Invocation_Graph) return Natural;
+       pragma Inline (Number_Of_Elaboration_Roots);
+       --  Obtain the total number of elaboration roots in invocation graph G
+ 
+       function Number_Of_Vertices (G : Invocation_Graph) return Natural;
+       pragma Inline (Number_Of_Vertices);
+       --  Obtain the total number of vertices in invocation graph G
+ 
+       ---------------
+       -- Iterators --
+       ---------------
+ 
+       --  The following type represents an iterator over all edges of an
+       --  invocation graph.
+ 
+       type All_Edge_Iterator is private;
+ 
+       function Has_Next (Iter : All_Edge_Iterator) return Boolean;
+       pragma Inline (Has_Next);
+       --  Determine whether iterator Iter has more edges to examine
+ 
+       function Iterate_All_Edges
+         (G : Invocation_Graph) return All_Edge_Iterator;
+       pragma Inline (Iterate_All_Edges);
+       --  Obtain an iterator over all edges of invocation graph G
+ 
+       procedure Next
+         (Iter : in out All_Edge_Iterator;
+          Edge : out Invocation_Graph_Edge_Id);
+       pragma Inline (Next);
+       --  Return the current edge referenced by iterator Iter and advance to
+       --  the next available edge.
+ 
+       --  The following type represents an iterator over all vertices of an
+       --  invocation graph.
+ 
+       type All_Vertex_Iterator is private;
+ 
+       function Has_Next (Iter : All_Vertex_Iterator) return Boolean;
+       pragma Inline (Has_Next);
+       --  Determine whether iterator Iter has more vertices to examine
+ 
+       function Iterate_All_Vertices
+         (G : Invocation_Graph) return All_Vertex_Iterator;
+       pragma Inline (Iterate_All_Vertices);
+       --  Obtain an iterator over all vertices of invocation graph G
+ 
+       procedure Next
+         (Iter   : in out All_Vertex_Iterator;
+          Vertex : out Invocation_Graph_Vertex_Id);
+       pragma Inline (Next);
+       --  Return the current vertex referenced by iterator Iter and advance
+       --  to the next available vertex.
+ 
+       --  The following type represents an iterator over all edges that reach
+       --  targets starting from a particular source vertex.
+ 
+       type Edges_To_Targets_Iterator is private;
+ 
+       function Has_Next (Iter : Edges_To_Targets_Iterator) return Boolean;
+       pragma Inline (Has_Next);
+       --  Determine whether iterator Iter has more edges to examine
+ 
+       function Iterate_Edges_To_Targets
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id) return Edges_To_Targets_Iterator;
+       pragma Inline (Iterate_Edges_To_Targets);
+       --  Obtain an iterator over all edges to targets with source vertex
+       --  Vertex of invocation graph G.
+ 
+       procedure Next
+         (Iter : in out Edges_To_Targets_Iterator;
+          Edge : out Invocation_Graph_Edge_Id);
+       pragma Inline (Next);
+       --  Return the current edge referenced by iterator Iter and advance to
+       --  the next available edge.
+ 
+       --  The following type represents an iterator over all vertices of an
+       --  invocation graph that denote the elaboration procedure or a spec or
+       --  a body, referred to as elaboration root.
+ 
+       type Elaboration_Root_Iterator is private;
+ 
+       function Has_Next (Iter : Elaboration_Root_Iterator) return Boolean;
+       pragma Inline (Has_Next);
+       --  Determine whether iterator Iter has more elaboration roots to examine
+ 
+       function Iterate_Elaboration_Roots
+         (G : Invocation_Graph) return Elaboration_Root_Iterator;
+       pragma Inline (Iterate_Elaboration_Roots);
+       --  Obtain an iterator over all elaboration roots of invocation graph G
+ 
+       procedure Next
+         (Iter : in out Elaboration_Root_Iterator;
+          Root : out Invocation_Graph_Vertex_Id);
+       pragma Inline (Next);
+       --  Return the current elaboration root referenced by iterator Iter and
+       --  advance to the next available elaboration root.
+ 
+    private
+ 
+       --------------
+       -- Vertices --
+       --------------
+ 
+       procedure Destroy_Invocation_Graph_Vertex
+         (Vertex : in out Invocation_Graph_Vertex_Id);
+       pragma Inline (Destroy_Invocation_Graph_Vertex);
+       --  Destroy invocation graph vertex Vertex
+ 
+       --  The following type represents the attributes of an invocation graph
+       --  vertex.
+ 
+       type Invocation_Graph_Vertex_Attributes is record
+          Body_Vertex : Library_Graph_Vertex_Id := No_Library_Graph_Vertex;
+          --  Reference to the library graph vertex where the body of this
+          --  vertex resides.
+ 
+          Construct : Invocation_Construct_Id := No_Invocation_Construct;
+          --  Reference to the invocation construct this vertex represents
+ 
+          Spec_Vertex : Library_Graph_Vertex_Id := No_Library_Graph_Vertex;
+          --  Reference to the library graph vertex where the spec of this
+          --  vertex resides.
+       end record;
+ 
+       No_Invocation_Graph_Vertex_Attributes :
+         constant Invocation_Graph_Vertex_Attributes :=
+           (Body_Vertex => No_Library_Graph_Vertex,
+            Construct   => No_Invocation_Construct,
+            Spec_Vertex => No_Library_Graph_Vertex);
+ 
+       procedure Destroy_Invocation_Graph_Vertex_Attributes
+         (Attrs : in out Invocation_Graph_Vertex_Attributes);
+       pragma Inline (Destroy_Invocation_Graph_Vertex_Attributes);
+       --  Destroy the contents of attributes Attrs
+ 
+       package IGV_Tables is new Dynamic_Hash_Tables
+         (Key_Type              => Invocation_Graph_Vertex_Id,
+          Value_Type            => Invocation_Graph_Vertex_Attributes,
+          No_Value              => No_Invocation_Graph_Vertex_Attributes,
+          Expansion_Threshold   => 1.5,
+          Expansion_Factor      => 2,
+          Compression_Threshold => 0.3,
+          Compression_Factor    => 2,
+          "="                   => "=",
+          Destroy_Value         => Destroy_Invocation_Graph_Vertex_Attributes,
+          Hash                  => Hash_Invocation_Graph_Vertex);
+ 
+       -----------
+       -- Edges --
+       -----------
+ 
+       procedure Destroy_Invocation_Graph_Edge
+         (Edge : in out Invocation_Graph_Edge_Id);
+       pragma Inline (Destroy_Invocation_Graph_Edge);
+       --  Destroy invocation graph edge Edge
+ 
+       --  The following type represents the attributes of an invocation graph
+       --  edge.
+ 
+       type Invocation_Graph_Edge_Attributes is record
+          Relation : Invocation_Relation_Id := No_Invocation_Relation;
+          --  Reference to the invocation relation this edge represents
+       end record;
+ 
+       No_Invocation_Graph_Edge_Attributes :
+         constant Invocation_Graph_Edge_Attributes :=
+           (Relation => No_Invocation_Relation);
+ 
+       procedure Destroy_Invocation_Graph_Edge_Attributes
+         (Attrs : in out Invocation_Graph_Edge_Attributes);
+       pragma Inline (Destroy_Invocation_Graph_Edge_Attributes);
+       --  Destroy the contents of attributes Attrs
+ 
+       package IGE_Tables is new Dynamic_Hash_Tables
+         (Key_Type              => Invocation_Graph_Edge_Id,
+          Value_Type            => Invocation_Graph_Edge_Attributes,
+          No_Value              => No_Invocation_Graph_Edge_Attributes,
+          Expansion_Threshold   => 1.5,
+          Expansion_Factor      => 2,
+          Compression_Threshold => 0.3,
+          Compression_Factor    => 2,
+          "="                   => "=",
+          Destroy_Value         => Destroy_Invocation_Graph_Edge_Attributes,
+          Hash                  => Hash_Invocation_Graph_Edge);
+ 
+       ---------------
+       -- Relations --
+       ---------------
+ 
+       --  The following type represents a relation between a source and target
+       --  vertices.
+ 
+       type Source_Target_Relation is record
+          Source : Invocation_Graph_Vertex_Id := No_Invocation_Graph_Vertex;
+          --  The source vertex
+ 
+          Target : Invocation_Graph_Vertex_Id := No_Invocation_Graph_Vertex;
+          --  The destination vertex
+       end record;
+ 
+       No_Source_Target_Relation :
+         constant Source_Target_Relation :=
+           (Source => No_Invocation_Graph_Vertex,
+            Target => No_Invocation_Graph_Vertex);
+ 
+       function Hash_Source_Target_Relation
+         (Rel : Source_Target_Relation) return Bucket_Range_Type;
+       pragma Inline (Hash_Source_Target_Relation);
+       --  Obtain the hash value of key Rel
+ 
+       package Relation_Sets is new Membership_Sets
+         (Element_Type => Source_Target_Relation,
+          "="          => "=",
+          Hash         => Hash_Source_Target_Relation);
+ 
+       ----------------
+       -- Statistics --
+       ----------------
+ 
+       type Invocation_Graph_Edge_Counts is array (Invocation_Kind) of Natural;
+ 
+       ----------------
+       -- Signatures --
+       ----------------
+ 
+       function Hash_Invocation_Signature
+         (IS_Id : Invocation_Signature_Id) return Bucket_Range_Type;
+       pragma Inline (Hash_Invocation_Signature);
+       --  Obtain the hash value of key IS_Id
+ 
+       package Signature_Tables is new Dynamic_Hash_Tables
+         (Key_Type              => Invocation_Signature_Id,
+          Value_Type            => Invocation_Graph_Vertex_Id,
+          No_Value              => No_Invocation_Graph_Vertex,
+          Expansion_Threshold   => 1.5,
+          Expansion_Factor      => 2,
+          Compression_Threshold => 0.3,
+          Compression_Factor    => 2,
+          "="                   => "=",
+          Destroy_Value         => Destroy_Invocation_Graph_Vertex,
+          Hash                  => Hash_Invocation_Signature);
+ 
+       -----------------------
+       -- Elaboration roots --
+       -----------------------
+ 
+       package IGV_Sets is new Membership_Sets
+         (Element_Type => Invocation_Graph_Vertex_Id,
+          "="          => "=",
+          Hash         => Hash_Invocation_Graph_Vertex);
+ 
+       -----------
+       -- Graph --
+       -----------
+ 
+       package DG is new Directed_Graphs
+         (Vertex_Id   => Invocation_Graph_Vertex_Id,
+          No_Vertex   => No_Invocation_Graph_Vertex,
+          Hash_Vertex => Hash_Invocation_Graph_Vertex,
+          Same_Vertex => "=",
+          Edge_id     => Invocation_Graph_Edge_Id,
+          No_Edge     => No_Invocation_Graph_Edge,
+          Hash_Edge   => Hash_Invocation_Graph_Edge,
+          Same_Edge   => "=");
+ 
+       --  The following type represents the attributes of an invocation graph
+ 
+       type Invocation_Graph_Attributes is record
+          Counts : Invocation_Graph_Edge_Counts := (others => 0);
+          --  Edge statistics
+ 
+          Edge_Attributes : IGE_Tables.Dynamic_Hash_Table := IGE_Tables.Nil;
+          --  The map of edge -> edge attributes for all edges in the graph
+ 
+          Graph : DG.Directed_Graph := DG.Nil;
+          --  The underlying graph describing the relations between edges and
+          --  vertices.
+ 
+          Relations : Relation_Sets.Membership_Set := Relation_Sets.Nil;
+          --  The set of relations between source and targets, used to prevent
+          --  duplicate edges in the graph.
+ 
+          Roots : IGV_Sets.Membership_Set := IGV_Sets.Nil;
+          --  The set of elaboration root vertices
+ 
+          Signature_To_Vertex : Signature_Tables.Dynamic_Hash_Table :=
+                                  Signature_Tables.Nil;
+          --  The map of signature -> vertex
+ 
+          Vertex_Attributes : IGV_Tables.Dynamic_Hash_Table := IGV_Tables.Nil;
+          --  The map of vertex -> vertex attributes for all vertices in the
+          --  graph.
+       end record;
+ 
+       type Invocation_Graph is access Invocation_Graph_Attributes;
+       Nil : constant Invocation_Graph := null;
+ 
+       ---------------
+       -- Iterators --
+       ---------------
+ 
+       type All_Edge_Iterator         is new DG.All_Edge_Iterator;
+       type All_Vertex_Iterator       is new DG.All_Vertex_Iterator;
+       type Edges_To_Targets_Iterator is new DG.Outgoing_Edge_Iterator;
+       type Elaboration_Root_Iterator is new IGV_Sets.Iterator;
+    end Invocation_Graphs;
+ 
+    --------------------
+    -- Library_Graphs --
+    --------------------
+ 
+    package Library_Graphs is
+ 
+       --  The following type represents the various kinds of library graph
+       --  cycles. The ordering of kinds is significant, where a literal with
+       --  lower ordinal has a higher precedence than one with higher ordinal.
+ 
+       type Library_Graph_Cycle_Kind is
+         (Elaborate_Body_Cycle,
+          --  A cycle that involves at least one spec-body pair, where the
+          --  spec is subject to pragma Elaborate_Body. This is the highest
+          --  precedence cycle.
+ 
+          Elaborate_Cycle,
+          --  A cycle that involves at least one Elaborate edge
+ 
+          Elaborate_All_Cycle,
+          --  A cycle that involves at least one Elaborate_All edge
+ 
+          Forced_Cycle,
+          --  A cycle that involves at least one edge which is a byproduct of
+          --  the forced-elaboration-order file.
+ 
+          Invocation_Cycle,
+          --  A cycle that involves at least one invocation edge. This is the
+          --  lowest precedence cycle.
+ 
+          No_Cycle_Kind);
+ 
+       --  The following type represents the various kinds of library edges
+ 
+       type Library_Graph_Edge_Kind is
+         (Body_Before_Spec_Edge,
+          --  Successor denotes spec, Predecessor denotes a body. This is a
+          --  special edge kind used only during the discovery of components.
+          --  Note that a body can never be elaborated before its spec.
+ 
+          Elaborate_Edge,
+          --  Successor withs Predecessor, and has pragma Elaborate for it
+ 
+          Elaborate_All_Edge,
+          --  Successor withs Predecessor, and has pragma Elaborate_All for it
+ 
+          Forced_Edge,
+          --  Successor is forced to with Predecessor by virtue of an existing
+          --  elaboration order provided in a file.
+ 
+          Invocation_Edge,
+          --  An invocation construct in unit Successor invokes a target in unit
+          --  Predecessor.
+ 
+          Spec_Before_Body_Edge,
+          --  Successor denotes a body, Predecessor denotes a spec
+ 
+          With_Edge,
+          --  Successor withs Predecessor
+ 
+          No_Edge);
+ 
+       -----------
+       -- Graph --
+       -----------
+ 
+       --  The following type denotes a library graph handle. Each instance must
+       --  be created using routine Create.
+ 
+       type Library_Graph is private;
+       Nil : constant Library_Graph;
+ 
+       type LGE_Predicate_Ptr is access function
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+ 
+       type LGV_Comparator_Ptr is access function
+         (G           : Library_Graph;
+          Vertex      : Library_Graph_Vertex_Id;
+          Compared_To : Library_Graph_Vertex_Id) return Precedence_Kind;
+ 
+       type LGV_Predicate_Ptr is access function
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+ 
+       ----------------------
+       -- Graph operations --
+       ----------------------
+ 
+       procedure Add_Edge
+         (G              : Library_Graph;
+          Pred           : Library_Graph_Vertex_Id;
+          Succ           : Library_Graph_Vertex_Id;
+          Kind           : Library_Graph_Edge_Kind;
+          Activates_Task : Boolean);
+       pragma Inline (Add_Edge);
+       --  Create a new edge in library graph G with source vertex Pred and
+       --  destination vertex Succ. Kind denotes the nature of the edge. Flag
+       --  Activates_Task should be set when the edge involves task activation.
+ 
+       procedure Add_Vertex
+         (G    : Library_Graph;
+          U_Id : Unit_Id);
+       pragma Inline (Add_Vertex);
+       --  Create a new vertex in library graph G. U_Id is the unit the vertex
+       --  describes.
+ 
+       function Create
+         (Initial_Vertices : Positive;
+          Initial_Edges    : Positive) return Library_Graph;
+       pragma Inline (Create);
+       --  Create a new empty graph with vertex capacity Initial_Vertices and
+       --  edge capacity Initial_Edges.
+ 
+       procedure Destroy (G : in out Library_Graph);
+       pragma Inline (Destroy);
+       --  Destroy the contents of library graph G, rendering it unusable
+ 
+       procedure Find_Components (G : Library_Graph);
+       pragma Inline (Find_Components);
+       --  Find all components in library graph G
+ 
+       procedure Find_Cycles (G : Library_Graph);
+       pragma Inline (Find_Cycles);
+       --  Find all cycles in library graph G
+ 
+       function Highest_Precedence_Cycle
+         (G : Library_Graph) return Library_Graph_Cycle_Id;
+       pragma Inline (Highest_Precedence_Cycle);
+       --  Obtain the cycle with highest precedence among all other cycles of
+       --  library graph G.
+ 
+       function Present (G : Library_Graph) return Boolean;
+       pragma Inline (Present);
+       --  Determine whether library graph G exists
+ 
+       -----------------------
+       -- Vertex attributes --
+       -----------------------
+ 
+       function Component
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Component_Id;
+       pragma Inline (Component);
+       --  Obtain the component where vertex Vertex of library graph G resides
+ 
+       function Corresponding_Item
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Library_Graph_Vertex_Id;
+       pragma Inline (Corresponding_Item);
+       --  Obtain the complementary vertex which represents the corresponding
+       --  spec or body of vertex Vertex of library graph G.
+ 
+       function Corresponding_Vertex
+         (G    : Library_Graph;
+          U_Id : Unit_Id) return Library_Graph_Vertex_Id;
+       pragma Inline (Corresponding_Vertex);
+       --  Obtain the corresponding vertex of library graph G which represents
+       --  unit U_Id.
+ 
+       procedure Decrement_Pending_Predecessors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Edge   : Library_Graph_Edge_Id);
+       pragma Inline (Decrement_Pending_Predecessors);
+       --  Decrease the number of pending predecessors vertex Vertex which was
+       --  reached via edge Edge of library graph G must wait until it can be
+       --  elaborated.
+ 
+       function File_Name
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return File_Name_Type;
+       pragma Inline (File_Name);
+       --  Obtain the name of the file where vertex Vertex of library graph G
+       --  resides.
+ 
+       function In_Elaboration_Order
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (In_Elaboration_Order);
+       --  Determine whether vertex Vertex of library graph G is already in some
+       --  elaboration order.
+ 
+       function Invocation_Graph_Encoding
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id)
+          return Invocation_Graph_Encoding_Kind;
+       pragma Inline (Invocation_Graph_Encoding);
+       --  Obtain the encoding format used to capture information related to
+       --  invocation vertices and edges that reside within vertex Vertex of
+       --  library graph G.
+ 
+       function Name
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Unit_Name_Type;
+       pragma Inline (Name);
+       --  Obtain the name of the unit which vertex Vertex of library graph G
+       --  represents.
+ 
+       procedure Pending_Predecessors_For_Elaboration
+         (G            : Library_Graph;
+          Vertex       : Library_Graph_Vertex_Id;
+          Strong_Preds : out Natural;
+          Weak_Preds   : out Natural);
+       pragma Inline (Pending_Predecessors_For_Elaboration);
+       --  Obtain the number of pending strong and weak predecessors of vertex
+       --  Vertex of library graph G, taking into account Elaborate_Body pairs.
+       --  Strong predecessors are returned in Strong_Preds. Weak predecessors
+       --  are returned in Weak_Preds.
+ 
+       function Pending_Strong_Predecessors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Natural;
+       pragma Inline (Pending_Strong_Predecessors);
+       --  Obtain the number of pending strong predecessors vertex Vertex of
+       --  library graph G must wait on until it can be elaborated.
+ 
+       function Pending_Weak_Predecessors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Natural;
+       pragma Inline (Pending_Weak_Predecessors);
+       --  Obtain the number of pending weak predecessors vertex Vertex of
+       --  library graph G must wait on until it can be elaborated.
+ 
+       procedure Set_Corresponding_Item
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Val    : Library_Graph_Vertex_Id);
+       pragma Inline (Set_Corresponding_Item);
+       --  Set the complementary vertex which represents the corresponding
+       --  spec or body of vertex Vertex of library graph G to value Val.
+ 
+       procedure Set_In_Elaboration_Order
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id;
+          Val    : Boolean := True);
+       pragma Inline (Set_In_Elaboration_Order);
+       --  Mark vertex Vertex of library graph G as included in some elaboration
+       --  order depending on value Val.
+ 
+       function Unit
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Unit_Id;
+       pragma Inline (Unit);
+       --  Obtain the unit vertex Vertex of library graph G represents
+ 
+       ---------------------
+       -- Edge attributes --
+       ---------------------
+ 
+       function Activates_Task
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Activates_Task);
+       --  Determine whether edge Edge of library graph G activates a task
+ 
+       function Kind
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Library_Graph_Edge_Kind;
+       pragma Inline (Kind);
+       --  Obtain the nature of edge Edge of library graph G
+ 
+       function Predecessor
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Library_Graph_Vertex_Id;
+       pragma Inline (Predecessor);
+       --  Obtain the predecessor vertex of edge Edge of library graph G
+ 
+       function Successor
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Library_Graph_Vertex_Id;
+       pragma Inline (Successor);
+       --  Obtain the successor vertex of edge Edge of library graph G
+ 
+       --------------------------
+       -- Component attributes --
+       --------------------------
+ 
+       procedure Decrement_Pending_Predecessors
+         (G    : Library_Graph;
+          Comp : Component_Id;
+          Edge : Library_Graph_Edge_Id);
+       pragma Inline (Decrement_Pending_Predecessors);
+       --  Decrease the number of pending predecessors component Comp which was
+       --  reached via edge Edge of library graph G must wait on until it can be
+       --  elaborated.
+ 
+       function Pending_Strong_Predecessors
+         (G    : Library_Graph;
+          Comp : Component_Id) return Natural;
+       pragma Inline (Pending_Strong_Predecessors);
+       --  Obtain the number of pending strong predecessors component Comp of
+       --  library graph G must wait on until it can be elaborated.
+ 
+       function Pending_Weak_Predecessors
+         (G    : Library_Graph;
+          Comp : Component_Id) return Natural;
+       pragma Inline (Pending_Weak_Predecessors);
+       --  Obtain the number of pending weak predecessors component Comp of
+       --  library graph G must wait on until it can be elaborated.
+ 
+       ----------------------
+       -- Cycle attributes --
+       ----------------------
+ 
+       function Invocation_Edge_Count
+         (G      : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Natural;
+       pragma Inline (Invocation_Edge_Count);
+       --  Obtain the number of invocation edges in cycle Cycle of library
+       --  graph G.
+ 
+       function Kind
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Library_Graph_Cycle_Kind;
+       pragma Inline (Kind);
+       --  Obtain the nature of cycle Cycle of library graph G
+ 
+       function Length
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Natural;
+       pragma Inline (Length);
+       --  Obtain the length of cycle Cycle of library graph G
+ 
+       ---------------
+       -- Semantics --
+       ---------------
+ 
+       function Complementary_Vertex
+         (G                : Library_Graph;
+          Vertex           : Library_Graph_Vertex_Id;
+          Force_Complement : Boolean) return Library_Graph_Vertex_Id;
+       pragma Inline (Complementary_Vertex);
+       --  Obtain the complementary vertex of vertex Vertex of library graph G
+       --  as follows:
+       --
+       --    * If Vertex is the spec of an Elaborate_Body pair, return the body
+       --    * If Vertex is the body of an Elaborate_Body pair, return the spec
+       --
+       --  This behavior can be forced by setting flag Force_Complement to True.
+ 
+       function Contains_Elaborate_All_Edge
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Boolean;
+       pragma Inline (Contains_Elaborate_All_Edge);
+       --  Determine whether cycle Cycle of library graph G contains an
+       --  Elaborate_All edge.
+ 
+       function Contains_Static_Successor_Edge
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Boolean;
+       pragma Inline (Contains_Static_Successor_Edge);
+       --  Determine whether cycle Cycle of library graph G contains an edge
+       --  where the successor was compiled using the static model.
+ 
+       function Contains_Task_Activation
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Boolean;
+       pragma Inline (Contains_Task_Activation);
+       --  Determine whether cycle Cycle of library graph G contains an
+       --  invocation edge where the path it represents involves a task
+       --  activation.
+ 
+       function Has_Elaborate_All_Cycle (G : Library_Graph) return Boolean;
+       pragma Inline (Has_Elaborate_All_Cycle);
+       --  Determine whether library graph G contains a cycle involving pragma
+       --  Elaborate_All.
+ 
+       function Has_No_Elaboration_Code
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Has_No_Elaboration_Code);
+       --  Determine whether vertex Vertex of library graph G represents a unit
+       --  that lacks elaboration code.
+ 
+       function In_Same_Component
+         (G     : Library_Graph;
+          Left  : Library_Graph_Vertex_Id;
+          Right : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (In_Same_Component);
+       --  Determine whether vertices Left and Right of library graph G reside
+       --  in the same component.
+ 
+       function Is_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Body);
+       --  Determine whether vertex Vertex of library graph G denotes a body
+ 
+       function Is_Body_Of_Spec_With_Elaborate_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Body_Of_Spec_With_Elaborate_Body);
+       --  Determine whether vertex Vertex of library graph G denotes a body
+       --  with a corresponding spec, and the spec has pragma Elaborate_Body.
+ 
+       function Is_Body_With_Spec
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Body_With_Spec);
+       --  Determine whether vertex Vertex of library graph G denotes a body
+       --  with a corresponding spec.
+ 
+       function Is_Dynamically_Elaborated
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Dynamically_Elaborated);
+       --  Determine whether vertex Vertex of library graph G was compiled
+       --  using the dynamic model.
+ 
+       function Is_Elaborable_Component
+         (G    : Library_Graph;
+          Comp : Component_Id) return Boolean;
+       pragma Inline (Is_Elaborable_Component);
+       --  Determine whether component Comp of library graph G is not waiting on
+       --  any predecessors, and can thus be elaborated.
+ 
+       function Is_Elaborable_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Elaborable_Vertex);
+       --  Determine whether vertex Vertex of library graph G is not waiting on
+       --  any predecessors, and can thus be elaborated.
+ 
+       function Is_Elaborate_All_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Elaborate_All_Edge);
+       --  Determine whether edge Edge of library graph G is an edge whose
+       --  predecessor is subject to pragma Elaborate_All.
+ 
+       function Is_Elaborate_Body_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Elaborate_Body_Edge);
+       --  Determine whether edge Edge of library graph G has a successor
+       --  that is either a spec subject to pragma Elaborate_Body, or a body
+       --  that completes such a spec.
+ 
+       function Is_Elaborate_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Elaborate_Edge);
+       --  Determine whether edge Edge of library graph G is an edge whose
+       --  predecessor is subject to pragma Elaborate.
+ 
+       function Is_Elaborate_Body_Pair
+         (G           : Library_Graph;
+          Spec_Vertex : Library_Graph_Vertex_Id;
+          Body_Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Elaborate_Body_Pair);
+       --  Determine whether vertices Spec_Vertex and Body_Vertex of library
+       --  graph G denote a spec subject to Elaborate_Body and its completing
+       --  body.
+ 
+       function Is_Forced_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Forced_Edge);
+       --  Determine whether edge Edge of library graph G is a byproduct of the
+       --  forced-elaboration-order file.
+ 
+       function Is_Internal_Unit
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Internal_Unit);
+       --  Determine whether vertex Vertex of library graph G denotes an
+       --  internal unit.
+ 
+       function Is_Invocation_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Invocation_Edge);
+       --  Determine whether edge Edge of library graph G came from the
+       --  traversal of the invocation graph.
+ 
+       function Is_Predefined_Unit
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Predefined_Unit);
+       --  Determine whether vertex Vertex of library graph G denotes a
+       --  predefined unit.
+ 
+       function Is_Preelaborated_Unit
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Preelaborated_Unit);
+       --  Determine whether vertex Vertex of library graph G denotes a unit
+       --  subject to pragma Pure or Preelaborable.
+ 
+       function Is_Spec
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Spec);
+       --  Determine whether vertex Vertex of library graph G denotes a spec
+ 
+       function Is_Spec_Before_Body_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_Spec_Before_Body_Edge);
+       --  Determine whether edge Edge of library graph G links a predecessor
+       --  spec and a successor body belonging to the same unit.
+ 
+       function Is_Spec_With_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Spec_With_Body);
+       --  Determine whether vertex Vertex of library graph G denotes a spec
+       --  with a corresponding body.
+ 
+       function Is_Spec_With_Elaborate_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Spec_With_Elaborate_Body);
+       --  Determine whether vertex Vertex of library graph G denotes a spec
+       --  with a corresponding body, and is subject to pragma Elaborate_Body.
+ 
+       function Is_Weakly_Elaborable_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Is_Weakly_Elaborable_Vertex);
+       --  Determine whether vertex Vertex of library graph G is waiting on
+       --  weak predecessors only, in which case it can be elaborated assuming
+       --  that the weak edges will not be exercised at elaboration time.
+ 
+       function Is_With_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) return Boolean;
+       pragma Inline (Is_With_Edge);
+       --  Determine whether edge Edge of library graph G is the result of a
+       --  with dependency between its successor and predecessor.
+ 
+       function Needs_Elaboration
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Boolean;
+       pragma Inline (Needs_Elaboration);
+       --  Determine whether vertex Vertex of library graph G represents a unit
+       --  that needs to be elaborated.
+ 
+       function Proper_Body
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Library_Graph_Vertex_Id;
+       pragma Inline (Proper_Body);
+       --  Obtain the body of vertex Vertex of library graph G
+ 
+       function Proper_Spec
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Library_Graph_Vertex_Id;
+       pragma Inline (Proper_Spec);
+       --  Obtain the spec of vertex Vertex of library graph G
+ 
+       ----------------
+       -- Statistics --
+       ----------------
+ 
+       function Library_Graph_Edge_Count
+         (G    : Library_Graph;
+          Kind : Library_Graph_Edge_Kind) return Natural;
+       pragma Inline (Library_Graph_Edge_Count);
+       --  Obtain the total number of edges of kind Kind in library graph G
+ 
+       function Number_Of_Component_Vertices
+         (G    : Library_Graph;
+          Comp : Component_Id) return Natural;
+       pragma Inline (Number_Of_Component_Vertices);
+       --  Obtain the total number of vertices component Comp of library graph
+       --  contains.
+ 
+       function Number_Of_Components (G : Library_Graph) return Natural;
+       pragma Inline (Number_Of_Components);
+       --  Obtain the total number of components in library graph G
+ 
+       function Number_Of_Cycles (G : Library_Graph) return Natural;
+       pragma Inline (Number_Of_Cycles);
+       --  Obtain the total number of cycles in library graph G
+ 
+       function Number_Of_Edges (G : Library_Graph) return Natural;
+       pragma Inline (Number_Of_Edges);
+       --  Obtain the total number of edges in library graph G
+ 
+       function Number_Of_Edges_To_Successors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Natural;
+       pragma Inline (Number_Of_Edges_To_Successors);
+       --  Obtain the total number of edges to successors vertex Vertex of
+       --  library graph G has.
+ 
+       function Number_Of_Vertices (G : Library_Graph) return Natural;
+       pragma Inline (Number_Of_Vertices);
+       --  Obtain the total number of vertices in library graph G
+ 
+       ---------------
+       -- Iterators --
+       ---------------
+ 
+       --  The following type represents an iterator over all cycles of a
+       --  library graph.
+ 
+       type All_Cycle_Iterator is private;
+ 
+       function Has_Next (Iter : All_Cycle_Iterator) return Boolean;
+       pragma Inline (Has_Next);
+       --  Determine whether iterator Iter has more cycles to examine
+ 
+       function Iterate_All_Cycles
+         (G : Library_Graph) return All_Cycle_Iterator;
+       pragma Inline (Iterate_All_Cycles);
+       --  Obtain an iterator over all cycles of library graph G
+ 
+       procedure Next
+         (Iter  : in out All_Cycle_Iterator;
+          Cycle : out Library_Graph_Cycle_Id);
+       pragma Inline (Next);
+       --  Return the current cycle referenced by iterator Iter and advance to
+       --  the next available cycle.
+ 
+       --  The following type represents an iterator over all edges of a library
+       --  graph.
+ 
+       type All_Edge_Iterator is private;
+ 
+       function Has_Next (Iter : All_Edge_Iterator) return Boolean;
+       pragma Inline (Has_Next);
+       --  Determine whether iterator Iter has more edges to examine
+ 
+       function Iterate_All_Edges (G : Library_Graph) return All_Edge_Iterator;
+       pragma Inline (Iterate_All_Edges);
+       --  Obtain an iterator over all edges of library graph G
+ 
+       procedure Next
+         (Iter : in out All_Edge_Iterator;
+          Edge : out Library_Graph_Edge_Id);
+       pragma Inline (Next);
+       --  Return the current edge referenced by iterator Iter and advance to
+       --  the next available edge.
+ 
+       --  The following type represents an iterator over all vertices of a
+       --  library graph.
+ 
+       type All_Vertex_Iterator is private;
+ 
+       function Has_Next (Iter : All_Vertex_Iterator) return Boolean;
+       pragma Inline (Has_Next);
+       --  Determine whether iterator Iter has more vertices to examine
+ 
+       function Iterate_All_Vertices
+         (G : Library_Graph) return All_Vertex_Iterator;
+       pragma Inline (Iterate_All_Vertices);
+       --  Obtain an iterator over all vertices of library graph G
+ 
+       procedure Next
+         (Iter   : in out All_Vertex_Iterator;
+          Vertex : out Library_Graph_Vertex_Id);
+       pragma Inline (Next);
+       --  Return the current vertex referenced by iterator Iter and advance
+       --  to the next available vertex.
+ 
+       --  The following type represents an iterator over all components of a
+       --  library graph.
+ 
+       type Component_Iterator is private;
+ 
+       function Has_Next (Iter : Component_Iterator) return Boolean;
+       pragma Inline (Has_Next);
+       --  Determine whether iterator Iter has more components to examine
+ 
+       function Iterate_Components
+         (G : Library_Graph) return Component_Iterator;
+       pragma Inline (Iterate_Components);
+       --  Obtain an iterator over all components of library graph G
+ 
+       procedure Next
+         (Iter : in out Component_Iterator;
+          Comp : out Component_Id);
+       pragma Inline (Next);
+       --  Return the current component referenced by iterator Iter and advance
+       --  to the next available component.
+ 
+       --  The following type represents an iterator over all vertices of a
+       --  component.
+ 
+       type Component_Vertex_Iterator is private;
+ 
+       function Has_Next (Iter : Component_Vertex_Iterator) return Boolean;
+       pragma Inline (Has_Next);
+       --  Determine whether iterator Iter has more vertices to examine
+ 
+       function Iterate_Component_Vertices
+         (G    : Library_Graph;
+          Comp : Component_Id) return Component_Vertex_Iterator;
+       pragma Inline (Iterate_Component_Vertices);
+       --  Obtain an iterator over all vertices of component Comp of library
+       --  graph G.
+ 
+       procedure Next
+         (Iter   : in out Component_Vertex_Iterator;
+          Vertex : out Library_Graph_Vertex_Id);
+       pragma Inline (Next);
+       --  Return the current vertex referenced by iterator Iter and advance
+       --  to the next available vertex.
+ 
+       --  The following type represents an iterator over all edges that form a
+       --  cycle.
+ 
+       type Edges_Of_Cycle_Iterator is private;
+ 
+       function Has_Next (Iter : Edges_Of_Cycle_Iterator) return Boolean;
+       pragma Inline (Has_Next);
+       --  Determine whether iterator Iter has more edges to examine
+ 
+       function Iterate_Edges_Of_Cycle
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) return Edges_Of_Cycle_Iterator;
+       pragma Inline (Iterate_Edges_Of_Cycle);
+       --  Obtain an iterator over all edges that form cycle Cycle of library
+       --  graph G.
+ 
+       procedure Next
+         (Iter : in out Edges_Of_Cycle_Iterator;
+          Edge : out Library_Graph_Edge_Id);
+       pragma Inline (Next);
+       --  Return the current edge referenced by iterator Iter and advance to
+       --  the next available edge.
+ 
+       --  The following type represents an iterator over all edges that reach
+       --  successors starting from a particular predecessor vertex.
+ 
+       type Edges_To_Successors_Iterator is private;
+ 
+       function Has_Next (Iter : Edges_To_Successors_Iterator) return Boolean;
+       pragma Inline (Has_Next);
+       --  Determine whether iterator Iter has more edges to examine
+ 
+       function Iterate_Edges_To_Successors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) return Edges_To_Successors_Iterator;
+       pragma Inline (Iterate_Edges_To_Successors);
+       --  Obtain an iterator over all edges to successors with predecessor
+       --  vertex Vertex of library graph G.
+ 
+       procedure Next
+         (Iter : in out Edges_To_Successors_Iterator;
+          Edge : out Library_Graph_Edge_Id);
+       pragma Inline (Next);
+       --  Return the current edge referenced by iterator Iter and advance to
+       --  the next available edge.
+ 
+    private
+ 
+       --------------
+       -- Vertices --
+       --------------
+ 
+       --  The following type represents the attributes of a library graph
+       --  vertex.
+ 
+       type Library_Graph_Vertex_Attributes is record
+          Corresponding_Item : Library_Graph_Vertex_Id :=
+                                 No_Library_Graph_Vertex;
+          --  The reference to the corresponding spec or body. This attribute is
+          --  set as follows:
+          --
+          --    * If predicate Is_Body_With_Spec is True, the reference denotes
+          --      the corresponding spec.
+          --
+          --    * If predicate Is_Spec_With_Body is True, the reference denotes
+          --      the corresponding body.
+          --
+          --    * Otherwise the attribute remains empty.
+ 
+          In_Elaboration_Order : Boolean := False;
+          --  Set when this vertex is elaborated
+ 
+          Pending_Strong_Predecessors : Natural := 0;
+          --  The number of pending strong predecessor vertices this vertex must
+          --  wait on before it can be elaborated.
+ 
+          Pending_Weak_Predecessors : Natural := 0;
+          --  The number of weak predecessor vertices this vertex must wait on
+          --  before it can be elaborated.
+ 
+          Unit : Unit_Id := No_Unit_Id;
+          --  The reference to unit this vertex represents
+       end record;
+ 
+       No_Library_Graph_Vertex_Attributes :
+         constant Library_Graph_Vertex_Attributes :=
+           (Corresponding_Item          => No_Library_Graph_Vertex,
+            In_Elaboration_Order        => False,
+            Pending_Strong_Predecessors => 0,
+            Pending_Weak_Predecessors   => 0,
+            Unit                        => No_Unit_Id);
+ 
+       procedure Destroy_Library_Graph_Vertex_Attributes
+         (Attrs : in out Library_Graph_Vertex_Attributes);
+       pragma Inline (Destroy_Library_Graph_Vertex_Attributes);
+       --  Destroy the contents of attributes Attrs
+ 
+       package LGV_Tables is new Dynamic_Hash_Tables
+         (Key_Type              => Library_Graph_Vertex_Id,
+          Value_Type            => Library_Graph_Vertex_Attributes,
+          No_Value              => No_Library_Graph_Vertex_Attributes,
+          Expansion_Threshold   => 1.5,
+          Expansion_Factor      => 2,
+          Compression_Threshold => 0.3,
+          Compression_Factor    => 2,
+          "="                   => "=",
+          Destroy_Value         => Destroy_Library_Graph_Vertex_Attributes,
+          Hash                  => Hash_Library_Graph_Vertex);
+ 
+       -----------
+       -- Edges --
+       -----------
+ 
+       --  The following type represents the attributes of a library graph edge
+ 
+       type Library_Graph_Edge_Attributes is record
+          Activates_Task : Boolean := False;
+          --  Set for an invocation edge, where at least one of the paths the
+          --  edge represents activates a task.
+ 
+          Kind : Library_Graph_Edge_Kind := No_Edge;
+          --  The nature of the library graph edge
+       end record;
+ 
+       No_Library_Graph_Edge_Attributes :
+         constant Library_Graph_Edge_Attributes :=
+           (Activates_Task => False,
+            Kind           => No_Edge);
+ 
+       procedure Destroy_Library_Graph_Edge_Attributes
+         (Attrs : in out Library_Graph_Edge_Attributes);
+       pragma Inline (Destroy_Library_Graph_Edge_Attributes);
+       --  Destroy the contents of attributes Attrs
+ 
+       package LGE_Tables is new Dynamic_Hash_Tables
+         (Key_Type              => Library_Graph_Edge_Id,
+          Value_Type            => Library_Graph_Edge_Attributes,
+          No_Value              => No_Library_Graph_Edge_Attributes,
+          Expansion_Threshold   => 1.5,
+          Expansion_Factor      => 2,
+          Compression_Threshold => 0.3,
+          Compression_Factor    => 2,
+          "="                   => "=",
+          Destroy_Value         => Destroy_Library_Graph_Edge_Attributes,
+          Hash                  => Hash_Library_Graph_Edge);
+ 
+       ----------------
+       -- Components --
+       ----------------
+ 
+       --  The following type represents the attributes of a component
+ 
+       type Component_Attributes is record
+          Pending_Strong_Predecessors : Natural := 0;
+          --  The number of pending strong predecessor components this component
+          --  must wait on before it can be elaborated.
+ 
+          Pending_Weak_Predecessors : Natural := 0;
+          --  The number of pending weak predecessor components this component
+          --  must wait on before it can be elaborated.
+       end record;
+ 
+       No_Component_Attributes : constant Component_Attributes :=
+         (Pending_Strong_Predecessors => 0,
+          Pending_Weak_Predecessors   => 0);
+ 
+       procedure Destroy_Component_Attributes
+         (Attrs : in out Component_Attributes);
+       pragma Inline (Destroy_Component_Attributes);
+       --  Destroy the contents of attributes Attrs
+ 
+       package Component_Tables is new Dynamic_Hash_Tables
+         (Key_Type              => Component_Id,
+          Value_Type            => Component_Attributes,
+          No_Value              => No_Component_Attributes,
+          Expansion_Threshold   => 1.5,
+          Expansion_Factor      => 2,
+          Compression_Threshold => 0.3,
+          Compression_Factor    => 2,
+          "="                   => "=",
+          Destroy_Value         => Destroy_Component_Attributes,
+          Hash                  => Hash_Component);
+ 
+       ------------
+       -- Cycles --
+       ------------
+ 
+       --  The following type represents the attributes of a cycle
+ 
+       type Library_Graph_Cycle_Attributes is record
+          Invocation_Edge_Count : Natural := 0;
+          --  The number of invocation edges within the cycle
+ 
+          Kind : Library_Graph_Cycle_Kind := No_Cycle_Kind;
+          --  The nature of the cycle
+ 
+          Path : LGE_Lists.Doubly_Linked_List := LGE_Lists.Nil;
+          --  The path of edges that form the cycle
+       end record;
+ 
+       No_Library_Graph_Cycle_Attributes :
+         constant Library_Graph_Cycle_Attributes :=
+           (Invocation_Edge_Count => 0,
+            Kind                  => No_Cycle_Kind,
+            Path                  => LGE_Lists.Nil);
+ 
+       procedure Destroy_Library_Graph_Cycle_Attributes
+         (Attrs : in out Library_Graph_Cycle_Attributes);
+       pragma Inline (Destroy_Library_Graph_Cycle_Attributes);
+       --  Destroy the contents of attributes Attrs
+ 
+       function Hash_Library_Graph_Cycle_Attributes
+         (Attrs : Library_Graph_Cycle_Attributes) return Bucket_Range_Type;
+       pragma Inline (Hash_Library_Graph_Cycle_Attributes);
+       --  Obtain the hash of key Attrs
+ 
+       function Same_Library_Graph_Cycle_Attributes
+         (Left  : Library_Graph_Cycle_Attributes;
+          Right : Library_Graph_Cycle_Attributes) return Boolean;
+       pragma Inline (Same_Library_Graph_Cycle_Attributes);
+       --  Determine whether cycle attributes Left and Right are the same
+ 
+       package LGC_Tables is new Dynamic_Hash_Tables
+         (Key_Type              => Library_Graph_Cycle_Id,
+          Value_Type            => Library_Graph_Cycle_Attributes,
+          No_Value              => No_Library_Graph_Cycle_Attributes,
+          Expansion_Threshold   => 1.5,
+          Expansion_Factor      => 2,
+          Compression_Threshold => 0.3,
+          Compression_Factor    => 2,
+          "="                   => "=",
+          Destroy_Value         => Destroy_Library_Graph_Cycle_Attributes,
+          Hash                  => Hash_Library_Graph_Cycle);
+ 
+       --------------------
+       -- Recorded edges --
+       --------------------
+ 
+       --  The following type represents a relation between a predecessor and
+       --  successor vertices.
+ 
+       type Predecessor_Successor_Relation is record
+          Predecessor : Library_Graph_Vertex_Id := No_Library_Graph_Vertex;
+          --  The source vertex
+ 
+          Successor : Library_Graph_Vertex_Id := No_Library_Graph_Vertex;
+          --  The destination vertex
+       end record;
+ 
+       No_Predecessor_Successor_Relation :
+         constant Predecessor_Successor_Relation :=
+           (Predecessor => No_Library_Graph_Vertex,
+            Successor   => No_Library_Graph_Vertex);
+ 
+       function Hash_Predecessor_Successor_Relation
+         (Rel : Predecessor_Successor_Relation) return Bucket_Range_Type;
+       pragma Inline (Hash_Predecessor_Successor_Relation);
+       --  Obtain the hash value of key Rel
+ 
+       package RE_Sets is new Membership_Sets
+         (Element_Type => Predecessor_Successor_Relation,
+          "="          => "=",
+          Hash         => Hash_Predecessor_Successor_Relation);
+ 
+       ----------------
+       -- Statistics --
+       ----------------
+ 
+       type Library_Graph_Edge_Counts is
+         array (Library_Graph_Edge_Kind) of Natural;
+ 
+       -----------
+       -- Units --
+       -----------
+ 
+       package Unit_Tables is new Dynamic_Hash_Tables
+         (Key_Type              => Unit_Id,
+          Value_Type            => Library_Graph_Vertex_Id,
+          No_Value              => No_Library_Graph_Vertex,
+          Expansion_Threshold   => 1.5,
+          Expansion_Factor      => 2,
+          Compression_Threshold => 0.3,
+          Compression_Factor    => 2,
+          "="                   => "=",
+          Destroy_Value         => Destroy_Library_Graph_Vertex,
+          Hash                  => Hash_Unit);
+ 
+       -----------
+       -- Graph --
+       -----------
+ 
+       package DG is new Directed_Graphs
+         (Vertex_Id   => Library_Graph_Vertex_Id,
+          No_Vertex   => No_Library_Graph_Vertex,
+          Hash_Vertex => Hash_Library_Graph_Vertex,
+          Same_Vertex => "=",
+          Edge_Id     => Library_Graph_Edge_Id,
+          No_Edge     => No_Library_Graph_Edge,
+          Hash_Edge   => Hash_Library_Graph_Edge,
+          Same_Edge   => "=");
+ 
+       --  The following type represents the attributes of a library graph
+ 
+       type Library_Graph_Attributes is record
+          Component_Attributes : Component_Tables.Dynamic_Hash_Table :=
+                                   Component_Tables.Nil;
+          --  The map of component -> component attributes for all components in
+          --  the graph.
+ 
+          Counts : Library_Graph_Edge_Counts := (others => 0);
+          --  Edge statistics
+ 
+          Cycle_Attributes : LGC_Tables.Dynamic_Hash_Table := LGC_Tables.Nil;
+          --  The map of cycle -> cycle attributes for all cycles in the graph
+ 
+          Cycles : LGC_Lists.Doubly_Linked_List := LGC_Lists.Nil;
+          --  The list of all cycles in the graph, sorted based on precedence
+ 
+          Edge_Attributes : LGE_Tables.Dynamic_Hash_Table := LGE_Tables.Nil;
+          --  The map of edge -> edge attributes for all edges in the graph
+ 
+          Graph : DG.Directed_Graph := DG.Nil;
+          --  The underlying graph describing the relations between edges and
+          --  vertices.
+ 
+          Recorded_Edges : RE_Sets.Membership_Set := RE_Sets.Nil;
+          --  The set of recorded edges, used to prevent duplicate edges in the
+          --  graph.
+ 
+          Unit_To_Vertex : Unit_Tables.Dynamic_Hash_Table := Unit_Tables.Nil;
+          --  The map of unit -> vertex
+ 
+          Vertex_Attributes : LGV_Tables.Dynamic_Hash_Table := LGV_Tables.Nil;
+          --  The map of vertex -> vertex attributes for all vertices in the
+          --  graph.
+       end record;
+ 
+       type Library_Graph is access Library_Graph_Attributes;
+       Nil : constant Library_Graph := null;
+ 
+       ---------------
+       -- Iterators --
+       ---------------
+ 
+       type All_Cycle_Iterator           is new LGC_Lists.Iterator;
+       type All_Edge_Iterator            is new DG.All_Edge_Iterator;
+       type All_Vertex_Iterator          is new DG.All_Vertex_Iterator;
+       type Component_Iterator           is new DG.Component_Iterator;
+       type Component_Vertex_Iterator    is new DG.Component_Vertex_Iterator;
+       type Edges_Of_Cycle_Iterator      is new LGE_Lists.Iterator;
+       type Edges_To_Successors_Iterator is new DG.Outgoing_Edge_Iterator;
+    end Library_Graphs;
+ 
+ end Bindo.Graphs;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-units.adb gcc-10.1.0/gcc/ada/bindo-units.adb
*** gcc-9.3.0/gcc/ada/bindo-units.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-units.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,458 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                          B I N D O . U N I T S                           --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Bindo.Writers;
+ use  Bindo.Writers;
+ use  Bindo.Writers.Phase_Writers;
+ 
+ package body Bindo.Units is
+ 
+    -------------------
+    -- Signature set --
+    -------------------
+ 
+    package Signature_Sets is new Membership_Sets
+      (Element_Type => Invocation_Signature_Id,
+       "="          => "=",
+       Hash         => Hash_Invocation_Signature);
+ 
+    -----------------
+    -- Global data --
+    -----------------
+ 
+    --  The following set stores all invocation signatures that appear in
+    --  elaborable units.
+ 
+    Elaborable_Constructs : Signature_Sets.Membership_Set := Signature_Sets.Nil;
+ 
+    --  The following set stores all units the need to be elaborated
+ 
+    Elaborable_Units : Unit_Sets.Membership_Set := Unit_Sets.Nil;
+ 
+    -----------------------
+    -- Local subprograms --
+    -----------------------
+ 
+    function Corresponding_Unit (Nam : Name_Id) return Unit_Id;
+    pragma Inline (Corresponding_Unit);
+    --  Obtain the unit which corresponds to name Nam
+ 
+    function Is_Stand_Alone_Library_Unit (U_Id : Unit_Id) return Boolean;
+    pragma Inline (Is_Stand_Alone_Library_Unit);
+    --  Determine whether unit U_Id is part of a stand-alone library
+ 
+    procedure Process_Invocation_Construct (IC_Id : Invocation_Construct_Id);
+    pragma Inline (Process_Invocation_Construct);
+    --  Process invocation construct IC_Id by adding its signature to set
+    --  Elaborable_Constructs_Set.
+ 
+    procedure Process_Invocation_Constructs (U_Id : Unit_Id);
+    pragma Inline (Process_Invocation_Constructs);
+    --  Process all invocation constructs of unit U_Id for classification
+    --  purposes.
+ 
+    procedure Process_Unit (U_Id : Unit_Id);
+    pragma Inline (Process_Unit);
+    --  Process unit U_Id for unit classification purposes
+ 
+    ------------------------------
+    -- Collect_Elaborable_Units --
+    ------------------------------
+ 
+    procedure Collect_Elaborable_Units is
+    begin
+       Start_Phase (Unit_Collection);
+ 
+       for U_Id in ALI.Units.First .. ALI.Units.Last loop
+          Process_Unit (U_Id);
+       end loop;
+ 
+       End_Phase (Unit_Collection);
+    end Collect_Elaborable_Units;
+ 
+    ------------------------
+    -- Corresponding_Body --
+    ------------------------
+ 
+    function Corresponding_Body (U_Id : Unit_Id) return Unit_Id is
+       pragma Assert (Present (U_Id));
+ 
+       U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+    begin
+       pragma Assert (U_Rec.Utype = Is_Spec);
+       return U_Id - 1;
+    end Corresponding_Body;
+ 
+    ------------------------
+    -- Corresponding_Spec --
+    ------------------------
+ 
+    function Corresponding_Spec (U_Id : Unit_Id) return Unit_Id is
+       pragma Assert (Present (U_Id));
+ 
+       U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+    begin
+       pragma Assert (U_Rec.Utype = Is_Body);
+       return U_Id + 1;
+    end Corresponding_Spec;
+ 
+    ------------------------
+    -- Corresponding_Unit --
+    ------------------------
+ 
+    function Corresponding_Unit (FNam : File_Name_Type) return Unit_Id is
+    begin
+       return Corresponding_Unit (Name_Id (FNam));
+    end Corresponding_Unit;
+ 
+    ------------------------
+    -- Corresponding_Unit --
+    ------------------------
+ 
+    function Corresponding_Unit (Nam : Name_Id) return Unit_Id is
+    begin
+       return Unit_Id (Get_Name_Table_Int (Nam));
+    end Corresponding_Unit;
+ 
+    ------------------------
+    -- Corresponding_Unit --
+    ------------------------
+ 
+    function Corresponding_Unit (UNam : Unit_Name_Type) return Unit_Id is
+    begin
+       return Corresponding_Unit (Name_Id (UNam));
+    end Corresponding_Unit;
+ 
+    ---------------
+    -- File_Name --
+    ---------------
+ 
+    function File_Name (U_Id : Unit_Id) return File_Name_Type is
+       pragma Assert (Present (U_Id));
+ 
+       U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+    begin
+       return U_Rec.Sfile;
+    end File_Name;
+ 
+    --------------------
+    -- Finalize_Units --
+    --------------------
+ 
+    procedure Finalize_Units is
+    begin
+       Signature_Sets.Destroy (Elaborable_Constructs);
+       Unit_Sets.Destroy      (Elaborable_Units);
+    end Finalize_Units;
+ 
+    ------------------------------
+    -- For_Each_Elaborable_Unit --
+    ------------------------------
+ 
+    procedure For_Each_Elaborable_Unit (Processor : Unit_Processor_Ptr) is
+       Iter : Elaborable_Units_Iterator;
+       U_Id : Unit_Id;
+ 
+    begin
+       Iter := Iterate_Elaborable_Units;
+       while Has_Next (Iter) loop
+          Next (Iter, U_Id);
+ 
+          Processor.all (U_Id);
+       end loop;
+    end For_Each_Elaborable_Unit;
+ 
+    -------------------
+    -- For_Each_Unit --
+    -------------------
+ 
+    procedure For_Each_Unit (Processor : Unit_Processor_Ptr) is
+    begin
+       for U_Id in ALI.Units.First .. ALI.Units.Last loop
+          Processor.all (U_Id);
+       end loop;
+    end For_Each_Unit;
+ 
+    --------------
+    -- Has_Next --
+    --------------
+ 
+    function Has_Next (Iter : Elaborable_Units_Iterator) return Boolean is
+    begin
+       return Unit_Sets.Has_Next (Unit_Sets.Iterator (Iter));
+    end Has_Next;
+ 
+    -----------------------------
+    -- Has_No_Elaboration_Code --
+    -----------------------------
+ 
+    function Has_No_Elaboration_Code (U_Id : Unit_Id) return Boolean is
+       pragma Assert (Present (U_Id));
+ 
+       U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+    begin
+       return U_Rec.No_Elab;
+    end Has_No_Elaboration_Code;
+ 
+    -------------------------------
+    -- Hash_Invocation_Signature --
+    -------------------------------
+ 
+    function Hash_Invocation_Signature
+      (IS_Id : Invocation_Signature_Id) return Bucket_Range_Type
+    is
+    begin
+       pragma Assert (Present (IS_Id));
+ 
+       return Bucket_Range_Type (IS_Id);
+    end Hash_Invocation_Signature;
+ 
+    ---------------
+    -- Hash_Unit --
+    ---------------
+ 
+    function Hash_Unit (U_Id : Unit_Id) return Bucket_Range_Type is
+    begin
+       pragma Assert (Present (U_Id));
+ 
+       return Bucket_Range_Type (U_Id);
+    end Hash_Unit;
+ 
+    ----------------------
+    -- Initialize_Units --
+    ----------------------
+ 
+    procedure Initialize_Units is
+    begin
+       Elaborable_Constructs := Signature_Sets.Create (Number_Of_Units);
+       Elaborable_Units      := Unit_Sets.Create      (Number_Of_Units);
+    end Initialize_Units;
+ 
+    -------------------------------
+    -- Invocation_Graph_Encoding --
+    -------------------------------
+ 
+    function Invocation_Graph_Encoding
+      (U_Id : Unit_Id) return Invocation_Graph_Encoding_Kind
+    is
+       pragma Assert (Present (U_Id));
+ 
+       U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+       U_ALI : ALIs_Record renames ALI.ALIs.Table  (U_Rec.My_ALI);
+ 
+    begin
+       return U_ALI.Invocation_Graph_Encoding;
+    end Invocation_Graph_Encoding;
+ 
+    -------------------------------
+    -- Is_Dynamically_Elaborated --
+    -------------------------------
+ 
+    function Is_Dynamically_Elaborated (U_Id : Unit_Id) return Boolean is
+       pragma Assert (Present (U_Id));
+ 
+       U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+    begin
+       return U_Rec.Dynamic_Elab;
+    end Is_Dynamically_Elaborated;
+ 
+    ----------------------
+    -- Is_Internal_Unit --
+    ----------------------
+ 
+    function Is_Internal_Unit (U_Id : Unit_Id) return Boolean is
+       pragma Assert (Present (U_Id));
+ 
+       U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+    begin
+       return U_Rec.Internal;
+    end Is_Internal_Unit;
+ 
+    ------------------------
+    -- Is_Predefined_Unit --
+    ------------------------
+ 
+    function Is_Predefined_Unit (U_Id : Unit_Id) return Boolean is
+       pragma Assert (Present (U_Id));
+ 
+       U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+    begin
+       return U_Rec.Predefined;
+    end Is_Predefined_Unit;
+ 
+    ---------------------------------
+    -- Is_Stand_Alone_Library_Unit --
+    ---------------------------------
+ 
+    function Is_Stand_Alone_Library_Unit (U_Id : Unit_Id) return Boolean is
+       pragma Assert (Present (U_Id));
+ 
+       U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+    begin
+       return U_Rec.SAL_Interface;
+    end Is_Stand_Alone_Library_Unit;
+ 
+    ------------------------------
+    -- Iterate_Elaborable_Units --
+    ------------------------------
+ 
+    function Iterate_Elaborable_Units return Elaborable_Units_Iterator is
+    begin
+       return Elaborable_Units_Iterator (Unit_Sets.Iterate (Elaborable_Units));
+    end Iterate_Elaborable_Units;
+ 
+    ----------
+    -- Name --
+    ----------
+ 
+    function Name (U_Id : Unit_Id) return Unit_Name_Type is
+       pragma Assert (Present (U_Id));
+ 
+       U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+    begin
+       return U_Rec.Uname;
+    end Name;
+ 
+    -----------------------
+    -- Needs_Elaboration --
+    -----------------------
+ 
+    function Needs_Elaboration
+      (IS_Id : Invocation_Signature_Id) return Boolean
+    is
+    begin
+       pragma Assert (Present (IS_Id));
+ 
+       return Signature_Sets.Contains (Elaborable_Constructs, IS_Id);
+    end Needs_Elaboration;
+ 
+    -----------------------
+    -- Needs_Elaboration --
+    -----------------------
+ 
+    function Needs_Elaboration (U_Id : Unit_Id) return Boolean is
+    begin
+       pragma Assert (Present (U_Id));
+ 
+       return Unit_Sets.Contains (Elaborable_Units, U_Id);
+    end Needs_Elaboration;
+ 
+    ----------
+    -- Next --
+    ----------
+ 
+    procedure Next
+      (Iter : in out Elaborable_Units_Iterator;
+       U_Id : out Unit_Id)
+    is
+    begin
+       Unit_Sets.Next (Unit_Sets.Iterator (Iter), U_Id);
+    end Next;
+ 
+    --------------------------------
+    -- Number_Of_Elaborable_Units --
+    --------------------------------
+ 
+    function Number_Of_Elaborable_Units return Natural is
+    begin
+       return Unit_Sets.Size (Elaborable_Units);
+    end Number_Of_Elaborable_Units;
+ 
+    ---------------------
+    -- Number_Of_Units --
+    ---------------------
+ 
+    function Number_Of_Units return Natural is
+    begin
+       return Natural (ALI.Units.Last) - Natural (ALI.Units.First) + 1;
+    end Number_Of_Units;
+ 
+    ----------------------------------
+    -- Process_Invocation_Construct --
+    ----------------------------------
+ 
+    procedure Process_Invocation_Construct (IC_Id : Invocation_Construct_Id) is
+       pragma Assert (Present (IC_Id));
+ 
+       IS_Id : constant Invocation_Signature_Id := Signature (IC_Id);
+ 
+       pragma Assert (Present (IS_Id));
+ 
+    begin
+       Signature_Sets.Insert (Elaborable_Constructs, IS_Id);
+    end Process_Invocation_Construct;
+ 
+    -----------------------------------
+    -- Process_Invocation_Constructs --
+    -----------------------------------
+ 
+    procedure Process_Invocation_Constructs (U_Id : Unit_Id) is
+       pragma Assert (Present (U_Id));
+ 
+       U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+    begin
+       for IC_Id in U_Rec.First_Invocation_Construct ..
+                    U_Rec.Last_Invocation_Construct
+       loop
+          Process_Invocation_Construct (IC_Id);
+       end loop;
+    end Process_Invocation_Constructs;
+ 
+    ------------------
+    -- Process_Unit --
+    ------------------
+ 
+    procedure Process_Unit (U_Id : Unit_Id) is
+    begin
+       pragma Assert (Present (U_Id));
+ 
+       --  A stand-alone library unit must not be elaborated as part of the
+       --  current compilation because the library already carries its own
+       --  elaboration code.
+ 
+       if Is_Stand_Alone_Library_Unit (U_Id) then
+          null;
+ 
+       --  Otherwise the unit needs to be elaborated. Add it to the set
+       --  of units that require elaboration, as well as all invocation
+       --  signatures of constructs it declares.
+ 
+       else
+          Unit_Sets.Insert (Elaborable_Units, U_Id);
+          Process_Invocation_Constructs (U_Id);
+       end if;
+    end Process_Unit;
+ 
+ end Bindo.Units;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-units.ads gcc-10.1.0/gcc/ada/bindo-units.ads
*** gcc-9.3.0/gcc/ada/bindo-units.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-units.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,172 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                          B I N D O . U N I T S                           --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  For full architecture, see unit Bindo.
+ 
+ --  The following unit contains facilities to collect all elaborable units in
+ --  the bind and inspect their properties.
+ 
+ with GNAT;      use GNAT;
+ with GNAT.Sets; use GNAT.Sets;
+ 
+ package Bindo.Units is
+ 
+    ---------------
+    -- Unit sets --
+    ---------------
+ 
+    function Hash_Unit (U_Id : Unit_Id) return Bucket_Range_Type;
+    pragma Inline (Hash_Unit);
+    --  Obtain the hash value of key U_Id
+ 
+    package Unit_Sets is new Membership_Sets
+      (Element_Type => Unit_Id,
+       "="          => "=",
+       Hash         => Hash_Unit);
+ 
+    procedure Collect_Elaborable_Units;
+    pragma Inline (Collect_Elaborable_Units);
+    --  Gather all units in the bind that require elaboration. The units are
+    --  accessible via iterator Elaborable_Units_Iterator.
+ 
+    function Corresponding_Body (U_Id : Unit_Id) return Unit_Id;
+    pragma Inline (Corresponding_Body);
+    --  Return the body of a spec unit U_Id
+ 
+    function Corresponding_Spec (U_Id : Unit_Id) return Unit_Id;
+    pragma Inline (Corresponding_Spec);
+    --  Return the spec of a body unit U_Id
+ 
+    function Corresponding_Unit (FNam : File_Name_Type) return Unit_Id;
+    pragma Inline (Corresponding_Unit);
+    --  Obtain the unit which corresponds to name FNam
+ 
+    function Corresponding_Unit (UNam : Unit_Name_Type) return Unit_Id;
+    pragma Inline (Corresponding_Unit);
+    --  Obtain the unit which corresponds to name FNam
+ 
+    function File_Name (U_Id : Unit_Id) return File_Name_Type;
+    pragma Inline (File_Name);
+    --  Obtain the file name of unit U_Id
+ 
+    type Unit_Processor_Ptr is access procedure (U_Id : Unit_Id);
+ 
+    procedure For_Each_Elaborable_Unit (Processor : Unit_Processor_Ptr);
+    pragma Inline (For_Each_Elaborable_Unit);
+    --  Invoke Processor on each elaborable unit in the bind
+ 
+    procedure For_Each_Unit (Processor : Unit_Processor_Ptr);
+    pragma Inline (For_Each_Unit);
+    --  Invoke Processor on each unit in the bind
+ 
+    function Has_No_Elaboration_Code (U_Id : Unit_Id) return Boolean;
+    pragma Inline (Has_No_Elaboration_Code);
+    --  Determine whether unit U_Id lacks elaboration code
+ 
+    function Hash_Invocation_Signature
+      (IS_Id : Invocation_Signature_Id) return Bucket_Range_Type;
+    pragma Inline (Hash_Invocation_Signature);
+    --  Obtain the hash value of key IS_Id
+ 
+    function Invocation_Graph_Encoding
+      (U_Id : Unit_Id) return Invocation_Graph_Encoding_Kind;
+    pragma Inline (Invocation_Graph_Encoding);
+    --  Obtain the encoding format used to capture invocation constructs and
+    --  relations in the ALI file of unit U_Id.
+ 
+    function Is_Dynamically_Elaborated (U_Id : Unit_Id) return Boolean;
+    pragma Inline (Is_Dynamically_Elaborated);
+    --  Determine whether unit U_Id was compiled using the dynamic elaboration
+    --  model.
+ 
+    function Is_Internal_Unit (U_Id : Unit_Id) return Boolean;
+    pragma Inline (Is_Internal_Unit);
+    --  Determine whether unit U_Id is internal
+ 
+    function Is_Predefined_Unit (U_Id : Unit_Id) return Boolean;
+    pragma Inline (Is_Predefined_Unit);
+    --  Determine whether unit U_Id is predefined
+ 
+    function Name (U_Id : Unit_Id) return Unit_Name_Type;
+    pragma Inline (Name);
+    --  Obtain the name of unit U_Id
+ 
+    function Needs_Elaboration (IS_Id : Invocation_Signature_Id) return Boolean;
+    pragma Inline (Needs_Elaboration);
+    --  Determine whether invocation signature IS_Id belongs to a construct that
+    --  appears in a unit which needs to be elaborated.
+ 
+    function Needs_Elaboration (U_Id : Unit_Id) return Boolean;
+    pragma Inline (Needs_Elaboration);
+    --  Determine whether unit U_Id needs to be elaborated
+ 
+    function Number_Of_Elaborable_Units return Natural;
+    pragma Inline (Number_Of_Elaborable_Units);
+    --  Obtain the number of units in the bind that need to be elaborated
+ 
+    function Number_Of_Units return Natural;
+    pragma Inline (Number_Of_Units);
+    --  Obtain the number of units in the bind
+ 
+    ---------------
+    -- Iterators --
+    ---------------
+ 
+    --  The following type represents an iterator over all units that need to be
+    --  elaborated.
+ 
+    type Elaborable_Units_Iterator is private;
+ 
+    function Has_Next (Iter : Elaborable_Units_Iterator) return Boolean;
+    pragma Inline (Has_Next);
+    --  Determine whether iterator Iter has more units to examine
+ 
+    function Iterate_Elaborable_Units return Elaborable_Units_Iterator;
+    pragma Inline (Iterate_Elaborable_Units);
+    --  Obtain an iterator over all units that need to be elaborated
+ 
+    procedure Next
+      (Iter : in out Elaborable_Units_Iterator;
+       U_Id : out Unit_Id);
+    pragma Inline (Next);
+    --  Return the current unit referenced by iterator Iter and advance to the
+    --  next available unit.
+ 
+    -----------------
+    -- Maintenance --
+    -----------------
+ 
+    procedure Finalize_Units;
+    pragma Inline (Finalize_Units);
+    --  Destroy the internal structures of this unit
+ 
+    procedure Initialize_Units;
+    pragma Inline (Initialize_Units);
+    --  Initialize the internal structures of this unit
+ 
+ private
+    type Elaborable_Units_Iterator is new Unit_Sets.Iterator;
+ 
+ end Bindo.Units;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-validators.adb gcc-10.1.0/gcc/ada/bindo-validators.adb
*** gcc-9.3.0/gcc/ada/bindo-validators.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-validators.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,834 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                      B I N D O . V A L I D A T O R S                     --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Debug;  use Debug;
+ with Output; use Output;
+ with Types;  use Types;
+ 
+ with Bindo.Units;
+ use  Bindo.Units;
+ 
+ with Bindo.Writers;
+ use  Bindo.Writers;
+ use  Bindo.Writers.Phase_Writers;
+ 
+ package body Bindo.Validators is
+ 
+    -----------------------
+    -- Local subprograms --
+    -----------------------
+ 
+    procedure Write_Error
+      (Msg  : String;
+       Flag : out Boolean);
+    pragma Inline (Write_Error);
+    --  Write error message Msg to standard output and set flag Flag to True
+ 
+    ----------------------
+    -- Cycle_Validators --
+    ----------------------
+ 
+    package body Cycle_Validators is
+       Has_Invalid_Cycle : Boolean := False;
+       --  Flag set when the library graph contains an invalid cycle
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Validate_Cycle
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id);
+       pragma Inline (Validate_Cycle);
+       --  Ensure that a cycle meets the following requirements:
+       --
+       --    * Is of proper kind
+       --    * Has enough edges to form a circuit
+       --    * No edge is repeated
+ 
+       procedure Validate_Cycle_Path
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id);
+       pragma Inline (Validate_Cycle_Path);
+       --  Ensure that the path of a cycle meets the following requirements:
+       --
+       --    * No edge is repeated
+ 
+       --------------------
+       -- Validate_Cycle --
+       --------------------
+ 
+       procedure Validate_Cycle
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id)
+       is
+          Msg : constant String := "Validate_Cycle";
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          if not Present (Cycle) then
+             Write_Error (Msg, Has_Invalid_Cycle);
+ 
+             Write_Str ("  empty cycle");
+             Write_Eol;
+             Write_Eol;
+             return;
+          end if;
+ 
+          if Kind (G, Cycle) = No_Cycle_Kind then
+             Write_Error (Msg, Has_Invalid_Cycle);
+ 
+             Write_Str ("  cycle (LGC_Id_");
+             Write_Int (Int (Cycle));
+             Write_Str (") is a No_Cycle");
+             Write_Eol;
+             Write_Eol;
+          end if;
+ 
+          --  A cycle requires at least one edge (self cycle) to form a circuit
+ 
+          if Length (G, Cycle) < 1 then
+             Write_Error (Msg, Has_Invalid_Cycle);
+ 
+             Write_Str ("  cycle (LGC_Id_");
+             Write_Int (Int (Cycle));
+             Write_Str (") does not contain enough edges");
+             Write_Eol;
+             Write_Eol;
+          end if;
+ 
+          Validate_Cycle_Path (G, Cycle);
+       end Validate_Cycle;
+ 
+       -------------------------
+       -- Validate_Cycle_Path --
+       -------------------------
+ 
+       procedure Validate_Cycle_Path
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id)
+       is
+          Msg : constant String := "Validate_Cycle_Path";
+ 
+          Edge  : Library_Graph_Edge_Id;
+          Edges : LGE_Sets.Membership_Set;
+          Iter  : Edges_Of_Cycle_Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          --  Use a set to detect duplicate edges while traversing the cycle
+ 
+          Edges := LGE_Sets.Create (Length (G, Cycle));
+ 
+          --  Inspect the edges of the cycle, trying to catch duplicates
+ 
+          Iter := Iterate_Edges_Of_Cycle (G, Cycle);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+ 
+             --  The current edge has already been encountered while traversing
+             --  the cycle. This indicates that the cycle is malformed as edges
+             --  are not repeated in the circuit.
+ 
+             if LGE_Sets.Contains (Edges, Edge) then
+                Write_Error (Msg, Has_Invalid_Cycle);
+ 
+                Write_Str ("  library graph edge (LGE_Id_");
+                Write_Int (Int (Edge));
+                Write_Str (") is repeated in cycle (LGC_Id_");
+                Write_Int (Int (Cycle));
+                Write_Str (")");
+                Write_Eol;
+ 
+             --  Otherwise add the current edge to the set of encountered edges
+ 
+             else
+                LGE_Sets.Insert (Edges, Edge);
+             end if;
+          end loop;
+ 
+          LGE_Sets.Destroy (Edges);
+       end Validate_Cycle_Path;
+ 
+       ---------------------
+       -- Validate_Cycles --
+       ---------------------
+ 
+       procedure Validate_Cycles (G : Library_Graph) is
+          Cycle : Library_Graph_Cycle_Id;
+          Iter  : All_Cycle_Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          --  Nothing to do when switch -d_V (validate bindo cycles, graphs, and
+          --  order) is not in effect.
+ 
+          if not Debug_Flag_Underscore_VV then
+             return;
+          end if;
+ 
+          Start_Phase (Cycle_Validation);
+ 
+          Iter := Iterate_All_Cycles (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Cycle);
+ 
+             Validate_Cycle (G, Cycle);
+          end loop;
+ 
+          End_Phase (Cycle_Validation);
+ 
+          if Has_Invalid_Cycle then
+             raise Invalid_Cycle;
+          end if;
+       end Validate_Cycles;
+    end Cycle_Validators;
+ 
+    ----------------------------------
+    -- Elaboration_Order_Validators --
+    ----------------------------------
+ 
+    package body Elaboration_Order_Validators is
+       Has_Invalid_Data : Boolean := False;
+       --  Flag set when the elaboration order contains invalid data
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       function Build_Elaborable_Unit_Set return Unit_Sets.Membership_Set;
+       pragma Inline (Build_Elaborable_Unit_Set);
+       --  Create a set from all units that need to be elaborated
+ 
+       procedure Report_Missing_Elaboration (U_Id : Unit_Id);
+       pragma Inline (Report_Missing_Elaboration);
+       --  Emit an error concerning unit U_Id that must be elaborated, but was
+       --  not.
+ 
+       procedure Report_Missing_Elaborations (Set : Unit_Sets.Membership_Set);
+       pragma Inline (Report_Missing_Elaborations);
+       --  Emit errors on all units in set Set that must be elaborated, but were
+       --  not.
+ 
+       procedure Report_Spurious_Elaboration (U_Id : Unit_Id);
+       pragma Inline (Report_Spurious_Elaboration);
+       --  Emit an error concerning unit U_Id that is incorrectly elaborated
+ 
+       procedure Validate_Unit
+         (U_Id     : Unit_Id;
+          Elab_Set : Unit_Sets.Membership_Set);
+       pragma Inline (Validate_Unit);
+       --  Validate the elaboration status of unit U_Id. Elab_Set is the set of
+       --  all units that need to be elaborated.
+ 
+       procedure Validate_Units (Order : Unit_Id_Table);
+       pragma Inline (Validate_Units);
+       --  Validate all units in elaboration order Order
+ 
+       -------------------------------
+       -- Build_Elaborable_Unit_Set --
+       -------------------------------
+ 
+       function Build_Elaborable_Unit_Set return Unit_Sets.Membership_Set is
+          Iter : Elaborable_Units_Iterator;
+          Set  : Unit_Sets.Membership_Set;
+          U_Id : Unit_Id;
+ 
+       begin
+          Set  := Unit_Sets.Create (Number_Of_Elaborable_Units);
+          Iter := Iterate_Elaborable_Units;
+          while Has_Next (Iter) loop
+             Next (Iter, U_Id);
+ 
+             Unit_Sets.Insert (Set, U_Id);
+          end loop;
+ 
+          return Set;
+       end Build_Elaborable_Unit_Set;
+ 
+       --------------------------------
+       -- Report_Missing_Elaboration --
+       --------------------------------
+ 
+       procedure Report_Missing_Elaboration (U_Id : Unit_Id) is
+          Msg : constant String := "Report_Missing_Elaboration";
+ 
+       begin
+          pragma Assert (Present (U_Id));
+          Write_Error (Msg, Has_Invalid_Data);
+ 
+          Write_Str  ("unit (U_Id_");
+          Write_Int  (Int (U_Id));
+          Write_Str  (") name = ");
+          Write_Name (Name (U_Id));
+          Write_Str  (" must be elaborated");
+          Write_Eol;
+       end Report_Missing_Elaboration;
+ 
+       ---------------------------------
+       -- Report_Missing_Elaborations --
+       ---------------------------------
+ 
+       procedure Report_Missing_Elaborations (Set : Unit_Sets.Membership_Set) is
+          Iter : Unit_Sets.Iterator;
+          U_Id : Unit_Id;
+ 
+       begin
+          Iter := Unit_Sets.Iterate (Set);
+          while Unit_Sets.Has_Next (Iter) loop
+             Unit_Sets.Next (Iter, U_Id);
+ 
+             Report_Missing_Elaboration (U_Id);
+          end loop;
+       end Report_Missing_Elaborations;
+ 
+       ---------------------------------
+       -- Report_Spurious_Elaboration --
+       ---------------------------------
+ 
+       procedure Report_Spurious_Elaboration (U_Id : Unit_Id) is
+          Msg : constant String := "Report_Spurious_Elaboration";
+ 
+       begin
+          pragma Assert (Present (U_Id));
+          Write_Error (Msg, Has_Invalid_Data);
+ 
+          Write_Str  ("unit (U_Id_");
+          Write_Int  (Int (U_Id));
+          Write_Str  (") name = ");
+          Write_Name (Name (U_Id));
+          Write_Str  (" must not be elaborated");
+       end Report_Spurious_Elaboration;
+ 
+       --------------------------------
+       -- Validate_Elaboration_Order --
+       --------------------------------
+ 
+       procedure Validate_Elaboration_Order (Order : Unit_Id_Table) is
+       begin
+          --  Nothing to do when switch -d_V (validate bindo cycles, graphs, and
+          --  order) is not in effect.
+ 
+          if not Debug_Flag_Underscore_VV then
+             return;
+          end if;
+ 
+          Start_Phase (Elaboration_Order_Validation);
+ 
+          Validate_Units (Order);
+ 
+          End_Phase (Elaboration_Order_Validation);
+ 
+          if Has_Invalid_Data then
+             raise Invalid_Elaboration_Order;
+          end if;
+       end Validate_Elaboration_Order;
+ 
+       -------------------
+       -- Validate_Unit --
+       -------------------
+ 
+       procedure Validate_Unit
+         (U_Id     : Unit_Id;
+          Elab_Set : Unit_Sets.Membership_Set)
+       is
+       begin
+          pragma Assert (Present (U_Id));
+ 
+          --  The current unit in the elaboration order appears within the set
+          --  of units that require elaboration. Remove it from the set.
+ 
+          if Unit_Sets.Contains (Elab_Set, U_Id) then
+             Unit_Sets.Delete (Elab_Set, U_Id);
+ 
+          --  Otherwise the current unit in the elaboration order must not be
+          --  elaborated.
+ 
+          else
+             Report_Spurious_Elaboration (U_Id);
+          end if;
+       end Validate_Unit;
+ 
+       --------------------
+       -- Validate_Units --
+       --------------------
+ 
+       procedure Validate_Units (Order : Unit_Id_Table) is
+          Elab_Set : Unit_Sets.Membership_Set;
+ 
+       begin
+          --  Collect all units in the compilation that need to be elaborated
+          --  in a set.
+ 
+          Elab_Set := Build_Elaborable_Unit_Set;
+ 
+          --  Validate each unit in the elaboration order against the set of
+          --  units that need to be elaborated.
+ 
+          for Index in Unit_Id_Tables.First .. Unit_Id_Tables.Last (Order) loop
+             Validate_Unit
+               (U_Id     => Order.Table (Index),
+                Elab_Set => Elab_Set);
+          end loop;
+ 
+          --  At this point all units that need to be elaborated should have
+          --  been eliminated from the set. Report any units that are missing
+          --  their elaboration.
+ 
+          Report_Missing_Elaborations (Elab_Set);
+          Unit_Sets.Destroy (Elab_Set);
+       end Validate_Units;
+    end Elaboration_Order_Validators;
+ 
+    ---------------------------------
+    -- Invocation_Graph_Validators --
+    ---------------------------------
+ 
+    package body Invocation_Graph_Validators is
+       Has_Invalid_Data : Boolean := False;
+       --  Flag set when the invocation graph contains invalid data
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Validate_Invocation_Graph_Edge
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id);
+       pragma Inline (Validate_Invocation_Graph_Edge);
+       --  Verify that the attributes of edge Edge of invocation graph G are
+       --  properly set.
+ 
+       procedure Validate_Invocation_Graph_Edges (G : Invocation_Graph);
+       pragma Inline (Validate_Invocation_Graph_Edges);
+       --  Verify that the attributes of all edges of invocation graph G are
+       --  properly set.
+ 
+       procedure Validate_Invocation_Graph_Vertex
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id);
+       pragma Inline (Validate_Invocation_Graph_Vertex);
+       --  Verify that the attributes of vertex Vertex of invocation graph G are
+       --  properly set.
+ 
+       procedure Validate_Invocation_Graph_Vertices (G : Invocation_Graph);
+       pragma Inline (Validate_Invocation_Graph_Vertices);
+       --  Verify that the attributes of all vertices of invocation graph G are
+       --  properly set.
+ 
+       -------------------------------
+       -- Validate_Invocation_Graph --
+       -------------------------------
+ 
+       procedure Validate_Invocation_Graph (G : Invocation_Graph) is
+       begin
+          pragma Assert (Present (G));
+ 
+          --  Nothing to do when switch -d_V (validate bindo cycles, graphs, and
+          --  order) is not in effect.
+ 
+          if not Debug_Flag_Underscore_VV then
+             return;
+          end if;
+ 
+          Start_Phase (Invocation_Graph_Validation);
+ 
+          Validate_Invocation_Graph_Vertices (G);
+          Validate_Invocation_Graph_Edges    (G);
+ 
+          End_Phase (Invocation_Graph_Validation);
+ 
+          if Has_Invalid_Data then
+             raise Invalid_Invocation_Graph;
+          end if;
+       end Validate_Invocation_Graph;
+ 
+       ------------------------------------
+       -- Validate_Invocation_Graph_Edge --
+       ------------------------------------
+ 
+       procedure Validate_Invocation_Graph_Edge
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id)
+       is
+          Msg : constant String := "Validate_Invocation_Graph_Edge";
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          if not Present (Edge) then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  empty invocation graph edge");
+             Write_Eol;
+             Write_Eol;
+             return;
+          end if;
+ 
+          if not Present (Relation (G, Edge)) then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  invocation graph edge (IGE_Id_");
+             Write_Int (Int (Edge));
+             Write_Str (") lacks Relation");
+             Write_Eol;
+             Write_Eol;
+          end if;
+ 
+          if not Present (Target (G, Edge)) then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  invocation graph edge (IGE_Id_");
+             Write_Int (Int (Edge));
+             Write_Str (") lacks Target");
+             Write_Eol;
+             Write_Eol;
+          end if;
+       end Validate_Invocation_Graph_Edge;
+ 
+       -------------------------------------
+       -- Validate_Invocation_Graph_Edges --
+       -------------------------------------
+ 
+       procedure Validate_Invocation_Graph_Edges (G : Invocation_Graph) is
+          Edge : Invocation_Graph_Edge_Id;
+          Iter : Invocation_Graphs.All_Edge_Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          Iter := Iterate_All_Edges (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+ 
+             Validate_Invocation_Graph_Edge (G, Edge);
+          end loop;
+       end Validate_Invocation_Graph_Edges;
+ 
+       --------------------------------------
+       -- Validate_Invocation_Graph_Vertex --
+       --------------------------------------
+ 
+       procedure Validate_Invocation_Graph_Vertex
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id)
+       is
+          Msg : constant String := "Validate_Invocation_Graph_Vertex";
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          if not Present (Vertex) then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  empty invocation graph vertex");
+             Write_Eol;
+             Write_Eol;
+             return;
+          end if;
+ 
+          if not Present (Body_Vertex (G, Vertex)) then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  invocation graph vertex (IGV_Id_");
+             Write_Int (Int (Vertex));
+             Write_Str (") lacks Body_Vertex");
+             Write_Eol;
+             Write_Eol;
+          end if;
+ 
+          if not Present (Construct (G, Vertex)) then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  invocation graph vertex (IGV_Id_");
+             Write_Int (Int (Vertex));
+             Write_Str (") lacks Construct");
+             Write_Eol;
+             Write_Eol;
+          end if;
+ 
+          if not Present (Spec_Vertex (G, Vertex)) then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  invocation graph vertex (IGV_Id_");
+             Write_Int (Int (Vertex));
+             Write_Str (") lacks Spec_Vertex");
+             Write_Eol;
+             Write_Eol;
+          end if;
+       end Validate_Invocation_Graph_Vertex;
+ 
+       ----------------------------------------
+       -- Validate_Invocation_Graph_Vertices --
+       ----------------------------------------
+ 
+       procedure Validate_Invocation_Graph_Vertices (G : Invocation_Graph) is
+          Iter   : Invocation_Graphs.All_Vertex_Iterator;
+          Vertex : Invocation_Graph_Vertex_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          Iter := Iterate_All_Vertices (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Vertex);
+ 
+             Validate_Invocation_Graph_Vertex (G, Vertex);
+          end loop;
+       end Validate_Invocation_Graph_Vertices;
+    end Invocation_Graph_Validators;
+ 
+    ------------------------------
+    -- Library_Graph_Validators --
+    ------------------------------
+ 
+    package body Library_Graph_Validators is
+       Has_Invalid_Data : Boolean := False;
+       --  Flag set when the library graph contains invalid data
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Validate_Library_Graph_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id);
+       pragma Inline (Validate_Library_Graph_Edge);
+       --  Verify that the attributes of edge Edge of library graph G are
+       --  properly set.
+ 
+       procedure Validate_Library_Graph_Edges (G : Library_Graph);
+       pragma Inline (Validate_Library_Graph_Edges);
+       --  Verify that the attributes of all edges of library graph G are
+       --  properly set.
+ 
+       procedure Validate_Library_Graph_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id);
+       pragma Inline (Validate_Library_Graph_Vertex);
+       --  Verify that the attributes of vertex Vertex of library graph G are
+       --  properly set.
+ 
+       procedure Validate_Library_Graph_Vertices (G : Library_Graph);
+       pragma Inline (Validate_Library_Graph_Vertices);
+       --  Verify that the attributes of all vertices of library graph G are
+       --  properly set.
+ 
+       ----------------------------
+       -- Validate_Library_Graph --
+       ----------------------------
+ 
+       procedure Validate_Library_Graph (G : Library_Graph) is
+       begin
+          pragma Assert (Present (G));
+ 
+          --  Nothing to do when switch -d_V (validate bindo cycles, graphs, and
+          --  order) is not in effect.
+ 
+          if not Debug_Flag_Underscore_VV then
+             return;
+          end if;
+ 
+          Start_Phase (Library_Graph_Validation);
+ 
+          Validate_Library_Graph_Vertices (G);
+          Validate_Library_Graph_Edges    (G);
+ 
+          End_Phase (Library_Graph_Validation);
+ 
+          if Has_Invalid_Data then
+             raise Invalid_Library_Graph;
+          end if;
+       end Validate_Library_Graph;
+ 
+       ---------------------------------
+       -- Validate_Library_Graph_Edge --
+       ---------------------------------
+ 
+       procedure Validate_Library_Graph_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id)
+       is
+          Msg : constant String := "Validate_Library_Graph_Edge";
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          if not Present (Edge) then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  empty library graph edge");
+             Write_Eol;
+             Write_Eol;
+             return;
+          end if;
+ 
+          if Kind (G, Edge) = No_Edge then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  library graph edge (LGE_Id_");
+             Write_Int (Int (Edge));
+             Write_Str (") is not a valid edge");
+             Write_Eol;
+             Write_Eol;
+ 
+          elsif Kind (G, Edge) = Body_Before_Spec_Edge then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  library graph edge (LGE_Id_");
+             Write_Int (Int (Edge));
+             Write_Str (") is a Body_Before_Spec edge");
+             Write_Eol;
+             Write_Eol;
+          end if;
+ 
+          if not Present (Predecessor (G, Edge)) then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  library graph edge (LGE_Id_");
+             Write_Int (Int (Edge));
+             Write_Str (") lacks Predecessor");
+             Write_Eol;
+             Write_Eol;
+          end if;
+ 
+          if not Present (Successor (G, Edge)) then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  library graph edge (LGE_Id_");
+             Write_Int (Int (Edge));
+             Write_Str (") lacks Successor");
+             Write_Eol;
+             Write_Eol;
+          end if;
+       end Validate_Library_Graph_Edge;
+ 
+       ----------------------------------
+       -- Validate_Library_Graph_Edges --
+       ----------------------------------
+ 
+       procedure Validate_Library_Graph_Edges (G : Library_Graph) is
+          Edge : Library_Graph_Edge_Id;
+          Iter : Library_Graphs.All_Edge_Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          Iter := Iterate_All_Edges (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+ 
+             Validate_Library_Graph_Edge (G, Edge);
+          end loop;
+       end Validate_Library_Graph_Edges;
+ 
+       -----------------------------------
+       -- Validate_Library_Graph_Vertex --
+       -----------------------------------
+ 
+       procedure Validate_Library_Graph_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id)
+       is
+          Msg : constant String := "Validate_Library_Graph_Vertex";
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          if not Present (Vertex) then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  empty library graph vertex");
+             Write_Eol;
+             Write_Eol;
+             return;
+          end if;
+ 
+          if (Is_Body_With_Spec (G, Vertex)
+                or else
+              Is_Spec_With_Body (G, Vertex))
+            and then not Present (Corresponding_Item (G, Vertex))
+          then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  library graph vertex (LGV_Id_");
+             Write_Int (Int (Vertex));
+             Write_Str (") lacks Corresponding_Item");
+             Write_Eol;
+             Write_Eol;
+          end if;
+ 
+          if not Present (Unit (G, Vertex)) then
+             Write_Error (Msg, Has_Invalid_Data);
+ 
+             Write_Str ("  library graph vertex (LGV_Id_");
+             Write_Int (Int (Vertex));
+             Write_Str (") lacks Unit");
+             Write_Eol;
+             Write_Eol;
+          end if;
+       end Validate_Library_Graph_Vertex;
+ 
+       -------------------------------------
+       -- Validate_Library_Graph_Vertices --
+       -------------------------------------
+ 
+       procedure Validate_Library_Graph_Vertices (G : Library_Graph) is
+          Iter   : Library_Graphs.All_Vertex_Iterator;
+          Vertex : Library_Graph_Vertex_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          Iter := Iterate_All_Vertices (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Vertex);
+ 
+             Validate_Library_Graph_Vertex (G, Vertex);
+          end loop;
+       end Validate_Library_Graph_Vertices;
+    end Library_Graph_Validators;
+ 
+    -----------------
+    -- Write_Error --
+    -----------------
+ 
+    procedure Write_Error
+      (Msg  : String;
+       Flag : out Boolean)
+    is
+    begin
+       Write_Str ("ERROR: ");
+       Write_Str (Msg);
+       Write_Eol;
+ 
+       Flag := True;
+    end Write_Error;
+ 
+ end Bindo.Validators;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-validators.ads gcc-10.1.0/gcc/ada/bindo-validators.ads
*** gcc-9.3.0/gcc/ada/bindo-validators.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-validators.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,115 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                      B I N D O . V A L I D A T O R S                     --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  For full architecture, see unit Bindo.
+ 
+ --  The following unit contains facilities to verify the validity of the
+ --  various graphs used in determining the elaboration order of units.
+ 
+ with Bindo.Graphs;
+ use  Bindo.Graphs;
+ use  Bindo.Graphs.Invocation_Graphs;
+ use  Bindo.Graphs.Library_Graphs;
+ 
+ package Bindo.Validators is
+ 
+    ----------------------
+    -- Cycle_Validators --
+    ----------------------
+ 
+    package Cycle_Validators is
+       Invalid_Cycle : exception;
+       --  Exception raised when the library graph contains an invalid cycle
+ 
+       procedure Validate_Cycles (G : Library_Graph);
+       --  Ensure that all cycles of library graph G meet the following
+       --  requirements:
+       --
+       --    * Are of proper kind
+       --    * Have enough edges to form a circuit
+       --    * No edge is repeated
+       --
+       --  Diagnose issues and raise Invalid_Cycle if this is not the case.
+ 
+    end Cycle_Validators;
+ 
+    ----------------------------------
+    -- Elaboration_Order_Validators --
+    ----------------------------------
+ 
+    package Elaboration_Order_Validators is
+       Invalid_Elaboration_Order : exception;
+       --  Exception raised when the elaboration order contains invalid data
+ 
+       procedure Validate_Elaboration_Order (Order : Unit_Id_Table);
+       --  Ensure that elaboration order Order meets the following requirements:
+       --
+       --    * All units that must be elaborated appear in the order
+       --    * No other units appear in the order
+       --
+       --  Diagnose issues and raise Invalid_Elaboration_Order if this is not
+       --  the case.
+ 
+    end Elaboration_Order_Validators;
+ 
+    ---------------------------------
+    -- Invocation_Graph_Validators --
+    ---------------------------------
+ 
+    package Invocation_Graph_Validators is
+       Invalid_Invocation_Graph : exception;
+       --  Exception raised when the invocation graph contains invalid data
+ 
+       procedure Validate_Invocation_Graph (G : Invocation_Graph);
+       --  Ensure that invocation graph G meets the following requirements:
+       --
+       --    * All attributes of edges are properly set
+       --    * All attributes of vertices are properly set
+       --
+       --  Diagnose issues and raise Invalid_Invocation_Graph if this is not the
+       --  case.
+ 
+    end Invocation_Graph_Validators;
+ 
+    ------------------------------
+    -- Library_Graph_Validators --
+    ------------------------------
+ 
+    package Library_Graph_Validators is
+       Invalid_Library_Graph : exception;
+       --  Exception raised when the library graph contains invalid data
+ 
+       procedure Validate_Library_Graph (G : Library_Graph);
+       --  Ensure that library graph G meets the following requirements:
+       --
+       --    * All attributes edges are properly set
+       --    * All attributes of vertices are properly set
+       --
+       --  Diagnose issues and raise Invalid_Library_Graph if this is not the
+       --  case.
+ 
+    end Library_Graph_Validators;
+ 
+ end Bindo.Validators;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-writers.adb gcc-10.1.0/gcc/ada/bindo-writers.adb
*** gcc-9.3.0/gcc/ada/bindo-writers.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-writers.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,1772 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                        B I N D O . W R I T E R S                         --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Binderr; use Binderr;
+ with Butil;   use Butil;
+ with Debug;   use Debug;
+ with Fname;   use Fname;
+ with Opt;     use Opt;
+ with Output;  use Output;
+ 
+ with Bindo.Units;
+ use  Bindo.Units;
+ 
+ with GNAT;        use GNAT;
+ with GNAT.Graphs; use GNAT.Graphs;
+ with GNAT.Sets;   use GNAT.Sets;
+ 
+ package body Bindo.Writers is
+ 
+    -----------------
+    -- ALI_Writers --
+    -----------------
+ 
+    package body ALI_Writers is
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Write_All_Units;
+       pragma Inline (Write_All_Units);
+       --  Write the common form of units to standard output
+ 
+       procedure Write_Invocation_Construct (IC_Id : Invocation_Construct_Id);
+       pragma Inline (Write_Invocation_Construct);
+       --  Write invocation construct IC_Id to standard output
+ 
+       procedure Write_Invocation_Relation (IR_Id : Invocation_Relation_Id);
+       pragma Inline (Write_Invocation_Relation);
+       --  Write invocation relation IR_Id to standard output
+ 
+       procedure Write_Invocation_Signature (IS_Id : Invocation_Signature_Id);
+       pragma Inline (Write_Invocation_Signature);
+       --  Write invocation signature IS_Id to standard output
+ 
+       procedure Write_Statistics;
+       pragma Inline (Write_Statistics);
+       --  Write the statistical information of units to standard output
+ 
+       procedure Write_Unit (U_Id : Unit_Id);
+       pragma Inline (Write_Unit);
+       --  Write the invocation constructs and relations of unit U_Id to
+       --  standard output.
+ 
+       procedure Write_Unit_Common (U_Id : Unit_Id);
+       pragma Inline (Write_Unit_Common);
+       --  Write the common form of unit U_Id to standard output
+ 
+       -----------
+       -- Debug --
+       -----------
+ 
+       procedure pau renames Write_All_Units;
+       pragma Unreferenced (pau);
+ 
+       procedure pu (U_Id : Unit_Id) renames Write_Unit_Common;
+       pragma Unreferenced (pu);
+ 
+       ----------------------
+       -- Write_ALI_Tables --
+       ----------------------
+ 
+       procedure Write_ALI_Tables is
+       begin
+          --  Nothing to do when switch -d_A (output invocation tables) is not
+          --  in effect.
+ 
+          if not Debug_Flag_Underscore_AA then
+             return;
+          end if;
+ 
+          Write_Str ("ALI Tables");
+          Write_Eol;
+          Write_Eol;
+ 
+          Write_Statistics;
+          For_Each_Unit (Write_Unit'Access);
+ 
+          Write_Str ("ALI Tables end");
+          Write_Eol;
+          Write_Eol;
+       end Write_ALI_Tables;
+ 
+       ---------------------
+       -- Write_All_Units --
+       ---------------------
+ 
+       procedure Write_All_Units is
+       begin
+          For_Each_Unit (Write_Unit_Common'Access);
+       end Write_All_Units;
+ 
+       --------------------------------
+       -- Write_Invocation_Construct --
+       --------------------------------
+ 
+       procedure Write_Invocation_Construct (IC_Id : Invocation_Construct_Id) is
+       begin
+          pragma Assert (Present (IC_Id));
+ 
+          Write_Str ("  invocation construct (IC_Id_");
+          Write_Int (Int (IC_Id));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Str ("    Body_Placement = ");
+          Write_Str (Body_Placement (IC_Id)'Img);
+          Write_Eol;
+ 
+          Write_Str ("    Kind = ");
+          Write_Str (Kind (IC_Id)'Img);
+          Write_Eol;
+ 
+          Write_Str ("    Spec_Placement = ");
+          Write_Str (Spec_Placement (IC_Id)'Img);
+          Write_Eol;
+ 
+          Write_Invocation_Signature (Signature (IC_Id));
+          Write_Eol;
+       end Write_Invocation_Construct;
+ 
+       -------------------------------
+       -- Write_Invocation_Relation --
+       -------------------------------
+ 
+       procedure Write_Invocation_Relation (IR_Id : Invocation_Relation_Id) is
+       begin
+          pragma Assert (Present (IR_Id));
+ 
+          Write_Str ("  invocation relation (IR_Id_");
+          Write_Int (Int (IR_Id));
+          Write_Str (")");
+          Write_Eol;
+ 
+          if Present (Extra (IR_Id)) then
+             Write_Str  ("    Extra = ");
+             Write_Name (Extra (IR_Id));
+          else
+             Write_Str ("    Extra = none");
+          end if;
+ 
+          Write_Eol;
+          Write_Str ("    Invoker");
+          Write_Eol;
+ 
+          Write_Invocation_Signature (Invoker (IR_Id));
+ 
+          Write_Str ("    Kind = ");
+          Write_Str (Kind (IR_Id)'Img);
+          Write_Eol;
+ 
+          Write_Str ("    Target");
+          Write_Eol;
+ 
+          Write_Invocation_Signature (Target (IR_Id));
+          Write_Eol;
+       end Write_Invocation_Relation;
+ 
+       --------------------------------
+       -- Write_Invocation_Signature --
+       --------------------------------
+ 
+       procedure Write_Invocation_Signature (IS_Id : Invocation_Signature_Id) is
+       begin
+          pragma Assert (Present (IS_Id));
+ 
+          Write_Str ("    Signature (IS_Id_");
+          Write_Int (Int (IS_Id));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Str ("      Column = ");
+          Write_Int (Int (Column (IS_Id)));
+          Write_Eol;
+ 
+          Write_Str ("      Line = ");
+          Write_Int (Int (Line (IS_Id)));
+          Write_Eol;
+ 
+          if Present (Locations (IS_Id)) then
+             Write_Str  ("      Locations = ");
+             Write_Name (Locations (IS_Id));
+          else
+             Write_Str ("      Locations = none");
+          end if;
+ 
+          Write_Eol;
+          Write_Str  ("      Name = ");
+          Write_Name (Name (IS_Id));
+          Write_Eol;
+ 
+          Write_Str  ("      Scope = ");
+          Write_Name (Scope (IS_Id));
+          Write_Eol;
+       end Write_Invocation_Signature;
+ 
+       ----------------------
+       -- Write_Statistics --
+       ----------------------
+ 
+       procedure Write_Statistics is
+       begin
+          Write_Str ("Units             : ");
+          Write_Num (Int (Number_Of_Units));
+          Write_Eol;
+ 
+          Write_Str ("Units to elaborate: ");
+          Write_Num (Int (Number_Of_Elaborable_Units));
+          Write_Eol;
+          Write_Eol;
+       end Write_Statistics;
+ 
+       ----------------
+       -- Write_Unit --
+       ----------------
+ 
+       procedure Write_Unit (U_Id : Unit_Id) is
+          pragma Assert (Present (U_Id));
+ 
+          U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+       begin
+          Write_Unit_Common (U_Id);
+ 
+          Write_Str ("  First_Invocation_Construct (IC_Id_");
+          Write_Int (Int (U_Rec.First_Invocation_Construct));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Str ("  Last_Invocation_Construct  (IC_Id_");
+          Write_Int (Int (U_Rec.Last_Invocation_Construct));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Str ("  First_Invocation_Relation  (IR_Id_");
+          Write_Int (Int (U_Rec.First_Invocation_Relation));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Str ("  Last_Invocation_Relation   (IR_Id_");
+          Write_Int (Int (U_Rec.Last_Invocation_Relation));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Str ("  Invocation_Graph_Encoding = ");
+          Write_Str (Invocation_Graph_Encoding (U_Id)'Img);
+          Write_Eol;
+          Write_Eol;
+ 
+          For_Each_Invocation_Construct
+            (U_Id      => U_Id,
+             Processor => Write_Invocation_Construct'Access);
+ 
+          For_Each_Invocation_Relation
+            (U_Id      => U_Id,
+             Processor => Write_Invocation_Relation'Access);
+       end Write_Unit;
+ 
+       -----------------------
+       -- Write_Unit_Common --
+       -----------------------
+ 
+       procedure Write_Unit_Common (U_Id : Unit_Id) is
+          pragma Assert (Present (U_Id));
+ 
+          U_Rec : Unit_Record renames ALI.Units.Table (U_Id);
+ 
+       begin
+          Write_Str  ("unit (U_Id_");
+          Write_Int  (Int (U_Id));
+          Write_Str  (") name = ");
+          Write_Name (U_Rec.Uname);
+          Write_Eol;
+ 
+          if U_Rec.SAL_Interface then
+             Write_Str ("  SAL_Interface = True");
+             Write_Eol;
+          end if;
+       end Write_Unit_Common;
+    end ALI_Writers;
+ 
+    -------------------
+    -- Cycle_Writers --
+    -------------------
+ 
+    package body Cycle_Writers is
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Write_Cycle
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id);
+       pragma Inline (Write_Cycle);
+       --  Write the path of cycle Cycle found in library graph G to standard
+       --  output.
+ 
+       procedure Write_Cyclic_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id);
+       pragma Inline (Write_Cyclic_Edge);
+       --  Write cyclic edge Edge of library graph G to standard
+ 
+       -----------
+       -- Debug --
+       -----------
+ 
+       procedure palgc (G : Library_Graph) renames Write_Cycles;
+       pragma Unreferenced (palgc);
+ 
+       procedure plgc
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id) renames Write_Cycle;
+       pragma Unreferenced (plgc);
+ 
+       -----------------
+       -- Write_Cycle --
+       -----------------
+ 
+       procedure Write_Cycle
+         (G     : Library_Graph;
+          Cycle : Library_Graph_Cycle_Id)
+       is
+          Edge : Library_Graph_Edge_Id;
+          Iter : Edges_Of_Cycle_Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Cycle));
+ 
+          --  Nothing to do when switch -d_P (output cycle paths) is not in
+          --  effect.
+ 
+          if not Debug_Flag_Underscore_PP then
+             return;
+          end if;
+ 
+          Write_Str ("cycle (LGC_Id_");
+          Write_Int (Int (Cycle));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Iter := Iterate_Edges_Of_Cycle (G, Cycle);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+ 
+             Write_Cyclic_Edge (G, Edge);
+          end loop;
+ 
+          Write_Eol;
+       end Write_Cycle;
+ 
+       ------------------
+       -- Write_Cycles --
+       ------------------
+ 
+       procedure Write_Cycles (G : Library_Graph) is
+          Cycle : Library_Graph_Cycle_Id;
+          Iter  : All_Cycle_Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          Iter := Iterate_All_Cycles (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Cycle);
+ 
+             Write_Cycle (G, Cycle);
+          end loop;
+       end Write_Cycles;
+ 
+       -----------------------
+       -- Write_Cyclic_Edge --
+       -----------------------
+ 
+       procedure Write_Cyclic_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          Pred : constant Library_Graph_Vertex_Id := Predecessor (G, Edge);
+          Succ : constant Library_Graph_Vertex_Id := Successor   (G, Edge);
+ 
+       begin
+          Indent_By (Nested_Indentation);
+          Write_Name (Name (G, Succ));
+          Write_Str  (" --> ");
+          Write_Name (Name (G, Pred));
+          Write_Str  ("   ");
+ 
+          if Is_Elaborate_All_Edge (G, Edge) then
+             Write_Str ("Elaborate_All edge");
+ 
+          elsif Is_Elaborate_Body_Edge (G, Edge) then
+             Write_Str ("Elaborate_Body edge");
+ 
+          elsif Is_Elaborate_Edge (G, Edge) then
+             Write_Str ("Elaborate edge");
+ 
+          elsif Is_Forced_Edge (G, Edge) then
+             Write_Str ("forced edge");
+ 
+          elsif Is_Invocation_Edge (G, Edge) then
+             Write_Str ("invocation edge");
+ 
+          else
+             pragma Assert (Is_With_Edge (G, Edge));
+ 
+             Write_Str ("with edge");
+          end if;
+ 
+          Write_Eol;
+       end Write_Cyclic_Edge;
+    end Cycle_Writers;
+ 
+    ------------------------
+    -- Dependency_Writers --
+    ------------------------
+ 
+    package body Dependency_Writers is
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Write_Dependencies_Of_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id);
+       pragma Inline (Write_Dependencies_Of_Vertex);
+       --  Write the dependencies of vertex Vertex of library graph G to
+       --  standard output.
+ 
+       procedure Write_Dependency_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id);
+       pragma Inline (Write_Dependency_Edge);
+       --  Write the dependency described by edge Edge of library graph G to
+       --  standard output.
+ 
+       ------------------------
+       -- Write_Dependencies --
+       ------------------------
+ 
+       procedure Write_Dependencies (G : Library_Graph) is
+          Use_Formatting : constant Boolean := not Zero_Formatting;
+ 
+          Iter   : Library_Graphs.All_Vertex_Iterator;
+          Vertex : Library_Graph_Vertex_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          --  Nothing to do when switch -e (output complete list of elaboration
+          --  order dependencies) is not in effect.
+ 
+          if not Elab_Dependency_Output then
+             return;
+          end if;
+ 
+          if Use_Formatting then
+             Write_Eol;
+             Write_Line ("ELABORATION ORDER DEPENDENCIES");
+             Write_Eol;
+          end if;
+ 
+          Info_Prefix_Suppress := True;
+ 
+          Iter := Iterate_All_Vertices (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Vertex);
+ 
+             Write_Dependencies_Of_Vertex (G, Vertex);
+          end loop;
+ 
+          Info_Prefix_Suppress := False;
+ 
+          if Use_Formatting then
+             Write_Eol;
+          end if;
+       end Write_Dependencies;
+ 
+       ----------------------------------
+       -- Write_Dependencies_Of_Vertex --
+       ----------------------------------
+ 
+       procedure Write_Dependencies_Of_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id)
+       is
+          Edge : Library_Graph_Edge_Id;
+          Iter : Edges_To_Successors_Iterator;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          --  Nothing to do for internal and predefined units
+ 
+          if Is_Internal_Unit (G, Vertex)
+            or else Is_Predefined_Unit (G, Vertex)
+          then
+             return;
+          end if;
+ 
+          Iter := Iterate_Edges_To_Successors (G, Vertex);
+          while Has_Next (Iter) loop
+             Next (Iter, Edge);
+ 
+             Write_Dependency_Edge (G, Edge);
+          end loop;
+       end Write_Dependencies_Of_Vertex;
+ 
+       ---------------------------
+       -- Write_Dependency_Edge --
+       ---------------------------
+ 
+       procedure Write_Dependency_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          Pred : constant Library_Graph_Vertex_Id := Predecessor (G, Edge);
+          Succ : constant Library_Graph_Vertex_Id := Successor   (G, Edge);
+ 
+       begin
+          --  Nothing to do for internal and predefined units
+ 
+          if Is_Internal_Unit (G, Succ)
+            or else Is_Predefined_Unit (G, Succ)
+          then
+             return;
+          end if;
+ 
+          Error_Msg_Unit_1 := Name (G, Pred);
+          Error_Msg_Unit_2 := Name (G, Succ);
+          Error_Msg_Output
+            (Msg  => "   unit $ must be elaborated before unit $",
+             Info => True);
+ 
+          Error_Msg_Unit_1 := Name (G, Succ);
+          Error_Msg_Unit_2 := Name (G, Pred);
+ 
+          if Is_Elaborate_All_Edge (G, Edge) then
+             Error_Msg_Output
+               (Msg  =>
+                  "     reason: unit $ has with clause and pragma "
+                  & "Elaborate_All for unit $",
+                Info => True);
+ 
+          elsif Is_Elaborate_Body_Edge (G, Edge) then
+             Error_Msg_Output
+               (Msg  => "     reason: unit $ has with clause for unit $",
+                Info => True);
+ 
+          elsif Is_Elaborate_Edge (G, Edge) then
+             Error_Msg_Output
+               (Msg  =>
+                  "     reason: unit $ has with clause and pragma Elaborate "
+                  & "for unit $",
+                Info => True);
+ 
+          elsif Is_Forced_Edge (G, Edge) then
+             Error_Msg_Output
+               (Msg  =>
+                  "     reason: unit $ has a dependency on unit $ forced by -f "
+                  & "switch",
+                Info => True);
+ 
+          elsif Is_Invocation_Edge (G, Edge) then
+             Error_Msg_Output
+               (Msg  =>
+                  "     reason: unit $ invokes a construct of unit $ at "
+                  & "elaboration time",
+                Info => True);
+ 
+          elsif Is_Spec_Before_Body_Edge (G, Edge) then
+             Error_Msg_Output
+               (Msg  => "     reason: spec must be elaborated before body",
+                Info => True);
+ 
+          else
+             pragma Assert (Is_With_Edge (G, Edge));
+ 
+             Error_Msg_Output
+               (Msg  => "     reason: unit $ has with clause for unit $",
+                Info => True);
+          end if;
+       end Write_Dependency_Edge;
+    end Dependency_Writers;
+ 
+    -------------------------------
+    -- Elaboration_Order_Writers --
+    -------------------------------
+ 
+    package body Elaboration_Order_Writers is
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Write_Unit (U_Id : Unit_Id);
+       pragma Inline (Write_Unit);
+       --  Write unit U_Id to standard output
+ 
+       procedure Write_Units (Order : Unit_Id_Table);
+       pragma Inline (Write_Units);
+       --  Write all units found in elaboration order Order to standard output
+ 
+       -----------------------------
+       -- Write_Elaboration_Order --
+       -----------------------------
+ 
+       procedure Write_Elaboration_Order (Order : Unit_Id_Table) is
+          Use_Formatting : constant Boolean := not Zero_Formatting;
+ 
+       begin
+          --  Nothing to do when switch -l (output chosen elaboration order) is
+          --  not in effect.
+ 
+          if not Elab_Order_Output then
+             return;
+          end if;
+ 
+          if Use_Formatting then
+             Write_Eol;
+             Write_Str ("ELABORATION ORDER");
+             Write_Eol;
+          end if;
+ 
+          Write_Units (Order);
+ 
+          if Use_Formatting then
+             Write_Eol;
+          end if;
+       end Write_Elaboration_Order;
+ 
+       ----------------
+       -- Write_Unit --
+       ----------------
+ 
+       procedure Write_Unit (U_Id : Unit_Id) is
+          Use_Formatting : constant Boolean := not Zero_Formatting;
+ 
+       begin
+          pragma Assert (Present (U_Id));
+ 
+          if Use_Formatting then
+             Write_Str ("   ");
+          end if;
+ 
+          Write_Unit_Name (Name (U_Id));
+          Write_Eol;
+       end Write_Unit;
+ 
+       -----------------
+       -- Write_Units --
+       -----------------
+ 
+       procedure Write_Units (Order : Unit_Id_Table) is
+       begin
+          for Index in Unit_Id_Tables.First .. Unit_Id_Tables.Last (Order) loop
+             Write_Unit (Order.Table (Index));
+          end loop;
+       end Write_Units;
+    end Elaboration_Order_Writers;
+ 
+    ---------------
+    -- Indent_By --
+    ---------------
+ 
+    procedure Indent_By (Indent : Indentation_Level) is
+    begin
+       for Count in 1 .. Indent loop
+          Write_Char (' ');
+       end loop;
+    end Indent_By;
+ 
+    ------------------------------
+    -- Invocation_Graph_Writers --
+    ------------------------------
+ 
+    package body Invocation_Graph_Writers is
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Write_Elaboration_Root
+         (G    : Invocation_Graph;
+          Root : Invocation_Graph_Vertex_Id);
+       pragma Inline (Write_Elaboration_Root);
+       --  Write elaboration root Root of invocation graph G to standard output
+ 
+       procedure Write_Elaboration_Roots (G : Invocation_Graph);
+       pragma Inline (Write_Elaboration_Roots);
+       --  Write all elaboration roots of invocation graph G to standard output
+ 
+       procedure Write_Invocation_Graph_Edge
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id);
+       pragma Inline (Write_Invocation_Graph_Edge);
+       --  Write edge Edge of invocation graph G to standard output
+ 
+       procedure Write_Invocation_Graph_Edges
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id);
+       pragma Inline (Write_Invocation_Graph_Edges);
+       --  Write all edges to targets of vertex Vertex of invocation graph G to
+       --  standard output.
+ 
+       procedure Write_Invocation_Graph_Vertex
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id);
+       pragma Inline (Write_Invocation_Graph_Vertex);
+       --  Write vertex Vertex of invocation graph G to standard output
+ 
+       procedure Write_Invocation_Graph_Vertices (G : Invocation_Graph);
+       pragma Inline (Write_Invocation_Graph_Vertices);
+       --  Write all vertices of invocation graph G to standard output
+ 
+       procedure Write_Statistics (G : Invocation_Graph);
+       pragma Inline (Write_Statistics);
+       --  Write the statistical information of invocation graph G to standard
+       --  output.
+ 
+       -----------
+       -- Debug --
+       -----------
+ 
+       procedure pige
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id) renames Write_Invocation_Graph_Edge;
+       pragma Unreferenced (pige);
+ 
+       procedure pigv
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id)
+          renames Write_Invocation_Graph_Vertex;
+       pragma Unreferenced (pigv);
+ 
+       ----------------------------
+       -- Write_Elaboration_Root --
+       ----------------------------
+ 
+       procedure Write_Elaboration_Root
+         (G    : Invocation_Graph;
+          Root : Invocation_Graph_Vertex_Id)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Root));
+ 
+          Write_Str  ("elaboration root (IGV_Id_");
+          Write_Int  (Int (Root));
+          Write_Str  (") name = ");
+          Write_Name (Name (G, Root));
+          Write_Eol;
+       end Write_Elaboration_Root;
+ 
+       -----------------------------
+       -- Write_Elaboration_Roots --
+       -----------------------------
+ 
+       procedure Write_Elaboration_Roots (G : Invocation_Graph) is
+          pragma Assert (Present (G));
+ 
+          Num_Of_Roots : constant Natural := Number_Of_Elaboration_Roots (G);
+ 
+          Iter : Elaboration_Root_Iterator;
+          Root : Invocation_Graph_Vertex_Id;
+ 
+       begin
+          Write_Str ("Elaboration roots: ");
+          Write_Int (Int (Num_Of_Roots));
+          Write_Eol;
+ 
+          if Num_Of_Roots > 0 then
+             Iter := Iterate_Elaboration_Roots (G);
+             while Has_Next (Iter) loop
+                Next (Iter, Root);
+ 
+                Write_Elaboration_Root (G, Root);
+             end loop;
+          else
+             Write_Eol;
+          end if;
+       end Write_Elaboration_Roots;
+ 
+       ----------------------------
+       -- Write_Invocation_Graph --
+       ----------------------------
+ 
+       procedure Write_Invocation_Graph (G : Invocation_Graph) is
+       begin
+          pragma Assert (Present (G));
+ 
+          --  Nothing to do when switch -d_I (output invocation graph) is not in
+          --  effect.
+ 
+          if not Debug_Flag_Underscore_II then
+             return;
+          end if;
+ 
+          Write_Str ("Invocation Graph");
+          Write_Eol;
+          Write_Eol;
+ 
+          Write_Statistics (G);
+          Write_Invocation_Graph_Vertices (G);
+          Write_Elaboration_Roots (G);
+ 
+          Write_Str ("Invocation Graph end");
+          Write_Eol;
+ 
+          Write_Eol;
+       end Write_Invocation_Graph;
+ 
+       ---------------------------------
+       -- Write_Invocation_Graph_Edge --
+       ---------------------------------
+ 
+       procedure Write_Invocation_Graph_Edge
+         (G    : Invocation_Graph;
+          Edge : Invocation_Graph_Edge_Id)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          Targ : constant Invocation_Graph_Vertex_Id := Target (G, Edge);
+ 
+       begin
+          Write_Str ("    invocation graph edge (IGE_Id_");
+          Write_Int (Int (Edge));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Str ("      Relation (IR_Id_");
+          Write_Int (Int (Relation (G, Edge)));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Str ("      Target (IGV_Id_");
+          Write_Int (Int (Targ));
+          Write_Str (") name = ");
+          Write_Name (Name (G, Targ));
+          Write_Eol;
+ 
+          Write_Eol;
+       end Write_Invocation_Graph_Edge;
+ 
+       ----------------------------------
+       -- Write_Invocation_Graph_Edges --
+       ----------------------------------
+ 
+       procedure Write_Invocation_Graph_Edges
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          Num_Of_Edges : constant Natural :=
+                           Number_Of_Edges_To_Targets (G, Vertex);
+ 
+          Edge : Invocation_Graph_Edge_Id;
+          Iter : Invocation_Graphs.Edges_To_Targets_Iterator;
+ 
+       begin
+          Write_Str ("  Edges to targets: ");
+          Write_Int (Int (Num_Of_Edges));
+          Write_Eol;
+ 
+          if Num_Of_Edges > 0 then
+             Iter := Iterate_Edges_To_Targets (G, Vertex);
+             while Has_Next (Iter) loop
+                Next (Iter, Edge);
+ 
+                Write_Invocation_Graph_Edge (G, Edge);
+             end loop;
+          else
+             Write_Eol;
+          end if;
+       end Write_Invocation_Graph_Edges;
+ 
+       -----------------------------------
+       -- Write_Invocation_Graph_Vertex --
+       -----------------------------------
+ 
+       procedure Write_Invocation_Graph_Vertex
+         (G      : Invocation_Graph;
+          Vertex : Invocation_Graph_Vertex_Id)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          Write_Str  ("invocation graph vertex (IGV_Id_");
+          Write_Int  (Int (Vertex));
+          Write_Str  (") name = ");
+          Write_Name (Name (G, Vertex));
+          Write_Eol;
+ 
+          Write_Str ("  Body_Vertex (LGV_Id_");
+          Write_Int (Int (Body_Vertex (G, Vertex)));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Str ("  Construct (IC_Id_");
+          Write_Int (Int (Construct (G, Vertex)));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Str ("  Spec_Vertex (LGV_Id_");
+          Write_Int (Int (Spec_Vertex (G, Vertex)));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Invocation_Graph_Edges (G, Vertex);
+       end Write_Invocation_Graph_Vertex;
+ 
+       -------------------------------------
+       -- Write_Invocation_Graph_Vertices --
+       -------------------------------------
+ 
+       procedure Write_Invocation_Graph_Vertices (G : Invocation_Graph) is
+          Iter   : Invocation_Graphs.All_Vertex_Iterator;
+          Vertex : Invocation_Graph_Vertex_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          Iter := Iterate_All_Vertices (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Vertex);
+ 
+             Write_Invocation_Graph_Vertex (G, Vertex);
+          end loop;
+       end Write_Invocation_Graph_Vertices;
+ 
+       ----------------------
+       -- Write_Statistics --
+       ----------------------
+ 
+       procedure Write_Statistics (G : Invocation_Graph) is
+       begin
+          pragma Assert (Present (G));
+ 
+          Write_Str ("Edges   : ");
+          Write_Num (Int (Number_Of_Edges (G)));
+          Write_Eol;
+ 
+          Write_Str ("Roots   : ");
+          Write_Num (Int (Number_Of_Elaboration_Roots (G)));
+          Write_Eol;
+ 
+          Write_Str ("Vertices: ");
+          Write_Num (Int (Number_Of_Vertices (G)));
+          Write_Eol;
+          Write_Eol;
+ 
+          for Kind in Invocation_Kind'Range loop
+             Write_Str ("  ");
+             Write_Num (Int (Invocation_Graph_Edge_Count (G, Kind)));
+             Write_Str (" - ");
+             Write_Str (Kind'Img);
+             Write_Eol;
+          end loop;
+ 
+          Write_Eol;
+       end Write_Statistics;
+    end Invocation_Graph_Writers;
+ 
+    ---------------------------
+    -- Library_Graph_Writers --
+    ---------------------------
+ 
+    package body Library_Graph_Writers is
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Write_Component
+         (G    : Library_Graph;
+          Comp : Component_Id);
+       pragma Inline (Write_Component);
+       --  Write component Comp of library graph G to standard output
+ 
+       procedure Write_Component_Vertices
+         (G    : Library_Graph;
+          Comp : Component_Id);
+       pragma Inline (Write_Component_Vertices);
+       --  Write all vertices of component Comp of library graph G to standard
+       --  output.
+ 
+       procedure Write_Components (G : Library_Graph);
+       pragma Inline (Write_Component);
+       --  Write all components of library graph G to standard output
+ 
+       procedure Write_Edges_To_Successors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id);
+       pragma Inline (Write_Edges_To_Successors);
+       --  Write all edges to successors of predecessor Vertex of library graph
+       --  G to standard output.
+ 
+       procedure Write_Library_Graph_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id);
+       pragma Inline (Write_Library_Graph_Edge);
+       --  Write edge Edge of library graph G to standard output
+ 
+       procedure Write_Library_Graph_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id);
+       pragma Inline (Write_Library_Graph_Vertex);
+       --  Write vertex Vertex of library graph G to standard output
+ 
+       procedure Write_Library_Graph_Vertices (G : Library_Graph);
+       pragma Inline (Write_Library_Graph_Vertices);
+       --  Write all vertices of library graph G to standard output
+ 
+       procedure Write_Statistics (G : Library_Graph);
+       pragma Inline (Write_Statistics);
+       --  Write the statistical information of library graph G to standard
+       --  output.
+ 
+       -----------
+       -- Debug --
+       -----------
+ 
+       procedure pc
+         (G    : Library_Graph;
+          Comp : Component_Id) renames Write_Component;
+       pragma Unreferenced (pc);
+ 
+       procedure plge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id) renames Write_Library_Graph_Edge;
+       pragma Unreferenced (plge);
+ 
+       procedure plgv
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id) renames Write_Library_Graph_Vertex;
+       pragma Unreferenced (plgv);
+ 
+       ---------------------
+       -- Write_Component --
+       ---------------------
+ 
+       procedure Write_Component
+         (G    : Library_Graph;
+          Comp : Component_Id)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          Write_Str ("component (Comp_");
+          Write_Int (Int (Comp));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Str ("  Pending_Strong_Predecessors = ");
+          Write_Int (Int (Pending_Strong_Predecessors (G, Comp)));
+          Write_Eol;
+ 
+          Write_Str ("  Pending_Weak_Predecessors   = ");
+          Write_Int (Int (Pending_Weak_Predecessors (G, Comp)));
+          Write_Eol;
+ 
+          Write_Component_Vertices (G, Comp);
+ 
+          Write_Eol;
+       end Write_Component;
+ 
+       ------------------------------
+       -- Write_Component_Vertices --
+       ------------------------------
+ 
+       procedure Write_Component_Vertices
+         (G    : Library_Graph;
+          Comp : Component_Id)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Comp));
+ 
+          Num_Of_Vertices : constant Natural :=
+                              Number_Of_Component_Vertices (G, Comp);
+ 
+          Iter   : Component_Vertex_Iterator;
+          Vertex : Library_Graph_Vertex_Id;
+ 
+       begin
+          Write_Str ("  Vertices: ");
+          Write_Int (Int (Num_Of_Vertices));
+          Write_Eol;
+ 
+          if Num_Of_Vertices > 0 then
+             Iter := Iterate_Component_Vertices (G, Comp);
+             while Has_Next (Iter) loop
+                Next (Iter, Vertex);
+ 
+                Write_Str  ("    library graph vertex (LGV_Id_");
+                Write_Int  (Int (Vertex));
+                Write_Str  (") name = ");
+                Write_Name (Name (G, Vertex));
+                Write_Eol;
+             end loop;
+          else
+             Write_Eol;
+          end if;
+       end Write_Component_Vertices;
+ 
+       ----------------------
+       -- Write_Components --
+       ----------------------
+ 
+       procedure Write_Components (G : Library_Graph) is
+          pragma Assert (Present (G));
+ 
+          Num_Of_Comps : constant Natural := Number_Of_Components (G);
+ 
+          Comp : Component_Id;
+          Iter : Component_Iterator;
+ 
+       begin
+          --  Nothing to do when switch -d_L (output library item graph) is not
+          --  in effect.
+ 
+          if not Debug_Flag_Underscore_LL then
+             return;
+          end if;
+ 
+          Write_Str ("Library Graph components");
+          Write_Eol;
+          Write_Eol;
+ 
+          if Num_Of_Comps > 0 then
+             Write_Str ("Components: ");
+             Write_Num (Int (Num_Of_Comps));
+             Write_Eol;
+ 
+             Iter := Iterate_Components (G);
+             while Has_Next (Iter) loop
+                Next (Iter, Comp);
+ 
+                Write_Component (G, Comp);
+             end loop;
+          else
+             Write_Eol;
+          end if;
+ 
+          Write_Str ("Library Graph components end");
+          Write_Eol;
+ 
+          Write_Eol;
+       end Write_Components;
+ 
+       -------------------------------
+       -- Write_Edges_To_Successors --
+       -------------------------------
+ 
+       procedure Write_Edges_To_Successors
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          Num_Of_Edges : constant Natural :=
+                           Number_Of_Edges_To_Successors (G, Vertex);
+ 
+          Edge : Library_Graph_Edge_Id;
+          Iter : Edges_To_Successors_Iterator;
+ 
+       begin
+          Write_Str ("  Edges to successors: ");
+          Write_Int (Int (Num_Of_Edges));
+          Write_Eol;
+ 
+          if Num_Of_Edges > 0 then
+             Iter := Iterate_Edges_To_Successors (G, Vertex);
+             while Has_Next (Iter) loop
+                Next (Iter, Edge);
+ 
+                Write_Library_Graph_Edge (G, Edge);
+             end loop;
+          else
+             Write_Eol;
+          end if;
+       end Write_Edges_To_Successors;
+ 
+       -------------------------
+       -- Write_Library_Graph --
+       -------------------------
+ 
+       procedure Write_Library_Graph (G : Library_Graph) is
+       begin
+          pragma Assert (Present (G));
+ 
+          --  Nothing to do when switch -d_L (output library item graph) is not
+          --  in effect.
+ 
+          if not Debug_Flag_Underscore_LL then
+             return;
+          end if;
+ 
+          Write_Str ("Library Graph");
+          Write_Eol;
+          Write_Eol;
+ 
+          Write_Statistics (G);
+          Write_Library_Graph_Vertices (G);
+          Write_Components (G);
+ 
+          Write_Str ("Library Graph end");
+          Write_Eol;
+ 
+          Write_Eol;
+       end Write_Library_Graph;
+ 
+       ------------------------------
+       -- Write_Library_Graph_Edge --
+       ------------------------------
+ 
+       procedure Write_Library_Graph_Edge
+         (G    : Library_Graph;
+          Edge : Library_Graph_Edge_Id)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Edge));
+ 
+          Pred : constant Library_Graph_Vertex_Id := Predecessor (G, Edge);
+          Succ : constant Library_Graph_Vertex_Id := Successor   (G, Edge);
+ 
+       begin
+          Write_Str ("    library graph edge (LGE_Id_");
+          Write_Int (Int (Edge));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Str ("      Kind = ");
+          Write_Str (Kind (G, Edge)'Img);
+          Write_Eol;
+ 
+          Write_Str  ("      Predecessor (LGV_Id_");
+          Write_Int  (Int (Pred));
+          Write_Str  (") name = ");
+          Write_Name (Name (G, Pred));
+          Write_Eol;
+ 
+          Write_Str  ("      Successor   (LGV_Id_");
+          Write_Int  (Int (Succ));
+          Write_Str  (") name = ");
+          Write_Name (Name (G, Succ));
+          Write_Eol;
+ 
+          Write_Eol;
+       end Write_Library_Graph_Edge;
+ 
+       --------------------------------
+       -- Write_Library_Graph_Vertex --
+       --------------------------------
+ 
+       procedure Write_Library_Graph_Vertex
+         (G      : Library_Graph;
+          Vertex : Library_Graph_Vertex_Id)
+       is
+          pragma Assert (Present (G));
+          pragma Assert (Present (Vertex));
+ 
+          Item : constant Library_Graph_Vertex_Id :=
+                   Corresponding_Item (G, Vertex);
+          U_Id : constant Unit_Id := Unit (G, Vertex);
+ 
+       begin
+          Write_Str  ("library graph vertex (LGV_Id_");
+          Write_Int  (Int (Vertex));
+          Write_Str  (") name = ");
+          Write_Name (Name (G, Vertex));
+          Write_Eol;
+ 
+          if Present (Item) then
+             Write_Str  ("  Corresponding_Item (LGV_Id_");
+             Write_Int  (Int (Item));
+             Write_Str  (") name = ");
+             Write_Name (Name (G, Item));
+          else
+             Write_Str ("  Corresponding_Item = none");
+          end if;
+ 
+          Write_Eol;
+          Write_Str ("  In_Elaboration_Order = ");
+ 
+          if In_Elaboration_Order (G, Vertex) then
+             Write_Str ("True");
+          else
+             Write_Str ("False");
+          end if;
+ 
+          Write_Eol;
+          Write_Str ("  Pending_Strong_Predecessors = ");
+          Write_Int (Int (Pending_Strong_Predecessors (G, Vertex)));
+          Write_Eol;
+ 
+          Write_Str ("  Pending_Weak_Predecessors   = ");
+          Write_Int (Int (Pending_Weak_Predecessors (G, Vertex)));
+          Write_Eol;
+ 
+          Write_Str ("  Component (Comp_Id_");
+          Write_Int (Int (Component (G, Vertex)));
+          Write_Str (")");
+          Write_Eol;
+ 
+          Write_Str  ("  Unit (U_Id_");
+          Write_Int  (Int (U_Id));
+          Write_Str  (") name = ");
+          Write_Name (Name (U_Id));
+          Write_Eol;
+ 
+          Write_Edges_To_Successors (G, Vertex);
+       end Write_Library_Graph_Vertex;
+ 
+       ----------------------------------
+       -- Write_Library_Graph_Vertices --
+       ----------------------------------
+ 
+       procedure Write_Library_Graph_Vertices (G : Library_Graph) is
+          Iter   : Library_Graphs.All_Vertex_Iterator;
+          Vertex : Library_Graph_Vertex_Id;
+ 
+       begin
+          pragma Assert (Present (G));
+ 
+          Iter := Iterate_All_Vertices (G);
+          while Has_Next (Iter) loop
+             Next (Iter, Vertex);
+ 
+             Write_Library_Graph_Vertex (G, Vertex);
+          end loop;
+       end Write_Library_Graph_Vertices;
+ 
+       ----------------------
+       -- Write_Statistics --
+       ----------------------
+ 
+       procedure Write_Statistics (G : Library_Graph) is
+       begin
+          Write_Str ("Components: ");
+          Write_Num (Int (Number_Of_Components (G)));
+          Write_Eol;
+ 
+          Write_Str ("Edges     : ");
+          Write_Num (Int (Number_Of_Edges (G)));
+          Write_Eol;
+ 
+          Write_Str ("Vertices  : ");
+          Write_Num (Int (Number_Of_Vertices (G)));
+          Write_Eol;
+          Write_Eol;
+ 
+          for Kind in Library_Graph_Edge_Kind'Range loop
+             Write_Str ("  ");
+             Write_Num (Int (Library_Graph_Edge_Count (G, Kind)));
+             Write_Str (" - ");
+             Write_Str (Kind'Img);
+             Write_Eol;
+          end loop;
+ 
+          Write_Eol;
+       end Write_Statistics;
+    end Library_Graph_Writers;
+ 
+    -------------------
+    -- Phase_Writers --
+    -------------------
+ 
+    package body Phase_Writers is
+ 
+       subtype Phase_Message is String (1 .. 32);
+ 
+       --  The following table contains the phase-specific messages for phase
+       --  completion.
+ 
+       End_Messages : constant array (Elaboration_Phase) of Phase_Message :=
+         (Component_Discovery           => "components discovered.          ",
+          Cycle_Diagnostics             => "cycle diagnosed.                ",
+          Cycle_Discovery               => "cycles discovered.              ",
+          Cycle_Validation              => "cycles validated.               ",
+          Elaboration_Order_Validation  => "elaboration order validated.    ",
+          Invocation_Graph_Construction => "invocation graph constructed.   ",
+          Invocation_Graph_Validation   => "invocation graph validated.     ",
+          Library_Graph_Augmentation    => "library graph augmented.        ",
+          Library_Graph_Construction    => "library graph constructed.      ",
+          Library_Graph_Elaboration     => "library graph elaborated.       ",
+          Library_Graph_Validation      => "library graph validated.        ",
+          Unit_Collection               => "units collected.                ",
+          Unit_Elaboration              => "units elaborated.               ");
+ 
+       --  The following table contains the phase-specific messages for phase
+       --  commencement.
+ 
+       Start_Messages : constant array (Elaboration_Phase) of Phase_Message :=
+         (Component_Discovery           => "discovering components...       ",
+          Cycle_Diagnostics             => "diagnosing cycle...             ",
+          Cycle_Discovery               => "discovering cycles...           ",
+          Cycle_Validation              => "validating cycles...            ",
+          Elaboration_Order_Validation  => "validating elaboration order... ",
+          Invocation_Graph_Construction => "constructing invocation graph...",
+          Invocation_Graph_Validation   => "validating invocation graph...  ",
+          Library_Graph_Augmentation    => "augmenting library graph...     ",
+          Library_Graph_Construction    => "constructing library graph...   ",
+          Library_Graph_Elaboration     => "elaborating library graph...    ",
+          Library_Graph_Validation      => "validating library graph...     ",
+          Unit_Collection               => "collecting units...             ",
+          Unit_Elaboration              => "elaborating units...            ");
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Write_Phase_Message (Msg : Phase_Message);
+       pragma Inline (Write_Phase_Message);
+       --  Write elaboration phase-related message Msg to standard output
+ 
+       ---------------
+       -- End_Phase --
+       ---------------
+ 
+       procedure End_Phase (Phase : Elaboration_Phase) is
+       begin
+          Write_Phase_Message (End_Messages (Phase));
+       end End_Phase;
+ 
+       -----------------
+       -- Start_Phase --
+       -----------------
+ 
+       procedure Start_Phase (Phase : Elaboration_Phase) is
+       begin
+          Write_Phase_Message (Start_Messages (Phase));
+       end Start_Phase;
+ 
+       -------------------------
+       -- Write_Phase_Message --
+       -------------------------
+ 
+       procedure Write_Phase_Message (Msg : Phase_Message) is
+       begin
+          --  Nothing to do when switch -d_S (output elaboration order status)
+          --  is not in effect.
+ 
+          if not Debug_Flag_Underscore_SS then
+             return;
+          end if;
+ 
+          Write_Str (Msg);
+          Write_Eol;
+       end Write_Phase_Message;
+    end Phase_Writers;
+ 
+    --------------------------
+    -- Unit_Closure_Writers --
+    --------------------------
+ 
+    package body Unit_Closure_Writers is
+       function Hash_File_Name (Nam : File_Name_Type) return Bucket_Range_Type;
+       pragma Inline (Hash_File_Name);
+       --  Obtain the hash value of key Nam
+ 
+       package File_Name_Tables is new Membership_Sets
+         (Element_Type => File_Name_Type,
+          "="          => "=",
+          Hash         => Hash_File_Name);
+       use File_Name_Tables;
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Write_File_Name (Nam : File_Name_Type);
+       pragma Inline (Write_File_Name);
+       --  Write file name Nam to standard output
+ 
+       procedure Write_Subunit_Closure
+         (Dep : Sdep_Id;
+          Set : Membership_Set);
+       pragma Inline (Write_Subunit_Closure);
+       --  Write the subunit which corresponds to dependency Dep to standard
+       --  output if it does not appear in set Set.
+ 
+       procedure Write_Subunits_Closure (Set : Membership_Set);
+       pragma Inline (Write_Subunits_Closure);
+       --  Write all subunits to standard output if they do not appear in set
+       --  Set.
+ 
+       procedure Write_Unit_Closure
+         (U_Id : Unit_Id;
+          Set  : Membership_Set);
+       pragma Inline (Write_Unit_Closure);
+       --  Write unit U_Id to standard output if it does not appear in set Set
+ 
+       procedure Write_Units_Closure
+         (Order : Unit_Id_Table;
+          Set   : Membership_Set);
+       pragma Inline (Write_Units_Closure);
+       --  Write all units of elaboration order Order to standard output if they
+       --  do not appear in set Set.
+ 
+       --------------------
+       -- Hash_File_Name --
+       --------------------
+ 
+       function Hash_File_Name
+         (Nam : File_Name_Type) return Bucket_Range_Type
+       is
+       begin
+          pragma Assert (Present (Nam));
+ 
+          return Bucket_Range_Type (Nam);
+       end Hash_File_Name;
+ 
+       ---------------------
+       -- Write_File_Name --
+       ---------------------
+ 
+       procedure Write_File_Name (Nam : File_Name_Type) is
+          Use_Formatting : constant Boolean := not Zero_Formatting;
+ 
+       begin
+          pragma Assert (Present (Nam));
+ 
+          if Use_Formatting then
+             Write_Str ("   ");
+          end if;
+ 
+          Write_Line (Get_Name_String (Nam));
+       end Write_File_Name;
+ 
+       ---------------------------
+       -- Write_Subunit_Closure --
+       ---------------------------
+ 
+       procedure Write_Subunit_Closure
+         (Dep : Sdep_Id;
+          Set : Membership_Set)
+       is
+          pragma Assert (Present (Dep));
+          pragma Assert (Present (Set));
+ 
+          Dep_Rec : Sdep_Record renames Sdep.Table (Dep);
+          Source  : constant File_Name_Type := Dep_Rec.Sfile;
+ 
+          pragma Assert (Present (Source));
+ 
+       begin
+          --  Nothing to do when the source file has already been written
+ 
+          if Contains (Set, Source) then
+             return;
+ 
+          --  Nothing to do when the source file does not denote a non-internal
+          --  subunit.
+ 
+          elsif not Present (Dep_Rec.Subunit_Name)
+            or else Is_Internal_File_Name (Source)
+          then
+             return;
+          end if;
+ 
+          --  Mark the subunit as written
+ 
+          Insert (Set, Source);
+          Write_File_Name (Source);
+       end Write_Subunit_Closure;
+ 
+       ----------------------------
+       -- Write_Subunits_Closure --
+       ----------------------------
+ 
+       procedure Write_Subunits_Closure (Set : Membership_Set) is
+       begin
+          pragma Assert (Present (Set));
+ 
+          for Dep in Sdep.First .. Sdep.Last loop
+             Write_Subunit_Closure (Dep, Set);
+          end loop;
+       end Write_Subunits_Closure;
+ 
+       ------------------------
+       -- Write_Unit_Closure --
+       ------------------------
+ 
+       procedure Write_Unit_Closure (Order : Unit_Id_Table) is
+          Use_Formatting : constant Boolean := not Zero_Formatting;
+ 
+          Set : Membership_Set;
+ 
+       begin
+          --  Nothing to do when switch -R (list sources referenced in closure)
+          --  is not in effect.
+ 
+          if not List_Closure then
+             return;
+          end if;
+ 
+          if Use_Formatting then
+             Write_Eol;
+             Write_Line ("REFERENCED SOURCES");
+          end if;
+ 
+          --  Use a set to avoid writing duplicate units and subunits
+ 
+          Set := Create (Number_Of_Elaborable_Units);
+ 
+          Write_Units_Closure (Order, Set);
+          Write_Subunits_Closure (Set);
+ 
+          Destroy (Set);
+ 
+          if Use_Formatting then
+             Write_Eol;
+          end if;
+       end Write_Unit_Closure;
+ 
+       ------------------------
+       -- Write_Unit_Closure --
+       ------------------------
+ 
+       procedure Write_Unit_Closure
+         (U_Id : Unit_Id;
+          Set  : Membership_Set)
+       is
+          pragma Assert (Present (U_Id));
+          pragma Assert (Present (Set));
+ 
+          U_Rec  : Unit_Record renames ALI.Units.Table (U_Id);
+          Source : constant File_Name_Type := U_Rec.Sfile;
+ 
+          pragma Assert (Present (Source));
+ 
+       begin
+          --  Nothing to do when the source file has already been written
+ 
+          if Contains (Set, Source) then
+             return;
+ 
+          --  Nothing to do for internal source files unless switch -Ra (???) is
+          --  in effect.
+ 
+          elsif Is_Internal_File_Name (Source)
+            and then not List_Closure_All
+          then
+             return;
+          end if;
+ 
+          --  Mark the source file as written
+ 
+          Insert (Set, Source);
+          Write_File_Name (Source);
+       end Write_Unit_Closure;
+ 
+       -------------------------
+       -- Write_Units_Closure --
+       -------------------------
+ 
+       procedure Write_Units_Closure
+         (Order : Unit_Id_Table;
+          Set   : Membership_Set)
+       is
+       begin
+          pragma Assert (Present (Set));
+ 
+          for Index in reverse Unit_Id_Tables.First ..
+                               Unit_Id_Tables.Last (Order)
+          loop
+             Write_Unit_Closure
+               (U_Id => Order.Table (Index),
+                Set  => Set);
+          end loop;
+       end Write_Units_Closure;
+    end Unit_Closure_Writers;
+ 
+    ---------------
+    -- Write_Num --
+    ---------------
+ 
+    procedure Write_Num
+      (Val        : Int;
+       Val_Indent : Indentation_Level := Number_Column)
+    is
+       function Digits_Indentation return Indentation_Level;
+       pragma Inline (Digits_Indentation);
+       --  Determine the level of indentation the number requires in order to
+       --  be right-justified by Val_Indent.
+ 
+       ------------------------
+       -- Digits_Indentation --
+       ------------------------
+ 
+       function Digits_Indentation return Indentation_Level is
+          Indent : Indentation_Level;
+          Num    : Int;
+ 
+       begin
+          --  Treat zero as a single digit
+ 
+          if Val = 0 then
+             Indent := 1;
+ 
+          else
+             Indent := 0;
+             Num    := Val;
+ 
+             --  Shrink the input value by dividing it until all of its digits
+             --  are exhausted.
+ 
+             while Num /= 0 loop
+                Indent := Indent + 1;
+                Num    := Num / 10;
+             end loop;
+          end if;
+ 
+          return Val_Indent - Indent;
+       end Digits_Indentation;
+ 
+    --  Start of processing for Write_Num
+ 
+    begin
+       Indent_By (Digits_Indentation);
+       Write_Int (Val);
+    end Write_Num;
+ 
+ end Bindo.Writers;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo-writers.ads gcc-10.1.0/gcc/ada/bindo-writers.ads
*** gcc-9.3.0/gcc/ada/bindo-writers.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo-writers.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,163 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                        B I N D O . W R I T E R S                         --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  For full architecture, see unit Bindo.
+ 
+ --  The following unit contains facilities to output the various graphs used in
+ --  determining the elaboration order, as well as the elaboration order itself
+ --  to standard output.
+ 
+ with Types; use Types;
+ 
+ with Bindo.Graphs;
+ use  Bindo.Graphs;
+ use  Bindo.Graphs.Invocation_Graphs;
+ use  Bindo.Graphs.Library_Graphs;
+ 
+ package Bindo.Writers is
+ 
+    -----------------
+    -- Indentation --
+    -----------------
+ 
+    --  The following type defines the level of indentation used in various
+    --  output routines.
+ 
+    type Indentation_Level is new Natural;
+    No_Indentation : constant Indentation_Level := Indentation_Level'First;
+ 
+    Nested_Indentation : constant Indentation_Level := 2;
+    --  The level of indentation for a nested new line
+ 
+    Number_Column : constant Indentation_Level := 6;
+    --  The level of right justification of numbers
+ 
+    Step_Column : constant Indentation_Level := 4;
+    --  The level of right justification of the elaboration order step
+ 
+    procedure Indent_By (Indent : Indentation_Level);
+    pragma Inline (Indent_By);
+    --  Indent the current line by Indent spaces
+ 
+    procedure Write_Num
+      (Val        : Int;
+       Val_Indent : Indentation_Level := Number_Column);
+    pragma Inline (Write_Num);
+    --  Output integer value Val in a right-justified form based on the value of
+    --  Val_Col.
+ 
+    -----------------
+    -- ALI_Writers --
+    -----------------
+ 
+    package ALI_Writers is
+       procedure Write_ALI_Tables;
+       --  Write the contents of the following tables to standard output:
+       --
+       --    * ALI.Invocation_Constructs
+       --    * ALI.Invocation_Relations
+ 
+    end ALI_Writers;
+ 
+    -------------------
+    -- Cycle_Writers --
+    -------------------
+ 
+    package Cycle_Writers is
+       procedure Write_Cycles (G : Library_Graph);
+       --  Write all cycles of library graph G to standard output
+ 
+    end Cycle_Writers;
+ 
+    ------------------------
+    -- Dependency_Writers --
+    ------------------------
+ 
+    package Dependency_Writers is
+       procedure Write_Dependencies (G : Library_Graph);
+       --  Write all elaboration dependencies of the units represented by
+       --  vertices of library graph G.
+ 
+    end Dependency_Writers;
+ 
+    -------------------------------
+    -- Elaboration_Order_Writers --
+    -------------------------------
+ 
+    package Elaboration_Order_Writers is
+       procedure Write_Elaboration_Order (Order : Unit_Id_Table);
+       --  Write elaboration order Order to standard output
+ 
+    end Elaboration_Order_Writers;
+ 
+    ------------------------------
+    -- Invocation_Graph_Writers --
+    ------------------------------
+ 
+    package Invocation_Graph_Writers is
+       procedure Write_Invocation_Graph (G : Invocation_Graph);
+       --  Write invocation graph G to standard output
+ 
+    end Invocation_Graph_Writers;
+ 
+    ---------------------------
+    -- Library_Graph_Writers --
+    ---------------------------
+ 
+    package Library_Graph_Writers is
+       procedure Write_Library_Graph (G : Library_Graph);
+       --  Write library graph G to standard output
+ 
+    end Library_Graph_Writers;
+ 
+    -------------------
+    -- Phase_Writers --
+    -------------------
+ 
+    package Phase_Writers is
+       procedure End_Phase (Phase : Elaboration_Phase);
+       pragma Inline (End_Phase);
+       --  Write the end message associated with elaboration phase Phase to
+       --  standard output.
+ 
+       procedure Start_Phase (Phase : Elaboration_Phase);
+       pragma Inline (Start_Phase);
+       --  Write the start message associated with elaboration phase Phase to
+       --  standard output.
+ 
+    end Phase_Writers;
+ 
+    --------------------------
+    -- Unit_Closure_Writers --
+    --------------------------
+ 
+    package Unit_Closure_Writers is
+       procedure Write_Unit_Closure (Order : Unit_Id_Table);
+       --  Write all sources in the closure of the main unit as enumerated in
+       --  elaboration order Order.
+ 
+    end Unit_Closure_Writers;
+ 
+ end Bindo.Writers;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo.adb gcc-10.1.0/gcc/ada/bindo.adb
*** gcc-9.3.0/gcc/ada/bindo.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,518 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                                B I N D O                                 --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Binde;
+ with Opt;   use Opt;
+ 
+ with Bindo.Elaborators;
+ use  Bindo.Elaborators;
+ 
+ package body Bindo is
+ 
+    ---------------------------------
+    -- Elaboration-order mechanism --
+    ---------------------------------
+ 
+    --  The elaboration-order (EO) mechanism implemented in this unit and its
+    --  children has the following objectives:
+    --
+    --    * Find an ordering of all library items (historically referred to as
+    --      "units") in the bind which require elaboration, taking into account:
+    --
+    --        - The dependencies between units expressed in the form of with
+    --          clauses.
+    --
+    --        - Pragmas Elaborate, Elaborate_All, Elaborate_Body, Preelaborable,
+    --          and Pure.
+    --
+    --        - The flow of execution at elaboration time.
+    --
+    --        - Additional dependencies between units supplied to the binder by
+    --          means of a forced-elaboration-order file.
+    --
+    --      The high-level idea empoyed by the EO mechanism is to construct two
+    --      graphs and use the information they represent to find an ordering of
+    --      all units.
+    --
+    --      The invocation graph represents the flow of execution at elaboration
+    --      time.
+    --
+    --      The library graph captures the dependencies between units expressed
+    --      by with clause and elaboration-related pragmas. The library graph is
+    --      further augmented with additional information from the invocation
+    --      graph by exploring the execution paths from a unit with elaboration
+    --      code to other external units.
+    --
+    --      The strongly connected components of the library graph are computed.
+    --
+    --      The order is obtained using a topological sort-like algorithm which
+    --      traverses the library graph and its strongly connected components in
+    --      an attempt to order available units while enabling other units to be
+    --      ordered.
+    --
+    --    * Diagnose elaboration circularities between units
+    --
+    --      An elaboration circularity arises when either
+    --
+    --        - At least one unit cannot be ordered, or
+    --
+    --        - All units can be ordered, but an edge with an Elaborate_All
+    --          pragma links two vertices within the same component of the
+    --          library graph.
+    --
+    --      The library graph is traversed to discover, collect, and sort all
+    --      cycles that hinder the elaboration order.
+    --
+    --      The most important cycle is diagnosed by describing its effects on
+    --      the elaboration order and listing all units comprising the circuit.
+    --      Various suggestions on how to break the cycle are offered.
+ 
+    -----------------
+    -- Terminology --
+    -----------------
+ 
+    --  * Component - A strongly connected component of a graph.
+    --
+    --  * Elaborable component - A component that is not waiting on other
+    --    components to be elaborated.
+    --
+    --  * Elaborable vertex - A vertex that is not waiting on strong and weak
+    --    predecessors, and whose component is elaborable.
+    --
+    --  * Elaboration circularity - A cycle involving units from the bind.
+    --
+    --  * Elaboration root - A special invocation construct which denotes the
+    --    elaboration procedure of a unit.
+    --
+    --  * Invocation - The act of activating a task, calling a subprogram, or
+    --    instantiating a generic.
+    --
+    --  * Invocation construct - An entry declaration, [single] protected type,
+    --    subprogram declaration, subprogram instantiation, or a [single] task
+    --    type declared in the visible, private, or body declarations of some
+    --    unit. The construct is encoded in the ALI file of the related unit.
+    --
+    --  * Invocation graph - A directed graph which models the flow of execution
+    --    at elaboration time.
+    --
+    --      - Vertices - Invocation constructs plus extra information. Certain
+    --        vertices act as elaboration roots.
+    --
+    --      - Edges - Invocation relations plus extra information.
+    --
+    --  * Invocation relation - A flow link between two invocation constructs.
+    --    This link is encoded in the ALI file of unit that houses the invoker.
+    --
+    --  * Invocation signature - A set of attributes that uniquely identify an
+    --    invocation construct within the namespace of all ALI files.
+    --
+    --  * Invoker - The source construct of an invocation relation (the caller,
+    --    instantiator, or task activator).
+    --
+    --  * Library graph - A directed graph which captures with clause and pragma
+    --    dependencies between units.
+    --
+    --      - Vertices - Units plus extra information.
+    --
+    --      - Edges - With clause, pragma, and additional dependencies between
+    --        units.
+    --
+    --  * Pending predecessor - A vertex that must be elaborated before another
+    --    vertex can be elaborated.
+    --
+    --  * Strong edge - A non-invocation library graph edge. Strong edges
+    --    represent the language-defined relations between units.
+    --
+    --  * Strong predecessor - A library graph vertex reachable via a strong
+    --    edge.
+    --
+    --  * Target - The destination construct of an invocation relation (the
+    --    generic, subprogram, or task type).
+    --
+    --  * Weak edge - An invocation library graph edge. Weak edges represent
+    --    the speculative flow of execution at elaboration time, which may or
+    --    may not take place.
+    --
+    --  * Weak predecessor - A library graph vertex reachable via a weak edge.
+    --
+    --  * Weakly elaborable vertex - A vertex that is waiting solely on weak
+    --    predecessors to be elaborated, and whose component is elaborable.
+ 
+    ------------------
+    -- Architecture --
+    ------------------
+ 
+    --     Find_Elaboration_Order
+    --     |
+    --     +--> Collect_Elaborable_Units
+    --     +--> Write_ALI_Tables
+    --     +--> Elaborate_Units
+    --          |
+    --  +------ | -------------- Construction phase ------------------------+
+    --  |       |                                                           |
+    --  |       +--> Build_Library_Graph                                    |
+    --  |       +--> Validate_Library_Graph                                 |
+    --  |       +--> Write_Library_Graph                                    |
+    --  |       |                                                           |
+    --  |       +--> Build_Invocation_Graph                                 |
+    --  |       +--> Validate_Invocation_Graph                              |
+    --  |       +--> Write_Invocation_Graph                                 |
+    --  |       |                                                           |
+    --  +------ | ----------------------------------------------------------+
+    --          |
+    --  +------ | -------------- Augmentation phase ------------------------+
+    --  |       |                                                           |
+    --  |       +--> Augment_Library_Graph                                  |
+    --  |       |                                                           |
+    --  +------ | ----------------------------------------------------------+
+    --          |
+    --  +------ | -------------- Ordering phase ----------------------------+
+    --  |       |                                                           |
+    --  |       +--> Find_Components                                        |
+    --  |       |                                                           |
+    --  |       +--> Elaborate_Library_Graph                                |
+    --  |       +--> Validate_Elaboration_Order                             |
+    --  |       +--> Write_Elaboration_Order                                |
+    --  |       |                                                           |
+    --  |       +--> Write_Unit_Closure                                     |
+    --  |       |                                                           |
+    --  +------ | ----------------------------------------------------------+
+    --          |
+    --  +------ | -------------- Diagnostics phase -------------------------+
+    --  |       |                                                           |
+    --  |       +--> Find_Cycles                                            |
+    --  |       +--> Validate_Cycles                                        |
+    --  |       +--> Write_Cycles                                           |
+    --  |       |                                                           |
+    --  |       +--> Diagnose_Cycle / Diagnose_All_Cycles                   |
+    --  |                                                                   |
+    --  +-------------------------------------------------------------------+
+ 
+    ------------------------
+    -- Construction phase --
+    ------------------------
+ 
+    --  The Construction phase has the following objectives:
+    --
+    --    * Build the library graph by inspecting the ALI file of each unit that
+    --      requires elaboration.
+    --
+    --    * Validate the consistency of the library graph, only when switch -d_V
+    --      is in effect.
+    --
+    --    * Write the contents of the invocation graph in human-readable form to
+    --      standard output when switch -d_L is in effect.
+    --
+    --    * Build the invocation graph by inspecting invocation constructs and
+    --      relations in the ALI file of each unit that requires elaboration.
+    --
+    --    * Validate the consistency of the invocation graph, only when switch
+    --      -d_V is in effect.
+    --
+    --    * Write the contents of the invocation graph in human-readable form to
+    --      standard output when switch -d_I is in effect.
+ 
+    ------------------------
+    -- Augmentation phase --
+    ------------------------
+ 
+    --  The Augmentation phase has the following objectives:
+    --
+    --    * Discover transitions of the elaboration flow from a unit with an
+    --      elaboration root to other units. Augment the library graph with
+    --      extra edges for each such transition.
+ 
+    --------------------
+    -- Ordering phase --
+    --------------------
+ 
+    --  The Ordering phase has the following objectives:
+    --
+    --    * Discover all components of the library graph by treating specs and
+    --      bodies as single vertices.
+    --
+    --    * Try to order as many vertices of the library graph as possible by
+    --      performing a topological sort based on the pending predecessors of
+    --      vertices across all components and within a single component.
+    --
+    --    * Validate the consistency of the order, only when switch -d_V is in
+    --      effect.
+    --
+    --    * Write the contents of the order in human-readable form to standard
+    --      output when switch -d_O is in effect.
+    --
+    --    * Write the sources of the order closure when switch -R is in effect.
+ 
+    -----------------------
+    -- Diagnostics phase --
+    -----------------------
+ 
+    --  The Diagnostics phase has the following objectives:
+    --
+    --    * Discover, save, and sort all cycles in the library graph. The cycles
+    --      are sorted based on the following heuristics:
+    --
+    --        - A cycle with higher precedence is preferred.
+    --
+    --        - A cycle with fewer invocation edges is preferred.
+    --
+    --        - A cycle with a shorter length is preferred.
+    --
+    --    * Validate the consistency of cycles, only when switch -d_V is in
+    --      effect.
+    --
+    --    * Write the contents of all cycles in human-readable form to standard
+    --      output when switch -d_O is in effect.
+    --
+    --    * Diagnose the most important cycle, or all cycles when switch -d_C is
+    --      in effect. The diagnostic consists of:
+    --
+    --        - The reason for the existence of the cycle, along with the unit
+    --          whose elaboration cannot be guaranteed.
+    --
+    --        - A detailed traceback of the cycle, showcasing the transition
+    --          between units, along with any other elaboration-order-related
+    --          information.
+    --
+    --        - A set of suggestions on how to break the cycle considering the
+    --          the edges comprising the circuit, the elaboration model used to
+    --          compile the units, the availability of invocation information,
+    --          and the state of various relevant switches.
+ 
+    --------------
+    -- Switches --
+    --------------
+ 
+    --  -d_a  Ignore the effects of pragma Elaborate_All
+    --
+    --        GNATbind creates a regular with edge instead of an Elaborate_All
+    --        edge in the library graph, thus eliminating the effects of the
+    --        pragma.
+    --
+    --  -d_b  Ignore the effects of pragma Elaborate_Body
+    --
+    --        GNATbind treats a spec and body pair as decoupled.
+    --
+    --  -d_e  Ignore the effects of pragma Elaborate
+    --
+    --        GNATbind creates a regular with edge instead of an Elaborate edge
+    --        in the library graph, thus eliminating the effects of the pragma.
+    --        In addition, GNATbind does not create an edge to the body of the
+    --        pragma argument.
+    --
+    --  -d_t  Output cycle-detection trace information
+    --
+    --        GNATbind outputs trace information on cycle-detection activities
+    --        to standard output.
+    --
+    --  -d_A  Output ALI invocation tables
+    --
+    --        GNATbind outputs the contents of ALI table Invocation_Constructs
+    --        and Invocation_Edges in textual format to standard output.
+    --
+    --  -d_C  Diagnose all cycles
+    --
+    --        GNATbind outputs diagnostics for all unique cycles in the bind,
+    --        rather than just the most important one.
+    --
+    --  -d_I  Output invocation graph
+    --
+    --        GNATbind outputs the invocation graph in text format to standard
+    --        output.
+    --
+    --  -d_L  Output library graph
+    --
+    --        GNATbind outputs the library graph in textual format to standard
+    --        output.
+    --
+    --  -d_P  Output cycle paths
+    --
+    --        GNATbind outputs the cycle paths in text format to standard output
+    --
+    --  -d_S  Output elaboration-order status information
+    --
+    --        GNATbind outputs trace information concerning the status of its
+    --        various phases to standard output.
+    --
+    --  -d_T  Output elaboration-order trace information
+    --
+    --        GNATbind outputs trace information on elaboration-order detection
+    --        activities to standard output.
+    --
+    --  -d_V  Validate bindo cycles, graphs, and order
+    --
+    --        GNATbind validates the invocation graph, library graph along with
+    --        its cycles, and elaboration order by detecting inconsistencies and
+    --        producing error reports.
+    --
+    --  -e    Output complete list of elaboration-order dependencies
+    --
+    --        GNATbind outputs the dependencies between units to standard
+    --        output.
+    --
+    --  -f    Force elaboration order from given file
+    --
+    --        GNATbind applies an additional set of edges to the library graph.
+    --        The edges are read from a file specified by the argument of the
+    --        flag.
+    --
+    --  -H    Legacy elaboration-order model enabled
+    --
+    --        GNATbind uses the library-graph and heuristics-based elaboration-
+    --        order model.
+    --
+    --  -l    Output chosen elaboration order
+    --
+    --        GNATbind outputs the elaboration order in text format to standard
+    --        output.
+    --
+    --  -p    Pessimistic (worst-case) elaboration order
+    --
+    --        This switch is not used in Bindo and its children.
+ 
+    ----------------------------------------
+    -- Debugging elaboration-order issues --
+    ----------------------------------------
+ 
+    --  Prior to debugging elaboration-order-related issues, enable all relevant
+    --  debug flags to collect as much information as possible. Depending on the
+    --  number of files in the bind, Bindo may emit anywhere between several MBs
+    --  to several hundred MBs of data to standard output. The switches are:
+    --
+    --    -d_A -d_C -d_I -d_L -d_P -d_t -d_T -d_V
+    --
+    --  Bindo offers several debugging routines that can be invoked from gdb.
+    --  Those are defined in the body of Bindo.Writers, in sections denoted by
+    --  header Debug. For quick reference, the routines are:
+    --
+    --    palgc  --  print all library-graph cycles
+    --    pau    --  print all units
+    --    pc     --  print component
+    --    pige   --  print invocation-graph edge
+    --    pigv   --  print invocation-graph vertex
+    --    plgc   --  print library-graph cycle
+    --    plge   --  print library-graph edge
+    --    plgv   --  print library-graph vertex
+    --    pu     --  print units
+    --
+    --  * Apparent infinite loop
+    --
+    --    The elaboration order mechanism appears to be stuck in an infinite
+    --    loop. Use switch -d_S to output the status of each elaboration phase.
+    --
+    --  * Invalid elaboration order
+    --
+    --    The elaboration order is invalid when:
+    --
+    --      - A unit that requires elaboration is missing from the order
+    --      - A unit that does not require elaboration is present in the order
+    --
+    --    Examine the output of the elaboration algorithm available via switch
+    --    -d_T to determine how the related units were included in or excluded
+    --    from the order. Determine whether the library graph contains all the
+    --    relevant edges for those units.
+    --
+    --    Units and routines of interest:
+    --      Bindo.Elaborators
+    --      Elaborate_Library_Graph
+    --      Elaborate_Units
+    --
+    --  * Invalid invocation graph
+    --
+    --    The invocation graph is invalid when:
+    --
+    --      - An edge lacks an attribute
+    --      - A vertex lacks an attribute
+    --
+    --    Find the malformed edge or vertex and determine which attribute is
+    --    missing. Examine the contents of the invocation-related ALI tables
+    --    available via switch -d_A. If the invocation construct or relation
+    --    is missing, verify the ALI file. If the ALI lacks all the relevant
+    --    information, then Sem_Elab most likely failed to discover a valid
+    --    elaboration path.
+    --
+    --    Units and routines of interest:
+    --      Bindo.Builders
+    --      Bindo.Graphs
+    --      Add_Edge
+    --      Add_Vertex
+    --      Build_Invocation_Graph
+    --
+    --  * Invalid library graph
+    --
+    --    The library graph is invalid when:
+    --
+    --      - An edge lacks an attribute
+    --      - A vertex lacks an attribute
+    --
+    --    Find the malformed edge or vertex and determine which attribute is
+    --    missing.
+    --
+    --    Units and routines of interest:
+    --      Bindo.Builders
+    --      Bindo.Graphs
+    --      Add_Edge
+    --      Add_Vertex
+    --      Build_Library_Graph
+    --
+    --  * Invalid library-graph cycle
+    --
+    --    A library-graph cycle is invalid when:
+    --
+    --      - It lacks enough edges to form a circuit
+    --      - At least one edge in the circuit is repeated
+    --
+    --    Find the malformed cycle and determine which attribute is missing.
+    --
+    --    Units and routines of interest:
+    --      Bindo.Graphs
+    --      Find_Cycles
+ 
+    ----------------------------
+    -- Find_Elaboration_Order --
+    ----------------------------
+ 
+    procedure Find_Elaboration_Order
+      (Order         : out Unit_Id_Table;
+       Main_Lib_File : File_Name_Type)
+    is
+    begin
+       --  Use the library graph and heuristic-based elaboration order when
+       --  switch -H (legacy elaboration-order mode enabled).
+ 
+       if Legacy_Elaboration_Order then
+          Binde.Find_Elab_Order (Order, Main_Lib_File);
+ 
+       --  Otherwise use the invocation and library-graph-based elaboration
+       --  order.
+ 
+       else
+          Invocation_And_Library_Graph_Elaborators.Elaborate_Units
+            (Order         => Order,
+             Main_Lib_File => Main_Lib_File);
+       end if;
+    end Find_Elaboration_Order;
+ 
+ end Bindo;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindo.ads gcc-10.1.0/gcc/ada/bindo.ads
*** gcc-9.3.0/gcc/ada/bindo.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/bindo.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,70 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                                B I N D O                                 --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
+ -- for  more details.  You should have  received  a copy of the GNU General --
+ -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
+ -- http://www.gnu.org/licenses for a complete copy of the license.          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  The following unit contains the main entry point into the elaboration order
+ --  mechanism. See the body for details.
+ 
+ with ALI;   use ALI;
+ with Namet; use Namet;
+ 
+ package Bindo is
+ 
+    --  The following type represents the various phases of the elaboration
+    --  order mechanism.
+ 
+    type Elaboration_Phase is
+      (Component_Discovery,
+       Cycle_Diagnostics,
+       Cycle_Discovery,
+       Cycle_Validation,
+       Elaboration_Order_Validation,
+       Invocation_Graph_Construction,
+       Invocation_Graph_Validation,
+       Library_Graph_Augmentation,
+       Library_Graph_Construction,
+       Library_Graph_Elaboration,
+       Library_Graph_Validation,
+       Unit_Collection,
+       Unit_Elaboration);
+ 
+    --  The following type represents the various kinds of precedence between
+    --  two items.
+ 
+    type Precedence_Kind is
+      (Lower_Precedence,
+       Equal_Precedence,
+       Higher_Precedence);
+ 
+    procedure Find_Elaboration_Order
+      (Order         : out Unit_Id_Table;
+       Main_Lib_File : File_Name_Type);
+    --  Find an order of all units in the bind that need to be elaborated
+    --  such that elaboration code flow, pragmas Elaborate, Elaborate_All,
+    --  and Elaborate_Body, and with clause dependencies are all honoured.
+    --  Main_Lib_File is the argument of the bind. If a satisfactory order
+    --  exists, it is returned in Order, otherwise Unrecoverable_Error is
+    --  raised.
+ 
+ end Bindo;
diff -Nrcpad gcc-9.3.0/gcc/ada/bindusg.adb gcc-10.1.0/gcc/ada/bindusg.adb
*** gcc-9.3.0/gcc/ada/bindusg.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/bindusg.adb	Thu May  7 10:49:59 2020
*************** package body Bindusg is
*** 133,143 ****
--- 133,153 ----
        Write_Line
          ("  -F        Force checking of elaboration Flags");
  
+       --  Line for -G switch
+ 
+       Write_Line
+         ("  -G        Generate binder file suitable for CCG");
+ 
        --  Line for -h switch
  
        Write_Line
          ("  -h        Output this usage (help) information");
  
+       --  Line for -H switch
+ 
+       Write_Line
+         ("  -H        Legacy elaboration order model enabled");
+ 
        --  Lines for -I switch
  
        Write_Line
*************** package body Bindusg is
*** 168,173 ****
--- 178,189 ----
          ("  -mnnn     Limit number of detected errors/warnings to nnn "
           & "(1-999999)");
  
+       --  Line for -minimal switch
+ 
+       Write_Line
+         ("  -minimal  Generate binder file suitable for space-constrained "
+          & "applications");
+ 
        --  Line for -M switch
  
        Write_Line
diff -Nrcpad gcc-9.3.0/gcc/ada/butil.adb gcc-10.1.0/gcc/ada/butil.adb
*** gcc-9.3.0/gcc/ada/butil.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/butil.adb	Thu May  7 10:49:59 2020
***************
*** 23,32 ****
--- 23,60 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
+ with Opt;    use Opt;
  with Output; use Output;
+ with Unchecked_Deallocation;
+ 
+ with GNAT; use GNAT;
+ 
+ with System.OS_Lib; use System.OS_Lib;
  
  package body Butil is
  
+    -----------------------
+    -- Local subprograms --
+    -----------------------
+ 
+    procedure Parse_Next_Unit_Name (Iter : in out Forced_Units_Iterator);
+    --  Parse the name of the next available unit accessible through iterator
+    --  Iter and save it in the iterator.
+ 
+    function Read_Forced_Elab_Order_File return String_Ptr;
+    --  Read the contents of the forced-elaboration-order file supplied to the
+    --  binder via switch -f and return them as a string. Return null if the
+    --  file is not available.
+ 
+    --------------
+    -- Has_Next --
+    --------------
+ 
+    function Has_Next (Iter : Forced_Units_Iterator) return Boolean is
+    begin
+       return Present (Iter.Unit_Name);
+    end Has_Next;
+ 
     ----------------------
     -- Is_Internal_Unit --
     ----------------------
*************** package body Butil is
*** 71,76 ****
--- 99,597 ----
          or else (L >  4 and then B (1 ..  5) = "gnat.");
     end Is_Predefined_Unit;
  
+    --------------------------
+    -- Iterate_Forced_Units --
+    --------------------------
+ 
+    function Iterate_Forced_Units return Forced_Units_Iterator is
+       Iter : Forced_Units_Iterator;
+ 
+    begin
+       Iter.Order := Read_Forced_Elab_Order_File;
+       Parse_Next_Unit_Name (Iter);
+ 
+       return Iter;
+    end Iterate_Forced_Units;
+ 
+    ----------
+    -- Next --
+    ----------
+ 
+    procedure Next
+      (Iter      : in out Forced_Units_Iterator;
+       Unit_Name : out Unit_Name_Type;
+       Unit_Line : out Logical_Line_Number)
+    is
+    begin
+       if not Has_Next (Iter) then
+          raise Iterator_Exhausted;
+       end if;
+ 
+       Unit_Line := Iter.Unit_Line;
+       Unit_Name := Iter.Unit_Name;
+       pragma Assert (Present (Unit_Name));
+ 
+       Parse_Next_Unit_Name (Iter);
+    end Next;
+ 
+    --------------------------
+    -- Parse_Next_Unit_Name --
+    --------------------------
+ 
+    procedure Parse_Next_Unit_Name (Iter : in out Forced_Units_Iterator) is
+       Body_Suffix : constant String   := " (body)";
+       Body_Type   : constant String   := "%b";
+       Body_Length : constant Positive := Body_Suffix'Length;
+       Body_Offset : constant Natural  := Body_Length - 1;
+ 
+       Comment_Header : constant String  := "--";
+       Comment_Offset : constant Natural := Comment_Header'Length - 1;
+ 
+       Spec_Suffix : constant String   := " (spec)";
+       Spec_Type   : constant String   := "%s";
+       Spec_Length : constant Positive := Spec_Suffix'Length;
+       Spec_Offset : constant Natural  := Spec_Length - 1;
+ 
+       Index : Positive            renames Iter.Order_Index;
+       Line  : Logical_Line_Number renames Iter.Order_Line;
+       Order : String_Ptr          renames Iter.Order;
+ 
+       function At_Comment return Boolean;
+       pragma Inline (At_Comment);
+       --  Determine whether iterator Iter is positioned over the start of a
+       --  comment.
+ 
+       function At_Terminator return Boolean;
+       pragma Inline (At_Terminator);
+       --  Determine whether iterator Iter is positioned over a line terminator
+       --  character.
+ 
+       function At_Whitespace return Boolean;
+       pragma Inline (At_Whitespace);
+       --  Determine whether iterator Iter is positioned over a whitespace
+       --  character.
+ 
+       function Is_Terminator (C : Character) return Boolean;
+       pragma Inline (Is_Terminator);
+       --  Determine whether character C denotes a line terminator
+ 
+       function Is_Whitespace (C : Character) return Boolean;
+       pragma Inline (Is_Whitespace);
+       --  Determine whether character C denotes a whitespace
+ 
+       procedure Parse_Unit_Name;
+       pragma Inline (Parse_Unit_Name);
+       --  Find and parse the first available unit name
+ 
+       procedure Skip_Comment;
+       pragma Inline (Skip_Comment);
+       --  Skip a comment by reaching a line terminator
+ 
+       procedure Skip_Terminator;
+       pragma Inline (Skip_Terminator);
+       --  Skip a line terminator and deal with the logical line numbering
+ 
+       procedure Skip_Whitespace;
+       pragma Inline (Skip_Whitespace);
+       --  Skip whitespace
+ 
+       function Within_Order
+         (Low_Offset  : Natural := 0;
+          High_Offset : Natural := 0) return Boolean;
+       pragma Inline (Within_Order);
+       --  Determine whether index of iterator Iter is still within the range of
+       --  the order string. Low_Offset may be used to inspect the area that is
+       --  less than the index. High_Offset may be used to inspect the area that
+       --  is greater than the index.
+ 
+       ----------------
+       -- At_Comment --
+       ----------------
+ 
+       function At_Comment return Boolean is
+       begin
+          --  The interator is over a comment when the index is positioned over
+          --  the start of a comment header.
+          --
+          --    unit (spec)  --  comment
+          --                 ^
+          --                 Index
+ 
+          return
+            Within_Order (High_Offset => Comment_Offset)
+              and then Order (Index .. Index + Comment_Offset) = Comment_Header;
+       end At_Comment;
+ 
+       -------------------
+       -- At_Terminator --
+       -------------------
+ 
+       function At_Terminator return Boolean is
+       begin
+          return Within_Order and then Is_Terminator (Order (Index));
+       end At_Terminator;
+ 
+       -------------------
+       -- At_Whitespace --
+       -------------------
+ 
+       function At_Whitespace return Boolean is
+       begin
+          return Within_Order and then Is_Whitespace (Order (Index));
+       end At_Whitespace;
+ 
+       -------------------
+       -- Is_Terminator --
+       -------------------
+ 
+       function Is_Terminator (C : Character) return Boolean is
+       begin
+          --  Carriage return is treated intentionally as whitespace since it
+          --  appears only on certain targets, while line feed is consistent on
+          --  all of them.
+ 
+          return C = ASCII.LF;
+       end Is_Terminator;
+ 
+       -------------------
+       -- Is_Whitespace --
+       -------------------
+ 
+       function Is_Whitespace (C : Character) return Boolean is
+       begin
+          return
+            C = ' '
+              or else C = ASCII.CR   --  carriage return
+              or else C = ASCII.FF   --  form feed
+              or else C = ASCII.HT   --  horizontal tab
+              or else C = ASCII.VT;  --  vertical tab
+       end Is_Whitespace;
+ 
+       ---------------------
+       -- Parse_Unit_Name --
+       ---------------------
+ 
+       procedure Parse_Unit_Name is
+          pragma Assert (not At_Comment);
+          pragma Assert (not At_Terminator);
+          pragma Assert (not At_Whitespace);
+          pragma Assert (Within_Order);
+ 
+          procedure Find_End_Index_Of_Unit_Name;
+          pragma Inline (Find_End_Index_Of_Unit_Name);
+          --  Position the index of iterator Iter at the last character of the
+          --  first available unit name.
+ 
+          ---------------------------------
+          -- Find_End_Index_Of_Unit_Name --
+          ---------------------------------
+ 
+          procedure Find_End_Index_Of_Unit_Name is
+          begin
+             --  At this point the index points at the start of a unit name. The
+             --  unit name may be legal, in which case it appears as:
+             --
+             --    unit (body)
+             --
+             --  However, it may also be illegal:
+             --
+             --    unit without suffix
+             --    unit with multiple prefixes (spec)
+             --
+             --  In order to handle both forms, find the construct following the
+             --  unit name. This is either a comment, a terminator, or the end
+             --  of the order:
+             --
+             --    unit (body)    --  comment
+             --    unit without suffix    <terminator>
+             --    unit with multiple prefixes (spec)<end of order>
+             --
+             --  Once the construct is found, truncate the unit name by skipping
+             --  all white space between the construct and the end of the unit
+             --  name.
+ 
+             --  Find the construct that follows the unit name
+ 
+             while Within_Order loop
+                if At_Comment then
+                   exit;
+ 
+                elsif At_Terminator then
+                   exit;
+                end if;
+ 
+                Index := Index + 1;
+             end loop;
+ 
+             --  Position the index prior to the construct that follows the unit
+             --  name.
+ 
+             Index := Index - 1;
+ 
+             --  Truncate towards the end of the unit name
+ 
+             while Within_Order loop
+                if At_Whitespace then
+                   Index := Index - 1;
+                else
+                   exit;
+                end if;
+             end loop;
+          end Find_End_Index_Of_Unit_Name;
+ 
+          --  Local variables
+ 
+          Start_Index : constant Positive := Index;
+ 
+          End_Index : Positive;
+          Is_Body   : Boolean := False;
+          Is_Spec   : Boolean := False;
+ 
+       --  Start of processing for Parse_Unit_Name
+ 
+       begin
+          Find_End_Index_Of_Unit_Name;
+          End_Index := Index;
+ 
+          pragma Assert (Start_Index <= End_Index);
+ 
+          --  At this point the indices are positioned as follows:
+          --
+          --              End_Index
+          --              Index
+          --              v
+          --    unit (spec)     --  comment
+          --    ^
+          --    Start_Index
+ 
+          --  Rewind the index, skipping over the legal suffixes
+          --
+          --    Index     End_Index
+          --        v     v
+          --    unit (spec)     --  comment
+          --    ^
+          --    Start_Index
+ 
+          if Within_Order (Low_Offset => Body_Offset)
+            and then Order (Index - Body_Offset .. Index) = Body_Suffix
+          then
+             Is_Body := True;
+             Index   := Index - Body_Length;
+ 
+          elsif Within_Order (Low_Offset => Spec_Offset)
+            and then Order (Index - Spec_Offset .. Index) = Spec_Suffix
+          then
+             Is_Spec := True;
+             Index   := Index - Spec_Length;
+          end if;
+ 
+          --  Capture the line where the unit name is defined
+ 
+          Iter.Unit_Line := Line;
+ 
+          --  Transform the unit name to match the format recognized by the
+          --  name table.
+ 
+          if Is_Body then
+             Iter.Unit_Name :=
+               Name_Find (Order (Start_Index .. Index) & Body_Type);
+ 
+          elsif Is_Spec then
+             Iter.Unit_Name :=
+               Name_Find (Order (Start_Index .. Index) & Spec_Type);
+ 
+          --  Otherwise the unit name is illegal, so leave it as is
+ 
+          else
+             Iter.Unit_Name := Name_Find (Order (Start_Index .. Index));
+          end if;
+ 
+          --  Advance the index past the unit name
+          --
+          --      End_IndexIndex
+          --              vv
+          --    unit (spec)     --  comment
+          --    ^
+          --    Start_Index
+ 
+          Index := End_Index + 1;
+       end Parse_Unit_Name;
+ 
+       ------------------
+       -- Skip_Comment --
+       ------------------
+ 
+       procedure Skip_Comment is
+       begin
+          pragma Assert (At_Comment);
+ 
+          while Within_Order loop
+             if At_Terminator then
+                exit;
+             end if;
+ 
+             Index := Index + 1;
+          end loop;
+       end Skip_Comment;
+ 
+       ---------------------
+       -- Skip_Terminator --
+       ---------------------
+ 
+       procedure Skip_Terminator is
+       begin
+          pragma Assert (At_Terminator);
+ 
+          Index := Index + 1;
+          Line  := Line  + 1;
+       end Skip_Terminator;
+ 
+       ---------------------
+       -- Skip_Whitespace --
+       ---------------------
+ 
+       procedure Skip_Whitespace is
+       begin
+          while Within_Order loop
+             if At_Whitespace then
+                Index := Index + 1;
+             else
+                exit;
+             end if;
+          end loop;
+       end Skip_Whitespace;
+ 
+       ------------------
+       -- Within_Order --
+       ------------------
+ 
+       function Within_Order
+         (Low_Offset  : Natural := 0;
+          High_Offset : Natural := 0) return Boolean
+       is
+       begin
+          return
+            Order /= null
+              and then Index - Low_Offset  >= Order'First
+              and then Index + High_Offset <= Order'Last;
+       end Within_Order;
+ 
+    --  Start of processing for Parse_Next_Unit_Name
+ 
+    begin
+       --  A line in the forced-elaboration-order file has the following
+       --  grammar:
+       --
+       --    LINE ::=
+       --      [WHITESPACE] UNIT_NAME [WHITESPACE] [COMMENT] TERMINATOR
+       --
+       --    WHITESPACE ::=
+       --      <any whitespace character>
+       --    | <carriage return>
+       --
+       --    UNIT_NAME ::=
+       --      UNIT_PREFIX [WHITESPACE] UNIT_SUFFIX
+       --
+       --    UNIT_PREFIX ::=
+       --      <any string>
+       --
+       --    UNIT_SUFFIX ::=
+       --      (body)
+       --    | (spec)
+       --
+       --    COMMENT ::=
+       --      --  <any string>
+       --
+       --    TERMINATOR ::=
+       --      <line feed>
+       --      <end of file>
+       --
+       --  Items in <> brackets are semantic notions
+ 
+       --  Assume that the order has no remaining units
+ 
+       Iter.Unit_Line := No_Line_Number;
+       Iter.Unit_Name := No_Unit_Name;
+ 
+       --  Try to find the first available unit name from the current position
+       --  of iteration.
+ 
+       while Within_Order loop
+          Skip_Whitespace;
+ 
+          if At_Comment then
+             Skip_Comment;
+ 
+          elsif not Within_Order then
+             exit;
+ 
+          elsif At_Terminator then
+             Skip_Terminator;
+ 
+          else
+             Parse_Unit_Name;
+             exit;
+          end if;
+       end loop;
+    end Parse_Next_Unit_Name;
+ 
+    ---------------------------------
+    -- Read_Forced_Elab_Order_File --
+    ---------------------------------
+ 
+    function Read_Forced_Elab_Order_File return String_Ptr is
+       procedure Free is new Unchecked_Deallocation (String, String_Ptr);
+ 
+       Descr    : File_Descriptor;
+       Len      : Natural;
+       Len_Read : Natural;
+       Result   : String_Ptr;
+       Success  : Boolean;
+ 
+    begin
+       if Force_Elab_Order_File = null then
+          return null;
+       end if;
+ 
+       --  Obtain and sanitize a descriptor to the elaboration-order file
+ 
+       Descr := Open_Read (Force_Elab_Order_File.all, Binary);
+ 
+       if Descr = Invalid_FD then
+          return null;
+       end if;
+ 
+       --  Determine the size of the file, allocate a result large enough to
+       --  house its contents, and read it.
+ 
+       Len := Natural (File_Length (Descr));
+ 
+       if Len = 0 then
+          return null;
+       end if;
+ 
+       Result   := new String (1 .. Len);
+       Len_Read := Read (Descr, Result (1)'Address, Len);
+ 
+       --  The read failed to acquire the whole content of the file
+ 
+       if Len_Read /= Len then
+          Free (Result);
+          return null;
+       end if;
+ 
+       Close (Descr, Success);
+ 
+       --  The file failed to close
+ 
+       if not Success then
+          Free (Result);
+          return null;
+       end if;
+ 
+       return Result;
+    end Read_Forced_Elab_Order_File;
+ 
     ----------------
     -- Uname_Less --
     ----------------
diff -Nrcpad gcc-9.3.0/gcc/ada/butil.ads gcc-10.1.0/gcc/ada/butil.ads
*** gcc-9.3.0/gcc/ada/butil.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/butil.ads	Thu May  7 10:49:59 2020
***************
*** 23,34 ****
  --                                                                          --
  ------------------------------------------------------------------------------
  
  with Namet; use Namet;
  
  package Butil is
  
- --  This package contains utility routines for the binder
- 
     function Is_Predefined_Unit return Boolean;
     --  Given a unit name stored in Name_Buffer with length in Name_Len,
     --  returns True if this is the name of a predefined unit or a child of
--- 23,35 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
+ --  This package contains utility routines for the binder
+ 
  with Namet; use Namet;
+ with Types; use Types;
  
  package Butil is
  
     function Is_Predefined_Unit return Boolean;
     --  Given a unit name stored in Name_Buffer with length in Name_Len,
     --  returns True if this is the name of a predefined unit or a child of
*************** package Butil is
*** 51,54 ****
--- 52,103 ----
     --  Output unit name with (body) or (spec) after as required. On return
     --  Name_Len is set to the number of characters which were output.
  
+    ---------------
+    -- Iterators --
+    ---------------
+ 
+    --  The following type represents an iterator over all units that are
+    --  specified in the forced-elaboration-order file supplied by the binder
+    --  via switch -f.
+ 
+    type Forced_Units_Iterator is private;
+ 
+    function Has_Next (Iter : Forced_Units_Iterator) return Boolean;
+    pragma Inline (Has_Next);
+    --  Determine whether iterator Iter has more units to examine
+ 
+    function Iterate_Forced_Units return Forced_Units_Iterator;
+    pragma Inline (Iterate_Forced_Units);
+    --  Obtain an iterator over all units in the forced-elaboration-order file
+ 
+    procedure Next
+      (Iter      : in out Forced_Units_Iterator;
+       Unit_Name : out Unit_Name_Type;
+       Unit_Line : out Logical_Line_Number);
+    pragma Inline (Next);
+    --  Return the current unit referenced by iterator Iter along with the
+    --  line number it appears on, and advance to the next available unit.
+ 
+ private
+    First_Line_Number : constant Logical_Line_Number := No_Line_Number + 1;
+ 
+    type Forced_Units_Iterator is record
+       Order : String_Ptr := null;
+       --  A reference to the contents of the forced-elaboration-order file,
+       --  read in as a string.
+ 
+       Order_Index : Positive := 1;
+       --  Index into the order string
+ 
+       Order_Line : Logical_Line_Number := First_Line_Number;
+       --  Logical line number within the order string
+ 
+       Unit_Line : Logical_Line_Number := No_Line_Number;
+       --  The logical line number of the current unit name within the order
+       --  string.
+ 
+       Unit_Name : Unit_Name_Type := No_Unit_Name;
+       --  The current unit name parsed from the order string
+    end record;
+ 
  end Butil;
diff -Nrcpad gcc-9.3.0/gcc/ada/checks.adb gcc-10.1.0/gcc/ada/checks.adb
*** gcc-9.3.0/gcc/ada/checks.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/checks.adb	Thu May  7 10:49:59 2020
*************** package body Checks is
*** 435,441 ****
  
        --  Fall through for cases where we do set the flag
  
!       Set_Do_Overflow_Check (N, True);
        Possible_Local_Raise (N, Standard_Constraint_Error);
     end Activate_Overflow_Check;
  
--- 435,441 ----
  
        --  Fall through for cases where we do set the flag
  
!       Set_Do_Overflow_Check (N);
        Possible_Local_Raise (N, Standard_Constraint_Error);
     end Activate_Overflow_Check;
  
*************** package body Checks is
*** 445,451 ****
  
     procedure Activate_Range_Check (N : Node_Id) is
     begin
!       Set_Do_Range_Check (N, True);
        Possible_Local_Raise (N, Standard_Constraint_Error);
     end Activate_Range_Check;
  
--- 445,451 ----
  
     procedure Activate_Range_Check (N : Node_Id) is
     begin
!       Set_Do_Range_Check (N);
        Possible_Local_Raise (N, Standard_Constraint_Error);
     end Activate_Range_Check;
  
*************** package body Checks is
*** 577,584 ****
        Typ         : Entity_Id;
        Insert_Node : Node_Id)
     is
!       Loc         : constant Source_Ptr := Sloc (N);
!       Param_Ent   : Entity_Id           := Param_Entity (N);
        Param_Level : Node_Id;
        Type_Level  : Node_Id;
  
--- 577,586 ----
        Typ         : Entity_Id;
        Insert_Node : Node_Id)
     is
!       Loc : constant Source_Ptr := Sloc (N);
! 
!       Check_Cond  : Node_Id;
!       Param_Ent   : Entity_Id := Param_Entity (N);
        Param_Level : Node_Id;
        Type_Level  : Node_Id;
  
*************** package body Checks is
*** 617,637 ****
           Param_Level :=
             New_Occurrence_Of (Extra_Accessibility (Param_Ent), Loc);
  
!          Type_Level :=
!            Make_Integer_Literal (Loc, Deepest_Type_Access_Level (Typ));
  
           --  Raise Program_Error if the accessibility level of the access
           --  parameter is deeper than the level of the target access type.
  
           Insert_Action (Insert_Node,
             Make_Raise_Program_Error (Loc,
!              Condition =>
!                Make_Op_Gt (Loc,
!                  Left_Opnd  => Param_Level,
!                  Right_Opnd => Type_Level),
!              Reason => PE_Accessibility_Check_Failed));
  
           Analyze_And_Resolve (N);
        end if;
     end Apply_Accessibility_Check;
  
--- 619,667 ----
           Param_Level :=
             New_Occurrence_Of (Extra_Accessibility (Param_Ent), Loc);
  
!          --  Use the dynamic accessibility parameter for the function's result
!          --  when one has been created instead of statically referring to the
!          --  deepest type level so as to appropriatly handle the rules for
!          --  RM 3.10.2 (10.1/3).
! 
!          if Ekind_In (Scope (Param_Ent), E_Function,
!                                          E_Operator,
!                                          E_Subprogram_Type)
!            and then Present (Extra_Accessibility_Of_Result (Scope (Param_Ent)))
!          then
!             Type_Level :=
!               New_Occurrence_Of
!                 (Extra_Accessibility_Of_Result (Scope (Param_Ent)), Loc);
!          else
!             Type_Level :=
!               Make_Integer_Literal (Loc, Deepest_Type_Access_Level (Typ));
!          end if;
  
           --  Raise Program_Error if the accessibility level of the access
           --  parameter is deeper than the level of the target access type.
  
+          Check_Cond :=
+            Make_Op_Gt (Loc,
+              Left_Opnd  => Param_Level,
+              Right_Opnd => Type_Level);
+ 
           Insert_Action (Insert_Node,
             Make_Raise_Program_Error (Loc,
!              Condition => Check_Cond,
!              Reason    => PE_Accessibility_Check_Failed));
  
           Analyze_And_Resolve (N);
+ 
+          --  If constant folding has happened on the condition for the
+          --  generated error, then warn about it being unconditional.
+ 
+          if Nkind (Check_Cond) = N_Identifier
+            and then Entity (Check_Cond) = Standard_True
+          then
+             Error_Msg_Warn := SPARK_Mode /= On;
+             Error_Msg_N ("accessibility check fails<<", N);
+             Error_Msg_N ("\Program_Error [<<", N);
+          end if;
        end if;
     end Apply_Accessibility_Check;
  
*************** package body Checks is
*** 778,784 ****
  
              if Compile_Time_Known_Value (Expr) then
                 Alignment_Warnings.Append
!                  ((E => E, A => Expr_Value (Expr), W => Warning_Msg));
  
              --  Add explanation of the warning generated by the check
  
--- 808,828 ----
  
              if Compile_Time_Known_Value (Expr) then
                 Alignment_Warnings.Append
!                  ((E => E,
!                    A => Expr_Value (Expr),
!                    P => Empty,
!                    W => Warning_Msg));
! 
!             --  Likewise if the expression is of the form X'Address
! 
!             elsif Nkind (Expr) = N_Attribute_Reference
!               and then Attribute_Name (Expr) = Name_Address
!             then
!                Alignment_Warnings.Append
!                  ((E => E,
!                    A => No_Uint,
!                    P => Prefix (Expr),
!                    W => Warning_Msg));
  
              --  Add explanation of the warning generated by the check
  
*************** package body Checks is
*** 2001,2006 ****
--- 2045,2056 ----
           return;
        end if;
  
+       --  Here we will generate an explicit range check, so we don't want to
+       --  set the Do_Range check flag, since the range check is taken care of
+       --  by the code we will generate.
+ 
+       Set_Do_Range_Check (Ck_Node, False);
+ 
        if not Compile_Time_Known_Value (LB)
            or not Compile_Time_Known_Value (HB)
        then
*************** package body Checks is
*** 2017,2023 ****
              Apply_Float_Conversion_Check (Ck_Node, Target_Base);
              Set_Etype (Temp, Target_Base);
  
!             Insert_Action (Parent (Par),
                Make_Object_Declaration (Loc,
                  Defining_Identifier => Temp,
                  Object_Definition => New_Occurrence_Of (Target_Typ, Loc),
--- 2067,2082 ----
              Apply_Float_Conversion_Check (Ck_Node, Target_Base);
              Set_Etype (Temp, Target_Base);
  
!             --  Note: Previously the declaration was inserted above the parent
!             --  of the conversion, apparently as a small optimization for the
!             --  subequent traversal in Insert_Actions. Unfortunately a similar
!             --  optimization takes place in Insert_Actions, assuming that the
!             --  insertion point must be above the expression that creates
!             --  actions. This is not correct in the presence of conditional
!             --  expressions, where the insertion must be in the list of actions
!             --  attached to the current alternative.
! 
!             Insert_Action (Par,
                Make_Object_Declaration (Loc,
                  Defining_Identifier => Temp,
                  Object_Definition => New_Occurrence_Of (Target_Typ, Loc),
*************** package body Checks is
*** 2049,2055 ****
        if Nkind (Ck_Node) = N_Real_Literal
          and then Etype (Ck_Node) = Universal_Real
          and then Is_Integer_Type (Target_Typ)
-         and then Nkind (Parent (Ck_Node)) = N_Type_Conversion
        then
           declare
              Int_Val : constant Uint := UR_To_Uint (Realval (Ck_Node));
--- 2108,2113 ----
*************** package body Checks is
*** 2436,2442 ****
          (Formal     : Entity_Id;
           Prag_Nam   : Name_Id;
           For_Result : Boolean := False);
!       --  Add a single 'Valid[_Scalar] check which verifies the initialization
        --  of Formal. Prag_Nam denotes the pre or post condition pragma name.
        --  Set flag For_Result when to verify the result of a function.
  
--- 2494,2500 ----
          (Formal     : Entity_Id;
           Prag_Nam   : Name_Id;
           For_Result : Boolean := False);
!       --  Add a single 'Valid[_Scalars] check which verifies the initialization
        --  of Formal. Prag_Nam denotes the pre or post condition pragma name.
        --  Set flag For_Result when to verify the result of a function.
  
*************** package body Checks is
*** 2707,2712 ****
--- 2765,2805 ----
           --  Here for normal case of predicate active
  
           else
+             --  If the expression is an IN parameter, the predicate will have
+             --  been applied at the point of call. An additional check would
+             --  be redundant, or will lead to out-of-scope references if the
+             --  call appears within an aspect specification for a precondition.
+ 
+             --  However, if the reference is within the body of the subprogram
+             --  that declares the formal, the predicate can safely be applied,
+             --  which may be necessary for a nested call whose formal has a
+             --  different predicate.
+ 
+             if Is_Entity_Name (N)
+               and then Ekind (Entity (N)) = E_In_Parameter
+             then
+                declare
+                   In_Body : Boolean := False;
+                   P       : Node_Id := Parent (N);
+ 
+                begin
+                   while Present (P) loop
+                      if Nkind (P) = N_Subprogram_Body
+                        and then Corresponding_Spec (P) = Scope (Entity (N))
+                      then
+                         In_Body := True;
+                         exit;
+                      end if;
+ 
+                      P := Parent (P);
+                   end loop;
+ 
+                   if not In_Body then
+                      return;
+                   end if;
+                end;
+             end if;
+ 
              --  If the type has a static predicate and the expression is known
              --  at compile time, see if the expression satisfies the predicate.
  
*************** package body Checks is
*** 3557,3569 ****
                    --  will not be generated.
  
                    if GNATprove_Mode
!                     or else not Is_Fixed_Point_Type (Expr_Type)
                    then
                       Apply_Scalar_Range_Check
                         (Expr, Target_Type, Fixed_Int => Conv_OK);
  
                    else
!                      Set_Do_Range_Check (Expression (N), False);
                    end if;
  
                    --  If the target type has predicates, we need to indicate
--- 3650,3663 ----
                    --  will not be generated.
  
                    if GNATprove_Mode
!                     or else (not Is_Fixed_Point_Type (Expr_Type)
!                               and then not Is_Fixed_Point_Type (Target_Type))
                    then
                       Apply_Scalar_Range_Check
                         (Expr, Target_Type, Fixed_Int => Conv_OK);
  
                    else
!                      Set_Do_Range_Check (Expr, False);
                    end if;
  
                    --  If the target type has predicates, we need to indicate
*************** package body Checks is
*** 6775,6792 ****
        Source_Base_Type : constant Entity_Id  := Base_Type (Source_Type);
        Target_Base_Type : constant Entity_Id  := Base_Type (Target_Type);
  
!       procedure Convert_And_Check_Range;
!       --  Convert the conversion operand to the target base type and save in
!       --  a temporary. Then check the converted value against the range of the
!       --  target subtype.
  
        -----------------------------
        -- Convert_And_Check_Range --
        -----------------------------
  
!       procedure Convert_And_Check_Range is
!          Tnn       : constant Entity_Id := Make_Temporary (Loc, 'T', N);
!          Conv_Node : Node_Id;
  
        begin
           --  For enumeration types with non-standard representation this is a
--- 6869,6887 ----
        Source_Base_Type : constant Entity_Id  := Base_Type (Source_Type);
        Target_Base_Type : constant Entity_Id  := Base_Type (Target_Type);
  
!       procedure Convert_And_Check_Range (Suppress : Check_Id);
!       --  Convert N to the target base type and save the result in a temporary.
!       --  The action is analyzed using the default checks as modified by the
!       --  given Suppress argument. Then check the converted value against the
!       --  range of the target subtype.
  
        -----------------------------
        -- Convert_And_Check_Range --
        -----------------------------
  
!       procedure Convert_And_Check_Range (Suppress : Check_Id) is
!          Tnn    : constant Entity_Id := Make_Temporary (Loc, 'T', N);
!          Conv_N : Node_Id;
  
        begin
           --  For enumeration types with non-standard representation this is a
*************** package body Checks is
*** 6801,6836 ****
             and then Present (Enum_Pos_To_Rep (Source_Base_Type))
             and then Is_Integer_Type (Target_Base_Type)
           then
!             Conv_Node :=
!               OK_Convert_To
!                 (Typ  => Target_Base_Type,
!                  Expr => Duplicate_Subexpr (N));
! 
!          --  Common case
! 
           else
!             Conv_Node :=
!               Make_Type_Conversion (Loc,
!                 Subtype_Mark => New_Occurrence_Of (Target_Base_Type, Loc),
!                 Expression   => Duplicate_Subexpr (N));
           end if;
  
!          --  We make a temporary to hold the value of the converted value
!          --  (converted to the base type), and then do the test against this
!          --  temporary. The conversion itself is replaced by an occurrence of
!          --  Tnn and followed by the explicit range check. Note that checks
!          --  are suppressed for this code, since we don't want a recursive
!          --  range check popping up.
  
           --     Tnn : constant Target_Base_Type := Target_Base_Type (N);
           --     [constraint_error when Tnn not in Target_Type]
  
           Insert_Actions (N, New_List (
             Make_Object_Declaration (Loc,
               Defining_Identifier => Tnn,
               Object_Definition   => New_Occurrence_Of (Target_Base_Type, Loc),
               Constant_Present    => True,
!              Expression          => Conv_Node),
  
             Make_Raise_Constraint_Error (Loc,
               Condition =>
--- 6896,6921 ----
             and then Present (Enum_Pos_To_Rep (Source_Base_Type))
             and then Is_Integer_Type (Target_Base_Type)
           then
!             Conv_N := OK_Convert_To (Target_Base_Type, Duplicate_Subexpr (N));
           else
!             Conv_N := Convert_To (Target_Base_Type, Duplicate_Subexpr (N));
           end if;
  
!          --  We make a temporary to hold the value of the conversion to the
!          --  target base type, and then do the test against this temporary.
!          --  N itself is replaced by an occurrence of Tnn and followed by
!          --  the explicit range check.
  
           --     Tnn : constant Target_Base_Type := Target_Base_Type (N);
           --     [constraint_error when Tnn not in Target_Type]
+          --     Tnn
  
           Insert_Actions (N, New_List (
             Make_Object_Declaration (Loc,
               Defining_Identifier => Tnn,
               Object_Definition   => New_Occurrence_Of (Target_Base_Type, Loc),
               Constant_Present    => True,
!              Expression          => Conv_N),
  
             Make_Raise_Constraint_Error (Loc,
               Condition =>
*************** package body Checks is
*** 6838,6844 ****
                   Left_Opnd  => New_Occurrence_Of (Tnn, Loc),
                   Right_Opnd => New_Occurrence_Of (Target_Type, Loc)),
               Reason => Reason)),
!            Suppress => All_Checks);
  
           Rewrite (N, New_Occurrence_Of (Tnn, Loc));
  
--- 6923,6929 ----
                   Left_Opnd  => New_Occurrence_Of (Tnn, Loc),
                   Right_Opnd => New_Occurrence_Of (Target_Type, Loc)),
               Reason => Reason)),
!            Suppress => Suppress);
  
           Rewrite (N, New_Occurrence_Of (Tnn, Loc));
  
*************** package body Checks is
*** 6855,6861 ****
        --  First special case, if the source type is already within the range
        --  of the target type, then no check is needed (probably we should have
        --  stopped Do_Range_Check from being set in the first place, but better
!       --  late than never in preventing junk code and junk flag settings.
  
        if In_Subrange_Of (Source_Type, Target_Type)
  
--- 6940,6946 ----
        --  First special case, if the source type is already within the range
        --  of the target type, then no check is needed (probably we should have
        --  stopped Do_Range_Check from being set in the first place, but better
!       --  late than never in preventing junk code and junk flag settings).
  
        if In_Subrange_Of (Source_Type, Target_Type)
  
*************** package body Checks is
*** 6879,6885 ****
        --  flag set, we do not want to generate the explicit range check code.
  
        if GNATprove_Mode or else not Expander_Active then
!          Set_Do_Range_Check (N, True);
           return;
        end if;
  
--- 6964,6970 ----
        --  flag set, we do not want to generate the explicit range check code.
  
        if GNATprove_Mode or else not Expander_Active then
!          Set_Do_Range_Check (N);
           return;
        end if;
  
*************** package body Checks is
*** 6932,6938 ****
  
        --  Next test for the case where the target type is within the bounds
        --  of the base type of the source type, since in this case we can
!       --  simply convert these bounds to the base type of T to do the test.
  
        --    [constraint_error when N not in
        --       Source_Base_Type (Target_Type'First)
--- 7017,7024 ----
  
        --  Next test for the case where the target type is within the bounds
        --  of the base type of the source type, since in this case we can
!       --  simply convert the bounds of the target type to this base type
!       --  to do the test.
  
        --    [constraint_error when N not in
        --       Source_Base_Type (Target_Type'First)
*************** package body Checks is
*** 6981,7006 ****
                Suppress => All_Checks);
  
           --  For conversions involving at least one type that is not discrete,
!          --  first convert to target type and then generate the range check.
!          --  This avoids problems with values that are close to a bound of the
!          --  target type that would fail a range check when done in a larger
!          --  source type before converting but would pass if converted with
           --  rounding and then checked (such as in float-to-float conversions).
  
           else
!             Convert_And_Check_Range;
           end if;
  
!       --  Note that at this stage we now that the Target_Base_Type is not in
        --  the range of the Source_Base_Type (since even the Target_Type itself
        --  is not in this range). It could still be the case that Source_Type is
        --  in range of the target base type since we have not checked that case.
  
        --  If that is the case, we can freely convert the source to the target,
!       --  and then test the target result against the bounds.
  
        elsif In_Subrange_Of (Source_Type, Target_Base_Type) then
!          Convert_And_Check_Range;
  
        --  At this stage, we know that we have two scalar types, which are
        --  directly convertible, and where neither scalar type has a base
--- 7067,7098 ----
                Suppress => All_Checks);
  
           --  For conversions involving at least one type that is not discrete,
!          --  first convert to the target base type and then generate the range
!          --  check. This avoids problems with values that are close to a bound
!          --  of the target type that would fail a range check when done in a
!          --  larger source type before converting but pass if converted with
           --  rounding and then checked (such as in float-to-float conversions).
  
+          --  Note that overflow checks are not suppressed for this code because
+          --  we do not know whether the source type is in range of the target
+          --  base type (unlike in the next case below).
+ 
           else
!             Convert_And_Check_Range (Suppress => Range_Check);
           end if;
  
!       --  Note that at this stage we know that the Target_Base_Type is not in
        --  the range of the Source_Base_Type (since even the Target_Type itself
        --  is not in this range). It could still be the case that Source_Type is
        --  in range of the target base type since we have not checked that case.
  
        --  If that is the case, we can freely convert the source to the target,
!       --  and then test the target result against the bounds. Note that checks
!       --  are suppressed for this code, since we don't want a recursive range
!       --  check popping up.
  
        elsif In_Subrange_Of (Source_Type, Target_Base_Type) then
!          Convert_And_Check_Range (Suppress => All_Checks);
  
        --  At this stage, we know that we have two scalar types, which are
        --  directly convertible, and where neither scalar type has a base
*************** package body Checks is
*** 7429,7434 ****
--- 7521,7539 ----
           return;
        end if;
  
+       --  Entities declared in Lock_free protected types must be treated as
+       --  volatile, and we must inhibit validity checks to prevent improper
+       --  constant folding.
+ 
+       if Is_Entity_Name (Expr)
+         and then Is_Subprogram (Scope (Entity (Expr)))
+         and then Present (Protected_Subprogram (Scope (Entity (Expr))))
+         and then Uses_Lock_Free
+                    (Scope (Protected_Subprogram (Scope (Entity (Expr)))))
+       then
+          return;
+       end if;
+ 
        --  If we have a checked conversion, then validity check applies to
        --  the expression inside the conversion, not the result, since if
        --  the expression inside is valid, then so is the conversion result.
*************** package body Checks is
*** 7506,7521 ****
                Suppress => Validity_Check);
  
              Set_Validated_Object (Var_Id, New_Copy_Tree (Exp));
              Rewrite (Exp, New_Occurrence_Of (Var_Id, Loc));
-             PV := New_Occurrence_Of (Var_Id, Loc);
  
!             --  Copy the Do_Range_Check flag over to the new Exp, so it doesn't
!             --  get lost. Floating point types are handled elsewhere.
  
!             if not Is_Floating_Point_Type (Typ) then
!                Set_Do_Range_Check (Exp, Do_Range_Check (Original_Node (Exp)));
              end if;
  
           --  Otherwise the expression does not denote a variable. Force its
           --  evaluation by capturing its value in a constant. Generate:
  
--- 7611,7629 ----
                Suppress => Validity_Check);
  
              Set_Validated_Object (Var_Id, New_Copy_Tree (Exp));
+ 
              Rewrite (Exp, New_Occurrence_Of (Var_Id, Loc));
  
!             --  Move the Do_Range_Check flag over to the new Exp so it doesn't
!             --  get lost and doesn't leak elsewhere.
  
!             if Do_Range_Check (Validated_Object (Var_Id)) then
!                Set_Do_Range_Check (Exp);
!                Set_Do_Range_Check (Validated_Object (Var_Id), False);
              end if;
  
+             PV := New_Occurrence_Of (Var_Id, Loc);
+ 
           --  Otherwise the expression does not denote a variable. Force its
           --  evaluation by capturing its value in a constant. Generate:
  
*************** package body Checks is
*** 7879,7884 ****
--- 7987,7998 ----
           return;
        end if;
  
+       --  In GNATprove mode, we do not apply the check
+ 
+       if GNATprove_Mode then
+          return;
+       end if;
+ 
        --  Otherwise install access check
  
        Insert_Action (N,
*************** package body Checks is
*** 9457,9462 ****
--- 9571,9582 ----
        --  Returns expression to compute:
        --    Typ'Length /= Expr'Length
  
+       function Length_Mismatch_Info_Message
+         (Left_Element_Count  : Uint;
+          Right_Element_Count : Uint) return String;
+       --  Returns a message indicating how many elements were expected
+       --  (Left_Element_Count) and how many were found (Right_Element_Count).
+ 
        ---------------
        -- Add_Check --
        ---------------
*************** package body Checks is
*** 9644,9649 ****
--- 9764,9799 ----
               Right_Opnd => Get_N_Length (Expr, Indx));
        end Length_N_Cond;
  
+       ----------------------------------
+       -- Length_Mismatch_Info_Message --
+       ----------------------------------
+ 
+       function Length_Mismatch_Info_Message
+         (Left_Element_Count  : Uint;
+          Right_Element_Count : Uint) return String
+       is
+ 
+          function Plural_Vs_Singular_Ending (Count : Uint) return String;
+          --  Returns an empty string if Count is 1; otherwise returns "s"
+ 
+          function Plural_Vs_Singular_Ending (Count : Uint) return String is
+          begin
+             if Count = 1 then
+                return "";
+             else
+                return "s";
+             end if;
+          end Plural_Vs_Singular_Ending;
+ 
+       begin
+          return "expected " & UI_Image (Left_Element_Count)
+                   & " element"
+                   & Plural_Vs_Singular_Ending (Left_Element_Count)
+                   & "; found " & UI_Image (Right_Element_Count)
+                   & " element"
+                   & Plural_Vs_Singular_Ending (Right_Element_Count);
+       end Length_Mismatch_Info_Message;
+ 
        -----------------
        -- Same_Bounds --
        -----------------
*************** package body Checks is
*** 9838,9849 ****
                             if L_Length > R_Length then
                                Add_Check
                                  (Compile_Time_Constraint_Error
!                                   (Wnode, "too few elements for}??", T_Typ));
  
                             elsif L_Length < R_Length then
                                Add_Check
                                  (Compile_Time_Constraint_Error
!                                   (Wnode, "too many elements for}??", T_Typ));
                             end if;
  
                          --  The comparison for an individual index subtype
--- 9988,10003 ----
                             if L_Length > R_Length then
                                Add_Check
                                  (Compile_Time_Constraint_Error
!                                   (Wnode, "too few elements for}??", T_Typ,
!                                    Extra_Msg => Length_Mismatch_Info_Message
!                                                   (L_Length, R_Length)));
  
                             elsif L_Length < R_Length then
                                Add_Check
                                  (Compile_Time_Constraint_Error
!                                   (Wnode, "too many elements for}??", T_Typ,
!                                    Extra_Msg => Length_Mismatch_Info_Message
!                                                   (L_Length, R_Length)));
                             end if;
  
                          --  The comparison for an individual index subtype
*************** package body Checks is
*** 10794,10800 ****
                      renames Alignment_Warnings.Table (J);
           begin
              if Known_Alignment (AWR.E)
!               and then AWR.A mod Alignment (AWR.E) = 0
              then
                 Delete_Warning_And_Continuations (AWR.W);
              end if;
--- 10948,10959 ----
                      renames Alignment_Warnings.Table (J);
           begin
              if Known_Alignment (AWR.E)
!               and then ((AWR.A /= No_Uint
!                           and then AWR.A mod Alignment (AWR.E) = 0)
!                         or else (Present (AWR.P)
!                                   and then Has_Compatible_Alignment
!                                              (AWR.E, AWR.P, True) =
!                                                Known_Compatible))
              then
                 Delete_Warning_And_Continuations (AWR.W);
              end if;
diff -Nrcpad gcc-9.3.0/gcc/ada/checks.ads gcc-10.1.0/gcc/ada/checks.ads
*** gcc-9.3.0/gcc/ada/checks.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/checks.ads	Thu May  7 10:49:59 2020
*************** package Checks is
*** 90,96 ****
     --  When we have address clauses, there is an issue of whether the address
     --  specified is appropriate to the alignment. In the general case where the
     --  address is dynamic, we generate a check and a possible warning (this
!    --  warning occurs for example if we have a restricted run time with the
     --  restriction No_Exception_Propagation). We also issue this warning in
     --  the case where the address is static, but we don't know the alignment
     --  at the time we process the address clause. In such a case, we issue the
--- 90,96 ----
     --  When we have address clauses, there is an issue of whether the address
     --  specified is appropriate to the alignment. In the general case where the
     --  address is dynamic, we generate a check and a possible warning (this
!    --  warning occurs for example if we have a restricted runtime with the
     --  restriction No_Exception_Propagation). We also issue this warning in
     --  the case where the address is static, but we don't know the alignment
     --  at the time we process the address clause. In such a case, we issue the
*************** package Checks is
*** 98,104 ****
     --  annotated the actual alignment chosen) that the warning was not needed.
  
     --  To deal with deleting these potentially annoying warnings, we save the
!    --  warning information in a table, and then delete the waranings in the
     --  post compilation validation stage if we can tell that the check would
     --  never fail (in general the back end will also optimize away the check
     --  in such cases).
--- 98,104 ----
     --  annotated the actual alignment chosen) that the warning was not needed.
  
     --  To deal with deleting these potentially annoying warnings, we save the
!    --  warning information in a table, and then delete the warnings in the
     --  post compilation validation stage if we can tell that the check would
     --  never fail (in general the back end will also optimize away the check
     --  in such cases).
*************** package Checks is
*** 113,118 ****
--- 113,121 ----
        --  Compile time known value of address clause for which the alignment
        --  is to be checked once we know the alignment.
  
+       P : Node_Id;
+       --  Prefix of address clause when it is of the form X'Address
+ 
        W : Error_Msg_Id;
        --  Id of warning message we might delete
     end record;
*************** package Checks is
*** 161,167 ****
  
     procedure Activate_Range_Check (N : Node_Id);
     pragma Inline (Activate_Range_Check);
!    --  Sets Do_Range_Check flag in node N, and handles possible local raise
     --  Always call this routine rather than calling Set_Do_Range_Check to
     --  set an explicit value of True, to ensure handling the local raise case.
  
--- 164,170 ----
  
     procedure Activate_Range_Check (N : Node_Id);
     pragma Inline (Activate_Range_Check);
!    --  Sets Do_Range_Check flag in node N, and handles possible local raise.
     --  Always call this routine rather than calling Set_Do_Range_Check to
     --  set an explicit value of True, to ensure handling the local raise case.
  
diff -Nrcpad gcc-9.3.0/gcc/ada/cio.c gcc-10.1.0/gcc/ada/cio.c
*** gcc-9.3.0/gcc/ada/cio.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/cio.c	Thu May  7 10:49:59 2020
***************
*** 30,37 ****
   ****************************************************************************/
  
  #ifdef IN_RTS
! #include "tconfig.h"
! #include "tsystem.h"
  #include <sys/stat.h>
  #else
  #include "config.h"
--- 30,36 ----
   ****************************************************************************/
  
  #ifdef IN_RTS
! #include "runtime.h"
  #include <sys/stat.h>
  #else
  #include "config.h"
diff -Nrcpad gcc-9.3.0/gcc/ada/clean.adb gcc-10.1.0/gcc/ada/clean.adb
*** gcc-9.3.0/gcc/ada/clean.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/clean.adb	Thu May  7 10:49:59 2020
*************** package body Clean is
*** 854,860 ****
                                then
                                   Project_File_Name :=
                                     new String'
!                                      (Prj (Prj'First + 1 ..  Prj'Last));
                                else
                                   Project_File_Name := new String'(Prj);
                                end if;
--- 854,860 ----
                                then
                                   Project_File_Name :=
                                     new String'
!                                      (Prj (Prj'First + 1 .. Prj'Last));
                                else
                                   Project_File_Name := new String'(Prj);
                                end if;
diff -Nrcpad gcc-9.3.0/gcc/ada/comperr.ads gcc-10.1.0/gcc/ada/comperr.ads
*** gcc-9.3.0/gcc/ada/comperr.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/comperr.ads	Thu May  7 10:49:59 2020
*************** package Comperr is
*** 50,55 ****
--- 50,57 ----
     --  for a GCC abort and false for a front end exception (with a possible
     --  message stored in TSD.Current_Excep).
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     procedure Delete_SCIL_Files;
     --  Delete SCIL files associated with the main unit
  
diff -Nrcpad gcc-9.3.0/gcc/ada/contracts.adb gcc-10.1.0/gcc/ada/contracts.adb
*** gcc-9.3.0/gcc/ada/contracts.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/contracts.adb	Thu May  7 10:49:59 2020
***************
*** 25,31 ****
  
  with Aspects;  use Aspects;
  with Atree;    use Atree;
- with Debug;    use Debug;
  with Einfo;    use Einfo;
  with Elists;   use Elists;
  with Errout;   use Errout;
--- 25,30 ----
*************** with Sinfo;    use Sinfo;
*** 51,57 ****
  with Snames;   use Snames;
  with Stand;    use Stand;
  with Stringt;  use Stringt;
- with SCIL_LL;  use SCIL_LL;
  with Tbuild;   use Tbuild;
  
  package body Contracts is
--- 50,55 ----
*************** package body Contracts is
*** 63,73 ****
     --
     --    Part_Of
  
-    procedure Build_And_Analyze_Contract_Only_Subprograms (L : List_Id);
-    --  (CodePeer): Subsidiary procedure to Analyze_Contracts which builds the
-    --  contract-only subprogram body of eligible subprograms found in L, adds
-    --  them to their corresponding list of declarations, and analyzes them.
- 
     procedure Expand_Subprogram_Contract (Body_Id : Entity_Id);
     --  Expand the contracts of a subprogram body and its correspoding spec (if
     --  any). This routine processes all [refined] pre- and postconditions as
--- 61,66 ----
*************** package body Contracts is
*** 324,329 ****
--- 317,323 ----
        --    Effective_Reads
        --    Effective_Writes
        --    Global
+       --    No_Caching
        --    Part_Of
  
        elsif Ekind (Id) = E_Variable then
*************** package body Contracts is
*** 334,339 ****
--- 328,334 ----
                                Name_Effective_Reads,
                                Name_Effective_Writes,
                                Name_Global,
+                               Name_No_Caching,
                                Name_Part_Of)
           then
              Add_Classification;
*************** package body Contracts is
*** 354,363 ****
        Decl : Node_Id;
  
     begin
-       if CodePeer_Mode and then Debug_Flag_Dot_KK then
-          Build_And_Analyze_Contract_Only_Subprograms (L);
-       end if;
- 
        Decl := First (L);
        while Present (Decl) loop
  
--- 349,354 ----
*************** package body Contracts is
*** 752,757 ****
--- 743,749 ----
        AW_Val   : Boolean := False;
        ER_Val   : Boolean := False;
        EW_Val   : Boolean := False;
+       NC_Val   : Boolean := False;
        Items    : Node_Id;
        Prag     : Node_Id;
        Ref_Elmt : Elmt_Id;
*************** package body Contracts is
*** 858,863 ****
--- 850,863 ----
              Check_External_Properties (Obj_Id, AR_Val, AW_Val, ER_Val, EW_Val);
           end if;
  
+          --  Analyze the non-external volatility property No_Caching
+ 
+          Prag := Get_Pragma (Obj_Id, Pragma_No_Caching);
+ 
+          if Present (Prag) then
+             Analyze_External_Property_In_Decl_Part (Prag, NC_Val);
+          end if;
+ 
           --  The anonymous object created for a single concurrent type carries
           --  pragmas Depends and Globat of the type.
  
*************** package body Contracts is
*** 1305,1794 ****
        Restore_SPARK_Mode (Saved_SM, Saved_SMP);
     end Analyze_Task_Contract;
  
-    -------------------------------------------------
-    -- Build_And_Analyze_Contract_Only_Subprograms --
-    -------------------------------------------------
- 
-    procedure Build_And_Analyze_Contract_Only_Subprograms (L : List_Id) is
-       procedure Analyze_Contract_Only_Subprograms;
-       --  Analyze the contract-only subprograms of L
- 
-       procedure Append_Contract_Only_Subprograms (Subp_List : List_Id);
-       --  Append the contract-only bodies of Subp_List to its declarations list
- 
-       function Build_Contract_Only_Subprogram (E : Entity_Id) return Node_Id;
-       --  If E is an entity for a non-imported subprogram specification with
-       --  pre/postconditions and we are compiling with CodePeer mode, then
-       --  this procedure will create a wrapper to help Gnat2scil process its
-       --  contracts. Return Empty if the wrapper cannot be built.
- 
-       function Build_Contract_Only_Subprograms (L : List_Id) return List_Id;
-       --  Build the contract-only subprograms of all eligible subprograms found
-       --  in list L.
- 
-       function Has_Private_Declarations (N : Node_Id) return Boolean;
-       --  Return True for package specs, task definitions, and protected type
-       --  definitions whose list of private declarations is not empty.
- 
-       ---------------------------------------
-       -- Analyze_Contract_Only_Subprograms --
-       ---------------------------------------
- 
-       procedure Analyze_Contract_Only_Subprograms is
-          procedure Analyze_Contract_Only_Bodies;
-          --  Analyze all the contract-only bodies of L
- 
-          ----------------------------------
-          -- Analyze_Contract_Only_Bodies --
-          ----------------------------------
- 
-          procedure Analyze_Contract_Only_Bodies is
-             Decl : Node_Id;
- 
-          begin
-             Decl := First (L);
-             while Present (Decl) loop
-                if Nkind (Decl) = N_Subprogram_Body
-                  and then Is_Contract_Only_Body
-                             (Defining_Unit_Name (Specification (Decl)))
-                then
-                   Analyze (Decl);
-                end if;
- 
-                Next (Decl);
-             end loop;
-          end Analyze_Contract_Only_Bodies;
- 
-       --  Start of processing for Analyze_Contract_Only_Subprograms
- 
-       begin
-          if Ekind (Current_Scope) /= E_Package then
-             Analyze_Contract_Only_Bodies;
- 
-          else
-             declare
-                Pkg_Spec : constant Node_Id :=
-                             Package_Specification (Current_Scope);
- 
-             begin
-                if not Has_Private_Declarations (Pkg_Spec) then
-                   Analyze_Contract_Only_Bodies;
- 
-                --  For packages with private declarations, the contract-only
-                --  bodies of subprograms defined in the visible part of the
-                --  package are added to its private declarations (to ensure
-                --  that they do not cause premature freezing of types and also
-                --  that they are analyzed with proper visibility). Hence they
-                --  will be analyzed later.
- 
-                elsif Visible_Declarations (Pkg_Spec) = L then
-                   null;
- 
-                elsif Private_Declarations (Pkg_Spec) = L then
-                   Analyze_Contract_Only_Bodies;
-                end if;
-             end;
-          end if;
-       end Analyze_Contract_Only_Subprograms;
- 
-       --------------------------------------
-       -- Append_Contract_Only_Subprograms --
-       --------------------------------------
- 
-       procedure Append_Contract_Only_Subprograms (Subp_List : List_Id) is
-       begin
-          if No (Subp_List) then
-             return;
-          end if;
- 
-          if Ekind (Current_Scope) /= E_Package then
-             Append_List (Subp_List, To => L);
- 
-          else
-             declare
-                Pkg_Spec : constant Node_Id :=
-                             Package_Specification (Current_Scope);
- 
-             begin
-                if not Has_Private_Declarations (Pkg_Spec) then
-                   Append_List (Subp_List, To => L);
- 
-                --  If the package has private declarations then append them to
-                --  its private declarations; they will be analyzed when the
-                --  contracts of its private declarations are analyzed.
- 
-                else
-                   Append_List
-                     (List => Subp_List,
-                      To   => Private_Declarations (Pkg_Spec));
-                end if;
-             end;
-          end if;
-       end Append_Contract_Only_Subprograms;
- 
-       ------------------------------------
-       -- Build_Contract_Only_Subprogram --
-       ------------------------------------
- 
-       --  This procedure takes care of building a wrapper to generate better
-       --  analysis results in the case of a call to a subprogram whose body
-       --  is unavailable to CodePeer but whose specification includes Pre/Post
-       --  conditions. The body might be unavailable for any of a number or
-       --  reasons (it is imported, the .adb file is simply missing, or the
-       --  subprogram might be subject to an Annotate (CodePeer, Skip_Analysis)
-       --  pragma). The built subprogram has the following contents:
-       --    * check preconditions
-       --    * call the subprogram
-       --    * check postconditions
- 
-       function Build_Contract_Only_Subprogram (E : Entity_Id) return Node_Id is
-          Loc : constant Source_Ptr := Sloc (E);
- 
-          Missing_Body_Name : constant Name_Id :=
-                                New_External_Name (Chars (E), "__missing_body");
- 
-          function Build_Missing_Body_Decls return List_Id;
-          --  Build the declaration of the missing body subprogram and its
-          --  corresponding pragma Import.
- 
-          function Build_Missing_Body_Subprogram_Call return Node_Id;
-          --  Build the call to the missing body subprogram
- 
-          function Skip_Contract_Only_Subprogram (E : Entity_Id) return Boolean;
-          --  Return True for cases where the wrapper is not needed or we cannot
-          --  build it.
- 
-          ------------------------------
-          -- Build_Missing_Body_Decls --
-          ------------------------------
- 
-          function Build_Missing_Body_Decls return List_Id is
-             Spec : constant Node_Id := Declaration_Node (E);
-             Decl : Node_Id;
-             Prag : Node_Id;
- 
-          begin
-             Decl :=
-               Make_Subprogram_Declaration (Loc, Copy_Subprogram_Spec (Spec));
-             Set_Chars (Defining_Entity (Decl), Missing_Body_Name);
- 
-             Prag :=
-               Make_Pragma (Loc,
-                 Chars                        => Name_Import,
-                 Pragma_Argument_Associations => New_List (
-                   Make_Pragma_Argument_Association (Loc,
-                     Expression => Make_Identifier (Loc, Name_Ada)),
- 
-                   Make_Pragma_Argument_Association (Loc,
-                     Expression => Make_Identifier (Loc, Missing_Body_Name))));
- 
-             return New_List (Decl, Prag);
-          end Build_Missing_Body_Decls;
- 
-          ----------------------------------------
-          -- Build_Missing_Body_Subprogram_Call --
-          ----------------------------------------
- 
-          function Build_Missing_Body_Subprogram_Call return Node_Id is
-             Forml : Entity_Id;
-             Parms : List_Id;
- 
-          begin
-             Parms := New_List;
- 
-             --  Build parameter list that we need
- 
-             Forml := First_Formal (E);
-             while Present (Forml) loop
-                Append_To (Parms, Make_Identifier (Loc, Chars (Forml)));
-                Next_Formal (Forml);
-             end loop;
- 
-             --  Build the call to the missing body subprogram
- 
-             if Ekind_In (E, E_Function, E_Generic_Function) then
-                return
-                  Make_Simple_Return_Statement (Loc,
-                    Expression =>
-                      Make_Function_Call (Loc,
-                        Name                   =>
-                          Make_Identifier (Loc, Missing_Body_Name),
-                        Parameter_Associations => Parms));
- 
-             else
-                return
-                  Make_Procedure_Call_Statement (Loc,
-                    Name                   =>
-                      Make_Identifier (Loc, Missing_Body_Name),
-                    Parameter_Associations => Parms);
-             end if;
-          end Build_Missing_Body_Subprogram_Call;
- 
-          -----------------------------------
-          -- Skip_Contract_Only_Subprogram --
-          -----------------------------------
- 
-          function Skip_Contract_Only_Subprogram
-            (E : Entity_Id) return Boolean
-          is
-             function Depends_On_Enclosing_Private_Type return Boolean;
-             --  Return True if some formal of E (or its return type) are
-             --  private types defined in an enclosing package.
- 
-             function Some_Enclosing_Package_Has_Private_Decls return Boolean;
-             --  Return True if some enclosing package of the current scope has
-             --  private declarations.
- 
-             ---------------------------------------
-             -- Depends_On_Enclosing_Private_Type --
-             ---------------------------------------
- 
-             function Depends_On_Enclosing_Private_Type return Boolean is
-                function Defined_In_Enclosing_Package
-                  (Typ : Entity_Id) return Boolean;
-                --  Return True if Typ is an entity defined in an enclosing
-                --  package of the current scope.
- 
-                ----------------------------------
-                -- Defined_In_Enclosing_Package --
-                ----------------------------------
- 
-                function Defined_In_Enclosing_Package
-                  (Typ : Entity_Id) return Boolean
-                is
-                   Scop : Entity_Id := Scope (Current_Scope);
- 
-                begin
-                   while Scop /= Scope (Typ)
-                     and then not Is_Compilation_Unit (Scop)
-                   loop
-                      Scop := Scope (Scop);
-                   end loop;
- 
-                   return Scop = Scope (Typ);
-                end Defined_In_Enclosing_Package;
- 
-                --  Local variables
- 
-                Param_E : Entity_Id;
-                Typ     : Entity_Id;
- 
-             --  Start of processing for Depends_On_Enclosing_Private_Type
- 
-             begin
-                Param_E := First_Entity (E);
-                while Present (Param_E) loop
-                   Typ := Etype (Param_E);
- 
-                   if Is_Private_Type (Typ)
-                     and then Defined_In_Enclosing_Package (Typ)
-                   then
-                      return True;
-                   end if;
- 
-                   Next_Entity (Param_E);
-                end loop;
- 
-                return
-                  Ekind (E) = E_Function
-                    and then Is_Private_Type (Etype (E))
-                    and then Defined_In_Enclosing_Package (Etype (E));
-             end Depends_On_Enclosing_Private_Type;
- 
-             ----------------------------------------------
-             -- Some_Enclosing_Package_Has_Private_Decls --
-             ----------------------------------------------
- 
-             function Some_Enclosing_Package_Has_Private_Decls return Boolean is
-                Scop     : Entity_Id := Current_Scope;
-                Pkg_Spec : Node_Id   := Package_Specification (Scop);
- 
-             begin
-                loop
-                   if Ekind (Scop) = E_Package
-                     and then Has_Private_Declarations
-                                (Package_Specification (Scop))
-                   then
-                      Pkg_Spec := Package_Specification (Scop);
-                   end if;
- 
-                   exit when Is_Compilation_Unit (Scop);
-                   Scop := Scope (Scop);
-                end loop;
- 
-                return Pkg_Spec /= Package_Specification (Current_Scope);
-             end Some_Enclosing_Package_Has_Private_Decls;
- 
-          --  Start of processing for Skip_Contract_Only_Subprogram
- 
-          begin
-             if not CodePeer_Mode
-               or else Inside_A_Generic
-               or else not Is_Subprogram (E)
-               or else Is_Abstract_Subprogram (E)
-               or else Is_Imported (E)
-               or else No (Contract (E))
-               or else No (Pre_Post_Conditions (Contract (E)))
-               or else Is_Contract_Only_Body (E)
-               or else Convention (E) = Convention_Protected
-             then
-                return True;
- 
-             --  We do not support building the contract-only subprogram if E
-             --  is a subprogram declared in a nested package that has some
-             --  formal or return type depending on a private type defined in
-             --  an enclosing package.
- 
-             elsif Ekind (Current_Scope) = E_Package
-               and then Some_Enclosing_Package_Has_Private_Decls
-               and then Depends_On_Enclosing_Private_Type
-             then
-                if Debug_Flag_Dot_KK then
-                   declare
-                      Saved_Mode : constant Warning_Mode_Type := Warning_Mode;
- 
-                   begin
-                      --  Warnings are disabled by default under CodePeer_Mode
-                      --  (see switch-c). Enable them temporarily.
- 
-                      Warning_Mode := Normal;
-                      Error_Msg_N
-                        ("cannot generate contract-only subprogram?", E);
-                      Warning_Mode := Saved_Mode;
-                   end;
-                end if;
- 
-                return True;
-             end if;
- 
-             return False;
-          end Skip_Contract_Only_Subprogram;
- 
-       --  Start of processing for Build_Contract_Only_Subprogram
- 
-       begin
-          --  Test cases where the wrapper is not needed and cases where we
-          --  cannot build it.
- 
-          if Skip_Contract_Only_Subprogram (E) then
-             return Empty;
-          end if;
- 
-          --  Note on calls to Copy_Separate_Tree. The trees we are copying
-          --  here are fully analyzed, but we definitely want fully syntactic
-          --  unanalyzed trees in the body we construct, so that the analysis
-          --  generates the right visibility, and that is exactly what the
-          --  calls to Copy_Separate_Tree give us.
- 
-          declare
-             Name : constant Name_Id :=
-                      New_External_Name (Chars (E), "__contract_only");
-             Id   : Entity_Id;
-             Bod  : Node_Id;
- 
-          begin
-             Bod :=
-               Make_Subprogram_Body (Loc,
-                 Specification              =>
-                   Copy_Subprogram_Spec (Declaration_Node (E)),
-                 Declarations               =>
-                   Build_Missing_Body_Decls,
-                 Handled_Statement_Sequence =>
-                   Make_Handled_Sequence_Of_Statements (Loc,
-                     Statements => New_List (
-                       Build_Missing_Body_Subprogram_Call),
-                     End_Label  => Make_Identifier (Loc, Name)));
- 
-             Id := Defining_Unit_Name (Specification (Bod));
- 
-             --  Copy only the pre/postconditions of the original contract
-             --  since it is what we need, but also because pragmas stored in
-             --  the other fields have N_Pragmas with N_Aspect_Specifications
-             --  that reference their associated pragma (thus causing an endless
-             --  loop when trying to copy the subtree).
- 
-             declare
-                New_Contract : constant Node_Id := Make_Contract (Sloc (E));
- 
-             begin
-                Set_Pre_Post_Conditions (New_Contract,
-                  Copy_Separate_Tree (Pre_Post_Conditions (Contract (E))));
-                Set_Contract (Id, New_Contract);
-             end;
- 
-             --  Fix the name of this new subprogram and link the original
-             --  subprogram with its Contract_Only_Body subprogram.
- 
-             Set_Chars (Id, Name);
-             Set_Is_Contract_Only_Body (Id);
-             Set_Contract_Only_Body (E, Id);
- 
-             return Bod;
-          end;
-       end Build_Contract_Only_Subprogram;
- 
-       -------------------------------------
-       -- Build_Contract_Only_Subprograms --
-       -------------------------------------
- 
-       function Build_Contract_Only_Subprograms (L : List_Id) return List_Id is
-          Decl     : Node_Id;
-          New_Subp : Node_Id;
-          Result   : List_Id := No_List;
-          Subp_Id  : Entity_Id;
- 
-       begin
-          Decl := First (L);
-          while Present (Decl) loop
-             if Nkind (Decl) = N_Subprogram_Declaration then
-                Subp_Id  := Defining_Unit_Name (Specification (Decl));
-                New_Subp := Build_Contract_Only_Subprogram (Subp_Id);
- 
-                if Present (New_Subp) then
-                   if No (Result) then
-                      Result := New_List;
-                   end if;
- 
-                   Append_To (Result, New_Subp);
-                end if;
-             end if;
- 
-             Next (Decl);
-          end loop;
- 
-          return Result;
-       end Build_Contract_Only_Subprograms;
- 
-       ------------------------------
-       -- Has_Private_Declarations --
-       ------------------------------
- 
-       function Has_Private_Declarations (N : Node_Id) return Boolean is
-       begin
-          if not Nkind_In (N, N_Package_Specification,
-                              N_Protected_Definition,
-                              N_Task_Definition)
-          then
-             return False;
-          else
-             return
-               Present (Private_Declarations (N))
-                 and then Is_Non_Empty_List (Private_Declarations (N));
-          end if;
-       end Has_Private_Declarations;
- 
-       --  Local variables
- 
-       Subp_List : List_Id;
- 
-    --  Start of processing for Build_And_Analyze_Contract_Only_Subprograms
- 
-    begin
-       Subp_List := Build_Contract_Only_Subprograms (L);
-       Append_Contract_Only_Subprograms (Subp_List);
-       Analyze_Contract_Only_Subprograms;
-    end Build_And_Analyze_Contract_Only_Subprograms;
- 
     -----------------------------
     -- Create_Generic_Contract --
     -----------------------------
--- 1305,1310 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/contracts.ads gcc-10.1.0/gcc/ada/contracts.ads
*** gcc-9.3.0/gcc/ada/contracts.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/contracts.ads	Thu May  7 10:49:59 2020
*************** package Contracts is
*** 50,55 ****
--- 50,56 ----
     --    Initial_Condition
     --    Initializes
     --    Interrupt_Handler
+    --    No_Caching
     --    Part_Of
     --    Postcondition
     --    Precondition
diff -Nrcpad gcc-9.3.0/gcc/ada/cstand.adb gcc-10.1.0/gcc/ada/cstand.adb
*** gcc-9.3.0/gcc/ada/cstand.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/cstand.adb	Thu May  7 10:49:59 2020
*************** package body CStand is
*** 717,722 ****
--- 717,723 ----
  
        Build_Signed_Integer_Type
          (Standard_Short_Short_Integer, Standard_Short_Short_Integer_Size);
+       Set_Is_Implementation_Defined (Standard_Short_Short_Integer);
  
        Build_Signed_Integer_Type
          (Standard_Short_Integer, Standard_Short_Integer_Size);
*************** package body CStand is
*** 734,740 ****
  
        Create_Unconstrained_Base_Type
          (Standard_Short_Short_Integer, E_Signed_Integer_Subtype);
-       Set_Is_Implementation_Defined (Standard_Short_Short_Integer);
  
        Create_Unconstrained_Base_Type
          (Standard_Short_Integer, E_Signed_Integer_Subtype);
--- 735,740 ----
*************** package body CStand is
*** 747,753 ****
  
        Create_Unconstrained_Base_Type
          (Standard_Long_Long_Integer, E_Signed_Integer_Subtype);
-       Set_Is_Implementation_Defined (Standard_Short_Short_Integer);
  
        Create_Float_Types;
  
--- 747,752 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/cstreams.c gcc-10.1.0/gcc/ada/cstreams.c
*** gcc-9.3.0/gcc/ada/cstreams.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/cstreams.c	Thu May  7 10:49:59 2020
***************
*** 53,61 ****
  #endif
  
  #ifdef IN_RTS
! #include "tconfig.h"
! #include "tsystem.h"
! #include <sys/stat.h>
  #else
  #include "config.h"
  #include "system.h"
--- 53,59 ----
  #endif
  
  #ifdef IN_RTS
! #include <string.h>
  #else
  #include "config.h"
  #include "system.h"
diff -Nrcpad gcc-9.3.0/gcc/ada/ctrl_c.c gcc-10.1.0/gcc/ada/ctrl_c.c
*** gcc-9.3.0/gcc/ada/ctrl_c.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/ctrl_c.c	Thu May  7 10:49:59 2020
***************
*** 29,39 ****
   *                                                                          *
   ****************************************************************************/
  
! #ifdef IN_RTS
! #include "tconfig.h"
! #include "tsystem.h"
! #include <sys/stat.h>
! #else
  #include "config.h"
  #include "system.h"
  #endif
--- 29,35 ----
   *                                                                          *
   ****************************************************************************/
  
! #ifndef IN_RTS
  #include "config.h"
  #include "system.h"
  #endif
diff -Nrcpad gcc-9.3.0/gcc/ada/debug.adb gcc-10.1.0/gcc/ada/debug.adb
*** gcc-9.3.0/gcc/ada/debug.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/debug.adb	Thu May  7 10:49:59 2020
*************** package body Debug is
*** 128,134 ****
     --  d.H  GNSA mode for ASIS
     --  d.I  Do not ignore enum representation clauses in CodePeer mode
     --  d.J  Relaxed rules for pragma No_Return
!    --  d.K  Enable generation of contract-only procedures in CodePeer mode
     --  d.L  Depend on back end for limited types in if and case expressions
     --  d.M  Relaxed RM semantics
     --  d.N  Add node to all entities
--- 128,134 ----
     --  d.H  GNSA mode for ASIS
     --  d.I  Do not ignore enum representation clauses in CodePeer mode
     --  d.J  Relaxed rules for pragma No_Return
!    --  d.K
     --  d.L  Depend on back end for limited types in if and case expressions
     --  d.M  Relaxed RM semantics
     --  d.N  Add node to all entities
*************** package body Debug is
*** 154,160 ****
     --  d_g
     --  d_h
     --  d_i  Ignore activations and calls to instances for elaboration
!    --  d_j
     --  d_k
     --  d_l
     --  d_m
--- 154,160 ----
     --  d_g
     --  d_h
     --  d_i  Ignore activations and calls to instances for elaboration
!    --  d_j  Read JSON files and populate Repinfo tables (opposite of -gnatRjs)
     --  d_k
     --  d_l
     --  d_m
*************** package body Debug is
*** 177,188 ****
     --  d_C
     --  d_D
     --  d_E
!    --  d_F
     --  d_G
     --  d_H
     --  d_I
     --  d_J
!    --  d_K
     --  d_L  Output trace information on elaboration checking
     --  d_M
     --  d_N
--- 177,188 ----
     --  d_C
     --  d_D
     --  d_E
!    --  d_F  Encode full invocation paths in ALI files
     --  d_G
     --  d_H
     --  d_I
     --  d_J
!    --  d_K  (Reserved) Enable reporting a warning on known-problem issues
     --  d_L  Output trace information on elaboration checking
     --  d_M
     --  d_N
*************** package body Debug is
*** 191,197 ****
     --  d_Q
     --  d_R
     --  d_S
!    --  d_T
     --  d_U
     --  d_V
     --  d_W
--- 191,197 ----
     --  d_Q
     --  d_R
     --  d_S
!    --  d_T  Output trace information on invocation path recording
     --  d_U
     --  d_V
     --  d_W
*************** package body Debug is
*** 258,263 ****
--- 258,418 ----
     --  dy
     --  dz
  
+    --  dA
+    --  dB
+    --  dC
+    --  dD
+    --  dE
+    --  dF
+    --  dG
+    --  dH
+    --  dI
+    --  dJ
+    --  dK
+    --  dL
+    --  dM
+    --  dN
+    --  dO
+    --  dP
+    --  dQ
+    --  dR
+    --  dS
+    --  dT
+    --  dU
+    --  dV
+    --  dW
+    --  dX
+    --  dY
+    --  dZ
+ 
+    --  d.a
+    --  d.b
+    --  d.c
+    --  d.d
+    --  d.e
+    --  d.f
+    --  d.g
+    --  d.h
+    --  d.i
+    --  d.j
+    --  d.k
+    --  d.l
+    --  d.m
+    --  d.n
+    --  d.o
+    --  d.p
+    --  d.q
+    --  d.r
+    --  d.s
+    --  d.t
+    --  d.u
+    --  d.v
+    --  d.w
+    --  d.x
+    --  d.y
+    --  d.z
+ 
+    --  d.A
+    --  d.B
+    --  d.C
+    --  d.D
+    --  d.E
+    --  d.F
+    --  d.G
+    --  d.H
+    --  d.I
+    --  d.J
+    --  d.K
+    --  d.L
+    --  d.M
+    --  d.N
+    --  d.O
+    --  d.P
+    --  d.Q
+    --  d.R
+    --  d.S
+    --  d.T
+    --  d.U
+    --  d.V
+    --  d.W
+    --  d.X
+    --  d.Y
+    --  d.Z
+ 
+    --  d.1
+    --  d.2
+    --  d.3
+    --  d.4
+    --  d.5
+    --  d.6
+    --  d.7
+    --  d.8
+    --  d.9
+ 
+    --  d_a  Ignore the effects of pragma Elaborate_All
+    --  d_b  Ignore the effects of pragma Elaborate_Body
+    --  d_c
+    --  d_d
+    --  d_e  Ignore the effects of pragma Elaborate
+    --  d_f
+    --  d_g
+    --  d_h
+    --  d_i
+    --  d_j
+    --  d_k
+    --  d_l
+    --  d_m
+    --  d_n
+    --  d_o
+    --  d_p
+    --  d_q
+    --  d_r
+    --  d_s
+    --  d_t  Output cycle-detection trace information
+    --  d_u
+    --  d_v
+    --  d_w
+    --  d_x
+    --  d_y
+    --  d_z
+ 
+    --  d_A  Output ALI invocation tables
+    --  d_B
+    --  d_C  Diagnose all cycles
+    --  d_D
+    --  d_E
+    --  d_F
+    --  d_G
+    --  d_H
+    --  d_I  Output invocation graph
+    --  d_J
+    --  d_K
+    --  d_L  Output library graph
+    --  d_M
+    --  d_N
+    --  d_O
+    --  d_P  Output cycle paths
+    --  d_Q
+    --  d_R
+    --  d_S  Output elaboration-order status
+    --  d_T  Output elaboration-order trace information
+    --  d_U
+    --  d_V  Validate bindo cycles, graphs, and order
+    --  d_W
+    --  d_X
+    --  d_Y
+    --  d_Z
+ 
+    --  d_1
+    --  d_2
+    --  d_3
+    --  d_4
+    --  d_5
+    --  d_6
+    --  d_7
+    --  d_8
+    --  d_9
+ 
     --  Debug flags used in package Make and its clients (e.g. GNATMAKE)
  
     --  da
*************** package body Debug is
*** 447,456 ****
     --  dE   Apply compile time elaboration checking for with relations between
     --       predefined units. Normally no checks are made.
  
!    --  dF   Perform the new SPARK checking rules for pointer aliasing. This is
!    --       only activated in GNATprove mode and on SPARK code. These rules are
!    --       not yet part of the official SPARK language, but are expected to be
!    --       included in a future version of SPARK.
  
     --  dG   Generate all warnings. Normally Errout suppresses warnings on
     --       units that are not part of the main extended source, and also
--- 602,612 ----
     --  dE   Apply compile time elaboration checking for with relations between
     --       predefined units. Normally no checks are made.
  
!    --  dF   Disable the new SPARK checking rules for pointer aliasing. This is
!    --       only activated as part of GNATprove mode and on SPARK code. Now
!    --       that pointer support is part of the official SPARK language, this
!    --       switch allows reverting to the previous version of GNATprove
!    --       rejecting pointers.
  
     --  dG   Generate all warnings. Normally Errout suppresses warnings on
     --       units that are not part of the main extended source, and also
*************** package body Debug is
*** 750,762 ****
     --       for that. If the procedure does in fact return normally, execution
     --       is erroneous, and therefore unpredictable.
  
-    --  d.K  Enable generation of contract-only procedures in CodePeer mode and
-    --       report a warning on subprograms for which the contract-only body
-    --       cannot be built. Currently reported on subprograms defined in
-    --       nested package specs that have some formal (or return type) whose
-    --       type is a private type defined in some enclosing package and that
-    --       have pre/postconditions.
- 
     --  d.L  Normally the front end generates special expansion for conditional
     --       expressions of a limited type. This debug flag removes this special
     --       case expansion, leaving it up to the back end to handle conditional
--- 906,911 ----
*************** package body Debug is
*** 840,845 ****
--- 989,998 ----
     --       subprogram or task type defined in an external instance for both
     --       the static and dynamic elaboration models.
  
+    --  d_j  The compiler reads JSON files that would be generated by the same
+    --       compilation session if -gnatRjs was passed, in order to populate
+    --       the internal tables of the Repinfo unit from them.
+ 
     --  d_p  The compiler ignores calls to subprograms which verify the run-time
     --       semantics of invariants and postconditions in both the static and
     --       dynamic elaboration models.
*************** package body Debug is
*** 850,860 ****
--- 1003,1023 ----
  
     --  d_A  Do not generate ALI files by setting Opt.Disable_ALI_File.
  
+    --  d_F  The compiler encodes the full path from an invocation construct to
+    --       an external target, offering additional information to GNATBIND for
+    --       purposes of error diagnostics.
+ 
+    --  d_K  (Reserved) Enable reporting a warning on known-problem issues of
+    --       previous releases. No action performed in the wavefront.
+ 
     --  d_L  Output trace information on elaboration checking. This debug switch
     --       causes output to be generated showing each call or instantiation as
     --       it is checked, and the progress of the recursive trace through
     --       elaboration calls at compile time.
  
+    --  d_T  The compiler outputs trance information to standard output whenever
+    --       an invocation path is recorded.
+ 
     --  d1   Error messages have node numbers where possible. Normally error
     --       messages have only source locations. This option is useful when
     --       debugging errors caused by expanded code, where the source location
*************** package body Debug is
*** 954,964 ****
     --      dependencies) except that internal units are included in the
     --      listing.
  
!    --  di  Normally gnatbind calls Read_Ali with Ignore_Errors set to
!    --      False, since the binder really needs correct version ALI
!    --      files to do its job. This debug flag causes Ignore_Errors
!    --      mode to be set for the binder (and is particularly useful
!    --      for testing ignore errors mode).
  
     --  dn  List details of manipulation of Num_Pred values during execution of
     --      the algorithm used to determine a correct order of elaboration. This
--- 1117,1126 ----
     --      dependencies) except that internal units are included in the
     --      listing.
  
!    --  di  Normally GNATBIND calls Read_Ali with Ignore_Errors set to False,
!    --      since the binder really needs correct version ALI files to do its
!    --      job. This debug flag causes Ignore_Errors mode to be set for the
!    --      binder (and is particularly useful for testing ignore errors mode).
  
     --  dn  List details of manipulation of Num_Pred values during execution of
     --      the algorithm used to determine a correct order of elaboration. This
*************** package body Debug is
*** 985,990 ****
--- 1147,1189 ----
     --  dx  Force the binder to read (and then ignore) the xref information
     --      in ali files (used to check that read circuit is working OK).
  
+    --  d_a  GNATBIND ignores the effects of pragma Elaborate_All in the case of
+    --       elaboration order and treats the associated dependency as a regular
+    --       with edge.
+ 
+    --  d_b  GNATBIND ignores the effects of pragma Elaborate_Body in the case
+    --       of elaboration order and treats the spec and body as decoupled.
+ 
+    --  d_e  GNATBIND ignores the effects of pragma Elaborate in the case of
+    --       elaboration order and no longer creates an implicit dependency on
+    --       the body of the argument.
+ 
+    --  d_t  GNATBIND output trace information of cycle-detection activities to
+    --       standard output.
+ 
+    --  d_A  GNATBIND output the contents of all ALI invocation-related tables
+    --       in textual format to standard output.
+ 
+    --  d_C  GNATBIND diagnoses all unique cycles within the bind, rather than
+    --       just the most important one.
+ 
+    --  d_I  GNATBIND outputs the contents of the invocation graph in textual
+    --       format to standard output.
+ 
+    --  d_L  GNATBIND outputs the contents of the library graph in textual
+    --       format to standard output.
+ 
+    --  d_P  GNATBIND outputs the cycle paths to standard output
+ 
+    --  d_S  GNATBIND outputs trace information concerning the status of its
+    --       various phases to standard output.
+ 
+    --  d_T  GNATBIND outputs trace information of elaboration order detection
+    --       activities to standard output.
+ 
+    --  d_V  GNATBIND validates the invocation graph, library graph along with
+    --       its cycles, and the elaboration order.
+ 
     --------------------------------------------
     -- Documentation for gnatmake Debug Flags --
     --------------------------------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/debug.ads gcc-10.1.0/gcc/ada/debug.ads
*** gcc-9.3.0/gcc/ada/debug.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/debug.ads	Thu May  7 10:49:59 2020
*************** package Debug is
*** 48,53 ****
--- 48,55 ----
     --  is contained in the body of Debug rather than the spec, so that we don't
     --  have to recompile the world when a new debug flag is added.
  
+    --  WARNING: There is a matching C declaration of a few flags in fe.h
+ 
     Debug_Flag_A : Boolean := False;
     Debug_Flag_B : Boolean := False;
     Debug_Flag_C : Boolean := False;
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/Makefile gcc-10.1.0/gcc/ada/doc/Makefile
*** gcc-9.3.0/gcc/ada/doc/Makefile	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/Makefile	Thu May  7 10:49:59 2020
*************** help:
*** 42,63 ****
  clean:
  	-rm -rf $(BUILDDIR)
  
! %.html:
  	$(SPHINXBUILD) -b html $(ALLSPHINXOPTS) $(BUILDDIR)/$*/html
  
! %.pdf:
  	$(SPHINXBUILD) -b latex $(ALLSPHINXOPTS) $(BUILDDIR)/$*/pdf
  	$(MAKE) -C $(BUILDDIR)/$*/pdf all-pdf LATEXOPTS="-interaction=nonstopmode"
  
! %.txt:
  	$(SPHINXBUILD) -b texinfo $(ALLSPHINXOPTS) $(BUILDDIR)/$*/txt
  	$(MAKE) -C $(BUILDDIR)/$*/txt plaintext
  
! %.info:
  	$(SPHINXBUILD) -b texinfo $(ALLSPHINXOPTS) $(BUILDDIR)/$*/info
  	$(MAKE) -C $(BUILDDIR)/$*/info info
  
! %.texinfo:
  	$(SPHINXBUILD) -b texinfo $(ALLSPHINXOPTS) $(BUILDDIR)/$*/texinfo
  	sed -e 's/^@dircategory/@dircategory GNU Ada Tools/g' < $(BUILDDIR)/$*/texinfo/$*.texi > $(BUILDDIR)/../../$*.texi
  
--- 42,67 ----
  clean:
  	-rm -rf $(BUILDDIR)
  
! .PHONY: mk_empty_dirs
! mk_empty_dirs:
! 	mkdir -p share/_static
! 
! %.html: mk_empty_dirs
  	$(SPHINXBUILD) -b html $(ALLSPHINXOPTS) $(BUILDDIR)/$*/html
  
! %.pdf: mk_empty_dirs
  	$(SPHINXBUILD) -b latex $(ALLSPHINXOPTS) $(BUILDDIR)/$*/pdf
  	$(MAKE) -C $(BUILDDIR)/$*/pdf all-pdf LATEXOPTS="-interaction=nonstopmode"
  
! %.txt: mk_empty_dirs
  	$(SPHINXBUILD) -b texinfo $(ALLSPHINXOPTS) $(BUILDDIR)/$*/txt
  	$(MAKE) -C $(BUILDDIR)/$*/txt plaintext
  
! %.info: mk_empty_dirs
  	$(SPHINXBUILD) -b texinfo $(ALLSPHINXOPTS) $(BUILDDIR)/$*/info
  	$(MAKE) -C $(BUILDDIR)/$*/info info
  
! %.texinfo: mk_empty_dirs
  	$(SPHINXBUILD) -b texinfo $(ALLSPHINXOPTS) $(BUILDDIR)/$*/texinfo
  	sed -e 's/^@dircategory/@dircategory GNU Ada Tools/g' < $(BUILDDIR)/$*/texinfo/$*.texi > $(BUILDDIR)/../../$*.texi
  
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_rm/implementation_advice.rst gcc-10.1.0/gcc/ada/doc/gnat_rm/implementation_advice.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_rm/implementation_advice.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_rm/implementation_advice.rst	Thu May  7 10:49:59 2020
*************** Followed.
*** 703,725 ****
  
  .. index:: Stream oriented attributes
  
! RM 13.13.2(17): Stream Oriented Attributes
! ==========================================
  
!   "If a stream element is the same size as a storage element, then the
!   normal in-memory representation should be used by ``Read`` and
!   ``Write`` for scalar objects.  Otherwise, ``Read`` and ``Write``
!   should use the smallest number of stream elements needed to represent
!   all values in the base range of the scalar type."
  
- Followed.  By default, GNAT uses the interpretation suggested by AI-195,
- which specifies using the size of the first subtype.
  However, such an implementation is based on direct binary
! representations and is therefore target- and endianness-dependent.
! To address this issue, GNAT also supplies an alternate implementation
! of the stream attributes ``Read`` and ``Write``,
! which uses the target-independent XDR standard representation
! for scalar types.
  
  .. index:: XDR representation
  
--- 703,725 ----
  
  .. index:: Stream oriented attributes
  
! RM 13.13.2(1.6): Stream Oriented Attributes
! ===========================================
  
!   "If not specified, the value of Stream_Size for an elementary type
!   should be the number of bits that corresponds to the minimum number of
!   stream elements required by the first subtype of the type, rounded up
!   to the nearest factor or multiple of the word size that is also a
!   multiple of the stream element size."
! 
! Followed, except that the number of stream elements is a power of 2.
! The Stream_Size may be used to override the default choice.
  
  However, such an implementation is based on direct binary
! representations and is therefore target- and endianness-dependent.  To
! address this issue, GNAT also supplies an alternate implementation of
! the stream attributes ``Read`` and ``Write``, which uses the
! target-independent XDR standard representation for scalar types.
  
  .. index:: XDR representation
  
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_rm/implementation_defined_aspects.rst gcc-10.1.0/gcc/ada/doc/gnat_rm/implementation_defined_aspects.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_rm/implementation_defined_aspects.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_rm/implementation_defined_aspects.rst	Thu May  7 10:49:59 2020
*************** Aspect Max_Queue_Length
*** 370,375 ****
--- 370,381 ----
  
  This aspect is equivalent to :ref:`pragma Max_Queue_Length<Pragma-Max_Queue_Length>`.
  
+ Aspect No_Caching
+ =================
+ .. index:: No_Caching
+ 
+ This boolean aspect is equivalent to :ref:`pragma No_Caching<Pragma-No_Caching>`.
+ 
  Aspect No_Elaboration_Code_All
  ==============================
  .. index:: No_Elaboration_Code_All
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_rm/implementation_defined_attributes.rst gcc-10.1.0/gcc/ada/doc/gnat_rm/implementation_defined_attributes.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_rm/implementation_defined_attributes.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_rm/implementation_defined_attributes.rst	Thu May  7 10:49:59 2020
*************** Attribute Img
*** 479,495 ****
  =============
  .. index:: Img
  
! The ``Img`` attribute differs from ``Image`` in that it is applied
! directly to an object, and yields the same result as
! ``Image`` for the subtype of the object.  This is convenient for
! debugging:
  
  .. code-block:: ada
  
    Put_Line ("X = " & X'Img);
  
  
! has the same meaning as the more verbose:
  
  .. code-block:: ada
  
--- 479,495 ----
  =============
  .. index:: Img
  
! The ``Img`` attribute differs from ``Image`` in that, while both can be
! applied directly to an object, ``Img`` cannot be applied to types.
! 
! Example usage of the attribute:
  
  .. code-block:: ada
  
    Put_Line ("X = " & X'Img);
  
  
! which has the same meaning as the more verbose:
  
  .. code-block:: ada
  
*************** of the use of this feature:
*** 967,974 ****
       --  the former is used.
  
  
! Other properties are as for standard representation attribute ``Bit_Order``,
! as defined by Ada RM 13.5.3(4). The default is ``System.Default_Bit_Order``.
  
  For a record type ``T``, if ``T'Scalar_Storage_Order`` is
  specified explicitly, it shall be equal to ``T'Bit_Order``. Note:
--- 967,974 ----
       --  the former is used.
  
  
! Other properties are as for the standard representation attribute ``Bit_Order``
! defined by Ada RM 13.5.3(4). The default is ``System.Default_Bit_Order``.
  
  For a record type ``T``, if ``T'Scalar_Storage_Order`` is
  specified explicitly, it shall be equal to ``T'Bit_Order``. Note:
*************** specified explicitly and set to the same
*** 978,985 ****
  
  Derived types inherit an explicitly set scalar storage order from their parent
  types. This may be overridden for the derived type by giving an explicit scalar
! storage order for the derived type. For a record extension, the derived type
! must have the same scalar storage order as the parent type.
  
  A component of a record type that is itself a record or an array and that does
  not start and end on a byte boundary must have have the same scalar storage
--- 978,985 ----
  
  Derived types inherit an explicitly set scalar storage order from their parent
  types. This may be overridden for the derived type by giving an explicit scalar
! storage order for it. However, for a record extension, the derived type must
! have the same scalar storage order as the parent type.
  
  A component of a record type that is itself a record or an array and that does
  not start and end on a byte boundary must have have the same scalar storage
*************** inheritance in the case of a derived typ
*** 1018,1032 ****
  the native ordering of the target, but this default can be overridden using
  pragma ``Default_Scalar_Storage_Order``.
  
! Note that if a component of ``T`` is itself of a record or array type,
! the specfied ``Scalar_Storage_Order`` does *not* apply to that nested type:
! an explicit attribute definition clause must be provided for the component
! type as well if desired.
  
  Note that the scalar storage order only affects the in-memory data
  representation. It has no effect on the representation used by stream
  attributes.
  
  .. _Attribute_Simple_Storage_Pool:
  
  Attribute Simple_Storage_Pool
--- 1018,1035 ----
  the native ordering of the target, but this default can be overridden using
  pragma ``Default_Scalar_Storage_Order``.
  
! If a component of ``T`` is itself of a record or array type, the specfied
! ``Scalar_Storage_Order`` does *not* apply to that nested type: an explicit
! attribute definition clause must be provided for the component type as well
! if desired.
  
  Note that the scalar storage order only affects the in-memory data
  representation. It has no effect on the representation used by stream
  attributes.
  
+ Note that debuggers may be unable to display the correct value of scalar
+ components of a type for which the opposite storage order is specified.
+ 
  .. _Attribute_Simple_Storage_Pool:
  
  Attribute Simple_Storage_Pool
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_rm/implementation_defined_characteristics.rst gcc-10.1.0/gcc/ada/doc/gnat_rm/implementation_defined_characteristics.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_rm/implementation_defined_characteristics.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_rm/implementation_defined_characteristics.rst	Thu May  7 10:49:59 2020
*************** Convention Name         Interpretation
*** 772,780 ****
                          be present at all.  This convention is useful during development for the
                          inclusion of subprograms whose body has not yet been written.
                          In addition, all otherwise unrecognized convention names are also
!                         treated as being synonymous with convention C.  In all implementations
!                         except for VMS, use of such other names results in a warning.  In VMS
!                         implementations, these names are accepted silently.
  ======================= ==============================================================================
  
  *
--- 772,779 ----
                          be present at all.  This convention is useful during development for the
                          inclusion of subprograms whose body has not yet been written.
                          In addition, all otherwise unrecognized convention names are also
!                         treated as being synonymous with convention C.  In all implementations,
!                         use of such other names results in a warning.
  ======================= ==============================================================================
  
  *
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst gcc-10.1.0/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst	Thu May  7 10:49:59 2020
*************** Syntax:
*** 371,376 ****
--- 371,391 ----
  This configuration pragma is a synonym for pragma Ada_12 and has the
  same syntax and effect.
  
+ Pragma Aggregate_Individually_Assign
+ ====================================
+ 
+ Syntax:
+ 
+ .. code-block:: ada
+ 
+   pragma Aggregate_Individually_Assign;
+ 
+ Where possible, GNAT will store the binary representation of a record aggregate
+ in memory for space and performance reasons. This configuration pragma changes
+ this behavior so that record aggregates are instead always converted into
+ individual assignment statements.
+ 
+ 
  Pragma Allow_Integer_Address
  ============================
  
*************** not otherwise analyze it. The second opt
*** 440,446 ****
  unanalyzed, and by convention is used to control the action of the tool to
  which the annotation is addressed.  The remaining ARG arguments
  can be either string literals or more generally expressions.
! String literals are assumed to be either of type
  ``Standard.String`` or else ``Wide_String`` or ``Wide_Wide_String``
  depending on the character literals they contain.
  All other kinds of arguments are analyzed as expressions, and must be
--- 455,462 ----
  unanalyzed, and by convention is used to control the action of the tool to
  which the annotation is addressed.  The remaining ARG arguments
  can be either string literals or more generally expressions.
! String literals (and concatenations of string literals) are assumed to be
! either of type
  ``Standard.String`` or else ``Wide_String`` or ``Wide_Wide_String``
  depending on the character literals they contain.
  All other kinds of arguments are analyzed as expressions, and must be
*************** Syntax:
*** 719,725 ****
  
  .. code-block:: ada
  
!   pragma Asynch_Readers [ (boolean_EXPRESSION) ];
  
  For the semantics of this pragma, see the entry for aspect ``Async_Readers`` in
  the SPARK 2014 Reference Manual, section 7.1.2.
--- 735,741 ----
  
  .. code-block:: ada
  
!   pragma Async_Readers [ (boolean_EXPRESSION) ];
  
  For the semantics of this pragma, see the entry for aspect ``Async_Readers`` in
  the SPARK 2014 Reference Manual, section 7.1.2.
*************** Syntax:
*** 733,739 ****
  
  .. code-block:: ada
  
!   pragma Asynch_Writers [ (boolean_EXPRESSION) ];
  
  For the semantics of this pragma, see the entry for aspect ``Async_Writers`` in
  the SPARK 2014 Reference Manual, section 7.1.2.
--- 749,755 ----
  
  .. code-block:: ada
  
!   pragma Async_Writers [ (boolean_EXPRESSION) ];
  
  For the semantics of this pragma, see the entry for aspect ``Async_Writers`` in
  the SPARK 2014 Reference Manual, section 7.1.2.
*************** are equivalent to
*** 1328,1334 ****
  The precondition ensures that one and only one of the case guards is
  satisfied on entry to the subprogram.
  The postcondition ensures that for the case guard that was True on entry,
! the corrresponding consequence is True on exit. Other consequence expressions
  are not evaluated.
  
  A precondition ``P`` and postcondition ``Q`` can also be
--- 1344,1350 ----
  The precondition ensures that one and only one of the case guards is
  satisfied on entry to the subprogram.
  The postcondition ensures that for the case guard that was True on entry,
! the corresponding consequence is True on exit. Other consequence expressions
  are not evaluated.
  
  A precondition ``P`` and postcondition ``Q`` can also be
*************** with Import and Export pragmas.  There a
*** 2432,2438 ****
    ``As_Is`` provides the normal default behavior in which the casing is
    taken from the string provided.
  
! This pragma may appear anywhere that a pragma is valid.  In particular, it
  can be used as a configuration pragma in the :file:`gnat.adc` file, in which
  case it applies to all subsequent compilations, or it can be used as a program
  unit pragma, in which case it only applies to the current unit, or it can
--- 2448,2454 ----
    ``As_Is`` provides the normal default behavior in which the casing is
    taken from the string provided.
  
! This pragma may appear anywhere that a pragma is valid. In particular, it
  can be used as a configuration pragma in the :file:`gnat.adc` file, in which
  case it applies to all subsequent compilations, or it can be used as a program
  unit pragma, in which case it only applies to the current unit, or it can
*************** Syntax:
*** 2999,3056 ****
  
  .. code-block:: ada
  
!   pragma Initialize_Scalars;
  
  
! This pragma is similar to ``Normalize_Scalars`` conceptually but has
! two important differences.  First, there is no requirement for the pragma
! to be used uniformly in all units of a partition, in particular, it is fine
! to use this just for some or all of the application units of a partition,
! without needing to recompile the run-time library.
  
- In the case where some units are compiled with the pragma, and some without,
- then a declaration of a variable where the type is defined in package
- Standard or is locally declared will always be subject to initialization,
- as will any declaration of a scalar variable.  For composite variables,
- whether the variable is initialized may also depend on whether the package
- in which the type of the variable is declared is compiled with the pragma.
  
! The other important difference is that you can control the value used
! for initializing scalar objects.  At bind time, you can select several
! options for initialization. You can
! initialize with invalid values (similar to Normalize_Scalars, though for
! Initialize_Scalars it is not always possible to determine the invalid
! values in complex cases like signed component fields with non-standard
! sizes). You can also initialize with high or
! low values, or with a specified bit pattern.  See the GNAT
! User's Guide for binder options for specifying these cases.
  
! This means that you can compile a program, and then without having to
! recompile the program, you can run it with different values being used
! for initializing otherwise uninitialized values, to test if your program
! behavior depends on the choice.  Of course the behavior should not change,
! and if it does, then most likely you have an incorrect reference to an
! uninitialized value.
  
! It is even possible to change the value at execution time eliminating even
! the need to rebind with a different switch using an environment variable.
! See the GNAT User's Guide for details.
  
! Note that pragma ``Initialize_Scalars`` is particularly useful in
! conjunction with the enhanced validity checking that is now provided
! in GNAT, which checks for invalid values under more conditions.
! Using this feature (see description of the *-gnatV* flag in the
! GNAT User's Guide) in conjunction with
! pragma ``Initialize_Scalars``
! provides a powerful new tool to assist in the detection of problems
! caused by uninitialized variables.
  
! Note: the use of ``Initialize_Scalars`` has a fairly extensive
! effect on the generated code. This may cause your code to be
! substantially larger. It may also cause an increase in the amount
! of stack required, so it is probably a good idea to turn on stack
! checking (see description of stack checking in the GNAT
! User's Guide) when using this pragma.
  
  .. _Pragma-Initializes:
  
--- 3015,3103 ----
  
  .. code-block:: ada
  
!   pragma Initialize_Scalars
!     [ ( TYPE_VALUE_PAIR {, TYPE_VALUE_PAIR} ) ];
  
+   TYPE_VALUE_PAIR ::=
+     SCALAR_TYPE => static_EXPRESSION
  
!   SCALAR_TYPE :=
!     Short_Float
!   | Float
!   | Long_Float
!   | Long_Long_Flat
!   | Signed_8
!   | Signed_16
!   | Signed_32
!   | Signed_64
!   | Unsigned_8
!   | Unsigned_16
!   | Unsigned_32
!   | Unsigned_64
  
  
! This pragma is similar to ``Normalize_Scalars`` conceptually but has two
! important differences.
  
! First, there is no requirement for the pragma to be used uniformly in all units
! of a partition. In particular, it is fine to use this just for some or all of
! the application units of a partition, without needing to recompile the run-time
! library. In the case where some units are compiled with the pragma, and some
! without, then a declaration of a variable where the type is defined in package
! Standard or is locally declared will always be subject to initialization, as
! will any declaration of a scalar variable. For composite variables, whether the
! variable is initialized may also depend on whether the package in which the
! type of the variable is declared is compiled with the pragma.
  
! The other important difference is that the programmer can control the value
! used for initializing scalar objects. This effect can be achieved in several
! different ways:
  
! * At compile time, the programmer can specify the invalid value for a
!   particular family of scalar types using the optional arguments of the pragma.
  
!   The compile-time approach is intended to optimize the generated code for the
!   pragma, by possibly using fast operations such as ``memset``. Note that such
!   optimizations require using values where the bytes all have the same binary
!   representation.
! 
! * At bind time, the programmer has several options:
! 
!   * Initialization with invalid values (similar to Normalize_Scalars, though
!     for Initialize_Scalars it is not always possible to determine the invalid
!     values in complex cases like signed component fields with nonstandard
!     sizes).
! 
!   * Initialization with high values.
! 
!   * Initialization with low values.
! 
!   * Initialization with a specific bit pattern.
! 
!   See the GNAT User's Guide for binder options for specifying these cases.
! 
!   The bind-time approach is intended to provide fast turnaround for testing
!   with different values, without having to recompile the program.
! 
! * At execution time, the programmer can specify the invalid values using an
!   environment variable. See the GNAT User's Guide for details.
! 
!   The execution-time approach is intended to provide fast turnaround for
!   testing with different values, without having to recompile and rebind the
!   program.
! 
! Note that pragma ``Initialize_Scalars`` is particularly useful in conjunction
! with the enhanced validity checking that is now provided in GNAT, which checks
! for invalid values under more conditions. Using this feature (see description
! of the *-gnatV* flag in the GNAT User's Guide) in conjunction with pragma
! ``Initialize_Scalars`` provides a powerful new tool to assist in the detection
! of problems caused by uninitialized variables.
! 
! Note: the use of ``Initialize_Scalars`` has a fairly extensive effect on the
! generated code. This may cause your code to be substantially larger. It may
! also cause an increase in the amount of stack required, so it is probably a
! good idea to turn on stack checking (see description of stack checking in the
! GNAT User's Guide) when using this pragma.
  
  .. _Pragma-Initializes:
  
*************** Ada exceptions, or used to implement run
*** 3210,3216 ****
  Pragma ``Interrupt_State`` provides a general mechanism for overriding
  such uses of interrupts.  It subsumes the functionality of pragma
  ``Unreserve_All_Interrupts``.  Pragma ``Interrupt_State`` is not
! available on Windows or VMS.  On all other platforms than VxWorks,
  it applies to signals; on VxWorks, it applies to vectored hardware interrupts
  and may be used to mark interrupts required by the board support package
  as reserved.
--- 3257,3263 ----
  Pragma ``Interrupt_State`` provides a general mechanism for overriding
  such uses of interrupts.  It subsumes the functionality of pragma
  ``Unreserve_All_Interrupts``.  Pragma ``Interrupt_State`` is not
! available on Windows.  On all other platforms than VxWorks,
  it applies to signals; on VxWorks, it applies to vectored hardware interrupts
  and may be used to mark interrupts required by the board support package
  as reserved.
*************** the implementation of protected operatio
*** 3620,3625 ****
--- 3667,3690 ----
  Compilation fails if the compiler cannot generate lock-free code for the
  operations.
  
+ The current conditions required to support this pragma are:
+ 
+ * Protected type declarations may not contain entries
+ * Protected subprogram declarations may not have nonelementary parameters
+ 
+ In addition, each protected subprogram body must satisfy:
+ 
+ * May reference only one protected component
+ * May not reference nonconstant entities outside the protected subprogram
+   scope.
+ * May not contain address representation items, allocators, or quantified
+   expressions.
+ * May not contain delay, goto, loop, or procedure-call statements.
+ * May not contain exported and imported entities
+ * May not dereferenced access values
+ * Function calls and attribute references must be static
+ 
+ 
  Pragma Loop_Invariant
  =====================
  
*************** Syntax:
*** 3766,3783 ****
    pragma Machine_Attribute (
         [Entity         =>] LOCAL_NAME,
         [Attribute_Name =>] static_string_EXPRESSION
!     [, [Info           =>] static_EXPRESSION] );
  
  
  Machine-dependent attributes can be specified for types and/or
  declarations.  This pragma is semantically equivalent to
  :samp:`__attribute__(({attribute_name}))` (if ``info`` is not
  specified) or :samp:`__attribute__(({attribute_name(info})))`
! in GNU C, where *attribute_name* is recognized by the
! compiler middle-end or the ``TARGET_ATTRIBUTE_TABLE`` machine
! specific macro.  A string literal for the optional parameter ``info``
! is transformed into an identifier, which may make this pragma unusable
! for some attributes.
  For further information see :title:`GNU Compiler Collection (GCC) Internals`.
  
  Pragma Main
--- 3831,3849 ----
    pragma Machine_Attribute (
         [Entity         =>] LOCAL_NAME,
         [Attribute_Name =>] static_string_EXPRESSION
!     [, [Info           =>] static_EXPRESSION {, static_EXPRESSION}] );
  
  
  Machine-dependent attributes can be specified for types and/or
  declarations.  This pragma is semantically equivalent to
  :samp:`__attribute__(({attribute_name}))` (if ``info`` is not
  specified) or :samp:`__attribute__(({attribute_name(info})))`
! or :samp:`__attribute__(({attribute_name(info,...})))` in GNU C,
! where *attribute_name* is recognized by the compiler middle-end
! or the ``TARGET_ATTRIBUTE_TABLE`` machine specific macro.  Note
! that a string literal for the optional parameter ``info`` or the
! following ones is transformed by default into an identifier,
! which may make this pragma unusable for some attributes.
  For further information see :title:`GNU Compiler Collection (GCC) Internals`.
  
  Pragma Main
*************** Syntax::
*** 3825,3832 ****
  
  This pragma is used to specify the maximum callers per entry queue for
  individual protected entries and entry families. It accepts a single
! positive integer as a parameter and must appear after the declaration
! of an entry.
  
  Pragma No_Body
  ==============
--- 3891,3900 ----
  
  This pragma is used to specify the maximum callers per entry queue for
  individual protected entries and entry families. It accepts a single
! integer (-1 or more) as a parameter and must appear after the declaration of an
! entry.
! 
! A value of -1 represents no additional restriction on queue length.
  
  Pragma No_Body
  ==============
*************** such a way that a body needed before is
*** 3851,3856 ****
--- 3919,3938 ----
  dummy body with a No_Body pragma ensures that there is no interference from
  earlier versions of the package body.
  
+ .. _Pragma-No_Caching:
+ 
+ Pragma No_Caching
+ =================
+ 
+ Syntax:
+ 
+ .. code-block:: ada
+ 
+   pragma No_Caching [ (boolean_EXPRESSION) ];
+ 
+ For the semantics of this pragma, see the entry for aspect ``No_Caching`` in
+ the SPARK 2014 Reference Manual, section 7.1.2.
+ 
  Pragma No_Component_Reordering
  ==============================
  
*************** Note that in Ada 2005 mode, this pragma
*** 3970,3991 ****
  available in all earlier versions of Ada as an implementation-defined
  pragma.
  
- Pragma No_Run_Time
- ==================
- 
- Syntax:
- 
- 
- .. code-block:: ada
- 
-   pragma No_Run_Time;
- 
- 
- This is an obsolete configuration pragma that historically was used to
- set up a runtime library with no object code. It is now used only for
- internal testing. The pragma has been superseded by the reconfigurable
- runtime capability of GNAT.
- 
  Pragma No_Strict_Aliasing
  =========================
  
--- 4052,4057 ----
*************** usually supplied automatically by the pr
*** 6116,6122 ****
  Source_File_Name cannot appear after a :ref:`Pragma_Source_File_Name_Project`.
  
  For more details on the use of the ``Source_File_Name`` pragma, see the
! sections on ``Using Other File Names`` and `Alternative File Naming Schemes'
  in the :title:`GNAT User's Guide`.
  
  ..  _Pragma_Source_File_Name_Project:
--- 6182,6188 ----
  Source_File_Name cannot appear after a :ref:`Pragma_Source_File_Name_Project`.
  
  For more details on the use of the ``Source_File_Name`` pragma, see the
! sections on `Using Other File Names` and `Alternative File Naming Schemes`
  in the :title:`GNAT User's Guide`.
  
  ..  _Pragma_Source_File_Name_Project:
*************** methods can be used to enable validity c
*** 7311,7321 ****
  
  
  The form ALL_CHECKS activates all standard checks (its use is equivalent
! to the use of the :switch:`gnatva` switch.
  
! The forms with ``Off`` and ``On``
! can be used to temporarily disable validity checks
! as shown in the following example:
  
  
  .. code-block:: ada
--- 7377,7386 ----
  
  
  The form ALL_CHECKS activates all standard checks (its use is equivalent
! to the use of the :switch:`gnatVa` switch).
  
! The forms with ``Off`` and ``On`` can be used to temporarily disable
! validity checks as shown in the following example:
  
  
  .. code-block:: ada
*************** as shown in the following example:
*** 7326,7331 ****
--- 7391,7397 ----
    pragma Validity_Checks (On);  -- turn validity checks back on
    A := C;                       -- C will be validity checked
  
+ .. _Pragma-Volatile:
  
  Pragma Volatile
  ===============
*************** Syntax:
*** 7361,7368 ****
  This is similar in effect to pragma Volatile, except that any reference to the
  object is guaranteed to be done only with instructions that read or write all
  the bits of the object. Furthermore, if the object is of a composite type,
! then any reference to a component of the object is guaranteed to read and/or
! write all the bits of the object.
  
  The intention is that this be suitable for use with memory-mapped I/O devices
  on some machines. Note that there are two important respects in which this is
--- 7427,7434 ----
  This is similar in effect to pragma Volatile, except that any reference to the
  object is guaranteed to be done only with instructions that read or write all
  the bits of the object. Furthermore, if the object is of a composite type,
! then any reference to a subcomponent of the object is guaranteed to read
! and/or write all the bits of the object.
  
  The intention is that this be suitable for use with memory-mapped I/O devices
  on some machines. Note that there are two important respects in which this is
*************** is not to the whole object; the compiler
*** 7374,7383 ****
  access only part of the object in this case.
  
  It is not permissible to specify ``Atomic`` and ``Volatile_Full_Access`` for
! the same object.
  
  It is not permissible to specify ``Volatile_Full_Access`` for a composite
! (record or array) type or object that has at least one ``Aliased`` component.
  
  .. _Pragma-Volatile_Function:
  
--- 7440,7449 ----
  access only part of the object in this case.
  
  It is not permissible to specify ``Atomic`` and ``Volatile_Full_Access`` for
! the same type or object.
  
  It is not permissible to specify ``Volatile_Full_Access`` for a composite
! (record or array) type or object that has an ``Aliased`` subcomponent.
  
  .. _Pragma-Volatile_Function:
  
*************** Syntax:
*** 7405,7431 ****
  
  
  This configuration pragma allows the programmer to specify a set
! of warnings that will be treated as errors. Any warning which
  matches the pattern given by the pragma argument will be treated
! as an error. This gives much more precise control that -gnatwe
! which treats all warnings as errors.
  
! The pattern may contain asterisks, which match zero or more characters in
! the message. For example, you can use
! ``pragma Warning_As_Error ("bits of*unused")`` to treat the warning
! message ``warning: 960 bits of "a" unused`` as an error. No other regular
! expression notations are permitted. All characters other than asterisk in
! these three specific cases are treated as literal characters in the match.
! The match is case insensitive, for example XYZ matches xyz.
  
  Note that the pattern matches if it occurs anywhere within the warning
  message string (it is not necessary to put an asterisk at the start and
  the end of the message, since this is implied).
  
  Another possibility for the static_string_EXPRESSION which works whether
! or not error tags are enabled (*-gnatw.d*) is to use the
  *-gnatw* tag string, enclosed in brackets,
! as shown in the example below, to treat a class of warnings as errors.
  
  The above use of patterns to match the message applies only to warning
  messages generated by the front end. This pragma can also be applied to
--- 7471,7502 ----
  
  
  This configuration pragma allows the programmer to specify a set
! of warnings that will be treated as errors. Any warning that
  matches the pattern given by the pragma argument will be treated
! as an error. This gives more precise control than -gnatwe,
! which treats warnings as errors.
  
! This pragma can apply to regular warnings (messages enabled by -gnatw)
! and to style warnings (messages that start with "(style)",
! enabled by -gnaty).
! 
! The pattern may contain asterisks, which match zero or more characters
! in the message. For example, you can use ``pragma Warning_As_Error
! ("bits of*unused")`` to treat the warning message ``warning: 960 bits of
! "a" unused`` as an error. All characters other than asterisk are treated
! as literal characters in the match. The match is case insensitive; for
! example XYZ matches xyz.
  
  Note that the pattern matches if it occurs anywhere within the warning
  message string (it is not necessary to put an asterisk at the start and
  the end of the message, since this is implied).
  
  Another possibility for the static_string_EXPRESSION which works whether
! or not error tags are enabled (*-gnatw.d*) is to use a single
  *-gnatw* tag string, enclosed in brackets,
! as shown in the example below, to treat one category of warnings as errors.
! Note that if you want to treat multiple categories of warnings as errors,
! you can use multiple pragma Warning_As_Error.
  
  The above use of patterns to match the message applies only to warning
  messages generated by the front end. This pragma can also be applied to
*************** asterisks is similar in effect to specif
*** 7623,7629 ****
  ``pragma Warnings (On, "***")`` will be required. This can be
  helpful in avoiding forgetting to turn warnings back on.
  
! Note: the debug flag :switch:`-gnatd.i` (``/NOWARNINGS_PRAGMAS`` in VMS) can be
  used to cause the compiler to entirely ignore all WARNINGS pragmas. This can
  be useful in checking whether obsolete pragmas in existing programs are hiding
  real problems.
--- 7694,7700 ----
  ``pragma Warnings (On, "***")`` will be required. This can be
  helpful in avoiding forgetting to turn warnings back on.
  
! Note: the debug flag :switch:`-gnatd.i` can be
  used to cause the compiler to entirely ignore all WARNINGS pragmas. This can
  be useful in checking whether obsolete pragmas in existing programs are hiding
  real problems.
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_rm/implementation_of_specific_ada_features.rst gcc-10.1.0/gcc/ada/doc/gnat_rm/implementation_of_specific_ada_features.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_rm/implementation_of_specific_ada_features.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_rm/implementation_of_specific_ada_features.rst	Thu May  7 10:49:59 2020
*************** is created in the shared memory director
*** 410,418 ****
  This is used to provide the required locking
  semantics for proper protected object synchronization.
  
- GNAT supports shared passive packages on all platforms
- except for OpenVMS.
- 
  .. _Code_Generation_for_Array_Aggregates:
  
  Code Generation for Array Aggregates
--- 410,415 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_rm/interfacing_to_other_languages.rst gcc-10.1.0/gcc/ada/doc/gnat_rm/interfacing_to_other_languages.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_rm/interfacing_to_other_languages.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_rm/interfacing_to_other_languages.rst	Thu May  7 10:49:59 2020
*************** and C types:
*** 46,53 ****
  
  *
    Ada enumeration types map to C enumeration types directly if pragma
!   ``Convention C`` is specified, which causes them to have int
!   length.  Without pragma ``Convention C``, Ada enumeration types map to
    8, 16, or 32 bits (i.e., C types ``signed char``, ``short``,
    ``int``, respectively) depending on the number of values passed.
    This is the only case in which pragma ``Convention C`` affects the
--- 46,55 ----
  
  *
    Ada enumeration types map to C enumeration types directly if pragma
!   ``Convention C`` is specified, which causes them to have a length of
!   32 bits, except for boolean types which map to C99 ``bool`` and for
!   which the length is 8 bits.
!   Without pragma ``Convention C``, Ada enumeration types map to
    8, 16, or 32 bits (i.e., C types ``signed char``, ``short``,
    ``int``, respectively) depending on the number of values passed.
    This is the only case in which pragma ``Convention C`` affects the
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_rm/obsolescent_features.rst gcc-10.1.0/gcc/ada/doc/gnat_rm/obsolescent_features.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_rm/obsolescent_features.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_rm/obsolescent_features.rst	Thu May  7 10:49:59 2020
*************** pragma Task_Info
*** 49,55 ****
  The functionality provided by pragma ``Task_Info`` is now part of the
  Ada language. The ``CPU`` aspect and the package
  ``System.Multiprocessors`` offer a less system-dependent way to specify
! task affinity or to query the number of processsors.
  
  Syntax
  
--- 49,55 ----
  The functionality provided by pragma ``Task_Info`` is now part of the
  Ada language. The ``CPU`` aspect and the package
  ``System.Multiprocessors`` offer a less system-dependent way to specify
! task affinity or to query the number of processors.
  
  Syntax
  
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_rm/representation_clauses_and_pragmas.rst gcc-10.1.0/gcc/ada/doc/gnat_rm/representation_clauses_and_pragmas.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_rm/representation_clauses_and_pragmas.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_rm/representation_clauses_and_pragmas.rst	Thu May  7 10:49:59 2020
*************** Alignment Clauses
*** 30,38 ****
  
  .. index:: Alignment Clause
  
! GNAT requires that all alignment clauses specify a power of 2, and all
! default alignments are always a power of 2.  The default alignment
! values are as follows:
  
  * *Elementary Types*.
  
--- 30,40 ----
  
  .. index:: Alignment Clause
  
! GNAT requires that all alignment clauses specify 0 or a power of 2, and
! all default alignments are always a power of 2. Specifying 0 is the
! same as specifying 1.
! 
! The default alignment values are as follows:
  
  * *Elementary Types*.
  
*************** alignment of the type (this is true for
*** 610,623 ****
       end record;
  
  
! On a typical 32-bit architecture, the X component will be four bytes, and
! require four-byte alignment, and the Y component will be one byte. In this
! case ``R'Value_Size`` will be 40 (bits) since this is the minimum size
! required to store a value of this type, and for example, it is permissible
! to have a component of type R in an outer array whose component size is
! specified to be 48 bits. However, ``R'Object_Size`` will be 64 (bits),
! since it must be rounded up so that this value is a multiple of the
! alignment (4 bytes = 32 bits).
  
  For all other types, the ``Object_Size``
  and ``Value_Size`` are the same (and equivalent to the RM attribute ``Size``).
--- 612,634 ----
       end record;
  
  
! On a typical 32-bit architecture, the X component will occupy four bytes
! and the Y component will occupy one byte, for a total of 5 bytes. As a
! result ``R'Value_Size`` will be 40 (bits) since this is the minimum size
! required to store a value of this type. For example, it is permissible
! to have a component of type R in an array whose component size is
! specified to be 40 bits.
! 
! However, ``R'Object_Size`` will be 64 (bits). The difference is due to
! the alignment requirement for objects of the record type. The X
! component will require four-byte alignment because that is what type
! Integer requires, whereas the Y component, a Character, will only
! require 1-byte alignment. Since the alignment required for X is the
! greatest of all the components' alignments, that is the alignment
! required for the enclosing record type, i.e., 4 bytes or 32 bits. As
! indicated above, the actual object size must be rounded up so that it is
! a multiple of the alignment value. Therefore, 40 bits rounded up to the
! next multiple of 32 yields 64 bits.
  
  For all other types, the ``Object_Size``
  and ``Value_Size`` are the same (and equivalent to the RM attribute ``Size``).
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_rm/standard_and_implementation_defined_restrictions.rst gcc-10.1.0/gcc/ada/doc/gnat_rm/standard_and_implementation_defined_restrictions.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_rm/standard_and_implementation_defined_restrictions.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_rm/standard_and_implementation_defined_restrictions.rst	Thu May  7 10:49:59 2020
*************** No_Exceptions
*** 356,362 ****
  .. index:: No_Exceptions
  
  [RM H.4] This restriction ensures at compile time that there are no
! raise statements and no exception handlers.
  
  No_Finalization
  ---------------
--- 356,364 ----
  .. index:: No_Exceptions
  
  [RM H.4] This restriction ensures at compile time that there are no
! raise statements and no exception handlers and also suppresses the
! generation of language-defined run-time checks.
! 
  
  No_Finalization
  ---------------
*************** No_Multiple_Elaboration
*** 510,524 ****
  -----------------------
  .. index:: No_Multiple_Elaboration
  
! [GNAT] When this restriction is active, we are not requesting control-flow
! preservation with -fpreserve-control-flow, and the static elaboration model is
! used, the compiler is allowed to suppress the elaboration counter normally
! associated with the unit, even if the unit has elaboration code. This counter
! is typically used to check for access before elaboration and to control
! multiple elaboration attempts. If the restriction is used, then the
! situations in which multiple elaboration is possible, including non-Ada main
! programs and Stand Alone libraries, are not permitted and will be diagnosed
! by the binder.
  
  No_Nested_Finalization
  ----------------------
--- 512,525 ----
  -----------------------
  .. index:: No_Multiple_Elaboration
  
! [GNAT] When this restriction is active and the static elaboration model is
! used, and -fpreserve-control-flow is not used, the compiler is allowed to
! suppress the elaboration counter normally associated with the unit, even if
! the unit has elaboration code. This counter is typically used to check for
! access before elaboration and to control multiple elaboration attempts. If the
! restriction is used, then the situations in which multiple elaboration is
! possible, including non-Ada main programs and Stand Alone libraries, are not
! permitted and will be diagnosed by the binder.
  
  No_Nested_Finalization
  ----------------------
*************** No_Stream_Optimizations
*** 634,640 ****
  [GNAT] This restriction affects the performance of stream operations on types
  ``String``, ``Wide_String`` and ``Wide_Wide_String``. By default, the
  compiler uses block reads and writes when manipulating ``String`` objects
! due to their supperior performance. When this restriction is in effect, the
  compiler performs all IO operations on a per-character basis.
  
  No_Streams
--- 635,641 ----
  [GNAT] This restriction affects the performance of stream operations on types
  ``String``, ``Wide_String`` and ``Wide_Wide_String``. By default, the
  compiler uses block reads and writes when manipulating ``String`` objects
! due to their superior performance. When this restriction is in effect, the
  compiler performs all IO operations on a per-character basis.
  
  No_Streams
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_rm/the_gnat_library.rst gcc-10.1.0/gcc/ada/doc/gnat_rm/the_gnat_library.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_rm/the_gnat_library.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_rm/the_gnat_library.rst	Thu May  7 10:49:59 2020
*************** Provides access to key=value association
*** 722,727 ****
--- 722,738 ----
  These associations can be specified using the :switch:`-V` binder command
  line switch.
  
+ .. _`GNAT.Branch_Prediction_(g-brapre.ads)`:
+ 
+ ``GNAT.Branch_Prediction`` (:file:`g-brapre.ads`)
+ =================================================
+ 
+ .. index:: GNAT.Branch_Prediction (g-brapre.ads)
+ 
+ .. index:: Branch Prediction
+ 
+ Provides routines giving hints to the branch predictor of the code generator.
+ 
  .. _`GNAT.Bounded_Buffers_(g-boubuf.ads)`:
  
  ``GNAT.Bounded_Buffers`` (:file:`g-boubuf.ads`)
*************** programs written in Ada.
*** 937,943 ****
  
  Provides a high level interface to ``Ada.Command_Line`` facilities,
  including the ability to scan for named switches with optional parameters
! and expand file names using wild card notations.
  
  .. _`GNAT.Compiler_Version_(g-comver.ads)`:
  
--- 948,954 ----
  
  Provides a high level interface to ``Ada.Command_Line`` facilities,
  including the ability to scan for named switches with optional parameters
! and expand file names using wildcard notations.
  
  .. _`GNAT.Compiler_Version_(g-comver.ads)`:
  
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_ugn/about_this_guide.rst gcc-10.1.0/gcc/ada/doc/gnat_ugn/about_this_guide.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_ugn/about_this_guide.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_ugn/about_this_guide.rst	Thu May  7 10:49:59 2020
*************** following documents:
*** 90,100 ****
  * :title:`GNAT Reference_Manual`, which contains all reference material for the GNAT
    implementation of Ada.
  
! * :title:`Using the GNAT Programming Studio`, which describes the GPS
    Integrated Development Environment.
  
! * :title:`GNAT Programming Studio Tutorial`, which introduces the
!   main GPS features through examples.
  
  * :title:`Debugging with GDB`,
    for all details on the use of the GNU source-level debugger.
--- 90,100 ----
  * :title:`GNAT Reference_Manual`, which contains all reference material for the GNAT
    implementation of Ada.
  
! * :title:`Using GNAT Studio`, which describes the GNAT Studio
    Integrated Development Environment.
  
! * :title:`GNAT Studio Tutorial`, which introduces the
!   main GNAT Studio features through examples.
  
  * :title:`Debugging with GDB`,
    for all details on the use of the GNU source-level debugger.
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst gcc-10.1.0/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst	Thu May  7 10:49:59 2020
*************** Alphabetical List of All Switches
*** 1714,1724 ****
    GCC macro ``BITS_PER_WORD`` documented as follows: `Number of bits in a word;
    normally 32.`
  
!   ``Double_Scalar_Alignment`` is the alignment for a scalar whose size is two
!   machine words. It should be the same as the alignment for C ``long_long`` on
!   most targets.
  
!   ``Maximum_Alignment`` is the maximum alignment that the compiler might choose
    by default for a type or object, which is also the maximum alignment that can
    be specified in GNAT. It is computed for GCC backends as ``BIGGEST_ALIGNMENT
    / BITS_PER_UNIT`` where GCC macro ``BIGGEST_ALIGNMENT`` is documented as
--- 1714,1726 ----
    GCC macro ``BITS_PER_WORD`` documented as follows: `Number of bits in a word;
    normally 32.`
  
!   ``Double_Float_Alignment``, if not zero, is the maximum alignment that the
!   compiler can choose by default for a 64-bit floating-point type or object.
  
!   ``Double_Scalar_Alignment``, if not zero, is the maximum alignment that the
!   compiler can choose by default for a 64-bit or larger scalar type or object.
! 
!   ``Maximum_Alignment`` is the maximum alignment that the compiler can choose
    by default for a type or object, which is also the maximum alignment that can
    be specified in GNAT. It is computed for GCC backends as ``BIGGEST_ALIGNMENT
    / BITS_PER_UNIT`` where GCC macro ``BIGGEST_ALIGNMENT`` is documented as
*************** Alphabetical List of All Switches
*** 1836,1842 ****
  .. index:: -gnatE  (gcc)
  
  :switch:`-gnatE`
!   Full dynamic elaboration checks.
  
  
  .. index:: -gnatf  (gcc)
--- 1838,1845 ----
  .. index:: -gnatE  (gcc)
  
  :switch:`-gnatE`
!   Dynamic elaboration checking mode enabled. For further details see
!   :ref:`Elaboration_Order_Handling_in_GNAT`.
  
  
  .. index:: -gnatf  (gcc)
*************** Alphabetical List of All Switches
*** 1878,1885 ****
  .. index:: -gnatH  (gcc)
  
  :switch:`-gnatH`
!   Legacy elaboration-checking mode enabled. When this switch is in effect, the
!   pre-18.x access-before-elaboration model becomes the de facto model.
  
  
  .. index:: -gnati  (gcc)
--- 1881,1889 ----
  .. index:: -gnatH  (gcc)
  
  :switch:`-gnatH`
!   Legacy elaboration-checking mode enabled. When this switch is in effect,
!   the pre-18.x access-before-elaboration model becomes the de facto model.
!   For further details see :ref:`Elaboration_Order_Handling_in_GNAT`.
  
  
  .. index:: -gnati  (gcc)
*************** Alphabetical List of All Switches
*** 1935,1941 ****
    - Select statements
    - Synchronous task suspension
  
!   and does not emit compile-time diagnostics or run-time checks.
  
  
  .. index:: -gnatk  (gcc)
--- 1939,1946 ----
    - Select statements
    - Synchronous task suspension
  
!   and does not emit compile-time diagnostics or run-time checks. For further
!   details see :ref:`Elaboration_Order_Handling_in_GNAT`.
  
  
  .. index:: -gnatk  (gcc)
*************** file) and have the following form:
*** 2372,2378 ****
  
  The first integer after the file name is the line number in the file,
  and the second integer is the column number within the line.
! ``GPS`` can parse the error messages
  and point to the referenced character.
  The following switches provide control over the error message
  format:
--- 2377,2383 ----
  
  The first integer after the file name is the line number in the file,
  and the second integer is the column number within the line.
! ``GNAT Studio`` can parse the error messages
  and point to the referenced character.
  The following switches provide control over the error message
  format:
*************** of the pragma in the :title:`GNAT_Refere
*** 2755,2761 ****
  :switch:`-gnatwa`
    *Activate most optional warnings.*
  
!   This switch activates most optional warning messages.  See the remaining list
    in this section for details on optional warning messages that can be
    individually controlled.  The warnings that are not turned on by this
    switch are:
--- 2760,2766 ----
  :switch:`-gnatwa`
    *Activate most optional warnings.*
  
!   This switch activates most optional warning messages. See the remaining list
    in this section for details on optional warning messages that can be
    individually controlled.  The warnings that are not turned on by this
    switch are:
*************** of the pragma in the :title:`GNAT_Refere
*** 2785,2790 ****
--- 2790,2797 ----
  
    * :switch:`-gnatw.q` (questionable layout of record types)
  
+   * :switch:`-gnatw_r` (out-of-order record representation clauses)
+ 
    * :switch:`-gnatw.s` (overridden size clause)
  
    * :switch:`-gnatwt` (tracking of deleted conditional code)
*************** of the pragma in the :title:`GNAT_Refere
*** 2839,2844 ****
--- 2846,2874 ----
    compile time that the assertion will fail.
  
  
+ .. index:: -gnatw_a
+ 
+ :switch:`-gnatw_a`
+   *Activate warnings on anonymous allocators.*
+ 
+   .. index:: Anonymous allocators
+ 
+   This switch activates warnings for allocators of anonymous access types,
+   which can involve run-time accessibility checks and lead to unexpected
+   accessibility violations. For more details on the rules involved, see
+   RM 3.10.2 (14).
+ 
+ 
+ .. index:: -gnatw_A
+ 
+ :switch:`-gnatw_A`
+   *Supress warnings on anonymous allocators.*
+ 
+   .. index:: Anonymous allocators
+ 
+   This switch suppresses warnings for anonymous access type allocators.
+ 
+ 
  .. index:: -gnatwb  (gcc)
  
  :switch:`-gnatwb`
*************** of the pragma in the :title:`GNAT_Refere
*** 2944,2950 ****
    component for which no component clause is present.
  
  
! .. index:: -gnatwC  (gcc)
  
  :switch:`-gnatw.C`
    *Suppress warnings on missing component clauses.*
--- 2974,2980 ----
    component for which no component clause is present.
  
  
! .. index:: -gnatw.C  (gcc)
  
  :switch:`-gnatw.C`
    *Suppress warnings on missing component clauses.*
*************** of the pragma in the :title:`GNAT_Refere
*** 2953,2958 ****
--- 2983,3012 ----
    missing a component clause in the situation described above.
  
  
+ .. index:: -gnatw_c  (gcc)
+ 
+ :switch:`-gnatw_c`
+   *Activate warnings on unknown condition in Compile_Time_Warning.*
+ 
+   .. index:: Compile_Time_Warning
+   .. index:: Compile_Time_Error
+ 
+   This switch activates warnings on a pragma Compile_Time_Warning
+   or Compile_Time_Error whose condition has a value that is not
+   known at compile time.
+   The default is that such warnings are generated.
+ 
+ 
+ .. index:: -gnatw_C  (gcc)
+ 
+ :switch:`-gnatw_C`
+   *Suppress warnings on unknown condition in Compile_Time_Warning.*
+ 
+   This switch supresses warnings on a pragma Compile_Time_Warning
+   or Compile_Time_Error whose condition has a value that is not
+   known at compile time.
+ 
+ 
  .. index:: -gnatwd  (gcc)
  
  :switch:`-gnatwd`
*************** of the pragma in the :title:`GNAT_Refere
*** 3656,3662 ****
    warnings are given.
  
  
! .. index:: -gnatwT  (gcc)
  
  :switch:`-gnatw.R`
    *Suppress warnings for object renaming function.*
--- 3710,3716 ----
    warnings are given.
  
  
! .. index:: -gnatw.R  (gcc)
  
  :switch:`-gnatw.R`
    *Suppress warnings for object renaming function.*
*************** of the pragma in the :title:`GNAT_Refere
*** 3664,3669 ****
--- 3718,3740 ----
    This switch suppresses warnings for object renaming function.
  
  
+ .. index:: -gnatw_r  (gcc)
+ 
+ :switch:`-gnatw_r`
+   *Activate warnings for out-of-order record representation clauses.*
+ 
+   This switch activates warnings for record representation clauses,
+   if the order of component declarations, component clauses,
+   and bit-level layout do not all agree.
+   The default is that these warnings are not given.
+ 
+ 
+ .. index:: -gnatw_R  (gcc)
+ 
+ :switch:`-gnatw_R`
+   *Suppress warnings for out-of-order record representation clauses.*
+ 
+ 
  .. index:: -gnatws  (gcc)
  
  :switch:`-gnatws`
*************** of the pragma in the :title:`GNAT_Refere
*** 4045,4052 ****
  :switch:`-gnatw.z`
    *Activate warnings for size not a multiple of alignment.*
  
!   This switch activates warnings for cases of record types with
!   specified ``Size`` and ``Alignment`` attributes where the
    size is not a multiple of the alignment, resulting in an object
    size that is greater than the specified size. The default
    is that such warnings are generated.
--- 4116,4123 ----
  :switch:`-gnatw.z`
    *Activate warnings for size not a multiple of alignment.*
  
!   This switch activates warnings for cases of array and record types
!   with specified ``Size`` and ``Alignment`` attributes where the
    size is not a multiple of the alignment, resulting in an object
    size that is greater than the specified size. The default
    is that such warnings are generated.
*************** of the pragma in the :title:`GNAT_Refere
*** 4058,4069 ****
  :switch:`-gnatw.Z`
    *Suppress warnings for size not a multiple of alignment.*
  
!   This switch suppresses warnings for cases of record types with
!   specified ``Size`` and ``Alignment`` attributes where the
    size is not a multiple of the alignment, resulting in an object
!   size that is greater than the specified size.
!   The warning can also be
!   suppressed by giving an explicit ``Object_Size`` value.
  
  
  .. index:: -Wunused (gcc)
--- 4129,4139 ----
  :switch:`-gnatw.Z`
    *Suppress warnings for size not a multiple of alignment.*
  
!   This switch suppresses warnings for cases of array and record types
!   with specified ``Size`` and ``Alignment`` attributes where the
    size is not a multiple of the alignment, resulting in an object
!   size that is greater than the specified size. The warning can also
!   be suppressed by giving an explicit ``Object_Size`` value.
  
  
  .. index:: -Wunused (gcc)
*************** checks to be performed. The following ch
*** 4691,4696 ****
--- 4761,4776 ----
    allowed).
  
  
+ .. index:: -gnatyD (gcc)
+ 
+ :switch:`-gnatyD`
+   *Check declared identifiers in mixed case.*
+ 
+   Declared identifiers must be in mixed case, as in
+   This_Is_An_Identifier. Use -gnatyr in addition to ensure
+   that references match declarations.
+ 
+ 
  .. index:: -gnatye (gcc)
  
  :switch:`-gnatye`
*************** checks to be performed. The following ch
*** 4716,4722 ****
  
    The set of style check switches is set to match that used by the GNAT sources.
    This may be useful when developing code that is eventually intended to be
!   incorporated into GNAT. Currently this is equivalent to :switch:`-gnatwydISux`)
    but additional style switches may be added to this set in the future without
    advance notice.
  
--- 4796,4802 ----
  
    The set of style check switches is set to match that used by the GNAT sources.
    This may be useful when developing code that is eventually intended to be
!   incorporated into GNAT. Currently this is equivalent to :switch:`-gnatyydISux`)
    but additional style switches may be added to this set in the future without
    advance notice.
  
*************** checks to be performed. The following ch
*** 5059,5065 ****
  
  
  .. end of switch description (leave this comment to ease automatic parsing for
! .. GPS
  
  In the above rules, appearing in column one is always permitted, that is,
  counts as meeting either a requirement for a required preceding space,
--- 5139,5145 ----
  
  
  .. end of switch description (leave this comment to ease automatic parsing for
! .. GNAT Studio
  
  In the above rules, appearing in column one is always permitted, that is,
  counts as meeting either a requirement for a required preceding space,
*************** Using ``gcc`` for Syntax Checking
*** 5281,5287 ****
  
    compiles file :file:`x.adb` in syntax-check-only mode. You can check a
    series of files in a single command
!   , and can use wild cards to specify such a group of files.
    Note that you must specify the :switch:`-c` (compile
    only) flag in addition to the :switch:`-gnats` flag.
  
--- 5361,5367 ----
  
    compiles file :file:`x.adb` in syntax-check-only mode. You can check a
    series of files in a single command
!   , and can use wildcards to specify such a group of files.
    Note that you must specify the :switch:`-c` (compile
    only) flag in addition to the :switch:`-gnats` flag.
  
*************** Debugging Control
*** 5889,5896 ****
    compiler sources.
  
    If the switch is followed by an ``s`` (e.g., :switch:`-gnatR3s`), then
!   the output is to a file with the name :file:`file.rep` where file is
!   the name of the corresponding source file, except if `j`` is also
    specified, in which case the file name is :file:`file.json`.
  
    Note that it is possible for record components to have zero size. In
--- 5969,5976 ----
    compiler sources.
  
    If the switch is followed by an ``s`` (e.g., :switch:`-gnatR3s`), then
!   the output is to a file with the name :file:`file.rep` where ``file`` is
!   the name of the corresponding source file, except if ``j`` is also
    specified, in which case the file name is :file:`file.json`.
  
    Note that it is possible for record components to have zero size. In
*************** be presented in subsequent sections.
*** 6359,6365 ****
  .. index:: -f  (gnatbind)
  
  :switch:`-f{elab-order}`
!   Force elaboration order.
  
  .. index:: -F  (gnatbind)
  
--- 6439,6447 ----
  .. index:: -f  (gnatbind)
  
  :switch:`-f{elab-order}`
!   Force elaboration order. For further details see :ref:`Elaboration_Control`
!   and :ref:`Elaboration_Order_Handling_in_GNAT`.
! 
  
  .. index:: -F  (gnatbind)
  
*************** be presented in subsequent sections.
*** 6379,6393 ****
    Output usage (help) information.
  
  
!   .. index:: -H32  (gnatbind)
  
  :switch:`-H32`
    Use 32-bit allocations for ``__gnat_malloc`` (and thus for access types).
    For further details see :ref:`Dynamic_Allocation_Control`.
  
  
!   .. index:: -H64  (gnatbind)
!   .. index:: __gnat_malloc
  
  :switch:`-H64`
    Use 64-bit allocations for ``__gnat_malloc`` (and thus for access types).
--- 6461,6482 ----
    Output usage (help) information.
  
  
! .. index:: -H  (gnatbind)
! 
! :switch:`-H`
!   Legacy elaboration order model enabled. For further details see
!   :ref:`Elaboration_Order_Handling_in_GNAT`.
! 
! 
! .. index:: -H32  (gnatbind)
  
  :switch:`-H32`
    Use 32-bit allocations for ``__gnat_malloc`` (and thus for access types).
    For further details see :ref:`Dynamic_Allocation_Control`.
  
  
! .. index:: -H64  (gnatbind)
! .. index:: __gnat_malloc
  
  :switch:`-H64`
    Use 64-bit allocations for ``__gnat_malloc`` (and thus for access types).
*************** be presented in subsequent sections.
*** 6431,6437 ****
    Rename generated main program from main to xyz. This option is
    supported on cross environments only.
  
- 
    .. index:: -m  (gnatbind)
  
  :switch:`-m{n}`
--- 6520,6525 ----
*************** be presented in subsequent sections.
*** 6444,6449 ****
--- 6532,6550 ----
    A value of zero means that no limit is enforced. The equal
    sign is optional.
  
+   .. index:: -minimal  (gnatbind)
+ 
+ :switch:`-minimal`
+   Generate a binder file suitable for space-constrained applications. When
+   active, binder-generated objects not required for program operation are no
+   longer generated. **Warning:** this option comes with the following
+   limitations:
+ 
+   * Starting the program's execution in the debugger will cause it to
+     stop at the start of the ``main`` function instead of the main subprogram. 
+     This can be worked around by manually inserting a breakpoint on that 
+     subprogram and resuming the program's execution until reaching that breakpoint.
+   * Programs using GNAT.Compiler_Version will not link.
  
    .. index:: -n  (gnatbind)
  
*************** Elaboration Control
*** 6807,6813 ****
  ^^^^^^^^^^^^^^^^^^^
  
  The following switches provide additional control over the elaboration
! order. For full details see :ref:`Elaboration_Order_Handling_in_GNAT`.
  
  
  .. index:: -f  (gnatbind)
--- 6908,6914 ----
  ^^^^^^^^^^^^^^^^^^^
  
  The following switches provide additional control over the elaboration
! order. For further details see :ref:`Elaboration_Order_Handling_in_GNAT`.
  
  
  .. index:: -f  (gnatbind)
*************** order. For full details see :ref:`Elabor
*** 6851,6878 ****
    ignored.
  
  
!   .. index:: -p  (gnatbind)
  
  :switch:`-p`
!   Normally the binder attempts to choose an elaboration order that is
!   likely to minimize the likelihood of an elaboration order error resulting
!   in raising a ``Program_Error`` exception. This switch reverses the
!   action of the binder, and requests that it deliberately choose an order
!   that is likely to maximize the likelihood of an elaboration error.
!   This is useful in ensuring portability and avoiding dependence on
!   accidental fortuitous elaboration ordering.
  
!   Normally it only makes sense to use the :switch:`-p`
!   switch if dynamic
    elaboration checking is used (:switch:`-gnatE` switch used for compilation).
    This is because in the default static elaboration mode, all necessary
    ``Elaborate`` and ``Elaborate_All`` pragmas are implicitly inserted.
!   These implicit pragmas are still respected by the binder in
!   :switch:`-p` mode, so a
!   safe elaboration order is assured.
  
!   Note that :switch:`-p` is not intended for
!   production use; it is more for debugging/experimental use.
  
  .. _Output_Control:
  
--- 6952,6983 ----
    ignored.
  
  
! .. index:: -p  (gnatbind)
  
  :switch:`-p`
!   Pessimistic elaboration order
  
!   This switch is only applicable to the pre-20.x legacy elaboration models.
!   The post-20.x elaboration model uses a more informed approach of ordering
!   the units.
! 
!   Normally the binder attempts to choose an elaboration order that is likely to
!   minimize the likelihood of an elaboration order error resulting in raising a
!   ``Program_Error`` exception. This switch reverses the action of the binder,
!   and requests that it deliberately choose an order that is likely to maximize
!   the likelihood of an elaboration error. This is useful in ensuring
!   portability and avoiding dependence on accidental fortuitous elaboration
!   ordering.
! 
!   Normally it only makes sense to use the :switch:`-p` switch if dynamic
    elaboration checking is used (:switch:`-gnatE` switch used for compilation).
    This is because in the default static elaboration mode, all necessary
    ``Elaborate`` and ``Elaborate_All`` pragmas are implicitly inserted.
!   These implicit pragmas are still respected by the binder in :switch:`-p`
!   mode, so a safe elaboration order is assured.
  
!   Note that :switch:`-p` is not intended for production use; it is more for
!   debugging/experimental use.
  
  .. _Output_Control:
  
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_ugn/elaboration_order_handling_in_gnat.rst gcc-10.1.0/gcc/ada/doc/gnat_ugn/elaboration_order_handling_in_gnat.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_ugn/elaboration_order_handling_in_gnat.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_ugn/elaboration_order_handling_in_gnat.rst	Thu May  7 10:49:59 2020
*************** Elaboration code is executed as follows:
*** 50,58 ****
  
  In addition to the Ada terminology, this appendix defines the following terms:
  
  * *Scenario*
  
!   A construct that is elaborated or executed by elaboration code is referred to
    as an *elaboration scenario* or simply a **scenario**. GNAT recognizes the
    following scenarios:
  
--- 50,63 ----
  
  In addition to the Ada terminology, this appendix defines the following terms:
  
+ * *Invocation*
+ 
+   The act of calling a subprogram, instantiating a generic, or activating a
+   task.
+ 
  * *Scenario*
  
!   A construct that is elaborated or invoked by elaboration code is referred to
    as an *elaboration scenario* or simply a **scenario**. GNAT recognizes the
    following scenarios:
  
*************** Elaboration code may appear in two disti
*** 102,108 ****
    In the example above, the call to ``Server.Func`` is an elaboration scenario
    because it appears at the library level of package ``Client``. Note that the
    declaration of package ``Nested`` is ignored according to the definition
!   given above. As a result, the call to ``Server.Func`` will be executed when
    the spec of unit ``Client`` is elaborated.
  
  * *Package body statements*
--- 107,113 ----
    In the example above, the call to ``Server.Func`` is an elaboration scenario
    because it appears at the library level of package ``Client``. Note that the
    declaration of package ``Nested`` is ignored according to the definition
!   given above. As a result, the call to ``Server.Func`` will be invoked when
    the spec of unit ``Client`` is elaborated.
  
  * *Package body statements*
*************** Elaboration code may appear in two disti
*** 124,130 ****
  
    In the example above, the call to ``Proc`` is an elaboration scenario because
    it appears within the statement sequence of package body ``Client``. As a
!   result, the call to ``Proc`` will be executed when the body of ``Client`` is
    elaborated.
  
  .. _Elaboration_Order:
--- 129,135 ----
  
    In the example above, the call to ``Proc`` is an elaboration scenario because
    it appears within the statement sequence of package body ``Client``. As a
!   result, the call to ``Proc`` will be invoked when the body of ``Client`` is
    elaborated.
  
  .. _Elaboration_Order:
*************** executed is referred to as **elaboration
*** 137,155 ****
  
  Within a single unit, elaboration code is executed in sequential order.
  
! ::
  
!    package body Client is
!       Result : ... := Server.Func;
  
!       procedure Proc is
!          package Inst is new Server.Gen;
!       begin
!          Inst.Eval (Result);
!       end Proc;
!    begin
!       Proc;
!    end Client;
  
  In the example above, the elaboration order within package body ``Client`` is
  as follows:
--- 142,160 ----
  
  Within a single unit, elaboration code is executed in sequential order.
  
!   ::
  
!      package body Client is
!         Result : ... := Server.Func;
  
!         procedure Proc is
!            package Inst is new Server.Gen;
!         begin
!            Inst.Eval (Result);
!         end Proc;
!      begin
!         Proc;
!      end Client;
  
  In the example above, the elaboration order within package body ``Client`` is
  as follows:
*************** factors:
*** 173,224 ****
  
  * |withed| units
  
  * purity of units
  
  * preelaborability of units
  
! * presence of elaboration control pragmas
  
  A program may have several elaboration orders depending on its structure.
  
! ::
  
!    package Server is
!       function Func (Index : Integer) return Integer;
!    end Server;
  
! ::
  
!    package body Server is
!       Results : array (1 .. 5) of Integer := (1, 2, 3, 4, 5);
  
!       function Func (Index : Integer) return Integer is
!       begin
!          return Results (Index);
!       end Func;
!    end Server;
  
! ::
  
!    with Server;
!    package Client is
!       Val : constant Integer := Server.Func (3);
!    end Client;
  
! ::
  
!    with Client;
!    procedure Main is begin null; end Main;
  
  The following elaboration order exhibits a fundamental problem referred to as
  *access-before-elaboration* or simply **ABE**.
  
! ::
  
!    spec of Server
!    spec of Client
!    body of Server
!    body of Main
  
  The elaboration of ``Server``'s spec materializes function ``Func``, making it
  callable. The elaboration of ``Client``'s spec elaborates the declaration of
--- 178,233 ----
  
  * |withed| units
  
+ * parent units
+ 
  * purity of units
  
  * preelaborability of units
  
! * presence of elaboration-control pragmas
! 
! * invocations performed in elaboration code
  
  A program may have several elaboration orders depending on its structure.
  
!   ::
  
!      package Server is
!         function Func (Index : Integer) return Integer;
!      end Server;
  
!   ::
  
!      package body Server is
!         Results : array (1 .. 5) of Integer := (1, 2, 3, 4, 5);
  
!         function Func (Index : Integer) return Integer is
!         begin
!            return Results (Index);
!         end Func;
!      end Server;
  
!   ::
  
!      with Server;
!      package Client is
!         Val : constant Integer := Server.Func (3);
!      end Client;
  
!   ::
  
!      with Client;
!      procedure Main is begin null; end Main;
  
  The following elaboration order exhibits a fundamental problem referred to as
  *access-before-elaboration* or simply **ABE**.
  
!   ::
  
!      spec of Server
!      spec of Client
!      body of Server
!      body of Main
  
  The elaboration of ``Server``'s spec materializes function ``Func``, making it
  callable. The elaboration of ``Client``'s spec elaborates the declaration of
*************** vein as index or null exclusion checks.
*** 236,261 ****
  The following elaboration order avoids the ABE problem and the program can be
  successfully elaborated.
  
! ::
  
!    spec of Server
!    body of Server
!    spec of Client
!    body of Main
  
  Ada states that a total elaboration order must exist, but it does not define
  what this order is. A compiler is thus tasked with choosing a suitable
  elaboration order which satisfies the dependencies imposed by |with| clauses,
! unit categorization, and elaboration control pragmas. Ideally an order which
! avoids ABE problems should be chosen, however a compiler may not always find
! such an order due to complications with respect to control and data flow.
  
  .. _Checking_the_Elaboration_Order:
  
  Checking the Elaboration Order
  ==============================
  
! To avoid placing the entire elaboration order burden on the programmer, Ada 
  provides three lines of defense:
  
  * *Static semantics*
--- 245,271 ----
  The following elaboration order avoids the ABE problem and the program can be
  successfully elaborated.
  
!   ::
  
!      spec of Server
!      body of Server
!      spec of Client
!      body of Main
  
  Ada states that a total elaboration order must exist, but it does not define
  what this order is. A compiler is thus tasked with choosing a suitable
  elaboration order which satisfies the dependencies imposed by |with| clauses,
! unit categorization, elaboration-control pragmas, and invocations performed in
! elaboration code. Ideally an order that avoids ABE problems should be chosen,
! however a compiler may not always find such an order due to complications with
! respect to control and data flow.
  
  .. _Checking_the_Elaboration_Order:
  
  Checking the Elaboration Order
  ==============================
  
! To avoid placing the entire elaboration-order burden on the programmer, Ada 
  provides three lines of defense:
  
  * *Static semantics*
*************** provides three lines of defense:
*** 268,274 ****
  * *Dynamic semantics*
  
    Dynamic checks are performed at run time, to ensure that a target is
!   elaborated prior to a scenario that executes it, thus avoiding ABE problems.
    A failed run-time check raises exception ``Program_Error``. The following
    restrictions apply:
  
--- 278,284 ----
  * *Dynamic semantics*
  
    Dynamic checks are performed at run time, to ensure that a target is
!   elaborated prior to a scenario that invokes it, thus avoiding ABE problems.
    A failed run-time check raises exception ``Program_Error``. The following
    restrictions apply:
  
*************** provides three lines of defense:
*** 290,297 ****
    The restrictions above can be summarized by the following rule:
  
    *If a target has a body, then this body must be elaborated prior to the
!   execution of the scenario that invokes, instantiates, or activates the
!   target.*
  
  * *Elaboration control*
  
--- 300,306 ----
    The restrictions above can be summarized by the following rule:
  
    *If a target has a body, then this body must be elaborated prior to the
!   scenario that invokes the target.*
  
  * *Elaboration control*
  
*************** the desired elaboration order and avoidi
*** 346,352 ****
  
    Pragma ``Elaborate_Body`` requires that the body of a unit is elaborated
    immediately after its spec. This restriction guarantees that no client
!   scenario can execute a server target before the target body has been
    elaborated because the spec and body are effectively "glued" together.
  
    ::
--- 355,361 ----
  
    Pragma ``Elaborate_Body`` requires that the body of a unit is elaborated
    immediately after its spec. This restriction guarantees that no client
!   scenario can invoke a server target before the target body has been
    elaborated because the spec and body are effectively "glued" together.
  
    ::
*************** depend on.
*** 536,542 ****
    be elaborated prior to ``Client``.
  
    Removing pragma ``Elaborate_All`` could result in the following incorrect
!   elaboration order
  
    ::
  
--- 545,551 ----
    be elaborated prior to ``Client``.
  
    Removing pragma ``Elaborate_All`` could result in the following incorrect
!   elaboration order:
  
    ::
  
*************** elaboration order and to diagnose elabor
*** 601,624 ****
  
  * *Dynamic elaboration model*
  
!   This is the most permissive of the three elaboration models. When the
!   dynamic model is in effect, GNAT assumes that all code within all units in
!   a partition is elaboration code. GNAT performs very few diagnostics and
!   generates run-time checks to verify the elaboration order of a program. This
!   behavior is identical to that specified by the Ada Reference Manual. The
!   dynamic model is enabled with compiler switch :switch:`-gnatE`.
  
  .. index:: Static elaboration model
  
  * *Static elaboration model*
  
    This is the middle ground of the three models. When the static model is in
!   effect, GNAT performs extensive diagnostics on a unit-by-unit basis for all
!   scenarios that elaborate or execute internal targets. GNAT also generates
!   run-time checks for all external targets and for all scenarios that may
!   exhibit ABE problems. Finally, GNAT installs implicit ``Elaborate`` and
!   ``Elaborate_All`` pragmas for server units based on the dependencies of
!   client units. The static model is the default model in GNAT.
  
  .. index:: SPARK elaboration model
  
--- 610,662 ----
  
  * *Dynamic elaboration model*
  
!   This is the most permissive of the three elaboration models and emulates the
!   behavior specified by the Ada Reference Manual. When the dynamic model is in
!   effect, GNAT makes the following assumptions:
! 
!   - All code within all units in a partition is considered to be elaboration
!     code.
! 
!   - Some of the invocations in elaboration code may not take place at run time
!     due to conditional execution.
! 
!   GNAT performs extensive diagnostics on a unit-by-unit basis for all scenarios
!   that invoke internal targets. In addition, GNAT generates run-time checks for
!   all external targets and for all scenarios that may exhibit ABE problems.
! 
!   The elaboration order is obtained by honoring all |with| clauses, purity and
!   preelaborability of units, and elaboration-control pragmas. The dynamic model
!   attempts to take all invocations in elaboration code into account. If an
!   invocation leads to a circularity, GNAT ignores the invocation based on the
!   assumptions stated above. An order obtained using the dynamic model may fail
!   an ABE check at run time when GNAT ignored an invocation.
! 
!   The dynamic model is enabled with compiler switch :switch:`-gnatE`.
  
  .. index:: Static elaboration model
  
  * *Static elaboration model*
  
    This is the middle ground of the three models. When the static model is in
!   effect, GNAT makes the following assumptions:
! 
!   - Only code at the library level and in package body statements within all
!     units in a partition is considered to be elaboration code.
! 
!   - All invocations in elaboration will take place at run time, regardless of
!     conditional execution.
! 
!   GNAT performs extensive diagnostics on a unit-by-unit basis for all scenarios
!   that invoke internal targets. In addition, GNAT generates run-time checks for
!   all external targets and for all scenarios that may exhibit ABE problems.
! 
!   The elaboration order is obtained by honoring all |with| clauses, purity and
!   preelaborability of units, presence of elaboration-control pragmas, and all
!   invocations in elaboration code. An order obtained using the static model is
!   guaranteed to be ABE problem-free, excluding dispatching calls and
!   access-to-subprogram types.
! 
!   The static model is the default model in GNAT.
  
  .. index:: SPARK elaboration model
  
*************** elaboration order and to diagnose elabor
*** 627,643 ****
    This is the most conservative of the three models and enforces the SPARK
    rules of elaboration as defined in the SPARK Reference Manual, section 7.7.
    The SPARK model is in effect only when a scenario and a target reside in a
!   region subject to SPARK_Mode On, otherwise the dynamic or static model is in
!   effect.
  
! .. index:: Legacy elaboration model
  
! * *Legacy elaboration model*
  
    In addition to the three elaboration models outlined above, GNAT provides the
!   elaboration model of pre-18.x versions referred to as `legacy elaboration
!   model`. The legacy elaboration model is enabled with compiler switch
!   :switch:`-gnatH`.
  
  .. index:: Relaxed elaboration mode
  
--- 665,687 ----
    This is the most conservative of the three models and enforces the SPARK
    rules of elaboration as defined in the SPARK Reference Manual, section 7.7.
    The SPARK model is in effect only when a scenario and a target reside in a
!   region subject to ``SPARK_Mode On``, otherwise the dynamic or static model
!   is in effect.
  
!   The SPARK model is enabled with compiler switch :switch:`-gnatd.v`.
  
! .. index:: Legacy elaboration models
! 
! * *Legacy elaboration models*
  
    In addition to the three elaboration models outlined above, GNAT provides the
!   following legacy models:
! 
!   - `Legacy elaboration-checking model` available in pre-18.x versions of GNAT.
!     This model is enabled with compiler switch :switch:`-gnatH`.
! 
!   - `Legacy elaboration-order model` available in pre-20.x versions of GNAT.
!     This model is enabled with binder switch :switch:`-H`.
  
  .. index:: Relaxed elaboration mode
  
*************** The dynamic, legacy, and static models c
*** 645,1456 ****
  :switch:`-gnatJ`, making them more permissive. Note that in this mode, GNAT
  may not diagnose certain elaboration issues or install run-time checks.
  
! .. _Common_Elaboration_Model_Traits":
  
! Common Elaboration-model Traits
! ===============================
  
! All three GNAT models are able to detect elaboration problems related to
! dispatching calls and a particular kind of ABE referred to as *guaranteed ABE*.
  
! * *Dispatching calls*
  
!   GNAT installs run-time checks for each primitive subprogram of each tagged
!   type defined in a partition on the assumption that a dispatching call
!   invoked at elaboration time will execute one of these primitives. As a
!   result, a dispatching call that executes a primitive whose body has not
!   been elaborated yet will raise exception ``Program_Error`` at run time. The
!   checks can be suppressed using pragma ``Suppress (Elaboration_Check)``.
  
! * *Guaranteed ABE*
  
!   A guaranteed ABE arises when the body of a target is not elaborated early
!   enough, and causes all scenarios that directly execute the target to fail.
  
!   ::
  
!      package body Guaranteed_ABE is
!         function ABE return Integer;
  
!         Val : constant Integer := ABE;
  
!         function ABE return Integer is
!         begin
!            ...
!         end ABE;
!      end Guaranteed_ABE;
  
!   In the example above, the elaboration of ``Guaranteed_ABE``'s body elaborates
!   the declaration of ``Val``. This invokes function ``ABE``, however the body
!   of ``ABE`` has not been elaborated yet. GNAT emits similar diagnostics in all
!   three models:
  
!   ::
  
!       1. package body Guaranteed_ABE is
!       2.    function ABE return Integer;
!       3.
!       4.    Val : constant Integer := ABE;
!                                       |
!          >>> warning: cannot call "ABE" before body seen
!          >>> warning: Program_Error will be raised at run time
  
!       5.
!       6.    function ABE return Integer is
!       7.    begin
!       8.       ...
!       9.    end ABE;
!       10. end Guaranteed_ABE;
  
  Note that GNAT emits warnings rather than hard errors whenever it encounters an
  elaboration problem. This is because the elaboration model in effect may be too
! conservative, or a particular scenario may not be elaborated or executed due to
! data and control flow. The warnings can be suppressed selectively with ``pragma
! Warnigns (Off)`` or globally with compiler switch :switch:`-gnatwL`.
! 
! .. _Dynamic_Elaboration_Model_in_GNAT:
! 
! Dynamic Elaboration Model in GNAT
! =================================
! 
! The dynamic model assumes that all code within all units in a partition is
! elaboration code. As a result, run-time checks are installed for each scenario
! regardless of whether the target is internal or external. The checks can be
! suppressed using pragma ``Suppress (Elaboration_Check)``. This behavior is
! identical to that specified by the Ada Reference Manual. The following example
! showcases run-time checks installed by GNAT to verify the elaboration state of
! package ``Dynamic_Model``.
! 
! ::
! 
!    with Server;
!    package body Dynamic_Model is
!       procedure API is
!       begin
!          ...
!       end API;
! 
!       <check that the body of Server.Gen is elaborated>
!       package Inst is new Server.Gen;
! 
!       T : Server.Task_Type;
! 
!    begin
!       <check that the body of Server.Task_Type is elaborated>
! 
!       <check that the body of Server.Proc is elaborated>
!       Server.Proc;
!    end Dynamic_Model;
! 
! The checks verify that the body of a target has been successfully elaborated
! before a scenario activates, calls, or instantiates a target.
! 
! Note that no scenario within package ``Dynamic_Model`` calls procedure ``API``.
! In fact, procedure ``API`` may not be invoked by elaboration code within the
! partition, however the dynamic model assumes that this can happen.
  
! The dynamic model emits very few diagnostics, but can make suggestions on
! missing ``Elaborate`` and ``Elaborate_All`` pragmas for library-level
! scenarios. This information is available when compiler switch :switch:`-gnatel`
! is in effect.
  
! ::
  
!    1. with Server;
!    2. package body Dynamic_Model is
!    3.    Val : constant Integer := Server.Func;
!                                          |
!       >>> info: call to "Func" during elaboration
!       >>> info: missing pragma "Elaborate_All" for unit "Server"
  
!    4. end Dynamic_Model;
  
! .. _Static_Elaboration_Model_in_GNAT:
  
! Static Elaboration Model in GNAT
! ================================
  
! In contrast to the dynamic model, the static model is more precise in its
! analysis of elaboration code. The model makes a clear distinction between
! internal and external targets, and resorts to different diagnostics and
! run-time checks based on the nature of the target.
  
! * *Internal targets*
  
!   The static model performs extensive diagnostics on scenarios which elaborate
!   or execute internal targets. The warnings resulting from these diagnostics
!   are enabled by default, but can be suppressed selectively with ``pragma
!   Warnings (Off)`` or globally with compiler switch :switch:`-gnatwL`.
  
    ::
  
!       1. package body Static_Model is
!       2.    generic
!       3.       with function Func return Integer;
!       4.    package Gen is
!       5.       Val : constant Integer := Func;
!       6.    end Gen;
!       7.
!       8.    function ABE return Integer;
        9.
!      10.    function Cause_ABE return Boolean is
!      11.       package Inst is new Gen (ABE);
!                |
!          >>> warning: in instantiation at line 5
!          >>> warning: cannot call "ABE" before body seen
!          >>> warning: Program_Error may be raised at run time
!          >>> warning:   body of unit "Static_Model" elaborated
!          >>> warning:   function "Cause_ABE" called at line 16
!          >>> warning:   function "ABE" called at line 5, instance at line 11
! 
!      12.    begin
!      13.       ...
!      14.    end Cause_ABE;
!      15.
!      16.    Val : constant Boolean := Cause_ABE;
       17.
!      18.    function ABE return Integer is
!      19.    begin
!      20.       ...
!      21.    end ABE;
!      22. end Static_Model;
! 
!   The example above illustrates an ABE problem within package ``Static_Model``,
!   which is hidden by several layers of indirection. The elaboration of package
!   body ``Static_Model`` elaborates the declaration of ``Val``. This invokes
!   function ``Cause_ABE``, which instantiates generic unit ``Gen`` as ``Inst``.
!   The elaboration of ``Inst`` invokes function ``ABE``, however the body of
!   ``ABE`` has not been elaborated yet.
! 
! * *External targets*
! 
!   The static model installs run-time checks to verify the elaboration status
!   of server targets only when the scenario that elaborates or executes that
!   target is part of the elaboration code of the client unit. The checks can be
!   suppressed using pragma ``Suppress (Elaboration_Check)``.
! 
!   ::
! 
!      with Server;
!      package body Static_Model is
!         generic
!            with function Func return Integer;
!         package Gen is
!            Val : constant Integer := Func;
!         end Gen;
! 
!         function Call_Func return Boolean is
!            <check that the body of Server.Func is elaborated>
!            package Inst is new Gen (Server.Func);
!         begin
!            ...
!         end Call_Func;
! 
!         Val : constant Boolean := Call_Func;
!      end Static_Model;
! 
!   In the example above, the elaboration of package body ``Static_Model``
!   elaborates the declaration of ``Val``. This invokes function ``Call_Func``,
!   which instantiates generic unit ``Gen`` as ``Inst``. The elaboration of
!   ``Inst`` invokes function ``Server.Func``. Since ``Server.Func`` is an
!   external target, GNAT installs a run-time check to verify that its body has
!   been elaborated.
  
!   In addition to checks, the static model installs implicit ``Elaborate`` and
!   ``Elaborate_All`` pragmas to guarantee safe elaboration use of server units.
!   This information is available when compiler switch :switch:`-gnatel` is in
!   effect.
  
    ::
  
!       1. with Server;
!       2. package body Static_Model is
!       3.    generic
!       4.       with function Func return Integer;
!       5.    package Gen is
!       6.       Val : constant Integer := Func;
!       7.    end Gen;
!       8.
!       9.    function Call_Func return Boolean is
!      10.       package Inst is new Gen (Server.Func);
                 |
!          >>> info: instantiation of "Gen" during elaboration
!          >>> info: in instantiation at line 6
!          >>> info: call to "Func" during elaboration
!          >>> info: in instantiation at line 6
!          >>> info: implicit pragma "Elaborate_All" generated for unit "Server"
!          >>> info:   body of unit "Static_Model" elaborated
!          >>> info:   function "Call_Func" called at line 15
!          >>> info:   function "Func" called at line 6, instance at line 10
! 
!      11.    begin
!      12.       ...
!      13.    end Call_Func;
!      14.
!      15.    Val : constant Boolean := Call_Func;
!                                       |
!          >>> info: call to "Call_Func" during elaboration
! 
!      16. end Static_Model;
! 
!   In the example above, the elaboration of package body ``Static_Model``
!   elaborates the declaration of ``Val``. This invokes function ``Call_Func``,
!   which instantiates generic unit ``Gen`` as ``Inst``. The elaboration of
!   ``Inst`` invokes function ``Server.Func``. Since ``Server.Func`` is an
!   external target, GNAT installs an implicit ``Elaborate_All`` pragma for unit
!   ``Server``. The pragma guarantees that both the spec and body of ``Server``,
!   along with any additional dependencies that ``Server`` may require, are
!   elaborated prior to the body of ``Static_Model``.
! 
! .. _SPARK_Elaboration_Model_in_GNAT:
  
! SPARK Elaboration Model in GNAT
! ===============================
  
! The SPARK model is identical to the static model in its handling of internal
! targets. The SPARK model, however, requires explicit ``Elaborate`` or
! ``Elaborate_All`` pragmas to be present in the program when a target is
! external, and compiler switch :switch:`-gnatd.v` is in effect.
  
! ::
  
!    1. with Server;
!    2. package body SPARK_Model with SPARK_Mode is
!    3.    Val : constant Integer := Server.Func;
!                                          |
!       >>> call to "Func" during elaboration in SPARK
!       >>> unit "SPARK_Model" requires pragma "Elaborate_All" for "Server"
!       >>>   body of unit "SPARK_Model" elaborated
!       >>>   function "Func" called at line 3
  
!    4. end SPARK_Model;
  
! Legacy Elaboration Model in GNAT
! ================================
  
! The legacy elaboration model is provided for compatibility with code bases
! developed with pre-18.x versions of GNAT. It is similar in functionality to
! the dynamic and static models of post-18.x version of GNAT, but may differ
! in terms of diagnostics and run-time checks. The legacy elaboration model is
! enabled with compiler switch :switch:`-gnatH`.
  
! .. _Mixing_Elaboration_Models:
  
! Mixing Elaboration Models
  =========================
  
! It is possible to mix units compiled with a different elaboration model,
! however the following rules must be observed:
! 
! * A client unit compiled with the dynamic model can only |with| a server unit
!   that meets at least one of the following criteria:
  
!   - The server unit is compiled with the dynamic model.
  
!   - The server unit is a GNAT implementation unit from the Ada, GNAT,
!     Interfaces, or System hierarchies.
  
!   - The server unit has pragma ``Pure`` or ``Preelaborate``.
  
!   - The client unit has an explicit ``Elaborate_All`` pragma for the server
!     unit.
  
! These rules ensure that elaboration checks are not omitted. If the rules are
! violated, the binder emits a warning:
  
! ::
  
!    warning: "x.ads" has dynamic elaboration checks and with's
!    warning:   "y.ads" which has static elaboration checks
  
! The warnings can be suppressed by binder switch :switch:`-ws`.
  
! .. _Elaboration_Circularities:
  
! Elaboration Circularities
! =========================
  
! If the binder cannot find an acceptable elaboration order, it outputs detailed
! diagnostics describing an **elaboration circularity**.
  
! ::
  
!    package Server is
!       function Func return Integer;
!    end Server;
  
! ::
  
!    with Client;
!    package body Server is
!       function Func return Integer is
!       begin
!          ...
!       end Func;
!    end Server;
  
! ::
  
!    with Server;
!    package Client is
!       Val : constant Integer := Server.Func;
!    end Client;
  
! ::
  
!    with Client;
!    procedure Main is begin null; end Main;
  
! ::
  
!    error: elaboration circularity detected
!    info:    "server (body)" must be elaborated before "client (spec)"
!    info:       reason: implicit Elaborate_All in unit "client (spec)"
!    info:       recompile "client (spec)" with -gnatel for full details
!    info:          "server (body)"
!    info:             must be elaborated along with its spec:
!    info:          "server (spec)"
!    info:             which is withed by:
!    info:          "client (spec)"
!    info:    "client (spec)" must be elaborated before "server (body)"
!    info:       reason: with clause
  
! In the example above, ``Client`` must be elaborated prior to ``Main`` by virtue
! of a |with| clause. The elaboration of ``Client`` invokes ``Server.Func``, and
! static model generates an implicit ``Elaborate_All`` pragma for ``Server``. The
! pragma implies that both the spec and body of ``Server``, along with any units
! they |with|, must be elaborated prior to ``Client``. However, ``Server``'s body
! |withs| ``Client``, implying that ``Client`` must be elaborated prior to
! ``Server``. The end result is that ``Client`` must be elaborated prior to
! ``Client``, and this leads to a circularity.
  
  .. _Resolving_Elaboration_Circularities:
  
  Resolving Elaboration Circularities
  ===================================
  
! When faced with an elaboration circularity, a programmer has several options
! available.
! 
! * *Fix the program*
! 
!   The most desirable option from the point of view of long-term maintenance
!   is to rearrange the program so that the elaboration problems are avoided.
!   One useful technique is to place the elaboration code into separate child
!   packages. Another is to move some of the initialization code to explicitly
!   invoked subprograms, where the program controls the order of initialization
!   explicitly. Although this is the most desirable option, it may be impractical
!   and involve too much modification, especially in the case of complex legacy
!   code.
! 
! * *Switch to more permissive elaboration model*
! 
!   If the compilation was performed using the static model, enable the dynamic
!   model with compiler switch :switch:`-gnatE`. GNAT will no longer generate
!   implicit ``Elaborate`` and ``Elaborate_All`` pragmas, resulting in a behavior
!   identical to that specified by the Ada Reference Manual. The binder will
!   generate an executable program that may or may not raise ``Program_Error``,
!   and it is the programmer's responsibility to ensure that it does not raise
!   ``Program_Error``.
! 
!   If the compilation was performed using a post-18.x version of GNAT, consider
!   using the legacy elaboration model, in the following order:
! 
!   - Use the legacy static elaboration model, with compiler switch
!     :switch:`-gnatH`.
! 
!   - Use the legacy dynamic elaboration model, with compiler switches
!     :switch:`-gnatH` :switch:`-gnatE`.
! 
!   - Use the relaxed legacy static elaboration model, with compiler switches
!     :switch:`-gnatH` :switch:`-gnatJ`.
! 
!   - Use the relaxed legacy dynamic elaboration model, with compiler switches
!     :switch:`-gnatH` :switch:`-gnatJ` :switch:`-gnatE`.
! 
! * *Suppress all elaboration checks*
! 
!   The drawback of run-time checks is that they generate overhead at run time,
!   both in space and time. If the programmer is absolutely sure that a program
!   will not raise an elaboration-related ``Program_Error``, then using the
!   pragma ``Suppress (Elaboration_Check)`` globally (as a configuration pragma)
!   will eliminate all run-time checks.
! 
! * *Suppress elaboration checks selectively*
! 
!   If a scenario cannot possibly lead to an elaboration ``Program_Error``,
!   and the binder nevertheless complains about implicit ``Elaborate`` and
!   ``Elaborate_All`` pragmas that lead to elaboration circularities, it
!   is possible to suppress the generation of implicit ``Elaborate`` and
!   ``Elaborate_All`` pragmas, as well as run-time checks. Clearly this can
!   be unsafe, and it is the responsibility of the programmer to make sure
!   that the resulting program has no elaboration anomalies. Pragma
!   ``Suppress (Elaboration_Check)`` can be used with different levels of
!   granularity to achieve these effects.
! 
!   - *Target suppression*
! 
!     When the pragma is placed in a declarative part, without a second argument
!     naming an entity, it will suppress implicit ``Elaborate`` and
!     ``Elaborate_All`` pragma generation, as well as run-time checks, on all
!     targets within the region.
! 
!     ::
! 
!        package Range_Suppress is
!           pragma Suppress (Elaboration_Check);
! 
!           function Func return Integer;
! 
!           generic
!           procedure Gen;
! 
!           pragma Unsuppress (Elaboration_Check);
! 
!           task type Tsk;
!        end Range_Suppress;
! 
!     In the example above, a pair of Suppress/Unsuppress pragmas define a region
!     of suppression within package ``Range_Suppress``. As a result, no implicit
!     ``Elaborate`` and ``Elaborate_All`` pragmas, nor any run-time checks, will
!     be generated by callers of ``Func`` and instantiators of ``Gen``. Note that
!     task type ``Tsk`` is not within this region.
! 
!     An alternative to the region-based suppression is to use multiple
!     ``Suppress`` pragmas with arguments naming specific entities for which
!     elaboration checks should be suppressed:
! 
!     ::
! 
!        package Range_Suppress is
!           function Func return Integer;
!           pragma Suppress (Elaboration_Check, Func);
! 
!           generic
!           procedure Gen;
!           pragma Suppress (Elaboration_Check, Gen);
! 
!           task type Tsk;
!        end Range_Suppress;
! 
!   - *Scenario suppression*
  
!     When the pragma ``Suppress`` is placed in a declarative or statement
!     part, without an entity argument, it will suppress implicit ``Elaborate``
!     and ``Elaborate_All`` pragma generation, as well as run-time checks, on
!     all scenarios within the region.
  
!     ::
  
!        with Server;
!        package body Range_Suppress is
!           pragma Suppress (Elaboration_Check);
  
!           function Func return Integer is
!           begin
!              return Server.Func;
!           end Func;
  
!           procedure Gen is
!           begin
!              Server.Proc;
!           end Gen;
  
!           pragma Unsuppress (Elaboration_Check);
  
!           task body Tsk is
!           begin
!              Server.Proc;
!           end Tsk;
!        end Range_Suppress;
  
!     In the example above, a pair of Suppress/Unsuppress pragmas define a region
!     of suppression within package body ``Range_Suppress``. As a result, the
!     calls to ``Server.Func`` in ``Func`` and ``Server.Proc`` in ``Gen`` will
!     not generate any implicit ``Elaborate`` and ``Elaborate_All`` pragmas or
!     run-time checks.
  
! .. _Resolving_Task_Issues:
  
! Resolving Task Issues
! =====================
  
! The model of execution in Ada dictates that elaboration must first take place,
! and only then can the main program be started. Tasks which are activated during
! elaboration violate this model and may lead to serious concurrent problems at
! elaboration time.
  
! A task can be activated in two different ways:
  
! * The task is created by an allocator in which case it is activated immediately
!   after the allocator is evaluated.
  
! * The task is declared at the library level or within some nested master in
!   which case it is activated before starting execution of the statement
!   sequence of the master defining the task.
  
! Since the elaboration of a partition is performed by the environment task
! servicing that partition, any tasks activated during elaboration may be in
! a race with the environment task, and lead to unpredictable state and behavior.
! The static model seeks to avoid such interactions by assuming that all code in
! the task body is executed at elaboration time, if the task was activated by
! elaboration code.
  
! ::
  
!    package Decls is
!       task Lib_Task is
!          entry Start;
!       end Lib_Task;
  
!       type My_Int is new Integer;
  
!       function Ident (M : My_Int) return My_Int;
!    end Decls;
  
! ::
  
!    with Utils;
!    package body Decls is
!       task body Lib_Task is
!       begin
!          accept Start;
!          Utils.Put_Val (2);
!       end Lib_Task;
  
!       function Ident (M : My_Int) return My_Int is
!       begin
!          return M;
!       end Ident;
!    end Decls;
  
! ::
  
!    with Decls;
!    package Utils is
!       procedure Put_Val (Arg : Decls.My_Int);
!    end Utils;
  
! ::
  
!    with Ada.Text_IO; use Ada.Text_IO;
!    package body Utils is
!       procedure Put_Val (Arg : Decls.My_Int) is
!       begin
!          Put_Line (Arg'Img);
!       end Put_Val;
!    end Utils;
  
! ::
  
!    with Decls;
!    procedure Main is
!    begin
!       Decls.Lib_Task.Start;
!    end Main;
  
! When the above example is compiled with the static model, an elaboration
! circularity arises:
  
! ::
  
!    error: elaboration circularity detected
!    info:    "decls (body)" must be elaborated before "decls (body)"
!    info:       reason: implicit Elaborate_All in unit "decls (body)"
!    info:       recompile "decls (body)" with -gnatel for full details
!    info:          "decls (body)"
!    info:             must be elaborated along with its spec:
!    info:          "decls (spec)"
!    info:             which is withed by:
!    info:          "utils (spec)"
!    info:             which is withed by:
!    info:          "decls (body)"
  
! In the above example, ``Decls`` must be elaborated prior to ``Main`` by virtue
! of a with clause. The elaboration of ``Decls`` activates task ``Lib_Task``. The
! static model conservatibely assumes that all code within the body of
! ``Lib_Task`` is executed, and generates an implicit ``Elaborate_All`` pragma
! for ``Units`` due to the call to ``Utils.Put_Val``. The pragma implies that
! both the spec and body of ``Utils``, along with any units they |with|,
! must be elaborated prior to ``Decls``. However, ``Utils``'s spec |withs|
! ``Decls``, implying that ``Decls`` must be elaborated before ``Utils``. The end
! result is that ``Utils`` must be elaborated prior to ``Utils``, and this
! leads to a circularity.
  
! In reality, the example above will not exhibit an ABE problem at run time.
! When the body of task ``Lib_Task`` is activated, execution will wait for entry
! ``Start`` to be accepted, and the call to ``Utils.Put_Val`` will not take place
! at elaboration time. Task ``Lib_Task`` will resume its execution after the main
! program is executed because ``Main`` performs a rendezvous with
! ``Lib_Task.Start``, and at that point all units have already been elaborated.
! As a result, the static model may seem overly conservative, partly because it
! does not take control and data flow into account.
  
! When faced with a task elaboration circularity, a programmer has several
! options available:
  
! * *Use the dynamic model*
  
!   The dynamic model does not generate implicit ``Elaborate`` and
!   ``Elaborate_All`` pragmas. Instead, it will install checks prior to every
!   call in the example above, thus verifying the successful elaboration of
!   ``Utils.Put_Val`` in case the call to it takes place at elaboration time.
!   The dynamic model is enabled with compiler switch :switch:`-gnatE`.
  
! * *Isolate the tasks*
  
!   Relocating tasks in their own separate package could decouple them from
!   dependencies that would otherwise cause an elaboration circularity. The
!   example above can be rewritten as follows:
  
    ::
  
!      package Decls1 is                --  new
!         task Lib_Task is
!            entry Start;
!         end Lib_Task;
!      end Decls1;
! 
!   ::
  
!      with Utils;
!      package body Decls1 is           --  new
!         task body Lib_Task is
!         begin
!            accept Start;
!            Utils.Put_Val (2);
!         end Lib_Task;
!      end Decls1;
  
!   ::
  
!      package Decls2 is                --  new
!         type My_Int is new Integer;
!         function Ident (M : My_Int) return My_Int;
!      end Decls2;
  
!   ::
  
!      with Utils;
!      package body Decls2 is           --  new
!         function Ident (M : My_Int) return My_Int is
!         begin
!            return M;
!         end Ident;
!      end Decls2;
  
!   ::
  
!      with Decls2;
!      package Utils is
!         procedure Put_Val (Arg : Decls2.My_Int);
!      end Utils;
  
    ::
  
!      with Ada.Text_IO; use Ada.Text_IO;
!      package body Utils is
!         procedure Put_Val (Arg : Decls2.My_Int) is
!         begin
!            Put_Line (Arg'Img);
!         end Put_Val;
!      end Utils;
  
!   ::
  
!      with Decls1;
!      procedure Main is
!      begin
!         Decls1.Lib_Task.Start;
!      end Main;
!    
! * *Declare the tasks*
  
!   The original example uses a single task declaration for ``Lib_Task``. An
!   explicit task type declaration and a properly placed task object could avoid
!   the dependencies that would otherwise cause an elaboration circularity. The
!   example can be rewritten as follows:
  
    ::
  
!      package Decls is
!         task type Lib_Task is         --  new
!            entry Start;
!         end Lib_Task;
  
!         type My_Int is new Integer;
  
!         function Ident (M : My_Int) return My_Int;
!      end Decls;
  
!   ::
  
!      with Utils;
!      package body Decls is
!         task body Lib_Task is
!         begin
!            accept Start;
!            Utils.Put_Val (2);
!         end Lib_Task;
  
!         function Ident (M : My_Int) return My_Int is
!         begin
!            return M;
!         end Ident;
!      end Decls;
  
    ::
  
!      with Decls;
!      package Utils is
!         procedure Put_Val (Arg : Decls.My_Int);
!      end Utils;
! 
!   ::
  
!      with Ada.Text_IO; use Ada.Text_IO;
!      package body Utils is
!         procedure Put_Val (Arg : Decls.My_Int) is
!         begin
!            Put_Line (Arg'Img);
!         end Put_Val;
!      end Utils;
  
!   ::
  
!      with Decls;
!      package Obj_Decls is             --  new
!         Task_Obj : Decls.Lib_Task;
!      end Obj_Decls;
  
    ::
  
!      with Obj_Decls;
!      procedure Main is
!      begin
!         Obj_Decls.Task_Obj.Start;     --  new
!      end Main;
  
! * *Use restriction No_Entry_Calls_In_Elaboration_Code*
  
!   The issue exhibited in the original example under this section revolves
!   around the body of ``Lib_Task`` blocking on an accept statement. There is
!   no rule to prevent elaboration code from performing entry calls, however in
!   practice this is highly unusual. In addition, the pattern of starting tasks
!   at elaboration time and then immediately blocking on accept or select
!   statements is quite common.
  
!   If a programmer knows that elaboration code will not perform any entry
!   calls, then the programmer can indicate that the static model should not
!   process the remainder of a task body once an accept or select statement has
!   been encountered. This behavior can be specified by a configuration pragma:
  
!   ::
  
!      pragma Restrictions (No_Entry_Calls_In_Elaboration_Code);
  
!   In addition to the change in behavior with respect to task bodies, the
!   static model will verify that no entry calls take place at elaboration time.
  
  .. _Elaboration_Related_Compiler_Switches:
  
--- 689,1135 ----
  :switch:`-gnatJ`, making them more permissive. Note that in this mode, GNAT
  may not diagnose certain elaboration issues or install run-time checks.
  
! .. _Mixing_Elaboration_Models:
  
! Mixing Elaboration Models
! =========================
  
! It is possible to mix units compiled with a different elaboration model,
! however the following rules must be observed:
  
! * A client unit compiled with the dynamic model can only |with| a server unit
!   that meets at least one of the following criteria:
  
!   - The server unit is compiled with the dynamic model.
  
!   - The server unit is a GNAT implementation unit from the ``Ada``, ``GNAT``,
!     ``Interfaces``, or ``System`` hierarchies.
  
!   - The server unit has pragma ``Pure`` or ``Preelaborate``.
  
!   - The client unit has an explicit ``Elaborate_All`` pragma for the server
!     unit.
  
! These rules ensure that elaboration checks are not omitted. If the rules are
! violated, the binder emits a warning:
  
!   ::
  
!      warning: "x.ads" has dynamic elaboration checks and with's
!      warning:   "y.ads" which has static elaboration checks
  
! The warnings can be suppressed by binder switch :switch:`-ws`.
  
! .. _ABE_Diagnostics:
  
! ABE Diagnostics
! ===============
  
! GNAT performs extensive diagnostics on a unit-by-unit basis for all scenarios
! that invoke internal targets, regardless of whether the dynamic, SPARK, or
! static model is in effect.
  
  Note that GNAT emits warnings rather than hard errors whenever it encounters an
  elaboration problem. This is because the elaboration model in effect may be too
! conservative, or a particular scenario may not be invoked due conditional
! execution. The warnings can be suppressed selectively with ``pragma Warnings
! (Off)`` or globally with compiler switch :switch:`-gnatwL`.
  
! A *guaranteed ABE* arises when the body of a target is not elaborated early
! enough, and causes *all* scenarios that directly invoke the target to fail.
  
!   ::
  
!      package body Guaranteed_ABE is
!         function ABE return Integer;
  
!         Val : constant Integer := ABE;
  
!         function ABE return Integer is
!         begin
!           ...
!         end ABE;
!      end Guaranteed_ABE;
  
! In the example above, the elaboration of ``Guaranteed_ABE``'s body elaborates
! the declaration of ``Val``. This invokes function ``ABE``, however the body of
! ``ABE`` has not been elaborated yet. GNAT emits the following diagnostic:
  
!   ::
  
!      4.    Val : constant Integer := ABE;
!                                      |
!         >>> warning: cannot call "ABE" before body seen
!         >>> warning: Program_Error will be raised at run time
  
! A *conditional ABE* arises when the body of a target is not elaborated early
! enough, and causes *some* scenarios that directly invoke the target to fail.
  
    ::
  
!       1. package body Conditional_ABE is
!       2.    procedure Force_Body is null;
!       3.
!       4.    generic
!       5.       with function Func return Integer;
!       6.    package Gen is
!       7.       Val : constant Integer := Func;
!       8.    end Gen;
        9.
!      10.    function ABE return Integer;
!      11.
!      12.    function Cause_ABE return Boolean is
!      13.       package Inst is new Gen (ABE);
!      14.    begin
!      15.       ...
!      16.    end Cause_ABE;
       17.
!      18.    Val : constant Boolean := Cause_ABE;
!      19.
!      20.    function ABE return Integer is
!      21.    begin
!      22.       ...
!      23.    end ABE;
!      24.
!      25.    Safe : constant Boolean := Cause_ABE;
!      26. end Conditional_ABE;
  
! In the example above, the elaboration of package body ``Conditional_ABE``
! elaborates the declaration of ``Val``. This invokes function ``Cause_ABE``,
! which instantiates generic unit ``Gen`` as ``Inst``. The elaboration of
! ``Inst`` invokes function ``ABE``, however the body of ``ABE`` has not been
! elaborated yet. GNAT emits the following diagnostic:
  
    ::
  
!      13.       package Inst is new Gen (ABE);
                 |
!          >>> warning: in instantiation at line 7
!          >>> warning: cannot call "ABE" before body seen
!          >>> warning: Program_Error may be raised at run time
!          >>> warning:   body of unit "Conditional_ABE" elaborated
!          >>> warning:   function "Cause_ABE" called at line 18
!          >>> warning:   function "ABE" called at line 7, instance at line 13
  
! Note that the same ABE problem does not occur with the elaboration of
! declaration ``Safe`` because the body of function ``ABE`` has already been
! elaborated at that point.
  
! .. _SPARK_Diagnostics:
  
! SPARK Diagnostics
! =================
  
! GNAT enforces the SPARK rules of elaboration as defined in the SPARK Reference
! Manual section 7.7 when compiler switch :switch:`-gnatd.v` is in effect. Note
! that GNAT emits hard errors whenever it encounters a violation of the SPARK
! rules.
  
!   ::
  
!      1. with Server;
!      2. package body SPARK_Diagnostics with SPARK_Mode is
!      3.    Val : constant Integer := Server.Func;
!                                            |
!         >>> call to "Func" during elaboration in SPARK
!         >>> unit "SPARK_Diagnostics" requires pragma "Elaborate_All" for "Server"
!         >>>   body of unit "SPARK_Model" elaborated
!         >>>   function "Func" called at line 3
  
!      4. end SPARK_Diagnostics;
  
! .. _Elaboration_Circularities:
  
! Elaboration Circularities
  =========================
  
! An **elaboration circularity** occurs whenever the elaboration of a set of
! units enters a deadlocked state, where each unit is waiting for another unit
! to be elaborated. This situation may be the result of improper use of |with|
! clauses, elaboration-control pragmas, or invocations in elaboration code.
  
! The following example exhibits an elaboration circularity.
  
!   ::
  
!      with B; pragma Elaborate (B);
!      package A is
!      end A;
  
!   ::
  
!      package B is
!         procedure Force_Body;
!      end B;
  
!   ::
  
!      with C;
!      package body B is
!         procedure Force_Body is null;
  
!         Elab : constant Integer := C.Func;
!      end B;
  
!   ::
  
!      package C is
!         function Func return Integer;
!      end C;
  
!   ::
  
!      with A;
!      package body C is
!         function Func return Integer is
!         begin
!            ...
!         end Func;
!      end C;
  
! The binder emits the following diagnostic:
  
!   ::
  
!      error: Elaboration circularity detected
!      info:
!      info:    Reason:
!      info:
!      info:      unit "a (spec)" depends on its own elaboration
!      info:
!      info:    Circularity:
!      info:
!      info:      unit "a (spec)" has with clause and pragma Elaborate for unit "b (spec)"
!      info:      unit "b (body)" is in the closure of pragma Elaborate
!      info:      unit "b (body)" invokes a construct of unit "c (body)" at elaboration time
!      info:      unit "c (body)" has with clause for unit "a (spec)"
!      info:
!      info:    Suggestions:
!      info:
!      info:      remove pragma Elaborate for unit "b (body)" in unit "a (spec)"
!      info:      use the dynamic elaboration model (compiler switch -gnatE)
  
! The diagnostic consist of the following sections:
  
! * Reason
  
!   This section provides a short explanation describing why the set of units
!   could not be ordered.
  
! * Circularity
  
!   This section enumerates the units comprising the deadlocked set, along with
!   their interdependencies.
  
! * Suggestions
  
!   This section enumerates various tactics for eliminating the circularity.
  
  .. _Resolving_Elaboration_Circularities:
  
  Resolving Elaboration Circularities
  ===================================
  
! The most desirable option from the point of view of long-term maintenance is to
! rearrange the program so that the elaboration problems are avoided. One useful 
! technique is to place the elaboration code into separate child packages. 
! Another is to move some of the initialization code to explicitly invoked 
! subprograms, where the program controls the order of initialization explicitly.
! Although this is the most desirable option, it may be impractical and involve
! too much modification, especially in the case of complex legacy code.
  
! When faced with an elaboration circularity, the programmer should also consider
! the tactics given in the suggestions section of the circularity diagnostic.
! Depending on the units involved in the circularity, their |with| clauses,
! purity, preelaborability, presence of elaboration-control pragmas and
! invocations at elaboration time, the binder may suggest one or more of the
! following tactics to eliminate the circularity:
  
! * Pragma Elaborate elimination
  
!   ::
  
!      remove pragma Elaborate for unit "..." in unit "..."
  
!   This tactic is suggested when the binder has determined that pragma
!   ``Elaborate``:
  
!   - Prevents a set of units from being elaborated.
  
!   - The removal of the pragma will not eliminate the semantic effects of the
!     pragma. In other words, the argument of the pragma will still be elaborated
!     prior to the unit containing the pragma.
  
!   - The removal of the pragma will enable the successful ordering of the units.
  
!   The programmer should remove the pragma as advised, and rebuild the program.
  
! * Pragma Elaborate_All elimination
  
!   ::
  
!      remove pragma Elaborate_All for unit "..." in unit "..."
  
!   This tactic is suggested when the binder has determined that pragma
!   ``Elaborate_All``:
  
!   - Prevents a set of units from being elaborated.
  
!   - The removal of the pragma will not eliminate the semantic effects of the
!     pragma. In other words, the argument of the pragma along with its |with|
!     closure will still be elaborated prior to the unit containing the pragma.
  
!   - The removal of the pragma will enable the successful ordering of the units.
  
!   The programmer should remove the pragma as advised, and rebuild the program.
  
! * Pragma Elaborate_All downgrade
  
!   ::
  
!      change pragma Elaborate_All for unit "..." to Elaborate in unit "..."
  
!   This tactic is always suggested with the pragma ``Elaborate_All`` elimination
!   tactic. It offers a different alernative of guaranteeing that the argument of
!   the pragma will still be elaborated prior to the unit containing the pragma.
  
!   The programmer should update the pragma as advised, and rebuild the program.
  
! * Pragma Elaborate_Body elimination
  
!   ::
  
!      remove pragma Elaborate_Body in unit "..."
  
!   This tactic is suggested when the binder has determined that pragma
!   ``Elaborate_Body``:
  
!   - Prevents a set of units from being elaborated.
  
!   - The removal of the pragma will enable the successful ordering of the units.
  
!   Note that the binder cannot determine whether the pragma is required for
!   other purposes, such as guaranteeing the initialization of a variable
!   declared in the spec by elaboration code in the body.
  
!   The programmer should remove the pragma as advised, and rebuild the program.
  
! * Use of pragma Restrictions
  
!   ::
  
!      use pragma Restrictions (No_Entry_Calls_In_Elaboration_Code)
  
!   This tactic is suggested when the binder has determined that a task
!   activation at elaboration time:
  
!   - Prevents a set of units from being elaborated.
  
!   Note that the binder cannot determine with certainty whether the task will
!   block at elaboration time.
  
!   The programmer should create a configuration file, place the pragma within,
!   update the general compilation arguments, and rebuild the program.
  
! * Use of dynamic elaboration model
  
    ::
  
!      use the dynamic elaboration model (compiler switch -gnatE)
  
!   This tactic is suggested when the binder has determined that an invocation at
!   elaboration time:
  
!   - Prevents a set of units from being elaborated.
  
!   - The use of the dynamic model will enable the successful ordering of the
!     units.
  
!   The programmer has two options:
  
!   - Determine the units involved in the invocation using the detailed
!     invocation information, and add compiler switch :switch:`-gnatE` to the
!     compilation arguments of selected files only. This approach will yield
!     safer elaboration orders compared to the other option because it will
!     minimize the opportunities presented to the dynamic model for ignoring
!     invocations.
  
!   - Add compiler switch :switch:`-gnatE` to the general compilation arguments.
  
! * Use of detailed invocation information
  
    ::
  
!      use detailed invocation information (compiler switch -gnatd_F)
  
!   This tactic is always suggested with the use of the dynamic model tactic. It
!   causes the circularity section of the circularity diagnostic to describe the
!   flow of elaboration code from a unit to a unit, enumerating all such paths in
!   the process.
  
!   The programmer should analyze this information to determine which units
!   should be compiled with the dynamic model.
  
! * Forced-dependency elimination
  
    ::
  
!      remove the dependency of unit "..." on unit "..." from the argument of switch -f
  
!   This tactic is suggested when the binder has determined that a dependency
!   present in the forced-elaboration-order file indicated by binder switch
!   :switch:`-f`:
  
!   - Prevents a set of units from being elaborated.
  
!   - The removal of the dependency will enable the successful ordering of the
!     units.
  
!   The programmer should edit the forced-elaboration-order file, remove the
!   dependency, and rebind the program.
  
! * All forced-dependency elimination
  
    ::
  
!      remove switch -f
  
!   This tactic is suggested in case editing the forced-elaboration-order file is
!   not an option.
  
!   The programmer should remove binder switch :switch:`-f` from the binder
!   arguments, and rebind.
  
! * Multiple-circularities diagnostic
  
    ::
  
!      diagnose all circularities (binder switch -d_C)
  
!   By default, the binder will diagnose only the highest-precedence circularity.
!   If the program contains multiple circularities, the binder will suggest the
!   use of binder switch :switch:`-d_C` in order to obtain the diagnostics of all
!   circularities.
  
!   The programmer should add binder switch :switch:`-d_C` to the binder
!   arguments, and rebind.
  
! If none of the tactics suggested by the binder eliminate the elaboration
! circularity, the programmer should consider using one of the legacy elaboration
! models, in the following order:
  
! * Use the pre-20.x legacy elaboration-order model, with binder switch
!   :switch:`-H`.
  
! * Use both pre-18.x and pre-20.x legacy elaboration models, with compiler
!   switch :switch:`-gnatH` and binder switch :switch:`-H`.
  
! * Use the relaxed static-elaboration model, with compiler switches
!   :switch:`-gnatH` :switch:`-gnatJ` and binder switch :switch:`-H`.
! 
! * Use the relaxed dynamic-elaboration model, with compiler switches
!   :switch:`-gnatH` :switch:`-gnatJ` :switch:`-gnatE` and binder switch
!   :switch:`-H`.
  
  .. _Elaboration_Related_Compiler_Switches:
  
*************** the elaboration order chosen by the bind
*** 1465,1477 ****
  :switch:`-gnatE`
    Dynamic elaboration checking mode enabled
  
!   When this switch is in effect, GNAT activates the dynamic elaboration model.
  
  .. index:: -gnatel  (gnat)
  
  :switch:`-gnatel`
    Turn on info messages on generated Elaborate[_All] pragmas
  
    When this switch is in effect, GNAT will emit the following supplementary
    information depending on the elaboration model in effect.
  
--- 1144,1160 ----
  :switch:`-gnatE`
    Dynamic elaboration checking mode enabled
  
!   When this switch is in effect, GNAT activates the dynamic model.
  
  .. index:: -gnatel  (gnat)
  
  :switch:`-gnatel`
    Turn on info messages on generated Elaborate[_All] pragmas
  
+   This switch is only applicable to the pre-20.x legacy elaboration models.
+   The post-20.x elaboration model no longer relies on implicitly generated
+   ``Elaborate`` and ``Elaborate_All`` pragmas to order units.
+ 
    When this switch is in effect, GNAT will emit the following supplementary
    information depending on the elaboration model in effect.
  
*************** the elaboration order chosen by the bind
*** 1482,1488 ****
  
    - *Static model*
  
!     GNAT will indicate all scenarios executed during elaboration. In addition,
      it will provide detailed traceback when an implicit ``Elaborate`` or
      ``Elaborate_All`` pragma is generated.
  
--- 1165,1171 ----
  
    - *Static model*
  
!     GNAT will indicate all scenarios invoked during elaboration. In addition,
      it will provide detailed traceback when an implicit ``Elaborate`` or
      ``Elaborate_All`` pragma is generated.
  
*************** options:
*** 1615,1643 ****
    as their origins. Elaboration warnings are enabled with compiler switch
    :switch:`-gnatwl`.
  
! * Use switch :switch:`-gnatel` to obtain messages on generated implicit
!   ``Elaborate`` and ``Elaborate_All`` pragmas. The trace information could
!   indicate why a server unit must be elaborated prior to a client unit.
! 
! * If the warnings produced by the static model indicate that a task is
!   involved, consider the options in section `Resolving Task Issues`_.
  
  * If none of the steps outlined above resolve the circularity, use a more
    permissive elaboration model, in the following order:
  
!   - Use the dynamic elaboration model, with compiler switch :switch:`-gnatE`.
! 
!   - Use the legacy static elaboration model, with compiler switch
!     :switch:`-gnatH`.
  
!   - Use the legacy dynamic elaboration model, with compiler switches
!     :switch:`-gnatH` :switch:`-gnatE`.
  
!   - Use the relaxed legacy static elaboration model, with compiler switches
!     :switch:`-gnatH` :switch:`-gnatJ`.
  
!   - Use the relaxed legacy dynamic elaboration model, with compiler switches
!     :switch:`-gnatH` :switch:`-gnatJ` :switch:`-gnatE`.
  
  .. _Inspecting_the_Chosen_Elaboration_Order:
  
--- 1298,1321 ----
    as their origins. Elaboration warnings are enabled with compiler switch
    :switch:`-gnatwl`.
  
! * Cosider the tactics given in the suggestions section of the circularity
!   diagnostic.
  
  * If none of the steps outlined above resolve the circularity, use a more
    permissive elaboration model, in the following order:
  
!   - Use the pre-20.x legacy elaboration-order model, with binder switch
!     :switch:`-H`.
  
!   - Use both pre-18.x and pre-20.x legacy elaboration models, with compiler
!     switch :switch:`-gnatH` and binder switch :switch:`-H`.
  
!   - Use the relaxed static elaboration model, with compiler switches
!     :switch:`-gnatH` :switch:`-gnatJ` and binder switch :switch:`-H`.
  
!   - Use the relaxed dynamic elaboration model, with compiler switches
!     :switch:`-gnatH` :switch:`-gnatJ` :switch:`-gnatE` and binder switch
!     :switch:`-H`.
  
  .. _Inspecting_the_Chosen_Elaboration_Order:
  
*************** elaboration order appears as a sequence
*** 1650,1777 ****
  ``Elab_Spec``, interspersed with assignments to `Exxx` which indicates that a
  particular unit is elaborated. For example:
  
! ::
  
!    System.Soft_Links'Elab_Body;
!    E14 := True;
!    System.Secondary_Stack'Elab_Body;
!    E18 := True;
!    System.Exception_Table'Elab_Body;
!    E24 := True;
!    Ada.Io_Exceptions'Elab_Spec;
!    E67 := True;
!    Ada.Tags'Elab_Spec;
!    Ada.Streams'Elab_Spec;
!    E43 := True;
!    Interfaces.C'Elab_Spec;
!    E69 := True;
!    System.Finalization_Root'Elab_Spec;
!    E60 := True;
!    System.Os_Lib'Elab_Body;
!    E71 := True;
!    System.Finalization_Implementation'Elab_Spec;
!    System.Finalization_Implementation'Elab_Body;
!    E62 := True;
!    Ada.Finalization'Elab_Spec;
!    E58 := True;
!    Ada.Finalization.List_Controller'Elab_Spec;
!    E76 := True;
!    System.File_Control_Block'Elab_Spec;
!    E74 := True;
!    System.File_Io'Elab_Body;
!    E56 := True;
!    Ada.Tags'Elab_Body;
!    E45 := True;
!    Ada.Text_Io'Elab_Spec;
!    Ada.Text_Io'Elab_Body;
!    E07 := True;
  
  Note also binder switch :switch:`-l`, which outputs the chosen elaboration
  order and provides a more readable form of the above:
  
! ::
  
!    ada (spec)
!    interfaces (spec)
!    system (spec)
!    system.case_util (spec)
!    system.case_util (body)
!    system.concat_2 (spec)
!    system.concat_2 (body)
!    system.concat_3 (spec)
!    system.concat_3 (body)
!    system.htable (spec)
!    system.parameters (spec)
!    system.parameters (body)
!    system.crtl (spec)
!    interfaces.c_streams (spec)
!    interfaces.c_streams (body)
!    system.restrictions (spec)
!    system.restrictions (body)
!    system.standard_library (spec)
!    system.exceptions (spec)
!    system.exceptions (body)
!    system.storage_elements (spec)
!    system.storage_elements (body)
!    system.secondary_stack (spec)
!    system.stack_checking (spec)
!    system.stack_checking (body)
!    system.string_hash (spec)
!    system.string_hash (body)
!    system.htable (body)
!    system.strings (spec)
!    system.strings (body)
!    system.traceback (spec)
!    system.traceback (body)
!    system.traceback_entries (spec)
!    system.traceback_entries (body)
!    ada.exceptions (spec)
!    ada.exceptions.last_chance_handler (spec)
!    system.soft_links (spec)
!    system.soft_links (body)
!    ada.exceptions.last_chance_handler (body)
!    system.secondary_stack (body)
!    system.exception_table (spec)
!    system.exception_table (body)
!    ada.io_exceptions (spec)
!    ada.tags (spec)
!    ada.streams (spec)
!    interfaces.c (spec)
!    interfaces.c (body)
!    system.finalization_root (spec)
!    system.finalization_root (body)
!    system.memory (spec)
!    system.memory (body)
!    system.standard_library (body)
!    system.os_lib (spec)
!    system.os_lib (body)
!    system.unsigned_types (spec)
!    system.stream_attributes (spec)
!    system.stream_attributes (body)
!    system.finalization_implementation (spec)
!    system.finalization_implementation (body)
!    ada.finalization (spec)
!    ada.finalization (body)
!    ada.finalization.list_controller (spec)
!    ada.finalization.list_controller (body)
!    system.file_control_block (spec)
!    system.file_io (spec)
!    system.file_io (body)
!    system.val_uns (spec)
!    system.val_util (spec)
!    system.val_util (body)
!    system.val_uns (body)
!    system.wch_con (spec)
!    system.wch_con (body)
!    system.wch_cnv (spec)
!    system.wch_jis (spec)
!    system.wch_jis (body)
!    system.wch_cnv (body)
!    system.wch_stw (spec)
!    system.wch_stw (body)
!    ada.tags (body)
!    ada.exceptions (body)
!    ada.text_io (spec)
!    ada.text_io (body)
!    text_io (spec)
!    gdbstr (body)
--- 1328,1455 ----
  ``Elab_Spec``, interspersed with assignments to `Exxx` which indicates that a
  particular unit is elaborated. For example:
  
!   ::
  
!      System.Soft_Links'Elab_Body;
!      E14 := True;
!      System.Secondary_Stack'Elab_Body;
!      E18 := True;
!      System.Exception_Table'Elab_Body;
!      E24 := True;
!      Ada.Io_Exceptions'Elab_Spec;
!      E67 := True;
!      Ada.Tags'Elab_Spec;
!      Ada.Streams'Elab_Spec;
!      E43 := True;
!      Interfaces.C'Elab_Spec;
!      E69 := True;
!      System.Finalization_Root'Elab_Spec;
!      E60 := True;
!      System.Os_Lib'Elab_Body;
!      E71 := True;
!      System.Finalization_Implementation'Elab_Spec;
!      System.Finalization_Implementation'Elab_Body;
!      E62 := True;
!      Ada.Finalization'Elab_Spec;
!      E58 := True;
!      Ada.Finalization.List_Controller'Elab_Spec;
!      E76 := True;
!      System.File_Control_Block'Elab_Spec;
!      E74 := True;
!      System.File_Io'Elab_Body;
!      E56 := True;
!      Ada.Tags'Elab_Body;
!      E45 := True;
!      Ada.Text_Io'Elab_Spec;
!      Ada.Text_Io'Elab_Body;
!      E07 := True;
  
  Note also binder switch :switch:`-l`, which outputs the chosen elaboration
  order and provides a more readable form of the above:
  
!   ::
  
!      ada (spec)
!      interfaces (spec)
!      system (spec)
!      system.case_util (spec)
!      system.case_util (body)
!      system.concat_2 (spec)
!      system.concat_2 (body)
!      system.concat_3 (spec)
!      system.concat_3 (body)
!      system.htable (spec)
!      system.parameters (spec)
!      system.parameters (body)
!      system.crtl (spec)
!      interfaces.c_streams (spec)
!      interfaces.c_streams (body)
!      system.restrictions (spec)
!      system.restrictions (body)
!      system.standard_library (spec)
!      system.exceptions (spec)
!      system.exceptions (body)
!      system.storage_elements (spec)
!      system.storage_elements (body)
!      system.secondary_stack (spec)
!      system.stack_checking (spec)
!      system.stack_checking (body)
!      system.string_hash (spec)
!      system.string_hash (body)
!      system.htable (body)
!      system.strings (spec)
!      system.strings (body)
!      system.traceback (spec)
!      system.traceback (body)
!      system.traceback_entries (spec)
!      system.traceback_entries (body)
!      ada.exceptions (spec)
!      ada.exceptions.last_chance_handler (spec)
!      system.soft_links (spec)
!      system.soft_links (body)
!      ada.exceptions.last_chance_handler (body)
!      system.secondary_stack (body)
!      system.exception_table (spec)
!      system.exception_table (body)
!      ada.io_exceptions (spec)
!      ada.tags (spec)
!      ada.streams (spec)
!      interfaces.c (spec)
!      interfaces.c (body)
!      system.finalization_root (spec)
!      system.finalization_root (body)
!      system.memory (spec)
!      system.memory (body)
!      system.standard_library (body)
!      system.os_lib (spec)
!      system.os_lib (body)
!      system.unsigned_types (spec)
!      system.stream_attributes (spec)
!      system.stream_attributes (body)
!      system.finalization_implementation (spec)
!      system.finalization_implementation (body)
!      ada.finalization (spec)
!      ada.finalization (body)
!      ada.finalization.list_controller (spec)
!      ada.finalization.list_controller (body)
!      system.file_control_block (spec)
!      system.file_io (spec)
!      system.file_io (body)
!      system.val_uns (spec)
!      system.val_util (spec)
!      system.val_util (body)
!      system.val_uns (body)
!      system.wch_con (spec)
!      system.wch_con (body)
!      system.wch_cnv (spec)
!      system.wch_jis (spec)
!      system.wch_jis (body)
!      system.wch_cnv (body)
!      system.wch_stw (spec)
!      system.wch_stw (body)
!      ada.tags (body)
!      ada.exceptions (body)
!      ada.text_io (spec)
!      ada.text_io (body)
!      text_io (spec)
!      gdbstr (body)
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_ugn/getting_started_with_gnat.rst gcc-10.1.0/gcc/ada/doc/gnat_ugn/getting_started_with_gnat.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_ugn/getting_started_with_gnat.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_ugn/getting_started_with_gnat.rst	Thu May  7 10:49:59 2020
*************** Getting Started with GNAT
*** 9,19 ****
  This chapter describes how to use GNAT's command line interface to build
  executable Ada programs.
  On most platforms a visually oriented Integrated Development Environment
! is also available, the GNAT Programming Studio (GPS).
! GPS offers a graphical "look and feel", support for development in
  other programming languages, comprehensive browsing features, and
  many other capabilities.
! For information on GPS please refer to
  :title:`Using the GNAT Programming Studio`.
  
  
--- 9,19 ----
  This chapter describes how to use GNAT's command line interface to build
  executable Ada programs.
  On most platforms a visually oriented Integrated Development Environment
! is also available, the GNAT Programming Studio (GNAT Studio).
! GNAT Studio offers a graphical "look and feel", support for development in
  other programming languages, comprehensive browsing features, and
  many other capabilities.
! For information on GNAT Studio please refer to
  :title:`Using the GNAT Programming Studio`.
  
  
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_ugn/gnat_and_program_execution.rst gcc-10.1.0/gcc/ada/doc/gnat_ugn/gnat_and_program_execution.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_ugn/gnat_and_program_execution.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_ugn/gnat_and_program_execution.rst	Thu May  7 10:49:59 2020
*************** Running GDB
*** 116,124 ****
  
  This section describes how to initiate the debugger.
  
! The debugger can be launched from a ``GPS`` menu or
  directly from the command line. The description below covers the latter use.
! All the commands shown can be used in the ``GPS`` debug console window,
  but there are usually more GUI-based ways to achieve the same effect.
  
  The command to run ``GDB`` is
--- 116,124 ----
  
  This section describes how to initiate the debugger.
  
! The debugger can be launched from a ``GNAT Studio`` menu or
  directly from the command line. The description below covers the latter use.
! All the commands shown can be used in the ``GNAT Studio`` debug console window,
  but there are usually more GUI-based ways to achieve the same effect.
  
  The command to run ``GDB`` is
*************** for more information.
*** 1214,1221 ****
  Profiling
  =========
  
! This section describes how to use the the ``gprof`` profiler tool on Ada
! programs.
  
  .. index:: !  gprof
  .. index:: Profiling
--- 1214,1220 ----
  Profiling
  =========
  
! This section describes how to use the ``gprof`` profiler tool on Ada programs.
  
  .. index:: !  gprof
  .. index:: Profiling
*************** This section presents several topics rel
*** 1406,1423 ****
  It first describes some of the tradeoffs that need to be considered
  and some of the techniques for making your program run faster.
  
! .. only:: PRO or GPL
! 
!    It then documents the unused subprogram/data elimination feature
!    and the ``gnatelim`` tool,
!    which can reduce the size of program executables.
! 
! 
! .. only:: FSF
! 
!    It then documents the unused subprogram/data elimination feature,
!    which can reduce the size of program executables.
! 
  
  .. _Performance_Considerations:
  
--- 1405,1412 ----
  It first describes some of the tradeoffs that need to be considered
  and some of the techniques for making your program run faster.
  
! It then documents the unused subprogram/data elimination feature,
! which can reduce the size of program executables.
  
  .. _Performance_Considerations:
  
*************** It can be observed that the procedure ``
*** 2596,2856 ****
  ``Unused_Data`` are removed by the linker when using the
  appropriate options.
  
- .. only:: PRO or GPL
- 
-   .. _Reducing_Size_of_Ada_Executables_with_gnatelim:
- 
-   Reducing Size of Ada Executables with ``gnatelim``
-   --------------------------------------------------
- 
-   .. index:: gnatelim
- 
-   This section describes ``gnatelim``, a tool which detects unused
-   subprograms and helps the compiler to create a smaller executable for your
-   program.
- 
-   ``gnatelim`` is a project-aware tool.
-   (See :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
-   the project-related switches but note that ``gnatelim`` does not support
-   the :samp:`-U {main_unit}`, :samp:`--subdirs={dir}`, or
-   :samp:`--no_objects_dir` switches.)
-   The project file package that can specify
-   ``gnatelim`` switches is named ``Eliminate``.
- 
-   .. _About_gnatelim:
- 
-   About ``gnatelim``
-   ^^^^^^^^^^^^^^^^^^
- 
-   When a program shares a set of Ada
-   packages with other programs, it may happen that this program uses
-   only a fraction of the subprograms defined in these packages. The code
-   created for these unused subprograms increases the size of the executable.
- 
-   ``gnatelim`` tracks unused subprograms in an Ada program and
-   outputs a list of GNAT-specific pragmas ``Eliminate`` marking all the
-   subprograms that are declared but never called. By placing the list of
-   ``Eliminate`` pragmas in the GNAT configuration file :file:`gnat.adc` and
-   recompiling your program, you may decrease the size of its executable,
-   because the compiler will not generate the code for 'eliminated' subprograms.
-   See ``Pragma_Eliminate`` in the :title:`GNAT_Reference_Manual` for more
-   information about this pragma.
- 
-   ``gnatelim`` needs as its input data the name of the main subprogram.
- 
-   If a set of source files is specified as ``gnatelim`` arguments, it
-   treats these files as a complete set of sources making up a program to
-   analyse, and analyses only these sources.
- 
-   If ``gnatelim`` is called with a project file and :samp:`-U` option is
-   used, then in process all the files from the argument project but
-   not just the closure of the main subprogram.
- 
-   In all the other cases (that are typical cases of ``gnatelim`` usage, when
-   the only ``gnatelim`` parameter is the name of the source file containing
-   the main subprogram) gnatelim needs the full closure of the main subprogram.
-   When called with a project file, gnatelim computes this closure itself.
-   Otherwise it assumes that it can reuse the results of the previous
-   build of the main subprogram.
- 
-   If the set of sources to be processed by ``gnatelim`` contains sources with
-   preprocessing directives
-   then the needed options should be provided to run preprocessor as a part of
-   the ``gnatelim`` call, and the generated set of pragmas ``Eliminate``
-   will correspond to preprocessed sources.
- 
- 
-   .. _Running_gnatelim:
- 
-   Running ``gnatelim``
-   ^^^^^^^^^^^^^^^^^^^^
- 
-   ``gnatelim`` has the following command-line interface:
- 
- 
-     ::
- 
-         $ gnatelim [switches] -main=`main_unit_name {filename} [-cargs gcc_switches]
- 
-   ``main_unit_name`` should be a name of a source file that contains the main
-   subprogram of a program (partition).
- 
-   Each ``filename`` is the name (including the extension) of a source
-   file to process. 'Wildcards' are allowed, and
-   the file name may contain path information.
- 
-   ``gcc_switches`` is a list of switches for
-   ``gcc``. They will be passed on to all compiler invocations made by
-   ``gnatelim`` to generate the ASIS trees. Here you can provide
-   :switch:`-I` switches to form the source search path,
-   use the :switch:`-gnatec` switch to set the configuration file,
-   use the :switch:`-gnat05` switch if sources should be compiled in
-   Ada 2005 mode etc.
- 
-   ``gnatelim`` has the following switches:
- 
- 
-   .. index:: --version (gnatelim)
- 
-   :samp:`--version`
-     Display Copyright and version, then exit disregarding all other options.
- 
- 
-   .. index:: --help (gnatelim)
- 
-   :samp:`--help`
-     Display usage, then exit disregarding all other options.
- 
- 
-   .. index:: -P (gnatelim)
- 
-   :samp:`-P {file}`
-     Indicates the name of the project file that describes the set of sources
-     to be processed.
- 
- 
-   .. index:: -X (gnatelim)
- 
-   :samp:`-X{name}={value}`
-     Indicates that external variable ``name`` in the argument project
-     has the value ``value``. Has no effect if no project is specified as
-     tool argument.
- 
- 
-   .. index:: --RTS (gnatelim)
- 
-   :samp:`--RTS={rts-path}`
-     Specifies the default location of the runtime library. Same meaning as the
-     equivalent ``gnatmake`` flag (:ref:`Switches_for_gnatmake`).
- 
- 
-   .. index:: -U (gnatelim)
- 
-   :samp:`-U`
-     Process all the sources from the argument project. If no project file
-     is specified, this option has no effect. If this option is used with the
-     project file, ``gnatelim`` does not require the preliminary build of the
-     argument main subprogram.
- 
- 
-   .. index:: -files (gnatelim)
- 
-   :samp:`-files={filename}`
-     Take the argument source files from the specified file. This file should be an
-     ordinary text file containing file names separated by spaces or
-     line breaks. You can use this switch more than once in the same call to
-     ``gnatelim``. You also can combine this switch with
-     an explicit list of files.
- 
- 
-   .. index:: -log (gnatelim)
- 
-   :samp:`-log`
-     Duplicate all the output sent to :file:`stderr` into a log file. The log file
-     is named :file:`gnatelim.log` and is located in the current directory.
- 
-     .. index:: --no-elim-dispatch (gnatelim)
- 
-   :samp:`--no-elim-dispatch`
-     Do not generate pragmas for dispatching operations.
- 
- 
-   .. index:: --ignore (gnatelim)
- 
-   :samp:`--ignore={filename}`
-     Do not generate pragmas for subprograms declared in the sources
-     listed in a specified file
- 
-   .. index:: -o (gnatelim)
- 
- 
-   :samp:`-o={report_file}`
-     Put ``gnatelim`` output into a specified file. If this file already exists,
-     it is overridden. If this switch is not used, ``gnatelim`` outputs its results
-     into :file:`stderr`
- 
- 
-   .. index:: -j (gnatelim)
- 
-   :samp:`-j{n}`
-     Use ``n`` processes to carry out the tree creations (internal representations
-     of the argument sources). On a multiprocessor machine this speeds up processing
-     of big sets of argument sources. If ``n`` is 0, then the maximum number of
-     parallel tree creations is the number of core processors on the platform.
-     This possibility is disabled if ``gnatelim`` has to compute the closure
-     of the main unit.
- 
- 
-   .. index:: -q (gnatelim)
- 
-   :samp:`-q`
-     Quiet mode: by default ``gnatelim`` outputs to the standard error
-     stream the number of program units left to be processed. This option turns
-     this trace off.
- 
-   .. index:: -t (gnatelim)
- 
- 
-   :samp:`-t`
-     Print out execution time.
- 
- 
-   .. index:: -v (gnatelim)
- 
-   :samp:`-v`
-     Verbose mode: ``gnatelim`` version information is printed as Ada
-     comments to the standard output stream. Also, in addition to the number of
-     program units left ``gnatelim`` will output the name of the current unit
-     being processed.
- 
- 
-   .. index:: -wq (gnatelim)
- 
-   :samp:`-wq`
-     Quiet warning mode - some warnings are suppressed. In particular warnings that
-     indicate that the analysed set of sources is incomplete to make up a
-     partition and that some subprogram bodies are missing are not generated.
- 
- 
- 
-   .. _Processing_Precompiled_Libraries:
- 
-   Processing Precompiled Libraries
-   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
- 
-   If some program uses a precompiled Ada library, it can be processed by
-   ``gnatelim`` in a usual way. ``gnatelim`` will newer generate an
-   Eliminate pragma for a subprogram if the body of this subprogram has not
-   been analysed, this is a typical case for subprograms from precompiled
-   libraries. Switch :switch:`-wq` may be used to suppress
-   warnings about missing source files and non-analyzed subprogram bodies
-   that can be generated when processing precompiled Ada libraries.
- 
- 
-   .. _Correcting_the_List_of_Eliminate_Pragmas:
- 
-   Correcting the List of Eliminate Pragmas
-   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
- 
-   In some rare cases ``gnatelim`` may try to eliminate
-   subprograms that are actually called in the program. In this case, the
-   compiler will generate an error message of the form:
- 
-     ::
- 
-         main.adb:4:08: cannot reference subprogram "P" eliminated at elim.out:5
- 
-   You will need to manually remove the wrong ``Eliminate`` pragmas from
-   the configuration file indicated in the error message. You should recompile
-   your program from scratch after that, because you need a consistent
-   configuration file(s) during the entire compilation.
- 
-   If ``gnatelim`` is called with a project file and with ``-U`` option
-   the generated set of pragmas may contain pragmas for subprograms that
-   does not belong to the closure of the argument main subprogram. These
-   pragmas has no effect when the set of pragmas is used to reduce the size
-   of executable.
- 
  
  .. index:: Overflow checks
  .. index:: Checks (overflow)
--- 2585,2590 ----
*************** integer arithmetic package. The compiler
*** 3230,3236 ****
  to this package, though only in cases where it cannot be
  sure that ``Long_Long_Integer`` is sufficient to guard against
  intermediate overflows. This package does not use dynamic
! alllocation, but it does use the secondary stack, so an
  appropriate secondary stack package must be present (this
  is always true for standard full Ada, but may require
  specific steps for restricted run times such as ZFP).
--- 2964,2970 ----
  to this package, though only in cases where it cannot be
  sure that ``Long_Long_Integer`` is sufficient to guard against
  intermediate overflows. This package does not use dynamic
! allocation, but it does use the secondary stack, so an
  appropriate secondary stack package must be present (this
  is always true for standard full Ada, but may require
  specific steps for restricted run times such as ZFP).
*************** adding a switch to ``gnatbind``, as:
*** 3661,3668 ****
  
        $ gnatbind -u0 file
  
! With this option, at each task termination, its stack usage is  output on
  :file:`stderr`.
  It is not always convenient to output the stack usage when the program
  is still running. Hence, it is possible to delay this output until program
  termination. for a given number of tasks specified as the argument of the
--- 3395,3405 ----
  
        $ gnatbind -u0 file
  
! With this option, at each task termination, its stack usage is output on
  :file:`stderr`.
+ Note that this switch is not compatible with tools like
+ Valgrind and DrMemory; they will report errors.
+ 
  It is not always convenient to output the stack usage when the program
  is still running. Hence, it is possible to delay this output until program
  termination. for a given number of tasks specified as the argument of the
*************** execution of this erroneous program:
*** 3972,3978 ****
  
      ::
  
!        $ gnatmem [ switches ] user_program
  
    The program must have been linked with the instrumented version of the
    allocation and deallocation routines. This is done by linking with the
--- 3709,3715 ----
  
      ::
  
!        $ gnatmem [ switches ] [ DEPTH ] user_program
  
    The program must have been linked with the instrumented version of the
    allocation and deallocation routines. This is done by linking with the
*************** execution of this erroneous program:
*** 4062,4076 ****
      memory leaks. Omits statistical information.
  
  
!   .. index:: N switch (gnatmem)
  
!   :samp:`{N}`
!     ``N`` is an integer literal (usually between 1 and 10) which controls the
!     depth of the backtraces defining allocation root. The default value for
!     N is 1. The deeper the backtrace, the more precise the localization of
      the root. Note that the total number of roots can depend on this
!     parameter. This parameter must be specified *before* the name of the
!     executable to be analyzed, to avoid ambiguity.
  
  
    .. index:: -b (gnatmem)
--- 3799,3814 ----
      memory leaks. Omits statistical information.
  
  
!   .. index:: DEPTH switch (gnatmem)
  
!   :samp:`{DEPTH}`
!     ``DEPTH`` is an integer literal (usually between 1 and 10) which controls
!     the depth of the backtraces defining allocation root. The default value for
!     DEPTH is 1. The deeper the backtrace, the more precise the localization of
      the root. Note that the total number of roots can depend on this
!     parameter, in other words there may be more roots when the requested
!     backtrace depth is higher. This parameter must be specified *before* the
!     name of the executable to be analyzed, to avoid ambiguity.
  
  
    .. index:: -b (gnatmem)
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_ugn/gnat_utility_programs.rst gcc-10.1.0/gcc/ada/doc/gnat_ugn/gnat_utility_programs.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_ugn/gnat_utility_programs.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_ugn/gnat_utility_programs.rst	Thu May  7 10:49:59 2020
*************** The following switches are available:
*** 1214,1220 ****
  
  :samp:`f`
    By default, gnathtml will generate html links only for global entities
!   ('with'ed units, global variables and types,...).  If you specify
    :switch:`-f` on the command line, then links will be generated for local
    entities too.
  
--- 1214,1220 ----
  
  :samp:`f`
    By default, gnathtml will generate html links only for global entities
!   ('with'ed units, global variables and types,...). If you specify
    :switch:`-f` on the command line, then links will be generated for local
    entities too.
  
*************** Alternatively, you may run the script us
*** 1310,1316 ****
  
    ``gnat2xml`` is a project-aware tool
    (see :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
!   the project-related switches).  The project file package that can specify
    ``gnat2xml`` switches is named ``gnat2xml``.
  
    .. _Switches_for_``gnat2xml``:
--- 1310,1316 ----
  
    ``gnat2xml`` is a project-aware tool
    (see :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
!   the project-related switches). The project file package that can specify
    ``gnat2xml`` switches is named ``gnat2xml``.
  
    .. _Switches_for_``gnat2xml``:
*************** Alternatively, you may run the script us
*** 1780,1786 ****
  
    ``gnatcheck`` is a project-aware tool
    (see :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
!   the project-related switches).  The project file package that can specify
    ``gnatcheck`` switches is named ``Check``.
  
    For full details, plese refer to :title:`GNATcheck Reference Manual`.
--- 1780,1786 ----
  
    ``gnatcheck`` is a project-aware tool
    (see :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
!   the project-related switches). The project file package that can specify
    ``gnatcheck`` switches is named ``Check``.
  
    For full details, plese refer to :title:`GNATcheck Reference Manual`.
*************** Alternatively, you may run the script us
*** 1797,1814 ****
    .. index:: ! gnatmetric
    .. index:: Metric tool
  
-   This documentation is for the new libadalang-based version
-   of ``gnatmetric``, which replaces the ASIS-based version.
- 
    The ``gnatmetric`` tool is a utility
    for computing various program metrics.
    It takes an Ada source file as input and generates a file containing the
    metrics data as output. Various switches control which
!   metrics are computed and output.
  
    ``gnatmetric`` is a project-aware tool
    (see :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
!   the project-related switches).  The project file package that can specify
    ``gnatmetric`` switches is named ``Metrics``.
  
    The ``gnatmetric`` command has the form
--- 1797,1811 ----
    .. index:: ! gnatmetric
    .. index:: Metric tool
  
    The ``gnatmetric`` tool is a utility
    for computing various program metrics.
    It takes an Ada source file as input and generates a file containing the
    metrics data as output. Various switches control which
!   metrics are reported.
  
    ``gnatmetric`` is a project-aware tool
    (see :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
!   the project-related switches). The project file package that can specify
    ``gnatmetric`` switches is named ``Metrics``.
  
    The ``gnatmetric`` command has the form
*************** Alternatively, you may run the script us
*** 1822,1835 ****
    * ``switches`` specify the metrics to compute and define the destination for
      the output
  
!   * Each ``filename`` is the name (including the extension) of a source
!     file to process. 'Wildcards' are allowed, and
!     the file name may contain path information.
!     If no ``filename`` is supplied, then the ``switches`` list must contain
!     at least one
!     :switch:`--files` switch (see :ref:`Other_gnatmetric_Switches`).
!     Including both a :switch:`--files` switch and one or more
!     ``filename`` arguments is permitted.
  
    The following subsections describe the various switches accepted by
    ``gnatmetric``, organized by category.
--- 1819,1834 ----
    * ``switches`` specify the metrics to compute and define the destination for
      the output
  
!   * Each ``filename`` is the name of a source file to process. 'Wildcards' are
!     allowed, and the file name may contain path information.  If no
!     ``filename`` is supplied, then the ``switches`` list must contain at least
!     one :switch:`--files` switch (see :ref:`Other_gnatmetric_Switches`).
!     Including both a :switch:`--files` switch and one or more ``filename``
!     arguments is permitted.
! 
!     Note that it is no longer necessary to specify the Ada language version;
!     ``gnatmetric`` can process Ada source code written in any version from
!     Ada 83 onward without specifying any language version switch.
  
    The following subsections describe the various switches accepted by
    ``gnatmetric``, organized by category.
*************** Alternatively, you may run the script us
*** 1921,1933 ****
    .. index:: --short-file-names (gnatmetric)
  
    :switch:`--short-file-names`
!     Use 'short' source file names in the output.  (The ``gnatmetric``
      output includes the name(s) of the Ada source file(s) from which the
!     metrics are computed.  By default each name includes the absolute
      path. The :switch:`--short-file-names` switch causes ``gnatmetric``
      to exclude all directory information from the file names that are
      output.)
  
  
    .. index:: Disable Metrics For Local Units in gnatmetric
  
--- 1920,1942 ----
    .. index:: --short-file-names (gnatmetric)
  
    :switch:`--short-file-names`
!     Use 'short' source file names in the output. (The ``gnatmetric``
      output includes the name(s) of the Ada source file(s) from which the
!     metrics are computed. By default each name includes the absolute
      path. The :switch:`--short-file-names` switch causes ``gnatmetric``
      to exclude all directory information from the file names that are
      output.)
  
+    .. index:: --wide-character-encoding (gnatmetric)
+ 
+    :switch:`--wide-character-encoding={e}`
+      Specify the wide character encoding method for the input and output
+      files. ``e`` is one of the following:
+ 
+      * *8* - UTF-8 encoding
+ 
+      * *b* - Brackets encoding (default value)
+ 
  
    .. index:: Disable Metrics For Local Units in gnatmetric
  
*************** Alternatively, you may run the script us
*** 1980,1991 ****
    Specifying a set of metrics to compute
    --------------------------------------
  
!   By default all the metrics are computed and reported. The switches
!   described in this subsection allow you to control, on an individual
!   basis, whether metrics are computed and reported. If at least one
!   positive metric switch is specified (that is, a switch that defines
!   that a given metric or set of metrics is to be computed), then only
!   explicitly specified metrics are reported.
  
    .. _Line_Metrics_Control:
  
--- 1989,1999 ----
    Specifying a set of metrics to compute
    --------------------------------------
  
!   By default all the metrics are reported. The switches described in this
!   subsection allow you to control, on an individual basis, whether metrics are
!   reported. If at least one positive metric switch is specified (that is, a
!   switch that defines that a given metric or set of metrics is to be computed),
!   then only explicitly specified metrics are reported.
  
    .. _Line_Metrics_Control:
  
*************** Alternatively, you may run the script us
*** 2014,2021 ****
      and/or format effectors (blank lines)
  
    * the average number of code lines in subprogram bodies, task bodies,
!     entry bodies and statement sequences in package bodies (this metric
!     is only computed across the whole set of the analyzed units)
  
    ``gnatmetric`` sums the values of the line metrics for all the files
    being processed and then generates the cumulative results. The tool
--- 2022,2028 ----
      and/or format effectors (blank lines)
  
    * the average number of code lines in subprogram bodies, task bodies,
!     entry bodies and statement sequences in package bodies
  
    ``gnatmetric`` sums the values of the line metrics for all the files
    being processed and then generates the cumulative results. The tool
*************** Alternatively, you may run the script us
*** 2023,2029 ****
    code lines in bodies.
  
    You can use the following switches to select the specific line metrics
!   to be computed and reported.
  
  
    .. index:: --lines (gnatmetric)
--- 2030,2036 ----
    code lines in bodies.
  
    You can use the following switches to select the specific line metrics
!   to be reported.
  
  
    .. index:: --lines (gnatmetric)
*************** Alternatively, you may run the script us
*** 2089,2098 ****
  
  
    :switch:`--lines-average`
!     Report the average number of code lines in subprogram bodies, task
!     bodies, entry bodies and statement sequences in package bodies. The
!     metric is computed and reported for the whole set of processed Ada
!     sources only.
  
  
    :switch:`--no-lines-average`
--- 2096,2103 ----
  
  
    :switch:`--lines-average`
!     Report the average number of code lines in subprogram bodies, task bodies,
!     entry bodies and statement sequences in package bodies.
  
  
    :switch:`--no-lines-average`
*************** Alternatively, you may run the script us
*** 2100,2105 ****
--- 2105,2118 ----
      task bodies, entry bodies and statement sequences in package bodies.
  
  
+   :switch:`--lines-spark`
+     Report the number of lines written in SPARK.
+ 
+ 
+   :switch:`--no-lines-spark`
+     Do not report the number of lines written in SPARK.
+ 
+ 
    .. _Syntax_Metrics_Control:
  
    Syntax Metrics Control
*************** Alternatively, you may run the script us
*** 2173,2179 ****
        declarations. It is the total number of types that can be
        referenced from outside this compilation unit, plus the number of
        types from all the visible parts of all the visible generic
!       packages. Generic formal types are not counted.  Only types, not
        subtypes, are included.
  
        Along with the total number of public types, the following
--- 2186,2192 ----
        declarations. It is the total number of types that can be
        referenced from outside this compilation unit, plus the number of
        types from all the visible parts of all the visible generic
!       packages. Generic formal types are not counted. Only types, not
        subtypes, are included.
  
        Along with the total number of public types, the following
*************** Alternatively, you may run the script us
*** 2193,2206 ****
    * *All types*
        This metric is computed for any compilation unit. It is equal to
        the total number of the declarations of different types given in
!       the compilation unit.  The private and the corresponding full type
        declaration are counted as one type declaration. Incomplete type
        declarations and generic formal types are not counted.
        No distinction is made among different kinds of types (abstract,
!       private etc.); the total number of types is computed and reported.
  
!   By default, all the syntax metrics are computed and reported. You can
!   use the following switches to select specific syntax metrics.
  
  
    .. index:: --syntax (gnatmetric)
--- 2206,2219 ----
    * *All types*
        This metric is computed for any compilation unit. It is equal to
        the total number of the declarations of different types given in
!       the compilation unit. The private and the corresponding full type
        declaration are counted as one type declaration. Incomplete type
        declarations and generic formal types are not counted.
        No distinction is made among different kinds of types (abstract,
!       private etc.); the total number of types is reported.
  
!   By default, all the syntax metrics are reported. You can use the following
!   switches to select specific syntax metrics.
  
  
    .. index:: --syntax (gnatmetric)
*************** Alternatively, you may run the script us
*** 2286,2291 ****
--- 2299,2351 ----
      Do not report the number of subprogram parameters
  
  
+   .. _Contract_Metrics_Control:
+ 
+   Contract Metrics Control
+   ^^^^^^^^^^^^^^^^^^^^^^^^
+ 
+   .. index:: Contract metrics control in gnatmetric
+ 
+   :switch:`--contract-all`
+     Report all the contract metrics
+ 
+ 
+   :switch:`--no-contract-all`
+     Do not report any of the contract metrics
+ 
+ 
+   :switch:`--contract`
+     Report the number of public subprograms with contracts
+ 
+ 
+   :switch:`--no-contract`
+     Do not report the number of public subprograms with contracts
+ 
+ 
+   :switch:`--post`
+     Report the number of public subprograms with postconditions
+ 
+ 
+   :switch:`--no-post`
+     Do not report the number of public subprograms with postconditions
+ 
+ 
+   :switch:`--contract-complete`
+     Report the number of public subprograms with complete contracts
+ 
+ 
+   :switch:`--no-contract-complete`
+     Do not report the number of public subprograms with complete contracts
+ 
+ 
+   :switch:`--contract-all`
+     Report the McCabe complexity of public subprograms
+ 
+ 
+   :switch:`--no-contract-all`
+     Do not report the McCabe complexity of public subprograms
+ 
+ 
    .. _Complexity_Metrics_Control:
  
    Complexity Metrics Control
*************** Alternatively, you may run the script us
*** 2311,2317 ****
  
    According to McCabe, both control statements and short-circuit control
    forms should be taken into account when computing cyclomatic
!   complexity.  For Ada 2012 we have also take into account conditional
    expressions and quantified expressions. For each body, we compute
    three metric values:
  
--- 2371,2377 ----
  
    According to McCabe, both control statements and short-circuit control
    forms should be taken into account when computing cyclomatic
!   complexity. For Ada 2012 we have also take into account conditional
    expressions and quantified expressions. For each body, we compute
    three metric values:
  
*************** Alternatively, you may run the script us
*** 2364,2372 ****
    code of assertions and predicates (that is, subprogram preconditions and
    postconditions, subtype predicates and type invariants) is also skipped.
  
!   By default, all the complexity metrics are computed and reported.
!   For more fine-grained control you can use
!   the following switches:
  
  
    .. index:: --complexity (gnatmetric)
--- 2424,2431 ----
    code of assertions and predicates (that is, subprogram preconditions and
    postconditions, subtype predicates and type invariants) is also skipped.
  
!   By default, all the complexity metrics are reported. For more fine-grained
!   control you can use the following switches:
  
  
    .. index:: --complexity (gnatmetric)
*************** Alternatively, you may run the script us
*** 2378,2384 ****
  
  
    :switch:`--no-complexity-all`
!     Do not report any of complexity metrics
  
  
    :switch:`--complexity-cyclomatic`
--- 2437,2443 ----
  
  
    :switch:`--no-complexity-all`
!     Do not report any of the complexity metrics
  
  
    :switch:`--complexity-cyclomatic`
*************** Alternatively, you may run the script us
*** 2408,2415 ****
    :switch:`--complexity-average`
      Report the average McCabe Cyclomatic Complexity for all the subprogram bodies,
      task bodies, entry bodies and statement sequences in package bodies.
!     The metric is computed and reported for whole set of processed Ada sources
!     only.
  
  
    :switch:`--no-complexity-average`
--- 2467,2473 ----
    :switch:`--complexity-average`
      Report the average McCabe Cyclomatic Complexity for all the subprogram bodies,
      task bodies, entry bodies and statement sequences in package bodies.
!     The metric is reported for whole set of processed Ada sources only.
  
  
    :switch:`--no-complexity-average`
*************** Alternatively, you may run the script us
*** 2623,2630 ****
    by invoking ``gnatmetric`` with the corresponding project file
    and with the :switch:`-U` option.
  
!   By default, all the coupling metrics are disabled. You can use the following
!   switches to specify the coupling metrics to be computed and reported:
  
    .. index:: --tagged-coupling (gnatmetric)
    .. index:: --hierarchy-coupling (gnatmetric)
--- 2681,2688 ----
    by invoking ``gnatmetric`` with the corresponding project file
    and with the :switch:`-U` option.
  
!   By default, all the coupling metrics are reported. You can use the following
!   switches to select specific syntax metrics.
  
    .. index:: --tagged-coupling (gnatmetric)
    .. index:: --hierarchy-coupling (gnatmetric)
*************** Alternatively, you may run the script us
*** 2815,2820 ****
--- 2873,2883 ----
    :switch:`-sfn`
      :switch:`--short-file-names`
  
+   .. index:: -W (gnatsmetric)
+ 
+   :switch:`-W{e}`
+     :switch:`--wide-character-encoding={e}`
+ 
    .. index:: -nolocal (gnatmetric)
  
    :switch:`-nolocal`
*************** Alternatively, you may run the script us
*** 2850,2867 ****
     .. index:: ! gnatpp
     .. index:: pretty printer
  
-    This documentation is for the new libadalang-based version
-    of ``gnatpp``, which replaces the ASIS-based version.
- 
     The ``gnatpp`` tool is a utility for source reformatting / pretty
!    printing.  It takes an Ada source file as input and generates a
!    reformatted version as output.  You can specify various style
     directives via switches; e.g., identifier case conventions, rules of
     indentation, and comment layout.
  
     ``gnatpp`` is a project-aware tool
     (see :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
!    the project-related switches).  The project file package that can specify
     ``gnatpp`` switches is named ``Pretty_Printer``.
  
     ``gnatpp`` cannot process sources that contain preprocessing
--- 2913,2927 ----
     .. index:: ! gnatpp
     .. index:: pretty printer
  
     The ``gnatpp`` tool is a utility for source reformatting / pretty
!    printing. It takes an Ada source file as input and generates a
!    reformatted version as output. You can specify various style
     directives via switches; e.g., identifier case conventions, rules of
     indentation, and comment layout.
  
     ``gnatpp`` is a project-aware tool
     (see :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
!    the project-related switches). The project file package that can specify
     ``gnatpp`` switches is named ``Pretty_Printer``.
  
     ``gnatpp`` cannot process sources that contain preprocessing
*************** Alternatively, you may run the script us
*** 2884,2889 ****
--- 2944,2953 ----
       file name may contain path information; it does not have to follow
       the GNAT file naming rules
  
+      Note that it is no longer necessary to specify the Ada language version;
+      ``gnatpp`` can process Ada source code written in any version from
+      Ada 83 onward without specifying any language version switch.
+ 
  
     .. _Switches_for_gnatpp:
  
*************** Alternatively, you may run the script us
*** 3019,3025 ****
     .. index:: --enum-upper-case (gnatpp)
  
     :switch:`--enum-upper-case`
!      Enumeration literals are in upper case.  Overrides -n casing
       setting.
  
     .. index:: --enum-lower-case (gnatpp)
--- 3083,3089 ----
     .. index:: --enum-upper-case (gnatpp)
  
     :switch:`--enum-upper-case`
!      Enumeration literals are in upper case. Overrides -n casing
       setting.
  
     .. index:: --enum-lower-case (gnatpp)
*************** Alternatively, you may run the script us
*** 3133,3139 ****
     compatible.
  
     This group of ``gnatpp`` switches controls the layout of comments and
!    complex syntactic constructs.  See :ref:`Formatting_Comments` for details
     on their effect.
  
  
--- 3197,3203 ----
     compatible.
  
     This group of ``gnatpp`` switches controls the layout of comments and
!    complex syntactic constructs. See :ref:`Formatting_Comments` for details
     on their effect.
  
  
*************** Alternatively, you may run the script us
*** 3181,3200 ****
       Do not place the keyword ``is`` on a separate line in a subprogram body in
       case if the spec occupies more than one line.
  
     .. index:: --separate-loop-then (gnatpp)
  
  
     :switch:`--separate-loop-then`
!      Place the keyword ``loop`` in FOR and WHILE loop statements and the
!      keyword ``then`` in IF statements on a separate line.
  
     .. index:: --no-separate-loop-then (gnatpp)
  
  
     :switch:`--no-separate-loop-then`
!      Do not place the keyword ``loop`` in FOR and WHILE loop statements and the
!      keyword ``then`` in IF statements on a separate line. This option is
!      incompatible with the :switch:`--separate-loop-then` option.
  
     .. index:: --use-on-new-line (gnatpp)
  
--- 3245,3291 ----
       Do not place the keyword ``is`` on a separate line in a subprogram body in
       case if the spec occupies more than one line.
  
+    .. index:: --separate-loop (gnatpp)
+ 
+ 
+    :switch:`--separate-loop`
+      Place the keyword ``loop`` in FOR and WHILE loop statements
+      on a separate line.
+ 
+    .. index:: --no-separate-then (gnatpp)
+ 
+ 
+    :switch:`--separate-then`
+      Place the keyword ``then`` in IF statements
+      on a separate line.
+ 
+    .. index:: --no-separate-loop (gnatpp)
+ 
+ 
+    :switch:`--no-separate-loop`
+      Do not place the keyword ``loop`` in FOR and WHILE loop statements
+      on a separate line. This option is
+      incompatible with the :switch:`--separate-loop` option.
+ 
+    .. index:: --no-separate-then (gnatpp)
+ 
+ 
+    :switch:`--no-separate-then`
+      Do not place the keyword ``then`` in IF statements
+      on a separate line. This option is
+      incompatible with the :switch:`--separate-then` option.
+ 
     .. index:: --separate-loop-then (gnatpp)
  
  
     :switch:`--separate-loop-then`
!      Equivalent to :switch:`--separate-loop` :switch:`--separate-then`.
  
     .. index:: --no-separate-loop-then (gnatpp)
  
  
     :switch:`--no-separate-loop-then`
!      Equivalent to :switch:`--no-separate-loop` :switch:`--no-separate-then`.
  
     .. index:: --use-on-new-line (gnatpp)
  
*************** Alternatively, you may run the script us
*** 3221,3226 ****
--- 3312,3331 ----
  
     :switch:`--preserve-line-breaks`
       Preserve line breaks in the input, to the extent possible.
+      By default, line breaks are also inserted at appropriate
+      places.
+ 
+    .. index:: --source-line-breaks (gnatpp)
+ 
+    :switch:`--source-line-breaks`
+      Keep the line breaks from the source; do not insert or delete any
+      line breaks.
+ 
+    .. index:: --spaces-only (gnatpp)
+ 
+    :switch:`--spaces-only`
+      Disable all formatting except for inserting and removing spaces.
+      This implies --source-line-breaks.
  
     The ``--comments`` switches are compatible with one another, except
     that the ``--comments-unchanged`` switch disables all other comment
*************** Alternatively, you may run the script us
*** 3310,3321 ****
       '(' and ':'. This also turns off alignment.
  
  
-    .. index:: --ff-after-pragma-page (gnatpp)
- 
-    :switch:`--ff-after-pragma-page`
-      Insert a Form Feed character after a pragma Page.
- 
- 
     .. index:: --call_threshold (gnatpp)
  
     :switch:`--call_threshold={nnn}`
--- 3415,3420 ----
*************** Alternatively, you may run the script us
*** 3458,3463 ****
--- 3557,3564 ----
       * *unix* - UNIX style, lines end with LF character*
       * *lf* -  the same as *unix*
  
+      The default is to use the same end-of-line convention as the input.
+ 
     .. index:: --wide-character-encoding (gnatpp)
  
     :switch:`--wide-character-encoding={e}`
*************** Alternatively, you may run the script us
*** 3600,3629 ****
     all the immediate units of the argument project.
  
  
-    .. index:: --gnat83 (gnatpp)
- 
-    :switch:`--gnat83`
-      Ada 83 mode
- 
- 
-    .. index:: --gnat95 (gnatpp)
- 
-    :switch:`--gnat95`
-      Ada 95 mode
- 
- 
-    .. index:: --gnat2005 (gnatpp)
- 
-    :switch:`--gnat2005`
-      Ada 2005 mode
- 
- 
-    .. index:: --gnat2012 (gnatpp)
- 
-    :switch:`--gnat2012`
-      Ada 2012 mode
- 
- 
     .. _Formatting_Rules:
  
     Formatting Rules
--- 3701,3706 ----
*************** Alternatively, you may run the script us
*** 3713,3722 ****
       the same line.
  
     A whole-line comment is indented according to the surrounding code,
!    with some exceptions.  Comments that start in column 1 are kept
!    there.  If possible, comments are not moved so far to the right that
!    the maximum line length is exceeded.  The ``--comments-unchanged``
!    option turns off comment formatting.  Special-form comments such as
     SPARK-style ``--#...`` are left alone.
  
     For an end-of-line comment, ``gnatpp`` tries to leave the same
--- 3790,3799 ----
       the same line.
  
     A whole-line comment is indented according to the surrounding code,
!    with some exceptions. Comments that start in column 1 are kept
!    there. If possible, comments are not moved so far to the right that
!    the maximum line length is exceeded. The ``--comments-unchanged``
!    option turns off comment formatting. Special-form comments such as
     SPARK-style ``--#...`` are left alone.
  
     For an end-of-line comment, ``gnatpp`` tries to leave the same
*************** Alternatively, you may run the script us
*** 3741,3747 ****
     are formatted according to the ``--comments-gnat-beginning`` and
     ``--comments-fill`` switches; other formatting switches are ignored. For
     example, ``--comments-only --comments-fill`` means to fill comment
!    paragraphs, and do nothing else.  Likewise, ``--comments-only
     --comments-gnat-beginning`` ensures comments start with at least two
     spaces after ``--``, and ``--comments-only --comments-gnat-beginning
     --comments-fill`` does both. If ``--comments-only`` is given without
--- 3818,3824 ----
     are formatted according to the ``--comments-gnat-beginning`` and
     ``--comments-fill`` switches; other formatting switches are ignored. For
     example, ``--comments-only --comments-fill`` means to fill comment
!    paragraphs, and do nothing else. Likewise, ``--comments-only
     --comments-gnat-beginning`` ensures comments start with at least two
     spaces after ``--``, and ``--comments-only --comments-gnat-beginning
     --comments-fill`` does both. If ``--comments-only`` is given without
*************** Alternatively, you may run the script us
*** 3758,3768 ****
     the same casing as the corresponding defining identifier.
  
     You control the casing for defining occurrences via the ``--name...``
!    switches.  With ``--name-case-as-declared``, which is the default,
     defining occurrences appear exactly as in the source file where they
!    are declared.  The other values for this switch --
     ``--name-upper-case``, ``--name-lower-case``, ``--name-mixed-case``
!    -- result in upper, lower, or mixed case, respectively.  If
     ``gnatpp`` changes the casing of a defining occurrence, it
     analogously changes the casing of all the usage occurrences of this
     name.
--- 3835,3845 ----
     the same casing as the corresponding defining identifier.
  
     You control the casing for defining occurrences via the ``--name...``
!    switches. With ``--name-case-as-declared``, which is the default,
     defining occurrences appear exactly as in the source file where they
!    are declared. The other values for this switch --
     ``--name-upper-case``, ``--name-lower-case``, ``--name-mixed-case``
!    -- result in upper, lower, or mixed case, respectively. If
     ``gnatpp`` changes the casing of a defining occurrence, it
     analogously changes the casing of all the usage occurrences of this
     name.
*************** Alternatively, you may run the script us
*** 3770,3776 ****
     If the defining occurrence of a name is not in the source compilation
     unit currently being processed by ``gnatpp``, the casing of each
     reference to this name is changed according to the switch (subject to
!    the dictionary file mechanism described below).  Thus ``gnatpp`` acts
     as though the switch had affected the casing for the defining
     occurrence of the name.
  
--- 3847,3853 ----
     If the defining occurrence of a name is not in the source compilation
     unit currently being processed by ``gnatpp``, the casing of each
     reference to this name is changed according to the switch (subject to
!    the dictionary file mechanism described below). Thus ``gnatpp`` acts
     as though the switch had affected the casing for the defining
     occurrence of the name.
  
*************** Alternatively, you may run the script us
*** 3807,3813 ****
     ``-n`` switch or explicit dictionary files. For
     example, by default the names ``Ada.Text_IO`` and
     ``GNAT.OS_Lib`` will appear as just shown, even in the presence of
!    a ``--name-upper-case`` switch.  To ensure that even
     such names are rendered in uppercase, additionally supply the
     --dictionary=- switch (or else place these names
     in upper case in a dictionary file).
--- 3884,3890 ----
     ``-n`` switch or explicit dictionary files. For
     example, by default the names ``Ada.Text_IO`` and
     ``GNAT.OS_Lib`` will appear as just shown, even in the presence of
!    a ``--name-upper-case`` switch. To ensure that even
     such names are rendered in uppercase, additionally supply the
     --dictionary=- switch (or else place these names
     in upper case in a dictionary file).
*************** Alternatively, you may run the script us
*** 3904,3909 ****
--- 3981,4047 ----
             Name2_NAME3_Name4 := Name4_NAME3_Name2 > NAME1;
          end Test;
  
+    .. _Preprocessor_directives:
+ 
+    Preprocessor Directives
+    ^^^^^^^^^^^^^^^^^^^^^^^
+ 
+    ``gnatpp`` has some support for preprocessor directives.
+    You can use preprocessor symbols, as in ``$symbol``.
+    In addition, you can use conditional compilation,
+    so long as the program text is syntactically legal Ada code
+    after removing all the preprocessor directives (lines starting
+    with ``#``). For example, ``gnatpp`` can format the following:
+ 
+      .. code-block:: ada
+ 
+         package P is
+         #IF SOMETHING
+            X : constant Integer := 123;
+         #ELSE
+            X : constant Integer := 456;
+         #END IF;
+         end P;
+ 
+    which will be formatted as if it were:
+ 
+      .. code-block:: ada
+ 
+         package P is
+            X : constant Integer := 123;
+            X : constant Integer := 456;
+         end P;
+ 
+    except that the ``#`` lines will be preserved.
+    However, ``gnatpp`` cannot format the following:
+ 
+      .. code-block:: ada
+ 
+         procedure P is
+         begin
+         #IF SOMETHING
+            if X = 0 then
+         #ELSE
+            if X = 1 then
+         #END IF;
+               null;
+            end if;
+         end P;
+ 
+    because removing the ``#`` lines gives:
+ 
+      .. code-block:: ada
+ 
+         procedure P is
+         begin
+            if X = 0 then
+            if X = 1 then
+               null;
+            end if;
+         end P;
+ 
+    which is not syntactically legal.
+ 
     Legacy Switches
     ^^^^^^^^^^^^^^^
  
*************** Alternatively, you may run the script us
*** 4033,4043 ****
     :switch:`-cl{nnn}`
       :switch:`--indent-continuation={nnn}`
  
-    .. index:: -ff (gnatpp)
- 
-    :switch:`-ff`
-      :switch:`--ff-after-pragma-page`
- 
     .. index:: -pipe (gnatpp)
  
     :switch:`-pipe`
--- 4171,4176 ----
*************** Alternatively, you may run the script us
*** 4154,4159 ****
--- 4287,4296 ----
        or creates the name file to generate using the standard GNAT
        naming conventions.
  
+       Note that it is no longer necessary to specify the Ada language version;
+       ``gnatmetric`` can process Ada source code written in any version from
+       Ada 83 onward without specifying any language version switch.
+ 
    * *switches*
        is an optional sequence of switches as described in the next section
  
*************** Alternatively, you may run the script us
*** 4313,4342 ****
      * *b* - Brackets encoding (default value)
  
  
-   .. index:: --gnat83 (gnatstub)
- 
-   :switch:`--gnat83`
-     Ada 83 mode
- 
- 
-   .. index:: --gnat95 (gnatstub)
- 
-   :switch:`--gnat95`
-     Ada 95 mode
- 
- 
-   .. index:: --gnat2005 (gnatstub)
- 
-   :switch:`--gnat2005`
-     Ada 2005 mode
- 
- 
-   .. index:: --gnat2012 (gnatstub)
- 
-   :switch:`--gnat2012`
-     Ada 2012 mode
- 
- 
    .. index:: --quiet (gnatstub)
    .. index:: -q (gnatstub)
  
--- 4450,4455 ----
*************** Alternatively, you may run the script us
*** 4661,4667 ****
    :switch:`--subdir={dirname}`
      Test packages are placed in a subdirectory of the corresponding source
      directory, with the name ``dirname``. Thus, each set of unit tests is located
!     in a subdirectory of the code under test.  If the sources are in separate
      directories, each source directory has a test subdirectory named ``dirname``.
  
  
--- 4774,4780 ----
    :switch:`--subdir={dirname}`
      Test packages are placed in a subdirectory of the corresponding source
      directory, with the name ``dirname``. Thus, each set of unit tests is located
!     in a subdirectory of the code under test. If the sources are in separate
      directories, each source directory has a test subdirectory named ``dirname``.
  
  
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_ugn/platform_specific_information.rst gcc-10.1.0/gcc/ada/doc/gnat_ugn/platform_specific_information.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_ugn/platform_specific_information.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_ugn/platform_specific_information.rst	Thu May  7 10:49:59 2020
*************** This section describes topics that are s
*** 260,266 ****
  platforms.
  
  
! .. only:: PRO or GPL
  
    .. rubric:: Installing from the Command Line
  
--- 260,266 ----
  platforms.
  
  
! .. only:: PRO
  
    .. rubric:: Installing from the Command Line
  
*************** platforms.
*** 273,304 ****
    line you should pass parameter :switch:`/S` (and, optionally,
    :switch:`/D=<directory>`) as command-line arguments.
  
- .. only:: PRO
- 
     For example, for an unattended installation of
!    GNAT 7.0.2 into the default directory
!    ``C:\\GNATPRO\\7.0.2`` you would run:
! 
!      ::
! 
!         gnatpro-7.0.2-i686-pc-mingw32-bin.exe /S
! 
!    To install into a custom directory, say, ``C:\\TOOLS\\GNATPRO\\7.0.2``:
! 
!      ::
! 
!         gnatpro-7.0.2-i686-pc-mingw32-bin /S /D=C:\TOOLS\GNATPRO\7.0.2
! 
! .. only:: GPL
! 
!    For example, for an unattended installation of
!    GNAT 2012 into ``C:\\GNAT\\2012``:
  
!      ::
  
!         gnat-gpl-2012-i686-pc-mingw32-bin /S /D=C:\GNAT\2012
  
! .. only:: PRO or GPL
  
     You can use the same syntax for all installers.
  
--- 273,287 ----
    line you should pass parameter :switch:`/S` (and, optionally,
    :switch:`/D=<directory>`) as command-line arguments.
  
     For example, for an unattended installation of
!    GNAT 19.2 into the default directory :file:`C:\\GNATPRO\\19.2` you
!    would run::
  
!         gnatpro-19.2-x86-windows-bin /S
  
!    To install into a custom directory, say, :file:`C:\\TOOLS\\GNATPRO\\19.2`::
  
!         gnatpro-19.2-x86-windows-bin /S /D=C:\TOOLS\GNATPRO\19.2
  
     You can use the same syntax for all installers.
  
*************** platforms.
*** 306,312 ****
     associations, so such activities need to be done by hand.
  
  
- 
  .. _Using_GNAT_on_Windows:
  
  Using GNAT on Windows
--- 289,294 ----
*************** and::
*** 488,493 ****
--- 470,518 ----
     Ada.Command_Line.Argument (1) -> "'*.txt'"
  
  
+ Windows Socket Timeouts
+ -----------------------
+ 
+ Microsoft Windows desktops older than ``8.0`` and Microsoft Windows Servers
+ older than ``2019`` set a socket timeout 500 milliseconds longer than the value
+ set by setsockopt with ``SO_RCVTIMEO`` and ``SO_SNDTIMEO`` options. The GNAT
+ runtime makes a correction for the difference in the corresponding Windows
+ versions. For Windows Server starting with version ``2019``, the user must
+ provide a manifest file for the GNAT runtime to be able to recognize that
+ the Windows version does not need the timeout correction. The manifest file
+ should be located in the same directory as the executable file, and its file
+ name must match the executable name suffixed by ``.manifest``. For example,
+ if the executable name is :file:`sock_wto.exe`, then the manifest file name
+ has to be :file:`sock_wto.exe.manifest`. The manifest file must contain at
+ least the following data::
+ 
+    <?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+    <assembly xmlns="urn:schemas-microsoft-com:asm.v1" manifestVersion="1.0">
+    <compatibility xmlns="urn:schemas-microsoft-com:compatibility.v1">
+    <application>
+       <!-- Windows Vista -->
+       <supportedOS Id="{e2011457-1546-43c5-a5fe-008deee3d3f0}"/>
+       <!-- Windows 7 -->
+       <supportedOS Id="{35138b9a-5d96-4fbd-8e2d-a2440225f93a}"/>
+       <!-- Windows 8 -->
+       <supportedOS Id="{4a2f28e3-53b9-4441-ba9c-d69d4a4a6e38}"/>
+       <!-- Windows 8.1 -->
+       <supportedOS Id="{1f676c76-80e1-4239-95bb-83d0f6d0da78}"/>
+       <!-- Windows 10 -->
+       <supportedOS Id="{8e0f7a12-bfb3-4fe8-b9a5-48fd50a15a9a}"/>
+    </application>
+    </compatibility>
+    </assembly>
+ 
+ Without the manifest file, the socket timeout is going to be overcorrected on
+ these Windows Server versions and the actual time is going to be 500
+ milliseconds shorter than what was set with GNAT.Sockets.Set_Socket_Option.
+ Note that on Microsoft Windows versions where correction is necessary, there
+ is no way to set a socket timeout shorter than 500 ms. If a socket timeout
+ shorter than 500 ms is needed on these Windows versions, a call to
+ Check_Selector should be added before any socket read or write operations.
+ 
+ 
  .. _Mixed-Language_Programming_on_Windows:
  
  Mixed-Language Programming on Windows
diff -Nrcpad gcc-9.3.0/gcc/ada/doc/gnat_ugn/the_gnat_compilation_model.rst gcc-10.1.0/gcc/ada/doc/gnat_ugn/the_gnat_compilation_model.rst
*** gcc-9.3.0/gcc/ada/doc/gnat_ugn/the_gnat_compilation_model.rst	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/doc/gnat_ugn/the_gnat_compilation_model.rst	Thu May  7 10:49:59 2020
*************** Some of the known limitations include:
*** 4531,4538 ****
  * identifiers with identical name (except casing) will generate compilation
    errors (e.g. ``shm_get`` vs ``SHM_GET``).
  
! The code generated is using the Ada 2005 syntax, which makes it
! easier to interface with other languages than previous versions of Ada.
  
  .. _Running_the_binding_generator:
  
--- 4531,4539 ----
  * identifiers with identical name (except casing) will generate compilation
    errors (e.g. ``shm_get`` vs ``SHM_GET``).
  
! The code is generated using Ada 2012 syntax, which makes it easier to interface
! with other languages. In most cases you can still use the generated binding
! even if your code is compiled using earlier versions of Ada (e.g. ``-gnat95``).
  
  .. _Running_the_binding_generator:
  
*************** header files needed by these files trans
*** 4547,4553 ****
  .. code-block:: sh
  
        $ g++ -c -fdump-ada-spec -C /usr/include/time.h
!       $ gcc -c -gnat05 *.ads
  
  will generate, under GNU/Linux, the following files: :file:`time_h.ads`,
  :file:`bits_time_h.ads`, :file:`stddef_h.ads`, :file:`bits_types_h.ads` which
--- 4548,4554 ----
  .. code-block:: sh
  
        $ g++ -c -fdump-ada-spec -C /usr/include/time.h
!       $ gcc -c *.ads
  
  will generate, under GNU/Linux, the following files: :file:`time_h.ads`,
  :file:`bits_time_h.ads`, :file:`stddef_h.ads`, :file:`bits_types_h.ads` which
diff -Nrcpad gcc-9.3.0/gcc/ada/einfo.adb gcc-10.1.0/gcc/ada/einfo.adb
*** gcc-9.3.0/gcc/ada/einfo.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/einfo.adb	Thu May  7 10:49:59 2020
*************** package body Einfo is
*** 215,220 ****
--- 215,221 ----
     --    Stored_Constraint               Elist23
  
     --    Incomplete_Actuals              Elist24
+    --    Minimum_Accessibility           Node24
     --    Related_Expression              Node24
     --    Subps_Index                     Uint24
  
*************** package body Einfo is
*** 421,427 ****
     --    Never_Set_In_Source             Flag115
     --    Is_Visible_Lib_Unit             Flag116
     --    Is_Unchecked_Union              Flag117
-    --    Is_For_Access_Subtype           Flag118
     --    Has_Convention_Pragma           Flag119
     --    Has_Primitive_Operations        Flag120
  
--- 422,427 ----
*************** package body Einfo is
*** 629,636 ****
     --    Is_Activation_Record            Flag305
     --    Needs_Activation_Record         Flag306
     --    Is_Loop_Parameter               Flag307
  
-    --    (unused)                        Flag308
     --    (unused)                        Flag309
  
     --  Note: Flag310-317 are defined in atree.ads/adb, but not yet in atree.h
--- 629,636 ----
     --    Is_Activation_Record            Flag305
     --    Needs_Activation_Record         Flag306
     --    Is_Loop_Parameter               Flag307
+    --    Invariants_Ignored              Flag308
  
     --    (unused)                        Flag309
  
     --  Note: Flag310-317 are defined in atree.ads/adb, but not yet in atree.h
*************** package body Einfo is
*** 2077,2082 ****
--- 2077,2088 ----
        return Node21 (Id);
     end Interface_Name;
  
+    function Invariants_Ignored (Id : E) return B is
+    begin
+       pragma Assert (Is_Type (Id));
+       return Flag308 (Id);
+    end Invariants_Ignored;
+ 
     function Is_Abstract_Subprogram (Id : E) return B is
     begin
        pragma Assert (Is_Overloadable (Id));
*************** package body Einfo is
*** 2141,2147 ****
  
     function Is_Called (Id : E) return B is
     begin
!       pragma Assert (Ekind_In (Id, E_Procedure, E_Function));
        return Flag102 (Id);
     end Is_Called;
  
--- 2147,2153 ----
  
     function Is_Called (Id : E) return B is
     begin
!       pragma Assert (Ekind_In (Id, E_Procedure, E_Function, E_Package));
        return Flag102 (Id);
     end Is_Called;
  
*************** package body Einfo is
*** 2303,2314 ****
        return Flag70 (Id);
     end Is_First_Subtype;
  
-    function Is_For_Access_Subtype (Id : E) return B is
-    begin
-       pragma Assert (Ekind_In (Id, E_Record_Subtype, E_Private_Subtype));
-       return Flag118 (Id);
-    end Is_For_Access_Subtype;
- 
     function Is_Formal_Subprogram (Id : E) return B is
     begin
        return Flag111 (Id);
--- 2309,2314 ----
*************** package body Einfo is
*** 2321,2327 ****
  
     function Is_Generic_Actual_Subprogram (Id : E) return B is
     begin
!       pragma Assert (Ekind (Id) = E_Function or else Ekind (Id) = E_Procedure);
        return Flag274 (Id);
     end Is_Generic_Actual_Subprogram;
  
--- 2321,2327 ----
  
     function Is_Generic_Actual_Subprogram (Id : E) return B is
     begin
!       pragma Assert (Ekind_In (Id, E_Function, E_Procedure));
        return Flag274 (Id);
     end Is_Generic_Actual_Subprogram;
  
*************** package body Einfo is
*** 2854,2859 ****
--- 2854,2865 ----
        return UI_To_Int (Uint8 (Id));
     end Mechanism;
  
+    function Minimum_Accessibility (Id : E) return E is
+    begin
+       pragma Assert (Ekind (Id) in Formal_Kind);
+       return Node24 (Id);
+    end Minimum_Accessibility;
+ 
     function Modulus (Id : E) return Uint is
     begin
        pragma Assert (Is_Modular_Integer_Type (Id));
*************** package body Einfo is
*** 5278,5283 ****
--- 5284,5295 ----
        Set_Node21 (Id, V);
     end Set_Interface_Name;
  
+    procedure Set_Invariants_Ignored (Id : E; V : B := True) is
+    begin
+       pragma Assert (Is_Type (Id));
+       Set_Flag308 (Id, V);
+    end Set_Invariants_Ignored;
+ 
     procedure Set_Is_Abstract_Subprogram (Id : E; V : B := True) is
     begin
        pragma Assert (Is_Overloadable (Id));
*************** package body Einfo is
*** 5351,5357 ****
  
     procedure Set_Is_Called (Id : E; V : B := True) is
     begin
!       pragma Assert (Ekind_In (Id, E_Procedure, E_Function));
        Set_Flag102 (Id, V);
     end Set_Is_Called;
  
--- 5363,5369 ----
  
     procedure Set_Is_Called (Id : E; V : B := True) is
     begin
!       pragma Assert (Ekind_In (Id, E_Procedure, E_Function, E_Package));
        Set_Flag102 (Id, V);
     end Set_Is_Called;
  
*************** package body Einfo is
*** 5526,5537 ****
        Set_Flag70 (Id, V);
     end Set_Is_First_Subtype;
  
-    procedure Set_Is_For_Access_Subtype (Id : E; V : B := True) is
-    begin
-       pragma Assert (Ekind_In (Id, E_Record_Subtype, E_Private_Subtype));
-       Set_Flag118 (Id, V);
-    end Set_Is_For_Access_Subtype;
- 
     procedure Set_Is_Formal_Subprogram (Id : E; V : B := True) is
     begin
        Set_Flag111 (Id, V);
--- 5538,5543 ----
*************** package body Einfo is
*** 6089,6094 ****
--- 6095,6106 ----
        Set_Uint8 (Id, UI_From_Int (V));
     end Set_Mechanism;
  
+    procedure Set_Minimum_Accessibility (Id : E; V : E) is
+    begin
+       pragma Assert (Ekind (Id) in Formal_Kind);
+       Set_Node24 (Id, V);
+    end Set_Minimum_Accessibility;
+ 
     procedure Set_Modulus (Id : E; V : U) is
     begin
        pragma Assert (Ekind (Id) = E_Modular_Integer_Type);
*************** package body Einfo is
*** 7602,7607 ****
--- 7614,7620 ----
                   Id = Pragma_Initial_Condition          or else
                   Id = Pragma_Initializes                or else
                   Id = Pragma_Interrupt_Handler          or else
+                  Id = Pragma_No_Caching                 or else
                   Id = Pragma_Part_Of                    or else
                   Id = Pragma_Refined_Depends            or else
                   Id = Pragma_Refined_Global             or else
*************** package body Einfo is
*** 8044,8053 ****
     ------------------------
  
     function Is_Constant_Object (Id : E) return B is
-       K : constant Entity_Kind := Ekind (Id);
     begin
!       return
!         K = E_Constant or else K = E_In_Parameter or else K = E_Loop_Parameter;
     end Is_Constant_Object;
  
     -------------------
--- 8057,8064 ----
     ------------------------
  
     function Is_Constant_Object (Id : E) return B is
     begin
!       return Ekind_In (Id, E_Constant, E_In_Parameter, E_Loop_Parameter);
     end Is_Constant_Object;
  
     -------------------
*************** package body Einfo is
*** 8065,8072 ****
  
     function Is_Discriminal (Id : E) return B is
     begin
!       return (Ekind_In (Id, E_Constant, E_In_Parameter)
!                 and then Present (Discriminal_Link (Id)));
     end Is_Discriminal;
  
     ----------------------
--- 8076,8083 ----
  
     function Is_Discriminal (Id : E) return B is
     begin
!       return Ekind_In (Id, E_Constant, E_In_Parameter)
!                and then Present (Discriminal_Link (Id));
     end Is_Discriminal;
  
     ----------------------
*************** package body Einfo is
*** 8127,8133 ****
     function Is_Elaboration_Target (Id : Entity_Id) return Boolean is
     begin
        return
!         Ekind_In (Id, E_Constant, E_Variable)
            or else Is_Entry        (Id)
            or else Is_Generic_Unit (Id)
            or else Is_Subprogram   (Id)
--- 8138,8144 ----
     function Is_Elaboration_Target (Id : Entity_Id) return Boolean is
     begin
        return
!         Ekind_In (Id, E_Constant, E_Package, E_Variable)
            or else Is_Entry        (Id)
            or else Is_Generic_Unit (Id)
            or else Is_Subprogram   (Id)
*************** package body Einfo is
*** 8141,8147 ****
     function Is_External_State (Id : E) return B is
     begin
        --  To qualify, the abstract state must appear with option "external" or
!       --  "synchronous" (SPARK RM 7.1.4(8) and (10)).
  
        return
          Ekind (Id) = E_Abstract_State
--- 8152,8158 ----
     function Is_External_State (Id : E) return B is
     begin
        --  To qualify, the abstract state must appear with option "external" or
!       --  "synchronous" (SPARK RM 7.1.4(7) and (9)).
  
        return
          Ekind (Id) = E_Abstract_State
*************** package body Einfo is
*** 8193,8200 ****
  
     function Is_Prival (Id : E) return B is
     begin
!       return (Ekind_In (Id, E_Constant, E_Variable)
!                 and then Present (Prival_Link (Id)));
     end Is_Prival;
  
     ----------------------------
--- 8204,8211 ----
  
     function Is_Prival (Id : E) return B is
     begin
!       return Ekind_In (Id, E_Constant, E_Variable)
!                and then Present (Prival_Link (Id));
     end Is_Prival;
  
     ----------------------------
*************** package body Einfo is
*** 8319,8325 ****
     function Is_Synchronized_State (Id : E) return B is
     begin
        --  To qualify, the abstract state must appear with simple option
!       --  "synchronous" (SPARK RM 7.1.4(10)).
  
        return
          Ekind (Id) = E_Abstract_State
--- 8330,8336 ----
     function Is_Synchronized_State (Id : E) return B is
     begin
        --  To qualify, the abstract state must appear with simple option
!       --  "synchronous" (SPARK RM 7.1.4(9)).
  
        return
          Ekind (Id) = E_Abstract_State
*************** package body Einfo is
*** 9786,9791 ****
--- 9797,9803 ----
        W ("In_Package_Body",                 Flag48  (Id));
        W ("In_Private_Part",                 Flag45  (Id));
        W ("In_Use",                          Flag8   (Id));
+       W ("Invariants_Ignored",              Flag308 (Id));
        W ("Is_Abstract_Subprogram",          Flag19  (Id));
        W ("Is_Abstract_Type",                Flag146 (Id));
        W ("Is_Access_Constant",              Flag69  (Id));
*************** package body Einfo is
*** 9826,9832 ****
        W ("Is_Exported",                     Flag99  (Id));
        W ("Is_Finalized_Transient",          Flag252 (Id));
        W ("Is_First_Subtype",                Flag70  (Id));
-       W ("Is_For_Access_Subtype",           Flag118 (Id));
        W ("Is_Formal_Subprogram",            Flag111 (Id));
        W ("Is_Frozen",                       Flag4   (Id));
        W ("Is_Generic_Actual_Subprogram",    Flag274 (Id));
--- 9838,9843 ----
*************** package body Einfo is
*** 10928,10933 ****
--- 10939,10947 ----
           =>
              Write_Str ("Related_Expression");
  
+          when Formal_Kind =>
+             Write_Str ("Minimum_Accessibility");
+ 
           when E_Function
              | E_Operator
              | E_Procedure
diff -Nrcpad gcc-9.3.0/gcc/ada/einfo.ads gcc-10.1.0/gcc/ada/einfo.ads
*** gcc-9.3.0/gcc/ada/einfo.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/einfo.ads	Thu May  7 10:49:59 2020
*************** package Einfo is
*** 132,150 ****
  --  default size of objects, creates chaos, and major incompatibilities in
  --  existing code.
  
  --  We proceed as follows, for discrete and fixed-point subtypes, we have
  --  two separate sizes for each subtype:
  
  --    The Object_Size, which is used for determining the default size of
  --    objects and components. This size value can be referred to using the
  --    Object_Size attribute. The phrase "is used" here means that it is
! --    the basis of the determination of the size. The backend is free to
  --    pad this up if necessary for efficiency, e.g. an 8-bit stand-alone
  --    character might be stored in 32 bits on a machine with no efficient
  --    byte access instructions such as the Alpha.
  
! --    The default rules for the value of Object_Size for fixed-point and
! --    discrete types are as follows:
  
  --       The Object_Size for base subtypes reflect the natural hardware
  --       size in bits (see Ttypes and Cstand for integer types). For
--- 132,154 ----
  --  default size of objects, creates chaos, and major incompatibilities in
  --  existing code.
  
+ --  The Ada 2020 RM acknowledges it and adopts GNAT's Object_Size attribute
+ --  for determining the default size of objects, but stops short of applying
+ --  it universally like GNAT. Indeed the notable exceptions are nonaliased
+ --  stand-alone objects, which are not covered by Object_Size in Ada 2020.
+ 
  --  We proceed as follows, for discrete and fixed-point subtypes, we have
  --  two separate sizes for each subtype:
  
  --    The Object_Size, which is used for determining the default size of
  --    objects and components. This size value can be referred to using the
  --    Object_Size attribute. The phrase "is used" here means that it is
! --    the basis of the determination of the size. The back end is free to
  --    pad this up if necessary for efficiency, e.g. an 8-bit stand-alone
  --    character might be stored in 32 bits on a machine with no efficient
  --    byte access instructions such as the Alpha.
  
! --    The default rules for the value of Object_Size are as follows:
  
  --       The Object_Size for base subtypes reflect the natural hardware
  --       size in bits (see Ttypes and Cstand for integer types). For
*************** package Einfo is
*** 158,166 ****
  --       base type, and the Object_Size of a derived first subtype is copied
  --       from the parent first subtype.
  
! --    The Value_Size which is the number of bits required to store a value
  --    of the type. This size can be referred to using the Value_Size
! --    attribute. This value is used to determine how tightly to pack
  --    records or arrays with components of this type, and also affects
  --    the semantics of unchecked conversion (unchecked conversions where
  --    the Value_Size values differ generate a warning, and are potentially
--- 162,172 ----
  --       base type, and the Object_Size of a derived first subtype is copied
  --       from the parent first subtype.
  
! --    The Ada 2020 RM defined attribute Object_Size uses this implementation.
! 
! --    The Value_Size, which is the number of bits required to store a value
  --    of the type. This size can be referred to using the Value_Size
! --    attribute. This value is used for determining how tightly to pack
  --    records or arrays with components of this type, and also affects
  --    the semantics of unchecked conversion (unchecked conversions where
  --    the Value_Size values differ generate a warning, and are potentially
*************** package Einfo is
*** 182,188 ****
  --       dynamic bounds, it is assumed that the value can range down or up
  --       to the corresponding bound of the ancestor.
  
! --    The RM defined attribute Size corresponds to the Value_Size attribute.
  
  --    The Size attribute may be defined for a first-named subtype. This sets
  --    the Value_Size of the first-named subtype to the given value, and the
--- 188,194 ----
  --       dynamic bounds, it is assumed that the value can range down or up
  --       to the corresponding bound of the ancestor.
  
! --    The Ada 95 RM defined attribute Size is identified with Value_Size.
  
  --    The Size attribute may be defined for a first-named subtype. This sets
  --    the Value_Size of the first-named subtype to the given value, and the
*************** package Einfo is
*** 194,207 ****
  --    subtypes. The Value_Size of any other static subtypes is not affected.
  
  --    Value_Size and Object_Size may be explicitly set for any subtype using
! --    an attribute definition clause. Note that the use of these attributes
! --    can cause the RM 13.1(14) rule to be violated. If two access types
! --    reference aliased objects whose subtypes have differing Object_Size
! --    values as a result of explicit attribute definition clauses, then it
! --    is erroneous to convert from one access subtype to the other.
  
! --    At the implementation level, Esize stores the Object_Size and the
! --    RM_Size field stores the Value_Size (and hence the value of the
  --    Size attribute, which, as noted above, is equivalent to Value_Size).
  
  --  To get a feel for the difference, consider the following examples (note
--- 200,214 ----
  --    subtypes. The Value_Size of any other static subtypes is not affected.
  
  --    Value_Size and Object_Size may be explicitly set for any subtype using
! --    an attribute definition clause. Note that the use of such a clause can
! --    cause the RM 13.1(14) rule to be violated, in Ada 95 and 2020 for the
! --    Value_Size attribute, but only in Ada 95 for the Object_Size attribute.
! --    If access types reference aliased objects whose subtypes have differing
! --    Object_Size values as a result of explicit attribute definition clauses,
! --    then it is erroneous to convert from one access subtype to the other.
  
! --    At the implementation level, the Esize field stores the Object_Size
! --    and the RM_Size field stores the Value_Size (hence the value of the
  --    Size attribute, which, as noted above, is equivalent to Value_Size).
  
  --  To get a feel for the difference, consider the following examples (note
*************** package Einfo is
*** 320,326 ****
  --  an attempt to set the attribute on a subtype will raise an assert error.
  
  --  Other attributes are noted as applying to the [implementation base type
! --  only].  These are representation attributes which must always apply to a
  --  full non-private type, and where the attributes are always on the full
  --  type. The attribute can be referenced on a subtype (and automatically
  --  retrieves the value from the implementation base type). However, it is an
--- 327,333 ----
  --  an attempt to set the attribute on a subtype will raise an assert error.
  
  --  Other attributes are noted as applying to the [implementation base type
! --  only]. These are representation attributes which must always apply to a
  --  full non-private type, and where the attributes are always on the full
  --  type. The attribute can be referenced on a subtype (and automatically
  --  retrieves the value from the implementation base type). However, it is an
*************** package Einfo is
*** 663,670 ****
  --       In that case, this field points to that subtype.
  --
  --       For E_Class_Wide_Subtype, the presence of Equivalent_Type overrides
! --       this field. Note that this field ONLY appears in subtype entries, not
! --       in type entries, it is not defined, and it is an error to reference
  --       Cloned_Subtype in an E_Record_Type or E_Class_Wide_Type entity.
  
  --    Comes_From_Source
--- 670,677 ----
  --       In that case, this field points to that subtype.
  --
  --       For E_Class_Wide_Subtype, the presence of Equivalent_Type overrides
! --       this field. Note that this field ONLY appears in subtype entities, not
! --       in type entities, it is not defined, and it is an error to reference
  --       Cloned_Subtype in an E_Record_Type or E_Class_Wide_Type entity.
  
  --    Comes_From_Source
*************** package Einfo is
*** 915,921 ****
  --       depends on a private type.
  
  --    Derived_Type_Link (Node31)
! --       Defined in all type and subtype entries. Set in a base type if
  --       a derived type declaration is encountered which derives from
  --       this base type or one of its subtypes, and there are already
  --       primitive operations declared. In this case, it references the
--- 922,928 ----
  --       depends on a private type.
  
  --    Derived_Type_Link (Node31)
! --       Defined in all type and subtype entities. Set in a base type if
  --       a derived type declaration is encountered which derives from
  --       this base type or one of its subtypes, and there are already
  --       primitive operations declared. In this case, it references the
*************** package Einfo is
*** 929,940 ****
  --
  --       In this case, if primitive operations have been declared for R, at
  --       the point of declaration of G, then the Derived_Type_Link of R is set
! --       to point to the entity for G. This is used to generate warnings for
! --       rep clauses that appear later on for R, which might result in an
! --       unexpected implicit conversion operation.
  --
  --       Note: if there is more than one such derived type, the link will point
! --       to the last one (this is only used in generating warning messages).
  
  --    Designated_Type (synthesized)
  --       Applies to access types. Returns the designated type. Differs from
--- 936,947 ----
  --
  --       In this case, if primitive operations have been declared for R, at
  --       the point of declaration of G, then the Derived_Type_Link of R is set
! --       to point to the entity for G. This is used to generate warnings and
! --       errors for rep clauses that appear later on for R, which might result
! --       in an unexpected (or illegal) implicit conversion operation.
  --
  --       Note: if there is more than one such derived type, the link will point
! --       to the last one.
  
  --    Designated_Type (synthesized)
  --       Applies to access types. Returns the designated type. Differs from
*************** package Einfo is
*** 1228,1234 ****
  --       initial value). See Exp_Util.Expand_Class_Wide_Subtype for further
  --       details. For E_Exception_Type, this points to the record containing
  --       the data necessary to represent exceptions (for further details, see
! --       System.Standard_Library. For access_to_protected subprograms, it
  --       denotes a record that holds pointers to the operation and to the
  --       protected object. For remote Access_To_Subprogram types, it denotes
  --       the record that is the fat pointer representation of an RAST.
--- 1235,1241 ----
  --       initial value). See Exp_Util.Expand_Class_Wide_Subtype for further
  --       details. For E_Exception_Type, this points to the record containing
  --       the data necessary to represent exceptions (for further details, see
! --       System.Standard_Library). For access to protected subprograms, it
  --       denotes a record that holds pointers to the operation and to the
  --       protected object. For remote Access_To_Subprogram types, it denotes
  --       the record that is the fat pointer representation of an RAST.
*************** package Einfo is
*** 1616,1622 ****
  --       set, signalling that Freeze.Inherit_Delayed_Rep_Aspects must be called
  --       at the freeze point of the derived type.
  
! --    Has_DIC (syntherized)
  --       Defined in all type entities. Set for a private type and its full view
  --       when the type is subject to pragma Default_Initial_Condition (DIC), or
  --       when the type inherits a DIC pragma from a parent type.
--- 1623,1629 ----
  --       set, signalling that Freeze.Inherit_Delayed_Rep_Aspects must be called
  --       at the freeze point of the derived type.
  
! --    Has_DIC (synthesized)
  --       Defined in all type entities. Set for a private type and its full view
  --       when the type is subject to pragma Default_Initial_Condition (DIC), or
  --       when the type inherits a DIC pragma from a parent type.
*************** package Einfo is
*** 1725,1731 ****
  --       has independent components is to see if either the object or its base
  --       type has this flag set. Note that in the case of a type, the pragma
  --       will be chained to the rep item chain of the first subtype in the
! --       usual manner.
  
  --    Has_Inheritable_Invariants (Flag248) [base type only]
  --       Defined in all type entities. Set on private types and interface types
--- 1732,1739 ----
  --       has independent components is to see if either the object or its base
  --       type has this flag set. Note that in the case of a type, the pragma
  --       will be chained to the rep item chain of the first subtype in the
! --       usual manner. Also set if a pragma Has_Atomic_Components or pragma
! --       Has_Aliased_Components applies to the type or object.
  
  --    Has_Inheritable_Invariants (Flag248) [base type only]
  --       Defined in all type entities. Set on private types and interface types
*************** package Einfo is
*** 1739,1745 ****
  
  --    Has_Inherited_Invariants (Flag291) [base type only]
  --       Defined in all type entities. Set on private extensions and derived
! --       types which inherit at least on class-wide invariant from a parent or
  --       an interface type. The flag is also set on the full view of a private
  --       extension for completeness.
  
--- 1747,1753 ----
  
  --    Has_Inherited_Invariants (Flag291) [base type only]
  --       Defined in all type entities. Set on private extensions and derived
! --       types which inherit at least one class-wide invariant from a parent or
  --       an interface type. The flag is also set on the full view of a private
  --       extension for completeness.
  
*************** package Einfo is
*** 1841,1847 ****
  --       when the type is subject to pragma Default_Initial_Condition.
  
  --    Has_Own_Invariants (Flag232) [base type only]
! --       Defined in all type entities. Set on any type which defines at least
  --       one invariant of its own. The flag is also set on the full view of a
  --       private type for completeness.
  
--- 1849,1855 ----
  --       when the type is subject to pragma Default_Initial_Condition.
  
  --    Has_Own_Invariants (Flag232) [base type only]
! --       Defined in all type entities. Set on any type that defines at least
  --       one invariant of its own. The flag is also set on the full view of a
  --       private type for completeness.
  
*************** package Einfo is
*** 1952,1958 ****
  --       Unmodified and Unreferenced pragmas.
  
  --    Has_Pragma_Unused (Flag294)
! --       Defined in all entries. Set if a valid pragma Unused applies to a
  --       variable or entity, indicating that warnings should not be given if
  --       it is never modified or referenced. Note: This pragma is exactly
  --       equivalent Unmodified and Unreference combined.
--- 1960,1966 ----
  --       Unmodified and Unreferenced pragmas.
  
  --    Has_Pragma_Unused (Flag294)
! --       Defined in all entities. Set if a valid pragma Unused applies to a
  --       variable or entity, indicating that warnings should not be given if
  --       it is never modified or referenced. Note: This pragma is exactly
  --       equivalent Unmodified and Unreference combined.
*************** package Einfo is
*** 2259,2264 ****
--- 2267,2277 ----
  --       implemented by a tagged type that are not already implemented by the
  --       ancestors (Ada 2005: AI-251).
  
+ --    Invariants_Ignored (Flag308)
+ --       Defined on all types. Indicates whether the type declaration is in
+ --       a context where Assertion_Policy is Ignore, in which case no checks
+ --       (static or dynamic) must be generated for objects of the type.
+ 
  --    Invariant_Procedure (synthesized)
  --       Defined in types and subtypes. Set for private types and their full
  --       views if one or more [class-wide] invariants apply to the type, or
*************** package Einfo is
*** 2366,2374 ****
  --       i.e. Standard.Boolean and all types ultimately derived from it.
  
  --    Is_Called (Flag102)
! --       Defined in subprograms. Returns true if the subprogram is called
! --       in the unit being compiled or in a unit in the context. Used for
! --       inlining.
  
  --    Is_Character_Type (Flag63)
  --       Defined in all entities. Set for character types and subtypes,
--- 2379,2387 ----
  --       i.e. Standard.Boolean and all types ultimately derived from it.
  
  --    Is_Called (Flag102)
! --       Defined in subprograms and packages. Set if a subprogram is called
! --       from the unit being compiled or a unit in the closure. Also set for
! --       a package that contains called subprograms. Used only for inlining.
  
  --    Is_Character_Type (Flag63)
  --       Defined in all entities. Set for character types and subtypes,
*************** package Einfo is
*** 2608,2619 ****
  --    Is_Formal_Subprogram (Flag111)
  --       Defined in all entities. Set for generic formal subprograms.
  
- --    Is_For_Access_Subtype (Flag118)
- --       Defined in E_Private_Subtype and E_Record_Subtype entities. Means the
- --       sole purpose of the type is to be designated by an Access_Subtype and
- --       hence should not be expanded into components because the type may not
- --       have been found or frozen yet.
- 
  --    Is_Frozen (Flag4)
  --       Defined in all type and subtype entities. Set if type or subtype has
  --       been frozen.
--- 2621,2626 ----
*************** package Einfo is
*** 2660,2666 ****
  --       Applies to all entities. Yields True for abstract states, [generic]
  --       packages, [generic] subprograms, components, discriminants, formal
  --       parameters, objects, package bodies, subprogram bodies, and [sub]types
! --       subject to pragma Ghost or those that inherit the Ghost propery from
  --       an enclosing construct.
  
  --    Is_Hidden (Flag57)
--- 2667,2673 ----
  --       Applies to all entities. Yields True for abstract states, [generic]
  --       packages, [generic] subprograms, components, discriminants, formal
  --       parameters, objects, package bodies, subprogram bodies, and [sub]types
! --       subject to pragma Ghost or those that inherit the Ghost property from
  --       an enclosing construct.
  
  --    Is_Hidden (Flag57)
*************** package Einfo is
*** 2721,2733 ****
  --       Applies to all entities, true for incomplete types and subtypes
  
  --    Is_Independent (Flag268)
! --       Defined in all type entities, and also in constants, components and
! --       variables. Set if a valid pragma or aspect Independent applies to the
! --       entity, or if a valid pragma or aspect Independent_Components applies
! --       to the enclosing record type for a component. Also set if a pragma
! --       Shared or pragma Atomic applies to the entity. In the case of private
! --       and incomplete types, this flag is set in both the partial view and
! --       the full view.
  
  --    Is_Initial_Condition_Procedure (Flag302)
  --       Defined in functions and procedures. Set for a generated procedure
--- 2728,2741 ----
  --       Applies to all entities, true for incomplete types and subtypes
  
  --    Is_Independent (Flag268)
! --       Defined in all types and objects. Set if a valid pragma or aspect
! --       Independent applies to the entity, or for a component if a valid
! --       pragma or aspect Independent_Components applies to the enclosing
! --       record type. Also set if a pragma Shared or pragma Atomic applies to
! --       the entity, or if the declaration of the entity carries the Aliased
! --       keyword. For Ada 2012, also applies to formal parameters. In the
! --       case of private and incomplete types, this flag is set in both the
! --       partial view and the full view.
  
  --    Is_Initial_Condition_Procedure (Flag302)
  --       Defined in functions and procedures. Set for a generated procedure
*************** package Einfo is
*** 3333,3339 ****
  --       frozen. If set it indicates that the representation is known to be
  --       unsigned (i.e. that no negative values appear in the range). This is
  --       normally just a reflection of the lower bound of the subtype or base
! --       type, but there is one case in which the setting is non-obvious,
  --       namely the case of an unsigned subtype of a signed type from which
  --       a further subtype is obtained using variable bounds. This further
  --       subtype is still unsigned, but this cannot be determined by looking
--- 3341,3347 ----
  --       frozen. If set it indicates that the representation is known to be
  --       unsigned (i.e. that no negative values appear in the range). This is
  --       normally just a reflection of the lower bound of the subtype or base
! --       type, but there is one case in which the setting is not obvious,
  --       namely the case of an unsigned subtype of a signed type from which
  --       a further subtype is obtained using variable bounds. This further
  --       subtype is still unsigned, but this cannot be determined by looking
*************** package Einfo is
*** 3522,3527 ****
--- 3530,3543 ----
  --       is also set (to the default value of zero = Default_Mechanism) in a
  --       subprogram body entity but not used in this context.
  
+ --    Minimum_Accessibility (Node24)
+ --       Defined in formal parameters in the non-generic case. Normally Empty,
+ --       but if expansion is active, and a parameter exists for which a
+ --       dynamic accessibility check is required, then an object is generated
+ --       within such a subprogram representing the accessibility level of the
+ --       subprogram or the formal's Extra_Accessibility - whichever one is
+ --       lesser. The Minimum_Accessibility field then points to this object.
+ 
  --    Modulus (Uint17) [base type only]
  --       Defined in modular types. Contains the modulus. For the binary case,
  --       this will be a power of 2, but if Non_Binary_Modulus is set, then it
*************** package Einfo is
*** 3779,3785 ****
  
  --    Optimize_Alignment_Space (Flag241)
  --       Defined in type, subtype, variable, and constant entities. This
! --       flag records that the type or object is to be layed out in a manner
  --       consistent with Optimize_Alignment (Space) mode. The compiler and
  --       binder ensure a consistent view of any given type or object. If pragma
  --       Optimize_Alignment (Off) mode applies to the type/object, then neither
--- 3795,3801 ----
  
  --    Optimize_Alignment_Space (Flag241)
  --       Defined in type, subtype, variable, and constant entities. This
! --       flag records that the type or object is to be laid out in a manner
  --       consistent with Optimize_Alignment (Space) mode. The compiler and
  --       binder ensure a consistent view of any given type or object. If pragma
  --       Optimize_Alignment (Off) mode applies to the type/object, then neither
*************** package Einfo is
*** 3787,3793 ****
  
  --    Optimize_Alignment_Time (Flag242)
  --       Defined in type, subtype, variable, and constant entities. This
! --       flag records that the type or object is to be layed out in a manner
  --       consistent with Optimize_Alignment (Time) mode. The compiler and
  --       binder ensure a consistent view of any given type or object. If pragma
  --       Optimize_Alignment (Off) mode applies to the type/object, then neither
--- 3803,3809 ----
  
  --    Optimize_Alignment_Time (Flag242)
  --       Defined in type, subtype, variable, and constant entities. This
! --       flag records that the type or object is to be laid out in a manner
  --       consistent with Optimize_Alignment (Time) mode. The compiler and
  --       binder ensure a consistent view of any given type or object. If pragma
  --       Optimize_Alignment (Off) mode applies to the type/object, then neither
*************** package Einfo is
*** 4133,4139 ****
  --       Defined in generic subprograms, generic packages, and their
  --       instances. Also defined in the instances of the corresponding
  --       bodies. Denotes the renaming map (generic entities => instance
! --       entities) used to construct the instance by givin an index into
  --       the tables used to represent these maps. See Sem_Ch12 for further
  --       details. The maps for package instances are also used when the
  --       instance is the actual corresponding to a formal package.
--- 4149,4155 ----
  --       Defined in generic subprograms, generic packages, and their
  --       instances. Also defined in the instances of the corresponding
  --       bodies. Denotes the renaming map (generic entities => instance
! --       entities) used to construct the instance by giving an index into
  --       the tables used to represent these maps. See Sem_Ch12 for further
  --       details. The maps for package instances are also used when the
  --       instance is the actual corresponding to a formal package.
*************** package Einfo is
*** 4441,4449 ****
  --       the value of attribute 'Old's prefix.
  
  --    Strict_Alignment (Flag145) [implementation base type only]
! --       Defined in all type entities. Indicates that some containing part
! --       is either aliased or tagged. This prohibits packing the object
! --       tighter than its natural size and alignment.
  
  --    String_Literal_Length (Uint16)
  --       Defined in string literal subtypes (which are created to correspond
--- 4457,4466 ----
  --       the value of attribute 'Old's prefix.
  
  --    Strict_Alignment (Flag145) [implementation base type only]
! --       Defined in all type entities. Indicates that the type is by-reference
! --       or contains an aliased part. This forbids packing a component of this
! --       type tighter than the alignment and size of the type, as specified by
! --       RM 13.2(7) modified by AI12-001 as a Binding Interpretation.
  
  --    String_Literal_Length (Uint16)
  --       Defined in string literal subtypes (which are created to correspond
*************** package Einfo is
*** 4490,4496 ****
  --    Suppress_Initialization (Flag105)
  --       Defined in all variable, type and subtype entities. If set for a base
  --       type, then the generation of initialization procedures is suppressed
! --       for the type. Any other implicit initialiation (e.g. from the use of
  --       pragma Initialize_Scalars) is also suppressed if this flag is set for
  --       either the subtype in question, or for the base type. For variables,
  --       this flag suppresses all implicit initialization for the object, even
--- 4507,4513 ----
  --    Suppress_Initialization (Flag105)
  --       Defined in all variable, type and subtype entities. If set for a base
  --       type, then the generation of initialization procedures is suppressed
! --       for the type. Any other implicit initialization (e.g. from the use of
  --       pragma Initialize_Scalars) is also suppressed if this flag is set for
  --       either the subtype in question, or for the base type. For variables,
  --       this flag suppresses all implicit initialization for the object, even
*************** package Einfo is
*** 4680,4686 ****
  --  They all overlap because they are supposed to apply to different entity
  --  kinds. They are semantically related, and have the following intended uses:
  
! --  a) Renamed_Entity appplies to entities in renaming declarations that rename
  --  an entity, so the value of the attribute IS an entity. This applies to
  --  generic renamings, package renamings, exception renamings, and subprograms
  --  renamings that rename a subprogram (rather than an attribute, an entry, a
--- 4697,4703 ----
  --  They all overlap because they are supposed to apply to different entity
  --  kinds. They are semantically related, and have the following intended uses:
  
! --  a) Renamed_Entity applies to entities in renaming declarations that rename
  --  an entity, so the value of the attribute IS an entity. This applies to
  --  generic renamings, package renamings, exception renamings, and subprograms
  --  renamings that rename a subprogram (rather than an attribute, an entry, a
*************** package Einfo is
*** 6147,6153 ****
     --    DTC_Entity                          (Node16)
     --    First_Entity                        (Node17)
     --    Alias                               (Node18)   (non-generic case only)
!    --    Renamed_Entity                      (Node18)   (generic case only)
     --    Extra_Accessibility_Of_Result       (Node19)   (non-generic case only)
     --    Last_Entity                         (Node20)
     --    Interface_Name                      (Node21)
--- 6164,6170 ----
     --    DTC_Entity                          (Node16)
     --    First_Entity                        (Node17)
     --    Alias                               (Node18)   (non-generic case only)
!    --    Renamed_Entity                      (Node18)
     --    Extra_Accessibility_Of_Result       (Node19)   (non-generic case only)
     --    Last_Entity                         (Node20)
     --    Interface_Name                      (Node21)
*************** package Einfo is
*** 6279,6284 ****
--- 6296,6302 ----
     --    Default_Expr_Function               (Node21)
     --    Protected_Formal                    (Node22)
     --    Extra_Constrained                   (Node23)
+    --    Minimum_Accessibility               (Node24)
     --    Last_Assignment                     (Node26)   (OUT, IN-OUT only)
     --    Activation_Record_Component         (Node31)
     --    Has_Initial_Value                   (Flag219)
*************** package Einfo is
*** 6412,6423 ****
     --    Has_Master_Entity                   (Flag21)
     --    Has_RACW                            (Flag214)  (non-generic case only)
     --    Ignore_SPARK_Mode_Pragmas           (Flag301)
!    --    In_Package_Body                     (Flag48)
!    --    In_Use                              (Flag8)
     --    Is_Elaboration_Checks_OK_Id         (Flag148)
     --    Is_Elaboration_Warnings_OK_Id       (Flag304)
     --    Is_Instantiated                     (Flag126)
     --    Is_Private_Descendant               (Flag53)
     --    Is_Visible_Lib_Unit                 (Flag116)
     --    Renamed_In_Spec                     (Flag231)  (non-generic case only)
     --    SPARK_Aux_Pragma_Inherited          (Flag266)
--- 6430,6442 ----
     --    Has_Master_Entity                   (Flag21)
     --    Has_RACW                            (Flag214)  (non-generic case only)
     --    Ignore_SPARK_Mode_Pragmas           (Flag301)
!    --    Is_Called                           (Flag102)  (non-generic case only)
     --    Is_Elaboration_Checks_OK_Id         (Flag148)
     --    Is_Elaboration_Warnings_OK_Id       (Flag304)
     --    Is_Instantiated                     (Flag126)
+    --    In_Package_Body                     (Flag48)
     --    Is_Private_Descendant               (Flag53)
+    --    In_Use                              (Flag8)
     --    Is_Visible_Lib_Unit                 (Flag116)
     --    Renamed_In_Spec                     (Flag231)  (non-generic case only)
     --    SPARK_Aux_Pragma_Inherited          (Flag266)
*************** package Einfo is
*** 6458,6464 ****
     --    Stored_Constraint                   (Elist23)
     --    Has_Completion                      (Flag26)
     --    Is_Controlled_Active                (Flag42)   (base type only)
-    --    Is_For_Access_Subtype               (Flag118)  (subtype only)
     --    (plus type attributes)
  
     --  E_Procedure
--- 6477,6482 ----
*************** package Einfo is
*** 6473,6479 ****
     --    DTC_Entity                          (Node16)
     --    First_Entity                        (Node17)
     --    Alias                               (Node18)   (non-generic case only)
!    --    Renamed_Entity                      (Node18)   (generic case only)
     --    Receiving_Entry                     (Node19)   (non-generic case only)
     --    Last_Entity                         (Node20)
     --    Interface_Name                      (Node21)
--- 6491,6497 ----
     --    DTC_Entity                          (Node16)
     --    First_Entity                        (Node17)
     --    Alias                               (Node18)   (non-generic case only)
!    --    Renamed_Entity                      (Node18)
     --    Receiving_Entry                     (Node19)   (non-generic case only)
     --    Last_Entity                         (Node20)
     --    Interface_Name                      (Node21)
*************** package Einfo is
*** 7269,7274 ****
--- 7287,7293 ----
     function Interface_Alias                     (Id : E) return E;
     function Interface_Name                      (Id : E) return N;
     function Interfaces                          (Id : E) return L;
+    function Invariants_Ignored                  (Id : E) return B;
     function Is_Abstract_Subprogram              (Id : E) return B;
     function Is_Abstract_Type                    (Id : E) return B;
     function Is_Access_Constant                  (Id : E) return B;
*************** package Einfo is
*** 7311,7317 ****
     function Is_Exported                         (Id : E) return B;
     function Is_Finalized_Transient              (Id : E) return B;
     function Is_First_Subtype                    (Id : E) return B;
-    function Is_For_Access_Subtype               (Id : E) return B;
     function Is_Frozen                           (Id : E) return B;
     function Is_Generic_Instance                 (Id : E) return B;
     function Is_Hidden                           (Id : E) return B;
--- 7330,7335 ----
*************** package Einfo is
*** 7405,7410 ****
--- 7423,7429 ----
     function Materialize_Entity                  (Id : E) return B;
     function May_Inherit_Delayed_Rep_Aspects     (Id : E) return B;
     function Mechanism                           (Id : E) return M;
+    function Minimum_Accessibility               (Id : E) return E;
     function Modulus                             (Id : E) return U;
     function Must_Be_On_Byte_Boundary            (Id : E) return B;
     function Must_Have_Preelab_Init              (Id : E) return B;
*************** package Einfo is
*** 7742,7747 ****
--- 7761,7768 ----
     -- Attribute Set Procedures --
     ------------------------------
  
+    --  WARNING: There is a matching C declaration of a few subprograms in fe.h
+ 
     procedure Set_Abstract_States                 (Id : E; V : L);
     procedure Set_Accept_Address                  (Id : E; V : L);
     procedure Set_Access_Disp_Table               (Id : E; V : L);
*************** package Einfo is
*** 7970,7975 ****
--- 7991,7997 ----
     procedure Set_Interface_Alias                 (Id : E; V : E);
     procedure Set_Interface_Name                  (Id : E; V : N);
     procedure Set_Interfaces                      (Id : E; V : L);
+    procedure Set_Invariants_Ignored              (Id : E; V : B := True);
     procedure Set_Is_Abstract_Subprogram          (Id : E; V : B := True);
     procedure Set_Is_Abstract_Type                (Id : E; V : B := True);
     procedure Set_Is_Access_Constant              (Id : E; V : B := True);
*************** package Einfo is
*** 8012,8018 ****
     procedure Set_Is_Exported                     (Id : E; V : B := True);
     procedure Set_Is_Finalized_Transient          (Id : E; V : B := True);
     procedure Set_Is_First_Subtype                (Id : E; V : B := True);
-    procedure Set_Is_For_Access_Subtype           (Id : E; V : B := True);
     procedure Set_Is_Formal_Subprogram            (Id : E; V : B := True);
     procedure Set_Is_Frozen                       (Id : E; V : B := True);
     procedure Set_Is_Generic_Actual_Subprogram    (Id : E; V : B := True);
--- 8034,8039 ----
*************** package Einfo is
*** 8111,8116 ****
--- 8132,8138 ----
     procedure Set_Materialize_Entity              (Id : E; V : B := True);
     procedure Set_May_Inherit_Delayed_Rep_Aspects (Id : E; V : B := True);
     procedure Set_Mechanism                       (Id : E; V : M);
+    procedure Set_Minimum_Accessibility           (Id : E; V : E);
     procedure Set_Modulus                         (Id : E; V : U);
     procedure Set_Must_Be_On_Byte_Boundary        (Id : E; V : B := True);
     procedure Set_Must_Have_Preelab_Init          (Id : E; V : B := True);
*************** package Einfo is
*** 8420,8425 ****
--- 8442,8449 ----
     --  value returned is the N_Attribute_Definition_Clause node, otherwise
     --  Empty is returned.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Get_Pragma (E : Entity_Id; Id : Pragma_Id) return Node_Id;
     --  Searches the Rep_Item chain of entity E, for an instance of a pragma
     --  with the given pragma Id. If found, the value returned is the N_Pragma
*************** package Einfo is
*** 8438,8443 ****
--- 8462,8468 ----
     --    Initial_Condition
     --    Initializes
     --    Interrupt_Handler
+    --    No_Caching
     --    Part_Of
     --    Precondition
     --    Postcondition
*************** package Einfo is
*** 8489,8494 ****
--- 8514,8521 ----
     --  Test if the node N is the name of an entity (i.e. is an identifier,
     --  expanded name, or an attribute reference that returns an entity).
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     procedure Link_Entities (First : Entity_Id; Second : Entity_Id);
     --  Link entities First and Second in one entity chain.
     --
*************** package Einfo is
*** 8797,8802 ****
--- 8824,8830 ----
     pragma Inline (Interface_Alias);
     pragma Inline (Interface_Name);
     pragma Inline (Interfaces);
+    pragma Inline (Invariants_Ignored);
     pragma Inline (Is_Abstract_Subprogram);
     pragma Inline (Is_Abstract_Type);
     pragma Inline (Is_Access_Constant);
*************** package Einfo is
*** 8859,8865 ****
     pragma Inline (Is_First_Subtype);
     pragma Inline (Is_Fixed_Point_Type);
     pragma Inline (Is_Floating_Point_Type);
-    pragma Inline (Is_For_Access_Subtype);
     pragma Inline (Is_Formal);
     pragma Inline (Is_Formal_Object);
     pragma Inline (Is_Formal_Subprogram);
--- 8887,8892 ----
*************** package Einfo is
*** 8981,8986 ****
--- 9008,9014 ----
     pragma Inline (Materialize_Entity);
     pragma Inline (May_Inherit_Delayed_Rep_Aspects);
     pragma Inline (Mechanism);
+    pragma Inline (Minimum_Accessibility);
     pragma Inline (Modulus);
     pragma Inline (Must_Be_On_Byte_Boundary);
     pragma Inline (Must_Have_Preelab_Init);
*************** package Einfo is
*** 9334,9339 ****
--- 9362,9368 ----
     pragma Inline (Set_Interface_Alias);
     pragma Inline (Set_Interface_Name);
     pragma Inline (Set_Interfaces);
+    pragma Inline (Set_Invariants_Ignored);
     pragma Inline (Set_Is_Abstract_Subprogram);
     pragma Inline (Set_Is_Abstract_Type);
     pragma Inline (Set_Is_Access_Constant);
*************** package Einfo is
*** 9376,9382 ****
     pragma Inline (Set_Is_Exported);
     pragma Inline (Set_Is_Finalized_Transient);
     pragma Inline (Set_Is_First_Subtype);
-    pragma Inline (Set_Is_For_Access_Subtype);
     pragma Inline (Set_Is_Formal_Subprogram);
     pragma Inline (Set_Is_Frozen);
     pragma Inline (Set_Is_Generic_Actual_Subprogram);
--- 9405,9410 ----
*************** package Einfo is
*** 9475,9480 ****
--- 9503,9509 ----
     pragma Inline (Set_Materialize_Entity);
     pragma Inline (Set_May_Inherit_Delayed_Rep_Aspects);
     pragma Inline (Set_Mechanism);
+    pragma Inline (Set_Minimum_Accessibility);
     pragma Inline (Set_Modulus);
     pragma Inline (Set_Must_Be_On_Byte_Boundary);
     pragma Inline (Set_Must_Have_Preelab_Init);
diff -Nrcpad gcc-9.3.0/gcc/ada/elists.ads gcc-10.1.0/gcc/ada/elists.ads
*** gcc-9.3.0/gcc/ada/elists.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/elists.ads	Thu May  7 10:49:59 2020
***************
*** 37,42 ****
--- 37,45 ----
  --  through the nodes themselves (using the Link field), which is more time
  --  and space efficient, but a node can be only one such list.
  
+ --  WARNING: There is a C version of this package. Any changes to this
+ --  source file must be properly reflected in the C header file elists.h
+ 
  with Types;  use Types;
  with System;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/elists.h gcc-10.1.0/gcc/ada/elists.h
*** gcc-9.3.0/gcc/ada/elists.h	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/elists.h	Thu May  7 10:49:59 2020
***************
*** 23,31 ****
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header corresponding to the Ada package specification for
!    Elists. It also contains the implementations of inlined functions from the
!    package body for Elists.  It was generated manually from elists.ads and
     elists.adb and must be kept synchronized with changes in these files.
  
     Note that only routines for reading the tree are included, since the
--- 23,31 ----
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header that corresponds to the Ada package specification for
!    Elists.  It also contains the implementation of inlined functions from the
!    package body for Elists.  It was created manually from elists.ads and
     elists.adb and must be kept synchronized with changes in these files.
  
     Note that only routines for reading the tree are included, since the
diff -Nrcpad gcc-9.3.0/gcc/ada/env.c gcc-10.1.0/gcc/ada/env.c
*** gcc-9.3.0/gcc/ada/env.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/env.c	Thu May  7 10:49:59 2020
***************
*** 30,44 ****
   ****************************************************************************/
  
  #ifdef IN_RTS
! # include "tconfig.h"
! # include "tsystem.h"
  
- # include <sys/stat.h>
- # include <fcntl.h>
- # include <time.h>
- # ifdef VMS
- #  include <unixio.h>
- # endif
  /* We don't have libiberty, so use malloc.  */
  # define xmalloc(S) malloc (S)
  #else /* IN_RTS */
--- 30,40 ----
   ****************************************************************************/
  
  #ifdef IN_RTS
! # include "runtime.h"
! # include <stdio.h>
! # include <stdlib.h>
! # include <string.h>
  
  /* We don't have libiberty, so use malloc.  */
  # define xmalloc(S) malloc (S)
  #else /* IN_RTS */
***************
*** 60,65 ****
--- 56,64 ----
  #endif
  
  #if defined (__vxworks)
+   #include <vxWorks.h>
+   #include <version.h>
+ 
    #if defined (__RTP__)
      /* On VxWorks 6 Real-Time process mode, environ is defined in unistd.h.  */
      #include <unistd.h>
***************
*** 69,82 ****
         envLib.h on VxWorks MILS and VxWorks 653.  */
      #include <vThreadsData.h>
      #include <envLib.h>
!   #else
!     /* This should work for kernel mode on both VxWorks 5 and VxWorks 6.  */
      #include <envLib.h>
! 
!     /* In that mode environ is a macro which reference the following symbol.
!        As the symbol is not defined in any VxWorks include files we declare
!        it as extern.  */
      extern char** ppGlobalEnviron;
    #endif
  #endif
  
--- 68,85 ----
         envLib.h on VxWorks MILS and VxWorks 653.  */
      #include <vThreadsData.h>
      #include <envLib.h>
!   #elif (_WRS_VXWORKS_MAJOR <= 6)
      #include <envLib.h>
!     /* In that mode the following symbol is not defined in any VxWorks
!        include files, prior to vxWorks 7, so we declare it as extern.  */
      extern char** ppGlobalEnviron;
+   #elif (_WRS_VXWORKS_MAJOR >= 7)
+     /* This should work for kernel mode on VxWorks 7.x.  In 7.2 the tcb
+        is made private, so accessor functions must be used, in 7.0 it
+        is optional but there is no way to distinguish between 7.2
+        and 7.0 since the version.h header file was never updated.  */
+     #include <envLib.h>
+     #include <taskLibCommon.h>
    #endif
  #endif
  
*************** __gnat_getenv (char *name, int *len, cha
*** 102,190 ****
    return;
  }
  
- /* VMS specific declarations for set_env_value.  */
- 
- #ifdef VMS
- 
- typedef struct _ile3
- {
-   unsigned short len, code;
-   __char_ptr32 adr;
-   __char_ptr32 retlen_adr;
- } ile_s;
- 
- #endif
- 
  void
  __gnat_setenv (char *name, char *value)
  {
! #if defined (VMS)
!   struct dsc$descriptor_s name_desc;
!   $DESCRIPTOR (table_desc, "LNM$PROCESS");
!   char *host_pathspec = value;
!   char *copy_pathspec;
!   int num_dirs_in_pathspec = 1;
!   char *ptr;
!   long status;
! 
!   name_desc.dsc$w_length = strlen (name);
!   name_desc.dsc$b_dtype = DSC$K_DTYPE_T;
!   name_desc.dsc$b_class = DSC$K_CLASS_S;
!   name_desc.dsc$a_pointer = name; /* ??? Danger, not 64bit safe.  */
! 
!   if (*host_pathspec == 0)
!     /* deassign */
!     {
!       status = LIB$DELETE_LOGICAL (&name_desc, &table_desc);
!       /* no need to check status; if the logical name is not
!          defined, that's fine. */
!       return;
!     }
! 
!   ptr = host_pathspec;
!   while (*ptr++)
!     if (*ptr == ',')
!       num_dirs_in_pathspec++;
! 
!   {
!     int i, status;
!     /* Alloca is guaranteed to be 32bit.  */
!     ile_s *ile_array = alloca (sizeof (ile_s) * (num_dirs_in_pathspec + 1));
!     char *copy_pathspec = alloca (strlen (host_pathspec) + 1);
!     char *curr, *next;
! 
!     strcpy (copy_pathspec, host_pathspec);
!     curr = copy_pathspec;
!     for (i = 0; i < num_dirs_in_pathspec; i++)
!       {
! 	next = strchr (curr, ',');
! 	if (next == 0)
! 	  next = strchr (curr, 0);
! 
! 	*next = 0;
! 	ile_array[i].len = strlen (curr);
! 
! 	/* Code 2 from lnmdef.h means it's a string.  */
! 	ile_array[i].code = 2;
! 	ile_array[i].adr = curr;
! 
! 	/* retlen_adr is ignored.  */
! 	ile_array[i].retlen_adr = 0;
! 	curr = next + 1;
!       }
! 
!     /* Terminating item must be zero.  */
!     ile_array[i].len = 0;
!     ile_array[i].code = 0;
!     ile_array[i].adr = 0;
!     ile_array[i].retlen_adr = 0;
! 
!     status = LIB$SET_LOGICAL (&name_desc, 0, &table_desc, 0, ile_array);
!     if ((status & 1) != 1)
!       LIB$SIGNAL (status);
!   }
! 
! #elif (defined (__vxworks) && defined (__RTP__)) || defined (__APPLE__)
    setenv (name, value, 1);
  
  #else
--- 105,114 ----
    return;
  }
  
  void
  __gnat_setenv (char *name, char *value)
  {
! #if (defined (__vxworks) && defined (__RTP__)) || defined (__APPLE__)
    setenv (name, value, 1);
  
  #else
*************** __gnat_setenv (char *name, char *value)
*** 206,215 ****
  char **
  __gnat_environ (void)
  {
! #if defined (VMS) || defined (RTX)
!   /* Not implemented */
!   return NULL;
! #elif defined (__MINGW32__)
    return _environ;
  #elif defined (__sun__)
    extern char **_environ;
--- 130,136 ----
  char **
  __gnat_environ (void)
  {
! #if defined (__MINGW32__)
    return _environ;
  #elif defined (__sun__)
    extern char **_environ;
*************** __gnat_environ (void)
*** 223,238 ****
    extern char **environ;
    return environ;
  #else
!   return environ;
  #endif
  }
  
  void __gnat_unsetenv (char *name)
  {
! #if defined (VMS)
!   /* Not implemented */
!   return;
! #elif defined (__hpux__) || defined (__sun__) \
       || (defined (__vxworks) && ! defined (__RTP__)) \
       || defined (_AIX) || defined (__Lynx__)
  
--- 144,167 ----
    extern char **environ;
    return environ;
  #else
!   #if defined (__RTP__) || defined (VTHREADS) || (_WRS_VXWORKS_MAJOR <= 6)
!     return environ;
!   #elif (_WRS_VXWORKS_MAJOR >= 7)
!     char **task_environ;
! 
!     task_environ = envGet (taskIdSelf ());
! 
!     if (task_environ == NULL)
!        return ppGlobalEnviron;
!     else
!        return task_environ;
!   #endif
  #endif
  }
  
  void __gnat_unsetenv (char *name)
  {
! #if defined (__hpux__) || defined (__sun__) \
       || (defined (__vxworks) && ! defined (__RTP__)) \
       || defined (_AIX) || defined (__Lynx__)
  
*************** void __gnat_unsetenv (char *name)
*** 288,297 ****
  
  void __gnat_clearenv (void)
  {
! #if defined (VMS)
!   /* not implemented */
!   return;
! #elif defined (__sun__) \
    || (defined (__vxworks) && ! defined (__RTP__)) || defined (__Lynx__) \
    || defined (__PikeOS__)
    /* On Solaris, VxWorks (not RTPs), and Lynx there is no system
--- 217,223 ----
  
  void __gnat_clearenv (void)
  {
! #if defined (__sun__) \
    || (defined (__vxworks) && ! defined (__RTP__)) || defined (__Lynx__) \
    || defined (__PikeOS__)
    /* On Solaris, VxWorks (not RTPs), and Lynx there is no system
diff -Nrcpad gcc-9.3.0/gcc/ada/err_vars.ads gcc-10.1.0/gcc/ada/err_vars.ads
*** gcc-9.3.0/gcc/ada/err_vars.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/err_vars.ads	Thu May  7 10:49:59 2020
*************** package Err_Vars is
*** 113,118 ****
--- 113,120 ----
     Error_Msg_Uint_2 : Uint;
     --  Uint values for ^ insertion characters in message
  
+    --  WARNING: There is a matching C declaration of these variables in fe.h
+ 
     Error_Msg_Sloc : Source_Ptr;
     --  Source location for # insertion character in message
  
diff -Nrcpad gcc-9.3.0/gcc/ada/errno.c gcc-10.1.0/gcc/ada/errno.c
*** gcc-9.3.0/gcc/ada/errno.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/errno.c	Thu May  7 10:49:59 2020
***************
*** 35,55 ****
     as it may be defined using a macro.
  */
  
! 
  #define _REENTRANT
- #define _THREAD_SAFE
- 
- #ifdef MaRTE
- 
- /* MaRTE OS provides its own implementation of errno related functionality. We
-    want to ensure the use of the MaRTE version for tasking programs (the MaRTE
-    library will not be linked if no tasking constructs are used), so we use the
-    weak symbols mechanism to use the MaRTE version whenever is available. */
- 
- #pragma weak __get_errno
- #pragma weak __set_errno
- 
  #endif
  
  #include <errno.h>
  int
--- 35,44 ----
     as it may be defined using a macro.
  */
  
! #ifndef _REENTRANT
  #define _REENTRANT
  #endif
+ #define _THREAD_SAFE
  
  #include <errno.h>
  int
diff -Nrcpad gcc-9.3.0/gcc/ada/errout.adb gcc-10.1.0/gcc/ada/errout.adb
*** gcc-9.3.0/gcc/ada/errout.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/errout.adb	Thu May  7 10:49:59 2020
*************** package body Errout is
*** 861,866 ****
--- 861,874 ----
                 end if;
              end;
           end if;
+ 
+          --  Disable warnings on unused use clauses and the like. Otherwise, an
+          --  error might hide a reference to an entity in a used package, so
+          --  after fixing the error, the use clause no longer looks like it was
+          --  unused.
+ 
+          Check_Unreferenced := False;
+          Check_Unreferenced_Formals := False;
        end Handle_Serious_Error;
  
     --  Start of processing for Error_Msg_Internal
*************** package body Errout is
*** 1100,1106 ****
        --  Test if warning to be treated as error
  
        Warn_Err :=
!         Is_Warning_Msg
            and then (Warning_Treated_As_Error (Msg_Buffer (1 .. Msglen))
                        or else
                      Warning_Treated_As_Error (Get_Warning_Tag (Cur_Msg)));
--- 1108,1114 ----
        --  Test if warning to be treated as error
  
        Warn_Err :=
!         (Is_Warning_Msg or Is_Style_Msg)
            and then (Warning_Treated_As_Error (Msg_Buffer (1 .. Msglen))
                        or else
                      Warning_Treated_As_Error (Get_Warning_Tag (Cur_Msg)));
*************** package body Errout is
*** 1710,1715 ****
--- 1718,1737 ----
        Specific_Warnings.Init;
     end Initialize;
  
+    -------------------------------
+    -- Is_Size_Too_Small_Message --
+    -------------------------------
+ 
+    function Is_Size_Too_Small_Message (S : String) return Boolean is
+       Size_For : constant String := "size for";
+       pragma Assert (Size_Too_Small_Message (1 .. Size_For'Last) = Size_For);
+       --  Assert that Size_Too_Small_Message starts with Size_For
+    begin
+       return S'Length >= Size_For'Length
+         and then S (S'First .. S'First + Size_For'Length - 1) = Size_For;
+       --  True if S starts with Size_For
+    end Is_Size_Too_Small_Message;
+ 
     -----------------
     -- No_Warnings --
     -----------------
*************** package body Errout is
*** 3259,3265 ****
  
        --  Processing for "Size too small" messages
  
!       elsif Msg = "size for& too small, minimum allowed is ^" then
  
           --  Suppress "size too small" errors in CodePeer mode, since code may
           --  be analyzed in a different configuration than the one used for
--- 3281,3287 ----
  
        --  Processing for "Size too small" messages
  
!       elsif Is_Size_Too_Small_Message (Msg) then
  
           --  Suppress "size too small" errors in CodePeer mode, since code may
           --  be analyzed in a different configuration than the one used for
diff -Nrcpad gcc-9.3.0/gcc/ada/errout.ads gcc-10.1.0/gcc/ada/errout.ads
*** gcc-9.3.0/gcc/ada/errout.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/errout.ads	Thu May  7 10:49:59 2020
*************** package Errout is
*** 647,654 ****
     --  CODEFIX Facility --
     -----------------------
  
!    --  The GPS and GNATBench IDE's have a codefix facility that allows for
!    --  automatic correction of a subset of the errors and warnings issued
     --  by the compiler. This is done by recognizing the text of specific
     --  messages using appropriate matching patterns.
  
--- 647,654 ----
     --  CODEFIX Facility --
     -----------------------
  
!    --  The GNAT Studio and GNATBench IDE's have a codefix facility that allows
!    --  for automatic correction of a subset of the errors and warnings issued
     --  by the compiler. This is done by recognizing the text of specific
     --  messages using appropriate matching patterns.
  
*************** package Errout is
*** 734,739 ****
--- 734,741 ----
     --  suppressed if the node N already has a message posted, or if it is a
     --  warning and N is an entity node for which warnings are suppressed.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     procedure Error_Msg_F (Msg : String; N : Node_Id);
     --  Similar to Error_Msg_N except that the message is placed on the first
     --  node of the construct N (First_Node (N)). Note that this procedure uses
*************** package Errout is
*** 750,755 ****
--- 752,759 ----
     --  will contain a & or } as usual to mark the insertion point. This
     --  routine can be called from the parser or the analyzer.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     procedure Error_Msg_FE
       (Msg : String;
        N   : Node_Id;
*************** package Errout is
*** 948,951 ****
--- 952,965 ----
     --  This name is the identifier name as passed, cased according to the
     --  default identifier casing for the given file.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
+    function Is_Size_Too_Small_Message (S : String) return Boolean;
+    Size_Too_Small_Message : constant String :=
+      "size for& too small, minimum allowed is ^";
+    --  This message is printed in Freeze and Sem_Ch13. We also test for it in
+    --  the body of this package (see Special_Msg_Delete) ???which is somewhat
+    --  questionable. The Is_Size_Too_Small_Message function tests for it by
+    --  testing a prefix. The function and constant should be kept in synch.
+ 
  end Errout;
diff -Nrcpad gcc-9.3.0/gcc/ada/erroutc.adb gcc-10.1.0/gcc/ada/erroutc.adb
*** gcc-9.3.0/gcc/ada/erroutc.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/erroutc.adb	Thu May  7 10:49:59 2020
*************** package body Erroutc is
*** 53,61 ****
  
     function Matches (S : String; P : String) return Boolean;
     --  Returns true if the String S patches the pattern P, which can contain
!    --  wild card chars (*). The entire pattern must match the entire string.
     --  Case is ignored in the comparison (so X matches x).
  
     ---------------
     -- Add_Class --
     ---------------
--- 53,67 ----
  
     function Matches (S : String; P : String) return Boolean;
     --  Returns true if the String S patches the pattern P, which can contain
!    --  wildcard chars (*). The entire pattern must match the entire string.
     --  Case is ignored in the comparison (so X matches x).
  
+    function Sloc_In_Range (Loc, Start, Stop : Source_Ptr) return Boolean;
+    --  Return whether Loc is in the range Start .. Stop, taking instantiation
+    --  locations of Loc into account. This is useful for suppressing warnings
+    --  from generic instantiations by using pragma Warnings around generic
+    --  instances, as needed in GNATprove.
+ 
     ---------------
     -- Add_Class --
     ---------------
*************** package body Erroutc is
*** 618,772 ****
        Length : Nat;
        --  Maximum total length of lines
  
!       Text  : constant String_Ptr := Errors.Table (E).Text;
        Ptr   : Natural;
        Split : Natural;
        Start : Natural;
  
     begin
!       declare
!          Tag : constant String := Get_Warning_Tag (E);
!          Txt : String_Ptr;
!          Len : Natural;
! 
!       begin
!          --  Postfix warning tag to message if needed
! 
!          if Tag /= "" and then Warning_Doc_Switch then
!             if Include_Subprogram_In_Messages then
!                Txt :=
!                  new String'
!                    (Subprogram_Name_Ptr (Errors.Table (E).Node) &
!                     ": " & Text.all & ' ' & Tag);
!             else
!                Txt := new String'(Text.all & ' ' & Tag);
!             end if;
  
!          elsif Include_Subprogram_In_Messages
!            and then (Errors.Table (E).Warn or else Errors.Table (E).Style)
!          then
              Txt :=
                new String'
!                 (Subprogram_Name_Ptr (Errors.Table (E).Node) &
!                  ": " & Text.all);
           else
!             Txt := Text;
           end if;
  
!          --  Deal with warning case
! 
!          if Errors.Table (E).Warn or else Errors.Table (E).Info then
  
!             --  For info messages, prefix message with "info: "
  
!             if Errors.Table (E).Info then
!                Txt := new String'("info: " & Txt.all);
  
!             --  Warning treated as error
  
!             elsif Errors.Table (E).Warn_Err then
  
!                --  We prefix with "error:" rather than warning: and postfix
!                --  [warning-as-error] at the end.
  
!                Warnings_Treated_As_Errors := Warnings_Treated_As_Errors + 1;
!                Txt := new String'("error: " & Txt.all & " [warning-as-error]");
  
!             --  Normal case, prefix with "warning: "
  
!             else
!                Txt := new String'("warning: " & Txt.all);
!             end if;
  
!             --  No prefix needed for style message, "(style)" is there already
  
!          elsif Errors.Table (E).Style then
!             null;
  
!             --  No prefix needed for check message, severity is there already
  
!          elsif Errors.Table (E).Check then
!             null;
  
!             --  All other cases, add "error: " if unique error tag set
  
!          elsif Opt.Unique_Error_Tag then
!             Txt := new String'("error: " & Txt.all);
!          end if;
  
!          --  Set error message line length and length of message
  
!          if Error_Msg_Line_Length = 0 then
!             Length := Nat'Last;
!          else
!             Length := Error_Msg_Line_Length;
!          end if;
  
!          Max := Integer (Length - Column + 1);
!          Len := Txt'Length;
  
!          --  Here we have to split the message up into multiple lines
  
!          Ptr := 1;
!          loop
!             --  Make sure we do not have ludicrously small line
  
!             Max := Integer'Max (Max, 20);
  
!             --  If remaining text fits, output it respecting LF and we are done
  
!             if Len - Ptr < Max then
!                for J in Ptr .. Len loop
!                   if Txt (J) = ASCII.LF then
!                      Write_Eol;
!                      Write_Spaces (Offs);
!                   else
!                      Write_Char (Txt (J));
!                   end if;
!                end loop;
  
!                return;
  
!             --  Line does not fit
  
!             else
!                Start := Ptr;
  
!                --  First scan forward looking for a hard end of line
  
!                for Scan in Ptr .. Ptr + Max - 1 loop
!                   if Txt (Scan) = ASCII.LF then
!                      Split := Scan - 1;
!                      Ptr := Scan + 1;
!                      goto Continue;
!                   end if;
!                end loop;
  
!                --  Otherwise scan backwards looking for a space
  
!                for Scan in reverse Ptr .. Ptr + Max - 1 loop
!                   if Txt (Scan) = ' ' then
!                      Split := Scan - 1;
!                      Ptr := Scan + 1;
!                      goto Continue;
!                   end if;
!                end loop;
  
!                --  If we fall through, no space, so split line arbitrarily
  
!                Split := Ptr + Max - 1;
!                Ptr := Split + 1;
!             end if;
  
!             <<Continue>>
!             if Start <= Split then
!                Write_Line (Txt (Start .. Split));
!                Write_Spaces (Offs);
!             end if;
  
!             Max := Integer (Length - Column + 1);
!          end loop;
!       end;
     end Output_Msg_Text;
  
     ---------------------
--- 624,768 ----
        Length : Nat;
        --  Maximum total length of lines
  
!       E_Msg : Error_Msg_Object renames Errors.Table (E);
!       Text  : constant String_Ptr := E_Msg.Text;
        Ptr   : Natural;
        Split : Natural;
        Start : Natural;
+       Tag : constant String := Get_Warning_Tag (E);
+       Txt : String_Ptr;
+       Len : Natural;
  
     begin
!       --  Postfix warning tag to message if needed
  
!       if Tag /= "" and then Warning_Doc_Switch then
!          if Include_Subprogram_In_Messages then
              Txt :=
                new String'
!                 (Subprogram_Name_Ptr (E_Msg.Node) &
!                  ": " & Text.all & ' ' & Tag);
           else
!             Txt := new String'(Text.all & ' ' & Tag);
           end if;
  
!       elsif Include_Subprogram_In_Messages
!         and then (E_Msg.Warn or else E_Msg.Style)
!       then
!          Txt :=
!            new String'(Subprogram_Name_Ptr (E_Msg.Node) & ": " & Text.all);
!       else
!          Txt := Text;
!       end if;
  
!       --  For info messages, prefix message with "info: "
  
!       if E_Msg.Info then
!          Txt := new String'("info: " & Txt.all);
  
!       --  Warning treated as error
  
!       elsif E_Msg.Warn_Err then
  
!       --  We prefix with "error:" rather than warning: and postfix
!       --  [warning-as-error] at the end.
  
!          Warnings_Treated_As_Errors := Warnings_Treated_As_Errors + 1;
!          Txt := new String'("error: " & Txt.all & " [warning-as-error]");
  
!       --  Normal warning, prefix with "warning: "
  
!       elsif E_Msg.Warn then
!          Txt := new String'("warning: " & Txt.all);
  
!       --  No prefix needed for style message, "(style)" is there already
  
!       elsif E_Msg.Style then
!          null;
  
!       --  No prefix needed for check message, severity is there already
  
!       elsif E_Msg.Check then
!          null;
  
!       --  All other cases, add "error: " if unique error tag set
  
!       elsif Opt.Unique_Error_Tag then
!          Txt := new String'("error: " & Txt.all);
!       end if;
  
!       --  Set error message line length and length of message
  
!       if Error_Msg_Line_Length = 0 then
!          Length := Nat'Last;
!       else
!          Length := Error_Msg_Line_Length;
!       end if;
  
!       Max := Integer (Length - Column + 1);
!       Len := Txt'Length;
  
!       --  Here we have to split the message up into multiple lines
  
!       Ptr := 1;
!       loop
!          --  Make sure we do not have ludicrously small line
  
!          Max := Integer'Max (Max, 20);
  
!          --  If remaining text fits, output it respecting LF and we are done
  
!          if Len - Ptr < Max then
!             for J in Ptr .. Len loop
!                if Txt (J) = ASCII.LF then
!                   Write_Eol;
!                   Write_Spaces (Offs);
!                else
!                   Write_Char (Txt (J));
!                end if;
!             end loop;
  
!             return;
  
!          --  Line does not fit
  
!          else
!             Start := Ptr;
  
!             --  First scan forward looking for a hard end of line
  
!             for Scan in Ptr .. Ptr + Max - 1 loop
!                if Txt (Scan) = ASCII.LF then
!                   Split := Scan - 1;
!                   Ptr := Scan + 1;
!                   goto Continue;
!                end if;
!             end loop;
  
!             --  Otherwise scan backwards looking for a space
  
!             for Scan in reverse Ptr .. Ptr + Max - 1 loop
!                if Txt (Scan) = ' ' then
!                   Split := Scan - 1;
!                   Ptr := Scan + 1;
!                   goto Continue;
!                end if;
!             end loop;
  
!             --  If we fall through, no space, so split line arbitrarily
  
!             Split := Ptr + Max - 1;
!             Ptr := Split + 1;
!          end if;
  
!          <<Continue>>
!          if Start <= Split then
!             Write_Line (Txt (Start .. Split));
!             Write_Spaces (Offs);
!          end if;
  
!          Max := Integer (Length - Column + 1);
!       end loop;
     end Output_Msg_Text;
  
     ---------------------
*************** package body Erroutc is
*** 1588,1593 ****
--- 1584,1608 ----
        end if;
     end Set_Warnings_Mode_On;
  
+    -------------------
+    -- Sloc_In_Range --
+    -------------------
+ 
+    function Sloc_In_Range (Loc, Start, Stop : Source_Ptr) return Boolean is
+       Cur_Loc : Source_Ptr := Loc;
+ 
+    begin
+       while Cur_Loc /= No_Location loop
+          if Start <= Cur_Loc and then Cur_Loc <= Stop then
+             return True;
+          end if;
+ 
+          Cur_Loc := Instantiation_Location (Cur_Loc);
+       end loop;
+ 
+       return False;
+    end Sloc_In_Range;
+ 
     --------------------------------
     -- Validate_Specific_Warnings --
     --------------------------------
*************** package body Erroutc is
*** 1652,1658 ****
              --  location is in range of a specific non-configuration pragma.
  
              if SWE.Config
!               or else (SWE.Start <= Loc and then Loc <= SWE.Stop)
              then
                 if Matches (Msg.all, SWE.Msg.all)
                   or else Matches (Tag, SWE.Msg.all)
--- 1667,1673 ----
              --  location is in range of a specific non-configuration pragma.
  
              if SWE.Config
!               or else Sloc_In_Range (Loc, SWE.Start, SWE.Stop)
              then
                 if Matches (Msg.all, SWE.Msg.all)
                   or else Matches (Tag, SWE.Msg.all)
*************** package body Erroutc is
*** 1691,1698 ****
        --  Loop through table of ON/OFF warnings
  
        for J in Warnings.First .. Warnings.Last loop
!          if Warnings.Table (J).Start <= Loc
!            and then Loc <= Warnings.Table (J).Stop
           then
              return Warnings.Table (J).Reason;
           end if;
--- 1706,1713 ----
        --  Loop through table of ON/OFF warnings
  
        for J in Warnings.First .. Warnings.Last loop
!          if Sloc_In_Range (Loc, Warnings.Table (J).Start,
!                                 Warnings.Table (J).Stop)
           then
              return Warnings.Table (J).Reason;
           end if;
diff -Nrcpad gcc-9.3.0/gcc/ada/erroutc.ads gcc-10.1.0/gcc/ada/erroutc.ads
*** gcc-9.3.0/gcc/ada/erroutc.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/erroutc.ads	Thu May  7 10:49:59 2020
*************** package Erroutc is
*** 612,618 ****
     function Warning_Treated_As_Error (Msg : String) return Boolean;
     --  Returns True if the warning message Msg matches any of the strings
     --  given by Warning_As_Error pragmas, as stored in the Warnings_As_Errors
!    --  table by Set_Warning_As_Error.
  
     type Error_Msg_Proc is
       access procedure (Msg : String; Flag_Location : Source_Ptr);
--- 612,618 ----
     function Warning_Treated_As_Error (Msg : String) return Boolean;
     --  Returns True if the warning message Msg matches any of the strings
     --  given by Warning_As_Error pragmas, as stored in the Warnings_As_Errors
!    --  table.
  
     type Error_Msg_Proc is
       access procedure (Msg : String; Flag_Location : Source_Ptr);
diff -Nrcpad gcc-9.3.0/gcc/ada/exit.c gcc-10.1.0/gcc/ada/exit.c
*** gcc-9.3.0/gcc/ada/exit.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exit.c	Thu May  7 10:49:59 2020
***************
*** 29,49 ****
   *                                                                          *
   ****************************************************************************/
  
- #ifdef __alpha_vxworks
- #include "vxWorks.h"
- #endif
- 
- #ifdef IN_RTS
- #include "tconfig.h"
- #include "tsystem.h"
- #include <sys/stat.h>
- #else
- #include "config.h"
- #include "system.h"
- #endif
- 
- #include "adaint.h"
- 
  #ifdef __cplusplus
  extern "C" {
  #endif
--- 29,34 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_aggr.adb gcc-10.1.0/gcc/ada/exp_aggr.adb
*** gcc-9.3.0/gcc/ada/exp_aggr.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_aggr.adb	Thu May  7 10:49:59 2020
*************** package body Exp_Aggr is
*** 192,198 ****
  
     procedure Convert_To_Assignments (N : Node_Id; Typ : Entity_Id);
     --  Transform a record aggregate into a sequence of assignments performed
!    --  component by component.  N is an N_Aggregate or N_Extension_Aggregate.
     --  Typ is the type of the record aggregate.
  
     procedure Expand_Record_Aggregate
--- 192,198 ----
  
     procedure Convert_To_Assignments (N : Node_Id; Typ : Entity_Id);
     --  Transform a record aggregate into a sequence of assignments performed
!    --  component by component. N is an N_Aggregate or N_Extension_Aggregate.
     --  Typ is the type of the record aggregate.
  
     procedure Expand_Record_Aggregate
*************** package body Exp_Aggr is
*** 217,222 ****
--- 217,227 ----
     --  defaults. An aggregate for a type with mutable components must be
     --  expanded into individual assignments.
  
+    function In_Place_Assign_OK (N : Node_Id) return Boolean;
+    --  Predicate to determine whether an aggregate assignment can be done in
+    --  place, because none of the new values can depend on the components of
+    --  the target of the assignment.
+ 
     procedure Initialize_Discriminants (N : Node_Id; Typ : Entity_Id);
     --  If the type of the aggregate is a type extension with renamed discrimi-
     --  nants, we must initialize the hidden discriminants of the parent.
*************** package body Exp_Aggr is
*** 339,345 ****
        Lo   : Node_Id;
        Hi   : Node_Id;
        Indx : Node_Id;
!       Siz  : Int;
        Lov  : Uint;
        Hiv  : Uint;
  
--- 344,350 ----
        Lo   : Node_Id;
        Hi   : Node_Id;
        Indx : Node_Id;
!       Size : Uint;
        Lov  : Uint;
        Hiv  : Uint;
  
*************** package body Exp_Aggr is
*** 463,469 ****
           Max_Aggr_Size := 5000;
        end if;
  
!       Siz  := Component_Count (Component_Type (Typ));
  
        Indx := First_Index (Typ);
        while Present (Indx) loop
--- 468,474 ----
           Max_Aggr_Size := 5000;
        end if;
  
!       Size := UI_From_Int (Component_Count (Component_Type (Typ)));
  
        Indx := First_Index (Typ);
        while Present (Indx) loop
*************** package body Exp_Aggr is
*** 533,546 ****
                 return False;
              end if;
  
!             Siz := Siz * UI_To_Int (Rng);
!          end;
  
!          if Siz <= 0
!            or else Siz > Max_Aggr_Size
!          then
!             return False;
!          end if;
  
           --  Bounds must be in integer range, for later array construction
  
--- 538,554 ----
                 return False;
              end if;
  
!             --  Compute the size using universal arithmetic to avoid the
!             --  possibility of overflow on very large aggregates.
  
!             Size := Size * Rng;
! 
!             if Size <= 0
!               or else Size > Max_Aggr_Size
!             then
!                return False;
!             end if;
!          end;
  
           --  Bounds must be in integer range, for later array construction
  
*************** package body Exp_Aggr is
*** 646,669 ****
           --  Checks 11: The C code generator cannot handle aggregates that are
           --  not part of an object declaration.
  
!          if Modify_Tree_For_C then
!             declare
!                Par : Node_Id := Parent (N);
! 
!             begin
!                --  Skip enclosing nested aggregates and their qualified
!                --  expressions.
! 
!                while Nkind (Par) = N_Aggregate
!                  or else Nkind (Par) = N_Qualified_Expression
!                loop
!                   Par := Parent (Par);
!                end loop;
! 
!                if Nkind (Par) /= N_Object_Declaration then
!                   return False;
!                end if;
!             end;
           end if;
  
           --  Checks on components
--- 654,661 ----
           --  Checks 11: The C code generator cannot handle aggregates that are
           --  not part of an object declaration.
  
!          if Modify_Tree_For_C and then not Is_CCG_Supported_Aggregate (N) then
!             return False;
           end if;
  
           --  Checks on components
*************** package body Exp_Aggr is
*** 1354,1364 ****
              --  transient scope, which leads to premature finalization.
  
              --  This in-place expansion is not performed for limited transient
!             --  objects because the initialization is already done in-place.
  
              if In_Place_Expansion then
  
!                --  Suppress the removal of side effects by general analysis
                 --  because this behavior is emulated here. This avoids the
                 --  generation of a transient scope, which leads to out-of-order
                 --  adjustment and finalization.
--- 1346,1356 ----
              --  transient scope, which leads to premature finalization.
  
              --  This in-place expansion is not performed for limited transient
!             --  objects, because the initialization is already done in place.
  
              if In_Place_Expansion then
  
!                --  Suppress the removal of side effects by general analysis,
                 --  because this behavior is emulated here. This avoids the
                 --  generation of a transient scope, which leads to out-of-order
                 --  adjustment and finalization.
*************** package body Exp_Aggr is
*** 2083,2089 ****
              Choice := First (Choice_List (Assoc));
              while Present (Choice) loop
                 if Nkind (Choice) = N_Others_Choice then
-                   Set_Loop_Actions (Assoc, New_List);
                    Others_Assoc := Assoc;
                    exit;
                 end if;
--- 2075,2080 ----
*************** package body Exp_Aggr is
*** 2130,2136 ****
  
           if Present (Others_Assoc) then
              declare
!                First : Boolean := True;
  
              begin
                 for J in 0 .. Nb_Choices loop
--- 2121,2128 ----
  
           if Present (Others_Assoc) then
              declare
!                First    : Boolean := True;
!                Dup_Expr : Node_Id;
  
              begin
                 for J in 0 .. Nb_Choices loop
*************** package body Exp_Aggr is
*** 2168,2176 ****
                      or else not Empty_Range (Low, High)
                    then
                       First := False;
                       Append_List
!                        (Gen_Loop (Low, High,
!                           Get_Assoc_Expr (Others_Assoc)), To => New_Code);
                    end if;
                 end loop;
              end;
--- 2160,2178 ----
                      or else not Empty_Range (Low, High)
                    then
                       First := False;
+ 
+                      --  Duplicate the expression in case we will be generating
+                      --  several loops. As a result the expression is no longer
+                      --  shared between the loops and is reevaluated for each
+                      --  such loop.
+ 
+                      Expr := Get_Assoc_Expr (Others_Assoc);
+                      Dup_Expr := New_Copy_Tree (Expr);
+                      Set_Parent (Dup_Expr, Parent (Expr));
+ 
+                      Set_Loop_Actions (Others_Assoc, New_List);
                       Append_List
!                        (Gen_Loop (Low, High, Dup_Expr), To => New_Code);
                    end if;
                 end loop;
              end;
*************** package body Exp_Aggr is
*** 2697,2704 ****
                 Discr_Constr :=
                   First_Elmt (Stored_Constraint (Full_View (Base_Typ)));
  
              else
!                Discr_Constr := First_Elmt (Stored_Constraint (Typ));
              end if;
  
              while Present (Discr) and then Present (Discr_Constr) loop
--- 2699,2708 ----
                 Discr_Constr :=
                   First_Elmt (Stored_Constraint (Full_View (Base_Typ)));
  
+             --  Otherwise, no discriminant to process
+ 
              else
!                Discr_Constr := No_Elmt;
              end if;
  
              while Present (Discr) and then Present (Discr_Constr) loop
*************** package body Exp_Aggr is
*** 3099,3104 ****
--- 3103,3115 ----
                Make_Selected_Component (Loc,
                  Prefix        => New_Copy_Tree (Lhs),
                  Selector_Name => Make_Identifier (Loc, Chars (Expr))));
+ 
+             --  The generated code will be reanalyzed, but if the reference
+             --  to the discriminant appears within an already analyzed
+             --  expression (e.g. a conditional) we must set its proper entity
+             --  now. Context is an initialization procedure.
+ 
+             Analyze (Expr);
           end if;
  
           return OK;
*************** package body Exp_Aggr is
*** 4134,4139 ****
--- 4145,4396 ----
        Insert_Actions_After (Decl, Aggr_Code);
     end Convert_Array_Aggr_In_Allocator;
  
+    ------------------------
+    -- In_Place_Assign_OK --
+    ------------------------
+ 
+    function In_Place_Assign_OK (N : Node_Id) return Boolean is
+       Is_Array : constant Boolean := Is_Array_Type (Etype (N));
+ 
+       Aggr_In : Node_Id;
+       Aggr_Lo : Node_Id;
+       Aggr_Hi : Node_Id;
+       Obj_In  : Node_Id;
+       Obj_Lo  : Node_Id;
+       Obj_Hi  : Node_Id;
+ 
+       function Safe_Aggregate (Aggr : Node_Id) return Boolean;
+       --  Check recursively that each component of a (sub)aggregate does not
+       --  depend on the variable being assigned to.
+ 
+       function Safe_Component (Expr : Node_Id) return Boolean;
+       --  Verify that an expression cannot depend on the variable being
+       --  assigned to. Room for improvement here (but less than before).
+ 
+       --------------------
+       -- Safe_Aggregate --
+       --------------------
+ 
+       function Safe_Aggregate (Aggr : Node_Id) return Boolean is
+          Expr : Node_Id;
+ 
+       begin
+          if Nkind (Parent (Aggr)) = N_Iterated_Component_Association then
+             return False;
+          end if;
+ 
+          if Present (Expressions (Aggr)) then
+             Expr := First (Expressions (Aggr));
+             while Present (Expr) loop
+                if Nkind (Expr) = N_Aggregate then
+                   if not Safe_Aggregate (Expr) then
+                      return False;
+                   end if;
+ 
+                elsif not Safe_Component (Expr) then
+                   return False;
+                end if;
+ 
+                Next (Expr);
+             end loop;
+          end if;
+ 
+          if Present (Component_Associations (Aggr)) then
+             Expr := First (Component_Associations (Aggr));
+             while Present (Expr) loop
+                if Nkind (Expression (Expr)) = N_Aggregate then
+                   if not Safe_Aggregate (Expression (Expr)) then
+                      return False;
+                   end if;
+ 
+                --  If association has a box, no way to determine yet whether
+                --  default can be assigned in place.
+ 
+                elsif Box_Present (Expr) then
+                   return False;
+ 
+                elsif not Safe_Component (Expression (Expr)) then
+                   return False;
+                end if;
+ 
+                Next (Expr);
+             end loop;
+          end if;
+ 
+          return True;
+       end Safe_Aggregate;
+ 
+       --------------------
+       -- Safe_Component --
+       --------------------
+ 
+       function Safe_Component (Expr : Node_Id) return Boolean is
+          Comp : Node_Id := Expr;
+ 
+          function Check_Component (Comp : Node_Id) return Boolean;
+          --  Do the recursive traversal, after copy
+ 
+          ---------------------
+          -- Check_Component --
+          ---------------------
+ 
+          function Check_Component (Comp : Node_Id) return Boolean is
+          begin
+             if Is_Overloaded (Comp) then
+                return False;
+             end if;
+ 
+             return Compile_Time_Known_Value (Comp)
+ 
+               or else (Is_Entity_Name (Comp)
+                         and then Present (Entity (Comp))
+                         and then Ekind (Entity (Comp)) not in Type_Kind
+                         and then No (Renamed_Object (Entity (Comp))))
+ 
+               or else (Nkind (Comp) = N_Attribute_Reference
+                         and then Check_Component (Prefix (Comp)))
+ 
+               or else (Nkind (Comp) in N_Binary_Op
+                         and then Check_Component (Left_Opnd  (Comp))
+                         and then Check_Component (Right_Opnd (Comp)))
+ 
+               or else (Nkind (Comp) in N_Unary_Op
+                         and then Check_Component (Right_Opnd (Comp)))
+ 
+               or else (Nkind (Comp) = N_Selected_Component
+                         and then Is_Array
+                         and then Check_Component (Prefix (Comp)))
+ 
+               or else (Nkind_In (Comp, N_Type_Conversion,
+                                        N_Unchecked_Type_Conversion)
+                         and then Check_Component (Expression (Comp)));
+          end Check_Component;
+ 
+       --  Start of processing for Safe_Component
+ 
+       begin
+          --  If the component appears in an association that may correspond
+          --  to more than one element, it is not analyzed before expansion
+          --  into assignments, to avoid side effects. We analyze, but do not
+          --  resolve the copy, to obtain sufficient entity information for
+          --  the checks that follow. If component is overloaded we assume
+          --  an unsafe function call.
+ 
+          if not Analyzed (Comp) then
+             if Is_Overloaded (Expr) then
+                return False;
+ 
+             elsif Nkind (Expr) = N_Aggregate
+                and then not Is_Others_Aggregate (Expr)
+             then
+                return False;
+ 
+             elsif Nkind (Expr) = N_Allocator then
+ 
+                --  For now, too complex to analyze
+ 
+                return False;
+ 
+             elsif Nkind (Parent (Expr)) = N_Iterated_Component_Association then
+ 
+                --  Ditto for iterated component associations, which in general
+                --  require an enclosing loop and involve nonstatic expressions.
+ 
+                return False;
+             end if;
+ 
+             Comp := New_Copy_Tree (Expr);
+             Set_Parent (Comp, Parent (Expr));
+             Analyze (Comp);
+          end if;
+ 
+          if Nkind (Comp) = N_Aggregate then
+             return Safe_Aggregate (Comp);
+          else
+             return Check_Component (Comp);
+          end if;
+       end Safe_Component;
+ 
+    --  Start of processing for In_Place_Assign_OK
+ 
+    begin
+       --  By-copy semantic cannot be guaranteed for controlled objects or
+       --  objects with discriminants.
+ 
+       if Needs_Finalization (Etype (N))
+         or else Has_Discriminants (Etype (N))
+       then
+          return False;
+ 
+       elsif Is_Array and then Present (Component_Associations (N)) then
+ 
+          --  On assignment, sliding can take place, so we cannot do the
+          --  assignment in place unless the bounds of the aggregate are
+          --  statically equal to those of the target.
+ 
+          --  If the aggregate is given by an others choice, the bounds are
+          --  derived from the left-hand side, and the assignment is safe if
+          --  the expression is.
+ 
+          if Is_Others_Aggregate (N) then
+             return
+               Safe_Component
+                (Expression (First (Component_Associations (N))));
+          end if;
+ 
+          Aggr_In := First_Index (Etype (N));
+ 
+          if Nkind (Parent (N)) = N_Assignment_Statement then
+             Obj_In := First_Index (Etype (Name (Parent (N))));
+ 
+          else
+             --  Context is an allocator. Check bounds of aggregate against
+             --  given type in qualified expression.
+ 
+             pragma Assert (Nkind (Parent (Parent (N))) = N_Allocator);
+             Obj_In := First_Index (Etype (Entity (Subtype_Mark (Parent (N)))));
+          end if;
+ 
+          while Present (Aggr_In) loop
+             Get_Index_Bounds (Aggr_In, Aggr_Lo, Aggr_Hi);
+             Get_Index_Bounds (Obj_In, Obj_Lo, Obj_Hi);
+ 
+             if not Compile_Time_Known_Value (Aggr_Lo)
+               or else not Compile_Time_Known_Value (Obj_Lo)
+               or else not Compile_Time_Known_Value (Obj_Hi)
+               or else Expr_Value (Aggr_Lo) /= Expr_Value (Obj_Lo)
+             then
+                return False;
+ 
+             --  For an assignment statement we require static matching of
+             --  bounds. Ditto for an allocator whose qualified expression
+             --  is a constrained type. If the expression in the allocator
+             --  is an unconstrained array, we accept an upper bound that
+             --  is not static, to allow for nonstatic expressions of the
+             --  base type. Clearly there are further possibilities (with
+             --  diminishing returns) for safely building arrays in place
+             --  here.
+ 
+             elsif Nkind (Parent (N)) = N_Assignment_Statement
+               or else Is_Constrained (Etype (Parent (N)))
+             then
+                if not Compile_Time_Known_Value (Aggr_Hi)
+                  or else Expr_Value (Aggr_Hi) /= Expr_Value (Obj_Hi)
+                then
+                   return False;
+                end if;
+             end if;
+ 
+             Next_Index (Aggr_In);
+             Next_Index (Obj_In);
+          end loop;
+       end if;
+ 
+       --  Now check the component values themselves
+ 
+       return Safe_Aggregate (N);
+    end In_Place_Assign_OK;
+ 
     ----------------------------
     -- Convert_To_Assignments --
     ----------------------------
*************** package body Exp_Aggr is
*** 4232,4241 ****
           Establish_Transient_Scope (N, Manage_Sec_Stack => False);
        end if;
  
!       --  If the aggregate is nonlimited, create a temporary. If it is limited
!       --  and context is an assignment, this is a subaggregate for an enclosing
!       --  aggregate being expanded. It must be built in place, so use target of
!       --  the current assignment.
  
        if Is_Limited_Type (Typ)
          and then Nkind (Parent (N)) = N_Assignment_Statement
--- 4489,4499 ----
           Establish_Transient_Scope (N, Manage_Sec_Stack => False);
        end if;
  
!       --  If the aggregate is nonlimited, create a temporary, since aggregates
!       --  have "by copy" semantics. If it is limited and context is an
!       --  assignment, this is a subaggregate for an enclosing aggregate being
!       --  expanded. It must be built in place, so use target of the current
!       --  assignment.
  
        if Is_Limited_Type (Typ)
          and then Nkind (Parent (N)) = N_Assignment_Statement
*************** package body Exp_Aggr is
*** 4245,4260 ****
             Build_Record_Aggr_Code (N, Typ, Target_Expr));
           Rewrite (Parent (N), Make_Null_Statement (Loc));
  
!       --  Generating C, do not declare a temporary to initialize an aggregate
!       --  assigned to Out or In_Out parameters whose type has no discriminants.
!       --  This avoids stack overflow errors at run time.
  
!       elsif Modify_Tree_For_C
!         and then Nkind (Parent (N)) = N_Assignment_Statement
          and then Nkind (Name (Parent (N))) = N_Identifier
!         and then Ekind_In (Entity (Name (Parent (N))), E_Out_Parameter,
!                                                        E_In_Out_Parameter)
!         and then not Has_Discriminants (Etype (Entity (Name (Parent (N)))))
        then
           Target_Expr := New_Copy_Tree (Name (Parent (N)));
           Insert_Actions (Parent (N),
--- 4503,4516 ----
             Build_Record_Aggr_Code (N, Typ, Target_Expr));
           Rewrite (Parent (N), Make_Null_Statement (Loc));
  
!       --  Do not declare a temporary to initialize an aggregate assigned to an
!       --  identifier when in-place assignment is possible, preserving the
!       --  by-copy semantic of aggregates. This avoids large stack usage and
!       --  generates more efficient code.
  
!       elsif Nkind (Parent (N)) = N_Assignment_Statement
          and then Nkind (Name (Parent (N))) = N_Identifier
!         and then In_Place_Assign_OK (N)
        then
           Target_Expr := New_Copy_Tree (Name (Parent (N)));
           Insert_Actions (Parent (N),
*************** package body Exp_Aggr is
*** 4886,4892 ****
     --     case pass it as is to Gigi. Note that a necessary condition for
     --     static processing is that the aggregate be fully positional.
  
!    --  5. If in place aggregate expansion is possible (i.e. no need to create
     --     a temporary) then mark the aggregate as such and return. Otherwise
     --     create a new temporary and generate the appropriate initialization
     --     code.
--- 5142,5148 ----
     --     case pass it as is to Gigi. Note that a necessary condition for
     --     static processing is that the aggregate be fully positional.
  
!    --  5. If in-place aggregate expansion is possible (i.e. no need to create
     --     a temporary) then mark the aggregate as such and return. Otherwise
     --     create a new temporary and generate the appropriate initialization
     --     code.
*************** package body Exp_Aggr is
*** 4910,4916 ****
        --  The type of each index
  
        In_Place_Assign_OK_For_Declaration : Boolean := False;
!       --  True if we are to generate an in place assignment for a declaration
  
        Maybe_In_Place_OK : Boolean;
        --  If the type is neither controlled nor packed and the aggregate
--- 5166,5172 ----
        --  The type of each index
  
        In_Place_Assign_OK_For_Declaration : Boolean := False;
!       --  True if we are to generate an in-place assignment for a declaration
  
        Maybe_In_Place_OK : Boolean;
        --  If the type is neither controlled nor packed and the aggregate
*************** package body Exp_Aggr is
*** 4945,4955 ****
        --  subaggregate we start the computation from. Dim is the dimension
        --  corresponding to the subaggregate.
  
-       function In_Place_Assign_OK return Boolean;
-       --  Simple predicate to determine whether an aggregate assignment can
-       --  be done in place, because none of the new values can depend on the
-       --  components of the target of the assignment.
- 
        procedure Others_Check (Sub_Aggr : Node_Id; Dim : Pos);
        --  Checks that if an others choice is present in any subaggregate, no
        --  aggregate index is outside the bounds of the index constraint.
--- 5201,5206 ----
*************** package body Exp_Aggr is
*** 4999,5004 ****
--- 5250,5261 ----
           Value     : Uint;
  
        begin
+          --  Back end doesn't know about <>
+ 
+          if Has_Default_Init_Comps (N) then
+             return False;
+          end if;
+ 
           --  Recurse as far as possible to find the innermost component type
  
           Ctyp := Etype (N);
*************** package body Exp_Aggr is
*** 5089,5094 ****
--- 5346,5361 ----
              return False;
           end if;
  
+          --  If the expression has side effects (e.g. contains calls with
+          --  potential side effects) reject as well. We only preanalyze the
+          --  expression to prevent the removal of intended side effects.
+ 
+          Preanalyze_And_Resolve (Expr, Ctyp);
+ 
+          if not Side_Effect_Free (Expr) then
+             return False;
+          end if;
+ 
           --  The expression needs to be analyzed if True is returned
  
           Analyze_And_Resolve (Expr, Ctyp);
*************** package body Exp_Aggr is
*** 5437,5678 ****
           end if;
        end Compute_Others_Present;
  
-       ------------------------
-       -- In_Place_Assign_OK --
-       ------------------------
- 
-       function In_Place_Assign_OK return Boolean is
-          Aggr_In : Node_Id;
-          Aggr_Lo : Node_Id;
-          Aggr_Hi : Node_Id;
-          Obj_In  : Node_Id;
-          Obj_Lo  : Node_Id;
-          Obj_Hi  : Node_Id;
- 
-          function Safe_Aggregate (Aggr : Node_Id) return Boolean;
-          --  Check recursively that each component of a (sub)aggregate does not
-          --  depend on the variable being assigned to.
- 
-          function Safe_Component (Expr : Node_Id) return Boolean;
-          --  Verify that an expression cannot depend on the variable being
-          --  assigned to. Room for improvement here (but less than before).
- 
-          --------------------
-          -- Safe_Aggregate --
-          --------------------
- 
-          function Safe_Aggregate (Aggr : Node_Id) return Boolean is
-             Expr : Node_Id;
- 
-          begin
-             if Nkind (Parent (Aggr)) = N_Iterated_Component_Association then
-                return False;
-             end if;
- 
-             if Present (Expressions (Aggr)) then
-                Expr := First (Expressions (Aggr));
-                while Present (Expr) loop
-                   if Nkind (Expr) = N_Aggregate then
-                      if not Safe_Aggregate (Expr) then
-                         return False;
-                      end if;
- 
-                   elsif not Safe_Component (Expr) then
-                      return False;
-                   end if;
- 
-                   Next (Expr);
-                end loop;
-             end if;
- 
-             if Present (Component_Associations (Aggr)) then
-                Expr := First (Component_Associations (Aggr));
-                while Present (Expr) loop
-                   if Nkind (Expression (Expr)) = N_Aggregate then
-                      if not Safe_Aggregate (Expression (Expr)) then
-                         return False;
-                      end if;
- 
-                   --  If association has a box, no way to determine yet
-                   --  whether default can be assigned in place.
- 
-                   elsif Box_Present (Expr) then
-                      return False;
- 
-                   elsif not Safe_Component (Expression (Expr)) then
-                      return False;
-                   end if;
- 
-                   Next (Expr);
-                end loop;
-             end if;
- 
-             return True;
-          end Safe_Aggregate;
- 
-          --------------------
-          -- Safe_Component --
-          --------------------
- 
-          function Safe_Component (Expr : Node_Id) return Boolean is
-             Comp : Node_Id := Expr;
- 
-             function Check_Component (Comp : Node_Id) return Boolean;
-             --  Do the recursive traversal, after copy
- 
-             ---------------------
-             -- Check_Component --
-             ---------------------
- 
-             function Check_Component (Comp : Node_Id) return Boolean is
-             begin
-                if Is_Overloaded (Comp) then
-                   return False;
-                end if;
- 
-                return Compile_Time_Known_Value (Comp)
- 
-                  or else (Is_Entity_Name (Comp)
-                            and then Present (Entity (Comp))
-                            and then No (Renamed_Object (Entity (Comp))))
- 
-                  or else (Nkind (Comp) = N_Attribute_Reference
-                            and then Check_Component (Prefix (Comp)))
- 
-                  or else (Nkind (Comp) in N_Binary_Op
-                            and then Check_Component (Left_Opnd  (Comp))
-                            and then Check_Component (Right_Opnd (Comp)))
- 
-                  or else (Nkind (Comp) in N_Unary_Op
-                            and then Check_Component (Right_Opnd (Comp)))
- 
-                  or else (Nkind (Comp) = N_Selected_Component
-                            and then Check_Component (Prefix (Comp)))
- 
-                  or else (Nkind (Comp) = N_Unchecked_Type_Conversion
-                            and then Check_Component (Expression (Comp)));
-             end Check_Component;
- 
-          --  Start of processing for Safe_Component
- 
-          begin
-             --  If the component appears in an association that may correspond
-             --  to more than one element, it is not analyzed before expansion
-             --  into assignments, to avoid side effects. We analyze, but do not
-             --  resolve the copy, to obtain sufficient entity information for
-             --  the checks that follow. If component is overloaded we assume
-             --  an unsafe function call.
- 
-             if not Analyzed (Comp) then
-                if Is_Overloaded (Expr) then
-                   return False;
- 
-                elsif Nkind (Expr) = N_Aggregate
-                   and then not Is_Others_Aggregate (Expr)
-                then
-                   return False;
- 
-                elsif Nkind (Expr) = N_Allocator then
- 
-                   --  For now, too complex to analyze
- 
-                   return False;
- 
-                elsif Nkind (Parent (Expr)) =
-                        N_Iterated_Component_Association
-                then
-                   --  Ditto for iterated component associations, which in
-                   --  general require an enclosing loop and involve nonstatic
-                   --  expressions.
- 
-                   return False;
-                end if;
- 
-                Comp := New_Copy_Tree (Expr);
-                Set_Parent (Comp, Parent (Expr));
-                Analyze (Comp);
-             end if;
- 
-             if Nkind (Comp) = N_Aggregate then
-                return Safe_Aggregate (Comp);
-             else
-                return Check_Component (Comp);
-             end if;
-          end Safe_Component;
- 
-       --  Start of processing for In_Place_Assign_OK
- 
-       begin
-          if Present (Component_Associations (N)) then
- 
-             --  On assignment, sliding can take place, so we cannot do the
-             --  assignment in place unless the bounds of the aggregate are
-             --  statically equal to those of the target.
- 
-             --  If the aggregate is given by an others choice, the bounds are
-             --  derived from the left-hand side, and the assignment is safe if
-             --  the expression is.
- 
-             if Is_Others_Aggregate (N) then
-                return
-                  Safe_Component
-                   (Expression (First (Component_Associations (N))));
-             end if;
- 
-             Aggr_In := First_Index (Etype (N));
- 
-             if Nkind (Parent (N)) = N_Assignment_Statement then
-                Obj_In  := First_Index (Etype (Name (Parent (N))));
- 
-             else
-                --  Context is an allocator. Check bounds of aggregate against
-                --  given type in qualified expression.
- 
-                pragma Assert (Nkind (Parent (Parent (N))) = N_Allocator);
-                Obj_In :=
-                  First_Index (Etype (Entity (Subtype_Mark (Parent (N)))));
-             end if;
- 
-             while Present (Aggr_In) loop
-                Get_Index_Bounds (Aggr_In, Aggr_Lo, Aggr_Hi);
-                Get_Index_Bounds (Obj_In, Obj_Lo, Obj_Hi);
- 
-                if not Compile_Time_Known_Value (Aggr_Lo)
-                  or else not Compile_Time_Known_Value (Obj_Lo)
-                  or else not Compile_Time_Known_Value (Obj_Hi)
-                  or else Expr_Value (Aggr_Lo) /= Expr_Value (Obj_Lo)
-                then
-                   return False;
- 
-                --  For an assignment statement we require static matching of
-                --  bounds. Ditto for an allocator whose qualified expression
-                --  is a constrained type. If the expression in the allocator
-                --  is an unconstrained array, we accept an upper bound that
-                --  is not static, to allow for nonstatic expressions of the
-                --  base type. Clearly there are further possibilities (with
-                --  diminishing returns) for safely building arrays in place
-                --  here.
- 
-                elsif Nkind (Parent (N)) = N_Assignment_Statement
-                  or else Is_Constrained (Etype (Parent (N)))
-                then
-                   if not Compile_Time_Known_Value (Aggr_Hi)
-                     or else Expr_Value (Aggr_Hi) /= Expr_Value (Obj_Hi)
-                   then
-                      return False;
-                   end if;
-                end if;
- 
-                Next_Index (Aggr_In);
-                Next_Index (Obj_In);
-             end loop;
-          end if;
- 
-          --  Now check the component values themselves
- 
-          return Safe_Aggregate (N);
-       end In_Place_Assign_OK;
- 
        ------------------
        -- Others_Check --
        ------------------
--- 5704,5709 ----
*************** package body Exp_Aggr is
*** 6219,6225 ****
  
        --  STEP 4
  
!       --  Look if in place aggregate expansion is possible
  
        --  For object declarations we build the aggregate in place, unless
        --  the array is bit-packed.
--- 6250,6256 ----
  
        --  STEP 4
  
!       --  Check whether in-place aggregate expansion is possible
  
        --  For object declarations we build the aggregate in place, unless
        --  the array is bit-packed.
*************** package body Exp_Aggr is
*** 6255,6265 ****
        else
           Maybe_In_Place_OK :=
            (Nkind (Parent (N)) = N_Assignment_Statement
!             and then In_Place_Assign_OK)
  
              or else
               (Nkind (Parent (Parent (N))) = N_Allocator
!               and then In_Place_Assign_OK);
        end if;
  
        --  If this is an array of tasks, it will be expanded into build-in-place
--- 6286,6296 ----
        else
           Maybe_In_Place_OK :=
            (Nkind (Parent (N)) = N_Assignment_Statement
!             and then In_Place_Assign_OK (N))
  
              or else
               (Nkind (Parent (Parent (N))) = N_Allocator
!               and then In_Place_Assign_OK (N));
        end if;
  
        --  If this is an array of tasks, it will be expanded into build-in-place
*************** package body Exp_Aggr is
*** 6284,6292 ****
        --  previously excluded controlled components but this is an old
        --  oversight: the rules in 7.6 (17) are clear.
  
!       if (not Has_Default_Init_Comps (N)
!            or else Is_Limited_Type (Etype (N)))
!         and then Comes_From_Source (Parent_Node)
          and then Parent_Kind = N_Object_Declaration
          and then Present (Expression (Parent_Node))
          and then not
--- 6315,6321 ----
        --  previously excluded controlled components but this is an old
        --  oversight: the rules in 7.6 (17) are clear.
  
!       if Comes_From_Source (Parent_Node)
          and then Parent_Kind = N_Object_Declaration
          and then Present (Expression (Parent_Node))
          and then not
*************** package body Exp_Aggr is
*** 6371,6377 ****
  
        --  Step 5
  
!       --  In place aggregate expansion is not possible
  
        else
           Maybe_In_Place_OK := False;
--- 6400,6406 ----
  
        --  Step 5
  
!       --  In-place aggregate expansion is not possible
  
        else
           Maybe_In_Place_OK := False;
*************** package body Exp_Aggr is
*** 6423,6433 ****
              Target := New_Copy (Tmp);
           end if;
  
!          --  If we are to generate an in place assignment for a declaration or
           --  an assignment statement, and the assignment can be done directly
           --  by the back end, then do not expand further.
  
!          --  ??? We can also do that if in place expansion is not possible but
           --  then we could go into an infinite recursion.
  
           if (In_Place_Assign_OK_For_Declaration or else Maybe_In_Place_OK)
--- 6452,6462 ----
              Target := New_Copy (Tmp);
           end if;
  
!          --  If we are to generate an in-place assignment for a declaration or
           --  an assignment statement, and the assignment can be done directly
           --  by the back end, then do not expand further.
  
!          --  ??? We can also do that if in-place expansion is not possible but
           --  then we could go into an infinite recursion.
  
           if (In_Place_Assign_OK_For_Declaration or else Maybe_In_Place_OK)
*************** package body Exp_Aggr is
*** 7470,7475 ****
--- 7499,7510 ----
           return;
        end if;
  
+       --  If the pragma Aggregate_Individually_Assign is set, always convert to
+       --  assignments.
+ 
+       if Aggregate_Individually_Assign then
+          Convert_To_Assignments (N, Typ);
+ 
        --  Ada 2005 (AI-318-2): We need to convert to assignments if components
        --  are build-in-place function calls. The assignments will each turn
        --  into a build-in-place function call. If components are all static,
*************** package body Exp_Aggr is
*** 7478,7484 ****
        --  Extension aggregates, aggregates in extended return statements, and
        --  aggregates for C++ imported types must be expanded.
  
!       if Ada_Version >= Ada_2005 and then Is_Limited_View (Typ) then
           if not Nkind_In (Parent (N), N_Component_Association,
                                        N_Object_Declaration)
           then
--- 7513,7519 ----
        --  Extension aggregates, aggregates in extended return statements, and
        --  aggregates for C++ imported types must be expanded.
  
!       elsif Ada_Version >= Ada_2005 and then Is_Limited_View (Typ) then
           if not Nkind_In (Parent (N), N_Component_Association,
                                        N_Object_Declaration)
           then
*************** package body Exp_Aggr is
*** 7685,7712 ****
     function Is_CCG_Supported_Aggregate
       (N : Node_Id) return Boolean
     is
!       In_Obj_Decl : Boolean := False;
!       P           : Node_Id := Parent (N);
  
     begin
!       while Present (P) loop
!          if Nkind (P) = N_Object_Declaration then
!             In_Obj_Decl := True;
!          end if;
  
           P := Parent (P);
        end loop;
  
!       --  Cases where aggregates are supported by the CCG backend
  
!       if In_Obj_Decl then
!          if Nkind (Parent (N)) = N_Object_Declaration then
!             return True;
  
!          elsif Nkind (Parent (N)) = N_Qualified_Expression
!             and then Nkind_In (Parent (Parent (N)), N_Allocator,
!                                                     N_Object_Declaration)
!          then
              return True;
           end if;
        end if;
--- 7720,7769 ----
     function Is_CCG_Supported_Aggregate
       (N : Node_Id) return Boolean
     is
!       P : Node_Id := Parent (N);
  
     begin
!       --  Aggregates are not supported for nonstandard rep clauses, since they
!       --  may lead to extra padding fields in CCG.
! 
!       if Ekind (Etype (N)) in Record_Kind
!         and then Has_Non_Standard_Rep (Etype (N))
!       then
!          return False;
!       end if;
  
+       while Present (P) and then Nkind (P) = N_Aggregate loop
           P := Parent (P);
        end loop;
  
!       --  Check cases where aggregates are supported by the CCG backend
  
!       if Nkind (P) = N_Object_Declaration then
!          declare
!             P_Typ : constant Entity_Id := Etype (Defining_Identifier (P));
  
!          begin
!             if Is_Record_Type (P_Typ) then
!                return True;
!             else
!                return Compile_Time_Known_Bounds (P_Typ);
!             end if;
!          end;
! 
!       elsif Nkind (P) = N_Qualified_Expression then
!          if Nkind (Parent (P)) = N_Object_Declaration then
!             declare
!                P_Typ : constant Entity_Id :=
!                          Etype (Defining_Identifier (Parent (P)));
!             begin
!                if Is_Record_Type (P_Typ) then
!                   return True;
!                else
!                   return Compile_Time_Known_Bounds (P_Typ);
!                end if;
!             end;
! 
!          elsif Nkind (Parent (P)) = N_Allocator then
              return True;
           end if;
        end if;
*************** package body Exp_Aggr is
*** 8105,8117 ****
  
     function Has_Mutable_Components (Typ : Entity_Id) return Boolean is
        Comp : Entity_Id;
  
     begin
        Comp := First_Component (Typ);
        while Present (Comp) loop
!          if Is_Record_Type (Etype (Comp))
!            and then Has_Discriminants (Etype (Comp))
!            and then not Is_Constrained (Etype (Comp))
           then
              return True;
           end if;
--- 8162,8176 ----
  
     function Has_Mutable_Components (Typ : Entity_Id) return Boolean is
        Comp : Entity_Id;
+       Ctyp : Entity_Id;
  
     begin
        Comp := First_Component (Typ);
        while Present (Comp) loop
!          Ctyp := Underlying_Type (Etype (Comp));
!          if Is_Record_Type (Ctyp)
!            and then Has_Discriminants (Ctyp)
!            and then not Is_Constrained (Ctyp)
           then
              return True;
           end if;
*************** package body Exp_Aggr is
*** 8757,8763 ****
           Val   := 0;
           Packed_Num := 0;
  
!          --  Account for endianness.  See corresponding comment in
           --  Packed_Array_Aggregate_Handled concerning the following.
  
           if Bytes_Big_Endian
--- 8816,8822 ----
           Val   := 0;
           Packed_Num := 0;
  
!          --  Account for endianness. See corresponding comment in
           --  Packed_Array_Aggregate_Handled concerning the following.
  
           if Bytes_Big_Endian
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_atag.adb gcc-10.1.0/gcc/ada/exp_atag.adb
*** gcc-9.3.0/gcc/ada/exp_atag.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_atag.adb	Thu May  7 10:49:59 2020
*************** package body Exp_Atag is
*** 742,750 ****
     ------------------------------------
  
     function Build_Inherit_Predefined_Prims
!      (Loc          : Source_Ptr;
!       Old_Tag_Node : Node_Id;
!       New_Tag_Node : Node_Id) return Node_Id
     is
     begin
        return
--- 742,751 ----
     ------------------------------------
  
     function Build_Inherit_Predefined_Prims
!      (Loc              : Source_Ptr;
!       Old_Tag_Node     : Node_Id;
!       New_Tag_Node     : Node_Id;
!       Num_Predef_Prims : Int) return Node_Id
     is
     begin
        return
*************** package body Exp_Atag is
*** 759,765 ****
                          New_Tag_Node)))),
                Discrete_Range => Make_Range (Loc,
                  Make_Integer_Literal (Loc, Uint_1),
!                 New_Occurrence_Of (RTE (RE_Max_Predef_Prims), Loc))),
  
            Expression =>
              Make_Slice (Loc,
--- 760,766 ----
                          New_Tag_Node)))),
                Discrete_Range => Make_Range (Loc,
                  Make_Integer_Literal (Loc, Uint_1),
!                 Make_Integer_Literal (Loc, Num_Predef_Prims))),
  
            Expression =>
              Make_Slice (Loc,
*************** package body Exp_Atag is
*** 772,778 ****
                Discrete_Range =>
                  Make_Range (Loc,
                    Make_Integer_Literal (Loc, 1),
!                   New_Occurrence_Of (RTE (RE_Max_Predef_Prims), Loc))));
     end Build_Inherit_Predefined_Prims;
  
     -------------------------
--- 773,779 ----
                Discrete_Range =>
                  Make_Range (Loc,
                    Make_Integer_Literal (Loc, 1),
!                   Make_Integer_Literal (Loc, Num_Predef_Prims))));
     end Build_Inherit_Predefined_Prims;
  
     -------------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_atag.ads gcc-10.1.0/gcc/ada/exp_atag.ads
*** gcc-9.3.0/gcc/ada/exp_atag.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_atag.ads	Thu May  7 10:49:59 2020
*************** package Exp_Atag is
*** 109,117 ****
     --  generated code handles primary and secondary dispatch tables of Typ.
  
     function Build_Inherit_Predefined_Prims
!      (Loc          : Source_Ptr;
!       Old_Tag_Node : Node_Id;
!       New_Tag_Node : Node_Id) return Node_Id;
     --  Build code that inherits the predefined primitives of the parent.
     --
     --  Generates: Predefined_DT (New_T).D (All_Predefined_Prims) :=
--- 109,118 ----
     --  generated code handles primary and secondary dispatch tables of Typ.
  
     function Build_Inherit_Predefined_Prims
!      (Loc              : Source_Ptr;
!       Old_Tag_Node     : Node_Id;
!       New_Tag_Node     : Node_Id;
!       Num_Predef_Prims : Int) return Node_Id;
     --  Build code that inherits the predefined primitives of the parent.
     --
     --  Generates: Predefined_DT (New_T).D (All_Predefined_Prims) :=
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_attr.adb gcc-10.1.0/gcc/ada/exp_attr.adb
*** gcc-9.3.0/gcc/ada/exp_attr.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_attr.adb	Thu May  7 10:49:59 2020
*************** with Exp_Pakd; use Exp_Pakd;
*** 39,44 ****
--- 39,45 ----
  with Exp_Strm; use Exp_Strm;
  with Exp_Tss;  use Exp_Tss;
  with Exp_Util; use Exp_Util;
+ with Expander; use Expander;
  with Freeze;   use Freeze;
  with Gnatvsn;  use Gnatvsn;
  with Itypes;   use Itypes;
*************** package body Exp_Attr is
*** 639,645 ****
  
           Stmts := No_List;
  
!          --  Validate componants
  
           Validate_Component_List
             (Obj_Id    => Obj_Id,
--- 640,646 ----
  
           Stmts := No_List;
  
!          --  Validate components
  
           Validate_Component_List
             (Obj_Id    => Obj_Id,
*************** package body Exp_Attr is
*** 1384,1395 ****
                 Stmts     : List_Id;
  
              begin
                 --  Wrap the condition of the while loop in a Boolean function.
                 --  This avoids the duplication of the same code which may lead
                 --  to gigi issues with respect to multiple declaration of the
                 --  same entity in the presence of side effects or checks. Note
!                --  that the condition actions must also be relocated to the
!                --  wrapping function.
  
                 --  Generate:
                 --    <condition actions>
--- 1385,1399 ----
                 Stmts     : List_Id;
  
              begin
+                Func_Id := Make_Temporary (Loc, 'F');
+ 
                 --  Wrap the condition of the while loop in a Boolean function.
                 --  This avoids the duplication of the same code which may lead
                 --  to gigi issues with respect to multiple declaration of the
                 --  same entity in the presence of side effects or checks. Note
!                --  that the condition actions must also be relocated into the
!                --  wrapping function because they may contain itypes, e.g. in
!                --  the case of a comparison involving slices.
  
                 --  Generate:
                 --    <condition actions>
*************** package body Exp_Attr is
*** 1403,1409 ****
  
                 Append_To (Stmts,
                   Make_Simple_Return_Statement (Loc,
!                    Expression => Relocate_Node (Condition (Scheme))));
  
                 --  Generate:
                 --    function Fnn return Boolean is
--- 1407,1415 ----
  
                 Append_To (Stmts,
                   Make_Simple_Return_Statement (Loc,
!                    Expression =>
!                      New_Copy_Tree (Condition (Scheme),
!                        New_Scope => Func_Id)));
  
                 --  Generate:
                 --    function Fnn return Boolean is
*************** package body Exp_Attr is
*** 1411,1417 ****
                 --       <Stmts>
                 --    end Fnn;
  
-                Func_Id   := Make_Temporary (Loc, 'F');
                 Func_Decl :=
                   Make_Subprogram_Body (Loc,
                     Specification              =>
--- 1417,1422 ----
*************** package body Exp_Attr is
*** 1431,1436 ****
--- 1436,1460 ----
                 Insert_Action (Loop_Stmt, Func_Decl);
                 Pop_Scope;
  
+                --  The analysis of the condition may have generated itypes
+                --  that are now used within the function: Adjust their
+                --  scopes accordingly so that their use appears in their
+                --  scope of definition.
+ 
+                declare
+                   Ityp : Entity_Id;
+ 
+                begin
+                   Ityp := First_Entity (Loop_Id);
+ 
+                   while Present (Ityp) loop
+                      if Is_Itype (Ityp) then
+                         Set_Scope (Ityp, Func_Id);
+                      end if;
+                      Next_Entity (Ityp);
+                   end loop;
+                end;
+ 
                 --  Transform the original while loop into an infinite loop
                 --  where the last statement checks the negated condition. This
                 --  placement ensures that the condition will not be evaluated
*************** package body Exp_Attr is
*** 1693,1795 ****
        --  generate conditionals in the code, so check the relevant restriction.
  
        Check_Restriction (No_Implicit_Conditionals, N);
- 
-       --  In Modify_Tree_For_C mode, we rewrite as an if expression
- 
-       if Modify_Tree_For_C then
-          declare
-             Loc   : constant Source_Ptr := Sloc (N);
-             Typ   : constant Entity_Id  := Etype (N);
-             Expr  : constant Node_Id    := First (Expressions (N));
-             Left  : constant Node_Id    := Relocate_Node (Expr);
-             Right : constant Node_Id    := Relocate_Node (Next (Expr));
- 
-             function Make_Compare (Left, Right : Node_Id) return Node_Id;
-             --  Returns Left >= Right for Max, Left <= Right for Min
- 
-             ------------------
-             -- Make_Compare --
-             ------------------
- 
-             function Make_Compare (Left, Right : Node_Id) return Node_Id is
-             begin
-                if Attribute_Name (N) = Name_Max then
-                   return
-                     Make_Op_Ge (Loc,
-                       Left_Opnd  => Left,
-                       Right_Opnd => Right);
-                else
-                   return
-                     Make_Op_Le (Loc,
-                       Left_Opnd  => Left,
-                       Right_Opnd => Right);
-                end if;
-             end Make_Compare;
- 
-          --  Start of processing for Min_Max
- 
-          begin
-             --  If both Left and Right are side effect free, then we can just
-             --  use Duplicate_Expr to duplicate the references and return
- 
-             --    (if Left >=|<= Right then Left else Right)
- 
-             if Side_Effect_Free (Left) and then Side_Effect_Free (Right) then
-                Rewrite (N,
-                  Make_If_Expression (Loc,
-                    Expressions => New_List (
-                      Make_Compare (Left, Right),
-                      Duplicate_Subexpr_No_Checks (Left),
-                      Duplicate_Subexpr_No_Checks (Right))));
- 
-             --  Otherwise we generate declarations to capture the values.
- 
-             --  The translation is
- 
-             --    do
-             --      T1 : constant typ := Left;
-             --      T2 : constant typ := Right;
-             --    in
-             --      (if T1 >=|<= T2 then T1 else T2)
-             --    end;
- 
-             else
-                declare
-                   T1 : constant Entity_Id := Make_Temporary (Loc, 'T', Left);
-                   T2 : constant Entity_Id := Make_Temporary (Loc, 'T', Right);
- 
-                begin
-                   Rewrite (N,
-                     Make_Expression_With_Actions (Loc,
-                       Actions    => New_List (
-                         Make_Object_Declaration (Loc,
-                           Defining_Identifier => T1,
-                           Constant_Present    => True,
-                           Object_Definition   =>
-                             New_Occurrence_Of (Etype (Left), Loc),
-                           Expression          => Relocate_Node (Left)),
- 
-                         Make_Object_Declaration (Loc,
-                           Defining_Identifier => T2,
-                           Constant_Present    => True,
-                           Object_Definition   =>
-                             New_Occurrence_Of (Etype (Right), Loc),
-                           Expression          => Relocate_Node (Right))),
- 
-                       Expression =>
-                         Make_If_Expression (Loc,
-                           Expressions => New_List (
-                             Make_Compare
-                               (New_Occurrence_Of (T1, Loc),
-                                New_Occurrence_Of (T2, Loc)),
-                                New_Occurrence_Of (T1, Loc),
-                                New_Occurrence_Of (T2, Loc)))));
-                end;
-             end if;
- 
-             Analyze_And_Resolve (N, Typ);
-          end;
-       end if;
     end Expand_Min_Max_Attribute;
  
     ----------------------------------
--- 1717,1722 ----
*************** package body Exp_Attr is
*** 2389,2394 ****
--- 2316,2339 ----
        when Attribute_Address => Address : declare
           Task_Proc : Entity_Id;
  
+          function Is_Unnested_Component_Init (N : Node_Id) return Boolean;
+          --  Returns True if N is being used to initialize a component of
+          --  an activation record object where the component corresponds to
+          --  the object denoted by the prefix of the attribute N.
+ 
+          function Is_Unnested_Component_Init (N : Node_Id) return Boolean is
+          begin
+             return Present (Parent (N))
+               and then Nkind (Parent (N)) = N_Assignment_Statement
+               and then Is_Entity_Name (Pref)
+               and then Present (Activation_Record_Component (Entity (Pref)))
+               and then Nkind (Name (Parent (N))) = N_Selected_Component
+               and then Entity (Selector_Name (Name (Parent (N)))) =
+                          Activation_Record_Component (Entity (Pref));
+          end Is_Unnested_Component_Init;
+ 
+       --  Start of processing for Address
+ 
        begin
           --  If the prefix is a task or a task type, the useful address is that
           --  of the procedure for the task body, i.e. the actual program unit.
*************** package body Exp_Attr is
*** 2452,2467 ****
           --  "displaced" to reference the tag associated with the interface
           --  type. In order to obtain the real address of such objects we
           --  generate a call to a run-time subprogram that returns the base
!          --  address of the object.
! 
!          --  This processing is not needed in the VM case, where dispatching
!          --  issues are taken care of by the virtual machine.
  
           elsif Is_Class_Wide_Type (Ptyp)
             and then Is_Interface (Underlying_Type (Ptyp))
             and then Tagged_Type_Expansion
             and then not (Nkind (Pref) in N_Has_Entity
                            and then Is_Subprogram (Entity (Pref)))
           then
              Rewrite (N,
                Make_Function_Call (Loc,
--- 2397,2415 ----
           --  "displaced" to reference the tag associated with the interface
           --  type. In order to obtain the real address of such objects we
           --  generate a call to a run-time subprogram that returns the base
!          --  address of the object. This call is not generated in cases where
!          --  the attribute is being used to initialize a component of an
!          --  activation record object where the component corresponds to
!          --  prefix of the attribute (for back ends that require "unnesting"
!          --  of nested subprograms), since the address needs to be assigned
!          --  as-is to such components.
  
           elsif Is_Class_Wide_Type (Ptyp)
             and then Is_Interface (Underlying_Type (Ptyp))
             and then Tagged_Type_Expansion
             and then not (Nkind (Pref) in N_Has_Entity
                            and then Is_Subprogram (Entity (Pref)))
+            and then not Is_Unnested_Component_Init (N)
           then
              Rewrite (N,
                Make_Function_Call (Loc,
*************** package body Exp_Attr is
*** 2843,2882 ****
        when Attribute_Constrained => Constrained : declare
           Formal_Ent : constant Entity_Id := Param_Entity (Pref);
  
-          function Is_Constrained_Aliased_View (Obj : Node_Id) return Boolean;
-          --  Ada 2005 (AI-363): Returns True if the object name Obj denotes a
-          --  view of an aliased object whose subtype is constrained.
- 
-          ---------------------------------
-          -- Is_Constrained_Aliased_View --
-          ---------------------------------
- 
-          function Is_Constrained_Aliased_View (Obj : Node_Id) return Boolean is
-             E : Entity_Id;
- 
-          begin
-             if Is_Entity_Name (Obj) then
-                E := Entity (Obj);
- 
-                if Present (Renamed_Object (E)) then
-                   return Is_Constrained_Aliased_View (Renamed_Object (E));
-                else
-                   return Is_Aliased (E) and then Is_Constrained (Etype (E));
-                end if;
- 
-             else
-                return Is_Aliased_View (Obj)
-                         and then
-                       (Is_Constrained (Etype (Obj))
-                          or else
-                            (Nkind (Obj) = N_Explicit_Dereference
-                               and then
-                                 not Object_Type_Has_Constrained_Partial_View
-                                       (Typ  => Base_Type (Etype (Obj)),
-                                        Scop => Current_Scope)));
-             end if;
-          end Is_Constrained_Aliased_View;
- 
        --  Start of processing for Constrained
  
        begin
--- 2791,2796 ----
*************** package body Exp_Attr is
*** 2917,3031 ****
                New_Occurrence_Of
                  (Extra_Constrained (Entity (Pref)), Sloc (N)));
  
!          --  For all other entity names, we can tell at compile time
! 
!          elsif Is_Entity_Name (Pref) then
!             declare
!                Ent : constant Entity_Id   := Entity (Pref);
!                Res : Boolean;
! 
!             begin
!                --  (RM J.4) obsolescent cases
! 
!                if Is_Type (Ent) then
! 
!                   --  Private type
! 
!                   if Is_Private_Type (Ent) then
!                      Res := not Has_Discriminants (Ent)
!                               or else Is_Constrained (Ent);
! 
!                   --  It not a private type, must be a generic actual type
!                   --  that corresponded to a private type. We know that this
!                   --  correspondence holds, since otherwise the reference
!                   --  within the generic template would have been illegal.
! 
!                   else
!                      if Is_Composite_Type (Underlying_Type (Ent)) then
!                         Res := Is_Constrained (Ent);
!                      else
!                         Res := True;
!                      end if;
!                   end if;
! 
!                else
!                   --  For access type, apply access check as needed
! 
!                   if Is_Access_Type (Ptyp) then
!                      Apply_Access_Check (N);
!                   end if;
! 
!                   --  If the prefix is not a variable or is aliased, then
!                   --  definitely true; if it's a formal parameter without an
!                   --  associated extra formal, then treat it as constrained.
! 
!                   --  Ada 2005 (AI-363): An aliased prefix must be known to be
!                   --  constrained in order to set the attribute to True.
! 
!                   if not Is_Variable (Pref)
!                     or else Present (Formal_Ent)
!                     or else (Ada_Version < Ada_2005
!                               and then Is_Aliased_View (Pref))
!                     or else (Ada_Version >= Ada_2005
!                               and then Is_Constrained_Aliased_View (Pref))
!                   then
!                      Res := True;
! 
!                   --  Variable case, look at type to see if it is constrained.
!                   --  Note that the one case where this is not accurate (the
!                   --  procedure formal case), has been handled above.
! 
!                   --  We use the Underlying_Type here (and below) in case the
!                   --  type is private without discriminants, but the full type
!                   --  has discriminants. This case is illegal, but we generate
!                   --  it internally for passing to the Extra_Constrained
!                   --  parameter.
! 
!                   else
!                      --  In Ada 2012, test for case of a limited tagged type,
!                      --  in which case the attribute is always required to
!                      --  return True. The underlying type is tested, to make
!                      --  sure we also return True for cases where there is an
!                      --  unconstrained object with an untagged limited partial
!                      --  view which has defaulted discriminants (such objects
!                      --  always produce a False in earlier versions of
!                      --  Ada). (Ada 2012: AI05-0214)
! 
!                      Res :=
!                        Is_Constrained (Underlying_Type (Etype (Ent)))
!                          or else
!                            (Ada_Version >= Ada_2012
!                              and then Is_Tagged_Type (Underlying_Type (Ptyp))
!                              and then Is_Limited_Type (Ptyp));
!                   end if;
!                end if;
  
!                Rewrite (N, New_Occurrence_Of (Boolean_Literals (Res), Loc));
!             end;
  
!          --  Prefix is not an entity name. These are also cases where we can
!          --  always tell at compile time by looking at the form and type of the
!          --  prefix. If an explicit dereference of an object with constrained
!          --  partial view, this is unconstrained (Ada 2005: AI95-0363). If the
!          --  underlying type is a limited tagged type, then Constrained is
!          --  required to always return True (Ada 2012: AI05-0214).
  
-          else
              Rewrite (N,
!               New_Occurrence_Of (
!                 Boolean_Literals (
!                   not Is_Variable (Pref)
!                     or else
!                      (Nkind (Pref) = N_Explicit_Dereference
!                        and then
!                          not Object_Type_Has_Constrained_Partial_View
!                                (Typ  => Base_Type (Ptyp),
!                                 Scop => Current_Scope))
!                     or else Is_Constrained (Underlying_Type (Ptyp))
!                     or else (Ada_Version >= Ada_2012
!                               and then Is_Tagged_Type (Underlying_Type (Ptyp))
!                               and then Is_Limited_Type (Ptyp))),
!                 Loc));
           end if;
  
           Analyze_And_Resolve (N, Standard_Boolean);
--- 2831,2853 ----
                New_Occurrence_Of
                  (Extra_Constrained (Entity (Pref)), Sloc (N)));
  
!          --  For all other cases, we can tell at compile time
  
!          else
!             --  For access type, apply access check as needed
  
!             if Is_Entity_Name (Pref)
!               and then not Is_Type (Entity (Pref))
!               and then Is_Access_Type (Ptyp)
!             then
!                Apply_Access_Check (N);
!             end if;
  
              Rewrite (N,
!               New_Occurrence_Of
!                 (Boolean_Literals
!                    (Exp_Util.Attribute_Constrained_Static_Value
!                       (Pref)), Sloc (N)));
           end if;
  
           Analyze_And_Resolve (N, Standard_Boolean);
*************** package body Exp_Attr is
*** 3376,3381 ****
--- 3198,3210 ----
  
           Expr := Unchecked_Convert_To (Ptyp, First (Exprs));
  
+          --  Ensure that the expression is not truncated since the "bad" bits
+          --  are desired.
+ 
+          if Nkind (Expr) = N_Unchecked_Type_Conversion then
+             Set_No_Truncation (Expr);
+          end if;
+ 
           Insert_Action (N,
             Make_Raise_Constraint_Error (Loc,
               Condition =>
*************** package body Exp_Attr is
*** 3626,3632 ****
        --  We transform
  
        --     fixtype'Fixed_Value (integer-value)
!       --     inttype'Fixed_Value (fixed-value)
  
        --  into
  
--- 3455,3461 ----
        --  We transform
  
        --     fixtype'Fixed_Value (integer-value)
!       --     inttype'Integer_Value (fixed-value)
  
        --  into
  
*************** package body Exp_Attr is
*** 3635,3709 ****
  
        --  respectively.
  
!       --  We do all the required analysis of the conversion here, because we do
!       --  not want this to go through the fixed-point conversion circuits. Note
!       --  that the back end always treats fixed-point as equivalent to the
!       --  corresponding integer type anyway.
!       --  However, in order to remove the handling of Do_Range_Check from the
!       --  backend, we force the generation of a check on the result by
!       --  setting the result type appropriately. Apply_Conversion_Checks
!       --  will generate the required expansion.
  
        when Attribute_Fixed_Value
           | Attribute_Integer_Value
        =>
!          Rewrite (N,
!            Make_Type_Conversion (Loc,
!              Subtype_Mark => New_Occurrence_Of (Entity (Pref), Loc),
!              Expression   => Relocate_Node (First (Exprs))));
! 
!          --  Indicate that the result of the conversion may require a
!          --  range check (see below);
! 
!          Set_Etype (N, Base_Type (Entity (Pref)));
!          Set_Analyzed (N);
  
!          --  Note: it might appear that a properly analyzed unchecked
           --  conversion would be just fine here, but that's not the case,
!          --  since the full range checks performed by the following code
           --  are critical.
-          --  Given that Fixed-point conversions are not further expanded
-          --  to prevent the involvement of real type operations we have to
-          --  construct two checks explicitly: one on the operand, and one
-          --  on the result. This used to be done in part in the back-end,
-          --  but for other targets (E.g. LLVM) it is preferable to create
-          --  the tests in full in the front-end.
- 
-          if Is_Fixed_Point_Type (Etype (N)) then
-             declare
-                Loc     : constant Source_Ptr := Sloc (N);
-                Equiv_T : constant Entity_Id  := Make_Temporary (Loc, 'T', N);
-                Expr    : constant Node_Id    := Expression (N);
-                Fst     : constant Entity_Id  := Root_Type (Etype (N));
-                Decl    : Node_Id;
  
!             begin
!                Decl :=
!                  Make_Full_Type_Declaration (Sloc (N),
!                  Defining_Identifier => Equiv_T,
!                  Type_Definition     =>
!                    Make_Signed_Integer_Type_Definition (Loc,
!                      Low_Bound  =>
!                        Make_Integer_Literal (Loc,
!                          Intval =>
!                            Corresponding_Integer_Value
!                              (Type_Low_Bound (Fst))),
!                      High_Bound =>
!                        Make_Integer_Literal (Loc,
!                          Intval =>
!                            Corresponding_Integer_Value
!                              (Type_High_Bound (Fst)))));
!                Insert_Action (N, Decl);
! 
!                --  Verify that the conversion is possible
  
!                Generate_Range_Check (Expr, Equiv_T, CE_Overflow_Check_Failed);
  
!                --  and verify that the result is in range
  
!                Generate_Range_Check (N, Etype (N), CE_Range_Check_Failed);
!             end;
!          end if;
  
        -----------
        -- Floor --
--- 3464,3493 ----
  
        --  respectively.
  
!       --  We set Conversion_OK on the conversion because we do not want it
!       --  to go through the fixed-point conversion circuits.
  
        when Attribute_Fixed_Value
           | Attribute_Integer_Value
        =>
!          Rewrite (N, OK_Convert_To (Entity (Pref), First (Exprs)));
  
!          --  Note that it might appear that a properly analyzed unchecked
           --  conversion would be just fine here, but that's not the case,
!          --  since the full range checks performed by the following calls
           --  are critical.
  
!          Apply_Type_Conversion_Checks (N);
  
!          --  Note that Apply_Type_Conversion_Checks only deals with the
!          --  overflow checks on conversions involving fixed-point types
!          --  so we must apply range checks manually on them and expand.
  
!          Apply_Scalar_Range_Check
!            (Expression (N), Etype (N), Fixed_Int => True);
  
!          Set_Analyzed (N);
!          Expand (N);
  
        -----------
        -- Floor --
*************** package body Exp_Attr is
*** 3728,3735 ****
        --    Result_Type (System.Fore (Universal_Real (Type'First)),
        --                              Universal_Real (Type'Last))
  
!       --  Note that we know that the type is a non-static subtype, or Fore
!       --  would have itself been computed dynamically in Eval_Attribute.
  
        when Attribute_Fore =>
           Rewrite (N,
--- 3512,3519 ----
        --    Result_Type (System.Fore (Universal_Real (Type'First)),
        --                              Universal_Real (Type'Last))
  
!       --  Note that we know that the type is a nonstatic subtype, or Fore would
!       --  have itself been computed dynamically in Eval_Attribute.
  
        when Attribute_Fore =>
           Rewrite (N,
*************** package body Exp_Attr is
*** 4094,4104 ****
  
                 declare
                    Rtyp : constant Entity_Id := Root_Type (P_Type);
!                   Expr : Node_Id;
  
                 begin
                    --  Read the internal tag (RM 13.13.2(34)) and use it to
!                   --  initialize a dummy tag value. We used to generate:
                    --
                    --     Descendant_Tag (String'Input (Strm), P_Type);
                    --
--- 3878,3891 ----
  
                 declare
                    Rtyp : constant Entity_Id := Root_Type (P_Type);
! 
!                   Expr    : Node_Id; -- call to Descendant_Tag
!                   Get_Tag : Node_Id; -- expression to read the 'Tag
  
                 begin
                    --  Read the internal tag (RM 13.13.2(34)) and use it to
!                   --  initialize a dummy tag value. We used to unconditionally
!                   --  generate:
                    --
                    --     Descendant_Tag (String'Input (Strm), P_Type);
                    --
*************** package body Exp_Attr is
*** 4109,4114 ****
--- 3896,3906 ----
                    --  String_Input_Blk_IO, except that if the String is
                    --  absurdly long, it raises an exception.
                    --
+                   --  However, if the No_Stream_Optimizations restriction
+                   --  is active, we disable this unnecessary attempt at
+                   --  robustness; we really need to read the string
+                   --  character-by-character.
+                   --
                    --  This value is used only to provide a controlling
                    --  argument for the eventual _Input call. Descendant_Tag is
                    --  called rather than Internal_Tag to ensure that we have a
*************** package body Exp_Attr is
*** 4123,4140 ****
                    --  this constant in Cntrl, but this caused a secondary stack
                    --  leak.
  
                    Expr :=
                      Make_Function_Call (Loc,
                        Name                   =>
                          New_Occurrence_Of (RTE (RE_Descendant_Tag), Loc),
                        Parameter_Associations => New_List (
!                         Make_Function_Call (Loc,
!                           Name                   =>
!                             New_Occurrence_Of
!                               (RTE (RE_String_Input_Tag), Loc),
!                           Parameter_Associations => New_List (
!                             Relocate_Node (Duplicate_Subexpr (Strm)))),
! 
                          Make_Attribute_Reference (Loc,
                            Prefix         => New_Occurrence_Of (P_Type, Loc),
                            Attribute_Name => Name_Tag)));
--- 3915,3944 ----
                    --  this constant in Cntrl, but this caused a secondary stack
                    --  leak.
  
+                   if Restriction_Active (No_Stream_Optimizations) then
+                      Get_Tag :=
+                        Make_Attribute_Reference (Loc,
+                          Prefix         =>
+                            New_Occurrence_Of (Standard_String, Loc),
+                          Attribute_Name => Name_Input,
+                          Expressions    => New_List (
+                            Relocate_Node (Duplicate_Subexpr (Strm))));
+                   else
+                      Get_Tag :=
+                        Make_Function_Call (Loc,
+                          Name                   =>
+                            New_Occurrence_Of
+                              (RTE (RE_String_Input_Tag), Loc),
+                          Parameter_Associations => New_List (
+                            Relocate_Node (Duplicate_Subexpr (Strm))));
+                   end if;
+ 
                    Expr :=
                      Make_Function_Call (Loc,
                        Name                   =>
                          New_Occurrence_Of (RTE (RE_Descendant_Tag), Loc),
                        Parameter_Associations => New_List (
!                         Get_Tag,
                          Make_Attribute_Reference (Loc,
                            Prefix         => New_Occurrence_Of (P_Type, Loc),
                            Attribute_Name => Name_Tag)));
*************** package body Exp_Attr is
*** 4242,4249 ****
        when Attribute_Invalid_Value =>
           Rewrite (N, Get_Simple_Init_Val (Ptyp, N));
  
!          --  The value produced may be a conversion of a literal, which
!          --  must be resolved to establish its proper type.
  
           Analyze_And_Resolve (N);
  
--- 4046,4053 ----
        when Attribute_Invalid_Value =>
           Rewrite (N, Get_Simple_Init_Val (Ptyp, N));
  
!          --  The value produced may be a conversion of a literal, which must be
!          --  resolved to establish its proper type.
  
           Analyze_And_Resolve (N);
  
*************** package body Exp_Attr is
*** 5442,5448 ****
                                  Rep_To_Pos_Flag (Ptyp, Loc))))));
  
              else
!                --  Add Boolean parameter True, to request program errror if
                 --  we have a bad representation on our hands. If checks are
                 --  suppressed, then add False instead
  
--- 5246,5252 ----
                                  Rep_To_Pos_Flag (Ptyp, Loc))))));
  
              else
!                --  Add Boolean parameter True, to request program error if
                 --  we have a bad representation on our hands. If checks are
                 --  suppressed, then add False instead
  
*************** package body Exp_Attr is
*** 5659,5664 ****
--- 5463,5559 ----
              Apply_Universal_Integer_Attribute_Checks (N);
           end if;
  
+       ------------
+       -- Reduce --
+       ------------
+ 
+       when Attribute_Reduce =>
+          declare
+             Loc     : constant Source_Ptr := Sloc (N);
+             E1      : constant Node_Id := First (Expressions (N));
+             E2      : constant Node_Id := Next (E1);
+             Bnn     : constant Entity_Id := Make_Temporary (Loc, 'B', N);
+             Typ     : constant Entity_Id := Etype (N);
+             New_Loop : Node_Id;
+ 
+          --  If the prefix is an aggregwte, its unique component is sn
+          --  Iterated_Element, and we create a loop out of its itertor.
+ 
+          begin
+             if Nkind (Prefix (N)) = N_Aggregate then
+                declare
+                   Stream  : constant Node_Id :=
+                      First (Component_Associations (Prefix (N)));
+                   Id      : constant Node_Id := Defining_Identifier (Stream);
+                   Expr    : constant Node_Id := Expression (Stream);
+                   Ch      : constant Node_Id :=
+                                First (Discrete_Choices (Stream));
+                begin
+                   New_Loop := Make_Loop_Statement (Loc,
+                     Iteration_Scheme =>
+                       Make_Iteration_Scheme (Loc,
+                         Iterator_Specification => Empty,
+                         Loop_Parameter_Specification =>
+                           Make_Loop_Parameter_Specification  (Loc,
+                             Defining_Identifier => New_Copy (Id),
+                             Discrete_Subtype_Definition =>
+                               Relocate_Node (Ch))),
+                       End_Label => Empty,
+                       Statements => New_List (
+                         Make_Assignment_Statement (Loc,
+                           Name => New_Occurrence_Of (Bnn, Loc),
+                           Expression => Make_Function_Call (Loc,
+                             Name => New_Occurrence_Of (Entity (E1), Loc),
+                             Parameter_Associations => New_List (
+                               New_Occurrence_Of (Bnn, Loc),
+                               Relocate_Node (Expr))))));
+                end;
+             else
+                --  If the prefix is a name we construct an element iterwtor
+                --  over it. Its expansion will verify that it is an array
+                --  or a container with the proper aspects.
+ 
+                declare
+                   Iter : Node_Id;
+                   Elem : constant Entity_Id := Make_Temporary (Loc, 'E', N);
+ 
+                begin
+                   Iter :=
+                     Make_Iterator_Specification (Loc,
+                     Defining_Identifier => Elem,
+                     Name => Relocate_Node (Prefix (N)),
+                     Subtype_Indication => Empty);
+                   Set_Of_Present (Iter);
+ 
+                   New_Loop := Make_Loop_Statement (Loc,
+                     Iteration_Scheme =>
+                       Make_Iteration_Scheme (Loc,
+                         Iterator_Specification => Iter,
+                         Loop_Parameter_Specification => Empty),
+                       End_Label => Empty,
+                       Statements => New_List (
+                         Make_Assignment_Statement (Loc,
+                           Name => New_Occurrence_Of (Bnn, Loc),
+                           Expression => Make_Function_Call (Loc,
+                             Name => New_Occurrence_Of (Entity (E1), Loc),
+                             Parameter_Associations => New_List (
+                               New_Occurrence_Of (Bnn, Loc),
+                               New_Occurrence_Of (Elem, Loc))))));
+                end;
+             end if;
+ 
+             Rewrite (N,
+                Make_Expression_With_Actions (Loc,
+                  Actions    => New_List (
+                    Make_Object_Declaration (Loc,
+                      Defining_Identifier => Bnn,
+                      Object_Definition   =>
+                        New_Occurrence_Of (Typ, Loc),
+                      Expression => Relocate_Node (E2)), New_Loop),
+                  Expression => New_Occurrence_Of (Bnn, Loc)));
+             Analyze_And_Resolve (N, Typ);
+          end;
+ 
        ----------
        -- Read --
        ----------
*************** package body Exp_Attr is
*** 5959,5965 ****
           | Attribute_VADS_Size
        =>
           Size : declare
-             Siz      : Uint;
              New_Node : Node_Id;
  
           begin
--- 5854,5859 ----
*************** package body Exp_Attr is
*** 6071,6198 ****
                 Rewrite (N, New_Node);
                 Analyze_And_Resolve (N, Typ);
                 return;
- 
-             --  Case of known RM_Size of a type
- 
-             elsif (Id = Attribute_Size or else Id = Attribute_Value_Size)
-               and then Is_Entity_Name (Pref)
-               and then Is_Type (Entity (Pref))
-               and then Known_Static_RM_Size (Entity (Pref))
-             then
-                Siz := RM_Size (Entity (Pref));
- 
-             --  Case of known Esize of a type
- 
-             elsif Id = Attribute_Object_Size
-               and then Is_Entity_Name (Pref)
-               and then Is_Type (Entity (Pref))
-               and then Known_Static_Esize (Entity (Pref))
-             then
-                Siz := Esize (Entity (Pref));
- 
-             --  Case of known size of object
- 
-             elsif Id = Attribute_Size
-               and then Is_Entity_Name (Pref)
-               and then Is_Object (Entity (Pref))
-               and then Known_Esize (Entity (Pref))
-               and then Known_Static_Esize (Entity (Pref))
-             then
-                Siz := Esize (Entity (Pref));
- 
-             --  For an array component, we can do Size in the front end if the
-             --  component_size of the array is set.
- 
-             elsif Nkind (Pref) = N_Indexed_Component then
-                Siz := Component_Size (Etype (Prefix (Pref)));
- 
-             --  For a record component, we can do Size in the front end if
-             --  there is a component clause, or if the record is packed and the
-             --  component's size is known at compile time.
- 
-             elsif Nkind (Pref) = N_Selected_Component then
-                declare
-                   Rec  : constant Entity_Id := Etype (Prefix (Pref));
-                   Comp : constant Entity_Id := Entity (Selector_Name (Pref));
- 
-                begin
-                   if Present (Component_Clause (Comp)) then
-                      Siz := Esize (Comp);
- 
-                   elsif Is_Packed (Rec) then
-                      Siz := RM_Size (Ptyp);
- 
-                   else
-                      Apply_Universal_Integer_Attribute_Checks (N);
-                      return;
-                   end if;
-                end;
- 
-             --  All other cases are handled by the back end
- 
-             else
-                Apply_Universal_Integer_Attribute_Checks (N);
- 
-                --  If Size is applied to a formal parameter that is of a packed
-                --  array subtype, then apply Size to the actual subtype.
- 
-                if Is_Entity_Name (Pref)
-                  and then Is_Formal (Entity (Pref))
-                  and then Is_Array_Type (Ptyp)
-                  and then Is_Packed (Ptyp)
-                then
-                   Rewrite (N,
-                     Make_Attribute_Reference (Loc,
-                       Prefix         =>
-                         New_Occurrence_Of (Get_Actual_Subtype (Pref), Loc),
-                       Attribute_Name => Name_Size));
-                   Analyze_And_Resolve (N, Typ);
-                end if;
- 
-                --  If Size applies to a dereference of an access to
-                --  unconstrained packed array, the back end needs to see its
-                --  unconstrained nominal type, but also a hint to the actual
-                --  constrained type.
- 
-                if Nkind (Pref) = N_Explicit_Dereference
-                  and then Is_Array_Type (Ptyp)
-                  and then not Is_Constrained (Ptyp)
-                  and then Is_Packed (Ptyp)
-                then
-                   Set_Actual_Designated_Subtype (Pref,
-                     Get_Actual_Subtype (Pref));
-                end if;
- 
-                return;
              end if;
  
!             --  Common processing for record and array component case
! 
!             if Siz /= No_Uint and then Siz /= 0 then
!                declare
!                   CS : constant Boolean := Comes_From_Source (N);
! 
!                begin
!                   Rewrite (N, Make_Integer_Literal (Loc, Siz));
! 
!                   --  This integer literal is not a static expression. We do
!                   --  not call Analyze_And_Resolve here, because this would
!                   --  activate the circuit for deciding that a static value
!                   --  was out of range, and we don't want that.
! 
!                   --  So just manually set the type, mark the expression as
!                   --  non-static, and then ensure that the result is checked
!                   --  properly if the attribute comes from source (if it was
!                   --  internally generated, we never need a constraint check).
! 
!                   Set_Etype (N, Typ);
!                   Set_Is_Static_Expression (N, False);
  
!                   if CS then
!                      Apply_Constraint_Check (N, Typ);
!                   end if;
!                end;
!             end if;
           end Size;
  
        ------------------
--- 5965,5976 ----
                 Rewrite (N, New_Node);
                 Analyze_And_Resolve (N, Typ);
                 return;
              end if;
  
!             --  Call Expand_Size_Attribute to do the final part of the
!             --  expansion which is shared with GNATprove expansion.
  
!             Expand_Size_Attribute (N);
           end Size;
  
        ------------------
*************** package body Exp_Attr is
*** 6438,6444 ****
                                      Make_Integer_Literal (Loc, 1))),
                                  Rep_To_Pos_Flag (Ptyp, Loc))))));
              else
!                --  Add Boolean parameter True, to request program errror if
                 --  we have a bad representation on our hands. Add False if
                 --  checks are suppressed.
  
--- 6216,6222 ----
                                      Make_Integer_Literal (Loc, 1))),
                                  Rep_To_Pos_Flag (Ptyp, Loc))))));
              else
!                --  Add Boolean parameter True, to request program error if
                 --  we have a bad representation on our hands. Add False if
                 --  checks are suppressed.
  
*************** package body Exp_Attr is
*** 6772,6778 ****
        --  See separate sections below for the generated code in each case.
  
        when Attribute_Valid => Valid : declare
!          Btyp : Entity_Id := Base_Type (Ptyp);
  
           Save_Validity_Checks_On : constant Boolean := Validity_Checks_On;
           --  Save the validity checking mode. We always turn off validity
--- 6550,6556 ----
        --  See separate sections below for the generated code in each case.
  
        when Attribute_Valid => Valid : declare
!          PBtyp : Entity_Id := Base_Type (Ptyp);
  
           Save_Validity_Checks_On : constant Boolean := Validity_Checks_On;
           --  Save the validity checking mode. We always turn off validity
*************** package body Exp_Attr is
*** 6782,6788 ****
  
           function Make_Range_Test return Node_Id;
           --  Build the code for a range test of the form
!          --    Btyp!(Pref) in Btyp!(Ptyp'First) .. Btyp!(Ptyp'Last)
  
           ---------------------
           -- Make_Range_Test --
--- 6560,6566 ----
  
           function Make_Range_Test return Node_Id;
           --  Build the code for a range test of the form
!          --    PBtyp!(Pref) in PBtyp!(Ptyp'First) .. PBtyp!(Ptyp'Last)
  
           ---------------------
           -- Make_Range_Test --
*************** package body Exp_Attr is
*** 6821,6836 ****
  
              return
                Make_In (Loc,
!                 Left_Opnd  => Unchecked_Convert_To (Btyp, Temp),
                  Right_Opnd =>
                    Make_Range (Loc,
                      Low_Bound  =>
!                       Unchecked_Convert_To (Btyp,
                          Make_Attribute_Reference (Loc,
                            Prefix         => New_Occurrence_Of (Ptyp, Loc),
                            Attribute_Name => Name_First)),
                      High_Bound =>
!                       Unchecked_Convert_To (Btyp,
                          Make_Attribute_Reference (Loc,
                            Prefix         => New_Occurrence_Of (Ptyp, Loc),
                            Attribute_Name => Name_Last))));
--- 6599,6614 ----
  
              return
                Make_In (Loc,
!                 Left_Opnd  => Unchecked_Convert_To (PBtyp, Temp),
                  Right_Opnd =>
                    Make_Range (Loc,
                      Low_Bound  =>
!                       Unchecked_Convert_To (PBtyp,
                          Make_Attribute_Reference (Loc,
                            Prefix         => New_Occurrence_Of (Ptyp, Loc),
                            Attribute_Name => Name_First)),
                      High_Bound =>
!                       Unchecked_Convert_To (PBtyp,
                          Make_Attribute_Reference (Loc,
                            Prefix         => New_Occurrence_Of (Ptyp, Loc),
                            Attribute_Name => Name_Last))));
*************** package body Exp_Attr is
*** 6858,6865 ****
           --  Retrieve the base type. Handle the case where the base type is a
           --  private enumeration type.
  
!          if Is_Private_Type (Btyp) and then Present (Full_View (Btyp)) then
!             Btyp := Full_View (Btyp);
           end if;
  
           --  Floating-point case. This case is handled by the Valid attribute
--- 6636,6643 ----
           --  Retrieve the base type. Handle the case where the base type is a
           --  private enumeration type.
  
!          if Is_Private_Type (PBtyp) and then Present (Full_View (PBtyp)) then
!             PBtyp := Full_View (PBtyp);
           end if;
  
           --  Floating-point case. This case is handled by the Valid attribute
*************** package body Exp_Attr is
*** 6892,6898 ****
              begin
                 --  The C and AAMP back-ends handle Valid for fpt types
  
!                if Modify_Tree_For_C or else Float_Rep (Btyp) = AAMP then
                    Analyze_And_Resolve (Pref, Ptyp);
                    Set_Etype (N, Standard_Boolean);
                    Set_Analyzed (N);
--- 6670,6676 ----
              begin
                 --  The C and AAMP back-ends handle Valid for fpt types
  
!                if Modify_Tree_For_C or else Float_Rep (PBtyp) = AAMP then
                    Analyze_And_Resolve (Pref, Ptyp);
                    Set_Etype (N, Standard_Boolean);
                    Set_Analyzed (N);
*************** package body Exp_Attr is
*** 6985,6997 ****
                 --  The way we do the range check is simply to create the
                 --  expression: Valid (N) and then Base_Type(Pref) in Typ.
  
!                if not Subtypes_Statically_Match (Ptyp, Btyp) then
                    Rewrite (N,
                      Make_And_Then (Loc,
                        Left_Opnd  => Relocate_Node (N),
                        Right_Opnd =>
                          Make_In (Loc,
!                           Left_Opnd  => Convert_To (Btyp, Pref),
                            Right_Opnd => New_Occurrence_Of (Ptyp, Loc))));
                 end if;
              end Float_Valid;
--- 6763,6775 ----
                 --  The way we do the range check is simply to create the
                 --  expression: Valid (N) and then Base_Type(Pref) in Typ.
  
!                if not Subtypes_Statically_Match (Ptyp, PBtyp) then
                    Rewrite (N,
                      Make_And_Then (Loc,
                        Left_Opnd  => Relocate_Node (N),
                        Right_Opnd =>
                          Make_In (Loc,
!                           Left_Opnd  => Convert_To (PBtyp, Pref),
                            Right_Opnd => New_Occurrence_Of (Ptyp, Loc))));
                 end if;
              end Float_Valid;
*************** package body Exp_Attr is
*** 7020,7043 ****
           --       (X >= type(X)'First and then type(X)'Last <= X)
  
           elsif Is_Enumeration_Type (Ptyp)
!            and then Present (Enum_Pos_To_Rep (Btyp))
           then
              Tst :=
                Make_Op_Ge (Loc,
                  Left_Opnd =>
                    Make_Function_Call (Loc,
                      Name =>
!                       New_Occurrence_Of (TSS (Btyp, TSS_Rep_To_Pos), Loc),
                      Parameter_Associations => New_List (
                        Pref,
                        New_Occurrence_Of (Standard_False, Loc))),
                  Right_Opnd => Make_Integer_Literal (Loc, 0));
  
!             if Ptyp /= Btyp
                and then
!                 (Type_Low_Bound (Ptyp) /= Type_Low_Bound (Btyp)
                    or else
!                  Type_High_Bound (Ptyp) /= Type_High_Bound (Btyp))
              then
                 --  The call to Make_Range_Test will create declarations
                 --  that need a proper insertion point, but Pref is now
--- 6798,6821 ----
           --       (X >= type(X)'First and then type(X)'Last <= X)
  
           elsif Is_Enumeration_Type (Ptyp)
!            and then Present (Enum_Pos_To_Rep (PBtyp))
           then
              Tst :=
                Make_Op_Ge (Loc,
                  Left_Opnd =>
                    Make_Function_Call (Loc,
                      Name =>
!                       New_Occurrence_Of (TSS (PBtyp, TSS_Rep_To_Pos), Loc),
                      Parameter_Associations => New_List (
                        Pref,
                        New_Occurrence_Of (Standard_False, Loc))),
                  Right_Opnd => Make_Integer_Literal (Loc, 0));
  
!             if Ptyp /= PBtyp
                and then
!                 (Type_Low_Bound (Ptyp) /= Type_Low_Bound (PBtyp)
                    or else
!                  Type_High_Bound (Ptyp) /= Type_High_Bound (PBtyp))
              then
                 --  The call to Make_Range_Test will create declarations
                 --  that need a proper insertion point, but Pref is now
*************** package body Exp_Attr is
*** 7070,7085 ****
           --  test has to take this into account, and the proper form of the
           --  test is:
  
!          --    Btyp!(Pref) < Btyp!(Ptyp'Range_Length)
  
           elsif Has_Biased_Representation (Ptyp) then
!             Btyp := RTE (RE_Unsigned_32);
              Rewrite (N,
                Make_Op_Lt (Loc,
                  Left_Opnd =>
!                   Unchecked_Convert_To (Btyp, Duplicate_Subexpr (Pref)),
                  Right_Opnd =>
!                   Unchecked_Convert_To (Btyp,
                      Make_Attribute_Reference (Loc,
                        Prefix => New_Occurrence_Of (Ptyp, Loc),
                        Attribute_Name => Name_Range_Length))));
--- 6848,6863 ----
           --  test has to take this into account, and the proper form of the
           --  test is:
  
!          --    PBtyp!(Pref) < PBtyp!(Ptyp'Range_Length)
  
           elsif Has_Biased_Representation (Ptyp) then
!             PBtyp := RTE (RE_Unsigned_32);
              Rewrite (N,
                Make_Op_Lt (Loc,
                  Left_Opnd =>
!                   Unchecked_Convert_To (PBtyp, Duplicate_Subexpr (Pref)),
                  Right_Opnd =>
!                   Unchecked_Convert_To (PBtyp,
                      Make_Attribute_Reference (Loc,
                        Prefix => New_Occurrence_Of (Ptyp, Loc),
                        Attribute_Name => Name_Range_Length))));
*************** package body Exp_Attr is
*** 7094,7104 ****
           --  the Valid attribute is exactly that this test does not work).
           --  What will work is:
  
!          --     Btyp!(X) >= Btyp!(type(X)'First)
           --       and then
!          --     Btyp!(X) <= Btyp!(type(X)'Last)
  
!          --  where Btyp is an integer type large enough to cover the full
           --  range of possible stored values (i.e. it is chosen on the basis
           --  of the size of the type, not the range of the values). We write
           --  this as two tests, rather than a range check, so that static
--- 6872,6882 ----
           --  the Valid attribute is exactly that this test does not work).
           --  What will work is:
  
!          --     PBtyp!(X) >= PBtyp!(type(X)'First)
           --       and then
!          --     PBtyp!(X) <= PBtyp!(type(X)'Last)
  
!          --  where PBtyp is an integer type large enough to cover the full
           --  range of possible stored values (i.e. it is chosen on the basis
           --  of the size of the type, not the range of the values). We write
           --  this as two tests, rather than a range check, so that static
*************** package body Exp_Attr is
*** 7122,7132 ****
           --  correct, even though a value greater than 127 looks signed to a
           --  signed comparison.
  
!          elsif Is_Unsigned_Type (Ptyp) then
              if Esize (Ptyp) <= 32 then
!                Btyp := RTE (RE_Unsigned_32);
              else
!                Btyp := RTE (RE_Unsigned_64);
              end if;
  
              Rewrite (N, Make_Range_Test);
--- 6900,6912 ----
           --  correct, even though a value greater than 127 looks signed to a
           --  signed comparison.
  
!          elsif Is_Unsigned_Type (Ptyp)
!            or else (Is_Private_Type (Ptyp) and then Is_Unsigned_Type (Btyp))
!          then
              if Esize (Ptyp) <= 32 then
!                PBtyp := RTE (RE_Unsigned_32);
              else
!                PBtyp := RTE (RE_Unsigned_64);
              end if;
  
              Rewrite (N, Make_Range_Test);
*************** package body Exp_Attr is
*** 7135,7143 ****
  
           else
              if Esize (Ptyp) <= Esize (Standard_Integer) then
!                Btyp := Standard_Integer;
              else
!                Btyp := Universal_Integer;
              end if;
  
              Rewrite (N, Make_Range_Test);
--- 6915,6923 ----
  
           else
              if Esize (Ptyp) <= Esize (Standard_Integer) then
!                PBtyp := Standard_Integer;
              else
!                PBtyp := Universal_Integer;
              end if;
  
              Rewrite (N, Make_Range_Test);
*************** package body Exp_Attr is
*** 7718,7723 ****
--- 7498,7654 ----
        end if;
     end Expand_Pred_Succ_Attribute;
  
+    ---------------------------
+    -- Expand_Size_Attribute --
+    ---------------------------
+ 
+    procedure Expand_Size_Attribute (N : Node_Id) is
+       Loc   : constant Source_Ptr   := Sloc (N);
+       Typ   : constant Entity_Id    := Etype (N);
+       Pref  : constant Node_Id      := Prefix (N);
+       Ptyp  : constant Entity_Id    := Etype (Pref);
+       Id    : constant Attribute_Id := Get_Attribute_Id (Attribute_Name (N));
+       Siz   : Uint;
+ 
+    begin
+       --  Case of known RM_Size of a type
+ 
+       if (Id = Attribute_Size or else Id = Attribute_Value_Size)
+         and then Is_Entity_Name (Pref)
+         and then Is_Type (Entity (Pref))
+         and then Known_Static_RM_Size (Entity (Pref))
+       then
+          Siz := RM_Size (Entity (Pref));
+ 
+       --  Case of known Esize of a type
+ 
+       elsif Id = Attribute_Object_Size
+         and then Is_Entity_Name (Pref)
+         and then Is_Type (Entity (Pref))
+         and then Known_Static_Esize (Entity (Pref))
+       then
+          Siz := Esize (Entity (Pref));
+ 
+       --  Case of known size of object
+ 
+       elsif Id = Attribute_Size
+         and then Is_Entity_Name (Pref)
+         and then Is_Object (Entity (Pref))
+         and then Known_Esize (Entity (Pref))
+         and then Known_Static_Esize (Entity (Pref))
+       then
+          Siz := Esize (Entity (Pref));
+ 
+       --  For an array component, we can do Size in the front end if the
+       --  component_size of the array is set.
+ 
+       elsif Nkind (Pref) = N_Indexed_Component then
+          Siz := Component_Size (Etype (Prefix (Pref)));
+ 
+       --  For a record component, we can do Size in the front end if there is a
+       --  component clause, or if the record is packed and the component's size
+       --  is known at compile time.
+ 
+       elsif Nkind (Pref) = N_Selected_Component then
+          declare
+             Rec  : constant Entity_Id := Etype (Prefix (Pref));
+             Comp : constant Entity_Id := Entity (Selector_Name (Pref));
+ 
+          begin
+             if Present (Component_Clause (Comp)) then
+                Siz := Esize (Comp);
+ 
+             elsif Is_Packed (Rec) then
+                Siz := RM_Size (Ptyp);
+ 
+             else
+                Apply_Universal_Integer_Attribute_Checks (N);
+                return;
+             end if;
+          end;
+ 
+       --  All other cases are handled by the back end
+ 
+       else
+          --  If Size is applied to a formal parameter that is of a packed
+          --  array subtype, then apply Size to the actual subtype.
+ 
+          if Is_Entity_Name (Pref)
+            and then Is_Formal (Entity (Pref))
+            and then Is_Array_Type (Ptyp)
+            and then Is_Packed (Ptyp)
+          then
+             Rewrite (N,
+               Make_Attribute_Reference (Loc,
+                 Prefix         =>
+                   New_Occurrence_Of (Get_Actual_Subtype (Pref), Loc),
+                 Attribute_Name => Name_Size));
+             Analyze_And_Resolve (N, Typ);
+ 
+          --  If Size is applied to a dereference of an access to unconstrained
+          --  packed array, the back end needs to see its unconstrained nominal
+          --  type, but also a hint to the actual constrained type.
+ 
+          elsif Nkind (Pref) = N_Explicit_Dereference
+            and then Is_Array_Type (Ptyp)
+            and then not Is_Constrained (Ptyp)
+            and then Is_Packed (Ptyp)
+          then
+             Set_Actual_Designated_Subtype (Pref, Get_Actual_Subtype (Pref));
+ 
+          --  If Size was applied to a slice of a bit-packed array, we rewrite
+          --  it into the product of Length and Component_Size. We need to do so
+          --  because bit-packed arrays are represented internally as arrays of
+          --  System.Unsigned_Types.Packed_Byte for code generation purposes so
+          --  the size is always rounded up in the back end.
+ 
+          elsif Nkind (Pref) = N_Slice and then Is_Bit_Packed_Array (Ptyp) then
+             Rewrite (N,
+               Make_Op_Multiply (Loc,
+                 Make_Attribute_Reference (Loc,
+                   Prefix         => Duplicate_Subexpr (Pref, True),
+                   Attribute_Name => Name_Length),
+                 Make_Attribute_Reference (Loc,
+                   Prefix         => Duplicate_Subexpr (Pref, True),
+                   Attribute_Name => Name_Component_Size)));
+             Analyze_And_Resolve (N, Typ);
+          end if;
+ 
+          --  Apply the required checks last, after rewriting has taken place
+ 
+          Apply_Universal_Integer_Attribute_Checks (N);
+          return;
+       end if;
+ 
+       --  Common processing for record and array component case
+ 
+       if Siz /= No_Uint and then Siz /= 0 then
+          declare
+             CS : constant Boolean := Comes_From_Source (N);
+ 
+          begin
+             Rewrite (N, Make_Integer_Literal (Loc, Siz));
+ 
+             --  This integer literal is not a static expression. We do not
+             --  call Analyze_And_Resolve here, because this would activate
+             --  the circuit for deciding that a static value was out of range,
+             --  and we don't want that.
+ 
+             --  So just manually set the type, mark the expression as
+             --  nonstatic, and then ensure that the result is checked
+             --  properly if the attribute comes from source (if it was
+             --  internally generated, we never need a constraint check).
+ 
+             Set_Etype (N, Typ);
+             Set_Is_Static_Expression (N, False);
+ 
+             if CS then
+                Apply_Constraint_Check (N, Typ);
+             end if;
+          end;
+       end if;
+    end Expand_Size_Attribute;
+ 
     -----------------------------
     -- Expand_Update_Attribute --
     -----------------------------
*************** package body Exp_Attr is
*** 8002,8032 ****
     is
        Base_Typ : constant Entity_Id := Base_Type (Typ);
        Ent      : constant Entity_Id := TSS (Typ, Nam);
- 
-       function Is_Available (Entity : RE_Id) return Boolean;
-       pragma Inline (Is_Available);
-       --  Function to check whether the specified run-time call is available
-       --  in the run time used. In the case of a configurable run time, it
-       --  is normal that some subprograms are not there.
-       --
-       --  I don't understand this routine at all, why is this not just a
-       --  call to RTE_Available? And if for some reason we need a different
-       --  routine with different semantics, why is not in Rtsfind ???
- 
-       ------------------
-       -- Is_Available --
-       ------------------
- 
-       function Is_Available (Entity : RE_Id) return Boolean is
-       begin
-          --  Assume that the unit will always be available when using a
-          --  "normal" (not configurable) run time.
- 
-          return not Configurable_Run_Time_Mode or else RTE_Available (Entity);
-       end Is_Available;
- 
-    --  Start of processing for Find_Stream_Subprogram
- 
     begin
        if Present (Ent) then
           return Ent;
--- 7933,7938 ----
*************** package body Exp_Attr is
*** 8043,8049 ****
        --  that stream routines for string types are not present (they require
        --  file system support). In this case, the specific stream routines for
        --  strings are not used, relying on the regular stream mechanism
!       --  instead. That is why we include the test Is_Available when dealing
        --  with these cases.
  
        if not Is_Predefined_Unit (Current_Sem_Unit) then
--- 7949,7955 ----
        --  that stream routines for string types are not present (they require
        --  file system support). In this case, the specific stream routines for
        --  strings are not used, relying on the regular stream mechanism
!       --  instead. That is why we include the test RTE_Available when dealing
        --  with these cases.
  
        if not Is_Predefined_Unit (Current_Sem_Unit) then
*************** package body Exp_Attr is
*** 8055,8076 ****
  
              if Restriction_Active (No_Stream_Optimizations) then
                 if Nam = TSS_Stream_Input
!                  and then Is_Available (RE_Storage_Array_Input)
                 then
                    return RTE (RE_Storage_Array_Input);
  
                 elsif Nam = TSS_Stream_Output
!                  and then Is_Available (RE_Storage_Array_Output)
                 then
                    return RTE (RE_Storage_Array_Output);
  
                 elsif Nam = TSS_Stream_Read
!                  and then Is_Available (RE_Storage_Array_Read)
                 then
                    return RTE (RE_Storage_Array_Read);
  
                 elsif Nam = TSS_Stream_Write
!                  and then Is_Available (RE_Storage_Array_Write)
                 then
                    return RTE (RE_Storage_Array_Write);
  
--- 7961,7982 ----
  
              if Restriction_Active (No_Stream_Optimizations) then
                 if Nam = TSS_Stream_Input
!                  and then RTE_Available (RE_Storage_Array_Input)
                 then
                    return RTE (RE_Storage_Array_Input);
  
                 elsif Nam = TSS_Stream_Output
!                  and then RTE_Available (RE_Storage_Array_Output)
                 then
                    return RTE (RE_Storage_Array_Output);
  
                 elsif Nam = TSS_Stream_Read
!                  and then RTE_Available (RE_Storage_Array_Read)
                 then
                    return RTE (RE_Storage_Array_Read);
  
                 elsif Nam = TSS_Stream_Write
!                  and then RTE_Available (RE_Storage_Array_Write)
                 then
                    return RTE (RE_Storage_Array_Write);
  
*************** package body Exp_Attr is
*** 8087,8108 ****
  
              else
                 if Nam = TSS_Stream_Input
!                  and then Is_Available (RE_Storage_Array_Input_Blk_IO)
                 then
                    return RTE (RE_Storage_Array_Input_Blk_IO);
  
                 elsif Nam = TSS_Stream_Output
!                  and then Is_Available (RE_Storage_Array_Output_Blk_IO)
                 then
                    return RTE (RE_Storage_Array_Output_Blk_IO);
  
                 elsif Nam = TSS_Stream_Read
!                  and then Is_Available (RE_Storage_Array_Read_Blk_IO)
                 then
                    return RTE (RE_Storage_Array_Read_Blk_IO);
  
                 elsif Nam = TSS_Stream_Write
!                  and then Is_Available (RE_Storage_Array_Write_Blk_IO)
                 then
                    return RTE (RE_Storage_Array_Write_Blk_IO);
  
--- 7993,8014 ----
  
              else
                 if Nam = TSS_Stream_Input
!                  and then RTE_Available (RE_Storage_Array_Input_Blk_IO)
                 then
                    return RTE (RE_Storage_Array_Input_Blk_IO);
  
                 elsif Nam = TSS_Stream_Output
!                  and then RTE_Available (RE_Storage_Array_Output_Blk_IO)
                 then
                    return RTE (RE_Storage_Array_Output_Blk_IO);
  
                 elsif Nam = TSS_Stream_Read
!                  and then RTE_Available (RE_Storage_Array_Read_Blk_IO)
                 then
                    return RTE (RE_Storage_Array_Read_Blk_IO);
  
                 elsif Nam = TSS_Stream_Write
!                  and then RTE_Available (RE_Storage_Array_Write_Blk_IO)
                 then
                    return RTE (RE_Storage_Array_Write_Blk_IO);
  
*************** package body Exp_Attr is
*** 8123,8144 ****
  
              if Restriction_Active (No_Stream_Optimizations) then
                 if Nam = TSS_Stream_Input
!                  and then Is_Available (RE_Stream_Element_Array_Input)
                 then
                    return RTE (RE_Stream_Element_Array_Input);
  
                 elsif Nam = TSS_Stream_Output
!                  and then Is_Available (RE_Stream_Element_Array_Output)
                 then
                    return RTE (RE_Stream_Element_Array_Output);
  
                 elsif Nam = TSS_Stream_Read
!                  and then Is_Available (RE_Stream_Element_Array_Read)
                 then
                    return RTE (RE_Stream_Element_Array_Read);
  
                 elsif Nam = TSS_Stream_Write
!                  and then Is_Available (RE_Stream_Element_Array_Write)
                 then
                    return RTE (RE_Stream_Element_Array_Write);
  
--- 8029,8050 ----
  
              if Restriction_Active (No_Stream_Optimizations) then
                 if Nam = TSS_Stream_Input
!                  and then RTE_Available (RE_Stream_Element_Array_Input)
                 then
                    return RTE (RE_Stream_Element_Array_Input);
  
                 elsif Nam = TSS_Stream_Output
!                  and then RTE_Available (RE_Stream_Element_Array_Output)
                 then
                    return RTE (RE_Stream_Element_Array_Output);
  
                 elsif Nam = TSS_Stream_Read
!                  and then RTE_Available (RE_Stream_Element_Array_Read)
                 then
                    return RTE (RE_Stream_Element_Array_Read);
  
                 elsif Nam = TSS_Stream_Write
!                  and then RTE_Available (RE_Stream_Element_Array_Write)
                 then
                    return RTE (RE_Stream_Element_Array_Write);
  
*************** package body Exp_Attr is
*** 8155,8176 ****
  
              else
                 if Nam = TSS_Stream_Input
!                  and then Is_Available (RE_Stream_Element_Array_Input_Blk_IO)
                 then
                    return RTE (RE_Stream_Element_Array_Input_Blk_IO);
  
                 elsif Nam = TSS_Stream_Output
!                  and then Is_Available (RE_Stream_Element_Array_Output_Blk_IO)
                 then
                    return RTE (RE_Stream_Element_Array_Output_Blk_IO);
  
                 elsif Nam = TSS_Stream_Read
!                  and then Is_Available (RE_Stream_Element_Array_Read_Blk_IO)
                 then
                    return RTE (RE_Stream_Element_Array_Read_Blk_IO);
  
                 elsif Nam = TSS_Stream_Write
!                  and then Is_Available (RE_Stream_Element_Array_Write_Blk_IO)
                 then
                    return RTE (RE_Stream_Element_Array_Write_Blk_IO);
  
--- 8061,8082 ----
  
              else
                 if Nam = TSS_Stream_Input
!                  and then RTE_Available (RE_Stream_Element_Array_Input_Blk_IO)
                 then
                    return RTE (RE_Stream_Element_Array_Input_Blk_IO);
  
                 elsif Nam = TSS_Stream_Output
!                  and then RTE_Available (RE_Stream_Element_Array_Output_Blk_IO)
                 then
                    return RTE (RE_Stream_Element_Array_Output_Blk_IO);
  
                 elsif Nam = TSS_Stream_Read
!                  and then RTE_Available (RE_Stream_Element_Array_Read_Blk_IO)
                 then
                    return RTE (RE_Stream_Element_Array_Read_Blk_IO);
  
                 elsif Nam = TSS_Stream_Write
!                  and then RTE_Available (RE_Stream_Element_Array_Write_Blk_IO)
                 then
                    return RTE (RE_Stream_Element_Array_Write_Blk_IO);
  
*************** package body Exp_Attr is
*** 8191,8212 ****
  
              if Restriction_Active (No_Stream_Optimizations) then
                 if Nam = TSS_Stream_Input
!                  and then Is_Available (RE_String_Input)
                 then
                    return RTE (RE_String_Input);
  
                 elsif Nam = TSS_Stream_Output
!                  and then Is_Available (RE_String_Output)
                 then
                    return RTE (RE_String_Output);
  
                 elsif Nam = TSS_Stream_Read
!                  and then Is_Available (RE_String_Read)
                 then
                    return RTE (RE_String_Read);
  
                 elsif Nam = TSS_Stream_Write
!                  and then Is_Available (RE_String_Write)
                 then
                    return RTE (RE_String_Write);
  
--- 8097,8118 ----
  
              if Restriction_Active (No_Stream_Optimizations) then
                 if Nam = TSS_Stream_Input
!                  and then RTE_Available (RE_String_Input)
                 then
                    return RTE (RE_String_Input);
  
                 elsif Nam = TSS_Stream_Output
!                  and then RTE_Available (RE_String_Output)
                 then
                    return RTE (RE_String_Output);
  
                 elsif Nam = TSS_Stream_Read
!                  and then RTE_Available (RE_String_Read)
                 then
                    return RTE (RE_String_Read);
  
                 elsif Nam = TSS_Stream_Write
!                  and then RTE_Available (RE_String_Write)
                 then
                    return RTE (RE_String_Write);
  
*************** package body Exp_Attr is
*** 8223,8244 ****
  
              else
                 if Nam = TSS_Stream_Input
!                  and then Is_Available (RE_String_Input_Blk_IO)
                 then
                    return RTE (RE_String_Input_Blk_IO);
  
                 elsif Nam = TSS_Stream_Output
!                  and then Is_Available (RE_String_Output_Blk_IO)
                 then
                    return RTE (RE_String_Output_Blk_IO);
  
                 elsif Nam = TSS_Stream_Read
!                  and then Is_Available (RE_String_Read_Blk_IO)
                 then
                    return RTE (RE_String_Read_Blk_IO);
  
                 elsif Nam = TSS_Stream_Write
!                  and then Is_Available (RE_String_Write_Blk_IO)
                 then
                    return RTE (RE_String_Write_Blk_IO);
  
--- 8129,8150 ----
  
              else
                 if Nam = TSS_Stream_Input
!                  and then RTE_Available (RE_String_Input_Blk_IO)
                 then
                    return RTE (RE_String_Input_Blk_IO);
  
                 elsif Nam = TSS_Stream_Output
!                  and then RTE_Available (RE_String_Output_Blk_IO)
                 then
                    return RTE (RE_String_Output_Blk_IO);
  
                 elsif Nam = TSS_Stream_Read
!                  and then RTE_Available (RE_String_Read_Blk_IO)
                 then
                    return RTE (RE_String_Read_Blk_IO);
  
                 elsif Nam = TSS_Stream_Write
!                  and then RTE_Available (RE_String_Write_Blk_IO)
                 then
                    return RTE (RE_String_Write_Blk_IO);
  
*************** package body Exp_Attr is
*** 8259,8280 ****
  
              if Restriction_Active (No_Stream_Optimizations) then
                 if Nam = TSS_Stream_Input
!                  and then Is_Available (RE_Wide_String_Input)
                 then
                    return RTE (RE_Wide_String_Input);
  
                 elsif Nam = TSS_Stream_Output
!                  and then Is_Available (RE_Wide_String_Output)
                 then
                    return RTE (RE_Wide_String_Output);
  
                 elsif Nam = TSS_Stream_Read
!                  and then Is_Available (RE_Wide_String_Read)
                 then
                    return RTE (RE_Wide_String_Read);
  
                 elsif Nam = TSS_Stream_Write
!                  and then Is_Available (RE_Wide_String_Write)
                 then
                    return RTE (RE_Wide_String_Write);
  
--- 8165,8186 ----
  
              if Restriction_Active (No_Stream_Optimizations) then
                 if Nam = TSS_Stream_Input
!                  and then RTE_Available (RE_Wide_String_Input)
                 then
                    return RTE (RE_Wide_String_Input);
  
                 elsif Nam = TSS_Stream_Output
!                  and then RTE_Available (RE_Wide_String_Output)
                 then
                    return RTE (RE_Wide_String_Output);
  
                 elsif Nam = TSS_Stream_Read
!                  and then RTE_Available (RE_Wide_String_Read)
                 then
                    return RTE (RE_Wide_String_Read);
  
                 elsif Nam = TSS_Stream_Write
!                  and then RTE_Available (RE_Wide_String_Write)
                 then
                    return RTE (RE_Wide_String_Write);
  
*************** package body Exp_Attr is
*** 8291,8312 ****
  
              else
                 if Nam = TSS_Stream_Input
!                  and then Is_Available (RE_Wide_String_Input_Blk_IO)
                 then
                    return RTE (RE_Wide_String_Input_Blk_IO);
  
                 elsif Nam = TSS_Stream_Output
!                  and then Is_Available (RE_Wide_String_Output_Blk_IO)
                 then
                    return RTE (RE_Wide_String_Output_Blk_IO);
  
                 elsif Nam = TSS_Stream_Read
!                  and then Is_Available (RE_Wide_String_Read_Blk_IO)
                 then
                    return RTE (RE_Wide_String_Read_Blk_IO);
  
                 elsif Nam = TSS_Stream_Write
!                  and then Is_Available (RE_Wide_String_Write_Blk_IO)
                 then
                    return RTE (RE_Wide_String_Write_Blk_IO);
  
--- 8197,8218 ----
  
              else
                 if Nam = TSS_Stream_Input
!                  and then RTE_Available (RE_Wide_String_Input_Blk_IO)
                 then
                    return RTE (RE_Wide_String_Input_Blk_IO);
  
                 elsif Nam = TSS_Stream_Output
!                  and then RTE_Available (RE_Wide_String_Output_Blk_IO)
                 then
                    return RTE (RE_Wide_String_Output_Blk_IO);
  
                 elsif Nam = TSS_Stream_Read
!                  and then RTE_Available (RE_Wide_String_Read_Blk_IO)
                 then
                    return RTE (RE_Wide_String_Read_Blk_IO);
  
                 elsif Nam = TSS_Stream_Write
!                  and then RTE_Available (RE_Wide_String_Write_Blk_IO)
                 then
                    return RTE (RE_Wide_String_Write_Blk_IO);
  
*************** package body Exp_Attr is
*** 8327,8348 ****
  
              if Restriction_Active (No_Stream_Optimizations) then
                 if Nam = TSS_Stream_Input
!                  and then Is_Available (RE_Wide_Wide_String_Input)
                 then
                    return RTE (RE_Wide_Wide_String_Input);
  
                 elsif Nam = TSS_Stream_Output
!                  and then Is_Available (RE_Wide_Wide_String_Output)
                 then
                    return RTE (RE_Wide_Wide_String_Output);
  
                 elsif Nam = TSS_Stream_Read
!                  and then Is_Available (RE_Wide_Wide_String_Read)
                 then
                    return RTE (RE_Wide_Wide_String_Read);
  
                 elsif Nam = TSS_Stream_Write
!                  and then Is_Available (RE_Wide_Wide_String_Write)
                 then
                    return RTE (RE_Wide_Wide_String_Write);
  
--- 8233,8254 ----
  
              if Restriction_Active (No_Stream_Optimizations) then
                 if Nam = TSS_Stream_Input
!                  and then RTE_Available (RE_Wide_Wide_String_Input)
                 then
                    return RTE (RE_Wide_Wide_String_Input);
  
                 elsif Nam = TSS_Stream_Output
!                  and then RTE_Available (RE_Wide_Wide_String_Output)
                 then
                    return RTE (RE_Wide_Wide_String_Output);
  
                 elsif Nam = TSS_Stream_Read
!                  and then RTE_Available (RE_Wide_Wide_String_Read)
                 then
                    return RTE (RE_Wide_Wide_String_Read);
  
                 elsif Nam = TSS_Stream_Write
!                  and then RTE_Available (RE_Wide_Wide_String_Write)
                 then
                    return RTE (RE_Wide_Wide_String_Write);
  
*************** package body Exp_Attr is
*** 8359,8380 ****
  
              else
                 if Nam = TSS_Stream_Input
!                  and then Is_Available (RE_Wide_Wide_String_Input_Blk_IO)
                 then
                    return RTE (RE_Wide_Wide_String_Input_Blk_IO);
  
                 elsif Nam = TSS_Stream_Output
!                  and then Is_Available (RE_Wide_Wide_String_Output_Blk_IO)
                 then
                    return RTE (RE_Wide_Wide_String_Output_Blk_IO);
  
                 elsif Nam = TSS_Stream_Read
!                  and then Is_Available (RE_Wide_Wide_String_Read_Blk_IO)
                 then
                    return RTE (RE_Wide_Wide_String_Read_Blk_IO);
  
                 elsif Nam = TSS_Stream_Write
!                  and then Is_Available (RE_Wide_Wide_String_Write_Blk_IO)
                 then
                    return RTE (RE_Wide_Wide_String_Write_Blk_IO);
  
--- 8265,8286 ----
  
              else
                 if Nam = TSS_Stream_Input
!                  and then RTE_Available (RE_Wide_Wide_String_Input_Blk_IO)
                 then
                    return RTE (RE_Wide_Wide_String_Input_Blk_IO);
  
                 elsif Nam = TSS_Stream_Output
!                  and then RTE_Available (RE_Wide_Wide_String_Output_Blk_IO)
                 then
                    return RTE (RE_Wide_Wide_String_Output_Blk_IO);
  
                 elsif Nam = TSS_Stream_Read
!                  and then RTE_Available (RE_Wide_Wide_String_Read_Blk_IO)
                 then
                    return RTE (RE_Wide_Wide_String_Read_Blk_IO);
  
                 elsif Nam = TSS_Stream_Write
!                  and then RTE_Available (RE_Wide_Wide_String_Write_Blk_IO)
                 then
                    return RTE (RE_Wide_Wide_String_Write_Blk_IO);
  
*************** package body Exp_Attr is
*** 8540,8552 ****
           return False;
        end if;
  
!       --  Here we are in the integer conversion context
! 
!       --  Very probably we should also recognize the cases of Machine_Rounding
!       --  and unbiased rounding in this conversion context, but the back end is
!       --  not yet prepared to handle these cases ???
  
!       return Id = Attribute_Rounding or else Id = Attribute_Truncation;
     end Is_Inline_Floating_Point_Attribute;
  
  end Exp_Attr;
--- 8446,8458 ----
           return False;
        end if;
  
!       --  Here we are in the integer conversion context. We reuse Rounding for
!       --  Machine_Rounding as System.Fat_Gen, which is a permissible behavior.
  
!       return
!         Id = Attribute_Rounding
!           or else Id = Attribute_Machine_Rounding
!           or else Id = Attribute_Truncation;
     end Is_Inline_Floating_Point_Attribute;
  
  end Exp_Attr;
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_attr.ads gcc-10.1.0/gcc/ada/exp_attr.ads
*** gcc-9.3.0/gcc/ada/exp_attr.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_attr.ads	Thu May  7 10:49:59 2020
*************** package Exp_Attr is
*** 31,34 ****
--- 31,39 ----
  
     procedure Expand_N_Attribute_Reference (N : Node_Id);
  
+    procedure Expand_Size_Attribute (N : Node_Id);
+    --  Handles part of the expansion of attributes 'Object_Size, 'Size,
+    --  'Value_Size, and 'VADS_Size, so that it can also be used in the special
+    --  expansion in GNATprove mode.
+ 
  end Exp_Attr;
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_ch11.adb gcc-10.1.0/gcc/ada/exp_ch11.adb
*** gcc-9.3.0/gcc/ada/exp_ch11.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_ch11.adb	Thu May  7 10:49:59 2020
*************** package body Exp_Ch11 is
*** 63,72 ****
     --  N is the node on which the warning is placed.
  
     procedure Warn_If_No_Propagation (N : Node_Id);
!    --  Called for an exception raise that is not a local raise (and thus
!    --  cannot be optimized to a goto). Issues warning if
!    --  No_Exception_Propagation restriction is set.
!    --  N is the node for the raise or equivalent call.
  
     ---------------------------
     -- Expand_At_End_Handler --
--- 63,71 ----
     --  N is the node on which the warning is placed.
  
     procedure Warn_If_No_Propagation (N : Node_Id);
!    --  Called for an exception raise that is not a local raise (and thus cannot
!    --  be optimized to a goto). Issues warning if No_Exception_Propagation
!    --  restriction is set. N is the node for the raise or equivalent call.
  
     ---------------------------
     -- Expand_At_End_Handler --
*************** package body Exp_Ch11 is
*** 1308,1315 ****
  
        Append_To (L,
          Make_Character_Literal (Loc,
!           Chars              =>  Name_uA,
!           Char_Literal_Value =>  UI_From_Int (Character'Pos ('A'))));
  
        --  Name_Length component: Nam'Length
  
--- 1307,1314 ----
  
        Append_To (L,
          Make_Character_Literal (Loc,
!           Chars              => Name_uA,
!           Char_Literal_Value => UI_From_Int (Character'Pos ('A'))));
  
        --  Name_Length component: Nam'Length
  
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_ch11.ads gcc-10.1.0/gcc/ada/exp_ch11.ads
*** gcc-9.3.0/gcc/ada/exp_ch11.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_ch11.ads	Thu May  7 10:49:59 2020
*************** package Exp_Ch11 is
*** 70,75 ****
--- 70,77 ----
     --  a goto statement. If Local_Raise is defined, its entity is returned,
     --  if not, Empty is returned (in which case the call is silently skipped).
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Get_RT_Exception_Entity (R : RT_Exception_Code) return Entity_Id;
     --  This function is provided for use by the back end in conjunction with
     --  generation of Local_Raise calls when an exception raise is converted to
*************** package Exp_Ch11 is
*** 77,87 ****
--- 79,93 ----
     --  to determine which Rcheck_nn procedure to call. The returned result is
     --  the exception entity to be passed to Local_Raise.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     procedure Get_RT_Exception_Name (Code : RT_Exception_Code);
     --  This procedure is provided for use by the back end to obtain the name of
     --  the Rcheck procedure for Code. The name is appended to Namet.Name_Buffer
     --  without the __gnat_rcheck_ prefix.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     procedure Possible_Local_Raise (N : Node_Id; E : Entity_Id);
     --  This procedure is called whenever node N might cause the back end
     --  to generate a local raise for a local Constraint/Program/Storage_Error
*************** package Exp_Ch11 is
*** 95,98 ****
--- 101,106 ----
     --  Issues warning if No_Exception_Propagation restriction is set. N is the
     --  node for the handler.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
  end Exp_Ch11;
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_ch13.adb gcc-10.1.0/gcc/ada/exp_ch13.adb
*** gcc-9.3.0/gcc/ada/exp_ch13.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_ch13.adb	Thu May  7 10:49:59 2020
*************** package body Exp_Ch13 is
*** 220,228 ****
              --  task_typeZ := expression
  
              if Ekind (Ent) = E_Task_Type then
                 declare
                    Assign : Node_Id;
- 
                 begin
                    Assign :=
                      Make_Assignment_Statement (Loc,
--- 220,228 ----
              --  task_typeZ := expression
  
              if Ekind (Ent) = E_Task_Type then
+ 
                 declare
                    Assign : Node_Id;
                 begin
                    Assign :=
                      Make_Assignment_Statement (Loc,
*************** package body Exp_Ch13 is
*** 232,238 ****
                          Convert_To (RTE (RE_Size_Type), Expression (N)));
  
                    --  If the clause is not generated by an aspect, insert
!                   --  the assignment here.  Freezing rules ensure that this
                    --  is safe, or clause will have been rejected already.
  
                    if Is_List_Member (N) then
--- 232,238 ----
                          Convert_To (RTE (RE_Size_Type), Expression (N)));
  
                    --  If the clause is not generated by an aspect, insert
!                   --  the assignment here. Freezing rules ensure that this
                    --  is safe, or clause will have been rejected already.
  
                    if Is_List_Member (N) then
*************** package body Exp_Ch13 is
*** 261,275 ****
                      Make_Defining_Identifier (Loc,
                        Chars => New_External_Name (Chars (Ent), 'V'));
  
!                   --  Insert the declaration of the object
  
!                   Insert_Action (N,
!                     Make_Object_Declaration (Loc,
!                       Defining_Identifier => V,
!                       Object_Definition   =>
!                         New_Occurrence_Of (RTE (RE_Storage_Offset), Loc),
!                       Expression          =>
!                         Convert_To (RTE (RE_Storage_Offset), Expression (N))));
  
                    Set_Storage_Size_Variable (Ent, Entity_Id (V));
                 end if;
--- 261,295 ----
                      Make_Defining_Identifier (Loc,
                        Chars => New_External_Name (Chars (Ent), 'V'));
  
!                   --  Insert the declaration of the object. If the expression
!                   --  is not static it may depend on some other type that is
!                   --  not frozen yet, so attach the declaration that captures
!                   --  the value of the expression to the actions of the freeze
!                   --  node of the current type.
  
!                   declare
!                      Decl : constant Node_Id :=
!                        Make_Object_Declaration (Loc,
!                          Defining_Identifier => V,
!                          Object_Definition   =>
!                            New_Occurrence_Of (RTE (RE_Storage_Offset), Loc),
!                          Expression          =>
!                            Convert_To
!                              (RTE (RE_Storage_Offset), Expression (N)));
!                   begin
!                      if not Is_OK_Static_Expression (Expression (N))
!                        and then Present (Freeze_Node (Ent))
!                      then
!                         if No (Actions (Freeze_Node (Ent))) then
!                            Set_Actions (Freeze_Node (Ent), New_List (Decl));
!                         else
!                            Append (Decl, Actions (Freeze_Node (Ent)));
!                         end if;
! 
!                      else
!                         Insert_Action (N, Decl);
!                      end if;
!                   end;
  
                    Set_Storage_Size_Variable (Ent, Entity_Id (V));
                 end if;
*************** package body Exp_Ch13 is
*** 724,730 ****
        end if;
  
        --  If the record representation clause has no components, then
!       --  completely remove it.  Note that we also have to remove
        --  ourself from the Rep Item list.
  
        if Is_Empty_List (Component_Clauses (N)) then
--- 744,750 ----
        end if;
  
        --  If the record representation clause has no components, then
!       --  completely remove it. Note that we also have to remove
        --  ourself from the Rep Item list.
  
        if Is_Empty_List (Component_Clauses (N)) then
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_ch3.adb gcc-10.1.0/gcc/ada/exp_ch3.adb
*** gcc-9.3.0/gcc/ada/exp_ch3.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_ch3.adb	Thu May  7 10:49:59 2020
*************** package body Exp_Ch3 is
*** 1555,1577 ****
  
        --  Handle the optionally generated formal *_skip_null_excluding_checks
  
!       if Needs_Conditional_Null_Excluding_Check (Full_Init_Type) then
! 
!          --  Look at the associated node for the object we are referencing
!          --  and verify that we are expanding a call to an Init_Proc for an
!          --  internally generated object declaration before passing True and
!          --  skipping the relevant checks.
! 
!          if Nkind (Id_Ref) in N_Has_Entity
!            and then Comes_From_Source (Associated_Node (Id_Ref))
!          then
!             Append_To (Args, New_Occurrence_Of (Standard_True, Loc));
! 
!          --  Otherwise, we pass False to perform null-excluding checks
  
!          else
!             Append_To (Args, New_Occurrence_Of (Standard_False, Loc));
!          end if;
        end if;
  
        --  Add discriminant values if discriminants are present
--- 1555,1573 ----
  
        --  Handle the optionally generated formal *_skip_null_excluding_checks
  
!       --  Look at the associated node for the object we are referencing and
!       --  verify that we are expanding a call to an Init_Proc for an internally
!       --  generated object declaration before passing True and skipping the
!       --  relevant checks.
  
!       if Needs_Conditional_Null_Excluding_Check (Full_Init_Type)
!         and then Nkind (Id_Ref) in N_Has_Entity
!         and then (Comes_From_Source (Id_Ref)
!                    or else (Present (Associated_Node (Id_Ref))
!                              and then Comes_From_Source
!                                         (Associated_Node (Id_Ref))))
!       then
!          Append_To (Args, New_Occurrence_Of (Standard_True, Loc));
        end if;
  
        --  Add discriminant values if discriminants are present
*************** package body Exp_Ch3 is
*** 1926,1934 ****
  
           --  Adjust the tag if tagged (because of possible view conversions).
           --  Suppress the tag adjustment when not Tagged_Type_Expansion because
!          --  tags are represented implicitly in objects.
  
!          if Is_Tagged_Type (Typ) and then Tagged_Type_Expansion then
              Append_To (Res,
                Make_Assignment_Statement (Default_Loc,
                  Name       =>
--- 1922,1936 ----
  
           --  Adjust the tag if tagged (because of possible view conversions).
           --  Suppress the tag adjustment when not Tagged_Type_Expansion because
!          --  tags are represented implicitly in objects, and when the record is
!          --  initialized with a raise expression.
  
!          if Is_Tagged_Type (Typ)
!            and then Tagged_Type_Expansion
!            and then Nkind (Exp) /= N_Raise_Expression
!            and then (Nkind (Exp) /= N_Qualified_Expression
!                        or else Nkind (Expression (Exp)) /= N_Raise_Expression)
!          then
              Append_To (Res,
                Make_Assignment_Statement (Default_Loc,
                  Name       =>
*************** package body Exp_Ch3 is
*** 4852,4858 ****
                 Make_Range (Sloc (Enumeration_Rep_Expr (Ent)),
                   Low_Bound =>
                     Make_Integer_Literal (Loc,
!                     Intval =>  Enumeration_Rep (Ent)),
                   High_Bound =>
                     Make_Integer_Literal (Loc, Intval => Last_Repval))),
  
--- 4854,4860 ----
                 Make_Range (Sloc (Enumeration_Rep_Expr (Ent)),
                   Low_Bound =>
                     Make_Integer_Literal (Loc,
!                     Intval => Enumeration_Rep (Ent)),
                   High_Bound =>
                     Make_Integer_Literal (Loc, Intval => Last_Repval))),
  
*************** package body Exp_Ch3 is
*** 5522,5528 ****
           --  Note: This code covers access-to-limited-interfaces because they
           --        can be used to reference tasks implementing them.
  
!          elsif Is_Limited_Class_Wide_Type (Desig_Typ)
             and then Tasking_Allowed
           then
              Build_Class_Wide_Master (Ptr_Typ);
--- 5524,5537 ----
           --  Note: This code covers access-to-limited-interfaces because they
           --        can be used to reference tasks implementing them.
  
!          --  Suppress the master creation for access types created for entry
!          --  formal parameters (parameter block component types). Seems like
!          --  suppression should be more general for compiler-generated types,
!          --  but testing Comes_From_Source, like the code above does, may be
!          --  too general in this case (affects some test output)???
! 
!          elsif not Is_Param_Block_Component_Type (Ptr_Typ)
!            and then Is_Limited_Class_Wide_Type (Desig_Typ)
             and then Tasking_Allowed
           then
              Build_Class_Wide_Master (Ptr_Typ);
*************** package body Exp_Ch3 is
*** 6309,6315 ****
        -------------------------
  
        function Rewrite_As_Renaming return Boolean is
!       begin
           --  If the object declaration appears in the form
  
           --    Obj : Ctrl_Typ := Func (...);
--- 6318,6325 ----
        -------------------------
  
        function Rewrite_As_Renaming return Boolean is
!          Result : constant Boolean :=
! 
           --  If the object declaration appears in the form
  
           --    Obj : Ctrl_Typ := Func (...);
*************** package body Exp_Ch3 is
*** 6325,6338 ****
           --  would otherwise make two copies. The RM allows removing redunant
           --  Adjust/Finalize calls, but does not allow insertion of extra ones.
  
!          --  This part is disabled for now, because it breaks GPS builds
  
!          return (False -- ???
!              and then Nkind (Expr_Q) = N_Explicit_Dereference
!              and then not Comes_From_Source (Expr_Q)
!              and then Nkind (Original_Node (Expr_Q)) = N_Function_Call
!              and then Nkind (Object_Definition (N)) in N_Has_Entity
!              and then (Needs_Finalization (Entity (Object_Definition (N)))))
  
             --  If the initializing expression is for a variable with attribute
             --  OK_To_Rename set, then transform:
--- 6335,6349 ----
           --  would otherwise make two copies. The RM allows removing redunant
           --  Adjust/Finalize calls, but does not allow insertion of extra ones.
  
!          --  This part is disabled for now, because it breaks GNAT Studio
!          --  builds
  
!          (False -- ???
!             and then Nkind (Expr_Q) = N_Explicit_Dereference
!             and then not Comes_From_Source (Expr_Q)
!             and then Nkind (Original_Node (Expr_Q)) = N_Function_Call
!             and then Nkind (Object_Definition (N)) in N_Has_Entity
!             and then (Needs_Finalization (Entity (Object_Definition (N)))))
  
             --  If the initializing expression is for a variable with attribute
             --  OK_To_Rename set, then transform:
*************** package body Exp_Ch3 is
*** 6353,6358 ****
--- 6364,6377 ----
                 and then Ekind (Entity (Expr_Q)) = E_Variable
                 and then OK_To_Rename (Entity (Expr_Q))
                 and then Is_Entity_Name (Obj_Def));
+       begin
+          --  Return False if there are any aspect specifications, because
+          --  otherwise we duplicate that corresponding implicit attribute
+          --  definition, and call Insert_Action, which has no place to insert
+          --  the attribute definition. The attribute definition is stored in
+          --  Aspect_Rep_Item, which is not a list.
+ 
+          return Result and then No (Aspect_Specifications (N));
        end Rewrite_As_Renaming;
  
        --  Local variables
*************** package body Exp_Ch3 is
*** 8695,8700 ****
--- 8714,8720 ----
                 Make_Defining_Identifier (Loc,
                   New_External_Name (Chars
                     (Component_Type (Typ)), "_skip_null_excluding_check")),
+              Expression          => New_Occurrence_Of (Standard_False, Loc),
               In_Present          => True,
               Parameter_Type      =>
                 New_Occurrence_Of (Standard_Boolean, Loc)));
*************** package body Exp_Ch3 is
*** 9480,9493 ****
  
     --  or a null statement if the list L is empty
  
     function Make_Eq_If
       (E : Entity_Id;
        L : List_Id) return Node_Id
     is
!       Loc        : constant Source_Ptr := Sloc (E);
        C          : Node_Id;
-       Field_Name : Name_Id;
        Cond       : Node_Id;
  
     begin
        if No (L) then
--- 9500,9521 ----
  
     --  or a null statement if the list L is empty
  
+    --  Equality may be user-defined for a given component type, in which case
+    --  a function call is constructed instead of an operator node. This is an
+    --  Ada 2012 change in the composability of equality for untagged composite
+    --  types.
+ 
     function Make_Eq_If
       (E : Entity_Id;
        L : List_Id) return Node_Id
     is
!       Loc : constant Source_Ptr := Sloc (E);
! 
        C          : Node_Id;
        Cond       : Node_Id;
+       Field_Name : Name_Id;
+       Next_Test  : Node_Id;
+       Typ        : Entity_Id;
  
     begin
        if No (L) then
*************** package body Exp_Ch3 is
*** 9498,9503 ****
--- 9526,9532 ----
  
           C := First_Non_Pragma (L);
           while Present (C) loop
+             Typ        := Etype (Defining_Identifier (C));
              Field_Name := Chars (Defining_Identifier (C));
  
              --  The tags must not be compared: they are not part of the value.
*************** package body Exp_Ch3 is
*** 9510,9531 ****
              --  discriminants could be picked up in the private type case.
  
              if Field_Name = Name_uParent
!               and then Is_Interface (Etype (Defining_Identifier (C)))
              then
                 null;
  
              elsif Field_Name /= Name_uTag then
!                Evolve_Or_Else (Cond,
!                  Make_Op_Ne (Loc,
!                    Left_Opnd =>
!                      Make_Selected_Component (Loc,
!                        Prefix        => Make_Identifier (Loc, Name_X),
!                        Selector_Name => Make_Identifier (Loc, Field_Name)),
  
!                    Right_Opnd =>
!                      Make_Selected_Component (Loc,
!                        Prefix        => Make_Identifier (Loc, Name_Y),
!                        Selector_Name => Make_Identifier (Loc, Field_Name))));
              end if;
  
              Next_Non_Pragma (C);
--- 9539,9593 ----
              --  discriminants could be picked up in the private type case.
  
              if Field_Name = Name_uParent
!               and then Is_Interface (Typ)
              then
                 null;
  
              elsif Field_Name /= Name_uTag then
!                declare
!                   Lhs : constant Node_Id :=
!                     Make_Selected_Component (Loc,
!                       Prefix        => Make_Identifier (Loc, Name_X),
!                       Selector_Name => Make_Identifier (Loc, Field_Name));
  
!                   Rhs : constant Node_Id :=
!                     Make_Selected_Component (Loc,
!                       Prefix        => Make_Identifier (Loc, Name_Y),
!                       Selector_Name => Make_Identifier (Loc, Field_Name));
!                   Eq_Call : Node_Id;
! 
!                begin
!                   --  Build equality code with a user-defined operator, if
!                   --  available, and with the predefined "=" otherwise. For
!                   --  compatibility with older Ada versions, and preserve the
!                   --  workings of some ASIS tools, we also use the predefined
!                   --  operation if the component-type equality is abstract,
!                   --  rather than raising Program_Error.
! 
!                   if Ada_Version < Ada_2012 then
!                      Next_Test := Make_Op_Ne (Loc, Lhs, Rhs);
! 
!                   else
!                      Eq_Call := Build_Eq_Call (Typ, Loc, Lhs, Rhs);
! 
!                      if No (Eq_Call) then
!                         Next_Test := Make_Op_Ne (Loc, Lhs, Rhs);
! 
!                      --  If a component has a defined abstract equality, its
!                      --  application raises Program_Error on that component
!                      --  and therefore on the current variant.
! 
!                      elsif Nkind (Eq_Call) = N_Raise_Program_Error then
!                         Set_Etype (Eq_Call, Standard_Boolean);
!                         Next_Test := Make_Op_Not (Loc, Eq_Call);
! 
!                      else
!                         Next_Test := Make_Op_Not (Loc, Eq_Call);
!                      end if;
!                   end if;
!                end;
! 
!                Evolve_Or_Else (Cond, Next_Test);
              end if;
  
              Next_Non_Pragma (C);
*************** package body Exp_Ch3 is
*** 10274,10281 ****
               Result_Definition        => New_Occurrence_Of (Ret_Type, Loc));
        end if;
  
        if Is_Interface (Tag_Typ) then
!          return Make_Abstract_Subprogram_Declaration (Loc, Spec);
  
        --  If body case, return empty subprogram body. Note that this is ill-
        --  formed, because there is not even a null statement, and certainly not
--- 10336,10359 ----
               Result_Definition        => New_Occurrence_Of (Ret_Type, Loc));
        end if;
  
+       --  Declare an abstract subprogram for primitive subprograms of an
+       --  interface type (except for "=").
+ 
        if Is_Interface (Tag_Typ) then
!          if Name /= Name_Op_Eq then
!             return Make_Abstract_Subprogram_Declaration (Loc, Spec);
! 
!          --  The equality function (if any) for an interface type is defined
!          --  to be nonabstract, so we create an expression function for it that
!          --  always returns False. Note that the function can never actually be
!          --  invoked because interface types are abstract, so there aren't any
!          --  objects of such types (and their equality operation will always
!          --  dispatch).
! 
!          else
!             return Make_Expression_Function
!                      (Loc, Spec, New_Occurrence_Of (Standard_False, Loc));
!          end if;
  
        --  If body case, return empty subprogram body. Note that this is ill-
        --  formed, because there is not even a null statement, and certainly not
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_ch3.ads gcc-10.1.0/gcc/ada/exp_ch3.ads
*** gcc-9.3.0/gcc/ada/exp_ch3.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_ch3.ads	Thu May  7 10:49:59 2020
*************** package Exp_Ch3 is
*** 102,111 ****
       (Typ  : Entity_Id;
        N    : Node_Id;
        Size : Uint := No_Uint) return Node_Id;
!    --  Build an expression which represents the required initial value of type
     --  Typ for which predicate Needs_Simple_Initialization is True. N is a node
!    --  whose source location used in the construction of the expression. Size
!    --  is utilized as follows:
     --
     --    * If the size of the object to be initialized it is known, it should
     --      be passed to the routine.
--- 102,111 ----
       (Typ  : Entity_Id;
        N    : Node_Id;
        Size : Uint := No_Uint) return Node_Id;
!    --  Build an expression that represents the required initial value of type
     --  Typ for which predicate Needs_Simple_Initialization is True. N is a node
!    --  whose source location is used in the construction of the expression.
!    --  Size is used as follows:
     --
     --    * If the size of the object to be initialized it is known, it should
     --      be passed to the routine.
*************** package Exp_Ch3 is
*** 115,121 ****
     --
     --  The object size is needed to prepare a known invalid value for use by
     --  Normalize_Scalars. A call to this routine where Typ denotes a scalar
!    --  type is only valid when Normalize_Scalars or Initialize_Scalars is
     --  active, or if N is the node for a 'Invalid_Value attribute node.
  
     procedure Init_Secondary_Tags
--- 115,121 ----
     --
     --  The object size is needed to prepare a known invalid value for use by
     --  Normalize_Scalars. A call to this routine where Typ denotes a scalar
!    --  type is valid only when Normalize_Scalars or Initialize_Scalars is
     --  active, or if N is the node for a 'Invalid_Value attribute node.
  
     procedure Init_Secondary_Tags
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_ch4.adb gcc-10.1.0/gcc/ada/exp_ch4.adb
*** gcc-9.3.0/gcc/ada/exp_ch4.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_ch4.adb	Thu May  7 10:49:59 2020
*************** with Ttypes;   use Ttypes;
*** 72,77 ****
--- 72,78 ----
  with Uintp;    use Uintp;
  with Urealp;   use Urealp;
  with Validsw;  use Validsw;
+ with Warnsw;   use Warnsw;
  
  package body Exp_Ch4 is
  
*************** package body Exp_Ch4 is
*** 415,420 ****
--- 416,467 ----
           return;
     end Build_Boolean_Array_Proc_Call;
  
+    -----------------------
+    -- Build_Eq_Call --
+    -----------------------
+ 
+    function Build_Eq_Call
+      (Typ : Entity_Id;
+       Loc : Source_Ptr;
+       Lhs : Node_Id;
+       Rhs : Node_Id) return Node_Id
+    is
+       Prim   : Node_Id;
+       Prim_E : Elmt_Id;
+ 
+    begin
+       Prim_E := First_Elmt (Collect_Primitive_Operations (Typ));
+       while Present (Prim_E) loop
+          Prim := Node (Prim_E);
+ 
+          --  Locate primitive equality with the right signature
+ 
+          if Chars (Prim) = Name_Op_Eq
+            and then Etype (First_Formal (Prim)) =
+                     Etype (Next_Formal (First_Formal (Prim)))
+            and then Etype (Prim) = Standard_Boolean
+          then
+             if Is_Abstract_Subprogram (Prim) then
+                return
+                  Make_Raise_Program_Error (Loc,
+                    Reason => PE_Explicit_Raise);
+ 
+             else
+                return
+                  Make_Function_Call (Loc,
+                    Name                   => New_Occurrence_Of (Prim, Loc),
+                    Parameter_Associations => New_List (Lhs, Rhs));
+             end if;
+          end if;
+ 
+          Next_Elmt (Prim_E);
+       end loop;
+ 
+       --  If not found, predefined operation will be used
+ 
+       return Empty;
+    end Build_Eq_Call;
+ 
     --------------------------------
     -- Displace_Allocator_Pointer --
     --------------------------------
*************** package body Exp_Ch4 is
*** 1535,1541 ****
        Index_List1 : constant List_Id    := New_List;
        Index_List2 : constant List_Id    := New_List;
  
!       Actuals   : List_Id;
        Formals   : List_Id;
        Func_Name : Entity_Id;
        Func_Body : Node_Id;
--- 1582,1588 ----
        Index_List1 : constant List_Id    := New_List;
        Index_List2 : constant List_Id    := New_List;
  
!       First_Idx : Node_Id;
        Formals   : List_Id;
        Func_Name : Entity_Id;
        Func_Body : Node_Id;
*************** package body Exp_Ch4 is
*** 1547,1552 ****
--- 1594,1603 ----
        Rtyp : Entity_Id;
        --  The parameter types to be used for the formals
  
+       New_Lhs : Node_Id;
+       New_Rhs : Node_Id;
+       --  The LHS and RHS converted to the parameter types
+ 
        function Arr_Attr
          (Arr : Entity_Id;
           Nam : Name_Id;
*************** package body Exp_Ch4 is
*** 1805,1811 ****
                      Statements => New_List (Loop_Stm)));
  
           --  If no separate indexes, return loop statement with explicit
!          --  iteration scheme on its own
  
           else
              Loop_Stm :=
--- 1856,1862 ----
                      Statements => New_List (Loop_Stm)));
  
           --  If no separate indexes, return loop statement with explicit
!          --  iteration scheme on its own.
  
           else
              Loop_Stm :=
*************** package body Exp_Ch4 is
*** 1915,1920 ****
--- 1966,2047 ----
           pragma Assert (Ltyp = Rtyp);
        end if;
  
+       --  If the array type is distinct from the type of the arguments, it
+       --  is the full view of a private type. Apply an unchecked conversion
+       --  to ensure that analysis of the code below succeeds.
+ 
+       if No (Etype (Lhs))
+         or else Base_Type (Etype (Lhs)) /= Base_Type (Ltyp)
+       then
+          New_Lhs := OK_Convert_To (Ltyp, Lhs);
+       else
+          New_Lhs := Lhs;
+       end if;
+ 
+       if No (Etype (Rhs))
+         or else Base_Type (Etype (Rhs)) /= Base_Type (Rtyp)
+       then
+          New_Rhs := OK_Convert_To (Rtyp, Rhs);
+       else
+          New_Rhs := Rhs;
+       end if;
+ 
+       First_Idx := First_Index (Ltyp);
+ 
+       --  If optimization is enabled and the array boils down to a couple of
+       --  consecutive elements, generate a simple conjunction of comparisons
+       --  which should be easier to optimize by the code generator.
+ 
+       if Optimization_Level > 0
+         and then Ltyp = Rtyp
+         and then Is_Constrained (Ltyp)
+         and then Number_Dimensions (Ltyp) = 1
+         and then Nkind (First_Idx) = N_Range
+         and then Compile_Time_Known_Value (Low_Bound (First_Idx))
+         and then Compile_Time_Known_Value (High_Bound (First_Idx))
+         and then Expr_Value (High_Bound (First_Idx)) =
+                                          Expr_Value (Low_Bound (First_Idx)) + 1
+       then
+          declare
+             Ctyp         : constant Entity_Id := Component_Type (Ltyp);
+             L, R         : Node_Id;
+             TestL, TestH : Node_Id;
+             Index_List   : List_Id;
+ 
+          begin
+             Index_List := New_List (New_Copy_Tree (Low_Bound (First_Idx)));
+ 
+             L :=
+               Make_Indexed_Component (Loc,
+                 Prefix      => New_Copy_Tree (New_Lhs),
+                 Expressions => Index_List);
+ 
+             R :=
+               Make_Indexed_Component (Loc,
+                 Prefix      => New_Copy_Tree (New_Rhs),
+                 Expressions => Index_List);
+ 
+             TestL := Expand_Composite_Equality (Nod, Ctyp, L, R, Bodies);
+ 
+             Index_List := New_List (New_Copy_Tree (High_Bound (First_Idx)));
+ 
+             L :=
+               Make_Indexed_Component (Loc,
+                 Prefix      => New_Lhs,
+                 Expressions => Index_List);
+ 
+             R :=
+               Make_Indexed_Component (Loc,
+                 Prefix      => New_Rhs,
+                 Expressions => Index_List);
+ 
+             TestH := Expand_Composite_Equality (Nod, Ctyp, L, R, Bodies);
+ 
+             return
+               Make_And_Then (Loc, Left_Opnd => TestL, Right_Opnd => TestH);
+          end;
+       end if;
+ 
        --  Build list of formals for function
  
        Formals := New_List (
*************** package body Exp_Ch4 is
*** 1938,1944 ****
                Parameter_Specifications => Formals,
                Result_Definition => New_Occurrence_Of (Standard_Boolean, Loc)),
  
!           Declarations =>  Decls,
  
            Handled_Statement_Sequence =>
              Make_Handled_Sequence_Of_Statements (Loc,
--- 2065,2071 ----
                Parameter_Specifications => Formals,
                Result_Definition => New_Occurrence_Of (Standard_Boolean, Loc)),
  
!           Declarations => Decls,
  
            Handled_Statement_Sequence =>
              Make_Handled_Sequence_Of_Statements (Loc,
*************** package body Exp_Ch4 is
*** 1957,2002 ****
                      Make_Simple_Return_Statement (Loc,
                        Expression => New_Occurrence_Of (Standard_False, Loc)))),
  
!                 Handle_One_Dimension (1, First_Index (Ltyp)),
  
                  Make_Simple_Return_Statement (Loc,
                    Expression => New_Occurrence_Of (Standard_True, Loc)))));
  
!          Set_Has_Completion (Func_Name, True);
!          Set_Is_Inlined (Func_Name);
! 
!          --  If the array type is distinct from the type of the arguments, it
!          --  is the full view of a private type. Apply an unchecked conversion
!          --  to insure that analysis of the call succeeds.
! 
!          declare
!             L, R : Node_Id;
! 
!          begin
!             L := Lhs;
!             R := Rhs;
! 
!             if No (Etype (Lhs))
!               or else Base_Type (Etype (Lhs)) /= Base_Type (Ltyp)
!             then
!                L := OK_Convert_To (Ltyp, Lhs);
!             end if;
! 
!             if No (Etype (Rhs))
!               or else Base_Type (Etype (Rhs)) /= Base_Type (Rtyp)
!             then
!                R := OK_Convert_To (Rtyp, Rhs);
!             end if;
! 
!             Actuals := New_List (L, R);
!          end;
  
!          Append_To (Bodies, Func_Body);
  
!          return
!            Make_Function_Call (Loc,
!              Name                   => New_Occurrence_Of (Func_Name, Loc),
!              Parameter_Associations => Actuals);
     end Expand_Array_Equality;
  
     -----------------------------
--- 2084,2103 ----
                      Make_Simple_Return_Statement (Loc,
                        Expression => New_Occurrence_Of (Standard_False, Loc)))),
  
!                 Handle_One_Dimension (1, First_Idx),
  
                  Make_Simple_Return_Statement (Loc,
                    Expression => New_Occurrence_Of (Standard_True, Loc)))));
  
!       Set_Has_Completion (Func_Name, True);
!       Set_Is_Inlined (Func_Name);
  
!       Append_To (Bodies, Func_Body);
  
!       return
!         Make_Function_Call (Loc,
!           Name                   => New_Occurrence_Of (Func_Name, Loc),
!           Parameter_Associations => New_List (New_Lhs, New_Rhs));
     end Expand_Array_Equality;
  
     -----------------------------
*************** package body Exp_Ch4 is
*** 2338,2389 ****
        Full_Type : Entity_Id;
        Eq_Op     : Entity_Id;
  
-       function Find_Primitive_Eq return Node_Id;
-       --  AI05-0123: Locate primitive equality for type if it exists, and
-       --  build the corresponding call. If operation is abstract, replace
-       --  call with an explicit raise. Return Empty if there is no primitive.
- 
-       -----------------------
-       -- Find_Primitive_Eq --
-       -----------------------
- 
-       function Find_Primitive_Eq return Node_Id is
-          Prim_E : Elmt_Id;
-          Prim   : Node_Id;
- 
-       begin
-          Prim_E := First_Elmt (Collect_Primitive_Operations (Typ));
-          while Present (Prim_E) loop
-             Prim := Node (Prim_E);
- 
-             --  Locate primitive equality with the right signature
- 
-             if Chars (Prim) = Name_Op_Eq
-               and then Etype (First_Formal (Prim)) =
-                        Etype (Next_Formal (First_Formal (Prim)))
-               and then Etype (Prim) = Standard_Boolean
-             then
-                if Is_Abstract_Subprogram (Prim) then
-                   return
-                     Make_Raise_Program_Error (Loc,
-                       Reason => PE_Explicit_Raise);
- 
-                else
-                   return
-                     Make_Function_Call (Loc,
-                       Name                   => New_Occurrence_Of (Prim, Loc),
-                       Parameter_Associations => New_List (Lhs, Rhs));
-                end if;
-             end if;
- 
-             Next_Elmt (Prim_E);
-          end loop;
- 
-          --  If not found, predefined operation will be used
- 
-          return Empty;
-       end Find_Primitive_Eq;
- 
     --  Start of processing for Expand_Composite_Equality
  
     begin
--- 2439,2444 ----
*************** package body Exp_Ch4 is
*** 2654,2660 ****
              --  a primitive equality declared for it.
  
              declare
!                Op : constant Node_Id := Find_Primitive_Eq;
  
              begin
                 --  Use user-defined primitive if it exists, otherwise use
--- 2709,2715 ----
              --  a primitive equality declared for it.
  
              declare
!                Op : constant Node_Id := Build_Eq_Call (Typ, Loc, Lhs, Rhs);
  
              begin
                 --  Use user-defined primitive if it exists, otherwise use
*************** package body Exp_Ch4 is
*** 2756,2762 ****
        --  The J'th entry in an expression node that represents the total length
        --  of operands 1 through J. It is either an integer literal node, or a
        --  reference to a constant entity with the right value, so it is fine
!       --  to just do a Copy_Node to get an appropriate copy. The extra zero'th
        --  entry always is set to zero. The length is of type Artyp.
  
        Low_Bound : Node_Id;
--- 2811,2817 ----
        --  The J'th entry in an expression node that represents the total length
        --  of operands 1 through J. It is either an integer literal node, or a
        --  reference to a constant entity with the right value, so it is fine
!       --  to just do a Copy_Node to get an appropriate copy. The extra zeroth
        --  entry always is set to zero. The length is of type Artyp.
  
        Low_Bound : Node_Id;
*************** package body Exp_Ch4 is
*** 4248,4256 ****
  
        function Size_In_Storage_Elements (E : Entity_Id) return Node_Id;
        --  Given a constrained array type E, returns a node representing the
!       --  code to compute the size in storage elements for the given type.
!       --  This is done without using the attribute (which malfunctions for
!       --  large sizes ???)
  
        -------------------------
        -- Rewrite_Coextension --
--- 4303,4314 ----
  
        function Size_In_Storage_Elements (E : Entity_Id) return Node_Id;
        --  Given a constrained array type E, returns a node representing the
!       --  code to compute a close approximation of the size in storage elements
!       --  for the given type; for indexes that are modular types we compute
!       --  'Last - First (instead of 'Length) because for large arrays computing
!       --  'Last -'First + 1 causes overflow. This is done without using the
!       --  attribute 'Size_In_Storage_Elements (which malfunctions for large
!       --  sizes ???).
  
        -------------------------
        -- Rewrite_Coextension --
*************** package body Exp_Ch4 is
*** 4309,4325 ****
           --  just a fraction of a storage element???
  
           declare
              Len : Node_Id;
              Res : Node_Id;
              pragma Warnings (Off, Res);
  
           begin
              for J in 1 .. Number_Dimensions (E) loop
!                Len :=
!                  Make_Attribute_Reference (Loc,
!                    Prefix         => New_Occurrence_Of (E, Loc),
!                    Attribute_Name => Name_Length,
!                    Expressions    => New_List (Make_Integer_Literal (Loc, J)));
  
                 if J = 1 then
                    Res := Len;
--- 4367,4443 ----
           --  just a fraction of a storage element???
  
           declare
+             Idx : Node_Id := First_Index (E);
              Len : Node_Id;
              Res : Node_Id;
              pragma Warnings (Off, Res);
  
           begin
              for J in 1 .. Number_Dimensions (E) loop
! 
!                if not Is_Modular_Integer_Type (Etype (Idx)) then
!                   Len :=
!                     Make_Attribute_Reference (Loc,
!                       Prefix         => New_Occurrence_Of (E, Loc),
!                       Attribute_Name => Name_Length,
!                       Expressions    => New_List
!                                           (Make_Integer_Literal (Loc, J)));
! 
!                --  For indexes that are modular types we cannot generate code
!                --  to compute 'Length since for large arrays 'Last -'First + 1
!                --  causes overflow; therefore we compute 'Last - 'First (which
!                --  is not the exact number of components but it is valid for
!                --  the purpose of this runtime check on 32-bit targets).
! 
!                else
!                   declare
!                      Len_Minus_1_Expr : Node_Id;
!                      Test_Gt          : Node_Id;
! 
!                   begin
!                      Test_Gt :=
!                        Make_Op_Gt (Loc,
!                          Make_Attribute_Reference (Loc,
!                            Prefix         => New_Occurrence_Of (E, Loc),
!                            Attribute_Name => Name_Last,
!                            Expressions    =>
!                              New_List (Make_Integer_Literal (Loc, J))),
!                          Make_Attribute_Reference (Loc,
!                            Prefix         => New_Occurrence_Of (E, Loc),
!                            Attribute_Name => Name_First,
!                            Expressions    =>
!                              New_List (Make_Integer_Literal (Loc, J))));
! 
!                      Len_Minus_1_Expr :=
!                        Convert_To (Standard_Unsigned,
!                          Make_Op_Subtract (Loc,
!                            Make_Attribute_Reference (Loc,
!                              Prefix => New_Occurrence_Of (E, Loc),
!                              Attribute_Name => Name_Last,
!                              Expressions =>
!                                New_List
!                                  (Make_Integer_Literal (Loc, J))),
!                            Make_Attribute_Reference (Loc,
!                              Prefix => New_Occurrence_Of (E, Loc),
!                              Attribute_Name => Name_First,
!                              Expressions =>
!                                New_List
!                                  (Make_Integer_Literal (Loc, J)))));
! 
!                      --  Handle superflat arrays, i.e. arrays with such bounds
!                      --  as 4 .. 2, to ensure that the result is correct.
! 
!                      --  Generate:
!                      --    (if X'Last > X'First then X'Last - X'First else 0)
! 
!                      Len :=
!                        Make_If_Expression (Loc,
!                          Expressions => New_List (
!                            Test_Gt,
!                            Len_Minus_1_Expr,
!                            Make_Integer_Literal (Loc, Uint_0)));
!                   end;
!                end if;
  
                 if J = 1 then
                    Res := Len;
*************** package body Exp_Ch4 is
*** 4330,4335 ****
--- 4448,4455 ----
                        Left_Opnd  => Res,
                        Right_Opnd => Len);
                 end if;
+ 
+                Next_Index (Idx);
              end loop;
  
              return
*************** package body Exp_Ch4 is
*** 4354,4359 ****
--- 4474,4491 ----
     --  Start of processing for Expand_N_Allocator
  
     begin
+       --  Warn on the presence of an allocator of an anonymous access type when
+       --  enabled, except when it's an object declaration at library level.
+ 
+       if Warn_On_Anonymous_Allocators
+         and then Ekind (PtrT) = E_Anonymous_Access_Type
+         and then not (Is_Library_Level_Entity (PtrT)
+                        and then Nkind (Associated_Node_For_Itype (PtrT)) =
+                                   N_Object_Declaration)
+       then
+          Error_Msg_N ("?use of an anonymous access type allocator", N);
+       end if;
+ 
        --  RM E.2.3(22). We enforce that the expected type of an allocator
        --  shall not be a remote access-to-class-wide-limited-private type
  
*************** package body Exp_Ch4 is
*** 4563,4577 ****
           --  apply the check for constrained arrays, and manually compute the
           --  value of the attribute ???
  
!          if Is_Array_Type (Etyp) and then Is_Constrained (Etyp) then
!             Insert_Action (N,
!               Make_Raise_Storage_Error (Loc,
!                 Condition =>
!                   Make_Op_Gt (Loc,
!                     Left_Opnd  => Size_In_Storage_Elements (Etyp),
!                     Right_Opnd =>
!                       Make_Integer_Literal (Loc, Uint_7 * (Uint_2 ** 29))),
!                 Reason    => SE_Object_Too_Large));
           end if;
        end if;
  
--- 4695,4777 ----
           --  apply the check for constrained arrays, and manually compute the
           --  value of the attribute ???
  
!          --  The check on No_Initialization is used here to prevent generating
!          --  this runtime check twice when the allocator is locally replaced by
!          --  the expander with another one.
! 
!          if Is_Array_Type (Etyp) and then not No_Initialization (N) then
!             declare
!                Cond    : Node_Id;
!                Ins_Nod : Node_Id   := N;
!                Siz_Typ : Entity_Id := Etyp;
!                Expr    : Node_Id;
! 
!             begin
!                --  For unconstrained array types initialized with a qualified
!                --  expression we use its type to perform this check
! 
!                if not Is_Constrained (Etyp)
!                  and then not No_Initialization (N)
!                  and then Nkind (Expression (N)) = N_Qualified_Expression
!                then
!                   Expr    := Expression (Expression (N));
!                   Siz_Typ := Etype (Expression (Expression (N)));
! 
!                   --  If the qualified expression has been moved to an internal
!                   --  temporary (to remove side effects) then we must insert
!                   --  the runtime check before its declaration to ensure that
!                   --  the check is performed before the execution of the code
!                   --  computing the qualified expression.
! 
!                   if Nkind (Expr) = N_Identifier
!                     and then Is_Internal_Name (Chars (Expr))
!                     and then
!                       Nkind (Parent (Entity (Expr))) = N_Object_Declaration
!                   then
!                      Ins_Nod := Parent (Entity (Expr));
!                   else
!                      Ins_Nod := Expr;
!                   end if;
!                end if;
! 
!                if Is_Constrained (Siz_Typ)
!                  and then Ekind (Siz_Typ) /= E_String_Literal_Subtype
!                then
!                   --  For CCG targets, the largest array may have up to 2**31-1
!                   --  components (i.e. 2 gigabytes if each array component is
!                   --  one byte). This ensures that fat pointer fields do not
!                   --  overflow, since they are 32-bit integer types, and also
!                   --  ensures that 'Length can be computed at run time.
! 
!                   if Modify_Tree_For_C then
!                      Cond :=
!                        Make_Op_Gt (Loc,
!                          Left_Opnd  => Size_In_Storage_Elements (Siz_Typ),
!                          Right_Opnd => Make_Integer_Literal (Loc,
!                                          Uint_2 ** 31 - Uint_1));
! 
!                   --  For native targets the largest object is 3.5 gigabytes
! 
!                   else
!                      Cond :=
!                        Make_Op_Gt (Loc,
!                          Left_Opnd  => Size_In_Storage_Elements (Siz_Typ),
!                          Right_Opnd => Make_Integer_Literal (Loc,
!                                          Uint_7 * (Uint_2 ** 29)));
!                   end if;
! 
!                   Insert_Action (Ins_Nod,
!                     Make_Raise_Storage_Error (Loc,
!                       Condition => Cond,
!                       Reason    => SE_Object_Too_Large));
! 
!                   if Entity (Cond) = Standard_True then
!                      Error_Msg_N
!                        ("object too large: Storage_Error will be raised at "
!                         & "run time??", N);
!                   end if;
!                end if;
!             end;
           end if;
        end if;
  
*************** package body Exp_Ch4 is
*** 4751,4756 ****
--- 4951,4959 ----
  
           --  Case of initialization procedure present, must be called
  
+          --  NOTE: There is a *huge* amount of code duplication here from
+          --  Build_Initialization_Call. We should probably refactor???
+ 
           else
              Check_Restriction (No_Default_Initialization, N);
  
*************** package body Exp_Ch4 is
*** 5074,5080 ****
     ------------------------------
  
     procedure Expand_N_Case_Expression (N : Node_Id) is
- 
        function Is_Copy_Type (Typ : Entity_Id) return Boolean;
        --  Return True if we can copy objects of this type when expanding a case
        --  expression.
--- 5277,5282 ----
*************** package body Exp_Ch4 is
*** 5093,5099 ****
               or else
                 (Minimize_Expression_With_Actions
                   and then Is_Constrained (Underlying_Type (Typ))
!                  and then not Is_Limited_View (Underlying_Type (Typ)));
        end Is_Copy_Type;
  
        --  Local variables
--- 5295,5301 ----
               or else
                 (Minimize_Expression_With_Actions
                   and then Is_Constrained (Underlying_Type (Typ))
!                  and then not Is_Limited_Type (Underlying_Type (Typ)));
        end Is_Copy_Type;
  
        --  Local variables
*************** package body Exp_Ch4 is
*** 5270,5275 ****
--- 5472,5478 ----
           declare
              Alt_Expr : Node_Id             := Expression (Alt);
              Alt_Loc  : constant Source_Ptr := Sloc (Alt_Expr);
+             LHS      : Node_Id;
              Stmts    : List_Id;
  
           begin
*************** package body Exp_Ch4 is
*** 5299,5307 ****
              --    Target := AX['Unrestricted_Access];
  
              else
                 Stmts := New_List (
                   Make_Assignment_Statement (Alt_Loc,
!                    Name       => New_Occurrence_Of (Target, Loc),
                     Expression => Alt_Expr));
              end if;
  
--- 5502,5513 ----
              --    Target := AX['Unrestricted_Access];
  
              else
+                LHS := New_Occurrence_Of (Target, Loc);
+                Set_Assignment_OK (LHS);
+ 
                 Stmts := New_List (
                   Make_Assignment_Statement (Alt_Loc,
!                    Name       => LHS,
                     Expression => Alt_Expr));
              end if;
  
*************** package body Exp_Ch4 is
*** 6123,6128 ****
--- 6329,6338 ----
                --  Similarly, do not rewrite membership as a validity check if
                --  within the predicate function for the type.
  
+               --  Finally, if the original bounds are type conversions, even
+               --  if they have been folded into constants, there are different
+               --  types involved and 'Valid is not appropriate.
+ 
              then
                 if In_Instance
                   or else (Ekind (Current_Scope) = E_Function
*************** package body Exp_Ch4 is
*** 6130,6135 ****
--- 6340,6350 ----
                 then
                    null;
  
+                elsif Nkind (Lo_Orig) = N_Type_Conversion
+                  or else Nkind (Hi_Orig) = N_Type_Conversion
+                then
+                   null;
+ 
                 else
                    Substitute_Valid_Check;
                    goto Leave;
*************** package body Exp_Ch4 is
*** 6759,6765 ****
        --    Renaming objects in renaming associations
        --      This case is handled when a use of the renamed variable occurs
  
!       --    Actual parameters for a procedure call
        --      This case is handled in Exp_Ch6.Expand_Actuals
  
        --    The second expression in a 'Read attribute reference
--- 6974,6980 ----
        --    Renaming objects in renaming associations
        --      This case is handled when a use of the renamed variable occurs
  
!       --    Actual parameters for a subprogram call
        --      This case is handled in Exp_Ch6.Expand_Actuals
  
        --    The second expression in a 'Read attribute reference
*************** package body Exp_Ch4 is
*** 6780,6790 ****
              if Nkind (Parnt) = N_Unchecked_Expression then
                 null;
  
!             elsif Nkind_In (Parnt, N_Object_Renaming_Declaration,
!                                    N_Procedure_Call_Statement)
                or else (Nkind (Parnt) = N_Parameter_Association
!                         and then
!                           Nkind (Parent (Parnt)) = N_Procedure_Call_Statement)
              then
                 return;
  
--- 6995,7006 ----
              if Nkind (Parnt) = N_Unchecked_Expression then
                 null;
  
!             elsif Nkind (Parnt) = N_Object_Renaming_Declaration then
!                return;
! 
!             elsif Nkind (Parnt) in N_Subprogram_Call
                or else (Nkind (Parnt) = N_Parameter_Association
!                         and then Nkind (Parent (Parnt)) in N_Subprogram_Call)
              then
                 return;
  
*************** package body Exp_Ch4 is
*** 7304,7313 ****
--- 7520,7540 ----
        --  build and analyze call, adding conversions if the operation is
        --  inherited.
  
+       function Is_Equality (Subp : Entity_Id;
+                             Typ  : Entity_Id := Empty) return Boolean;
+       --  Determine whether arbitrary Entity_Id denotes a function with the
+       --  right name and profile for an equality op, specifically for the
+       --  base type Typ if Typ is nonempty.
+ 
        function Find_Equality (Prims : Elist_Id) return Entity_Id;
        --  Find a primitive equality function within primitive operation list
        --  Prims.
  
+       function User_Defined_Primitive_Equality_Op
+         (Typ : Entity_Id) return Entity_Id;
+       --  Find a user-defined primitive equality function for a given untagged
+       --  record type, ignoring visibility. Return Empty if no such op found.
+ 
        function Has_Unconstrained_UU_Component (Typ : Entity_Id) return Boolean;
        --  Determines whether a type has a subcomponent of an unconstrained
        --  Unchecked_Union subtype. Typ is a record type.
*************** package body Exp_Ch4 is
*** 7400,7406 ****
                 --     Obj1 : Enclosing_Non_UU_Type;
                 --     Obj2 : Enclosing_Non_UU_Type (1);
  
!                --     ...  Obj1 = Obj2 ...
  
                 --     Generated code:
  
--- 7627,7633 ----
                 --     Obj1 : Enclosing_Non_UU_Type;
                 --     Obj2 : Enclosing_Non_UU_Type (1);
  
!                --     ... Obj1 = Obj2 ...
  
                 --     Generated code:
  
*************** package body Exp_Ch4 is
*** 7556,7561 ****
--- 7783,7825 ----
           Analyze_And_Resolve (N, Standard_Boolean, Suppress => All_Checks);
        end Build_Equality_Call;
  
+       -----------------
+       -- Is_Equality --
+       -----------------
+ 
+       function Is_Equality (Subp : Entity_Id;
+                             Typ  : Entity_Id := Empty) return Boolean is
+          Formal_1 : Entity_Id;
+          Formal_2 : Entity_Id;
+       begin
+          --  The equality function carries name "=", returns Boolean, and has
+          --  exactly two formal parameters of an identical type.
+ 
+          if Ekind (Subp) = E_Function
+            and then Chars (Subp) = Name_Op_Eq
+            and then Base_Type (Etype (Subp)) = Standard_Boolean
+          then
+             Formal_1 := First_Formal (Subp);
+             Formal_2 := Empty;
+ 
+             if Present (Formal_1) then
+                Formal_2 := Next_Formal (Formal_1);
+             end if;
+ 
+             return
+               Present (Formal_1)
+                 and then Present (Formal_2)
+                 and then No (Next_Formal (Formal_2))
+                 and then Base_Type (Etype (Formal_1)) =
+                          Base_Type (Etype (Formal_2))
+                 and then
+                   (not Present (Typ)
+                     or else Implementation_Base_Type (Etype (Formal_1)) = Typ);
+          end if;
+ 
+          return False;
+       end Is_Equality;
+ 
        -------------------
        -- Find_Equality --
        -------------------
*************** package body Exp_Ch4 is
*** 7565,7573 ****
           --  Find an equality in a possible alias chain starting from primitive
           --  operation Prim.
  
-          function Is_Equality (Id : Entity_Id) return Boolean;
-          --  Determine whether arbitrary entity Id denotes an equality
- 
           ---------------------------
           -- Find_Aliased_Equality --
           ---------------------------
--- 7829,7834 ----
*************** package body Exp_Ch4 is
*** 7591,7629 ****
              return Empty;
           end Find_Aliased_Equality;
  
-          -----------------
-          -- Is_Equality --
-          -----------------
- 
-          function Is_Equality (Id : Entity_Id) return Boolean is
-             Formal_1 : Entity_Id;
-             Formal_2 : Entity_Id;
- 
-          begin
-             --  The equality function carries name "=", returns Boolean, and
-             --  has exactly two formal parameters of an identical type.
- 
-             if Ekind (Id) = E_Function
-               and then Chars (Id) = Name_Op_Eq
-               and then Base_Type (Etype (Id)) = Standard_Boolean
-             then
-                Formal_1 := First_Formal (Id);
-                Formal_2 := Empty;
- 
-                if Present (Formal_1) then
-                   Formal_2 := Next_Formal (Formal_1);
-                end if;
- 
-                return
-                  Present (Formal_1)
-                    and then Present (Formal_2)
-                    and then Etype (Formal_1) = Etype (Formal_2)
-                    and then No (Next_Formal (Formal_2));
-             end if;
- 
-             return False;
-          end Is_Equality;
- 
           --  Local variables
  
           Eq_Prim   : Entity_Id;
--- 7852,7857 ----
*************** package body Exp_Ch4 is
*** 7653,7658 ****
--- 7881,7927 ----
           return Eq_Prim;
        end Find_Equality;
  
+       ----------------------------------------
+       -- User_Defined_Primitive_Equality_Op --
+       ----------------------------------------
+ 
+       function User_Defined_Primitive_Equality_Op
+         (Typ : Entity_Id) return Entity_Id
+       is
+          Enclosing_Scope : constant Node_Id := Scope (Typ);
+          E : Entity_Id;
+       begin
+          --  Prune this search by somehow not looking at decls that precede
+          --  the declaration of the first view of Typ (which might be a partial
+          --  view)???
+ 
+          for Private_Entities in Boolean loop
+             if Private_Entities then
+                if Ekind (Enclosing_Scope) /= E_Package then
+                   exit;
+                end if;
+                E := First_Private_Entity (Enclosing_Scope);
+ 
+             else
+                E := First_Entity (Enclosing_Scope);
+             end if;
+ 
+             while Present (E) loop
+                if Is_Equality (E, Typ) then
+                   return E;
+                end if;
+                E := Next_Entity (E);
+             end loop;
+          end loop;
+ 
+          if Is_Derived_Type (Typ) then
+             return User_Defined_Primitive_Equality_Op
+                      (Implementation_Base_Type (Etype (Typ)));
+          end if;
+ 
+          return Empty;
+       end User_Defined_Primitive_Equality_Op;
+ 
        ------------------------------------
        -- Has_Unconstrained_UU_Component --
        ------------------------------------
*************** package body Exp_Ch4 is
*** 7909,7915 ****
--- 8178,8186 ----
             and then not Is_Floating_Point_Type (Component_Type (Typl))
             and then not Is_Atomic_Or_VFA (Component_Type (Typl))
             and then not Is_Possibly_Unaligned_Object (Lhs)
+            and then not Is_Possibly_Unaligned_Slice (Lhs)
             and then not Is_Possibly_Unaligned_Object (Rhs)
+            and then not Is_Possibly_Unaligned_Slice (Rhs)
             and then Support_Composite_Compare_On_Target
           then
              null;
*************** package body Exp_Ch4 is
*** 7972,7977 ****
--- 8243,8257 ----
                   (Find_Equality (Primitive_Operations (Typl)));
              end if;
  
+          --  See AI12-0101 (which only removes a legality rule) and then
+          --  AI05-0123 (which then applies in the previously illegal case).
+          --  AI12-0101 is a binding interpretation.
+ 
+          elsif Ada_Version >= Ada_2012
+            and then Present (User_Defined_Primitive_Equality_Op (Typl))
+          then
+             Build_Equality_Call (User_Defined_Primitive_Equality_Op (Typl));
+ 
           --  Ada 2005 (AI-216): Program_Error is raised when evaluating the
           --  predefined equality operator for a type which has a subcomponent
           --  of an Unchecked_Union type whose nominal subtype is unconstrained.
*************** package body Exp_Ch4 is
*** 8057,8062 ****
--- 8337,8368 ----
              Insert_Actions      (N, Bodies,           Suppress => All_Checks);
              Analyze_And_Resolve (N, Standard_Boolean, Suppress => All_Checks);
           end if;
+ 
+       --  If unnesting, handle elementary types whose Equivalent_Types are
+       --  records because there may be padding or undefined fields.
+ 
+       elsif Unnest_Subprogram_Mode
+         and then Ekind_In (Typl, E_Class_Wide_Type,
+                                  E_Class_Wide_Subtype,
+                                  E_Access_Subprogram_Type,
+                                  E_Access_Protected_Subprogram_Type,
+                                  E_Anonymous_Access_Protected_Subprogram_Type,
+                                  E_Access_Subprogram_Type,
+                                  E_Exception_Type)
+         and then Present (Equivalent_Type (Typl))
+         and then Is_Record_Type (Equivalent_Type (Typl))
+       then
+          Typl := Equivalent_Type (Typl);
+          Remove_Side_Effects (Lhs);
+          Remove_Side_Effects (Rhs);
+          Rewrite (N,
+            Expand_Record_Equality (N, Typl,
+              Unchecked_Convert_To (Typl, Lhs),
+              Unchecked_Convert_To (Typl, Rhs),
+              Bodies));
+ 
+          Insert_Actions      (N, Bodies,           Suppress => All_Checks);
+          Analyze_And_Resolve (N, Standard_Boolean, Suppress => All_Checks);
        end if;
  
        --  Test if result is known at compile time
*************** package body Exp_Ch4 is
*** 9333,9342 ****
        Typ : constant Entity_Id := Etype (Left_Opnd (N));
  
     begin
!       --  Case of elementary type with standard operator
  
        if Is_Elementary_Type (Typ)
          and then Sloc (Entity (N)) = Standard_Location
        then
           Binary_Op_Validity_Checks (N);
  
--- 9639,9659 ----
        Typ : constant Entity_Id := Etype (Left_Opnd (N));
  
     begin
!       --  Case of elementary type with standard operator. But if unnesting,
!       --  handle elementary types whose Equivalent_Types are records because
!       --  there may be padding or undefined fields.
  
        if Is_Elementary_Type (Typ)
          and then Sloc (Entity (N)) = Standard_Location
+         and then not (Ekind_In (Typ, E_Class_Wide_Type,
+                                 E_Class_Wide_Subtype,
+                                 E_Access_Subprogram_Type,
+                                 E_Access_Protected_Subprogram_Type,
+                                 E_Anonymous_Access_Protected_Subprogram_Type,
+                                 E_Access_Subprogram_Type,
+                                 E_Exception_Type)
+                         and then Present (Equivalent_Type (Typ))
+                         and then Is_Record_Type (Equivalent_Type (Typ)))
        then
           Binary_Op_Validity_Checks (N);
  
*************** package body Exp_Ch4 is
*** 10124,10130 ****
        Apply_Constraint_Check (Operand, Target_Type, No_Sliding => True);
  
        if Do_Range_Check (Operand) then
-          Set_Do_Range_Check (Operand, False);
           Generate_Range_Check (Operand, Target_Type, CE_Range_Check_Failed);
        end if;
     end Expand_N_Qualified_Expression;
--- 10441,10446 ----
*************** package body Exp_Ch4 is
*** 10174,10181 ****
--- 10490,10519 ----
        Flag      : Entity_Id;
        Scheme    : Node_Id;
        Stmts     : List_Id;
+       Var       : Entity_Id;
  
     begin
+       --  Ensure that the bound variable is properly frozen. We must do
+       --  this before expansion because the expression is about to be
+       --  converted into a loop, and resulting freeze nodes may end up
+       --  in the wrong place in the tree.
+ 
+       if Present (Iter_Spec) then
+          Var := Defining_Identifier (Iter_Spec);
+       else
+          Var := Defining_Identifier (Loop_Spec);
+       end if;
+ 
+       declare
+          P : Node_Id := Parent (N);
+       begin
+          while Nkind (P) in N_Subexpr loop
+             P := Parent (P);
+          end loop;
+ 
+          Freeze_Before (P, Etype (Var));
+       end;
+ 
        --  Create the declaration of the flag which tracks the status of the
        --  quantified expression. Generate:
  
*************** package body Exp_Ch4 is
*** 10313,10324 ****
           Insert_Explicit_Dereference (P);
           Analyze_And_Resolve (P, Designated_Type (Ptyp));
  
-          if Ekind (Etype (P)) = E_Private_Subtype
-            and then Is_For_Access_Subtype (Etype (P))
-          then
-             Set_Etype (P, Base_Type (Etype (P)));
-          end if;
- 
           Ptyp := Etype (P);
        end if;
  
--- 10651,10656 ----
*************** package body Exp_Ch4 is
*** 10743,10749 ****
  
        --    5. Prefix of an address attribute (this is an error which is caught
        --       elsewhere, and the expansion would interfere with generating the
!       --       error message).
  
        if not Is_Packed (Typ) then
  
--- 11075,11082 ----
  
        --    5. Prefix of an address attribute (this is an error which is caught
        --       elsewhere, and the expansion would interfere with generating the
!       --       error message) or of a size attribute (because 'Size may change
!       --       when applied to the temporary instead of the slice directly).
  
        if not Is_Packed (Typ) then
  
*************** package body Exp_Ch4 is
*** 10769,10775 ****
           return;
  
        elsif Nkind (Parent (N)) = N_Attribute_Reference
!         and then Attribute_Name (Parent (N)) = Name_Address
        then
           return;
  
--- 11102,11109 ----
           return;
  
        elsif Nkind (Parent (N)) = N_Attribute_Reference
!         and then (Attribute_Name (Parent (N)) = Name_Address
!                    or else Attribute_Name (Parent (N)) = Name_Size)
        then
           return;
  
*************** package body Exp_Ch4 is
*** 10785,10793 ****
     procedure Expand_N_Type_Conversion (N : Node_Id) is
        Loc          : constant Source_Ptr := Sloc (N);
        Operand      : constant Node_Id    := Expression (N);
!       Target_Type  : constant Entity_Id  := Etype (N);
        Operand_Type : Entity_Id           := Etype (Operand);
  
        procedure Handle_Changed_Representation;
        --  This is called in the case of record and array type conversions to
        --  see if there is a change of representation to be handled. Change of
--- 11119,11131 ----
     procedure Expand_N_Type_Conversion (N : Node_Id) is
        Loc          : constant Source_Ptr := Sloc (N);
        Operand      : constant Node_Id    := Expression (N);
!       Operand_Acc  : Node_Id             := Operand;
!       Target_Type  : Entity_Id           := Etype (N);
        Operand_Type : Entity_Id           := Etype (Operand);
  
+       procedure Discrete_Range_Check;
+       --  Handles generation of range check for discrete target value
+ 
        procedure Handle_Changed_Representation;
        --  This is called in the case of record and array type conversions to
        --  see if there is a change of representation to be handled. Change of
*************** package body Exp_Ch4 is
*** 10810,10815 ****
--- 11148,11213 ----
        --  True iff Present (Effective_Extra_Accessibility (Id)) successfully
        --  evaluates to True.
  
+       --------------------------
+       -- Discrete_Range_Check --
+       --------------------------
+ 
+       --  Case of conversions to a discrete type. We let Generate_Range_Check
+       --  do the heavy lifting, after converting a fixed-point operand to an
+       --  appropriate integer type.
+ 
+       procedure Discrete_Range_Check is
+          Expr : Node_Id;
+          Ityp : Entity_Id;
+ 
+       begin
+          --  Nothing to do if conversion was rewritten
+ 
+          if Nkind (N) /= N_Type_Conversion then
+             return;
+          end if;
+ 
+          Expr := Expression (N);
+ 
+          --  Nothing to do if range checks suppressed
+ 
+          if Range_Checks_Suppressed (Target_Type) then
+             return;
+          end if;
+ 
+          --  Nothing to do if expression is an entity on which checks have been
+          --  suppressed.
+ 
+          if Is_Entity_Name (Expr)
+            and then Range_Checks_Suppressed (Entity (Expr))
+          then
+             return;
+          end if;
+ 
+          --  Before we do a range check, we have to deal with treating
+          --  a fixed-point operand as an integer. The way we do this
+          --  is simply to do an unchecked conversion to an appropriate
+          --  integer type large enough to hold the result.
+ 
+          if Is_Fixed_Point_Type (Etype (Expr)) then
+             if Esize (Base_Type (Etype (Expr))) > Esize (Standard_Integer) then
+                Ityp := Standard_Long_Long_Integer;
+             else
+                Ityp := Standard_Integer;
+             end if;
+ 
+             Set_Do_Range_Check (Expr, False);
+             Rewrite (Expr, Unchecked_Convert_To (Ityp, Expr));
+          end if;
+ 
+          --  Reset overflow flag, since the range check will include
+          --  dealing with possible overflow, and generate the check.
+ 
+          Set_Do_Overflow_Check (N, False);
+ 
+          Generate_Range_Check (Expr, Target_Type, CE_Range_Check_Failed);
+       end Discrete_Range_Check;
+ 
        -----------------------------------
        -- Handle_Changed_Representation --
        -----------------------------------
*************** package body Exp_Ch4 is
*** 11014,11037 ****
  
        --     Tnn : typ'Base := typ'Base (x);
        --     [constraint_error when Tnn < typ'First or else Tnn > typ'Last]
!       --     Tnn
  
        --  This is necessary when there is a conversion of integer to float or
        --  to fixed-point to ensure that the correct checks are made. It is not
!       --  necessary for float to float where it is enough to simply set the
!       --  Do_Range_Check flag.
  
        procedure Real_Range_Check is
           Btyp : constant Entity_Id := Base_Type (Target_Type);
           Lo   : constant Node_Id   := Type_Low_Bound  (Target_Type);
           Hi   : constant Node_Id   := Type_High_Bound (Target_Type);
-          Xtyp : constant Entity_Id := Etype (Operand);
  
           Conv   : Node_Id;
           Hi_Arg : Node_Id;
           Hi_Val : Node_Id;
           Lo_Arg : Node_Id;
           Lo_Val : Node_Id;
           Tnn    : Entity_Id;
  
        begin
--- 11412,11435 ----
  
        --     Tnn : typ'Base := typ'Base (x);
        --     [constraint_error when Tnn < typ'First or else Tnn > typ'Last]
!       --     typ (Tnn)
  
        --  This is necessary when there is a conversion of integer to float or
        --  to fixed-point to ensure that the correct checks are made. It is not
!       --  necessary for the float-to-float case where it is enough to just set
!       --  the Do_Range_Check flag on the expression.
  
        procedure Real_Range_Check is
           Btyp : constant Entity_Id := Base_Type (Target_Type);
           Lo   : constant Node_Id   := Type_Low_Bound  (Target_Type);
           Hi   : constant Node_Id   := Type_High_Bound (Target_Type);
  
           Conv   : Node_Id;
           Hi_Arg : Node_Id;
           Hi_Val : Node_Id;
           Lo_Arg : Node_Id;
           Lo_Val : Node_Id;
+          Expr   : Entity_Id;
           Tnn    : Entity_Id;
  
        begin
*************** package body Exp_Ch4 is
*** 11041,11046 ****
--- 11439,11450 ----
              return;
           end if;
  
+          Expr := Expression (N);
+ 
+          --  Clear the flag once for all
+ 
+          Set_Do_Range_Check (Expr, False);
+ 
           --  Nothing to do if range checks suppressed, or target has the same
           --  range as the base type (or is the base type).
  
*************** package body Exp_Ch4 is
*** 11055,11062 ****
           --  Nothing to do if expression is an entity on which checks have been
           --  suppressed.
  
!          if Is_Entity_Name (Operand)
!            and then Range_Checks_Suppressed (Entity (Operand))
           then
              return;
           end if;
--- 11459,11475 ----
           --  Nothing to do if expression is an entity on which checks have been
           --  suppressed.
  
!          if Is_Entity_Name (Expr)
!            and then Range_Checks_Suppressed (Entity (Expr))
!          then
!             return;
!          end if;
! 
!          --  Nothing to do if expression was rewritten into a float-to-float
!          --  conversion, since this kind of conversion is handled elsewhere.
! 
!          if Is_Floating_Point_Type (Etype (Expr))
!            and then Is_Floating_Point_Type (Target_Type)
           then
              return;
           end if;
*************** package body Exp_Ch4 is
*** 11067,11078 ****
           --  not trust it to be in range (might be infinite)
  
           declare
!             S_Lo : constant Node_Id := Type_Low_Bound (Xtyp);
!             S_Hi : constant Node_Id := Type_High_Bound (Xtyp);
  
           begin
!             if (not Is_Floating_Point_Type (Xtyp)
!                  or else Is_Constrained (Xtyp))
                and then Compile_Time_Known_Value (S_Lo)
                and then Compile_Time_Known_Value (S_Hi)
                and then Compile_Time_Known_Value (Hi)
--- 11480,11491 ----
           --  not trust it to be in range (might be infinite)
  
           declare
!             S_Lo : constant Node_Id := Type_Low_Bound (Etype (Expr));
!             S_Hi : constant Node_Id := Type_High_Bound (Etype (Expr));
  
           begin
!             if (not Is_Floating_Point_Type (Etype (Expr))
!                  or else Is_Constrained (Etype (Expr)))
                and then Compile_Time_Known_Value (S_Lo)
                and then Compile_Time_Known_Value (S_Hi)
                and then Compile_Time_Known_Value (Hi)
*************** package body Exp_Ch4 is
*** 11085,11091 ****
                    S_Hiv : Ureal;
  
                 begin
!                   if Is_Real_Type (Xtyp) then
                       S_Lov := Expr_Value_R (S_Lo);
                       S_Hiv := Expr_Value_R (S_Hi);
                    else
--- 11498,11504 ----
                    S_Hiv : Ureal;
  
                 begin
!                   if Is_Real_Type (Etype (Expr)) then
                       S_Lov := Expr_Value_R (S_Lo);
                       S_Hiv := Expr_Value_R (S_Hi);
                    else
*************** package body Exp_Ch4 is
*** 11097,11136 ****
                      and then S_Lov >= D_Lov
                      and then S_Hiv <= D_Hiv
                    then
-                      --  Unset the range check flag on the current value of
-                      --  Expression (N), since the captured Operand may have
-                      --  been rewritten (such as for the case of a conversion
-                      --  to a fixed-point type).
- 
-                      Set_Do_Range_Check (Expression (N), False);
- 
                       return;
                    end if;
                 end;
              end if;
           end;
  
-          --  For float to float conversions, we are done
- 
-          if Is_Floating_Point_Type (Xtyp)
-               and then
-             Is_Floating_Point_Type (Btyp)
-          then
-             return;
-          end if;
- 
           --  Otherwise rewrite the conversion as described above
  
!          Conv := Relocate_Node (N);
!          Rewrite (Subtype_Mark (Conv), New_Occurrence_Of (Btyp, Loc));
!          Set_Etype (Conv, Btyp);
  
!          --  Enable overflow except for case of integer to float conversions,
!          --  where it is never required, since we can never have overflow in
!          --  this case.
  
!          if not Is_Integer_Type (Etype (Operand)) then
!             Enable_Overflow_Check (Conv);
           end if;
  
           Tnn := Make_Temporary (Loc, 'T', Conv);
--- 11510,11538 ----
                      and then S_Lov >= D_Lov
                      and then S_Hiv <= D_Hiv
                    then
                       return;
                    end if;
                 end;
              end if;
           end;
  
           --  Otherwise rewrite the conversion as described above
  
!          Conv := Convert_To (Btyp, Expr);
  
!          --  If a conversion is necessary, then copy the specific flags from
!          --  the original one and also move the Do_Overflow_Check flag since
!          --  this new conversion is to the base type.
  
!          if Nkind (Conv) = N_Type_Conversion then
!             Set_Conversion_OK  (Conv, Conversion_OK  (N));
!             Set_Float_Truncate (Conv, Float_Truncate (N));
!             Set_Rounded_Result (Conv, Rounded_Result (N));
! 
!             if Do_Overflow_Check (N) then
!                Set_Do_Overflow_Check (Conv);
!                Set_Do_Overflow_Check (N, False);
!             end if;
           end if;
  
           Tnn := Make_Temporary (Loc, 'T', Conv);
*************** package body Exp_Ch4 is
*** 11153,11178 ****
           --  in systems where Duration is larger than Long_Integer.
  
           if Is_Ordinary_Fixed_Point_Type (Target_Type)
!            and then Is_Floating_Point_Type (Operand_Type)
!            and then RM_Size (Base_Type (Target_Type)) <=
!                     RM_Size (Standard_Long_Integer)
             and then Nkind (Lo) = N_Real_Literal
             and then Nkind (Hi) = N_Real_Literal
           then
-             --  Find the integer type of the right size to perform an unchecked
-             --  conversion to the target fixed-point type.
- 
              declare
!                Bfx_Type : constant Entity_Id := Base_Type (Target_Type);
!                Expr_Id  : constant Entity_Id :=
!                             Make_Temporary (Loc, 'T', Conv);
                 Int_Type : Entity_Id;
  
              begin
!                if RM_Size (Bfx_Type) > RM_Size (Standard_Integer) then
                    Int_Type := Standard_Long_Integer;
  
!                elsif RM_Size (Bfx_Type) > RM_Size (Standard_Short_Integer) then
                    Int_Type := Standard_Integer;
  
                 else
--- 11555,11577 ----
           --  in systems where Duration is larger than Long_Integer.
  
           if Is_Ordinary_Fixed_Point_Type (Target_Type)
!            and then Is_Floating_Point_Type (Etype (Expr))
!            and then RM_Size (Btyp) <= RM_Size (Standard_Long_Integer)
             and then Nkind (Lo) = N_Real_Literal
             and then Nkind (Hi) = N_Real_Literal
           then
              declare
!                Expr_Id : constant Entity_Id := Make_Temporary (Loc, 'T', Conv);
                 Int_Type : Entity_Id;
  
              begin
!                --  Find an integer type of the appropriate size to perform an
!                --  unchecked conversion to the target fixed-point type.
! 
!                if RM_Size (Btyp) > RM_Size (Standard_Integer) then
                    Int_Type := Standard_Long_Integer;
  
!                elsif RM_Size (Btyp) > RM_Size (Standard_Short_Integer) then
                    Int_Type := Standard_Integer;
  
                 else
*************** package body Exp_Ch4 is
*** 11180,11188 ****
                 end if;
  
                 --  Generate a temporary with the integer value. Required in the
!                --  CCG compiler to ensure that runtime checks reference this
                 --  integer expression (instead of the resulting fixed-point
!                --  value) because fixed-point values are handled by means of
                 --  unsigned integer types).
  
                 Insert_Action (N,
--- 11579,11587 ----
                 end if;
  
                 --  Generate a temporary with the integer value. Required in the
!                --  CCG compiler to ensure that run-time checks reference this
                 --  integer expression (instead of the resulting fixed-point
!                --  value because fixed-point values are handled by means of
                 --  unsigned integer types).
  
                 Insert_Action (N,
*************** package body Exp_Ch4 is
*** 11235,11241 ****
                  Attribute_Name => Name_Last);
           end if;
  
!          --  Build code for range checking
  
           Insert_Actions (N, New_List (
             Make_Object_Declaration (Loc,
--- 11634,11641 ----
                  Attribute_Name => Name_Last);
           end if;
  
!          --  Build code for range checking. Note that checks are suppressed
!          --  here since we don't want a recursive range check popping up.
  
           Insert_Actions (N, New_List (
             Make_Object_Declaration (Loc,
*************** package body Exp_Ch4 is
*** 11256,11265 ****
                    Make_Op_Gt (Loc,
                      Left_Opnd  => Hi_Arg,
                      Right_Opnd => Hi_Val)),
!               Reason   => CE_Range_Check_Failed)));
  
!          Rewrite (N, New_Occurrence_Of (Tnn, Loc));
!          Analyze_And_Resolve (N, Btyp);
        end Real_Range_Check;
  
        -----------------------------
--- 11656,11665 ----
                    Make_Op_Gt (Loc,
                      Left_Opnd  => Hi_Arg,
                      Right_Opnd => Hi_Val)),
!               Reason   => CE_Range_Check_Failed)),
!            Suppress => All_Checks);
  
!          Rewrite (Expr, New_Occurrence_Of (Tnn, Loc));
        end Real_Range_Check;
  
        -----------------------------
*************** package body Exp_Ch4 is
*** 11437,11442 ****
--- 11837,11851 ----
        --  Case of converting to an access type
  
        if Is_Access_Type (Target_Type) then
+          --  In terms of accessibility rules, an anonymous access discriminant
+          --  is not considered separate from its parent object.
+ 
+          if Nkind (Operand) = N_Selected_Component
+            and then Ekind (Entity (Selector_Name (Operand))) = E_Discriminant
+            and then Ekind (Operand_Type) = E_Anonymous_Access_Type
+          then
+             Operand_Acc := Original_Node (Prefix (Operand));
+          end if;
  
           --  If this type conversion was internally generated by the front end
           --  to displace the pointer to the object to reference an interface
*************** package body Exp_Ch4 is
*** 11460,11473 ****
           --  other checks may still need to be applied below (such as tagged
           --  type checks).
  
!          elsif Is_Entity_Name (Operand)
!            and then Has_Extra_Accessibility (Entity (Operand))
!            and then Ekind (Etype (Operand)) = E_Anonymous_Access_Type
             and then (Nkind (Original_Node (N)) /= N_Attribute_Reference
                        or else Attribute_Name (Original_Node (N)) = Name_Access)
           then
              if not Comes_From_Source (N)
                and then Nkind_In (Parent (N), N_Function_Call,
                                               N_Procedure_Call_Statement)
                and then Is_Interface (Designated_Type (Target_Type))
                and then Is_Class_Wide_Type (Designated_Type (Target_Type))
--- 11869,11883 ----
           --  other checks may still need to be applied below (such as tagged
           --  type checks).
  
!          elsif Is_Entity_Name (Operand_Acc)
!            and then Has_Extra_Accessibility (Entity (Operand_Acc))
!            and then Ekind (Etype (Operand_Acc)) = E_Anonymous_Access_Type
             and then (Nkind (Original_Node (N)) /= N_Attribute_Reference
                        or else Attribute_Name (Original_Node (N)) = Name_Access)
           then
              if not Comes_From_Source (N)
                and then Nkind_In (Parent (N), N_Function_Call,
+                                              N_Parameter_Association,
                                               N_Procedure_Call_Statement)
                and then Is_Interface (Designated_Type (Target_Type))
                and then Is_Class_Wide_Type (Designated_Type (Target_Type))
*************** package body Exp_Ch4 is
*** 11476,11482 ****
  
              else
                 Apply_Accessibility_Check
!                  (Operand, Target_Type, Insert_Node => Operand);
              end if;
  
           --  If the level of the operand type is statically deeper than the
--- 11886,11892 ----
  
              else
                 Apply_Accessibility_Check
!                  (Operand_Acc, Target_Type, Insert_Node => Operand);
              end if;
  
           --  If the level of the operand type is statically deeper than the
*************** package body Exp_Ch4 is
*** 11492,11498 ****
             --  The case where the target type is an anonymous access type of
             --  a discriminant is excluded, because the level of such a type
             --  depends on the context and currently the level returned for such
!            --  types is zero, resulting in warnings about about check failures
             --  in certain legal cases involving class-wide interfaces as the
             --  designated type (some cases, such as return statements, are
             --  checked at run time, but not clear if these are handled right
--- 11902,11908 ----
             --  The case where the target type is an anonymous access type of
             --  a discriminant is excluded, because the level of such a type
             --  depends on the context and currently the level returned for such
!            --  types is zero, resulting in warnings about check failures
             --  in certain legal cases involving class-wide interfaces as the
             --  designated type (some cases, such as return statements, are
             --  checked at run time, but not clear if these are handled right
*************** package body Exp_Ch4 is
*** 11750,11780 ****
           then
              Set_Rounded_Result (N);
              Set_Etype (N, Etype (Parent (N)));
           end if;
  
!          --  Otherwise do correct fixed-conversion, but skip these if the
!          --  Conversion_OK flag is set, because from a semantic point of view
!          --  these are simple integer conversions needing no further processing
!          --  (the backend will simply treat them as integers).
! 
!          if not Conversion_OK (N) then
!             if Is_Fixed_Point_Type (Etype (N)) then
!                Expand_Convert_Fixed_To_Fixed (N);
!                Real_Range_Check;
! 
!             elsif Is_Integer_Type (Etype (N)) then
!                Expand_Convert_Fixed_To_Integer (N);
! 
!                --  The result of the conversion might need a range check, so do
!                --  not assume that the result is in bounds.
  
!                Set_Etype (N, Base_Type (Target_Type));
  
!             else
!                pragma Assert (Is_Floating_Point_Type (Etype (N)));
!                Expand_Convert_Fixed_To_Float (N);
!                Real_Range_Check;
!             end if;
           end if;
  
        --  Case of conversions to a fixed-point type
--- 12160,12180 ----
           then
              Set_Rounded_Result (N);
              Set_Etype (N, Etype (Parent (N)));
+             Target_Type := Etype (N);
           end if;
  
!          if Is_Fixed_Point_Type (Target_Type) then
!             Expand_Convert_Fixed_To_Fixed (N);
!             Real_Range_Check;
  
!          elsif Is_Integer_Type (Target_Type) then
!             Expand_Convert_Fixed_To_Integer (N);
!             Discrete_Range_Check;
  
!          else
!             pragma Assert (Is_Floating_Point_Type (Target_Type));
!             Expand_Convert_Fixed_To_Float (N);
!             Real_Range_Check;
           end if;
  
        --  Case of conversions to a fixed-point type
*************** package body Exp_Ch4 is
*** 11796,11837 ****
              Real_Range_Check;
           end if;
  
-       --  Case of float-to-integer conversions
- 
-       --  We also handle float-to-fixed conversions with Conversion_OK set
-       --  since semantically the fixed-point target is treated as though it
-       --  were an integer in such cases.
- 
-       elsif Is_Floating_Point_Type (Operand_Type)
-         and then
-           (Is_Integer_Type (Target_Type)
-             or else
-           (Is_Fixed_Point_Type (Target_Type) and then Conversion_OK (N)))
-       then
-          --  One more check here, gcc is still not able to do conversions of
-          --  this type with proper overflow checking, and so gigi is doing an
-          --  approximation of what is required by doing floating-point compares
-          --  with the end-point. But that can lose precision in some cases, and
-          --  give a wrong result. Converting the operand to Universal_Real is
-          --  helpful, but still does not catch all cases with 64-bit integers
-          --  on targets with only 64-bit floats.
- 
-          --  The above comment seems obsoleted by Apply_Float_Conversion_Check
-          --  Can this code be removed ???
- 
-          if Do_Range_Check (Operand) then
-             Rewrite (Operand,
-               Make_Type_Conversion (Loc,
-                 Subtype_Mark =>
-                   New_Occurrence_Of (Universal_Real, Loc),
-                 Expression =>
-                   Relocate_Node (Operand)));
- 
-             Set_Etype (Operand, Universal_Real);
-             Enable_Range_Check (Operand);
-             Set_Do_Range_Check (Expression (Operand), False);
-          end if;
- 
        --  Case of array conversions
  
        --  Expansion of array conversions, add required length/range checks but
--- 12196,12201 ----
*************** package body Exp_Ch4 is
*** 11914,11924 ****
  
              Analyze_And_Resolve (N, Target_Type);
           end if;
- 
-       --  Case of conversions to floating-point
- 
-       elsif Is_Floating_Point_Type (Target_Type) then
-          Real_Range_Check;
        end if;
  
        --  At this stage, either the conversion node has been transformed into
--- 12278,12283 ----
*************** package body Exp_Ch4 is
*** 11936,12015 ****
        --  Check: are these rules stated in sinfo??? if so, why restate here???
  
        --  The only remaining step is to generate a range check if we still have
!       --  a type conversion at this stage and Do_Range_Check is set. For now we
!       --  do this only for conversions of discrete types and for float-to-float
!       --  conversions.
! 
!       if Nkind (N) = N_Type_Conversion then
  
!          --  For now we only support floating-point cases where both source
!          --  and target are floating-point types. Conversions where the source
!          --  and target involve integer or fixed-point types are still TBD,
!          --  though not clear whether those can even happen at this point, due
!          --  to transformations above. ???
  
!          if Is_Floating_Point_Type (Etype (N))
             and then Is_Floating_Point_Type (Etype (Expression (N)))
           then
!             if Do_Range_Check (Expression (N))
!               and then Is_Floating_Point_Type (Target_Type)
!             then
!                Generate_Range_Check
!                  (Expression (N), Target_Type, CE_Range_Check_Failed);
!             end if;
! 
!          --  Discrete-to-discrete conversions
! 
!          elsif Is_Discrete_Type (Etype (N)) then
!             declare
!                Expr : constant Node_Id := Expression (N);
!                Ftyp : Entity_Id;
!                Ityp : Entity_Id;
! 
!             begin
!                if Do_Range_Check (Expr)
!                  and then Is_Discrete_Type (Etype (Expr))
!                then
!                   Set_Do_Range_Check (Expr, False);
! 
!                   --  Before we do a range check, we have to deal with treating
!                   --  a fixed-point operand as an integer. The way we do this
!                   --  is simply to do an unchecked conversion to an appropriate
!                   --  integer type large enough to hold the result.
  
!                   --  This code is not active yet, because we are only dealing
!                   --  with discrete types so far ???
  
!                   if Nkind (Expr) in N_Has_Treat_Fixed_As_Integer
!                     and then Treat_Fixed_As_Integer (Expr)
!                   then
!                      Ftyp := Base_Type (Etype (Expr));
  
!                      if Esize (Ftyp) >= Esize (Standard_Integer) then
!                         Ityp := Standard_Long_Long_Integer;
!                      else
!                         Ityp := Standard_Integer;
!                      end if;
  
!                      Rewrite (Expr, Unchecked_Convert_To (Ityp, Expr));
!                   end if;
  
!                   --  Reset overflow flag, since the range check will include
!                   --  dealing with possible overflow, and generate the check.
!                   --  If Address is either a source type or target type,
!                   --  suppress range check to avoid typing anomalies when
!                   --  it is a visible integer type.
  
!                   Set_Do_Overflow_Check (N, False);
  
!                   if not Is_Descendant_Of_Address (Etype (Expr))
!                     and then not Is_Descendant_Of_Address (Target_Type)
!                   then
!                      Generate_Range_Check
!                        (Expr, Target_Type, CE_Range_Check_Failed);
!                   end if;
!                end if;
!             end;
           end if;
        end if;
  
--- 12295,12348 ----
        --  Check: are these rules stated in sinfo??? if so, why restate here???
  
        --  The only remaining step is to generate a range check if we still have
!       --  a type conversion at this stage and Do_Range_Check is set. Note that
!       --  we need to deal with at most 8 out of the 9 possible cases of numeric
!       --  conversions here, because the float-to-integer case is entirely dealt
!       --  with by Apply_Float_Conversion_Check.
  
!       if Nkind (N) = N_Type_Conversion
!         and then Do_Range_Check (Expression (N))
!       then
!          --  Float-to-float conversions
  
!          if Is_Floating_Point_Type (Target_Type)
             and then Is_Floating_Point_Type (Etype (Expression (N)))
           then
!             --  Reset overflow flag, since the range check will include
!             --  dealing with possible overflow, and generate the check.
  
!             Set_Do_Overflow_Check (N, False);
  
!             Generate_Range_Check
!               (Expression (N), Target_Type, CE_Range_Check_Failed);
  
!          --  Discrete-to-discrete conversions or fixed-point-to-discrete
!          --  conversions when Conversion_OK is set.
  
!          elsif Is_Discrete_Type (Target_Type)
!            and then (Is_Discrete_Type (Etype (Expression (N)))
!                       or else (Is_Fixed_Point_Type (Etype (Expression (N)))
!                                 and then Conversion_OK (N)))
!          then
!             --  If Address is either a source type or target type,
!             --  suppress range check to avoid typing anomalies when
!             --  it is a visible integer type.
  
!             if Is_Descendant_Of_Address (Etype (Expression (N)))
!               or else Is_Descendant_Of_Address (Target_Type)
!             then
!                Set_Do_Range_Check (Expression (N), False);
!             else
!                Discrete_Range_Check;
!             end if;
  
!          --  Conversions to floating- or fixed-point when Conversion_OK is set
  
!          elsif Is_Floating_Point_Type (Target_Type)
!            or else (Is_Fixed_Point_Type (Target_Type)
!                      and then Conversion_OK (N))
!          then
!             Real_Range_Check;
           end if;
        end if;
  
*************** package body Exp_Ch4 is
*** 12032,12041 ****
  
           begin
              --  Avoid infinite recursion on the subsequent expansion of
!             --  of the copy of the original type conversion.
  
              Set_Comes_From_Source (New_Expr, False);
!             Insert_Action (N, Make_Predicate_Check (Target_Type, New_Expr));
           end;
        end if;
     end Expand_N_Type_Conversion;
--- 12365,12377 ----
  
           begin
              --  Avoid infinite recursion on the subsequent expansion of
!             --  of the copy of the original type conversion. When needed,
!             --  a range check has already been applied to the expression.
  
              Set_Comes_From_Source (New_Expr, False);
!             Insert_Action (N,
!                Make_Predicate_Check (Target_Type, New_Expr),
!                Suppress => Range_Check);
           end;
        end if;
     end Expand_N_Type_Conversion;
*************** package body Exp_Ch4 is
*** 12046,12053 ****
  
     --  Remove the unchecked expression node from the tree. Its job was simply
     --  to make sure that its constituent expression was handled with checks
!    --  off, and now that that is done, we can remove it from the tree, and
!    --  indeed must, since Gigi does not expect to see these nodes.
  
     procedure Expand_N_Unchecked_Expression (N : Node_Id) is
        Exp : constant Node_Id := Expression (N);
--- 12382,12389 ----
  
     --  Remove the unchecked expression node from the tree. Its job was simply
     --  to make sure that its constituent expression was handled with checks
!    --  off, and now that is done, we can remove it from the tree, and indeed
!    --  must, since Gigi does not expect to see these nodes.
  
     procedure Expand_N_Unchecked_Expression (N : Node_Id) is
        Exp : constant Node_Id := Expression (N);
*************** package body Exp_Ch4 is
*** 12135,12140 ****
--- 12471,12497 ----
           end;
        end if;
  
+       --  Generate an extra temporary for cases unsupported by the C backend
+ 
+       if Modify_Tree_For_C then
+          declare
+             Source     : constant Node_Id := Unqual_Conv (Expression (N));
+             Source_Typ : Entity_Id        := Get_Full_View (Etype (Source));
+ 
+          begin
+             if Is_Packed_Array (Source_Typ) then
+                Source_Typ := Packed_Array_Impl_Type (Source_Typ);
+             end if;
+ 
+             if Nkind (Source) = N_Function_Call
+               and then (Is_Composite_Type (Etype (Source))
+                           or else Is_Composite_Type (Target_Type))
+             then
+                Force_Evaluation (Source);
+             end if;
+          end;
+       end if;
+ 
        --  Nothing to do if conversion is safe
  
        if Safe_Unchecked_Type_Conversion (N) then
*************** package body Exp_Ch4 is
*** 12391,12396 ****
--- 12748,12757 ----
        --  For Opnd a boolean expression, return a Boolean expression equivalent
        --  to Opnd /= Shortcut_Value.
  
+       function Useful (Actions : List_Id) return Boolean;
+       --  Return True if Actions is not empty and contains useful nodes to
+       --  process.
+ 
        --------------------
        -- Make_Test_Expr --
        --------------------
*************** package body Exp_Ch4 is
*** 12404,12409 ****
--- 12765,12795 ----
           end if;
        end Make_Test_Expr;
  
+       ------------
+       -- Useful --
+       ------------
+ 
+       function Useful (Actions : List_Id) return Boolean is
+          L : Node_Id;
+       begin
+          if Present (Actions) then
+             L := First (Actions);
+ 
+             --  For now "useful" means not N_Variable_Reference_Marker.
+             --  Consider stripping other nodes in the future.
+ 
+             while Present (L) loop
+                if Nkind (L) /= N_Variable_Reference_Marker then
+                   return True;
+                end if;
+ 
+                Next (L);
+             end loop;
+          end if;
+ 
+          return False;
+       end Useful;
+ 
        --  Local variables
  
        Op_Var : Entity_Id;
*************** package body Exp_Ch4 is
*** 12463,12469 ****
        --  must only be executed if the right operand of the short circuit is
        --  executed and not otherwise.
  
!       if Present (Actions (N)) then
           Actlist := Actions (N);
  
           --  The old approach is to expand:
--- 12849,12855 ----
        --  must only be executed if the right operand of the short circuit is
        --  executed and not otherwise.
  
!       if Useful (Actions (N)) then
           Actlist := Actions (N);
  
           --  The old approach is to expand:
*************** package body Exp_Ch4 is
*** 12567,12573 ****
        Adjust_Result_Type (N, Typ);
     end Expand_Short_Circuit_Operator;
  
!    -------------------------------------
     -- Fixup_Universal_Fixed_Operation --
     -------------------------------------
  
--- 12953,12959 ----
        Adjust_Result_Type (N, Typ);
     end Expand_Short_Circuit_Operator;
  
!    ------------------------------------
     -- Fixup_Universal_Fixed_Operation --
     -------------------------------------
  
*************** package body Exp_Ch4 is
*** 12587,12599 ****
        if Nkind (Parent (Conv)) = N_Attribute_Reference
          and then Attribute_Name (Parent (Conv)) = Name_Round
        then
!          Set_Etype (N, Etype (Parent (Conv)));
           Set_Rounded_Result (N);
  
        --  Normal case where type comes from conversion above us
  
        else
!          Set_Etype (N, Etype (Conv));
        end if;
     end Fixup_Universal_Fixed_Operation;
  
--- 12973,12985 ----
        if Nkind (Parent (Conv)) = N_Attribute_Reference
          and then Attribute_Name (Parent (Conv)) = Name_Round
        then
!          Set_Etype (N, Base_Type (Etype (Parent (Conv))));
           Set_Rounded_Result (N);
  
        --  Normal case where type comes from conversion above us
  
        else
!          Set_Etype (N, Base_Type (Etype (Conv)));
        end if;
     end Fixup_Universal_Fixed_Operation;
  
*************** package body Exp_Ch4 is
*** 14122,14128 ****
           --    Obj1 in DT'Class;     --  Compile time error
           --    Obj1 in Iface'Class;  --  Compile time error
  
!          if not Is_Class_Wide_Type (Left_Type)
             and then (Is_Ancestor (Etype (Right_Type), Left_Type,
                                    Use_Full_View => True)
                        or else (Is_Interface (Etype (Right_Type))
--- 14508,14515 ----
           --    Obj1 in DT'Class;     --  Compile time error
           --    Obj1 in Iface'Class;  --  Compile time error
  
!          if not Is_Interface (Left_Type)
!            and then not Is_Class_Wide_Type (Left_Type)
             and then (Is_Ancestor (Etype (Right_Type), Left_Type,
                                    Use_Full_View => True)
                        or else (Is_Interface (Etype (Right_Type))
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_ch4.ads gcc-10.1.0/gcc/ada/exp_ch4.ads
*** gcc-9.3.0/gcc/ada/exp_ch4.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_ch4.ads	Thu May  7 10:49:59 2020
*************** package Exp_Ch4 is
*** 74,86 ****
     procedure Expand_N_Unchecked_Expression        (N : Node_Id);
     procedure Expand_N_Unchecked_Type_Conversion   (N : Node_Id);
  
     function Expand_Record_Equality
       (Nod    : Node_Id;
        Typ    : Entity_Id;
        Lhs    : Node_Id;
        Rhs    : Node_Id;
!       Bodies : List_Id)
!       return Node_Id;
     --  Expand a record equality into an expression that compares the fields
     --  individually to yield the required Boolean result. Loc is the
     --  location for the generated nodes. Typ is the type of the record, and
--- 74,99 ----
     procedure Expand_N_Unchecked_Expression        (N : Node_Id);
     procedure Expand_N_Unchecked_Type_Conversion   (N : Node_Id);
  
+    function Build_Eq_Call
+      (Typ : Entity_Id;
+       Loc : Source_Ptr;
+       Lhs : Node_Id;
+       Rhs : Node_Id) return Node_Id;
+    --  AI05-0123: Locate primitive equality for type if it exists, and build
+    --  the corresponding call. If operation is abstract, replace call with
+    --  an explicit raise. Return Empty if there is no primitive.
+    --  Used in the construction of record-equality routines for records here
+    --  and for variant records in exp_ch3.adb. These two paths are distinct
+    --  for historical but also technical reasons: for variant records the
+    --  constructed function includes a case statement with nested returns,
+    --  while for records without variants only a simple expression is needed.
+ 
     function Expand_Record_Equality
       (Nod    : Node_Id;
        Typ    : Entity_Id;
        Lhs    : Node_Id;
        Rhs    : Node_Id;
!       Bodies : List_Id) return Node_Id;
     --  Expand a record equality into an expression that compares the fields
     --  individually to yield the required Boolean result. Loc is the
     --  location for the generated nodes. Typ is the type of the record, and
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_ch5.adb gcc-10.1.0/gcc/ada/exp_ch5.adb
*** gcc-9.3.0/gcc/ada/exp_ch5.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_ch5.adb	Thu May  7 10:49:59 2020
*************** package body Exp_Ch5 is
*** 114,119 ****
--- 114,141 ----
     --  Auxiliary declarations are inserted before node N using the standard
     --  Insert_Actions mechanism.
  
+    function Expand_Assign_Array_Bitfield
+      (N      : Node_Id;
+       Larray : Entity_Id;
+       Rarray : Entity_Id;
+       L_Type : Entity_Id;
+       R_Type : Entity_Id;
+       Rev    : Boolean) return Node_Id;
+    --  Alternative to Expand_Assign_Array_Loop for packed bitfields. Generates
+    --  a call to the System.Bitfields.Copy_Bitfield, which is more efficient
+    --  than copying component-by-component.
+ 
+    function Expand_Assign_Array_Loop_Or_Bitfield
+      (N      : Node_Id;
+       Larray : Entity_Id;
+       Rarray : Entity_Id;
+       L_Type : Entity_Id;
+       R_Type : Entity_Id;
+       Ndim   : Pos;
+       Rev    : Boolean) return Node_Id;
+    --  Calls either Expand_Assign_Array_Loop or Expand_Assign_Array_Bitfield as
+    --  appropriate.
+ 
     procedure Expand_Assign_Record (N : Node_Id);
     --  N is an assignment of an untagged record value. This routine handles
     --  the case where the assignment must be made component by component,
*************** package body Exp_Ch5 is
*** 314,319 ****
--- 336,345 ----
  
        Crep : constant Boolean := Change_Of_Representation (N);
  
+       pragma Assert
+         (Crep
+           or else Is_Bit_Packed_Array (L_Type) = Is_Bit_Packed_Array (R_Type));
+ 
        Larray  : Node_Id;
        Rarray  : Node_Id;
  
*************** package body Exp_Ch5 is
*** 939,945 ****
  
              else
                 Rewrite (N,
!                  Expand_Assign_Array_Loop
                     (N, Larray, Rarray, L_Type, R_Type, Ndim,
                      Rev => not Forwards_OK (N)));
              end if;
--- 965,971 ----
  
              else
                 Rewrite (N,
!                  Expand_Assign_Array_Loop_Or_Bitfield
                     (N, Larray, Rarray, L_Type, R_Type, Ndim,
                      Rev => not Forwards_OK (N)));
              end if;
*************** package body Exp_Ch5 is
*** 1039,1046 ****
                 end if;
  
                 --  Reset the Analyzed flag, because the bounds of the index
!                --  type itself may be universal, and must must be reanalyzed
!                --  to acquire the proper type for the back end.
  
                 Set_Analyzed (Cleft_Lo, False);
                 Set_Analyzed (Cright_Lo, False);
--- 1065,1072 ----
                 end if;
  
                 --  Reset the Analyzed flag, because the bounds of the index
!                --  type itself may be universal, and must be reanalyzed to
!                --  acquire the proper type for the back end.
  
                 Set_Analyzed (Cleft_Lo, False);
                 Set_Analyzed (Cright_Lo, False);
*************** package body Exp_Ch5 is
*** 1092,1103 ****
                     Condition => Condition,
  
                     Then_Statements => New_List (
!                      Expand_Assign_Array_Loop
                        (N, Larray, Rarray, L_Type, R_Type, Ndim,
                         Rev => False)),
  
                     Else_Statements => New_List (
!                      Expand_Assign_Array_Loop
                        (N, Larray, Rarray, L_Type, R_Type, Ndim,
                         Rev => True))));
              end if;
--- 1118,1129 ----
                     Condition => Condition,
  
                     Then_Statements => New_List (
!                      Expand_Assign_Array_Loop_Or_Bitfield
                        (N, Larray, Rarray, L_Type, R_Type, Ndim,
                         Rev => False)),
  
                     Else_Statements => New_List (
!                      Expand_Assign_Array_Loop_Or_Bitfield
                        (N, Larray, Rarray, L_Type, R_Type, Ndim,
                         Rev => True))));
              end if;
*************** package body Exp_Ch5 is
*** 1320,1325 ****
--- 1346,1503 ----
        return Assign;
     end Expand_Assign_Array_Loop;
  
+    ----------------------------------
+    -- Expand_Assign_Array_Bitfield --
+    ----------------------------------
+ 
+    function Expand_Assign_Array_Bitfield
+      (N      : Node_Id;
+       Larray : Entity_Id;
+       Rarray : Entity_Id;
+       L_Type : Entity_Id;
+       R_Type : Entity_Id;
+       Rev    : Boolean) return Node_Id
+    is
+       pragma Assert (not Rev);
+       --  Reverse copying is not yet supported by Copy_Bitfield.
+ 
+       pragma Assert (not Change_Of_Representation (N));
+       --  This won't work, for example, to copy a packed array to an unpacked
+       --  array.
+ 
+       Loc  : constant Source_Ptr := Sloc (N);
+ 
+       L_Index_Typ : constant Node_Id := Etype (First_Index (L_Type));
+       R_Index_Typ : constant Node_Id := Etype (First_Index (R_Type));
+       Left_Lo  : constant Node_Id := Type_Low_Bound  (L_Index_Typ);
+       Right_Lo : constant Node_Id := Type_Low_Bound  (R_Index_Typ);
+ 
+       L_Addr : constant Node_Id :=
+         Make_Attribute_Reference (Loc,
+           Prefix =>
+             Make_Indexed_Component (Loc,
+               Prefix =>
+                 Duplicate_Subexpr (Larray, True),
+               Expressions => New_List (New_Copy_Tree (Left_Lo))),
+           Attribute_Name => Name_Address);
+ 
+       L_Bit : constant Node_Id :=
+         Make_Attribute_Reference (Loc,
+           Prefix =>
+             Make_Indexed_Component (Loc,
+               Prefix =>
+                 Duplicate_Subexpr (Larray, True),
+               Expressions => New_List (New_Copy_Tree (Left_Lo))),
+           Attribute_Name => Name_Bit);
+ 
+       R_Addr : constant Node_Id :=
+         Make_Attribute_Reference (Loc,
+           Prefix =>
+             Make_Indexed_Component (Loc,
+               Prefix =>
+                 Duplicate_Subexpr (Rarray, True),
+               Expressions => New_List (New_Copy_Tree (Right_Lo))),
+           Attribute_Name => Name_Address);
+ 
+       R_Bit : constant Node_Id :=
+         Make_Attribute_Reference (Loc,
+           Prefix =>
+             Make_Indexed_Component (Loc,
+               Prefix =>
+                 Duplicate_Subexpr (Rarray, True),
+               Expressions => New_List (New_Copy_Tree (Right_Lo))),
+           Attribute_Name => Name_Bit);
+ 
+       --  Compute the Size of the bitfield
+ 
+       --  Note that the length check has already been done, so we can use the
+       --  size of either L or R; they are equal. We can't use 'Size here,
+       --  because sometimes bit fields get copied into a temp, and the 'Size
+       --  ends up being the size of the temp (e.g. an 8-bit temp containing
+       --  a 4-bit bit field).
+ 
+       Size : constant Node_Id :=
+         Make_Op_Multiply (Loc,
+           Make_Attribute_Reference (Loc,
+             Prefix =>
+               Duplicate_Subexpr (Name (N), True),
+             Attribute_Name => Name_Length),
+           Make_Attribute_Reference (Loc,
+             Prefix =>
+               Duplicate_Subexpr (Name (N), True),
+             Attribute_Name => Name_Component_Size));
+ 
+    begin
+       return Make_Procedure_Call_Statement (Loc,
+         Name => New_Occurrence_Of (RTE (RE_Copy_Bitfield), Loc),
+         Parameter_Associations => New_List (
+           R_Addr, R_Bit, L_Addr, L_Bit, Size));
+    end Expand_Assign_Array_Bitfield;
+ 
+    ------------------------------------------
+    -- Expand_Assign_Array_Loop_Or_Bitfield --
+    ------------------------------------------
+ 
+    function Expand_Assign_Array_Loop_Or_Bitfield
+      (N      : Node_Id;
+       Larray : Entity_Id;
+       Rarray : Entity_Id;
+       L_Type : Entity_Id;
+       R_Type : Entity_Id;
+       Ndim   : Pos;
+       Rev    : Boolean) return Node_Id
+    is
+       Slices : constant Boolean :=
+         Nkind (Name (N)) = N_Slice or else Nkind (Expression (N)) = N_Slice;
+       L_Prefix_Comp : constant Boolean :=
+         --  True if the left-hand side is a slice of a component or slice
+         Nkind (Name (N)) = N_Slice
+         and then Nkind_In (Prefix (Name (N)),
+                            N_Selected_Component,
+                            N_Indexed_Component,
+                            N_Slice);
+       R_Prefix_Comp : constant Boolean :=
+         --  Likewise for the right-hand side
+         Nkind (Expression (N)) = N_Slice
+         and then Nkind_In (Prefix (Expression (N)),
+                            N_Selected_Component,
+                            N_Indexed_Component,
+                            N_Slice);
+    begin
+       --  Determine whether Copy_Bitfield is appropriate (will work, and will
+       --  be more efficient than component-by-component copy). Copy_Bitfield
+       --  doesn't work for reversed storage orders. It is efficient for slices
+       --  of bit-packed arrays. Copy_Bitfield can read and write bits that are
+       --  not part of the objects being copied, so we don't want to use it if
+       --  there are volatile or independent components. If the Prefix of the
+       --  slice is a component or slice, then it might be a part of an object
+       --  with some other volatile or independent components, so we disable the
+       --  optimization in that case as well.  We could complicate this code by
+       --  actually looking for such volatile and independent components.
+ 
+       if Is_Bit_Packed_Array (L_Type)
+         and then Is_Bit_Packed_Array (R_Type)
+         and then not Reverse_Storage_Order (L_Type)
+         and then not Reverse_Storage_Order (R_Type)
+         and then Ndim = 1
+         and then not Rev
+         and then Slices
+         and then not Has_Volatile_Component (L_Type)
+         and then not Has_Volatile_Component (R_Type)
+         and then not Has_Independent_Components (L_Type)
+         and then not Has_Independent_Components (R_Type)
+         and then not L_Prefix_Comp
+         and then not R_Prefix_Comp
+         and then RTE_Available (RE_Copy_Bitfield)
+       then
+          return Expand_Assign_Array_Bitfield
+            (N, Larray, Rarray, L_Type, R_Type, Rev);
+       else
+          return Expand_Assign_Array_Loop
+            (N, Larray, Rarray, L_Type, R_Type, Ndim, Rev);
+       end if;
+    end Expand_Assign_Array_Loop_Or_Bitfield;
+ 
     --------------------------
     -- Expand_Assign_Record --
     --------------------------
*************** package body Exp_Ch5 is
*** 2021,2035 ****
  
        if not Suppress_Assignment_Checks (N) then
  
!          --  First deal with generation of range check if required
! 
!          if Do_Range_Check (Rhs) then
!             Generate_Range_Check (Rhs, Typ, CE_Range_Check_Failed);
!          end if;
  
!          --  Then generate predicate check if required
  
!          Apply_Predicate_Check (Rhs, Typ);
        end if;
  
        --  Check for a special case where a high level transformation is
--- 2199,2219 ----
  
        if not Suppress_Assignment_Checks (N) then
  
!          --  First deal with generation of range check if required,
!          --  and then predicate checks if the type carries a predicate.
!          --  If the Rhs is an expression these tests may have been applied
!          --  already. This is the case if the RHS is a type conversion.
!          --  Other such redundant checks could be removed ???
  
!          if Nkind (Rhs) /= N_Type_Conversion
!            or else Entity (Subtype_Mark (Rhs)) /= Typ
!          then
!             if Do_Range_Check (Rhs) then
!                Generate_Range_Check (Rhs, Typ, CE_Range_Check_Failed);
!             end if;
  
!             Apply_Predicate_Check (Rhs, Typ);
!          end if;
        end if;
  
        --  Check for a special case where a high level transformation is
*************** package body Exp_Ch5 is
*** 2225,2238 ****
        --  checking. Convert Lhs as well, otherwise the actual subtype might
        --  not be constructible. If the discriminants have defaults the type
        --  is unconstrained and there is nothing to check.
  
!       elsif Has_Unknown_Discriminants (Base_Type (Etype (Lhs)))
!         and then Has_Discriminants (Typ)
!         and then not Has_Defaulted_Discriminants (Typ)
!       then
!          Rewrite (Rhs, OK_Convert_To (Base_Type (Typ), Rhs));
!          Rewrite (Lhs, OK_Convert_To (Base_Type (Typ), Lhs));
!          Apply_Discriminant_Check (Rhs, Typ, Lhs);
  
        --  In the access type case, we need the same discriminant check, and
        --  also range checks if we have an access to constrained array.
--- 2409,2431 ----
        --  checking. Convert Lhs as well, otherwise the actual subtype might
        --  not be constructible. If the discriminants have defaults the type
        --  is unconstrained and there is nothing to check.
+       --  Ditto if a private type with unknown discriminants has a full view
+       --  that is an unconstrained array, in which case a length check is
+       --  needed.
  
!       elsif Has_Unknown_Discriminants (Base_Type (Etype (Lhs))) then
!          if Has_Discriminants (Typ)
!            and then not Has_Defaulted_Discriminants (Typ)
!          then
!             Rewrite (Rhs, OK_Convert_To (Base_Type (Typ), Rhs));
!             Rewrite (Lhs, OK_Convert_To (Base_Type (Typ), Lhs));
!             Apply_Discriminant_Check (Rhs, Typ, Lhs);
! 
!          elsif Is_Array_Type (Typ) and then Is_Constrained (Typ)  then
!             Rewrite (Rhs, OK_Convert_To (Base_Type (Typ), Rhs));
!             Rewrite (Lhs, OK_Convert_To (Base_Type (Typ), Lhs));
!             Apply_Length_Check (Rhs, Typ);
!          end if;
  
        --  In the access type case, we need the same discriminant check, and
        --  also range checks if we have an access to constrained array.
*************** package body Exp_Ch5 is
*** 2850,2862 ****
     -----------------------------
  
     procedure Expand_N_Case_Statement (N : Node_Id) is
!       Loc    : constant Source_Ptr := Sloc (N);
!       Expr   : constant Node_Id    := Expression (N);
!       Alt    : Node_Id;
!       Len    : Nat;
!       Cond   : Node_Id;
!       Choice : Node_Id;
!       Chlist : List_Id;
  
     begin
        --  Check for the situation where we know at compile time which branch
--- 3043,3056 ----
     -----------------------------
  
     procedure Expand_N_Case_Statement (N : Node_Id) is
!       Loc            : constant Source_Ptr := Sloc (N);
!       Expr           : constant Node_Id    := Expression (N);
!       From_Cond_Expr : constant Boolean    := From_Conditional_Expression (N);
!       Alt            : Node_Id;
!       Len            : Nat;
!       Cond           : Node_Id;
!       Choice         : Node_Id;
!       Chlist         : List_Id;
  
     begin
        --  Check for the situation where we know at compile time which branch
*************** package body Exp_Ch5 is
*** 3067,3073 ****
--- 3261,3275 ----
                     Condition => Cond,
                     Then_Statements => Then_Stms,
                     Else_Statements => Else_Stms));
+ 
+                --  The rewritten if statement needs to inherit whether the
+                --  case statement was expanded from a conditional expression,
+                --  for proper handling of nested controlled objects.
+ 
+                Set_From_Conditional_Expression (N, From_Cond_Expr);
+ 
                 Analyze (N);
+ 
                 return;
              end if;
           end if;
*************** package body Exp_Ch5 is
*** 3304,3310 ****
                  Declarations => New_List (Elmt_Decl),
                  Handled_Statement_Sequence =>
                    Make_Handled_Sequence_Of_Statements (Loc,
!                     Statements =>  Stats))));
  
        else
           Elmt_Ref :=
--- 3506,3512 ----
                  Declarations => New_List (Elmt_Decl),
                  Handled_Statement_Sequence =>
                    Make_Handled_Sequence_Of_Statements (Loc,
!                     Statements => Stats))));
  
        else
           Elmt_Ref :=
*************** package body Exp_Ch5 is
*** 3330,3336 ****
               Declarations               => New_List (Elmt_Decl),
               Handled_Statement_Sequence =>
                 Make_Handled_Sequence_Of_Statements (Loc,
!                  Statements =>  New_List (New_Loop)));
        end if;
  
        --  The element is only modified in expanded code, so it appears as
--- 3532,3538 ----
               Declarations               => New_List (Elmt_Decl),
               Handled_Statement_Sequence =>
                 Make_Handled_Sequence_Of_Statements (Loc,
!                  Statements => New_List (New_Loop)));
        end if;
  
        --  The element is only modified in expanded code, so it appears as
*************** package body Exp_Ch5 is
*** 3919,3925 ****
     --      --  Default_Iterator aspect of Vector. This increments Lock,
     --      --  disallowing tampering with cursors. Unfortunately, it does not
     --      --  increment Busy. The result of Iterate is Limited_Controlled;
!    --      --  finalization will decrement Lock.  This is a build-in-place
     --      --  dispatching call to Iterate.
  
     --      Cur : Cursor := First (Iter); -- or Last
--- 4121,4127 ----
     --      --  Default_Iterator aspect of Vector. This increments Lock,
     --      --  disallowing tampering with cursors. Unfortunately, it does not
     --      --  increment Busy. The result of Iterate is Limited_Controlled;
!    --      --  finalization will decrement Lock. This is a build-in-place
     --      --  dispatching call to Iterate.
  
     --      Cur : Cursor := First (Iter); -- or Last
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_ch6.adb gcc-10.1.0/gcc/ada/exp_ch6.adb
*** gcc-9.3.0/gcc/ada/exp_ch6.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_ch6.adb	Thu May  7 10:49:59 2020
*************** with Sem;       use Sem;
*** 60,66 ****
  with Sem_Aux;   use Sem_Aux;
  with Sem_Ch6;   use Sem_Ch6;
  with Sem_Ch8;   use Sem_Ch8;
- with Sem_Ch12;  use Sem_Ch12;
  with Sem_Ch13;  use Sem_Ch13;
  with Sem_Dim;   use Sem_Dim;
  with Sem_Disp;  use Sem_Disp;
--- 60,65 ----
*************** package body Exp_Ch6 is
*** 147,152 ****
--- 146,157 ----
     --  access discriminants do not require secondary stack use. Note we must
     --  always use the secondary stack for dispatching-on-result calls.
  
+    function Check_Number_Of_Actuals
+      (Subp_Call : Node_Id;
+       Subp_Id   : Entity_Id) return Boolean;
+    --  Given a subprogram call to the given subprogram return True if the
+    --  number of actual parameters (including extra actuals) is correct.
+ 
     procedure Check_Overriding_Operation (Subp : Entity_Id);
     --  Subp is a dispatching operation. Check whether it may override an
     --  inherited private operation, in which case its DT entry is that of
*************** package body Exp_Ch6 is
*** 203,210 ****
     --  For all parameter modes, actuals that denote components and slices of
     --  packed arrays are expanded into suitable temporaries.
     --
!    --  For non-scalar objects that are possibly unaligned, add call by copy
!    --  code (copy in for IN and IN OUT, copy out for OUT and IN OUT).
     --
     --  For OUT and IN OUT parameters, add predicate checks after the call
     --  based on the predicates of the actual type.
--- 208,215 ----
     --  For all parameter modes, actuals that denote components and slices of
     --  packed arrays are expanded into suitable temporaries.
     --
!    --  For nonscalar objects that are possibly unaligned, add call by copy code
!    --  (copy in for IN and IN OUT, copy out for OUT and IN OUT).
     --
     --  For OUT and IN OUT parameters, add predicate checks after the call
     --  based on the predicates of the actual type.
*************** package body Exp_Ch6 is
*** 544,551 ****
        Chain         : Node_Id := Empty)
     is
        Loc           : constant Source_Ptr := Sloc (Function_Call);
-       Result_Subt   : constant Entity_Id :=
-                         Available_View (Etype (Function_Id));
        Actual        : Node_Id;
        Chain_Actual  : Node_Id;
        Chain_Formal  : Node_Id;
--- 549,554 ----
*************** package body Exp_Ch6 is
*** 554,560 ****
     begin
        --  No such extra parameters are needed if there are no tasks
  
!       if not Has_Task (Result_Subt) then
           return;
        end if;
  
--- 557,563 ----
     begin
        --  No such extra parameters are needed if there are no tasks
  
!       if not Needs_BIP_Task_Actuals (Function_Id) then
           return;
        end if;
  
*************** package body Exp_Ch6 is
*** 870,875 ****
--- 873,905 ----
          or else not Requires_Transient_Scope (Underlying_Type (Result_Subt));
     end Caller_Known_Size;
  
+    -----------------------------
+    -- Check_Number_Of_Actuals --
+    -----------------------------
+ 
+    function Check_Number_Of_Actuals
+      (Subp_Call : Node_Id;
+       Subp_Id   : Entity_Id) return Boolean
+    is
+       Formal : Entity_Id;
+       Actual : Node_Id;
+ 
+    begin
+       pragma Assert (Nkind_In (Subp_Call, N_Entry_Call_Statement,
+                                           N_Function_Call,
+                                           N_Procedure_Call_Statement));
+ 
+       Formal := First_Formal_With_Extras (Subp_Id);
+       Actual := First_Actual (Subp_Call);
+ 
+       while Present (Formal) and then Present (Actual) loop
+          Next_Formal_With_Extras (Formal);
+          Next_Actual (Actual);
+       end loop;
+ 
+       return No (Formal) and then No (Actual);
+    end Check_Number_Of_Actuals;
+ 
     --------------------------------
     -- Check_Overriding_Operation --
     --------------------------------
*************** package body Exp_Ch6 is
*** 1222,1231 ****
        --  also takes care of any constraint checks required for the type
        --  conversion case (on both the way in and the way out).
  
!       procedure Add_Simple_Call_By_Copy_Code;
        --  This is similar to the above, but is used in cases where we know
        --  that all that is needed is to simply create a temporary and copy
!       --  the value in and out of the temporary.
  
        procedure Add_Validation_Call_By_Copy_Code (Act : Node_Id);
        --  Perform copy-back for actual parameter Act which denotes a validation
--- 1252,1262 ----
        --  also takes care of any constraint checks required for the type
        --  conversion case (on both the way in and the way out).
  
!       procedure Add_Simple_Call_By_Copy_Code (Bit_Packed_Array : Boolean);
        --  This is similar to the above, but is used in cases where we know
        --  that all that is needed is to simply create a temporary and copy
!       --  the value in and out of the temporary. If Bit_Packed_Array is True,
!       --  the procedure is called for a bit-packed array actual.
  
        procedure Add_Validation_Call_By_Copy_Code (Act : Node_Id);
        --  Perform copy-back for actual parameter Act which denotes a validation
*************** package body Exp_Ch6 is
*** 1239,1249 ****
  
        function Is_Legal_Copy return Boolean;
        --  Check that an actual can be copied before generating the temporary
!       --  to be used in the call. If the actual is of a by_reference type then
!       --  the program is illegal (this can only happen in the presence of
!       --  rep. clauses that force an incorrect alignment). If the formal is
!       --  a by_reference parameter imposed by a DEC pragma, emit a warning to
!       --  the effect that this might lead to unaligned arguments.
  
        function Make_Var (Actual : Node_Id) return Entity_Id;
        --  Returns an entity that refers to the given actual parameter, Actual
--- 1270,1280 ----
  
        function Is_Legal_Copy return Boolean;
        --  Check that an actual can be copied before generating the temporary
!       --  to be used in the call. If the formal is of a by_reference type or
!       --  is aliased, then the program is illegal (this can only happen in
!       --  the presence of representation clauses that force a misalignment)
!       --  If the formal is a by_reference parameter imposed by a DEC pragma,
!       --  emit a warning that this might lead to unaligned arguments.
  
        function Make_Var (Actual : Node_Id) return Entity_Id;
        --  Returns an entity that refers to the given actual parameter, Actual
*************** package body Exp_Ch6 is
*** 1256,1261 ****
--- 1287,1296 ----
        --  the context of a call. Now we need to complete the expansion, so we
        --  unmark the analyzed bits in all prefixes.
  
+       function Requires_Atomic_Or_Volatile_Copy return Boolean;
+       --  Returns whether a copy is required as per RM C.6(19) and gives a
+       --  warning in this case.
+ 
        ---------------------------
        -- Add_Call_By_Copy_Code --
        ---------------------------
*************** package body Exp_Ch6 is
*** 1295,1301 ****
--- 1330,1343 ----
              Indic := New_Occurrence_Of (F_Typ, Loc);
           end if;
  
+          --  The new code will be properly analyzed below and the setting of
+          --  the Do_Range_Check flag recomputed so remove the obsolete one.
+ 
+          Set_Do_Range_Check (Actual, False);
+ 
           if Nkind (Actual) = N_Type_Conversion then
+             Set_Do_Range_Check (Expression (Actual), False);
+ 
              V_Typ := Etype (Expression (Actual));
  
              --  If the formal is an (in-)out parameter, capture the name
*************** package body Exp_Ch6 is
*** 1399,1404 ****
--- 1441,1456 ----
                 Init := New_Occurrence_Of (Var, Loc);
              end if;
  
+          --  Access types are passed in without checks, but if a copy-back is
+          --  required for a null-excluding check on an in-out or out parameter,
+          --  then the initial value is that of the actual.
+ 
+          elsif Is_Access_Type (E_Formal)
+            and then Can_Never_Be_Null (Etype (Actual))
+            and then not Can_Never_Be_Null (E_Formal)
+          then
+             Init := New_Occurrence_Of (Var, Loc);
+ 
           else
              Init := Empty;
           end if;
*************** package body Exp_Ch6 is
*** 1537,1542 ****
--- 1589,1607 ----
                          Type_Access_Level (E_Formal))));
  
                 else
+                   if Is_Access_Type (E_Formal)
+                     and then Can_Never_Be_Null (Etype (Actual))
+                     and then not Can_Never_Be_Null (E_Formal)
+                   then
+                      Append_To (Post_Call,
+                        Make_Raise_Constraint_Error (Loc,
+                          Condition =>
+                            Make_Op_Eq (Loc,
+                              Left_Opnd  => New_Occurrence_Of (Temp, Loc),
+                              Right_Opnd => Make_Null (Loc)),
+                          Reason => CE_Access_Check_Failed));
+                   end if;
+ 
                    Append_To (Post_Call,
                      Make_Assignment_Statement (Loc,
                        Name       => Lhs,
*************** package body Exp_Ch6 is
*** 1550,1556 ****
        -- Add_Simple_Call_By_Copy_Code --
        ----------------------------------
  
!       procedure Add_Simple_Call_By_Copy_Code is
           Decl   : Node_Id;
           F_Typ  : Entity_Id := Etype (Formal);
           Incod  : Node_Id;
--- 1615,1621 ----
        -- Add_Simple_Call_By_Copy_Code --
        ----------------------------------
  
!       procedure Add_Simple_Call_By_Copy_Code (Bit_Packed_Array : Boolean) is
           Decl   : Node_Id;
           F_Typ  : Entity_Id := Etype (Formal);
           Incod  : Node_Id;
*************** package body Exp_Ch6 is
*** 1561,1567 ****
           Temp   : Entity_Id;
  
        begin
!          if not Is_Legal_Copy then
              return;
           end if;
  
--- 1626,1637 ----
           Temp   : Entity_Id;
  
        begin
!          --  ??? We need to do the copy for a bit-packed array because this is
!          --  where the rewriting into a mask-and-shift sequence is done. But of
!          --  course this may break the program if it expects bits to be really
!          --  passed by reference. That's what we have done historically though.
! 
!          if not Bit_Packed_Array and then not Is_Legal_Copy then
              return;
           end if;
  
*************** package body Exp_Ch6 is
*** 1689,1694 ****
--- 1759,1778 ----
           Var_Id  : Entity_Id;
  
        begin
+          --  Generate range check if required
+ 
+          if Do_Range_Check (Actual) then
+             Generate_Range_Check (Actual, E_Formal, CE_Range_Check_Failed);
+          end if;
+ 
+          --  If there is a type conversion in the actual, it will be reinstated
+          --  below, the new instance will be properly analyzed and the setting
+          --  of the Do_Range_Check flag recomputed so remove the obsolete one.
+ 
+          if Nkind (Actual) = N_Type_Conversion then
+             Set_Do_Range_Check (Expression (Actual), False);
+          end if;
+ 
           --  Copy the value of the validation variable back into the object
           --  being validated.
  
*************** package body Exp_Ch6 is
*** 1785,1796 ****
           --  An attempt to copy a value of such a type can only occur if
           --  representation clauses give the actual a misaligned address.
  
!          if Is_By_Reference_Type (Etype (Formal)) then
  
              --  The actual may in fact be properly aligned but there is not
              --  enough front-end information to determine this. In that case
!             --  gigi will emit an error if a copy is not legal, or generate
!             --  the proper code.
  
              return False;
  
--- 1869,1884 ----
           --  An attempt to copy a value of such a type can only occur if
           --  representation clauses give the actual a misaligned address.
  
!          if Is_By_Reference_Type (Etype (Formal))
!            or else Is_Aliased (Formal)
!            or else (Mechanism (Formal) = By_Reference
!                      and then not Has_Foreign_Convention (Subp))
!          then
  
              --  The actual may in fact be properly aligned but there is not
              --  enough front-end information to determine this. In that case
!             --  gigi will emit an error or a warning if a copy is not legal,
!             --  or generate the proper code.
  
              return False;
  
*************** package body Exp_Ch6 is
*** 1801,1806 ****
--- 1889,1895 ----
           --  be lurking.
  
           elsif Mechanism (Formal) = By_Reference
+            and then Ekind (Scope (Formal)) = E_Procedure
             and then Is_Valued_Procedure (Scope (Formal))
           then
              Error_Msg_N
*************** package body Exp_Ch6 is
*** 1853,1858 ****
--- 1942,1984 ----
           end loop;
        end Reset_Packed_Prefix;
  
+       ----------------------------------------
+       --  Requires_Atomic_Or_Volatile_Copy  --
+       ----------------------------------------
+ 
+       function Requires_Atomic_Or_Volatile_Copy return Boolean is
+       begin
+          --  If the formal is already passed by copy, no need to do anything
+ 
+          if Is_By_Copy_Type (E_Formal) then
+             return False;
+          end if;
+ 
+          --  Check for atomicity mismatch
+ 
+          if Is_Atomic_Object (Actual) and then not Is_Atomic (E_Formal)
+          then
+             if Comes_From_Source (N) then
+                Error_Msg_N
+                  ("?atomic actual passed by copy (RM C.6(19))", Actual);
+             end if;
+             return True;
+          end if;
+ 
+          --  Check for volatility mismatch
+ 
+          if Is_Volatile_Object (Actual) and then not Is_Volatile (E_Formal)
+          then
+             if Comes_From_Source (N) then
+                Error_Msg_N
+                  ("?volatile actual passed by copy (RM C.6(19))", Actual);
+             end if;
+             return True;
+          end if;
+ 
+          return False;
+       end Requires_Atomic_Or_Volatile_Copy;
+ 
     --  Start of processing for Expand_Actuals
  
     begin
*************** package body Exp_Ch6 is
*** 1921,1927 ****
              Apply_Constraint_Check (Actual, E_Formal);
  
           --  Out parameter case. No constraint checks on access type
!          --  RM 6.4.1 (13)
  
           elsif Is_Access_Type (E_Formal) then
              null;
--- 2047,2054 ----
              Apply_Constraint_Check (Actual, E_Formal);
  
           --  Out parameter case. No constraint checks on access type
!          --  RM 6.4.1 (13), but on return a null-excluding check may be
!          --  required (see below).
  
           elsif Is_Access_Type (E_Formal) then
              null;
*************** package body Exp_Ch6 is
*** 1996,2004 ****
              --  [in] out parameters.
  
              elsif Is_Ref_To_Bit_Packed_Array (Actual) then
!                Add_Simple_Call_By_Copy_Code;
  
!             --  If a non-scalar actual is possibly bit-aligned, we need a copy
              --  because the back-end cannot cope with such objects. In other
              --  cases where alignment forces a copy, the back-end generates
              --  it properly. It should not be generated unconditionally in the
--- 2123,2131 ----
              --  [in] out parameters.
  
              elsif Is_Ref_To_Bit_Packed_Array (Actual) then
!                Add_Simple_Call_By_Copy_Code (Bit_Packed_Array => True);
  
!             --  If a nonscalar actual is possibly bit-aligned, we need a copy
              --  because the back-end cannot cope with such objects. In other
              --  cases where alignment forces a copy, the back-end generates
              --  it properly. It should not be generated unconditionally in the
*************** package body Exp_Ch6 is
*** 2012,2018 ****
                  Component_May_Be_Bit_Aligned (Entity (Selector_Name (Actual)))
                and then not Represented_As_Scalar (Etype (Formal))
              then
!                Add_Simple_Call_By_Copy_Code;
  
              --  References to slices of bit-packed arrays are expanded
  
--- 2139,2145 ----
                  Component_May_Be_Bit_Aligned (Entity (Selector_Name (Actual)))
                and then not Represented_As_Scalar (Etype (Formal))
              then
!                Add_Simple_Call_By_Copy_Code (Bit_Packed_Array => False);
  
              --  References to slices of bit-packed arrays are expanded
  
*************** package body Exp_Ch6 is
*** 2028,2062 ****
              --  formal subtype are not the same, requiring a check.
  
              --  It is necessary to exclude tagged types because of "downward
!             --  conversion" errors.
  
              elsif Is_Access_Type (E_Formal)
-               and then not Same_Type (E_Formal, E_Actual)
                and then not Is_Tagged_Type (Designated_Type (E_Formal))
              then
                 Add_Call_By_Copy_Code;
  
!             --  If the actual is not a scalar and is marked for volatile
!             --  treatment, whereas the formal is not volatile, then pass
!             --  by copy unless it is a by-reference type.
! 
!             --  Note: we use Is_Volatile here rather than Treat_As_Volatile,
!             --  because this is the enforcement of a language rule that applies
!             --  only to "real" volatile variables, not e.g. to the address
!             --  clause overlay case.
! 
!             elsif Is_Entity_Name (Actual)
!               and then Is_Volatile (Entity (Actual))
!               and then not Is_By_Reference_Type (E_Actual)
!               and then not Is_Scalar_Type (Etype (Entity (Actual)))
!               and then not Is_Volatile (E_Formal)
!             then
!                Add_Call_By_Copy_Code;
  
!             elsif Nkind (Actual) = N_Indexed_Component
!               and then Is_Entity_Name (Prefix (Actual))
!               and then Has_Volatile_Components (Entity (Prefix (Actual)))
!             then
                 Add_Call_By_Copy_Code;
  
              --  Add call-by-copy code for the case of scalar out parameters
--- 2155,2175 ----
              --  formal subtype are not the same, requiring a check.
  
              --  It is necessary to exclude tagged types because of "downward
!             --  conversion" errors, but null-excluding checks on return may be
!             --  required.
  
              elsif Is_Access_Type (E_Formal)
                and then not Is_Tagged_Type (Designated_Type (E_Formal))
+               and then (not Same_Type (E_Formal, E_Actual)
+                 or else (Can_Never_Be_Null (E_Actual)
+                           and then not Can_Never_Be_Null (E_Formal)))
              then
                 Add_Call_By_Copy_Code;
  
!             --  We may need to force a copy because of atomicity or volatility
!             --  considerations.
  
!             elsif Requires_Atomic_Or_Volatile_Copy then
                 Add_Call_By_Copy_Code;
  
              --  Add call-by-copy code for the case of scalar out parameters
*************** package body Exp_Ch6 is
*** 2073,2086 ****
                      (Ekind (Formal) = E_In_Out_Parameter
                        and then not In_Subrange_Of (E_Actual, E_Formal)))
              then
-                --  Perhaps the setting back to False should be done within
-                --  Add_Call_By_Copy_Code, since it could get set on other
-                --  cases occurring above???
- 
-                if Do_Range_Check (Actual) then
-                   Set_Do_Range_Check (Actual, False);
-                end if;
- 
                 Add_Call_By_Copy_Code;
              end if;
  
--- 2186,2191 ----
*************** package body Exp_Ch6 is
*** 2194,2199 ****
--- 2299,2310 ----
           --  Processing for IN parameters
  
           else
+             --  Generate range check if required
+ 
+             if Do_Range_Check (Actual) then
+                Generate_Range_Check (Actual, E_Formal, CE_Range_Check_Failed);
+             end if;
+ 
              --  For IN parameters in the bit-packed array case, we expand an
              --  indexed component (the circuit in Exp_Ch4 deliberately left
              --  indexed components appearing as actuals untouched, so that
*************** package body Exp_Ch6 is
*** 2214,2227 ****
              --  Is this really necessary in all cases???
  
              elsif Is_Ref_To_Bit_Packed_Array (Actual) then
!                Add_Simple_Call_By_Copy_Code;
  
!             --  If a non-scalar actual is possibly unaligned, we need a copy
  
              elsif Is_Possibly_Unaligned_Object (Actual)
                and then not Represented_As_Scalar (Etype (Formal))
              then
!                Add_Simple_Call_By_Copy_Code;
  
              --  Similarly, we have to expand slices of packed arrays here
              --  because the result must be byte aligned.
--- 2325,2338 ----
              --  Is this really necessary in all cases???
  
              elsif Is_Ref_To_Bit_Packed_Array (Actual) then
!                Add_Simple_Call_By_Copy_Code (Bit_Packed_Array => True);
  
!             --  If a nonscalar actual is possibly unaligned, we need a copy
  
              elsif Is_Possibly_Unaligned_Object (Actual)
                and then not Represented_As_Scalar (Etype (Formal))
              then
!                Add_Simple_Call_By_Copy_Code (Bit_Packed_Array => False);
  
              --  Similarly, we have to expand slices of packed arrays here
              --  because the result must be byte aligned.
*************** package body Exp_Ch6 is
*** 2236,2241 ****
--- 2347,2358 ----
              elsif Is_Possibly_Unaligned_Slice (Actual) then
                 Add_Call_By_Copy_Code;
  
+             --  We may need to force a copy because of atomicity or volatility
+             --  considerations.
+ 
+             elsif Requires_Atomic_Or_Volatile_Copy then
+                Add_Call_By_Copy_Code;
+ 
              --  An unusual case: a current instance of an enclosing task can be
              --  an actual, and must be replaced by a reference to self.
  
*************** package body Exp_Ch6 is
*** 2319,2324 ****
--- 2436,2448 ----
        --  Adds invariant checks for every intermediate type between the range
        --  of a view converted argument to its ancestor (from parent to child).
  
+       function Can_Fold_Predicate_Call (P : Entity_Id) return Boolean;
+       --  Try to constant-fold a predicate check, which often enough is a
+       --  simple arithmetic expression that can be computed statically if
+       --  its argument is static. This cleans up the output of CCG, even
+       --  though useless predicate checks will be generally removed by
+       --  back-end optimizations.
+ 
        function Inherited_From_Formal (S : Entity_Id) return Entity_Id;
        --  Within an instance, a type derived from an untagged formal derived
        --  type inherits from the original parent, not from the actual. The
*************** package body Exp_Ch6 is
*** 2331,2336 ****
--- 2455,2464 ----
        function In_Unfrozen_Instance (E : Entity_Id) return Boolean;
        --  Return true if E comes from an instance that is not yet frozen
  
+       function Is_Class_Wide_Interface_Type (E : Entity_Id) return Boolean;
+       --  Return True when E is a class-wide interface type or an access to
+       --  a class-wide interface type.
+ 
        function Is_Direct_Deep_Call (Subp : Entity_Id) return Boolean;
        --  Determine if Subp denotes a non-dispatching call to a Deep routine
  
*************** package body Exp_Ch6 is
*** 2463,2468 ****
--- 2591,2703 ----
           end if;
        end Add_View_Conversion_Invariants;
  
+       -----------------------------
+       -- Can_Fold_Predicate_Call --
+       -----------------------------
+ 
+       function Can_Fold_Predicate_Call (P : Entity_Id) return Boolean is
+          Actual : Node_Id;
+ 
+          function May_Fold (N : Node_Id) return Traverse_Result;
+          --  The predicate expression is foldable if it only contains operators
+          --  and literals. During this check, we also replace occurrences of
+          --  the formal of the constructed predicate function with the static
+          --  value of the actual. This is done on a copy of the analyzed
+          --  expression for the predicate.
+ 
+          --------------
+          -- May_Fold --
+          --------------
+ 
+          function May_Fold (N : Node_Id) return Traverse_Result is
+          begin
+             case Nkind (N) is
+                when N_Binary_Op
+                   | N_Unary_Op
+                =>
+                   return OK;
+ 
+                when N_Expanded_Name
+                   | N_Identifier
+                =>
+                   if Ekind (Entity (N)) = E_In_Parameter
+                     and then Entity (N) = First_Entity (P)
+                   then
+                      Rewrite (N, New_Copy (Actual));
+                      Set_Is_Static_Expression (N);
+                      return OK;
+ 
+                   elsif Ekind (Entity (N)) = E_Enumeration_Literal then
+                      return OK;
+ 
+                   else
+                      return Abandon;
+                   end if;
+ 
+                when N_Case_Expression
+                   | N_If_Expression
+                =>
+                   return OK;
+ 
+                when N_Integer_Literal =>
+                   return OK;
+ 
+                when others =>
+                   return Abandon;
+             end case;
+          end May_Fold;
+ 
+          function Try_Fold is new Traverse_Func (May_Fold);
+ 
+          --  Other lLocal variables
+ 
+          Subt   : constant Entity_Id := Etype (First_Entity (P));
+          Aspect : Node_Id;
+          Pred   : Node_Id;
+ 
+       --  Start of processing for Can_Fold_Predicate_Call
+ 
+       begin
+          --  Folding is only interesting if the actual is static and its type
+          --  has a Dynamic_Predicate aspect. For CodePeer we preserve the
+          --  function call.
+ 
+          Actual := First (Parameter_Associations (Call_Node));
+          Aspect := Find_Aspect (Subt, Aspect_Dynamic_Predicate);
+ 
+          --  If actual is a declared constant, retrieve its value
+ 
+          if Is_Entity_Name (Actual)
+            and then Ekind (Entity (Actual)) = E_Constant
+          then
+             Actual := Constant_Value (Entity (Actual));
+          end if;
+ 
+          if No (Actual)
+            or else Nkind (Actual) /= N_Integer_Literal
+            or else not Has_Dynamic_Predicate_Aspect (Subt)
+            or else No (Aspect)
+            or else CodePeer_Mode
+          then
+             return False;
+          end if;
+ 
+          --  Retrieve the analyzed expression for the predicate
+ 
+          Pred := New_Copy_Tree (Expression (Aspect));
+ 
+          if Try_Fold (Pred) = OK then
+             Rewrite (Call_Node, Pred);
+             Analyze_And_Resolve (Call_Node, Standard_Boolean);
+             return True;
+ 
+          --  Otherwise continue the expansion of the function call
+ 
+          else
+             return False;
+          end if;
+       end Can_Fold_Predicate_Call;
+ 
        ---------------------------
        -- Inherited_From_Formal --
        ---------------------------
*************** package body Exp_Ch6 is
*** 2585,2590 ****
--- 2820,2851 ----
           return False;
        end In_Unfrozen_Instance;
  
+       ----------------------------------
+       -- Is_Class_Wide_Interface_Type --
+       ----------------------------------
+ 
+       function Is_Class_Wide_Interface_Type (E : Entity_Id) return Boolean is
+          DDT : Entity_Id;
+          Typ : Entity_Id := E;
+ 
+       begin
+          if Has_Non_Limited_View (Typ) then
+             Typ := Non_Limited_View (Typ);
+          end if;
+ 
+          if Ekind (Typ) = E_Anonymous_Access_Type then
+             DDT := Directly_Designated_Type (Typ);
+ 
+             if Has_Non_Limited_View (DDT) then
+                DDT := Non_Limited_View (DDT);
+             end if;
+ 
+             return Is_Class_Wide_Type (DDT) and then Is_Interface (DDT);
+          else
+             return Is_Class_Wide_Type (Typ) and then Is_Interface (Typ);
+          end if;
+       end Is_Class_Wide_Interface_Type;
+ 
        -------------------------
        -- Is_Direct_Deep_Call --
        -------------------------
*************** package body Exp_Ch6 is
*** 2785,2790 ****
--- 3046,3062 ----
           end;
        end if;
  
+       --  if this is a call to a predicate function, try to constant
+       --  fold it.
+ 
+       if Nkind (Call_Node) = N_Function_Call
+         and then Is_Entity_Name (Name (Call_Node))
+         and then Is_Predicate_Function (Subp)
+         and then Can_Fold_Predicate_Call (Subp)
+       then
+          return;
+       end if;
+ 
        if Modify_Tree_For_C
          and then Nkind (Call_Node) = N_Function_Call
          and then Is_Entity_Name (Name (Call_Node))
*************** package body Exp_Ch6 is
*** 2899,2914 ****
        Actual := First_Actual (Call_Node);
        Param_Count := 1;
        while Present (Formal) loop
- 
-          --  Generate range check if required
- 
-          if Do_Range_Check (Actual)
-            and then Ekind (Formal) = E_In_Parameter
-          then
-             Generate_Range_Check
-               (Actual, Etype (Formal), CE_Range_Check_Failed);
-          end if;
- 
           --  Prepare to examine current entry
  
           Prev := Actual;
--- 3171,3176 ----
*************** package body Exp_Ch6 is
*** 2919,2933 ****
  
           CW_Interface_Formals_Present :=
             CW_Interface_Formals_Present
!              or else
!                (Is_Class_Wide_Type (Etype (Formal))
!                  and then Is_Interface (Etype (Etype (Formal))))
!              or else
!                (Ekind (Etype (Formal)) = E_Anonymous_Access_Type
!                  and then Is_Class_Wide_Type (Directly_Designated_Type
!                                                (Etype (Etype (Formal))))
!                  and then Is_Interface (Directly_Designated_Type
!                                          (Etype (Etype (Formal)))));
  
           --  Create possible extra actual for constrained case. Usually, the
           --  extra actual is of the form actual'constrained, but since this
--- 3181,3187 ----
  
           CW_Interface_Formals_Present :=
             CW_Interface_Formals_Present
!              or else Is_Class_Wide_Interface_Type (Etype (Formal));
  
           --  Create possible extra actual for constrained case. Usually, the
           --  extra actual is of the form actual'constrained, but since this
*************** package body Exp_Ch6 is
*** 3008,3014 ****
  
           --  Create possible extra actual for accessibility level
  
!          if Present (Extra_Accessibility (Formal)) then
  
              --  Ada 2005 (AI-252): If the actual was rewritten as an Access
              --  attribute, then the original actual may be an aliased object
--- 3262,3268 ----
  
           --  Create possible extra actual for accessibility level
  
!          if Present (Get_Accessibility (Formal)) then
  
              --  Ada 2005 (AI-252): If the actual was rewritten as an Access
              --  attribute, then the original actual may be an aliased object
*************** package body Exp_Ch6 is
*** 3084,3091 ****
  
                    Add_Extra_Actual
                      (Expr =>
!                        New_Occurrence_Of (Extra_Accessibility (Parm_Ent), Loc),
!                      EF   => Extra_Accessibility (Formal));
                 end;
  
              elsif Is_Entity_Name (Prev_Orig) then
--- 3338,3345 ----
  
                    Add_Extra_Actual
                      (Expr =>
!                        New_Occurrence_Of (Get_Accessibility (Parm_Ent), Loc),
!                      EF   => Get_Accessibility (Formal));
                 end;
  
              elsif Is_Entity_Name (Prev_Orig) then
*************** package body Exp_Ch6 is
*** 3114,3125 ****
                    begin
                       pragma Assert (Present (Parm_Ent));
  
!                      if Present (Extra_Accessibility (Parm_Ent)) then
                          Add_Extra_Actual
                            (Expr =>
                               New_Occurrence_Of
!                                (Extra_Accessibility (Parm_Ent), Loc),
!                            EF   => Extra_Accessibility (Formal));
  
                       --  If the actual access parameter does not have an
                       --  associated extra formal providing its scope level,
--- 3368,3379 ----
                    begin
                       pragma Assert (Present (Parm_Ent));
  
!                      if Present (Get_Accessibility (Parm_Ent)) then
                          Add_Extra_Actual
                            (Expr =>
                               New_Occurrence_Of
!                                (Get_Accessibility (Parm_Ent), Loc),
!                            EF   => Get_Accessibility (Formal));
  
                       --  If the actual access parameter does not have an
                       --  associated extra formal providing its scope level,
*************** package body Exp_Ch6 is
*** 3131,3137 ****
                            (Expr =>
                               Make_Integer_Literal (Loc,
                                 Intval => Scope_Depth (Standard_Standard)),
!                            EF   => Extra_Accessibility (Formal));
                       end if;
                    end;
  
--- 3385,3391 ----
                            (Expr =>
                               Make_Integer_Literal (Loc,
                                 Intval => Scope_Depth (Standard_Standard)),
!                            EF   => Get_Accessibility (Formal));
                       end if;
                    end;
  
*************** package body Exp_Ch6 is
*** 3141,3147 ****
                 else
                    Add_Extra_Actual
                      (Expr => Dynamic_Accessibility_Level (Prev_Orig),
!                      EF   => Extra_Accessibility (Formal));
                 end if;
  
              --  If the actual is an access discriminant, then pass the level
--- 3395,3401 ----
                 else
                    Add_Extra_Actual
                      (Expr => Dynamic_Accessibility_Level (Prev_Orig),
!                      EF   => Get_Accessibility (Formal));
                 end if;
  
              --  If the actual is an access discriminant, then pass the level
*************** package body Exp_Ch6 is
*** 3157,3163 ****
                   (Expr =>
                      Make_Integer_Literal (Loc,
                        Intval => Object_Access_Level (Prefix (Prev_Orig))),
!                   EF   => Extra_Accessibility (Formal));
  
              --  All other cases
  
--- 3411,3417 ----
                   (Expr =>
                      Make_Integer_Literal (Loc,
                        Intval => Object_Access_Level (Prefix (Prev_Orig))),
!                   EF   => Get_Accessibility (Formal));
  
              --  All other cases
  
*************** package body Exp_Ch6 is
*** 3165,3170 ****
--- 3419,3433 ----
                 case Nkind (Prev_Orig) is
                    when N_Attribute_Reference =>
                       case Get_Attribute_Id (Attribute_Name (Prev_Orig)) is
+                         --  Ignore 'Result, 'Loop_Entry, and 'Old as they can
+                         --  be used to identify access objects and do not have
+                         --  an effect on accessibility level.
+ 
+                         when Attribute_Loop_Entry
+                            | Attribute_Old
+                            | Attribute_Result
+                         =>
+                            null;
  
                          --  For X'Access, pass on the level of the prefix X
  
*************** package body Exp_Ch6 is
*** 3203,3209 ****
                             --  ???
  
                             --  A further case that requires special handling
!                            --  is the common idiom E.all'access.  If E is a
                             --  formal of the enclosing subprogram, the
                             --  accessibility of the expression is that of E.
  
--- 3466,3472 ----
                             --  ???
  
                             --  A further case that requires special handling
!                            --  is the common idiom E.all'access. If E is a
                             --  formal of the enclosing subprogram, the
                             --  accessibility of the expression is that of E.
  
*************** package body Exp_Ch6 is
*** 3227,3245 ****
                                     Make_Integer_Literal (Loc,
                                       Intval =>
                                         Type_Access_Level (Pref_Entity)),
!                                  EF   => Extra_Accessibility (Formal));
  
                             elsif Nkind (Prev_Orig) = N_Explicit_Dereference
                               and then Present (Pref_Entity)
                               and then Is_Formal (Pref_Entity)
                               and then Present
!                                         (Extra_Accessibility (Pref_Entity))
                             then
                                Add_Extra_Actual
                                  (Expr =>
                                     New_Occurrence_Of
!                                      (Extra_Accessibility (Pref_Entity), Loc),
!                                  EF   => Extra_Accessibility (Formal));
  
                             else
                                Add_Extra_Actual
--- 3490,3508 ----
                                     Make_Integer_Literal (Loc,
                                       Intval =>
                                         Type_Access_Level (Pref_Entity)),
!                                  EF   => Get_Accessibility (Formal));
  
                             elsif Nkind (Prev_Orig) = N_Explicit_Dereference
                               and then Present (Pref_Entity)
                               and then Is_Formal (Pref_Entity)
                               and then Present
!                                         (Get_Accessibility (Pref_Entity))
                             then
                                Add_Extra_Actual
                                  (Expr =>
                                     New_Occurrence_Of
!                                      (Get_Accessibility (Pref_Entity), Loc),
!                                  EF   => Get_Accessibility (Formal));
  
                             else
                                Add_Extra_Actual
*************** package body Exp_Ch6 is
*** 3247,3253 ****
                                     Make_Integer_Literal (Loc,
                                       Intval =>
                                         Object_Access_Level (Prev_Orig)),
!                                  EF   => Extra_Accessibility (Formal));
                             end if;
  
                          --  Treat the unchecked attributes as library-level
--- 3510,3516 ----
                                     Make_Integer_Literal (Loc,
                                       Intval =>
                                         Object_Access_Level (Prev_Orig)),
!                                  EF   => Get_Accessibility (Formal));
                             end if;
  
                          --  Treat the unchecked attributes as library-level
*************** package body Exp_Ch6 is
*** 3259,3265 ****
                               (Expr =>
                                  Make_Integer_Literal (Loc,
                                    Intval => Scope_Depth (Standard_Standard)),
!                               EF   => Extra_Accessibility (Formal));
  
                          --  No other cases of attributes returning access
                          --  values that can be passed to access parameters.
--- 3522,3528 ----
                               (Expr =>
                                  Make_Integer_Literal (Loc,
                                    Intval => Scope_Depth (Standard_Standard)),
!                               EF   => Get_Accessibility (Formal));
  
                          --  No other cases of attributes returning access
                          --  values that can be passed to access parameters.
*************** package body Exp_Ch6 is
*** 3271,3284 ****
  
                    --  For allocators we pass the level of the execution of the
                    --  called subprogram, which is one greater than the current
!                   --  scope level.
  
                    when N_Allocator =>
                       Add_Extra_Actual
                         (Expr =>
                            Make_Integer_Literal (Loc,
                              Intval => Scope_Depth (Current_Scope) + 1),
!                         EF   => Extra_Accessibility (Formal));
  
                    --  For most other cases we simply pass the level of the
                    --  actual's access type. The type is retrieved from
--- 3534,3550 ----
  
                    --  For allocators we pass the level of the execution of the
                    --  called subprogram, which is one greater than the current
!                   --  scope level. However, according to RM 3.10.2(14/3) this
!                   --  is wrong since for an anonymous allocator defining the
!                   --  value of an access parameter, the accessibility level is
!                   --  that of the innermost master of the call???
  
                    when N_Allocator =>
                       Add_Extra_Actual
                         (Expr =>
                            Make_Integer_Literal (Loc,
                              Intval => Scope_Depth (Current_Scope) + 1),
!                         EF   => Get_Accessibility (Formal));
  
                    --  For most other cases we simply pass the level of the
                    --  actual's access type. The type is retrieved from
*************** package body Exp_Ch6 is
*** 3289,3295 ****
                    when others =>
                       Add_Extra_Actual
                         (Expr => Dynamic_Accessibility_Level (Prev),
!                         EF   => Extra_Accessibility (Formal));
                 end case;
              end if;
           end if;
--- 3555,3561 ----
                    when others =>
                       Add_Extra_Actual
                         (Expr => Dynamic_Accessibility_Level (Prev),
!                         EF   => Get_Accessibility (Formal));
                 end case;
              end if;
           end if;
*************** package body Exp_Ch6 is
*** 3432,3440 ****
                 --  or IN OUT parameter. We do reset the Is_Known_Valid flag
                 --  since the subprogram could have returned in invalid value.
  
!                if Ekind_In (Formal, E_Out_Parameter, E_In_Out_Parameter)
!                  and then Is_Assignable (Ent)
!                then
                    Sav := Last_Assignment (Ent);
                    Kill_Current_Values (Ent);
                    Set_Last_Assignment (Ent, Sav);
--- 3698,3704 ----
                 --  or IN OUT parameter. We do reset the Is_Known_Valid flag
                 --  since the subprogram could have returned in invalid value.
  
!                if Is_Assignable (Ent) then
                    Sav := Last_Assignment (Ent);
                    Kill_Current_Values (Ent);
                    Set_Last_Assignment (Ent, Sav);
*************** package body Exp_Ch6 is
*** 4132,4146 ****
           if not Is_Inlined (Subp) then
              null;
  
!          --  Frontend inlining of expression functions (performed also when
!          --  backend inlining is enabled).
  
           elsif Is_Inlinable_Expression_Function (Subp) then
              Rewrite (N, New_Copy (Expression_Of_Expression_Function (Subp)));
              Analyze (N);
              return;
  
!          --  Handle frontend inlining
  
           elsif not Back_End_Inlining then
              Inlined_Subprogram : declare
--- 4396,4410 ----
           if not Is_Inlined (Subp) then
              null;
  
!          --  Front-end inlining of expression functions (performed also when
!          --  back-end inlining is enabled).
  
           elsif Is_Inlinable_Expression_Function (Subp) then
              Rewrite (N, New_Copy (Expression_Of_Expression_Function (Subp)));
              Analyze (N);
              return;
  
!          --  Handle front-end inlining
  
           elsif not Back_End_Inlining then
              Inlined_Subprogram : declare
*************** package body Exp_Ch6 is
*** 4236,4321 ****
                 end if;
              end Inlined_Subprogram;
  
!          --  Back end inlining: let the back end handle it
! 
!          elsif No (Unit_Declaration_Node (Subp))
!            or else Nkind (Unit_Declaration_Node (Subp)) /=
!                                                  N_Subprogram_Declaration
!            or else No (Body_To_Inline (Unit_Declaration_Node (Subp)))
!            or else Nkind (Body_To_Inline (Unit_Declaration_Node (Subp))) in
!                                                                       N_Entity
!          then
!             Add_Inlined_Body (Subp, Call_Node);
! 
!             --  If the inlined call appears within an instantiation and some
!             --  level of optimization is required, ensure that the enclosing
!             --  instance body is available so that the back-end can actually
!             --  perform the inlining.
! 
!             if In_Instance
!               and then Comes_From_Source (Subp)
!               and then Optimization_Level > 0
!             then
!                declare
!                   Decl      : Node_Id;
!                   Inst      : Entity_Id;
!                   Inst_Node : Node_Id;
! 
!                begin
!                   Inst := Scope (Subp);
! 
!                   --  Find enclosing instance
! 
!                   while Present (Inst) and then Inst /= Standard_Standard loop
!                      exit when Is_Generic_Instance (Inst);
!                      Inst := Scope (Inst);
!                   end loop;
! 
!                   if Present (Inst)
!                     and then Is_Generic_Instance (Inst)
!                     and then not Is_Inlined (Inst)
!                   then
!                      Set_Is_Inlined (Inst);
!                      Decl := Unit_Declaration_Node (Inst);
! 
!                      --  Do not add a pending instantiation if the body exits
!                      --  already, or if the instance is a compilation unit, or
!                      --  the instance node is missing.
! 
!                      if Present (Corresponding_Body (Decl))
!                        or else Nkind (Parent (Decl)) = N_Compilation_Unit
!                        or else No (Next (Decl))
!                      then
!                         null;
! 
!                      else
!                         --  The instantiation node usually follows the package
!                         --  declaration for the instance. If the generic unit
!                         --  has aspect specifications, they are transformed
!                         --  into pragmas in the instance, and the instance node
!                         --  appears after them.
! 
!                         Inst_Node := Next (Decl);
! 
!                         while Nkind (Inst_Node) /= N_Package_Instantiation loop
!                            Inst_Node := Next (Inst_Node);
!                         end loop;
! 
!                         Add_Pending_Instantiation (Inst_Node, Decl);
!                      end if;
!                   end if;
!                end;
!             end if;
! 
!          --  Front end expansion of simple functions returning unconstrained
           --  types (see Check_And_Split_Unconstrained_Function). Note that the
!          --  case of a simple renaming (Body_To_Inline in N_Entity above, see
           --  also Build_Renamed_Body) cannot be expanded here because this may
           --  give rise to order-of-elaboration issues for the types of the
           --  parameters of the subprogram, if any.
  
!          else
              Expand_Inlined_Call (Call_Node, Subp, Orig_Subp);
           end if;
        end if;
  
--- 4500,4529 ----
                 end if;
              end Inlined_Subprogram;
  
!          --  Front-end expansion of simple functions returning unconstrained
           --  types (see Check_And_Split_Unconstrained_Function). Note that the
!          --  case of a simple renaming (Body_To_Inline in N_Entity below, see
           --  also Build_Renamed_Body) cannot be expanded here because this may
           --  give rise to order-of-elaboration issues for the types of the
           --  parameters of the subprogram, if any.
  
!          elsif Present (Unit_Declaration_Node (Subp))
!            and then Nkind (Unit_Declaration_Node (Subp)) =
!                                                        N_Subprogram_Declaration
!            and then Present (Body_To_Inline (Unit_Declaration_Node (Subp)))
!            and then
!              Nkind (Body_To_Inline (Unit_Declaration_Node (Subp))) not in
!                                                                        N_Entity
!          then
              Expand_Inlined_Call (Call_Node, Subp, Orig_Subp);
+ 
+          --  Back-end inlining either if optimization is enabled or the call is
+          --  required to be inlined.
+ 
+          elsif Optimization_Level > 0
+            or else Has_Pragma_Inline_Always (Subp)
+          then
+             Add_Inlined_Body (Subp, Call_Node);
           end if;
        end if;
  
*************** package body Exp_Ch6 is
*** 5072,5078 ****
                 end if;
  
                 --  When the function's subtype is unconstrained, a run-time
!                --  test is needed to determine the form of allocation to use
                 --  for the return object. The function has an implicit formal
                 --  parameter indicating this. If the BIP_Alloc_Form formal has
                 --  the value one, then the caller has passed access to an
--- 5280,5286 ----
                 end if;
  
                 --  When the function's subtype is unconstrained, a run-time
!                --  test may be needed to decide the form of allocation to use
                 --  for the return object. The function has an implicit formal
                 --  parameter indicating this. If the BIP_Alloc_Form formal has
                 --  the value one, then the caller has passed access to an
*************** package body Exp_Ch6 is
*** 5108,5120 ****
                       SS_Allocator   : Node_Id;
  
                    begin
-                      --  Reuse the itype created for the function's implicit
-                      --  access formal. This avoids the need to create a new
-                      --  access type here, plus it allows assigning the access
-                      --  formal directly without applying a conversion.
- 
-                      --    Ref_Type := Etype (Object_Access);
- 
                       --  Create an access type designating the function's
                       --  result subtype.
  
--- 5316,5321 ----
*************** package body Exp_Ch6 is
*** 5445,5450 ****
--- 5646,5709 ----
  
                       Obj_Acc_Formal := Alloc_Obj_Id;
                    end;
+ 
+                --  When the function's subtype is unconstrained and a run-time
+                --  test is not needed, we nevertheless need to build the return
+                --  using the function's result subtype.
+ 
+                elsif not Is_Constrained (Underlying_Type (Etype (Func_Id)))
+                then
+                   declare
+                      Alloc_Obj_Id   : Entity_Id;
+                      Alloc_Obj_Decl : Node_Id;
+                      Ptr_Type_Decl  : Node_Id;
+                      Ref_Type       : Entity_Id;
+ 
+                   begin
+                      --  Create an access type designating the function's
+                      --  result subtype.
+ 
+                      Ref_Type := Make_Temporary (Loc, 'A');
+ 
+                      Ptr_Type_Decl :=
+                        Make_Full_Type_Declaration (Loc,
+                          Defining_Identifier => Ref_Type,
+                          Type_Definition     =>
+                            Make_Access_To_Object_Definition (Loc,
+                              All_Present        => True,
+                              Subtype_Indication =>
+                                New_Occurrence_Of (Ret_Obj_Typ, Loc)));
+ 
+                      Insert_Before (Ret_Obj_Decl, Ptr_Type_Decl);
+ 
+                      --  Create an access object initialized to the conversion
+                      --  of the implicit access value passed in by the caller.
+ 
+                      Alloc_Obj_Id := Make_Temporary (Loc, 'R');
+                      Set_Etype (Alloc_Obj_Id, Ref_Type);
+ 
+                      --  See the ??? comment a few lines above about the use of
+                      --  an unchecked conversion here.
+ 
+                      Alloc_Obj_Decl :=
+                        Make_Object_Declaration (Loc,
+                          Defining_Identifier => Alloc_Obj_Id,
+                          Object_Definition   =>
+                            New_Occurrence_Of (Ref_Type, Loc),
+                          Expression =>
+                            Make_Unchecked_Type_Conversion (Loc,
+                              Subtype_Mark =>
+                                New_Occurrence_Of (Ref_Type, Loc),
+                              Expression   =>
+                                New_Occurrence_Of (Obj_Acc_Formal, Loc)));
+ 
+                      Insert_Before (Ret_Obj_Decl, Alloc_Obj_Decl);
+ 
+                      --  Remember the local access object for use in the
+                      --  dereference of the renaming created below.
+ 
+                      Obj_Acc_Formal := Alloc_Obj_Id;
+                   end;
                 end if;
  
                 --  Replace the return object declaration with a renaming of a
*************** package body Exp_Ch6 is
*** 6675,6681 ****
        elsif Is_Thunk (Current_Scope) and then Is_Incomplete_Type (Exptyp) then
           return;
  
!       elsif not Requires_Transient_Scope (R_Type) then
  
           --  Mutable records with variable-length components are not returned
           --  on the sec-stack, so we need to make sure that the back end will
--- 6934,6945 ----
        elsif Is_Thunk (Current_Scope) and then Is_Incomplete_Type (Exptyp) then
           return;
  
!       --  A return statement from an ignored Ghost function does not use the
!       --  secondary stack (or any other one).
! 
!       elsif not Requires_Transient_Scope (R_Type)
!         or else Is_Ignored_Ghost_Entity (Scope_Id)
!       then
  
           --  Mutable records with variable-length components are not returned
           --  on the sec-stack, so we need to make sure that the back end will
*************** package body Exp_Ch6 is
*** 7256,7267 ****
           end;
        end if;
  
!       --  If we are returning an object that may not be bit-aligned, then copy
!       --  the value into a temporary first. This copy may need to expand to a
!       --  loop of component operations.
  
        if Is_Possibly_Unaligned_Slice (Exp)
!         or else Is_Possibly_Unaligned_Object (Exp)
        then
           declare
              ExpR : constant Node_Id   := Relocate_Node (Exp);
--- 7520,7532 ----
           end;
        end if;
  
!       --  If we are returning a nonscalar object that is possibly unaligned,
!       --  then copy the value into a temporary first. This copy may need to
!       --  expand to a loop of component operations.
  
        if Is_Possibly_Unaligned_Slice (Exp)
!         or else (Is_Possibly_Unaligned_Object (Exp)
!                   and then not Represented_As_Scalar (Etype (Exp)))
        then
           declare
              ExpR : constant Node_Id   := Relocate_Node (Exp);
*************** package body Exp_Ch6 is
*** 7372,7378 ****
             and then Ekind (Node (Iface_DT_Ptr)) = E_Constant
           loop
              pragma Assert (Has_Thunks (Node (Iface_DT_Ptr)));
!             Expand_Interface_Thunk (Prim, Thunk_Id, Thunk_Code);
  
              if Present (Thunk_Code) then
                 Insert_Actions_After (N, New_List (
--- 7637,7644 ----
             and then Ekind (Node (Iface_DT_Ptr)) = E_Constant
           loop
              pragma Assert (Has_Thunks (Node (Iface_DT_Ptr)));
!             Expand_Interface_Thunk (Prim, Thunk_Id, Thunk_Code,
!               Iface => Related_Type (Node (Iface_DT_Ptr)));
  
              if Present (Thunk_Code) then
                 Insert_Actions_After (N, New_List (
*************** package body Exp_Ch6 is
*** 7765,7786 ****
  
        --  For now we test whether E denotes a function or access-to-function
        --  type whose result subtype is inherently limited. Later this test
!       --  may be revised to allow composite nonlimited types. Functions with
!       --  a foreign convention or whose result type has a foreign convention
!       --  never qualify.
  
        if Ekind_In (E, E_Function, E_Generic_Function)
          or else (Ekind (E) = E_Subprogram_Type
                    and then Etype (E) /= Standard_Void_Type)
        then
!          --  Note: If the function has a foreign convention, it cannot build
!          --  its result in place, so you're on your own. On the other hand,
!          --  if only the return type has a foreign convention, its layout is
!          --  intended to be compatible with the other language, but the build-
!          --  in place machinery can ensure that the object is not copied.
  
           return Is_Build_In_Place_Result_Type (Etype (E))
!            and then not Has_Foreign_Convention (E)
             and then not Debug_Flag_Dot_L;
        else
           return False;
--- 8031,8050 ----
  
        --  For now we test whether E denotes a function or access-to-function
        --  type whose result subtype is inherently limited. Later this test
!       --  may be revised to allow composite nonlimited types.
  
        if Ekind_In (E, E_Function, E_Generic_Function)
          or else (Ekind (E) = E_Subprogram_Type
                    and then Etype (E) /= Standard_Void_Type)
        then
!          --  If the function is imported from a foreign language, we don't do
!          --  build-in-place. Note that Import (Ada) functions can do
!          --  build-in-place. Note that it is OK for a build-in-place function
!          --  to return a type with a foreign convention; the build-in-place
!          --  machinery will ensure there is no copying.
  
           return Is_Build_In_Place_Result_Type (Etype (E))
!            and then not (Has_Foreign_Convention (E) and then Is_Imported (E))
             and then not Debug_Flag_Dot_L;
        else
           return False;
*************** package body Exp_Ch6 is
*** 7982,7994 ****
        --  since it is already attached on the related finalization master.
  
        --  Here and in related routines, we must examine the full view of the
!       --  type, because the view at the point of call may differ from that
!       --  that in the function body, and the expansion mechanism depends on
        --  the characteristics of the full view.
  
!       if Is_Constrained (Underlying_Type (Result_Subt))
!         and then not Needs_Finalization (Underlying_Type (Result_Subt))
!       then
           --  Replace the initialized allocator of form "new T'(Func (...))"
           --  with an uninitialized allocator of form "new T", where T is the
           --  result subtype of the called function. The call to the function
--- 8246,8286 ----
        --  since it is already attached on the related finalization master.
  
        --  Here and in related routines, we must examine the full view of the
!       --  type, because the view at the point of call may differ from the
!       --  one in the function body, and the expansion mechanism depends on
        --  the characteristics of the full view.
  
!       if Needs_BIP_Alloc_Form (Function_Id) then
!          Temp_Init := Empty;
! 
!          --  Case of a user-defined storage pool. Pass an allocation parameter
!          --  indicating that the function should allocate its result in the
!          --  pool, and pass the pool. Use 'Unrestricted_Access because the
!          --  pool may not be aliased.
! 
!          if Present (Associated_Storage_Pool (Acc_Type)) then
!             Alloc_Form := User_Storage_Pool;
!             Pool :=
!               Make_Attribute_Reference (Loc,
!                 Prefix         =>
!                   New_Occurrence_Of
!                     (Associated_Storage_Pool (Acc_Type), Loc),
!                 Attribute_Name => Name_Unrestricted_Access);
! 
!          --  No user-defined pool; pass an allocation parameter indicating that
!          --  the function should allocate its result on the heap.
! 
!          else
!             Alloc_Form := Global_Heap;
!             Pool := Make_Null (No_Location);
!          end if;
! 
!          --  The caller does not provide the return object in this case, so we
!          --  have to pass null for the object access actual.
! 
!          Return_Obj_Actual := Empty;
! 
!       else
           --  Replace the initialized allocator of form "new T'(Func (...))"
           --  with an uninitialized allocator of form "new T", where T is the
           --  result subtype of the called function. The call to the function
*************** package body Exp_Ch6 is
*** 8037,8071 ****
        --  perform the allocation of the return object, so we pass parameters
        --  indicating that.
  
-       else
-          Temp_Init := Empty;
- 
-          --  Case of a user-defined storage pool. Pass an allocation parameter
-          --  indicating that the function should allocate its result in the
-          --  pool, and pass the pool. Use 'Unrestricted_Access because the
-          --  pool may not be aliased.
- 
-          if Present (Associated_Storage_Pool (Acc_Type)) then
-             Alloc_Form := User_Storage_Pool;
-             Pool :=
-               Make_Attribute_Reference (Loc,
-                 Prefix         =>
-                   New_Occurrence_Of
-                     (Associated_Storage_Pool (Acc_Type), Loc),
-                 Attribute_Name => Name_Unrestricted_Access);
- 
-          --  No user-defined pool; pass an allocation parameter indicating that
-          --  the function should allocate its result on the heap.
- 
-          else
-             Alloc_Form := Global_Heap;
-             Pool := Make_Null (No_Location);
-          end if;
- 
-          --  The caller does not provide the return object in this case, so we
-          --  have to pass null for the object access actual.
- 
-          Return_Obj_Actual := Empty;
        end if;
  
        --  Declare the temp object
--- 8329,8334 ----
*************** package body Exp_Ch6 is
*** 8159,8164 ****
--- 8422,8428 ----
        Rewrite (Allocator, New_Occurrence_Of (Return_Obj_Access, Loc));
  
        Analyze_And_Resolve (Allocator, Acc_Type);
+       pragma Assert (Check_Number_Of_Actuals (Func_Call, Function_Id));
     end Make_Build_In_Place_Call_In_Allocator;
  
     ---------------------------------------------------
*************** package body Exp_Ch6 is
*** 8280,8285 ****
--- 8544,8551 ----
           Add_Access_Actual_To_Build_In_Place_Call
             (Func_Call, Function_Id, New_Occurrence_Of (Return_Obj_Id, Loc));
  
+          pragma Assert (Check_Number_Of_Actuals (Func_Call, Function_Id));
+ 
        --  When the result subtype is unconstrained, the function must allocate
        --  the return object in the secondary stack, so appropriate implicit
        --  parameters are added to the call to indicate that. A transient
*************** package body Exp_Ch6 is
*** 8303,8308 ****
--- 8569,8576 ----
  
           Add_Access_Actual_To_Build_In_Place_Call
             (Func_Call, Function_Id, Empty);
+ 
+          pragma Assert (Check_Number_Of_Actuals (Func_Call, Function_Id));
        end if;
     end Make_Build_In_Place_Call_In_Anonymous_Context;
  
*************** package body Exp_Ch6 is
*** 8408,8413 ****
--- 8676,8682 ----
        Insert_After_And_Analyze (Ptr_Typ_Decl, Obj_Decl);
  
        Rewrite (Assign, Make_Null_Statement (Loc));
+       pragma Assert (Check_Number_Of_Actuals (Func_Call, Func_Id));
     end Make_Build_In_Place_Call_In_Assignment;
  
     ----------------------------------------------------
*************** package body Exp_Ch6 is
*** 8524,8530 ****
           --  The presence of an address clause complicates the build-in-place
           --  expansion because the indicated address must be processed before
           --  the indirect call is generated (including the definition of a
!          --  local pointer to the object).  The address clause may come from
           --  an aspect specification or from an explicit attribute
           --  specification appearing after the object declaration. These two
           --  cases require different processing.
--- 8793,8799 ----
           --  The presence of an address clause complicates the build-in-place
           --  expansion because the indicated address must be processed before
           --  the indirect call is generated (including the definition of a
!          --  local pointer to the object). The address clause may come from
           --  an aspect specification or from an explicit attribute
           --  specification appearing after the object declaration. These two
           --  cases require different processing.
*************** package body Exp_Ch6 is
*** 8732,8738 ****
           Master_Exp => Fmaster_Actual);
  
        if Nkind (Parent (Obj_Decl)) = N_Extended_Return_Statement
!         and then Has_Task (Result_Subt)
        then
           --  Here we're passing along the master that was passed in to this
           --  function.
--- 9001,9007 ----
           Master_Exp => Fmaster_Actual);
  
        if Nkind (Parent (Obj_Decl)) = N_Extended_Return_Statement
!         and then Needs_BIP_Task_Actuals (Function_Id)
        then
           --  Here we're passing along the master that was passed in to this
           --  function.
*************** package body Exp_Ch6 is
*** 8849,8854 ****
--- 9118,9125 ----
           Replace_Renaming_Declaration_Id
             (Obj_Decl, Original_Node (Obj_Decl));
        end if;
+ 
+       pragma Assert (Check_Number_Of_Actuals (Func_Call, Function_Id));
     end Make_Build_In_Place_Call_In_Object_Declaration;
  
     -------------------------------------------------
*************** package body Exp_Ch6 is
*** 9120,9125 ****
--- 9391,9407 ----
        Analyze_And_Resolve (Allocator, Acc_Type);
     end Make_CPP_Constructor_Call_In_Allocator;
  
+    ----------------------------
+    -- Needs_BIP_Task_Actuals --
+    ----------------------------
+ 
+    function Needs_BIP_Task_Actuals (Func_Id : Entity_Id) return Boolean is
+       pragma Assert (Is_Build_In_Place_Function (Func_Id));
+       Func_Typ : constant Entity_Id := Underlying_Type (Etype (Func_Id));
+    begin
+       return Has_Task (Func_Typ);
+    end Needs_BIP_Task_Actuals;
+ 
     -----------------------------------
     -- Needs_BIP_Finalization_Master --
     -----------------------------------
*************** package body Exp_Ch6 is
*** 9153,9182 ****
     function Needs_BIP_Alloc_Form (Func_Id : Entity_Id) return Boolean is
        pragma Assert (Is_Build_In_Place_Function (Func_Id));
        Func_Typ : constant Entity_Id := Underlying_Type (Etype (Func_Id));
- 
     begin
!       --  A build-in-place function needs to know which allocation form to
!       --  use when:
!       --
!       --  1) The result subtype is unconstrained. In this case, depending on
!       --     the context of the call, the object may need to be created in the
!       --     secondary stack, the heap, or a user-defined storage pool.
!       --
!       --  2) The result subtype is tagged. In this case the function call may
!       --     dispatch on result and thus needs to be treated in the same way as
!       --     calls to functions with class-wide results, because a callee that
!       --     can be dispatched to may have any of various result subtypes, so
!       --     if any of the possible callees would require an allocation form to
!       --     be passed then they all do.
!       --
!       --  3) The result subtype needs finalization actions. In this case, based
!       --     on the context of the call, the object may need to be created at
!       --     the caller site, in the heap, or in a user-defined storage pool.
! 
!       return
!         not Is_Constrained (Func_Typ)
!           or else Is_Tagged_Type (Func_Typ)
!           or else Needs_Finalization (Func_Typ);
     end Needs_BIP_Alloc_Form;
  
     --------------------------------------
--- 9435,9442 ----
     function Needs_BIP_Alloc_Form (Func_Id : Entity_Id) return Boolean is
        pragma Assert (Is_Build_In_Place_Function (Func_Id));
        Func_Typ : constant Entity_Id := Underlying_Type (Etype (Func_Id));
     begin
!       return Requires_Transient_Scope (Func_Typ);
     end Needs_BIP_Alloc_Form;
  
     --------------------------------------
*************** package body Exp_Ch6 is
*** 9235,9242 ****
           return False;
        end Has_Unconstrained_Access_Discriminant_Component;
  
!       Feature_Disabled : constant Boolean := True;
!       --  Temporary
  
     --  Start of processing for Needs_Result_Accessibility_Level
  
--- 9495,9503 ----
           return False;
        end Has_Unconstrained_Access_Discriminant_Component;
  
!       Disable_Coextension_Cases : constant Boolean := True;
!       --  Flag used to temporarily disable a "True" result for types with
!       --  access discriminants and related coextension cases.
  
     --  Start of processing for Needs_Result_Accessibility_Level
  
*************** package body Exp_Ch6 is
*** 9246,9254 ****
        if not Present (Func_Typ) then
           return False;
  
-       elsif Feature_Disabled then
-          return False;
- 
        --  False if not a function, also handle enum-lit renames case
  
        elsif Func_Typ = Standard_Void_Type
--- 9507,9512 ----
*************** package body Exp_Ch6 is
*** 9273,9295 ****
        elsif Ada_Version < Ada_2012 then
           return False;
  
!       elsif Ekind (Func_Typ) = E_Anonymous_Access_Type
!         or else Is_Tagged_Type (Func_Typ)
!       then
!          --  In the case of, say, a null tagged record result type, the need
!          --  for this extra parameter might not be obvious. This function
!          --  returns True for all tagged types for compatibility reasons.
!          --  A function with, say, a tagged null controlling result type might
!          --  be overridden by a primitive of an extension having an access
!          --  discriminant and the overrider and overridden must have compatible
!          --  calling conventions (including implicitly declared parameters).
!          --  Similarly, values of one access-to-subprogram type might designate
!          --  both a primitive subprogram of a given type and a function
!          --  which is, for example, not a primitive subprogram of any type.
!          --  Again, this requires calling convention compatibility.
!          --  It might be possible to solve these issues by introducing
!          --  wrappers, but that is not the approach that was chosen.
  
           return True;
  
        elsif Has_Unconstrained_Access_Discriminants (Func_Typ) then
--- 9531,9567 ----
        elsif Ada_Version < Ada_2012 then
           return False;
  
!       --  Handle the situation where a result is an anonymous access type
!       --  RM 3.10.2 (10.3/3).
! 
!       elsif Ekind (Func_Typ) = E_Anonymous_Access_Type then
!          return True;
  
+       --  The following cases are related to coextensions and do not fully
+       --  cover everything mentioned in RM 3.10.2 (12) ???
+ 
+       --  Temporarily disabled ???
+ 
+       elsif Disable_Coextension_Cases then
+          return False;
+ 
+       --  In the case of, say, a null tagged record result type, the need for
+       --  this extra parameter might not be obvious so this function returns
+       --  True for all tagged types for compatibility reasons.
+ 
+       --  A function with, say, a tagged null controlling result type might
+       --  be overridden by a primitive of an extension having an access
+       --  discriminant and the overrider and overridden must have compatible
+       --  calling conventions (including implicitly declared parameters).
+ 
+       --  Similarly, values of one access-to-subprogram type might designate
+       --  both a primitive subprogram of a given type and a function which is,
+       --  for example, not a primitive subprogram of any type. Again, this
+       --  requires calling convention compatibility. It might be possible to
+       --  solve these issues by introducing wrappers, but that is not the
+       --  approach that was chosen.
+ 
+       elsif Is_Tagged_Type (Func_Typ) then
           return True;
  
        elsif Has_Unconstrained_Access_Discriminants (Func_Typ) then
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_ch6.ads gcc-10.1.0/gcc/ada/exp_ch6.ads
*** gcc-9.3.0/gcc/ada/exp_ch6.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_ch6.ads	Thu May  7 10:49:59 2020
*************** package Exp_Ch6 is
*** 244,249 ****
--- 244,252 ----
     --  functions with tagged result types, since they can be invoked via
     --  dispatching calls, and descendant types may require finalization.
  
+    function Needs_BIP_Task_Actuals (Func_Id : Entity_Id) return Boolean;
+    --  Return True if the function returns an object of a type that has tasks.
+ 
     function Needs_Result_Accessibility_Level
       (Func_Id : Entity_Id) return Boolean;
     --  Ada 2012 (AI05-0234): Return True if the function needs an implicit
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_ch7.adb gcc-10.1.0/gcc/ada/exp_ch7.adb
*** gcc-9.3.0/gcc/ada/exp_ch7.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_ch7.adb	Thu May  7 10:49:59 2020
*************** package body Exp_Ch7 is
*** 364,387 ****
  
     procedure Check_Unnesting_Elaboration_Code (N : Node_Id);
     --  The statement part of a package body that is a compilation unit may
!    --  contain blocks that declare local subprograms. In Subprogram_Unnesting
     --  Mode such subprograms must be handled as nested inside the (implicit)
     --  elaboration procedure that executes that statement part. To handle
     --  properly uplevel references we construct that subprogram explicitly,
     --  to contain blocks and inner subprograms, The statement part becomes
     --  a call to this subprogram. This is only done if blocks are present
!    --  in the statement list of the body.
  
!    procedure Check_Unnesting_In_Declarations (Decls : List_Id);
!    --  Similarly, the declarations in the package body may have created
!    --  blocks with nested subprograms. Such a block must be transformed into a
!    --  procedure followed by a call to it, so that unnesting can handle uplevel
!    --  references within these nested subprograms (typically generated
!    --  subprograms to handle finalization actions).
  
!    function Contains_Subprogram (Blk : Entity_Id) return Boolean;
!    --  Check recursively whether a loop or block contains a subprogram that
!    --  may need an activation record.
  
     procedure Check_Visibly_Controlled
       (Prim : Final_Primitives;
--- 364,410 ----
  
     procedure Check_Unnesting_Elaboration_Code (N : Node_Id);
     --  The statement part of a package body that is a compilation unit may
!    --  contain blocks that declare local subprograms. In Subprogram_Unnesting_
     --  Mode such subprograms must be handled as nested inside the (implicit)
     --  elaboration procedure that executes that statement part. To handle
     --  properly uplevel references we construct that subprogram explicitly,
     --  to contain blocks and inner subprograms, The statement part becomes
     --  a call to this subprogram. This is only done if blocks are present
!    --  in the statement list of the body. (It would be nice to unify this
!    --  procedure with Check_Unnesting_In_Decls_Or_Stmts, if possible, since
!    --  they're doing very similar work, but are structured differently. ???)
  
!    procedure Check_Unnesting_In_Decls_Or_Stmts (Decls_Or_Stmts : List_Id);
!    --  Similarly, the declarations or statements in library-level packages may
!    --  have created blocks with nested subprograms. Such a block must be
!    --  transformed into a procedure followed by a call to it, so that unnesting
!    --  can handle uplevel references within these nested subprograms (typically
!    --  subprograms that handle finalization actions). This also applies to
!    --  nested packages, including instantiations, in which case it must
!    --  recursively process inner bodies.
  
!    procedure Check_Unnesting_In_Handlers (N : Node_Id);
!    --  Similarly, check for blocks with nested subprograms occurring within
!    --  a set of exception handlers associated with a package body N.
! 
!    procedure Unnest_Block (Decl : Node_Id);
!    --  Blocks that contain nested subprograms with up-level references need to
!    --  create activation records for them. We do this by rewriting the block as
!    --  a procedure, followed by a call to it in the same declarative list, to
!    --  replicate the semantics of the original block.
!    --
!    --  A common source for such block is a transient block created for a
!    --  construct (declaration, assignment, etc.) that involves controlled
!    --  actions or secondary-stack management, in which case the nested
!    --  subprogram is a finalizer.
! 
!    procedure Unnest_Loop (Loop_Stmt : Node_Id);
!    --  Top-level Loops that contain nested subprograms with up-level references
!    --  need to have activation records. We do this by rewriting the loop as a
!    --  procedure containing the loop, followed by a call to the procedure in
!    --  the same library-level declarative list, to replicate the semantics of
!    --  the original loop. Such loops can occur due to aggregate expansions and
!    --  other constructs.
  
     procedure Check_Visibly_Controlled
       (Prim : Final_Primitives;
*************** package body Exp_Ch7 is
*** 397,405 ****
     --  name. Before generating the proper call to one of these operations we
     --  check whether Typ is known to be controlled at the point of definition.
     --  If it is not then we must retrieve the hidden operation of the parent
!    --  and use it instead.  This is one case that might be solved more cleanly
     --  once Overriding pragmas or declarations are in place.
  
     function Convert_View
       (Proc : Entity_Id;
        Arg  : Node_Id;
--- 420,432 ----
     --  name. Before generating the proper call to one of these operations we
     --  check whether Typ is known to be controlled at the point of definition.
     --  If it is not then we must retrieve the hidden operation of the parent
!    --  and use it instead. This is one case that might be solved more cleanly
     --  once Overriding pragmas or declarations are in place.
  
+    function Contains_Subprogram (Blk : Entity_Id) return Boolean;
+    --  Check recursively whether a loop or block contains a subprogram that
+    --  may need an activation record.
+ 
     function Convert_View
       (Proc : Entity_Id;
        Arg  : Node_Id;
*************** package body Exp_Ch7 is
*** 2035,2040 ****
--- 2062,2074 ----
  
              Analyze (Fin_Body, Suppress => All_Checks);
           end if;
+ 
+          --  Never consider that the finalizer procedure is enabled Ghost, even
+          --  when the corresponding unit is Ghost, as this would lead to an
+          --  an external name with a ___ghost_ prefix that the binder cannot
+          --  generate, as it has no knowledge of the Ghost status of units.
+ 
+          Set_Is_Checked_Ghost_Entity (Fin_Id, False);
        end Create_Finalizer;
  
        --------------------------
*************** package body Exp_Ch7 is
*** 3873,3879 ****
                              Attribute_Name  => Name_Range,
                              Expressions     => New_List (
                                Make_Integer_Literal (Loc, Dim))))),
!                 Statements       =>  Free_One_Dimension (Dim + 1)));
           end if;
        end Free_One_Dimension;
  
--- 3907,3913 ----
                              Attribute_Name  => Name_Range,
                              Expressions     => New_List (
                                Make_Integer_Literal (Loc, Dim))))),
!                 Statements       => Free_One_Dimension (Dim + 1)));
           end if;
        end Free_One_Dimension;
  
*************** package body Exp_Ch7 is
*** 3893,3903 ****
        Typ  : Entity_Id) return List_Id
     is
        Loc   : constant Source_Ptr := Sloc (N);
-       Tsk   : Node_Id;
-       Comp  : Entity_Id;
        Stmts : constant List_Id    := New_List;
        U_Typ : constant Entity_Id  := Underlying_Type (Typ);
  
     begin
        if Has_Discriminants (U_Typ)
          and then Nkind (Parent (U_Typ)) = N_Full_Type_Declaration
--- 3927,3938 ----
        Typ  : Entity_Id) return List_Id
     is
        Loc   : constant Source_Ptr := Sloc (N);
        Stmts : constant List_Id    := New_List;
        U_Typ : constant Entity_Id  := Underlying_Type (Typ);
  
+       Comp : Entity_Id;
+       Tsk  : Node_Id;
+ 
     begin
        if Has_Discriminants (U_Typ)
          and then Nkind (Parent (U_Typ)) = N_Full_Type_Declaration
*************** package body Exp_Ch7 is
*** 3918,3924 ****
           return New_List (Make_Null_Statement (Loc));
        end if;
  
!       Comp := First_Component (Typ);
        while Present (Comp) loop
           if Has_Task (Etype (Comp))
             or else Has_Simple_Protected_Object (Etype (Comp))
--- 3953,3959 ----
           return New_List (Make_Null_Statement (Loc));
        end if;
  
!       Comp := First_Component (U_Typ);
        while Present (Comp) loop
           if Has_Task (Etype (Comp))
             or else Has_Simple_Protected_Object (Etype (Comp))
*************** package body Exp_Ch7 is
*** 3937,3944 ****
  
              elsif Is_Record_Type (Etype (Comp)) then
  
!                --  Recurse, by generating the prefix of the argument to
!                --  the eventual cleanup call.
  
                 Append_List_To (Stmts, Cleanup_Record (N, Tsk, Etype (Comp)));
  
--- 3972,3979 ----
  
              elsif Is_Record_Type (Etype (Comp)) then
  
!                --  Recurse, by generating the prefix of the argument to the
!                --  eventual cleanup call.
  
                 Append_List_To (Stmts, Cleanup_Record (N, Tsk, Etype (Comp)));
  
*************** package body Exp_Ch7 is
*** 4012,4038 ****
     --------------------------------------
  
     procedure Check_Unnesting_Elaboration_Code (N : Node_Id) is
!       Loc       : constant Source_Ptr := Sloc (N);
!       First_Ent : Entity_Id := Empty;
!       Loop_Id   : Entity_Id := Empty;
  
!       function First_Local_Scope (L : List_Id) return Entity_Id;
!       --  Find first entity in the elaboration code of the body that contains
!       --  or represents a subprogram body. A body can appear within a block or
!       --  a loop or can appear by itself if generated for an object declaration
!       --  that involves controlled actions. The first such entity encountered
!       --  is used to reset the scopes of all entities that become local to the
!       --  new elaboration procedure. This is needed for subsequent unnesting,
!       --  which depends on the scope links to determine the nesting level of
!       --  each subprogram.
  
        -----------------------
        --  Find_Local_Scope --
        -----------------------
  
!       function First_Local_Scope (L : List_Id) return Entity_Id is
           Id   : Entity_Id;
-          Scop : Entity_Id;
           Stat : Node_Id;
  
        begin
--- 4047,4085 ----
     --------------------------------------
  
     procedure Check_Unnesting_Elaboration_Code (N : Node_Id) is
!       Loc             : constant Source_Ptr := Sloc (N);
!       Block_Elab_Proc : Entity_Id           := Empty;
  
!       procedure Set_Block_Elab_Proc;
!       --  Create a defining identifier for a procedure that will replace
!       --  a block with nested subprograms (unless it has already been created,
!       --  in which case this is a no-op).
! 
!       procedure Set_Block_Elab_Proc is
!       begin
!          if No (Block_Elab_Proc) then
!             Block_Elab_Proc :=
!               Make_Defining_Identifier (Loc, Chars => New_Internal_Name ('I'));
!          end if;
!       end Set_Block_Elab_Proc;
! 
!       procedure Reset_Scopes_To_Block_Elab_Proc (L : List_Id);
!       --  Find entities in the elaboration code of a library package body that
!       --  contain or represent a subprogram body. A body can appear within a
!       --  block or a loop or can appear by itself if generated for an object
!       --  declaration that involves controlled actions. The first such entity
!       --  forces creation of a new procedure entity (via Set_Block_Elab_Proc)
!       --  that will be used to reset the scopes of all entities that become
!       --  local to the new elaboration procedure. This is needed for subsequent
!       --  unnesting actions, which depend on proper setting of the Scope links
!       --  to determine the nesting level of each subprogram.
  
        -----------------------
        --  Find_Local_Scope --
        -----------------------
  
!       procedure Reset_Scopes_To_Block_Elab_Proc (L : List_Id) is
           Id   : Entity_Id;
           Stat : Node_Id;
  
        begin
*************** package body Exp_Ch7 is
*** 4042,4082 ****
                 when N_Block_Statement =>
                    Id := Entity (Identifier (Stat));
  
!                   if No (First_Ent) then
!                      First_Ent := Id;
!                   end if;
  
                    if Present (Id) and then Contains_Subprogram (Id) then
!                      return Id;
                    end if;
  
                 when N_Loop_Statement =>
                    Id := Entity (Identifier (Stat));
  
!                   if No (First_Ent) then
!                      First_Ent := Id;
!                   end if;
! 
!                   if Contains_Subprogram (Id) then
                       if Scope (Id) = Current_Scope then
!                         Loop_Id := Id;
                       end if;
- 
-                      return Id;
                    end if;
  
!                when N_If_Statement =>
!                   Scop := First_Local_Scope (Then_Statements (Stat));
  
!                   if Present (Scop) then
!                      return Scop;
!                   end if;
  
!                   Scop := First_Local_Scope (Else_Statements (Stat));
  
!                   if Present (Scop) then
!                      return Scop;
!                   end if;
  
                    declare
                       Elif : Node_Id;
--- 4089,4124 ----
                 when N_Block_Statement =>
                    Id := Entity (Identifier (Stat));
  
!                   --  The Scope of this block needs to be reset to the new
!                   --  procedure if the block contains nested subprograms.
  
                    if Present (Id) and then Contains_Subprogram (Id) then
!                      Set_Block_Elab_Proc;
!                      Set_Scope (Id, Block_Elab_Proc);
                    end if;
  
                 when N_Loop_Statement =>
                    Id := Entity (Identifier (Stat));
  
!                   if Present (Id) and then Contains_Subprogram (Id) then
                       if Scope (Id) = Current_Scope then
!                         Set_Block_Elab_Proc;
!                         Set_Scope (Id, Block_Elab_Proc);
                       end if;
                    end if;
  
!                   --  We traverse the loop's statements as well, which may
!                   --  include other block (etc.) statements that need to have
!                   --  their Scope set to Block_Elab_Proc. (Is this really the
!                   --  case, or do such nested blocks refer to the loop scope
!                   --  rather than the loop's enclosing scope???.)
  
!                   Reset_Scopes_To_Block_Elab_Proc (Statements (Stat));
  
!                when N_If_Statement =>
!                   Reset_Scopes_To_Block_Elab_Proc (Then_Statements (Stat));
  
!                   Reset_Scopes_To_Block_Elab_Proc (Else_Statements (Stat));
  
                    declare
                       Elif : Node_Id;
*************** package body Exp_Ch7 is
*** 4084,4094 ****
                    begin
                       Elif := First (Elsif_Parts (Stat));
                       while Present (Elif) loop
!                         Scop := First_Local_Scope (Statements (Elif));
! 
!                         if Present (Scop) then
!                            return Scop;
!                         end if;
  
                          Next (Elif);
                       end loop;
--- 4126,4133 ----
                    begin
                       Elif := First (Elsif_Parts (Stat));
                       while Present (Elif) loop
!                         Reset_Scopes_To_Block_Elab_Proc
!                           (Then_Statements (Elif));
  
                          Next (Elif);
                       end loop;
*************** package body Exp_Ch7 is
*** 4101,4124 ****
                    begin
                       Alt := First (Alternatives (Stat));
                       while Present (Alt) loop
!                         Scop := First_Local_Scope (Statements (Alt));
! 
!                         if Present (Scop) then
!                            return Scop;
!                         end if;
  
                          Next (Alt);
                       end loop;
                    end;
  
                 when N_Subprogram_Body =>
                    Id := Defining_Entity (Stat);
  
!                   if No (First_Ent) then
!                      First_Ent := Id;
!                   end if;
! 
!                   return Id;
  
                 when others =>
                    null;
--- 4140,4158 ----
                    begin
                       Alt := First (Alternatives (Stat));
                       while Present (Alt) loop
!                         Reset_Scopes_To_Block_Elab_Proc (Statements (Alt));
  
                          Next (Alt);
                       end loop;
                    end;
  
+                --  Reset the Scope of a subprogram occurring at the top level
+ 
                 when N_Subprogram_Body =>
                    Id := Defining_Entity (Stat);
  
!                   Set_Block_Elab_Proc;
!                   Set_Scope (Id, Block_Elab_Proc);
  
                 when others =>
                    null;
*************** package body Exp_Ch7 is
*** 4126,4192 ****
  
              Next (Stat);
           end loop;
! 
!          return Empty;
!       end First_Local_Scope;
  
        --  Local variables
  
        H_Seq     : constant Node_Id := Handled_Statement_Sequence (N);
        Elab_Body : Node_Id;
        Elab_Call : Node_Id;
-       Elab_Proc : Entity_Id;
-       Ent       : Entity_Id;
  
     --  Start of processing for Check_Unnesting_Elaboration_Code
  
     begin
!       if Unnest_Subprogram_Mode
!         and then Present (H_Seq)
!         and then Is_Compilation_Unit (Current_Scope)
!       then
!          Ent := First_Local_Scope (Statements (H_Seq));
  
!          --  There msy be subprograms declared in the exception handlers
           --  of the current body.
  
!          if No (Ent) and then Present (Exception_Handlers (H_Seq)) then
              declare
                 Handler : Node_Id := First (Exception_Handlers (H_Seq));
              begin
                 while Present (Handler) loop
!                   Ent := First_Local_Scope (Statements (Handler));
!                   if Present (Ent) then
!                      First_Ent := Ent;
!                      exit;
!                   end if;
  
                    Next (Handler);
                 end loop;
              end;
           end if;
  
!          if Present (Ent) then
!             Elab_Proc :=
!               Make_Defining_Identifier (Loc,
!                 Chars => New_Internal_Name ('I'));
! 
              Elab_Body :=
                Make_Subprogram_Body (Loc,
                  Specification              =>
                    Make_Procedure_Specification (Loc,
!                     Defining_Unit_Name => Elab_Proc),
                  Declarations               => New_List,
                  Handled_Statement_Sequence =>
                    Relocate_Node (Handled_Statement_Sequence (N)));
  
              Elab_Call :=
                Make_Procedure_Call_Statement (Loc,
!                 Name => New_Occurrence_Of (Elab_Proc, Loc));
  
              Append_To (Declarations (N), Elab_Body);
              Analyze (Elab_Body);
!             Set_Has_Nested_Subprogram (Elab_Proc);
  
              Set_Handled_Statement_Sequence (N,
                Make_Handled_Sequence_Of_Statements (Loc,
--- 4160,4211 ----
  
              Next (Stat);
           end loop;
!       end Reset_Scopes_To_Block_Elab_Proc;
  
        --  Local variables
  
        H_Seq     : constant Node_Id := Handled_Statement_Sequence (N);
        Elab_Body : Node_Id;
        Elab_Call : Node_Id;
  
     --  Start of processing for Check_Unnesting_Elaboration_Code
  
     begin
!       if Present (H_Seq) then
!          Reset_Scopes_To_Block_Elab_Proc (Statements (H_Seq));
  
!          --  There may be subprograms declared in the exception handlers
           --  of the current body.
  
!          if Present (Exception_Handlers (H_Seq)) then
              declare
                 Handler : Node_Id := First (Exception_Handlers (H_Seq));
              begin
                 while Present (Handler) loop
!                   Reset_Scopes_To_Block_Elab_Proc (Statements (Handler));
  
                    Next (Handler);
                 end loop;
              end;
           end if;
  
!          if Present (Block_Elab_Proc) then
              Elab_Body :=
                Make_Subprogram_Body (Loc,
                  Specification              =>
                    Make_Procedure_Specification (Loc,
!                     Defining_Unit_Name => Block_Elab_Proc),
                  Declarations               => New_List,
                  Handled_Statement_Sequence =>
                    Relocate_Node (Handled_Statement_Sequence (N)));
  
              Elab_Call :=
                Make_Procedure_Call_Statement (Loc,
!                 Name => New_Occurrence_Of (Block_Elab_Proc, Loc));
  
              Append_To (Declarations (N), Elab_Body);
              Analyze (Elab_Body);
!             Set_Has_Nested_Subprogram (Block_Elab_Proc);
  
              Set_Handled_Statement_Sequence (N,
                Make_Handled_Sequence_Of_Statements (Loc,
*************** package body Exp_Ch7 is
*** 4194,4278 ****
  
              Analyze (Elab_Call);
  
!             --  The scope of all blocks and loops in the elaboration code is
!             --  now the constructed elaboration procedure. Nested subprograms
!             --  within those blocks will have activation records if they
!             --  contain references to entities in the enclosing block or
!             --  the package itself.
! 
!             Ent := First_Ent;
!             while Present (Ent) loop
!                Set_Scope (Ent, Elab_Proc);
!                Next_Entity (Ent);
!             end loop;
! 
!             if Present (Loop_Id) then
!                Set_Scope (Loop_Id, Elab_Proc);
!             end if;
           end if;
        end if;
     end Check_Unnesting_Elaboration_Code;
  
!    -------------------------------------
!    -- Check_Unnesting_In_Declarations --
!    -------------------------------------
  
!    procedure Check_Unnesting_In_Declarations (Decls : List_Id) is
!       Decl       : Node_Id;
!       Ent        : Entity_Id;
!       Loc        : Source_Ptr;
!       Local_Body : Node_Id;
!       Local_Call : Node_Id;
!       Local_Proc : Entity_Id;
  
     begin
-       Local_Call := Empty;
- 
        if Unnest_Subprogram_Mode
!         and then Present (Decls)
!         and then Is_Compilation_Unit (Current_Scope)
        then
!          Decl := First (Decls);
!          while Present (Decl) loop
!             if Nkind (Decl) = N_Block_Statement
!                and then Contains_Subprogram (Entity (Identifier (Decl)))
              then
!                Ent := First_Entity (Entity (Identifier (Decl)));
!                Loc := Sloc (Decl);
!                Local_Proc :=
!                  Make_Defining_Identifier (Loc,
!                    Chars => New_Internal_Name ('P'));
  
!                Local_Body :=
!                  Make_Subprogram_Body (Loc,
!                    Specification              =>
!                      Make_Procedure_Specification (Loc,
!                        Defining_Unit_Name => Local_Proc),
!                        Declarations       => Declarations (Decl),
!                    Handled_Statement_Sequence =>
!                      Handled_Statement_Sequence (Decl));
  
!                Rewrite (Decl, Local_Body);
!                Analyze (Decl);
!                Set_Has_Nested_Subprogram (Local_Proc);
  
!                Local_Call :=
!                  Make_Procedure_Call_Statement (Loc,
!                    Name => New_Occurrence_Of (Local_Proc, Loc));
  
!                Insert_After (Decl, Local_Call);
!                Analyze (Local_Call);
  
!                while Present (Ent) loop
!                   Set_Scope (Ent, Local_Proc);
!                   Next_Entity (Ent);
!                end loop;
              end if;
  
!             Next (Decl);
           end loop;
        end if;
!    end Check_Unnesting_In_Declarations;
  
     ------------------------------
     -- Check_Visibly_Controlled --
--- 4213,4310 ----
  
              Analyze (Elab_Call);
  
!             --  Could we reset the scopes of entities associated with the new
!             --  procedure here via a loop over entities rather than doing it in
!             --  the recursive Reset_Scopes_To_Elab_Proc procedure???
           end if;
        end if;
     end Check_Unnesting_Elaboration_Code;
  
!    ---------------------------------------
!    -- Check_Unnesting_In_Decls_Or_Stmts --
!    ---------------------------------------
  
!    procedure Check_Unnesting_In_Decls_Or_Stmts (Decls_Or_Stmts : List_Id) is
!       Decl_Or_Stmt : Node_Id;
  
     begin
        if Unnest_Subprogram_Mode
!         and then Present (Decls_Or_Stmts)
        then
!          Decl_Or_Stmt := First (Decls_Or_Stmts);
!          while Present (Decl_Or_Stmt) loop
!             if Nkind (Decl_Or_Stmt) = N_Block_Statement
!               and then Contains_Subprogram (Entity (Identifier (Decl_Or_Stmt)))
              then
!                Unnest_Block (Decl_Or_Stmt);
  
!             elsif Nkind (Decl_Or_Stmt) = N_Loop_Statement then
!                declare
!                   Id : constant Entity_Id :=
!                          Entity (Identifier (Decl_Or_Stmt));
  
!                begin
!                   --  When a top-level loop within declarations of a library
!                   --  package spec or body contains nested subprograms, we wrap
!                   --  it in a procedure to handle possible up-level references
!                   --  to entities associated with the loop (such as loop
!                   --  parameters).
  
!                   if Present (Id) and then Contains_Subprogram (Id) then
!                      Unnest_Loop (Decl_Or_Stmt);
!                   end if;
!                end;
  
!             elsif Nkind (Decl_Or_Stmt) = N_Package_Declaration
!               and then not Modify_Tree_For_C
!             then
!                Check_Unnesting_In_Decls_Or_Stmts
!                  (Visible_Declarations (Specification (Decl_Or_Stmt)));
!                Check_Unnesting_In_Decls_Or_Stmts
!                  (Private_Declarations (Specification (Decl_Or_Stmt)));
  
!             elsif Nkind (Decl_Or_Stmt) = N_Package_Body
!               and then not Modify_Tree_For_C
!             then
!                Check_Unnesting_In_Decls_Or_Stmts (Declarations (Decl_Or_Stmt));
!                if Present (Statements
!                     (Handled_Statement_Sequence (Decl_Or_Stmt)))
!                then
!                   Check_Unnesting_In_Decls_Or_Stmts (Statements
!                     (Handled_Statement_Sequence (Decl_Or_Stmt)));
!                   Check_Unnesting_In_Handlers (Decl_Or_Stmt);
!                end if;
              end if;
  
!             Next (Decl_Or_Stmt);
           end loop;
        end if;
!    end Check_Unnesting_In_Decls_Or_Stmts;
! 
!    ---------------------------------
!    -- Check_Unnesting_In_Handlers --
!    ---------------------------------
! 
!    procedure Check_Unnesting_In_Handlers (N : Node_Id) is
!       Stmt_Seq : constant Node_Id := Handled_Statement_Sequence (N);
! 
!    begin
!       if Present (Stmt_Seq)
!         and then Present (Exception_Handlers (Stmt_Seq))
!       then
!          declare
!             Handler : Node_Id := First (Exception_Handlers (Stmt_Seq));
!          begin
!             while Present (Handler) loop
!                if Present (Statements (Handler)) then
!                   Check_Unnesting_In_Decls_Or_Stmts (Statements (Handler));
!                end if;
! 
!                Next (Handler);
!             end loop;
!          end;
!       end if;
!    end Check_Unnesting_In_Handlers;
  
     ------------------------------
     -- Check_Visibly_Controlled --
*************** package body Exp_Ch7 is
*** 5028,5035 ****
           --  end of the body statements.
  
           Expand_Pragma_Initial_Condition (Spec_Id, N);
!          Check_Unnesting_Elaboration_Code (N);
!          Check_Unnesting_In_Declarations (Declarations (N));
  
           Pop_Scope;
        end if;
--- 5060,5079 ----
           --  end of the body statements.
  
           Expand_Pragma_Initial_Condition (Spec_Id, N);
! 
!          --  If this is a library-level package and unnesting is enabled,
!          --  check for the presence of blocks with nested subprograms occurring
!          --  in elaboration code, and generate procedures to encapsulate the
!          --  blocks in case the nested subprograms make up-level references.
! 
!          if Unnest_Subprogram_Mode
!            and then
!              Is_Library_Level_Entity (Current_Scope)
!          then
!             Check_Unnesting_Elaboration_Code (N);
!             Check_Unnesting_In_Decls_Or_Stmts (Declarations (N));
!             Check_Unnesting_In_Handlers (N);
!          end if;
  
           Pop_Scope;
        end if;
*************** package body Exp_Ch7 is
*** 5187,5194 ****
  
           Set_Finalizer (Id, Fin_Id);
        end if;
!       Check_Unnesting_In_Declarations (Visible_Declarations (Spec));
!       Check_Unnesting_In_Declarations (Private_Declarations (Spec));
     end Expand_N_Package_Declaration;
  
     ----------------------------
--- 5231,5248 ----
  
           Set_Finalizer (Id, Fin_Id);
        end if;
! 
!       --  If this is a library-level package and unnesting is enabled,
!       --  check for the presence of blocks with nested subprograms occurring
!       --  in elaboration code, and generate procedures to encapsulate the
!       --  blocks in case the nested subprograms make up-level references.
! 
!       if Unnest_Subprogram_Mode
!         and then Is_Library_Level_Entity (Current_Scope)
!       then
!          Check_Unnesting_In_Decls_Or_Stmts (Visible_Declarations (Spec));
!          Check_Unnesting_In_Decls_Or_Stmts (Private_Declarations (Spec));
!       end if;
     end Expand_N_Package_Declaration;
  
     ----------------------------
*************** package body Exp_Ch7 is
*** 9171,9176 ****
--- 9225,9347 ----
        Store_Actions_In_Scope (Cleanup, L);
     end Store_Cleanup_Actions_In_Scope;
  
+    ------------------
+    -- Unnest_Block --
+    ------------------
+ 
+    procedure Unnest_Block (Decl : Node_Id) is
+       Loc        : constant Source_Ptr := Sloc (Decl);
+       Ent        : Entity_Id;
+       Local_Body : Node_Id;
+       Local_Call : Node_Id;
+       Local_Proc : Entity_Id;
+       Local_Scop : Entity_Id;
+ 
+    begin
+       Local_Scop := Entity (Identifier (Decl));
+       Ent := First_Entity (Local_Scop);
+ 
+       Local_Proc :=
+         Make_Defining_Identifier (Loc,
+           Chars => New_Internal_Name ('P'));
+ 
+       Local_Body :=
+         Make_Subprogram_Body (Loc,
+           Specification              =>
+             Make_Procedure_Specification (Loc,
+               Defining_Unit_Name => Local_Proc),
+               Declarations       => Declarations (Decl),
+           Handled_Statement_Sequence =>
+             Handled_Statement_Sequence (Decl));
+ 
+       Rewrite (Decl, Local_Body);
+       Analyze (Decl);
+       Set_Has_Nested_Subprogram (Local_Proc);
+ 
+       Local_Call :=
+         Make_Procedure_Call_Statement (Loc,
+           Name => New_Occurrence_Of (Local_Proc, Loc));
+ 
+       Insert_After (Decl, Local_Call);
+       Analyze (Local_Call);
+ 
+       --  The new subprogram has the same scope as the original block
+ 
+       Set_Scope (Local_Proc, Scope (Local_Scop));
+ 
+       --  And the entity list of the new procedure is that of the block
+ 
+       Set_First_Entity (Local_Proc, Ent);
+ 
+       --  Reset the scopes of all the entities to the new procedure
+ 
+       while Present (Ent) loop
+          Set_Scope (Ent, Local_Proc);
+          Next_Entity (Ent);
+       end loop;
+    end Unnest_Block;
+ 
+    -----------------
+    -- Unnest_Loop --
+    -----------------
+ 
+    procedure Unnest_Loop (Loop_Stmt : Node_Id) is
+       Loc        : constant Source_Ptr := Sloc (Loop_Stmt);
+       Ent        : Entity_Id;
+       Local_Body : Node_Id;
+       Local_Call : Node_Id;
+       Local_Proc : Entity_Id;
+       Local_Scop : Entity_Id;
+       Loop_Copy  : constant Node_Id :=
+                      Relocate_Node (Loop_Stmt);
+    begin
+       Local_Scop := Entity (Identifier (Loop_Stmt));
+       Ent := First_Entity (Local_Scop);
+ 
+       Local_Proc :=
+         Make_Defining_Identifier (Loc,
+           Chars => New_Internal_Name ('P'));
+ 
+       Local_Body :=
+         Make_Subprogram_Body (Loc,
+           Specification              =>
+             Make_Procedure_Specification (Loc,
+               Defining_Unit_Name => Local_Proc),
+               Declarations       => Empty_List,
+           Handled_Statement_Sequence =>
+             Make_Handled_Sequence_Of_Statements (Loc,
+               Statements => New_List (Loop_Copy)));
+ 
+       Set_First_Real_Statement
+         (Handled_Statement_Sequence (Local_Body), Loop_Copy);
+ 
+       Rewrite (Loop_Stmt, Local_Body);
+       Analyze (Loop_Stmt);
+ 
+       Set_Has_Nested_Subprogram (Local_Proc);
+ 
+       Local_Call :=
+         Make_Procedure_Call_Statement (Loc,
+           Name => New_Occurrence_Of (Local_Proc, Loc));
+ 
+       Insert_After (Loop_Stmt, Local_Call);
+       Analyze (Local_Call);
+ 
+       --  New procedure has the same scope as the original loop, and the scope
+       --  of the loop is the new procedure.
+ 
+       Set_Scope (Local_Proc, Scope (Local_Scop));
+       Set_Scope (Local_Scop, Local_Proc);
+ 
+       --  The entity list of the new procedure is that of the loop
+ 
+       Set_First_Entity (Local_Proc, Ent);
+ 
+       --  Note that the entities associated with the loop don't need to have
+       --  their Scope fields reset, since they're still associated with the
+       --  same loop entity that now belongs to the copied loop statement.
+    end Unnest_Loop;
+ 
     --------------------------------
     -- Wrap_Transient_Declaration --
     --------------------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_ch8.adb gcc-10.1.0/gcc/ada/exp_ch8.adb
*** gcc-9.3.0/gcc/ada/exp_ch8.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_ch8.adb	Thu May  7 10:49:59 2020
*************** package body Exp_Ch8 is
*** 72,78 ****
     --  clause applies (that can specify an arbitrary bit boundary), or where
     --  the enclosing record itself has a non-standard representation.
  
!    --  In these two cases, we pre-evaluate the renaming expression, by
     --  extracting and freezing the values of any subscripts, and then we
     --  set the flag Is_Renaming_Of_Object which means that any reference
     --  to the object will be handled by macro substitution in the front
--- 72,85 ----
     --  clause applies (that can specify an arbitrary bit boundary), or where
     --  the enclosing record itself has a non-standard representation.
  
!    --  In Ada 2020, a third case arises when the renamed object is a nonatomic
!    --  subcomponent of an atomic object, because reads of or writes to it must
!    --  access the enclosing atomic object. That's also the case for an object
!    --  subject to the Volatile_Full_Access GNAT aspect/pragma in any language
!    --  version. For the sake of simplicity, we treat any subcomponent of an
!    --  atomic or Volatile_Full_Access object in any language version this way.
! 
!    --  In these three cases, we pre-evaluate the renaming expression, by
     --  extracting and freezing the values of any subscripts, and then we
     --  set the flag Is_Renaming_Of_Object which means that any reference
     --  to the object will be handled by macro substitution in the front
*************** package body Exp_Ch8 is
*** 102,111 ****
        --  Determines whether it is necessary to do static name evaluation for
        --  renaming of Nam. It is considered necessary if evaluating the name
        --  involves indexing a packed array, or extracting a component of a
!       --  record to which a component clause applies. Note that we are only
!       --  interested in these operations if they occur as part of the name
!       --  itself, subscripts are just values that are computed as part of the
!       --  evaluation, so their form is unimportant.
        --  In addition, always return True for Modify_Tree_For_C since the
        --  code generator doesn't know how to handle renamings.
  
--- 109,118 ----
        --  Determines whether it is necessary to do static name evaluation for
        --  renaming of Nam. It is considered necessary if evaluating the name
        --  involves indexing a packed array, or extracting a component of a
!       --  record to which a component clause applies, or a subcomponent of an
!       --  atomic object. Note that we are only interested in these operations
!       --  if they occur as part of the name itself, subscripts are just values
!       --  that are computed as part of the evaluation, so they are unimportant.
        --  In addition, always return True for Modify_Tree_For_C since the
        --  code generator doesn't know how to handle renamings.
  
*************** package body Exp_Ch8 is
*** 121,126 ****
--- 128,137 ----
           elsif Nkind_In (Nam, N_Indexed_Component, N_Slice) then
              if Is_Packed (Etype (Prefix (Nam))) then
                 return True;
+ 
+             elsif Is_Atomic_Or_VFA_Object (Prefix (Nam)) then
+                return True;
+ 
              else
                 return Evaluation_Required (Prefix (Nam));
              end if;
*************** package body Exp_Ch8 is
*** 141,146 ****
--- 152,160 ----
                 then
                    return True;
  
+                elsif Is_Atomic_Or_VFA_Object (Prefix (Nam)) then
+                   return True;
+ 
                 else
                    return Evaluation_Required (Prefix (Nam));
                 end if;
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_ch9.adb gcc-10.1.0/gcc/ada/exp_ch9.adb
*** gcc-9.3.0/gcc/ada/exp_ch9.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_ch9.adb	Thu May  7 10:49:59 2020
*************** with Rident;   use Rident;
*** 48,53 ****
--- 48,54 ----
  with Rtsfind;  use Rtsfind;
  with Sem;      use Sem;
  with Sem_Aux;  use Sem_Aux;
+ with Sem_Ch5;  use Sem_Ch5;
  with Sem_Ch6;  use Sem_Ch6;
  with Sem_Ch8;  use Sem_Ch8;
  with Sem_Ch9;  use Sem_Ch9;
*************** package body Exp_Ch9 is
*** 362,368 ****
     --  a null trailing statement with the given Loc (which is the sloc of
     --  the accept, delay, or entry call statement). There might not be any
     --  generated code for the accept, delay, or entry call itself (the effect
!    --  of these statements is part of the general processsing done for the
     --  enclosing selective accept, timed entry call, or asynchronous select),
     --  and the null statement is there to carry the sloc of that statement to
     --  the back-end for trace-based coverage analysis purposes.
--- 363,369 ----
     --  a null trailing statement with the given Loc (which is the sloc of
     --  the accept, delay, or entry call statement). There might not be any
     --  generated code for the accept, delay, or entry call itself (the effect
!    --  of these statements is part of the general processing done for the
     --  enclosing selective accept, timed entry call, or asynchronous select),
     --  and the null statement is there to carry the sloc of that statement to
     --  the back-end for trace-based coverage analysis purposes.
*************** package body Exp_Ch9 is
*** 477,488 ****
     --    <actualN> := P.<formalN>;
  
     procedure Reset_Scopes_To (Bod : Node_Id; E : Entity_Id);
!    --  Reset the scope of declarations and blocks at the top level of Bod
!    --  to be E. Bod is either a block or a subprogram body.  Used after
!    --  expanding various kinds of entry bodies into their corresponding
!    --  constructs. This is needed during unnesting to determine whether a
!    --  body generated for an entry or an accept alternative includes uplevel
!    --  references.
  
     function Trivial_Accept_OK return Boolean;
     --  If there is no DO-END block for an accept, or if the DO-END block has
--- 478,488 ----
     --    <actualN> := P.<formalN>;
  
     procedure Reset_Scopes_To (Bod : Node_Id; E : Entity_Id);
!    --  Reset the scope of declarations and blocks at the top level of Bod to
!    --  be E. Bod is either a block or a subprogram body. Used after expanding
!    --  various kinds of entry bodies into their corresponding constructs. This
!    --  is needed during unnesting to determine whether a body generated for an
!    --  entry or an accept alternative includes uplevel references.
  
     function Trivial_Accept_OK return Boolean;
     --  If there is no DO-END block for an accept, or if the DO-END block has
*************** package body Exp_Ch9 is
*** 869,875 ****
            Make_Implicit_Exception_Handler (Loc,
              Exception_Choices => New_List (Ohandle),
  
!             Statements =>  New_List (
                Make_Procedure_Call_Statement (Sloc (Stats),
                  Name                   => New_Occurrence_Of (
                    RTE (RE_Exceptional_Complete_Rendezvous), Sloc (Stats)),
--- 869,875 ----
            Make_Implicit_Exception_Handler (Loc,
              Exception_Choices => New_List (Ohandle),
  
!             Statements => New_List (
                Make_Procedure_Call_Statement (Sloc (Stats),
                  Name                   => New_Occurrence_Of (
                    RTE (RE_Exceptional_Complete_Rendezvous), Sloc (Stats)),
*************** package body Exp_Ch9 is
*** 3494,3499 ****
--- 3494,3501 ----
        procedure Move_Pragmas (From : Node_Id; To : Node_Id);
        --  Find all suitable source pragmas at the top of subprogram body From's
        --  declarations and insert them after arbitrary node To.
+       --
+       --  Very similar to Move_Pragmas in sem_ch6 ???
  
        ---------------------
        -- Analyze_Pragmas --
*************** package body Exp_Ch9 is
*** 3545,3551 ****
  
              Next_Decl := Next (Decl);
  
!             if Nkind (Decl) = N_Pragma then
                 Remove (Decl);
                 Insert_After (Insert_Nod, Decl);
                 Insert_Nod := Decl;
--- 3547,3560 ----
  
              Next_Decl := Next (Decl);
  
!             --  We add an exception here for Unreferenced pragmas since the
!             --  internally generated spec gets analyzed within
!             --  Build_Private_Protected_Declaration and will lead to spurious
!             --  warnings due to the way references are checked.
! 
!             if Nkind (Decl) = N_Pragma
!               and then Pragma_Name_Unmapped (Decl) /= Name_Unreferenced
!             then
                 Remove (Decl);
                 Insert_After (Insert_Nod, Decl);
                 Insert_Nod := Decl;
*************** package body Exp_Ch9 is
*** 3714,3719 ****
--- 3723,3739 ----
              Declarations               => Decls,
              Handled_Statement_Sequence => Handled_Statement_Sequence (N)));
  
+       --  Analyze now and reset scopes for declarations so that Scope fields
+       --  currently denoting the entry will now denote the block scope, and
+       --  the block's scope will be set to the new procedure entity.
+ 
+       Analyze_Statements (Bod_Stmts);
+ 
+       Set_Scope (Entity (Identifier (First (Bod_Stmts))), Bod_Id);
+ 
+       Reset_Scopes_To
+         (First (Bod_Stmts), Entity (Identifier (First (Bod_Stmts))));
+ 
        case Corresponding_Runtime_Package (Pid) is
           when System_Tasking_Protected_Objects_Entries =>
              Append_To (Bod_Stmts,
*************** package body Exp_Ch9 is
*** 3792,3798 ****
                     Make_Implicit_Exception_Handler (EH_Loc,
                       Exception_Choices => New_List (Ohandle),
  
!                      Statements        =>  New_List (
                         Make_Procedure_Call_Statement (EH_Loc,
                           Name                   => Complete,
                           Parameter_Associations => New_List (
--- 3812,3818 ----
                     Make_Implicit_Exception_Handler (EH_Loc,
                       Exception_Choices => New_List (Ohandle),
  
!                      Statements        => New_List (
                         Make_Procedure_Call_Statement (EH_Loc,
                           Name                   => Complete,
                           Parameter_Associations => New_List (
*************** package body Exp_Ch9 is
*** 3887,3892 ****
--- 3907,3913 ----
  
           if Unprotected then
              Set_Protected_Formal (Formal, Defining_Identifier (New_Param));
+             Set_Ekind (Defining_Identifier (New_Param), Ekind (Formal));
           end if;
  
           Append (New_Param, New_Plist);
*************** package body Exp_Ch9 is
*** 6615,6620 ****
--- 6636,6648 ----
               Declarations               => Declarations (N),
               Handled_Statement_Sequence => Build_Accept_Body (N));
  
+          --  Reset the Scope of local entities associated with the accept
+          --  statement (that currently reference the entry scope) to the
+          --  block scope, to avoid having references to the locals treated
+          --  as up-level references.
+ 
+          Reset_Scopes_To (Block, Blkent);
+ 
           --  For the analysis of the generated declarations, the parent node
           --  must be properly set.
  
*************** package body Exp_Ch9 is
*** 8919,8924 ****
--- 8947,8954 ----
        Current_Node : Node_Id := N;
        E_Count      : Int;
        Entries_Aggr : Node_Id;
+       Rec_Decl     : Node_Id;
+       Rec_Id       : Entity_Id;
  
        procedure Check_Inlining (Subp : Entity_Id);
        --  If the original operation has a pragma Inline, propagate the flag
*************** package body Exp_Ch9 is
*** 8940,8945 ****
--- 8970,8990 ----
        --  For a protected operation that is an interrupt handler, add the
        --  freeze action that will register it as such.
  
+       procedure Replace_Access_Definition (Comp : Node_Id);
+       --  If a private component of the type is an access to itself, this
+       --  is not a reference to the current instance, but an access type out
+       --  of which one might construct a list. If such a component exists, we
+       --  create an incomplete type for the equivalent record type, and
+       --  a named access type for it, that replaces the access definition
+       --  of the original component. This is similar to what is done for
+       --  records in Check_Anonymous_Access_Components, but simpler, because
+       --  the corresponding record type has no previous declaration.
+       --  This needs to be done only once, even if there are several such
+       --  access components. The following entity stores the constructed
+       --  access type.
+ 
+       Acc_T : Entity_Id := Empty;
+ 
        --------------------
        -- Check_Inlining --
        --------------------
*************** package body Exp_Ch9 is
*** 8950,8955 ****
--- 8995,9004 ----
              Set_Is_Inlined (Protected_Body_Subprogram (Subp));
              Set_Is_Inlined (Subp, False);
           end if;
+ 
+          if Has_Pragma_No_Inline (Subp) then
+             Set_Has_Pragma_No_Inline (Protected_Body_Subprogram (Subp));
+          end if;
        end Check_Inlining;
  
        ---------------------------
*************** package body Exp_Ch9 is
*** 9083,9088 ****
--- 9132,9172 ----
           Append_Freeze_Action (Prot_Proc, RTS_Call);
        end Register_Handler;
  
+       -------------------------------
+       -- Replace_Access_Definition --
+       -------------------------------
+ 
+       procedure Replace_Access_Definition (Comp : Node_Id) is
+          Loc     : constant Source_Ptr := Sloc (Comp);
+          Inc_T   : Node_Id;
+          Inc_D   : Node_Id;
+          Acc_Def : Node_Id;
+          Acc_D   : Node_Id;
+ 
+       begin
+          if No (Acc_T) then
+             Inc_T   := Make_Defining_Identifier (Loc, Chars (Rec_Id));
+             Inc_D   := Make_Incomplete_Type_Declaration (Loc, Inc_T);
+             Acc_T   := Make_Temporary (Loc, 'S');
+             Acc_Def :=
+               Make_Access_To_Object_Definition (Loc,
+                 Subtype_Indication => New_Occurrence_Of (Inc_T, Loc));
+             Acc_D :=
+               Make_Full_Type_Declaration (Loc,
+                 Defining_Identifier => Acc_T,
+                 Type_Definition => Acc_Def);
+ 
+             Insert_Before (Rec_Decl, Inc_D);
+             Analyze (Inc_D);
+ 
+             Insert_Before (Rec_Decl, Acc_D);
+             Analyze (Acc_D);
+          end if;
+ 
+          Set_Access_Definition (Comp, Empty);
+          Set_Subtype_Indication (Comp, New_Occurrence_Of (Acc_T, Loc));
+       end Replace_Access_Definition;
+ 
        --  Local variables
  
        Body_Arr    : Node_Id;
*************** package body Exp_Ch9 is
*** 9094,9100 ****
        Obj_Def     : Node_Id;
        Object_Comp : Node_Id;
        Priv        : Node_Id;
-       Rec_Decl    : Node_Id;
        Sub         : Node_Id;
  
     --  Start of processing for Expand_N_Protected_Type_Declaration
--- 9178,9183 ----
*************** package body Exp_Ch9 is
*** 9104,9109 ****
--- 9187,9193 ----
           return;
        else
           Rec_Decl := Build_Corresponding_Record (N, Prot_Typ, Loc);
+          Rec_Id   := Defining_Identifier (Rec_Decl);
        end if;
  
        Cdecls := Component_Items (Component_List (Type_Definition (Rec_Decl)));
*************** package body Exp_Ch9 is
*** 9249,9254 ****
--- 9333,9347 ----
                           Access_Definition  =>
                             New_Copy_Tree
                               (Access_Definition (Old_Comp), Discr_Map));
+ 
+                       --  A self-reference in the private part becomes a
+                       --  self-reference to the corresponding record.
+ 
+                      if Entity (Subtype_Mark (Access_Definition (New_Comp)))
+                        = Prot_Typ
+                      then
+                         Replace_Access_Definition (New_Comp);
+                      end if;
                    end if;
  
                    New_Priv :=
*************** package body Exp_Ch9 is
*** 10635,10641 ****
  
               Statements       => New_List (
                 Make_Implicit_If_Statement (N,
!                  Condition       =>  Cond,
                   Then_Statements => New_List (
                     Make_Select_Call (
                       New_Occurrence_Of (RTE (RE_Simple_Mode), Loc)),
--- 10728,10734 ----
  
               Statements       => New_List (
                 Make_Implicit_If_Statement (N,
!                  Condition       => Cond,
                   Then_Statements => New_List (
                     Make_Select_Call (
                       New_Occurrence_Of (RTE (RE_Simple_Mode), Loc)),
*************** package body Exp_Ch9 is
*** 12654,12667 ****
            Object_Definition   => New_Occurrence_Of (Standard_Integer, Loc),
            Expression          => D_Disc));
  
-       --  Do the assignment at this stage only because the evaluation of the
-       --  expression must not occur earlier (see ACVC C97302A).
- 
-       Append_To (Stmts,
-         Make_Assignment_Statement (Loc,
-           Name       => New_Occurrence_Of (D, Loc),
-           Expression => D_Conv));
- 
        --  Parameter block processing
  
        --  Manually create the parameter block for dispatching calls. In the
--- 12747,12752 ----
*************** package body Exp_Ch9 is
*** 12670,12675 ****
--- 12755,12768 ----
  
        if Is_Disp_Select then
  
+          --  Compute the delay at this stage because the evaluation of its
+          --  expression must not occur earlier (see ACVC C97302A).
+ 
+          Append_To (Stmts,
+            Make_Assignment_Statement (Loc,
+              Name       => New_Occurrence_Of (D, Loc),
+              Expression => D_Conv));
+ 
           --  Tagged kind processing, generate:
           --    K : Ada.Tags.Tagged_Kind :=
           --          Ada.Tags.Get_Tagged_Kind (Ada.Tags.Tag <object>));
*************** package body Exp_Ch9 is
*** 12851,12858 ****
              Next (Stmt);
           end loop;
  
!          --  Do the assignment at this stage only because the evaluation
!          --  of the expression must not occur earlier (see ACVC C97302A).
  
           Insert_Before (Stmt,
             Make_Assignment_Statement (Loc,
--- 12944,12951 ----
              Next (Stmt);
           end loop;
  
!          --  Compute the delay at this stage because the evaluation of
!          --  its expression must not occur earlier (see ACVC C97302A).
  
           Insert_Before (Stmt,
             Make_Assignment_Statement (Loc,
*************** package body Exp_Ch9 is
*** 12938,12947 ****
  
        Analyze (N);
  
!       --  Some items in Decls used to be in the N_Block in  E_Call that
!       --  is constructed in Expand_Entry_Call, and are now in the new
!       --  Block into which N has been rewritten.  Adjust their scopes
!       --  to reflect that.
  
        if Nkind (E_Call) = N_Block_Statement then
           Obj := First_Entity (Entity (Identifier (E_Call)));
--- 13031,13039 ----
  
        Analyze (N);
  
!       --  Some items in Decls used to be in the N_Block in E_Call that is
!       --  constructed in Expand_Entry_Call, and are now in the new Block
!       --  into which N has been rewritten. Adjust their scopes to reflect that.
  
        if Nkind (E_Call) = N_Block_Statement then
           Obj := First_Entity (Entity (Identifier (E_Call)));
*************** package body Exp_Ch9 is
*** 13629,13637 ****
                          Set_Ekind (Decl_Id, E_Variable);
                       end if;
  
!                      Set_Prival      (Comp_Id, Decl_Id);
!                      Set_Prival_Link (Decl_Id, Comp_Id);
!                      Set_Is_Aliased  (Decl_Id, Is_Aliased (Comp_Id));
  
                       --  Generate:
                       --    comp_name : comp_typ renames _object.comp_name;
--- 13721,13730 ----
                          Set_Ekind (Decl_Id, E_Variable);
                       end if;
  
!                      Set_Prival         (Comp_Id, Decl_Id);
!                      Set_Prival_Link    (Decl_Id, Comp_Id);
!                      Set_Is_Aliased     (Decl_Id, Is_Aliased     (Comp_Id));
!                      Set_Is_Independent (Decl_Id, Is_Independent (Comp_Id));
  
                       --  Generate:
                       --    comp_name : comp_typ renames _object.comp_name;
*************** package body Exp_Ch9 is
*** 14878,14884 ****
  
           --  Ditto for a package declaration or a full type declaration, etc.
  
!          elsif Nkind (N) = N_Package_Declaration
             or else Nkind (N) in N_Declaration
             or else Nkind (N) in N_Renaming_Declaration
           then
--- 14971,14978 ----
  
           --  Ditto for a package declaration or a full type declaration, etc.
  
!          elsif (Nkind (N) = N_Package_Declaration
!                  and then N /= Specification (N))
             or else Nkind (N) in N_Declaration
             or else Nkind (N) in N_Renaming_Declaration
           then
*************** package body Exp_Ch9 is
*** 14896,14902 ****
--- 14990,15016 ----
                 Next (Decl);
              end loop;
  
+          elsif Nkind (N) = N_Freeze_Entity then
+ 
+             --  Scan the actions associated with a freeze node, which may
+             --  actually be declarations with entities that need to have
+             --  their scopes reset.
+ 
+             Decl := First (Actions (N));
+             while Present (Decl) loop
+                Reset_Scopes (Decl);
+                Next (Decl);
+             end loop;
+ 
           elsif N /= Bod and then Nkind (N) in N_Proper_Body then
+ 
+             --  A subprogram without a separate declaration may be encountered,
+             --  and we need to reset the subprogram's entity's scope.
+ 
+             if Nkind (N) = N_Subprogram_Body then
+                Set_Scope (Defining_Entity (Specification (N)), E);
+             end if;
+ 
              return Skip;
           end if;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_code.ads gcc-10.1.0/gcc/ada/exp_code.ads
*** gcc-9.3.0/gcc/ada/exp_code.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_code.ads	Thu May  7 10:49:59 2020
*************** package Exp_Code is
*** 38,43 ****
--- 38,45 ----
     --  Note that the implementations of these routines must not attempt
     --  to expand tables that are frozen on entry to Gigi.
  
+    --  WARNING: There is a matching C declaration of these subprograms in fe.h
+ 
     function Is_Asm_Volatile (N : Node_Id) return Boolean;
     --  Given an N_Code_Statement node N, return True if Volatile=True is
     --  specified, and False if Volatile=False is specified (or set by default).
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_dbug.adb gcc-10.1.0/gcc/ada/exp_dbug.adb
*** gcc-9.3.0/gcc/ada/exp_dbug.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_dbug.adb	Thu May  7 10:49:59 2020
*************** with Alloc;
*** 27,32 ****
--- 27,33 ----
  with Atree;    use Atree;
  with Debug;    use Debug;
  with Einfo;    use Einfo;
+ with Exp_Util; use Exp_Util;
  with Nlists;   use Nlists;
  with Nmake;    use Nmake;
  with Opt;      use Opt;
*************** package body Exp_Dbug is
*** 219,244 ****
  
     begin
        if Has_Homonym (E) then
!          declare
!             H  : Entity_Id := Homonym (E);
!             Nr : Nat := 1;
! 
!          begin
!             while Present (H) loop
!                if Scope (H) = Scope (E) then
!                   Nr := Nr + 1;
!                end if;
! 
!                H := Homonym (H);
!             end loop;
! 
!             if Homonym_Len > 0 then
!                Homonym_Len := Homonym_Len + 1;
!                Homonym_Numbers (Homonym_Len) := '_';
!             end if;
  
!             Add_Nat_To_H (Nr);
!          end;
        end if;
     end Append_Homonym_Number;
  
--- 220,231 ----
  
     begin
        if Has_Homonym (E) then
!          if Homonym_Len > 0 then
!             Homonym_Len := Homonym_Len + 1;
!             Homonym_Numbers (Homonym_Len) := '_';
!          end if;
  
!          Add_Nat_To_H (Homonym_Number (E));
        end if;
     end Append_Homonym_Number;
  
*************** package body Exp_Dbug is
*** 914,919 ****
--- 901,914 ----
        --  names produced for Ghost entities, while "__ghost_" can appear in
        --  names of entities inside a child/local package called "Ghost".
  
+       --  The compiler-generated finalizer for an enabled Ghost unit is treated
+       --  specially, as its name must be known to the binder, which has no
+       --  knowledge of Ghost status. In that case, the finalizer is not marked
+       --  as Ghost so that no prefix is added. Note that the special ___ghost_
+       --  prefix is retained when the Ghost unit is ignored, which still allows
+       --  inspecting the final executable for the presence of an ignored Ghost
+       --  finalizer procedure.
+ 
        if Is_Ghost_Entity (E)
          and then not Is_Compilation_Unit (E)
          and then (Name_Len < 9
*************** package body Exp_Dbug is
*** 1443,1467 ****
        if Has_Qualified_Name (Ent) then
           return;
  
-       --  In formal verification mode, simply append a suffix for homonyms.
-       --  We used to qualify entity names as full expansion does, but this was
-       --  removed as this prevents the verification back-end from using a short
-       --  name for debugging and user interaction. The verification back-end
-       --  already takes care of qualifying names when needed. Still mark the
-       --  name as being qualified, as Qualify_Entity_Name may be called more
-       --  than once on the same entity.
- 
-       elsif GNATprove_Mode then
-          if Has_Homonym (Ent) then
-             Get_Name_String (Chars (Ent));
-             Append_Homonym_Number (Ent);
-             Output_Homonym_Numbers_Suffix;
-             Set_Chars (Ent, Name_Enter);
-          end if;
- 
-          Set_Has_Qualified_Name (Ent);
-          return;
- 
        --  If the entity is a variable encoding the debug name for an object
        --  renaming, then the qualified name of the entity associated with the
        --  renamed object can now be incorporated in the debug name.
--- 1438,1443 ----
*************** package body Exp_Dbug is
*** 1531,1536 ****
--- 1507,1513 ----
        elsif Is_Subprogram (Ent)
          or else Ekind (Ent) = E_Subprogram_Body
          or else Is_Type (Ent)
+         or else Ekind (Ent) = E_Exception
        then
           Fully_Qualify_Name (Ent);
           Name_Len := Full_Qualify_Len;
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_dbug.ads gcc-10.1.0/gcc/ada/exp_dbug.ads
*** gcc-9.3.0/gcc/ada/exp_dbug.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_dbug.ads	Thu May  7 10:49:59 2020
*************** package Exp_Dbug is
*** 441,446 ****
--- 441,448 ----
     --  generating code, since the necessary information for computing the
     --  proper external name is not available in this case.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     -------------------------------------
     -- Encoding for translation into C --
     -------------------------------------
*************** package Exp_Dbug is
*** 926,931 ****
--- 928,935 ----
     --  if we are not generating code, since the necessary information for
     --  computing the proper encoded name is not available in this case.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     --------------
     -- Renaming --
     --------------
*************** package Exp_Dbug is
*** 1391,1396 ****
--- 1395,1402 ----
     --  of the string in Name_Len, and an ASCII.NUL character stored following
     --  the name.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     ---------------------------------
     -- Subtypes of Variant Records --
     ---------------------------------
*************** package Exp_Dbug is
*** 1452,1469 ****
     --  a character literal, the name is encoded as described in the following
     --  paragraph.
  
!    --  A name QUhh, where each 'h' is a lower-case hexadecimal digit, stands
!    --  for a character whose Unicode encoding is hh, and QWhhhh likewise stands
!    --  for a wide character whose encoding is hhhh. The representation values
!    --  are encoded as for ordinary enumeration literals (and have no necessary
!    --  relationship to the values encoded in the names).
  
     --  For example, given the type declaration
  
!    --    type x is (A, 'C', B);
  
     --  the second enumeration literal would be named QU43 and the value
!    --  assigned to it would be 1.
  
     -----------------------------------------------
     -- Secondary Dispatch tables of tagged types --
--- 1458,1478 ----
     --  a character literal, the name is encoded as described in the following
     --  paragraph.
  
!    --  The characters 'a'..'z' and '0'..'9' are represented as Qc, where 'c'
!    --  stands for the character itself.  A name QUhh, where each 'h' is a
!    --  lower-case hexadecimal digit, stands for a character whose Unicode
!    --  encoding is hh, and QWhhhh likewise stands for a wide character whose
!    --  encoding is hhhh. The representation values are encoded as for ordinary
!    --  enumeration literals (and have no necessary relationship to the values
!    --  encoded in the names).
  
     --  For example, given the type declaration
  
!    --    type x is (A, 'C', 'b');
  
     --  the second enumeration literal would be named QU43 and the value
!    --  assigned to it would be 1, and the third enumeration literal would be
!    --  named Qb and the value assigned to it would be 2.
  
     -----------------------------------------------
     -- Secondary Dispatch tables of tagged types --
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_disp.adb gcc-10.1.0/gcc/ada/exp_disp.adb
*** gcc-9.3.0/gcc/ada/exp_disp.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_disp.adb	Thu May  7 10:49:59 2020
*************** package body Exp_Disp is
*** 728,750 ****
           --  corresponding actuals in the call, given that this check is
           --  performed outside of the body of the subprogram.
  
           ---------------------
           -- Replace_Formals --
           ---------------------
  
           function Replace_Formals (N : Node_Id) return Traverse_Result is
           begin
!             if Is_Entity_Name (N)
!               and then Present (Entity (N))
!               and then Is_Formal (Entity (N))
!             then
!                declare
!                   A : Node_Id;
!                   F : Entity_Id;
  
!                begin
!                   F := First_Formal (Subp);
!                   A := First_Actual (Call_Node);
                    while Present (F) loop
                       if F = Entity (N) then
                          Rewrite (N, New_Copy_Tree (A));
--- 728,752 ----
           --  corresponding actuals in the call, given that this check is
           --  performed outside of the body of the subprogram.
  
+          --  If the dispatching call appears in the same scope as the
+          --  declaration of the dispatching subprogram (for example in
+          --  the expression of a local expression function), the spec
+          --  has not been analyzed yet, in which case we use the Chars
+          --  field to recognize intended occurrences of the formals.
+ 
           ---------------------
           -- Replace_Formals --
           ---------------------
  
           function Replace_Formals (N : Node_Id) return Traverse_Result is
+             A : Node_Id;
+             F : Entity_Id;
           begin
!             if Is_Entity_Name (N) then
!                F := First_Formal (Subp);
!                A := First_Actual (Call_Node);
  
!                if Present (Entity (N)) and then Is_Formal (Entity (N)) then
                    while Present (F) loop
                       if F = Entity (N) then
                          Rewrite (N, New_Copy_Tree (A));
*************** package body Exp_Disp is
*** 776,782 ****
                       Next_Formal (F);
                       Next_Actual (A);
                    end loop;
!                end;
              end if;
  
              return OK;
--- 778,802 ----
                       Next_Formal (F);
                       Next_Actual (A);
                    end loop;
! 
!                --  If the node is not analyzed, recognize occurrences of a
!                --  formal by name, as would be done when resolving the aspect
!                --  expression in the context of the subprogram.
! 
!                elsif not Analyzed (N)
!                  and then Nkind (N) = N_Identifier
!                  and then No (Entity (N))
!                then
!                   while Present (F) loop
!                      if Chars (N) = Chars (F) then
!                         Rewrite (N, New_Copy_Tree (A));
!                         return Skip;
!                      end if;
! 
!                      Next_Formal (F);
!                      Next_Actual (A);
!                   end loop;
!                end if;
              end if;
  
              return OK;
*************** package body Exp_Disp is
*** 1682,1699 ****
--- 1702,1735 ----
        while Present (Formal) loop
           Formal_Typ := Etype (Formal);
  
+          if Has_Non_Limited_View (Formal_Typ) then
+             Formal_Typ := Non_Limited_View (Formal_Typ);
+          end if;
+ 
           if Ekind (Formal_Typ) = E_Record_Type_With_Private then
              Formal_Typ := Full_View (Formal_Typ);
           end if;
  
           if Is_Access_Type (Formal_Typ) then
              Formal_DDT := Directly_Designated_Type (Formal_Typ);
+ 
+             if Has_Non_Limited_View (Formal_DDT) then
+                Formal_DDT := Non_Limited_View (Formal_DDT);
+             end if;
           end if;
  
           Actual_Typ := Etype (Actual);
  
+          if Has_Non_Limited_View (Actual_Typ) then
+             Actual_Typ := Non_Limited_View (Actual_Typ);
+          end if;
+ 
           if Is_Access_Type (Actual_Typ) then
              Actual_DDT := Directly_Designated_Type (Actual_Typ);
+ 
+             if Has_Non_Limited_View (Actual_DDT) then
+                Actual_DDT := Non_Limited_View (Actual_DDT);
+             end if;
           end if;
  
           if Is_Interface (Formal_Typ)
*************** package body Exp_Disp is
*** 1814,1820 ****
     procedure Expand_Interface_Thunk
       (Prim       : Node_Id;
        Thunk_Id   : out Entity_Id;
!       Thunk_Code : out Node_Id)
     is
        Loc     : constant Source_Ptr := Sloc (Prim);
        Actuals : constant List_Id    := New_List;
--- 1850,1857 ----
     procedure Expand_Interface_Thunk
       (Prim       : Node_Id;
        Thunk_Id   : out Entity_Id;
!       Thunk_Code : out Node_Id;
!       Iface      : Entity_Id)
     is
        Loc     : constant Source_Ptr := Sloc (Prim);
        Actuals : constant List_Id    := New_List;
*************** package body Exp_Disp is
*** 1876,1887 ****
           --  Use the interface type as the type of the controlling formal (see
           --  comment above).
  
!          if not Is_Controlling_Formal (Formal) or else Is_Predef_Op then
              Ftyp := Etype (Formal);
              Expr := New_Copy_Tree (Expression (Parent (Formal)));
           else
              Ftyp := Etype (Iface_Formal);
              Expr := Empty;
           end if;
  
           Append_To (Formals,
--- 1913,1950 ----
           --  Use the interface type as the type of the controlling formal (see
           --  comment above).
  
!          if not Is_Controlling_Formal (Formal) then
              Ftyp := Etype (Formal);
              Expr := New_Copy_Tree (Expression (Parent (Formal)));
+ 
+          --  For predefined primitives the controlling type of the thunk is
+          --  the interface type passed by the caller (since they don't have
+          --  available the Interface_Alias attribute; see comment above).
+ 
+          elsif Is_Predef_Op then
+             Ftyp := Iface;
+             Expr := Empty;
+ 
           else
              Ftyp := Etype (Iface_Formal);
              Expr := Empty;
+ 
+             --  Sanity check performed to ensure the proper controlling type
+             --  when the thunk has exactly one controlling parameter and it
+             --  comes first. In such case the GCC backend reuses the C++
+             --  thunks machinery which perform a computation equivalent to
+             --  the code generated by the expander; for other cases the GCC
+             --  backend translates the expanded code unmodified. However, as
+             --  a generalization, the check is performed for all controlling
+             --  types.
+ 
+             if Is_Access_Type (Ftyp) then
+                pragma Assert (Base_Type (Designated_Type (Ftyp)) = Iface);
+                null;
+             else
+                Ftyp := Base_Type (Ftyp);
+                pragma Assert (Ftyp = Iface);
+             end if;
           end if;
  
           Append_To (Formals,
*************** package body Exp_Disp is
*** 3748,3754 ****
        Dummy_Object : Entity_Id := Empty;
        --  Extra nonexistent object of type Typ internally used to compute the
        --  offset to the components that reference secondary dispatch tables.
!       --  Used to statically allocate secondary dispatch tables.
  
        procedure Check_Premature_Freezing
          (Subp        : Entity_Id;
--- 3811,3817 ----
        Dummy_Object : Entity_Id := Empty;
        --  Extra nonexistent object of type Typ internally used to compute the
        --  offset to the components that reference secondary dispatch tables.
!       --  Used to compute the offset of components located at fixed position.
  
        procedure Check_Premature_Freezing
          (Subp        : Entity_Id;
*************** package body Exp_Disp is
*** 3801,3806 ****
--- 3864,3872 ----
        --  this secondary dispatch table by Make_Tags when its unique external
        --  name was generated.
  
+       function Number_Of_Predefined_Prims (Typ : Entity_Id) return Nat;
+       --  Returns the number of predefined primitives of Typ
+ 
        ------------------------------
        -- Check_Premature_Freezing --
        ------------------------------
*************** package body Exp_Disp is
*** 3954,3965 ****
           DT_Constr_List     : List_Id;
           DT_Aggr_List       : List_Id;
           Empty_DT           : Boolean := False;
-          Nb_Predef_Prims    : Nat := 0;
           Nb_Prim            : Nat;
           New_Node           : Node_Id;
           OSD                : Entity_Id;
           OSD_Aggr_List      : List_Id;
-          Pos                : Nat;
           Prim               : Entity_Id;
           Prim_Elmt          : Elmt_Id;
           Prim_Ops_Aggr_List : List_Id;
--- 4020,4029 ----
*************** package body Exp_Disp is
*** 4004,4043 ****
           --                     predef-prim-op-thunk-2'address,
           --                     ...
           --                     predef-prim-op-thunk-n'address);
-          --   for Predef_Prims'Alignment use Address'Alignment
- 
-          --  Stage 1: Calculate the number of predefined primitives
- 
-          if not Building_Static_DT (Typ) then
-             Nb_Predef_Prims := Max_Predef_Prims;
-          else
-             Prim_Elmt := First_Elmt (Primitive_Operations (Typ));
-             while Present (Prim_Elmt) loop
-                Prim := Node (Prim_Elmt);
- 
-                if Is_Predefined_Dispatching_Operation (Prim)
-                  and then not Is_Abstract_Subprogram (Prim)
-                then
-                   Pos := UI_To_Int (DT_Position (Prim));
- 
-                   if Pos > Nb_Predef_Prims then
-                      Nb_Predef_Prims := Pos;
-                   end if;
-                end if;
- 
-                Next_Elmt (Prim_Elmt);
-             end loop;
-          end if;
- 
-          if Generate_SCIL then
-             Nb_Predef_Prims := 0;
-          end if;
  
!          --  Stage 2: Create the thunks associated with the predefined
!          --  primitives and save their entity to fill the aggregate.
  
           declare
!             Prim_Table : array (Nat range 1 .. Nb_Predef_Prims) of Entity_Id;
              Decl       : Node_Id;
              Thunk_Id   : Entity_Id;
              Thunk_Code : Node_Id;
--- 4068,4080 ----
           --                     predef-prim-op-thunk-2'address,
           --                     ...
           --                     predef-prim-op-thunk-n'address);
  
!          --  Create the thunks associated with the predefined primitives and
!          --  save their entity to fill the aggregate.
  
           declare
!             Nb_P_Prims : constant Nat := Number_Of_Predefined_Prims (Typ);
!             Prim_Table : array (Nat range 1 .. Nb_P_Prims) of Entity_Id;
              Decl       : Node_Id;
              Thunk_Id   : Entity_Id;
              Thunk_Code : Node_Id;
*************** package body Exp_Disp is
*** 4063,4069 ****
                            Alias (Prim);
  
                       else
!                         Expand_Interface_Thunk (Prim, Thunk_Id, Thunk_Code);
  
                          if Present (Thunk_Id) then
                             Append_To (Result, Thunk_Code);
--- 4100,4107 ----
                            Alias (Prim);
  
                       else
!                         Expand_Interface_Thunk
!                           (Prim, Thunk_Id, Thunk_Code, Iface);
  
                          if Present (Thunk_Id) then
                             Append_To (Result, Thunk_Code);
*************** package body Exp_Disp is
*** 4114,4129 ****
                  Object_Definition   => New_Occurrence_Of
                                           (Defining_Identifier (Decl), Loc),
                  Expression => New_Node));
- 
-             Append_To (Result,
-               Make_Attribute_Definition_Clause (Loc,
-                 Name       => New_Occurrence_Of (Predef_Prims, Loc),
-                 Chars      => Name_Alignment,
-                 Expression =>
-                   Make_Attribute_Reference (Loc,
-                     Prefix =>
-                       New_Occurrence_Of (RTE (RE_Integer_Address), Loc),
-                     Attribute_Name => Name_Alignment)));
           end;
  
           --  Generate
--- 4152,4157 ----
*************** package body Exp_Disp is
*** 4132,4137 ****
--- 4160,4166 ----
           --          (OSD_Table => (1 => <value>,
           --                           ...
           --                         N => <value>));
+          --   for OSD'Alignment use Address'Alignment;
  
           --   Iface_DT : Dispatch_Table (Nb_Prims) :=
           --               ([ Signature   => <sig-value> ],
*************** package body Exp_Disp is
*** 4143,4149 ****
           --                                  prim-op-2'address,
           --                                  ...
           --                                  prim-op-n'address));
-          --   for Iface_DT'Alignment use Address'Alignment;
  
           --  Stage 3: Initialize the discriminant and the record components
  
--- 4172,4177 ----
*************** package body Exp_Disp is
*** 4175,4188 ****
               Prefix         => New_Occurrence_Of (Predef_Prims, Loc),
               Attribute_Name => Name_Address));
  
!          --  If the location of the component that references this secondary
!          --  dispatch table is variable then we have not declared the internal
!          --  dummy object; the value of Offset_To_Top will be set by the init
!          --  subprogram.
  
!          if No (Dummy_Object) then
              Append_To (DT_Aggr_List, Make_Integer_Literal (Loc, 0));
  
           else
              Append_To (DT_Aggr_List,
                Make_Op_Minus (Loc,
--- 4203,4218 ----
               Prefix         => New_Occurrence_Of (Predef_Prims, Loc),
               Attribute_Name => Name_Address));
  
!          --  Interface component located at variable offset; the value of
!          --  Offset_To_Top will be set by the init subprogram.
  
!          if No (Dummy_Object)
!            or else Is_Variable_Size_Record (Etype (Scope (Iface_Comp)))
!          then
              Append_To (DT_Aggr_List, Make_Integer_Literal (Loc, 0));
  
+          --  Interface component located at fixed offset
+ 
           else
              Append_To (DT_Aggr_List,
                Make_Op_Minus (Loc,
*************** package body Exp_Disp is
*** 4377,4383 ****
                          Prim_Table (Prim_Pos) := Alias (Prim);
  
                       else
!                         Expand_Interface_Thunk (Prim, Thunk_Id, Thunk_Code);
  
                          if Present (Thunk_Id) then
                             Prim_Pos :=
--- 4407,4414 ----
                          Prim_Table (Prim_Pos) := Alias (Prim);
  
                       else
!                         Expand_Interface_Thunk
!                           (Prim, Thunk_Id, Thunk_Code, Iface);
  
                          if Present (Thunk_Id) then
                             Prim_Pos :=
*************** package body Exp_Disp is
*** 4428,4434 ****
             Make_Object_Declaration (Loc,
               Defining_Identifier => Iface_DT,
               Aliased_Present     => True,
!              Constant_Present    => Present (Dummy_Object),
  
               Object_Definition   =>
                 Make_Subtype_Indication (Loc,
--- 4459,4465 ----
             Make_Object_Declaration (Loc,
               Defining_Identifier => Iface_DT,
               Aliased_Present     => True,
!              Constant_Present    => Building_Static_Secondary_DT (Typ),
  
               Object_Definition   =>
                 Make_Subtype_Indication (Loc,
*************** package body Exp_Disp is
*** 4441,4457 ****
                 Make_Aggregate (Loc,
                   Expressions => DT_Aggr_List)));
  
-          Append_To (Result,
-            Make_Attribute_Definition_Clause (Loc,
-              Name       => New_Occurrence_Of (Iface_DT, Loc),
-              Chars      => Name_Alignment,
- 
-              Expression =>
-                Make_Attribute_Reference (Loc,
-                  Prefix         =>
-                    New_Occurrence_Of (RTE (RE_Integer_Address), Loc),
-                  Attribute_Name => Name_Alignment)));
- 
           if Exporting_Table then
              Export_DT (Typ, Iface_DT, Suffix_Index);
  
--- 4472,4477 ----
*************** package body Exp_Disp is
*** 4507,4512 ****
--- 4527,4570 ----
           Append_Elmt (Iface_DT, DT_Decl);
        end Make_Secondary_DT;
  
+       --------------------------------
+       -- Number_Of_Predefined_Prims --
+       --------------------------------
+ 
+       function Number_Of_Predefined_Prims (Typ : Entity_Id) return Nat is
+          Nb_Predef_Prims : Nat := 0;
+ 
+       begin
+          if not Generate_SCIL then
+             declare
+                Prim      : Entity_Id;
+                Prim_Elmt : Elmt_Id;
+                Pos       : Nat;
+ 
+             begin
+                Prim_Elmt := First_Elmt (Primitive_Operations (Typ));
+                while Present (Prim_Elmt) loop
+                   Prim := Node (Prim_Elmt);
+ 
+                   if Is_Predefined_Dispatching_Operation (Prim)
+                     and then not Is_Abstract_Subprogram (Prim)
+                   then
+                      Pos := UI_To_Int (DT_Position (Prim));
+ 
+                      if Pos > Nb_Predef_Prims then
+                         Nb_Predef_Prims := Pos;
+                      end if;
+                   end if;
+ 
+                   Next_Elmt (Prim_Elmt);
+                end loop;
+             end;
+          end if;
+ 
+          pragma Assert (Nb_Predef_Prims <= Max_Predef_Prims);
+          return Nb_Predef_Prims;
+       end Number_Of_Predefined_Prims;
+ 
        --  Local variables
  
        Elab_Code : constant List_Id := New_List;
*************** package body Exp_Disp is
*** 4566,4572 ****
        I_Depth            : Nat := 0;
        Iface_Table_Node   : Node_Id;
        Name_ITable        : Name_Id;
-       Nb_Predef_Prims    : Nat := 0;
        Nb_Prim            : Nat := 0;
        New_Node           : Node_Id;
        Num_Ifaces         : Nat := 0;
--- 4624,4629 ----
*************** package body Exp_Disp is
*** 4707,4715 ****
           end;
        end if;
  
!       if Building_Static_Secondary_DT (Typ) then
           declare
              Cannot_Have_Null_Disc : Boolean := False;
              Name_Dummy_Object     : constant Name_Id :=
                                        New_External_Name (Tname,
                                          'P', Suffix_Index => -1);
--- 4764,4773 ----
           end;
        end if;
  
!       if not Is_Interface (Typ) and then Has_Interfaces (Typ) then
           declare
              Cannot_Have_Null_Disc : Boolean := False;
+             Dummy_Object_Typ      : constant Entity_Id := Typ;
              Name_Dummy_Object     : constant Name_Id :=
                                        New_External_Name (Tname,
                                          'P', Suffix_Index => -1);
*************** package body Exp_Disp is
*** 4738,4756 ****
  
              Set_Is_Internal (Dummy_Object);
  
!             if not Has_Discriminants (Typ) then
                 Append_To (Result,
                   Make_Object_Declaration (Loc,
                     Defining_Identifier => Dummy_Object,
                     Constant_Present    => True,
!                    Object_Definition   => New_Occurrence_Of (Typ, Loc)));
              else
                 declare
                    Constr_List  : constant List_Id := New_List;
                    Discrim      : Node_Id;
  
                 begin
!                   Discrim := First_Discriminant (Typ);
                    while Present (Discrim) loop
                       if Is_Discrete_Type (Etype (Discrim)) then
                          Append_To (Constr_List,
--- 4796,4815 ----
  
              Set_Is_Internal (Dummy_Object);
  
!             if not Has_Discriminants (Dummy_Object_Typ) then
                 Append_To (Result,
                   Make_Object_Declaration (Loc,
                     Defining_Identifier => Dummy_Object,
                     Constant_Present    => True,
!                    Object_Definition   => New_Occurrence_Of
!                                            (Dummy_Object_Typ, Loc)));
              else
                 declare
                    Constr_List  : constant List_Id := New_List;
                    Discrim      : Node_Id;
  
                 begin
!                   Discrim := First_Discriminant (Dummy_Object_Typ);
                    while Present (Discrim) loop
                       if Is_Discrete_Type (Etype (Discrim)) then
                          Append_To (Constr_List,
*************** package body Exp_Disp is
*** 4776,4782 ****
                        Constant_Present    => True,
                        Object_Definition   =>
                          Make_Subtype_Indication (Loc,
!                           Subtype_Mark => New_Occurrence_Of (Typ, Loc),
                            Constraint   =>
                              Make_Index_Or_Discriminant_Constraint (Loc,
                                Constraints => Constr_List))));
--- 4835,4842 ----
                        Constant_Present    => True,
                        Object_Definition   =>
                          Make_Subtype_Indication (Loc,
!                           Subtype_Mark =>
!                             New_Occurrence_Of (Dummy_Object_Typ, Loc),
                            Constraint   =>
                              Make_Index_Or_Discriminant_Constraint (Loc,
                                Constraints => Constr_List))));
*************** package body Exp_Disp is
*** 4893,4899 ****
  
           --  Generate:
           --    DT     : No_Dispatch_Table_Wrapper;
-          --    for DT'Alignment use Address'Alignment;
           --    DT_Ptr : Tag := !Tag (DT.NDT_Prims_Ptr'Address);
  
           if not Has_DT (Typ) then
--- 4953,4958 ----
*************** package body Exp_Disp is
*** 4907,4922 ****
                      (RTE (RE_No_Dispatch_Table_Wrapper), Loc)));
  
              Append_To (Result,
-               Make_Attribute_Definition_Clause (Loc,
-                 Name       => New_Occurrence_Of (DT, Loc),
-                 Chars      => Name_Alignment,
-                 Expression =>
-                   Make_Attribute_Reference (Loc,
-                     Prefix         =>
-                       New_Occurrence_Of (RTE (RE_Integer_Address), Loc),
-                     Attribute_Name => Name_Alignment)));
- 
-             Append_To (Result,
                Make_Object_Declaration (Loc,
                  Defining_Identifier => DT_Ptr,
                  Object_Definition   => New_Occurrence_Of (RTE (RE_Tag), Loc),
--- 4966,4971 ----
*************** package body Exp_Disp is
*** 4955,4961 ****
  
           --  Generate:
           --    DT : Dispatch_Table_Wrapper (Nb_Prim);
-          --    for DT'Alignment use Address'Alignment;
           --    DT_Ptr : Tag := !Tag (DT.Prims_Ptr'Address);
  
           else
--- 5004,5009 ----
*************** package body Exp_Disp is
*** 4984,4999 ****
                          Constraints => DT_Constr_List))));
  
              Append_To (Result,
-               Make_Attribute_Definition_Clause (Loc,
-                 Name       => New_Occurrence_Of (DT, Loc),
-                 Chars      => Name_Alignment,
-                 Expression =>
-                   Make_Attribute_Reference (Loc,
-                     Prefix         =>
-                       New_Occurrence_Of (RTE (RE_Integer_Address), Loc),
-                     Attribute_Name => Name_Alignment)));
- 
-             Append_To (Result,
                Make_Object_Declaration (Loc,
                  Defining_Identifier => DT_Ptr,
                  Object_Definition   => New_Occurrence_Of (RTE (RE_Tag), Loc),
--- 5032,5037 ----
*************** package body Exp_Disp is
*** 5108,5114 ****
        --            Tags_Table         => (0 => null,
        --                                   1 => Parent'Tag
        --                                   ...);
-       --   for TSD'Alignment use Address'Alignment
  
        TSD_Aggr_List := New_List;
  
--- 5146,5151 ----
*************** package body Exp_Disp is
*** 5484,5502 ****
              declare
                 TSD_Ifaces_List  : constant List_Id := New_List;
                 Elmt             : Elmt_Id;
-                Ifaces_List      : Elist_Id := No_Elist;
-                Ifaces_Comp_List : Elist_Id := No_Elist;
-                Ifaces_Tag_List  : Elist_Id;
                 Offset_To_Top    : Node_Id;
                 Sec_DT_Tag       : Node_Id;
  
              begin
                 --  Collect interfaces information if we need to compute the
                 --  offset to the top using the dummy object.
  
                 if Present (Dummy_Object) then
                    Collect_Interfaces_Info (Typ,
!                     Ifaces_List, Ifaces_Comp_List, Ifaces_Tag_List);
                 end if;
  
                 AI := First_Elmt (Typ_Ifaces);
--- 5521,5543 ----
              declare
                 TSD_Ifaces_List  : constant List_Id := New_List;
                 Elmt             : Elmt_Id;
                 Offset_To_Top    : Node_Id;
                 Sec_DT_Tag       : Node_Id;
  
+                Dummy_Object_Ifaces_List      : Elist_Id := No_Elist;
+                Dummy_Object_Ifaces_Comp_List : Elist_Id := No_Elist;
+                Dummy_Object_Ifaces_Tag_List  : Elist_Id := No_Elist;
+                --  Interfaces information of the dummy object
+ 
              begin
                 --  Collect interfaces information if we need to compute the
                 --  offset to the top using the dummy object.
  
                 if Present (Dummy_Object) then
                    Collect_Interfaces_Info (Typ,
!                     Ifaces_List     => Dummy_Object_Ifaces_List,
!                     Components_List => Dummy_Object_Ifaces_Comp_List,
!                     Tags_List       => Dummy_Object_Ifaces_Tag_List);
                 end if;
  
                 AI := First_Elmt (Typ_Ifaces);
*************** package body Exp_Disp is
*** 5534,5541 ****
                           (Node (Next_Elmt (Next_Elmt (Elmt))), Loc);
                    end if;
  
!                   --  For static dispatch tables compute Offset_To_Top using
!                   --  the dummy object.
  
                    if Present (Dummy_Object) then
                       declare
--- 5575,5582 ----
                           (Node (Next_Elmt (Next_Elmt (Elmt))), Loc);
                    end if;
  
!                   --  Use the dummy object to compute Offset_To_Top of
!                   --  components located at fixed position.
  
                    if Present (Dummy_Object) then
                       declare
*************** package body Exp_Disp is
*** 5545,5552 ****
                          Iface_Elmt       : Elmt_Id;
  
                       begin
!                         Iface_Elmt      := First_Elmt (Ifaces_List);
!                         Iface_Comp_Elmt := First_Elmt (Ifaces_Comp_List);
  
                          while Present (Iface_Elmt) loop
                             if Node (Iface_Elmt) = Iface then
--- 5586,5595 ----
                          Iface_Elmt       : Elmt_Id;
  
                       begin
!                         Iface_Elmt :=
!                           First_Elmt (Dummy_Object_Ifaces_List);
!                         Iface_Comp_Elmt :=
!                           First_Elmt (Dummy_Object_Ifaces_Comp_List);
  
                          while Present (Iface_Elmt) loop
                             if Node (Iface_Elmt) = Iface then
*************** package body Exp_Disp is
*** 5560,5575 ****
  
                          pragma Assert (Present (Iface_Comp));
  
!                         Offset_To_Top :=
!                           Make_Op_Minus (Loc,
!                             Make_Attribute_Reference (Loc,
!                               Prefix         =>
!                                 Make_Selected_Component (Loc,
!                                   Prefix        =>
!                                     New_Occurrence_Of (Dummy_Object, Loc),
!                                   Selector_Name =>
!                                     New_Occurrence_Of (Iface_Comp, Loc)),
!                               Attribute_Name => Name_Position));
                       end;
                    else
                       Offset_To_Top := Make_Integer_Literal (Loc, 0);
--- 5603,5624 ----
  
                          pragma Assert (Present (Iface_Comp));
  
!                         if not
!                           Is_Variable_Size_Record (Etype (Scope (Iface_Comp)))
!                         then
!                            Offset_To_Top :=
!                              Make_Op_Minus (Loc,
!                                Make_Attribute_Reference (Loc,
!                                  Prefix         =>
!                                    Make_Selected_Component (Loc,
!                                      Prefix        =>
!                                        New_Occurrence_Of (Dummy_Object, Loc),
!                                      Selector_Name =>
!                                        New_Occurrence_Of (Iface_Comp, Loc)),
!                                  Attribute_Name => Name_Position));
!                         else
!                            Offset_To_Top := Make_Integer_Literal (Loc, 0);
!                         end if;
                       end;
                    else
                       Offset_To_Top := Make_Integer_Literal (Loc, 0);
*************** package body Exp_Disp is
*** 5618,5624 ****
                   Make_Object_Declaration (Loc,
                     Defining_Identifier => ITable,
                     Aliased_Present     => True,
!                    Constant_Present    => Present (Dummy_Object),
                     Object_Definition   =>
                       Make_Subtype_Indication (Loc,
                         Subtype_Mark =>
--- 5667,5673 ----
                   Make_Object_Declaration (Loc,
                     Defining_Identifier => ITable,
                     Aliased_Present     => True,
!                    Constant_Present    => Building_Static_Secondary_DT (Typ),
                     Object_Definition   =>
                       Make_Subtype_Indication (Loc,
                         Subtype_Mark =>
*************** package body Exp_Disp is
*** 5634,5649 ****
                           Make_Integer_Literal (Loc, Num_Ifaces),
                           Make_Aggregate (Loc, TSD_Ifaces_List)))));
  
-                Append_To (Result,
-                  Make_Attribute_Definition_Clause (Loc,
-                    Name       => New_Occurrence_Of (ITable, Loc),
-                    Chars      => Name_Alignment,
-                    Expression =>
-                      Make_Attribute_Reference (Loc,
-                        Prefix         =>
-                          New_Occurrence_Of (RTE (RE_Integer_Address), Loc),
-                        Attribute_Name => Name_Alignment)));
- 
                 Iface_Table_Node :=
                   Make_Attribute_Reference (Loc,
                     Prefix         => New_Occurrence_Of (ITable, Loc),
--- 5683,5688 ----
*************** package body Exp_Disp is
*** 5794,5809 ****
  
        Set_Is_True_Constant (TSD, Building_Static_DT (Typ));
  
-       Append_To (Result,
-         Make_Attribute_Definition_Clause (Loc,
-           Name       => New_Occurrence_Of (TSD, Loc),
-           Chars      => Name_Alignment,
-           Expression =>
-             Make_Attribute_Reference (Loc,
-               Prefix         =>
-                 New_Occurrence_Of (RTE (RE_Integer_Address), Loc),
-               Attribute_Name => Name_Alignment)));
- 
        --  Initialize or declare the dispatch table object
  
        if not Has_DT (Typ) then
--- 5833,5838 ----
*************** package body Exp_Disp is
*** 5841,5847 ****
           --   DT : aliased constant No_Dispatch_Table :=
           --          (NDT_TSD       => TSD'Address;
           --           NDT_Prims_Ptr => 0);
-          --   for DT'Alignment use Address'Alignment;
  
           else
              Append_To (Result,
--- 5870,5875 ----
*************** package body Exp_Disp is
*** 5853,5868 ****
                    New_Occurrence_Of (RTE (RE_No_Dispatch_Table_Wrapper), Loc),
                  Expression          => Make_Aggregate (Loc, DT_Aggr_List)));
  
-             Append_To (Result,
-               Make_Attribute_Definition_Clause (Loc,
-                 Name       => New_Occurrence_Of (DT, Loc),
-                 Chars      => Name_Alignment,
-                 Expression =>
-                   Make_Attribute_Reference (Loc,
-                     Prefix         =>
-                       New_Occurrence_Of (RTE (RE_Integer_Address), Loc),
-                     Attribute_Name => Name_Alignment)));
- 
              Export_DT (Typ, DT);
           end if;
  
--- 5881,5886 ----
*************** package body Exp_Disp is
*** 5875,5881 ****
        --                     predef-prim-op-2'address,
        --                     ...
        --                     predef-prim-op-n'address);
-       --   for Predef_Prims'Alignment use Address'Alignment
  
        --   DT : Dispatch_Table (Nb_Prims) :=
        --          (Signature => <sig-value>,
--- 5893,5898 ----
*************** package body Exp_Disp is
*** 5891,6002 ****
  
        else
           declare
!             Pos : Nat;
  
           begin
!             if not Building_Static_DT (Typ) then
!                Nb_Predef_Prims := Max_Predef_Prims;
  
!             else
!                Prim_Elmt := First_Elmt (Primitive_Operations (Typ));
                 while Present (Prim_Elmt) loop
                    Prim := Node (Prim_Elmt);
  
                    if Is_Predefined_Dispatching_Operation (Prim)
                      and then not Is_Abstract_Subprogram (Prim)
                    then
!                      Pos := UI_To_Int (DT_Position (Prim));
! 
!                      if Pos > Nb_Predef_Prims then
!                         Nb_Predef_Prims := Pos;
!                      end if;
                    end if;
  
                    Next_Elmt (Prim_Elmt);
                 end loop;
              end if;
  
!             declare
!                Prim_Table : array
!                               (Nat range 1 .. Nb_Predef_Prims) of Entity_Id;
!                Decl       : Node_Id;
!                E          : Entity_Id;
! 
!             begin
!                Prim_Ops_Aggr_List := New_List;
! 
!                Prim_Table := (others => Empty);
! 
!                if Building_Static_DT (Typ) then
!                   Prim_Elmt  := First_Elmt (Primitive_Operations (Typ));
!                   while Present (Prim_Elmt) loop
!                      Prim := Node (Prim_Elmt);
! 
!                      if Is_Predefined_Dispatching_Operation (Prim)
!                        and then not Is_Abstract_Subprogram (Prim)
!                        and then not Is_Eliminated (Prim)
!                        and then not Present (Prim_Table
!                                               (UI_To_Int (DT_Position (Prim))))
!                      then
!                         E := Ultimate_Alias (Prim);
!                         pragma Assert (not Is_Abstract_Subprogram (E));
!                         Prim_Table (UI_To_Int (DT_Position (Prim))) := E;
!                      end if;
! 
!                      Next_Elmt (Prim_Elmt);
!                   end loop;
                 end if;
  
!                for J in Prim_Table'Range loop
!                   if Present (Prim_Table (J)) then
!                      New_Node :=
!                        Unchecked_Convert_To (RTE (RE_Prim_Ptr),
!                          Make_Attribute_Reference (Loc,
!                            Prefix         =>
!                              New_Occurrence_Of (Prim_Table (J), Loc),
!                            Attribute_Name => Name_Unrestricted_Access));
!                   else
!                      New_Node := Make_Null (Loc);
!                   end if;
! 
!                   Append_To (Prim_Ops_Aggr_List, New_Node);
!                end loop;
! 
!                New_Node :=
!                  Make_Aggregate (Loc,
!                    Expressions => Prim_Ops_Aggr_List);
  
!                Decl :=
!                  Make_Subtype_Declaration (Loc,
!                    Defining_Identifier => Make_Temporary (Loc, 'S'),
!                    Subtype_Indication  =>
!                      New_Occurrence_Of (RTE (RE_Address_Array), Loc));
  
!                Append_To (Result, Decl);
  
!                Append_To (Result,
!                  Make_Object_Declaration (Loc,
!                    Defining_Identifier => Predef_Prims,
!                    Aliased_Present     => True,
!                    Constant_Present    => Building_Static_DT (Typ),
!                    Object_Definition   =>
!                      New_Occurrence_Of (Defining_Identifier (Decl), Loc),
!                    Expression => New_Node));
  
!                --  Remember aggregates initializing dispatch tables
  
!                Append_Elmt (New_Node, DT_Aggr);
  
!                Append_To (Result,
!                  Make_Attribute_Definition_Clause (Loc,
!                    Name       => New_Occurrence_Of (Predef_Prims, Loc),
!                    Chars      => Name_Alignment,
!                    Expression =>
!                      Make_Attribute_Reference (Loc,
!                        Prefix         =>
!                          New_Occurrence_Of (RTE (RE_Integer_Address), Loc),
!                        Attribute_Name => Name_Alignment)));
!             end;
           end;
  
           --  Stage 1: Initialize the discriminant and the record components
--- 5908,5982 ----
  
        else
           declare
!             Nb_P_Prims : constant Nat := Number_Of_Predefined_Prims (Typ);
!             Prim_Table : array (Nat range 1 .. Nb_P_Prims) of Entity_Id;
!             Decl       : Node_Id;
!             E          : Entity_Id;
  
           begin
!             Prim_Ops_Aggr_List := New_List;
!             Prim_Table := (others => Empty);
  
!             if Building_Static_DT (Typ) then
!                Prim_Elmt  := First_Elmt (Primitive_Operations (Typ));
                 while Present (Prim_Elmt) loop
                    Prim := Node (Prim_Elmt);
  
                    if Is_Predefined_Dispatching_Operation (Prim)
                      and then not Is_Abstract_Subprogram (Prim)
+                     and then not Is_Eliminated (Prim)
+                     and then not Generate_SCIL
+                     and then not Present (Prim_Table
+                                            (UI_To_Int (DT_Position (Prim))))
                    then
!                      E := Ultimate_Alias (Prim);
!                      pragma Assert (not Is_Abstract_Subprogram (E));
!                      Prim_Table (UI_To_Int (DT_Position (Prim))) := E;
                    end if;
  
                    Next_Elmt (Prim_Elmt);
                 end loop;
              end if;
  
!             for J in Prim_Table'Range loop
!                if Present (Prim_Table (J)) then
!                   New_Node :=
!                     Unchecked_Convert_To (RTE (RE_Prim_Ptr),
!                       Make_Attribute_Reference (Loc,
!                         Prefix         =>
!                           New_Occurrence_Of (Prim_Table (J), Loc),
!                         Attribute_Name => Name_Unrestricted_Access));
!                else
!                   New_Node := Make_Null (Loc);
                 end if;
  
!                Append_To (Prim_Ops_Aggr_List, New_Node);
!             end loop;
  
!             New_Node :=
!               Make_Aggregate (Loc,
!                 Expressions => Prim_Ops_Aggr_List);
  
!             Decl :=
!               Make_Subtype_Declaration (Loc,
!                 Defining_Identifier => Make_Temporary (Loc, 'S'),
!                 Subtype_Indication  =>
!                   New_Occurrence_Of (RTE (RE_Address_Array), Loc));
  
!             Append_To (Result, Decl);
  
!             Append_To (Result,
!               Make_Object_Declaration (Loc,
!                 Defining_Identifier => Predef_Prims,
!                 Aliased_Present     => True,
!                 Constant_Present    => Building_Static_DT (Typ),
!                 Object_Definition   =>
!                   New_Occurrence_Of (Defining_Identifier (Decl), Loc),
!                 Expression => New_Node));
  
!             --  Remember aggregates initializing dispatch tables
  
!             Append_Elmt (New_Node, DT_Aggr);
           end;
  
           --  Stage 1: Initialize the discriminant and the record components
*************** package body Exp_Disp is
*** 6183,6198 ****
                                        Constraints => DT_Constr_List)),
                  Expression          => Make_Aggregate (Loc, DT_Aggr_List)));
  
-             Append_To (Result,
-               Make_Attribute_Definition_Clause (Loc,
-                 Name       => New_Occurrence_Of (DT, Loc),
-                 Chars      => Name_Alignment,
-                 Expression =>
-                   Make_Attribute_Reference (Loc,
-                     Prefix         =>
-                       New_Occurrence_Of (RTE (RE_Integer_Address), Loc),
-                     Attribute_Name => Name_Alignment)));
- 
              Export_DT (Typ, DT);
           end if;
        end if;
--- 6163,6168 ----
*************** package body Exp_Disp is
*** 6268,6274 ****
                            (Node
                              (Next_Elmt
                                (First_Elmt
!                                 (Access_Disp_Table (Typ)))), Loc)));
  
                    if Nb_Prims /= 0 then
                       Append_To (Elab_Code,
--- 6238,6246 ----
                            (Node
                              (Next_Elmt
                                (First_Elmt
!                                 (Access_Disp_Table (Typ)))), Loc),
!                       Num_Predef_Prims =>
!                         Number_Of_Predefined_Prims (Parent_Typ)));
  
                    if Nb_Prims /= 0 then
                       Append_To (Elab_Code,
*************** package body Exp_Disp is
*** 6357,6363 ****
                                            Unchecked_Convert_To (RTE (RE_Tag),
                                              New_Occurrence_Of
                                                (Node (Next_Elmt (Sec_DT_Typ)),
!                                                Loc))));
  
                                      if Num_Prims /= 0 then
                                         Append_To (Elab_Code,
--- 6329,6338 ----
                                            Unchecked_Convert_To (RTE (RE_Tag),
                                              New_Occurrence_Of
                                                (Node (Next_Elmt (Sec_DT_Typ)),
!                                                Loc)),
!                                         Num_Predef_Prims =>
!                                           Number_Of_Predefined_Prims
!                                             (Parent_Typ)));
  
                                      if Num_Prims /= 0 then
                                         Append_To (Elab_Code,
*************** package body Exp_Disp is
*** 6403,6409 ****
                                            Unchecked_Convert_To (RTE (RE_Tag),
                                              New_Occurrence_Of
                                                (Node (Next_Elmt (Sec_DT_Typ)),
!                                                Loc))));
  
                                      if Num_Prims /= 0 then
                                         Append_To (Elab_Code,
--- 6378,6387 ----
                                            Unchecked_Convert_To (RTE (RE_Tag),
                                              New_Occurrence_Of
                                                (Node (Next_Elmt (Sec_DT_Typ)),
!                                                Loc)),
!                                         Num_Predef_Prims =>
!                                           Number_Of_Predefined_Prims
!                                             (Parent_Typ)));
  
                                      if Num_Prims /= 0 then
                                         Append_To (Elab_Code,
*************** package body Exp_Disp is
*** 7558,7564 ****
              return L;
           end if;
  
!          Expand_Interface_Thunk (Prim, Thunk_Id, Thunk_Code);
  
           if not Is_Ancestor (Iface_Typ, Tag_Typ, Use_Full_View => True)
             and then Present (Thunk_Code)
--- 7536,7542 ----
              return L;
           end if;
  
!          Expand_Interface_Thunk (Prim, Thunk_Id, Thunk_Code, Iface_Typ);
  
           if not Is_Ancestor (Iface_Typ, Tag_Typ, Use_Full_View => True)
             and then Present (Thunk_Code)
*************** package body Exp_Disp is
*** 7637,7643 ****
                       Unchecked_Convert_To (RTE (RE_Prim_Ptr),
                         Make_Attribute_Reference (Loc,
                           Prefix         =>
!                            New_Occurrence_Of (Alias (Prim), Loc),
                           Attribute_Name => Name_Unrestricted_Access))));
  
              end if;
--- 7615,7621 ----
                       Unchecked_Convert_To (RTE (RE_Prim_Ptr),
                         Make_Attribute_Reference (Loc,
                           Prefix         =>
!                            New_Occurrence_Of (Ultimate_Alias (Prim), Loc),
                           Attribute_Name => Name_Unrestricted_Access))));
  
              end if;
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_disp.ads gcc-10.1.0/gcc/ada/exp_disp.ads
*** gcc-9.3.0/gcc/ada/exp_disp.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_disp.ads	Thu May  7 10:49:59 2020
*************** package Exp_Disp is
*** 242,248 ****
     procedure Expand_Interface_Thunk
       (Prim       : Node_Id;
        Thunk_Id   : out Entity_Id;
!       Thunk_Code : out Node_Id);
     --  Ada 2005 (AI-251): When a tagged type implements abstract interfaces we
     --  generate additional subprograms (thunks) associated with each primitive
     --  Prim to have a layout compatible with the C++ ABI. The thunk displaces
--- 242,249 ----
     procedure Expand_Interface_Thunk
       (Prim       : Node_Id;
        Thunk_Id   : out Entity_Id;
!       Thunk_Code : out Node_Id;
!       Iface      : Entity_Id);
     --  Ada 2005 (AI-251): When a tagged type implements abstract interfaces we
     --  generate additional subprograms (thunks) associated with each primitive
     --  Prim to have a layout compatible with the C++ ABI. The thunk displaces
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_dist.adb gcc-10.1.0/gcc/ada/exp_dist.adb
*** gcc-9.3.0/gcc/ada/exp_dist.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_dist.adb	Thu May  7 10:49:59 2020
*************** package body Exp_Dist is
*** 963,972 ****
              when N_Package_Declaration =>
  
                 --  Case of a nested package or package instantiation coming
!                --  from source. Note that the anonymous wrapper package for
!                --  subprogram instances is not flagged Is_Generic_Instance at
!                --  this point, so there is a distinct circuit to handle them
!                --  (see case N_Subprogram_Instantiation below).
  
                 declare
                    Pkg_Ent : constant Entity_Id :=
--- 963,970 ----
              when N_Package_Declaration =>
  
                 --  Case of a nested package or package instantiation coming
!                --  from source, including the wrapper package for an instance
!                --  of a generic subprogram.
  
                 declare
                    Pkg_Ent : constant Entity_Id :=
*************** package body Exp_Dist is
*** 982,997 ****
                    end if;
                 end;
  
-             when N_Subprogram_Instantiation =>
- 
-                --  The subprogram declaration for an instance of a generic
-                --  subprogram is wrapped in a package that does not come from
-                --  source, so we need to explicitly traverse it here.
- 
-                if Comes_From_Source (Decl) then
-                   Visit_Nested_Pkg (Instance_Spec (Decl));
-                end if;
- 
              when others =>
                 null;
           end case;
--- 980,985 ----
*************** package body Exp_Dist is
*** 8213,8218 ****
--- 8201,8212 ----
           --  type from Interfaces, or the smallest floating point type from
           --  Standard whose range encompasses that of Typ.
  
+          function Is_Generic_Actual_Subtype (Typ : Entity_Id) return Boolean;
+          --  Return true if Typ is a subtype representing a generic formal type
+          --  as a subtype of the actual type in an instance. This is needed to
+          --  recognize these subtypes because the Is_Generic_Actual_Type flag
+          --  can only be relied upon within the instance.
+ 
           function Make_Helper_Function_Name
             (Loc : Source_Ptr;
              Typ : Entity_Id;
*************** package body Exp_Dist is
*** 8465,8471 ****
              --  For the subtype representing a generic actual type, go to the
              --  actual type.
  
!             if Is_Generic_Actual_Type (U_Type) then
                 U_Type := Underlying_Type (Base_Type (U_Type));
              end if;
  
--- 8459,8465 ----
              --  For the subtype representing a generic actual type, go to the
              --  actual type.
  
!             if Is_Generic_Actual_Subtype (U_Type) then
                 U_Type := Underlying_Type (Base_Type (U_Type));
              end if;
  
*************** package body Exp_Dist is
*** 9274,9280 ****
              --  For the subtype representing a generic actual type, go to the
              --  actual type.
  
!             if Is_Generic_Actual_Type (U_Type) then
                 U_Type := Underlying_Type (Base_Type (U_Type));
              end if;
  
--- 9268,9274 ----
              --  For the subtype representing a generic actual type, go to the
              --  actual type.
  
!             if Is_Generic_Actual_Subtype (U_Type) then
                 U_Type := Underlying_Type (Base_Type (U_Type));
              end if;
  
*************** package body Exp_Dist is
*** 10128,10134 ****
              --  For the subtype representing a generic actual type, go to the
              --  actual type.
  
!             if Is_Generic_Actual_Type (U_Type) then
                 U_Type := Underlying_Type (Base_Type (U_Type));
              end if;
  
--- 10122,10128 ----
              --  For the subtype representing a generic actual type, go to the
              --  actual type.
  
!             if Is_Generic_Actual_Subtype (U_Type) then
                 U_Type := Underlying_Type (Base_Type (U_Type));
              end if;
  
*************** package body Exp_Dist is
*** 10913,10918 ****
--- 10907,10936 ----
  
           end Find_Numeric_Representation;
  
+          ---------------------------------
+          --  Is_Generic_Actual_Subtype  --
+          ---------------------------------
+ 
+          function Is_Generic_Actual_Subtype (Typ : Entity_Id) return Boolean is
+          begin
+             if Is_Itype (Typ)
+               and then Present (Associated_Node_For_Itype (Typ))
+             then
+                declare
+                   N : constant Node_Id := Associated_Node_For_Itype (Typ);
+                begin
+                   if Nkind (N) = N_Subtype_Declaration
+                     and then Nkind (Parent (N)) = N_Package_Specification
+                     and then Is_Generic_Instance (Scope_Of_Spec (Parent (N)))
+                   then
+                      return True;
+                   end if;
+                end;
+             end if;
+ 
+             return False;
+          end Is_Generic_Actual_Subtype;
+ 
           ---------------------------
           -- Append_Array_Traversal --
           ---------------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_imgv.adb gcc-10.1.0/gcc/ada/exp_imgv.adb
*** gcc-9.3.0/gcc/ada/exp_imgv.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_imgv.adb	Thu May  7 10:49:59 2020
*************** package body Exp_Imgv is
*** 69,86 ****
     ------------------------------------
  
     procedure Build_Enumeration_Image_Tables (E : Entity_Id; N : Node_Id) is
!       Loc  : constant Source_Ptr := Sloc (E);
!       Str  : String_Id;
        Ind  : List_Id;
        Lit  : Entity_Id;
        Nlit : Nat;
!       Len  : Nat;
!       Estr : Entity_Id;
!       Eind : Entity_Id;
!       Ityp : Node_Id;
  
     begin
!       --  Nothing to do for other than a root enumeration type
  
        if E /= Root_Type (E) then
           return;
--- 69,91 ----
     ------------------------------------
  
     procedure Build_Enumeration_Image_Tables (E : Entity_Id; N : Node_Id) is
!       Loc : constant Source_Ptr := Sloc (E);
! 
!       Eind : Entity_Id;
!       Estr : Entity_Id;
        Ind  : List_Id;
+       Ityp : Node_Id;
+       Len  : Nat;
        Lit  : Entity_Id;
        Nlit : Nat;
!       Str  : String_Id;
! 
!       Saved_SSO : constant Character := Opt.Default_SSO;
!       --  Used to save the current scalar storage order during the generation
!       --  of the literal lookup table.
  
     begin
!       --  Nothing to do for types other than a root enumeration type
  
        if E /= Root_Type (E) then
           return;
*************** package body Exp_Imgv is
*** 138,143 ****
--- 143,157 ----
        Set_Lit_Strings (E, Estr);
        Set_Lit_Indexes (E, Eind);
  
+       --  Temporarily set the current scalar storage order to the default
+       --  during the generation of the literals table, since both the Image and
+       --  Value attributes rely on runtime routines for interpreting table
+       --  values.
+ 
+       Opt.Default_SSO := ' ';
+ 
+       --  Generate literal table
+ 
        Insert_Actions (N,
          New_List (
            Make_Object_Declaration (Loc,
*************** package body Exp_Imgv is
*** 168,173 ****
--- 182,191 ----
                Make_Aggregate (Loc,
                  Expressions => Ind))),
          Suppress => All_Checks);
+ 
+       --  Reset the scalar storage order to the saved value
+ 
+       Opt.Default_SSO := Saved_SSO;
     end Build_Enumeration_Image_Tables;
  
     ----------------------------
*************** package body Exp_Imgv is
*** 433,445 ****
  
        --  Local variables
  
        Imid      : RE_Id;
        Ptyp      : Entity_Id;
        Rtyp      : Entity_Id;
        Tent      : Entity_Id := Empty;
        Ttyp      : Entity_Id;
-       Proc_Ent  : Entity_Id;
-       Enum_Case : Boolean;
  
        Arg_List : List_Id;
        --  List of arguments for run-time procedure call
--- 451,463 ----
  
        --  Local variables
  
+       Enum_Case : Boolean;
        Imid      : RE_Id;
+       Proc_Ent  : Entity_Id;
        Ptyp      : Entity_Id;
        Rtyp      : Entity_Id;
        Tent      : Entity_Id := Empty;
        Ttyp      : Entity_Id;
  
        Arg_List : List_Id;
        --  List of arguments for run-time procedure call
*************** package body Exp_Imgv is
*** 450,455 ****
--- 468,475 ----
        Snn : constant Entity_Id := Make_Temporary (Loc, 'S');
        Pnn : constant Entity_Id := Make_Temporary (Loc, 'P');
  
+    --  Start of processing for Expand_Image_Attribute
+ 
     begin
        if Is_Object_Image (Pref) then
           Rewrite_Object_Image (N, Pref, Name_Image, Standard_String);
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_intr.adb gcc-10.1.0/gcc/ada/exp_intr.adb
*** gcc-9.3.0/gcc/ada/exp_intr.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_intr.adb	Thu May  7 10:49:59 2020
*************** package body Exp_Intr is
*** 988,996 ****
        --  are allowed, the generated code may lack block statements.
  
        if Needs_Fin then
!          Obj_Ref :=
!            Make_Explicit_Dereference (Loc,
!              Prefix => Duplicate_Subexpr_No_Checks (Arg));
  
           --  If the designated type is tagged, the finalization call must
           --  dispatch because the designated type may not be the actual type
--- 988,1018 ----
        --  are allowed, the generated code may lack block statements.
  
        if Needs_Fin then
! 
!          --  Ada 2005 (AI-251): In case of abstract interface type we displace
!          --  the pointer to reference the base of the object to deallocate its
!          --  memory, unless we're targetting a VM, in which case no special
!          --  processing is required.
! 
!          if Is_Interface (Directly_Designated_Type (Typ))
!            and then Tagged_Type_Expansion
!          then
!             Obj_Ref :=
!               Make_Explicit_Dereference (Loc,
!                 Prefix =>
!                   Unchecked_Convert_To (Typ,
!                     Make_Function_Call (Loc,
!                       Name                   =>
!                         New_Occurrence_Of (RTE (RE_Base_Address), Loc),
!                       Parameter_Associations => New_List (
!                         Unchecked_Convert_To (RTE (RE_Address),
!                           Duplicate_Subexpr_No_Checks (Arg))))));
! 
!          else
!             Obj_Ref :=
!               Make_Explicit_Dereference (Loc,
!                 Prefix => Duplicate_Subexpr_No_Checks (Arg));
!          end if;
  
           --  If the designated type is tagged, the finalization call must
           --  dispatch because the designated type may not be the actual type
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_pakd.adb gcc-10.1.0/gcc/ada/exp_pakd.adb
*** gcc-9.3.0/gcc/ada/exp_pakd.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_pakd.adb	Thu May  7 10:49:59 2020
*************** package body Exp_Pakd is
*** 1022,1028 ****
        Ass_OK : constant Boolean := Assignment_OK (Lhs);
        --  Used to preserve assignment OK status when assignment is rewritten
  
!       Rhs : Node_Id := Expression (N);
        --  Initially Rhs is the right hand side value, it will be replaced
        --  later by an appropriate unchecked conversion for the assignment.
  
--- 1022,1030 ----
        Ass_OK : constant Boolean := Assignment_OK (Lhs);
        --  Used to preserve assignment OK status when assignment is rewritten
  
!       Expr : Node_Id;
! 
!       Rhs  : Node_Id := Expression (N);
        --  Initially Rhs is the right hand side value, it will be replaced
        --  later by an appropriate unchecked conversion for the assignment.
  
*************** package body Exp_Pakd is
*** 1125,1131 ****
  
        --  If we are building the initialization procedure for a packed array,
        --  and Initialize_Scalars is enabled, each component assignment is an
!       --  out-of-range value by design.  Compile this value without checks,
        --  because a call to the array init_proc must not raise an exception.
  
        --  Condition is not consistent with description above, Within_Init_Proc
--- 1127,1133 ----
  
        --  If we are building the initialization procedure for a packed array,
        --  and Initialize_Scalars is enabled, each component assignment is an
!       --  out-of-range value by design. Compile this value without checks,
        --  because a call to the array init_proc must not raise an exception.
  
        --  Condition is not consistent with description above, Within_Init_Proc
*************** package body Exp_Pakd is
*** 1140,1145 ****
--- 1142,1177 ----
           Analyze_And_Resolve (Rhs, Ctyp);
        end if;
  
+       --  If any of the indices has a nonstandard representation, introduce
+       --  the proper Rep_To_Pos conversion, which in turn will generate index
+       --  checks when needed. We do this on a copy of the index expression,
+       --  rather that rewriting the LHS altogether.
+ 
+       Expr := First (Expressions (Lhs));
+       while Present (Expr) loop
+          declare
+             Expr_Typ : constant Entity_Id  := Etype (Expr);
+             Loc      : constant Source_Ptr := Sloc  (Expr);
+ 
+             Expr_Copy : Node_Id;
+ 
+          begin
+             if Is_Enumeration_Type (Expr_Typ)
+               and then Has_Non_Standard_Rep (Expr_Typ)
+             then
+                Expr_Copy :=
+                  Make_Attribute_Reference (Loc,
+                    Prefix         => New_Occurrence_Of (Expr_Typ, Loc),
+                    Attribute_Name => Name_Pos,
+                    Expressions    => New_List (Relocate_Node (Expr)));
+                Set_Parent (Expr_Copy, N);
+                Analyze_And_Resolve (Expr_Copy, Standard_Natural);
+             end if;
+          end;
+ 
+          Next (Expr);
+       end loop;
+ 
        --  Case of component size 1,2,4 or any component size for the modular
        --  case. These are the cases for which we can inline the code.
  
*************** package body Exp_Pakd is
*** 1532,1538 ****
           Silly_Boolean_Array_Xor_Test (N, R, Rtyp);
        end if;
  
!       --  Now that that silliness is taken care of, get packed array type
  
        Convert_To_PAT_Type (L);
        Convert_To_PAT_Type (R);
--- 1564,1570 ----
           Silly_Boolean_Array_Xor_Test (N, R, Rtyp);
        end if;
  
!       --  Now that silliness is taken care of, get packed array type
  
        Convert_To_PAT_Type (L);
        Convert_To_PAT_Type (R);
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_spark.adb gcc-10.1.0/gcc/ada/exp_spark.adb
*** gcc-9.3.0/gcc/ada/exp_spark.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_spark.adb	Thu May  7 10:49:59 2020
***************
*** 26,31 ****
--- 26,32 ----
  with Atree;    use Atree;
  with Checks;   use Checks;
  with Einfo;    use Einfo;
+ with Exp_Attr;
  with Exp_Ch4;
  with Exp_Ch5;  use Exp_Ch5;
  with Exp_Dbug; use Exp_Dbug;
*************** package body Exp_SPARK is
*** 58,66 ****
     procedure Expand_SPARK_N_Freeze_Type (E : Entity_Id);
     --  Build the DIC procedure of a type when needed, if not already done
  
-    procedure Expand_SPARK_N_Indexed_Component (N : Node_Id);
-    --  Insert explicit dereference if required
- 
     procedure Expand_SPARK_N_Loop_Statement (N : Node_Id);
     --  Perform loop statement-specific expansion
  
--- 59,64 ----
*************** package body Exp_SPARK is
*** 76,81 ****
--- 74,82 ----
     procedure Expand_SPARK_N_Selected_Component (N : Node_Id);
     --  Insert explicit dereference if required
  
+    procedure Expand_SPARK_N_Slice_Or_Indexed_Component (N : Node_Id);
+    --  Insert explicit dereference if required
+ 
     ------------------
     -- Expand_SPARK --
     ------------------
*************** package body Exp_SPARK is
*** 137,144 ****
                 Expand_SPARK_N_Freeze_Type (Entity (N));
              end if;
  
!          when N_Indexed_Component =>
!             Expand_SPARK_N_Indexed_Component (N);
  
           when N_Selected_Component =>
              Expand_SPARK_N_Selected_Component (N);
--- 138,147 ----
                 Expand_SPARK_N_Freeze_Type (Entity (N));
              end if;
  
!          when N_Indexed_Component
!             | N_Slice
!          =>
!             Expand_SPARK_N_Slice_Or_Indexed_Component (N);
  
           when N_Selected_Component =>
              Expand_SPARK_N_Selected_Component (N);
*************** package body Exp_SPARK is
*** 173,178 ****
--- 176,182 ----
        Aname   : constant Name_Id      := Attribute_Name (N);
        Attr_Id : constant Attribute_Id := Get_Attribute_Id (Aname);
        Loc     : constant Source_Ptr   := Sloc (N);
+       Pref    : constant Node_Id      := Prefix (N);
        Typ     : constant Entity_Id    := Etype (N);
        Expr    : Node_Id;
  
*************** package body Exp_SPARK is
*** 196,201 ****
--- 200,242 ----
               Parameter_Associations => New_List (Expr)));
           Analyze_And_Resolve (N, Typ);
  
+       --  Whenever possible, replace a prefix which is an enumeration literal
+       --  by the corresponding literal value.
+ 
+       elsif Attr_Id = Attribute_Enum_Rep then
+          declare
+             Exprs : constant List_Id := Expressions (N);
+          begin
+             if Is_Non_Empty_List (Exprs) then
+                Expr := First (Exprs);
+             else
+                Expr := Prefix (N);
+             end if;
+ 
+             --  If the argument is a literal, expand it
+ 
+             if Nkind (Expr) in N_Has_Entity
+               and then
+                 (Ekind (Entity (Expr)) = E_Enumeration_Literal
+                  or else
+                    (Nkind (Expr) in N_Has_Entity
+                     and then Ekind (Entity (Expr)) = E_Constant
+                     and then Present (Renamed_Object (Entity (Expr)))
+                     and then Is_Entity_Name (Renamed_Object (Entity (Expr)))
+                     and then Ekind (Entity (Renamed_Object (Entity (Expr)))) =
+                       E_Enumeration_Literal))
+             then
+                Exp_Attr.Expand_N_Attribute_Reference (N);
+             end if;
+          end;
+ 
+       elsif Attr_Id = Attribute_Object_Size
+         or else Attr_Id = Attribute_Size
+         or else Attr_Id = Attribute_Value_Size
+         or else Attr_Id = Attribute_VADS_Size
+       then
+          Exp_Attr.Expand_Size_Attribute (N);
+ 
        --  For attributes which return Universal_Integer, introduce a conversion
        --  to the expected type with the appropriate check flags set.
  
*************** package body Exp_SPARK is
*** 210,219 ****
          or else Attr_Id = Attribute_Pos
          or else Attr_Id = Attribute_Position
          or else Attr_Id = Attribute_Range_Length
-         or else Attr_Id = Attribute_Object_Size
-         or else Attr_Id = Attribute_Size
-         or else Attr_Id = Attribute_Value_Size
-         or else Attr_Id = Attribute_VADS_Size
          or else Attr_Id = Attribute_Aft
          or else Attr_Id = Attribute_Max_Alignment_For_Allocation
        then
--- 251,256 ----
*************** package body Exp_SPARK is
*** 266,271 ****
--- 303,322 ----
                 Set_Do_Overflow_Check (N);
              end if;
           end;
+ 
+       elsif Attr_Id = Attribute_Constrained then
+ 
+          --  If the prefix is an access to object, the attribute applies to
+          --  the designated object, so rewrite with an explicit dereference.
+ 
+          if Is_Access_Type (Etype (Pref))
+            and then
+              (not Is_Entity_Name (Pref) or else Is_Object (Entity (Pref)))
+          then
+             Rewrite (Pref,
+                      Make_Explicit_Dereference (Loc, Relocate_Node (Pref)));
+             Analyze_And_Resolve (N, Standard_Boolean);
+          end if;
        end if;
     end Expand_SPARK_N_Attribute_Reference;
  
*************** package body Exp_SPARK is
*** 292,312 ****
        end if;
     end Expand_SPARK_N_Loop_Statement;
  
-    --------------------------------------
-    -- Expand_SPARK_N_Indexed_Component --
-    --------------------------------------
- 
-    procedure Expand_SPARK_N_Indexed_Component (N : Node_Id) is
-       Pref : constant Node_Id    := Prefix (N);
-       Typ  : constant Entity_Id  := Etype (Pref);
- 
-    begin
-       if Is_Access_Type (Typ) then
-          Insert_Explicit_Dereference (Pref);
-          Analyze_And_Resolve (Pref, Designated_Type (Typ));
-       end if;
-    end Expand_SPARK_N_Indexed_Component;
- 
     ---------------------------------------
     -- Expand_SPARK_N_Object_Declaration --
     ---------------------------------------
--- 343,348 ----
*************** package body Exp_SPARK is
*** 515,527 ****
  
           Insert_Explicit_Dereference (Pref);
           Analyze_And_Resolve (Pref, Designated_Type (Typ));
- 
-          if Ekind (Etype (Pref)) = E_Private_Subtype
-            and then Is_For_Access_Subtype (Etype (Pref))
-          then
-             Set_Etype (Pref, Base_Type (Etype (Pref)));
-          end if;
        end if;
     end Expand_SPARK_N_Selected_Component;
  
  end Exp_SPARK;
--- 551,572 ----
  
           Insert_Explicit_Dereference (Pref);
           Analyze_And_Resolve (Pref, Designated_Type (Typ));
        end if;
     end Expand_SPARK_N_Selected_Component;
  
+    -----------------------------------------------
+    -- Expand_SPARK_N_Slice_Or_Indexed_Component --
+    -----------------------------------------------
+ 
+    procedure Expand_SPARK_N_Slice_Or_Indexed_Component (N : Node_Id) is
+       Pref : constant Node_Id   := Prefix (N);
+       Typ  : constant Entity_Id := Etype (Pref);
+ 
+    begin
+       if Is_Access_Type (Typ) then
+          Insert_Explicit_Dereference (Pref);
+          Analyze_And_Resolve (Pref, Designated_Type (Typ));
+       end if;
+    end Expand_SPARK_N_Slice_Or_Indexed_Component;
+ 
  end Exp_SPARK;
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_tss.adb gcc-10.1.0/gcc/ada/exp_tss.adb
*** gcc-9.3.0/gcc/ada/exp_tss.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_tss.adb	Thu May  7 10:49:59 2020
*************** with Lib;      use Lib;
*** 32,37 ****
--- 32,38 ----
  with Restrict; use Restrict;
  with Rident;   use Rident;
  with Sem_Aux;  use Sem_Aux;
+ with Sem_Ch6;  use Sem_Ch6;
  with Sem_Util; use Sem_Util;
  with Sinfo;    use Sinfo;
  
*************** package body Exp_Tss is
*** 275,282 ****
                    then
                       exit;
  
!                   elsif Ekind (Etype (E1)) /= E_Anonymous_Access_Type
!                     and then Ekind (Etype (E2)) /= E_Anonymous_Access_Type
                      and then Etype (E1) /= Etype (E2)
                    then
                       exit;
--- 276,283 ----
                    then
                       exit;
  
!                   elsif not Is_Anonymous_Access_Type (Etype (E1))
!                     and then not Is_Anonymous_Access_Type (Etype (E2))
                      and then Etype (E1) /= Etype (E2)
                    then
                       exit;
*************** package body Exp_Tss is
*** 287,292 ****
--- 288,304 ----
                                 /= Directly_Designated_Type (Etype (E2))
                    then
                       exit;
+ 
+                   elsif Ekind_In (Etype (E1),
+                           E_Anonymous_Access_Subprogram_Type,
+                           E_Anonymous_Access_Protected_Subprogram_Type)
+                     and then Ekind_In (Etype (E2),
+                                E_Anonymous_Access_Subprogram_Type,
+                                E_Anonymous_Access_Protected_Subprogram_Type)
+                     and then not Conforming_Types
+                                    (Etype (E1), Etype (E2), Fully_Conformant)
+                   then
+                      exit;
                    end if;
  
                    E1 := Next_Formal (E1);
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_tss.ads gcc-10.1.0/gcc/ada/exp_tss.ads
*** gcc-9.3.0/gcc/ada/exp_tss.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_tss.ads	Thu May  7 10:49:59 2020
*************** package Exp_Tss is
*** 150,155 ****
--- 150,157 ----
     function Is_Init_Proc (E : Entity_Id) return Boolean;
     --  Version for init procs, same as Is_TSS (E, TSS_Init_Proc);
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Is_TSS (E : Entity_Id; Nam : TSS_Name_Type) return Boolean;
     --  Determines if given entity (E) is the name of a TSS identified by Nam
  
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_unst.adb gcc-10.1.0/gcc/ada/exp_unst.adb
*** gcc-9.3.0/gcc/ada/exp_unst.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_unst.adb	Thu May  7 10:49:59 2020
*************** with Atree;    use Atree;
*** 27,32 ****
--- 27,33 ----
  with Debug;    use Debug;
  with Einfo;    use Einfo;
  with Elists;   use Elists;
+ with Exp_Util; use Exp_Util;
  with Lib;      use Lib;
  with Namet;    use Namet;
  with Nlists;   use Nlists;
*************** package body Exp_Unst is
*** 53,65 ****
     -- Local Subprograms --
     -----------------------
  
!    procedure Unnest_Subprogram (Subp : Entity_Id; Subp_Body : Node_Id);
     --  Subp is a library-level subprogram which has nested subprograms, and
     --  Subp_Body is the corresponding N_Subprogram_Body node. This procedure
     --  declares the AREC types and objects, adds assignments to the AREC record
     --  as required, defines the xxxPTR types for uplevel referenced objects,
     --  adds the ARECP parameter to all nested subprograms which need it, and
!    --  modifies all uplevel references appropriately.
  
     -----------
     -- Calls --
--- 54,70 ----
     -- Local Subprograms --
     -----------------------
  
!    procedure Unnest_Subprogram
!      (Subp : Entity_Id; Subp_Body : Node_Id; For_Inline : Boolean := False);
     --  Subp is a library-level subprogram which has nested subprograms, and
     --  Subp_Body is the corresponding N_Subprogram_Body node. This procedure
     --  declares the AREC types and objects, adds assignments to the AREC record
     --  as required, defines the xxxPTR types for uplevel referenced objects,
     --  adds the ARECP parameter to all nested subprograms which need it, and
!    --  modifies all uplevel references appropriately. If For_Inline is True,
!    --  we're unnesting this subprogram because it's on the list of inlined
!    --  subprograms and should unnest it despite it not being part of the main
!    --  unit.
  
     -----------
     -- Calls --
*************** package body Exp_Unst is
*** 254,261 ****
              Typ := Full_View (Typ);
           end if;
  
!          return Is_Array_Type (Typ)
!            and then not Is_Constrained (Typ);
        else
           return False;
        end if;
--- 259,265 ----
              Typ := Full_View (Typ);
           end if;
  
!          return Is_Array_Type (Typ) and then not Is_Constrained (Typ);
        else
           return False;
        end if;
*************** package body Exp_Unst is
*** 298,304 ****
     -- Unnest_Subprogram --
     -----------------------
  
!    procedure Unnest_Subprogram (Subp : Entity_Id; Subp_Body : Node_Id) is
        function AREC_Name (J : Pos; S : String) return Name_Id;
        --  Returns name for string ARECjS, where j is the decimal value of j
  
--- 302,309 ----
     -- Unnest_Subprogram --
     -----------------------
  
!    procedure Unnest_Subprogram
!      (Subp : Entity_Id; Subp_Body : Node_Id; For_Inline : Boolean := False) is
        function AREC_Name (J : Pos; S : String) return Name_Id;
        --  Returns name for string ARECjS, where j is the decimal value of j
  
*************** package body Exp_Unst is
*** 403,417 ****
        --  to determine whether the main unit is generic (the scope stack is not
        --  present when this is called on the main unit).
  
!       if Ekind (Cunit_Entity (Main_Unit)) = E_Package_Body
          and then Is_Generic_Unit (Spec_Entity (Cunit_Entity (Main_Unit)))
        then
           return;
-       end if;
  
!       --  Only unnest when generating code for the main source unit
  
!       if not In_Extended_Main_Code_Unit (Subp_Body) then
           return;
        end if;
  
--- 408,428 ----
        --  to determine whether the main unit is generic (the scope stack is not
        --  present when this is called on the main unit).
  
!       if not For_Inline
!         and then Ekind (Cunit_Entity (Main_Unit)) = E_Package_Body
          and then Is_Generic_Unit (Spec_Entity (Cunit_Entity (Main_Unit)))
        then
           return;
  
!       --  Only unnest when generating code for the main source unit or if
!       --  we're unnesting for inline.  But in some Annex E cases the Sloc
!       --  points to a different unit, so also make sure that the Parent
!       --  isn't in something that we know we're generating code for.
  
!       elsif not For_Inline
!         and then not In_Extended_Main_Code_Unit (Subp_Body)
!         and then not In_Extended_Main_Code_Unit (Parent (Subp_Body))
!       then
           return;
        end if;
  
*************** package body Exp_Unst is
*** 464,470 ****
              Callee : Entity_Id;
  
              procedure Check_Static_Type
!               (T : Entity_Id; N : Node_Id; DT : in out Boolean);
              --  Given a type T, checks if it is a static type defined as a type
              --  with no dynamic bounds in sight. If so, the only action is to
              --  set Is_Static_Type True for T. If T is not a static type, then
--- 475,484 ----
              Callee : Entity_Id;
  
              procedure Check_Static_Type
!               (T                : Entity_Id;
!                N                : Node_Id;
!                DT               : in out Boolean;
!                Check_Designated : Boolean := False);
              --  Given a type T, checks if it is a static type defined as a type
              --  with no dynamic bounds in sight. If so, the only action is to
              --  set Is_Static_Type True for T. If T is not a static type, then
*************** package body Exp_Unst is
*** 474,479 ****
--- 488,496 ----
              --  node that will need to be replaced. If not specified, it means
              --  we can't do a replacement because the bound is implicit.
  
+             --  If Check_Designated is True and T or its full view is an access
+             --  type, check whether the designated type has dynamic bounds.
+ 
              procedure Note_Uplevel_Ref
                (E      : Entity_Id;
                 N      : Node_Id;
*************** package body Exp_Unst is
*** 492,498 ****
              -----------------------
  
              procedure Check_Static_Type
!               (T : Entity_Id; N : Node_Id; DT : in out Boolean)
              is
                 procedure Note_Uplevel_Bound (N : Node_Id; Ref : Node_Id);
                 --  N is the bound of a dynamic type. This procedure notes that
--- 509,518 ----
              -----------------------
  
              procedure Check_Static_Type
!               (T                : Entity_Id;
!                N                : Node_Id;
!                DT               : in out Boolean;
!                Check_Designated : Boolean := False)
              is
                 procedure Note_Uplevel_Bound (N : Node_Id; Ref : Node_Id);
                 --  N is the bound of a dynamic type. This procedure notes that
*************** package body Exp_Unst is
*** 510,517 ****
                 procedure Note_Uplevel_Bound (N : Node_Id; Ref : Node_Id) is
                 begin
                    --  Entity name case. Make sure that the entity is declared
!                   --  in a subprogram. This may not be the case for for a type
!                   --  in a loop appearing in a precondition.
                    --  Exclude explicitly  discriminants (that can appear
                    --  in bounds of discriminated components).
  
--- 530,537 ----
                 procedure Note_Uplevel_Bound (N : Node_Id; Ref : Node_Id) is
                 begin
                    --  Entity name case. Make sure that the entity is declared
!                   --  in a subprogram. This may not be the case for a type in a
!                   --  loop appearing in a precondition.
                    --  Exclude explicitly  discriminants (that can appear
                    --  in bounds of discriminated components).
  
*************** package body Exp_Unst is
*** 590,595 ****
--- 610,642 ----
                    then
                       Note_Uplevel_Bound (Prefix (N), Ref);
  
+                   --  Conditional expressions
+ 
+                   elsif Nkind (N) = N_If_Expression then
+                      declare
+                         Expr : Node_Id;
+ 
+                      begin
+                         Expr := First (Expressions (N));
+                         while Present (Expr) loop
+                            Note_Uplevel_Bound (Expr, Ref);
+                            Next (Expr);
+                         end loop;
+                      end;
+ 
+                   elsif Nkind (N) = N_Case_Expression then
+                      declare
+                         Alternative : Node_Id;
+ 
+                      begin
+                         Note_Uplevel_Bound (Expression (N), Ref);
+ 
+                         Alternative := First (Alternatives (N));
+                         while Present (Alternative) loop
+                            Note_Uplevel_Bound (Expression (Alternative), Ref);
+                         end loop;
+                      end;
+ 
                    --  Conversion case
  
                    elsif Nkind (N) = N_Type_Conversion then
*************** package body Exp_Unst is
*** 602,608 ****
              begin
                 --  If already marked static, immediate return
  
!                if Is_Static_Type (T) then
                    return;
                 end if;
  
--- 649,655 ----
              begin
                 --  If already marked static, immediate return
  
!                if Is_Static_Type (T) and then not Check_Designated then
                    return;
                 end if;
  
*************** package body Exp_Unst is
*** 685,697 ****
  
                 --  For private type, examine whether full view is static
  
!                elsif Is_Private_Type (T) and then Present (Full_View (T)) then
!                   Check_Static_Type (Full_View (T), N, DT);
  
                    if Is_Static_Type (Full_View (T)) then
                       Set_Is_Static_Type (T);
                    end if;
  
                 --  For now, ignore other types
  
                 else
--- 732,751 ----
  
                 --  For private type, examine whether full view is static
  
!                elsif Is_Incomplete_Or_Private_Type (T)
!                  and then Present (Full_View (T))
!                then
!                   Check_Static_Type (Full_View (T), N, DT, Check_Designated);
  
                    if Is_Static_Type (Full_View (T)) then
                       Set_Is_Static_Type (T);
                    end if;
  
+                --  For access types, check designated type when required
+ 
+                elsif Is_Access_Type (T) and then Check_Designated then
+                   Check_Static_Type (Directly_Designated_Type (T), N, DT);
+ 
                 --  For now, ignore other types
  
                 else
*************** package body Exp_Unst is
*** 936,942 ****
                       declare
                          DT : Boolean := False;
                       begin
!                         Check_Static_Type (Etype (Expression (N)), Empty,  DT);
                       end;
                    end if;
  
--- 990,1000 ----
                       declare
                          DT : Boolean := False;
                       begin
!                         Check_Static_Type
!                           (Etype (Expression (N)),
!                            Empty,
!                            DT,
!                            Check_Designated => Nkind (N) = N_Free_Statement);
                       end;
                    end if;
  
*************** package body Exp_Unst is
*** 1747,1753 ****
                       Comp  : Entity_Id;
  
                       Decl_Assign : Node_Id;
!                      --  Assigment to set uplink, Empty if none
  
                       Decl_ARECnT  : Node_Id;
                       Decl_ARECnPT : Node_Id;
--- 1805,1811 ----
                       Comp  : Entity_Id;
  
                       Decl_Assign : Node_Id;
!                      --  Assignment to set uplink, Empty if none
  
                       Decl_ARECnT  : Node_Id;
                       Decl_ARECnPT : Node_Id;
*************** package body Exp_Unst is
*** 2123,2133 ****
              --  not need rewriting (e.g. the appearence in a conversion).
              --  Also ignore if no reference was specified or if the rewriting
              --  has already been done (this can happen if the N_Identifier
!             --  occurs more than one time in the tree).
  
              if No (UPJ.Ref)
                or else not Is_Entity_Name (UPJ.Ref)
                or else not Present (Entity (UPJ.Ref))
              then
                 goto Continue;
              end if;
--- 2181,2194 ----
              --  not need rewriting (e.g. the appearence in a conversion).
              --  Also ignore if no reference was specified or if the rewriting
              --  has already been done (this can happen if the N_Identifier
!             --  occurs more than one time in the tree). Also ignore references
!             --  when not generating C code (in particular for the case of LLVM,
!             --  since GNAT-LLVM will handle the processing for up-level refs).
  
              if No (UPJ.Ref)
                or else not Is_Entity_Name (UPJ.Ref)
                or else not Present (Entity (UPJ.Ref))
+               or else not Opt.Generate_C_Code
              then
                 goto Continue;
              end if;
*************** package body Exp_Unst is
*** 2188,2195 ****
                   and then Present (Constant_Value (UPJ.Ent))
                   and then Is_Static_Expression (Constant_Value (UPJ.Ent))
                 then
!                   Rewrite (UPJ.Ref,
!                     New_Copy_Tree (Constant_Value (UPJ.Ent)));
                    goto Continue;
                 end if;
  
--- 2249,2255 ----
                   and then Present (Constant_Value (UPJ.Ent))
                   and then Is_Static_Expression (Constant_Value (UPJ.Ent))
                 then
!                   Rewrite (UPJ.Ref, New_Copy_Tree (Constant_Value (UPJ.Ent)));
                    goto Continue;
                 end if;
  
*************** package body Exp_Unst is
*** 2289,2294 ****
--- 2349,2366 ----
                 --  expect any exceptions)
  
                 Analyze_And_Resolve (UPJ.Ref, Typ, Suppress => All_Checks);
+ 
+                --  Generate an extra temporary to facilitate the C backend
+                --  processing this dereference
+ 
+                if Opt.Modify_Tree_For_C
+                  and then Nkind_In (Parent (UPJ.Ref),
+                             N_Type_Conversion,
+                             N_Unchecked_Type_Conversion)
+                then
+                   Force_Evaluation (UPJ.Ref, Mode => Strict);
+                end if;
+ 
                 Pop_Scope;
              end Rewrite_One_Ref;
           end;
*************** package body Exp_Unst is
*** 2504,2509 ****
--- 2576,2584 ----
           return OK;
        end Search_Subprograms;
  
+       Subp      : Entity_Id;
+       Subp_Body : Node_Id;
+ 
     --  Start of processing for Unnest_Subprograms
  
     begin
*************** package body Exp_Unst is
*** 2523,2528 ****
--- 2598,2621 ----
        end if;
  
        Do_Search (N);
+ 
+       --  Unnest any subprograms passed on the list of inlined subprograms
+ 
+       Subp := First_Inlined_Subprogram (N);
+ 
+       while Present (Subp) loop
+          Subp_Body := Parent (Declaration_Node (Subp));
+ 
+          if Nkind (Subp_Body) = N_Subprogram_Declaration
+            and then Present (Corresponding_Body (Subp_Body))
+          then
+             Subp_Body := Parent (Declaration_Node
+                                    (Corresponding_Body (Subp_Body)));
+          end if;
+ 
+          Unnest_Subprogram (Subp, Subp_Body, For_Inline => True);
+          Next_Inlined_Subprogram (Subp);
+       end loop;
     end Unnest_Subprograms;
  
  end Exp_Unst;
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_util.adb gcc-10.1.0/gcc/ada/exp_util.adb
*** gcc-9.3.0/gcc/ada/exp_util.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_util.adb	Thu May  7 10:49:59 2020
*************** with Einfo;    use Einfo;
*** 32,37 ****
--- 32,38 ----
  with Elists;   use Elists;
  with Errout;   use Errout;
  with Exp_Aggr; use Exp_Aggr;
+ with Exp_Ch2;  use Exp_Ch2;
  with Exp_Ch6;  use Exp_Ch6;
  with Exp_Ch7;  use Exp_Ch7;
  with Exp_Ch11; use Exp_Ch11;
*************** package body Exp_Util is
*** 343,349 ****
              return;
           end if;
  
!          --  Case of zero/non-zero semantics or non-standard enumeration
           --  representation. In each case, we rewrite the node as:
  
           --      ityp!(N) /= False'Enum_Rep
--- 344,350 ----
              return;
           end if;
  
!          --  Case of zero/nonzero semantics or nonstandard enumeration
           --  representation. In each case, we rewrite the node as:
  
           --      ityp!(N) /= False'Enum_Rep
*************** package body Exp_Util is
*** 472,477 ****
--- 473,641 ----
        end if;
     end Append_Freeze_Actions;
  
+    --------------------------------------
+    -- Attr_Constrained_Statically_True --
+    --------------------------------------
+ 
+    function Attribute_Constrained_Static_Value (Pref : Node_Id) return Boolean
+    is
+       Ptyp       : constant Entity_Id := Etype (Pref);
+       Formal_Ent : constant Entity_Id := Param_Entity (Pref);
+ 
+       function Is_Constrained_Aliased_View (Obj : Node_Id) return Boolean;
+       --  Ada 2005 (AI-363): Returns True if the object name Obj denotes a
+       --  view of an aliased object whose subtype is constrained.
+ 
+       ---------------------------------
+       -- Is_Constrained_Aliased_View --
+       ---------------------------------
+ 
+       function Is_Constrained_Aliased_View (Obj : Node_Id) return Boolean is
+          E : Entity_Id;
+ 
+       begin
+          if Is_Entity_Name (Obj) then
+             E := Entity (Obj);
+ 
+             if Present (Renamed_Object (E)) then
+                return Is_Constrained_Aliased_View (Renamed_Object (E));
+             else
+                return Is_Aliased (E) and then Is_Constrained (Etype (E));
+             end if;
+ 
+          else
+             return Is_Aliased_View (Obj)
+               and then
+                 (Is_Constrained (Etype (Obj))
+                  or else
+                    (Nkind (Obj) = N_Explicit_Dereference
+                     and then
+                       not Object_Type_Has_Constrained_Partial_View
+                         (Typ  => Base_Type (Etype (Obj)),
+                          Scop => Current_Scope)));
+          end if;
+       end Is_Constrained_Aliased_View;
+ 
+    --  Start of processing for Attribute_Constrained_Static_Value
+ 
+    begin
+       --  We are in a case where the attribute is known statically, and
+       --  implicit dereferences have been rewritten.
+ 
+       pragma Assert
+         (not (Present (Formal_Ent)
+               and then Ekind (Formal_Ent) /= E_Constant
+               and then Present (Extra_Constrained (Formal_Ent)))
+          and then
+            not (Is_Access_Type (Etype (Pref))
+                 and then (not Is_Entity_Name (Pref)
+                           or else Is_Object (Entity (Pref))))
+          and then
+            not (Nkind (Pref) = N_Identifier
+                 and then Ekind (Entity (Pref)) = E_Variable
+                 and then Present (Extra_Constrained (Entity (Pref)))));
+ 
+       if Is_Entity_Name (Pref) then
+          declare
+             Ent : constant Entity_Id   := Entity (Pref);
+             Res : Boolean;
+ 
+          begin
+             --  (RM J.4) obsolescent cases
+ 
+             if Is_Type (Ent) then
+ 
+                --  Private type
+ 
+                if Is_Private_Type (Ent) then
+                   Res := not Has_Discriminants (Ent)
+                     or else Is_Constrained (Ent);
+ 
+                --  It not a private type, must be a generic actual type
+                --  that corresponded to a private type. We know that this
+                --  correspondence holds, since otherwise the reference
+                --  within the generic template would have been illegal.
+ 
+                else
+                   if Is_Composite_Type (Underlying_Type (Ent)) then
+                      Res := Is_Constrained (Ent);
+                   else
+                      Res := True;
+                   end if;
+                end if;
+ 
+             else
+ 
+                --  If the prefix is not a variable or is aliased, then
+                --  definitely true; if it's a formal parameter without an
+                --  associated extra formal, then treat it as constrained.
+ 
+                --  Ada 2005 (AI-363): An aliased prefix must be known to be
+                --  constrained in order to set the attribute to True.
+ 
+                if not Is_Variable (Pref)
+                  or else Present (Formal_Ent)
+                  or else (Ada_Version < Ada_2005
+                           and then Is_Aliased_View (Pref))
+                  or else (Ada_Version >= Ada_2005
+                           and then Is_Constrained_Aliased_View (Pref))
+                then
+                   Res := True;
+ 
+                --  Variable case, look at type to see if it is constrained.
+                --  Note that the one case where this is not accurate (the
+                --  procedure formal case), has been handled above.
+ 
+                --  We use the Underlying_Type here (and below) in case the
+                --  type is private without discriminants, but the full type
+                --  has discriminants. This case is illegal, but we generate
+                --  it internally for passing to the Extra_Constrained
+                --  parameter.
+ 
+                else
+                   --  In Ada 2012, test for case of a limited tagged type,
+                   --  in which case the attribute is always required to
+                   --  return True. The underlying type is tested, to make
+                   --  sure we also return True for cases where there is an
+                   --  unconstrained object with an untagged limited partial
+                   --  view which has defaulted discriminants (such objects
+                   --  always produce a False in earlier versions of
+                   --  Ada). (Ada 2012: AI05-0214)
+ 
+                   Res :=
+                     Is_Constrained (Underlying_Type (Etype (Ent)))
+                     or else
+                       (Ada_Version >= Ada_2012
+                        and then Is_Tagged_Type (Underlying_Type (Ptyp))
+                        and then Is_Limited_Type (Ptyp));
+                end if;
+             end if;
+ 
+             return Res;
+          end;
+ 
+       --  Prefix is not an entity name. These are also cases where we can
+       --  always tell at compile time by looking at the form and type of the
+       --  prefix. If an explicit dereference of an object with constrained
+       --  partial view, this is unconstrained (Ada 2005: AI95-0363). If the
+       --  underlying type is a limited tagged type, then Constrained is
+       --  required to always return True (Ada 2012: AI05-0214).
+ 
+       else
+          return not Is_Variable (Pref)
+            or else
+              (Nkind (Pref) = N_Explicit_Dereference
+               and then
+                 not Object_Type_Has_Constrained_Partial_View
+                   (Typ  => Base_Type (Ptyp),
+                    Scop => Current_Scope))
+            or else Is_Constrained (Underlying_Type (Ptyp))
+            or else (Ada_Version >= Ada_2012
+                     and then Is_Tagged_Type (Underlying_Type (Ptyp))
+                     and then Is_Limited_Type (Ptyp));
+       end if;
+    end Attribute_Constrained_Static_Value;
+ 
     ------------------------------------
     -- Build_Allocate_Deallocate_Proc --
     ------------------------------------
*************** package body Exp_Util is
*** 1977,1982 ****
--- 2141,2147 ----
        Set_Scope (Obj_Id, Proc_Id);
  
        Set_First_Entity (Proc_Id, Obj_Id);
+       Set_Last_Entity  (Proc_Id, Obj_Id);
  
        --  Generate:
        --    procedure <Work_Typ>DIC (_object : <Work_Typ>);
*************** package body Exp_Util is
*** 4444,4451 ****
  
     begin
        --  If no component clause, then everything is fine, since the back end
!       --  never bit-misaligns by default, even if there is a pragma Packed for
!       --  the record.
  
        if No (Comp) or else No (Component_Clause (Comp)) then
           return False;
--- 4609,4616 ----
  
     begin
        --  If no component clause, then everything is fine, since the back end
!       --  never misaligns from byte boundaries by default, even if there is a
!       --  pragma Pack for the record.
  
        if No (Comp) or else No (Component_Clause (Comp)) then
           return False;
*************** package body Exp_Util is
*** 4492,4498 ****
     begin
        --  E is the package or generic package which is externally axiomatized
  
!       if Ekind_In (E, E_Generic_Package, E_Package)
          and then Has_Annotate_Pragma_For_External_Axiomatization (E)
        then
           return E;
--- 4657,4663 ----
     begin
        --  E is the package or generic package which is externally axiomatized
  
!       if Is_Package_Or_Generic_Package (E)
          and then Has_Annotate_Pragma_For_External_Axiomatization (E)
        then
           return E;
*************** package body Exp_Util is
*** 4608,4614 ****
     begin
        pragma Assert (Is_Concurrent_Type (Typ));
  
!       if Ekind (Typ) in Protected_Kind then
           if Has_Entries (Typ)
  
              --  A protected type without entries that covers an interface and
--- 4773,4779 ----
     begin
        pragma Assert (Is_Concurrent_Type (Typ));
  
!       if Is_Protected_Type (Typ) then
           if Has_Entries (Typ)
  
              --  A protected type without entries that covers an interface and
*************** package body Exp_Util is
*** 4940,4957 ****
        end if;
     end Evolve_Or_Else;
  
-    -------------------
-    -- Exceptions_OK --
-    -------------------
- 
-    function Exceptions_OK return Boolean is
-    begin
-       return
-         not (Restriction_Active (No_Exception_Handlers)    or else
-              Restriction_Active (No_Exception_Propagation) or else
-              Restriction_Active (No_Exceptions));
-    end Exceptions_OK;
- 
     -----------------------------------------
     -- Expand_Static_Predicates_In_Choices --
     -----------------------------------------
--- 5105,5110 ----
*************** package body Exp_Util is
*** 5079,5087 ****
        --  may be constants that depend on the bounds of a string literal, both
        --  standard string types and more generally arrays of characters.
  
!       --  In GNATprove mode, these extra subtypes are not needed
  
!       if GNATprove_Mode then
           return;
        end if;
  
--- 5232,5244 ----
        --  may be constants that depend on the bounds of a string literal, both
        --  standard string types and more generally arrays of characters.
  
!       --  In GNATprove mode, these extra subtypes are not needed, unless Exp is
!       --  a static expression. In that case, the subtype will be constrained
!       --  while the original type might be unconstrained, so expanding the type
!       --  is necessary both for passing legality checks in GNAT and for precise
!       --  analysis in GNATprove.
  
!       if GNATprove_Mode and then not Is_Static_Expression (Exp) then
           return;
        end if;
  
*************** package body Exp_Util is
*** 5106,5112 ****
  
              --  This subtype indication may be used later for constraint checks
              --  we better make sure that if a variable was used as a bound of
!             --  of the original slice, its value is frozen.
  
              Evaluate_Slice_Bounds (Exp);
           end;
--- 5263,5269 ----
  
              --  This subtype indication may be used later for constraint checks
              --  we better make sure that if a variable was used as a bound of
!             --  the original slice, its value is frozen.
  
              Evaluate_Slice_Bounds (Exp);
           end;
*************** package body Exp_Util is
*** 5354,5359 ****
--- 5511,5517 ----
     ----------------------
  
     function Finalize_Address (Typ : Entity_Id) return Entity_Id is
+       Btyp : constant Entity_Id := Base_Type (Typ);
        Utyp : Entity_Id := Typ;
  
     begin
*************** package body Exp_Util is
*** 5393,5404 ****
        --  records do not automatically inherit operations, but maybe they
        --  should???)
  
!       if Is_Untagged_Derivation (Typ) then
!          if Is_Protected_Type (Typ) then
!             Utyp := Corresponding_Record_Type (Root_Type (Base_Type (Typ)));
  
           else
!             Utyp := Underlying_Type (Root_Type (Base_Type (Typ)));
  
              if Is_Protected_Type (Utyp) then
                 Utyp := Corresponding_Record_Type (Utyp);
--- 5551,5562 ----
        --  records do not automatically inherit operations, but maybe they
        --  should???)
  
!       if Is_Untagged_Derivation (Btyp) then
!          if Is_Protected_Type (Btyp) then
!             Utyp := Corresponding_Record_Type (Root_Type (Btyp));
  
           else
!             Utyp := Underlying_Type (Root_Type (Btyp));
  
              if Is_Protected_Type (Utyp) then
                 Utyp := Corresponding_Record_Type (Utyp);
*************** package body Exp_Util is
*** 5626,5632 ****
           --  We can retrieve primitive operations by name if it is an internal
           --  name. For equality we must check that both of its operands have
           --  the same type, to avoid confusion with user-defined equalities
!          --  than may have a non-symmetric signature.
  
           exit when Chars (Op) = Name
             and then
--- 5784,5790 ----
           --  We can retrieve primitive operations by name if it is an internal
           --  name. For equality we must check that both of its operands have
           --  the same type, to avoid confusion with user-defined equalities
!          --  than may have a asymmetric signature.
  
           exit when Chars (Op) = Name
             and then
*************** package body Exp_Util is
*** 6637,6649 ****
     -- Homonym_Number --
     --------------------
  
!    function Homonym_Number (Subp : Entity_Id) return Nat is
!       Count : Nat;
!       Hom   : Entity_Id;
  
     begin
-       Count := 1;
-       Hom := Homonym (Subp);
        while Present (Hom) loop
           if Scope (Hom) = Scope (Subp) then
              Count := Count + 1;
--- 6795,6805 ----
     -- Homonym_Number --
     --------------------
  
!    function Homonym_Number (Subp : Entity_Id) return Pos is
!       Hom   : Entity_Id := Homonym (Subp);
!       Count : Pos := 1;
  
     begin
        while Present (Hom) loop
           if Scope (Hom) = Scope (Subp) then
              Count := Count + 1;
*************** package body Exp_Util is
*** 6830,6837 ****
           N := Assoc_Node;
           P := Parent (Assoc_Node);
  
!       --  Non-subexpression case. Note that N is initially Empty in this case
!       --  (N is only guaranteed Non-Empty in the subexpr case).
  
        else
           N := Empty;
--- 6986,6993 ----
           N := Assoc_Node;
           P := Parent (Assoc_Node);
  
!       --  Nonsubexpression case. Note that N is initially Empty in this case
!       --  (N is only guaranteed non-Empty in the subexpr case).
  
        else
           N := Empty;
*************** package body Exp_Util is
*** 8258,8265 ****
           return False;
        end if;
  
!       --  Here we have a tagged type, see if it has any unlayed out fields
!       --  other than a possible tag and parent fields. If so, we return False.
  
        Comp := First_Component (U);
        while Present (Comp) loop
--- 8414,8421 ----
           return False;
        end if;
  
!       --  Here we have a tagged type, see if it has any component (other than
!       --  tag and parent) with no component_clause. If so, we return False.
  
        Comp := First_Component (U);
        while Present (Comp) loop
*************** package body Exp_Util is
*** 8273,8279 ****
           end if;
        end loop;
  
!       --  All components are layed out
  
        return True;
     end Is_Fully_Repped_Tagged_Type;
--- 8429,8435 ----
           end if;
        end loop;
  
!       --  All components have clauses
  
        return True;
     end Is_Fully_Repped_Tagged_Type;
*************** package body Exp_Util is
*** 8353,8359 ****
              S : Nat;
  
           begin
!             --  If component reference is for an array with non-static bounds,
              --  then it is always aligned: we can only process unaligned arrays
              --  with static bounds (more precisely compile time known bounds).
  
--- 8509,8515 ----
              S : Nat;
  
           begin
!             --  If component reference is for an array with nonstatic bounds,
              --  then it is always aligned: we can only process unaligned arrays
              --  with static bounds (more precisely compile time known bounds).
  
*************** package body Exp_Util is
*** 8493,8504 ****
           return False;
        end if;
  
-       --  We only need to worry if the target has strict alignment
- 
-       if not Target_Strict_Alignment then
-          return False;
-       end if;
- 
        --  If it is a slice, then look at the array type being sliced
  
        declare
--- 8649,8654 ----
*************** package body Exp_Util is
*** 8542,8550 ****
                 --  We are definitely in trouble if the record in question
                 --  has an alignment, and either we know this alignment is
                 --  inconsistent with the alignment of the slice, or we don't
!                --  know what the alignment of the slice should be.
  
!                if Known_Alignment (Ptyp)
                   and then (Unknown_Alignment (Styp)
                              or else Alignment (Styp) > Alignment (Ptyp))
                 then
--- 8692,8702 ----
                 --  We are definitely in trouble if the record in question
                 --  has an alignment, and either we know this alignment is
                 --  inconsistent with the alignment of the slice, or we don't
!                --  know what the alignment of the slice should be. But this
!                --  really matters only if the target has strict alignment.
  
!                if Target_Strict_Alignment
!                  and then Known_Alignment (Ptyp)
                   and then (Unknown_Alignment (Styp)
                              or else Alignment (Styp) > Alignment (Ptyp))
                 then
*************** package body Exp_Util is
*** 9075,9081 ****
        then
           Constr_Root := Root_Typ;
  
!          --  At this point in the expansion, non-limited view of the type
           --  must be available, otherwise the error will be reported later.
  
           if From_Limited_With (Constr_Root)
--- 9227,9233 ----
        then
           Constr_Root := Root_Typ;
  
!          --  At this point in the expansion, nonlimited view of the type
           --  must be available, otherwise the error will be reported later.
  
           if From_Limited_With (Constr_Root)
*************** package body Exp_Util is
*** 9236,9245 ****
        Proc_Id := Invariant_Procedure (Typ);
        pragma Assert (Present (Proc_Id));
  
!       return
!         Make_Procedure_Call_Statement (Loc,
!           Name                   => New_Occurrence_Of (Proc_Id, Loc),
!           Parameter_Associations => New_List (Relocate_Node (Expr)));
     end Make_Invariant_Call;
  
     ------------------------
--- 9388,9403 ----
        Proc_Id := Invariant_Procedure (Typ);
        pragma Assert (Present (Proc_Id));
  
!       --  Ignore the invariant if that policy is in effect
! 
!       if Invariants_Ignored (Typ) then
!          return Make_Null_Statement (Loc);
!       else
!          return
!            Make_Procedure_Call_Statement (Loc,
!              Name                   => New_Occurrence_Of (Proc_Id, Loc),
!              Parameter_Associations => New_List (Relocate_Node (Expr)));
!       end if;
     end Make_Invariant_Call;
  
     ------------------------
*************** package body Exp_Util is
*** 9560,9566 ****
        end if;
  
        --  Do not generate a check within an internal subprogram (stream
!       --  functions and the like, including including predicate functions).
  
        if Within_Internal_Subprogram then
           return Make_Null_Statement (Loc);
--- 9718,9724 ----
        end if;
  
        --  Do not generate a check within an internal subprogram (stream
!       --  functions and the like, including predicate functions).
  
        if Within_Internal_Subprogram then
           return Make_Null_Statement (Loc);
*************** package body Exp_Util is
*** 9848,9854 ****
        --  in the derivation chain starting from parent type Par_Typ leading to
        --  derived type Deriv_Typ. The returned value is one of the following:
        --
!       --    * An entity which is either a discriminant or a non-discriminant
        --      name, and renames/constraints Discr.
        --
        --    * An expression which constraints Discr
--- 10006,10012 ----
        --  in the derivation chain starting from parent type Par_Typ leading to
        --  derived type Deriv_Typ. The returned value is one of the following:
        --
!       --    * An entity which is either a discriminant or a nondiscriminant
        --      name, and renames/constraints Discr.
        --
        --    * An expression which constraints Discr
*************** package body Exp_Util is
*** 10562,10655 ****
        end if;
     end Needs_Constant_Address;
  
-    ------------------------
-    -- Needs_Finalization --
-    ------------------------
- 
-    function Needs_Finalization (Typ : Entity_Id) return Boolean is
-       function Has_Some_Controlled_Component
-         (Input_Typ : Entity_Id) return Boolean;
-       --  Determine whether type Input_Typ has at least one controlled
-       --  component.
- 
-       -----------------------------------
-       -- Has_Some_Controlled_Component --
-       -----------------------------------
- 
-       function Has_Some_Controlled_Component
-         (Input_Typ : Entity_Id) return Boolean
-       is
-          Comp : Entity_Id;
- 
-       begin
-          --  When a type is already frozen and has at least one controlled
-          --  component, or is manually decorated, it is sufficient to inspect
-          --  flag Has_Controlled_Component.
- 
-          if Has_Controlled_Component (Input_Typ) then
-             return True;
- 
-          --  Otherwise inspect the internals of the type
- 
-          elsif not Is_Frozen (Input_Typ) then
-             if Is_Array_Type (Input_Typ) then
-                return Needs_Finalization (Component_Type (Input_Typ));
- 
-             elsif Is_Record_Type (Input_Typ) then
-                Comp := First_Component (Input_Typ);
-                while Present (Comp) loop
-                   if Needs_Finalization (Etype (Comp)) then
-                      return True;
-                   end if;
- 
-                   Next_Component (Comp);
-                end loop;
-             end if;
-          end if;
- 
-          return False;
-       end Has_Some_Controlled_Component;
- 
-    --  Start of processing for Needs_Finalization
- 
-    begin
-       --  Certain run-time configurations and targets do not provide support
-       --  for controlled types.
- 
-       if Restriction_Active (No_Finalization) then
-          return False;
- 
-       --  C++ types are not considered controlled. It is assumed that the non-
-       --  Ada side will handle their clean up.
- 
-       elsif Convention (Typ) = Convention_CPP then
-          return False;
- 
-       --  Class-wide types are treated as controlled because derivations from
-       --  the root type may introduce controlled components.
- 
-       elsif Is_Class_Wide_Type (Typ) then
-          return True;
- 
-       --  Concurrent types are controlled as long as their corresponding record
-       --  is controlled.
- 
-       elsif Is_Concurrent_Type (Typ)
-         and then Present (Corresponding_Record_Type (Typ))
-         and then Needs_Finalization (Corresponding_Record_Type (Typ))
-       then
-          return True;
- 
-       --  Otherwise the type is controlled when it is either derived from type
-       --  [Limited_]Controlled and not subject to aspect Disable_Controlled, or
-       --  contains at least one controlled component.
- 
-       else
-          return
-            Is_Controlled (Typ) or else Has_Some_Controlled_Component (Typ);
-       end if;
-    end Needs_Finalization;
- 
     ----------------------------
     -- New_Class_Wide_Subtype --
     ----------------------------
--- 10720,10725 ----
*************** package body Exp_Util is
*** 10809,10817 ****
                 Ptyp : constant Entity_Id := Etype (P);
  
              begin
!                --  If we know the component size and it is less than 64, then
!                --  we are definitely OK. The back end always does assignment of
!                --  misaligned small objects correctly.
  
                 if Known_Static_Component_Size (Ptyp)
                   and then Component_Size (Ptyp) <= 64
--- 10879,10887 ----
                 Ptyp : constant Entity_Id := Etype (P);
  
              begin
!                --  If we know the component size and it is not larger than 64,
!                --  then we are definitely OK. The back end does the assignment
!                --  of misaligned small objects correctly.
  
                 if Known_Static_Component_Size (Ptyp)
                   and then Component_Size (Ptyp) <= 64
*************** package body Exp_Util is
*** 10834,10846 ****
                 Comp : constant Entity_Id := Entity (Selector_Name (N));
  
              begin
!                --  If there is no component clause, then we are in the clear
!                --  since the back end will never misalign a large component
!                --  unless it is forced to do so. In the clear means we need
!                --  only the recursive test on the prefix.
  
                 if Component_May_Be_Bit_Aligned (Comp) then
                    return True;
                 else
                    return Possible_Bit_Aligned_Component (P);
                 end if;
--- 10904,10918 ----
                 Comp : constant Entity_Id := Entity (Selector_Name (N));
  
              begin
!                --  This is the crucial test: if the component itself causes
!                --  trouble, then we can stop and return True.
  
                 if Component_May_Be_Bit_Aligned (Comp) then
                    return True;
+ 
+                --  Otherwise, we need to test the prefix, to see if we are
+                --  selecting from a possibly unaligned component.
+ 
                 else
                    return Possible_Bit_Aligned_Component (P);
                 end if;
*************** package body Exp_Util is
*** 10853,10859 ****
              return Possible_Bit_Aligned_Component (Prefix (N));
  
           --  For an unchecked conversion, check whether the expression may
!          --  be bit-aligned.
  
           when N_Unchecked_Type_Conversion =>
              return Possible_Bit_Aligned_Component (Expression (N));
--- 10925,10931 ----
              return Possible_Bit_Aligned_Component (Prefix (N));
  
           --  For an unchecked conversion, check whether the expression may
!          --  be bit aligned.
  
           when N_Unchecked_Type_Conversion =>
              return Possible_Bit_Aligned_Component (Expression (N));
*************** package body Exp_Util is
*** 11341,11347 ****
           --  Generate:
           --    Rnn : Exp_Type renames Expr;
  
!          if Renaming_Req then
              E :=
                Make_Object_Renaming_Declaration (Loc,
                  Defining_Identifier => Def_Id,
--- 11413,11429 ----
           --  Generate:
           --    Rnn : Exp_Type renames Expr;
  
!          --  In GNATprove mode, we prefer to use renamings for intermediate
!          --  variables to definition of constants, due to the implicit move
!          --  operation that such a constant definition causes as part of the
!          --  support in GNATprove for ownership pointers. Hence, we generate
!          --  a renaming for a reference to an object of a nonscalar type.
! 
!          if Renaming_Req
!            or else (GNATprove_Mode
!                      and then Is_Object_Reference (Exp)
!                      and then not Is_Scalar_Type (Exp_Type))
!          then
              E :=
                Make_Object_Renaming_Declaration (Loc,
                  Defining_Identifier => Def_Id,
*************** package body Exp_Util is
*** 11463,11469 ****
  
        --  For expressions that denote names, we can use a renaming scheme.
        --  This is needed for correctness in the case of a volatile object of
!       --  a non-volatile type because the Make_Reference call of the "default"
        --  approach would generate an illegal access value (an access value
        --  cannot designate such an object - see Analyze_Reference).
  
--- 11545,11551 ----
  
        --  For expressions that denote names, we can use a renaming scheme.
        --  This is needed for correctness in the case of a volatile object of
!       --  a nonvolatile type because the Make_Reference call of the "default"
        --  approach would generate an illegal access value (an access value
        --  cannot designate such an object - see Analyze_Reference).
  
*************** package body Exp_Util is
*** 11485,11491 ****
               Name                => Relocate_Node (Exp)));
  
           --  If this is a packed reference, or a selected component with
!          --  a non-standard representation, a reference to the temporary
           --  will be replaced by a copy of the original expression (see
           --  Exp_Ch2.Expand_Renaming). Otherwise the temporary must be
           --  elaborated by gigi, and is of course not to be replaced in-line
--- 11567,11573 ----
               Name                => Relocate_Node (Exp)));
  
           --  If this is a packed reference, or a selected component with
!          --  a nonstandard representation, a reference to the temporary
           --  will be replaced by a copy of the original expression (see
           --  Exp_Ch2.Expand_Renaming). Otherwise the temporary must be
           --  elaborated by gigi, and is of course not to be replaced in-line
*************** package body Exp_Util is
*** 11699,11704 ****
--- 11781,11790 ----
  
        Set_Assignment_OK (Res, Assignment_OK (Exp));
  
+       --  Preserve the Do_Range_Check flag in all copies
+ 
+       Set_Do_Range_Check (Res, Do_Range_Check (Exp));
+ 
        --  Finally rewrite the original expression and we are done
  
        Rewrite (Exp, Res);
*************** package body Exp_Util is
*** 12091,12097 ****
                           and then Nkind_In (N, N_Package_Body,
                                                 N_Package_Specification);
        --  N is at the library level if the top-most context is a package and
!       --  the path taken to reach N does not inlcude non-package constructs.
  
     begin
        case Nkind (N) is
--- 12177,12183 ----
                           and then Nkind_In (N, N_Package_Body,
                                                 N_Package_Specification);
        --  N is at the library level if the top-most context is a package and
!       --  the path taken to reach N does not include nonpackage constructs.
  
     begin
        case Nkind (N) is
*************** package body Exp_Util is
*** 12164,12172 ****
        Typ     : Entity_Id;
  
     begin
!       if No (L)
!         or else Is_Empty_List (L)
!       then
           return False;
        end if;
  
--- 12250,12256 ----
        Typ     : Entity_Id;
  
     begin
!       if No (L) or else Is_Empty_List (L) then
           return False;
        end if;
  
*************** package body Exp_Util is
*** 12778,12784 ****
  
              --  Mark the assignment statement as elaboration code. This allows
              --  the early call region mechanism (see Sem_Elab) to properly
!             --  ignore such assignments even though they are non-preelaborable
              --  code.
  
              Set_Is_Elaboration_Code (Asn);
--- 12862,12868 ----
  
              --  Mark the assignment statement as elaboration code. This allows
              --  the early call region mechanism (see Sem_Elab) to properly
!             --  ignore such assignments even though they are nonpreelaborable
              --  code.
  
              Set_Is_Elaboration_Code (Asn);
*************** package body Exp_Util is
*** 13595,13603 ****
           begin
              E := First_Component_Or_Discriminant (Typ);
              while Present (E) loop
!                if Component_May_Be_Bit_Aligned (E)
!                  or else Type_May_Have_Bit_Aligned_Components (Etype (E))
!                then
                    return True;
                 end if;
  
--- 13679,13695 ----
           begin
              E := First_Component_Or_Discriminant (Typ);
              while Present (E) loop
!                --  This is the crucial test: if the component itself causes
!                --  trouble, then we can stop and return True.
! 
!                if Component_May_Be_Bit_Aligned (E) then
!                   return True;
!                end if;
! 
!                --  Otherwise, we need to test its type, to see if it may
!                --  itself contain a troublesome component.
! 
!                if Type_May_Have_Bit_Aligned_Components (Etype (E)) then
                    return True;
                 end if;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/exp_util.ads gcc-10.1.0/gcc/ada/exp_util.ads
*** gcc-9.3.0/gcc/ada/exp_util.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/exp_util.ads	Thu May  7 10:49:59 2020
*************** package Exp_Util is
*** 240,245 ****
--- 240,249 ----
     --  Note that the added nodes are not analyzed. The analyze call is found in
     --  Exp_Ch13.Expand_N_Freeze_Entity.
  
+    function Attribute_Constrained_Static_Value (Pref : Node_Id) return Boolean;
+    --  Return the static value of a statically known attribute reference
+    --  Pref'Constrained.
+ 
     procedure Build_Allocate_Deallocate_Proc
       (N           : Node_Id;
        Is_Allocate : Boolean);
*************** package Exp_Util is
*** 401,432 ****
     --  case overflow.
  
     function Component_May_Be_Bit_Aligned (Comp : Entity_Id) return Boolean;
!    --  This function is in charge of detecting record components that may
!    --  cause trouble in the back end if an attempt is made to assign the
!    --  component. The back end can handle such assignments with no problem if
!    --  the components involved are small (64-bits or less) records or scalar
!    --  items (including bit-packed arrays represented with modular types) or
!    --  are both aligned on a byte boundary (starting on a byte boundary, and
!    --  occupying an integral number of bytes).
     --
     --  However, problems arise for records larger than 64 bits, or for arrays
     --  (other than bit-packed arrays represented with a modular type) if the
!    --  component starts on a non-byte boundary, or does not occupy an integral
!    --  number of bytes (i.e. there are some bits possibly shared with fields
!    --  at the start or beginning of the component). The back end cannot handle
!    --  loading and storing such components in a single operation.
     --
!    --  This function is used to detect the troublesome situation. it is
!    --  conservative in the sense that it produces True unless it knows for
!    --  sure that the component is safe (as outlined in the first paragraph
!    --  above). The code generation for record and array assignment checks for
!    --  trouble using this function, and if so the assignment is generated
     --  component-wise, which the back end is required to handle correctly.
-    --
-    --  Note that in GNAT 3, the back end will reject such components anyway,
-    --  so the hard work in checking for this case is wasted in GNAT 3, but
-    --  it is harmless, so it is easier to do it in all cases, rather than
-    --  conditionalize it in GNAT 5 or beyond.
  
     function Containing_Package_With_Ext_Axioms
       (E : Entity_Id) return Entity_Id;
--- 405,431 ----
     --  case overflow.
  
     function Component_May_Be_Bit_Aligned (Comp : Entity_Id) return Boolean;
!    --  This function is in charge of detecting record components that may cause
!    --  trouble for the back end if an attempt is made to access the component
!    --  as a whole. The back end can handle such accesses with no problem if the
!    --  components involved are small (64 bits or less) records or scalar items
!    --  (including bit-packed arrays represented with a modular type), or else
!    --  if they are aligned on byte boundaries (i.e. starting on a byte boundary
!    --  and occupying an integral number of bytes).
     --
     --  However, problems arise for records larger than 64 bits, or for arrays
     --  (other than bit-packed arrays represented with a modular type) if the
!    --  component either does not start on a byte boundary or does not occupy an
!    --  integral number of bytes (i.e. there are some bits possibly shared with
!    --  other components at the start or the end of the component). The back end
!    --  cannot handle loading from or storing to such components as a whole.
     --
!    --  This function is used to detect the troublesome situation. It is meant
!    --  to be conservative in the sense that it produces True unless it knows
!    --  for sure that the component is safe (as outlined in the first paragraph
!    --  above). The processing for record and array assignment indirectly checks
!    --  for trouble using this function and, if so, the assignment is expanded
     --  component-wise, which the back end is required to handle correctly.
  
     function Containing_Package_With_Ext_Axioms
       (E : Entity_Id) return Entity_Id;
*************** package Exp_Util is
*** 559,568 ****
     --  indicating that no checks were required). The Sloc field of the
     --  constructed N_Or_Else node is copied from Cond1.
  
-    function Exceptions_OK return Boolean;
-    --  Determine whether exceptions are allowed to be caught, propagated, or
-    --  raised.
- 
     procedure Expand_Static_Predicates_In_Choices (N : Node_Id);
     --  N is either a case alternative or a variant. The Discrete_Choices field
     --  of N points to a list of choices. If any of these choices is the name
--- 558,563 ----
*************** package Exp_Util is
*** 604,609 ****
--- 599,606 ----
     --  record component containing the tag of Iface if T implements Iface or
     --  Empty if it does not.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Find_Prim_Op (T : Entity_Id; Name : Name_Id) return Entity_Id;
     --  Find the first primitive operation of a tagged type T with name Name.
     --  This function allows the use of a primitive operation which is not
*************** package Exp_Util is
*** 739,745 ****
     --  pragmas at the start of the package declaration contains
     --    pragma Annotate (GNATprove, External_Axiomatization);
  
!    function Homonym_Number (Subp : Entity_Id) return Nat;
     --  Here subp is the entity for a subprogram. This routine returns the
     --  homonym number used to disambiguate overloaded subprograms in the same
     --  scope (the number is used as part of constructed names to make sure that
--- 736,742 ----
     --  pragmas at the start of the package declaration contains
     --    pragma Annotate (GNATprove, External_Axiomatization);
  
!    function Homonym_Number (Subp : Entity_Id) return Pos;
     --  Here subp is the entity for a subprogram. This routine returns the
     --  homonym number used to disambiguate overloaded subprograms in the same
     --  scope (the number is used as part of constructed names to make sure that
*************** package Exp_Util is
*** 789,794 ****
--- 786,793 ----
     --  routine is useful for the case of a discriminated type, and testing for
     --  component overlap would be a pain.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Is_Library_Level_Tagged_Type (Typ : Entity_Id) return Boolean;
     --  Return True if Typ is a library level tagged type. Currently we use
     --  this information to build statically allocated dispatch tables.
*************** package Exp_Util is
*** 948,957 ****
     --  consist of constants, when the object has a nontrivial initialization
     --  or is controlled.
  
-    function Needs_Finalization (Typ : Entity_Id) return Boolean;
-    --  Determine whether type Typ is controlled and this requires finalization
-    --  actions.
- 
     function Non_Limited_Designated_Type (T : Entity_Id) return Entity_Id;
     --  An anonymous access type may designate a limited view. Check whether
     --  non-limited view is available during expansion, to examine components
--- 947,952 ----
*************** package Exp_Util is
*** 970,981 ****
     --  returned only if the replacement is safe.
  
     function Possible_Bit_Aligned_Component (N : Node_Id) return Boolean;
!    --  This function is used during processing the assignment of a record or
!    --  indexed component. The argument N is either the left hand or right hand
!    --  side of an assignment, and this function determines if there is a record
!    --  component reference where the record may be bit aligned in a manner that
!    --  causes trouble for the back end (see Component_May_Be_Bit_Aligned for
!    --  further details).
  
     function Power_Of_Two (N : Node_Id) return Nat;
     --  Determines if N is a known at compile time value which  is of the form
--- 965,976 ----
     --  returned only if the replacement is safe.
  
     function Possible_Bit_Aligned_Component (N : Node_Id) return Boolean;
!    --  This function is used during processing the assignment of a record or an
!    --  array, or the construction of an aggregate. The argument N is either the
!    --  left or the right hand side of an assignment and the function determines
!    --  whether there is a record component reference where the component may be
!    --  bit aligned in a manner that causes trouble for the back end (see also
!    --  Component_May_Be_Bit_Aligned for further details).
  
     function Power_Of_Two (N : Node_Id) return Nat;
     --  Determines if N is a known at compile time value which  is of the form
*************** package Exp_Util is
*** 1178,1185 ****
     function Type_May_Have_Bit_Aligned_Components
       (Typ : Entity_Id) return Boolean;
     --  Determines if Typ is a composite type that has within it (looking down
!    --  recursively at any subcomponents), a record type which has component
!    --  that may be bit aligned (see Possible_Bit_Aligned_Component). The result
     --  is conservative, in that a result of False is decisive. A result of True
     --  means that such a component may or may not be present.
  
--- 1173,1181 ----
     function Type_May_Have_Bit_Aligned_Components
       (Typ : Entity_Id) return Boolean;
     --  Determines if Typ is a composite type that has within it (looking down
!    --  recursively at subcomponents) a record which contains a component that
!    --  may be bit aligned in a manner that causes trouble for the back end
!    --  (see also Component_May_Be_Bit_Aligned for further details). The result
     --  is conservative, in that a result of False is decisive. A result of True
     --  means that such a component may or may not be present.
  
diff -Nrcpad gcc-9.3.0/gcc/ada/expander.adb gcc-10.1.0/gcc/ada/expander.adb
*** gcc-9.3.0/gcc/ada/expander.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/expander.adb	Thu May  7 10:49:59 2020
*************** package body Expander is
*** 112,118 ****
              Expand_SPARK (N);
           end if;
  
!          Set_Analyzed (N, Full_Analysis);
  
           --  Regular expansion is normally followed by special handling for
           --  transient scopes for unconstrained results, etc. but this is not
--- 112,123 ----
              Expand_SPARK (N);
           end if;
  
!          --  Do not reset the Analyzed flag if it has been set on purpose
!          --  during preanalysis.
! 
!          if Full_Analysis then
!             Set_Analyzed (N);
!          end if;
  
           --  Regular expansion is normally followed by special handling for
           --  transient scopes for unconstrained results, etc. but this is not
diff -Nrcpad gcc-9.3.0/gcc/ada/expect.c gcc-10.1.0/gcc/ada/expect.c
*** gcc-9.3.0/gcc/ada/expect.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/expect.c	Thu May  7 10:49:59 2020
***************
*** 29,42 ****
   *                                                                          *
   ****************************************************************************/
  
- #ifdef __alpha_vxworks
- #include "vxWorks.h"
- #endif
- 
  #ifdef IN_RTS
  #define POSIX
! #include "tconfig.h"
! #include "tsystem.h"
  #else
  #include "config.h"
  #include "system.h"
--- 29,39 ----
   *                                                                          *
   ****************************************************************************/
  
  #ifdef IN_RTS
  #define POSIX
! #include "runtime.h"
! #include <unistd.h>
! 
  #else
  #include "config.h"
  #include "system.h"
diff -Nrcpad gcc-9.3.0/gcc/ada/fe.h gcc-10.1.0/gcc/ada/fe.h
*** gcc-9.3.0/gcc/ada/fe.h	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/fe.h	Thu May  7 10:49:59 2020
***************
*** 29,36 ****
   *                                                                          *
   ****************************************************************************/
  
! /* This file contains declarations to access front-end functions and variables
!    used by gigi.
  
     WARNING: functions taking String_Pointer parameters must abide by the rule
     documented alongside the definition of String_Pointer in types.h.  */
--- 29,42 ----
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header that contains the declarations of Ada subprograms and
!    variables used by gigi and not declared in other C header files.  It was
!    created manually from Ada specifications.  The original Ada declarations
!    in these specifications must be marked with:
! 
!    "WARNING: There is a matching C declaration of this <entity_kind> in fe.h"
! 
!    where <entity_kind> is either "subprogram" or "variable" or "type".
  
     WARNING: functions taking String_Pointer parameters must abide by the rule
     documented alongside the definition of String_Pointer in types.h.  */
*************** extern "C" {
*** 41,63 ****
  
  /* atree: */
  
! #define Serious_Errors_Detected atree__serious_errors_detected
  
! /* comperr: */
  
! #define Compiler_Abort comperr__compiler_abort
! extern int Compiler_Abort (String_Pointer, String_Pointer, Boolean) ATTRIBUTE_NORETURN;
  
! /* csets: */
  
! #define Fold_Lower(C) csets__fold_lower[C]
! #define Fold_Upper(C) csets__fold_upper[C]
! extern char Fold_Lower[], Fold_Upper[];
  
  /* debug: */
  
  #define Debug_Flag_Dot_R	debug__debug_flag_dot_r
  #define Debug_Flag_NN		debug__debug_flag_nn
  extern Boolean Debug_Flag_Dot_R;
  extern Boolean Debug_Flag_NN;
  
--- 47,67 ----
  
  /* atree: */
  
! #define Serious_Errors_Detected		atree__serious_errors_detected
  
! extern Nat Serious_Errors_Detected;
  
! /* comperr: */
  
! #define Compiler_Abort		comperr__compiler_abort
  
! extern int Compiler_Abort (String_Pointer, String_Pointer, Boolean) ATTRIBUTE_NORETURN;
  
  /* debug: */
  
  #define Debug_Flag_Dot_R	debug__debug_flag_dot_r
  #define Debug_Flag_NN		debug__debug_flag_nn
+ 
  extern Boolean Debug_Flag_Dot_R;
  extern Boolean Debug_Flag_NN;
  
*************** extern void Set_Normalized_First_Bit	(En
*** 81,139 ****
  extern void Set_Normalized_Position	(Entity_Id, Uint);
  extern void Set_RM_Size			(Entity_Id, Uint);
  
! #define Is_Entity_Name einfo__is_entity_name
  extern Boolean Is_Entity_Name		(Node_Id);
  
! #define Get_Attribute_Definition_Clause einfo__get_attribute_definition_clause
  extern Node_Id Get_Attribute_Definition_Clause (Entity_Id, unsigned char);
  
  /* errout: */
  
! #define Error_Msg_N               errout__error_msg_n
! #define Error_Msg_NE              errout__error_msg_ne
! #define Set_Identifier_Casing     errout__set_identifier_casing
  
! extern void Error_Msg_N	          (String_Pointer, Node_Id);
! extern void Error_Msg_NE          (String_Pointer, Node_Id, Entity_Id);
! extern void Set_Identifier_Casing (Char *, const Char *);
  
  /* err_vars: */
  
! #define Error_Msg_Node_2        err_vars__error_msg_node_2
! #define Error_Msg_Uint_1        err_vars__error_msg_uint_1
! #define Error_Msg_Uint_2        err_vars__error_msg_uint_2
  
! extern Entity_Id Error_Msg_Node_2;
! extern Uint      Error_Msg_Uint_1;
! extern Uint      Error_Msg_Uint_2;
! extern Nat       Serious_Errors_Detected;
  
  /* exp_ch11:  */
  
! #define Get_Local_Raise_Call_Entity exp_ch11__get_local_raise_call_entity
! #define Get_RT_Exception_Entity exp_ch11__get_rt_exception_entity
! #define Get_RT_Exception_Name exp_ch11__get_rt_exception_name
! #define Warn_If_No_Local_Raise exp_ch11__warn_if_no_local_raise
  
! extern Entity_Id Get_Local_Raise_Call_Entity (void);
! extern Entity_Id Get_RT_Exception_Entity (int);
! extern void Get_RT_Exception_Name (int);
! extern void Warn_If_No_Local_Raise (int);
  
  /* exp_code:  */
  
! #define Asm_Input_Constraint exp_code__asm_input_constraint
! #define Asm_Input_Value exp_code__asm_input_value
! #define Asm_Output_Constraint exp_code__asm_output_constraint
! #define Asm_Output_Variable exp_code__asm_output_variable
! #define Asm_Template exp_code__asm_template
! #define Clobber_Get_Next exp_code__clobber_get_next
! #define Clobber_Setup exp_code__clobber_setup
! #define Is_Asm_Volatile exp_code__is_asm_volatile
! #define Next_Asm_Input exp_code__next_asm_input
! #define Next_Asm_Output exp_code__next_asm_output
! #define Setup_Asm_Inputs exp_code__setup_asm_inputs
! #define Setup_Asm_Outputs exp_code__setup_asm_outputs
  
  extern Node_Id Asm_Input_Constraint	(void);
  extern Node_Id Asm_Input_Value		(void);
--- 85,142 ----
  extern void Set_Normalized_Position	(Entity_Id, Uint);
  extern void Set_RM_Size			(Entity_Id, Uint);
  
! #define Is_Entity_Name		einfo__is_entity_name
! 
  extern Boolean Is_Entity_Name		(Node_Id);
  
! #define Get_Attribute_Definition_Clause	einfo__get_attribute_definition_clause
! 
  extern Node_Id Get_Attribute_Definition_Clause (Entity_Id, unsigned char);
  
  /* errout: */
  
! #define Error_Msg_N		errout__error_msg_n
! #define Error_Msg_NE		errout__error_msg_ne
! #define Set_Identifier_Casing	errout__set_identifier_casing
  
! extern void Error_Msg_N			(String_Pointer, Node_Id);
! extern void Error_Msg_NE		(String_Pointer, Node_Id, Entity_Id);
! extern void Set_Identifier_Casing	(Char *, const Char *);
  
  /* err_vars: */
  
! #define Error_Msg_Uint_1	err_vars__error_msg_uint_1
! #define Error_Msg_Uint_2	err_vars__error_msg_uint_2
  
! extern Uint Error_Msg_Uint_1;
! extern Uint Error_Msg_Uint_2;
  
  /* exp_ch11:  */
  
! #define Get_Local_Raise_Call_Entity	exp_ch11__get_local_raise_call_entity
! #define Get_RT_Exception_Entity		exp_ch11__get_rt_exception_entity
! #define Get_RT_Exception_Name		exp_ch11__get_rt_exception_name
! #define Warn_If_No_Local_Raise		exp_ch11__warn_if_no_local_raise
  
! extern Entity_Id Get_Local_Raise_Call_Entity	(void);
! extern Entity_Id Get_RT_Exception_Entity	(int);
! extern void Get_RT_Exception_Name		(int);
! extern void Warn_If_No_Local_Raise		(int);
  
  /* exp_code:  */
  
! #define Asm_Input_Constraint	exp_code__asm_input_constraint
! #define Asm_Input_Value		exp_code__asm_input_value
! #define Asm_Output_Constraint	exp_code__asm_output_constraint
! #define Asm_Output_Variable	exp_code__asm_output_variable
! #define Asm_Template		exp_code__asm_template
! #define Clobber_Get_Next	exp_code__clobber_get_next
! #define Clobber_Setup		exp_code__clobber_setup
! #define Is_Asm_Volatile		exp_code__is_asm_volatile
! #define Next_Asm_Input		exp_code__next_asm_input
! #define Next_Asm_Output		exp_code__next_asm_output
! #define Setup_Asm_Inputs	exp_code__setup_asm_inputs
! #define Setup_Asm_Outputs	exp_code__setup_asm_outputs
  
  extern Node_Id Asm_Input_Constraint	(void);
  extern Node_Id Asm_Input_Value		(void);
*************** extern void Setup_Asm_Outputs		(Node_Id)
*** 150,171 ****
  
  /* exp_dbug:  */
  
! #define Get_Encoded_Name exp_dbug__get_encoded_name
! #define Get_External_Name exp_dbug__get_external_name
  
! extern void Get_Encoded_Name	(Entity_Id);
! extern void Get_External_Name	(Entity_Id, Boolean, String_Pointer);
  
  /* exp_tss: */
  
! #define Is_Init_Proc exp_tss__is_init_proc
  
  extern Boolean Is_Init_Proc		(Entity_Id);
  
  /* exp_util: */
  
! #define Is_Fully_Repped_Tagged_Type exp_util__is_fully_repped_tagged_type
! #define Find_Interface_Tag exp_util__find_interface_tag
  
  extern Boolean Is_Fully_Repped_Tagged_Type      (Entity_Id);
  extern Entity_Id Find_Interface_Tag		(Entity_Id, Entity_Id);
--- 153,176 ----
  
  /* exp_dbug:  */
  
! #define Get_Encoded_Name	exp_dbug__get_encoded_name
! #define Get_External_Name	exp_dbug__get_external_name
! #define Get_Variant_Encoding 	exp_dbug__get_variant_encoding
  
! extern void Get_Encoded_Name		(Entity_Id);
! extern void Get_External_Name		(Entity_Id, Boolean, String_Pointer);
! extern void Get_Variant_Encoding	(Entity_Id);
  
  /* exp_tss: */
  
! #define Is_Init_Proc	exp_tss__is_init_proc
  
  extern Boolean Is_Init_Proc		(Entity_Id);
  
  /* exp_util: */
  
! #define Is_Fully_Repped_Tagged_Type	exp_util__is_fully_repped_tagged_type
! #define Find_Interface_Tag		exp_util__find_interface_tag
  
  extern Boolean Is_Fully_Repped_Tagged_Type      (Entity_Id);
  extern Entity_Id Find_Interface_Tag		(Entity_Id, Entity_Id);
*************** extern Entity_Id Find_Interface_Tag		(En
*** 175,326 ****
  #define Cunit 				lib__cunit
  #define Ident_String			lib__ident_string
  #define In_Extended_Main_Code_Unit	lib__in_extended_main_code_unit
- #define In_Same_Source_Unit             lib__in_same_source_unit
  
  extern Node_Id Cunit				(Unit_Number_Type);
  extern Node_Id Ident_String			(Unit_Number_Type);
  extern Boolean In_Extended_Main_Code_Unit	(Entity_Id);
- extern Boolean In_Same_Source_Unit              (Node_Id, Node_Id);
  
  /* opt: */
  
! #define Back_End_Inlining              opt__back_end_inlining
! #define Debug_Generated_Code           opt__debug_generated_code
! #define Exception_Extra_Info           opt__exception_extra_info
! #define Exception_Locations_Suppressed opt__exception_locations_suppressed
! #define Exception_Mechanism            opt__exception_mechanism
! #define Float_Format                   opt__float_format
! #define Generate_SCO_Instance_Table    opt__generate_sco_instance_table
! #define GNAT_Mode                      opt__gnat_mode
! #define List_Representation_Info       opt__list_representation_info
! #define No_Strict_Aliasing_CP          opt__no_strict_aliasing
! #define Suppress_Checks                opt__suppress_checks
  
  typedef enum {
    Front_End_SJLJ, Back_End_ZCX, Back_End_SJLJ
  } Exception_Mechanism_Type;
  
  extern Boolean Back_End_Inlining;
  extern Boolean Debug_Generated_Code;
  extern Boolean Exception_Extra_Info;
  extern Boolean Exception_Locations_Suppressed;
  extern Exception_Mechanism_Type Exception_Mechanism;
- extern Char Float_Format;
  extern Boolean Generate_SCO_Instance_Table;
  extern Boolean GNAT_Mode;
  extern Int List_Representation_Info;
  extern Boolean No_Strict_Aliasing_CP;
  extern Boolean Suppress_Checks;
  
! #define ZCX_Exceptions            opt__zcx_exceptions
! #define SJLJ_Exceptions           opt__sjlj_exceptions
! #define Front_End_Exceptions      opt__front_end_exceptions
! #define Back_End_Exceptions       opt__back_end_exceptions
  
! extern Boolean ZCX_Exceptions       (void);
! extern Boolean SJLJ_Exceptions      (void);
! extern Boolean Front_End_Exceptions (void);
! extern Boolean Back_End_Exceptions  (void);
  
  /* restrict: */
  
! #define No_Exception_Handlers_Set      restrict__no_exception_handlers_set
! #define Check_No_Implicit_Heap_Alloc   restrict__check_no_implicit_heap_alloc
! #define Check_No_Implicit_Task_Alloc   restrict__check_no_implicit_task_alloc
! #define Check_No_Implicit_Protected_Alloc restrict__check_no_implicit_protected_alloc
! #define Check_Elaboration_Code_Allowed restrict__check_elaboration_code_allowed
! #define Check_Implicit_Dynamic_Code_Allowed restrict__check_implicit_dynamic_code_allowed
  
! extern Boolean No_Exception_Handlers_Set   (void);
! extern void Check_No_Implicit_Heap_Alloc   (Node_Id);
! extern void Check_No_Implicit_Task_Alloc   (Node_Id);
! extern void Check_No_Implicit_Protected_Alloc (Node_Id);
! extern void Check_Elaboration_Code_Allowed (Node_Id);
! extern void Check_Implicit_Dynamic_Code_Allowed (Node_Id);
  
  /* sem_aggr:  */
  
! #define Is_Others_Aggregate    sem_aggr__is_others_aggregate
  
! extern Boolean Is_Others_Aggregate (Node_Id);
  
  /* sem_aux:  */
  
! #define Ancestor_Subtype               sem_aux__ancestor_subtype
! #define Constant_Value                 sem_aux__constant_value
! #define First_Discriminant             sem_aux__first_discriminant
! #define First_Stored_Discriminant      sem_aux__first_stored_discriminant
! #define First_Subtype                  sem_aux__first_subtype
! #define Is_By_Reference_Type           sem_aux__is_by_reference_type
! #define Is_Derived_Type                sem_aux__is_derived_type
  
! extern Entity_Id  Ancestor_Subtype             (Entity_Id);
! extern Node_Id    Constant_Value               (Entity_Id);
! extern Entity_Id  First_Discriminant           (Entity_Id);
! extern Entity_Id  First_Stored_Discriminant    (Entity_Id);
! extern Entity_Id  First_Subtype                (Entity_Id);
! extern Boolean    Is_By_Reference_Type         (Entity_Id);
! extern Boolean    Is_Derived_Type              (Entity_Id);
  
  /* sem_eval: */
  
  #define Compile_Time_Known_Value	sem_eval__compile_time_known_value
- #define Expr_Value			sem_eval__expr_value
- #define Expr_Value_S			sem_eval__expr_value_s
  #define Is_OK_Static_Expression		sem_eval__is_ok_static_expression
- #define Is_OK_Static_Subtype		sem_eval__is_ok_static_subtype
  
! extern Uint Expr_Value			(Node_Id);
! extern Node_Id Expr_Value_S		(Node_Id);
! extern Boolean Compile_Time_Known_Value (Node_Id);
! extern Boolean Is_OK_Static_Expression  (Node_Id);
! extern Boolean Is_OK_Static_Subtype	(Entity_Id);
  
  /* sem_util: */
  
  #define Defining_Entity			sem_util__defining_entity
  #define First_Actual			sem_util__first_actual
- #define Next_Actual			sem_util__next_actual
- #define Is_Atomic_Object		sem_util__is_atomic_object
  #define Is_Variable_Size_Record 	sem_util__is_variable_size_record
! #define Is_Volatile_Object		sem_util__is_volatile_object
  #define Requires_Transient_Scope	sem_util__requires_transient_scope
  
  extern Entity_Id Defining_Entity	(Node_Id);
  extern Node_Id First_Actual		(Node_Id);
- extern Node_Id Next_Actual		(Node_Id);
- extern Boolean Is_Atomic_Object 	(Node_Id);
  extern Boolean Is_Variable_Size_Record 	(Entity_Id Id);
! extern Boolean Is_Volatile_Object 	(Node_Id);
  extern Boolean Requires_Transient_Scope	(Entity_Id);
  
  /* sinfo: */
  
  #define End_Location			sinfo__end_location
! #define Set_Has_No_Elaboration_Code 	sinfo__set_has_no_elaboration_code
  #define Set_Present_Expr		sinfo__set_present_expr
  
  extern Source_Ptr End_Location 		(Node_Id);
  extern void Set_Has_No_Elaboration_Code	(Node_Id, Boolean);
  extern void Set_Present_Expr		(Node_Id, Uint);
  
  /* targparm: */
  
! #define Backend_Overflow_Checks_On_Target targparm__backend_overflow_checks_on_target
! #define Machine_Overflows_On_Target targparm__machine_overflows_on_target
! #define Signed_Zeros_On_Target targparm__signed_zeros_on_target
! #define Stack_Check_Probes_On_Target targparm__stack_check_probes_on_target
! #define Stack_Check_Limits_On_Target targparm__stack_check_limits_on_target
  
- extern Boolean Backend_Overflow_Checks_On_Target;
  extern Boolean Machine_Overflows_On_Target;
  extern Boolean Signed_Zeros_On_Target;
- extern Boolean Stack_Check_Probes_On_Target;
  extern Boolean Stack_Check_Limits_On_Target;
  
  /* warnsw: */
  
! #define Warn_On_Questionable_Layout warnsw__warn_on_questionable_layout
  
  extern Boolean Warn_On_Questionable_Layout;
  
--- 180,343 ----
  #define Cunit 				lib__cunit
  #define Ident_String			lib__ident_string
  #define In_Extended_Main_Code_Unit	lib__in_extended_main_code_unit
  
  extern Node_Id Cunit				(Unit_Number_Type);
  extern Node_Id Ident_String			(Unit_Number_Type);
  extern Boolean In_Extended_Main_Code_Unit	(Entity_Id);
  
  /* opt: */
  
! #define Ada_Version			opt__ada_version
! #define Back_End_Inlining		opt__back_end_inlining
! #define Debug_Generated_Code		opt__debug_generated_code
! #define Exception_Extra_Info		opt__exception_extra_info
! #define Exception_Locations_Suppressed	opt__exception_locations_suppressed
! #define Exception_Mechanism		opt__exception_mechanism
! #define Generate_SCO_Instance_Table	opt__generate_sco_instance_table
! #define GNAT_Mode			opt__gnat_mode
! #define List_Representation_Info	opt__list_representation_info
! #define No_Strict_Aliasing_CP		opt__no_strict_aliasing
! #define Suppress_Checks			opt__suppress_checks
! 
! typedef enum {
!   Ada_83, Ada_95, Ada_2005, Ada_2012, Ada_2020
! } Ada_Version_Type;
  
  typedef enum {
    Front_End_SJLJ, Back_End_ZCX, Back_End_SJLJ
  } Exception_Mechanism_Type;
  
+ extern Ada_Version_Type Ada_Version;
  extern Boolean Back_End_Inlining;
  extern Boolean Debug_Generated_Code;
  extern Boolean Exception_Extra_Info;
  extern Boolean Exception_Locations_Suppressed;
  extern Exception_Mechanism_Type Exception_Mechanism;
  extern Boolean Generate_SCO_Instance_Table;
  extern Boolean GNAT_Mode;
  extern Int List_Representation_Info;
  extern Boolean No_Strict_Aliasing_CP;
  extern Boolean Suppress_Checks;
  
! #define ZCX_Exceptions		opt__zcx_exceptions
! #define SJLJ_Exceptions		opt__sjlj_exceptions
! #define Front_End_Exceptions	opt__front_end_exceptions
! #define Back_End_Exceptions	opt__back_end_exceptions
  
! extern Boolean ZCX_Exceptions		(void);
! extern Boolean SJLJ_Exceptions		(void);
! extern Boolean Front_End_Exceptions	(void);
! extern Boolean Back_End_Exceptions	(void);
  
  /* restrict: */
  
! #define Check_Elaboration_Code_Allowed	\
!   restrict__check_elaboration_code_allowed
! #define Check_Implicit_Dynamic_Code_Allowed	\
!   restrict__check_implicit_dynamic_code_allowed
! #define Check_No_Implicit_Heap_Alloc	\
!   restrict__check_no_implicit_heap_alloc
! #define Check_No_Implicit_Protected_Alloc	\
!   restrict__check_no_implicit_protected_alloc
! #define Check_No_Implicit_Task_Alloc	\
!   restrict__check_no_implicit_task_alloc
! #define No_Exception_Handlers_Set	\
!   restrict__no_exception_handlers_set
  
! extern void Check_Elaboration_Code_Allowed	(Node_Id);
! extern void Check_Implicit_Dynamic_Code_Allowed	(Node_Id);
! extern void Check_No_Implicit_Heap_Alloc	(Node_Id);
! extern void Check_No_Implicit_Protected_Alloc	(Node_Id);
! extern void Check_No_Implicit_Task_Alloc	(Node_Id);
! extern Boolean No_Exception_Handlers_Set	(void);
  
  /* sem_aggr:  */
  
! #define Is_Others_Aggregate	sem_aggr__is_others_aggregate
  
! extern Boolean Is_Others_Aggregate	(Node_Id);
  
  /* sem_aux:  */
  
! #define Ancestor_Subtype		sem_aux__ancestor_subtype
! #define Constant_Value			sem_aux__constant_value
! #define First_Discriminant		sem_aux__first_discriminant
! #define First_Stored_Discriminant	sem_aux__first_stored_discriminant
! #define First_Subtype			sem_aux__first_subtype
! #define Is_By_Reference_Type		sem_aux__is_by_reference_type
! #define Is_Derived_Type			sem_aux__is_derived_type
  
! extern Entity_Id Ancestor_Subtype		(Entity_Id);
! extern Node_Id Constant_Value			(Entity_Id);
! extern Entity_Id First_Discriminant		(Entity_Id);
! extern Entity_Id First_Stored_Discriminant	(Entity_Id);
! extern Entity_Id First_Subtype			(Entity_Id);
! extern Boolean Is_By_Reference_Type		(Entity_Id);
! extern Boolean Is_Derived_Type			(Entity_Id);
  
  /* sem_eval: */
  
  #define Compile_Time_Known_Value	sem_eval__compile_time_known_value
  #define Is_OK_Static_Expression		sem_eval__is_ok_static_expression
  
! extern Boolean Compile_Time_Known_Value	(Node_Id);
! extern Boolean Is_OK_Static_Expression	(Node_Id);
  
  /* sem_util: */
  
  #define Defining_Entity			sem_util__defining_entity
  #define First_Actual			sem_util__first_actual
  #define Is_Variable_Size_Record 	sem_util__is_variable_size_record
! #define Next_Actual			sem_util__next_actual
  #define Requires_Transient_Scope	sem_util__requires_transient_scope
  
  extern Entity_Id Defining_Entity	(Node_Id);
  extern Node_Id First_Actual		(Node_Id);
  extern Boolean Is_Variable_Size_Record 	(Entity_Id Id);
! extern Node_Id Next_Actual		(Node_Id);
  extern Boolean Requires_Transient_Scope	(Entity_Id);
  
  /* sinfo: */
  
  #define End_Location			sinfo__end_location
! #define Set_Has_No_Elaboration_Code	sinfo__set_has_no_elaboration_code
  #define Set_Present_Expr		sinfo__set_present_expr
  
  extern Source_Ptr End_Location 		(Node_Id);
  extern void Set_Has_No_Elaboration_Code	(Node_Id, Boolean);
  extern void Set_Present_Expr		(Node_Id, Uint);
  
+ /* sinput: */
+ 
+ #define Debug_Source_Name	sinput__debug_source_name
+ #define Get_Column_Number	sinput__get_column_number
+ #define Get_Logical_Line_Number	sinput__get_logical_line_number
+ #define Get_Source_File_Index	sinput__get_source_file_index
+ 
+ extern File_Name_Type Debug_Source_Name		(Source_File_Index);
+ extern Column_Number_Type Get_Column_Number	(Source_Ptr);
+ extern Line_Number_Type Get_Logical_Line_Number	(Source_Ptr);
+ extern Source_File_Index Get_Source_File_Index	(Source_Ptr);
+ 
  /* targparm: */
  
! #define Machine_Overflows_On_Target	\
!   targparm__machine_overflows_on_target
! #define Signed_Zeros_On_Target	\
!   targparm__signed_zeros_on_target
! #define Stack_Check_Limits_On_Target	\
!   targparm__stack_check_limits_on_target
! #define Stack_Check_Probes_On_Target	\
!   targparm__stack_check_probes_on_target
  
  extern Boolean Machine_Overflows_On_Target;
  extern Boolean Signed_Zeros_On_Target;
  extern Boolean Stack_Check_Limits_On_Target;
+ extern Boolean Stack_Check_Probes_On_Target;
  
  /* warnsw: */
  
! #define Warn_On_Questionable_Layout	warnsw__warn_on_questionable_layout
  
  extern Boolean Warn_On_Questionable_Layout;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/fname-uf.ads gcc-10.1.0/gcc/ada/fname-uf.ads
*** gcc-9.3.0/gcc/ada/fname-uf.ads	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/fname-uf.ads	Thu May  7 10:49:59 2020
*************** package Fname.UF is
*** 105,111 ****
        Dot : String_Ptr;
        Cas : Casing_Type);
     --  This is called to process a Source_File_Name pragma whose first
!    --  argument is a file name pattern string.  Pat is this pattern string,
     --  which contains an asterisk to correspond to the unit. Typ is one of
     --  'b'/'s'/'u' for body/spec/subunit, Dot is the separator string
     --  for child/subunit names, and Cas is one of Lower/Upper/Mixed
--- 105,111 ----
        Dot : String_Ptr;
        Cas : Casing_Type);
     --  This is called to process a Source_File_Name pragma whose first
!    --  argument is a file name pattern string. Pat is this pattern string,
     --  which contains an asterisk to correspond to the unit. Typ is one of
     --  'b'/'s'/'u' for body/spec/subunit, Dot is the separator string
     --  for child/subunit names, and Cas is one of Lower/Upper/Mixed
diff -Nrcpad gcc-9.3.0/gcc/ada/freeze.adb gcc-10.1.0/gcc/ada/freeze.adb
*** gcc-9.3.0/gcc/ada/freeze.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/freeze.adb	Thu May  7 10:49:59 2020
*************** with Sem_Util;  use Sem_Util;
*** 62,67 ****
--- 62,68 ----
  with Sinfo;     use Sinfo;
  with Snames;    use Snames;
  with Stand;     use Stand;
+ with Stringt;   use Stringt;
  with Targparm;  use Targparm;
  with Tbuild;    use Tbuild;
  with Ttypes;    use Ttypes;
*************** package body Freeze is
*** 407,417 ****
        --  calls to the renamed entity. The body must be generated in any case
        --  for calls that may appear elsewhere. This is not done in the case
        --  where the subprogram is an instantiation because the actual proper
!       --  body has not been built yet.
  
        if Ekind_In (Old_S, E_Function, E_Procedure)
          and then Nkind (Decl) = N_Subprogram_Declaration
          and then not Is_Generic_Instance (Old_S)
        then
           Set_Body_To_Inline (Decl, Old_S);
        end if;
--- 408,421 ----
        --  calls to the renamed entity. The body must be generated in any case
        --  for calls that may appear elsewhere. This is not done in the case
        --  where the subprogram is an instantiation because the actual proper
!       --  body has not been built yet. This is also not done in GNATprove mode
!       --  as we need to check other conditions for creating a body to inline
!       --  in that case, which are controlled in Analyze_Subprogram_Body_Helper.
  
        if Ekind_In (Old_S, E_Function, E_Procedure)
          and then Nkind (Decl) = N_Subprogram_Declaration
          and then not Is_Generic_Instance (Old_S)
+         and then not GNATprove_Mode
        then
           Set_Body_To_Inline (Decl, Old_S);
        end if;
*************** package body Freeze is
*** 782,790 ****
           elsif Has_Size_Clause (T) then
              if RM_Size (T) < S then
                 Error_Msg_Uint_1 := S;
!                Error_Msg_NE
!                  ("size for& too small, minimum allowed is ^",
!                   Size_Clause (T), T);
              end if;
  
           --  Set size if not set already
--- 786,792 ----
           elsif Has_Size_Clause (T) then
              if RM_Size (T) < S then
                 Error_Msg_Uint_1 := S;
!                Error_Msg_NE (Size_Too_Small_Message, Size_Clause (T), T);
              end if;
  
           --  Set size if not set already
*************** package body Freeze is
*** 935,942 ****
                 --  size of packed records if we can tell the size of the packed
                 --  record in the front end. Packed_Size_Known is True if so far
                 --  we can figure out the size. It is initialized to True for a
!                --  packed record, unless the record has discriminants or atomic
!                --  components or independent components.
  
                 --  The reason we eliminate the discriminated case is that
                 --  we don't know the way the back end lays out discriminated
--- 937,945 ----
                 --  size of packed records if we can tell the size of the packed
                 --  record in the front end. Packed_Size_Known is True if so far
                 --  we can figure out the size. It is initialized to True for a
!                --  packed record, unless the record has either discriminants or
!                --  independent components, or is a strict-alignment type, since
!                --  it cannot be fully packed in this case.
  
                 --  The reason we eliminate the discriminated case is that
                 --  we don't know the way the back end lays out discriminated
*************** package body Freeze is
*** 946,953 ****
                 Packed_Size_Known : Boolean :=
                   Is_Packed (T)
                     and then not Has_Discriminants (T)
!                    and then not Has_Atomic_Components (T)
!                    and then not Has_Independent_Components (T);
  
                 Packed_Size : Uint := Uint_0;
                 --  Size in bits so far
--- 949,956 ----
                 Packed_Size_Known : Boolean :=
                   Is_Packed (T)
                     and then not Has_Discriminants (T)
!                    and then not Has_Independent_Components (T)
!                    and then not Strict_Alignment (T);
  
                 Packed_Size : Uint := Uint_0;
                 --  Size in bits so far
*************** package body Freeze is
*** 995,1011 ****
                       Packed_Size_Known := False;
                    end if;
  
!                   --  We do not know the packed size for an atomic/VFA type
!                   --  or component, or an independent type or component, or a
!                   --  by-reference type or aliased component (because packing
!                   --  does not touch these).
  
!                   if        Is_Atomic_Or_VFA (Ctyp)
!                     or else Is_Atomic_Or_VFA (Comp)
                      or else Is_Independent (Ctyp)
!                     or else Is_Independent (Comp)
!                     or else Is_By_Reference_Type (Ctyp)
!                     or else Is_Aliased (Comp)
                    then
                       Packed_Size_Known := False;
                    end if;
--- 998,1010 ----
                       Packed_Size_Known := False;
                    end if;
  
!                   --  We do not know the packed size for an independent
!                   --  component or if it is of a strict-alignment type,
!                   --  since packing does not touch these (RM 13.2(7)).
  
!                   if Is_Independent (Comp)
                      or else Is_Independent (Ctyp)
!                     or else Strict_Alignment (Ctyp)
                    then
                       Packed_Size_Known := False;
                    end if;
*************** package body Freeze is
*** 1500,1506 ****
  
              --  In GNATprove mode this is where we can collect the inherited
              --  conditions, because we do not create the Check pragmas that
!             --  normally convey the the modified class-wide conditions on
              --  overriding operations.
  
              if GNATprove_Mode then
--- 1499,1505 ----
  
              --  In GNATprove mode this is where we can collect the inherited
              --  conditions, because we do not create the Check pragmas that
!             --  normally convey the modified class-wide conditions on
              --  overriding operations.
  
              if GNATprove_Mode then
*************** package body Freeze is
*** 1522,1532 ****
        --  so that LSP can be verified/enforced.
  
        Op_Node := First_Elmt (Prim_Ops);
-       Needs_Wrapper := False;
  
        while Present (Op_Node) loop
!          Decls := Empty_List;
!          Prim  := Node (Op_Node);
  
           if not Comes_From_Source (Prim) and then Present (Alias (Prim)) then
              Par_Prim := Alias (Prim);
--- 1521,1531 ----
        --  so that LSP can be verified/enforced.
  
        Op_Node := First_Elmt (Prim_Ops);
  
        while Present (Op_Node) loop
!          Decls         := Empty_List;
!          Prim          := Node (Op_Node);
!          Needs_Wrapper := False;
  
           if not Comes_From_Source (Prim) and then Present (Alias (Prim)) then
              Par_Prim := Alias (Prim);
*************** package body Freeze is
*** 1597,1604 ****
                      (Par_R, New_List (New_Decl, New_Body));
                 end if;
              end;
- 
-             Needs_Wrapper := False;
           end if;
  
           Next_Elmt (Op_Node);
--- 1596,1601 ----
*************** package body Freeze is
*** 1613,1635 ****
        Comp  : Entity_Id;
  
     begin
!       if Is_Tagged_Type (E) or else Is_Concurrent_Type (E) then
           Set_Strict_Alignment (E);
  
        elsif Is_Array_Type (E) then
           Set_Strict_Alignment (E, Strict_Alignment (Component_Type (E)));
  
!       elsif Is_Record_Type (E) then
!          if Is_Limited_Record (E) then
!             Set_Strict_Alignment (E);
!             return;
!          end if;
  
           Comp := First_Component (E);
           while Present (Comp) loop
              if not Is_Type (Comp)
!               and then (Strict_Alignment (Etype (Comp))
!                          or else Is_Aliased (Comp))
              then
                 Set_Strict_Alignment (E);
                 return;
--- 1610,1640 ----
        Comp  : Entity_Id;
  
     begin
!       if Is_By_Reference_Type (E) then
           Set_Strict_Alignment (E);
  
        elsif Is_Array_Type (E) then
           Set_Strict_Alignment (E, Strict_Alignment (Component_Type (E)));
  
!          --  ??? AI12-001: Any component of a packed type that contains an
!          --  aliased part must be aligned according to the alignment of its
!          --  subtype (RM 13.2(7)). This means that the following test:
  
+          --    if Has_Aliased_Components (E) then
+          --      Set_Strict_Alignment (E);
+          --    end if;
+ 
+          --  should be implemented here. Unfortunately it would break Florist,
+          --  which has the bad habit of overaligning all the types it declares
+          --  on 32-bit platforms. Other legacy codebases could also be affected
+          --  because this check has historically been missing in GNAT.
+ 
+       elsif Is_Record_Type (E) then
           Comp := First_Component (E);
           while Present (Comp) loop
              if not Is_Type (Comp)
!               and then (Is_Aliased (Comp)
!                          or else Strict_Alignment (Etype (Comp)))
              then
                 Set_Strict_Alignment (E);
                 return;
*************** package body Freeze is
*** 1771,1776 ****
--- 1776,1782 ----
        New_N :=
          Make_Object_Declaration (Loc,
            Defining_Identifier => Temp,
+           Constant_Present    => True,
            Object_Definition   => New_Occurrence_Of (Typ, Loc),
            Expression          => Relocate_Node (N));
        Insert_Before (Par, New_N);
*************** package body Freeze is
*** 2621,2626 ****
--- 2627,2778 ----
                 end;
              end if;
  
+             --  Check for Aliased or Atomic_Components/Atomic/VFA with
+             --  unsuitable packing or explicit component size clause given.
+ 
+             if (Has_Aliased_Components (Arr)
+                  or else Has_Atomic_Components (Arr)
+                  or else Is_Atomic_Or_VFA (Ctyp))
+               and then
+                 (Has_Component_Size_Clause (Arr) or else Is_Packed (Arr))
+             then
+                Alias_Atomic_Check : declare
+ 
+                   procedure Complain_CS (T : String);
+                   --  Outputs error messages for incorrect CS clause or pragma
+                   --  Pack for aliased or atomic/VFA components (T is "aliased"
+                   --  or "atomic/vfa");
+ 
+                   -----------------
+                   -- Complain_CS --
+                   -----------------
+ 
+                   procedure Complain_CS (T : String) is
+                   begin
+                      if Has_Component_Size_Clause (Arr) then
+                         Clause :=
+                           Get_Attribute_Definition_Clause
+                             (FS, Attribute_Component_Size);
+ 
+                         Error_Msg_N
+                           ("incorrect component size for "
+                            & T & " components", Clause);
+                         Error_Msg_Uint_1 := Esize (Ctyp);
+                         Error_Msg_N
+                           ("\only allowed value is^", Clause);
+ 
+                      else
+                         Error_Msg_N
+                           ("?cannot pack " & T & " components (RM 13.2(7))",
+                            Get_Rep_Pragma (FS, Name_Pack));
+                         Set_Is_Packed (Arr, False);
+                      end if;
+                   end Complain_CS;
+ 
+                   --  Start of processing for Alias_Atomic_Check
+ 
+                begin
+                   --  If object size of component type isn't known, we cannot
+                   --  be sure so we defer to the back end.
+ 
+                   if not Known_Static_Esize (Ctyp) then
+                      null;
+ 
+                   --  Case where component size has no effect. First check for
+                   --  object size of component type multiple of the storage
+                   --  unit size.
+ 
+                   elsif Esize (Ctyp) mod System_Storage_Unit = 0
+ 
+                     --  OK in both packing case and component size case if RM
+                     --  size is known and static and same as the object size.
+ 
+                     and then
+                       ((Known_Static_RM_Size (Ctyp)
+                          and then Esize (Ctyp) = RM_Size (Ctyp))
+ 
+                         --  Or if we have an explicit component size clause and
+                         --  the component size and object size are equal.
+ 
+                         or else
+                           (Has_Component_Size_Clause (Arr)
+                             and then Component_Size (Arr) = Esize (Ctyp)))
+                   then
+                      null;
+ 
+                   elsif Has_Aliased_Components (Arr) then
+                      Complain_CS ("aliased");
+ 
+                   elsif Has_Atomic_Components (Arr)
+                     or else Is_Atomic (Ctyp)
+                   then
+                      Complain_CS ("atomic");
+ 
+                   elsif Is_Volatile_Full_Access (Ctyp) then
+                      Complain_CS ("volatile full access");
+                   end if;
+                end Alias_Atomic_Check;
+             end if;
+ 
+             --  Check for Independent_Components/Independent with unsuitable
+             --  packing or explicit component size clause given.
+ 
+             if (Has_Independent_Components (Arr) or else Is_Independent (Ctyp))
+                   and then
+                (Has_Component_Size_Clause  (Arr) or else Is_Packed (Arr))
+             then
+                begin
+                   --  If object size of component type isn't known, we cannot
+                   --  be sure so we defer to the back end.
+ 
+                   if not Known_Static_Esize (Ctyp) then
+                      null;
+ 
+                   --  Case where component size has no effect. First check for
+                   --  object size of component type multiple of the storage
+                   --  unit size.
+ 
+                   elsif Esize (Ctyp) mod System_Storage_Unit = 0
+ 
+                     --  OK in both packing case and component size case if RM
+                     --  size is known and multiple of the storage unit size.
+ 
+                     and then
+                       ((Known_Static_RM_Size (Ctyp)
+                          and then RM_Size (Ctyp) mod System_Storage_Unit = 0)
+ 
+                         --  Or if we have an explicit component size clause and
+                         --  the component size is larger than the object size.
+ 
+                         or else
+                           (Has_Component_Size_Clause (Arr)
+                             and then Component_Size (Arr) >= Esize (Ctyp)))
+                   then
+                      null;
+ 
+                   else
+                      if Has_Component_Size_Clause (Arr) then
+                         Clause :=
+                           Get_Attribute_Definition_Clause
+                             (FS, Attribute_Component_Size);
+ 
+                         Error_Msg_N
+                           ("incorrect component size for "
+                            & "independent components", Clause);
+                         Error_Msg_Uint_1 := Esize (Ctyp);
+                         Error_Msg_N
+                           ("\minimum allowed is^", Clause);
+ 
+                      else
+                         Error_Msg_N
+                           ("?cannot pack independent components (RM 13.2(7))",
+                            Get_Rep_Pragma (FS, Name_Pack));
+                         Set_Is_Packed (Arr, False);
+                      end if;
+                   end if;
+                end;
+             end if;
+ 
              --  If packing was requested or if the component size was
              --  set explicitly, then see if bit packing is required. This
              --  processing is only done for base types, since all of the
*************** package body Freeze is
*** 2636,2642 ****
                 Esiz : Uint;
  
              begin
!                if (Is_Packed (Arr) or else Has_Pragma_Pack (Arr))
                   and then Known_Static_RM_Size (Ctyp)
                   and then not Has_Component_Size_Clause (Arr)
                 then
--- 2788,2794 ----
                 Esiz : Uint;
  
              begin
!                if Is_Packed (Arr)
                   and then Known_Static_RM_Size (Ctyp)
                   and then not Has_Component_Size_Clause (Arr)
                 then
*************** package body Freeze is
*** 2796,2945 ****
                 end if;
              end;
  
-             --  Check for Aliased or Atomic_Components/Atomic/VFA with
-             --  unsuitable packing or explicit component size clause given.
- 
-             if (Has_Aliased_Components (Arr)
-                  or else Has_Atomic_Components (Arr)
-                  or else Is_Atomic_Or_VFA (Ctyp))
-               and then
-                 (Has_Component_Size_Clause (Arr) or else Is_Packed (Arr))
-             then
-                Alias_Atomic_Check : declare
- 
-                   procedure Complain_CS (T : String);
-                   --  Outputs error messages for incorrect CS clause or pragma
-                   --  Pack for aliased or atomic/VFA components (T is "aliased"
-                   --  or "atomic/vfa");
- 
-                   -----------------
-                   -- Complain_CS --
-                   -----------------
- 
-                   procedure Complain_CS (T : String) is
-                   begin
-                      if Has_Component_Size_Clause (Arr) then
-                         Clause :=
-                           Get_Attribute_Definition_Clause
-                             (FS, Attribute_Component_Size);
- 
-                         Error_Msg_N
-                           ("incorrect component size for "
-                            & T & " components", Clause);
-                         Error_Msg_Uint_1 := Esize (Ctyp);
-                         Error_Msg_N
-                           ("\only allowed value is^", Clause);
- 
-                      else
-                         Error_Msg_N
-                           ("cannot pack " & T & " components",
-                            Get_Rep_Pragma (FS, Name_Pack));
-                      end if;
-                   end Complain_CS;
- 
-                   --  Start of processing for Alias_Atomic_Check
- 
-                begin
-                   --  If object size of component type isn't known, we cannot
-                   --  be sure so we defer to the back end.
- 
-                   if not Known_Static_Esize (Ctyp) then
-                      null;
- 
-                   --  Case where component size has no effect. First check for
-                   --  object size of component type multiple of the storage
-                   --  unit size.
- 
-                   elsif Esize (Ctyp) mod System_Storage_Unit = 0
- 
-                     --  OK in both packing case and component size case if RM
-                     --  size is known and static and same as the object size.
- 
-                     and then
-                       ((Known_Static_RM_Size (Ctyp)
-                          and then Esize (Ctyp) = RM_Size (Ctyp))
- 
-                         --  Or if we have an explicit component size clause and
-                         --  the component size and object size are equal.
- 
-                         or else
-                           (Has_Component_Size_Clause (Arr)
-                             and then Component_Size (Arr) = Esize (Ctyp)))
-                   then
-                      null;
- 
-                   elsif Has_Aliased_Components (Arr) then
-                      Complain_CS ("aliased");
- 
-                   elsif Has_Atomic_Components (Arr)
-                     or else Is_Atomic (Ctyp)
-                   then
-                      Complain_CS ("atomic");
- 
-                   elsif Is_Volatile_Full_Access (Ctyp) then
-                      Complain_CS ("volatile full access");
-                   end if;
-                end Alias_Atomic_Check;
-             end if;
- 
-             --  Check for Independent_Components/Independent with unsuitable
-             --  packing or explicit component size clause given.
- 
-             if (Has_Independent_Components (Arr) or else Is_Independent (Ctyp))
-                   and then
-                (Has_Component_Size_Clause  (Arr) or else Is_Packed (Arr))
-             then
-                begin
-                   --  If object size of component type isn't known, we cannot
-                   --  be sure so we defer to the back end.
- 
-                   if not Known_Static_Esize (Ctyp) then
-                      null;
- 
-                   --  Case where component size has no effect. First check for
-                   --  object size of component type multiple of the storage
-                   --  unit size.
- 
-                   elsif Esize (Ctyp) mod System_Storage_Unit = 0
- 
-                     --  OK in both packing case and component size case if RM
-                     --  size is known and multiple of the storage unit size.
- 
-                     and then
-                       ((Known_Static_RM_Size (Ctyp)
-                          and then RM_Size (Ctyp) mod System_Storage_Unit = 0)
- 
-                         --  Or if we have an explicit component size clause and
-                         --  the component size is larger than the object size.
- 
-                         or else
-                           (Has_Component_Size_Clause (Arr)
-                             and then Component_Size (Arr) >= Esize (Ctyp)))
-                   then
-                      null;
- 
-                   else
-                      if Has_Component_Size_Clause (Arr) then
-                         Clause :=
-                           Get_Attribute_Definition_Clause
-                             (FS, Attribute_Component_Size);
- 
-                         Error_Msg_N
-                           ("incorrect component size for "
-                            & "independent components", Clause);
-                         Error_Msg_Uint_1 := Esize (Ctyp);
-                         Error_Msg_N
-                           ("\minimum allowed is^", Clause);
- 
-                      else
-                         Error_Msg_N
-                           ("cannot pack independent components",
-                            Get_Rep_Pragma (FS, Name_Pack));
-                      end if;
-                   end if;
-                end;
-             end if;
- 
              --  Warn for case of atomic type
  
              Clause := Get_Rep_Pragma (FS, Name_Atomic);
--- 2948,2953 ----
*************** package body Freeze is
*** 3568,3574 ****
              Error_Msg_N ("\??use explicit size clause to set size", E);
           end if;
  
!          if Is_Array_Type (Typ) then
              Check_Large_Modular_Array (Typ);
           end if;
        end Freeze_Object_Declaration;
--- 3576,3584 ----
              Error_Msg_N ("\??use explicit size clause to set size", E);
           end if;
  
!          --  Declaring too big an array in disabled ghost code is OK
! 
!          if Is_Array_Type (Typ) and then not Is_Ignored_Ghost_Entity (E) then
              Check_Large_Modular_Array (Typ);
           end if;
        end Freeze_Object_Declaration;
*************** package body Freeze is
*** 3996,4006 ****
           --  clause (used to warn about useless Bit_Order pragmas, and also
           --  to detect cases where Implicit_Packing may have an effect).
  
-          Rec_Pushed : Boolean := False;
-          --  Set True if the record type scope Rec has been pushed on the scope
-          --  stack. Needed for the analysis of delayed aspects specified to the
-          --  components of Rec.
- 
           Sized_Component_Total_RM_Size : Uint := Uint_0;
           --  Accumulates total RM_Size values of all sized components. Used
           --  for processing of Implicit_Packing.
--- 4006,4011 ----
*************** package body Freeze is
*** 4139,4185 ****
        --  Start of processing for Freeze_Record_Type
  
        begin
-          --  Deal with delayed aspect specifications for components. The
-          --  analysis of the aspect is required to be delayed to the freeze
-          --  point, thus we analyze the pragma or attribute definition
-          --  clause in the tree at this point. We also analyze the aspect
-          --  specification node at the freeze point when the aspect doesn't
-          --  correspond to pragma/attribute definition clause.
- 
-          Comp := First_Entity (Rec);
-          while Present (Comp) loop
-             if Ekind (Comp) = E_Component
-               and then Has_Delayed_Aspects (Comp)
-             then
-                if not Rec_Pushed then
-                   Push_Scope (Rec);
-                   Rec_Pushed := True;
- 
-                   --  The visibility to the discriminants must be restored in
-                   --  order to properly analyze the aspects.
- 
-                   if Has_Discriminants (Rec) then
-                      Install_Discriminants (Rec);
-                   end if;
-                end if;
- 
-                Analyze_Aspects_At_Freeze_Point (Comp);
-             end if;
- 
-             Next_Entity (Comp);
-          end loop;
- 
-          --  Pop the scope if Rec scope has been pushed on the scope stack
-          --  during the delayed aspect analysis process.
- 
-          if Rec_Pushed then
-             if Has_Discriminants (Rec) then
-                Uninstall_Discriminants (Rec);
-             end if;
- 
-             Pop_Scope;
-          end if;
- 
           --  Freeze components and embedded subtypes
  
           Comp := First_Entity (Rec);
--- 4144,4149 ----
*************** package body Freeze is
*** 4632,4649 ****
              end if;
           end if;
  
-          --  Complete error checking on record representation clause (e.g.
-          --  overlap of components). This is called after adjusting the
-          --  record for reverse bit order.
- 
-          declare
-             RRC : constant Node_Id := Get_Record_Representation_Clause (Rec);
-          begin
-             if Present (RRC) then
-                Check_Record_Representation_Clause (RRC);
-             end if;
-          end;
- 
           --  Check for useless pragma Pack when all components placed. We only
           --  do this check for record types, not subtypes, since a subtype may
           --  have all its components placed, and it still makes perfectly good
--- 4596,4601 ----
*************** package body Freeze is
*** 5490,5495 ****
--- 5442,5497 ----
        --  In addition, a derived type may have inherited aspects that were
        --  delayed in the parent, so these must also be captured now.
  
+       --  For a record type, we deal with the delayed aspect specifications on
+       --  components first, which is consistent with the non-delayed case and
+       --  makes it possible to have a single processing to detect conflicts.
+ 
+       if Is_Record_Type (E) then
+          declare
+             Comp : Entity_Id;
+ 
+             Rec_Pushed : Boolean := False;
+             --  Set True if the record type E has been pushed on the scope
+             --  stack. Needed for the analysis of delayed aspects specified
+             --  to the components of Rec.
+ 
+          begin
+             Comp := First_Entity (E);
+             while Present (Comp) loop
+                if Ekind (Comp) = E_Component
+                  and then Has_Delayed_Aspects (Comp)
+                then
+                   if not Rec_Pushed then
+                      Push_Scope (E);
+                      Rec_Pushed := True;
+ 
+                      --  The visibility to the discriminants must be restored
+                      --  in order to properly analyze the aspects.
+ 
+                      if Has_Discriminants (E) then
+                         Install_Discriminants (E);
+                      end if;
+                   end if;
+ 
+                   Analyze_Aspects_At_Freeze_Point (Comp);
+                end if;
+ 
+                Next_Entity (Comp);
+             end loop;
+ 
+             --  Pop the scope if Rec scope has been pushed on the scope stack
+             --  during the delayed aspect analysis process.
+ 
+             if Rec_Pushed then
+                if Has_Discriminants (E) then
+                   Uninstall_Discriminants (E);
+                end if;
+ 
+                Pop_Scope;
+             end if;
+          end;
+       end if;
+ 
        if Has_Delayed_Aspects (E)
          or else May_Inherit_Delayed_Rep_Aspects (E)
        then
*************** package body Freeze is
*** 5943,5959 ****
              Inherit_Aspects_At_Freeze_Point (E);
           end if;
  
!          --  Check for incompatible size and alignment for record type
  
           if Warn_On_Size_Alignment
!            and then Is_Record_Type (E)
!            and then Has_Size_Clause (E) and then Has_Alignment_Clause (E)
  
             --  If explicit Object_Size clause given assume that the programmer
             --  knows what he is doing, and expects the compiler behavior.
  
             and then not Has_Object_Size_Clause (E)
  
             --  Check for size not a multiple of alignment
  
             and then RM_Size (E) mod (Alignment (E) * System_Storage_Unit) /= 0
--- 5945,5973 ----
              Inherit_Aspects_At_Freeze_Point (E);
           end if;
  
!          --  Case of array type
! 
!          if Is_Array_Type (E) then
!             Freeze_Array_Type (E);
!          end if;
! 
!          --  Check for incompatible size and alignment for array/record type
  
           if Warn_On_Size_Alignment
!            and then (Is_Array_Type (E) or else Is_Record_Type (E))
!            and then Has_Size_Clause (E)
!            and then Has_Alignment_Clause (E)
  
             --  If explicit Object_Size clause given assume that the programmer
             --  knows what he is doing, and expects the compiler behavior.
  
             and then not Has_Object_Size_Clause (E)
  
+            --  It does not really make sense to warn for the minimum alignment
+            --  since the programmer could not get rid of the warning.
+ 
+            and then Alignment (E) > 1
+ 
             --  Check for size not a multiple of alignment
  
             and then RM_Size (E) mod (Alignment (E) * System_Storage_Unit) /= 0
*************** package body Freeze is
*** 5994,6008 ****
              end;
           end if;
  
-          --  Array type
- 
-          if Is_Array_Type (E) then
-             Freeze_Array_Type (E);
- 
           --  For a class-wide type, the corresponding specific type is
           --  frozen as well (RM 13.14(15))
  
!          elsif Is_Class_Wide_Type (E) then
              Freeze_And_Append (Root_Type (E), N, Result);
  
              --  If the base type of the class-wide type is still incomplete,
--- 6008,6017 ----
              end;
           end if;
  
           --  For a class-wide type, the corresponding specific type is
           --  frozen as well (RM 13.14(15))
  
!          if Is_Class_Wide_Type (E) then
              Freeze_And_Append (Root_Type (E), N, Result);
  
              --  If the base type of the class-wide type is still incomplete,
*************** package body Freeze is
*** 6778,6798 ****
              end if;
           end if;
  
!          --  Now that all types from which E may depend are frozen, see if the
!          --  size is known at compile time, if it must be unsigned, or if
!          --  strict alignment is required
! 
!          Check_Compile_Time_Size (E);
!          Check_Unsigned_Type (E);
  
           if Base_Type (E) = E then
              Check_Strict_Alignment (E);
           end if;
  
           --  Do not allow a size clause for a type which does not have a size
           --  that is known at compile time
  
!          if Has_Size_Clause (E)
             and then not Size_Known_At_Compile_Time (E)
           then
              --  Suppress this message if errors posted on E, even if we are
--- 6787,6819 ----
              end if;
           end if;
  
!          --  Now that all types from which E may depend are frozen, see if
!          --  strict alignment is required, a component clause on a record
!          --  is correct, the size is known at compile time and if it must
!          --  be unsigned, in that order.
  
           if Base_Type (E) = E then
              Check_Strict_Alignment (E);
           end if;
  
+          if Ekind_In (E, E_Record_Type, E_Record_Subtype) then
+             declare
+                RC : constant Node_Id := Get_Record_Representation_Clause (E);
+             begin
+                if Present (RC) then
+                   Check_Record_Representation_Clause (RC);
+                end if;
+             end;
+          end if;
+ 
+          Check_Compile_Time_Size (E);
+ 
+          Check_Unsigned_Type (E);
+ 
           --  Do not allow a size clause for a type which does not have a size
           --  that is known at compile time
  
!          if (Has_Size_Clause (E) or else Has_Object_Size_Clause (E))
             and then not Size_Known_At_Compile_Time (E)
           then
              --  Suppress this message if errors posted on E, even if we are
*************** package body Freeze is
*** 7665,7673 ****
          or else Ekind (Current_Scope) = E_Void
        then
           declare
!             N            : constant Node_Id := Current_Scope;
!             Freeze_Nodes : List_Id          := No_List;
!             Pos          : Int              := Scope_Stack.Last;
  
           begin
              if Present (Desig_Typ) then
--- 7686,7693 ----
          or else Ekind (Current_Scope) = E_Void
        then
           declare
!             Freeze_Nodes : List_Id := No_List;
!             Pos          : Int     := Scope_Stack.Last;
  
           begin
              if Present (Desig_Typ) then
*************** package body Freeze is
*** 7700,7706 ****
              end if;
  
              if Is_Non_Empty_List (Freeze_Nodes) then
!                if No (Scope_Stack.Table (Pos).Pending_Freeze_Actions) then
                    Scope_Stack.Table (Pos).Pending_Freeze_Actions :=
                      Freeze_Nodes;
                 else
--- 7720,7738 ----
              end if;
  
              if Is_Non_Empty_List (Freeze_Nodes) then
! 
!                --  When the current scope is transient, insert the freeze nodes
!                --  prior to the expression that produced them. Transient scopes
!                --  may create additional declarations when finalizing objects
!                --  or managing the secondary stack. Inserting the freeze nodes
!                --  of those constructs prior to the scope would result in a
!                --  freeze-before-declaration, therefore the freeze node must
!                --  remain interleaved with their constructs.
! 
!                if Scope_Is_Transient then
!                   Insert_Actions (N, Freeze_Nodes);
! 
!                elsif No (Scope_Stack.Table (Pos).Pending_Freeze_Actions) then
                    Scope_Stack.Table (Pos).Pending_Freeze_Actions :=
                      Freeze_Nodes;
                 else
*************** package body Freeze is
*** 7981,7986 ****
--- 8013,8019 ----
        Brng  : constant Node_Id    := Scalar_Range (Btyp);
        BLo   : constant Node_Id    := Low_Bound (Brng);
        BHi   : constant Node_Id    := High_Bound (Brng);
+       Par   : constant Entity_Id  := First_Subtype (Typ);
        Small : constant Ureal      := Small_Value (Typ);
        Loval : Ureal;
        Hival : Ureal;
*************** package body Freeze is
*** 8033,8038 ****
--- 8066,8081 ----
           end if;
        end if;
  
+       --  The 'small attribute may have been specified with an aspect,
+       --  in which case it is processed after a subtype declaration, so
+       --  inherit now the specified value.
+ 
+       if Typ /= Par
+         and then Present (Find_Aspect (Par, Aspect_Small))
+       then
+          Set_Small_Value (Typ, Small_Value (Par));
+       end if;
+ 
        --  Immediate return if the range is already analyzed. This means that
        --  the range is already set, and does not need to be computed by this
        --  routine.
*************** package body Freeze is
*** 8745,8750 ****
--- 8788,8808 ----
           Set_Is_Pure (E, False);
        end if;
  
+       --  For C++ constructors check that their external name has been given
+       --  (either in pragma CPP_Constructor or in a pragma import).
+ 
+       if Is_Constructor (E)
+         and then Convention (E) = Convention_CPP
+         and then
+            (No (Interface_Name (E))
+               or else String_Equal
+                         (L => Strval (Interface_Name (E)),
+                          R => Strval (Get_Default_External_Name (E))))
+       then
+          Error_Msg_N
+            ("'C++ constructor must have external name or link name", E);
+       end if;
+ 
        --  We also reset the Pure indication on a subprogram with an Address
        --  parameter, because the parameter may be used as a pointer and the
        --  referenced data may change even if the address value does not.
diff -Nrcpad gcc-9.3.0/gcc/ada/frontend.adb gcc-10.1.0/gcc/ada/frontend.adb
*** gcc-9.3.0/gcc/ada/frontend.adb	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/frontend.adb	Thu May  7 10:49:59 2020
*************** begin
*** 492,498 ****
  
     --  Qualify all entity names in inner packages, package bodies, etc
  
!    Exp_Dbug.Qualify_All_Entity_Names;
  
     --  SCIL backend requirement. Check that SCIL nodes associated with
     --  dispatching calls reference subprogram calls.
--- 492,500 ----
  
     --  Qualify all entity names in inner packages, package bodies, etc
  
!    if not GNATprove_Mode then
!       Exp_Dbug.Qualify_All_Entity_Names;
!    end if;
  
     --  SCIL backend requirement. Check that SCIL nodes associated with
     --  dispatching calls reference subprogram calls.
diff -Nrcpad gcc-9.3.0/gcc/ada/gcc-interface/Make-lang.in gcc-10.1.0/gcc/ada/gcc-interface/Make-lang.in
*** gcc-9.3.0/gcc/ada/gcc-interface/Make-lang.in	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/gcc-interface/Make-lang.in	Thu May  7 10:49:59 2020
*************** GNATLIBCFLAGS= -g -O2 $(TCFLAGS)
*** 74,80 ****
  ADA_INCLUDE_DIR = $(libsubdir)/adainclude
  ADA_RTL_OBJ_DIR = $(libsubdir)/adalib
  THREAD_KIND=native
- TRACE=no
  # We do not want the WARN_CFLAGS of the compiler in Ada as it is for C/C++.
  COMMON_FLAGS_TO_PASS = $(filter-out $(WARN_CFLAGS), $(FLAGS_TO_PASS))
  ADA_FLAGS_TO_PASS = \
--- 74,79 ----
*************** GNAT_ADA_OBJS =	\
*** 317,326 ****
   ada/frontend.o	\
   ada/libgnat/g-byorma.o	\
   ada/libgnat/g-dynhta.o	\
   ada/libgnat/g-hesora.o	\
   ada/libgnat/g-htable.o	\
!  ada/libgnat/g-lists.o \
!  ada/libgnat/g-sets.o \
   ada/libgnat/g-spchge.o	\
   ada/libgnat/g-speche.o	\
   ada/libgnat/g-u3spch.o	\
--- 316,326 ----
   ada/frontend.o	\
   ada/libgnat/g-byorma.o	\
   ada/libgnat/g-dynhta.o	\
+  ada/libgnat/g-graphs.o \
   ada/libgnat/g-hesora.o	\
   ada/libgnat/g-htable.o	\
!  ada/libgnat/g-lists.o	\
!  ada/libgnat/g-sets.o	\
   ada/libgnat/g-spchge.o	\
   ada/libgnat/g-speche.o	\
   ada/libgnat/g-u3spch.o	\
*************** GNAT_ADA_OBJS =	\
*** 354,359 ****
--- 354,360 ----
   ada/prep.o	\
   ada/prepcomp.o	\
   ada/put_scos.o	\
+  ada/repinfo-input.o	\
   ada/repinfo.o	\
   ada/restrict.o	\
   ada/rident.o	\
*************** GNAT_ADA_OBJS =	\
*** 449,455 ****
   ada/sem_res.o	\
   ada/sem_scil.o	\
   ada/sem_smem.o	\
-  ada/sem_spark.o	\
   ada/sem_type.o	\
   ada/sem_util.o	\
   ada/sem_warn.o	\
--- 450,455 ----
*************** GNATBIND_OBJS = \
*** 507,512 ****
--- 507,521 ----
   ada/binde.o      \
   ada/binderr.o    \
   ada/bindgen.o    \
+  ada/bindo.o      \
+  ada/bindo-augmentors.o   \
+  ada/bindo-builders.o     \
+  ada/bindo-diagnostics.o  \
+  ada/bindo-elaborators.o  \
+  ada/bindo-graphs.o       \
+  ada/bindo-units.o        \
+  ada/bindo-validators.o   \
+  ada/bindo-writers.o      \
   ada/bindusg.o    \
   ada/butil.o      \
   ada/casing.o     \
*************** GNATBIND_OBJS = \
*** 526,533 ****
--- 535,546 ----
   ada/fname-uf.o   \
   ada/fname.o      \
   ada/libgnat/g-byorma.o   \
+  ada/libgnat/g-dynhta.o   \
+  ada/libgnat/g-graphs.o   \
   ada/libgnat/g-hesora.o   \
   ada/libgnat/g-htable.o   \
+  ada/libgnat/g-lists.o    \
+  ada/libgnat/g-sets.o     \
   ada/libgnat/gnat.o       \
   ada/gnatbind.o   \
   ada/gnatvsn.o    \
*************** gnatlib gnatlib-sjlj gnatlib-zcx gnatlib
*** 686,692 ****
  	   GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \
  	   TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" \
  	   THREAD_KIND="$(THREAD_KIND)" \
! 	   TRACE="$(TRACE)" \
  	   FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \
  	   $@
  
--- 699,705 ----
  	   GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \
  	   TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" \
  	   THREAD_KIND="$(THREAD_KIND)" \
! 	   LN_S="$(LN_S)" \
  	   FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \
  	   $@
  
*************** doc/gnat-style.pdf: ada/gnat-style.texi
*** 809,815 ****
  # gnatlink, gnatls, gnatmake, gnatname, gnatprep, gnatxref, gnatfind,
  # gnatclean).
  # gnatdll is only used on Windows.
! ada.install-common:
  	$(MKDIR) $(DESTDIR)$(bindir)
  	-if [ -f gnat1$(exeext) ] ; \
  	then \
--- 822,830 ----
  # gnatlink, gnatls, gnatmake, gnatname, gnatprep, gnatxref, gnatfind,
  # gnatclean).
  # gnatdll is only used on Windows.
! ada.install-common: $(gnat_install_lib) gnat-install-tools
! 
! gnat-install-tools:
  	$(MKDIR) $(DESTDIR)$(bindir)
  	-if [ -f gnat1$(exeext) ] ; \
  	then \
*************** ada.install-common:
*** 830,835 ****
--- 845,851 ----
  #
  # Finally, install the library
  #
+ gnat-install-lib: | gnat-install-tools
  	-if [ -f gnat1$(exeext) ] ; \
  	then \
  	  $(MAKE) $(COMMON_FLAGS_TO_PASS) $(ADA_FLAGS_TO_PASS) install-gnatlib; \
diff -Nrcpad gcc-9.3.0/gcc/ada/gcc-interface/Makefile.in gcc-10.1.0/gcc/ada/gcc-interface/Makefile.in
*** gcc-9.3.0/gcc/ada/gcc-interface/Makefile.in	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/gcc-interface/Makefile.in	Thu May  7 10:49:59 2020
*************** install-gnatlib: ../stamp-gnatlib-$(RTSD
*** 516,521 ****
--- 516,523 ----
  	for file in $(RTSDIR)/*.ali; do \
  	    $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_RTL_OBJ_DIR); \
  	done
+ 	$(INSTALL_DATA_DATE) $(RTSDIR)/ada_target_properties \
+ 	    $(DESTDIR)$(ADA_RTL_OBJ_DIR)/../
  	-cd $(RTSDIR); for file in *$(arext);do \
  	    $(INSTALL_DATA) $$file $(DESTDIR)$(ADA_RTL_OBJ_DIR); \
  	    $(RANLIB_FOR_TARGET) $(DESTDIR)$(ADA_RTL_OBJ_DIR)/$$file; \
*************** install-gnatlib: ../stamp-gnatlib-$(RTSD
*** 532,546 ****
  	for file in gnat gnarl; do \
  	   if [ -f $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) ]; then \
  	      $(INSTALL) $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) \
! 			 $(DESTDIR)$(ADA_RTL_OBJ_DIR); \
  	   fi; \
  	   if [ -f $(RTSDIR)/lib$${file}$(soext) ]; then \
  	      $(LN_S) lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) \
! 	      $(DESTDIR)$(ADA_RTL_OBJ_DIR)/lib$${file}$(soext); \
  	   fi; \
  	   if [ -d $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM ]; then \
  	      $(CP) -r $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM \
! 	        $(DESTDIR)$(ADA_RTL_OBJ_DIR); \
  	   fi; \
  	done
  # This copy must be done preserving the date on the original file.
--- 534,548 ----
  	for file in gnat gnarl; do \
  	   if [ -f $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) ]; then \
  	      $(INSTALL) $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) \
! 			 $(DESTDIR)$(ADA_RTL_DSO_DIR); \
  	   fi; \
  	   if [ -f $(RTSDIR)/lib$${file}$(soext) ]; then \
  	      $(LN_S) lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) \
! 	      $(DESTDIR)$(ADA_RTL_DSO_DIR)/lib$${file}$(soext); \
  	   fi; \
  	   if [ -d $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM ]; then \
  	      $(CP) -r $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM \
! 	        $(DESTDIR)$(ADA_RTL_DSO_DIR); \
  	   fi; \
  	done
  # This copy must be done preserving the date on the original file.
*************** install-gnatlib: ../stamp-gnatlib-$(RTSD
*** 563,569 ****
  	$(RM) ../stamp-gnatlib-$(RTSDIR)
  
  ../stamp-gnatlib1-$(RTSDIR): Makefile ../stamp-gnatlib2-$(RTSDIR)
! 	$(MAKE) MULTISUBDIR="$(MULTISUBDIR)" THREAD_KIND="$(THREAD_KIND)" setup-rts
  # Copy tsystem.h
  	$(CP) $(srcdir)/tsystem.h $(RTSDIR)
  	$(RM) ../stamp-gnatlib-$(RTSDIR)
--- 565,571 ----
  	$(RM) ../stamp-gnatlib-$(RTSDIR)
  
  ../stamp-gnatlib1-$(RTSDIR): Makefile ../stamp-gnatlib2-$(RTSDIR)
! 	$(MAKE) MULTISUBDIR="$(MULTISUBDIR)" THREAD_KIND="$(THREAD_KIND)" LN_S="$(LN_S)" setup-rts
  # Copy tsystem.h
  	$(CP) $(srcdir)/tsystem.h $(RTSDIR)
  	$(RM) ../stamp-gnatlib-$(RTSDIR)
*************** gnatlib-shared-default:
*** 651,656 ****
--- 653,659 ----
  	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C) $(PICFLAG_FOR_TARGET)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
+ 	     LN_S="$(LN_S)" \
               gnatlib
  	$(RM) $(RTSDIR)/libgna*$(soext)
  	cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \
*************** gnatlib-shared-default:
*** 681,687 ****
  	   $(addprefix $(RTSDIR)/,$(GNATRTL_TASKING_OBJS))
  	$(RANLIB_FOR_TARGET) $(RTSDIR)/libgnarl_pic$(arext)
  
- 
  gnatlib-shared-dual:
  	$(MAKE) $(FLAGS_TO_PASS) \
               GNATLIBFLAGS="$(GNATLIBFLAGS)" \
--- 684,689 ----
*************** gnatlib-shared-dual:
*** 690,695 ****
--- 692,698 ----
  	     PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
+ 	     LN_S="$(LN_S)" \
               gnatlib-shared-default
  	$(MV) $(RTSDIR)/libgna*$(soext) .
  	$(MV) $(RTSDIR)/libgnat_pic$(arext) .
*************** gnatlib-shared-dual:
*** 701,707 ****
  	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
!              gnatlib
  	$(MV) libgna*$(soext) $(RTSDIR)
  	$(MV) libgnat_pic$(arext) $(RTSDIR)
  	$(MV) libgnarl_pic$(arext) $(RTSDIR)
--- 704,711 ----
  	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
! 	     LN_S="$(LN_S)" \
! 	     gnatlib
  	$(MV) libgna*$(soext) $(RTSDIR)
  	$(MV) libgnat_pic$(arext) $(RTSDIR)
  	$(MV) libgnarl_pic$(arext) $(RTSDIR)
*************** gnatlib-shared-dual-win32:
*** 714,720 ****
  	     PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
!              gnatlib-shared-win32
  	$(MV) $(RTSDIR)/libgna*$(soext) .
  	$(RM) ../stamp-gnatlib2-$(RTSDIR)
  	$(MAKE) $(FLAGS_TO_PASS) \
--- 718,725 ----
  	     PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
! 	     LN_S="$(LN_S)" \
! 	     gnatlib-shared-win32
  	$(MV) $(RTSDIR)/libgna*$(soext) .
  	$(RM) ../stamp-gnatlib2-$(RTSDIR)
  	$(MAKE) $(FLAGS_TO_PASS) \
*************** gnatlib-shared-dual-win32:
*** 723,729 ****
  	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
!              gnatlib
  	$(MV) libgna*$(soext) $(RTSDIR)
  
  # ??? we need to add the option to support auto-import of arrays/records to
--- 728,735 ----
  	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
! 	     LN_S="$(LN_S)" \
! 	     gnatlib
  	$(MV) libgna*$(soext) $(RTSDIR)
  
  # ??? we need to add the option to support auto-import of arrays/records to
*************** gnatlib-shared-win32:
*** 737,743 ****
  	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C) $(PICFLAG_FOR_TARGET)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
!              gnatlib
  	$(RM) $(RTSDIR)/libgna*$(soext)
  	$(CP) $(RTSDIR)/libgnat$(arext) $(RTSDIR)/libgnat_pic$(arext)
  	$(CP) $(RTSDIR)/libgnarl$(arext) $(RTSDIR)/libgnarl_pic$(arext)
--- 743,750 ----
  	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C) $(PICFLAG_FOR_TARGET)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
! 	     LN_S="$(LN_S)" \
! 	     gnatlib
  	$(RM) $(RTSDIR)/libgna*$(soext)
  	$(CP) $(RTSDIR)/libgnat$(arext) $(RTSDIR)/libgnat_pic$(arext)
  	$(CP) $(RTSDIR)/libgnarl$(arext) $(RTSDIR)/libgnarl_pic$(arext)
*************** gnatlib-shared-darwin:
*** 762,767 ****
--- 769,775 ----
  	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C) $(PICFLAG_FOR_TARGET) -fno-common" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
+ 	     LN_S="$(LN_S)" \
  	     gnatlib
  	$(RM) $(RTSDIR)/libgnat$(soext) $(RTSDIR)/libgnarl$(soext)
  	$(CP) $(RTSDIR)/libgnat$(arext) $(RTSDIR)/libgnat_pic$(arext)
*************** gnatlib-shared:
*** 794,801 ****
  	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
  	     PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \
!              $(GNATLIB_SHARED)
  
  # When building a SJLJ runtime for VxWorks, we need to ensure that the extra
  # linker options needed for ZCX are not passed to prevent the inclusion of
--- 802,810 ----
  	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
+ 	     LN_S="$(LN_S)" \
  	     PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \
! 	     $(GNATLIB_SHARED)
  
  # When building a SJLJ runtime for VxWorks, we need to ensure that the extra
  # linker options needed for ZCX are not passed to prevent the inclusion of
*************** gnatlib-sjlj:
*** 808,813 ****
--- 817,823 ----
  	     EH_MECHANISM="" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
+ 	     LN_S="$(LN_S)" \
  	     ../stamp-gnatlib1-$(RTSDIR)
  	sed \
  	  -e 's/Frontend_Exceptions.*/Frontend_Exceptions       : constant Boolean := True;/' \
*************** gnatlib-sjlj:
*** 822,827 ****
--- 832,838 ----
  	     FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
+ 	     LN_S="$(LN_S)" \
  	     gnatlib
  
  gnatlib-zcx:
*************** gnatlib-zcx:
*** 829,834 ****
--- 840,846 ----
  	     EH_MECHANISM="-gcc" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
+ 	     LN_S="$(LN_S)" \
  	     ../stamp-gnatlib1-$(RTSDIR)
  	sed \
  	  -e 's/Frontend_Exceptions.*/Frontend_Exceptions       : constant Boolean := False;/' \
*************** gnatlib-zcx:
*** 843,848 ****
--- 855,861 ----
  	     FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \
  	     MULTISUBDIR="$(MULTISUBDIR)" \
  	     THREAD_KIND="$(THREAD_KIND)" \
+ 	     LN_S="$(LN_S)" \
  	     gnatlib
  
  # Compiling object files from source files.
*************** b_gnatm.o : b_gnatm.adb
*** 867,874 ****
--- 880,894 ----
  	$(CC) -c $(ALL_ADAFLAGS) $(ADA_INCLUDES) -gnatws -gnatyN \
  	    $< $(OUTPUT_OPTION)
  
+ # Provide a `toolexeclibdir' definition for when `gnat-install-lib' is
+ # wired through gcc/ in a configuration with top-level libada disabled.
+ # It will be overridden with the value configured when `gnat-install-lib'
+ # is invoked through libada/.
+ toolexeclibdir = $(ADA_RTL_OBJ_DIR)
+ 
  ADA_INCLUDE_DIR = $(libsubdir)/adainclude
  ADA_RTL_OBJ_DIR = $(libsubdir)/adalib
+ ADA_RTL_DSO_DIR = $(toolexeclibdir)
  
  # Special flags
  
diff -Nrcpad gcc-9.3.0/gcc/ada/gcc-interface/ada-builtin-types.def gcc-10.1.0/gcc/ada/gcc-interface/ada-builtin-types.def
*** gcc-9.3.0/gcc/ada/gcc-interface/ada-builtin-types.def	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/gcc-interface/ada-builtin-types.def	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,25 ----
+ /* This file contains the type definitions for the builtins exclusively
+    used in the GNU Ada compiler.
+ 
+    Copyright (C) 2019 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3, or (at your option) any later
+ version.
+ 
+ GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ /* See builtin-types.def for details.  */
+ 
+ DEF_FUNCTION_TYPE_1 (BT_FN_BOOL_BOOL, BT_BOOL, BT_BOOL)
+ DEF_FUNCTION_TYPE_2 (BT_FN_BOOL_BOOL_BOOL, BT_BOOL, BT_BOOL, BT_BOOL)
diff -Nrcpad gcc-9.3.0/gcc/ada/gcc-interface/ada-builtins.def gcc-10.1.0/gcc/ada/gcc-interface/ada-builtins.def
*** gcc-9.3.0/gcc/ada/gcc-interface/ada-builtins.def	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/gcc-interface/ada-builtins.def	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,30 ----
+ /* This file contains the definitions for the builtins exclusively used
+    in the GNU Ada compiler.
+ 
+    Copyright (C) 2019 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3, or (at your option) any later
+ version.
+ 
+ GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ /* Before including this file, you should define a macro:
+ 
+      DEF_ADA_BUILTIN (ENUM, NAME, TYPE, ATTRS)
+ 
+    See builtins.def for details.  */
+ 
+ DEF_ADA_BUILTIN        (BUILT_IN_EXPECT, "expect", BT_FN_BOOL_BOOL_BOOL, ATTR_CONST_NOTHROW_LEAF_LIST)
+ DEF_ADA_BUILTIN        (BUILT_IN_LIKELY, "likely", BT_FN_BOOL_BOOL, ATTR_CONST_NOTHROW_LEAF_LIST)
+ DEF_ADA_BUILTIN        (BUILT_IN_UNLIKELY, "unlikely", BT_FN_BOOL_BOOL, ATTR_CONST_NOTHROW_LEAF_LIST)
diff -Nrcpad gcc-9.3.0/gcc/ada/gcc-interface/ada-tree.h gcc-10.1.0/gcc/ada/gcc-interface/ada-tree.h
*** gcc-9.3.0/gcc/ada/gcc-interface/ada-tree.h	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/gcc-interface/ada-tree.h	Thu May  7 10:49:59 2020
***************
*** 6,12 ****
   *                                                                          *
   *                              C Header File                               *
   *                                                                          *
!  *          Copyright (C) 1992-2018, Free Software Foundation, Inc.         *
   *                                                                          *
   * GNAT is free software;  you can  redistribute it  and/or modify it under *
   * terms of the  GNU General Public License as published  by the Free Soft- *
--- 6,12 ----
   *                                                                          *
   *                              C Header File                               *
   *                                                                          *
!  *          Copyright (C) 1992-2019, Free Software Foundation, Inc.         *
   *                                                                          *
   * GNAT is free software;  you can  redistribute it  and/or modify it under *
   * terms of the  GNU General Public License as published  by the Free Soft- *
*************** do {						   \
*** 482,487 ****
--- 482,490 ----
     value of a function call or 'reference to a function call.  */
  #define DECL_RETURN_VALUE_P(NODE) DECL_LANG_FLAG_5 (VAR_DECL_CHECK (NODE))
  
+ /* Nonzero in a PARM_DECL if its mechanism was forced to by-reference.  */
+ #define DECL_FORCED_BY_REF_P(NODE) DECL_LANG_FLAG_5 (PARM_DECL_CHECK (NODE))
+ 
  /* In a FIELD_DECL corresponding to a discriminant, contains the
     discriminant number.  */
  #define DECL_DISCRIMINANT_NUMBER(NODE) DECL_INITIAL (FIELD_DECL_CHECK (NODE))
*************** do {						   \
*** 582,584 ****
--- 585,592 ----
  
  #define EXIT_STMT_COND(NODE)     TREE_OPERAND_CHECK_CODE (NODE, EXIT_STMT, 0)
  #define EXIT_STMT_LABEL(NODE)    TREE_OPERAND_CHECK_CODE (NODE, EXIT_STMT, 1)
+ 
+ /* Small kludge to be able to define Ada built-in functions locally.
+    We overload them on top of the HSAIL/BRIG builtin functions.  */
+ #define BUILT_IN_LIKELY   BUILT_IN_HSAIL_WORKITEMABSID
+ #define BUILT_IN_UNLIKELY BUILT_IN_HSAIL_GRIDSIZE
diff -Nrcpad gcc-9.3.0/gcc/ada/gcc-interface/decl.c gcc-10.1.0/gcc/ada/gcc-interface/decl.c
*** gcc-9.3.0/gcc/ada/gcc-interface/decl.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/gcc-interface/decl.c	Thu May  7 10:49:59 2020
*************** static void prepend_one_attribute_pragma
*** 202,208 ****
  static void prepend_attributes (struct attrib **, Entity_Id);
  static tree elaborate_expression (Node_Id, Entity_Id, const char *, bool, bool,
  				  bool);
- static bool type_has_variable_size (tree);
  static tree elaborate_expression_1 (tree, Entity_Id, const char *, bool, bool);
  static tree elaborate_expression_2 (tree, Entity_Id, const char *, bool, bool,
  				    unsigned int);
--- 202,207 ----
*************** static tree build_position_list (tree, b
*** 233,239 ****
  static vec<subst_pair> build_subst_list (Entity_Id, Entity_Id, bool);
  static vec<variant_desc> build_variant_list (tree, vec<subst_pair>,
  					     vec<variant_desc>);
! static tree validate_size (Uint, tree, Entity_Id, enum tree_code, bool, bool);
  static void set_rm_size (Uint, tree, Entity_Id);
  static unsigned int validate_alignment (Uint, Entity_Id, unsigned int);
  static unsigned int promote_object_alignment (tree, Entity_Id);
--- 232,240 ----
  static vec<subst_pair> build_subst_list (Entity_Id, Entity_Id, bool);
  static vec<variant_desc> build_variant_list (tree, vec<subst_pair>,
  					     vec<variant_desc>);
! static tree maybe_saturate_size (tree);
! static tree validate_size (Uint, tree, Entity_Id, enum tree_code, bool, bool,
! 			   const char *, const char *);
  static void set_rm_size (Uint, tree, Entity_Id);
  static unsigned int validate_alignment (Uint, Entity_Id, unsigned int);
  static unsigned int promote_object_alignment (tree, Entity_Id);
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 592,597 ****
--- 593,621 ----
  	gcc_unreachable ();
        }
  
+     case E_Named_Integer:
+     case E_Named_Real:
+       {
+ 	tree gnu_ext_name = NULL_TREE;
+ 
+ 	if (Is_Public (gnat_entity))
+ 	  gnu_ext_name = create_concat_name (gnat_entity, NULL);
+ 
+ 	/* All references are supposed to be folded in the front-end.  */
+ 	gcc_assert (definition && gnu_expr);
+ 
+ 	gnu_type = gnat_to_gnu_type (Etype (gnat_entity));
+ 	gnu_expr = convert (gnu_type, gnu_expr);
+ 
+ 	/* Build a CONST_DECL for debugging purposes exclusively.  */
+ 	gnu_decl
+ 	  = create_var_decl (gnu_entity_name, gnu_ext_name, gnu_type,
+ 			     gnu_expr, true, Is_Public (gnat_entity),
+ 			     false, false, false, artificial_p,
+ 			     debug_info_p, NULL, gnat_entity, true);
+       }
+       break;
+ 
      case E_Constant:
        /* Ignore constant definitions already marked with the error node.  See
  	 the N_Object_Declaration case of gnat_to_gnu for the rationale.  */
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 764,770 ****
  	if (Known_Esize (gnat_entity))
  	  gnu_size
  	    = validate_size (Esize (gnat_entity), gnu_type, gnat_entity,
! 			     VAR_DECL, false, Has_Size_Clause (gnat_entity));
  	if (gnu_size)
  	  {
  	    gnu_type
--- 788,795 ----
  	if (Known_Esize (gnat_entity))
  	  gnu_size
  	    = validate_size (Esize (gnat_entity), gnu_type, gnat_entity,
! 			     VAR_DECL, false, Has_Size_Clause (gnat_entity),
! 			     NULL, NULL);
  	if (gnu_size)
  	  {
  	    gnu_type
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 1526,1543 ****
  	/* If this is a constant and we are defining it or it generates a real
  	   symbol at the object level and we are referencing it, we may want
  	   or need to have a true variable to represent it:
- 	     - if optimization isn't enabled, for debugging purposes,
  	     - if the constant is public and not overlaid on something else,
  	     - if its address is taken,
! 	     - if either itself or its type is aliased.  */
  	if (TREE_CODE (gnu_decl) == CONST_DECL
  	    && (definition || Sloc (gnat_entity) > Standard_Location)
! 	    && ((!optimize && debug_info_p)
! 		|| (Is_Public (gnat_entity)
! 		    && No (Address_Clause (gnat_entity)))
  		|| Address_Taken (gnat_entity)
  		|| Is_Aliased (gnat_entity)
! 		|| Is_Aliased (gnat_type)))
  	  {
  	    tree gnu_corr_var
  	      = create_var_decl (gnu_entity_name, gnu_ext_name, gnu_type,
--- 1551,1566 ----
  	/* If this is a constant and we are defining it or it generates a real
  	   symbol at the object level and we are referencing it, we may want
  	   or need to have a true variable to represent it:
  	     - if the constant is public and not overlaid on something else,
  	     - if its address is taken,
! 	     - if it is aliased,
! 	     - if optimization isn't enabled, for debugging purposes.  */
  	if (TREE_CODE (gnu_decl) == CONST_DECL
  	    && (definition || Sloc (gnat_entity) > Standard_Location)
! 	    && ((Is_Public (gnat_entity) && No (Address_Clause (gnat_entity)))
  		|| Address_Taken (gnat_entity)
  		|| Is_Aliased (gnat_entity)
! 		|| (!optimize && debug_info_p)))
  	  {
  	    tree gnu_corr_var
  	      = create_var_decl (gnu_entity_name, gnu_ext_name, gnu_type,
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 1547,1552 ****
--- 1570,1576 ----
  				 attr_list, gnat_entity, false);
  
  	    SET_DECL_CONST_CORRESPONDING_VAR (gnu_decl, gnu_corr_var);
+ 	    DECL_IGNORED_P (gnu_decl) = 1;
  	  }
  
  	/* If this is a constant, even if we don't need a true variable, we
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 1765,1798 ****
  
      case E_Modular_Integer_Type:
        {
- 	/* For modular types, make the unsigned type of the proper number
- 	   of bits and then set up the modulus, if required.  */
- 	tree gnu_modulus, gnu_high = NULL_TREE;
- 
  	/* Packed Array Impl. Types are supposed to be subtypes only.  */
  	gcc_assert (!Is_Packed_Array_Impl_Type (gnat_entity));
  
  	gnu_type = make_unsigned_type (esize);
  
! 	/* Get the modulus in this type.  If it overflows, assume it is because
! 	   it is equal to 2**Esize.  Note that there is no overflow checking
! 	   done on unsigned type, so we detect the overflow by looking for
! 	   a modulus of zero, which is otherwise invalid.  */
! 	gnu_modulus = UI_To_gnu (Modulus (gnat_entity), gnu_type);
  
  	if (!integer_zerop (gnu_modulus))
  	  {
  	    TYPE_MODULAR_P (gnu_type) = 1;
  	    SET_TYPE_MODULUS (gnu_type, gnu_modulus);
! 	    gnu_high = fold_build2 (MINUS_EXPR, gnu_type, gnu_modulus,
! 				    build_int_cst (gnu_type, 1));
! 	  }
! 
! 	/* If the upper bound is not maximal, make an extra subtype.  */
! 	if (gnu_high
! 	    && !tree_int_cst_equal (gnu_high, TYPE_MAX_VALUE (gnu_type)))
! 	  {
! 	    TYPE_NAME (gnu_type) = create_concat_name (gnat_entity, "UMT");
  	    gnu_type
  	      = create_extra_subtype (gnu_type, TYPE_MIN_VALUE (gnu_type),
  				      gnu_high);
--- 1789,1817 ----
  
      case E_Modular_Integer_Type:
        {
  	/* Packed Array Impl. Types are supposed to be subtypes only.  */
  	gcc_assert (!Is_Packed_Array_Impl_Type (gnat_entity));
  
+ 	/* For modular types, make the unsigned type of the proper number
+ 	   of bits and then set up the modulus, if required.  */
  	gnu_type = make_unsigned_type (esize);
  
! 	/* Get the modulus in this type.  If the modulus overflows, assume
! 	   that this is because it was equal to 2**Esize.  Note that there
! 	   is no overflow checking done on unsigned types, so we detect the
! 	   overflow by looking for a modulus of zero, which is invalid.  */
! 	tree gnu_modulus = UI_To_gnu (Modulus (gnat_entity), gnu_type);
  
+ 	/* If the modulus is not 2**Esize, then this also means that the upper
+ 	   bound of the type, i.e. modulus - 1, is not maximal, so we create an
+ 	   extra subtype to carry it and set the modulus on the base type.  */
  	if (!integer_zerop (gnu_modulus))
  	  {
+ 	    TYPE_NAME (gnu_type) = create_concat_name (gnat_entity, "UMT");
  	    TYPE_MODULAR_P (gnu_type) = 1;
  	    SET_TYPE_MODULUS (gnu_type, gnu_modulus);
! 	    tree gnu_high = fold_build2 (MINUS_EXPR, gnu_type, gnu_modulus,
! 					 build_int_cst (gnu_type, 1));
  	    gnu_type
  	      = create_extra_subtype (gnu_type, TYPE_MIN_VALUE (gnu_type),
  				      gnu_high);
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 1880,1886 ****
  	  = Has_Biased_Representation (gnat_entity);
  
        /* Do the same processing for Character subtypes as for types.  */
!       if (TYPE_STRING_FLAG (TREE_TYPE (gnu_type)))
  	{
  	  TYPE_NAME (gnu_type) = gnu_entity_name;
  	  TYPE_STRING_FLAG (gnu_type) = 1;
--- 1899,1906 ----
  	  = Has_Biased_Representation (gnat_entity);
  
        /* Do the same processing for Character subtypes as for types.  */
!       if (TREE_CODE (TREE_TYPE (gnu_type)) == INTEGER_TYPE
! 	  && TYPE_STRING_FLAG (TREE_TYPE (gnu_type)))
  	{
  	  TYPE_NAME (gnu_type) = gnu_entity_name;
  	  TYPE_STRING_FLAG (gnu_type) = 1;
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 2964,2973 ****
  	      : 0;
  	const bool has_align = Known_Alignment (gnat_entity);
  	const bool has_discr = Has_Discriminants (gnat_entity);
- 	const bool has_rep = Has_Specified_Layout (gnat_entity);
  	const bool is_extension
  	  = (Is_Tagged_Type (gnat_entity)
  	     && Nkind (record_definition) == N_Derived_Type_Definition);
  	const bool is_unchecked_union = Is_Unchecked_Union (gnat_entity);
  	bool all_rep = has_rep;
  
--- 2984,2996 ----
  	      : 0;
  	const bool has_align = Known_Alignment (gnat_entity);
  	const bool has_discr = Has_Discriminants (gnat_entity);
  	const bool is_extension
  	  = (Is_Tagged_Type (gnat_entity)
  	     && Nkind (record_definition) == N_Derived_Type_Definition);
+ 	const bool has_rep
+ 	  = is_extension
+ 	    ? Has_Record_Rep_Clause (gnat_entity)
+ 	    : Has_Specified_Layout (gnat_entity);
  	const bool is_unchecked_union = Is_Unchecked_Union (gnat_entity);
  	bool all_rep = has_rep;
  
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 2993,3000 ****
  		|| Present (Record_Extension_Part (record_definition)))
  	      record_definition = Record_Extension_Part (record_definition);
  
! 	    gcc_assert (type_annotate_only
! 			|| Present (Parent_Subtype (gnat_entity)));
  	  }
  
  	/* Make a node for the record.  If we are not defining the record,
--- 3016,3023 ----
  		|| Present (Record_Extension_Part (record_definition)))
  	      record_definition = Record_Extension_Part (record_definition);
  
! 	    gcc_assert (Present (Parent_Subtype (gnat_entity))
! 		        || type_annotate_only);
  	  }
  
  	/* Make a node for the record.  If we are not defining the record,
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 3028,3036 ****
  	  {
  	    SET_TYPE_ALIGN (gnu_type, 0);
  
! 	    /* If a type needs strict alignment, the minimum size will be the
! 	       type size instead of the RM size (see validate_size).  Cap the
! 	       alignment lest it causes this type size to become too large.  */
  	    if (Strict_Alignment (gnat_entity) && Known_RM_Size (gnat_entity))
  	      {
  		unsigned int max_size = UI_To_Int (RM_Size (gnat_entity));
--- 3051,3059 ----
  	  {
  	    SET_TYPE_ALIGN (gnu_type, 0);
  
! 	    /* If a type needs strict alignment, then its type size will also
! 	       be the RM size (see below).  Cap the alignment if needed, lest
! 	       it may cause this type size to become too large.  */
  	    if (Strict_Alignment (gnat_entity) && Known_RM_Size (gnat_entity))
  	      {
  		unsigned int max_size = UI_To_Int (RM_Size (gnat_entity));
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 3038,3043 ****
--- 3061,3075 ----
  		if (max_align < BIGGEST_ALIGNMENT)
  		  TYPE_MAX_ALIGN (gnu_type) = max_align;
  	      }
+ 
+ 	    /* Similarly if an Object_Size clause has been specified.  */
+ 	    else if (Known_Esize (gnat_entity))
+ 	      {
+ 		unsigned int max_size = UI_To_Int (Esize (gnat_entity));
+ 		unsigned int max_align = max_size & -max_size;
+ 		if (max_align < BIGGEST_ALIGNMENT)
+ 		  TYPE_MAX_ALIGN (gnu_type) = max_align;
+ 	      }
  	  }
  
  	/* If we have a Parent_Subtype, make a field for the parent.  If
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 3307,3312 ****
--- 3339,3350 ----
  		compute_record_mode (gnu_type);
  	      }
  
+ 	    /* If the type needs strict alignment, then no object of the type
+ 	       may have a size smaller than the natural size, which means that
+ 	       the RM size of the type is equal to the type size.  */
+ 	    if (Strict_Alignment (gnat_entity))
+ 	      SET_TYPE_ADA_SIZE (gnu_type, TYPE_SIZE (gnu_type));
+ 
  	    /* If there are entities in the chain corresponding to components
  	       that we did not elaborate, ensure we elaborate their types if
  	       they are Itypes.  */
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 4211,4226 ****
  	 already defined so we cannot pass true for IN_PLACE here.  */
        process_attributes (&gnu_type, &attr_list, false, gnat_entity);
  
!       /* ??? Don't set the size for a String_Literal since it is either
  	 confirming or we don't handle it properly (if the low bound is
  	 non-constant).  */
        if (!gnu_size && kind != E_String_Literal_Subtype)
  	{
! 	  Uint gnat_size = Known_Esize (gnat_entity)
! 			   ? Esize (gnat_entity) : RM_Size (gnat_entity);
! 	  gnu_size
! 	    = validate_size (gnat_size, gnu_type, gnat_entity, TYPE_DECL,
! 			     false, Has_Size_Clause (gnat_entity));
  	}
  
        /* If a size was specified, see if we can make a new type of that size
--- 4249,4271 ----
  	 already defined so we cannot pass true for IN_PLACE here.  */
        process_attributes (&gnu_type, &attr_list, false, gnat_entity);
  
!       /* See if a size was specified, by means of either an Object_Size or
!          a regular Size clause, and validate it if so.
! 
! 	 ??? Don't set the size for a String_Literal since it is either
  	 confirming or we don't handle it properly (if the low bound is
  	 non-constant).  */
        if (!gnu_size && kind != E_String_Literal_Subtype)
  	{
! 	  if (Known_Esize (gnat_entity))
! 	    gnu_size
! 	      = validate_size (Esize (gnat_entity), gnu_type, gnat_entity,
! 			       VAR_DECL, false, false, NULL, NULL);
! 	  else
! 	    gnu_size
! 	      = validate_size (RM_Size (gnat_entity), gnu_type, gnat_entity,
! 			       TYPE_DECL, false, Has_Size_Clause (gnat_entity),
! 			       NULL, NULL);
  	}
  
        /* If a size was specified, see if we can make a new type of that size
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 4327,4381 ****
  	{
  	  tree gnu_size = TYPE_SIZE (gnu_type);
  
! 	  /* If the size is self-referential, annotate the maximum value.  */
  	  if (CONTAINS_PLACEHOLDER_P (gnu_size))
! 	    gnu_size = max_size (gnu_size, true);
  
  	  /* If we are just annotating types and the type is tagged, the tag
  	     and the parent components are not generated by the front-end so
! 	     alignment and sizes must be adjusted if there is no rep clause.  */
! 	  if (type_annotate_only
! 	      && Is_Tagged_Type (gnat_entity)
! 	      && Unknown_RM_Size (gnat_entity)
! 	      && !VOID_TYPE_P (gnu_type)
! 	      && (!TYPE_FIELDS (gnu_type)
! 		  || integer_zerop (bit_position (TYPE_FIELDS (gnu_type)))))
  	    {
! 	      tree offset;
  
! 	      if (Is_Derived_Type (gnat_entity))
! 		{
! 		  Entity_Id gnat_parent = Etype (Base_Type (gnat_entity));
! 		  offset = UI_To_gnu (Esize (gnat_parent), bitsizetype);
! 		  Set_Alignment (gnat_entity, Alignment (gnat_parent));
! 		}
! 	      else
  		{
! 		  unsigned int align
! 		    = MAX (TYPE_ALIGN (gnu_type), POINTER_SIZE) / BITS_PER_UNIT;
! 		  offset = bitsize_int (POINTER_SIZE);
! 		  Set_Alignment (gnat_entity, UI_From_Int (align));
  		}
  
! 	      if (TYPE_FIELDS (gnu_type))
! 		offset
! 		  = round_up (offset, DECL_ALIGN (TYPE_FIELDS (gnu_type)));
! 
! 	      gnu_size = size_binop (PLUS_EXPR, gnu_size, offset);
! 	      gnu_size = round_up (gnu_size, POINTER_SIZE);
! 	      Uint uint_size = annotate_value (gnu_size);
! 	      Set_RM_Size (gnat_entity, uint_size);
! 	      Set_Esize (gnat_entity, uint_size);
! 	    }
! 
! 	  /* If there is a rep clause, only adjust alignment and Esize.  */
! 	  else if (type_annotate_only && Is_Tagged_Type (gnat_entity))
! 	    {
! 	      unsigned int align
! 		= MAX (TYPE_ALIGN (gnu_type), POINTER_SIZE) / BITS_PER_UNIT;
! 	      Set_Alignment (gnat_entity, UI_From_Int (align));
! 	      gnu_size = round_up (gnu_size, POINTER_SIZE);
  	      Set_Esize (gnat_entity, annotate_value (gnu_size));
  	    }
  
  	  /* Otherwise no adjustment is needed.  */
--- 4372,4422 ----
  	{
  	  tree gnu_size = TYPE_SIZE (gnu_type);
  
! 	  /* If the size is self-referential, annotate the maximum value
! 	     after saturating it, if need be, to avoid a No_Uint value.  */
  	  if (CONTAINS_PLACEHOLDER_P (gnu_size))
! 	    gnu_size = maybe_saturate_size (max_size (gnu_size, true));
  
  	  /* If we are just annotating types and the type is tagged, the tag
  	     and the parent components are not generated by the front-end so
! 	     alignment and sizes must be adjusted.  */
! 	  if (type_annotate_only && Is_Tagged_Type (gnat_entity))
  	    {
! 	      const bool derived_p = Is_Derived_Type (gnat_entity);
! 	      const Entity_Id gnat_parent
! 		= derived_p ? Etype (Base_Type (gnat_entity)) : Empty;
! 	      const unsigned int inherited_align
! 		= derived_p
! 		  ? UI_To_Int (Alignment (gnat_parent)) * BITS_PER_UNIT
! 		  : POINTER_SIZE;
! 	      const unsigned int align
! 		= MAX (TYPE_ALIGN (gnu_type), inherited_align);
  
! 	      Set_Alignment (gnat_entity, UI_From_Int (align / BITS_PER_UNIT));
! 
! 	      /* If there is neither size clause nor representation clause, the
! 		 sizes need to be adjusted.  */
! 	      if (Unknown_RM_Size (gnat_entity)
! 		  && !VOID_TYPE_P (gnu_type)
! 		  && (!TYPE_FIELDS (gnu_type)
! 		      || integer_zerop (bit_position (TYPE_FIELDS (gnu_type)))))
  		{
! 		  tree offset
! 		    = derived_p
! 		      ? UI_To_gnu (Esize (gnat_parent), bitsizetype)
! 		      : bitsize_int (POINTER_SIZE);
! 		  if (TYPE_FIELDS (gnu_type))
! 		    offset
! 		      = round_up (offset, DECL_ALIGN (TYPE_FIELDS (gnu_type)));
! 		  gnu_size = size_binop (PLUS_EXPR, gnu_size, offset);
  		}
  
! 	      gnu_size = maybe_saturate_size (round_up (gnu_size, align));
  	      Set_Esize (gnat_entity, annotate_value (gnu_size));
+ 
+ 	      /* Tagged types are Strict_Alignment so RM_Size = Esize.  */
+ 	      if (Unknown_RM_Size (gnat_entity))
+ 		Set_RM_Size (gnat_entity, Esize (gnat_entity));
  	    }
  
  	  /* Otherwise no adjustment is needed.  */
*************** gnat_to_gnu_entity (Entity_Id gnat_entit
*** 4505,4510 ****
--- 4546,4552 ----
  		}
  	    }
  
+       /* Now check if the type allows atomic access.  */
        if (Is_Atomic_Or_VFA (gnat_entity))
  	check_ok_for_atomic_type (gnu_type, gnat_entity, false);
  
*************** Gigi_Equivalent_Type (Entity_Id gnat_ent
*** 5006,5011 ****
--- 5048,5058 ----
        gnat_equiv = Etype (gnat_entity);
        break;
  
+     case E_Array_Subtype:
+       if (!Is_Constrained (gnat_entity))
+ 	gnat_equiv = Etype (gnat_entity);
+       break;
+ 
      case E_Class_Wide_Type:
        gnat_equiv = Root_Type (gnat_entity);
        break;
*************** gnat_to_gnu_component_type (Entity_Id gn
*** 5065,5072 ****
    /* Get and validate any specified Component_Size.  */
    gnu_comp_size
      = validate_size (Component_Size (gnat_array), gnu_type, gnat_array,
! 		     has_packed_components ? TYPE_DECL : VAR_DECL,
! 		     true, Has_Component_Size_Clause (gnat_array));
  
    /* If the component type is a RECORD_TYPE that has a self-referential size,
       then use the maximum size for the component size.  */
--- 5112,5119 ----
    /* Get and validate any specified Component_Size.  */
    gnu_comp_size
      = validate_size (Component_Size (gnat_array), gnu_type, gnat_array,
! 		     has_packed_components ? TYPE_DECL : VAR_DECL, true,
! 		     Has_Component_Size_Clause (gnat_array), NULL, NULL);
  
    /* If the component type is a RECORD_TYPE that has a self-referential size,
       then use the maximum size for the component size.  */
*************** gnat_to_gnu_component_type (Entity_Id gn
*** 5128,5133 ****
--- 5175,5181 ----
  	}
      }
  
+   /* Now check if the type of the component allows atomic access.  */
    if (Has_Atomic_Components (gnat_array) || Is_Atomic_Or_VFA (gnat_type))
      check_ok_for_atomic_type (gnu_type, gnat_array, true);
  
*************** gnat_to_gnu_param (Entity_Id gnat_param,
*** 5211,5216 ****
--- 5259,5265 ----
    bool ro_param = in_param && !Address_Taken (gnat_param);
    bool by_return = false, by_component_ptr = false;
    bool by_ref = false;
+   bool forced_by_ref = false;
    bool restricted_aliasing_p = false;
    location_t saved_location = input_location;
    tree gnu_param;
*************** gnat_to_gnu_param (Entity_Id gnat_param,
*** 5238,5244 ****
    /* Or else, see if a Mechanism was supplied that forced this parameter
       to be passed one way or another.  */
    else if (mech == Default || mech == By_Copy || mech == By_Reference)
!     ;
  
    /* Positive mechanism means by copy for sufficiently small parameters.  */
    else if (mech > 0)
--- 5287,5297 ----
    /* Or else, see if a Mechanism was supplied that forced this parameter
       to be passed one way or another.  */
    else if (mech == Default || mech == By_Copy || mech == By_Reference)
!     forced_by_ref
!       = (mech == By_Reference
! 	 && !foreign
! 	 && !TYPE_IS_BY_REFERENCE_P (gnu_param_type)
! 	 && !Is_Aliased (gnat_param));
  
    /* Positive mechanism means by copy for sufficiently small parameters.  */
    else if (mech > 0)
*************** gnat_to_gnu_param (Entity_Id gnat_param,
*** 5371,5376 ****
--- 5424,5430 ----
    gnu_param = create_param_decl (gnu_param_name, gnu_param_type);
    TREE_READONLY (gnu_param) = ro_param || by_ref || by_component_ptr;
    DECL_BY_REF_P (gnu_param) = by_ref;
+   DECL_FORCED_BY_REF_P (gnu_param) = forced_by_ref;
    DECL_BY_COMPONENT_PTR_P (gnu_param) = by_component_ptr;
    DECL_POINTS_TO_READONLY_P (gnu_param)
      = (ro_param && (by_ref || by_component_ptr));
*************** gnat_to_gnu_profile_type (Entity_Id gnat
*** 5588,5593 ****
--- 5642,5673 ----
    return gnu_type;
  }
  
+ /* Return true if TYPE contains only integral data, recursively if need be.  */
+ 
+ static bool
+ type_contains_only_integral_data (tree type)
+ {
+   switch (TREE_CODE (type))
+     {
+     case RECORD_TYPE:
+     case UNION_TYPE:
+     case QUAL_UNION_TYPE:
+       for (tree field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field))
+ 	if (!type_contains_only_integral_data (TREE_TYPE (field)))
+ 	  return false;
+       return true;
+ 
+     case ARRAY_TYPE:
+     case COMPLEX_TYPE:
+       return type_contains_only_integral_data (TREE_TYPE (type));
+ 
+     default:
+       return INTEGRAL_TYPE_P (type);
+     }
+ 
+   gcc_unreachable ();
+ }
+ 
  /* Return a GCC tree for a subprogram type corresponding to GNAT_SUBPROG.
     DEFINITION is true if this is for a subprogram being defined.  DEBUG_INFO_P
     is true if we need to write debug information for other types that we may
*************** gnat_to_gnu_subprog_type (Entity_Id gnat
*** 5617,5624 ****
       the TYPE_CI_CO_LIST field of the FUNCTION_TYPE node we create.  */
    tree gnu_cico_list = NULL_TREE;
    tree gnu_cico_return_type = NULL_TREE;
!   /* Fields in return type of procedure with copy-in copy-out parameters.  */
!   tree gnu_field_list = NULL_TREE;
    /* The semantics of "pure" in Ada essentially matches that of "const"
       or "pure" in GCC.  In particular, both properties are orthogonal
       to the "nothrow" property if the EH circuitry is explicit in the
--- 5697,5704 ----
       the TYPE_CI_CO_LIST field of the FUNCTION_TYPE node we create.  */
    tree gnu_cico_list = NULL_TREE;
    tree gnu_cico_return_type = NULL_TREE;
!   tree gnu_cico_field_list = NULL_TREE;
!   bool gnu_cico_only_integral_type = true;
    /* The semantics of "pure" in Ada essentially matches that of "const"
       or "pure" in GCC.  In particular, both properties are orthogonal
       to the "nothrow" property if the EH circuitry is explicit in the
*************** gnat_to_gnu_subprog_type (Entity_Id gnat
*** 5944,5952 ****
  				         NULL_TREE, 0, 0);
  		  Sloc_to_locus (Sloc (gnat_subprog),
  			         &DECL_SOURCE_LOCATION (gnu_field));
! 		  gnu_field_list = gnu_field;
  		  gnu_cico_list
  		    = tree_cons (gnu_field, void_type_node, NULL_TREE);
  		}
  
  	      TYPE_NAME (gnu_cico_return_type) = get_identifier ("RETURN");
--- 6024,6034 ----
  				         NULL_TREE, 0, 0);
  		  Sloc_to_locus (Sloc (gnat_subprog),
  			         &DECL_SOURCE_LOCATION (gnu_field));
! 		  gnu_cico_field_list = gnu_field;
  		  gnu_cico_list
  		    = tree_cons (gnu_field, void_type_node, NULL_TREE);
+ 		  if (!type_contains_only_integral_data (gnu_return_type))
+ 		    gnu_cico_only_integral_type = false;
  		}
  
  	      TYPE_NAME (gnu_cico_return_type) = get_identifier ("RETURN");
*************** gnat_to_gnu_subprog_type (Entity_Id gnat
*** 5963,5971 ****
  				 0, 0);
  	  Sloc_to_locus (Sloc (gnat_param),
  			 &DECL_SOURCE_LOCATION (gnu_field));
! 	  DECL_CHAIN (gnu_field) = gnu_field_list;
! 	  gnu_field_list = gnu_field;
  	  gnu_cico_list = tree_cons (gnu_field, gnu_param, gnu_cico_list);
  	}
      }
  
--- 6045,6055 ----
  				 0, 0);
  	  Sloc_to_locus (Sloc (gnat_param),
  			 &DECL_SOURCE_LOCATION (gnu_field));
! 	  DECL_CHAIN (gnu_field) = gnu_cico_field_list;
! 	  gnu_cico_field_list = gnu_field;
  	  gnu_cico_list = tree_cons (gnu_field, gnu_param, gnu_cico_list);
+ 	  if (!type_contains_only_integral_data (gnu_param_type))
+ 	    gnu_cico_only_integral_type = false;
  	}
      }
  
*************** gnat_to_gnu_subprog_type (Entity_Id gnat
*** 5982,5993 ****
  	 since structures are incomplete for the back-end.  */
        else if (Convention (gnat_subprog) != Convention_Stubbed)
  	{
! 	  finish_record_type (gnu_cico_return_type, nreverse (gnu_field_list),
  			      0, false);
  
! 	  /* Try to promote the mode of the return type if it is passed
! 	     in registers, again to speed up accesses.  */
  	  if (TYPE_MODE (gnu_cico_return_type) == BLKmode
  	      && !targetm.calls.return_in_memory (gnu_cico_return_type,
  						  NULL_TREE))
  	    {
--- 6066,6079 ----
  	 since structures are incomplete for the back-end.  */
        else if (Convention (gnat_subprog) != Convention_Stubbed)
  	{
! 	  finish_record_type (gnu_cico_return_type,
! 			      nreverse (gnu_cico_field_list),
  			      0, false);
  
! 	  /* Try to promote the mode if the return type is fully returned
! 	     in integer registers, again to speed up accesses.  */
  	  if (TYPE_MODE (gnu_cico_return_type) == BLKmode
+ 	      && gnu_cico_only_integral_type
  	      && !targetm.calls.return_in_memory (gnu_cico_return_type,
  						  NULL_TREE))
  	    {
*************** gnat_to_gnu_subprog_type (Entity_Id gnat
*** 6010,6015 ****
--- 6096,6112 ----
  		}
  	    }
  
+ 	  /* But demote the mode if the return type is partly returned in FP
+ 	     registers to avoid creating problematic paradoxical subregs.
+ 	     Note that we need to cater to historical 32-bit architectures
+ 	     that incorrectly use the mode to select the return mechanism.  */
+ 	  else if (INTEGRAL_MODE_P (TYPE_MODE (gnu_cico_return_type))
+ 		   && !gnu_cico_only_integral_type
+ 		   && BITS_PER_WORD >= 64
+ 		   && !targetm.calls.return_in_memory (gnu_cico_return_type,
+ 						       NULL_TREE))
+ 	    SET_TYPE_MODE (gnu_cico_return_type, BLKmode);
+ 
  	  if (debug_info_p)
  	    rest_of_record_type_compilation (gnu_cico_return_type);
  	}
*************** prepend_one_attribute (struct attrib **a
*** 6489,6513 ****
  static void
  prepend_one_attribute_pragma (struct attrib **attr_list, Node_Id gnat_pragma)
  {
!   const Node_Id gnat_arg = Pragma_Argument_Associations (gnat_pragma);
!   tree gnu_arg0 = NULL_TREE, gnu_arg1 = NULL_TREE;
    enum attrib_type etype;
  
    /* Map the pragma at hand.  Skip if this isn't one we know how to handle.  */
    switch (Get_Pragma_Id (Chars (Pragma_Identifier (gnat_pragma))))
      {
-     case Pragma_Machine_Attribute:
-       etype = ATTR_MACHINE_ATTRIBUTE;
-       break;
- 
      case Pragma_Linker_Alias:
        etype = ATTR_LINK_ALIAS;
        break;
  
-     case Pragma_Linker_Section:
-       etype = ATTR_LINK_SECTION;
-       break;
- 
      case Pragma_Linker_Constructor:
        etype = ATTR_LINK_CONSTRUCTOR;
        break;
--- 6586,6603 ----
  static void
  prepend_one_attribute_pragma (struct attrib **attr_list, Node_Id gnat_pragma)
  {
!   const Node_Id gnat_arg = First (Pragma_Argument_Associations (gnat_pragma));
!   Node_Id gnat_next_arg = Next (gnat_arg);
!   tree gnu_arg1 = NULL_TREE, gnu_arg_list = NULL_TREE;
    enum attrib_type etype;
  
    /* Map the pragma at hand.  Skip if this isn't one we know how to handle.  */
    switch (Get_Pragma_Id (Chars (Pragma_Identifier (gnat_pragma))))
      {
      case Pragma_Linker_Alias:
        etype = ATTR_LINK_ALIAS;
        break;
  
      case Pragma_Linker_Constructor:
        etype = ATTR_LINK_CONSTRUCTOR;
        break;
*************** prepend_one_attribute_pragma (struct att
*** 6516,6573 ****
        etype = ATTR_LINK_DESTRUCTOR;
        break;
  
!     case Pragma_Weak_External:
!       etype = ATTR_WEAK_EXTERNAL;
        break;
  
      case Pragma_Thread_Local_Storage:
        etype = ATTR_THREAD_LOCAL_STORAGE;
        break;
  
      default:
        return;
      }
  
    /* See what arguments we have and turn them into GCC trees for attribute
!      handlers.  These expect identifier for strings.  We handle at most two
!      arguments and static expressions only.  */
!   if (Present (gnat_arg) && Present (First (gnat_arg)))
      {
!       Node_Id gnat_arg0 = Next (First (gnat_arg));
!       Node_Id gnat_arg1 = Empty;
! 
!       if (Present (gnat_arg0)
! 	  && Is_OK_Static_Expression (Expression (gnat_arg0)))
! 	{
! 	  gnu_arg0 = gnat_to_gnu (Expression (gnat_arg0));
! 
! 	  if (TREE_CODE (gnu_arg0) == STRING_CST)
! 	    {
! 	      gnu_arg0 = get_identifier (TREE_STRING_POINTER (gnu_arg0));
! 	      if (IDENTIFIER_LENGTH (gnu_arg0) == 0)
! 		return;
! 	    }
  
! 	  gnat_arg1 = Next (gnat_arg0);
! 	}
  
!       if (Present (gnat_arg1)
! 	  && Is_OK_Static_Expression (Expression (gnat_arg1)))
  	{
! 	  gnu_arg1 = gnat_to_gnu (Expression (gnat_arg1));
! 
! 	  if (TREE_CODE (gnu_arg1) == STRING_CST)
! 	   gnu_arg1 = get_identifier (TREE_STRING_POINTER (gnu_arg1));
  	}
      }
  
!   /* Prepend to the list.  Make a list of the argument we might have, as GCC
!      expects it.  */
!   prepend_one_attribute (attr_list, etype, gnu_arg0,
! 			 gnu_arg1
! 			 ? build_tree_list (NULL_TREE, gnu_arg1) : NULL_TREE,
! 			 Present (Next (First (gnat_arg)))
! 			 ? Expression (Next (First (gnat_arg))) : gnat_pragma);
  }
  
  /* Prepend to ATTR_LIST the list of attributes for GNAT_ENTITY, if any.  */
--- 6606,6663 ----
        etype = ATTR_LINK_DESTRUCTOR;
        break;
  
!     case Pragma_Linker_Section:
!       etype = ATTR_LINK_SECTION;
!       break;
! 
!     case Pragma_Machine_Attribute:
!       etype = ATTR_MACHINE_ATTRIBUTE;
        break;
  
      case Pragma_Thread_Local_Storage:
        etype = ATTR_THREAD_LOCAL_STORAGE;
        break;
  
+     case Pragma_Weak_External:
+       etype = ATTR_WEAK_EXTERNAL;
+       break;
+ 
      default:
        return;
      }
  
    /* See what arguments we have and turn them into GCC trees for attribute
!      handlers.  The first one is always expected to be a string meant to be
!      turned into an identifier.  The next ones are all static expressions,
!      among which strings meant to be turned into an identifier, except for
!      a couple of specific attributes that require raw strings.  */
!   if (Present (gnat_next_arg))
      {
!       gnu_arg1 = gnat_to_gnu (Expression (gnat_next_arg));
!       gcc_assert (TREE_CODE (gnu_arg1) == STRING_CST);
  
!       const char *const p = TREE_STRING_POINTER (gnu_arg1);
!       const bool string_args
! 	= strcmp (p, "target") == 0 || strcmp (p, "target_clones") == 0;
!       gnu_arg1 = get_identifier (p);
!       if (IDENTIFIER_LENGTH (gnu_arg1) == 0)
! 	return;
!       gnat_next_arg = Next (gnat_next_arg);
  
!       while (Present (gnat_next_arg))
  	{
! 	  tree gnu_arg = gnat_to_gnu (Expression (gnat_next_arg));
! 	  if (TREE_CODE (gnu_arg) == STRING_CST && !string_args)
! 	    gnu_arg = get_identifier (TREE_STRING_POINTER (gnu_arg));
! 	  gnu_arg_list
! 	    = chainon (gnu_arg_list, build_tree_list (NULL_TREE, gnu_arg));
! 	  gnat_next_arg = Next (gnat_next_arg);
  	}
      }
  
!   prepend_one_attribute (attr_list, etype, gnu_arg1, gnu_arg_list,
! 			 Present (Next (gnat_arg))
! 			 ? Expression (Next (gnat_arg)) : gnat_pragma);
  }
  
  /* Prepend to ATTR_LIST the list of attributes for GNAT_ENTITY, if any.  */
*************** elaborate_reference_1 (tree ref, void *d
*** 6757,6762 ****
--- 6847,6861 ----
  		   elaborate_reference_1 (TREE_OPERAND (ref, 0), data),
  		   TREE_OPERAND (ref, 1), NULL_TREE);
  
+   /* If this is the displacement of a pointer, elaborate the pointer and then
+      displace the result.  The actual purpose here is to drop the location on
+      the expression, which may be problematic if replicated on references.  */
+   if (TREE_CODE (ref) == POINTER_PLUS_EXPR
+       && TREE_CODE (TREE_OPERAND (ref, 1)) == INTEGER_CST)
+     return build2 (POINTER_PLUS_EXPR, TREE_TYPE (ref),
+ 		   elaborate_reference_1 (TREE_OPERAND (ref, 0), data),
+ 		   TREE_OPERAND (ref, 1));
+ 
    sprintf (suffix, "EXP%d", ++er->n);
    return
      elaborate_expression_1 (ref, er->entity, suffix, er->definition, false);
*************** choices_to_gnu (tree gnu_operand, Node_I
*** 6877,6887 ****
  static int
  adjust_packed (tree field_type, tree record_type, int packed)
  {
!   /* If the field contains an item of variable size, we cannot pack it
!      because we cannot create temporaries of non-fixed size in case
!      we need to take the address of the field.  See addressable_p and
!      the notes on the addressability issues for further details.  */
!   if (type_has_variable_size (field_type))
      return 0;
  
    /* In the other cases, we can honor the packing.  */
--- 6976,6988 ----
  static int
  adjust_packed (tree field_type, tree record_type, int packed)
  {
!   /* If the field contains an array with self-referential size, we'd better
!      not pack it because this would misalign it and, therefore, cause large
!      temporaries to be created in case we need to take the address of the
!      field.  See addressable_p and the notes on the addressability issues
!      for further details.  */
!   if (AGGREGATE_TYPE_P (field_type)
!       && aggregate_type_contains_array_p (field_type, true))
      return 0;
  
    /* In the other cases, we can honor the packing.  */
*************** gnat_to_gnu_field (Entity_Id gnat_field,
*** 6920,6925 ****
--- 7021,7028 ----
    const Node_Id gnat_clause = Component_Clause (gnat_field);
    const Entity_Id gnat_record_type = Underlying_Type (Scope (gnat_field));
    const Entity_Id gnat_field_type = Etype (gnat_field);
+   tree gnu_field_type = gnat_to_gnu_type (gnat_field_type);
+   tree gnu_field_id = get_entity_name (gnat_field);
    const bool is_atomic
      = (Is_Atomic_Or_VFA (gnat_field) || Is_Atomic_Or_VFA (gnat_field_type));
    const bool is_aliased = Is_Aliased (gnat_field);
*************** gnat_to_gnu_field (Entity_Id gnat_field,
*** 6927,6932 ****
--- 7030,7036 ----
      = (Is_Independent (gnat_field) || Is_Independent (gnat_field_type));
    const bool is_volatile
      = (Treat_As_Volatile (gnat_field) || Treat_As_Volatile (gnat_field_type));
+   const bool is_by_ref = TYPE_IS_BY_REFERENCE_P (gnu_field_type);
    const bool is_strict_alignment = Strict_Alignment (gnat_field_type);
    /* We used to consider that volatile fields also require strict alignment,
       but that was an interpolation and would cause us to reject a pragma
*************** gnat_to_gnu_field (Entity_Id gnat_field,
*** 6935,6949 ****
       involve load-modify-store sequences, but that's OK for volatile.  The
       only constraint is the implementation advice whereby only the bits of
       the components should be accessed if they both start and end on byte
!      boundaries, but that should be guaranteed by the GCC memory model.  */
!   const bool needs_strict_alignment
!     = (is_atomic || is_aliased || is_independent || is_strict_alignment);
!   tree gnu_field_type = gnat_to_gnu_type (gnat_field_type);
!   tree gnu_field_id = get_entity_name (gnat_field);
    tree gnu_field, gnu_size, gnu_pos;
  
!   /* If this field requires strict alignment, we cannot pack it because
!      it would very likely be under-aligned in the record.  */
    if (needs_strict_alignment)
      packed = 0;
    else
--- 7039,7074 ----
       involve load-modify-store sequences, but that's OK for volatile.  The
       only constraint is the implementation advice whereby only the bits of
       the components should be accessed if they both start and end on byte
!      boundaries, but that should be guaranteed by the GCC memory model.
!      Note that we have some redundancies (is_atomic => is_independent,
!      is_aliased => is_independent and is_by_ref => is_strict_alignment)
!      so the following formula is sufficient.  */
!   const bool needs_strict_alignment = (is_independent || is_strict_alignment);
!   const char *field_s, *size_s;
    tree gnu_field, gnu_size, gnu_pos;
+   bool is_bitfield;
  
!   /* The qualifier to be used in messages.  */
!   if (is_atomic)
!     field_s = "atomic&";
!   else if (is_aliased)
!     field_s = "aliased&";
!   else if (is_independent)
!     field_s = "independent&";
!   else if (is_by_ref)
!     field_s = "& with by-reference type";
!   else if (is_strict_alignment)
!     field_s = "& with aliased part";
!   else
!     field_s = "&";
! 
!   /* The message to be used for incompatible size.  */
!   if (is_atomic || is_aliased)
!     size_s = "size for %s must be ^";
!   else if (field_s)
!     size_s = "size for %s too small{, minimum allowed is ^}";
! 
!   /* If a field requires strict alignment, we cannot pack it (RM 13.2(7)).  */
    if (needs_strict_alignment)
      packed = 0;
    else
*************** gnat_to_gnu_field (Entity_Id gnat_field,
*** 6952,6960 ****
    /* If a size is specified, use it.  Otherwise, if the record type is packed,
       use the official RM size.  See "Handling of Type'Size Values" in Einfo
       for further details.  */
!   if (Known_Esize (gnat_field) || Present (gnat_clause))
      gnu_size = validate_size (Esize (gnat_field), gnu_field_type, gnat_field,
! 			      FIELD_DECL, false, true);
    else if (packed == 1)
      {
        gnu_size = rm_size (gnu_field_type);
--- 7077,7085 ----
    /* If a size is specified, use it.  Otherwise, if the record type is packed,
       use the official RM size.  See "Handling of Type'Size Values" in Einfo
       for further details.  */
!   if (Present (gnat_clause) || Known_Esize (gnat_field))
      gnu_size = validate_size (Esize (gnat_field), gnu_field_type, gnat_field,
! 			      FIELD_DECL, false, true, size_s, field_s);
    else if (packed == 1)
      {
        gnu_size = rm_size (gnu_field_type);
*************** gnat_to_gnu_field (Entity_Id gnat_field,
*** 6964,6975 ****
    else
      gnu_size = NULL_TREE;
  
!   /* If we have a specified size that is smaller than that of the field's type,
!      or a position is specified, and the field's type is a record that doesn't
!      require strict alignment, see if we can get either an integral mode form
!      of the type or a smaller form.  If we can, show a size was specified for
!      the field if there wasn't one already, so we know to make this a bitfield
!      and avoid making things wider.
  
       Changing to an integral mode form is useful when the record is packed as
       we can then place the field at a non-byte-aligned position and so achieve
--- 7089,7124 ----
    else
      gnu_size = NULL_TREE;
  
!   /* Likewise for the position.  */
!   if (Present (gnat_clause))
!     {
!       gnu_pos = UI_To_gnu (Component_Bit_Offset (gnat_field), bitsizetype);
!       is_bitfield = !value_factor_p (gnu_pos, BITS_PER_UNIT);
!     }
! 
!   /* If the record has rep clauses and this is the tag field, make a rep
!      clause for it as well.  */
!   else if (Has_Specified_Layout (gnat_record_type)
! 	   && Chars (gnat_field) == Name_uTag)
!     {
!       gnu_pos = bitsize_zero_node;
!       gnu_size = TYPE_SIZE (gnu_field_type);
!       is_bitfield = false;
!     }
! 
!   else
!     {
!       gnu_pos = NULL_TREE;
!       is_bitfield = false;
!     }
! 
!   /* If the field's type is a fixed-size record that does not require strict
!      alignment, and the record is packed or we have a position specified for
!      the field that makes it a bitfield or we have a specified size that is
!      smaller than that of the field's type, then see if we can get either an
!      integral mode form of the field's type or a smaller form.  If we can,
!      consider that a size was specified for the field if there wasn't one
!      already, so we know to make it a bitfield and avoid making things wider.
  
       Changing to an integral mode form is useful when the record is packed as
       we can then place the field at a non-byte-aligned position and so achieve
*************** gnat_to_gnu_field (Entity_Id gnat_field,
*** 6991,7004 ****
        && !TYPE_FAT_POINTER_P (gnu_field_type)
        && tree_fits_uhwi_p (TYPE_SIZE (gnu_field_type))
        && (packed == 1
  	  || (gnu_size
! 	      && (tree_int_cst_lt (gnu_size, TYPE_SIZE (gnu_field_type))
! 		  || (Present (gnat_clause)
! 		      && !(UI_To_Int (Component_Bit_Offset (gnat_field))
! 			   % BITS_PER_UNIT == 0
! 			   && value_factor_p (gnu_size, BITS_PER_UNIT)))))))
      {
!       tree gnu_packable_type = make_packable_type (gnu_field_type, true);
        if (gnu_packable_type != gnu_field_type)
  	{
  	  gnu_field_type = gnu_packable_type;
--- 7140,7151 ----
        && !TYPE_FAT_POINTER_P (gnu_field_type)
        && tree_fits_uhwi_p (TYPE_SIZE (gnu_field_type))
        && (packed == 1
+ 	  || is_bitfield
  	  || (gnu_size
! 	      && tree_int_cst_lt (gnu_size, TYPE_SIZE (gnu_field_type)))))
      {
!       tree gnu_packable_type
! 	= make_packable_type (gnu_field_type, true, is_bitfield ? 1 : 0);
        if (gnu_packable_type != gnu_field_type)
  	{
  	  gnu_field_type = gnu_packable_type;
*************** gnat_to_gnu_field (Entity_Id gnat_field,
*** 7007,7012 ****
--- 7154,7160 ----
  	}
      }
  
+   /* Now check if the type of the field allows atomic access.  */
    if (Is_Atomic_Or_VFA (gnat_field))
      {
        const unsigned int align
*************** gnat_to_gnu_field (Entity_Id gnat_field,
*** 7018,7029 ****
        check_ok_for_atomic_type (gnu_field_type, gnat_field, false);
      }
  
!   if (Present (gnat_clause))
      {
        Entity_Id gnat_parent = Parent_Subtype (gnat_record_type);
  
-       gnu_pos = UI_To_gnu (Component_Bit_Offset (gnat_field), bitsizetype);
- 
        /* Ensure the position does not overlap with the parent subtype, if there
  	 is one.  This test is omitted if the parent of the tagged type has a
  	 full rep clause since, in this case, component clauses are allowed to
--- 7166,7176 ----
        check_ok_for_atomic_type (gnu_field_type, gnat_field, false);
      }
  
!   /* If a position is specified, check that it is valid.  */
!   if (gnu_pos)
      {
        Entity_Id gnat_parent = Parent_Subtype (gnat_record_type);
  
        /* Ensure the position does not overlap with the parent subtype, if there
  	 is one.  This test is omitted if the parent of the tagged type has a
  	 full rep clause since, in this case, component clauses are allowed to
*************** gnat_to_gnu_field (Entity_Id gnat_field,
*** 7036,7042 ****
  	  if (TREE_CODE (TYPE_SIZE (gnu_parent)) == INTEGER_CST
  	      && tree_int_cst_lt (gnu_pos, TYPE_SIZE (gnu_parent)))
  	    post_error_ne_tree
! 	      ("offset of& must be beyond parent{, minimum allowed is ^}",
  	       Position (gnat_clause), gnat_field, TYPE_SIZE_UNIT (gnu_parent));
  	}
  
--- 7183,7189 ----
  	  if (TREE_CODE (TYPE_SIZE (gnu_parent)) == INTEGER_CST
  	      && tree_int_cst_lt (gnu_pos, TYPE_SIZE (gnu_parent)))
  	    post_error_ne_tree
! 	      ("position for& must be beyond parent{, minimum allowed is ^}",
  	       Position (gnat_clause), gnat_field, TYPE_SIZE_UNIT (gnu_parent));
  	}
  
*************** gnat_to_gnu_field (Entity_Id gnat_field,
*** 7055,7147 ****
  	      && TYPE_ALIGN (gnu_record_type) < type_align)
  	    SET_TYPE_ALIGN (gnu_record_type, type_align);
  
! 	  /* If the position is not a multiple of the alignment of the type,
! 	     then error out and reset the position.  */
  	  if (!integer_zerop (size_binop (TRUNC_MOD_EXPR, gnu_pos,
! 					  bitsize_int (type_align))))
  	    {
! 	      const char *s;
! 
! 	      if (is_atomic)
! 		s = "position of atomic field& must be multiple of ^ bits";
! 	      else if (is_aliased)
! 		s = "position of aliased field& must be multiple of ^ bits";
! 	      else if (is_independent)
! 		s = "position of independent field& must be multiple of ^ bits";
! 	      else if (is_strict_alignment)
! 		s = "position of & with aliased or tagged part must be"
! 		    " multiple of ^ bits";
! 	      else
! 		gcc_unreachable ();
  
  	      post_error_ne_num (s, First_Bit (gnat_clause), gnat_field,
! 				 type_align);
  	      gnu_pos = NULL_TREE;
  	    }
  
  	  if (gnu_size)
  	    {
! 	      tree gnu_type_size = TYPE_SIZE (gnu_field_type);
! 	      const int cmp = tree_int_cst_compare (gnu_size, gnu_type_size);
  
! 	      /* If the size is lower than that of the type, or greater for
! 		 atomic and aliased, then error out and reset the size.  */
! 	      if (cmp < 0 || (cmp > 0 && (is_atomic || is_aliased)))
  		{
! 		  const char *s;
! 
! 		  if (is_atomic)
! 		    s = "size of atomic field& must be ^ bits";
! 		  else if (is_aliased)
! 		    s = "size of aliased field& must be ^ bits";
! 		  else if (is_independent)
! 		    s = "size of independent field& must be at least ^ bits";
! 		  else if (is_strict_alignment)
! 		    s = "size of & with aliased or tagged part must be"
! 			" at least ^ bits";
! 		  else
! 		    gcc_unreachable ();
! 
! 		  post_error_ne_tree (s, Last_Bit (gnat_clause), gnat_field,
! 				      gnu_type_size);
  		  gnu_size = NULL_TREE;
  		}
  
! 	      /* Likewise if the size is not a multiple of a byte,  */
! 	      else if (!integer_zerop (size_binop (TRUNC_MOD_EXPR, gnu_size,
! 						   bitsize_unit_node)))
  		{
! 		  const char *s;
! 
! 		  if (is_independent)
! 		    s = "size of independent field& must be multiple of"
! 			" Storage_Unit";
! 		  else if (is_strict_alignment)
! 		    s = "size of & with aliased or tagged part must be"
! 			" multiple of Storage_Unit";
! 		  else
! 		    gcc_unreachable ();
! 
! 		  post_error_ne (s, Last_Bit (gnat_clause), gnat_field);
  		  gnu_size = NULL_TREE;
  		}
  	    }
  	}
      }
  
-   /* If the record has rep clauses and this is the tag field, make a rep
-      clause for it as well.  */
-   else if (Has_Specified_Layout (gnat_record_type)
- 	   && Chars (gnat_field) == Name_uTag)
-     {
-       gnu_pos = bitsize_zero_node;
-       gnu_size = TYPE_SIZE (gnu_field_type);
-     }
- 
    else
      {
-       gnu_pos = NULL_TREE;
- 
        /* If we are packing the record and the field is BLKmode, round the
  	 size up to a byte boundary.  */
        if (packed && TYPE_MODE (gnu_field_type) == BLKmode && gnu_size)
--- 7202,7270 ----
  	      && TYPE_ALIGN (gnu_record_type) < type_align)
  	    SET_TYPE_ALIGN (gnu_record_type, type_align);
  
! 	  /* If the position is not a multiple of the storage unit, then error
! 	     out and reset the position.  */
  	  if (!integer_zerop (size_binop (TRUNC_MOD_EXPR, gnu_pos,
! 					  bitsize_unit_node)))
  	    {
! 	      char s[128];
! 	      snprintf (s, sizeof (s), "position for %s must be "
! 			"multiple of Storage_Unit", field_s);
! 	      post_error_ne (s, First_Bit (gnat_clause), gnat_field);
! 	      gnu_pos = NULL_TREE;
! 	    }
  
+ 	  /* If the position is not a multiple of the alignment of the type,
+ 	     then error out and reset the position.  */
+ 	  else if (type_align > BITS_PER_UNIT
+ 		   && !integer_zerop (size_binop (TRUNC_MOD_EXPR, gnu_pos,
+ 						  bitsize_int (type_align))))
+ 	    {
+ 	      char s[128];
+               snprintf (s, sizeof (s), "position for %s must be multiple of ^",
+ 			field_s);
  	      post_error_ne_num (s, First_Bit (gnat_clause), gnat_field,
! 				 type_align / BITS_PER_UNIT);
! 	      post_error_ne_num ("\\because alignment of its type& is ^",
! 				 First_Bit (gnat_clause), Etype (gnat_field),
! 				 type_align / BITS_PER_UNIT);
  	      gnu_pos = NULL_TREE;
  	    }
  
  	  if (gnu_size)
  	    {
! 	      tree type_size = TYPE_SIZE (gnu_field_type);
! 	      int cmp;
  
! 	      /* If the size is not a multiple of the storage unit, then error
! 		 out and reset the size.  */
! 	      if (!integer_zerop (size_binop (TRUNC_MOD_EXPR, gnu_size,
! 					      bitsize_unit_node)))
  		{
! 		  char s[128];
! 		  snprintf (s, sizeof (s), "size for %s must be "
! 			    "multiple of Storage_Unit", field_s);
! 		  post_error_ne (s, Last_Bit (gnat_clause), gnat_field);
  		  gnu_size = NULL_TREE;
  		}
  
! 	      /* If the size is lower than that of the type, or greater for
! 		 atomic and aliased, then error out and reset the size.  */
! 	      else if ((cmp = tree_int_cst_compare (gnu_size, type_size)) < 0
! 		       || (cmp > 0 && (is_atomic || is_aliased)))
  		{
! 		  char s[128];
! 		  snprintf (s, sizeof (s), size_s, field_s);
! 		  post_error_ne_tree (s, Last_Bit (gnat_clause), gnat_field,
! 				      type_size);
  		  gnu_size = NULL_TREE;
  		}
  	    }
  	}
      }
  
    else
      {
        /* If we are packing the record and the field is BLKmode, round the
  	 size up to a byte boundary.  */
        if (packed && TYPE_MODE (gnu_field_type) == BLKmode && gnu_size)
*************** gnat_to_gnu_field (Entity_Id gnat_field,
*** 7187,7196 ****
--- 7310,7326 ----
  	  && INTEGRAL_TYPE_P (TREE_TYPE (TYPE_FIELDS (gnu_field_type))))
  	gnu_field_type = TREE_TYPE (TYPE_FIELDS (gnu_field_type));
  
+       orig_field_type = gnu_field_type;
        gnu_field_type
  	= make_type_from_size (gnu_field_type, gnu_size,
  			       Has_Biased_Representation (gnat_field));
  
+       /* If the type has been extended, we may need to cap the alignment.  */
+       if (!needs_strict_alignment
+ 	  && gnu_field_type != orig_field_type
+ 	  && tree_int_cst_lt (TYPE_SIZE (orig_field_type), gnu_size))
+ 	packed = adjust_packed (gnu_field_type, gnu_record_type, packed);
+ 
        orig_field_type = gnu_field_type;
        gnu_field_type = maybe_pad_type (gnu_field_type, gnu_size, 0, gnat_field,
  				       false, false, definition, true);
*************** components_need_strict_alignment (Node_I
*** 7261,7267 ****
      {
        Entity_Id gnat_field = Defining_Entity (component_decl);
  
!       if (Is_Aliased (gnat_field))
  	return true;
  
        if (Strict_Alignment (Etype (gnat_field)))
--- 7391,7397 ----
      {
        Entity_Id gnat_field = Defining_Entity (component_decl);
  
!       if (Is_Independent (gnat_field) || Is_Independent (Etype (gnat_field)))
  	return true;
  
        if (Strict_Alignment (Etype (gnat_field)))
*************** components_need_strict_alignment (Node_I
*** 7271,7301 ****
    return false;
  }
  
- /* Return true if TYPE is a type with variable size or a padding type with a
-    field of variable size or a record that has a field with such a type.  */
- 
- static bool
- type_has_variable_size (tree type)
- {
-   tree field;
- 
-   if (!TREE_CONSTANT (TYPE_SIZE (type)))
-     return true;
- 
-   if (TYPE_IS_PADDING_P (type)
-       && !TREE_CONSTANT (DECL_SIZE (TYPE_FIELDS (type))))
-     return true;
- 
-   if (!RECORD_OR_UNION_TYPE_P (type))
-     return false;
- 
-   for (field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field))
-     if (type_has_variable_size (TREE_TYPE (field)))
-       return true;
- 
-   return false;
- }
- 
  /* Return true if FIELD is an artificial field.  */
  
  static bool
--- 7401,7406 ----
*************** components_to_record (Node_Id gnat_compo
*** 7531,7536 ****
--- 7636,7642 ----
    bool all_rep_and_size = all_rep && TYPE_SIZE (gnu_record_type);
    bool variants_have_rep = all_rep;
    bool layout_with_rep = false;
+   bool has_non_packed_fixed_size_field = false;
    bool has_self_field = false;
    bool has_aliased_after_self_field = false;
    Entity_Id gnat_component_decl, gnat_variant_part;
*************** components_to_record (Node_Id gnat_compo
*** 7587,7592 ****
--- 7693,7702 ----
  		  has_self_field = true;
  		else if (has_self_field && DECL_ALIASED_P (gnu_field))
  		  has_aliased_after_self_field = true;
+ 		else if (!DECL_FIELD_OFFSET (gnu_field)
+ 			 && !DECL_PACKED (gnu_field)
+ 			 && !field_has_variable_size (gnu_field))
+ 		  has_non_packed_fixed_size_field = true;
  	      }
  	  }
  
*************** components_to_record (Node_Id gnat_compo
*** 7878,7885 ****
       self-referential/variable offset or misaligned.  Note, in the latter
       case, that this can only happen in packed record types so the alignment
       is effectively capped to the byte for the whole record.  But we don't
!      do it for non-packed record types if pragma Optimize_Alignment (Space)
!      is specified because this can prevent alignment gaps from being filled.
  
       Optionally, if the layout warning is enabled, keep track of the above 4
       different kinds of fields and issue a warning if some of them would be
--- 7988,7996 ----
       self-referential/variable offset or misaligned.  Note, in the latter
       case, that this can only happen in packed record types so the alignment
       is effectively capped to the byte for the whole record.  But we don't
!      do it for packed record types if not all fixed-size fiels can be packed
!      and for non-packed record types if pragma Optimize_Alignment (Space) is
!      specified, because this can prevent alignment gaps from being filled.
  
       Optionally, if the layout warning is enabled, keep track of the above 4
       different kinds of fields and issue a warning if some of them would be
*************** components_to_record (Node_Id gnat_compo
*** 7890,7898 ****
    const bool do_reorder
      = (Convention (gnat_record_type) == Convention_Ada
         && !No_Reordering (gnat_record_type)
!        && (!Optimize_Alignment_Space (gnat_record_type)
! 	   || Is_Packed (gnat_record_type))
!        && !debug__debug_flag_dot_r);
    const bool w_reorder
      = (Convention (gnat_record_type) == Convention_Ada
         && Warn_On_Questionable_Layout
--- 8001,8010 ----
    const bool do_reorder
      = (Convention (gnat_record_type) == Convention_Ada
         && !No_Reordering (gnat_record_type)
!        && !(Is_Packed (gnat_record_type)
! 	    ? has_non_packed_fixed_size_field
! 	    : Optimize_Alignment_Space (gnat_record_type))
!        && !Debug_Flag_Dot_R);
    const bool w_reorder
      = (Convention (gnat_record_type) == Convention_Ada
         && Warn_On_Questionable_Layout
*************** components_to_record (Node_Id gnat_compo
*** 7931,7936 ****
--- 8043,8049 ----
  
        if (DECL_SIZE (gnu_field) && integer_zerop (DECL_SIZE (gnu_field)))
  	{
+ 	  DECL_SIZE_UNIT (gnu_field) = size_zero_node;
  	  DECL_FIELD_OFFSET (gnu_field) = size_zero_node;
  	  SET_DECL_OFFSET_ALIGN (gnu_field, BIGGEST_ALIGNMENT);
  	  DECL_FIELD_BIT_OFFSET (gnu_field) = bitsize_zero_node;
*************** annotate_value (tree gnu_size)
*** 8393,8399 ****
        /* In regular mode, inline back only if symbolic annotation is requested
  	 in order to avoid memory explosion on big discriminated record types.
  	 But not in ASIS mode, as symbolic annotation is required for DDA.  */
!       if (List_Representation_Info == 3 || type_annotate_only)
  	{
  	  tree t = maybe_inline_call_in_expr (gnu_size);
  	  return t ? annotate_value (t) : No_Uint;
--- 8506,8512 ----
        /* In regular mode, inline back only if symbolic annotation is requested
  	 in order to avoid memory explosion on big discriminated record types.
  	 But not in ASIS mode, as symbolic annotation is required for DDA.  */
!       if (List_Representation_Info >= 3 || type_annotate_only)
  	{
  	  tree t = maybe_inline_call_in_expr (gnu_size);
  	  return t ? annotate_value (t) : No_Uint;
*************** build_variant_list (tree qual_union_type
*** 8733,8738 ****
--- 8846,8864 ----
    return gnu_list;
  }
  
+ /* If SIZE has overflowed, return the maximum valid size, which is the upper
+    bound of the signed sizetype in bits; otherwise return SIZE unmodified.  */
+ 
+ static tree
+ maybe_saturate_size (tree size)
+ {
+   if (TREE_CODE (size) == INTEGER_CST && TREE_OVERFLOW (size))
+     size = size_binop (MULT_EXPR,
+ 		       fold_convert (bitsizetype, TYPE_MAX_VALUE (ssizetype)),
+ 		       build_int_cst (bitsizetype, BITS_PER_UNIT));
+   return size;
+ }
+ 
  /* UINT_SIZE is a Uint giving the specified size for an object of GNU_TYPE
     corresponding to GNAT_OBJECT.  If the size is valid, return an INTEGER_CST
     corresponding to its value.  Otherwise, return NULL_TREE.  KIND is set to
*************** build_variant_list (tree qual_union_type
*** 8741,8754 ****
     true if we are being called to process the Component_Size of GNAT_OBJECT;
     this is used only for error messages.  ZERO_OK is true if a size of zero
     is permitted; if ZERO_OK is false, it means that a size of zero should be
!    treated as an unspecified size.  */
  
  static tree
  validate_size (Uint uint_size, tree gnu_type, Entity_Id gnat_object,
! 	       enum tree_code kind, bool component_p, bool zero_ok)
  {
    Node_Id gnat_error_node;
!   tree type_size, size;
  
    /* Return 0 if no size was specified.  */
    if (uint_size == No_Uint)
--- 8867,8881 ----
     true if we are being called to process the Component_Size of GNAT_OBJECT;
     this is used only for error messages.  ZERO_OK is true if a size of zero
     is permitted; if ZERO_OK is false, it means that a size of zero should be
!    treated as an unspecified size.  S1 and S2 are used for error messages.  */
  
  static tree
  validate_size (Uint uint_size, tree gnu_type, Entity_Id gnat_object,
! 	       enum tree_code kind, bool component_p, bool zero_ok,
! 	       const char *s1, const char *s2)
  {
    Node_Id gnat_error_node;
!   tree old_size, size;
  
    /* Return 0 if no size was specified.  */
    if (uint_size == No_Uint)
*************** validate_size (Uint uint_size, tree gnu_
*** 8765,8770 ****
--- 8892,8899 ----
      gnat_error_node = Last_Bit (Component_Clause (gnat_object));
    else if (Present (Size_Clause (gnat_object)))
      gnat_error_node = Expression (Size_Clause (gnat_object));
+   else if (Has_Object_Size_Clause (gnat_object))
+     gnat_error_node = Expression (Object_Size_Clause (gnat_object));
    else
      gnat_error_node = gnat_object;
  
*************** validate_size (Uint uint_size, tree gnu_
*** 8791,8800 ****
        && !integer_zerop (size_binop (TRUNC_MOD_EXPR, size, bitsize_unit_node)))
      {
        if (component_p)
! 	post_error_ne ("component size for& is not a multiple of Storage_Unit",
  		       gnat_error_node, gnat_object);
        else
! 	post_error_ne ("size for& is not a multiple of Storage_Unit",
  		       gnat_error_node, gnat_object);
        return NULL_TREE;
      }
--- 8920,8929 ----
        && !integer_zerop (size_binop (TRUNC_MOD_EXPR, size, bitsize_unit_node)))
      {
        if (component_p)
! 	post_error_ne ("component size for& must be multiple of Storage_Unit",
  		       gnat_error_node, gnat_object);
        else
! 	post_error_ne ("size for& must be multiple of Storage_Unit",
  		       gnat_error_node, gnat_object);
        return NULL_TREE;
      }
*************** validate_size (Uint uint_size, tree gnu_
*** 8813,8829 ****
        && TYPE_CONTAINS_TEMPLATE_P (gnu_type))
      size = size_binop (PLUS_EXPR, DECL_SIZE (TYPE_FIELDS (gnu_type)), size);
  
!   if (kind == VAR_DECL
!       /* If a type needs strict alignment, a component of this type in
! 	 a packed record cannot be packed and thus uses the type size.  */
!       || (kind == TYPE_DECL && Strict_Alignment (gnat_object)))
!     type_size = TYPE_SIZE (gnu_type);
!   else
!     type_size = rm_size (gnu_type);
  
!   /* Modify the size of a discriminated type to be the maximum size.  */
!   if (type_size && CONTAINS_PLACEHOLDER_P (type_size))
!     type_size = max_size (type_size, true);
  
    /* If this is an access type or a fat pointer, the minimum size is that given
       by the smallest integral mode that's valid for pointers.  */
--- 8942,8952 ----
        && TYPE_CONTAINS_TEMPLATE_P (gnu_type))
      size = size_binop (PLUS_EXPR, DECL_SIZE (TYPE_FIELDS (gnu_type)), size);
  
!   old_size = (kind == VAR_DECL ? TYPE_SIZE (gnu_type) : rm_size (gnu_type));
  
!   /* If the old size is self-referential, get the maximum size.  */
!   if (CONTAINS_PLACEHOLDER_P (old_size))
!     old_size = max_size (old_size, true);
  
    /* If this is an access type or a fat pointer, the minimum size is that given
       by the smallest integral mode that's valid for pointers.  */
*************** validate_size (Uint uint_size, tree gnu_
*** 8832,8854 ****
        scalar_int_mode p_mode = NARROWEST_INT_MODE;
        while (!targetm.valid_pointer_mode (p_mode))
  	p_mode = GET_MODE_WIDER_MODE (p_mode).require ();
!       type_size = bitsize_int (GET_MODE_BITSIZE (p_mode));
      }
  
    /* Issue an error either if the default size of the object isn't a constant
       or if the new size is smaller than it.  */
!   if (TREE_CODE (type_size) != INTEGER_CST
!       || TREE_OVERFLOW (type_size)
!       || tree_int_cst_lt (size, type_size))
      {
!       if (component_p)
! 	post_error_ne_tree
! 	  ("component size for& too small{, minimum allowed is ^}",
! 	   gnat_error_node, gnat_object, type_size);
        else
! 	post_error_ne_tree
! 	  ("size for& too small{, minimum allowed is ^}",
! 	   gnat_error_node, gnat_object, type_size);
        return NULL_TREE;
      }
  
--- 8955,8983 ----
        scalar_int_mode p_mode = NARROWEST_INT_MODE;
        while (!targetm.valid_pointer_mode (p_mode))
  	p_mode = GET_MODE_WIDER_MODE (p_mode).require ();
!       old_size = bitsize_int (GET_MODE_BITSIZE (p_mode));
      }
  
    /* Issue an error either if the default size of the object isn't a constant
       or if the new size is smaller than it.  */
!   if (TREE_CODE (old_size) != INTEGER_CST
!       || TREE_OVERFLOW (old_size)
!       || tree_int_cst_lt (size, old_size))
      {
!       char buf[128];
!       const char *s;
! 
!       if (kind == FIELD_DECL)
! 	{
! 	  snprintf (buf, sizeof (buf), s1, s2);
! 	  s = buf;
! 	}
!       else if (component_p)
! 	s = "component size for& too small{, minimum allowed is ^}";
        else
! 	s = "size for& too small{, minimum allowed is ^}";
!       post_error_ne_tree (s, gnat_error_node, gnat_object, old_size);
! 
        return NULL_TREE;
      }
  
*************** intrin_arglists_compatible_p (intrin_bin
*** 9204,9212 ****
        if (!ada_type && !btin_type)
  	break;
  
!       /* If one list is shorter than the other, they fail to match.  */
!       if (!ada_type || !btin_type)
! 	return false;
  
        /* If we're done with the Ada args and not with the internal builtin
  	 args, or the other way around, complain.  */
--- 9333,9341 ----
        if (!ada_type && !btin_type)
  	break;
  
!       /* If the internal builtin uses a variable list, accept anything.  */
!       if (!btin_type)
! 	break;
  
        /* If we're done with the Ada args and not with the internal builtin
  	 args, or the other way around, complain.  */
*************** copy_and_substitute_in_layout (Entity_Id
*** 9716,9722 ****
  	    if (RECORD_OR_UNION_TYPE_P (gnu_field_type)
  		&& !TYPE_FAT_POINTER_P (gnu_field_type)
  		&& tree_fits_uhwi_p (TYPE_SIZE (gnu_field_type)))
! 	      gnu_field_type = make_packable_type (gnu_field_type, true);
  	  }
  
  	else
--- 9845,9851 ----
  	    if (RECORD_OR_UNION_TYPE_P (gnu_field_type)
  		&& !TYPE_FAT_POINTER_P (gnu_field_type)
  		&& tree_fits_uhwi_p (TYPE_SIZE (gnu_field_type)))
! 	      gnu_field_type = make_packable_type (gnu_field_type, true, 0);
  	  }
  
  	else
*************** concat_name (tree gnu_name, const char *
*** 10153,10159 ****
    return get_identifier_with_length (new_name, len);
  }
  
! /* Initialize data structures of the decl.c module.  */
  
  void
  init_gnat_decl (void)
--- 10282,10288 ----
    return get_identifier_with_length (new_name, len);
  }
  
! /* Initialize the data structures of the decl.c module.  */
  
  void
  init_gnat_decl (void)
*************** init_gnat_decl (void)
*** 10165,10171 ****
    dummy_to_subprog_map = hash_table<dummy_type_hasher>::create_ggc (512);
  }
  
! /* Destroy data structures of the decl.c module.  */
  
  void
  destroy_gnat_decl (void)
--- 10294,10300 ----
    dummy_to_subprog_map = hash_table<dummy_type_hasher>::create_ggc (512);
  }
  
! /* Destroy the data structures of the decl.c module.  */
  
  void
  destroy_gnat_decl (void)
diff -Nrcpad gcc-9.3.0/gcc/ada/gcc-interface/gigi.h gcc-10.1.0/gcc/ada/gcc-interface/gigi.h
*** gcc-9.3.0/gcc/ada/gcc-interface/gigi.h	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/gcc-interface/gigi.h	Thu May  7 10:49:59 2020
***************
*** 6,12 ****
   *                                                                          *
   *                              C Header File                               *
   *                                                                          *
!  *          Copyright (C) 1992-2018, Free Software Foundation, Inc.         *
   *                                                                          *
   * GNAT is free software;  you can  redistribute it  and/or modify it under *
   * terms of the  GNU General Public License as published  by the Free Soft- *
--- 6,12 ----
   *                                                                          *
   *                              C Header File                               *
   *                                                                          *
!  *          Copyright (C) 1992-2019, Free Software Foundation, Inc.         *
   *                                                                          *
   * GNAT is free software;  you can  redistribute it  and/or modify it under *
   * terms of the  GNU General Public License as published  by the Free Soft- *
*************** extern tree make_aligning_type (tree typ
*** 126,132 ****
     MAX_ALIGN alignment if the value is non-zero.  If so, return the new
     type; if not, return the original type.  */
  extern tree make_packable_type (tree type, bool in_record,
! 				unsigned int max_align = 0);
  
  /* Given a type TYPE, return a new type whose size is appropriate for SIZE.
     If TYPE is the best type, return it.  Otherwise, make a new type.  We
--- 126,132 ----
     MAX_ALIGN alignment if the value is non-zero.  If so, return the new
     type; if not, return the original type.  */
  extern tree make_packable_type (tree type, bool in_record,
! 				unsigned int max_align);
  
  /* Given a type TYPE, return a new type whose size is appropriate for SIZE.
     If TYPE is the best type, return it.  Otherwise, make a new type.  We
*************** extern tree get_base_type (tree type);
*** 835,843 ****
     in bits.  If we don't know anything about the alignment, return 0.  */
  extern unsigned int known_alignment (tree exp);
  
  /* Return true if VALUE is a multiple of FACTOR. FACTOR must be a power
     of 2.  */
! extern bool value_factor_p (tree value, HOST_WIDE_INT factor);
  
  /* Build an atomic load for the underlying atomic object in SRC.  SYNC is
     true if the load requires synchronization.  */
--- 835,848 ----
     in bits.  If we don't know anything about the alignment, return 0.  */
  extern unsigned int known_alignment (tree exp);
  
+ /* Return true if TYPE, an aggregate type, contains (or is) an array.
+    If SELF_REFERENTIAL is true, then an additional requirement on the
+    array is that it be self-referential.  */
+ extern bool aggregate_type_contains_array_p (tree type, bool self_referential);
+ 
  /* Return true if VALUE is a multiple of FACTOR. FACTOR must be a power
     of 2.  */
! extern bool value_factor_p (tree value, unsigned HOST_WIDE_INT factor);
  
  /* Build an atomic load for the underlying atomic object in SRC.  SYNC is
     true if the load requires synchronization.  */
*************** extern void enumerate_modes (void (*f) (
*** 1054,1059 ****
--- 1059,1070 ----
  }
  #endif
  
+ /* Use gigi_checking_assert to test invariants in code generation mode.
+    It's effective only if the compiler is configured with more checking
+    than the release mode and can be disabled by means of -fchecking.  */
+ #define gigi_checking_assert(EXPR) \
+   gcc_checking_assert ((EXPR) || type_annotate_only)
+ 
  /* If EXP's type is a VECTOR_TYPE, return EXP converted to the associated
     TYPE_REPRESENTATIVE_ARRAY.  */
  
*************** gnat_signed_type_for (tree type_node)
*** 1138,1144 ****
  static inline tree
  maybe_character_type (tree type)
  {
!   if (TYPE_STRING_FLAG (type) && !TYPE_UNSIGNED (type))
      type = gnat_unsigned_type_for (type);
  
    return type;
--- 1149,1157 ----
  static inline tree
  maybe_character_type (tree type)
  {
!   if (TREE_CODE (type) == INTEGER_TYPE
!       && TYPE_STRING_FLAG (type)
!       && !TYPE_UNSIGNED (type))
      type = gnat_unsigned_type_for (type);
  
    return type;
*************** maybe_character_value (tree expr)
*** 1151,1157 ****
  {
    tree type = TREE_TYPE (expr);
  
!   if (TYPE_STRING_FLAG (type) && !TYPE_UNSIGNED (type))
      {
        type = gnat_unsigned_type_for (type);
        expr = convert (type, expr);
--- 1164,1172 ----
  {
    tree type = TREE_TYPE (expr);
  
!   if (TREE_CODE (type) == INTEGER_TYPE
!       && TYPE_STRING_FLAG (type)
!       && !TYPE_UNSIGNED (type))
      {
        type = gnat_unsigned_type_for (type);
        expr = convert (type, expr);
diff -Nrcpad gcc-9.3.0/gcc/ada/gcc-interface/lang.opt gcc-10.1.0/gcc/ada/gcc-interface/lang.opt
*** gcc-9.3.0/gcc/ada/gcc-interface/lang.opt	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/gcc-interface/lang.opt	Thu May  7 10:49:59 2020
*************** Wall
*** 56,61 ****
--- 56,65 ----
  Ada AdaWhy AdaSCIL
  Enable most warning messages.
  
+ fdump-scos
+ Ada RejectNegative Var(flag_dump_scos) Init(0)
+ Dump Source Coverage Obligations.
+ 
  k8
  Driver
  Synonym of -gnatk8.
diff -Nrcpad gcc-9.3.0/gcc/ada/gcc-interface/misc.c gcc-10.1.0/gcc/ada/gcc-interface/misc.c
*** gcc-9.3.0/gcc/ada/gcc-interface/misc.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/gcc-interface/misc.c	Thu May  7 10:49:59 2020
***************
*** 54,62 ****
  #include "ada-tree.h"
  #include "gigi.h"
  
- /* This symbol needs to be defined for the front-end.  */
- void *callgraph_info_file = NULL;
- 
  /* Command-line argc and argv.  These variables are global since they are
     imported in back_end.adb.  */
  unsigned int save_argc;
--- 54,59 ----
*************** gnat_handle_option (size_t scode, const
*** 161,166 ****
--- 158,164 ----
      case OPT_gnatO:
      case OPT_fRTS_:
      case OPT_I:
+     case OPT_fdump_scos:
      case OPT_nostdinc:
      case OPT_nostdlib:
        /* These are handled by the front-end.  */
*************** static bool
*** 255,263 ****
  gnat_post_options (const char **pfilename ATTRIBUTE_UNUSED)
  {
    /* Excess precision other than "fast" requires front-end support.  */
!   if (flag_excess_precision_cmdline == EXCESS_PRECISION_STANDARD)
      sorry ("%<-fexcess-precision=standard%> for Ada");
!   flag_excess_precision_cmdline = EXCESS_PRECISION_FAST;
  
    /* No psABI change warnings for Ada.  */
    warn_psabi = 0;
--- 253,261 ----
  gnat_post_options (const char **pfilename ATTRIBUTE_UNUSED)
  {
    /* Excess precision other than "fast" requires front-end support.  */
!   if (flag_excess_precision == EXCESS_PRECISION_STANDARD)
      sorry ("%<-fexcess-precision=standard%> for Ada");
!   flag_excess_precision = EXCESS_PRECISION_FAST;
  
    /* No psABI change warnings for Ada.  */
    warn_psabi = 0;
*************** gnat_get_type_bias (const_tree gnu_type)
*** 1110,1116 ****
  {
    if (TREE_CODE (gnu_type) == INTEGER_TYPE
        && TYPE_BIASED_REPRESENTATION_P (gnu_type)
!       && gnat_encodings == DWARF_GNAT_ENCODINGS_MINIMAL)
      return TYPE_RM_MIN_VALUE (gnu_type);
  
    return NULL_TREE;
--- 1108,1114 ----
  {
    if (TREE_CODE (gnu_type) == INTEGER_TYPE
        && TYPE_BIASED_REPRESENTATION_P (gnu_type)
!       && gnat_encodings != DWARF_GNAT_ENCODINGS_ALL)
      return TYPE_RM_MIN_VALUE (gnu_type);
  
    return NULL_TREE;
*************** default_pass_by_ref (tree gnu_type)
*** 1135,1141 ****
  			       TYPE_ALIGN (gnu_type)) > 0))
      return true;
  
!   if (pass_by_reference (NULL, TYPE_MODE (gnu_type), gnu_type, true))
      return true;
  
    if (targetm.calls.return_in_memory (gnu_type, NULL_TREE))
--- 1133,1139 ----
  			       TYPE_ALIGN (gnu_type)) > 0))
      return true;
  
!   if (pass_by_reference (NULL, function_arg_info (gnu_type, /*named=*/true)))
      return true;
  
    if (targetm.calls.return_in_memory (gnu_type, NULL_TREE))
diff -Nrcpad gcc-9.3.0/gcc/ada/gcc-interface/trans.c gcc-10.1.0/gcc/ada/gcc-interface/trans.c
*** gcc-9.3.0/gcc/ada/gcc-interface/trans.c	Thu Mar 12 11:07:20 2020
--- gcc-10.1.0/gcc/ada/gcc-interface/trans.c	Thu May  7 10:49:59 2020
*************** bool type_annotate_only;
*** 95,100 ****
--- 95,103 ----
  /* List of N_Validate_Unchecked_Conversion nodes in the unit.  */
  static vec<Node_Id> gnat_validate_uc_list;
  
+ /* List of expressions of pragma Compile_Time_{Error|Warning} in the unit.  */
+ static vec<Node_Id> gnat_compile_time_expr_list;
+ 
  /* When not optimizing, we cache the 'First, 'Last and 'Length attributes
     of unconstrained array IN parameters to avoid emitting a great deal of
     redundant instructions to recompute them each time.  */
*************** static enum gimplify_status gnat_gimplif
*** 231,244 ****
  static void elaborate_all_entities (Node_Id);
  static void process_freeze_entity (Node_Id);
  static void process_decls (List_Id, List_Id, Node_Id, bool, bool);
- static tree emit_range_check (tree, Node_Id, Node_Id);
  static tree emit_check (tree, tree, int, Node_Id);
  static tree build_unary_op_trapv (enum tree_code, tree, tree, Node_Id);
  static tree build_binary_op_trapv (enum tree_code, tree, tree, tree, Node_Id);
! static tree convert_with_check (Entity_Id, tree, bool, bool, bool, Node_Id);
  static bool addressable_p (tree, tree);
  static tree assoc_to_constructor (Entity_Id, Node_Id, tree);
! static tree pos_to_constructor (Node_Id, tree, Entity_Id);
  static void validate_unchecked_conversion (Node_Id);
  static Node_Id adjust_for_implicit_deref (Node_Id);
  static tree maybe_implicit_deref (tree);
--- 234,246 ----
  static void elaborate_all_entities (Node_Id);
  static void process_freeze_entity (Node_Id);
  static void process_decls (List_Id, List_Id, Node_Id, bool, bool);
  static tree emit_check (tree, tree, int, Node_Id);
  static tree build_unary_op_trapv (enum tree_code, tree, tree, Node_Id);
  static tree build_binary_op_trapv (enum tree_code, tree, tree, tree, Node_Id);
! static tree convert_with_check (Entity_Id, tree, bool, bool, Node_Id);
  static bool addressable_p (tree, tree);
  static tree assoc_to_constructor (Entity_Id, Node_Id, tree);
! static tree pos_to_constructor (Node_Id, tree);
  static void validate_unchecked_conversion (Node_Id);
  static Node_Id adjust_for_implicit_deref (Node_Id);
  static tree maybe_implicit_deref (tree);
*************** gigi (Node_Id gnat_root,
*** 493,500 ****
         build_function_type_list (integer_type_node, jmpbuf_ptr_type,
  				 NULL_TREE),
         NULL_TREE, is_default, true, true, true, false, false, NULL, Empty);
!   DECL_BUILT_IN_CLASS (setjmp_decl) = BUILT_IN_NORMAL;
!   DECL_FUNCTION_CODE (setjmp_decl) = BUILT_IN_SETJMP;
  
    /* update_setjmp_buf updates a setjmp buffer from the current stack pointer
       address.  */
--- 495,501 ----
         build_function_type_list (integer_type_node, jmpbuf_ptr_type,
  				 NULL_TREE),
         NULL_TREE, is_default, true, true, true, false, false, NULL, Empty);
!   set_decl_built_in_function (setjmp_decl, BUILT_IN_NORMAL, BUILT_IN_SETJMP);
  
    /* update_setjmp_buf updates a setjmp buffer from the current stack pointer
       address.  */
*************** gigi (Node_Id gnat_root,
*** 503,510 ****
        (get_identifier ("__builtin_update_setjmp_buf"), NULL_TREE,
         build_function_type_list (void_type_node, jmpbuf_ptr_type, NULL_TREE),
         NULL_TREE, is_default, true, true, true, false, false, NULL, Empty);
!   DECL_BUILT_IN_CLASS (update_setjmp_buf_decl) = BUILT_IN_NORMAL;
!   DECL_FUNCTION_CODE (update_setjmp_buf_decl) = BUILT_IN_UPDATE_SETJMP_BUF;
  
    /* Indicate that it never returns.  */
    ftype = build_function_type_list (void_type_node,
--- 504,511 ----
        (get_identifier ("__builtin_update_setjmp_buf"), NULL_TREE,
         build_function_type_list (void_type_node, jmpbuf_ptr_type, NULL_TREE),
         NULL_TREE, is_default, true, true, true, false, false, NULL, Empty);
!   set_decl_built_in_function (update_setjmp_buf_decl, BUILT_IN_NORMAL,
! 			      BUILT_IN_UPDATE_SETJMP_BUF);
  
    /* Indicate that it never returns.  */
    ftype = build_function_type_list (void_type_node,
*************** gigi (Node_Id gnat_root,
*** 524,545 ****
         NULL_TREE, is_default, true, true, true, false, false, NULL, Empty);
  
    /* Hooks to call when entering/leaving an exception handler.  */
!   ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
! 
    begin_handler_decl
!     = create_subprog_decl (get_identifier ("__gnat_begin_handler"), NULL_TREE,
! 			   ftype, NULL_TREE,
  			   is_default, true, true, true, false, false, NULL,
  			   Empty);
!   /* __gnat_begin_handler is a dummy procedure.  */
    TREE_NOTHROW (begin_handler_decl) = 1;
  
    end_handler_decl
!     = create_subprog_decl (get_identifier ("__gnat_end_handler"), NULL_TREE,
  			   ftype, NULL_TREE,
  			   is_default, true, true, true, false, false, NULL,
  			   Empty);
  
    unhandled_except_decl
      = create_subprog_decl (get_identifier ("__gnat_unhandled_except_handler"),
  			   NULL_TREE, ftype, NULL_TREE,
--- 525,551 ----
         NULL_TREE, is_default, true, true, true, false, false, NULL, Empty);
  
    /* Hooks to call when entering/leaving an exception handler.  */
!   ftype = build_function_type_list (ptr_type_node,
! 				    ptr_type_node, NULL_TREE);
    begin_handler_decl
!     = create_subprog_decl (get_identifier ("__gnat_begin_handler_v1"),
! 			   NULL_TREE, ftype, NULL_TREE,
  			   is_default, true, true, true, false, false, NULL,
  			   Empty);
!   /* __gnat_begin_handler_v1 is not a dummy procedure, but we arrange
!      for it not to throw.  */
    TREE_NOTHROW (begin_handler_decl) = 1;
  
+   ftype = build_function_type_list (ptr_type_node,
+ 				    ptr_type_node, ptr_type_node,
+ 				    ptr_type_node, NULL_TREE);
    end_handler_decl
!     = create_subprog_decl (get_identifier ("__gnat_end_handler_v1"), NULL_TREE,
  			   ftype, NULL_TREE,
  			   is_default, true, true, true, false, false, NULL,
  			   Empty);
  
+   ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
    unhandled_except_decl
      = create_subprog_decl (get_identifier ("__gnat_unhandled_except_handler"),
  			   NULL_TREE, ftype, NULL_TREE,
*************** lvalue_required_p (Node_Id gnat_node, tr
*** 870,881 ****
        if (Prefix (gnat_parent) != gnat_node)
  	return 0;
  
!       return lvalue_required_p (gnat_parent, gnu_type, constant,
! 				address_of_constant);
  
      case N_Selected_Component:
!       return lvalue_required_p (gnat_parent, gnu_type, constant,
! 				address_of_constant);
  
      case N_Object_Renaming_Declaration:
        /* We need to preserve addresses through a renaming.  */
--- 876,889 ----
        if (Prefix (gnat_parent) != gnat_node)
  	return 0;
  
!       return lvalue_required_p (gnat_parent,
! 				get_unpadded_type (Etype (gnat_parent)),
! 				constant, address_of_constant);
  
      case N_Selected_Component:
!       return lvalue_required_p (gnat_parent,
! 				get_unpadded_type (Etype (gnat_parent)),
! 				constant, address_of_constant);
  
      case N_Object_Renaming_Declaration:
        /* We need to preserve addresses through a renaming.  */
*************** static tree
*** 1503,1519 ****
  Pragma_to_gnu (Node_Id gnat_node)
  {
    tree gnu_result = alloc_stmt_list ();
-   unsigned char pragma_id;
    Node_Id gnat_temp;
  
!   /* Do nothing if we are just annotating types and check for (and ignore)
!      unrecognized pragmas.  */
!   if (type_annotate_only
!       || !Is_Pragma_Name (Chars (Pragma_Identifier (gnat_node))))
      return gnu_result;
  
!   pragma_id = Get_Pragma_Id (Chars (Pragma_Identifier (gnat_node)));
!   switch (pragma_id)
      {
      case Pragma_Inspection_Point:
        /* Do nothing at top level: all such variables are already viewable.  */
--- 1511,1538 ----
  Pragma_to_gnu (Node_Id gnat_node)
  {
    tree gnu_result = alloc_stmt_list ();
    Node_Id gnat_temp;
  
!   /* Check for (and ignore) unrecognized pragmas.  */
!   if (!Is_Pragma_Name (Chars (Pragma_Identifier (gnat_node))))
      return gnu_result;
  
!   const unsigned char id
!     = Get_Pragma_Id (Chars (Pragma_Identifier (gnat_node)));
! 
!   /* Save the expression of pragma Compile_Time_{Error|Warning} for later.  */
!   if (id == Pragma_Compile_Time_Error || id == Pragma_Compile_Time_Warning)
!     {
!       gnat_temp = First (Pragma_Argument_Associations (gnat_node));
!       gnat_compile_time_expr_list.safe_push (Expression (gnat_temp));
!       return gnu_result;
!     }
! 
!   /* Stop there if we are just annotating types.  */
!   if (type_annotate_only)
!     return gnu_result;
! 
!   switch (id)
      {
      case Pragma_Inspection_Point:
        /* Do nothing at top level: all such variables are already viewable.  */
*************** Pragma_to_gnu (Node_Id gnat_node)
*** 1665,1675 ****
  	  break;
  
  	tree gnu_clauses = gnu_loop_stack->last ()->omp_construct_clauses;
! 	if (pragma_id == Pragma_Acc_Data)
  	  gnu_loop_stack->last ()->omp_code = OACC_DATA;
! 	else if (pragma_id == Pragma_Acc_Kernels)
  	  gnu_loop_stack->last ()->omp_code = OACC_KERNELS;
! 	else if (pragma_id == Pragma_Acc_Parallel)
  	  gnu_loop_stack->last ()->omp_code = OACC_PARALLEL;
  	else
  	  gcc_unreachable ();
--- 1684,1694 ----
  	  break;
  
  	tree gnu_clauses = gnu_loop_stack->last ()->omp_construct_clauses;
! 	if (id == Pragma_Acc_Data)
  	  gnu_loop_stack->last ()->omp_code = OACC_DATA;
! 	else if (id == Pragma_Acc_Kernels)
  	  gnu_loop_stack->last ()->omp_code = OACC_KERNELS;
! 	else if (id == Pragma_Acc_Parallel)
  	  gnu_loop_stack->last ()->omp_code = OACC_PARALLEL;
  	else
  	  gcc_unreachable ();
*************** Pragma_to_gnu (Node_Id gnat_node)
*** 1909,1915 ****
  	/* This is the String form: pragma Warning{s|_As_Error}(String).  */
  	if (Nkind (Expression (gnat_temp)) == N_String_Literal)
  	  {
! 	    switch (pragma_id)
  	      {
  	      case Pragma_Warning_As_Error:
  		kind = DK_ERROR;
--- 1928,1934 ----
  	/* This is the String form: pragma Warning{s|_As_Error}(String).  */
  	if (Nkind (Expression (gnat_temp)) == N_String_Literal)
  	  {
! 	    switch (id)
  	      {
  	      case Pragma_Warning_As_Error:
  		kind = DK_ERROR;
*************** Pragma_to_gnu (Node_Id gnat_node)
*** 1956,1962 ****
  	        gnat_expr = Expression (Next (gnat_temp));
  	      }
  	    else
! 	      gnat_expr = Empty;
  
  	    imply = false;
  	  }
--- 1975,1995 ----
  	        gnat_expr = Expression (Next (gnat_temp));
  	      }
  	    else
! 	      {
! 		gnat_expr = Empty;
! 
! 		/* For pragma Warnings (Off), we save the current state...  */
! 		if (kind == DK_IGNORED)
! 		  diagnostic_push_diagnostics (global_dc, location);
! 
! 		/* ...so that, for pragma Warnings (On), we do not enable all
! 		   the warnings but just restore the previous state.  */
! 		else
! 		  {
! 		    diagnostic_pop_diagnostics (global_dc, location);
! 		    break;
! 		  }
! 	      }
  
  	    imply = false;
  	  }
*************** check_inlining_for_nested_subprog (tree
*** 2040,2051 ****
  
        if (lookup_attribute ("always_inline", DECL_ATTRIBUTES (parent_decl)))
  	{
! 	  error_at (loc1, "subprogram %q+F not marked Inline_Always", fndecl);
  	  error_at (loc2, "parent subprogram cannot be inlined");
  	}
        else
  	{
! 	  warning_at (loc1, OPT_Winline, "subprogram %q+F not marked Inline",
  		      fndecl);
  	  warning_at (loc2, OPT_Winline, "parent subprogram cannot be inlined");
  	}
--- 2073,2085 ----
  
        if (lookup_attribute ("always_inline", DECL_ATTRIBUTES (parent_decl)))
  	{
! 	  error_at (loc1, "subprogram %q+F not marked %<Inline_Always%>",
! 		    fndecl);
  	  error_at (loc2, "parent subprogram cannot be inlined");
  	}
        else
  	{
! 	  warning_at (loc1, OPT_Winline, "subprogram %q+F not marked %<Inline%>",
  		      fndecl);
  	  warning_at (loc2, OPT_Winline, "parent subprogram cannot be inlined");
  	}
*************** Attribute_to_gnu (Node_Id gnat_node, tre
*** 2344,2349 ****
--- 2378,2386 ----
  	    gnu_type = TREE_TYPE (DECL_CHAIN (TYPE_FIELDS (gnu_type)));
  	}
  
+       /* The type must be frozen at this point.  */
+       gcc_assert (COMPLETE_TYPE_P (gnu_type));
+ 
        /* If we're looking for the size of a field, return the field size.  */
        if (TREE_CODE (gnu_prefix) == COMPONENT_REF)
  	gnu_result = DECL_SIZE (TREE_OPERAND (gnu_prefix, 1));
*************** independent_iterations_p (tree stmt_list
*** 3309,3315 ****
  {
    tree_stmt_iterator tsi;
    bitmap params = BITMAP_GGC_ALLOC();
!   auto_vec<tree> rhs;
    tree iter;
    int i;
  
--- 3346,3352 ----
  {
    tree_stmt_iterator tsi;
    bitmap params = BITMAP_GGC_ALLOC();
!   auto_vec<tree, 16> rhs;
    tree iter;
    int i;
  
*************** independent_iterations_p (tree stmt_list
*** 3390,3398 ****
  static tree
  Acc_Loop_to_gnu (Node_Id gnat_loop)
  {
-   const struct loop_info_d * const gnu_loop_info = gnu_loop_stack->last ();
-   tree gnu_loop_stmt = gnu_loop_info->stmt;
- 
    tree acc_loop = make_node (OACC_LOOP);
    tree acc_bind_expr = NULL_TREE;
    Node_Id cur_loop = gnat_loop;
--- 3427,3432 ----
*************** Acc_Loop_to_gnu (Node_Id gnat_loop)
*** 3509,3515 ****
  
    BIND_EXPR_BODY (acc_bind_expr) = acc_loop;
  
!   return gnu_loop_stmt;
  }
  
  /* Helper for Loop_Statement_to_gnu, to translate the body of a loop not
--- 3543,3549 ----
  
    BIND_EXPR_BODY (acc_bind_expr) = acc_loop;
  
!   return acc_bind_expr;
  }
  
  /* Helper for Loop_Statement_to_gnu, to translate the body of a loop not
*************** Regular_Loop_to_gnu (Node_Id gnat_node,
*** 3633,3639 ****
  
  	 which works in all cases.  */
  
!       if (optimize)
  	{
  	  /* We can use the do-while form directly if GNU_FIRST-1 doesn't
  	     overflow.  */
--- 3667,3673 ----
  
  	 which works in all cases.  */
  
!       if (optimize && !optimize_debug)
  	{
  	  /* We can use the do-while form directly if GNU_FIRST-1 doesn't
  	     overflow.  */
*************** Loop_Statement_to_gnu (Node_Id gnat_node
*** 3956,3962 ****
    return gnu_result;
  }
  
! /* This page implements a form of Named Return Value optimization modelled
     on the C++ optimization of the same name.  The main difference is that
     we disregard any semantical considerations when applying it here, the
     counterpart being that we don't try to apply it to semantically loaded
--- 3990,3996 ----
    return gnu_result;
  }
  
! /* This page implements a form of Named Return Value optimization modeled
     on the C++ optimization of the same name.  The main difference is that
     we disregard any semantical considerations when applying it here, the
     counterpart being that we don't try to apply it to semantically loaded
*************** build_return_expr (tree ret_obj, tree re
*** 4416,4421 ****
--- 4450,4456 ----
  	 a candidate for Named Return Value.  If so, record it.  Otherwise,
  	 if this is an expression of some kind, record it elsewhere.  */
        if (optimize
+ 	  && !optimize_debug
  	  && AGGREGATE_TYPE_P (operation_type)
  	  && !TYPE_IS_FAT_POINTER_P (operation_type)
  	  && TYPE_MODE (operation_type) == BLKmode
*************** Subprogram_Body_to_gnu (Node_Id gnat_nod
*** 4753,4759 ****
  
    /* If the function returns an aggregate type and we have candidates for
       a Named Return Value, finalize the optimization.  */
!   if (optimize && gnu_subprog_language->named_ret_val)
      {
        finalize_nrv (gnu_subprog_decl,
  		    gnu_subprog_language->named_ret_val,
--- 4788,4794 ----
  
    /* If the function returns an aggregate type and we have candidates for
       a Named Return Value, finalize the optimization.  */
!   if (optimize && !optimize_debug && gnu_subprog_language->named_ret_val)
      {
        finalize_nrv (gnu_subprog_decl,
  		    gnu_subprog_language->named_ret_val,
*************** Subprogram_Body_to_gnu (Node_Id gnat_nod
*** 4771,4777 ****
      rest_of_subprog_body_compilation (gnu_subprog_decl);
  }
  
! /* Return true if GNAT_NODE references an Atomic entity.  */
  
  static bool
  node_is_atomic (Node_Id gnat_node)
--- 4806,4818 ----
      rest_of_subprog_body_compilation (gnu_subprog_decl);
  }
  
! /* The type of an atomic access.  */
! 
! typedef enum { NOT_ATOMIC, SIMPLE_ATOMIC, OUTER_ATOMIC } atomic_acces_t;
! 
! /* Return true if GNAT_NODE references an Atomic entity.  This is modeled on
!    the Is_Atomic_Object predicate of the front-end, but additionally handles
!    explicit dereferences.  */
  
  static bool
  node_is_atomic (Node_Id gnat_node)
*************** node_is_atomic (Node_Id gnat_node)
*** 4788,4804 ****
        return Is_Atomic (gnat_entity) || Is_Atomic (Etype (gnat_entity));
  
      case N_Selected_Component:
!       gnat_entity = Entity (Selector_Name (gnat_node));
!       return Is_Atomic (gnat_entity) || Is_Atomic (Etype (gnat_entity));
  
      case N_Indexed_Component:
!       if (Has_Atomic_Components (Etype (Prefix (gnat_node))))
! 	return true;
!       if (Is_Entity_Name (Prefix (gnat_node))
! 	  && Has_Atomic_Components (Entity (Prefix (gnat_node))))
! 	return true;
! 
!       /* ... fall through ... */
  
      case N_Explicit_Dereference:
        return Is_Atomic (Etype (gnat_node));
--- 4829,4842 ----
        return Is_Atomic (gnat_entity) || Is_Atomic (Etype (gnat_entity));
  
      case N_Selected_Component:
!       return Is_Atomic (Etype (gnat_node))
! 	     || Is_Atomic (Entity (Selector_Name (gnat_node)));
  
      case N_Indexed_Component:
!       return Is_Atomic (Etype (gnat_node))
! 	     || Has_Atomic_Components (Etype (Prefix (gnat_node)))
! 	     || (Is_Entity_Name (Prefix (gnat_node))
! 		 && Has_Atomic_Components (Entity (Prefix (gnat_node))));
  
      case N_Explicit_Dereference:
        return Is_Atomic (Etype (gnat_node));
*************** node_is_atomic (Node_Id gnat_node)
*** 4810,4819 ****
    return false;
  }
  
! /* Return true if GNAT_NODE references a Volatile_Full_Access entity.  */
  
  static bool
! node_has_volatile_full_access (Node_Id gnat_node)
  {
    Entity_Id gnat_entity;
  
--- 4848,4859 ----
    return false;
  }
  
! /* Return true if GNAT_NODE references a Volatile_Full_Access entity.  This is
!    modeled on the Is_Volatile_Full_Access_Object predicate of the front-end,
!    but additionally handles explicit dereferences.  */
  
  static bool
! node_is_volatile_full_access (Node_Id gnat_node)
  {
    Entity_Id gnat_entity;
  
*************** node_has_volatile_full_access (Node_Id g
*** 4828,4836 ****
  	     || Is_Volatile_Full_Access (Etype (gnat_entity));
  
      case N_Selected_Component:
!       gnat_entity = Entity (Selector_Name (gnat_node));
!       return Is_Volatile_Full_Access (gnat_entity)
! 	     || Is_Volatile_Full_Access (Etype (gnat_entity));
  
      case N_Indexed_Component:
      case N_Explicit_Dereference:
--- 4868,4875 ----
  	     || Is_Volatile_Full_Access (Etype (gnat_entity));
  
      case N_Selected_Component:
!       return Is_Volatile_Full_Access (Etype (gnat_node))
! 	     || Is_Volatile_Full_Access (Entity (Selector_Name (gnat_node)));
  
      case N_Indexed_Component:
      case N_Explicit_Dereference:
*************** node_has_volatile_full_access (Node_Id g
*** 4843,4915 ****
    return false;
  }
  
! /* Strip any type conversion on GNAT_NODE and return the result.  */
  
! static Node_Id
! gnat_strip_type_conversion (Node_Id gnat_node)
  {
!   Node_Kind kind = Nkind (gnat_node);
! 
!   if (kind == N_Type_Conversion || kind == N_Unchecked_Type_Conversion)
!     gnat_node = Expression (gnat_node);
! 
!   return gnat_node;
  }
  
! /* Return true if GNAT_NODE requires outer atomic access, i.e. atomic access
!    of an object of which GNAT_NODE is a component.  */
! 
! static bool
! outer_atomic_access_required_p (Node_Id gnat_node)
! {
!   gnat_node = gnat_strip_type_conversion (gnat_node);
! 
!   while (true)
!     {
!       switch (Nkind (gnat_node))
! 	{
! 	case N_Identifier:
! 	case N_Expanded_Name:
! 	  if (No (Renamed_Object (Entity (gnat_node))))
! 	    return false;
! 	  gnat_node
! 	    = gnat_strip_type_conversion (Renamed_Object (Entity (gnat_node)));
! 	  break;
! 
! 	case N_Indexed_Component:
! 	case N_Selected_Component:
! 	case N_Slice:
! 	  gnat_node = gnat_strip_type_conversion (Prefix (gnat_node));
! 	  if (node_has_volatile_full_access (gnat_node))
! 	    return true;
! 	  break;
  
! 	default:
! 	  return false;
! 	}
!     }
  
!   gcc_unreachable ();
! }
  
! /* Return true if GNAT_NODE requires atomic access and set SYNC according to
!    the associated synchronization setting.  */
  
! static bool
! atomic_access_required_p (Node_Id gnat_node, bool *sync)
  {
!   const Node_Id gnat_parent = Parent (gnat_node);
    unsigned char attr_id;
-   bool as_a_whole = true;
  
!   /* First, scan the parent to find out cases where the flag is irrelevant.  */
    switch (Nkind (gnat_parent))
      {
      case N_Attribute_Reference:
        attr_id = Get_Attribute_Id (Attribute_Name (gnat_parent));
        /* Do not mess up machine code insertions.  */
        if (attr_id == Attr_Asm_Input || attr_id == Attr_Asm_Output)
! 	return false;
  
        /* Nothing to do if we are the prefix of an attribute, since we do not
  	 want an atomic access for things like 'Size.  */
--- 4882,4923 ----
    return false;
  }
  
! /* Return true if GNAT_NODE references a component of a larger object.  */
  
! static inline bool
! node_is_component (Node_Id gnat_node)
  {
!   const Node_Kind k = Nkind (gnat_node);
!   return
!     (k == N_Indexed_Component || k == N_Selected_Component || k == N_Slice);
  }
  
! /* Compute whether GNAT_NODE requires atomic access and set TYPE to the type
!    of access and SYNC according to the associated synchronization setting.
  
!    We implement 3 different semantics of atomicity in this function:
  
!      1. the Ada 95/2005/2012 semantics of the Atomic aspect/pragma,
!      2. the Ada 2020 semantics of the Atomic aspect/pragma,
!      3. the semantics of the Volatile_Full_Access GNAT aspect/pragma.
  
!   They are mutually exclusive and the FE should have rejected conflicts.  */
  
! static void
! get_atomic_access (Node_Id gnat_node, atomic_acces_t *type, bool *sync)
  {
!   Node_Id gnat_parent, gnat_temp;
    unsigned char attr_id;
  
!   /* First, scan the parent to filter out irrelevant cases.  */
!   gnat_parent = Parent (gnat_node);
    switch (Nkind (gnat_parent))
      {
      case N_Attribute_Reference:
        attr_id = Get_Attribute_Id (Attribute_Name (gnat_parent));
        /* Do not mess up machine code insertions.  */
        if (attr_id == Attr_Asm_Input || attr_id == Attr_Asm_Output)
! 	goto not_atomic;
  
        /* Nothing to do if we are the prefix of an attribute, since we do not
  	 want an atomic access for things like 'Size.  */
*************** atomic_access_required_p (Node_Id gnat_n
*** 4919,4963 ****
      case N_Reference:
        /* The N_Reference node is like an attribute.  */
        if (Prefix (gnat_parent) == gnat_node)
! 	return false;
!       break;
! 
!     case N_Indexed_Component:
!     case N_Selected_Component:
!     case N_Slice:
!       /* If we are the prefix, then the access is only partial.  */
!       if (Prefix (gnat_parent) == gnat_node)
! 	as_a_whole = false;
        break;
  
      case N_Object_Renaming_Declaration:
        /* Nothing to do for the identifier in an object renaming declaration,
           the renaming itself does not need atomic access.  */
!       return false;
  
      default:
        break;
      }
  
!   /* Then, scan the node to find the atomic object.  */
!   gnat_node = gnat_strip_type_conversion (gnat_node);
  
!   /* For Atomic itself, only reads and updates of the object as a whole require
!      atomic access (RM C.6 (15)).  But for Volatile_Full_Access, all reads and
!      updates require atomic access.  */
!   if (!(as_a_whole && node_is_atomic (gnat_node))
!       && !node_has_volatile_full_access (gnat_node))
!     return false;
  
!   /* If an outer atomic access will also be required, it cancels this one.  */
!   if (outer_atomic_access_required_p (gnat_node))
!     return false;
  
!   *sync = Atomic_Sync_Required (gnat_node);
  
!   return true;
  }
  
  /* Create a temporary variable with PREFIX and TYPE, and return it.  */
  
  static tree
--- 4927,5012 ----
      case N_Reference:
        /* The N_Reference node is like an attribute.  */
        if (Prefix (gnat_parent) == gnat_node)
! 	goto not_atomic;
        break;
  
      case N_Object_Renaming_Declaration:
        /* Nothing to do for the identifier in an object renaming declaration,
           the renaming itself does not need atomic access.  */
!       goto not_atomic;
  
      default:
        break;
      }
  
!   /* Now strip any type conversion from GNAT_NODE.  */
!   if (Nkind (gnat_node) == N_Type_Conversion
!       || Nkind (gnat_node) == N_Unchecked_Type_Conversion)
!     gnat_node = Expression (gnat_node);
  
!   /* Up to Ada 2012, for Atomic itself, only reads and updates of the object as
!      a whole require atomic access (RM C.6(15)).  But, starting with Ada 2020,
!      reads of or writes to a nonatomic subcomponent of the object also require
!      atomic access (RM C.6(19)).  */
!   if (node_is_atomic (gnat_node))
!     {
!       bool as_a_whole = true;
  
!       /* If we are the prefix of the parent, then the access is partial.  */
!       for (gnat_temp = gnat_node, gnat_parent = Parent (gnat_temp);
! 	   node_is_component (gnat_parent) && Prefix (gnat_parent) == gnat_temp;
! 	   gnat_temp = gnat_parent, gnat_parent = Parent (gnat_temp))
! 	if (Ada_Version < Ada_2020 || node_is_atomic (gnat_parent))
! 	  goto not_atomic;
! 	else
! 	  as_a_whole = false;
  
!       /* We consider that partial accesses are not sequential actions and,
! 	 therefore, do not require synchronization.  */
!       *type = SIMPLE_ATOMIC;
!       *sync = as_a_whole ? Atomic_Sync_Required (gnat_node) : false;
!       return;
!     }
  
!   /* Look for an outer atomic access of a nonatomic subcomponent.  Note that,
!      for VFA, we do this before looking at the node itself because we need to
!      access the outermost VFA object atomically, unlike for Atomic where it is
!      the innermost atomic object (RM C.6(19)).  */
!   for (gnat_temp = gnat_node;
!        node_is_component (gnat_temp);
!        gnat_temp = Prefix (gnat_temp))
!     if ((Ada_Version >= Ada_2020 && node_is_atomic (Prefix (gnat_temp)))
! 	|| node_is_volatile_full_access (Prefix (gnat_temp)))
!       {
! 	*type = OUTER_ATOMIC;
! 	*sync = false;
! 	return;
!       }
! 
!   /* Unlike Atomic, accessing a VFA object always requires atomic access.  */
!   if (node_is_volatile_full_access (gnat_node))
!     {
!       *type = SIMPLE_ATOMIC;
!       *sync = false;
!       return;
!     }
! 
! not_atomic:
!   *type = NOT_ATOMIC;
!   *sync = false;
  }
  
+ /* Return true if GNAT_NODE requires simple atomic access and, if so, set SYNC
+    according to the associated synchronization setting.  */
+ 
+ static inline bool
+ simple_atomic_access_required_p (Node_Id gnat_node, bool *sync)
+ {
+   atomic_acces_t type;
+   get_atomic_access (gnat_node, &type, sync);
+   return type == SIMPLE_ATOMIC;
+ }
+ 
  /* Create a temporary variable with PREFIX and TYPE, and return it.  */
  
  static tree
*************** create_init_temporary (const char *prefi
*** 4987,5034 ****
    return gnu_temp;
  }
  
- /* Return whether ACTUAL parameter corresponding to FORMAL_TYPE must be passed
-    by copy in a call as per RM C.6(19).  Note that we use the same predicates
-    as in the front-end for RM C.6(12) because it's purely a legality issue.  */
- 
- static bool
- atomic_or_volatile_copy_required_p (Node_Id actual, Entity_Id formal_type)
- {
-   /* We should not have a scalar type here because such a type is passed
-      by copy.  But the Interlocked routines in System.Aux_DEC force some
-      of the their scalar parameters to be passed by reference so we need
-      to preserve that if we do not want to break the interface.  */
-   if (Is_Scalar_Type (formal_type))
-     return false;
- 
-   if (Is_Atomic_Object (actual) && !Is_Atomic (formal_type))
-     {
-       post_error ("?atomic actual passed by copy (RM C.6(19))", actual);
-       return true;
-     }
- 
-   if (Is_Volatile_Object (actual) && !Is_Volatile (formal_type))
-     {
-       post_error ("?volatile actual passed by copy (RM C.6(19))", actual);
-       return true;
-     }
- 
-   return false;
- }
- 
  /* Subroutine of gnat_to_gnu to translate gnat_node, either an N_Function_Call
     or an N_Procedure_Call_Statement, to a GCC tree, which is returned.
     GNU_RESULT_TYPE_P is a pointer to where we should place the result type.
     If GNU_TARGET is non-null, this must be a function call on the RHS of a
     N_Assignment_Statement and the result is to be placed into that object.
!    If OUTER_ATOMIC_ACCESS is true, then the assignment to GNU_TARGET must be a
!    load-modify-store sequence.  Otherwise, if ATOMIC_ACCESS is true, then the
!    assignment to GNU_TARGET must be atomic.  If, in addition, ATOMIC_SYNC is
!    true, then the assignment to GNU_TARGET requires atomic synchronization.  */
  
  static tree
  Call_to_gnu (Node_Id gnat_node, tree *gnu_result_type_p, tree gnu_target,
! 	     bool outer_atomic_access, bool atomic_access, bool atomic_sync)
  {
    const bool function_call = (Nkind (gnat_node) == N_Function_Call);
    const bool returning_value = (function_call && !gnu_target);
--- 5036,5053 ----
    return gnu_temp;
  }
  
  /* Subroutine of gnat_to_gnu to translate gnat_node, either an N_Function_Call
     or an N_Procedure_Call_Statement, to a GCC tree, which is returned.
     GNU_RESULT_TYPE_P is a pointer to where we should place the result type.
     If GNU_TARGET is non-null, this must be a function call on the RHS of a
     N_Assignment_Statement and the result is to be placed into that object.
!    ATOMIC_ACCESS is the type of atomic access to be used for the assignment
!    to GNU_TARGET.  If, in addition, ATOMIC_SYNC is true, then the assignment
!    to GNU_TARGET requires atomic synchronization.  */
  
  static tree
  Call_to_gnu (Node_Id gnat_node, tree *gnu_result_type_p, tree gnu_target,
! 	     atomic_acces_t atomic_access, bool atomic_sync)
  {
    const bool function_call = (Nkind (gnat_node) == N_Function_Call);
    const bool returning_value = (function_call && !gnu_target);
*************** Call_to_gnu (Node_Id gnat_node, tree *gn
*** 5041,5048 ****
    tree gnu_subprog_type = TREE_TYPE (gnu_subprog);
    /* The return type of the FUNCTION_TYPE.  */
    tree gnu_result_type = TREE_TYPE (gnu_subprog_type);
!   tree gnu_subprog_addr = build_unary_op (ADDR_EXPR, NULL_TREE, gnu_subprog);
!   vec<tree, va_gc> *gnu_actual_vec = NULL;
    tree gnu_name_list = NULL_TREE;
    tree gnu_stmt_list = NULL_TREE;
    tree gnu_after_list = NULL_TREE;
--- 5060,5069 ----
    tree gnu_subprog_type = TREE_TYPE (gnu_subprog);
    /* The return type of the FUNCTION_TYPE.  */
    tree gnu_result_type = TREE_TYPE (gnu_subprog_type);
!   const bool frontend_builtin
!     = (TREE_CODE (gnu_subprog) == FUNCTION_DECL
!        && DECL_BUILT_IN_CLASS (gnu_subprog) == BUILT_IN_FRONTEND);
!   auto_vec<tree, 16> gnu_actual_vec;
    tree gnu_name_list = NULL_TREE;
    tree gnu_stmt_list = NULL_TREE;
    tree gnu_after_list = NULL_TREE;
*************** Call_to_gnu (Node_Id gnat_node, tree *gn
*** 5053,5059 ****
    bool pushed_binding_level = false;
    Entity_Id gnat_formal;
    Node_Id gnat_actual;
!   bool sync;
  
    gcc_assert (FUNC_OR_METHOD_TYPE_P (gnu_subprog_type));
  
--- 5074,5081 ----
    bool pushed_binding_level = false;
    Entity_Id gnat_formal;
    Node_Id gnat_actual;
!   atomic_acces_t aa_type;
!   bool aa_sync;
  
    gcc_assert (FUNC_OR_METHOD_TYPE_P (gnu_subprog_type));
  
*************** Call_to_gnu (Node_Id gnat_node, tree *gn
*** 5231,5276 ****
  	      = build_compound_expr (TREE_TYPE (gnu_name), init, gnu_name);
  	}
  
!       /* If we are passing a non-addressable actual parameter by reference,
! 	 pass the address of a copy and, in the In Out or Out case, set up
! 	 to copy back after the call.  We also need to do that if the actual
! 	 parameter is atomic or volatile but the formal parameter is not.  */
        if (is_by_ref_formal_parm
  	  && (gnu_name_type = gnat_to_gnu_type (Etype (gnat_name)))
! 	  && (!addressable_p (gnu_name, gnu_name_type)
! 	      || (Comes_From_Source (gnat_node)
! 		  && atomic_or_volatile_copy_required_p (gnat_actual,
! 							 gnat_formal_type))))
  	{
- 	  const bool atomic_p = atomic_access_required_p (gnat_actual, &sync);
  	  tree gnu_orig = gnu_name, gnu_temp, gnu_stmt;
  
  	  /* Do not issue warnings for CONSTRUCTORs since this is not a copy
  	     but sort of an instantiation for them.  */
! 	  if (TREE_CODE (gnu_name) == CONSTRUCTOR)
  	    ;
  
! 	  /* If the type is passed by reference, a copy is not allowed.  */
! 	  else if (TYPE_IS_BY_REFERENCE_P (gnu_formal_type))
  	    post_error ("misaligned actual cannot be passed by reference",
  		        gnat_actual);
  
! 	  /* For users of Starlet we issue a warning because the interface
! 	     apparently assumes that by-ref parameters outlive the procedure
! 	     invocation.  The code still will not work as intended, but we
! 	     cannot do much better since low-level parts of the back-end
! 	     would allocate temporaries at will because of the misalignment
! 	     if we did not do so here.  */
! 	  else if (Is_Valued_Procedure (Entity (Name (gnat_node))))
! 	    {
! 	      post_error
! 		("?possible violation of implicit assumption", gnat_actual);
! 	      post_error_ne
! 		("?made by pragma Import_Valued_Procedure on &", gnat_actual,
! 		 Entity (Name (gnat_node)));
! 	      post_error_ne ("?because of misalignment of &", gnat_actual,
! 			     gnat_formal);
! 	    }
  
  	  /* If the actual type of the object is already the nominal type,
  	     we have nothing to do, except if the size is self-referential
--- 5253,5283 ----
  	      = build_compound_expr (TREE_TYPE (gnu_name), init, gnu_name);
  	}
  
!       /* If we are passing a non-addressable parameter by reference, pass the
! 	 address of a copy.  In the In Out or Out case, set up to copy back
! 	 out after the call.  */
        if (is_by_ref_formal_parm
  	  && (gnu_name_type = gnat_to_gnu_type (Etype (gnat_name)))
! 	  && !addressable_p (gnu_name, gnu_name_type))
  	{
  	  tree gnu_orig = gnu_name, gnu_temp, gnu_stmt;
  
  	  /* Do not issue warnings for CONSTRUCTORs since this is not a copy
  	     but sort of an instantiation for them.  */
! 	  if (TREE_CODE (remove_conversions (gnu_name, true)) == CONSTRUCTOR)
  	    ;
  
! 	  /* If the formal is passed by reference, a copy is not allowed.  */
! 	  else if (TYPE_IS_BY_REFERENCE_P (gnu_formal_type)
! 		   || Is_Aliased (gnat_formal))
  	    post_error ("misaligned actual cannot be passed by reference",
  		        gnat_actual);
  
! 	  /* If the mechanism was forced to by-ref, a copy is not allowed but
! 	     we issue only a warning because this case is not strict Ada.  */
! 	  else if (DECL_FORCED_BY_REF_P (gnu_formal))
! 	    post_error ("misaligned actual cannot be passed by reference??",
! 			gnat_actual);
  
  	  /* If the actual type of the object is already the nominal type,
  	     we have nothing to do, except if the size is self-referential
*************** Call_to_gnu (Node_Id gnat_node, tree *gn
*** 5322,5330 ****
  	    }
  
  	  /* Create an explicit temporary holding the copy.  */
- 	  if (atomic_p)
- 	    gnu_name = build_atomic_load (gnu_name, sync);
- 
  	  /* Do not initialize it for the _Init parameter of an initialization
  	     procedure since no data is meant to be passed in.  */
  	  if (Ekind (gnat_formal) == E_Out_Parameter
--- 5329,5334 ----
*************** Call_to_gnu (Node_Id gnat_node, tree *gn
*** 5354,5366 ****
  		     (TREE_OPERAND (TREE_OPERAND (gnu_orig, 1), 1)))
  		gnu_orig = TREE_OPERAND (gnu_orig, 2);
  
! 	      if (atomic_p)
! 		gnu_stmt
! 		  = build_atomic_store (gnu_orig, gnu_temp, sync);
! 	      else
! 		gnu_stmt
! 		  = build_binary_op (MODIFY_EXPR, NULL_TREE, gnu_orig,
! 				     gnu_temp);
  	      set_expr_location_from_node (gnu_stmt, gnat_node);
  
  	      append_to_statement_list (gnu_stmt, &gnu_after_list);
--- 5358,5365 ----
  		     (TREE_OPERAND (TREE_OPERAND (gnu_orig, 1), 1)))
  		gnu_orig = TREE_OPERAND (gnu_orig, 2);
  
! 	      gnu_stmt
! 		= build_binary_op (MODIFY_EXPR, NULL_TREE, gnu_orig, gnu_temp);
  	      set_expr_location_from_node (gnu_stmt, gnat_node);
  
  	      append_to_statement_list (gnu_stmt, &gnu_after_list);
*************** Call_to_gnu (Node_Id gnat_node, tree *gn
*** 5375,5382 ****
        if (is_true_formal_parm
  	  && !is_by_ref_formal_parm
  	  && Ekind (gnat_formal) != E_Out_Parameter
! 	  && atomic_access_required_p (gnat_actual, &sync))
! 	gnu_actual = build_atomic_load (gnu_actual, sync);
  
        /* If this was a procedure call, we may not have removed any padding.
  	 So do it here for the part we will use as an input, if any.  */
--- 5374,5381 ----
        if (is_true_formal_parm
  	  && !is_by_ref_formal_parm
  	  && Ekind (gnat_formal) != E_Out_Parameter
! 	  && simple_atomic_access_required_p (gnat_actual, &aa_sync))
! 	gnu_actual = build_atomic_load (gnu_actual, aa_sync);
  
        /* If this was a procedure call, we may not have removed any padding.
  	 So do it here for the part we will use as an input, if any.  */
*************** Call_to_gnu (Node_Id gnat_node, tree *gn
*** 5401,5411 ****
        else
  	gnu_actual = convert (gnu_actual_type, gnu_actual);
  
!       /* Make sure that the actual is in range of the formal's type.  */
!       if (Ekind (gnat_formal) != E_Out_Parameter
! 	  && Do_Range_Check (gnat_actual))
! 	gnu_actual
! 	  = emit_range_check (gnu_actual, gnat_formal_type, gnat_actual);
  
        /* First see if the parameter is passed by reference.  */
        if (is_true_formal_parm && DECL_BY_REF_P (gnu_formal))
--- 5400,5406 ----
        else
  	gnu_actual = convert (gnu_actual_type, gnu_actual);
  
!       gigi_checking_assert (!Do_Range_Check (gnat_actual));
  
        /* First see if the parameter is passed by reference.  */
        if (is_true_formal_parm && DECL_BY_REF_P (gnu_formal))
*************** Call_to_gnu (Node_Id gnat_node, tree *gn
*** 5510,5525 ****
  				     build_int_cst (type_for_size, 0),
  				     false);
  	    }
! 	  else
  	    gnu_actual = convert (DECL_ARG_TYPE (gnu_formal), gnu_actual);
  	}
  
!       vec_safe_push (gnu_actual_vec, gnu_actual);
      }
  
-   gnu_call
-     = build_call_vec (gnu_result_type, gnu_subprog_addr, gnu_actual_vec);
-   CALL_EXPR_BY_DESCRIPTOR (gnu_call) = by_descriptor;
    set_expr_location_from_node (gnu_call, gnat_node);
  
    /* If we have created a temporary for the return value, initialize it.  */
--- 5505,5560 ----
  				     build_int_cst (type_for_size, 0),
  				     false);
  	    }
! 
! 	  /* If this is a front-end built-in function, there is no need to
! 	     convert to the type used to pass the argument.  */
! 	  else if (!frontend_builtin)
  	    gnu_actual = convert (DECL_ARG_TYPE (gnu_formal), gnu_actual);
  	}
  
!       gnu_actual_vec.safe_push (gnu_actual);
!     }
! 
!   if (frontend_builtin)
!     {
!       tree pred_cst = build_int_cst (integer_type_node, PRED_BUILTIN_EXPECT);
!       enum internal_fn icode = IFN_BUILTIN_EXPECT;
! 
!       switch (DECL_FE_FUNCTION_CODE (gnu_subprog))
! 	{
! 	case BUILT_IN_EXPECT:
! 	  break;
! 	case BUILT_IN_LIKELY:
! 	  gnu_actual_vec.safe_push (boolean_true_node);
! 	  break;
! 	case BUILT_IN_UNLIKELY:
! 	  gnu_actual_vec.safe_push (boolean_false_node);
! 	  break;
! 	default:
! 	  gcc_unreachable ();
! 	}
! 
!       gnu_actual_vec.safe_push (pred_cst);
! 
!       gnu_call
! 	= build_call_expr_internal_loc_array (UNKNOWN_LOCATION,
! 					      icode,
! 					      gnu_result_type,
! 					      gnu_actual_vec.length (),
! 					      gnu_actual_vec.begin ());
!     }
!   else
!     {
!       gnu_call
!         = build_call_array_loc (UNKNOWN_LOCATION,
! 				gnu_result_type,
! 				build_unary_op (ADDR_EXPR, NULL_TREE,
! 						gnu_subprog),
! 				gnu_actual_vec.length (),
! 			        gnu_actual_vec.begin ());
!       CALL_EXPR_BY_DESCRIPTOR (gnu_call) = by_descriptor;
      }
  
    set_expr_location_from_node (gnu_call, gnat_node);
  
    /* If we have created a temporary for the return value, initialize it.  */
*************** Call_to_gnu (Node_Id gnat_node, tree *gn
*** 5609,5620 ****
  	       conversion node and not from the inner Expression.  */
  	    if (Nkind (gnat_actual) == N_Type_Conversion)
  	      {
  		gnu_result
! 		  = convert_with_check
! 		    (Etype (Expression (gnat_actual)), gnu_result,
! 		     Do_Overflow_Check (gnat_actual),
! 		     Do_Range_Check (Expression (gnat_actual)),
! 		     Float_Truncate (gnat_actual), gnat_actual);
  
  		if (!Is_Composite_Type (Underlying_Type (Etype (gnat_formal))))
  		  gnu_actual = convert (TREE_TYPE (gnu_result), gnu_actual);
--- 5644,5658 ----
  	       conversion node and not from the inner Expression.  */
  	    if (Nkind (gnat_actual) == N_Type_Conversion)
  	      {
+ 		const Node_Id gnat_expr = Expression (gnat_actual);
+ 
+ 		gigi_checking_assert (!Do_Range_Check (gnat_expr));
+ 
  		gnu_result
! 		  = convert_with_check (Etype (gnat_expr), gnu_result,
! 					Do_Overflow_Check (gnat_actual),
! 					Float_Truncate (gnat_actual),
! 					gnat_actual);
  
  		if (!Is_Composite_Type (Underlying_Type (Etype (gnat_formal))))
  		  gnu_actual = convert (TREE_TYPE (gnu_result), gnu_actual);
*************** Call_to_gnu (Node_Id gnat_node, tree *gn
*** 5630,5655 ****
  					      No_Truncation (gnat_actual));
  	    else
  	      {
! 		if (Do_Range_Check (gnat_actual))
! 		  gnu_result
! 		    = emit_range_check (gnu_result, Etype (gnat_actual),
! 					gnat_actual);
  
  		if (!(!TREE_CONSTANT (TYPE_SIZE (TREE_TYPE (gnu_actual)))
  		      && TREE_CONSTANT (TYPE_SIZE (TREE_TYPE (gnu_result)))))
  		  gnu_result = convert (TREE_TYPE (gnu_actual), gnu_result);
  	      }
  
  	    /* If an outer atomic access is required for an actual parameter,
  	       build the load-modify-store sequence.  */
! 	    if (outer_atomic_access_required_p (gnat_actual))
  	      gnu_result
  		= build_load_modify_store (gnu_actual, gnu_result, gnat_node);
  
! 	    /* Or else, if simple atomic access is required, build the atomic
  	       store.  */
! 	    else if (atomic_access_required_p (gnat_actual, &sync))
! 	      gnu_result = build_atomic_store (gnu_actual, gnu_result, sync);
  
  	    /* Otherwise build a regular assignment.  */
  	    else
--- 5668,5693 ----
  					      No_Truncation (gnat_actual));
  	    else
  	      {
! 		gigi_checking_assert (!Do_Range_Check (gnat_actual));
  
  		if (!(!TREE_CONSTANT (TYPE_SIZE (TREE_TYPE (gnu_actual)))
  		      && TREE_CONSTANT (TYPE_SIZE (TREE_TYPE (gnu_result)))))
  		  gnu_result = convert (TREE_TYPE (gnu_actual), gnu_result);
  	      }
  
+ 	    get_atomic_access (gnat_actual, &aa_type, &aa_sync);
+ 
  	    /* If an outer atomic access is required for an actual parameter,
  	       build the load-modify-store sequence.  */
! 	    if (aa_type == OUTER_ATOMIC)
  	      gnu_result
  		= build_load_modify_store (gnu_actual, gnu_result, gnat_node);
  
! 	    /* Or else, if a simple atomic access is required, build the atomic
  	       store.  */
! 	    else if (aa_type == SIMPLE_ATOMIC)
! 	      gnu_result
! 		= build_atomic_store (gnu_actual, gnu_result, aa_sync);
  
  	    /* Otherwise build a regular assignment.  */
  	    else
*************** Call_to_gnu (Node_Id gnat_node, tree *gn
*** 5690,5700 ****
  	  Node_Id gnat_parent = Parent (gnat_node);
  	  enum tree_code op_code;
  
! 	  /* If range check is needed, emit code to generate it.  */
! 	  if (Do_Range_Check (gnat_node))
! 	    gnu_call
! 	      = emit_range_check (gnu_call, Etype (Name (gnat_parent)),
! 				  gnat_parent);
  
  	  /* ??? If the return type has variable size, then force the return
  	     slot optimization as we would not be able to create a temporary.
--- 5728,5734 ----
  	  Node_Id gnat_parent = Parent (gnat_node);
  	  enum tree_code op_code;
  
! 	  gigi_checking_assert (!Do_Range_Check (gnat_node));
  
  	  /* ??? If the return type has variable size, then force the return
  	     slot optimization as we would not be able to create a temporary.
*************** Call_to_gnu (Node_Id gnat_node, tree *gn
*** 5705,5714 ****
  	    op_code = MODIFY_EXPR;
  
  	  /* Use the required method to move the result to the target.  */
! 	  if (outer_atomic_access)
  	    gnu_call
  	      = build_load_modify_store (gnu_target, gnu_call, gnat_node);
! 	  else if (atomic_access)
  	    gnu_call = build_atomic_store (gnu_target, gnu_call, atomic_sync);
  	  else
  	    gnu_call
--- 5739,5748 ----
  	    op_code = MODIFY_EXPR;
  
  	  /* Use the required method to move the result to the target.  */
! 	  if (atomic_access == OUTER_ATOMIC)
  	    gnu_call
  	      = build_load_modify_store (gnu_target, gnu_call, gnat_node);
! 	  else if (atomic_access == SIMPLE_ATOMIC)
  	    gnu_call = build_atomic_store (gnu_target, gnu_call, atomic_sync);
  	  else
  	    gnu_call
*************** Handled_Sequence_Of_Statements_to_gnu (N
*** 5849,5855 ****
  
        /* When not optimizing, disable inlining of finalizers as this can
  	 create a more complex CFG in the parent function.  */
!       if (!optimize)
  	DECL_DECLARED_INLINE_P (proc_decl) = 0;
  
        /* If there is no end label attached, we use the location of the At_End
--- 5883,5889 ----
  
        /* When not optimizing, disable inlining of finalizers as this can
  	 create a more complex CFG in the parent function.  */
!       if (!optimize || optimize_debug)
  	DECL_DECLARED_INLINE_P (proc_decl) = 0;
  
        /* If there is no end label attached, we use the location of the At_End
*************** Exception_Handler_to_gnu_gcc (Node_Id gn
*** 6156,6192 ****
    start_stmt_group ();
    gnat_pushlevel ();
  
!   /* Expand a call to the begin_handler hook at the beginning of the handler,
!      and arrange for a call to the end_handler hook to occur on every possible
!      exit path.
  
!      The hooks expect a pointer to the low level occurrence. This is required
!      for our stack management scheme because a raise inside the handler pushes
!      a new occurrence on top of the stack, which means that this top does not
!      necessarily match the occurrence this handler was dealing with.
  
       __builtin_eh_pointer references the exception occurrence being
!      propagated. Upon handler entry, this is the exception for which the
!      handler is triggered. This might not be the case upon handler exit,
!      however, as we might have a new occurrence propagated by the handler's
!      body, and the end_handler hook called as a cleanup in this context.
  
!      We use a local variable to retrieve the incoming value at handler entry
!      time, and reuse it to feed the end_handler hook's argument at exit.  */
  
    tree gnu_current_exc_ptr
      = build_call_expr (builtin_decl_explicit (BUILT_IN_EH_POINTER),
  		       1, integer_zero_node);
!   tree prev_gnu_incoming_exc_ptr = gnu_incoming_exc_ptr;
!   gnu_incoming_exc_ptr
      = create_var_decl (get_identifier ("EXPTR"), NULL_TREE,
  		       ptr_type_node, gnu_current_exc_ptr,
! 		       false, false, false, false, false, true, true,
  		       NULL, gnat_node);
  
!   add_stmt_with_node (build_call_n_expr (begin_handler_decl, 1,
! 					 gnu_incoming_exc_ptr),
! 		      gnat_node);
  
    /* Declare and initialize the choice parameter, if present.  */
    if (Present (Choice_Parameter (gnat_node)))
--- 6190,6244 ----
    start_stmt_group ();
    gnat_pushlevel ();
  
!   /* Expand a call to the begin_handler hook at the beginning of the
!      handler, and arrange for a call to the end_handler hook to occur
!      on every possible exit path.  GDB sets a breakpoint in the
!      begin_handler for catchpoints.
  
!      A v1 begin handler saves the cleanup from the exception object,
!      and marks the exception as in use, so that it will not be
!      released by other handlers.  A v1 end handler restores the
!      cleanup and releases the exception object, unless it is still
!      claimed, or the exception is being propagated (reraised).
  
       __builtin_eh_pointer references the exception occurrence being
!      handled or propagated.  Within the handler region, it is the
!      former, but within the else branch of the EH_ELSE_EXPR, i.e. the
!      exceptional cleanup path, it is the latter, so we must save the
!      occurrence being handled early on, so that, should an exception
!      be (re)raised, we can release the current exception, or figure
!      out we're not to release it because we're propagating a reraise
!      thereof.
  
!      We use local variables to retrieve the incoming value at handler
!      entry time (EXPTR), the saved cleanup (EXCLN) and the token
!      (EXVTK), and reuse them to feed the end_handler hook's argument
!      at exit.  */
  
+   /* CODE: void *EXPTR = __builtin_eh_pointer (0); */
    tree gnu_current_exc_ptr
      = build_call_expr (builtin_decl_explicit (BUILT_IN_EH_POINTER),
  		       1, integer_zero_node);
!   tree exc_ptr
      = create_var_decl (get_identifier ("EXPTR"), NULL_TREE,
  		       ptr_type_node, gnu_current_exc_ptr,
! 		       true, false, false, false, false, true, true,
  		       NULL, gnat_node);
  
!   tree prev_gnu_incoming_exc_ptr = gnu_incoming_exc_ptr;
!   gnu_incoming_exc_ptr = exc_ptr;
! 
!   /* begin_handler_decl must not throw, so we can use it as an
!      initializer for a variable used in cleanups.
! 
!      CODE: void *EXCLN = __gnat_begin_handler_v1 (EXPTR); */
!   tree exc_cleanup
!     = create_var_decl (get_identifier ("EXCLN"), NULL_TREE,
! 		       ptr_type_node,
! 		       build_call_n_expr (begin_handler_decl, 1,
! 					  exc_ptr),
! 		       true, false, false, false, false,
! 		       true, true, NULL, gnat_node);
  
    /* Declare and initialize the choice parameter, if present.  */
    if (Present (Choice_Parameter (gnat_node)))
*************** Exception_Handler_to_gnu_gcc (Node_Id gn
*** 6194,6214 ****
        tree gnu_param
  	= gnat_to_gnu_entity (Choice_Parameter (gnat_node), NULL_TREE, true);
  
        add_stmt (build_call_n_expr
  		(set_exception_parameter_decl, 2,
  		 build_unary_op (ADDR_EXPR, NULL_TREE, gnu_param),
  		 gnu_incoming_exc_ptr));
      }
  
    add_stmt_list (Statements (gnat_node));
  
!   /* We don't have an End_Label at hand to set the location of the cleanup
!      actions, so we use that of the exception handler itself instead.  */
!   tree stmt = build_call_n_expr (end_handler_decl, 1, gnu_incoming_exc_ptr);
    if (stmt_list_cannot_alter_control_flow_p (Statements (gnat_node)))
!     add_stmt_with_node (stmt, gnat_node);
    else
!     add_cleanup (stmt, gnat_node);
  
    gnat_poplevel ();
  
--- 6246,6309 ----
        tree gnu_param
  	= gnat_to_gnu_entity (Choice_Parameter (gnat_node), NULL_TREE, true);
  
+       /* CODE: __gnat_set_exception_parameter (&choice_param, EXPTR); */
        add_stmt (build_call_n_expr
  		(set_exception_parameter_decl, 2,
  		 build_unary_op (ADDR_EXPR, NULL_TREE, gnu_param),
  		 gnu_incoming_exc_ptr));
      }
  
+   /* CODE: <handler proper> */
    add_stmt_list (Statements (gnat_node));
  
!   tree call = build_call_n_expr (end_handler_decl, 3,
! 				 exc_ptr,
! 				 exc_cleanup,
! 				 null_pointer_node);
!   /* If the handler can only end by falling off the end, don't bother
!      with cleanups.  */
    if (stmt_list_cannot_alter_control_flow_p (Statements (gnat_node)))
!     /* CODE: __gnat_end_handler_v1 (EXPTR, EXCLN, NULL);  */
!     add_stmt_with_node (call, gnat_node);
!   /* Otherwise, all of the above is after
!      CODE: try {
! 
!      The call above will appear after
!      CODE: } finally {
! 
!      And the code below will appear after
!      CODE: } else {
! 
!      The else block to a finally block is taken instead of the finally
!      block when an exception propagates out of the try block.  */
    else
!     {
!       start_stmt_group ();
!       gnat_pushlevel ();
!       /* CODE: void *EXPRP = __builtin_eh_handler (0); */
!       tree prop_ptr
! 	= create_var_decl (get_identifier ("EXPRP"), NULL_TREE,
! 			   ptr_type_node,
! 			   build_call_expr (builtin_decl_explicit
! 					    (BUILT_IN_EH_POINTER),
! 					    1, integer_zero_node),
! 			   true, false, false, false, false,
! 			   true, true, NULL, gnat_node);
! 
!       /* CODE: __gnat_end_handler_v1 (EXPTR, EXCLN, EXPRP);  */
!       tree ecall = build_call_n_expr (end_handler_decl, 3,
! 				      exc_ptr,
! 				      exc_cleanup,
! 				      prop_ptr);
! 
!       add_stmt_with_node (ecall, gnat_node);
! 
!       /* CODE: } */
!       gnat_poplevel ();
!       tree eblk = end_stmt_group ();
!       tree ehls = build2 (EH_ELSE_EXPR, void_type_node, call, eblk);
!       add_cleanup (ehls, gnat_node);
!     }
  
    gnat_poplevel ();
  
*************** Compilation_Unit_to_gnu (Node_Id gnat_no
*** 6228,6243 ****
  		       || Nkind (gnat_unit) == N_Subprogram_Body);
    const Entity_Id gnat_unit_entity = Defining_Entity (gnat_unit);
    Entity_Id gnat_entity;
!   Node_Id gnat_pragma;
    /* Make the decl for the elaboration procedure.  Emit debug info for it, so
       that users can break into their elaboration code in debuggers.  Kludge:
!      don't consider it as a definition so that we have a line map for its body,
!      but no subprogram description in debug info. */
    tree gnu_elab_proc_decl
      = create_subprog_decl
        (create_concat_name (gnat_unit_entity, body_p ? "elabb" : "elabs"),
         NULL_TREE, void_ftype, NULL_TREE,
!        is_default, true, false, true, true, false, NULL, gnat_unit);
    struct elab_info *info;
  
    vec_safe_push (gnu_elab_proc_stack, gnu_elab_proc_decl);
--- 6323,6342 ----
  		       || Nkind (gnat_unit) == N_Subprogram_Body);
    const Entity_Id gnat_unit_entity = Defining_Entity (gnat_unit);
    Entity_Id gnat_entity;
!   Node_Id gnat_pragma, gnat_iter;
    /* Make the decl for the elaboration procedure.  Emit debug info for it, so
       that users can break into their elaboration code in debuggers.  Kludge:
!      don't consider it as a definition so that we have a line map for its
!      body, but no subprogram description in debug info.  In addition, don't
!      qualify it as artificial, even though it is not a user subprogram per se,
!      in particular for specs.  Unlike, say, clones created internally by the
!      compiler, this subprogram materializes specific user code and flagging it
!      artificial would take elab code away from gcov's analysis.  */
    tree gnu_elab_proc_decl
      = create_subprog_decl
        (create_concat_name (gnat_unit_entity, body_p ? "elabb" : "elabs"),
         NULL_TREE, void_ftype, NULL_TREE,
!        is_default, true, false, false, true, false, NULL, gnat_unit);
    struct elab_info *info;
  
    vec_safe_push (gnu_elab_proc_stack, gnu_elab_proc_decl);
*************** Compilation_Unit_to_gnu (Node_Id gnat_no
*** 6320,6325 ****
--- 6419,6430 ----
    add_stmt_list (Actions (Aux_Decls_Node (gnat_node)));
    finalize_from_limited_with ();
  
+   /* Then process the expressions of pragma Compile_Time_{Error|Warning} to
+      annotate types referenced therein if they have not been annotated.  */
+   for (int i = 0; gnat_compile_time_expr_list.iterate (i, &gnat_iter); i++)
+     (void) gnat_to_gnu_external (gnat_iter);
+   gnat_compile_time_expr_list.release ();
+ 
    /* Save away what we've made so far and finish it up.  */
    set_current_block_context (gnu_elab_proc_decl);
    gnat_poplevel ();
*************** Compilation_Unit_to_gnu (Node_Id gnat_no
*** 6343,6366 ****
  
     The compiler will automatically predict the last edge leading to a call
     to a noreturn function as very unlikely taken.  This function makes it
!    possible to expand the prediction to predecessors in case the condition
     is made up of several short-circuit operators.  */
  
  static tree
  build_noreturn_cond (tree cond)
  {
!   tree fn = builtin_decl_explicit (BUILT_IN_EXPECT);
!   tree arg_types = TYPE_ARG_TYPES (TREE_TYPE (fn));
!   tree pred_type = TREE_VALUE (arg_types);
!   tree expected_type = TREE_VALUE (TREE_CHAIN (arg_types));
! 
!   tree t = build_call_expr (fn, 3,
! 			    fold_convert (pred_type, cond),
! 			    build_int_cst (expected_type, 0),
! 			    build_int_cst (integer_type_node,
! 					   PRED_NORETURN));
! 
!   return build1 (NOP_EXPR, boolean_type_node, t);
  }
  
  /* Subroutine of gnat_to_gnu to translate GNAT_RANGE, a node representing a
--- 6448,6464 ----
  
     The compiler will automatically predict the last edge leading to a call
     to a noreturn function as very unlikely taken.  This function makes it
!    possible to extend the prediction to predecessors in case the condition
     is made up of several short-circuit operators.  */
  
  static tree
  build_noreturn_cond (tree cond)
  {
!   tree pred_cst = build_int_cst (integer_type_node, PRED_NORETURN);
!   return
!     build_call_expr_internal_loc (UNKNOWN_LOCATION, IFN_BUILTIN_EXPECT,
! 				  boolean_type_node, 3, cond,
! 				  boolean_false_node, pred_cst);
  }
  
  /* Subroutine of gnat_to_gnu to translate GNAT_RANGE, a node representing a
*************** common:
*** 6564,6571 ****
  static bool
  lhs_or_actual_p (Node_Id gnat_node)
  {
!   Node_Id gnat_parent = Parent (gnat_node);
!   Node_Kind kind = Nkind (gnat_parent);
  
    if (kind == N_Assignment_Statement && Name (gnat_parent) == gnat_node)
      return true;
--- 6662,6669 ----
  static bool
  lhs_or_actual_p (Node_Id gnat_node)
  {
!   const Node_Id gnat_parent = Parent (gnat_node);
!   const Node_Kind kind = Nkind (gnat_parent);
  
    if (kind == N_Assignment_Statement && Name (gnat_parent) == gnat_node)
      return true;
*************** lhs_or_actual_p (Node_Id gnat_node)
*** 6586,6597 ****
  static bool
  present_in_lhs_or_actual_p (Node_Id gnat_node)
  {
-   Node_Kind kind;
- 
    if (lhs_or_actual_p (gnat_node))
      return true;
  
!   kind = Nkind (Parent (gnat_node));
  
    if ((kind == N_Type_Conversion || kind == N_Unchecked_Type_Conversion)
        && lhs_or_actual_p (Parent (gnat_node)))
--- 6684,6693 ----
  static bool
  present_in_lhs_or_actual_p (Node_Id gnat_node)
  {
    if (lhs_or_actual_p (gnat_node))
      return true;
  
!   const Node_Kind kind = Nkind (Parent (gnat_node));
  
    if ((kind == N_Type_Conversion || kind == N_Unchecked_Type_Conversion)
        && lhs_or_actual_p (Parent (gnat_node)))
*************** gnat_to_gnu (Node_Id gnat_node)
*** 6680,6686 ****
    tree gnu_result_type = void_type_node;
    tree gnu_expr, gnu_lhs, gnu_rhs;
    Node_Id gnat_temp;
!   bool sync = false;
  
    /* Save node number for error message and set location information.  */
    Current_Error_Node = gnat_node;
--- 6776,6783 ----
    tree gnu_result_type = void_type_node;
    tree gnu_expr, gnu_lhs, gnu_rhs;
    Node_Id gnat_temp;
!   atomic_acces_t aa_type;
!   bool aa_sync;
  
    /* Save node number for error message and set location information.  */
    Current_Error_Node = gnat_node;
*************** gnat_to_gnu (Node_Id gnat_node)
*** 6752,6760 ****
        gnu_result = Identifier_to_gnu (gnat_node, &gnu_result_type);
  
        /* If atomic access is required on the RHS, build the atomic load.  */
!       if (atomic_access_required_p (gnat_node, &sync)
  	  && !present_in_lhs_or_actual_p (gnat_node))
! 	gnu_result = build_atomic_load (gnu_result, sync);
        break;
  
      case N_Integer_Literal:
--- 6849,6857 ----
        gnu_result = Identifier_to_gnu (gnat_node, &gnu_result_type);
  
        /* If atomic access is required on the RHS, build the atomic load.  */
!       if (simple_atomic_access_required_p (gnat_node, &aa_sync)
  	  && !present_in_lhs_or_actual_p (gnat_node))
! 	gnu_result = build_atomic_load (gnu_result, aa_sync);
        break;
  
      case N_Integer_Literal:
*************** gnat_to_gnu (Node_Id gnat_node)
*** 6772,6782 ****
  	gnu_result = UI_To_gnu (Intval (gnat_node), gnu_type);
  
  	/* If the result overflows (meaning it doesn't fit in its base type),
! 	   abort.  We would like to check that the value is within the range
! 	   of the subtype, but that causes problems with subtypes whose usage
! 	   will raise Constraint_Error and with biased representation, so
! 	   we don't.  */
! 	gcc_assert (!TREE_OVERFLOW (gnu_result));
        }
        break;
  
--- 6869,6885 ----
  	gnu_result = UI_To_gnu (Intval (gnat_node), gnu_type);
  
  	/* If the result overflows (meaning it doesn't fit in its base type),
! 	   abort, unless this is for a named number because that's not fatal.
! 	   We would like to check that the value is within the range of the
! 	   subtype, but that causes problems with subtypes whose usage will
! 	   raise Constraint_Error and also with biased representation.  */
! 	if (TREE_OVERFLOW (gnu_result))
! 	  {
! 	    if (Nkind (Parent (gnat_node)) == N_Number_Declaration)
! 	      gnu_result = error_mark_node;
! 	    else
! 	      gcc_unreachable ();
! 	  }
        }
        break;
  
*************** gnat_to_gnu (Node_Id gnat_node)
*** 6921,6926 ****
--- 7024,7030 ----
        break;
  
      case N_Object_Declaration:
+     case N_Number_Declaration:
      case N_Exception_Declaration:
        gnat_temp = Defining_Entity (gnat_node);
        gnu_result = alloc_stmt_list ();
*************** gnat_to_gnu (Node_Id gnat_node)
*** 6939,6951 ****
  	  && (!type_annotate_only
  	      || Compile_Time_Known_Value (Expression (gnat_node))))
  	{
  	  gnu_expr = gnat_to_gnu (Expression (gnat_node));
- 	  if (Do_Range_Check (Expression (gnat_node)))
- 	    gnu_expr
- 	      = emit_range_check (gnu_expr, Etype (gnat_temp), gnat_node);
  
! 	  if (type_annotate_only && TREE_CODE (gnu_expr) == ERROR_MARK)
! 	    gnu_expr = NULL_TREE;
  	}
        else
  	gnu_expr = NULL_TREE;
--- 7043,7061 ----
  	  && (!type_annotate_only
  	      || Compile_Time_Known_Value (Expression (gnat_node))))
  	{
+ 	  gigi_checking_assert (!Do_Range_Check (Expression (gnat_node)));
+ 
  	  gnu_expr = gnat_to_gnu (Expression (gnat_node));
  
! 	  if (TREE_CODE (gnu_expr) == ERROR_MARK)
! 	    {
! 	      /* If this is a named number for which we cannot manipulate
! 		 the value, just skip the declaration altogether.  */
! 	      if (kind == N_Number_Declaration)
! 		break;
! 	      else if (type_annotate_only)
! 		gnu_expr = NULL_TREE;
! 	    }
  	}
        else
  	gnu_expr = NULL_TREE;
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7055,7061 ****
        gnu_result = alloc_stmt_list ();
        break;
  
-     case N_Number_Declaration:
      case N_Package_Renaming_Declaration:
        /* These are fully handled in the front end.  */
        /* ??? For package renamings, find a way to use GENERIC namespaces so
--- 7165,7170 ----
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7074,7082 ****
        gnu_result = build_unary_op (INDIRECT_REF, NULL_TREE, gnu_result);
  
        /* If atomic access is required on the RHS, build the atomic load.  */
!       if (atomic_access_required_p (gnat_node, &sync)
  	  && !present_in_lhs_or_actual_p (gnat_node))
! 	gnu_result = build_atomic_load (gnu_result, sync);
        break;
  
      case N_Indexed_Component:
--- 7183,7191 ----
        gnu_result = build_unary_op (INDIRECT_REF, NULL_TREE, gnu_result);
  
        /* If atomic access is required on the RHS, build the atomic load.  */
!       if (simple_atomic_access_required_p (gnat_node, &aa_sync)
  	  && !present_in_lhs_or_actual_p (gnat_node))
! 	gnu_result = build_atomic_load (gnu_result, aa_sync);
        break;
  
      case N_Indexed_Component:
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7151,7159 ****
  	gnu_result_type = get_unpadded_type (Etype (gnat_node));
  
  	/* If atomic access is required on the RHS, build the atomic load.  */
! 	if (atomic_access_required_p (gnat_node, &sync)
  	    && !present_in_lhs_or_actual_p (gnat_node))
! 	  gnu_result = build_atomic_load (gnu_result, sync);
        }
        break;
  
--- 7260,7268 ----
  	gnu_result_type = get_unpadded_type (Etype (gnat_node));
  
  	/* If atomic access is required on the RHS, build the atomic load.  */
! 	if (simple_atomic_access_required_p (gnat_node, &aa_sync)
  	    && !present_in_lhs_or_actual_p (gnat_node))
! 	  gnu_result = build_atomic_load (gnu_result, aa_sync);
        }
        break;
  
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7229,7237 ****
  	gnu_result_type = get_unpadded_type (Etype (gnat_node));
  
  	/* If atomic access is required on the RHS, build the atomic load.  */
! 	if (atomic_access_required_p (gnat_node, &sync)
  	    && !present_in_lhs_or_actual_p (gnat_node))
! 	  gnu_result = build_atomic_load (gnu_result, sync);
        }
        break;
  
--- 7338,7346 ----
  	gnu_result_type = get_unpadded_type (Etype (gnat_node));
  
  	/* If atomic access is required on the RHS, build the atomic load.  */
! 	if (simple_atomic_access_required_p (gnat_node, &aa_sync)
  	    && !present_in_lhs_or_actual_p (gnat_node))
! 	  gnu_result = build_atomic_load (gnu_result, aa_sync);
        }
        break;
  
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7292,7299 ****
  				    gnu_aggr_type);
  	else if (TREE_CODE (gnu_aggr_type) == ARRAY_TYPE)
  	  gnu_result = pos_to_constructor (First (Expressions (gnat_node)),
! 					   gnu_aggr_type,
! 					   Component_Type (Etype (gnat_node)));
  	else if (TREE_CODE (gnu_aggr_type) == COMPLEX_TYPE)
  	  gnu_result
  	    = build_binary_op
--- 7401,7407 ----
  				    gnu_aggr_type);
  	else if (TREE_CODE (gnu_aggr_type) == ARRAY_TYPE)
  	  gnu_result = pos_to_constructor (First (Expressions (gnat_node)),
! 					   gnu_aggr_type);
  	else if (TREE_CODE (gnu_aggr_type) == COMPLEX_TYPE)
  	  gnu_result
  	    = build_binary_op
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7332,7341 ****
        if (kind == N_Qualified_Expression && Is_Tagged_Type (Etype (gnat_node)))
  	used_types_insert (gnu_result_type);
  
        gnu_result
  	= convert_with_check (Etype (gnat_node), gnu_expr,
  			      Do_Overflow_Check (gnat_node),
- 			      Do_Range_Check (Expression (gnat_node)),
  			      kind == N_Type_Conversion
  			      && Float_Truncate (gnat_node), gnat_node);
        break;
--- 7440,7450 ----
        if (kind == N_Qualified_Expression && Is_Tagged_Type (Etype (gnat_node)))
  	used_types_insert (gnu_result_type);
  
+       gigi_checking_assert (!Do_Range_Check (Expression (gnat_node)));
+ 
        gnu_result
  	= convert_with_check (Etype (gnat_node), gnu_expr,
  			      Do_Overflow_Check (gnat_node),
  			      kind == N_Type_Conversion
  			      && Float_Truncate (gnat_node), gnat_node);
        break;
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7458,7464 ****
  	enum tree_code code = gnu_codes[kind];
  	bool ignore_lhs_overflow = false;
  	location_t saved_location = input_location;
! 	tree gnu_type;
  
  	/* Fix operations set up for boolean types in GNU_CODES above.  */
  	if (Is_Modular_Integer_Type (Underlying_Type (Etype (gnat_node))))
--- 7567,7573 ----
  	enum tree_code code = gnu_codes[kind];
  	bool ignore_lhs_overflow = false;
  	location_t saved_location = input_location;
! 	tree gnu_type, gnu_max_shift = NULL_TREE;
  
  	/* Fix operations set up for boolean types in GNU_CODES above.  */
  	if (Is_Modular_Integer_Type (Underlying_Type (Etype (gnat_node))))
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7481,7486 ****
--- 7590,7606 ----
  	gnu_rhs = gnat_to_gnu (Right_Opnd (gnat_node));
  	gnu_type = gnu_result_type = get_unpadded_type (Etype (gnat_node));
  
+ 	/* If this is a shift, take the count as unsigned since that is what
+ 	   most machines do and will generate simpler adjustments below.  */
+ 	if (IN (kind, N_Op_Shift))
+ 	  {
+ 	    tree gnu_count_type
+ 	      = gnat_unsigned_type_for (get_base_type (TREE_TYPE (gnu_rhs)));
+ 	    gnu_rhs = convert (gnu_count_type, gnu_rhs);
+ 	    gnu_max_shift
+ 	      = convert (TREE_TYPE (gnu_rhs), TYPE_SIZE (gnu_type));
+ 	  }
+ 
  	/* Pending generic support for efficient vector logical operations in
  	   GCC, convert vectors to their representative array type view and
  	   fallthrough.  */
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7504,7528 ****
  
  	/* If this is a shift whose count is not guaranteed to be correct,
  	   we need to adjust the shift count.  */
! 	if (IN (kind, N_Op_Shift) && !Shift_Count_OK (gnat_node))
! 	  {
! 	    tree gnu_count_type = get_base_type (TREE_TYPE (gnu_rhs));
! 	    tree gnu_max_shift
! 	      = convert (gnu_count_type, TYPE_SIZE (gnu_type));
! 
! 	    if (kind == N_Op_Rotate_Left || kind == N_Op_Rotate_Right)
! 	      gnu_rhs = build_binary_op (TRUNC_MOD_EXPR, gnu_count_type,
! 					 gnu_rhs, gnu_max_shift);
! 	    else if (kind == N_Op_Shift_Right_Arithmetic)
! 	      gnu_rhs
! 		= build_binary_op
! 		  (MIN_EXPR, gnu_count_type,
! 		   build_binary_op (MINUS_EXPR,
! 				    gnu_count_type,
! 				    gnu_max_shift,
! 				    build_int_cst (gnu_count_type, 1)),
! 		   gnu_rhs);
! 	  }
  
  	/* For right shifts, the type says what kind of shift to do,
  	   so we may need to choose a different type.  In this case,
--- 7624,7643 ----
  
  	/* If this is a shift whose count is not guaranteed to be correct,
  	   we need to adjust the shift count.  */
! 	if ((kind == N_Op_Rotate_Left || kind == N_Op_Rotate_Right)
! 	    && !Shift_Count_OK (gnat_node))
! 	  gnu_rhs = build_binary_op (TRUNC_MOD_EXPR, TREE_TYPE (gnu_rhs),
! 				     gnu_rhs, gnu_max_shift);
! 	else if (kind == N_Op_Shift_Right_Arithmetic
! 		 && !Shift_Count_OK (gnat_node))
! 	  gnu_rhs
! 	    = build_binary_op (MIN_EXPR, TREE_TYPE (gnu_rhs),
! 			       build_binary_op (MINUS_EXPR,
! 						TREE_TYPE (gnu_rhs),
! 						gnu_max_shift,
! 						build_int_cst
! 						(TREE_TYPE (gnu_rhs), 1)),
! 			       gnu_rhs);
  
  	/* For right shifts, the type says what kind of shift to do,
  	   so we may need to choose a different type.  In this case,
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7568,7585 ****
  
  	/* If this is a logical shift with the shift count not verified,
  	   we must return zero if it is too large.  We cannot compensate
! 	   above in this case.  */
  	if ((kind == N_Op_Shift_Left || kind == N_Op_Shift_Right)
  	    && !Shift_Count_OK (gnat_node))
  	  gnu_result
! 	    = build_cond_expr
! 	      (gnu_type,
! 	       build_binary_op (GE_EXPR, boolean_type_node,
! 				gnu_rhs,
! 				convert (TREE_TYPE (gnu_rhs),
! 					 TYPE_SIZE (gnu_type))),
! 	       build_int_cst (gnu_type, 0),
! 	       gnu_result);
        }
        break;
  
--- 7683,7697 ----
  
  	/* If this is a logical shift with the shift count not verified,
  	   we must return zero if it is too large.  We cannot compensate
! 	   beforehand in this case.  */
  	if ((kind == N_Op_Shift_Left || kind == N_Op_Shift_Right)
  	    && !Shift_Count_OK (gnat_node))
  	  gnu_result
! 	    = build_cond_expr (gnu_type,
! 			       build_binary_op (GE_EXPR, boolean_type_node,
! 						gnu_rhs, gnu_max_shift),
! 			       build_int_cst (gnu_type, 0),
! 			       gnu_result);
        }
        break;
  
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7642,7651 ****
  
  	gnat_temp = Expression (gnat_node);
  
! 	/* The Expression operand can either be an N_Identifier or
! 	   Expanded_Name, which must represent a type, or a
! 	   N_Qualified_Expression, which contains both the object type and an
! 	   initial value for the object.  */
  	if (Nkind (gnat_temp) == N_Identifier
  	    || Nkind (gnat_temp) == N_Expanded_Name)
  	  gnu_type = gnat_to_gnu_type (Entity (gnat_temp));
--- 7754,7762 ----
  
  	gnat_temp = Expression (gnat_node);
  
! 	/* The expression can be either an N_Identifier or an Expanded_Name,
! 	   which must represent a type, or a N_Qualified_Expression, which
! 	   contains both the type and an initial value for the object.  */
  	if (Nkind (gnat_temp) == N_Identifier
  	    || Nkind (gnat_temp) == N_Expanded_Name)
  	  gnu_type = gnat_to_gnu_type (Entity (gnat_temp));
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7658,7666 ****
  	    gnu_init = gnat_to_gnu (Expression (gnat_temp));
  
  	    gnu_init = maybe_unconstrained_array (gnu_init);
! 	    if (Do_Range_Check (Expression (gnat_temp)))
! 	      gnu_init
! 		= emit_range_check (gnu_init, gnat_desig_type, gnat_temp);
  
  	    if (Is_Elementary_Type (gnat_desig_type)
  		|| Is_Constrained (gnat_desig_type))
--- 7769,7776 ----
  	    gnu_init = gnat_to_gnu (Expression (gnat_temp));
  
  	    gnu_init = maybe_unconstrained_array (gnu_init);
! 
! 	    gigi_checking_assert (!Do_Range_Check (Expression (gnat_temp)));
  
  	    if (Is_Elementary_Type (gnat_desig_type)
  		|| Is_Constrained (gnat_desig_type))
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7731,7744 ****
  				       N_Raise_Storage_Error);
        else if (Nkind (Expression (gnat_node)) == N_Function_Call)
  	{
! 	  bool outer_atomic_access
! 	    = outer_atomic_access_required_p (Name (gnat_node));
! 	  bool atomic_access
! 	    = !outer_atomic_access
! 	      && atomic_access_required_p (Name (gnat_node), &sync);
  	  gnu_result
  	    = Call_to_gnu (Expression (gnat_node), &gnu_result_type, gnu_lhs,
! 			   outer_atomic_access, atomic_access, sync);
  	}
        else
  	{
--- 7841,7850 ----
  				       N_Raise_Storage_Error);
        else if (Nkind (Expression (gnat_node)) == N_Function_Call)
  	{
! 	  get_atomic_access (Name (gnat_node), &aa_type, &aa_sync);
  	  gnu_result
  	    = Call_to_gnu (Expression (gnat_node), &gnu_result_type, gnu_lhs,
! 			   aa_type, aa_sync);
  	}
        else
  	{
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7766,7784 ****
  	  else
  	    gnu_rhs = maybe_unconstrained_array (gnat_to_gnu (gnat_expr));
  
! 	  /* If range check is needed, emit code to generate it.  */
! 	  if (Do_Range_Check (gnat_expr))
! 	    gnu_rhs = emit_range_check (gnu_rhs, Etype (Name (gnat_node)),
! 					gnat_node);
  
  	  /* If an outer atomic access is required on the LHS, build the load-
  	     modify-store sequence.  */
! 	  if (outer_atomic_access_required_p (Name (gnat_node)))
  	    gnu_result = build_load_modify_store (gnu_lhs, gnu_rhs, gnat_node);
  
! 	  /* Or else, if atomic access is required, build the atomic store.  */
! 	  else if (atomic_access_required_p (Name (gnat_node), &sync))
! 	    gnu_result = build_atomic_store (gnu_lhs, gnu_rhs, sync);
  
  	  /* Or else, use memset when the conditions are met.  This has already
  	     been validated by Aggr_Assignment_OK_For_Backend in the front-end
--- 7872,7890 ----
  	  else
  	    gnu_rhs = maybe_unconstrained_array (gnat_to_gnu (gnat_expr));
  
! 	  gigi_checking_assert (!Do_Range_Check (gnat_expr));
! 
! 	  get_atomic_access (Name (gnat_node), &aa_type, &aa_sync);
  
  	  /* If an outer atomic access is required on the LHS, build the load-
  	     modify-store sequence.  */
! 	  if (aa_type == OUTER_ATOMIC)
  	    gnu_result = build_load_modify_store (gnu_lhs, gnu_rhs, gnat_node);
  
! 	  /* Or else, if a simple atomic access is required, build the atomic
! 	     store.  */
! 	  else if (aa_type == SIMPLE_ATOMIC)
! 	    gnu_result = build_atomic_store (gnu_lhs, gnu_rhs, aa_sync);
  
  	  /* Or else, use memset when the conditions are met.  This has already
  	     been validated by Aggr_Assignment_OK_For_Backend in the front-end
*************** gnat_to_gnu (Node_Id gnat_node)
*** 7945,7951 ****
  
  		/* And find out whether this is a candidate for Named Return
  		   Value.  If so, record it.  */
! 		if (!TYPE_CI_CO_LIST (gnu_subprog_type) && optimize)
  		  {
  		    tree ret_val = gnu_ret_val;
  
--- 8051,8059 ----
  
  		/* And find out whether this is a candidate for Named Return
  		   Value.  If so, record it.  */
! 		if (optimize
! 		    && !optimize_debug
! 		    && !TYPE_CI_CO_LIST (gnu_subprog_type))
  		  {
  		    tree ret_val = gnu_ret_val;
  
*************** gnat_to_gnu (Node_Id gnat_node)
*** 8097,8103 ****
      case N_Function_Call:
      case N_Procedure_Call_Statement:
        gnu_result = Call_to_gnu (gnat_node, &gnu_result_type, NULL_TREE,
! 				false, false, false);
        break;
  
      /************************/
--- 8205,8211 ----
      case N_Function_Call:
      case N_Procedure_Call_Statement:
        gnu_result = Call_to_gnu (gnat_node, &gnu_result_type, NULL_TREE,
! 				NOT_ATOMIC, false);
        break;
  
      /************************/
*************** gnat_to_gnu (Node_Id gnat_node)
*** 8225,8243 ****
        gcc_assert (No (Name (gnat_node)) && Back_End_Exceptions ());
  
        start_stmt_group ();
-       gnat_pushlevel ();
  
!       /* Clear the current exception pointer so that the occurrence won't be
! 	 deallocated.  */
!       gnu_expr = create_var_decl (get_identifier ("SAVED_EXPTR"), NULL_TREE,
! 				  ptr_type_node, gnu_incoming_exc_ptr,
! 				  false, false, false, false, false,
! 				  true, true, NULL, gnat_node);
  
-       add_stmt (build_binary_op (MODIFY_EXPR, NULL_TREE, gnu_incoming_exc_ptr,
- 				 build_int_cst (ptr_type_node, 0)));
-       add_stmt (build_call_n_expr (reraise_zcx_decl, 1, gnu_expr));
-       gnat_poplevel ();
        gnu_result = end_stmt_group ();
        break;
  
--- 8333,8343 ----
        gcc_assert (No (Name (gnat_node)) && Back_End_Exceptions ());
  
        start_stmt_group ();
  
!       add_stmt_with_node (build_call_n_expr (reraise_zcx_decl, 1,
! 					     gnu_incoming_exc_ptr),
! 			  gnat_node);
  
        gnu_result = end_stmt_group ();
        break;
  
*************** gnat_to_gnu (Node_Id gnat_node)
*** 8405,8411 ****
  		  /* If the operand is going to end up in memory,
  		     mark it addressable.  Note that we don't test
  		     allows_mem like in the input case below; this
! 		     is modelled on the C front-end.  */
  		  if (!allows_reg)
  		    {
  		      output = remove_conversions (output, false);
--- 8505,8511 ----
  		  /* If the operand is going to end up in memory,
  		     mark it addressable.  Note that we don't test
  		     allows_mem like in the input case below; this
! 		     is modeled on the C front-end.  */
  		  if (!allows_reg)
  		    {
  		      output = remove_conversions (output, false);
*************** gnat_to_gnu (Node_Id gnat_node)
*** 8638,8647 ****
  	set_gnu_expr_location_from_node (gnu_result, gnat_node);
      }
  
!   /* Set the location information on the result if it's not a simple name.
       Note that we may have no result if we tried to build a CALL_EXPR node
       to a procedure with no side-effects and optimization is enabled.  */
!   else if (kind != N_Identifier && gnu_result && EXPR_P (gnu_result))
      set_gnu_expr_location_from_node (gnu_result, gnat_node);
  
    /* If we're supposed to return something of void_type, it means we have
--- 8738,8753 ----
  	set_gnu_expr_location_from_node (gnu_result, gnat_node);
      }
  
!   /* Set the location information on the result if it's not a simple name
!      or something that contains a simple name, for example a tag, because
!      we don"t want all the references to get the location of the first use.
       Note that we may have no result if we tried to build a CALL_EXPR node
       to a procedure with no side-effects and optimization is enabled.  */
!   else if (kind != N_Identifier
! 	   && !(kind == N_Selected_Component
! 		&& Chars (Selector_Name (gnat_node)) == Name_uTag)
! 	   && gnu_result
! 	   && EXPR_P (gnu_result))
      set_gnu_expr_location_from_node (gnu_result, gnat_node);
  
    /* If we're supposed to return something of void_type, it means we have
*************** gnat_to_gnu (Node_Id gnat_node)
*** 8705,8711 ****
  
         5. If this is a reference to an unconstrained array which is used as the
  	  prefix of an attribute reference that requires an lvalue, return the
! 	  result unmodified because we want return the original bounds.
  
         6. Finally, if the type of the result is already correct.  */
  
--- 8811,8817 ----
  
         5. If this is a reference to an unconstrained array which is used as the
  	  prefix of an attribute reference that requires an lvalue, return the
! 	  result unmodified because we want to return the original bounds.
  
         6. Finally, if the type of the result is already correct.  */
  
*************** add_cleanup (tree gnu_cleanup, Node_Id g
*** 9028,9034 ****
  {
    if (Present (gnat_node))
      set_expr_location_from_node (gnu_cleanup, gnat_node, true);
!   append_to_statement_list (gnu_cleanup, &current_stmt_group->cleanups);
  }
  
  /* Set the BLOCK node corresponding to the current code group to GNU_BLOCK.  */
--- 9134,9156 ----
  {
    if (Present (gnat_node))
      set_expr_location_from_node (gnu_cleanup, gnat_node, true);
!   /* An EH_ELSE_EXPR must be by itself, and that's all we need when we
!      use it.  The assert below makes sure that is so.  Should we ever
!      need more than that, we could combine EH_ELSE_EXPRs, and copy
!      non-EH_ELSE_EXPR stmts into both cleanup paths of an
!      EH_ELSE_EXPR.  */
!   if (TREE_CODE (gnu_cleanup) == EH_ELSE_EXPR)
!     {
!       gcc_assert (!current_stmt_group->cleanups);
!       current_stmt_group->cleanups = gnu_cleanup;
!     }
!   else
!     {
!       gcc_assert (!current_stmt_group->cleanups
! 		  || (TREE_CODE (current_stmt_group->cleanups)
! 		      != EH_ELSE_EXPR));
!       append_to_statement_list (gnu_cleanup, &current_stmt_group->cleanups);
!     }
  }
  
  /* Set the BLOCK node corresponding to the current code group to GNU_BLOCK.  */
*************** build_binary_op_trapv (enum tree_code co
*** 9971,10028 ****
    return emit_check (check, gnu_expr, CE_Overflow_Check_Failed, gnat_node);
  }
  
- /* Emit code for a range check.  GNU_EXPR is the expression to be checked,
-    GNAT_RANGE_TYPE the gnat type or subtype containing the bounds against
-    which we have to check.  GNAT_NODE is the GNAT node conveying the source
-    location for which the error should be signaled.  */
- 
- static tree
- emit_range_check (tree gnu_expr, Entity_Id gnat_range_type, Node_Id gnat_node)
- {
-   tree gnu_range_type = get_unpadded_type (gnat_range_type);
-   tree gnu_compare_type = get_base_type (TREE_TYPE (gnu_expr));
- 
-   /* If GNU_EXPR has GNAT_RANGE_TYPE as its base type, no check is needed.
-      This can for example happen when translating 'Val or 'Value.  */
-   if (gnu_compare_type == gnu_range_type)
-     return gnu_expr;
- 
-   /* Range checks can only be applied to types with ranges.  */
-   gcc_assert (INTEGRAL_TYPE_P (gnu_range_type)
-               || SCALAR_FLOAT_TYPE_P (gnu_range_type));
- 
-   /* If GNU_EXPR has an integral type that is narrower than GNU_RANGE_TYPE,
-      we can't do anything since we might be truncating the bounds.  No
-      check is needed in this case.  */
-   if (INTEGRAL_TYPE_P (TREE_TYPE (gnu_expr))
-       && (TYPE_PRECISION (gnu_compare_type)
- 	  < TYPE_PRECISION (get_base_type (gnu_range_type))))
-     return gnu_expr;
- 
-   /* Checked expressions must be evaluated only once.  */
-   gnu_expr = gnat_protect_expr (gnu_expr);
- 
-   /* Note that the form of the check is
- 	(not (expr >= lo)) or (not (expr <= hi))
-      the reason for this slightly convoluted form is that NaNs
-      are not considered to be in range in the float case.  */
-   return emit_check
-     (build_binary_op (TRUTH_ORIF_EXPR, boolean_type_node,
- 		      invert_truthvalue
- 		      (build_binary_op (GE_EXPR, boolean_type_node,
- 				        convert (gnu_compare_type, gnu_expr),
- 				        convert (gnu_compare_type,
- 						 TYPE_MIN_VALUE
- 						 (gnu_range_type)))),
- 		      invert_truthvalue
- 		      (build_binary_op (LE_EXPR, boolean_type_node,
- 					convert (gnu_compare_type, gnu_expr),
- 					convert (gnu_compare_type,
- 						 TYPE_MAX_VALUE
- 						 (gnu_range_type))))),
-      gnu_expr, CE_Range_Check_Failed, gnat_node);
- }
- 
  /* GNU_COND contains the condition corresponding to an index, overflow or
     range check of value GNU_EXPR.  Build a COND_EXPR that returns GNU_EXPR
     if GNU_COND is false and raises a CONSTRAINT_ERROR if GNU_COND is true.
--- 10093,10098 ----
*************** emit_check (tree gnu_cond, tree gnu_expr
*** 10054,10067 ****
  }
  
  /* Return an expression that converts GNU_EXPR to GNAT_TYPE, doing overflow
!    checks if OVERFLOW_P is true and range checks if RANGE_P is true.
!    If TRUNCATE_P true, do a float-to-integer conversion with truncation,
!    otherwise round.  GNAT_NODE is the GNAT node conveying the source location
!    for which the error should be signaled.  */
  
  static tree
  convert_with_check (Entity_Id gnat_type, tree gnu_expr, bool overflow_p,
! 		    bool range_p, bool truncate_p, Node_Id gnat_node)
  {
    tree gnu_type = get_unpadded_type (gnat_type);
    tree gnu_base_type = get_base_type (gnu_type);
--- 10124,10136 ----
  }
  
  /* Return an expression that converts GNU_EXPR to GNAT_TYPE, doing overflow
!    checks if OVERFLOW_P is true.  If TRUNCATE_P is true, do a fp-to-integer
!    conversion with truncation, otherwise round.  GNAT_NODE is the GNAT node
!    conveying the source location for which the error should be signaled.  */
  
  static tree
  convert_with_check (Entity_Id gnat_type, tree gnu_expr, bool overflow_p,
! 		    bool truncate_p, Node_Id gnat_node)
  {
    tree gnu_type = get_unpadded_type (gnat_type);
    tree gnu_base_type = get_base_type (gnu_type);
*************** convert_with_check (Entity_Id gnat_type,
*** 10072,10079 ****
    /* If we are not doing any checks, the output is an integral type and the
       input is not a floating-point type, just do the conversion.  This is
       required for packed array types and is simpler in all cases anyway.   */
!   if (!range_p
!       && !overflow_p
        && INTEGRAL_TYPE_P (gnu_base_type)
        && !FLOAT_TYPE_P (gnu_in_base_type))
      return convert (gnu_type, gnu_expr);
--- 10141,10147 ----
    /* If we are not doing any checks, the output is an integral type and the
       input is not a floating-point type, just do the conversion.  This is
       required for packed array types and is simpler in all cases anyway.   */
!   if (!overflow_p
        && INTEGRAL_TYPE_P (gnu_base_type)
        && !FLOAT_TYPE_P (gnu_in_base_type))
      return convert (gnu_type, gnu_expr);
*************** convert_with_check (Entity_Id gnat_type,
*** 10106,10112 ****
        tree gnu_in_lb = TYPE_MIN_VALUE (gnu_in_base_type);
        tree gnu_in_ub = TYPE_MAX_VALUE (gnu_in_base_type);
        tree gnu_out_lb = TYPE_MIN_VALUE (gnu_base_type);
!       tree gnu_out_ub = TYPE_MAX_VALUE (gnu_base_type);
  
        /* Convert the lower bounds to signed types, so we're sure we're
  	 comparing them properly.  Likewise, convert the upper bounds
--- 10174,10186 ----
        tree gnu_in_lb = TYPE_MIN_VALUE (gnu_in_base_type);
        tree gnu_in_ub = TYPE_MAX_VALUE (gnu_in_base_type);
        tree gnu_out_lb = TYPE_MIN_VALUE (gnu_base_type);
!       tree gnu_out_ub
! 	= (TREE_CODE (gnu_base_type) == INTEGER_TYPE
! 	   && TYPE_MODULAR_P (gnu_base_type))
! 	  ? fold_build2 (MINUS_EXPR, gnu_base_type,
! 			 TYPE_MODULUS (gnu_base_type),
! 			 build_int_cst (gnu_base_type, 1))
! 	  : TYPE_MAX_VALUE (gnu_base_type);
  
        /* Convert the lower bounds to signed types, so we're sure we're
  	 comparing them properly.  Likewise, convert the upper bounds
*************** convert_with_check (Entity_Id gnat_type,
*** 10231,10244 ****
    else
      gnu_result = convert (gnu_base_type, gnu_result);
  
-   /* Finally, do the range check if requested.  Note that if the result type
-      is a modular type, the range check is actually an overflow check.  */
-   if (range_p
-       || (overflow_p
- 	  && TREE_CODE (gnu_base_type) == INTEGER_TYPE
- 	  && TYPE_MODULAR_P (gnu_base_type)))
-     gnu_result = emit_range_check (gnu_result, gnat_type, gnat_node);
- 
    return convert (gnu_type, gnu_result);
  }
  
--- 10305,10310 ----
*************** addressable_p (tree gnu_expr, tree gnu_t
*** 10339,10344 ****
--- 10405,10411 ----
  
      case STRING_CST:
      case INTEGER_CST:
+     case REAL_CST:
        /* Taking the address yields a pointer to the constant pool.  */
        return true;
  
*************** addressable_p (tree gnu_expr, tree gnu_t
*** 10348,10353 ****
--- 10415,10421 ----
        return TREE_STATIC (gnu_expr) ? true : false;
  
      case NULL_EXPR:
+     case ADDR_EXPR:
      case SAVE_EXPR:
      case CALL_EXPR:
      case PLUS_EXPR:
*************** assoc_to_constructor (Entity_Id gnat_ent
*** 10567,10573 ****
  
    for (; Present (gnat_assoc); gnat_assoc = Next (gnat_assoc))
      {
!       Node_Id gnat_field = First (Choices (gnat_assoc));
        tree gnu_field = gnat_to_gnu_field_decl (Entity (gnat_field));
        tree gnu_expr = gnat_to_gnu (Expression (gnat_assoc));
  
--- 10635,10642 ----
  
    for (; Present (gnat_assoc); gnat_assoc = Next (gnat_assoc))
      {
!       const Node_Id gnat_field = First (Choices (gnat_assoc));
!       const Node_Id gnat_expr = Expression (gnat_assoc);
        tree gnu_field = gnat_to_gnu_field_decl (Entity (gnat_field));
        tree gnu_expr = gnat_to_gnu (Expression (gnat_assoc));
  
*************** assoc_to_constructor (Entity_Id gnat_ent
*** 10587,10597 ****
  	  && Is_Unchecked_Union (gnat_entity))
  	continue;
  
!       /* Before assigning a value in an aggregate make sure range checks
! 	 are done if required.  Then convert to the type of the field.  */
!       if (Do_Range_Check (Expression (gnat_assoc)))
! 	gnu_expr = emit_range_check (gnu_expr, Etype (gnat_field), Empty);
  
        gnu_expr = convert (TREE_TYPE (gnu_field), gnu_expr);
  
        /* Add the field and expression to the list.  */
--- 10656,10664 ----
  	  && Is_Unchecked_Union (gnat_entity))
  	continue;
  
!       gigi_checking_assert (!Do_Range_Check (gnat_expr));
  
+       /* Convert to the type of the field.  */
        gnu_expr = convert (TREE_TYPE (gnu_field), gnu_expr);
  
        /* Add the field and expression to the list.  */
*************** assoc_to_constructor (Entity_Id gnat_ent
*** 10612,10624 ****
  
  /* Build a possibly nested constructor for array aggregates.  GNAT_EXPR is
     the first element of an array aggregate.  It may itself be an aggregate.
!    GNU_ARRAY_TYPE is the GCC type corresponding to the array aggregate.
!    GNAT_COMPONENT_TYPE is the type of the array component; it is needed
!    for range checking.  */
  
  static tree
! pos_to_constructor (Node_Id gnat_expr, tree gnu_array_type,
! 		    Entity_Id gnat_component_type)
  {
    tree gnu_index = TYPE_MIN_VALUE (TYPE_DOMAIN (gnu_array_type));
    vec<constructor_elt, va_gc> *gnu_expr_vec = NULL;
--- 10679,10688 ----
  
  /* Build a possibly nested constructor for array aggregates.  GNAT_EXPR is
     the first element of an array aggregate.  It may itself be an aggregate.
!    GNU_ARRAY_TYPE is the GCC type corresponding to the array aggregate.  */
  
  static tree
! pos_to_constructor (Node_Id gnat_expr, tree gnu_array_type)
  {
    tree gnu_index = TYPE_MIN_VALUE (TYPE_DOMAIN (gnu_array_type));
    vec<constructor_elt, va_gc> *gnu_expr_vec = NULL;
*************** pos_to_constructor (Node_Id gnat_expr, t
*** 10634,10641 ****
  	  && TREE_CODE (TREE_TYPE (gnu_array_type)) == ARRAY_TYPE
  	  && TYPE_MULTI_ARRAY_P (TREE_TYPE (gnu_array_type)))
  	gnu_expr = pos_to_constructor (First (Expressions (gnat_expr)),
! 				       TREE_TYPE (gnu_array_type),
! 				       gnat_component_type);
        else
  	{
  	  /* If the expression is a conversion to an unconstrained array type,
--- 10698,10704 ----
  	  && TREE_CODE (TREE_TYPE (gnu_array_type)) == ARRAY_TYPE
  	  && TYPE_MULTI_ARRAY_P (TREE_TYPE (gnu_array_type)))
  	gnu_expr = pos_to_constructor (First (Expressions (gnat_expr)),
! 				       TREE_TYPE (gnu_array_type));
        else
  	{
  	  /* If the expression is a conversion to an unconstrained array type,
*************** pos_to_constructor (Node_Id gnat_expr, t
*** 10647,10656 ****
  	  else
  	    gnu_expr = gnat_to_gnu (gnat_expr);
  
! 	  /* Before assigning the element to the array, make sure it is
! 	     in range.  */
! 	  if (Do_Range_Check (gnat_expr))
! 	    gnu_expr = emit_range_check (gnu_expr, gnat_component_type, Empty);
  	}
  
        CONSTRUCTOR_APPEND_ELT (gnu_expr_vec, gnu_index,
--- 10710,10716 ----
  	  else
  	    gnu_expr = gnat_to_gnu (gnat_expr);
  
! 	  gigi_checking_assert (!Do_Range_Check (gnat_expr));
  	}
  
        CONSTRUCTOR_APPEND_ELT (gnu_expr_vec, gnu_index,
*************** Sloc_to_locus (Source_Ptr Sloc, location
*** 10775,10782 ****
      }
  
    Source_File_Index file = Get_Source_File_Index (Sloc);
!   Logical_Line_Number line = Get_Logical_Line_Number (Sloc);
!   Column_Number column = (clear_column ? 0 : Get_Column_Number (Sloc));
    line_map_ordinary *map = LINEMAPS_ORDINARY_MAP_AT (line_table, file - 1);
  
    /* We can have zero if pragma Source_Reference is in effect.  */
--- 10835,10842 ----
      }
  
    Source_File_Index file = Get_Source_File_Index (Sloc);
!   Line_Number_Type line = Get_Logical_Line_Number (Sloc);
!   Column_Number_Type column = (clear_column ? 0 : Get_Column_Number (Sloc));
    line_map_ordinary *map = LINEMAPS_ORDINARY_MAP_AT (line_table, file - 1);
  
    /* We can have zero if pragma Source_Reference is in effect.  */
*************** get_elaboration_procedure (void)
*** 11092,11098 ****
  static Entity_Id
  get_controlling_type (Entity_Id subprog)
  {
!   /* This is modelled on Expand_Interface_Thunk.  */
    Entity_Id controlling_type = Etype (First_Formal (subprog));
    if (Is_Access_Type (controlling_type))
      controlling_type = Directly_Designated_Type (controlling_type);
--- 11152,11158 ----
  static Entity_Id
  get_controlling_type (Entity_Id subprog)
  {
!   /* This is modeled on Expand_Interface_Thunk.  */
    Entity_Id controlling_type = Etype (First_Formal (subprog));
    if (Is_Access_Type (controlling_type))
      controlling_type = Directly_Designated_Type (controlling_type);
*************** maybe_make_gnu_thunk (Entity_Id gnat_thu
*** 11214,11224 ****
    const Entity_Id gnat_controlling_type = get_controlling_type (gnat_target);
    const Entity_Id gnat_interface_type = get_controlling_type (gnat_thunk);
  
    /* Now compute whether the former covers the latter.  */
    const Entity_Id gnat_interface_tag
!     = Is_Interface (gnat_interface_type)
!       ? Find_Interface_Tag (gnat_controlling_type, gnat_interface_type)
!       : Empty;
    tree gnu_interface_tag
      = Present (gnat_interface_tag)
        ? gnat_to_gnu_field_decl (gnat_interface_tag)
--- 11274,11285 ----
    const Entity_Id gnat_controlling_type = get_controlling_type (gnat_target);
    const Entity_Id gnat_interface_type = get_controlling_type (gnat_thunk);
  
+   /* We must have an interface type at this point.  */
+   gcc_assert (Is_Interface (gnat_interface_type));
+ 
    /* Now compute whether the former covers the latter.  */
    const Entity_Id gnat_interface_tag
!     = Find_Interface_Tag (gnat_controlling_type, gnat_interface_type);
    tree gnu_interface_tag
      = Present (gnat_interface_tag)
        ? gnat_to_gnu_field_decl (gnat_interface_tag)
diff -Nrcpad gcc-9.3.0/gcc/ada/gcc-interface/utils.c gcc-10.1.0/gcc/ada/gcc-interface/utils.c
*** gcc-9.3.0/gcc/ada/gcc-interface/utils.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/gcc-interface/utils.c	Thu May  7 10:49:59 2020
*************** static tree handle_novops_attribute (tre
*** 90,104 ****
--- 90,120 ----
  static tree handle_nonnull_attribute (tree *, tree, tree, int, bool *);
  static tree handle_sentinel_attribute (tree *, tree, tree, int, bool *);
  static tree handle_noreturn_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_stack_protect_attribute (tree *, tree, tree, int, bool *);
  static tree handle_noinline_attribute (tree *, tree, tree, int, bool *);
  static tree handle_noclone_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_noicf_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_noipa_attribute (tree *, tree, tree, int, bool *);
  static tree handle_leaf_attribute (tree *, tree, tree, int, bool *);
  static tree handle_always_inline_attribute (tree *, tree, tree, int, bool *);
  static tree handle_malloc_attribute (tree *, tree, tree, int, bool *);
  static tree handle_type_generic_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_flatten_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_used_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_cold_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_hot_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_target_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_target_clones_attribute (tree *, tree, tree, int, bool *);
  static tree handle_vector_size_attribute (tree *, tree, tree, int, bool *);
  static tree handle_vector_type_attribute (tree *, tree, tree, int, bool *);
  
+ static const struct attribute_spec::exclusions attr_cold_hot_exclusions[] =
+ {
+   { "cold", true,  true,  true  },
+   { "hot" , true,  true,  true  },
+   { NULL  , false, false, false }
+ };
+ 
  /* Fake handler for attributes we don't properly support, typically because
     they'd require dragging a lot of the common-c front-end circuitry.  */
  static tree fake_attribute_handler (tree *, tree, tree, int, bool *);
*************** const struct attribute_spec gnat_interna
*** 123,156 ****
      handle_sentinel_attribute, NULL },
    { "noreturn",     0, 0,  true,  false, false, false,
      handle_noreturn_attribute, NULL },
    { "noinline",     0, 0,  true,  false, false, false,
      handle_noinline_attribute, NULL },
    { "noclone",      0, 0,  true,  false, false, false,
      handle_noclone_attribute, NULL },
    { "leaf",         0, 0,  true,  false, false, false,
      handle_leaf_attribute, NULL },
    { "always_inline",0, 0,  true,  false, false, false,
      handle_always_inline_attribute, NULL },
    { "malloc",       0, 0,  true,  false, false, false,
      handle_malloc_attribute, NULL },
!   { "type generic", 0, 0,  false, true, true, false,
      handle_type_generic_attribute, NULL },
  
!   { "vector_size",  1, 1,  false, true, false,  false,
      handle_vector_size_attribute, NULL },
!   { "vector_type",  0, 0,  false, true, false,  false,
      handle_vector_type_attribute, NULL },
!   { "may_alias",    0, 0, false, true, false, false, NULL, NULL },
  
    /* ??? format and format_arg are heavy and not supported, which actually
       prevents support for stdio builtins, which we however declare as part
       of the common builtins.def contents.  */
!   { "format",     3, 3,  false, true,  true,  false, fake_attribute_handler,
!     NULL },
!   { "format_arg", 1, 1,  false, true,  true,  false, fake_attribute_handler,
!     NULL },
  
!   { NULL,         0, 0, false, false, false, false, NULL, NULL }
  };
  
  /* Associates a GNAT tree node to a GCC tree node. It is used in
--- 139,193 ----
      handle_sentinel_attribute, NULL },
    { "noreturn",     0, 0,  true,  false, false, false,
      handle_noreturn_attribute, NULL },
+   { "stack_protect",0, 0, true,  false, false, false,
+     handle_stack_protect_attribute, NULL },
    { "noinline",     0, 0,  true,  false, false, false,
      handle_noinline_attribute, NULL },
    { "noclone",      0, 0,  true,  false, false, false,
      handle_noclone_attribute, NULL },
+   { "no_icf",       0, 0,  true,  false, false, false,
+     handle_noicf_attribute, NULL },
+   { "noipa",        0, 0,  true,  false, false, false,
+     handle_noipa_attribute, NULL },
    { "leaf",         0, 0,  true,  false, false, false,
      handle_leaf_attribute, NULL },
    { "always_inline",0, 0,  true,  false, false, false,
      handle_always_inline_attribute, NULL },
    { "malloc",       0, 0,  true,  false, false, false,
      handle_malloc_attribute, NULL },
!   { "type generic", 0, 0,  false, true,  true,  false,
      handle_type_generic_attribute, NULL },
  
!   { "flatten",      0, 0,  true,  false, false, false,
!     handle_flatten_attribute, NULL },
!   { "used",         0, 0,  true,  false, false, false,
!     handle_used_attribute, NULL },
!   { "cold",         0, 0,  true,  false, false, false,
!     handle_cold_attribute, attr_cold_hot_exclusions },
!   { "hot",          0, 0,  true,  false, false, false,
!     handle_hot_attribute, attr_cold_hot_exclusions },
!   { "target",       1, -1, true,  false, false, false,
!     handle_target_attribute, NULL },
!   { "target_clones",1, -1, true,  false, false, false,
!     handle_target_clones_attribute, NULL },
! 
!   { "vector_size",  1, 1,  false, true,  false, false,
      handle_vector_size_attribute, NULL },
!   { "vector_type",  0, 0,  false, true,  false, false,
      handle_vector_type_attribute, NULL },
!   { "may_alias",    0, 0,  false, true,  false, false,
!     NULL, NULL },
  
    /* ??? format and format_arg are heavy and not supported, which actually
       prevents support for stdio builtins, which we however declare as part
       of the common builtins.def contents.  */
!   { "format",       3, 3,  false, true,  true,  false,
!     fake_attribute_handler, NULL },
!   { "format_arg",   1, 1,  false, true,  true,  false,
!     fake_attribute_handler, NULL },
  
!   { NULL,           0, 0,  false, false, false, false,
!     NULL, NULL }
  };
  
  /* Associates a GNAT tree node to a GCC tree node. It is used in
*************** static tree split_plus (tree, tree *);
*** 251,257 ****
  static tree float_type_for_precision (int, machine_mode);
  static tree convert_to_fat_pointer (tree, tree);
  static unsigned int scale_by_factor_of (tree, unsigned int);
- static bool potential_alignment_gap (tree, tree, tree);
  
  /* Linked list used as a queue to defer the initialization of the DECL_CONTEXT
     of ..._DECL nodes and of the TYPE_CONTEXT of ..._TYPE nodes.  */
--- 288,293 ----
*************** make_aligning_type (tree type, unsigned
*** 947,956 ****
    return record_type;
  }
  
  /* TYPE is a RECORD_TYPE, UNION_TYPE or QUAL_UNION_TYPE that is being used
!    as the field type of a packed record if IN_RECORD is true, or as the
!    component type of a packed array if IN_RECORD is false.  See if we can
!    rewrite it either as a type that has non-BLKmode, which we can pack
     tighter in the packed record case, or as a smaller type with at most
     MAX_ALIGN alignment if the value is non-zero.  If so, return the new
     type; if not, return the original type.  */
--- 983,1027 ----
    return record_type;
  }
  
+ /* TYPE is an ARRAY_TYPE that is being used as the type of a field in a packed
+    record.  See if we can rewrite it as a type that has non-BLKmode, which we
+    can pack tighter in the packed record.  If so, return the new type; if not,
+    return the original type.  */
+ 
+ static tree
+ make_packable_array_type (tree type)
+ {
+   const unsigned HOST_WIDE_INT size = tree_to_uhwi (TYPE_SIZE (type));
+   unsigned HOST_WIDE_INT new_size;
+   unsigned int new_align;
+ 
+   /* No point in doing anything if the size is either zero or too large for an
+      integral mode, or if the type already has non-BLKmode.  */
+   if (size == 0 || size > MAX_FIXED_MODE_SIZE || TYPE_MODE (type) != BLKmode)
+     return type;
+ 
+   /* Punt if the component type is an aggregate type for now.  */
+   if (AGGREGATE_TYPE_P (TREE_TYPE (type)))
+     return type;
+ 
+   tree new_type = copy_type (type);
+ 
+   new_size = ceil_pow2 (size);
+   new_align = MIN (new_size, BIGGEST_ALIGNMENT);
+   SET_TYPE_ALIGN (new_type, new_align);
+ 
+   TYPE_SIZE (new_type) = bitsize_int (new_size);
+   TYPE_SIZE_UNIT (new_type) = size_int (new_size / BITS_PER_UNIT);
+ 
+   SET_TYPE_MODE (new_type, mode_for_size (new_size, MODE_INT, 1).else_blk ());
+ 
+   return new_type;
+ }
+ 
  /* TYPE is a RECORD_TYPE, UNION_TYPE or QUAL_UNION_TYPE that is being used
!    as the type of a field in a packed record if IN_RECORD is true, or as
!    the component type of a packed array if IN_RECORD is false.  See if we
!    can rewrite it either as a type that has non-BLKmode, which we can pack
     tighter in the packed record case, or as a smaller type with at most
     MAX_ALIGN alignment if the value is non-zero.  If so, return the new
     type; if not, return the original type.  */
*************** make_aligning_type (tree type, unsigned
*** 958,966 ****
  tree
  make_packable_type (tree type, bool in_record, unsigned int max_align)
  {
!   unsigned HOST_WIDE_INT size = tree_to_uhwi (TYPE_SIZE (type));
    unsigned HOST_WIDE_INT new_size;
-   unsigned int align = TYPE_ALIGN (type);
    unsigned int new_align;
  
    /* No point in doing anything if the size is zero.  */
--- 1029,1037 ----
  tree
  make_packable_type (tree type, bool in_record, unsigned int max_align)
  {
!   const unsigned HOST_WIDE_INT size = tree_to_uhwi (TYPE_SIZE (type));
!   const unsigned int align = TYPE_ALIGN (type);
    unsigned HOST_WIDE_INT new_size;
    unsigned int new_align;
  
    /* No point in doing anything if the size is zero.  */
*************** make_packable_type (tree type, bool in_r
*** 1021,1030 ****
        tree new_field_type = TREE_TYPE (field);
        tree new_field, new_field_size;
  
!       if (RECORD_OR_UNION_TYPE_P (new_field_type)
! 	  && !TYPE_FAT_POINTER_P (new_field_type)
  	  && tree_fits_uhwi_p (TYPE_SIZE (new_field_type)))
! 	new_field_type = make_packable_type (new_field_type, true, max_align);
  
        /* However, for the last field in a not already packed record type
  	 that is of an aggregate type, we need to use the RM size in the
--- 1092,1110 ----
        tree new_field_type = TREE_TYPE (field);
        tree new_field, new_field_size;
  
!       if (AGGREGATE_TYPE_P (new_field_type)
  	  && tree_fits_uhwi_p (TYPE_SIZE (new_field_type)))
! 	{
! 	  if (RECORD_OR_UNION_TYPE_P (new_field_type)
! 	      && !TYPE_FAT_POINTER_P (new_field_type))
! 	    new_field_type
! 	      = make_packable_type (new_field_type, true, max_align);
! 	  else if (in_record
! 		   && max_align > 0
! 		   && max_align < BITS_PER_UNIT
! 		   && TREE_CODE (new_field_type) == ARRAY_TYPE)
! 	    new_field_type = make_packable_array_type (new_field_type);
! 	}
  
        /* However, for the last field in a not already packed record type
  	 that is of an aggregate type, we need to use the RM size in the
*************** maybe_pad_type (tree type, tree size, un
*** 1374,1380 ****
       different modes, a VIEW_CONVERT_EXPR will be required for converting
       between them and it might be hard to overcome afterwards, including
       at the RTL level when the stand-alone object is accessed as a whole.  */
!   if (align != 0
        && RECORD_OR_UNION_TYPE_P (type)
        && TYPE_MODE (type) == BLKmode
        && !TYPE_BY_REFERENCE_P (type)
--- 1454,1460 ----
       different modes, a VIEW_CONVERT_EXPR will be required for converting
       between them and it might be hard to overcome afterwards, including
       at the RTL level when the stand-alone object is accessed as a whole.  */
!   if (align > 0
        && RECORD_OR_UNION_TYPE_P (type)
        && TYPE_MODE (type) == BLKmode
        && !TYPE_BY_REFERENCE_P (type)
*************** maybe_pad_type (tree type, tree size, un
*** 1385,1391 ****
  	  || (TREE_CODE (size) == INTEGER_CST
  	      && compare_tree_int (size, MAX_FIXED_MODE_SIZE) <= 0)))
      {
!       tree packable_type = make_packable_type (type, true);
        if (TYPE_MODE (packable_type) != BLKmode
  	  && align >= TYPE_ALIGN (packable_type))
          type = packable_type;
--- 1465,1471 ----
  	  || (TREE_CODE (size) == INTEGER_CST
  	      && compare_tree_int (size, MAX_FIXED_MODE_SIZE) <= 0)))
      {
!       tree packable_type = make_packable_type (type, true, align);
        if (TYPE_MODE (packable_type) != BLKmode
  	  && align >= TYPE_ALIGN (packable_type))
          type = packable_type;
*************** void
*** 1778,1790 ****
  finish_record_type (tree record_type, tree field_list, int rep_level,
  		    bool debug_info_p)
  {
!   enum tree_code code = TREE_CODE (record_type);
    tree name = TYPE_IDENTIFIER (record_type);
    tree ada_size = bitsize_zero_node;
    tree size = bitsize_zero_node;
-   bool had_size = TYPE_SIZE (record_type) != 0;
-   bool had_size_unit = TYPE_SIZE_UNIT (record_type) != 0;
-   bool had_align = TYPE_ALIGN (record_type) != 0;
    tree field;
  
    TYPE_FIELDS (record_type) = field_list;
--- 1858,1875 ----
  finish_record_type (tree record_type, tree field_list, int rep_level,
  		    bool debug_info_p)
  {
!   const enum tree_code orig_code = TREE_CODE (record_type);
!   const bool had_size = TYPE_SIZE (record_type) != NULL_TREE;
!   const bool had_size_unit = TYPE_SIZE_UNIT (record_type) != NULL_TREE;
!   const bool had_align = TYPE_ALIGN (record_type) > 0;
!   /* For all-repped records with a size specified, lay the QUAL_UNION_TYPE
!      out just like a UNION_TYPE, since the size will be fixed.  */
!   const enum tree_code code
!     = (orig_code == QUAL_UNION_TYPE && rep_level > 0 && had_size
!        ? UNION_TYPE : orig_code);
    tree name = TYPE_IDENTIFIER (record_type);
    tree ada_size = bitsize_zero_node;
    tree size = bitsize_zero_node;
    tree field;
  
    TYPE_FIELDS (record_type) = field_list;
*************** finish_record_type (tree record_type, tr
*** 1797,1822 ****
       that just means some initializations; otherwise, layout the record.  */
    if (rep_level > 0)
      {
!       SET_TYPE_ALIGN (record_type, MAX (BITS_PER_UNIT,
! 					TYPE_ALIGN (record_type)));
! 
!       if (!had_size_unit)
! 	TYPE_SIZE_UNIT (record_type) = size_zero_node;
  
        if (!had_size)
  	TYPE_SIZE (record_type) = bitsize_zero_node;
  
!       /* For all-repped records with a size specified, lay the QUAL_UNION_TYPE
! 	 out just like a UNION_TYPE, since the size will be fixed.  */
!       else if (code == QUAL_UNION_TYPE)
! 	code = UNION_TYPE;
      }
    else
      {
        /* Ensure there isn't a size already set.  There can be in an error
  	 case where there is a rep clause but all fields have errors and
  	 no longer have a position.  */
!       TYPE_SIZE (record_type) = 0;
  
        /* Ensure we use the traditional GCC layout for bitfields when we need
  	 to pack the record type or have a representation clause.  The other
--- 1882,1902 ----
       that just means some initializations; otherwise, layout the record.  */
    if (rep_level > 0)
      {
!       if (TYPE_ALIGN (record_type) < BITS_PER_UNIT)
! 	SET_TYPE_ALIGN (record_type, BITS_PER_UNIT);
  
        if (!had_size)
  	TYPE_SIZE (record_type) = bitsize_zero_node;
  
!       if (!had_size_unit)
! 	TYPE_SIZE_UNIT (record_type) = size_zero_node;
      }
    else
      {
        /* Ensure there isn't a size already set.  There can be in an error
  	 case where there is a rep clause but all fields have errors and
  	 no longer have a position.  */
!       TYPE_SIZE (record_type) = NULL_TREE;
  
        /* Ensure we use the traditional GCC layout for bitfields when we need
  	 to pack the record type or have a representation clause.  The other
*************** finish_record_type (tree record_type, tr
*** 1867,1873 ****
        if (DECL_BIT_FIELD (field)
  	  && operand_equal_p (this_size, TYPE_SIZE (type), 0))
  	{
! 	  unsigned int align = TYPE_ALIGN (type);
  
  	  /* In the general case, type alignment is required.  */
  	  if (value_factor_p (pos, align))
--- 1947,1953 ----
        if (DECL_BIT_FIELD (field)
  	  && operand_equal_p (this_size, TYPE_SIZE (type), 0))
  	{
! 	  const unsigned int align = TYPE_ALIGN (type);
  
  	  /* In the general case, type alignment is required.  */
  	  if (value_factor_p (pos, align))
*************** rest_of_record_type_compilation (tree re
*** 2090,2096 ****
  		     ? UNION_TYPE : TREE_CODE (record_type));
        tree orig_name = TYPE_IDENTIFIER (record_type), new_name;
        tree last_pos = bitsize_zero_node;
-       tree old_field, prev_old_field = NULL_TREE;
  
        new_name
  	= concat_name (orig_name, TREE_CODE (record_type) == QUAL_UNION_TYPE
--- 2170,2175 ----
*************** rest_of_record_type_compilation (tree re
*** 2108,2114 ****
  
        /* Now scan all the fields, replacing each field with a new field
  	 corresponding to the new encoding.  */
!       for (old_field = TYPE_FIELDS (record_type); old_field;
  	   old_field = DECL_CHAIN (old_field))
  	{
  	  tree field_type = TREE_TYPE (old_field);
--- 2187,2194 ----
  
        /* Now scan all the fields, replacing each field with a new field
  	 corresponding to the new encoding.  */
!       for (tree old_field = TYPE_FIELDS (record_type);
! 	   old_field;
  	   old_field = DECL_CHAIN (old_field))
  	{
  	  tree field_type = TREE_TYPE (old_field);
*************** rest_of_record_type_compilation (tree re
*** 2132,2140 ****
  	  else
  	    pos = compute_related_constant (curpos, last_pos);
  
! 	  if (!pos
! 	      && TREE_CODE (curpos) == MULT_EXPR
! 	      && tree_fits_uhwi_p (TREE_OPERAND (curpos, 1)))
  	    {
  	      tree offset = TREE_OPERAND (curpos, 0);
  	      align = tree_to_uhwi (TREE_OPERAND (curpos, 1));
--- 2212,2221 ----
  	  else
  	    pos = compute_related_constant (curpos, last_pos);
  
! 	  if (pos)
! 	    ;
! 	  else if (TREE_CODE (curpos) == MULT_EXPR
! 		   && tree_fits_uhwi_p (TREE_OPERAND (curpos, 1)))
  	    {
  	      tree offset = TREE_OPERAND (curpos, 0);
  	      align = tree_to_uhwi (TREE_OPERAND (curpos, 1));
*************** rest_of_record_type_compilation (tree re
*** 2142,2149 ****
  	      last_pos = round_up (last_pos, align);
  	      pos = compute_related_constant (curpos, last_pos);
  	    }
! 	  else if (!pos
! 		   && TREE_CODE (curpos) == PLUS_EXPR
  		   && tree_fits_uhwi_p (TREE_OPERAND (curpos, 1))
  		   && TREE_CODE (TREE_OPERAND (curpos, 0)) == MULT_EXPR
  		   && tree_fits_uhwi_p
--- 2223,2229 ----
  	      last_pos = round_up (last_pos, align);
  	      pos = compute_related_constant (curpos, last_pos);
  	    }
! 	  else if (TREE_CODE (curpos) == PLUS_EXPR
  		   && tree_fits_uhwi_p (TREE_OPERAND (curpos, 1))
  		   && TREE_CODE (TREE_OPERAND (curpos, 0)) == MULT_EXPR
  		   && tree_fits_uhwi_p
*************** rest_of_record_type_compilation (tree re
*** 2159,2178 ****
  	      last_pos = round_up (last_pos, align);
  	      pos = compute_related_constant (curpos, last_pos);
  	    }
! 	  else if (potential_alignment_gap (prev_old_field, old_field, pos))
  	    {
! 	      align = TYPE_ALIGN (field_type);
  	      last_pos = round_up (last_pos, align);
  	      pos = compute_related_constant (curpos, last_pos);
  	    }
  
- 	  /* If we can't compute a position, set it to zero.
- 
- 	     ??? We really should abort here, but it's too much work
- 	     to get this correct for all cases.  */
- 	  if (!pos)
- 	    pos = bitsize_zero_node;
- 
  	  /* See if this type is variable-sized and make a pointer type
  	     and indicate the indirection if so.  Beware that the debug
  	     back-end may adjust the position computed above according
--- 2239,2251 ----
  	      last_pos = round_up (last_pos, align);
  	      pos = compute_related_constant (curpos, last_pos);
  	    }
! 	  else
  	    {
! 	      align = DECL_ALIGN (old_field);
  	      last_pos = round_up (last_pos, align);
  	      pos = compute_related_constant (curpos, last_pos);
  	    }
  
  	  /* See if this type is variable-sized and make a pointer type
  	     and indicate the indirection if so.  Beware that the debug
  	     back-end may adjust the position computed above according
*************** rest_of_record_type_compilation (tree re
*** 2180,2194 ****
  	     in this case, if we don't preventively counter that.  */
  	  if (TREE_CODE (DECL_SIZE (old_field)) != INTEGER_CST)
  	    {
! 	      field_type = build_pointer_type (field_type);
! 	      if (align != 0 && TYPE_ALIGN (field_type) > align)
  		{
! 		  field_type = copy_type (field_type);
! 		  SET_TYPE_ALIGN (field_type, align);
  		}
- 	      var = true;
  	    }
  
  	  /* Make a new field name, if necessary.  */
  	  if (var || align != 0)
  	    {
--- 2253,2278 ----
  	     in this case, if we don't preventively counter that.  */
  	  if (TREE_CODE (DECL_SIZE (old_field)) != INTEGER_CST)
  	    {
! 	      field_type = copy_type (build_pointer_type (field_type));
! 	      SET_TYPE_ALIGN (field_type, BITS_PER_UNIT);
! 	      var = true;
! 
! 	      /* ??? Kludge to work around a bug in Workbench's debugger.  */
! 	      if (align == 0)
  		{
! 		  align = DECL_ALIGN (old_field);
! 		  last_pos = round_up (last_pos, align);
! 		  pos = compute_related_constant (curpos, last_pos);
  		}
  	    }
  
+ 	  /* If we can't compute a position, set it to zero.
+ 
+ 	     ??? We really should abort here, but it's too much work
+ 	     to get this correct for all cases.  */
+ 	  if (!pos)
+ 	    pos = bitsize_zero_node;
+ 
  	  /* Make a new field name, if necessary.  */
  	  if (var || align != 0)
  	    {
*************** rest_of_record_type_compilation (tree re
*** 2206,2211 ****
--- 2290,2305 ----
  	  new_field
  	    = create_field_decl (field_name, field_type, new_record_type,
  				 DECL_SIZE (old_field), pos, 0, 0);
+ 	  /* The specified position is not the actual position of the field
+ 	     but the gap with the previous field, so the computation of the
+ 	     bit-field status may be incorrect.  We adjust it manually to
+ 	     avoid generating useless attributes for the field in DWARF.  */
+ 	  if (DECL_SIZE (old_field) == TYPE_SIZE (field_type)
+ 	      && value_factor_p (pos, BITS_PER_UNIT))
+ 	    {
+ 	      DECL_BIT_FIELD (new_field) = 0;
+ 	      DECL_BIT_FIELD_TYPE (new_field) = NULL_TREE;
+ 	    }
  	  DECL_CHAIN (new_field) = TYPE_FIELDS (new_record_type);
  	  TYPE_FIELDS (new_record_type) = new_field;
  
*************** rest_of_record_type_compilation (tree re
*** 2219,2225 ****
  				  == QUAL_UNION_TYPE)
  				 ? bitsize_zero_node
  				 : DECL_SIZE (old_field));
- 	  prev_old_field = old_field;
  	}
  
        TYPE_FIELDS (new_record_type) = nreverse (TYPE_FIELDS (new_record_type));
--- 2313,2318 ----
*************** merge_sizes (tree last_size, tree first_
*** 2268,2286 ****
    return new_size;
  }
  
  /* Return the bit position of FIELD, in bits from the start of the record,
     and fold it as much as possible.  This is a tree of type bitsizetype.  */
  
  static tree
  fold_bit_position (const_tree field)
  {
!   tree offset = DECL_FIELD_OFFSET (field);
!   if (TREE_CODE (offset) == MULT_EXPR || TREE_CODE (offset) == PLUS_EXPR)
!     offset = size_binop (TREE_CODE (offset),
! 			 fold_convert (bitsizetype, TREE_OPERAND (offset, 0)),
! 			 fold_convert (bitsizetype, TREE_OPERAND (offset, 1)));
!   else
!     offset = fold_convert (bitsizetype, offset);
    return size_binop (PLUS_EXPR, DECL_FIELD_BIT_OFFSET (field),
   		     size_binop (MULT_EXPR, offset, bitsize_unit_node));
  }
--- 2361,2387 ----
    return new_size;
  }
  
+ /* Convert the size expression EXPR to TYPE and fold the result.  */
+ 
+ static tree
+ fold_convert_size (tree type, tree expr)
+ {
+   /* We assume that size expressions do not wrap around.  */
+   if (TREE_CODE (expr) == MULT_EXPR || TREE_CODE (expr) == PLUS_EXPR)
+     return size_binop (TREE_CODE (expr),
+ 		       fold_convert_size (type, TREE_OPERAND (expr, 0)),
+ 		       fold_convert_size (type, TREE_OPERAND (expr, 1)));
+ 
+   return fold_convert (type, expr);
+ }
+ 
  /* Return the bit position of FIELD, in bits from the start of the record,
     and fold it as much as possible.  This is a tree of type bitsizetype.  */
  
  static tree
  fold_bit_position (const_tree field)
  {
!   tree offset = fold_convert_size (bitsizetype, DECL_FIELD_OFFSET (field));
    return size_binop (PLUS_EXPR, DECL_FIELD_BIT_OFFSET (field),
   		     size_binop (MULT_EXPR, offset, bitsize_unit_node));
  }
*************** create_var_decl (tree name, tree asm_nam
*** 2650,2662 ****
        && !have_global_bss_p ())
      DECL_COMMON (var_decl) = 1;
  
!   /* Do not emit debug info for a CONST_DECL if optimization isn't enabled,
!      since we will create an associated variable.  Likewise for an external
!      constant whose initializer is not absolute, because this would mean a
!      global relocation in a read-only section which runs afoul of the PE-COFF
!      run-time relocation mechanism.  */
    if (!debug_info_p
-       || (TREE_CODE (var_decl) == CONST_DECL && !optimize)
        || (extern_flag
  	  && constant_p
  	  && init
--- 2751,2761 ----
        && !have_global_bss_p ())
      DECL_COMMON (var_decl) = 1;
  
!   /* Do not emit debug info if not requested, or for an external constant whose
!      initializer is not absolute because this would require a global relocation
!      in a read-only section which runs afoul of the PE-COFF run-time relocation
!      mechanism.  */
    if (!debug_info_p
        || (extern_flag
  	  && constant_p
  	  && init
*************** create_var_decl (tree name, tree asm_nam
*** 2683,2692 ****
    return var_decl;
  }
  
! /* Return true if TYPE, an aggregate type, contains (or is) an array.  */
  
! static bool
! aggregate_type_contains_array_p (tree type)
  {
    switch (TREE_CODE (type))
      {
--- 2782,2793 ----
    return var_decl;
  }
  
! /* Return true if TYPE, an aggregate type, contains (or is) an array.
!    If SELF_REFERENTIAL is true, then an additional requirement on the
!    array is that it be self-referential.  */
  
! bool
! aggregate_type_contains_array_p (tree type, bool self_referential)
  {
    switch (TREE_CODE (type))
      {
*************** aggregate_type_contains_array_p (tree ty
*** 2697,2709 ****
  	tree field;
  	for (field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field))
  	  if (AGGREGATE_TYPE_P (TREE_TYPE (field))
! 	      && aggregate_type_contains_array_p (TREE_TYPE (field)))
  	    return true;
  	return false;
        }
  
      case ARRAY_TYPE:
!       return true;
  
      default:
        gcc_unreachable ();
--- 2798,2811 ----
  	tree field;
  	for (field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field))
  	  if (AGGREGATE_TYPE_P (TREE_TYPE (field))
! 	      && aggregate_type_contains_array_p (TREE_TYPE (field),
! 						  self_referential))
  	    return true;
  	return false;
        }
  
      case ARRAY_TYPE:
!       return self_referential ? type_contains_placeholder_p (type) : true;
  
      default:
        gcc_unreachable ();
*************** create_field_decl (tree name, tree type,
*** 2727,2744 ****
    DECL_CONTEXT (field_decl) = record_type;
    TREE_READONLY (field_decl) = TYPE_READONLY (type);
  
-   /* If FIELD_TYPE is BLKmode, we must ensure this is aligned to at least a
-      byte boundary since GCC cannot handle less-aligned BLKmode bitfields.
-      Likewise for an aggregate without specified position that contains an
-      array, because in this case slices of variable length of this array
-      must be handled by GCC and variable-sized objects need to be aligned
-      to at least a byte boundary.  */
-   if (packed && (TYPE_MODE (type) == BLKmode
- 		 || (!pos
- 		     && AGGREGATE_TYPE_P (type)
- 		     && aggregate_type_contains_array_p (type))))
-     SET_DECL_ALIGN (field_decl, BITS_PER_UNIT);
- 
    /* If a size is specified, use it.  Otherwise, if the record type is packed
       compute a size to use, which may differ from the object's natural size.
       We always set a size in this case to trigger the checks for bitfield
--- 2829,2834 ----
*************** create_field_decl (tree name, tree type,
*** 2753,2762 ****
  	size = round_up (size, BITS_PER_UNIT);
      }
  
!   /* If we may, according to ADDRESSABLE, make a bitfield when the size is
!      specified for two reasons: first if the size differs from the natural
!      size; second, if the alignment is insufficient.  There are a number of
!      ways the latter can be true.
  
       We never make a bitfield if the type of the field has a nonconstant size,
       because no such entity requiring bitfield operations should reach here.
--- 2843,2851 ----
  	size = round_up (size, BITS_PER_UNIT);
      }
  
!   /* If we may, according to ADDRESSABLE, then make a bitfield when the size
!      is specified for two reasons: first, when it differs from the natural
!      size; second, when the alignment is insufficient.
  
       We never make a bitfield if the type of the field has a nonconstant size,
       because no such entity requiring bitfield operations should reach here.
*************** create_field_decl (tree name, tree type,
*** 2772,2788 ****
        && size
        && TREE_CODE (size) == INTEGER_CST
        && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
!       && (!tree_int_cst_equal (size, TYPE_SIZE (type))
  	  || (pos && !value_factor_p (pos, TYPE_ALIGN (type)))
! 	  || packed
! 	  || (TYPE_ALIGN (record_type) != 0
  	      && TYPE_ALIGN (record_type) < TYPE_ALIGN (type))))
      {
        DECL_BIT_FIELD (field_decl) = 1;
        DECL_SIZE (field_decl) = size;
        if (!packed && !pos)
  	{
! 	  if (TYPE_ALIGN (record_type) != 0
  	      && TYPE_ALIGN (record_type) < TYPE_ALIGN (type))
  	    SET_DECL_ALIGN (field_decl, TYPE_ALIGN (record_type));
  	  else
--- 2861,2877 ----
        && size
        && TREE_CODE (size) == INTEGER_CST
        && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
!       && (packed
! 	  || !tree_int_cst_equal (size, TYPE_SIZE (type))
  	  || (pos && !value_factor_p (pos, TYPE_ALIGN (type)))
! 	  || (TYPE_ALIGN (record_type)
  	      && TYPE_ALIGN (record_type) < TYPE_ALIGN (type))))
      {
        DECL_BIT_FIELD (field_decl) = 1;
        DECL_SIZE (field_decl) = size;
        if (!packed && !pos)
  	{
! 	  if (TYPE_ALIGN (record_type)
  	      && TYPE_ALIGN (record_type) < TYPE_ALIGN (type))
  	    SET_DECL_ALIGN (field_decl, TYPE_ALIGN (record_type));
  	  else
*************** create_field_decl (tree name, tree type,
*** 2792,2814 ****
  
    DECL_PACKED (field_decl) = pos ? DECL_BIT_FIELD (field_decl) : packed;
  
    /* Bump the alignment if need be, either for bitfield/packing purposes or
!      to satisfy the type requirements if no such consideration applies.  When
       we get the alignment from the type, indicate if this is from an explicit
       user request, which prevents stor-layout from lowering it later on.  */
!   {
!     unsigned int bit_align
!       = (DECL_BIT_FIELD (field_decl) ? 1
! 	 : packed && TYPE_MODE (type) != BLKmode ? BITS_PER_UNIT : 0);
  
!     if (bit_align > DECL_ALIGN (field_decl))
!       SET_DECL_ALIGN (field_decl, bit_align);
!     else if (!bit_align && TYPE_ALIGN (type) > DECL_ALIGN (field_decl))
!       {
! 	SET_DECL_ALIGN (field_decl, TYPE_ALIGN (type));
! 	DECL_USER_ALIGN (field_decl) = TYPE_USER_ALIGN (type);
!       }
!   }
  
    if (pos)
      {
--- 2881,2919 ----
  
    DECL_PACKED (field_decl) = pos ? DECL_BIT_FIELD (field_decl) : packed;
  
+   /* If FIELD_TYPE is BLKmode, we must ensure this is aligned to at least a
+      byte boundary since GCC cannot handle less-aligned BLKmode bitfields.
+      Likewise for an aggregate without specified position that contains an
+      array, because in this case slices of variable length of this array
+      must be handled by GCC and variable-sized objects need to be aligned
+      to at least a byte boundary.  */
+   if (packed && (TYPE_MODE (type) == BLKmode
+ 		 || (!pos
+ 		     && AGGREGATE_TYPE_P (type)
+ 		     && aggregate_type_contains_array_p (type, false))))
+     SET_DECL_ALIGN (field_decl, BITS_PER_UNIT);
+ 
    /* Bump the alignment if need be, either for bitfield/packing purposes or
!      to satisfy the type requirements if no such considerations apply.  When
       we get the alignment from the type, indicate if this is from an explicit
       user request, which prevents stor-layout from lowering it later on.  */
!   else
!     {
!       const unsigned int field_align
! 	= DECL_BIT_FIELD (field_decl)
! 	  ? 1
! 	  : packed
! 	    ? BITS_PER_UNIT
! 	    : 0;
  
!       if (field_align > DECL_ALIGN (field_decl))
! 	SET_DECL_ALIGN (field_decl, field_align);
!       else if (!field_align && TYPE_ALIGN (type) > DECL_ALIGN (field_decl))
! 	{
! 	  SET_DECL_ALIGN (field_decl, TYPE_ALIGN (type));
! 	  DECL_USER_ALIGN (field_decl) = TYPE_USER_ALIGN (type);
! 	}
!     }
  
    if (pos)
      {
*************** process_attributes (tree *node, struct a
*** 2964,2973 ****
     a power of 2. */
  
  bool
! value_factor_p (tree value, HOST_WIDE_INT factor)
  {
    if (tree_fits_uhwi_p (value))
!     return tree_to_uhwi (value) % factor == 0;
  
    if (TREE_CODE (value) == MULT_EXPR)
      return (value_factor_p (TREE_OPERAND (value, 0), factor)
--- 3069,3080 ----
     a power of 2. */
  
  bool
! value_factor_p (tree value, unsigned HOST_WIDE_INT factor)
  {
+   gcc_checking_assert (pow2p_hwi (factor));
+ 
    if (tree_fits_uhwi_p (value))
!     return (tree_to_uhwi (value) & (factor - 1)) == 0;
  
    if (TREE_CODE (value) == MULT_EXPR)
      return (value_factor_p (TREE_OPERAND (value, 0), factor)
*************** scale_by_factor_of (tree expr, unsigned
*** 3165,3216 ****
    return factor * value;
  }
  
- /* Given two consecutive field decls PREV_FIELD and CURR_FIELD, return true
-    unless we can prove these 2 fields are laid out in such a way that no gap
-    exist between the end of PREV_FIELD and the beginning of CURR_FIELD.  OFFSET
-    is the distance in bits between the end of PREV_FIELD and the starting
-    position of CURR_FIELD. It is ignored if null. */
- 
- static bool
- potential_alignment_gap (tree prev_field, tree curr_field, tree offset)
- {
-   /* If this is the first field of the record, there cannot be any gap */
-   if (!prev_field)
-     return false;
- 
-   /* If the previous field is a union type, then return false: The only
-      time when such a field is not the last field of the record is when
-      there are other components at fixed positions after it (meaning there
-      was a rep clause for every field), in which case we don't want the
-      alignment constraint to override them. */
-   if (TREE_CODE (TREE_TYPE (prev_field)) == QUAL_UNION_TYPE)
-     return false;
- 
-   /* If the distance between the end of prev_field and the beginning of
-      curr_field is constant, then there is a gap if the value of this
-      constant is not null. */
-   if (offset && tree_fits_uhwi_p (offset))
-     return !integer_zerop (offset);
- 
-   /* If the size and position of the previous field are constant,
-      then check the sum of this size and position. There will be a gap
-      iff it is not multiple of the current field alignment. */
-   if (tree_fits_uhwi_p (DECL_SIZE (prev_field))
-       && tree_fits_uhwi_p (bit_position (prev_field)))
-     return ((tree_to_uhwi (bit_position (prev_field))
- 	     + tree_to_uhwi (DECL_SIZE (prev_field)))
- 	    % DECL_ALIGN (curr_field) != 0);
- 
-   /* If both the position and size of the previous field are multiples
-      of the current field alignment, there cannot be any gap. */
-   if (value_factor_p (bit_position (prev_field), DECL_ALIGN (curr_field))
-       && value_factor_p (DECL_SIZE (prev_field), DECL_ALIGN (curr_field)))
-     return false;
- 
-   /* Fallback, return that there may be a potential gap */
-   return true;
- }
- 
  /* Return a LABEL_DECL with NAME.  GNAT_NODE is used for the position of
     the decl.  */
  
--- 3272,3277 ----
*************** begin_subprog_body (tree subprog_decl)
*** 3394,3401 ****
    for (param_decl = DECL_ARGUMENTS (subprog_decl); param_decl;
         param_decl = DECL_CHAIN (param_decl))
      DECL_CONTEXT (param_decl) = subprog_decl;
- 
-   make_decl_rtl (subprog_decl);
  }
  
  /* Finish translating the current subprogram and set its BODY.  */
--- 3455,3460 ----
*************** build_template (tree template_type, tree
*** 3873,3899 ****
  	  && TYPE_HAS_ACTUAL_BOUNDS_P (array_type)))
      bound_list = TYPE_ACTUAL_BOUNDS (array_type);
  
!   /* First make the list for a CONSTRUCTOR for the template.  Go down the
!      field list of the template instead of the type chain because this
!      array might be an Ada array of arrays and we can't tell where the
!      nested arrays stop being the underlying object.  */
! 
!   for (field = TYPE_FIELDS (template_type); field;
!        (bound_list
! 	? (bound_list = TREE_CHAIN (bound_list))
! 	: (array_type = TREE_TYPE (array_type))),
         field = DECL_CHAIN (DECL_CHAIN (field)))
      {
        tree bounds, min, max;
  
        /* If we have a bound list, get the bounds from there.  Likewise
  	 for an ARRAY_TYPE.  Otherwise, if expr is a PARM_DECL with
! 	 DECL_BY_COMPONENT_PTR_P, use the bounds of the field in the template.
! 	 This will give us a maximum range.  */
        if (bound_list)
! 	bounds = TREE_VALUE (bound_list);
        else if (TREE_CODE (array_type) == ARRAY_TYPE)
! 	bounds = TYPE_INDEX_TYPE (TYPE_DOMAIN (array_type));
        else if (expr && TREE_CODE (expr) == PARM_DECL
  	       && DECL_BY_COMPONENT_PTR_P (expr))
  	bounds = TREE_TYPE (field);
--- 3932,3961 ----
  	  && TYPE_HAS_ACTUAL_BOUNDS_P (array_type)))
      bound_list = TYPE_ACTUAL_BOUNDS (array_type);
  
!   /* First make the list for a CONSTRUCTOR for the template.  Go down
!      the field list of the template instead of the type chain because
!      this array might be an Ada array of array and we can't tell where
!      the nested array stop being the underlying object.  */
!   for (field = TYPE_FIELDS (template_type);
!        field;
         field = DECL_CHAIN (DECL_CHAIN (field)))
      {
        tree bounds, min, max;
  
        /* If we have a bound list, get the bounds from there.  Likewise
  	 for an ARRAY_TYPE.  Otherwise, if expr is a PARM_DECL with
! 	 DECL_BY_COMPONENT_PTR_P, use the bounds of the field in the
! 	 template, but this will only give us a maximum range.  */
        if (bound_list)
! 	{
! 	  bounds = TREE_VALUE (bound_list);
! 	  bound_list = TREE_CHAIN (bound_list);
! 	}
        else if (TREE_CODE (array_type) == ARRAY_TYPE)
! 	{
! 	  bounds = TYPE_INDEX_TYPE (TYPE_DOMAIN (array_type));
! 	  array_type = TREE_TYPE (array_type);
! 	}
        else if (expr && TREE_CODE (expr) == PARM_DECL
  	       && DECL_BY_COMPONENT_PTR_P (expr))
  	bounds = TREE_TYPE (field);
*************** convert_to_index_type (tree expr)
*** 4933,4939 ****
  
    /* If the type is unsigned, overflow is allowed so we cannot be sure that
       EXPR doesn't overflow.  Keep it simple if optimization is disabled.  */
!   if (TYPE_UNSIGNED (type) || !optimize)
      return convert (sizetype, expr);
  
    switch (code)
--- 4995,5001 ----
  
    /* If the type is unsigned, overflow is allowed so we cannot be sure that
       EXPR doesn't overflow.  Keep it simple if optimization is disabled.  */
!   if (TYPE_UNSIGNED (type) || !optimize || optimize_debug)
      return convert (sizetype, expr);
  
    switch (code)
*************** unchecked_convert (tree type, tree expr,
*** 5185,5192 ****
    if (etype == type)
      return expr;
  
!   /* If both types are integral just do a normal conversion.
!      Likewise for a conversion to an unconstrained array.  */
    if (((INTEGRAL_TYPE_P (type)
  	|| (POINTER_TYPE_P (type) && !TYPE_IS_THIN_POINTER_P (type))
  	|| (code == RECORD_TYPE && TYPE_JUSTIFIED_MODULAR_P (type)))
--- 5247,5254 ----
    if (etype == type)
      return expr;
  
!   /* If both types are integral or regular pointer, then just do a normal
!      conversion.  Likewise for a conversion to an unconstrained array.  */
    if (((INTEGRAL_TYPE_P (type)
  	|| (POINTER_TYPE_P (type) && !TYPE_IS_THIN_POINTER_P (type))
  	|| (code == RECORD_TYPE && TYPE_JUSTIFIED_MODULAR_P (type)))
*************** unchecked_convert (tree type, tree expr,
*** 5317,5330 ****
       we need to pad to have the same size on both sides.
  
       ??? We cannot do it unconditionally because unchecked conversions are
!      used liberally by the front-end to implement polymorphism, e.g. in:
  
         S191s : constant ada__tags__addr_ptr := ada__tags__addr_ptr!(S190s);
         return p___size__4 (p__object!(S191s.all));
  
!      so we skip all expressions that are references.  */
!   else if (!REFERENCE_CLASS_P (expr)
  	   && !AGGREGATE_TYPE_P (etype)
  	   && TREE_CONSTANT (TYPE_SIZE (type))
  	   && (c = tree_int_cst_compare (TYPE_SIZE (etype), TYPE_SIZE (type))))
      {
--- 5379,5394 ----
       we need to pad to have the same size on both sides.
  
       ??? We cannot do it unconditionally because unchecked conversions are
!      used liberally by the front-end to implement interface thunks:
  
+        type ada__tags__addr_ptr is access system.address;
         S191s : constant ada__tags__addr_ptr := ada__tags__addr_ptr!(S190s);
         return p___size__4 (p__object!(S191s.all));
  
!      so we need to skip dereferences.  */
!   else if (!INDIRECT_REF_P (expr)
  	   && !AGGREGATE_TYPE_P (etype)
+ 	   && ecode != UNCONSTRAINED_ARRAY_TYPE
  	   && TREE_CONSTANT (TYPE_SIZE (type))
  	   && (c = tree_int_cst_compare (TYPE_SIZE (etype), TYPE_SIZE (type))))
      {
*************** unchecked_convert (tree type, tree expr,
*** 5344,5349 ****
--- 5408,5438 ----
  	}
      }
  
+   /* Likewise if we are converting from a scalar type to a type with self-
+      referential size.  We use the max size to do the padding in this case.  */
+   else if (!INDIRECT_REF_P (expr)
+ 	   && !AGGREGATE_TYPE_P (etype)
+ 	   && ecode != UNCONSTRAINED_ARRAY_TYPE
+ 	   && CONTAINS_PLACEHOLDER_P (TYPE_SIZE (type)))
+     {
+       tree new_size = max_size (TYPE_SIZE (type), true);
+       c = tree_int_cst_compare (TYPE_SIZE (etype), new_size);
+       if (c < 0)
+ 	{
+ 	  expr = convert (maybe_pad_type (etype, new_size, 0, Empty,
+ 					  false, false, false, true),
+ 			  expr);
+ 	  expr = unchecked_convert (type, expr, notrunc_p);
+ 	}
+       else
+ 	{
+ 	  tree rec_type = maybe_pad_type (type, TYPE_SIZE (etype), 0, Empty,
+ 					  false, false, false, true);
+ 	  expr = unchecked_convert (rec_type, expr, notrunc_p);
+ 	  expr = build_component_ref (expr, TYPE_FIELDS (rec_type), false);
+ 	}
+     }
+ 
    /* We have a special case when we are converting between two unconstrained
       array types.  In that case, take the address, convert the fat pointer
       types, and dereference.  */
*************** gnat_write_global_declarations (void)
*** 5723,5728 ****
--- 5812,5822 ----
  	&& DECL_FUNCTION_IS_DEF (iter))
        debug_hooks->early_global_decl (iter);
  
+   /* Output global constants.  */
+   FOR_EACH_VEC_SAFE_ELT (global_decls, i, iter)
+     if (TREE_CODE (iter) == CONST_DECL && !DECL_IGNORED_P (iter))
+       debug_hooks->early_global_decl (iter);
+ 
    /* Then output the global variables.  We need to do that after the debug
       information for global types is emitted so that they are finalized.  Skip
       external global variables, unless we need to emit debug info for them:
*************** enum c_builtin_type
*** 5877,5882 ****
--- 5971,5977 ----
  				ARG6, ARG7) NAME,
  #define DEF_POINTER_TYPE(NAME, TYPE) NAME,
  #include "builtin-types.def"
+ #include "ada-builtin-types.def"
  #undef DEF_PRIMITIVE_TYPE
  #undef DEF_FUNCTION_TYPE_0
  #undef DEF_FUNCTION_TYPE_1
*************** install_builtin_function_types (void)
*** 6025,6030 ****
--- 6120,6126 ----
    builtin_types[(int) ENUM] = build_pointer_type (builtin_types[(int) TYPE]);
  
  #include "builtin-types.def"
+ #include "ada-builtin-types.def"
  
  #undef DEF_PRIMITIVE_TYPE
  #undef DEF_FUNCTION_TYPE_0
*************** handle_nonnull_attribute (tree *node, tr
*** 6197,6203 ****
  	  && (!TYPE_ATTRIBUTES (type)
  	      || !lookup_attribute ("type generic", TYPE_ATTRIBUTES (type))))
  	{
! 	  error ("nonnull attribute without arguments on a non-prototype");
  	  *no_add_attrs = true;
  	}
        return NULL_TREE;
--- 6293,6300 ----
  	  && (!TYPE_ATTRIBUTES (type)
  	      || !lookup_attribute ("type generic", TYPE_ATTRIBUTES (type))))
  	{
! 	  error ("%qs attribute without arguments on a non-prototype",
! 		 "nonnull");
  	  *no_add_attrs = true;
  	}
        return NULL_TREE;
*************** handle_nonnull_attribute (tree *node, tr
*** 6211,6218 ****
  
        if (!get_nonnull_operand (TREE_VALUE (args), &arg_num))
  	{
! 	  error ("nonnull argument has invalid operand number (argument %lu)",
! 		 (unsigned long) attr_arg_num);
  	  *no_add_attrs = true;
  	  return NULL_TREE;
  	}
--- 6308,6315 ----
  
        if (!get_nonnull_operand (TREE_VALUE (args), &arg_num))
  	{
! 	  error ("%qs argument has invalid operand number (argument %lu)",
! 		 "nonnull", (unsigned long) attr_arg_num);
  	  *no_add_attrs = true;
  	  return NULL_TREE;
  	}
*************** handle_nonnull_attribute (tree *node, tr
*** 6233,6240 ****
  	  if (!argument
  	      || TREE_CODE (argument) == VOID_TYPE)
  	    {
! 	      error ("nonnull argument with out-of-range operand number "
! 		     "(argument %lu, operand %lu)",
  		     (unsigned long) attr_arg_num, (unsigned long) arg_num);
  	      *no_add_attrs = true;
  	      return NULL_TREE;
--- 6330,6337 ----
  	  if (!argument
  	      || TREE_CODE (argument) == VOID_TYPE)
  	    {
! 	      error ("%qs argument with out-of-range operand number "
! 		     "(argument %lu, operand %lu)", "nonnull",
  		     (unsigned long) attr_arg_num, (unsigned long) arg_num);
  	      *no_add_attrs = true;
  	      return NULL_TREE;
*************** handle_nonnull_attribute (tree *node, tr
*** 6242,6249 ****
  
  	  if (TREE_CODE (argument) != POINTER_TYPE)
  	    {
! 	      error ("nonnull argument references non-pointer operand "
! 		     "(argument %lu, operand %lu)",
  		   (unsigned long) attr_arg_num, (unsigned long) arg_num);
  	      *no_add_attrs = true;
  	      return NULL_TREE;
--- 6339,6346 ----
  
  	  if (TREE_CODE (argument) != POINTER_TYPE)
  	    {
! 	      error ("%qs argument references non-pointer operand "
! 		     "(argument %lu, operand %lu)", "nonnull",
  		   (unsigned long) attr_arg_num, (unsigned long) arg_num);
  	      *no_add_attrs = true;
  	      return NULL_TREE;
*************** handle_noreturn_attribute (tree *node, t
*** 6327,6332 ****
--- 6424,6445 ----
    return NULL_TREE;
  }
  
+ /* Handle a "stack_protect" attribute; arguments as in
+    struct attribute_spec.handler.  */
+ 
+ static tree
+ handle_stack_protect_attribute (tree *node, tree name, tree, int,
+ 				bool *no_add_attrs)
+ {
+   if (TREE_CODE (*node) != FUNCTION_DECL)
+     {
+       warning (OPT_Wattributes, "%qE attribute ignored", name);
+       *no_add_attrs = true;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
  /* Handle a "noinline" attribute; arguments as in
     struct attribute_spec.handler.  */
  
*************** handle_noclone_attribute (tree *node, tr
*** 6372,6377 ****
--- 6485,6522 ----
    return NULL_TREE;
  }
  
+ /* Handle a "no_icf" attribute; arguments as in
+    struct attribute_spec.handler.  */
+ 
+ static tree
+ handle_noicf_attribute (tree *node, tree name,
+ 			tree ARG_UNUSED (args),
+ 			int ARG_UNUSED (flags), bool *no_add_attrs)
+ {
+   if (TREE_CODE (*node) != FUNCTION_DECL)
+     {
+       warning (OPT_Wattributes, "%qE attribute ignored", name);
+       *no_add_attrs = true;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Handle a "noipa" attribute; arguments as in
+    struct attribute_spec.handler.  */
+ 
+ static tree
+ handle_noipa_attribute (tree *node, tree name, tree, int, bool *no_add_attrs)
+ {
+   if (TREE_CODE (*node) != FUNCTION_DECL)
+     {
+       warning (OPT_Wattributes, "%qE attribute ignored", name);
+       *no_add_attrs = true;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
  /* Handle a "leaf" attribute; arguments as in
     struct attribute_spec.handler.  */
  
*************** handle_type_generic_attribute (tree *nod
*** 6462,6467 ****
--- 6607,6772 ----
    return NULL_TREE;
  }
  
+ /* Handle a "flatten" attribute; arguments as in
+    struct attribute_spec.handler.  */
+ 
+ static tree
+ handle_flatten_attribute (tree *node, tree name,
+ 			  tree args ATTRIBUTE_UNUSED,
+ 			  int flags ATTRIBUTE_UNUSED, bool *no_add_attrs)
+ {
+   if (TREE_CODE (*node) == FUNCTION_DECL)
+     /* Do nothing else, just set the attribute.  We'll get at
+        it later with lookup_attribute.  */
+     ;
+   else
+     {
+       warning (OPT_Wattributes, "%qE attribute ignored", name);
+       *no_add_attrs = true;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Handle a "used" attribute; arguments as in
+    struct attribute_spec.handler.  */
+ 
+ static tree
+ handle_used_attribute (tree *pnode, tree name, tree ARG_UNUSED (args),
+ 		       int ARG_UNUSED (flags), bool *no_add_attrs)
+ {
+   tree node = *pnode;
+ 
+   if (TREE_CODE (node) == FUNCTION_DECL
+       || (VAR_P (node) && TREE_STATIC (node))
+       || (TREE_CODE (node) == TYPE_DECL))
+     {
+       TREE_USED (node) = 1;
+       DECL_PRESERVE_P (node) = 1;
+       if (VAR_P (node))
+ 	DECL_READ_P (node) = 1;
+     }
+   else
+     {
+       warning (OPT_Wattributes, "%qE attribute ignored", name);
+       *no_add_attrs = true;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Handle a "cold" and attribute; arguments as in
+    struct attribute_spec.handler.  */
+ 
+ static tree
+ handle_cold_attribute (tree *node, tree name, tree ARG_UNUSED (args),
+ 		       int ARG_UNUSED (flags), bool *no_add_attrs)
+ {
+   if (TREE_CODE (*node) == FUNCTION_DECL
+       || TREE_CODE (*node) == LABEL_DECL)
+     {
+       /* Attribute cold processing is done later with lookup_attribute.  */
+     }
+   else
+     {
+       warning (OPT_Wattributes, "%qE attribute ignored", name);
+       *no_add_attrs = true;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Handle a "hot" and attribute; arguments as in
+    struct attribute_spec.handler.  */
+ 
+ static tree
+ handle_hot_attribute (tree *node, tree name, tree ARG_UNUSED (args),
+ 		      int ARG_UNUSED (flags), bool *no_add_attrs)
+ {
+   if (TREE_CODE (*node) == FUNCTION_DECL
+       || TREE_CODE (*node) == LABEL_DECL)
+     {
+       /* Attribute hot processing is done later with lookup_attribute.  */
+     }
+   else
+     {
+       warning (OPT_Wattributes, "%qE attribute ignored", name);
+       *no_add_attrs = true;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Handle a "target" attribute.  */
+ 
+ static tree
+ handle_target_attribute (tree *node, tree name, tree args, int flags,
+ 			 bool *no_add_attrs)
+ {
+   /* Ensure we have a function type.  */
+   if (TREE_CODE (*node) != FUNCTION_DECL)
+     {
+       warning (OPT_Wattributes, "%qE attribute ignored", name);
+       *no_add_attrs = true;
+     }
+   else if (lookup_attribute ("target_clones", DECL_ATTRIBUTES (*node)))
+     {
+       warning (OPT_Wattributes, "%qE attribute ignored due to conflict "
+ 		   "with %qs attribute", name, "target_clones");
+       *no_add_attrs = true;
+     }
+   else if (!targetm.target_option.valid_attribute_p (*node, name, args, flags))
+     *no_add_attrs = true;
+ 
+   /* Check that there's no empty string in values of the attribute.  */
+   for (tree t = args; t != NULL_TREE; t = TREE_CHAIN (t))
+     {
+       tree value = TREE_VALUE (t);
+       if (TREE_CODE (value) == STRING_CST
+ 	  && TREE_STRING_LENGTH (value) == 1
+ 	  && TREE_STRING_POINTER (value)[0] == '\0')
+ 	{
+ 	  warning (OPT_Wattributes, "empty string in attribute %<target%>");
+ 	  *no_add_attrs = true;
+ 	}
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Handle a "target_clones" attribute.  */
+ 
+ static tree
+ handle_target_clones_attribute (tree *node, tree name, tree ARG_UNUSED (args),
+ 			  int ARG_UNUSED (flags), bool *no_add_attrs)
+ {
+   /* Ensure we have a function type.  */
+   if (TREE_CODE (*node) == FUNCTION_DECL)
+     {
+       if (lookup_attribute ("always_inline", DECL_ATTRIBUTES (*node)))
+ 	{
+ 	  warning (OPT_Wattributes, "%qE attribute ignored due to conflict "
+ 		   "with %qs attribute", name, "always_inline");
+ 	  *no_add_attrs = true;
+ 	}
+       else if (lookup_attribute ("target", DECL_ATTRIBUTES (*node)))
+ 	{
+ 	  warning (OPT_Wattributes, "%qE attribute ignored due to conflict "
+ 		   "with %qs attribute", name, "target");
+ 	  *no_add_attrs = true;
+ 	}
+       else
+ 	/* Do not inline functions with multiple clone targets.  */
+ 	DECL_UNINLINABLE (*node) = 1;
+     }
+   else
+     {
+       warning (OPT_Wattributes, "%qE attribute ignored", name);
+       *no_add_attrs = true;
+     }
+   return NULL_TREE;
+ }
+ 
  /* Handle a "vector_size" attribute; arguments as in
     struct attribute_spec.handler.  */
  
*************** def_builtin_1 (enum built_in_function fn
*** 6573,6580 ****
  static int flag_isoc94 = 0;
  static int flag_isoc99 = 0;
  static int flag_isoc11 = 0;
  
! /* Install what the common builtins.def offers.  */
  
  static void
  install_builtin_functions (void)
--- 6878,6889 ----
  static int flag_isoc94 = 0;
  static int flag_isoc99 = 0;
  static int flag_isoc11 = 0;
+ static int flag_isoc2x = 0;
  
! /* Install what the common builtins.def offers plus our local additions.
! 
!    Note that ada-builtins.def is included first so that locally redefined
!    built-in functions take precedence over the commonly defined ones.  */
  
  static void
  install_builtin_functions (void)
*************** install_builtin_functions (void)
*** 6587,6592 ****
--- 6896,6905 ----
                     builtin_types[(int) LIBTYPE],                        \
                     BOTH_P, FALLBACK_P, NONANSI_P,                       \
                     built_in_attributes[(int) ATTRS], IMPLICIT);
+ #define DEF_ADA_BUILTIN(ENUM, NAME, TYPE, ATTRS)		\
+   DEF_BUILTIN (ENUM, "__builtin_" NAME, BUILT_IN_FRONTEND, TYPE, BT_LAST, \
+ 	       false, false, false, ATTRS, true, true)
+ #include "ada-builtins.def"
  #include "builtins.def"
  }
  
diff -Nrcpad gcc-9.3.0/gcc/ada/get_scos.adb gcc-10.1.0/gcc/ada/get_scos.adb
*** gcc-9.3.0/gcc/ada/get_scos.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/get_scos.adb	Thu May  7 10:49:59 2020
*************** procedure Get_SCOs is
*** 179,190 ****
           Skipc;
           C := Nextc;
           exit when C /= LF and then C /= CR;
- 
-          if C = ' ' then
-             Skip_Spaces;
-             C := Nextc;
-             exit when C /= LF and then C /= CR;
-          end if;
        end loop;
     end Skip_EOL;
  
--- 179,184 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/gnat1drv.adb gcc-10.1.0/gcc/ada/gnat1drv.adb
*** gcc-9.3.0/gcc/ada/gnat1drv.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/gnat1drv.adb	Thu May  7 10:49:59 2020
*************** with Output;    use Output;
*** 51,56 ****
--- 51,57 ----
  with Par_SCO;
  with Prepcomp;
  with Repinfo;
+ with Repinfo.Input;
  with Restrict;
  with Rident;    use Rident;
  with Rtsfind;
*************** with Sem_Ch12;
*** 61,70 ****
  with Sem_Ch13;
  with Sem_Elim;
  with Sem_Eval;
! with Sem_SPARK; use Sem_SPARK;
  with Sem_Type;
  with Set_Targ;
  with Sinfo;     use Sinfo;
  with Sinput.L;  use Sinput.L;
  with Snames;    use Snames;
  with Sprint;    use Sprint;
--- 62,72 ----
  with Sem_Ch13;
  with Sem_Elim;
  with Sem_Eval;
! with Sem_Prag;
  with Sem_Type;
  with Set_Targ;
  with Sinfo;     use Sinfo;
+ with Sinput;    use Sinput;
  with Sinput.L;  use Sinput.L;
  with Snames;    use Snames;
  with Sprint;    use Sprint;
*************** with Uname;     use Uname;
*** 81,86 ****
--- 83,89 ----
  with Urealp;
  with Usage;
  with Validsw;   use Validsw;
+ with Warnsw;    use Warnsw;
  
  with System.Assertions;
  with System.OS_Lib;
*************** procedure Gnat1drv is
*** 112,117 ****
--- 115,126 ----
     --  the information provided by the back end in back annotation of declared
     --  entities (e.g. actual size and alignment values chosen by the back end).
  
+    procedure Read_JSON_Files_For_Repinfo;
+    --  This procedure exercises the JSON parser of Repinfo by reading back the
+    --  JSON files generated by -gnatRjs in a previous compilation session. It
+    --  is intended to make sure that the JSON generator and the JSON parser are
+    --  kept synchronized when the JSON format evolves.
+ 
     ----------------------------
     -- Adjust_Global_Switches --
     ----------------------------
*************** procedure Gnat1drv is
*** 318,324 ****
              Elaboration_Check => True,
              others            => False);
  
!          Dynamic_Elaboration_Checks := False;
  
           --  Set STRICT mode for overflow checks if not set explicitly. This
           --  prevents suppressing of overflow checks by default, in code down
--- 327,338 ----
              Elaboration_Check => True,
              others            => False);
  
!          --  Need to enable dynamic elaboration checks to disable strict
!          --  static checking performed by gnatbind. We are at the same time
!          --  suppressing actual compile time elaboration checks to simplify
!          --  the generated code.
! 
!          Dynamic_Elaboration_Checks := True;
  
           --  Set STRICT mode for overflow checks if not set explicitly. This
           --  prevents suppressing of overflow checks by default, in code down
*************** procedure Gnat1drv is
*** 379,386 ****
           --  enough useful info.
  
           Reset_Validity_Check_Options;
!          Validity_Check_Default       := True;
!          Validity_Check_Copies        := True;
           Check_Validity_Of_Parameters := False;
  
           --  Turn off style check options and ignore any style check pragmas
--- 393,399 ----
           --  enough useful info.
  
           Reset_Validity_Check_Options;
!          Set_Validity_Check_Options ("dc");
           Check_Validity_Of_Parameters := False;
  
           --  Turn off style check options and ignore any style check pragmas
*************** procedure Gnat1drv is
*** 403,409 ****
  
           Relaxed_RM_Semantics := True;
  
!          if not Generate_CodePeer_Messages then
  
              --  Suppress compiler warnings by default when generating SCIL for
              --  CodePeer, except when combined with -gnateC where we do want to
--- 416,437 ----
  
           Relaxed_RM_Semantics := True;
  
!          if Generate_CodePeer_Messages then
! 
!             --  We do want to emit GNAT warnings when using -gnateC. But,
!             --  in CodePeer mode, warnings about memory representation are not
!             --  meaningful, thus, suppress them.
! 
!             Warn_On_Biased_Representation := False; -- -gnatw.b
!             Warn_On_Unrepped_Components := False;   -- -gnatw.c
!             Warn_On_Record_Holes := False;          -- -gnatw.h
!             Warn_On_Unchecked_Conversion := False;  -- -gnatwz
!             Warn_On_Size_Alignment := False;        -- -gnatw.z
!             Warn_On_Questionable_Layout := False;   -- -gnatw.q
!             Warn_On_Overridden_Size := False;       -- -gnatw.s
!             Warn_On_Reverse_Bit_Order := False;     -- -gnatw.v
! 
!          else
  
              --  Suppress compiler warnings by default when generating SCIL for
              --  CodePeer, except when combined with -gnateC where we do want to
*************** procedure Gnat1drv is
*** 775,780 ****
--- 803,812 ----
  
          not Generate_C_Code
  
+         --  No back-end inlining available in ASIS mode
+ 
+         and then not ASIS_Mode
+ 
          --  No back-end inlining in GNATprove mode, since it just confuses
          --  the formal verification process.
  
*************** procedure Gnat1drv is
*** 990,998 ****
  
        Atree.Unlock;
        Nlists.Unlock;
        Sem.Unlock;
!       Sem_Ch13.Validate_Compile_Time_Warning_Errors;
        Sem.Lock;
        Nlists.Lock;
        Atree.Lock;
  
--- 1022,1032 ----
  
        Atree.Unlock;
        Nlists.Unlock;
+       Elists.Unlock;
        Sem.Unlock;
!       Sem_Prag.Validate_Compile_Time_Warning_Errors;
        Sem.Lock;
+       Elists.Lock;
        Nlists.Lock;
        Atree.Lock;
  
*************** procedure Gnat1drv is
*** 1016,1021 ****
--- 1050,1088 ----
        --  end if;
     end Post_Compilation_Validation_Checks;
  
+    -----------------------------------
+    --  Read_JSON_Files_For_Repinfo  --
+    -----------------------------------
+ 
+    procedure Read_JSON_Files_For_Repinfo is
+    begin
+       --  This is the same loop construct as in Repinfo.List_Rep_Info
+ 
+       for U in Main_Unit .. Last_Unit loop
+          if In_Extended_Main_Source_Unit (Cunit_Entity (U)) then
+             declare
+                Nam   : constant String :=
+                          Get_Name_String
+                            (File_Name (Source_Index (U))) & ".json";
+                Namid : constant File_Name_Type    := Name_Enter (Nam);
+                Index : constant Source_File_Index := Load_Config_File (Namid);
+ 
+             begin
+                if Index = No_Source_File then
+                   Write_Str ("cannot locate ");
+                   Write_Line (Nam);
+                   raise Unrecoverable_Error;
+                end if;
+ 
+                Repinfo.Input.Read_JSON_Stream (Source_Text (Index).all, Nam);
+             exception
+                when Repinfo.Input.Invalid_JSON_Stream =>
+                   raise Unrecoverable_Error;
+             end;
+          end if;
+       end loop;
+    end Read_JSON_Files_For_Repinfo;
+ 
     --  Local variables
  
     Back_End_Mode : Back_End.Back_End_Mode_Type;
*************** begin
*** 1082,1088 ****
           --  Acquire target parameters from system.ads (package System source)
  
           Targparm_Acquire : declare
-             use Sinput;
  
              S : Source_File_Index;
              N : File_Name_Type;
--- 1149,1154 ----
*************** begin
*** 1346,1356 ****
  
        --  It is not an error to analyze in CodePeer mode a spec which requires
        --  a body, in order to generate SCIL for this spec.
-       --  Ditto for Generate_C_Code mode and generate a C header for a spec.
  
!       elsif CodePeer_Mode or Generate_C_Code then
           Back_End_Mode := Generate_Object;
  
        --  It is not an error to analyze in GNATprove mode a spec which requires
        --  a body, when the body is not available. During frame condition
        --  generation, the corresponding ALI file is generated. During
--- 1412,1436 ----
  
        --  It is not an error to analyze in CodePeer mode a spec which requires
        --  a body, in order to generate SCIL for this spec.
  
!       elsif CodePeer_Mode then
           Back_End_Mode := Generate_Object;
  
+       --  Differentiate use of -gnatceg to generate a C header from an Ada spec
+       --  to the CCG case (standard.h found) where C code generation should
+       --  only be performed on full units.
+ 
+       elsif Generate_C_Code then
+          Name_Len := 10;
+          Name_Buffer (1 .. Name_Len) := "standard.h";
+ 
+          if Find_File (Name_Find, Osint.Source, Full_Name => True) = No_File
+          then
+             Back_End_Mode := Generate_Object;
+          else
+             Back_End_Mode := Skip;
+          end if;
+ 
        --  It is not an error to analyze in GNATprove mode a spec which requires
        --  a body, when the body is not available. During frame condition
        --  generation, the corresponding ALI file is generated. During
*************** begin
*** 1453,1461 ****
  
           --  Generate ALI file if specially requested, or for missing subunits,
           --  subunits or predefined generic. For ignored ghost code, the object
!          --  file IS generated, so Object should be True.
  
!          if Opt.Force_ALI_Tree_File then
              Write_ALI (Object => Is_Ignored_Ghost_Unit (Main_Unit_Node));
           end if;
  
--- 1533,1545 ----
  
           --  Generate ALI file if specially requested, or for missing subunits,
           --  subunits or predefined generic. For ignored ghost code, the object
!          --  file IS generated, so Object should be True, and since the object
!          --  file is generated, we need to generate the ALI file. We never want
!          --  an object file without an ALI file.
  
!          if Is_Ignored_Ghost_Unit (Main_Unit_Node)
!            or else Opt.Force_ALI_Tree_File
!          then
              Write_ALI (Object => Is_Ignored_Ghost_Unit (Main_Unit_Node));
           end if;
  
*************** begin
*** 1521,1533 ****
  
        if GNATprove_Mode then
  
-          --  Perform the new SPARK checking rules for pointer aliasing. This is
-          --  only activated in GNATprove mode and on SPARK code.
- 
-          if Debug_Flag_FF then
-             Check_Safe_Pointers (Main_Unit_Node);
-          end if;
- 
           --  In GNATprove mode we're writing the ALI much earlier than usual
           --  as flow analysis needs the file present in order to append its
           --  own globals to it.
--- 1605,1610 ----
*************** begin
*** 1546,1551 ****
--- 1623,1634 ----
           Par_SCO.SCO_Record_Filtered;
        end if;
  
+       --  If -gnatd_j is specified, exercise the JSON parser of Repinfo
+ 
+       if Debug_Flag_Underscore_J then
+          Read_JSON_Files_For_Repinfo;
+       end if;
+ 
        --  Back end needs to explicitly unlock tables it needs to touch
  
        Atree.Lock;
diff -Nrcpad gcc-9.3.0/gcc/ada/gnat_rm.texi gcc-10.1.0/gcc/ada/gnat_rm.texi
*** gcc-9.3.0/gcc/ada/gnat_rm.texi	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/gnat_rm.texi	Thu May  7 10:49:59 2020
***************
*** 21,31 ****
  
  @copying
  @quotation
! GNAT Reference Manual , Sep 24, 2018
  
  AdaCore
  
! Copyright @copyright{} 2008-2019, Free Software Foundation
  @end quotation
  
  @end copying
--- 21,31 ----
  
  @copying
  @quotation
! GNAT Reference Manual , Dec 10, 2019
  
  AdaCore
  
! Copyright @copyright{} 2008-2020, Free Software Foundation
  @end quotation
  
  @end copying
*************** Implementation Defined Pragmas
*** 107,112 ****
--- 107,113 ----
  * Pragma Ada_2005:: 
  * Pragma Ada_12:: 
  * Pragma Ada_2012:: 
+ * Pragma Aggregate_Individually_Assign:: 
  * Pragma Allow_Integer_Address:: 
  * Pragma Annotate:: 
  * Pragma Assert:: 
*************** Implementation Defined Pragmas
*** 207,218 ****
  * Pragma Main_Storage:: 
  * Pragma Max_Queue_Length:: 
  * Pragma No_Body:: 
  * Pragma No_Component_Reordering:: 
  * Pragma No_Elaboration_Code_All:: 
  * Pragma No_Heap_Finalization:: 
  * Pragma No_Inline:: 
  * Pragma No_Return:: 
- * Pragma No_Run_Time:: 
  * Pragma No_Strict_Aliasing:: 
  * Pragma No_Tagged_Streams:: 
  * Pragma Normalize_Scalars:: 
--- 208,219 ----
  * Pragma Main_Storage:: 
  * Pragma Max_Queue_Length:: 
  * Pragma No_Body:: 
+ * Pragma No_Caching:: 
  * Pragma No_Component_Reordering:: 
  * Pragma No_Elaboration_Code_All:: 
  * Pragma No_Heap_Finalization:: 
  * Pragma No_Inline:: 
  * Pragma No_Return:: 
  * Pragma No_Strict_Aliasing:: 
  * Pragma No_Tagged_Streams:: 
  * Pragma Normalize_Scalars:: 
*************** Implementation Defined Aspects
*** 331,336 ****
--- 332,338 ----
  * Aspect Linker_Section:: 
  * Aspect Lock_Free:: 
  * Aspect Max_Queue_Length:: 
+ * Aspect No_Caching:: 
  * Aspect No_Elaboration_Code_All:: 
  * Aspect No_Inline:: 
  * Aspect No_Tagged_Streams:: 
*************** Implementation Advice
*** 575,581 ****
  * RM 13.9(14-17); Unchecked Conversion: RM 13 9 14-17 Unchecked Conversion. 
  * RM 13.11(23-25); Implicit Heap Usage: RM 13 11 23-25 Implicit Heap Usage. 
  * RM 13.11.2(17); Unchecked Deallocation: RM 13 11 2 17 Unchecked Deallocation. 
! * RM 13.13.2(17); Stream Oriented Attributes: RM 13 13 2 17 Stream Oriented Attributes. 
  * RM A.1(52); Names of Predefined Numeric Types: RM A 1 52 Names of Predefined Numeric Types. 
  * RM A.3.2(49); Ada.Characters.Handling: RM A 3 2 49 Ada Characters Handling. 
  * RM A.4.4(106); Bounded-Length String Handling: RM A 4 4 106 Bounded-Length String Handling. 
--- 577,583 ----
  * RM 13.9(14-17); Unchecked Conversion: RM 13 9 14-17 Unchecked Conversion. 
  * RM 13.11(23-25); Implicit Heap Usage: RM 13 11 23-25 Implicit Heap Usage. 
  * RM 13.11.2(17); Unchecked Deallocation: RM 13 11 2 17 Unchecked Deallocation. 
! * RM 13.13.2(1.6); Stream Oriented Attributes: RM 13 13 2 1 6 Stream Oriented Attributes. 
  * RM A.1(52); Names of Predefined Numeric Types: RM A 1 52 Names of Predefined Numeric Types. 
  * RM A.3.2(49); Ada.Characters.Handling: RM A 3 2 49 Ada Characters Handling. 
  * RM A.4.4(106); Bounded-Length String Handling: RM A 4 4 106 Bounded-Length String Handling. 
*************** The GNAT Library
*** 729,734 ****
--- 731,737 ----
  * GNAT.Array_Split (g-arrspl.ads): GNAT Array_Split g-arrspl ads. 
  * GNAT.AWK (g-awk.ads): GNAT AWK g-awk ads. 
  * GNAT.Bind_Environment (g-binenv.ads): GNAT Bind_Environment g-binenv ads. 
+ * GNAT.Branch_Prediction (g-brapre.ads): GNAT Branch_Prediction g-brapre ads. 
  * GNAT.Bounded_Buffers (g-boubuf.ads): GNAT Bounded_Buffers g-boubuf ads. 
  * GNAT.Bounded_Mailboxes (g-boumai.ads): GNAT Bounded_Mailboxes g-boumai ads. 
  * GNAT.Bubble_Sort (g-bubsor.ads): GNAT Bubble_Sort g-bubsor ads. 
*************** consideration, the use of these pragmas
*** 1181,1186 ****
--- 1184,1190 ----
  * Pragma Ada_2005:: 
  * Pragma Ada_12:: 
  * Pragma Ada_2012:: 
+ * Pragma Aggregate_Individually_Assign:: 
  * Pragma Allow_Integer_Address:: 
  * Pragma Annotate:: 
  * Pragma Assert:: 
*************** consideration, the use of these pragmas
*** 1281,1292 ****
  * Pragma Main_Storage:: 
  * Pragma Max_Queue_Length:: 
  * Pragma No_Body:: 
  * Pragma No_Component_Reordering:: 
  * Pragma No_Elaboration_Code_All:: 
  * Pragma No_Heap_Finalization:: 
  * Pragma No_Inline:: 
  * Pragma No_Return:: 
- * Pragma No_Run_Time:: 
  * Pragma No_Strict_Aliasing:: 
  * Pragma No_Tagged_Streams:: 
  * Pragma Normalize_Scalars:: 
--- 1285,1296 ----
  * Pragma Main_Storage:: 
  * Pragma Max_Queue_Length:: 
  * Pragma No_Body:: 
+ * Pragma No_Caching:: 
  * Pragma No_Component_Reordering:: 
  * Pragma No_Elaboration_Code_All:: 
  * Pragma No_Heap_Finalization:: 
  * Pragma No_Inline:: 
  * Pragma No_Return:: 
  * Pragma No_Strict_Aliasing:: 
  * Pragma No_Tagged_Streams:: 
  * Pragma Normalize_Scalars:: 
*************** extra subprograms marked this way from g
*** 1733,1739 ****
  otherwise legal pre-Ada_2012 programs. The one argument form is
  intended for exclusive use in the GNAT run-time library.
  
! @node Pragma Ada_2012,Pragma Allow_Integer_Address,Pragma Ada_12,Implementation Defined Pragmas
  @anchor{gnat_rm/implementation_defined_pragmas pragma-ada-2012}@anchor{27}
  @section Pragma Ada_2012
  
--- 1737,1743 ----
  otherwise legal pre-Ada_2012 programs. The one argument form is
  intended for exclusive use in the GNAT run-time library.
  
! @node Pragma Ada_2012,Pragma Aggregate_Individually_Assign,Pragma Ada_12,Implementation Defined Pragmas
  @anchor{gnat_rm/implementation_defined_pragmas pragma-ada-2012}@anchor{27}
  @section Pragma Ada_2012
  
*************** pragma Ada_2012;
*** 1747,1754 ****
  This configuration pragma is a synonym for pragma Ada_12 and has the
  same syntax and effect.
  
! @node Pragma Allow_Integer_Address,Pragma Annotate,Pragma Ada_2012,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-allow-integer-address}@anchor{28}
  @section Pragma Allow_Integer_Address
  
  
--- 1751,1774 ----
  This configuration pragma is a synonym for pragma Ada_12 and has the
  same syntax and effect.
  
! @node Pragma Aggregate_Individually_Assign,Pragma Allow_Integer_Address,Pragma Ada_2012,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-aggregate-individually-assign}@anchor{28}
! @section Pragma Aggregate_Individually_Assign
! 
! 
! Syntax:
! 
! @example
! pragma Aggregate_Individually_Assign;
! @end example
! 
! Where possible, GNAT will store the binary representation of a record aggregate
! in memory for space and performance reasons. This configuration pragma changes
! this behavior so that record aggregates are instead always converted into
! individual assignment statements.
! 
! @node Pragma Allow_Integer_Address,Pragma Annotate,Pragma Aggregate_Individually_Assign,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-allow-integer-address}@anchor{29}
  @section Pragma Allow_Integer_Address
  
  
*************** rather than rejected to allow common set
*** 1798,1804 ****
  in the two situations.
  
  @node Pragma Annotate,Pragma Assert,Pragma Allow_Integer_Address,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-annotate}@anchor{29}@anchor{gnat_rm/implementation_defined_pragmas id3}@anchor{2a}
  @section Pragma Annotate
  
  
--- 1818,1824 ----
  in the two situations.
  
  @node Pragma Annotate,Pragma Assert,Pragma Allow_Integer_Address,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-annotate}@anchor{2a}@anchor{gnat_rm/implementation_defined_pragmas id3}@anchor{2b}
  @section Pragma Annotate
  
  
*************** not otherwise analyze it. The second opt
*** 1816,1822 ****
  unanalyzed, and by convention is used to control the action of the tool to
  which the annotation is addressed.  The remaining ARG arguments
  can be either string literals or more generally expressions.
! String literals are assumed to be either of type
  @code{Standard.String} or else @code{Wide_String} or @code{Wide_Wide_String}
  depending on the character literals they contain.
  All other kinds of arguments are analyzed as expressions, and must be
--- 1836,1843 ----
  unanalyzed, and by convention is used to control the action of the tool to
  which the annotation is addressed.  The remaining ARG arguments
  can be either string literals or more generally expressions.
! String literals (and concatenations of string literals) are assumed to be
! either of type
  @code{Standard.String} or else @code{Wide_String} or @code{Wide_Wide_String}
  depending on the character literals they contain.
  All other kinds of arguments are analyzed as expressions, and must be
*************** affect the compilation process in any wa
*** 1832,1838 ****
  a configuration pragma.
  
  @node Pragma Assert,Pragma Assert_And_Cut,Pragma Annotate,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-assert}@anchor{2b}
  @section Pragma Assert
  
  
--- 1853,1859 ----
  a configuration pragma.
  
  @node Pragma Assert,Pragma Assert_And_Cut,Pragma Annotate,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-assert}@anchor{2c}
  @section Pragma Assert
  
  
*************** of Ada, and the DISABLE policy is an imp
*** 1898,1904 ****
  addition.
  
  @node Pragma Assert_And_Cut,Pragma Assertion_Policy,Pragma Assert,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-assert-and-cut}@anchor{2c}
  @section Pragma Assert_And_Cut
  
  
--- 1919,1925 ----
  addition.
  
  @node Pragma Assert_And_Cut,Pragma Assertion_Policy,Pragma Assert,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-assert-and-cut}@anchor{2d}
  @section Pragma Assert_And_Cut
  
  
*************** formal verification. The pragma also ser
*** 1925,1931 ****
  documentation.
  
  @node Pragma Assertion_Policy,Pragma Assume,Pragma Assert_And_Cut,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-assertion-policy}@anchor{2d}
  @section Pragma Assertion_Policy
  
  
--- 1946,1952 ----
  documentation.
  
  @node Pragma Assertion_Policy,Pragma Assume,Pragma Assert_And_Cut,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-assertion-policy}@anchor{2e}
  @section Pragma Assertion_Policy
  
  
*************** applies to @code{Assert}, @code{Assert_A
*** 2009,2015 ****
  @code{Assume}, @code{Loop_Invariant}, and @code{Loop_Variant}.
  
  @node Pragma Assume,Pragma Assume_No_Invalid_Values,Pragma Assertion_Policy,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-assume}@anchor{2e}
  @section Pragma Assume
  
  
--- 2030,2036 ----
  @code{Assume}, @code{Loop_Invariant}, and @code{Loop_Variant}.
  
  @node Pragma Assume,Pragma Assume_No_Invalid_Values,Pragma Assertion_Policy,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-assume}@anchor{2f}
  @section Pragma Assume
  
  
*************** is met, and documents the need to ensure
*** 2043,2049 ****
  reference to information outside the program.
  
  @node Pragma Assume_No_Invalid_Values,Pragma Async_Readers,Pragma Assume,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-assume-no-invalid-values}@anchor{2f}
  @section Pragma Assume_No_Invalid_Values
  
  
--- 2064,2070 ----
  reference to information outside the program.
  
  @node Pragma Assume_No_Invalid_Values,Pragma Async_Readers,Pragma Assume,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-assume-no-invalid-values}@anchor{30}
  @section Pragma Assume_No_Invalid_Values
  
  
*************** is erroneous so there are no guarantees
*** 2096,2130 ****
  case, and it is recommended that these two options not be used together.
  
  @node Pragma Async_Readers,Pragma Async_Writers,Pragma Assume_No_Invalid_Values,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-async-readers}@anchor{30}@anchor{gnat_rm/implementation_defined_pragmas id4}@anchor{31}
  @section Pragma Async_Readers
  
  
  Syntax:
  
  @example
! pragma Asynch_Readers [ (boolean_EXPRESSION) ];
  @end example
  
  For the semantics of this pragma, see the entry for aspect @code{Async_Readers} in
  the SPARK 2014 Reference Manual, section 7.1.2.
  
  @node Pragma Async_Writers,Pragma Attribute_Definition,Pragma Async_Readers,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id5}@anchor{32}@anchor{gnat_rm/implementation_defined_pragmas pragma-async-writers}@anchor{33}
  @section Pragma Async_Writers
  
  
  Syntax:
  
  @example
! pragma Asynch_Writers [ (boolean_EXPRESSION) ];
  @end example
  
  For the semantics of this pragma, see the entry for aspect @code{Async_Writers} in
  the SPARK 2014 Reference Manual, section 7.1.2.
  
  @node Pragma Attribute_Definition,Pragma C_Pass_By_Copy,Pragma Async_Writers,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-attribute-definition}@anchor{34}
  @section Pragma Attribute_Definition
  
  
--- 2117,2151 ----
  case, and it is recommended that these two options not be used together.
  
  @node Pragma Async_Readers,Pragma Async_Writers,Pragma Assume_No_Invalid_Values,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-async-readers}@anchor{31}@anchor{gnat_rm/implementation_defined_pragmas id4}@anchor{32}
  @section Pragma Async_Readers
  
  
  Syntax:
  
  @example
! pragma Async_Readers [ (boolean_EXPRESSION) ];
  @end example
  
  For the semantics of this pragma, see the entry for aspect @code{Async_Readers} in
  the SPARK 2014 Reference Manual, section 7.1.2.
  
  @node Pragma Async_Writers,Pragma Attribute_Definition,Pragma Async_Readers,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id5}@anchor{33}@anchor{gnat_rm/implementation_defined_pragmas pragma-async-writers}@anchor{34}
  @section Pragma Async_Writers
  
  
  Syntax:
  
  @example
! pragma Async_Writers [ (boolean_EXPRESSION) ];
  @end example
  
  For the semantics of this pragma, see the entry for aspect @code{Async_Writers} in
  the SPARK 2014 Reference Manual, section 7.1.2.
  
  @node Pragma Attribute_Definition,Pragma C_Pass_By_Copy,Pragma Async_Writers,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-attribute-definition}@anchor{35}
  @section Pragma Attribute_Definition
  
  
*************** code to be written that takes advantage
*** 2150,2156 ****
  compilable with earlier compilers.
  
  @node Pragma C_Pass_By_Copy,Pragma Check,Pragma Attribute_Definition,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-c-pass-by-copy}@anchor{35}
  @section Pragma C_Pass_By_Copy
  
  
--- 2171,2177 ----
  compilable with earlier compilers.
  
  @node Pragma C_Pass_By_Copy,Pragma Check,Pragma Attribute_Definition,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-c-pass-by-copy}@anchor{36}
  @section Pragma C_Pass_By_Copy
  
  
*************** You can also pass records by copy by spe
*** 2194,2200 ****
  passing mechanisms on a parameter by parameter basis.
  
  @node Pragma Check,Pragma Check_Float_Overflow,Pragma C_Pass_By_Copy,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-check}@anchor{36}
  @section Pragma Check
  
  
--- 2215,2221 ----
  passing mechanisms on a parameter by parameter basis.
  
  @node Pragma Check,Pragma Check_Float_Overflow,Pragma C_Pass_By_Copy,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-check}@anchor{37}
  @section Pragma Check
  
  
*************** of these identifiers in @code{Assertion_
*** 2233,2239 ****
  pragmas, where they are used to refer to sets of assertions.
  
  @node Pragma Check_Float_Overflow,Pragma Check_Name,Pragma Check,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-check-float-overflow}@anchor{37}
  @section Pragma Check_Float_Overflow
  
  
--- 2254,2260 ----
  pragmas, where they are used to refer to sets of assertions.
  
  @node Pragma Check_Float_Overflow,Pragma Check_Name,Pragma Check,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-check-float-overflow}@anchor{38}
  @section Pragma Check_Float_Overflow
  
  
*************** This mode can also be set by use of the
*** 2289,2295 ****
  switch @emph{-gnateF}.
  
  @node Pragma Check_Name,Pragma Check_Policy,Pragma Check_Float_Overflow,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-check-name}@anchor{38}
  @section Pragma Check_Name
  
  
--- 2310,2316 ----
  switch @emph{-gnateF}.
  
  @node Pragma Check_Name,Pragma Check_Policy,Pragma Check_Float_Overflow,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-check-name}@anchor{39}
  @section Pragma Check_Name
  
  
*************** Check names introduced by this pragma ar
*** 2325,2331 ****
  switches (in particular -gnatp) in the usual manner.
  
  @node Pragma Check_Policy,Pragma Comment,Pragma Check_Name,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-check-policy}@anchor{39}
  @section Pragma Check_Policy
  
  
--- 2346,2352 ----
  switches (in particular -gnatp) in the usual manner.
  
  @node Pragma Check_Policy,Pragma Comment,Pragma Check_Name,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-check-policy}@anchor{3a}
  @section Pragma Check_Policy
  
  
*************** policy setting @code{DISABLE} causes the
*** 2405,2411 ****
  @code{Check} pragma to be completely ignored and not analyzed.
  
  @node Pragma Comment,Pragma Common_Object,Pragma Check_Policy,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-comment}@anchor{3a}
  @section Pragma Comment
  
  
--- 2426,2432 ----
  @code{Check} pragma to be completely ignored and not analyzed.
  
  @node Pragma Comment,Pragma Common_Object,Pragma Check_Policy,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-comment}@anchor{3b}
  @section Pragma Comment
  
  
*************** anywhere in the main source unit), and i
*** 2424,2430 ****
  is used, all comments are retained.
  
  @node Pragma Common_Object,Pragma Compile_Time_Error,Pragma Comment,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-common-object}@anchor{3b}
  @section Pragma Common_Object
  
  
--- 2445,2451 ----
  is used, all comments are retained.
  
  @node Pragma Common_Object,Pragma Compile_Time_Error,Pragma Comment,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-common-object}@anchor{3c}
  @section Pragma Common_Object
  
  
*************** indicating that the necessary attribute
*** 2456,2462 ****
  pragma is not available.
  
  @node Pragma Compile_Time_Error,Pragma Compile_Time_Warning,Pragma Common_Object,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-compile-time-error}@anchor{3c}
  @section Pragma Compile_Time_Error
  
  
--- 2477,2483 ----
  pragma is not available.
  
  @node Pragma Compile_Time_Error,Pragma Compile_Time_Warning,Pragma Common_Object,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-compile-time-error}@anchor{3d}
  @section Pragma Compile_Time_Error
  
  
*************** the value given as the second argument.
*** 2483,2489 ****
  embedded ASCII.LF characters to break the message into multiple lines.
  
  @node Pragma Compile_Time_Warning,Pragma Compiler_Unit,Pragma Compile_Time_Error,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-compile-time-warning}@anchor{3d}
  @section Pragma Compile_Time_Warning
  
  
--- 2504,2510 ----
  embedded ASCII.LF characters to break the message into multiple lines.
  
  @node Pragma Compile_Time_Warning,Pragma Compiler_Unit,Pragma Compile_Time_Error,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-compile-time-warning}@anchor{3e}
  @section Pragma Compile_Time_Warning
  
  
*************** with a first parameter of True is to war
*** 2506,2512 ****
  for example that it is not fully implemented.
  
  @node Pragma Compiler_Unit,Pragma Compiler_Unit_Warning,Pragma Compile_Time_Warning,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-compiler-unit}@anchor{3e}
  @section Pragma Compiler_Unit
  
  
--- 2527,2533 ----
  for example that it is not fully implemented.
  
  @node Pragma Compiler_Unit,Pragma Compiler_Unit_Warning,Pragma Compile_Time_Warning,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-compiler-unit}@anchor{3f}
  @section Pragma Compiler_Unit
  
  
*************** retained so that old versions of the GNA
*** 2521,2527 ****
  be compiled with newer versions of the compiler.
  
  @node Pragma Compiler_Unit_Warning,Pragma Complete_Representation,Pragma Compiler_Unit,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-compiler-unit-warning}@anchor{3f}
  @section Pragma Compiler_Unit_Warning
  
  
--- 2542,2548 ----
  be compiled with newer versions of the compiler.
  
  @node Pragma Compiler_Unit_Warning,Pragma Complete_Representation,Pragma Compiler_Unit,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-compiler-unit-warning}@anchor{40}
  @section Pragma Compiler_Unit_Warning
  
  
*************** version of GNAT. For the exact list of r
*** 2539,2545 ****
  and references to Check_Compiler_Unit.
  
  @node Pragma Complete_Representation,Pragma Complex_Representation,Pragma Compiler_Unit_Warning,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-complete-representation}@anchor{40}
  @section Pragma Complete_Representation
  
  
--- 2560,2566 ----
  and references to Check_Compiler_Unit.
  
  @node Pragma Complete_Representation,Pragma Complex_Representation,Pragma Compiler_Unit_Warning,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-complete-representation}@anchor{41}
  @section Pragma Complete_Representation
  
  
*************** complete, and that this invariant is mai
*** 2558,2564 ****
  added to the record in the future.
  
  @node Pragma Complex_Representation,Pragma Component_Alignment,Pragma Complete_Representation,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-complex-representation}@anchor{41}
  @section Pragma Complex_Representation
  
  
--- 2579,2585 ----
  added to the record in the future.
  
  @node Pragma Complex_Representation,Pragma Component_Alignment,Pragma Complete_Representation,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-complex-representation}@anchor{42}
  @section Pragma Complex_Representation
  
  
*************** records by pointer, and the use of this
*** 2580,2586 ****
  this type in floating-point registers.
  
  @node Pragma Component_Alignment,Pragma Constant_After_Elaboration,Pragma Complex_Representation,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-component-alignment}@anchor{42}
  @section Pragma Component_Alignment
  
  
--- 2601,2607 ----
  this type in floating-point registers.
  
  @node Pragma Component_Alignment,Pragma Constant_After_Elaboration,Pragma Complex_Representation,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-component-alignment}@anchor{43}
  @section Pragma Component_Alignment
  
  
*************** pragma @code{Pack}, pragma @code{Compone
*** 2671,2677 ****
  clause), the GNAT uses the default alignment as described previously.
  
  @node Pragma Constant_After_Elaboration,Pragma Contract_Cases,Pragma Component_Alignment,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id6}@anchor{43}@anchor{gnat_rm/implementation_defined_pragmas pragma-constant-after-elaboration}@anchor{44}
  @section Pragma Constant_After_Elaboration
  
  
--- 2692,2698 ----
  clause), the GNAT uses the default alignment as described previously.
  
  @node Pragma Constant_After_Elaboration,Pragma Contract_Cases,Pragma Component_Alignment,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id6}@anchor{44}@anchor{gnat_rm/implementation_defined_pragmas pragma-constant-after-elaboration}@anchor{45}
  @section Pragma Constant_After_Elaboration
  
  
*************** For the semantics of this pragma, see th
*** 2685,2691 ****
  @code{Constant_After_Elaboration} in the SPARK 2014 Reference Manual, section 3.3.1.
  
  @node Pragma Contract_Cases,Pragma Convention_Identifier,Pragma Constant_After_Elaboration,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id7}@anchor{45}@anchor{gnat_rm/implementation_defined_pragmas pragma-contract-cases}@anchor{46}
  @section Pragma Contract_Cases
  
  
--- 2706,2712 ----
  @code{Constant_After_Elaboration} in the SPARK 2014 Reference Manual, section 3.3.1.
  
  @node Pragma Contract_Cases,Pragma Convention_Identifier,Pragma Constant_After_Elaboration,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id7}@anchor{46}@anchor{gnat_rm/implementation_defined_pragmas pragma-contract-cases}@anchor{47}
  @section Pragma Contract_Cases
  
  
*************** pragma Postcondition (if C2 then Pred2);
*** 2730,2736 ****
  The precondition ensures that one and only one of the case guards is
  satisfied on entry to the subprogram.
  The postcondition ensures that for the case guard that was True on entry,
! the corrresponding consequence is True on exit. Other consequence expressions
  are not evaluated.
  
  A precondition @code{P} and postcondition @code{Q} can also be
--- 2751,2757 ----
  The precondition ensures that one and only one of the case guards is
  satisfied on entry to the subprogram.
  The postcondition ensures that for the case guard that was True on entry,
! the corresponding consequence is True on exit. Other consequence expressions
  are not evaluated.
  
  A precondition @code{P} and postcondition @code{Q} can also be
*************** and that the consequence for this case s
*** 2770,2776 ****
  returns.
  
  @node Pragma Convention_Identifier,Pragma CPP_Class,Pragma Contract_Cases,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-convention-identifier}@anchor{47}
  @section Pragma Convention_Identifier
  
  
--- 2791,2797 ----
  returns.
  
  @node Pragma Convention_Identifier,Pragma CPP_Class,Pragma Contract_Cases,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-convention-identifier}@anchor{48}
  @section Pragma Convention_Identifier
  
  
*************** define a convention identifier @code{Lib
*** 2806,2812 ****
  would be used system-wide.
  
  @node Pragma CPP_Class,Pragma CPP_Constructor,Pragma Convention_Identifier,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-cpp-class}@anchor{48}
  @section Pragma CPP_Class
  
  
--- 2827,2833 ----
  would be used system-wide.
  
  @node Pragma CPP_Class,Pragma CPP_Constructor,Pragma Convention_Identifier,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-cpp-class}@anchor{49}
  @section Pragma CPP_Class
  
  
*************** functions (see pragma @code{CPP_Construc
*** 2831,2844 ****
  limited if not explicitly declared as limited or derived from a limited
  type, and an error is issued in that case.
  
! See @ref{49,,Interfacing to C++} for related information.
  
  Note: Pragma @code{CPP_Class} is currently obsolete. It is supported
  for backward compatibility but its functionality is available
  using pragma @code{Import} with @code{Convention} = @code{CPP}.
  
  @node Pragma CPP_Constructor,Pragma CPP_Virtual,Pragma CPP_Class,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-cpp-constructor}@anchor{4a}
  @section Pragma CPP_Constructor
  
  
--- 2852,2865 ----
  limited if not explicitly declared as limited or derived from a limited
  type, and an error is issued in that case.
  
! See @ref{4a,,Interfacing to C++} for related information.
  
  Note: Pragma @code{CPP_Class} is currently obsolete. It is supported
  for backward compatibility but its functionality is available
  using pragma @code{Import} with @code{Convention} = @code{CPP}.
  
  @node Pragma CPP_Constructor,Pragma CPP_Virtual,Pragma CPP_Class,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-cpp-constructor}@anchor{4b}
  @section Pragma CPP_Constructor
  
  
*************** on the Ada side and the type is implicit
*** 2889,2895 ****
  Pragma @code{CPP_Constructor} is intended primarily for automatic generation
  using an automatic binding generator tool (such as the @code{-fdump-ada-spec}
  GCC switch).
! See @ref{49,,Interfacing to C++} for more related information.
  
  Note: The use of functions returning class-wide types for constructors is
  currently obsolete. They are supported for backward compatibility. The
--- 2910,2916 ----
  Pragma @code{CPP_Constructor} is intended primarily for automatic generation
  using an automatic binding generator tool (such as the @code{-fdump-ada-spec}
  GCC switch).
! See @ref{4a,,Interfacing to C++} for more related information.
  
  Note: The use of functions returning class-wide types for constructors is
  currently obsolete. They are supported for backward compatibility. The
*************** because the imported C++ constructors al
*** 2898,2904 ****
  that is, they never return an object whose type is a descendant of type T.
  
  @node Pragma CPP_Virtual,Pragma CPP_Vtable,Pragma CPP_Constructor,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-cpp-virtual}@anchor{4b}
  @section Pragma CPP_Virtual
  
  
--- 2919,2925 ----
  that is, they never return an object whose type is a descendant of type T.
  
  @node Pragma CPP_Virtual,Pragma CPP_Vtable,Pragma CPP_Constructor,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-cpp-virtual}@anchor{4c}
  @section Pragma CPP_Virtual
  
  
*************** purposes. It used to be required to ensu
*** 2911,2920 ****
  is no longer required for that purpose because GNAT generates
  the same object layout as the G++ compiler by default.
  
! See @ref{49,,Interfacing to C++} for related information.
  
  @node Pragma CPP_Vtable,Pragma CPU,Pragma CPP_Virtual,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-cpp-vtable}@anchor{4c}
  @section Pragma CPP_Vtable
  
  
--- 2932,2941 ----
  is no longer required for that purpose because GNAT generates
  the same object layout as the G++ compiler by default.
  
! See @ref{4a,,Interfacing to C++} for related information.
  
  @node Pragma CPP_Vtable,Pragma CPU,Pragma CPP_Virtual,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-cpp-vtable}@anchor{4d}
  @section Pragma CPP_Vtable
  
  
*************** It used to be required to ensure compati
*** 2926,2935 ****
  is no longer required for that purpose because GNAT generates
  the same object layout as the G++ compiler by default.
  
! See @ref{49,,Interfacing to C++} for related information.
  
  @node Pragma CPU,Pragma Deadline_Floor,Pragma CPP_Vtable,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-cpu}@anchor{4d}
  @section Pragma CPU
  
  
--- 2947,2956 ----
  is no longer required for that purpose because GNAT generates
  the same object layout as the G++ compiler by default.
  
! See @ref{4a,,Interfacing to C++} for related information.
  
  @node Pragma CPU,Pragma Deadline_Floor,Pragma CPP_Vtable,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-cpu}@anchor{4e}
  @section Pragma CPU
  
  
*************** versions of Ada as an implementation-def
*** 2944,2950 ****
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Deadline_Floor,Pragma Default_Initial_Condition,Pragma CPU,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-deadline-floor}@anchor{4e}
  @section Pragma Deadline_Floor
  
  
--- 2965,2971 ----
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Deadline_Floor,Pragma Default_Initial_Condition,Pragma CPU,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-deadline-floor}@anchor{4f}
  @section Pragma Deadline_Floor
  
  
*************** deadline inherited by a task when the ta
*** 2959,2965 ****
  It is effective only when the EDF scheduling policy is used.
  
  @node Pragma Default_Initial_Condition,Pragma Debug,Pragma Deadline_Floor,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id8}@anchor{4f}@anchor{gnat_rm/implementation_defined_pragmas pragma-default-initial-condition}@anchor{50}
  @section Pragma Default_Initial_Condition
  
  
--- 2980,2986 ----
  It is effective only when the EDF scheduling policy is used.
  
  @node Pragma Default_Initial_Condition,Pragma Debug,Pragma Deadline_Floor,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id8}@anchor{50}@anchor{gnat_rm/implementation_defined_pragmas pragma-default-initial-condition}@anchor{51}
  @section Pragma Default_Initial_Condition
  
  
*************** For the semantics of this pragma, see th
*** 2973,2979 ****
  @code{Default_Initial_Condition} in the SPARK 2014 Reference Manual, section 7.3.3.
  
  @node Pragma Debug,Pragma Debug_Policy,Pragma Default_Initial_Condition,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-debug}@anchor{51}
  @section Pragma Debug
  
  
--- 2994,3000 ----
  @code{Default_Initial_Condition} in the SPARK 2014 Reference Manual, section 7.3.3.
  
  @node Pragma Debug,Pragma Debug_Policy,Pragma Default_Initial_Condition,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-debug}@anchor{52}
  @section Pragma Debug
  
  
*************** or by use of the pragma @code{Check_Poli
*** 3001,3007 ****
  @code{Debug}.
  
  @node Pragma Debug_Policy,Pragma Default_Scalar_Storage_Order,Pragma Debug,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-debug-policy}@anchor{52}
  @section Pragma Debug_Policy
  
  
--- 3022,3028 ----
  @code{Debug}.
  
  @node Pragma Debug_Policy,Pragma Default_Scalar_Storage_Order,Pragma Debug,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-debug-policy}@anchor{53}
  @section Pragma Debug_Policy
  
  
*************** with a first argument of @code{Debug}. I
*** 3016,3022 ****
  compatibility reasons.
  
  @node Pragma Default_Scalar_Storage_Order,Pragma Default_Storage_Pool,Pragma Debug_Policy,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-default-scalar-storage-order}@anchor{53}
  @section Pragma Default_Scalar_Storage_Order
  
  
--- 3037,3043 ----
  compatibility reasons.
  
  @node Pragma Default_Scalar_Storage_Order,Pragma Default_Storage_Pool,Pragma Debug_Policy,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-default-scalar-storage-order}@anchor{54}
  @section Pragma Default_Scalar_Storage_Order
  
  
*************** it may significantly degrade the run-tim
*** 3089,3095 ****
  the default scalar storage order ought to be changed only on a local basis.
  
  @node Pragma Default_Storage_Pool,Pragma Depends,Pragma Default_Scalar_Storage_Order,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-default-storage-pool}@anchor{54}
  @section Pragma Default_Storage_Pool
  
  
--- 3110,3116 ----
  the default scalar storage order ought to be changed only on a local basis.
  
  @node Pragma Default_Storage_Pool,Pragma Depends,Pragma Default_Scalar_Storage_Order,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-default-storage-pool}@anchor{55}
  @section Pragma Default_Storage_Pool
  
  
*************** versions of Ada as an implementation-def
*** 3106,3112 ****
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Depends,Pragma Detect_Blocking,Pragma Default_Storage_Pool,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-depends}@anchor{55}@anchor{gnat_rm/implementation_defined_pragmas id9}@anchor{56}
  @section Pragma Depends
  
  
--- 3127,3133 ----
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Depends,Pragma Detect_Blocking,Pragma Default_Storage_Pool,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-depends}@anchor{56}@anchor{gnat_rm/implementation_defined_pragmas id9}@anchor{57}
  @section Pragma Depends
  
  
*************** For the semantics of this pragma, see th
*** 3139,3145 ****
  SPARK 2014 Reference Manual, section 6.1.5.
  
  @node Pragma Detect_Blocking,Pragma Disable_Atomic_Synchronization,Pragma Depends,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-detect-blocking}@anchor{57}
  @section Pragma Detect_Blocking
  
  
--- 3160,3166 ----
  SPARK 2014 Reference Manual, section 6.1.5.
  
  @node Pragma Detect_Blocking,Pragma Disable_Atomic_Synchronization,Pragma Depends,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-detect-blocking}@anchor{58}
  @section Pragma Detect_Blocking
  
  
*************** blocking operations within a protected o
*** 3157,3163 ****
  if that happens.
  
  @node Pragma Disable_Atomic_Synchronization,Pragma Dispatching_Domain,Pragma Detect_Blocking,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-disable-atomic-synchronization}@anchor{58}
  @section Pragma Disable_Atomic_Synchronization
  
  
--- 3178,3184 ----
  if that happens.
  
  @node Pragma Disable_Atomic_Synchronization,Pragma Dispatching_Domain,Pragma Detect_Blocking,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-disable-atomic-synchronization}@anchor{59}
  @section Pragma Disable_Atomic_Synchronization
  
  
*************** till the end of the scope. If an @code{E
*** 3183,3189 ****
  the action applies only to that entity.
  
  @node Pragma Dispatching_Domain,Pragma Effective_Reads,Pragma Disable_Atomic_Synchronization,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-dispatching-domain}@anchor{59}
  @section Pragma Dispatching_Domain
  
  
--- 3204,3210 ----
  the action applies only to that entity.
  
  @node Pragma Dispatching_Domain,Pragma Effective_Reads,Pragma Disable_Atomic_Synchronization,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-dispatching-domain}@anchor{5a}
  @section Pragma Dispatching_Domain
  
  
*************** versions of Ada as an implementation-def
*** 3198,3204 ****
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Effective_Reads,Pragma Effective_Writes,Pragma Dispatching_Domain,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id10}@anchor{5a}@anchor{gnat_rm/implementation_defined_pragmas pragma-effective-reads}@anchor{5b}
  @section Pragma Effective_Reads
  
  
--- 3219,3225 ----
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Effective_Reads,Pragma Effective_Writes,Pragma Dispatching_Domain,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id10}@anchor{5b}@anchor{gnat_rm/implementation_defined_pragmas pragma-effective-reads}@anchor{5c}
  @section Pragma Effective_Reads
  
  
*************** For the semantics of this pragma, see th
*** 3212,3218 ****
  the SPARK 2014 Reference Manual, section 7.1.2.
  
  @node Pragma Effective_Writes,Pragma Elaboration_Checks,Pragma Effective_Reads,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id11}@anchor{5c}@anchor{gnat_rm/implementation_defined_pragmas pragma-effective-writes}@anchor{5d}
  @section Pragma Effective_Writes
  
  
--- 3233,3239 ----
  the SPARK 2014 Reference Manual, section 7.1.2.
  
  @node Pragma Effective_Writes,Pragma Elaboration_Checks,Pragma Effective_Reads,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id11}@anchor{5d}@anchor{gnat_rm/implementation_defined_pragmas pragma-effective-writes}@anchor{5e}
  @section Pragma Effective_Writes
  
  
*************** For the semantics of this pragma, see th
*** 3226,3232 ****
  in the SPARK 2014 Reference Manual, section 7.1.2.
  
  @node Pragma Elaboration_Checks,Pragma Eliminate,Pragma Effective_Writes,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-elaboration-checks}@anchor{5e}
  @section Pragma Elaboration_Checks
  
  
--- 3247,3253 ----
  in the SPARK 2014 Reference Manual, section 7.1.2.
  
  @node Pragma Elaboration_Checks,Pragma Eliminate,Pragma Effective_Writes,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-elaboration-checks}@anchor{5f}
  @section Pragma Elaboration_Checks
  
  
*************** effect. If the pragma argument is @code{
*** 3263,3269 ****
  is in effect.
  
  @node Pragma Eliminate,Pragma Enable_Atomic_Synchronization,Pragma Elaboration_Checks,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-eliminate}@anchor{5f}
  @section Pragma Eliminate
  
  
--- 3284,3290 ----
  is in effect.
  
  @node Pragma Eliminate,Pragma Enable_Atomic_Synchronization,Pragma Elaboration_Checks,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-eliminate}@anchor{60}
  @section Pragma Eliminate
  
  
*************** pragma Eliminate (Q, Proc,
*** 3423,3429 ****
  @end quotation
  
  @node Pragma Enable_Atomic_Synchronization,Pragma Export_Function,Pragma Eliminate,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-enable-atomic-synchronization}@anchor{60}
  @section Pragma Enable_Atomic_Synchronization
  
  
--- 3444,3450 ----
  @end quotation
  
  @node Pragma Enable_Atomic_Synchronization,Pragma Export_Function,Pragma Eliminate,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-enable-atomic-synchronization}@anchor{61}
  @section Pragma Enable_Atomic_Synchronization
  
  
*************** till the end of the scope. If an @code{E
*** 3451,3457 ****
  the action applies only to that entity.
  
  @node Pragma Export_Function,Pragma Export_Object,Pragma Enable_Atomic_Synchronization,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-export-function}@anchor{61}
  @section Pragma Export_Function
  
  
--- 3472,3478 ----
  the action applies only to that entity.
  
  @node Pragma Export_Function,Pragma Export_Object,Pragma Enable_Atomic_Synchronization,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-export-function}@anchor{62}
  @section Pragma Export_Function
  
  
*************** string. In this case, no external name i
*** 3523,3529 ****
  still allows the specification of parameter mechanisms.
  
  @node Pragma Export_Object,Pragma Export_Procedure,Pragma Export_Function,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-export-object}@anchor{62}
  @section Pragma Export_Object
  
  
--- 3544,3550 ----
  still allows the specification of parameter mechanisms.
  
  @node Pragma Export_Object,Pragma Export_Procedure,Pragma Export_Function,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-export-object}@anchor{63}
  @section Pragma Export_Object
  
  
*************** of portability), but it is not required.
*** 3548,3554 ****
  but otherwise ignored by GNAT.
  
  @node Pragma Export_Procedure,Pragma Export_Value,Pragma Export_Object,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-export-procedure}@anchor{63}
  @section Pragma Export_Procedure
  
  
--- 3569,3575 ----
  but otherwise ignored by GNAT.
  
  @node Pragma Export_Procedure,Pragma Export_Value,Pragma Export_Object,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-export-procedure}@anchor{64}
  @section Pragma Export_Procedure
  
  
*************** string. In this case, no external name i
*** 3601,3607 ****
  still allows the specification of parameter mechanisms.
  
  @node Pragma Export_Value,Pragma Export_Valued_Procedure,Pragma Export_Procedure,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-export-value}@anchor{64}
  @section Pragma Export_Value
  
  
--- 3622,3628 ----
  still allows the specification of parameter mechanisms.
  
  @node Pragma Export_Value,Pragma Export_Valued_Procedure,Pragma Export_Procedure,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-export-value}@anchor{65}
  @section Pragma Export_Value
  
  
*************** the application. This pragma is currentl
*** 3622,3628 ****
  AAMP target and is ignored for other targets.
  
  @node Pragma Export_Valued_Procedure,Pragma Extend_System,Pragma Export_Value,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-export-valued-procedure}@anchor{65}
  @section Pragma Export_Valued_Procedure
  
  
--- 3643,3649 ----
  AAMP target and is ignored for other targets.
  
  @node Pragma Export_Valued_Procedure,Pragma Extend_System,Pragma Export_Value,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-export-valued-procedure}@anchor{66}
  @section Pragma Export_Valued_Procedure
  
  
*************** string. In this case, no external name i
*** 3680,3686 ****
  still allows the specification of parameter mechanisms.
  
  @node Pragma Extend_System,Pragma Extensions_Allowed,Pragma Export_Valued_Procedure,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-extend-system}@anchor{66}
  @section Pragma Extend_System
  
  
--- 3701,3707 ----
  still allows the specification of parameter mechanisms.
  
  @node Pragma Extend_System,Pragma Extensions_Allowed,Pragma Export_Valued_Procedure,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-extend-system}@anchor{67}
  @section Pragma Extend_System
  
  
*************** for compiling System units, as explained
*** 3731,3737 ****
  GNAT User's Guide.
  
  @node Pragma Extensions_Allowed,Pragma Extensions_Visible,Pragma Extend_System,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-extensions-allowed}@anchor{67}
  @section Pragma Extensions_Allowed
  
  
--- 3752,3758 ----
  GNAT User's Guide.
  
  @node Pragma Extensions_Allowed,Pragma Extensions_Visible,Pragma Extend_System,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-extensions-allowed}@anchor{68}
  @section Pragma Extensions_Allowed
  
  
*************** is constrained.
*** 3764,3770 ****
  @end table
  
  @node Pragma Extensions_Visible,Pragma External,Pragma Extensions_Allowed,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id12}@anchor{68}@anchor{gnat_rm/implementation_defined_pragmas pragma-extensions-visible}@anchor{69}
  @section Pragma Extensions_Visible
  
  
--- 3785,3791 ----
  @end table
  
  @node Pragma Extensions_Visible,Pragma External,Pragma Extensions_Allowed,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id12}@anchor{69}@anchor{gnat_rm/implementation_defined_pragmas pragma-extensions-visible}@anchor{6a}
  @section Pragma Extensions_Visible
  
  
*************** For the semantics of this pragma, see th
*** 3778,3784 ****
  in the SPARK 2014 Reference Manual, section 6.1.7.
  
  @node Pragma External,Pragma External_Name_Casing,Pragma Extensions_Visible,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-external}@anchor{6a}
  @section Pragma External
  
  
--- 3799,3805 ----
  in the SPARK 2014 Reference Manual, section 6.1.7.
  
  @node Pragma External,Pragma External_Name_Casing,Pragma Extensions_Visible,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-external}@anchor{6b}
  @section Pragma External
  
  
*************** used this pragma for exactly the same pu
*** 3799,3805 ****
  @code{Export} before the latter was standardized.
  
  @node Pragma External_Name_Casing,Pragma Fast_Math,Pragma External,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-external-name-casing}@anchor{6b}
  @section Pragma External_Name_Casing
  
  
--- 3820,3826 ----
  @code{Export} before the latter was standardized.
  
  @node Pragma External_Name_Casing,Pragma Fast_Math,Pragma External,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-external-name-casing}@anchor{6c}
  @section Pragma External_Name_Casing
  
  
*************** then the name will be forced to all lowe
*** 3870,3876 ****
  taken from the string provided.
  @end itemize
  
! This pragma may appear anywhere that a pragma is valid.  In particular, it
  can be used as a configuration pragma in the @code{gnat.adc} file, in which
  case it applies to all subsequent compilations, or it can be used as a program
  unit pragma, in which case it only applies to the current unit, or it can
--- 3891,3897 ----
  taken from the string provided.
  @end itemize
  
! This pragma may appear anywhere that a pragma is valid. In particular, it
  can be used as a configuration pragma in the @code{gnat.adc} file, in which
  case it applies to all subsequent compilations, or it can be used as a program
  unit pragma, in which case it only applies to the current unit, or it can
*************** pragma External_Name_Casing (Uppercase,
*** 3888,3894 ****
  to enforce the upper casing of all external symbols.
  
  @node Pragma Fast_Math,Pragma Favor_Top_Level,Pragma External_Name_Casing,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-fast-math}@anchor{6c}
  @section Pragma Fast_Math
  
  
--- 3909,3915 ----
  to enforce the upper casing of all external symbols.
  
  @node Pragma Fast_Math,Pragma Favor_Top_Level,Pragma External_Name_Casing,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-fast-math}@anchor{6d}
  @section Pragma Fast_Math
  
  
*************** under control of the pragma, rather than
*** 3917,3923 ****
  @end table
  
  @node Pragma Favor_Top_Level,Pragma Finalize_Storage_Only,Pragma Fast_Math,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id13}@anchor{6d}@anchor{gnat_rm/implementation_defined_pragmas pragma-favor-top-level}@anchor{6e}
  @section Pragma Favor_Top_Level
  
  
--- 3938,3944 ----
  @end table
  
  @node Pragma Favor_Top_Level,Pragma Finalize_Storage_Only,Pragma Fast_Math,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id13}@anchor{6e}@anchor{gnat_rm/implementation_defined_pragmas pragma-favor-top-level}@anchor{6f}
  @section Pragma Favor_Top_Level
  
  
*************** When this pragma is used, dynamically ge
*** 3936,3942 ****
  targets for nested subprograms. See restriction @code{No_Implicit_Dynamic_Code}.
  
  @node Pragma Finalize_Storage_Only,Pragma Float_Representation,Pragma Favor_Top_Level,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-finalize-storage-only}@anchor{6f}
  @section Pragma Finalize_Storage_Only
  
  
--- 3957,3963 ----
  targets for nested subprograms. See restriction @code{No_Implicit_Dynamic_Code}.
  
  @node Pragma Finalize_Storage_Only,Pragma Float_Representation,Pragma Favor_Top_Level,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-finalize-storage-only}@anchor{70}
  @section Pragma Finalize_Storage_Only
  
  
*************** name. Note that this pragma does not sup
*** 3956,3962 ****
  heap-allocated objects (see pragma @code{No_Heap_Finalization}).
  
  @node Pragma Float_Representation,Pragma Ghost,Pragma Finalize_Storage_Only,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-float-representation}@anchor{70}
  @section Pragma Float_Representation
  
  
--- 3977,3983 ----
  heap-allocated objects (see pragma @code{No_Heap_Finalization}).
  
  @node Pragma Float_Representation,Pragma Ghost,Pragma Finalize_Storage_Only,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-float-representation}@anchor{71}
  @section Pragma Float_Representation
  
  
*************** No other value of digits is permitted.
*** 3991,3997 ****
  @end itemize
  
  @node Pragma Ghost,Pragma Global,Pragma Float_Representation,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-ghost}@anchor{71}@anchor{gnat_rm/implementation_defined_pragmas id14}@anchor{72}
  @section Pragma Ghost
  
  
--- 4012,4018 ----
  @end itemize
  
  @node Pragma Ghost,Pragma Global,Pragma Float_Representation,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-ghost}@anchor{72}@anchor{gnat_rm/implementation_defined_pragmas id14}@anchor{73}
  @section Pragma Ghost
  
  
*************** For the semantics of this pragma, see th
*** 4005,4011 ****
  2014 Reference Manual, section 6.9.
  
  @node Pragma Global,Pragma Ident,Pragma Ghost,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-global}@anchor{73}@anchor{gnat_rm/implementation_defined_pragmas id15}@anchor{74}
  @section Pragma Global
  
  
--- 4026,4032 ----
  2014 Reference Manual, section 6.9.
  
  @node Pragma Global,Pragma Ident,Pragma Ghost,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-global}@anchor{74}@anchor{gnat_rm/implementation_defined_pragmas id15}@anchor{75}
  @section Pragma Global
  
  
*************** For the semantics of this pragma, see th
*** 4030,4036 ****
  SPARK 2014 Reference Manual, section 6.1.4.
  
  @node Pragma Ident,Pragma Ignore_Pragma,Pragma Global,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-ident}@anchor{75}
  @section Pragma Ident
  
  
--- 4051,4057 ----
  SPARK 2014 Reference Manual, section 6.1.4.
  
  @node Pragma Ident,Pragma Ignore_Pragma,Pragma Global,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-ident}@anchor{76}
  @section Pragma Ident
  
  
*************** This pragma is identical in effect to pr
*** 4044,4050 ****
  for compatibility with other Ada compilers providing this pragma.
  
  @node Pragma Ignore_Pragma,Pragma Implementation_Defined,Pragma Ident,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-ignore-pragma}@anchor{76}
  @section Pragma Ignore_Pragma
  
  
--- 4065,4071 ----
  for compatibility with other Ada compilers providing this pragma.
  
  @node Pragma Ignore_Pragma,Pragma Implementation_Defined,Pragma Ident,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-ignore-pragma}@anchor{77}
  @section Pragma Ignore_Pragma
  
  
*************** pragma allows such pragmas to be ignored
*** 4064,4070 ****
  mode, or during porting of legacy code.
  
  @node Pragma Implementation_Defined,Pragma Implemented,Pragma Ignore_Pragma,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-implementation-defined}@anchor{77}
  @section Pragma Implementation_Defined
  
  
--- 4085,4091 ----
  mode, or during porting of legacy code.
  
  @node Pragma Implementation_Defined,Pragma Implemented,Pragma Ignore_Pragma,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-implementation-defined}@anchor{78}
  @section Pragma Implementation_Defined
  
  
*************** for the purpose of implementing the No_I
*** 4091,4097 ****
  restriction.
  
  @node Pragma Implemented,Pragma Implicit_Packing,Pragma Implementation_Defined,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-implemented}@anchor{78}
  @section Pragma Implemented
  
  
--- 4112,4118 ----
  restriction.
  
  @node Pragma Implemented,Pragma Implicit_Packing,Pragma Implementation_Defined,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-implemented}@anchor{79}
  @section Pragma Implemented
  
  
*************** By_Any shares the behavior of By_Entry a
*** 4137,4143 ****
  the target's overriding subprogram kind.
  
  @node Pragma Implicit_Packing,Pragma Import_Function,Pragma Implemented,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-implicit-packing}@anchor{79}
  @section Pragma Implicit_Packing
  
  
--- 4158,4164 ----
  the target's overriding subprogram kind.
  
  @node Pragma Implicit_Packing,Pragma Import_Function,Pragma Implemented,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-implicit-packing}@anchor{7a}
  @section Pragma Implicit_Packing
  
  
*************** sufficient. The use of pragma Implicit_P
*** 4191,4197 ****
  declaration to compile without an explicit pragma Pack.
  
  @node Pragma Import_Function,Pragma Import_Object,Pragma Implicit_Packing,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-import-function}@anchor{7a}
  @section Pragma Import_Function
  
  
--- 4212,4218 ----
  declaration to compile without an explicit pragma Pack.
  
  @node Pragma Import_Function,Pragma Import_Object,Pragma Implicit_Packing,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-import-function}@anchor{7b}
  @section Pragma Import_Function
  
  
*************** notation.  If the mechanism is not speci
*** 4256,4262 ****
  is used.
  
  @node Pragma Import_Object,Pragma Import_Procedure,Pragma Import_Function,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-import-object}@anchor{7b}
  @section Pragma Import_Object
  
  
--- 4277,4283 ----
  is used.
  
  @node Pragma Import_Object,Pragma Import_Procedure,Pragma Import_Function,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-import-object}@anchor{7c}
  @section Pragma Import_Object
  
  
*************** point of view).  @code{size} is syntax c
*** 4282,4288 ****
  GNAT.
  
  @node Pragma Import_Procedure,Pragma Import_Valued_Procedure,Pragma Import_Object,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-import-procedure}@anchor{7c}
  @section Pragma Import_Procedure
  
  
--- 4303,4309 ----
  GNAT.
  
  @node Pragma Import_Procedure,Pragma Import_Valued_Procedure,Pragma Import_Object,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-import-procedure}@anchor{7d}
  @section Pragma Import_Procedure
  
  
*************** applies to a procedure rather than a fun
*** 4322,4328 ****
  @code{Result_Type} and @code{Result_Mechanism} are not permitted.
  
  @node Pragma Import_Valued_Procedure,Pragma Independent,Pragma Import_Procedure,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-import-valued-procedure}@anchor{7d}
  @section Pragma Import_Valued_Procedure
  
  
--- 4343,4349 ----
  @code{Result_Type} and @code{Result_Mechanism} are not permitted.
  
  @node Pragma Import_Valued_Procedure,Pragma Independent,Pragma Import_Procedure,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-import-valued-procedure}@anchor{7e}
  @section Pragma Import_Valued_Procedure
  
  
*************** pragma Import that specifies the desired
*** 4375,4381 ****
  default convention is Ada, which is almost certainly not what is required.
  
  @node Pragma Independent,Pragma Independent_Components,Pragma Import_Valued_Procedure,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-independent}@anchor{7e}
  @section Pragma Independent
  
  
--- 4396,4402 ----
  default convention is Ada, which is almost certainly not what is required.
  
  @node Pragma Independent,Pragma Independent_Components,Pragma Import_Valued_Procedure,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-independent}@anchor{7f}
  @section Pragma Independent
  
  
*************** constraints on the representation of the
*** 4397,4403 ****
  tight packing).
  
  @node Pragma Independent_Components,Pragma Initial_Condition,Pragma Independent,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-independent-components}@anchor{7f}
  @section Pragma Independent_Components
  
  
--- 4418,4424 ----
  tight packing).
  
  @node Pragma Independent_Components,Pragma Initial_Condition,Pragma Independent,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-independent-components}@anchor{80}
  @section Pragma Independent_Components
  
  
*************** constraints on the representation of the
*** 4418,4424 ****
  tight packing).
  
  @node Pragma Initial_Condition,Pragma Initialize_Scalars,Pragma Independent_Components,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id16}@anchor{80}@anchor{gnat_rm/implementation_defined_pragmas pragma-initial-condition}@anchor{81}
  @section Pragma Initial_Condition
  
  
--- 4439,4445 ----
  tight packing).
  
  @node Pragma Initial_Condition,Pragma Initialize_Scalars,Pragma Independent_Components,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id16}@anchor{81}@anchor{gnat_rm/implementation_defined_pragmas pragma-initial-condition}@anchor{82}
  @section Pragma Initial_Condition
  
  
*************** For the semantics of this pragma, see th
*** 4432,4438 ****
  in the SPARK 2014 Reference Manual, section 7.1.6.
  
  @node Pragma Initialize_Scalars,Pragma Initializes,Pragma Initial_Condition,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-initialize-scalars}@anchor{82}
  @section Pragma Initialize_Scalars
  
  
--- 4453,4459 ----
  in the SPARK 2014 Reference Manual, section 7.1.6.
  
  @node Pragma Initialize_Scalars,Pragma Initializes,Pragma Initial_Condition,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-initialize-scalars}@anchor{83}
  @section Pragma Initialize_Scalars
  
  
*************** in the SPARK 2014 Reference Manual, sect
*** 4441,4501 ****
  Syntax:
  
  @example
! pragma Initialize_Scalars;
  @end example
  
! This pragma is similar to @code{Normalize_Scalars} conceptually but has
! two important differences.  First, there is no requirement for the pragma
! to be used uniformly in all units of a partition, in particular, it is fine
! to use this just for some or all of the application units of a partition,
! without needing to recompile the run-time library.
  
! In the case where some units are compiled with the pragma, and some without,
! then a declaration of a variable where the type is defined in package
! Standard or is locally declared will always be subject to initialization,
! as will any declaration of a scalar variable.  For composite variables,
! whether the variable is initialized may also depend on whether the package
! in which the type of the variable is declared is compiled with the pragma.
  
! The other important difference is that you can control the value used
! for initializing scalar objects.  At bind time, you can select several
! options for initialization. You can
! initialize with invalid values (similar to Normalize_Scalars, though for
! Initialize_Scalars it is not always possible to determine the invalid
! values in complex cases like signed component fields with non-standard
! sizes). You can also initialize with high or
! low values, or with a specified bit pattern.  See the GNAT
! User's Guide for binder options for specifying these cases.
  
- This means that you can compile a program, and then without having to
- recompile the program, you can run it with different values being used
- for initializing otherwise uninitialized values, to test if your program
- behavior depends on the choice.  Of course the behavior should not change,
- and if it does, then most likely you have an incorrect reference to an
- uninitialized value.
  
! It is even possible to change the value at execution time eliminating even
! the need to rebind with a different switch using an environment variable.
! See the GNAT User's Guide for details.
  
! Note that pragma @code{Initialize_Scalars} is particularly useful in
! conjunction with the enhanced validity checking that is now provided
! in GNAT, which checks for invalid values under more conditions.
! Using this feature (see description of the @emph{-gnatV} flag in the
! GNAT User's Guide) in conjunction with
! pragma @code{Initialize_Scalars}
! provides a powerful new tool to assist in the detection of problems
! caused by uninitialized variables.
  
! Note: the use of @code{Initialize_Scalars} has a fairly extensive
! effect on the generated code. This may cause your code to be
! substantially larger. It may also cause an increase in the amount
! of stack required, so it is probably a good idea to turn on stack
! checking (see description of stack checking in the GNAT
! User's Guide) when using this pragma.
  
  @node Pragma Initializes,Pragma Inline_Always,Pragma Initialize_Scalars,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-initializes}@anchor{83}@anchor{gnat_rm/implementation_defined_pragmas id17}@anchor{84}
  @section Pragma Initializes
  
  
--- 4462,4568 ----
  Syntax:
  
  @example
! pragma Initialize_Scalars
!   [ ( TYPE_VALUE_PAIR @{, TYPE_VALUE_PAIR@} ) ];
! 
! TYPE_VALUE_PAIR ::=
!   SCALAR_TYPE => static_EXPRESSION
! 
! SCALAR_TYPE :=
!   Short_Float
! | Float
! | Long_Float
! | Long_Long_Flat
! | Signed_8
! | Signed_16
! | Signed_32
! | Signed_64
! | Unsigned_8
! | Unsigned_16
! | Unsigned_32
! | Unsigned_64
  @end example
  
! This pragma is similar to @code{Normalize_Scalars} conceptually but has two
! important differences.
  
! First, there is no requirement for the pragma to be used uniformly in all units
! of a partition. In particular, it is fine to use this just for some or all of
! the application units of a partition, without needing to recompile the run-time
! library. In the case where some units are compiled with the pragma, and some
! without, then a declaration of a variable where the type is defined in package
! Standard or is locally declared will always be subject to initialization, as
! will any declaration of a scalar variable. For composite variables, whether the
! variable is initialized may also depend on whether the package in which the
! type of the variable is declared is compiled with the pragma.
  
! The other important difference is that the programmer can control the value
! used for initializing scalar objects. This effect can be achieved in several
! different ways:
  
  
! @itemize *
  
! @item 
! At compile time, the programmer can specify the invalid value for a
! particular family of scalar types using the optional arguments of the pragma.
  
! The compile-time approach is intended to optimize the generated code for the
! pragma, by possibly using fast operations such as @code{memset}. Note that such
! optimizations require using values where the bytes all have the same binary
! representation.
! 
! @item 
! At bind time, the programmer has several options:
! 
! 
! @itemize *
! 
! @item 
! Initialization with invalid values (similar to Normalize_Scalars, though
! for Initialize_Scalars it is not always possible to determine the invalid
! values in complex cases like signed component fields with nonstandard
! sizes).
! 
! @item 
! Initialization with high values.
! 
! @item 
! Initialization with low values.
! 
! @item 
! Initialization with a specific bit pattern.
! @end itemize
! 
! See the GNAT User's Guide for binder options for specifying these cases.
! 
! The bind-time approach is intended to provide fast turnaround for testing
! with different values, without having to recompile the program.
! 
! @item 
! At execution time, the programmer can specify the invalid values using an
! environment variable. See the GNAT User's Guide for details.
! 
! The execution-time approach is intended to provide fast turnaround for
! testing with different values, without having to recompile and rebind the
! program.
! @end itemize
! 
! Note that pragma @code{Initialize_Scalars} is particularly useful in conjunction
! with the enhanced validity checking that is now provided in GNAT, which checks
! for invalid values under more conditions. Using this feature (see description
! of the @emph{-gnatV} flag in the GNAT User's Guide) in conjunction with pragma
! @code{Initialize_Scalars} provides a powerful new tool to assist in the detection
! of problems caused by uninitialized variables.
! 
! Note: the use of @code{Initialize_Scalars} has a fairly extensive effect on the
! generated code. This may cause your code to be substantially larger. It may
! also cause an increase in the amount of stack required, so it is probably a
! good idea to turn on stack checking (see description of stack checking in the
! GNAT User's Guide) when using this pragma.
  
  @node Pragma Initializes,Pragma Inline_Always,Pragma Initialize_Scalars,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-initializes}@anchor{84}@anchor{gnat_rm/implementation_defined_pragmas id17}@anchor{85}
  @section Pragma Initializes
  
  
*************** For the semantics of this pragma, see th
*** 4522,4528 ****
  SPARK 2014 Reference Manual, section 7.1.5.
  
  @node Pragma Inline_Always,Pragma Inline_Generic,Pragma Initializes,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id18}@anchor{85}@anchor{gnat_rm/implementation_defined_pragmas pragma-inline-always}@anchor{86}
  @section Pragma Inline_Always
  
  
--- 4589,4595 ----
  SPARK 2014 Reference Manual, section 7.1.5.
  
  @node Pragma Inline_Always,Pragma Inline_Generic,Pragma Initializes,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id18}@anchor{86}@anchor{gnat_rm/implementation_defined_pragmas pragma-inline-always}@anchor{87}
  @section Pragma Inline_Always
  
  
*************** apply this pragma to a primitive operati
*** 4541,4547 ****
  restrictions, the compiler is allowed to remove the out-of-line body of @code{NAME}.
  
  @node Pragma Inline_Generic,Pragma Interface,Pragma Inline_Always,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-inline-generic}@anchor{87}
  @section Pragma Inline_Generic
  
  
--- 4608,4614 ----
  restrictions, the compiler is allowed to remove the out-of-line body of @code{NAME}.
  
  @node Pragma Inline_Generic,Pragma Interface,Pragma Inline_Always,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-inline-generic}@anchor{88}
  @section Pragma Inline_Generic
  
  
*************** than to check that the given names are a
*** 4559,4565 ****
  generic instances.
  
  @node Pragma Interface,Pragma Interface_Name,Pragma Inline_Generic,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-interface}@anchor{88}
  @section Pragma Interface
  
  
--- 4626,4632 ----
  generic instances.
  
  @node Pragma Interface,Pragma Interface_Name,Pragma Inline_Generic,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-interface}@anchor{89}
  @section Pragma Interface
  
  
*************** maintaining Ada 83/Ada 95 compatibility
*** 4586,4592 ****
  Ada 83 compilers.
  
  @node Pragma Interface_Name,Pragma Interrupt_Handler,Pragma Interface,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-interface-name}@anchor{89}
  @section Pragma Interface_Name
  
  
--- 4653,4659 ----
  Ada 83 compilers.
  
  @node Pragma Interface_Name,Pragma Interrupt_Handler,Pragma Interface,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-interface-name}@anchor{8a}
  @section Pragma Interface_Name
  
  
*************** for an interfaced subprogram, and is pro
*** 4605,4611 ****
  least one of @code{External_Name} or @code{Link_Name}.
  
  @node Pragma Interrupt_Handler,Pragma Interrupt_State,Pragma Interface_Name,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-interrupt-handler}@anchor{8a}
  @section Pragma Interrupt_Handler
  
  
--- 4672,4678 ----
  least one of @code{External_Name} or @code{Link_Name}.
  
  @node Pragma Interrupt_Handler,Pragma Interrupt_State,Pragma Interface_Name,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-interrupt-handler}@anchor{8b}
  @section Pragma Interrupt_Handler
  
  
*************** when this pragma is applied to a nonprot
*** 4625,4631 ****
  maskable interrupts, in place of the normal return instruction.
  
  @node Pragma Interrupt_State,Pragma Invariant,Pragma Interrupt_Handler,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-interrupt-state}@anchor{8b}
  @section Pragma Interrupt_State
  
  
--- 4692,4698 ----
  maskable interrupts, in place of the normal return instruction.
  
  @node Pragma Interrupt_State,Pragma Invariant,Pragma Interrupt_Handler,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-interrupt-state}@anchor{8c}
  @section Pragma Interrupt_State
  
  
*************** Ada exceptions, or used to implement run
*** 4650,4656 ****
  Pragma @code{Interrupt_State} provides a general mechanism for overriding
  such uses of interrupts.  It subsumes the functionality of pragma
  @code{Unreserve_All_Interrupts}.  Pragma @code{Interrupt_State} is not
! available on Windows or VMS.  On all other platforms than VxWorks,
  it applies to signals; on VxWorks, it applies to vectored hardware interrupts
  and may be used to mark interrupts required by the board support package
  as reserved.
--- 4717,4723 ----
  Pragma @code{Interrupt_State} provides a general mechanism for overriding
  such uses of interrupts.  It subsumes the functionality of pragma
  @code{Unreserve_All_Interrupts}.  Pragma @code{Interrupt_State} is not
! available on Windows.  On all other platforms than VxWorks,
  it applies to signals; on VxWorks, it applies to vectored hardware interrupts
  and may be used to mark interrupts required by the board support package
  as reserved.
*************** with an application's runtime behavior i
*** 4711,4717 ****
  and in the case of the signal used to implement the @code{abort} statement.
  
  @node Pragma Invariant,Pragma Keep_Names,Pragma Interrupt_State,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id19}@anchor{8c}@anchor{gnat_rm/implementation_defined_pragmas pragma-invariant}@anchor{8d}
  @section Pragma Invariant
  
  
--- 4778,4784 ----
  and in the case of the signal used to implement the @code{abort} statement.
  
  @node Pragma Invariant,Pragma Keep_Names,Pragma Interrupt_State,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id19}@anchor{8d}@anchor{gnat_rm/implementation_defined_pragmas pragma-invariant}@anchor{8e}
  @section Pragma Invariant
  
  
*************** For further details on the use of this p
*** 4750,4756 ****
  of the Type_Invariant aspect.
  
  @node Pragma Keep_Names,Pragma License,Pragma Invariant,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-keep-names}@anchor{8e}
  @section Pragma Keep_Names
  
  
--- 4817,4823 ----
  of the Type_Invariant aspect.
  
  @node Pragma Keep_Names,Pragma License,Pragma Invariant,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-keep-names}@anchor{8f}
  @section Pragma Keep_Names
  
  
*************** use a @code{Discard_Names} pragma in the
*** 4770,4776 ****
  want to retain the names for specific enumeration types.
  
  @node Pragma License,Pragma Link_With,Pragma Keep_Names,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-license}@anchor{8f}
  @section Pragma License
  
  
--- 4837,4843 ----
  want to retain the names for specific enumeration types.
  
  @node Pragma License,Pragma Link_With,Pragma Keep_Names,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-license}@anchor{90}
  @section Pragma License
  
  
*************** GPL, but no warning for @code{GNAT.Socke
*** 4865,4871 ****
  run time, and is therefore licensed under the modified GPL.
  
  @node Pragma Link_With,Pragma Linker_Alias,Pragma License,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-link-with}@anchor{90}
  @section Pragma Link_With
  
  
--- 4932,4938 ----
  run time, and is therefore licensed under the modified GPL.
  
  @node Pragma Link_With,Pragma Linker_Alias,Pragma License,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-link-with}@anchor{91}
  @section Pragma Link_With
  
  
*************** separate arguments to the linker. In add
*** 4889,4895 ****
  multiple arguments, with the same effect as successive pragmas.
  
  @node Pragma Linker_Alias,Pragma Linker_Constructor,Pragma Link_With,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-linker-alias}@anchor{91}
  @section Pragma Linker_Alias
  
  
--- 4956,4962 ----
  multiple arguments, with the same effect as successive pragmas.
  
  @node Pragma Linker_Alias,Pragma Linker_Constructor,Pragma Link_With,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-linker-alias}@anchor{92}
  @section Pragma Linker_Alias
  
  
*************** end p;
*** 4930,4936 ****
  @end example
  
  @node Pragma Linker_Constructor,Pragma Linker_Destructor,Pragma Linker_Alias,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-linker-constructor}@anchor{92}
  @section Pragma Linker_Constructor
  
  
--- 4997,5003 ----
  @end example
  
  @node Pragma Linker_Constructor,Pragma Linker_Destructor,Pragma Linker_Alias,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-linker-constructor}@anchor{93}
  @section Pragma Linker_Constructor
  
  
*************** listed above. Where possible, the use of
*** 4960,4966 ****
  to the use of this pragma.
  
  @node Pragma Linker_Destructor,Pragma Linker_Section,Pragma Linker_Constructor,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-linker-destructor}@anchor{93}
  @section Pragma Linker_Destructor
  
  
--- 5027,5033 ----
  to the use of this pragma.
  
  @node Pragma Linker_Destructor,Pragma Linker_Section,Pragma Linker_Constructor,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-linker-destructor}@anchor{94}
  @section Pragma Linker_Destructor
  
  
*************** See @code{pragma Linker_Constructor} for
*** 4983,4989 ****
  because of these specific contexts.
  
  @node Pragma Linker_Section,Pragma Lock_Free,Pragma Linker_Destructor,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id20}@anchor{94}@anchor{gnat_rm/implementation_defined_pragmas pragma-linker-section}@anchor{95}
  @section Pragma Linker_Section
  
  
--- 5050,5056 ----
  because of these specific contexts.
  
  @node Pragma Linker_Section,Pragma Lock_Free,Pragma Linker_Destructor,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id20}@anchor{95}@anchor{gnat_rm/implementation_defined_pragmas pragma-linker-section}@anchor{96}
  @section Pragma Linker_Section
  
  
*************** end IO_Card;
*** 5057,5063 ****
  @end example
  
  @node Pragma Lock_Free,Pragma Loop_Invariant,Pragma Linker_Section,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id21}@anchor{96}@anchor{gnat_rm/implementation_defined_pragmas pragma-lock-free}@anchor{97}
  @section Pragma Lock_Free
  
  
--- 5124,5130 ----
  @end example
  
  @node Pragma Lock_Free,Pragma Loop_Invariant,Pragma Linker_Section,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id21}@anchor{97}@anchor{gnat_rm/implementation_defined_pragmas pragma-lock-free}@anchor{98}
  @section Pragma Lock_Free
  
  
*************** the implementation of protected operatio
*** 5067,5074 ****
  Compilation fails if the compiler cannot generate lock-free code for the
  operations.
  
  @node Pragma Loop_Invariant,Pragma Loop_Optimize,Pragma Lock_Free,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-loop-invariant}@anchor{98}
  @section Pragma Loop_Invariant
  
  
--- 5134,5182 ----
  Compilation fails if the compiler cannot generate lock-free code for the
  operations.
  
+ The current conditions required to support this pragma are:
+ 
+ 
+ @itemize *
+ 
+ @item 
+ Protected type declarations may not contain entries
+ 
+ @item 
+ Protected subprogram declarations may not have nonelementary parameters
+ @end itemize
+ 
+ In addition, each protected subprogram body must satisfy:
+ 
+ 
+ @itemize *
+ 
+ @item 
+ May reference only one protected component
+ 
+ @item 
+ May not reference nonconstant entities outside the protected subprogram
+ scope.
+ 
+ @item 
+ May not contain address representation items, allocators, or quantified
+ expressions.
+ 
+ @item 
+ May not contain delay, goto, loop, or procedure-call statements.
+ 
+ @item 
+ May not contain exported and imported entities
+ 
+ @item 
+ May not dereferenced access values
+ 
+ @item 
+ Function calls and attribute references must be static
+ @end itemize
+ 
  @node Pragma Loop_Invariant,Pragma Loop_Optimize,Pragma Lock_Free,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-loop-invariant}@anchor{99}
  @section Pragma Loop_Invariant
  
  
*************** attribute can only be used within the ex
*** 5101,5107 ****
  pragma. For full details, see documentation of attribute @code{Loop_Entry}.
  
  @node Pragma Loop_Optimize,Pragma Loop_Variant,Pragma Loop_Invariant,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-loop-optimize}@anchor{99}
  @section Pragma Loop_Optimize
  
  
--- 5209,5215 ----
  pragma. For full details, see documentation of attribute @code{Loop_Entry}.
  
  @node Pragma Loop_Optimize,Pragma Loop_Variant,Pragma Loop_Invariant,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-loop-optimize}@anchor{9a}
  @section Pragma Loop_Optimize
  
  
*************** compiler in order to enable the relevant
*** 5163,5169 ****
  vectorization.
  
  @node Pragma Loop_Variant,Pragma Machine_Attribute,Pragma Loop_Optimize,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-loop-variant}@anchor{9a}
  @section Pragma Loop_Variant
  
  
--- 5271,5277 ----
  vectorization.
  
  @node Pragma Loop_Variant,Pragma Machine_Attribute,Pragma Loop_Optimize,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-loop-variant}@anchor{9b}
  @section Pragma Loop_Variant
  
  
*************** The @code{Loop_Entry} attribute may be u
*** 5210,5216 ****
  @code{Loop_Variant} pragma to refer to values on entry to the loop.
  
  @node Pragma Machine_Attribute,Pragma Main,Pragma Loop_Variant,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-machine-attribute}@anchor{9b}
  @section Pragma Machine_Attribute
  
  
--- 5318,5324 ----
  @code{Loop_Variant} pragma to refer to values on entry to the loop.
  
  @node Pragma Machine_Attribute,Pragma Main,Pragma Loop_Variant,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-machine-attribute}@anchor{9c}
  @section Pragma Machine_Attribute
  
  
*************** Syntax:
*** 5220,5241 ****
  pragma Machine_Attribute (
       [Entity         =>] LOCAL_NAME,
       [Attribute_Name =>] static_string_EXPRESSION
!   [, [Info           =>] static_EXPRESSION] );
  @end example
  
  Machine-dependent attributes can be specified for types and/or
  declarations.  This pragma is semantically equivalent to
  @code{__attribute__((@emph{attribute_name}))} (if @code{info} is not
  specified) or @code{__attribute__((@emph{attribute_name(info})))}
! in GNU C, where @emph{attribute_name} is recognized by the
! compiler middle-end or the @code{TARGET_ATTRIBUTE_TABLE} machine
! specific macro.  A string literal for the optional parameter @code{info}
! is transformed into an identifier, which may make this pragma unusable
! for some attributes.
  For further information see @cite{GNU Compiler Collection (GCC) Internals}.
  
  @node Pragma Main,Pragma Main_Storage,Pragma Machine_Attribute,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-main}@anchor{9c}
  @section Pragma Main
  
  
--- 5328,5350 ----
  pragma Machine_Attribute (
       [Entity         =>] LOCAL_NAME,
       [Attribute_Name =>] static_string_EXPRESSION
!   [, [Info           =>] static_EXPRESSION @{, static_EXPRESSION@}] );
  @end example
  
  Machine-dependent attributes can be specified for types and/or
  declarations.  This pragma is semantically equivalent to
  @code{__attribute__((@emph{attribute_name}))} (if @code{info} is not
  specified) or @code{__attribute__((@emph{attribute_name(info})))}
! or @code{__attribute__((@emph{attribute_name(info,...})))} in GNU C,
! where @emph{attribute_name} is recognized by the compiler middle-end
! or the @code{TARGET_ATTRIBUTE_TABLE} machine specific macro.  Note
! that a string literal for the optional parameter @code{info} or the
! following ones is transformed by default into an identifier,
! which may make this pragma unusable for some attributes.
  For further information see @cite{GNU Compiler Collection (GCC) Internals}.
  
  @node Pragma Main,Pragma Main_Storage,Pragma Machine_Attribute,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-main}@anchor{9d}
  @section Pragma Main
  
  
*************** This pragma is provided for compatibilit
*** 5255,5261 ****
  no effect in GNAT, other than being syntax checked.
  
  @node Pragma Main_Storage,Pragma Max_Queue_Length,Pragma Main,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-main-storage}@anchor{9d}
  @section Pragma Main_Storage
  
  
--- 5364,5370 ----
  no effect in GNAT, other than being syntax checked.
  
  @node Pragma Main_Storage,Pragma Max_Queue_Length,Pragma Main,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-main-storage}@anchor{9e}
  @section Pragma Main_Storage
  
  
*************** This pragma is provided for compatibilit
*** 5274,5280 ****
  no effect in GNAT, other than being syntax checked.
  
  @node Pragma Max_Queue_Length,Pragma No_Body,Pragma Main_Storage,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id22}@anchor{9e}@anchor{gnat_rm/implementation_defined_pragmas pragma-max-queue-length}@anchor{9f}
  @section Pragma Max_Queue_Length
  
  
--- 5383,5389 ----
  no effect in GNAT, other than being syntax checked.
  
  @node Pragma Max_Queue_Length,Pragma No_Body,Pragma Main_Storage,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id22}@anchor{9f}@anchor{gnat_rm/implementation_defined_pragmas pragma-max-queue-length}@anchor{a0}
  @section Pragma Max_Queue_Length
  
  
*************** pragma Max_Entry_Queue (static_integer_E
*** 5286,5296 ****
  
  This pragma is used to specify the maximum callers per entry queue for
  individual protected entries and entry families. It accepts a single
! positive integer as a parameter and must appear after the declaration
! of an entry.
  
! @node Pragma No_Body,Pragma No_Component_Reordering,Pragma Max_Queue_Length,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-body}@anchor{a0}
  @section Pragma No_Body
  
  
--- 5395,5407 ----
  
  This pragma is used to specify the maximum callers per entry queue for
  individual protected entries and entry families. It accepts a single
! integer (-1 or more) as a parameter and must appear after the declaration of an
! entry.
  
! A value of -1 represents no additional restriction on queue length.
! 
! @node Pragma No_Body,Pragma No_Caching,Pragma Max_Queue_Length,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-body}@anchor{a1}
  @section Pragma No_Body
  
  
*************** such a way that a body needed before is
*** 5312,5319 ****
  dummy body with a No_Body pragma ensures that there is no interference from
  earlier versions of the package body.
  
! @node Pragma No_Component_Reordering,Pragma No_Elaboration_Code_All,Pragma No_Body,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-component-reordering}@anchor{a1}
  @section Pragma No_Component_Reordering
  
  
--- 5423,5444 ----
  dummy body with a No_Body pragma ensures that there is no interference from
  earlier versions of the package body.
  
! @node Pragma No_Caching,Pragma No_Component_Reordering,Pragma No_Body,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-caching}@anchor{a2}@anchor{gnat_rm/implementation_defined_pragmas id23}@anchor{a3}
! @section Pragma No_Caching
! 
! 
! Syntax:
! 
! @example
! pragma No_Caching [ (boolean_EXPRESSION) ];
! @end example
! 
! For the semantics of this pragma, see the entry for aspect @code{No_Caching} in
! the SPARK 2014 Reference Manual, section 7.1.2.
! 
! @node Pragma No_Component_Reordering,Pragma No_Elaboration_Code_All,Pragma No_Caching,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-component-reordering}@anchor{a4}
  @section Pragma No_Component_Reordering
  
  
*************** declared in units to which the pragma ap
*** 5332,5338 ****
  that this pragma be used consistently within a partition.
  
  @node Pragma No_Elaboration_Code_All,Pragma No_Heap_Finalization,Pragma No_Component_Reordering,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id23}@anchor{a2}@anchor{gnat_rm/implementation_defined_pragmas pragma-no-elaboration-code-all}@anchor{a3}
  @section Pragma No_Elaboration_Code_All
  
  
--- 5457,5463 ----
  that this pragma be used consistently within a partition.
  
  @node Pragma No_Elaboration_Code_All,Pragma No_Heap_Finalization,Pragma No_Component_Reordering,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id24}@anchor{a5}@anchor{gnat_rm/implementation_defined_pragmas pragma-no-elaboration-code-all}@anchor{a6}
  @section Pragma No_Elaboration_Code_All
  
  
*************** current unit, it must also have the No_E
*** 5351,5357 ****
  It may be applied to package or subprogram specs or their generic versions.
  
  @node Pragma No_Heap_Finalization,Pragma No_Inline,Pragma No_Elaboration_Code_All,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-heap-finalization}@anchor{a4}
  @section Pragma No_Heap_Finalization
  
  
--- 5476,5482 ----
  It may be applied to package or subprogram specs or their generic versions.
  
  @node Pragma No_Heap_Finalization,Pragma No_Inline,Pragma No_Elaboration_Code_All,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-heap-finalization}@anchor{a7}
  @section Pragma No_Heap_Finalization
  
  
*************** lose its @code{No_Heap_Finalization} pra
*** 5383,5389 ****
  appear at the library level.
  
  @node Pragma No_Inline,Pragma No_Return,Pragma No_Heap_Finalization,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id24}@anchor{a5}@anchor{gnat_rm/implementation_defined_pragmas pragma-no-inline}@anchor{a6}
  @section Pragma No_Inline
  
  
--- 5508,5514 ----
  appear at the library level.
  
  @node Pragma No_Inline,Pragma No_Return,Pragma No_Heap_Finalization,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id25}@anchor{a8}@anchor{gnat_rm/implementation_defined_pragmas pragma-no-inline}@anchor{a9}
  @section Pragma No_Inline
  
  
*************** in particular it is not subject to the u
*** 5400,5407 ****
  @emph{-gnatN}.  It is illegal to specify both pragma @code{No_Inline} and
  pragma @code{Inline_Always} for the same @code{NAME}.
  
! @node Pragma No_Return,Pragma No_Run_Time,Pragma No_Inline,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-return}@anchor{a7}
  @section Pragma No_Return
  
  
--- 5525,5532 ----
  @emph{-gnatN}.  It is illegal to specify both pragma @code{No_Inline} and
  pragma @code{Inline_Always} for the same @code{NAME}.
  
! @node Pragma No_Return,Pragma No_Strict_Aliasing,Pragma No_Inline,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-return}@anchor{aa}
  @section Pragma No_Return
  
  
*************** Note that in Ada 2005 mode, this pragma
*** 5427,5450 ****
  available in all earlier versions of Ada as an implementation-defined
  pragma.
  
! @node Pragma No_Run_Time,Pragma No_Strict_Aliasing,Pragma No_Return,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-run-time}@anchor{a8}
! @section Pragma No_Run_Time
! 
! 
! Syntax:
! 
! @example
! pragma No_Run_Time;
! @end example
! 
! This is an obsolete configuration pragma that historically was used to
! set up a runtime library with no object code. It is now used only for
! internal testing. The pragma has been superseded by the reconfigurable
! runtime capability of GNAT.
! 
! @node Pragma No_Strict_Aliasing,Pragma No_Tagged_Streams,Pragma No_Run_Time,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-strict-aliasing}@anchor{a9}
  @section Pragma No_Strict_Aliasing
  
  
--- 5552,5559 ----
  available in all earlier versions of Ada as an implementation-defined
  pragma.
  
! @node Pragma No_Strict_Aliasing,Pragma No_Tagged_Streams,Pragma No_Return,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-strict-aliasing}@anchor{ab}
  @section Pragma No_Strict_Aliasing
  
  
*************** in the @cite{GNAT User's Guide}.
*** 5466,5472 ****
  This pragma currently has no effects on access to unconstrained array types.
  
  @node Pragma No_Tagged_Streams,Pragma Normalize_Scalars,Pragma No_Strict_Aliasing,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-tagged-streams}@anchor{aa}@anchor{gnat_rm/implementation_defined_pragmas id25}@anchor{ab}
  @section Pragma No_Tagged_Streams
  
  
--- 5575,5581 ----
  This pragma currently has no effects on access to unconstrained array types.
  
  @node Pragma No_Tagged_Streams,Pragma Normalize_Scalars,Pragma No_Strict_Aliasing,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-no-tagged-streams}@anchor{ac}@anchor{gnat_rm/implementation_defined_pragmas id26}@anchor{ad}
  @section Pragma No_Tagged_Streams
  
  
*************** with empty strings. This is useful to av
*** 5505,5511 ****
  level but has a negative impact on the debuggability of tagged types.
  
  @node Pragma Normalize_Scalars,Pragma Obsolescent,Pragma No_Tagged_Streams,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-normalize-scalars}@anchor{ac}
  @section Pragma Normalize_Scalars
  
  
--- 5614,5620 ----
  level but has a negative impact on the debuggability of tagged types.
  
  @node Pragma Normalize_Scalars,Pragma Obsolescent,Pragma No_Tagged_Streams,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-normalize-scalars}@anchor{ae}
  @section Pragma Normalize_Scalars
  
  
*************** will always generate an invalid value if
*** 5587,5593 ****
  @end table
  
  @node Pragma Obsolescent,Pragma Optimize_Alignment,Pragma Normalize_Scalars,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-obsolescent}@anchor{ad}@anchor{gnat_rm/implementation_defined_pragmas id26}@anchor{ae}
  @section Pragma Obsolescent
  
  
--- 5696,5702 ----
  @end table
  
  @node Pragma Obsolescent,Pragma Optimize_Alignment,Pragma Normalize_Scalars,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-obsolescent}@anchor{af}@anchor{gnat_rm/implementation_defined_pragmas id27}@anchor{b0}
  @section Pragma Obsolescent
  
  
*************** So if you specify @code{Entity =>} for t
*** 5683,5689 ****
  argument is present, it must be preceded by @code{Message =>}.
  
  @node Pragma Optimize_Alignment,Pragma Ordered,Pragma Obsolescent,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-optimize-alignment}@anchor{af}
  @section Pragma Optimize_Alignment
  
  
--- 5792,5798 ----
  argument is present, it must be preceded by @code{Message =>}.
  
  @node Pragma Optimize_Alignment,Pragma Ordered,Pragma Obsolescent,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-optimize-alignment}@anchor{b1}
  @section Pragma Optimize_Alignment
  
  
*************** latter are compiled by default in pragma
*** 5769,5775 ****
  pragma appears at the start of the file.
  
  @node Pragma Ordered,Pragma Overflow_Mode,Pragma Optimize_Alignment,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-ordered}@anchor{b0}
  @section Pragma Ordered
  
  
--- 5878,5884 ----
  pragma appears at the start of the file.
  
  @node Pragma Ordered,Pragma Overflow_Mode,Pragma Optimize_Alignment,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-ordered}@anchor{b2}
  @section Pragma Ordered
  
  
*************** For additional information please refer
*** 5861,5867 ****
  @emph{-gnatw.u} switch in the GNAT User's Guide.
  
  @node Pragma Overflow_Mode,Pragma Overriding_Renamings,Pragma Ordered,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-overflow-mode}@anchor{b1}
  @section Pragma Overflow_Mode
  
  
--- 5970,5976 ----
  @emph{-gnatw.u} switch in the GNAT User's Guide.
  
  @node Pragma Overflow_Mode,Pragma Overriding_Renamings,Pragma Ordered,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-overflow-mode}@anchor{b3}
  @section Pragma Overflow_Mode
  
  
*************** The pragma @code{Unsuppress (Overflow_Ch
*** 5900,5906 ****
  overflow checking, but does not affect the overflow mode.
  
  @node Pragma Overriding_Renamings,Pragma Partition_Elaboration_Policy,Pragma Overflow_Mode,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-overriding-renamings}@anchor{b2}
  @section Pragma Overriding_Renamings
  
  
--- 6009,6015 ----
  overflow checking, but does not affect the overflow mode.
  
  @node Pragma Overriding_Renamings,Pragma Partition_Elaboration_Policy,Pragma Overflow_Mode,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-overriding-renamings}@anchor{b4}
  @section Pragma Overriding_Renamings
  
  
*************** RM 8.3 (15) stipulates that an overridde
*** 5935,5941 ****
  declaration of the overriding operation.
  
  @node Pragma Partition_Elaboration_Policy,Pragma Part_Of,Pragma Overriding_Renamings,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-partition-elaboration-policy}@anchor{b3}
  @section Pragma Partition_Elaboration_Policy
  
  
--- 6044,6050 ----
  declaration of the overriding operation.
  
  @node Pragma Partition_Elaboration_Policy,Pragma Part_Of,Pragma Overriding_Renamings,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-partition-elaboration-policy}@anchor{b5}
  @section Pragma Partition_Elaboration_Policy
  
  
*************** versions of Ada as an implementation-def
*** 5952,5958 ****
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Part_Of,Pragma Passive,Pragma Partition_Elaboration_Policy,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id27}@anchor{b4}@anchor{gnat_rm/implementation_defined_pragmas pragma-part-of}@anchor{b5}
  @section Pragma Part_Of
  
  
--- 6061,6067 ----
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Part_Of,Pragma Passive,Pragma Partition_Elaboration_Policy,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id28}@anchor{b6}@anchor{gnat_rm/implementation_defined_pragmas pragma-part-of}@anchor{b7}
  @section Pragma Part_Of
  
  
*************** For the semantics of this pragma, see th
*** 5968,5974 ****
  SPARK 2014 Reference Manual, section 7.2.6.
  
  @node Pragma Passive,Pragma Persistent_BSS,Pragma Part_Of,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-passive}@anchor{b6}
  @section Pragma Passive
  
  
--- 6077,6083 ----
  SPARK 2014 Reference Manual, section 7.2.6.
  
  @node Pragma Passive,Pragma Persistent_BSS,Pragma Part_Of,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-passive}@anchor{b8}
  @section Pragma Passive
  
  
*************** For more information on the subject of p
*** 5992,5998 ****
  'Passive Task Optimization' in the GNAT Users Guide.
  
  @node Pragma Persistent_BSS,Pragma Polling,Pragma Passive,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id28}@anchor{b7}@anchor{gnat_rm/implementation_defined_pragmas pragma-persistent-bss}@anchor{b8}
  @section Pragma Persistent_BSS
  
  
--- 6101,6107 ----
  'Passive Task Optimization' in the GNAT Users Guide.
  
  @node Pragma Persistent_BSS,Pragma Polling,Pragma Passive,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id29}@anchor{b9}@anchor{gnat_rm/implementation_defined_pragmas pragma-persistent-bss}@anchor{ba}
  @section Pragma Persistent_BSS
  
  
*************** If this pragma is used on a target where
*** 6023,6029 ****
  then the pragma will be ignored. See also @code{pragma Linker_Section}.
  
  @node Pragma Polling,Pragma Post,Pragma Persistent_BSS,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-polling}@anchor{b9}
  @section Pragma Polling
  
  
--- 6132,6138 ----
  then the pragma will be ignored. See also @code{pragma Linker_Section}.
  
  @node Pragma Polling,Pragma Post,Pragma Persistent_BSS,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-polling}@anchor{bb}
  @section Pragma Polling
  
  
*************** Note that polling can also be enabled by
*** 6065,6071 ****
  See the section on switches for gcc in the @cite{GNAT User's Guide}.
  
  @node Pragma Post,Pragma Postcondition,Pragma Polling,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-post}@anchor{ba}
  @section Pragma Post
  
  
--- 6174,6180 ----
  See the section on switches for gcc in the @cite{GNAT User's Guide}.
  
  @node Pragma Post,Pragma Postcondition,Pragma Polling,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-post}@anchor{bc}
  @section Pragma Post
  
  
*************** appear at the start of the declarations
*** 6090,6096 ****
  (preceded only by other pragmas).
  
  @node Pragma Postcondition,Pragma Post_Class,Pragma Post,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-postcondition}@anchor{bb}
  @section Pragma Postcondition
  
  
--- 6199,6205 ----
  (preceded only by other pragmas).
  
  @node Pragma Postcondition,Pragma Post_Class,Pragma Post,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-postcondition}@anchor{bd}
  @section Pragma Postcondition
  
  
*************** Ada 2012, and has been retained in its o
*** 6255,6261 ****
  compatibility purposes.
  
  @node Pragma Post_Class,Pragma Rename_Pragma,Pragma Postcondition,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-post-class}@anchor{bc}
  @section Pragma Post_Class
  
  
--- 6364,6370 ----
  compatibility purposes.
  
  @node Pragma Post_Class,Pragma Rename_Pragma,Pragma Postcondition,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-post-class}@anchor{be}
  @section Pragma Post_Class
  
  
*************** policy that controls this pragma is @cod
*** 6290,6296 ****
  @code{Post_Class}.
  
  @node Pragma Rename_Pragma,Pragma Pre,Pragma Post_Class,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-rename-pragma}@anchor{bd}
  @section Pragma Rename_Pragma
  
  
--- 6399,6405 ----
  @code{Post_Class}.
  
  @node Pragma Rename_Pragma,Pragma Pre,Pragma Post_Class,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-rename-pragma}@anchor{bf}
  @section Pragma Rename_Pragma
  
  
*************** Pragma Inline_Only will not necessarily
*** 6329,6335 ****
  compiler; it's up to you to make sure the semantics are close enough.
  
  @node Pragma Pre,Pragma Precondition,Pragma Rename_Pragma,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-pre}@anchor{be}
  @section Pragma Pre
  
  
--- 6438,6444 ----
  compiler; it's up to you to make sure the semantics are close enough.
  
  @node Pragma Pre,Pragma Precondition,Pragma Rename_Pragma,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-pre}@anchor{c0}
  @section Pragma Pre
  
  
*************** appear at the start of the declarations
*** 6354,6360 ****
  (preceded only by other pragmas).
  
  @node Pragma Precondition,Pragma Predicate,Pragma Pre,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-precondition}@anchor{bf}
  @section Pragma Precondition
  
  
--- 6463,6469 ----
  (preceded only by other pragmas).
  
  @node Pragma Precondition,Pragma Predicate,Pragma Pre,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-precondition}@anchor{c1}
  @section Pragma Precondition
  
  
*************** Ada 2012, and has been retained in its o
*** 6413,6419 ****
  compatibility purposes.
  
  @node Pragma Predicate,Pragma Predicate_Failure,Pragma Precondition,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id29}@anchor{c0}@anchor{gnat_rm/implementation_defined_pragmas pragma-predicate}@anchor{c1}
  @section Pragma Predicate
  
  
--- 6522,6528 ----
  compatibility purposes.
  
  @node Pragma Predicate,Pragma Predicate_Failure,Pragma Precondition,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-predicate}@anchor{c2}@anchor{gnat_rm/implementation_defined_pragmas id30}@anchor{c3}
  @section Pragma Predicate
  
  
*************** defined for subtype B). When following t
*** 6467,6473 ****
  use of predicates should be avoided.
  
  @node Pragma Predicate_Failure,Pragma Preelaborable_Initialization,Pragma Predicate,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-predicate-failure}@anchor{c2}
  @section Pragma Predicate_Failure
  
  
--- 6576,6582 ----
  use of predicates should be avoided.
  
  @node Pragma Predicate_Failure,Pragma Preelaborable_Initialization,Pragma Predicate,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-predicate-failure}@anchor{c4}
  @section Pragma Predicate_Failure
  
  
*************** the language-defined
*** 6484,6490 ****
  @code{Predicate_Failure} aspect, and shares its restrictions and semantics.
  
  @node Pragma Preelaborable_Initialization,Pragma Prefix_Exception_Messages,Pragma Predicate_Failure,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-preelaborable-initialization}@anchor{c3}
  @section Pragma Preelaborable_Initialization
  
  
--- 6593,6599 ----
  @code{Predicate_Failure} aspect, and shares its restrictions and semantics.
  
  @node Pragma Preelaborable_Initialization,Pragma Prefix_Exception_Messages,Pragma Predicate_Failure,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-preelaborable-initialization}@anchor{c5}
  @section Pragma Preelaborable_Initialization
  
  
*************** versions of Ada as an implementation-def
*** 6499,6505 ****
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Prefix_Exception_Messages,Pragma Pre_Class,Pragma Preelaborable_Initialization,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-prefix-exception-messages}@anchor{c4}
  @section Pragma Prefix_Exception_Messages
  
  
--- 6608,6614 ----
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Prefix_Exception_Messages,Pragma Pre_Class,Pragma Preelaborable_Initialization,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-prefix-exception-messages}@anchor{c6}
  @section Pragma Prefix_Exception_Messages
  
  
*************** prefixing in this case, you can always c
*** 6530,6536 ****
  @code{GNAT.Source_Info.Enclosing_Entity} and prepend the string manually.
  
  @node Pragma Pre_Class,Pragma Priority_Specific_Dispatching,Pragma Prefix_Exception_Messages,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-pre-class}@anchor{c5}
  @section Pragma Pre_Class
  
  
--- 6639,6645 ----
  @code{GNAT.Source_Info.Enclosing_Entity} and prepend the string manually.
  
  @node Pragma Pre_Class,Pragma Priority_Specific_Dispatching,Pragma Prefix_Exception_Messages,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-pre-class}@anchor{c7}
  @section Pragma Pre_Class
  
  
*************** policy that controls this pragma is @cod
*** 6565,6571 ****
  @code{Pre_Class}.
  
  @node Pragma Priority_Specific_Dispatching,Pragma Profile,Pragma Pre_Class,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-priority-specific-dispatching}@anchor{c6}
  @section Pragma Priority_Specific_Dispatching
  
  
--- 6674,6680 ----
  @code{Pre_Class}.
  
  @node Pragma Priority_Specific_Dispatching,Pragma Profile,Pragma Pre_Class,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-priority-specific-dispatching}@anchor{c8}
  @section Pragma Priority_Specific_Dispatching
  
  
*************** versions of Ada as an implementation-def
*** 6589,6595 ****
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Profile,Pragma Profile_Warnings,Pragma Priority_Specific_Dispatching,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-profile}@anchor{c7}
  @section Pragma Profile
  
  
--- 6698,6704 ----
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Profile,Pragma Profile_Warnings,Pragma Priority_Specific_Dispatching,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-profile}@anchor{c9}
  @section Pragma Profile
  
  
*************** conforming Ada constructs.  The profile
*** 6863,6869 ****
  @end itemize
  
  @node Pragma Profile_Warnings,Pragma Propagate_Exceptions,Pragma Profile,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-profile-warnings}@anchor{c8}
  @section Pragma Profile_Warnings
  
  
--- 6972,6978 ----
  @end itemize
  
  @node Pragma Profile_Warnings,Pragma Propagate_Exceptions,Pragma Profile,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-profile-warnings}@anchor{ca}
  @section Pragma Profile_Warnings
  
  
*************** violations of the profile generate warni
*** 6881,6887 ****
  of error messages.
  
  @node Pragma Propagate_Exceptions,Pragma Provide_Shift_Operators,Pragma Profile_Warnings,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-propagate-exceptions}@anchor{c9}
  @section Pragma Propagate_Exceptions
  
  
--- 6990,6996 ----
  of error messages.
  
  @node Pragma Propagate_Exceptions,Pragma Provide_Shift_Operators,Pragma Profile_Warnings,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-propagate-exceptions}@anchor{cb}
  @section Pragma Propagate_Exceptions
  
  
*************** purposes. It used to be used in connecti
*** 6900,6906 ****
  a now-obsolete mechanism for implementation of exceptions.
  
  @node Pragma Provide_Shift_Operators,Pragma Psect_Object,Pragma Propagate_Exceptions,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-provide-shift-operators}@anchor{ca}
  @section Pragma Provide_Shift_Operators
  
  
--- 7009,7015 ----
  a now-obsolete mechanism for implementation of exceptions.
  
  @node Pragma Provide_Shift_Operators,Pragma Psect_Object,Pragma Propagate_Exceptions,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-provide-shift-operators}@anchor{cc}
  @section Pragma Provide_Shift_Operators
  
  
*************** including the function declarations for
*** 6920,6926 ****
  with the pragma Import (Intrinsic, ...) statements.
  
  @node Pragma Psect_Object,Pragma Pure_Function,Pragma Provide_Shift_Operators,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-psect-object}@anchor{cb}
  @section Pragma Psect_Object
  
  
--- 7029,7035 ----
  with the pragma Import (Intrinsic, ...) statements.
  
  @node Pragma Psect_Object,Pragma Pure_Function,Pragma Provide_Shift_Operators,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-psect-object}@anchor{cd}
  @section Pragma Psect_Object
  
  
*************** EXTERNAL_SYMBOL ::=
*** 6940,6946 ****
  This pragma is identical in effect to pragma @code{Common_Object}.
  
  @node Pragma Pure_Function,Pragma Rational,Pragma Psect_Object,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-pure-function}@anchor{cc}@anchor{gnat_rm/implementation_defined_pragmas id30}@anchor{cd}
  @section Pragma Pure_Function
  
  
--- 7049,7055 ----
  This pragma is identical in effect to pragma @code{Common_Object}.
  
  @node Pragma Pure_Function,Pragma Rational,Pragma Psect_Object,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-pure-function}@anchor{ce}@anchor{gnat_rm/implementation_defined_pragmas id31}@anchor{cf}
  @section Pragma Pure_Function
  
  
*************** unit is not a Pure unit in the categoriz
*** 7002,7008 ****
  thus marked is free to @code{with} non-pure units.
  
  @node Pragma Rational,Pragma Ravenscar,Pragma Pure_Function,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-rational}@anchor{ce}
  @section Pragma Rational
  
  
--- 7111,7117 ----
  thus marked is free to @code{with} non-pure units.
  
  @node Pragma Rational,Pragma Ravenscar,Pragma Pure_Function,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-rational}@anchor{d0}
  @section Pragma Rational
  
  
*************** pragma Profile (Rational);
*** 7020,7026 ****
  @end example
  
  @node Pragma Ravenscar,Pragma Refined_Depends,Pragma Rational,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-ravenscar}@anchor{cf}
  @section Pragma Ravenscar
  
  
--- 7129,7135 ----
  @end example
  
  @node Pragma Ravenscar,Pragma Refined_Depends,Pragma Rational,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-ravenscar}@anchor{d1}
  @section Pragma Ravenscar
  
  
*************** pragma Profile (Ravenscar);
*** 7040,7046 ****
  which is the preferred method of setting the @code{Ravenscar} profile.
  
  @node Pragma Refined_Depends,Pragma Refined_Global,Pragma Ravenscar,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-refined-depends}@anchor{d0}@anchor{gnat_rm/implementation_defined_pragmas id31}@anchor{d1}
  @section Pragma Refined_Depends
  
  
--- 7149,7155 ----
  which is the preferred method of setting the @code{Ravenscar} profile.
  
  @node Pragma Refined_Depends,Pragma Refined_Global,Pragma Ravenscar,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-refined-depends}@anchor{d2}@anchor{gnat_rm/implementation_defined_pragmas id32}@anchor{d3}
  @section Pragma Refined_Depends
  
  
*************** For the semantics of this pragma, see th
*** 7073,7079 ****
  the SPARK 2014 Reference Manual, section 6.1.5.
  
  @node Pragma Refined_Global,Pragma Refined_Post,Pragma Refined_Depends,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-refined-global}@anchor{d2}@anchor{gnat_rm/implementation_defined_pragmas id32}@anchor{d3}
  @section Pragma Refined_Global
  
  
--- 7182,7188 ----
  the SPARK 2014 Reference Manual, section 6.1.5.
  
  @node Pragma Refined_Global,Pragma Refined_Post,Pragma Refined_Depends,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-refined-global}@anchor{d4}@anchor{gnat_rm/implementation_defined_pragmas id33}@anchor{d5}
  @section Pragma Refined_Global
  
  
*************** For the semantics of this pragma, see th
*** 7098,7104 ****
  the SPARK 2014 Reference Manual, section 6.1.4.
  
  @node Pragma Refined_Post,Pragma Refined_State,Pragma Refined_Global,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-refined-post}@anchor{d4}@anchor{gnat_rm/implementation_defined_pragmas id33}@anchor{d5}
  @section Pragma Refined_Post
  
  
--- 7207,7213 ----
  the SPARK 2014 Reference Manual, section 6.1.4.
  
  @node Pragma Refined_Post,Pragma Refined_State,Pragma Refined_Global,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-refined-post}@anchor{d6}@anchor{gnat_rm/implementation_defined_pragmas id34}@anchor{d7}
  @section Pragma Refined_Post
  
  
*************** For the semantics of this pragma, see th
*** 7112,7118 ****
  the SPARK 2014 Reference Manual, section 7.2.7.
  
  @node Pragma Refined_State,Pragma Relative_Deadline,Pragma Refined_Post,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-refined-state}@anchor{d6}@anchor{gnat_rm/implementation_defined_pragmas id34}@anchor{d7}
  @section Pragma Refined_State
  
  
--- 7221,7227 ----
  the SPARK 2014 Reference Manual, section 7.2.7.
  
  @node Pragma Refined_State,Pragma Relative_Deadline,Pragma Refined_Post,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-refined-state}@anchor{d8}@anchor{gnat_rm/implementation_defined_pragmas id35}@anchor{d9}
  @section Pragma Refined_State
  
  
*************** For the semantics of this pragma, see th
*** 7138,7144 ****
  the SPARK 2014 Reference Manual, section 7.2.2.
  
  @node Pragma Relative_Deadline,Pragma Remote_Access_Type,Pragma Refined_State,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-relative-deadline}@anchor{d8}
  @section Pragma Relative_Deadline
  
  
--- 7247,7253 ----
  the SPARK 2014 Reference Manual, section 7.2.2.
  
  @node Pragma Relative_Deadline,Pragma Remote_Access_Type,Pragma Refined_State,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-relative-deadline}@anchor{da}
  @section Pragma Relative_Deadline
  
  
*************** versions of Ada as an implementation-def
*** 7153,7159 ****
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Remote_Access_Type,Pragma Restricted_Run_Time,Pragma Relative_Deadline,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id35}@anchor{d9}@anchor{gnat_rm/implementation_defined_pragmas pragma-remote-access-type}@anchor{da}
  @section Pragma Remote_Access_Type
  
  
--- 7262,7268 ----
  See Ada 2012 Reference Manual for details.
  
  @node Pragma Remote_Access_Type,Pragma Restricted_Run_Time,Pragma Relative_Deadline,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id36}@anchor{db}@anchor{gnat_rm/implementation_defined_pragmas pragma-remote-access-type}@anchor{dc}
  @section Pragma Remote_Access_Type
  
  
*************** pertaining to remote access to class-wid
*** 7179,7185 ****
  actual type must be a remote access to class-wide type.
  
  @node Pragma Restricted_Run_Time,Pragma Restriction_Warnings,Pragma Remote_Access_Type,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-restricted-run-time}@anchor{db}
  @section Pragma Restricted_Run_Time
  
  
--- 7288,7294 ----
  actual type must be a remote access to class-wide type.
  
  @node Pragma Restricted_Run_Time,Pragma Restriction_Warnings,Pragma Remote_Access_Type,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-restricted-run-time}@anchor{dd}
  @section Pragma Restricted_Run_Time
  
  
*************** which is the preferred method of setting
*** 7200,7206 ****
  profile.
  
  @node Pragma Restriction_Warnings,Pragma Reviewable,Pragma Restricted_Run_Time,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-restriction-warnings}@anchor{dc}
  @section Pragma Restriction_Warnings
  
  
--- 7309,7315 ----
  profile.
  
  @node Pragma Restriction_Warnings,Pragma Reviewable,Pragma Restricted_Run_Time,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-restriction-warnings}@anchor{de}
  @section Pragma Restriction_Warnings
  
  
*************** generating a warning, but any other use
*** 7238,7244 ****
  defined pragmas will cause a warning to be generated.
  
  @node Pragma Reviewable,Pragma Secondary_Stack_Size,Pragma Restriction_Warnings,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-reviewable}@anchor{dd}
  @section Pragma Reviewable
  
  
--- 7347,7353 ----
  defined pragmas will cause a warning to be generated.
  
  @node Pragma Reviewable,Pragma Secondary_Stack_Size,Pragma Restriction_Warnings,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-reviewable}@anchor{df}
  @section Pragma Reviewable
  
  
*************** comprehensive messages identifying possi
*** 7342,7348 ****
  information.
  
  @node Pragma Secondary_Stack_Size,Pragma Share_Generic,Pragma Reviewable,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id36}@anchor{de}@anchor{gnat_rm/implementation_defined_pragmas pragma-secondary-stack-size}@anchor{df}
  @section Pragma Secondary_Stack_Size
  
  
--- 7451,7457 ----
  information.
  
  @node Pragma Secondary_Stack_Size,Pragma Share_Generic,Pragma Reviewable,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id37}@anchor{e0}@anchor{gnat_rm/implementation_defined_pragmas pragma-secondary-stack-size}@anchor{e1}
  @section Pragma Secondary_Stack_Size
  
  
*************** Note the pragma cannot appear when the r
*** 7378,7384 ****
  is in effect.
  
  @node Pragma Share_Generic,Pragma Shared,Pragma Secondary_Stack_Size,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-share-generic}@anchor{e0}
  @section Pragma Share_Generic
  
  
--- 7487,7493 ----
  is in effect.
  
  @node Pragma Share_Generic,Pragma Shared,Pragma Secondary_Stack_Size,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-share-generic}@anchor{e2}
  @section Pragma Share_Generic
  
  
*************** than to check that the given names are a
*** 7396,7402 ****
  generic instances.
  
  @node Pragma Shared,Pragma Short_Circuit_And_Or,Pragma Share_Generic,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id37}@anchor{e1}@anchor{gnat_rm/implementation_defined_pragmas pragma-shared}@anchor{e2}
  @section Pragma Shared
  
  
--- 7505,7511 ----
  generic instances.
  
  @node Pragma Shared,Pragma Short_Circuit_And_Or,Pragma Share_Generic,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id38}@anchor{e3}@anchor{gnat_rm/implementation_defined_pragmas pragma-shared}@anchor{e4}
  @section Pragma Shared
  
  
*************** This pragma is provided for compatibilit
*** 7404,7410 ****
  semantics are identical to pragma Atomic.
  
  @node Pragma Short_Circuit_And_Or,Pragma Short_Descriptors,Pragma Shared,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-short-circuit-and-or}@anchor{e3}
  @section Pragma Short_Circuit_And_Or
  
  
--- 7513,7519 ----
  semantics are identical to pragma Atomic.
  
  @node Pragma Short_Circuit_And_Or,Pragma Short_Descriptors,Pragma Shared,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-short-circuit-and-or}@anchor{e5}
  @section Pragma Short_Circuit_And_Or
  
  
*************** within the file being compiled, it appli
*** 7423,7429 ****
  There is no requirement that all units in a partition use this option.
  
  @node Pragma Short_Descriptors,Pragma Simple_Storage_Pool_Type,Pragma Short_Circuit_And_Or,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-short-descriptors}@anchor{e4}
  @section Pragma Short_Descriptors
  
  
--- 7532,7538 ----
  There is no requirement that all units in a partition use this option.
  
  @node Pragma Short_Descriptors,Pragma Simple_Storage_Pool_Type,Pragma Short_Circuit_And_Or,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-short-descriptors}@anchor{e6}
  @section Pragma Short_Descriptors
  
  
*************** This pragma is provided for compatibilit
*** 7437,7443 ****
  is recognized but ignored by all current versions of GNAT.
  
  @node Pragma Simple_Storage_Pool_Type,Pragma Source_File_Name,Pragma Short_Descriptors,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-simple-storage-pool-type}@anchor{e5}@anchor{gnat_rm/implementation_defined_pragmas id38}@anchor{e6}
  @section Pragma Simple_Storage_Pool_Type
  
  
--- 7546,7552 ----
  is recognized but ignored by all current versions of GNAT.
  
  @node Pragma Simple_Storage_Pool_Type,Pragma Source_File_Name,Pragma Short_Descriptors,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-simple-storage-pool-type}@anchor{e7}@anchor{gnat_rm/implementation_defined_pragmas id39}@anchor{e8}
  @section Pragma Simple_Storage_Pool_Type
  
  
*************** storage-management discipline).
*** 7491,7497 ****
  
  An object of a simple storage pool type can be associated with an access
  type by specifying the attribute
! @ref{e7,,Simple_Storage_Pool}. For example:
  
  @example
  My_Pool : My_Simple_Storage_Pool_Type;
--- 7600,7606 ----
  
  An object of a simple storage pool type can be associated with an access
  type by specifying the attribute
! @ref{e9,,Simple_Storage_Pool}. For example:
  
  @example
  My_Pool : My_Simple_Storage_Pool_Type;
*************** type Acc is access My_Data_Type;
*** 7501,7511 ****
  for Acc'Simple_Storage_Pool use My_Pool;
  @end example
  
! See attribute @ref{e7,,Simple_Storage_Pool}
  for further details.
  
  @node Pragma Source_File_Name,Pragma Source_File_Name_Project,Pragma Simple_Storage_Pool_Type,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-source-file-name}@anchor{e8}@anchor{gnat_rm/implementation_defined_pragmas id39}@anchor{e9}
  @section Pragma Source_File_Name
  
  
--- 7610,7620 ----
  for Acc'Simple_Storage_Pool use My_Pool;
  @end example
  
! See attribute @ref{e9,,Simple_Storage_Pool}
  for further details.
  
  @node Pragma Source_File_Name,Pragma Source_File_Name_Project,Pragma Simple_Storage_Pool_Type,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-source-file-name}@anchor{ea}@anchor{gnat_rm/implementation_defined_pragmas id40}@anchor{eb}
  @section Pragma Source_File_Name
  
  
*************** aware of these pragmas, and so other too
*** 7597,7615 ****
  be aware of the intended naming conventions. If you are using project files,
  file naming is controlled by Source_File_Name_Project pragmas, which are
  usually supplied automatically by the project manager. A pragma
! Source_File_Name cannot appear after a @ref{ea,,Pragma Source_File_Name_Project}.
  
  For more details on the use of the @code{Source_File_Name} pragma, see the
! sections on @code{Using Other File Names} and @cite{Alternative File Naming Schemes' in the :title:`GNAT User's Guide}.
  
  @node Pragma Source_File_Name_Project,Pragma Source_Reference,Pragma Source_File_Name,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-source-file-name-project}@anchor{ea}@anchor{gnat_rm/implementation_defined_pragmas id40}@anchor{eb}
  @section Pragma Source_File_Name_Project
  
  
  This pragma has the same syntax and semantics as pragma Source_File_Name.
  It is only allowed as a stand-alone configuration pragma.
! It cannot appear after a @ref{e8,,Pragma Source_File_Name}, and
  most importantly, once pragma Source_File_Name_Project appears,
  no further Source_File_Name pragmas are allowed.
  
--- 7706,7725 ----
  be aware of the intended naming conventions. If you are using project files,
  file naming is controlled by Source_File_Name_Project pragmas, which are
  usually supplied automatically by the project manager. A pragma
! Source_File_Name cannot appear after a @ref{ec,,Pragma Source_File_Name_Project}.
  
  For more details on the use of the @code{Source_File_Name} pragma, see the
! sections on @cite{Using Other File Names} and @cite{Alternative File Naming Schemes}
! in the @cite{GNAT User's Guide}.
  
  @node Pragma Source_File_Name_Project,Pragma Source_Reference,Pragma Source_File_Name,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-source-file-name-project}@anchor{ec}@anchor{gnat_rm/implementation_defined_pragmas id41}@anchor{ed}
  @section Pragma Source_File_Name_Project
  
  
  This pragma has the same syntax and semantics as pragma Source_File_Name.
  It is only allowed as a stand-alone configuration pragma.
! It cannot appear after a @ref{ea,,Pragma Source_File_Name}, and
  most importantly, once pragma Source_File_Name_Project appears,
  no further Source_File_Name pragmas are allowed.
  
*************** Source_File_Name or Source_File_Name_Pro
*** 7621,7627 ****
  known to the project manager).
  
  @node Pragma Source_Reference,Pragma SPARK_Mode,Pragma Source_File_Name_Project,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-source-reference}@anchor{ec}
  @section Pragma Source_Reference
  
  
--- 7731,7737 ----
  known to the project manager).
  
  @node Pragma Source_Reference,Pragma SPARK_Mode,Pragma Source_File_Name_Project,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-source-reference}@anchor{ee}
  @section Pragma Source_Reference
  
  
*************** string expression other than a string li
*** 7645,7651 ****
  is needed for error messages issued by all phases of the compiler.
  
  @node Pragma SPARK_Mode,Pragma Static_Elaboration_Desired,Pragma Source_Reference,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-spark-mode}@anchor{ed}@anchor{gnat_rm/implementation_defined_pragmas id41}@anchor{ee}
  @section Pragma SPARK_Mode
  
  
--- 7755,7761 ----
  is needed for error messages issued by all phases of the compiler.
  
  @node Pragma SPARK_Mode,Pragma Static_Elaboration_Desired,Pragma Source_Reference,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-spark-mode}@anchor{ef}@anchor{gnat_rm/implementation_defined_pragmas id42}@anchor{f0}
  @section Pragma SPARK_Mode
  
  
*************** SPARK_Mode (@code{Off}), then that pragm
*** 7727,7733 ****
  the package body.
  
  @node Pragma Static_Elaboration_Desired,Pragma Stream_Convert,Pragma SPARK_Mode,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-static-elaboration-desired}@anchor{ef}
  @section Pragma Static_Elaboration_Desired
  
  
--- 7837,7843 ----
  the package body.
  
  @node Pragma Static_Elaboration_Desired,Pragma Stream_Convert,Pragma SPARK_Mode,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-static-elaboration-desired}@anchor{f1}
  @section Pragma Static_Elaboration_Desired
  
  
*************** construction of larger aggregates with s
*** 7751,7757 ****
  choice.)
  
  @node Pragma Stream_Convert,Pragma Style_Checks,Pragma Static_Elaboration_Desired,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-stream-convert}@anchor{f0}
  @section Pragma Stream_Convert
  
  
--- 7861,7867 ----
  choice.)
  
  @node Pragma Stream_Convert,Pragma Style_Checks,Pragma Static_Elaboration_Desired,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-stream-convert}@anchor{f2}
  @section Pragma Stream_Convert
  
  
*************** the pragma is silently ignored, and the
*** 7828,7834 ****
  attributes is used instead.
  
  @node Pragma Style_Checks,Pragma Subtitle,Pragma Stream_Convert,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-style-checks}@anchor{f1}
  @section Pragma Style_Checks
  
  
--- 7938,7944 ----
  attributes is used instead.
  
  @node Pragma Style_Checks,Pragma Subtitle,Pragma Stream_Convert,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-style-checks}@anchor{f3}
  @section Pragma Style_Checks
  
  
*************** Rf2 : Integer := ARG;      -- OK, no err
*** 7901,7907 ****
  @end example
  
  @node Pragma Subtitle,Pragma Suppress,Pragma Style_Checks,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-subtitle}@anchor{f2}
  @section Pragma Subtitle
  
  
--- 8011,8017 ----
  @end example
  
  @node Pragma Subtitle,Pragma Suppress,Pragma Style_Checks,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-subtitle}@anchor{f4}
  @section Pragma Subtitle
  
  
*************** This pragma is recognized for compatibil
*** 7915,7921 ****
  but is ignored by GNAT.
  
  @node Pragma Suppress,Pragma Suppress_All,Pragma Subtitle,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-suppress}@anchor{f3}
  @section Pragma Suppress
  
  
--- 8025,8031 ----
  but is ignored by GNAT.
  
  @node Pragma Suppress,Pragma Suppress_All,Pragma Subtitle,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-suppress}@anchor{f5}
  @section Pragma Suppress
  
  
*************** Of course, run-time checks are omitted w
*** 7988,7994 ****
  that they will not fail, whether or not checks are suppressed.
  
  @node Pragma Suppress_All,Pragma Suppress_Debug_Info,Pragma Suppress,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-suppress-all}@anchor{f4}
  @section Pragma Suppress_All
  
  
--- 8098,8104 ----
  that they will not fail, whether or not checks are suppressed.
  
  @node Pragma Suppress_All,Pragma Suppress_Debug_Info,Pragma Suppress,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-suppress-all}@anchor{f6}
  @section Pragma Suppress_All
  
  
*************** The use of the standard Ada pragma @code
*** 8007,8013 ****
  as a normal configuration pragma is the preferred usage in GNAT.
  
  @node Pragma Suppress_Debug_Info,Pragma Suppress_Exception_Locations,Pragma Suppress_All,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-suppress-debug-info}@anchor{f5}@anchor{gnat_rm/implementation_defined_pragmas id42}@anchor{f6}
  @section Pragma Suppress_Debug_Info
  
  
--- 8117,8123 ----
  as a normal configuration pragma is the preferred usage in GNAT.
  
  @node Pragma Suppress_Debug_Info,Pragma Suppress_Exception_Locations,Pragma Suppress_All,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-suppress-debug-info}@anchor{f7}@anchor{gnat_rm/implementation_defined_pragmas id43}@anchor{f8}
  @section Pragma Suppress_Debug_Info
  
  
*************** for the specified entity. It is intended
*** 8022,8028 ****
  the debugger, and navigating around debugger problems.
  
  @node Pragma Suppress_Exception_Locations,Pragma Suppress_Initialization,Pragma Suppress_Debug_Info,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-suppress-exception-locations}@anchor{f7}
  @section Pragma Suppress_Exception_Locations
  
  
--- 8132,8138 ----
  the debugger, and navigating around debugger problems.
  
  @node Pragma Suppress_Exception_Locations,Pragma Suppress_Initialization,Pragma Suppress_Debug_Info,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-suppress-exception-locations}@anchor{f9}
  @section Pragma Suppress_Exception_Locations
  
  
*************** a partition, so it is fine to have some
*** 8045,8051 ****
  with this pragma and others compiled in normal mode without it.
  
  @node Pragma Suppress_Initialization,Pragma Task_Name,Pragma Suppress_Exception_Locations,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id43}@anchor{f8}@anchor{gnat_rm/implementation_defined_pragmas pragma-suppress-initialization}@anchor{f9}
  @section Pragma Suppress_Initialization
  
  
--- 8155,8161 ----
  with this pragma and others compiled in normal mode without it.
  
  @node Pragma Suppress_Initialization,Pragma Task_Name,Pragma Suppress_Exception_Locations,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id44}@anchor{fa}@anchor{gnat_rm/implementation_defined_pragmas pragma-suppress-initialization}@anchor{fb}
  @section Pragma Suppress_Initialization
  
  
*************** is suppressed, just as though its subtyp
*** 8090,8096 ****
  Suppress_Initialization, as described above.
  
  @node Pragma Task_Name,Pragma Task_Storage,Pragma Suppress_Initialization,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-task-name}@anchor{fa}
  @section Pragma Task_Name
  
  
--- 8200,8206 ----
  Suppress_Initialization, as described above.
  
  @node Pragma Task_Name,Pragma Task_Storage,Pragma Suppress_Initialization,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-task-name}@anchor{fc}
  @section Pragma Task_Name
  
  
*************** end;
*** 8146,8152 ****
  @end example
  
  @node Pragma Task_Storage,Pragma Test_Case,Pragma Task_Name,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-task-storage}@anchor{fb}
  @section Pragma Task_Storage
  
  
--- 8256,8262 ----
  @end example
  
  @node Pragma Task_Storage,Pragma Test_Case,Pragma Task_Name,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-task-storage}@anchor{fd}
  @section Pragma Task_Storage
  
  
*************** created, depending on the target.  This
*** 8166,8172 ****
  type.
  
  @node Pragma Test_Case,Pragma Thread_Local_Storage,Pragma Task_Storage,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-test-case}@anchor{fc}@anchor{gnat_rm/implementation_defined_pragmas id44}@anchor{fd}
  @section Pragma Test_Case
  
  
--- 8276,8282 ----
  type.
  
  @node Pragma Test_Case,Pragma Thread_Local_Storage,Pragma Task_Storage,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-test-case}@anchor{fe}@anchor{gnat_rm/implementation_defined_pragmas id45}@anchor{ff}
  @section Pragma Test_Case
  
  
*************** postcondition. Mode @code{Robustness} in
*** 8222,8228 ****
  postcondition of the subprogram should be ignored for this test case.
  
  @node Pragma Thread_Local_Storage,Pragma Time_Slice,Pragma Test_Case,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-thread-local-storage}@anchor{fe}@anchor{gnat_rm/implementation_defined_pragmas id45}@anchor{ff}
  @section Pragma Thread_Local_Storage
  
  
--- 8332,8338 ----
  postcondition of the subprogram should be ignored for this test case.
  
  @node Pragma Thread_Local_Storage,Pragma Time_Slice,Pragma Test_Case,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-thread-local-storage}@anchor{100}@anchor{gnat_rm/implementation_defined_pragmas id46}@anchor{101}
  @section Pragma Thread_Local_Storage
  
  
*************** If this pragma is used on a system where
*** 8260,8266 ****
  then an error message will be generated and the program will be rejected.
  
  @node Pragma Time_Slice,Pragma Title,Pragma Thread_Local_Storage,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-time-slice}@anchor{100}
  @section Pragma Time_Slice
  
  
--- 8370,8376 ----
  then an error message will be generated and the program will be rejected.
  
  @node Pragma Time_Slice,Pragma Title,Pragma Thread_Local_Storage,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-time-slice}@anchor{102}
  @section Pragma Time_Slice
  
  
*************** It is ignored if it is used in a system
*** 8276,8282 ****
  or if it appears in other than the main program unit.
  
  @node Pragma Title,Pragma Type_Invariant,Pragma Time_Slice,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-title}@anchor{101}
  @section Pragma Title
  
  
--- 8386,8392 ----
  or if it appears in other than the main program unit.
  
  @node Pragma Title,Pragma Type_Invariant,Pragma Time_Slice,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-title}@anchor{103}
  @section Pragma Title
  
  
*************** notation is used, and named and position
*** 8301,8307 ****
  following the normal rules for procedure calls in Ada.
  
  @node Pragma Type_Invariant,Pragma Type_Invariant_Class,Pragma Title,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-type-invariant}@anchor{102}
  @section Pragma Type_Invariant
  
  
--- 8411,8417 ----
  following the normal rules for procedure calls in Ada.
  
  @node Pragma Type_Invariant,Pragma Type_Invariant_Class,Pragma Title,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-type-invariant}@anchor{104}
  @section Pragma Type_Invariant
  
  
*************** controlled by the assertion identifier @
*** 8322,8328 ****
  rather than @code{Invariant}.
  
  @node Pragma Type_Invariant_Class,Pragma Unchecked_Union,Pragma Type_Invariant,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id46}@anchor{103}@anchor{gnat_rm/implementation_defined_pragmas pragma-type-invariant-class}@anchor{104}
  @section Pragma Type_Invariant_Class
  
  
--- 8432,8438 ----
  rather than @code{Invariant}.
  
  @node Pragma Type_Invariant_Class,Pragma Unchecked_Union,Pragma Type_Invariant,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id47}@anchor{105}@anchor{gnat_rm/implementation_defined_pragmas pragma-type-invariant-class}@anchor{106}
  @section Pragma Type_Invariant_Class
  
  
*************** policy that controls this pragma is @cod
*** 8349,8355 ****
  not @code{Type_Invariant_Class}.
  
  @node Pragma Unchecked_Union,Pragma Unevaluated_Use_Of_Old,Pragma Type_Invariant_Class,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unchecked-union}@anchor{105}
  @section Pragma Unchecked_Union
  
  
--- 8459,8465 ----
  not @code{Type_Invariant_Class}.
  
  @node Pragma Unchecked_Union,Pragma Unevaluated_Use_Of_Old,Pragma Type_Invariant_Class,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unchecked-union}@anchor{107}
  @section Pragma Unchecked_Union
  
  
*************** version in all language modes (Ada 83, A
*** 8369,8375 ****
  details, consult the Ada 2012 Reference Manual, section B.3.3.
  
  @node Pragma Unevaluated_Use_Of_Old,Pragma Unimplemented_Unit,Pragma Unchecked_Union,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unevaluated-use-of-old}@anchor{106}
  @section Pragma Unevaluated_Use_Of_Old
  
  
--- 8479,8485 ----
  details, consult the Ada 2012 Reference Manual, section B.3.3.
  
  @node Pragma Unevaluated_Use_Of_Old,Pragma Unimplemented_Unit,Pragma Unchecked_Union,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unevaluated-use-of-old}@anchor{108}
  @section Pragma Unevaluated_Use_Of_Old
  
  
*************** uses up to the end of the corresponding
*** 8424,8430 ****
  sequence of package declarations.
  
  @node Pragma Unimplemented_Unit,Pragma Universal_Aliasing,Pragma Unevaluated_Use_Of_Old,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unimplemented-unit}@anchor{107}
  @section Pragma Unimplemented_Unit
  
  
--- 8534,8540 ----
  sequence of package declarations.
  
  @node Pragma Unimplemented_Unit,Pragma Universal_Aliasing,Pragma Unevaluated_Use_Of_Old,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unimplemented-unit}@anchor{109}
  @section Pragma Unimplemented_Unit
  
  
*************** The abort only happens if code is being
*** 8444,8450 ****
  specs of unimplemented packages in syntax or semantic checking mode.
  
  @node Pragma Universal_Aliasing,Pragma Universal_Data,Pragma Unimplemented_Unit,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id47}@anchor{108}@anchor{gnat_rm/implementation_defined_pragmas pragma-universal-aliasing}@anchor{109}
  @section Pragma Universal_Aliasing
  
  
--- 8554,8560 ----
  specs of unimplemented packages in syntax or semantic checking mode.
  
  @node Pragma Universal_Aliasing,Pragma Universal_Data,Pragma Unimplemented_Unit,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-universal-aliasing}@anchor{10a}@anchor{gnat_rm/implementation_defined_pragmas id48}@anchor{10b}
  @section Pragma Universal_Aliasing
  
  
*************** situations in which it must be suppresse
*** 8463,8469 ****
  @code{Optimization and Strict Aliasing} in the @cite{GNAT User's Guide}.
  
  @node Pragma Universal_Data,Pragma Unmodified,Pragma Universal_Aliasing,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-universal-data}@anchor{10a}@anchor{gnat_rm/implementation_defined_pragmas id48}@anchor{10b}
  @section Pragma Universal_Data
  
  
--- 8573,8579 ----
  @code{Optimization and Strict Aliasing} in the @cite{GNAT User's Guide}.
  
  @node Pragma Universal_Data,Pragma Unmodified,Pragma Universal_Aliasing,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-universal-data}@anchor{10c}@anchor{gnat_rm/implementation_defined_pragmas id49}@anchor{10d}
  @section Pragma Universal_Data
  
  
*************** of this pragma is also available by appl
*** 8487,8493 ****
  compilations of units where universal addressing of the data is desired.
  
  @node Pragma Unmodified,Pragma Unreferenced,Pragma Universal_Data,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unmodified}@anchor{10c}@anchor{gnat_rm/implementation_defined_pragmas id49}@anchor{10d}
  @section Pragma Unmodified
  
  
--- 8597,8603 ----
  compilations of units where universal addressing of the data is desired.
  
  @node Pragma Unmodified,Pragma Unreferenced,Pragma Universal_Data,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id50}@anchor{10e}@anchor{gnat_rm/implementation_defined_pragmas pragma-unmodified}@anchor{10f}
  @section Pragma Unmodified
  
  
*************** Thus it is never necessary to use @code{
*** 8521,8527 ****
  variables, though it is harmless to do so.
  
  @node Pragma Unreferenced,Pragma Unreferenced_Objects,Pragma Unmodified,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unreferenced}@anchor{10e}@anchor{gnat_rm/implementation_defined_pragmas id50}@anchor{10f}
  @section Pragma Unreferenced
  
  
--- 8631,8637 ----
  variables, though it is harmless to do so.
  
  @node Pragma Unreferenced,Pragma Unreferenced_Objects,Pragma Unmodified,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unreferenced}@anchor{110}@anchor{gnat_rm/implementation_defined_pragmas id51}@anchor{111}
  @section Pragma Unreferenced
  
  
*************** Note that if a warning is desired for al
*** 8565,8571 ****
  regardless of whether they occur in the same unit as the subprogram
  declaration, then this pragma should not be used (calls from another
  unit would not be flagged); pragma Obsolescent can be used instead
! for this purpose, see @ref{ad,,Pragma Obsolescent}.
  
  The second form of pragma @code{Unreferenced} is used within a context
  clause. In this case the arguments must be unit names of units previously
--- 8675,8681 ----
  regardless of whether they occur in the same unit as the subprogram
  declaration, then this pragma should not be used (calls from another
  unit would not be flagged); pragma Obsolescent can be used instead
! for this purpose, see @ref{af,,Pragma Obsolescent}.
  
  The second form of pragma @code{Unreferenced} is used within a context
  clause. In this case the arguments must be unit names of units previously
*************** Thus it is never necessary to use @code{
*** 8581,8587 ****
  variables, though it is harmless to do so.
  
  @node Pragma Unreferenced_Objects,Pragma Unreserve_All_Interrupts,Pragma Unreferenced,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unreferenced-objects}@anchor{110}@anchor{gnat_rm/implementation_defined_pragmas id51}@anchor{111}
  @section Pragma Unreferenced_Objects
  
  
--- 8691,8697 ----
  variables, though it is harmless to do so.
  
  @node Pragma Unreferenced_Objects,Pragma Unreserve_All_Interrupts,Pragma Unreferenced,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unreferenced-objects}@anchor{112}@anchor{gnat_rm/implementation_defined_pragmas id52}@anchor{113}
  @section Pragma Unreferenced_Objects
  
  
*************** compiler will automatically suppress unw
*** 8606,8612 ****
  not being referenced.
  
  @node Pragma Unreserve_All_Interrupts,Pragma Unsuppress,Pragma Unreferenced_Objects,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unreserve-all-interrupts}@anchor{112}
  @section Pragma Unreserve_All_Interrupts
  
  
--- 8716,8722 ----
  not being referenced.
  
  @node Pragma Unreserve_All_Interrupts,Pragma Unsuppress,Pragma Unreferenced_Objects,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unreserve-all-interrupts}@anchor{114}
  @section Pragma Unreserve_All_Interrupts
  
  
*************** handled, see pragma @code{Interrupt_Stat
*** 8642,8648 ****
  of the @code{Unreserve_All_Interrupts} pragma.
  
  @node Pragma Unsuppress,Pragma Use_VADS_Size,Pragma Unreserve_All_Interrupts,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unsuppress}@anchor{113}
  @section Pragma Unsuppress
  
  
--- 8752,8758 ----
  of the @code{Unreserve_All_Interrupts} pragma.
  
  @node Pragma Unsuppress,Pragma Use_VADS_Size,Pragma Unreserve_All_Interrupts,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unsuppress}@anchor{115}
  @section Pragma Unsuppress
  
  
*************** number of implementation-defined check n
*** 8678,8684 ****
  @code{Suppress} for full details.
  
  @node Pragma Use_VADS_Size,Pragma Unused,Pragma Unsuppress,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-use-vads-size}@anchor{114}
  @section Pragma Use_VADS_Size
  
  
--- 8788,8794 ----
  @code{Suppress} for full details.
  
  @node Pragma Use_VADS_Size,Pragma Unused,Pragma Unsuppress,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-use-vads-size}@anchor{116}
  @section Pragma Use_VADS_Size
  
  
*************** as implemented in the VADS compiler.  Se
*** 8702,8708 ****
  attribute for further details.
  
  @node Pragma Unused,Pragma Validity_Checks,Pragma Use_VADS_Size,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unused}@anchor{115}@anchor{gnat_rm/implementation_defined_pragmas id52}@anchor{116}
  @section Pragma Unused
  
  
--- 8812,8818 ----
  attribute for further details.
  
  @node Pragma Unused,Pragma Validity_Checks,Pragma Use_VADS_Size,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-unused}@anchor{117}@anchor{gnat_rm/implementation_defined_pragmas id53}@anchor{118}
  @section Pragma Unused
  
  
*************** Thus it is never necessary to use @code{
*** 8736,8742 ****
  variables, though it is harmless to do so.
  
  @node Pragma Validity_Checks,Pragma Volatile,Pragma Unused,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-validity-checks}@anchor{117}
  @section Pragma Validity_Checks
  
  
--- 8846,8852 ----
  variables, though it is harmless to do so.
  
  @node Pragma Validity_Checks,Pragma Volatile,Pragma Unused,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-validity-checks}@anchor{119}
  @section Pragma Validity_Checks
  
  
*************** $ gcc -c -gnatVim ...
*** 8778,8788 ****
  @end itemize
  
  The form ALL_CHECKS activates all standard checks (its use is equivalent
! to the use of the @code{gnatva} switch.
  
! The forms with @code{Off} and @code{On}
! can be used to temporarily disable validity checks
! as shown in the following example:
  
  @example
  pragma Validity_Checks ("c"); -- validity checks for copies
--- 8888,8897 ----
  @end itemize
  
  The form ALL_CHECKS activates all standard checks (its use is equivalent
! to the use of the @code{gnatVa} switch).
  
! The forms with @code{Off} and @code{On} can be used to temporarily disable
! validity checks as shown in the following example:
  
  @example
  pragma Validity_Checks ("c"); -- validity checks for copies
*************** A := C;                       -- C will
*** 8793,8799 ****
  @end example
  
  @node Pragma Volatile,Pragma Volatile_Full_Access,Pragma Validity_Checks,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-volatile}@anchor{118}
  @section Pragma Volatile
  
  
--- 8902,8908 ----
  @end example
  
  @node Pragma Volatile,Pragma Volatile_Full_Access,Pragma Validity_Checks,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id54}@anchor{11a}@anchor{gnat_rm/implementation_defined_pragmas pragma-volatile}@anchor{11b}
  @section Pragma Volatile
  
  
*************** implementation of pragma Volatile is upw
*** 8811,8817 ****
  implementation in DEC Ada 83.
  
  @node Pragma Volatile_Full_Access,Pragma Volatile_Function,Pragma Volatile,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-volatile-full-access}@anchor{119}@anchor{gnat_rm/implementation_defined_pragmas id53}@anchor{11a}
  @section Pragma Volatile_Full_Access
  
  
--- 8920,8926 ----
  implementation in DEC Ada 83.
  
  @node Pragma Volatile_Full_Access,Pragma Volatile_Function,Pragma Volatile,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id55}@anchor{11c}@anchor{gnat_rm/implementation_defined_pragmas pragma-volatile-full-access}@anchor{11d}
  @section Pragma Volatile_Full_Access
  
  
*************** pragma Volatile_Full_Access (LOCAL_NAME)
*** 8824,8831 ****
  This is similar in effect to pragma Volatile, except that any reference to the
  object is guaranteed to be done only with instructions that read or write all
  the bits of the object. Furthermore, if the object is of a composite type,
! then any reference to a component of the object is guaranteed to read and/or
! write all the bits of the object.
  
  The intention is that this be suitable for use with memory-mapped I/O devices
  on some machines. Note that there are two important respects in which this is
--- 8933,8940 ----
  This is similar in effect to pragma Volatile, except that any reference to the
  object is guaranteed to be done only with instructions that read or write all
  the bits of the object. Furthermore, if the object is of a composite type,
! then any reference to a subcomponent of the object is guaranteed to read
! and/or write all the bits of the object.
  
  The intention is that this be suitable for use with memory-mapped I/O devices
  on some machines. Note that there are two important respects in which this is
*************** is not to the whole object; the compiler
*** 8837,8849 ****
  access only part of the object in this case.
  
  It is not permissible to specify @code{Atomic} and @code{Volatile_Full_Access} for
! the same object.
  
  It is not permissible to specify @code{Volatile_Full_Access} for a composite
! (record or array) type or object that has at least one @code{Aliased} component.
  
  @node Pragma Volatile_Function,Pragma Warning_As_Error,Pragma Volatile_Full_Access,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id54}@anchor{11b}@anchor{gnat_rm/implementation_defined_pragmas pragma-volatile-function}@anchor{11c}
  @section Pragma Volatile_Function
  
  
--- 8946,8958 ----
  access only part of the object in this case.
  
  It is not permissible to specify @code{Atomic} and @code{Volatile_Full_Access} for
! the same type or object.
  
  It is not permissible to specify @code{Volatile_Full_Access} for a composite
! (record or array) type or object that has an @code{Aliased} subcomponent.
  
  @node Pragma Volatile_Function,Pragma Warning_As_Error,Pragma Volatile_Full_Access,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id56}@anchor{11e}@anchor{gnat_rm/implementation_defined_pragmas pragma-volatile-function}@anchor{11f}
  @section Pragma Volatile_Function
  
  
*************** For the semantics of this pragma, see th
*** 8857,8863 ****
  in the SPARK 2014 Reference Manual, section 7.1.2.
  
  @node Pragma Warning_As_Error,Pragma Warnings,Pragma Volatile_Function,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-warning-as-error}@anchor{11d}
  @section Pragma Warning_As_Error
  
  
--- 8966,8972 ----
  in the SPARK 2014 Reference Manual, section 7.1.2.
  
  @node Pragma Warning_As_Error,Pragma Warnings,Pragma Volatile_Function,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-warning-as-error}@anchor{120}
  @section Pragma Warning_As_Error
  
  
*************** pragma Warning_As_Error (static_string_E
*** 8868,8898 ****
  @end example
  
  This configuration pragma allows the programmer to specify a set
! of warnings that will be treated as errors. Any warning which
  matches the pattern given by the pragma argument will be treated
! as an error. This gives much more precise control that -gnatwe
! which treats all warnings as errors.
  
! The pattern may contain asterisks, which match zero or more characters in
! the message. For example, you can use
! @code{pragma Warning_As_Error ("bits of*unused")} to treat the warning
! message @code{warning: 960 bits of "a" unused} as an error. No other regular
! expression notations are permitted. All characters other than asterisk in
! these three specific cases are treated as literal characters in the match.
! The match is case insensitive, for example XYZ matches xyz.
  
  Note that the pattern matches if it occurs anywhere within the warning
  message string (it is not necessary to put an asterisk at the start and
  the end of the message, since this is implied).
  
  Another possibility for the static_string_EXPRESSION which works whether
! or not error tags are enabled (@emph{-gnatw.d}) is to use the
  @emph{-gnatw} tag string, enclosed in brackets,
! as shown in the example below, to treat a class of warnings as errors.
  
  The above use of patterns to match the message applies only to warning
  messages generated by the front end. This pragma can also be applied to
! warnings provided by the back end and mentioned in @ref{11e,,Pragma Warnings}.
  By using a single full @emph{-Wxxx} switch in the pragma, such warnings
  can also be treated as errors.
  
--- 8977,9012 ----
  @end example
  
  This configuration pragma allows the programmer to specify a set
! of warnings that will be treated as errors. Any warning that
  matches the pattern given by the pragma argument will be treated
! as an error. This gives more precise control than -gnatwe,
! which treats warnings as errors.
  
! This pragma can apply to regular warnings (messages enabled by -gnatw)
! and to style warnings (messages that start with "(style)",
! enabled by -gnaty).
! 
! The pattern may contain asterisks, which match zero or more characters
! in the message. For example, you can use @code{pragma Warning_As_Error
! ("bits of*unused")} to treat the warning message @code{warning: 960 bits of
! "a" unused} as an error. All characters other than asterisk are treated
! as literal characters in the match. The match is case insensitive; for
! example XYZ matches xyz.
  
  Note that the pattern matches if it occurs anywhere within the warning
  message string (it is not necessary to put an asterisk at the start and
  the end of the message, since this is implied).
  
  Another possibility for the static_string_EXPRESSION which works whether
! or not error tags are enabled (@emph{-gnatw.d}) is to use a single
  @emph{-gnatw} tag string, enclosed in brackets,
! as shown in the example below, to treat one category of warnings as errors.
! Note that if you want to treat multiple categories of warnings as errors,
! you can use multiple pragma Warning_As_Error.
  
  The above use of patterns to match the message applies only to warning
  messages generated by the front end. This pragma can also be applied to
! warnings provided by the back end and mentioned in @ref{121,,Pragma Warnings}.
  By using a single full @emph{-Wxxx} switch in the pragma, such warnings
  can also be treated as errors.
  
*************** the tag is changed from "warning:" to "e
*** 8942,8948 ****
  "[warning-as-error]" is appended to the end of the message.
  
  @node Pragma Warnings,Pragma Weak_External,Pragma Warning_As_Error,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id55}@anchor{11f}@anchor{gnat_rm/implementation_defined_pragmas pragma-warnings}@anchor{11e}
  @section Pragma Warnings
  
  
--- 9056,9062 ----
  "[warning-as-error]" is appended to the end of the message.
  
  @node Pragma Warnings,Pragma Weak_External,Pragma Warning_As_Error,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas id57}@anchor{122}@anchor{gnat_rm/implementation_defined_pragmas pragma-warnings}@anchor{121}
  @section Pragma Warnings
  
  
*************** asterisks is similar in effect to specif
*** 9079,9085 ****
  @code{pragma Warnings (On, "***")} will be required. This can be
  helpful in avoiding forgetting to turn warnings back on.
  
! Note: the debug flag @code{-gnatd.i} (@code{/NOWARNINGS_PRAGMAS} in VMS) can be
  used to cause the compiler to entirely ignore all WARNINGS pragmas. This can
  be useful in checking whether obsolete pragmas in existing programs are hiding
  real problems.
--- 9193,9199 ----
  @code{pragma Warnings (On, "***")} will be required. This can be
  helpful in avoiding forgetting to turn warnings back on.
  
! Note: the debug flag @code{-gnatd.i} can be
  used to cause the compiler to entirely ignore all WARNINGS pragmas. This can
  be useful in checking whether obsolete pragmas in existing programs are hiding
  real problems.
*************** selectively for each tool, and as a cons
*** 9098,9104 ****
  Warnings with switch @code{-gnatw.w}.
  
  @node Pragma Weak_External,Pragma Wide_Character_Encoding,Pragma Warnings,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-weak-external}@anchor{120}
  @section Pragma Weak_External
  
  
--- 9212,9218 ----
  Warnings with switch @code{-gnatw.w}.
  
  @node Pragma Weak_External,Pragma Wide_Character_Encoding,Pragma Warnings,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-weak-external}@anchor{123}
  @section Pragma Weak_External
  
  
*************** end External_Module;
*** 9149,9155 ****
  @end example
  
  @node Pragma Wide_Character_Encoding,,Pragma Weak_External,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-wide-character-encoding}@anchor{121}
  @section Pragma Wide_Character_Encoding
  
  
--- 9263,9269 ----
  @end example
  
  @node Pragma Wide_Character_Encoding,,Pragma Weak_External,Implementation Defined Pragmas
! @anchor{gnat_rm/implementation_defined_pragmas pragma-wide-character-encoding}@anchor{124}
  @section Pragma Wide_Character_Encoding
  
  
*************** encoding within that file, and does not
*** 9180,9186 ****
  or subunits.
  
  @node Implementation Defined Aspects,Implementation Defined Attributes,Implementation Defined Pragmas,Top
! @anchor{gnat_rm/implementation_defined_aspects implementation-defined-aspects}@anchor{122}@anchor{gnat_rm/implementation_defined_aspects doc}@anchor{123}@anchor{gnat_rm/implementation_defined_aspects id1}@anchor{124}
  @chapter Implementation Defined Aspects
  
  
--- 9294,9300 ----
  or subunits.
  
  @node Implementation Defined Aspects,Implementation Defined Attributes,Implementation Defined Pragmas,Top
! @anchor{gnat_rm/implementation_defined_aspects implementation-defined-aspects}@anchor{125}@anchor{gnat_rm/implementation_defined_aspects doc}@anchor{126}@anchor{gnat_rm/implementation_defined_aspects id1}@anchor{127}
  @chapter Implementation Defined Aspects
  
  
*************** or attribute definition clause.
*** 9261,9266 ****
--- 9375,9381 ----
  * Aspect Linker_Section:: 
  * Aspect Lock_Free:: 
  * Aspect Max_Queue_Length:: 
+ * Aspect No_Caching:: 
  * Aspect No_Elaboration_Code_All:: 
  * Aspect No_Inline:: 
  * Aspect No_Tagged_Streams:: 
*************** or attribute definition clause.
*** 9298,9304 ****
  @end menu
  
  @node Aspect Abstract_State,Aspect Annotate,,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-abstract-state}@anchor{125}
  @section Aspect Abstract_State
  
  
--- 9413,9419 ----
  @end menu
  
  @node Aspect Abstract_State,Aspect Annotate,,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-abstract-state}@anchor{128}
  @section Aspect Abstract_State
  
  
*************** or attribute definition clause.
*** 9307,9313 ****
  This aspect is equivalent to @ref{1c,,pragma Abstract_State}.
  
  @node Aspect Annotate,Aspect Async_Readers,Aspect Abstract_State,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-annotate}@anchor{126}
  @section Aspect Annotate
  
  
--- 9422,9428 ----
  This aspect is equivalent to @ref{1c,,pragma Abstract_State}.
  
  @node Aspect Annotate,Aspect Async_Readers,Aspect Abstract_State,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-annotate}@anchor{129}
  @section Aspect Annotate
  
  
*************** This aspect is equivalent to @ref{1c,,pr
*** 9315,9321 ****
  
  There are three forms of this aspect (where ID is an identifier,
  and ARG is a general expression),
! corresponding to @ref{29,,pragma Annotate}.
  
  
  @table @asis
--- 9430,9436 ----
  
  There are three forms of this aspect (where ID is an identifier,
  and ARG is a general expression),
! corresponding to @ref{2a,,pragma Annotate}.
  
  
  @table @asis
*************** Equivalent to @code{pragma Annotate (ID,
*** 9334,9396 ****
  @end table
  
  @node Aspect Async_Readers,Aspect Async_Writers,Aspect Annotate,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-async-readers}@anchor{127}
  @section Aspect Async_Readers
  
  
  @geindex Async_Readers
  
! This boolean aspect is equivalent to @ref{30,,pragma Async_Readers}.
  
  @node Aspect Async_Writers,Aspect Constant_After_Elaboration,Aspect Async_Readers,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-async-writers}@anchor{128}
  @section Aspect Async_Writers
  
  
  @geindex Async_Writers
  
! This boolean aspect is equivalent to @ref{33,,pragma Async_Writers}.
  
  @node Aspect Constant_After_Elaboration,Aspect Contract_Cases,Aspect Async_Writers,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-constant-after-elaboration}@anchor{129}
  @section Aspect Constant_After_Elaboration
  
  
  @geindex Constant_After_Elaboration
  
! This aspect is equivalent to @ref{44,,pragma Constant_After_Elaboration}.
  
  @node Aspect Contract_Cases,Aspect Depends,Aspect Constant_After_Elaboration,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-contract-cases}@anchor{12a}
  @section Aspect Contract_Cases
  
  
  @geindex Contract_Cases
  
! This aspect is equivalent to @ref{46,,pragma Contract_Cases}, the sequence
  of clauses being enclosed in parentheses so that syntactically it is an
  aggregate.
  
  @node Aspect Depends,Aspect Default_Initial_Condition,Aspect Contract_Cases,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-depends}@anchor{12b}
  @section Aspect Depends
  
  
  @geindex Depends
  
! This aspect is equivalent to @ref{55,,pragma Depends}.
  
  @node Aspect Default_Initial_Condition,Aspect Dimension,Aspect Depends,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-default-initial-condition}@anchor{12c}
  @section Aspect Default_Initial_Condition
  
  
  @geindex Default_Initial_Condition
  
! This aspect is equivalent to @ref{50,,pragma Default_Initial_Condition}.
  
  @node Aspect Dimension,Aspect Dimension_System,Aspect Default_Initial_Condition,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-dimension}@anchor{12d}
  @section Aspect Dimension
  
  
--- 9449,9511 ----
  @end table
  
  @node Aspect Async_Readers,Aspect Async_Writers,Aspect Annotate,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-async-readers}@anchor{12a}
  @section Aspect Async_Readers
  
  
  @geindex Async_Readers
  
! This boolean aspect is equivalent to @ref{31,,pragma Async_Readers}.
  
  @node Aspect Async_Writers,Aspect Constant_After_Elaboration,Aspect Async_Readers,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-async-writers}@anchor{12b}
  @section Aspect Async_Writers
  
  
  @geindex Async_Writers
  
! This boolean aspect is equivalent to @ref{34,,pragma Async_Writers}.
  
  @node Aspect Constant_After_Elaboration,Aspect Contract_Cases,Aspect Async_Writers,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-constant-after-elaboration}@anchor{12c}
  @section Aspect Constant_After_Elaboration
  
  
  @geindex Constant_After_Elaboration
  
! This aspect is equivalent to @ref{45,,pragma Constant_After_Elaboration}.
  
  @node Aspect Contract_Cases,Aspect Depends,Aspect Constant_After_Elaboration,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-contract-cases}@anchor{12d}
  @section Aspect Contract_Cases
  
  
  @geindex Contract_Cases
  
! This aspect is equivalent to @ref{47,,pragma Contract_Cases}, the sequence
  of clauses being enclosed in parentheses so that syntactically it is an
  aggregate.
  
  @node Aspect Depends,Aspect Default_Initial_Condition,Aspect Contract_Cases,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-depends}@anchor{12e}
  @section Aspect Depends
  
  
  @geindex Depends
  
! This aspect is equivalent to @ref{56,,pragma Depends}.
  
  @node Aspect Default_Initial_Condition,Aspect Dimension,Aspect Depends,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-default-initial-condition}@anchor{12f}
  @section Aspect Default_Initial_Condition
  
  
  @geindex Default_Initial_Condition
  
! This aspect is equivalent to @ref{51,,pragma Default_Initial_Condition}.
  
  @node Aspect Dimension,Aspect Dimension_System,Aspect Default_Initial_Condition,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-dimension}@anchor{130}
  @section Aspect Dimension
  
  
*************** Note that when the dimensioned type is a
*** 9426,9432 ****
  dimension value must be an integer literal.
  
  @node Aspect Dimension_System,Aspect Disable_Controlled,Aspect Dimension,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-dimension-system}@anchor{12e}
  @section Aspect Dimension_System
  
  
--- 9541,9547 ----
  dimension value must be an integer literal.
  
  @node Aspect Dimension_System,Aspect Disable_Controlled,Aspect Dimension,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-dimension-system}@anchor{131}
  @section Aspect Dimension_System
  
  
*************** See section 'Performing Dimensionality A
*** 9486,9492 ****
  Guide for detailed examples of use of the dimension system.
  
  @node Aspect Disable_Controlled,Aspect Effective_Reads,Aspect Dimension_System,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-disable-controlled}@anchor{12f}
  @section Aspect Disable_Controlled
  
  
--- 9601,9607 ----
  Guide for detailed examples of use of the dimension system.
  
  @node Aspect Disable_Controlled,Aspect Effective_Reads,Aspect Dimension_System,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-disable-controlled}@anchor{132}
  @section Aspect Disable_Controlled
  
  
*************** where for example you might want a recor
*** 9499,9608 ****
  whether some run-time check is enabled or suppressed.
  
  @node Aspect Effective_Reads,Aspect Effective_Writes,Aspect Disable_Controlled,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-effective-reads}@anchor{130}
  @section Aspect Effective_Reads
  
  
  @geindex Effective_Reads
  
! This aspect is equivalent to @ref{5b,,pragma Effective_Reads}.
  
  @node Aspect Effective_Writes,Aspect Extensions_Visible,Aspect Effective_Reads,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-effective-writes}@anchor{131}
  @section Aspect Effective_Writes
  
  
  @geindex Effective_Writes
  
! This aspect is equivalent to @ref{5d,,pragma Effective_Writes}.
  
  @node Aspect Extensions_Visible,Aspect Favor_Top_Level,Aspect Effective_Writes,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-extensions-visible}@anchor{132}
  @section Aspect Extensions_Visible
  
  
  @geindex Extensions_Visible
  
! This aspect is equivalent to @ref{69,,pragma Extensions_Visible}.
  
  @node Aspect Favor_Top_Level,Aspect Ghost,Aspect Extensions_Visible,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-favor-top-level}@anchor{133}
  @section Aspect Favor_Top_Level
  
  
  @geindex Favor_Top_Level
  
! This boolean aspect is equivalent to @ref{6e,,pragma Favor_Top_Level}.
  
  @node Aspect Ghost,Aspect Global,Aspect Favor_Top_Level,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-ghost}@anchor{134}
  @section Aspect Ghost
  
  
  @geindex Ghost
  
! This aspect is equivalent to @ref{71,,pragma Ghost}.
  
  @node Aspect Global,Aspect Initial_Condition,Aspect Ghost,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-global}@anchor{135}
  @section Aspect Global
  
  
  @geindex Global
  
! This aspect is equivalent to @ref{73,,pragma Global}.
  
  @node Aspect Initial_Condition,Aspect Initializes,Aspect Global,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-initial-condition}@anchor{136}
  @section Aspect Initial_Condition
  
  
  @geindex Initial_Condition
  
! This aspect is equivalent to @ref{81,,pragma Initial_Condition}.
  
  @node Aspect Initializes,Aspect Inline_Always,Aspect Initial_Condition,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-initializes}@anchor{137}
  @section Aspect Initializes
  
  
  @geindex Initializes
  
! This aspect is equivalent to @ref{83,,pragma Initializes}.
  
  @node Aspect Inline_Always,Aspect Invariant,Aspect Initializes,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-inline-always}@anchor{138}
  @section Aspect Inline_Always
  
  
  @geindex Inline_Always
  
! This boolean aspect is equivalent to @ref{86,,pragma Inline_Always}.
  
  @node Aspect Invariant,Aspect Invariant'Class,Aspect Inline_Always,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-invariant}@anchor{139}
  @section Aspect Invariant
  
  
  @geindex Invariant
  
! This aspect is equivalent to @ref{8d,,pragma Invariant}. It is a
  synonym for the language defined aspect @code{Type_Invariant} except
  that it is separately controllable using pragma @code{Assertion_Policy}.
  
  @node Aspect Invariant'Class,Aspect Iterable,Aspect Invariant,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-invariant-class}@anchor{13a}
  @section Aspect Invariant'Class
  
  
  @geindex Invariant'Class
  
! This aspect is equivalent to @ref{104,,pragma Type_Invariant_Class}. It is a
  synonym for the language defined aspect @code{Type_Invariant'Class} except
  that it is separately controllable using pragma @code{Assertion_Policy}.
  
  @node Aspect Iterable,Aspect Linker_Section,Aspect Invariant'Class,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-iterable}@anchor{13b}
  @section Aspect Iterable
  
  
--- 9614,9723 ----
  whether some run-time check is enabled or suppressed.
  
  @node Aspect Effective_Reads,Aspect Effective_Writes,Aspect Disable_Controlled,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-effective-reads}@anchor{133}
  @section Aspect Effective_Reads
  
  
  @geindex Effective_Reads
  
! This aspect is equivalent to @ref{5c,,pragma Effective_Reads}.
  
  @node Aspect Effective_Writes,Aspect Extensions_Visible,Aspect Effective_Reads,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-effective-writes}@anchor{134}
  @section Aspect Effective_Writes
  
  
  @geindex Effective_Writes
  
! This aspect is equivalent to @ref{5e,,pragma Effective_Writes}.
  
  @node Aspect Extensions_Visible,Aspect Favor_Top_Level,Aspect Effective_Writes,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-extensions-visible}@anchor{135}
  @section Aspect Extensions_Visible
  
  
  @geindex Extensions_Visible
  
! This aspect is equivalent to @ref{6a,,pragma Extensions_Visible}.
  
  @node Aspect Favor_Top_Level,Aspect Ghost,Aspect Extensions_Visible,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-favor-top-level}@anchor{136}
  @section Aspect Favor_Top_Level
  
  
  @geindex Favor_Top_Level
  
! This boolean aspect is equivalent to @ref{6f,,pragma Favor_Top_Level}.
  
  @node Aspect Ghost,Aspect Global,Aspect Favor_Top_Level,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-ghost}@anchor{137}
  @section Aspect Ghost
  
  
  @geindex Ghost
  
! This aspect is equivalent to @ref{72,,pragma Ghost}.
  
  @node Aspect Global,Aspect Initial_Condition,Aspect Ghost,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-global}@anchor{138}
  @section Aspect Global
  
  
  @geindex Global
  
! This aspect is equivalent to @ref{74,,pragma Global}.
  
  @node Aspect Initial_Condition,Aspect Initializes,Aspect Global,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-initial-condition}@anchor{139}
  @section Aspect Initial_Condition
  
  
  @geindex Initial_Condition
  
! This aspect is equivalent to @ref{82,,pragma Initial_Condition}.
  
  @node Aspect Initializes,Aspect Inline_Always,Aspect Initial_Condition,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-initializes}@anchor{13a}
  @section Aspect Initializes
  
  
  @geindex Initializes
  
! This aspect is equivalent to @ref{84,,pragma Initializes}.
  
  @node Aspect Inline_Always,Aspect Invariant,Aspect Initializes,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-inline-always}@anchor{13b}
  @section Aspect Inline_Always
  
  
  @geindex Inline_Always
  
! This boolean aspect is equivalent to @ref{87,,pragma Inline_Always}.
  
  @node Aspect Invariant,Aspect Invariant'Class,Aspect Inline_Always,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-invariant}@anchor{13c}
  @section Aspect Invariant
  
  
  @geindex Invariant
  
! This aspect is equivalent to @ref{8e,,pragma Invariant}. It is a
  synonym for the language defined aspect @code{Type_Invariant} except
  that it is separately controllable using pragma @code{Assertion_Policy}.
  
  @node Aspect Invariant'Class,Aspect Iterable,Aspect Invariant,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-invariant-class}@anchor{13d}
  @section Aspect Invariant'Class
  
  
  @geindex Invariant'Class
  
! This aspect is equivalent to @ref{106,,pragma Type_Invariant_Class}. It is a
  synonym for the language defined aspect @code{Type_Invariant'Class} except
  that it is separately controllable using pragma @code{Assertion_Policy}.
  
  @node Aspect Iterable,Aspect Linker_Section,Aspect Invariant'Class,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-iterable}@anchor{13e}
  @section Aspect Iterable
  
  
*************** function Get_Element (Cont : Container;
*** 9682,9789 ****
  This aspect is used in the GNAT-defined formal container packages.
  
  @node Aspect Linker_Section,Aspect Lock_Free,Aspect Iterable,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-linker-section}@anchor{13c}
  @section Aspect Linker_Section
  
  
  @geindex Linker_Section
  
! This aspect is equivalent to @ref{95,,pragma Linker_Section}.
  
  @node Aspect Lock_Free,Aspect Max_Queue_Length,Aspect Linker_Section,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-lock-free}@anchor{13d}
  @section Aspect Lock_Free
  
  
  @geindex Lock_Free
  
! This boolean aspect is equivalent to @ref{97,,pragma Lock_Free}.
  
! @node Aspect Max_Queue_Length,Aspect No_Elaboration_Code_All,Aspect Lock_Free,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-max-queue-length}@anchor{13e}
  @section Aspect Max_Queue_Length
  
  
  @geindex Max_Queue_Length
  
! This aspect is equivalent to @ref{9f,,pragma Max_Queue_Length}.
  
! @node Aspect No_Elaboration_Code_All,Aspect No_Inline,Aspect Max_Queue_Length,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-no-elaboration-code-all}@anchor{13f}
  @section Aspect No_Elaboration_Code_All
  
  
  @geindex No_Elaboration_Code_All
  
! This aspect is equivalent to @ref{a3,,pragma No_Elaboration_Code_All}
  for a program unit.
  
  @node Aspect No_Inline,Aspect No_Tagged_Streams,Aspect No_Elaboration_Code_All,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-no-inline}@anchor{140}
  @section Aspect No_Inline
  
  
  @geindex No_Inline
  
! This boolean aspect is equivalent to @ref{a6,,pragma No_Inline}.
  
  @node Aspect No_Tagged_Streams,Aspect Object_Size,Aspect No_Inline,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-no-tagged-streams}@anchor{141}
  @section Aspect No_Tagged_Streams
  
  
  @geindex No_Tagged_Streams
  
! This aspect is equivalent to @ref{aa,,pragma No_Tagged_Streams} with an
  argument specifying a root tagged type (thus this aspect can only be
  applied to such a type).
  
  @node Aspect Object_Size,Aspect Obsolescent,Aspect No_Tagged_Streams,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-object-size}@anchor{142}
  @section Aspect Object_Size
  
  
  @geindex Object_Size
  
! This aspect is equivalent to @ref{143,,attribute Object_Size}.
  
  @node Aspect Obsolescent,Aspect Part_Of,Aspect Object_Size,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-obsolescent}@anchor{144}
  @section Aspect Obsolescent
  
  
  @geindex Obsolsecent
  
! This aspect is equivalent to @ref{ad,,pragma Obsolescent}. Note that the
  evaluation of this aspect happens at the point of occurrence, it is not
  delayed until the freeze point.
  
  @node Aspect Part_Of,Aspect Persistent_BSS,Aspect Obsolescent,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-part-of}@anchor{145}
  @section Aspect Part_Of
  
  
  @geindex Part_Of
  
! This aspect is equivalent to @ref{b5,,pragma Part_Of}.
  
  @node Aspect Persistent_BSS,Aspect Predicate,Aspect Part_Of,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-persistent-bss}@anchor{146}
  @section Aspect Persistent_BSS
  
  
  @geindex Persistent_BSS
  
! This boolean aspect is equivalent to @ref{b8,,pragma Persistent_BSS}.
  
  @node Aspect Predicate,Aspect Pure_Function,Aspect Persistent_BSS,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-predicate}@anchor{147}
  @section Aspect Predicate
  
  
  @geindex Predicate
  
! This aspect is equivalent to @ref{c1,,pragma Predicate}. It is thus
  similar to the language defined aspects @code{Dynamic_Predicate}
  and @code{Static_Predicate} except that whether the resulting
  predicate is static or dynamic is controlled by the form of the
--- 9797,9913 ----
  This aspect is used in the GNAT-defined formal container packages.
  
  @node Aspect Linker_Section,Aspect Lock_Free,Aspect Iterable,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-linker-section}@anchor{13f}
  @section Aspect Linker_Section
  
  
  @geindex Linker_Section
  
! This aspect is equivalent to @ref{96,,pragma Linker_Section}.
  
  @node Aspect Lock_Free,Aspect Max_Queue_Length,Aspect Linker_Section,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-lock-free}@anchor{140}
  @section Aspect Lock_Free
  
  
  @geindex Lock_Free
  
! This boolean aspect is equivalent to @ref{98,,pragma Lock_Free}.
  
! @node Aspect Max_Queue_Length,Aspect No_Caching,Aspect Lock_Free,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-max-queue-length}@anchor{141}
  @section Aspect Max_Queue_Length
  
  
  @geindex Max_Queue_Length
  
! This aspect is equivalent to @ref{a0,,pragma Max_Queue_Length}.
  
! @node Aspect No_Caching,Aspect No_Elaboration_Code_All,Aspect Max_Queue_Length,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-no-caching}@anchor{142}
! @section Aspect No_Caching
! 
! 
! @geindex No_Caching
! 
! This boolean aspect is equivalent to @ref{a2,,pragma No_Caching}.
! 
! @node Aspect No_Elaboration_Code_All,Aspect No_Inline,Aspect No_Caching,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-no-elaboration-code-all}@anchor{143}
  @section Aspect No_Elaboration_Code_All
  
  
  @geindex No_Elaboration_Code_All
  
! This aspect is equivalent to @ref{a6,,pragma No_Elaboration_Code_All}
  for a program unit.
  
  @node Aspect No_Inline,Aspect No_Tagged_Streams,Aspect No_Elaboration_Code_All,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-no-inline}@anchor{144}
  @section Aspect No_Inline
  
  
  @geindex No_Inline
  
! This boolean aspect is equivalent to @ref{a9,,pragma No_Inline}.
  
  @node Aspect No_Tagged_Streams,Aspect Object_Size,Aspect No_Inline,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-no-tagged-streams}@anchor{145}
  @section Aspect No_Tagged_Streams
  
  
  @geindex No_Tagged_Streams
  
! This aspect is equivalent to @ref{ac,,pragma No_Tagged_Streams} with an
  argument specifying a root tagged type (thus this aspect can only be
  applied to such a type).
  
  @node Aspect Object_Size,Aspect Obsolescent,Aspect No_Tagged_Streams,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-object-size}@anchor{146}
  @section Aspect Object_Size
  
  
  @geindex Object_Size
  
! This aspect is equivalent to @ref{147,,attribute Object_Size}.
  
  @node Aspect Obsolescent,Aspect Part_Of,Aspect Object_Size,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-obsolescent}@anchor{148}
  @section Aspect Obsolescent
  
  
  @geindex Obsolsecent
  
! This aspect is equivalent to @ref{af,,pragma Obsolescent}. Note that the
  evaluation of this aspect happens at the point of occurrence, it is not
  delayed until the freeze point.
  
  @node Aspect Part_Of,Aspect Persistent_BSS,Aspect Obsolescent,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-part-of}@anchor{149}
  @section Aspect Part_Of
  
  
  @geindex Part_Of
  
! This aspect is equivalent to @ref{b7,,pragma Part_Of}.
  
  @node Aspect Persistent_BSS,Aspect Predicate,Aspect Part_Of,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-persistent-bss}@anchor{14a}
  @section Aspect Persistent_BSS
  
  
  @geindex Persistent_BSS
  
! This boolean aspect is equivalent to @ref{ba,,pragma Persistent_BSS}.
  
  @node Aspect Predicate,Aspect Pure_Function,Aspect Persistent_BSS,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-predicate}@anchor{14b}
  @section Aspect Predicate
  
  
  @geindex Predicate
  
! This aspect is equivalent to @ref{c2,,pragma Predicate}. It is thus
  similar to the language defined aspects @code{Dynamic_Predicate}
  and @code{Static_Predicate} except that whether the resulting
  predicate is static or dynamic is controlled by the form of the
*************** expression. It is also separately contro
*** 9791,10029 ****
  @code{Assertion_Policy}.
  
  @node Aspect Pure_Function,Aspect Refined_Depends,Aspect Predicate,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-pure-function}@anchor{148}
  @section Aspect Pure_Function
  
  
  @geindex Pure_Function
  
! This boolean aspect is equivalent to @ref{cc,,pragma Pure_Function}.
  
  @node Aspect Refined_Depends,Aspect Refined_Global,Aspect Pure_Function,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-refined-depends}@anchor{149}
  @section Aspect Refined_Depends
  
  
  @geindex Refined_Depends
  
! This aspect is equivalent to @ref{d0,,pragma Refined_Depends}.
  
  @node Aspect Refined_Global,Aspect Refined_Post,Aspect Refined_Depends,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-refined-global}@anchor{14a}
  @section Aspect Refined_Global
  
  
  @geindex Refined_Global
  
! This aspect is equivalent to @ref{d2,,pragma Refined_Global}.
  
  @node Aspect Refined_Post,Aspect Refined_State,Aspect Refined_Global,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-refined-post}@anchor{14b}
  @section Aspect Refined_Post
  
  
  @geindex Refined_Post
  
! This aspect is equivalent to @ref{d4,,pragma Refined_Post}.
  
  @node Aspect Refined_State,Aspect Remote_Access_Type,Aspect Refined_Post,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-refined-state}@anchor{14c}
  @section Aspect Refined_State
  
  
  @geindex Refined_State
  
! This aspect is equivalent to @ref{d6,,pragma Refined_State}.
  
  @node Aspect Remote_Access_Type,Aspect Secondary_Stack_Size,Aspect Refined_State,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-remote-access-type}@anchor{14d}
  @section Aspect Remote_Access_Type
  
  
  @geindex Remote_Access_Type
  
! This aspect is equivalent to @ref{da,,pragma Remote_Access_Type}.
  
  @node Aspect Secondary_Stack_Size,Aspect Scalar_Storage_Order,Aspect Remote_Access_Type,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-secondary-stack-size}@anchor{14e}
  @section Aspect Secondary_Stack_Size
  
  
  @geindex Secondary_Stack_Size
  
! This aspect is equivalent to @ref{df,,pragma Secondary_Stack_Size}.
  
  @node Aspect Scalar_Storage_Order,Aspect Shared,Aspect Secondary_Stack_Size,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-scalar-storage-order}@anchor{14f}
  @section Aspect Scalar_Storage_Order
  
  
  @geindex Scalar_Storage_Order
  
! This aspect is equivalent to a @ref{150,,attribute Scalar_Storage_Order}.
  
  @node Aspect Shared,Aspect Simple_Storage_Pool,Aspect Scalar_Storage_Order,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-shared}@anchor{151}
  @section Aspect Shared
  
  
  @geindex Shared
  
! This boolean aspect is equivalent to @ref{e2,,pragma Shared}
  and is thus a synonym for aspect @code{Atomic}.
  
  @node Aspect Simple_Storage_Pool,Aspect Simple_Storage_Pool_Type,Aspect Shared,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-simple-storage-pool}@anchor{152}
  @section Aspect Simple_Storage_Pool
  
  
  @geindex Simple_Storage_Pool
  
! This aspect is equivalent to @ref{e7,,attribute Simple_Storage_Pool}.
  
  @node Aspect Simple_Storage_Pool_Type,Aspect SPARK_Mode,Aspect Simple_Storage_Pool,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-simple-storage-pool-type}@anchor{153}
  @section Aspect Simple_Storage_Pool_Type
  
  
  @geindex Simple_Storage_Pool_Type
  
! This boolean aspect is equivalent to @ref{e5,,pragma Simple_Storage_Pool_Type}.
  
  @node Aspect SPARK_Mode,Aspect Suppress_Debug_Info,Aspect Simple_Storage_Pool_Type,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-spark-mode}@anchor{154}
  @section Aspect SPARK_Mode
  
  
  @geindex SPARK_Mode
  
! This aspect is equivalent to @ref{ed,,pragma SPARK_Mode} and
  may be specified for either or both of the specification and body
  of a subprogram or package.
  
  @node Aspect Suppress_Debug_Info,Aspect Suppress_Initialization,Aspect SPARK_Mode,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-suppress-debug-info}@anchor{155}
  @section Aspect Suppress_Debug_Info
  
  
  @geindex Suppress_Debug_Info
  
! This boolean aspect is equivalent to @ref{f5,,pragma Suppress_Debug_Info}.
  
  @node Aspect Suppress_Initialization,Aspect Test_Case,Aspect Suppress_Debug_Info,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-suppress-initialization}@anchor{156}
  @section Aspect Suppress_Initialization
  
  
  @geindex Suppress_Initialization
  
! This boolean aspect is equivalent to @ref{f9,,pragma Suppress_Initialization}.
  
  @node Aspect Test_Case,Aspect Thread_Local_Storage,Aspect Suppress_Initialization,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-test-case}@anchor{157}
  @section Aspect Test_Case
  
  
  @geindex Test_Case
  
! This aspect is equivalent to @ref{fc,,pragma Test_Case}.
  
  @node Aspect Thread_Local_Storage,Aspect Universal_Aliasing,Aspect Test_Case,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-thread-local-storage}@anchor{158}
  @section Aspect Thread_Local_Storage
  
  
  @geindex Thread_Local_Storage
  
! This boolean aspect is equivalent to @ref{fe,,pragma Thread_Local_Storage}.
  
  @node Aspect Universal_Aliasing,Aspect Universal_Data,Aspect Thread_Local_Storage,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-universal-aliasing}@anchor{159}
  @section Aspect Universal_Aliasing
  
  
  @geindex Universal_Aliasing
  
! This boolean aspect is equivalent to @ref{109,,pragma Universal_Aliasing}.
  
  @node Aspect Universal_Data,Aspect Unmodified,Aspect Universal_Aliasing,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-universal-data}@anchor{15a}
  @section Aspect Universal_Data
  
  
  @geindex Universal_Data
  
! This aspect is equivalent to @ref{10a,,pragma Universal_Data}.
  
  @node Aspect Unmodified,Aspect Unreferenced,Aspect Universal_Data,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-unmodified}@anchor{15b}
  @section Aspect Unmodified
  
  
  @geindex Unmodified
  
! This boolean aspect is equivalent to @ref{10c,,pragma Unmodified}.
  
  @node Aspect Unreferenced,Aspect Unreferenced_Objects,Aspect Unmodified,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-unreferenced}@anchor{15c}
  @section Aspect Unreferenced
  
  
  @geindex Unreferenced
  
! This boolean aspect is equivalent to @ref{10e,,pragma Unreferenced}. Note that
  in the case of formal parameters, it is not permitted to have aspects for
  a formal parameter, so in this case the pragma form must be used.
  
  @node Aspect Unreferenced_Objects,Aspect Value_Size,Aspect Unreferenced,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-unreferenced-objects}@anchor{15d}
  @section Aspect Unreferenced_Objects
  
  
  @geindex Unreferenced_Objects
  
! This boolean aspect is equivalent to @ref{110,,pragma Unreferenced_Objects}.
  
  @node Aspect Value_Size,Aspect Volatile_Full_Access,Aspect Unreferenced_Objects,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-value-size}@anchor{15e}
  @section Aspect Value_Size
  
  
  @geindex Value_Size
  
! This aspect is equivalent to @ref{15f,,attribute Value_Size}.
  
  @node Aspect Volatile_Full_Access,Aspect Volatile_Function,Aspect Value_Size,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-volatile-full-access}@anchor{160}
  @section Aspect Volatile_Full_Access
  
  
  @geindex Volatile_Full_Access
  
! This boolean aspect is equivalent to @ref{119,,pragma Volatile_Full_Access}.
  
  @node Aspect Volatile_Function,Aspect Warnings,Aspect Volatile_Full_Access,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-volatile-function}@anchor{161}
  @section Aspect Volatile_Function
  
  
  @geindex Volatile_Function
  
! This boolean aspect is equivalent to @ref{11c,,pragma Volatile_Function}.
  
  @node Aspect Warnings,,Aspect Volatile_Function,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-warnings}@anchor{162}
  @section Aspect Warnings
  
  
  @geindex Warnings
  
! This aspect is equivalent to the two argument form of @ref{11e,,pragma Warnings},
  where the first argument is @code{ON} or @code{OFF} and the second argument
  is the entity.
  
  @node Implementation Defined Attributes,Standard and Implementation Defined Restrictions,Implementation Defined Aspects,Top
! @anchor{gnat_rm/implementation_defined_attributes doc}@anchor{163}@anchor{gnat_rm/implementation_defined_attributes implementation-defined-attributes}@anchor{8}@anchor{gnat_rm/implementation_defined_attributes id1}@anchor{164}
  @chapter Implementation Defined Attributes
  
  
--- 9915,10153 ----
  @code{Assertion_Policy}.
  
  @node Aspect Pure_Function,Aspect Refined_Depends,Aspect Predicate,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-pure-function}@anchor{14c}
  @section Aspect Pure_Function
  
  
  @geindex Pure_Function
  
! This boolean aspect is equivalent to @ref{ce,,pragma Pure_Function}.
  
  @node Aspect Refined_Depends,Aspect Refined_Global,Aspect Pure_Function,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-refined-depends}@anchor{14d}
  @section Aspect Refined_Depends
  
  
  @geindex Refined_Depends
  
! This aspect is equivalent to @ref{d2,,pragma Refined_Depends}.
  
  @node Aspect Refined_Global,Aspect Refined_Post,Aspect Refined_Depends,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-refined-global}@anchor{14e}
  @section Aspect Refined_Global
  
  
  @geindex Refined_Global
  
! This aspect is equivalent to @ref{d4,,pragma Refined_Global}.
  
  @node Aspect Refined_Post,Aspect Refined_State,Aspect Refined_Global,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-refined-post}@anchor{14f}
  @section Aspect Refined_Post
  
  
  @geindex Refined_Post
  
! This aspect is equivalent to @ref{d6,,pragma Refined_Post}.
  
  @node Aspect Refined_State,Aspect Remote_Access_Type,Aspect Refined_Post,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-refined-state}@anchor{150}
  @section Aspect Refined_State
  
  
  @geindex Refined_State
  
! This aspect is equivalent to @ref{d8,,pragma Refined_State}.
  
  @node Aspect Remote_Access_Type,Aspect Secondary_Stack_Size,Aspect Refined_State,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-remote-access-type}@anchor{151}
  @section Aspect Remote_Access_Type
  
  
  @geindex Remote_Access_Type
  
! This aspect is equivalent to @ref{dc,,pragma Remote_Access_Type}.
  
  @node Aspect Secondary_Stack_Size,Aspect Scalar_Storage_Order,Aspect Remote_Access_Type,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-secondary-stack-size}@anchor{152}
  @section Aspect Secondary_Stack_Size
  
  
  @geindex Secondary_Stack_Size
  
! This aspect is equivalent to @ref{e1,,pragma Secondary_Stack_Size}.
  
  @node Aspect Scalar_Storage_Order,Aspect Shared,Aspect Secondary_Stack_Size,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-scalar-storage-order}@anchor{153}
  @section Aspect Scalar_Storage_Order
  
  
  @geindex Scalar_Storage_Order
  
! This aspect is equivalent to a @ref{154,,attribute Scalar_Storage_Order}.
  
  @node Aspect Shared,Aspect Simple_Storage_Pool,Aspect Scalar_Storage_Order,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-shared}@anchor{155}
  @section Aspect Shared
  
  
  @geindex Shared
  
! This boolean aspect is equivalent to @ref{e4,,pragma Shared}
  and is thus a synonym for aspect @code{Atomic}.
  
  @node Aspect Simple_Storage_Pool,Aspect Simple_Storage_Pool_Type,Aspect Shared,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-simple-storage-pool}@anchor{156}
  @section Aspect Simple_Storage_Pool
  
  
  @geindex Simple_Storage_Pool
  
! This aspect is equivalent to @ref{e9,,attribute Simple_Storage_Pool}.
  
  @node Aspect Simple_Storage_Pool_Type,Aspect SPARK_Mode,Aspect Simple_Storage_Pool,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-simple-storage-pool-type}@anchor{157}
  @section Aspect Simple_Storage_Pool_Type
  
  
  @geindex Simple_Storage_Pool_Type
  
! This boolean aspect is equivalent to @ref{e7,,pragma Simple_Storage_Pool_Type}.
  
  @node Aspect SPARK_Mode,Aspect Suppress_Debug_Info,Aspect Simple_Storage_Pool_Type,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-spark-mode}@anchor{158}
  @section Aspect SPARK_Mode
  
  
  @geindex SPARK_Mode
  
! This aspect is equivalent to @ref{ef,,pragma SPARK_Mode} and
  may be specified for either or both of the specification and body
  of a subprogram or package.
  
  @node Aspect Suppress_Debug_Info,Aspect Suppress_Initialization,Aspect SPARK_Mode,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-suppress-debug-info}@anchor{159}
  @section Aspect Suppress_Debug_Info
  
  
  @geindex Suppress_Debug_Info
  
! This boolean aspect is equivalent to @ref{f7,,pragma Suppress_Debug_Info}.
  
  @node Aspect Suppress_Initialization,Aspect Test_Case,Aspect Suppress_Debug_Info,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-suppress-initialization}@anchor{15a}
  @section Aspect Suppress_Initialization
  
  
  @geindex Suppress_Initialization
  
! This boolean aspect is equivalent to @ref{fb,,pragma Suppress_Initialization}.
  
  @node Aspect Test_Case,Aspect Thread_Local_Storage,Aspect Suppress_Initialization,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-test-case}@anchor{15b}
  @section Aspect Test_Case
  
  
  @geindex Test_Case
  
! This aspect is equivalent to @ref{fe,,pragma Test_Case}.
  
  @node Aspect Thread_Local_Storage,Aspect Universal_Aliasing,Aspect Test_Case,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-thread-local-storage}@anchor{15c}
  @section Aspect Thread_Local_Storage
  
  
  @geindex Thread_Local_Storage
  
! This boolean aspect is equivalent to @ref{100,,pragma Thread_Local_Storage}.
  
  @node Aspect Universal_Aliasing,Aspect Universal_Data,Aspect Thread_Local_Storage,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-universal-aliasing}@anchor{15d}
  @section Aspect Universal_Aliasing
  
  
  @geindex Universal_Aliasing
  
! This boolean aspect is equivalent to @ref{10a,,pragma Universal_Aliasing}.
  
  @node Aspect Universal_Data,Aspect Unmodified,Aspect Universal_Aliasing,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-universal-data}@anchor{15e}
  @section Aspect Universal_Data
  
  
  @geindex Universal_Data
  
! This aspect is equivalent to @ref{10c,,pragma Universal_Data}.
  
  @node Aspect Unmodified,Aspect Unreferenced,Aspect Universal_Data,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-unmodified}@anchor{15f}
  @section Aspect Unmodified
  
  
  @geindex Unmodified
  
! This boolean aspect is equivalent to @ref{10f,,pragma Unmodified}.
  
  @node Aspect Unreferenced,Aspect Unreferenced_Objects,Aspect Unmodified,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-unreferenced}@anchor{160}
  @section Aspect Unreferenced
  
  
  @geindex Unreferenced
  
! This boolean aspect is equivalent to @ref{110,,pragma Unreferenced}. Note that
  in the case of formal parameters, it is not permitted to have aspects for
  a formal parameter, so in this case the pragma form must be used.
  
  @node Aspect Unreferenced_Objects,Aspect Value_Size,Aspect Unreferenced,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-unreferenced-objects}@anchor{161}
  @section Aspect Unreferenced_Objects
  
  
  @geindex Unreferenced_Objects
  
! This boolean aspect is equivalent to @ref{112,,pragma Unreferenced_Objects}.
  
  @node Aspect Value_Size,Aspect Volatile_Full_Access,Aspect Unreferenced_Objects,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-value-size}@anchor{162}
  @section Aspect Value_Size
  
  
  @geindex Value_Size
  
! This aspect is equivalent to @ref{163,,attribute Value_Size}.
  
  @node Aspect Volatile_Full_Access,Aspect Volatile_Function,Aspect Value_Size,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-volatile-full-access}@anchor{164}
  @section Aspect Volatile_Full_Access
  
  
  @geindex Volatile_Full_Access
  
! This boolean aspect is equivalent to @ref{11d,,pragma Volatile_Full_Access}.
  
  @node Aspect Volatile_Function,Aspect Warnings,Aspect Volatile_Full_Access,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-volatile-function}@anchor{165}
  @section Aspect Volatile_Function
  
  
  @geindex Volatile_Function
  
! This boolean aspect is equivalent to @ref{11f,,pragma Volatile_Function}.
  
  @node Aspect Warnings,,Aspect Volatile_Function,Implementation Defined Aspects
! @anchor{gnat_rm/implementation_defined_aspects aspect-warnings}@anchor{166}
  @section Aspect Warnings
  
  
  @geindex Warnings
  
! This aspect is equivalent to the two argument form of @ref{121,,pragma Warnings},
  where the first argument is @code{ON} or @code{OFF} and the second argument
  is the entity.
  
  @node Implementation Defined Attributes,Standard and Implementation Defined Restrictions,Implementation Defined Aspects,Top
! @anchor{gnat_rm/implementation_defined_attributes doc}@anchor{167}@anchor{gnat_rm/implementation_defined_attributes implementation-defined-attributes}@anchor{8}@anchor{gnat_rm/implementation_defined_attributes id1}@anchor{168}
  @chapter Implementation Defined Attributes
  
  
*************** consideration, you should minimize the u
*** 10124,10130 ****
  @end menu
  
  @node Attribute Abort_Signal,Attribute Address_Size,,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-abort-signal}@anchor{165}
  @section Attribute Abort_Signal
  
  
--- 10248,10254 ----
  @end menu
  
  @node Attribute Abort_Signal,Attribute Address_Size,,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-abort-signal}@anchor{169}
  @section Attribute Abort_Signal
  
  
*************** completely outside the normal semantics
*** 10138,10144 ****
  intercept the abort exception).
  
  @node Attribute Address_Size,Attribute Asm_Input,Attribute Abort_Signal,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-address-size}@anchor{166}
  @section Attribute Address_Size
  
  
--- 10262,10268 ----
  intercept the abort exception).
  
  @node Attribute Address_Size,Attribute Asm_Input,Attribute Abort_Signal,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-address-size}@anchor{16a}
  @section Attribute Address_Size
  
  
*************** reference to System.Address'Size is nons
*** 10154,10160 ****
  is a private type.
  
  @node Attribute Asm_Input,Attribute Asm_Output,Attribute Address_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-asm-input}@anchor{167}
  @section Attribute Asm_Input
  
  
--- 10278,10284 ----
  is a private type.
  
  @node Attribute Asm_Input,Attribute Asm_Output,Attribute Address_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-asm-input}@anchor{16b}
  @section Attribute Asm_Input
  
  
*************** to be a static expression, and is the co
*** 10168,10177 ****
  value to be used as the input argument.  The possible values for the
  constant are the same as those used in the RTL, and are dependent on
  the configuration file used to built the GCC back end.
! @ref{168,,Machine Code Insertions}
  
  @node Attribute Asm_Output,Attribute Atomic_Always_Lock_Free,Attribute Asm_Input,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-asm-output}@anchor{169}
  @section Attribute Asm_Output
  
  
--- 10292,10301 ----
  value to be used as the input argument.  The possible values for the
  constant are the same as those used in the RTL, and are dependent on
  the configuration file used to built the GCC back end.
! @ref{16c,,Machine Code Insertions}
  
  @node Attribute Asm_Output,Attribute Atomic_Always_Lock_Free,Attribute Asm_Input,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-asm-output}@anchor{16d}
  @section Attribute Asm_Output
  
  
*************** result.  The possible values for constra
*** 10187,10196 ****
  the RTL, and are dependent on the configuration file used to build the
  GCC back end.  If there are no output operands, then this argument may
  either be omitted, or explicitly given as @code{No_Output_Operands}.
! @ref{168,,Machine Code Insertions}
  
  @node Attribute Atomic_Always_Lock_Free,Attribute Bit,Attribute Asm_Output,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-atomic-always-lock-free}@anchor{16a}
  @section Attribute Atomic_Always_Lock_Free
  
  
--- 10311,10320 ----
  the RTL, and are dependent on the configuration file used to build the
  GCC back end.  If there are no output operands, then this argument may
  either be omitted, or explicitly given as @code{No_Output_Operands}.
! @ref{16c,,Machine Code Insertions}
  
  @node Attribute Atomic_Always_Lock_Free,Attribute Bit,Attribute Asm_Output,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-atomic-always-lock-free}@anchor{16e}
  @section Attribute Atomic_Always_Lock_Free
  
  
*************** and False otherwise.  The result indicat
*** 10202,10208 ****
  supported by the target for the given type.
  
  @node Attribute Bit,Attribute Bit_Position,Attribute Atomic_Always_Lock_Free,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-bit}@anchor{16b}
  @section Attribute Bit
  
  
--- 10326,10332 ----
  supported by the target for the given type.
  
  @node Attribute Bit,Attribute Bit_Position,Attribute Atomic_Always_Lock_Free,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-bit}@anchor{16f}
  @section Attribute Bit
  
  
*************** This attribute is designed to be compati
*** 10233,10239 ****
  and implementation of the @code{Bit} attribute.
  
  @node Attribute Bit_Position,Attribute Code_Address,Attribute Bit,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-bit-position}@anchor{16c}
  @section Attribute Bit_Position
  
  
--- 10357,10363 ----
  and implementation of the @code{Bit} attribute.
  
  @node Attribute Bit_Position,Attribute Code_Address,Attribute Bit,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-bit-position}@anchor{170}
  @section Attribute Bit_Position
  
  
*************** type @emph{universal_integer}.  The valu
*** 10248,10254 ****
  the containing record @code{R}.
  
  @node Attribute Code_Address,Attribute Compiler_Version,Attribute Bit_Position,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-code-address}@anchor{16d}
  @section Attribute Code_Address
  
  
--- 10372,10378 ----
  the containing record @code{R}.
  
  @node Attribute Code_Address,Attribute Compiler_Version,Attribute Bit_Position,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-code-address}@anchor{171}
  @section Attribute Code_Address
  
  
*************** the same value as is returned by the cor
*** 10291,10297 ****
  attribute.
  
  @node Attribute Compiler_Version,Attribute Constrained,Attribute Code_Address,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-compiler-version}@anchor{16e}
  @section Attribute Compiler_Version
  
  
--- 10415,10421 ----
  attribute.
  
  @node Attribute Compiler_Version,Attribute Constrained,Attribute Code_Address,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-compiler-version}@anchor{172}
  @section Attribute Compiler_Version
  
  
*************** prefix) yields a static string identifyi
*** 10302,10308 ****
  being used to compile the unit containing the attribute reference.
  
  @node Attribute Constrained,Attribute Default_Bit_Order,Attribute Compiler_Version,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-constrained}@anchor{16f}
  @section Attribute Constrained
  
  
--- 10426,10432 ----
  being used to compile the unit containing the attribute reference.
  
  @node Attribute Constrained,Attribute Default_Bit_Order,Attribute Compiler_Version,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-constrained}@anchor{173}
  @section Attribute Constrained
  
  
*************** record type without discriminants is alw
*** 10317,10323 ****
  compatible with older Ada compilers, including notably DEC Ada.
  
  @node Attribute Default_Bit_Order,Attribute Default_Scalar_Storage_Order,Attribute Constrained,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-default-bit-order}@anchor{170}
  @section Attribute Default_Bit_Order
  
  
--- 10441,10447 ----
  compatible with older Ada compilers, including notably DEC Ada.
  
  @node Attribute Default_Bit_Order,Attribute Default_Scalar_Storage_Order,Attribute Constrained,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-default-bit-order}@anchor{174}
  @section Attribute Default_Bit_Order
  
  
*************** as a @code{Pos} value (0 for @code{High_
*** 10334,10340 ****
  @code{Default_Bit_Order} in package @code{System}.
  
  @node Attribute Default_Scalar_Storage_Order,Attribute Deref,Attribute Default_Bit_Order,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-default-scalar-storage-order}@anchor{171}
  @section Attribute Default_Scalar_Storage_Order
  
  
--- 10458,10464 ----
  @code{Default_Bit_Order} in package @code{System}.
  
  @node Attribute Default_Scalar_Storage_Order,Attribute Deref,Attribute Default_Bit_Order,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-default-scalar-storage-order}@anchor{175}
  @section Attribute Default_Scalar_Storage_Order
  
  
*************** equal to @code{Default_Bit_Order} if uns
*** 10351,10357 ****
  @code{System.Bit_Order} value. This is a static attribute.
  
  @node Attribute Deref,Attribute Descriptor_Size,Attribute Default_Scalar_Storage_Order,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-deref}@anchor{172}
  @section Attribute Deref
  
  
--- 10475,10481 ----
  @code{System.Bit_Order} value. This is a static attribute.
  
  @node Attribute Deref,Attribute Descriptor_Size,Attribute Default_Scalar_Storage_Order,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-deref}@anchor{176}
  @section Attribute Deref
  
  
*************** a named access-to-@cite{typ} type, excep
*** 10364,10370 ****
  used on the left side of an assignment.
  
  @node Attribute Descriptor_Size,Attribute Elaborated,Attribute Deref,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-descriptor-size}@anchor{173}
  @section Attribute Descriptor_Size
  
  
--- 10488,10494 ----
  used on the left side of an assignment.
  
  @node Attribute Descriptor_Size,Attribute Elaborated,Attribute Deref,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-descriptor-size}@anchor{177}
  @section Attribute Descriptor_Size
  
  
*************** In the example above, the descriptor con
*** 10391,10397 ****
  a size of 31 bits and an alignment of 4, the descriptor size is @code{2 * Positive'Size + 2} or 64 bits.
  
  @node Attribute Elaborated,Attribute Elab_Body,Attribute Descriptor_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-elaborated}@anchor{174}
  @section Attribute Elaborated
  
  
--- 10515,10521 ----
  a size of 31 bits and an alignment of 4, the descriptor size is @code{2 * Positive'Size + 2} or 64 bits.
  
  @node Attribute Elaborated,Attribute Elab_Body,Attribute Descriptor_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-elaborated}@anchor{178}
  @section Attribute Elaborated
  
  
*************** units has been completed.  An exception
*** 10406,10412 ****
  elaboration, the value is always False for such units.
  
  @node Attribute Elab_Body,Attribute Elab_Spec,Attribute Elaborated,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-elab-body}@anchor{175}
  @section Attribute Elab_Body
  
  
--- 10530,10536 ----
  elaboration, the value is always False for such units.
  
  @node Attribute Elab_Body,Attribute Elab_Spec,Attribute Elaborated,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-elab-body}@anchor{179}
  @section Attribute Elab_Body
  
  
*************** e.g., if it is necessary to do selective
*** 10422,10428 ****
  error.
  
  @node Attribute Elab_Spec,Attribute Elab_Subp_Body,Attribute Elab_Body,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-elab-spec}@anchor{176}
  @section Attribute Elab_Spec
  
  
--- 10546,10552 ----
  error.
  
  @node Attribute Elab_Spec,Attribute Elab_Subp_Body,Attribute Elab_Body,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-elab-spec}@anchor{17a}
  @section Attribute Elab_Spec
  
  
*************** Ada code, e.g., if it is necessary to do
*** 10438,10444 ****
  some error.
  
  @node Attribute Elab_Subp_Body,Attribute Emax,Attribute Elab_Spec,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-elab-subp-body}@anchor{177}
  @section Attribute Elab_Subp_Body
  
  
--- 10562,10568 ----
  some error.
  
  @node Attribute Elab_Subp_Body,Attribute Emax,Attribute Elab_Spec,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-elab-subp-body}@anchor{17b}
  @section Attribute Elab_Subp_Body
  
  
*************** elaboration procedure by the binder in C
*** 10452,10458 ****
  otherwise.
  
  @node Attribute Emax,Attribute Enabled,Attribute Elab_Subp_Body,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-emax}@anchor{178}
  @section Attribute Emax
  
  
--- 10576,10582 ----
  otherwise.
  
  @node Attribute Emax,Attribute Enabled,Attribute Elab_Subp_Body,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-emax}@anchor{17c}
  @section Attribute Emax
  
  
*************** the Ada 83 reference manual for an exact
*** 10465,10471 ****
  this attribute.
  
  @node Attribute Enabled,Attribute Enum_Rep,Attribute Emax,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-enabled}@anchor{179}
  @section Attribute Enabled
  
  
--- 10589,10595 ----
  this attribute.
  
  @node Attribute Enabled,Attribute Enum_Rep,Attribute Emax,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-enabled}@anchor{17d}
  @section Attribute Enabled
  
  
*************** a @code{pragma Suppress} or @code{pragma
*** 10489,10495 ****
  the package or subprogram, controlling whether the check will be present.
  
  @node Attribute Enum_Rep,Attribute Enum_Val,Attribute Enabled,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-enum-rep}@anchor{17a}
  @section Attribute Enum_Rep
  
  
--- 10613,10619 ----
  the package or subprogram, controlling whether the check will be present.
  
  @node Attribute Enum_Rep,Attribute Enum_Val,Attribute Enabled,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-enum-rep}@anchor{17e}
  @section Attribute Enum_Rep
  
  
*************** integer calculation is done at run time,
*** 10526,10532 ****
  may raise @code{Constraint_Error}.
  
  @node Attribute Enum_Val,Attribute Epsilon,Attribute Enum_Rep,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-enum-val}@anchor{17b}
  @section Attribute Enum_Val
  
  
--- 10650,10656 ----
  may raise @code{Constraint_Error}.
  
  @node Attribute Enum_Val,Attribute Epsilon,Attribute Enum_Rep,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-enum-val}@anchor{17f}
  @section Attribute Enum_Val
  
  
*************** absence of an enumeration representation
*** 10549,10555 ****
  attribute (i.e., the result is static if the argument is static).
  
  @node Attribute Epsilon,Attribute Fast_Math,Attribute Enum_Val,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-epsilon}@anchor{17c}
  @section Attribute Epsilon
  
  
--- 10673,10679 ----
  attribute (i.e., the result is static if the argument is static).
  
  @node Attribute Epsilon,Attribute Fast_Math,Attribute Enum_Val,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-epsilon}@anchor{180}
  @section Attribute Epsilon
  
  
*************** the Ada 83 reference manual for an exact
*** 10562,10568 ****
  this attribute.
  
  @node Attribute Fast_Math,Attribute Finalization_Size,Attribute Epsilon,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-fast-math}@anchor{17d}
  @section Attribute Fast_Math
  
  
--- 10686,10692 ----
  this attribute.
  
  @node Attribute Fast_Math,Attribute Finalization_Size,Attribute Epsilon,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-fast-math}@anchor{181}
  @section Attribute Fast_Math
  
  
*************** prefix) yields a static Boolean value th
*** 10573,10579 ****
  @code{Fast_Math} is active, and False otherwise.
  
  @node Attribute Finalization_Size,Attribute Fixed_Value,Attribute Fast_Math,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-finalization-size}@anchor{17e}
  @section Attribute Finalization_Size
  
  
--- 10697,10703 ----
  @code{Fast_Math} is active, and False otherwise.
  
  @node Attribute Finalization_Size,Attribute Fixed_Value,Attribute Fast_Math,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-finalization-size}@anchor{182}
  @section Attribute Finalization_Size
  
  
*************** class-wide type whose tag denotes a type
*** 10591,10597 ****
  Note that only heap-allocated objects contain finalization data.
  
  @node Attribute Fixed_Value,Attribute From_Any,Attribute Finalization_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-fixed-value}@anchor{17f}
  @section Attribute Fixed_Value
  
  
--- 10715,10721 ----
  Note that only heap-allocated objects contain finalization data.
  
  @node Attribute Fixed_Value,Attribute From_Any,Attribute Finalization_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-fixed-value}@anchor{183}
  @section Attribute Fixed_Value
  
  
*************** This attribute is primarily intended for
*** 10618,10624 ****
  input-output functions for fixed-point values.
  
  @node Attribute From_Any,Attribute Has_Access_Values,Attribute Fixed_Value,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-from-any}@anchor{180}
  @section Attribute From_Any
  
  
--- 10742,10748 ----
  input-output functions for fixed-point values.
  
  @node Attribute From_Any,Attribute Has_Access_Values,Attribute Fixed_Value,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-from-any}@anchor{184}
  @section Attribute From_Any
  
  
*************** This internal attribute is used for the
*** 10628,10634 ****
  stubs in the context of the Distributed Systems Annex.
  
  @node Attribute Has_Access_Values,Attribute Has_Discriminants,Attribute From_Any,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-has-access-values}@anchor{181}
  @section Attribute Has_Access_Values
  
  
--- 10752,10758 ----
  stubs in the context of the Distributed Systems Annex.
  
  @node Attribute Has_Access_Values,Attribute Has_Discriminants,Attribute From_Any,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-has-access-values}@anchor{185}
  @section Attribute Has_Access_Values
  
  
*************** definitions.  If the attribute is applie
*** 10646,10652 ****
  indicates whether or not the corresponding actual type has access values.
  
  @node Attribute Has_Discriminants,Attribute Img,Attribute Has_Access_Values,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-has-discriminants}@anchor{182}
  @section Attribute Has_Discriminants
  
  
--- 10770,10776 ----
  indicates whether or not the corresponding actual type has access values.
  
  @node Attribute Has_Discriminants,Attribute Img,Attribute Has_Access_Values,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-has-discriminants}@anchor{186}
  @section Attribute Has_Discriminants
  
  
*************** definitions.  If the attribute is applie
*** 10662,10683 ****
  indicates whether or not the corresponding actual type has discriminants.
  
  @node Attribute Img,Attribute Integer_Value,Attribute Has_Discriminants,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-img}@anchor{183}
  @section Attribute Img
  
  
  @geindex Img
  
! The @code{Img} attribute differs from @code{Image} in that it is applied
! directly to an object, and yields the same result as
! @code{Image} for the subtype of the object.  This is convenient for
! debugging:
  
  @example
  Put_Line ("X = " & X'Img);
  @end example
  
! has the same meaning as the more verbose:
  
  @example
  Put_Line ("X = " & T'Image (X));
--- 10786,10807 ----
  indicates whether or not the corresponding actual type has discriminants.
  
  @node Attribute Img,Attribute Integer_Value,Attribute Has_Discriminants,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-img}@anchor{187}
  @section Attribute Img
  
  
  @geindex Img
  
! The @code{Img} attribute differs from @code{Image} in that, while both can be
! applied directly to an object, @code{Img} cannot be applied to types.
! 
! Example usage of the attribute:
  
  @example
  Put_Line ("X = " & X'Img);
  @end example
  
! which has the same meaning as the more verbose:
  
  @example
  Put_Line ("X = " & T'Image (X));
*************** that returns the appropriate string when
*** 10692,10698 ****
  in an instantiation as a function parameter.
  
  @node Attribute Integer_Value,Attribute Invalid_Value,Attribute Img,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-integer-value}@anchor{184}
  @section Attribute Integer_Value
  
  
--- 10816,10822 ----
  in an instantiation as a function parameter.
  
  @node Attribute Integer_Value,Attribute Invalid_Value,Attribute Img,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-integer-value}@anchor{188}
  @section Attribute Integer_Value
  
  
*************** This attribute is primarily intended for
*** 10720,10726 ****
  standard input-output functions for fixed-point values.
  
  @node Attribute Invalid_Value,Attribute Iterable,Attribute Integer_Value,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-invalid-value}@anchor{185}
  @section Attribute Invalid_Value
  
  
--- 10844,10850 ----
  standard input-output functions for fixed-point values.
  
  @node Attribute Invalid_Value,Attribute Iterable,Attribute Integer_Value,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-invalid-value}@anchor{189}
  @section Attribute Invalid_Value
  
  
*************** including the ability to modify the valu
*** 10734,10740 ****
  relevant environment variables at run time.
  
  @node Attribute Iterable,Attribute Large,Attribute Invalid_Value,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-iterable}@anchor{186}
  @section Attribute Iterable
  
  
--- 10858,10864 ----
  relevant environment variables at run time.
  
  @node Attribute Iterable,Attribute Large,Attribute Invalid_Value,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-iterable}@anchor{18a}
  @section Attribute Iterable
  
  
*************** relevant environment variables at run ti
*** 10743,10749 ****
  Equivalent to Aspect Iterable.
  
  @node Attribute Large,Attribute Library_Level,Attribute Iterable,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-large}@anchor{187}
  @section Attribute Large
  
  
--- 10867,10873 ----
  Equivalent to Aspect Iterable.
  
  @node Attribute Large,Attribute Library_Level,Attribute Iterable,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-large}@anchor{18b}
  @section Attribute Large
  
  
*************** the Ada 83 reference manual for an exact
*** 10756,10762 ****
  this attribute.
  
  @node Attribute Library_Level,Attribute Lock_Free,Attribute Large,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-library-level}@anchor{188}
  @section Attribute Library_Level
  
  
--- 10880,10886 ----
  this attribute.
  
  @node Attribute Library_Level,Attribute Lock_Free,Attribute Large,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-library-level}@anchor{18c}
  @section Attribute Library_Level
  
  
*************** end Gen;
*** 10782,10788 ****
  @end example
  
  @node Attribute Lock_Free,Attribute Loop_Entry,Attribute Library_Level,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-lock-free}@anchor{189}
  @section Attribute Lock_Free
  
  
--- 10906,10912 ----
  @end example
  
  @node Attribute Lock_Free,Attribute Loop_Entry,Attribute Library_Level,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-lock-free}@anchor{18d}
  @section Attribute Lock_Free
  
  
*************** end Gen;
*** 10792,10798 ****
  pragma @code{Lock_Free} applies to P.
  
  @node Attribute Loop_Entry,Attribute Machine_Size,Attribute Lock_Free,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-loop-entry}@anchor{18a}
  @section Attribute Loop_Entry
  
  
--- 10916,10922 ----
  pragma @code{Lock_Free} applies to P.
  
  @node Attribute Loop_Entry,Attribute Machine_Size,Attribute Lock_Free,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-loop-entry}@anchor{18e}
  @section Attribute Loop_Entry
  
  
*************** entry. This copy is not performed if the
*** 10822,10828 ****
  corresponding pragmas are ignored or disabled.
  
  @node Attribute Machine_Size,Attribute Mantissa,Attribute Loop_Entry,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-machine-size}@anchor{18b}
  @section Attribute Machine_Size
  
  
--- 10946,10952 ----
  corresponding pragmas are ignored or disabled.
  
  @node Attribute Machine_Size,Attribute Mantissa,Attribute Loop_Entry,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-machine-size}@anchor{18f}
  @section Attribute Machine_Size
  
  
*************** This attribute is identical to the @code
*** 10832,10838 ****
  provided for compatibility with the DEC Ada 83 attribute of this name.
  
  @node Attribute Mantissa,Attribute Maximum_Alignment,Attribute Machine_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-mantissa}@anchor{18c}
  @section Attribute Mantissa
  
  
--- 10956,10962 ----
  provided for compatibility with the DEC Ada 83 attribute of this name.
  
  @node Attribute Mantissa,Attribute Maximum_Alignment,Attribute Machine_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-mantissa}@anchor{190}
  @section Attribute Mantissa
  
  
*************** the Ada 83 reference manual for an exact
*** 10845,10851 ****
  this attribute.
  
  @node Attribute Maximum_Alignment,Attribute Mechanism_Code,Attribute Mantissa,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-maximum-alignment}@anchor{18d}@anchor{gnat_rm/implementation_defined_attributes id2}@anchor{18e}
  @section Attribute Maximum_Alignment
  
  
--- 10969,10975 ----
  this attribute.
  
  @node Attribute Maximum_Alignment,Attribute Mechanism_Code,Attribute Mantissa,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-maximum-alignment}@anchor{191}@anchor{gnat_rm/implementation_defined_attributes id2}@anchor{192}
  @section Attribute Maximum_Alignment
  
  
*************** for an object, guaranteeing that it is p
*** 10861,10867 ****
  cases.
  
  @node Attribute Mechanism_Code,Attribute Null_Parameter,Attribute Maximum_Alignment,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-mechanism-code}@anchor{18f}
  @section Attribute Mechanism_Code
  
  
--- 10985,10991 ----
  cases.
  
  @node Attribute Mechanism_Code,Attribute Null_Parameter,Attribute Maximum_Alignment,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-mechanism-code}@anchor{193}
  @section Attribute Mechanism_Code
  
  
*************** by reference
*** 10892,10898 ****
  @end table
  
  @node Attribute Null_Parameter,Attribute Object_Size,Attribute Mechanism_Code,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-null-parameter}@anchor{190}
  @section Attribute Null_Parameter
  
  
--- 11016,11022 ----
  @end table
  
  @node Attribute Null_Parameter,Attribute Object_Size,Attribute Mechanism_Code,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-null-parameter}@anchor{194}
  @section Attribute Null_Parameter
  
  
*************** There is no way of indicating this witho
*** 10917,10923 ****
  attribute.
  
  @node Attribute Object_Size,Attribute Old,Attribute Null_Parameter,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-object-size}@anchor{143}@anchor{gnat_rm/implementation_defined_attributes id3}@anchor{191}
  @section Attribute Object_Size
  
  
--- 11041,11047 ----
  attribute.
  
  @node Attribute Object_Size,Attribute Old,Attribute Null_Parameter,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-object-size}@anchor{147}@anchor{gnat_rm/implementation_defined_attributes id3}@anchor{195}
  @section Attribute Object_Size
  
  
*************** Similar additional checks are performed
*** 10987,10993 ****
  statically matching subtypes.
  
  @node Attribute Old,Attribute Passed_By_Reference,Attribute Object_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-old}@anchor{192}
  @section Attribute Old
  
  
--- 11111,11117 ----
  statically matching subtypes.
  
  @node Attribute Old,Attribute Passed_By_Reference,Attribute Object_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-old}@anchor{196}
  @section Attribute Old
  
  
*************** definition are allowed under control of
*** 11002,11008 ****
  implementation defined pragma @code{Unevaluated_Use_Of_Old}.
  
  @node Attribute Passed_By_Reference,Attribute Pool_Address,Attribute Old,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-passed-by-reference}@anchor{193}
  @section Attribute Passed_By_Reference
  
  
--- 11126,11132 ----
  implementation defined pragma @code{Unevaluated_Use_Of_Old}.
  
  @node Attribute Passed_By_Reference,Attribute Pool_Address,Attribute Old,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-passed-by-reference}@anchor{197}
  @section Attribute Passed_By_Reference
  
  
*************** passed by copy in calls.  For scalar typ
*** 11018,11024 ****
  and is static.  For non-scalar types, the result is nonstatic.
  
  @node Attribute Pool_Address,Attribute Range_Length,Attribute Passed_By_Reference,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-pool-address}@anchor{194}
  @section Attribute Pool_Address
  
  
--- 11142,11148 ----
  and is static.  For non-scalar types, the result is nonstatic.
  
  @node Attribute Pool_Address,Attribute Range_Length,Attribute Passed_By_Reference,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-pool-address}@anchor{198}
  @section Attribute Pool_Address
  
  
*************** For an object created by @code{new}, @co
*** 11043,11049 ****
  what is passed to @code{Allocate} and returned from @code{Deallocate}.
  
  @node Attribute Range_Length,Attribute Restriction_Set,Attribute Pool_Address,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-range-length}@anchor{195}
  @section Attribute Range_Length
  
  
--- 11167,11173 ----
  what is passed to @code{Allocate} and returned from @code{Deallocate}.
  
  @node Attribute Range_Length,Attribute Restriction_Set,Attribute Pool_Address,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-range-length}@anchor{199}
  @section Attribute Range_Length
  
  
*************** applied to the index subtype of a one di
*** 11056,11062 ****
  same result as @code{Length} applied to the array itself.
  
  @node Attribute Restriction_Set,Attribute Result,Attribute Range_Length,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-restriction-set}@anchor{196}
  @section Attribute Restriction_Set
  
  
--- 11180,11186 ----
  same result as @code{Length} applied to the array itself.
  
  @node Attribute Restriction_Set,Attribute Result,Attribute Range_Length,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-restriction-set}@anchor{19a}
  @section Attribute Restriction_Set
  
  
*************** Restrictions pragma, they are not analyz
*** 11126,11132 ****
  so they do not have a type.
  
  @node Attribute Result,Attribute Safe_Emax,Attribute Restriction_Set,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-result}@anchor{197}
  @section Attribute Result
  
  
--- 11250,11256 ----
  so they do not have a type.
  
  @node Attribute Result,Attribute Safe_Emax,Attribute Restriction_Set,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-result}@anchor{19b}
  @section Attribute Result
  
  
*************** For a further discussion of the use of t
*** 11139,11145 ****
  see the description of pragma Postcondition.
  
  @node Attribute Safe_Emax,Attribute Safe_Large,Attribute Result,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-safe-emax}@anchor{198}
  @section Attribute Safe_Emax
  
  
--- 11263,11269 ----
  see the description of pragma Postcondition.
  
  @node Attribute Safe_Emax,Attribute Safe_Large,Attribute Result,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-safe-emax}@anchor{19c}
  @section Attribute Safe_Emax
  
  
*************** the Ada 83 reference manual for an exact
*** 11152,11158 ****
  this attribute.
  
  @node Attribute Safe_Large,Attribute Safe_Small,Attribute Safe_Emax,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-safe-large}@anchor{199}
  @section Attribute Safe_Large
  
  
--- 11276,11282 ----
  this attribute.
  
  @node Attribute Safe_Large,Attribute Safe_Small,Attribute Safe_Emax,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-safe-large}@anchor{19d}
  @section Attribute Safe_Large
  
  
*************** the Ada 83 reference manual for an exact
*** 11165,11171 ****
  this attribute.
  
  @node Attribute Safe_Small,Attribute Scalar_Storage_Order,Attribute Safe_Large,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-safe-small}@anchor{19a}
  @section Attribute Safe_Small
  
  
--- 11289,11295 ----
  this attribute.
  
  @node Attribute Safe_Small,Attribute Scalar_Storage_Order,Attribute Safe_Large,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-safe-small}@anchor{19e}
  @section Attribute Safe_Small
  
  
*************** the Ada 83 reference manual for an exact
*** 11178,11184 ****
  this attribute.
  
  @node Attribute Scalar_Storage_Order,Attribute Simple_Storage_Pool,Attribute Safe_Small,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes id4}@anchor{19b}@anchor{gnat_rm/implementation_defined_attributes attribute-scalar-storage-order}@anchor{150}
  @section Attribute Scalar_Storage_Order
  
  
--- 11302,11308 ----
  this attribute.
  
  @node Attribute Scalar_Storage_Order,Attribute Simple_Storage_Pool,Attribute Safe_Small,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes id4}@anchor{19f}@anchor{gnat_rm/implementation_defined_attributes attribute-scalar-storage-order}@anchor{154}
  @section Attribute Scalar_Storage_Order
  
  
*************** for Date'Scalar_Storage_Order use System
*** 11226,11233 ****
  --  the former is used.
  @end example
  
! Other properties are as for standard representation attribute @code{Bit_Order},
! as defined by Ada RM 13.5.3(4). The default is @code{System.Default_Bit_Order}.
  
  For a record type @code{T}, if @code{T'Scalar_Storage_Order} is
  specified explicitly, it shall be equal to @code{T'Bit_Order}. Note:
--- 11350,11357 ----
  --  the former is used.
  @end example
  
! Other properties are as for the standard representation attribute @code{Bit_Order}
! defined by Ada RM 13.5.3(4). The default is @code{System.Default_Bit_Order}.
  
  For a record type @code{T}, if @code{T'Scalar_Storage_Order} is
  specified explicitly, it shall be equal to @code{T'Bit_Order}. Note:
*************** specified explicitly and set to the same
*** 11237,11244 ****
  
  Derived types inherit an explicitly set scalar storage order from their parent
  types. This may be overridden for the derived type by giving an explicit scalar
! storage order for the derived type. For a record extension, the derived type
! must have the same scalar storage order as the parent type.
  
  A component of a record type that is itself a record or an array and that does
  not start and end on a byte boundary must have have the same scalar storage
--- 11361,11368 ----
  
  Derived types inherit an explicitly set scalar storage order from their parent
  types. This may be overridden for the derived type by giving an explicit scalar
! storage order for it. However, for a record extension, the derived type must
! have the same scalar storage order as the parent type.
  
  A component of a record type that is itself a record or an array and that does
  not start and end on a byte boundary must have have the same scalar storage
*************** inheritance in the case of a derived typ
*** 11288,11304 ****
  the native ordering of the target, but this default can be overridden using
  pragma @code{Default_Scalar_Storage_Order}.
  
! Note that if a component of @code{T} is itself of a record or array type,
! the specfied @code{Scalar_Storage_Order} does @emph{not} apply to that nested type:
! an explicit attribute definition clause must be provided for the component
! type as well if desired.
  
  Note that the scalar storage order only affects the in-memory data
  representation. It has no effect on the representation used by stream
  attributes.
  
  @node Attribute Simple_Storage_Pool,Attribute Small,Attribute Scalar_Storage_Order,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-simple-storage-pool}@anchor{e7}@anchor{gnat_rm/implementation_defined_attributes id5}@anchor{19c}
  @section Attribute Simple_Storage_Pool
  
  
--- 11412,11431 ----
  the native ordering of the target, but this default can be overridden using
  pragma @code{Default_Scalar_Storage_Order}.
  
! If a component of @code{T} is itself of a record or array type, the specfied
! @code{Scalar_Storage_Order} does @emph{not} apply to that nested type: an explicit
! attribute definition clause must be provided for the component type as well
! if desired.
  
  Note that the scalar storage order only affects the in-memory data
  representation. It has no effect on the representation used by stream
  attributes.
  
+ Note that debuggers may be unable to display the correct value of scalar
+ components of a type for which the opposite storage order is specified.
+ 
  @node Attribute Simple_Storage_Pool,Attribute Small,Attribute Scalar_Storage_Order,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-simple-storage-pool}@anchor{e9}@anchor{gnat_rm/implementation_defined_attributes id5}@anchor{1a0}
  @section Attribute Simple_Storage_Pool
  
  
*************** as defined in section 13.11.2 of the Ada
*** 11361,11367 ****
  term @emph{simple storage pool} is substituted for @emph{storage pool}.
  
  @node Attribute Small,Attribute Storage_Unit,Attribute Simple_Storage_Pool,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-small}@anchor{19d}
  @section Attribute Small
  
  
--- 11488,11494 ----
  term @emph{simple storage pool} is substituted for @emph{storage pool}.
  
  @node Attribute Small,Attribute Storage_Unit,Attribute Simple_Storage_Pool,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-small}@anchor{1a1}
  @section Attribute Small
  
  
*************** the Ada 83 reference manual for an exact
*** 11377,11383 ****
  this attribute when applied to floating-point types.
  
  @node Attribute Storage_Unit,Attribute Stub_Type,Attribute Small,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-storage-unit}@anchor{19e}
  @section Attribute Storage_Unit
  
  
--- 11504,11510 ----
  this attribute when applied to floating-point types.
  
  @node Attribute Storage_Unit,Attribute Stub_Type,Attribute Small,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-storage-unit}@anchor{1a2}
  @section Attribute Storage_Unit
  
  
*************** this attribute when applied to floating-
*** 11387,11393 ****
  prefix) provides the same value as @code{System.Storage_Unit}.
  
  @node Attribute Stub_Type,Attribute System_Allocator_Alignment,Attribute Storage_Unit,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-stub-type}@anchor{19f}
  @section Attribute Stub_Type
  
  
--- 11514,11520 ----
  prefix) provides the same value as @code{System.Storage_Unit}.
  
  @node Attribute Stub_Type,Attribute System_Allocator_Alignment,Attribute Storage_Unit,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-stub-type}@anchor{1a3}
  @section Attribute Stub_Type
  
  
*************** unit @code{System.Partition_Interface}.
*** 11411,11417 ****
  an implicit dependency on this unit.
  
  @node Attribute System_Allocator_Alignment,Attribute Target_Name,Attribute Stub_Type,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-system-allocator-alignment}@anchor{1a0}
  @section Attribute System_Allocator_Alignment
  
  
--- 11538,11544 ----
  an implicit dependency on this unit.
  
  @node Attribute System_Allocator_Alignment,Attribute Target_Name,Attribute Stub_Type,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-system-allocator-alignment}@anchor{1a4}
  @section Attribute System_Allocator_Alignment
  
  
*************** with alignment too large or to enable a
*** 11428,11434 ****
  alignment request is larger than this value.
  
  @node Attribute Target_Name,Attribute To_Address,Attribute System_Allocator_Alignment,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-target-name}@anchor{1a1}
  @section Attribute Target_Name
  
  
--- 11555,11561 ----
  alignment request is larger than this value.
  
  @node Attribute Target_Name,Attribute To_Address,Attribute System_Allocator_Alignment,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-target-name}@anchor{1a5}
  @section Attribute Target_Name
  
  
*************** standard gcc target name without the ter
*** 11441,11447 ****
  example, GNAT 5.0 on windows yields "i586-pc-mingw32msv").
  
  @node Attribute To_Address,Attribute To_Any,Attribute Target_Name,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-to-address}@anchor{1a2}
  @section Attribute To_Address
  
  
--- 11568,11574 ----
  example, GNAT 5.0 on windows yields "i586-pc-mingw32msv").
  
  @node Attribute To_Address,Attribute To_Any,Attribute Target_Name,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-to-address}@anchor{1a6}
  @section Attribute To_Address
  
  
*************** modular manner (e.g., -1 means the same
*** 11464,11470 ****
  a 32 bits machine).
  
  @node Attribute To_Any,Attribute Type_Class,Attribute To_Address,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-to-any}@anchor{1a3}
  @section Attribute To_Any
  
  
--- 11591,11597 ----
  a 32 bits machine).
  
  @node Attribute To_Any,Attribute Type_Class,Attribute To_Address,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-to-any}@anchor{1a7}
  @section Attribute To_Any
  
  
*************** This internal attribute is used for the
*** 11474,11480 ****
  stubs in the context of the Distributed Systems Annex.
  
  @node Attribute Type_Class,Attribute Type_Key,Attribute To_Any,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-type-class}@anchor{1a4}
  @section Attribute Type_Class
  
  
--- 11601,11607 ----
  stubs in the context of the Distributed Systems Annex.
  
  @node Attribute Type_Class,Attribute Type_Key,Attribute To_Any,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-type-class}@anchor{1a8}
  @section Attribute Type_Class
  
  
*************** applies to all concurrent types.  This a
*** 11504,11510 ****
  be compatible with the DEC Ada 83 attribute of the same name.
  
  @node Attribute Type_Key,Attribute TypeCode,Attribute Type_Class,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-type-key}@anchor{1a5}
  @section Attribute Type_Key
  
  
--- 11631,11637 ----
  be compatible with the DEC Ada 83 attribute of the same name.
  
  @node Attribute Type_Key,Attribute TypeCode,Attribute Type_Class,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-type-key}@anchor{1a9}
  @section Attribute Type_Key
  
  
*************** about the type or subtype. This provides
*** 11516,11522 ****
  other implementations that support this attribute.
  
  @node Attribute TypeCode,Attribute Unconstrained_Array,Attribute Type_Key,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-typecode}@anchor{1a6}
  @section Attribute TypeCode
  
  
--- 11643,11649 ----
  other implementations that support this attribute.
  
  @node Attribute TypeCode,Attribute Unconstrained_Array,Attribute Type_Key,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-typecode}@anchor{1aa}
  @section Attribute TypeCode
  
  
*************** This internal attribute is used for the
*** 11526,11532 ****
  stubs in the context of the Distributed Systems Annex.
  
  @node Attribute Unconstrained_Array,Attribute Universal_Literal_String,Attribute TypeCode,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-unconstrained-array}@anchor{1a7}
  @section Attribute Unconstrained_Array
  
  
--- 11653,11659 ----
  stubs in the context of the Distributed Systems Annex.
  
  @node Attribute Unconstrained_Array,Attribute Universal_Literal_String,Attribute TypeCode,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-unconstrained-array}@anchor{1ab}
  @section Attribute Unconstrained_Array
  
  
*************** still static, and yields the result of a
*** 11540,11546 ****
  generic actual.
  
  @node Attribute Universal_Literal_String,Attribute Unrestricted_Access,Attribute Unconstrained_Array,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-universal-literal-string}@anchor{1a8}
  @section Attribute Universal_Literal_String
  
  
--- 11667,11673 ----
  generic actual.
  
  @node Attribute Universal_Literal_String,Attribute Unrestricted_Access,Attribute Unconstrained_Array,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-universal-literal-string}@anchor{1ac}
  @section Attribute Universal_Literal_String
  
  
*************** end;
*** 11568,11574 ****
  @end example
  
  @node Attribute Unrestricted_Access,Attribute Update,Attribute Universal_Literal_String,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-unrestricted-access}@anchor{1a9}
  @section Attribute Unrestricted_Access
  
  
--- 11695,11701 ----
  @end example
  
  @node Attribute Unrestricted_Access,Attribute Update,Attribute Universal_Literal_String,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-unrestricted-access}@anchor{1ad}
  @section Attribute Unrestricted_Access
  
  
*************** In general this is a risky approach. It
*** 11755,11761 ****
  of GNAT to another, so are best avoided if possible.
  
  @node Attribute Update,Attribute Valid_Scalars,Attribute Unrestricted_Access,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-update}@anchor{1aa}
  @section Attribute Update
  
  
--- 11882,11888 ----
  of GNAT to another, so are best avoided if possible.
  
  @node Attribute Update,Attribute Valid_Scalars,Attribute Unrestricted_Access,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-update}@anchor{1ae}
  @section Attribute Update
  
  
*************** A := A'Update ((1, 2) => 20, (3, 4) => 3
*** 11836,11842 ****
  which changes element (1,2) to 20 and (3,4) to 30.
  
  @node Attribute Valid_Scalars,Attribute VADS_Size,Attribute Update,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-valid-scalars}@anchor{1ab}
  @section Attribute Valid_Scalars
  
  
--- 11963,11969 ----
  which changes element (1,2) to 20 and (3,4) to 30.
  
  @node Attribute Valid_Scalars,Attribute VADS_Size,Attribute Update,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-valid-scalars}@anchor{1af}
  @section Attribute Valid_Scalars
  
  
*************** write a function with a single use of th
*** 11870,11876 ****
  function from multiple places.
  
  @node Attribute VADS_Size,Attribute Value_Size,Attribute Valid_Scalars,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-vads-size}@anchor{1ac}
  @section Attribute VADS_Size
  
  
--- 11997,12003 ----
  function from multiple places.
  
  @node Attribute VADS_Size,Attribute Value_Size,Attribute Valid_Scalars,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-vads-size}@anchor{1b0}
  @section Attribute VADS_Size
  
  
*************** gives the result that would be obtained
*** 11890,11896 ****
  the corresponding type.
  
  @node Attribute Value_Size,Attribute Wchar_T_Size,Attribute VADS_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes id6}@anchor{1ad}@anchor{gnat_rm/implementation_defined_attributes attribute-value-size}@anchor{15f}
  @section Attribute Value_Size
  
  
--- 12017,12023 ----
  the corresponding type.
  
  @node Attribute Value_Size,Attribute Wchar_T_Size,Attribute VADS_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes id6}@anchor{1b1}@anchor{gnat_rm/implementation_defined_attributes attribute-value-size}@anchor{163}
  @section Attribute Value_Size
  
  
*************** a value of the given subtype.  It is the
*** 11904,11910 ****
  but, unlike @code{Size}, may be set for non-first subtypes.
  
  @node Attribute Wchar_T_Size,Attribute Word_Size,Attribute Value_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-wchar-t-size}@anchor{1ae}
  @section Attribute Wchar_T_Size
  
  
--- 12031,12037 ----
  but, unlike @code{Size}, may be set for non-first subtypes.
  
  @node Attribute Wchar_T_Size,Attribute Word_Size,Attribute Value_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-wchar-t-size}@anchor{1b2}
  @section Attribute Wchar_T_Size
  
  
*************** primarily for constructing the definitio
*** 11916,11922 ****
  package @code{Interfaces.C}. The result is a static constant.
  
  @node Attribute Word_Size,,Attribute Wchar_T_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-word-size}@anchor{1af}
  @section Attribute Word_Size
  
  
--- 12043,12049 ----
  package @code{Interfaces.C}. The result is a static constant.
  
  @node Attribute Word_Size,,Attribute Wchar_T_Size,Implementation Defined Attributes
! @anchor{gnat_rm/implementation_defined_attributes attribute-word-size}@anchor{1b3}
  @section Attribute Word_Size
  
  
*************** prefix) provides the value @code{System.
*** 11927,11933 ****
  a static constant.
  
  @node Standard and Implementation Defined Restrictions,Implementation Advice,Implementation Defined Attributes,Top
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions standard-and-implementation-defined-restrictions}@anchor{9}@anchor{gnat_rm/standard_and_implementation_defined_restrictions doc}@anchor{1b0}@anchor{gnat_rm/standard_and_implementation_defined_restrictions id1}@anchor{1b1}
  @chapter Standard and Implementation Defined Restrictions
  
  
--- 12054,12060 ----
  a static constant.
  
  @node Standard and Implementation Defined Restrictions,Implementation Advice,Implementation Defined Attributes,Top
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions standard-and-implementation-defined-restrictions}@anchor{9}@anchor{gnat_rm/standard_and_implementation_defined_restrictions doc}@anchor{1b4}@anchor{gnat_rm/standard_and_implementation_defined_restrictions id1}@anchor{1b5}
  @chapter Standard and Implementation Defined Restrictions
  
  
*************** language defined or GNAT-specific, are l
*** 11956,11962 ****
  @end menu
  
  @node Partition-Wide Restrictions,Program Unit Level Restrictions,,Standard and Implementation Defined Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions partition-wide-restrictions}@anchor{1b2}@anchor{gnat_rm/standard_and_implementation_defined_restrictions id2}@anchor{1b3}
  @section Partition-Wide Restrictions
  
  
--- 12083,12089 ----
  @end menu
  
  @node Partition-Wide Restrictions,Program Unit Level Restrictions,,Standard and Implementation Defined Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions partition-wide-restrictions}@anchor{1b6}@anchor{gnat_rm/standard_and_implementation_defined_restrictions id2}@anchor{1b7}
  @section Partition-Wide Restrictions
  
  
*************** then all compilation units in the partit
*** 12045,12051 ****
  @end menu
  
  @node Immediate_Reclamation,Max_Asynchronous_Select_Nesting,,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions immediate-reclamation}@anchor{1b4}
  @subsection Immediate_Reclamation
  
  
--- 12172,12178 ----
  @end menu
  
  @node Immediate_Reclamation,Max_Asynchronous_Select_Nesting,,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions immediate-reclamation}@anchor{1b8}
  @subsection Immediate_Reclamation
  
  
*************** deallocation, any storage reserved at ru
*** 12057,12063 ****
  immediately reclaimed when the object no longer exists.
  
  @node Max_Asynchronous_Select_Nesting,Max_Entry_Queue_Length,Immediate_Reclamation,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-asynchronous-select-nesting}@anchor{1b5}
  @subsection Max_Asynchronous_Select_Nesting
  
  
--- 12184,12190 ----
  immediately reclaimed when the object no longer exists.
  
  @node Max_Asynchronous_Select_Nesting,Max_Entry_Queue_Length,Immediate_Reclamation,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-asynchronous-select-nesting}@anchor{1b9}
  @subsection Max_Asynchronous_Select_Nesting
  
  
*************** detected at compile time. Violations of
*** 12069,12075 ****
  other than zero cause Storage_Error to be raised.
  
  @node Max_Entry_Queue_Length,Max_Protected_Entries,Max_Asynchronous_Select_Nesting,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-entry-queue-length}@anchor{1b6}
  @subsection Max_Entry_Queue_Length
  
  
--- 12196,12202 ----
  other than zero cause Storage_Error to be raised.
  
  @node Max_Entry_Queue_Length,Max_Protected_Entries,Max_Asynchronous_Select_Nesting,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-entry-queue-length}@anchor{1ba}
  @subsection Max_Entry_Queue_Length
  
  
*************** compatibility purposes (and a warning wi
*** 12090,12096 ****
  warnings on obsolescent features are activated).
  
  @node Max_Protected_Entries,Max_Select_Alternatives,Max_Entry_Queue_Length,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-protected-entries}@anchor{1b7}
  @subsection Max_Protected_Entries
  
  
--- 12217,12223 ----
  warnings on obsolescent features are activated).
  
  @node Max_Protected_Entries,Max_Select_Alternatives,Max_Entry_Queue_Length,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-protected-entries}@anchor{1bb}
  @subsection Max_Protected_Entries
  
  
*************** bounds of every entry family of a protec
*** 12101,12107 ****
  defined by a discriminant of a subtype whose corresponding bound is static.
  
  @node Max_Select_Alternatives,Max_Storage_At_Blocking,Max_Protected_Entries,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-select-alternatives}@anchor{1b8}
  @subsection Max_Select_Alternatives
  
  
--- 12228,12234 ----
  defined by a discriminant of a subtype whose corresponding bound is static.
  
  @node Max_Select_Alternatives,Max_Storage_At_Blocking,Max_Protected_Entries,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-select-alternatives}@anchor{1bc}
  @subsection Max_Select_Alternatives
  
  
*************** defined by a discriminant of a subtype w
*** 12110,12116 ****
  [RM D.7] Specifies the maximum number of alternatives in a selective accept.
  
  @node Max_Storage_At_Blocking,Max_Task_Entries,Max_Select_Alternatives,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-storage-at-blocking}@anchor{1b9}
  @subsection Max_Storage_At_Blocking
  
  
--- 12237,12243 ----
  [RM D.7] Specifies the maximum number of alternatives in a selective accept.
  
  @node Max_Storage_At_Blocking,Max_Task_Entries,Max_Select_Alternatives,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-storage-at-blocking}@anchor{1bd}
  @subsection Max_Storage_At_Blocking
  
  
*************** Storage_Size that can be retained by a b
*** 12121,12127 ****
  restriction causes Storage_Error to be raised.
  
  @node Max_Task_Entries,Max_Tasks,Max_Storage_At_Blocking,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-task-entries}@anchor{1ba}
  @subsection Max_Task_Entries
  
  
--- 12248,12254 ----
  restriction causes Storage_Error to be raised.
  
  @node Max_Task_Entries,Max_Tasks,Max_Storage_At_Blocking,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-task-entries}@anchor{1be}
  @subsection Max_Task_Entries
  
  
*************** defined by a discriminant of a subtype w
*** 12134,12140 ****
  corresponding bound is static.
  
  @node Max_Tasks,No_Abort_Statements,Max_Task_Entries,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-tasks}@anchor{1bb}
  @subsection Max_Tasks
  
  
--- 12261,12267 ----
  corresponding bound is static.
  
  @node Max_Tasks,No_Abort_Statements,Max_Task_Entries,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions max-tasks}@anchor{1bf}
  @subsection Max_Tasks
  
  
*************** time. Violations of this restriction wit
*** 12147,12153 ****
  Storage_Error to be raised.
  
  @node No_Abort_Statements,No_Access_Parameter_Allocators,Max_Tasks,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-abort-statements}@anchor{1bc}
  @subsection No_Abort_Statements
  
  
--- 12274,12280 ----
  Storage_Error to be raised.
  
  @node No_Abort_Statements,No_Access_Parameter_Allocators,Max_Tasks,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-abort-statements}@anchor{1c0}
  @subsection No_Abort_Statements
  
  
*************** Storage_Error to be raised.
*** 12157,12163 ****
  no calls to Task_Identification.Abort_Task.
  
  @node No_Access_Parameter_Allocators,No_Access_Subprograms,No_Abort_Statements,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-access-parameter-allocators}@anchor{1bd}
  @subsection No_Access_Parameter_Allocators
  
  
--- 12284,12290 ----
  no calls to Task_Identification.Abort_Task.
  
  @node No_Access_Parameter_Allocators,No_Access_Subprograms,No_Abort_Statements,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-access-parameter-allocators}@anchor{1c1}
  @subsection No_Access_Parameter_Allocators
  
  
*************** occurrences of an allocator as the actua
*** 12168,12174 ****
  parameter.
  
  @node No_Access_Subprograms,No_Allocators,No_Access_Parameter_Allocators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-access-subprograms}@anchor{1be}
  @subsection No_Access_Subprograms
  
  
--- 12295,12301 ----
  parameter.
  
  @node No_Access_Subprograms,No_Allocators,No_Access_Parameter_Allocators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-access-subprograms}@anchor{1c2}
  @subsection No_Access_Subprograms
  
  
*************** parameter.
*** 12178,12184 ****
  declarations of access-to-subprogram types.
  
  @node No_Allocators,No_Anonymous_Allocators,No_Access_Subprograms,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-allocators}@anchor{1bf}
  @subsection No_Allocators
  
  
--- 12305,12311 ----
  declarations of access-to-subprogram types.
  
  @node No_Allocators,No_Anonymous_Allocators,No_Access_Subprograms,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-allocators}@anchor{1c3}
  @subsection No_Allocators
  
  
*************** declarations of access-to-subprogram typ
*** 12188,12194 ****
  occurrences of an allocator.
  
  @node No_Anonymous_Allocators,No_Asynchronous_Control,No_Allocators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-anonymous-allocators}@anchor{1c0}
  @subsection No_Anonymous_Allocators
  
  
--- 12315,12321 ----
  occurrences of an allocator.
  
  @node No_Anonymous_Allocators,No_Asynchronous_Control,No_Allocators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-anonymous-allocators}@anchor{1c4}
  @subsection No_Anonymous_Allocators
  
  
*************** occurrences of an allocator.
*** 12198,12204 ****
  occurrences of an allocator of anonymous access type.
  
  @node No_Asynchronous_Control,No_Calendar,No_Anonymous_Allocators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-asynchronous-control}@anchor{1c1}
  @subsection No_Asynchronous_Control
  
  
--- 12325,12331 ----
  occurrences of an allocator of anonymous access type.
  
  @node No_Asynchronous_Control,No_Calendar,No_Anonymous_Allocators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-asynchronous-control}@anchor{1c5}
  @subsection No_Asynchronous_Control
  
  
*************** occurrences of an allocator of anonymous
*** 12208,12214 ****
  dependences on the predefined package Asynchronous_Task_Control.
  
  @node No_Calendar,No_Coextensions,No_Asynchronous_Control,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-calendar}@anchor{1c2}
  @subsection No_Calendar
  
  
--- 12335,12341 ----
  dependences on the predefined package Asynchronous_Task_Control.
  
  @node No_Calendar,No_Coextensions,No_Asynchronous_Control,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-calendar}@anchor{1c6}
  @subsection No_Calendar
  
  
*************** dependences on the predefined package As
*** 12218,12224 ****
  dependences on package Calendar.
  
  @node No_Coextensions,No_Default_Initialization,No_Calendar,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-coextensions}@anchor{1c3}
  @subsection No_Coextensions
  
  
--- 12345,12351 ----
  dependences on package Calendar.
  
  @node No_Coextensions,No_Default_Initialization,No_Calendar,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-coextensions}@anchor{1c7}
  @subsection No_Coextensions
  
  
*************** dependences on package Calendar.
*** 12228,12234 ****
  coextensions. See 3.10.2.
  
  @node No_Default_Initialization,No_Delay,No_Coextensions,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-default-initialization}@anchor{1c4}
  @subsection No_Default_Initialization
  
  
--- 12355,12361 ----
  coextensions. See 3.10.2.
  
  @node No_Default_Initialization,No_Delay,No_Coextensions,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-default-initialization}@anchor{1c8}
  @subsection No_Default_Initialization
  
  
*************** is to prohibit all cases of variables de
*** 12245,12251 ****
  initializer (including the case of OUT scalar parameters).
  
  @node No_Delay,No_Dependence,No_Default_Initialization,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-delay}@anchor{1c5}
  @subsection No_Delay
  
  
--- 12372,12378 ----
  initializer (including the case of OUT scalar parameters).
  
  @node No_Delay,No_Dependence,No_Default_Initialization,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-delay}@anchor{1c9}
  @subsection No_Delay
  
  
*************** initializer (including the case of OUT s
*** 12255,12261 ****
  delay statements and no semantic dependences on package Calendar.
  
  @node No_Dependence,No_Direct_Boolean_Operators,No_Delay,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dependence}@anchor{1c6}
  @subsection No_Dependence
  
  
--- 12382,12388 ----
  delay statements and no semantic dependences on package Calendar.
  
  @node No_Dependence,No_Direct_Boolean_Operators,No_Delay,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dependence}@anchor{1ca}
  @subsection No_Dependence
  
  
*************** delay statements and no semantic depende
*** 12265,12271 ****
  dependences on a library unit.
  
  @node No_Direct_Boolean_Operators,No_Dispatch,No_Dependence,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-direct-boolean-operators}@anchor{1c7}
  @subsection No_Direct_Boolean_Operators
  
  
--- 12392,12398 ----
  dependences on a library unit.
  
  @node No_Direct_Boolean_Operators,No_Dispatch,No_Dependence,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-direct-boolean-operators}@anchor{1cb}
  @subsection No_Direct_Boolean_Operators
  
  
*************** protocol requires the use of short-circu
*** 12278,12284 ****
  composite boolean operations.
  
  @node No_Dispatch,No_Dispatching_Calls,No_Direct_Boolean_Operators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dispatch}@anchor{1c8}
  @subsection No_Dispatch
  
  
--- 12405,12411 ----
  composite boolean operations.
  
  @node No_Dispatch,No_Dispatching_Calls,No_Direct_Boolean_Operators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dispatch}@anchor{1cc}
  @subsection No_Dispatch
  
  
*************** composite boolean operations.
*** 12288,12294 ****
  occurrences of @code{T'Class}, for any (tagged) subtype @code{T}.
  
  @node No_Dispatching_Calls,No_Dynamic_Attachment,No_Dispatch,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dispatching-calls}@anchor{1c9}
  @subsection No_Dispatching_Calls
  
  
--- 12415,12421 ----
  occurrences of @code{T'Class}, for any (tagged) subtype @code{T}.
  
  @node No_Dispatching_Calls,No_Dynamic_Attachment,No_Dispatch,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dispatching-calls}@anchor{1cd}
  @subsection No_Dispatching_Calls
  
  
*************** end Example;
*** 12349,12355 ****
  @end example
  
  @node No_Dynamic_Attachment,No_Dynamic_Priorities,No_Dispatching_Calls,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dynamic-attachment}@anchor{1ca}
  @subsection No_Dynamic_Attachment
  
  
--- 12476,12482 ----
  @end example
  
  @node No_Dynamic_Attachment,No_Dynamic_Priorities,No_Dispatching_Calls,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dynamic-attachment}@anchor{1ce}
  @subsection No_Dynamic_Attachment
  
  
*************** compatibility purposes (and a warning wi
*** 12368,12374 ****
  warnings on obsolescent features are activated).
  
  @node No_Dynamic_Priorities,No_Entry_Calls_In_Elaboration_Code,No_Dynamic_Attachment,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dynamic-priorities}@anchor{1cb}
  @subsection No_Dynamic_Priorities
  
  
--- 12495,12501 ----
  warnings on obsolescent features are activated).
  
  @node No_Dynamic_Priorities,No_Entry_Calls_In_Elaboration_Code,No_Dynamic_Attachment,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dynamic-priorities}@anchor{1cf}
  @subsection No_Dynamic_Priorities
  
  
*************** warnings on obsolescent features are act
*** 12377,12383 ****
  [RM D.7] There are no semantic dependencies on the package Dynamic_Priorities.
  
  @node No_Entry_Calls_In_Elaboration_Code,No_Enumeration_Maps,No_Dynamic_Priorities,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-entry-calls-in-elaboration-code}@anchor{1cc}
  @subsection No_Entry_Calls_In_Elaboration_Code
  
  
--- 12504,12510 ----
  [RM D.7] There are no semantic dependencies on the package Dynamic_Priorities.
  
  @node No_Entry_Calls_In_Elaboration_Code,No_Enumeration_Maps,No_Dynamic_Priorities,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-entry-calls-in-elaboration-code}@anchor{1d0}
  @subsection No_Entry_Calls_In_Elaboration_Code
  
  
*************** restriction, the compiler can assume tha
*** 12389,12395 ****
  in a task can be executed at elaboration time.
  
  @node No_Enumeration_Maps,No_Exception_Handlers,No_Entry_Calls_In_Elaboration_Code,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-enumeration-maps}@anchor{1cd}
  @subsection No_Enumeration_Maps
  
  
--- 12516,12522 ----
  in a task can be executed at elaboration time.
  
  @node No_Enumeration_Maps,No_Exception_Handlers,No_Entry_Calls_In_Elaboration_Code,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-enumeration-maps}@anchor{1d1}
  @subsection No_Enumeration_Maps
  
  
*************** enumeration maps are used (that is Image
*** 12400,12406 ****
  to enumeration types).
  
  @node No_Exception_Handlers,No_Exception_Propagation,No_Enumeration_Maps,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exception-handlers}@anchor{1ce}
  @subsection No_Exception_Handlers
  
  
--- 12527,12533 ----
  to enumeration types).
  
  @node No_Exception_Handlers,No_Exception_Propagation,No_Enumeration_Maps,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exception-handlers}@anchor{1d2}
  @subsection No_Exception_Handlers
  
  
*************** statement generated by the compiler). Th
*** 12425,12431 ****
  represents the line number in the source program where the raise occurs.
  
  @node No_Exception_Propagation,No_Exception_Registration,No_Exception_Handlers,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exception-propagation}@anchor{1cf}
  @subsection No_Exception_Propagation
  
  
--- 12552,12558 ----
  represents the line number in the source program where the raise occurs.
  
  @node No_Exception_Propagation,No_Exception_Registration,No_Exception_Handlers,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exception-propagation}@anchor{1d3}
  @subsection No_Exception_Propagation
  
  
*************** the package GNAT.Current_Exception is no
*** 12442,12448 ****
  statements (raise with no operand) are not permitted.
  
  @node No_Exception_Registration,No_Exceptions,No_Exception_Propagation,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exception-registration}@anchor{1d0}
  @subsection No_Exception_Registration
  
  
--- 12569,12575 ----
  statements (raise with no operand) are not permitted.
  
  @node No_Exception_Registration,No_Exceptions,No_Exception_Propagation,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exception-registration}@anchor{1d4}
  @subsection No_Exception_Registration
  
  
*************** code is simplified by omitting the other
*** 12456,12472 ****
  of exceptions when they are declared.
  
  @node No_Exceptions,No_Finalization,No_Exception_Registration,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exceptions}@anchor{1d1}
  @subsection No_Exceptions
  
  
  @geindex No_Exceptions
  
  [RM H.4] This restriction ensures at compile time that there are no
! raise statements and no exception handlers.
  
  @node No_Finalization,No_Fixed_Point,No_Exceptions,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-finalization}@anchor{1d2}
  @subsection No_Finalization
  
  
--- 12583,12600 ----
  of exceptions when they are declared.
  
  @node No_Exceptions,No_Finalization,No_Exception_Registration,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exceptions}@anchor{1d5}
  @subsection No_Exceptions
  
  
  @geindex No_Exceptions
  
  [RM H.4] This restriction ensures at compile time that there are no
! raise statements and no exception handlers and also suppresses the
! generation of language-defined run-time checks.
  
  @node No_Finalization,No_Fixed_Point,No_Exceptions,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-finalization}@anchor{1d6}
  @subsection No_Finalization
  
  
*************** object or a nested component, either dec
*** 12507,12513 ****
  deallocation of a controlled object no longer finalizes its contents.
  
  @node No_Fixed_Point,No_Floating_Point,No_Finalization,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-fixed-point}@anchor{1d3}
  @subsection No_Fixed_Point
  
  
--- 12635,12641 ----
  deallocation of a controlled object no longer finalizes its contents.
  
  @node No_Fixed_Point,No_Floating_Point,No_Finalization,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-fixed-point}@anchor{1d7}
  @subsection No_Fixed_Point
  
  
*************** deallocation of a controlled object no l
*** 12517,12523 ****
  occurrences of fixed point types and operations.
  
  @node No_Floating_Point,No_Implicit_Conditionals,No_Fixed_Point,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-floating-point}@anchor{1d4}
  @subsection No_Floating_Point
  
  
--- 12645,12651 ----
  occurrences of fixed point types and operations.
  
  @node No_Floating_Point,No_Implicit_Conditionals,No_Fixed_Point,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-floating-point}@anchor{1d8}
  @subsection No_Floating_Point
  
  
*************** occurrences of fixed point types and ope
*** 12527,12533 ****
  occurrences of floating point types and operations.
  
  @node No_Implicit_Conditionals,No_Implicit_Dynamic_Code,No_Floating_Point,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-conditionals}@anchor{1d5}
  @subsection No_Implicit_Conditionals
  
  
--- 12655,12661 ----
  occurrences of floating point types and operations.
  
  @node No_Implicit_Conditionals,No_Implicit_Dynamic_Code,No_Floating_Point,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-conditionals}@anchor{1d9}
  @subsection No_Implicit_Conditionals
  
  
*************** normal manner. Constructs generating imp
*** 12543,12549 ****
  of composite objects and the Max/Min attributes.
  
  @node No_Implicit_Dynamic_Code,No_Implicit_Heap_Allocations,No_Implicit_Conditionals,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-dynamic-code}@anchor{1d6}
  @subsection No_Implicit_Dynamic_Code
  
  
--- 12671,12677 ----
  of composite objects and the Max/Min attributes.
  
  @node No_Implicit_Dynamic_Code,No_Implicit_Heap_Allocations,No_Implicit_Conditionals,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-dynamic-code}@anchor{1da}
  @subsection No_Implicit_Dynamic_Code
  
  
*************** foreign-language convention; primitive o
*** 12573,12579 ****
  types.
  
  @node No_Implicit_Heap_Allocations,No_Implicit_Protected_Object_Allocations,No_Implicit_Dynamic_Code,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-heap-allocations}@anchor{1d7}
  @subsection No_Implicit_Heap_Allocations
  
  
--- 12701,12707 ----
  types.
  
  @node No_Implicit_Heap_Allocations,No_Implicit_Protected_Object_Allocations,No_Implicit_Dynamic_Code,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-heap-allocations}@anchor{1db}
  @subsection No_Implicit_Heap_Allocations
  
  
*************** types.
*** 12582,12588 ****
  [RM D.7] No constructs are allowed to cause implicit heap allocation.
  
  @node No_Implicit_Protected_Object_Allocations,No_Implicit_Task_Allocations,No_Implicit_Heap_Allocations,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-protected-object-allocations}@anchor{1d8}
  @subsection No_Implicit_Protected_Object_Allocations
  
  
--- 12710,12716 ----
  [RM D.7] No constructs are allowed to cause implicit heap allocation.
  
  @node No_Implicit_Protected_Object_Allocations,No_Implicit_Task_Allocations,No_Implicit_Heap_Allocations,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-protected-object-allocations}@anchor{1dc}
  @subsection No_Implicit_Protected_Object_Allocations
  
  
*************** types.
*** 12592,12598 ****
  protected object.
  
  @node No_Implicit_Task_Allocations,No_Initialize_Scalars,No_Implicit_Protected_Object_Allocations,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-task-allocations}@anchor{1d9}
  @subsection No_Implicit_Task_Allocations
  
  
--- 12720,12726 ----
  protected object.
  
  @node No_Implicit_Task_Allocations,No_Initialize_Scalars,No_Implicit_Protected_Object_Allocations,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-task-allocations}@anchor{1dd}
  @subsection No_Implicit_Task_Allocations
  
  
*************** protected object.
*** 12601,12607 ****
  [GNAT] No constructs are allowed to cause implicit heap allocation of a task.
  
  @node No_Initialize_Scalars,No_IO,No_Implicit_Task_Allocations,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-initialize-scalars}@anchor{1da}
  @subsection No_Initialize_Scalars
  
  
--- 12729,12735 ----
  [GNAT] No constructs are allowed to cause implicit heap allocation of a task.
  
  @node No_Initialize_Scalars,No_IO,No_Implicit_Task_Allocations,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-initialize-scalars}@anchor{1de}
  @subsection No_Initialize_Scalars
  
  
*************** code, and in particular eliminates dummy
*** 12613,12619 ****
  are otherwise generated for some record and array types.
  
  @node No_IO,No_Local_Allocators,No_Initialize_Scalars,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-io}@anchor{1db}
  @subsection No_IO
  
  
--- 12741,12747 ----
  are otherwise generated for some record and array types.
  
  @node No_IO,No_Local_Allocators,No_Initialize_Scalars,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-io}@anchor{1df}
  @subsection No_IO
  
  
*************** dependences on any of the library units
*** 12624,12630 ****
  Text_IO, Wide_Text_IO, Wide_Wide_Text_IO, or Stream_IO.
  
  @node No_Local_Allocators,No_Local_Protected_Objects,No_IO,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-local-allocators}@anchor{1dc}
  @subsection No_Local_Allocators
  
  
--- 12752,12758 ----
  Text_IO, Wide_Text_IO, Wide_Wide_Text_IO, or Stream_IO.
  
  @node No_Local_Allocators,No_Local_Protected_Objects,No_IO,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-local-allocators}@anchor{1e0}
  @subsection No_Local_Allocators
  
  
*************** occurrences of an allocator in subprogra
*** 12635,12641 ****
  and entry bodies.
  
  @node No_Local_Protected_Objects,No_Local_Timing_Events,No_Local_Allocators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-local-protected-objects}@anchor{1dd}
  @subsection No_Local_Protected_Objects
  
  
--- 12763,12769 ----
  and entry bodies.
  
  @node No_Local_Protected_Objects,No_Local_Timing_Events,No_Local_Allocators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-local-protected-objects}@anchor{1e1}
  @subsection No_Local_Protected_Objects
  
  
*************** and entry bodies.
*** 12645,12651 ****
  only declared at the library level.
  
  @node No_Local_Timing_Events,No_Long_Long_Integers,No_Local_Protected_Objects,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-local-timing-events}@anchor{1de}
  @subsection No_Local_Timing_Events
  
  
--- 12773,12779 ----
  only declared at the library level.
  
  @node No_Local_Timing_Events,No_Long_Long_Integers,No_Local_Protected_Objects,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-local-timing-events}@anchor{1e2}
  @subsection No_Local_Timing_Events
  
  
*************** only declared at the library level.
*** 12655,12661 ****
  declared at the library level.
  
  @node No_Long_Long_Integers,No_Multiple_Elaboration,No_Local_Timing_Events,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-long-long-integers}@anchor{1df}
  @subsection No_Long_Long_Integers
  
  
--- 12783,12789 ----
  declared at the library level.
  
  @node No_Long_Long_Integers,No_Multiple_Elaboration,No_Local_Timing_Events,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-long-long-integers}@anchor{1e3}
  @subsection No_Long_Long_Integers
  
  
*************** implicit base type is Long_Long_Integer,
*** 12667,12690 ****
  Long_Integer'Size.
  
  @node No_Multiple_Elaboration,No_Nested_Finalization,No_Long_Long_Integers,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-multiple-elaboration}@anchor{1e0}
  @subsection No_Multiple_Elaboration
  
  
  @geindex No_Multiple_Elaboration
  
! [GNAT] When this restriction is active, we are not requesting control-flow
! preservation with -fpreserve-control-flow, and the static elaboration model is
! used, the compiler is allowed to suppress the elaboration counter normally
! associated with the unit, even if the unit has elaboration code. This counter
! is typically used to check for access before elaboration and to control
! multiple elaboration attempts. If the restriction is used, then the
! situations in which multiple elaboration is possible, including non-Ada main
! programs and Stand Alone libraries, are not permitted and will be diagnosed
! by the binder.
  
  @node No_Nested_Finalization,No_Protected_Type_Allocators,No_Multiple_Elaboration,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-nested-finalization}@anchor{1e1}
  @subsection No_Nested_Finalization
  
  
--- 12795,12817 ----
  Long_Integer'Size.
  
  @node No_Multiple_Elaboration,No_Nested_Finalization,No_Long_Long_Integers,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-multiple-elaboration}@anchor{1e4}
  @subsection No_Multiple_Elaboration
  
  
  @geindex No_Multiple_Elaboration
  
! [GNAT] When this restriction is active and the static elaboration model is
! used, and -fpreserve-control-flow is not used, the compiler is allowed to
! suppress the elaboration counter normally associated with the unit, even if
! the unit has elaboration code. This counter is typically used to check for
! access before elaboration and to control multiple elaboration attempts. If the
! restriction is used, then the situations in which multiple elaboration is
! possible, including non-Ada main programs and Stand Alone libraries, are not
! permitted and will be diagnosed by the binder.
  
  @node No_Nested_Finalization,No_Protected_Type_Allocators,No_Multiple_Elaboration,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-nested-finalization}@anchor{1e5}
  @subsection No_Nested_Finalization
  
  
*************** by the binder.
*** 12693,12699 ****
  [RM D.7] All objects requiring finalization are declared at the library level.
  
  @node No_Protected_Type_Allocators,No_Protected_Types,No_Nested_Finalization,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-protected-type-allocators}@anchor{1e2}
  @subsection No_Protected_Type_Allocators
  
  
--- 12820,12826 ----
  [RM D.7] All objects requiring finalization are declared at the library level.
  
  @node No_Protected_Type_Allocators,No_Protected_Types,No_Nested_Finalization,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-protected-type-allocators}@anchor{1e6}
  @subsection No_Protected_Type_Allocators
  
  
*************** by the binder.
*** 12703,12709 ****
  expressions that attempt to allocate protected objects.
  
  @node No_Protected_Types,No_Recursion,No_Protected_Type_Allocators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-protected-types}@anchor{1e3}
  @subsection No_Protected_Types
  
  
--- 12830,12836 ----
  expressions that attempt to allocate protected objects.
  
  @node No_Protected_Types,No_Recursion,No_Protected_Type_Allocators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-protected-types}@anchor{1e7}
  @subsection No_Protected_Types
  
  
*************** expressions that attempt to allocate pro
*** 12713,12719 ****
  declarations of protected types or protected objects.
  
  @node No_Recursion,No_Reentrancy,No_Protected_Types,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-recursion}@anchor{1e4}
  @subsection No_Recursion
  
  
--- 12840,12846 ----
  declarations of protected types or protected objects.
  
  @node No_Recursion,No_Reentrancy,No_Protected_Types,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-recursion}@anchor{1e8}
  @subsection No_Recursion
  
  
*************** declarations of protected types or prote
*** 12723,12729 ****
  part of its execution.
  
  @node No_Reentrancy,No_Relative_Delay,No_Recursion,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-reentrancy}@anchor{1e5}
  @subsection No_Reentrancy
  
  
--- 12850,12856 ----
  part of its execution.
  
  @node No_Reentrancy,No_Relative_Delay,No_Recursion,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-reentrancy}@anchor{1e9}
  @subsection No_Reentrancy
  
  
*************** part of its execution.
*** 12733,12739 ****
  two tasks at the same time.
  
  @node No_Relative_Delay,No_Requeue_Statements,No_Reentrancy,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-relative-delay}@anchor{1e6}
  @subsection No_Relative_Delay
  
  
--- 12860,12866 ----
  two tasks at the same time.
  
  @node No_Relative_Delay,No_Requeue_Statements,No_Reentrancy,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-relative-delay}@anchor{1ea}
  @subsection No_Relative_Delay
  
  
*************** relative statements and prevents express
*** 12744,12750 ****
  appearing in source code.
  
  @node No_Requeue_Statements,No_Secondary_Stack,No_Relative_Delay,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-requeue-statements}@anchor{1e7}
  @subsection No_Requeue_Statements
  
  
--- 12871,12877 ----
  appearing in source code.
  
  @node No_Requeue_Statements,No_Secondary_Stack,No_Relative_Delay,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-requeue-statements}@anchor{1eb}
  @subsection No_Requeue_Statements
  
  
*************** compatibility purposes (and a warning wi
*** 12762,12768 ****
  warnings on oNobsolescent features are activated).
  
  @node No_Secondary_Stack,No_Select_Statements,No_Requeue_Statements,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-secondary-stack}@anchor{1e8}
  @subsection No_Secondary_Stack
  
  
--- 12889,12895 ----
  warnings on oNobsolescent features are activated).
  
  @node No_Secondary_Stack,No_Select_Statements,No_Requeue_Statements,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-secondary-stack}@anchor{1ec}
  @subsection No_Secondary_Stack
  
  
*************** stack is used to implement functions ret
*** 12775,12781 ****
  secondary stacks for tasks (excluding the environment task) at run time.
  
  @node No_Select_Statements,No_Specific_Termination_Handlers,No_Secondary_Stack,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-select-statements}@anchor{1e9}
  @subsection No_Select_Statements
  
  
--- 12902,12908 ----
  secondary stacks for tasks (excluding the environment task) at run time.
  
  @node No_Select_Statements,No_Specific_Termination_Handlers,No_Secondary_Stack,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-select-statements}@anchor{1ed}
  @subsection No_Select_Statements
  
  
*************** secondary stacks for tasks (excluding th
*** 12785,12791 ****
  kind are permitted, that is the keyword @code{select} may not appear.
  
  @node No_Specific_Termination_Handlers,No_Specification_of_Aspect,No_Select_Statements,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-specific-termination-handlers}@anchor{1ea}
  @subsection No_Specific_Termination_Handlers
  
  
--- 12912,12918 ----
  kind are permitted, that is the keyword @code{select} may not appear.
  
  @node No_Specific_Termination_Handlers,No_Specification_of_Aspect,No_Select_Statements,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-specific-termination-handlers}@anchor{1ee}
  @subsection No_Specific_Termination_Handlers
  
  
*************** kind are permitted, that is the keyword
*** 12795,12801 ****
  or to Ada.Task_Termination.Specific_Handler.
  
  @node No_Specification_of_Aspect,No_Standard_Allocators_After_Elaboration,No_Specific_Termination_Handlers,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-specification-of-aspect}@anchor{1eb}
  @subsection No_Specification_of_Aspect
  
  
--- 12922,12928 ----
  or to Ada.Task_Termination.Specific_Handler.
  
  @node No_Specification_of_Aspect,No_Standard_Allocators_After_Elaboration,No_Specific_Termination_Handlers,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-specification-of-aspect}@anchor{1ef}
  @subsection No_Specification_of_Aspect
  
  
*************** specification, attribute definition clau
*** 12806,12812 ****
  given aspect.
  
  @node No_Standard_Allocators_After_Elaboration,No_Standard_Storage_Pools,No_Specification_of_Aspect,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-standard-allocators-after-elaboration}@anchor{1ec}
  @subsection No_Standard_Allocators_After_Elaboration
  
  
--- 12933,12939 ----
  given aspect.
  
  @node No_Standard_Allocators_After_Elaboration,No_Standard_Storage_Pools,No_Specification_of_Aspect,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-standard-allocators-after-elaboration}@anchor{1f0}
  @subsection No_Standard_Allocators_After_Elaboration
  
  
*************** library items of the partition has compl
*** 12818,12824 ****
  is raised.
  
  @node No_Standard_Storage_Pools,No_Stream_Optimizations,No_Standard_Allocators_After_Elaboration,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-standard-storage-pools}@anchor{1ed}
  @subsection No_Standard_Storage_Pools
  
  
--- 12945,12951 ----
  is raised.
  
  @node No_Standard_Storage_Pools,No_Stream_Optimizations,No_Standard_Allocators_After_Elaboration,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-standard-storage-pools}@anchor{1f1}
  @subsection No_Standard_Storage_Pools
  
  
*************** have an explicit Storage_Pool attribute
*** 12830,12836 ****
  user-defined storage pool.
  
  @node No_Stream_Optimizations,No_Streams,No_Standard_Storage_Pools,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-stream-optimizations}@anchor{1ee}
  @subsection No_Stream_Optimizations
  
  
--- 12957,12963 ----
  user-defined storage pool.
  
  @node No_Stream_Optimizations,No_Streams,No_Standard_Storage_Pools,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-stream-optimizations}@anchor{1f2}
  @subsection No_Stream_Optimizations
  
  
*************** user-defined storage pool.
*** 12839,12849 ****
  [GNAT] This restriction affects the performance of stream operations on types
  @code{String}, @code{Wide_String} and @code{Wide_Wide_String}. By default, the
  compiler uses block reads and writes when manipulating @code{String} objects
! due to their supperior performance. When this restriction is in effect, the
  compiler performs all IO operations on a per-character basis.
  
  @node No_Streams,No_Task_Allocators,No_Stream_Optimizations,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-streams}@anchor{1ef}
  @subsection No_Streams
  
  
--- 12966,12976 ----
  [GNAT] This restriction affects the performance of stream operations on types
  @code{String}, @code{Wide_String} and @code{Wide_Wide_String}. By default, the
  compiler uses block reads and writes when manipulating @code{String} objects
! due to their superior performance. When this restriction is in effect, the
  compiler performs all IO operations on a per-character basis.
  
  @node No_Streams,No_Task_Allocators,No_Stream_Optimizations,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-streams}@anchor{1f3}
  @subsection No_Streams
  
  
*************** unit declaring a tagged type should be c
*** 12864,12870 ****
  though this is not required.
  
  @node No_Task_Allocators,No_Task_At_Interrupt_Priority,No_Streams,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-allocators}@anchor{1f0}
  @subsection No_Task_Allocators
  
  
--- 12991,12997 ----
  though this is not required.
  
  @node No_Task_Allocators,No_Task_At_Interrupt_Priority,No_Streams,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-allocators}@anchor{1f4}
  @subsection No_Task_Allocators
  
  
*************** though this is not required.
*** 12874,12880 ****
  or types containing task subcomponents.
  
  @node No_Task_At_Interrupt_Priority,No_Task_Attributes_Package,No_Task_Allocators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-at-interrupt-priority}@anchor{1f1}
  @subsection No_Task_At_Interrupt_Priority
  
  
--- 13001,13007 ----
  or types containing task subcomponents.
  
  @node No_Task_At_Interrupt_Priority,No_Task_Attributes_Package,No_Task_Allocators,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-at-interrupt-priority}@anchor{1f5}
  @subsection No_Task_At_Interrupt_Priority
  
  
*************** a consequence, the tasks are always crea
*** 12886,12892 ****
  that an interrupt priority.
  
  @node No_Task_Attributes_Package,No_Task_Hierarchy,No_Task_At_Interrupt_Priority,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-attributes-package}@anchor{1f2}
  @subsection No_Task_Attributes_Package
  
  
--- 13013,13019 ----
  that an interrupt priority.
  
  @node No_Task_Attributes_Package,No_Task_Hierarchy,No_Task_At_Interrupt_Priority,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-attributes-package}@anchor{1f6}
  @subsection No_Task_Attributes_Package
  
  
*************** compatibility purposes (and a warning wi
*** 12903,12909 ****
  warnings on obsolescent features are activated).
  
  @node No_Task_Hierarchy,No_Task_Termination,No_Task_Attributes_Package,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-hierarchy}@anchor{1f3}
  @subsection No_Task_Hierarchy
  
  
--- 13030,13036 ----
  warnings on obsolescent features are activated).
  
  @node No_Task_Hierarchy,No_Task_Termination,No_Task_Attributes_Package,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-hierarchy}@anchor{1f7}
  @subsection No_Task_Hierarchy
  
  
*************** warnings on obsolescent features are act
*** 12913,12919 ****
  directly on the environment task of the partition.
  
  @node No_Task_Termination,No_Tasking,No_Task_Hierarchy,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-termination}@anchor{1f4}
  @subsection No_Task_Termination
  
  
--- 13040,13046 ----
  directly on the environment task of the partition.
  
  @node No_Task_Termination,No_Tasking,No_Task_Hierarchy,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-termination}@anchor{1f8}
  @subsection No_Task_Termination
  
  
*************** directly on the environment task of the
*** 12922,12928 ****
  [RM D.7] Tasks that terminate are erroneous.
  
  @node No_Tasking,No_Terminate_Alternatives,No_Task_Termination,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-tasking}@anchor{1f5}
  @subsection No_Tasking
  
  
--- 13049,13055 ----
  [RM D.7] Tasks that terminate are erroneous.
  
  @node No_Tasking,No_Terminate_Alternatives,No_Task_Termination,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-tasking}@anchor{1f9}
  @subsection No_Tasking
  
  
*************** and cause an error message to be output
*** 12935,12941 ****
  binder.
  
  @node No_Terminate_Alternatives,No_Unchecked_Access,No_Tasking,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-terminate-alternatives}@anchor{1f6}
  @subsection No_Terminate_Alternatives
  
  
--- 13062,13068 ----
  binder.
  
  @node No_Terminate_Alternatives,No_Unchecked_Access,No_Tasking,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-terminate-alternatives}@anchor{1fa}
  @subsection No_Terminate_Alternatives
  
  
*************** binder.
*** 12944,12950 ****
  [RM D.7] There are no selective accepts with terminate alternatives.
  
  @node No_Unchecked_Access,No_Unchecked_Conversion,No_Terminate_Alternatives,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-unchecked-access}@anchor{1f7}
  @subsection No_Unchecked_Access
  
  
--- 13071,13077 ----
  [RM D.7] There are no selective accepts with terminate alternatives.
  
  @node No_Unchecked_Access,No_Unchecked_Conversion,No_Terminate_Alternatives,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-unchecked-access}@anchor{1fb}
  @subsection No_Unchecked_Access
  
  
*************** binder.
*** 12954,12960 ****
  occurrences of the Unchecked_Access attribute.
  
  @node No_Unchecked_Conversion,No_Unchecked_Deallocation,No_Unchecked_Access,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-unchecked-conversion}@anchor{1f8}
  @subsection No_Unchecked_Conversion
  
  
--- 13081,13087 ----
  occurrences of the Unchecked_Access attribute.
  
  @node No_Unchecked_Conversion,No_Unchecked_Deallocation,No_Unchecked_Access,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-unchecked-conversion}@anchor{1fc}
  @subsection No_Unchecked_Conversion
  
  
*************** occurrences of the Unchecked_Access attr
*** 12964,12970 ****
  dependences on the predefined generic function Unchecked_Conversion.
  
  @node No_Unchecked_Deallocation,No_Use_Of_Entity,No_Unchecked_Conversion,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-unchecked-deallocation}@anchor{1f9}
  @subsection No_Unchecked_Deallocation
  
  
--- 13091,13097 ----
  dependences on the predefined generic function Unchecked_Conversion.
  
  @node No_Unchecked_Deallocation,No_Use_Of_Entity,No_Unchecked_Conversion,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-unchecked-deallocation}@anchor{1fd}
  @subsection No_Unchecked_Deallocation
  
  
*************** dependences on the predefined generic fu
*** 12974,12980 ****
  dependences on the predefined generic procedure Unchecked_Deallocation.
  
  @node No_Use_Of_Entity,Pure_Barriers,No_Unchecked_Deallocation,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-use-of-entity}@anchor{1fa}
  @subsection No_Use_Of_Entity
  
  
--- 13101,13107 ----
  dependences on the predefined generic procedure Unchecked_Deallocation.
  
  @node No_Use_Of_Entity,Pure_Barriers,No_Unchecked_Deallocation,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-use-of-entity}@anchor{1fe}
  @subsection No_Use_Of_Entity
  
  
*************** No_Use_Of_Entity => Ada.Text_IO.Put_Line
*** 12994,13000 ****
  @end example
  
  @node Pure_Barriers,Simple_Barriers,No_Use_Of_Entity,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions pure-barriers}@anchor{1fb}
  @subsection Pure_Barriers
  
  
--- 13121,13127 ----
  @end example
  
  @node Pure_Barriers,Simple_Barriers,No_Use_Of_Entity,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions pure-barriers}@anchor{1ff}
  @subsection Pure_Barriers
  
  
*************** but still ensures absence of side effect
*** 13045,13051 ****
  during the evaluation of the barriers.
  
  @node Simple_Barriers,Static_Priorities,Pure_Barriers,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions simple-barriers}@anchor{1fc}
  @subsection Simple_Barriers
  
  
--- 13172,13178 ----
  during the evaluation of the barriers.
  
  @node Simple_Barriers,Static_Priorities,Pure_Barriers,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions simple-barriers}@anchor{200}
  @subsection Simple_Barriers
  
  
*************** compatibility purposes (and a warning wi
*** 13064,13070 ****
  warnings on obsolescent features are activated).
  
  @node Static_Priorities,Static_Storage_Size,Simple_Barriers,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions static-priorities}@anchor{1fd}
  @subsection Static_Priorities
  
  
--- 13191,13197 ----
  warnings on obsolescent features are activated).
  
  @node Static_Priorities,Static_Storage_Size,Simple_Barriers,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions static-priorities}@anchor{201}
  @subsection Static_Priorities
  
  
*************** are static, and that there are no depend
*** 13075,13081 ****
  @code{Ada.Dynamic_Priorities}.
  
  @node Static_Storage_Size,,Static_Priorities,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions static-storage-size}@anchor{1fe}
  @subsection Static_Storage_Size
  
  
--- 13202,13208 ----
  @code{Ada.Dynamic_Priorities}.
  
  @node Static_Storage_Size,,Static_Priorities,Partition-Wide Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions static-storage-size}@anchor{202}
  @subsection Static_Storage_Size
  
  
*************** are static, and that there are no depend
*** 13085,13091 ****
  in a Storage_Size pragma or attribute definition clause is static.
  
  @node Program Unit Level Restrictions,,Partition-Wide Restrictions,Standard and Implementation Defined Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions program-unit-level-restrictions}@anchor{1ff}@anchor{gnat_rm/standard_and_implementation_defined_restrictions id3}@anchor{200}
  @section Program Unit Level Restrictions
  
  
--- 13212,13218 ----
  in a Storage_Size pragma or attribute definition clause is static.
  
  @node Program Unit Level Restrictions,,Partition-Wide Restrictions,Standard and Implementation Defined Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions program-unit-level-restrictions}@anchor{203}@anchor{gnat_rm/standard_and_implementation_defined_restrictions id3}@anchor{204}
  @section Program Unit Level Restrictions
  
  
*************** other compilation units in the partition
*** 13115,13121 ****
  @end menu
  
  @node No_Elaboration_Code,No_Dynamic_Sized_Objects,,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-elaboration-code}@anchor{201}
  @subsection No_Elaboration_Code
  
  
--- 13242,13248 ----
  @end menu
  
  @node No_Elaboration_Code,No_Dynamic_Sized_Objects,,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-elaboration-code}@anchor{205}
  @subsection No_Elaboration_Code
  
  
*************** associated with the unit. This counter i
*** 13171,13177 ****
  before elaboration and to control multiple elaboration attempts.
  
  @node No_Dynamic_Sized_Objects,No_Entry_Queue,No_Elaboration_Code,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dynamic-sized-objects}@anchor{202}
  @subsection No_Dynamic_Sized_Objects
  
  
--- 13298,13304 ----
  before elaboration and to control multiple elaboration attempts.
  
  @node No_Dynamic_Sized_Objects,No_Entry_Queue,No_Elaboration_Code,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dynamic-sized-objects}@anchor{206}
  @subsection No_Dynamic_Sized_Objects
  
  
*************** access discriminants. It is often a good
*** 13189,13195 ****
  with No_Secondary_Stack.
  
  @node No_Entry_Queue,No_Implementation_Aspect_Specifications,No_Dynamic_Sized_Objects,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-entry-queue}@anchor{203}
  @subsection No_Entry_Queue
  
  
--- 13316,13322 ----
  with No_Secondary_Stack.
  
  @node No_Entry_Queue,No_Implementation_Aspect_Specifications,No_Dynamic_Sized_Objects,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-entry-queue}@anchor{207}
  @subsection No_Entry_Queue
  
  
*************** checked at compile time.  A program exec
*** 13202,13208 ****
  is made to queue a second task on such an entry.
  
  @node No_Implementation_Aspect_Specifications,No_Implementation_Attributes,No_Entry_Queue,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-aspect-specifications}@anchor{204}
  @subsection No_Implementation_Aspect_Specifications
  
  
--- 13329,13335 ----
  is made to queue a second task on such an entry.
  
  @node No_Implementation_Aspect_Specifications,No_Implementation_Attributes,No_Entry_Queue,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-aspect-specifications}@anchor{208}
  @subsection No_Implementation_Aspect_Specifications
  
  
*************** GNAT-defined aspects are present.  With
*** 13213,13219 ****
  aspects that can be used are those defined in the Ada Reference Manual.
  
  @node No_Implementation_Attributes,No_Implementation_Identifiers,No_Implementation_Aspect_Specifications,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-attributes}@anchor{205}
  @subsection No_Implementation_Attributes
  
  
--- 13340,13346 ----
  aspects that can be used are those defined in the Ada Reference Manual.
  
  @node No_Implementation_Attributes,No_Implementation_Identifiers,No_Implementation_Aspect_Specifications,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-attributes}@anchor{209}
  @subsection No_Implementation_Attributes
  
  
*************** attributes that can be used are those de
*** 13225,13231 ****
  Manual.
  
  @node No_Implementation_Identifiers,No_Implementation_Pragmas,No_Implementation_Attributes,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-identifiers}@anchor{206}
  @subsection No_Implementation_Identifiers
  
  
--- 13352,13358 ----
  Manual.
  
  @node No_Implementation_Identifiers,No_Implementation_Pragmas,No_Implementation_Attributes,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-identifiers}@anchor{20a}
  @subsection No_Implementation_Identifiers
  
  
*************** implementation-defined identifiers (mark
*** 13236,13242 ****
  occur within language-defined packages.
  
  @node No_Implementation_Pragmas,No_Implementation_Restrictions,No_Implementation_Identifiers,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-pragmas}@anchor{207}
  @subsection No_Implementation_Pragmas
  
  
--- 13363,13369 ----
  occur within language-defined packages.
  
  @node No_Implementation_Pragmas,No_Implementation_Restrictions,No_Implementation_Identifiers,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-pragmas}@anchor{20b}
  @subsection No_Implementation_Pragmas
  
  
*************** GNAT-defined pragmas are present.  With
*** 13247,13253 ****
  pragmas that can be used are those defined in the Ada Reference Manual.
  
  @node No_Implementation_Restrictions,No_Implementation_Units,No_Implementation_Pragmas,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-restrictions}@anchor{208}
  @subsection No_Implementation_Restrictions
  
  
--- 13374,13380 ----
  pragmas that can be used are those defined in the Ada Reference Manual.
  
  @node No_Implementation_Restrictions,No_Implementation_Units,No_Implementation_Pragmas,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-restrictions}@anchor{20c}
  @subsection No_Implementation_Restrictions
  
  
*************** are present.  With this restriction, the
*** 13259,13265 ****
  that can be used are those defined in the Ada Reference Manual.
  
  @node No_Implementation_Units,No_Implicit_Aliasing,No_Implementation_Restrictions,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-units}@anchor{209}
  @subsection No_Implementation_Units
  
  
--- 13386,13392 ----
  that can be used are those defined in the Ada Reference Manual.
  
  @node No_Implementation_Units,No_Implicit_Aliasing,No_Implementation_Restrictions,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-units}@anchor{20d}
  @subsection No_Implementation_Units
  
  
*************** mention in the context clause of any imp
*** 13270,13276 ****
  of packages Ada, Interfaces, or System.
  
  @node No_Implicit_Aliasing,No_Implicit_Loops,No_Implementation_Units,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-aliasing}@anchor{20a}
  @subsection No_Implicit_Aliasing
  
  
--- 13397,13403 ----
  of packages Ada, Interfaces, or System.
  
  @node No_Implicit_Aliasing,No_Implicit_Loops,No_Implementation_Units,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-aliasing}@anchor{20e}
  @subsection No_Implicit_Aliasing
  
  
*************** to be aliased, and in such cases, it can
*** 13285,13291 ****
  the standard attribute Unchecked_Access which is preferable.
  
  @node No_Implicit_Loops,No_Obsolescent_Features,No_Implicit_Aliasing,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-loops}@anchor{20b}
  @subsection No_Implicit_Loops
  
  
--- 13412,13418 ----
  the standard attribute Unchecked_Access which is preferable.
  
  @node No_Implicit_Loops,No_Obsolescent_Features,No_Implicit_Aliasing,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-loops}@anchor{20f}
  @subsection No_Implicit_Loops
  
  
*************** arrays larger than about 5000 scalar com
*** 13302,13308 ****
  is set in the spec of a package, it will not apply to its body.
  
  @node No_Obsolescent_Features,No_Wide_Characters,No_Implicit_Loops,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-obsolescent-features}@anchor{20c}
  @subsection No_Obsolescent_Features
  
  
--- 13429,13435 ----
  is set in the spec of a package, it will not apply to its body.
  
  @node No_Obsolescent_Features,No_Wide_Characters,No_Implicit_Loops,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-obsolescent-features}@anchor{210}
  @subsection No_Obsolescent_Features
  
  
*************** is set in the spec of a package, it will
*** 13312,13318 ****
  features are used, as defined in Annex J of the Ada Reference Manual.
  
  @node No_Wide_Characters,Static_Dispatch_Tables,No_Obsolescent_Features,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-wide-characters}@anchor{20d}
  @subsection No_Wide_Characters
  
  
--- 13439,13445 ----
  features are used, as defined in Annex J of the Ada Reference Manual.
  
  @node No_Wide_Characters,Static_Dispatch_Tables,No_Obsolescent_Features,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions no-wide-characters}@anchor{211}
  @subsection No_Wide_Characters
  
  
*************** appear in the program (that is literals
*** 13326,13332 ****
  type @code{Character}).
  
  @node Static_Dispatch_Tables,SPARK_05,No_Wide_Characters,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions static-dispatch-tables}@anchor{20e}
  @subsection Static_Dispatch_Tables
  
  
--- 13453,13459 ----
  type @code{Character}).
  
  @node Static_Dispatch_Tables,SPARK_05,No_Wide_Characters,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions static-dispatch-tables}@anchor{212}
  @subsection Static_Dispatch_Tables
  
  
*************** type @code{Character}).
*** 13336,13342 ****
  associated with dispatch tables can be placed in read-only memory.
  
  @node SPARK_05,,Static_Dispatch_Tables,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions spark-05}@anchor{20f}
  @subsection SPARK_05
  
  
--- 13463,13469 ----
  associated with dispatch tables can be placed in read-only memory.
  
  @node SPARK_05,,Static_Dispatch_Tables,Program Unit Level Restrictions
! @anchor{gnat_rm/standard_and_implementation_defined_restrictions spark-05}@anchor{213}
  @subsection SPARK_05
  
  
*************** violations will be reported for construc
*** 13710,13716 ****
  instead of SPARK 2005.
  
  @node Implementation Advice,Implementation Defined Characteristics,Standard and Implementation Defined Restrictions,Top
! @anchor{gnat_rm/implementation_advice doc}@anchor{210}@anchor{gnat_rm/implementation_advice implementation-advice}@anchor{a}@anchor{gnat_rm/implementation_advice id1}@anchor{211}
  @chapter Implementation Advice
  
  
--- 13837,13843 ----
  instead of SPARK 2005.
  
  @node Implementation Advice,Implementation Defined Characteristics,Standard and Implementation Defined Restrictions,Top
! @anchor{gnat_rm/implementation_advice doc}@anchor{214}@anchor{gnat_rm/implementation_advice implementation-advice}@anchor{a}@anchor{gnat_rm/implementation_advice id1}@anchor{215}
  @chapter Implementation Advice
  
  
*************** case the text describes what GNAT does a
*** 13770,13776 ****
  * RM 13.9(14-17); Unchecked Conversion: RM 13 9 14-17 Unchecked Conversion. 
  * RM 13.11(23-25); Implicit Heap Usage: RM 13 11 23-25 Implicit Heap Usage. 
  * RM 13.11.2(17); Unchecked Deallocation: RM 13 11 2 17 Unchecked Deallocation. 
! * RM 13.13.2(17); Stream Oriented Attributes: RM 13 13 2 17 Stream Oriented Attributes. 
  * RM A.1(52); Names of Predefined Numeric Types: RM A 1 52 Names of Predefined Numeric Types. 
  * RM A.3.2(49); Ada.Characters.Handling: RM A 3 2 49 Ada Characters Handling. 
  * RM A.4.4(106); Bounded-Length String Handling: RM A 4 4 106 Bounded-Length String Handling. 
--- 13897,13903 ----
  * RM 13.9(14-17); Unchecked Conversion: RM 13 9 14-17 Unchecked Conversion. 
  * RM 13.11(23-25); Implicit Heap Usage: RM 13 11 23-25 Implicit Heap Usage. 
  * RM 13.11.2(17); Unchecked Deallocation: RM 13 11 2 17 Unchecked Deallocation. 
! * RM 13.13.2(1.6); Stream Oriented Attributes: RM 13 13 2 1 6 Stream Oriented Attributes. 
  * RM A.1(52); Names of Predefined Numeric Types: RM A 1 52 Names of Predefined Numeric Types. 
  * RM A.3.2(49); Ada.Characters.Handling: RM A 3 2 49 Ada Characters Handling. 
  * RM A.4.4(106); Bounded-Length String Handling: RM A 4 4 106 Bounded-Length String Handling. 
*************** case the text describes what GNAT does a
*** 13807,13813 ****
  @end menu
  
  @node RM 1 1 3 20 Error Detection,RM 1 1 3 31 Child Units,,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-1-1-3-20-error-detection}@anchor{212}
  @section RM 1.1.3(20): Error Detection
  
  
--- 13934,13940 ----
  @end menu
  
  @node RM 1 1 3 20 Error Detection,RM 1 1 3 31 Child Units,,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-1-1-3-20-error-detection}@anchor{216}
  @section RM 1.1.3(20): Error Detection
  
  
*************** or diagnosed at compile time.
*** 13824,13830 ****
  @geindex Child Units
  
  @node RM 1 1 3 31 Child Units,RM 1 1 5 12 Bounded Errors,RM 1 1 3 20 Error Detection,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-1-1-3-31-child-units}@anchor{213}
  @section RM 1.1.3(31): Child Units
  
  
--- 13951,13957 ----
  @geindex Child Units
  
  @node RM 1 1 3 31 Child Units,RM 1 1 5 12 Bounded Errors,RM 1 1 3 20 Error Detection,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-1-1-3-31-child-units}@anchor{217}
  @section RM 1.1.3(31): Child Units
  
  
*************** Followed.
*** 13840,13846 ****
  @geindex Bounded errors
  
  @node RM 1 1 5 12 Bounded Errors,RM 2 8 16 Pragmas,RM 1 1 3 31 Child Units,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-1-1-5-12-bounded-errors}@anchor{214}
  @section RM 1.1.5(12): Bounded Errors
  
  
--- 13967,13973 ----
  @geindex Bounded errors
  
  @node RM 1 1 5 12 Bounded Errors,RM 2 8 16 Pragmas,RM 1 1 3 31 Child Units,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-1-1-5-12-bounded-errors}@anchor{218}
  @section RM 1.1.5(12): Bounded Errors
  
  
*************** runtime.
*** 13857,13863 ****
  @geindex Pragmas
  
  @node RM 2 8 16 Pragmas,RM 2 8 17-19 Pragmas,RM 1 1 5 12 Bounded Errors,Implementation Advice
! @anchor{gnat_rm/implementation_advice id2}@anchor{215}@anchor{gnat_rm/implementation_advice rm-2-8-16-pragmas}@anchor{216}
  @section RM 2.8(16): Pragmas
  
  
--- 13984,13990 ----
  @geindex Pragmas
  
  @node RM 2 8 16 Pragmas,RM 2 8 17-19 Pragmas,RM 1 1 5 12 Bounded Errors,Implementation Advice
! @anchor{gnat_rm/implementation_advice id2}@anchor{219}@anchor{gnat_rm/implementation_advice rm-2-8-16-pragmas}@anchor{21a}
  @section RM 2.8(16): Pragmas
  
  
*************** that this advice not be followed.  For d
*** 13970,13976 ****
  @ref{7,,Implementation Defined Pragmas}.
  
  @node RM 2 8 17-19 Pragmas,RM 3 5 2 5 Alternative Character Sets,RM 2 8 16 Pragmas,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-2-8-17-19-pragmas}@anchor{217}
  @section RM 2.8(17-19): Pragmas
  
  
--- 14097,14103 ----
  @ref{7,,Implementation Defined Pragmas}.
  
  @node RM 2 8 17-19 Pragmas,RM 3 5 2 5 Alternative Character Sets,RM 2 8 16 Pragmas,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-2-8-17-19-pragmas}@anchor{21b}
  @section RM 2.8(17-19): Pragmas
  
  
*************** replacing @code{library_items}."
*** 13991,14004 ****
  @end itemize
  @end quotation
  
! See @ref{216,,RM 2.8(16); Pragmas}.
  
  @geindex Character Sets
  
  @geindex Alternative Character Sets
  
  @node RM 3 5 2 5 Alternative Character Sets,RM 3 5 4 28 Integer Types,RM 2 8 17-19 Pragmas,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-3-5-2-5-alternative-character-sets}@anchor{218}
  @section RM 3.5.2(5): Alternative Character Sets
  
  
--- 14118,14131 ----
  @end itemize
  @end quotation
  
! See @ref{21a,,RM 2.8(16); Pragmas}.
  
  @geindex Character Sets
  
  @geindex Alternative Character Sets
  
  @node RM 3 5 2 5 Alternative Character Sets,RM 3 5 4 28 Integer Types,RM 2 8 17-19 Pragmas,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-3-5-2-5-alternative-character-sets}@anchor{21c}
  @section RM 3.5.2(5): Alternative Character Sets
  
  
*************** there is no such restriction.
*** 14026,14032 ****
  @geindex Integer types
  
  @node RM 3 5 4 28 Integer Types,RM 3 5 4 29 Integer Types,RM 3 5 2 5 Alternative Character Sets,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-3-5-4-28-integer-types}@anchor{219}
  @section RM 3.5.4(28): Integer Types
  
  
--- 14153,14159 ----
  @geindex Integer types
  
  @node RM 3 5 4 28 Integer Types,RM 3 5 4 29 Integer Types,RM 3 5 2 5 Alternative Character Sets,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-3-5-4-28-integer-types}@anchor{21d}
  @section RM 3.5.4(28): Integer Types
  
  
*************** are supported for convenient interface t
*** 14045,14051 ****
  types of the machine are easily available.
  
  @node RM 3 5 4 29 Integer Types,RM 3 5 5 8 Enumeration Values,RM 3 5 4 28 Integer Types,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-3-5-4-29-integer-types}@anchor{21a}
  @section RM 3.5.4(29): Integer Types
  
  
--- 14172,14178 ----
  types of the machine are easily available.
  
  @node RM 3 5 4 29 Integer Types,RM 3 5 5 8 Enumeration Values,RM 3 5 4 28 Integer Types,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-3-5-4-29-integer-types}@anchor{21e}
  @section RM 3.5.4(29): Integer Types
  
  
*************** Followed.
*** 14061,14067 ****
  @geindex Enumeration values
  
  @node RM 3 5 5 8 Enumeration Values,RM 3 5 7 17 Float Types,RM 3 5 4 29 Integer Types,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-3-5-5-8-enumeration-values}@anchor{21b}
  @section RM 3.5.5(8): Enumeration Values
  
  
--- 14188,14194 ----
  @geindex Enumeration values
  
  @node RM 3 5 5 8 Enumeration Values,RM 3 5 7 17 Float Types,RM 3 5 4 29 Integer Types,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-3-5-5-8-enumeration-values}@anchor{21f}
  @section RM 3.5.5(8): Enumeration Values
  
  
*************** Followed.
*** 14081,14087 ****
  @geindex Float types
  
  @node RM 3 5 7 17 Float Types,RM 3 6 2 11 Multidimensional Arrays,RM 3 5 5 8 Enumeration Values,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-3-5-7-17-float-types}@anchor{21c}
  @section RM 3.5.7(17): Float Types
  
  
--- 14208,14214 ----
  @geindex Float types
  
  @node RM 3 5 7 17 Float Types,RM 3 6 2 11 Multidimensional Arrays,RM 3 5 5 8 Enumeration Values,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-3-5-7-17-float-types}@anchor{220}
  @section RM 3.5.7(17): Float Types
  
  
*************** since this is a software rather than a h
*** 14111,14117 ****
  @geindex multidimensional
  
  @node RM 3 6 2 11 Multidimensional Arrays,RM 9 6 30-31 Duration'Small,RM 3 5 7 17 Float Types,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-3-6-2-11-multidimensional-arrays}@anchor{21d}
  @section RM 3.6.2(11): Multidimensional Arrays
  
  
--- 14238,14244 ----
  @geindex multidimensional
  
  @node RM 3 6 2 11 Multidimensional Arrays,RM 9 6 30-31 Duration'Small,RM 3 5 7 17 Float Types,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-3-6-2-11-multidimensional-arrays}@anchor{221}
  @section RM 3.6.2(11): Multidimensional Arrays
  
  
*************** Followed.
*** 14129,14135 ****
  @geindex Duration'Small
  
  @node RM 9 6 30-31 Duration'Small,RM 10 2 1 12 Consistent Representation,RM 3 6 2 11 Multidimensional Arrays,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-9-6-30-31-duration-small}@anchor{21e}
  @section RM 9.6(30-31): Duration'Small
  
  
--- 14256,14262 ----
  @geindex Duration'Small
  
  @node RM 9 6 30-31 Duration'Small,RM 10 2 1 12 Consistent Representation,RM 3 6 2 11 Multidimensional Arrays,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-9-6-30-31-duration-small}@anchor{222}
  @section RM 9.6(30-31): Duration'Small
  
  
*************** it need not be the same time base as use
*** 14150,14156 ****
  Followed.
  
  @node RM 10 2 1 12 Consistent Representation,RM 11 4 1 19 Exception Information,RM 9 6 30-31 Duration'Small,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-10-2-1-12-consistent-representation}@anchor{21f}
  @section RM 10.2.1(12): Consistent Representation
  
  
--- 14277,14283 ----
  Followed.
  
  @node RM 10 2 1 12 Consistent Representation,RM 11 4 1 19 Exception Information,RM 9 6 30-31 Duration'Small,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-10-2-1-12-consistent-representation}@anchor{223}
  @section RM 10.2.1(12): Consistent Representation
  
  
*************** advice without severely impacting effici
*** 14172,14178 ****
  @geindex Exception information
  
  @node RM 11 4 1 19 Exception Information,RM 11 5 28 Suppression of Checks,RM 10 2 1 12 Consistent Representation,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-11-4-1-19-exception-information}@anchor{220}
  @section RM 11.4.1(19): Exception Information
  
  
--- 14299,14305 ----
  @geindex Exception information
  
  @node RM 11 4 1 19 Exception Information,RM 11 5 28 Suppression of Checks,RM 10 2 1 12 Consistent Representation,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-11-4-1-19-exception-information}@anchor{224}
  @section RM 11.4.1(19): Exception Information
  
  
*************** Pragma @code{Discard_Names}.
*** 14203,14209 ****
  @geindex suppression of
  
  @node RM 11 5 28 Suppression of Checks,RM 13 1 21-24 Representation Clauses,RM 11 4 1 19 Exception Information,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-11-5-28-suppression-of-checks}@anchor{221}
  @section RM 11.5(28): Suppression of Checks
  
  
--- 14330,14336 ----
  @geindex suppression of
  
  @node RM 11 5 28 Suppression of Checks,RM 13 1 21-24 Representation Clauses,RM 11 4 1 19 Exception Information,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-11-5-28-suppression-of-checks}@anchor{225}
  @section RM 11.5(28): Suppression of Checks
  
  
*************** Followed.
*** 14218,14224 ****
  @geindex Representation clauses
  
  @node RM 13 1 21-24 Representation Clauses,RM 13 2 6-8 Packed Types,RM 11 5 28 Suppression of Checks,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-1-21-24-representation-clauses}@anchor{222}
  @section RM 13.1 (21-24): Representation Clauses
  
  
--- 14345,14351 ----
  @geindex Representation clauses
  
  @node RM 13 1 21-24 Representation Clauses,RM 13 2 6-8 Packed Types,RM 11 5 28 Suppression of Checks,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-1-21-24-representation-clauses}@anchor{226}
  @section RM 13.1 (21-24): Representation Clauses
  
  
*************** Followed.
*** 14267,14273 ****
  @geindex Packed types
  
  @node RM 13 2 6-8 Packed Types,RM 13 3 14-19 Address Clauses,RM 13 1 21-24 Representation Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-2-6-8-packed-types}@anchor{223}
  @section RM 13.2(6-8): Packed Types
  
  
--- 14394,14400 ----
  @geindex Packed types
  
  @node RM 13 2 6-8 Packed Types,RM 13 3 14-19 Address Clauses,RM 13 1 21-24 Representation Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-2-6-8-packed-types}@anchor{227}
  @section RM 13.2(6-8): Packed Types
  
  
*************** Followed.
*** 14306,14312 ****
  @geindex Address clauses
  
  @node RM 13 3 14-19 Address Clauses,RM 13 3 29-35 Alignment Clauses,RM 13 2 6-8 Packed Types,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-3-14-19-address-clauses}@anchor{224}
  @section RM 13.3(14-19): Address Clauses
  
  
--- 14433,14439 ----
  @geindex Address clauses
  
  @node RM 13 3 14-19 Address Clauses,RM 13 3 29-35 Alignment Clauses,RM 13 2 6-8 Packed Types,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-3-14-19-address-clauses}@anchor{228}
  @section RM 13.3(14-19): Address Clauses
  
  
*************** Followed.
*** 14359,14365 ****
  @geindex Alignment clauses
  
  @node RM 13 3 29-35 Alignment Clauses,RM 13 3 42-43 Size Clauses,RM 13 3 14-19 Address Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-3-29-35-alignment-clauses}@anchor{225}
  @section RM 13.3(29-35): Alignment Clauses
  
  
--- 14486,14492 ----
  @geindex Alignment clauses
  
  @node RM 13 3 29-35 Alignment Clauses,RM 13 3 42-43 Size Clauses,RM 13 3 14-19 Address Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-3-29-35-alignment-clauses}@anchor{229}
  @section RM 13.3(29-35): Alignment Clauses
  
  
*************** Followed.
*** 14416,14422 ****
  @geindex Size clauses
  
  @node RM 13 3 42-43 Size Clauses,RM 13 3 50-56 Size Clauses,RM 13 3 29-35 Alignment Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-3-42-43-size-clauses}@anchor{226}
  @section RM 13.3(42-43): Size Clauses
  
  
--- 14543,14549 ----
  @geindex Size clauses
  
  @node RM 13 3 42-43 Size Clauses,RM 13 3 50-56 Size Clauses,RM 13 3 29-35 Alignment Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-3-42-43-size-clauses}@anchor{22a}
  @section RM 13.3(42-43): Size Clauses
  
  
*************** object's @code{Alignment} (if the @code{
*** 14434,14440 ****
  Followed.
  
  @node RM 13 3 50-56 Size Clauses,RM 13 3 71-73 Component Size Clauses,RM 13 3 42-43 Size Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-3-50-56-size-clauses}@anchor{227}
  @section RM 13.3(50-56): Size Clauses
  
  
--- 14561,14567 ----
  Followed.
  
  @node RM 13 3 50-56 Size Clauses,RM 13 3 71-73 Component Size Clauses,RM 13 3 42-43 Size Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-3-50-56-size-clauses}@anchor{22b}
  @section RM 13.3(50-56): Size Clauses
  
  
*************** Followed.
*** 14485,14491 ****
  @geindex Component_Size clauses
  
  @node RM 13 3 71-73 Component Size Clauses,RM 13 4 9-10 Enumeration Representation Clauses,RM 13 3 50-56 Size Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-3-71-73-component-size-clauses}@anchor{228}
  @section RM 13.3(71-73): Component Size Clauses
  
  
--- 14612,14618 ----
  @geindex Component_Size clauses
  
  @node RM 13 3 71-73 Component Size Clauses,RM 13 4 9-10 Enumeration Representation Clauses,RM 13 3 50-56 Size Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-3-71-73-component-size-clauses}@anchor{22c}
  @section RM 13.3(71-73): Component Size Clauses
  
  
*************** Followed.
*** 14519,14525 ****
  @geindex enumeration
  
  @node RM 13 4 9-10 Enumeration Representation Clauses,RM 13 5 1 17-22 Record Representation Clauses,RM 13 3 71-73 Component Size Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-4-9-10-enumeration-representation-clauses}@anchor{229}
  @section RM 13.4(9-10): Enumeration Representation Clauses
  
  
--- 14646,14652 ----
  @geindex enumeration
  
  @node RM 13 4 9-10 Enumeration Representation Clauses,RM 13 5 1 17-22 Record Representation Clauses,RM 13 3 71-73 Component Size Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-4-9-10-enumeration-representation-clauses}@anchor{22d}
  @section RM 13.4(9-10): Enumeration Representation Clauses
  
  
*************** Followed.
*** 14541,14547 ****
  @geindex records
  
  @node RM 13 5 1 17-22 Record Representation Clauses,RM 13 5 2 5 Storage Place Attributes,RM 13 4 9-10 Enumeration Representation Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-5-1-17-22-record-representation-clauses}@anchor{22a}
  @section RM 13.5.1(17-22): Record Representation Clauses
  
  
--- 14668,14674 ----
  @geindex records
  
  @node RM 13 5 1 17-22 Record Representation Clauses,RM 13 5 2 5 Storage Place Attributes,RM 13 4 9-10 Enumeration Representation Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-5-1-17-22-record-representation-clauses}@anchor{22e}
  @section RM 13.5.1(17-22): Record Representation Clauses
  
  
*************** and all mentioned features are implement
*** 14601,14607 ****
  @geindex Storage place attributes
  
  @node RM 13 5 2 5 Storage Place Attributes,RM 13 5 3 7-8 Bit Ordering,RM 13 5 1 17-22 Record Representation Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-5-2-5-storage-place-attributes}@anchor{22b}
  @section RM 13.5.2(5): Storage Place Attributes
  
  
--- 14728,14734 ----
  @geindex Storage place attributes
  
  @node RM 13 5 2 5 Storage Place Attributes,RM 13 5 3 7-8 Bit Ordering,RM 13 5 1 17-22 Record Representation Clauses,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-5-2-5-storage-place-attributes}@anchor{22f}
  @section RM 13.5.2(5): Storage Place Attributes
  
  
*************** Followed.  There are no such components
*** 14621,14627 ****
  @geindex Bit ordering
  
  @node RM 13 5 3 7-8 Bit Ordering,RM 13 7 37 Address as Private,RM 13 5 2 5 Storage Place Attributes,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-5-3-7-8-bit-ordering}@anchor{22c}
  @section RM 13.5.3(7-8): Bit Ordering
  
  
--- 14748,14754 ----
  @geindex Bit ordering
  
  @node RM 13 5 3 7-8 Bit Ordering,RM 13 7 37 Address as Private,RM 13 5 2 5 Storage Place Attributes,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-5-3-7-8-bit-ordering}@anchor{230}
  @section RM 13.5.3(7-8): Bit Ordering
  
  
*************** Thus non-default bit ordering is not sup
*** 14641,14647 ****
  @geindex as private type
  
  @node RM 13 7 37 Address as Private,RM 13 7 1 16 Address Operations,RM 13 5 3 7-8 Bit Ordering,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-7-37-address-as-private}@anchor{22d}
  @section RM 13.7(37): Address as Private
  
  
--- 14768,14774 ----
  @geindex as private type
  
  @node RM 13 7 37 Address as Private,RM 13 7 1 16 Address Operations,RM 13 5 3 7-8 Bit Ordering,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-7-37-address-as-private}@anchor{231}
  @section RM 13.7(37): Address as Private
  
  
*************** Followed.
*** 14659,14665 ****
  @geindex operations of
  
  @node RM 13 7 1 16 Address Operations,RM 13 9 14-17 Unchecked Conversion,RM 13 7 37 Address as Private,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-7-1-16-address-operations}@anchor{22e}
  @section RM 13.7.1(16): Address Operations
  
  
--- 14786,14792 ----
  @geindex operations of
  
  @node RM 13 7 1 16 Address Operations,RM 13 9 14-17 Unchecked Conversion,RM 13 7 37 Address as Private,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-7-1-16-address-operations}@anchor{232}
  @section RM 13.7.1(16): Address Operations
  
  
*************** operation raises @code{Program_Error}, s
*** 14677,14683 ****
  @geindex Unchecked conversion
  
  @node RM 13 9 14-17 Unchecked Conversion,RM 13 11 23-25 Implicit Heap Usage,RM 13 7 1 16 Address Operations,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-9-14-17-unchecked-conversion}@anchor{22f}
  @section RM 13.9(14-17): Unchecked Conversion
  
  
--- 14804,14810 ----
  @geindex Unchecked conversion
  
  @node RM 13 9 14-17 Unchecked Conversion,RM 13 11 23-25 Implicit Heap Usage,RM 13 7 1 16 Address Operations,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-9-14-17-unchecked-conversion}@anchor{233}
  @section RM 13.9(14-17): Unchecked Conversion
  
  
*************** Followed.
*** 14721,14727 ****
  @geindex implicit
  
  @node RM 13 11 23-25 Implicit Heap Usage,RM 13 11 2 17 Unchecked Deallocation,RM 13 9 14-17 Unchecked Conversion,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-11-23-25-implicit-heap-usage}@anchor{230}
  @section RM 13.11(23-25): Implicit Heap Usage
  
  
--- 14848,14854 ----
  @geindex implicit
  
  @node RM 13 11 23-25 Implicit Heap Usage,RM 13 11 2 17 Unchecked Deallocation,RM 13 9 14-17 Unchecked Conversion,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-11-23-25-implicit-heap-usage}@anchor{234}
  @section RM 13.11(23-25): Implicit Heap Usage
  
  
*************** Followed.
*** 14771,14778 ****
  
  @geindex Unchecked deallocation
  
! @node RM 13 11 2 17 Unchecked Deallocation,RM 13 13 2 17 Stream Oriented Attributes,RM 13 11 23-25 Implicit Heap Usage,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-11-2-17-unchecked-deallocation}@anchor{231}
  @section RM 13.11.2(17): Unchecked Deallocation
  
  
--- 14898,14905 ----
  
  @geindex Unchecked deallocation
  
! @node RM 13 11 2 17 Unchecked Deallocation,RM 13 13 2 1 6 Stream Oriented Attributes,RM 13 11 23-25 Implicit Heap Usage,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-11-2-17-unchecked-deallocation}@anchor{235}
  @section RM 13.11.2(17): Unchecked Deallocation
  
  
*************** Followed.
*** 14786,14813 ****
  
  @geindex Stream oriented attributes
  
! @node RM 13 13 2 17 Stream Oriented Attributes,RM A 1 52 Names of Predefined Numeric Types,RM 13 11 2 17 Unchecked Deallocation,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-13-2-17-stream-oriented-attributes}@anchor{232}
! @section RM 13.13.2(17): Stream Oriented Attributes
  
  
  @quotation
  
! "If a stream element is the same size as a storage element, then the
! normal in-memory representation should be used by @code{Read} and
! @code{Write} for scalar objects.  Otherwise, @code{Read} and @code{Write}
! should use the smallest number of stream elements needed to represent
! all values in the base range of the scalar type."
  @end quotation
  
! Followed.  By default, GNAT uses the interpretation suggested by AI-195,
! which specifies using the size of the first subtype.
  However, such an implementation is based on direct binary
! representations and is therefore target- and endianness-dependent.
! To address this issue, GNAT also supplies an alternate implementation
! of the stream attributes @code{Read} and @code{Write},
! which uses the target-independent XDR standard representation
! for scalar types.
  
  @geindex XDR representation
  
--- 14913,14940 ----
  
  @geindex Stream oriented attributes
  
! @node RM 13 13 2 1 6 Stream Oriented Attributes,RM A 1 52 Names of Predefined Numeric Types,RM 13 11 2 17 Unchecked Deallocation,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-13-13-2-1-6-stream-oriented-attributes}@anchor{236}
! @section RM 13.13.2(1.6): Stream Oriented Attributes
  
  
  @quotation
  
! "If not specified, the value of Stream_Size for an elementary type
! should be the number of bits that corresponds to the minimum number of
! stream elements required by the first subtype of the type, rounded up
! to the nearest factor or multiple of the word size that is also a
! multiple of the stream element size."
  @end quotation
  
! Followed, except that the number of stream elements is a power of 2.
! The Stream_Size may be used to override the default choice.
! 
  However, such an implementation is based on direct binary
! representations and is therefore target- and endianness-dependent.  To
! address this issue, GNAT also supplies an alternate implementation of
! the stream attributes @code{Read} and @code{Write}, which uses the
! target-independent XDR standard representation for scalar types.
  
  @geindex XDR representation
  
*************** Rebuild the GNAT run-time library as doc
*** 14841,14848 ****
  the @emph{GNAT and Libraries} section of the @cite{GNAT User's Guide}.
  @end itemize
  
! @node RM A 1 52 Names of Predefined Numeric Types,RM A 3 2 49 Ada Characters Handling,RM 13 13 2 17 Stream Oriented Attributes,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-a-1-52-names-of-predefined-numeric-types}@anchor{233}
  @section RM A.1(52): Names of Predefined Numeric Types
  
  
--- 14968,14975 ----
  the @emph{GNAT and Libraries} section of the @cite{GNAT User's Guide}.
  @end itemize
  
! @node RM A 1 52 Names of Predefined Numeric Types,RM A 3 2 49 Ada Characters Handling,RM 13 13 2 1 6 Stream Oriented Attributes,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-a-1-52-names-of-predefined-numeric-types}@anchor{237}
  @section RM A.1(52): Names of Predefined Numeric Types
  
  
*************** Followed.
*** 14860,14866 ****
  @geindex Ada.Characters.Handling
  
  @node RM A 3 2 49 Ada Characters Handling,RM A 4 4 106 Bounded-Length String Handling,RM A 1 52 Names of Predefined Numeric Types,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-a-3-2-49-ada-characters-handling}@anchor{234}
  @section RM A.3.2(49): @code{Ada.Characters.Handling}
  
  
--- 14987,14993 ----
  @geindex Ada.Characters.Handling
  
  @node RM A 3 2 49 Ada Characters Handling,RM A 4 4 106 Bounded-Length String Handling,RM A 1 52 Names of Predefined Numeric Types,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-a-3-2-49-ada-characters-handling}@anchor{238}
  @section RM A.3.2(49): @code{Ada.Characters.Handling}
  
  
*************** Followed.  GNAT provides no such localiz
*** 14877,14883 ****
  @geindex Bounded-length strings
  
  @node RM A 4 4 106 Bounded-Length String Handling,RM A 5 2 46-47 Random Number Generation,RM A 3 2 49 Ada Characters Handling,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-a-4-4-106-bounded-length-string-handling}@anchor{235}
  @section RM A.4.4(106): Bounded-Length String Handling
  
  
--- 15004,15010 ----
  @geindex Bounded-length strings
  
  @node RM A 4 4 106 Bounded-Length String Handling,RM A 5 2 46-47 Random Number Generation,RM A 3 2 49 Ada Characters Handling,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-a-4-4-106-bounded-length-string-handling}@anchor{239}
  @section RM A.4.4(106): Bounded-Length String Handling
  
  
*************** Followed.  No implicit pointers or dynam
*** 14892,14898 ****
  @geindex Random number generation
  
  @node RM A 5 2 46-47 Random Number Generation,RM A 10 7 23 Get_Immediate,RM A 4 4 106 Bounded-Length String Handling,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-a-5-2-46-47-random-number-generation}@anchor{236}
  @section RM A.5.2(46-47): Random Number Generation
  
  
--- 15019,15025 ----
  @geindex Random number generation
  
  @node RM A 5 2 46-47 Random Number Generation,RM A 10 7 23 Get_Immediate,RM A 4 4 106 Bounded-Length String Handling,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-a-5-2-46-47-random-number-generation}@anchor{23a}
  @section RM A.5.2(46-47): Random Number Generation
  
  
*************** condition here to hold true.
*** 14921,14927 ****
  @geindex Get_Immediate
  
  @node RM A 10 7 23 Get_Immediate,RM B 1 39-41 Pragma Export,RM A 5 2 46-47 Random Number Generation,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-a-10-7-23-get-immediate}@anchor{237}
  @section RM A.10.7(23): @code{Get_Immediate}
  
  
--- 15048,15054 ----
  @geindex Get_Immediate
  
  @node RM A 10 7 23 Get_Immediate,RM B 1 39-41 Pragma Export,RM A 5 2 46-47 Random Number Generation,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-a-10-7-23-get-immediate}@anchor{23b}
  @section RM A.10.7(23): @code{Get_Immediate}
  
  
*************** this functionality.
*** 14945,14951 ****
  @geindex Export
  
  @node RM B 1 39-41 Pragma Export,RM B 2 12-13 Package Interfaces,RM A 10 7 23 Get_Immediate,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-b-1-39-41-pragma-export}@anchor{238}
  @section RM B.1(39-41): Pragma @code{Export}
  
  
--- 15072,15078 ----
  @geindex Export
  
  @node RM B 1 39-41 Pragma Export,RM B 2 12-13 Package Interfaces,RM A 10 7 23 Get_Immediate,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-b-1-39-41-pragma-export}@anchor{23c}
  @section RM B.1(39-41): Pragma @code{Export}
  
  
*************** Followed.
*** 14993,14999 ****
  @geindex Interfaces
  
  @node RM B 2 12-13 Package Interfaces,RM B 3 63-71 Interfacing with C,RM B 1 39-41 Pragma Export,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-b-2-12-13-package-interfaces}@anchor{239}
  @section RM B.2(12-13): Package @code{Interfaces}
  
  
--- 15120,15126 ----
  @geindex Interfaces
  
  @node RM B 2 12-13 Package Interfaces,RM B 3 63-71 Interfacing with C,RM B 1 39-41 Pragma Export,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-b-2-12-13-package-interfaces}@anchor{23d}
  @section RM B.2(12-13): Package @code{Interfaces}
  
  
*************** Followed.  GNAT provides all the package
*** 15023,15029 ****
  @geindex interfacing with
  
  @node RM B 3 63-71 Interfacing with C,RM B 4 95-98 Interfacing with COBOL,RM B 2 12-13 Package Interfaces,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-b-3-63-71-interfacing-with-c}@anchor{23a}
  @section RM B.3(63-71): Interfacing with C
  
  
--- 15150,15156 ----
  @geindex interfacing with
  
  @node RM B 3 63-71 Interfacing with C,RM B 4 95-98 Interfacing with COBOL,RM B 2 12-13 Package Interfaces,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-b-3-63-71-interfacing-with-c}@anchor{23e}
  @section RM B.3(63-71): Interfacing with C
  
  
*************** Followed.
*** 15111,15117 ****
  @geindex interfacing with
  
  @node RM B 4 95-98 Interfacing with COBOL,RM B 5 22-26 Interfacing with Fortran,RM B 3 63-71 Interfacing with C,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-b-4-95-98-interfacing-with-cobol}@anchor{23b}
  @section RM B.4(95-98): Interfacing with COBOL
  
  
--- 15238,15244 ----
  @geindex interfacing with
  
  @node RM B 4 95-98 Interfacing with COBOL,RM B 5 22-26 Interfacing with Fortran,RM B 3 63-71 Interfacing with C,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-b-4-95-98-interfacing-with-cobol}@anchor{23f}
  @section RM B.4(95-98): Interfacing with COBOL
  
  
*************** Followed.
*** 15152,15158 ****
  @geindex interfacing with
  
  @node RM B 5 22-26 Interfacing with Fortran,RM C 1 3-5 Access to Machine Operations,RM B 4 95-98 Interfacing with COBOL,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-b-5-22-26-interfacing-with-fortran}@anchor{23c}
  @section RM B.5(22-26): Interfacing with Fortran
  
  
--- 15279,15285 ----
  @geindex interfacing with
  
  @node RM B 5 22-26 Interfacing with Fortran,RM C 1 3-5 Access to Machine Operations,RM B 4 95-98 Interfacing with COBOL,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-b-5-22-26-interfacing-with-fortran}@anchor{240}
  @section RM B.5(22-26): Interfacing with Fortran
  
  
*************** Followed.
*** 15203,15209 ****
  @geindex Machine operations
  
  @node RM C 1 3-5 Access to Machine Operations,RM C 1 10-16 Access to Machine Operations,RM B 5 22-26 Interfacing with Fortran,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-1-3-5-access-to-machine-operations}@anchor{23d}
  @section RM C.1(3-5): Access to Machine Operations
  
  
--- 15330,15336 ----
  @geindex Machine operations
  
  @node RM C 1 3-5 Access to Machine Operations,RM C 1 10-16 Access to Machine Operations,RM B 5 22-26 Interfacing with Fortran,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-1-3-5-access-to-machine-operations}@anchor{241}
  @section RM C.1(3-5): Access to Machine Operations
  
  
*************** object that is specified as exported."
*** 15238,15244 ****
  Followed.
  
  @node RM C 1 10-16 Access to Machine Operations,RM C 3 28 Interrupt Support,RM C 1 3-5 Access to Machine Operations,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-1-10-16-access-to-machine-operations}@anchor{23e}
  @section RM C.1(10-16): Access to Machine Operations
  
  
--- 15365,15371 ----
  Followed.
  
  @node RM C 1 10-16 Access to Machine Operations,RM C 3 28 Interrupt Support,RM C 1 3-5 Access to Machine Operations,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-1-10-16-access-to-machine-operations}@anchor{242}
  @section RM C.1(10-16): Access to Machine Operations
  
  
*************** Followed on any target supporting such o
*** 15299,15305 ****
  @geindex Interrupt support
  
  @node RM C 3 28 Interrupt Support,RM C 3 1 20-21 Protected Procedure Handlers,RM C 1 10-16 Access to Machine Operations,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-3-28-interrupt-support}@anchor{23f}
  @section RM C.3(28): Interrupt Support
  
  
--- 15426,15432 ----
  @geindex Interrupt support
  
  @node RM C 3 28 Interrupt Support,RM C 3 1 20-21 Protected Procedure Handlers,RM C 1 10-16 Access to Machine Operations,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-3-28-interrupt-support}@anchor{243}
  @section RM C.3(28): Interrupt Support
  
  
*************** of interrupt blocking.
*** 15317,15323 ****
  @geindex Protected procedure handlers
  
  @node RM C 3 1 20-21 Protected Procedure Handlers,RM C 3 2 25 Package Interrupts,RM C 3 28 Interrupt Support,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-3-1-20-21-protected-procedure-handlers}@anchor{240}
  @section RM C.3.1(20-21): Protected Procedure Handlers
  
  
--- 15444,15450 ----
  @geindex Protected procedure handlers
  
  @node RM C 3 1 20-21 Protected Procedure Handlers,RM C 3 2 25 Package Interrupts,RM C 3 28 Interrupt Support,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-3-1-20-21-protected-procedure-handlers}@anchor{244}
  @section RM C.3.1(20-21): Protected Procedure Handlers
  
  
*************** Followed.  Compile time warnings are giv
*** 15343,15349 ****
  @geindex Interrupts
  
  @node RM C 3 2 25 Package Interrupts,RM C 4 14 Pre-elaboration Requirements,RM C 3 1 20-21 Protected Procedure Handlers,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-3-2-25-package-interrupts}@anchor{241}
  @section RM C.3.2(25): Package @code{Interrupts}
  
  
--- 15470,15476 ----
  @geindex Interrupts
  
  @node RM C 3 2 25 Package Interrupts,RM C 4 14 Pre-elaboration Requirements,RM C 3 1 20-21 Protected Procedure Handlers,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-3-2-25-package-interrupts}@anchor{245}
  @section RM C.3.2(25): Package @code{Interrupts}
  
  
*************** Followed.
*** 15361,15367 ****
  @geindex Pre-elaboration requirements
  
  @node RM C 4 14 Pre-elaboration Requirements,RM C 5 8 Pragma Discard_Names,RM C 3 2 25 Package Interrupts,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-4-14-pre-elaboration-requirements}@anchor{242}
  @section RM C.4(14): Pre-elaboration Requirements
  
  
--- 15488,15494 ----
  @geindex Pre-elaboration requirements
  
  @node RM C 4 14 Pre-elaboration Requirements,RM C 5 8 Pragma Discard_Names,RM C 3 2 25 Package Interrupts,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-4-14-pre-elaboration-requirements}@anchor{246}
  @section RM C.4(14): Pre-elaboration Requirements
  
  
*************** Followed.  Executable code is generated
*** 15377,15383 ****
  to initialize large arrays.
  
  @node RM C 5 8 Pragma Discard_Names,RM C 7 2 30 The Package Task_Attributes,RM C 4 14 Pre-elaboration Requirements,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-5-8-pragma-discard-names}@anchor{243}
  @section RM C.5(8): Pragma @code{Discard_Names}
  
  
--- 15504,15510 ----
  to initialize large arrays.
  
  @node RM C 5 8 Pragma Discard_Names,RM C 7 2 30 The Package Task_Attributes,RM C 4 14 Pre-elaboration Requirements,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-5-8-pragma-discard-names}@anchor{247}
  @section RM C.5(8): Pragma @code{Discard_Names}
  
  
*************** Followed.
*** 15395,15401 ****
  @geindex Task_Attributes
  
  @node RM C 7 2 30 The Package Task_Attributes,RM D 3 17 Locking Policies,RM C 5 8 Pragma Discard_Names,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-7-2-30-the-package-task-attributes}@anchor{244}
  @section RM C.7.2(30): The Package Task_Attributes
  
  
--- 15522,15528 ----
  @geindex Task_Attributes
  
  @node RM C 7 2 30 The Package Task_Attributes,RM D 3 17 Locking Policies,RM C 5 8 Pragma Discard_Names,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-c-7-2-30-the-package-task-attributes}@anchor{248}
  @section RM C.7.2(30): The Package Task_Attributes
  
  
*************** Not followed.  This implementation is no
*** 15416,15422 ****
  @geindex Locking Policies
  
  @node RM D 3 17 Locking Policies,RM D 4 16 Entry Queuing Policies,RM C 7 2 30 The Package Task_Attributes,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-d-3-17-locking-policies}@anchor{245}
  @section RM D.3(17): Locking Policies
  
  
--- 15543,15549 ----
  @geindex Locking Policies
  
  @node RM D 3 17 Locking Policies,RM D 4 16 Entry Queuing Policies,RM C 7 2 30 The Package Task_Attributes,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-d-3-17-locking-policies}@anchor{249}
  @section RM D.3(17): Locking Policies
  
  
*************** whose names (@code{Inheritance_Locking}
*** 15433,15439 ****
  @geindex Entry queuing policies
  
  @node RM D 4 16 Entry Queuing Policies,RM D 6 9-10 Preemptive Abort,RM D 3 17 Locking Policies,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-d-4-16-entry-queuing-policies}@anchor{246}
  @section RM D.4(16): Entry Queuing Policies
  
  
--- 15560,15566 ----
  @geindex Entry queuing policies
  
  @node RM D 4 16 Entry Queuing Policies,RM D 6 9-10 Preemptive Abort,RM D 3 17 Locking Policies,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-d-4-16-entry-queuing-policies}@anchor{24a}
  @section RM D.4(16): Entry Queuing Policies
  
  
*************** Followed.  No such implementation-define
*** 15448,15454 ****
  @geindex Preemptive abort
  
  @node RM D 6 9-10 Preemptive Abort,RM D 7 21 Tasking Restrictions,RM D 4 16 Entry Queuing Policies,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-d-6-9-10-preemptive-abort}@anchor{247}
  @section RM D.6(9-10): Preemptive Abort
  
  
--- 15575,15581 ----
  @geindex Preemptive abort
  
  @node RM D 6 9-10 Preemptive Abort,RM D 7 21 Tasking Restrictions,RM D 4 16 Entry Queuing Policies,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-d-6-9-10-preemptive-abort}@anchor{24b}
  @section RM D.6(9-10): Preemptive Abort
  
  
*************** Followed.
*** 15474,15480 ****
  @geindex Tasking restrictions
  
  @node RM D 7 21 Tasking Restrictions,RM D 8 47-49 Monotonic Time,RM D 6 9-10 Preemptive Abort,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-d-7-21-tasking-restrictions}@anchor{248}
  @section RM D.7(21): Tasking Restrictions
  
  
--- 15601,15607 ----
  @geindex Tasking restrictions
  
  @node RM D 7 21 Tasking Restrictions,RM D 8 47-49 Monotonic Time,RM D 6 9-10 Preemptive Abort,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-d-7-21-tasking-restrictions}@anchor{24c}
  @section RM D.7(21): Tasking Restrictions
  
  
*************** pragma @code{Profile (Restricted)} for m
*** 15493,15499 ****
  @geindex monotonic
  
  @node RM D 8 47-49 Monotonic Time,RM E 5 28-29 Partition Communication Subsystem,RM D 7 21 Tasking Restrictions,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-d-8-47-49-monotonic-time}@anchor{249}
  @section RM D.8(47-49): Monotonic Time
  
  
--- 15620,15626 ----
  @geindex monotonic
  
  @node RM D 8 47-49 Monotonic Time,RM E 5 28-29 Partition Communication Subsystem,RM D 7 21 Tasking Restrictions,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-d-8-47-49-monotonic-time}@anchor{24d}
  @section RM D.8(47-49): Monotonic Time
  
  
*************** Followed.
*** 15528,15534 ****
  @geindex PCS
  
  @node RM E 5 28-29 Partition Communication Subsystem,RM F 7 COBOL Support,RM D 8 47-49 Monotonic Time,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-e-5-28-29-partition-communication-subsystem}@anchor{24a}
  @section RM E.5(28-29): Partition Communication Subsystem
  
  
--- 15655,15661 ----
  @geindex PCS
  
  @node RM E 5 28-29 Partition Communication Subsystem,RM F 7 COBOL Support,RM D 8 47-49 Monotonic Time,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-e-5-28-29-partition-communication-subsystem}@anchor{24e}
  @section RM E.5(28-29): Partition Communication Subsystem
  
  
*************** GNAT.
*** 15556,15562 ****
  @geindex COBOL support
  
  @node RM F 7 COBOL Support,RM F 1 2 Decimal Radix Support,RM E 5 28-29 Partition Communication Subsystem,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-f-7-cobol-support}@anchor{24b}
  @section RM F(7): COBOL Support
  
  
--- 15683,15689 ----
  @geindex COBOL support
  
  @node RM F 7 COBOL Support,RM F 1 2 Decimal Radix Support,RM E 5 28-29 Partition Communication Subsystem,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-f-7-cobol-support}@anchor{24f}
  @section RM F(7): COBOL Support
  
  
*************** Followed.
*** 15576,15582 ****
  @geindex Decimal radix support
  
  @node RM F 1 2 Decimal Radix Support,RM G Numerics,RM F 7 COBOL Support,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-f-1-2-decimal-radix-support}@anchor{24c}
  @section RM F.1(2): Decimal Radix Support
  
  
--- 15703,15709 ----
  @geindex Decimal radix support
  
  @node RM F 1 2 Decimal Radix Support,RM G Numerics,RM F 7 COBOL Support,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-f-1-2-decimal-radix-support}@anchor{250}
  @section RM F.1(2): Decimal Radix Support
  
  
*************** representations.
*** 15592,15598 ****
  @geindex Numerics
  
  @node RM G Numerics,RM G 1 1 56-58 Complex Types,RM F 1 2 Decimal Radix Support,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-g-numerics}@anchor{24d}
  @section RM G: Numerics
  
  
--- 15719,15725 ----
  @geindex Numerics
  
  @node RM G Numerics,RM G 1 1 56-58 Complex Types,RM F 1 2 Decimal Radix Support,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-g-numerics}@anchor{251}
  @section RM G: Numerics
  
  
*************** Followed.
*** 15612,15618 ****
  @geindex Complex types
  
  @node RM G 1 1 56-58 Complex Types,RM G 1 2 49 Complex Elementary Functions,RM G Numerics,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-g-1-1-56-58-complex-types}@anchor{24e}
  @section RM G.1.1(56-58): Complex Types
  
  
--- 15739,15745 ----
  @geindex Complex types
  
  @node RM G 1 1 56-58 Complex Types,RM G 1 2 49 Complex Elementary Functions,RM G Numerics,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-g-1-1-56-58-complex-types}@anchor{252}
  @section RM G.1.1(56-58): Complex Types
  
  
*************** Followed.
*** 15674,15680 ****
  @geindex Complex elementary functions
  
  @node RM G 1 2 49 Complex Elementary Functions,RM G 2 4 19 Accuracy Requirements,RM G 1 1 56-58 Complex Types,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-g-1-2-49-complex-elementary-functions}@anchor{24f}
  @section RM G.1.2(49): Complex Elementary Functions
  
  
--- 15801,15807 ----
  @geindex Complex elementary functions
  
  @node RM G 1 2 49 Complex Elementary Functions,RM G 2 4 19 Accuracy Requirements,RM G 1 1 56-58 Complex Types,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-g-1-2-49-complex-elementary-functions}@anchor{253}
  @section RM G.1.2(49): Complex Elementary Functions
  
  
*************** Followed.
*** 15696,15702 ****
  @geindex Accuracy requirements
  
  @node RM G 2 4 19 Accuracy Requirements,RM G 2 6 15 Complex Arithmetic Accuracy,RM G 1 2 49 Complex Elementary Functions,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-g-2-4-19-accuracy-requirements}@anchor{250}
  @section RM G.2.4(19): Accuracy Requirements
  
  
--- 15823,15829 ----
  @geindex Accuracy requirements
  
  @node RM G 2 4 19 Accuracy Requirements,RM G 2 6 15 Complex Arithmetic Accuracy,RM G 1 2 49 Complex Elementary Functions,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-g-2-4-19-accuracy-requirements}@anchor{254}
  @section RM G.2.4(19): Accuracy Requirements
  
  
*************** Followed.
*** 15720,15726 ****
  @geindex complex arithmetic
  
  @node RM G 2 6 15 Complex Arithmetic Accuracy,RM H 6 15/2 Pragma Partition_Elaboration_Policy,RM G 2 4 19 Accuracy Requirements,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-g-2-6-15-complex-arithmetic-accuracy}@anchor{251}
  @section RM G.2.6(15): Complex Arithmetic Accuracy
  
  
--- 15847,15853 ----
  @geindex complex arithmetic
  
  @node RM G 2 6 15 Complex Arithmetic Accuracy,RM H 6 15/2 Pragma Partition_Elaboration_Policy,RM G 2 4 19 Accuracy Requirements,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-g-2-6-15-complex-arithmetic-accuracy}@anchor{255}
  @section RM G.2.6(15): Complex Arithmetic Accuracy
  
  
*************** Followed.
*** 15738,15744 ****
  @geindex Sequential elaboration policy
  
  @node RM H 6 15/2 Pragma Partition_Elaboration_Policy,,RM G 2 6 15 Complex Arithmetic Accuracy,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-h-6-15-2-pragma-partition-elaboration-policy}@anchor{252}
  @section RM H.6(15/2): Pragma Partition_Elaboration_Policy
  
  
--- 15865,15871 ----
  @geindex Sequential elaboration policy
  
  @node RM H 6 15/2 Pragma Partition_Elaboration_Policy,,RM G 2 6 15 Complex Arithmetic Accuracy,Implementation Advice
! @anchor{gnat_rm/implementation_advice rm-h-6-15-2-pragma-partition-elaboration-policy}@anchor{256}
  @section RM H.6(15/2): Pragma Partition_Elaboration_Policy
  
  
*************** immediately terminated."
*** 15753,15759 ****
  Not followed.
  
  @node Implementation Defined Characteristics,Intrinsic Subprograms,Implementation Advice,Top
! @anchor{gnat_rm/implementation_defined_characteristics implementation-defined-characteristics}@anchor{b}@anchor{gnat_rm/implementation_defined_characteristics doc}@anchor{253}@anchor{gnat_rm/implementation_defined_characteristics id1}@anchor{254}
  @chapter Implementation Defined Characteristics
  
  
--- 15880,15886 ----
  Not followed.
  
  @node Implementation Defined Characteristics,Intrinsic Subprograms,Implementation Advice,Top
! @anchor{gnat_rm/implementation_defined_characteristics implementation-defined-characteristics}@anchor{b}@anchor{gnat_rm/implementation_defined_characteristics doc}@anchor{257}@anchor{gnat_rm/implementation_defined_characteristics id1}@anchor{258}
  @chapter Implementation Defined Characteristics
  
  
*************** When the @code{Pattern} parameter is not
*** 16949,16955 ****
  according to the syntax of regular expressions as defined in the
  @code{GNAT.Regexp} package.
  
! See @ref{255,,GNAT.Regexp (g-regexp.ads)}.
  
  
  @itemize *
--- 17076,17082 ----
  according to the syntax of regular expressions as defined in the
  @code{GNAT.Regexp} package.
  
! See @ref{259,,GNAT.Regexp (g-regexp.ads)}.
  
  
  @itemize *
*************** pragma @code{Import} specifies conventio
*** 17128,17136 ****
  be present at all.  This convention is useful during development for the
  inclusion of subprograms whose body has not yet been written.
  In addition, all otherwise unrecognized convention names are also
! treated as being synonymous with convention C.  In all implementations
! except for VMS, use of such other names results in a warning.  In VMS
! implementations, these names are accepted silently.
  
  @end multitable
  
--- 17255,17262 ----
  be present at all.  This convention is useful during development for the
  inclusion of subprograms whose body has not yet been written.
  In addition, all otherwise unrecognized convention names are also
! treated as being synonymous with convention C.  In all implementations,
! use of such other names results in a warning.
  
  @end multitable
  
*************** H.4(27)."
*** 17998,18004 ****
  There are no restrictions on pragma @code{Restrictions}.
  
  @node Intrinsic Subprograms,Representation Clauses and Pragmas,Implementation Defined Characteristics,Top
! @anchor{gnat_rm/intrinsic_subprograms doc}@anchor{256}@anchor{gnat_rm/intrinsic_subprograms intrinsic-subprograms}@anchor{c}@anchor{gnat_rm/intrinsic_subprograms id1}@anchor{257}
  @chapter Intrinsic Subprograms
  
  
--- 18124,18130 ----
  There are no restrictions on pragma @code{Restrictions}.
  
  @node Intrinsic Subprograms,Representation Clauses and Pragmas,Implementation Defined Characteristics,Top
! @anchor{gnat_rm/intrinsic_subprograms doc}@anchor{25a}@anchor{gnat_rm/intrinsic_subprograms intrinsic-subprograms}@anchor{c}@anchor{gnat_rm/intrinsic_subprograms id1}@anchor{25b}
  @chapter Intrinsic Subprograms
  
  
*************** Ada standard does not require Ada compil
*** 18036,18042 ****
  @end menu
  
  @node Intrinsic Operators,Compilation_ISO_Date,,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms id2}@anchor{258}@anchor{gnat_rm/intrinsic_subprograms intrinsic-operators}@anchor{259}
  @section Intrinsic Operators
  
  
--- 18162,18168 ----
  @end menu
  
  @node Intrinsic Operators,Compilation_ISO_Date,,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms id2}@anchor{25c}@anchor{gnat_rm/intrinsic_subprograms intrinsic-operators}@anchor{25d}
  @section Intrinsic Operators
  
  
*************** It is also possible to specify such oper
*** 18067,18073 ****
  full views are appropriate arithmetic types.
  
  @node Compilation_ISO_Date,Compilation_Date,Intrinsic Operators,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms id3}@anchor{25a}@anchor{gnat_rm/intrinsic_subprograms compilation-iso-date}@anchor{25b}
  @section Compilation_ISO_Date
  
  
--- 18193,18199 ----
  full views are appropriate arithmetic types.
  
  @node Compilation_ISO_Date,Compilation_Date,Intrinsic Operators,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms id3}@anchor{25e}@anchor{gnat_rm/intrinsic_subprograms compilation-iso-date}@anchor{25f}
  @section Compilation_ISO_Date
  
  
*************** application program should simply call t
*** 18081,18087 ****
  the current compilation (in local time format YYYY-MM-DD).
  
  @node Compilation_Date,Compilation_Time,Compilation_ISO_Date,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms compilation-date}@anchor{25c}@anchor{gnat_rm/intrinsic_subprograms id4}@anchor{25d}
  @section Compilation_Date
  
  
--- 18207,18213 ----
  the current compilation (in local time format YYYY-MM-DD).
  
  @node Compilation_Date,Compilation_Time,Compilation_ISO_Date,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms compilation-date}@anchor{260}@anchor{gnat_rm/intrinsic_subprograms id4}@anchor{261}
  @section Compilation_Date
  
  
*************** Same as Compilation_ISO_Date, except the
*** 18091,18097 ****
  MMM DD YYYY.
  
  @node Compilation_Time,Enclosing_Entity,Compilation_Date,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms compilation-time}@anchor{25e}@anchor{gnat_rm/intrinsic_subprograms id5}@anchor{25f}
  @section Compilation_Time
  
  
--- 18217,18223 ----
  MMM DD YYYY.
  
  @node Compilation_Time,Enclosing_Entity,Compilation_Date,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms compilation-time}@anchor{262}@anchor{gnat_rm/intrinsic_subprograms id5}@anchor{263}
  @section Compilation_Time
  
  
*************** application program should simply call t
*** 18105,18111 ****
  the current compilation (in local time format HH:MM:SS).
  
  @node Enclosing_Entity,Exception_Information,Compilation_Time,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms id6}@anchor{260}@anchor{gnat_rm/intrinsic_subprograms enclosing-entity}@anchor{261}
  @section Enclosing_Entity
  
  
--- 18231,18237 ----
  the current compilation (in local time format HH:MM:SS).
  
  @node Enclosing_Entity,Exception_Information,Compilation_Time,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms id6}@anchor{264}@anchor{gnat_rm/intrinsic_subprograms enclosing-entity}@anchor{265}
  @section Enclosing_Entity
  
  
*************** application program should simply call t
*** 18119,18125 ****
  the current subprogram, package, task, entry, or protected subprogram.
  
  @node Exception_Information,Exception_Message,Enclosing_Entity,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms id7}@anchor{262}@anchor{gnat_rm/intrinsic_subprograms exception-information}@anchor{263}
  @section Exception_Information
  
  
--- 18245,18251 ----
  the current subprogram, package, task, entry, or protected subprogram.
  
  @node Exception_Information,Exception_Message,Enclosing_Entity,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms id7}@anchor{266}@anchor{gnat_rm/intrinsic_subprograms exception-information}@anchor{267}
  @section Exception_Information
  
  
*************** so an application program should simply
*** 18133,18139 ****
  the exception information associated with the current exception.
  
  @node Exception_Message,Exception_Name,Exception_Information,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms exception-message}@anchor{264}@anchor{gnat_rm/intrinsic_subprograms id8}@anchor{265}
  @section Exception_Message
  
  
--- 18259,18265 ----
  the exception information associated with the current exception.
  
  @node Exception_Message,Exception_Name,Exception_Information,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms exception-message}@anchor{268}@anchor{gnat_rm/intrinsic_subprograms id8}@anchor{269}
  @section Exception_Message
  
  
*************** so an application program should simply
*** 18147,18153 ****
  the message associated with the current exception.
  
  @node Exception_Name,File,Exception_Message,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms exception-name}@anchor{266}@anchor{gnat_rm/intrinsic_subprograms id9}@anchor{267}
  @section Exception_Name
  
  
--- 18273,18279 ----
  the message associated with the current exception.
  
  @node Exception_Name,File,Exception_Message,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms exception-name}@anchor{26a}@anchor{gnat_rm/intrinsic_subprograms id9}@anchor{26b}
  @section Exception_Name
  
  
*************** so an application program should simply
*** 18161,18167 ****
  the name of the current exception.
  
  @node File,Line,Exception_Name,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms id10}@anchor{268}@anchor{gnat_rm/intrinsic_subprograms file}@anchor{269}
  @section File
  
  
--- 18287,18293 ----
  the name of the current exception.
  
  @node File,Line,Exception_Name,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms id10}@anchor{26c}@anchor{gnat_rm/intrinsic_subprograms file}@anchor{26d}
  @section File
  
  
*************** application program should simply call t
*** 18175,18181 ****
  file.
  
  @node Line,Shifts and Rotates,File,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms id11}@anchor{26a}@anchor{gnat_rm/intrinsic_subprograms line}@anchor{26b}
  @section Line
  
  
--- 18301,18307 ----
  file.
  
  @node Line,Shifts and Rotates,File,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms id11}@anchor{26e}@anchor{gnat_rm/intrinsic_subprograms line}@anchor{26f}
  @section Line
  
  
*************** application program should simply call t
*** 18189,18195 ****
  source line.
  
  @node Shifts and Rotates,Source_Location,Line,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms shifts-and-rotates}@anchor{26c}@anchor{gnat_rm/intrinsic_subprograms id12}@anchor{26d}
  @section Shifts and Rotates
  
  
--- 18315,18321 ----
  source line.
  
  @node Shifts and Rotates,Source_Location,Line,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms shifts-and-rotates}@anchor{270}@anchor{gnat_rm/intrinsic_subprograms id12}@anchor{271}
  @section Shifts and Rotates
  
  
*************** the Provide_Shift_Operators pragma, whic
*** 18228,18234 ****
  and corresponding pragma Import's for all five shift functions.
  
  @node Source_Location,,Shifts and Rotates,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms source-location}@anchor{26e}@anchor{gnat_rm/intrinsic_subprograms id13}@anchor{26f}
  @section Source_Location
  
  
--- 18354,18360 ----
  and corresponding pragma Import's for all five shift functions.
  
  @node Source_Location,,Shifts and Rotates,Intrinsic Subprograms
! @anchor{gnat_rm/intrinsic_subprograms source-location}@anchor{272}@anchor{gnat_rm/intrinsic_subprograms id13}@anchor{273}
  @section Source_Location
  
  
*************** application program should simply call t
*** 18242,18248 ****
  source file location.
  
  @node Representation Clauses and Pragmas,Standard Library Routines,Intrinsic Subprograms,Top
! @anchor{gnat_rm/representation_clauses_and_pragmas representation-clauses-and-pragmas}@anchor{d}@anchor{gnat_rm/representation_clauses_and_pragmas doc}@anchor{270}@anchor{gnat_rm/representation_clauses_and_pragmas id1}@anchor{271}
  @chapter Representation Clauses and Pragmas
  
  
--- 18368,18374 ----
  source file location.
  
  @node Representation Clauses and Pragmas,Standard Library Routines,Intrinsic Subprograms,Top
! @anchor{gnat_rm/representation_clauses_and_pragmas representation-clauses-and-pragmas}@anchor{d}@anchor{gnat_rm/representation_clauses_and_pragmas doc}@anchor{274}@anchor{gnat_rm/representation_clauses_and_pragmas id1}@anchor{275}
  @chapter Representation Clauses and Pragmas
  
  
*************** and this section describes the additiona
*** 18288,18302 ****
  @end menu
  
  @node Alignment Clauses,Size Clauses,,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id2}@anchor{272}@anchor{gnat_rm/representation_clauses_and_pragmas alignment-clauses}@anchor{273}
  @section Alignment Clauses
  
  
  @geindex Alignment Clause
  
! GNAT requires that all alignment clauses specify a power of 2, and all
! default alignments are always a power of 2.  The default alignment
! values are as follows:
  
  
  @itemize *
--- 18414,18430 ----
  @end menu
  
  @node Alignment Clauses,Size Clauses,,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id2}@anchor{276}@anchor{gnat_rm/representation_clauses_and_pragmas alignment-clauses}@anchor{277}
  @section Alignment Clauses
  
  
  @geindex Alignment Clause
  
! GNAT requires that all alignment clauses specify 0 or a power of 2, and
! all default alignments are always a power of 2. Specifying 0 is the
! same as specifying 1.
! 
! The default alignment values are as follows:
  
  
  @itemize *
*************** For elementary types, the alignment is t
*** 18308,18314 ****
  objects of the type divided by @code{Storage_Unit},
  and the maximum alignment supported by the target.
  (This maximum alignment is given by the GNAT-specific attribute
! @code{Standard'Maximum_Alignment}; see @ref{18d,,Attribute Maximum_Alignment}.)
  
  @geindex Maximum_Alignment attribute
  
--- 18436,18442 ----
  objects of the type divided by @code{Storage_Unit},
  and the maximum alignment supported by the target.
  (This maximum alignment is given by the GNAT-specific attribute
! @code{Standard'Maximum_Alignment}; see @ref{191,,Attribute Maximum_Alignment}.)
  
  @geindex Maximum_Alignment attribute
  
*************** assumption is non-portable, and other co
*** 18417,18423 ****
  alignments for the subtype @code{RS}.
  
  @node Size Clauses,Storage_Size Clauses,Alignment Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id3}@anchor{274}@anchor{gnat_rm/representation_clauses_and_pragmas size-clauses}@anchor{275}
  @section Size Clauses
  
  
--- 18545,18551 ----
  alignments for the subtype @code{RS}.
  
  @node Size Clauses,Storage_Size Clauses,Alignment Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id3}@anchor{278}@anchor{gnat_rm/representation_clauses_and_pragmas size-clauses}@anchor{279}
  @section Size Clauses
  
  
*************** if it is known that a Size value can be
*** 18494,18500 ****
  type Integer.
  
  @node Storage_Size Clauses,Size of Variant Record Objects,Size Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas storage-size-clauses}@anchor{276}@anchor{gnat_rm/representation_clauses_and_pragmas id4}@anchor{277}
  @section Storage_Size Clauses
  
  
--- 18622,18628 ----
  type Integer.
  
  @node Storage_Size Clauses,Size of Variant Record Objects,Size Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas storage-size-clauses}@anchor{27a}@anchor{gnat_rm/representation_clauses_and_pragmas id4}@anchor{27b}
  @section Storage_Size Clauses
  
  
*************** Of course in practice, there will not be
*** 18567,18573 ****
  case of such an access declaration.
  
  @node Size of Variant Record Objects,Biased Representation,Storage_Size Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id5}@anchor{278}@anchor{gnat_rm/representation_clauses_and_pragmas size-of-variant-record-objects}@anchor{279}
  @section Size of Variant Record Objects
  
  
--- 18695,18701 ----
  case of such an access declaration.
  
  @node Size of Variant Record Objects,Biased Representation,Storage_Size Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id5}@anchor{27c}@anchor{gnat_rm/representation_clauses_and_pragmas size-of-variant-record-objects}@anchor{27d}
  @section Size of Variant Record Objects
  
  
*************** the maximum size, regardless of the curr
*** 18677,18683 ****
  variant value.
  
  @node Biased Representation,Value_Size and Object_Size Clauses,Size of Variant Record Objects,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id6}@anchor{27a}@anchor{gnat_rm/representation_clauses_and_pragmas biased-representation}@anchor{27b}
  @section Biased Representation
  
  
--- 18805,18811 ----
  variant value.
  
  @node Biased Representation,Value_Size and Object_Size Clauses,Size of Variant Record Objects,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id6}@anchor{27e}@anchor{gnat_rm/representation_clauses_and_pragmas biased-representation}@anchor{27f}
  @section Biased Representation
  
  
*************** biased representation can be used for al
*** 18715,18721 ****
  enumeration types for which a representation clause is given.
  
  @node Value_Size and Object_Size Clauses,Component_Size Clauses,Biased Representation,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id7}@anchor{27c}@anchor{gnat_rm/representation_clauses_and_pragmas value-size-and-object-size-clauses}@anchor{27d}
  @section Value_Size and Object_Size Clauses
  
  
--- 18843,18849 ----
  enumeration types for which a representation clause is given.
  
  @node Value_Size and Object_Size Clauses,Component_Size Clauses,Biased Representation,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id7}@anchor{280}@anchor{gnat_rm/representation_clauses_and_pragmas value-size-and-object-size-clauses}@anchor{281}
  @section Value_Size and Object_Size Clauses
  
  
*************** type R is record
*** 18982,18995 ****
  end record;
  @end example
  
! On a typical 32-bit architecture, the X component will be four bytes, and
! require four-byte alignment, and the Y component will be one byte. In this
! case @code{R'Value_Size} will be 40 (bits) since this is the minimum size
! required to store a value of this type, and for example, it is permissible
! to have a component of type R in an outer array whose component size is
! specified to be 48 bits. However, @code{R'Object_Size} will be 64 (bits),
! since it must be rounded up so that this value is a multiple of the
! alignment (4 bytes = 32 bits).
  
  For all other types, the @code{Object_Size}
  and @code{Value_Size} are the same (and equivalent to the RM attribute @code{Size}).
--- 19110,19132 ----
  end record;
  @end example
  
! On a typical 32-bit architecture, the X component will occupy four bytes
! and the Y component will occupy one byte, for a total of 5 bytes. As a
! result @code{R'Value_Size} will be 40 (bits) since this is the minimum size
! required to store a value of this type. For example, it is permissible
! to have a component of type R in an array whose component size is
! specified to be 40 bits.
! 
! However, @code{R'Object_Size} will be 64 (bits). The difference is due to
! the alignment requirement for objects of the record type. The X
! component will require four-byte alignment because that is what type
! Integer requires, whereas the Y component, a Character, will only
! require 1-byte alignment. Since the alignment required for X is the
! greatest of all the components' alignments, that is the alignment
! required for the enclosing record type, i.e., 4 bytes or 32 bits. As
! indicated above, the actual object size must be rounded up so that it is
! a multiple of the alignment value. Therefore, 40 bits rounded up to the
! next multiple of 32 yields 64 bits.
  
  For all other types, the @code{Object_Size}
  and @code{Value_Size} are the same (and equivalent to the RM attribute @code{Size}).
*************** definition clause forces biased represen
*** 19022,19028 ****
  warning can be turned off using @code{-gnatw.B}.
  
  @node Component_Size Clauses,Bit_Order Clauses,Value_Size and Object_Size Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id8}@anchor{27e}@anchor{gnat_rm/representation_clauses_and_pragmas component-size-clauses}@anchor{27f}
  @section Component_Size Clauses
  
  
--- 19159,19165 ----
  warning can be turned off using @code{-gnatw.B}.
  
  @node Component_Size Clauses,Bit_Order Clauses,Value_Size and Object_Size Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id8}@anchor{282}@anchor{gnat_rm/representation_clauses_and_pragmas component-size-clauses}@anchor{283}
  @section Component_Size Clauses
  
  
*************** and a pragma Pack for the same array typ
*** 19069,19075 ****
  clauses are given, the pragma Pack will be ignored.
  
  @node Bit_Order Clauses,Effect of Bit_Order on Byte Ordering,Component_Size Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas bit-order-clauses}@anchor{280}@anchor{gnat_rm/representation_clauses_and_pragmas id9}@anchor{281}
  @section Bit_Order Clauses
  
  
--- 19206,19212 ----
  clauses are given, the pragma Pack will be ignored.
  
  @node Bit_Order Clauses,Effect of Bit_Order on Byte Ordering,Component_Size Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas bit-order-clauses}@anchor{284}@anchor{gnat_rm/representation_clauses_and_pragmas id9}@anchor{285}
  @section Bit_Order Clauses
  
  
*************** if desired.  The following section conta
*** 19175,19181 ****
  details regarding the issue of byte ordering.
  
  @node Effect of Bit_Order on Byte Ordering,Pragma Pack for Arrays,Bit_Order Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id10}@anchor{282}@anchor{gnat_rm/representation_clauses_and_pragmas effect-of-bit-order-on-byte-ordering}@anchor{283}
  @section Effect of Bit_Order on Byte Ordering
  
  
--- 19312,19318 ----
  details regarding the issue of byte ordering.
  
  @node Effect of Bit_Order on Byte Ordering,Pragma Pack for Arrays,Bit_Order Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id10}@anchor{286}@anchor{gnat_rm/representation_clauses_and_pragmas effect-of-bit-order-on-byte-ordering}@anchor{287}
  @section Effect of Bit_Order on Byte Ordering
  
  
*************** to set the boolean constant @code{Master
*** 19432,19438 ****
  an appropriate manner.
  
  @node Pragma Pack for Arrays,Pragma Pack for Records,Effect of Bit_Order on Byte Ordering,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas pragma-pack-for-arrays}@anchor{284}@anchor{gnat_rm/representation_clauses_and_pragmas id11}@anchor{285}
  @section Pragma Pack for Arrays
  
  
--- 19569,19575 ----
  an appropriate manner.
  
  @node Pragma Pack for Arrays,Pragma Pack for Records,Effect of Bit_Order on Byte Ordering,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas pragma-pack-for-arrays}@anchor{288}@anchor{gnat_rm/representation_clauses_and_pragmas id11}@anchor{289}
  @section Pragma Pack for Arrays
  
  
*************** Here 31-bit packing is achieved as requi
*** 19549,19555 ****
  since in this case the programmer intention is clear.
  
  @node Pragma Pack for Records,Record Representation Clauses,Pragma Pack for Arrays,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas pragma-pack-for-records}@anchor{286}@anchor{gnat_rm/representation_clauses_and_pragmas id12}@anchor{287}
  @section Pragma Pack for Records
  
  
--- 19686,19692 ----
  since in this case the programmer intention is clear.
  
  @node Pragma Pack for Records,Record Representation Clauses,Pragma Pack for Arrays,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas pragma-pack-for-records}@anchor{28a}@anchor{gnat_rm/representation_clauses_and_pragmas id12}@anchor{28b}
  @section Pragma Pack for Records
  
  
*************** the @code{L6} field is aligned to the ne
*** 19634,19640 ****
  integral number of bytes, i.e., 72 bits.
  
  @node Record Representation Clauses,Handling of Records with Holes,Pragma Pack for Records,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id13}@anchor{288}@anchor{gnat_rm/representation_clauses_and_pragmas record-representation-clauses}@anchor{289}
  @section Record Representation Clauses
  
  
--- 19771,19777 ----
  integral number of bytes, i.e., 72 bits.
  
  @node Record Representation Clauses,Handling of Records with Holes,Pragma Pack for Records,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id13}@anchor{28c}@anchor{gnat_rm/representation_clauses_and_pragmas record-representation-clauses}@anchor{28d}
  @section Record Representation Clauses
  
  
*************** end record;
*** 19712,19718 ****
  @end example
  
  @node Handling of Records with Holes,Enumeration Clauses,Record Representation Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas handling-of-records-with-holes}@anchor{28a}@anchor{gnat_rm/representation_clauses_and_pragmas id14}@anchor{28b}
  @section Handling of Records with Holes
  
  
--- 19849,19855 ----
  @end example
  
  @node Handling of Records with Holes,Enumeration Clauses,Record Representation Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas handling-of-records-with-holes}@anchor{28e}@anchor{gnat_rm/representation_clauses_and_pragmas id14}@anchor{28f}
  @section Handling of Records with Holes
  
  
*************** for Hrec'Size use 64;
*** 19789,19795 ****
  @end example
  
  @node Enumeration Clauses,Address Clauses,Handling of Records with Holes,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas enumeration-clauses}@anchor{28c}@anchor{gnat_rm/representation_clauses_and_pragmas id15}@anchor{28d}
  @section Enumeration Clauses
  
  
--- 19926,19932 ----
  @end example
  
  @node Enumeration Clauses,Address Clauses,Handling of Records with Holes,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas enumeration-clauses}@anchor{290}@anchor{gnat_rm/representation_clauses_and_pragmas id15}@anchor{291}
  @section Enumeration Clauses
  
  
*************** the overhead of converting representatio
*** 19832,19838 ****
  positional values, (i.e., the value delivered by the @code{Pos} attribute).
  
  @node Address Clauses,Use of Address Clauses for Memory-Mapped I/O,Enumeration Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id16}@anchor{28e}@anchor{gnat_rm/representation_clauses_and_pragmas address-clauses}@anchor{28f}
  @section Address Clauses
  
  
--- 19969,19975 ----
  positional values, (i.e., the value delivered by the @code{Pos} attribute).
  
  @node Address Clauses,Use of Address Clauses for Memory-Mapped I/O,Enumeration Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id16}@anchor{292}@anchor{gnat_rm/representation_clauses_and_pragmas address-clauses}@anchor{293}
  @section Address Clauses
  
  
*************** then the program compiles without the wa
*** 20161,20167 ****
  the output @code{X was not clobbered}.
  
  @node Use of Address Clauses for Memory-Mapped I/O,Effect of Convention on Representation,Address Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id17}@anchor{290}@anchor{gnat_rm/representation_clauses_and_pragmas use-of-address-clauses-for-memory-mapped-i-o}@anchor{291}
  @section Use of Address Clauses for Memory-Mapped I/O
  
  
--- 20298,20304 ----
  the output @code{X was not clobbered}.
  
  @node Use of Address Clauses for Memory-Mapped I/O,Effect of Convention on Representation,Address Clauses,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id17}@anchor{294}@anchor{gnat_rm/representation_clauses_and_pragmas use-of-address-clauses-for-memory-mapped-i-o}@anchor{295}
  @section Use of Address Clauses for Memory-Mapped I/O
  
  
*************** provides the pragma @code{Volatile_Full_
*** 20219,20225 ****
  pragma @code{Atomic} and will give the additional guarantee.
  
  @node Effect of Convention on Representation,Conventions and Anonymous Access Types,Use of Address Clauses for Memory-Mapped I/O,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id18}@anchor{292}@anchor{gnat_rm/representation_clauses_and_pragmas effect-of-convention-on-representation}@anchor{293}
  @section Effect of Convention on Representation
  
  
--- 20356,20362 ----
  pragma @code{Atomic} and will give the additional guarantee.
  
  @node Effect of Convention on Representation,Conventions and Anonymous Access Types,Use of Address Clauses for Memory-Mapped I/O,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id18}@anchor{296}@anchor{gnat_rm/representation_clauses_and_pragmas effect-of-convention-on-representation}@anchor{297}
  @section Effect of Convention on Representation
  
  
*************** when one of these values is read, any no
*** 20297,20303 ****
  @end itemize
  
  @node Conventions and Anonymous Access Types,Determining the Representations chosen by GNAT,Effect of Convention on Representation,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas conventions-and-anonymous-access-types}@anchor{294}@anchor{gnat_rm/representation_clauses_and_pragmas id19}@anchor{295}
  @section Conventions and Anonymous Access Types
  
  
--- 20434,20440 ----
  @end itemize
  
  @node Conventions and Anonymous Access Types,Determining the Representations chosen by GNAT,Effect of Convention on Representation,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas conventions-and-anonymous-access-types}@anchor{298}@anchor{gnat_rm/representation_clauses_and_pragmas id19}@anchor{299}
  @section Conventions and Anonymous Access Types
  
  
*************** package ConvComp is
*** 20373,20379 ****
  @end example
  
  @node Determining the Representations chosen by GNAT,,Conventions and Anonymous Access Types,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id20}@anchor{296}@anchor{gnat_rm/representation_clauses_and_pragmas determining-the-representations-chosen-by-gnat}@anchor{297}
  @section Determining the Representations chosen by GNAT
  
  
--- 20510,20516 ----
  @end example
  
  @node Determining the Representations chosen by GNAT,,Conventions and Anonymous Access Types,Representation Clauses and Pragmas
! @anchor{gnat_rm/representation_clauses_and_pragmas id20}@anchor{29a}@anchor{gnat_rm/representation_clauses_and_pragmas determining-the-representations-chosen-by-gnat}@anchor{29b}
  @section Determining the Representations chosen by GNAT
  
  
*************** generated by the compiler into the origi
*** 20525,20531 ****
  the actual representation to be used.
  
  @node Standard Library Routines,The Implementation of Standard I/O,Representation Clauses and Pragmas,Top
! @anchor{gnat_rm/standard_library_routines standard-library-routines}@anchor{e}@anchor{gnat_rm/standard_library_routines doc}@anchor{298}@anchor{gnat_rm/standard_library_routines id1}@anchor{299}
  @chapter Standard Library Routines
  
  
--- 20662,20668 ----
  the actual representation to be used.
  
  @node Standard Library Routines,The Implementation of Standard I/O,Representation Clauses and Pragmas,Top
! @anchor{gnat_rm/standard_library_routines standard-library-routines}@anchor{e}@anchor{gnat_rm/standard_library_routines doc}@anchor{29c}@anchor{gnat_rm/standard_library_routines id1}@anchor{29d}
  @chapter Standard Library Routines
  
  
*************** For packages in Interfaces and System, a
*** 21349,21355 ****
  available in GNAT, see the Ada 2012 RM for full details.
  
  @node The Implementation of Standard I/O,The GNAT Library,Standard Library Routines,Top
! @anchor{gnat_rm/the_implementation_of_standard_i_o the-implementation-of-standard-i-o}@anchor{f}@anchor{gnat_rm/the_implementation_of_standard_i_o doc}@anchor{29a}@anchor{gnat_rm/the_implementation_of_standard_i_o id1}@anchor{29b}
  @chapter The Implementation of Standard I/O
  
  
--- 21486,21492 ----
  available in GNAT, see the Ada 2012 RM for full details.
  
  @node The Implementation of Standard I/O,The GNAT Library,Standard Library Routines,Top
! @anchor{gnat_rm/the_implementation_of_standard_i_o the-implementation-of-standard-i-o}@anchor{f}@anchor{gnat_rm/the_implementation_of_standard_i_o doc}@anchor{29e}@anchor{gnat_rm/the_implementation_of_standard_i_o id1}@anchor{29f}
  @chapter The Implementation of Standard I/O
  
  
*************** these additional facilities are also des
*** 21401,21407 ****
  @end menu
  
  @node Standard I/O Packages,FORM Strings,,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o standard-i-o-packages}@anchor{29c}@anchor{gnat_rm/the_implementation_of_standard_i_o id2}@anchor{29d}
  @section Standard I/O Packages
  
  
--- 21538,21544 ----
  @end menu
  
  @node Standard I/O Packages,FORM Strings,,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o standard-i-o-packages}@anchor{2a0}@anchor{gnat_rm/the_implementation_of_standard_i_o id2}@anchor{2a1}
  @section Standard I/O Packages
  
  
*************** flush the common I/O streams and in part
*** 21472,21478 ****
  elaborating the Ada code.
  
  @node FORM Strings,Direct_IO,Standard I/O Packages,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o form-strings}@anchor{29e}@anchor{gnat_rm/the_implementation_of_standard_i_o id3}@anchor{29f}
  @section FORM Strings
  
  
--- 21609,21615 ----
  elaborating the Ada code.
  
  @node FORM Strings,Direct_IO,Standard I/O Packages,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o form-strings}@anchor{2a2}@anchor{gnat_rm/the_implementation_of_standard_i_o id3}@anchor{2a3}
  @section FORM Strings
  
  
*************** unrecognized keyword appears in a form s
*** 21498,21504 ****
  and not considered invalid.
  
  @node Direct_IO,Sequential_IO,FORM Strings,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o direct-io}@anchor{2a0}@anchor{gnat_rm/the_implementation_of_standard_i_o id4}@anchor{2a1}
  @section Direct_IO
  
  
--- 21635,21641 ----
  and not considered invalid.
  
  @node Direct_IO,Sequential_IO,FORM Strings,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o direct-io}@anchor{2a4}@anchor{gnat_rm/the_implementation_of_standard_i_o id4}@anchor{2a5}
  @section Direct_IO
  
  
*************** There is no limit on the size of Direct_
*** 21518,21524 ****
  necessary to accommodate whatever records are written to the file.
  
  @node Sequential_IO,Text_IO,Direct_IO,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o sequential-io}@anchor{2a2}@anchor{gnat_rm/the_implementation_of_standard_i_o id5}@anchor{2a3}
  @section Sequential_IO
  
  
--- 21655,21661 ----
  necessary to accommodate whatever records are written to the file.
  
  @node Sequential_IO,Text_IO,Direct_IO,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o sequential-io}@anchor{2a6}@anchor{gnat_rm/the_implementation_of_standard_i_o id5}@anchor{2a7}
  @section Sequential_IO
  
  
*************** using Stream_IO, and this is the preferr
*** 21565,21571 ****
  above program fragment rewritten to use Stream_IO will work correctly.
  
  @node Text_IO,Wide_Text_IO,Sequential_IO,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o id6}@anchor{2a4}@anchor{gnat_rm/the_implementation_of_standard_i_o text-io}@anchor{2a5}
  @section Text_IO
  
  
--- 21702,21708 ----
  above program fragment rewritten to use Stream_IO will work correctly.
  
  @node Text_IO,Wide_Text_IO,Sequential_IO,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o id6}@anchor{2a8}@anchor{gnat_rm/the_implementation_of_standard_i_o text-io}@anchor{2a9}
  @section Text_IO
  
  
*************** the file.
*** 21648,21654 ****
  @end menu
  
  @node Stream Pointer Positioning,Reading and Writing Non-Regular Files,,Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o id7}@anchor{2a6}@anchor{gnat_rm/the_implementation_of_standard_i_o stream-pointer-positioning}@anchor{2a7}
  @subsection Stream Pointer Positioning
  
  
--- 21785,21791 ----
  @end menu
  
  @node Stream Pointer Positioning,Reading and Writing Non-Regular Files,,Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o id7}@anchor{2aa}@anchor{gnat_rm/the_implementation_of_standard_i_o stream-pointer-positioning}@anchor{2ab}
  @subsection Stream Pointer Positioning
  
  
*************** between two Ada files, then the differen
*** 21684,21690 ****
  situations.
  
  @node Reading and Writing Non-Regular Files,Get_Immediate,Stream Pointer Positioning,Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o reading-and-writing-non-regular-files}@anchor{2a8}@anchor{gnat_rm/the_implementation_of_standard_i_o id8}@anchor{2a9}
  @subsection Reading and Writing Non-Regular Files
  
  
--- 21821,21827 ----
  situations.
  
  @node Reading and Writing Non-Regular Files,Get_Immediate,Stream Pointer Positioning,Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o reading-and-writing-non-regular-files}@anchor{2ac}@anchor{gnat_rm/the_implementation_of_standard_i_o id8}@anchor{2ad}
  @subsection Reading and Writing Non-Regular Files
  
  
*************** to read data past that end of
*** 21735,21741 ****
  file indication, until another end of file indication is entered.
  
  @node Get_Immediate,Treating Text_IO Files as Streams,Reading and Writing Non-Regular Files,Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o get-immediate}@anchor{2aa}@anchor{gnat_rm/the_implementation_of_standard_i_o id9}@anchor{2ab}
  @subsection Get_Immediate
  
  
--- 21872,21878 ----
  file indication, until another end of file indication is entered.
  
  @node Get_Immediate,Treating Text_IO Files as Streams,Reading and Writing Non-Regular Files,Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o get-immediate}@anchor{2ae}@anchor{gnat_rm/the_implementation_of_standard_i_o id9}@anchor{2af}
  @subsection Get_Immediate
  
  
*************** possible), it is undefined whether the F
*** 21753,21759 ****
  page mark.
  
  @node Treating Text_IO Files as Streams,Text_IO Extensions,Get_Immediate,Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o id10}@anchor{2ac}@anchor{gnat_rm/the_implementation_of_standard_i_o treating-text-io-files-as-streams}@anchor{2ad}
  @subsection Treating Text_IO Files as Streams
  
  
--- 21890,21896 ----
  page mark.
  
  @node Treating Text_IO Files as Streams,Text_IO Extensions,Get_Immediate,Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o id10}@anchor{2b0}@anchor{gnat_rm/the_implementation_of_standard_i_o treating-text-io-files-as-streams}@anchor{2b1}
  @subsection Treating Text_IO Files as Streams
  
  
*************** skipped and the effect is similar to tha
*** 21769,21775 ****
  @code{Get_Immediate}.
  
  @node Text_IO Extensions,Text_IO Facilities for Unbounded Strings,Treating Text_IO Files as Streams,Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o id11}@anchor{2ae}@anchor{gnat_rm/the_implementation_of_standard_i_o text-io-extensions}@anchor{2af}
  @subsection Text_IO Extensions
  
  
--- 21906,21912 ----
  @code{Get_Immediate}.
  
  @node Text_IO Extensions,Text_IO Facilities for Unbounded Strings,Treating Text_IO Files as Streams,Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o id11}@anchor{2b2}@anchor{gnat_rm/the_implementation_of_standard_i_o text-io-extensions}@anchor{2b3}
  @subsection Text_IO Extensions
  
  
*************** the string is to be read.
*** 21797,21803 ****
  @end itemize
  
  @node Text_IO Facilities for Unbounded Strings,,Text_IO Extensions,Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o text-io-facilities-for-unbounded-strings}@anchor{2b0}@anchor{gnat_rm/the_implementation_of_standard_i_o id12}@anchor{2b1}
  @subsection Text_IO Facilities for Unbounded Strings
  
  
--- 21934,21940 ----
  @end itemize
  
  @node Text_IO Facilities for Unbounded Strings,,Text_IO Extensions,Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o text-io-facilities-for-unbounded-strings}@anchor{2b4}@anchor{gnat_rm/the_implementation_of_standard_i_o id12}@anchor{2b5}
  @subsection Text_IO Facilities for Unbounded Strings
  
  
*************** files @code{a-szuzti.ads} and @code{a-sz
*** 21845,21851 ****
  @code{Wide_Wide_Text_IO} functionality for unbounded wide wide strings.
  
  @node Wide_Text_IO,Wide_Wide_Text_IO,Text_IO,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o wide-text-io}@anchor{2b2}@anchor{gnat_rm/the_implementation_of_standard_i_o id13}@anchor{2b3}
  @section Wide_Text_IO
  
  
--- 21982,21988 ----
  @code{Wide_Wide_Text_IO} functionality for unbounded wide wide strings.
  
  @node Wide_Text_IO,Wide_Wide_Text_IO,Text_IO,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o wide-text-io}@anchor{2b6}@anchor{gnat_rm/the_implementation_of_standard_i_o id13}@anchor{2b7}
  @section Wide_Text_IO
  
  
*************** input also causes Constraint_Error to be
*** 22092,22103 ****
  @end menu
  
  @node Stream Pointer Positioning<2>,Reading and Writing Non-Regular Files<2>,,Wide_Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o stream-pointer-positioning-1}@anchor{2b4}@anchor{gnat_rm/the_implementation_of_standard_i_o id14}@anchor{2b5}
  @subsection Stream Pointer Positioning
  
  
  @code{Ada.Wide_Text_IO} is similar to @code{Ada.Text_IO} in its handling
! of stream pointer positioning (@ref{2a5,,Text_IO}).  There is one additional
  case:
  
  If @code{Ada.Wide_Text_IO.Look_Ahead} reads a character outside the
--- 22229,22240 ----
  @end menu
  
  @node Stream Pointer Positioning<2>,Reading and Writing Non-Regular Files<2>,,Wide_Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o stream-pointer-positioning-1}@anchor{2b8}@anchor{gnat_rm/the_implementation_of_standard_i_o id14}@anchor{2b9}
  @subsection Stream Pointer Positioning
  
  
  @code{Ada.Wide_Text_IO} is similar to @code{Ada.Text_IO} in its handling
! of stream pointer positioning (@ref{2a9,,Text_IO}).  There is one additional
  case:
  
  If @code{Ada.Wide_Text_IO.Look_Ahead} reads a character outside the
*************** to a normal program using @code{Wide_Tex
*** 22116,22122 ****
  can be observed if the wide text file shares a stream with another file.
  
  @node Reading and Writing Non-Regular Files<2>,,Stream Pointer Positioning<2>,Wide_Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o reading-and-writing-non-regular-files-1}@anchor{2b6}@anchor{gnat_rm/the_implementation_of_standard_i_o id15}@anchor{2b7}
  @subsection Reading and Writing Non-Regular Files
  
  
--- 22253,22259 ----
  can be observed if the wide text file shares a stream with another file.
  
  @node Reading and Writing Non-Regular Files<2>,,Stream Pointer Positioning<2>,Wide_Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o reading-and-writing-non-regular-files-1}@anchor{2ba}@anchor{gnat_rm/the_implementation_of_standard_i_o id15}@anchor{2bb}
  @subsection Reading and Writing Non-Regular Files
  
  
*************** treated as data characters), and @code{E
*** 22127,22133 ****
  it is possible to read beyond an end of file.
  
  @node Wide_Wide_Text_IO,Stream_IO,Wide_Text_IO,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o id16}@anchor{2b8}@anchor{gnat_rm/the_implementation_of_standard_i_o wide-wide-text-io}@anchor{2b9}
  @section Wide_Wide_Text_IO
  
  
--- 22264,22270 ----
  it is possible to read beyond an end of file.
  
  @node Wide_Wide_Text_IO,Stream_IO,Wide_Text_IO,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o id16}@anchor{2bc}@anchor{gnat_rm/the_implementation_of_standard_i_o wide-wide-text-io}@anchor{2bd}
  @section Wide_Wide_Text_IO
  
  
*************** input also causes Constraint_Error to be
*** 22296,22307 ****
  @end menu
  
  @node Stream Pointer Positioning<3>,Reading and Writing Non-Regular Files<3>,,Wide_Wide_Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o stream-pointer-positioning-2}@anchor{2ba}@anchor{gnat_rm/the_implementation_of_standard_i_o id17}@anchor{2bb}
  @subsection Stream Pointer Positioning
  
  
  @code{Ada.Wide_Wide_Text_IO} is similar to @code{Ada.Text_IO} in its handling
! of stream pointer positioning (@ref{2a5,,Text_IO}).  There is one additional
  case:
  
  If @code{Ada.Wide_Wide_Text_IO.Look_Ahead} reads a character outside the
--- 22433,22444 ----
  @end menu
  
  @node Stream Pointer Positioning<3>,Reading and Writing Non-Regular Files<3>,,Wide_Wide_Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o stream-pointer-positioning-2}@anchor{2be}@anchor{gnat_rm/the_implementation_of_standard_i_o id17}@anchor{2bf}
  @subsection Stream Pointer Positioning
  
  
  @code{Ada.Wide_Wide_Text_IO} is similar to @code{Ada.Text_IO} in its handling
! of stream pointer positioning (@ref{2a9,,Text_IO}).  There is one additional
  case:
  
  If @code{Ada.Wide_Wide_Text_IO.Look_Ahead} reads a character outside the
*************** to a normal program using @code{Wide_Wid
*** 22320,22326 ****
  can be observed if the wide text file shares a stream with another file.
  
  @node Reading and Writing Non-Regular Files<3>,,Stream Pointer Positioning<3>,Wide_Wide_Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o id18}@anchor{2bc}@anchor{gnat_rm/the_implementation_of_standard_i_o reading-and-writing-non-regular-files-2}@anchor{2bd}
  @subsection Reading and Writing Non-Regular Files
  
  
--- 22457,22463 ----
  can be observed if the wide text file shares a stream with another file.
  
  @node Reading and Writing Non-Regular Files<3>,,Stream Pointer Positioning<3>,Wide_Wide_Text_IO
! @anchor{gnat_rm/the_implementation_of_standard_i_o id18}@anchor{2c0}@anchor{gnat_rm/the_implementation_of_standard_i_o reading-and-writing-non-regular-files-2}@anchor{2c1}
  @subsection Reading and Writing Non-Regular Files
  
  
*************** treated as data characters), and @code{E
*** 22331,22337 ****
  it is possible to read beyond an end of file.
  
  @node Stream_IO,Text Translation,Wide_Wide_Text_IO,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o id19}@anchor{2be}@anchor{gnat_rm/the_implementation_of_standard_i_o stream-io}@anchor{2bf}
  @section Stream_IO
  
  
--- 22468,22474 ----
  it is possible to read beyond an end of file.
  
  @node Stream_IO,Text Translation,Wide_Wide_Text_IO,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o id19}@anchor{2c2}@anchor{gnat_rm/the_implementation_of_standard_i_o stream-io}@anchor{2c3}
  @section Stream_IO
  
  
*************** manner described for stream attributes.
*** 22353,22359 ****
  @end itemize
  
  @node Text Translation,Shared Files,Stream_IO,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o id20}@anchor{2c0}@anchor{gnat_rm/the_implementation_of_standard_i_o text-translation}@anchor{2c1}
  @section Text Translation
  
  
--- 22490,22496 ----
  @end itemize
  
  @node Text Translation,Shared Files,Stream_IO,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o id20}@anchor{2c4}@anchor{gnat_rm/the_implementation_of_standard_i_o text-translation}@anchor{2c5}
  @section Text Translation
  
  
*************** mode. (corresponds to_O_U16TEXT).
*** 22387,22393 ****
  @end itemize
  
  @node Shared Files,Filenames encoding,Text Translation,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o id21}@anchor{2c2}@anchor{gnat_rm/the_implementation_of_standard_i_o shared-files}@anchor{2c3}
  @section Shared Files
  
  
--- 22524,22530 ----
  @end itemize
  
  @node Shared Files,Filenames encoding,Text Translation,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o id21}@anchor{2c6}@anchor{gnat_rm/the_implementation_of_standard_i_o shared-files}@anchor{2c7}
  @section Shared Files
  
  
*************** heterogeneous input-output.  Although th
*** 22450,22456 ****
  for this purpose (using the stream attributes)
  
  @node Filenames encoding,File content encoding,Shared Files,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o filenames-encoding}@anchor{2c4}@anchor{gnat_rm/the_implementation_of_standard_i_o id22}@anchor{2c5}
  @section Filenames encoding
  
  
--- 22587,22593 ----
  for this purpose (using the stream attributes)
  
  @node Filenames encoding,File content encoding,Shared Files,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o filenames-encoding}@anchor{2c8}@anchor{gnat_rm/the_implementation_of_standard_i_o id22}@anchor{2c9}
  @section Filenames encoding
  
  
*************** platform. On the other Operating Systems
*** 22490,22496 ****
  UTF-8 natively.
  
  @node File content encoding,Open Modes,Filenames encoding,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o file-content-encoding}@anchor{2c6}@anchor{gnat_rm/the_implementation_of_standard_i_o id23}@anchor{2c7}
  @section File content encoding
  
  
--- 22627,22633 ----
  UTF-8 natively.
  
  @node File content encoding,Open Modes,Filenames encoding,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o file-content-encoding}@anchor{2ca}@anchor{gnat_rm/the_implementation_of_standard_i_o id23}@anchor{2cb}
  @section File content encoding
  
  
*************** Unicode 8-bit encoding
*** 22523,22529 ****
  This encoding is only supported on the Windows platform.
  
  @node Open Modes,Operations on C Streams,File content encoding,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o open-modes}@anchor{2c8}@anchor{gnat_rm/the_implementation_of_standard_i_o id24}@anchor{2c9}
  @section Open Modes
  
  
--- 22660,22666 ----
  This encoding is only supported on the Windows platform.
  
  @node Open Modes,Operations on C Streams,File content encoding,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o open-modes}@anchor{2cc}@anchor{gnat_rm/the_implementation_of_standard_i_o id24}@anchor{2cd}
  @section Open Modes
  
  
*************** subsequently requires switching from rea
*** 22626,22632 ****
  then the file is reopened in @code{r+} mode to permit the required operation.
  
  @node Operations on C Streams,Interfacing to C Streams,Open Modes,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o operations-on-c-streams}@anchor{2ca}@anchor{gnat_rm/the_implementation_of_standard_i_o id25}@anchor{2cb}
  @section Operations on C Streams
  
  
--- 22763,22769 ----
  then the file is reopened in @code{r+} mode to permit the required operation.
  
  @node Operations on C Streams,Interfacing to C Streams,Open Modes,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o operations-on-c-streams}@anchor{2ce}@anchor{gnat_rm/the_implementation_of_standard_i_o id25}@anchor{2cf}
  @section Operations on C Streams
  
  
*************** end Interfaces.C_Streams;
*** 22786,22792 ****
  @end example
  
  @node Interfacing to C Streams,,Operations on C Streams,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o interfacing-to-c-streams}@anchor{2cc}@anchor{gnat_rm/the_implementation_of_standard_i_o id26}@anchor{2cd}
  @section Interfacing to C Streams
  
  
--- 22923,22929 ----
  @end example
  
  @node Interfacing to C Streams,,Operations on C Streams,The Implementation of Standard I/O
! @anchor{gnat_rm/the_implementation_of_standard_i_o interfacing-to-c-streams}@anchor{2d0}@anchor{gnat_rm/the_implementation_of_standard_i_o id26}@anchor{2d1}
  @section Interfacing to C Streams
  
  
*************** imported from a C program, allowing an A
*** 22879,22885 ****
  existing C file.
  
  @node The GNAT Library,Interfacing to Other Languages,The Implementation of Standard I/O,Top
! @anchor{gnat_rm/the_gnat_library the-gnat-library}@anchor{10}@anchor{gnat_rm/the_gnat_library doc}@anchor{2ce}@anchor{gnat_rm/the_gnat_library id1}@anchor{2cf}
  @chapter The GNAT Library
  
  
--- 23016,23022 ----
  existing C file.
  
  @node The GNAT Library,Interfacing to Other Languages,The Implementation of Standard I/O,Top
! @anchor{gnat_rm/the_gnat_library the-gnat-library}@anchor{10}@anchor{gnat_rm/the_gnat_library doc}@anchor{2d2}@anchor{gnat_rm/the_gnat_library id1}@anchor{2d3}
  @chapter The GNAT Library
  
  
*************** of GNAT, and will generate a warning mes
*** 22957,22962 ****
--- 23094,23100 ----
  * GNAT.Array_Split (g-arrspl.ads): GNAT Array_Split g-arrspl ads. 
  * GNAT.AWK (g-awk.ads): GNAT AWK g-awk ads. 
  * GNAT.Bind_Environment (g-binenv.ads): GNAT Bind_Environment g-binenv ads. 
+ * GNAT.Branch_Prediction (g-brapre.ads): GNAT Branch_Prediction g-brapre ads. 
  * GNAT.Bounded_Buffers (g-boubuf.ads): GNAT Bounded_Buffers g-boubuf ads. 
  * GNAT.Bounded_Mailboxes (g-boumai.ads): GNAT Bounded_Mailboxes g-boumai ads. 
  * GNAT.Bubble_Sort (g-bubsor.ads): GNAT Bubble_Sort g-bubsor ads. 
*************** of GNAT, and will generate a warning mes
*** 23071,23077 ****
  @end menu
  
  @node Ada Characters Latin_9 a-chlat9 ads,Ada Characters Wide_Latin_1 a-cwila1 ads,,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id2}@anchor{2d0}@anchor{gnat_rm/the_gnat_library ada-characters-latin-9-a-chlat9-ads}@anchor{2d1}
  @section @code{Ada.Characters.Latin_9} (@code{a-chlat9.ads})
  
  
--- 23209,23215 ----
  @end menu
  
  @node Ada Characters Latin_9 a-chlat9 ads,Ada Characters Wide_Latin_1 a-cwila1 ads,,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id2}@anchor{2d4}@anchor{gnat_rm/the_gnat_library ada-characters-latin-9-a-chlat9-ads}@anchor{2d5}
  @section @code{Ada.Characters.Latin_9} (@code{a-chlat9.ads})
  
  
*************** is specifically authorized by the Ada Re
*** 23088,23094 ****
  (RM A.3.3(27)).
  
  @node Ada Characters Wide_Latin_1 a-cwila1 ads,Ada Characters Wide_Latin_9 a-cwila1 ads,Ada Characters Latin_9 a-chlat9 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-characters-wide-latin-1-a-cwila1-ads}@anchor{2d2}@anchor{gnat_rm/the_gnat_library id3}@anchor{2d3}
  @section @code{Ada.Characters.Wide_Latin_1} (@code{a-cwila1.ads})
  
  
--- 23226,23232 ----
  (RM A.3.3(27)).
  
  @node Ada Characters Wide_Latin_1 a-cwila1 ads,Ada Characters Wide_Latin_9 a-cwila1 ads,Ada Characters Latin_9 a-chlat9 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-characters-wide-latin-1-a-cwila1-ads}@anchor{2d6}@anchor{gnat_rm/the_gnat_library id3}@anchor{2d7}
  @section @code{Ada.Characters.Wide_Latin_1} (@code{a-cwila1.ads})
  
  
*************** is specifically authorized by the Ada Re
*** 23105,23111 ****
  (RM A.3.3(27)).
  
  @node Ada Characters Wide_Latin_9 a-cwila1 ads,Ada Characters Wide_Wide_Latin_1 a-chzla1 ads,Ada Characters Wide_Latin_1 a-cwila1 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id4}@anchor{2d4}@anchor{gnat_rm/the_gnat_library ada-characters-wide-latin-9-a-cwila1-ads}@anchor{2d5}
  @section @code{Ada.Characters.Wide_Latin_9} (@code{a-cwila1.ads})
  
  
--- 23243,23249 ----
  (RM A.3.3(27)).
  
  @node Ada Characters Wide_Latin_9 a-cwila1 ads,Ada Characters Wide_Wide_Latin_1 a-chzla1 ads,Ada Characters Wide_Latin_1 a-cwila1 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id4}@anchor{2d8}@anchor{gnat_rm/the_gnat_library ada-characters-wide-latin-9-a-cwila1-ads}@anchor{2d9}
  @section @code{Ada.Characters.Wide_Latin_9} (@code{a-cwila1.ads})
  
  
*************** is specifically authorized by the Ada Re
*** 23122,23128 ****
  (RM A.3.3(27)).
  
  @node Ada Characters Wide_Wide_Latin_1 a-chzla1 ads,Ada Characters Wide_Wide_Latin_9 a-chzla9 ads,Ada Characters Wide_Latin_9 a-cwila1 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-characters-wide-wide-latin-1-a-chzla1-ads}@anchor{2d6}@anchor{gnat_rm/the_gnat_library id5}@anchor{2d7}
  @section @code{Ada.Characters.Wide_Wide_Latin_1} (@code{a-chzla1.ads})
  
  
--- 23260,23266 ----
  (RM A.3.3(27)).
  
  @node Ada Characters Wide_Wide_Latin_1 a-chzla1 ads,Ada Characters Wide_Wide_Latin_9 a-chzla9 ads,Ada Characters Wide_Latin_9 a-cwila1 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-characters-wide-wide-latin-1-a-chzla1-ads}@anchor{2da}@anchor{gnat_rm/the_gnat_library id5}@anchor{2db}
  @section @code{Ada.Characters.Wide_Wide_Latin_1} (@code{a-chzla1.ads})
  
  
*************** is specifically authorized by the Ada Re
*** 23139,23145 ****
  (RM A.3.3(27)).
  
  @node Ada Characters Wide_Wide_Latin_9 a-chzla9 ads,Ada Containers Formal_Doubly_Linked_Lists a-cfdlli ads,Ada Characters Wide_Wide_Latin_1 a-chzla1 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-characters-wide-wide-latin-9-a-chzla9-ads}@anchor{2d8}@anchor{gnat_rm/the_gnat_library id6}@anchor{2d9}
  @section @code{Ada.Characters.Wide_Wide_Latin_9} (@code{a-chzla9.ads})
  
  
--- 23277,23283 ----
  (RM A.3.3(27)).
  
  @node Ada Characters Wide_Wide_Latin_9 a-chzla9 ads,Ada Containers Formal_Doubly_Linked_Lists a-cfdlli ads,Ada Characters Wide_Wide_Latin_1 a-chzla1 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-characters-wide-wide-latin-9-a-chzla9-ads}@anchor{2dc}@anchor{gnat_rm/the_gnat_library id6}@anchor{2dd}
  @section @code{Ada.Characters.Wide_Wide_Latin_9} (@code{a-chzla9.ads})
  
  
*************** is specifically authorized by the Ada Re
*** 23156,23162 ****
  (RM A.3.3(27)).
  
  @node Ada Containers Formal_Doubly_Linked_Lists a-cfdlli ads,Ada Containers Formal_Hashed_Maps a-cfhama ads,Ada Characters Wide_Wide_Latin_9 a-chzla9 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id7}@anchor{2da}@anchor{gnat_rm/the_gnat_library ada-containers-formal-doubly-linked-lists-a-cfdlli-ads}@anchor{2db}
  @section @code{Ada.Containers.Formal_Doubly_Linked_Lists} (@code{a-cfdlli.ads})
  
  
--- 23294,23300 ----
  (RM A.3.3(27)).
  
  @node Ada Containers Formal_Doubly_Linked_Lists a-cfdlli ads,Ada Containers Formal_Hashed_Maps a-cfhama ads,Ada Characters Wide_Wide_Latin_9 a-chzla9 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id7}@anchor{2de}@anchor{gnat_rm/the_gnat_library ada-containers-formal-doubly-linked-lists-a-cfdlli-ads}@anchor{2df}
  @section @code{Ada.Containers.Formal_Doubly_Linked_Lists} (@code{a-cfdlli.ads})
  
  
*************** efficient version than the one defined i
*** 23175,23181 ****
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Formal_Hashed_Maps a-cfhama ads,Ada Containers Formal_Hashed_Sets a-cfhase ads,Ada Containers Formal_Doubly_Linked_Lists a-cfdlli ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id8}@anchor{2dc}@anchor{gnat_rm/the_gnat_library ada-containers-formal-hashed-maps-a-cfhama-ads}@anchor{2dd}
  @section @code{Ada.Containers.Formal_Hashed_Maps} (@code{a-cfhama.ads})
  
  
--- 23313,23319 ----
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Formal_Hashed_Maps a-cfhama ads,Ada Containers Formal_Hashed_Sets a-cfhase ads,Ada Containers Formal_Doubly_Linked_Lists a-cfdlli ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id8}@anchor{2e0}@anchor{gnat_rm/the_gnat_library ada-containers-formal-hashed-maps-a-cfhama-ads}@anchor{2e1}
  @section @code{Ada.Containers.Formal_Hashed_Maps} (@code{a-cfhama.ads})
  
  
*************** efficient version than the one defined i
*** 23194,23200 ****
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Formal_Hashed_Sets a-cfhase ads,Ada Containers Formal_Ordered_Maps a-cforma ads,Ada Containers Formal_Hashed_Maps a-cfhama ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id9}@anchor{2de}@anchor{gnat_rm/the_gnat_library ada-containers-formal-hashed-sets-a-cfhase-ads}@anchor{2df}
  @section @code{Ada.Containers.Formal_Hashed_Sets} (@code{a-cfhase.ads})
  
  
--- 23332,23338 ----
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Formal_Hashed_Sets a-cfhase ads,Ada Containers Formal_Ordered_Maps a-cforma ads,Ada Containers Formal_Hashed_Maps a-cfhama ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id9}@anchor{2e2}@anchor{gnat_rm/the_gnat_library ada-containers-formal-hashed-sets-a-cfhase-ads}@anchor{2e3}
  @section @code{Ada.Containers.Formal_Hashed_Sets} (@code{a-cfhase.ads})
  
  
*************** efficient version than the one defined i
*** 23213,23219 ****
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Formal_Ordered_Maps a-cforma ads,Ada Containers Formal_Ordered_Sets a-cforse ads,Ada Containers Formal_Hashed_Sets a-cfhase ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id10}@anchor{2e0}@anchor{gnat_rm/the_gnat_library ada-containers-formal-ordered-maps-a-cforma-ads}@anchor{2e1}
  @section @code{Ada.Containers.Formal_Ordered_Maps} (@code{a-cforma.ads})
  
  
--- 23351,23357 ----
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Formal_Ordered_Maps a-cforma ads,Ada Containers Formal_Ordered_Sets a-cforse ads,Ada Containers Formal_Hashed_Sets a-cfhase ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id10}@anchor{2e4}@anchor{gnat_rm/the_gnat_library ada-containers-formal-ordered-maps-a-cforma-ads}@anchor{2e5}
  @section @code{Ada.Containers.Formal_Ordered_Maps} (@code{a-cforma.ads})
  
  
*************** efficient version than the one defined i
*** 23232,23238 ****
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Formal_Ordered_Sets a-cforse ads,Ada Containers Formal_Vectors a-cofove ads,Ada Containers Formal_Ordered_Maps a-cforma ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-containers-formal-ordered-sets-a-cforse-ads}@anchor{2e2}@anchor{gnat_rm/the_gnat_library id11}@anchor{2e3}
  @section @code{Ada.Containers.Formal_Ordered_Sets} (@code{a-cforse.ads})
  
  
--- 23370,23376 ----
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Formal_Ordered_Sets a-cforse ads,Ada Containers Formal_Vectors a-cofove ads,Ada Containers Formal_Ordered_Maps a-cforma ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-containers-formal-ordered-sets-a-cforse-ads}@anchor{2e6}@anchor{gnat_rm/the_gnat_library id11}@anchor{2e7}
  @section @code{Ada.Containers.Formal_Ordered_Sets} (@code{a-cforse.ads})
  
  
*************** efficient version than the one defined i
*** 23251,23257 ****
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Formal_Vectors a-cofove ads,Ada Containers Formal_Indefinite_Vectors a-cfinve ads,Ada Containers Formal_Ordered_Sets a-cforse ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id12}@anchor{2e4}@anchor{gnat_rm/the_gnat_library ada-containers-formal-vectors-a-cofove-ads}@anchor{2e5}
  @section @code{Ada.Containers.Formal_Vectors} (@code{a-cofove.ads})
  
  
--- 23389,23395 ----
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Formal_Vectors a-cofove ads,Ada Containers Formal_Indefinite_Vectors a-cfinve ads,Ada Containers Formal_Ordered_Sets a-cforse ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id12}@anchor{2e8}@anchor{gnat_rm/the_gnat_library ada-containers-formal-vectors-a-cofove-ads}@anchor{2e9}
  @section @code{Ada.Containers.Formal_Vectors} (@code{a-cofove.ads})
  
  
*************** efficient version than the one defined i
*** 23270,23276 ****
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Formal_Indefinite_Vectors a-cfinve ads,Ada Containers Functional_Vectors a-cofuve ads,Ada Containers Formal_Vectors a-cofove ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id13}@anchor{2e6}@anchor{gnat_rm/the_gnat_library ada-containers-formal-indefinite-vectors-a-cfinve-ads}@anchor{2e7}
  @section @code{Ada.Containers.Formal_Indefinite_Vectors} (@code{a-cfinve.ads})
  
  
--- 23408,23414 ----
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Formal_Indefinite_Vectors a-cfinve ads,Ada Containers Functional_Vectors a-cofuve ads,Ada Containers Formal_Vectors a-cofove ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id13}@anchor{2ea}@anchor{gnat_rm/the_gnat_library ada-containers-formal-indefinite-vectors-a-cfinve-ads}@anchor{2eb}
  @section @code{Ada.Containers.Formal_Indefinite_Vectors} (@code{a-cfinve.ads})
  
  
*************** efficient version than the one defined i
*** 23289,23295 ****
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Functional_Vectors a-cofuve ads,Ada Containers Functional_Sets a-cofuse ads,Ada Containers Formal_Indefinite_Vectors a-cfinve ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id14}@anchor{2e8}@anchor{gnat_rm/the_gnat_library ada-containers-functional-vectors-a-cofuve-ads}@anchor{2e9}
  @section @code{Ada.Containers.Functional_Vectors} (@code{a-cofuve.ads})
  
  
--- 23427,23433 ----
  does not have the complex overhead required to detect cursor tampering.
  
  @node Ada Containers Functional_Vectors a-cofuve ads,Ada Containers Functional_Sets a-cofuse ads,Ada Containers Formal_Indefinite_Vectors a-cfinve ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id14}@anchor{2ec}@anchor{gnat_rm/the_gnat_library ada-containers-functional-vectors-a-cofuve-ads}@anchor{2ed}
  @section @code{Ada.Containers.Functional_Vectors} (@code{a-cofuve.ads})
  
  
*************** and annotations, so that they can be rem
*** 23311,23317 ****
  specification of this unit is compatible with SPARK 2014.
  
  @node Ada Containers Functional_Sets a-cofuse ads,Ada Containers Functional_Maps a-cofuma ads,Ada Containers Functional_Vectors a-cofuve ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-containers-functional-sets-a-cofuse-ads}@anchor{2ea}@anchor{gnat_rm/the_gnat_library id15}@anchor{2eb}
  @section @code{Ada.Containers.Functional_Sets} (@code{a-cofuse.ads})
  
  
--- 23449,23455 ----
  specification of this unit is compatible with SPARK 2014.
  
  @node Ada Containers Functional_Sets a-cofuse ads,Ada Containers Functional_Maps a-cofuma ads,Ada Containers Functional_Vectors a-cofuve ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-containers-functional-sets-a-cofuse-ads}@anchor{2ee}@anchor{gnat_rm/the_gnat_library id15}@anchor{2ef}
  @section @code{Ada.Containers.Functional_Sets} (@code{a-cofuse.ads})
  
  
*************** and annotations, so that they can be rem
*** 23333,23339 ****
  specification of this unit is compatible with SPARK 2014.
  
  @node Ada Containers Functional_Maps a-cofuma ads,Ada Containers Bounded_Holders a-coboho ads,Ada Containers Functional_Sets a-cofuse ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id16}@anchor{2ec}@anchor{gnat_rm/the_gnat_library ada-containers-functional-maps-a-cofuma-ads}@anchor{2ed}
  @section @code{Ada.Containers.Functional_Maps} (@code{a-cofuma.ads})
  
  
--- 23471,23477 ----
  specification of this unit is compatible with SPARK 2014.
  
  @node Ada Containers Functional_Maps a-cofuma ads,Ada Containers Bounded_Holders a-coboho ads,Ada Containers Functional_Sets a-cofuse ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id16}@anchor{2f0}@anchor{gnat_rm/the_gnat_library ada-containers-functional-maps-a-cofuma-ads}@anchor{2f1}
  @section @code{Ada.Containers.Functional_Maps} (@code{a-cofuma.ads})
  
  
*************** and annotations, so that they can be rem
*** 23355,23361 ****
  specification of this unit is compatible with SPARK 2014.
  
  @node Ada Containers Bounded_Holders a-coboho ads,Ada Command_Line Environment a-colien ads,Ada Containers Functional_Maps a-cofuma ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-containers-bounded-holders-a-coboho-ads}@anchor{2ee}@anchor{gnat_rm/the_gnat_library id17}@anchor{2ef}
  @section @code{Ada.Containers.Bounded_Holders} (@code{a-coboho.ads})
  
  
--- 23493,23499 ----
  specification of this unit is compatible with SPARK 2014.
  
  @node Ada Containers Bounded_Holders a-coboho ads,Ada Command_Line Environment a-colien ads,Ada Containers Functional_Maps a-cofuma ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-containers-bounded-holders-a-coboho-ads}@anchor{2f2}@anchor{gnat_rm/the_gnat_library id17}@anchor{2f3}
  @section @code{Ada.Containers.Bounded_Holders} (@code{a-coboho.ads})
  
  
*************** This child of @code{Ada.Containers} defi
*** 23367,23373 ****
  Indefinite_Holders that avoids heap allocation.
  
  @node Ada Command_Line Environment a-colien ads,Ada Command_Line Remove a-colire ads,Ada Containers Bounded_Holders a-coboho ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-command-line-environment-a-colien-ads}@anchor{2f0}@anchor{gnat_rm/the_gnat_library id18}@anchor{2f1}
  @section @code{Ada.Command_Line.Environment} (@code{a-colien.ads})
  
  
--- 23505,23511 ----
  Indefinite_Holders that avoids heap allocation.
  
  @node Ada Command_Line Environment a-colien ads,Ada Command_Line Remove a-colire ads,Ada Containers Bounded_Holders a-coboho ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-command-line-environment-a-colien-ads}@anchor{2f4}@anchor{gnat_rm/the_gnat_library id18}@anchor{2f5}
  @section @code{Ada.Command_Line.Environment} (@code{a-colien.ads})
  
  
*************** provides a mechanism for obtaining envir
*** 23380,23386 ****
  where this concept makes sense.
  
  @node Ada Command_Line Remove a-colire ads,Ada Command_Line Response_File a-clrefi ads,Ada Command_Line Environment a-colien ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id19}@anchor{2f2}@anchor{gnat_rm/the_gnat_library ada-command-line-remove-a-colire-ads}@anchor{2f3}
  @section @code{Ada.Command_Line.Remove} (@code{a-colire.ads})
  
  
--- 23518,23524 ----
  where this concept makes sense.
  
  @node Ada Command_Line Remove a-colire ads,Ada Command_Line Response_File a-clrefi ads,Ada Command_Line Environment a-colien ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id19}@anchor{2f6}@anchor{gnat_rm/the_gnat_library ada-command-line-remove-a-colire-ads}@anchor{2f7}
  @section @code{Ada.Command_Line.Remove} (@code{a-colire.ads})
  
  
*************** to further calls on the subprograms in @
*** 23398,23404 ****
  see the removed argument.
  
  @node Ada Command_Line Response_File a-clrefi ads,Ada Direct_IO C_Streams a-diocst ads,Ada Command_Line Remove a-colire ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id20}@anchor{2f4}@anchor{gnat_rm/the_gnat_library ada-command-line-response-file-a-clrefi-ads}@anchor{2f5}
  @section @code{Ada.Command_Line.Response_File} (@code{a-clrefi.ads})
  
  
--- 23536,23542 ----
  see the removed argument.
  
  @node Ada Command_Line Response_File a-clrefi ads,Ada Direct_IO C_Streams a-diocst ads,Ada Command_Line Remove a-colire ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id20}@anchor{2f8}@anchor{gnat_rm/the_gnat_library ada-command-line-response-file-a-clrefi-ads}@anchor{2f9}
  @section @code{Ada.Command_Line.Response_File} (@code{a-clrefi.ads})
  
  
*************** Using a response file allow passing a se
*** 23418,23424 ****
  than the maximum allowed by the system on the command line.
  
  @node Ada Direct_IO C_Streams a-diocst ads,Ada Exceptions Is_Null_Occurrence a-einuoc ads,Ada Command_Line Response_File a-clrefi ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id21}@anchor{2f6}@anchor{gnat_rm/the_gnat_library ada-direct-io-c-streams-a-diocst-ads}@anchor{2f7}
  @section @code{Ada.Direct_IO.C_Streams} (@code{a-diocst.ads})
  
  
--- 23556,23562 ----
  than the maximum allowed by the system on the command line.
  
  @node Ada Direct_IO C_Streams a-diocst ads,Ada Exceptions Is_Null_Occurrence a-einuoc ads,Ada Command_Line Response_File a-clrefi ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id21}@anchor{2fa}@anchor{gnat_rm/the_gnat_library ada-direct-io-c-streams-a-diocst-ads}@anchor{2fb}
  @section @code{Ada.Direct_IO.C_Streams} (@code{a-diocst.ads})
  
  
*************** extracted from a file opened on the Ada
*** 23433,23439 ****
  can be constructed from a stream opened on the C side.
  
  @node Ada Exceptions Is_Null_Occurrence a-einuoc ads,Ada Exceptions Last_Chance_Handler a-elchha ads,Ada Direct_IO C_Streams a-diocst ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id22}@anchor{2f8}@anchor{gnat_rm/the_gnat_library ada-exceptions-is-null-occurrence-a-einuoc-ads}@anchor{2f9}
  @section @code{Ada.Exceptions.Is_Null_Occurrence} (@code{a-einuoc.ads})
  
  
--- 23571,23577 ----
  can be constructed from a stream opened on the C side.
  
  @node Ada Exceptions Is_Null_Occurrence a-einuoc ads,Ada Exceptions Last_Chance_Handler a-elchha ads,Ada Direct_IO C_Streams a-diocst ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id22}@anchor{2fc}@anchor{gnat_rm/the_gnat_library ada-exceptions-is-null-occurrence-a-einuoc-ads}@anchor{2fd}
  @section @code{Ada.Exceptions.Is_Null_Occurrence} (@code{a-einuoc.ads})
  
  
*************** exception occurrence (@code{Null_Occurre
*** 23447,23453 ****
  an exception.
  
  @node Ada Exceptions Last_Chance_Handler a-elchha ads,Ada Exceptions Traceback a-exctra ads,Ada Exceptions Is_Null_Occurrence a-einuoc ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id23}@anchor{2fa}@anchor{gnat_rm/the_gnat_library ada-exceptions-last-chance-handler-a-elchha-ads}@anchor{2fb}
  @section @code{Ada.Exceptions.Last_Chance_Handler} (@code{a-elchha.ads})
  
  
--- 23585,23591 ----
  an exception.
  
  @node Ada Exceptions Last_Chance_Handler a-elchha ads,Ada Exceptions Traceback a-exctra ads,Ada Exceptions Is_Null_Occurrence a-einuoc ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id23}@anchor{2fe}@anchor{gnat_rm/the_gnat_library ada-exceptions-last-chance-handler-a-elchha-ads}@anchor{2ff}
  @section @code{Ada.Exceptions.Last_Chance_Handler} (@code{a-elchha.ads})
  
  
*************** exceptions (hence the name last chance),
*** 23461,23467 ****
  terminating the program. Note that this subprogram never returns.
  
  @node Ada Exceptions Traceback a-exctra ads,Ada Sequential_IO C_Streams a-siocst ads,Ada Exceptions Last_Chance_Handler a-elchha ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-exceptions-traceback-a-exctra-ads}@anchor{2fc}@anchor{gnat_rm/the_gnat_library id24}@anchor{2fd}
  @section @code{Ada.Exceptions.Traceback} (@code{a-exctra.ads})
  
  
--- 23599,23605 ----
  terminating the program. Note that this subprogram never returns.
  
  @node Ada Exceptions Traceback a-exctra ads,Ada Sequential_IO C_Streams a-siocst ads,Ada Exceptions Last_Chance_Handler a-elchha ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-exceptions-traceback-a-exctra-ads}@anchor{300}@anchor{gnat_rm/the_gnat_library id24}@anchor{301}
  @section @code{Ada.Exceptions.Traceback} (@code{a-exctra.ads})
  
  
*************** give a traceback array of addresses base
*** 23474,23480 ****
  occurrence.
  
  @node Ada Sequential_IO C_Streams a-siocst ads,Ada Streams Stream_IO C_Streams a-ssicst ads,Ada Exceptions Traceback a-exctra ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-sequential-io-c-streams-a-siocst-ads}@anchor{2fe}@anchor{gnat_rm/the_gnat_library id25}@anchor{2ff}
  @section @code{Ada.Sequential_IO.C_Streams} (@code{a-siocst.ads})
  
  
--- 23612,23618 ----
  occurrence.
  
  @node Ada Sequential_IO C_Streams a-siocst ads,Ada Streams Stream_IO C_Streams a-ssicst ads,Ada Exceptions Traceback a-exctra ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-sequential-io-c-streams-a-siocst-ads}@anchor{302}@anchor{gnat_rm/the_gnat_library id25}@anchor{303}
  @section @code{Ada.Sequential_IO.C_Streams} (@code{a-siocst.ads})
  
  
*************** extracted from a file opened on the Ada
*** 23489,23495 ****
  can be constructed from a stream opened on the C side.
  
  @node Ada Streams Stream_IO C_Streams a-ssicst ads,Ada Strings Unbounded Text_IO a-suteio ads,Ada Sequential_IO C_Streams a-siocst ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id26}@anchor{300}@anchor{gnat_rm/the_gnat_library ada-streams-stream-io-c-streams-a-ssicst-ads}@anchor{301}
  @section @code{Ada.Streams.Stream_IO.C_Streams} (@code{a-ssicst.ads})
  
  
--- 23627,23633 ----
  can be constructed from a stream opened on the C side.
  
  @node Ada Streams Stream_IO C_Streams a-ssicst ads,Ada Strings Unbounded Text_IO a-suteio ads,Ada Sequential_IO C_Streams a-siocst ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id26}@anchor{304}@anchor{gnat_rm/the_gnat_library ada-streams-stream-io-c-streams-a-ssicst-ads}@anchor{305}
  @section @code{Ada.Streams.Stream_IO.C_Streams} (@code{a-ssicst.ads})
  
  
*************** extracted from a file opened on the Ada
*** 23504,23510 ****
  can be constructed from a stream opened on the C side.
  
  @node Ada Strings Unbounded Text_IO a-suteio ads,Ada Strings Wide_Unbounded Wide_Text_IO a-swuwti ads,Ada Streams Stream_IO C_Streams a-ssicst ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-strings-unbounded-text-io-a-suteio-ads}@anchor{302}@anchor{gnat_rm/the_gnat_library id27}@anchor{303}
  @section @code{Ada.Strings.Unbounded.Text_IO} (@code{a-suteio.ads})
  
  
--- 23642,23648 ----
  can be constructed from a stream opened on the C side.
  
  @node Ada Strings Unbounded Text_IO a-suteio ads,Ada Strings Wide_Unbounded Wide_Text_IO a-swuwti ads,Ada Streams Stream_IO C_Streams a-ssicst ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-strings-unbounded-text-io-a-suteio-ads}@anchor{306}@anchor{gnat_rm/the_gnat_library id27}@anchor{307}
  @section @code{Ada.Strings.Unbounded.Text_IO} (@code{a-suteio.ads})
  
  
*************** strings, avoiding the necessity for an i
*** 23521,23527 ****
  with ordinary strings.
  
  @node Ada Strings Wide_Unbounded Wide_Text_IO a-swuwti ads,Ada Strings Wide_Wide_Unbounded Wide_Wide_Text_IO a-szuzti ads,Ada Strings Unbounded Text_IO a-suteio ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id28}@anchor{304}@anchor{gnat_rm/the_gnat_library ada-strings-wide-unbounded-wide-text-io-a-swuwti-ads}@anchor{305}
  @section @code{Ada.Strings.Wide_Unbounded.Wide_Text_IO} (@code{a-swuwti.ads})
  
  
--- 23659,23665 ----
  with ordinary strings.
  
  @node Ada Strings Wide_Unbounded Wide_Text_IO a-swuwti ads,Ada Strings Wide_Wide_Unbounded Wide_Wide_Text_IO a-szuzti ads,Ada Strings Unbounded Text_IO a-suteio ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id28}@anchor{308}@anchor{gnat_rm/the_gnat_library ada-strings-wide-unbounded-wide-text-io-a-swuwti-ads}@anchor{309}
  @section @code{Ada.Strings.Wide_Unbounded.Wide_Text_IO} (@code{a-swuwti.ads})
  
  
*************** wide strings, avoiding the necessity for
*** 23538,23544 ****
  with ordinary wide strings.
  
  @node Ada Strings Wide_Wide_Unbounded Wide_Wide_Text_IO a-szuzti ads,Ada Text_IO C_Streams a-tiocst ads,Ada Strings Wide_Unbounded Wide_Text_IO a-swuwti ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id29}@anchor{306}@anchor{gnat_rm/the_gnat_library ada-strings-wide-wide-unbounded-wide-wide-text-io-a-szuzti-ads}@anchor{307}
  @section @code{Ada.Strings.Wide_Wide_Unbounded.Wide_Wide_Text_IO} (@code{a-szuzti.ads})
  
  
--- 23676,23682 ----
  with ordinary wide strings.
  
  @node Ada Strings Wide_Wide_Unbounded Wide_Wide_Text_IO a-szuzti ads,Ada Text_IO C_Streams a-tiocst ads,Ada Strings Wide_Unbounded Wide_Text_IO a-swuwti ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id29}@anchor{30a}@anchor{gnat_rm/the_gnat_library ada-strings-wide-wide-unbounded-wide-wide-text-io-a-szuzti-ads}@anchor{30b}
  @section @code{Ada.Strings.Wide_Wide_Unbounded.Wide_Wide_Text_IO} (@code{a-szuzti.ads})
  
  
*************** wide wide strings, avoiding the necessit
*** 23555,23561 ****
  with ordinary wide wide strings.
  
  @node Ada Text_IO C_Streams a-tiocst ads,Ada Text_IO Reset_Standard_Files a-tirsfi ads,Ada Strings Wide_Wide_Unbounded Wide_Wide_Text_IO a-szuzti ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-text-io-c-streams-a-tiocst-ads}@anchor{308}@anchor{gnat_rm/the_gnat_library id30}@anchor{309}
  @section @code{Ada.Text_IO.C_Streams} (@code{a-tiocst.ads})
  
  
--- 23693,23699 ----
  with ordinary wide wide strings.
  
  @node Ada Text_IO C_Streams a-tiocst ads,Ada Text_IO Reset_Standard_Files a-tirsfi ads,Ada Strings Wide_Wide_Unbounded Wide_Wide_Text_IO a-szuzti ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-text-io-c-streams-a-tiocst-ads}@anchor{30c}@anchor{gnat_rm/the_gnat_library id30}@anchor{30d}
  @section @code{Ada.Text_IO.C_Streams} (@code{a-tiocst.ads})
  
  
*************** extracted from a file opened on the Ada
*** 23570,23576 ****
  can be constructed from a stream opened on the C side.
  
  @node Ada Text_IO Reset_Standard_Files a-tirsfi ads,Ada Wide_Characters Unicode a-wichun ads,Ada Text_IO C_Streams a-tiocst ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-text-io-reset-standard-files-a-tirsfi-ads}@anchor{30a}@anchor{gnat_rm/the_gnat_library id31}@anchor{30b}
  @section @code{Ada.Text_IO.Reset_Standard_Files} (@code{a-tirsfi.ads})
  
  
--- 23708,23714 ----
  can be constructed from a stream opened on the C side.
  
  @node Ada Text_IO Reset_Standard_Files a-tirsfi ads,Ada Wide_Characters Unicode a-wichun ads,Ada Text_IO C_Streams a-tiocst ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-text-io-reset-standard-files-a-tirsfi-ads}@anchor{30e}@anchor{gnat_rm/the_gnat_library id31}@anchor{30f}
  @section @code{Ada.Text_IO.Reset_Standard_Files} (@code{a-tirsfi.ads})
  
  
*************** execution (for example a standard input
*** 23585,23591 ****
  interactive).
  
  @node Ada Wide_Characters Unicode a-wichun ads,Ada Wide_Text_IO C_Streams a-wtcstr ads,Ada Text_IO Reset_Standard_Files a-tirsfi ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id32}@anchor{30c}@anchor{gnat_rm/the_gnat_library ada-wide-characters-unicode-a-wichun-ads}@anchor{30d}
  @section @code{Ada.Wide_Characters.Unicode} (@code{a-wichun.ads})
  
  
--- 23723,23729 ----
  interactive).
  
  @node Ada Wide_Characters Unicode a-wichun ads,Ada Wide_Text_IO C_Streams a-wtcstr ads,Ada Text_IO Reset_Standard_Files a-tirsfi ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id32}@anchor{310}@anchor{gnat_rm/the_gnat_library ada-wide-characters-unicode-a-wichun-ads}@anchor{311}
  @section @code{Ada.Wide_Characters.Unicode} (@code{a-wichun.ads})
  
  
*************** This package provides subprograms that a
*** 23598,23604 ****
  Wide_Character values according to Unicode categories.
  
  @node Ada Wide_Text_IO C_Streams a-wtcstr ads,Ada Wide_Text_IO Reset_Standard_Files a-wrstfi ads,Ada Wide_Characters Unicode a-wichun ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-wide-text-io-c-streams-a-wtcstr-ads}@anchor{30e}@anchor{gnat_rm/the_gnat_library id33}@anchor{30f}
  @section @code{Ada.Wide_Text_IO.C_Streams} (@code{a-wtcstr.ads})
  
  
--- 23736,23742 ----
  Wide_Character values according to Unicode categories.
  
  @node Ada Wide_Text_IO C_Streams a-wtcstr ads,Ada Wide_Text_IO Reset_Standard_Files a-wrstfi ads,Ada Wide_Characters Unicode a-wichun ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-wide-text-io-c-streams-a-wtcstr-ads}@anchor{312}@anchor{gnat_rm/the_gnat_library id33}@anchor{313}
  @section @code{Ada.Wide_Text_IO.C_Streams} (@code{a-wtcstr.ads})
  
  
*************** extracted from a file opened on the Ada
*** 23613,23619 ****
  can be constructed from a stream opened on the C side.
  
  @node Ada Wide_Text_IO Reset_Standard_Files a-wrstfi ads,Ada Wide_Wide_Characters Unicode a-zchuni ads,Ada Wide_Text_IO C_Streams a-wtcstr ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-wide-text-io-reset-standard-files-a-wrstfi-ads}@anchor{310}@anchor{gnat_rm/the_gnat_library id34}@anchor{311}
  @section @code{Ada.Wide_Text_IO.Reset_Standard_Files} (@code{a-wrstfi.ads})
  
  
--- 23751,23757 ----
  can be constructed from a stream opened on the C side.
  
  @node Ada Wide_Text_IO Reset_Standard_Files a-wrstfi ads,Ada Wide_Wide_Characters Unicode a-zchuni ads,Ada Wide_Text_IO C_Streams a-wtcstr ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library ada-wide-text-io-reset-standard-files-a-wrstfi-ads}@anchor{314}@anchor{gnat_rm/the_gnat_library id34}@anchor{315}
  @section @code{Ada.Wide_Text_IO.Reset_Standard_Files} (@code{a-wrstfi.ads})
  
  
*************** execution (for example a standard input
*** 23628,23634 ****
  interactive).
  
  @node Ada Wide_Wide_Characters Unicode a-zchuni ads,Ada Wide_Wide_Text_IO C_Streams a-ztcstr ads,Ada Wide_Text_IO Reset_Standard_Files a-wrstfi ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id35}@anchor{312}@anchor{gnat_rm/the_gnat_library ada-wide-wide-characters-unicode-a-zchuni-ads}@anchor{313}
  @section @code{Ada.Wide_Wide_Characters.Unicode} (@code{a-zchuni.ads})
  
  
--- 23766,23772 ----
  interactive).
  
  @node Ada Wide_Wide_Characters Unicode a-zchuni ads,Ada Wide_Wide_Text_IO C_Streams a-ztcstr ads,Ada Wide_Text_IO Reset_Standard_Files a-wrstfi ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id35}@anchor{316}@anchor{gnat_rm/the_gnat_library ada-wide-wide-characters-unicode-a-zchuni-ads}@anchor{317}
  @section @code{Ada.Wide_Wide_Characters.Unicode} (@code{a-zchuni.ads})
  
  
*************** This package provides subprograms that a
*** 23641,23647 ****
  Wide_Wide_Character values according to Unicode categories.
  
  @node Ada Wide_Wide_Text_IO C_Streams a-ztcstr ads,Ada Wide_Wide_Text_IO Reset_Standard_Files a-zrstfi ads,Ada Wide_Wide_Characters Unicode a-zchuni ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id36}@anchor{314}@anchor{gnat_rm/the_gnat_library ada-wide-wide-text-io-c-streams-a-ztcstr-ads}@anchor{315}
  @section @code{Ada.Wide_Wide_Text_IO.C_Streams} (@code{a-ztcstr.ads})
  
  
--- 23779,23785 ----
  Wide_Wide_Character values according to Unicode categories.
  
  @node Ada Wide_Wide_Text_IO C_Streams a-ztcstr ads,Ada Wide_Wide_Text_IO Reset_Standard_Files a-zrstfi ads,Ada Wide_Wide_Characters Unicode a-zchuni ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id36}@anchor{318}@anchor{gnat_rm/the_gnat_library ada-wide-wide-text-io-c-streams-a-ztcstr-ads}@anchor{319}
  @section @code{Ada.Wide_Wide_Text_IO.C_Streams} (@code{a-ztcstr.ads})
  
  
*************** extracted from a file opened on the Ada
*** 23656,23662 ****
  can be constructed from a stream opened on the C side.
  
  @node Ada Wide_Wide_Text_IO Reset_Standard_Files a-zrstfi ads,GNAT Altivec g-altive ads,Ada Wide_Wide_Text_IO C_Streams a-ztcstr ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id37}@anchor{316}@anchor{gnat_rm/the_gnat_library ada-wide-wide-text-io-reset-standard-files-a-zrstfi-ads}@anchor{317}
  @section @code{Ada.Wide_Wide_Text_IO.Reset_Standard_Files} (@code{a-zrstfi.ads})
  
  
--- 23794,23800 ----
  can be constructed from a stream opened on the C side.
  
  @node Ada Wide_Wide_Text_IO Reset_Standard_Files a-zrstfi ads,GNAT Altivec g-altive ads,Ada Wide_Wide_Text_IO C_Streams a-ztcstr ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id37}@anchor{31a}@anchor{gnat_rm/the_gnat_library ada-wide-wide-text-io-reset-standard-files-a-zrstfi-ads}@anchor{31b}
  @section @code{Ada.Wide_Wide_Text_IO.Reset_Standard_Files} (@code{a-zrstfi.ads})
  
  
*************** change during execution (for example a s
*** 23671,23677 ****
  redefined to be interactive).
  
  @node GNAT Altivec g-altive ads,GNAT Altivec Conversions g-altcon ads,Ada Wide_Wide_Text_IO Reset_Standard_Files a-zrstfi ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-altivec-g-altive-ads}@anchor{318}@anchor{gnat_rm/the_gnat_library id38}@anchor{319}
  @section @code{GNAT.Altivec} (@code{g-altive.ads})
  
  
--- 23809,23815 ----
  redefined to be interactive).
  
  @node GNAT Altivec g-altive ads,GNAT Altivec Conversions g-altcon ads,Ada Wide_Wide_Text_IO Reset_Standard_Files a-zrstfi ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-altivec-g-altive-ads}@anchor{31c}@anchor{gnat_rm/the_gnat_library id38}@anchor{31d}
  @section @code{GNAT.Altivec} (@code{g-altive.ads})
  
  
*************** definitions of constants and types commo
*** 23684,23690 ****
  binding.
  
  @node GNAT Altivec Conversions g-altcon ads,GNAT Altivec Vector_Operations g-alveop ads,GNAT Altivec g-altive ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-altivec-conversions-g-altcon-ads}@anchor{31a}@anchor{gnat_rm/the_gnat_library id39}@anchor{31b}
  @section @code{GNAT.Altivec.Conversions} (@code{g-altcon.ads})
  
  
--- 23822,23828 ----
  binding.
  
  @node GNAT Altivec Conversions g-altcon ads,GNAT Altivec Vector_Operations g-alveop ads,GNAT Altivec g-altive ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-altivec-conversions-g-altcon-ads}@anchor{31e}@anchor{gnat_rm/the_gnat_library id39}@anchor{31f}
  @section @code{GNAT.Altivec.Conversions} (@code{g-altcon.ads})
  
  
*************** binding.
*** 23695,23701 ****
  This package provides the Vector/View conversion routines.
  
  @node GNAT Altivec Vector_Operations g-alveop ads,GNAT Altivec Vector_Types g-alvety ads,GNAT Altivec Conversions g-altcon ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-altivec-vector-operations-g-alveop-ads}@anchor{31c}@anchor{gnat_rm/the_gnat_library id40}@anchor{31d}
  @section @code{GNAT.Altivec.Vector_Operations} (@code{g-alveop.ads})
  
  
--- 23833,23839 ----
  This package provides the Vector/View conversion routines.
  
  @node GNAT Altivec Vector_Operations g-alveop ads,GNAT Altivec Vector_Types g-alvety ads,GNAT Altivec Conversions g-altcon ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-altivec-vector-operations-g-alveop-ads}@anchor{320}@anchor{gnat_rm/the_gnat_library id40}@anchor{321}
  @section @code{GNAT.Altivec.Vector_Operations} (@code{g-alveop.ads})
  
  
*************** library. The hard binding is provided as
*** 23709,23715 ****
  is common to both bindings.
  
  @node GNAT Altivec Vector_Types g-alvety ads,GNAT Altivec Vector_Views g-alvevi ads,GNAT Altivec Vector_Operations g-alveop ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-altivec-vector-types-g-alvety-ads}@anchor{31e}@anchor{gnat_rm/the_gnat_library id41}@anchor{31f}
  @section @code{GNAT.Altivec.Vector_Types} (@code{g-alvety.ads})
  
  
--- 23847,23853 ----
  is common to both bindings.
  
  @node GNAT Altivec Vector_Types g-alvety ads,GNAT Altivec Vector_Views g-alvevi ads,GNAT Altivec Vector_Operations g-alveop ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-altivec-vector-types-g-alvety-ads}@anchor{322}@anchor{gnat_rm/the_gnat_library id41}@anchor{323}
  @section @code{GNAT.Altivec.Vector_Types} (@code{g-alvety.ads})
  
  
*************** This package exposes the various vector
*** 23721,23727 ****
  to AltiVec facilities.
  
  @node GNAT Altivec Vector_Views g-alvevi ads,GNAT Array_Split g-arrspl ads,GNAT Altivec Vector_Types g-alvety ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-altivec-vector-views-g-alvevi-ads}@anchor{320}@anchor{gnat_rm/the_gnat_library id42}@anchor{321}
  @section @code{GNAT.Altivec.Vector_Views} (@code{g-alvevi.ads})
  
  
--- 23859,23865 ----
  to AltiVec facilities.
  
  @node GNAT Altivec Vector_Views g-alvevi ads,GNAT Array_Split g-arrspl ads,GNAT Altivec Vector_Types g-alvety ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-altivec-vector-views-g-alvevi-ads}@anchor{324}@anchor{gnat_rm/the_gnat_library id42}@anchor{325}
  @section @code{GNAT.Altivec.Vector_Views} (@code{g-alvevi.ads})
  
  
*************** vector elements and provides a simple wa
*** 23736,23742 ****
  objects.
  
  @node GNAT Array_Split g-arrspl ads,GNAT AWK g-awk ads,GNAT Altivec Vector_Views g-alvevi ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-array-split-g-arrspl-ads}@anchor{322}@anchor{gnat_rm/the_gnat_library id43}@anchor{323}
  @section @code{GNAT.Array_Split} (@code{g-arrspl.ads})
  
  
--- 23874,23880 ----
  objects.
  
  @node GNAT Array_Split g-arrspl ads,GNAT AWK g-awk ads,GNAT Altivec Vector_Views g-alvevi ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-array-split-g-arrspl-ads}@anchor{326}@anchor{gnat_rm/the_gnat_library id43}@anchor{327}
  @section @code{GNAT.Array_Split} (@code{g-arrspl.ads})
  
  
*************** an array wherever the separators appear,
*** 23749,23755 ****
  to the resulting slices.
  
  @node GNAT AWK g-awk ads,GNAT Bind_Environment g-binenv ads,GNAT Array_Split g-arrspl ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id44}@anchor{324}@anchor{gnat_rm/the_gnat_library gnat-awk-g-awk-ads}@anchor{325}
  @section @code{GNAT.AWK} (@code{g-awk.ads})
  
  
--- 23887,23893 ----
  to the resulting slices.
  
  @node GNAT AWK g-awk ads,GNAT Bind_Environment g-binenv ads,GNAT Array_Split g-arrspl ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id44}@anchor{328}@anchor{gnat_rm/the_gnat_library gnat-awk-g-awk-ads}@anchor{329}
  @section @code{GNAT.AWK} (@code{g-awk.ads})
  
  
*************** Provides AWK-like parsing functions, wit
*** 23763,23770 ****
  or more files containing formatted data.  The file is viewed as a database
  where each record is a line and a field is a data element in this line.
  
! @node GNAT Bind_Environment g-binenv ads,GNAT Bounded_Buffers g-boubuf ads,GNAT AWK g-awk ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-bind-environment-g-binenv-ads}@anchor{326}@anchor{gnat_rm/the_gnat_library id45}@anchor{327}
  @section @code{GNAT.Bind_Environment} (@code{g-binenv.ads})
  
  
--- 23901,23908 ----
  or more files containing formatted data.  The file is viewed as a database
  where each record is a line and a field is a data element in this line.
  
! @node GNAT Bind_Environment g-binenv ads,GNAT Branch_Prediction g-brapre ads,GNAT AWK g-awk ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-bind-environment-g-binenv-ads}@anchor{32a}@anchor{gnat_rm/the_gnat_library id45}@anchor{32b}
  @section @code{GNAT.Bind_Environment} (@code{g-binenv.ads})
  
  
*************** Provides access to key=value association
*** 23776,23783 ****
  These associations can be specified using the @code{-V} binder command
  line switch.
  
! @node GNAT Bounded_Buffers g-boubuf ads,GNAT Bounded_Mailboxes g-boumai ads,GNAT Bind_Environment g-binenv ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id46}@anchor{328}@anchor{gnat_rm/the_gnat_library gnat-bounded-buffers-g-boubuf-ads}@anchor{329}
  @section @code{GNAT.Bounded_Buffers} (@code{g-boubuf.ads})
  
  
--- 23914,23932 ----
  These associations can be specified using the @code{-V} binder command
  line switch.
  
! @node GNAT Branch_Prediction g-brapre ads,GNAT Bounded_Buffers g-boubuf ads,GNAT Bind_Environment g-binenv ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id46}@anchor{32c}@anchor{gnat_rm/the_gnat_library gnat-branch-prediction-g-brapre-ads}@anchor{32d}
! @section @code{GNAT.Branch_Prediction} (@code{g-brapre.ads})
! 
! 
! @geindex GNAT.Branch_Prediction (g-brapre.ads)
! 
! @geindex Branch Prediction
! 
! Provides routines giving hints to the branch predictor of the code generator.
! 
! @node GNAT Bounded_Buffers g-boubuf ads,GNAT Bounded_Mailboxes g-boumai ads,GNAT Branch_Prediction g-brapre ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id47}@anchor{32e}@anchor{gnat_rm/the_gnat_library gnat-bounded-buffers-g-boubuf-ads}@anchor{32f}
  @section @code{GNAT.Bounded_Buffers} (@code{g-boubuf.ads})
  
  
*************** useful directly or as parts of the imple
*** 23792,23798 ****
  such as mailboxes.
  
  @node GNAT Bounded_Mailboxes g-boumai ads,GNAT Bubble_Sort g-bubsor ads,GNAT Bounded_Buffers g-boubuf ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id47}@anchor{32a}@anchor{gnat_rm/the_gnat_library gnat-bounded-mailboxes-g-boumai-ads}@anchor{32b}
  @section @code{GNAT.Bounded_Mailboxes} (@code{g-boumai.ads})
  
  
--- 23941,23947 ----
  such as mailboxes.
  
  @node GNAT Bounded_Mailboxes g-boumai ads,GNAT Bubble_Sort g-bubsor ads,GNAT Bounded_Buffers g-boubuf ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-bounded-mailboxes-g-boumai-ads}@anchor{330}@anchor{gnat_rm/the_gnat_library id48}@anchor{331}
  @section @code{GNAT.Bounded_Mailboxes} (@code{g-boumai.ads})
  
  
*************** such as mailboxes.
*** 23805,23811 ****
  Provides a thread-safe asynchronous intertask mailbox communication facility.
  
  @node GNAT Bubble_Sort g-bubsor ads,GNAT Bubble_Sort_A g-busora ads,GNAT Bounded_Mailboxes g-boumai ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-bubble-sort-g-bubsor-ads}@anchor{32c}@anchor{gnat_rm/the_gnat_library id48}@anchor{32d}
  @section @code{GNAT.Bubble_Sort} (@code{g-bubsor.ads})
  
  
--- 23954,23960 ----
  Provides a thread-safe asynchronous intertask mailbox communication facility.
  
  @node GNAT Bubble_Sort g-bubsor ads,GNAT Bubble_Sort_A g-busora ads,GNAT Bounded_Mailboxes g-boumai ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-bubble-sort-g-bubsor-ads}@anchor{332}@anchor{gnat_rm/the_gnat_library id49}@anchor{333}
  @section @code{GNAT.Bubble_Sort} (@code{g-bubsor.ads})
  
  
*************** data items.  Exchange and comparison pro
*** 23820,23826 ****
  access-to-procedure values.
  
  @node GNAT Bubble_Sort_A g-busora ads,GNAT Bubble_Sort_G g-busorg ads,GNAT Bubble_Sort g-bubsor ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id49}@anchor{32e}@anchor{gnat_rm/the_gnat_library gnat-bubble-sort-a-g-busora-ads}@anchor{32f}
  @section @code{GNAT.Bubble_Sort_A} (@code{g-busora.ads})
  
  
--- 23969,23975 ----
  access-to-procedure values.
  
  @node GNAT Bubble_Sort_A g-busora ads,GNAT Bubble_Sort_G g-busorg ads,GNAT Bubble_Sort g-bubsor ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id50}@anchor{334}@anchor{gnat_rm/the_gnat_library gnat-bubble-sort-a-g-busora-ads}@anchor{335}
  @section @code{GNAT.Bubble_Sort_A} (@code{g-busora.ads})
  
  
*************** access-to-procedure values. This is an o
*** 23836,23842 ****
  compatibility. Usually @code{GNAT.Bubble_Sort} will be preferable.
  
  @node GNAT Bubble_Sort_G g-busorg ads,GNAT Byte_Order_Mark g-byorma ads,GNAT Bubble_Sort_A g-busora ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-bubble-sort-g-g-busorg-ads}@anchor{330}@anchor{gnat_rm/the_gnat_library id50}@anchor{331}
  @section @code{GNAT.Bubble_Sort_G} (@code{g-busorg.ads})
  
  
--- 23985,23991 ----
  compatibility. Usually @code{GNAT.Bubble_Sort} will be preferable.
  
  @node GNAT Bubble_Sort_G g-busorg ads,GNAT Byte_Order_Mark g-byorma ads,GNAT Bubble_Sort_A g-busora ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-bubble-sort-g-g-busorg-ads}@anchor{336}@anchor{gnat_rm/the_gnat_library id51}@anchor{337}
  @section @code{GNAT.Bubble_Sort_G} (@code{g-busorg.ads})
  
  
*************** if the procedures can be inlined, at the
*** 23852,23858 ****
  multiple instantiations.
  
  @node GNAT Byte_Order_Mark g-byorma ads,GNAT Byte_Swapping g-bytswa ads,GNAT Bubble_Sort_G g-busorg ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-byte-order-mark-g-byorma-ads}@anchor{332}@anchor{gnat_rm/the_gnat_library id51}@anchor{333}
  @section @code{GNAT.Byte_Order_Mark} (@code{g-byorma.ads})
  
  
--- 24001,24007 ----
  multiple instantiations.
  
  @node GNAT Byte_Order_Mark g-byorma ads,GNAT Byte_Swapping g-bytswa ads,GNAT Bubble_Sort_G g-busorg ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-byte-order-mark-g-byorma-ads}@anchor{338}@anchor{gnat_rm/the_gnat_library id52}@anchor{339}
  @section @code{GNAT.Byte_Order_Mark} (@code{g-byorma.ads})
  
  
*************** the encoding of the string. The routine
*** 23868,23874 ****
  sequences for various UCS input formats.
  
  @node GNAT Byte_Swapping g-bytswa ads,GNAT Calendar g-calend ads,GNAT Byte_Order_Mark g-byorma ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-byte-swapping-g-bytswa-ads}@anchor{334}@anchor{gnat_rm/the_gnat_library id52}@anchor{335}
  @section @code{GNAT.Byte_Swapping} (@code{g-bytswa.ads})
  
  
--- 24017,24023 ----
  sequences for various UCS input formats.
  
  @node GNAT Byte_Swapping g-bytswa ads,GNAT Calendar g-calend ads,GNAT Byte_Order_Mark g-byorma ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-byte-swapping-g-bytswa-ads}@anchor{33a}@anchor{gnat_rm/the_gnat_library id53}@anchor{33b}
  @section @code{GNAT.Byte_Swapping} (@code{g-bytswa.ads})
  
  
*************** General routines for swapping the bytes
*** 23882,23888 ****
  Machine-specific implementations are available in some cases.
  
  @node GNAT Calendar g-calend ads,GNAT Calendar Time_IO g-catiio ads,GNAT Byte_Swapping g-bytswa ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-calendar-g-calend-ads}@anchor{336}@anchor{gnat_rm/the_gnat_library id53}@anchor{337}
  @section @code{GNAT.Calendar} (@code{g-calend.ads})
  
  
--- 24031,24037 ----
  Machine-specific implementations are available in some cases.
  
  @node GNAT Calendar g-calend ads,GNAT Calendar Time_IO g-catiio ads,GNAT Byte_Swapping g-bytswa ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id54}@anchor{33c}@anchor{gnat_rm/the_gnat_library gnat-calendar-g-calend-ads}@anchor{33d}
  @section @code{GNAT.Calendar} (@code{g-calend.ads})
  
  
*************** Also provides conversion of @code{Ada.Ca
*** 23896,23902 ****
  C @code{timeval} format.
  
  @node GNAT Calendar Time_IO g-catiio ads,GNAT CRC32 g-crc32 ads,GNAT Calendar g-calend ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id54}@anchor{338}@anchor{gnat_rm/the_gnat_library gnat-calendar-time-io-g-catiio-ads}@anchor{339}
  @section @code{GNAT.Calendar.Time_IO} (@code{g-catiio.ads})
  
  
--- 24045,24051 ----
  C @code{timeval} format.
  
  @node GNAT Calendar Time_IO g-catiio ads,GNAT CRC32 g-crc32 ads,GNAT Calendar g-calend ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id55}@anchor{33e}@anchor{gnat_rm/the_gnat_library gnat-calendar-time-io-g-catiio-ads}@anchor{33f}
  @section @code{GNAT.Calendar.Time_IO} (@code{g-catiio.ads})
  
  
*************** C @code{timeval} format.
*** 23907,23913 ****
  @geindex GNAT.Calendar.Time_IO (g-catiio.ads)
  
  @node GNAT CRC32 g-crc32 ads,GNAT Case_Util g-casuti ads,GNAT Calendar Time_IO g-catiio ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id55}@anchor{33a}@anchor{gnat_rm/the_gnat_library gnat-crc32-g-crc32-ads}@anchor{33b}
  @section @code{GNAT.CRC32} (@code{g-crc32.ads})
  
  
--- 24056,24062 ----
  @geindex GNAT.Calendar.Time_IO (g-catiio.ads)
  
  @node GNAT CRC32 g-crc32 ads,GNAT Case_Util g-casuti ads,GNAT Calendar Time_IO g-catiio ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id56}@anchor{340}@anchor{gnat_rm/the_gnat_library gnat-crc32-g-crc32-ads}@anchor{341}
  @section @code{GNAT.CRC32} (@code{g-crc32.ads})
  
  
*************** of this algorithm see
*** 23924,23930 ****
  Aug. 1988.  Sarwate, D.V.
  
  @node GNAT Case_Util g-casuti ads,GNAT CGI g-cgi ads,GNAT CRC32 g-crc32 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id56}@anchor{33c}@anchor{gnat_rm/the_gnat_library gnat-case-util-g-casuti-ads}@anchor{33d}
  @section @code{GNAT.Case_Util} (@code{g-casuti.ads})
  
  
--- 24073,24079 ----
  Aug. 1988.  Sarwate, D.V.
  
  @node GNAT Case_Util g-casuti ads,GNAT CGI g-cgi ads,GNAT CRC32 g-crc32 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id57}@anchor{342}@anchor{gnat_rm/the_gnat_library gnat-case-util-g-casuti-ads}@anchor{343}
  @section @code{GNAT.Case_Util} (@code{g-casuti.ads})
  
  
*************** without the overhead of the full casing
*** 23939,23945 ****
  in @code{Ada.Characters.Handling}.
  
  @node GNAT CGI g-cgi ads,GNAT CGI Cookie g-cgicoo ads,GNAT Case_Util g-casuti ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id57}@anchor{33e}@anchor{gnat_rm/the_gnat_library gnat-cgi-g-cgi-ads}@anchor{33f}
  @section @code{GNAT.CGI} (@code{g-cgi.ads})
  
  
--- 24088,24094 ----
  in @code{Ada.Characters.Handling}.
  
  @node GNAT CGI g-cgi ads,GNAT CGI Cookie g-cgicoo ads,GNAT Case_Util g-casuti ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id58}@anchor{344}@anchor{gnat_rm/the_gnat_library gnat-cgi-g-cgi-ads}@anchor{345}
  @section @code{GNAT.CGI} (@code{g-cgi.ads})
  
  
*************** builds a table whose index is the key an
*** 23954,23960 ****
  with this table.
  
  @node GNAT CGI Cookie g-cgicoo ads,GNAT CGI Debug g-cgideb ads,GNAT CGI g-cgi ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-cgi-cookie-g-cgicoo-ads}@anchor{340}@anchor{gnat_rm/the_gnat_library id58}@anchor{341}
  @section @code{GNAT.CGI.Cookie} (@code{g-cgicoo.ads})
  
  
--- 24103,24109 ----
  with this table.
  
  @node GNAT CGI Cookie g-cgicoo ads,GNAT CGI Debug g-cgideb ads,GNAT CGI g-cgi ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-cgi-cookie-g-cgicoo-ads}@anchor{346}@anchor{gnat_rm/the_gnat_library id59}@anchor{347}
  @section @code{GNAT.CGI.Cookie} (@code{g-cgicoo.ads})
  
  
*************** Common Gateway Interface (CGI).  It expo
*** 23969,23975 ****
  cookies (piece of information kept in the Web client software).
  
  @node GNAT CGI Debug g-cgideb ads,GNAT Command_Line g-comlin ads,GNAT CGI Cookie g-cgicoo ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-cgi-debug-g-cgideb-ads}@anchor{342}@anchor{gnat_rm/the_gnat_library id59}@anchor{343}
  @section @code{GNAT.CGI.Debug} (@code{g-cgideb.ads})
  
  
--- 24118,24124 ----
  cookies (piece of information kept in the Web client software).
  
  @node GNAT CGI Debug g-cgideb ads,GNAT Command_Line g-comlin ads,GNAT CGI Cookie g-cgicoo ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-cgi-debug-g-cgideb-ads}@anchor{348}@anchor{gnat_rm/the_gnat_library id60}@anchor{349}
  @section @code{GNAT.CGI.Debug} (@code{g-cgideb.ads})
  
  
*************** This is a package to help debugging CGI
*** 23981,23987 ****
  programs written in Ada.
  
  @node GNAT Command_Line g-comlin ads,GNAT Compiler_Version g-comver ads,GNAT CGI Debug g-cgideb ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id60}@anchor{344}@anchor{gnat_rm/the_gnat_library gnat-command-line-g-comlin-ads}@anchor{345}
  @section @code{GNAT.Command_Line} (@code{g-comlin.ads})
  
  
--- 24130,24136 ----
  programs written in Ada.
  
  @node GNAT Command_Line g-comlin ads,GNAT Compiler_Version g-comver ads,GNAT CGI Debug g-cgideb ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id61}@anchor{34a}@anchor{gnat_rm/the_gnat_library gnat-command-line-g-comlin-ads}@anchor{34b}
  @section @code{GNAT.Command_Line} (@code{g-comlin.ads})
  
  
*************** programs written in Ada.
*** 23991,24000 ****
  
  Provides a high level interface to @code{Ada.Command_Line} facilities,
  including the ability to scan for named switches with optional parameters
! and expand file names using wild card notations.
  
  @node GNAT Compiler_Version g-comver ads,GNAT Ctrl_C g-ctrl_c ads,GNAT Command_Line g-comlin ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-compiler-version-g-comver-ads}@anchor{346}@anchor{gnat_rm/the_gnat_library id61}@anchor{347}
  @section @code{GNAT.Compiler_Version} (@code{g-comver.ads})
  
  
--- 24140,24149 ----
  
  Provides a high level interface to @code{Ada.Command_Line} facilities,
  including the ability to scan for named switches with optional parameters
! and expand file names using wildcard notations.
  
  @node GNAT Compiler_Version g-comver ads,GNAT Ctrl_C g-ctrl_c ads,GNAT Command_Line g-comlin ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-compiler-version-g-comver-ads}@anchor{34c}@anchor{gnat_rm/the_gnat_library id62}@anchor{34d}
  @section @code{GNAT.Compiler_Version} (@code{g-comver.ads})
  
  
*************** of the compiler if a consistent tool set
*** 24012,24018 ****
  of a partition).
  
  @node GNAT Ctrl_C g-ctrl_c ads,GNAT Current_Exception g-curexc ads,GNAT Compiler_Version g-comver ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-ctrl-c-g-ctrl-c-ads}@anchor{348}@anchor{gnat_rm/the_gnat_library id62}@anchor{349}
  @section @code{GNAT.Ctrl_C} (@code{g-ctrl_c.ads})
  
  
--- 24161,24167 ----
  of a partition).
  
  @node GNAT Ctrl_C g-ctrl_c ads,GNAT Current_Exception g-curexc ads,GNAT Compiler_Version g-comver ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-ctrl-c-g-ctrl-c-ads}@anchor{34e}@anchor{gnat_rm/the_gnat_library id63}@anchor{34f}
  @section @code{GNAT.Ctrl_C} (@code{g-ctrl_c.ads})
  
  
*************** of a partition).
*** 24023,24029 ****
  Provides a simple interface to handle Ctrl-C keyboard events.
  
  @node GNAT Current_Exception g-curexc ads,GNAT Debug_Pools g-debpoo ads,GNAT Ctrl_C g-ctrl_c ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id63}@anchor{34a}@anchor{gnat_rm/the_gnat_library gnat-current-exception-g-curexc-ads}@anchor{34b}
  @section @code{GNAT.Current_Exception} (@code{g-curexc.ads})
  
  
--- 24172,24178 ----
  Provides a simple interface to handle Ctrl-C keyboard events.
  
  @node GNAT Current_Exception g-curexc ads,GNAT Debug_Pools g-debpoo ads,GNAT Ctrl_C g-ctrl_c ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id64}@anchor{350}@anchor{gnat_rm/the_gnat_library gnat-current-exception-g-curexc-ads}@anchor{351}
  @section @code{GNAT.Current_Exception} (@code{g-curexc.ads})
  
  
*************** This is particularly useful in simulatin
*** 24040,24046 ****
  obtaining information about exceptions provided by Ada 83 compilers.
  
  @node GNAT Debug_Pools g-debpoo ads,GNAT Debug_Utilities g-debuti ads,GNAT Current_Exception g-curexc ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-debug-pools-g-debpoo-ads}@anchor{34c}@anchor{gnat_rm/the_gnat_library id64}@anchor{34d}
  @section @code{GNAT.Debug_Pools} (@code{g-debpoo.ads})
  
  
--- 24189,24195 ----
  obtaining information about exceptions provided by Ada 83 compilers.
  
  @node GNAT Debug_Pools g-debpoo ads,GNAT Debug_Utilities g-debuti ads,GNAT Current_Exception g-curexc ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-debug-pools-g-debpoo-ads}@anchor{352}@anchor{gnat_rm/the_gnat_library id65}@anchor{353}
  @section @code{GNAT.Debug_Pools} (@code{g-debpoo.ads})
  
  
*************** problems.
*** 24057,24063 ****
  See @code{The GNAT Debug_Pool Facility} section in the @cite{GNAT User's Guide}.
  
  @node GNAT Debug_Utilities g-debuti ads,GNAT Decode_String g-decstr ads,GNAT Debug_Pools g-debpoo ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id65}@anchor{34e}@anchor{gnat_rm/the_gnat_library gnat-debug-utilities-g-debuti-ads}@anchor{34f}
  @section @code{GNAT.Debug_Utilities} (@code{g-debuti.ads})
  
  
--- 24206,24212 ----
  See @code{The GNAT Debug_Pool Facility} section in the @cite{GNAT User's Guide}.
  
  @node GNAT Debug_Utilities g-debuti ads,GNAT Decode_String g-decstr ads,GNAT Debug_Pools g-debpoo ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-debug-utilities-g-debuti-ads}@anchor{354}@anchor{gnat_rm/the_gnat_library id66}@anchor{355}
  @section @code{GNAT.Debug_Utilities} (@code{g-debuti.ads})
  
  
*************** to and from string images of address val
*** 24070,24076 ****
  for hexadecimal literals.
  
  @node GNAT Decode_String g-decstr ads,GNAT Decode_UTF8_String g-deutst ads,GNAT Debug_Utilities g-debuti ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-decode-string-g-decstr-ads}@anchor{350}@anchor{gnat_rm/the_gnat_library id66}@anchor{351}
  @section @code{GNAT.Decode_String} (@code{g-decstr.ads})
  
  
--- 24219,24225 ----
  for hexadecimal literals.
  
  @node GNAT Decode_String g-decstr ads,GNAT Decode_UTF8_String g-deutst ads,GNAT Debug_Utilities g-debuti ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id67}@anchor{356}@anchor{gnat_rm/the_gnat_library gnat-decode-string-g-decstr-ads}@anchor{357}
  @section @code{GNAT.Decode_String} (@code{g-decstr.ads})
  
  
*************** Useful in conjunction with Unicode chara
*** 24094,24100 ****
  preinstantiation for UTF-8. See next entry.
  
  @node GNAT Decode_UTF8_String g-deutst ads,GNAT Directory_Operations g-dirope ads,GNAT Decode_String g-decstr ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-decode-utf8-string-g-deutst-ads}@anchor{352}@anchor{gnat_rm/the_gnat_library id67}@anchor{353}
  @section @code{GNAT.Decode_UTF8_String} (@code{g-deutst.ads})
  
  
--- 24243,24249 ----
  preinstantiation for UTF-8. See next entry.
  
  @node GNAT Decode_UTF8_String g-deutst ads,GNAT Directory_Operations g-dirope ads,GNAT Decode_String g-decstr ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-decode-utf8-string-g-deutst-ads}@anchor{358}@anchor{gnat_rm/the_gnat_library id68}@anchor{359}
  @section @code{GNAT.Decode_UTF8_String} (@code{g-deutst.ads})
  
  
*************** preinstantiation for UTF-8. See next ent
*** 24115,24121 ****
  A preinstantiation of GNAT.Decode_Strings for UTF-8 encoding.
  
  @node GNAT Directory_Operations g-dirope ads,GNAT Directory_Operations Iteration g-diopit ads,GNAT Decode_UTF8_String g-deutst ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-directory-operations-g-dirope-ads}@anchor{354}@anchor{gnat_rm/the_gnat_library id68}@anchor{355}
  @section @code{GNAT.Directory_Operations} (@code{g-dirope.ads})
  
  
--- 24264,24270 ----
  A preinstantiation of GNAT.Decode_Strings for UTF-8 encoding.
  
  @node GNAT Directory_Operations g-dirope ads,GNAT Directory_Operations Iteration g-diopit ads,GNAT Decode_UTF8_String g-deutst ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id69}@anchor{35a}@anchor{gnat_rm/the_gnat_library gnat-directory-operations-g-dirope-ads}@anchor{35b}
  @section @code{GNAT.Directory_Operations} (@code{g-dirope.ads})
  
  
*************** the current directory, making new direct
*** 24128,24134 ****
  directory.
  
  @node GNAT Directory_Operations Iteration g-diopit ads,GNAT Dynamic_HTables g-dynhta ads,GNAT Directory_Operations g-dirope ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id69}@anchor{356}@anchor{gnat_rm/the_gnat_library gnat-directory-operations-iteration-g-diopit-ads}@anchor{357}
  @section @code{GNAT.Directory_Operations.Iteration} (@code{g-diopit.ads})
  
  
--- 24277,24283 ----
  directory.
  
  @node GNAT Directory_Operations Iteration g-diopit ads,GNAT Dynamic_HTables g-dynhta ads,GNAT Directory_Operations g-dirope ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id70}@anchor{35c}@anchor{gnat_rm/the_gnat_library gnat-directory-operations-iteration-g-diopit-ads}@anchor{35d}
  @section @code{GNAT.Directory_Operations.Iteration} (@code{g-diopit.ads})
  
  
*************** A child unit of GNAT.Directory_Operation
*** 24140,24146 ****
  for iterating through directories.
  
  @node GNAT Dynamic_HTables g-dynhta ads,GNAT Dynamic_Tables g-dyntab ads,GNAT Directory_Operations Iteration g-diopit ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id70}@anchor{358}@anchor{gnat_rm/the_gnat_library gnat-dynamic-htables-g-dynhta-ads}@anchor{359}
  @section @code{GNAT.Dynamic_HTables} (@code{g-dynhta.ads})
  
  
--- 24289,24295 ----
  for iterating through directories.
  
  @node GNAT Dynamic_HTables g-dynhta ads,GNAT Dynamic_Tables g-dyntab ads,GNAT Directory_Operations Iteration g-diopit ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id71}@anchor{35e}@anchor{gnat_rm/the_gnat_library gnat-dynamic-htables-g-dynhta-ads}@anchor{35f}
  @section @code{GNAT.Dynamic_HTables} (@code{g-dynhta.ads})
  
  
*************** dynamic instances of the hash table, whi
*** 24158,24164 ****
  @code{GNAT.HTable} creates a single instance of the hash table.
  
  @node GNAT Dynamic_Tables g-dyntab ads,GNAT Encode_String g-encstr ads,GNAT Dynamic_HTables g-dynhta ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-dynamic-tables-g-dyntab-ads}@anchor{35a}@anchor{gnat_rm/the_gnat_library id71}@anchor{35b}
  @section @code{GNAT.Dynamic_Tables} (@code{g-dyntab.ads})
  
  
--- 24307,24313 ----
  @code{GNAT.HTable} creates a single instance of the hash table.
  
  @node GNAT Dynamic_Tables g-dyntab ads,GNAT Encode_String g-encstr ads,GNAT Dynamic_HTables g-dynhta ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-dynamic-tables-g-dyntab-ads}@anchor{360}@anchor{gnat_rm/the_gnat_library id72}@anchor{361}
  @section @code{GNAT.Dynamic_Tables} (@code{g-dyntab.ads})
  
  
*************** dynamic instances of the table, while an
*** 24178,24184 ****
  @code{GNAT.Table} creates a single instance of the table type.
  
  @node GNAT Encode_String g-encstr ads,GNAT Encode_UTF8_String g-enutst ads,GNAT Dynamic_Tables g-dyntab ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id72}@anchor{35c}@anchor{gnat_rm/the_gnat_library gnat-encode-string-g-encstr-ads}@anchor{35d}
  @section @code{GNAT.Encode_String} (@code{g-encstr.ads})
  
  
--- 24327,24333 ----
  @code{GNAT.Table} creates a single instance of the table type.
  
  @node GNAT Encode_String g-encstr ads,GNAT Encode_UTF8_String g-enutst ads,GNAT Dynamic_Tables g-dyntab ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id73}@anchor{362}@anchor{gnat_rm/the_gnat_library gnat-encode-string-g-encstr-ads}@anchor{363}
  @section @code{GNAT.Encode_String} (@code{g-encstr.ads})
  
  
*************** encoding method. Useful in conjunction w
*** 24200,24206 ****
  Note there is a preinstantiation for UTF-8. See next entry.
  
  @node GNAT Encode_UTF8_String g-enutst ads,GNAT Exception_Actions g-excact ads,GNAT Encode_String g-encstr ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-encode-utf8-string-g-enutst-ads}@anchor{35e}@anchor{gnat_rm/the_gnat_library id73}@anchor{35f}
  @section @code{GNAT.Encode_UTF8_String} (@code{g-enutst.ads})
  
  
--- 24349,24355 ----
  Note there is a preinstantiation for UTF-8. See next entry.
  
  @node GNAT Encode_UTF8_String g-enutst ads,GNAT Exception_Actions g-excact ads,GNAT Encode_String g-encstr ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-encode-utf8-string-g-enutst-ads}@anchor{364}@anchor{gnat_rm/the_gnat_library id74}@anchor{365}
  @section @code{GNAT.Encode_UTF8_String} (@code{g-enutst.ads})
  
  
*************** Note there is a preinstantiation for UTF
*** 24221,24227 ****
  A preinstantiation of GNAT.Encode_Strings for UTF-8 encoding.
  
  @node GNAT Exception_Actions g-excact ads,GNAT Exception_Traces g-exctra ads,GNAT Encode_UTF8_String g-enutst ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-exception-actions-g-excact-ads}@anchor{360}@anchor{gnat_rm/the_gnat_library id74}@anchor{361}
  @section @code{GNAT.Exception_Actions} (@code{g-excact.ads})
  
  
--- 24370,24376 ----
  A preinstantiation of GNAT.Encode_Strings for UTF-8 encoding.
  
  @node GNAT Exception_Actions g-excact ads,GNAT Exception_Traces g-exctra ads,GNAT Encode_UTF8_String g-enutst ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-exception-actions-g-excact-ads}@anchor{366}@anchor{gnat_rm/the_gnat_library id75}@anchor{367}
  @section @code{GNAT.Exception_Actions} (@code{g-excact.ads})
  
  
*************** for specific exceptions, or when any exc
*** 24234,24240 ****
  can be used for instance to force a core dump to ease debugging.
  
  @node GNAT Exception_Traces g-exctra ads,GNAT Exceptions g-except ads,GNAT Exception_Actions g-excact ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-exception-traces-g-exctra-ads}@anchor{362}@anchor{gnat_rm/the_gnat_library id75}@anchor{363}
  @section @code{GNAT.Exception_Traces} (@code{g-exctra.ads})
  
  
--- 24383,24389 ----
  can be used for instance to force a core dump to ease debugging.
  
  @node GNAT Exception_Traces g-exctra ads,GNAT Exceptions g-except ads,GNAT Exception_Actions g-excact ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-exception-traces-g-exctra-ads}@anchor{368}@anchor{gnat_rm/the_gnat_library id76}@anchor{369}
  @section @code{GNAT.Exception_Traces} (@code{g-exctra.ads})
  
  
*************** Provides an interface allowing to contro
*** 24248,24254 ****
  occurrences.
  
  @node GNAT Exceptions g-except ads,GNAT Expect g-expect ads,GNAT Exception_Traces g-exctra ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id76}@anchor{364}@anchor{gnat_rm/the_gnat_library gnat-exceptions-g-except-ads}@anchor{365}
  @section @code{GNAT.Exceptions} (@code{g-except.ads})
  
  
--- 24397,24403 ----
  occurrences.
  
  @node GNAT Exceptions g-except ads,GNAT Expect g-expect ads,GNAT Exception_Traces g-exctra ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id77}@anchor{36a}@anchor{gnat_rm/the_gnat_library gnat-exceptions-g-except-ads}@anchor{36b}
  @section @code{GNAT.Exceptions} (@code{g-except.ads})
  
  
*************** predefined exceptions, and for example a
*** 24269,24275 ****
  @code{Constraint_Error} with a message from a pure subprogram.
  
  @node GNAT Expect g-expect ads,GNAT Expect TTY g-exptty ads,GNAT Exceptions g-except ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-expect-g-expect-ads}@anchor{366}@anchor{gnat_rm/the_gnat_library id77}@anchor{367}
  @section @code{GNAT.Expect} (@code{g-expect.ads})
  
  
--- 24418,24424 ----
  @code{Constraint_Error} with a message from a pure subprogram.
  
  @node GNAT Expect g-expect ads,GNAT Expect TTY g-exptty ads,GNAT Exceptions g-except ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id78}@anchor{36c}@anchor{gnat_rm/the_gnat_library gnat-expect-g-expect-ads}@anchor{36d}
  @section @code{GNAT.Expect} (@code{g-expect.ads})
  
  
*************** It is not implemented for cross ports, a
*** 24285,24291 ****
  implemented for VxWorks or LynxOS.
  
  @node GNAT Expect TTY g-exptty ads,GNAT Float_Control g-flocon ads,GNAT Expect g-expect ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id78}@anchor{368}@anchor{gnat_rm/the_gnat_library gnat-expect-tty-g-exptty-ads}@anchor{369}
  @section @code{GNAT.Expect.TTY} (@code{g-exptty.ads})
  
  
--- 24434,24440 ----
  implemented for VxWorks or LynxOS.
  
  @node GNAT Expect TTY g-exptty ads,GNAT Float_Control g-flocon ads,GNAT Expect g-expect ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id79}@anchor{36e}@anchor{gnat_rm/the_gnat_library gnat-expect-tty-g-exptty-ads}@anchor{36f}
  @section @code{GNAT.Expect.TTY} (@code{g-exptty.ads})
  
  
*************** ports. It is not implemented for cross p
*** 24297,24303 ****
  in particular is not implemented for VxWorks or LynxOS.
  
  @node GNAT Float_Control g-flocon ads,GNAT Formatted_String g-forstr ads,GNAT Expect TTY g-exptty ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id79}@anchor{36a}@anchor{gnat_rm/the_gnat_library gnat-float-control-g-flocon-ads}@anchor{36b}
  @section @code{GNAT.Float_Control} (@code{g-flocon.ads})
  
  
--- 24446,24452 ----
  in particular is not implemented for VxWorks or LynxOS.
  
  @node GNAT Float_Control g-flocon ads,GNAT Formatted_String g-forstr ads,GNAT Expect TTY g-exptty ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id80}@anchor{370}@anchor{gnat_rm/the_gnat_library gnat-float-control-g-flocon-ads}@anchor{371}
  @section @code{GNAT.Float_Control} (@code{g-flocon.ads})
  
  
*************** library calls may cause this mode to be
*** 24311,24317 ****
  in this package can be used to reestablish the required mode.
  
  @node GNAT Formatted_String g-forstr ads,GNAT Heap_Sort g-heasor ads,GNAT Float_Control g-flocon ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id80}@anchor{36c}@anchor{gnat_rm/the_gnat_library gnat-formatted-string-g-forstr-ads}@anchor{36d}
  @section @code{GNAT.Formatted_String} (@code{g-forstr.ads})
  
  
--- 24460,24466 ----
  in this package can be used to reestablish the required mode.
  
  @node GNAT Formatted_String g-forstr ads,GNAT Heap_Sort g-heasor ads,GNAT Float_Control g-flocon ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id81}@anchor{372}@anchor{gnat_rm/the_gnat_library gnat-formatted-string-g-forstr-ads}@anchor{373}
  @section @code{GNAT.Formatted_String} (@code{g-forstr.ads})
  
  
*************** derived from Integer, Float or enumerati
*** 24326,24332 ****
  formatted string.
  
  @node GNAT Heap_Sort g-heasor ads,GNAT Heap_Sort_A g-hesora ads,GNAT Formatted_String g-forstr ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-heap-sort-g-heasor-ads}@anchor{36e}@anchor{gnat_rm/the_gnat_library id81}@anchor{36f}
  @section @code{GNAT.Heap_Sort} (@code{g-heasor.ads})
  
  
--- 24475,24481 ----
  formatted string.
  
  @node GNAT Heap_Sort g-heasor ads,GNAT Heap_Sort_A g-hesora ads,GNAT Formatted_String g-forstr ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-heap-sort-g-heasor-ads}@anchor{374}@anchor{gnat_rm/the_gnat_library id82}@anchor{375}
  @section @code{GNAT.Heap_Sort} (@code{g-heasor.ads})
  
  
*************** access-to-procedure values.  The algorit
*** 24340,24346 ****
  that performs approximately N*log(N) comparisons in the worst case.
  
  @node GNAT Heap_Sort_A g-hesora ads,GNAT Heap_Sort_G g-hesorg ads,GNAT Heap_Sort g-heasor ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id82}@anchor{370}@anchor{gnat_rm/the_gnat_library gnat-heap-sort-a-g-hesora-ads}@anchor{371}
  @section @code{GNAT.Heap_Sort_A} (@code{g-hesora.ads})
  
  
--- 24489,24495 ----
  that performs approximately N*log(N) comparisons in the worst case.
  
  @node GNAT Heap_Sort_A g-hesora ads,GNAT Heap_Sort_G g-hesorg ads,GNAT Heap_Sort g-heasor ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id83}@anchor{376}@anchor{gnat_rm/the_gnat_library gnat-heap-sort-a-g-hesora-ads}@anchor{377}
  @section @code{GNAT.Heap_Sort_A} (@code{g-hesora.ads})
  
  
*************** This differs from @code{GNAT.Heap_Sort}
*** 24356,24362 ****
  interface, but may be slightly more efficient.
  
  @node GNAT Heap_Sort_G g-hesorg ads,GNAT HTable g-htable ads,GNAT Heap_Sort_A g-hesora ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id83}@anchor{372}@anchor{gnat_rm/the_gnat_library gnat-heap-sort-g-g-hesorg-ads}@anchor{373}
  @section @code{GNAT.Heap_Sort_G} (@code{g-hesorg.ads})
  
  
--- 24505,24511 ----
  interface, but may be slightly more efficient.
  
  @node GNAT Heap_Sort_G g-hesorg ads,GNAT HTable g-htable ads,GNAT Heap_Sort_A g-hesora ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id84}@anchor{378}@anchor{gnat_rm/the_gnat_library gnat-heap-sort-g-g-hesorg-ads}@anchor{379}
  @section @code{GNAT.Heap_Sort_G} (@code{g-hesorg.ads})
  
  
*************** if the procedures can be inlined, at the
*** 24370,24376 ****
  multiple instantiations.
  
  @node GNAT HTable g-htable ads,GNAT IO g-io ads,GNAT Heap_Sort_G g-hesorg ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id84}@anchor{374}@anchor{gnat_rm/the_gnat_library gnat-htable-g-htable-ads}@anchor{375}
  @section @code{GNAT.HTable} (@code{g-htable.ads})
  
  
--- 24519,24525 ----
  multiple instantiations.
  
  @node GNAT HTable g-htable ads,GNAT IO g-io ads,GNAT Heap_Sort_G g-hesorg ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id85}@anchor{37a}@anchor{gnat_rm/the_gnat_library gnat-htable-g-htable-ads}@anchor{37b}
  @section @code{GNAT.HTable} (@code{g-htable.ads})
  
  
*************** data.  Provides two approaches, one a si
*** 24383,24389 ****
  allowing arbitrary dynamic hash tables.
  
  @node GNAT IO g-io ads,GNAT IO_Aux g-io_aux ads,GNAT HTable g-htable ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id85}@anchor{376}@anchor{gnat_rm/the_gnat_library gnat-io-g-io-ads}@anchor{377}
  @section @code{GNAT.IO} (@code{g-io.ads})
  
  
--- 24532,24538 ----
  allowing arbitrary dynamic hash tables.
  
  @node GNAT IO g-io ads,GNAT IO_Aux g-io_aux ads,GNAT HTable g-htable ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id86}@anchor{37c}@anchor{gnat_rm/the_gnat_library gnat-io-g-io-ads}@anchor{37d}
  @section @code{GNAT.IO} (@code{g-io.ads})
  
  
*************** Standard_Input, and writing characters,
*** 24399,24405 ****
  Standard_Output or Standard_Error.
  
  @node GNAT IO_Aux g-io_aux ads,GNAT Lock_Files g-locfil ads,GNAT IO g-io ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-io-aux-g-io-aux-ads}@anchor{378}@anchor{gnat_rm/the_gnat_library id86}@anchor{379}
  @section @code{GNAT.IO_Aux} (@code{g-io_aux.ads})
  
  
--- 24548,24554 ----
  Standard_Output or Standard_Error.
  
  @node GNAT IO_Aux g-io_aux ads,GNAT Lock_Files g-locfil ads,GNAT IO g-io ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id87}@anchor{37e}@anchor{gnat_rm/the_gnat_library gnat-io-aux-g-io-aux-ads}@anchor{37f}
  @section @code{GNAT.IO_Aux} (@code{g-io_aux.ads})
  
  
*************** Provides some auxiliary functions for us
*** 24413,24419 ****
  for whether a file exists, and functions for reading a line of text.
  
  @node GNAT Lock_Files g-locfil ads,GNAT MBBS_Discrete_Random g-mbdira ads,GNAT IO_Aux g-io_aux ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id87}@anchor{37a}@anchor{gnat_rm/the_gnat_library gnat-lock-files-g-locfil-ads}@anchor{37b}
  @section @code{GNAT.Lock_Files} (@code{g-locfil.ads})
  
  
--- 24562,24568 ----
  for whether a file exists, and functions for reading a line of text.
  
  @node GNAT Lock_Files g-locfil ads,GNAT MBBS_Discrete_Random g-mbdira ads,GNAT IO_Aux g-io_aux ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id88}@anchor{380}@anchor{gnat_rm/the_gnat_library gnat-lock-files-g-locfil-ads}@anchor{381}
  @section @code{GNAT.Lock_Files} (@code{g-locfil.ads})
  
  
*************** Provides a general interface for using f
*** 24427,24433 ****
  providing program level synchronization.
  
  @node GNAT MBBS_Discrete_Random g-mbdira ads,GNAT MBBS_Float_Random g-mbflra ads,GNAT Lock_Files g-locfil ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id88}@anchor{37c}@anchor{gnat_rm/the_gnat_library gnat-mbbs-discrete-random-g-mbdira-ads}@anchor{37d}
  @section @code{GNAT.MBBS_Discrete_Random} (@code{g-mbdira.ads})
  
  
--- 24576,24582 ----
  providing program level synchronization.
  
  @node GNAT MBBS_Discrete_Random g-mbdira ads,GNAT MBBS_Float_Random g-mbflra ads,GNAT Lock_Files g-locfil ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id89}@anchor{382}@anchor{gnat_rm/the_gnat_library gnat-mbbs-discrete-random-g-mbdira-ads}@anchor{383}
  @section @code{GNAT.MBBS_Discrete_Random} (@code{g-mbdira.ads})
  
  
*************** The original implementation of @code{Ada
*** 24439,24445 ****
  a modified version of the Blum-Blum-Shub generator.
  
  @node GNAT MBBS_Float_Random g-mbflra ads,GNAT MD5 g-md5 ads,GNAT MBBS_Discrete_Random g-mbdira ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id89}@anchor{37e}@anchor{gnat_rm/the_gnat_library gnat-mbbs-float-random-g-mbflra-ads}@anchor{37f}
  @section @code{GNAT.MBBS_Float_Random} (@code{g-mbflra.ads})
  
  
--- 24588,24594 ----
  a modified version of the Blum-Blum-Shub generator.
  
  @node GNAT MBBS_Float_Random g-mbflra ads,GNAT MD5 g-md5 ads,GNAT MBBS_Discrete_Random g-mbdira ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id90}@anchor{384}@anchor{gnat_rm/the_gnat_library gnat-mbbs-float-random-g-mbflra-ads}@anchor{385}
  @section @code{GNAT.MBBS_Float_Random} (@code{g-mbflra.ads})
  
  
*************** The original implementation of @code{Ada
*** 24451,24457 ****
  a modified version of the Blum-Blum-Shub generator.
  
  @node GNAT MD5 g-md5 ads,GNAT Memory_Dump g-memdum ads,GNAT MBBS_Float_Random g-mbflra ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id90}@anchor{380}@anchor{gnat_rm/the_gnat_library gnat-md5-g-md5-ads}@anchor{381}
  @section @code{GNAT.MD5} (@code{g-md5.ads})
  
  
--- 24600,24606 ----
  a modified version of the Blum-Blum-Shub generator.
  
  @node GNAT MD5 g-md5 ads,GNAT Memory_Dump g-memdum ads,GNAT MBBS_Float_Random g-mbflra ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id91}@anchor{386}@anchor{gnat_rm/the_gnat_library gnat-md5-g-md5-ads}@anchor{387}
  @section @code{GNAT.MD5} (@code{g-md5.ads})
  
  
*************** the HMAC-MD5 message authentication func
*** 24464,24470 ****
  FIPS PUB 198.
  
  @node GNAT Memory_Dump g-memdum ads,GNAT Most_Recent_Exception g-moreex ads,GNAT MD5 g-md5 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id91}@anchor{382}@anchor{gnat_rm/the_gnat_library gnat-memory-dump-g-memdum-ads}@anchor{383}
  @section @code{GNAT.Memory_Dump} (@code{g-memdum.ads})
  
  
--- 24613,24619 ----
  FIPS PUB 198.
  
  @node GNAT Memory_Dump g-memdum ads,GNAT Most_Recent_Exception g-moreex ads,GNAT MD5 g-md5 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id92}@anchor{388}@anchor{gnat_rm/the_gnat_library gnat-memory-dump-g-memdum-ads}@anchor{389}
  @section @code{GNAT.Memory_Dump} (@code{g-memdum.ads})
  
  
*************** standard output or standard error files.
*** 24477,24483 ****
  output.
  
  @node GNAT Most_Recent_Exception g-moreex ads,GNAT OS_Lib g-os_lib ads,GNAT Memory_Dump g-memdum ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id92}@anchor{384}@anchor{gnat_rm/the_gnat_library gnat-most-recent-exception-g-moreex-ads}@anchor{385}
  @section @code{GNAT.Most_Recent_Exception} (@code{g-moreex.ads})
  
  
--- 24626,24632 ----
  output.
  
  @node GNAT Most_Recent_Exception g-moreex ads,GNAT OS_Lib g-os_lib ads,GNAT Memory_Dump g-memdum ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-most-recent-exception-g-moreex-ads}@anchor{38a}@anchor{gnat_rm/the_gnat_library id93}@anchor{38b}
  @section @code{GNAT.Most_Recent_Exception} (@code{g-moreex.ads})
  
  
*************** various logging purposes, including dupl
*** 24491,24497 ****
  Ada 83 implementation dependent extensions.
  
  @node GNAT OS_Lib g-os_lib ads,GNAT Perfect_Hash_Generators g-pehage ads,GNAT Most_Recent_Exception g-moreex ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-os-lib-g-os-lib-ads}@anchor{386}@anchor{gnat_rm/the_gnat_library id93}@anchor{387}
  @section @code{GNAT.OS_Lib} (@code{g-os_lib.ads})
  
  
--- 24640,24646 ----
  Ada 83 implementation dependent extensions.
  
  @node GNAT OS_Lib g-os_lib ads,GNAT Perfect_Hash_Generators g-pehage ads,GNAT Most_Recent_Exception g-moreex ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-os-lib-g-os-lib-ads}@anchor{38c}@anchor{gnat_rm/the_gnat_library id94}@anchor{38d}
  @section @code{GNAT.OS_Lib} (@code{g-os_lib.ads})
  
  
*************** including a portable spawn procedure, an
*** 24507,24513 ****
  and error return codes.
  
  @node GNAT Perfect_Hash_Generators g-pehage ads,GNAT Random_Numbers g-rannum ads,GNAT OS_Lib g-os_lib ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-perfect-hash-generators-g-pehage-ads}@anchor{388}@anchor{gnat_rm/the_gnat_library id94}@anchor{389}
  @section @code{GNAT.Perfect_Hash_Generators} (@code{g-pehage.ads})
  
  
--- 24656,24662 ----
  and error return codes.
  
  @node GNAT Perfect_Hash_Generators g-pehage ads,GNAT Random_Numbers g-rannum ads,GNAT OS_Lib g-os_lib ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-perfect-hash-generators-g-pehage-ads}@anchor{38e}@anchor{gnat_rm/the_gnat_library id95}@anchor{38f}
  @section @code{GNAT.Perfect_Hash_Generators} (@code{g-pehage.ads})
  
  
*************** hashcode are in the same order. These ha
*** 24525,24531 ****
  convenient for use with realtime applications.
  
  @node GNAT Random_Numbers g-rannum ads,GNAT Regexp g-regexp ads,GNAT Perfect_Hash_Generators g-pehage ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-random-numbers-g-rannum-ads}@anchor{38a}@anchor{gnat_rm/the_gnat_library id95}@anchor{38b}
  @section @code{GNAT.Random_Numbers} (@code{g-rannum.ads})
  
  
--- 24674,24680 ----
  convenient for use with realtime applications.
  
  @node GNAT Random_Numbers g-rannum ads,GNAT Regexp g-regexp ads,GNAT Perfect_Hash_Generators g-pehage ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-random-numbers-g-rannum-ads}@anchor{390}@anchor{gnat_rm/the_gnat_library id96}@anchor{391}
  @section @code{GNAT.Random_Numbers} (@code{g-rannum.ads})
  
  
*************** Provides random number capabilities whic
*** 24537,24543 ****
  standard Ada library and are more convenient to use.
  
  @node GNAT Regexp g-regexp ads,GNAT Registry g-regist ads,GNAT Random_Numbers g-rannum ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-regexp-g-regexp-ads}@anchor{255}@anchor{gnat_rm/the_gnat_library id96}@anchor{38c}
  @section @code{GNAT.Regexp} (@code{g-regexp.ads})
  
  
--- 24686,24692 ----
  standard Ada library and are more convenient to use.
  
  @node GNAT Regexp g-regexp ads,GNAT Registry g-regist ads,GNAT Random_Numbers g-rannum ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-regexp-g-regexp-ads}@anchor{259}@anchor{gnat_rm/the_gnat_library id97}@anchor{392}
  @section @code{GNAT.Regexp} (@code{g-regexp.ads})
  
  
*************** simplest of the three pattern matching p
*** 24553,24559 ****
  suitable for 'file globbing' applications.
  
  @node GNAT Registry g-regist ads,GNAT Regpat g-regpat ads,GNAT Regexp g-regexp ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-registry-g-regist-ads}@anchor{38d}@anchor{gnat_rm/the_gnat_library id97}@anchor{38e}
  @section @code{GNAT.Registry} (@code{g-regist.ads})
  
  
--- 24702,24708 ----
  suitable for 'file globbing' applications.
  
  @node GNAT Registry g-regist ads,GNAT Regpat g-regpat ads,GNAT Regexp g-regexp ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id98}@anchor{393}@anchor{gnat_rm/the_gnat_library gnat-registry-g-regist-ads}@anchor{394}
  @section @code{GNAT.Registry} (@code{g-regist.ads})
  
  
*************** registry API, but at a lower level of ab
*** 24567,24573 ****
  package provided with the Win32Ada binding
  
  @node GNAT Regpat g-regpat ads,GNAT Rewrite_Data g-rewdat ads,GNAT Registry g-regist ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id98}@anchor{38f}@anchor{gnat_rm/the_gnat_library gnat-regpat-g-regpat-ads}@anchor{390}
  @section @code{GNAT.Regpat} (@code{g-regpat.ads})
  
  
--- 24716,24722 ----
  package provided with the Win32Ada binding
  
  @node GNAT Regpat g-regpat ads,GNAT Rewrite_Data g-rewdat ads,GNAT Registry g-regist ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id99}@anchor{395}@anchor{gnat_rm/the_gnat_library gnat-regpat-g-regpat-ads}@anchor{396}
  @section @code{GNAT.Regpat} (@code{g-regpat.ads})
  
  
*************** from the original V7 style regular expre
*** 24582,24588 ****
  Henry Spencer (and binary compatible with this C library).
  
  @node GNAT Rewrite_Data g-rewdat ads,GNAT Secondary_Stack_Info g-sestin ads,GNAT Regpat g-regpat ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id99}@anchor{391}@anchor{gnat_rm/the_gnat_library gnat-rewrite-data-g-rewdat-ads}@anchor{392}
  @section @code{GNAT.Rewrite_Data} (@code{g-rewdat.ads})
  
  
--- 24731,24737 ----
  Henry Spencer (and binary compatible with this C library).
  
  @node GNAT Rewrite_Data g-rewdat ads,GNAT Secondary_Stack_Info g-sestin ads,GNAT Regpat g-regpat ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id100}@anchor{397}@anchor{gnat_rm/the_gnat_library gnat-rewrite-data-g-rewdat-ads}@anchor{398}
  @section @code{GNAT.Rewrite_Data} (@code{g-rewdat.ads})
  
  
*************** full content to be processed is not load
*** 24596,24602 ****
  this interface usable for large files or socket streams.
  
  @node GNAT Secondary_Stack_Info g-sestin ads,GNAT Semaphores g-semaph ads,GNAT Rewrite_Data g-rewdat ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id100}@anchor{393}@anchor{gnat_rm/the_gnat_library gnat-secondary-stack-info-g-sestin-ads}@anchor{394}
  @section @code{GNAT.Secondary_Stack_Info} (@code{g-sestin.ads})
  
  
--- 24745,24751 ----
  this interface usable for large files or socket streams.
  
  @node GNAT Secondary_Stack_Info g-sestin ads,GNAT Semaphores g-semaph ads,GNAT Rewrite_Data g-rewdat ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id101}@anchor{399}@anchor{gnat_rm/the_gnat_library gnat-secondary-stack-info-g-sestin-ads}@anchor{39a}
  @section @code{GNAT.Secondary_Stack_Info} (@code{g-sestin.ads})
  
  
*************** Provide the capability to query the high
*** 24608,24614 ****
  secondary stack.
  
  @node GNAT Semaphores g-semaph ads,GNAT Serial_Communications g-sercom ads,GNAT Secondary_Stack_Info g-sestin ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id101}@anchor{395}@anchor{gnat_rm/the_gnat_library gnat-semaphores-g-semaph-ads}@anchor{396}
  @section @code{GNAT.Semaphores} (@code{g-semaph.ads})
  
  
--- 24757,24763 ----
  secondary stack.
  
  @node GNAT Semaphores g-semaph ads,GNAT Serial_Communications g-sercom ads,GNAT Secondary_Stack_Info g-sestin ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id102}@anchor{39b}@anchor{gnat_rm/the_gnat_library gnat-semaphores-g-semaph-ads}@anchor{39c}
  @section @code{GNAT.Semaphores} (@code{g-semaph.ads})
  
  
*************** secondary stack.
*** 24619,24625 ****
  Provides classic counting and binary semaphores using protected types.
  
  @node GNAT Serial_Communications g-sercom ads,GNAT SHA1 g-sha1 ads,GNAT Semaphores g-semaph ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-serial-communications-g-sercom-ads}@anchor{397}@anchor{gnat_rm/the_gnat_library id102}@anchor{398}
  @section @code{GNAT.Serial_Communications} (@code{g-sercom.ads})
  
  
--- 24768,24774 ----
  Provides classic counting and binary semaphores using protected types.
  
  @node GNAT Serial_Communications g-sercom ads,GNAT SHA1 g-sha1 ads,GNAT Semaphores g-semaph ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-serial-communications-g-sercom-ads}@anchor{39d}@anchor{gnat_rm/the_gnat_library id103}@anchor{39e}
  @section @code{GNAT.Serial_Communications} (@code{g-sercom.ads})
  
  
*************** Provides a simple interface to send and
*** 24631,24637 ****
  port. This is only supported on GNU/Linux and Windows.
  
  @node GNAT SHA1 g-sha1 ads,GNAT SHA224 g-sha224 ads,GNAT Serial_Communications g-sercom ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-sha1-g-sha1-ads}@anchor{399}@anchor{gnat_rm/the_gnat_library id103}@anchor{39a}
  @section @code{GNAT.SHA1} (@code{g-sha1.ads})
  
  
--- 24780,24786 ----
  port. This is only supported on GNU/Linux and Windows.
  
  @node GNAT SHA1 g-sha1 ads,GNAT SHA224 g-sha224 ads,GNAT Serial_Communications g-sercom ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-sha1-g-sha1-ads}@anchor{39f}@anchor{gnat_rm/the_gnat_library id104}@anchor{3a0}
  @section @code{GNAT.SHA1} (@code{g-sha1.ads})
  
  
*************** and RFC 3174, and the HMAC-SHA1 message
*** 24644,24650 ****
  in RFC 2104 and FIPS PUB 198.
  
  @node GNAT SHA224 g-sha224 ads,GNAT SHA256 g-sha256 ads,GNAT SHA1 g-sha1 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-sha224-g-sha224-ads}@anchor{39b}@anchor{gnat_rm/the_gnat_library id104}@anchor{39c}
  @section @code{GNAT.SHA224} (@code{g-sha224.ads})
  
  
--- 24793,24799 ----
  in RFC 2104 and FIPS PUB 198.
  
  @node GNAT SHA224 g-sha224 ads,GNAT SHA256 g-sha256 ads,GNAT SHA1 g-sha1 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-sha224-g-sha224-ads}@anchor{3a1}@anchor{gnat_rm/the_gnat_library id105}@anchor{3a2}
  @section @code{GNAT.SHA224} (@code{g-sha224.ads})
  
  
*************** and the HMAC-SHA224 message authenticati
*** 24657,24663 ****
  in RFC 2104 and FIPS PUB 198.
  
  @node GNAT SHA256 g-sha256 ads,GNAT SHA384 g-sha384 ads,GNAT SHA224 g-sha224 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id105}@anchor{39d}@anchor{gnat_rm/the_gnat_library gnat-sha256-g-sha256-ads}@anchor{39e}
  @section @code{GNAT.SHA256} (@code{g-sha256.ads})
  
  
--- 24806,24812 ----
  in RFC 2104 and FIPS PUB 198.
  
  @node GNAT SHA256 g-sha256 ads,GNAT SHA384 g-sha384 ads,GNAT SHA224 g-sha224 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-sha256-g-sha256-ads}@anchor{3a3}@anchor{gnat_rm/the_gnat_library id106}@anchor{3a4}
  @section @code{GNAT.SHA256} (@code{g-sha256.ads})
  
  
*************** and the HMAC-SHA256 message authenticati
*** 24670,24676 ****
  in RFC 2104 and FIPS PUB 198.
  
  @node GNAT SHA384 g-sha384 ads,GNAT SHA512 g-sha512 ads,GNAT SHA256 g-sha256 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-sha384-g-sha384-ads}@anchor{39f}@anchor{gnat_rm/the_gnat_library id106}@anchor{3a0}
  @section @code{GNAT.SHA384} (@code{g-sha384.ads})
  
  
--- 24819,24825 ----
  in RFC 2104 and FIPS PUB 198.
  
  @node GNAT SHA384 g-sha384 ads,GNAT SHA512 g-sha512 ads,GNAT SHA256 g-sha256 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-sha384-g-sha384-ads}@anchor{3a5}@anchor{gnat_rm/the_gnat_library id107}@anchor{3a6}
  @section @code{GNAT.SHA384} (@code{g-sha384.ads})
  
  
*************** and the HMAC-SHA384 message authenticati
*** 24683,24689 ****
  in RFC 2104 and FIPS PUB 198.
  
  @node GNAT SHA512 g-sha512 ads,GNAT Signals g-signal ads,GNAT SHA384 g-sha384 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-sha512-g-sha512-ads}@anchor{3a1}@anchor{gnat_rm/the_gnat_library id107}@anchor{3a2}
  @section @code{GNAT.SHA512} (@code{g-sha512.ads})
  
  
--- 24832,24838 ----
  in RFC 2104 and FIPS PUB 198.
  
  @node GNAT SHA512 g-sha512 ads,GNAT Signals g-signal ads,GNAT SHA384 g-sha384 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id108}@anchor{3a7}@anchor{gnat_rm/the_gnat_library gnat-sha512-g-sha512-ads}@anchor{3a8}
  @section @code{GNAT.SHA512} (@code{g-sha512.ads})
  
  
*************** and the HMAC-SHA512 message authenticati
*** 24696,24702 ****
  in RFC 2104 and FIPS PUB 198.
  
  @node GNAT Signals g-signal ads,GNAT Sockets g-socket ads,GNAT SHA512 g-sha512 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-signals-g-signal-ads}@anchor{3a3}@anchor{gnat_rm/the_gnat_library id108}@anchor{3a4}
  @section @code{GNAT.Signals} (@code{g-signal.ads})
  
  
--- 24845,24851 ----
  in RFC 2104 and FIPS PUB 198.
  
  @node GNAT Signals g-signal ads,GNAT Sockets g-socket ads,GNAT SHA512 g-sha512 ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id109}@anchor{3a9}@anchor{gnat_rm/the_gnat_library gnat-signals-g-signal-ads}@anchor{3aa}
  @section @code{GNAT.Signals} (@code{g-signal.ads})
  
  
*************** Provides the ability to manipulate the b
*** 24708,24714 ****
  targets.
  
  @node GNAT Sockets g-socket ads,GNAT Source_Info g-souinf ads,GNAT Signals g-signal ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id109}@anchor{3a5}@anchor{gnat_rm/the_gnat_library gnat-sockets-g-socket-ads}@anchor{3a6}
  @section @code{GNAT.Sockets} (@code{g-socket.ads})
  
  
--- 24857,24863 ----
  targets.
  
  @node GNAT Sockets g-socket ads,GNAT Source_Info g-souinf ads,GNAT Signals g-signal ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-sockets-g-socket-ads}@anchor{3ab}@anchor{gnat_rm/the_gnat_library id110}@anchor{3ac}
  @section @code{GNAT.Sockets} (@code{g-socket.ads})
  
  
*************** on all native GNAT ports and on VxWorks
*** 24723,24729 ****
  the LynxOS cross port.
  
  @node GNAT Source_Info g-souinf ads,GNAT Spelling_Checker g-speche ads,GNAT Sockets g-socket ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-source-info-g-souinf-ads}@anchor{3a7}@anchor{gnat_rm/the_gnat_library id110}@anchor{3a8}
  @section @code{GNAT.Source_Info} (@code{g-souinf.ads})
  
  
--- 24872,24878 ----
  the LynxOS cross port.
  
  @node GNAT Source_Info g-souinf ads,GNAT Spelling_Checker g-speche ads,GNAT Sockets g-socket ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-source-info-g-souinf-ads}@anchor{3ad}@anchor{gnat_rm/the_gnat_library id111}@anchor{3ae}
  @section @code{GNAT.Source_Info} (@code{g-souinf.ads})
  
  
*************** subprograms yielding the date and time o
*** 24737,24743 ****
  C macros @code{__DATE__} and @code{__TIME__})
  
  @node GNAT Spelling_Checker g-speche ads,GNAT Spelling_Checker_Generic g-spchge ads,GNAT Source_Info g-souinf ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-spelling-checker-g-speche-ads}@anchor{3a9}@anchor{gnat_rm/the_gnat_library id111}@anchor{3aa}
  @section @code{GNAT.Spelling_Checker} (@code{g-speche.ads})
  
  
--- 24886,24892 ----
  C macros @code{__DATE__} and @code{__TIME__})
  
  @node GNAT Spelling_Checker g-speche ads,GNAT Spelling_Checker_Generic g-spchge ads,GNAT Source_Info g-souinf ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id112}@anchor{3af}@anchor{gnat_rm/the_gnat_library gnat-spelling-checker-g-speche-ads}@anchor{3b0}
  @section @code{GNAT.Spelling_Checker} (@code{g-speche.ads})
  
  
*************** Provides a function for determining whet
*** 24749,24755 ****
  near misspelling of another string.
  
  @node GNAT Spelling_Checker_Generic g-spchge ads,GNAT Spitbol Patterns g-spipat ads,GNAT Spelling_Checker g-speche ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id112}@anchor{3ab}@anchor{gnat_rm/the_gnat_library gnat-spelling-checker-generic-g-spchge-ads}@anchor{3ac}
  @section @code{GNAT.Spelling_Checker_Generic} (@code{g-spchge.ads})
  
  
--- 24898,24904 ----
  near misspelling of another string.
  
  @node GNAT Spelling_Checker_Generic g-spchge ads,GNAT Spitbol Patterns g-spipat ads,GNAT Spelling_Checker g-speche ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-spelling-checker-generic-g-spchge-ads}@anchor{3b1}@anchor{gnat_rm/the_gnat_library id113}@anchor{3b2}
  @section @code{GNAT.Spelling_Checker_Generic} (@code{g-spchge.ads})
  
  
*************** determining whether one string is a plau
*** 24762,24768 ****
  string.
  
  @node GNAT Spitbol Patterns g-spipat ads,GNAT Spitbol g-spitbo ads,GNAT Spelling_Checker_Generic g-spchge ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id113}@anchor{3ad}@anchor{gnat_rm/the_gnat_library gnat-spitbol-patterns-g-spipat-ads}@anchor{3ae}
  @section @code{GNAT.Spitbol.Patterns} (@code{g-spipat.ads})
  
  
--- 24911,24917 ----
  string.
  
  @node GNAT Spitbol Patterns g-spipat ads,GNAT Spitbol g-spitbo ads,GNAT Spelling_Checker_Generic g-spchge ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-spitbol-patterns-g-spipat-ads}@anchor{3b3}@anchor{gnat_rm/the_gnat_library id114}@anchor{3b4}
  @section @code{GNAT.Spitbol.Patterns} (@code{g-spipat.ads})
  
  
*************** the SNOBOL4 dynamic pattern construction
*** 24778,24784 ****
  efficient algorithm developed by Robert Dewar for the SPITBOL system.
  
  @node GNAT Spitbol g-spitbo ads,GNAT Spitbol Table_Boolean g-sptabo ads,GNAT Spitbol Patterns g-spipat ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-spitbol-g-spitbo-ads}@anchor{3af}@anchor{gnat_rm/the_gnat_library id114}@anchor{3b0}
  @section @code{GNAT.Spitbol} (@code{g-spitbo.ads})
  
  
--- 24927,24933 ----
  efficient algorithm developed by Robert Dewar for the SPITBOL system.
  
  @node GNAT Spitbol g-spitbo ads,GNAT Spitbol Table_Boolean g-sptabo ads,GNAT Spitbol Patterns g-spipat ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-spitbol-g-spitbo-ads}@anchor{3b5}@anchor{gnat_rm/the_gnat_library id115}@anchor{3b6}
  @section @code{GNAT.Spitbol} (@code{g-spitbo.ads})
  
  
*************** useful for constructing arbitrary mappin
*** 24793,24799 ****
  the SNOBOL4 TABLE function.
  
  @node GNAT Spitbol Table_Boolean g-sptabo ads,GNAT Spitbol Table_Integer g-sptain ads,GNAT Spitbol g-spitbo ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-spitbol-table-boolean-g-sptabo-ads}@anchor{3b1}@anchor{gnat_rm/the_gnat_library id115}@anchor{3b2}
  @section @code{GNAT.Spitbol.Table_Boolean} (@code{g-sptabo.ads})
  
  
--- 24942,24948 ----
  the SNOBOL4 TABLE function.
  
  @node GNAT Spitbol Table_Boolean g-sptabo ads,GNAT Spitbol Table_Integer g-sptain ads,GNAT Spitbol g-spitbo ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id116}@anchor{3b7}@anchor{gnat_rm/the_gnat_library gnat-spitbol-table-boolean-g-sptabo-ads}@anchor{3b8}
  @section @code{GNAT.Spitbol.Table_Boolean} (@code{g-sptabo.ads})
  
  
*************** for type @code{Standard.Boolean}, giving
*** 24808,24814 ****
  string values.
  
  @node GNAT Spitbol Table_Integer g-sptain ads,GNAT Spitbol Table_VString g-sptavs ads,GNAT Spitbol Table_Boolean g-sptabo ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-spitbol-table-integer-g-sptain-ads}@anchor{3b3}@anchor{gnat_rm/the_gnat_library id116}@anchor{3b4}
  @section @code{GNAT.Spitbol.Table_Integer} (@code{g-sptain.ads})
  
  
--- 24957,24963 ----
  string values.
  
  @node GNAT Spitbol Table_Integer g-sptain ads,GNAT Spitbol Table_VString g-sptavs ads,GNAT Spitbol Table_Boolean g-sptabo ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-spitbol-table-integer-g-sptain-ads}@anchor{3b9}@anchor{gnat_rm/the_gnat_library id117}@anchor{3ba}
  @section @code{GNAT.Spitbol.Table_Integer} (@code{g-sptain.ads})
  
  
*************** for type @code{Standard.Integer}, giving
*** 24825,24831 ****
  from string to integer values.
  
  @node GNAT Spitbol Table_VString g-sptavs ads,GNAT SSE g-sse ads,GNAT Spitbol Table_Integer g-sptain ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id117}@anchor{3b5}@anchor{gnat_rm/the_gnat_library gnat-spitbol-table-vstring-g-sptavs-ads}@anchor{3b6}
  @section @code{GNAT.Spitbol.Table_VString} (@code{g-sptavs.ads})
  
  
--- 24974,24980 ----
  from string to integer values.
  
  @node GNAT Spitbol Table_VString g-sptavs ads,GNAT SSE g-sse ads,GNAT Spitbol Table_Integer g-sptain ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id118}@anchor{3bb}@anchor{gnat_rm/the_gnat_library gnat-spitbol-table-vstring-g-sptavs-ads}@anchor{3bc}
  @section @code{GNAT.Spitbol.Table_VString} (@code{g-sptavs.ads})
  
  
*************** a variable length string type, giving an
*** 24842,24848 ****
  maps from strings to strings.
  
  @node GNAT SSE g-sse ads,GNAT SSE Vector_Types g-ssvety ads,GNAT Spitbol Table_VString g-sptavs ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id118}@anchor{3b7}@anchor{gnat_rm/the_gnat_library gnat-sse-g-sse-ads}@anchor{3b8}
  @section @code{GNAT.SSE} (@code{g-sse.ads})
  
  
--- 24991,24997 ----
  maps from strings to strings.
  
  @node GNAT SSE g-sse ads,GNAT SSE Vector_Types g-ssvety ads,GNAT Spitbol Table_VString g-sptavs ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id119}@anchor{3bd}@anchor{gnat_rm/the_gnat_library gnat-sse-g-sse-ads}@anchor{3be}
  @section @code{GNAT.SSE} (@code{g-sse.ads})
  
  
*************** targets.  It exposes vector component ty
*** 24854,24860 ****
  introduction to the binding contents and use.
  
  @node GNAT SSE Vector_Types g-ssvety ads,GNAT String_Hash g-strhas ads,GNAT SSE g-sse ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-sse-vector-types-g-ssvety-ads}@anchor{3b9}@anchor{gnat_rm/the_gnat_library id119}@anchor{3ba}
  @section @code{GNAT.SSE.Vector_Types} (@code{g-ssvety.ads})
  
  
--- 25003,25009 ----
  introduction to the binding contents and use.
  
  @node GNAT SSE Vector_Types g-ssvety ads,GNAT String_Hash g-strhas ads,GNAT SSE g-sse ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-sse-vector-types-g-ssvety-ads}@anchor{3bf}@anchor{gnat_rm/the_gnat_library id120}@anchor{3c0}
  @section @code{GNAT.SSE.Vector_Types} (@code{g-ssvety.ads})
  
  
*************** introduction to the binding contents and
*** 24863,24869 ****
  SSE vector types for use with SSE related intrinsics.
  
  @node GNAT String_Hash g-strhas ads,GNAT Strings g-string ads,GNAT SSE Vector_Types g-ssvety ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-string-hash-g-strhas-ads}@anchor{3bb}@anchor{gnat_rm/the_gnat_library id120}@anchor{3bc}
  @section @code{GNAT.String_Hash} (@code{g-strhas.ads})
  
  
--- 25012,25018 ----
  SSE vector types for use with SSE related intrinsics.
  
  @node GNAT String_Hash g-strhas ads,GNAT Strings g-string ads,GNAT SSE Vector_Types g-ssvety ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-string-hash-g-strhas-ads}@anchor{3c1}@anchor{gnat_rm/the_gnat_library id121}@anchor{3c2}
  @section @code{GNAT.String_Hash} (@code{g-strhas.ads})
  
  
*************** Provides a generic hash function working
*** 24875,24881 ****
  type and the hash result type are parameters.
  
  @node GNAT Strings g-string ads,GNAT String_Split g-strspl ads,GNAT String_Hash g-strhas ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-strings-g-string-ads}@anchor{3bd}@anchor{gnat_rm/the_gnat_library id121}@anchor{3be}
  @section @code{GNAT.Strings} (@code{g-string.ads})
  
  
--- 25024,25030 ----
  type and the hash result type are parameters.
  
  @node GNAT Strings g-string ads,GNAT String_Split g-strspl ads,GNAT String_Hash g-strhas ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-strings-g-string-ads}@anchor{3c3}@anchor{gnat_rm/the_gnat_library id122}@anchor{3c4}
  @section @code{GNAT.Strings} (@code{g-string.ads})
  
  
*************** Common String access types and related s
*** 24885,24891 ****
  defines a string access and an array of string access types.
  
  @node GNAT String_Split g-strspl ads,GNAT Table g-table ads,GNAT Strings g-string ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-string-split-g-strspl-ads}@anchor{3bf}@anchor{gnat_rm/the_gnat_library id122}@anchor{3c0}
  @section @code{GNAT.String_Split} (@code{g-strspl.ads})
  
  
--- 25034,25040 ----
  defines a string access and an array of string access types.
  
  @node GNAT String_Split g-strspl ads,GNAT Table g-table ads,GNAT Strings g-string ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-string-split-g-strspl-ads}@anchor{3c5}@anchor{gnat_rm/the_gnat_library id123}@anchor{3c6}
  @section @code{GNAT.String_Split} (@code{g-strspl.ads})
  
  
*************** to the resulting slices. This package is
*** 24899,24905 ****
  @code{GNAT.Array_Split}.
  
  @node GNAT Table g-table ads,GNAT Task_Lock g-tasloc ads,GNAT String_Split g-strspl ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-table-g-table-ads}@anchor{3c1}@anchor{gnat_rm/the_gnat_library id123}@anchor{3c2}
  @section @code{GNAT.Table} (@code{g-table.ads})
  
  
--- 25048,25054 ----
  @code{GNAT.Array_Split}.
  
  @node GNAT Table g-table ads,GNAT Task_Lock g-tasloc ads,GNAT String_Split g-strspl ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id124}@anchor{3c7}@anchor{gnat_rm/the_gnat_library gnat-table-g-table-ads}@anchor{3c8}
  @section @code{GNAT.Table} (@code{g-table.ads})
  
  
*************** while an instantiation of @code{GNAT.Dyn
*** 24919,24925 ****
  used to define dynamic instances of the table.
  
  @node GNAT Task_Lock g-tasloc ads,GNAT Time_Stamp g-timsta ads,GNAT Table g-table ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id124}@anchor{3c3}@anchor{gnat_rm/the_gnat_library gnat-task-lock-g-tasloc-ads}@anchor{3c4}
  @section @code{GNAT.Task_Lock} (@code{g-tasloc.ads})
  
  
--- 25068,25074 ----
  used to define dynamic instances of the table.
  
  @node GNAT Task_Lock g-tasloc ads,GNAT Time_Stamp g-timsta ads,GNAT Table g-table ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id125}@anchor{3c9}@anchor{gnat_rm/the_gnat_library gnat-task-lock-g-tasloc-ads}@anchor{3ca}
  @section @code{GNAT.Task_Lock} (@code{g-tasloc.ads})
  
  
*************** single global task lock.  Appropriate fo
*** 24936,24942 ****
  between tasks is very rarely expected.
  
  @node GNAT Time_Stamp g-timsta ads,GNAT Threads g-thread ads,GNAT Task_Lock g-tasloc ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id125}@anchor{3c5}@anchor{gnat_rm/the_gnat_library gnat-time-stamp-g-timsta-ads}@anchor{3c6}
  @section @code{GNAT.Time_Stamp} (@code{g-timsta.ads})
  
  
--- 25085,25091 ----
  between tasks is very rarely expected.
  
  @node GNAT Time_Stamp g-timsta ads,GNAT Threads g-thread ads,GNAT Task_Lock g-tasloc ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id126}@anchor{3cb}@anchor{gnat_rm/the_gnat_library gnat-time-stamp-g-timsta-ads}@anchor{3cc}
  @section @code{GNAT.Time_Stamp} (@code{g-timsta.ads})
  
  
*************** represents the current date and time in
*** 24951,24957 ****
  routine with minimal code and there are no dependencies on any other unit.
  
  @node GNAT Threads g-thread ads,GNAT Traceback g-traceb ads,GNAT Time_Stamp g-timsta ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-threads-g-thread-ads}@anchor{3c7}@anchor{gnat_rm/the_gnat_library id126}@anchor{3c8}
  @section @code{GNAT.Threads} (@code{g-thread.ads})
  
  
--- 25100,25106 ----
  routine with minimal code and there are no dependencies on any other unit.
  
  @node GNAT Threads g-thread ads,GNAT Traceback g-traceb ads,GNAT Time_Stamp g-timsta ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id127}@anchor{3cd}@anchor{gnat_rm/the_gnat_library gnat-threads-g-thread-ads}@anchor{3ce}
  @section @code{GNAT.Threads} (@code{g-thread.ads})
  
  
*************** further details if your program has thre
*** 24968,24974 ****
  environment which then accesses Ada code.
  
  @node GNAT Traceback g-traceb ads,GNAT Traceback Symbolic g-trasym ads,GNAT Threads g-thread ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id127}@anchor{3c9}@anchor{gnat_rm/the_gnat_library gnat-traceback-g-traceb-ads}@anchor{3ca}
  @section @code{GNAT.Traceback} (@code{g-traceb.ads})
  
  
--- 25117,25123 ----
  environment which then accesses Ada code.
  
  @node GNAT Traceback g-traceb ads,GNAT Traceback Symbolic g-trasym ads,GNAT Threads g-thread ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id128}@anchor{3cf}@anchor{gnat_rm/the_gnat_library gnat-traceback-g-traceb-ads}@anchor{3d0}
  @section @code{GNAT.Traceback} (@code{g-traceb.ads})
  
  
*************** Provides a facility for obtaining non-sy
*** 24980,24986 ****
  in various debugging situations.
  
  @node GNAT Traceback Symbolic g-trasym ads,GNAT UTF_32 g-table ads,GNAT Traceback g-traceb ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-traceback-symbolic-g-trasym-ads}@anchor{3cb}@anchor{gnat_rm/the_gnat_library id128}@anchor{3cc}
  @section @code{GNAT.Traceback.Symbolic} (@code{g-trasym.ads})
  
  
--- 25129,25135 ----
  in various debugging situations.
  
  @node GNAT Traceback Symbolic g-trasym ads,GNAT UTF_32 g-table ads,GNAT Traceback g-traceb ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-traceback-symbolic-g-trasym-ads}@anchor{3d1}@anchor{gnat_rm/the_gnat_library id129}@anchor{3d2}
  @section @code{GNAT.Traceback.Symbolic} (@code{g-trasym.ads})
  
  
*************** in various debugging situations.
*** 24989,24995 ****
  @geindex Trace back facilities
  
  @node GNAT UTF_32 g-table ads,GNAT Wide_Spelling_Checker g-u3spch ads,GNAT Traceback Symbolic g-trasym ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id129}@anchor{3cd}@anchor{gnat_rm/the_gnat_library gnat-utf-32-g-table-ads}@anchor{3ce}
  @section @code{GNAT.UTF_32} (@code{g-table.ads})
  
  
--- 25138,25144 ----
  @geindex Trace back facilities
  
  @node GNAT UTF_32 g-table ads,GNAT Wide_Spelling_Checker g-u3spch ads,GNAT Traceback Symbolic g-trasym ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id130}@anchor{3d3}@anchor{gnat_rm/the_gnat_library gnat-utf-32-g-table-ads}@anchor{3d4}
  @section @code{GNAT.UTF_32} (@code{g-table.ads})
  
  
*************** lower case to upper case fold routine co
*** 25008,25014 ****
  the Ada 2005 rules for identifier equivalence.
  
  @node GNAT Wide_Spelling_Checker g-u3spch ads,GNAT Wide_Spelling_Checker g-wispch ads,GNAT UTF_32 g-table ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-wide-spelling-checker-g-u3spch-ads}@anchor{3cf}@anchor{gnat_rm/the_gnat_library id130}@anchor{3d0}
  @section @code{GNAT.Wide_Spelling_Checker} (@code{g-u3spch.ads})
  
  
--- 25157,25163 ----
  the Ada 2005 rules for identifier equivalence.
  
  @node GNAT Wide_Spelling_Checker g-u3spch ads,GNAT Wide_Spelling_Checker g-wispch ads,GNAT UTF_32 g-table ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-wide-spelling-checker-g-u3spch-ads}@anchor{3d5}@anchor{gnat_rm/the_gnat_library id131}@anchor{3d6}
  @section @code{GNAT.Wide_Spelling_Checker} (@code{g-u3spch.ads})
  
  
*************** near misspelling of another wide wide st
*** 25021,25027 ****
  using the UTF_32_String type defined in System.Wch_Cnv.
  
  @node GNAT Wide_Spelling_Checker g-wispch ads,GNAT Wide_String_Split g-wistsp ads,GNAT Wide_Spelling_Checker g-u3spch ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-wide-spelling-checker-g-wispch-ads}@anchor{3d1}@anchor{gnat_rm/the_gnat_library id131}@anchor{3d2}
  @section @code{GNAT.Wide_Spelling_Checker} (@code{g-wispch.ads})
  
  
--- 25170,25176 ----
  using the UTF_32_String type defined in System.Wch_Cnv.
  
  @node GNAT Wide_Spelling_Checker g-wispch ads,GNAT Wide_String_Split g-wistsp ads,GNAT Wide_Spelling_Checker g-u3spch ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-wide-spelling-checker-g-wispch-ads}@anchor{3d7}@anchor{gnat_rm/the_gnat_library id132}@anchor{3d8}
  @section @code{GNAT.Wide_Spelling_Checker} (@code{g-wispch.ads})
  
  
*************** Provides a function for determining whet
*** 25033,25039 ****
  near misspelling of another wide string.
  
  @node GNAT Wide_String_Split g-wistsp ads,GNAT Wide_Wide_Spelling_Checker g-zspche ads,GNAT Wide_Spelling_Checker g-wispch ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id132}@anchor{3d3}@anchor{gnat_rm/the_gnat_library gnat-wide-string-split-g-wistsp-ads}@anchor{3d4}
  @section @code{GNAT.Wide_String_Split} (@code{g-wistsp.ads})
  
  
--- 25182,25188 ----
  near misspelling of another wide string.
  
  @node GNAT Wide_String_Split g-wistsp ads,GNAT Wide_Wide_Spelling_Checker g-zspche ads,GNAT Wide_Spelling_Checker g-wispch ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id133}@anchor{3d9}@anchor{gnat_rm/the_gnat_library gnat-wide-string-split-g-wistsp-ads}@anchor{3da}
  @section @code{GNAT.Wide_String_Split} (@code{g-wistsp.ads})
  
  
*************** to the resulting slices. This package is
*** 25047,25053 ****
  @code{GNAT.Array_Split}.
  
  @node GNAT Wide_Wide_Spelling_Checker g-zspche ads,GNAT Wide_Wide_String_Split g-zistsp ads,GNAT Wide_String_Split g-wistsp ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-wide-wide-spelling-checker-g-zspche-ads}@anchor{3d5}@anchor{gnat_rm/the_gnat_library id133}@anchor{3d6}
  @section @code{GNAT.Wide_Wide_Spelling_Checker} (@code{g-zspche.ads})
  
  
--- 25196,25202 ----
  @code{GNAT.Array_Split}.
  
  @node GNAT Wide_Wide_Spelling_Checker g-zspche ads,GNAT Wide_Wide_String_Split g-zistsp ads,GNAT Wide_String_Split g-wistsp ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-wide-wide-spelling-checker-g-zspche-ads}@anchor{3db}@anchor{gnat_rm/the_gnat_library id134}@anchor{3dc}
  @section @code{GNAT.Wide_Wide_Spelling_Checker} (@code{g-zspche.ads})
  
  
*************** Provides a function for determining whet
*** 25059,25065 ****
  near misspelling of another wide wide string.
  
  @node GNAT Wide_Wide_String_Split g-zistsp ads,Interfaces C Extensions i-cexten ads,GNAT Wide_Wide_Spelling_Checker g-zspche ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-wide-wide-string-split-g-zistsp-ads}@anchor{3d7}@anchor{gnat_rm/the_gnat_library id134}@anchor{3d8}
  @section @code{GNAT.Wide_Wide_String_Split} (@code{g-zistsp.ads})
  
  
--- 25208,25214 ----
  near misspelling of another wide wide string.
  
  @node GNAT Wide_Wide_String_Split g-zistsp ads,Interfaces C Extensions i-cexten ads,GNAT Wide_Wide_Spelling_Checker g-zspche ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library gnat-wide-wide-string-split-g-zistsp-ads}@anchor{3dd}@anchor{gnat_rm/the_gnat_library id135}@anchor{3de}
  @section @code{GNAT.Wide_Wide_String_Split} (@code{g-zistsp.ads})
  
  
*************** to the resulting slices. This package is
*** 25073,25079 ****
  @code{GNAT.Array_Split}.
  
  @node Interfaces C Extensions i-cexten ads,Interfaces C Streams i-cstrea ads,GNAT Wide_Wide_String_Split g-zistsp ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library interfaces-c-extensions-i-cexten-ads}@anchor{3d9}@anchor{gnat_rm/the_gnat_library id135}@anchor{3da}
  @section @code{Interfaces.C.Extensions} (@code{i-cexten.ads})
  
  
--- 25222,25228 ----
  @code{GNAT.Array_Split}.
  
  @node Interfaces C Extensions i-cexten ads,Interfaces C Streams i-cstrea ads,GNAT Wide_Wide_String_Split g-zistsp ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library interfaces-c-extensions-i-cexten-ads}@anchor{3df}@anchor{gnat_rm/the_gnat_library id136}@anchor{3e0}
  @section @code{Interfaces.C.Extensions} (@code{i-cexten.ads})
  
  
*************** for use with either manually or automati
*** 25084,25090 ****
  to C libraries.
  
  @node Interfaces C Streams i-cstrea ads,Interfaces Packed_Decimal i-pacdec ads,Interfaces C Extensions i-cexten ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library interfaces-c-streams-i-cstrea-ads}@anchor{3db}@anchor{gnat_rm/the_gnat_library id136}@anchor{3dc}
  @section @code{Interfaces.C.Streams} (@code{i-cstrea.ads})
  
  
--- 25233,25239 ----
  to C libraries.
  
  @node Interfaces C Streams i-cstrea ads,Interfaces Packed_Decimal i-pacdec ads,Interfaces C Extensions i-cexten ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library interfaces-c-streams-i-cstrea-ads}@anchor{3e1}@anchor{gnat_rm/the_gnat_library id137}@anchor{3e2}
  @section @code{Interfaces.C.Streams} (@code{i-cstrea.ads})
  
  
*************** This package is a binding for the most c
*** 25097,25103 ****
  on C streams.
  
  @node Interfaces Packed_Decimal i-pacdec ads,Interfaces VxWorks i-vxwork ads,Interfaces C Streams i-cstrea ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library interfaces-packed-decimal-i-pacdec-ads}@anchor{3dd}@anchor{gnat_rm/the_gnat_library id137}@anchor{3de}
  @section @code{Interfaces.Packed_Decimal} (@code{i-pacdec.ads})
  
  
--- 25246,25252 ----
  on C streams.
  
  @node Interfaces Packed_Decimal i-pacdec ads,Interfaces VxWorks i-vxwork ads,Interfaces C Streams i-cstrea ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id138}@anchor{3e3}@anchor{gnat_rm/the_gnat_library interfaces-packed-decimal-i-pacdec-ads}@anchor{3e4}
  @section @code{Interfaces.Packed_Decimal} (@code{i-pacdec.ads})
  
  
*************** from a packed decimal format compatible
*** 25112,25118 ****
  mainframes.
  
  @node Interfaces VxWorks i-vxwork ads,Interfaces VxWorks Int_Connection i-vxinco ads,Interfaces Packed_Decimal i-pacdec ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id138}@anchor{3df}@anchor{gnat_rm/the_gnat_library interfaces-vxworks-i-vxwork-ads}@anchor{3e0}
  @section @code{Interfaces.VxWorks} (@code{i-vxwork.ads})
  
  
--- 25261,25267 ----
  mainframes.
  
  @node Interfaces VxWorks i-vxwork ads,Interfaces VxWorks Int_Connection i-vxinco ads,Interfaces Packed_Decimal i-pacdec ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id139}@anchor{3e5}@anchor{gnat_rm/the_gnat_library interfaces-vxworks-i-vxwork-ads}@anchor{3e6}
  @section @code{Interfaces.VxWorks} (@code{i-vxwork.ads})
  
  
*************** In particular, it interfaces with the
*** 25128,25134 ****
  VxWorks hardware interrupt facilities.
  
  @node Interfaces VxWorks Int_Connection i-vxinco ads,Interfaces VxWorks IO i-vxwoio ads,Interfaces VxWorks i-vxwork ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library interfaces-vxworks-int-connection-i-vxinco-ads}@anchor{3e1}@anchor{gnat_rm/the_gnat_library id139}@anchor{3e2}
  @section @code{Interfaces.VxWorks.Int_Connection} (@code{i-vxinco.ads})
  
  
--- 25277,25283 ----
  VxWorks hardware interrupt facilities.
  
  @node Interfaces VxWorks Int_Connection i-vxinco ads,Interfaces VxWorks IO i-vxwoio ads,Interfaces VxWorks i-vxwork ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library interfaces-vxworks-int-connection-i-vxinco-ads}@anchor{3e7}@anchor{gnat_rm/the_gnat_library id140}@anchor{3e8}
  @section @code{Interfaces.VxWorks.Int_Connection} (@code{i-vxinco.ads})
  
  
*************** intConnect() with a custom routine for i
*** 25144,25150 ****
  handlers.
  
  @node Interfaces VxWorks IO i-vxwoio ads,System Address_Image s-addima ads,Interfaces VxWorks Int_Connection i-vxinco ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library interfaces-vxworks-io-i-vxwoio-ads}@anchor{3e3}@anchor{gnat_rm/the_gnat_library id140}@anchor{3e4}
  @section @code{Interfaces.VxWorks.IO} (@code{i-vxwoio.ads})
  
  
--- 25293,25299 ----
  handlers.
  
  @node Interfaces VxWorks IO i-vxwoio ads,System Address_Image s-addima ads,Interfaces VxWorks Int_Connection i-vxinco ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library interfaces-vxworks-io-i-vxwoio-ads}@anchor{3e9}@anchor{gnat_rm/the_gnat_library id141}@anchor{3ea}
  @section @code{Interfaces.VxWorks.IO} (@code{i-vxwoio.ads})
  
  
*************** function codes. A particular use of this
*** 25167,25173 ****
  to enable the use of Get_Immediate under VxWorks.
  
  @node System Address_Image s-addima ads,System Assertions s-assert ads,Interfaces VxWorks IO i-vxwoio ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id141}@anchor{3e5}@anchor{gnat_rm/the_gnat_library system-address-image-s-addima-ads}@anchor{3e6}
  @section @code{System.Address_Image} (@code{s-addima.ads})
  
  
--- 25316,25322 ----
  to enable the use of Get_Immediate under VxWorks.
  
  @node System Address_Image s-addima ads,System Assertions s-assert ads,Interfaces VxWorks IO i-vxwoio ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-address-image-s-addima-ads}@anchor{3eb}@anchor{gnat_rm/the_gnat_library id142}@anchor{3ec}
  @section @code{System.Address_Image} (@code{s-addima.ads})
  
  
*************** function that gives an (implementation d
*** 25183,25189 ****
  string which identifies an address.
  
  @node System Assertions s-assert ads,System Atomic_Counters s-atocou ads,System Address_Image s-addima ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-assertions-s-assert-ads}@anchor{3e7}@anchor{gnat_rm/the_gnat_library id142}@anchor{3e8}
  @section @code{System.Assertions} (@code{s-assert.ads})
  
  
--- 25332,25338 ----
  string which identifies an address.
  
  @node System Assertions s-assert ads,System Atomic_Counters s-atocou ads,System Address_Image s-addima ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-assertions-s-assert-ads}@anchor{3ed}@anchor{gnat_rm/the_gnat_library id143}@anchor{3ee}
  @section @code{System.Assertions} (@code{s-assert.ads})
  
  
*************** by an run-time assertion failure, as wel
*** 25199,25205 ****
  is used internally to raise this assertion.
  
  @node System Atomic_Counters s-atocou ads,System Memory s-memory ads,System Assertions s-assert ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id143}@anchor{3e9}@anchor{gnat_rm/the_gnat_library system-atomic-counters-s-atocou-ads}@anchor{3ea}
  @section @code{System.Atomic_Counters} (@code{s-atocou.ads})
  
  
--- 25348,25354 ----
  is used internally to raise this assertion.
  
  @node System Atomic_Counters s-atocou ads,System Memory s-memory ads,System Assertions s-assert ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id144}@anchor{3ef}@anchor{gnat_rm/the_gnat_library system-atomic-counters-s-atocou-ads}@anchor{3f0}
  @section @code{System.Atomic_Counters} (@code{s-atocou.ads})
  
  
*************** on most targets, including all Alpha, ia
*** 25213,25219 ****
  x86, and x86_64 platforms.
  
  @node System Memory s-memory ads,System Multiprocessors s-multip ads,System Atomic_Counters s-atocou ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-memory-s-memory-ads}@anchor{3eb}@anchor{gnat_rm/the_gnat_library id144}@anchor{3ec}
  @section @code{System.Memory} (@code{s-memory.ads})
  
  
--- 25362,25368 ----
  x86, and x86_64 platforms.
  
  @node System Memory s-memory ads,System Multiprocessors s-multip ads,System Atomic_Counters s-atocou ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-memory-s-memory-ads}@anchor{3f1}@anchor{gnat_rm/the_gnat_library id145}@anchor{3f2}
  @section @code{System.Memory} (@code{s-memory.ads})
  
  
*************** calls to this unit may be made for low l
*** 25231,25237 ****
  example see the body of @code{GNAT.Tables}).
  
  @node System Multiprocessors s-multip ads,System Multiprocessors Dispatching_Domains s-mudido ads,System Memory s-memory ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id145}@anchor{3ed}@anchor{gnat_rm/the_gnat_library system-multiprocessors-s-multip-ads}@anchor{3ee}
  @section @code{System.Multiprocessors} (@code{s-multip.ads})
  
  
--- 25380,25386 ----
  example see the body of @code{GNAT.Tables}).
  
  @node System Multiprocessors s-multip ads,System Multiprocessors Dispatching_Domains s-mudido ads,System Memory s-memory ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id146}@anchor{3f3}@anchor{gnat_rm/the_gnat_library system-multiprocessors-s-multip-ads}@anchor{3f4}
  @section @code{System.Multiprocessors} (@code{s-multip.ads})
  
  
*************** in GNAT we also make it available in Ada
*** 25244,25250 ****
  technically an implementation-defined addition).
  
  @node System Multiprocessors Dispatching_Domains s-mudido ads,System Partition_Interface s-parint ads,System Multiprocessors s-multip ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-multiprocessors-dispatching-domains-s-mudido-ads}@anchor{3ef}@anchor{gnat_rm/the_gnat_library id146}@anchor{3f0}
  @section @code{System.Multiprocessors.Dispatching_Domains} (@code{s-mudido.ads})
  
  
--- 25393,25399 ----
  technically an implementation-defined addition).
  
  @node System Multiprocessors Dispatching_Domains s-mudido ads,System Partition_Interface s-parint ads,System Multiprocessors s-multip ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-multiprocessors-dispatching-domains-s-mudido-ads}@anchor{3f5}@anchor{gnat_rm/the_gnat_library id147}@anchor{3f6}
  @section @code{System.Multiprocessors.Dispatching_Domains} (@code{s-mudido.ads})
  
  
*************** in GNAT we also make it available in Ada
*** 25257,25263 ****
  technically an implementation-defined addition).
  
  @node System Partition_Interface s-parint ads,System Pool_Global s-pooglo ads,System Multiprocessors Dispatching_Domains s-mudido ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id147}@anchor{3f1}@anchor{gnat_rm/the_gnat_library system-partition-interface-s-parint-ads}@anchor{3f2}
  @section @code{System.Partition_Interface} (@code{s-parint.ads})
  
  
--- 25406,25412 ----
  technically an implementation-defined addition).
  
  @node System Partition_Interface s-parint ads,System Pool_Global s-pooglo ads,System Multiprocessors Dispatching_Domains s-mudido ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id148}@anchor{3f7}@anchor{gnat_rm/the_gnat_library system-partition-interface-s-parint-ads}@anchor{3f8}
  @section @code{System.Partition_Interface} (@code{s-parint.ads})
  
  
*************** is used primarily in a distribution cont
*** 25270,25276 ****
  with @code{GLADE}.
  
  @node System Pool_Global s-pooglo ads,System Pool_Local s-pooloc ads,System Partition_Interface s-parint ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id148}@anchor{3f3}@anchor{gnat_rm/the_gnat_library system-pool-global-s-pooglo-ads}@anchor{3f4}
  @section @code{System.Pool_Global} (@code{s-pooglo.ads})
  
  
--- 25419,25425 ----
  with @code{GLADE}.
  
  @node System Pool_Global s-pooglo ads,System Pool_Local s-pooloc ads,System Partition_Interface s-parint ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id149}@anchor{3f9}@anchor{gnat_rm/the_gnat_library system-pool-global-s-pooglo-ads}@anchor{3fa}
  @section @code{System.Pool_Global} (@code{s-pooglo.ads})
  
  
*************** declared. It uses malloc/free to allocat
*** 25287,25293 ****
  do any automatic reclamation.
  
  @node System Pool_Local s-pooloc ads,System Restrictions s-restri ads,System Pool_Global s-pooglo ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-pool-local-s-pooloc-ads}@anchor{3f5}@anchor{gnat_rm/the_gnat_library id149}@anchor{3f6}
  @section @code{System.Pool_Local} (@code{s-pooloc.ads})
  
  
--- 25436,25442 ----
  do any automatic reclamation.
  
  @node System Pool_Local s-pooloc ads,System Restrictions s-restri ads,System Pool_Global s-pooglo ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-pool-local-s-pooloc-ads}@anchor{3fb}@anchor{gnat_rm/the_gnat_library id150}@anchor{3fc}
  @section @code{System.Pool_Local} (@code{s-pooloc.ads})
  
  
*************** a list of allocated blocks, so that all
*** 25304,25310 ****
  be freed automatically when the pool is finalized.
  
  @node System Restrictions s-restri ads,System Rident s-rident ads,System Pool_Local s-pooloc ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id150}@anchor{3f7}@anchor{gnat_rm/the_gnat_library system-restrictions-s-restri-ads}@anchor{3f8}
  @section @code{System.Restrictions} (@code{s-restri.ads})
  
  
--- 25453,25459 ----
  be freed automatically when the pool is finalized.
  
  @node System Restrictions s-restri ads,System Rident s-rident ads,System Pool_Local s-pooloc ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-restrictions-s-restri-ads}@anchor{3fd}@anchor{gnat_rm/the_gnat_library id151}@anchor{3fe}
  @section @code{System.Restrictions} (@code{s-restri.ads})
  
  
*************** compiler determined information on which
*** 25320,25326 ****
  are violated by one or more packages in the partition.
  
  @node System Rident s-rident ads,System Strings Stream_Ops s-ststop ads,System Restrictions s-restri ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-rident-s-rident-ads}@anchor{3f9}@anchor{gnat_rm/the_gnat_library id151}@anchor{3fa}
  @section @code{System.Rident} (@code{s-rident.ads})
  
  
--- 25469,25475 ----
  are violated by one or more packages in the partition.
  
  @node System Rident s-rident ads,System Strings Stream_Ops s-ststop ads,System Restrictions s-restri ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-rident-s-rident-ads}@anchor{3ff}@anchor{gnat_rm/the_gnat_library id152}@anchor{400}
  @section @code{System.Rident} (@code{s-rident.ads})
  
  
*************** since the necessary instantiation is inc
*** 25336,25342 ****
  package System.Restrictions.
  
  @node System Strings Stream_Ops s-ststop ads,System Unsigned_Types s-unstyp ads,System Rident s-rident ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id152}@anchor{3fb}@anchor{gnat_rm/the_gnat_library system-strings-stream-ops-s-ststop-ads}@anchor{3fc}
  @section @code{System.Strings.Stream_Ops} (@code{s-ststop.ads})
  
  
--- 25485,25491 ----
  package System.Restrictions.
  
  @node System Strings Stream_Ops s-ststop ads,System Unsigned_Types s-unstyp ads,System Rident s-rident ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id153}@anchor{401}@anchor{gnat_rm/the_gnat_library system-strings-stream-ops-s-ststop-ads}@anchor{402}
  @section @code{System.Strings.Stream_Ops} (@code{s-ststop.ads})
  
  
*************** stream attributes are applied to string
*** 25352,25358 ****
  package can be used directly by application programs.
  
  @node System Unsigned_Types s-unstyp ads,System Wch_Cnv s-wchcnv ads,System Strings Stream_Ops s-ststop ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-unsigned-types-s-unstyp-ads}@anchor{3fd}@anchor{gnat_rm/the_gnat_library id153}@anchor{3fe}
  @section @code{System.Unsigned_Types} (@code{s-unstyp.ads})
  
  
--- 25501,25507 ----
  package can be used directly by application programs.
  
  @node System Unsigned_Types s-unstyp ads,System Wch_Cnv s-wchcnv ads,System Strings Stream_Ops s-ststop ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-unsigned-types-s-unstyp-ads}@anchor{403}@anchor{gnat_rm/the_gnat_library id154}@anchor{404}
  @section @code{System.Unsigned_Types} (@code{s-unstyp.ads})
  
  
*************** also contains some related definitions f
*** 25365,25371 ****
  used by the compiler in connection with packed array types.
  
  @node System Wch_Cnv s-wchcnv ads,System Wch_Con s-wchcon ads,System Unsigned_Types s-unstyp ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-wch-cnv-s-wchcnv-ads}@anchor{3ff}@anchor{gnat_rm/the_gnat_library id154}@anchor{400}
  @section @code{System.Wch_Cnv} (@code{s-wchcnv.ads})
  
  
--- 25514,25520 ----
  used by the compiler in connection with packed array types.
  
  @node System Wch_Cnv s-wchcnv ads,System Wch_Con s-wchcon ads,System Unsigned_Types s-unstyp ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-wch-cnv-s-wchcnv-ads}@anchor{405}@anchor{gnat_rm/the_gnat_library id155}@anchor{406}
  @section @code{System.Wch_Cnv} (@code{s-wchcnv.ads})
  
  
*************** encoding method.  It uses definitions in
*** 25386,25392 ****
  package @code{System.Wch_Con}.
  
  @node System Wch_Con s-wchcon ads,,System Wch_Cnv s-wchcnv ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library system-wch-con-s-wchcon-ads}@anchor{401}@anchor{gnat_rm/the_gnat_library id155}@anchor{402}
  @section @code{System.Wch_Con} (@code{s-wchcon.ads})
  
  
--- 25535,25541 ----
  package @code{System.Wch_Con}.
  
  @node System Wch_Con s-wchcon ads,,System Wch_Cnv s-wchcnv ads,The GNAT Library
! @anchor{gnat_rm/the_gnat_library id156}@anchor{407}@anchor{gnat_rm/the_gnat_library system-wch-con-s-wchcon-ads}@anchor{408}
  @section @code{System.Wch_Con} (@code{s-wchcon.ads})
  
  
*************** in ordinary strings.  These definitions
*** 25398,25404 ****
  the package @code{System.Wch_Cnv}.
  
  @node Interfacing to Other Languages,Specialized Needs Annexes,The GNAT Library,Top
! @anchor{gnat_rm/interfacing_to_other_languages interfacing-to-other-languages}@anchor{11}@anchor{gnat_rm/interfacing_to_other_languages doc}@anchor{403}@anchor{gnat_rm/interfacing_to_other_languages id1}@anchor{404}
  @chapter Interfacing to Other Languages
  
  
--- 25547,25553 ----
  the package @code{System.Wch_Cnv}.
  
  @node Interfacing to Other Languages,Specialized Needs Annexes,The GNAT Library,Top
! @anchor{gnat_rm/interfacing_to_other_languages interfacing-to-other-languages}@anchor{11}@anchor{gnat_rm/interfacing_to_other_languages doc}@anchor{409}@anchor{gnat_rm/interfacing_to_other_languages id1}@anchor{40a}
  @chapter Interfacing to Other Languages
  
  
*************** provided.
*** 25416,25422 ****
  @end menu
  
  @node Interfacing to C,Interfacing to C++,,Interfacing to Other Languages
! @anchor{gnat_rm/interfacing_to_other_languages interfacing-to-c}@anchor{405}@anchor{gnat_rm/interfacing_to_other_languages id2}@anchor{406}
  @section Interfacing to C
  
  
--- 25565,25571 ----
  @end menu
  
  @node Interfacing to C,Interfacing to C++,,Interfacing to Other Languages
! @anchor{gnat_rm/interfacing_to_other_languages interfacing-to-c}@anchor{40b}@anchor{gnat_rm/interfacing_to_other_languages id2}@anchor{40c}
  @section Interfacing to C
  
  
*************** and C types:
*** 25531,25538 ****
  
  @item 
  Ada enumeration types map to C enumeration types directly if pragma
! @code{Convention C} is specified, which causes them to have int
! length.  Without pragma @code{Convention C}, Ada enumeration types map to
  8, 16, or 32 bits (i.e., C types @code{signed char}, @code{short},
  @code{int}, respectively) depending on the number of values passed.
  This is the only case in which pragma @code{Convention C} affects the
--- 25680,25689 ----
  
  @item 
  Ada enumeration types map to C enumeration types directly if pragma
! @code{Convention C} is specified, which causes them to have a length of
! 32 bits, except for boolean types which map to C99 @code{bool} and for
! which the length is 8 bits.
! Without pragma @code{Convention C}, Ada enumeration types map to
  8, 16, or 32 bits (i.e., C types @code{signed char}, @code{short},
  @code{int}, respectively) depending on the number of values passed.
  This is the only case in which pragma @code{Convention C} affects the
*************** of the length corresponding to the @code
*** 25554,25560 ****
  @end itemize
  
  @node Interfacing to C++,Interfacing to COBOL,Interfacing to C,Interfacing to Other Languages
! @anchor{gnat_rm/interfacing_to_other_languages id4}@anchor{407}@anchor{gnat_rm/interfacing_to_other_languages id3}@anchor{49}
  @section Interfacing to C++
  
  
--- 25705,25711 ----
  @end itemize
  
  @node Interfacing to C++,Interfacing to COBOL,Interfacing to C,Interfacing to Other Languages
! @anchor{gnat_rm/interfacing_to_other_languages id4}@anchor{40d}@anchor{gnat_rm/interfacing_to_other_languages id3}@anchor{4a}
  @section Interfacing to C++
  
  
*************** The @code{External_Name} is the name of
*** 25611,25617 ****
  cover a specific C++ exception in an exception handler.
  
  @node Interfacing to COBOL,Interfacing to Fortran,Interfacing to C++,Interfacing to Other Languages
! @anchor{gnat_rm/interfacing_to_other_languages id5}@anchor{408}@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-cobol}@anchor{409}
  @section Interfacing to COBOL
  
  
--- 25762,25768 ----
  cover a specific C++ exception in an exception handler.
  
  @node Interfacing to COBOL,Interfacing to Fortran,Interfacing to C++,Interfacing to Other Languages
! @anchor{gnat_rm/interfacing_to_other_languages id5}@anchor{40e}@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-cobol}@anchor{40f}
  @section Interfacing to COBOL
  
  
*************** Interfacing to COBOL is achieved as desc
*** 25619,25625 ****
  the Ada Reference Manual.
  
  @node Interfacing to Fortran,Interfacing to non-GNAT Ada code,Interfacing to COBOL,Interfacing to Other Languages
! @anchor{gnat_rm/interfacing_to_other_languages id6}@anchor{40a}@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-fortran}@anchor{40b}
  @section Interfacing to Fortran
  
  
--- 25770,25776 ----
  the Ada Reference Manual.
  
  @node Interfacing to Fortran,Interfacing to non-GNAT Ada code,Interfacing to COBOL,Interfacing to Other Languages
! @anchor{gnat_rm/interfacing_to_other_languages id6}@anchor{410}@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-fortran}@anchor{411}
  @section Interfacing to Fortran
  
  
*************** multi-dimensional array causes the array
*** 25629,25635 ****
  order as required for convenient interface to Fortran.
  
  @node Interfacing to non-GNAT Ada code,,Interfacing to Fortran,Interfacing to Other Languages
! @anchor{gnat_rm/interfacing_to_other_languages interfacing-to-non-gnat-ada-code}@anchor{40c}@anchor{gnat_rm/interfacing_to_other_languages id7}@anchor{40d}
  @section Interfacing to non-GNAT Ada code
  
  
--- 25780,25786 ----
  order as required for convenient interface to Fortran.
  
  @node Interfacing to non-GNAT Ada code,,Interfacing to Fortran,Interfacing to Other Languages
! @anchor{gnat_rm/interfacing_to_other_languages interfacing-to-non-gnat-ada-code}@anchor{412}@anchor{gnat_rm/interfacing_to_other_languages id7}@anchor{413}
  @section Interfacing to non-GNAT Ada code
  
  
*************** values or simple record types without va
*** 25653,25659 ****
  types with fixed bounds.
  
  @node Specialized Needs Annexes,Implementation of Specific Ada Features,Interfacing to Other Languages,Top
! @anchor{gnat_rm/specialized_needs_annexes specialized-needs-annexes}@anchor{12}@anchor{gnat_rm/specialized_needs_annexes doc}@anchor{40e}@anchor{gnat_rm/specialized_needs_annexes id1}@anchor{40f}
  @chapter Specialized Needs Annexes
  
  
--- 25804,25810 ----
  types with fixed bounds.
  
  @node Specialized Needs Annexes,Implementation of Specific Ada Features,Interfacing to Other Languages,Top
! @anchor{gnat_rm/specialized_needs_annexes specialized-needs-annexes}@anchor{12}@anchor{gnat_rm/specialized_needs_annexes doc}@anchor{414}@anchor{gnat_rm/specialized_needs_annexes id1}@anchor{415}
  @chapter Specialized Needs Annexes
  
  
*************** in Ada 2005) is fully implemented.
*** 25694,25700 ****
  @end table
  
  @node Implementation of Specific Ada Features,Implementation of Ada 2012 Features,Specialized Needs Annexes,Top
! @anchor{gnat_rm/implementation_of_specific_ada_features implementation-of-specific-ada-features}@anchor{13}@anchor{gnat_rm/implementation_of_specific_ada_features doc}@anchor{410}@anchor{gnat_rm/implementation_of_specific_ada_features id1}@anchor{411}
  @chapter Implementation of Specific Ada Features
  
  
--- 25845,25851 ----
  @end table
  
  @node Implementation of Specific Ada Features,Implementation of Ada 2012 Features,Specialized Needs Annexes,Top
! @anchor{gnat_rm/implementation_of_specific_ada_features implementation-of-specific-ada-features}@anchor{13}@anchor{gnat_rm/implementation_of_specific_ada_features doc}@anchor{416}@anchor{gnat_rm/implementation_of_specific_ada_features id1}@anchor{417}
  @chapter Implementation of Specific Ada Features
  
  
*************** facilities.
*** 25712,25718 ****
  @end menu
  
  @node Machine Code Insertions,GNAT Implementation of Tasking,,Implementation of Specific Ada Features
! @anchor{gnat_rm/implementation_of_specific_ada_features machine-code-insertions}@anchor{168}@anchor{gnat_rm/implementation_of_specific_ada_features id2}@anchor{412}
  @section Machine Code Insertions
  
  
--- 25863,25869 ----
  @end menu
  
  @node Machine Code Insertions,GNAT Implementation of Tasking,,Implementation of Specific Ada Features
! @anchor{gnat_rm/implementation_of_specific_ada_features machine-code-insertions}@anchor{16c}@anchor{gnat_rm/implementation_of_specific_ada_features id2}@anchor{418}
  @section Machine Code Insertions
  
  
*************** according to normal visibility rules. In
*** 25880,25886 ****
  qualification is required.
  
  @node GNAT Implementation of Tasking,GNAT Implementation of Shared Passive Packages,Machine Code Insertions,Implementation of Specific Ada Features
! @anchor{gnat_rm/implementation_of_specific_ada_features id3}@anchor{413}@anchor{gnat_rm/implementation_of_specific_ada_features gnat-implementation-of-tasking}@anchor{414}
  @section GNAT Implementation of Tasking
  
  
--- 26031,26037 ----
  qualification is required.
  
  @node GNAT Implementation of Tasking,GNAT Implementation of Shared Passive Packages,Machine Code Insertions,Implementation of Specific Ada Features
! @anchor{gnat_rm/implementation_of_specific_ada_features id3}@anchor{419}@anchor{gnat_rm/implementation_of_specific_ada_features gnat-implementation-of-tasking}@anchor{41a}
  @section GNAT Implementation of Tasking
  
  
*************** to compliance with the Real-Time Systems
*** 25896,25902 ****
  @end menu
  
  @node Mapping Ada Tasks onto the Underlying Kernel Threads,Ensuring Compliance with the Real-Time Annex,,GNAT Implementation of Tasking
! @anchor{gnat_rm/implementation_of_specific_ada_features mapping-ada-tasks-onto-the-underlying-kernel-threads}@anchor{415}@anchor{gnat_rm/implementation_of_specific_ada_features id4}@anchor{416}
  @subsection Mapping Ada Tasks onto the Underlying Kernel Threads
  
  
--- 26047,26053 ----
  @end menu
  
  @node Mapping Ada Tasks onto the Underlying Kernel Threads,Ensuring Compliance with the Real-Time Annex,,GNAT Implementation of Tasking
! @anchor{gnat_rm/implementation_of_specific_ada_features mapping-ada-tasks-onto-the-underlying-kernel-threads}@anchor{41b}@anchor{gnat_rm/implementation_of_specific_ada_features id4}@anchor{41c}
  @subsection Mapping Ada Tasks onto the Underlying Kernel Threads
  
  
*************** support this functionality when the pare
*** 25965,25971 ****
  @geindex Forking a new process
  
  @node Ensuring Compliance with the Real-Time Annex,Support for Locking Policies,Mapping Ada Tasks onto the Underlying Kernel Threads,GNAT Implementation of Tasking
! @anchor{gnat_rm/implementation_of_specific_ada_features id5}@anchor{417}@anchor{gnat_rm/implementation_of_specific_ada_features ensuring-compliance-with-the-real-time-annex}@anchor{418}
  @subsection Ensuring Compliance with the Real-Time Annex
  
  
--- 26116,26122 ----
  @geindex Forking a new process
  
  @node Ensuring Compliance with the Real-Time Annex,Support for Locking Policies,Mapping Ada Tasks onto the Underlying Kernel Threads,GNAT Implementation of Tasking
! @anchor{gnat_rm/implementation_of_specific_ada_features id5}@anchor{41d}@anchor{gnat_rm/implementation_of_specific_ada_features ensuring-compliance-with-the-real-time-annex}@anchor{41e}
  @subsection Ensuring Compliance with the Real-Time Annex
  
  
*************** placed at the end.
*** 26016,26022 ****
  @c Support_for_Locking_Policies
  
  @node Support for Locking Policies,,Ensuring Compliance with the Real-Time Annex,GNAT Implementation of Tasking
! @anchor{gnat_rm/implementation_of_specific_ada_features support-for-locking-policies}@anchor{419}
  @subsection Support for Locking Policies
  
  
--- 26167,26173 ----
  @c Support_for_Locking_Policies
  
  @node Support for Locking Policies,,Ensuring Compliance with the Real-Time Annex,GNAT Implementation of Tasking
! @anchor{gnat_rm/implementation_of_specific_ada_features support-for-locking-policies}@anchor{41f}
  @subsection Support for Locking Policies
  
  
*************** then ceiling locking is used.
*** 26050,26056 ****
  Otherwise, the @code{Ceiling_Locking} policy is ignored.
  
  @node GNAT Implementation of Shared Passive Packages,Code Generation for Array Aggregates,GNAT Implementation of Tasking,Implementation of Specific Ada Features
! @anchor{gnat_rm/implementation_of_specific_ada_features id6}@anchor{41a}@anchor{gnat_rm/implementation_of_specific_ada_features gnat-implementation-of-shared-passive-packages}@anchor{41b}
  @section GNAT Implementation of Shared Passive Packages
  
  
--- 26201,26207 ----
  Otherwise, the @code{Ceiling_Locking} policy is ignored.
  
  @node GNAT Implementation of Shared Passive Packages,Code Generation for Array Aggregates,GNAT Implementation of Tasking,Implementation of Specific Ada Features
! @anchor{gnat_rm/implementation_of_specific_ada_features id6}@anchor{420}@anchor{gnat_rm/implementation_of_specific_ada_features gnat-implementation-of-shared-passive-packages}@anchor{421}
  @section GNAT Implementation of Shared Passive Packages
  
  
*************** is created in the shared memory director
*** 26147,26157 ****
  This is used to provide the required locking
  semantics for proper protected object synchronization.
  
- GNAT supports shared passive packages on all platforms
- except for OpenVMS.
- 
  @node Code Generation for Array Aggregates,The Size of Discriminated Records with Default Discriminants,GNAT Implementation of Shared Passive Packages,Implementation of Specific Ada Features
! @anchor{gnat_rm/implementation_of_specific_ada_features code-generation-for-array-aggregates}@anchor{41c}@anchor{gnat_rm/implementation_of_specific_ada_features id7}@anchor{41d}
  @section Code Generation for Array Aggregates
  
  
--- 26298,26305 ----
  This is used to provide the required locking
  semantics for proper protected object synchronization.
  
  @node Code Generation for Array Aggregates,The Size of Discriminated Records with Default Discriminants,GNAT Implementation of Shared Passive Packages,Implementation of Specific Ada Features
! @anchor{gnat_rm/implementation_of_specific_ada_features code-generation-for-array-aggregates}@anchor{422}@anchor{gnat_rm/implementation_of_specific_ada_features id7}@anchor{423}
  @section Code Generation for Array Aggregates
  
  
*************** component values and static subtypes als
*** 26182,26188 ****
  @end menu
  
  @node Static constant aggregates with static bounds,Constant aggregates with unconstrained nominal types,,Code Generation for Array Aggregates
! @anchor{gnat_rm/implementation_of_specific_ada_features static-constant-aggregates-with-static-bounds}@anchor{41e}@anchor{gnat_rm/implementation_of_specific_ada_features id8}@anchor{41f}
  @subsection Static constant aggregates with static bounds
  
  
--- 26330,26336 ----
  @end menu
  
  @node Static constant aggregates with static bounds,Constant aggregates with unconstrained nominal types,,Code Generation for Array Aggregates
! @anchor{gnat_rm/implementation_of_specific_ada_features static-constant-aggregates-with-static-bounds}@anchor{424}@anchor{gnat_rm/implementation_of_specific_ada_features id8}@anchor{425}
  @subsection Static constant aggregates with static bounds
  
  
*************** Zero2: constant two_dim := (others => (o
*** 26229,26235 ****
  @end example
  
  @node Constant aggregates with unconstrained nominal types,Aggregates with static bounds,Static constant aggregates with static bounds,Code Generation for Array Aggregates
! @anchor{gnat_rm/implementation_of_specific_ada_features constant-aggregates-with-unconstrained-nominal-types}@anchor{420}@anchor{gnat_rm/implementation_of_specific_ada_features id9}@anchor{421}
  @subsection Constant aggregates with unconstrained nominal types
  
  
--- 26377,26383 ----
  @end example
  
  @node Constant aggregates with unconstrained nominal types,Aggregates with static bounds,Static constant aggregates with static bounds,Code Generation for Array Aggregates
! @anchor{gnat_rm/implementation_of_specific_ada_features constant-aggregates-with-unconstrained-nominal-types}@anchor{426}@anchor{gnat_rm/implementation_of_specific_ada_features id9}@anchor{427}
  @subsection Constant aggregates with unconstrained nominal types
  
  
*************** Cr_Unc : constant One_Unc := (12,24,36);
*** 26244,26250 ****
  @end example
  
  @node Aggregates with static bounds,Aggregates with nonstatic bounds,Constant aggregates with unconstrained nominal types,Code Generation for Array Aggregates
! @anchor{gnat_rm/implementation_of_specific_ada_features id10}@anchor{422}@anchor{gnat_rm/implementation_of_specific_ada_features aggregates-with-static-bounds}@anchor{423}
  @subsection Aggregates with static bounds
  
  
--- 26392,26398 ----
  @end example
  
  @node Aggregates with static bounds,Aggregates with nonstatic bounds,Constant aggregates with unconstrained nominal types,Code Generation for Array Aggregates
! @anchor{gnat_rm/implementation_of_specific_ada_features id10}@anchor{428}@anchor{gnat_rm/implementation_of_specific_ada_features aggregates-with-static-bounds}@anchor{429}
  @subsection Aggregates with static bounds
  
  
*************** end loop;
*** 26272,26278 ****
  @end example
  
  @node Aggregates with nonstatic bounds,Aggregates in assignment statements,Aggregates with static bounds,Code Generation for Array Aggregates
! @anchor{gnat_rm/implementation_of_specific_ada_features id11}@anchor{424}@anchor{gnat_rm/implementation_of_specific_ada_features aggregates-with-nonstatic-bounds}@anchor{425}
  @subsection Aggregates with nonstatic bounds
  
  
--- 26420,26426 ----
  @end example
  
  @node Aggregates with nonstatic bounds,Aggregates in assignment statements,Aggregates with static bounds,Code Generation for Array Aggregates
! @anchor{gnat_rm/implementation_of_specific_ada_features id11}@anchor{42a}@anchor{gnat_rm/implementation_of_specific_ada_features aggregates-with-nonstatic-bounds}@anchor{42b}
  @subsection Aggregates with nonstatic bounds
  
  
*************** have to be applied to sub-arrays individ
*** 26283,26289 ****
  compatible subtypes.
  
  @node Aggregates in assignment statements,,Aggregates with nonstatic bounds,Code Generation for Array Aggregates
! @anchor{gnat_rm/implementation_of_specific_ada_features id12}@anchor{426}@anchor{gnat_rm/implementation_of_specific_ada_features aggregates-in-assignment-statements}@anchor{427}
  @subsection Aggregates in assignment statements
  
  
--- 26431,26437 ----
  compatible subtypes.
  
  @node Aggregates in assignment statements,,Aggregates with nonstatic bounds,Code Generation for Array Aggregates
! @anchor{gnat_rm/implementation_of_specific_ada_features id12}@anchor{42c}@anchor{gnat_rm/implementation_of_specific_ada_features aggregates-in-assignment-statements}@anchor{42d}
  @subsection Aggregates in assignment statements
  
  
*************** a temporary (created either by the front
*** 26325,26331 ****
  that temporary will be copied onto the target.
  
  @node The Size of Discriminated Records with Default Discriminants,Strict Conformance to the Ada Reference Manual,Code Generation for Array Aggregates,Implementation of Specific Ada Features
! @anchor{gnat_rm/implementation_of_specific_ada_features id13}@anchor{428}@anchor{gnat_rm/implementation_of_specific_ada_features the-size-of-discriminated-records-with-default-discriminants}@anchor{429}
  @section The Size of Discriminated Records with Default Discriminants
  
  
--- 26473,26479 ----
  that temporary will be copied onto the target.
  
  @node The Size of Discriminated Records with Default Discriminants,Strict Conformance to the Ada Reference Manual,Code Generation for Array Aggregates,Implementation of Specific Ada Features
! @anchor{gnat_rm/implementation_of_specific_ada_features id13}@anchor{42e}@anchor{gnat_rm/implementation_of_specific_ada_features the-size-of-discriminated-records-with-default-discriminants}@anchor{42f}
  @section The Size of Discriminated Records with Default Discriminants
  
  
*************** say) must be consistent, so it is impera
*** 26405,26411 ****
  remain invariant.
  
  @node Strict Conformance to the Ada Reference Manual,,The Size of Discriminated Records with Default Discriminants,Implementation of Specific Ada Features
! @anchor{gnat_rm/implementation_of_specific_ada_features strict-conformance-to-the-ada-reference-manual}@anchor{42a}@anchor{gnat_rm/implementation_of_specific_ada_features id14}@anchor{42b}
  @section Strict Conformance to the Ada Reference Manual
  
  
--- 26553,26559 ----
  remain invariant.
  
  @node Strict Conformance to the Ada Reference Manual,,The Size of Discriminated Records with Default Discriminants,Implementation of Specific Ada Features
! @anchor{gnat_rm/implementation_of_specific_ada_features strict-conformance-to-the-ada-reference-manual}@anchor{430}@anchor{gnat_rm/implementation_of_specific_ada_features id14}@anchor{431}
  @section Strict Conformance to the Ada Reference Manual
  
  
*************** behavior (although at the cost of a sign
*** 26432,26438 ****
  infinite and NaN values are properly generated.
  
  @node Implementation of Ada 2012 Features,Obsolescent Features,Implementation of Specific Ada Features,Top
! @anchor{gnat_rm/implementation_of_ada_2012_features doc}@anchor{42c}@anchor{gnat_rm/implementation_of_ada_2012_features implementation-of-ada-2012-features}@anchor{14}@anchor{gnat_rm/implementation_of_ada_2012_features id1}@anchor{42d}
  @chapter Implementation of Ada 2012 Features
  
  
--- 26580,26586 ----
  infinite and NaN values are properly generated.
  
  @node Implementation of Ada 2012 Features,Obsolescent Features,Implementation of Specific Ada Features,Top
! @anchor{gnat_rm/implementation_of_ada_2012_features doc}@anchor{432}@anchor{gnat_rm/implementation_of_ada_2012_features implementation-of-ada-2012-features}@anchor{14}@anchor{gnat_rm/implementation_of_ada_2012_features id1}@anchor{433}
  @chapter Implementation of Ada 2012 Features
  
  
*************** RM References:  H.04 (8/1)
*** 28598,28604 ****
  @end itemize
  
  @node Obsolescent Features,Compatibility and Porting Guide,Implementation of Ada 2012 Features,Top
! @anchor{gnat_rm/obsolescent_features id1}@anchor{42e}@anchor{gnat_rm/obsolescent_features doc}@anchor{42f}@anchor{gnat_rm/obsolescent_features obsolescent-features}@anchor{15}
  @chapter Obsolescent Features
  
  
--- 28746,28752 ----
  @end itemize
  
  @node Obsolescent Features,Compatibility and Porting Guide,Implementation of Ada 2012 Features,Top
! @anchor{gnat_rm/obsolescent_features id1}@anchor{434}@anchor{gnat_rm/obsolescent_features doc}@anchor{435}@anchor{gnat_rm/obsolescent_features obsolescent-features}@anchor{15}
  @chapter Obsolescent Features
  
  
*************** compatibility purposes.
*** 28617,28623 ****
  @end menu
  
  @node pragma No_Run_Time,pragma Ravenscar,,Obsolescent Features
! @anchor{gnat_rm/obsolescent_features id2}@anchor{430}@anchor{gnat_rm/obsolescent_features pragma-no-run-time}@anchor{431}
  @section pragma No_Run_Time
  
  
--- 28765,28771 ----
  @end menu
  
  @node pragma No_Run_Time,pragma Ravenscar,,Obsolescent Features
! @anchor{gnat_rm/obsolescent_features id2}@anchor{436}@anchor{gnat_rm/obsolescent_features pragma-no-run-time}@anchor{437}
  @section pragma No_Run_Time
  
  
*************** preferred usage is to use an appropriate
*** 28630,28636 ****
  includes just those features that are to be made accessible.
  
  @node pragma Ravenscar,pragma Restricted_Run_Time,pragma No_Run_Time,Obsolescent Features
! @anchor{gnat_rm/obsolescent_features id3}@anchor{432}@anchor{gnat_rm/obsolescent_features pragma-ravenscar}@anchor{433}
  @section pragma Ravenscar
  
  
--- 28778,28784 ----
  includes just those features that are to be made accessible.
  
  @node pragma Ravenscar,pragma Restricted_Run_Time,pragma No_Run_Time,Obsolescent Features
! @anchor{gnat_rm/obsolescent_features id3}@anchor{438}@anchor{gnat_rm/obsolescent_features pragma-ravenscar}@anchor{439}
  @section pragma Ravenscar
  
  
*************** The pragma @code{Ravenscar} has exactly
*** 28639,28645 ****
  is part of the new Ada 2005 standard.
  
  @node pragma Restricted_Run_Time,pragma Task_Info,pragma Ravenscar,Obsolescent Features
! @anchor{gnat_rm/obsolescent_features pragma-restricted-run-time}@anchor{434}@anchor{gnat_rm/obsolescent_features id4}@anchor{435}
  @section pragma Restricted_Run_Time
  
  
--- 28787,28793 ----
  is part of the new Ada 2005 standard.
  
  @node pragma Restricted_Run_Time,pragma Task_Info,pragma Ravenscar,Obsolescent Features
! @anchor{gnat_rm/obsolescent_features pragma-restricted-run-time}@anchor{43a}@anchor{gnat_rm/obsolescent_features id4}@anchor{43b}
  @section pragma Restricted_Run_Time
  
  
*************** preferred since the Ada 2005 pragma @cod
*** 28649,28662 ****
  this kind of implementation dependent addition.
  
  @node pragma Task_Info,package System Task_Info s-tasinf ads,pragma Restricted_Run_Time,Obsolescent Features
! @anchor{gnat_rm/obsolescent_features pragma-task-info}@anchor{436}@anchor{gnat_rm/obsolescent_features id5}@anchor{437}
  @section pragma Task_Info
  
  
  The functionality provided by pragma @code{Task_Info} is now part of the
  Ada language. The @code{CPU} aspect and the package
  @code{System.Multiprocessors} offer a less system-dependent way to specify
! task affinity or to query the number of processsors.
  
  Syntax
  
--- 28797,28810 ----
  this kind of implementation dependent addition.
  
  @node pragma Task_Info,package System Task_Info s-tasinf ads,pragma Restricted_Run_Time,Obsolescent Features
! @anchor{gnat_rm/obsolescent_features pragma-task-info}@anchor{43c}@anchor{gnat_rm/obsolescent_features id5}@anchor{43d}
  @section pragma Task_Info
  
  
  The functionality provided by pragma @code{Task_Info} is now part of the
  Ada language. The @code{CPU} aspect and the package
  @code{System.Multiprocessors} offer a less system-dependent way to specify
! task affinity or to query the number of processors.
  
  Syntax
  
*************** in the spec of package System.Task_Info
*** 28675,28681 ****
  library.
  
  @node package System Task_Info s-tasinf ads,,pragma Task_Info,Obsolescent Features
! @anchor{gnat_rm/obsolescent_features package-system-task-info}@anchor{438}@anchor{gnat_rm/obsolescent_features package-system-task-info-s-tasinf-ads}@anchor{439}
  @section package System.Task_Info (@code{s-tasinf.ads})
  
  
--- 28823,28829 ----
  library.
  
  @node package System Task_Info s-tasinf ads,,pragma Task_Info,Obsolescent Features
! @anchor{gnat_rm/obsolescent_features package-system-task-info}@anchor{43e}@anchor{gnat_rm/obsolescent_features package-system-task-info-s-tasinf-ads}@anchor{43f}
  @section package System.Task_Info (@code{s-tasinf.ads})
  
  
*************** to support the @code{Task_Info} pragma.
*** 28685,28691 ****
  standard replacement for GNAT's @code{Task_Info} functionality.
  
  @node Compatibility and Porting Guide,GNU Free Documentation License,Obsolescent Features,Top
! @anchor{gnat_rm/compatibility_and_porting_guide compatibility-and-porting-guide}@anchor{16}@anchor{gnat_rm/compatibility_and_porting_guide doc}@anchor{43a}@anchor{gnat_rm/compatibility_and_porting_guide id1}@anchor{43b}
  @chapter Compatibility and Porting Guide
  
  
--- 28833,28839 ----
  standard replacement for GNAT's @code{Task_Info} functionality.
  
  @node Compatibility and Porting Guide,GNU Free Documentation License,Obsolescent Features,Top
! @anchor{gnat_rm/compatibility_and_porting_guide compatibility-and-porting-guide}@anchor{16}@anchor{gnat_rm/compatibility_and_porting_guide doc}@anchor{440}@anchor{gnat_rm/compatibility_and_porting_guide id1}@anchor{441}
  @chapter Compatibility and Porting Guide
  
  
*************** applications developed in other Ada envi
*** 28707,28713 ****
  @end menu
  
  @node Writing Portable Fixed-Point Declarations,Compatibility with Ada 83,,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide id2}@anchor{43c}@anchor{gnat_rm/compatibility_and_porting_guide writing-portable-fixed-point-declarations}@anchor{43d}
  @section Writing Portable Fixed-Point Declarations
  
  
--- 28855,28861 ----
  @end menu
  
  @node Writing Portable Fixed-Point Declarations,Compatibility with Ada 83,,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide id2}@anchor{442}@anchor{gnat_rm/compatibility_and_porting_guide writing-portable-fixed-point-declarations}@anchor{443}
  @section Writing Portable Fixed-Point Declarations
  
  
*************** If you follow this scheme you will be gu
*** 28829,28835 ****
  types will be portable.
  
  @node Compatibility with Ada 83,Compatibility between Ada 95 and Ada 2005,Writing Portable Fixed-Point Declarations,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide compatibility-with-ada-83}@anchor{43e}@anchor{gnat_rm/compatibility_and_porting_guide id3}@anchor{43f}
  @section Compatibility with Ada 83
  
  
--- 28977,28983 ----
  types will be portable.
  
  @node Compatibility with Ada 83,Compatibility between Ada 95 and Ada 2005,Writing Portable Fixed-Point Declarations,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide compatibility-with-ada-83}@anchor{444}@anchor{gnat_rm/compatibility_and_porting_guide id3}@anchor{445}
  @section Compatibility with Ada 83
  
  
*************** following subsections treat the most lik
*** 28857,28863 ****
  @end menu
  
  @node Legal Ada 83 programs that are illegal in Ada 95,More deterministic semantics,,Compatibility with Ada 83
! @anchor{gnat_rm/compatibility_and_porting_guide id4}@anchor{440}@anchor{gnat_rm/compatibility_and_porting_guide legal-ada-83-programs-that-are-illegal-in-ada-95}@anchor{441}
  @subsection Legal Ada 83 programs that are illegal in Ada 95
  
  
--- 29005,29011 ----
  @end menu
  
  @node Legal Ada 83 programs that are illegal in Ada 95,More deterministic semantics,,Compatibility with Ada 83
! @anchor{gnat_rm/compatibility_and_porting_guide id4}@anchor{446}@anchor{gnat_rm/compatibility_and_porting_guide legal-ada-83-programs-that-are-illegal-in-ada-95}@anchor{447}
  @subsection Legal Ada 83 programs that are illegal in Ada 95
  
  
*************** the fix is usually simply to add the @co
*** 28957,28963 ****
  @end itemize
  
  @node More deterministic semantics,Changed semantics,Legal Ada 83 programs that are illegal in Ada 95,Compatibility with Ada 83
! @anchor{gnat_rm/compatibility_and_porting_guide more-deterministic-semantics}@anchor{442}@anchor{gnat_rm/compatibility_and_porting_guide id5}@anchor{443}
  @subsection More deterministic semantics
  
  
--- 29105,29111 ----
  @end itemize
  
  @node More deterministic semantics,Changed semantics,Legal Ada 83 programs that are illegal in Ada 95,Compatibility with Ada 83
! @anchor{gnat_rm/compatibility_and_porting_guide more-deterministic-semantics}@anchor{448}@anchor{gnat_rm/compatibility_and_porting_guide id5}@anchor{449}
  @subsection More deterministic semantics
  
  
*************** which open select branches are executed.
*** 28985,28991 ****
  @end itemize
  
  @node Changed semantics,Other language compatibility issues,More deterministic semantics,Compatibility with Ada 83
! @anchor{gnat_rm/compatibility_and_porting_guide id6}@anchor{444}@anchor{gnat_rm/compatibility_and_porting_guide changed-semantics}@anchor{445}
  @subsection Changed semantics
  
  
--- 29133,29139 ----
  @end itemize
  
  @node Changed semantics,Other language compatibility issues,More deterministic semantics,Compatibility with Ada 83
! @anchor{gnat_rm/compatibility_and_porting_guide id6}@anchor{44a}@anchor{gnat_rm/compatibility_and_porting_guide changed-semantics}@anchor{44b}
  @subsection Changed semantics
  
  
*************** covers only the restricted range.
*** 29027,29033 ****
  @end itemize
  
  @node Other language compatibility issues,,Changed semantics,Compatibility with Ada 83
! @anchor{gnat_rm/compatibility_and_porting_guide other-language-compatibility-issues}@anchor{446}@anchor{gnat_rm/compatibility_and_porting_guide id7}@anchor{447}
  @subsection Other language compatibility issues
  
  
--- 29175,29181 ----
  @end itemize
  
  @node Other language compatibility issues,,Changed semantics,Compatibility with Ada 83
! @anchor{gnat_rm/compatibility_and_porting_guide other-language-compatibility-issues}@anchor{44c}@anchor{gnat_rm/compatibility_and_porting_guide id7}@anchor{44d}
  @subsection Other language compatibility issues
  
  
*************** include @code{pragma Interface} and the
*** 29060,29066 ****
  @end itemize
  
  @node Compatibility between Ada 95 and Ada 2005,Implementation-dependent characteristics,Compatibility with Ada 83,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide compatibility-between-ada-95-and-ada-2005}@anchor{448}@anchor{gnat_rm/compatibility_and_porting_guide id8}@anchor{449}
  @section Compatibility between Ada 95 and Ada 2005
  
  
--- 29208,29214 ----
  @end itemize
  
  @node Compatibility between Ada 95 and Ada 2005,Implementation-dependent characteristics,Compatibility with Ada 83,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide compatibility-between-ada-95-and-ada-2005}@anchor{44e}@anchor{gnat_rm/compatibility_and_porting_guide id8}@anchor{44f}
  @section Compatibility between Ada 95 and Ada 2005
  
  
*************** can declare a function returning a value
*** 29132,29138 ****
  @end itemize
  
  @node Implementation-dependent characteristics,Compatibility with Other Ada Systems,Compatibility between Ada 95 and Ada 2005,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide implementation-dependent-characteristics}@anchor{44a}@anchor{gnat_rm/compatibility_and_porting_guide id9}@anchor{44b}
  @section Implementation-dependent characteristics
  
  
--- 29280,29286 ----
  @end itemize
  
  @node Implementation-dependent characteristics,Compatibility with Other Ada Systems,Compatibility between Ada 95 and Ada 2005,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide implementation-dependent-characteristics}@anchor{450}@anchor{gnat_rm/compatibility_and_porting_guide id9}@anchor{451}
  @section Implementation-dependent characteristics
  
  
*************** transition from certain Ada 83 compilers
*** 29155,29161 ****
  @end menu
  
  @node Implementation-defined pragmas,Implementation-defined attributes,,Implementation-dependent characteristics
! @anchor{gnat_rm/compatibility_and_porting_guide implementation-defined-pragmas}@anchor{44c}@anchor{gnat_rm/compatibility_and_porting_guide id10}@anchor{44d}
  @subsection Implementation-defined pragmas
  
  
--- 29303,29309 ----
  @end menu
  
  @node Implementation-defined pragmas,Implementation-defined attributes,,Implementation-dependent characteristics
! @anchor{gnat_rm/compatibility_and_porting_guide implementation-defined-pragmas}@anchor{452}@anchor{gnat_rm/compatibility_and_porting_guide id10}@anchor{453}
  @subsection Implementation-defined pragmas
  
  
*************** avoiding compiler rejection of units tha
*** 29177,29183 ****
  relevant in a GNAT context and hence are not otherwise implemented.
  
  @node Implementation-defined attributes,Libraries,Implementation-defined pragmas,Implementation-dependent characteristics
! @anchor{gnat_rm/compatibility_and_porting_guide id11}@anchor{44e}@anchor{gnat_rm/compatibility_and_porting_guide implementation-defined-attributes}@anchor{44f}
  @subsection Implementation-defined attributes
  
  
--- 29325,29331 ----
  relevant in a GNAT context and hence are not otherwise implemented.
  
  @node Implementation-defined attributes,Libraries,Implementation-defined pragmas,Implementation-dependent characteristics
! @anchor{gnat_rm/compatibility_and_porting_guide id11}@anchor{454}@anchor{gnat_rm/compatibility_and_porting_guide implementation-defined-attributes}@anchor{455}
  @subsection Implementation-defined attributes
  
  
*************** Ada 83, GNAT supplies the attributes @co
*** 29191,29197 ****
  @code{Type_Class}.
  
  @node Libraries,Elaboration order,Implementation-defined attributes,Implementation-dependent characteristics
! @anchor{gnat_rm/compatibility_and_porting_guide libraries}@anchor{450}@anchor{gnat_rm/compatibility_and_porting_guide id12}@anchor{451}
  @subsection Libraries
  
  
--- 29339,29345 ----
  @code{Type_Class}.
  
  @node Libraries,Elaboration order,Implementation-defined attributes,Implementation-dependent characteristics
! @anchor{gnat_rm/compatibility_and_porting_guide libraries}@anchor{456}@anchor{gnat_rm/compatibility_and_porting_guide id12}@anchor{457}
  @subsection Libraries
  
  
*************** be preferable to retrofit the applicatio
*** 29220,29226 ****
  @end itemize
  
  @node Elaboration order,Target-specific aspects,Libraries,Implementation-dependent characteristics
! @anchor{gnat_rm/compatibility_and_porting_guide elaboration-order}@anchor{452}@anchor{gnat_rm/compatibility_and_porting_guide id13}@anchor{453}
  @subsection Elaboration order
  
  
--- 29368,29374 ----
  @end itemize
  
  @node Elaboration order,Target-specific aspects,Libraries,Implementation-dependent characteristics
! @anchor{gnat_rm/compatibility_and_porting_guide elaboration-order}@anchor{458}@anchor{gnat_rm/compatibility_and_porting_guide id13}@anchor{459}
  @subsection Elaboration order
  
  
*************** pragmas either globally (as an effect of
*** 29256,29262 ****
  @end itemize
  
  @node Target-specific aspects,,Elaboration order,Implementation-dependent characteristics
! @anchor{gnat_rm/compatibility_and_porting_guide target-specific-aspects}@anchor{454}@anchor{gnat_rm/compatibility_and_porting_guide id14}@anchor{455}
  @subsection Target-specific aspects
  
  
--- 29404,29410 ----
  @end itemize
  
  @node Target-specific aspects,,Elaboration order,Implementation-dependent characteristics
! @anchor{gnat_rm/compatibility_and_porting_guide target-specific-aspects}@anchor{45a}@anchor{gnat_rm/compatibility_and_porting_guide id14}@anchor{45b}
  @subsection Target-specific aspects
  
  
*************** on the robustness of the original design
*** 29269,29278 ****
  Ada 2005 and Ada 2012) are sometimes
  incompatible with typical Ada 83 compiler practices regarding implicit
  packing, the meaning of the Size attribute, and the size of access values.
! GNAT's approach to these issues is described in @ref{456,,Representation Clauses}.
  
  @node Compatibility with Other Ada Systems,Representation Clauses,Implementation-dependent characteristics,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide id15}@anchor{457}@anchor{gnat_rm/compatibility_and_porting_guide compatibility-with-other-ada-systems}@anchor{458}
  @section Compatibility with Other Ada Systems
  
  
--- 29417,29426 ----
  Ada 2005 and Ada 2012) are sometimes
  incompatible with typical Ada 83 compiler practices regarding implicit
  packing, the meaning of the Size attribute, and the size of access values.
! GNAT's approach to these issues is described in @ref{45c,,Representation Clauses}.
  
  @node Compatibility with Other Ada Systems,Representation Clauses,Implementation-dependent characteristics,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide id15}@anchor{45d}@anchor{gnat_rm/compatibility_and_porting_guide compatibility-with-other-ada-systems}@anchor{45e}
  @section Compatibility with Other Ada Systems
  
  
*************** far beyond this minimal set, as describe
*** 29315,29321 ****
  @end itemize
  
  @node Representation Clauses,Compatibility with HP Ada 83,Compatibility with Other Ada Systems,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide representation-clauses}@anchor{456}@anchor{gnat_rm/compatibility_and_porting_guide id16}@anchor{459}
  @section Representation Clauses
  
  
--- 29463,29469 ----
  @end itemize
  
  @node Representation Clauses,Compatibility with HP Ada 83,Compatibility with Other Ada Systems,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide representation-clauses}@anchor{45c}@anchor{gnat_rm/compatibility_and_porting_guide id16}@anchor{45f}
  @section Representation Clauses
  
  
*************** with thin pointers.
*** 29408,29414 ****
  @end itemize
  
  @node Compatibility with HP Ada 83,,Representation Clauses,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide compatibility-with-hp-ada-83}@anchor{45a}@anchor{gnat_rm/compatibility_and_porting_guide id17}@anchor{45b}
  @section Compatibility with HP Ada 83
  
  
--- 29556,29562 ----
  @end itemize
  
  @node Compatibility with HP Ada 83,,Representation Clauses,Compatibility and Porting Guide
! @anchor{gnat_rm/compatibility_and_porting_guide compatibility-with-hp-ada-83}@anchor{460}@anchor{gnat_rm/compatibility_and_porting_guide id17}@anchor{461}
  @section Compatibility with HP Ada 83
  
  
*************** extension of package System.
*** 29438,29444 ****
  @end itemize
  
  @node GNU Free Documentation License,Index,Compatibility and Porting Guide,Top
! @anchor{share/gnu_free_documentation_license gnu-fdl}@anchor{1}@anchor{share/gnu_free_documentation_license doc}@anchor{45c}@anchor{share/gnu_free_documentation_license gnu-free-documentation-license}@anchor{45d}
  @chapter GNU Free Documentation License
  
  
--- 29586,29592 ----
  @end itemize
  
  @node GNU Free Documentation License,Index,Compatibility and Porting Guide,Top
! @anchor{share/gnu_free_documentation_license gnu-fdl}@anchor{1}@anchor{share/gnu_free_documentation_license doc}@anchor{462}@anchor{share/gnu_free_documentation_license gnu-free-documentation-license}@anchor{463}
  @chapter GNU Free Documentation License
  
  
diff -Nrcpad gcc-9.3.0/gcc/ada/gnat_ugn.texi gcc-10.1.0/gcc/ada/gnat_ugn.texi
*** gcc-9.3.0/gcc/ada/gnat_ugn.texi	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/gnat_ugn.texi	Thu May  7 10:49:59 2020
***************
*** 21,31 ****
  
  @copying
  @quotation
! GNAT User's Guide for Native Platforms , Dec 05, 2018
  
  AdaCore
  
! Copyright @copyright{} 2008-2019, Free Software Foundation
  @end quotation
  
  @end copying
--- 21,31 ----
  
  @copying
  @quotation
! GNAT User's Guide for Native Platforms , Dec 10, 2019
  
  AdaCore
  
! Copyright @copyright{} 2008-2020, Free Software Foundation
  @end quotation
  
  @end copying
*************** Microsoft Windows Topics
*** 463,468 ****
--- 463,469 ----
  * CONSOLE and WINDOWS subsystems:: 
  * Temporary Files:: 
  * Disabling Command Line Argument Expansion:: 
+ * Windows Socket Timeouts:: 
  * Mixed-Language Programming on Windows:: 
  * Windows Specific Add-Ons:: 
  
*************** Elaboration Order Handling in GNAT
*** 532,546 ****
  * Checking the Elaboration Order:: 
  * Controlling the Elaboration Order in Ada:: 
  * Controlling the Elaboration Order in GNAT:: 
- * Common Elaboration-model Traits:: 
- * Dynamic Elaboration Model in GNAT:: 
- * Static Elaboration Model in GNAT:: 
- * SPARK Elaboration Model in GNAT:: 
- * Legacy Elaboration Model in GNAT:: 
  * Mixing Elaboration Models:: 
  * Elaboration Circularities:: 
  * Resolving Elaboration Circularities:: 
- * Resolving Task Issues:: 
  * Elaboration-related Compiler Switches:: 
  * Summary of Procedures for Elaboration Control:: 
  * Inspecting the Chosen Elaboration Order:: 
--- 533,543 ----
  * Checking the Elaboration Order:: 
  * Controlling the Elaboration Order in Ada:: 
  * Controlling the Elaboration Order in GNAT:: 
  * Mixing Elaboration Models:: 
+ * ABE Diagnostics:: 
+ * SPARK Diagnostics:: 
  * Elaboration Circularities:: 
  * Resolving Elaboration Circularities:: 
  * Elaboration-related Compiler Switches:: 
  * Summary of Procedures for Elaboration Control:: 
  * Inspecting the Chosen Elaboration Order:: 
*************** material for the several revisions of th
*** 685,696 ****
  implementation of Ada.
  
  @item 
! @cite{Using the GNAT Programming Studio}, which describes the GPS
  Integrated Development Environment.
  
  @item 
! @cite{GNAT Programming Studio Tutorial}, which introduces the
! main GPS features through examples.
  
  @item 
  @cite{Debugging with GDB},
--- 682,693 ----
  implementation of Ada.
  
  @item 
! @cite{Using GNAT Studio}, which describes the GNAT Studio
  Integrated Development Environment.
  
  @item 
! @cite{GNAT Studio Tutorial}, which introduces the
! main GNAT Studio features through examples.
  
  @item 
  @cite{Debugging with GDB},
*************** the '\' character should be used instead
*** 900,910 ****
  This chapter describes how to use GNAT's command line interface to build
  executable Ada programs.
  On most platforms a visually oriented Integrated Development Environment
! is also available, the GNAT Programming Studio (GPS).
! GPS offers a graphical "look and feel", support for development in
  other programming languages, comprehensive browsing features, and
  many other capabilities.
! For information on GPS please refer to
  @cite{Using the GNAT Programming Studio}.
  
  @menu
--- 897,907 ----
  This chapter describes how to use GNAT's command line interface to build
  executable Ada programs.
  On most platforms a visually oriented Integrated Development Environment
! is also available, the GNAT Programming Studio (GNAT Studio).
! GNAT Studio offers a graphical "look and feel", support for development in
  other programming languages, comprehensive browsing features, and
  many other capabilities.
! For information on GNAT Studio please refer to
  @cite{Using the GNAT Programming Studio}.
  
  @menu
*************** identifiers with identical name (except
*** 6645,6652 ****
  errors (e.g. @code{shm_get} vs @code{SHM_GET}).
  @end itemize
  
! The code generated is using the Ada 2005 syntax, which makes it
! easier to interface with other languages than previous versions of Ada.
  
  @menu
  * Running the Binding Generator:: 
--- 6642,6650 ----
  errors (e.g. @code{shm_get} vs @code{SHM_GET}).
  @end itemize
  
! The code is generated using Ada 2012 syntax, which makes it easier to interface
! with other languages. In most cases you can still use the generated binding
! even if your code is compiled using earlier versions of Ada (e.g. @code{-gnat95}).
  
  @menu
  * Running the Binding Generator:: 
*************** header files needed by these files trans
*** 6667,6673 ****
  
  @example
  $ g++ -c -fdump-ada-spec -C /usr/include/time.h
! $ gcc -c -gnat05 *.ads
  @end example
  
  will generate, under GNU/Linux, the following files: @code{time_h.ads},
--- 6665,6671 ----
  
  @example
  $ g++ -c -fdump-ada-spec -C /usr/include/time.h
! $ gcc -c *.ads
  @end example
  
  will generate, under GNU/Linux, the following files: @code{time_h.ads},
*************** GCC macro @code{BITS_PER_UNIT} documente
*** 9454,9464 ****
  @code{Bits_Per_Word} is the number of bits in a machine word, the equivalent of
  GCC macro @code{BITS_PER_WORD} documented as follows: @cite{Number of bits in a word; normally 32.}
  
! @code{Double_Scalar_Alignment} is the alignment for a scalar whose size is two
! machine words. It should be the same as the alignment for C @code{long_long} on
! most targets.
  
! @code{Maximum_Alignment} is the maximum alignment that the compiler might choose
  by default for a type or object, which is also the maximum alignment that can
  be specified in GNAT. It is computed for GCC backends as @code{BIGGEST_ALIGNMENT
  / BITS_PER_UNIT} where GCC macro @code{BIGGEST_ALIGNMENT} is documented as
--- 9452,9464 ----
  @code{Bits_Per_Word} is the number of bits in a machine word, the equivalent of
  GCC macro @code{BITS_PER_WORD} documented as follows: @cite{Number of bits in a word; normally 32.}
  
! @code{Double_Float_Alignment}, if not zero, is the maximum alignment that the
! compiler can choose by default for a 64-bit floating-point type or object.
  
! @code{Double_Scalar_Alignment}, if not zero, is the maximum alignment that the
! compiler can choose by default for a 64-bit or larger scalar type or object.
! 
! @code{Maximum_Alignment} is the maximum alignment that the compiler can choose
  by default for a type or object, which is also the maximum alignment that can
  be specified in GNAT. It is computed for GCC backends as @code{BIGGEST_ALIGNMENT
  / BITS_PER_UNIT} where GCC macro @code{BIGGEST_ALIGNMENT} is documented as
*************** checking options to be controlled from t
*** 9583,9589 ****
  
  @item @code{-gnatE}
  
! Full dynamic elaboration checks.
  @end table
  
  @geindex -gnatf (gcc)
--- 9583,9590 ----
  
  @item @code{-gnatE}
  
! Dynamic elaboration checking mode enabled. For further details see
! @ref{f,,Elaboration Order Handling in GNAT}.
  @end table
  
  @geindex -gnatf (gcc)
*************** Output usage information. The output is
*** 9649,9656 ****
  
  @item @code{-gnatH}
  
! Legacy elaboration-checking mode enabled. When this switch is in effect, the
! pre-18.x access-before-elaboration model becomes the de facto model.
  @end table
  
  @geindex -gnati (gcc)
--- 9650,9658 ----
  
  @item @code{-gnatH}
  
! Legacy elaboration-checking mode enabled. When this switch is in effect,
! the pre-18.x access-before-elaboration model becomes the de facto model.
! For further details see @ref{f,,Elaboration Order Handling in GNAT}.
  @end table
  
  @geindex -gnati (gcc)
*************** Select statements
*** 9747,9753 ****
  Synchronous task suspension
  @end itemize
  
! and does not emit compile-time diagnostics or run-time checks.
  @end table
  
  @geindex -gnatk (gcc)
--- 9749,9756 ----
  Synchronous task suspension
  @end itemize
  
! and does not emit compile-time diagnostics or run-time checks. For further
! details see @ref{f,,Elaboration Order Handling in GNAT}.
  @end table
  
  @geindex -gnatk (gcc)
*************** e.adb:4:20: ";" should be "is"
*** 10443,10449 ****
  
  The first integer after the file name is the line number in the file,
  and the second integer is the column number within the line.
! @code{GPS} can parse the error messages
  and point to the referenced character.
  The following switches provide control over the error message
  format:
--- 10446,10452 ----
  
  The first integer after the file name is the line number in the file,
  and the second integer is the column number within the line.
! @code{GNAT Studio} can parse the error messages
  and point to the referenced character.
  The following switches provide control over the error message
  format:
*************** of the pragma in the @cite{GNAT_Referenc
*** 10922,10928 ****
  
  @emph{Activate most optional warnings.}
  
! This switch activates most optional warning messages.  See the remaining list
  in this section for details on optional warning messages that can be
  individually controlled.  The warnings that are not turned on by this
  switch are:
--- 10925,10931 ----
  
  @emph{Activate most optional warnings.}
  
! This switch activates most optional warning messages. See the remaining list
  in this section for details on optional warning messages that can be
  individually controlled.  The warnings that are not turned on by this
  switch are:
*************** switch are:
*** 10967,10972 ****
--- 10970,10978 ----
  @code{-gnatw.q} (questionable layout of record types)
  
  @item 
+ @code{-gnatw_r} (out-of-order record representation clauses)
+ 
+ @item 
  @code{-gnatw.s} (overridden size clause)
  
  @item 
*************** This switch suppresses warnings for asse
*** 11039,11044 ****
--- 11045,11081 ----
  compile time that the assertion will fail.
  @end table
  
+ @geindex -gnatw_a
+ 
+ 
+ @table @asis
+ 
+ @item @code{-gnatw_a}
+ 
+ @emph{Activate warnings on anonymous allocators.}
+ 
+ @geindex Anonymous allocators
+ 
+ This switch activates warnings for allocators of anonymous access types,
+ which can involve run-time accessibility checks and lead to unexpected
+ accessibility violations. For more details on the rules involved, see
+ RM 3.10.2 (14).
+ @end table
+ 
+ @geindex -gnatw_A
+ 
+ 
+ @table @asis
+ 
+ @item @code{-gnatw_A}
+ 
+ @emph{Supress warnings on anonymous allocators.}
+ 
+ @geindex Anonymous allocators
+ 
+ This switch suppresses warnings for anonymous access type allocators.
+ @end table
+ 
  @geindex -gnatwb (gcc)
  
  
*************** majority, but not all, of the components
*** 11174,11180 ****
  component for which no component clause is present.
  @end table
  
! @geindex -gnatwC (gcc)
  
  
  @table @asis
--- 11211,11217 ----
  component for which no component clause is present.
  @end table
  
! @geindex -gnatw.C (gcc)
  
  
  @table @asis
*************** This switch suppresses warnings for reco
*** 11187,11192 ****
--- 11224,11262 ----
  missing a component clause in the situation described above.
  @end table
  
+ @geindex -gnatw_c (gcc)
+ 
+ 
+ @table @asis
+ 
+ @item @code{-gnatw_c}
+ 
+ @emph{Activate warnings on unknown condition in Compile_Time_Warning.}
+ 
+ @geindex Compile_Time_Warning
+ 
+ @geindex Compile_Time_Error
+ 
+ This switch activates warnings on a pragma Compile_Time_Warning
+ or Compile_Time_Error whose condition has a value that is not
+ known at compile time.
+ The default is that such warnings are generated.
+ @end table
+ 
+ @geindex -gnatw_C (gcc)
+ 
+ 
+ @table @asis
+ 
+ @item @code{-gnatw_C}
+ 
+ @emph{Suppress warnings on unknown condition in Compile_Time_Warning.}
+ 
+ This switch supresses warnings on a pragma Compile_Time_Warning
+ or Compile_Time_Error whose condition has a value that is not
+ known at compile time.
+ @end table
+ 
  @geindex -gnatwd (gcc)
  
  
*************** opposed to renaming the function itself)
*** 12158,12164 ****
  warnings are given.
  @end table
  
! @geindex -gnatwT (gcc)
  
  
  @table @asis
--- 12228,12234 ----
  warnings are given.
  @end table
  
! @geindex -gnatw.R (gcc)
  
  
  @table @asis
*************** warnings are given.
*** 12170,12175 ****
--- 12240,12270 ----
  This switch suppresses warnings for object renaming function.
  @end table
  
+ @geindex -gnatw_r (gcc)
+ 
+ 
+ @table @asis
+ 
+ @item @code{-gnatw_r}
+ 
+ @emph{Activate warnings for out-of-order record representation clauses.}
+ 
+ This switch activates warnings for record representation clauses,
+ if the order of component declarations, component clauses,
+ and bit-level layout do not all agree.
+ The default is that these warnings are not given.
+ @end table
+ 
+ @geindex -gnatw_R (gcc)
+ 
+ 
+ @table @asis
+ 
+ @item @code{-gnatw_R}
+ 
+ @emph{Suppress warnings for out-of-order record representation clauses.}
+ @end table
+ 
  @geindex -gnatws (gcc)
  
  
*************** sizes or conventions.
*** 12683,12690 ****
  
  @emph{Activate warnings for size not a multiple of alignment.}
  
! This switch activates warnings for cases of record types with
! specified @code{Size} and @code{Alignment} attributes where the
  size is not a multiple of the alignment, resulting in an object
  size that is greater than the specified size. The default
  is that such warnings are generated.
--- 12778,12785 ----
  
  @emph{Activate warnings for size not a multiple of alignment.}
  
! This switch activates warnings for cases of array and record types
! with specified @code{Size} and @code{Alignment} attributes where the
  size is not a multiple of the alignment, resulting in an object
  size that is greater than the specified size. The default
  is that such warnings are generated.
*************** is that such warnings are generated.
*** 12701,12712 ****
  
  @emph{Suppress warnings for size not a multiple of alignment.}
  
! This switch suppresses warnings for cases of record types with
! specified @code{Size} and @code{Alignment} attributes where the
  size is not a multiple of the alignment, resulting in an object
! size that is greater than the specified size.
! The warning can also be
! suppressed by giving an explicit @code{Object_Size} value.
  @end table
  
  @geindex -Wunused (gcc)
--- 12796,12806 ----
  
  @emph{Suppress warnings for size not a multiple of alignment.}
  
! This switch suppresses warnings for cases of array and record types
! with specified @code{Size} and @code{Alignment} attributes where the
  size is not a multiple of the alignment, resulting in an object
! size that is greater than the specified size. The warning can also
! be suppressed by giving an explicit @code{Object_Size} value.
  @end table
  
  @geindex -Wunused (gcc)
*************** character (in particular the DOS line te
*** 13516,13521 ****
--- 13610,13629 ----
  allowed).
  @end table
  
+ @geindex -gnatyD (gcc)
+ 
+ 
+ @table @asis
+ 
+ @item @code{-gnatyD}
+ 
+ @emph{Check declared identifiers in mixed case.}
+ 
+ Declared identifiers must be in mixed case, as in
+ This_Is_An_Identifier. Use -gnatyr in addition to ensure
+ that references match declarations.
+ @end table
+ 
  @geindex -gnatye (gcc)
  
  
*************** in the source text.
*** 13553,13559 ****
  
  The set of style check switches is set to match that used by the GNAT sources.
  This may be useful when developing code that is eventually intended to be
! incorporated into GNAT. Currently this is equivalent to @code{-gnatwydISux})
  but additional style switches may be added to this set in the future without
  advance notice.
  @end table
--- 13661,13667 ----
  
  The set of style check switches is set to match that used by the GNAT sources.
  This may be useful when developing code that is eventually intended to be
! incorporated into GNAT. Currently this is equivalent to @code{-gnatyydISux})
  but additional style switches may be added to this set in the future without
  advance notice.
  @end table
*************** if any.
*** 14002,14008 ****
  
  @c end of switch description (leave this comment to ease automatic parsing for
  
! @c GPS
  
  In the above rules, appearing in column one is always permitted, that is,
  counts as meeting either a requirement for a required preceding space,
--- 14110,14116 ----
  
  @c end of switch description (leave this comment to ease automatic parsing for
  
! @c GNAT Studio
  
  In the above rules, appearing in column one is always permitted, that is,
  counts as meeting either a requirement for a required preceding space,
*************** $ gcc -c -gnats x.adb
*** 14270,14276 ****
  
  compiles file @code{x.adb} in syntax-check-only mode. You can check a
  series of files in a single command
! , and can use wild cards to specify such a group of files.
  Note that you must specify the @code{-c} (compile
  only) flag in addition to the @code{-gnats} flag.
  
--- 14378,14384 ----
  
  compiles file @code{x.adb} in syntax-check-only mode. You can check a
  series of files in a single command
! , and can use wildcards to specify such a group of files.
  Note that you must specify the @code{-c} (compile
  only) flag in addition to the @code{-gnats} flag.
  
*************** available in the specification of the Re
*** 15143,15150 ****
  compiler sources.
  
  If the switch is followed by an @code{s} (e.g., @code{-gnatR3s}), then
! the output is to a file with the name @code{file.rep} where file is
! the name of the corresponding source file, except if @cite{j`} is also
  specified, in which case the file name is @code{file.json}.
  
  Note that it is possible for record components to have zero size. In
--- 15251,15258 ----
  compiler sources.
  
  If the switch is followed by an @code{s} (e.g., @code{-gnatR3s}), then
! the output is to a file with the name @code{file.rep} where @code{file} is
! the name of the corresponding source file, except if @code{j} is also
  specified, in which case the file name is @code{file.json}.
  
  Note that it is possible for record components to have zero size. In
*************** Currently the same as @code{-Ea}.
*** 15732,15738 ****
  
  @item @code{-f@emph{elab-order}}
  
! Force elaboration order.
  @end table
  
  @geindex -F (gnatbind)
--- 15840,15847 ----
  
  @item @code{-f@emph{elab-order}}
  
! Force elaboration order. For further details see @ref{120,,Elaboration Control}
! and @ref{f,,Elaboration Order Handling in GNAT}.
  @end table
  
  @geindex -F (gnatbind)
*************** flag checks are generated.
*** 15759,15780 ****
  @item @code{-h}
  
  Output usage (help) information.
  
  @geindex -H32 (gnatbind)
  
  @item @code{-H32}
  
  Use 32-bit allocations for @code{__gnat_malloc} (and thus for access types).
! For further details see @ref{120,,Dynamic Allocation Control}.
  
  @geindex -H64 (gnatbind)
  
  @geindex __gnat_malloc
  
  @item @code{-H64}
  
  Use 64-bit allocations for @code{__gnat_malloc} (and thus for access types).
! For further details see @ref{120,,Dynamic Allocation Control}.
  
  @geindex -I (gnatbind)
  
--- 15868,15908 ----
  @item @code{-h}
  
  Output usage (help) information.
+ @end table
+ 
+ @geindex -H (gnatbind)
+ 
+ 
+ @table @asis
+ 
+ @item @code{-H}
+ 
+ Legacy elaboration order model enabled. For further details see
+ @ref{f,,Elaboration Order Handling in GNAT}.
+ @end table
  
  @geindex -H32 (gnatbind)
  
+ 
+ @table @asis
+ 
  @item @code{-H32}
  
  Use 32-bit allocations for @code{__gnat_malloc} (and thus for access types).
! For further details see @ref{121,,Dynamic Allocation Control}.
! @end table
  
  @geindex -H64 (gnatbind)
  
  @geindex __gnat_malloc
  
+ 
+ @table @asis
+ 
  @item @code{-H64}
  
  Use 64-bit allocations for @code{__gnat_malloc} (and thus for access types).
! For further details see @ref{121,,Dynamic Allocation Control}.
  
  @geindex -I (gnatbind)
  
*************** limit, then a message is output and the
*** 15827,15832 ****
--- 15955,15982 ----
  A value of zero means that no limit is enforced. The equal
  sign is optional.
  
+ @geindex -minimal (gnatbind)
+ 
+ @item @code{-minimal}
+ 
+ Generate a binder file suitable for space-constrained applications. When
+ active, binder-generated objects not required for program operation are no
+ longer generated. @strong{Warning:} this option comes with the following
+ limitations:
+ 
+ 
+ @itemize *
+ 
+ @item 
+ Starting the program's execution in the debugger will cause it to
+ stop at the start of the @code{main} function instead of the main subprogram.
+ This can be worked around by manually inserting a breakpoint on that
+ subprogram and resuming the program's execution until reaching that breakpoint.
+ 
+ @item 
+ Programs using GNAT.Compiler_Version will not link.
+ @end itemize
+ 
  @geindex -n (gnatbind)
  
  @item @code{-n}
*************** Enable dynamic stack usage, with @code{n
*** 16004,16010 ****
  at program termination. A result is generated when a task
  terminates. Results that can't be stored are displayed on the fly, at
  task termination. This option is currently not supported on Itanium
! platforms. (See @ref{121,,Dynamic Stack Usage Analysis} for details.)
  
  @geindex -v (gnatbind)
  
--- 16154,16160 ----
  at program termination. A result is generated when a task
  terminates. Results that can't be stored are displayed on the fly, at
  task termination. This option is currently not supported on Itanium
! platforms. (See @ref{122,,Dynamic Stack Usage Analysis} for details.)
  
  @geindex -v (gnatbind)
  
*************** no arguments.
*** 16073,16079 ****
  @end menu
  
  @node Consistency-Checking Modes,Binder Error Message Control,,Switches for gnatbind
! @anchor{gnat_ugn/building_executable_programs_with_gnat consistency-checking-modes}@anchor{122}@anchor{gnat_ugn/building_executable_programs_with_gnat id35}@anchor{123}
  @subsubsection Consistency-Checking Modes
  
  
--- 16223,16229 ----
  @end menu
  
  @node Consistency-Checking Modes,Binder Error Message Control,,Switches for gnatbind
! @anchor{gnat_ugn/building_executable_programs_with_gnat consistency-checking-modes}@anchor{123}@anchor{gnat_ugn/building_executable_programs_with_gnat id35}@anchor{124}
  @subsubsection Consistency-Checking Modes
  
  
*************** case the checking against sources has al
*** 16127,16133 ****
  @end table
  
  @node Binder Error Message Control,Elaboration Control,Consistency-Checking Modes,Switches for gnatbind
! @anchor{gnat_ugn/building_executable_programs_with_gnat id36}@anchor{124}@anchor{gnat_ugn/building_executable_programs_with_gnat binder-error-message-control}@anchor{125}
  @subsubsection Binder Error Message Control
  
  
--- 16277,16283 ----
  @end table
  
  @node Binder Error Message Control,Elaboration Control,Consistency-Checking Modes,Switches for gnatbind
! @anchor{gnat_ugn/building_executable_programs_with_gnat id36}@anchor{125}@anchor{gnat_ugn/building_executable_programs_with_gnat binder-error-message-control}@anchor{126}
  @subsubsection Binder Error Message Control
  
  
*************** with extreme care.
*** 16237,16248 ****
  @end table
  
  @node Elaboration Control,Output Control,Binder Error Message Control,Switches for gnatbind
! @anchor{gnat_ugn/building_executable_programs_with_gnat id37}@anchor{126}@anchor{gnat_ugn/building_executable_programs_with_gnat elaboration-control}@anchor{127}
  @subsubsection Elaboration Control
  
  
  The following switches provide additional control over the elaboration
! order. For full details see @ref{f,,Elaboration Order Handling in GNAT}.
  
  @geindex -f (gnatbind)
  
--- 16387,16398 ----
  @end table
  
  @node Elaboration Control,Output Control,Binder Error Message Control,Switches for gnatbind
! @anchor{gnat_ugn/building_executable_programs_with_gnat id37}@anchor{127}@anchor{gnat_ugn/building_executable_programs_with_gnat elaboration-control}@anchor{120}
  @subsubsection Elaboration Control
  
  
  The following switches provide additional control over the elaboration
! order. For further details see @ref{f,,Elaboration Order Handling in GNAT}.
  
  @geindex -f (gnatbind)
  
*************** above forced elaboration order file.
*** 16287,16316 ****
  Blank lines and Ada-style comments are ignored. Unit names that do not exist
  in the program are ignored. Units in the GNAT predefined library are also
  ignored.
  
  @geindex -p (gnatbind)
  
  @item @code{-p}
  
! Normally the binder attempts to choose an elaboration order that is
! likely to minimize the likelihood of an elaboration order error resulting
! in raising a @code{Program_Error} exception. This switch reverses the
! action of the binder, and requests that it deliberately choose an order
! that is likely to maximize the likelihood of an elaboration error.
! This is useful in ensuring portability and avoiding dependence on
! accidental fortuitous elaboration ordering.
  
! Normally it only makes sense to use the @code{-p}
! switch if dynamic
  elaboration checking is used (@code{-gnatE} switch used for compilation).
  This is because in the default static elaboration mode, all necessary
  @code{Elaborate} and @code{Elaborate_All} pragmas are implicitly inserted.
! These implicit pragmas are still respected by the binder in
! @code{-p} mode, so a
! safe elaboration order is assured.
  
! Note that @code{-p} is not intended for
! production use; it is more for debugging/experimental use.
  @end table
  
  @node Output Control,Dynamic Allocation Control,Elaboration Control,Switches for gnatbind
--- 16437,16474 ----
  Blank lines and Ada-style comments are ignored. Unit names that do not exist
  in the program are ignored. Units in the GNAT predefined library are also
  ignored.
+ @end table
  
  @geindex -p (gnatbind)
  
+ 
+ @table @asis
+ 
  @item @code{-p}
  
! Pessimistic elaboration order
  
! This switch is only applicable to the pre-20.x legacy elaboration models.
! The post-20.x elaboration model uses a more informed approach of ordering
! the units.
! 
! Normally the binder attempts to choose an elaboration order that is likely to
! minimize the likelihood of an elaboration order error resulting in raising a
! @code{Program_Error} exception. This switch reverses the action of the binder,
! and requests that it deliberately choose an order that is likely to maximize
! the likelihood of an elaboration error. This is useful in ensuring
! portability and avoiding dependence on accidental fortuitous elaboration
! ordering.
! 
! Normally it only makes sense to use the @code{-p} switch if dynamic
  elaboration checking is used (@code{-gnatE} switch used for compilation).
  This is because in the default static elaboration mode, all necessary
  @code{Elaborate} and @code{Elaborate_All} pragmas are implicitly inserted.
! These implicit pragmas are still respected by the binder in @code{-p}
! mode, so a safe elaboration order is assured.
  
! Note that @code{-p} is not intended for production use; it is more for
! debugging/experimental use.
  @end table
  
  @node Output Control,Dynamic Allocation Control,Elaboration Control,Switches for gnatbind
*************** be used to improve code generation in so
*** 16395,16401 ****
  @end table
  
  @node Dynamic Allocation Control,Binding with Non-Ada Main Programs,Output Control,Switches for gnatbind
! @anchor{gnat_ugn/building_executable_programs_with_gnat dynamic-allocation-control}@anchor{120}@anchor{gnat_ugn/building_executable_programs_with_gnat id39}@anchor{12a}
  @subsubsection Dynamic Allocation Control
  
  
--- 16553,16559 ----
  @end table
  
  @node Dynamic Allocation Control,Binding with Non-Ada Main Programs,Output Control,Switches for gnatbind
! @anchor{gnat_ugn/building_executable_programs_with_gnat dynamic-allocation-control}@anchor{121}@anchor{gnat_ugn/building_executable_programs_with_gnat id39}@anchor{12a}
  @subsubsection Dynamic Allocation Control
  
  
*************** If you do not specify an extension, it w
*** 18951,18957 ****
  @item @code{f}
  
  By default, gnathtml will generate html links only for global entities
! ('with'ed units, global variables and types,...).  If you specify
  @code{-f} on the command line, then links will be generated for local
  entities too.
  @end table
--- 19109,19115 ----
  @item @code{f}
  
  By default, gnathtml will generate html links only for global entities
! ('with'ed units, global variables and types,...). If you specify
  @code{-f} on the command line, then links will be generated for local
  entities too.
  @end table
*************** variables, and more generally to report
*** 19239,19247 ****
  
  This section describes how to initiate the debugger.
  
! The debugger can be launched from a @code{GPS} menu or
  directly from the command line. The description below covers the latter use.
! All the commands shown can be used in the @code{GPS} debug console window,
  but there are usually more GUI-based ways to achieve the same effect.
  
  The command to run @code{GDB} is
--- 19397,19405 ----
  
  This section describes how to initiate the debugger.
  
! The debugger can be launched from a @code{GNAT Studio} menu or
  directly from the command line. The description below covers the latter use.
! All the commands shown can be used in the @code{GNAT Studio} debug console window,
  but there are usually more GUI-based ways to achieve the same effect.
  
  The command to run @code{GDB} is
*************** for more information.
*** 20575,20582 ****
  @section Profiling
  
  
! This section describes how to use the the @code{gprof} profiler tool on Ada
! programs.
  
  @geindex gprof
  
--- 20733,20739 ----
  @section Profiling
  
  
! This section describes how to use the @code{gprof} profiler tool on Ada programs.
  
  @geindex gprof
  
*************** This section presents several topics rel
*** 20825,20831 ****
  It first describes some of the tradeoffs that need to be considered
  and some of the techniques for making your program run faster.
  
- 
  It then documents the unused subprogram/data elimination feature,
  which can reduce the size of program executables.
  
--- 20982,20987 ----
*************** appropriate options.
*** 22180,22188 ****
  
  @geindex Checks (overflow)
  
- 
  @node Overflow Check Handling in GNAT,Performing Dimensionality Analysis in GNAT,Improving Performance,GNAT and Program Execution
! @anchor{gnat_ugn/gnat_and_program_execution id50}@anchor{169}@anchor{gnat_ugn/gnat_and_program_execution overflow-check-handling-in-gnat}@anchor{27}
  @section Overflow Check Handling in GNAT
  
  
--- 22336,22343 ----
  
  @geindex Checks (overflow)
  
  @node Overflow Check Handling in GNAT,Performing Dimensionality Analysis in GNAT,Improving Performance,GNAT and Program Execution
! @anchor{gnat_ugn/gnat_and_program_execution id45}@anchor{169}@anchor{gnat_ugn/gnat_and_program_execution overflow-check-handling-in-gnat}@anchor{27}
  @section Overflow Check Handling in GNAT
  
  
*************** This section explains how to control the
*** 22198,22204 ****
  @end menu
  
  @node Background,Management of Overflows in GNAT,,Overflow Check Handling in GNAT
! @anchor{gnat_ugn/gnat_and_program_execution id51}@anchor{1bb}@anchor{gnat_ugn/gnat_and_program_execution background}@anchor{1bc}
  @subsection Background
  
  
--- 22353,22359 ----
  @end menu
  
  @node Background,Management of Overflows in GNAT,,Overflow Check Handling in GNAT
! @anchor{gnat_ugn/gnat_and_program_execution id46}@anchor{1bb}@anchor{gnat_ugn/gnat_and_program_execution background}@anchor{1bc}
  @subsection Background
  
  
*************** exception raised because of the intermed
*** 22324,22330 ****
  would prefer this precondition to be considered True at run time).
  
  @node Management of Overflows in GNAT,Specifying the Desired Mode,Background,Overflow Check Handling in GNAT
! @anchor{gnat_ugn/gnat_and_program_execution management-of-overflows-in-gnat}@anchor{1bd}@anchor{gnat_ugn/gnat_and_program_execution id52}@anchor{1be}
  @subsection Management of Overflows in GNAT
  
  
--- 22479,22485 ----
  would prefer this precondition to be considered True at run time).
  
  @node Management of Overflows in GNAT,Specifying the Desired Mode,Background,Overflow Check Handling in GNAT
! @anchor{gnat_ugn/gnat_and_program_execution id47}@anchor{1bd}@anchor{gnat_ugn/gnat_and_program_execution management-of-overflows-in-gnat}@anchor{1be}
  @subsection Management of Overflows in GNAT
  
  
*************** out in the normal manner (with infinite
*** 22438,22444 ****
  range checks).
  
  @node Specifying the Desired Mode,Default Settings,Management of Overflows in GNAT,Overflow Check Handling in GNAT
! @anchor{gnat_ugn/gnat_and_program_execution specifying-the-desired-mode}@anchor{f8}@anchor{gnat_ugn/gnat_and_program_execution id53}@anchor{1bf}
  @subsection Specifying the Desired Mode
  
  
--- 22593,22599 ----
  range checks).
  
  @node Specifying the Desired Mode,Default Settings,Management of Overflows in GNAT,Overflow Check Handling in GNAT
! @anchor{gnat_ugn/gnat_and_program_execution specifying-the-desired-mode}@anchor{f8}@anchor{gnat_ugn/gnat_and_program_execution id48}@anchor{1bf}
  @subsection Specifying the Desired Mode
  
  
*************** causing all intermediate operations to b
*** 22562,22568 ****
  type (@code{STRICT} mode).
  
  @node Default Settings,Implementation Notes,Specifying the Desired Mode,Overflow Check Handling in GNAT
! @anchor{gnat_ugn/gnat_and_program_execution id54}@anchor{1c0}@anchor{gnat_ugn/gnat_and_program_execution default-settings}@anchor{1c1}
  @subsection Default Settings
  
  
--- 22717,22723 ----
  type (@code{STRICT} mode).
  
  @node Default Settings,Implementation Notes,Specifying the Desired Mode,Overflow Check Handling in GNAT
! @anchor{gnat_ugn/gnat_and_program_execution id49}@anchor{1c0}@anchor{gnat_ugn/gnat_and_program_execution default-settings}@anchor{1c1}
  @subsection Default Settings
  
  
*************** checking, but it has no effect on the me
*** 22609,22615 ****
  intermediate results.
  
  @node Implementation Notes,,Default Settings,Overflow Check Handling in GNAT
! @anchor{gnat_ugn/gnat_and_program_execution id55}@anchor{1c2}@anchor{gnat_ugn/gnat_and_program_execution implementation-notes}@anchor{1c3}
  @subsection Implementation Notes
  
  
--- 22764,22770 ----
  intermediate results.
  
  @node Implementation Notes,,Default Settings,Overflow Check Handling in GNAT
! @anchor{gnat_ugn/gnat_and_program_execution implementation-notes}@anchor{1c2}@anchor{gnat_ugn/gnat_and_program_execution id50}@anchor{1c3}
  @subsection Implementation Notes
  
  
*************** integer arithmetic package. The compiler
*** 22640,22646 ****
  to this package, though only in cases where it cannot be
  sure that @code{Long_Long_Integer} is sufficient to guard against
  intermediate overflows. This package does not use dynamic
! alllocation, but it does use the secondary stack, so an
  appropriate secondary stack package must be present (this
  is always true for standard full Ada, but may require
  specific steps for restricted run times such as ZFP).
--- 22795,22801 ----
  to this package, though only in cases where it cannot be
  sure that @code{Long_Long_Integer} is sufficient to guard against
  intermediate overflows. This package does not use dynamic
! allocation, but it does use the secondary stack, so an
  appropriate secondary stack package must be present (this
  is always true for standard full Ada, but may require
  specific steps for restricted run times such as ZFP).
*************** platforms for which @code{Long_Long_Inte
*** 22657,22663 ****
  platforms).
  
  @node Performing Dimensionality Analysis in GNAT,Stack Related Facilities,Overflow Check Handling in GNAT,GNAT and Program Execution
! @anchor{gnat_ugn/gnat_and_program_execution id56}@anchor{16a}@anchor{gnat_ugn/gnat_and_program_execution performing-dimensionality-analysis-in-gnat}@anchor{28}
  @section Performing Dimensionality Analysis in GNAT
  
  
--- 22812,22818 ----
  platforms).
  
  @node Performing Dimensionality Analysis in GNAT,Stack Related Facilities,Overflow Check Handling in GNAT,GNAT and Program Execution
! @anchor{gnat_ugn/gnat_and_program_execution performing-dimensionality-analysis-in-gnat}@anchor{28}@anchor{gnat_ugn/gnat_and_program_execution id51}@anchor{16a}
  @section Performing Dimensionality Analysis in GNAT
  
  
*************** passing (the dimension vector for the ac
*** 23044,23050 ****
  dimension vector for the formal parameter).
  
  @node Stack Related Facilities,Memory Management Issues,Performing Dimensionality Analysis in GNAT,GNAT and Program Execution
! @anchor{gnat_ugn/gnat_and_program_execution id57}@anchor{16b}@anchor{gnat_ugn/gnat_and_program_execution stack-related-facilities}@anchor{29}
  @section Stack Related Facilities
  
  
--- 23199,23205 ----
  dimension vector for the formal parameter).
  
  @node Stack Related Facilities,Memory Management Issues,Performing Dimensionality Analysis in GNAT,GNAT and Program Execution
! @anchor{gnat_ugn/gnat_and_program_execution stack-related-facilities}@anchor{29}@anchor{gnat_ugn/gnat_and_program_execution id52}@anchor{16b}
  @section Stack Related Facilities
  
  
*************** particular, it deals with dynamic and st
*** 23060,23066 ****
  @end menu
  
  @node Stack Overflow Checking,Static Stack Usage Analysis,,Stack Related Facilities
! @anchor{gnat_ugn/gnat_and_program_execution id58}@anchor{1c4}@anchor{gnat_ugn/gnat_and_program_execution stack-overflow-checking}@anchor{f4}
  @subsection Stack Overflow Checking
  
  
--- 23215,23221 ----
  @end menu
  
  @node Stack Overflow Checking,Static Stack Usage Analysis,,Stack Related Facilities
! @anchor{gnat_ugn/gnat_and_program_execution id53}@anchor{1c4}@anchor{gnat_ugn/gnat_and_program_execution stack-overflow-checking}@anchor{f4}
  @subsection Stack Overflow Checking
  
  
*************** Consequently, to modify the size of the
*** 23105,23111 ****
  operating system documentation.
  
  @node Static Stack Usage Analysis,Dynamic Stack Usage Analysis,Stack Overflow Checking,Stack Related Facilities
! @anchor{gnat_ugn/gnat_and_program_execution static-stack-usage-analysis}@anchor{f5}@anchor{gnat_ugn/gnat_and_program_execution id59}@anchor{1c5}
  @subsection Static Stack Usage Analysis
  
  
--- 23260,23266 ----
  operating system documentation.
  
  @node Static Stack Usage Analysis,Dynamic Stack Usage Analysis,Stack Overflow Checking,Stack Related Facilities
! @anchor{gnat_ugn/gnat_and_program_execution id54}@anchor{1c5}@anchor{gnat_ugn/gnat_and_program_execution static-stack-usage-analysis}@anchor{f5}
  @subsection Static Stack Usage Analysis
  
  
*************** subprogram whose stack usage might be la
*** 23154,23160 ****
  bytes.  The wording is in keeping with the qualifier documented above.
  
  @node Dynamic Stack Usage Analysis,,Static Stack Usage Analysis,Stack Related Facilities
! @anchor{gnat_ugn/gnat_and_program_execution dynamic-stack-usage-analysis}@anchor{121}@anchor{gnat_ugn/gnat_and_program_execution id60}@anchor{1c6}
  @subsection Dynamic Stack Usage Analysis
  
  
--- 23309,23315 ----
  bytes.  The wording is in keeping with the qualifier documented above.
  
  @node Dynamic Stack Usage Analysis,,Static Stack Usage Analysis,Stack Related Facilities
! @anchor{gnat_ugn/gnat_and_program_execution id55}@anchor{1c6}@anchor{gnat_ugn/gnat_and_program_execution dynamic-stack-usage-analysis}@anchor{122}
  @subsection Dynamic Stack Usage Analysis
  
  
*************** $ gnatbind -u0 file
*** 23168,23175 ****
  @end example
  @end quotation
  
! With this option, at each task termination, its stack usage is  output on
  @code{stderr}.
  It is not always convenient to output the stack usage when the program
  is still running. Hence, it is possible to delay this output until program
  termination. for a given number of tasks specified as the argument of the
--- 23323,23333 ----
  @end example
  @end quotation
  
! With this option, at each task termination, its stack usage is output on
  @code{stderr}.
+ Note that this switch is not compatible with tools like
+ Valgrind and DrMemory; they will report errors.
+ 
  It is not always convenient to output the stack usage when the program
  is still running. Hence, it is possible to delay this output until program
  termination. for a given number of tasks specified as the argument of the
*************** The package @code{GNAT.Task_Stack_Usage}
*** 23233,23239 ****
  stack-usage reports at run time. See its body for the details.
  
  @node Memory Management Issues,,Stack Related Facilities,GNAT and Program Execution
! @anchor{gnat_ugn/gnat_and_program_execution id61}@anchor{16c}@anchor{gnat_ugn/gnat_and_program_execution memory-management-issues}@anchor{2a}
  @section Memory Management Issues
  
  
--- 23391,23397 ----
  stack-usage reports at run time. See its body for the details.
  
  @node Memory Management Issues,,Stack Related Facilities,GNAT and Program Execution
! @anchor{gnat_ugn/gnat_and_program_execution id56}@anchor{16c}@anchor{gnat_ugn/gnat_and_program_execution memory-management-issues}@anchor{2a}
  @section Memory Management Issues
  
  
*************** incorrect uses of access values (includi
*** 23249,23255 ****
  @end menu
  
  @node Some Useful Memory Pools,The GNAT Debug Pool Facility,,Memory Management Issues
! @anchor{gnat_ugn/gnat_and_program_execution id62}@anchor{1c7}@anchor{gnat_ugn/gnat_and_program_execution some-useful-memory-pools}@anchor{1c8}
  @subsection Some Useful Memory Pools
  
  
--- 23407,23413 ----
  @end menu
  
  @node Some Useful Memory Pools,The GNAT Debug Pool Facility,,Memory Management Issues
! @anchor{gnat_ugn/gnat_and_program_execution id57}@anchor{1c7}@anchor{gnat_ugn/gnat_and_program_execution some-useful-memory-pools}@anchor{1c8}
  @subsection Some Useful Memory Pools
  
  
*************** for T1'Storage_Size use 10_000;
*** 23330,23336 ****
  @end quotation
  
  @node The GNAT Debug Pool Facility,,Some Useful Memory Pools,Memory Management Issues
! @anchor{gnat_ugn/gnat_and_program_execution id63}@anchor{1c9}@anchor{gnat_ugn/gnat_and_program_execution the-gnat-debug-pool-facility}@anchor{1ca}
  @subsection The GNAT Debug Pool Facility
  
  
--- 23488,23494 ----
  @end quotation
  
  @node The GNAT Debug Pool Facility,,Some Useful Memory Pools,Memory Management Issues
! @anchor{gnat_ugn/gnat_and_program_execution id58}@anchor{1c9}@anchor{gnat_ugn/gnat_and_program_execution the-gnat-debug-pool-facility}@anchor{1ca}
  @subsection The GNAT Debug Pool Facility
  
  
*************** the set of handlers
*** 23556,23570 ****
  Most programs should experience a substantial speed improvement by
  being compiled with a ZCX run-time.
  This is especially true for
! tasking applications or applications with many exception handlers.@}
  
  This section summarizes which combinations of threads and exception support
  are supplied on various GNAT platforms.
- It then shows how to select a particular library either
- permanently or temporarily,
- explains the properties of (and tradeoffs among) the various threads
- libraries, and provides some additional
- information about several specific platforms.
  
  @menu
  * Summary of Run-Time Configurations:: 
--- 23714,23728 ----
  Most programs should experience a substantial speed improvement by
  being compiled with a ZCX run-time.
  This is especially true for
! tasking applications or applications with many exception handlers.
! Note however that the ZCX run-time does not support asynchronous abort
! of tasks (@code{abort} and @code{select-then-abort} constructs) and will instead
! implement abort by polling points in the runtime. You can also add additional
! polling points explicitly if needed in your application via @code{pragma
! Abort_Defer}.
  
  This section summarizes which combinations of threads and exception support
  are supplied on various GNAT platforms.
  
  @menu
  * Summary of Run-Time Configurations:: 
*************** This section describes topics that are s
*** 23887,23901 ****
  platforms.
  
  
- 
- 
- 
  @menu
  * Using GNAT on Windows:: 
  * Using a network installation of GNAT:: 
  * CONSOLE and WINDOWS subsystems:: 
  * Temporary Files:: 
  * Disabling Command Line Argument Expansion:: 
  * Mixed-Language Programming on Windows:: 
  * Windows Specific Add-Ons:: 
  
--- 24045,24057 ----
  platforms.
  
  
  @menu
  * Using GNAT on Windows:: 
  * Using a network installation of GNAT:: 
  * CONSOLE and WINDOWS subsystems:: 
  * Temporary Files:: 
  * Disabling Command Line Argument Expansion:: 
+ * Windows Socket Timeouts:: 
  * Mixed-Language Programming on Windows:: 
  * Windows Specific Add-Ons:: 
  
*************** file will be created. This is particular
*** 24069,24075 ****
  environments where you may not have write access to some
  directories.
  
! @node Disabling Command Line Argument Expansion,Mixed-Language Programming on Windows,Temporary Files,Microsoft Windows Topics
  @anchor{gnat_ugn/platform_specific_information disabling-command-line-argument-expansion}@anchor{1e1}
  @subsection Disabling Command Line Argument Expansion
  
--- 24225,24231 ----
  environments where you may not have write access to some
  directories.
  
! @node Disabling Command Line Argument Expansion,Windows Socket Timeouts,Temporary Files,Microsoft Windows Topics
  @anchor{gnat_ugn/platform_specific_information disabling-command-line-argument-expansion}@anchor{1e1}
  @subsection Disabling Command Line Argument Expansion
  
*************** and:
*** 24140,24147 ****
  Ada.Command_Line.Argument (1) -> "'*.txt'"
  @end example
  
! @node Mixed-Language Programming on Windows,Windows Specific Add-Ons,Disabling Command Line Argument Expansion,Microsoft Windows Topics
! @anchor{gnat_ugn/platform_specific_information id13}@anchor{1e2}@anchor{gnat_ugn/platform_specific_information mixed-language-programming-on-windows}@anchor{1e3}
  @subsection Mixed-Language Programming on Windows
  
  
--- 24296,24349 ----
  Ada.Command_Line.Argument (1) -> "'*.txt'"
  @end example
  
! @node Windows Socket Timeouts,Mixed-Language Programming on Windows,Disabling Command Line Argument Expansion,Microsoft Windows Topics
! @anchor{gnat_ugn/platform_specific_information windows-socket-timeouts}@anchor{1e2}
! @subsection Windows Socket Timeouts
! 
! 
! Microsoft Windows desktops older than @code{8.0} and Microsoft Windows Servers
! older than @code{2019} set a socket timeout 500 milliseconds longer than the value
! set by setsockopt with @code{SO_RCVTIMEO} and @code{SO_SNDTIMEO} options. The GNAT
! runtime makes a correction for the difference in the corresponding Windows
! versions. For Windows Server starting with version @code{2019}, the user must
! provide a manifest file for the GNAT runtime to be able to recognize that
! the Windows version does not need the timeout correction. The manifest file
! should be located in the same directory as the executable file, and its file
! name must match the executable name suffixed by @code{.manifest}. For example,
! if the executable name is @code{sock_wto.exe}, then the manifest file name
! has to be @code{sock_wto.exe.manifest}. The manifest file must contain at
! least the following data:
! 
! @example
! <?xml version="1.0" encoding="UTF-8" standalone="yes"?>
! <assembly xmlns="urn:schemas-microsoft-com:asm.v1" manifestVersion="1.0">
! <compatibility xmlns="urn:schemas-microsoft-com:compatibility.v1">
! <application>
!    <!-- Windows Vista -->
!    <supportedOS Id="@{e2011457-1546-43c5-a5fe-008deee3d3f0@}"/>
!    <!-- Windows 7 -->
!    <supportedOS Id="@{35138b9a-5d96-4fbd-8e2d-a2440225f93a@}"/>
!    <!-- Windows 8 -->
!    <supportedOS Id="@{4a2f28e3-53b9-4441-ba9c-d69d4a4a6e38@}"/>
!    <!-- Windows 8.1 -->
!    <supportedOS Id="@{1f676c76-80e1-4239-95bb-83d0f6d0da78@}"/>
!    <!-- Windows 10 -->
!    <supportedOS Id="@{8e0f7a12-bfb3-4fe8-b9a5-48fd50a15a9a@}"/>
! </application>
! </compatibility>
! </assembly>
! @end example
! 
! Without the manifest file, the socket timeout is going to be overcorrected on
! these Windows Server versions and the actual time is going to be 500
! milliseconds shorter than what was set with GNAT.Sockets.Set_Socket_Option.
! Note that on Microsoft Windows versions where correction is necessary, there
! is no way to set a socket timeout shorter than 500 ms. If a socket timeout
! shorter than 500 ms is needed on these Windows versions, a call to
! Check_Selector should be added before any socket read or write operations.
! 
! @node Mixed-Language Programming on Windows,Windows Specific Add-Ons,Windows Socket Timeouts,Microsoft Windows Topics
! @anchor{gnat_ugn/platform_specific_information id13}@anchor{1e3}@anchor{gnat_ugn/platform_specific_information mixed-language-programming-on-windows}@anchor{1e4}
  @subsection Mixed-Language Programming on Windows
  
  
*************** to use the Microsoft tools for your C++
*** 24163,24174 ****
  Encapsulate your C++ code in a DLL to be linked with your Ada
  application. In this case, use the Microsoft or whatever environment to
  build the DLL and use GNAT to build your executable
! (@ref{1e4,,Using DLLs with GNAT}).
  
  @item 
  Or you can encapsulate your Ada code in a DLL to be linked with the
  other part of your application. In this case, use GNAT to build the DLL
! (@ref{1e5,,Building DLLs with GNAT Project files}) and use the Microsoft
  or whatever environment to build your executable.
  @end itemize
  
--- 24365,24376 ----
  Encapsulate your C++ code in a DLL to be linked with your Ada
  application. In this case, use the Microsoft or whatever environment to
  build the DLL and use GNAT to build your executable
! (@ref{1e5,,Using DLLs with GNAT}).
  
  @item 
  Or you can encapsulate your Ada code in a DLL to be linked with the
  other part of your application. In this case, use GNAT to build the DLL
! (@ref{1e6,,Building DLLs with GNAT Project files}) and use the Microsoft
  or whatever environment to build your executable.
  @end itemize
  
*************** native SEH support is used.
*** 24225,24231 ****
  @end menu
  
  @node Windows Calling Conventions,Introduction to Dynamic Link Libraries DLLs,,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information windows-calling-conventions}@anchor{1e6}@anchor{gnat_ugn/platform_specific_information id14}@anchor{1e7}
  @subsubsection Windows Calling Conventions
  
  
--- 24427,24433 ----
  @end menu
  
  @node Windows Calling Conventions,Introduction to Dynamic Link Libraries DLLs,,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information windows-calling-conventions}@anchor{1e7}@anchor{gnat_ugn/platform_specific_information id14}@anchor{1e8}
  @subsubsection Windows Calling Conventions
  
  
*************** are available for Windows:
*** 24270,24276 ****
  @end menu
  
  @node C Calling Convention,Stdcall Calling Convention,,Windows Calling Conventions
! @anchor{gnat_ugn/platform_specific_information c-calling-convention}@anchor{1e8}@anchor{gnat_ugn/platform_specific_information id15}@anchor{1e9}
  @subsubsection @code{C} Calling Convention
  
  
--- 24472,24478 ----
  @end menu
  
  @node C Calling Convention,Stdcall Calling Convention,,Windows Calling Conventions
! @anchor{gnat_ugn/platform_specific_information c-calling-convention}@anchor{1e9}@anchor{gnat_ugn/platform_specific_information id15}@anchor{1ea}
  @subsubsection @code{C} Calling Convention
  
  
*************** is missing, as in the above example, thi
*** 24312,24321 ****
  When importing a variable defined in C, you should always use the @code{C}
  calling convention unless the object containing the variable is part of a
  DLL (in which case you should use the @code{Stdcall} calling
! convention, @ref{1ea,,Stdcall Calling Convention}).
  
  @node Stdcall Calling Convention,Win32 Calling Convention,C Calling Convention,Windows Calling Conventions
! @anchor{gnat_ugn/platform_specific_information stdcall-calling-convention}@anchor{1ea}@anchor{gnat_ugn/platform_specific_information id16}@anchor{1eb}
  @subsubsection @code{Stdcall} Calling Convention
  
  
--- 24514,24523 ----
  When importing a variable defined in C, you should always use the @code{C}
  calling convention unless the object containing the variable is part of a
  DLL (in which case you should use the @code{Stdcall} calling
! convention, @ref{1eb,,Stdcall Calling Convention}).
  
  @node Stdcall Calling Convention,Win32 Calling Convention,C Calling Convention,Windows Calling Conventions
! @anchor{gnat_ugn/platform_specific_information stdcall-calling-convention}@anchor{1eb}@anchor{gnat_ugn/platform_specific_information id16}@anchor{1ec}
  @subsubsection @code{Stdcall} Calling Convention
  
  
*************** Note that to ease building cross-platfor
*** 24412,24418 ****
  will be handled as a @code{C} calling convention on non-Windows platforms.
  
  @node Win32 Calling Convention,DLL Calling Convention,Stdcall Calling Convention,Windows Calling Conventions
! @anchor{gnat_ugn/platform_specific_information win32-calling-convention}@anchor{1ec}@anchor{gnat_ugn/platform_specific_information id17}@anchor{1ed}
  @subsubsection @code{Win32} Calling Convention
  
  
--- 24614,24620 ----
  will be handled as a @code{C} calling convention on non-Windows platforms.
  
  @node Win32 Calling Convention,DLL Calling Convention,Stdcall Calling Convention,Windows Calling Conventions
! @anchor{gnat_ugn/platform_specific_information win32-calling-convention}@anchor{1ed}@anchor{gnat_ugn/platform_specific_information id17}@anchor{1ee}
  @subsubsection @code{Win32} Calling Convention
  
  
*************** This convention, which is GNAT-specific
*** 24420,24426 ****
  @code{Stdcall} calling convention described above.
  
  @node DLL Calling Convention,,Win32 Calling Convention,Windows Calling Conventions
! @anchor{gnat_ugn/platform_specific_information id18}@anchor{1ee}@anchor{gnat_ugn/platform_specific_information dll-calling-convention}@anchor{1ef}
  @subsubsection @code{DLL} Calling Convention
  
  
--- 24622,24628 ----
  @code{Stdcall} calling convention described above.
  
  @node DLL Calling Convention,,Win32 Calling Convention,Windows Calling Conventions
! @anchor{gnat_ugn/platform_specific_information id18}@anchor{1ef}@anchor{gnat_ugn/platform_specific_information dll-calling-convention}@anchor{1f0}
  @subsubsection @code{DLL} Calling Convention
  
  
*************** This convention, which is GNAT-specific
*** 24428,24434 ****
  @code{Stdcall} calling convention described above.
  
  @node Introduction to Dynamic Link Libraries DLLs,Using DLLs with GNAT,Windows Calling Conventions,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information id19}@anchor{1f0}@anchor{gnat_ugn/platform_specific_information introduction-to-dynamic-link-libraries-dlls}@anchor{1f1}
  @subsubsection Introduction to Dynamic Link Libraries (DLLs)
  
  
--- 24630,24636 ----
  @code{Stdcall} calling convention described above.
  
  @node Introduction to Dynamic Link Libraries DLLs,Using DLLs with GNAT,Windows Calling Conventions,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information id19}@anchor{1f1}@anchor{gnat_ugn/platform_specific_information introduction-to-dynamic-link-libraries-dlls}@anchor{1f2}
  @subsubsection Introduction to Dynamic Link Libraries (DLLs)
  
  
*************** As a side note, an interesting differenc
*** 24512,24521 ****
  Unix shared libraries, is the fact that on most Unix systems all public
  routines are exported by default in a Unix shared library, while under
  Windows it is possible (but not required) to list exported routines in
! a definition file (see @ref{1f2,,The Definition File}).
  
  @node Using DLLs with GNAT,Building DLLs with GNAT Project files,Introduction to Dynamic Link Libraries DLLs,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information id20}@anchor{1f3}@anchor{gnat_ugn/platform_specific_information using-dlls-with-gnat}@anchor{1e4}
  @subsubsection Using DLLs with GNAT
  
  
--- 24714,24723 ----
  Unix shared libraries, is the fact that on most Unix systems all public
  routines are exported by default in a Unix shared library, while under
  Windows it is possible (but not required) to list exported routines in
! a definition file (see @ref{1f3,,The Definition File}).
  
  @node Using DLLs with GNAT,Building DLLs with GNAT Project files,Introduction to Dynamic Link Libraries DLLs,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information id20}@anchor{1f4}@anchor{gnat_ugn/platform_specific_information using-dlls-with-gnat}@anchor{1e5}
  @subsubsection Using DLLs with GNAT
  
  
*************** example a fictitious DLL called @code{AP
*** 24606,24612 ****
  @end menu
  
  @node Creating an Ada Spec for the DLL Services,Creating an Import Library,,Using DLLs with GNAT
! @anchor{gnat_ugn/platform_specific_information id21}@anchor{1f4}@anchor{gnat_ugn/platform_specific_information creating-an-ada-spec-for-the-dll-services}@anchor{1f5}
  @subsubsection Creating an Ada Spec for the DLL Services
  
  
--- 24808,24814 ----
  @end menu
  
  @node Creating an Ada Spec for the DLL Services,Creating an Import Library,,Using DLLs with GNAT
! @anchor{gnat_ugn/platform_specific_information id21}@anchor{1f5}@anchor{gnat_ugn/platform_specific_information creating-an-ada-spec-for-the-dll-services}@anchor{1f6}
  @subsubsection Creating an Ada Spec for the DLL Services
  
  
*************** end API;
*** 24646,24652 ****
  @end quotation
  
  @node Creating an Import Library,,Creating an Ada Spec for the DLL Services,Using DLLs with GNAT
! @anchor{gnat_ugn/platform_specific_information id22}@anchor{1f6}@anchor{gnat_ugn/platform_specific_information creating-an-import-library}@anchor{1f7}
  @subsubsection Creating an Import Library
  
  
--- 24848,24854 ----
  @end quotation
  
  @node Creating an Import Library,,Creating an Ada Spec for the DLL Services,Using DLLs with GNAT
! @anchor{gnat_ugn/platform_specific_information id22}@anchor{1f7}@anchor{gnat_ugn/platform_specific_information creating-an-import-library}@anchor{1f8}
  @subsubsection Creating an Import Library
  
  
*************** as in this case it is possible to link d
*** 24660,24666 ****
  DLL. Otherwise read on.
  
  @geindex Definition file
! @anchor{gnat_ugn/platform_specific_information the-definition-file}@anchor{1f2}
  @subsubheading The Definition File
  
  
--- 24862,24868 ----
  DLL. Otherwise read on.
  
  @geindex Definition file
! @anchor{gnat_ugn/platform_specific_information the-definition-file}@anchor{1f3}
  @subsubheading The Definition File
  
  
*************** EXPORTS
*** 24708,24724 ****
  @end table
  
  Note that you must specify the correct suffix (@code{@@@emph{nn}})
! (see @ref{1e6,,Windows Calling Conventions}) for a Stdcall
  calling convention function in the exported symbols list.
  
  There can actually be other sections in a definition file, but these
  sections are not relevant to the discussion at hand.
! @anchor{gnat_ugn/platform_specific_information create-def-file-automatically}@anchor{1f8}
  @subsubheading Creating a Definition File Automatically
  
  
  You can automatically create the definition file @code{API.def}
! (see @ref{1f2,,The Definition File}) from a DLL.
  For that use the @code{dlltool} program as follows:
  
  @quotation
--- 24910,24926 ----
  @end table
  
  Note that you must specify the correct suffix (@code{@@@emph{nn}})
! (see @ref{1e7,,Windows Calling Conventions}) for a Stdcall
  calling convention function in the exported symbols list.
  
  There can actually be other sections in a definition file, but these
  sections are not relevant to the discussion at hand.
! @anchor{gnat_ugn/platform_specific_information create-def-file-automatically}@anchor{1f9}
  @subsubheading Creating a Definition File Automatically
  
  
  You can automatically create the definition file @code{API.def}
! (see @ref{1f3,,The Definition File}) from a DLL.
  For that use the @code{dlltool} program as follows:
  
  @quotation
*************** $ dlltool API.dll -z API.def --export-al
*** 24728,24734 ****
  @end example
  
  Note that if some routines in the DLL have the @code{Stdcall} convention
! (@ref{1e6,,Windows Calling Conventions}) with stripped @code{@@@emph{nn}}
  suffix then you'll have to edit @code{api.def} to add it, and specify
  @code{-k} to @code{gnatdll} when creating the import library.
  
--- 24930,24936 ----
  @end example
  
  Note that if some routines in the DLL have the @code{Stdcall} convention
! (@ref{1e7,,Windows Calling Conventions}) with stripped @code{@@@emph{nn}}
  suffix then you'll have to edit @code{api.def} to add it, and specify
  @code{-k} to @code{gnatdll} when creating the import library.
  
*************** tells you what symbol is expected. You j
*** 24752,24764 ****
  definition file and add the right suffix.
  @end itemize
  @end quotation
! @anchor{gnat_ugn/platform_specific_information gnat-style-import-library}@anchor{1f9}
  @subsubheading GNAT-Style Import Library
  
  
  To create a static import library from @code{API.dll} with the GNAT tools
  you should create the .def file, then use @code{gnatdll} tool
! (see @ref{1fa,,Using gnatdll}) as follows:
  
  @quotation
  
--- 24954,24966 ----
  definition file and add the right suffix.
  @end itemize
  @end quotation
! @anchor{gnat_ugn/platform_specific_information gnat-style-import-library}@anchor{1fa}
  @subsubheading GNAT-Style Import Library
  
  
  To create a static import library from @code{API.dll} with the GNAT tools
  you should create the .def file, then use @code{gnatdll} tool
! (see @ref{1fb,,Using gnatdll}) as follows:
  
  @quotation
  
*************** definition file name is @code{xyz.def},
*** 24774,24788 ****
  be @code{libxyz.a}. Note that in the previous example option
  @code{-e} could have been removed because the name of the definition
  file (before the @code{.def} suffix) is the same as the name of the
! DLL (@ref{1fa,,Using gnatdll} for more information about @code{gnatdll}).
  @end quotation
! @anchor{gnat_ugn/platform_specific_information msvs-style-import-library}@anchor{1fb}
  @subsubheading Microsoft-Style Import Library
  
  
  A Microsoft import library is needed only if you plan to make an
  Ada DLL available to applications developed with Microsoft
! tools (@ref{1e3,,Mixed-Language Programming on Windows}).
  
  To create a Microsoft-style import library for @code{API.dll} you
  should create the .def file, then build the actual import library using
--- 24976,24990 ----
  be @code{libxyz.a}. Note that in the previous example option
  @code{-e} could have been removed because the name of the definition
  file (before the @code{.def} suffix) is the same as the name of the
! DLL (@ref{1fb,,Using gnatdll} for more information about @code{gnatdll}).
  @end quotation
! @anchor{gnat_ugn/platform_specific_information msvs-style-import-library}@anchor{1fc}
  @subsubheading Microsoft-Style Import Library
  
  
  A Microsoft import library is needed only if you plan to make an
  Ada DLL available to applications developed with Microsoft
! tools (@ref{1e4,,Mixed-Language Programming on Windows}).
  
  To create a Microsoft-style import library for @code{API.dll} you
  should create the .def file, then build the actual import library using
*************** See the Microsoft documentation for furt
*** 24806,24812 ****
  @end quotation
  
  @node Building DLLs with GNAT Project files,Building DLLs with GNAT,Using DLLs with GNAT,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information id23}@anchor{1fc}@anchor{gnat_ugn/platform_specific_information building-dlls-with-gnat-project-files}@anchor{1e5}
  @subsubsection Building DLLs with GNAT Project files
  
  
--- 25008,25014 ----
  @end quotation
  
  @node Building DLLs with GNAT Project files,Building DLLs with GNAT,Using DLLs with GNAT,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information id23}@anchor{1fd}@anchor{gnat_ugn/platform_specific_information building-dlls-with-gnat-project-files}@anchor{1e6}
  @subsubsection Building DLLs with GNAT Project files
  
  
*************** when inside the @code{DllMain} routine w
*** 24822,24828 ****
  of shared libraries, so it is not possible to have library level tasks in SALs.
  
  @node Building DLLs with GNAT,Building DLLs with gnatdll,Building DLLs with GNAT Project files,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information building-dlls-with-gnat}@anchor{1fd}@anchor{gnat_ugn/platform_specific_information id24}@anchor{1fe}
  @subsubsection Building DLLs with GNAT
  
  
--- 25024,25030 ----
  of shared libraries, so it is not possible to have library level tasks in SALs.
  
  @node Building DLLs with GNAT,Building DLLs with gnatdll,Building DLLs with GNAT Project files,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information building-dlls-with-gnat}@anchor{1fe}@anchor{gnat_ugn/platform_specific_information id24}@anchor{1ff}
  @subsubsection Building DLLs with GNAT
  
  
*************** $ gcc -shared -shared-libgcc -o api.dll
*** 24853,24859 ****
  It is important to note that in this case all symbols found in the
  object files are automatically exported. It is possible to restrict
  the set of symbols to export by passing to @code{gcc} a definition
! file (see @ref{1f2,,The Definition File}).
  For example:
  
  @example
--- 25055,25061 ----
  It is important to note that in this case all symbols found in the
  object files are automatically exported. It is possible to restrict
  the set of symbols to export by passing to @code{gcc} a definition
! file (see @ref{1f3,,The Definition File}).
  For example:
  
  @example
*************** $ gnatmake main -Iapilib -bargs -shared
*** 24891,24897 ****
  @end quotation
  
  @node Building DLLs with gnatdll,Ada DLLs and Finalization,Building DLLs with GNAT,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information building-dlls-with-gnatdll}@anchor{1ff}@anchor{gnat_ugn/platform_specific_information id25}@anchor{200}
  @subsubsection Building DLLs with gnatdll
  
  
--- 25093,25099 ----
  @end quotation
  
  @node Building DLLs with gnatdll,Ada DLLs and Finalization,Building DLLs with GNAT,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information building-dlls-with-gnatdll}@anchor{200}@anchor{gnat_ugn/platform_specific_information id25}@anchor{201}
  @subsubsection Building DLLs with gnatdll
  
  
*************** $ gnatmake main -Iapilib -bargs -shared
*** 24899,24906 ****
  @geindex building
  
  Note that it is preferred to use GNAT Project files
! (@ref{1e5,,Building DLLs with GNAT Project files}) or the built-in GNAT
! DLL support (@ref{1fd,,Building DLLs with GNAT}) or to build DLLs.
  
  This section explains how to build DLLs containing Ada code using
  @code{gnatdll}. These DLLs will be referred to as Ada DLLs in the
--- 25101,25108 ----
  @geindex building
  
  Note that it is preferred to use GNAT Project files
! (@ref{1e6,,Building DLLs with GNAT Project files}) or the built-in GNAT
! DLL support (@ref{1fe,,Building DLLs with GNAT}) or to build DLLs.
  
  This section explains how to build DLLs containing Ada code using
  @code{gnatdll}. These DLLs will be referred to as Ada DLLs in the
*************** non-Ada applications are as follows:
*** 24916,24935 ****
  You need to mark each Ada entity exported by the DLL with a @code{C} or
  @code{Stdcall} calling convention to avoid any Ada name mangling for the
  entities exported by the DLL
! (see @ref{201,,Exporting Ada Entities}). You can
  skip this step if you plan to use the Ada DLL only from Ada applications.
  
  @item 
  Your Ada code must export an initialization routine which calls the routine
  @code{adainit} generated by @code{gnatbind} to perform the elaboration of
! the Ada code in the DLL (@ref{202,,Ada DLLs and Elaboration}). The initialization
  routine exported by the Ada DLL must be invoked by the clients of the DLL
  to initialize the DLL.
  
  @item 
  When useful, the DLL should also export a finalization routine which calls
  routine @code{adafinal} generated by @code{gnatbind} to perform the
! finalization of the Ada code in the DLL (@ref{203,,Ada DLLs and Finalization}).
  The finalization routine exported by the Ada DLL must be invoked by the
  clients of the DLL when the DLL services are no further needed.
  
--- 25118,25137 ----
  You need to mark each Ada entity exported by the DLL with a @code{C} or
  @code{Stdcall} calling convention to avoid any Ada name mangling for the
  entities exported by the DLL
! (see @ref{202,,Exporting Ada Entities}). You can
  skip this step if you plan to use the Ada DLL only from Ada applications.
  
  @item 
  Your Ada code must export an initialization routine which calls the routine
  @code{adainit} generated by @code{gnatbind} to perform the elaboration of
! the Ada code in the DLL (@ref{203,,Ada DLLs and Elaboration}). The initialization
  routine exported by the Ada DLL must be invoked by the clients of the DLL
  to initialize the DLL.
  
  @item 
  When useful, the DLL should also export a finalization routine which calls
  routine @code{adafinal} generated by @code{gnatbind} to perform the
! finalization of the Ada code in the DLL (@ref{204,,Ada DLLs and Finalization}).
  The finalization routine exported by the Ada DLL must be invoked by the
  clients of the DLL when the DLL services are no further needed.
  
*************** of the programming languages to which yo
*** 24939,24949 ****
  
  @item 
  You must provide a definition file listing the exported entities
! (@ref{1f2,,The Definition File}).
  
  @item 
  Finally you must use @code{gnatdll} to produce the DLL and the import
! library (@ref{1fa,,Using gnatdll}).
  @end itemize
  
  Note that a relocatable DLL stripped using the @code{strip}
--- 25141,25151 ----
  
  @item 
  You must provide a definition file listing the exported entities
! (@ref{1f3,,The Definition File}).
  
  @item 
  Finally you must use @code{gnatdll} to produce the DLL and the import
! library (@ref{1fb,,Using gnatdll}).
  @end itemize
  
  Note that a relocatable DLL stripped using the @code{strip}
*************** chapter of the @emph{GPRbuild User's Gui
*** 24963,24969 ****
  @end menu
  
  @node Limitations When Using Ada DLLs from Ada,Exporting Ada Entities,,Building DLLs with gnatdll
! @anchor{gnat_ugn/platform_specific_information limitations-when-using-ada-dlls-from-ada}@anchor{204}
  @subsubsection Limitations When Using Ada DLLs from Ada
  
  
--- 25165,25171 ----
  @end menu
  
  @node Limitations When Using Ada DLLs from Ada,Exporting Ada Entities,,Building DLLs with gnatdll
! @anchor{gnat_ugn/platform_specific_information limitations-when-using-ada-dlls-from-ada}@anchor{205}
  @subsubsection Limitations When Using Ada DLLs from Ada
  
  
*************** It is completely safe to exchange plain
*** 24984,24990 ****
  Windows object handles, etc.
  
  @node Exporting Ada Entities,Ada DLLs and Elaboration,Limitations When Using Ada DLLs from Ada,Building DLLs with gnatdll
! @anchor{gnat_ugn/platform_specific_information exporting-ada-entities}@anchor{201}@anchor{gnat_ugn/platform_specific_information id26}@anchor{205}
  @subsubsection Exporting Ada Entities
  
  
--- 25186,25192 ----
  Windows object handles, etc.
  
  @node Exporting Ada Entities,Ada DLLs and Elaboration,Limitations When Using Ada DLLs from Ada,Building DLLs with gnatdll
! @anchor{gnat_ugn/platform_specific_information exporting-ada-entities}@anchor{202}@anchor{gnat_ugn/platform_specific_information id26}@anchor{206}
  @subsubsection Exporting Ada Entities
  
  
*************** end API;
*** 25084,25093 ****
  Note that if you do not export the Ada entities with a @code{C} or
  @code{Stdcall} convention you will have to provide the mangled Ada names
  in the definition file of the Ada DLL
! (@ref{206,,Creating the Definition File}).
  
  @node Ada DLLs and Elaboration,,Exporting Ada Entities,Building DLLs with gnatdll
! @anchor{gnat_ugn/platform_specific_information ada-dlls-and-elaboration}@anchor{202}@anchor{gnat_ugn/platform_specific_information id27}@anchor{207}
  @subsubsection Ada DLLs and Elaboration
  
  
--- 25286,25295 ----
  Note that if you do not export the Ada entities with a @code{C} or
  @code{Stdcall} convention you will have to provide the mangled Ada names
  in the definition file of the Ada DLL
! (@ref{207,,Creating the Definition File}).
  
  @node Ada DLLs and Elaboration,,Exporting Ada Entities,Building DLLs with gnatdll
! @anchor{gnat_ugn/platform_specific_information ada-dlls-and-elaboration}@anchor{203}@anchor{gnat_ugn/platform_specific_information id27}@anchor{208}
  @subsubsection Ada DLLs and Elaboration
  
  
*************** the Ada elaboration routine @code{adaini
*** 25105,25111 ****
  (@ref{b4,,Binding with Non-Ada Main Programs}). See the body of
  @code{Initialize_Api} for an example. Note that the GNAT binder is
  automatically invoked during the DLL build process by the @code{gnatdll}
! tool (@ref{1fa,,Using gnatdll}).
  
  When a DLL is loaded, Windows systematically invokes a routine called
  @code{DllMain}. It would therefore be possible to call @code{adainit}
--- 25307,25313 ----
  (@ref{b4,,Binding with Non-Ada Main Programs}). See the body of
  @code{Initialize_Api} for an example. Note that the GNAT binder is
  automatically invoked during the DLL build process by the @code{gnatdll}
! tool (@ref{1fb,,Using gnatdll}).
  
  When a DLL is loaded, Windows systematically invokes a routine called
  @code{DllMain}. It would therefore be possible to call @code{adainit}
*************** time), which means that the GNAT run-tim
*** 25118,25124 ****
  newly created task to complete its initialization.
  
  @node Ada DLLs and Finalization,Creating a Spec for Ada DLLs,Building DLLs with gnatdll,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information id28}@anchor{208}@anchor{gnat_ugn/platform_specific_information ada-dlls-and-finalization}@anchor{203}
  @subsubsection Ada DLLs and Finalization
  
  
--- 25320,25326 ----
  newly created task to complete its initialization.
  
  @node Ada DLLs and Finalization,Creating a Spec for Ada DLLs,Building DLLs with gnatdll,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information id28}@anchor{209}@anchor{gnat_ugn/platform_specific_information ada-dlls-and-finalization}@anchor{204}
  @subsubsection Ada DLLs and Finalization
  
  
*************** routine @code{adafinal} generated by the
*** 25133,25142 ****
  See the body of @code{Finalize_Api} for an
  example. As already pointed out the GNAT binder is automatically invoked
  during the DLL build process by the @code{gnatdll} tool
! (@ref{1fa,,Using gnatdll}).
  
  @node Creating a Spec for Ada DLLs,GNAT and Windows Resources,Ada DLLs and Finalization,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information id29}@anchor{209}@anchor{gnat_ugn/platform_specific_information creating-a-spec-for-ada-dlls}@anchor{20a}
  @subsubsection Creating a Spec for Ada DLLs
  
  
--- 25335,25344 ----
  See the body of @code{Finalize_Api} for an
  example. As already pointed out the GNAT binder is automatically invoked
  during the DLL build process by the @code{gnatdll} tool
! (@ref{1fb,,Using gnatdll}).
  
  @node Creating a Spec for Ada DLLs,GNAT and Windows Resources,Ada DLLs and Finalization,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information id29}@anchor{20a}@anchor{gnat_ugn/platform_specific_information creating-a-spec-for-ada-dlls}@anchor{20b}
  @subsubsection Creating a Spec for Ada DLLs
  
  
*************** end API;
*** 25194,25200 ****
  @end menu
  
  @node Creating the Definition File,Using gnatdll,,Creating a Spec for Ada DLLs
! @anchor{gnat_ugn/platform_specific_information creating-the-definition-file}@anchor{206}@anchor{gnat_ugn/platform_specific_information id30}@anchor{20b}
  @subsubsection Creating the Definition File
  
  
--- 25396,25402 ----
  @end menu
  
  @node Creating the Definition File,Using gnatdll,,Creating a Spec for Ada DLLs
! @anchor{gnat_ugn/platform_specific_information creating-the-definition-file}@anchor{207}@anchor{gnat_ugn/platform_specific_information id30}@anchor{20c}
  @subsubsection Creating the Definition File
  
  
*************** EXPORTS
*** 25230,25236 ****
  @end quotation
  
  @node Using gnatdll,,Creating the Definition File,Creating a Spec for Ada DLLs
! @anchor{gnat_ugn/platform_specific_information using-gnatdll}@anchor{1fa}@anchor{gnat_ugn/platform_specific_information id31}@anchor{20c}
  @subsubsection Using @code{gnatdll}
  
  
--- 25432,25438 ----
  @end quotation
  
  @node Using gnatdll,,Creating the Definition File,Creating a Spec for Ada DLLs
! @anchor{gnat_ugn/platform_specific_information using-gnatdll}@anchor{1fb}@anchor{gnat_ugn/platform_specific_information id31}@anchor{20d}
  @subsubsection Using @code{gnatdll}
  
  
*************** asks @code{gnatlink} to generate the rou
*** 25441,25447 ****
  is loaded into memory.
  
  @item 
! @code{gnatdll} uses @code{dlltool} (see @ref{20d,,Using dlltool}) to build the
  export table (@code{api.exp}). The export table contains the relocation
  information in a form which can be used during the final link to ensure
  that the Windows loader is able to place the DLL anywhere in memory.
--- 25643,25649 ----
  is loaded into memory.
  
  @item 
! @code{gnatdll} uses @code{dlltool} (see @ref{20e,,Using dlltool}) to build the
  export table (@code{api.exp}). The export table contains the relocation
  information in a form which can be used during the final link to ensure
  that the Windows loader is able to place the DLL anywhere in memory.
*************** $ gnatbind -n api
*** 25480,25486 ****
  $ gnatlink api api.exp -o api.dll -mdll
  @end example
  @end itemize
! @anchor{gnat_ugn/platform_specific_information using-dlltool}@anchor{20d}
  @subsubheading Using @code{dlltool}
  
  
--- 25682,25688 ----
  $ gnatlink api api.exp -o api.dll -mdll
  @end example
  @end itemize
! @anchor{gnat_ugn/platform_specific_information using-dlltool}@anchor{20e}
  @subsubheading Using @code{dlltool}
  
  
*************** DLL in the static import library generat
*** 25539,25545 ****
  @item @code{-k}
  
  Kill @code{@@@emph{nn}} from exported names
! (@ref{1e6,,Windows Calling Conventions}
  for a discussion about @code{Stdcall}-style symbols.
  @end table
  
--- 25741,25747 ----
  @item @code{-k}
  
  Kill @code{@@@emph{nn}} from exported names
! (@ref{1e7,,Windows Calling Conventions}
  for a discussion about @code{Stdcall}-style symbols.
  @end table
  
*************** Use @code{assembler-name} as the assembl
*** 25595,25601 ****
  @end table
  
  @node GNAT and Windows Resources,Using GNAT DLLs from Microsoft Visual Studio Applications,Creating a Spec for Ada DLLs,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information gnat-and-windows-resources}@anchor{20e}@anchor{gnat_ugn/platform_specific_information id32}@anchor{20f}
  @subsubsection GNAT and Windows Resources
  
  
--- 25797,25803 ----
  @end table
  
  @node GNAT and Windows Resources,Using GNAT DLLs from Microsoft Visual Studio Applications,Creating a Spec for Ada DLLs,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information gnat-and-windows-resources}@anchor{20f}@anchor{gnat_ugn/platform_specific_information id32}@anchor{210}
  @subsubsection GNAT and Windows Resources
  
  
*************** the corresponding Microsoft documentatio
*** 25690,25696 ****
  @end menu
  
  @node Building Resources,Compiling Resources,,GNAT and Windows Resources
! @anchor{gnat_ugn/platform_specific_information building-resources}@anchor{210}@anchor{gnat_ugn/platform_specific_information id33}@anchor{211}
  @subsubsection Building Resources
  
  
--- 25892,25898 ----
  @end menu
  
  @node Building Resources,Compiling Resources,,GNAT and Windows Resources
! @anchor{gnat_ugn/platform_specific_information building-resources}@anchor{211}@anchor{gnat_ugn/platform_specific_information id33}@anchor{212}
  @subsubsection Building Resources
  
  
*************** complete description of the resource scr
*** 25710,25716 ****
  Microsoft documentation.
  
  @node Compiling Resources,Using Resources,Building Resources,GNAT and Windows Resources
! @anchor{gnat_ugn/platform_specific_information compiling-resources}@anchor{212}@anchor{gnat_ugn/platform_specific_information id34}@anchor{213}
  @subsubsection Compiling Resources
  
  
--- 25912,25918 ----
  Microsoft documentation.
  
  @node Compiling Resources,Using Resources,Building Resources,GNAT and Windows Resources
! @anchor{gnat_ugn/platform_specific_information compiling-resources}@anchor{213}@anchor{gnat_ugn/platform_specific_information id34}@anchor{214}
  @subsubsection Compiling Resources
  
  
*************** $ windres -i myres.res -o myres.o
*** 25752,25758 ****
  @end quotation
  
  @node Using Resources,,Compiling Resources,GNAT and Windows Resources
! @anchor{gnat_ugn/platform_specific_information using-resources}@anchor{214}@anchor{gnat_ugn/platform_specific_information id35}@anchor{215}
  @subsubsection Using Resources
  
  
--- 25954,25960 ----
  @end quotation
  
  @node Using Resources,,Compiling Resources,GNAT and Windows Resources
! @anchor{gnat_ugn/platform_specific_information using-resources}@anchor{215}@anchor{gnat_ugn/platform_specific_information id35}@anchor{216}
  @subsubsection Using Resources
  
  
*************** $ gnatmake myprog -largs myres.o
*** 25772,25778 ****
  @end quotation
  
  @node Using GNAT DLLs from Microsoft Visual Studio Applications,Debugging a DLL,GNAT and Windows Resources,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information using-gnat-dll-from-msvs}@anchor{216}@anchor{gnat_ugn/platform_specific_information using-gnat-dlls-from-microsoft-visual-studio-applications}@anchor{217}
  @subsubsection Using GNAT DLLs from Microsoft Visual Studio Applications
  
  
--- 25974,25980 ----
  @end quotation
  
  @node Using GNAT DLLs from Microsoft Visual Studio Applications,Debugging a DLL,GNAT and Windows Resources,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information using-gnat-dll-from-msvs}@anchor{217}@anchor{gnat_ugn/platform_specific_information using-gnat-dlls-from-microsoft-visual-studio-applications}@anchor{218}
  @subsubsection Using GNAT DLLs from Microsoft Visual Studio Applications
  
  
*************** $ gprbuild -p mylib.gpr
*** 25806,25812 ****
  @item 
  Produce a .def file for the symbols you need to interface with, either by
  hand or automatically with possibly some manual adjustments
! (see @ref{1f8,,Creating Definition File Automatically}):
  @end enumerate
  
  @quotation
--- 26008,26014 ----
  @item 
  Produce a .def file for the symbols you need to interface with, either by
  hand or automatically with possibly some manual adjustments
! (see @ref{1f9,,Creating Definition File Automatically}):
  @end enumerate
  
  @quotation
*************** $ dlltool libmylib.dll -z libmylib.def -
*** 25823,25829 ****
  Make sure that MSVS command-line tools are accessible on the path.
  
  @item 
! Create the Microsoft-style import library (see @ref{1fb,,MSVS-Style Import Library}):
  @end enumerate
  
  @quotation
--- 26025,26031 ----
  Make sure that MSVS command-line tools are accessible on the path.
  
  @item 
! Create the Microsoft-style import library (see @ref{1fc,,MSVS-Style Import Library}):
  @end enumerate
  
  @quotation
*************** or copy the DLL into into the directory
*** 25865,25871 ****
  @end enumerate
  
  @node Debugging a DLL,Setting Stack Size from gnatlink,Using GNAT DLLs from Microsoft Visual Studio Applications,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information id36}@anchor{218}@anchor{gnat_ugn/platform_specific_information debugging-a-dll}@anchor{219}
  @subsubsection Debugging a DLL
  
  
--- 26067,26073 ----
  @end enumerate
  
  @node Debugging a DLL,Setting Stack Size from gnatlink,Using GNAT DLLs from Microsoft Visual Studio Applications,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information id36}@anchor{219}@anchor{gnat_ugn/platform_specific_information debugging-a-dll}@anchor{21a}
  @subsubsection Debugging a DLL
  
  
*************** tools suite used to build the DLL.
*** 25903,25909 ****
  @end menu
  
  @node Program and DLL Both Built with GCC/GNAT,Program Built with Foreign Tools and DLL Built with GCC/GNAT,,Debugging a DLL
! @anchor{gnat_ugn/platform_specific_information id37}@anchor{21a}@anchor{gnat_ugn/platform_specific_information program-and-dll-both-built-with-gcc-gnat}@anchor{21b}
  @subsubsection Program and DLL Both Built with GCC/GNAT
  
  
--- 26105,26111 ----
  @end menu
  
  @node Program and DLL Both Built with GCC/GNAT,Program Built with Foreign Tools and DLL Built with GCC/GNAT,,Debugging a DLL
! @anchor{gnat_ugn/platform_specific_information id37}@anchor{21b}@anchor{gnat_ugn/platform_specific_information program-and-dll-both-built-with-gcc-gnat}@anchor{21c}
  @subsubsection Program and DLL Both Built with GCC/GNAT
  
  
*************** the process. Let's suppose here that the
*** 25913,25919 ****
  @code{ada_main} and that in the DLL there is an entry point named
  @code{ada_dll}.
  
! The DLL (@ref{1f1,,Introduction to Dynamic Link Libraries (DLLs)}) and
  program must have been built with the debugging information (see GNAT -g
  switch). Here are the step-by-step instructions for debugging it:
  
--- 26115,26121 ----
  @code{ada_main} and that in the DLL there is an entry point named
  @code{ada_dll}.
  
! The DLL (@ref{1f2,,Introduction to Dynamic Link Libraries (DLLs)}) and
  program must have been built with the debugging information (see GNAT -g
  switch). Here are the step-by-step instructions for debugging it:
  
*************** you can use the standard approach to deb
*** 25953,25959 ****
  (@ref{24,,Running and Debugging Ada Programs}).
  
  @node Program Built with Foreign Tools and DLL Built with GCC/GNAT,,Program and DLL Both Built with GCC/GNAT,Debugging a DLL
! @anchor{gnat_ugn/platform_specific_information program-built-with-foreign-tools-and-dll-built-with-gcc-gnat}@anchor{21c}@anchor{gnat_ugn/platform_specific_information id38}@anchor{21d}
  @subsubsection Program Built with Foreign Tools and DLL Built with GCC/GNAT
  
  
--- 26155,26161 ----
  (@ref{24,,Running and Debugging Ada Programs}).
  
  @node Program Built with Foreign Tools and DLL Built with GCC/GNAT,,Program and DLL Both Built with GCC/GNAT,Debugging a DLL
! @anchor{gnat_ugn/platform_specific_information program-built-with-foreign-tools-and-dll-built-with-gcc-gnat}@anchor{21d}@anchor{gnat_ugn/platform_specific_information id38}@anchor{21e}
  @subsubsection Program Built with Foreign Tools and DLL Built with GCC/GNAT
  
  
*************** example some C code built with Microsoft
*** 25970,25976 ****
  DLL named @code{test.dll} containing an Ada entry point named
  @code{ada_dll}.
  
! The DLL (see @ref{1f1,,Introduction to Dynamic Link Libraries (DLLs)}) must have
  been built with debugging information (see the GNAT @code{-g} option).
  
  @subsubheading Debugging the DLL Directly
--- 26172,26178 ----
  DLL named @code{test.dll} containing an Ada entry point named
  @code{ada_dll}.
  
! The DLL (see @ref{1f2,,Introduction to Dynamic Link Libraries (DLLs)}) must have
  been built with debugging information (see the GNAT @code{-g} option).
  
  @subsubheading Debugging the DLL Directly
*************** approach to debug a program as described
*** 26109,26115 ****
  @ref{24,,Running and Debugging Ada Programs}.
  
  @node Setting Stack Size from gnatlink,Setting Heap Size from gnatlink,Debugging a DLL,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information setting-stack-size-from-gnatlink}@anchor{136}@anchor{gnat_ugn/platform_specific_information id39}@anchor{21e}
  @subsubsection Setting Stack Size from @code{gnatlink}
  
  
--- 26311,26317 ----
  @ref{24,,Running and Debugging Ada Programs}.
  
  @node Setting Stack Size from gnatlink,Setting Heap Size from gnatlink,Debugging a DLL,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information setting-stack-size-from-gnatlink}@anchor{136}@anchor{gnat_ugn/platform_specific_information id39}@anchor{21f}
  @subsubsection Setting Stack Size from @code{gnatlink}
  
  
*************** because the comma is a separator for thi
*** 26152,26158 ****
  @end itemize
  
  @node Setting Heap Size from gnatlink,,Setting Stack Size from gnatlink,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information setting-heap-size-from-gnatlink}@anchor{137}@anchor{gnat_ugn/platform_specific_information id40}@anchor{21f}
  @subsubsection Setting Heap Size from @code{gnatlink}
  
  
--- 26354,26360 ----
  @end itemize
  
  @node Setting Heap Size from gnatlink,,Setting Stack Size from gnatlink,Mixed-Language Programming on Windows
! @anchor{gnat_ugn/platform_specific_information setting-heap-size-from-gnatlink}@anchor{137}@anchor{gnat_ugn/platform_specific_information id40}@anchor{220}
  @subsubsection Setting Heap Size from @code{gnatlink}
  
  
*************** because the comma is a separator for thi
*** 26185,26191 ****
  @end itemize
  
  @node Windows Specific Add-Ons,,Mixed-Language Programming on Windows,Microsoft Windows Topics
! @anchor{gnat_ugn/platform_specific_information windows-specific-add-ons}@anchor{220}@anchor{gnat_ugn/platform_specific_information win32-specific-addons}@anchor{221}
  @subsection Windows Specific Add-Ons
  
  
--- 26387,26393 ----
  @end itemize
  
  @node Windows Specific Add-Ons,,Mixed-Language Programming on Windows,Microsoft Windows Topics
! @anchor{gnat_ugn/platform_specific_information windows-specific-add-ons}@anchor{221}@anchor{gnat_ugn/platform_specific_information win32-specific-addons}@anchor{222}
  @subsection Windows Specific Add-Ons
  
  
*************** This section describes the Windows speci
*** 26198,26204 ****
  @end menu
  
  @node Win32Ada,wPOSIX,,Windows Specific Add-Ons
! @anchor{gnat_ugn/platform_specific_information win32ada}@anchor{222}@anchor{gnat_ugn/platform_specific_information id41}@anchor{223}
  @subsubsection Win32Ada
  
  
--- 26400,26406 ----
  @end menu
  
  @node Win32Ada,wPOSIX,,Windows Specific Add-Ons
! @anchor{gnat_ugn/platform_specific_information win32ada}@anchor{223}@anchor{gnat_ugn/platform_specific_information id41}@anchor{224}
  @subsubsection Win32Ada
  
  
*************** gprbuild p.gpr
*** 26229,26235 ****
  @end quotation
  
  @node wPOSIX,,Win32Ada,Windows Specific Add-Ons
! @anchor{gnat_ugn/platform_specific_information id42}@anchor{224}@anchor{gnat_ugn/platform_specific_information wposix}@anchor{225}
  @subsubsection wPOSIX
  
  
--- 26431,26437 ----
  @end quotation
  
  @node wPOSIX,,Win32Ada,Windows Specific Add-Ons
! @anchor{gnat_ugn/platform_specific_information id42}@anchor{225}@anchor{gnat_ugn/platform_specific_information wposix}@anchor{226}
  @subsubsection wPOSIX
  
  
*************** gprbuild p.gpr
*** 26262,26268 ****
  @end quotation
  
  @node Mac OS Topics,,Microsoft Windows Topics,Platform-Specific Information
! @anchor{gnat_ugn/platform_specific_information mac-os-topics}@anchor{2d}@anchor{gnat_ugn/platform_specific_information id43}@anchor{226}
  @section Mac OS Topics
  
  
--- 26464,26470 ----
  @end quotation
  
  @node Mac OS Topics,,Microsoft Windows Topics,Platform-Specific Information
! @anchor{gnat_ugn/platform_specific_information mac-os-topics}@anchor{2d}@anchor{gnat_ugn/platform_specific_information id43}@anchor{227}
  @section Mac OS Topics
  
  
*************** platform.
*** 26277,26283 ****
  @end menu
  
  @node Codesigning the Debugger,,,Mac OS Topics
! @anchor{gnat_ugn/platform_specific_information codesigning-the-debugger}@anchor{227}
  @subsection Codesigning the Debugger
  
  
--- 26479,26485 ----
  @end menu
  
  @node Codesigning the Debugger,,,Mac OS Topics
! @anchor{gnat_ugn/platform_specific_information codesigning-the-debugger}@anchor{228}
  @subsection Codesigning the Debugger
  
  
*************** the location where you installed GNAT.
*** 26358,26364 ****
  in the Unix group @code{_developer}.
  
  @node Example of Binder Output File,Elaboration Order Handling in GNAT,Platform-Specific Information,Top
! @anchor{gnat_ugn/example_of_binder_output example-of-binder-output-file}@anchor{e}@anchor{gnat_ugn/example_of_binder_output doc}@anchor{228}@anchor{gnat_ugn/example_of_binder_output id1}@anchor{229}
  @chapter Example of Binder Output File
  
  
--- 26560,26566 ----
  in the Unix group @code{_developer}.
  
  @node Example of Binder Output File,Elaboration Order Handling in GNAT,Platform-Specific Information,Top
! @anchor{gnat_ugn/example_of_binder_output example-of-binder-output-file}@anchor{e}@anchor{gnat_ugn/example_of_binder_output doc}@anchor{229}@anchor{gnat_ugn/example_of_binder_output id1}@anchor{22a}
  @chapter Example of Binder Output File
  
  
*************** elaboration code in your own application
*** 27110,27116 ****
  @c -- Example: A |withing| unit has a |with| clause, it |withs| a |withed| unit
  
  @node Elaboration Order Handling in GNAT,Inline Assembler,Example of Binder Output File,Top
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-order-handling-in-gnat}@anchor{f}@anchor{gnat_ugn/elaboration_order_handling_in_gnat doc}@anchor{22a}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id1}@anchor{22b}
  @chapter Elaboration Order Handling in GNAT
  
  
--- 27312,27318 ----
  @c -- Example: A |withing| unit has a |with| clause, it |withs| a |withed| unit
  
  @node Elaboration Order Handling in GNAT,Inline Assembler,Example of Binder Output File,Top
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-order-handling-in-gnat}@anchor{f}@anchor{gnat_ugn/elaboration_order_handling_in_gnat doc}@anchor{22b}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id1}@anchor{22c}
  @chapter Elaboration Order Handling in GNAT
  
  
*************** GNAT, either automatically or with expli
*** 27128,27142 ****
  * Checking the Elaboration Order:: 
  * Controlling the Elaboration Order in Ada:: 
  * Controlling the Elaboration Order in GNAT:: 
- * Common Elaboration-model Traits:: 
- * Dynamic Elaboration Model in GNAT:: 
- * Static Elaboration Model in GNAT:: 
- * SPARK Elaboration Model in GNAT:: 
- * Legacy Elaboration Model in GNAT:: 
  * Mixing Elaboration Models:: 
  * Elaboration Circularities:: 
  * Resolving Elaboration Circularities:: 
- * Resolving Task Issues:: 
  * Elaboration-related Compiler Switches:: 
  * Summary of Procedures for Elaboration Control:: 
  * Inspecting the Chosen Elaboration Order:: 
--- 27330,27340 ----
  * Checking the Elaboration Order:: 
  * Controlling the Elaboration Order in Ada:: 
  * Controlling the Elaboration Order in GNAT:: 
  * Mixing Elaboration Models:: 
+ * ABE Diagnostics:: 
+ * SPARK Diagnostics:: 
  * Elaboration Circularities:: 
  * Resolving Elaboration Circularities:: 
  * Elaboration-related Compiler Switches:: 
  * Summary of Procedures for Elaboration Control:: 
  * Inspecting the Chosen Elaboration Order:: 
*************** GNAT, either automatically or with expli
*** 27144,27150 ****
  @end menu
  
  @node Elaboration Code,Elaboration Order,,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-code}@anchor{22c}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id2}@anchor{22d}
  @section Elaboration Code
  
  
--- 27342,27348 ----
  @end menu
  
  @node Elaboration Code,Elaboration Order,,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-code}@anchor{22d}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id2}@anchor{22e}
  @section Elaboration Code
  
  
*************** In addition to the Ada terminology, this
*** 27184,27192 ****
  @itemize *
  
  @item 
  @emph{Scenario}
  
! A construct that is elaborated or executed by elaboration code is referred to
  as an @emph{elaboration scenario} or simply a @strong{scenario}. GNAT recognizes the
  following scenarios:
  
--- 27382,27396 ----
  @itemize *
  
  @item 
+ @emph{Invocation}
+ 
+ The act of calling a subprogram, instantiating a generic, or activating a
+ task.
+ 
+ @item 
  @emph{Scenario}
  
! A construct that is elaborated or invoked by elaboration code is referred to
  as an @emph{elaboration scenario} or simply a @strong{scenario}. GNAT recognizes the
  following scenarios:
  
*************** end Client;
*** 27258,27264 ****
  In the example above, the call to @code{Server.Func} is an elaboration scenario
  because it appears at the library level of package @code{Client}. Note that the
  declaration of package @code{Nested} is ignored according to the definition
! given above. As a result, the call to @code{Server.Func} will be executed when
  the spec of unit @code{Client} is elaborated.
  
  @item 
--- 27462,27468 ----
  In the example above, the call to @code{Server.Func} is an elaboration scenario
  because it appears at the library level of package @code{Client}. Note that the
  declaration of package @code{Nested} is ignored according to the definition
! given above. As a result, the call to @code{Server.Func} will be invoked when
  the spec of unit @code{Client} is elaborated.
  
  @item 
*************** end Client;
*** 27281,27292 ****
  
  In the example above, the call to @code{Proc} is an elaboration scenario because
  it appears within the statement sequence of package body @code{Client}. As a
! result, the call to @code{Proc} will be executed when the body of @code{Client} is
  elaborated.
  @end itemize
  
  @node Elaboration Order,Checking the Elaboration Order,Elaboration Code,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-order}@anchor{22e}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id3}@anchor{22f}
  @section Elaboration Order
  
  
--- 27485,27496 ----
  
  In the example above, the call to @code{Proc} is an elaboration scenario because
  it appears within the statement sequence of package body @code{Client}. As a
! result, the call to @code{Proc} will be invoked when the body of @code{Client} is
  elaborated.
  @end itemize
  
  @node Elaboration Order,Checking the Elaboration Order,Elaboration Code,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-order}@anchor{22f}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id3}@anchor{230}
  @section Elaboration Order
  
  
*************** executed is referred to as @strong{elabo
*** 27295,27300 ****
--- 27499,27506 ----
  
  Within a single unit, elaboration code is executed in sequential order.
  
+ @quotation
+ 
  @example
  package body Client is
     Result : ... := Server.Func;
*************** begin
*** 27308,27313 ****
--- 27514,27520 ----
     Proc;
  end Client;
  @end example
+ @end quotation
  
  In the example above, the elaboration order within package body @code{Client} is
  as follows:
*************** factors:
*** 27355,27371 ****
  @emph{with}ed units
  
  @item 
  purity of units
  
  @item 
  preelaborability of units
  
  @item 
! presence of elaboration control pragmas
  @end itemize
  
  A program may have several elaboration orders depending on its structure.
  
  @example
  package Server is
     function Func (Index : Integer) return Integer;
--- 27562,27586 ----
  @emph{with}ed units
  
  @item 
+ parent units
+ 
+ @item 
  purity of units
  
  @item 
  preelaborability of units
  
  @item 
! presence of elaboration-control pragmas
! 
! @item 
! invocations performed in elaboration code
  @end itemize
  
  A program may have several elaboration orders depending on its structure.
  
+ @quotation
+ 
  @example
  package Server is
     function Func (Index : Integer) return Integer;
*************** end Client;
*** 27394,27409 ****
--- 27609,27628 ----
  with Client;
  procedure Main is begin null; end Main;
  @end example
+ @end quotation
  
  The following elaboration order exhibits a fundamental problem referred to as
  @emph{access-before-elaboration} or simply @strong{ABE}.
  
+ @quotation
+ 
  @example
  spec of Server
  spec of Client
  body of Server
  body of Main
  @end example
+ @end quotation
  
  The elaboration of @code{Server}'s spec materializes function @code{Func}, making it
  callable. The elaboration of @code{Client}'s spec elaborates the declaration of
*************** vein as index or null exclusion checks.
*** 27421,27446 ****
  The following elaboration order avoids the ABE problem and the program can be
  successfully elaborated.
  
  @example
  spec of Server
  body of Server
  spec of Client
  body of Main
  @end example
  
  Ada states that a total elaboration order must exist, but it does not define
  what this order is. A compiler is thus tasked with choosing a suitable
  elaboration order which satisfies the dependencies imposed by @emph{with} clauses,
! unit categorization, and elaboration control pragmas. Ideally an order which
! avoids ABE problems should be chosen, however a compiler may not always find
! such an order due to complications with respect to control and data flow.
  
  @node Checking the Elaboration Order,Controlling the Elaboration Order in Ada,Elaboration Order,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat id4}@anchor{230}@anchor{gnat_ugn/elaboration_order_handling_in_gnat checking-the-elaboration-order}@anchor{231}
  @section Checking the Elaboration Order
  
  
! To avoid placing the entire elaboration order burden on the programmer, Ada
  provides three lines of defense:
  
  
--- 27640,27669 ----
  The following elaboration order avoids the ABE problem and the program can be
  successfully elaborated.
  
+ @quotation
+ 
  @example
  spec of Server
  body of Server
  spec of Client
  body of Main
  @end example
+ @end quotation
  
  Ada states that a total elaboration order must exist, but it does not define
  what this order is. A compiler is thus tasked with choosing a suitable
  elaboration order which satisfies the dependencies imposed by @emph{with} clauses,
! unit categorization, elaboration-control pragmas, and invocations performed in
! elaboration code. Ideally an order that avoids ABE problems should be chosen,
! however a compiler may not always find such an order due to complications with
! respect to control and data flow.
  
  @node Checking the Elaboration Order,Controlling the Elaboration Order in Ada,Elaboration Order,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat id4}@anchor{231}@anchor{gnat_ugn/elaboration_order_handling_in_gnat checking-the-elaboration-order}@anchor{232}
  @section Checking the Elaboration Order
  
  
! To avoid placing the entire elaboration-order burden on the programmer, Ada
  provides three lines of defense:
  
  
*************** always elaborated prior to Client. The s
*** 27458,27464 ****
  @emph{Dynamic semantics}
  
  Dynamic checks are performed at run time, to ensure that a target is
! elaborated prior to a scenario that executes it, thus avoiding ABE problems.
  A failed run-time check raises exception @code{Program_Error}. The following
  restrictions apply:
  
--- 27681,27687 ----
  @emph{Dynamic semantics}
  
  Dynamic checks are performed at run time, to ensure that a target is
! elaborated prior to a scenario that invokes it, thus avoiding ABE problems.
  A failed run-time check raises exception @code{Program_Error}. The following
  restrictions apply:
  
*************** associated task type has been elaborated
*** 27487,27494 ****
  The restrictions above can be summarized by the following rule:
  
  @emph{If a target has a body, then this body must be elaborated prior to the
! execution of the scenario that invokes, instantiates, or activates the
! target.}
  
  @item 
  @emph{Elaboration control}
--- 27710,27716 ----
  The restrictions above can be summarized by the following rule:
  
  @emph{If a target has a body, then this body must be elaborated prior to the
! scenario that invokes the target.}
  
  @item 
  @emph{Elaboration control}
*************** order.
*** 27498,27504 ****
  @end itemize
  
  @node Controlling the Elaboration Order in Ada,Controlling the Elaboration Order in GNAT,Checking the Elaboration Order,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat controlling-the-elaboration-order-in-ada}@anchor{232}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id5}@anchor{233}
  @section Controlling the Elaboration Order in Ada
  
  
--- 27720,27726 ----
  @end itemize
  
  @node Controlling the Elaboration Order in Ada,Controlling the Elaboration Order in GNAT,Checking the Elaboration Order,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat controlling-the-elaboration-order-in-ada}@anchor{233}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id5}@anchor{234}
  @section Controlling the Elaboration Order in Ada
  
  
*************** but still strong enough to prevent ABE p
*** 27564,27570 ****
  
  Pragma @code{Elaborate_Body} requires that the body of a unit is elaborated
  immediately after its spec. This restriction guarantees that no client
! scenario can execute a server target before the target body has been
  elaborated because the spec and body are effectively "glued" together.
  
  @example
--- 27786,27792 ----
  
  Pragma @code{Elaborate_Body} requires that the body of a unit is elaborated
  immediately after its spec. This restriction guarantees that no client
! scenario can invoke a server target before the target body has been
  elaborated because the spec and body are effectively "glued" together.
  
  @example
*************** Note that there are several allowable su
*** 27764,27770 ****
  be elaborated prior to @code{Client}.
  
  Removing pragma @code{Elaborate_All} could result in the following incorrect
! elaboration order
  
  @example
  spec of Math
--- 27986,27992 ----
  be elaborated prior to @code{Client}.
  
  Removing pragma @code{Elaborate_All} could result in the following incorrect
! elaboration order:
  
  @example
  spec of Math
*************** Note that one additional advantage of us
*** 27825,27832 ****
  is that the program continues to stay in the last state (one or more correct
  orders exist) even if maintenance changes the bodies of targets.
  
! @node Controlling the Elaboration Order in GNAT,Common Elaboration-model Traits,Controlling the Elaboration Order in Ada,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat id6}@anchor{234}@anchor{gnat_ugn/elaboration_order_handling_in_gnat controlling-the-elaboration-order-in-gnat}@anchor{235}
  @section Controlling the Elaboration Order in GNAT
  
  
--- 28047,28054 ----
  is that the program continues to stay in the last state (one or more correct
  orders exist) even if maintenance changes the bodies of targets.
  
! @node Controlling the Elaboration Order in GNAT,Mixing Elaboration Models,Controlling the Elaboration Order in Ada,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat id6}@anchor{235}@anchor{gnat_ugn/elaboration_order_handling_in_gnat controlling-the-elaboration-order-in-gnat}@anchor{236}
  @section Controlling the Elaboration Order in GNAT
  
  
*************** elaboration order and to diagnose elabor
*** 27842,27853 ****
  @item 
  @emph{Dynamic elaboration model}
  
! This is the most permissive of the three elaboration models. When the
! dynamic model is in effect, GNAT assumes that all code within all units in
! a partition is elaboration code. GNAT performs very few diagnostics and
! generates run-time checks to verify the elaboration order of a program. This
! behavior is identical to that specified by the Ada Reference Manual. The
! dynamic model is enabled with compiler switch @code{-gnatE}.
  @end itemize
  
  @geindex Static elaboration model
--- 28064,28097 ----
  @item 
  @emph{Dynamic elaboration model}
  
! This is the most permissive of the three elaboration models and emulates the
! behavior specified by the Ada Reference Manual. When the dynamic model is in
! effect, GNAT makes the following assumptions:
! 
! 
! @itemize -
! 
! @item 
! All code within all units in a partition is considered to be elaboration
! code.
! 
! @item 
! Some of the invocations in elaboration code may not take place at run time
! due to conditional execution.
! @end itemize
! 
! GNAT performs extensive diagnostics on a unit-by-unit basis for all scenarios
! that invoke internal targets. In addition, GNAT generates run-time checks for
! all external targets and for all scenarios that may exhibit ABE problems.
! 
! The elaboration order is obtained by honoring all @emph{with} clauses, purity and
! preelaborability of units, and elaboration-control pragmas. The dynamic model
! attempts to take all invocations in elaboration code into account. If an
! invocation leads to a circularity, GNAT ignores the invocation based on the
! assumptions stated above. An order obtained using the dynamic model may fail
! an ABE check at run time when GNAT ignored an invocation.
! 
! The dynamic model is enabled with compiler switch @code{-gnatE}.
  @end itemize
  
  @geindex Static elaboration model
*************** dynamic model is enabled with compiler s
*** 27859,27870 ****
  @emph{Static elaboration model}
  
  This is the middle ground of the three models. When the static model is in
! effect, GNAT performs extensive diagnostics on a unit-by-unit basis for all
! scenarios that elaborate or execute internal targets. GNAT also generates
! run-time checks for all external targets and for all scenarios that may
! exhibit ABE problems. Finally, GNAT installs implicit @code{Elaborate} and
! @code{Elaborate_All} pragmas for server units based on the dependencies of
! client units. The static model is the default model in GNAT.
  @end itemize
  
  @geindex SPARK elaboration model
--- 28103,28133 ----
  @emph{Static elaboration model}
  
  This is the middle ground of the three models. When the static model is in
! effect, GNAT makes the following assumptions:
! 
! 
! @itemize -
! 
! @item 
! Only code at the library level and in package body statements within all
! units in a partition is considered to be elaboration code.
! 
! @item 
! All invocations in elaboration will take place at run time, regardless of
! conditional execution.
! @end itemize
! 
! GNAT performs extensive diagnostics on a unit-by-unit basis for all scenarios
! that invoke internal targets. In addition, GNAT generates run-time checks for
! all external targets and for all scenarios that may exhibit ABE problems.
! 
! The elaboration order is obtained by honoring all @emph{with} clauses, purity and
! preelaborability of units, presence of elaboration-control pragmas, and all
! invocations in elaboration code. An order obtained using the static model is
! guaranteed to be ABE problem-free, excluding dispatching calls and
! access-to-subprogram types.
! 
! The static model is the default model in GNAT.
  @end itemize
  
  @geindex SPARK elaboration model
*************** client units. The static model is the de
*** 27878,27898 ****
  This is the most conservative of the three models and enforces the SPARK
  rules of elaboration as defined in the SPARK Reference Manual, section 7.7.
  The SPARK model is in effect only when a scenario and a target reside in a
! region subject to SPARK_Mode On, otherwise the dynamic or static model is in
! effect.
  @end itemize
  
! @geindex Legacy elaboration model
  
  
  @itemize *
  
  @item 
! @emph{Legacy elaboration model}
  
  In addition to the three elaboration models outlined above, GNAT provides the
! elaboration model of pre-18.x versions referred to as @cite{legacy elaboration model}. The legacy elaboration model is enabled with compiler switch
! @code{-gnatH}.
  @end itemize
  
  @geindex Relaxed elaboration mode
--- 28141,28174 ----
  This is the most conservative of the three models and enforces the SPARK
  rules of elaboration as defined in the SPARK Reference Manual, section 7.7.
  The SPARK model is in effect only when a scenario and a target reside in a
! region subject to @code{SPARK_Mode On}, otherwise the dynamic or static model
! is in effect.
! 
! The SPARK model is enabled with compiler switch @code{-gnatd.v}.
  @end itemize
  
! @geindex Legacy elaboration models
  
  
  @itemize *
  
  @item 
! @emph{Legacy elaboration models}
  
  In addition to the three elaboration models outlined above, GNAT provides the
! following legacy models:
! 
! 
! @itemize -
! 
! @item 
! @cite{Legacy elaboration-checking model} available in pre-18.x versions of GNAT.
! This model is enabled with compiler switch @code{-gnatH}.
! 
! @item 
! @cite{Legacy elaboration-order model} available in pre-20.x versions of GNAT.
! This model is enabled with binder switch @code{-H}.
! @end itemize
  @end itemize
  
  @geindex Relaxed elaboration mode
*************** The dynamic, legacy, and static models c
*** 27901,28778 ****
  @code{-gnatJ}, making them more permissive. Note that in this mode, GNAT
  may not diagnose certain elaboration issues or install run-time checks.
  
! @node Common Elaboration-model Traits,Dynamic Elaboration Model in GNAT,Controlling the Elaboration Order in GNAT,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat common-elaboration-model-traits}@anchor{236}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id7}@anchor{237}
! @section Common Elaboration-model Traits
  
  
! All three GNAT models are able to detect elaboration problems related to
! dispatching calls and a particular kind of ABE referred to as @emph{guaranteed ABE}.
  
  
  @itemize *
  
  @item 
! @emph{Dispatching calls}
  
! GNAT installs run-time checks for each primitive subprogram of each tagged
! type defined in a partition on the assumption that a dispatching call
! invoked at elaboration time will execute one of these primitives. As a
! result, a dispatching call that executes a primitive whose body has not
! been elaborated yet will raise exception @code{Program_Error} at run time. The
! checks can be suppressed using pragma @code{Suppress (Elaboration_Check)}.
  
  @item 
! @emph{Guaranteed ABE}
  
! A guaranteed ABE arises when the body of a target is not elaborated early
! enough, and causes all scenarios that directly execute the target to fail.
  
! @example
! package body Guaranteed_ABE is
!    function ABE return Integer;
  
!    Val : constant Integer := ABE;
  
!    function ABE return Integer is
!    begin
!       ...
!    end ABE;
! end Guaranteed_ABE;
! @end example
  
! In the example above, the elaboration of @code{Guaranteed_ABE}'s body elaborates
! the declaration of @code{Val}. This invokes function @code{ABE}, however the body
! of @code{ABE} has not been elaborated yet. GNAT emits similar diagnostics in all
! three models:
  
  @example
! 1. package body Guaranteed_ABE is
! 2.    function ABE return Integer;
! 3.
! 4.    Val : constant Integer := ABE;
!                                 |
!    >>> warning: cannot call "ABE" before body seen
!    >>> warning: Program_Error will be raised at run time
! 
! 5.
! 6.    function ABE return Integer is
! 7.    begin
! 8.       ...
! 9.    end ABE;
! 10. end Guaranteed_ABE;
  @end example
! @end itemize
  
! Note that GNAT emits warnings rather than hard errors whenever it encounters an
! elaboration problem. This is because the elaboration model in effect may be too
! conservative, or a particular scenario may not be elaborated or executed due to
! data and control flow. The warnings can be suppressed selectively with @code{pragma
! Warnigns (Off)} or globally with compiler switch @code{-gnatwL}.
  
! @node Dynamic Elaboration Model in GNAT,Static Elaboration Model in GNAT,Common Elaboration-model Traits,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat dynamic-elaboration-model-in-gnat}@anchor{238}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id8}@anchor{239}
! @section Dynamic Elaboration Model in GNAT
  
  
! The dynamic model assumes that all code within all units in a partition is
! elaboration code. As a result, run-time checks are installed for each scenario
! regardless of whether the target is internal or external. The checks can be
! suppressed using pragma @code{Suppress (Elaboration_Check)}. This behavior is
! identical to that specified by the Ada Reference Manual. The following example
! showcases run-time checks installed by GNAT to verify the elaboration state of
! package @code{Dynamic_Model}.
  
! @example
! with Server;
! package body Dynamic_Model is
!    procedure API is
!    begin
!       ...
!    end API;
  
!    <check that the body of Server.Gen is elaborated>
!    package Inst is new Server.Gen;
  
!    T : Server.Task_Type;
  
! begin
!    <check that the body of Server.Task_Type is elaborated>
  
!    <check that the body of Server.Proc is elaborated>
!    Server.Proc;
! end Dynamic_Model;
! @end example
  
! The checks verify that the body of a target has been successfully elaborated
! before a scenario activates, calls, or instantiates a target.
  
! Note that no scenario within package @code{Dynamic_Model} calls procedure @code{API}.
! In fact, procedure @code{API} may not be invoked by elaboration code within the
! partition, however the dynamic model assumes that this can happen.
  
! The dynamic model emits very few diagnostics, but can make suggestions on
! missing @code{Elaborate} and @code{Elaborate_All} pragmas for library-level
! scenarios. This information is available when compiler switch @code{-gnatel}
! is in effect.
  
  @example
! 1. with Server;
! 2. package body Dynamic_Model is
! 3.    Val : constant Integer := Server.Func;
!                                       |
!    >>> info: call to "Func" during elaboration
!    >>> info: missing pragma "Elaborate_All" for unit "Server"
! 
! 4. end Dynamic_Model;
  @end example
  
! @node Static Elaboration Model in GNAT,SPARK Elaboration Model in GNAT,Dynamic Elaboration Model in GNAT,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat static-elaboration-model-in-gnat}@anchor{23a}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id9}@anchor{23b}
! @section Static Elaboration Model in GNAT
! 
! 
! In contrast to the dynamic model, the static model is more precise in its
! analysis of elaboration code. The model makes a clear distinction between
! internal and external targets, and resorts to different diagnostics and
! run-time checks based on the nature of the target.
! 
! 
! @itemize *
! 
! @item 
! @emph{Internal targets}
  
! The static model performs extensive diagnostics on scenarios which elaborate
! or execute internal targets. The warnings resulting from these diagnostics
! are enabled by default, but can be suppressed selectively with @code{pragma
! Warnings (Off)} or globally with compiler switch @code{-gnatwL}.
  
  @example
!  1. package body Static_Model is
!  2.    generic
!  3.       with function Func return Integer;
!  4.    package Gen is
!  5.       Val : constant Integer := Func;
!  6.    end Gen;
!  7.
!  8.    function ABE return Integer;
   9.
! 10.    function Cause_ABE return Boolean is
! 11.       package Inst is new Gen (ABE);
!           |
!     >>> warning: in instantiation at line 5
!     >>> warning: cannot call "ABE" before body seen
!     >>> warning: Program_Error may be raised at run time
!     >>> warning:   body of unit "Static_Model" elaborated
!     >>> warning:   function "Cause_ABE" called at line 16
!     >>> warning:   function "ABE" called at line 5, instance at line 11
! 
! 12.    begin
! 13.       ...
! 14.    end Cause_ABE;
! 15.
! 16.    Val : constant Boolean := Cause_ABE;
  17.
! 18.    function ABE return Integer is
! 19.    begin
! 20.       ...
! 21.    end ABE;
! 22. end Static_Model;
! @end example
! 
! The example above illustrates an ABE problem within package @code{Static_Model},
! which is hidden by several layers of indirection. The elaboration of package
! body @code{Static_Model} elaborates the declaration of @code{Val}. This invokes
! function @code{Cause_ABE}, which instantiates generic unit @code{Gen} as @code{Inst}.
! The elaboration of @code{Inst} invokes function @code{ABE}, however the body of
! @code{ABE} has not been elaborated yet.
! 
! @item 
! @emph{External targets}
! 
! The static model installs run-time checks to verify the elaboration status
! of server targets only when the scenario that elaborates or executes that
! target is part of the elaboration code of the client unit. The checks can be
! suppressed using pragma @code{Suppress (Elaboration_Check)}.
! 
! @example
! with Server;
! package body Static_Model is
!    generic
!       with function Func return Integer;
!    package Gen is
!       Val : constant Integer := Func;
!    end Gen;
! 
!    function Call_Func return Boolean is
!       <check that the body of Server.Func is elaborated>
!       package Inst is new Gen (Server.Func);
!    begin
!       ...
!    end Call_Func;
! 
!    Val : constant Boolean := Call_Func;
! end Static_Model;
  @end example
  
! In the example above, the elaboration of package body @code{Static_Model}
! elaborates the declaration of @code{Val}. This invokes function @code{Call_Func},
  which instantiates generic unit @code{Gen} as @code{Inst}. The elaboration of
! @code{Inst} invokes function @code{Server.Func}. Since @code{Server.Func} is an
! external target, GNAT installs a run-time check to verify that its body has
! been elaborated.
  
! In addition to checks, the static model installs implicit @code{Elaborate} and
! @code{Elaborate_All} pragmas to guarantee safe elaboration use of server units.
! This information is available when compiler switch @code{-gnatel} is in
! effect.
  
  @example
!  1. with Server;
!  2. package body Static_Model is
!  3.    generic
!  4.       with function Func return Integer;
!  5.    package Gen is
!  6.       Val : constant Integer := Func;
!  7.    end Gen;
!  8.
!  9.    function Call_Func return Boolean is
! 10.       package Inst is new Gen (Server.Func);
            |
!     >>> info: instantiation of "Gen" during elaboration
!     >>> info: in instantiation at line 6
!     >>> info: call to "Func" during elaboration
!     >>> info: in instantiation at line 6
!     >>> info: implicit pragma "Elaborate_All" generated for unit "Server"
!     >>> info:   body of unit "Static_Model" elaborated
!     >>> info:   function "Call_Func" called at line 15
!     >>> info:   function "Func" called at line 6, instance at line 10
! 
! 11.    begin
! 12.       ...
! 13.    end Call_Func;
! 14.
! 15.    Val : constant Boolean := Call_Func;
!                                  |
!     >>> info: call to "Call_Func" during elaboration
! 
! 16. end Static_Model;
  @end example
  
! In the example above, the elaboration of package body @code{Static_Model}
! elaborates the declaration of @code{Val}. This invokes function @code{Call_Func},
! which instantiates generic unit @code{Gen} as @code{Inst}. The elaboration of
! @code{Inst} invokes function @code{Server.Func}. Since @code{Server.Func} is an
! external target, GNAT installs an implicit @code{Elaborate_All} pragma for unit
! @code{Server}. The pragma guarantees that both the spec and body of @code{Server},
! along with any additional dependencies that @code{Server} may require, are
! elaborated prior to the body of @code{Static_Model}.
! @end itemize
  
! @node SPARK Elaboration Model in GNAT,Legacy Elaboration Model in GNAT,Static Elaboration Model in GNAT,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat id10}@anchor{23c}@anchor{gnat_ugn/elaboration_order_handling_in_gnat spark-elaboration-model-in-gnat}@anchor{23d}
! @section SPARK Elaboration Model in GNAT
  
  
! The SPARK model is identical to the static model in its handling of internal
! targets. The SPARK model, however, requires explicit @code{Elaborate} or
! @code{Elaborate_All} pragmas to be present in the program when a target is
! external, and compiler switch @code{-gnatd.v} is in effect.
  
  @example
  1. with Server;
! 2. package body SPARK_Model with SPARK_Mode is
  3.    Val : constant Integer := Server.Func;
                                        |
     >>> call to "Func" during elaboration in SPARK
!    >>> unit "SPARK_Model" requires pragma "Elaborate_All" for "Server"
     >>>   body of unit "SPARK_Model" elaborated
     >>>   function "Func" called at line 3
  
! 4. end SPARK_Model;
  @end example
  
! @node Legacy Elaboration Model in GNAT,Mixing Elaboration Models,SPARK Elaboration Model in GNAT,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat legacy-elaboration-model-in-gnat}@anchor{23e}
! @section Legacy Elaboration Model in GNAT
! 
! 
! The legacy elaboration model is provided for compatibility with code bases
! developed with pre-18.x versions of GNAT. It is similar in functionality to
! the dynamic and static models of post-18.x version of GNAT, but may differ
! in terms of diagnostics and run-time checks. The legacy elaboration model is
! enabled with compiler switch @code{-gnatH}.
! 
! @node Mixing Elaboration Models,Elaboration Circularities,Legacy Elaboration Model in GNAT,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat mixing-elaboration-models}@anchor{23f}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id11}@anchor{240}
! @section Mixing Elaboration Models
! 
! 
! It is possible to mix units compiled with a different elaboration model,
! however the following rules must be observed:
! 
! 
! @itemize *
! 
! @item 
! A client unit compiled with the dynamic model can only @emph{with} a server unit
! that meets at least one of the following criteria:
! 
! 
! @itemize -
! 
! @item 
! The server unit is compiled with the dynamic model.
  
- @item 
- The server unit is a GNAT implementation unit from the Ada, GNAT,
- Interfaces, or System hierarchies.
  
! @item 
! The server unit has pragma @code{Pure} or @code{Preelaborate}.
  
! @item 
! The client unit has an explicit @code{Elaborate_All} pragma for the server
! unit.
! @end itemize
! @end itemize
  
! These rules ensure that elaboration checks are not omitted. If the rules are
! violated, the binder emits a warning:
  
  @example
! warning: "x.ads" has dynamic elaboration checks and with's
! warning:   "y.ads" which has static elaboration checks
  @end example
  
! The warnings can be suppressed by binder switch @code{-ws}.
! 
! @node Elaboration Circularities,Resolving Elaboration Circularities,Mixing Elaboration Models,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat id12}@anchor{241}@anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-circularities}@anchor{242}
! @section Elaboration Circularities
  
  
! If the binder cannot find an acceptable elaboration order, it outputs detailed
! diagnostics describing an @strong{elaboration circularity}.
  
  @example
! package Server is
     function Func return Integer;
! end Server;
  @end example
  
  @example
! with Client;
! package body Server is
     function Func return Integer is
     begin
        ...
     end Func;
! end Server;
  @end example
  
! @example
! with Server;
! package Client is
!    Val : constant Integer := Server.Func;
! end Client;
! @end example
  
! @example
! with Client;
! procedure Main is begin null; end Main;
! @end example
  
  @example
! error: elaboration circularity detected
! info:    "server (body)" must be elaborated before "client (spec)"
! info:       reason: implicit Elaborate_All in unit "client (spec)"
! info:       recompile "client (spec)" with -gnatel for full details
! info:          "server (body)"
! info:             must be elaborated along with its spec:
! info:          "server (spec)"
! info:             which is withed by:
! info:          "client (spec)"
! info:    "client (spec)" must be elaborated before "server (body)"
! info:       reason: with clause
  @end example
  
! In the example above, @code{Client} must be elaborated prior to @code{Main} by virtue
! of a @emph{with} clause. The elaboration of @code{Client} invokes @code{Server.Func}, and
! static model generates an implicit @code{Elaborate_All} pragma for @code{Server}. The
! pragma implies that both the spec and body of @code{Server}, along with any units
! they @emph{with}, must be elaborated prior to @code{Client}. However, @code{Server}'s body
! @emph{with}s @code{Client}, implying that @code{Client} must be elaborated prior to
! @code{Server}. The end result is that @code{Client} must be elaborated prior to
! @code{Client}, and this leads to a circularity.
! 
! @node Resolving Elaboration Circularities,Resolving Task Issues,Elaboration Circularities,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat id13}@anchor{243}@anchor{gnat_ugn/elaboration_order_handling_in_gnat resolving-elaboration-circularities}@anchor{244}
! @section Resolving Elaboration Circularities
! 
! 
! When faced with an elaboration circularity, a programmer has several options
! available.
  
  
  @itemize *
  
  @item 
! @emph{Fix the program}
  
! The most desirable option from the point of view of long-term maintenance
! is to rearrange the program so that the elaboration problems are avoided.
! One useful technique is to place the elaboration code into separate child
! packages. Another is to move some of the initialization code to explicitly
! invoked subprograms, where the program controls the order of initialization
! explicitly. Although this is the most desirable option, it may be impractical
! and involve too much modification, especially in the case of complex legacy
! code.
  
  @item 
! @emph{Switch to more permissive elaboration model}
! 
! If the compilation was performed using the static model, enable the dynamic
! model with compiler switch @code{-gnatE}. GNAT will no longer generate
! implicit @code{Elaborate} and @code{Elaborate_All} pragmas, resulting in a behavior
! identical to that specified by the Ada Reference Manual. The binder will
! generate an executable program that may or may not raise @code{Program_Error},
! and it is the programmer's responsibility to ensure that it does not raise
! @code{Program_Error}.
  
! If the compilation was performed using a post-18.x version of GNAT, consider
! using the legacy elaboration model, in the following order:
  
  
! @itemize -
  
! @item 
! Use the legacy static elaboration model, with compiler switch
! @code{-gnatH}.
  
- @item 
- Use the legacy dynamic elaboration model, with compiler switches
- @code{-gnatH} @code{-gnatE}.
  
! @item 
! Use the relaxed legacy static elaboration model, with compiler switches
! @code{-gnatH} @code{-gnatJ}.
  
! @item 
! Use the relaxed legacy dynamic elaboration model, with compiler switches
! @code{-gnatH} @code{-gnatJ} @code{-gnatE}.
! @end itemize
  
- @item 
- @emph{Suppress all elaboration checks}
  
! The drawback of run-time checks is that they generate overhead at run time,
! both in space and time. If the programmer is absolutely sure that a program
! will not raise an elaboration-related @code{Program_Error}, then using the
! pragma @code{Suppress (Elaboration_Check)} globally (as a configuration pragma)
! will eliminate all run-time checks.
  
  @item 
! @emph{Suppress elaboration checks selectively}
  
! If a scenario cannot possibly lead to an elaboration @code{Program_Error},
! and the binder nevertheless complains about implicit @code{Elaborate} and
! @code{Elaborate_All} pragmas that lead to elaboration circularities, it
! is possible to suppress the generation of implicit @code{Elaborate} and
! @code{Elaborate_All} pragmas, as well as run-time checks. Clearly this can
! be unsafe, and it is the responsibility of the programmer to make sure
! that the resulting program has no elaboration anomalies. Pragma
! @code{Suppress (Elaboration_Check)} can be used with different levels of
! granularity to achieve these effects.
  
  
  @itemize -
  
  @item 
! @emph{Target suppression}
! 
! When the pragma is placed in a declarative part, without a second argument
! naming an entity, it will suppress implicit @code{Elaborate} and
! @code{Elaborate_All} pragma generation, as well as run-time checks, on all
! targets within the region.
  
! @example
! package Range_Suppress is
!    pragma Suppress (Elaboration_Check);
  
!    function Func return Integer;
  
!    generic
!    procedure Gen;
  
!    pragma Unsuppress (Elaboration_Check);
  
!    task type Tsk;
! end Range_Suppress;
  @end example
  
! In the example above, a pair of Suppress/Unsuppress pragmas define a region
! of suppression within package @code{Range_Suppress}. As a result, no implicit
! @code{Elaborate} and @code{Elaborate_All} pragmas, nor any run-time checks, will
! be generated by callers of @code{Func} and instantiators of @code{Gen}. Note that
! task type @code{Tsk} is not within this region.
  
- An alternative to the region-based suppression is to use multiple
- @code{Suppress} pragmas with arguments naming specific entities for which
- elaboration checks should be suppressed:
  
! @example
! package Range_Suppress is
!    function Func return Integer;
!    pragma Suppress (Elaboration_Check, Func);
  
!    generic
!    procedure Gen;
!    pragma Suppress (Elaboration_Check, Gen);
  
!    task type Tsk;
! end Range_Suppress;
! @end example
  
  @item 
! @emph{Scenario suppression}
  
! When the pragma @code{Suppress} is placed in a declarative or statement
! part, without an entity argument, it will suppress implicit @code{Elaborate}
! and @code{Elaborate_All} pragma generation, as well as run-time checks, on
! all scenarios within the region.
  
  @example
! with Server;
! package body Range_Suppress is
!    pragma Suppress (Elaboration_Check);
  
!    function Func return Integer is
!    begin
!       return Server.Func;
!    end Func;
  
!    procedure Gen is
!    begin
!       Server.Proc;
!    end Gen;
  
!    pragma Unsuppress (Elaboration_Check);
  
!    task body Tsk is
!    begin
!       Server.Proc;
!    end Tsk;
! end Range_Suppress;
  @end example
  
! In the example above, a pair of Suppress/Unsuppress pragmas define a region
! of suppression within package body @code{Range_Suppress}. As a result, the
! calls to @code{Server.Func} in @code{Func} and @code{Server.Proc} in @code{Gen} will
! not generate any implicit @code{Elaborate} and @code{Elaborate_All} pragmas or
! run-time checks.
! @end itemize
! @end itemize
  
- @node Resolving Task Issues,Elaboration-related Compiler Switches,Resolving Elaboration Circularities,Elaboration Order Handling in GNAT
- @anchor{gnat_ugn/elaboration_order_handling_in_gnat id14}@anchor{245}@anchor{gnat_ugn/elaboration_order_handling_in_gnat resolving-task-issues}@anchor{246}
- @section Resolving Task Issues
  
  
! The model of execution in Ada dictates that elaboration must first take place,
! and only then can the main program be started. Tasks which are activated during
! elaboration violate this model and may lead to serious concurrent problems at
! elaboration time.
  
! A task can be activated in two different ways:
  
  
! @itemize *
  
  @item 
! The task is created by an allocator in which case it is activated immediately
! after the allocator is evaluated.
  
! @item 
! The task is declared at the library level or within some nested master in
! which case it is activated before starting execution of the statement
! sequence of the master defining the task.
! @end itemize
  
! Since the elaboration of a partition is performed by the environment task
! servicing that partition, any tasks activated during elaboration may be in
! a race with the environment task, and lead to unpredictable state and behavior.
! The static model seeks to avoid such interactions by assuming that all code in
! the task body is executed at elaboration time, if the task was activated by
! elaboration code.
  
- @example
- package Decls is
-    task Lib_Task is
-       entry Start;
-    end Lib_Task;
  
!    type My_Int is new Integer;
  
!    function Ident (M : My_Int) return My_Int;
! end Decls;
! @end example
  
! @example
! with Utils;
! package body Decls is
!    task body Lib_Task is
!    begin
!       accept Start;
!       Utils.Put_Val (2);
!    end Lib_Task;
  
!    function Ident (M : My_Int) return My_Int is
!    begin
!       return M;
!    end Ident;
! end Decls;
! @end example
  
! @example
! with Decls;
! package Utils is
!    procedure Put_Val (Arg : Decls.My_Int);
! end Utils;
! @end example
  
  @example
! with Ada.Text_IO; use Ada.Text_IO;
! package body Utils is
!    procedure Put_Val (Arg : Decls.My_Int) is
!    begin
!       Put_Line (Arg'Img);
!    end Put_Val;
! end Utils;
  @end example
  
! @example
! with Decls;
! procedure Main is
! begin
!    Decls.Lib_Task.Start;
! end Main;
! @end example
  
- When the above example is compiled with the static model, an elaboration
- circularity arises:
  
! @example
! error: elaboration circularity detected
! info:    "decls (body)" must be elaborated before "decls (body)"
! info:       reason: implicit Elaborate_All in unit "decls (body)"
! info:       recompile "decls (body)" with -gnatel for full details
! info:          "decls (body)"
! info:             must be elaborated along with its spec:
! info:          "decls (spec)"
! info:             which is withed by:
! info:          "utils (spec)"
! info:             which is withed by:
! info:          "decls (body)"
! @end example
  
! In the above example, @code{Decls} must be elaborated prior to @code{Main} by virtue
! of a with clause. The elaboration of @code{Decls} activates task @code{Lib_Task}. The
! static model conservatibely assumes that all code within the body of
! @code{Lib_Task} is executed, and generates an implicit @code{Elaborate_All} pragma
! for @code{Units} due to the call to @code{Utils.Put_Val}. The pragma implies that
! both the spec and body of @code{Utils}, along with any units they @emph{with},
! must be elaborated prior to @code{Decls}. However, @code{Utils}'s spec @emph{with}s
! @code{Decls}, implying that @code{Decls} must be elaborated before @code{Utils}. The end
! result is that @code{Utils} must be elaborated prior to @code{Utils}, and this
! leads to a circularity.
  
! In reality, the example above will not exhibit an ABE problem at run time.
! When the body of task @code{Lib_Task} is activated, execution will wait for entry
! @code{Start} to be accepted, and the call to @code{Utils.Put_Val} will not take place
! at elaboration time. Task @code{Lib_Task} will resume its execution after the main
! program is executed because @code{Main} performs a rendezvous with
! @code{Lib_Task.Start}, and at that point all units have already been elaborated.
! As a result, the static model may seem overly conservative, partly because it
! does not take control and data flow into account.
  
! When faced with a task elaboration circularity, a programmer has several
! options available:
  
  
! @itemize *
  
  @item 
! @emph{Use the dynamic model}
! 
! The dynamic model does not generate implicit @code{Elaborate} and
! @code{Elaborate_All} pragmas. Instead, it will install checks prior to every
! call in the example above, thus verifying the successful elaboration of
! @code{Utils.Put_Val} in case the call to it takes place at elaboration time.
! The dynamic model is enabled with compiler switch @code{-gnatE}.
  
  @item 
! @emph{Isolate the tasks}
  
! Relocating tasks in their own separate package could decouple them from
! dependencies that would otherwise cause an elaboration circularity. The
! example above can be rewritten as follows:
  
  @example
! package Decls1 is                --  new
!    task Lib_Task is
!       entry Start;
!    end Lib_Task;
! end Decls1;
  @end example
  
! @example
! with Utils;
! package body Decls1 is           --  new
!    task body Lib_Task is
!    begin
!       accept Start;
!       Utils.Put_Val (2);
!    end Lib_Task;
! end Decls1;
! @end example
  
! @example
! package Decls2 is                --  new
!    type My_Int is new Integer;
!    function Ident (M : My_Int) return My_Int;
! end Decls2;
! @end example
  
! @example
! with Utils;
! package body Decls2 is           --  new
!    function Ident (M : My_Int) return My_Int is
!    begin
!       return M;
!    end Ident;
! end Decls2;
! @end example
  
  @example
! with Decls2;
! package Utils is
!    procedure Put_Val (Arg : Decls2.My_Int);
! end Utils;
  @end example
  
! @example
! with Ada.Text_IO; use Ada.Text_IO;
! package body Utils is
!    procedure Put_Val (Arg : Decls2.My_Int) is
!    begin
!       Put_Line (Arg'Img);
!    end Put_Val;
! end Utils;
! @end example
  
! @example
! with Decls1;
! procedure Main is
! begin
!    Decls1.Lib_Task.Start;
! end Main;
! @end example
  
  @item 
! @emph{Declare the tasks}
  
! The original example uses a single task declaration for @code{Lib_Task}. An
! explicit task type declaration and a properly placed task object could avoid
! the dependencies that would otherwise cause an elaboration circularity. The
! example can be rewritten as follows:
  
! @example
! package Decls is
!    task type Lib_Task is         --  new
!       entry Start;
!    end Lib_Task;
  
!    type My_Int is new Integer;
  
!    function Ident (M : My_Int) return My_Int;
! end Decls;
  @end example
  
! @example
! with Utils;
! package body Decls is
!    task body Lib_Task is
!    begin
!       accept Start;
!       Utils.Put_Val (2);
!    end Lib_Task;
  
!    function Ident (M : My_Int) return My_Int is
!    begin
!       return M;
!    end Ident;
! end Decls;
! @end example
  
! @example
! with Decls;
! package Utils is
!    procedure Put_Val (Arg : Decls.My_Int);
! end Utils;
! @end example
  
  @example
! with Ada.Text_IO; use Ada.Text_IO;
! package body Utils is
!    procedure Put_Val (Arg : Decls.My_Int) is
!    begin
!       Put_Line (Arg'Img);
!    end Put_Val;
! end Utils;
  @end example
  
! @example
! with Decls;
! package Obj_Decls is             --  new
!    Task_Obj : Decls.Lib_Task;
! end Obj_Decls;
! @end example
  
! @example
! with Obj_Decls;
! procedure Main is
! begin
!    Obj_Decls.Task_Obj.Start;     --  new
! end Main;
! @end example
  
! @item 
! @emph{Use restriction No_Entry_Calls_In_Elaboration_Code}
  
- The issue exhibited in the original example under this section revolves
- around the body of @code{Lib_Task} blocking on an accept statement. There is
- no rule to prevent elaboration code from performing entry calls, however in
- practice this is highly unusual. In addition, the pattern of starting tasks
- at elaboration time and then immediately blocking on accept or select
- statements is quite common.
  
! If a programmer knows that elaboration code will not perform any entry
! calls, then the programmer can indicate that the static model should not
! process the remainder of a task body once an accept or select statement has
! been encountered. This behavior can be specified by a configuration pragma:
  
! @example
! pragma Restrictions (No_Entry_Calls_In_Elaboration_Code);
! @end example
  
! In addition to the change in behavior with respect to task bodies, the
! static model will verify that no entry calls take place at elaboration time.
  @end itemize
  
! @node Elaboration-related Compiler Switches,Summary of Procedures for Elaboration Control,Resolving Task Issues,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-related-compiler-switches}@anchor{247}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id15}@anchor{248}
  @section Elaboration-related Compiler Switches
  
  
--- 28177,28735 ----
  @code{-gnatJ}, making them more permissive. Note that in this mode, GNAT
  may not diagnose certain elaboration issues or install run-time checks.
  
! @node Mixing Elaboration Models,ABE Diagnostics,Controlling the Elaboration Order in GNAT,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat mixing-elaboration-models}@anchor{237}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id7}@anchor{238}
! @section Mixing Elaboration Models
  
  
! It is possible to mix units compiled with a different elaboration model,
! however the following rules must be observed:
  
  
  @itemize *
  
  @item 
! A client unit compiled with the dynamic model can only @emph{with} a server unit
! that meets at least one of the following criteria:
  
! 
! @itemize -
  
  @item 
! The server unit is compiled with the dynamic model.
  
! @item 
! The server unit is a GNAT implementation unit from the @code{Ada}, @code{GNAT},
! @code{Interfaces}, or @code{System} hierarchies.
  
! @item 
! The server unit has pragma @code{Pure} or @code{Preelaborate}.
  
! @item 
! The client unit has an explicit @code{Elaborate_All} pragma for the server
! unit.
! @end itemize
! @end itemize
  
! These rules ensure that elaboration checks are not omitted. If the rules are
! violated, the binder emits a warning:
  
! @quotation
  
  @example
! warning: "x.ads" has dynamic elaboration checks and with's
! warning:   "y.ads" which has static elaboration checks
  @end example
! @end quotation
  
! The warnings can be suppressed by binder switch @code{-ws}.
  
! @node ABE Diagnostics,SPARK Diagnostics,Mixing Elaboration Models,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat abe-diagnostics}@anchor{239}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id8}@anchor{23a}
! @section ABE Diagnostics
  
  
! GNAT performs extensive diagnostics on a unit-by-unit basis for all scenarios
! that invoke internal targets, regardless of whether the dynamic, SPARK, or
! static model is in effect.
  
! Note that GNAT emits warnings rather than hard errors whenever it encounters an
! elaboration problem. This is because the elaboration model in effect may be too
! conservative, or a particular scenario may not be invoked due conditional
! execution. The warnings can be suppressed selectively with @code{pragma Warnings
! (Off)} or globally with compiler switch @code{-gnatwL}.
  
! A @emph{guaranteed ABE} arises when the body of a target is not elaborated early
! enough, and causes @emph{all} scenarios that directly invoke the target to fail.
  
! @quotation
  
! @example
! package body Guaranteed_ABE is
!    function ABE return Integer;
  
!    Val : constant Integer := ABE;
  
!    function ABE return Integer is
!    begin
!      ...
!    end ABE;
! end Guaranteed_ABE;
! @end example
! @end quotation
  
! In the example above, the elaboration of @code{Guaranteed_ABE}'s body elaborates
! the declaration of @code{Val}. This invokes function @code{ABE}, however the body of
! @code{ABE} has not been elaborated yet. GNAT emits the following diagnostic:
  
! @quotation
  
  @example
! 4.    Val : constant Integer := ABE;
!                                 |
!    >>> warning: cannot call "ABE" before body seen
!    >>> warning: Program_Error will be raised at run time
  @end example
+ @end quotation
  
! A @emph{conditional ABE} arises when the body of a target is not elaborated early
! enough, and causes @emph{some} scenarios that directly invoke the target to fail.
  
! @quotation
  
  @example
!  1. package body Conditional_ABE is
!  2.    procedure Force_Body is null;
!  3.
!  4.    generic
!  5.       with function Func return Integer;
!  6.    package Gen is
!  7.       Val : constant Integer := Func;
!  8.    end Gen;
   9.
! 10.    function ABE return Integer;
! 11.
! 12.    function Cause_ABE return Boolean is
! 13.       package Inst is new Gen (ABE);
! 14.    begin
! 15.       ...
! 16.    end Cause_ABE;
  17.
! 18.    Val : constant Boolean := Cause_ABE;
! 19.
! 20.    function ABE return Integer is
! 21.    begin
! 22.       ...
! 23.    end ABE;
! 24.
! 25.    Safe : constant Boolean := Cause_ABE;
! 26. end Conditional_ABE;
  @end example
+ @end quotation
  
! In the example above, the elaboration of package body @code{Conditional_ABE}
! elaborates the declaration of @code{Val}. This invokes function @code{Cause_ABE},
  which instantiates generic unit @code{Gen} as @code{Inst}. The elaboration of
! @code{Inst} invokes function @code{ABE}, however the body of @code{ABE} has not been
! elaborated yet. GNAT emits the following diagnostic:
  
! @quotation
  
  @example
! 13.       package Inst is new Gen (ABE);
            |
!     >>> warning: in instantiation at line 7
!     >>> warning: cannot call "ABE" before body seen
!     >>> warning: Program_Error may be raised at run time
!     >>> warning:   body of unit "Conditional_ABE" elaborated
!     >>> warning:   function "Cause_ABE" called at line 18
!     >>> warning:   function "ABE" called at line 7, instance at line 13
  @end example
+ @end quotation
  
! Note that the same ABE problem does not occur with the elaboration of
! declaration @code{Safe} because the body of function @code{ABE} has already been
! elaborated at that point.
  
! @node SPARK Diagnostics,Elaboration Circularities,ABE Diagnostics,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat spark-diagnostics}@anchor{23b}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id9}@anchor{23c}
! @section SPARK Diagnostics
  
  
! GNAT enforces the SPARK rules of elaboration as defined in the SPARK Reference
! Manual section 7.7 when compiler switch @code{-gnatd.v} is in effect. Note
! that GNAT emits hard errors whenever it encounters a violation of the SPARK
! rules.
! 
! @quotation
  
  @example
  1. with Server;
! 2. package body SPARK_Diagnostics with SPARK_Mode is
  3.    Val : constant Integer := Server.Func;
                                        |
     >>> call to "Func" during elaboration in SPARK
!    >>> unit "SPARK_Diagnostics" requires pragma "Elaborate_All" for "Server"
     >>>   body of unit "SPARK_Model" elaborated
     >>>   function "Func" called at line 3
  
! 4. end SPARK_Diagnostics;
  @end example
+ @end quotation
  
! @node Elaboration Circularities,Resolving Elaboration Circularities,SPARK Diagnostics,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat id10}@anchor{23d}@anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-circularities}@anchor{23e}
! @section Elaboration Circularities
  
  
! An @strong{elaboration circularity} occurs whenever the elaboration of a set of
! units enters a deadlocked state, where each unit is waiting for another unit
! to be elaborated. This situation may be the result of improper use of @emph{with}
! clauses, elaboration-control pragmas, or invocations in elaboration code.
  
! The following example exhibits an elaboration circularity.
  
! @quotation
  
  @example
! with B; pragma Elaborate (B);
! package A is
! end A;
  @end example
  
! @example
! package B is
!    procedure Force_Body;
! end B;
! @end example
  
+ @example
+ with C;
+ package body B is
+    procedure Force_Body is null;
  
!    Elab : constant Integer := C.Func;
! end B;
! @end example
  
  @example
! package C is
     function Func return Integer;
! end C;
  @end example
  
  @example
! with A;
! package body C is
     function Func return Integer is
     begin
        ...
     end Func;
! end C;
  @end example
+ @end quotation
  
! The binder emits the following diagnostic:
  
! @quotation
  
  @example
! error: Elaboration circularity detected
! info:
! info:    Reason:
! info:
! info:      unit "a (spec)" depends on its own elaboration
! info:
! info:    Circularity:
! info:
! info:      unit "a (spec)" has with clause and pragma Elaborate for unit "b (spec)"
! info:      unit "b (body)" is in the closure of pragma Elaborate
! info:      unit "b (body)" invokes a construct of unit "c (body)" at elaboration time
! info:      unit "c (body)" has with clause for unit "a (spec)"
! info:
! info:    Suggestions:
! info:
! info:      remove pragma Elaborate for unit "b (body)" in unit "a (spec)"
! info:      use the dynamic elaboration model (compiler switch -gnatE)
  @end example
+ @end quotation
  
! The diagnostic consist of the following sections:
  
  
  @itemize *
  
  @item 
! Reason
  
! This section provides a short explanation describing why the set of units
! could not be ordered.
  
  @item 
! Circularity
  
! This section enumerates the units comprising the deadlocked set, along with
! their interdependencies.
  
+ @item 
+ Suggestions
  
! This section enumerates various tactics for eliminating the circularity.
! @end itemize
  
! @node Resolving Elaboration Circularities,Elaboration-related Compiler Switches,Elaboration Circularities,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat id11}@anchor{23f}@anchor{gnat_ugn/elaboration_order_handling_in_gnat resolving-elaboration-circularities}@anchor{240}
! @section Resolving Elaboration Circularities
  
  
! The most desirable option from the point of view of long-term maintenance is to
! rearrange the program so that the elaboration problems are avoided. One useful
! technique is to place the elaboration code into separate child packages.
! Another is to move some of the initialization code to explicitly invoked
! subprograms, where the program controls the order of initialization explicitly.
! Although this is the most desirable option, it may be impractical and involve
! too much modification, especially in the case of complex legacy code.
  
! When faced with an elaboration circularity, the programmer should also consider
! the tactics given in the suggestions section of the circularity diagnostic.
! Depending on the units involved in the circularity, their @emph{with} clauses,
! purity, preelaborability, presence of elaboration-control pragmas and
! invocations at elaboration time, the binder may suggest one or more of the
! following tactics to eliminate the circularity:
  
  
! @itemize *
  
  @item 
! Pragma Elaborate elimination
  
! @example
! remove pragma Elaborate for unit "..." in unit "..."
! @end example
! 
! This tactic is suggested when the binder has determined that pragma
! @code{Elaborate}:
  
  
  @itemize -
  
  @item 
! Prevents a set of units from being elaborated.
  
! @item 
! The removal of the pragma will not eliminate the semantic effects of the
! pragma. In other words, the argument of the pragma will still be elaborated
! prior to the unit containing the pragma.
  
! @item 
! The removal of the pragma will enable the successful ordering of the units.
! @end itemize
  
! The programmer should remove the pragma as advised, and rebuild the program.
  
! @item 
! Pragma Elaborate_All elimination
  
! @example
! remove pragma Elaborate_All for unit "..." in unit "..."
  @end example
  
! This tactic is suggested when the binder has determined that pragma
! @code{Elaborate_All}:
  
  
! @itemize -
  
! @item 
! Prevents a set of units from being elaborated.
  
! @item 
! The removal of the pragma will not eliminate the semantic effects of the
! pragma. In other words, the argument of the pragma along with its @emph{with}
! closure will still be elaborated prior to the unit containing the pragma.
  
  @item 
! The removal of the pragma will enable the successful ordering of the units.
! @end itemize
  
! The programmer should remove the pragma as advised, and rebuild the program.
! 
! @item 
! Pragma Elaborate_All downgrade
  
  @example
! change pragma Elaborate_All for unit "..." to Elaborate in unit "..."
! @end example
  
! This tactic is always suggested with the pragma @code{Elaborate_All} elimination
! tactic. It offers a different alernative of guaranteeing that the argument of
! the pragma will still be elaborated prior to the unit containing the pragma.
  
! The programmer should update the pragma as advised, and rebuild the program.
  
! @item 
! Pragma Elaborate_Body elimination
  
! @example
! remove pragma Elaborate_Body in unit "..."
  @end example
  
! This tactic is suggested when the binder has determined that pragma
! @code{Elaborate_Body}:
  
  
+ @itemize -
  
! @item 
! Prevents a set of units from being elaborated.
  
! @item 
! The removal of the pragma will enable the successful ordering of the units.
! @end itemize
  
+ Note that the binder cannot determine whether the pragma is required for
+ other purposes, such as guaranteeing the initialization of a variable
+ declared in the spec by elaboration code in the body.
  
! The programmer should remove the pragma as advised, and rebuild the program.
  
  @item 
! Use of pragma Restrictions
  
! @example
! use pragma Restrictions (No_Entry_Calls_In_Elaboration_Code)
! @end example
  
! This tactic is suggested when the binder has determined that a task
! activation at elaboration time:
  
  
! @itemize -
  
! @item 
! Prevents a set of units from being elaborated.
! @end itemize
  
! Note that the binder cannot determine with certainty whether the task will
! block at elaboration time.
  
! The programmer should create a configuration file, place the pragma within,
! update the general compilation arguments, and rebuild the program.
  
! @item 
! Use of dynamic elaboration model
  
  @example
! use the dynamic elaboration model (compiler switch -gnatE)
  @end example
  
! This tactic is suggested when the binder has determined that an invocation at
! elaboration time:
  
  
! @itemize -
  
! @item 
! Prevents a set of units from being elaborated.
  
! @item 
! The use of the dynamic model will enable the successful ordering of the
! units.
! @end itemize
  
! The programmer has two options:
  
  
! @itemize -
  
  @item 
! Determine the units involved in the invocation using the detailed
! invocation information, and add compiler switch @code{-gnatE} to the
! compilation arguments of selected files only. This approach will yield
! safer elaboration orders compared to the other option because it will
! minimize the opportunities presented to the dynamic model for ignoring
! invocations.
  
  @item 
! Add compiler switch @code{-gnatE} to the general compilation arguments.
! @end itemize
  
! @item 
! Use of detailed invocation information
  
  @example
! use detailed invocation information (compiler switch -gnatd_F)
  @end example
  
! This tactic is always suggested with the use of the dynamic model tactic. It
! causes the circularity section of the circularity diagnostic to describe the
! flow of elaboration code from a unit to a unit, enumerating all such paths in
! the process.
  
! The programmer should analyze this information to determine which units
! should be compiled with the dynamic model.
  
! @item 
! Forced-dependency elimination
  
  @example
! remove the dependency of unit "..." on unit "..." from the argument of switch -f
  @end example
  
! This tactic is suggested when the binder has determined that a dependency
! present in the forced-elaboration-order file indicated by binder switch
! @code{-f}:
  
! 
! @itemize -
  
  @item 
! Prevents a set of units from being elaborated.
  
! @item 
! The removal of the dependency will enable the successful ordering of the
! units.
! @end itemize
  
! The programmer should edit the forced-elaboration-order file, remove the
! dependency, and rebind the program.
  
! @item 
! All forced-dependency elimination
  
! @example
! remove switch -f
  @end example
  
! This tactic is suggested in case editing the forced-elaboration-order file is
! not an option.
  
! The programmer should remove binder switch @code{-f} from the binder
! arguments, and rebind.
  
! @item 
! Multiple-circularities diagnostic
  
  @example
! diagnose all circularities (binder switch -d_C)
  @end example
  
! By default, the binder will diagnose only the highest-precedence circularity.
! If the program contains multiple circularities, the binder will suggest the
! use of binder switch @code{-d_C} in order to obtain the diagnostics of all
! circularities.
  
! The programmer should add binder switch @code{-d_C} to the binder
! arguments, and rebind.
! @end itemize
  
! If none of the tactics suggested by the binder eliminate the elaboration
! circularity, the programmer should consider using one of the legacy elaboration
! models, in the following order:
  
  
! @itemize *
  
! @item 
! Use the pre-20.x legacy elaboration-order model, with binder switch
! @code{-H}.
  
! @item 
! Use both pre-18.x and pre-20.x legacy elaboration models, with compiler
! switch @code{-gnatH} and binder switch @code{-H}.
! 
! @item 
! Use the relaxed static-elaboration model, with compiler switches
! @code{-gnatH} @code{-gnatJ} and binder switch @code{-H}.
! 
! @item 
! Use the relaxed dynamic-elaboration model, with compiler switches
! @code{-gnatH} @code{-gnatJ} @code{-gnatE} and binder switch
! @code{-H}.
  @end itemize
  
! @node Elaboration-related Compiler Switches,Summary of Procedures for Elaboration Control,Resolving Elaboration Circularities,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat id12}@anchor{241}@anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-related-compiler-switches}@anchor{242}
  @section Elaboration-related Compiler Switches
  
  
*************** the elaboration order chosen by the bind
*** 28788,28794 ****
  
  Dynamic elaboration checking mode enabled
  
! When this switch is in effect, GNAT activates the dynamic elaboration model.
  @end table
  
  @geindex -gnatel (gnat)
--- 28745,28751 ----
  
  Dynamic elaboration checking mode enabled
  
! When this switch is in effect, GNAT activates the dynamic model.
  @end table
  
  @geindex -gnatel (gnat)
*************** When this switch is in effect, GNAT acti
*** 28800,28805 ****
--- 28757,28766 ----
  
  Turn on info messages on generated Elaborate[_All] pragmas
  
+ This switch is only applicable to the pre-20.x legacy elaboration models.
+ The post-20.x elaboration model no longer relies on implicitly generated
+ @code{Elaborate} and @code{Elaborate_All} pragmas to order units.
+ 
  When this switch is in effect, GNAT will emit the following supplementary
  information depending on the elaboration model in effect.
  
*************** all library-level scenarios within the p
*** 28815,28821 ****
  @item 
  @emph{Static model}
  
! GNAT will indicate all scenarios executed during elaboration. In addition,
  it will provide detailed traceback when an implicit @code{Elaborate} or
  @code{Elaborate_All} pragma is generated.
  
--- 28776,28782 ----
  @item 
  @emph{Static model}
  
! GNAT will indicate all scenarios invoked during elaboration. In addition,
  it will provide detailed traceback when an implicit @code{Elaborate} or
  @code{Elaborate_All} pragma is generated.
  
*************** checks. The example above will still fai
*** 28949,28955 ****
  @end table
  
  @node Summary of Procedures for Elaboration Control,Inspecting the Chosen Elaboration Order,Elaboration-related Compiler Switches,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat summary-of-procedures-for-elaboration-control}@anchor{249}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id16}@anchor{24a}
  @section Summary of Procedures for Elaboration Control
  
  
--- 28910,28916 ----
  @end table
  
  @node Summary of Procedures for Elaboration Control,Inspecting the Chosen Elaboration Order,Elaboration-related Compiler Switches,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat id13}@anchor{243}@anchor{gnat_ugn/elaboration_order_handling_in_gnat summary-of-procedures-for-elaboration-control}@anchor{244}
  @section Summary of Procedures for Elaboration Control
  
  
*************** as their origins. Elaboration warnings a
*** 28977,28989 ****
  @code{-gnatwl}.
  
  @item 
! Use switch @code{-gnatel} to obtain messages on generated implicit
! @code{Elaborate} and @code{Elaborate_All} pragmas. The trace information could
! indicate why a server unit must be elaborated prior to a client unit.
! 
! @item 
! If the warnings produced by the static model indicate that a task is
! involved, consider the options in section @ref{245,,Resolving Task Issues}.
  
  @item 
  If none of the steps outlined above resolve the circularity, use a more
--- 28938,28945 ----
  @code{-gnatwl}.
  
  @item 
! Cosider the tactics given in the suggestions section of the circularity
! diagnostic.
  
  @item 
  If none of the steps outlined above resolve the circularity, use a more
*************** permissive elaboration model, in the fol
*** 28993,29020 ****
  @itemize -
  
  @item 
! Use the dynamic elaboration model, with compiler switch @code{-gnatE}.
! 
! @item 
! Use the legacy static elaboration model, with compiler switch
! @code{-gnatH}.
  
  @item 
! Use the legacy dynamic elaboration model, with compiler switches
! @code{-gnatH} @code{-gnatE}.
  
  @item 
! Use the relaxed legacy static elaboration model, with compiler switches
! @code{-gnatH} @code{-gnatJ}.
  
  @item 
! Use the relaxed legacy dynamic elaboration model, with compiler switches
! @code{-gnatH} @code{-gnatJ} @code{-gnatE}.
  @end itemize
  @end itemize
  
  @node Inspecting the Chosen Elaboration Order,,Summary of Procedures for Elaboration Control,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat inspecting-the-chosen-elaboration-order}@anchor{24b}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id17}@anchor{24c}
  @section Inspecting the Chosen Elaboration Order
  
  
--- 28949,28974 ----
  @itemize -
  
  @item 
! Use the pre-20.x legacy elaboration-order model, with binder switch
! @code{-H}.
  
  @item 
! Use both pre-18.x and pre-20.x legacy elaboration models, with compiler
! switch @code{-gnatH} and binder switch @code{-H}.
  
  @item 
! Use the relaxed static elaboration model, with compiler switches
! @code{-gnatH} @code{-gnatJ} and binder switch @code{-H}.
  
  @item 
! Use the relaxed dynamic elaboration model, with compiler switches
! @code{-gnatH} @code{-gnatJ} @code{-gnatE} and binder switch
! @code{-H}.
  @end itemize
  @end itemize
  
  @node Inspecting the Chosen Elaboration Order,,Summary of Procedures for Elaboration Control,Elaboration Order Handling in GNAT
! @anchor{gnat_ugn/elaboration_order_handling_in_gnat id14}@anchor{245}@anchor{gnat_ugn/elaboration_order_handling_in_gnat inspecting-the-chosen-elaboration-order}@anchor{246}
  @section Inspecting the Chosen Elaboration Order
  
  
*************** elaboration order appears as a sequence
*** 29024,29029 ****
--- 28978,28985 ----
  @code{Elab_Spec}, interspersed with assignments to @cite{Exxx} which indicates that a
  particular unit is elaborated. For example:
  
+ @quotation
+ 
  @example
  System.Soft_Links'Elab_Body;
  E14 := True;
*************** Ada.Text_Io'Elab_Spec;
*** 29059,29068 ****
--- 29015,29027 ----
  Ada.Text_Io'Elab_Body;
  E07 := True;
  @end example
+ @end quotation
  
  Note also binder switch @code{-l}, which outputs the chosen elaboration
  order and provides a more readable form of the above:
  
+ @quotation
+ 
  @example
  ada (spec)
  interfaces (spec)
*************** ada.text_io (body)
*** 29149,29157 ****
  text_io (spec)
  gdbstr (body)
  @end example
  
  @node Inline Assembler,GNU Free Documentation License,Elaboration Order Handling in GNAT,Top
! @anchor{gnat_ugn/inline_assembler inline-assembler}@anchor{10}@anchor{gnat_ugn/inline_assembler doc}@anchor{24d}@anchor{gnat_ugn/inline_assembler id1}@anchor{24e}
  @chapter Inline Assembler
  
  
--- 29108,29117 ----
  text_io (spec)
  gdbstr (body)
  @end example
+ @end quotation
  
  @node Inline Assembler,GNU Free Documentation License,Elaboration Order Handling in GNAT,Top
! @anchor{gnat_ugn/inline_assembler inline-assembler}@anchor{10}@anchor{gnat_ugn/inline_assembler doc}@anchor{247}@anchor{gnat_ugn/inline_assembler id1}@anchor{248}
  @chapter Inline Assembler
  
  
*************** and with assembly language programming.
*** 29210,29216 ****
  @end menu
  
  @node Basic Assembler Syntax,A Simple Example of Inline Assembler,,Inline Assembler
! @anchor{gnat_ugn/inline_assembler id2}@anchor{24f}@anchor{gnat_ugn/inline_assembler basic-assembler-syntax}@anchor{250}
  @section Basic Assembler Syntax
  
  
--- 29170,29176 ----
  @end menu
  
  @node Basic Assembler Syntax,A Simple Example of Inline Assembler,,Inline Assembler
! @anchor{gnat_ugn/inline_assembler id2}@anchor{249}@anchor{gnat_ugn/inline_assembler basic-assembler-syntax}@anchor{24a}
  @section Basic Assembler Syntax
  
  
*************** Intel: Destination first; for example @c
*** 29326,29332 ****
  
  
  @node A Simple Example of Inline Assembler,Output Variables in Inline Assembler,Basic Assembler Syntax,Inline Assembler
! @anchor{gnat_ugn/inline_assembler a-simple-example-of-inline-assembler}@anchor{251}@anchor{gnat_ugn/inline_assembler id3}@anchor{252}
  @section A Simple Example of Inline Assembler
  
  
--- 29286,29292 ----
  
  
  @node A Simple Example of Inline Assembler,Output Variables in Inline Assembler,Basic Assembler Syntax,Inline Assembler
! @anchor{gnat_ugn/inline_assembler a-simple-example-of-inline-assembler}@anchor{24b}@anchor{gnat_ugn/inline_assembler id3}@anchor{24c}
  @section A Simple Example of Inline Assembler
  
  
*************** If there are no errors, @code{as} will g
*** 29475,29481 ****
  @code{nothing.out}.
  
  @node Output Variables in Inline Assembler,Input Variables in Inline Assembler,A Simple Example of Inline Assembler,Inline Assembler
! @anchor{gnat_ugn/inline_assembler id4}@anchor{253}@anchor{gnat_ugn/inline_assembler output-variables-in-inline-assembler}@anchor{254}
  @section Output Variables in Inline Assembler
  
  
--- 29435,29441 ----
  @code{nothing.out}.
  
  @node Output Variables in Inline Assembler,Input Variables in Inline Assembler,A Simple Example of Inline Assembler,Inline Assembler
! @anchor{gnat_ugn/inline_assembler id4}@anchor{24d}@anchor{gnat_ugn/inline_assembler output-variables-in-inline-assembler}@anchor{24e}
  @section Output Variables in Inline Assembler
  
  
*************** end Get_Flags_3;
*** 29842,29848 ****
  @end quotation
  
  @node Input Variables in Inline Assembler,Inlining Inline Assembler Code,Output Variables in Inline Assembler,Inline Assembler
! @anchor{gnat_ugn/inline_assembler id5}@anchor{255}@anchor{gnat_ugn/inline_assembler input-variables-in-inline-assembler}@anchor{256}
  @section Input Variables in Inline Assembler
  
  
--- 29802,29808 ----
  @end quotation
  
  @node Input Variables in Inline Assembler,Inlining Inline Assembler Code,Output Variables in Inline Assembler,Inline Assembler
! @anchor{gnat_ugn/inline_assembler id5}@anchor{24f}@anchor{gnat_ugn/inline_assembler input-variables-in-inline-assembler}@anchor{250}
  @section Input Variables in Inline Assembler
  
  
*************** _increment__incr.1:
*** 29931,29937 ****
  @end quotation
  
  @node Inlining Inline Assembler Code,Other Asm Functionality,Input Variables in Inline Assembler,Inline Assembler
! @anchor{gnat_ugn/inline_assembler id6}@anchor{257}@anchor{gnat_ugn/inline_assembler inlining-inline-assembler-code}@anchor{258}
  @section Inlining Inline Assembler Code
  
  
--- 29891,29897 ----
  @end quotation
  
  @node Inlining Inline Assembler Code,Other Asm Functionality,Input Variables in Inline Assembler,Inline Assembler
! @anchor{gnat_ugn/inline_assembler id6}@anchor{251}@anchor{gnat_ugn/inline_assembler inlining-inline-assembler-code}@anchor{252}
  @section Inlining Inline Assembler Code
  
  
*************** movl %esi,%eax
*** 30002,30008 ****
  thus saving the overhead of stack frame setup and an out-of-line call.
  
  @node Other Asm Functionality,,Inlining Inline Assembler Code,Inline Assembler
! @anchor{gnat_ugn/inline_assembler other-asm-functionality}@anchor{259}@anchor{gnat_ugn/inline_assembler id7}@anchor{25a}
  @section Other @code{Asm} Functionality
  
  
--- 29962,29968 ----
  thus saving the overhead of stack frame setup and an out-of-line call.
  
  @node Other Asm Functionality,,Inlining Inline Assembler Code,Inline Assembler
! @anchor{gnat_ugn/inline_assembler other-asm-functionality}@anchor{253}@anchor{gnat_ugn/inline_assembler id7}@anchor{254}
  @section Other @code{Asm} Functionality
  
  
*************** and @code{Volatile}, which inhibits unwa
*** 30017,30023 ****
  @end menu
  
  @node The Clobber Parameter,The Volatile Parameter,,Other Asm Functionality
! @anchor{gnat_ugn/inline_assembler the-clobber-parameter}@anchor{25b}@anchor{gnat_ugn/inline_assembler id8}@anchor{25c}
  @subsection The @code{Clobber} Parameter
  
  
--- 29977,29983 ----
  @end menu
  
  @node The Clobber Parameter,The Volatile Parameter,,Other Asm Functionality
! @anchor{gnat_ugn/inline_assembler the-clobber-parameter}@anchor{255}@anchor{gnat_ugn/inline_assembler id8}@anchor{256}
  @subsection The @code{Clobber} Parameter
  
  
*************** Use 'register' name @code{memory} if you
*** 30081,30087 ****
  @end itemize
  
  @node The Volatile Parameter,,The Clobber Parameter,Other Asm Functionality
! @anchor{gnat_ugn/inline_assembler the-volatile-parameter}@anchor{25d}@anchor{gnat_ugn/inline_assembler id9}@anchor{25e}
  @subsection The @code{Volatile} Parameter
  
  
--- 30041,30047 ----
  @end itemize
  
  @node The Volatile Parameter,,The Clobber Parameter,Other Asm Functionality
! @anchor{gnat_ugn/inline_assembler the-volatile-parameter}@anchor{257}@anchor{gnat_ugn/inline_assembler id9}@anchor{258}
  @subsection The @code{Volatile} Parameter
  
  
*************** to @code{True} only if the compiler's op
*** 30117,30123 ****
  problems.
  
  @node GNU Free Documentation License,Index,Inline Assembler,Top
! @anchor{share/gnu_free_documentation_license gnu-fdl}@anchor{1}@anchor{share/gnu_free_documentation_license doc}@anchor{25f}@anchor{share/gnu_free_documentation_license gnu-free-documentation-license}@anchor{260}
  @chapter GNU Free Documentation License
  
  
--- 30077,30083 ----
  problems.
  
  @node GNU Free Documentation License,Index,Inline Assembler,Top
! @anchor{share/gnu_free_documentation_license gnu-fdl}@anchor{1}@anchor{share/gnu_free_documentation_license doc}@anchor{259}@anchor{share/gnu_free_documentation_license gnu-free-documentation-license}@anchor{25a}
  @chapter GNU Free Documentation License
  
  
diff -Nrcpad gcc-9.3.0/gcc/ada/gnatbind.adb gcc-10.1.0/gcc/ada/gnatbind.adb
*** gcc-9.3.0/gcc/ada/gnatbind.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/gnatbind.adb	Thu May  7 10:49:59 2020
***************
*** 26,34 ****
  with ALI;      use ALI;
  with ALI.Util; use ALI.Util;
  with Bcheck;   use Bcheck;
- with Binde;    use Binde;
  with Binderr;  use Binderr;
  with Bindgen;  use Bindgen;
  with Bindusg;
  with Casing;   use Casing;
  with Csets;
--- 26,34 ----
  with ALI;      use ALI;
  with ALI.Util; use ALI.Util;
  with Bcheck;   use Bcheck;
  with Binderr;  use Binderr;
  with Bindgen;  use Bindgen;
+ with Bindo;    use Bindo;
  with Bindusg;
  with Casing;   use Casing;
  with Csets;
*************** procedure Gnatbind is
*** 474,479 ****
--- 474,490 ----
  
              Mapping_File := new String'(Argv (4 .. Argv'Last));
  
+          --  -minimal
+ 
+          elsif Argv (2 .. Argv'Last) = "minimal" then
+             if not Is_Cross_Compiler then
+                Write_Line
+                  ("gnatbind: -minimal not expected to be used on native " &
+                   "platforms");
+             end if;
+ 
+             Opt.Minimal_Binder := True;
+ 
           --  -Mname
  
           elsif Argv'Length >= 3 and then Argv (2) = 'M' then
*************** begin
*** 878,888 ****
  
        if Errors_Detected = 0 then
           declare
-             Elab_Order : Unit_Id_Table;
              use Unit_Id_Tables;
  
           begin
!             Find_Elab_Order (Elab_Order, First_Main_Lib_File);
  
              if Errors_Detected = 0 and then not Check_Only then
                 Gen_Output_File
--- 889,899 ----
  
        if Errors_Detected = 0 then
           declare
              use Unit_Id_Tables;
+             Elab_Order : Unit_Id_Table;
  
           begin
!             Find_Elaboration_Order (Elab_Order, First_Main_Lib_File);
  
              if Errors_Detected = 0 and then not Check_Only then
                 Gen_Output_File
*************** begin
*** 892,903 ****
           end;
        end if;
  
!       Total_Errors := Total_Errors + Errors_Detected;
        Total_Warnings := Total_Warnings + Warnings_Detected;
  
     exception
        when Unrecoverable_Error =>
!          Total_Errors := Total_Errors + Errors_Detected;
           Total_Warnings := Total_Warnings + Warnings_Detected;
     end;
  
--- 903,914 ----
           end;
        end if;
  
!       Total_Errors   := Total_Errors   + Errors_Detected;
        Total_Warnings := Total_Warnings + Warnings_Detected;
  
     exception
        when Unrecoverable_Error =>
!          Total_Errors   := Total_Errors   + Errors_Detected;
           Total_Warnings := Total_Warnings + Warnings_Detected;
     end;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/gnatcmd.adb gcc-10.1.0/gcc/ada/gnatcmd.adb
*** gcc-9.3.0/gcc/ada/gnatcmd.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/gnatcmd.adb	Thu May  7 10:49:59 2020
*************** with Osint;    use Osint;
*** 30,35 ****
--- 30,36 ----
  with Output;   use Output;
  with Switch;   use Switch;
  with Table;
+ with Usage;
  
  with Ada.Characters.Handling; use Ada.Characters.Handling;
  with Ada.Command_Line;        use Ada.Command_Line;
*************** procedure GNATCmd is
*** 43,48 ****
--- 44,52 ----
     Gprname  : constant String := "gprname";
     Gprls    : constant String := "gprls";
  
+    Ada_Help_Switch : constant String := "--help-ada";
+    --  Flag to display available build switches
+ 
     Error_Exit : exception;
     --  Raise this exception if error detected
  
*************** procedure GNATCmd is
*** 229,235 ****
     procedure Output_Version;
     --  Output the version of this program
  
!    procedure Usage;
     --  Display usage
  
     --------------------
--- 233,239 ----
     procedure Output_Version;
     --  Output the version of this program
  
!    procedure GNATCmd_Usage;
     --  Display usage
  
     --------------------
*************** procedure GNATCmd is
*** 244,257 ****
                  & ", Free Software Foundation, Inc.");
     end Output_Version;
  
!    -----------
!    -- Usage --
!    -----------
  
!    procedure Usage is
     begin
        Output_Version;
        New_Line;
        Put_Line ("List of available commands");
        New_Line;
  
--- 248,263 ----
                  & ", Free Software Foundation, Inc.");
     end Output_Version;
  
!    -------------------
!    -- GNATCmd_Usage --
!    -------------------
  
!    procedure GNATCmd_Usage is
     begin
        Output_Version;
        New_Line;
+       Put_Line ("To list Ada build switches use " & Ada_Help_Switch);
+       New_Line;
        Put_Line ("List of available commands");
        New_Line;
  
*************** procedure GNATCmd is
*** 276,284 ****
        end loop;
  
        New_Line;
!    end Usage;
  
!    procedure Check_Version_And_Help is new Check_Version_And_Help_G (Usage);
  
  --  Start of processing for GNATCmd
  
--- 282,291 ----
        end loop;
  
        New_Line;
!    end GNATCmd_Usage;
  
!    procedure Check_Version_And_Help
!      is new Check_Version_And_Help_G (GNATCmd_Usage);
  
  --  Start of processing for GNATCmd
  
*************** begin
*** 351,356 ****
--- 358,369 ----
              Keep_Temporary_Files := True;
              Command_Arg := Command_Arg + 1;
  
+          elsif Command_Arg <= Argument_Count
+            and then Argument (Command_Arg) = Ada_Help_Switch
+          then
+             Usage;
+             Exit_Program (E_Success);
+ 
           else
              exit;
           end if;
*************** begin
*** 359,365 ****
        --  If there is no command, just output the usage
  
        if Command_Arg > Argument_Count then
!          Usage;
           return;
        end if;
  
--- 372,383 ----
        --  If there is no command, just output the usage
  
        if Command_Arg > Argument_Count then
!          GNATCmd_Usage;
! 
!          --  Add the following so that output is consistent with or without the
!          --  --help flag.
!          Write_Eol;
!          Write_Line ("Report bugs to report@adacore.com");
           return;
        end if;
  
*************** begin
*** 379,385 ****
  
           exception
              when Constraint_Error =>
!                Usage;
                 Fail ("unknown command: " & Argument (Command_Arg));
           end;
     end;
--- 397,403 ----
  
           exception
              when Constraint_Error =>
!                GNATCmd_Usage;
                 Fail ("unknown command: " & Argument (Command_Arg));
           end;
     end;
diff -Nrcpad gcc-9.3.0/gcc/ada/gnatlink.adb gcc-10.1.0/gcc/ada/gnatlink.adb
*** gcc-9.3.0/gcc/ada/gnatlink.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/gnatlink.adb	Thu May  7 10:49:59 2020
*************** procedure Gnatlink is
*** 459,465 ****
  
                       when 'v' =>
  
!                         --  Support "double" verbose mode.  Second -v
                          --  gets sent to the linker and binder phases.
  
                          if Verbose_Mode then
--- 459,465 ----
  
                       when 'v' =>
  
!                         --  Support "double" verbose mode. Second -v
                          --  gets sent to the linker and binder phases.
  
                          if Verbose_Mode then
*************** begin
*** 2068,2074 ****
     end Link_Step;
  
     --  Only keep the binder output file and it's associated object
!    --  file if compiling with the -g option.  These files are only
     --  useful if debugging.
  
     if not Debug_Flag_Present then
--- 2068,2074 ----
     end Link_Step;
  
     --  Only keep the binder output file and it's associated object
!    --  file if compiling with the -g option. These files are only
     --  useful if debugging.
  
     if not Debug_Flag_Present then
diff -Nrcpad gcc-9.3.0/gcc/ada/gnatls.adb gcc-10.1.0/gcc/ada/gnatls.adb
*** gcc-9.3.0/gcc/ada/gnatls.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/gnatls.adb	Thu May  7 10:49:59 2020
*************** with GNAT.OS_Lib;               use GNAT
*** 53,60 ****
  procedure Gnatls is
     pragma Ident (Gnat_Static_Version_String);
  
!    --  NOTE : The following string may be used by other tools, such as GPS. So
!    --  it can only be modified if these other uses are checked and coordinated.
  
     Project_Search_Path : constant String := "Project Search Path:";
     --  Label displayed in verbose mode before the directories in the project
--- 53,61 ----
  procedure Gnatls is
     pragma Ident (Gnat_Static_Version_String);
  
!    --  NOTE : The following string may be used by other tools, such as
!    --  GNAT Studio. So it can only be modified if these other uses are checked
!    --  and coordinated.
  
     Project_Search_Path : constant String := "Project Search Path:";
     --  Label displayed in verbose mode before the directories in the project
diff -Nrcpad gcc-9.3.0/gcc/ada/gnatvsn.ads gcc-10.1.0/gcc/ada/gnatvsn.ads
*** gcc-9.3.0/gcc/ada/gnatvsn.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/gnatvsn.ads	Thu May  7 10:49:59 2020
***************
*** 6,12 ****
  --                                                                          --
  --                                 S p e c                                  --
  --                                                                          --
! --          Copyright (C) 1992-2019, Free Software Foundation, Inc.         --
  --                                                                          --
  -- GNAT is free software;  you can  redistribute it  and/or modify it under --
  -- terms of the  GNU General Public License as published  by the Free Soft- --
--- 6,12 ----
  --                                                                          --
  --                                 S p e c                                  --
  --                                                                          --
! --          Copyright (C) 1992-2020, Free Software Foundation, Inc.         --
  --                                                                          --
  -- GNAT is free software;  you can  redistribute it  and/or modify it under --
  -- terms of the  GNU General Public License as published  by the Free Soft- --
*************** package Gnatvsn is
*** 38,51 ****
     --  Static string identifying this version, that can be used as an argument
     --  to e.g. pragma Ident.
  
!    Library_Version : constant String := "9";
     --  Library version. It needs to be updated whenever the major version
     --  number is changed.
     --
     --  Note: Makefile.in uses the library version string to construct the
     --  soname value.
  
!    Current_Year : constant String := "2019";
     --  Used in printing copyright messages
  
     Verbose_Library_Version : constant String := "GNAT Lib v" & Library_Version;
--- 38,51 ----
     --  Static string identifying this version, that can be used as an argument
     --  to e.g. pragma Ident.
  
!    Library_Version : constant String := "10";
     --  Library version. It needs to be updated whenever the major version
     --  number is changed.
     --
     --  Note: Makefile.in uses the library version string to construct the
     --  soname value.
  
!    Current_Year : constant String := "2020";
     --  Used in printing copyright messages
  
     Verbose_Library_Version : constant String := "GNAT Lib v" & Library_Version;
diff -Nrcpad gcc-9.3.0/gcc/ada/gsocket.h gcc-10.1.0/gcc/ada/gsocket.h
*** gcc-9.3.0/gcc/ada/gsocket.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/gsocket.h	Thu May  7 10:49:59 2020
***************
*** 82,87 ****
--- 82,88 ----
  #ifdef __MINGW32__
  #include <winsock2.h>
  #include <ws2tcpip.h>
+ #include <versionhelpers.h>
  
  #undef  EACCES
  #define EACCES          WSAEACCES
***************
*** 185,190 ****
--- 186,192 ----
  
  #include <limits.h>
  #include <errno.h>
+ #include <stddef.h>
  
  #if defined (__vxworks) && ! defined (__RTP__)
  #include <sys/times.h>
***************
*** 206,211 ****
--- 208,214 ----
   */
  #if !(defined (VMS) || defined (__MINGW32__))
  #include <sys/socket.h>
+ #include <sys/un.h>
  #include <netinet/in.h>
  #include <netinet/tcp.h>
  #include <sys/ioctl.h>
***************
*** 252,263 ****
  # endif
  #endif
  
! #if defined (__FreeBSD__) || defined (__vxworks) || defined(__rtems__) \
!  || defined (__DragonFly__) || defined (__NetBSD__) || defined (__OpenBSD__)
! # define Has_Sockaddr_Len 1
! #else
! # define Has_Sockaddr_Len 0
! #endif
  
  #if !(defined (_WIN32) || defined (__hpux__) || defined (VMS))
  # define HAVE_INET_PTON
--- 255,261 ----
  # endif
  #endif
  
! # define Has_Sockaddr_Len (offsetof(struct sockaddr_in, sin_family) != 0)
  
  #if !(defined (_WIN32) || defined (__hpux__) || defined (VMS))
  # define HAVE_INET_PTON
diff -Nrcpad gcc-9.3.0/gcc/ada/impunit.adb gcc-10.1.0/gcc/ada/impunit.adb
*** gcc-9.3.0/gcc/ada/impunit.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/impunit.adb	Thu May  7 10:49:59 2020
*************** with Namet;    use Namet;
*** 32,39 ****
  with Opt;      use Opt;
  with Uname;    use Uname;
  
! --  Note: this package body is used by GPS and GNATBench to supply a list of
! --  entries for help on available library routines.
  
  package body Impunit is
  
--- 32,39 ----
  with Opt;      use Opt;
  with Uname;    use Uname;
  
! --  Note: this package body is used by GNAT Studio and GNATBench to supply a
! --  list of entries for help on available library routines.
  
  package body Impunit is
  
*************** package body Impunit is
*** 241,246 ****
--- 241,247 ----
      ("g-binenv", F),  -- GNAT.Bind_Environment
      ("g-boubuf", F),  -- GNAT.Bounded_Buffers
      ("g-boumai", F),  -- GNAT.Bounded_Mailboxes
+     ("g-brapre", F),  -- GNAT.Branch_Prediction
      ("g-bubsor", F),  -- GNAT.Bubble_Sort
      ("g-busora", F),  -- GNAT.Bubble_Sort_A
      ("g-busorg", F),  -- GNAT.Bubble_Sort_G
*************** package body Impunit is
*** 275,280 ****
--- 276,282 ----
      ("g-exptty", F),  -- GNAT.Expect.TTY
      ("g-flocon", F),  -- GNAT.Float_Control
      ("g-forstr", F),  -- GNAT.Formatted_String
+     ("g-graphs", F),  -- GNAT.Graphs
      ("g-heasor", F),  -- GNAT.Heap_Sort
      ("g-hesora", F),  -- GNAT.Heap_Sort_A
      ("g-hesorg", F),  -- GNAT.Heap_Sort_G
*************** package body Impunit is
*** 607,613 ****
      ("a-cforse", F),  -- Ada.Containers.Formal_Ordered_Sets
      ("a-cforma", F),  -- Ada.Containers.Formal_Ordered_Maps
      ("a-cfhase", F),  -- Ada.Containers.Formal_Hashed_Sets
!     ("a-cfhama", F)); -- Ada.Containers.Formal_Hashed_Maps
  
     -----------------------
     -- Alternative Units --
--- 609,633 ----
      ("a-cforse", F),  -- Ada.Containers.Formal_Ordered_Sets
      ("a-cforma", F),  -- Ada.Containers.Formal_Ordered_Maps
      ("a-cfhase", F),  -- Ada.Containers.Formal_Hashed_Sets
!     ("a-cfhama", F),  -- Ada.Containers.Formal_Hashed_Maps
!     ("a-cvgpso", F)   -- Ada.Containers.Vectors.Generic_Parallel_Sorting from
!    );                 -- GNATCOLL.OMP
! 
!    --------------------
!    -- Ada 202X Units --
!    --------------------
! 
!    --  The following units should be used only in Ada 202X mode
! 
!    Non_Imp_File_Names_2X : constant File_List := (
!     ("a-stteou", T),  -- Ada.Strings.Text_Output
!     ("a-nubinu", T),  -- Ada.Numerics.Big_Numbers
!     ("a-nbnbin", T),  -- Ada.Numerics.Big_Numbers.Big_Integers
!     ("a-nbnbre", T),  -- Ada.Numerics.Big_Numbers.Big_Reals
!     ("s-aotase", T),  -- System.Atomic_Operations.Test_And_Set
!     ("s-atoope", T),  -- System.Atomic_Operations
!     ("s-atopar", T),  -- System.Atomic_Operations.Arithmetic
!     ("s-atopex", T)); -- System.Atomic_Operations.Exchange
  
     -----------------------
     -- Alternative Units --
*************** package body Impunit is
*** 690,708 ****
           return Not_Predefined_Unit;
        end if;
  
!       --  To be considered predefined, the file name must end in .ads or .adb.
!       --  File names with other extensions (coming from the use of non-standard
!       --  file naming schemes) can never be predefined.
! 
!       --  Note that in the context of a compiler, the .adb case will never
!       --  arise. However it can arise for other tools, e.g. gnatprove uses
!       --  this routine to detect when a construct comes from an instance of
!       --  a generic defined in a predefined unit.
  
!       if File (File'Last - 3 .. File'Last) /= ".ads"
!            and then
!          File (File'Last - 3 .. File'Last) /= ".adb"
!       then
           return Not_Predefined_Unit;
        end if;
  
--- 710,719 ----
           return Not_Predefined_Unit;
        end if;
  
!       --  Not predefined if file name does not end in .ads. This can happen
!       --  when non-standard file names are being used.
  
!       if Name_Buffer (Name_Len - 3 .. Name_Len) /= ".ads" then
           return Not_Predefined_Unit;
        end if;
  
*************** package body Impunit is
*** 738,743 ****
--- 749,762 ----
           end if;
        end loop;
  
+       --  See if name is in 202X list
+ 
+       for J in Non_Imp_File_Names_2X'Range loop
+          if Buffer = Non_Imp_File_Names_2X (J).Fname then
+             return Ada_202X_Unit;
+          end if;
+       end loop;
+ 
        --  Only remaining special possibilities are children of System.RPC and
        --  System.Garlic and special files of the form System.Aux...
  
diff -Nrcpad gcc-9.3.0/gcc/ada/impunit.ads gcc-10.1.0/gcc/ada/impunit.ads
*** gcc-9.3.0/gcc/ada/impunit.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/impunit.ads	Thu May  7 10:49:59 2020
*************** package Impunit is
*** 45,63 ****
        --  This is not a predefined unit, so no checks are needed
  
        Ada_95_Unit,
-       --  This unit is defined in the Ada 95 RM, and can be freely with'ed in
-       --  both Ada 95 mode and Ada 05 mode. Note that in Ada 83 mode, no child
-       --  units are allowed, so you can't even name such a unit.
- 
        Ada_2005_Unit,
!       --  This unit is defined in the Ada 2005 RM. Withing this unit from an
!       --  Ada 95 mode program will generate a warning (again, strictly speaking
!       --  this should be an error, but that seems over-strenuous).
! 
!       Ada_2012_Unit);
!       --  This unit is defined in the Ada 2012 RM. Withing this unit from an
!       --  Ada 95 or 2005 mode program will generate a warning (again, strictly
!       --  speaking this should be an error, but that seems over-strenuous).
  
     function Get_Kind_Of_Unit (U : Unit_Number_Type) return Kind_Of_Unit;
     --  Given the unit number of a unit, this function determines the type
--- 45,57 ----
        --  This is not a predefined unit, so no checks are needed
  
        Ada_95_Unit,
        Ada_2005_Unit,
!       Ada_2012_Unit,
!       Ada_202X_Unit);
!       --  This unit is defined in the Ada RM of the given year. This is used to
!       --  give a warning when withing a unit from a wrong mode (e.g. withing an
!       --  Ada_2012_Unit when compiling with -gnat95). Note that in Ada 83 mode,
!       --  no child units are allowed, so you can't even name such a unit.
  
     function Get_Kind_Of_Unit (U : Unit_Number_Type) return Kind_Of_Unit;
     --  Given the unit number of a unit, this function determines the type
diff -Nrcpad gcc-9.3.0/gcc/ada/init.c gcc-10.1.0/gcc/ada/init.c
*** gcc-9.3.0/gcc/ada/init.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/init.c	Thu May  7 10:49:59 2020
***************
*** 54,61 ****
--- 54,67 ----
  #endif
  
  #ifdef IN_RTS
+ 
+ #ifdef STANDALONE
+ #include "runtime.h"
+ #else
  #include "tconfig.h"
  #include "tsystem.h"
+ #endif
+ 
  #include <sys/stat.h>
  
  /* We don't have libiberty, so use malloc.  */
*************** void fake_linux_sigemptyset (sigset_t *s
*** 463,468 ****
--- 469,475 ----
  void
  __gnat_adjust_context_for_raise (int signo ATTRIBUTE_UNUSED, void *ucontext)
  {
+ #ifndef STANDALONE
    mcontext_t *mcontext = &((ucontext_t *) ucontext)->uc_mcontext;
  
    /* On the i386 and x86-64 architectures, stack checking is performed by
*************** __gnat_adjust_context_for_raise (int sig
*** 513,518 ****
--- 520,526 ----
      mcontext->arm_pc+=1;
  #endif
  #endif
+ #endif
  }
  
  #endif
*************** int __gl_heap_size = 64;
*** 1556,1562 ****
     operation, drivide by zero, and overflow. This will prevent the VMS runtime
     (specifically OTS$CHECK_FP_MODE) from complaining about inconsistent
     floating point settings in a mixed language program. Ideally the setting
!    would be determined at link time based on setttings in the object files,
     however the VMS linker seems to take the setting from the first object
     in the link, e.g. pcrt0.o which is float representation neutral.  */
  char __gl_float_format = 'I';
--- 1564,1570 ----
     operation, drivide by zero, and overflow. This will prevent the VMS runtime
     (specifically OTS$CHECK_FP_MODE) from complaining about inconsistent
     floating point settings in a mixed language program. Ideally the setting
!    would be determined at link time based on settings in the object files,
     however the VMS linker seems to take the setting from the first object
     in the link, e.g. pcrt0.o which is float representation neutral.  */
  char __gl_float_format = 'I';
*************** __gnat_install_handler (void)
*** 1725,1731 ****
  #include <iv.h>
  #endif
  
! #if ((defined (ARMEL) && (_WRS_VXWORKS_MAJOR == 6)) || defined (__x86_64__)) && !defined(__RTP__)
  #define VXWORKS_FORCE_GUARD_PAGE 1
  #include <vmLib.h>
  extern size_t vxIntStackOverflowSize;
--- 1733,1739 ----
  #include <iv.h>
  #endif
  
! #if ((defined (ARMEL) && (_WRS_VXWORKS_MAJOR == 6))) && !defined(__RTP__)
  #define VXWORKS_FORCE_GUARD_PAGE 1
  #include <vmLib.h>
  extern size_t vxIntStackOverflowSize;
diff -Nrcpad gcc-9.3.0/gcc/ada/initialize.c gcc-10.1.0/gcc/ada/initialize.c
*** gcc-9.3.0/gcc/ada/initialize.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/initialize.c	Thu May  7 10:49:59 2020
***************
*** 41,48 ****
  #endif
  
  #ifdef IN_RTS
! #include "tconfig.h"
! #include "tsystem.h"
  /* We don't have libiberty, so use malloc.  */
  #define xmalloc(S) malloc (S)
  #define xrealloc(V,S) realloc (V,S)
--- 41,47 ----
  #endif
  
  #ifdef IN_RTS
! #include "runtime.h"
  /* We don't have libiberty, so use malloc.  */
  #define xmalloc(S) malloc (S)
  #define xrealloc(V,S) realloc (V,S)
diff -Nrcpad gcc-9.3.0/gcc/ada/inline.adb gcc-10.1.0/gcc/ada/inline.adb
*** gcc-9.3.0/gcc/ada/inline.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/inline.adb	Thu May  7 10:49:59 2020
***************
*** 23,28 ****
--- 23,29 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
+ with Alloc;
  with Aspects;  use Aspects;
  with Atree;    use Atree;
  with Debug;    use Debug;
*************** with Sinfo;    use Sinfo;
*** 51,58 ****
  with Sinput;   use Sinput;
  with Snames;   use Snames;
  with Stand;    use Stand;
! with Uname;    use Uname;
  with Tbuild;   use Tbuild;
  
  package body Inline is
  
--- 52,63 ----
  with Sinput;   use Sinput;
  with Snames;   use Snames;
  with Stand;    use Stand;
! with Table;
  with Tbuild;   use Tbuild;
+ with Uintp;    use Uintp;
+ with Uname;    use Uname;
+ 
+ with GNAT.HTable;
  
  package body Inline is
  
*************** package body Inline is
*** 82,93 ****
--- 87,169 ----
     Backend_Calls : Elist_Id;
     --  List of inline calls passed to the backend
  
+    Backend_Instances : Elist_Id;
+    --  List of instances inlined for the backend
+ 
     Backend_Inlined_Subps : Elist_Id;
     --  List of subprograms inlined by the backend
  
     Backend_Not_Inlined_Subps : Elist_Id;
     --  List of subprograms that cannot be inlined by the backend
  
+    -----------------------------
+    --  Pending_Instantiations --
+    -----------------------------
+ 
+    --  We make entries in this table for the pending instantiations of generic
+    --  bodies that are created during semantic analysis. After the analysis is
+    --  complete, calling Instantiate_Bodies performs the actual instantiations.
+ 
+    package Pending_Instantiations is new Table.Table (
+      Table_Component_Type => Pending_Body_Info,
+      Table_Index_Type     => Int,
+      Table_Low_Bound      => 0,
+      Table_Initial        => Alloc.Pending_Instantiations_Initial,
+      Table_Increment      => Alloc.Pending_Instantiations_Increment,
+      Table_Name           => "Pending_Instantiations");
+ 
+    -------------------------------------
+    --  Called_Pending_Instantiations  --
+    -------------------------------------
+ 
+    --  With back-end inlining, the pending instantiations that are not in the
+    --  main unit or subunit are performed only after a call to the subprogram
+    --  instance, or to a subprogram within the package instance, is inlined.
+    --  Since such a call can be within a subsequent pending instantiation,
+    --  we make entries in this table that stores the index of these "called"
+    --  pending instantiations and perform them when the table is populated.
+ 
+    package Called_Pending_Instantiations is new Table.Table (
+      Table_Component_Type => Int,
+      Table_Index_Type     => Int,
+      Table_Low_Bound      => 0,
+      Table_Initial        => Alloc.Pending_Instantiations_Initial,
+      Table_Increment      => Alloc.Pending_Instantiations_Increment,
+      Table_Name           => "Called_Pending_Instantiations");
+ 
+    ---------------------------------
+    --  To_Pending_Instantiations  --
+    ---------------------------------
+ 
+    --  With back-end inlining, we also need to have a map from the pending
+    --  instantiations to their index in the Pending_Instantiations table.
+ 
+    Node_Table_Size : constant := 257;
+    --  Number of headers in hash table
+ 
+    subtype Node_Header_Num is Integer range 0 .. Node_Table_Size - 1;
+    --  Range of headers in hash table
+ 
+    function Node_Hash (Id : Node_Id) return Node_Header_Num;
+    --  Simple hash function for Node_Ids
+ 
+    package To_Pending_Instantiations is new GNAT.Htable.Simple_HTable
+      (Header_Num => Node_Header_Num,
+       Element    => Int,
+       No_Element => -1,
+       Key        => Node_Id,
+       Hash       => Node_Hash,
+       Equal      => "=");
+ 
+    -----------------
+    -- Node_Hash --
+    -----------------
+ 
+    function Node_Hash (Id : Node_Id) return Node_Header_Num is
+    begin
+       return Node_Header_Num (Id mod Node_Table_Size);
+    end Node_Hash;
+ 
     --------------------
     -- Inlined Bodies --
     --------------------
*************** package body Inline is
*** 179,186 ****
     --  called, and for the inlined subprogram that contains the call. If
     --  the call is in the main compilation unit, Caller is Empty.
  
     procedure Add_Inlined_Subprogram (E : Entity_Id);
!    --  Add subprogram E to the list of inlined subprogram for the unit
  
     function Add_Subp (E : Entity_Id) return Subp_Index;
     --  Make entry in Inlined table for subprogram E, or return table index
--- 255,265 ----
     --  called, and for the inlined subprogram that contains the call. If
     --  the call is in the main compilation unit, Caller is Empty.
  
+    procedure Add_Inlined_Instance (E : Entity_Id);
+    --  Add instance E to the list of inlined instances for the unit
+ 
     procedure Add_Inlined_Subprogram (E : Entity_Id);
!    --  Add subprogram E to the list of inlined subprograms for the unit
  
     function Add_Subp (E : Entity_Id) return Subp_Index;
     --  Make entry in Inlined table for subprogram E, or return table index
*************** package body Inline is
*** 429,445 ****
           return Dont_Inline;
        end Must_Inline;
  
!       Level : Inline_Level_Type;
  
     --  Start of processing for Add_Inlined_Body
  
     begin
        Append_New_Elmt (N, To => Backend_Calls);
  
!       --  Skip subprograms that cannot be inlined outside their unit
  
        if Is_Abstract_Subprogram (E)
          or else Convention (E) = Convention_Protected
          or else Is_Nested (E)
        then
           return;
--- 508,528 ----
           return Dont_Inline;
        end Must_Inline;
  
!       Inst      : Entity_Id;
!       Inst_Decl : Node_Id;
!       Level     : Inline_Level_Type;
  
     --  Start of processing for Add_Inlined_Body
  
     begin
        Append_New_Elmt (N, To => Backend_Calls);
  
!       --  Skip subprograms that cannot or need not be inlined outside their
!       --  unit or parent subprogram.
  
        if Is_Abstract_Subprogram (E)
          or else Convention (E) = Convention_Protected
+         or else In_Main_Unit_Or_Subunit (E)
          or else Is_Nested (E)
        then
           return;
*************** package body Inline is
*** 456,461 ****
--- 539,560 ----
           return;
        end if;
  
+       --  If a previous call to the subprogram has been inlined, nothing to do
+ 
+       if Is_Called (E) then
+          return;
+       end if;
+ 
+       --  If the subprogram is an instance, then inline the instance
+ 
+       if Is_Generic_Instance (E) then
+          Add_Inlined_Instance (E);
+       end if;
+ 
+       --  Mark the subprogram as called
+ 
+       Set_Is_Called (E);
+ 
        --  If the call was generated by the compiler and is to a subprogram in
        --  a run-time unit, we need to suppress debugging information for it,
        --  so that the code that is eventually inlined will not affect the
*************** package body Inline is
*** 476,494 ****
        --  in the spec.
  
        if Is_Non_Loading_Expression_Function (E) then
-          Set_Is_Called (E);
           return;
        end if;
  
        --  Find unit containing E, and add to list of inlined bodies if needed.
-       --  If the body is already present, no need to load any other unit. This
-       --  is the case for an initialization procedure, which appears in the
-       --  package declaration that contains the type. It is also the case if
-       --  the body has already been analyzed. Finally, if the unit enclosing
-       --  E is an instance, the instance body will be analyzed in any case,
-       --  and there is no need to add the enclosing unit (whose body might not
-       --  be available).
- 
        --  Library-level functions must be handled specially, because there is
        --  no enclosing package to retrieve. In this case, it is the body of
        --  the function that will have to be loaded.
--- 575,584 ----
*************** package body Inline is
*** 498,509 ****
  
        begin
           if Pack = E then
-             Set_Is_Called (E);
              Inlined_Bodies.Increment_Last;
              Inlined_Bodies.Table (Inlined_Bodies.Last) := E;
  
!          elsif Ekind (Pack) = E_Package then
!             Set_Is_Called (E);
  
              if Is_Generic_Instance (Pack) then
                 null;
--- 588,630 ----
  
        begin
           if Pack = E then
              Inlined_Bodies.Increment_Last;
              Inlined_Bodies.Table (Inlined_Bodies.Last) := E;
  
!          else
!             pragma Assert (Ekind (Pack) = E_Package);
! 
!             --  If the subprogram is within an instance, inline the instance
! 
!             if Comes_From_Source (E) then
!                Inst := Scope (E);
! 
!                while Present (Inst) and then Inst /= Standard_Standard loop
!                   exit when Is_Generic_Instance (Inst);
!                   Inst := Scope (Inst);
!                end loop;
! 
!                if Present (Inst)
!                  and then Is_Generic_Instance (Inst)
!                  and then not Is_Called (Inst)
!                then
!                   Inst_Decl := Unit_Declaration_Node (Inst);
! 
!                   --  Do not inline the instance if the body already exists,
!                   --  or the instance node is simply missing.
! 
!                   if Present (Corresponding_Body (Inst_Decl))
!                     or else (Nkind (Parent (Inst_Decl)) /= N_Compilation_Unit
!                               and then No (Next (Inst_Decl)))
!                   then
!                      Set_Is_Called (Inst);
!                   else
!                      Add_Inlined_Instance (Inst);
!                   end if;
!                end if;
!             end if;
! 
!             --  If the unit containing E is an instance, nothing more to do
  
              if Is_Generic_Instance (Pack) then
                 null;
*************** package body Inline is
*** 514,521 ****
              --  declares the type, and that body is visible to the back end.
              --  Do not inline it either if it is in the main unit.
              --  Extend the -gnatn2 processing to -gnatn1 for Inline_Always
!             --  calls if the back-end takes care of inlining the call.
!             --  Note that Level in Inline_Package | Inline_Call here.
  
              elsif ((Level = Inline_Call
                        and then Has_Pragma_Inline_Always (E)
--- 635,642 ----
              --  declares the type, and that body is visible to the back end.
              --  Do not inline it either if it is in the main unit.
              --  Extend the -gnatn2 processing to -gnatn1 for Inline_Always
!             --  calls if the back end takes care of inlining the call.
!             --  Note that Level is in Inline_Call | Inline_Package here.
  
              elsif ((Level = Inline_Call
                        and then Has_Pragma_Inline_Always (E)
*************** package body Inline is
*** 538,543 ****
--- 659,697 ----
        end;
     end Add_Inlined_Body;
  
+    --------------------------
+    -- Add_Inlined_Instance --
+    --------------------------
+ 
+    procedure Add_Inlined_Instance (E : Entity_Id) is
+       Decl_Node : constant Node_Id := Unit_Declaration_Node (E);
+       Index     : Int;
+ 
+    begin
+       --  This machinery is only used with back-end inlining
+ 
+       if not Back_End_Inlining then
+          return;
+       end if;
+ 
+       --  Register the instance in the list
+ 
+       Append_New_Elmt (Decl_Node, To => Backend_Instances);
+ 
+       --  Retrieve the index of its corresponding pending instantiation
+       --  and mark this corresponding pending instantiation as needed.
+ 
+       Index := To_Pending_Instantiations.Get (Decl_Node);
+       if Index >= 0 then
+          Called_Pending_Instantiations.Append (Index);
+       else
+          pragma Assert (False);
+          null;
+       end if;
+ 
+       Set_Is_Called (E);
+    end Add_Inlined_Instance;
+ 
     ----------------------------
     -- Add_Inlined_Subprogram --
     ----------------------------
*************** package body Inline is
*** 574,594 ****
     --  Start of processing for Add_Inlined_Subprogram
  
     begin
!       --  If the subprogram is to be inlined, and if its unit is known to be
!       --  inlined or is an instance whose body will be analyzed anyway or the
!       --  subprogram was generated as a body by the compiler (for example an
!       --  initialization procedure) or its declaration was provided along with
!       --  the body (for example an expression function), and if it is declared
!       --  at the library level not in the main unit, and if it can be inlined
!       --  by the back-end, then insert it in the list of inlined subprograms.
  
!       if Is_Inlined (E)
!         and then (Is_Inlined (Pack)
!                    or else Is_Generic_Instance (Pack)
!                    or else Nkind (Decl) = N_Subprogram_Body
!                    or else Present (Corresponding_Body (Decl)))
!         and then not In_Main_Unit_Or_Subunit (E)
!         and then not Is_Nested (E)
          and then not Has_Initialized_Type (E)
        then
           Register_Backend_Inlined_Subprogram (E);
--- 728,744 ----
     --  Start of processing for Add_Inlined_Subprogram
  
     begin
!       --  We can inline the subprogram if its unit is known to be inlined or is
!       --  an instance whose body will be analyzed anyway or the subprogram was
!       --  generated as a body by the compiler (for example an initialization
!       --  procedure) or its declaration was provided along with the body (for
!       --  example an expression function) and it does not declare types with
!       --  nontrivial initialization procedures.
  
!       if (Is_Inlined (Pack)
!            or else Is_Generic_Instance (Pack)
!            or else Nkind (Decl) = N_Subprogram_Body
!            or else Present (Corresponding_Body (Decl)))
          and then not Has_Initialized_Type (E)
        then
           Register_Backend_Inlined_Subprogram (E);
*************** package body Inline is
*** 606,611 ****
--- 756,816 ----
        end if;
     end Add_Inlined_Subprogram;
  
+    --------------------------------
+    --  Add_Pending_Instantiation --
+    --------------------------------
+ 
+    procedure Add_Pending_Instantiation (Inst : Node_Id; Act_Decl : Node_Id) is
+       Act_Decl_Id : Entity_Id;
+       Index       : Int;
+ 
+    begin
+       --  Here is a defense against a ludicrous number of instantiations
+       --  caused by a circular set of instantiation attempts.
+ 
+       if Pending_Instantiations.Last + 1 >= Maximum_Instantiations then
+          Error_Msg_Uint_1 := UI_From_Int (Maximum_Instantiations);
+          Error_Msg_N ("too many instantiations, exceeds max of^", Inst);
+          Error_Msg_N ("\limit can be changed using -gnateinn switch", Inst);
+          raise Unrecoverable_Error;
+       end if;
+ 
+       --  Capture the body of the generic instantiation along with its context
+       --  for later processing by Instantiate_Bodies.
+ 
+       Pending_Instantiations.Append
+         ((Act_Decl                 => Act_Decl,
+           Config_Switches          => Save_Config_Switches,
+           Current_Sem_Unit         => Current_Sem_Unit,
+           Expander_Status          => Expander_Active,
+           Inst_Node                => Inst,
+           Local_Suppress_Stack_Top => Local_Suppress_Stack_Top,
+           Scope_Suppress           => Scope_Suppress,
+           Warnings                 => Save_Warnings));
+ 
+       --  With back-end inlining, also associate the index to the instantiation
+ 
+       if Back_End_Inlining then
+          Act_Decl_Id := Defining_Entity (Act_Decl);
+          Index := Pending_Instantiations.Last;
+ 
+          To_Pending_Instantiations.Set (Act_Decl, Index);
+ 
+          --  If an instantiation is in the main unit or subunit, or is a nested
+          --  subprogram, then its body is needed as per the analysis done in
+          --  Analyze_Package_Instantiation & Analyze_Subprogram_Instantiation.
+ 
+          if In_Main_Unit_Or_Subunit (Act_Decl_Id)
+            or else (Is_Subprogram (Act_Decl_Id)
+                      and then Is_Nested (Act_Decl_Id))
+          then
+             Called_Pending_Instantiations.Append (Index);
+ 
+             Set_Is_Called (Act_Decl_Id);
+          end if;
+       end if;
+    end Add_Pending_Instantiation;
+ 
     ------------------------
     -- Add_Scope_To_Clean --
     ------------------------
*************** package body Inline is
*** 1288,1293 ****
--- 1493,1504 ----
       (Spec_Id : Entity_Id;
        Body_Id : Entity_Id) return Boolean
     is
+       function Has_Formal_Or_Result_Of_Deep_Type
+         (Id : Entity_Id) return Boolean;
+       --  Returns true if the subprogram has at least one formal parameter or
+       --  a return type of a deep type: either an access type or a composite
+       --  type containing an access type.
+ 
        function Has_Formal_With_Discriminant_Dependent_Fields
          (Id : Entity_Id) return Boolean;
        --  Returns true if the subprogram has at least one formal parameter of
*************** package body Inline is
*** 1307,1312 ****
--- 1518,1641 ----
        --  Return True if subprogram Id is defined in the package specification,
        --  either its visible or private part.
  
+       function Maybe_Traversal_Function (Id : Entity_Id) return Boolean;
+       --  Return True if subprogram Id could be a traversal function, as
+       --  defined in SPARK RM 3.10. This is only a safe approximation, as the
+       --  knowledge of the SPARK boundary is needed to determine exactly
+       --  traversal functions.
+ 
+       ---------------------------------------
+       -- Has_Formal_Or_Result_Of_Deep_Type --
+       ---------------------------------------
+ 
+       function Has_Formal_Or_Result_Of_Deep_Type
+         (Id : Entity_Id) return Boolean
+       is
+          function Is_Deep (Typ : Entity_Id) return Boolean;
+          --  Return True if Typ is deep: either an access type or a composite
+          --  type containing an access type.
+ 
+          -------------
+          -- Is_Deep --
+          -------------
+ 
+          function Is_Deep (Typ : Entity_Id) return Boolean is
+          begin
+             case Type_Kind'(Ekind (Typ)) is
+                when Access_Kind =>
+                   return True;
+ 
+                when E_Array_Type
+                   | E_Array_Subtype
+                =>
+                   return Is_Deep (Component_Type (Typ));
+ 
+                when Record_Kind =>
+                   declare
+                      Comp : Entity_Id := First_Component_Or_Discriminant (Typ);
+                   begin
+                      while Present (Comp) loop
+                         if Is_Deep (Etype (Comp)) then
+                            return True;
+                         end if;
+                         Next_Component_Or_Discriminant (Comp);
+                      end loop;
+                   end;
+                   return False;
+ 
+                when Scalar_Kind
+                   | E_String_Literal_Subtype
+                   | Concurrent_Kind
+                   | Incomplete_Kind
+                   | E_Exception_Type
+                   | E_Subprogram_Type
+                =>
+                   return False;
+ 
+                when E_Private_Type
+                   | E_Private_Subtype
+                   | E_Limited_Private_Type
+                   | E_Limited_Private_Subtype
+                =>
+                   --  Conservatively consider that the type might be deep if
+                   --  its completion has not been seen yet.
+ 
+                   if No (Underlying_Type (Typ)) then
+                      return True;
+ 
+                   --  Do not peek under a private type if its completion has
+                   --  SPARK_Mode Off. In such a case, a deep type is considered
+                   --  by GNATprove to be not deep.
+ 
+                   elsif Present (Full_View (Typ))
+                     and then Present (SPARK_Pragma (Full_View (Typ)))
+                     and then Get_SPARK_Mode_From_Annotation
+                       (SPARK_Pragma (Full_View (Typ))) = Off
+                   then
+                      return False;
+ 
+                   --  Otherwise peek under the private type.
+ 
+                   else
+                      return Is_Deep (Underlying_Type (Typ));
+                   end if;
+             end case;
+          end Is_Deep;
+ 
+          --  Local variables
+ 
+          Subp_Id    : constant Entity_Id := Ultimate_Alias (Id);
+          Formal     : Entity_Id;
+          Formal_Typ : Entity_Id;
+ 
+       --  Start of processing for Has_Formal_Or_Result_Of_Deep_Type
+ 
+       begin
+          --  Inspect all parameters of the subprogram looking for a formal
+          --  of a deep type.
+ 
+          Formal := First_Formal (Subp_Id);
+          while Present (Formal) loop
+             Formal_Typ := Etype (Formal);
+ 
+             if Is_Deep (Formal_Typ) then
+                return True;
+             end if;
+ 
+             Next_Formal (Formal);
+          end loop;
+ 
+          --  Check whether this is a function whose return type is deep
+ 
+          if Ekind (Subp_Id) = E_Function
+            and then Is_Deep (Etype (Subp_Id))
+          then
+             return True;
+          end if;
+ 
+          return False;
+       end Has_Formal_Or_Result_Of_Deep_Type;
+ 
        ---------------------------------------------------
        -- Has_Formal_With_Discriminant_Dependent_Fields --
        ---------------------------------------------------
*************** package body Inline is
*** 1430,1435 ****
--- 1759,1778 ----
           return Nkind (Parent (Decl)) = N_Compilation_Unit;
        end Is_Unit_Subprogram;
  
+       ------------------------------
+       -- Maybe_Traversal_Function --
+       ------------------------------
+ 
+       function Maybe_Traversal_Function (Id : Entity_Id) return Boolean is
+       begin
+          return Ekind (Id) = E_Function
+ 
+            --  Only traversal functions return an anonymous access-to-object
+            --  type in SPARK.
+ 
+            and then Is_Anonymous_Access_Type (Etype (Id));
+       end Maybe_Traversal_Function;
+ 
        --  Local declarations
  
        Id : Entity_Id;
*************** package body Inline is
*** 1476,1481 ****
--- 1819,1830 ----
        elsif not In_Extended_Main_Code_Unit (Id) then
           return False;
  
+       --  Do not inline dispatching operations, as only their static calls
+       --  can be analyzed in context, and not their dispatching calls.
+ 
+       elsif Is_Dispatching_Operation (Id) then
+          return False;
+ 
        --  Do not inline subprograms marked No_Return, possibly used for
        --  signaling errors, which GNATprove handles specially.
  
*************** package body Inline is
*** 1546,1551 ****
--- 1895,1917 ----
        elsif Has_Formal_With_Discriminant_Dependent_Fields (Id) then
           return False;
  
+       --  Do not inline subprograms with a formal parameter or return type of
+       --  a deep type, as in that case inlining might generate code that
+       --  violates borrow-checking rules of SPARK 3.10 even if the original
+       --  code did not.
+ 
+       elsif Has_Formal_Or_Result_Of_Deep_Type (Id) then
+          return False;
+ 
+       --  Do not inline subprograms which may be traversal functions. Such
+       --  inlining introduces temporary variables of named access type for
+       --  which assignments are move instead of borrow/observe, possibly
+       --  leading to spurious errors when checking SPARK rules related to
+       --  pointer usage.
+ 
+       elsif Maybe_Traversal_Function (Id) then
+          return False;
+ 
        --  Otherwise, this is a subprogram declared inside the private part of a
        --  package, or inside a package body, or locally in a subprogram, and it
        --  does not have any contract. Inline it.
*************** package body Inline is
*** 1706,1716 ****
--- 2072,2100 ----
        --  Use generic machinery to build an unexpanded body for the subprogram.
        --  This body is subsequently used for inline expansions at call sites.
  
+       procedure Build_Return_Object_Formal
+         (Loc      : Source_Ptr;
+          Obj_Decl : Node_Id;
+          Formals  : List_Id);
+       --  Create a formal parameter for return object declaration Obj_Decl of
+       --  an extended return statement and add it to list Formals.
+ 
        function Can_Split_Unconstrained_Function (N : Node_Id) return Boolean;
        --  Return true if we generate code for the function body N, the function
        --  body N has no local declarations and its unique statement is a single
        --  extended return statement with a handled statements sequence.
  
+       procedure Copy_Formals
+         (Loc     : Source_Ptr;
+          Subp_Id : Entity_Id;
+          Formals : List_Id);
+       --  Create new formal parameters from the formal parameters of subprogram
+       --  Subp_Id and add them to list Formals.
+ 
+       function Copy_Return_Object (Obj_Decl : Node_Id) return Node_Id;
+       --  Create a copy of return object declaration Obj_Decl of an extended
+       --  return statement.
+ 
        procedure Split_Unconstrained_Function
          (N       : Node_Id;
           Spec_Id : Entity_Id);
*************** package body Inline is
*** 1733,1739 ****
           --  occurrences of pragmas referencing the formals are removed since
           --  they have no meaning when the body is inlined and the formals are
           --  rewritten (the analysis of the non-inlined body will handle these
!          --  pragmas).  A new internal name is associated with Body_To_Inline.
  
           ------------------------------
           -- Generate_Subprogram_Body --
--- 2117,2123 ----
           --  occurrences of pragmas referencing the formals are removed since
           --  they have no meaning when the body is inlined and the formals are
           --  rewritten (the analysis of the non-inlined body will handle these
!          --  pragmas). A new internal name is associated with Body_To_Inline.
  
           ------------------------------
           -- Generate_Subprogram_Body --
*************** package body Inline is
*** 1757,1762 ****
--- 2141,2149 ----
                 Body_To_Inline :=
                   Copy_Generic_Node (N, Empty, Instantiating => True);
              else
+                --  ??? Shouldn't this use New_Copy_Tree? What about global
+                --  references captured in the body to inline?
+ 
                 Body_To_Inline := Copy_Separate_Tree (N);
              end if;
  
*************** package body Inline is
*** 1787,1792 ****
--- 2174,2181 ----
           Original_Body   : Node_Id;
           Body_To_Analyze : Node_Id;
  
+       --  Start of processing for Build_Body_To_Inline
+ 
        begin
           pragma Assert (Current_Scope = Spec_Id);
  
*************** package body Inline is
*** 1845,1874 ****
           Set_Ekind (Defining_Entity (Original_Body), Ekind (Spec_Id));
        end Build_Body_To_Inline;
  
        --------------------------------------
        -- Can_Split_Unconstrained_Function --
        --------------------------------------
  
        function Can_Split_Unconstrained_Function (N : Node_Id) return Boolean is
!          Ret_Node : constant Node_Id :=
!                       First (Statements (Handled_Statement_Sequence (N)));
!          D : Node_Id;
  
        begin
           --  No user defined declarations allowed in the function except inside
           --  the unique return statement; implicit labels are the only allowed
           --  declarations.
  
!          if not Is_Empty_List (Declarations (N)) then
!             D := First (Declarations (N));
!             while Present (D) loop
!                if Nkind (D) /= N_Implicit_Label_Declaration then
!                   return False;
!                end if;
  
!                Next (D);
!             end loop;
!          end if;
  
           --  We only split the inlined function when we are generating the code
           --  of its body; otherwise we leave duplicated split subprograms in
--- 2234,2303 ----
           Set_Ekind (Defining_Entity (Original_Body), Ekind (Spec_Id));
        end Build_Body_To_Inline;
  
+       --------------------------------
+       -- Build_Return_Object_Formal --
+       --------------------------------
+ 
+       procedure Build_Return_Object_Formal
+         (Loc      : Source_Ptr;
+          Obj_Decl : Node_Id;
+          Formals  : List_Id)
+       is
+          Obj_Def : constant Node_Id   := Object_Definition (Obj_Decl);
+          Obj_Id  : constant Entity_Id := Defining_Entity   (Obj_Decl);
+          Typ_Def : Node_Id;
+ 
+       begin
+          --  Build the type definition of the formal parameter. The use of
+          --  New_Copy_Tree ensures that global references preserved in the
+          --  case of generics.
+ 
+          if Is_Entity_Name (Obj_Def) then
+             Typ_Def := New_Copy_Tree (Obj_Def);
+          else
+             Typ_Def := New_Copy_Tree (Subtype_Mark (Obj_Def));
+          end if;
+ 
+          --  Generate:
+          --
+          --    Obj_Id : [out] Typ_Def
+ 
+          --  Mode OUT should not be used when the return object is declared as
+          --  a constant. Check the definition of the object declaration because
+          --  the object has not been analyzed yet.
+ 
+          Append_To (Formals,
+            Make_Parameter_Specification (Loc,
+              Defining_Identifier    =>
+                Make_Defining_Identifier (Loc, Chars (Obj_Id)),
+              In_Present             => False,
+              Out_Present            => not Constant_Present (Obj_Decl),
+              Null_Exclusion_Present => False,
+              Parameter_Type         => Typ_Def));
+       end Build_Return_Object_Formal;
+ 
        --------------------------------------
        -- Can_Split_Unconstrained_Function --
        --------------------------------------
  
        function Can_Split_Unconstrained_Function (N : Node_Id) return Boolean is
!          Stmt : constant Node_Id :=
!                   First (Statements (Handled_Statement_Sequence (N)));
!          Decl : Node_Id;
  
        begin
           --  No user defined declarations allowed in the function except inside
           --  the unique return statement; implicit labels are the only allowed
           --  declarations.
  
!          Decl := First (Declarations (N));
!          while Present (Decl) loop
!             if Nkind (Decl) /= N_Implicit_Label_Declaration then
!                return False;
!             end if;
  
!             Next (Decl);
!          end loop;
  
           --  We only split the inlined function when we are generating the code
           --  of its body; otherwise we leave duplicated split subprograms in
*************** package body Inline is
*** 1876,1887 ****
           --  time.
  
           return In_Extended_Main_Code_Unit (N)
!            and then Present (Ret_Node)
!            and then Nkind (Ret_Node) = N_Extended_Return_Statement
!            and then No (Next (Ret_Node))
!            and then Present (Handled_Statement_Sequence (Ret_Node));
        end Can_Split_Unconstrained_Function;
  
        ----------------------------------
        -- Split_Unconstrained_Function --
        ----------------------------------
--- 2305,2375 ----
           --  time.
  
           return In_Extended_Main_Code_Unit (N)
!            and then Present (Stmt)
!            and then Nkind (Stmt) = N_Extended_Return_Statement
!            and then No (Next (Stmt))
!            and then Present (Handled_Statement_Sequence (Stmt));
        end Can_Split_Unconstrained_Function;
  
+       ------------------
+       -- Copy_Formals --
+       ------------------
+ 
+       procedure Copy_Formals
+         (Loc     : Source_Ptr;
+          Subp_Id : Entity_Id;
+          Formals : List_Id)
+       is
+          Formal : Entity_Id;
+          Spec   : Node_Id;
+ 
+       begin
+          Formal := First_Formal (Subp_Id);
+          while Present (Formal) loop
+             Spec := Parent (Formal);
+ 
+             --  Create an exact copy of the formal parameter. The use of
+             --  New_Copy_Tree ensures that global references are preserved
+             --  in case of generics.
+ 
+             Append_To (Formals,
+               Make_Parameter_Specification (Loc,
+                 Defining_Identifier    =>
+                   Make_Defining_Identifier (Sloc (Formal), Chars (Formal)),
+                 In_Present             => In_Present  (Spec),
+                 Out_Present            => Out_Present (Spec),
+                 Null_Exclusion_Present => Null_Exclusion_Present (Spec),
+                 Parameter_Type         =>
+                   New_Copy_Tree (Parameter_Type (Spec)),
+                 Expression             => New_Copy_Tree (Expression (Spec))));
+ 
+             Next_Formal (Formal);
+          end loop;
+       end Copy_Formals;
+ 
+       ------------------------
+       -- Copy_Return_Object --
+       ------------------------
+ 
+       function Copy_Return_Object (Obj_Decl : Node_Id) return Node_Id is
+          Obj_Id  : constant Entity_Id := Defining_Entity (Obj_Decl);
+ 
+       begin
+          --  The use of New_Copy_Tree ensures that global references are
+          --  preserved in case of generics.
+ 
+          return
+            Make_Object_Declaration (Sloc (Obj_Decl),
+              Defining_Identifier    =>
+                Make_Defining_Identifier (Sloc (Obj_Id), Chars (Obj_Id)),
+              Aliased_Present        => Aliased_Present  (Obj_Decl),
+              Constant_Present       => Constant_Present (Obj_Decl),
+              Null_Exclusion_Present => Null_Exclusion_Present (Obj_Decl),
+              Object_Definition      =>
+                New_Copy_Tree (Object_Definition (Obj_Decl)),
+              Expression             => New_Copy_Tree (Expression (Obj_Decl)));
+       end Copy_Return_Object;
+ 
        ----------------------------------
        -- Split_Unconstrained_Function --
        ----------------------------------
*************** package body Inline is
*** 1891,1900 ****
           Spec_Id  : Entity_Id)
        is
           Loc      : constant Source_Ptr := Sloc (N);
!          Ret_Node : constant Node_Id :=
                        First (Statements (Handled_Statement_Sequence (N)));
           Ret_Obj  : constant Node_Id :=
!                       First (Return_Object_Declarations (Ret_Node));
  
           procedure Build_Procedure
             (Proc_Id   : out Entity_Id;
--- 2379,2388 ----
           Spec_Id  : Entity_Id)
        is
           Loc      : constant Source_Ptr := Sloc (N);
!          Ret_Stmt : constant Node_Id :=
                        First (Statements (Handled_Statement_Sequence (N)));
           Ret_Obj  : constant Node_Id :=
!                       First (Return_Object_Declarations (Ret_Stmt));
  
           procedure Build_Procedure
             (Proc_Id   : out Entity_Id;
*************** package body Inline is
*** 1910,1972 ****
             (Proc_Id   : out Entity_Id;
              Decl_List : out List_Id)
           is
!             Formal         : Entity_Id;
!             Formal_List    : constant List_Id := New_List;
!             Proc_Spec      : Node_Id;
!             Proc_Body      : Node_Id;
!             Subp_Name      : constant Name_Id := New_Internal_Name ('F');
!             Body_Decl_List : List_Id := No_List;
!             Param_Type     : Node_Id;
! 
!          begin
!             if Nkind (Object_Definition (Ret_Obj)) = N_Identifier then
!                Param_Type :=
!                  New_Copy (Object_Definition (Ret_Obj));
!             else
!                Param_Type :=
!                  New_Copy (Subtype_Mark (Object_Definition (Ret_Obj)));
!             end if;
! 
!             Append_To (Formal_List,
!               Make_Parameter_Specification (Loc,
!                 Defining_Identifier    =>
!                   Make_Defining_Identifier (Loc,
!                     Chars => Chars (Defining_Identifier (Ret_Obj))),
!                 In_Present             => False,
!                 Out_Present            => True,
!                 Null_Exclusion_Present => False,
!                 Parameter_Type         => Param_Type));
  
!             Formal := First_Formal (Spec_Id);
  
!             --  Note that we copy the parameter type rather than creating
!             --  a reference to it, because it may be a class-wide entity
!             --  that will not be retrieved by name.
  
!             while Present (Formal) loop
!                Append_To (Formal_List,
!                  Make_Parameter_Specification (Loc,
!                    Defining_Identifier    =>
!                      Make_Defining_Identifier (Sloc (Formal),
!                        Chars => Chars (Formal)),
!                    In_Present             => In_Present (Parent (Formal)),
!                    Out_Present            => Out_Present (Parent (Formal)),
!                    Null_Exclusion_Present =>
!                      Null_Exclusion_Present (Parent (Formal)),
!                    Parameter_Type         =>
!                      New_Copy_Tree (Parameter_Type (Parent (Formal))),
!                    Expression             =>
!                      Copy_Separate_Tree (Expression (Parent (Formal)))));
  
!                Next_Formal (Formal);
!             end loop;
  
              Proc_Id := Make_Defining_Identifier (Loc, Chars => Subp_Name);
  
              Proc_Spec :=
                Make_Procedure_Specification (Loc,
                  Defining_Unit_Name       => Proc_Id,
!                 Parameter_Specifications => Formal_List);
  
              Decl_List := New_List;
  
--- 2398,2432 ----
             (Proc_Id   : out Entity_Id;
              Decl_List : out List_Id)
           is
!             Formals   : constant List_Id   := New_List;
!             Subp_Name : constant Name_Id   := New_Internal_Name ('F');
  
!             Body_Decls : List_Id := No_List;
!             Decl       : Node_Id;
!             Proc_Body  : Node_Id;
!             Proc_Spec  : Node_Id;
  
!          begin
!             --  Create formal parameters for the return object and all formals
!             --  of the unconstrained function in order to pass their values to
!             --  the procedure.
  
!             Build_Return_Object_Formal
!               (Loc      => Loc,
!                Obj_Decl => Ret_Obj,
!                Formals  => Formals);
  
!             Copy_Formals
!               (Loc     => Loc,
!                Subp_Id => Spec_Id,
!                Formals => Formals);
  
              Proc_Id := Make_Defining_Identifier (Loc, Chars => Subp_Name);
  
              Proc_Spec :=
                Make_Procedure_Specification (Loc,
                  Defining_Unit_Name       => Proc_Id,
!                 Parameter_Specifications => Formals);
  
              Decl_List := New_List;
  
*************** package body Inline is
*** 1978,2014 ****
              --  Copy these declarations to the built procedure.
  
              if Present (Declarations (N)) then
!                Body_Decl_List := New_List;
! 
!                declare
!                   D     : Node_Id;
!                   New_D : Node_Id;
  
!                begin
!                   D := First (Declarations (N));
!                   while Present (D) loop
!                      pragma Assert (Nkind (D) = N_Implicit_Label_Declaration);
  
!                      New_D :=
!                        Make_Implicit_Label_Declaration (Loc,
!                          Make_Defining_Identifier (Loc,
!                            Chars => Chars (Defining_Identifier (D))),
!                          Label_Construct => Empty);
!                      Append_To (Body_Decl_List, New_D);
  
!                      Next (D);
!                   end loop;
!                end;
              end if;
  
!             pragma Assert (Present (Handled_Statement_Sequence (Ret_Node)));
  
              Proc_Body :=
                Make_Subprogram_Body (Loc,
!                 Specification => Copy_Separate_Tree (Proc_Spec),
!                 Declarations  => Body_Decl_List,
                  Handled_Statement_Sequence =>
!                   Copy_Separate_Tree (Handled_Statement_Sequence (Ret_Node)));
  
              Set_Defining_Unit_Name (Specification (Proc_Body),
                 Make_Defining_Identifier (Loc, Subp_Name));
--- 2438,2467 ----
              --  Copy these declarations to the built procedure.
  
              if Present (Declarations (N)) then
!                Body_Decls := New_List;
  
!                Decl := First (Declarations (N));
!                while Present (Decl) loop
!                   pragma Assert (Nkind (Decl) = N_Implicit_Label_Declaration);
  
!                   Append_To (Body_Decls,
!                     Make_Implicit_Label_Declaration (Loc,
!                       Make_Defining_Identifier (Loc,
!                         Chars => Chars (Defining_Identifier (Decl))),
!                       Label_Construct => Empty));
  
!                   Next (Decl);
!                end loop;
              end if;
  
!             pragma Assert (Present (Handled_Statement_Sequence (Ret_Stmt)));
  
              Proc_Body :=
                Make_Subprogram_Body (Loc,
!                 Specification              => Copy_Subprogram_Spec (Proc_Spec),
!                 Declarations               => Body_Decls,
                  Handled_Statement_Sequence =>
!                   New_Copy_Tree (Handled_Statement_Sequence (Ret_Stmt)));
  
              Set_Defining_Unit_Name (Specification (Proc_Body),
                 Make_Defining_Identifier (Loc, Subp_Name));
*************** package body Inline is
*** 2018,2027 ****
  
           --  Local variables
  
!          New_Obj   : constant Node_Id := Copy_Separate_Tree (Ret_Obj);
           Blk_Stmt  : Node_Id;
-          Proc_Id   : Entity_Id;
           Proc_Call : Node_Id;
  
        --  Start of processing for Split_Unconstrained_Function
  
--- 2471,2480 ----
  
           --  Local variables
  
!          New_Obj   : constant Node_Id := Copy_Return_Object (Ret_Obj);
           Blk_Stmt  : Node_Id;
           Proc_Call : Node_Id;
+          Proc_Id   : Entity_Id;
  
        --  Start of processing for Split_Unconstrained_Function
  
*************** package body Inline is
*** 2089,2095 ****
                         New_Occurrence_Of
                           (Defining_Identifier (New_Obj), Loc)))));
  
!          Rewrite (Ret_Node, Blk_Stmt);
        end Split_Unconstrained_Function;
  
        --  Local variables
--- 2542,2548 ----
                         New_Occurrence_Of
                           (Defining_Identifier (New_Obj), Loc)))));
  
!          Rewrite (Ret_Stmt, Blk_Stmt);
        end Split_Unconstrained_Function;
  
        --  Local variables
*************** package body Inline is
*** 2130,2135 ****
--- 2583,2600 ----
        elsif Present (Body_To_Inline (Decl)) then
           return;
  
+       --  Do not generate a body to inline for protected functions, because the
+       --  transformation generates a call to a protected procedure, causing
+       --  spurious errors. We don't inline protected operations anyway, so
+       --  this is no loss. We might as well ignore intrinsics and foreign
+       --  conventions as well -- just allow Ada conventions.
+ 
+       elsif not (Convention (Spec_Id) = Convention_Ada
+         or else Convention (Spec_Id) = Convention_Ada_Pass_By_Copy
+         or else Convention (Spec_Id) = Convention_Ada_Pass_By_Reference)
+       then
+          return;
+ 
        --  Check excluded declarations
  
        elsif Present (Declarations (N))
*************** package body Inline is
*** 2386,2396 ****
--- 2851,2872 ----
        --  sets Exit_Lab (the label node) and Lab_Decl (corresponding implicit
        --  declaration). Does nothing if Exit_Lab already set.
  
+       procedure Make_Loop_Labels_Unique (HSS : Node_Id);
+       --  When compiling for CCG and performing front-end inlining, replace
+       --  loop names and references to them so that they do not conflict with
+       --  homographs in the current subprogram.
+ 
        function Process_Formals (N : Node_Id) return Traverse_Result;
        --  Replace occurrence of a formal with the corresponding actual, or the
        --  thunk generated for it. Replace a return statement with an assignment
        --  to the target of the call, with appropriate conversions if needed.
  
+       function Process_Formals_In_Aspects (N : Node_Id) return Traverse_Result;
+       --  Because aspects are linked indirectly to the rest of the tree,
+       --  replacement of formals appearing in aspect specifications must
+       --  be performed in a separate pass, using an instantiation of the
+       --  previous subprogram over aspect specifications reachable from N.
+ 
        function Process_Sloc (Nod : Node_Id) return Traverse_Result;
        --  If the call being expanded is that of an internal subprogram, set the
        --  sloc of the generated block to that of the call itself, so that the
*************** package body Inline is
*** 2474,2479 ****
--- 2950,3010 ----
           end if;
        end Make_Exit_Label;
  
+       -----------------------------
+       -- Make_Loop_Labels_Unique --
+       -----------------------------
+ 
+       procedure Make_Loop_Labels_Unique (HSS : Node_Id) is
+          function Process_Loop (N : Node_Id) return Traverse_Result;
+ 
+          ------------------
+          -- Process_Loop --
+          ------------------
+ 
+          function Process_Loop (N : Node_Id) return Traverse_Result is
+             Id  : Entity_Id;
+ 
+          begin
+             if Nkind (N) = N_Loop_Statement
+               and then Present (Identifier (N))
+             then
+                --  Create new external name for loop and update the
+                --  corresponding entity.
+ 
+                Id := Entity (Identifier (N));
+                Set_Chars (Id, New_External_Name (Chars (Id), 'L', -1));
+                Set_Chars (Identifier (N), Chars (Id));
+ 
+             elsif Nkind (N) = N_Exit_Statement
+               and then Present (Name (N))
+             then
+                --  The exit statement must name an enclosing loop, whose name
+                --  has already been updated.
+ 
+                Set_Chars (Name (N), Chars (Entity (Name (N))));
+             end if;
+ 
+             return OK;
+          end Process_Loop;
+ 
+          procedure Update_Loop_Names is new Traverse_Proc (Process_Loop);
+ 
+          --  Local variables
+ 
+          Stmt : Node_Id;
+ 
+       --  Start of processing for Make_Loop_Labels_Unique
+ 
+       begin
+          if Modify_Tree_For_C then
+             Stmt := First (Statements (HSS));
+             while Present (Stmt) loop
+                Update_Loop_Names (Stmt);
+                Next (Stmt);
+             end loop;
+          end if;
+       end Make_Loop_Labels_Unique;
+ 
        ---------------------
        -- Process_Formals --
        ---------------------
*************** package body Inline is
*** 2676,2681 ****
--- 3207,3236 ----
  
        procedure Replace_Formals is new Traverse_Proc (Process_Formals);
  
+       --------------------------------
+       -- Process_Formals_In_Aspects --
+       --------------------------------
+ 
+       function Process_Formals_In_Aspects
+         (N : Node_Id) return Traverse_Result
+       is
+          A : Node_Id;
+ 
+       begin
+          if Has_Aspects (N) then
+             A := First (Aspect_Specifications (N));
+             while Present (A) loop
+                Replace_Formals (Expression (A));
+ 
+                Next (A);
+             end loop;
+          end if;
+          return OK;
+       end Process_Formals_In_Aspects;
+ 
+       procedure Replace_Formals_In_Aspects is
+         new Traverse_Proc (Process_Formals_In_Aspects);
+ 
        ------------------
        -- Process_Sloc --
        ------------------
*************** package body Inline is
*** 2742,2747 ****
--- 3297,3304 ----
           Fst : constant Node_Id := First (Statements (HSS));
  
        begin
+          Make_Loop_Labels_Unique (HSS);
+ 
           --  Optimize simple case: function body is a single return statement,
           --  which has been expanded into an assignment.
  
*************** package body Inline is
*** 2829,2834 ****
--- 3386,3393 ----
           HSS  : constant Node_Id := Handled_Statement_Sequence (Blk);
  
        begin
+          Make_Loop_Labels_Unique (HSS);
+ 
           --  If there is a transient scope for N, this will be the scope of the
           --  actions for N, and the statements in Blk need to be within this
           --  scope. For example, they need to have visibility on the constant
*************** package body Inline is
*** 3484,3489 ****
--- 4043,4049 ----
        --  Attach block to tree before analysis and rewriting.
  
        Replace_Formals (Blk);
+       Replace_Formals_In_Aspects (Blk);
        Set_Parent (Blk, N);
  
        if GNATprove_Mode then
*************** package body Inline is
*** 4013,4020 ****
  
     procedure Initialize is
     begin
-       Pending_Descriptor.Init;
        Pending_Instantiations.Init;
        Inlined_Bodies.Init;
        Successors.Init;
        Inlined.Init;
--- 4573,4580 ----
  
     procedure Initialize is
     begin
        Pending_Instantiations.Init;
+       Called_Pending_Instantiations.Init;
        Inlined_Bodies.Init;
        Successors.Init;
        Inlined.Init;
*************** package body Inline is
*** 4025,4030 ****
--- 4585,4591 ----
  
        Inlined_Calls := No_Elist;
        Backend_Calls := No_Elist;
+       Backend_Instances := No_Elist;
        Backend_Inlined_Subps := No_Elist;
        Backend_Not_Inlined_Subps := No_Elist;
     end Initialize;
*************** package body Inline is
*** 4041,4049 ****
     --  the body is an internal error.
  
     procedure Instantiate_Bodies is
!       J    : Nat;
        Info : Pending_Body_Info;
  
     begin
        if Serious_Errors_Detected = 0 then
           Expander_Active := (Operating_Mode = Opt.Generate_Code);
--- 4602,4644 ----
     --  the body is an internal error.
  
     procedure Instantiate_Bodies is
! 
!       procedure Instantiate_Body (Info : Pending_Body_Info);
!       --  Instantiate a pending body
! 
!       ------------------------
!       --  Instantiate_Body  --
!       ------------------------
! 
!       procedure Instantiate_Body (Info : Pending_Body_Info) is
!       begin
!          --  If the instantiation node is absent, it has been removed as part
!          --  of unreachable code.
! 
!          if No (Info.Inst_Node) then
!             null;
! 
!          --  If the instantiation node is a package body, this means that the
!          --  instance is a compilation unit and the instantiation has already
!          --  been performed by Build_Instance_Compilation_Unit_Nodes.
! 
!          elsif Nkind (Info.Inst_Node) = N_Package_Body then
!             null;
! 
!          elsif Nkind (Info.Act_Decl) = N_Package_Declaration then
!             Instantiate_Package_Body (Info);
!             Add_Scope_To_Clean (Defining_Entity (Info.Act_Decl));
! 
!          else
!             Instantiate_Subprogram_Body (Info);
!          end if;
!       end Instantiate_Body;
! 
!       J, K  : Nat;
        Info : Pending_Body_Info;
  
+    --  Start of processing for Instantiate_Bodies
+ 
     begin
        if Serious_Errors_Detected = 0 then
           Expander_Active := (Operating_Mode = Opt.Generate_Code);
*************** package body Inline is
*** 4056,4091 ****
  
           --  A body instantiation may generate additional instantiations, so
           --  the following loop must scan to the end of a possibly expanding
!          --  set (that's why we can't simply use a FOR loop here).
  
           J := 0;
!          while J <= Pending_Instantiations.Last
!            and then Serious_Errors_Detected = 0
!          loop
!             Info := Pending_Instantiations.Table (J);
! 
!             --  If the instantiation node is absent, it has been removed
!             --  as part of unreachable code.
! 
!             if No (Info.Inst_Node) then
!                null;
  
!             elsif Nkind (Info.Act_Decl) = N_Package_Declaration then
!                Instantiate_Package_Body (Info);
!                Add_Scope_To_Clean (Defining_Entity (Info.Act_Decl));
  
!             else
!                Instantiate_Subprogram_Body (Info);
!             end if;
  
!             J := J + 1;
!          end loop;
  
           --  Reset the table of instantiations. Additional instantiations
           --  may be added through inlining, when additional bodies are
           --  analyzed.
  
!          Pending_Instantiations.Init;
  
           --  We can now complete the cleanup actions of scopes that contain
           --  pending instantiations (skipped for generic units, since we
--- 4651,4691 ----
  
           --  A body instantiation may generate additional instantiations, so
           --  the following loop must scan to the end of a possibly expanding
!          --  set (that's why we cannot simply use a FOR loop here). We must
!          --  also capture the element lest the set be entirely reallocated.
  
           J := 0;
!          if Back_End_Inlining then
!             while J <= Called_Pending_Instantiations.Last
!               and then Serious_Errors_Detected = 0
!             loop
!                K := Called_Pending_Instantiations.Table (J);
!                Info := Pending_Instantiations.Table (K);
!                Instantiate_Body (Info);
  
!                J := J + 1;
!             end loop;
  
!          else
!             while J <= Pending_Instantiations.Last
!               and then Serious_Errors_Detected = 0
!             loop
!                Info := Pending_Instantiations.Table (J);
!                Instantiate_Body (Info);
  
!                J := J + 1;
!             end loop;
!          end if;
  
           --  Reset the table of instantiations. Additional instantiations
           --  may be added through inlining, when additional bodies are
           --  analyzed.
  
!          if Back_End_Inlining then
!             Called_Pending_Instantiations.Init;
!          else
!             Pending_Instantiations.Init;
!          end if;
  
           --  We can now complete the cleanup actions of scopes that contain
           --  pending instantiations (skipped for generic units, since we
*************** package body Inline is
*** 4113,4119 ****
     begin
        Scop := Scope (E);
        while Scop /= Standard_Standard loop
!          if Ekind (Scop) in Subprogram_Kind then
              return True;
  
           elsif Ekind (Scop) = E_Task_Type
--- 4713,4719 ----
     begin
        Scop := Scope (E);
        while Scop /= Standard_Standard loop
!          if Is_Subprogram (Scop) then
              return True;
  
           elsif Ekind (Scop) = E_Task_Type
*************** package body Inline is
*** 4151,4157 ****
           while Present (Elmt) loop
              Nod := Node (Elmt);
  
!             if In_Extended_Main_Code_Unit (Nod) then
                 Count := Count + 1;
  
                 if Count = 1 then
--- 4751,4757 ----
           while Present (Elmt) loop
              Nod := Node (Elmt);
  
!             if not In_Internal_Unit (Nod) then
                 Count := Count + 1;
  
                 if Count = 1 then
*************** package body Inline is
*** 4180,4186 ****
           while Present (Elmt) loop
              Nod := Node (Elmt);
  
!             if In_Extended_Main_Code_Unit (Nod) then
                 Count := Count + 1;
  
                 if Count = 1 then
--- 4780,4786 ----
           while Present (Elmt) loop
              Nod := Node (Elmt);
  
!             if not In_Internal_Unit (Nod) then
                 Count := Count + 1;
  
                 if Count = 1 then
*************** package body Inline is
*** 4199,4204 ****
--- 4799,4832 ----
           end loop;
        end if;
  
+       --  Generate listing of instances inlined for the backend
+ 
+       if Present (Backend_Instances) then
+          Count := 0;
+ 
+          Elmt := First_Elmt (Backend_Instances);
+          while Present (Elmt) loop
+             Nod := Node (Elmt);
+ 
+             if not In_Internal_Unit (Nod) then
+                Count := Count + 1;
+ 
+                if Count = 1 then
+                   Write_Str ("List of instances inlined for the backend");
+                   Write_Eol;
+                end if;
+ 
+                Write_Str ("  ");
+                Write_Int (Count);
+                Write_Str (":");
+                Write_Location (Sloc (Nod));
+                Output.Write_Eol;
+             end if;
+ 
+             Next_Elmt (Elmt);
+          end loop;
+       end if;
+ 
        --  Generate listing of subprograms passed to the backend
  
        if Present (Backend_Inlined_Subps) and then Back_End_Inlining then
*************** package body Inline is
*** 4208,4229 ****
           while Present (Elmt) loop
              Nod := Node (Elmt);
  
!             Count := Count + 1;
  
!             if Count = 1 then
!                Write_Str
!                  ("List of inlined subprograms passed to the backend");
!                Write_Eol;
!             end if;
  
!             Write_Str ("  ");
!             Write_Int (Count);
!             Write_Str (":");
!             Write_Name (Chars (Nod));
!             Write_Str (" (");
!             Write_Location (Sloc (Nod));
!             Write_Str (")");
!             Output.Write_Eol;
  
              Next_Elmt (Elmt);
           end loop;
--- 4836,4859 ----
           while Present (Elmt) loop
              Nod := Node (Elmt);
  
!             if not In_Internal_Unit (Nod) then
!                Count := Count + 1;
  
!                if Count = 1 then
!                   Write_Str
!                     ("List of inlined subprograms passed to the backend");
!                   Write_Eol;
!                end if;
  
!                Write_Str ("  ");
!                Write_Int (Count);
!                Write_Str (":");
!                Write_Name (Chars (Nod));
!                Write_Str (" (");
!                Write_Location (Sloc (Nod));
!                Write_Str (")");
!                Output.Write_Eol;
!             end if;
  
              Next_Elmt (Elmt);
           end loop;
*************** package body Inline is
*** 4238,4259 ****
           while Present (Elmt) loop
              Nod := Node (Elmt);
  
!             Count := Count + 1;
  
!             if Count = 1 then
!                Write_Str
!                  ("List of subprograms that cannot be inlined by the backend");
!                Write_Eol;
!             end if;
  
!             Write_Str ("  ");
!             Write_Int (Count);
!             Write_Str (":");
!             Write_Name (Chars (Nod));
!             Write_Str (" (");
!             Write_Location (Sloc (Nod));
!             Write_Str (")");
!             Output.Write_Eol;
  
              Next_Elmt (Elmt);
           end loop;
--- 4868,4891 ----
           while Present (Elmt) loop
              Nod := Node (Elmt);
  
!             if not In_Internal_Unit (Nod) then
!                Count := Count + 1;
  
!                if Count = 1 then
!                   Write_Str
!                     ("List of subprograms that cannot be inlined by backend");
!                   Write_Eol;
!                end if;
  
!                Write_Str ("  ");
!                Write_Int (Count);
!                Write_Str (":");
!                Write_Name (Chars (Nod));
!                Write_Str (" (");
!                Write_Location (Sloc (Nod));
!                Write_Str (")");
!                Output.Write_Eol;
!             end if;
  
              Next_Elmt (Elmt);
           end loop;
*************** package body Inline is
*** 4268,4273 ****
--- 4900,4907 ----
     begin
        Pending_Instantiations.Release;
        Pending_Instantiations.Locked := True;
+       Called_Pending_Instantiations.Release;
+       Called_Pending_Instantiations.Locked := True;
        Inlined_Bodies.Release;
        Inlined_Bodies.Locked := True;
        Successors.Release;
diff -Nrcpad gcc-9.3.0/gcc/ada/inline.ads gcc-10.1.0/gcc/ada/inline.ads
*** gcc-9.3.0/gcc/ada/inline.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/inline.ads	Thu May  7 10:49:59 2020
***************
*** 42,51 ****
  --  Inline_Always subprograms, but there are fewer restrictions on the source
  --  of subprograms.
  
- with Alloc;
  with Opt;    use Opt;
  with Sem;    use Sem;
- with Table;
  with Types;  use Types;
  with Warnsw; use Warnsw;
  
--- 42,49 ----
*************** package Inline is
*** 100,127 ****
        --  Capture values of warning flags
     end record;
  
-    package Pending_Instantiations is new Table.Table (
-      Table_Component_Type => Pending_Body_Info,
-      Table_Index_Type     => Int,
-      Table_Low_Bound      => 0,
-      Table_Initial        => Alloc.Pending_Instantiations_Initial,
-      Table_Increment      => Alloc.Pending_Instantiations_Increment,
-      Table_Name           => "Pending_Instantiations");
- 
-    --  The following table records subprograms and packages for which
-    --  generation of subprogram descriptors must be delayed.
- 
-    package Pending_Descriptor is new Table.Table (
-      Table_Component_Type => Entity_Id,
-      Table_Index_Type     => Int,
-      Table_Low_Bound      => 0,
-      Table_Initial        => Alloc.Pending_Instantiations_Initial,
-      Table_Increment      => Alloc.Pending_Instantiations_Increment,
-      Table_Name           => "Pending_Descriptor");
- 
-    --  The following should be initialized in an init call in Frontend, we
-    --  have thoughts of making the frontend reusable in future ???
- 
     -----------------
     -- Subprograms --
     -----------------
--- 98,103 ----
*************** package Inline is
*** 143,148 ****
--- 119,127 ----
     --  Add E's enclosing unit to Inlined_Bodies so that E can be subsequently
     --  retrieved and analyzed. N is the node giving rise to the call to E.
  
+    procedure Add_Pending_Instantiation (Inst : Node_Id; Act_Decl : Node_Id);
+    --  Add an entry in the table of generic bodies to be instantiated.
+ 
     procedure Analyze_Inlined_Bodies;
     --  At end of compilation, analyze the bodies of all units that contain
     --  inlined subprograms that are actually called.
diff -Nrcpad gcc-9.3.0/gcc/ada/layout.adb gcc-10.1.0/gcc/ada/layout.adb
*** gcc-9.3.0/gcc/ada/layout.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/layout.adb	Thu May  7 10:49:59 2020
*************** package body Layout is
*** 435,451 ****
              end;
           end if;
  
!          --  If Esize is set, and RM_Size is not, RM_Size is copied from Esize.
!          --  At least for now this seems reasonable, and is in any case needed
!          --  for compatibility with old versions of gigi.
! 
!          if Known_Esize (E) and then Unknown_RM_Size (E) then
!             Set_RM_Size (E, Esize (E));
!          end if;
! 
!          --  For array base types, set component size if object size of the
           --  component type is known and is a small power of 2 (8, 16, 32, 64),
!          --  since this is what will always be used.
  
           if Ekind (E) = E_Array_Type and then Unknown_Component_Size (E) then
              declare
--- 435,446 ----
              end;
           end if;
  
!          --  For array base types, set the component size if object size of the
           --  component type is known and is a small power of 2 (8, 16, 32, 64),
!          --  since this is what will always be used, except if a very large
!          --  alignment was specified and so Adjust_Esize_For_Alignment gave up
!          --  because, in this case, the object size is not a multiple of the
!          --  alignment and, therefore, cannot be the component size.
  
           if Ekind (E) = E_Array_Type and then Unknown_Component_Size (E) then
              declare
*************** package body Layout is
*** 458,463 ****
--- 453,461 ----
                 if Present (CT)
                   and then Is_Scalar_Type (CT)
                   and then Known_Static_Esize (CT)
+                  and then not (Known_Alignment (CT)
+                                 and then Alignment_In_Bits (CT) >
+                                            Standard_Long_Long_Integer_Size)
                 then
                    declare
                       S : constant Uint := Esize (CT);
*************** package body Layout is
*** 758,766 ****
           end if;
  
           --  Check components. If any component requires a higher alignment,
!          --  then we set that higher alignment in any case. Don't do this if
!          --  we have Optimize_Alignment set to Space. Note that that covers
!          --  the case of packed records, where we already set alignment to 1.
  
           if not Optimize_Alignment_Space (E) then
              declare
--- 756,764 ----
           end if;
  
           --  Check components. If any component requires a higher alignment,
!          --  then we set that higher alignment in any case. Don't do this if we
!          --  have Optimize_Alignment set to Space. Note that covers the case of
!          --  packed records, where we already set alignment to 1.
  
           if not Optimize_Alignment_Space (E) then
              declare
diff -Nrcpad gcc-9.3.0/gcc/ada/layout.ads gcc-10.1.0/gcc/ada/layout.ads
*** gcc-9.3.0/gcc/ada/layout.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/layout.ads	Thu May  7 10:49:59 2020
*************** package Layout is
*** 34,40 ****
  
     --  The following procedures are called from Freeze, so all entities
     --  for types and objects that get frozen (which should be all such
!    --  entities which are seen by the back end) will get layed out by one
     --  of these two procedures.
  
     procedure Layout_Type (E : Entity_Id);
--- 34,40 ----
  
     --  The following procedures are called from Freeze, so all entities
     --  for types and objects that get frozen (which should be all such
!    --  entities which are seen by the back end) will get laid out by one
     --  of these two procedures.
  
     procedure Layout_Type (E : Entity_Id);
diff -Nrcpad gcc-9.3.0/gcc/ada/lib-load.adb gcc-10.1.0/gcc/ada/lib-load.adb
*** gcc-9.3.0/gcc/ada/lib-load.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/lib-load.adb	Thu May  7 10:49:59 2020
*************** package body Lib.Load is
*** 245,250 ****
--- 245,252 ----
           Version                => 0,
           OA_Setting             => 'O');
  
+       Init_Unit_Name (Unum, Spec_Name);
+ 
        Set_Comes_From_Source_Default (Save_CS);
        Set_Error_Posted (Cunit_Entity);
        Set_Error_Posted (Cunit);
*************** package body Lib.Load is
*** 607,617 ****
  
        --  See if we already have an entry for this unit
  
!       Unum := Main_Unit;
!       while Unum <= Units.Last loop
!          exit when Uname_Actual = Units.Table (Unum).Unit_Name;
!          Unum := Unum + 1;
!       end loop;
  
        --  Whether or not the entry was found, Unum is now the right value,
        --  since it is one more than Units.Last (i.e. the index of the new
--- 609,618 ----
  
        --  See if we already have an entry for this unit
  
!       Unum := Unit_Names.Get (Uname_Actual);
!       if Unum = No_Unit then
!          Unum := Units.Last + 1;
!       end if;
  
        --  Whether or not the entry was found, Unum is now the right value,
        --  since it is one more than Units.Last (i.e. the index of the new
*************** package body Lib.Load is
*** 727,733 ****
           --  found case to print the dependency chain including the last entry
  
           Units.Increment_Last;
!          Units.Table (Unum).Unit_Name := Uname_Actual;
  
           --  File was found
  
--- 728,734 ----
           --  found case to print the dependency chain including the last entry
  
           Units.Increment_Last;
!          Init_Unit_Name (Unum, Uname_Actual);
  
           --  File was found
  
*************** package body Lib.Load is
*** 893,906 ****
                 --  subsequent missing files.
  
                 Load_Stack.Decrement_Last;
!                Units.Decrement_Last;
  
              --  If unit not required, remove load stack entry and the junk
              --  file table entry, and return No_Unit to indicate not found,
  
              else
                 Load_Stack.Decrement_Last;
!                Units.Decrement_Last;
              end if;
  
              Unum := No_Unit;
--- 894,907 ----
                 --  subsequent missing files.
  
                 Load_Stack.Decrement_Last;
!                Remove_Unit (Unum);
  
              --  If unit not required, remove load stack entry and the junk
              --  file table entry, and return No_Unit to indicate not found,
  
              else
                 Load_Stack.Decrement_Last;
!                Remove_Unit (Unum);
              end if;
  
              Unum := No_Unit;
*************** package body Lib.Load is
*** 921,937 ****
     --------------------------
  
     procedure Make_Child_Decl_Unit (N : Node_Id) is
!       Unit_Decl : constant Node_Id := Library_Unit (N);
  
     begin
        Units.Increment_Last;
!       Units.Table (Units.Last) := Units.Table (Get_Cunit_Unit_Number (N));
!       Units.Table (Units.Last).Unit_Name :=
!         Get_Spec_Name (Unit_Name (Get_Cunit_Unit_Number (N)));
        Units.Table (Units.Last).Cunit := Unit_Decl;
        Units.Table (Units.Last).Cunit_Entity  :=
          Defining_Identifier
            (Defining_Unit_Name (Specification (Unit (Unit_Decl))));
  
        --  The library unit created for of a child subprogram unit plays no
        --  role in code generation and binding, so label it accordingly.
--- 922,938 ----
     --------------------------
  
     procedure Make_Child_Decl_Unit (N : Node_Id) is
!       Unit_Decl : constant Node_Id          := Library_Unit (N);
!       Unit_Num  : constant Unit_Number_Type := Get_Cunit_Unit_Number (N);
  
     begin
        Units.Increment_Last;
!       Units.Table (Units.Last) := Units.Table (Unit_Num);
        Units.Table (Units.Last).Cunit := Unit_Decl;
        Units.Table (Units.Last).Cunit_Entity  :=
          Defining_Identifier
            (Defining_Unit_Name (Specification (Unit (Unit_Decl))));
+       Init_Unit_Name (Units.Last, Get_Spec_Name (Unit_Name (Unit_Num)));
  
        --  The library unit created for of a child subprogram unit plays no
        --  role in code generation and binding, so label it accordingly.
*************** package body Lib.Load is
*** 963,973 ****
           Units.Table (Units.Last)               := Units.Table (Main_Unit);
           Units.Table (Units.Last).Cunit         := Library_Unit (N);
           Units.Table (Units.Last).Generate_Code := True;
           Units.Table (Main_Unit).Cunit          := N;
-          Units.Table (Main_Unit).Unit_Name      :=
-            Get_Body_Name
-              (Unit_Name (Get_Cunit_Unit_Number (Library_Unit (N))));
           Units.Table (Main_Unit).Version        := Source_Checksum (Sind);
  
        else
           --  Duplicate information from instance unit, for the body. The unit
--- 964,976 ----
           Units.Table (Units.Last)               := Units.Table (Main_Unit);
           Units.Table (Units.Last).Cunit         := Library_Unit (N);
           Units.Table (Units.Last).Generate_Code := True;
+          Init_Unit_Name (Units.Last, Unit_Name (Main_Unit));
+ 
           Units.Table (Main_Unit).Cunit          := N;
           Units.Table (Main_Unit).Version        := Source_Checksum (Sind);
+          Init_Unit_Name (Main_Unit,
+            Get_Body_Name
+              (Unit_Name (Get_Cunit_Unit_Number (Library_Unit (N)))));
  
        else
           --  Duplicate information from instance unit, for the body. The unit
diff -Nrcpad gcc-9.3.0/gcc/ada/lib-writ.adb gcc-10.1.0/gcc/ada/lib-writ.adb
*** gcc-9.3.0/gcc/ada/lib-writ.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/lib-writ.adb	Thu May  7 10:49:59 2020
*************** with System.WCh_Con;   use System.WCh_Co
*** 59,67 ****
  package body Lib.Writ is
  
     -----------------------
!    -- Local Subprograms --
     -----------------------
  
     procedure Write_Unit_Name (N : Node_Id);
     --  Used to write out the unit name for R (pragma Restriction) lines
     --  for uses of Restriction (No_Dependence => unit-name).
--- 59,91 ----
  package body Lib.Writ is
  
     -----------------------
!    -- Local subprograms --
     -----------------------
  
+    function Present (N_Id : Name_Id) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether a name with id N_Id exists
+ 
+    procedure Write_Invocation_Construct (IC_Id : Invocation_Construct_Id);
+    pragma Inline (Write_Invocation_Construct);
+    --  Write invocation construct IC_Id to the ALI file
+ 
+    procedure Write_Invocation_Graph;
+    pragma Inline (Write_Invocation_Graph);
+    --  Write out the invocation graph
+ 
+    procedure Write_Invocation_Graph_Attributes;
+    pragma Inline (Write_Invocation_Graph_Attributes);
+    --  Write out the attributes of the invocation graph
+ 
+    procedure Write_Invocation_Relation (IR_Id : Invocation_Relation_Id);
+    pragma Inline (Write_Invocation_Relation);
+    --  Write invocation relation IR_Id to the ALI file
+ 
+    procedure Write_Invocation_Signature (IS_Id : Invocation_Signature_Id);
+    pragma Inline (Write_Invocation_Signature);
+    --  Write invocation signature IS_Id to the ALI file
+ 
     procedure Write_Unit_Name (N : Node_Id);
     --  Used to write out the unit name for R (pragma Restriction) lines
     --  for uses of Restriction (No_Dependence => unit-name).
*************** package body Lib.Writ is
*** 119,125 ****
        --  Nothing to do if we already compiled System
  
        for Unum in Units.First .. Last_Unit loop
!          if Units.Table (Unum).Source_Index = System_Source_File_Index then
              return;
           end if;
        end loop;
--- 143,149 ----
        --  Nothing to do if we already compiled System
  
        for Unum in Units.First .. Last_Unit loop
!          if Source_Index (Unum) = System_Source_File_Index then
              return;
           end if;
        end loop;
*************** package body Lib.Writ is
*** 165,170 ****
--- 189,195 ----
           Version                => 0,
           Error_Location         => No_Location,
           OA_Setting             => 'O');
+       Init_Unit_Name (Units.Last, System_Uname);
  
        --  Parse system.ads so that the checksum is set right. Style checks are
        --  not applied. The Ekind is set to ensure that this reference is always
*************** package body Lib.Writ is
*** 185,190 ****
--- 210,224 ----
        end;
     end Ensure_System_Dependency;
  
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (N_Id : Name_Id) return Boolean is
+    begin
+       return N_Id /= No_Name;
+    end Present;
+ 
     ---------------
     -- Write_ALI --
     ---------------
*************** package body Lib.Writ is
*** 398,404 ****
  
           Id := First_Sdep_Entry;
           for J in 1 .. Num_Sdep loop
!             Sind := Units.Table (Sdep_Table (J)).Source_Index;
  
              while Sdep.Table (Id).Sfile /= File_Name (Sind) loop
                 if Id = Sdep.Last then
--- 432,438 ----
  
           Id := First_Sdep_Entry;
           for J in 1 .. Num_Sdep loop
!             Sind := Source_Index (Sdep_Table (J));
  
              while Sdep.Table (Id).Sfile /= File_Name (Sind) loop
                 if Id = Sdep.Last then
*************** package body Lib.Writ is
*** 1048,1054 ****
  
     begin
        --  We never write an ALI file if the original operating mode was
!       --  syntax-only (-gnats switch used in compiler invocation line)
  
        if Original_Operating_Mode = Check_Syntax then
           return;
--- 1082,1088 ----
  
     begin
        --  We never write an ALI file if the original operating mode was
!       --  syntax-only (-gnats switch used in compiler invocation line).
  
        if Original_Operating_Mode = Check_Syntax then
           return;
*************** package body Lib.Writ is
*** 1530,1536 ****
           for J in 1 .. Num_Sdep loop
              Unum := Sdep_Table (J);
              Units.Table (Unum).Dependency_Num := J;
!             Sind := Units.Table (Unum).Source_Index;
  
              Write_Info_Initiate ('D');
              Write_Info_Char (' ');
--- 1564,1570 ----
           for J in 1 .. Num_Sdep loop
              Unum := Sdep_Table (J);
              Units.Table (Unum).Dependency_Num := J;
!             Sind := Source_Index (Unum);
  
              Write_Info_Initiate ('D');
              Write_Info_Char (' ');
*************** package body Lib.Writ is
*** 1618,1623 ****
--- 1652,1661 ----
           end loop;
        end;
  
+       --  Output the invocation graph
+ 
+       Write_Invocation_Graph;
+ 
        --  Output cross-references
  
        if Opt.Xref_Active then
*************** package body Lib.Writ is
*** 1638,1643 ****
--- 1676,1854 ----
        Close_Output_Library_Info;
     end Write_ALI;
  
+    --------------------------------
+    -- Write_Invocation_Construct --
+    --------------------------------
+ 
+    procedure Write_Invocation_Construct (IC_Id : Invocation_Construct_Id) is
+    begin
+       --  G header
+ 
+       Write_Info_Initiate ('G');
+       Write_Info_Char     (' ');
+ 
+       --  line-kind
+ 
+       Write_Info_Char
+         (Invocation_Graph_Line_Kind_To_Code (Invocation_Construct_Line));
+       Write_Info_Char (' ');
+ 
+       --  construct-kind
+ 
+       Write_Info_Char (Invocation_Construct_Kind_To_Code (Kind (IC_Id)));
+       Write_Info_Char (' ');
+ 
+       --  construct-spec-placement
+ 
+       Write_Info_Char
+         (Declaration_Placement_Kind_To_Code (Spec_Placement (IC_Id)));
+       Write_Info_Char (' ');
+ 
+       --  construct-body-placement
+ 
+       Write_Info_Char
+         (Declaration_Placement_Kind_To_Code (Body_Placement (IC_Id)));
+       Write_Info_Char (' ');
+ 
+       --  construct-signature
+ 
+       Write_Invocation_Signature (Signature (IC_Id));
+       Write_Info_EOL;
+    end Write_Invocation_Construct;
+ 
+    ---------------------------------------
+    -- Write_Invocation_Graph_Attributes --
+    ---------------------------------------
+ 
+    procedure Write_Invocation_Graph_Attributes is
+    begin
+       --  G header
+ 
+       Write_Info_Initiate ('G');
+       Write_Info_Char     (' ');
+ 
+       --  line-kind
+ 
+       Write_Info_Char
+         (Invocation_Graph_Line_Kind_To_Code
+           (Invocation_Graph_Attributes_Line));
+       Write_Info_Char (' ');
+ 
+       --  encoding-kind
+ 
+       Write_Info_Char
+         (Invocation_Graph_Encoding_Kind_To_Code (Invocation_Graph_Encoding));
+       Write_Info_EOL;
+    end Write_Invocation_Graph_Attributes;
+ 
+    ----------------------------
+    -- Write_Invocation_Graph --
+    ----------------------------
+ 
+    procedure Write_Invocation_Graph is
+    begin
+       Write_Invocation_Graph_Attributes;
+ 
+       --  First write out all invocation constructs declared within the current
+       --  unit. This ensures that when this invocation is read, the invocation
+       --  constructs are materialized before they are referenced by invocation
+       --  relations.
+ 
+       For_Each_Invocation_Construct (Write_Invocation_Construct'Access);
+ 
+       --  Write out all invocation relations that originate from invocation
+       --  constructs delared in the current unit.
+ 
+       For_Each_Invocation_Relation (Write_Invocation_Relation'Access);
+    end Write_Invocation_Graph;
+ 
+    -------------------------------
+    -- Write_Invocation_Relation --
+    -------------------------------
+ 
+    procedure Write_Invocation_Relation (IR_Id : Invocation_Relation_Id) is
+    begin
+       --  G header
+ 
+       Write_Info_Initiate ('G');
+       Write_Info_Char     (' ');
+ 
+       --  line-kind
+ 
+       Write_Info_Char
+         (Invocation_Graph_Line_Kind_To_Code (Invocation_Relation_Line));
+       Write_Info_Char (' ');
+ 
+       --  relation-kind
+ 
+       Write_Info_Char (Invocation_Kind_To_Code (Kind (IR_Id)));
+       Write_Info_Char (' ');
+ 
+       --  (extra-name | "none")
+ 
+       if Present (Extra (IR_Id)) then
+          Write_Info_Name (Extra (IR_Id));
+       else
+          Write_Info_Str ("none");
+       end if;
+ 
+       Write_Info_Char (' ');
+ 
+       --  invoker-signature
+ 
+       Write_Invocation_Signature (Invoker (IR_Id));
+       Write_Info_Char (' ');
+ 
+       --  target-signature
+ 
+       Write_Invocation_Signature (Target (IR_Id));
+ 
+       Write_Info_EOL;
+    end Write_Invocation_Relation;
+ 
+    --------------------------------
+    -- Write_Invocation_Signature --
+    --------------------------------
+ 
+    procedure Write_Invocation_Signature (IS_Id : Invocation_Signature_Id) is
+    begin
+       --  [
+ 
+       Write_Info_Char ('[');
+ 
+       --  name
+ 
+       Write_Info_Name (Name (IS_Id));
+       Write_Info_Char (' ');
+ 
+       --  scope
+ 
+       Write_Info_Name (Scope (IS_Id));
+       Write_Info_Char (' ');
+ 
+       --  line
+ 
+       Write_Info_Nat  (Line (IS_Id));
+       Write_Info_Char (' ');
+ 
+       --  column
+ 
+       Write_Info_Nat  (Column (IS_Id));
+       Write_Info_Char (' ');
+ 
+       --  (locations | "none")
+ 
+       if Present (Locations (IS_Id)) then
+          Write_Info_Name (Locations (IS_Id));
+       else
+          Write_Info_Str ("none");
+       end if;
+ 
+       --  ]
+ 
+       Write_Info_Char (']');
+    end Write_Invocation_Signature;
+ 
     ---------------------
     -- Write_Unit_Name --
     ---------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/lib-writ.ads gcc-10.1.0/gcc/ada/lib-writ.ads
*** gcc-9.3.0/gcc/ada/lib-writ.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/lib-writ.ads	Thu May  7 10:49:59 2020
*************** package Lib.Writ is
*** 56,62 ****
     --  incompatible with new versions of the compiler. Any changes to ali file
     --  formats must be carefully evaluated to understand any such possible
     --  conflicts, and in particular, it is very undesirable to create conflicts
!    --  between older versions of GPS and newer versions of the compiler.
  
     --  If the following guidelines are respected, downward compatibility
     --  problems (old tools reading new ali files) should be minimized:
--- 56,63 ----
     --  incompatible with new versions of the compiler. Any changes to ali file
     --  formats must be carefully evaluated to understand any such possible
     --  conflicts, and in particular, it is very undesirable to create conflicts
!    --  between older versions of GNAT Studio and newer versions of the
!    --  compiler.
  
     --  If the following guidelines are respected, downward compatibility
     --  problems (old tools reading new ali files) should be minimized:
*************** package Lib.Writ is
*** 846,851 ****
--- 847,954 ----
     --      dependency checking, but must be present for proper interpretation
     --      of the cross-reference data.
  
+    --  -------------------------
+    --  -- G  Invocation Graph --
+    --  -------------------------
+ 
+    --  An invocation graph line has the following format:
+    --
+    --    G line-kind line-attributes
+    --
+    --      Attribute line-kind is a Character which denotes the nature of the
+    --      line. Table ALI.Invocation_Graph_Line_Codes lists all legal values.
+    --
+    --      Attribute line-attributes depends on the value of line-kind, and is
+    --      contents are described further below.
+    --
+    --  An invocation signature uniquely identifies an invocation construct in
+    --  the ALI file namespace, and has the following format:
+    --
+    --      [ name scope line column (locations | "none") ]
+    --
+    --      Attribute name is a String which denotes the name of the construct
+    --
+    --      Attribute scope is a String which denotes the qualified name of the
+    --      scope where the construct is declared.
+    --
+    --      Attribute line is a Positive which denotes the line number where the
+    --      initial declaration of the construct appears.
+    --
+    --      Attribute column is a Positive which denotes the column number where
+    --      the initial declaration of the construct appears.
+    --
+    --      Attribute locations is a String which denotes the line and column
+    --      locations of all instances where the initial declaration of the
+    --      construct appears.
+    --
+    --  When the line-kind denotes invocation graph attributes, line-attributes
+    --  are set as follows:
+    --
+    --      encoding-kind
+    --
+    --      Attribute encoding-kind is a Character which specifies the encoding
+    --      kind used when collecting invocation constructs and relations. Table
+    --      ALI.Invocation_Graph_Encoding_Codes lists all legal values.
+    --
+    --  When the line-kind denotes an invocation construct, line-attributes are
+    --  set as follows:
+    --
+    --      construct-kind construct-spec-placement construct-body-placement
+    --        construct-signature
+    --
+    --      Attribute construct-kind is a Character which denotes the nature of
+    --      the construct. Table ALI.Invocation_Construct_Codes lists all legal
+    --      values.
+    --
+    --      Attribute construct-spec-placement is a Character which denotes the
+    --      placement of the construct's spec within the unit. All legal values
+    --      are listed in table ALI.Spec_And_Body_Placement_Codes.
+    --
+    --      Attribute construct-body-placement is a Character which denotes the
+    --      placement of the construct's body within the unit. All legal values
+    --      are listed in table ALI.Spec_And_Body_Placement_Codes.
+    --
+    --      Attribute construct-signature is the invocation signature of the
+    --      construct.
+    --
+    --  When the line-kind denotes an invocation relation, line-attributes are
+    --  set as follows:
+    --
+    --      relation-kind (extra-name | "none") invoker-signature
+    --         target-signature
+    --
+    --      Attribute relation-kind is a Character which denotes the nature of
+    --      the relation. All legal values are listed in ALI.Invocation_Codes.
+    --
+    --      Attribute extra-name is a String which denotes the name of an extra
+    --      entity used for error diagnostics. The value of extra-name depends
+    --      on the relation-kind as follows:
+    --
+    --        Accept_Alternative                     - related entry
+    --        Access_Taken                           - related subprogram
+    --        Call                                   - not present
+    --        Controlled_Adjustment                  - related controlled type
+    --        Controlled_Finalization                - related controlled type
+    --        Controlled_Initialization              - related controlled type
+    --        Default_Initial_Condition_Verification - related private type
+    --        Initial_Condition_Verification         - not present
+    --        Instantiation                          - not present
+    --        Internal_Controlled_Adjustment         - related controlled type
+    --        Internal_Controlled_Finalization       - related controlled type
+    --        Internal_Controlled_Initialization     - related controlled type
+    --        Invariant_Verification                 - related private type
+    --        Postcondition_Verification             - related routine
+    --        Protected_Entry_Call                   - not present
+    --        Protected_Subprogram_Call              - not present
+    --        Task_Activation                        - not present
+    --        Task_Entry_Call                        - not present
+    --        Type_Initialization                    - related type
+    --
+    --      Attribute invoker-signature is the invocation signature of the
+    --      invoker.
+    --
+    --      Attribute target-signature is the invocation signature of the target
+ 
     --------------------------
     -- Cross-Reference Data --
     --------------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/lib-xref-spark_specific.adb gcc-10.1.0/gcc/ada/lib-xref-spark_specific.adb
*** gcc-9.3.0/gcc/ada/lib-xref-spark_specific.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/lib-xref-spark_specific.adb	Thu May  7 10:49:59 2020
*************** package body SPARK_Specific is
*** 298,303 ****
--- 298,304 ----
  
           Set_Ekind       (Heap, E_Variable);
           Set_Is_Internal (Heap, True);
+          Set_Etype       (Heap, Standard_Void_Type);
           Set_Scope       (Heap, Standard_Standard);
           Set_Has_Fully_Qualified_Name (Heap);
        end Create_Heap;
diff -Nrcpad gcc-9.3.0/gcc/ada/lib.adb gcc-10.1.0/gcc/ada/lib.adb
*** gcc-9.3.0/gcc/ada/lib.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/lib.adb	Thu May  7 10:49:59 2020
*************** package body Lib is
*** 277,284 ****
--- 277,300 ----
     end Set_OA_Setting;
  
     procedure Set_Unit_Name (U : Unit_Number_Type; N : Unit_Name_Type) is
+       Old_N : constant Unit_Name_Type := Units.Table (U).Unit_Name;
+ 
     begin
+       --  First unregister the old name, if any
+ 
+       if Old_N /= No_Unit_Name and then Unit_Names.Get (Old_N) = U then
+          Unit_Names.Set (Old_N, No_Unit);
+       end if;
+ 
+       --  Then set the new name
+ 
        Units.Table (U).Unit_Name := N;
+ 
+       --  Finally register the new name
+ 
+       if Unit_Names.Get (N) = No_Unit then
+          Unit_Names.Set (N, U);
+       end if;
     end Set_Unit_Name;
  
     ------------------------------
*************** package body Lib is
*** 1068,1073 ****
--- 1084,1099 ----
        return TSN;
     end Increment_Serial_Number;
  
+    ----------------------
+    --  Init_Unit_Name  --
+    ----------------------
+ 
+    procedure Init_Unit_Name (U : Unit_Number_Type; N : Unit_Name_Type) is
+    begin
+       Units.Table (U).Unit_Name := N;
+       Unit_Names.Set (N, U);
+    end Init_Unit_Name;
+ 
     ----------------
     -- Initialize --
     ----------------
*************** package body Lib is
*** 1087,1099 ****
  
     function Is_Loaded (Uname : Unit_Name_Type) return Boolean is
     begin
!       for Unum in Units.First .. Units.Last loop
!          if Uname = Unit_Name (Unum) then
!             return True;
!          end if;
!       end loop;
! 
!       return False;
     end Is_Loaded;
  
     ---------------
--- 1113,1119 ----
  
     function Is_Loaded (Uname : Unit_Name_Type) return Boolean is
     begin
!       return Unit_Names.Get (Uname) /= No_Unit;
     end Is_Loaded;
  
     ---------------
*************** package body Lib is
*** 1141,1146 ****
--- 1161,1167 ----
     procedure Remove_Unit (U : Unit_Number_Type) is
     begin
        if U = Units.Last then
+          Unit_Names.Set (Unit_Name (U), No_Unit);
           Units.Decrement_Last;
        end if;
     end Remove_Unit;
*************** package body Lib is
*** 1277,1282 ****
--- 1298,1312 ----
        end loop;
     end Tree_Write;
  
+    --------------------
+    -- Unit_Name_Hash --
+    --------------------
+ 
+    function Unit_Name_Hash (Id : Unit_Name_Type) return Unit_Name_Header_Num is
+    begin
+       return Unit_Name_Header_Num (Id mod Unit_Name_Table_Size);
+    end Unit_Name_Hash;
+ 
     ------------
     -- Unlock --
     ------------
diff -Nrcpad gcc-9.3.0/gcc/ada/lib.ads gcc-10.1.0/gcc/ada/lib.ads
*** gcc-9.3.0/gcc/ada/lib.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/lib.ads	Thu May  7 10:49:59 2020
*************** with Namet; use Namet;
*** 37,42 ****
--- 37,44 ----
  with Table;
  with Types; use Types;
  
+ with GNAT.HTable;
+ 
  package Lib is
  
     type Unit_Ref_Table is array (Pos range <>) of Unit_Number_Type;
*************** package Lib is
*** 474,479 ****
--- 476,483 ----
     function Unit_Name        (U : Unit_Number_Type) return Unit_Name_Type;
     --  Get value of named field from given units table entry
  
+    --  WARNING: There is a matching C declaration of a few subprograms in fe.h
+ 
     procedure Set_Cunit            (U : Unit_Number_Type; N : Node_Id);
     procedure Set_Cunit_Entity     (U : Unit_Number_Type; E : Entity_Id);
     procedure Set_Dynamic_Elab     (U : Unit_Number_Type; B : Boolean := True);
*************** package Lib is
*** 615,620 ****
--- 619,626 ----
     --  the special case check to that routine. This avoids some difficulties
     --  with some other calls that malfunctioned with the odd return of True.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function In_Extended_Main_Code_Unit (Loc : Source_Ptr) return Boolean;
     --  Same function as above, but argument is a source pointer rather
     --  than a node.
*************** private
*** 823,843 ****
     pragma Inline (Increment_Primary_Stack_Count);
     pragma Inline (Increment_Sec_Stack_Count);
     pragma Inline (Increment_Serial_Number);
     pragma Inline (Loading);
     pragma Inline (Main_CPU);
     pragma Inline (Main_Priority);
     pragma Inline (Munit_Index);
     pragma Inline (No_Elab_Code_All);
     pragma Inline (OA_Setting);
     pragma Inline (Set_Cunit);
     pragma Inline (Set_Cunit_Entity);
     pragma Inline (Set_Fatal_Error);
     pragma Inline (Set_Generate_Code);
     pragma Inline (Set_Has_RACW);
-    pragma Inline (Is_Predefined_Renaming);
-    pragma Inline (Is_Internal_Unit);
-    pragma Inline (Is_Predefined_Unit);
-    pragma Inline (Primary_Stack_Count);
     pragma Inline (Sec_Stack_Count);
     pragma Inline (Set_Loading);
     pragma Inline (Set_Main_CPU);
--- 829,850 ----
     pragma Inline (Increment_Primary_Stack_Count);
     pragma Inline (Increment_Sec_Stack_Count);
     pragma Inline (Increment_Serial_Number);
+    pragma Inline (Is_Internal_Unit);
+    pragma Inline (Is_Loaded);
+    pragma Inline (Is_Predefined_Renaming);
+    pragma Inline (Is_Predefined_Unit);
     pragma Inline (Loading);
     pragma Inline (Main_CPU);
     pragma Inline (Main_Priority);
     pragma Inline (Munit_Index);
     pragma Inline (No_Elab_Code_All);
     pragma Inline (OA_Setting);
+    pragma Inline (Primary_Stack_Count);
     pragma Inline (Set_Cunit);
     pragma Inline (Set_Cunit_Entity);
     pragma Inline (Set_Fatal_Error);
     pragma Inline (Set_Generate_Code);
     pragma Inline (Set_Has_RACW);
     pragma Inline (Sec_Stack_Count);
     pragma Inline (Set_Loading);
     pragma Inline (Set_Main_CPU);
*************** private
*** 930,935 ****
--- 937,972 ----
       Table_Increment      => Alloc.Units_Increment,
       Table_Name           => "Units");
  
+    --  The following table records a mapping between a name and the entry in
+    --  the units table whose Unit_Name is this name. It is used to speed up
+    --  the Is_Loaded function, whose original implementation (linear search)
+    --  could account for 2% of the time spent in the front end. Note that, in
+    --  the case of source files containing multiple units, the units table may
+    --  temporarily contain two entries with the same Unit_Name during parsing,
+    --  which means that the mapping must be to the first entry in the table.
+ 
+    Unit_Name_Table_Size : constant := 257;
+    --  Number of headers in hash table
+ 
+    subtype Unit_Name_Header_Num is Integer range 0 .. Unit_Name_Table_Size - 1;
+    --  Range of headers in hash table
+ 
+    function Unit_Name_Hash (Id : Unit_Name_Type) return Unit_Name_Header_Num;
+    --  Simple hash function for Unit_Name_Types
+ 
+    package Unit_Names is new GNAT.Htable.Simple_HTable
+      (Header_Num => Unit_Name_Header_Num,
+       Element    => Unit_Number_Type,
+       No_Element => No_Unit,
+       Key        => Unit_Name_Type,
+       Hash       => Unit_Name_Hash,
+       Equal      => "=");
+ 
+    procedure Init_Unit_Name (U : Unit_Number_Type; N : Unit_Name_Type);
+    pragma Inline (Init_Unit_Name);
+    --  Both set the Unit_Name for the given units table entry and register a
+    --  mapping between this name and the entry.
+ 
     --  The following table stores strings from pragma Linker_Option lines
  
     type Linker_Option_Entry is record
*************** private
*** 993,999 ****
     --  clause. The First entry is the main unit. The second entry, if present
     --  is a unit on which the first unit depends, etc. This stack is used to
     --  generate error messages showing the dependency chain if a file is not
!    --  found, or whether a true circular dependency exists.  The Load_Unit
     --  function makes an entry in this table when it is called, and removes
     --  the entry just before it returns.
  
--- 1030,1036 ----
     --  clause. The First entry is the main unit. The second entry, if present
     --  is a unit on which the first unit depends, etc. This stack is used to
     --  generate error messages showing the dependency chain if a file is not
!    --  found, or whether a true circular dependency exists. The Load_Unit
     --  function makes an entry in this table when it is called, and removes
     --  the entry just before it returns.
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/a-dispat.ads gcc-10.1.0/gcc/ada/libgnarl/a-dispat.ads
*** gcc-9.3.0/gcc/ada/libgnarl/a-dispat.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/a-dispat.ads	Thu May  7 10:49:59 2020
***************
*** 13,23 ****
  --                                                                          --
  ------------------------------------------------------------------------------
  
  package Ada.Dispatching is
     pragma Preelaborate (Dispatching);
  
     procedure Yield with
!      Global => null;
  
     Dispatching_Policy_Error : exception;
  end Ada.Dispatching;
--- 13,25 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
+ with Ada.Task_Identification;
+ 
  package Ada.Dispatching is
     pragma Preelaborate (Dispatching);
  
     procedure Yield with
!      Global => (In_Out => Ada.Task_Identification.Tasking_State);
  
     Dispatching_Policy_Error : exception;
  end Ada.Dispatching;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/a-taside.ads gcc-10.1.0/gcc/ada/libgnarl/a-taside.ads
*** gcc-9.3.0/gcc/ada/libgnarl/a-taside.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/a-taside.ads	Thu May  7 10:49:59 2020
***************
*** 33,38 ****
--- 33,44 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
+ --  Preconditions in this unit are meant for analysis only, not for run-time
+ --  checking, so that the expected exceptions are raised.
+ --  This is enforced by setting the corresponding assertion policy to Ignore.
+ 
+ pragma Assertion_Policy (Pre => Ignore);
+ 
  with System;
  with System.Tasking;
  
*************** is
*** 67,83 ****
--- 73,92 ----
     pragma Inline (Environment_Task);
  
     procedure Abort_Task (T : Task_Id) with
+      Pre    => T /= Null_Task_Id,
       Global => null;
     pragma Inline (Abort_Task);
     --  Note: parameter is mode IN, not IN OUT, per AI-00101
  
     function Is_Terminated (T : Task_Id) return Boolean with
       Volatile_Function,
+      Pre    => T /= Null_Task_Id,
       Global => Tasking_State;
     pragma Inline (Is_Terminated);
  
     function Is_Callable (T : Task_Id) return Boolean with
       Volatile_Function,
+      Pre    => T /= Null_Task_Id,
       Global => Tasking_State;
     pragma Inline (Is_Callable);
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/g-thread.adb gcc-10.1.0/gcc/ada/libgnarl/g-thread.adb
*** gcc-9.3.0/gcc/ada/libgnarl/g-thread.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/g-thread.adb	Thu May  7 10:49:59 2020
*************** package body GNAT.Threads is
*** 168,176 ****
     ----------------
  
     procedure Get_Thread (Id : Address; Thread : Address) is
-       Thr : constant Thread_Id_Ptr := To_Thread (Thread);
     begin
!       Thr.all := Task_Primitives.Operations.Get_Thread_Id (To_Id (Id));
     end Get_Thread;
  
     ----------------------
--- 168,181 ----
     ----------------
  
     procedure Get_Thread (Id : Address; Thread : Address) is
     begin
!       To_Thread (Thread).all :=
!         Task_Primitives.Operations.Get_Thread_Id (To_Id (Id));
!    end Get_Thread;
! 
!    procedure Get_Thread (Id : Task_Id; Thread : Address) is
!    begin
!       Get_Thread (To_Addr (Id), Thread);
     end Get_Thread;
  
     ----------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/g-thread.ads gcc-10.1.0/gcc/ada/libgnarl/g-thread.ads
*** gcc-9.3.0/gcc/ada/libgnarl/g-thread.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/g-thread.ads	Thu May  7 10:49:59 2020
*************** package GNAT.Threads is
*** 129,137 ****
  
     procedure Get_Thread (Id : System.Address; Thread : System.Address);
     pragma Export (C, Get_Thread, "__gnat_get_thread");
     --  This procedure is used to retrieve the thread id of a given task.
     --  The value Id is the value that was passed to the thread code procedure
!    --  at activation time.
     --  Thread is a pointer to a thread id that will be updated by this
     --  procedure.
     --
--- 129,139 ----
  
     procedure Get_Thread (Id : System.Address; Thread : System.Address);
     pragma Export (C, Get_Thread, "__gnat_get_thread");
+    procedure Get_Thread
+      (Id : Ada.Task_Identification.Task_Id; Thread : System.Address);
     --  This procedure is used to retrieve the thread id of a given task.
     --  The value Id is the value that was passed to the thread code procedure
!    --  at activation time or a Task_Id.
     --  Thread is a pointer to a thread id that will be updated by this
     --  procedure.
     --
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-interr.adb gcc-10.1.0/gcc/ada/libgnarl/s-interr.adb
*** gcc-9.3.0/gcc/ada/libgnarl/s-interr.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-interr.adb	Thu May  7 10:49:59 2020
*************** package body System.Interrupts is
*** 545,553 ****
  
     function Is_Registered (Handler : Parameterless_Handler) return Boolean is
  
        type Fat_Ptr is record
           Object_Addr  : System.Address;
!          Handler_Addr : System.Address;
        end record;
  
        function To_Fat_Ptr is new Ada.Unchecked_Conversion
--- 545,555 ----
  
     function Is_Registered (Handler : Parameterless_Handler) return Boolean is
  
+       type Acc_Proc is access procedure;
+ 
        type Fat_Ptr is record
           Object_Addr  : System.Address;
!          Handler_Addr : Acc_Proc;
        end record;
  
        function To_Fat_Ptr is new Ada.Unchecked_Conversion
*************** package body System.Interrupts is
*** 565,571 ****
  
        Ptr := Registered_Handler_Head;
        while Ptr /= null loop
!          if Ptr.H = Fat.Handler_Addr then
              return True;
           end if;
  
--- 567,573 ----
  
        Ptr := Registered_Handler_Head;
        while Ptr /= null loop
!          if Ptr.H = Fat.Handler_Addr.all'Address then
              return True;
           end if;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-interr__hwint.adb gcc-10.1.0/gcc/ada/libgnarl/s-interr__hwint.adb
*** gcc-9.3.0/gcc/ada/libgnarl/s-interr__hwint.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-interr__hwint.adb	Thu May  7 10:49:59 2020
*************** package body System.Interrupts is
*** 561,569 ****
     -------------------
  
     function Is_Registered (Handler : Parameterless_Handler) return Boolean is
        type Fat_Ptr is record
           Object_Addr  : System.Address;
!          Handler_Addr : System.Address;
        end record;
  
        function To_Fat_Ptr is new Ada.Unchecked_Conversion
--- 561,572 ----
     -------------------
  
     function Is_Registered (Handler : Parameterless_Handler) return Boolean is
+ 
+       type Acc_Proc is access procedure;
+ 
        type Fat_Ptr is record
           Object_Addr  : System.Address;
!          Handler_Addr : Acc_Proc;
        end record;
  
        function To_Fat_Ptr is new Ada.Unchecked_Conversion
*************** package body System.Interrupts is
*** 581,587 ****
  
        Ptr := Registered_Handler_Head;
        while Ptr /= null loop
!          if Ptr.H = Fat.Handler_Addr then
              return True;
           end if;
  
--- 584,590 ----
  
        Ptr := Registered_Handler_Head;
        while Ptr /= null loop
!          if Ptr.H = Fat.Handler_Addr.all'Address then
              return True;
           end if;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-interr__sigaction.adb gcc-10.1.0/gcc/ada/libgnarl/s-interr__sigaction.adb
*** gcc-9.3.0/gcc/ada/libgnarl/s-interr__sigaction.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-interr__sigaction.adb	Thu May  7 10:49:59 2020
*************** package body System.Interrupts is
*** 487,495 ****
     function Is_Registered (Handler : Parameterless_Handler) return Boolean is
        Ptr : R_Link := Registered_Handlers;
  
        type Fat_Ptr is record
           Object_Addr  : System.Address;
!          Handler_Addr : System.Address;
        end record;
  
        function To_Fat_Ptr is new Ada.Unchecked_Conversion
--- 487,497 ----
     function Is_Registered (Handler : Parameterless_Handler) return Boolean is
        Ptr : R_Link := Registered_Handlers;
  
+       type Acc_Proc is access procedure;
+ 
        type Fat_Ptr is record
           Object_Addr  : System.Address;
!          Handler_Addr : Acc_Proc;
        end record;
  
        function To_Fat_Ptr is new Ada.Unchecked_Conversion
*************** package body System.Interrupts is
*** 505,511 ****
        Fat := To_Fat_Ptr (Handler);
  
        while Ptr /= null loop
!          if Ptr.H = Fat.Handler_Addr then
              return True;
           end if;
  
--- 507,513 ----
        Fat := To_Fat_Ptr (Handler);
  
        while Ptr /= null loop
!          if Ptr.H = Fat.Handler_Addr.all'Address then
              return True;
           end if;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-interr__vxworks.adb gcc-10.1.0/gcc/ada/libgnarl/s-interr__vxworks.adb
*** gcc-9.3.0/gcc/ada/libgnarl/s-interr__vxworks.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-interr__vxworks.adb	Thu May  7 10:49:59 2020
*************** package body System.Interrupts is
*** 578,586 ****
     -------------------
  
     function Is_Registered (Handler : Parameterless_Handler) return Boolean is
        type Fat_Ptr is record
           Object_Addr  : System.Address;
!          Handler_Addr : System.Address;
        end record;
  
        function To_Fat_Ptr is new Ada.Unchecked_Conversion
--- 578,589 ----
     -------------------
  
     function Is_Registered (Handler : Parameterless_Handler) return Boolean is
+ 
+       type Acc_Proc is access procedure;
+ 
        type Fat_Ptr is record
           Object_Addr  : System.Address;
!          Handler_Addr : Acc_Proc;
        end record;
  
        function To_Fat_Ptr is new Ada.Unchecked_Conversion
*************** package body System.Interrupts is
*** 598,604 ****
  
        Ptr := Registered_Handler_Head;
        while Ptr /= null loop
!          if Ptr.H = Fat.Handler_Addr then
              return True;
           end if;
  
--- 601,607 ----
  
        Ptr := Registered_Handler_Head;
        while Ptr /= null loop
!          if Ptr.H = Fat.Handler_Addr.all'Address then
              return True;
           end if;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-linux.ads gcc-10.1.0/gcc/ada/libgnarl/s-linux.ads
*** gcc-9.3.0/gcc/ada/libgnarl/s-linux.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-linux.ads	Thu May  7 10:49:59 2020
*************** package System.Linux is
*** 82,88 ****
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
     SIGIOT     : constant := 6; --  IOT instruction
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the  future
     SIGFPE     : constant := 8; --  floating point exception
     SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
     SIGBUS     : constant := 7; --  bus error
--- 82,88 ----
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
     SIGIOT     : constant := 6; --  IOT instruction
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the future
     SIGFPE     : constant := 8; --  floating point exception
     SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
     SIGBUS     : constant := 7; --  bus error
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-linux__alpha.ads gcc-10.1.0/gcc/ada/libgnarl/s-linux__alpha.ads
*** gcc-9.3.0/gcc/ada/libgnarl/s-linux__alpha.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-linux__alpha.ads	Thu May  7 10:49:59 2020
*************** package System.Linux is
*** 82,88 ****
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
     SIGIOT     : constant := 6; --  IOT instruction
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the  future
     SIGFPE     : constant := 8; --  floating point exception
     SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
     SIGBUS     : constant := 10; --  bus error
--- 82,88 ----
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
     SIGIOT     : constant := 6; --  IOT instruction
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the future
     SIGFPE     : constant := 8; --  floating point exception
     SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
     SIGBUS     : constant := 10; --  bus error
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-linux__android.ads gcc-10.1.0/gcc/ada/libgnarl/s-linux__android.ads
*** gcc-9.3.0/gcc/ada/libgnarl/s-linux__android.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-linux__android.ads	Thu May  7 10:49:59 2020
*************** package System.Linux is
*** 82,88 ****
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
     SIGIOT     : constant := 6; --  IOT instruction
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the  future
     SIGFPE     : constant := 8; --  floating point exception
     SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
     SIGBUS     : constant := 7; --  bus error
--- 82,88 ----
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
     SIGIOT     : constant := 6; --  IOT instruction
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the future
     SIGFPE     : constant := 8; --  floating point exception
     SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
     SIGBUS     : constant := 7; --  bus error
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-linux__hppa.ads gcc-10.1.0/gcc/ada/libgnarl/s-linux__hppa.ads
*** gcc-9.3.0/gcc/ada/libgnarl/s-linux__hppa.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-linux__hppa.ads	Thu May  7 10:49:59 2020
*************** package System.Linux is
*** 82,88 ****
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
     SIGIOT     : constant := 6; --  IOT instruction
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the  future
     SIGEMT     : constant := 7; --  EMT
     SIGFPE     : constant := 8; --  floating point exception
     SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
--- 82,88 ----
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
     SIGIOT     : constant := 6; --  IOT instruction
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the future
     SIGEMT     : constant := 7; --  EMT
     SIGFPE     : constant := 8; --  floating point exception
     SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-linux__mips.ads gcc-10.1.0/gcc/ada/libgnarl/s-linux__mips.ads
*** gcc-9.3.0/gcc/ada/libgnarl/s-linux__mips.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-linux__mips.ads	Thu May  7 10:49:59 2020
*************** package System.Linux is
*** 82,88 ****
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
     SIGIOT     : constant := 6; --  IOT instruction
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the  future
     SIGEMT     : constant := 7; --  EMT
     SIGFPE     : constant := 8; --  floating point exception
     SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
--- 82,88 ----
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
     SIGIOT     : constant := 6; --  IOT instruction
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the future
     SIGEMT     : constant := 7; --  EMT
     SIGFPE     : constant := 8; --  floating point exception
     SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-linux__riscv.ads gcc-10.1.0/gcc/ada/libgnarl/s-linux__riscv.ads
*** gcc-9.3.0/gcc/ada/libgnarl/s-linux__riscv.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-linux__riscv.ads	Thu May  7 10:49:59 2020
*************** package System.Linux is
*** 82,88 ****
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
     SIGIOT     : constant := 6; --  IOT instruction
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the  future
     SIGBUS     : constant := 7; --  bus error
     SIGFPE     : constant := 8; --  floating point exception
     SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
--- 82,88 ----
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
     SIGIOT     : constant := 6; --  IOT instruction
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the future
     SIGBUS     : constant := 7; --  bus error
     SIGFPE     : constant := 8; --  floating point exception
     SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-linux__sparc.ads gcc-10.1.0/gcc/ada/libgnarl/s-linux__sparc.ads
*** gcc-9.3.0/gcc/ada/libgnarl/s-linux__sparc.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-linux__sparc.ads	Thu May  7 10:49:59 2020
*************** package System.Linux is
*** 81,87 ****
     SIGQUIT    : constant := 3; --  quit (ASCD FS)
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the  future
     SIGIOT     : constant := 6; --  IOT instruction
     SIGEMT     : constant := 7; --  EMT
     SIGFPE     : constant := 8; --  floating point exception
--- 81,87 ----
     SIGQUIT    : constant := 3; --  quit (ASCD FS)
     SIGILL     : constant := 4; --  illegal instruction (not reset)
     SIGTRAP    : constant := 5; --  trace trap (not reset)
!    SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the future
     SIGIOT     : constant := 6; --  IOT instruction
     SIGEMT     : constant := 7; --  EMT
     SIGFPE     : constant := 8; --  floating point exception
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-osinte__linux.ads gcc-10.1.0/gcc/ada/libgnarl/s-osinte__linux.ads
*** gcc-9.3.0/gcc/ada/libgnarl/s-osinte__linux.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-osinte__linux.ads	Thu May  7 10:49:59 2020
*************** with System.OS_Constants;
*** 46,55 ****
  package System.OS_Interface is
     pragma Preelaborate;
  
-    pragma Linker_Options ("-lpthread");
     pragma Linker_Options ("-lrt");
     --  Needed for clock_getres with glibc versions prior to 2.17
  
     subtype int            is Interfaces.C.int;
     subtype char           is Interfaces.C.char;
     subtype short          is Interfaces.C.short;
--- 46,56 ----
  package System.OS_Interface is
     pragma Preelaborate;
  
     pragma Linker_Options ("-lrt");
     --  Needed for clock_getres with glibc versions prior to 2.17
  
+    pragma Linker_Options ("-lpthread");
+ 
     subtype int            is Interfaces.C.int;
     subtype char           is Interfaces.C.char;
     subtype short          is Interfaces.C.short;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-osinte__mingw.ads gcc-10.1.0/gcc/ada/libgnarl/s-osinte__mingw.ads
*** gcc-9.3.0/gcc/ada/libgnarl/s-osinte__mingw.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-osinte__mingw.ads	Thu May  7 10:49:59 2020
*************** private
*** 369,375 ****
        --  section for the resource.
  
        LockSemaphore : Win32.HANDLE;
!       SpinCount     : Win32.DWORD;
     end record;
  
  end System.OS_Interface;
--- 369,375 ----
        --  section for the resource.
  
        LockSemaphore : Win32.HANDLE;
!       SpinCount     : Interfaces.C.size_t;
     end record;
  
  end System.OS_Interface;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-osinte__solaris.ads gcc-10.1.0/gcc/ada/libgnarl/s-osinte__solaris.ads
*** gcc-9.3.0/gcc/ada/libgnarl/s-osinte__solaris.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-osinte__solaris.ads	Thu May  7 10:49:59 2020
*************** package System.OS_Interface is
*** 259,264 ****
--- 259,269 ----
     function To_Timespec (D : Duration) return timespec;
     pragma Inline (To_Timespec);
  
+    function sysconf (name : int) return long;
+    pragma Import (C, sysconf);
+ 
+    SC_NPROCESSORS_ONLN : constant := 15;
+ 
     -------------
     -- Process --
     -------------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-taprop__vxworks.adb gcc-10.1.0/gcc/ada/libgnarl/s-taprop__vxworks.adb
*** gcc-9.3.0/gcc/ada/libgnarl/s-taprop__vxworks.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-taprop__vxworks.adb	Thu May  7 10:49:59 2020
*************** package body System.Task_Primitives.Oper
*** 192,198 ****
     procedure Abort_Handler (signo : Signal) is
        pragma Unreferenced (signo);
  
!       Self_ID        : constant Task_Id := Self;
        Old_Set        : aliased sigset_t;
        Unblocked_Mask : aliased sigset_t;
        Result         : int;
--- 192,201 ----
     procedure Abort_Handler (signo : Signal) is
        pragma Unreferenced (signo);
  
!       --  Do not call Self at this point as we're in a signal handler
!       --  and it may not be available, in particular on targets where we
!       --  support ZCX and where we don't do anything here anyway.
!       Self_ID        : Task_Id;
        Old_Set        : aliased sigset_t;
        Unblocked_Mask : aliased sigset_t;
        Result         : int;
*************** package body System.Task_Primitives.Oper
*** 208,213 ****
--- 211,218 ----
           return;
        end if;
  
+       Self_ID := Self;
+ 
        if Self_ID.Deferral_Level = 0
          and then Self_ID.Pending_ATC_Level < Self_ID.ATC_Nesting_Level
          and then not Self_ID.Aborting
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-tasinf__solaris.adb gcc-10.1.0/gcc/ada/libgnarl/s-tasinf__solaris.adb
*** gcc-9.3.0/gcc/ada/libgnarl/s-tasinf__solaris.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-tasinf__solaris.adb	Thu May  7 10:49:59 2020
*************** package body System.Task_Info is
*** 84,87 ****
--- 84,106 ----
        return (False, False);
     end Unbound_Thread_Attributes;
  
+    N_CPU : Natural := 0;
+    pragma Atomic (N_CPU);
+    --  Cache CPU number. Use pragma Atomic to avoid a race condition when
+    --  setting N_CPU in Number_Of_Processors below.
+ 
+    --------------------------
+    -- Number_Of_Processors --
+    --------------------------
+ 
+    function Number_Of_Processors return Positive is
+    begin
+       if N_CPU = 0 then
+          N_CPU := Natural
+            (OS_Interface.sysconf (OS_Interface.SC_NPROCESSORS_ONLN));
+       end if;
+ 
+       return N_CPU;
+    end Number_Of_Processors;
+ 
  end System.Task_Info;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-tasinf__solaris.ads gcc-10.1.0/gcc/ada/libgnarl/s-tasinf__solaris.ads
*** gcc-9.3.0/gcc/ada/libgnarl/s-tasinf__solaris.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-tasinf__solaris.ads	Thu May  7 10:49:59 2020
*************** package System.Task_Info is
*** 139,142 ****
--- 139,145 ----
  
     Unspecified_Task_Info : constant Task_Info_Type := null;
  
+    function Number_Of_Processors return Positive;
+    --  Returns the number of processors on the running host
+ 
  end System.Task_Info;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnarl/s-tataat.ads gcc-10.1.0/gcc/ada/libgnarl/s-tataat.ads
*** gcc-9.3.0/gcc/ada/libgnarl/s-tataat.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnarl/s-tataat.ads	Thu May  7 10:49:59 2020
*************** with Ada.Unchecked_Conversion;
*** 36,41 ****
--- 36,42 ----
  package System.Tasking.Task_Attributes is
  
     type Deallocator is access procedure (Ptr : Atomic_Address);
+    pragma Favor_Top_Level (Deallocator);
  
     type Attribute_Record is record
        Free : Deallocator;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-calend.ads gcc-10.1.0/gcc/ada/libgnat/a-calend.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-calend.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-calend.ads	Thu May  7 10:49:59 2020
*************** is
*** 61,79 ****
     --  the result will contain all elapsed leap seconds since the start of
     --  Ada time until now.
  
!    function Year    (Date : Time) return Year_Number  with Global => null;
!    function Month   (Date : Time) return Month_Number with Global => null;
!    function Day     (Date : Time) return Day_Number   with Global => null;
!    function Seconds (Date : Time) return Day_Duration with Global => null;
  
     procedure Split
       (Date    : Time;
        Year    : out Year_Number;
        Month   : out Month_Number;
        Day     : out Day_Number;
!       Seconds : out Day_Duration)
!    with
!      Global => null;
     --  Break down a time value into its date components set in the current
     --  time zone. If Split is called on a time value created using Ada 2005
     --  Time_Of in some arbitrary time zone, the input value will always be
--- 61,80 ----
     --  the result will contain all elapsed leap seconds since the start of
     --  Ada time until now.
  
!    function Year    (Date : Time) return Year_Number;
!    function Month   (Date : Time) return Month_Number;
!    function Day     (Date : Time) return Day_Number;
!    function Seconds (Date : Time) return Day_Duration;
!    --  SPARK Note: These routines, just like Split and Time_Of below, might use
!    --  the OS-specific timezone database that is typically stored in a file.
!    --  This side effect needs to be modeled, so there is no Global => null.
  
     procedure Split
       (Date    : Time;
        Year    : out Year_Number;
        Month   : out Month_Number;
        Day     : out Day_Number;
!       Seconds : out Day_Duration);
     --  Break down a time value into its date components set in the current
     --  time zone. If Split is called on a time value created using Ada 2005
     --  Time_Of in some arbitrary time zone, the input value will always be
*************** is
*** 83,91 ****
       (Year    : Year_Number;
        Month   : Month_Number;
        Day     : Day_Number;
!       Seconds : Day_Duration := 0.0) return Time
!    with
!      Global => null;
     --  GNAT Note: Normally when procedure Split is called on a Time value
     --  result of a call to function Time_Of, the out parameters of procedure
     --  Split are identical to the in parameters of function Time_Of. However,
--- 84,90 ----
       (Year    : Year_Number;
        Month   : Month_Number;
        Day     : Day_Number;
!       Seconds : Day_Duration := 0.0) return Time;
     --  GNAT Note: Normally when procedure Split is called on a Time value
     --  result of a call to function Time_Of, the out parameters of procedure
     --  Split are identical to the in parameters of function Time_Of. However,
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-calfor.adb gcc-10.1.0/gcc/ada/libgnat/a-calfor.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-calfor.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-calfor.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Calendar.Formatting is
*** 52,57 ****
--- 52,66 ----
     --  such as 1983-*1-j3 u5:n7:k9 which should be 1983-01-03 05:07:09. Raise
     --  Constraint_Error if there is a mismatch.
  
+    procedure Split_Duration
+      (Seconds    : Duration;
+       Hour       : out Natural;
+       Minute     : out Minute_Number;
+       Second     : out Second_Number;
+       Sub_Second : out Second_Duration);
+    --  Version of Split that allows durations < 100 hours.
+    --  Will raise Time_Error if Seconds >= 100 hours.
+ 
     ----------------
     -- Check_Char --
     ----------------
*************** package body Ada.Calendar.Formatting is
*** 140,146 ****
        Include_Time_Fraction : Boolean := False) return String
     is
        To_Char    : constant array (0 .. 9) of Character := "0123456789";
!       Hour       : Hour_Number;
        Minute     : Minute_Number;
        Second     : Second_Number;
        Sub_Second : Duration;
--- 149,155 ----
        Include_Time_Fraction : Boolean := False) return String
     is
        To_Char    : constant array (0 .. 9) of Character := "0123456789";
!       Hour       : Natural;
        Minute     : Minute_Number;
        Second     : Second_Number;
        Sub_Second : Duration;
*************** package body Ada.Calendar.Formatting is
*** 155,161 ****
        Result : String := "-00:00:00.00";
  
     begin
!       Split (abs (Elapsed_Time), Hour, Minute, Second, Sub_Second);
  
        --  Hour processing, positions 2 and 3
  
--- 164,170 ----
        Result : String := "-00:00:00.00";
  
     begin
!       Split_Duration (abs Elapsed_Time, Hour, Minute, Second, Sub_Second);
  
        --  Hour processing, positions 2 and 3
  
*************** package body Ada.Calendar.Formatting is
*** 361,366 ****
--- 370,403 ----
               Sub_Second;
     end Seconds_Of;
  
+    --------------------
+    -- Split_Duration --
+    --------------------
+ 
+    procedure Split_Duration
+      (Seconds    : Duration;
+       Hour       : out Natural;
+       Minute     : out Minute_Number;
+       Second     : out Second_Number;
+       Sub_Second : out Second_Duration)
+    is
+       Secs : Natural;
+    begin
+       --  Check that Seconds is below 100 hours
+ 
+       if Seconds >= 3600.0 * 100.0 then
+          raise Time_Error;
+       end if;
+ 
+       Secs := (if Seconds = 0.0 then 0 else Natural (Seconds - 0.5));
+ 
+       Sub_Second := Second_Duration (Seconds - Duration (Secs));
+       Hour       := Natural (Secs / 3_600);
+       Secs       := Secs mod 3_600;
+       Minute     := Minute_Number (Secs / 60);
+       Second     := Second_Number (Secs mod 60);
+    end Split_Duration;
+ 
     -----------
     -- Split --
     -----------
*************** package body Ada.Calendar.Formatting is
*** 372,379 ****
        Second     : out Second_Number;
        Sub_Second : out Second_Duration)
     is
!       Secs : Natural;
! 
     begin
        --  Validity checks
  
--- 409,415 ----
        Second     : out Second_Number;
        Sub_Second : out Second_Duration)
     is
!       Unchecked_Hour : Natural;
     begin
        --  Validity checks
  
*************** package body Ada.Calendar.Formatting is
*** 381,403 ****
           raise Constraint_Error;
        end if;
  
!       Secs := (if Seconds = 0.0 then 0 else Natural (Seconds - 0.5));
! 
!       Sub_Second := Second_Duration (Seconds - Day_Duration (Secs));
!       Hour       := Hour_Number (Secs / 3_600);
!       Secs       := Secs mod 3_600;
!       Minute     := Minute_Number (Secs / 60);
!       Second     := Second_Number (Secs mod 60);
! 
!       --  Validity checks
  
!       if not Hour'Valid
!         or else not Minute'Valid
!         or else not Second'Valid
!         or else not Sub_Second'Valid
!       then
           raise Time_Error;
        end if;
     end Split;
  
     -----------
--- 417,429 ----
           raise Constraint_Error;
        end if;
  
!       Split_Duration (Seconds, Unchecked_Hour, Minute, Second, Sub_Second);
  
!       if Unchecked_Hour > Hour_Number'Last then
           raise Time_Error;
        end if;
+ 
+       Hour := Unchecked_Hour;
     end Split;
  
     -----------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-calfor.ads gcc-10.1.0/gcc/ada/libgnat/a-calfor.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-calfor.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-calfor.ads	Thu May  7 10:49:59 2020
*************** package Ada.Calendar.Formatting is
*** 204,210 ****
     --  to the string as a point followed by a 2-digit value. If Elapsed_Time <
     --  0.0, the result is Image (abs Elapsed_Time, Include_Time_Fraction)
     --  prefixed with a minus sign. If abs Elapsed_Time represents 100 hours or
!    --  more, the result is implementation-defined.
  
     function Value (Elapsed_Time : String) return Duration;
     --  Returns a Duration value for the image given as Elapsed_Time.
--- 204,210 ----
     --  to the string as a point followed by a 2-digit value. If Elapsed_Time <
     --  0.0, the result is Image (abs Elapsed_Time, Include_Time_Fraction)
     --  prefixed with a minus sign. If abs Elapsed_Time represents 100 hours or
!    --  more, Time_Error is raised.
  
     function Value (Elapsed_Time : String) return Duration;
     --  Returns a Duration value for the image given as Elapsed_Time.
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cbdlli.adb gcc-10.1.0/gcc/ada/libgnat/a-cbdlli.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cbdlli.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cbdlli.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Bounded_Doub
*** 304,310 ****
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 304,310 ----
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Bounded_Doub
*** 1448,1454 ****
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1448,1454 ----
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Bounded_Doub
*** 1564,1570 ****
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 1564,1570 ----
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cbhama.adb gcc-10.1.0/gcc/ada/libgnat/a-cbhama.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cbhama.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cbhama.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Bounded_Hash
*** 213,219 ****
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 213,219 ----
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Bounded_Hash
*** 239,245 ****
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 239,245 ----
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Bounded_Hash
*** 262,279 ****
        Capacity : Count_Type := 0;
        Modulus  : Hash_Type := 0) return Map
     is
!       C : Count_Type;
        M : Hash_Type;
  
     begin
!       if Capacity = 0 then
!          C := Source.Length;
! 
!       elsif Capacity >= Source.Length then
!          C := Capacity;
! 
!       elsif Checks then
!          raise Capacity_Error with "Capacity value too small";
        end if;
  
        if Modulus = 0 then
--- 262,275 ----
        Capacity : Count_Type := 0;
        Modulus  : Hash_Type := 0) return Map
     is
!       C : constant Count_Type :=
!         (if Capacity = 0 then Source.Length
!          else Capacity);
        M : Hash_Type;
  
     begin
!       if Checks and then C < Source.Length then
!          raise Capacity_Error with "Capacity too small";
        end if;
  
        if Modulus = 0 then
*************** package body Ada.Containers.Bounded_Hash
*** 857,863 ****
          Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 853,859 ----
          Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Bounded_Hash
*** 991,997 ****
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 987,993 ----
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
*************** package body Ada.Containers.Bounded_Hash
*** 1016,1022 ****
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 1012,1018 ----
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cbhama.ads gcc-10.1.0/gcc/ada/libgnat/a-cbhama.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cbhama.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cbhama.ads	Thu May  7 10:49:59 2020
*************** package Ada.Containers.Bounded_Hashed_Ma
*** 107,113 ****
     --  Equivalent to Length (Container) = 0
  
     procedure Clear (Container : in out Map);
!    --  Removes all of the items from the map
  
     function Key (Position : Cursor) return Key_Type;
     --  Returns the key of the node designated by the cursor
--- 107,114 ----
     --  Equivalent to Length (Container) = 0
  
     procedure Clear (Container : in out Map);
!    --  Removes all of the items from the map. This will deallocate all memory
!    --  associated with this map.
  
     function Key (Position : Cursor) return Key_Type;
     --  Returns the key of the node designated by the cursor
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cbhase.adb gcc-10.1.0/gcc/ada/libgnat/a-cbhase.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cbhase.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cbhase.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Bounded_Hash
*** 231,237 ****
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 231,237 ----
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Bounded_Hash
*** 254,269 ****
        Capacity : Count_Type := 0;
        Modulus  : Hash_Type := 0) return Set
     is
!       C : Count_Type;
        M : Hash_Type;
  
     begin
!       if Capacity = 0 then
!          C := Source.Length;
!       elsif Capacity >= Source.Length then
!          C := Capacity;
!       elsif Checks then
!          raise Capacity_Error with "Capacity value too small";
        end if;
  
        if Modulus = 0 then
--- 254,267 ----
        Capacity : Count_Type := 0;
        Modulus  : Hash_Type := 0) return Set
     is
!       C : constant Count_Type :=
!         (if Capacity = 0 then Source.Length
!          else Capacity);
        M : Hash_Type;
  
     begin
!       if Checks and then C < Source.Length then
!          raise Capacity_Error with "Capacity too small";
        end if;
  
        if Modulus = 0 then
*************** package body Ada.Containers.Bounded_Hash
*** 1079,1085 ****
          Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1077,1083 ----
          Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Bounded_Hash
*** 1608,1614 ****
                (Element => N.Element'Access,
                 Control => (Controlled with TC))
              do
!                Lock (TC.all);
              end return;
           end;
        end Constant_Reference;
--- 1606,1612 ----
                (Element => N.Element'Access,
                 Control => (Controlled with TC))
              do
!                Busy (TC.all);
              end return;
           end;
        end Constant_Reference;
*************** package body Ada.Containers.Bounded_Hash
*** 1789,1795 ****
                       Old_Pos  => Position,
                       Old_Hash => Hash (Key (Position))))
              do
!                Lock (Container.TC);
              end return;
           end;
        end Reference_Preserving_Key;
--- 1787,1793 ----
                       Old_Pos  => Position,
                       Old_Hash => Hash (Key (Position))))
              do
!                Busy (Container.TC);
              end return;
           end;
        end Reference_Preserving_Key;
*************** package body Ada.Containers.Bounded_Hash
*** 1818,1824 ****
                      Old_Pos => P,
                      Old_Hash => Hash (Key)))
              do
!                Lock (Container.TC);
              end return;
           end;
        end Reference_Preserving_Key;
--- 1816,1822 ----
                      Old_Pos => P,
                      Old_Hash => Hash (Key)))
              do
!                Busy (Container.TC);
              end return;
           end;
        end Reference_Preserving_Key;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cbhase.ads gcc-10.1.0/gcc/ada/libgnat/a-cbhase.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cbhase.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cbhase.ads	Thu May  7 10:49:59 2020
*************** package Ada.Containers.Bounded_Hashed_Se
*** 120,126 ****
     --  Equivalent to Length (Container) = 0
  
     procedure Clear (Container : in out Set);
!    --  Removes all of the items from the set
  
     function Element (Position : Cursor) return Element_Type;
     --  Returns the element of the node designated by the cursor
--- 120,127 ----
     --  Equivalent to Length (Container) = 0
  
     procedure Clear (Container : in out Set);
!    --  Removes all of the items from the set. This will deallocate all memory
!    --  associated with this set.
  
     function Element (Position : Cursor) return Element_Type;
     --  Returns the element of the node designated by the cursor
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cbmutr.adb gcc-10.1.0/gcc/ada/libgnat/a-cbmutr.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cbmutr.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cbmutr.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Bounded_Mult
*** 600,606 ****
             (Element => Container.Elements (Position.Node)'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 600,606 ----
             (Element => Container.Elements (Position.Node)'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Bounded_Mult
*** 625,639 ****
       (Source   : Tree;
        Capacity : Count_Type := 0) return Tree
     is
!       C : Count_Type;
! 
     begin
!       if Capacity = 0 then
!          C := Source.Count;
!       elsif Capacity >= Source.Count then
!          C := Capacity;
!       elsif Checks then
!          raise Capacity_Error with "Capacity value too small";
        end if;
  
        return Target : Tree (Capacity => C) do
--- 625,636 ----
       (Source   : Tree;
        Capacity : Count_Type := 0) return Tree
     is
!       C : constant Count_Type :=
!         (if Capacity = 0 then Source.Count
!          else Capacity);
     begin
!       if Checks and then C < Source.Count then
!          raise Capacity_Error with "Capacity too small";
        end if;
  
        return Target : Tree (Capacity => C) do
*************** package body Ada.Containers.Bounded_Mult
*** 1767,1776 ****
       (Container : Tree;
        From, To  : Count_Type) return Boolean
     is
!       Idx : Count_Type;
! 
     begin
-       Idx := From;
        while Idx >= 0 loop
           if Idx = To then
              return True;
--- 1764,1771 ----
       (Container : Tree;
        From, To  : Count_Type) return Boolean
     is
!       Idx : Count_Type'Base := From;
     begin
        while Idx >= 0 loop
           if Idx = To then
              return True;
*************** package body Ada.Containers.Bounded_Mult
*** 2296,2302 ****
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 2291,2297 ----
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Bounded_Mult
*** 2495,2501 ****
             (Element => Container.Elements (Position.Node)'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 2490,2496 ----
             (Element => Container.Elements (Position.Node)'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cborma.adb gcc-10.1.0/gcc/ada/libgnat/a-cborma.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cborma.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cborma.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Bounded_Orde
*** 374,380 ****
  
     procedure Clear (Container : in out Map) is
     begin
!       Tree_Operations.Clear_Tree (Container);
     end Clear;
  
     -----------
--- 374,382 ----
  
     procedure Clear (Container : in out Map) is
     begin
!       while not Container.Is_Empty loop
!          Container.Delete_Last;
!       end loop;
     end Clear;
  
     -----------
*************** package body Ada.Containers.Bounded_Orde
*** 418,424 ****
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 420,426 ----
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Bounded_Orde
*** 443,449 ****
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 445,451 ----
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Bounded_Orde
*** 462,478 ****
     ----------
  
     function Copy (Source : Map; Capacity : Count_Type := 0) return Map is
!       C : Count_Type;
! 
     begin
!       if Capacity = 0 then
!          C := Source.Length;
! 
!       elsif Capacity >= Source.Length then
!          C := Capacity;
! 
!       elsif Checks then
!          raise Capacity_Error with "Capacity value too small";
        end if;
  
        return Target : Map (Capacity => C) do
--- 464,475 ----
     ----------
  
     function Copy (Source : Map; Capacity : Count_Type := 0) return Map is
!       C : constant Count_Type :=
!         (if Capacity = 0 then Source.Length
!          else Capacity);
     begin
!       if Checks and then C < Source.Length then
!          raise Capacity_Error with "Capacity too small";
        end if;
  
        return Target : Map (Capacity => C) do
*************** package body Ada.Containers.Bounded_Orde
*** 1259,1265 ****
          Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1256,1262 ----
          Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Bounded_Orde
*** 1379,1385 ****
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 1376,1382 ----
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
*************** package body Ada.Containers.Bounded_Orde
*** 1404,1410 ****
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 1401,1407 ----
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cborse.adb gcc-10.1.0/gcc/ada/libgnat/a-cborse.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cborse.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cborse.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Bounded_Orde
*** 374,380 ****
  
     procedure Clear (Container : in out Set) is
     begin
!       Tree_Operations.Clear_Tree (Container);
     end Clear;
  
     -----------
--- 374,382 ----
  
     procedure Clear (Container : in out Set) is
     begin
!       while not Container.Is_Empty loop
!          Container.Delete_Last;
!       end loop;
     end Clear;
  
     -----------
*************** package body Ada.Containers.Bounded_Orde
*** 418,424 ****
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 420,426 ----
             (Element => N.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Bounded_Orde
*** 440,454 ****
     ----------
  
     function Copy (Source : Set; Capacity : Count_Type := 0) return Set is
!       C : Count_Type;
! 
     begin
!       if Capacity = 0 then
!          C := Source.Length;
!       elsif Capacity >= Source.Length then
!          C := Capacity;
!       elsif Checks then
!          raise Capacity_Error with "Capacity value too small";
        end if;
  
        return Target : Set (Capacity => C) do
--- 442,453 ----
     ----------
  
     function Copy (Source : Set; Capacity : Count_Type := 0) return Set is
!       C : constant Count_Type :=
!         (if Capacity = 0 then Source.Length
!          else Capacity);
     begin
!       if Checks and then C < Source.Length then
!          raise Capacity_Error with "Capacity too small";
        end if;
  
        return Target : Set (Capacity => C) do
*************** package body Ada.Containers.Bounded_Orde
*** 742,748 ****
                (Element => N.Element'Access,
                 Control => (Controlled with TC))
              do
!                Lock (TC.all);
              end return;
           end;
        end Constant_Reference;
--- 741,747 ----
                (Element => N.Element'Access,
                 Control => (Controlled with TC))
              do
!                Busy (TC.all);
              end return;
           end;
        end Constant_Reference;
*************** package body Ada.Containers.Bounded_Orde
*** 938,944 ****
                                Pos       => Position,
                                Old_Key   => new Key_Type'(Key (Position))))
              do
!                Lock (Container.TC);
              end return;
           end;
        end Reference_Preserving_Key;
--- 937,943 ----
                                Pos       => Position,
                                Old_Key   => new Key_Type'(Key (Position))))
              do
!                Busy (Container.TC);
              end return;
           end;
        end Reference_Preserving_Key;
*************** package body Ada.Containers.Bounded_Orde
*** 966,972 ****
                                 Pos      => Find (Container, Key),
                                 Old_Key  => new Key_Type'(Key)))
              do
!                Lock (Container.TC);
              end return;
           end;
        end Reference_Preserving_Key;
--- 965,971 ----
                                 Pos      => Find (Container, Key),
                                 Old_Key  => new Key_Type'(Key)))
              do
!                Busy (Container.TC);
              end return;
           end;
        end Reference_Preserving_Key;
*************** package body Ada.Containers.Bounded_Orde
*** 1599,1605 ****
          Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1598,1604 ----
          Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cdlili.adb gcc-10.1.0/gcc/ada/libgnat/a-cdlili.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cdlili.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cdlili.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Doubly_Linke
*** 255,261 ****
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 255,261 ----
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Doubly_Linke
*** 1226,1232 ****
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1226,1232 ----
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Doubly_Linke
*** 1357,1363 ****
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 1357,1363 ----
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cfdlli.ads gcc-10.1.0/gcc/ada/libgnat/a-cfdlli.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cfdlli.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cfdlli.ads	Thu May  7 10:49:59 2020
*************** with Ada.Containers.Functional_Maps;
*** 34,39 ****
--- 34,40 ----
  
  generic
     type Element_Type is private;
+    with function "=" (Left, Right : Element_Type) return Boolean is <>;
  
  package Ada.Containers.Formal_Doubly_Linked_Lists with
    SPARK_Mode
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cfhama.adb gcc-10.1.0/gcc/ada/libgnat/a-cfhama.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cfhama.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cfhama.adb	Thu May  7 10:49:59 2020
*************** is
*** 509,516 ****
  
     procedure Free (HT : in out Map; X : Count_Type) is
     begin
!       HT.Nodes (X).Has_Element := False;
!       HT_Ops.Free (HT, X);
     end Free;
  
     ----------------------
--- 509,519 ----
  
     procedure Free (HT : in out Map; X : Count_Type) is
     begin
!       if X /= 0 then
!          pragma Assert (X <= HT.Capacity);
!          HT.Nodes (X).Has_Element := False;
!          HT_Ops.Free (HT, X);
!       end if;
     end Free;
  
     ----------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cfhama.ads gcc-10.1.0/gcc/ada/libgnat/a-cfhama.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cfhama.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cfhama.ads	Thu May  7 10:49:59 2020
*************** generic
*** 59,64 ****
--- 59,65 ----
     with function Equivalent_Keys
       (Left  : Key_Type;
        Right : Key_Type) return Boolean is "=";
+    with function "=" (Left, Right : Element_Type) return Boolean is <>;
  
  package Ada.Containers.Formal_Hashed_Maps with
    SPARK_Mode
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cfhase.adb gcc-10.1.0/gcc/ada/libgnat/a-cfhase.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cfhase.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cfhase.adb	Thu May  7 10:49:59 2020
*************** is
*** 760,767 ****
  
     procedure Free (HT : in out Set; X : Count_Type) is
     begin
!       HT.Nodes (X).Has_Element := False;
!       HT_Ops.Free (HT, X);
     end Free;
  
     ----------------------
--- 760,770 ----
  
     procedure Free (HT : in out Set; X : Count_Type) is
     begin
!       if X /= 0 then
!          pragma Assert (X <= HT.Capacity);
!          HT.Nodes (X).Has_Element := False;
!          HT_Ops.Free (HT, X);
!       end if;
     end Free;
  
     ----------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cfhase.ads gcc-10.1.0/gcc/ada/libgnat/a-cfhase.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cfhase.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cfhase.ads	Thu May  7 10:49:59 2020
*************** is
*** 355,364 ****
--- 355,378 ----
           "="'Result =
             (E_Elements_Included (Elements (Left), Elements (Right))
               and E_Elements_Included (Elements (Right), Elements (Left)));
+    --  For each element in Left, set equality attempts to find the equal
+    --  element in Right; if a search fails, then set equality immediately
+    --  returns False. The search works by calling Hash to find the bucket in
+    --  the Right set that corresponds to the Left element. If the bucket is
+    --  non-empty, the search calls the generic formal element equality operator
+    --  to compare the element (in Left) to the element of each node in the
+    --  bucket (in Right); the search terminates when a matching node in the
+    --  bucket is found, or the nodes in the bucket are exhausted. (Note that
+    --  element equality is called here, not Equivalent_Elements. Set equality
+    --  is the only operation in which element equality is used. Compare set
+    --  equality to Equivalent_Sets, which does call Equivalent_Elements.)
  
     function Equivalent_Sets (Left, Right : Set) return Boolean with
       Global => null,
       Post   => Equivalent_Sets'Result = (Model (Left) = Model (Right));
+    --  Similar to set equality, with the difference that the element in Left is
+    --  compared to the elements in Right using the generic formal
+    --  Equivalent_Elements operation instead of element equality.
  
     function To_Set (New_Item : Element_Type) return Set with
       Global => null,
*************** is
*** 366,375 ****
--- 380,393 ----
         M.Is_Singleton (Model (To_Set'Result), New_Item)
           and Length (To_Set'Result) = 1
           and E.Get (Elements (To_Set'Result), 1) = New_Item;
+    --  Constructs a singleton set comprising New_Element. To_Set calls Hash to
+    --  determine the bucket for New_Item.
  
     function Capacity (Container : Set) return Count_Type with
       Global => null,
       Post   => Capacity'Result = Container.Capacity;
+    --  Returns the current capacity of the set. Capacity is the maximum length
+    --  before which rehashing in guaranteed not to occur.
  
     procedure Reserve_Capacity
       (Container : in out Set;
*************** is
*** 387,400 ****
--- 405,425 ----
                (Elements (Container), Elements (Container)'Old)
           and E_Elements_Included
                (Elements (Container)'Old, Elements (Container));
+    --  If the value of the Capacity actual parameter is less or equal to
+    --  Container.Capacity, then the operation has no effect.  Otherwise it
+    --  raises Capacity_Error (as no expansion of capacity is possible for a
+    --  bounded form).
  
     function Is_Empty (Container : Set) return Boolean with
       Global => null,
       Post   => Is_Empty'Result = (Length (Container) = 0);
+    --  Equivalent to Length (Container) = 0
  
     procedure Clear (Container : in out Set) with
       Global => null,
       Post   => Length (Container) = 0 and M.Is_Empty (Model (Container));
+    --  Removes all of the items from the set. This will deallocate all memory
+    --  associated with this set.
  
     procedure Assign (Target : in out Set; Source : Set) with
       Global => null,
*************** is
*** 407,412 ****
--- 432,441 ----
  
           and E_Elements_Included (Elements (Target), Elements (Source))
           and E_Elements_Included (Elements (Source), Elements (Target));
+    --  If Target denotes the same object as Source, then the operation has no
+    --  effect. If the Target capacity is less than the Source length, then
+    --  Assign raises Capacity_Error.  Otherwise, Assign clears Target and then
+    --  copies the (active) elements from Source to Target.
  
     function Copy
       (Source   : Set;
*************** is
*** 422,427 ****
--- 451,464 ----
                   Copy'Result.Capacity = Source.Capacity
                else
                   Copy'Result.Capacity = Capacity);
+    --  Constructs a new set object whose elements correspond to Source.  If the
+    --  Capacity parameter is 0, then the capacity of the result is the same as
+    --  the length of Source. If the Capacity parameter is equal or greater than
+    --  the length of Source, then the capacity of the result is the specified
+    --  value. Otherwise, Copy raises Capacity_Error. If the Modulus parameter
+    --  is 0, then the modulus of the result is the value returned by a call to
+    --  Default_Modulus with the capacity parameter determined as above;
+    --  otherwise the modulus of the result is the specified value.
  
     function Element
       (Container : Set;
*************** is
*** 485,490 ****
--- 522,529 ----
  
           and E_Elements_Included (Elements (Target), Elements (Source)'Old)
           and E_Elements_Included (Elements (Source)'Old, Elements (Target));
+    --  Clears Target (if it's not empty), and then moves (not copies) the
+    --  buckets array and nodes from Source to Target.
  
     procedure Insert
       (Container : in out Set;
*************** is
*** 541,546 ****
--- 580,597 ----
                    (Positions (Container),
                     Positions (Container)'Old,
                     Position));
+    --  Conditionally inserts New_Item into the set. If New_Item is already in
+    --  the set, then Inserted returns False and Position designates the node
+    --  containing the existing element (which is not modified). If New_Item is
+    --  not already in the set, then Inserted returns True and Position
+    --  designates the newly-inserted node containing New_Item. The search for
+    --  an existing element works as follows. Hash is called to determine
+    --  New_Item's bucket; if the bucket is non-empty, then Equivalent_Elements
+    --  is called to compare New_Item to the element of each node in that
+    --  bucket. If the bucket is empty, or there were no equivalent elements in
+    --  the bucket, the search "fails" and the New_Item is inserted in the set
+    --  (and Inserted returns True); otherwise, the search "succeeds" (and
+    --  Inserted returns False).
  
     procedure Insert  (Container : in out Set; New_Item : Element_Type) with
       Global => null,
*************** is
*** 570,575 ****
--- 621,633 ----
                 (Positions (Container),
                  Positions (Container)'Old,
                  Find (Container, New_Item));
+    --  Attempts to insert New_Item into the set, performing the usual insertion
+    --  search (which involves calling both Hash and Equivalent_Elements); if
+    --  the search succeeds (New_Item is equivalent to an element already in the
+    --  set, and so was not inserted), then this operation raises
+    --  Constraint_Error. (This version of Insert is similar to Replace, but
+    --  having the opposite exception behavior. It is intended for use when you
+    --  want to assert that the item is not already in the set.)
  
     procedure Include (Container : in out Set; New_Item : Element_Type) with
       Global         => null,
*************** is
*** 625,630 ****
--- 683,695 ----
                    (Positions (Container),
                     Positions (Container)'Old,
                     Find (Container, New_Item)));
+    --  Attempts to insert New_Item into the set. If an element equivalent to
+    --  New_Item is already in the set (the insertion search succeeded, and
+    --  hence New_Item was not inserted), then the value of New_Item is assigned
+    --  to the existing element. (This insertion operation only raises an
+    --  exception if cursor tampering occurs. It is intended for use when you
+    --  want to insert the item in the set, and you don't care whether an
+    --  equivalent element is already present.)
  
     procedure Replace (Container : in out Set; New_Item : Element_Type) with
       Global => null,
*************** is
*** 648,653 ****
--- 713,724 ----
                 (Elements (Container)'Old,
                  Elements (Container),
                  P.Get (Positions (Container), Find (Container, New_Item)));
+    --  Searches for New_Item in the set; if the search fails (because an
+    --  equivalent element was not in the set), then it raises
+    --  Constraint_Error. Otherwise, the existing element is assigned the value
+    --  New_Item. (This is similar to Insert, but with the opposite exception
+    --  behavior. It is intended for use when you want to assert that the item
+    --  is already in the set.)
  
     procedure Exclude (Container : in out Set; Item : Element_Type) with
       Global         => null,
*************** is
*** 685,690 ****
--- 756,768 ----
                    (Positions (Container)'Old,
                     Positions (Container),
                     Find (Container, Item)'Old));
+    --  Searches for Item in the set, and if found, removes its node from the
+    --  set and then deallocates it. The search works as follows. The operation
+    --  calls Hash to determine the item's bucket; if the bucket is not empty,
+    --  it calls Equivalent_Elements to compare Item to the element of each node
+    --  in the bucket. (This is the deletion analog of Include. It is intended
+    --  for use when you want to remove the item from the set, but don't care
+    --  whether the item is already in the set.)
  
     procedure Delete  (Container : in out Set; Item : Element_Type) with
       Global => null,
*************** is
*** 715,720 ****
--- 793,804 ----
                 (Positions (Container)'Old,
                  Positions (Container),
                  Find (Container, Item)'Old);
+    --  Searches for Item in the set (which involves calling both Hash and
+    --  Equivalent_Elements). If the search fails, then the operation raises
+    --  Constraint_Error. Otherwise it removes the node from the set and then
+    --  deallocates it. (This is the deletion analog of non-conditional
+    --  Insert. It is intended for use when you want to assert that the item is
+    --  already in the set.)
  
     procedure Delete (Container : in out Set; Position : in out Cursor) with
       Global => null,
*************** is
*** 747,752 ****
--- 831,840 ----
                 (Positions (Container)'Old,
                  Positions (Container),
                  Position'Old);
+    --  Removes the node designated by Position from the set, and then
+    --  deallocates the node. The operation calls Hash to determine the bucket,
+    --  and then compares Position to each node in the bucket until there's a
+    --  match (it does not call Equivalent_Elements).
  
     procedure Union (Target : in out Set; Source : Set) with
       Global => null,
*************** is
*** 795,800 ****
--- 883,890 ----
                  E_Right => Elements (Target),
                  P_Left  => Positions (Target)'Old,
                  P_Right => Positions (Target));
+    --  Iterates over the Source set, and conditionally inserts each element
+    --  into Target.
  
     function Union (Left, Right : Set) return Set with
       Global => null,
*************** is
*** 831,836 ****
--- 921,928 ----
                  Model (Left),
                  Elements (Right),
                  Elements (Union'Result));
+    --  The operation first copies the Left set to the result, and then iterates
+    --  over the Right set to conditionally insert each element into the result.
  
     function "or" (Left, Right : Set) return Set renames Union;
  
*************** is
*** 866,871 ****
--- 958,966 ----
                  E_Right => Elements (Target)'Old,
                  P_Left  => Positions (Target),
                  P_Right => Positions (Target)'Old);
+    --  Iterates over the Target set (calling First and Next), calling Find to
+    --  determine whether the element is in Source. If an equivalent element is
+    --  not found in Source, the element is deleted from Target.
  
     function Intersection (Left, Right : Set) return Set with
       Global => null,
*************** is
*** 891,896 ****
--- 986,994 ----
           and E_Elements_Included
                 (Elements (Left), Model (Right),
                  Elements (Intersection'Result));
+    --  Iterates over the Left set, calling Find to determine whether the
+    --  element is in Right. If an equivalent element is found, it is inserted
+    --  into the result set.
  
     function "and" (Left, Right : Set) return Set renames Intersection;
  
*************** is
*** 926,931 ****
--- 1024,1032 ----
                  E_Right => Elements (Target)'Old,
                  P_Left  => Positions (Target),
                  P_Right => Positions (Target)'Old);
+    --  Iterates over the Source (calling First and Next), calling Find to
+    --  determine whether the element is in Target. If an equivalent element is
+    --  found, it is deleted from Target.
  
     function Difference (Left, Right : Set) return Set with
       Global => null,
*************** is
*** 955,960 ****
--- 1056,1064 ----
                 (Elements (Left),
                  Model (Difference'Result),
                  Elements (Difference'Result));
+    --  Iterates over the Left set, calling Find to determine whether the
+    --  element is in the Right set. If an equivalent element is not found, the
+    --  element is inserted into the result set.
  
     function "-" (Left, Right : Set) return Set renames Difference;
  
*************** is
*** 995,1000 ****
--- 1099,1108 ----
  
           and E_Elements_Included
                 (Elements (Source), Model (Target), Elements (Target));
+    --  The operation iterates over the Source set, searching for the element
+    --  in Target (calling Hash and Equivalent_Elements). If an equivalent
+    --  element is found, it is removed from Target; otherwise it is inserted
+    --  into Target.
  
     function Symmetric_Difference (Left, Right : Set) return Set with
       Global => null,
*************** is
*** 1042,1047 ****
--- 1150,1161 ----
                 (Elements (Right),
                  Model (Symmetric_Difference'Result),
                  Elements (Symmetric_Difference'Result));
+    --  The operation first iterates over the Left set. It calls Find to
+    --  determine whether the element is in the Right set. If no equivalent
+    --  element is found, the element from Left is inserted into the result. The
+    --  operation then iterates over the Right set, to determine whether the
+    --  element is in the Left set. If no equivalent element is found, the Right
+    --  element is inserted into the result.
  
     function "xor" (Left, Right : Set) return Set
       renames Symmetric_Difference;
*************** is
*** 1050,1059 ****
--- 1164,1184 ----
       Global => null,
       Post   =>
         Overlap'Result = not (M.No_Overlap (Model (Left), Model (Right)));
+    --  Iterates over the Left set (calling First and Next), calling Find to
+    --  determine whether the element is in the Right set. If an equivalent
+    --  element is found, the operation immediately returns True. The operation
+    --  returns False if the iteration over Left terminates without finding any
+    --  equivalent element in Right.
  
     function Is_Subset (Subset : Set; Of_Set : Set) return Boolean with
       Global => null,
       Post   => Is_Subset'Result = (Model (Subset) <= Model (Of_Set));
+    --  Iterates over Subset (calling First and Next), calling Find to determine
+    --  whether the element is in Of_Set. If no equivalent element is found in
+    --  Of_Set, the operation immediately returns False. The operation returns
+    --  True if the iteration over Subset terminates without finding an element
+    --  not in Of_Set (that is, every element in Subset is equivalent to an
+    --  element in Of_Set).
  
     function First (Container : Set) return Cursor with
       Global         => null,
*************** is
*** 1064,1069 ****
--- 1189,1196 ----
          others =>
            Has_Element (Container, First'Result)
              and P.Get (Positions (Container), First'Result) = 1);
+    --  Returns a cursor that designates the first non-empty bucket, by
+    --  searching from the beginning of the buckets array.
  
     function Next (Container : Set; Position : Cursor) return Cursor with
       Global         => null,
*************** is
*** 1079,1084 ****
--- 1206,1217 ----
            Has_Element (Container, Next'Result)
              and then P.Get (Positions (Container), Next'Result) =
                       P.Get (Positions (Container), Position) + 1);
+    --  Returns a cursor that designates the node that follows the current one
+    --  designated by Position. If Position designates the last node in its
+    --  bucket, the operation calls Hash to compute the index of this bucket,
+    --  and searches the buckets array for the first non-empty bucket, starting
+    --  from that index; otherwise, it simply follows the link to the next node
+    --  in the same bucket.
  
     procedure Next (Container : Set; Position : in out Cursor) with
       Global         => null,
*************** is
*** 1094,1099 ****
--- 1227,1233 ----
            Has_Element (Container, Position)
              and then P.Get (Positions (Container), Position) =
                       P.Get (Positions (Container), Position'Old) + 1);
+    --  Equivalent to Position := Next (Position)
  
     function Find
       (Container : Set;
*************** is
*** 1118,1123 ****
--- 1252,1262 ----
  
              and Equivalent_Elements
                    (Element (Container, Find'Result), Item));
+    --  Searches for Item in the set. Find calls Hash to determine the item's
+    --  bucket; if the bucket is not empty, it calls Equivalent_Elements to
+    --  compare Item to each element in the bucket. If the search succeeds, Find
+    --  returns a cursor designating the node containing the equivalent element;
+    --  otherwise, it returns No_Element.
  
     function Contains (Container : Set; Item : Element_Type) return Boolean with
       Global => null,
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cfinve.adb gcc-10.1.0/gcc/ada/libgnat/a-cfinve.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cfinve.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cfinve.adb	Thu May  7 10:49:59 2020
*************** is
*** 457,464 ****
        Item      : Element_Type;
        Index     : Index_Type := Index_Type'First) return Extended_Index
     is
!       K    : Capacity_Range;
!       Last : constant Index_Type := Last_Index (Container);
  
     begin
        K := Capacity_Range (Int (Index) - Int (No_Index));
--- 457,464 ----
        Item      : Element_Type;
        Index     : Index_Type := Index_Type'First) return Extended_Index
     is
!       K    : Count_Type;
!       Last : constant Extended_Index := Last_Index (Container);
  
     begin
        K := Capacity_Range (Int (Index) - Int (No_Index));
*************** is
*** 1277,1283 ****
        Index     : Index_Type := Index_Type'Last) return Extended_Index
     is
        Last : Index_Type'Base;
!       K    : Capacity_Range;
  
     begin
        if Index > Last_Index (Container) then
--- 1277,1283 ----
        Index     : Index_Type := Index_Type'Last) return Extended_Index
     is
        Last : Index_Type'Base;
!       K    : Count_Type'Base;
  
     begin
        if Index > Last_Index (Container) then
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cfinve.ads gcc-10.1.0/gcc/ada/libgnat/a-cfinve.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cfinve.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cfinve.ads	Thu May  7 10:49:59 2020
*************** with Ada.Containers.Functional_Vectors;
*** 38,43 ****
--- 38,44 ----
  generic
     type Index_Type is range <>;
     type Element_Type (<>) is private;
+    with function "=" (Left, Right : Element_Type) return Boolean is <>;
     Max_Size_In_Storage_Elements : Natural;
     --  Maximum size of Vector elements in bytes. This has the same meaning as
     --  in Ada.Containers.Bounded_Holders, with the same restrictions. Note that
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cforma.ads gcc-10.1.0/gcc/ada/libgnat/a-cforma.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cforma.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cforma.ads	Thu May  7 10:49:59 2020
*************** generic
*** 58,63 ****
--- 58,64 ----
     type Element_Type is private;
  
     with function "<" (Left, Right : Key_Type) return Boolean is <>;
+    with function "=" (Left, Right : Element_Type) return Boolean is <>;
  
  package Ada.Containers.Formal_Ordered_Maps with
    SPARK_Mode
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cgaaso.ads gcc-10.1.0/gcc/ada/libgnat/a-cgaaso.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cgaaso.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cgaaso.ads	Thu May  7 10:49:59 2020
*************** generic
*** 39,41 ****
--- 39,54 ----
  procedure Ada.Containers.Generic_Anonymous_Array_Sort
    (First, Last : Index_Type'Base);
  pragma Pure (Ada.Containers.Generic_Anonymous_Array_Sort);
+ --  Reorders the elements of Container such that the elements are sorted
+ --  smallest first as determined by the generic formal "<" operator provided.
+ --  Any exception raised during evaluation of "<" is propagated.
+ --
+ --  The actual function for the generic formal function "<" is expected to
+ --  return the same value each time it is called with a particular pair of
+ --  element values. It should not modify Container and it should define a
+ --  strict weak ordering relationship: irreflexive, asymmetric, transitive, and
+ --  in addition, if x < y for any values x and y, then for all other values z,
+ --  (x < z) or (z < y).  If the actual for "<" behaves in some other manner,
+ --  the behavior of the instance of Generic_Anonymous_Array_Sort is
+ --  unspecified. The number of times Generic_Anonymous_Array_Sort calls "<" is
+ --  unspecified.
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cgarso.ads gcc-10.1.0/gcc/ada/libgnat/a-cgarso.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cgarso.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cgarso.ads	Thu May  7 10:49:59 2020
*************** generic
*** 18,26 ****
     type Element_Type is private;
     type Array_Type is array (Index_Type range <>) of Element_Type;
  
!    with function "<" (Left, Right : Element_Type)
!       return Boolean is <>;
  
  procedure Ada.Containers.Generic_Array_Sort (Container : in out Array_Type);
- 
  pragma Pure (Ada.Containers.Generic_Array_Sort);
--- 18,36 ----
     type Element_Type is private;
     type Array_Type is array (Index_Type range <>) of Element_Type;
  
!    with function "<" (Left, Right : Element_Type) return Boolean is <>;
  
  procedure Ada.Containers.Generic_Array_Sort (Container : in out Array_Type);
  pragma Pure (Ada.Containers.Generic_Array_Sort);
+ --  Reorders the elements of Container such that the elements are sorted
+ --  smallest first as determined by the generic formal "<" operator provided.
+ --  Any exception raised during evaluation of "<" is propagated.
+ --
+ --  The actual function for the generic formal function "<" is expected to
+ --  return the same value each time it is called with a particular pair of
+ --  element values. It should not modify Container and it should define a
+ --  strict weak ordering relationship: irreflexive, asymmetric, transitive, and
+ --  in addition, if x < y for any values x and y, then for all other values z,
+ --  (x < z) or (z < y).  If the actual for "<" behaves in some other manner,
+ --  the behavior of the instance of Generic_Array_Sort is unspecified. The
+ --  number of times Generic_Array_Sort calls "<" is unspecified.
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-chtgop.ads gcc-10.1.0/gcc/ada/libgnat/a-chtgop.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-chtgop.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-chtgop.ads	Thu May  7 10:49:59 2020
*************** package Ada.Containers.Hash_Tables.Gener
*** 107,114 ****
  
     procedure Clear (HT : in out Hash_Table_Type);
     --  Deallocates each node in hash table HT. (Note that it only deallocates
!    --  the nodes, not the buckets array.) Program_Error is raised if the hash
!    --  table is busy.
  
     procedure Move (Target, Source : in out Hash_Table_Type);
     --  Moves (not copies) the buckets array and nodes from Source to
--- 107,115 ----
  
     procedure Clear (HT : in out Hash_Table_Type);
     --  Deallocates each node in hash table HT. (Note that it only deallocates
!    --  the nodes, not the buckets array. Also note that for bounded containers,
!    --  the buckets array is not dynamically allocated). Program_Error is raised
!    --  if the hash table is busy.
  
     procedure Move (Target, Source : in out Hash_Table_Type);
     --  Moves (not copies) the buckets array and nodes from Source to
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cidlli.adb gcc-10.1.0/gcc/ada/libgnat/a-cidlli.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cidlli.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cidlli.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Indefinite_D
*** 280,286 ****
             (Element => Position.Node.Element,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 280,286 ----
             (Element => Position.Node.Element,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Indefinite_D
*** 1263,1269 ****
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1263,1269 ----
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Indefinite_D
*** 1405,1411 ****
             (Element => Position.Node.Element,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 1405,1411 ----
             (Element => Position.Node.Element,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cihama.adb gcc-10.1.0/gcc/ada/libgnat/a-cihama.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cihama.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cihama.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Indefinite_H
*** 220,226 ****
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 220,226 ----
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Indefinite_H
*** 249,255 ****
             (Element => Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 249,255 ----
             (Element => Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Indefinite_H
*** 911,917 ****
          Container.HT.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 911,917 ----
          Container.HT.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Indefinite_H
*** 1057,1063 ****
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 1057,1063 ----
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
*************** package body Ada.Containers.Indefinite_H
*** 1086,1092 ****
             (Element => Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 1086,1092 ----
             (Element => Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cihase.adb gcc-10.1.0/gcc/ada/libgnat/a-cihase.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cihase.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cihase.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Indefinite_H
*** 239,245 ****
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 239,245 ----
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Indefinite_H
*** 1229,1235 ****
          Container.HT.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1229,1235 ----
          Container.HT.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Indefinite_H
*** 2044,2050 ****
                (Element => Node.Element.all'Access,
                 Control => (Controlled with TC))
              do
!                Lock (TC.all);
              end return;
           end;
        end Constant_Reference;
--- 2044,2050 ----
                (Element => Node.Element.all'Access,
                 Control => (Controlled with TC))
              do
!                Busy (TC.all);
              end return;
           end;
        end Constant_Reference;
*************** package body Ada.Containers.Indefinite_H
*** 2232,2238 ****
                                Old_Pos   => Position,
                                Old_Hash  => Hash (Key (Position))))
              do
!                Lock (HT.TC);
              end return;
           end;
        end Reference_Preserving_Key;
--- 2232,2238 ----
                                Old_Pos   => Position,
                                Old_Hash  => Hash (Key (Position))))
              do
!                Busy (HT.TC);
              end return;
           end;
        end Reference_Preserving_Key;
*************** package body Ada.Containers.Indefinite_H
*** 2266,2272 ****
                                Old_Pos   => P,
                                Old_Hash  => Hash (Key)))
              do
!                Lock (HT.TC);
              end return;
           end;
        end Reference_Preserving_Key;
--- 2266,2272 ----
                                Old_Pos   => P,
                                Old_Hash  => Hash (Key)))
              do
!                Busy (HT.TC);
              end return;
           end;
        end Reference_Preserving_Key;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cimutr.adb gcc-10.1.0/gcc/ada/libgnat/a-cimutr.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cimutr.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cimutr.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Indefinite_M
*** 488,494 ****
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 488,494 ----
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Indefinite_M
*** 1847,1853 ****
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1847,1853 ----
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Indefinite_M
*** 2044,2050 ****
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 2044,2050 ----
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-ciorma.adb gcc-10.1.0/gcc/ada/libgnat/a-ciorma.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-ciorma.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-ciorma.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Indefinite_O
*** 374,380 ****
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 374,380 ----
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Indefinite_O
*** 402,408 ****
             (Element => Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 402,408 ----
             (Element => Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Indefinite_O
*** 1250,1256 ****
          Container.Tree.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1250,1256 ----
          Container.Tree.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Indefinite_O
*** 1387,1393 ****
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 1387,1393 ----
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
*************** package body Ada.Containers.Indefinite_O
*** 1415,1421 ****
             (Element => Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 1415,1421 ----
             (Element => Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-ciorse.adb gcc-10.1.0/gcc/ada/libgnat/a-ciorse.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-ciorse.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-ciorse.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Indefinite_O
*** 394,400 ****
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 394,400 ----
             (Element => Position.Node.Element.all'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Indefinite_O
*** 788,794 ****
                (Element => Node.Element.all'Access,
                 Control => (Controlled with TC))
              do
!                Lock (TC.all);
              end return;
           end;
        end Constant_Reference;
--- 788,794 ----
                (Element => Node.Element.all'Access,
                 Control => (Controlled with TC))
              do
!                Busy (TC.all);
              end return;
           end;
        end Constant_Reference;
*************** package body Ada.Containers.Indefinite_O
*** 1017,1023 ****
                      Pos       => Position,
                      Old_Key   => new Key_Type'(Key (Position))))
           do
!                Lock (Tree.TC);
              end return;
           end;
        end Reference_Preserving_Key;
--- 1017,1023 ----
                      Pos       => Position,
                      Old_Key   => new Key_Type'(Key (Position))))
           do
!                Busy (Tree.TC);
              end return;
           end;
        end Reference_Preserving_Key;
*************** package body Ada.Containers.Indefinite_O
*** 1049,1055 ****
                      Pos       => Find (Container, Key),
                      Old_Key   => new Key_Type'(Key)))
              do
!                Lock (Tree.TC);
              end return;
           end;
        end Reference_Preserving_Key;
--- 1049,1055 ----
                      Pos       => Find (Container, Key),
                      Old_Key   => new Key_Type'(Key)))
              do
!                Busy (Tree.TC);
              end return;
           end;
        end Reference_Preserving_Key;
*************** package body Ada.Containers.Indefinite_O
*** 1688,1694 ****
          Container.Tree.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1688,1694 ----
          Container.Tree.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cobove.adb gcc-10.1.0/gcc/ada/libgnat/a-cobove.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cobove.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cobove.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Bounded_Vect
*** 402,408 ****
             (Element => A (J)'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 402,408 ----
             (Element => A (J)'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Bounded_Vect
*** 426,432 ****
             (Element => A (J)'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 426,432 ----
             (Element => A (J)'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Bounded_Vect
*** 451,468 ****
       (Source   : Vector;
        Capacity : Count_Type := 0) return Vector
     is
!       C : Count_Type;
! 
     begin
!       if Capacity = 0 then
!          C := Source.Length;
! 
!       elsif Capacity >= Source.Length then
!          C := Capacity;
! 
!       elsif Checks then
!          raise Capacity_Error
!            with "Requested capacity is less than Source length";
        end if;
  
        return Target : Vector (C) do
--- 451,462 ----
       (Source   : Vector;
        Capacity : Count_Type := 0) return Vector
     is
!       C : constant Count_Type :=
!         (if Capacity = 0 then Source.Length
!          else Capacity);
     begin
!       if Checks and then C < Source.Length then
!          raise Capacity_Error with "Capacity too small";
        end if;
  
        return Target : Vector (C) do
*************** package body Ada.Containers.Bounded_Vect
*** 2073,2079 ****
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 2067,2073 ----
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Bounded_Vect
*** 2189,2195 ****
             (Element => A (J)'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 2183,2189 ----
             (Element => A (J)'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
*************** package body Ada.Containers.Bounded_Vect
*** 2213,2219 ****
             (Element => A (J)'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 2207,2213 ----
             (Element => A (J)'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cofove.adb gcc-10.1.0/gcc/ada/libgnat/a-cofove.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cofove.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cofove.adb	Thu May  7 10:49:59 2020
***************
*** 26,32 ****
  ------------------------------------------------------------------------------
  
  with Ada.Containers.Generic_Array_Sort;
- with Ada.Unchecked_Deallocation;
  
  with System; use type System.Address;
  
--- 26,31 ----
*************** package body Ada.Containers.Formal_Vecto
*** 34,74 ****
    SPARK_Mode => Off
  is
  
-    Growth_Factor : constant := 2;
-    --  When growing a container, multiply current capacity by this. Doubling
-    --  leads to amortized linear-time copying.
- 
     type Int is range System.Min_Int .. System.Max_Int;
  
-    procedure Free is
-      new Ada.Unchecked_Deallocation (Elements_Array, Elements_Array_Ptr);
- 
-    type Maximal_Array_Ptr is access all Elements_Array (Array_Index)
-      with Storage_Size => 0;
-    type Maximal_Array_Ptr_Const is access constant Elements_Array (Array_Index)
-      with Storage_Size => 0;
- 
-    function Elems (Container : in out Vector) return Maximal_Array_Ptr;
-    function Elemsc
-      (Container : Vector) return Maximal_Array_Ptr_Const;
-    --  Returns a pointer to the Elements array currently in use -- either
-    --  Container.Elements_Ptr or a pointer to Container.Elements. We work with
-    --  pointers to a bogus array subtype that is constrained with the maximum
-    --  possible bounds. This means that the pointer is a thin pointer. This is
-    --  necessary because 'Unrestricted_Access doesn't work when it produces
-    --  access-to-unconstrained and is returned from a function.
-    --
-    --  Note that this is dangerous: make sure calls to this use an indexed
-    --  component or slice that is within the bounds 1 .. Length (Container).
- 
-    function Get_Element
-      (Container : Vector;
-       Position  : Capacity_Range) return Element_Type;
- 
     function To_Array_Index (Index : Index_Type'Base) return Count_Type'Base;
  
-    function Current_Capacity (Container : Vector) return Capacity_Range;
- 
     procedure Insert_Space
       (Container : in out Vector;
        Before    : Extended_Index;
--- 33,42 ----
*************** is
*** 89,95 ****
        end if;
  
        for J in 1 .. Length (Left) loop
!          if Get_Element (Left, J) /= Get_Element (Right, J) then
              return False;
           end if;
        end loop;
--- 57,63 ----
        end if;
  
        for J in 1 .. Length (Left) loop
!          if Left.Elements (J) /= Right.Elements (J) then
              return False;
           end if;
        end loop;
*************** is
*** 148,154 ****
           return;
        end if;
  
!       if Bounded and then Target.Capacity < LS then
           raise Constraint_Error;
        end if;
  
--- 116,122 ----
           return;
        end if;
  
!       if Target.Capacity < LS then
           raise Constraint_Error;
        end if;
  
*************** is
*** 162,172 ****
  
     function Capacity (Container : Vector) return Capacity_Range is
     begin
!       return
!         (if Bounded then
!             Container.Capacity
!          else
!             Capacity_Range'Last);
     end Capacity;
  
     -----------
--- 130,136 ----
  
     function Capacity (Container : Vector) return Capacity_Range is
     begin
!       return Container.Capacity;
     end Capacity;
  
     -----------
*************** is
*** 176,185 ****
     procedure Clear (Container : in out Vector) is
     begin
        Container.Last := No_Index;
- 
-       --  Free element, note that this is OK if Elements_Ptr is null
- 
-       Free (Container.Elements_Ptr);
     end Clear;
  
     --------------
--- 140,145 ----
*************** is
*** 215,238 ****
        end if;
  
        return Target : Vector (C) do
!          Elems (Target) (1 .. LS) := Elemsc (Source) (1 .. LS);
           Target.Last := Source.Last;
        end return;
     end Copy;
  
-    ----------------------
-    -- Current_Capacity --
-    ----------------------
- 
-    function Current_Capacity (Container : Vector) return Capacity_Range is
-    begin
-       return
-         (if Container.Elements_Ptr = null then
-             Container.Elements'Length
-          else
-             Container.Elements_Ptr.all'Length);
-    end Current_Capacity;
- 
     ------------
     -- Delete --
     ------------
--- 175,185 ----
        end if;
  
        return Target : Vector (C) do
!          Target.Elements (1 .. LS) := Source.Elements (1 .. LS);
           Target.Last := Source.Last;
        end return;
     end Copy;
  
     ------------
     -- Delete --
     ------------
*************** is
*** 333,339 ****
        --  so we just slide down to Index the elements that weren't deleted.
  
        declare
!          EA  : Maximal_Array_Ptr renames Elems (Container);
           Idx : constant Count_Type := EA'First + Off;
        begin
           EA (Idx .. Old_Len - Count) := EA (Idx + Count .. Old_Len);
--- 280,286 ----
        --  so we just slide down to Index the elements that weren't deleted.
  
        declare
!          EA  : Elements_Array renames Container.Elements;
           Idx : constant Count_Type := EA'First + Off;
        begin
           EA (Idx .. Old_Len - Count) := EA (Idx + Count .. Old_Len);
*************** is
*** 418,449 ****
           II : constant Int'Base := Int (Index) - Int (No_Index);
           I  : constant Capacity_Range := Capacity_Range (II);
        begin
!          return Get_Element (Container, I);
        end;
     end Element;
  
-    -----------
-    -- Elems --
-    -----------
- 
-    function Elems (Container : in out Vector) return Maximal_Array_Ptr is
-    begin
-       return
-         (if Container.Elements_Ptr = null then
-             Container.Elements'Unrestricted_Access
-          else
-             Container.Elements_Ptr.all'Unrestricted_Access);
-    end Elems;
- 
-    function Elemsc (Container : Vector) return Maximal_Array_Ptr_Const is
-    begin
-       return
-         (if Container.Elements_Ptr = null then
-             Container.Elements'Unrestricted_Access
-          else
-             Container.Elements_Ptr.all'Unrestricted_Access);
-    end Elemsc;
- 
     ----------------
     -- Find_Index --
     ----------------
--- 365,374 ----
           II : constant Int'Base := Int (Index) - Int (No_Index);
           I  : constant Capacity_Range := Capacity_Range (II);
        begin
!          return Container.Elements (I);
        end;
     end Element;
  
     ----------------
     -- Find_Index --
     ----------------
*************** is
*** 453,465 ****
        Item      : Element_Type;
        Index     : Index_Type := Index_Type'First) return Extended_Index
     is
!       K    : Capacity_Range;
!       Last : constant Index_Type := Last_Index (Container);
  
     begin
        K := Capacity_Range (Int (Index) - Int (No_Index));
        for Indx in Index .. Last loop
!          if Get_Element (Container, K) = Item then
              return Indx;
           end if;
  
--- 378,390 ----
        Item      : Element_Type;
        Index     : Index_Type := Index_Type'First) return Extended_Index
     is
!       K    : Count_Type;
!       Last : constant Extended_Index := Last_Index (Container);
  
     begin
        K := Capacity_Range (Int (Index) - Int (No_Index));
        for Indx in Index .. Last loop
!          if Container.Elements (K) = Item then
              return Indx;
           end if;
  
*************** is
*** 478,484 ****
        if Is_Empty (Container) then
           raise Constraint_Error with "Container is empty";
        else
!          return Get_Element (Container, 1);
        end if;
     end First_Element;
  
--- 403,409 ----
        if Is_Empty (Container) then
           raise Constraint_Error with "Container is empty";
        else
!          return Container.Elements (1);
        end if;
     end First_Element;
  
*************** is
*** 622,628 ****
  
        begin
           for Position in 1 .. Length (Container) loop
!             R := M.Add (R, Elemsc (Container) (Position));
           end loop;
  
           return R;
--- 547,553 ----
  
        begin
           for Position in 1 .. Length (Container) loop
!             R := M.Add (R, Container.Elements (Position));
           end loop;
  
           return R;
*************** is
*** 684,691 ****
  
        begin
           for J in 1 .. L - 1 loop
!             if Get_Element (Container, J + 1) <
!                Get_Element (Container, J)
              then
                 return False;
              end if;
--- 609,616 ----
  
        begin
           for J in 1 .. L - 1 loop
!             if Container.Elements (J + 1) <
!                Container.Elements (J)
              then
                 return False;
              end if;
*************** is
*** 712,718 ****
           if Container.Last <= Index_Type'First then
              return;
           else
!             Sort (Elems (Container) (1 .. Len));
           end if;
        end Sort;
  
--- 637,643 ----
           if Container.Last <= Index_Type'First then
              return;
           else
!             Sort (Container.Elements (1 .. Len));
           end if;
        end Sort;
  
*************** is
*** 744,759 ****
              New_Length : constant Count_Type := I + Length (Source);
  
           begin
-             if not Bounded
-               and then Current_Capacity (Target) < Capacity_Range (New_Length)
-             then
-                Reserve_Capacity
-                  (Target,
-                   Capacity_Range'Max
-                     (Current_Capacity (Target) * Growth_Factor,
-                      Capacity_Range (New_Length)));
-             end if;
- 
              if Index_Type'Base'Last >= Count_Type'Pos (Count_Type'Last) then
                 Target.Last := No_Index + Index_Type'Base (New_Length);
  
--- 669,674 ----
*************** is
*** 764,771 ****
           end;
  
           declare
!             TA : Maximal_Array_Ptr renames Elems (Target);
!             SA : Maximal_Array_Ptr renames Elems (Source);
  
           begin
              J := Length (Target);
--- 679,686 ----
           end;
  
           declare
!             TA : Elements_Array renames Target.Elements;
!             SA : Elements_Array renames Source.Elements;
  
           begin
              J := Length (Target);
*************** is
*** 793,810 ****
     end Generic_Sorting;
  
     -----------------
-    -- Get_Element --
-    -----------------
- 
-    function Get_Element
-      (Container : Vector;
-       Position  : Capacity_Range) return Element_Type
-    is
-    begin
-       return Elemsc (Container) (Position);
-    end Get_Element;
- 
-    -----------------
     -- Has_Element --
     -----------------
  
--- 708,713 ----
*************** is
*** 844,850 ****
  
        J := To_Array_Index (Before);
  
!       Elems (Container) (J .. J - 1 + Count) := (others => New_Item);
     end Insert;
  
     procedure Insert
--- 747,753 ----
  
        J := To_Array_Index (Before);
  
!       Container.Elements (J .. J - 1 + Count) := (others => New_Item);
     end Insert;
  
     procedure Insert
*************** is
*** 876,882 ****
  
        B := To_Array_Index (Before);
  
!       Elems (Container) (B .. B + N - 1) := Elemsc (New_Item) (1 .. N);
     end Insert;
  
     ------------------
--- 779,785 ----
  
        B := To_Array_Index (Before);
  
!       Container.Elements (B .. B + N - 1) := New_Item.Elements (1 .. N);
     end Insert;
  
     ------------------
*************** is
*** 1053,1071 ****
  
        J := To_Array_Index (Before);
  
-       --  Increase the capacity of container if needed
- 
-       if not Bounded
-         and then Current_Capacity (Container) < Capacity_Range (New_Length)
-       then
-          Reserve_Capacity
-            (Container,
-             Capacity_Range'Max (Current_Capacity (Container) * Growth_Factor,
-                                 Capacity_Range (New_Length)));
-       end if;
- 
        declare
!          EA : Maximal_Array_Ptr renames Elems (Container);
  
        begin
           if Before <= Container.Last then
--- 956,963 ----
  
        J := To_Array_Index (Before);
  
        declare
!          EA : Elements_Array renames Container.Elements;
  
        begin
           if Before <= Container.Last then
*************** is
*** 1105,1111 ****
        if Is_Empty (Container) then
           raise Constraint_Error with "Container is empty";
        else
!          return Get_Element (Container, Length (Container));
        end if;
     end Last_Element;
  
--- 997,1003 ----
        if Is_Empty (Container) then
           raise Constraint_Error with "Container is empty";
        else
!          return Container.Elements (Length (Container));
        end if;
     end Last_Element;
  
*************** is
*** 1143,1149 ****
           return;
        end if;
  
!       if Bounded and then Target.Capacity < LS then
           raise Constraint_Error;
        end if;
  
--- 1035,1041 ----
           return;
        end if;
  
!       if Target.Capacity < LS then
           raise Constraint_Error;
        end if;
  
*************** is
*** 1194,1200 ****
           I  : constant Capacity_Range := Capacity_Range (II);
  
        begin
!          Elems (Container) (I) := New_Item;
        end;
     end Replace_Element;
  
--- 1086,1092 ----
           I  : constant Capacity_Range := Capacity_Range (II);
  
        begin
!          Container.Elements (I) := New_Item;
        end;
     end Replace_Element;
  
*************** is
*** 1207,1230 ****
        Capacity  : Capacity_Range)
     is
     begin
!       if Bounded then
!          if Capacity > Container.Capacity then
!             raise Constraint_Error with "Capacity is out of range";
!          end if;
! 
!       else
!          if Capacity > Formal_Vectors.Current_Capacity (Container) then
!             declare
!                New_Elements : constant Elements_Array_Ptr :=
!                                 new Elements_Array (1 .. Capacity);
!                L            : constant Capacity_Range := Length (Container);
! 
!             begin
!                New_Elements (1 .. L) := Elemsc (Container) (1 .. L);
!                Free (Container.Elements_Ptr);
!                Container.Elements_Ptr := New_Elements;
!             end;
!          end if;
        end if;
     end Reserve_Capacity;
  
--- 1099,1106 ----
        Capacity  : Capacity_Range)
     is
     begin
!       if Capacity > Container.Capacity then
!          raise Constraint_Error with "Capacity is out of range";
        end if;
     end Reserve_Capacity;
  
*************** is
*** 1241,1247 ****
        declare
           I, J : Capacity_Range;
           E    : Elements_Array renames
!                   Elems (Container) (1 .. Length (Container));
  
        begin
           I := 1;
--- 1117,1123 ----
        declare
           I, J : Capacity_Range;
           E    : Elements_Array renames
!                   Container.Elements (1 .. Length (Container));
  
        begin
           I := 1;
*************** is
*** 1271,1277 ****
        Index     : Index_Type := Index_Type'Last) return Extended_Index
     is
        Last : Index_Type'Base;
!       K    : Capacity_Range;
  
     begin
        if Index > Last_Index (Container) then
--- 1147,1153 ----
        Index     : Index_Type := Index_Type'Last) return Extended_Index
     is
        Last : Index_Type'Base;
!       K    : Count_Type'Base;
  
     begin
        if Index > Last_Index (Container) then
*************** is
*** 1282,1288 ****
  
        K := Capacity_Range (Int (Last) - Int (No_Index));
        for Indx in reverse Index_Type'First .. Last loop
!          if Get_Element (Container, K) = Item then
              return Indx;
           end if;
  
--- 1158,1164 ----
  
        K := Capacity_Range (Int (Last) - Int (No_Index));
        for Indx in reverse Index_Type'First .. Last loop
!          if Container.Elements (K) = Item then
              return Indx;
           end if;
  
*************** is
*** 1318,1325 ****
           II : constant Int'Base := Int (I) - Int (No_Index);
           JJ : constant Int'Base := Int (J) - Int (No_Index);
  
!          EI : Element_Type renames Elems (Container) (Capacity_Range (II));
!          EJ : Element_Type renames Elems (Container) (Capacity_Range (JJ));
  
           EI_Copy : constant Element_Type := EI;
  
--- 1194,1201 ----
           II : constant Int'Base := Int (I) - Int (No_Index);
           JJ : constant Int'Base := Int (J) - Int (No_Index);
  
!          EI : Element_Type renames Container.Elements (Capacity_Range (II));
!          EJ : Element_Type renames Container.Elements (Capacity_Range (JJ));
  
           EI_Copy : constant Element_Type := EI;
  
*************** is
*** 1388,1397 ****
           Last := Index_Type (Last_As_Int);
  
           return
!            (Capacity     => Length,
!             Last         => Last,
!             Elements_Ptr => <>,
!             Elements     => (others => New_Item));
        end;
     end To_Vector;
  
--- 1264,1272 ----
           Last := Index_Type (Last_As_Int);
  
           return
!            (Capacity => Length,
!             Last     => Last,
!             Elements => (others => New_Item));
        end;
     end To_Vector;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cofove.ads gcc-10.1.0/gcc/ada/libgnat/a-cofove.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cofove.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cofove.ads	Thu May  7 10:49:59 2020
*************** with Ada.Containers.Functional_Vectors;
*** 40,50 ****
  generic
     type Index_Type is range <>;
     type Element_Type is private;
! 
!    Bounded : Boolean := True;
!    --  If True, the containers are bounded; the initial capacity is the maximum
!    --  size, and heap allocation will be avoided. If False, the containers can
!    --  grow via heap allocation.
  
  package Ada.Containers.Formal_Vectors with
    SPARK_Mode
--- 40,46 ----
  generic
     type Index_Type is range <>;
     type Element_Type is private;
!    with function "=" (Left, Right : Element_Type) return Boolean is <>;
  
  package Ada.Containers.Formal_Vectors with
    SPARK_Mode
*************** is
*** 73,89 ****
  
     subtype Capacity_Range is Count_Type range 0 .. Last_Count;
  
!    type Vector (Capacity : Capacity_Range) is limited private with
!      Default_Initial_Condition => Is_Empty (Vector);
!    --  In the bounded case, Capacity is the capacity of the container, which
!    --  never changes. In the unbounded case, Capacity is the initial capacity
!    --  of the container, and operations such as Reserve_Capacity and Append can
!    --  increase the capacity. The capacity never shrinks, except in the case of
!    --  Clear.
!    --
!    --  Note that all objects of type Vector are constrained, including in the
!    --  unbounded case; you can't assign from one object to another if the
!    --  Capacity is different.
  
     function Length (Container : Vector) return Capacity_Range with
       Global => null,
--- 69,80 ----
  
     subtype Capacity_Range is Count_Type range 0 .. Last_Count;
  
!    type Vector (Capacity : Capacity_Range) is private with
!      Default_Initial_Condition => Is_Empty (Vector),
!      Iterable => (First       => Iter_First,
!                   Has_Element => Iter_Has_Element,
!                   Next        => Iter_Next,
!                   Element     => Element);
  
     function Length (Container : Vector) return Capacity_Range with
       Global => null,
*************** is
*** 186,191 ****
--- 177,183 ----
          Ghost,
          Global => null,
          Post   => M.Length (Model'Result) = Length (Container);
+       pragma Annotate (GNATprove, Iterable_For_Proof, "Model", Model);
  
        function Element
          (S : M.Sequence;
*************** is
*** 220,230 ****
     function Capacity (Container : Vector) return Capacity_Range with
       Global => null,
       Post   =>
!        Capacity'Result =
!          (if Bounded then
!              Container.Capacity
!           else
!              Capacity_Range'Last);
     pragma Annotate (GNATprove, Inline_For_Proof, Capacity);
  
     procedure Reserve_Capacity
--- 212,218 ----
     function Capacity (Container : Vector) return Capacity_Range with
       Global => null,
       Post   =>
!        Capacity'Result = Container.Capacity;
     pragma Annotate (GNATprove, Inline_For_Proof, Capacity);
  
     procedure Reserve_Capacity
*************** is
*** 232,238 ****
        Capacity  : Capacity_Range)
     with
       Global => null,
!      Pre    => (if Bounded then Capacity <= Container.Capacity),
       Post   => Model (Container) = Model (Container)'Old;
  
     function Is_Empty (Container : Vector) return Boolean with
--- 220,226 ----
        Capacity  : Capacity_Range)
     with
       Global => null,
!      Pre    => Capacity <= Container.Capacity,
       Post   => Model (Container) = Model (Container)'Old;
  
     function Is_Empty (Container : Vector) return Boolean with
*************** is
*** 242,254 ****
     procedure Clear (Container : in out Vector) with
       Global => null,
       Post   => Length (Container) = 0;
-    --  Note that this reclaims storage in the unbounded case. You need to call
-    --  this before a container goes out of scope in order to avoid storage
-    --  leaks. In addition, "X := ..." can leak unless you Clear(X) first.
  
     procedure Assign (Target : in out Vector; Source : Vector) with
       Global => null,
!      Pre    => (if Bounded then Length (Source) <= Target.Capacity),
       Post   => Model (Target) = Model (Source);
  
     function Copy
--- 230,239 ----
     procedure Clear (Container : in out Vector) with
       Global => null,
       Post   => Length (Container) = 0;
  
     procedure Assign (Target : in out Vector; Source : Vector) with
       Global => null,
!      Pre    => Length (Source) <= Target.Capacity,
       Post   => Model (Target) = Model (Source);
  
     function Copy
*************** is
*** 256,262 ****
        Capacity : Capacity_Range := 0) return Vector
     with
       Global => null,
!      Pre    => (if Bounded then (Capacity = 0 or Length (Source) <= Capacity)),
       Post   =>
         Model (Copy'Result) = Model (Source)
           and (if Capacity = 0 then
--- 241,247 ----
        Capacity : Capacity_Range := 0) return Vector
     with
       Global => null,
!      Pre    => (Capacity = 0 or Length (Source) <= Capacity),
       Post   =>
         Model (Copy'Result) = Model (Source)
           and (if Capacity = 0 then
*************** is
*** 267,273 ****
     procedure Move (Target : in out Vector; Source : in out Vector)
     with
       Global => null,
!      Pre    => (if Bounded then Length (Source) <= Capacity (Target)),
       Post   => Model (Target) = Model (Source)'Old and Length (Source) = 0;
  
     function Element
--- 252,258 ----
     procedure Move (Target : in out Vector; Source : in out Vector)
     with
       Global => null,
!      Pre    => Length (Source) <= Capacity (Target),
       Post   => Model (Target) = Model (Source)'Old and Length (Source) = 0;
  
     function Element
*************** is
*** 879,884 ****
--- 864,893 ----
                     Model (Target)'Old);
     end Generic_Sorting;
  
+    ---------------------------
+    --  Iteration Primitives --
+    ---------------------------
+ 
+    function Iter_First (Container : Vector) return Extended_Index with
+      Global => null;
+ 
+    function Iter_Has_Element
+      (Container : Vector;
+       Position  : Extended_Index) return Boolean
+    with
+      Global => null,
+      Post   =>
+        Iter_Has_Element'Result =
+          (Position in Index_Type'First .. Last_Index (Container));
+    pragma Annotate (GNATprove, Inline_For_Proof, Iter_Has_Element);
+ 
+    function Iter_Next
+      (Container : Vector;
+       Position  : Extended_Index) return Extended_Index
+    with
+      Global => null,
+      Pre    => Iter_Has_Element (Container, Position);
+ 
  private
     pragma SPARK_Mode (Off);
  
*************** private
*** 894,924 ****
     type Elements_Array is array (Array_Index range <>) of Element_Type;
     function "=" (L, R : Elements_Array) return Boolean is abstract;
  
!    type Elements_Array_Ptr is access all Elements_Array;
! 
!    type Vector (Capacity : Capacity_Range) is limited record
! 
!       --  In the bounded case, the elements are stored in Elements. In the
!       --  unbounded case, the elements are initially stored in Elements, until
!       --  we run out of room, then we switch to Elements_Ptr.
! 
!       Last         : Extended_Index := No_Index;
!       Elements_Ptr : Elements_Array_Ptr := null;
!       Elements     : aliased Elements_Array (1 .. Capacity);
     end record;
  
-    --  The primary reason Vector is limited is that in the unbounded case, once
-    --  Elements_Ptr is in use, assignment statements won't work. "X := Y;" will
-    --  cause X and Y to share state; that is, X.Elements_Ptr = Y.Elements_Ptr,
-    --  so for example "Append (X, ...);" will modify BOTH X and Y. That would
-    --  allow SPARK to "prove" things that are false. We could fix that by
-    --  making Vector a controlled type, and override Adjust to make a deep
-    --  copy, but finalization is not allowed in SPARK.
-    --
-    --  Note that (unfortunately) this means that 'Old and 'Loop_Entry are not
-    --  allowed on Vectors.
- 
     function Empty_Vector return Vector is
       ((Capacity => 0, others => <>));
  
  end Ada.Containers.Formal_Vectors;
--- 903,932 ----
     type Elements_Array is array (Array_Index range <>) of Element_Type;
     function "=" (L, R : Elements_Array) return Boolean is abstract;
  
!    type Vector (Capacity : Capacity_Range) is record
!       Last     : Extended_Index := No_Index;
!       Elements : Elements_Array (1 .. Capacity);
     end record;
  
     function Empty_Vector return Vector is
       ((Capacity => 0, others => <>));
  
+    function Iter_First (Container : Vector) return Extended_Index is
+      (Index_Type'First);
+ 
+    function Iter_Next
+      (Container : Vector;
+       Position  : Extended_Index) return Extended_Index
+    is
+      (if Position = Extended_Index'Last then
+          Extended_Index'First
+       else
+          Extended_Index'Succ (Position));
+ 
+    function Iter_Has_Element
+      (Container : Vector;
+       Position  : Extended_Index) return Boolean
+    is
+      (Position in Index_Type'First .. Container.Last);
+ 
  end Ada.Containers.Formal_Vectors;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cofuba.adb gcc-10.1.0/gcc/ada/libgnat/a-cofuba.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cofuba.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cofuba.adb	Thu May  7 10:49:59 2020
***************
*** 30,35 ****
--- 30,36 ----
  ------------------------------------------------------------------------------
  
  pragma Ada_2012;
+ with Ada.Unchecked_Deallocation;
  
  package body Ada.Containers.Functional_Base with SPARK_Mode => Off is
  
*************** package body Ada.Containers.Functional_B
*** 47,64 ****
     --  Search a container C for an element equal to E.all, returning the
     --  position in the underlying array.
  
     ---------
     -- "=" --
     ---------
  
     function "=" (C1 : Container; C2 : Container) return Boolean is
     begin
!       if C1.Elements'Length /= C2.Elements'Length then
           return False;
        end if;
  
!       for I in C1.Elements'Range loop
!          if C1.Elements (I).all /= C2.Elements (I).all then
              return False;
           end if;
        end loop;
--- 48,69 ----
     --  Search a container C for an element equal to E.all, returning the
     --  position in the underlying array.
  
+    procedure Resize (Base : Array_Base_Access);
+    --  Resize the underlying array if needed so that it can contain one more
+    --  element.
+ 
     ---------
     -- "=" --
     ---------
  
     function "=" (C1 : Container; C2 : Container) return Boolean is
     begin
!       if C1.Length /= C2.Length then
           return False;
        end if;
  
!       for I in 1 .. C1.Length loop
!          if C1.Base.Elements (I).all /= C2.Base.Elements (I).all then
              return False;
           end if;
        end loop;
*************** package body Ada.Containers.Functional_B
*** 72,79 ****
  
     function "<=" (C1 : Container; C2 : Container) return Boolean is
     begin
!       for I in C1.Elements'Range loop
!          if Find (C2, C1.Elements (I)) = 0 then
              return False;
           end if;
        end loop;
--- 77,84 ----
  
     function "<=" (C1 : Container; C2 : Container) return Boolean is
     begin
!       for I in 1 .. C1.Length loop
!          if Find (C2, C1.Base.Elements (I)) = 0 then
              return False;
           end if;
        end loop;
*************** package body Ada.Containers.Functional_B
*** 90,120 ****
        I : Index_Type;
        E : Element_Type) return Container
     is
-       A : constant Element_Array_Access :=
-             new Element_Array'(1 .. C.Elements'Last + 1 => <>);
-       P : Count_Type := 0;
- 
     begin
!       for J in 1 .. C.Elements'Last + 1 loop
!          if J /= To_Count (I) then
!             P := P + 1;
!             A (J) := C.Elements (P);
!          else
!             A (J) := new Element_Type'(E);
!          end if;
!       end loop;
  
!       return Container'(Elements => A);
     end Add;
  
     ----------
     -- Find --
     ----------
  
     function Find (C : Container; E : access Element_Type) return Count_Type is
     begin
!       for I in C.Elements'Range loop
!          if C.Elements (I).all = E.all then
              return I;
           end if;
        end loop;
--- 95,152 ----
        I : Index_Type;
        E : Element_Type) return Container
     is
     begin
!       if To_Count (I) = C.Length + 1 and then C.Length = C.Base.Max_Length then
!          Resize (C.Base);
!          C.Base.Max_Length := C.Base.Max_Length + 1;
!          C.Base.Elements (C.Base.Max_Length) := new Element_Type'(E);
  
!          return Container'(Length => C.Base.Max_Length, Base => C.Base);
!       else
!          declare
!             A : constant Array_Base_Access := Content_Init (C.Length);
!             P : Count_Type := 0;
!          begin
!             A.Max_Length := C.Length + 1;
!             for J in 1 .. C.Length + 1 loop
!                if J /= To_Count (I) then
!                   P := P + 1;
!                   A.Elements (J) := C.Base.Elements (P);
!                else
!                   A.Elements (J) := new Element_Type'(E);
!                end if;
!             end loop;
! 
!             return Container'(Length => A.Max_Length,
!                               Base   => A);
!          end;
!       end if;
     end Add;
  
+    ------------------
+    -- Content_Init --
+    ------------------
+ 
+    function Content_Init (L : Count_Type := 0) return Array_Base_Access
+    is
+       Max_Init : constant Count_Type := 100;
+       Size     : constant Count_Type :=
+         (if L < Count_Type'Last - Max_Init then L + Max_Init
+          else Count_Type'Last);
+       Elements : constant Element_Array_Access :=
+         new Element_Array'(1 .. Size => <>);
+    begin
+       return new Array_Base'(Max_Length => 0, Elements => Elements);
+    end Content_Init;
+ 
     ----------
     -- Find --
     ----------
  
     function Find (C : Container; E : access Element_Type) return Count_Type is
     begin
!       for I in 1 .. C.Length loop
!          if C.Base.Elements (I).all = E.all then
              return I;
           end if;
        end loop;
*************** package body Ada.Containers.Functional_B
*** 130,163 ****
     ---------
  
     function Get (C : Container; I : Index_Type) return Element_Type is
!      (C.Elements (To_Count (I)).all);
  
     ------------------
     -- Intersection --
     ------------------
  
     function Intersection (C1 : Container; C2 : Container) return Container is
!       A : constant Element_Array_Access :=
!             new Element_Array'(1 .. Num_Overlaps (C1, C2) => <>);
        P : Count_Type := 0;
  
     begin
!       for I in C1.Elements'Range loop
!          if Find (C2, C1.Elements (I)) > 0 then
              P := P + 1;
!             A (P) := C1.Elements (I);
           end if;
        end loop;
  
!       return Container'(Elements => A);
     end Intersection;
  
     ------------
     -- Length --
     ------------
  
!    function Length (C : Container) return Count_Type is (C.Elements'Length);
! 
     ---------------------
     -- Num_Overlaps --
     ---------------------
--- 162,195 ----
     ---------
  
     function Get (C : Container; I : Index_Type) return Element_Type is
!      (C.Base.Elements (To_Count (I)).all);
  
     ------------------
     -- Intersection --
     ------------------
  
     function Intersection (C1 : Container; C2 : Container) return Container is
!       L : constant Count_Type := Num_Overlaps (C1, C2);
!       A : constant Array_Base_Access := Content_Init (L);
        P : Count_Type := 0;
  
     begin
!       A.Max_Length := L;
!       for I in 1 .. C1.Length loop
!          if Find (C2, C1.Base.Elements (I)) > 0 then
              P := P + 1;
!             A.Elements (P) := C1.Base.Elements (I);
           end if;
        end loop;
  
!       return Container'(Length => P, Base => A);
     end Intersection;
  
     ------------
     -- Length --
     ------------
  
!    function Length (C : Container) return Count_Type is (C.Length);
     ---------------------
     -- Num_Overlaps --
     ---------------------
*************** package body Ada.Containers.Functional_B
*** 166,173 ****
        P : Count_Type := 0;
  
     begin
!       for I in C1.Elements'Range loop
!          if Find (C2, C1.Elements (I)) > 0 then
              P := P + 1;
           end if;
        end loop;
--- 198,205 ----
        P : Count_Type := 0;
  
     begin
!       for I in 1 .. C1.Length loop
!          if Find (C2, C1.Base.Elements (I)) > 0 then
              P := P + 1;
           end if;
        end loop;
*************** package body Ada.Containers.Functional_B
*** 180,200 ****
     ------------
  
     function Remove (C : Container; I : Index_Type) return Container is
-       A : constant Element_Array_Access :=
-             new Element_Array'(1 .. C.Elements'Last - 1 => <>);
-       P : Count_Type := 0;
- 
     begin
!       for J in C.Elements'Range loop
!          if J /= To_Count (I) then
!             P := P + 1;
!             A (P) := C.Elements (J);
!          end if;
!       end loop;
  
!       return Container'(Elements => A);
     end Remove;
  
     ---------
     -- Set --
     ---------
--- 212,272 ----
     ------------
  
     function Remove (C : Container; I : Index_Type) return Container is
     begin
!       if To_Count (I) = C.Length then
!          return Container'(Length => C.Length - 1, Base => C.Base);
!       else
!          declare
!             A : constant Array_Base_Access := Content_Init (C.Length - 1);
!             P : Count_Type := 0;
!          begin
!             A.Max_Length := C.Length - 1;
!             for J in 1 .. C.Length loop
!                if J /= To_Count (I) then
!                   P := P + 1;
!                   A.Elements (P) := C.Base.Elements (J);
!                end if;
!             end loop;
  
!             return Container'(Length => C.Length - 1, Base => A);
!          end;
!       end if;
     end Remove;
  
+    ------------
+    -- Resize --
+    ------------
+ 
+    procedure Resize (Base : Array_Base_Access) is
+    begin
+       if Base.Max_Length < Base.Elements'Length then
+          return;
+       end if;
+ 
+       pragma Assert (Base.Max_Length = Base.Elements'Length);
+ 
+       if Base.Max_Length = Count_Type'Last then
+          raise Constraint_Error;
+       end if;
+ 
+       declare
+          procedure Finalize is new Ada.Unchecked_Deallocation
+            (Object => Element_Array,
+             Name   => Element_Array_Access_Base);
+ 
+          New_Length : constant Positive_Count_Type :=
+            (if Base.Max_Length > Count_Type'Last / 2 then Count_Type'Last
+             else 2 * Base.Max_Length);
+          Elements   : constant Element_Array_Access :=
+            new Element_Array (1 .. New_Length);
+          Old_Elmts  : Element_Array_Access_Base := Base.Elements;
+       begin
+          Elements (1 .. Base.Max_Length) := Base.Elements.all;
+          Base.Elements := Elements;
+          Finalize (Old_Elmts);
+       end;
+    end Resize;
+ 
     ---------
     -- Set --
     ---------
*************** package body Ada.Containers.Functional_B
*** 205,214 ****
        E : Element_Type) return Container
     is
        Result : constant Container :=
!                  Container'(Elements => new Element_Array'(C.Elements.all));
  
     begin
!       Result.Elements (To_Count (I)) := new Element_Type'(E);
        return Result;
     end Set;
  
--- 277,289 ----
        E : Element_Type) return Container
     is
        Result : constant Container :=
!                  Container'(Length => C.Length,
!                             Base => Content_Init (C.Length));
  
     begin
!       Result.Base.Max_Length := C.Length;
!       Result.Base.Elements (1 .. C.Length) := C.Base.Elements (1 .. C.Length);
!       Result.Base.Elements (To_Count (I)) := new Element_Type'(E);
        return Result;
     end Set;
  
*************** package body Ada.Containers.Functional_B
*** 230,249 ****
  
        declare
           L : constant Count_Type := Length (C1) - N + Length (C2);
!          A : constant Element_Array_Access :=
!                new Element_Array'
!                      (C1.Elements.all & (Length (C1) + 1 .. L => <>));
           P : Count_Type := Length (C1);
  
        begin
!          for I in C2.Elements'Range loop
!             if Find (C1, C2.Elements (I)) = 0 then
                 P := P + 1;
!                A (P) := C2.Elements (I);
              end if;
           end loop;
  
!          return Container'(Elements => A);
        end;
     end Union;
  
--- 305,324 ----
  
        declare
           L : constant Count_Type := Length (C1) - N + Length (C2);
!          A : constant Array_Base_Access := Content_Init (L);
           P : Count_Type := Length (C1);
  
        begin
!          A.Max_Length := L;
!          A.Elements (1 .. C1.Length) := C1.Base.Elements (1 .. C1.Length);
!          for I in 1 .. C2.Length loop
!             if Find (C1, C2.Base.Elements (I)) = 0 then
                 P := P + 1;
!                A.Elements (P) := C2.Base.Elements (I);
              end if;
           end loop;
  
!          return Container'(Length => L, Base => A);
        end;
     end Union;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cofuba.ads gcc-10.1.0/gcc/ada/libgnat/a-cofuba.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cofuba.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cofuba.ads	Thu May  7 10:49:59 2020
*************** private
*** 105,117 ****
     type Element_Array is
       array (Positive_Count_Type range <>) of Element_Access;
  
!    type Element_Array_Access is not null access Element_Array;
  
     Empty_Element_Array_Access : constant Element_Array_Access :=
       new Element_Array'(1 .. 0 => null);
  
     type Container is record
!       Elements : Element_Array_Access := Empty_Element_Array_Access;
     end record;
  
  end Ada.Containers.Functional_Base;
--- 105,130 ----
     type Element_Array is
       array (Positive_Count_Type range <>) of Element_Access;
  
!    type Element_Array_Access_Base is access Element_Array;
! 
!    subtype Element_Array_Access is not null Element_Array_Access_Base;
  
     Empty_Element_Array_Access : constant Element_Array_Access :=
       new Element_Array'(1 .. 0 => null);
  
+    type Array_Base is record
+      Max_Length : Count_Type;
+      Elements   : Element_Array_Access;
+    end record;
+ 
+    type Array_Base_Access is not null access Array_Base;
+ 
+    function Content_Init (L : Count_Type := 0) return Array_Base_Access;
+    --  Used to initialize the content of an array base with length L
+ 
     type Container is record
!       Length : Count_Type := 0;
!       Base   : Array_Base_Access := Content_Init;
     end record;
  
  end Ada.Containers.Functional_Base;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cofuma.adb gcc-10.1.0/gcc/ada/libgnat/a-cofuma.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cofuma.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cofuma.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Functional_M
*** 88,102 ****
        New_Key : Key_Type) return Boolean
     is
     begin
!       for I in 1 .. Length (Left.Keys) loop
           declare
!             K : constant Key_Type := Get (Left.Keys, I);
           begin
              if not Equivalent_Keys (K, New_Key)
                and then
                  (Find (Right.Keys, K) = 0
                    or else Get (Right.Elements, Find (Right.Keys, K)) /=
!                           Get (Left.Elements, I))
              then
                 return False;
              end if;
--- 88,102 ----
        New_Key : Key_Type) return Boolean
     is
     begin
!       for J in 1 .. Length (Left.Keys) loop
           declare
!             K : constant Key_Type := Get (Left.Keys, J);
           begin
              if not Equivalent_Keys (K, New_Key)
                and then
                  (Find (Right.Keys, K) = 0
                    or else Get (Right.Elements, Find (Right.Keys, K)) /=
!                           Get (Left.Elements, J))
              then
                 return False;
              end if;
*************** package body Ada.Containers.Functional_M
*** 112,127 ****
        Y     : Key_Type) return Boolean
     is
     begin
!       for I in 1 .. Length (Left.Keys) loop
           declare
!             K : constant Key_Type := Get (Left.Keys, I);
           begin
              if not Equivalent_Keys (K, X)
                and then not Equivalent_Keys (K, Y)
                and then
                  (Find (Right.Keys, K) = 0
                    or else Get (Right.Elements, Find (Right.Keys, K)) /=
!                           Get (Left.Elements, I))
              then
                 return False;
              end if;
--- 112,127 ----
        Y     : Key_Type) return Boolean
     is
     begin
!       for J in 1 .. Length (Left.Keys) loop
           declare
!             K : constant Key_Type := Get (Left.Keys, J);
           begin
              if not Equivalent_Keys (K, X)
                and then not Equivalent_Keys (K, Y)
                and then
                  (Find (Right.Keys, K) = 0
                    or else Get (Right.Elements, Find (Right.Keys, K)) /=
!                           Get (Left.Elements, J))
              then
                 return False;
              end if;
*************** package body Ada.Containers.Functional_M
*** 173,181 ****
  
     function Keys_Included (Left : Map; Right : Map) return Boolean is
     begin
!       for I in 1 .. Length (Left.Keys) loop
           declare
!             K : constant Key_Type := Get (Left.Keys, I);
           begin
              if Find (Right.Keys, K) = 0 then
                 return False;
--- 173,181 ----
  
     function Keys_Included (Left : Map; Right : Map) return Boolean is
     begin
!       for J in 1 .. Length (Left.Keys) loop
           declare
!             K : constant Key_Type := Get (Left.Keys, J);
           begin
              if Find (Right.Keys, K) = 0 then
                 return False;
*************** package body Ada.Containers.Functional_M
*** 196,204 ****
        New_Key : Key_Type) return Boolean
     is
     begin
!       for I in 1 .. Length (Left.Keys) loop
           declare
!             K : constant Key_Type := Get (Left.Keys, I);
           begin
              if not Equivalent_Keys (K, New_Key)
                and then Find (Right.Keys, K) = 0
--- 196,204 ----
        New_Key : Key_Type) return Boolean
     is
     begin
!       for J in 1 .. Length (Left.Keys) loop
           declare
!             K : constant Key_Type := Get (Left.Keys, J);
           begin
              if not Equivalent_Keys (K, New_Key)
                and then Find (Right.Keys, K) = 0
*************** package body Ada.Containers.Functional_M
*** 218,226 ****
        Y     : Key_Type) return Boolean
     is
     begin
!       for I in 1 .. Length (Left.Keys) loop
           declare
!             K : constant Key_Type := Get (Left.Keys, I);
           begin
              if not Equivalent_Keys (K, X)
                and then not Equivalent_Keys (K, Y)
--- 218,226 ----
        Y     : Key_Type) return Boolean
     is
     begin
!       for J in 1 .. Length (Left.Keys) loop
           declare
!             K : constant Key_Type := Get (Left.Keys, J);
           begin
              if not Equivalent_Keys (K, X)
                and then not Equivalent_Keys (K, Y)
*************** package body Ada.Containers.Functional_M
*** 243,248 ****
--- 243,260 ----
        return Length (Container.Elements);
     end Length;
  
+    ------------
+    -- Remove --
+    ------------
+ 
+    function Remove (Container : Map; Key : Key_Type) return Map is
+       J : constant Extended_Index := Find (Container.Keys, Key);
+    begin
+       return
+         (Keys     => Remove (Container.Keys, J),
+          Elements => Remove (Container.Elements, J));
+    end Remove;
+ 
     ---------------
     -- Same_Keys --
     ---------------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cofuma.ads gcc-10.1.0/gcc/ada/libgnat/a-cofuma.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cofuma.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cofuma.ads	Thu May  7 10:49:59 2020
*************** generic
*** 39,44 ****
--- 39,45 ----
     with function Equivalent_Keys
       (Left  : Key_Type;
        Right : Key_Type) return Boolean is "=";
+    with function "=" (Left, Right : Element_Type) return Boolean is <>;
  
     Enable_Handling_Of_Equivalence : Boolean := True;
     --  This constant should only be set to False when no particular handling
*************** package Ada.Containers.Functional_Maps w
*** 242,247 ****
--- 243,262 ----
           and Container <= Add'Result
           and Keys_Included_Except (Add'Result, Container, New_Key);
  
+    function Remove
+      (Container : Map;
+       Key       : Key_Type) return Map
+    --  Returns Container without any mapping for Key
+ 
+    with
+      Global => null,
+      Pre    => Has_Key (Container, Key),
+      Post   =>
+        Length (Container) = Length (Remove'Result) + 1
+          and not Has_Key (Remove'Result, Key)
+          and Remove'Result <= Container
+          and Keys_Included_Except (Container, Remove'Result, Key);
+ 
     function Set
       (Container : Map;
        Key       : Key_Type;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cofuve.ads gcc-10.1.0/gcc/ada/libgnat/a-cofuve.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cofuve.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cofuve.ads	Thu May  7 10:49:59 2020
*************** generic
*** 38,43 ****
--- 38,44 ----
     --  should have at least one more element at the low end than Index_Type.
  
     type Element_Type (<>) is private;
+    with function "=" (Left, Right : Element_Type) return Boolean is <>;
  
  package Ada.Containers.Functional_Vectors with SPARK_Mode is
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cogeso.ads gcc-10.1.0/gcc/ada/libgnat/a-cogeso.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-cogeso.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cogeso.ads	Thu May  7 10:49:59 2020
*************** generic
*** 38,40 ****
--- 38,56 ----
  
  procedure Ada.Containers.Generic_Sort (First, Last : Index_Type'Base);
  pragma Pure (Ada.Containers.Generic_Sort);
+ --  Reorders the elements of an indexable structure, over the range
+ --  First .. Last, such that the elements are sorted in the ordering determined
+ --  by the generic formal function Before; Before should return True if Left is
+ --  to be sorted before Right. The generic formal Before compares the elements
+ --  having the given indices, and the generic formal Swap exchanges the values
+ --  of the indicated elements. Any exception raised during evaluation of Before
+ --  or Swap is propagated.
+ --
+ --  The actual function for the generic formal function "<" is expected to
+ --  return the same value each time it is called with a particular pair of
+ --  element values. It should not modify Container and it should define a
+ --  strict weak ordering relationship: irreflexive, asymmetric, transitive, and
+ --  in addition, if x < y for any values x and y, then for all other values z,
+ --  (x < z) or (z < y).  If the actual for "<" behaves in some other manner,
+ --  the behavior of the instance of Generic_Sort is unspecified. The number of
+ --  times Generic_Sort calls "<" is unspecified.
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cohama.adb gcc-10.1.0/gcc/ada/libgnat/a-cohama.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cohama.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cohama.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Hashed_Maps
*** 213,219 ****
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 213,219 ----
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Hashed_Maps
*** 238,244 ****
             (Element => Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 238,244 ----
             (Element => Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Hashed_Maps
*** 836,842 ****
          Container.HT.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 836,842 ----
          Container.HT.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Hashed_Maps
*** 937,943 ****
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 937,943 ----
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
*************** package body Ada.Containers.Hashed_Maps
*** 962,968 ****
             (Element => Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 962,968 ----
             (Element => Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-cohase.adb gcc-10.1.0/gcc/ada/libgnat/a-cohase.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-cohase.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-cohase.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Hashed_Sets
*** 223,229 ****
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 223,229 ----
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Hashed_Sets
*** 1119,1125 ****
          Container.HT.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1119,1125 ----
          Container.HT.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Hashed_Sets
*** 1839,1845 ****
                (Element => Node.Element'Access,
                 Control => (Controlled with TC))
              do
!                Lock (TC.all);
              end return;
           end;
        end Constant_Reference;
--- 1839,1845 ----
                (Element => Node.Element'Access,
                 Control => (Controlled with TC))
              do
!                Busy (TC.all);
              end return;
           end;
        end Constant_Reference;
*************** package body Ada.Containers.Hashed_Sets
*** 2025,2031 ****
                                Old_Pos  => Position,
                                Old_Hash => Hash (Key (Position))))
              do
!                Lock (HT.TC);
              end return;
           end;
        end Reference_Preserving_Key;
--- 2025,2031 ----
                                Old_Pos  => Position,
                                Old_Hash => Hash (Key (Position))))
              do
!                Busy (HT.TC);
              end return;
           end;
        end Reference_Preserving_Key;
*************** package body Ada.Containers.Hashed_Sets
*** 2055,2061 ****
                                Old_Pos  => P,
                                Old_Hash => Hash (Key)))
              do
!                Lock (HT.TC);
              end return;
           end;
        end Reference_Preserving_Key;
--- 2055,2061 ----
                                Old_Pos  => P,
                                Old_Hash => Hash (Key)))
              do
!                Busy (HT.TC);
              end return;
           end;
        end Reference_Preserving_Key;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-coinve.adb gcc-10.1.0/gcc/ada/libgnat/a-coinve.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-coinve.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-coinve.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Indefinite_V
*** 324,330 ****
             (Element => Container.Elements.EA (Position.Index),
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 324,330 ----
             (Element => Container.Elements.EA (Position.Index),
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Indefinite_V
*** 348,354 ****
             (Element => Container.Elements.EA (Index),
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 348,354 ----
             (Element => Container.Elements.EA (Index),
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Indefinite_V
*** 2586,2592 ****
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 2586,2592 ----
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Indefinite_V
*** 2718,2724 ****
             (Element => Container.Elements.EA (Position.Index),
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 2718,2724 ----
             (Element => Container.Elements.EA (Position.Index),
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
*************** package body Ada.Containers.Indefinite_V
*** 2742,2748 ****
             (Element => Container.Elements.EA (Index),
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 2742,2748 ----
             (Element => Container.Elements.EA (Index),
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-comutr.adb gcc-10.1.0/gcc/ada/libgnat/a-comutr.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-comutr.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-comutr.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Multiway_Tre
*** 469,475 ****
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 469,475 ----
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Multiway_Tre
*** 1830,1836 ****
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1830,1836 ----
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Multiway_Tre
*** 2023,2029 ****
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 2023,2029 ----
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-conhel.adb gcc-10.1.0/gcc/ada/libgnat/a-conhel.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-conhel.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-conhel.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Helpers is
*** 38,44 ****
        procedure Adjust (Control : in out Reference_Control_Type) is
        begin
           if Control.T_Counts /= null then
!             Lock (Control.T_Counts.all);
           end if;
        end Adjust;
  
--- 38,44 ----
        procedure Adjust (Control : in out Reference_Control_Type) is
        begin
           if Control.T_Counts /= null then
!             Busy (Control.T_Counts.all);
           end if;
        end Adjust;
  
*************** package body Ada.Containers.Helpers is
*** 60,66 ****
        procedure Finalize (Control : in out Reference_Control_Type) is
        begin
           if Control.T_Counts /= null then
!             Unlock (Control.T_Counts.all);
              Control.T_Counts := null;
           end if;
        end Finalize;
--- 60,66 ----
        procedure Finalize (Control : in out Reference_Control_Type) is
        begin
           if Control.T_Counts /= null then
!             Unbusy (Control.T_Counts.all);
              Control.T_Counts := null;
           end if;
        end Finalize;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-contai.ads gcc-10.1.0/gcc/ada/libgnat/a-contai.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-contai.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-contai.ads	Thu May  7 10:49:59 2020
*************** package Ada.Containers is
*** 17,24 ****
--- 17,28 ----
     pragma Pure;
  
     type Hash_Type is mod 2**32;
+    --  Represents the range of the result of a hash function
+ 
     type Count_Type is range 0 .. 2**31 - 1;
+    --  Represents the (potential or actual) number of elements of a container
  
     Capacity_Error : exception;
+    --  Raised when the capacity of a container is exceeded
  
  end Ada.Containers;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-convec.adb gcc-10.1.0/gcc/ada/libgnat/a-convec.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-convec.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-convec.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Vectors is
*** 294,300 ****
             (Element => Container.Elements.EA (Position.Index)'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 294,300 ----
             (Element => Container.Elements.EA (Position.Index)'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Vectors is
*** 316,322 ****
             (Element => Container.Elements.EA (Index)'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 316,322 ----
             (Element => Container.Elements.EA (Index)'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Vectors is
*** 2293,2299 ****
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 2293,2299 ----
        TC : constant Tamper_Counts_Access := Container.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Vectors is
*** 2409,2415 ****
             (Element => Container.Elements.EA (Position.Index)'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 2409,2415 ----
             (Element => Container.Elements.EA (Position.Index)'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
*************** package body Ada.Containers.Vectors is
*** 2431,2437 ****
             (Element => Container.Elements.EA (Index)'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 2431,2437 ----
             (Element => Container.Elements.EA (Index)'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-coorma.adb gcc-10.1.0/gcc/ada/libgnat/a-coorma.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-coorma.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-coorma.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Ordered_Maps
*** 336,342 ****
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 336,342 ----
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Ordered_Maps
*** 361,367 ****
             (Element => Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 361,367 ----
             (Element => Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Ordered_Maps
*** 1180,1186 ****
          Container.Tree.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1180,1186 ----
          Container.Tree.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
*************** package body Ada.Containers.Ordered_Maps
*** 1307,1313 ****
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 1307,1313 ----
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
*************** package body Ada.Containers.Ordered_Maps
*** 1332,1338 ****
             (Element => Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Reference;
--- 1332,1338 ----
             (Element => Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Reference;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-coorse.adb gcc-10.1.0/gcc/ada/libgnat/a-coorse.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-coorse.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-coorse.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Containers.Ordered_Sets
*** 349,355 ****
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Lock (TC.all);
           end return;
        end;
     end Constant_Reference;
--- 349,355 ----
             (Element => Position.Node.Element'Access,
              Control => (Controlled with TC))
           do
!             Busy (TC.all);
           end return;
        end;
     end Constant_Reference;
*************** package body Ada.Containers.Ordered_Sets
*** 706,712 ****
                (Element => Node.Element'Access,
                 Control => (Controlled with TC))
              do
!                Lock (TC.all);
              end return;
           end;
        end Constant_Reference;
--- 706,712 ----
                (Element => Node.Element'Access,
                 Control => (Controlled with TC))
              do
!                Busy (TC.all);
              end return;
           end;
        end Constant_Reference;
*************** package body Ada.Containers.Ordered_Sets
*** 903,909 ****
                       Pos       => Position,
                       Old_Key   => new Key_Type'(Key (Position))))
              do
!                Lock (Tree.TC);
              end return;
           end;
        end Reference_Preserving_Key;
--- 903,909 ----
                       Pos       => Position,
                       Old_Key   => new Key_Type'(Key (Position))))
              do
!                Busy (Tree.TC);
              end return;
           end;
        end Reference_Preserving_Key;
*************** package body Ada.Containers.Ordered_Sets
*** 931,937 ****
                       Pos       => Find (Container, Key),
                       Old_Key   => new Key_Type'(Key)))
              do
!                Lock (Tree.TC);
              end return;
           end;
        end Reference_Preserving_Key;
--- 931,937 ----
                       Pos       => Find (Container, Key),
                       Old_Key   => new Key_Type'(Key)))
              do
!                Busy (Tree.TC);
              end return;
           end;
        end Reference_Preserving_Key;
*************** package body Ada.Containers.Ordered_Sets
*** 1550,1556 ****
          Container.Tree.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Lock (TC.all);
        end return;
     end Pseudo_Reference;
  
--- 1550,1556 ----
          Container.Tree.TC'Unrestricted_Access;
     begin
        return R : constant Reference_Control_Type := (Controlled with TC) do
!          Busy (TC.all);
        end return;
     end Pseudo_Reference;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-dhfina.adb gcc-10.1.0/gcc/ada/libgnat/a-dhfina.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-dhfina.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/a-dhfina.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,332 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                  ADA.DIRECTORIES.HIERARCHICAL_FILE_NAMES                 --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --          Copyright (C) 2004-2019, Free Software Foundation, Inc.         --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- In particular,  you can freely  distribute your programs  built with the --
+ -- GNAT Pro compiler, including any required library run-time units,  using --
+ -- any licensing terms  of your choosing.  See the AdaCore Software License --
+ -- for full details.                                                        --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Ada.Characters.Handling;  use Ada.Characters.Handling;
+ with Ada.Directories.Validity; use Ada.Directories.Validity;
+ with Ada.Strings.Fixed;        use Ada.Strings.Fixed;
+ with System;                   use System;
+ 
+ package body Ada.Directories.Hierarchical_File_Names is
+ 
+    Dir_Separator : constant Character;
+    pragma Import (C, Dir_Separator, "__gnat_dir_separator");
+    --  Running system default directory separator
+ 
+    -----------------
+    -- Subprograms --
+    -----------------
+ 
+    function Equivalent_File_Names
+      (Left  : String;
+       Right : String)
+       return Boolean;
+    --  Perform an OS-independent comparison between two file paths
+ 
+    function Is_Absolute_Path (Name : String) return Boolean;
+    --  Returns True if Name is an absolute path name, i.e. it designates a
+    --  file or directory absolutely rather than relative to another directory.
+ 
+    ---------------------------
+    -- Equivalent_File_Names --
+    ---------------------------
+ 
+    function Equivalent_File_Names
+      (Left  : String;
+       Right : String)
+       return Boolean
+    is
+    begin
+       --  Check the validity of the input paths
+ 
+       if not Is_Valid_Path_Name (Left)
+         or else not Is_Valid_Path_Name (Right)
+       then
+          return False;
+       end if;
+ 
+       --  Normalize the paths by removing any trailing directory separators and
+       --  perform the comparison.
+ 
+       declare
+          Normal_Left  : constant String :=
+            (if Index (Left, Dir_Separator & "", Strings.Backward) = Left'Last
+               and then not Is_Root_Directory_Name (Left)
+             then
+                Left (Left'First .. Left'Last - 1)
+             else
+                Left);
+ 
+          Normal_Right : constant String :=
+            (if Index (Right, Dir_Separator & "", Strings.Backward) = Right'Last
+               and then not Is_Root_Directory_Name (Right)
+             then
+                Right (Right'First .. Right'Last - 1)
+             else
+                Right);
+       begin
+          --  Within Windows we assume case insensitivity
+ 
+          if not Windows then
+             return Normal_Left = Normal_Right;
+          end if;
+ 
+          --  Otherwise do a straight comparison
+ 
+          return To_Lower (Normal_Left) = To_Lower (Normal_Right);
+       end;
+    end Equivalent_File_Names;
+ 
+    ----------------------
+    -- Is_Absolute_Path --
+    ----------------------
+ 
+    function Is_Absolute_Path (Name : String) return Boolean is
+       function Is_Absolute_Path
+         (Name   : Address;
+          Length : Integer) return Integer;
+       pragma Import (C, Is_Absolute_Path, "__gnat_is_absolute_path");
+    begin
+       return Is_Absolute_Path (Name'Address, Name'Length) /= 0;
+    end Is_Absolute_Path;
+ 
+    --------------------
+    -- Is_Simple_Name --
+    --------------------
+ 
+    function Is_Simple_Name (Name : String) return Boolean is
+    begin
+       --  Verify the file path name is valid and that it is not a root
+ 
+       if not Is_Valid_Path_Name (Name)
+         or else Is_Root_Directory_Name (Name)
+       then
+          return False;
+       end if;
+ 
+       --  Check for the special paths "." and "..", which are considered simple
+ 
+       if Is_Parent_Directory_Name (Name)
+         or else Is_Current_Directory_Name (Name)
+       then
+          return True;
+       end if;
+ 
+       --  Perform a comparison with the calculated simple path name
+ 
+       return Equivalent_File_Names (Simple_Name (Name), Name);
+    end Is_Simple_Name;
+ 
+    ----------------------------
+    -- Is_Root_Directory_Name --
+    ----------------------------
+ 
+    function Is_Root_Directory_Name (Name : String) return Boolean is
+    begin
+       --  Check if the path name is a root directory by looking for a slash in
+       --  the general case, and a drive letter in the case of Windows.
+ 
+       return Name = "/"
+                or else
+                  (Windows
+                    and then
+                      (Name = "\"
+                        or else
+                          (Name'Length = 3
+                            and then Name (Name'Last - 1) = ':'
+                            and then Name (Name'Last) in '/' | '\'
+                            and then (Name (Name'First) in 'a' .. 'z'
+                                       or else
+                                         Name (Name'First) in 'A' .. 'Z'))
+                        or else
+                          (Name'Length = 2
+                            and then Name (Name'Last) = ':'
+                            and then (Name (Name'First) in 'a' .. 'z'
+                                       or else
+                                         Name (Name'First) in 'A' .. 'Z'))));
+    end Is_Root_Directory_Name;
+ 
+    ------------------------------
+    -- Is_Parent_Directory_Name --
+    ------------------------------
+ 
+    function Is_Parent_Directory_Name (Name : String) return Boolean is
+    begin
+       return Name = "..";
+    end Is_Parent_Directory_Name;
+ 
+    -------------------------------
+    -- Is_Current_Directory_Name --
+    -------------------------------
+ 
+    function Is_Current_Directory_Name (Name : String) return Boolean is
+    begin
+       return Name = ".";
+    end Is_Current_Directory_Name;
+ 
+    ------------------
+    -- Is_Full_Name --
+    ------------------
+ 
+    function Is_Full_Name (Name : String) return Boolean is
+    begin
+       return Equivalent_File_Names (Full_Name (Name), Name);
+    end Is_Full_Name;
+ 
+    ----------------------
+    -- Is_Relative_Name --
+    ----------------------
+ 
+    function Is_Relative_Name (Name : String) return Boolean is
+    begin
+       return not Is_Absolute_Path (Name)
+                and then Is_Valid_Path_Name (Name);
+    end Is_Relative_Name;
+ 
+    -----------------------
+    -- Initial_Directory --
+    -----------------------
+ 
+    function Initial_Directory (Name : String) return String is
+       Start : constant Integer := Index (Name, Dir_Separator & "");
+    begin
+       --  Verify path name
+ 
+       if not Is_Valid_Path_Name (Name) then
+          raise Name_Error with "invalid path name """ & Name & '"';
+       end if;
+ 
+       --  When there is no starting directory separator or the path name is a
+       --  root directory then the path name is already simple - so return it.
+ 
+       if Is_Root_Directory_Name (Name) or else Start = 0 then
+          return Name;
+       end if;
+ 
+       --  When the initial directory of the path name is a root directory then
+       --  the starting directory separator is part of the result so we must
+       --  return it in the slice.
+ 
+       if Is_Root_Directory_Name (Name (Name'First .. Start)) then
+          return Name (Name'First .. Start);
+       end if;
+ 
+       --  Otherwise we grab a slice up to the starting directory separator
+ 
+       return Name (Name'First .. Start - 1);
+    end Initial_Directory;
+ 
+    -------------------
+    -- Relative_Name --
+    -------------------
+ 
+    function Relative_Name (Name : String) return String is
+    begin
+       --  We cannot derive a relative name if Name does not exist
+ 
+       if not Is_Relative_Name (Name)
+         and then not Is_Valid_Path_Name (Name)
+       then
+          raise Name_Error with "invalid relative path name """ & Name & '"';
+       end if;
+ 
+       --  Name only has a single part and thus cannot be made relative
+ 
+       if Is_Simple_Name (Name)
+         or else Is_Root_Directory_Name (Name)
+       then
+          raise Name_Error with
+            "relative path name """ & Name & """ is composed of a single part";
+       end if;
+ 
+       --  Trim the input according to the initial directory and maintain proper
+       --  directory separation due to the fact that root directories may
+       --  contain separators.
+ 
+       declare
+          Init_Dir : constant String := Initial_Directory (Name);
+       begin
+          if Init_Dir (Init_Dir'Last) = Dir_Separator then
+             return Name (Name'First + Init_Dir'Length .. Name'Last);
+          end if;
+ 
+          return Name (Name'First + Init_Dir'Length + 1 .. Name'Last);
+       end;
+    end Relative_Name;
+ 
+    -------------
+    -- Compose --
+    -------------
+ 
+    function Compose
+      (Directory     : String := "";
+       Relative_Name : String;
+       Extension     : String := "") return String
+    is
+       --  Append a directory separator if none is present
+ 
+       Separated_Dir : constant String :=
+         (if    Directory = "" then ""
+          elsif Directory (Directory'Last) = Dir_Separator then Directory
+          else  Directory & Dir_Separator);
+    begin
+       --  Check that relative name is valid
+ 
+       if not Is_Relative_Name (Relative_Name) then
+          raise Name_Error with
+            "invalid relative path name """ & Relative_Name & '"';
+       end if;
+ 
+       --  Check that directory is valid
+ 
+       if Separated_Dir /= ""
+         and then (not Is_Valid_Path_Name (Separated_Dir & Relative_Name))
+       then
+          raise Name_Error with
+            "invalid path composition """ & Separated_Dir & Relative_Name & '"';
+       end if;
+ 
+       --  Check that the extension is valid
+ 
+       if Extension /= ""
+         and then not Is_Valid_Path_Name
+                        (Separated_Dir & Relative_Name & Extension)
+       then
+          raise Name_Error with
+            "invalid path composition """
+              & Separated_Dir & Relative_Name & Extension & '"';
+       end if;
+ 
+       --  Concatenate the result
+ 
+       return Separated_Dir & Relative_Name & Extension;
+    end Compose;
+ 
+ end Ada.Directories.Hierarchical_File_Names;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-dhfina.ads gcc-10.1.0/gcc/ada/libgnat/a-dhfina.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-dhfina.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-dhfina.ads	Thu May  7 10:49:59 2020
***************
*** 6,46 ****
  --                                                                          --
  --                                 S p e c                                  --
  --                                                                          --
! -- This specification is derived from the Ada Reference Manual for use with --
! -- GNAT.  In accordance with the copyright of that document, you can freely --
! -- copy and modify this specification,  provided that if you redistribute a --
! -- modified version,  any changes that you have made are clearly indicated. --
  --                                                                          --
  ------------------------------------------------------------------------------
  
  package Ada.Directories.Hierarchical_File_Names is
-    pragma Unimplemented_Unit;
  
     function Is_Simple_Name (Name : String) return Boolean;
  
     function Is_Root_Directory_Name (Name : String) return Boolean;
  
     function Is_Parent_Directory_Name (Name : String) return Boolean;
  
     function Is_Current_Directory_Name (Name : String) return Boolean;
  
     function Is_Full_Name (Name : String) return Boolean;
  
     function Is_Relative_Name (Name : String) return Boolean;
  
     function Simple_Name (Name : String) return String
       renames Ada.Directories.Simple_Name;
  
     function Containing_Directory (Name : String) return String
       renames Ada.Directories.Containing_Directory;
  
     function Initial_Directory (Name : String) return String;
  
     function Relative_Name (Name : String) return String;
  
     function Compose
       (Directory      : String := "";
        Relative_Name  : String;
        Extension      : String := "") return String;
  
  end Ada.Directories.Hierarchical_File_Names;
--- 6,106 ----
  --                                                                          --
  --                                 S p e c                                  --
  --                                                                          --
! --          Copyright (C) 2004-2019, Free Software Foundation, Inc.         --
! --                                                                          --
! -- GNAT is free software;  you can  redistribute it  and/or modify it under --
! -- terms of the  GNU General Public License as published  by the Free Soft- --
! -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
! -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
! -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
! -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
! --                                                                          --
! -- As a special exception under Section 7 of GPL version 3, you are granted --
! -- additional permissions described in the GCC Runtime Library Exception,   --
! -- version 3.1, as published by the Free Software Foundation.               --
! --                                                                          --
! -- In particular,  you can freely  distribute your programs  built with the --
! -- GNAT Pro compiler, including any required library run-time units,  using --
! -- any licensing terms  of your choosing.  See the AdaCore Software License --
! -- for full details.                                                        --
! --                                                                          --
! -- GNAT was originally developed  by the GNAT team at  New York University. --
! -- Extensive contributions were provided by Ada Core Technologies Inc.      --
  --                                                                          --
  ------------------------------------------------------------------------------
  
  package Ada.Directories.Hierarchical_File_Names is
  
     function Is_Simple_Name (Name : String) return Boolean;
+    --  Returns True if Name is a simple name, and returns False otherwise.
  
     function Is_Root_Directory_Name (Name : String) return Boolean;
+    --  Returns True if Name is syntactically a root (a directory that cannot
+    --  be decomposed further), and returns False otherwise.
  
     function Is_Parent_Directory_Name (Name : String) return Boolean;
+    --  Returns True if Name can be used to indicate symbolically the parent
+    --  directory of any directory, and returns False otherwise.
  
     function Is_Current_Directory_Name (Name : String) return Boolean;
+    --  Returns True if Name can be used to indicate symbolically the directory
+    --  itself for any directory, and returns False otherwise.
  
     function Is_Full_Name (Name : String) return Boolean;
+    --  Returns True if the leftmost directory part of Name is a root, and
+    --  returns False otherwise.
  
     function Is_Relative_Name (Name : String) return Boolean;
+    --  Returns True if Name allows the identification of an external file
+    --  (including directories and special files) but is not a full name, and
+    --  returns False otherwise.
  
     function Simple_Name (Name : String) return String
       renames Ada.Directories.Simple_Name;
+    --  Returns the simple name portion of the file name specified by Name. The
+    --  exception Name_Error is propagated if the string given as Name does not
+    --  allow the identification of an external file (including directories and
+    --  special files).
  
     function Containing_Directory (Name : String) return String
       renames Ada.Directories.Containing_Directory;
+    --  Returns the name of the containing directory of the external file
+    --  (including directories) identified by Name. If more than one directory
+    --  can contain Name, the directory name returned is implementation-defined.
+    --  The exception Name_Error is propagated if the string given as Name does
+    --  not allow the identification of an external file. The exception
+    --  Use_Error is propagated if the external file does not have a containing
+    --  directory.
  
     function Initial_Directory (Name : String) return String;
+    --  Returns the leftmost directory part in Name. That is, it returns a root
+    --  directory name (for a full name), or one of a parent directory name, a
+    --  current directory name, or a simple name (for a relative name). The
+    --  exception Name_Error is propagated if the string given as Name does not
+    --  allow the identification of an external file (including directories and
+    --  special files).
  
     function Relative_Name (Name : String) return String;
+    --  Returns the entire file name except the Initial_Directory portion. The
+    --  exception Name_Error is propagated if the string given as Name does not
+    --  allow the identification of an external file (including directories and
+    --  special files), or if Name has a single part (this includes if any of
+    --  Is_Simple_Name, Is_Root_Directory_Name, Is_Parent_Directory_Name, or
+    --  Is_Current_Directory_Name are True).
  
     function Compose
       (Directory      : String := "";
        Relative_Name  : String;
        Extension      : String := "") return String;
+    --  Returns the name of the external file with the specified Directory,
+    --  Relative_Name, and Extension. The exception Name_Error is propagated if
+    --  the string given as Directory is not the null string and does not allow
+    --  the identification of a directory, or if Is_Relative_Name
+    --  (Relative_Name) is False, or if the string given as Extension is not
+    --  the null string and is not a possible extension, or if Extension is not
+    --  the null string and Simple_Name (Relative_Name) is not a base name.
+    --
+    --  The result of Compose is a full name if Is_Full_Name (Directory) is
+    --  True; result is a relative name otherwise.
  
  end Ada.Directories.Hierarchical_File_Names;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-direct.adb gcc-10.1.0/gcc/ada/libgnat/a-direct.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-direct.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-direct.adb	Thu May  7 10:49:59 2020
*************** with Ada.Calendar;               use Ada
*** 33,38 ****
--- 33,40 ----
  with Ada.Calendar.Formatting;    use Ada.Calendar.Formatting;
  with Ada.Characters.Handling;    use Ada.Characters.Handling;
  with Ada.Directories.Validity;   use Ada.Directories.Validity;
+ with Ada.Directories.Hierarchical_File_Names;
+ use Ada.Directories.Hierarchical_File_Names;
  with Ada.Strings.Fixed;
  with Ada.Strings.Maps;           use Ada.Strings.Maps;
  with Ada.Strings.Unbounded;      use Ada.Strings.Unbounded;
*************** package body Ada.Directories is
*** 224,254 ****
                Strings.Fixed.Index (Name, Dir_Seps, Going => Strings.Backward);
  
           begin
-             if Last_DS = 0 then
- 
-                --  There is no directory separator, returns "." representing
-                --  the current working directory.
- 
-                return ".";
- 
              --  If Name indicates a root directory, raise Use_Error, because
              --  it has no containing directory.
  
!             elsif Name = "/"
!               or else
!                 (Windows
!                   and then
!                   (Name = "\"
!                       or else
!                         (Name'Length = 3
!                           and then Name (Name'Last - 1 .. Name'Last) = ":\"
!                           and then (Name (Name'First) in 'a' .. 'z'
!                                      or else
!                                        Name (Name'First) in 'A' .. 'Z'))))
              then
                 raise Use_Error with
                   "directory """ & Name & """ has no containing directory";
  
              else
                 declare
                    Last   : Positive := Last_DS - Name'First + 1;
--- 226,247 ----
                Strings.Fixed.Index (Name, Dir_Seps, Going => Strings.Backward);
  
           begin
              --  If Name indicates a root directory, raise Use_Error, because
              --  it has no containing directory.
  
!             if Is_Parent_Directory_Name (Name)
!               or else Is_Current_Directory_Name (Name)
!               or else Is_Root_Directory_Name (Name)
              then
                 raise Use_Error with
                   "directory """ & Name & """ has no containing directory";
  
+             elsif Last_DS = 0 then
+                --  There is no directory separator, so return ".", representing
+                --  the current working directory.
+ 
+                return ".";
+ 
              else
                 declare
                    Last   : Positive := Last_DS - Name'First + 1;
*************** package body Ada.Directories is
*** 262,292 ****
                    --  number on Windows.
  
                    while Last > 1 loop
!                      exit when
!                        Result (Last) /= '/'
!                          and then
!                        Result (Last) /= Directory_Separator;
! 
!                      exit when Windows
!                        and then Last = 3
!                        and then Result (2) = ':'
!                        and then
!                          (Result (1) in 'A' .. 'Z'
!                            or else
!                           Result (1) in 'a' .. 'z');
  
                       Last := Last - 1;
                    end loop;
  
!                   --  Special case of "..": the current directory may be a root
!                   --  directory.
! 
!                   if Last = 2 and then Result (1 .. 2) = ".." then
!                      return Containing_Directory (Current_Directory);
! 
!                   else
!                      return Result (1 .. Last);
!                   end if;
                 end;
              end if;
           end;
--- 255,268 ----
                    --  number on Windows.
  
                    while Last > 1 loop
!                      exit when Is_Root_Directory_Name (Result (1 .. Last))
!                                  or else (Result (Last) /= Directory_Separator
!                                            and then Result (Last) /= '/');
  
                       Last := Last - 1;
                    end loop;
  
!                   return Result (1 .. Last);
                 end;
              end if;
           end;
*************** package body Ada.Directories is
*** 806,811 ****
--- 782,801 ----
                 end if;
  
                 if Exists = 1 then
+                   --  Ignore special directories "." and ".."
+ 
+                   if (Full_Name'Length > 1
+                        and then
+                          Full_Name
+                             (Full_Name'Last - 1 .. Full_Name'Last) = "\.")
+                     or else
+                      (Full_Name'Length > 2
+                         and then
+                           Full_Name
+                             (Full_Name'Last - 2 .. Full_Name'Last) = "\..")
+                   then
+                      Exists := 0;
+                   end if;
  
                    --  Now check if the file kind matches the filter
  
*************** package body Ada.Directories is
*** 1280,1295 ****
        function Simple_Name_Internal (Path : String) return String is
           Cut_Start : Natural :=
             Strings.Fixed.Index (Path, Dir_Seps, Going => Strings.Backward);
!          Cut_End   : Natural;
  
        begin
!          --  Cut_Start pointS to the first simple name character
  
!          Cut_Start := (if Cut_Start = 0 then Path'First else Cut_Start + 1);
  
!          --  Cut_End point to the last simple name character
  
!          Cut_End := Path'Last;
  
           Check_For_Standard_Dirs : declare
              BN : constant String := Path (Cut_Start .. Cut_End);
--- 1270,1299 ----
        function Simple_Name_Internal (Path : String) return String is
           Cut_Start : Natural :=
             Strings.Fixed.Index (Path, Dir_Seps, Going => Strings.Backward);
! 
!          --  Cut_End points to the last simple name character
! 
!          Cut_End   : Natural := Path'Last;
  
        begin
!          --  Root directories are considered simple
  
!          if Is_Root_Directory_Name (Path) then
!             return Path;
!          end if;
  
!          --  Handle trailing directory separators
  
!          if Cut_Start = Path'Last then
!             Cut_End   := Path'Last - 1;
!             Cut_Start := Strings.Fixed.Index
!                            (Path (Path'First .. Path'Last - 1),
!                              Dir_Seps, Going => Strings.Backward);
!          end if;
! 
!          --  Cut_Start points to the first simple name character
! 
!          Cut_Start := (if Cut_Start = 0 then Path'First else Cut_Start + 1);
  
           Check_For_Standard_Dirs : declare
              BN : constant String := Path (Cut_Start .. Cut_End);
*************** package body Ada.Directories is
*** 1301,1307 ****
  
           begin
              if BN = "." or else BN = ".." then
!                return "";
  
              elsif Has_Drive_Letter
                and then BN'Length > 2
--- 1305,1311 ----
  
           begin
              if BN = "." or else BN = ".." then
!                return BN;
  
              elsif Has_Drive_Letter
                and then BN'Length > 2
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-einuoc.adb gcc-10.1.0/gcc/ada/libgnat/a-einuoc.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-einuoc.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-einuoc.adb	Thu May  7 10:49:59 2020
*************** begin
*** 40,48 ****
     --  The null exception is uniquely identified by the fact that the Id value
     --  is null. No other exception occurrence can have a null Id.
  
!    if X.Id = Null_Id then
!       return True;
!    else
!       return False;
!    end if;
  end Ada.Exceptions.Is_Null_Occurrence;
--- 40,44 ----
     --  The null exception is uniquely identified by the fact that the Id value
     --  is null. No other exception occurrence can have a null Id.
  
!    return X.Id = Null_Id;
  end Ada.Exceptions.Is_Null_Occurrence;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-except.adb gcc-10.1.0/gcc/ada/libgnat/a-except.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-except.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-except.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Exceptions is
*** 1624,1629 ****
--- 1624,1630 ----
        Target.Machine_Occurrence := System.Null_Address;
        Target.Msg_Length         := Source.Msg_Length;
        Target.Num_Tracebacks     := Source.Num_Tracebacks;
+       Target.Exception_Raised   := Source.Exception_Raised;
        Target.Pid                := Source.Pid;
  
        Target.Msg (1 .. Target.Msg_Length) :=
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-except.ads gcc-10.1.0/gcc/ada/libgnat/a-except.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-except.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-except.ads	Thu May  7 10:49:59 2020
***************
*** 33,46 ****
  --                                                                          --
  ------------------------------------------------------------------------------
  
! --  This version of Ada.Exceptions fully supports Ada 95 and later language
! --  versions.  It is used in all situations except for the build of the
! --  compiler and other basic tools. For these latter builds, we use an
! --  Ada 95-only version.
! 
! --  The reason for this splitting off of a separate version is to support
! --  older bootstrap compilers that do not support Ada 2005 features, and
! --  Ada.Exceptions is part of the compiler sources.
  
  pragma Polling (Off);
  --  We must turn polling off for this unit, because otherwise we get
--- 33,40 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
! --  This is the default version of this package. We also have cert and zfp
! --  versions.
  
  pragma Polling (Off);
  --  We must turn polling off for this unit, because otherwise we get
*************** private
*** 284,290 ****
     --  Traceback array stored in exception occurrence
  
     type Exception_Occurrence is record
!       Id : Exception_Id;
        --  Exception_Identity for this exception occurrence
  
        Machine_Occurrence : System.Address;
--- 278,284 ----
     --  Traceback array stored in exception occurrence
  
     type Exception_Occurrence is record
!       Id : Exception_Id := Null_Id;
        --  Exception_Identity for this exception occurrence
  
        Machine_Occurrence : System.Address;
*************** private
*** 336,349 ****
     pragma Stream_Convert (Exception_Occurrence, String_To_EO, EO_To_String);
     --  Functions for implementing Exception_Occurrence stream attributes
  
!    Null_Occurrence : constant Exception_Occurrence := (
!      Id                 => null,
!      Machine_Occurrence => System.Null_Address,
!      Msg_Length         => 0,
!      Msg                => (others => ' '),
!      Exception_Raised   => False,
!      Pid                => 0,
!      Num_Tracebacks     => 0,
!      Tracebacks         => (others => TBE.Null_TB_Entry));
  
  end Ada.Exceptions;
--- 330,335 ----
     pragma Stream_Convert (Exception_Occurrence, String_To_EO, EO_To_String);
     --  Functions for implementing Exception_Occurrence stream attributes
  
!    Null_Occurrence : constant Exception_Occurrence := (others => <>);
  
  end Ada.Exceptions;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-exexpr.adb gcc-10.1.0/gcc/ada/libgnat/a-exexpr.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-exexpr.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-exexpr.adb	Thu May  7 10:49:59 2020
*************** package body Exception_Propagation is
*** 197,211 ****
     --  whose machine occurrence is Mo. The message is empty, the backtrace
     --  is empty too and the exception identity is Foreign_Exception.
  
!    --  Hooks called when entering/leaving an exception handler for a given
!    --  occurrence, aimed at handling the stack of active occurrences. The
!    --  calls are generated by gigi in tree_transform/N_Exception_Handler.
  
     procedure Begin_Handler (GCC_Exception : not null GCC_Exception_Access);
     pragma Export (C, Begin_Handler, "__gnat_begin_handler");
  
     procedure End_Handler (GCC_Exception : GCC_Exception_Access);
     pragma Export (C, End_Handler, "__gnat_end_handler");
  
     --------------------------------------------------------------------
     -- Accessors to Basic Components of a GNAT Exception Data Pointer --
--- 197,271 ----
     --  whose machine occurrence is Mo. The message is empty, the backtrace
     --  is empty too and the exception identity is Foreign_Exception.
  
!    --  Hooks called when entering/leaving an exception handler for a
!    --  given occurrence.  The calls are generated by gigi in
!    --  Exception_Handler_to_gnu_gcc.
! 
!    --  Begin_Handler_v1, called when entering an exception handler,
!    --  claims responsibility for the handler to release the
!    --  GCC_Exception occurrence.  End_Handler_v1, called when
!    --  leaving the handler, releases the occurrence, unless the
!    --  occurrence is propagating further up, or the handler is
!    --  dynamically nested in the context of another handler that
!    --  claimed responsibility for releasing that occurrence.
! 
!    --  Responsibility is claimed by changing the Cleanup field to
!    --  Claimed_Cleanup, which enables claimed exceptions to be
!    --  recognized, and avoids accidental releases even by foreign
!    --  handlers.
! 
!    function Begin_Handler_v1
!      (GCC_Exception : not null GCC_Exception_Access)
!      return System.Address;
!    pragma Export (C, Begin_Handler_v1, "__gnat_begin_handler_v1");
!    --  Called when entering an exception handler.  Claim
!    --  responsibility for releasing GCC_Exception, by setting the
!    --  cleanup/release function to Claimed_Cleanup, and return the
!    --  address of the previous cleanup/release function.
! 
!    procedure End_Handler_v1
!      (GCC_Exception : not null GCC_Exception_Access;
!       Saved_Cleanup : System.Address;
!       Propagating_Exception : GCC_Exception_Access);
!    pragma Export (C, End_Handler_v1, "__gnat_end_handler_v1");
!    --  Called when leaving an exception handler.  Restore the
!    --  Saved_Cleanup in the GCC_Exception occurrence, and then release
!    --  it, unless it remains claimed by an enclosing handler, or
!    --  GCC_Exception and Propagating_Exception are the same
!    --  occurrence.  Propagating_Exception could be either an
!    --  occurrence (re)raised within the handler of GCC_Exception, when
!    --  we're executing as an exceptional cleanup, or null, if we're
!    --  completing the handler of GCC_Exception normally.
! 
!    procedure Claimed_Cleanup
!      (Reason : Unwind_Reason_Code;
!       GCC_Exception : not null GCC_Exception_Access);
!    pragma Export (C, Claimed_Cleanup, "__gnat_claimed_cleanup");
!    --  A do-nothing placeholder installed as GCC_Exception.Cleanup
!    --  while handling GCC_Exception, to claim responsibility for
!    --  releasing it, and to stop it from being accidentally released.
! 
!    --  The following are version 0 implementations of the version 1
!    --  hooks above.  They remain in place for compatibility with the
!    --  output of compilers that still use version 0, such as those
!    --  used during bootstrap.  They are interoperable with the v1
!    --  hooks, except that the older versions may malfunction when
!    --  handling foreign exceptions passed to Reraise_Occurrence.
  
     procedure Begin_Handler (GCC_Exception : not null GCC_Exception_Access);
     pragma Export (C, Begin_Handler, "__gnat_begin_handler");
+    --  Called when entering an exception handler translated by an old
+    --  compiler.  It does nothing.
  
     procedure End_Handler (GCC_Exception : GCC_Exception_Access);
     pragma Export (C, End_Handler, "__gnat_end_handler");
+    --  Called when leaving an exception handler translated by an old
+    --  compiler.  It releases GCC_Exception, unless it is null.  It is
+    --  only ever null when the handler has a 'raise;' translated by a
+    --  v0-using compiler.  The artificial handler variable passed to
+    --  End_Handler was set to null to tell End_Handler to refrain from
+    --  releasing the reraised exception.  In v1 safer ways are used to
+    --  accomplish that.
  
     --------------------------------------------------------------------
     -- Accessors to Basic Components of a GNAT Exception Data Pointer --
*************** package body Exception_Propagation is
*** 352,357 ****
--- 412,539 ----
        end if;
     end Setup_Current_Excep;
  
+    ----------------------
+    -- Begin_Handler_v1 --
+    ----------------------
+ 
+    function Begin_Handler_v1
+      (GCC_Exception : not null GCC_Exception_Access)
+      return System.Address is
+       Saved_Cleanup : constant System.Address := GCC_Exception.Cleanup;
+    begin
+       --  Claim responsibility for releasing this exception, and stop
+       --  others from releasing it.
+       GCC_Exception.Cleanup := Claimed_Cleanup'Address;
+       return Saved_Cleanup;
+    end Begin_Handler_v1;
+ 
+    --------------------
+    -- End_Handler_v1 --
+    --------------------
+ 
+    procedure End_Handler_v1
+      (GCC_Exception : not null GCC_Exception_Access;
+       Saved_Cleanup : System.Address;
+       Propagating_Exception : GCC_Exception_Access) is
+    begin
+       GCC_Exception.Cleanup := Saved_Cleanup;
+       --  Restore the Saved_Cleanup, so that it is either used to
+       --  release GCC_Exception below, or transferred to the next
+       --  handler of the Propagating_Exception occurrence.  The
+       --  following test ensures that an occurrence is only released
+       --  once, even after reraises.
+       --
+       --  The idea is that the GCC_Exception is not to be released
+       --  unless it had an unclaimed Cleanup when the handler started
+       --  (see Begin_Handler_v1 above), but if we propagate across its
+       --  handler a reraise of the same exception, we transfer to the
+       --  Propagating_Exception the responsibility for running the
+       --  Saved_Cleanup when its handler completes.
+       --
+       --  This ownership transfer mechanism ensures safety, as in
+       --  single release and no dangling pointers, because there is no
+       --  way to hold on to the Machine_Occurrence of an
+       --  Exception_Occurrence: the only situations in which another
+       --  Exception_Occurrence gets the same Machine_Occurrence are
+       --  through Reraise_Occurrence, and plain reraise, and so we
+       --  have the following possibilities:
+       --
+       --  - Reraise_Occurrence is handled within the running handler,
+       --  and so when completing the dynamically nested handler, we
+       --  must NOT release the exception.  A Claimed_Cleanup upon
+       --  entry of the nested handler, installed when entering the
+       --  enclosing handler, ensures the exception will not be
+       --  released by the nested handler, but rather by the enclosing
+       --  handler.
+       --
+       --  - Reraise_Occurrence/reraise escapes the running handler,
+       --  and we run as an exceptional cleanup for GCC_Exception.  The
+       --  Saved_Cleanup was reinstalled, but since we're propagating
+       --  the same machine occurrence, we do not release it.  Instead,
+       --  we transfer responsibility for releasing it to the eventual
+       --  handler of the propagating exception.
+       --
+       --  - An unrelated exception propagates through the running
+       --  handler.  We restored GCC_Exception.Saved_Cleanup above.
+       --  Since we're propagating a different exception, we proceed to
+       --  release GCC_Exception, unless Saved_Cleanup was
+       --  Claimed_Cleanup, because then we know we're not in the
+       --  outermost handler for GCC_Exception.
+       --
+       --  - The handler completes normally, so it reinstalls the
+       --  Saved_Cleanup and runs it, unless it was Claimed_Cleanup.
+       --  If Saved_Cleanup is null, Unwind_DeleteException (currently)
+       --  has no effect, so we could skip it, but if it is ever
+       --  changed to do more in this case, we're ready for that,
+       --  calling it exactly once.
+       if Saved_Cleanup /= Claimed_Cleanup'Address
+         and then
+         Propagating_Exception /= GCC_Exception
+       then
+          declare
+             Current : constant EOA := Get_Current_Excep.all;
+             Cur_Occ : constant GCC_Exception_Access
+               := To_GCC_Exception (Current.Machine_Occurrence);
+          begin
+             --  If we are releasing the Machine_Occurrence of the current
+             --  exception, reset the access to it, so that it is no
+             --  longer accessible.
+             if Cur_Occ = GCC_Exception then
+                Current.Machine_Occurrence := System.Null_Address;
+             end if;
+          end;
+          Unwind_DeleteException (GCC_Exception);
+       end if;
+    end End_Handler_v1;
+ 
+    ---------------------
+    -- Claimed_Cleanup --
+    ---------------------
+ 
+    procedure Claimed_Cleanup
+      (Reason : Unwind_Reason_Code;
+       GCC_Exception : not null GCC_Exception_Access) is
+       pragma Unreferenced (Reason);
+       pragma Unreferenced (GCC_Exception);
+    begin
+       --  This procedure should never run.  If it does, it's either a
+       --  version 0 handler or a foreign handler, attempting to
+       --  release an exception while a version 1 handler that claimed
+       --  responsibility for releasing the exception remains still
+       --  active.  This placeholder stops GCC_Exception from being
+       --  released by them.
+ 
+       --  We could get away with just Null_Address instead, with
+       --  nearly the same effect, but with this placeholder we can
+       --  detect and report unexpected releases, and we can tell apart
+       --  a GCC_Exception without a Cleanup, from one with another
+       --  active handler, so as to still call Unwind_DeleteException
+       --  exactly once: currently, Unwind_DeleteException does nothing
+       --  when the Cleanup is null, but should it ever be changed to
+       --  do more, we'll still be safe.
+       null;
+    end Claimed_Cleanup;
+ 
     -------------------
     -- Begin_Handler --
     -------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-locale.ads gcc-10.1.0/gcc/ada/libgnat/a-locale.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-locale.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-locale.ads	Thu May  7 10:49:59 2020
*************** package Ada.Locales is
*** 19,36 ****
--- 19,52 ----
     pragma Preelaborate (Locales);
     pragma Remote_Types (Locales);
  
+    --  A locale identifies a geopolitical place or region and its associated
+    --  language, which can be used to determine other internationalization-
+    --  related characteristics. The active locale is the locale associated with
+    --  the partition of the current task.
+ 
     type Language_Code is new String (1 .. 3)
        with Dynamic_Predicate =>
           (for all E of Language_Code => E in 'a' .. 'z');
+    --  Lower-case string representation of an ISO 639-3 alpha-3 code that
+    --  identifies a language.
  
     type Country_Code is new String (1 .. 2)
        with Dynamic_Predicate =>
           (for all E of Country_Code => E in 'A' .. 'Z');
+    --  Upper-case string representation of an ISO 3166-1 alpha-2 code that
+    --  identifies a country.
  
     Language_Unknown : constant Language_Code := "und";
     Country_Unknown  : constant Country_Code := "ZZ";
  
     function Language return Language_Code;
+    --  Returns the code of the language associated with the active locale. If
+    --  the Language_Code associated with the active locale cannot be determined
+    --  from the environment, then Language returns Language_Unknown.
+ 
     function Country return Country_Code;
+    --  Returns the code of the country associated with the active locale. If
+    --  the Country_Code associated with the active locale cannot be determined
+    --  from the environment, then Country returns Country_Unknown.
  
  end Ada.Locales;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-nbnbin.adb gcc-10.1.0/gcc/ada/libgnat/a-nbnbin.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-nbnbin.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/a-nbnbin.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,484 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                  ADA.NUMERICS.BIG_NUMBERS.BIG_INTEGERS                   --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Ada.Unchecked_Deallocation;
+ with Ada.Characters.Conversions; use Ada.Characters.Conversions;
+ 
+ with Interfaces; use Interfaces;
+ 
+ with System.Generic_Bignums;
+ 
+ package body Ada.Numerics.Big_Numbers.Big_Integers is
+ 
+    package Bignums is new
+      System.Generic_Bignums (Use_Secondary_Stack => False);
+    use Bignums, System;
+ 
+    procedure Free is new Ada.Unchecked_Deallocation (Bignum_Data, Bignum);
+ 
+    function Get_Bignum (Arg : Big_Integer) return Bignum is
+      (if Arg.Value.C = System.Null_Address
+       then raise Constraint_Error with "invalid big integer"
+       else To_Bignum (Arg.Value.C));
+    --  Check for validity of Arg and return the Bignum value stored in Arg.
+    --  Raise Constraint_Error if Arg is uninitialized.
+ 
+    procedure Set_Bignum (Arg : out Big_Integer; Value : Bignum)
+      with Inline;
+    --  Set the Bignum value stored in Arg to Value
+ 
+    ----------------
+    -- Set_Bignum --
+    ----------------
+ 
+    procedure Set_Bignum (Arg : out Big_Integer; Value : Bignum) is
+    begin
+       Arg.Value.C := To_Address (Value);
+    end Set_Bignum;
+ 
+    --------------
+    -- Is_Valid --
+    --------------
+ 
+    function Is_Valid (Arg : Big_Integer) return Boolean is
+      (Arg.Value.C /= System.Null_Address);
+ 
+    ---------
+    -- "=" --
+    ---------
+ 
+    function "=" (L, R : Big_Integer) return Boolean is
+    begin
+       return Big_EQ (Get_Bignum (L), Get_Bignum (R));
+    end "=";
+ 
+    ---------
+    -- "<" --
+    ---------
+ 
+    function "<" (L, R : Big_Integer) return Boolean is
+    begin
+       return Big_LT (Get_Bignum (L), Get_Bignum (R));
+    end "<";
+ 
+    ----------
+    -- "<=" --
+    ----------
+ 
+    function "<=" (L, R : Big_Integer) return Boolean is
+    begin
+       return Big_LE (Get_Bignum (L), Get_Bignum (R));
+    end "<=";
+ 
+    ---------
+    -- ">" --
+    ---------
+ 
+    function ">" (L, R : Big_Integer) return Boolean is
+    begin
+       return Big_GT (Get_Bignum (L), Get_Bignum (R));
+    end ">";
+ 
+    ----------
+    -- ">=" --
+    ----------
+ 
+    function ">=" (L, R : Big_Integer) return Boolean is
+    begin
+       return Big_GE (Get_Bignum (L), Get_Bignum (R));
+    end ">=";
+ 
+    --------------------
+    -- To_Big_Integer --
+    --------------------
+ 
+    function To_Big_Integer (Arg : Integer) return Big_Integer is
+       Result : Big_Integer;
+    begin
+       Set_Bignum (Result, To_Bignum (Long_Long_Integer (Arg)));
+       return Result;
+    end To_Big_Integer;
+ 
+    ----------------
+    -- To_Integer --
+    ----------------
+ 
+    function To_Integer (Arg : Big_Integer) return Integer is
+    begin
+       return Integer (From_Bignum (Get_Bignum (Arg)));
+    end To_Integer;
+ 
+    ------------------------
+    -- Signed_Conversions --
+    ------------------------
+ 
+    package body Signed_Conversions is
+ 
+       --------------------
+       -- To_Big_Integer --
+       --------------------
+ 
+       function To_Big_Integer (Arg : Int) return Big_Integer is
+          Result : Big_Integer;
+       begin
+          Set_Bignum (Result, To_Bignum (Long_Long_Integer (Arg)));
+          return Result;
+       end To_Big_Integer;
+ 
+       ----------------------
+       -- From_Big_Integer --
+       ----------------------
+ 
+       function From_Big_Integer (Arg : Big_Integer) return Int is
+       begin
+          return Int (From_Bignum (Get_Bignum (Arg)));
+       end From_Big_Integer;
+ 
+    end Signed_Conversions;
+ 
+    --------------------------
+    -- Unsigned_Conversions --
+    --------------------------
+ 
+    package body Unsigned_Conversions is
+ 
+       --------------------
+       -- To_Big_Integer --
+       --------------------
+ 
+       function To_Big_Integer (Arg : Int) return Big_Integer is
+          Result : Big_Integer;
+       begin
+          Set_Bignum (Result, To_Bignum (Unsigned_64 (Arg)));
+          return Result;
+       end To_Big_Integer;
+ 
+       ----------------------
+       -- From_Big_Integer --
+       ----------------------
+ 
+       function From_Big_Integer (Arg : Big_Integer) return Int is
+       begin
+          return Int (From_Bignum (Get_Bignum (Arg)));
+       end From_Big_Integer;
+ 
+    end Unsigned_Conversions;
+ 
+    ---------------
+    -- To_String --
+    ---------------
+ 
+    Hex_Chars : constant array (0 .. 15) of Character := "0123456789ABCDEF";
+ 
+    function To_String
+      (Arg : Big_Integer; Width : Field := 0; Base : Number_Base := 10)
+       return String
+    is
+       Big_Base : constant Big_Integer := To_Big_Integer (Integer (Base));
+ 
+       function Add_Base (S : String) return String;
+       --  Add base information if Base /= 10
+ 
+       function Leading_Padding
+         (Str        : String;
+          Min_Length : Field;
+          Char       : Character := ' ') return String;
+       --  Return padding of Char concatenated with Str so that the resulting
+       --  string is at least Min_Length long.
+ 
+       function Image (Arg : Big_Integer) return String;
+       --  Return image of Arg, assuming Arg is positive.
+ 
+       function Image (N : Natural) return String;
+       --  Return image of N, with no leading space.
+ 
+       --------------
+       -- Add_Base --
+       --------------
+ 
+       function Add_Base (S : String) return String is
+       begin
+          if Base = 10 then
+             return S;
+          else
+             return Image (Base) & "#" & S & "#";
+          end if;
+       end Add_Base;
+ 
+       -----------
+       -- Image --
+       -----------
+ 
+       function Image (N : Natural) return String is
+          S : constant String := Natural'Image (N);
+       begin
+          return S (2 .. S'Last);
+       end Image;
+ 
+       function Image (Arg : Big_Integer) return String is
+       begin
+          if Arg < Big_Base then
+             return (1 => Hex_Chars (To_Integer (Arg)));
+          else
+             return Image (Arg / Big_Base)
+               & Hex_Chars (To_Integer (Arg rem Big_Base));
+          end if;
+       end Image;
+ 
+       ---------------------
+       -- Leading_Padding --
+       ---------------------
+ 
+       function Leading_Padding
+         (Str        : String;
+          Min_Length : Field;
+          Char       : Character := ' ') return String is
+       begin
+          return (1 .. Integer'Max (Integer (Min_Length) - Str'Length, 0)
+                         => Char) & Str;
+       end Leading_Padding;
+ 
+    begin
+       if Arg < To_Big_Integer (0) then
+          return Leading_Padding ("-" & Add_Base (Image (-Arg)), Width);
+       else
+          return Leading_Padding (" " & Add_Base (Image (Arg)), Width);
+       end if;
+    end To_String;
+ 
+    -----------------
+    -- From_String --
+    -----------------
+ 
+    function From_String (Arg : String) return Big_Integer is
+       Result : Big_Integer;
+    begin
+       --  ??? only support Long_Long_Integer, good enough for now
+       Set_Bignum (Result, To_Bignum (Long_Long_Integer'Value (Arg)));
+       return Result;
+    end From_String;
+ 
+    ---------------
+    -- Put_Image --
+    ---------------
+ 
+    procedure Put_Image
+      (Stream : not null access Ada.Streams.Root_Stream_Type'Class;
+       Arg    : Big_Integer) is
+    begin
+       Wide_Wide_String'Write (Stream, To_Wide_Wide_String (To_String (Arg)));
+    end Put_Image;
+ 
+    ---------
+    -- "+" --
+    ---------
+ 
+    function "+" (L : Big_Integer) return Big_Integer is
+       Result : Big_Integer;
+    begin
+       Set_Bignum (Result, new Bignum_Data'(Get_Bignum (L).all));
+       return Result;
+    end "+";
+ 
+    ---------
+    -- "-" --
+    ---------
+ 
+    function "-" (L : Big_Integer) return Big_Integer is
+       Result : Big_Integer;
+    begin
+       Set_Bignum (Result, Big_Neg (Get_Bignum (L)));
+       return Result;
+    end "-";
+ 
+    -----------
+    -- "abs" --
+    -----------
+ 
+    function "abs" (L : Big_Integer) return Big_Integer is
+       Result : Big_Integer;
+    begin
+       Set_Bignum (Result, Big_Abs (Get_Bignum (L)));
+       return Result;
+    end "abs";
+ 
+    ---------
+    -- "+" --
+    ---------
+ 
+    function "+" (L, R : Big_Integer) return Big_Integer is
+       Result : Big_Integer;
+    begin
+       Set_Bignum (Result, Big_Add (Get_Bignum (L), Get_Bignum (R)));
+       return Result;
+    end "+";
+ 
+    ---------
+    -- "-" --
+    ---------
+ 
+    function "-" (L, R : Big_Integer) return Big_Integer is
+       Result : Big_Integer;
+    begin
+       Set_Bignum (Result, Big_Sub (Get_Bignum (L), Get_Bignum (R)));
+       return Result;
+    end "-";
+ 
+    ---------
+    -- "*" --
+    ---------
+ 
+    function "*" (L, R : Big_Integer) return Big_Integer is
+       Result : Big_Integer;
+    begin
+       Set_Bignum (Result, Big_Mul (Get_Bignum (L), Get_Bignum (R)));
+       return Result;
+    end "*";
+ 
+    ---------
+    -- "/" --
+    ---------
+ 
+    function "/" (L, R : Big_Integer) return Big_Integer is
+       Result : Big_Integer;
+    begin
+       Set_Bignum (Result, Big_Div (Get_Bignum (L), Get_Bignum (R)));
+       return Result;
+    end "/";
+ 
+    -----------
+    -- "mod" --
+    -----------
+ 
+    function "mod" (L, R : Big_Integer) return Big_Integer is
+       Result : Big_Integer;
+    begin
+       Set_Bignum (Result, Big_Mod (Get_Bignum (L), Get_Bignum (R)));
+       return Result;
+    end "mod";
+ 
+    -----------
+    -- "rem" --
+    -----------
+ 
+    function "rem" (L, R : Big_Integer) return Big_Integer is
+       Result : Big_Integer;
+    begin
+       Set_Bignum (Result, Big_Rem (Get_Bignum (L), Get_Bignum (R)));
+       return Result;
+    end "rem";
+ 
+    ----------
+    -- "**" --
+    ----------
+ 
+    function "**" (L : Big_Integer; R : Natural) return Big_Integer is
+    begin
+       --  Explicitly check for validity before allocating Exp so that
+       --  the call to Get_Bignum below cannot raise an exception before
+       --  we get a chance to free Exp.
+ 
+       if not Is_Valid (L) then
+          raise Constraint_Error with "invalid big integer";
+       end if;
+ 
+       declare
+          Exp    : Bignum := To_Bignum (Long_Long_Integer (R));
+          Result : Big_Integer;
+       begin
+          Set_Bignum (Result, Big_Exp (Get_Bignum (L), Exp));
+          Free (Exp);
+          return Result;
+       end;
+    end "**";
+ 
+    ---------
+    -- Min --
+    ---------
+ 
+    function Min (L, R : Big_Integer) return Big_Integer is
+      (if L < R then L else R);
+ 
+    ---------
+    -- Max --
+    ---------
+ 
+    function Max (L, R : Big_Integer) return Big_Integer is
+      (if L > R then L else R);
+ 
+    -----------------------------
+    -- Greatest_Common_Divisor --
+    -----------------------------
+ 
+    function Greatest_Common_Divisor (L, R : Big_Integer) return Big_Positive is
+       function GCD (A, B : Big_Integer) return Big_Integer;
+       --  Recursive internal version
+ 
+       ---------
+       -- GCD --
+       ---------
+ 
+       function GCD (A, B : Big_Integer) return Big_Integer is
+       begin
+          if Is_Zero (Get_Bignum (B)) then
+             return A;
+          else
+             return GCD (B, A rem B);
+          end if;
+       end GCD;
+ 
+    begin
+       return GCD (abs L, abs R);
+    end Greatest_Common_Divisor;
+ 
+    ------------
+    -- Adjust --
+    ------------
+ 
+    procedure Adjust (This : in out Controlled_Bignum) is
+    begin
+       if This.C /= System.Null_Address then
+          This.C := To_Address (new Bignum_Data'(To_Bignum (This.C).all));
+       end if;
+    end Adjust;
+ 
+    --------------
+    -- Finalize --
+    --------------
+ 
+    procedure Finalize (This : in out Controlled_Bignum) is
+       Tmp : Bignum := To_Bignum (This.C);
+    begin
+       Free (Tmp);
+       This.C := System.Null_Address;
+    end Finalize;
+ 
+ end Ada.Numerics.Big_Numbers.Big_Integers;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-nbnbin.ads gcc-10.1.0/gcc/ada/libgnat/a-nbnbin.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-nbnbin.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/a-nbnbin.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,145 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                  ADA.NUMERICS.BIG_NUMBERS.BIG_INTEGERS                   --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ -- This specification is derived from the Ada Reference Manual for use with --
+ -- GNAT.  In accordance with the copyright of that document, you can freely --
+ -- copy and modify this specification,  provided that if you redistribute a --
+ -- modified version,  any changes that you have made are clearly indicated. --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Ada.Finalization;
+ with Ada.Streams;
+ 
+ private with System;
+ 
+ --  Note that some Ada 2020 aspects are commented out since they are not
+ --  supported yet.
+ 
+ package Ada.Numerics.Big_Numbers.Big_Integers
+   with Preelaborate
+ --  Nonblocking
+ is
+    type Big_Integer is private;
+    --  with Integer_Literal => From_String,
+    --       Put_Image => Put_Image;
+ 
+    function Is_Valid (Arg : Big_Integer) return Boolean
+      with Convention => Intrinsic;
+ 
+    function "=" (L, R : Big_Integer) return Boolean;
+ 
+    function "<" (L, R : Big_Integer) return Boolean;
+ 
+    function "<=" (L, R : Big_Integer) return Boolean;
+ 
+    function ">" (L, R : Big_Integer) return Boolean;
+ 
+    function ">=" (L, R : Big_Integer) return Boolean;
+ 
+    function To_Big_Integer (Arg : Integer) return Big_Integer;
+ 
+    subtype Big_Positive is Big_Integer
+      with Dynamic_Predicate => Big_Positive > To_Big_Integer (0),
+           Predicate_Failure => (raise Constraint_Error);
+ 
+    subtype Big_Natural is Big_Integer
+      with Dynamic_Predicate => Big_Natural >= To_Big_Integer (0),
+           Predicate_Failure => (raise Constraint_Error);
+ 
+    function In_Range (Arg, Low, High : Big_Integer) return Boolean is
+      ((Low <= Arg) and (Arg <= High));
+ 
+    function To_Integer (Arg : Big_Integer) return Integer
+      with Pre => In_Range (Arg,
+                            Low  => To_Big_Integer (Integer'First),
+                            High => To_Big_Integer (Integer'Last))
+                   or else (raise Constraint_Error);
+ 
+    generic
+       type Int is range <>;
+    package Signed_Conversions is
+ 
+       function To_Big_Integer (Arg : Int) return Big_Integer;
+ 
+       function From_Big_Integer (Arg : Big_Integer) return Int
+         with Pre => In_Range (Arg,
+                               Low  => To_Big_Integer (Int'First),
+                               High => To_Big_Integer (Int'Last))
+                      or else (raise Constraint_Error);
+ 
+    end Signed_Conversions;
+ 
+    generic
+       type Int is mod <>;
+    package Unsigned_Conversions is
+ 
+       function To_Big_Integer (Arg : Int) return Big_Integer;
+ 
+       function From_Big_Integer (Arg : Big_Integer) return Int
+         with Pre => In_Range (Arg,
+                               Low  => To_Big_Integer (Int'First),
+                               High => To_Big_Integer (Int'Last))
+                      or else (raise Constraint_Error);
+ 
+    end Unsigned_Conversions;
+ 
+    function To_String (Arg : Big_Integer;
+                        Width : Field := 0;
+                        Base  : Number_Base := 10) return String
+      with Post => To_String'Result'First = 1;
+ 
+    function From_String (Arg : String) return Big_Integer;
+ 
+    procedure Put_Image
+      (Stream : not null access Ada.Streams.Root_Stream_Type'Class;
+       Arg    : Big_Integer);
+ 
+    function "+" (L : Big_Integer) return Big_Integer;
+ 
+    function "-" (L : Big_Integer) return Big_Integer;
+ 
+    function "abs" (L : Big_Integer) return Big_Integer;
+ 
+    function "+" (L, R : Big_Integer) return Big_Integer;
+ 
+    function "-" (L, R : Big_Integer) return Big_Integer;
+ 
+    function "*" (L, R : Big_Integer) return Big_Integer;
+ 
+    function "/" (L, R : Big_Integer) return Big_Integer;
+ 
+    function "mod" (L, R : Big_Integer) return Big_Integer;
+ 
+    function "rem" (L, R : Big_Integer) return Big_Integer;
+ 
+    function "**" (L : Big_Integer; R : Natural) return Big_Integer;
+ 
+    function Min (L, R : Big_Integer) return Big_Integer;
+ 
+    function Max (L, R : Big_Integer) return Big_Integer;
+ 
+    function Greatest_Common_Divisor
+      (L, R : Big_Integer) return Big_Positive
+      with Pre => (L /= To_Big_Integer (0) and R /= To_Big_Integer (0))
+        or else (raise Constraint_Error);
+ 
+ private
+ 
+    type Controlled_Bignum is new Ada.Finalization.Controlled with record
+       C : System.Address := System.Null_Address;
+    end record;
+ 
+    procedure Adjust   (This : in out Controlled_Bignum);
+    procedure Finalize (This : in out Controlled_Bignum);
+ 
+    type Big_Integer is record
+       Value : Controlled_Bignum;
+    end record;
+ 
+ end Ada.Numerics.Big_Numbers.Big_Integers;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-nbnbin__gmp.adb gcc-10.1.0/gcc/ada/libgnat/a-nbnbin__gmp.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-nbnbin__gmp.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/a-nbnbin__gmp.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,730 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                  ADA.NUMERICS.BIG_NUMBERS.BIG_INTEGERS                   --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  This is the GMP version of this package
+ 
+ with Ada.Unchecked_Conversion;
+ with Ada.Unchecked_Deallocation;
+ with Interfaces.C;               use Interfaces.C;
+ with Interfaces.C.Strings;       use Interfaces.C.Strings;
+ with Ada.Characters.Conversions; use Ada.Characters.Conversions;
+ with Ada.Characters.Handling;    use Ada.Characters.Handling;
+ 
+ package body Ada.Numerics.Big_Numbers.Big_Integers is
+ 
+    use System;
+ 
+    pragma Linker_Options ("-lgmp");
+ 
+    type mpz_t is record
+       mp_alloc : Integer;
+       mp_size  : Integer;
+       mp_d     : System.Address;
+    end record;
+    pragma Convention (C, mpz_t);
+    type mpz_t_ptr is access all mpz_t;
+ 
+    function To_Mpz is new Ada.Unchecked_Conversion (System.Address, mpz_t_ptr);
+    function To_Address is new
+      Ada.Unchecked_Conversion (mpz_t_ptr, System.Address);
+ 
+    function Get_Mpz (Arg : Optional_Big_Integer) return mpz_t_ptr is
+      (To_Mpz (Arg.Value.C));
+    --  Return the mpz_t value stored in Arg
+ 
+    procedure Set_Mpz (Arg : in out Optional_Big_Integer; Value : mpz_t_ptr)
+      with Inline;
+    --  Set the mpz_t value stored in Arg to Value
+ 
+    procedure Allocate (This : in out Optional_Big_Integer) with Inline;
+    --  Allocate an Optional_Big_Integer, including the underlying mpz
+ 
+    procedure mpz_init_set (ROP : access mpz_t;  OP : access constant mpz_t);
+    pragma Import (C, mpz_init_set, "__gmpz_init_set");
+ 
+    procedure mpz_set (ROP : access mpz_t;  OP : access constant mpz_t);
+    pragma Import (C, mpz_set, "__gmpz_set");
+ 
+    function mpz_cmp (OP1, OP2 : access constant mpz_t) return Integer;
+    pragma Import (C, mpz_cmp, "__gmpz_cmp");
+ 
+    function mpz_cmp_ui
+      (OP1 : access constant mpz_t; OP2 : unsigned_long) return Integer;
+    pragma Import (C, mpz_cmp_ui, "__gmpz_cmp_ui");
+ 
+    procedure mpz_set_si (ROP : access mpz_t; OP : long);
+    pragma Import (C, mpz_set_si, "__gmpz_set_si");
+ 
+    procedure mpz_set_ui (ROP : access mpz_t; OP : unsigned_long);
+    pragma Import (C, mpz_set_ui, "__gmpz_set_ui");
+ 
+    function mpz_get_si (OP : access constant mpz_t) return long;
+    pragma Import (C, mpz_get_si, "__gmpz_get_si");
+ 
+    function mpz_get_ui (OP : access constant mpz_t) return unsigned_long;
+    pragma Import (C, mpz_get_ui, "__gmpz_get_ui");
+ 
+    procedure mpz_neg (ROP : access mpz_t;  OP : access constant mpz_t);
+    pragma Import (C, mpz_neg, "__gmpz_neg");
+ 
+    procedure mpz_sub (ROP : access mpz_t;  OP1, OP2 : access constant mpz_t);
+    pragma Import (C, mpz_sub, "__gmpz_sub");
+ 
+    -------------
+    -- Set_Mpz --
+    -------------
+ 
+    procedure Set_Mpz (Arg : in out Optional_Big_Integer; Value : mpz_t_ptr) is
+    begin
+       Arg.Value.C := To_Address (Value);
+    end Set_Mpz;
+ 
+    --------------
+    -- Is_Valid --
+    --------------
+ 
+    function Is_Valid (Arg : Optional_Big_Integer) return Boolean is
+      (Arg.Value.C /= System.Null_Address);
+ 
+    --------------------------
+    -- Invalid_Big_Integer --
+    --------------------------
+ 
+    function Invalid_Big_Integer return Optional_Big_Integer is
+      (Value => (Ada.Finalization.Controlled with C => System.Null_Address));
+ 
+    ---------
+    -- "=" --
+    ---------
+ 
+    function "=" (L, R : Big_Integer) return Boolean is
+    begin
+       return mpz_cmp (Get_Mpz (L), Get_Mpz (R)) = 0;
+    end "=";
+ 
+    ---------
+    -- "<" --
+    ---------
+ 
+    function "<" (L, R : Big_Integer) return Boolean is
+    begin
+       return mpz_cmp (Get_Mpz (L), Get_Mpz (R)) < 0;
+    end "<";
+ 
+    ----------
+    -- "<=" --
+    ----------
+ 
+    function "<=" (L, R : Big_Integer) return Boolean is
+    begin
+       return mpz_cmp (Get_Mpz (L), Get_Mpz (R)) <= 0;
+    end "<=";
+ 
+    ---------
+    -- ">" --
+    ---------
+ 
+    function ">" (L, R : Big_Integer) return Boolean is
+    begin
+       return mpz_cmp (Get_Mpz (L), Get_Mpz (R)) > 0;
+    end ">";
+ 
+    ----------
+    -- ">=" --
+    ----------
+ 
+    function ">=" (L, R : Big_Integer) return Boolean is
+    begin
+       return mpz_cmp (Get_Mpz (L), Get_Mpz (R)) >= 0;
+    end ">=";
+ 
+    --------------------
+    -- To_Big_Integer --
+    --------------------
+ 
+    function To_Big_Integer (Arg : Integer) return Big_Integer is
+       Result : Optional_Big_Integer;
+    begin
+       Allocate (Result);
+       mpz_set_si (Get_Mpz (Result), long (Arg));
+       return Result;
+    end To_Big_Integer;
+ 
+    ----------------
+    -- To_Integer --
+    ----------------
+ 
+    function To_Integer (Arg : Big_Integer) return Integer is
+    begin
+       return Integer (mpz_get_si (Get_Mpz (Arg)));
+    end To_Integer;
+ 
+    ------------------------
+    -- Signed_Conversions --
+    ------------------------
+ 
+    package body Signed_Conversions is
+ 
+       --------------------
+       -- To_Big_Integer --
+       --------------------
+ 
+       function To_Big_Integer (Arg : Int) return Big_Integer is
+          Result : Optional_Big_Integer;
+       begin
+          Allocate (Result);
+          mpz_set_si (Get_Mpz (Result), long (Arg));
+          return Result;
+       end To_Big_Integer;
+ 
+       ----------------------
+       -- From_Big_Integer --
+       ----------------------
+ 
+       function From_Big_Integer (Arg : Big_Integer) return Int is
+       begin
+          return Int (mpz_get_si (Get_Mpz (Arg)));
+       end From_Big_Integer;
+ 
+    end Signed_Conversions;
+ 
+    --------------------------
+    -- Unsigned_Conversions --
+    --------------------------
+ 
+    package body Unsigned_Conversions is
+ 
+       --------------------
+       -- To_Big_Integer --
+       --------------------
+ 
+       function To_Big_Integer (Arg : Int) return Big_Integer is
+          Result : Optional_Big_Integer;
+       begin
+          Allocate (Result);
+          mpz_set_ui (Get_Mpz (Result), unsigned_long (Arg));
+          return Result;
+       end To_Big_Integer;
+ 
+       ----------------------
+       -- From_Big_Integer --
+       ----------------------
+ 
+       function From_Big_Integer (Arg : Big_Integer) return Int is
+       begin
+          return Int (mpz_get_ui (Get_Mpz (Arg)));
+       end From_Big_Integer;
+ 
+    end Unsigned_Conversions;
+ 
+    ---------------
+    -- To_String --
+    ---------------
+ 
+    function To_String
+      (Arg : Big_Integer; Width : Field := 0; Base : Number_Base := 10)
+       return String
+    is
+       function mpz_get_str
+         (STR  : System.Address;
+          BASE : Integer;
+          OP   : access constant mpz_t) return chars_ptr;
+       pragma Import (C, mpz_get_str, "__gmpz_get_str");
+ 
+       function mpz_sizeinbase
+          (this : access constant mpz_t; base : Integer) return size_t;
+       pragma Import (C, mpz_sizeinbase, "__gmpz_sizeinbase");
+ 
+       function Add_Base (S : String) return String;
+       --  Add base information if Base /= 10
+ 
+       function Leading_Padding
+         (Str        : String;
+          Min_Length : Field;
+          Char       : Character := ' ') return String;
+       --  Return padding of Char concatenated with Str so that the resulting
+       --  string is at least Min_Length long.
+ 
+       function Image (N : Natural) return String;
+       --  Return image of N, with no leading space.
+ 
+       --------------
+       -- Add_Base --
+       --------------
+ 
+       function Add_Base (S : String) return String is
+       begin
+          if Base = 10 then
+             return S;
+          else
+             return Image (Base) & "#" & To_Upper (S) & "#";
+          end if;
+       end Add_Base;
+ 
+       -----------
+       -- Image --
+       -----------
+ 
+       function Image (N : Natural) return String is
+          S : constant String := Natural'Image (N);
+       begin
+          return S (2 .. S'Last);
+       end Image;
+ 
+       ---------------------
+       -- Leading_Padding --
+       ---------------------
+ 
+       function Leading_Padding
+         (Str        : String;
+          Min_Length : Field;
+          Char       : Character := ' ') return String is
+       begin
+          return (1 .. Integer'Max (Integer (Min_Length) - Str'Length, 0)
+                         => Char) & Str;
+       end Leading_Padding;
+ 
+       Number_Digits : constant Integer :=
+         Integer (mpz_sizeinbase (Get_Mpz (Arg), Integer (abs Base)));
+ 
+       Buffer : aliased String (1 .. Number_Digits + 2);
+       --  The correct number to allocate is 2 more than Number_Digits in order
+       --  to handle a possible minus sign and the null-terminator.
+ 
+       Result : constant chars_ptr :=
+         mpz_get_str (Buffer'Address, Integer (Base), Get_Mpz (Arg));
+       S      : constant String := Value (Result);
+ 
+    begin
+       if S (1) = '-' then
+          return Leading_Padding ("-" & Add_Base (S (2 .. S'Last)), Width);
+       else
+          return Leading_Padding (" " & Add_Base (S), Width);
+       end if;
+    end To_String;
+ 
+    -----------------
+    -- From_String --
+    -----------------
+ 
+    function From_String (Arg : String) return Big_Integer is
+       function mpz_set_str
+         (this : access mpz_t;
+          str  : System.Address;
+          base : Integer := 10) return Integer;
+       pragma Import (C, mpz_set_str, "__gmpz_set_str");
+ 
+       Result : Optional_Big_Integer;
+       First  : Natural;
+       Last   : Natural;
+       Base   : Natural;
+ 
+    begin
+       Allocate (Result);
+ 
+       if Arg (Arg'Last) /= '#' then
+ 
+          --  Base 10 number
+ 
+          First := Arg'First;
+          Last  := Arg'Last;
+          Base  := 10;
+       else
+          --  Compute the xx base in a xx#yyyyy# number
+ 
+          if Arg'Length < 4 then
+             raise Constraint_Error;
+          end if;
+ 
+          First := 0;
+          Last  := Arg'Last - 1;
+ 
+          for J in Arg'First + 1 .. Last loop
+             if Arg (J) = '#' then
+                First := J;
+                exit;
+             end if;
+          end loop;
+ 
+          if First = 0 then
+             raise Constraint_Error;
+          end if;
+ 
+          Base  := Natural'Value (Arg (Arg'First .. First - 1));
+          First := First + 1;
+       end if;
+ 
+       declare
+          Str   : aliased String (1 .. Last - First + 2);
+          Index : Natural := 0;
+       begin
+          --  Strip underscores
+ 
+          for J in First .. Last loop
+             if Arg (J) /= '_' then
+                Index := Index + 1;
+                Str (Index) := Arg (J);
+             end if;
+          end loop;
+ 
+          Index := Index + 1;
+          Str (Index) := ASCII.NUL;
+ 
+          if mpz_set_str (Get_Mpz (Result), Str'Address, Base) /= 0 then
+             raise Constraint_Error;
+          end if;
+       end;
+ 
+       return Result;
+    end From_String;
+ 
+    ---------------
+    -- Put_Image --
+    ---------------
+ 
+    procedure Put_Image
+      (Stream : not null access Ada.Streams.Root_Stream_Type'Class;
+       Arg    : Big_Integer) is
+    begin
+       Wide_Wide_String'Write (Stream, To_Wide_Wide_String (To_String (Arg)));
+    end Put_Image;
+ 
+    ---------
+    -- "+" --
+    ---------
+ 
+    function "+" (L : Big_Integer) return Big_Integer is
+       Result : Optional_Big_Integer;
+    begin
+       Set_Mpz (Result, new mpz_t);
+       mpz_init_set (Get_Mpz (Result), Get_Mpz (L));
+       return Result;
+    end "+";
+ 
+    ---------
+    -- "-" --
+    ---------
+ 
+    function "-" (L : Big_Integer) return Big_Integer is
+       Result : Optional_Big_Integer;
+    begin
+       Allocate (Result);
+       mpz_neg (Get_Mpz (Result), Get_Mpz (L));
+       return Result;
+    end "-";
+ 
+    -----------
+    -- "abs" --
+    -----------
+ 
+    function "abs" (L : Big_Integer) return Big_Integer is
+       procedure mpz_abs (ROP : access mpz_t;  OP : access constant mpz_t);
+       pragma Import (C, mpz_abs, "__gmpz_abs");
+ 
+       Result : Optional_Big_Integer;
+    begin
+       Allocate (Result);
+       mpz_abs (Get_Mpz (Result), Get_Mpz (L));
+       return Result;
+    end "abs";
+ 
+    ---------
+    -- "+" --
+    ---------
+ 
+    function "+" (L, R : Big_Integer) return Big_Integer is
+       procedure mpz_add
+         (ROP : access mpz_t;  OP1, OP2 : access constant mpz_t);
+       pragma Import (C, mpz_add, "__gmpz_add");
+ 
+       Result : Optional_Big_Integer;
+ 
+    begin
+       Allocate (Result);
+       mpz_add (Get_Mpz (Result), Get_Mpz (L), Get_Mpz (R));
+       return Result;
+    end "+";
+ 
+    ---------
+    -- "-" --
+    ---------
+ 
+    function "-" (L, R : Big_Integer) return Big_Integer is
+       Result : Optional_Big_Integer;
+    begin
+       Allocate (Result);
+       mpz_sub (Get_Mpz (Result), Get_Mpz (L), Get_Mpz (R));
+       return Result;
+    end "-";
+ 
+    ---------
+    -- "*" --
+    ---------
+ 
+    function "*" (L, R : Big_Integer) return Big_Integer is
+       procedure mpz_mul
+         (ROP : access mpz_t;  OP1, OP2 : access constant mpz_t);
+       pragma Import (C, mpz_mul, "__gmpz_mul");
+ 
+       Result : Optional_Big_Integer;
+ 
+    begin
+       Allocate (Result);
+       mpz_mul (Get_Mpz (Result), Get_Mpz (L), Get_Mpz (R));
+       return Result;
+    end "*";
+ 
+    ---------
+    -- "/" --
+    ---------
+ 
+    function "/" (L, R : Big_Integer) return Big_Integer is
+       procedure mpz_tdiv_q (Q : access mpz_t;  N, D : access constant mpz_t);
+       pragma Import (C, mpz_tdiv_q, "__gmpz_tdiv_q");
+    begin
+       if mpz_cmp_ui (Get_Mpz (R), 0) = 0 then
+          raise Constraint_Error;
+       end if;
+ 
+       declare
+          Result : Optional_Big_Integer;
+       begin
+          Allocate (Result);
+          mpz_tdiv_q (Get_Mpz (Result), Get_Mpz (L), Get_Mpz (R));
+          return Result;
+       end;
+    end "/";
+ 
+    -----------
+    -- "mod" --
+    -----------
+ 
+    function "mod" (L, R : Big_Integer) return Big_Integer is
+       procedure mpz_mod (R : access mpz_t;  N, D : access constant mpz_t);
+       pragma Import (C, mpz_mod, "__gmpz_mod");
+       --  result is always non-negative
+ 
+       L_Negative, R_Negative : Boolean;
+ 
+    begin
+       if mpz_cmp_ui (Get_Mpz (R), 0) = 0 then
+          raise Constraint_Error;
+       end if;
+ 
+       declare
+          Result : Optional_Big_Integer;
+       begin
+          Allocate (Result);
+          L_Negative := mpz_cmp_ui (Get_Mpz (L), 0) < 0;
+          R_Negative := mpz_cmp_ui (Get_Mpz (R), 0) < 0;
+ 
+          if not (L_Negative or R_Negative) then
+             mpz_mod (Get_Mpz (Result), Get_Mpz (L), Get_Mpz (R));
+          else
+             --  The GMP library provides operators defined by C semantics, but
+             --  the semantics of Ada's mod operator are not the same as C's
+             --  when negative values are involved. We do the following to
+             --  implement the required Ada semantics.
+ 
+             declare
+                Temp_Left   : Big_Integer;
+                Temp_Right  : Big_Integer;
+                Temp_Result : Big_Integer;
+ 
+             begin
+                Allocate (Temp_Result);
+                Set_Mpz (Temp_Left, new mpz_t);
+                Set_Mpz (Temp_Right, new mpz_t);
+                mpz_init_set (Get_Mpz (Temp_Left), Get_Mpz (L));
+                mpz_init_set (Get_Mpz (Temp_Right), Get_Mpz (R));
+ 
+                if L_Negative then
+                   mpz_neg (Get_Mpz (Temp_Left), Get_Mpz (Temp_Left));
+                end if;
+ 
+                if R_Negative then
+                   mpz_neg (Get_Mpz (Temp_Right), Get_Mpz (Temp_Right));
+                end if;
+ 
+                --  now both Temp_Left and Temp_Right are nonnegative
+ 
+                mpz_mod (Get_Mpz (Temp_Result),
+                         Get_Mpz (Temp_Left),
+                         Get_Mpz (Temp_Right));
+ 
+                if mpz_cmp_ui (Get_Mpz (Temp_Result), 0) = 0 then
+                   --  if Temp_Result is zero we are done
+                   mpz_set (Get_Mpz (Result), Get_Mpz (Temp_Result));
+ 
+                elsif L_Negative then
+                   if R_Negative then
+                      mpz_neg (Get_Mpz (Result), Get_Mpz (Temp_Result));
+                   else -- L is negative but R is not
+                      mpz_sub (Get_Mpz (Result),
+                               Get_Mpz (Temp_Right),
+                               Get_Mpz (Temp_Result));
+                   end if;
+                else
+                   pragma Assert (R_Negative);
+                   mpz_sub (Get_Mpz (Result),
+                            Get_Mpz (Temp_Result),
+                            Get_Mpz (Temp_Right));
+                end if;
+             end;
+          end if;
+ 
+          return Result;
+       end;
+    end "mod";
+ 
+    -----------
+    -- "rem" --
+    -----------
+ 
+    function "rem" (L, R : Big_Integer) return Big_Integer is
+       procedure mpz_tdiv_r (R : access mpz_t;  N, D : access constant mpz_t);
+       pragma Import (C, mpz_tdiv_r, "__gmpz_tdiv_r");
+       --   R will have the same sign as N.
+ 
+    begin
+       if mpz_cmp_ui (Get_Mpz (R), 0) = 0 then
+          raise Constraint_Error;
+       end if;
+ 
+       declare
+          Result : Optional_Big_Integer;
+       begin
+          Allocate (Result);
+          mpz_tdiv_r (R => Get_Mpz (Result),
+                      N => Get_Mpz (L),
+                      D => Get_Mpz (R));
+          --  the result takes the sign of N, as required by the RM
+ 
+          return Result;
+       end;
+    end "rem";
+ 
+    ----------
+    -- "**" --
+    ----------
+ 
+    function "**" (L : Big_Integer; R : Natural) return Big_Integer is
+       procedure mpz_pow_ui (ROP : access mpz_t;
+                             BASE : access constant mpz_t;
+                             EXP : unsigned_long);
+       pragma Import (C, mpz_pow_ui, "__gmpz_pow_ui");
+ 
+       Result : Optional_Big_Integer;
+ 
+    begin
+       Allocate (Result);
+       mpz_pow_ui (Get_Mpz (Result), Get_Mpz (L), unsigned_long (R));
+       return Result;
+    end "**";
+ 
+    ---------
+    -- Min --
+    ---------
+ 
+    function Min (L, R : Big_Integer) return Big_Integer is
+      (if L < R then L else R);
+ 
+    ---------
+    -- Max --
+    ---------
+ 
+    function Max (L, R : Big_Integer) return Big_Integer is
+      (if L > R then L else R);
+ 
+    -----------------------------
+    -- Greatest_Common_Divisor --
+    -----------------------------
+ 
+    function Greatest_Common_Divisor (L, R : Big_Integer) return Big_Integer is
+       procedure mpz_gcd
+         (ROP : access mpz_t;  Op1, Op2 : access constant mpz_t);
+       pragma Import (C, mpz_gcd, "__gmpz_gcd");
+ 
+       Result : Optional_Big_Integer;
+ 
+    begin
+       Allocate (Result);
+       mpz_gcd (Get_Mpz (Result), Get_Mpz (L), Get_Mpz (R));
+       return Result;
+    end Greatest_Common_Divisor;
+ 
+    --------------
+    -- Allocate --
+    --------------
+ 
+    procedure Allocate (This : in out Optional_Big_Integer) is
+       procedure mpz_init (this : access mpz_t);
+       pragma Import (C, mpz_init, "__gmpz_init");
+    begin
+       Set_Mpz (This, new mpz_t);
+       mpz_init (Get_Mpz (This));
+    end Allocate;
+ 
+    ------------
+    -- Adjust --
+    ------------
+ 
+    procedure Adjust (This : in out Controlled_Bignum) is
+       Value : constant mpz_t_ptr := To_Mpz (This.C);
+    begin
+       if Value /= null then
+          This.C := To_Address (new mpz_t);
+          mpz_init_set (To_Mpz (This.C), Value);
+       end if;
+    end Adjust;
+ 
+    --------------
+    -- Finalize --
+    --------------
+ 
+    procedure Finalize (This : in out Controlled_Bignum) is
+       procedure Free is new Ada.Unchecked_Deallocation (mpz_t, mpz_t_ptr);
+ 
+       procedure mpz_clear (this : access mpz_t);
+       pragma Import (C, mpz_clear, "__gmpz_clear");
+ 
+       Mpz : mpz_t_ptr;
+ 
+    begin
+       if This.C /= System.Null_Address then
+          Mpz := To_Mpz (This.C);
+          mpz_clear (Mpz);
+          Free (Mpz);
+          This.C := System.Null_Address;
+       end if;
+    end Finalize;
+ 
+ end Ada.Numerics.Big_Numbers.Big_Integers;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-nbnbre.adb gcc-10.1.0/gcc/ada/libgnat/a-nbnbre.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-nbnbre.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/a-nbnbre.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,540 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                   ADA.NUMERICS.BIG_NUMBERS.BIG_REALS                     --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --             Copyright (C) 2019, Free Software Foundation, Inc.           --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  This is the default version of this package, based on Big_Integers only.
+ 
+ with Ada.Characters.Conversions; use Ada.Characters.Conversions;
+ 
+ package body Ada.Numerics.Big_Numbers.Big_Reals is
+ 
+    use Big_Integers;
+ 
+    procedure Normalize (Arg : in out Big_Real);
+    --  Normalize Arg by ensuring that Arg.Den is always positive and that
+    --  Arg.Num and Arg.Den always have a GCD of 1.
+ 
+    --------------
+    -- Is_Valid --
+    --------------
+ 
+    function Is_Valid (Arg : Big_Real) return Boolean is
+      (Is_Valid (Arg.Num) and then Is_Valid (Arg.Den));
+ 
+    ---------
+    -- "/" --
+    ---------
+ 
+    function "/" (Num, Den : Big_Integer) return Big_Real is
+       Result : Big_Real;
+    begin
+       if Den = To_Big_Integer (0) then
+          raise Constraint_Error with "divide by zero";
+       end if;
+ 
+       Result.Num := Num;
+       Result.Den := Den;
+       Normalize (Result);
+       return Result;
+    end "/";
+ 
+    ---------------
+    -- Numerator --
+    ---------------
+ 
+    function Numerator (Arg : Big_Real) return Big_Integer is (Arg.Num);
+ 
+    -----------------
+    -- Denominator --
+    -----------------
+ 
+    function Denominator (Arg : Big_Real) return Big_Positive is (Arg.Den);
+ 
+    ---------
+    -- "=" --
+    ---------
+ 
+    function "=" (L, R : Big_Real) return Boolean is
+      (abs L.Num = abs R.Num and then L.Den = R.Den);
+ 
+    ---------
+    -- "<" --
+    ---------
+ 
+    function "<" (L, R : Big_Real) return Boolean is
+      (abs L.Num * R.Den < abs R.Num * L.Den);
+ 
+    ----------
+    -- "<=" --
+    ----------
+ 
+    function "<=" (L, R : Big_Real) return Boolean is (not (R < L));
+ 
+    ---------
+    -- ">" --
+    ---------
+ 
+    function ">" (L, R : Big_Real) return Boolean is (R < L);
+ 
+    ----------
+    -- ">=" --
+    ----------
+ 
+    function ">=" (L, R : Big_Real) return Boolean is (not (L < R));
+ 
+    -----------------------
+    -- Float_Conversions --
+    -----------------------
+ 
+    package body Float_Conversions is
+ 
+       -----------------
+       -- To_Big_Real --
+       -----------------
+ 
+       function To_Big_Real (Arg : Num) return Big_Real is
+       begin
+          return From_String (Arg'Image);
+       end To_Big_Real;
+ 
+       -------------------
+       -- From_Big_Real --
+       -------------------
+ 
+       function From_Big_Real (Arg : Big_Real) return Num is
+       begin
+          return Num'Value (To_String (Arg));
+       end From_Big_Real;
+ 
+    end Float_Conversions;
+ 
+    -----------------------
+    -- Fixed_Conversions --
+    -----------------------
+ 
+    package body Fixed_Conversions is
+ 
+       -----------------
+       -- To_Big_Real --
+       -----------------
+ 
+       function To_Big_Real (Arg : Num) return Big_Real is
+       begin
+          return From_String (Arg'Image);
+       end To_Big_Real;
+ 
+       -------------------
+       -- From_Big_Real --
+       -------------------
+ 
+       function From_Big_Real (Arg : Big_Real) return Num is
+       begin
+          return Num'Value (To_String (Arg));
+       end From_Big_Real;
+ 
+    end Fixed_Conversions;
+ 
+    ---------------
+    -- To_String --
+    ---------------
+ 
+    function To_String
+      (Arg : Big_Real; Fore : Field := 2; Aft : Field := 3; Exp : Field := 0)
+       return String
+    is
+       Zero : constant Big_Integer := To_Big_Integer (0);
+       Ten  : constant Big_Integer := To_Big_Integer (10);
+ 
+       function Leading_Padding
+         (Str        : String;
+          Min_Length : Field;
+          Char       : Character := ' ') return String;
+       --  Return padding of Char concatenated with Str so that the resulting
+       --  string is at least Min_Length long.
+ 
+       function Trailing_Padding
+         (Str    : String;
+          Length : Field;
+          Char   : Character := '0') return String;
+       --  Return Str with trailing Char removed, and if needed either
+       --  truncated or concatenated with padding of Char so that the resulting
+       --  string is Length long.
+ 
+       function Image (N : Natural) return String;
+       --  Return image of N, with no leading space.
+ 
+       function Numerator_Image
+         (Num   : Big_Integer;
+          After : Natural) return String;
+       --  Return image of Num as a float value with After digits after the "."
+       --  and taking Fore, Aft, Exp into account.
+ 
+       -----------
+       -- Image --
+       -----------
+ 
+       function Image (N : Natural) return String is
+          S : constant String := Natural'Image (N);
+       begin
+          return S (2 .. S'Last);
+       end Image;
+ 
+       ---------------------
+       -- Leading_Padding --
+       ---------------------
+ 
+       function Leading_Padding
+         (Str        : String;
+          Min_Length : Field;
+          Char       : Character := ' ') return String is
+       begin
+          if Str = "" then
+             return Leading_Padding ("0", Min_Length, Char);
+          else
+             return (1 .. Integer'Max (Integer (Min_Length) - Str'Length, 0)
+                            => Char) & Str;
+          end if;
+       end Leading_Padding;
+ 
+       ----------------------
+       -- Trailing_Padding --
+       ----------------------
+ 
+       function Trailing_Padding
+         (Str    : String;
+          Length : Field;
+          Char   : Character := '0') return String is
+       begin
+          if Str'Length > 0 and then Str (Str'Last) = Char then
+             for J in reverse Str'Range loop
+                if Str (J) /= '0' then
+                   return Trailing_Padding
+                     (Str (Str'First .. J), Length, Char);
+                end if;
+             end loop;
+          end if;
+ 
+          if Str'Length >= Length then
+             return Str (Str'First .. Str'First + Length - 1);
+          else
+             return Str &
+               (1 .. Integer'Max (Integer (Length) - Str'Length, 0)
+                       => Char);
+          end if;
+       end Trailing_Padding;
+ 
+       ---------------------
+       -- Numerator_Image --
+       ---------------------
+ 
+       function Numerator_Image
+         (Num   : Big_Integer;
+          After : Natural) return String
+       is
+          Tmp   : constant String := To_String (Num);
+          Str   : constant String (1 .. Tmp'Last - 1) := Tmp (2 .. Tmp'Last);
+          Index : Integer;
+ 
+       begin
+          if After = 0 then
+             return Leading_Padding (Str, Fore) & "."
+                    & Trailing_Padding ("0", Aft);
+          else
+             Index := Str'Last - After;
+ 
+             if Index < 0 then
+                return Leading_Padding ("0", Fore)
+                  & "."
+                  & Trailing_Padding ((1 .. -Index => '0') & Str, Aft)
+                  & (if Exp = 0 then "" else "E+" & Image (Natural (Exp)));
+             else
+                return Leading_Padding (Str (Str'First .. Index), Fore)
+                  & "."
+                  & Trailing_Padding (Str (Index + 1 .. Str'Last), Aft)
+                  & (if Exp = 0 then "" else "E+" & Image (Natural (Exp)));
+             end if;
+          end if;
+       end Numerator_Image;
+ 
+    begin
+       if Arg.Num < Zero then
+          declare
+             Str : String := To_String (-Arg, Fore, Aft, Exp);
+          begin
+             if Str (1) = ' ' then
+                for J in 1 .. Str'Last - 1 loop
+                   if Str (J + 1) /= ' ' then
+                      Str (J) := '-';
+                      exit;
+                   end if;
+                end loop;
+ 
+                return Str;
+             else
+                return '-' & Str;
+             end if;
+          end;
+       else
+          --  Compute Num * 10^Aft so that we get Aft significant digits
+          --  in the integer part (rounded) to display.
+ 
+          return Numerator_Image
+            ((Arg.Num * Ten ** Aft) / Arg.Den, After => Exp + Aft);
+       end if;
+    end To_String;
+ 
+    -----------------
+    -- From_String --
+    -----------------
+ 
+    function From_String (Arg : String) return Big_Real is
+       Ten   : constant Big_Integer := To_Big_Integer (10);
+       Frac  : Big_Integer;
+       Exp   : Integer := 0;
+       Pow   : Natural := 0;
+       Index : Natural := 0;
+       Last  : Natural := Arg'Last;
+ 
+    begin
+       for J in reverse Arg'Range loop
+          if Arg (J) in 'e' | 'E' then
+             if Last /= Arg'Last then
+                raise Constraint_Error with "multiple exponents specified";
+             end if;
+ 
+             Last := J - 1;
+             Exp := Integer'Value (Arg (J + 1 .. Arg'Last));
+             Pow := 0;
+ 
+          elsif Arg (J) = '.' then
+             Index := J - 1;
+             exit;
+          else
+             Pow := Pow + 1;
+          end if;
+       end loop;
+ 
+       if Index = 0 then
+          raise Constraint_Error with "invalid real value";
+       end if;
+ 
+       declare
+          Result : Big_Real;
+       begin
+          Result.Den := Ten ** Pow;
+          Result.Num := From_String (Arg (Arg'First .. Index)) * Result.Den;
+          Frac := From_String (Arg (Index + 2 .. Last));
+ 
+          if Result.Num < To_Big_Integer (0) then
+             Result.Num := Result.Num - Frac;
+          else
+             Result.Num := Result.Num + Frac;
+          end if;
+ 
+          if Exp > 0 then
+             Result.Num := Result.Num * Ten ** Exp;
+          elsif Exp < 0 then
+             Result.Den := Result.Den * Ten ** (-Exp);
+          end if;
+ 
+          Normalize (Result);
+          return Result;
+       end;
+    end From_String;
+ 
+    --------------------------
+    -- From_Quotient_String --
+    --------------------------
+ 
+    function From_Quotient_String (Arg : String) return Big_Real is
+       Index : Natural := 0;
+    begin
+       for J in Arg'First + 1 .. Arg'Last - 1 loop
+          if Arg (J) = '/' then
+             Index := J;
+             exit;
+          end if;
+       end loop;
+ 
+       if Index = 0 then
+          raise Constraint_Error with "no quotient found";
+       end if;
+ 
+       return Big_Integers.From_String (Arg (Arg'First .. Index - 1)) /
+         Big_Integers.From_String (Arg (Index + 1 .. Arg'Last));
+    end From_Quotient_String;
+ 
+    ---------------
+    -- Put_Image --
+    ---------------
+ 
+    procedure Put_Image
+      (Stream : not null access Ada.Streams.Root_Stream_Type'Class;
+       Arg    : Big_Real) is
+    begin
+       Wide_Wide_String'Write (Stream, To_Wide_Wide_String (To_String (Arg)));
+    end Put_Image;
+ 
+    ---------
+    -- "+" --
+    ---------
+ 
+    function "+" (L : Big_Real) return Big_Real is
+       Result : Big_Real;
+    begin
+       Result.Num := L.Num;
+       Result.Den := L.Den;
+       return Result;
+    end "+";
+ 
+    ---------
+    -- "-" --
+    ---------
+ 
+    function "-" (L : Big_Real) return Big_Real is
+      (Num => -L.Num, Den => L.Den);
+ 
+    -----------
+    -- "abs" --
+    -----------
+ 
+    function "abs" (L : Big_Real) return Big_Real is
+      (Num => abs L.Num, Den => L.Den);
+ 
+    ---------
+    -- "+" --
+    ---------
+ 
+    function "+" (L, R : Big_Real) return Big_Real is
+       Result : Big_Real;
+    begin
+       Result.Num := L.Num * R.Den + R.Num * L.Den;
+       Result.Den := L.Den * R.Den;
+       Normalize (Result);
+       return Result;
+    end "+";
+ 
+    ---------
+    -- "-" --
+    ---------
+ 
+    function "-" (L, R : Big_Real) return Big_Real is
+       Result : Big_Real;
+    begin
+       Result.Num := L.Num * R.Den - R.Num * L.Den;
+       Result.Den := L.Den * R.Den;
+       Normalize (Result);
+       return Result;
+    end "-";
+ 
+    ---------
+    -- "*" --
+    ---------
+ 
+    function "*" (L, R : Big_Real) return Big_Real is
+       Result : Big_Real;
+    begin
+       Result.Num := L.Num * R.Num;
+       Result.Den := L.Den * R.Den;
+       Normalize (Result);
+       return Result;
+    end "*";
+ 
+    ---------
+    -- "/" --
+    ---------
+ 
+    function "/" (L, R : Big_Real) return Big_Real is
+       Result : Big_Real;
+    begin
+       Result.Num := L.Num * R.Den;
+       Result.Den := L.Den * R.Num;
+       Normalize (Result);
+       return Result;
+    end "/";
+ 
+    ----------
+    -- "**" --
+    ----------
+ 
+    function "**" (L : Big_Real; R : Integer) return Big_Real is
+       Result : Big_Real;
+    begin
+       if R = 0 then
+          Result.Num := To_Big_Integer (1);
+          Result.Den := To_Big_Integer (1);
+       else
+          if R < 0 then
+             Result.Num := L.Den ** (-R);
+             Result.Den := L.Num ** (-R);
+          else
+             Result.Num := L.Num ** R;
+             Result.Den := L.Den ** R;
+          end if;
+ 
+          Normalize (Result);
+       end if;
+ 
+       return Result;
+    end "**";
+ 
+    ---------
+    -- Min --
+    ---------
+ 
+    function Min (L, R : Big_Real) return Big_Real is (if L < R then L else R);
+ 
+    ---------
+    -- Max --
+    ---------
+ 
+    function Max (L, R : Big_Real) return Big_Real is (if L > R then L else R);
+ 
+    ---------------
+    -- Normalize --
+    ---------------
+ 
+    procedure Normalize (Arg : in out Big_Real) is
+    begin
+       if Arg.Den < To_Big_Integer (0) then
+          Arg.Num := -Arg.Num;
+          Arg.Den := -Arg.Den;
+       end if;
+ 
+       declare
+          GCD : constant Big_Integer :=
+            Greatest_Common_Divisor (Arg.Num, Arg.Den);
+       begin
+          Arg.Num := Arg.Num / GCD;
+          Arg.Den := Arg.Den / GCD;
+       end;
+    end Normalize;
+ 
+ end Ada.Numerics.Big_Numbers.Big_Reals;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-nbnbre.ads gcc-10.1.0/gcc/ada/libgnat/a-nbnbre.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-nbnbre.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/a-nbnbre.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,138 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                   ADA.NUMERICS.BIG_NUMBERS.BIG_REALS                     --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ -- This specification is derived from the Ada Reference Manual for use with --
+ -- GNAT.  In accordance with the copyright of that document, you can freely --
+ -- copy and modify this specification,  provided that if you redistribute a --
+ -- modified version,  any changes that you have made are clearly indicated. --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Ada.Numerics.Big_Numbers.Big_Integers;
+ with Ada.Streams;
+ 
+ --  Note that some Ada 2020 aspects are commented out since they are not
+ --  supported yet.
+ 
+ package Ada.Numerics.Big_Numbers.Big_Reals
+   with Preelaborate
+ --  Nonblocking, Global => in out synchronized Big_Reals
+ is
+    type Big_Real is private;
+ --   with Real_Literal => From_String,
+ --        Put_Image    => Put_Image;
+ 
+    function Is_Valid (Arg : Big_Real) return Boolean;
+ 
+    function "/" (Num, Den : Big_Integers.Big_Integer) return Big_Real;
+ --   with Pre => (if Big_Integers."=" (Den, Big_Integers.To_Big_Integer (0))
+ --                then raise Constraint_Error);
+ 
+    function Numerator (Arg : Big_Real) return Big_Integers.Big_Integer;
+ 
+    function Denominator (Arg : Big_Real) return Big_Integers.Big_Positive
+      with Post =>
+        (Arg = To_Real (0)) or else
+        (Big_Integers."="
+          (Big_Integers.Greatest_Common_Divisor
+            (Numerator (Arg), Denominator'Result),
+           Big_Integers.To_Big_Integer (1)));
+ 
+    function To_Big_Real
+      (Arg : Big_Integers.Big_Integer)
+      return Big_Real is (Arg / Big_Integers.To_Big_Integer (1));
+ 
+    function To_Real (Arg : Integer) return Big_Real is
+      (Big_Integers.To_Big_Integer (Arg) / Big_Integers.To_Big_Integer (1));
+ 
+    function "=" (L, R : Big_Real) return Boolean;
+ 
+    function "<" (L, R : Big_Real) return Boolean;
+ 
+    function "<=" (L, R : Big_Real) return Boolean;
+ 
+    function ">" (L, R : Big_Real) return Boolean;
+ 
+    function ">=" (L, R : Big_Real) return Boolean;
+ 
+    function In_Range (Arg, Low, High : Big_Real) return Boolean is
+      (Low <= Arg and then Arg <= High);
+ 
+    generic
+       type Num is digits <>;
+    package Float_Conversions is
+ 
+       function To_Big_Real (Arg : Num) return Big_Real;
+ 
+       function From_Big_Real (Arg : Big_Real) return Num
+         with Pre => In_Range (Arg,
+                               Low  => To_Big_Real (Num'First),
+                               High => To_Big_Real (Num'Last))
+                     or else (raise Constraint_Error);
+ 
+    end Float_Conversions;
+ 
+    generic
+       type Num is delta <>;
+    package Fixed_Conversions is
+ 
+       function To_Big_Real (Arg : Num) return Big_Real;
+ 
+       function From_Big_Real (Arg : Big_Real) return Num
+         with Pre => In_Range (Arg,
+                               Low  => To_Big_Real (Num'First),
+                               High => To_Big_Real (Num'Last))
+                     or else (raise Constraint_Error);
+ 
+    end Fixed_Conversions;
+ 
+    function To_String (Arg  : Big_Real;
+                        Fore : Field := 2;
+                        Aft  : Field := 3;
+                        Exp  : Field := 0) return String
+       with Post => To_String'Result'First = 1;
+ 
+    function From_String (Arg : String) return Big_Real;
+ 
+    function To_Quotient_String (Arg : Big_Real) return String is
+      (Big_Integers.To_String (Numerator (Arg)) & " / "
+       & Big_Integers.To_String (Denominator (Arg)));
+ 
+    function From_Quotient_String (Arg : String) return Big_Real;
+ 
+    procedure Put_Image
+      (Stream : not null access Ada.Streams.Root_Stream_Type'Class;
+       Arg    : Big_Real);
+ 
+    function "+" (L : Big_Real) return Big_Real;
+ 
+    function "-" (L : Big_Real) return Big_Real;
+ 
+    function "abs" (L : Big_Real) return Big_Real;
+ 
+    function "+" (L, R : Big_Real) return Big_Real;
+ 
+    function "-" (L, R : Big_Real) return Big_Real;
+ 
+    function "*" (L, R : Big_Real) return Big_Real;
+ 
+    function "/" (L, R : Big_Real) return Big_Real;
+ 
+    function "**" (L : Big_Real; R : Integer) return Big_Real;
+ 
+    function Min (L, R : Big_Real) return Big_Real;
+ 
+    function Max (L, R : Big_Real) return Big_Real;
+ 
+ private
+ 
+    type Big_Real is record
+       Num, Den : Big_Integers.Big_Integer;
+    end record;
+ 
+ end Ada.Numerics.Big_Numbers.Big_Reals;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-nubinu.ads gcc-10.1.0/gcc/ada/libgnat/a-nubinu.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-nubinu.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/a-nubinu.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,25 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                         A D A . N U M E R I C S                          --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ -- This specification is derived from the Ada Reference Manual for use with --
+ -- GNAT.  In accordance with the copyright of that document, you can freely --
+ -- copy and modify this specification,  provided that if you redistribute a --
+ -- modified version,  any changes that you have made are clearly indicated. --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  Note that some Ada 2020 aspects are commented out since they are not
+ --  supported yet.
+ 
+ package Ada.Numerics.Big_Numbers
+   --  with Pure, Nonblocking, Global => null
+   with Pure
+ is
+    subtype Field is Integer range 0 .. 255;
+    subtype Number_Base is Integer range 2 .. 16;
+ end Ada.Numerics.Big_Numbers;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-strbou.ads gcc-10.1.0/gcc/ada/libgnat/a-strbou.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-strbou.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-strbou.ads	Thu May  7 10:49:59 2020
***************
*** 33,38 ****
--- 33,44 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
+ --  Preconditions in this unit are meant for analysis only, not for run-time
+ --  checking, so that the expected exceptions are raised. This is enforced by
+ --  setting the corresponding assertion policy to Ignore.
+ 
+ pragma Assertion_Policy (Pre => Ignore);
+ 
  with Ada.Strings.Maps;
  with Ada.Strings.Superbounded;
  
*************** package Ada.Strings.Bounded is
*** 43,49 ****
        Max : Positive;
        --  Maximum length of a Bounded_String
  
!    package Generic_Bounded_Length is
  
        Max_Length : constant Positive := Max;
  
--- 49,57 ----
        Max : Positive;
        --  Maximum length of a Bounded_String
  
!    package Generic_Bounded_Length with
!      Initial_Condition => Length (Null_Bounded_String) = 0
!    is
  
        Max_Length : constant Positive := Max;
  
*************** package Ada.Strings.Bounded is
*** 54,60 ****
  
        subtype Length_Range is Natural range 0 .. Max_Length;
  
!       function Length (Source : Bounded_String) return Length_Range;
  
        --------------------------------------------------------
        -- Conversion, Concatenation, and Selection Functions --
--- 62,69 ----
  
        subtype Length_Range is Natural range 0 .. Max_Length;
  
!       function Length (Source : Bounded_String) return Length_Range with
!         Global => null;
  
        --------------------------------------------------------
        -- Conversion, Concatenation, and Selection Functions --
*************** package Ada.Strings.Bounded is
*** 62,223 ****
  
        function To_Bounded_String
          (Source : String;
!          Drop   : Truncation := Error) return Bounded_String;
  
!       function To_String (Source : Bounded_String) return String;
  
        procedure Set_Bounded_String
          (Target : out Bounded_String;
           Source : String;
!          Drop   : Truncation := Error);
        pragma Ada_05 (Set_Bounded_String);
  
        function Append
          (Left  : Bounded_String;
           Right : Bounded_String;
!          Drop  : Truncation  := Error) return Bounded_String;
  
        function Append
          (Left  : Bounded_String;
           Right : String;
!          Drop  : Truncation := Error) return Bounded_String;
  
        function Append
          (Left  : String;
           Right : Bounded_String;
!          Drop  : Truncation := Error) return Bounded_String;
  
        function Append
          (Left  : Bounded_String;
           Right : Character;
!          Drop  : Truncation := Error) return Bounded_String;
  
        function Append
          (Left  : Character;
           Right : Bounded_String;
!          Drop  : Truncation := Error) return Bounded_String;
  
        procedure Append
          (Source   : in out Bounded_String;
           New_Item : Bounded_String;
!          Drop     : Truncation  := Error);
  
        procedure Append
          (Source   : in out Bounded_String;
           New_Item : String;
!          Drop     : Truncation  := Error);
  
        procedure Append
          (Source   : in out Bounded_String;
           New_Item : Character;
!          Drop     : Truncation  := Error);
  
        function "&"
          (Left  : Bounded_String;
!          Right : Bounded_String) return Bounded_String;
  
        function "&"
          (Left  : Bounded_String;
!          Right : String) return Bounded_String;
  
        function "&"
          (Left  : String;
!          Right : Bounded_String) return Bounded_String;
  
        function "&"
          (Left  : Bounded_String;
!          Right : Character) return Bounded_String;
  
        function "&"
          (Left  : Character;
!          Right : Bounded_String) return Bounded_String;
  
        function Element
          (Source : Bounded_String;
!          Index  : Positive) return Character;
  
        procedure Replace_Element
          (Source : in out Bounded_String;
           Index  : Positive;
!          By     : Character);
  
        function Slice
          (Source : Bounded_String;
           Low    : Positive;
!          High   : Natural) return String;
  
        function Bounded_Slice
          (Source : Bounded_String;
           Low    : Positive;
!          High   : Natural) return Bounded_String;
        pragma Ada_05 (Bounded_Slice);
  
        procedure Bounded_Slice
          (Source : Bounded_String;
           Target : out Bounded_String;
           Low    : Positive;
!          High   : Natural);
        pragma Ada_05 (Bounded_Slice);
  
        function "="
          (Left  : Bounded_String;
!          Right : Bounded_String) return Boolean;
  
        function "="
          (Left  : Bounded_String;
!          Right : String) return Boolean;
  
        function "="
          (Left  : String;
!          Right : Bounded_String) return Boolean;
  
        function "<"
          (Left  : Bounded_String;
!          Right : Bounded_String) return Boolean;
  
        function "<"
          (Left  : Bounded_String;
!          Right : String) return Boolean;
  
        function "<"
          (Left  : String;
!          Right : Bounded_String) return Boolean;
  
        function "<="
          (Left  : Bounded_String;
!          Right : Bounded_String) return Boolean;
  
        function "<="
          (Left  : Bounded_String;
!          Right : String) return Boolean;
  
        function "<="
          (Left  : String;
!          Right : Bounded_String) return Boolean;
  
        function ">"
          (Left  : Bounded_String;
!          Right : Bounded_String) return Boolean;
  
        function ">"
          (Left  : Bounded_String;
!          Right : String) return Boolean;
  
        function ">"
          (Left  : String;
!          Right : Bounded_String) return Boolean;
  
        function ">="
          (Left  : Bounded_String;
!          Right : Bounded_String) return Boolean;
  
        function ">="
          (Left  : Bounded_String;
!          Right : String) return Boolean;
  
        function ">="
          (Left  : String;
!          Right : Bounded_String) return Boolean;
  
        ----------------------
        -- Search Functions --
--- 71,372 ----
  
        function To_Bounded_String
          (Source : String;
!          Drop   : Truncation := Error) return Bounded_String
!       with
!         Pre    => (if Source'Length > Max_Length then Drop /= Error),
!         Post   =>
!           Length (To_Bounded_String'Result)
!         = Natural'Min (Max_Length, Source'Length),
!         Global => null;
  
!       function To_String (Source : Bounded_String) return String with
!         Post   => To_String'Result'Length = Length (Source),
!         Global => null;
  
        procedure Set_Bounded_String
          (Target : out Bounded_String;
           Source : String;
!          Drop   : Truncation := Error)
!       with
!         Pre    => (if Source'Length > Max_Length then Drop /= Error),
!         Post   => Length (Target) = Natural'Min (Max_Length, Source'Length),
!         Global => null;
        pragma Ada_05 (Set_Bounded_String);
  
        function Append
          (Left  : Bounded_String;
           Right : Bounded_String;
!          Drop  : Truncation  := Error) return Bounded_String
!       with
!         Pre    =>
!           (if Length (Left) > Max_Length - Length (Right)
!            then Drop /= Error),
!         Post   =>
!           Length (Append'Result)
!         = Natural'Min (Max_Length, Length (Left) + Length (Right)),
!         Global => null;
  
        function Append
          (Left  : Bounded_String;
           Right : String;
!          Drop  : Truncation := Error) return Bounded_String
!       with
!         Pre    =>
!           (if Right'Length > Max_Length - Length (Left)
!            then Drop /= Error),
!         Post   =>
!           Length (Append'Result)
!         = Natural'Min (Max_Length, Length (Left) + Right'Length),
!         Global => null;
  
        function Append
          (Left  : String;
           Right : Bounded_String;
!          Drop  : Truncation := Error) return Bounded_String
!       with
!         Pre    =>
!           (if Left'Length > Max_Length - Length (Right)
!            then Drop /= Error),
!         Post   =>
!           Length (Append'Result)
!         = Natural'Min (Max_Length, Left'Length + Length (Right)),
!         Global => null;
  
        function Append
          (Left  : Bounded_String;
           Right : Character;
!          Drop  : Truncation := Error) return Bounded_String
!       with
!         Pre    => (if Length (Left) = Max_Length then Drop /= Error),
!         Post   =>
!           Length (Append'Result)
!         = Natural'Min (Max_Length, Length (Left) + 1),
!         Global => null;
  
        function Append
          (Left  : Character;
           Right : Bounded_String;
!          Drop  : Truncation := Error) return Bounded_String
!       with
!         Pre    => (if Length (Right) = Max_Length then Drop /= Error),
!         Post   =>
!           Length (Append'Result)
!         = Natural'Min (Max_Length, 1 + Length (Right)),
!         Global => null;
  
        procedure Append
          (Source   : in out Bounded_String;
           New_Item : Bounded_String;
!          Drop     : Truncation  := Error)
!       with
!         Pre    =>
!           (if Length (Source) > Max_Length - Length (New_Item)
!            then Drop /= Error),
!         Post   =>
!           Length (Source)
!         = Natural'Min (Max_Length, Length (Source)'Old + Length (New_Item)),
!         Global => null;
  
        procedure Append
          (Source   : in out Bounded_String;
           New_Item : String;
!          Drop     : Truncation  := Error)
!       with
!         Pre    =>
!           (if New_Item'Length > Max_Length - Length (Source)
!            then Drop /= Error),
!         Post   =>
!           Length (Source)
!         = Natural'Min (Max_Length, Length (Source)'Old + New_Item'Length),
!         Global => null;
  
        procedure Append
          (Source   : in out Bounded_String;
           New_Item : Character;
!          Drop     : Truncation  := Error)
!       with
!         Pre    => (if Length (Source) = Max_Length then Drop /= Error),
!         Post   =>
!           Length (Source)
!         = Natural'Min (Max_Length, Length (Source)'Old + 1),
!         Global => null;
  
        function "&"
          (Left  : Bounded_String;
!          Right : Bounded_String) return Bounded_String
!       with
!         Pre    => Length (Left) <= Max_Length - Length (Right),
!         Post   => Length ("&"'Result) = Length (Left) + Length (Right),
!         Global => null;
  
        function "&"
          (Left  : Bounded_String;
!          Right : String) return Bounded_String
!       with
!         Pre    => Right'Length <= Max_Length - Length (Left),
!         Post   => Length ("&"'Result) = Length (Left) + Right'Length,
!         Global => null;
  
        function "&"
          (Left  : String;
!          Right : Bounded_String) return Bounded_String
!       with
!         Pre    => Left'Length <= Max_Length - Length (Right),
!         Post   => Length ("&"'Result) = Left'Length + Length (Right),
!         Global => null;
  
        function "&"
          (Left  : Bounded_String;
!          Right : Character) return Bounded_String
!       with
!         Pre    => Length (Left) < Max_Length,
!         Post   => Length ("&"'Result) = Length (Left) + 1,
!         Global => null;
  
        function "&"
          (Left  : Character;
!          Right : Bounded_String) return Bounded_String
!       with
!         Pre    => Length (Right) < Max_Length,
!         Post   => Length ("&"'Result) = 1 + Length (Right),
!         Global => null;
  
        function Element
          (Source : Bounded_String;
!          Index  : Positive) return Character
!       with
!         Pre    => Index <= Length (Source),
!         Global => null;
  
        procedure Replace_Element
          (Source : in out Bounded_String;
           Index  : Positive;
!          By     : Character)
!       with
!         Pre    => Index <= Length (Source),
!         Post   => Length (Source) = Length (Source)'Old,
!         Global => null;
  
        function Slice
          (Source : Bounded_String;
           Low    : Positive;
!          High   : Natural) return String
!       with
!         Pre    => Low - 1 <= Length (Source) and then High <= Length (Source),
!         Post   => Slice'Result'Length = Natural'Max (0, High - Low + 1),
!         Global => null;
  
        function Bounded_Slice
          (Source : Bounded_String;
           Low    : Positive;
!          High   : Natural) return Bounded_String
!        with
!         Pre    => Low - 1 <= Length (Source) and then High <= Length (Source),
!         Post   =>
!           Length (Bounded_Slice'Result) = Natural'Max (0, High - Low + 1),
!         Global => null;
        pragma Ada_05 (Bounded_Slice);
  
        procedure Bounded_Slice
          (Source : Bounded_String;
           Target : out Bounded_String;
           Low    : Positive;
!          High   : Natural)
!       with
!         Pre    => Low - 1 <= Length (Source) and then High <= Length (Source),
!         Post   => Length (Target) = Natural'Max (0, High - Low + 1),
!         Global => null;
        pragma Ada_05 (Bounded_Slice);
  
        function "="
          (Left  : Bounded_String;
!          Right : Bounded_String) return Boolean
!       with
!         Global => null;
  
        function "="
          (Left  : Bounded_String;
!          Right : String) return Boolean
!       with
!         Global => null;
  
        function "="
          (Left  : String;
!          Right : Bounded_String) return Boolean
!       with
!         Global => null;
  
        function "<"
          (Left  : Bounded_String;
!          Right : Bounded_String) return Boolean
!       with
!         Global => null;
  
        function "<"
          (Left  : Bounded_String;
!          Right : String) return Boolean
!       with
!         Global => null;
  
        function "<"
          (Left  : String;
!          Right : Bounded_String) return Boolean
!       with
!         Global => null;
  
        function "<="
          (Left  : Bounded_String;
!          Right : Bounded_String) return Boolean
!       with
!         Global => null;
  
        function "<="
          (Left  : Bounded_String;
!          Right : String) return Boolean
!       with
!         Global => null;
  
        function "<="
          (Left  : String;
!          Right : Bounded_String) return Boolean
!       with
!         Global => null;
  
        function ">"
          (Left  : Bounded_String;
!          Right : Bounded_String) return Boolean
!       with
!         Global => null;
  
        function ">"
          (Left  : Bounded_String;
!          Right : String) return Boolean
!       with
!         Global => null;
  
        function ">"
          (Left  : String;
!          Right : Bounded_String) return Boolean
!       with
!         Global => null;
  
        function ">="
          (Left  : Bounded_String;
!          Right : Bounded_String) return Boolean
!       with
!         Global => null;
  
        function ">="
          (Left  : Bounded_String;
!          Right : String) return Boolean
!       with
!         Global => null;
  
        function ">="
          (Left  : String;
!          Right : Bounded_String) return Boolean
!       with
!         Global => null;
  
        ----------------------
        -- Search Functions --
*************** package Ada.Strings.Bounded is
*** 227,252 ****
          (Source  : Bounded_String;
           Pattern : String;
           Going   : Direction := Forward;
!          Mapping : Maps.Character_Mapping := Maps.Identity) return Natural;
  
        function Index
          (Source  : Bounded_String;
           Pattern : String;
           Going   : Direction := Forward;
!          Mapping : Maps.Character_Mapping_Function) return Natural;
  
        function Index
          (Source : Bounded_String;
           Set    : Maps.Character_Set;
           Test   : Membership := Inside;
!          Going  : Direction  := Forward) return Natural;
  
        function Index
          (Source  : Bounded_String;
           Pattern : String;
           From    : Positive;
           Going   : Direction := Forward;
!          Mapping : Maps.Character_Mapping := Maps.Identity) return Natural;
        pragma Ada_05 (Index);
  
        function Index
--- 376,415 ----
          (Source  : Bounded_String;
           Pattern : String;
           Going   : Direction := Forward;
!          Mapping : Maps.Character_Mapping := Maps.Identity) return Natural
!       with
!         Pre    => Pattern'Length /= 0,
!         Global => null;
  
        function Index
          (Source  : Bounded_String;
           Pattern : String;
           Going   : Direction := Forward;
!          Mapping : Maps.Character_Mapping_Function) return Natural
!       with
!         Pre    => Pattern'Length /= 0,
!         Global => null;
  
        function Index
          (Source : Bounded_String;
           Set    : Maps.Character_Set;
           Test   : Membership := Inside;
!          Going  : Direction  := Forward) return Natural
!       with
!         Global => null;
  
        function Index
          (Source  : Bounded_String;
           Pattern : String;
           From    : Positive;
           Going   : Direction := Forward;
!          Mapping : Maps.Character_Mapping := Maps.Identity) return Natural
!       with
!         Pre    =>
!           (if Length (Source) /= 0
!            then From <= Length (Source))
!                   and then Pattern'Length /= 0,
!         Global => null;
        pragma Ada_05 (Index);
  
        function Index
*************** package Ada.Strings.Bounded is
*** 254,260 ****
           Pattern : String;
           From    : Positive;
           Going   : Direction := Forward;
!          Mapping : Maps.Character_Mapping_Function) return Natural;
        pragma Ada_05 (Index);
  
        function Index
--- 417,429 ----
           Pattern : String;
           From    : Positive;
           Going   : Direction := Forward;
!          Mapping : Maps.Character_Mapping_Function) return Natural
!       with
!         Pre    =>
!           (if Length (Source) /= 0
!            then From <= Length (Source))
!                   and then Pattern'Length /= 0,
!         Global => null;
        pragma Ada_05 (Index);
  
        function Index
*************** package Ada.Strings.Bounded is
*** 262,293 ****
           Set     : Maps.Character_Set;
           From    : Positive;
           Test    : Membership := Inside;
!          Going   : Direction := Forward) return Natural;
        pragma Ada_05 (Index);
  
        function Index_Non_Blank
          (Source : Bounded_String;
!          Going  : Direction := Forward) return Natural;
  
        function Index_Non_Blank
          (Source : Bounded_String;
           From   : Positive;
!          Going  : Direction := Forward) return Natural;
        pragma Ada_05 (Index_Non_Blank);
  
        function Count
          (Source  : Bounded_String;
           Pattern : String;
!          Mapping : Maps.Character_Mapping := Maps.Identity) return Natural;
  
        function Count
          (Source  : Bounded_String;
           Pattern : String;
!          Mapping : Maps.Character_Mapping_Function) return Natural;
  
        function Count
          (Source : Bounded_String;
!          Set    : Maps.Character_Set) return Natural;
  
        procedure Find_Token
          (Source : Bounded_String;
--- 431,478 ----
           Set     : Maps.Character_Set;
           From    : Positive;
           Test    : Membership := Inside;
!          Going   : Direction := Forward) return Natural
!       with
!         Pre    => (if Length (Source) /= 0 then From <= Length (Source)),
!         Global => null;
        pragma Ada_05 (Index);
  
        function Index_Non_Blank
          (Source : Bounded_String;
!          Going  : Direction := Forward) return Natural
!       with
!         Global => null;
  
        function Index_Non_Blank
          (Source : Bounded_String;
           From   : Positive;
!          Going  : Direction := Forward) return Natural
!       with
!         Pre    => (if Length (Source) /= 0 then From <= Length (Source)),
!         Global => null;
        pragma Ada_05 (Index_Non_Blank);
  
        function Count
          (Source  : Bounded_String;
           Pattern : String;
!          Mapping : Maps.Character_Mapping := Maps.Identity) return Natural
!       with
!         Pre    => Pattern'Length /= 0,
!         Global => null;
  
        function Count
          (Source  : Bounded_String;
           Pattern : String;
!          Mapping : Maps.Character_Mapping_Function) return Natural
!       with
!         Pre    => Pattern'Length /= 0,
!         Global => null;
  
        function Count
          (Source : Bounded_String;
!          Set    : Maps.Character_Set) return Natural
!       with
!         Global => null;
  
        procedure Find_Token
          (Source : Bounded_String;
*************** package Ada.Strings.Bounded is
*** 295,301 ****
           From   : Positive;
           Test   : Membership;
           First  : out Positive;
!          Last   : out Natural);
        pragma Ada_2012 (Find_Token);
  
        procedure Find_Token
--- 480,489 ----
           From   : Positive;
           Test   : Membership;
           First  : out Positive;
!          Last   : out Natural)
!       with
!         Pre    => (if Length (Source) /= 0 then From <= Length (Source)),
!         Global => null;
        pragma Ada_2012 (Find_Token);
  
        procedure Find_Token
*************** package Ada.Strings.Bounded is
*** 303,309 ****
           Set    : Maps.Character_Set;
           Test   : Membership;
           First  : out Positive;
!          Last   : out Natural);
  
        ------------------------------------
        -- String Translation Subprograms --
--- 491,499 ----
           Set    : Maps.Character_Set;
           Test   : Membership;
           First  : out Positive;
!          Last   : out Natural)
!       with
!         Global => null;
  
        ------------------------------------
        -- String Translation Subprograms --
*************** package Ada.Strings.Bounded is
*** 311,329 ****
  
        function Translate
          (Source  : Bounded_String;
!          Mapping : Maps.Character_Mapping) return Bounded_String;
  
        procedure Translate
          (Source   : in out Bounded_String;
!          Mapping  : Maps.Character_Mapping);
  
        function Translate
          (Source  : Bounded_String;
!          Mapping : Maps.Character_Mapping_Function) return Bounded_String;
  
        procedure Translate
          (Source  : in out Bounded_String;
!          Mapping : Maps.Character_Mapping_Function);
  
        ---------------------------------------
        -- String Transformation Subprograms --
--- 501,531 ----
  
        function Translate
          (Source  : Bounded_String;
!          Mapping : Maps.Character_Mapping) return Bounded_String
!       with
!         Post   => Length (Translate'Result) = Length (Source),
!         Global => null;
  
        procedure Translate
          (Source   : in out Bounded_String;
!          Mapping  : Maps.Character_Mapping)
!       with
!         Post   => Length (Source) = Length (Source)'Old,
!         Global => null;
  
        function Translate
          (Source  : Bounded_String;
!          Mapping : Maps.Character_Mapping_Function) return Bounded_String
!       with
!         Post   => Length (Translate'Result) = Length (Source),
!         Global => null;
  
        procedure Translate
          (Source  : in out Bounded_String;
!          Mapping : Maps.Character_Mapping_Function)
!       with
!         Post   => Length (Source) = Length (Source)'Old,
!         Global => null;
  
        ---------------------------------------
        -- String Transformation Subprograms --
*************** package Ada.Strings.Bounded is
*** 334,381 ****
           Low    : Positive;
           High   : Natural;
           By     : String;
!          Drop   : Truncation := Error) return Bounded_String;
  
        procedure Replace_Slice
          (Source   : in out Bounded_String;
           Low      : Positive;
           High     : Natural;
           By       : String;
!          Drop     : Truncation := Error);
  
        function Insert
          (Source   : Bounded_String;
           Before   : Positive;
           New_Item : String;
!          Drop     : Truncation := Error) return Bounded_String;
  
        procedure Insert
          (Source   : in out Bounded_String;
           Before   : Positive;
           New_Item : String;
!          Drop     : Truncation := Error);
  
        function Overwrite
          (Source   : Bounded_String;
           Position : Positive;
           New_Item : String;
!          Drop     : Truncation := Error) return Bounded_String;
  
        procedure Overwrite
          (Source    : in out Bounded_String;
           Position  : Positive;
           New_Item  : String;
!          Drop      : Truncation := Error);
  
        function Delete
          (Source  : Bounded_String;
           From    : Positive;
!          Through : Natural) return Bounded_String;
  
        procedure Delete
          (Source  : in out Bounded_String;
           From    : Positive;
!          Through : Natural);
  
        ---------------------------------
        -- String Selector Subprograms --
--- 536,684 ----
           Low    : Positive;
           High   : Natural;
           By     : String;
!          Drop   : Truncation := Error) return Bounded_String
!       with
!         Pre            =>
!           Low - 1 <= Length (Source)
!             and then
!           (if Drop = Error
!            then (if High >= Low
!                  then Low - 1
!                    <= Max_Length - By'Length
!                     - Natural'Max (Length (Source) - High, 0)
!                  else Length (Source) <= Max_Length - By'Length)),
!         Contract_Cases =>
!           (High >= Low =>
!              Length (Replace_Slice'Result)
!            = Natural'Min
!              (Max_Length,
!               Low - 1 + By'Length + Natural'Max (Length (Source) - High,
!                                                   0)),
!            others      =>
!              Length (Replace_Slice'Result)
!            = Natural'Min (Max_Length, Length (Source) + By'Length)),
!         Global         => null;
  
        procedure Replace_Slice
          (Source   : in out Bounded_String;
           Low      : Positive;
           High     : Natural;
           By       : String;
!          Drop     : Truncation := Error)
!       with
!         Pre            =>
!           Low - 1 <= Length (Source)
!             and then
!           (if Drop = Error
!            then (if High >= Low
!                  then Low - 1
!                    <= Max_Length - By'Length
!                     - Natural'Max (Length (Source) - High, 0)
!                  else Length (Source) <= Max_Length - By'Length)),
!         Contract_Cases =>
!           (High >= Low =>
!             Length (Source)
!           = Natural'Min
!               (Max_Length,
!                Low - 1 + By'Length + Natural'Max (Length (Source)'Old - High,
!                                                   0)),
!            others      =>
!              Length (Source)
!            = Natural'Min (Max_Length, Length (Source)'Old + By'Length)),
!         Global         => null;
  
        function Insert
          (Source   : Bounded_String;
           Before   : Positive;
           New_Item : String;
!          Drop     : Truncation := Error) return Bounded_String
!       with
!         Pre    =>
!           Before - 1 <= Length (Source)
!             and then (if New_Item'Length > Max_Length - Length (Source)
!                       then Drop /= Error),
!         Post   =>
!           Length (Insert'Result)
!         = Natural'Min (Max_Length, Length (Source) + New_Item'Length),
!         Global => null;
  
        procedure Insert
          (Source   : in out Bounded_String;
           Before   : Positive;
           New_Item : String;
!          Drop     : Truncation := Error)
!       with
!         Pre    =>
!           Before - 1 <= Length (Source)
!             and then (if New_Item'Length > Max_Length - Length (Source)
!                       then Drop /= Error),
!         Post   =>
!           Length (Source)
!         = Natural'Min (Max_Length, Length (Source)'Old + New_Item'Length),
!         Global => null;
  
        function Overwrite
          (Source   : Bounded_String;
           Position : Positive;
           New_Item : String;
!          Drop     : Truncation := Error) return Bounded_String
!       with
!         Pre    =>
!           Position - 1 <= Length (Source)
!             and then (if New_Item'Length > Max_Length - (Position - 1)
!                       then Drop /= Error),
!         Post   =>
!           Length (Overwrite'Result)
!         = Natural'Max
!             (Length (Source),
!              Natural'Min (Max_Length, Position - 1 + New_Item'Length)),
!         Global => null;
  
        procedure Overwrite
          (Source    : in out Bounded_String;
           Position  : Positive;
           New_Item  : String;
!          Drop      : Truncation := Error)
!       with
!         Pre    =>
!           Position - 1 <= Length (Source)
!             and then (if New_Item'Length > Max_Length - (Position - 1)
!                       then Drop /= Error),
!         Post   =>
!           Length (Source)
!         = Natural'Max
!             (Length (Source)'Old,
!              Natural'Min (Max_Length, Position - 1 + New_Item'Length)),
!         Global => null;
  
        function Delete
          (Source  : Bounded_String;
           From    : Positive;
!          Through : Natural) return Bounded_String
!       with
!         Pre            =>
!           (if Through <= From then From - 1 <= Length (Source)),
!         Contract_Cases =>
!           (Through >= From =>
!              Length (Delete'Result) = Length (Source) - (Through - From + 1),
!            others          =>
!              Length (Delete'Result) = Length (Source)),
! 
!         Global         => null;
  
        procedure Delete
          (Source  : in out Bounded_String;
           From    : Positive;
!          Through : Natural)
!       with
!         Pre            =>
!           (if Through <= From then From - 1 <= Length (Source)),
!         Contract_Cases =>
!           (Through >= From =>
!              Length (Source) = Length (Source)'Old - (Through - From + 1),
!            others          =>
!              Length (Source) = Length (Source)'Old),
!         Global         => null;
  
        ---------------------------------
        -- String Selector Subprograms --
*************** package Ada.Strings.Bounded is
*** 383,427 ****
  
        function Trim
          (Source : Bounded_String;
!          Side   : Trim_End) return Bounded_String;
  
        procedure Trim
          (Source : in out Bounded_String;
!          Side   : Trim_End);
  
        function Trim
          (Source : Bounded_String;
           Left   : Maps.Character_Set;
!          Right  : Maps.Character_Set) return Bounded_String;
  
        procedure Trim
          (Source : in out Bounded_String;
           Left   : Maps.Character_Set;
!          Right  : Maps.Character_Set);
  
        function Head
          (Source : Bounded_String;
           Count  : Natural;
           Pad    : Character := Space;
!          Drop   : Truncation := Error) return Bounded_String;
  
        procedure Head
          (Source : in out Bounded_String;
           Count  : Natural;
           Pad    : Character  := Space;
!          Drop   : Truncation := Error);
  
        function Tail
          (Source : Bounded_String;
           Count  : Natural;
           Pad    : Character  := Space;
!          Drop   : Truncation := Error) return Bounded_String;
  
        procedure Tail
          (Source : in out Bounded_String;
           Count  : Natural;
           Pad    : Character  := Space;
!          Drop   : Truncation := Error);
  
        ------------------------------------
        -- String Constructor Subprograms --
--- 686,758 ----
  
        function Trim
          (Source : Bounded_String;
!          Side   : Trim_End) return Bounded_String
!       with
!         Post   => Length (Trim'Result) <= Length (Source),
!         Global => null;
  
        procedure Trim
          (Source : in out Bounded_String;
!          Side   : Trim_End)
!       with
!         Post   => Length (Source) <= Length (Source)'Old,
!         Global => null;
  
        function Trim
          (Source : Bounded_String;
           Left   : Maps.Character_Set;
!          Right  : Maps.Character_Set) return Bounded_String
!       with
!         Post   => Length (Trim'Result) <= Length (Source),
!         Global => null;
  
        procedure Trim
          (Source : in out Bounded_String;
           Left   : Maps.Character_Set;
!          Right  : Maps.Character_Set)
!       with
!         Post   => Length (Source) <= Length (Source)'Old,
!         Global => null;
  
        function Head
          (Source : Bounded_String;
           Count  : Natural;
           Pad    : Character := Space;
!          Drop   : Truncation := Error) return Bounded_String
!       with
!         Pre    => (if Count > Max_Length then Drop /= Error),
!         Post   => Length (Head'Result) = Natural'Min (Max_Length, Count),
!         Global => null;
  
        procedure Head
          (Source : in out Bounded_String;
           Count  : Natural;
           Pad    : Character  := Space;
!          Drop   : Truncation := Error)
!       with
!         Pre    => (if Count > Max_Length then Drop /= Error),
!         Post   => Length (Source) = Natural'Min (Max_Length, Count),
!         Global => null;
  
        function Tail
          (Source : Bounded_String;
           Count  : Natural;
           Pad    : Character  := Space;
!          Drop   : Truncation := Error) return Bounded_String
!       with
!         Pre    => (if Count > Max_Length then Drop /= Error),
!         Post   => Length (Tail'Result) = Natural'Min (Max_Length, Count),
!         Global => null;
  
        procedure Tail
          (Source : in out Bounded_String;
           Count  : Natural;
           Pad    : Character  := Space;
!          Drop   : Truncation := Error)
!       with
!         Pre    => (if Count > Max_Length then Drop /= Error),
!         Post   => Length (Source) = Natural'Min (Max_Length, Count),
!         Global => null;
  
        ------------------------------------
        -- String Constructor Subprograms --
*************** package Ada.Strings.Bounded is
*** 429,458 ****
  
        function "*"
          (Left  : Natural;
!          Right : Character) return Bounded_String;
  
        function "*"
          (Left  : Natural;
!          Right : String) return Bounded_String;
  
        function "*"
          (Left  : Natural;
!          Right : Bounded_String) return Bounded_String;
  
        function Replicate
          (Count : Natural;
           Item  : Character;
!          Drop  : Truncation := Error) return Bounded_String;
  
        function Replicate
          (Count : Natural;
           Item  : String;
!          Drop  : Truncation := Error) return Bounded_String;
  
        function Replicate
          (Count : Natural;
           Item  : Bounded_String;
!          Drop  : Truncation := Error) return Bounded_String;
  
     private
        --  Most of the implementation is in the separate non generic package
--- 760,825 ----
  
        function "*"
          (Left  : Natural;
!          Right : Character) return Bounded_String
!       with
!         Pre    => Left <= Max_Length,
!         Post   => Length ("*"'Result) = Left,
!         Global => null;
  
        function "*"
          (Left  : Natural;
!          Right : String) return Bounded_String
!       with
!         Pre    => (if Left /= 0 then Right'Length <= Max_Length / Left),
!         Post   => Length ("*"'Result) = Left * Right'Length,
!         Global => null;
  
        function "*"
          (Left  : Natural;
!          Right : Bounded_String) return Bounded_String
!       with
!         Pre    => (if Left /= 0 then Length (Right) <= Max_Length / Left),
!         Post   => Length ("*"'Result) = Left * Length (Right),
!         Global => null;
  
        function Replicate
          (Count : Natural;
           Item  : Character;
!          Drop  : Truncation := Error) return Bounded_String
!       with
!         Pre    => (if Count > Max_Length then Drop /= Error),
!         Post   =>
!           Length (Replicate'Result)
!         = Natural'Min (Max_Length, Count),
!         Global => null;
  
        function Replicate
          (Count : Natural;
           Item  : String;
!          Drop  : Truncation := Error) return Bounded_String
!       with
!         Pre    =>
!           (if Item'Length /= 0
!              and then Count > Max_Length / Item'Length
!            then Drop /= Error),
!         Post   =>
!           Length (Replicate'Result)
!         = Natural'Min (Max_Length, Count * Item'Length),
!         Global => null;
  
        function Replicate
          (Count : Natural;
           Item  : Bounded_String;
!          Drop  : Truncation := Error) return Bounded_String
!       with
!         Pre    =>
!           (if Length (Item) /= 0
!              and then Count > Max_Length / Length (Item)
!            then Drop /= Error),
!         Post   =>
!           Length (Replicate'Result)
!         = Natural'Min (Max_Length, Count * Length (Item)),
!         Global => null;
  
     private
        --  Most of the implementation is in the separate non generic package
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-strfix.adb gcc-10.1.0/gcc/ada/libgnat/a-strfix.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-strfix.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-strfix.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Strings.Fixed is
*** 192,198 ****
        elsif From not in Source'Range
          or else Through > Source'Last
        then
!          raise Index_Error;
  
        else
           declare
--- 192,206 ----
        elsif From not in Source'Range
          or else Through > Source'Last
        then
!          --  In most cases this raises an exception, but the case of deleting
!          --  a null string at the end of the current one is a special-case, and
!          --  reflects the equivalence with Replace_String (RM A.4.3 (86/3)).
! 
!          if From = Source'Last + 1 and then From = Through then
!             return Source;
!          else
!             raise Index_Error;
!          end if;
  
        else
           declare
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-strfix.ads gcc-10.1.0/gcc/ada/libgnat/a-strfix.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-strfix.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-strfix.ads	Thu May  7 10:49:59 2020
***************
*** 13,21 ****
  --                                                                          --
  ------------------------------------------------------------------------------
  
  with Ada.Strings.Maps;
  
! package Ada.Strings.Fixed is
     pragma Preelaborate;
  
     --------------------------------------------------------------
--- 13,46 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
+ --  Preconditions in this unit are meant for analysis only, not for run-time
+ --  checking, so that the expected exceptions are raised. This is enforced by
+ --  setting the corresponding assertion policy to Ignore.
+ 
+ pragma Assertion_Policy (Pre => Ignore);
+ 
  with Ada.Strings.Maps;
  
! --  The language-defined package Strings.Fixed provides string-handling
! --  subprograms for fixed-length strings; that is, for values of type
! --  Standard.String. Several of these subprograms are procedures that modify
! --  the contents of a String that is passed as an out or an in out parameter;
! --  each has additional parameters to control the effect when the logical
! --  length of the result differs from the parameter's length.
! --
! --  For each function that returns a String, the lower bound of the returned
! --  value is 1.
! --
! --  The basic model embodied in the package is that a fixed-length string
! --  comprises significant characters and possibly padding (with space
! --  characters) on either or both ends. When a shorter string is copied to a
! --  longer string, padding is inserted, and when a longer string is copied to a
! --  shorter one, padding is stripped. The Move procedure in Strings.Fixed,
! --  which takes a String as an out parameter, allows the programmer to control
! --  these effects. Similar control is provided by the string transformation
! --  procedures.
! 
! package Ada.Strings.Fixed with SPARK_Mode is
     pragma Preelaborate;
  
     --------------------------------------------------------------
*************** package Ada.Strings.Fixed is
*** 27,33 ****
        Target  : out String;
        Drop    : Truncation := Error;
        Justify : Alignment  := Left;
!       Pad     : Character  := Space);
  
     ------------------------
     -- Search Subprograms --
--- 52,101 ----
        Target  : out String;
        Drop    : Truncation := Error;
        Justify : Alignment  := Left;
!       Pad     : Character  := Space)
!    with
! 
!      --  Incomplete contract
! 
!      Global => null;
!    --  The Move procedure copies characters from Source to Target. If Source
!    --  has the same length as Target, then the effect is to assign Source to
!    --  Target. If Source is shorter than Target then:
!    --
!    --  * If Justify=Left, then Source is copied into the first Source'Length
!    --    characters of Target.
!    --
!    --  * If Justify=Right, then Source is copied into the last Source'Length
!    --    characters of Target.
!    --
!    --  * If Justify=Center, then Source is copied into the middle Source'Length
!    --    characters of Target. In this case, if the difference in length
!    --    between Target and Source is odd, then the extra Pad character is on
!    --    the right.
!    --
!    --  * Pad is copied to each Target character not otherwise assigned.
!    --
!    --  If Source is longer than Target, then the effect is based on Drop.
!    --
!    --  * If Drop=Left, then the rightmost Target'Length characters of Source
!    --    are copied into Target.
!    --
!    --  * If Drop=Right, then the leftmost Target'Length characters of Source
!    --    are copied into Target.
!    --
!    --  * If Drop=Error, then the effect depends on the value of the Justify
!    --    parameter and also on whether any characters in Source other than Pad
!    --    would fail to be copied:
!    --
!    --    * If Justify=Left, and if each of the rightmost
!    --      Source'Length-Target'Length characters in Source is Pad, then the
!    --      leftmost Target'Length characters of Source are copied to Target.
!    --
!    --    * If Justify=Right, and if each of the leftmost
!    --      Source'Length-Target'Length characters in Source is Pad, then the
!    --      rightmost Target'Length characters of Source are copied to Target.
!    --
!    --    * Otherwise, Length_Error is propagated.
  
     ------------------------
     -- Search Subprograms --
*************** package Ada.Strings.Fixed is
*** 36,103 ****
     function Index
       (Source  : String;
        Pattern : String;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural;
  
     function Index
       (Source  : String;
        Pattern : String;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping_Function) return Natural;
  
!    function Index
!      (Source : String;
!       Set    : Maps.Character_Set;
!       Test   : Membership := Inside;
!       Going  : Direction  := Forward) return Natural;
  
     function Index
       (Source  : String;
        Pattern : String;
-       From    : Positive;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural;
!    pragma Ada_05 (Index);
  
     function Index
       (Source  : String;
        Pattern : String;
-       From    : Positive;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping_Function) return Natural;
!    pragma Ada_05 (Index);
  
     function Index
       (Source  : String;
        Set     : Maps.Character_Set;
        From    : Positive;
        Test    : Membership := Inside;
!       Going   : Direction := Forward) return Natural;
     pragma Ada_05 (Index);
  
     function Index_Non_Blank
       (Source : String;
!       Going  : Direction := Forward) return Natural;
  
     function Index_Non_Blank
       (Source : String;
!       From   : Positive;
!       Going  : Direction := Forward) return Natural;
!    pragma Ada_05 (Index_Non_Blank);
  
     function Count
       (Source  : String;
        Pattern : String;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural;
  
     function Count
       (Source  : String;
        Pattern : String;
!       Mapping : Maps.Character_Mapping_Function) return Natural;
  
     function Count
       (Source : String;
!       Set    : Maps.Character_Set) return Natural;
  
     procedure Find_Token
       (Source : String;
--- 104,242 ----
     function Index
       (Source  : String;
        Pattern : String;
+       From    : Positive;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping_Function) return Natural
!    with
!      Pre    =>
!        Pattern'Length /= 0
!          and then (if Source'Length /= 0 then From in Source'Range),
!      Global => null;
!    pragma Ada_05 (Index);
  
     function Index
       (Source  : String;
        Pattern : String;
+       From    : Positive;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural
!    with
!      Pre    =>
!        Pattern'Length /= 0
!          and then (if Source'Length /= 0 then From in Source'Range),
!      Global => null;
!    pragma Ada_05 (Index);
  
!    --  Each Index function searches, starting from From, for a slice of
!    --  Source, with length Pattern'Length, that matches Pattern with respect to
!    --  Mapping; the parameter Going indicates the direction of the lookup. If
!    --  Source is the null string, Index returns 0; otherwise, if From is not in
!    --  Source'Range, then Index_Error is propagated. If Going = Forward, then
!    --  Index returns the smallest index I which is greater than or equal to
!    --  From such that the slice of Source starting at I matches Pattern. If
!    --  Going = Backward, then Index returns the largest index I such that the
!    --  slice of Source starting at I matches Pattern and has an upper bound
!    --  less than or equal to From. If there is no such slice, then 0 is
!    --  returned. If Pattern is the null string, then Pattern_Error is
!    --  propagated.
  
     function Index
       (Source  : String;
        Pattern : String;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural
!    with
!      Pre    => Pattern'Length > 0,
!      Global => null;
  
     function Index
       (Source  : String;
        Pattern : String;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping_Function) return Natural
!    with
!      Pre    => Pattern'Length /= 0,
!      Global => null;
! 
!    --  If Going = Forward, returns:
!    --
!    --     Index (Source, Pattern, Source'First, Forward, Mapping)
!    --
!    --  otherwise, returns:
!    --
!    --     Index (Source, Pattern, Source'Last, Backward, Mapping).
! 
!    function Index
!      (Source : String;
!       Set    : Maps.Character_Set;
!       Test   : Membership := Inside;
!       Going  : Direction  := Forward) return Natural
!    with
!      Global => null;
  
     function Index
       (Source  : String;
        Set     : Maps.Character_Set;
        From    : Positive;
        Test    : Membership := Inside;
!       Going   : Direction := Forward) return Natural
!    with
!      Pre    => (if Source'Length /= 0 then From in Source'Range),
!      Global => null;
     pragma Ada_05 (Index);
+    --  Index searches for the first or last occurrence of any of a set of
+    --  characters (when Test=Inside), or any of the complement of a set of
+    --  characters (when Test=Outside). If Source is the null string, Index
+    --  returns 0; otherwise, if From is not in Source'Range, then Index_Error
+    --  is propagated. Otherwise, it returns the smallest index I >= From (if
+    --  Going=Forward) or the largest index I <= From (if Going=Backward) such
+    --  that Source(I) satisfies the Test condition with respect to Set; it
+    --  returns 0 if there is no such Character in Source.
  
     function Index_Non_Blank
       (Source : String;
!       From   : Positive;
!       Going  : Direction := Forward) return Natural
!    with
!      Pre   => (if Source'Length /= 0 then From in Source'Range),
!      Global => null;
!    pragma Ada_05 (Index_Non_Blank);
!    --  Returns Index (Source, Maps.To_Set(Space), From, Outside, Going)
  
     function Index_Non_Blank
       (Source : String;
!       Going  : Direction := Forward) return Natural
!    with
!      Global => null;
!    --  Returns Index (Source, Maps.To_Set(Space), Outside, Going)
  
     function Count
       (Source  : String;
        Pattern : String;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural
!    with
!      Pre    => Pattern'Length /= 0,
!      Global => null;
  
     function Count
       (Source  : String;
        Pattern : String;
!       Mapping : Maps.Character_Mapping_Function) return Natural
!    with
!      Pre    => Pattern'Length /= 0,
!      Global => null;
! 
!    --  Returns the maximum number of nonoverlapping slices of Source that match
!    --  Pattern with respect to Mapping. If Pattern is the null string then
!    --  Pattern_Error is propagated.
  
     function Count
       (Source : String;
!       Set    : Maps.Character_Set) return Natural
!    with
!      Global => null;
!    --  Returns the number of occurrences in Source of characters that are in
!    --  Set.
  
     procedure Find_Token
       (Source : String;
*************** package Ada.Strings.Fixed is
*** 105,119 ****
        From   : Positive;
        Test   : Membership;
        First  : out Positive;
!       Last   : out Natural);
     pragma Ada_2012 (Find_Token);
  
     procedure Find_Token
       (Source : String;
        Set    : Maps.Character_Set;
        Test   : Membership;
        First  : out Positive;
!       Last   : out Natural);
  
     ------------------------------------
     -- String Translation Subprograms --
--- 244,271 ----
        From   : Positive;
        Test   : Membership;
        First  : out Positive;
!       Last   : out Natural)
!    with
!      Pre    => (if Source'Length /= 0 then From in Source'Range),
!      Global => null;
     pragma Ada_2012 (Find_Token);
+    --  If Source is not the null string and From is not in Source'Range, then
+    --  Index_Error is raised. Otherwise, First is set to the index of the first
+    --  character in Source(From .. Source'Last) that satisfies the Test
+    --  condition. Last is set to the largest index such that all characters in
+    --  Source(First .. Last) satisfy the Test condition. If no characters in
+    --  Source(From .. Source'Last) satisfy the Test condition, First is set to
+    --  From, and Last is set to 0.
  
     procedure Find_Token
       (Source : String;
        Set    : Maps.Character_Set;
        Test   : Membership;
        First  : out Positive;
!       Last   : out Natural)
!    with
!      Global => null;
!    --  Equivalent to Find_Token (Source, Set, Source'First, Test, First, Last)
  
     ------------------------------------
     -- String Translation Subprograms --
*************** package Ada.Strings.Fixed is
*** 121,150 ****
  
     function Translate
       (Source  : String;
!       Mapping : Maps.Character_Mapping) return String;
! 
!    procedure Translate
!      (Source  : in out String;
!       Mapping : Maps.Character_Mapping);
  
     function Translate
       (Source  : String;
!       Mapping : Maps.Character_Mapping_Function) return String;
  
     procedure Translate
       (Source  : in out String;
!       Mapping : Maps.Character_Mapping_Function);
  
     ---------------------------------------
     -- String Transformation Subprograms --
     ---------------------------------------
  
-    function Replace_Slice
-      (Source : String;
-       Low    : Positive;
-       High   : Natural;
-       By     : String) return String;
- 
     procedure Replace_Slice
       (Source  : in out String;
        Low     : Positive;
--- 273,312 ----
  
     function Translate
       (Source  : String;
!       Mapping : Maps.Character_Mapping_Function) return String
!    with
!      Post   => Translate'Result'Length = Source'Length,
!      Global => null;
  
     function Translate
       (Source  : String;
!       Mapping : Maps.Character_Mapping) return String
!    with
!      Post   => Translate'Result'Length = Source'Length,
!      Global => null;
! 
!    --  Returns the string S whose length is Source'Length and such that S (I)
!    --  is the character to which Mapping maps the corresponding element of
!    --  Source, for I in 1 .. Source'Length.
  
     procedure Translate
       (Source  : in out String;
!       Mapping : Maps.Character_Mapping_Function)
!    with
!      Global => null;
! 
!    procedure Translate
!      (Source  : in out String;
!       Mapping : Maps.Character_Mapping)
!    with
!      Global => null;
! 
!    --  Equivalent to Source := Translate(Source, Mapping)
  
     ---------------------------------------
     -- String Transformation Subprograms --
     ---------------------------------------
  
     procedure Replace_Slice
       (Source  : in out String;
        Low     : Positive;
*************** package Ada.Strings.Fixed is
*** 152,192 ****
        By      : String;
        Drop    : Truncation := Error;
        Justify : Alignment  := Left;
!       Pad     : Character  := Space);
  
     function Insert
       (Source   : String;
        Before   : Positive;
!       New_Item : String) return String;
  
     procedure Insert
       (Source   : in out String;
        Before   : Positive;
        New_Item : String;
!       Drop     : Truncation := Error);
  
     function Overwrite
       (Source   : String;
        Position : Positive;
!       New_Item : String) return String;
  
     procedure Overwrite
       (Source   : in out String;
        Position : Positive;
        New_Item : String;
!       Drop     : Truncation := Right);
  
     function Delete
       (Source  : String;
        From    : Positive;
!       Through : Natural) return String;
  
     procedure Delete
       (Source  : in out String;
        From    : Positive;
        Through : Natural;
        Justify : Alignment := Left;
!       Pad     : Character := Space);
  
     ---------------------------------
     -- String Selector Subprograms --
--- 314,465 ----
        By      : String;
        Drop    : Truncation := Error;
        Justify : Alignment  := Left;
!       Pad     : Character  := Space)
!    with
!      Pre    =>
! 
!        --  Incomplete contract
! 
!        Low - 1 <= Source'Last
!          and then High >= Source'First - 1,
!      Global => null;
!    --  If Low > Source'Last+1, or High < Source'First - 1, then Index_Error is
!    --  propagated. Otherwise:
!    --
!    --  * If High >= Low, then the returned string comprises
!    --    Source (Source'First .. Low - 1)
!    --    & By & Source(High + 1 .. Source'Last), but with lower bound 1.
!    --
!    --  * If High < Low, then the returned string is
!    --    Insert (Source, Before => Low, New_Item => By).
! 
!    function Replace_Slice
!      (Source : String;
!       Low    : Positive;
!       High   : Natural;
!       By     : String) return String
!    with
!      Pre            =>
!        Low - 1 <= Source'Last
!          and then High >= Source'First - 1
!          and then (if High >= Low
!                    then Natural'Max (0, Low - Source'First)
!                      <= Natural'Last - By'Length
!                       - Natural'Max (Source'Last - High, 0)
!                    else Source'Length <= Natural'Last - By'Length),
!      Contract_Cases =>
!        (High >= Low =>
!           Replace_Slice'Result'Length
!         = Natural'Max (0, Low - Source'First)
!         + By'Length
!         + Natural'Max (Source'Last - High, 0),
!         others      =>
!           Replace_Slice'Result'Length = Source'Length + By'Length),
!      Global         => null;
!    --  Equivalent to:
!    --
!    --    Move (Replace_Slice (Source, Low, High, By),
!    --          Source, Drop, Justify, Pad).
  
     function Insert
       (Source   : String;
        Before   : Positive;
!       New_Item : String) return String
!    with
!      Pre    =>
!        Before - 1 in Source'First - 1 .. Source'Last
!          and then Source'Length <= Natural'Last - New_Item'Length,
!      Post   => Insert'Result'Length = Source'Length + New_Item'Length,
!      Global => null;
!    --  Propagates Index_Error if Before is not in
!    --  Source'First .. Source'Last+1; otherwise, returns
!    --  Source (Source'First .. Before - 1)
!    --  & New_Item & Source(Before..Source'Last), but with lower bound 1.
  
     procedure Insert
       (Source   : in out String;
        Before   : Positive;
        New_Item : String;
!       Drop     : Truncation := Error)
!    with
!      Pre    => Before - 1 in Source'First - 1 .. Source'Last,
! 
!      --  Incomplete contract
! 
!      Global => null;
!    --  Equivalent to Move (Insert (Source, Before, New_Item), Source, Drop)
  
     function Overwrite
       (Source   : String;
        Position : Positive;
!       New_Item : String) return String
!    with
!      Pre    =>
!        Position - 1 in Source'First - 1 .. Source'Last
!          and then
!        (if Position - Source'First >= Source'Length - New_Item'Length
!         then Position - Source'First <= Natural'Last - New_Item'Length),
!      Post   =>
!        Overwrite'Result'Length
!      = Integer'Max (Source'Length,
!                     Position - Source'First + New_Item'Length),
!      Global => null;
!    --  Propagates Index_Error if Position is not in
!    --  Source'First .. Source'Last + 1; otherwise, returns the string obtained
!    --  from Source by consecutively replacing characters starting at Position
!    --  with corresponding characters from New_Item. If the end of Source is
!    --  reached before the characters in New_Item are exhausted, the remaining
!    --  characters from New_Item are appended to the string.
  
     procedure Overwrite
       (Source   : in out String;
        Position : Positive;
        New_Item : String;
!       Drop     : Truncation := Right)
!    with
!      Pre    => Position - 1 in Source'First - 1 .. Source'Last,
! 
!      --  Incomplete contract
! 
!      Global => null;
!    --  Equivalent to Move(Overwrite(Source, Position, New_Item), Source, Drop)
  
     function Delete
       (Source  : String;
        From    : Positive;
!       Through : Natural) return String
!    with
!      Pre    => (if From <= Through
!                 then (From in Source'Range
!                         and then Through <= Source'Last)),
!      Post   =>
!        Delete'Result'Length
!      = Source'Length - (if From <= Through
!                         then Through - From + 1
!                         else 0),
!      Global => null;
!    --  If From <= Through, the returned string is
!    --  Replace_Slice(Source, From, Through, ""); otherwise, it is Source with
!    --  lower bound 1.
  
     procedure Delete
       (Source  : in out String;
        From    : Positive;
        Through : Natural;
        Justify : Alignment := Left;
!       Pad     : Character := Space)
!    with
!      Pre    => (if From <= Through
!                 then (From in Source'Range
!                         and then Through <= Source'Last)),
! 
!      --  Incomplete contract
! 
!      Global => null;
!    --  Equivalent to:
!    --
!    --     Move (Delete (Source, From, Through),
!    --           Source, Justify => Justify, Pad => Pad).
  
     ---------------------------------
     -- String Selector Subprograms --
*************** package Ada.Strings.Fixed is
*** 194,240 ****
  
     function Trim
       (Source : String;
!       Side   : Trim_End) return String;
  
     procedure Trim
       (Source  : in out String;
        Side    : Trim_End;
        Justify : Alignment := Left;
!       Pad     : Character := Space);
  
     function Trim
       (Source : String;
        Left   : Maps.Character_Set;
!       Right  : Maps.Character_Set) return String;
  
     procedure Trim
       (Source  : in out String;
        Left    : Maps.Character_Set;
        Right   : Maps.Character_Set;
        Justify : Alignment := Strings.Left;
!       Pad     : Character := Space);
  
     function Head
       (Source : String;
        Count  : Natural;
!       Pad    : Character := Space) return String;
  
     procedure Head
       (Source  : in out String;
        Count   : Natural;
        Justify : Alignment := Left;
!       Pad     : Character := Space);
  
     function Tail
       (Source : String;
        Count  : Natural;
!       Pad    : Character := Space) return String;
  
     procedure Tail
       (Source  : in out String;
        Count   : Natural;
        Justify : Alignment := Left;
!       Pad     : Character := Space);
  
     ----------------------------------
     -- String Constructor Functions --
--- 467,572 ----
  
     function Trim
       (Source : String;
!       Side   : Trim_End) return String
!    with
!      Post   => Trim'Result'Length <= Source'Length,
!      Global => null;
!    --  Returns the string obtained by removing from Source all leading Space
!    --  characters (if Side = Left), all trailing Space characters (if
!    --  Side = Right), or all leading and trailing Space characters (if
!    --  Side = Both).
  
     procedure Trim
       (Source  : in out String;
        Side    : Trim_End;
        Justify : Alignment := Left;
!       Pad     : Character := Space)
!    with
! 
!      --  Incomplete contract
! 
!      Global => null;
!    --  Equivalent to:
!    --
!    --     Move (Trim (Source, Side), Source, Justify=>Justify, Pad=>Pad).
  
     function Trim
       (Source : String;
        Left   : Maps.Character_Set;
!       Right  : Maps.Character_Set) return String
!    with
!      Post   => Trim'Result'Length <= Source'Length,
!      Global => null;
!    --  Returns the string obtained by removing from Source all leading
!    --  characters in Left and all trailing characters in Right.
  
     procedure Trim
       (Source  : in out String;
        Left    : Maps.Character_Set;
        Right   : Maps.Character_Set;
        Justify : Alignment := Strings.Left;
!       Pad     : Character := Space)
!    with
! 
!      --  Incomplete contract
! 
!      Global => null;
!    --  Equivalent to:
!    --
!    --     Move (Trim (Source, Left, Right),
!    --           Source, Justify => Justify, Pad=>Pad).
  
     function Head
       (Source : String;
        Count  : Natural;
!       Pad    : Character := Space) return String
!    with
!      Post   => Head'Result'Length = Count,
!      Global => null;
!    --  Returns a string of length Count. If Count <= Source'Length, the string
!    --  comprises the first Count characters of Source. Otherwise, its contents
!    --  are Source concatenated with Count - Source'Length Pad characters.
  
     procedure Head
       (Source  : in out String;
        Count   : Natural;
        Justify : Alignment := Left;
!       Pad     : Character := Space)
!    with
! 
!      --  Incomplete contract
! 
!      Global => null;
!    --  Equivalent to:
!    --
!    --     Move (Head (Source, Count, Pad),
!    --           Source, Drop => Error, Justify => Justify, Pad => Pad).
  
     function Tail
       (Source : String;
        Count  : Natural;
!       Pad    : Character := Space) return String
!    with
!      Post   => Tail'Result'Length = Count,
!      Global => null;
!    --  Returns a string of length Count. If Count <= Source'Length, the string
!    --  comprises the last Count characters of Source. Otherwise, its contents
!    --  are Count-Source'Length Pad characters concatenated with Source.
  
     procedure Tail
       (Source  : in out String;
        Count   : Natural;
        Justify : Alignment := Left;
!       Pad     : Character := Space)
!    with
! 
!      --  Incomplete contract
! 
!      Global => null;
!    --  Equivalent to:
!    --
!    --     Move (Tail (Source, Count, Pad),
!    --           Source, Drop => Error, Justify => Justify, Pad => Pad).
  
     ----------------------------------
     -- String Constructor Functions --
*************** package Ada.Strings.Fixed is
*** 242,251 ****
  
     function "*"
       (Left  : Natural;
!       Right : Character) return String;
  
     function "*"
       (Left  : Natural;
!       Right : String) return String;
  
  end Ada.Strings.Fixed;
--- 574,596 ----
  
     function "*"
       (Left  : Natural;
!       Right : Character) return String
!    with
!      Post   => "*"'Result'Length = Left,
!      Global => null;
  
     function "*"
       (Left  : Natural;
!       Right : String) return String
!    with
!      Pre    => (if Right'Length /= 0 then Left <= Natural'Last / Right'Length),
!      Post   => "*"'Result'Length = Left * Right'Length,
!      Global => null;
! 
!    --  These functions replicate a character or string a specified number of
!    --  times. The first function returns a string whose length is Left and each
!    --  of whose elements is Right. The second function returns a string whose
!    --  length is Left * Right'Length and whose value is the null string if
!    --  Left = 0 and otherwise is (Left - 1)*Right & Right with lower bound 1.
  
  end Ada.Strings.Fixed;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-strunb.ads gcc-10.1.0/gcc/ada/libgnat/a-strunb.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-strunb.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-strunb.ads	Thu May  7 10:49:59 2020
***************
*** 33,190 ****
  --                                                                          --
  ------------------------------------------------------------------------------
  
  with Ada.Strings.Maps;
  with Ada.Finalization;
  
! package Ada.Strings.Unbounded is
     pragma Preelaborate;
  
     type Unbounded_String is private;
     pragma Preelaborable_Initialization (Unbounded_String);
  
     Null_Unbounded_String : constant Unbounded_String;
  
!    function Length (Source : Unbounded_String) return Natural;
  
     type String_Access is access all String;
  
     procedure Free (X : in out String_Access);
  
     --------------------------------------------------------
     -- Conversion, Concatenation, and Selection Functions --
     --------------------------------------------------------
  
     function To_Unbounded_String
!      (Source : String)  return Unbounded_String;
  
     function To_Unbounded_String
!      (Length : Natural) return Unbounded_String;
  
!    function To_String (Source : Unbounded_String) return String;
  
     procedure Set_Unbounded_String
       (Target : out Unbounded_String;
!       Source : String);
     pragma Ada_05 (Set_Unbounded_String);
  
     procedure Append
       (Source   : in out Unbounded_String;
!       New_Item : Unbounded_String);
  
     procedure Append
       (Source   : in out Unbounded_String;
!       New_Item : String);
  
     procedure Append
       (Source   : in out Unbounded_String;
!       New_Item : Character);
  
     function "&"
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Unbounded_String;
  
     function "&"
       (Left  : Unbounded_String;
!       Right : String) return Unbounded_String;
  
     function "&"
       (Left  : String;
!       Right : Unbounded_String) return Unbounded_String;
  
     function "&"
       (Left  : Unbounded_String;
!       Right : Character) return Unbounded_String;
  
     function "&"
       (Left  : Character;
!       Right : Unbounded_String) return Unbounded_String;
  
     function Element
       (Source : Unbounded_String;
!       Index  : Positive) return Character;
  
     procedure Replace_Element
       (Source : in out Unbounded_String;
        Index  : Positive;
!       By     : Character);
  
     function Slice
       (Source : Unbounded_String;
        Low    : Positive;
!       High   : Natural) return String;
  
     function Unbounded_Slice
       (Source : Unbounded_String;
        Low    : Positive;
!       High   : Natural) return Unbounded_String;
     pragma Ada_05 (Unbounded_Slice);
  
     procedure Unbounded_Slice
       (Source : Unbounded_String;
        Target : out Unbounded_String;
        Low    : Positive;
!       High   : Natural);
     pragma Ada_05 (Unbounded_Slice);
  
     function "="
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean;
  
     function "="
       (Left  : Unbounded_String;
!       Right : String) return Boolean;
  
     function "="
       (Left  : String;
!       Right : Unbounded_String) return Boolean;
  
     function "<"
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean;
  
     function "<"
       (Left  : Unbounded_String;
!       Right : String) return Boolean;
  
     function "<"
       (Left  : String;
!       Right : Unbounded_String) return Boolean;
  
     function "<="
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean;
  
     function "<="
       (Left  : Unbounded_String;
!       Right : String) return Boolean;
  
     function "<="
       (Left  : String;
!       Right : Unbounded_String) return Boolean;
  
     function ">"
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean;
  
     function ">"
       (Left  : Unbounded_String;
!       Right : String) return Boolean;
  
     function ">"
       (Left  : String;
!       Right : Unbounded_String) return Boolean;
  
     function ">="
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean;
  
     function ">="
       (Left  : Unbounded_String;
!       Right : String) return Boolean;
  
     function ">="
       (Left  : String;
!       Right : Unbounded_String) return Boolean;
  
     ------------------------
     -- Search Subprograms --
--- 33,350 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
+ --  Preconditions in this unit are meant for analysis only, not for run-time
+ --  checking, so that the expected exceptions are raised. This is enforced by
+ --  setting the corresponding assertion policy to Ignore.
+ 
+ pragma Assertion_Policy (Pre => Ignore);
+ 
  with Ada.Strings.Maps;
  with Ada.Finalization;
  
! --  The language-defined package Strings.Unbounded provides a private type
! --  Unbounded_String and a set of operations. An object of type
! --  Unbounded_String represents a String whose low bound is 1 and whose length
! --  can vary conceptually between 0 and Natural'Last. The subprograms for
! --  fixed-length string handling are either overloaded directly for
! --  Unbounded_String, or are modified as needed to reflect the flexibility in
! --  length. Since the Unbounded_String type is private, relevant constructor
! --  and selector operations are provided.
! 
! package Ada.Strings.Unbounded with
!   Initial_Condition => Length (Null_Unbounded_String) = 0
! is
     pragma Preelaborate;
  
     type Unbounded_String is private;
     pragma Preelaborable_Initialization (Unbounded_String);
  
     Null_Unbounded_String : constant Unbounded_String;
+    --  Represents the null String. If an object of type Unbounded_String is not
+    --  otherwise initialized, it will be initialized to the same value as
+    --  Null_Unbounded_String.
  
!    function Length (Source : Unbounded_String) return Natural with
!      Global => null;
!    --  Returns the length of the String represented by Source
  
     type String_Access is access all String;
+    --  Provides a (nonprivate) access type for explicit processing of
+    --  unbounded-length strings.
  
     procedure Free (X : in out String_Access);
+    --  Performs an unchecked deallocation of an object of type String_Access
  
     --------------------------------------------------------
     -- Conversion, Concatenation, and Selection Functions --
     --------------------------------------------------------
  
     function To_Unbounded_String
!      (Source : String) return Unbounded_String
!    with
!      Post   => Length (To_Unbounded_String'Result) = Source'Length,
!      Global => null;
!    --  Returns an Unbounded_String that represents Source
  
     function To_Unbounded_String
!      (Length : Natural) return Unbounded_String
!    with
!      Post   =>
!        Ada.Strings.Unbounded.Length (To_Unbounded_String'Result)
!      = Length,
!      Global => null;
!    --  Returns an Unbounded_String that represents an uninitialized String
!    --  whose length is Length.
  
!    function To_String (Source : Unbounded_String) return String with
!      Post   => To_String'Result'Length = Length (Source),
!      Global => null;
!    --  Returns the String with lower bound 1 represented by Source
! 
!    --  To_String and To_Unbounded_String are related as follows:
!    --
!    --  * If S is a String, then To_String (To_Unbounded_String (S)) = S.
!    --
!    --  * If U is an Unbounded_String, then
!    --    To_Unbounded_String (To_String (U)) = U.
  
     procedure Set_Unbounded_String
       (Target : out Unbounded_String;
!       Source : String)
!    with
!      Global => null;
     pragma Ada_05 (Set_Unbounded_String);
+    --  Sets Target to an Unbounded_String that represents Source
  
     procedure Append
       (Source   : in out Unbounded_String;
!       New_Item : Unbounded_String)
!    with
!      Pre    => Length (New_Item) <= Natural'Last - Length (Source),
!      Post   => Length (Source) = Length (Source)'Old + Length (New_Item),
!      Global => null;
  
     procedure Append
       (Source   : in out Unbounded_String;
!       New_Item : String)
!    with
!      Pre    => New_Item'Length <= Natural'Last - Length (Source),
!      Post   => Length (Source) = Length (Source)'Old + New_Item'Length,
!      Global => null;
  
     procedure Append
       (Source   : in out Unbounded_String;
!       New_Item : Character)
!    with
!      Pre    => Length (Source) < Natural'Last,
!      Post   => Length (Source) = Length (Source)'Old + 1,
!      Global => null;
! 
!    --  For each of the Append procedures, the resulting string represented by
!    --  the Source parameter is given by the concatenation of the original value
!    --  of Source and the value of New_Item.
  
     function "&"
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Unbounded_String
!    with
!      Pre    => Length (Right) <= Natural'Last - Length (Left),
!      Post   => Length ("&"'Result) = Length (Left) + Length (Right),
!      Global => null;
  
     function "&"
       (Left  : Unbounded_String;
!       Right : String) return Unbounded_String
!    with
!      Pre    => Right'Length <= Natural'Last - Length (Left),
!      Post   => Length ("&"'Result) = Length (Left) + Right'Length,
!      Global => null;
  
     function "&"
       (Left  : String;
!       Right : Unbounded_String) return Unbounded_String
!    with
!      Pre    => Left'Length <= Natural'Last - Length (Right),
!      Post   => Length ("&"'Result) = Left'Length + Length (Right),
!      Global => null;
  
     function "&"
       (Left  : Unbounded_String;
!       Right : Character) return Unbounded_String
!    with
!      Pre    => Length (Left) < Natural'Last,
!      Post   => Length ("&"'Result) = Length (Left) + 1,
!      Global => null;
  
     function "&"
       (Left  : Character;
!       Right : Unbounded_String) return Unbounded_String
!    with
!      Pre    => Length (Right) < Natural'Last,
!      Post   => Length ("&"'Result) = Length (Right) + 1,
!      Global => null;
! 
!    --  Each of the "&" functions returns an Unbounded_String obtained by
!    --  concatenating the string or character given or represented by one of the
!    --  parameters, with the string or character given or represented by the
!    --  other parameter, and applying To_Unbounded_String to the concatenation
!    --  result string.
  
     function Element
       (Source : Unbounded_String;
!       Index  : Positive) return Character
!    with
!      Pre    => Index <= Length (Source),
!      Global => null;
!    --  Returns the character at position Index in the string represented by
!    --  Source; propagates Index_Error if Index > Length (Source).
  
     procedure Replace_Element
       (Source : in out Unbounded_String;
        Index  : Positive;
!       By     : Character)
!    with
!      Pre    => Index <= Length (Source),
!      Post   => Length (Source) = Length (Source)'Old,
!      Global => null;
!    --  Updates Source such that the character at position Index in the string
!    --  represented by Source is By; propagates Index_Error if
!    --  Index > Length (Source).
  
     function Slice
       (Source : Unbounded_String;
        Low    : Positive;
!       High   : Natural) return String
!    with
!      Pre    => Low - 1 <= Length (Source) and then High <= Length (Source),
!      Post   => Slice'Result'Length = Natural'Max (0, High - Low + 1),
!      Global => null;
!    --  Returns the slice at positions Low through High in the string
!    --  represented by Source; propagates Index_Error if
!    --  Low > Length (Source) + 1 or High > Length (Source). The bounds of the
!    --  returned string are Low and High.
  
     function Unbounded_Slice
       (Source : Unbounded_String;
        Low    : Positive;
!       High   : Natural) return Unbounded_String
!    with
!      Pre    => Low - 1 <= Length (Source) and then High <= Length (Source),
!      Post   =>
!        Length (Unbounded_Slice'Result) = Natural'Max (0, High - Low + 1),
!      Global => null;
     pragma Ada_05 (Unbounded_Slice);
+    --  Returns the slice at positions Low through High in the string
+    --  represented by Source as an Unbounded_String. This propagates
+    --  Index_Error if Low > Length(Source) + 1 or High > Length (Source).
  
     procedure Unbounded_Slice
       (Source : Unbounded_String;
        Target : out Unbounded_String;
        Low    : Positive;
!       High   : Natural)
!    with
!      Pre    => Low - 1 <= Length (Source) and then High <= Length (Source),
!      Post   => Length (Target) = Natural'Max (0, High - Low + 1),
!      Global => null;
     pragma Ada_05 (Unbounded_Slice);
+    --  Sets Target to the Unbounded_String representing the slice at positions
+    --  Low through High in the string represented by Source. This propagates
+    --  Index_Error if Low > Length(Source) + 1 or High > Length (Source).
  
     function "="
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function "="
       (Left  : Unbounded_String;
!       Right : String) return Boolean
!    with
!      Global => null;
  
     function "="
       (Left  : String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function "<"
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function "<"
       (Left  : Unbounded_String;
!       Right : String) return Boolean
!    with
!      Global => null;
  
     function "<"
       (Left  : String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function "<="
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function "<="
       (Left  : Unbounded_String;
!       Right : String) return Boolean
!    with
!      Global => null;
  
     function "<="
       (Left  : String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function ">"
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function ">"
       (Left  : Unbounded_String;
!       Right : String) return Boolean
!    with
!      Global => null;
  
     function ">"
       (Left  : String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function ">="
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function ">="
       (Left  : Unbounded_String;
!       Right : String) return Boolean
!    with
!      Global => null;
  
     function ">="
       (Left  : String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
! 
!    --  Each of the functions "=", "<", ">", "<=", and ">=" returns the same
!    --  result as the corresponding String operation applied to the String
!    --  values given or represented by Left and Right.
  
     ------------------------
     -- Search Subprograms --
*************** package Ada.Strings.Unbounded is
*** 194,219 ****
       (Source  : Unbounded_String;
        Pattern : String;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural;
  
     function Index
       (Source  : Unbounded_String;
        Pattern : String;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping_Function) return Natural;
  
     function Index
       (Source : Unbounded_String;
        Set    : Maps.Character_Set;
        Test   : Membership := Inside;
!       Going  : Direction  := Forward) return Natural;
  
     function Index
       (Source  : Unbounded_String;
        Pattern : String;
        From    : Positive;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural;
     pragma Ada_05 (Index);
  
     function Index
--- 354,391 ----
       (Source  : Unbounded_String;
        Pattern : String;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural
!    with
!      Pre    => Pattern'Length /= 0,
!      Global => null;
  
     function Index
       (Source  : Unbounded_String;
        Pattern : String;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping_Function) return Natural
!    with
!      Pre    => Pattern'Length /= 0,
!      Global => null;
  
     function Index
       (Source : Unbounded_String;
        Set    : Maps.Character_Set;
        Test   : Membership := Inside;
!       Going  : Direction  := Forward) return Natural
!    with
!      Global => null;
  
     function Index
       (Source  : Unbounded_String;
        Pattern : String;
        From    : Positive;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural
!    with
!      Pre    => (if Length (Source) /= 0 then From <= Length (Source))
!                and then Pattern'Length /= 0,
!      Global => null;
     pragma Ada_05 (Index);
  
     function Index
*************** package Ada.Strings.Unbounded is
*** 221,227 ****
        Pattern : String;
        From    : Positive;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping_Function) return Natural;
     pragma Ada_05 (Index);
  
     function Index
--- 393,403 ----
        Pattern : String;
        From    : Positive;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping_Function) return Natural
!    with
!      Pre    => (if Length (Source) /= 0 then From <= Length (Source))
!                and then Pattern'Length /= 0,
!      Global => null;
     pragma Ada_05 (Index);
  
     function Index
*************** package Ada.Strings.Unbounded is
*** 229,260 ****
        Set     : Maps.Character_Set;
        From    : Positive;
        Test    : Membership := Inside;
!       Going   : Direction := Forward) return Natural;
     pragma Ada_05 (Index);
  
     function Index_Non_Blank
       (Source : Unbounded_String;
!       Going  : Direction := Forward) return Natural;
  
     function Index_Non_Blank
       (Source : Unbounded_String;
        From   : Positive;
!       Going  : Direction := Forward) return Natural;
     pragma Ada_05 (Index_Non_Blank);
  
     function Count
       (Source  : Unbounded_String;
        Pattern : String;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural;
  
     function Count
       (Source  : Unbounded_String;
        Pattern : String;
!       Mapping : Maps.Character_Mapping_Function) return Natural;
  
     function Count
       (Source : Unbounded_String;
!       Set    : Maps.Character_Set) return Natural;
  
     procedure Find_Token
       (Source : Unbounded_String;
--- 405,452 ----
        Set     : Maps.Character_Set;
        From    : Positive;
        Test    : Membership := Inside;
!       Going   : Direction := Forward) return Natural
!    with
!      Pre    => (if Length (Source) /= 0 then From <= Length (Source)),
!      Global => null;
     pragma Ada_05 (Index);
  
     function Index_Non_Blank
       (Source : Unbounded_String;
!       Going  : Direction := Forward) return Natural
!    with
!      Global => null;
  
     function Index_Non_Blank
       (Source : Unbounded_String;
        From   : Positive;
!       Going  : Direction := Forward) return Natural
!    with
!      Pre    => (if Length (Source) /= 0 then From <= Length (Source)),
!      Global => null;
     pragma Ada_05 (Index_Non_Blank);
  
     function Count
       (Source  : Unbounded_String;
        Pattern : String;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural
!    with
!      Pre    => Pattern'Length /= 0,
!      Global => null;
  
     function Count
       (Source  : Unbounded_String;
        Pattern : String;
!       Mapping : Maps.Character_Mapping_Function) return Natural
!    with
!      Pre    => Pattern'Length /= 0,
!      Global => null;
  
     function Count
       (Source : Unbounded_String;
!       Set    : Maps.Character_Set) return Natural
!    with
!      Global => null;
  
     procedure Find_Token
       (Source : Unbounded_String;
*************** package Ada.Strings.Unbounded is
*** 262,268 ****
        From   : Positive;
        Test   : Membership;
        First  : out Positive;
!       Last   : out Natural);
     pragma Ada_2012 (Find_Token);
  
     procedure Find_Token
--- 454,463 ----
        From   : Positive;
        Test   : Membership;
        First  : out Positive;
!       Last   : out Natural)
!    with
!      Pre    => (if Length (Source) /= 0 then From <= Length (Source)),
!      Global => null;
     pragma Ada_2012 (Find_Token);
  
     procedure Find_Token
*************** package Ada.Strings.Unbounded is
*** 270,276 ****
        Set    : Maps.Character_Set;
        Test   : Membership;
        First  : out Positive;
!       Last   : out Natural);
  
     ------------------------------------
     -- String Translation Subprograms --
--- 465,478 ----
        Set    : Maps.Character_Set;
        Test   : Membership;
        First  : out Positive;
!       Last   : out Natural)
!    with
!      Global => null;
! 
!    --  Each of the search subprograms (Index, Index_Non_Blank, Count,
!    --  Find_Token) has the same effect as the corresponding subprogram in
!    --  Strings.Fixed applied to the string represented by the Unbounded_String
!    --  parameter.
  
     ------------------------------------
     -- String Translation Subprograms --
*************** package Ada.Strings.Unbounded is
*** 278,296 ****
  
     function Translate
       (Source  : Unbounded_String;
!       Mapping : Maps.Character_Mapping) return Unbounded_String;
  
     procedure Translate
       (Source  : in out Unbounded_String;
!       Mapping : Maps.Character_Mapping);
  
     function Translate
       (Source  : Unbounded_String;
!       Mapping : Maps.Character_Mapping_Function) return Unbounded_String;
  
     procedure Translate
       (Source  : in out Unbounded_String;
!       Mapping : Maps.Character_Mapping_Function);
  
     ---------------------------------------
     -- String Transformation Subprograms --
--- 480,515 ----
  
     function Translate
       (Source  : Unbounded_String;
!       Mapping : Maps.Character_Mapping) return Unbounded_String
!    with
!      Post   => Length (Translate'Result) = Length (Source),
!      Global => null;
  
     procedure Translate
       (Source  : in out Unbounded_String;
!       Mapping : Maps.Character_Mapping)
!    with
!      Post   => Length (Source) = Length (Source)'Old,
!      Global => null;
  
     function Translate
       (Source  : Unbounded_String;
!       Mapping : Maps.Character_Mapping_Function) return Unbounded_String
!    with
!      Post   => Length (Translate'Result) = Length (Source),
!      Global => null;
  
     procedure Translate
       (Source  : in out Unbounded_String;
!       Mapping : Maps.Character_Mapping_Function)
!    with
!      Post   => Length (Source) = Length (Source)'Old,
!      Global => null;
! 
!    --  The Translate function has an analogous effect to the corresponding
!    --  subprogram in Strings.Fixed. The translation is applied to the string
!    --  represented by the Unbounded_String parameter, and the result is
!    --  converted (via To_Unbounded_String) to an Unbounded_String.
  
     ---------------------------------------
     -- String Transformation Subprograms --
*************** package Ada.Strings.Unbounded is
*** 300,392 ****
       (Source : Unbounded_String;
        Low    : Positive;
        High   : Natural;
!       By     : String) return Unbounded_String;
  
     procedure Replace_Slice
       (Source : in out Unbounded_String;
        Low    : Positive;
        High   : Natural;
!       By     : String);
  
     function Insert
       (Source   : Unbounded_String;
        Before   : Positive;
!       New_Item : String) return Unbounded_String;
  
     procedure Insert
       (Source   : in out Unbounded_String;
        Before   : Positive;
!       New_Item : String);
  
     function Overwrite
       (Source   : Unbounded_String;
        Position : Positive;
!       New_Item : String) return Unbounded_String;
  
     procedure Overwrite
       (Source   : in out Unbounded_String;
        Position : Positive;
!       New_Item : String);
  
     function Delete
       (Source  : Unbounded_String;
        From    : Positive;
!       Through : Natural) return Unbounded_String;
  
     procedure Delete
       (Source  : in out Unbounded_String;
        From    : Positive;
!       Through : Natural);
  
     function Trim
       (Source : Unbounded_String;
!       Side   : Trim_End) return Unbounded_String;
  
     procedure Trim
       (Source : in out Unbounded_String;
!       Side   : Trim_End);
  
     function Trim
       (Source : Unbounded_String;
        Left   : Maps.Character_Set;
!       Right  : Maps.Character_Set) return Unbounded_String;
  
     procedure Trim
       (Source : in out Unbounded_String;
        Left   : Maps.Character_Set;
!       Right  : Maps.Character_Set);
  
     function Head
       (Source : Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space) return Unbounded_String;
  
     procedure Head
       (Source : in out Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space);
  
     function Tail
       (Source : Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space) return Unbounded_String;
  
     procedure Tail
       (Source : in out Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space);
  
     function "*"
       (Left  : Natural;
!       Right : Character) return Unbounded_String;
  
     function "*"
       (Left  : Natural;
!       Right : String) return Unbounded_String;
  
     function "*"
       (Left  : Natural;
!       Right : Unbounded_String) return Unbounded_String;
  
  private
     pragma Inline (Length);
--- 519,735 ----
       (Source : Unbounded_String;
        Low    : Positive;
        High   : Natural;
!       By     : String) return Unbounded_String
!    with
!      Pre            =>
!        Low - 1 <= Length (Source)
!        and then (if High >= Low
!                  then Low - 1
!                    <= Natural'Last - By'Length
!                     - Natural'Max (Length (Source) - High, 0)
!                  else Length (Source) <= Natural'Last - By'Length),
!      Contract_Cases =>
!        (High >= Low =>
!           Length (Replace_Slice'Result)
!         = Low - 1 + By'Length + Natural'Max (Length (Source)'Old - High, 0),
!         others      =>
!           Length (Replace_Slice'Result) = Length (Source)'Old + By'Length),
!      Global         => null;
  
     procedure Replace_Slice
       (Source : in out Unbounded_String;
        Low    : Positive;
        High   : Natural;
!       By     : String)
!    with
!      Pre            =>
!        Low - 1 <= Length (Source)
!        and then (if High >= Low
!                  then Low - 1
!                    <= Natural'Last - By'Length
!                     - Natural'Max (Length (Source) - High, 0)
!                  else Length (Source) <= Natural'Last - By'Length),
!      Contract_Cases =>
!        (High >= Low =>
!           Length (Source)
!         = Low - 1 + By'Length + Natural'Max (Length (Source)'Old - High, 0),
!         others      =>
!           Length (Source) = Length (Source)'Old + By'Length),
!      Global         => null;
  
     function Insert
       (Source   : Unbounded_String;
        Before   : Positive;
!       New_Item : String) return Unbounded_String
!    with
!      Pre    => Before - 1 <= Length (Source)
!                  and then New_Item'Length <= Natural'Last - Length (Source),
!      Post   => Length (Insert'Result) = Length (Source) + New_Item'Length,
!      Global => null;
  
     procedure Insert
       (Source   : in out Unbounded_String;
        Before   : Positive;
!       New_Item : String)
!    with
!      Pre    => Before - 1 <= Length (Source)
!                  and then New_Item'Length <= Natural'Last - Length (Source),
!      Post   => Length (Source) = Length (Source)'Old + New_Item'Length,
!      Global => null;
  
     function Overwrite
       (Source   : Unbounded_String;
        Position : Positive;
!       New_Item : String) return Unbounded_String
!    with
!      Pre    => Position - 1 <= Length (Source)
!                  and then (if New_Item'Length /= 0
!                            then
!                            New_Item'Length <= Natural'Last - (Position - 1)),
!      Post   =>
!        Length (Overwrite'Result)
!      = Natural'Max (Length (Source), Position - 1 + New_Item'Length),
!      Global => null;
  
     procedure Overwrite
       (Source   : in out Unbounded_String;
        Position : Positive;
!       New_Item : String)
!    with
!      Pre    => Position - 1 <= Length (Source)
!                  and then (if New_Item'Length /= 0
!                            then
!                            New_Item'Length <= Natural'Last - (Position - 1)),
!      Post   =>
!        Length (Source)
!      = Natural'Max (Length (Source)'Old, Position - 1 + New_Item'Length),
! 
!      Global => null;
  
     function Delete
       (Source  : Unbounded_String;
        From    : Positive;
!       Through : Natural) return Unbounded_String
!    with
!      Pre            => (if Through <= From then From - 1 <= Length (Source)),
!      Contract_Cases =>
!        (Through >= From =>
!           Length (Delete'Result) = Length (Source) - (Through - From + 1),
!         others          =>
!           Length (Delete'Result) = Length (Source)),
!      Global         => null;
  
     procedure Delete
       (Source  : in out Unbounded_String;
        From    : Positive;
!       Through : Natural)
!    with
!      Pre            => (if Through <= From then From - 1 <= Length (Source)),
!      Contract_Cases =>
!        (Through >= From =>
!           Length (Source) = Length (Source)'Old - (Through - From + 1),
!         others          =>
!           Length (Source) = Length (Source)'Old),
!      Global         => null;
  
     function Trim
       (Source : Unbounded_String;
!       Side   : Trim_End) return Unbounded_String
!    with
!      Post   => Length (Trim'Result) <= Length (Source),
!      Global => null;
  
     procedure Trim
       (Source : in out Unbounded_String;
!       Side   : Trim_End)
!    with
!      Post   => Length (Source) <= Length (Source)'Old,
!      Global => null;
  
     function Trim
       (Source : Unbounded_String;
        Left   : Maps.Character_Set;
!       Right  : Maps.Character_Set) return Unbounded_String
!    with
!      Post   => Length (Trim'Result) <= Length (Source),
!      Global => null;
  
     procedure Trim
       (Source : in out Unbounded_String;
        Left   : Maps.Character_Set;
!       Right  : Maps.Character_Set)
!    with
!      Post   => Length (Source) <= Length (Source)'Old,
!      Global => null;
  
     function Head
       (Source : Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space) return Unbounded_String
!    with
!      Post   => Length (Head'Result) = Count,
!      Global => null;
  
     procedure Head
       (Source : in out Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space)
!    with
!      Post   => Length (Source) = Count,
!      Global => null;
  
     function Tail
       (Source : Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space) return Unbounded_String
!    with
!      Post   => Length (Tail'Result) = Count,
!      Global => null;
  
     procedure Tail
       (Source : in out Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space)
!    with
!      Post   => Length (Source) = Count,
!      Global => null;
  
     function "*"
       (Left  : Natural;
!       Right : Character) return Unbounded_String
!    with
!      Pre    => Left <= Natural'Last,
!      Post   => Length ("*"'Result) = Left,
!      Global => null;
  
     function "*"
       (Left  : Natural;
!       Right : String) return Unbounded_String
!    with
!      Pre    => (if Left /= 0 then Right'Length <= Natural'Last / Left),
!      Post   => Length ("*"'Result) = Left * Right'Length,
!      Global => null;
  
     function "*"
       (Left  : Natural;
!       Right : Unbounded_String) return Unbounded_String
!    with
!      Pre    => (if Left /= 0 then Length (Right) <= Natural'Last / Left),
!      Post   => Length ("*"'Result) = Left * Length (Right),
!      Global => null;
! 
!    --  Each of the transformation functions (Replace_Slice, Insert, Overwrite,
!    --  Delete), selector functions (Trim, Head, Tail), and constructor
!    --  functions ("*") is likewise analogous to its corresponding subprogram in
!    --  Strings.Fixed. For each of the subprograms, the corresponding
!    --  fixed-length string subprogram is applied to the string represented by
!    --  the Unbounded_String parameter, and To_Unbounded_String is applied the
!    --  result string.
!    --
!    --  For each of the procedures Translate, Replace_Slice, Insert, Overwrite,
!    --  Delete, Trim, Head, and Tail, the resulting string represented by the
!    --  Source parameter is given by the corresponding function for fixed-length
!    --  strings applied to the string represented by Source's original value.
  
  private
     pragma Inline (Length);
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-strunb__shared.ads gcc-10.1.0/gcc/ada/libgnat/a-strunb__shared.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-strunb__shared.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-strunb__shared.ads	Thu May  7 10:49:59 2020
***************
*** 33,38 ****
--- 33,44 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
+ --  Preconditions in this unit are meant for analysis only, not for run-time
+ --  checking, so that the expected exceptions are raised. This is enforced by
+ --  setting the corresponding assertion policy to Ignore.
+ 
+ pragma Assertion_Policy (Pre => Ignore);
+ 
  --  This package provides an implementation of Ada.Strings.Unbounded that uses
  --  reference counts to implement copy on modification (rather than copy on
  --  assignment). This is significantly more efficient on many targets.
*************** with Ada.Strings.Maps;
*** 73,79 ****
  private with Ada.Finalization;
  private with System.Atomic_Counters;
  
! package Ada.Strings.Unbounded is
     pragma Preelaborate;
  
     type Unbounded_String is private;
--- 79,87 ----
  private with Ada.Finalization;
  private with System.Atomic_Counters;
  
! package Ada.Strings.Unbounded with
!   Initial_Condition => Length (Null_Unbounded_String) = 0
! is
     pragma Preelaborate;
  
     type Unbounded_String is private;
*************** package Ada.Strings.Unbounded is
*** 81,87 ****
  
     Null_Unbounded_String : constant Unbounded_String;
  
!    function Length (Source : Unbounded_String) return Natural;
  
     type String_Access is access all String;
  
--- 89,96 ----
  
     Null_Unbounded_String : constant Unbounded_String;
  
!    function Length (Source : Unbounded_String) return Natural with
!      Global => null;
  
     type String_Access is access all String;
  
*************** package Ada.Strings.Unbounded is
*** 92,227 ****
     --------------------------------------------------------
  
     function To_Unbounded_String
!      (Source : String)  return Unbounded_String;
  
     function To_Unbounded_String
!      (Length : Natural) return Unbounded_String;
  
!    function To_String (Source : Unbounded_String) return String;
  
     procedure Set_Unbounded_String
       (Target : out Unbounded_String;
!       Source : String);
     pragma Ada_05 (Set_Unbounded_String);
  
     procedure Append
       (Source   : in out Unbounded_String;
!       New_Item : Unbounded_String);
  
     procedure Append
       (Source   : in out Unbounded_String;
!       New_Item : String);
  
     procedure Append
       (Source   : in out Unbounded_String;
!       New_Item : Character);
  
     function "&"
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Unbounded_String;
  
     function "&"
       (Left  : Unbounded_String;
!       Right : String) return Unbounded_String;
  
     function "&"
       (Left  : String;
!       Right : Unbounded_String) return Unbounded_String;
  
     function "&"
       (Left  : Unbounded_String;
!       Right : Character) return Unbounded_String;
  
     function "&"
       (Left  : Character;
!       Right : Unbounded_String) return Unbounded_String;
  
     function Element
       (Source : Unbounded_String;
!       Index  : Positive) return Character;
  
     procedure Replace_Element
       (Source : in out Unbounded_String;
        Index  : Positive;
!       By     : Character);
  
     function Slice
       (Source : Unbounded_String;
        Low    : Positive;
!       High   : Natural) return String;
  
     function Unbounded_Slice
       (Source : Unbounded_String;
        Low    : Positive;
!       High   : Natural) return Unbounded_String;
     pragma Ada_05 (Unbounded_Slice);
  
     procedure Unbounded_Slice
       (Source : Unbounded_String;
        Target : out Unbounded_String;
        Low    : Positive;
!       High   : Natural);
     pragma Ada_05 (Unbounded_Slice);
  
     function "="
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean;
  
     function "="
       (Left  : Unbounded_String;
!       Right : String) return Boolean;
  
     function "="
       (Left  : String;
!       Right : Unbounded_String) return Boolean;
  
     function "<"
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean;
  
     function "<"
       (Left  : Unbounded_String;
!       Right : String) return Boolean;
  
     function "<"
       (Left  : String;
!       Right : Unbounded_String) return Boolean;
  
     function "<="
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean;
  
     function "<="
       (Left  : Unbounded_String;
!       Right : String) return Boolean;
  
     function "<="
       (Left  : String;
!       Right : Unbounded_String) return Boolean;
  
     function ">"
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean;
  
     function ">"
       (Left  : Unbounded_String;
!       Right : String) return Boolean;
  
     function ">"
       (Left  : String;
!       Right : Unbounded_String) return Boolean;
  
     function ">="
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean;
  
     function ">="
       (Left  : Unbounded_String;
!       Right : String) return Boolean;
  
     function ">="
       (Left  : String;
!       Right : Unbounded_String) return Boolean;
  
     ------------------------
     -- Search Subprograms --
--- 101,329 ----
     --------------------------------------------------------
  
     function To_Unbounded_String
!      (Source : String)  return Unbounded_String
!    with
!      Post   => Length (To_Unbounded_String'Result) = Source'Length,
!      Global => null;
  
     function To_Unbounded_String
!      (Length : Natural) return Unbounded_String
!    with
!      Post   =>
!        Ada.Strings.Unbounded.Length (To_Unbounded_String'Result) = Length,
!      Global => null;
  
!    function To_String (Source : Unbounded_String) return String with
!      Post   => To_String'Result'Length = Length (Source),
!      Global => null;
  
     procedure Set_Unbounded_String
       (Target : out Unbounded_String;
!       Source : String)
!    with
!      Global => null;
     pragma Ada_05 (Set_Unbounded_String);
  
     procedure Append
       (Source   : in out Unbounded_String;
!       New_Item : Unbounded_String)
!    with
!      Pre    => Length (New_Item) <= Natural'Last - Length (Source),
!      Post   => Length (Source) = Length (Source)'Old + Length (New_Item),
!      Global => null;
  
     procedure Append
       (Source   : in out Unbounded_String;
!       New_Item : String)
!    with
!      Pre    => New_Item'Length <= Natural'Last - Length (Source),
!      Post   => Length (Source) = Length (Source)'Old + New_Item'Length,
!      Global => null;
  
     procedure Append
       (Source   : in out Unbounded_String;
!       New_Item : Character)
!    with
!      Pre    => Length (Source) < Natural'Last,
!      Post   => Length (Source) = Length (Source)'Old + 1,
!      Global => null;
  
     function "&"
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Unbounded_String
!    with
!      Pre    => Length (Right) <= Natural'Last - Length (Left),
!      Post   => Length ("&"'Result) = Length (Left) + Length (Right),
!      Global => null;
  
     function "&"
       (Left  : Unbounded_String;
!       Right : String) return Unbounded_String
!    with
!      Pre    => Right'Length <= Natural'Last - Length (Left),
!      Post   => Length ("&"'Result) = Length (Left) + Right'Length,
!      Global => null;
  
     function "&"
       (Left  : String;
!       Right : Unbounded_String) return Unbounded_String
!    with
!      Pre    => Left'Length <= Natural'Last - Length (Right),
!      Post   => Length ("&"'Result) = Left'Length + Length (Right),
!      Global => null;
  
     function "&"
       (Left  : Unbounded_String;
!       Right : Character) return Unbounded_String
!    with
!      Pre    => Length (Left) < Natural'Last,
!      Post   => Length ("&"'Result) = Length (Left) + 1,
!      Global => null;
  
     function "&"
       (Left  : Character;
!       Right : Unbounded_String) return Unbounded_String
!    with
!      Pre    => Length (Right) < Natural'Last,
!      Post   => Length ("&"'Result) = Length (Right) + 1,
!      Global => null;
  
     function Element
       (Source : Unbounded_String;
!       Index  : Positive) return Character
!    with
!      Pre    => Index <= Length (Source),
!      Global => null;
  
     procedure Replace_Element
       (Source : in out Unbounded_String;
        Index  : Positive;
!       By     : Character)
!    with
!      Pre    => Index <= Length (Source),
!      Post   => Length (Source) = Length (Source)'Old,
!      Global => null;
  
     function Slice
       (Source : Unbounded_String;
        Low    : Positive;
!       High   : Natural) return String
!    with
!      Pre    => Low - 1 <= Length (Source) and then High <= Length (Source),
!      Post   => Slice'Result'Length = Natural'Max (0, High - Low + 1),
!      Global => null;
  
     function Unbounded_Slice
       (Source : Unbounded_String;
        Low    : Positive;
!       High   : Natural) return Unbounded_String
!    with
!      Pre    => Low - 1 <= Length (Source) and then High <= Length (Source),
!      Post   =>
!        Length (Unbounded_Slice'Result) = Natural'Max (0, High - Low + 1),
!      Global => null;
     pragma Ada_05 (Unbounded_Slice);
  
     procedure Unbounded_Slice
       (Source : Unbounded_String;
        Target : out Unbounded_String;
        Low    : Positive;
!       High   : Natural)
!    with
!      Pre    => Low - 1 <= Length (Source) and then High <= Length (Source),
!      Post   => Length (Target) = Natural'Max (0, High - Low + 1),
!      Global => null;
     pragma Ada_05 (Unbounded_Slice);
  
     function "="
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function "="
       (Left  : Unbounded_String;
!       Right : String) return Boolean
!    with
!      Global => null;
  
     function "="
       (Left  : String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function "<"
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function "<"
       (Left  : Unbounded_String;
!       Right : String) return Boolean
!    with
!      Global => null;
  
     function "<"
       (Left  : String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function "<="
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function "<="
       (Left  : Unbounded_String;
!       Right : String) return Boolean
!    with
!      Global => null;
  
     function "<="
       (Left  : String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function ">"
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function ">"
       (Left  : Unbounded_String;
!       Right : String) return Boolean
!    with
!      Global => null;
  
     function ">"
       (Left  : String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function ">="
       (Left  : Unbounded_String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     function ">="
       (Left  : Unbounded_String;
!       Right : String) return Boolean
!    with
!      Global => null;
  
     function ">="
       (Left  : String;
!       Right : Unbounded_String) return Boolean
!    with
!      Global => null;
  
     ------------------------
     -- Search Subprograms --
*************** package Ada.Strings.Unbounded is
*** 231,256 ****
       (Source  : Unbounded_String;
        Pattern : String;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural;
  
     function Index
       (Source  : Unbounded_String;
        Pattern : String;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping_Function) return Natural;
  
     function Index
       (Source : Unbounded_String;
        Set    : Maps.Character_Set;
        Test   : Membership := Inside;
!       Going  : Direction  := Forward) return Natural;
  
     function Index
       (Source  : Unbounded_String;
        Pattern : String;
        From    : Positive;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural;
     pragma Ada_05 (Index);
  
     function Index
--- 333,371 ----
       (Source  : Unbounded_String;
        Pattern : String;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural
!    with
!      Pre    => Pattern'Length /= 0,
!      Global => null;
  
     function Index
       (Source  : Unbounded_String;
        Pattern : String;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping_Function) return Natural
!    with
!      Pre    => Pattern'Length /= 0,
!      Global => null;
  
     function Index
       (Source : Unbounded_String;
        Set    : Maps.Character_Set;
        Test   : Membership := Inside;
!       Going  : Direction  := Forward) return Natural
!    with
!      Global => null;
  
     function Index
       (Source  : Unbounded_String;
        Pattern : String;
        From    : Positive;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural
!    with
!      Pre    => (if Length (Source) /= 0
!                 then From <= Length (Source))
!                        and then Pattern'Length /= 0,
!      Global => null;
     pragma Ada_05 (Index);
  
     function Index
*************** package Ada.Strings.Unbounded is
*** 258,264 ****
        Pattern : String;
        From    : Positive;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping_Function) return Natural;
     pragma Ada_05 (Index);
  
     function Index
--- 373,385 ----
        Pattern : String;
        From    : Positive;
        Going   : Direction := Forward;
!       Mapping : Maps.Character_Mapping_Function) return Natural
!    with
!      Pre    => (if Length (Source) /= 0
!                 then From <= Length (Source))
!                        and then Pattern'Length /= 0,
!      Global => null;
! 
     pragma Ada_05 (Index);
  
     function Index
*************** package Ada.Strings.Unbounded is
*** 266,297 ****
        Set     : Maps.Character_Set;
        From    : Positive;
        Test    : Membership := Inside;
!       Going   : Direction := Forward) return Natural;
     pragma Ada_05 (Index);
  
     function Index_Non_Blank
       (Source : Unbounded_String;
!       Going  : Direction := Forward) return Natural;
  
     function Index_Non_Blank
       (Source : Unbounded_String;
        From   : Positive;
!       Going  : Direction := Forward) return Natural;
     pragma Ada_05 (Index_Non_Blank);
  
     function Count
       (Source  : Unbounded_String;
        Pattern : String;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural;
  
     function Count
       (Source  : Unbounded_String;
        Pattern : String;
!       Mapping : Maps.Character_Mapping_Function) return Natural;
  
     function Count
       (Source : Unbounded_String;
!       Set    : Maps.Character_Set) return Natural;
  
     procedure Find_Token
       (Source : Unbounded_String;
--- 387,434 ----
        Set     : Maps.Character_Set;
        From    : Positive;
        Test    : Membership := Inside;
!       Going   : Direction := Forward) return Natural
!    with
!      Pre    => (if Length (Source) /= 0 then From <= Length (Source)),
!      Global => null;
     pragma Ada_05 (Index);
  
     function Index_Non_Blank
       (Source : Unbounded_String;
!       Going  : Direction := Forward) return Natural
!    with
!      Global => null;
  
     function Index_Non_Blank
       (Source : Unbounded_String;
        From   : Positive;
!       Going  : Direction := Forward) return Natural
!    with
!      Pre    => (if Length (Source) /= 0 then From <= Length (Source)),
!      Global => null;
     pragma Ada_05 (Index_Non_Blank);
  
     function Count
       (Source  : Unbounded_String;
        Pattern : String;
!       Mapping : Maps.Character_Mapping := Maps.Identity) return Natural
!    with
!      Pre    => Pattern'Length /= 0,
!      Global => null;
  
     function Count
       (Source  : Unbounded_String;
        Pattern : String;
!       Mapping : Maps.Character_Mapping_Function) return Natural
!    with
!      Pre    => Pattern'Length /= 0,
!      Global => null;
  
     function Count
       (Source : Unbounded_String;
!       Set    : Maps.Character_Set) return Natural
!    with
!      Global => null;
  
     procedure Find_Token
       (Source : Unbounded_String;
*************** package Ada.Strings.Unbounded is
*** 299,305 ****
        From   : Positive;
        Test   : Membership;
        First  : out Positive;
!       Last   : out Natural);
     pragma Ada_2012 (Find_Token);
  
     procedure Find_Token
--- 436,445 ----
        From   : Positive;
        Test   : Membership;
        First  : out Positive;
!       Last   : out Natural)
!    with
!      Pre    => (if Length (Source) /= 0 then From <= Length (Source)),
!      Global => null;
     pragma Ada_2012 (Find_Token);
  
     procedure Find_Token
*************** package Ada.Strings.Unbounded is
*** 307,313 ****
        Set    : Maps.Character_Set;
        Test   : Membership;
        First  : out Positive;
!       Last   : out Natural);
  
     ------------------------------------
     -- String Translation Subprograms --
--- 447,455 ----
        Set    : Maps.Character_Set;
        Test   : Membership;
        First  : out Positive;
!       Last   : out Natural)
!    with
!      Global => null;
  
     ------------------------------------
     -- String Translation Subprograms --
*************** package Ada.Strings.Unbounded is
*** 315,333 ****
  
     function Translate
       (Source  : Unbounded_String;
!       Mapping : Maps.Character_Mapping) return Unbounded_String;
  
     procedure Translate
       (Source  : in out Unbounded_String;
!       Mapping : Maps.Character_Mapping);
  
     function Translate
       (Source  : Unbounded_String;
!       Mapping : Maps.Character_Mapping_Function) return Unbounded_String;
  
     procedure Translate
       (Source  : in out Unbounded_String;
!       Mapping : Maps.Character_Mapping_Function);
  
     ---------------------------------------
     -- String Transformation Subprograms --
--- 457,487 ----
  
     function Translate
       (Source  : Unbounded_String;
!       Mapping : Maps.Character_Mapping) return Unbounded_String
!    with
!      Post   => Length (Translate'Result) = Length (Source),
!      Global => null;
  
     procedure Translate
       (Source  : in out Unbounded_String;
!       Mapping : Maps.Character_Mapping)
!    with
!      Post   => Length (Source) = Length (Source)'Old,
!      Global => null;
  
     function Translate
       (Source  : Unbounded_String;
!       Mapping : Maps.Character_Mapping_Function) return Unbounded_String
!    with
!      Post   => Length (Translate'Result) = Length (Source),
!      Global => null;
  
     procedure Translate
       (Source  : in out Unbounded_String;
!       Mapping : Maps.Character_Mapping_Function)
!    with
!      Post   => Length (Source) = Length (Source)'Old,
!      Global => null;
  
     ---------------------------------------
     -- String Transformation Subprograms --
*************** package Ada.Strings.Unbounded is
*** 337,429 ****
       (Source : Unbounded_String;
        Low    : Positive;
        High   : Natural;
!       By     : String) return Unbounded_String;
  
     procedure Replace_Slice
       (Source : in out Unbounded_String;
        Low    : Positive;
        High   : Natural;
!       By     : String);
  
     function Insert
       (Source   : Unbounded_String;
        Before   : Positive;
!       New_Item : String) return Unbounded_String;
  
     procedure Insert
       (Source   : in out Unbounded_String;
        Before   : Positive;
!       New_Item : String);
  
     function Overwrite
       (Source   : Unbounded_String;
        Position : Positive;
!       New_Item : String) return Unbounded_String;
  
     procedure Overwrite
       (Source   : in out Unbounded_String;
        Position : Positive;
!       New_Item : String);
  
     function Delete
       (Source  : Unbounded_String;
        From    : Positive;
!       Through : Natural) return Unbounded_String;
  
     procedure Delete
       (Source  : in out Unbounded_String;
        From    : Positive;
!       Through : Natural);
  
     function Trim
       (Source : Unbounded_String;
!       Side   : Trim_End) return Unbounded_String;
  
     procedure Trim
       (Source : in out Unbounded_String;
!       Side   : Trim_End);
  
     function Trim
       (Source : Unbounded_String;
        Left   : Maps.Character_Set;
!       Right  : Maps.Character_Set) return Unbounded_String;
  
     procedure Trim
       (Source : in out Unbounded_String;
        Left   : Maps.Character_Set;
!       Right  : Maps.Character_Set);
  
     function Head
       (Source : Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space) return Unbounded_String;
  
     procedure Head
       (Source : in out Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space);
  
     function Tail
       (Source : Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space) return Unbounded_String;
  
     procedure Tail
       (Source : in out Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space);
  
     function "*"
       (Left  : Natural;
!       Right : Character) return Unbounded_String;
  
     function "*"
       (Left  : Natural;
!       Right : String) return Unbounded_String;
  
     function "*"
       (Left  : Natural;
!       Right : Unbounded_String) return Unbounded_String;
  
  private
     pragma Inline (Length);
--- 491,694 ----
       (Source : Unbounded_String;
        Low    : Positive;
        High   : Natural;
!       By     : String) return Unbounded_String
!    with
!      Pre            =>
!        Low - 1 <= Length (Source)
!          and then (if High >= Low
!                    then Low - 1
!                      <= Natural'Last - By'Length
!                       - Natural'Max (Length (Source) - High, 0)
!                    else Length (Source) <= Natural'Last - By'Length),
!      Contract_Cases =>
!        (High >= Low =>
!           Length (Replace_Slice'Result)
!         = Low - 1 + By'Length + Natural'Max (Length (Source)'Old - High, 0),
!         others      =>
!           Length (Replace_Slice'Result) = Length (Source)'Old + By'Length),
!      Global         => null;
  
     procedure Replace_Slice
       (Source : in out Unbounded_String;
        Low    : Positive;
        High   : Natural;
!       By     : String)
!    with
!      Pre            =>
!        Low - 1 <= Length (Source)
!          and then (if High >= Low
!                    then Low - 1
!                      <= Natural'Last - By'Length
!                       - Natural'Max (Length (Source) - High, 0)
!                    else Length (Source) <= Natural'Last - By'Length),
!      Contract_Cases =>
!        (High >= Low =>
!           Length (Source)
!         = Low - 1 + By'Length + Natural'Max (Length (Source)'Old - High, 0),
!         others      =>
!           Length (Source) = Length (Source)'Old + By'Length),
!      Global         => null;
  
     function Insert
       (Source   : Unbounded_String;
        Before   : Positive;
!       New_Item : String) return Unbounded_String
!    with
!      Pre    => Before - 1 <= Length (Source)
!                  and then New_Item'Length <= Natural'Last - Length (Source),
!      Post   => Length (Insert'Result) = Length (Source) + New_Item'Length,
!      Global => null;
  
     procedure Insert
       (Source   : in out Unbounded_String;
        Before   : Positive;
!       New_Item : String)
!    with
!      Pre    => Before - 1 <= Length (Source)
!                  and then New_Item'Length <= Natural'Last - Length (Source),
!      Post   => Length (Source) = Length (Source)'Old + New_Item'Length,
!      Global => null;
  
     function Overwrite
       (Source   : Unbounded_String;
        Position : Positive;
!       New_Item : String) return Unbounded_String
!    with
!      Pre    => Position - 1 <= Length (Source)
!                  and then (if New_Item'Length /= 0
!                            then
!                              New_Item'Length <= Natural'Last - (Position - 1)),
!      Post   =>
!        Length (Overwrite'Result)
!      = Natural'Max (Length (Source), Position - 1 + New_Item'Length),
!      Global => null;
  
     procedure Overwrite
       (Source   : in out Unbounded_String;
        Position : Positive;
!       New_Item : String)
!    with
!      Pre    => Position - 1 <= Length (Source)
!                  and then (if New_Item'Length /= 0
!                            then
!                              New_Item'Length <= Natural'Last - (Position - 1)),
!      Post   =>
!        Length (Source)
!      = Natural'Max (Length (Source)'Old, Position - 1 + New_Item'Length),
! 
!      Global => null;
  
     function Delete
       (Source  : Unbounded_String;
        From    : Positive;
!       Through : Natural) return Unbounded_String
!    with
!      Pre            => (if Through <= From then From - 1 <= Length (Source)),
!      Contract_Cases =>
!        (Through >= From =>
!           Length (Delete'Result) = Length (Source) - (Through - From + 1),
!         others          =>
!           Length (Delete'Result) = Length (Source)),
!      Global         => null;
  
     procedure Delete
       (Source  : in out Unbounded_String;
        From    : Positive;
!       Through : Natural)
!    with
!      Pre            => (if Through <= From then From - 1 <= Length (Source)),
!      Contract_Cases =>
!        (Through >= From =>
!           Length (Source) = Length (Source)'Old - (Through - From + 1),
!         others          =>
!           Length (Source) = Length (Source)'Old),
!      Global         => null;
  
     function Trim
       (Source : Unbounded_String;
!       Side   : Trim_End) return Unbounded_String
!    with
!      Post   => Length (Trim'Result) <= Length (Source),
!      Global => null;
  
     procedure Trim
       (Source : in out Unbounded_String;
!       Side   : Trim_End)
!    with
!      Post   => Length (Source) <= Length (Source)'Old,
!      Global => null;
  
     function Trim
       (Source : Unbounded_String;
        Left   : Maps.Character_Set;
!       Right  : Maps.Character_Set) return Unbounded_String
!    with
!      Post   => Length (Trim'Result) <= Length (Source),
!      Global => null;
  
     procedure Trim
       (Source : in out Unbounded_String;
        Left   : Maps.Character_Set;
!       Right  : Maps.Character_Set)
!    with
!      Post   => Length (Source) <= Length (Source)'Old,
!      Global => null;
  
     function Head
       (Source : Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space) return Unbounded_String
!    with
!      Post   => Length (Head'Result) = Count,
!      Global => null;
  
     procedure Head
       (Source : in out Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space)
!    with
!      Post   => Length (Source) = Count,
!      Global => null;
  
     function Tail
       (Source : Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space) return Unbounded_String
!    with
!      Post   => Length (Tail'Result) = Count,
!      Global => null;
  
     procedure Tail
       (Source : in out Unbounded_String;
        Count  : Natural;
!       Pad    : Character := Space)
!    with
!      Post   => Length (Source) = Count,
!      Global => null;
  
     function "*"
       (Left  : Natural;
!       Right : Character) return Unbounded_String
!    with
!      Pre    => Left <= Natural'Last,
!      Post   => Length ("*"'Result) = Left,
!      Global => null;
  
     function "*"
       (Left  : Natural;
!       Right : String) return Unbounded_String
!    with
!      Pre    => (if Left /= 0 then Right'Length <= Natural'Last / Left),
!      Post   => Length ("*"'Result) = Left * Right'Length,
!      Global => null;
  
     function "*"
       (Left  : Natural;
!       Right : Unbounded_String) return Unbounded_String
!    with
!      Pre    => (if Left /= 0 then Length (Right) <= Natural'Last / Left),
!      Post   => Length ("*"'Result) = Left * Length (Right),
!      Global => null;
  
  private
     pragma Inline (Length);
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-ststio.ads gcc-10.1.0/gcc/ada/libgnat/a-ststio.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-ststio.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-ststio.ads	Thu May  7 10:49:59 2020
*************** package Ada.Streams.Stream_IO is
*** 42,47 ****
--- 42,48 ----
     type Stream_Access is access all Root_Stream_Type'Class;
  
     type File_Type is limited private with Default_Initial_Condition;
+    pragma Preelaborable_Initialization (File_Type);
  
     type File_Mode is (In_File, Out_File, Append_File);
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-textio.adb gcc-10.1.0/gcc/ada/libgnat/a-textio.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-textio.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-textio.adb	Thu May  7 10:49:59 2020
*************** with Ada.Unchecked_Deallocation;
*** 43,49 ****
  pragma Elaborate_All (System.File_IO);
  --  Needed because of calls to Chain_File in package body elaboration
  
! package body Ada.Text_IO is
  
     package FIO renames System.File_IO;
  
--- 43,60 ----
  pragma Elaborate_All (System.File_IO);
  --  Needed because of calls to Chain_File in package body elaboration
  
! package body Ada.Text_IO with
!   Refined_State => (File_System => (Standard_In,
!                                     Standard_Out,
!                                     Standard_Err,
!                                     Current_In,
!                                     Current_Out,
!                                     Current_Err,
!                                     In_Name,
!                                     Out_Name,
!                                     Err_Name,
!                                     WC_Encoding))
! is
  
     package FIO renames System.File_IO;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-textio.ads gcc-10.1.0/gcc/ada/libgnat/a-textio.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-textio.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-textio.ads	Thu May  7 10:49:59 2020
***************
*** 33,38 ****
--- 33,46 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
+ --  Preconditions in this unit are meant for analysis only, not for run-time
+ --  checking, so that the expected exceptions are raised. This is enforced by
+ --  setting the corresponding assertion policy to Ignore. These preconditions
+ --  are partial and protect against Status_Error, Mode_Error, and Layout_Error,
+ --  but not against other types of errors.
+ 
+ pragma Assertion_Policy (Pre => Ignore);
+ 
  --  Note: the generic subpackages of Text_IO (Integer_IO, Float_IO, Fixed_IO,
  --  Modular_IO, Decimal_IO and Enumeration_IO) appear as private children in
  --  GNAT. These children are with'ed automatically if they are referenced, so
*************** with System;
*** 46,55 ****
  with System.File_Control_Block;
  with System.WCh_Con;
  
! package Ada.Text_IO is
     pragma Elaborate_Body;
  
!    type File_Type is limited private with Default_Initial_Condition;
     type File_Mode is (In_File, Out_File, Append_File);
  
     --  The following representation clause allows the use of unchecked
--- 54,68 ----
  with System.File_Control_Block;
  with System.WCh_Con;
  
! package Ada.Text_IO with
!   Abstract_State    => (File_System),
!   Initializes       => (File_System),
!   Initial_Condition => Line_Length = 0 and Page_Length = 0
! is
     pragma Elaborate_Body;
  
!    type File_Type is limited private with
!      Default_Initial_Condition => (not Is_Open (File_Type));
     type File_Mode is (In_File, Out_File, Append_File);
  
     --  The following representation clause allows the use of unchecked
*************** package Ada.Text_IO is
*** 87,136 ****
       (File : in out File_Type;
        Mode : File_Mode := Out_File;
        Name : String := "";
!       Form : String := "");
  
     procedure Open
       (File : in out File_Type;
        Mode : File_Mode;
        Name : String;
!       Form : String := "");
  
!    procedure Close  (File : in out File_Type);
!    procedure Delete (File : in out File_Type);
!    procedure Reset  (File : in out File_Type; Mode : File_Mode);
!    procedure Reset  (File : in out File_Type);
  
!    function Mode (File : File_Type) return File_Mode;
!    function Name (File : File_Type) return String;
!    function Form (File : File_Type) return String;
  
!    function Is_Open (File : File_Type) return Boolean;
  
     ------------------------------------------------------
     -- Control of default input, output and error files --
     ------------------------------------------------------
  
!    procedure Set_Input  (File : File_Type);
!    procedure Set_Output (File : File_Type);
!    procedure Set_Error  (File : File_Type);
  
!    function Standard_Input  return File_Type;
!    function Standard_Output return File_Type;
!    function Standard_Error  return File_Type;
  
!    function Current_Input  return File_Type;
!    function Current_Output return File_Type;
!    function Current_Error  return File_Type;
  
     type File_Access is access constant File_Type;
  
!    function Standard_Input  return File_Access;
!    function Standard_Output return File_Access;
!    function Standard_Error  return File_Access;
  
!    function Current_Input  return File_Access;
!    function Current_Output return File_Access;
!    function Current_Error  return File_Access;
  
     --------------------
     -- Buffer control --
--- 100,196 ----
       (File : in out File_Type;
        Mode : File_Mode := Out_File;
        Name : String := "";
!       Form : String := "")
!    with
!      Pre    => not Is_Open (File),
!      Post   =>
!        Is_Open (File)
!        and then Ada.Text_IO.Mode (File) = Mode
!        and then (if Mode /= In_File
!                    then (Line_Length (File) = 0
!                          and then Page_Length (File) = 0)),
!      Global => (In_Out => File_System);
  
     procedure Open
       (File : in out File_Type;
        Mode : File_Mode;
        Name : String;
!       Form : String := "")
!    with
!      Pre    => not Is_Open (File),
!      Post   =>
!       Is_Open (File)
!       and then Ada.Text_IO.Mode (File) = Mode
!       and then (if Mode /= In_File
!                   then (Line_Length (File) = 0
!                         and then Page_Length (File) = 0)),
!      Global => (In_Out => File_System);
  
!    procedure Close  (File : in out File_Type) with
!      Pre    => Is_Open (File),
!      Post   => not Is_Open (File),
!      Global => (In_Out => File_System);
!    procedure Delete (File : in out File_Type) with
!      Pre    => Is_Open (File),
!      Post   => not Is_Open (File),
!      Global => (In_Out => File_System);
!    procedure Reset  (File : in out File_Type; Mode : File_Mode) with
!      Pre    => Is_Open (File),
!      Post   =>
!        Is_Open (File)
!        and then Ada.Text_IO.Mode (File) = Mode
!        and then (if Mode /= In_File
!                    then (Line_Length (File) = 0
!                          and then Page_Length (File) = 0)),
!      Global => (In_Out => File_System);
!    procedure Reset  (File : in out File_Type) with
!      Pre    => Is_Open (File),
!      Post   =>
!        Is_Open (File)
!        and Mode (File)'Old = Mode (File)
!        and (if Mode (File) /= In_File
!                 then (Line_Length (File) = 0
!                       and then Page_Length (File) = 0)),
!      Global => (In_Out => File_System);
  
!    function Mode (File : File_Type) return File_Mode with
!      Pre    => Is_Open (File),
!      Global => null;
!    function Name (File : File_Type) return String with
!      Pre    => Is_Open (File),
!      Global => null;
!    function Form (File : File_Type) return String with
!      Pre    => Is_Open (File),
!      Global => null;
  
!    function Is_Open (File : File_Type) return Boolean with
!      Global => null;
  
     ------------------------------------------------------
     -- Control of default input, output and error files --
     ------------------------------------------------------
  
!    procedure Set_Input  (File : File_Type) with SPARK_Mode => Off;
!    procedure Set_Output (File : File_Type) with SPARK_Mode => Off;
!    procedure Set_Error  (File : File_Type) with SPARK_Mode => Off;
  
!    function Standard_Input  return File_Type with SPARK_Mode => Off;
!    function Standard_Output return File_Type with SPARK_Mode => Off;
!    function Standard_Error  return File_Type with SPARK_Mode => Off;
  
!    function Current_Input  return File_Type with SPARK_Mode => Off;
!    function Current_Output return File_Type with SPARK_Mode => Off;
!    function Current_Error  return File_Type with SPARK_Mode => Off;
  
     type File_Access is access constant File_Type;
  
!    function Standard_Input  return File_Access with SPARK_Mode => Off;
!    function Standard_Output return File_Access with SPARK_Mode => Off;
!    function Standard_Error  return File_Access with SPARK_Mode => Off;
  
!    function Current_Input  return File_Access with SPARK_Mode => Off;
!    function Current_Output return File_Access with SPARK_Mode => Off;
!    function Current_Error  return File_Access with SPARK_Mode => Off;
  
     --------------------
     -- Buffer control --
*************** package Ada.Text_IO is
*** 139,267 ****
     --  Note: The parameter file is IN OUT in the RM, but this is clearly
     --  an oversight, and was intended to be IN, see AI95-00057.
  
!    procedure Flush (File : File_Type);
!    procedure Flush;
  
     --------------------------------------------
     -- Specification of line and page lengths --
     --------------------------------------------
  
!    procedure Set_Line_Length (File : File_Type; To : Count);
!    procedure Set_Line_Length (To : Count);
  
!    procedure Set_Page_Length (File : File_Type; To : Count);
!    procedure Set_Page_Length (To : Count);
  
!    function Line_Length (File : File_Type) return Count;
!    function Line_Length return Count;
  
!    function Page_Length (File : File_Type) return Count;
!    function Page_Length return Count;
  
     ------------------------------------
     -- Column, Line, and Page Control --
     ------------------------------------
  
!    procedure New_Line (File : File_Type; Spacing : Positive_Count := 1);
!    procedure New_Line (Spacing : Positive_Count := 1);
  
!    procedure Skip_Line (File : File_Type; Spacing : Positive_Count := 1);
!    procedure Skip_Line (Spacing : Positive_Count := 1);
  
!    function End_Of_Line (File : File_Type) return Boolean;
!    function End_Of_Line return Boolean;
  
!    procedure New_Page (File : File_Type);
!    procedure New_Page;
  
!    procedure Skip_Page (File : File_Type);
!    procedure Skip_Page;
  
!    function End_Of_Page (File : File_Type) return Boolean;
!    function End_Of_Page return Boolean;
  
!    function End_Of_File (File : File_Type) return Boolean;
!    function End_Of_File return Boolean;
  
!    procedure Set_Col (File : File_Type;  To : Positive_Count);
!    procedure Set_Col (To : Positive_Count);
  
!    procedure Set_Line (File : File_Type; To : Positive_Count);
!    procedure Set_Line (To : Positive_Count);
  
!    function Col (File : File_Type) return Positive_Count;
!    function Col return Positive_Count;
  
!    function Line (File : File_Type) return Positive_Count;
!    function Line return Positive_Count;
  
!    function Page (File : File_Type) return Positive_Count;
!    function Page return Positive_Count;
  
     ----------------------------
     -- Character Input-Output --
     ----------------------------
  
!    procedure Get (File : File_Type; Item : out Character);
!    procedure Get (Item : out Character);
!    procedure Put (File : File_Type; Item : Character);
!    procedure Put (Item : Character);
  
     procedure Look_Ahead
       (File        : File_Type;
        Item        : out Character;
!       End_Of_Line : out Boolean);
  
     procedure Look_Ahead
       (Item        : out Character;
!       End_Of_Line : out Boolean);
  
     procedure Get_Immediate
       (File : File_Type;
!       Item : out Character);
  
     procedure Get_Immediate
!      (Item : out Character);
  
     procedure Get_Immediate
       (File      : File_Type;
        Item      : out Character;
!       Available : out Boolean);
  
     procedure Get_Immediate
       (Item      : out Character;
!       Available : out Boolean);
  
     -------------------------
     -- String Input-Output --
     -------------------------
  
!    procedure Get (File : File_Type; Item : out String);
!    procedure Get (Item : out String);
!    procedure Put (File : File_Type; Item : String);
!    procedure Put (Item : String);
  
     procedure Get_Line
       (File : File_Type;
        Item : out String;
!       Last : out Natural);
  
     procedure Get_Line
       (Item : out String;
!       Last : out Natural);
  
!    function Get_Line (File : File_Type) return String;
     pragma Ada_05 (Get_Line);
  
!    function Get_Line return String;
     pragma Ada_05 (Get_Line);
  
     procedure Put_Line
       (File : File_Type;
!       Item : String);
  
     procedure Put_Line
!      (Item : String);
  
     ---------------------------------------
     -- Generic packages for Input-Output --
--- 199,517 ----
     --  Note: The parameter file is IN OUT in the RM, but this is clearly
     --  an oversight, and was intended to be IN, see AI95-00057.
  
!    procedure Flush (File : File_Type) with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Post   =>
!        Line_Length (File)'Old = Line_Length (File)
!        and Page_Length (File)'Old = Page_Length (File),
!      Global => (In_Out => File_System);
!    procedure Flush with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     --------------------------------------------
     -- Specification of line and page lengths --
     --------------------------------------------
  
!    procedure Set_Line_Length (File : File_Type; To : Count) with
!      Pre    => Is_Open (File)  and then Mode (File) /= In_File,
!      Post   =>
!        Line_Length (File) = To
!        and Page_Length (File)'Old = Page_Length (File),
!      Global => (In_Out => File_System);
!    procedure Set_Line_Length (To : Count) with
!      Post   =>
!        Line_Length = To
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
!    procedure Set_Page_Length (File : File_Type; To : Count) with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Post   =>
!        Page_Length (File) = To
!        and Line_Length (File)'Old = Line_Length (File),
!      Global => (In_Out => File_System);
!    procedure Set_Page_Length (To : Count) with
!      Post   =>
!        Page_Length = To
!        and Line_Length'Old = Line_Length,
!      Global => (In_Out => File_System);
  
!    function Line_Length (File : File_Type) return Count with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Global => (Input => File_System);
!    function Line_Length return Count with
!      Global => (Input => File_System);
  
!    function Page_Length (File : File_Type) return Count with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Global => (Input => File_System);
!    function Page_Length return Count with
!      Global => (Input => File_System);
  
     ------------------------------------
     -- Column, Line, and Page Control --
     ------------------------------------
  
!    procedure New_Line (File : File_Type; Spacing : Positive_Count := 1) with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Post   =>
!        Line_Length (File)'Old = Line_Length (File)
!        and Page_Length (File)'Old = Page_Length (File),
!      Global => (In_Out => File_System);
!    procedure New_Line (Spacing : Positive_Count := 1) with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
!    procedure Skip_Line (File : File_Type; Spacing : Positive_Count := 1) with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (In_Out => File_System);
!    procedure Skip_Line (Spacing : Positive_Count := 1) with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
!    function End_Of_Line (File : File_Type) return Boolean with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (Input => File_System);
!    function End_Of_Line return Boolean with
!      Global => (Input => File_System);
  
!    procedure New_Page (File : File_Type) with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Post   =>
!        Line_Length (File)'Old = Line_Length (File)
!        and Page_Length (File)'Old = Page_Length (File),
!      Global => (In_Out => File_System);
!    procedure New_Page with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
!    procedure Skip_Page (File : File_Type) with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (In_Out => File_System);
!    procedure Skip_Page with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
!    function End_Of_Page (File : File_Type) return Boolean with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (Input => File_System);
!    function End_Of_Page return Boolean with
!      Global => (Input => File_System);
  
!    function End_Of_File (File : File_Type) return Boolean with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (Input => File_System);
!    function End_Of_File return Boolean with
!      Global => (Input => File_System);
  
!    procedure Set_Col (File : File_Type;  To : Positive_Count) with
!      Pre            =>
!        Is_Open (File)
!        and then (if Mode (File) /= In_File
!                      then (Line_Length (File) = 0
!                            or else To <= Line_Length (File))),
!      Contract_Cases =>
!        (Mode (File) /= In_File =>
!               Line_Length (File)'Old = Line_Length (File)
!               and Page_Length (File)'Old = Page_Length (File),
!         others                 => True),
!      Global         => (In_Out => File_System);
!    procedure Set_Col (To : Positive_Count) with
!      Pre    => Line_Length = 0 or To <= Line_Length,
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
!    procedure Set_Line (File : File_Type; To : Positive_Count) with
!      Pre            =>
!        Is_Open (File)
!        and then (if Mode (File) /= In_File
!                      then (Page_Length (File) = 0
!                            or else To <= Page_Length (File))),
!      Contract_Cases =>
!        (Mode (File) /= In_File =>
!               Line_Length (File)'Old = Line_Length (File)
!               and Page_Length (File)'Old = Page_Length (File),
!         others                 => True),
!      Global         => (In_Out => File_System);
!    procedure Set_Line (To : Positive_Count) with
!      Pre    => Page_Length = 0 or To <= Page_Length,
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
!    function Col (File : File_Type) return Positive_Count with
!      Pre    => Is_Open (File),
!      Global => (Input => File_System);
!    function Col return Positive_Count with
!      Global => (Input => File_System);
  
!    function Line (File : File_Type) return Positive_Count with
!      Pre    => Is_Open (File),
!      Global => (Input => File_System);
!    function Line return Positive_Count with
!      Global => (Input => File_System);
  
!    function Page (File : File_Type) return Positive_Count with
!      Pre => Is_Open (File),
!      Global => (Input => File_System);
!    function Page return Positive_Count with
!      Global => (Input => File_System);
  
     ----------------------------
     -- Character Input-Output --
     ----------------------------
  
!    procedure Get (File : File_Type; Item : out Character) with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (In_Out => File_System);
!    procedure Get (Item : out Character) with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
!    procedure Put (File : File_Type; Item : Character) with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Post   =>
!        Line_Length (File)'Old = Line_Length (File)
!        and Page_Length (File)'Old = Page_Length (File),
!      Global => (In_Out => File_System);
!    procedure Put (Item : Character) with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Look_Ahead
       (File        : File_Type;
        Item        : out Character;
!       End_Of_Line : out Boolean)
!    with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (Input => File_System);
  
     procedure Look_Ahead
       (Item        : out Character;
!       End_Of_Line : out Boolean)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (Input => File_System);
  
     procedure Get_Immediate
       (File : File_Type;
!       Item : out Character)
!    with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (In_Out => File_System);
  
     procedure Get_Immediate
!      (Item : out Character)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Get_Immediate
       (File      : File_Type;
        Item      : out Character;
!       Available : out Boolean)
!    with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (In_Out => File_System);
  
     procedure Get_Immediate
       (Item      : out Character;
!       Available : out Boolean)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     -------------------------
     -- String Input-Output --
     -------------------------
  
!    procedure Get (File : File_Type; Item : out String) with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (In_Out => File_System);
!    procedure Get (Item : out String) with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
!    procedure Put (File : File_Type; Item : String) with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Post   =>
!        Line_Length (File)'Old = Line_Length (File)
!        and Page_Length (File)'Old = Page_Length (File),
!      Global => (In_Out => File_System);
!    procedure Put (Item : String) with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Get_Line
       (File : File_Type;
        Item : out String;
!       Last : out Natural)
!    with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Post   => (if Item'Length > 0 then Last in Item'First - 1 .. Item'Last
!                else Last = Item'First - 1),
!      Global => (In_Out => File_System);
  
     procedure Get_Line
       (Item : out String;
!       Last : out Natural)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length
!        and (if Item'Length > 0 then Last in Item'First - 1 .. Item'Last
!             else Last = Item'First - 1),
!      Global => (In_Out => File_System);
  
!    function Get_Line (File : File_Type) return String with SPARK_Mode => Off;
     pragma Ada_05 (Get_Line);
  
!    function Get_Line return String with SPARK_Mode => Off;
     pragma Ada_05 (Get_Line);
  
     procedure Put_Line
       (File : File_Type;
!       Item : String)
!    with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Post   =>
!        Line_Length (File)'Old = Line_Length (File)
!        and Page_Length (File)'Old = Page_Length (File),
!      Global => (In_Out => File_System);
  
     procedure Put_Line
!      (Item : String)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     ---------------------------------------
     -- Generic packages for Input-Output --
*************** private
*** 447,460 ****
     Standard_Out_AFCB : aliased Text_AFCB;
     Standard_Err_AFCB : aliased Text_AFCB;
  
!    Standard_In  : aliased File_Type := Standard_In_AFCB'Access;
!    Standard_Out : aliased File_Type := Standard_Out_AFCB'Access;
!    Standard_Err : aliased File_Type := Standard_Err_AFCB'Access;
     --  Standard files
  
!    Current_In   : aliased File_Type := Standard_In;
!    Current_Out  : aliased File_Type := Standard_Out;
!    Current_Err  : aliased File_Type := Standard_Err;
     --  Current files
  
     function EOF_Char return Integer;
--- 697,716 ----
     Standard_Out_AFCB : aliased Text_AFCB;
     Standard_Err_AFCB : aliased Text_AFCB;
  
!    Standard_In  : aliased File_Type := Standard_In_AFCB'Access with
!      Part_Of => File_System;
!    Standard_Out : aliased File_Type := Standard_Out_AFCB'Access with
!      Part_Of => File_System;
!    Standard_Err : aliased File_Type := Standard_Err_AFCB'Access with
!      Part_Of => File_System;
     --  Standard files
  
!    Current_In   : aliased File_Type := Standard_In with
!      Part_Of => File_System;
!    Current_Out  : aliased File_Type := Standard_Out with
!      Part_Of => File_System;
!    Current_Err  : aliased File_Type := Standard_Err with
!      Part_Of => File_System;
     --  Current files
  
     function EOF_Char return Integer;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-tideio.ads gcc-10.1.0/gcc/ada/libgnat/a-tideio.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-tideio.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-tideio.ads	Thu May  7 10:49:59 2020
*************** package Ada.Text_IO.Decimal_IO is
*** 52,86 ****
     procedure Get
       (File  : File_Type;
        Item  : out Num;
!       Width : Field := 0);
  
     procedure Get
       (Item  : out Num;
!       Width : Field := 0);
  
     procedure Put
       (File : File_Type;
        Item : Num;
        Fore : Field := Default_Fore;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp);
  
     procedure Put
       (Item : Num;
        Fore : Field := Default_Fore;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp);
  
     procedure Get
       (From : String;
        Item : out Num;
!       Last : out Positive);
  
     procedure Put
       (To   : out String;
        Item : Num;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp);
  
  private
     pragma Inline (Get);
--- 52,109 ----
     procedure Get
       (File  : File_Type;
        Item  : out Num;
!       Width : Field := 0)
!    with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (In_Out => File_System);
  
     procedure Get
       (Item  : out Num;
!       Width : Field := 0)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Put
       (File : File_Type;
        Item : Num;
        Fore : Field := Default_Fore;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp)
!    with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Post   =>
!        Line_Length (File)'Old = Line_Length (File)
!        and Page_Length (File)'Old = Page_Length (File),
!      Global => (In_Out => File_System);
  
     procedure Put
       (Item : Num;
        Fore : Field := Default_Fore;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Get
       (From : String;
        Item : out Num;
!       Last : out Positive)
!    with
!      Global => null;
  
     procedure Put
       (To   : out String;
        Item : Num;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp)
!    with
!      Global => null;
  
  private
     pragma Inline (Get);
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-tienio.ads gcc-10.1.0/gcc/ada/libgnat/a-tienio.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-tienio.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-tienio.ads	Thu May  7 10:49:59 2020
*************** package Ada.Text_IO.Enumeration_IO is
*** 28,55 ****
     Default_Width : Field := 0;
     Default_Setting : Type_Set := Upper_Case;
  
!    procedure Get (File : File_Type; Item : out Enum);
!    procedure Get (Item : out Enum);
  
     procedure Put
       (File  : File_Type;
        Item  : Enum;
        Width : Field := Default_Width;
!       Set   : Type_Set := Default_Setting);
  
     procedure Put
       (Item  : Enum;
        Width : Field := Default_Width;
!       Set   : Type_Set := Default_Setting);
  
     procedure Get
       (From : String;
        Item : out Enum;
!       Last : out Positive);
  
     procedure Put
       (To   : out String;
        Item : Enum;
!       Set  : Type_Set := Default_Setting);
  
  end Ada.Text_IO.Enumeration_IO;
--- 28,76 ----
     Default_Width : Field := 0;
     Default_Setting : Type_Set := Upper_Case;
  
!    procedure Get (File : File_Type; Item : out Enum) with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (In_Out => File_System);
!    procedure Get (Item : out Enum) with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Put
       (File  : File_Type;
        Item  : Enum;
        Width : Field := Default_Width;
!       Set   : Type_Set := Default_Setting)
!    with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Post   =>
!        Line_Length (File)'Old = Line_Length (File)
!        and Page_Length (File)'Old = Page_Length (File),
!      Global => (In_Out => File_System);
  
     procedure Put
       (Item  : Enum;
        Width : Field := Default_Width;
!       Set   : Type_Set := Default_Setting)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Get
       (From : String;
        Item : out Enum;
!       Last : out Positive)
!    with
!      Global => null;
  
     procedure Put
       (To   : out String;
        Item : Enum;
!       Set  : Type_Set := Default_Setting)
!    with
!      Global => null;
  
  end Ada.Text_IO.Enumeration_IO;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-tifiio.adb gcc-10.1.0/gcc/ada/libgnat/a-tifiio.adb
*** gcc-9.3.0/gcc/ada/libgnat/a-tifiio.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-tifiio.adb	Thu May  7 10:49:59 2020
*************** package body Ada.Text_IO.Fixed_IO is
*** 560,566 ****
           E       : Integer)
        is
           pragma Assert (E >= -Max_Digits);
!          AA : constant Field := E + A;
           N  : constant Natural := (AA + Max_Digits - 1) / Max_Digits + 1;
  
           Q  : array (0 .. N - 1) of Int64 := (others => 0);
--- 560,566 ----
           E       : Integer)
        is
           pragma Assert (E >= -Max_Digits);
!          AA : constant Field := Integer'Max (E + A, 0);
           N  : constant Natural := (AA + Max_Digits - 1) / Max_Digits + 1;
  
           Q  : array (0 .. N - 1) of Int64 := (others => 0);
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-tifiio.ads gcc-10.1.0/gcc/ada/libgnat/a-tifiio.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-tifiio.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-tifiio.ads	Thu May  7 10:49:59 2020
*************** package Ada.Text_IO.Fixed_IO is
*** 32,66 ****
     procedure Get
       (File  : File_Type;
        Item  : out Num;
!       Width : Field := 0);
  
     procedure Get
       (Item  : out Num;
!       Width : Field := 0);
  
     procedure Put
       (File : File_Type;
        Item : Num;
        Fore : Field := Default_Fore;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp);
  
     procedure Put
       (Item : Num;
        Fore : Field := Default_Fore;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp);
  
     procedure Get
       (From : String;
        Item : out Num;
!       Last : out Positive);
  
     procedure Put
       (To   : out String;
        Item : Num;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp);
  
  private
     pragma Inline (Get);
--- 32,89 ----
     procedure Get
       (File  : File_Type;
        Item  : out Num;
!       Width : Field := 0)
!    with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (In_Out => File_System);
  
     procedure Get
       (Item  : out Num;
!       Width : Field := 0)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Put
       (File : File_Type;
        Item : Num;
        Fore : Field := Default_Fore;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp)
!    with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Post   =>
!        Line_Length (File)'Old = Line_Length (File)
!        and Page_Length (File)'Old = Page_Length (File),
!      Global => (In_Out => File_System);
  
     procedure Put
       (Item : Num;
        Fore : Field := Default_Fore;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Get
       (From : String;
        Item : out Num;
!       Last : out Positive)
!    with
!      Global => null;
  
     procedure Put
       (To   : out String;
        Item : Num;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp)
!    with
!      Global => null;
  
  private
     pragma Inline (Get);
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-tiflio.ads gcc-10.1.0/gcc/ada/libgnat/a-tiflio.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-tiflio.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-tiflio.ads	Thu May  7 10:49:59 2020
*************** package Ada.Text_IO.Float_IO is
*** 52,86 ****
     procedure Get
       (File  : File_Type;
        Item  : out Num;
!       Width : Field := 0);
  
     procedure Get
       (Item  : out Num;
!       Width : Field := 0);
  
     procedure Put
       (File : File_Type;
        Item : Num;
        Fore : Field := Default_Fore;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp);
  
     procedure Put
       (Item : Num;
        Fore : Field := Default_Fore;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp);
  
     procedure Get
       (From : String;
        Item : out Num;
!       Last : out Positive);
  
     procedure Put
       (To   : out String;
        Item : Num;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp);
  
  private
     pragma Inline (Get);
--- 52,109 ----
     procedure Get
       (File  : File_Type;
        Item  : out Num;
!       Width : Field := 0)
!    with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (In_Out => File_System);
  
     procedure Get
       (Item  : out Num;
!       Width : Field := 0)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Put
       (File : File_Type;
        Item : Num;
        Fore : Field := Default_Fore;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp)
!    with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Post   =>
!        Line_Length (File)'Old = Line_Length (File)
!        and Page_Length (File)'Old = Page_Length (File),
!      Global => (In_Out => File_System);
  
     procedure Put
       (Item : Num;
        Fore : Field := Default_Fore;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Get
       (From : String;
        Item : out Num;
!       Last : out Positive)
!    with
!      Global => null;
  
     procedure Put
       (To   : out String;
        Item : Num;
        Aft  : Field := Default_Aft;
!       Exp  : Field := Default_Exp)
!    with
!      Global => null;
  
  private
     pragma Inline (Get);
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-tiinio.ads gcc-10.1.0/gcc/ada/libgnat/a-tiinio.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-tiinio.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-tiinio.ads	Thu May  7 10:49:59 2020
*************** package Ada.Text_IO.Integer_IO is
*** 51,82 ****
     procedure Get
       (File  : File_Type;
        Item  : out Num;
!       Width : Field := 0);
  
     procedure Get
       (Item  : out Num;
!       Width : Field := 0);
  
     procedure Put
       (File  : File_Type;
        Item  : Num;
        Width : Field := Default_Width;
!       Base  : Number_Base := Default_Base);
  
     procedure Put
       (Item  : Num;
        Width : Field := Default_Width;
!       Base  : Number_Base := Default_Base);
  
     procedure Get
       (From : String;
        Item : out Num;
!       Last : out Positive);
  
     procedure Put
       (To   : out String;
        Item : Num;
!       Base : Number_Base := Default_Base);
  
  private
     pragma Inline (Get);
--- 51,105 ----
     procedure Get
       (File  : File_Type;
        Item  : out Num;
!       Width : Field := 0)
!    with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (In_Out => File_System);
  
     procedure Get
       (Item  : out Num;
!       Width : Field := 0)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Put
       (File  : File_Type;
        Item  : Num;
        Width : Field := Default_Width;
!       Base  : Number_Base := Default_Base)
!    with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Post   =>
!        Line_Length (File)'Old = Line_Length (File)
!        and Page_Length (File)'Old = Page_Length (File),
!      Global => (In_Out => File_System);
  
     procedure Put
       (Item  : Num;
        Width : Field := Default_Width;
!       Base  : Number_Base := Default_Base)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Get
       (From : String;
        Item : out Num;
!       Last : out Positive)
!    with
!      Global => null;
  
     procedure Put
       (To   : out String;
        Item : Num;
!       Base : Number_Base := Default_Base)
!    with
!      Global => null;
  
  private
     pragma Inline (Get);
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-timoio.ads gcc-10.1.0/gcc/ada/libgnat/a-timoio.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-timoio.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-timoio.ads	Thu May  7 10:49:59 2020
*************** package Ada.Text_IO.Modular_IO is
*** 51,82 ****
     procedure Get
       (File  : File_Type;
        Item  : out Num;
!       Width : Field := 0);
  
     procedure Get
       (Item  : out Num;
!       Width : Field := 0);
  
     procedure Put
       (File  : File_Type;
        Item  : Num;
        Width : Field := Default_Width;
!       Base  : Number_Base := Default_Base);
  
     procedure Put
       (Item  : Num;
        Width : Field := Default_Width;
!       Base  : Number_Base := Default_Base);
  
     procedure Get
       (From : String;
        Item : out Num;
!       Last : out Positive);
  
     procedure Put
       (To   : out String;
        Item : Num;
!       Base : Number_Base := Default_Base);
  
  private
     pragma Inline (Get);
--- 51,105 ----
     procedure Get
       (File  : File_Type;
        Item  : out Num;
!       Width : Field := 0)
!    with
!      Pre    => Is_Open (File) and then Mode (File) = In_File,
!      Global => (In_Out => File_System);
  
     procedure Get
       (Item  : out Num;
!       Width : Field := 0)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Put
       (File  : File_Type;
        Item  : Num;
        Width : Field := Default_Width;
!       Base  : Number_Base := Default_Base)
!    with
!      Pre    => Is_Open (File) and then Mode (File) /= In_File,
!      Post   =>
!        Line_Length (File)'Old = Line_Length (File)
!        and Page_Length (File)'Old = Page_Length (File),
!      Global => (In_Out => File_System);
  
     procedure Put
       (Item  : Num;
        Width : Field := Default_Width;
!       Base  : Number_Base := Default_Base)
!    with
!      Post   =>
!        Line_Length'Old = Line_Length
!        and Page_Length'Old = Page_Length,
!      Global => (In_Out => File_System);
  
     procedure Get
       (From : String;
        Item : out Num;
!       Last : out Positive)
!    with
!      Global => null;
  
     procedure Put
       (To   : out String;
        Item : Num;
!       Base : Number_Base := Default_Base)
!    with
!      Global => null;
  
  private
     pragma Inline (Get);
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/a-wichha.ads gcc-10.1.0/gcc/ada/libgnat/a-wichha.ads
*** gcc-9.3.0/gcc/ada/libgnat/a-wichha.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/a-wichha.ads	Thu May  7 10:49:59 2020
*************** package Ada.Wide_Characters.Handling is
*** 25,52 ****
     function Is_Control (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Control);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  other_control, otherwise returns false.
  
     function Is_Letter (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Letter);
     --  Returns True if the Wide_Character designated by Item is categorized as
     --  letter_uppercase, letter_lowercase, letter_titlecase, letter_modifier,
!    --  letter_other, or number_letter. Otherwise returns false.
  
     function Is_Lower (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Lower);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  letter_lowercase, otherwise returns false.
  
     function Is_Upper (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Upper);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  letter_uppercase, otherwise returns false.
  
     function Is_Digit (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Digit);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  number_decimal, otherwise returns false.
  
     function Is_Decimal_Digit (Item : Wide_Character) return Boolean
       renames Is_Digit;
--- 25,52 ----
     function Is_Control (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Control);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  other_control, otherwise returns False.
  
     function Is_Letter (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Letter);
     --  Returns True if the Wide_Character designated by Item is categorized as
     --  letter_uppercase, letter_lowercase, letter_titlecase, letter_modifier,
!    --  letter_other, or number_letter. Otherwise returns False.
  
     function Is_Lower (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Lower);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  letter_lowercase, otherwise returns False.
  
     function Is_Upper (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Upper);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  letter_uppercase, otherwise returns False.
  
     function Is_Digit (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Digit);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  number_decimal, otherwise returns False.
  
     function Is_Decimal_Digit (Item : Wide_Character) return Boolean
       renames Is_Digit;
*************** package Ada.Wide_Characters.Handling is
*** 54,104 ****
     function Is_Hexadecimal_Digit (Item : Wide_Character) return Boolean;
     --  Returns True if the Wide_Character designated by Item is categorized as
     --  number_decimal, or is in the range 'A' .. 'F' or 'a' .. 'f', otherwise
!    --  returns false.
  
     function Is_Alphanumeric (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Alphanumeric);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  number_decimal, or is in the range 'A' .. 'F' or 'a' .. 'f', otherwise
!    --  returns false.
  
     function Is_Special (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Special);
     --  Returns True if the Wide_Character designated by Item is categorized
     --  as graphic_character, but not categorized as letter_uppercase,
     --  letter_lowercase, letter_titlecase, letter_modifier, letter_other,
!    --  number_letter, or number_decimal. Otherwise returns false.
  
     function Is_Line_Terminator (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Line_Terminator);
     --  Returns True if the Wide_Character designated by Item is categorized as
     --  separator_line or separator_paragraph, or if Item is a conventional line
!    --  terminator character (CR, LF, VT, or FF). Otherwise returns false.
  
     function Is_Mark (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Mark);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  mark_non_spacing or mark_spacing_combining, otherwise returns false.
  
     function Is_Other_Format (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Other_Format);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  other_format, otherwise returns false.
  
     function Is_Punctuation_Connector (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Punctuation_Connector);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  punctuation_connector, otherwise returns false.
  
     function Is_Space (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Space);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  separator_space, otherwise returns false.
  
     function Is_Graphic (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Graphic);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  graphic_character, otherwise returns false.
  
     function To_Lower (Item : Wide_Character) return Wide_Character;
     pragma Inline (To_Lower);
--- 54,104 ----
     function Is_Hexadecimal_Digit (Item : Wide_Character) return Boolean;
     --  Returns True if the Wide_Character designated by Item is categorized as
     --  number_decimal, or is in the range 'A' .. 'F' or 'a' .. 'f', otherwise
!    --  returns False.
  
     function Is_Alphanumeric (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Alphanumeric);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  letter_uppercase, letter_lowercase, letter_titlecase, letter_modifier,
!    --  letter_other, number_letter, or number_decimal; otherwise returns False.
  
     function Is_Special (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Special);
     --  Returns True if the Wide_Character designated by Item is categorized
     --  as graphic_character, but not categorized as letter_uppercase,
     --  letter_lowercase, letter_titlecase, letter_modifier, letter_other,
!    --  number_letter, or number_decimal. Otherwise returns False.
  
     function Is_Line_Terminator (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Line_Terminator);
     --  Returns True if the Wide_Character designated by Item is categorized as
     --  separator_line or separator_paragraph, or if Item is a conventional line
!    --  terminator character (CR, LF, VT, or FF). Otherwise returns False.
  
     function Is_Mark (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Mark);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  mark_non_spacing or mark_spacing_combining, otherwise returns False.
  
     function Is_Other_Format (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Other_Format);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  other_format, otherwise returns False.
  
     function Is_Punctuation_Connector (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Punctuation_Connector);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  punctuation_connector, otherwise returns False.
  
     function Is_Space (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Space);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  separator_space, otherwise returns False.
  
     function Is_Graphic (Item : Wide_Character) return Boolean;
     pragma Inline (Is_Graphic);
     --  Returns True if the Wide_Character designated by Item is categorized as
!    --  graphic_character, otherwise returns False.
  
     function To_Lower (Item : Wide_Character) return Wide_Character;
     pragma Inline (To_Lower);
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-altive.ads gcc-10.1.0/gcc/ada/libgnat/g-altive.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-altive.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-altive.ads	Thu May  7 10:49:59 2020
*************** end GNAT.Altivec;
*** 494,500 ****
  
  --  The central idea for the Ada bindings is to leverage on the existing GCC
  --  architecture, with the introduction of a Low_Level_Vectors abstraction.
! --  This abstaction acts as a representative of the vector-types and builtins
  --  compiler interface for either the Hard or the Soft case.
  
  --  For the Hard binding, Low_Level_Vectors exposes data types with a GCC
--- 494,500 ----
  
  --  The central idea for the Ada bindings is to leverage on the existing GCC
  --  architecture, with the introduction of a Low_Level_Vectors abstraction.
! --  This abstraction acts as a representative of the vector-types and builtins
  --  compiler interface for either the Hard or the Soft case.
  
  --  For the Hard binding, Low_Level_Vectors exposes data types with a GCC
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-brapre.ads gcc-10.1.0/gcc/ada/libgnat/g-brapre.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-brapre.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/g-brapre.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,68 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                G N A T . B R A N C H _ P R E D I C T I O N               --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --                         Copyright (C) 2019, AdaCore                      --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  This package provides routines giving hints to the branch predictor of the
+ --  code generator. These hints are useful when optimization is enabled and the
+ --  branch probability heuristics are used (which is the default), but they are
+ --  overridden when profile feedback-directed optimization is used instead.
+ 
+ --  The canonical pattern is to use them as the condition of an If statement:
+ --
+ --     if Likely (X > 0) then
+ --        Do_Something;
+ --     end if;
+ --
+ --  when it is not obvious that one outcome of the condition is more likely
+ --  than the other, or else to reverse the prediction made by the heuristics
+ --  in very peculiar cases. In the other cases, it is better not to use them,
+ --  because predicting how programs actually perform is notoriously hard.
+ 
+ package GNAT.Branch_Prediction is
+    pragma Pure;
+ 
+    function Expect (Condition : Boolean; Outcome : Boolean) return Boolean;
+    pragma Import (Intrinsic, Expect, "__builtin_expect");
+    --  This function returns the value of its first parameter Condition and
+    --  tells the branch predictor that this value is expected to be Outcome.
+ 
+    function Likely (Condition : Boolean) return Boolean;
+    pragma Import (Intrinsic, Likely, "__builtin_likely");
+    --  This function returns the value of its parameter Condition and tells
+    --  the branch predictor that this value is expected to be True. Calling
+    --  it is strictly equivalent to calling Expect with Outcome set to True.
+ 
+    function Unlikely (Condition : Boolean) return Boolean;
+    pragma Import (Intrinsic, Unlikely, "__builtin_unlikely");
+    --  This function returns the value of its parameter Condition and tells
+    --  the branch predictor that this value is expected to be False. Calling
+    --  it is strictly equivalent to calling Expect with Outcome set to False.
+ 
+ end GNAT.Branch_Prediction;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-comlin.adb gcc-10.1.0/gcc/ada/libgnat/g-comlin.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-comlin.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-comlin.adb	Thu May  7 10:49:59 2020
*************** package body GNAT.Command_Line is
*** 385,394 ****
     ------------------
  
     function Get_Argument
!      (Do_Expansion : Boolean    := False;
        Parser       : Opt_Parser := Command_Line_Parser) return String
     is
     begin
        if Parser.In_Expansion then
           declare
              S : constant String := Expansion (Parser.Expansion_It);
--- 385,409 ----
     ------------------
  
     function Get_Argument
!      (Do_Expansion : Boolean := False;
        Parser       : Opt_Parser := Command_Line_Parser) return String
     is
+       End_Of_Args : Boolean;
     begin
+       return Get_Argument (Do_Expansion, Parser, End_Of_Args);
+    end Get_Argument;
+ 
+    ------------------
+    -- Get_Argument --
+    ------------------
+ 
+    function Get_Argument
+      (Do_Expansion     : Boolean    := False;
+       Parser           : Opt_Parser := Command_Line_Parser;
+       End_Of_Arguments : out Boolean) return String is
+    begin
+       End_Of_Arguments := False;
+ 
        if Parser.In_Expansion then
           declare
              S : constant String := Expansion (Parser.Expansion_It);
*************** package body GNAT.Command_Line is
*** 415,420 ****
--- 430,436 ----
              end loop;
  
           else
+             End_Of_Arguments := True;
              return String'(1 .. 0 => ' ');
           end if;
  
*************** package body GNAT.Command_Line is
*** 436,449 ****
        end loop;
  
        if Parser.Current_Argument > Parser.Arg_Count then
           return String'(1 .. 0 => ' ');
        elsif Parser.Section (Parser.Current_Argument) = 0 then
!          return Get_Argument (Do_Expansion);
        end if;
  
        Parser.Current_Argument := Parser.Current_Argument + 1;
  
!       --  Could it be a file name with wild cards to expand?
  
        if Do_Expansion then
           declare
--- 452,467 ----
        end loop;
  
        if Parser.Current_Argument > Parser.Arg_Count then
+          End_Of_Arguments := True;
           return String'(1 .. 0 => ' ');
+ 
        elsif Parser.Section (Parser.Current_Argument) = 0 then
!          return Get_Argument (Do_Expansion, Parser, End_Of_Arguments);
        end if;
  
        Parser.Current_Argument := Parser.Current_Argument + 1;
  
!       --  Could it be a file name with wildcards to expand?
  
        if Do_Expansion then
           declare
*************** package body GNAT.Command_Line is
*** 451,463 ****
                        Argument (Parser, Parser.Current_Argument - 1);
           begin
              for Index in Arg'Range loop
!                if Arg (Index) = '*'
!                  or else Arg (Index) = '?'
!                  or else Arg (Index) = '['
!                then
                    Parser.In_Expansion := True;
                    Start_Expansion (Parser.Expansion_It, Arg);
!                   return Get_Argument (Do_Expansion, Parser);
                 end if;
              end loop;
           end;
--- 469,478 ----
                        Argument (Parser, Parser.Current_Argument - 1);
           begin
              for Index in Arg'Range loop
!                if Arg (Index) in '*' | '?' | '[' then
                    Parser.In_Expansion := True;
                    Start_Expansion (Parser.Expansion_It, Arg);
!                   return Get_Argument (Do_Expansion, Parser, End_Of_Arguments);
                 end if;
              end loop;
           end;
*************** package body GNAT.Command_Line is
*** 753,759 ****
  
              Parser.Current_Index := End_Index + 1;
  
!             raise Invalid_Switch;
           end if;
  
           End_Index := Parser.Current_Index + Max_Length - 1;
--- 768,775 ----
  
              Parser.Current_Index := End_Index + 1;
  
!             raise Invalid_Switch with
!               "Unrecognized option '" & Full_Switch (Parser) & ''';
           end if;
  
           End_Index := Parser.Current_Index + Max_Length - 1;
*************** package body GNAT.Command_Line is
*** 883,889 ****
                       Last    => Arg'Last,
                       Extra   => Parser.Switch_Character);
                    Parser.Current_Index := Arg'Last + 1;
!                   raise Invalid_Switch;
                 end if;
           end case;
  
--- 899,906 ----
                       Last    => Arg'Last,
                       Extra   => Parser.Switch_Character);
                    Parser.Current_Index := Arg'Last + 1;
!                   raise Invalid_Switch with
!                     "Unrecognized option '" & Full_Switch (Parser) & ''';
                 end if;
           end case;
  
*************** package body GNAT.Command_Line is
*** 3365,3371 ****
       (Config      : Command_Line_Configuration;
        Callback    : Switch_Handler := null;
        Parser      : Opt_Parser := Command_Line_Parser;
!       Concatenate : Boolean := True)
     is
        Local_Config    : Command_Line_Configuration := Config;
        Getopt_Switches : String_Access;
--- 3382,3389 ----
       (Config      : Command_Line_Configuration;
        Callback    : Switch_Handler := null;
        Parser      : Opt_Parser := Command_Line_Parser;
!       Concatenate : Boolean := True;
!       Quiet       : Boolean := False)
     is
        Local_Config    : Command_Line_Configuration := Config;
        Getopt_Switches : String_Access;
*************** package body GNAT.Command_Line is
*** 3575,3586 ****
  
           --  Message inspired by "ls" on Unix
  
!          Put_Line (Standard_Error,
!                    Base_Name (Ada.Command_Line.Command_Name)
!                    & ": unrecognized option '"
!                    & Full_Switch (Parser)
!                    & "'");
!          Try_Help;
  
           raise;
  
--- 3593,3606 ----
  
           --  Message inspired by "ls" on Unix
  
!          if not Quiet then
!             Put_Line (Standard_Error,
!                       Base_Name (Ada.Command_Line.Command_Name)
!                       & ": unrecognized option '"
!                       & Full_Switch (Parser)
!                       & "'");
!             Try_Help;
!          end if;
  
           raise;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-comlin.ads gcc-10.1.0/gcc/ada/libgnat/g-comlin.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-comlin.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-comlin.ads	Thu May  7 10:49:59 2020
*************** package GNAT.Command_Line is
*** 462,477 ****
     function Get_Argument
       (Do_Expansion : Boolean := False;
        Parser       : Opt_Parser := Command_Line_Parser) return String;
!    --  Returns the next element on the command line that is not a switch.  This
!    --  function should not be called before Getopt has returned ASCII.NUL.
     --
     --  If Do_Expansion is True, then the parameter on the command line will
!    --  be considered as a filename with wild cards, and will be expanded. The
     --  matching file names will be returned one at a time. This is useful in
!    --  non-Unix systems for obtaining normal expansion of wild card references.
     --  When there are no more arguments on the command line, this function
     --  returns an empty string.
  
     function Parameter
       (Parser : Opt_Parser := Command_Line_Parser) return String;
     --  Returns parameter associated with the last switch returned by Getopt.
--- 462,488 ----
     function Get_Argument
       (Do_Expansion : Boolean := False;
        Parser       : Opt_Parser := Command_Line_Parser) return String;
!    --  Returns the next element on the command line that is not a switch. This
!    --  function should be called either after Getopt has returned ASCII.NUL or
!    --  after Getopt procedure call.
     --
     --  If Do_Expansion is True, then the parameter on the command line will
!    --  be considered as a filename with wildcards, and will be expanded. The
     --  matching file names will be returned one at a time. This is useful in
!    --  non-Unix systems for obtaining normal expansion of wildcard references.
     --  When there are no more arguments on the command line, this function
     --  returns an empty string.
  
+    function Get_Argument
+      (Do_Expansion     : Boolean    := False;
+       Parser           : Opt_Parser := Command_Line_Parser;
+       End_Of_Arguments : out Boolean) return String;
+    --  The same as above but able to distinguish empty element in argument list
+    --  from end of arguments.
+    --  End_Of_Arguments is True if the end of the command line has been reached
+    --  (i.e. all available arguments have been returned by previous calls to
+    --  Get_Argument).
+ 
     function Parameter
       (Parser : Opt_Parser := Command_Line_Parser) return String;
     --  Returns parameter associated with the last switch returned by Getopt.
*************** package GNAT.Command_Line is
*** 515,521 ****
        Pattern      : String;
        Directory    : String := "";
        Basic_Regexp : Boolean := True);
!    --  Initialize a wild card expansion. The next calls to Expansion will
     --  return the next file name in Directory which match Pattern (Pattern
     --  is a regular expression, using only the Unix shell and DOS syntax if
     --  Basic_Regexp is True). When Directory is an empty string, the current
--- 526,532 ----
        Pattern      : String;
        Directory    : String := "";
        Basic_Regexp : Boolean := True);
!    --  Initialize a wildcard expansion. The next calls to Expansion will
     --  return the next file name in Directory which match Pattern (Pattern
     --  is a regular expression, using only the Unix shell and DOS syntax if
     --  Basic_Regexp is True). When Directory is an empty string, the current
*************** package GNAT.Command_Line is
*** 731,744 ****
     --  Full_Switch omits the first leading '-'.
  
     Exit_From_Command_Line : exception;
!    --  Emitted when the program should exit. This is called when Getopt below
!    --  has seen -h, --help or an invalid switch.
  
     procedure Getopt
       (Config      : Command_Line_Configuration;
        Callback    : Switch_Handler := null;
        Parser      : Opt_Parser := Command_Line_Parser;
!       Concatenate : Boolean := True);
     --  Similar to the standard Getopt function. For each switch found on the
     --  command line, this calls Callback, if the switch is not handled
     --  automatically.
--- 742,756 ----
     --  Full_Switch omits the first leading '-'.
  
     Exit_From_Command_Line : exception;
!    --  Raised when the program should exit because Getopt below has seen
!    --  a -h or --help switch.
  
     procedure Getopt
       (Config      : Command_Line_Configuration;
        Callback    : Switch_Handler := null;
        Parser      : Opt_Parser := Command_Line_Parser;
!       Concatenate : Boolean := True;
!       Quiet       : Boolean := False);
     --  Similar to the standard Getopt function. For each switch found on the
     --  command line, this calls Callback, if the switch is not handled
     --  automatically.
*************** package GNAT.Command_Line is
*** 756,761 ****
--- 768,774 ----
     --  to display the help message and raises Exit_From_Command_Line.
     --  If an invalid switch is specified on the command line, this procedure
     --  will display an error message and raises Invalid_Switch again.
+    --  If the Quiet parameter is True then the error message is not displayed.
     --
     --  This function automatically expands switches:
     --
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-dynhta.adb gcc-10.1.0/gcc/ada/libgnat/g-dynhta.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-dynhta.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-dynhta.adb	Thu May  7 10:49:59 2020
*************** with Ada.Unchecked_Deallocation;
*** 34,39 ****
--- 34,67 ----
  package body GNAT.Dynamic_HTables is
  
     -------------------
+    -- Hash_Two_Keys --
+    -------------------
+ 
+    function Hash_Two_Keys
+      (Left  : Bucket_Range_Type;
+       Right : Bucket_Range_Type) return Bucket_Range_Type
+    is
+       Half : constant := 2 ** (Bucket_Range_Type'Size / 2);
+       Mask : constant := Half - 1;
+ 
+    begin
+       --  The hash is obtained in the following manner:
+       --
+       --    1) The low bits of Left are obtained, then shifted over to the high
+       --       bits position.
+       --
+       --    2) The low bits of Right are obtained
+       --
+       --  The results from 1) and 2) are or-ed to produce a value within the
+       --  range of Bucket_Range_Type.
+ 
+       return
+         ((Left  and Mask) * Half)
+             or
+          (Right and Mask);
+    end Hash_Two_Keys;
+ 
+    -------------------
     -- Static_HTable --
     -------------------
  
*************** package body GNAT.Dynamic_HTables is
*** 364,374 ****
        end Set_Next;
     end Simple_HTable;
  
!    --------------------
!    -- Dynamic_HTable --
!    --------------------
  
!    package body Dynamic_HTable is
        Minimum_Size : constant Bucket_Range_Type := 8;
        --  Minimum size of the buckets
  
--- 392,402 ----
        end Set_Next;
     end Simple_HTable;
  
!    -------------------------
!    -- Dynamic_Hash_Tables --
!    -------------------------
  
!    package body Dynamic_Hash_Tables is
        Minimum_Size : constant Bucket_Range_Type := 8;
        --  Minimum size of the buckets
  
*************** package body GNAT.Dynamic_HTables is
*** 382,387 ****
--- 410,421 ----
        --  Maximum safe size for hash table expansion. Beyond this size, an
        --  expansion will overflow the buckets.
  
+       procedure Delete_Node
+         (T   : Dynamic_Hash_Table;
+          Nod : Node_Ptr);
+       pragma Inline (Delete_Node);
+       --  Detach and delete node Nod from table T
+ 
        procedure Destroy_Buckets (Bkts : Bucket_Table_Ptr);
        pragma Inline (Destroy_Buckets);
        --  Destroy all nodes within buckets Bkts
*************** package body GNAT.Dynamic_HTables is
*** 394,405 ****
        pragma Inline (Ensure_Circular);
        --  Ensure that dummy head Head is circular with respect to itself
  
!       procedure Ensure_Created (T : Instance);
        pragma Inline (Ensure_Created);
        --  Verify that hash table T is created. Raise Not_Created if this is not
        --  the case.
  
!       procedure Ensure_Unlocked (T : Instance);
        pragma Inline (Ensure_Unlocked);
        --  Verify that hash table T is unlocked. Raise Iterated if this is not
        --  the case.
--- 428,439 ----
        pragma Inline (Ensure_Circular);
        --  Ensure that dummy head Head is circular with respect to itself
  
!       procedure Ensure_Created (T : Dynamic_Hash_Table);
        pragma Inline (Ensure_Created);
        --  Verify that hash table T is created. Raise Not_Created if this is not
        --  the case.
  
!       procedure Ensure_Unlocked (T : Dynamic_Hash_Table);
        pragma Inline (Ensure_Unlocked);
        --  Verify that hash table T is unlocked. Raise Iterated if this is not
        --  the case.
*************** package body GNAT.Dynamic_HTables is
*** 418,424 ****
        --  otherwise return null.
  
        procedure First_Valid_Node
!         (T        : Instance;
           Low_Bkt  : Bucket_Range_Type;
           High_Bkt : Bucket_Range_Type;
           Idx      : out Bucket_Range_Type;
--- 452,458 ----
        --  otherwise return null.
  
        procedure First_Valid_Node
!         (T        : Dynamic_Hash_Table;
           Low_Bkt  : Bucket_Range_Type;
           High_Bkt : Bucket_Range_Type;
           Idx      : out Bucket_Range_Type;
*************** package body GNAT.Dynamic_HTables is
*** 433,439 ****
          new Ada.Unchecked_Deallocation (Bucket_Table, Bucket_Table_Ptr);
  
        procedure Free is
!         new Ada.Unchecked_Deallocation (Hash_Table, Instance);
  
        procedure Free is
          new Ada.Unchecked_Deallocation (Node, Node_Ptr);
--- 467,474 ----
          new Ada.Unchecked_Deallocation (Bucket_Table, Bucket_Table_Ptr);
  
        procedure Free is
!         new Ada.Unchecked_Deallocation
!               (Dynamic_Hash_Table_Attributes, Dynamic_Hash_Table);
  
        procedure Free is
          new Ada.Unchecked_Deallocation (Node, Node_Ptr);
*************** package body GNAT.Dynamic_HTables is
*** 447,461 ****
        --  Determine whether node Nod is non-null and does not refer to dummy
        --  head Head, thus making it valid.
  
!       function Load_Factor (T : Instance) return Threshold_Type;
        pragma Inline (Load_Factor);
        --  Calculate the load factor of hash table T
  
!       procedure Lock (T : Instance);
        pragma Inline (Lock);
        --  Lock all mutation functionality of hash table T
  
!       procedure Mutate_And_Rehash (T : Instance; Size : Bucket_Range_Type);
        pragma Inline (Mutate_And_Rehash);
        --  Replace the buckets of hash table T with a new set of buckets of size
        --  Size. Rehash all key-value pairs from the old to the new buckets.
--- 482,498 ----
        --  Determine whether node Nod is non-null and does not refer to dummy
        --  head Head, thus making it valid.
  
!       function Load_Factor (T : Dynamic_Hash_Table) return Threshold_Type;
        pragma Inline (Load_Factor);
        --  Calculate the load factor of hash table T
  
!       procedure Lock (T : Dynamic_Hash_Table);
        pragma Inline (Lock);
        --  Lock all mutation functionality of hash table T
  
!       procedure Mutate_And_Rehash
!         (T    : Dynamic_Hash_Table;
!          Size : Bucket_Range_Type);
        pragma Inline (Mutate_And_Rehash);
        --  Replace the buckets of hash table T with a new set of buckets of size
        --  Size. Rehash all key-value pairs from the old to the new buckets.
*************** package body GNAT.Dynamic_HTables is
*** 464,484 ****
        pragma Inline (Prepend);
        --  Insert node Nod immediately after dummy head Head
  
!       procedure Unlock (T : Instance);
        pragma Inline (Unlock);
        --  Unlock all mutation functionality of hash table T
  
        ------------
        -- Create --
        ------------
  
!       function Create (Initial_Size : Positive) return Instance is
           Size : constant Bucket_Range_Type :=
                             Bucket_Range_Type'Max
                               (Bucket_Range_Type (Initial_Size), Minimum_Size);
           --  Ensure that the buckets meet a minimum size
  
!          T : constant Instance := new Hash_Table;
  
        begin
           T.Buckets      := new Bucket_Table (0 .. Size - 1);
--- 501,555 ----
        pragma Inline (Prepend);
        --  Insert node Nod immediately after dummy head Head
  
!       function Present (Bkts : Bucket_Table_Ptr) return Boolean;
!       pragma Inline (Present);
!       --  Determine whether buckets Bkts exist
! 
!       function Present (Nod : Node_Ptr) return Boolean;
!       pragma Inline (Present);
!       --  Determine whether node Nod exists
! 
!       procedure Unlock (T : Dynamic_Hash_Table);
        pragma Inline (Unlock);
        --  Unlock all mutation functionality of hash table T
  
+       --------------
+       -- Contains --
+       --------------
+ 
+       function Contains
+         (T   : Dynamic_Hash_Table;
+          Key : Key_Type) return Boolean
+       is
+          Head : Node_Ptr;
+          Nod  : Node_Ptr;
+ 
+       begin
+          Ensure_Created (T);
+ 
+          --  Obtain the dummy head of the bucket which should house the
+          --  key-value pair.
+ 
+          Head := Find_Bucket (T.Buckets, Key);
+ 
+          --  Try to find a node in the bucket which matches the key
+ 
+          Nod := Find_Node (Head, Key);
+ 
+          return Is_Valid (Nod, Head);
+       end Contains;
+ 
        ------------
        -- Create --
        ------------
  
!       function Create (Initial_Size : Positive) return Dynamic_Hash_Table is
           Size : constant Bucket_Range_Type :=
                             Bucket_Range_Type'Max
                               (Bucket_Range_Type (Initial_Size), Minimum_Size);
           --  Ensure that the buckets meet a minimum size
  
!          T : constant Dynamic_Hash_Table := new Dynamic_Hash_Table_Attributes;
  
        begin
           T.Buckets      := new Bucket_Table (0 .. Size - 1);
*************** package body GNAT.Dynamic_HTables is
*** 491,497 ****
        -- Delete --
        ------------
  
!       procedure Delete (T : Instance; Key : Key_Type) is
           procedure Compress;
           pragma Inline (Compress);
           --  Determine whether hash table T requires compression, and if so,
--- 562,602 ----
        -- Delete --
        ------------
  
!       procedure Delete
!         (T   : Dynamic_Hash_Table;
!          Key : Key_Type)
!       is
!          Head : Node_Ptr;
!          Nod  : Node_Ptr;
! 
!       begin
!          Ensure_Created  (T);
!          Ensure_Unlocked (T);
! 
!          --  Obtain the dummy head of the bucket which should house the
!          --  key-value pair.
! 
!          Head := Find_Bucket (T.Buckets, Key);
! 
!          --  Try to find a node in the bucket which matches the key
! 
!          Nod := Find_Node (Head, Key);
! 
!          --  If such a node exists, remove it from the bucket and deallocate it
! 
!          if Is_Valid (Nod, Head) then
!             Delete_Node (T, Nod);
!          end if;
!       end Delete;
! 
!       -----------------
!       -- Delete_Node --
!       -----------------
! 
!       procedure Delete_Node
!         (T   : Dynamic_Hash_Table;
!          Nod : Node_Ptr)
!       is
           procedure Compress;
           pragma Inline (Compress);
           --  Determine whether hash table T requires compression, and if so,
*************** package body GNAT.Dynamic_HTables is
*** 502,509 ****
           --------------
  
           procedure Compress is
!             pragma Assert (T /= null);
!             pragma Assert (T.Buckets /= null);
  
              Old_Size : constant Bucket_Range_Type := T.Buckets'Length;
  
--- 607,614 ----
           --------------
  
           procedure Compress is
!             pragma Assert (Present (T));
!             pragma Assert (Present (T.Buckets));
  
              Old_Size : constant Bucket_Range_Type := T.Buckets'Length;
  
*************** package body GNAT.Dynamic_HTables is
*** 520,566 ****
  
           --  Local variables
  
!          Head : Node_Ptr;
!          Nod  : Node_Ptr;
  
!       --  Start of processing for Delete
  
        begin
!          Ensure_Created  (T);
!          Ensure_Unlocked (T);
! 
!          --  Obtain the dummy head of the bucket which should house the
!          --  key-value pair.
! 
!          Head := Find_Bucket (T.Buckets, Key);
! 
!          --  Try to find a node in the bucket which matches the key
! 
!          Nod := Find_Node (Head, Key);
! 
!          --  If such a node exists, remove it from the bucket and deallocate it
  
!          if Is_Valid (Nod, Head) then
!             Detach (Nod);
!             Free   (Nod);
  
!             --  The number of key-value pairs is updated when the hash table
!             --  contains a valid node which represents the pair.
  
!             T.Pairs := T.Pairs - 1;
  
!             --  Compress the hash table if the load factor drops below
!             --  Compression_Threshold.
  
!             Compress;
!          end if;
!       end Delete;
  
        -------------
        -- Destroy --
        -------------
  
!       procedure Destroy (T : in out Instance) is
        begin
           Ensure_Created  (T);
           Ensure_Unlocked (T);
--- 625,657 ----
  
           --  Local variables
  
!          Ref : Node_Ptr := Nod;
  
!       --  Start of processing for Delete_Node
  
        begin
!          pragma Assert (Present (Ref));
!          pragma Assert (Present (T));
  
!          Detach (Ref);
!          Free   (Ref);
  
!          --  The number of key-value pairs is updated when the hash table
!          --  contains a valid node which represents the pair.
  
!          T.Pairs := T.Pairs - 1;
  
!          --  Compress the hash table if the load factor drops below the value
!          --  of Compression_Threshold.
  
!          Compress;
!       end Delete_Node;
  
        -------------
        -- Destroy --
        -------------
  
!       procedure Destroy (T : in out Dynamic_Hash_Table) is
        begin
           Ensure_Created  (T);
           Ensure_Unlocked (T);
*************** package body GNAT.Dynamic_HTables is
*** 594,599 ****
--- 685,694 ----
              while Is_Valid (Head.Next, Head) loop
                 Nod := Head.Next;
  
+                --  Invoke the value destructor before deallocating the node
+ 
+                Destroy_Value (Nod.Value);
+ 
                 Detach (Nod);
                 Free   (Nod);
              end loop;
*************** package body GNAT.Dynamic_HTables is
*** 602,608 ****
        --  Start of processing for Destroy_Buckets
  
        begin
!          pragma Assert (Bkts /= null);
  
           for Scan_Idx in Bkts'Range loop
              Destroy_Bucket (Bkts (Scan_Idx)'Access);
--- 697,703 ----
        --  Start of processing for Destroy_Buckets
  
        begin
!          pragma Assert (Present (Bkts));
  
           for Scan_Idx in Bkts'Range loop
              Destroy_Bucket (Bkts (Scan_Idx)'Access);
*************** package body GNAT.Dynamic_HTables is
*** 614,630 ****
        ------------
  
        procedure Detach (Nod : Node_Ptr) is
!          pragma Assert (Nod /= null);
  
           Next : constant Node_Ptr := Nod.Next;
           Prev : constant Node_Ptr := Nod.Prev;
  
        begin
!          pragma Assert (Next /= null);
!          pragma Assert (Prev /= null);
  
!          Prev.Next := Next;
!          Next.Prev := Prev;
  
           Nod.Next := null;
           Nod.Prev := null;
--- 709,725 ----
        ------------
  
        procedure Detach (Nod : Node_Ptr) is
!          pragma Assert (Present (Nod));
  
           Next : constant Node_Ptr := Nod.Next;
           Prev : constant Node_Ptr := Nod.Prev;
  
        begin
!          pragma Assert (Present (Next));
!          pragma Assert (Present (Prev));
  
!          Prev.Next := Next;  --  Prev ---> Next
!          Next.Prev := Prev;  --  Prev <--> Next
  
           Nod.Next := null;
           Nod.Prev := null;
*************** package body GNAT.Dynamic_HTables is
*** 635,644 ****
        ---------------------
  
        procedure Ensure_Circular (Head : Node_Ptr) is
!          pragma Assert (Head /= null);
  
        begin
!          if Head.Next = null and then Head.Prev = null then
              Head.Next := Head;
              Head.Prev := Head;
           end if;
--- 730,739 ----
        ---------------------
  
        procedure Ensure_Circular (Head : Node_Ptr) is
!          pragma Assert (Present (Head));
  
        begin
!          if not Present (Head.Next) and then not Present (Head.Prev) then
              Head.Next := Head;
              Head.Prev := Head;
           end if;
*************** package body GNAT.Dynamic_HTables is
*** 648,656 ****
        -- Ensure_Created --
        --------------------
  
!       procedure Ensure_Created (T : Instance) is
        begin
!          if T = null then
              raise Not_Created;
           end if;
        end Ensure_Created;
--- 743,751 ----
        -- Ensure_Created --
        --------------------
  
!       procedure Ensure_Created (T : Dynamic_Hash_Table) is
        begin
!          if not Present (T) then
              raise Not_Created;
           end if;
        end Ensure_Created;
*************** package body GNAT.Dynamic_HTables is
*** 659,667 ****
        -- Ensure_Unlocked --
        ---------------------
  
!       procedure Ensure_Unlocked (T : Instance) is
        begin
!          pragma Assert (T /= null);
  
           --  The hash table has at least one outstanding iterator
  
--- 754,762 ----
        -- Ensure_Unlocked --
        ---------------------
  
!       procedure Ensure_Unlocked (T : Dynamic_Hash_Table) is
        begin
!          pragma Assert (Present (T));
  
           --  The hash table has at least one outstanding iterator
  
*************** package body GNAT.Dynamic_HTables is
*** 678,684 ****
          (Bkts : Bucket_Table_Ptr;
           Key  : Key_Type) return Node_Ptr
        is
!          pragma Assert (Bkts /= null);
  
           Idx : constant Bucket_Range_Type := Hash (Key) mod Bkts'Length;
  
--- 773,779 ----
          (Bkts : Bucket_Table_Ptr;
           Key  : Key_Type) return Node_Ptr
        is
!          pragma Assert (Present (Bkts));
  
           Idx : constant Bucket_Range_Type := Hash (Key) mod Bkts'Length;
  
*************** package body GNAT.Dynamic_HTables is
*** 691,697 ****
        ---------------
  
        function Find_Node (Head : Node_Ptr; Key : Key_Type) return Node_Ptr is
!          pragma Assert (Head /= null);
  
           Nod : Node_Ptr;
  
--- 786,792 ----
        ---------------
  
        function Find_Node (Head : Node_Ptr; Key : Key_Type) return Node_Ptr is
!          pragma Assert (Present (Head));
  
           Nod : Node_Ptr;
  
*************** package body GNAT.Dynamic_HTables is
*** 716,722 ****
        ----------------------
  
        procedure First_Valid_Node
!         (T        : Instance;
           Low_Bkt  : Bucket_Range_Type;
           High_Bkt : Bucket_Range_Type;
           Idx      : out Bucket_Range_Type;
--- 811,817 ----
        ----------------------
  
        procedure First_Valid_Node
!         (T        : Dynamic_Hash_Table;
           Low_Bkt  : Bucket_Range_Type;
           High_Bkt : Bucket_Range_Type;
           Idx      : out Bucket_Range_Type;
*************** package body GNAT.Dynamic_HTables is
*** 725,732 ****
           Head : Node_Ptr;
  
        begin
!          pragma Assert (T /= null);
!          pragma Assert (T.Buckets /= null);
  
           --  Assume that no valid node exists
  
--- 820,827 ----
           Head : Node_Ptr;
  
        begin
!          pragma Assert (Present (T));
!          pragma Assert (Present (T.Buckets));
  
           --  Assume that no valid node exists
  
*************** package body GNAT.Dynamic_HTables is
*** 754,760 ****
        -- Get --
        ---------
  
!       function Get (T : Instance; Key : Key_Type) return Value_Type is
           Head : Node_Ptr;
           Nod  : Node_Ptr;
  
--- 849,858 ----
        -- Get --
        ---------
  
!       function Get
!         (T   : Dynamic_Hash_Table;
!          Key : Key_Type) return Value_Type
!       is
           Head : Node_Ptr;
           Nod  : Node_Ptr;
  
*************** package body GNAT.Dynamic_HTables is
*** 784,794 ****
        --------------
  
        function Has_Next (Iter : Iterator) return Boolean is
!          Is_OK : constant Boolean  := Is_Valid (Iter);
!          T     : constant Instance := Iter.Table;
  
        begin
!          pragma Assert (T /= null);
  
           --  The iterator is no longer valid which indicates that it has been
           --  exhausted. Unlock all mutation functionality of the hash table
--- 882,892 ----
        --------------
  
        function Has_Next (Iter : Iterator) return Boolean is
!          Is_OK : constant Boolean := Is_Valid (Iter);
!          T     : constant Dynamic_Hash_Table := Iter.Table;
  
        begin
!          pragma Assert (Present (T));
  
           --  The iterator is no longer valid which indicates that it has been
           --  exhausted. Unlock all mutation functionality of the hash table
*************** package body GNAT.Dynamic_HTables is
*** 805,811 ****
        -- Is_Empty --
        --------------
  
!       function Is_Empty (T : Instance) return Boolean is
        begin
           Ensure_Created (T);
  
--- 903,909 ----
        -- Is_Empty --
        --------------
  
!       function Is_Empty (T : Dynamic_Hash_Table) return Boolean is
        begin
           Ensure_Created (T);
  
*************** package body GNAT.Dynamic_HTables is
*** 821,827 ****
           --  The invariant of Iterate and Next ensures that the iterator always
           --  refers to a valid node if there exists one.
  
!          return Iter.Nod /= null;
        end Is_Valid;
  
        --------------
--- 919,925 ----
           --  The invariant of Iterate and Next ensures that the iterator always
           --  refers to a valid node if there exists one.
  
!          return Present (Iter.Curr_Nod);
        end Is_Valid;
  
        --------------
*************** package body GNAT.Dynamic_HTables is
*** 833,851 ****
           --  A node is valid if it is non-null, and does not refer to the dummy
           --  head of some bucket.
  
!          return Nod /= null and then Nod /= Head;
        end Is_Valid;
  
        -------------
        -- Iterate --
        -------------
  
!       function Iterate (T : Instance) return Iterator is
           Iter : Iterator;
  
        begin
           Ensure_Created (T);
!          pragma Assert (T.Buckets /= null);
  
           --  Initialize the iterator to reference the first valid node in
           --  the full range of hash table buckets. If no such node exists,
--- 931,949 ----
           --  A node is valid if it is non-null, and does not refer to the dummy
           --  head of some bucket.
  
!          return Present (Nod) and then Nod /= Head;
        end Is_Valid;
  
        -------------
        -- Iterate --
        -------------
  
!       function Iterate (T : Dynamic_Hash_Table) return Iterator is
           Iter : Iterator;
  
        begin
           Ensure_Created (T);
!          pragma Assert (Present (T.Buckets));
  
           --  Initialize the iterator to reference the first valid node in
           --  the full range of hash table buckets. If no such node exists,
*************** package body GNAT.Dynamic_HTables is
*** 856,863 ****
             (T        => T,
              Low_Bkt  => T.Buckets'First,
              High_Bkt => T.Buckets'Last,
!             Idx      => Iter.Idx,
!             Nod      => Iter.Nod);
  
           --  Associate the iterator with the hash table to allow for future
           --  mutation functionality unlocking.
--- 954,961 ----
             (T        => T,
              Low_Bkt  => T.Buckets'First,
              High_Bkt => T.Buckets'Last,
!             Idx      => Iter.Curr_Idx,
!             Nod      => Iter.Curr_Nod);
  
           --  Associate the iterator with the hash table to allow for future
           --  mutation functionality unlocking.
*************** package body GNAT.Dynamic_HTables is
*** 876,884 ****
        -- Load_Factor --
        -----------------
  
!       function Load_Factor (T : Instance) return Threshold_Type is
!          pragma Assert (T /= null);
!          pragma Assert (T.Buckets /= null);
  
        begin
           --  The load factor is the ratio of key-value pairs to buckets
--- 974,982 ----
        -- Load_Factor --
        -----------------
  
!       function Load_Factor (T : Dynamic_Hash_Table) return Threshold_Type is
!          pragma Assert (Present (T));
!          pragma Assert (Present (T.Buckets));
  
        begin
           --  The load factor is the ratio of key-value pairs to buckets
*************** package body GNAT.Dynamic_HTables is
*** 890,896 ****
        -- Lock --
        ----------
  
!       procedure Lock (T : Instance) is
        begin
           --  The hash table may be locked multiple times if multiple iterators
           --  are operating over it.
--- 988,994 ----
        -- Lock --
        ----------
  
!       procedure Lock (T : Dynamic_Hash_Table) is
        begin
           --  The hash table may be locked multiple times if multiple iterators
           --  are operating over it.
*************** package body GNAT.Dynamic_HTables is
*** 902,908 ****
        -- Mutate_And_Rehash --
        -----------------------
  
!       procedure Mutate_And_Rehash (T : Instance; Size : Bucket_Range_Type) is
           procedure Rehash (From : Bucket_Table_Ptr; To : Bucket_Table_Ptr);
           pragma Inline (Rehash);
           --  Remove all nodes from buckets From and rehash them into buckets To
--- 1000,1009 ----
        -- Mutate_And_Rehash --
        -----------------------
  
!       procedure Mutate_And_Rehash
!         (T    : Dynamic_Hash_Table;
!          Size : Bucket_Range_Type)
!       is
           procedure Rehash (From : Bucket_Table_Ptr; To : Bucket_Table_Ptr);
           pragma Inline (Rehash);
           --  Remove all nodes from buckets From and rehash them into buckets To
*************** package body GNAT.Dynamic_HTables is
*** 922,929 ****
  
           procedure Rehash (From : Bucket_Table_Ptr; To : Bucket_Table_Ptr) is
           begin
!             pragma Assert (From /= null);
!             pragma Assert (To /= null);
  
              for Scan_Idx in From'Range loop
                 Rehash_Bucket (From (Scan_Idx)'Access, To);
--- 1023,1030 ----
  
           procedure Rehash (From : Bucket_Table_Ptr; To : Bucket_Table_Ptr) is
           begin
!             pragma Assert (Present (From));
!             pragma Assert (Present (To));
  
              for Scan_Idx in From'Range loop
                 Rehash_Bucket (From (Scan_Idx)'Access, To);
*************** package body GNAT.Dynamic_HTables is
*** 935,941 ****
           -------------------
  
           procedure Rehash_Bucket (Head : Node_Ptr; To : Bucket_Table_Ptr) is
!             pragma Assert (Head /= null);
  
              Nod : Node_Ptr;
  
--- 1036,1042 ----
           -------------------
  
           procedure Rehash_Bucket (Head : Node_Ptr; To : Bucket_Table_Ptr) is
!             pragma Assert (Present (Head));
  
              Nod : Node_Ptr;
  
*************** package body GNAT.Dynamic_HTables is
*** 955,961 ****
           -----------------
  
           procedure Rehash_Node (Nod : Node_Ptr; To : Bucket_Table_Ptr) is
!             pragma Assert (Nod /= null);
  
              Head : Node_Ptr;
  
--- 1056,1062 ----
           -----------------
  
           procedure Rehash_Node (Nod : Node_Ptr; To : Bucket_Table_Ptr) is
!             pragma Assert (Present (Nod));
  
              Head : Node_Ptr;
  
*************** package body GNAT.Dynamic_HTables is
*** 982,988 ****
        --  Start of processing for Mutate_And_Rehash
  
        begin
!          pragma Assert (T /= null);
  
           Old_Bkts  := T.Buckets;
           T.Buckets := new Bucket_Table (0 .. Size - 1);
--- 1083,1089 ----
        --  Start of processing for Mutate_And_Rehash
  
        begin
!          pragma Assert (Present (T));
  
           Old_Bkts  := T.Buckets;
           T.Buckets := new Bucket_Table (0 .. Size - 1);
*************** package body GNAT.Dynamic_HTables is
*** 1000,1012 ****
  
        procedure Next (Iter : in out Iterator; Key : out Key_Type) is
           Is_OK : constant Boolean  := Is_Valid (Iter);
!          Saved : constant Node_Ptr := Iter.Nod;
!          T     : constant Instance := Iter.Table;
           Head  : Node_Ptr;
  
        begin
!          pragma Assert (T /= null);
!          pragma Assert (T.Buckets /= null);
  
           --  The iterator is no longer valid which indicates that it has been
           --  exhausted. Unlock all mutation functionality of the hash table as
--- 1101,1113 ----
  
        procedure Next (Iter : in out Iterator; Key : out Key_Type) is
           Is_OK : constant Boolean  := Is_Valid (Iter);
!          Saved : constant Node_Ptr := Iter.Curr_Nod;
!          T     : constant Dynamic_Hash_Table := Iter.Table;
           Head  : Node_Ptr;
  
        begin
!          pragma Assert (Present (T));
!          pragma Assert (Present (T.Buckets));
  
           --  The iterator is no longer valid which indicates that it has been
           --  exhausted. Unlock all mutation functionality of the hash table as
*************** package body GNAT.Dynamic_HTables is
*** 1019,1039 ****
  
           --  Advance to the next node along the same bucket
  
!          Iter.Nod := Iter.Nod.Next;
!          Head     := T.Buckets (Iter.Idx)'Access;
  
           --  If the new node is no longer valid, then this indicates that the
           --  current bucket has been exhausted. Advance to the next valid node
           --  within the remaining range of buckets. If no such node exists, the
           --  iterator is left in a state which does not allow it to advance.
  
!          if not Is_Valid (Iter.Nod, Head) then
              First_Valid_Node
!               (T      => T,
!                Low_Bkt  => Iter.Idx + 1,
                 High_Bkt => T.Buckets'Last,
!                Idx      => Iter.Idx,
!                Nod      => Iter.Nod);
           end if;
  
           Key := Saved.Key;
--- 1120,1140 ----
  
           --  Advance to the next node along the same bucket
  
!          Iter.Curr_Nod := Iter.Curr_Nod.Next;
!          Head := T.Buckets (Iter.Curr_Idx)'Access;
  
           --  If the new node is no longer valid, then this indicates that the
           --  current bucket has been exhausted. Advance to the next valid node
           --  within the remaining range of buckets. If no such node exists, the
           --  iterator is left in a state which does not allow it to advance.
  
!          if not Is_Valid (Iter.Curr_Nod, Head) then
              First_Valid_Node
!               (T        => T,
!                Low_Bkt  => Iter.Curr_Idx + 1,
                 High_Bkt => T.Buckets'Last,
!                Idx      => Iter.Curr_Idx,
!                Nod      => Iter.Curr_Nod);
           end if;
  
           Key := Saved.Key;
*************** package body GNAT.Dynamic_HTables is
*** 1044,1051 ****
        -------------
  
        procedure Prepend (Nod : Node_Ptr; Head : Node_Ptr) is
!          pragma Assert (Nod /= null);
!          pragma Assert (Head /= null);
  
           Next : constant Node_Ptr := Head.Next;
  
--- 1145,1152 ----
        -------------
  
        procedure Prepend (Nod : Node_Ptr; Head : Node_Ptr) is
!          pragma Assert (Present (Nod));
!          pragma Assert (Present (Head));
  
           Next : constant Node_Ptr := Head.Next;
  
*************** package body GNAT.Dynamic_HTables is
*** 1057,1067 ****
           Nod.Prev := Head;
        end Prepend;
  
        ---------
        -- Put --
        ---------
  
!       procedure Put (T : Instance; Key : Key_Type; Value : Value_Type) is
           procedure Expand;
           pragma Inline (Expand);
           --  Determine whether hash table T requires expansion, and if so,
--- 1158,1199 ----
           Nod.Prev := Head;
        end Prepend;
  
+       -------------
+       -- Present --
+       -------------
+ 
+       function Present (Bkts : Bucket_Table_Ptr) return Boolean is
+       begin
+          return Bkts /= null;
+       end Present;
+ 
+       -------------
+       -- Present --
+       -------------
+ 
+       function Present (Nod : Node_Ptr) return Boolean is
+       begin
+          return Nod /= null;
+       end Present;
+ 
+       -------------
+       -- Present --
+       -------------
+ 
+       function Present (T : Dynamic_Hash_Table) return Boolean is
+       begin
+          return T /= Nil;
+       end Present;
+ 
        ---------
        -- Put --
        ---------
  
!       procedure Put
!         (T     : Dynamic_Hash_Table;
!          Key   : Key_Type;
!          Value : Value_Type)
!       is
           procedure Expand;
           pragma Inline (Expand);
           --  Determine whether hash table T requires expansion, and if so,
*************** package body GNAT.Dynamic_HTables is
*** 1078,1085 ****
           ------------
  
           procedure Expand is
!             pragma Assert (T /= null);
!             pragma Assert (T.Buckets /= null);
  
              Old_Size : constant Bucket_Range_Type := T.Buckets'Length;
  
--- 1210,1217 ----
           ------------
  
           procedure Expand is
!             pragma Assert (Present (T));
!             pragma Assert (Present (T.Buckets));
  
              Old_Size : constant Bucket_Range_Type := T.Buckets'Length;
  
*************** package body GNAT.Dynamic_HTables is
*** 1099,1105 ****
           ------------------------
  
           procedure Prepend_Or_Replace (Head : Node_Ptr) is
!             pragma Assert (Head /= null);
  
              Nod : Node_Ptr;
  
--- 1231,1237 ----
           ------------------------
  
           procedure Prepend_Or_Replace (Head : Node_Ptr) is
!             pragma Assert (Present (Head));
  
              Nod : Node_Ptr;
  
*************** package body GNAT.Dynamic_HTables is
*** 1166,1172 ****
        -- Reset --
        -----------
  
!       procedure Reset (T : Instance) is
        begin
           Ensure_Created  (T);
           Ensure_Unlocked (T);
--- 1298,1304 ----
        -- Reset --
        -----------
  
!       procedure Reset (T : Dynamic_Hash_Table) is
        begin
           Ensure_Created  (T);
           Ensure_Unlocked (T);
*************** package body GNAT.Dynamic_HTables is
*** 1186,1192 ****
        -- Size --
        ----------
  
!       function Size (T : Instance) return Natural is
        begin
           Ensure_Created (T);
  
--- 1318,1324 ----
        -- Size --
        ----------
  
!       function Size (T : Dynamic_Hash_Table) return Natural is
        begin
           Ensure_Created (T);
  
*************** package body GNAT.Dynamic_HTables is
*** 1197,1209 ****
        -- Unlock --
        ------------
  
!       procedure Unlock (T : Instance) is
        begin
           --  The hash table may be locked multiple times if multiple iterators
           --  are operating over it.
  
           T.Iterators := T.Iterators - 1;
        end Unlock;
!    end Dynamic_HTable;
  
  end GNAT.Dynamic_HTables;
--- 1329,1341 ----
        -- Unlock --
        ------------
  
!       procedure Unlock (T : Dynamic_Hash_Table) is
        begin
           --  The hash table may be locked multiple times if multiple iterators
           --  are operating over it.
  
           T.Iterators := T.Iterators - 1;
        end Unlock;
!    end Dynamic_Hash_Tables;
  
  end GNAT.Dynamic_HTables;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-dynhta.ads gcc-10.1.0/gcc/ada/libgnat/g-dynhta.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-dynhta.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-dynhta.ads	Thu May  7 10:49:59 2020
*************** pragma Compiler_Unit_Warning;
*** 50,55 ****
--- 50,61 ----
  
  package GNAT.Dynamic_HTables is
  
+    function Hash_Two_Keys
+      (Left  : Bucket_Range_Type;
+       Right : Bucket_Range_Type) return Bucket_Range_Type;
+    pragma Inline (Hash_Two_Keys);
+    --  Obtain the hash value of keys Left and Right
+ 
     -------------------
     -- Static_HTable --
     -------------------
*************** package GNAT.Dynamic_HTables is
*** 258,273 ****
        Nil : constant Instance := Instance (Tab.Nil);
     end Simple_HTable;
  
!    --------------------
!    -- Dynamic_HTable --
!    --------------------
  
     --  The following package offers a hash table abstraction with the following
     --  characteristics:
     --
!    --    * Dynamic resizing based on load factor.
!    --    * Creation of multiple instances, of different sizes.
!    --    * Iterable keys.
     --
     --  This type of hash table is best used in scenarios where the size of the
     --  key set is not known. The dynamic resizing aspect allows for performance
--- 264,279 ----
        Nil : constant Instance := Instance (Tab.Nil);
     end Simple_HTable;
  
!    -------------------------
!    -- Dynamic_Hash_Tables --
!    -------------------------
  
     --  The following package offers a hash table abstraction with the following
     --  characteristics:
     --
!    --    * Dynamic resizing based on load factor
!    --    * Creation of multiple instances, of different sizes
!    --    * Iterable keys
     --
     --  This type of hash table is best used in scenarios where the size of the
     --  key set is not known. The dynamic resizing aspect allows for performance
*************** package GNAT.Dynamic_HTables is
*** 275,281 ****
     --
     --  The following use pattern must be employed when operating this table:
     --
!    --    Table : Instance := Create (<some size>);
     --
     --    <various operations>
     --
--- 281,287 ----
     --
     --  The following use pattern must be employed when operating this table:
     --
!    --    Table : Dynamic_Hash_Table := Create (<some size>);
     --
     --    <various operations>
     --
*************** package GNAT.Dynamic_HTables is
*** 327,336 ****
               (Left  : Key_Type;
                Right : Key_Type) return Boolean;
  
        with function Hash (Key : Key_Type) return Bucket_Range_Type;
        --  Map an arbitrary key into the range of buckets
  
!    package Dynamic_HTable is
  
        ----------------------
        -- Table operations --
--- 333,345 ----
               (Left  : Key_Type;
                Right : Key_Type) return Boolean;
  
+       with procedure Destroy_Value (Val : in out Value_Type);
+       --  Value destructor
+ 
        with function Hash (Key : Key_Type) return Bucket_Range_Type;
        --  Map an arbitrary key into the range of buckets
  
!    package Dynamic_Hash_Tables is
  
        ----------------------
        -- Table operations --
*************** package GNAT.Dynamic_HTables is
*** 339,372 ****
        --  The following type denotes a hash table handle. Each instance must be
        --  created using routine Create.
  
!       type Instance is private;
!       Nil : constant Instance;
  
!       function Create (Initial_Size : Positive) return Instance;
        --  Create a new table with bucket capacity Initial_Size. This routine
        --  must be called at the start of a hash table's lifetime.
  
!       procedure Delete (T : Instance; Key : Key_Type);
        --  Delete the value which corresponds to key Key from hash table T. The
        --  routine has no effect if the value is not present in the hash table.
        --  This action will raise Iterated if the hash table has outstanding
        --  iterators. If the load factor drops below Compression_Threshold, the
        --  size of the buckets is decreased by Copression_Factor.
  
!       procedure Destroy (T : in out Instance);
        --  Destroy the contents of hash table T, rendering it unusable. This
        --  routine must be called at the end of a hash table's lifetime. This
        --  action will raise Iterated if the hash table has outstanding
        --  iterators.
  
!       function Get (T : Instance; Key : Key_Type) return Value_Type;
        --  Obtain the value which corresponds to key Key from hash table T. If
        --  the value does not exist, return No_Value.
  
!       function Is_Empty (T : Instance) return Boolean;
        --  Determine whether hash table T is empty
  
!       procedure Put (T : Instance; Key : Key_Type; Value : Value_Type);
        --  Associate value Value with key Key in hash table T. If the table
        --  already contains a mapping of the same key to a previous value, the
        --  previous value is overwritten. This action will raise Iterated if
--- 348,396 ----
        --  The following type denotes a hash table handle. Each instance must be
        --  created using routine Create.
  
!       type Dynamic_Hash_Table is private;
!       Nil : constant Dynamic_Hash_Table;
  
!       function Contains
!         (T   : Dynamic_Hash_Table;
!          Key : Key_Type) return Boolean;
!       --  Determine whether key Key exists in hash table T
! 
!       function Create (Initial_Size : Positive) return Dynamic_Hash_Table;
        --  Create a new table with bucket capacity Initial_Size. This routine
        --  must be called at the start of a hash table's lifetime.
  
!       procedure Delete
!         (T   : Dynamic_Hash_Table;
!          Key : Key_Type);
        --  Delete the value which corresponds to key Key from hash table T. The
        --  routine has no effect if the value is not present in the hash table.
        --  This action will raise Iterated if the hash table has outstanding
        --  iterators. If the load factor drops below Compression_Threshold, the
        --  size of the buckets is decreased by Copression_Factor.
  
!       procedure Destroy (T : in out Dynamic_Hash_Table);
        --  Destroy the contents of hash table T, rendering it unusable. This
        --  routine must be called at the end of a hash table's lifetime. This
        --  action will raise Iterated if the hash table has outstanding
        --  iterators.
  
!       function Get
!         (T   : Dynamic_Hash_Table;
!          Key : Key_Type) return Value_Type;
        --  Obtain the value which corresponds to key Key from hash table T. If
        --  the value does not exist, return No_Value.
  
!       function Is_Empty (T : Dynamic_Hash_Table) return Boolean;
        --  Determine whether hash table T is empty
  
!       function Present (T : Dynamic_Hash_Table) return Boolean;
!       --  Determine whether hash table T exists
! 
!       procedure Put
!         (T     : Dynamic_Hash_Table;
!          Key   : Key_Type;
!          Value : Value_Type);
        --  Associate value Value with key Key in hash table T. If the table
        --  already contains a mapping of the same key to a previous value, the
        --  previous value is overwritten. This action will raise Iterated if
*************** package GNAT.Dynamic_HTables is
*** 374,385 ****
        --  over Expansion_Threshold, the size of the buckets is increased by
        --  Expansion_Factor.
  
!       procedure Reset (T : Instance);
        --  Destroy the contents of hash table T, and reset it to its initial
        --  created state. This action will raise Iterated if the hash table
        --  has outstanding iterators.
  
!       function Size (T : Instance) return Natural;
        --  Obtain the number of key-value pairs in hash table T
  
        -------------------------
--- 398,409 ----
        --  over Expansion_Threshold, the size of the buckets is increased by
        --  Expansion_Factor.
  
!       procedure Reset (T : Dynamic_Hash_Table);
        --  Destroy the contents of hash table T, and reset it to its initial
        --  created state. This action will raise Iterated if the hash table
        --  has outstanding iterators.
  
!       function Size (T : Dynamic_Hash_Table) return Natural;
        --  Obtain the number of key-value pairs in hash table T
  
        -------------------------
*************** package GNAT.Dynamic_HTables is
*** 401,415 ****
  
        type Iterator is private;
  
-       function Iterate (T : Instance) return Iterator;
-       --  Obtain an iterator over the keys of hash table T. This action locks
-       --  all mutation functionality of the associated hash table.
- 
        function Has_Next (Iter : Iterator) return Boolean;
        --  Determine whether iterator Iter has more keys to examine. If the
        --  iterator has been exhausted, restore all mutation functionality of
        --  the associated hash table.
  
        procedure Next (Iter : in out Iterator; Key : out Key_Type);
        --  Return the current key referenced by iterator Iter and advance to
        --  the next available key. If the iterator has been exhausted and
--- 425,439 ----
  
        type Iterator is private;
  
        function Has_Next (Iter : Iterator) return Boolean;
        --  Determine whether iterator Iter has more keys to examine. If the
        --  iterator has been exhausted, restore all mutation functionality of
        --  the associated hash table.
  
+       function Iterate (T : Dynamic_Hash_Table) return Iterator;
+       --  Obtain an iterator over the keys of hash table T. This action locks
+       --  all mutation functionality of the associated hash table.
+ 
        procedure Next (Iter : in out Iterator; Key : out Key_Type);
        --  Return the current key referenced by iterator Iter and advance to
        --  the next available key. If the iterator has been exhausted and
*************** package GNAT.Dynamic_HTables is
*** 455,461 ****
  
        --  The following type represents a hash table
  
!       type Hash_Table is record
           Buckets : Bucket_Table_Ptr := null;
           --  Reference to the compressing / expanding buckets
  
--- 479,485 ----
  
        --  The following type represents a hash table
  
!       type Dynamic_Hash_Table_Attributes is record
           Buckets : Bucket_Table_Ptr := null;
           --  Reference to the compressing / expanding buckets
  
*************** package GNAT.Dynamic_HTables is
*** 469,493 ****
           --  Number of key-value pairs in the buckets
        end record;
  
!       type Instance is access Hash_Table;
!       Nil : constant Instance := null;
  
        --  The following type represents a key iterator
  
        type Iterator is record
!          Idx : Bucket_Range_Type := 0;
           --  Index of the current bucket being examined. This index is always
           --  kept within the range of the buckets.
  
!          Nod : Node_Ptr := null;
           --  Reference to the current node being examined within the current
           --  bucket. The invariant of the iterator requires that this field
           --  always point to a valid node. A value of null indicates that the
           --  iterator is exhausted.
  
!          Table : Instance := null;
           --  Reference to the associated hash table
        end record;
!    end Dynamic_HTable;
  
  end GNAT.Dynamic_HTables;
--- 493,517 ----
           --  Number of key-value pairs in the buckets
        end record;
  
!       type Dynamic_Hash_Table is access Dynamic_Hash_Table_Attributes;
!       Nil : constant Dynamic_Hash_Table := null;
  
        --  The following type represents a key iterator
  
        type Iterator is record
!          Curr_Idx : Bucket_Range_Type := 0;
           --  Index of the current bucket being examined. This index is always
           --  kept within the range of the buckets.
  
!          Curr_Nod : Node_Ptr := null;
           --  Reference to the current node being examined within the current
           --  bucket. The invariant of the iterator requires that this field
           --  always point to a valid node. A value of null indicates that the
           --  iterator is exhausted.
  
!          Table : Dynamic_Hash_Table := null;
           --  Reference to the associated hash table
        end record;
!    end Dynamic_Hash_Tables;
  
  end GNAT.Dynamic_HTables;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-encstr.adb gcc-10.1.0/gcc/ada/libgnat/g-encstr.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-encstr.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-encstr.adb	Thu May  7 10:49:59 2020
*************** package body GNAT.Encode_String is
*** 79,90 ****
        Ptr : Natural;
  
     begin
!       Ptr := S'First;
        for J in S'Range loop
           Encode_Wide_Character (S (J), Result, Ptr);
        end loop;
  
!       Length := Ptr - S'First;
     end Encode_Wide_String;
  
     -----------------------------
--- 79,90 ----
        Ptr : Natural;
  
     begin
!       Ptr := Result'First;
        for J in S'Range loop
           Encode_Wide_Character (S (J), Result, Ptr);
        end loop;
  
!       Length := Ptr - Result'First;
     end Encode_Wide_String;
  
     -----------------------------
*************** package body GNAT.Encode_String is
*** 108,119 ****
        Ptr : Natural;
  
     begin
!       Ptr := S'First;
        for J in S'Range loop
           Encode_Wide_Wide_Character (S (J), Result, Ptr);
        end loop;
  
!       Length := Ptr - S'First;
     end Encode_Wide_Wide_String;
  
     ---------------------------
--- 108,119 ----
        Ptr : Natural;
  
     begin
!       Ptr := Result'First;
        for J in S'Range loop
           Encode_Wide_Wide_Character (S (J), Result, Ptr);
        end loop;
  
!       Length := Ptr - Result'First;
     end Encode_Wide_Wide_String;
  
     ---------------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-expect.adb gcc-10.1.0/gcc/ada/libgnat/g-expect.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-expect.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-expect.adb	Thu May  7 10:49:59 2020
*************** package body GNAT.Expect is
*** 222,236 ****
        Next_Filter    : Filter_List;
  
     begin
!       if Descriptor.Input_Fd /= Invalid_FD then
!          Close (Descriptor.Input_Fd);
!       end if;
  
!       if Descriptor.Error_Fd /= Descriptor.Output_Fd then
           Close (Descriptor.Error_Fd);
        end if;
  
!       Close (Descriptor.Output_Fd);
  
        --  ??? Should have timeouts for different signals
  
--- 222,238 ----
        Next_Filter    : Filter_List;
  
     begin
!       Close_Input (Descriptor);
  
!       if Descriptor.Error_Fd /= Descriptor.Output_Fd
!         and then Descriptor.Error_Fd /= Invalid_FD
!       then
           Close (Descriptor.Error_Fd);
        end if;
  
!       if Descriptor.Output_Fd /= Invalid_FD then
!          Close (Descriptor.Output_Fd);
!       end if;
  
        --  ??? Should have timeouts for different signals
  
*************** package body GNAT.Expect is
*** 267,272 ****
--- 269,295 ----
        Close (Descriptor, Status);
     end Close;
  
+    -----------------
+    -- Close_Input --
+    -----------------
+ 
+    procedure Close_Input (Pid : in out Process_Descriptor) is
+    begin
+       if Pid.Input_Fd /= Invalid_FD then
+          Close (Pid.Input_Fd);
+       end if;
+ 
+       if Pid.Output_Fd = Pid.Input_Fd then
+          Pid.Output_Fd := Invalid_FD;
+       end if;
+ 
+       if Pid.Error_Fd = Pid.Input_Fd then
+          Pid.Error_Fd := Invalid_FD;
+       end if;
+ 
+       Pid.Input_Fd := Invalid_FD;
+    end Close_Input;
+ 
     ------------
     -- Expect --
     ------------
*************** package body GNAT.Expect is
*** 630,636 ****
  
     begin
        for J in Descriptors'Range loop
!          if Descriptors (J) /= null then
              Fds (Fds'First + Fds_Count) := Descriptors (J).Output_Fd;
              Fds_To_Descriptor (Fds'First + Fds_Count) := J;
              Fds_Count := Fds_Count + 1;
--- 653,661 ----
  
     begin
        for J in Descriptors'Range loop
!          if Descriptors (J) /= null
!            and then Descriptors (J).Output_Fd /= Invalid_FD
!          then
              Fds (Fds'First + Fds_Count) := Descriptors (J).Output_Fd;
              Fds_To_Descriptor (Fds'First + Fds_Count) := J;
              Fds_Count := Fds_Count + 1;
*************** package body GNAT.Expect is
*** 644,649 ****
--- 669,682 ----
           end if;
        end loop;
  
+       if Fds_Count = 0 then
+          --  There are no descriptors to monitor, it means that process died.
+ 
+          Result := Expect_Process_Died;
+ 
+          return;
+       end if;
+ 
        declare
           Buffer : aliased String (1 .. Buffer_Size);
           --  Buffer used for input. This is allocated only once, not for
*************** package body GNAT.Expect is
*** 656,663 ****
           --  Loop until we match or we have a timeout
  
           loop
!             Num_Descriptors :=
!               Poll (Fds'Address, Fds_Count, Timeout, D'Access, Is_Set'Address);
  
              case Num_Descriptors is
  
--- 689,705 ----
           --  Loop until we match or we have a timeout
  
           loop
!             --  Poll may be interrupted on Linux by a signal and need to be
!             --  repeated. We don't want to check for errno = EINTER, so just
!             --  attempt to call Poll a few times.
! 
!             for J in 1 .. 3 loop
!                Num_Descriptors :=
!                  Poll
!                    (Fds'Address, Fds_Count, Timeout, D'Access, Is_Set'Address);
! 
!                exit when Num_Descriptors /= -1;
!             end loop;
  
              case Num_Descriptors is
  
*************** package body GNAT.Expect is
*** 667,674 ****
                    Result := Expect_Internal_Error;
  
                    if D /= 0 then
!                      Close (Descriptors (D).Input_Fd);
!                      Descriptors (D).Input_Fd := Invalid_FD;
                    end if;
  
                    return;
--- 709,715 ----
                    Result := Expect_Internal_Error;
  
                    if D /= 0 then
!                      Close_Input (Descriptors (D).all);
                    end if;
  
                    return;
*************** package body GNAT.Expect is
*** 692,709 ****
                             Buffer_Size := 4096;
                          end if;
  
!                         N := Read (Descriptors (D).Output_Fd, Buffer'Address,
!                                    Buffer_Size);
  
                          --  Error or End of file
  
                          if N <= 0 then
!                            --  ??? Note that ddd tries again up to three times
!                            --  in that case. See LiterateA.C:174
! 
!                            Close (Descriptors (D).Input_Fd);
!                            Descriptors (D).Input_Fd := Invalid_FD;
                             Result := Expect_Process_Died;
                             return;
  
                          else
--- 733,756 ----
                             Buffer_Size := 4096;
                          end if;
  
!                         --  Read may be interrupted on Linux by a signal and
!                         --  need to be repeated. We don't want to check for
!                         --  errno = EINTER, so just attempt to read a few
!                         --  times.
! 
!                         for J in 1 .. 3 loop
!                            N := Read (Descriptors (D).Output_Fd,
!                                       Buffer'Address, Buffer_Size);
! 
!                            exit when N > 0;
!                         end loop;
  
                          --  Error or End of file
  
                          if N <= 0 then
!                            Close_Input (Descriptors (D).all);
                             Result := Expect_Process_Died;
+ 
                             return;
  
                          else
*************** package body GNAT.Expect is
*** 925,932 ****
           Send (Process, Input);
        end if;
  
!       Close (Process.Input_Fd);
!       Process.Input_Fd := Invalid_FD;
  
        declare
           Result : Expect_Match;
--- 972,978 ----
           Send (Process, Input);
        end if;
  
!       Close_Input (Process);
  
        declare
           Result : Expect_Match;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-expect.ads gcc-10.1.0/gcc/ada/libgnat/g-expect.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-expect.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-expect.ads	Thu May  7 10:49:59 2020
*************** private
*** 613,618 ****
--- 613,622 ----
     --  spawns the child process (based on Cmd). On systems that support fork,
     --  this procedure is executed inside the newly created process.
  
+    procedure Close_Input (Pid : in out Process_Descriptor);
+    --  Closes input file descriptor. Set Input_Fd to Invalid_Fd as well as
+    --  Output_Fd and Error_Fd when they share same file descriptor.
+ 
     type Process_Descriptor is tagged record
        Pid              : aliased Process_Id := Invalid_Pid;
        Input_Fd         : GNAT.OS_Lib.File_Descriptor := GNAT.OS_Lib.Invalid_FD;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-exptty.adb gcc-10.1.0/gcc/ada/libgnat/g-exptty.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-exptty.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-exptty.adb	Thu May  7 10:49:59 2020
*************** package body GNAT.Expect.TTY is
*** 38,43 ****
--- 38,66 ----
     On_Windows : constant Boolean := Directory_Separator = '\';
     --  True when on Windows
  
+    function Waitpid
+      (Process  : System.Address;
+       Blocking : Integer) return Integer;
+    pragma Import (C, Waitpid, "__gnat_tty_waitpid");
+    --  Wait for a specific process id, and return its exit code
+ 
+    ------------------------
+    -- Is_Process_Running --
+    ------------------------
+ 
+    function Is_Process_Running
+      (Descriptor : in out TTY_Process_Descriptor) return Boolean
+    is
+    begin
+       if Descriptor.Process = System.Null_Address then
+          return False;
+       end if;
+ 
+       Descriptor.Exit_Status := Waitpid (Descriptor.Process, Blocking => 0);
+ 
+       return Descriptor.Exit_Status = Still_Active;
+    end Is_Process_Running;
+ 
     -----------
     -- Close --
     -----------
*************** package body GNAT.Expect.TTY is
*** 49,69 ****
        procedure Terminate_Process (Process : System.Address);
        pragma Import (C, Terminate_Process, "__gnat_terminate_process");
  
-       function Waitpid (Process : System.Address) return Integer;
-       pragma Import (C, Waitpid, "__gnat_tty_waitpid");
-       --  Wait for a specific process id, and return its exit code
- 
        procedure Free_Process (Process : System.Address);
        pragma Import (C, Free_Process, "__gnat_free_process");
  
-       procedure Close_TTY (Process : System.Address);
-       pragma Import (C, Close_TTY, "__gnat_close_tty");
- 
     begin
        --  If we haven't already closed the process
  
        if Descriptor.Process = System.Null_Address then
!          Status := -1;
  
        else
           --  Send a Ctrl-C to the process first. This way, if the launched
--- 72,85 ----
        procedure Terminate_Process (Process : System.Address);
        pragma Import (C, Terminate_Process, "__gnat_terminate_process");
  
        procedure Free_Process (Process : System.Address);
        pragma Import (C, Free_Process, "__gnat_free_process");
  
     begin
        --  If we haven't already closed the process
  
        if Descriptor.Process = System.Null_Address then
!          Status := Descriptor.Exit_Status;
  
        else
           --  Send a Ctrl-C to the process first. This way, if the launched
*************** package body GNAT.Expect.TTY is
*** 75,86 ****
           --  signal, so this needs to be done while the file descriptors are
           --  still open (it used to be after the closes and that was wrong).
  
!          Interrupt (Descriptor);
!          delay (0.05);
! 
!          if Descriptor.Input_Fd /= Invalid_FD then
!             Close (Descriptor.Input_Fd);
!          end if;
  
           if Descriptor.Error_Fd /= Descriptor.Output_Fd
             and then Descriptor.Error_Fd /= Invalid_FD
--- 91,97 ----
           --  signal, so this needs to be done while the file descriptors are
           --  still open (it used to be after the closes and that was wrong).
  
!          Close_Input (Descriptor);
  
           if Descriptor.Error_Fd /= Descriptor.Output_Fd
             and then Descriptor.Error_Fd /= Invalid_FD
*************** package body GNAT.Expect.TTY is
*** 92,102 ****
              Close (Descriptor.Output_Fd);
           end if;
  
!          Terminate_Process (Descriptor.Process);
!          Status := Waitpid (Descriptor.Process);
  
!          if not On_Windows then
!             Close_TTY (Descriptor.Process);
           end if;
  
           Free_Process (Descriptor.Process'Address);
--- 103,127 ----
              Close (Descriptor.Output_Fd);
           end if;
  
!          if Descriptor.Exit_Status = Still_Active then
!             Status := Waitpid (Descriptor.Process, Blocking => 0);
  
!             if Status = Still_Active then
!                --  In theory the process might have died since the check. In
!                --  practice the following calls should not cause any issue.
! 
!                Interrupt (Descriptor);
!                delay (0.05);
!                Terminate_Process (Descriptor.Process);
!                Status := Waitpid (Descriptor.Process, Blocking => 1);
!                Descriptor.Exit_Status := Status;
!             end if;
! 
!          else
!             --  If Exit_Status is not STILL_ACTIVE just retrieve the saved
!             --  exit status.
! 
!             Status := Descriptor.Exit_Status;
           end if;
  
           Free_Process (Descriptor.Process'Address);
*************** package body GNAT.Expect.TTY is
*** 113,118 ****
--- 138,184 ----
        Close (Descriptor, Status);
     end Close;
  
+    -----------------
+    -- Close_Input --
+    -----------------
+ 
+    overriding procedure Close_Input
+      (Descriptor : in out TTY_Process_Descriptor)
+    is
+       function TTY_FD
+         (Handle : System.Address) return GNAT.OS_Lib.File_Descriptor;
+       pragma Import (C, TTY_FD, "__gnat_tty_fd");
+ 
+       procedure Close_TTY (Process : System.Address);
+       pragma Import (C, Close_TTY, "__gnat_close_tty");
+ 
+    begin
+       if not On_Windows and then Descriptor.Process /= System.Null_Address then
+          --  Check whether input/output/error streams use master descriptor and
+          --  reset corresponding members.
+ 
+          if Descriptor.Input_Fd = TTY_FD (Descriptor.Process) then
+             Descriptor.Input_Fd := Invalid_FD;
+          end if;
+ 
+          if Descriptor.Output_Fd = TTY_FD (Descriptor.Process) then
+             Descriptor.Output_Fd := Invalid_FD;
+          end if;
+ 
+          if Descriptor.Error_Fd = TTY_FD (Descriptor.Process) then
+             Descriptor.Error_Fd := Invalid_FD;
+          end if;
+ 
+          --  Close master descriptor.
+ 
+          Close_TTY (Descriptor.Process);
+       end if;
+ 
+       --  Call parent's implementation to close all remaining descriptors.
+ 
+       Process_Descriptor (Descriptor).Close_Input;
+    end Close_Input;
+ 
     -----------------------------
     -- Close_Pseudo_Descriptor --
     -----------------------------
*************** package body GNAT.Expect.TTY is
*** 258,263 ****
--- 324,330 ----
        pragma Import (C, Internal, "__gnat_setup_communication");
  
     begin
+       Pid.Exit_Status := Still_Active;
        if Internal (Pid.Process'Address) /= 0 then
           raise Invalid_Process with "cannot setup communication.";
        end if;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-exptty.ads gcc-10.1.0/gcc/ada/libgnat/g-exptty.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-exptty.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-exptty.ads	Thu May  7 10:49:59 2020
*************** package GNAT.Expect.TTY is
*** 92,97 ****
--- 92,102 ----
        Columns    : Natural);
     --  Sets up the size of the terminal as reported to the spawned process
  
+    function Is_Process_Running
+       (Descriptor : in out TTY_Process_Descriptor)
+       return Boolean;
+    --  Returns True if the process is still alive
+ 
  private
  
     --  All declarations in the private part must be fully commented ???
*************** private
*** 129,137 ****
        Cmd   : String;
        Args  : System.Address);
  
     type TTY_Process_Descriptor is new Process_Descriptor with record
!       Process   : System.Address;  --  Underlying structure used in C
!       Use_Pipes : Boolean := True;
     end record;
  
  end GNAT.Expect.TTY;
--- 134,149 ----
        Cmd   : String;
        Args  : System.Address);
  
+    procedure Close_Input (Descriptor : in out TTY_Process_Descriptor);
+ 
+    Still_Active : constant Integer := -1;
+ 
     type TTY_Process_Descriptor is new Process_Descriptor with record
!       Process     : System.Address := System.Null_Address;
!       --  Underlying structure used in C
!       Exit_Status : Integer := Still_Active;
!       --  Holds the exit status of the process
!       Use_Pipes   : Boolean := True;
     end record;
  
  end GNAT.Expect.TTY;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-graphs.adb gcc-10.1.0/gcc/ada/libgnat/g-graphs.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-graphs.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/g-graphs.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,1491 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                           G N A T . G R A P H S                          --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --             Copyright (C) 2018-2019, Free Software Foundation, Inc.      --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Ada.Unchecked_Deallocation;
+ 
+ package body GNAT.Graphs is
+ 
+    -----------------------
+    -- Local subprograms --
+    -----------------------
+ 
+    function Sequence_Next_Component return Component_Id;
+    --  Produce the next handle for a component. The handle is guaranteed to be
+    --  unique across all graphs.
+ 
+    --------------------
+    -- Directed_Graph --
+    --------------------
+ 
+    package body Directed_Graphs is
+ 
+       -----------------------
+       -- Local subprograms --
+       -----------------------
+ 
+       procedure Add_Component
+         (G        : Directed_Graph;
+          Comp     : Component_Id;
+          Vertices : Vertex_List.Doubly_Linked_List);
+       pragma Inline (Add_Component);
+       --  Add component Comp which houses vertices Vertices to graph G
+ 
+       procedure Ensure_Created (G : Directed_Graph);
+       pragma Inline (Ensure_Created);
+       --  Verify that graph G is created. Raise Not_Created if this is not the
+       --  case.
+ 
+       procedure Ensure_Not_Present
+         (G : Directed_Graph;
+          E : Edge_Id);
+       pragma Inline (Ensure_Not_Present);
+       --  Verify that graph G lacks edge E. Raise Duplicate_Edge if this is not
+       --  the case.
+ 
+       procedure Ensure_Not_Present
+         (G : Directed_Graph;
+          V : Vertex_Id);
+       pragma Inline (Ensure_Not_Present);
+       --  Verify that graph G lacks vertex V. Raise Duplicate_Vertex if this is
+       --  not the case.
+ 
+       procedure Ensure_Present
+         (G    : Directed_Graph;
+          Comp : Component_Id);
+       pragma Inline (Ensure_Present);
+       --  Verify that component Comp exists in graph G. Raise Missing_Component
+       --  if this is not the case.
+ 
+       procedure Ensure_Present
+         (G : Directed_Graph;
+          E : Edge_Id);
+       pragma Inline (Ensure_Present);
+       --  Verify that edge E is present in graph G. Raise Missing_Edge if this
+       --  is not the case.
+ 
+       procedure Ensure_Present
+         (G : Directed_Graph;
+          V : Vertex_Id);
+       pragma Inline (Ensure_Present);
+       --  Verify that vertex V is present in graph G. Raise Missing_Vertex if
+       --  this is not the case.
+ 
+       procedure Free is
+         new Ada.Unchecked_Deallocation
+               (Directed_Graph_Attributes, Directed_Graph);
+ 
+       function Get_Component_Attributes
+         (G    : Directed_Graph;
+          Comp : Component_Id) return Component_Attributes;
+       pragma Inline (Get_Component_Attributes);
+       --  Obtain the attributes of component Comp of graph G
+ 
+       function Get_Edge_Attributes
+         (G : Directed_Graph;
+          E : Edge_Id) return Edge_Attributes;
+       pragma Inline (Get_Edge_Attributes);
+       --  Obtain the attributes of edge E of graph G
+ 
+       function Get_Vertex_Attributes
+         (G : Directed_Graph;
+          V : Vertex_Id) return Vertex_Attributes;
+       pragma Inline (Get_Vertex_Attributes);
+       --  Obtain the attributes of vertex V of graph G
+ 
+       function Get_Outgoing_Edges
+         (G : Directed_Graph;
+          V : Vertex_Id) return Edge_Set.Membership_Set;
+       pragma Inline (Get_Outgoing_Edges);
+       --  Obtain the Outgoing_Edges attribute of vertex V of graph G
+ 
+       function Get_Vertices
+         (G    : Directed_Graph;
+          Comp : Component_Id) return Vertex_List.Doubly_Linked_List;
+       pragma Inline (Get_Vertices);
+       --  Obtain the Vertices attribute of component Comp of graph G
+ 
+       procedure Set_Component
+         (G   : Directed_Graph;
+          V   : Vertex_Id;
+          Val : Component_Id);
+       pragma Inline (Set_Component);
+       --  Set attribute Component of vertex V of graph G to value Val
+ 
+       procedure Set_Outgoing_Edges
+         (G   : Directed_Graph;
+          V   : Vertex_Id;
+          Val : Edge_Set.Membership_Set);
+       pragma Inline (Set_Outgoing_Edges);
+       --  Set attribute Outgoing_Edges of vertex V of graph G to value Val
+ 
+       procedure Set_Vertex_Attributes
+         (G   : Directed_Graph;
+          V   : Vertex_Id;
+          Val : Vertex_Attributes);
+       pragma Inline (Set_Vertex_Attributes);
+       --  Set the attributes of vertex V of graph G to value Val
+ 
+       -------------------
+       -- Add_Component --
+       -------------------
+ 
+       procedure Add_Component
+         (G        : Directed_Graph;
+          Comp     : Component_Id;
+          Vertices : Vertex_List.Doubly_Linked_List)
+       is
+       begin
+          pragma Assert (Present (G));
+ 
+          --  Add the component to the set of all components in the graph
+ 
+          Component_Map.Put
+            (T     => G.Components,
+             Key   => Comp,
+             Value => (Vertices => Vertices));
+       end Add_Component;
+ 
+       --------------
+       -- Add_Edge --
+       --------------
+ 
+       procedure Add_Edge
+         (G           : Directed_Graph;
+          E           : Edge_Id;
+          Source      : Vertex_Id;
+          Destination : Vertex_Id)
+       is
+       begin
+          Ensure_Created (G);
+          Ensure_Not_Present (G, E);
+          Ensure_Present (G, Source);
+          Ensure_Present (G, Destination);
+ 
+          --  Add the edge to the set of all edges in the graph
+ 
+          Edge_Map.Put
+            (T     => G.All_Edges,
+             Key   => E,
+             Value =>
+               (Destination => Destination,
+                Source      => Source));
+ 
+          --  Associate the edge with its source vertex which effectively "owns"
+          --  the edge.
+ 
+          Edge_Set.Insert
+            (S    => Get_Outgoing_Edges (G, Source),
+             Elem => E);
+       end Add_Edge;
+ 
+       ----------------
+       -- Add_Vertex --
+       ----------------
+ 
+       procedure Add_Vertex
+         (G : Directed_Graph;
+          V : Vertex_Id)
+       is
+       begin
+          Ensure_Created (G);
+          Ensure_Not_Present (G, V);
+ 
+          --  Add the vertex to the set of all vertices in the graph
+ 
+          Vertex_Map.Put
+            (T     => G.All_Vertices,
+             Key   => V,
+             Value =>
+               (Component      => No_Component,
+                Outgoing_Edges => Edge_Set.Nil));
+ 
+          --  It is assumed that the vertex will have at least one outgoing
+          --  edge. It is important not to create the set of edges above as
+          --  the call to Put may fail in case the vertices are iterated.
+          --  This would lead to a memory leak because the set would not be
+          --  reclaimed.
+ 
+          Set_Outgoing_Edges (G, V, Edge_Set.Create (1));
+       end Add_Vertex;
+ 
+       ---------------
+       -- Component --
+       ---------------
+ 
+       function Component
+         (G : Directed_Graph;
+          V : Vertex_Id) return Component_Id
+       is
+       begin
+          Ensure_Created (G);
+          Ensure_Present (G, V);
+ 
+          return Get_Vertex_Attributes (G, V).Component;
+       end Component;
+ 
+       ------------------------
+       -- Contains_Component --
+       ------------------------
+ 
+       function Contains_Component
+         (G    : Directed_Graph;
+          Comp : Component_Id) return Boolean
+       is
+       begin
+          Ensure_Created (G);
+ 
+          return Component_Map.Contains (G.Components, Comp);
+       end Contains_Component;
+ 
+       -------------------
+       -- Contains_Edge --
+       -------------------
+ 
+       function Contains_Edge
+         (G : Directed_Graph;
+          E : Edge_Id) return Boolean
+       is
+       begin
+          Ensure_Created (G);
+ 
+          return Edge_Map.Contains (G.All_Edges, E);
+       end Contains_Edge;
+ 
+       ---------------------
+       -- Contains_Vertex --
+       ---------------------
+ 
+       function Contains_Vertex
+         (G : Directed_Graph;
+          V : Vertex_Id) return Boolean
+       is
+       begin
+          Ensure_Created (G);
+ 
+          return Vertex_Map.Contains (G.All_Vertices, V);
+       end Contains_Vertex;
+ 
+       ------------
+       -- Create --
+       ------------
+ 
+       function Create
+         (Initial_Vertices : Positive;
+          Initial_Edges    : Positive) return Directed_Graph
+       is
+          G : constant Directed_Graph := new Directed_Graph_Attributes;
+ 
+       begin
+          G.All_Edges    := Edge_Map.Create      (Initial_Edges);
+          G.All_Vertices := Vertex_Map.Create    (Initial_Vertices);
+          G.Components   := Component_Map.Create (Initial_Vertices);
+ 
+          return G;
+       end Create;
+ 
+       -----------------
+       -- Delete_Edge --
+       -----------------
+ 
+       procedure Delete_Edge
+         (G : Directed_Graph;
+          E : Edge_Id)
+       is
+          Source : Vertex_Id;
+ 
+       begin
+          Ensure_Created (G);
+          Ensure_Present (G, E);
+ 
+          Source := Source_Vertex (G, E);
+          Ensure_Present (G, Source);
+ 
+          --  Delete the edge from its source vertex which effectively "owns"
+          --  the edge.
+ 
+          Edge_Set.Delete (Get_Outgoing_Edges (G, Source), E);
+ 
+          --  Delete the edge from the set of all edges
+ 
+          Edge_Map.Delete (G.All_Edges, E);
+       end Delete_Edge;
+ 
+       ------------------------
+       -- Destination_Vertex --
+       ------------------------
+ 
+       function Destination_Vertex
+         (G : Directed_Graph;
+          E : Edge_Id) return Vertex_Id
+       is
+       begin
+          Ensure_Created (G);
+          Ensure_Present (G, E);
+ 
+          return Get_Edge_Attributes (G, E).Destination;
+       end Destination_Vertex;
+ 
+       -------------
+       -- Destroy --
+       -------------
+ 
+       procedure Destroy (G : in out Directed_Graph) is
+       begin
+          Ensure_Created (G);
+ 
+          Edge_Map.Destroy      (G.All_Edges);
+          Vertex_Map.Destroy    (G.All_Vertices);
+          Component_Map.Destroy (G.Components);
+ 
+          Free (G);
+       end Destroy;
+ 
+       ----------------------------------
+       -- Destroy_Component_Attributes --
+       ----------------------------------
+ 
+       procedure Destroy_Component_Attributes
+         (Attrs : in out Component_Attributes)
+       is
+       begin
+          Vertex_List.Destroy (Attrs.Vertices);
+       end Destroy_Component_Attributes;
+ 
+       -----------------------------
+       -- Destroy_Edge_Attributes --
+       -----------------------------
+ 
+       procedure Destroy_Edge_Attributes (Attrs : in out Edge_Attributes) is
+          pragma Unreferenced (Attrs);
+       begin
+          null;
+       end Destroy_Edge_Attributes;
+ 
+       --------------------
+       -- Destroy_Vertex --
+       --------------------
+ 
+       procedure Destroy_Vertex (V : in out Vertex_Id) is
+          pragma Unreferenced (V);
+       begin
+          null;
+       end Destroy_Vertex;
+ 
+       -------------------------------
+       -- Destroy_Vertex_Attributes --
+       -------------------------------
+ 
+       procedure Destroy_Vertex_Attributes (Attrs : in out Vertex_Attributes) is
+       begin
+          Edge_Set.Destroy (Attrs.Outgoing_Edges);
+       end Destroy_Vertex_Attributes;
+ 
+       --------------------
+       -- Ensure_Created --
+       --------------------
+ 
+       procedure Ensure_Created (G : Directed_Graph) is
+       begin
+          if not Present (G) then
+             raise Not_Created;
+          end if;
+       end Ensure_Created;
+ 
+       ------------------------
+       -- Ensure_Not_Present --
+       ------------------------
+ 
+       procedure Ensure_Not_Present
+         (G : Directed_Graph;
+          E : Edge_Id)
+       is
+       begin
+          if Contains_Edge (G, E) then
+             raise Duplicate_Edge;
+          end if;
+       end Ensure_Not_Present;
+ 
+       ------------------------
+       -- Ensure_Not_Present --
+       ------------------------
+ 
+       procedure Ensure_Not_Present
+         (G : Directed_Graph;
+          V : Vertex_Id)
+       is
+       begin
+          if Contains_Vertex (G, V) then
+             raise Duplicate_Vertex;
+          end if;
+       end Ensure_Not_Present;
+ 
+       --------------------
+       -- Ensure_Present --
+       --------------------
+ 
+       procedure Ensure_Present
+         (G    : Directed_Graph;
+          Comp : Component_Id)
+       is
+       begin
+          if not Contains_Component (G, Comp) then
+             raise Missing_Component;
+          end if;
+       end Ensure_Present;
+ 
+       --------------------
+       -- Ensure_Present --
+       --------------------
+ 
+       procedure Ensure_Present
+         (G : Directed_Graph;
+          E : Edge_Id)
+       is
+       begin
+          if not Contains_Edge (G, E) then
+             raise Missing_Edge;
+          end if;
+       end Ensure_Present;
+ 
+       --------------------
+       -- Ensure_Present --
+       --------------------
+ 
+       procedure Ensure_Present
+         (G : Directed_Graph;
+          V : Vertex_Id)
+       is
+       begin
+          if not Contains_Vertex (G, V) then
+             raise Missing_Vertex;
+          end if;
+       end Ensure_Present;
+ 
+       ---------------------
+       -- Find_Components --
+       ---------------------
+ 
+       procedure Find_Components (G : Directed_Graph) is
+ 
+          --  The components of graph G are discovered using Tarjan's strongly
+          --  connected component algorithm. Do not modify this code unless you
+          --  intimately understand the algorithm.
+ 
+          ----------------
+          -- Tarjan_Map --
+          ----------------
+ 
+          type Visitation_Number is new Natural;
+          No_Visitation_Number    : constant Visitation_Number :=
+                                       Visitation_Number'First;
+          First_Visitation_Number : constant Visitation_Number :=
+                                      No_Visitation_Number + 1;
+ 
+          type Tarjan_Attributes is record
+             Index : Visitation_Number := No_Visitation_Number;
+             --  Visitation number
+ 
+             Low_Link : Visitation_Number := No_Visitation_Number;
+             --  Lowest visitation number
+ 
+             On_Stack : Boolean := False;
+             --  Set when the corresponding vertex appears on the Stack
+          end record;
+ 
+          No_Tarjan_Attributes : constant Tarjan_Attributes :=
+            (Index    => No_Visitation_Number,
+             Low_Link => No_Visitation_Number,
+             On_Stack => False);
+ 
+          procedure Destroy_Tarjan_Attributes
+            (Attrs : in out Tarjan_Attributes);
+          --  Destroy the contents of attributes Attrs
+ 
+          package Tarjan_Map is new Dynamic_Hash_Tables
+            (Key_Type              => Vertex_Id,
+             Value_Type            => Tarjan_Attributes,
+             No_Value              => No_Tarjan_Attributes,
+             Expansion_Threshold   => 1.5,
+             Expansion_Factor      => 2,
+             Compression_Threshold => 0.3,
+             Compression_Factor    => 2,
+             "="                   => Same_Vertex,
+             Destroy_Value         => Destroy_Tarjan_Attributes,
+             Hash                  => Hash_Vertex);
+ 
+          ------------------
+          -- Tarjan_Stack --
+          ------------------
+ 
+          package Tarjan_Stack is new Doubly_Linked_Lists
+            (Element_Type    => Vertex_Id,
+             "="             => Same_Vertex,
+             Destroy_Element => Destroy_Vertex);
+ 
+          -----------------
+          -- Global data --
+          -----------------
+ 
+          Attrs : Tarjan_Map.Dynamic_Hash_Table   := Tarjan_Map.Nil;
+          Stack : Tarjan_Stack.Doubly_Linked_List := Tarjan_Stack.Nil;
+ 
+          -----------------------
+          -- Local subprograms --
+          -----------------------
+ 
+          procedure Associate_All_Vertices;
+          pragma Inline (Associate_All_Vertices);
+          --  Associate all vertices in the graph with the corresponding
+          --  components that house them.
+ 
+          procedure Associate_Vertices (Comp : Component_Id);
+          pragma Inline (Associate_Vertices);
+          --  Associate all vertices of component Comp with the component
+ 
+          procedure Create_Component (V : Vertex_Id);
+          pragma Inline (Create_Component);
+          --  Create a new component with root vertex V
+ 
+          function Get_Tarjan_Attributes
+            (V : Vertex_Id) return Tarjan_Attributes;
+          pragma Inline (Get_Tarjan_Attributes);
+          --  Obtain the Tarjan attributes of vertex V
+ 
+          function Index (V : Vertex_Id) return Visitation_Number;
+          pragma Inline (Index);
+          --  Obtain the Index attribute of vertex V
+ 
+          procedure Initialize_Components;
+          pragma Inline (Initialize_Components);
+          --  Initialize or reinitialize the components of the graph
+ 
+          function Is_Visited (V : Vertex_Id) return Boolean;
+          pragma Inline (Is_Visited);
+          --  Determine whether vertex V has been visited
+ 
+          function Low_Link (V : Vertex_Id) return Visitation_Number;
+          pragma Inline (Low_Link);
+          --  Obtain the Low_Link attribute of vertex V
+ 
+          function On_Stack (V : Vertex_Id) return Boolean;
+          pragma Inline (On_Stack);
+          --  Obtain the On_Stack attribute of vertex V
+ 
+          function Pop return Vertex_Id;
+          pragma Inline (Pop);
+          --  Pop a vertex off Stack
+ 
+          procedure Push (V : Vertex_Id);
+          pragma Inline (Push);
+          --  Push vertex V on Stack
+ 
+          procedure Record_Visit (V : Vertex_Id);
+          pragma Inline (Record_Visit);
+          --  Save the visitation of vertex V by setting relevant attributes
+ 
+          function Sequence_Next_Index return Visitation_Number;
+          pragma Inline (Sequence_Next_Index);
+          --  Procedure the next visitation number of the DFS traversal
+ 
+          procedure Set_Index
+            (V   : Vertex_Id;
+             Val : Visitation_Number);
+          pragma Inline (Set_Index);
+          --  Set attribute Index of vertex V to value Val
+ 
+          procedure Set_Low_Link
+            (V   : Vertex_Id;
+             Val : Visitation_Number);
+          pragma Inline (Set_Low_Link);
+          --  Set attribute Low_Link of vertex V to value Val
+ 
+          procedure Set_On_Stack
+            (V   : Vertex_Id;
+             Val : Boolean);
+          pragma Inline (Set_On_Stack);
+          --  Set attribute On_Stack of vertex V to value Val
+ 
+          procedure Set_Tarjan_Attributes
+            (V   : Vertex_Id;
+             Val : Tarjan_Attributes);
+          pragma Inline (Set_Tarjan_Attributes);
+          --  Set the attributes of vertex V to value Val
+ 
+          procedure Visit_Successors (V : Vertex_Id);
+          pragma Inline (Visit_Successors);
+          --  Visit the successors of vertex V
+ 
+          procedure Visit_Vertex (V : Vertex_Id);
+          pragma Inline (Visit_Vertex);
+          --  Visit single vertex V
+ 
+          procedure Visit_Vertices;
+          pragma Inline (Visit_Vertices);
+          --  Visit all vertices in the graph
+ 
+          ----------------------------
+          -- Associate_All_Vertices --
+          ----------------------------
+ 
+          procedure Associate_All_Vertices is
+             Comp : Component_Id;
+             Iter : Component_Iterator;
+ 
+          begin
+             Iter := Iterate_Components (G);
+             while Has_Next (Iter) loop
+                Next (Iter, Comp);
+ 
+                Associate_Vertices (Comp);
+             end loop;
+          end Associate_All_Vertices;
+ 
+          ------------------------
+          -- Associate_Vertices --
+          ------------------------
+ 
+          procedure Associate_Vertices (Comp : Component_Id) is
+             Iter : Component_Vertex_Iterator;
+             V    : Vertex_Id;
+ 
+          begin
+             Iter := Iterate_Component_Vertices (G, Comp);
+             while Has_Next (Iter) loop
+                Next (Iter, V);
+ 
+                Set_Component (G, V, Comp);
+             end loop;
+          end Associate_Vertices;
+ 
+          ----------------------
+          -- Create_Component --
+          ----------------------
+ 
+          procedure Create_Component (V : Vertex_Id) is
+             Curr_V   : Vertex_Id;
+             Vertices : Vertex_List.Doubly_Linked_List;
+ 
+          begin
+             Vertices := Vertex_List.Create;
+ 
+             --  Collect all vertices that comprise the current component by
+             --  popping the stack until reaching the root vertex V.
+ 
+             loop
+                Curr_V := Pop;
+                Vertex_List.Append (Vertices, Curr_V);
+ 
+                exit when Same_Vertex (Curr_V, V);
+             end loop;
+ 
+             Add_Component
+               (G        => G,
+                Comp     => Sequence_Next_Component,
+                Vertices => Vertices);
+          end Create_Component;
+ 
+          -------------------------------
+          -- Destroy_Tarjan_Attributes --
+          -------------------------------
+ 
+          procedure Destroy_Tarjan_Attributes
+            (Attrs : in out Tarjan_Attributes)
+          is
+             pragma Unreferenced (Attrs);
+          begin
+             null;
+          end Destroy_Tarjan_Attributes;
+ 
+          ---------------------------
+          -- Get_Tarjan_Attributes --
+          ---------------------------
+ 
+          function Get_Tarjan_Attributes
+            (V : Vertex_Id) return Tarjan_Attributes
+          is
+          begin
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             return Tarjan_Map.Get (Attrs, V);
+          end Get_Tarjan_Attributes;
+ 
+          -----------
+          -- Index --
+          -----------
+ 
+          function Index (V : Vertex_Id) return Visitation_Number is
+          begin
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             return Get_Tarjan_Attributes (V).Index;
+          end Index;
+ 
+          ---------------------------
+          -- Initialize_Components --
+          ---------------------------
+ 
+          procedure Initialize_Components is
+          begin
+             pragma Assert (Present (G));
+ 
+             --  The graph already contains a set of components. Reinitialize
+             --  them in order to accommodate the new set of components about to
+             --  be computed.
+ 
+             if Number_Of_Components (G) > 0 then
+                Component_Map.Destroy (G.Components);
+                G.Components := Component_Map.Create (Number_Of_Vertices (G));
+             end if;
+          end Initialize_Components;
+ 
+          ----------------
+          -- Is_Visited --
+          ----------------
+ 
+          function Is_Visited (V : Vertex_Id) return Boolean is
+          begin
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             return Index (V) /= No_Visitation_Number;
+          end Is_Visited;
+ 
+          --------------
+          -- Low_Link --
+          --------------
+ 
+          function Low_Link (V : Vertex_Id) return Visitation_Number is
+          begin
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             return Get_Tarjan_Attributes (V).Low_Link;
+          end Low_Link;
+ 
+          --------------
+          -- On_Stack --
+          --------------
+ 
+          function On_Stack (V : Vertex_Id) return Boolean is
+          begin
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             return Get_Tarjan_Attributes (V).On_Stack;
+          end On_Stack;
+ 
+          ---------
+          -- Pop --
+          ---------
+ 
+          function Pop return Vertex_Id is
+             V : Vertex_Id;
+ 
+          begin
+             V := Tarjan_Stack.Last (Stack);
+             Tarjan_Stack.Delete_Last (Stack);
+             Set_On_Stack (V, False);
+ 
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             return V;
+          end Pop;
+ 
+          ----------
+          -- Push --
+          ----------
+ 
+          procedure Push (V : Vertex_Id) is
+          begin
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             Tarjan_Stack.Append (Stack, V);
+             Set_On_Stack (V, True);
+          end Push;
+ 
+          ------------------
+          -- Record_Visit --
+          ------------------
+ 
+          procedure Record_Visit (V : Vertex_Id) is
+             Index : constant Visitation_Number := Sequence_Next_Index;
+ 
+          begin
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             Set_Index    (V, Index);
+             Set_Low_Link (V, Index);
+          end Record_Visit;
+ 
+          -------------------------
+          -- Sequence_Next_Index --
+          -------------------------
+ 
+          Index_Sequencer : Visitation_Number := First_Visitation_Number;
+          --  The counter for visitation numbers. Do not directly manipulate its
+          --  value because this will destroy the Index and Low_Link invariants
+          --  of the algorithm.
+ 
+          function Sequence_Next_Index return Visitation_Number is
+             Index : constant Visitation_Number := Index_Sequencer;
+ 
+          begin
+             Index_Sequencer := Index_Sequencer + 1;
+             return Index;
+          end Sequence_Next_Index;
+ 
+          ---------------
+          -- Set_Index --
+          ---------------
+ 
+          procedure Set_Index
+            (V   : Vertex_Id;
+             Val : Visitation_Number)
+          is
+             TA : Tarjan_Attributes;
+ 
+          begin
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             TA := Get_Tarjan_Attributes (V);
+             TA.Index := Val;
+             Set_Tarjan_Attributes (V, TA);
+          end Set_Index;
+ 
+          ------------------
+          -- Set_Low_Link --
+          ------------------
+ 
+          procedure Set_Low_Link
+            (V   : Vertex_Id;
+             Val : Visitation_Number)
+          is
+             TA : Tarjan_Attributes;
+ 
+          begin
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             TA := Get_Tarjan_Attributes (V);
+             TA.Low_Link := Val;
+             Set_Tarjan_Attributes (V, TA);
+          end Set_Low_Link;
+ 
+          ------------------
+          -- Set_On_Stack --
+          ------------------
+ 
+          procedure Set_On_Stack
+            (V   : Vertex_Id;
+             Val : Boolean)
+          is
+             TA : Tarjan_Attributes;
+ 
+          begin
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             TA := Get_Tarjan_Attributes (V);
+             TA.On_Stack := Val;
+             Set_Tarjan_Attributes (V, TA);
+          end Set_On_Stack;
+ 
+          ---------------------------
+          -- Set_Tarjan_Attributes --
+          ---------------------------
+ 
+          procedure Set_Tarjan_Attributes
+            (V   : Vertex_Id;
+             Val : Tarjan_Attributes)
+          is
+          begin
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             Tarjan_Map.Put (Attrs, V, Val);
+          end Set_Tarjan_Attributes;
+ 
+          ----------------------
+          -- Visit_Successors --
+          ----------------------
+ 
+          procedure Visit_Successors (V : Vertex_Id) is
+             E    : Edge_Id;
+             Iter : Outgoing_Edge_Iterator;
+             Succ : Vertex_Id;
+ 
+          begin
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             Iter := Iterate_Outgoing_Edges (G, V);
+             while Has_Next (Iter) loop
+                Next (Iter, E);
+ 
+                Succ := Destination_Vertex (G, E);
+                pragma Assert (Contains_Vertex (G, Succ));
+ 
+                --  The current successor has not been visited yet. Extend the
+                --  DFS traversal into it.
+ 
+                if not Is_Visited (Succ) then
+                   Visit_Vertex (Succ);
+ 
+                   Set_Low_Link (V,
+                     Visitation_Number'Min (Low_Link (V), Low_Link (Succ)));
+ 
+                --  The current successor has been visited, and still remains on
+                --  the stack which indicates that it does not participate in a
+                --  component yet.
+ 
+                elsif On_Stack (Succ) then
+                   Set_Low_Link (V,
+                     Visitation_Number'Min (Low_Link (V), Index (Succ)));
+                end if;
+             end loop;
+          end Visit_Successors;
+ 
+          ------------------
+          -- Visit_Vertex --
+          ------------------
+ 
+          procedure Visit_Vertex (V : Vertex_Id) is
+          begin
+             pragma Assert (Present (G));
+             pragma Assert (Contains_Vertex (G, V));
+ 
+             if not Is_Visited (V) then
+                Record_Visit     (V);
+                Push             (V);
+                Visit_Successors (V);
+ 
+                --  The current vertex is the root of a component
+ 
+                if Low_Link (V) = Index (V) then
+                   Create_Component (V);
+                end if;
+             end if;
+          end Visit_Vertex;
+ 
+          --------------------
+          -- Visit_Vertices --
+          --------------------
+ 
+          procedure Visit_Vertices is
+             Iter : All_Vertex_Iterator;
+             V    : Vertex_Id;
+ 
+          begin
+             Iter := Iterate_All_Vertices (G);
+             while Has_Next (Iter) loop
+                Next (Iter, V);
+ 
+                Visit_Vertex (V);
+             end loop;
+          end Visit_Vertices;
+ 
+       --  Start of processing for Find_Components
+ 
+       begin
+          --  Initialize or reinitialize the components of the graph
+ 
+          Initialize_Components;
+ 
+          --  Prepare the extra attributes needed for each vertex, global
+          --  visitation number, and the stack where examined vertices are
+          --  placed.
+ 
+          Attrs := Tarjan_Map.Create (Number_Of_Vertices (G));
+          Stack := Tarjan_Stack.Create;
+ 
+          --  Start the DFS traversal of Tarjan's SCC algorithm
+ 
+          Visit_Vertices;
+ 
+          Tarjan_Map.Destroy   (Attrs);
+          Tarjan_Stack.Destroy (Stack);
+ 
+          --  Associate each vertex with the component it belongs to
+ 
+          Associate_All_Vertices;
+       end Find_Components;
+ 
+       ------------------------------
+       -- Get_Component_Attributes --
+       ------------------------------
+ 
+       function Get_Component_Attributes
+         (G    : Directed_Graph;
+          Comp : Component_Id) return Component_Attributes
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Contains_Component (G, Comp));
+ 
+          return Component_Map.Get (G.Components, Comp);
+       end Get_Component_Attributes;
+ 
+       -------------------------
+       -- Get_Edge_Attributes --
+       -------------------------
+ 
+       function Get_Edge_Attributes
+         (G : Directed_Graph;
+          E : Edge_Id) return Edge_Attributes
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Contains_Edge (G, E));
+ 
+          return Edge_Map.Get (G.All_Edges, E);
+       end Get_Edge_Attributes;
+ 
+       ---------------------------
+       -- Get_Vertex_Attributes --
+       ---------------------------
+ 
+       function Get_Vertex_Attributes
+         (G : Directed_Graph;
+          V : Vertex_Id) return Vertex_Attributes
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Contains_Vertex (G, V));
+ 
+          return Vertex_Map.Get (G.All_Vertices, V);
+       end Get_Vertex_Attributes;
+ 
+       ------------------------
+       -- Get_Outgoing_Edges --
+       ------------------------
+ 
+       function Get_Outgoing_Edges
+         (G : Directed_Graph;
+          V : Vertex_Id) return Edge_Set.Membership_Set
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Contains_Vertex (G, V));
+ 
+          return Get_Vertex_Attributes (G, V).Outgoing_Edges;
+       end Get_Outgoing_Edges;
+ 
+       ------------------
+       -- Get_Vertices --
+       ------------------
+ 
+       function Get_Vertices
+         (G    : Directed_Graph;
+          Comp : Component_Id) return Vertex_List.Doubly_Linked_List
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Contains_Component (G, Comp));
+ 
+          return Get_Component_Attributes (G, Comp).Vertices;
+       end Get_Vertices;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : All_Edge_Iterator) return Boolean is
+       begin
+          return Edge_Map.Has_Next (Edge_Map.Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : All_Vertex_Iterator) return Boolean is
+       begin
+          return Vertex_Map.Has_Next (Vertex_Map.Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : Component_Iterator) return Boolean is
+       begin
+          return Component_Map.Has_Next (Component_Map.Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : Component_Vertex_Iterator) return Boolean is
+       begin
+          return Vertex_List.Has_Next (Vertex_List.Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Has_Next --
+       --------------
+ 
+       function Has_Next (Iter : Outgoing_Edge_Iterator) return Boolean is
+       begin
+          return Edge_Set.Has_Next (Edge_Set.Iterator (Iter));
+       end Has_Next;
+ 
+       --------------
+       -- Is_Empty --
+       --------------
+ 
+       function Is_Empty (G : Directed_Graph) return Boolean is
+       begin
+          Ensure_Created (G);
+ 
+          return
+            Edge_Map.Is_Empty (G.All_Edges)
+              and then Vertex_Map.Is_Empty (G.All_Vertices);
+       end Is_Empty;
+ 
+       -----------------------
+       -- Iterate_All_Edges --
+       -----------------------
+ 
+       function Iterate_All_Edges
+         (G : Directed_Graph) return All_Edge_Iterator
+       is
+       begin
+          Ensure_Created (G);
+ 
+          return All_Edge_Iterator (Edge_Map.Iterate (G.All_Edges));
+       end Iterate_All_Edges;
+ 
+       --------------------------
+       -- Iterate_All_Vertices --
+       --------------------------
+ 
+       function Iterate_All_Vertices
+         (G : Directed_Graph) return All_Vertex_Iterator
+       is
+       begin
+          Ensure_Created (G);
+ 
+          return All_Vertex_Iterator (Vertex_Map.Iterate (G.All_Vertices));
+       end Iterate_All_Vertices;
+ 
+       ------------------------
+       -- Iterate_Components --
+       ------------------------
+ 
+       function Iterate_Components
+         (G : Directed_Graph) return Component_Iterator
+       is
+       begin
+          Ensure_Created (G);
+ 
+          return Component_Iterator (Component_Map.Iterate (G.Components));
+       end Iterate_Components;
+ 
+       --------------------------------
+       -- Iterate_Component_Vertices --
+       --------------------------------
+ 
+       function Iterate_Component_Vertices
+         (G    : Directed_Graph;
+          Comp : Component_Id) return Component_Vertex_Iterator
+       is
+       begin
+          Ensure_Created (G);
+          Ensure_Present (G, Comp);
+ 
+          return
+            Component_Vertex_Iterator
+              (Vertex_List.Iterate (Get_Vertices (G, Comp)));
+       end Iterate_Component_Vertices;
+ 
+       ----------------------------
+       -- Iterate_Outgoing_Edges --
+       ----------------------------
+ 
+       function Iterate_Outgoing_Edges
+         (G : Directed_Graph;
+          V : Vertex_Id) return Outgoing_Edge_Iterator
+       is
+       begin
+          Ensure_Created (G);
+          Ensure_Present (G, V);
+ 
+          return
+            Outgoing_Edge_Iterator
+              (Edge_Set.Iterate (Get_Outgoing_Edges (G, V)));
+       end Iterate_Outgoing_Edges;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter : in out All_Edge_Iterator;
+          E    : out Edge_Id)
+       is
+       begin
+          Edge_Map.Next (Edge_Map.Iterator (Iter), E);
+       end Next;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter : in out All_Vertex_Iterator;
+          V    : out Vertex_Id)
+       is
+       begin
+          Vertex_Map.Next (Vertex_Map.Iterator (Iter), V);
+       end Next;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter : in out Component_Iterator;
+          Comp : out Component_Id)
+       is
+       begin
+          Component_Map.Next (Component_Map.Iterator (Iter), Comp);
+       end Next;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter : in out Component_Vertex_Iterator;
+          V    : out Vertex_Id)
+       is
+       begin
+          Vertex_List.Next (Vertex_List.Iterator (Iter), V);
+       end Next;
+ 
+       ----------
+       -- Next --
+       ----------
+ 
+       procedure Next
+         (Iter : in out Outgoing_Edge_Iterator;
+          E    : out Edge_Id)
+       is
+       begin
+          Edge_Set.Next (Edge_Set.Iterator (Iter), E);
+       end Next;
+ 
+       ----------------------------------
+       -- Number_Of_Component_Vertices --
+       ----------------------------------
+ 
+       function Number_Of_Component_Vertices
+         (G    : Directed_Graph;
+          Comp : Component_Id) return Natural
+       is
+       begin
+          Ensure_Created (G);
+          Ensure_Present (G, Comp);
+ 
+          return Vertex_List.Size (Get_Vertices (G, Comp));
+       end Number_Of_Component_Vertices;
+ 
+       --------------------------
+       -- Number_Of_Components --
+       --------------------------
+ 
+       function Number_Of_Components (G : Directed_Graph) return Natural is
+       begin
+          Ensure_Created (G);
+ 
+          return Component_Map.Size (G.Components);
+       end Number_Of_Components;
+ 
+       ---------------------
+       -- Number_Of_Edges --
+       ---------------------
+ 
+       function Number_Of_Edges (G : Directed_Graph) return Natural is
+       begin
+          Ensure_Created (G);
+ 
+          return Edge_Map.Size (G.All_Edges);
+       end Number_Of_Edges;
+ 
+       ------------------------------
+       -- Number_Of_Outgoing_Edges --
+       ------------------------------
+ 
+       function Number_Of_Outgoing_Edges
+         (G : Directed_Graph;
+          V : Vertex_Id) return Natural
+       is
+       begin
+          Ensure_Created (G);
+          Ensure_Present (G, V);
+ 
+          return Edge_Set.Size (Get_Outgoing_Edges (G, V));
+       end Number_Of_Outgoing_Edges;
+ 
+       ------------------------
+       -- Number_Of_Vertices --
+       ------------------------
+ 
+       function Number_Of_Vertices (G : Directed_Graph) return Natural is
+       begin
+          Ensure_Created (G);
+ 
+          return Vertex_Map.Size (G.All_Vertices);
+       end Number_Of_Vertices;
+ 
+       -------------
+       -- Present --
+       -------------
+ 
+       function Present (G : Directed_Graph) return Boolean is
+       begin
+          return G /= Nil;
+       end Present;
+ 
+       -------------------
+       -- Set_Component --
+       -------------------
+ 
+       procedure Set_Component
+         (G   : Directed_Graph;
+          V   : Vertex_Id;
+          Val : Component_Id)
+       is
+          VA : Vertex_Attributes;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Contains_Vertex (G, V));
+ 
+          VA := Get_Vertex_Attributes (G, V);
+          VA.Component := Val;
+          Set_Vertex_Attributes (G, V, VA);
+       end Set_Component;
+ 
+       ------------------------
+       -- Set_Outgoing_Edges --
+       ------------------------
+ 
+       procedure Set_Outgoing_Edges
+         (G   : Directed_Graph;
+          V   : Vertex_Id;
+          Val : Edge_Set.Membership_Set)
+       is
+          VA : Vertex_Attributes;
+ 
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Contains_Vertex (G, V));
+ 
+          VA := Get_Vertex_Attributes (G, V);
+          VA.Outgoing_Edges := Val;
+          Set_Vertex_Attributes (G, V, VA);
+       end Set_Outgoing_Edges;
+ 
+       ---------------------------
+       -- Set_Vertex_Attributes --
+       ---------------------------
+ 
+       procedure Set_Vertex_Attributes
+         (G   : Directed_Graph;
+          V   : Vertex_Id;
+          Val : Vertex_Attributes)
+       is
+       begin
+          pragma Assert (Present (G));
+          pragma Assert (Contains_Vertex (G, V));
+ 
+          Vertex_Map.Put (G.All_Vertices, V, Val);
+       end Set_Vertex_Attributes;
+ 
+       -------------------
+       -- Source_Vertex --
+       -------------------
+ 
+       function Source_Vertex
+         (G : Directed_Graph;
+          E : Edge_Id) return Vertex_Id
+       is
+       begin
+          Ensure_Created (G);
+          Ensure_Present (G, E);
+ 
+          return Get_Edge_Attributes (G, E).Source;
+       end Source_Vertex;
+    end Directed_Graphs;
+ 
+    --------------------
+    -- Hash_Component --
+    --------------------
+ 
+    function Hash_Component (Comp : Component_Id) return Bucket_Range_Type is
+    begin
+       return Bucket_Range_Type (Comp);
+    end Hash_Component;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (Comp : Component_Id) return Boolean is
+    begin
+       return Comp /= No_Component;
+    end Present;
+ 
+    -----------------------------
+    -- Sequence_Next_Component --
+    -----------------------------
+ 
+    Component_Sequencer : Component_Id := First_Component;
+    --  The counter for component handles. Do not directly manipulate its value
+    --  because this will destroy the invariant of the handles.
+ 
+    function Sequence_Next_Component return Component_Id is
+       Component : constant Component_Id := Component_Sequencer;
+ 
+    begin
+       Component_Sequencer := Component_Sequencer + 1;
+       return Component;
+    end Sequence_Next_Component;
+ 
+ end GNAT.Graphs;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-graphs.ads gcc-10.1.0/gcc/ada/libgnat/g-graphs.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-graphs.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/g-graphs.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,536 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                           G N A T . G R A P H S                          --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --             Copyright (C) 2018-2019, Free Software Foundation, Inc.      --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ pragma Compiler_Unit_Warning;
+ 
+ with GNAT.Dynamic_HTables; use GNAT.Dynamic_HTables;
+ with GNAT.Lists;           use GNAT.Lists;
+ with GNAT.Sets;            use GNAT.Sets;
+ 
+ package GNAT.Graphs is
+ 
+    ---------------
+    -- Component --
+    ---------------
+ 
+    --  The following type denotes a strongly connected component handle
+    --  (referred to as simply "component") in a graph.
+ 
+    type Component_Id is new Natural;
+    No_Component : constant Component_Id := Component_Id'First;
+ 
+    function Hash_Component (Comp : Component_Id) return Bucket_Range_Type;
+    --  Map component Comp into the range of buckets
+ 
+    function Present (Comp : Component_Id) return Boolean;
+    --  Determine whether component Comp exists
+ 
+    ---------------------
+    -- Directed_Graphs --
+    ---------------------
+ 
+    --  The following package offers a directed graph abstraction with the
+    --  following characteristics:
+    --
+    --    * Dynamic resizing based on number of vertices and edges
+    --    * Creation of multiple instances, of different sizes
+    --    * Discovery of strongly connected components
+    --    * Iterable attributes
+    --
+    --  The following use pattern must be employed when operating this graph:
+    --
+    --    Graph : Directed_Graph := Create (<some size>, <some size>);
+    --
+    --    <various operations>
+    --
+    --    Destroy (Graph);
+    --
+    --  The destruction of the graph reclaims all storage occupied by it.
+ 
+    generic
+ 
+       --------------
+       -- Vertices --
+       --------------
+ 
+       type Vertex_Id is private;
+       --  The handle of a vertex
+ 
+       No_Vertex : Vertex_Id;
+       --  An indicator for a nonexistent vertex
+ 
+       with function Hash_Vertex (V : Vertex_Id) return Bucket_Range_Type;
+       --  Map vertex V into the range of buckets
+ 
+       with function Same_Vertex
+              (Left  : Vertex_Id;
+               Right : Vertex_Id) return Boolean;
+       --  Compare vertex Left to vertex Right for identity
+ 
+       -----------
+       -- Edges --
+       -----------
+ 
+       type Edge_Id is private;
+       --  The handle of an edge
+ 
+       No_Edge : Edge_Id;
+       --  An indicator for a nonexistent edge
+ 
+       with function Hash_Edge (E : Edge_Id) return Bucket_Range_Type;
+       --  Map edge E into the range of buckets
+ 
+       with function Same_Edge
+              (Left  : Edge_Id;
+               Right : Edge_Id) return Boolean;
+       --  Compare edge Left to edge Right for identity
+ 
+    package Directed_Graphs is
+ 
+       --  The following exceptions are raised when an attempt is made to add
+       --  the same edge or vertex in a graph.
+ 
+       Duplicate_Edge   : exception;
+       Duplicate_Vertex : exception;
+ 
+       --  The following exceptions are raised when an attempt is made to delete
+       --  or reference a nonexistent component, edge, or vertex in a graph.
+ 
+       Missing_Component : exception;
+       Missing_Edge      : exception;
+       Missing_Vertex    : exception;
+ 
+       ----------------------
+       -- Graph operations --
+       ----------------------
+ 
+       --  The following type denotes a graph handle. Each instance must be
+       --  created using routine Create.
+ 
+       type Directed_Graph is private;
+       Nil : constant Directed_Graph;
+ 
+       procedure Add_Edge
+         (G           : Directed_Graph;
+          E           : Edge_Id;
+          Source      : Vertex_Id;
+          Destination : Vertex_Id);
+       --  Add edge E to graph G which links vertex source Source and desination
+       --  vertex Destination. The edge is "owned" by vertex Source. This action
+       --  raises the following exceptions:
+       --
+       --    * Duplicate_Edge, when the edge is already present in the graph
+       --
+       --    * Iterated, when the graph has an outstanding edge iterator
+       --
+       --    * Missing_Vertex, when either the source or desination are not
+       --      present in the graph.
+ 
+       procedure Add_Vertex
+         (G : Directed_Graph;
+          V : Vertex_Id);
+       --  Add vertex V to graph G. This action raises the following exceptions:
+       --
+       --    * Duplicate_Vertex, when the vertex is already present in the graph
+       --
+       --    * Iterated, when the graph has an outstanding vertex iterator
+ 
+       function Component
+         (G : Directed_Graph;
+          V : Vertex_Id) return Component_Id;
+       --  Obtain the component where vertex V of graph G resides. This action
+       --  raises the following exceptions:
+       --
+       --    * Missing_Vertex, when the vertex is not present in the graph
+ 
+       function Contains_Component
+         (G    : Directed_Graph;
+          Comp : Component_Id) return Boolean;
+       --  Determine whether graph G contains component Comp
+ 
+       function Contains_Edge
+         (G : Directed_Graph;
+          E : Edge_Id) return Boolean;
+       --  Determine whether graph G contains edge E
+ 
+       function Contains_Vertex
+         (G : Directed_Graph;
+          V : Vertex_Id) return Boolean;
+       --  Determine whether graph G contains vertex V
+ 
+       function Create
+         (Initial_Vertices : Positive;
+          Initial_Edges    : Positive) return Directed_Graph;
+       --  Create a new graph with vertex capacity Initial_Vertices and edge
+       --  capacity Initial_Edges. This routine must be called at the start of
+       --  a graph's lifetime.
+ 
+       procedure Delete_Edge
+         (G : Directed_Graph;
+          E : Edge_Id);
+       --  Delete edge E from graph G. This action raises these exceptions:
+       --
+       --    * Iterated, when the graph has an outstanding edge iterator
+       --
+       --    * Missing_Edge, when the edge is not present in the graph
+       --
+       --    * Missing_Vertex, when the source vertex that "owns" the edge is
+       --      not present in the graph.
+ 
+       function Destination_Vertex
+         (G : Directed_Graph;
+          E : Edge_Id) return Vertex_Id;
+       --  Obtain the destination vertex of edge E of graph G. This action
+       --  raises the following exceptions:
+       --
+       --    * Missing_Edge, when the edge is not present in the graph
+ 
+       procedure Destroy (G : in out Directed_Graph);
+       --  Destroy the contents of graph G, rendering it unusable. This routine
+       --  must be called at the end of a graph's lifetime. This action raises
+       --  the following exceptions:
+       --
+       --    * Iterated, if the graph has any outstanding iterator
+ 
+       procedure Find_Components (G : Directed_Graph);
+       --  Find all components of graph G. This action raises the following
+       --  exceptions:
+       --
+       --    * Iterated, when the components or vertices of the graph have an
+       --      outstanding iterator.
+ 
+       function Is_Empty (G : Directed_Graph) return Boolean;
+       --  Determine whether graph G is empty
+ 
+       function Number_Of_Component_Vertices
+         (G    : Directed_Graph;
+          Comp : Component_Id) return Natural;
+       --  Obtain the total number of vertices of component Comp of graph G
+ 
+       function Number_Of_Components (G : Directed_Graph) return Natural;
+       --  Obtain the total number of components of graph G
+ 
+       function Number_Of_Edges (G : Directed_Graph) return Natural;
+       --  Obtain the total number of edges of graph G
+ 
+       function Number_Of_Outgoing_Edges
+         (G : Directed_Graph;
+          V : Vertex_Id) return Natural;
+       --  Obtain the total number of outgoing edges of vertex V of graph G
+ 
+       function Number_Of_Vertices (G : Directed_Graph) return Natural;
+       --  Obtain the total number of vertices of graph G
+ 
+       function Present (G : Directed_Graph) return Boolean;
+       --  Determine whether graph G exists
+ 
+       function Source_Vertex
+         (G : Directed_Graph;
+          E : Edge_Id) return Vertex_Id;
+       --  Obtain the source vertex that "owns" edge E of graph G. This action
+       --  raises the following exceptions:
+       --
+       --    * Missing_Edge, when the edge is not present in the graph
+ 
+       -------------------------
+       -- Iterator operations --
+       -------------------------
+ 
+       --  The following types represent iterators over various attributes of a
+       --  graph. Each iterator locks all mutation operations of its associated
+       --  attribute, and unlocks them once it is exhausted. The iterators must
+       --  be used with the following pattern:
+       --
+       --    Iter : Iterate_XXX (Graph);
+       --    while Has_Next (Iter) loop
+       --       Next (Iter, Element);
+       --    end loop;
+       --
+       --  It is possible to advance the iterators by using Next only, however
+       --  this risks raising Iterator_Exhausted.
+ 
+       --  The following type represents an iterator over all edges of a graph
+ 
+       type All_Edge_Iterator is private;
+ 
+       function Has_Next (Iter : All_Edge_Iterator) return Boolean;
+       --  Determine whether iterator Iter has more edges to examine
+ 
+       function Iterate_All_Edges (G : Directed_Graph) return All_Edge_Iterator;
+       --  Obtain an iterator over all edges of graph G
+ 
+       procedure Next
+         (Iter : in out All_Edge_Iterator;
+          E    : out Edge_Id);
+       --  Return the current edge referenced by iterator Iter and advance to
+       --  the next available edge. This action raises the following exceptions:
+       --
+       --    * Iterator_Exhausted, when the iterator has been exhausted and
+       --      further attempts are made to advance it.
+ 
+       --  The following type represents an iterator over all vertices of a
+       --  graph.
+ 
+       type All_Vertex_Iterator is private;
+ 
+       function Has_Next (Iter : All_Vertex_Iterator) return Boolean;
+       --  Determine whether iterator Iter has more vertices to examine
+ 
+       function Iterate_All_Vertices
+         (G : Directed_Graph) return All_Vertex_Iterator;
+       --  Obtain an iterator over all vertices of graph G
+ 
+       procedure Next
+         (Iter : in out All_Vertex_Iterator;
+          V    : out Vertex_Id);
+       --  Return the current vertex referenced by iterator Iter and advance
+       --  to the next available vertex. This action raises the following
+       --  exceptions:
+       --
+       --    * Iterator_Exhausted, when the iterator has been exhausted and
+       --      further attempts are made to advance it.
+ 
+       --  The following type represents an iterator over all components of a
+       --  graph.
+ 
+       type Component_Iterator is private;
+ 
+       function Has_Next (Iter : Component_Iterator) return Boolean;
+       --  Determine whether iterator Iter has more components to examine
+ 
+       function Iterate_Components
+         (G : Directed_Graph) return Component_Iterator;
+       --  Obtain an iterator over all components of graph G
+ 
+       procedure Next
+         (Iter : in out Component_Iterator;
+          Comp : out Component_Id);
+       --  Return the current component referenced by iterator Iter and advance
+       --  to the next component. This action raises the following exceptions:
+       --
+       --    * Iterator_Exhausted, when the iterator has been exhausted and
+       --      further attempts are made to advance it.
+ 
+       --  The following type prepresents an iterator over all vertices of a
+       --  component.
+ 
+       type Component_Vertex_Iterator is private;
+ 
+       function Has_Next (Iter : Component_Vertex_Iterator) return Boolean;
+       --  Determine whether iterator Iter has more vertices to examine
+ 
+       function Iterate_Component_Vertices
+         (G    : Directed_Graph;
+          Comp : Component_Id) return Component_Vertex_Iterator;
+       --  Obtain an iterator over all vertices that comprise component Comp of
+       --  graph G.
+ 
+       procedure Next
+         (Iter : in out Component_Vertex_Iterator;
+          V    : out Vertex_Id);
+       --  Return the current vertex referenced by iterator Iter and advance to
+       --  the next vertex. This action raises the following exceptions:
+       --
+       --    * Iterator_Exhausted, when the iterator has been exhausted and
+       --      further attempts are made to advance it.
+ 
+       --  The following type represents an iterator over all outgoing edges of
+       --  a vertex.
+ 
+       type Outgoing_Edge_Iterator is private;
+ 
+       function Has_Next (Iter : Outgoing_Edge_Iterator) return Boolean;
+       --  Determine whether iterator Iter has more outgoing edges to examine
+ 
+       function Iterate_Outgoing_Edges
+         (G : Directed_Graph;
+          V : Vertex_Id) return Outgoing_Edge_Iterator;
+       --  Obtain an iterator over all the outgoing edges "owned" by vertex V of
+       --  graph G.
+ 
+       procedure Next
+         (Iter : in out Outgoing_Edge_Iterator;
+          E    : out Edge_Id);
+       --  Return the current outgoing edge referenced by iterator Iter and
+       --  advance to the next available outgoing edge. This action raises the
+       --  following exceptions:
+       --
+       --    * Iterator_Exhausted, when the iterator has been exhausted and
+       --      further attempts are made to advance it.
+ 
+    private
+       pragma Unreferenced (No_Edge);
+ 
+       --------------
+       -- Edge_Map --
+       --------------
+ 
+       type Edge_Attributes is record
+          Destination : Vertex_Id := No_Vertex;
+          --  The target of a directed edge
+ 
+          Source : Vertex_Id := No_Vertex;
+          --  The origin of a directed edge. The source vertex "owns" the edge.
+       end record;
+ 
+       No_Edge_Attributes : constant Edge_Attributes :=
+         (Destination => No_Vertex,
+          Source      => No_Vertex);
+ 
+       procedure Destroy_Edge_Attributes (Attrs : in out Edge_Attributes);
+       --  Destroy the contents of attributes Attrs
+ 
+       package Edge_Map is new Dynamic_Hash_Tables
+         (Key_Type              => Edge_Id,
+          Value_Type            => Edge_Attributes,
+          No_Value              => No_Edge_Attributes,
+          Expansion_Threshold   => 1.5,
+          Expansion_Factor      => 2,
+          Compression_Threshold => 0.3,
+          Compression_Factor    => 2,
+          "="                   => Same_Edge,
+          Destroy_Value         => Destroy_Edge_Attributes,
+          Hash                  => Hash_Edge);
+ 
+       --------------
+       -- Edge_Set --
+       --------------
+ 
+       package Edge_Set is new Membership_Sets
+         (Element_Type => Edge_Id,
+          "="          => "=",
+          Hash         => Hash_Edge);
+ 
+       -----------------
+       -- Vertex_List --
+       -----------------
+ 
+       procedure Destroy_Vertex (V : in out Vertex_Id);
+       --  Destroy the contents of a vertex
+ 
+       package Vertex_List is new Doubly_Linked_Lists
+         (Element_Type    => Vertex_Id,
+          "="             => Same_Vertex,
+          Destroy_Element => Destroy_Vertex);
+ 
+       ----------------
+       -- Vertex_Map --
+       ----------------
+ 
+       type Vertex_Attributes is record
+          Component : Component_Id := No_Component;
+          --  The component where a vertex lives
+ 
+          Outgoing_Edges : Edge_Set.Membership_Set := Edge_Set.Nil;
+          --  The set of edges that extend out from a vertex
+       end record;
+ 
+       No_Vertex_Attributes : constant Vertex_Attributes :=
+         (Component      => No_Component,
+          Outgoing_Edges => Edge_Set.Nil);
+ 
+       procedure Destroy_Vertex_Attributes (Attrs : in out Vertex_Attributes);
+       --  Destroy the contents of attributes Attrs
+ 
+       package Vertex_Map is new Dynamic_Hash_Tables
+         (Key_Type              => Vertex_Id,
+          Value_Type            => Vertex_Attributes,
+          No_Value              => No_Vertex_Attributes,
+          Expansion_Threshold   => 1.5,
+          Expansion_Factor      => 2,
+          Compression_Threshold => 0.3,
+          Compression_Factor    => 2,
+          "="                   => Same_Vertex,
+          Destroy_Value         => Destroy_Vertex_Attributes,
+          Hash                  => Hash_Vertex);
+ 
+       -------------------
+       -- Component_Map --
+       -------------------
+ 
+       type Component_Attributes is record
+          Vertices : Vertex_List.Doubly_Linked_List := Vertex_List.Nil;
+       end record;
+ 
+       No_Component_Attributes : constant Component_Attributes :=
+         (Vertices => Vertex_List.Nil);
+ 
+       procedure Destroy_Component_Attributes
+         (Attrs : in out Component_Attributes);
+       --  Destroy the contents of attributes Attrs
+ 
+       package Component_Map is new Dynamic_Hash_Tables
+         (Key_Type              => Component_Id,
+          Value_Type            => Component_Attributes,
+          No_Value              => No_Component_Attributes,
+          Expansion_Threshold   => 1.5,
+          Expansion_Factor      => 2,
+          Compression_Threshold => 0.3,
+          Compression_Factor    => 2,
+          "="                   => "=",
+          Destroy_Value         => Destroy_Component_Attributes,
+          Hash                  => Hash_Component);
+ 
+       -----------
+       -- Graph --
+       -----------
+ 
+       type Directed_Graph_Attributes is record
+          All_Edges : Edge_Map.Dynamic_Hash_Table := Edge_Map.Nil;
+          --  The map of edge -> edge attributes for all edges in the graph
+ 
+          All_Vertices : Vertex_Map.Dynamic_Hash_Table := Vertex_Map.Nil;
+          --  The map of vertex -> vertex attributes for all vertices in the
+          --  graph.
+ 
+          Components : Component_Map.Dynamic_Hash_Table := Component_Map.Nil;
+          --  The map of component -> component attributes for all components
+          --  in the graph.
+       end record;
+ 
+       type Directed_Graph is access Directed_Graph_Attributes;
+       Nil : constant Directed_Graph := null;
+ 
+       ---------------
+       -- Iterators --
+       ---------------
+ 
+       type All_Edge_Iterator         is new Edge_Map.Iterator;
+       type All_Vertex_Iterator       is new Vertex_Map.Iterator;
+       type Component_Iterator        is new Component_Map.Iterator;
+       type Component_Vertex_Iterator is new Vertex_List.Iterator;
+       type Outgoing_Edge_Iterator    is new Edge_Set.Iterator;
+    end Directed_Graphs;
+ 
+ private
+    First_Component : constant Component_Id := No_Component + 1;
+ 
+ end GNAT.Graphs;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-lists.adb gcc-10.1.0/gcc/ada/libgnat/g-lists.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-lists.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-lists.adb	Thu May  7 10:49:59 2020
*************** with Ada.Unchecked_Deallocation;
*** 33,40 ****
  
  package body GNAT.Lists is
  
!    package body Doubly_Linked_List is
!       procedure Delete_Node (L : Instance; Nod : Node_Ptr);
        pragma Inline (Delete_Node);
        --  Detach and delete node Nod from list L
  
--- 33,42 ----
  
  package body GNAT.Lists is
  
!    package body Doubly_Linked_Lists is
!       procedure Delete_Node
!         (L   : Doubly_Linked_List;
!          Nod : Node_Ptr);
        pragma Inline (Delete_Node);
        --  Detach and delete node Nod from list L
  
*************** package body GNAT.Lists is
*** 42,58 ****
        pragma Inline (Ensure_Circular);
        --  Ensure that dummy head Head is circular with respect to itself
  
!       procedure Ensure_Created (L : Instance);
        pragma Inline (Ensure_Created);
        --  Verify that list L is created. Raise Not_Created if this is not the
        --  case.
  
!       procedure Ensure_Full (L : Instance);
        pragma Inline (Ensure_Full);
        --  Verify that list L contains at least one element. Raise List_Empty if
        --  this is not the case.
  
!       procedure Ensure_Unlocked (L : Instance);
        pragma Inline (Ensure_Unlocked);
        --  Verify that list L is unlocked. Raise Iterated if this is not the
        --  case.
--- 44,60 ----
        pragma Inline (Ensure_Circular);
        --  Ensure that dummy head Head is circular with respect to itself
  
!       procedure Ensure_Created (L : Doubly_Linked_List);
        pragma Inline (Ensure_Created);
        --  Verify that list L is created. Raise Not_Created if this is not the
        --  case.
  
!       procedure Ensure_Full (L : Doubly_Linked_List);
        pragma Inline (Ensure_Full);
        --  Verify that list L contains at least one element. Raise List_Empty if
        --  this is not the case.
  
!       procedure Ensure_Unlocked (L : Doubly_Linked_List);
        pragma Inline (Ensure_Unlocked);
        --  Verify that list L is unlocked. Raise Iterated if this is not the
        --  case.
*************** package body GNAT.Lists is
*** 65,76 ****
        --  exists a node with element Elem. If such a node exists, return it,
        --  otherwise return null;
  
!       procedure Free is new Ada.Unchecked_Deallocation (Linked_List, Instance);
  
        procedure Free is new Ada.Unchecked_Deallocation (Node, Node_Ptr);
  
        procedure Insert_Between
!         (L     : Instance;
           Elem  : Element_Type;
           Left  : Node_Ptr;
           Right : Node_Ptr);
--- 67,80 ----
        --  exists a node with element Elem. If such a node exists, return it,
        --  otherwise return null;
  
!       procedure Free is
!         new Ada.Unchecked_Deallocation
!               (Doubly_Linked_List_Attributes, Doubly_Linked_List);
  
        procedure Free is new Ada.Unchecked_Deallocation (Node, Node_Ptr);
  
        procedure Insert_Between
!         (L     : Doubly_Linked_List;
           Elem  : Element_Type;
           Left  : Node_Ptr;
           Right : Node_Ptr);
*************** package body GNAT.Lists is
*** 81,96 ****
        pragma Inline (Is_Valid);
        --  Determine whether iterator Iter refers to a valid element
  
!       function Is_Valid (Nod : Node_Ptr; Head : Node_Ptr) return Boolean;
        pragma Inline (Is_Valid);
        --  Determine whether node Nod is non-null and does not refer to dummy
        --  head Head, thus making it valid.
  
!       procedure Lock (L : Instance);
        pragma Inline (Lock);
        --  Lock all mutation functionality of list L
  
!       procedure Unlock (L : Instance);
        pragma Inline (Unlock);
        --  Unlock all mutation functionality of list L
  
--- 85,106 ----
        pragma Inline (Is_Valid);
        --  Determine whether iterator Iter refers to a valid element
  
!       function Is_Valid
!         (Nod  : Node_Ptr;
!          Head : Node_Ptr) return Boolean;
        pragma Inline (Is_Valid);
        --  Determine whether node Nod is non-null and does not refer to dummy
        --  head Head, thus making it valid.
  
!       procedure Lock (L : Doubly_Linked_List);
        pragma Inline (Lock);
        --  Lock all mutation functionality of list L
  
!       function Present (Nod : Node_Ptr) return Boolean;
!       pragma Inline (Present);
!       --  Determine whether node Nod exists
! 
!       procedure Unlock (L : Doubly_Linked_List);
        pragma Inline (Unlock);
        --  Unlock all mutation functionality of list L
  
*************** package body GNAT.Lists is
*** 98,104 ****
        -- Append --
        ------------
  
!       procedure Append (L : Instance; Elem : Element_Type) is
           Head : Node_Ptr;
  
        begin
--- 108,117 ----
        -- Append --
        ------------
  
!       procedure Append
!         (L    : Doubly_Linked_List;
!          Elem : Element_Type)
!       is
           Head : Node_Ptr;
  
        begin
*************** package body GNAT.Lists is
*** 125,140 ****
        -- Create --
        ------------
  
!       function Create return Instance is
        begin
!          return new Linked_List;
        end Create;
  
        --------------
        -- Contains --
        --------------
  
!       function Contains (L : Instance; Elem : Element_Type) return Boolean is
           Head : Node_Ptr;
           Nod  : Node_Ptr;
  
--- 138,156 ----
        -- Create --
        ------------
  
!       function Create return Doubly_Linked_List is
        begin
!          return new Doubly_Linked_List_Attributes;
        end Create;
  
        --------------
        -- Contains --
        --------------
  
!       function Contains
!         (L    : Doubly_Linked_List;
!          Elem : Element_Type) return Boolean
!       is
           Head : Node_Ptr;
           Nod  : Node_Ptr;
  
*************** package body GNAT.Lists is
*** 151,157 ****
        -- Delete --
        ------------
  
!       procedure Delete (L : Instance; Elem : Element_Type) is
           Head : Node_Ptr;
           Nod  : Node_Ptr;
  
--- 167,176 ----
        -- Delete --
        ------------
  
!       procedure Delete
!         (L    : Doubly_Linked_List;
!          Elem : Element_Type)
!       is
           Head : Node_Ptr;
           Nod  : Node_Ptr;
  
*************** package body GNAT.Lists is
*** 172,178 ****
        -- Delete_First --
        ------------------
  
!       procedure Delete_First (L : Instance) is
           Head : Node_Ptr;
           Nod  : Node_Ptr;
  
--- 191,197 ----
        -- Delete_First --
        ------------------
  
!       procedure Delete_First (L : Doubly_Linked_List) is
           Head : Node_Ptr;
           Nod  : Node_Ptr;
  
*************** package body GNAT.Lists is
*** 193,199 ****
        -- Delete_Last --
        -----------------
  
!       procedure Delete_Last (L : Instance) is
           Head : Node_Ptr;
           Nod  : Node_Ptr;
  
--- 212,218 ----
        -- Delete_Last --
        -----------------
  
!       procedure Delete_Last (L : Doubly_Linked_List) is
           Head : Node_Ptr;
           Nod  : Node_Ptr;
  
*************** package body GNAT.Lists is
*** 214,231 ****
        -- Delete_Node --
        -----------------
  
!       procedure Delete_Node (L : Instance; Nod : Node_Ptr) is
           Ref : Node_Ptr := Nod;
  
!          pragma Assert (Ref /= null);
  
           Next : constant Node_Ptr := Ref.Next;
           Prev : constant Node_Ptr := Ref.Prev;
  
        begin
!          pragma Assert (L    /= null);
!          pragma Assert (Next /= null);
!          pragma Assert (Prev /= null);
  
           Prev.Next := Next;  --  Prev ---> Next
           Next.Prev := Prev;  --  Prev <--> Next
--- 233,253 ----
        -- Delete_Node --
        -----------------
  
!       procedure Delete_Node
!         (L   : Doubly_Linked_List;
!          Nod : Node_Ptr)
!       is
           Ref : Node_Ptr := Nod;
  
!          pragma Assert (Present (Ref));
  
           Next : constant Node_Ptr := Ref.Next;
           Prev : constant Node_Ptr := Ref.Prev;
  
        begin
!          pragma Assert (Present (L));
!          pragma Assert (Present (Next));
!          pragma Assert (Present (Prev));
  
           Prev.Next := Next;  --  Prev ---> Next
           Next.Prev := Prev;  --  Prev <--> Next
*************** package body GNAT.Lists is
*** 235,240 ****
--- 257,266 ----
  
           L.Elements := L.Elements - 1;
  
+          --  Invoke the element destructor before deallocating the node
+ 
+          Destroy_Element (Nod.Elem);
+ 
           Free (Ref);
        end Delete_Node;
  
*************** package body GNAT.Lists is
*** 242,248 ****
        -- Destroy --
        -------------
  
!       procedure Destroy (L : in out Instance) is
           Head : Node_Ptr;
  
        begin
--- 268,274 ----
        -- Destroy --
        -------------
  
!       procedure Destroy (L : in out Doubly_Linked_List) is
           Head : Node_Ptr;
  
        begin
*************** package body GNAT.Lists is
*** 263,272 ****
        ---------------------
  
        procedure Ensure_Circular (Head : Node_Ptr) is
!          pragma Assert (Head /= null);
  
        begin
!          if Head.Next = null and then Head.Prev = null then
              Head.Next := Head;
              Head.Prev := Head;
           end if;
--- 289,298 ----
        ---------------------
  
        procedure Ensure_Circular (Head : Node_Ptr) is
!          pragma Assert (Present (Head));
  
        begin
!          if not Present (Head.Next) and then not Present (Head.Prev) then
              Head.Next := Head;
              Head.Prev := Head;
           end if;
*************** package body GNAT.Lists is
*** 276,284 ****
        -- Ensure_Created --
        --------------------
  
!       procedure Ensure_Created (L : Instance) is
        begin
!          if L = null then
              raise Not_Created;
           end if;
        end Ensure_Created;
--- 302,310 ----
        -- Ensure_Created --
        --------------------
  
!       procedure Ensure_Created (L : Doubly_Linked_List) is
        begin
!          if not Present (L) then
              raise Not_Created;
           end if;
        end Ensure_Created;
*************** package body GNAT.Lists is
*** 287,295 ****
        -- Ensure_Full --
        -----------------
  
!       procedure Ensure_Full (L : Instance) is
        begin
!          pragma Assert (L /= null);
  
           if L.Elements = 0 then
              raise List_Empty;
--- 313,321 ----
        -- Ensure_Full --
        -----------------
  
!       procedure Ensure_Full (L : Doubly_Linked_List) is
        begin
!          pragma Assert (Present (L));
  
           if L.Elements = 0 then
              raise List_Empty;
*************** package body GNAT.Lists is
*** 300,308 ****
        -- Ensure_Unlocked --
        ---------------------
  
!       procedure Ensure_Unlocked (L : Instance) is
        begin
!          pragma Assert (L /= null);
  
           --  The list has at least one outstanding iterator
  
--- 326,334 ----
        -- Ensure_Unlocked --
        ---------------------
  
!       procedure Ensure_Unlocked (L : Doubly_Linked_List) is
        begin
!          pragma Assert (Present (L));
  
           --  The list has at least one outstanding iterator
  
*************** package body GNAT.Lists is
*** 311,316 ****
--- 337,393 ----
           end if;
        end Ensure_Unlocked;
  
+       -----------
+       -- Equal --
+       -----------
+ 
+       function Equal
+         (Left  : Doubly_Linked_List;
+          Right : Doubly_Linked_List) return Boolean
+       is
+          Left_Head  : Node_Ptr;
+          Left_Nod   : Node_Ptr;
+          Right_Head : Node_Ptr;
+          Right_Nod  : Node_Ptr;
+ 
+       begin
+          --  Two non-existent lists are considered equal
+ 
+          if Left = Nil and then Right = Nil then
+             return True;
+ 
+          --  A non-existent list is never equal to an already created list
+ 
+          elsif Left = Nil or else Right = Nil then
+             return False;
+ 
+          --  The two lists must contain the same number of elements to be equal
+ 
+          elsif Size (Left) /= Size (Right) then
+             return False;
+          end if;
+ 
+          --  Compare the two lists element by element
+ 
+          Left_Head  := Left.Nodes'Access;
+          Left_Nod   := Left_Head.Next;
+          Right_Head := Right.Nodes'Access;
+          Right_Nod  := Right_Head.Next;
+          while Is_Valid (Left_Nod,  Left_Head)
+                  and then
+                Is_Valid (Right_Nod, Right_Head)
+          loop
+             if Left_Nod.Elem /= Right_Nod.Elem then
+                return False;
+             end if;
+ 
+             Left_Nod  := Left_Nod.Next;
+             Right_Nod := Right_Nod.Next;
+          end loop;
+ 
+          return True;
+       end Equal;
+ 
        ---------------
        -- Find_Node --
        ---------------
*************** package body GNAT.Lists is
*** 319,325 ****
          (Head : Node_Ptr;
           Elem : Element_Type) return Node_Ptr
        is
!          pragma Assert (Head /= null);
  
           Nod : Node_Ptr;
  
--- 396,402 ----
          (Head : Node_Ptr;
           Elem : Element_Type) return Node_Ptr
        is
!          pragma Assert (Present (Head));
  
           Nod : Node_Ptr;
  
*************** package body GNAT.Lists is
*** 342,348 ****
        -- First --
        -----------
  
!       function First (L : Instance) return Element_Type is
        begin
           Ensure_Created (L);
           Ensure_Full    (L);
--- 419,425 ----
        -- First --
        -----------
  
!       function First (L : Doubly_Linked_List) return Element_Type is
        begin
           Ensure_Created (L);
           Ensure_Full    (L);
*************** package body GNAT.Lists is
*** 374,380 ****
        ------------------
  
        procedure Insert_After
!         (L     : Instance;
           After : Element_Type;
           Elem  : Element_Type)
        is
--- 451,457 ----
        ------------------
  
        procedure Insert_After
!         (L     : Doubly_Linked_List;
           After : Element_Type;
           Elem  : Element_Type)
        is
*************** package body GNAT.Lists is
*** 402,408 ****
        -------------------
  
        procedure Insert_Before
!         (L      : Instance;
           Before : Element_Type;
           Elem   : Element_Type)
        is
--- 479,485 ----
        -------------------
  
        procedure Insert_Before
!         (L      : Doubly_Linked_List;
           Before : Element_Type;
           Elem   : Element_Type)
        is
*************** package body GNAT.Lists is
*** 430,443 ****
        --------------------
  
        procedure Insert_Between
!         (L     : Instance;
           Elem  : Element_Type;
           Left  : Node_Ptr;
           Right : Node_Ptr)
        is
!          pragma Assert (L     /= null);
!          pragma Assert (Left  /= null);
!          pragma Assert (Right /= null);
  
           Nod : constant Node_Ptr :=
                   new Node'(Elem => Elem,
--- 507,520 ----
        --------------------
  
        procedure Insert_Between
!         (L     : Doubly_Linked_List;
           Elem  : Element_Type;
           Left  : Node_Ptr;
           Right : Node_Ptr)
        is
!          pragma Assert (Present (L));
!          pragma Assert (Present (Left));
!          pragma Assert (Present (Right));
  
           Nod : constant Node_Ptr :=
                   new Node'(Elem => Elem,
*************** package body GNAT.Lists is
*** 455,461 ****
        -- Is_Empty --
        --------------
  
!       function Is_Empty (L : Instance) return Boolean is
        begin
           Ensure_Created (L);
  
--- 532,538 ----
        -- Is_Empty --
        --------------
  
!       function Is_Empty (L : Doubly_Linked_List) return Boolean is
        begin
           Ensure_Created (L);
  
*************** package body GNAT.Lists is
*** 471,496 ****
           --  The invariant of Iterate and Next ensures that the iterator always
           --  refers to a valid node if there exists one.
  
!          return Is_Valid (Iter.Nod, Iter.List.Nodes'Access);
        end Is_Valid;
  
        --------------
        -- Is_Valid --
        --------------
  
!       function Is_Valid (Nod : Node_Ptr; Head : Node_Ptr) return Boolean is
        begin
           --  A node is valid if it is non-null, and does not refer to the dummy
           --  head of some list.
  
!          return Nod /= null and then Nod /= Head;
        end Is_Valid;
  
        -------------
        -- Iterate --
        -------------
  
!       function Iterate (L : Instance) return Iterator is
        begin
           Ensure_Created (L);
  
--- 548,576 ----
           --  The invariant of Iterate and Next ensures that the iterator always
           --  refers to a valid node if there exists one.
  
!          return Is_Valid (Iter.Curr_Nod, Iter.List.Nodes'Access);
        end Is_Valid;
  
        --------------
        -- Is_Valid --
        --------------
  
!       function Is_Valid
!         (Nod  : Node_Ptr;
!          Head : Node_Ptr) return Boolean
!       is
        begin
           --  A node is valid if it is non-null, and does not refer to the dummy
           --  head of some list.
  
!          return Present (Nod) and then Nod /= Head;
        end Is_Valid;
  
        -------------
        -- Iterate --
        -------------
  
!       function Iterate (L : Doubly_Linked_List) return Iterator is
        begin
           Ensure_Created (L);
  
*************** package body GNAT.Lists is
*** 499,512 ****
  
           Lock (L);
  
!          return (List => L, Nod => L.Nodes.Next);
        end Iterate;
  
        ----------
        -- Last --
        ----------
  
!       function Last (L : Instance) return Element_Type is
        begin
           Ensure_Created (L);
           Ensure_Full   (L);
--- 579,592 ----
  
           Lock (L);
  
!          return (List => L, Curr_Nod => L.Nodes.Next);
        end Iterate;
  
        ----------
        -- Last --
        ----------
  
!       function Last (L : Doubly_Linked_List) return Element_Type is
        begin
           Ensure_Created (L);
           Ensure_Full   (L);
*************** package body GNAT.Lists is
*** 518,526 ****
        -- Lock --
        ----------
  
!       procedure Lock (L : Instance) is
        begin
!          pragma Assert (L /= null);
  
           --  The list may be locked multiple times if multiple iterators are
           --  operating over it.
--- 598,606 ----
        -- Lock --
        ----------
  
!       procedure Lock (L : Doubly_Linked_List) is
        begin
!          pragma Assert (Present (L));
  
           --  The list may be locked multiple times if multiple iterators are
           --  operating over it.
*************** package body GNAT.Lists is
*** 532,540 ****
        -- Next --
        ----------
  
!       procedure Next (Iter : in out Iterator; Elem : out Element_Type) is
           Is_OK : constant Boolean  := Is_Valid (Iter);
!          Saved : constant Node_Ptr := Iter.Nod;
  
        begin
           --  The iterator is no linger valid which indicates that it has been
--- 612,623 ----
        -- Next --
        ----------
  
!       procedure Next
!         (Iter : in out Iterator;
!          Elem : out Element_Type)
!       is
           Is_OK : constant Boolean  := Is_Valid (Iter);
!          Saved : constant Node_Ptr := Iter.Curr_Nod;
  
        begin
           --  The iterator is no linger valid which indicates that it has been
*************** package body GNAT.Lists is
*** 548,562 ****
  
           --  Advance to the next node along the list
  
!          Iter.Nod := Iter.Nod.Next;
!          Elem     := Saved.Elem;
        end Next;
  
        -------------
        -- Prepend --
        -------------
  
!       procedure Prepend (L : Instance; Elem : Element_Type) is
           Head : Node_Ptr;
  
        begin
--- 631,649 ----
  
           --  Advance to the next node along the list
  
!          Iter.Curr_Nod := Iter.Curr_Nod.Next;
! 
!          Elem := Saved.Elem;
        end Next;
  
        -------------
        -- Prepend --
        -------------
  
!       procedure Prepend
!         (L    : Doubly_Linked_List;
!          Elem : Element_Type)
!       is
           Head : Node_Ptr;
  
        begin
*************** package body GNAT.Lists is
*** 580,590 ****
        end Prepend;
  
        -------------
        -- Replace --
        -------------
  
        procedure Replace
!         (L        : Instance;
           Old_Elem : Element_Type;
           New_Elem : Element_Type)
        is
--- 667,695 ----
        end Prepend;
  
        -------------
+       -- Present --
+       -------------
+ 
+       function Present (L : Doubly_Linked_List) return Boolean is
+       begin
+          return L /= Nil;
+       end Present;
+ 
+       -------------
+       -- Present --
+       -------------
+ 
+       function Present (Nod : Node_Ptr) return Boolean is
+       begin
+          return Nod /= null;
+       end Present;
+ 
+       -------------
        -- Replace --
        -------------
  
        procedure Replace
!         (L        : Doubly_Linked_List;
           Old_Elem : Element_Type;
           New_Elem : Element_Type)
        is
*************** package body GNAT.Lists is
*** 607,613 ****
        -- Size --
        ----------
  
!       function Size (L : Instance) return Natural is
        begin
           Ensure_Created (L);
  
--- 712,718 ----
        -- Size --
        ----------
  
!       function Size (L : Doubly_Linked_List) return Natural is
        begin
           Ensure_Created (L);
  
*************** package body GNAT.Lists is
*** 618,632 ****
        -- Unlock --
        ------------
  
!       procedure Unlock (L : Instance) is
        begin
!          pragma Assert (L /= null);
  
           --  The list may be locked multiple times if multiple iterators are
           --  operating over it.
  
           L.Iterators := L.Iterators - 1;
        end Unlock;
!    end Doubly_Linked_List;
  
  end GNAT.Lists;
--- 723,737 ----
        -- Unlock --
        ------------
  
!       procedure Unlock (L : Doubly_Linked_List) is
        begin
!          pragma Assert (Present (L));
  
           --  The list may be locked multiple times if multiple iterators are
           --  operating over it.
  
           L.Iterators := L.Iterators - 1;
        end Unlock;
!    end Doubly_Linked_Lists;
  
  end GNAT.Lists;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-lists.ads gcc-10.1.0/gcc/ada/libgnat/g-lists.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-lists.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-lists.ads	Thu May  7 10:49:59 2020
*************** package GNAT.Lists is
*** 40,51 ****
     --  The following package offers a doubly linked list abstraction with the
     --  following characteristics:
     --
!    --    * Creation of multiple instances, of different sizes.
!    --    * Iterable elements.
     --
     --  The following use pattern must be employed with this list:
     --
!    --    List : Instance := Create;
     --
     --    <various operations>
     --
--- 40,51 ----
     --  The following package offers a doubly linked list abstraction with the
     --  following characteristics:
     --
!    --    * Creation of multiple instances, of different sizes
!    --    * Iterable elements
     --
     --  The following use pattern must be employed with this list:
     --
!    --    List : Doubly_Linked_List := Create;
     --
     --    <various operations>
     --
*************** package GNAT.Lists is
*** 60,119 ****
          (Left  : Element_Type;
           Right : Element_Type) return Boolean;
  
!    package Doubly_Linked_List is
  
        ---------------------
        -- List operations --
        ---------------------
  
!       type Instance is private;
!       Nil : constant Instance;
  
        --  The following exception is raised when the list is empty, and an
        --  attempt is made to delete an element from it.
  
        List_Empty : exception;
  
!       procedure Append (L : Instance; Elem : Element_Type);
        --  Insert element Elem at the end of list L. This action will raise
        --  Iterated if the list has outstanding iterators.
  
!       function Contains (L : Instance; Elem : Element_Type) return Boolean;
        --  Determine whether list L contains element Elem
  
!       function Create return Instance;
        --  Create a new list
  
!       procedure Delete (L : Instance; Elem : Element_Type);
        --  Delete element Elem from list L. The routine has no effect if Elem is
        --  not present. This action will raise
        --
        --    * List_Empty if the list is empty.
        --    * Iterated if the list has outstanding iterators.
  
!       procedure Delete_First (L : Instance);
        --  Delete an element from the start of list L. This action will raise
        --
        --    * List_Empty if the list is empty.
        --    * Iterated if the list has outstanding iterators.
  
!       procedure Delete_Last (L : Instance);
        --  Delete an element from the end of list L. This action will raise
        --
        --    * List_Empty if the list is empty.
        --    * Iterated if the list has outstanding iterators.
  
!       procedure Destroy (L : in out Instance);
        --  Destroy the contents of list L. This routine must be called at the
        --  end of a list's lifetime. This action will raise Iterated if the
        --  list has outstanding iterators.
  
!       function First (L : Instance) return Element_Type;
        --  Obtain an element from the start of list L. This action will raise
        --  List_Empty if the list is empty.
  
        procedure Insert_After
!         (L     : Instance;
           After : Element_Type;
           Elem  : Element_Type);
        --  Insert new element Elem after element After in list L. The routine
--- 60,134 ----
          (Left  : Element_Type;
           Right : Element_Type) return Boolean;
  
!       with procedure Destroy_Element (Elem : in out Element_Type);
!       --  Element destructor
! 
!    package Doubly_Linked_Lists is
  
        ---------------------
        -- List operations --
        ---------------------
  
!       type Doubly_Linked_List is private;
!       Nil : constant Doubly_Linked_List;
  
        --  The following exception is raised when the list is empty, and an
        --  attempt is made to delete an element from it.
  
        List_Empty : exception;
  
!       procedure Append
!         (L    : Doubly_Linked_List;
!          Elem : Element_Type);
        --  Insert element Elem at the end of list L. This action will raise
        --  Iterated if the list has outstanding iterators.
  
!       function Contains
!         (L    : Doubly_Linked_List;
!          Elem : Element_Type) return Boolean;
        --  Determine whether list L contains element Elem
  
!       function Create return Doubly_Linked_List;
        --  Create a new list
  
!       procedure Delete
!         (L    : Doubly_Linked_List;
!          Elem : Element_Type);
        --  Delete element Elem from list L. The routine has no effect if Elem is
        --  not present. This action will raise
        --
        --    * List_Empty if the list is empty.
        --    * Iterated if the list has outstanding iterators.
  
!       procedure Delete_First (L : Doubly_Linked_List);
        --  Delete an element from the start of list L. This action will raise
        --
        --    * List_Empty if the list is empty.
        --    * Iterated if the list has outstanding iterators.
  
!       procedure Delete_Last (L : Doubly_Linked_List);
        --  Delete an element from the end of list L. This action will raise
        --
        --    * List_Empty if the list is empty.
        --    * Iterated if the list has outstanding iterators.
  
!       procedure Destroy (L : in out Doubly_Linked_List);
        --  Destroy the contents of list L. This routine must be called at the
        --  end of a list's lifetime. This action will raise Iterated if the
        --  list has outstanding iterators.
  
!       function Equal
!         (Left  : Doubly_Linked_List;
!          Right : Doubly_Linked_List) return Boolean;
!       --  Determine whether lists Left and Right have the same characteristics
!       --  and contain the same elements.
! 
!       function First (L : Doubly_Linked_List) return Element_Type;
        --  Obtain an element from the start of list L. This action will raise
        --  List_Empty if the list is empty.
  
        procedure Insert_After
!         (L     : Doubly_Linked_List;
           After : Element_Type;
           Elem  : Element_Type);
        --  Insert new element Elem after element After in list L. The routine
*************** package GNAT.Lists is
*** 121,153 ****
        --  Iterated if the list has outstanding iterators.
  
        procedure Insert_Before
!         (L      : Instance;
           Before : Element_Type;
           Elem   : Element_Type);
        --  Insert new element Elem before element Before in list L. The routine
        --  has no effect if After is not present. This action will raise
        --  Iterated if the list has outstanding iterators.
  
!       function Is_Empty (L : Instance) return Boolean;
        --  Determine whether list L is empty
  
!       function Last (L : Instance) return Element_Type;
        --  Obtain an element from the end of list L. This action will raise
        --  List_Empty if the list is empty.
  
!       procedure Prepend (L : Instance; Elem : Element_Type);
        --  Insert element Elem at the start of list L. This action will raise
        --  Iterated if the list has outstanding iterators.
  
        procedure Replace
!         (L        : Instance;
           Old_Elem : Element_Type;
           New_Elem : Element_Type);
        --  Replace old element Old_Elem with new element New_Elem in list L. The
        --  routine has no effect if Old_Elem is not present. This action will
        --  raise Iterated if the list has outstanding iterators.
  
!       function Size (L : Instance) return Natural;
        --  Obtain the number of elements in list L
  
        -------------------------
--- 136,173 ----
        --  Iterated if the list has outstanding iterators.
  
        procedure Insert_Before
!         (L      : Doubly_Linked_List;
           Before : Element_Type;
           Elem   : Element_Type);
        --  Insert new element Elem before element Before in list L. The routine
        --  has no effect if After is not present. This action will raise
        --  Iterated if the list has outstanding iterators.
  
!       function Is_Empty (L : Doubly_Linked_List) return Boolean;
        --  Determine whether list L is empty
  
!       function Last (L : Doubly_Linked_List) return Element_Type;
        --  Obtain an element from the end of list L. This action will raise
        --  List_Empty if the list is empty.
  
!       procedure Prepend
!         (L    : Doubly_Linked_List;
!          Elem : Element_Type);
        --  Insert element Elem at the start of list L. This action will raise
        --  Iterated if the list has outstanding iterators.
  
+       function Present (L : Doubly_Linked_List) return Boolean;
+       --  Determine whether list L exists
+ 
        procedure Replace
!         (L        : Doubly_Linked_List;
           Old_Elem : Element_Type;
           New_Elem : Element_Type);
        --  Replace old element Old_Elem with new element New_Elem in list L. The
        --  routine has no effect if Old_Elem is not present. This action will
        --  raise Iterated if the list has outstanding iterators.
  
!       function Size (L : Doubly_Linked_List) return Natural;
        --  Obtain the number of elements in list L
  
        -------------------------
*************** package GNAT.Lists is
*** 168,183 ****
  
        type Iterator is private;
  
-       function Iterate (L : Instance) return Iterator;
-       --  Obtain an iterator over the elements of list L. This action locks all
-       --  mutation functionality of the associated list.
- 
        function Has_Next (Iter : Iterator) return Boolean;
        --  Determine whether iterator Iter has more elements to examine. If the
        --  iterator has been exhausted, restore all mutation functionality of
        --  the associated list.
  
!       procedure Next (Iter : in out Iterator; Elem : out Element_Type);
        --  Return the current element referenced by iterator Iter and advance
        --  to the next available element. If the iterator has been exhausted
        --  and further attempts are made to advance it, this routine restores
--- 188,205 ----
  
        type Iterator is private;
  
        function Has_Next (Iter : Iterator) return Boolean;
        --  Determine whether iterator Iter has more elements to examine. If the
        --  iterator has been exhausted, restore all mutation functionality of
        --  the associated list.
  
!       function Iterate (L : Doubly_Linked_List) return Iterator;
!       --  Obtain an iterator over the elements of list L. This action locks all
!       --  mutation functionality of the associated list.
! 
!       procedure Next
!         (Iter : in out Iterator;
!          Elem : out Element_Type);
        --  Return the current element referenced by iterator Iter and advance
        --  to the next available element. If the iterator has been exhausted
        --  and further attempts are made to advance it, this routine restores
*************** package GNAT.Lists is
*** 198,204 ****
  
        --  The following type represents a list
  
!       type Linked_List is record
           Elements : Natural := 0;
           --  The number of elements in the list
  
--- 220,226 ----
  
        --  The following type represents a list
  
!       type Doubly_Linked_List_Attributes is record
           Elements : Natural := 0;
           --  The number of elements in the list
  
*************** package GNAT.Lists is
*** 209,228 ****
           --  The dummy head of the list
        end record;
  
!       type Instance is access all Linked_List;
!       Nil : constant Instance := null;
  
        --  The following type represents an element iterator
  
        type Iterator is record
!          List : Instance := null;
!          --  Reference to the associated list
! 
!          Nod : Node_Ptr := null;
           --  Reference to the current node being examined. The invariant of the
           --  iterator requires that this field always points to a valid node. A
           --  value of null indicates that the iterator is exhausted.
        end record;
!    end Doubly_Linked_List;
  
  end GNAT.Lists;
--- 231,250 ----
           --  The dummy head of the list
        end record;
  
!       type Doubly_Linked_List is access all Doubly_Linked_List_Attributes;
!       Nil : constant Doubly_Linked_List := null;
  
        --  The following type represents an element iterator
  
        type Iterator is record
!          Curr_Nod : Node_Ptr := null;
           --  Reference to the current node being examined. The invariant of the
           --  iterator requires that this field always points to a valid node. A
           --  value of null indicates that the iterator is exhausted.
+ 
+          List : Doubly_Linked_List := null;
+          --  Reference to the associated list
        end record;
!    end Doubly_Linked_Lists;
  
  end GNAT.Lists;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-regexp.ads gcc-10.1.0/gcc/ada/libgnat/g-regexp.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-regexp.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-regexp.ads	Thu May  7 10:49:59 2020
***************
*** 50,56 ****
  --       matching with the restriction that it matches entire strings. It
  --       is particularly useful for file name matching, and in particular
  --       it provides "globbing patterns" that are useful in implementing
! --       unix or DOS style wild card matching for file names.
  
  --     GNAT.Regpat (files g-regpat.ads/s-regpat.ads/g-regpat.adb)
  --       This is a more complete implementation of Unix-style regular
--- 50,56 ----
  --       matching with the restriction that it matches entire strings. It
  --       is particularly useful for file name matching, and in particular
  --       it provides "globbing patterns" that are useful in implementing
! --       unix or DOS style wildcard matching for file names.
  
  --     GNAT.Regpat (files g-regpat.ads/s-regpat.ads/g-regpat.adb)
  --       This is a more complete implementation of Unix-style regular
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-regpat.ads gcc-10.1.0/gcc/ada/libgnat/g-regpat.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-regpat.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-regpat.ads	Thu May  7 10:49:59 2020
***************
*** 53,59 ****
  --       matching with the restriction that it matches entire strings. It
  --       is particularly useful for file name matching, and in particular
  --       it provides "globbing patterns" that are useful in implementing
! --       unix or DOS style wild card matching for file names.
  
  --     GNAT.Regpat (files g-regpat.ads/s-regpat.ads/s-regpat.adb)
  --       This is a more complete implementation of Unix-style regular
--- 53,59 ----
  --       matching with the restriction that it matches entire strings. It
  --       is particularly useful for file name matching, and in particular
  --       it provides "globbing patterns" that are useful in implementing
! --       unix or DOS style wildcard matching for file names.
  
  --     GNAT.Regpat (files g-regpat.ads/s-regpat.ads/s-regpat.adb)
  --       This is a more complete implementation of Unix-style regular
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-sercom.adb gcc-10.1.0/gcc/ada/libgnat/g-sercom.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-sercom.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-sercom.adb	Thu May  7 10:49:59 2020
*************** package body GNAT.Serial_Communications
*** 103,108 ****
--- 103,117 ----
        Unimplemented;
     end Read;
  
+    ------------
+    -- To_Ada --
+    ------------
+ 
+    procedure To_Ada (Port : out Serial_Port; Fd : Serial_Port_Descriptor) is
+    begin
+       Unimplemented;
+    end To_Ada;
+ 
     -----------
     -- Write --
     -----------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-sercom.ads gcc-10.1.0/gcc/ada/libgnat/g-sercom.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-sercom.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-sercom.ads	Thu May  7 10:49:59 2020
***************
*** 33,38 ****
--- 33,39 ----
  
  with Ada.Streams;
  with Interfaces.C;
+ with System.OS_Constants;
  
  package GNAT.Serial_Communications is
  
*************** package GNAT.Serial_Communications is
*** 100,107 ****
     --  cases, an explicit port name can be passed directly to Open.
  
     type Data_Rate is
!      (B75, B110, B150, B300, B600, B1200, B2400, B4800, B9600,
!       B19200, B38400, B57600, B115200);
     --  Speed of the communication
  
     type Data_Bits is (CS8, CS7);
--- 101,113 ----
     --  cases, an explicit port name can be passed directly to Open.
  
     type Data_Rate is
!      (B75, B110, B150, B300, B600, B1200,
!       B2400, B4800, B9600,
!       B19200, B38400, B57600, B115200,
!       B230400, B460800, B500000, B576000, B921600,
!       B1000000, B1152000, B1500000,
!       B2000000, B2500000, B3000000,
!       B3500000, B4000000);
     --  Speed of the communication
  
     type Data_Bits is (CS8, CS7);
*************** package GNAT.Serial_Communications is
*** 117,122 ****
--- 123,133 ----
     --  No flow control, hardware flow control, software flow control
  
     type Serial_Port is new Ada.Streams.Root_Stream_Type with private;
+    --  Serial port stream type
+ 
+    type Serial_Port_Descriptor is
+      new System.OS_Constants.Serial_Port_Descriptor;
+    --  OS specific serial port descriptor
  
     procedure Open
       (Port : out Serial_Port;
*************** package GNAT.Serial_Communications is
*** 163,190 ****
     procedure Close (Port : in out Serial_Port);
     --  Close port
  
! private
  
!    type Port_Data;
!    type Port_Data_Access is access Port_Data;
  
     type Serial_Port is new Ada.Streams.Root_Stream_Type with record
!       H : Port_Data_Access;
     end record;
  
     Data_Rate_Value : constant array (Data_Rate) of Interfaces.C.unsigned :=
!                        (B75     =>      75,
!                         B110    =>     110,
!                         B150    =>     150,
!                         B300    =>     300,
!                         B600    =>     600,
!                         B1200   =>   1_200,
!                         B2400   =>   2_400,
!                         B4800   =>   4_800,
!                         B9600   =>   9_600,
!                         B19200  =>  19_200,
!                         B38400  =>  38_400,
!                         B57600  =>  57_600,
!                         B115200 => 115_200);
  
  end GNAT.Serial_Communications;
--- 174,225 ----
     procedure Close (Port : in out Serial_Port);
     --  Close port
  
!    procedure To_Ada (Port : out Serial_Port; Fd : Serial_Port_Descriptor)
!      with Inline;
!    --  Convert a serial port descriptor to Serial_Port. This is useful when a
!    --  serial port descriptor is obtained from an external library call.
  
!    function To_C
!      (Port : Serial_Port) return Serial_Port_Descriptor with Inline;
!    --  Return a serial port descriptor to be used by external subprograms.
!    --  This is useful for C functions that are not yet interfaced in this
!    --  package.
! 
! private
  
     type Serial_Port is new Ada.Streams.Root_Stream_Type with record
!       H : Serial_Port_Descriptor := -1;
     end record;
  
     Data_Rate_Value : constant array (Data_Rate) of Interfaces.C.unsigned :=
!                        (B75      =>        75,
!                         B110     =>       110,
!                         B150     =>       150,
!                         B300     =>       300,
!                         B600     =>       600,
!                         B1200    =>     1_200,
!                         B2400    =>     2_400,
!                         B4800    =>     4_800,
!                         B9600    =>     9_600,
!                         B19200   =>    19_200,
!                         B38400   =>    38_400,
!                         B57600   =>    57_600,
!                         B115200  =>   115_200,
!                         B230400  =>   230_400,
!                         B460800  =>   460_800,
!                         B500000  =>   500_000,
!                         B576000  =>   576_000,
!                         B921600  =>   921_600,
!                         B1000000 => 1_000_000,
!                         B1152000 => 1_152_000,
!                         B1500000 => 1_500_000,
!                         B2000000 => 2_000_000,
!                         B2500000 => 2_500_000,
!                         B3000000 => 3_000_000,
!                         B3500000 => 3_500_000,
!                         B4000000 => 4_000_000);
! 
!    function To_C (Port : Serial_Port) return Serial_Port_Descriptor is
!       (Port.H);
  
  end GNAT.Serial_Communications;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-sercom__linux.adb gcc-10.1.0/gcc/ada/libgnat/g-sercom__linux.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-sercom__linux.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-sercom__linux.adb	Thu May  7 10:49:59 2020
***************
*** 33,44 ****
  
  with Ada.Streams;                use Ada.Streams;
  with Ada;                        use Ada;
- with Ada.Unchecked_Deallocation;
  
  with System;               use System;
  with System.Communication; use System.Communication;
  with System.CRTL;          use System.CRTL;
- with System.OS_Constants;
  
  with GNAT.OS_Lib; use GNAT.OS_Lib;
  
--- 33,42 ----
*************** package body GNAT.Serial_Communications
*** 48,55 ****
  
     use type Interfaces.C.unsigned;
  
-    type Port_Data is new int;
- 
     subtype unsigned is Interfaces.C.unsigned;
     subtype char is Interfaces.C.char;
     subtype unsigned_char is Interfaces.C.unsigned_char;
--- 46,51 ----
*************** package body GNAT.Serial_Communications
*** 58,76 ****
     pragma Import (C, fcntl, "fcntl");
  
     C_Data_Rate : constant array (Data_Rate) of unsigned :=
!                    (B75     => OSC.B75,
!                     B110    => OSC.B110,
!                     B150    => OSC.B150,
!                     B300    => OSC.B300,
!                     B600    => OSC.B600,
!                     B1200   => OSC.B1200,
!                     B2400   => OSC.B2400,
!                     B4800   => OSC.B4800,
!                     B9600   => OSC.B9600,
!                     B19200  => OSC.B19200,
!                     B38400  => OSC.B38400,
!                     B57600  => OSC.B57600,
!                     B115200 => OSC.B115200);
  
     C_Bits      : constant array (Data_Bits) of unsigned :=
                     (CS7 => OSC.CS7, CS8 => OSC.CS8);
--- 54,85 ----
     pragma Import (C, fcntl, "fcntl");
  
     C_Data_Rate : constant array (Data_Rate) of unsigned :=
!                    (B75      => OSC.B75,
!                     B110     => OSC.B110,
!                     B150     => OSC.B150,
!                     B300     => OSC.B300,
!                     B600     => OSC.B600,
!                     B1200    => OSC.B1200,
!                     B2400    => OSC.B2400,
!                     B4800    => OSC.B4800,
!                     B9600    => OSC.B9600,
!                     B19200   => OSC.B19200,
!                     B38400   => OSC.B38400,
!                     B57600   => OSC.B57600,
!                     B115200  => OSC.B115200,
!                     B230400  => OSC.B230400,
!                     B460800  => OSC.B460800,
!                     B500000  => OSC.B500000,
!                     B576000  => OSC.B576000,
!                     B921600  => OSC.B921600,
!                     B1000000 => OSC.B1000000,
!                     B1152000 => OSC.B1152000,
!                     B1500000 => OSC.B1500000,
!                     B2000000 => OSC.B2000000,
!                     B2500000 => OSC.B2500000,
!                     B3000000 => OSC.B3000000,
!                     B3500000 => OSC.B3500000,
!                     B4000000 => OSC.B4000000);
  
     C_Bits      : constant array (Data_Bits) of unsigned :=
                     (CS7 => OSC.CS7, CS8 => OSC.CS8);
*************** package body GNAT.Serial_Communications
*** 111,130 ****
        Res    : int;
  
     begin
!       if Port.H = null then
!          Port.H := new Port_Data;
!       end if;
! 
!       Port.H.all := Port_Data (open
           (C_Name (C_Name'First)'Address, int (O_RDWR + O_NOCTTY + O_NDELAY)));
  
!       if Port.H.all = -1 then
           Raise_Error ("open: open failed");
        end if;
  
        --  By default we are in blocking mode
  
!       Res := fcntl (int (Port.H.all), F_SETFL, 0);
  
        if Res = -1 then
           Raise_Error ("open: fcntl failed");
--- 120,135 ----
        Res    : int;
  
     begin
!       Port.H := Serial_Port_Descriptor (open
           (C_Name (C_Name'First)'Address, int (O_RDWR + O_NOCTTY + O_NDELAY)));
  
!       if Port.H = -1 then
           Raise_Error ("open: open failed");
        end if;
  
        --  By default we are in blocking mode
  
!       Res := fcntl (int (Port.H), F_SETFL, 0);
  
        if Res = -1 then
           Raise_Error ("open: fcntl failed");
*************** package body GNAT.Serial_Communications
*** 156,166 ****
        Res : ssize_t;
  
     begin
!       if Port.H = null then
           Raise_Error ("read: port not opened", 0);
        end if;
  
!       Res := read (Integer (Port.H.all), Buffer'Address, Len);
  
        if Res = -1 then
           Raise_Error ("read failed");
--- 161,171 ----
        Res : ssize_t;
  
     begin
!       if Port.H = -1 then
           Raise_Error ("read: port not opened", 0);
        end if;
  
!       Res := read (Integer (Port.H), Buffer'Address, Len);
  
        if Res = -1 then
           Raise_Error ("read failed");
*************** package body GNAT.Serial_Communications
*** 215,227 ****
        --  Warnings off, since we don't always test the result
  
     begin
!       if Port.H = null then
           Raise_Error ("set: port not opened", 0);
        end if;
  
        --  Get current port settings
  
!       Res := tcgetattr (int (Port.H.all), Current'Address);
  
        --  Change settings now
  
--- 220,232 ----
        --  Warnings off, since we don't always test the result
  
     begin
!       if Port.H = -1 then
           Raise_Error ("set: port not opened", 0);
        end if;
  
        --  Get current port settings
  
!       Res := tcgetattr (int (Port.H), Current'Address);
  
        --  Change settings now
  
*************** package body GNAT.Serial_Communications
*** 256,273 ****
  
        --  Set port settings
  
!       Res := tcflush (int (Port.H.all), TCIFLUSH);
!       Res := tcsetattr (int (Port.H.all), TCSANOW, Current'Address);
  
        --  Block
  
!       Res := fcntl (int (Port.H.all), F_SETFL, (if Block then 0 else FNDELAY));
  
        if Res = -1 then
           Raise_Error ("set: fcntl failed");
        end if;
     end Set;
  
     -----------
     -- Write --
     -----------
--- 261,287 ----
  
        --  Set port settings
  
!       Res := tcflush (int (Port.H), TCIFLUSH);
!       Res := tcsetattr (int (Port.H), TCSANOW, Current'Address);
  
        --  Block
  
!       Res := fcntl (int (Port.H), F_SETFL, (if Block then 0 else FNDELAY));
  
        if Res = -1 then
           Raise_Error ("set: fcntl failed");
        end if;
     end Set;
  
+    ------------
+    -- To_Ada --
+    ------------
+ 
+    procedure To_Ada (Port : out Serial_Port; Fd : Serial_Port_Descriptor) is
+    begin
+       Port.H := Fd;
+    end To_Ada;
+ 
     -----------
     -- Write --
     -----------
*************** package body GNAT.Serial_Communications
*** 280,290 ****
        Res : ssize_t;
  
     begin
!       if Port.H = null then
           Raise_Error ("write: port not opened", 0);
        end if;
  
!       Res := write (int (Port.H.all), Buffer'Address, Len);
  
        if Res = -1 then
           Raise_Error ("write failed");
--- 294,304 ----
        Res : ssize_t;
  
     begin
!       if Port.H = -1 then
           Raise_Error ("write: port not opened", 0);
        end if;
  
!       Res := write (int (Port.H), Buffer'Address, Len);
  
        if Res = -1 then
           Raise_Error ("write failed");
*************** package body GNAT.Serial_Communications
*** 298,313 ****
     -----------
  
     procedure Close (Port : in out Serial_Port) is
-       procedure Unchecked_Free is
-         new Unchecked_Deallocation (Port_Data, Port_Data_Access);
- 
        Res : int;
        pragma Unreferenced (Res);
  
     begin
!       if Port.H /= null then
!          Res := close (int (Port.H.all));
!          Unchecked_Free (Port.H);
        end if;
     end Close;
  
--- 312,323 ----
     -----------
  
     procedure Close (Port : in out Serial_Port) is
        Res : int;
        pragma Unreferenced (Res);
  
     begin
!       if Port.H /= -1 then
!          Res := close (int (Port.H));
        end if;
     end Close;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-sercom__mingw.adb gcc-10.1.0/gcc/ada/libgnat/g-sercom__mingw.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-sercom__mingw.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-sercom__mingw.adb	Thu May  7 10:49:59 2020
***************
*** 31,43 ****
  
  --  This is the Windows implementation of this package
  
! with Ada.Streams;                use Ada.Streams;
! with Ada.Unchecked_Deallocation; use Ada;
  
  with System;               use System;
  with System.Communication; use System.Communication;
  with System.CRTL;          use System.CRTL;
- with System.OS_Constants;
  with System.Win32;         use System.Win32;
  with System.Win32.Ext;     use System.Win32.Ext;
  
--- 31,41 ----
  
  --  This is the Windows implementation of this package
  
! with Ada.Streams;          use Ada.Streams, Ada;
  
  with System;               use System;
  with System.Communication; use System.Communication;
  with System.CRTL;          use System.CRTL;
  with System.Win32;         use System.Win32;
  with System.Win32.Ext;     use System.Win32.Ext;
  
*************** package body GNAT.Serial_Communications
*** 49,56 ****
  
     --  Common types
  
-    type Port_Data is new HANDLE;
- 
     C_Bits      : constant array (Data_Bits) of Interfaces.C.unsigned := (8, 7);
     C_Parity    : constant array (Parity_Check) of Interfaces.C.unsigned :=
                     (None => NOPARITY, Odd => ODDPARITY, Even => EVENPARITY);
--- 47,52 ----
*************** package body GNAT.Serial_Communications
*** 69,83 ****
     -----------
  
     procedure Close (Port : in out Serial_Port) is
-       procedure Unchecked_Free is
-         new Unchecked_Deallocation (Port_Data, Port_Data_Access);
- 
        Success : BOOL;
  
     begin
!       if Port.H /= null then
!          Success := CloseHandle (HANDLE (Port.H.all));
!          Unchecked_Free (Port.H);
  
           if Success = Win32.FALSE then
              Raise_Error ("error closing the port");
--- 65,75 ----
     -----------
  
     procedure Close (Port : in out Serial_Port) is
        Success : BOOL;
  
     begin
!       if Port.H /= -1 then
!          Success := CloseHandle (HANDLE (Port.H));
  
           if Success = Win32.FALSE then
              Raise_Error ("error closing the port");
*************** package body GNAT.Serial_Communications
*** 114,126 ****
        pragma Unreferenced (Success);
  
     begin
!       if Port.H = null then
!          Port.H := new Port_Data;
!       else
!          Success := CloseHandle (HANDLE (Port.H.all));
        end if;
  
!       Port.H.all := CreateFileA
          (lpFileName            => C_Name (C_Name'First)'Address,
           dwDesiredAccess       => GENERIC_READ or GENERIC_WRITE,
           dwShareMode           => 0,
--- 106,116 ----
        pragma Unreferenced (Success);
  
     begin
!       if Port.H /= -1 then
!          Success := CloseHandle (HANDLE (Port.H));
        end if;
  
!       Port.H := CreateFileA
          (lpFileName            => C_Name (C_Name'First)'Address,
           dwDesiredAccess       => GENERIC_READ or GENERIC_WRITE,
           dwShareMode           => 0,
*************** package body GNAT.Serial_Communications
*** 129,135 ****
           dwFlagsAndAttributes  => 0,
           hTemplateFile         => 0);
  
!       if Port.H.all = Port_Data (INVALID_HANDLE_VALUE) then
           Raise_Error ("cannot open com port");
        end if;
     end Open;
--- 119,127 ----
           dwFlagsAndAttributes  => 0,
           hTemplateFile         => 0);
  
!       pragma Assert (INVALID_HANDLE_VALUE = -1);
! 
!       if Port.H = Serial_Port_Descriptor (INVALID_HANDLE_VALUE) then
           Raise_Error ("cannot open com port");
        end if;
     end Open;
*************** package body GNAT.Serial_Communications
*** 159,171 ****
        Read_Last : aliased DWORD;
  
     begin
!       if Port.H = null then
           Raise_Error ("read: port not opened", 0);
        end if;
  
        Success :=
          ReadFile
!           (hFile                => HANDLE (Port.H.all),
             lpBuffer             => Buffer (Buffer'First)'Address,
             nNumberOfBytesToRead => DWORD (Buffer'Length),
             lpNumberOfBytesRead  => Read_Last'Access,
--- 151,163 ----
        Read_Last : aliased DWORD;
  
     begin
!       if Port.H = -1 then
           Raise_Error ("read: port not opened", 0);
        end if;
  
        Success :=
          ReadFile
!           (hFile                => HANDLE (Port.H),
             lpBuffer             => Buffer (Buffer'First)'Address,
             nNumberOfBytesToRead => DWORD (Buffer'Length),
             lpNumberOfBytesRead  => Read_Last'Access,
*************** package body GNAT.Serial_Communications
*** 175,181 ****
           Raise_Error ("read error");
        end if;
  
!       Last := Last_Index (Buffer'First, size_t (Read_Last));
     end Read;
  
     ---------
--- 167,173 ----
           Raise_Error ("read error");
        end if;
  
!       Last := Last_Index (Buffer'First, CRTL.size_t (Read_Last));
     end Read;
  
     ---------
*************** package body GNAT.Serial_Communications
*** 200,214 ****
        Com_Settings : aliased DCB;
  
     begin
!       if Port.H = null then
           Raise_Error ("set: port not opened", 0);
        end if;
  
!       Success := GetCommState (HANDLE (Port.H.all), Com_Settings'Access);
  
        if Success = Win32.FALSE then
!          Success := CloseHandle (HANDLE (Port.H.all));
!          Port.H.all := 0;
           Raise_Error ("set: cannot get comm state");
        end if;
  
--- 192,205 ----
        Com_Settings : aliased DCB;
  
     begin
!       if Port.H = -1 then
           Raise_Error ("set: port not opened", 0);
        end if;
  
!       Success := GetCommState (HANDLE (Port.H), Com_Settings'Access);
  
        if Success = Win32.FALSE then
!          Success := CloseHandle (HANDLE (Port.H));
           Raise_Error ("set: cannot get comm state");
        end if;
  
*************** package body GNAT.Serial_Communications
*** 240,250 ****
        Com_Settings.Parity        := BYTE (C_Parity (Parity));
        Com_Settings.StopBits      := BYTE (C_Stop_Bits (Stop_Bits));
  
!       Success := SetCommState (HANDLE (Port.H.all), Com_Settings'Access);
  
        if Success = Win32.FALSE then
!          Success := CloseHandle (HANDLE (Port.H.all));
!          Port.H.all := 0;
           Raise_Error ("cannot set comm state");
        end if;
  
--- 231,240 ----
        Com_Settings.Parity        := BYTE (C_Parity (Parity));
        Com_Settings.StopBits      := BYTE (C_Stop_Bits (Stop_Bits));
  
!       Success := SetCommState (HANDLE (Port.H), Com_Settings'Access);
  
        if Success = Win32.FALSE then
!          Success := CloseHandle (HANDLE (Port.H));
           Raise_Error ("cannot set comm state");
        end if;
  
*************** package body GNAT.Serial_Communications
*** 274,280 ****
  
        Success :=
          SetCommTimeouts
!           (hFile          => HANDLE (Port.H.all),
             lpCommTimeouts => Com_Time_Out'Access);
  
        if Success = Win32.FALSE then
--- 264,270 ----
  
        Success :=
          SetCommTimeouts
!           (hFile          => HANDLE (Port.H),
             lpCommTimeouts => Com_Time_Out'Access);
  
        if Success = Win32.FALSE then
*************** package body GNAT.Serial_Communications
*** 282,287 ****
--- 272,286 ----
        end if;
     end Set;
  
+    ------------
+    -- To_Ada --
+    ------------
+ 
+    procedure To_Ada (Port : out Serial_Port; Fd : Serial_Port_Descriptor) is
+    begin
+       Port.H := Fd;
+    end To_Ada;
+ 
     -----------
     -- Write --
     -----------
*************** package body GNAT.Serial_Communications
*** 294,306 ****
        Temp_Last : aliased DWORD;
  
     begin
!       if Port.H = null then
           Raise_Error ("write: port not opened", 0);
        end if;
  
        Success :=
          WriteFile
!           (hFile                  => HANDLE (Port.H.all),
             lpBuffer               => Buffer'Address,
             nNumberOfBytesToWrite  => DWORD (Buffer'Length),
             lpNumberOfBytesWritten => Temp_Last'Access,
--- 293,305 ----
        Temp_Last : aliased DWORD;
  
     begin
!       if Port.H = -1 then
           Raise_Error ("write: port not opened", 0);
        end if;
  
        Success :=
          WriteFile
!           (hFile                  => HANDLE (Port.H),
             lpBuffer               => Buffer'Address,
             nNumberOfBytesToWrite  => DWORD (Buffer'Length),
             lpNumberOfBytesWritten => Temp_Last'Access,
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-sets.adb gcc-10.1.0/gcc/ada/libgnat/g-sets.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-sets.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-sets.adb	Thu May  7 10:49:59 2020
***************
*** 31,76 ****
  
  package body GNAT.Sets is
  
!    --------------------
!    -- Membership_Set --
!    --------------------
  
!    package body Membership_Set is
  
        --------------
        -- Contains --
        --------------
  
!       function Contains (S : Instance; Elem : Element_Type) return Boolean is
        begin
!          return Hashed_Set.Get (Hashed_Set.Instance (S), Elem);
        end Contains;
  
        ------------
        -- Create --
        ------------
  
!       function Create (Initial_Size : Positive) return Instance is
        begin
!          return Instance (Hashed_Set.Create (Initial_Size));
        end Create;
  
        ------------
        -- Delete --
        ------------
  
!       procedure Delete (S : Instance; Elem : Element_Type) is
        begin
!          Hashed_Set.Delete (Hashed_Set.Instance (S), Elem);
        end Delete;
  
        -------------
        -- Destroy --
        -------------
  
!       procedure Destroy (S : in out Instance) is
        begin
!          Hashed_Set.Destroy (Hashed_Set.Instance (S));
        end Destroy;
  
        --------------
--- 31,89 ----
  
  package body GNAT.Sets is
  
!    ---------------------
!    -- Membership_Sets --
!    ---------------------
  
!    package body Membership_Sets is
  
        --------------
        -- Contains --
        --------------
  
!       function Contains
!         (S    : Membership_Set;
!          Elem : Element_Type) return Boolean
!       is
        begin
!          return Hashed_Set.Contains (Hashed_Set.Dynamic_Hash_Table (S), Elem);
        end Contains;
  
        ------------
        -- Create --
        ------------
  
!       function Create (Initial_Size : Positive) return Membership_Set is
        begin
!          return Membership_Set (Hashed_Set.Create (Initial_Size));
        end Create;
  
        ------------
        -- Delete --
        ------------
  
!       procedure Delete (S : Membership_Set; Elem : Element_Type) is
        begin
!          Hashed_Set.Delete (Hashed_Set.Dynamic_Hash_Table (S), Elem);
        end Delete;
  
        -------------
        -- Destroy --
        -------------
  
!       procedure Destroy (B : in out Boolean) is
!          pragma Unreferenced (B);
        begin
!          null;
!       end Destroy;
! 
!       -------------
!       -- Destroy --
!       -------------
! 
!       procedure Destroy (S : in out Membership_Set) is
!       begin
!          Hashed_Set.Destroy (Hashed_Set.Dynamic_Hash_Table (S));
        end Destroy;
  
        --------------
*************** package body GNAT.Sets is
*** 86,131 ****
        -- Insert --
        ------------
  
!       procedure Insert (S : Instance; Elem : Element_Type) is
        begin
!          Hashed_Set.Put (Hashed_Set.Instance (S), Elem, True);
        end Insert;
  
        --------------
        -- Is_Empty --
        --------------
  
!       function Is_Empty (S : Instance) return Boolean is
        begin
!          return Hashed_Set.Is_Empty (Hashed_Set.Instance (S));
        end Is_Empty;
  
        -------------
        -- Iterate --
        -------------
  
!       function Iterate (S : Instance) return Iterator is
        begin
!          return Iterator (Hashed_Set.Iterate (Hashed_Set.Instance (S)));
        end Iterate;
  
        ----------
        -- Next --
        ----------
  
!       procedure Next (Iter : in out Iterator; Elem : out Element_Type) is
        begin
           Hashed_Set.Next (Hashed_Set.Iterator (Iter), Elem);
        end Next;
  
        ----------
        -- Size --
        ----------
  
!       function Size (S : Instance) return Natural is
        begin
!          return Hashed_Set.Size (Hashed_Set.Instance (S));
        end Size;
!    end Membership_Set;
  
  end GNAT.Sets;
--- 99,169 ----
        -- Insert --
        ------------
  
!       procedure Insert
!         (S    : Membership_Set;
!          Elem : Element_Type)
!       is
        begin
!          Hashed_Set.Put (Hashed_Set.Dynamic_Hash_Table (S), Elem, True);
        end Insert;
  
        --------------
        -- Is_Empty --
        --------------
  
!       function Is_Empty (S : Membership_Set) return Boolean is
        begin
!          return Hashed_Set.Is_Empty (Hashed_Set.Dynamic_Hash_Table (S));
        end Is_Empty;
  
        -------------
        -- Iterate --
        -------------
  
!       function Iterate (S : Membership_Set) return Iterator is
        begin
!          return
!            Iterator (Hashed_Set.Iterate (Hashed_Set.Dynamic_Hash_Table (S)));
        end Iterate;
  
        ----------
        -- Next --
        ----------
  
!       procedure Next
!         (Iter : in out Iterator;
!          Elem : out Element_Type)
!       is
        begin
           Hashed_Set.Next (Hashed_Set.Iterator (Iter), Elem);
        end Next;
  
+       -------------
+       -- Present --
+       -------------
+ 
+       function Present (S : Membership_Set) return Boolean is
+       begin
+          return Hashed_Set.Present (Hashed_Set.Dynamic_Hash_Table (S));
+       end Present;
+ 
+       -----------
+       -- Reset --
+       -----------
+ 
+       procedure Reset (S : Membership_Set) is
+       begin
+          Hashed_Set.Reset (Hashed_Set.Dynamic_Hash_Table (S));
+       end Reset;
+ 
        ----------
        -- Size --
        ----------
  
!       function Size (S : Membership_Set) return Natural is
        begin
!          return Hashed_Set.Size (Hashed_Set.Dynamic_Hash_Table (S));
        end Size;
!    end Membership_Sets;
  
  end GNAT.Sets;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-sets.ads gcc-10.1.0/gcc/ada/libgnat/g-sets.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-sets.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-sets.ads	Thu May  7 10:49:59 2020
*************** package GNAT.Sets is
*** 42,53 ****
     --  The following package offers a membership set abstraction with the
     --  following characteristics:
     --
!    --    * Creation of multiple instances, of different sizes.
!    --    * Iterable elements.
     --
     --  The following use pattern must be employed with this set:
     --
!    --    Set : Instance := Create (<some size>);
     --
     --    <various operations>
     --
--- 42,53 ----
     --  The following package offers a membership set abstraction with the
     --  following characteristics:
     --
!    --    * Creation of multiple instances, of different sizes
!    --    * Iterable elements
     --
     --  The following use pattern must be employed with this set:
     --
!    --    Set : Membership_Set := Create (<some size>);
     --
     --    <various operations>
     --
*************** package GNAT.Sets is
*** 65,71 ****
        with function Hash (Key : Element_Type) return Bucket_Range_Type;
        --  Map an arbitrary key into the range of buckets
  
!    package Membership_Set is
  
        --------------------
        -- Set operations --
--- 65,71 ----
        with function Hash (Key : Element_Type) return Bucket_Range_Type;
        --  Map an arbitrary key into the range of buckets
  
!    package Membership_Sets is
  
        --------------------
        -- Set operations --
*************** package GNAT.Sets is
*** 74,109 ****
        --  The following type denotes a membership set handle. Each instance
        --  must be created using routine Create.
  
!       type Instance is private;
!       Nil : constant Instance;
  
!       function Contains (S : Instance; Elem : Element_Type) return Boolean;
        --  Determine whether membership set S contains element Elem
  
!       function Create (Initial_Size : Positive) return Instance;
        --  Create a new membership set with bucket capacity Initial_Size. This
        --  routine must be called at the start of the membership set's lifetime.
  
!       procedure Delete (S : Instance; Elem : Element_Type);
        --  Delete element Elem from membership set S. The routine has no effect
        --  if the element is not present in the membership set. This action will
        --  raise Iterated if the membership set has outstanding iterators.
  
!       procedure Destroy (S : in out Instance);
        --  Destroy the contents of membership set S, rendering it unusable. This
        --  routine must be called at the end of the membership set's lifetime.
        --  This action will raise Iterated if the hash table has outstanding
        --  iterators.
  
!       procedure Insert (S : Instance; Elem : Element_Type);
        --  Insert element Elem in membership set S. The routine has no effect
        --  if the element is already present in the membership set. This action
        --  will raise Iterated if the membership set has outstanding iterators.
  
!       function Is_Empty (S : Instance) return Boolean;
        --  Determine whether set S is empty
  
!       function Size (S : Instance) return Natural;
        --  Obtain the number of elements in membership set S
  
        -------------------------
--- 74,123 ----
        --  The following type denotes a membership set handle. Each instance
        --  must be created using routine Create.
  
!       type Membership_Set is private;
!       Nil : constant Membership_Set;
  
!       function Contains
!         (S    : Membership_Set;
!          Elem : Element_Type) return Boolean;
        --  Determine whether membership set S contains element Elem
  
!       function Create (Initial_Size : Positive) return Membership_Set;
        --  Create a new membership set with bucket capacity Initial_Size. This
        --  routine must be called at the start of the membership set's lifetime.
  
!       procedure Delete
!         (S    : Membership_Set;
!          Elem : Element_Type);
        --  Delete element Elem from membership set S. The routine has no effect
        --  if the element is not present in the membership set. This action will
        --  raise Iterated if the membership set has outstanding iterators.
  
!       procedure Destroy (S : in out Membership_Set);
        --  Destroy the contents of membership set S, rendering it unusable. This
        --  routine must be called at the end of the membership set's lifetime.
        --  This action will raise Iterated if the hash table has outstanding
        --  iterators.
  
!       procedure Insert
!         (S    : Membership_Set;
!          Elem : Element_Type);
        --  Insert element Elem in membership set S. The routine has no effect
        --  if the element is already present in the membership set. This action
        --  will raise Iterated if the membership set has outstanding iterators.
  
!       function Is_Empty (S : Membership_Set) return Boolean;
        --  Determine whether set S is empty
  
!       function Present (S : Membership_Set) return Boolean;
!       --  Determine whether set S exists
! 
!       procedure Reset (S : Membership_Set);
!       --  Destroy the contents of membership set S, and reset it to its initial
!       --  created state. This action will raise Iterated if the membership set
!       --  has outstanding iterators.
! 
!       function Size (S : Membership_Set) return Natural;
        --  Obtain the number of elements in membership set S
  
        -------------------------
*************** package GNAT.Sets is
*** 124,130 ****
  
        type Iterator is private;
  
!       function Iterate (S : Instance) return Iterator;
        --  Obtain an iterator over the elements of membership set S. This action
        --  locks all mutation functionality of the associated membership set.
  
--- 138,144 ----
  
        type Iterator is private;
  
!       function Iterate (S : Membership_Set) return Iterator;
        --  Obtain an iterator over the elements of membership set S. This action
        --  locks all mutation functionality of the associated membership set.
  
*************** package GNAT.Sets is
*** 141,147 ****
        --  raises Iterator_Exhausted.
  
     private
!       package Hashed_Set is new Dynamic_HTable
          (Key_Type              => Element_Type,
           Value_Type            => Boolean,
           No_Value              => False,
--- 155,164 ----
        --  raises Iterator_Exhausted.
  
     private
!       procedure Destroy (B : in out Boolean);
!       --  Destroy boolean B
! 
!       package Hashed_Set is new Dynamic_Hash_Tables
          (Key_Type              => Element_Type,
           Value_Type            => Boolean,
           No_Value              => False,
*************** package GNAT.Sets is
*** 150,161 ****
           Compression_Threshold => 0.3,
           Compression_Factor    => 2,
           "="                   => "=",
           Hash                  => Hash);
  
!       type Instance is new Hashed_Set.Instance;
!       Nil : constant Instance := Instance (Hashed_Set.Nil);
  
        type Iterator is new Hashed_Set.Iterator;
!    end Membership_Set;
  
  end GNAT.Sets;
--- 167,179 ----
           Compression_Threshold => 0.3,
           Compression_Factor    => 2,
           "="                   => "=",
+          Destroy_Value         => Destroy,
           Hash                  => Hash);
  
!       type Membership_Set is new Hashed_Set.Dynamic_Hash_Table;
!       Nil : constant Membership_Set := Membership_Set (Hashed_Set.Nil);
  
        type Iterator is new Hashed_Set.Iterator;
!    end Membership_Sets;
  
  end GNAT.Sets;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-socket.adb gcc-10.1.0/gcc/ada/libgnat/g-socket.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-socket.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-socket.adb	Thu May  7 10:49:59 2020
*************** package body GNAT.Sockets is
*** 73,83 ****
                 IP_Protocol_For_IP_Level   => SOSC.IPPROTO_IP,
                 IP_Protocol_For_IPv6_Level => SOSC.IPPROTO_IPV6,
                 IP_Protocol_For_UDP_Level  => SOSC.IPPROTO_UDP,
!                IP_Protocol_For_TCP_Level  => SOSC.IPPROTO_TCP);
  
     Modes : constant array (Mode_Type) of C.int :=
               (Socket_Stream   => SOSC.SOCK_STREAM,
!               Socket_Datagram => SOSC.SOCK_DGRAM);
  
     Shutmodes : constant array (Shutmode_Type) of C.int :=
                   (Shut_Read       => SOSC.SHUT_RD,
--- 73,87 ----
                 IP_Protocol_For_IP_Level   => SOSC.IPPROTO_IP,
                 IP_Protocol_For_IPv6_Level => SOSC.IPPROTO_IPV6,
                 IP_Protocol_For_UDP_Level  => SOSC.IPPROTO_UDP,
!                IP_Protocol_For_TCP_Level  => SOSC.IPPROTO_TCP,
!                IP_Protocol_For_ICMP_Level => SOSC.IPPROTO_ICMP,
!                IP_Protocol_For_IGMP_Level => SOSC.IPPROTO_IGMP,
!                IP_Protocol_For_RAW_Level  => SOSC.IPPROTO_RAW);
  
     Modes : constant array (Mode_Type) of C.int :=
               (Socket_Stream   => SOSC.SOCK_STREAM,
!               Socket_Datagram => SOSC.SOCK_DGRAM,
!               Socket_Raw      => SOSC.SOCK_RAW);
  
     Shutmodes : constant array (Shutmode_Type) of C.int :=
                   (Shut_Read       => SOSC.SHUT_RD,
*************** package body GNAT.Sockets is
*** 124,137 ****
     Socket_Error_Id : constant Exception_Id := Socket_Error'Identity;
     Host_Error_Id   : constant Exception_Id := Host_Error'Identity;
  
!    type In_Addr_Union (Family : Family_Type) is record
        case Family is
           when Family_Inet =>
              In4 : In_Addr;
           when Family_Inet6 =>
              In6 : In6_Addr;
-          when Family_Unspec =>
-             null;
        end case;
     end record with Unchecked_Union;
  
--- 128,139 ----
     Socket_Error_Id : constant Exception_Id := Socket_Error'Identity;
     Host_Error_Id   : constant Exception_Id := Host_Error'Identity;
  
!    type In_Addr_Union (Family : Family_Inet_4_6) is record
        case Family is
           when Family_Inet =>
              In4 : In_Addr;
           when Family_Inet6 =>
              In6 : In6_Addr;
        end case;
     end record with Unchecked_Union;
  
*************** package body GNAT.Sockets is
*** 287,293 ****
     --  or the null selector.
  
     function Create_Address
!      (Family : Family_Type; Bytes : Inet_Addr_Bytes) return Inet_Addr_Type
       with Inline;
     --  Creates address from family and Inet_Addr_Bytes array.
  
--- 289,295 ----
     --  or the null selector.
  
     function Create_Address
!      (Family : Family_Inet_4_6; Bytes : Inet_Addr_Bytes) return Inet_Addr_Type
       with Inline;
     --  Creates address from family and Inet_Addr_Bytes array.
  
*************** package body GNAT.Sockets is
*** 350,356 ****
        end if;
  
        Socket := Socket_Type (Res);
!       Address := Get_Address (Sin);
     end Accept_Socket;
  
     -------------------
--- 352,358 ----
        end if;
  
        Socket := Socket_Type (Res);
!       Address := Get_Address (Sin, Len);
     end Accept_Socket;
  
     -------------------
*************** package body GNAT.Sockets is
*** 461,472 ****
     is
        Res : C.int;
        Sin : aliased Sockaddr;
  
     begin
!       Set_Address (Sin'Unchecked_Access, Address);
  
!       Res := C_Bind
!         (C.int (Socket), Sin'Address, C.int (Lengths (Address.Family)));
  
        if Res = Failure then
           Raise_Socket_Error (Socket_Errno);
--- 463,474 ----
     is
        Res : C.int;
        Sin : aliased Sockaddr;
+       Len : C.int;
  
     begin
!       Set_Address (Sin'Unchecked_Access, Address, Len);
  
!       Res := C_Bind (C.int (Socket), Sin'Address, Len);
  
        if Res = Failure then
           Raise_Socket_Error (Socket_Errno);
*************** package body GNAT.Sockets is
*** 666,676 ****
        Server : Sock_Addr_Type) return C.int
     is
        Sin : aliased Sockaddr;
     begin
!       Set_Address (Sin'Unchecked_Access, Server);
  
!       return C_Connect
!         (C.int (Socket), Sin'Address, C.int (Lengths (Server.Family)));
     end Connect_Socket;
  
     procedure Connect_Socket
--- 668,678 ----
        Server : Sock_Addr_Type) return C.int
     is
        Sin : aliased Sockaddr;
+       Len : C.int;
     begin
!       Set_Address (Sin'Unchecked_Access, Server, Len);
  
!       return C_Connect (C.int (Socket), Sin'Address, Len);
     end Connect_Socket;
  
     procedure Connect_Socket
*************** package body GNAT.Sockets is
*** 865,870 ****
--- 867,900 ----
        Socket := Socket_Type (Res);
     end Create_Socket;
  
+    ------------------------
+    -- Create_Socket_Pair --
+    ------------------------
+ 
+    procedure Create_Socket_Pair
+      (Left   : out Socket_Type;
+       Right  : out Socket_Type;
+       Family : Family_Type := Family_Unspec;
+       Mode   : Mode_Type   := Socket_Stream;
+       Level  : Level_Type  := IP_Protocol_For_IP_Level)
+    is
+       Res  : C.int;
+       Pair : aliased Thin_Common.Fd_Pair;
+ 
+    begin
+       Res := C_Socketpair
+         ((if Family = Family_Unspec then Default_Socket_Pair_Family
+           else Families (Family)),
+          Modes (Mode), Levels (Level), Pair'Access);
+ 
+       if Res = Failure then
+          Raise_Socket_Error (Socket_Errno);
+       end if;
+ 
+       Left  := Socket_Type (Pair (Pair'First));
+       Right := Socket_Type (Pair (Pair'Last));
+    end Create_Socket_Pair;
+ 
     -----------
     -- Empty --
     -----------
*************** package body GNAT.Sockets is
*** 1035,1044 ****
           for J in Result'Range loop
              Look_For_Supported : loop
                 if Iter = null then
                    return Result (1 .. J - 1);
                 end if;
  
!                Result (J).Addr := Get_Address (Iter.ai_addr.all);
  
                 if Result (J).Addr.Family = Family_Unspec then
                    Unsupported;
--- 1065,1081 ----
           for J in Result'Range loop
              Look_For_Supported : loop
                 if Iter = null then
+                   pragma Warnings
+                     (Off, "may be referenced before it has a value");
+ 
                    return Result (1 .. J - 1);
+ 
+                   pragma Warnings
+                     (On, "may be referenced before it has a value");
                 end if;
  
!                Result (J).Addr :=
!                  Get_Address (Iter.ai_addr.all, C.int (Iter.ai_addrlen));
  
                 if Result (J).Addr.Family = Family_Unspec then
                    Unsupported;
*************** package body GNAT.Sockets is
*** 1067,1076 ****
                 end if;
  
                 Iter := Iter.ai_next;
- 
-                if Iter = null then
-                   return Result (1 .. J - 1);
-                end if;
              end loop Look_For_Supported;
  
              Iter := Iter.ai_next;
--- 1104,1109 ----
*************** package body GNAT.Sockets is
*** 1145,1159 ****
        Numeric_Host : Boolean := False;
        Numeric_Serv : Boolean := False) return Host_Service
     is
!       SA : aliased Sockaddr;
!       H  : aliased C.char_array := (1 .. SOSC.NI_MAXHOST => C.nul);
!       S  : aliased C.char_array := (1 .. SOSC.NI_MAXSERV => C.nul);
!       RC : C.int;
     begin
!       Set_Address (SA'Unchecked_Access, Addr);
  
        RC := C_Getnameinfo
!         (SA'Unchecked_Access, socklen_t (Lengths (Addr.Family)),
           H'Unchecked_Access, H'Length,
           S'Unchecked_Access, S'Length,
           (if Numeric_Host then SOSC.NI_NUMERICHOST else 0) +
--- 1178,1193 ----
        Numeric_Host : Boolean := False;
        Numeric_Serv : Boolean := False) return Host_Service
     is
!       SA  : aliased Sockaddr;
!       H   : aliased C.char_array := (1 .. SOSC.NI_MAXHOST => C.nul);
!       S   : aliased C.char_array := (1 .. SOSC.NI_MAXSERV => C.nul);
!       RC  : C.int;
!       Len : C.int;
     begin
!       Set_Address (SA'Unchecked_Access, Addr, Len);
  
        RC := C_Getnameinfo
!         (SA'Unchecked_Access, socklen_t (Len),
           H'Unchecked_Access, H'Length,
           S'Unchecked_Access, S'Length,
           (if Numeric_Host then SOSC.NI_NUMERICHOST else 0) +
*************** package body GNAT.Sockets is
*** 1193,1201 ****
              HA.In4 := To_In_Addr (Address);
           when Family_Inet6 =>
              HA.In6 := To_In6_Addr (Address);
-          when Family_Unspec =>
-             return (0, 0, (1, " "), (1 .. 0 => (1, " ")),
-                     (1 .. 0 => No_Inet_Addr));
        end case;
  
        Netdb_Lock;
--- 1227,1232 ----
*************** package body GNAT.Sockets is
*** 1204,1211 ****
          (HA'Address,
           (case Address.Family is
               when Family_Inet => HA.In4'Size,
!              when Family_Inet6 => HA.In6'Size,
!              when Family_Unspec => 0) / 8,
           Families (Address.Family),
           Res'Access, Buf'Address, Buflen, Err'Access) /= 0
        then
--- 1235,1241 ----
          (HA'Address,
           (case Address.Family is
               when Family_Inet => HA.In4'Size,
!              when Family_Inet6 => HA.In6'Size) / 8,
           Families (Address.Family),
           Res'Access, Buf'Address, Buflen, Err'Access) /= 0
        then
*************** package body GNAT.Sockets is
*** 1276,1282 ****
           Raise_Socket_Error (Socket_Errno);
        end if;
  
!       return Get_Address (Sin);
     end Get_Peer_Name;
  
     -------------------------
--- 1306,1312 ----
           Raise_Socket_Error (Socket_Errno);
        end if;
  
!       return Get_Address (Sin, Len);
     end Get_Peer_Name;
  
     -------------------------
*************** package body GNAT.Sockets is
*** 1360,1366 ****
           return No_Sock_Addr;
        end if;
  
!       return Get_Address (Sin);
     end Get_Socket_Name;
  
     -----------------------
--- 1390,1396 ----
           return No_Sock_Addr;
        end if;
  
!       return Get_Address (Sin, Len);
     end Get_Socket_Name;
  
     -----------------------
*************** package body GNAT.Sockets is
*** 1369,1375 ****
  
     function Get_Socket_Option
       (Socket  : Socket_Type;
!       Level   : Level_Type := Socket_Level;
        Name    : Option_Name;
        Optname : Interfaces.C.int := -1) return Option_Type
     is
--- 1399,1405 ----
  
     function Get_Socket_Option
       (Socket  : Socket_Type;
!       Level   : Level_Type;
        Name    : Option_Name;
        Optname : Interfaces.C.int := -1) return Option_Type
     is
*************** package body GNAT.Sockets is
*** 1568,1576 ****
        Size : constant socklen_t :=
          (case Value.Family is
              when Family_Inet   => 4 * Value.Sin_V4'Length,
!             when Family_Inet6  => 6 * 5 + 4 * 4,
              --  1234:1234:1234:1234:1234:1234:123.123.123.123
-             when Family_Unspec => 0);
        Dst : aliased C.char_array := (1 .. C.size_t (Size) => C.nul);
        Ia  : aliased In_Addr_Union (Value.Family);
     begin
--- 1598,1605 ----
        Size : constant socklen_t :=
          (case Value.Family is
              when Family_Inet   => 4 * Value.Sin_V4'Length,
!             when Family_Inet6  => 6 * 5 + 4 * 4);
              --  1234:1234:1234:1234:1234:1234:123.123.123.123
        Dst : aliased C.char_array := (1 .. C.size_t (Size) => C.nul);
        Ia  : aliased In_Addr_Union (Value.Family);
     begin
*************** package body GNAT.Sockets is
*** 1579,1586 ****
              Ia.In6 := To_In6_Addr (Value);
           when Family_Inet =>
              Ia.In4 := To_In_Addr (Value);
-          when Family_Unspec =>
-             return "";
        end case;
  
        if Inet_Ntop
--- 1608,1613 ----
*************** package body GNAT.Sockets is
*** 1598,1608 ****
     -----------
  
     function Image (Value : Sock_Addr_Type) return String is
-       Port : constant String := Value.Port'Img;
        function Ipv6_Brackets (S : String) return String is
          (if Value.Family = Family_Inet6 then "[" & S & "]" else S);
     begin
!       return Ipv6_Brackets (Image (Value.Addr)) & ':' & Port (2 .. Port'Last);
     end Image;
  
     -----------
--- 1625,1654 ----
     -----------
  
     function Image (Value : Sock_Addr_Type) return String is
        function Ipv6_Brackets (S : String) return String is
          (if Value.Family = Family_Inet6 then "[" & S & "]" else S);
     begin
!       case Value.Family is
!          when Family_Unix =>
!             if ASU.Length (Value.Name) > 0
!               and then ASU.Element (Value.Name, 1) = ASCII.NUL
!             then
!                return '@' & ASU.Slice (Value.Name, 2, ASU.Length (Value.Name));
!             else
!                return ASU.To_String (Value.Name);
!             end if;
! 
!          when Family_Inet_4_6 =>
!             declare
!                Port : constant String := Value.Port'Img;
!             begin
!                return Ipv6_Brackets (Image (Value.Addr)) & ':'
!                  & Port (2 .. Port'Last);
!             end;
! 
!          when Family_Unspec =>
!             return "";
!       end case;
     end Image;
  
     -----------
*************** package body GNAT.Sockets is
*** 1793,1799 ****
           end if;
        end loop;
  
!       return Colons <= 8;
     end Is_IPv6_Address;
  
     ---------------------
--- 1839,1845 ----
           end if;
        end loop;
  
!       return Colons in 2 .. 8;
     end Is_IPv6_Address;
  
     ---------------------
*************** package body GNAT.Sockets is
*** 1920,1925 ****
--- 1966,1984 ----
        end if;
     end Netdb_Unlock;
  
+    ----------------------------
+    -- Network_Socket_Address --
+    ----------------------------
+ 
+    function Network_Socket_Address
+      (Addr : Inet_Addr_Type; Port : Port_Type) return Sock_Addr_Type is
+    begin
+       return Result : Sock_Addr_Type (Addr.Family) do
+          Result.Addr := Addr;
+          Result.Port := Port;
+       end return;
+    end Network_Socket_Address;
+ 
     --------------------------------
     -- Normalize_Empty_Socket_Set --
     --------------------------------
*************** package body GNAT.Sockets is
*** 2135,2141 ****
  
        Last := Last_Index (First => Item'First, Count => size_t (Res));
  
!       From := Get_Address (Sin);
     end Receive_Socket;
  
     --------------------
--- 2194,2200 ----
  
        Last := Last_Index (First => Item'First, Count => size_t (Res));
  
!       From := Get_Address (Sin, Len);
     end Receive_Socket;
  
     --------------------
*************** package body GNAT.Sockets is
*** 2400,2408 ****
  
     begin
        if To /= null then
!          Set_Address (Sin'Unchecked_Access, To.all);
           C_To := Sin'Address;
-          Len := C.int (Thin_Common.Lengths (To.Family));
  
        else
           C_To := System.Null_Address;
--- 2459,2466 ----
  
     begin
        if To /= null then
!          Set_Address (Sin'Unchecked_Access, To.all, Len);
           C_To := Sin'Address;
  
        else
           C_To := System.Null_Address;
*************** package body GNAT.Sockets is
*** 2539,2545 ****
  
     procedure Set_Socket_Option
       (Socket : Socket_Type;
!       Level  : Level_Type := Socket_Level;
        Option : Option_Type)
     is
        use type C.unsigned;
--- 2597,2603 ----
  
     procedure Set_Socket_Option
       (Socket : Socket_Type;
!       Level  : Level_Type;
        Option : Option_Type)
     is
        use type C.unsigned;
*************** package body GNAT.Sockets is
*** 2643,2663 ****
           =>
              if Is_Windows then
  
!                --  On Windows, the timeout is a DWORD in milliseconds, and
!                --  the actual timeout is 500 ms + the given value (unless it
!                --  is 0).
  
!                U4 := C.unsigned (Option.Timeout / 0.001);
  
!                if U4 > 500 then
!                   U4 := U4 - 500;
  
!                elsif U4 > 0 then
                    U4 := 1;
                 end if;
  
!                Len := U4'Size / 8;
!                Add := U4'Address;
  
              else
                 VT  := To_Timeval (Option.Timeout);
--- 2701,2729 ----
           =>
              if Is_Windows then
  
!                --  On Windows, the timeout is a DWORD in milliseconds
  
!                Len := U4'Size / 8;
!                Add := U4'Address;
  
!                U4 := C.unsigned (Option.Timeout / 0.001);
  
!                if Option.Timeout > 0.0 and then U4 = 0 then
!                   --  Avoid round to zero. Zero timeout mean unlimited.
                    U4 := 1;
                 end if;
  
!                --  Old windows versions actual timeout is 500 ms + the given
!                --  value (unless it is 0).
! 
!                if Minus_500ms_Windows_Timeout /= 0 then
!                   if U4 > 500 then
!                      U4 := U4 - 500;
! 
!                   elsif U4 > 0 then
!                      U4 := 1;
!                   end if;
!                end if;
  
              else
                 VT  := To_Timeval (Option.Timeout);
*************** package body GNAT.Sockets is
*** 3043,3054 ****
     --------------------
  
     function Create_Address
!      (Family : Family_Type; Bytes : Inet_Addr_Bytes) return Inet_Addr_Type
     is
       (case Family is
           when Family_Inet => (Family_Inet, Bytes),
!          when Family_Inet6 => (Family_Inet6, Bytes),
!          when Family_Unspec => (Family => Family_Unspec));
  
     ---------------
     -- Get_Bytes --
--- 3109,3119 ----
     --------------------
  
     function Create_Address
!      (Family : Family_Inet_4_6; Bytes : Inet_Addr_Bytes) return Inet_Addr_Type
     is
       (case Family is
           when Family_Inet => (Family_Inet, Bytes),
!          when Family_Inet6 => (Family_Inet6, Bytes));
  
     ---------------
     -- Get_Bytes --
*************** package body GNAT.Sockets is
*** 3057,3071 ****
     function Get_Bytes (Addr : Inet_Addr_Type) return Inet_Addr_Bytes is
       (case Addr.Family is
           when Family_Inet => Addr.Sin_V4,
!          when Family_Inet6 => Addr.Sin_V6,
!          when Family_Unspec => (1 .. 0 => 0));
  
     ----------
     -- Mask --
     ----------
  
     function Mask
!      (Family : Family_Type;
        Length : Natural;
        Host   : Boolean := False) return Inet_Addr_Type
     is
--- 3122,3135 ----
     function Get_Bytes (Addr : Inet_Addr_Type) return Inet_Addr_Bytes is
       (case Addr.Family is
           when Family_Inet => Addr.Sin_V4,
!          when Family_Inet6 => Addr.Sin_V6);
  
     ----------
     -- Mask --
     ----------
  
     function Mask
!      (Family : Family_Inet_4_6;
        Length : Natural;
        Host   : Boolean := False) return Inet_Addr_Type
     is
*************** package body GNAT.Sockets is
*** 3097,3102 ****
--- 3161,3175 ----
        end;
     end Mask;
  
+    -------------------------
+    -- Unix_Socket_Address --
+    -------------------------
+ 
+    function Unix_Socket_Address (Addr : String) return Sock_Addr_Type is
+    begin
+       return Sock_Addr_Type'(Family_Unix, ASU.To_Unbounded_String (Addr));
+    end Unix_Socket_Address;
+ 
     -----------
     -- "and" --
     -----------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-socket.ads gcc-10.1.0/gcc/ada/libgnat/g-socket.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-socket.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-socket.ads	Thu May  7 10:49:59 2020
***************
*** 45,50 ****
--- 45,51 ----
  
  with Ada.Exceptions;
  with Ada.Streams;
+ with Ada.Strings.Unbounded;
  with Ada.Unchecked_Deallocation;
  
  with Interfaces.C;
*************** package GNAT.Sockets is
*** 469,490 ****
     --  Return a file descriptor to be used by external subprograms. This is
     --  useful for C functions that are not yet interfaced in this package.
  
!    type Family_Type is (Family_Inet, Family_Inet6, Family_Unspec);
     --  Address family (or protocol family) identifies the communication domain
     --  and groups protocols with similar address formats.
     --  The order of the enumeration elements should not be changed unilaterally
     --  because the IPv6_TCP_Preferred routine rely on it.
  
!    type Mode_Type is (Socket_Stream, Socket_Datagram);
     --  Stream sockets provide connection-oriented byte streams. Datagram
!    --  sockets support unreliable connectionless message based communication.
     --  The order of the enumeration elements should not be changed unilaterally
!    --  because the IPv6_TCP_Preferred routine rely on it.
  
     type Shutmode_Type is (Shut_Read, Shut_Write, Shut_Read_Write);
     --  When a process closes a socket, the policy is to retain any data queued
     --  until either a delivery or a timeout expiration (in this case, the data
!    --  are discarded). A finer control is available through shutdown. With
     --  Shut_Read, no more data can be received from the socket. With_Write, no
     --  more data can be transmitted. Neither transmission nor reception can be
     --  performed with Shut_Read_Write.
--- 470,494 ----
     --  Return a file descriptor to be used by external subprograms. This is
     --  useful for C functions that are not yet interfaced in this package.
  
!    type Family_Type is (Family_Inet, Family_Inet6, Family_Unix, Family_Unspec);
     --  Address family (or protocol family) identifies the communication domain
     --  and groups protocols with similar address formats.
     --  The order of the enumeration elements should not be changed unilaterally
     --  because the IPv6_TCP_Preferred routine rely on it.
  
!    subtype Family_Inet_4_6 is Family_Type range Family_Inet .. Family_Inet6;
! 
!    type Mode_Type is (Socket_Stream, Socket_Datagram, Socket_Raw);
     --  Stream sockets provide connection-oriented byte streams. Datagram
!    --  sockets support unreliable connectionless message-based communication.
!    --  Raw sockets provide raw network-protocol access.
     --  The order of the enumeration elements should not be changed unilaterally
!    --  because the IPv6_TCP_Preferred routine relies on it.
  
     type Shutmode_Type is (Shut_Read, Shut_Write, Shut_Read_Write);
     --  When a process closes a socket, the policy is to retain any data queued
     --  until either a delivery or a timeout expiration (in this case, the data
!    --  are discarded). Finer control is available through shutdown. With
     --  Shut_Read, no more data can be received from the socket. With_Write, no
     --  more data can be transmitted. Neither transmission nor reception can be
     --  performed with Shut_Read_Write.
*************** package GNAT.Sockets is
*** 501,508 ****
     type Inet_Addr_Comp_Type is mod 2 ** 8;
     --  Octet for Internet address
  
!    Inet_Addr_Bytes_Length : constant array (Family_Type) of Natural :=
!      (Family_Inet => 4, Family_Inet6 => 16, Family_Unspec => 0);
  
     type Inet_Addr_Bytes is array (Natural range <>) of Inet_Addr_Comp_Type;
  
--- 505,512 ----
     type Inet_Addr_Comp_Type is mod 2 ** 8;
     --  Octet for Internet address
  
!    Inet_Addr_Bytes_Length : constant array (Family_Inet_4_6) of Natural :=
!      (Family_Inet => 4, Family_Inet6 => 16);
  
     type Inet_Addr_Bytes is array (Natural range <>) of Inet_Addr_Comp_Type;
  
*************** package GNAT.Sockets is
*** 514,520 ****
     subtype Inet_Addr_VN_Type is Inet_Addr_Bytes;
     --  For backwards compatibility
  
!    type Inet_Addr_Type (Family : Family_Type := Family_Inet) is record
        case Family is
           when Family_Inet =>
              Sin_V4 : Inet_Addr_V4_Type := (others => 0);
--- 518,524 ----
     subtype Inet_Addr_VN_Type is Inet_Addr_Bytes;
     --  For backwards compatibility
  
!    type Inet_Addr_Type (Family : Family_Inet_4_6 := Family_Inet) is record
        case Family is
           when Family_Inet =>
              Sin_V4 : Inet_Addr_V4_Type := (others => 0);
*************** package GNAT.Sockets is
*** 522,530 ****
           when Family_Inet6 =>
              Sin_V6 : Inet_Addr_V6_Type := (others => 0);
  
-          when Family_Unspec =>
-             null;
- 
        end case;
     end record;
  
--- 526,531 ----
*************** package GNAT.Sockets is
*** 540,549 ****
     No_Inet_Addr        : constant Inet_Addr_Type;
     --  Uninitialized inet address
  
-    Unspecified_Addr    : constant Inet_Addr_Type;
-    --  Unspecified address. Unlike of No_Inet_Addr the constraint is
-    --  Family_Unspec for this constant.
- 
     Broadcast_Inet_Addr : constant Inet_Addr_Type;
     --  Broadcast destination address in the current network
  
--- 541,546 ----
*************** package GNAT.Sockets is
*** 580,586 ****
     --  Functions to handle masks and prefixes
  
     function Mask
!      (Family : Family_Type;
        Length : Natural;
        Host   : Boolean := False) return Inet_Addr_Type;
     --  Return an address mask of the given family with the given prefix length.
--- 577,583 ----
     --  Functions to handle masks and prefixes
  
     function Mask
!      (Family : Family_Inet_4_6;
        Length : Natural;
        Host   : Boolean := False) return Inet_Addr_Type;
     --  Return an address mask of the given family with the given prefix length.
*************** package GNAT.Sockets is
*** 595,602 ****
     --  same address family).
  
     type Sock_Addr_Type (Family : Family_Type := Family_Inet) is record
!       Addr : Inet_Addr_Type (Family);
!       Port : Port_Type;
     end record;
     pragma No_Component_Reordering (Sock_Addr_Type);
     --  Socket addresses fully define a socket connection with protocol family,
--- 592,606 ----
     --  same address family).
  
     type Sock_Addr_Type (Family : Family_Type := Family_Inet) is record
!       case Family is
!          when Family_Unix =>
!             Name : Ada.Strings.Unbounded.Unbounded_String;
!          when Family_Inet_4_6 =>
!             Addr : Inet_Addr_Type (Family);
!             Port : Port_Type;
!          when Family_Unspec =>
!             null;
!       end case;
     end record;
     pragma No_Component_Reordering (Sock_Addr_Type);
     --  Socket addresses fully define a socket connection with protocol family,
*************** package GNAT.Sockets is
*** 618,629 ****
     --  8 hextets in hexadecimal format separated by colons.
  
     function Image (Value : Sock_Addr_Type) return String;
!    --  Return inet address image and port image separated by a colon
  
     function Inet_Addr (Image : String) return Inet_Addr_Type;
     --  Convert address image from numbers-dots-and-colons notation into an
     --  inet address.
  
     --  Host entries provide complete information on a given host: the official
     --  name, an array of alternative names or aliases and array of network
     --  addresses.
--- 622,641 ----
     --  8 hextets in hexadecimal format separated by colons.
  
     function Image (Value : Sock_Addr_Type) return String;
!    --  Return socket address image. Network socket address image will be with
!    --  a port image separated by a colon.
  
     function Inet_Addr (Image : String) return Inet_Addr_Type;
     --  Convert address image from numbers-dots-and-colons notation into an
     --  inet address.
  
+    function Unix_Socket_Address (Addr : String) return Sock_Addr_Type;
+    --  Convert unix local socket name to Sock_Addr_Type
+ 
+    function Network_Socket_Address
+      (Addr : Inet_Addr_Type; Port : Port_Type) return Sock_Addr_Type;
+    --  Create network socket address
+ 
     --  Host entries provide complete information on a given host: the official
     --  name, an array of alternative names or aliases and array of network
     --  addresses.
*************** package GNAT.Sockets is
*** 772,808 ****
        IP_Protocol_For_IP_Level,
        IP_Protocol_For_IPv6_Level,
        IP_Protocol_For_UDP_Level,
!       IP_Protocol_For_TCP_Level);
  
     --  There are several options available to manipulate sockets. Each option
!    --  has a name and several values available. Most of the time, the value is
!    --  a boolean to enable or disable this option.
  
     type Option_Name is
       (Generic_Option,
!       Keep_Alive,          -- Enable sending of keep-alive messages
!       Reuse_Address,       -- Allow bind to reuse local address
!       Broadcast,           -- Enable datagram sockets to recv/send broadcasts
!       Send_Buffer,         -- Set/get the maximum socket send buffer in bytes
!       Receive_Buffer,      -- Set/get the maximum socket recv buffer in bytes
!       Linger,              -- Shutdown wait for msg to be sent or timeout occur
!       Error,               -- Get and clear the pending socket error
!       No_Delay,            -- Do not delay send to coalesce data (TCP_NODELAY)
!       Add_Membership_V4,   -- Join a multicast group
!       Add_Membership_V6,   -- Idem for IPv6 socket
!       Drop_Membership_V4,  -- Leave a multicast group
!       Drop_Membership_V6,  -- Idem for IPv6 socket
!       Multicast_If_V4,     -- Set default out interface for multicast packets
!       Multicast_If_V6,     -- Idem for IPv6 socket
!       Multicast_Loop_V4,   -- Sent multicast packets are looped to local socket
!       Multicast_Loop_V6,   -- Idem for IPv6 socket
!       Multicast_TTL,       -- Set the time-to-live of sent multicast packets
!       Multicast_Hops,      -- Set the multicast hop limit for the IPv6 socket
!       Receive_Packet_Info, -- Receive low level packet info as ancillary data
!       Send_Timeout,        -- Set timeout value for output
!       Receive_Timeout,     -- Set timeout value for input
!       IPv6_Only,           -- Restricted to IPv6 communications only
!       Busy_Polling);       -- Set busy polling mode
     subtype Specific_Option_Name is
       Option_Name range Keep_Alive .. Option_Name'Last;
  
--- 784,902 ----
        IP_Protocol_For_IP_Level,
        IP_Protocol_For_IPv6_Level,
        IP_Protocol_For_UDP_Level,
!       IP_Protocol_For_TCP_Level,
!       IP_Protocol_For_ICMP_Level,
!       IP_Protocol_For_IGMP_Level,
!       IP_Protocol_For_RAW_Level);
  
     --  There are several options available to manipulate sockets. Each option
!    --  has a name and several values available. Most of the time, the value
!    --  is a boolean to enable or disable this option. Each socket option is
!    --  provided with an appropriate C name taken from the sockets API comments.
!    --  The C name can be used to find a detailed description in the OS-specific
!    --  documentation. The options are grouped by main Level_Type value, which
!    --  can be used together with this option in calls to the Set_Socket_Option
!    --  and Get_Socket_Option routines. Note that some options can be used with
!    --  more than one level.
  
     type Option_Name is
       (Generic_Option,
!       --  Can be used to set/get any socket option via an OS-specific option
!       --  code with an integer value.
! 
!       ------------------
!       -- Socket_Level --
!       ------------------
! 
!       Keep_Alive,      -- SO_KEEPALIVE
!       --  Enable sending of keep-alive messages on connection-oriented sockets
! 
!       Reuse_Address,   -- SO_REUSEADDR
!       --  Enable binding to an address and port already in use
! 
!       Broadcast,       -- SO_BROADCAST
!       --  Enable sending broadcast datagrams on the socket
! 
!       Send_Buffer,     -- SO_SNDBUF
!       --  Set/get the maximum socket send buffer in bytes
! 
!       Receive_Buffer,  -- SO_RCVBUF
!       --  Set/get the maximum socket receive buffer in bytes
! 
!       Linger,          -- SO_LINGER
!       --  When enabled, a Close_Socket or Shutdown_Socket will wait until all
!       --  queued messages for the socket have been successfully sent or the
!       --  linger timeout has been reached.
! 
!       Error,           -- SO_ERROR
!       --  Get and clear the pending socket error integer code
! 
!       Send_Timeout,    -- SO_SNDTIMEO
!       --  Specify sending timeout until reporting an error
! 
!       Receive_Timeout, -- SO_RCVTIMEO
!       --  Specify receiving timeout until reporting an error
! 
!       Busy_Polling,    -- SO_BUSY_POLL
!       --  Sets the approximate time in microseconds to busy poll on a blocking
!       --  receive when there is no data.
! 
!       -------------------------------
!       -- IP_Protocol_For_TCP_Level --
!       -------------------------------
! 
!       No_Delay, -- TCP_NODELAY
!       --  Disable the Nagle algorithm. This means that output buffer content
!       --  is always sent as soon as possible, even if there is only a small
!       --  amount of data.
! 
!       ------------------------------
!       -- IP_Protocol_For_IP_Level --
!       ------------------------------
! 
!       Add_Membership_V4,   -- IP_ADD_MEMBERSHIP
!       --  Join a multicast group
! 
!       Drop_Membership_V4,  -- IP_DROP_MEMBERSHIP
!       --  Leave a multicast group
! 
!       Multicast_If_V4,     -- IP_MULTICAST_IF
!       --  Set/Get outgoing interface for sending multicast packets
! 
!       Multicast_Loop_V4,   -- IP_MULTICAST_LOOP
!       --  This boolean option determines whether sent multicast packets should
!       --  be looped back to the local sockets.
! 
!       Multicast_TTL,       -- IP_MULTICAST_TTL
!       --  Set/Get the time-to-live of sent multicast packets
! 
!       Receive_Packet_Info, -- IP_PKTINFO
!       --  Receive low-level packet info as ancillary data
! 
!       --------------------------------
!       -- IP_Protocol_For_IPv6_Level --
!       --------------------------------
! 
!       Add_Membership_V6,   -- IPV6_ADD_MEMBERSHIP
!       --  Join IPv6 multicast group
! 
!       Drop_Membership_V6,  -- IPV6_DROP_MEMBERSHIP
!       --  Leave IPv6 multicast group
! 
!       Multicast_If_V6,     -- IPV6_MULTICAST_IF
!       --  Set/Get outgoing interface index for sending multicast packets
! 
!       Multicast_Loop_V6,   -- IPV6_MULTICAST_LOOP
!       --  This boolean option determines whether sent multicast IPv6 packets
!       --  should be looped back to the local sockets.
! 
!       IPv6_Only,           -- IPV6_V6ONLY
!       --  Restricted to IPv6 communications only
! 
!       Multicast_Hops       -- IPV6_MULTICAST_HOPS
!       --  Set the multicast hop limit for the IPv6 socket
!      );
! 
     subtype Specific_Option_Name is
       Option_Name range Keep_Alive .. Option_Name'Last;
  
*************** package GNAT.Sockets is
*** 1010,1016 ****
        Family : Family_Type := Family_Inet;
        Mode   : Mode_Type   := Socket_Stream;
        Level  : Level_Type  := IP_Protocol_For_IP_Level);
!    --  Create an endpoint for communication. Raises Socket_Error on error
  
     procedure Accept_Socket
       (Server  : Socket_Type;
--- 1104,1120 ----
        Family : Family_Type := Family_Inet;
        Mode   : Mode_Type   := Socket_Stream;
        Level  : Level_Type  := IP_Protocol_For_IP_Level);
!    --  Create an endpoint for communication. Raises Socket_Error on error.
! 
!    procedure Create_Socket_Pair
!      (Left   : out Socket_Type;
!       Right  : out Socket_Type;
!       Family : Family_Type := Family_Unspec;
!       Mode   : Mode_Type   := Socket_Stream;
!       Level  : Level_Type  := IP_Protocol_For_IP_Level);
!    --  Create two connected sockets. Raises Socket_Error on error.
!    --  If Family is unspecified, it creates Family_Unix sockets on UNIX and
!    --  Family_Inet sockets on non UNIX platforms.
  
     procedure Accept_Socket
       (Server  : Socket_Type;
*************** package GNAT.Sockets is
*** 1084,1090 ****
  
     function Get_Socket_Option
       (Socket  : Socket_Type;
!       Level   : Level_Type := Socket_Level;
        Name    : Option_Name;
        Optname : Interfaces.C.int := -1) return Option_Type;
     --  Get the options associated with a socket. Raises Socket_Error on error.
--- 1188,1194 ----
  
     function Get_Socket_Option
       (Socket  : Socket_Type;
!       Level   : Level_Type;
        Name    : Option_Name;
        Optname : Interfaces.C.int := -1) return Option_Type;
     --  Get the options associated with a socket. Raises Socket_Error on error.
*************** package GNAT.Sockets is
*** 1199,1205 ****
  
     procedure Set_Socket_Option
       (Socket : Socket_Type;
!       Level  : Level_Type := Socket_Level;
        Option : Option_Type);
     --  Manipulate socket options. Raises Socket_Error on error
  
--- 1303,1309 ----
  
     procedure Set_Socket_Option
       (Socket : Socket_Type;
!       Level  : Level_Type;
        Option : Option_Type);
     --  Manipulate socket options. Raises Socket_Error on error
  
*************** package GNAT.Sockets is
*** 1356,1361 ****
--- 1460,1467 ----
  
  private
  
+    package ASU renames Ada.Strings.Unbounded;
+ 
     type Socket_Type is new Integer;
     No_Socket : constant Socket_Type := -1;
  
*************** private
*** 1410,1417 ****
                             (Family_Inet6, (others => 0));
     No_Inet_Addr        : constant Inet_Addr_Type :=
                             (Family_Inet, (others => 0));
-    Unspecified_Addr    : constant Inet_Addr_Type :=
-                            (Family => Family_Unspec);
     Broadcast_Inet_Addr : constant Inet_Addr_Type :=
                             (Family_Inet, (others => 255));
     Loopback_Inet_Addr  : constant Inet_Addr_Type :=
--- 1516,1521 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-socthi.ads gcc-10.1.0/gcc/ada/libgnat/g-socthi.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-socthi.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-socthi.ads	Thu May  7 10:49:59 2020
*************** package GNAT.Sockets.Thin is
*** 184,189 ****
--- 184,199 ----
     function C_System
       (Command : System.Address) return C.int;
  
+    Default_Socket_Pair_Family : constant := SOSC.AF_UNIX;
+    --  UNIX has socketpair system call and AF_UNIX family is widely supported
+ 
+    function C_Socketpair
+      (Domain   : C.int;
+       Typ      : C.int;
+       Protocol : C.int;
+       Fds      : not null access Fd_Pair) return C.int;
+    --  Creates pair of connected sockets
+ 
     -------------------------------------------------------
     -- Signalling file descriptors for selector abortion --
     -------------------------------------------------------
*************** private
*** 249,254 ****
--- 259,265 ----
     pragma Import (C, C_Select, "select");
     pragma Import (C, C_Setsockopt, "setsockopt");
     pragma Import (C, C_Shutdown, "shutdown");
+    pragma Import (C, C_Socketpair, "socketpair");
     pragma Import (C, C_System, "system");
  
     pragma Import (C, Nonreentrant_Gethostbyname, "gethostbyname");
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-socthi__mingw.adb gcc-10.1.0/gcc/ada/libgnat/g-socthi__mingw.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-socthi__mingw.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-socthi__mingw.adb	Thu May  7 10:49:59 2020
*************** package body GNAT.Sockets.Thin is
*** 511,516 ****
--- 511,526 ----
        return System.CRTL.ssize_t (Count);
     end C_Sendmsg;
  
+    ------------------
+    -- C_Socketpair --
+    ------------------
+ 
+    function C_Socketpair
+      (Domain   : C.int;
+       Typ      : C.int;
+       Protocol : C.int;
+       Fds      : not null access Fd_Pair) return C.int is separate;
+ 
     --------------
     -- Finalize --
     --------------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-socthi__mingw.ads gcc-10.1.0/gcc/ada/libgnat/g-socthi__mingw.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-socthi__mingw.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-socthi__mingw.ads	Thu May  7 10:49:59 2020
*************** package GNAT.Sockets.Thin is
*** 177,182 ****
--- 177,193 ----
        Typ      : C.int;
        Protocol : C.int) return C.int;
  
+    Default_Socket_Pair_Family : constant := SOSC.AF_INET;
+    --  Windows has not socketpair system call, and C_Socketpair below is
+    --  implemented on loopback connected network sockets.
+ 
+    function C_Socketpair
+      (Domain   : C.int;
+       Typ      : C.int;
+       Protocol : C.int;
+       Fds      : not null access Fd_Pair) return C.int;
+    --  Creates pair of connected sockets
+ 
     function C_System
       (Command : System.Address) return C.int;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-socthi__vxworks.adb gcc-10.1.0/gcc/ada/libgnat/g-socthi__vxworks.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-socthi__vxworks.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-socthi__vxworks.adb	Thu May  7 10:49:59 2020
*************** package body GNAT.Sockets.Thin is
*** 419,424 ****
--- 419,434 ----
        return R;
     end C_Socket;
  
+    ------------------
+    -- C_Socketpair --
+    ------------------
+ 
+    function C_Socketpair
+      (Domain   : C.int;
+       Typ      : C.int;
+       Protocol : C.int;
+       Fds      : not null access Fd_Pair) return C.int is separate;
+ 
     --------------
     -- Finalize --
     --------------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-socthi__vxworks.ads gcc-10.1.0/gcc/ada/libgnat/g-socthi__vxworks.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-socthi__vxworks.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-socthi__vxworks.ads	Thu May  7 10:49:59 2020
*************** package GNAT.Sockets.Thin is
*** 178,183 ****
--- 178,194 ----
        Typ      : C.int;
        Protocol : C.int) return C.int;
  
+    Default_Socket_Pair_Family : constant := SOSC.AF_INET;
+    --  VxWorks has not socketpair system call, and C_Socketpair below is
+    --  implemented on loopback connected network sockets.
+ 
+    function C_Socketpair
+      (Domain   : C.int;
+       Typ      : C.int;
+       Protocol : C.int;
+       Fds      : not null access Fd_Pair) return C.int;
+    --  Creates pair of connected sockets
+ 
     function C_System
       (Command : System.Address) return C.int;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-sothco.adb gcc-10.1.0/gcc/ada/libgnat/g-sothco.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-sothco.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-sothco.adb	Thu May  7 10:49:59 2020
*************** package body GNAT.Sockets.Thin_Common is
*** 37,54 ****
  
     procedure Set_Address
       (Sin     : Sockaddr_Access;
!       Address : Sock_Addr_Type)
     is
     begin
        Set_Family (Sin.Sin_Family, Address.Family);
!       Sin.Sin_Port := Short_To_Network (C.unsigned_short (Address.Port));
  
        case Address.Family is
           when Family_Inet =>
              Sin.Sin_Addr := To_In_Addr (Address.Addr);
           when Family_Inet6 =>
              Sin.Sin6_Addr := To_In6_Addr (Address.Addr);
              Sin.Sin6_Scope_Id := 0;
           when Family_Unspec =>
              null;
        end case;
--- 37,95 ----
  
     procedure Set_Address
       (Sin     : Sockaddr_Access;
!       Address : Sock_Addr_Type;
!       Length  : out C.int)
     is
+       use type C.char;
+ 
+       function Network_Port return C.unsigned_short is
+         (Short_To_Network (C.unsigned_short (Address.Port))) with Inline;
+ 
     begin
        Set_Family (Sin.Sin_Family, Address.Family);
! 
!       Length := C.int (Lengths (Address.Family));
  
        case Address.Family is
           when Family_Inet =>
+             Sin.Sin_Port := Network_Port;
              Sin.Sin_Addr := To_In_Addr (Address.Addr);
+ 
           when Family_Inet6 =>
+             Sin.Sin6_Port := Network_Port;
              Sin.Sin6_Addr := To_In6_Addr (Address.Addr);
              Sin.Sin6_Scope_Id := 0;
+ 
+          when Family_Unix =>
+             declare
+                use type C.size_t;
+                Name_Len : constant C.size_t :=
+                             C.size_t (ASU.Length (Address.Name));
+             begin
+                Length := Sockaddr_Length_And_Family'Size / System.Storage_Unit
+                          + C.int (Name_Len);
+ 
+                if Name_Len > Sin.Sun_Path'Length then
+                   raise Constraint_Error with
+                     "Too big address length for UNIX local communication";
+                end if;
+ 
+                if Name_Len = 0 then
+                   Sin.Sun_Path (1) := C.nul;
+ 
+                else
+                   Sin.Sun_Path (1 .. Name_Len) :=
+                     C.To_C (ASU.To_String (Address.Name), Append_Nul => False);
+ 
+                   if Sin.Sun_Path (1) /= C.nul
+                     and then Name_Len < Sin.Sun_Path'Length
+                   then
+                      Sin.Sun_Path (Name_Len + 1) := C.nul;
+                      Length := Length + 1;
+                   end if;
+                end if;
+             end;
+ 
           when Family_Unspec =>
              null;
        end case;
*************** package body GNAT.Sockets.Thin_Common is
*** 58,82 ****
     -- Get_Address --
     -----------------
  
!    function Get_Address (Sin : Sockaddr) return Sock_Addr_Type is
        Family : constant C.unsigned_short :=
          (if SOSC.Has_Sockaddr_Len = 0 then Sin.Sin_Family.Short_Family
           else C.unsigned_short (Sin.Sin_Family.Char_Family));
        Result : Sock_Addr_Type
!         (case Family is
!             when SOSC.AF_INET6 => Family_Inet6,
!             when SOSC.AF_INET  => Family_Inet,
!             when others        => Family_Unspec);
     begin
-       Result.Port := Port_Type (Network_To_Short (Sin.Sin_Port));
- 
        case Result.Family is
           when Family_Inet =>
              To_Inet_Addr (Sin.Sin_Addr, Result.Addr);
           when Family_Inet6 =>
              To_Inet_Addr (Sin.Sin6_Addr, Result.Addr);
           when Family_Unspec =>
!             Result.Addr := (Family => Family_Unspec);
        end case;
  
        return Result;
--- 99,137 ----
     -- Get_Address --
     -----------------
  
!    function Get_Address
!      (Sin : Sockaddr; Length : C.int) return Sock_Addr_Type
!    is
!       use type C.unsigned_short, C.size_t, C.char, SOSC.OS_Type;
        Family : constant C.unsigned_short :=
          (if SOSC.Has_Sockaddr_Len = 0 then Sin.Sin_Family.Short_Family
           else C.unsigned_short (Sin.Sin_Family.Char_Family));
        Result : Sock_Addr_Type
!         (if SOSC.AF_INET6 > 0 and then SOSC.AF_INET6 = Family then Family_Inet6
!          elsif SOSC.AF_UNIX > 0 and then SOSC.AF_UNIX = Family then Family_Unix
!          elsif SOSC.AF_INET = Family then Family_Inet
!          else Family_Unspec);
     begin
        case Result.Family is
           when Family_Inet =>
+             Result.Port := Port_Type (Network_To_Short (Sin.Sin_Port));
              To_Inet_Addr (Sin.Sin_Addr, Result.Addr);
           when Family_Inet6 =>
+             Result.Port := Port_Type (Network_To_Short (Sin.Sin6_Port));
              To_Inet_Addr (Sin.Sin6_Addr, Result.Addr);
+          when Family_Unix =>
+             if Length > Sin.Sin_Family'Size / System.Storage_Unit then
+                Result.Name := ASU.To_Unbounded_String
+                  (C.To_Ada
+                     (Sin.Sun_Path
+                          (1 .. C.size_t (Length)
+                           - Sin.Sin_Family'Size / System.Storage_Unit),
+                      Trim_Nul => Sin.Sun_Path (1) /= C.nul
+                                  or else SOSC.Target_OS = SOSC.Windows));
+             end if;
+ 
           when Family_Unspec =>
!             null;
        end case;
  
        return Result;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-sothco.ads gcc-10.1.0/gcc/ada/libgnat/g-sothco.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-sothco.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-sothco.ads	Thu May  7 10:49:59 2020
*************** package GNAT.Sockets.Thin_Common is
*** 75,85 ****
--- 75,87 ----
  
     Families : constant array (Family_Type) of C.int :=
                  (Family_Unspec => SOSC.AF_UNSPEC,
+                  Family_Unix   => SOSC.AF_UNIX,
                   Family_Inet   => SOSC.AF_INET,
                   Family_Inet6  => SOSC.AF_INET6);
  
     Lengths  : constant array (Family_Type) of C.unsigned_char :=
                  (Family_Unspec => 0,
+                  Family_Unix   => SOSC.SIZEOF_sockaddr_un,
                   Family_Inet   => SOSC.SIZEOF_sockaddr_in,
                   Family_Inet6  => SOSC.SIZEOF_sockaddr_in6);
  
*************** package GNAT.Sockets.Thin_Common is
*** 106,114 ****
           when False =>
              Short_Family : C.unsigned_short;
        end case;
!    end record;
!    pragma Unchecked_Union (Sockaddr_Length_And_Family);
!    pragma Convention (C, Sockaddr_Length_And_Family);
  
     procedure Set_Family
       (Length_And_Family : out Sockaddr_Length_And_Family;
--- 108,114 ----
           when False =>
              Short_Family : C.unsigned_short;
        end case;
!    end record with Unchecked_Union, Convention => C;
  
     procedure Set_Family
       (Length_And_Family : out Sockaddr_Length_And_Family;
*************** package GNAT.Sockets.Thin_Common is
*** 122,130 ****
  
     type In_Addr is record
        S_B1, S_B2, S_B3, S_B4 : C.unsigned_char;
!    end record;
!    for In_Addr'Alignment use C.int'Alignment;
!    pragma Convention (C, In_Addr);
     --  IPv4 address, represented as a network-order C.int. Note that the
     --  underlying operating system may assume that values of this type have
     --  C.int alignment, so we need to provide a suitable alignment clause here.
--- 122,128 ----
  
     type In_Addr is record
        S_B1, S_B2, S_B3, S_B4 : C.unsigned_char;
!    end record with Convention => C, Alignment => C.int'Alignment;
     --  IPv4 address, represented as a network-order C.int. Note that the
     --  underlying operating system may assume that values of this type have
     --  C.int alignment, so we need to provide a suitable alignment clause here.
*************** package GNAT.Sockets.Thin_Common is
*** 138,146 ****
        Result : out Inet_Addr_Type);
     --  Conversion functions
  
!    type In6_Addr is array (1 .. 16) of C.unsigned_char;
!    for In6_Addr'Alignment use C.int'Alignment;
!    pragma Convention (C, In6_Addr);
  
     function To_In6_Addr (Addr : Inet_Addr_Type) return In6_Addr;
     procedure To_Inet_Addr
--- 136,145 ----
        Result : out Inet_Addr_Type);
     --  Conversion functions
  
!    type In6_Addr is array (1 .. 16) of C.unsigned_char with Convention => C;
! 
!    Unix_Name_Length : constant := 108;
!    --  Maximum length for local unix socket name
  
     function To_In6_Addr (Addr : Inet_Addr_Type) return In6_Addr;
     procedure To_Inet_Addr
*************** package GNAT.Sockets.Thin_Common is
*** 149,162 ****
     --  Conversion functions
  
     type Sockaddr (Family : Family_Type := Family_Inet) is record
-       Sin_Family : Sockaddr_Length_And_Family;
-       --  Address family (and address length on some platforms)
- 
-       Sin_Port : C.unsigned_short;
-       --  Port in network byte order
- 
        case Family is
        when Family_Inet =>
           Sin_Addr : In_Addr := (others => 0);
           --  IPv4 address
  
--- 148,161 ----
     --  Conversion functions
  
     type Sockaddr (Family : Family_Type := Family_Inet) is record
        case Family is
        when Family_Inet =>
+          Sin_Family : Sockaddr_Length_And_Family;
+          --  Address family (and address length on some platforms)
+ 
+          Sin_Port : C.unsigned_short;
+          --  Port in network byte order
+ 
           Sin_Addr : In_Addr := (others => 0);
           --  IPv4 address
  
*************** package GNAT.Sockets.Thin_Common is
*** 165,180 ****
           --
           --  Note that some platforms require that all unused (reserved) bytes
           --  in addresses be initialized to 0 (e.g. VxWorks).
        when Family_Inet6 =>
           Sin6_FlowInfo : Interfaces.Unsigned_32 := 0;
           Sin6_Addr     : In6_Addr := (others => 0);
           Sin6_Scope_Id : Interfaces.Unsigned_32 := 0;
        when Family_Unspec =>
           null;
        end case;
!    end record;
!    pragma Unchecked_Union (Sockaddr);
!    pragma Convention (C, Sockaddr);
     --  Internet socket address
  
     type Sockaddr_Access is access all Sockaddr;
--- 164,191 ----
           --
           --  Note that some platforms require that all unused (reserved) bytes
           --  in addresses be initialized to 0 (e.g. VxWorks).
+ 
        when Family_Inet6 =>
+          Sin6_Family : Sockaddr_Length_And_Family;
+          --  Address family (and address length on some platforms)
+ 
+          Sin6_Port : C.unsigned_short;
+          --  Port in network byte order
+ 
           Sin6_FlowInfo : Interfaces.Unsigned_32 := 0;
           Sin6_Addr     : In6_Addr := (others => 0);
           Sin6_Scope_Id : Interfaces.Unsigned_32 := 0;
+ 
+       when Family_Unix =>
+          Sun_Family : Sockaddr_Length_And_Family;
+          --  Address family (and address length on some platforms)
+ 
+          Sun_Path : C.char_array (1 .. Unix_Name_Length);
+ 
        when Family_Unspec =>
           null;
        end case;
!    end record with Convention => C, Unchecked_Union;
     --  Internet socket address
  
     type Sockaddr_Access is access all Sockaddr;
*************** package GNAT.Sockets.Thin_Common is
*** 183,195 ****
  
     procedure Set_Address
       (Sin     : Sockaddr_Access;
!       Address : Sock_Addr_Type);
     --  Initialise all necessary fields in Sin from Address.
     --  Set appropriate Family, Port, and either Sin.Sin_Addr or Sin.Sin6_Addr
     --  depend on family.
  
!    function Get_Address (Sin : Sockaddr) return Sock_Addr_Type;
!    --  Get Sock_Addr_Type from Sockaddr
  
     ------------------
     -- Host entries --
--- 194,208 ----
  
     procedure Set_Address
       (Sin     : Sockaddr_Access;
!       Address : Sock_Addr_Type;
!       Length  : out C.int);
     --  Initialise all necessary fields in Sin from Address.
     --  Set appropriate Family, Port, and either Sin.Sin_Addr or Sin.Sin6_Addr
     --  depend on family.
+    --  Set the Length out parameter to the valuable Sockaddr data length.
  
!    function Get_Address (Sin : Sockaddr; Length : C.int) return Sock_Addr_Type;
!    --  Get Sock_Addr_Type from Sockaddr and its valuable data Length
  
     ------------------
     -- Host entries --
*************** package GNAT.Sockets.Thin_Common is
*** 438,443 ****
--- 451,461 ----
     renames Short_To_Network;
     --  Symmetric operation
  
+    function Minus_500ms_Windows_Timeout return C.int;
+    --  Microsoft Windows desktop older then 8.0 and Microsoft Windows Server
+    --  older than 2019 need timeout correction for 500 milliseconds. This
+    --  routine returns 1 for such versions.
+ 
  private
     pragma Import (C, Get_Socket_From_Set, "__gnat_get_socket_from_set");
     pragma Import (C, Is_Socket_In_Set, "__gnat_is_socket_in_set");
*************** private
*** 470,473 ****
--- 488,493 ----
     pragma Import (C, Hostent_H_Length,   "__gnat_hostent_h_length");
     pragma Import (C, Hostent_H_Addr,     "__gnat_hostent_h_addr");
  
+    pragma Import (C, Minus_500ms_Windows_Timeout, "__gnat_minus_500ms");
+ 
  end GNAT.Sockets.Thin_Common;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-spipat.ads gcc-10.1.0/gcc/ada/libgnat/g-spipat.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-spipat.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-spipat.ads	Thu May  7 10:49:59 2020
***************
*** 48,54 ****
  --       matching with the restriction that it matches entire strings. It
  --       is particularly useful for file name matching, and in particular
  --       it provides "globbing patterns" that are useful in implementing
! --       unix or DOS style wild card matching for file names.
  
  --     GNAT.Regpat (files g-regpat.ads/g-regpat.adb)
  --       This is a more complete implementation of Unix-style regular
--- 48,54 ----
  --       matching with the restriction that it matches entire strings. It
  --       is particularly useful for file name matching, and in particular
  --       it provides "globbing patterns" that are useful in implementing
! --       unix or DOS style wildcard matching for file names.
  
  --     GNAT.Regpat (files g-regpat.ads/g-regpat.adb)
  --       This is a more complete implementation of Unix-style regular
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-sthcso.adb gcc-10.1.0/gcc/ada/libgnat/g-sthcso.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-sthcso.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/g-sthcso.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,213 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --     G N A T . S O C K E T S . T H I N . C _ S O C K E T P A I R          --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --                     Copyright (C) 2001-2019, AdaCore                     --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  Portable sockets-based implementation of the C_Socketpair used for
+ --  platforms that do not support UNIX socketpair system call.
+ 
+ --  Note: this code is only for non-UNIX platforms.
+ 
+ separate (GNAT.Sockets.Thin)
+ function C_Socketpair
+   (Domain   : C.int;
+    Typ      : C.int;
+    Protocol : C.int;
+    Fds      : not null access Fd_Pair) return C.int
+ is
+    use type C.char_array;
+ 
+    L_Sock, C_Sock, P_Sock : C.int := Failure;
+    --  Listening socket, client socket and peer socket
+ 
+    Family : constant Family_Type :=
+               (case Domain is
+                   when SOSC.AF_INET  => Family_Inet,
+                   when SOSC.AF_INET6 => Family_Inet6,
+                   when others        => Family_Unspec);
+ 
+    Len   : aliased C.int := C.int (Lengths (Family));
+ 
+    C_Sin : aliased Sockaddr;
+    C_Bin : aliased C.char_array (1 .. C.size_t (Len));
+    for C_Bin'Address use C_Sin'Address;
+    --  Address of listening and client socket and it's binary representation.
+    --  We need binary representation because Ada does not allow to compare
+    --  unchecked union if either of the operands lacks inferable discriminants.
+    --  RM-B-3-3 23/2.
+ 
+    P_Sin : aliased Sockaddr;
+    P_Bin : aliased C.char_array (1 .. C.size_t (Len));
+    for P_Bin'Address use P_Sin'Address;
+    --  Address of peer socket and it's binary representation
+ 
+    T_Sin : aliased Sockaddr;
+    T_Bin : aliased C.char_array (1 .. C.size_t (Len));
+    for T_Bin'Address use T_Sin'Address;
+    --  Temporary address to compare and check that address and port of the
+    --  socket equal to peer address and port of the opposite connected socket.
+ 
+    Res : C.int with Warnings => Off;
+ 
+ begin
+    Set_Family (C_Sin.Sin_Family, Family);
+ 
+    case Family is
+       when Family_Inet =>
+          C_Sin.Sin_Addr.S_B1 := 127;
+          C_Sin.Sin_Addr.S_B4 := 1;
+ 
+       when Family_Inet6 =>
+          C_Sin.Sin6_Addr (C_Sin.Sin6_Addr'Last) := 1;
+ 
+       when others =>
+          Set_Socket_Errno (SOSC.EAFNOSUPPORT);
+          return Failure;
+    end case;
+ 
+    for J in 1 .. 10 loop
+       --  Retry loop, in case the C_Connect below fails
+ 
+       C_Sin.Sin_Port := 0;
+ 
+       --  Create a listening socket
+ 
+       L_Sock := C_Socket (Domain, Typ, Protocol);
+       exit when L_Sock = Failure;
+ 
+       --  Bind the socket to an available port on localhost
+ 
+       Res := C_Bind (L_Sock, C_Sin'Address, Len);
+       exit when Res = Failure;
+ 
+       --  Get assigned port
+ 
+       Res := C_Getsockname (L_Sock, C_Sin'Address, Len'Access);
+       exit when Res = Failure;
+ 
+       --  Set socket to listen mode, with a backlog of 1 to guarantee that
+       --  exactly one call to connect(2) succeeds.
+ 
+       Res := C_Listen (L_Sock, 1);
+       exit when Res = Failure;
+ 
+       --  Create read end (client) socket
+ 
+       C_Sock := C_Socket (Domain, Typ, Protocol);
+       exit when C_Sock = Failure;
+ 
+       --  Connect listening socket
+ 
+       Res := C_Connect (C_Sock, C_Sin'Address, Len);
+ 
+       if Res = Failure then
+          --  In rare cases, the above C_Bind chooses a port that is still
+          --  marked "in use", even though it has been closed (perhaps by some
+          --  other process that has already exited). This causes the above
+          --  C_Connect to fail with EADDRINUSE. In this case, we close the
+          --  ports, and loop back to try again. This mysterious Windows
+          --  behavior is documented. See, for example:
+          --    http://msdn2.microsoft.com/en-us/library/ms737625.aspx
+          --  In an experiment with 2000 calls, 21 required exactly one retry, 7
+          --  required two, and none required three or more. Note that no delay
+          --  is needed between retries; retrying C_Bind will typically produce
+          --  a different port.
+ 
+          exit when Socket_Errno /= SOSC.EADDRINUSE;
+ 
+          goto Repeat;
+       end if;
+ 
+       --  Since the call to connect(2) has succeeded and the backlog limit
+       --  on the listening socket is 1, we know that there is now exactly
+       --  one pending connection on L_Sock, which is the one from R_Sock.
+ 
+       P_Sin.Sun_Path := (others => C.nul);
+ 
+       P_Sock := C_Accept (L_Sock, P_Sin'Address, Len'Access);
+       exit when P_Sock = Failure;
+ 
+       --  Address and port of the socket equal to peer address and port of the
+       --  opposite connected socket.
+ 
+       Res := C_Getsockname (P_Sock, T_Sin'Address, Len'Access);
+       exit when Res = Failure;
+ 
+       if T_Bin /= C_Bin then
+          goto Repeat;
+       end if;
+ 
+       --  Address and port of the socket equal to peer address and port of the
+       --  opposite connected socket.
+ 
+       Res := C_Getsockname (C_Sock, T_Sin'Address, Len'Access);
+       exit when Res = Failure;
+ 
+       if T_Bin /= P_Bin then
+          goto Repeat;
+       end if;
+ 
+       --  Close listening socket (ignore exit status)
+ 
+       Res := C_Close (L_Sock);
+ 
+       Fds.all := (Read_End => C_Sock, Write_End => P_Sock);
+ 
+       return Thin_Common.Success;
+ 
+       <<Repeat>>
+       Res := C_Close (C_Sock);
+       C_Sock := Failure;
+       Res := C_Close (P_Sock);
+       P_Sock := Failure;
+       Res := C_Close (L_Sock);
+       L_Sock := Failure;
+    end loop;
+ 
+    declare
+       Saved_Errno : constant Integer := Socket_Errno;
+ 
+    begin
+       if P_Sock /= Failure then
+          Res := C_Close (P_Sock);
+       end if;
+ 
+       if C_Sock /= Failure then
+          Res := C_Close (C_Sock);
+       end if;
+ 
+       if L_Sock /= Failure then
+          Res := C_Close (L_Sock);
+       end if;
+ 
+       Set_Socket_Errno (Saved_Errno);
+    end;
+ 
+    return Failure;
+ end C_Socketpair;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-stsifd__sockets.adb gcc-10.1.0/gcc/ada/libgnat/g-stsifd__sockets.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-stsifd__sockets.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-stsifd__sockets.adb	Thu May  7 10:49:59 2020
*************** package body Signalling_Fds is
*** 57,210 ****
     ------------
  
     function Create (Fds : not null access Fd_Pair) return C.int is
!       L_Sock, R_Sock, W_Sock : C.int := Failure;
!       --  Listening socket, read socket and write socket
! 
!       Sin : aliased Sockaddr;
!       Len : aliased C.int;
!       --  Address of listening socket
! 
!       Res : C.int;
!       pragma Warnings (Off, Res);
!       --  Return status of system calls (usually ignored, hence warnings off)
! 
     begin
!       Fds.all := (Read_End | Write_End => Failure);
! 
!       --  We open two signalling sockets. One of them is used to send data
!       --  to the other, which is included in a C_Select socket set. The
!       --  communication is used to force the call to C_Select to complete,
!       --  and the waiting task to resume its execution.
! 
!       loop
!          --  Retry loop, in case the C_Connect below fails
! 
!          --  Create a listening socket
! 
!          L_Sock := C_Socket (SOSC.AF_INET, SOSC.SOCK_STREAM, 0);
! 
!          if L_Sock = Failure then
!             goto Fail;
!          end if;
! 
!          --  Bind the socket to an available port on localhost
! 
!          Set_Family (Sin.Sin_Family, Family_Inet);
!          Sin.Sin_Addr.S_B1 := 127;
!          Sin.Sin_Addr.S_B2 := 0;
!          Sin.Sin_Addr.S_B3 := 0;
!          Sin.Sin_Addr.S_B4 := 1;
!          Sin.Sin_Port      := 0;
! 
!          Len := C.int (Lengths (Family_Inet));
!          Res := C_Bind (L_Sock, Sin'Address, Len);
! 
!          if Res = Failure then
!             goto Fail;
!          end if;
! 
!          --  Get assigned port
! 
!          Res := C_Getsockname (L_Sock, Sin'Address, Len'Access);
!          if Res = Failure then
!             goto Fail;
!          end if;
! 
!          --  Set socket to listen mode, with a backlog of 1 to guarantee that
!          --  exactly one call to connect(2) succeeds.
! 
!          Res := C_Listen (L_Sock, 1);
! 
!          if Res = Failure then
!             goto Fail;
!          end if;
! 
!          --  Create read end (client) socket
! 
!          R_Sock := C_Socket (SOSC.AF_INET, SOSC.SOCK_STREAM, 0);
! 
!          if R_Sock = Failure then
!             goto Fail;
!          end if;
! 
!          --  Connect listening socket
! 
!          Res := C_Connect (R_Sock, Sin'Address, Len);
! 
!          exit when Res /= Failure;
! 
!          if Socket_Errno /= SOSC.EADDRINUSE then
!             goto Fail;
!          end if;
! 
!          --  In rare cases, the above C_Bind chooses a port that is still
!          --  marked "in use", even though it has been closed (perhaps by some
!          --  other process that has already exited). This causes the above
!          --  C_Connect to fail with EADDRINUSE. In this case, we close the
!          --  ports, and loop back to try again. This mysterious Windows
!          --  behavior is documented. See, for example:
!          --    http://msdn2.microsoft.com/en-us/library/ms737625.aspx
!          --  In an experiment with 2000 calls, 21 required exactly one retry, 7
!          --  required two, and none required three or more. Note that no delay
!          --  is needed between retries; retrying C_Bind will typically produce
!          --  a different port.
! 
!          pragma Assert (Res = Failure
!                           and then
!                         Socket_Errno = SOSC.EADDRINUSE);
!          Res := C_Close (W_Sock);
!          W_Sock := Failure;
!          Res := C_Close (R_Sock);
!          R_Sock := Failure;
!       end loop;
! 
!       --  Since the call to connect(2) has succeeded and the backlog limit on
!       --  the listening socket is 1, we know that there is now exactly one
!       --  pending connection on L_Sock, which is the one from R_Sock.
! 
!       W_Sock := C_Accept (L_Sock, Sin'Address, Len'Access);
  
!       if W_Sock = Failure then
!          goto Fail;
        end if;
  
!       --  Set TCP_NODELAY on W_Sock, since we always want to send the data out
!       --  immediately.
! 
!       Set_Socket_Option
!         (Socket => Socket_Type (W_Sock),
!          Level  => IP_Protocol_For_TCP_Level,
!          Option => (Name => No_Delay, Enabled => True));
! 
!       --  Close listening socket (ignore exit status)
! 
!       Res := C_Close (L_Sock);
! 
!       Fds.all := (Read_End => R_Sock, Write_End => W_Sock);
! 
!       return Thin_Common.Success;
! 
!    <<Fail>>
!       declare
!          Saved_Errno : constant Integer := Socket_Errno;
! 
!       begin
!          if W_Sock /= Failure then
!             Res := C_Close (W_Sock);
!          end if;
! 
!          if R_Sock /= Failure then
!             Res := C_Close (R_Sock);
!          end if;
! 
!          if L_Sock /= Failure then
!             Res := C_Close (L_Sock);
!          end if;
! 
!          Set_Socket_Errno (Saved_Errno);
!       end;
! 
!       return Failure;
     end Create;
  
     ----------
--- 57,76 ----
     ------------
  
     function Create (Fds : not null access Fd_Pair) return C.int is
!       Res : constant C.int :=
!               C_Socketpair (SOSC.AF_INET, SOSC.SOCK_STREAM, 0, Fds);
     begin
!       if Res /= Failure then
!          --  Set TCP_NODELAY on Fds (Write_End), since we always want to send
!          --  the data out immediately.
  
!          Set_Socket_Option
!            (Socket => Socket_Type (Fds (Write_End)),
!             Level  => IP_Protocol_For_TCP_Level,
!             Option => (Name => No_Delay, Enabled => True));
        end if;
  
!       return Res;
     end Create;
  
     ----------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-traceb.adb gcc-10.1.0/gcc/ada/libgnat/g-traceb.adb
*** gcc-9.3.0/gcc/ada/libgnat/g-traceb.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-traceb.adb	Thu May  7 10:49:59 2020
*************** package body GNAT.Traceback is
*** 47,50 ****
--- 47,62 ----
        System.Traceback.Call_Chain (Traceback, Traceback'Length, Len);
     end Call_Chain;
  
+    function Call_Chain
+      (Max_Len     : Positive;
+       Skip_Frames : Natural := 1) return Tracebacks_Array
+    is
+       Traceback : Tracebacks_Array (1 .. Max_Len);
+       Len       : Natural;
+    begin
+       System.Traceback.Call_Chain
+         (Traceback, Max_Len, Len, Skip_Frames => Skip_Frames + 1);
+       return Traceback (1 .. Len);
+    end Call_Chain;
+ 
  end GNAT.Traceback;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/g-traceb.ads gcc-10.1.0/gcc/ada/libgnat/g-traceb.ads
*** gcc-9.3.0/gcc/ada/libgnat/g-traceb.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/g-traceb.ads	Thu May  7 10:49:59 2020
*************** package GNAT.Traceback is
*** 98,101 ****
--- 98,111 ----
     --  shorter, in which case positions in Traceback past the Len position
     --  are undefined on return.
  
+    function Call_Chain
+      (Max_Len     : Positive;
+       Skip_Frames : Natural := 1) return Tracebacks_Array;
+    --  Returns up to Max_Len tracebacks corresponding to the current call
+    --  chain. Result array order is the same as in above procedure Call_Chain
+    --  except that Skip_Frames says how many of the most recent calls should be
+    --  excluded from the result, starting with this procedure itself: 1 means
+    --  exclude the frame for this procedure, 2 means 1 + exclude the frame for
+    --  this procedure's caller, ...
+ 
  end GNAT.Traceback;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-aotase.adb gcc-10.1.0/gcc/ada/libgnat/s-aotase.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-aotase.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/s-aotase.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,66 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                  System.Atomic_Operations.Test_And_Set                   --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --                 Copyright (C) 2019, Free Software Foundation, Inc.       --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with System.Atomic_Primitives; use System.Atomic_Primitives;
+ 
+ package body System.Atomic_Operations.Test_And_Set is
+ 
+    -------------------------
+    -- Atomic_Test_And_Set --
+    -------------------------
+ 
+    function Atomic_Test_And_Set
+      (Item : aliased in out Test_And_Set_Flag) return Boolean is
+    begin
+       return Boolean (Atomic_Test_And_Set (Item'Address));
+    end Atomic_Test_And_Set;
+ 
+    ------------------
+    -- Atomic_Clear --
+    ------------------
+ 
+    procedure Atomic_Clear
+      (Item : aliased in out Test_And_Set_Flag) is
+    begin
+       Atomic_Clear (Item'Address);
+    end Atomic_Clear;
+ 
+    ------------------
+    -- Is_Lock_Free --
+    ------------------
+ 
+    function Is_Lock_Free (Item : aliased Test_And_Set_Flag) return Boolean is
+       pragma Unreferenced (Item);
+    begin
+       return True;
+    end Is_Lock_Free;
+ 
+ end System.Atomic_Operations.Test_And_Set;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-aotase.ads gcc-10.1.0/gcc/ada/libgnat/s-aotase.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-aotase.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/s-aotase.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,55 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                  System.Atomic_Operations.Test_And_Set                   --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --                 Copyright (C) 2019, Free Software Foundation, Inc.       --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ package System.Atomic_Operations.Test_And_Set
+   with Pure
+ --  Nonblocking
+ is
+    type Test_And_Set_Flag is mod 2 ** 8
+      with Atomic, Default_Value => 0, Size => 8;
+ 
+    function Atomic_Test_And_Set
+      (Item : aliased in out Test_And_Set_Flag) return Boolean
+      with Convention => Intrinsic;
+ 
+    procedure Atomic_Clear
+      (Item : aliased in out Test_And_Set_Flag)
+      with Convention => Intrinsic;
+ 
+    function Is_Lock_Free
+      (Item : aliased Test_And_Set_Flag) return Boolean
+      with Convention => Intrinsic;
+ 
+ private
+    pragma Inline_Always (Atomic_Test_And_Set);
+    pragma Inline_Always (Atomic_Clear);
+    pragma Inline_Always (Is_Lock_Free);
+ end System.Atomic_Operations.Test_And_Set;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-arit64.adb gcc-10.1.0/gcc/ada/libgnat/s-arit64.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-arit64.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-arit64.adb	Thu May  7 10:49:59 2020
*************** package body System.Arith_64 is
*** 147,159 ****
           Raise_Error;
        end if;
  
        --  Compute Y * Z. Note that if the result overflows 64 bits unsigned,
!       --  then the rounded result is clearly zero (since the dividend is at
!       --  most 2**63 - 1, the extra bit of precision is nice here).
  
        if Yhi /= 0 then
           if Zhi /= 0 then
!             Q := 0;
              R := X;
              return;
           else
--- 147,177 ----
           Raise_Error;
        end if;
  
+       --  Set final signs (RM 4.5.5(27-30))
+ 
+       Den_Pos := (Y < 0) = (Z < 0);
+ 
        --  Compute Y * Z. Note that if the result overflows 64 bits unsigned,
!       --  then the rounded result is zero, except for the very special case
!       --  where X = -2**63 and abs(Y*Z) = 2**64, when Round is True.
  
        if Yhi /= 0 then
           if Zhi /= 0 then
! 
!             --  Handle the special case when Round is True
! 
!             if Yhi = 1
!               and then Zhi = 1
!               and then Ylo = 0
!               and then Zlo = 0
!               and then X = Int64'First
!               and then Round
!             then
!                Q := (if Den_Pos then -1 else 1);
!             else
!                Q := 0;
!             end if;
! 
              R := X;
              return;
           else
*************** package body System.Arith_64 is
*** 161,185 ****
           end if;
  
        else
!          T2 := (if Zhi /= 0 then Ylo * Zhi else 0);
        end if;
  
        T1 := Ylo * Zlo;
        T2 := T2 + Hi (T1);
  
        if Hi (T2) /= 0 then
!          Q := 0;
           R := X;
           return;
        end if;
  
        Du := Lo (T2) & Lo (T1);
  
!       --  Set final signs (RM 4.5.5(27-30))
! 
!       Den_Pos := (Y < 0) = (Z < 0);
! 
!       --  Check overflow case of largest negative number divided by 1
  
        if X = Int64'First and then Du = 1 and then not Den_Pos then
           Raise_Error;
--- 179,212 ----
           end if;
  
        else
!          T2 := Ylo * Zhi;
        end if;
  
        T1 := Ylo * Zlo;
        T2 := T2 + Hi (T1);
  
        if Hi (T2) /= 0 then
! 
!          --  Handle the special case when Round is True
! 
!          if Hi (T2) = 1
!            and then Lo (T2) = 0
!            and then Lo (T1) = 0
!            and then X = Int64'First
!            and then Round
!          then
!             Q := (if Den_Pos then -1 else 1);
!          else
!             Q := 0;
!          end if;
! 
           R := X;
           return;
        end if;
  
        Du := Lo (T2) & Lo (T1);
  
!       --  Check overflow case of largest negative number divided by -1
  
        if X = Int64'First and then Du = 1 and then not Den_Pos then
           Raise_Error;
*************** package body System.Arith_64 is
*** 204,212 ****
  
        --  Case of dividend (X) sign negative
  
        else
!          R := -To_Int (Ru);
!          Q := (if Den_Pos then -To_Int (Qu) else To_Int (Qu));
        end if;
     end Double_Divide;
  
--- 231,243 ----
  
        --  Case of dividend (X) sign negative
  
+       --  We perform the unary minus operation on the unsigned value
+       --  before conversion to signed, to avoid a possible overflow for
+       --  value -2**63, both for computing R and Q.
+ 
        else
!          R := To_Int (-Ru);
!          Q := (if Den_Pos then To_Int (-Qu) else To_Int (Qu));
        end if;
     end Double_Divide;
  
*************** package body System.Arith_64 is
*** 400,414 ****
              Ru := T2 rem Zlo;
           end if;
  
!       --  If divisor is double digit and too large, raise error
  
        elsif (D (1) & D (2)) >= Zu then
           Raise_Error;
  
        --  This is the complex case where we definitely have a double digit
        --  divisor and a dividend of at least three digits. We use the classical
!       --  multiple division algorithm (see section (4.3.1) of Knuth's "The Art
!       --  of Computer Programming", Vol. 2 for a description (algorithm D).
  
        else
           --  First normalize the divisor so that it has the leading bit on.
--- 431,446 ----
              Ru := T2 rem Zlo;
           end if;
  
!       --  If divisor is double digit and dividend is too large, raise error
  
        elsif (D (1) & D (2)) >= Zu then
           Raise_Error;
  
        --  This is the complex case where we definitely have a double digit
        --  divisor and a dividend of at least three digits. We use the classical
!       --  multiple-precision division algorithm (see section (4.3.1) of Knuth's
!       --  "The Art of Computer Programming", Vol. 2 for a description
!       --  (algorithm D).
  
        else
           --  First normalize the divisor so that it has the leading bit on.
*************** package body System.Arith_64 is
*** 446,452 ****
  
           --  Note that when we scale up the dividend, it still fits in four
           --  digits, since we already tested for overflow, and scaling does
!          --  not change the invariant that (D (1) & D (2)) >= Zu.
  
           T1 := Shift_Left (D (1) & D (2), Scale);
           D (1) := Hi (T1);
--- 478,484 ----
  
           --  Note that when we scale up the dividend, it still fits in four
           --  digits, since we already tested for overflow, and scaling does
!          --  not change the invariant that (D (1) & D (2)) < Zu.
  
           T1 := Shift_Left (D (1) & D (2), Scale);
           D (1) := Hi (T1);
*************** package body System.Arith_64 is
*** 481,486 ****
--- 513,531 ----
  
              --  Adjust quotient digit if it was too high
  
+             --  We use the version of the algorithm in the 2nd Edition of
+             --  "The Art of Computer Programming". This had a bug not
+             --  discovered till 1995, see Vol 2 errata:
+             --     http://www-cs-faculty.stanford.edu/~uno/err2-2e.ps.gz.
+             --  Under rare circumstances the expression in the test could
+             --  overflow. This version was further corrected in 2005, see
+             --  Vol 2 errata:
+             --     http://www-cs-faculty.stanford.edu/~uno/all2-pre.ps.gz.
+             --  This implementation is not impacted by these bugs, due to the
+             --  use of a word-size comparison done in function Le3 instead of
+             --  a comparison on two-word integer quantities in the original
+             --  algorithm.
+ 
              loop
                 exit when Le3 (S1, S2, S3, D (J + 1), D (J + 2), D (J + 3));
                 Qd (J + 1) := Qd (J + 1) - 1;
*************** package body System.Arith_64 is
*** 507,512 ****
--- 552,565 ----
        --  Deal with rounding case
  
        if Round and then Ru > (Zu - Uns64'(1)) / Uns64'(2) then
+ 
+          --  Protect against wrapping around when rounding, by signaling
+          --  an overflow when the quotient is too large.
+ 
+          if Qu = Uns64'Last then
+             Raise_Error;
+          end if;
+ 
           Qu := Qu + Uns64 (1);
        end if;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-atoope.ads gcc-10.1.0/gcc/ada/libgnat/s-atoope.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-atoope.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/s-atoope.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,35 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --              S Y S T E M . A T O M I C _ O P E R A T I O N S             --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --                 Copyright (C) 2019, Free Software Foundation, Inc.       --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ package System.Atomic_Operations
+   with Pure
+ is
+ end System.Atomic_Operations;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-atopar.adb gcc-10.1.0/gcc/ada/libgnat/s-atopar.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-atopar.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/s-atopar.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,147 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                   System.Atomic_Operations.Arithmetic                    --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --                 Copyright (C) 2019, Free Software Foundation, Inc.       --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with System.Atomic_Primitives; use System.Atomic_Primitives;
+ with Interfaces.C;
+ 
+ package body System.Atomic_Operations.Arithmetic is
+ 
+    ----------------
+    -- Atomic_Add --
+    ----------------
+ 
+    procedure Atomic_Add
+      (Item  : aliased in out Atomic_Type;
+       Value : Atomic_Type)
+    is
+       Ignore : constant Atomic_Type := Atomic_Fetch_And_Add (Item, Value);
+    begin
+       null;
+    end Atomic_Add;
+ 
+    ---------------------
+    -- Atomic_Subtract --
+    ---------------------
+ 
+    procedure Atomic_Subtract
+      (Item  : aliased in out Atomic_Type;
+       Value : Atomic_Type)
+    is
+       Ignore : constant Atomic_Type := Atomic_Fetch_And_Subtract (Item, Value);
+    begin
+       null;
+    end Atomic_Subtract;
+ 
+    --------------------------
+    -- Atomic_Fetch_And_Add --
+    --------------------------
+ 
+    function Atomic_Fetch_And_Add
+      (Item  : aliased in out Atomic_Type;
+       Value : Atomic_Type) return Atomic_Type
+    is
+       pragma Warnings (Off);
+       function Atomic_Fetch_Add_1
+         (Ptr : System.Address; Val : Atomic_Type; Model : Mem_Model := Seq_Cst)
+         return Atomic_Type;
+       pragma Import (Intrinsic, Atomic_Fetch_Add_1, "__atomic_fetch_add_1");
+       function Atomic_Fetch_Add_2
+         (Ptr : System.Address; Val : Atomic_Type; Model : Mem_Model := Seq_Cst)
+         return Atomic_Type;
+       pragma Import (Intrinsic, Atomic_Fetch_Add_2, "__atomic_fetch_add_2");
+       function Atomic_Fetch_Add_4
+         (Ptr : System.Address; Val : Atomic_Type; Model : Mem_Model := Seq_Cst)
+         return Atomic_Type;
+       pragma Import (Intrinsic, Atomic_Fetch_Add_4, "__atomic_fetch_add_4");
+       function Atomic_Fetch_Add_8
+         (Ptr : System.Address; Val : Atomic_Type; Model : Mem_Model := Seq_Cst)
+         return Atomic_Type;
+       pragma Import (Intrinsic, Atomic_Fetch_Add_8, "__atomic_fetch_add_8");
+       pragma Warnings (On);
+ 
+    begin
+       case Item'Size is
+          when 8      => return Atomic_Fetch_Add_1 (Item'Address, Value);
+          when 16     => return Atomic_Fetch_Add_2 (Item'Address, Value);
+          when 32     => return Atomic_Fetch_Add_4 (Item'Address, Value);
+          when 64     => return Atomic_Fetch_Add_8 (Item'Address, Value);
+          when others => raise Program_Error;
+       end case;
+    end Atomic_Fetch_And_Add;
+ 
+    -------------------------------
+    -- Atomic_Fetch_And_Subtract --
+    -------------------------------
+ 
+    function Atomic_Fetch_And_Subtract
+      (Item  : aliased in out Atomic_Type;
+       Value : Atomic_Type) return Atomic_Type
+    is
+       pragma Warnings (Off);
+       function Atomic_Fetch_Sub_1
+         (Ptr : System.Address; Val : Atomic_Type; Model : Mem_Model := Seq_Cst)
+         return Atomic_Type;
+       pragma Import (Intrinsic, Atomic_Fetch_Sub_1, "__atomic_fetch_sub_1");
+       function Atomic_Fetch_Sub_2
+         (Ptr : System.Address; Val : Atomic_Type; Model : Mem_Model := Seq_Cst)
+         return Atomic_Type;
+       pragma Import (Intrinsic, Atomic_Fetch_Sub_2, "__atomic_fetch_sub_2");
+       function Atomic_Fetch_Sub_4
+         (Ptr : System.Address; Val : Atomic_Type; Model : Mem_Model := Seq_Cst)
+         return Atomic_Type;
+       pragma Import (Intrinsic, Atomic_Fetch_Sub_4, "__atomic_fetch_sub_4");
+       function Atomic_Fetch_Sub_8
+         (Ptr : System.Address; Val : Atomic_Type; Model : Mem_Model := Seq_Cst)
+         return Atomic_Type;
+       pragma Import (Intrinsic, Atomic_Fetch_Sub_8, "__atomic_fetch_sub_8");
+       pragma Warnings (On);
+ 
+    begin
+       case Item'Size is
+          when 8      => return Atomic_Fetch_Sub_1 (Item'Address, Value);
+          when 16     => return Atomic_Fetch_Sub_2 (Item'Address, Value);
+          when 32     => return Atomic_Fetch_Sub_4 (Item'Address, Value);
+          when 64     => return Atomic_Fetch_Sub_8 (Item'Address, Value);
+          when others => raise Program_Error;
+       end case;
+    end Atomic_Fetch_And_Subtract;
+ 
+    ------------------
+    -- Is_Lock_Free --
+    ------------------
+ 
+    function Is_Lock_Free (Item : aliased Atomic_Type) return Boolean is
+       use type Interfaces.C.size_t;
+    begin
+       return Boolean (Atomic_Always_Lock_Free (Item'Size / 8));
+    end Is_Lock_Free;
+ 
+ end System.Atomic_Operations.Arithmetic;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-atopar.ads gcc-10.1.0/gcc/ada/libgnat/s-atopar.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-atopar.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/s-atopar.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,65 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                   System.Atomic_Operations.Arithmetic                    --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --                 Copyright (C) 2019, Free Software Foundation, Inc.       --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ pragma Ada_2020;
+ 
+ generic
+    type Atomic_Type is range <> with Atomic;
+ package System.Atomic_Operations.Arithmetic
+   with Pure
+ --  Nonblocking
+ is
+    procedure Atomic_Add
+      (Item  : aliased in out Atomic_Type;
+       Value : Atomic_Type) with Convention => Intrinsic;
+ 
+    procedure Atomic_Subtract
+      (Item  : aliased in out Atomic_Type;
+       Value : Atomic_Type) with Convention => Intrinsic;
+ 
+    function Atomic_Fetch_And_Add
+      (Item  : aliased in out Atomic_Type;
+       Value : Atomic_Type) return Atomic_Type with Convention => Intrinsic;
+ 
+    function Atomic_Fetch_And_Subtract
+      (Item  : aliased in out Atomic_Type;
+       Value : Atomic_Type) return Atomic_Type with Convention => Intrinsic;
+ 
+    function Is_Lock_Free
+      (Item : aliased Atomic_Type) return Boolean with Convention => Intrinsic;
+ 
+ private
+    pragma Inline_Always (Atomic_Add);
+    pragma Inline_Always (Atomic_Subtract);
+    pragma Inline_Always (Atomic_Fetch_And_Add);
+    pragma Inline_Always (Atomic_Fetch_And_Subtract);
+    pragma Inline_Always (Is_Lock_Free);
+ end System.Atomic_Operations.Arithmetic;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-atopex.adb gcc-10.1.0/gcc/ada/libgnat/s-atopex.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-atopex.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/s-atopex.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,159 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                    System.Atomic_Operations.Exchange                     --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --                 Copyright (C) 2019, Free Software Foundation, Inc.       --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with System.Atomic_Primitives; use System.Atomic_Primitives;
+ with Interfaces.C;
+ 
+ package body System.Atomic_Operations.Exchange is
+ 
+    ---------------------
+    -- Atomic_Exchange --
+    ---------------------
+ 
+    function Atomic_Exchange
+      (Item  : aliased in out Atomic_Type;
+       Value : Atomic_Type) return Atomic_Type
+    is
+       pragma Warnings (Off);
+       function Atomic_Exchange_1
+         (Ptr   : System.Address;
+          Val   : Atomic_Type;
+          Model : Mem_Model := Seq_Cst) return Atomic_Type;
+       pragma Import (Intrinsic, Atomic_Exchange_1, "__atomic_exchange_1");
+       function Atomic_Exchange_2
+         (Ptr   : System.Address;
+          Val   : Atomic_Type;
+          Model : Mem_Model := Seq_Cst) return Atomic_Type;
+       pragma Import (Intrinsic, Atomic_Exchange_2, "__atomic_exchange_2");
+       function Atomic_Exchange_4
+         (Ptr   : System.Address;
+          Val   : Atomic_Type;
+          Model : Mem_Model := Seq_Cst) return Atomic_Type;
+       pragma Import (Intrinsic, Atomic_Exchange_4, "__atomic_exchange_4");
+       function Atomic_Exchange_8
+         (Ptr   : System.Address;
+          Val   : Atomic_Type;
+          Model : Mem_Model := Seq_Cst) return Atomic_Type;
+       pragma Import (Intrinsic, Atomic_Exchange_8, "__atomic_exchange_8");
+       pragma Warnings (On);
+ 
+    begin
+       case Item'Size is
+          when 8      => return Atomic_Exchange_1 (Item'Address, Value);
+          when 16     => return Atomic_Exchange_2 (Item'Address, Value);
+          when 32     => return Atomic_Exchange_4 (Item'Address, Value);
+          when 64     => return Atomic_Exchange_8 (Item'Address, Value);
+          when others => raise Program_Error;
+       end case;
+    end Atomic_Exchange;
+ 
+    ---------------------------------
+    -- Atomic_Compare_And_Exchange --
+    ---------------------------------
+ 
+    function Atomic_Compare_And_Exchange
+      (Item    : aliased in out Atomic_Type;
+       Prior   : aliased in out Atomic_Type;
+       Desired : Atomic_Type) return Boolean
+    is
+       pragma Warnings (Off);
+       function Atomic_Compare_Exchange_1
+         (Ptr           : System.Address;
+          Expected      : System.Address;
+          Desired       : Atomic_Type;
+          Weak          : bool := False;
+          Success_Model : Mem_Model := Seq_Cst;
+          Failure_Model : Mem_Model := Seq_Cst) return bool;
+       pragma Import
+         (Intrinsic, Atomic_Compare_Exchange_1, "__atomic_compare_exchange_1");
+       function Atomic_Compare_Exchange_2
+         (Ptr           : System.Address;
+          Expected      : System.Address;
+          Desired       : Atomic_Type;
+          Weak          : bool := False;
+          Success_Model : Mem_Model := Seq_Cst;
+          Failure_Model : Mem_Model := Seq_Cst) return bool;
+       pragma Import
+         (Intrinsic, Atomic_Compare_Exchange_2, "__atomic_compare_exchange_2");
+       function Atomic_Compare_Exchange_4
+         (Ptr           : System.Address;
+          Expected      : System.Address;
+          Desired       : Atomic_Type;
+          Weak          : bool := False;
+          Success_Model : Mem_Model := Seq_Cst;
+          Failure_Model : Mem_Model := Seq_Cst) return bool;
+       pragma Import
+         (Intrinsic, Atomic_Compare_Exchange_4, "__atomic_compare_exchange_4");
+       function Atomic_Compare_Exchange_8
+         (Ptr           : System.Address;
+          Expected      : System.Address;
+          Desired       : Atomic_Type;
+          Weak          : bool := False;
+          Success_Model : Mem_Model := Seq_Cst;
+          Failure_Model : Mem_Model := Seq_Cst) return bool;
+       pragma Import
+         (Intrinsic, Atomic_Compare_Exchange_8, "__atomic_compare_exchange_8");
+       pragma Warnings (On);
+ 
+    begin
+       case Item'Size is
+          when 8 =>
+             return Boolean
+               (Atomic_Compare_Exchange_1
+                 (Item'Address, Prior'Address, Desired));
+          when 16 =>
+             return Boolean
+               (Atomic_Compare_Exchange_2
+                 (Item'Address, Prior'Address, Desired));
+          when 32 =>
+             return Boolean
+               (Atomic_Compare_Exchange_4
+                 (Item'Address, Prior'Address, Desired));
+          when 64 =>
+             return Boolean
+               (Atomic_Compare_Exchange_8
+                 (Item'Address, Prior'Address, Desired));
+          when others =>
+             raise Program_Error;
+       end case;
+    end Atomic_Compare_And_Exchange;
+ 
+    ------------------
+    -- Is_Lock_Free --
+    ------------------
+ 
+    function Is_Lock_Free (Item : aliased Atomic_Type) return Boolean is
+       use type Interfaces.C.size_t;
+    begin
+       return Boolean (Atomic_Always_Lock_Free (Item'Size / 8));
+    end Is_Lock_Free;
+ 
+ end System.Atomic_Operations.Exchange;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-atopex.ads gcc-10.1.0/gcc/ada/libgnat/s-atopex.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-atopex.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/s-atopex.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,56 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                    System.Atomic_Operations.Exchange                     --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --                 Copyright (C) 2019, Free Software Foundation, Inc.       --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ pragma Ada_2020;
+ 
+ generic
+    type Atomic_Type is private with Atomic;
+ package System.Atomic_Operations.Exchange
+   with Pure
+ --  Blocking
+ is
+    function Atomic_Exchange
+      (Item  : aliased in out Atomic_Type;
+       Value : Atomic_Type) return Atomic_Type with Convention => Intrinsic;
+ 
+    function Atomic_Compare_And_Exchange
+      (Item    : aliased in out Atomic_Type;
+       Prior   : aliased in out Atomic_Type;
+       Desired : Atomic_Type) return Boolean with Convention => Intrinsic;
+ 
+    function Is_Lock_Free
+      (Item : aliased Atomic_Type) return Boolean with Convention => Intrinsic;
+ 
+ private
+    pragma Inline_Always (Atomic_Exchange);
+    pragma Inline_Always (Atomic_Compare_And_Exchange);
+    pragma Inline_Always (Is_Lock_Free);
+ end System.Atomic_Operations.Exchange;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-atopri.ads gcc-10.1.0/gcc/ada/libgnat/s-atopri.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-atopri.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-atopri.ads	Thu May  7 10:49:59 2020
***************
*** 33,40 ****
  --  functions and operations used by the compiler to generate the lock-free
  --  implementation of protected objects.
  
  package System.Atomic_Primitives is
!    pragma Preelaborate;
  
     type uint is mod 2 ** Long_Integer'Size;
  
--- 33,42 ----
  --  functions and operations used by the compiler to generate the lock-free
  --  implementation of protected objects.
  
+ with Interfaces.C;
+ 
  package System.Atomic_Primitives is
!    pragma Pure;
  
     type uint is mod 2 ** Long_Integer'Size;
  
*************** package System.Atomic_Primitives is
*** 60,65 ****
--- 62,70 ----
  
     subtype Mem_Model is Integer range Relaxed .. Last;
  
+    type bool is new Boolean;
+    pragma Convention (C, bool);
+ 
     ------------------------------------
     -- GCC built-in atomic primitives --
     ------------------------------------
*************** package System.Atomic_Primitives is
*** 130,135 ****
--- 135,156 ----
     --                 Atomic_Compare_Exchange_8,
     --                 "__atomic_compare_exchange_1");
  
+    function Atomic_Test_And_Set
+      (Ptr   : System.Address;
+       Model : Mem_Model := Seq_Cst) return bool;
+    pragma Import (Intrinsic, Atomic_Test_And_Set, "__atomic_test_and_set");
+ 
+    procedure Atomic_Clear
+      (Ptr   : System.Address;
+       Model : Mem_Model := Seq_Cst);
+    pragma Import (Intrinsic, Atomic_Clear, "__atomic_clear");
+ 
+    function Atomic_Always_Lock_Free
+      (Size : Interfaces.C.size_t;
+       Ptr  : System.Address := System.Null_Address) return bool;
+    pragma Import
+      (Intrinsic, Atomic_Always_Lock_Free, "__atomic_always_lock_free");
+ 
     --------------------------
     -- Lock-free operations --
     --------------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-bignum.adb gcc-10.1.0/gcc/ada/libgnat/s-bignum.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-bignum.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-bignum.adb	Thu May  7 10:49:59 2020
***************
*** 29,1105 ****
  --                                                                          --
  ------------------------------------------------------------------------------
  
! --  This package provides arbitrary precision signed integer arithmetic for
! --  use in computing intermediate values in expressions for the case where
! --  pragma Overflow_Check (Eliminate) is in effect.
! 
! with System;                  use System;
! with System.Secondary_Stack;  use System.Secondary_Stack;
! with System.Storage_Elements; use System.Storage_Elements;
  
  package body System.Bignums is
  
!    use Interfaces;
!    --  So that operations on Unsigned_32 are available
! 
!    type DD is mod Base ** 2;
!    --  Double length digit used for intermediate computations
! 
!    function MSD (X : DD) return SD is (SD (X / Base));
!    function LSD (X : DD) return SD is (SD (X mod Base));
!    --  Most significant and least significant digit of double digit value
! 
!    function "&" (X, Y : SD) return DD is (DD (X) * Base + DD (Y));
!    --  Compose double digit value from two single digit values
! 
!    subtype LLI is Long_Long_Integer;
! 
!    One_Data : constant Digit_Vector (1 .. 1) := (1 => 1);
!    --  Constant one
! 
!    Zero_Data : constant Digit_Vector (1 .. 0) := (1 .. 0 => 0);
!    --  Constant zero
! 
!    -----------------------
!    -- Local Subprograms --
!    -----------------------
! 
!    function Add
!      (X, Y  : Digit_Vector;
!       X_Neg : Boolean;
!       Y_Neg : Boolean) return Bignum
!    with
!      Pre => X'First = 1 and then Y'First = 1;
!    --  This procedure adds two signed numbers returning the Sum, it is used
!    --  for both addition and subtraction. The value computed is X + Y, with
!    --  X_Neg and Y_Neg giving the signs of the operands.
! 
!    function Allocate_Bignum (Len : Length) return Bignum with
!      Post => Allocate_Bignum'Result.Len = Len;
!    --  Allocate Bignum value of indicated length on secondary stack. On return
!    --  the Neg and D fields are left uninitialized.
! 
!    type Compare_Result is (LT, EQ, GT);
!    --  Indicates result of comparison in following call
! 
!    function Compare
!      (X, Y         : Digit_Vector;
!       X_Neg, Y_Neg : Boolean) return Compare_Result
!    with
!      Pre => X'First = 1 and then Y'First = 1;
!    --  Compare (X with sign X_Neg) with (Y with sign Y_Neg), and return the
!    --  result of the signed comparison.
! 
!    procedure Div_Rem
!      (X, Y              : Bignum;
!       Quotient          : out Bignum;
!       Remainder         : out Bignum;
!       Discard_Quotient  : Boolean := False;
!       Discard_Remainder : Boolean := False);
!    --  Returns the Quotient and Remainder from dividing abs (X) by abs (Y). The
!    --  values of X and Y are not modified. If Discard_Quotient is True, then
!    --  Quotient is undefined on return, and if Discard_Remainder is True, then
!    --  Remainder is undefined on return. Service routine for Big_Div/Rem/Mod.
! 
!    procedure Free_Bignum (X : Bignum) is null;
!    --  Called to free a Bignum value used in intermediate computations. In
!    --  this implementation using the secondary stack, it does nothing at all,
!    --  because we rely on Mark/Release, but it may be of use for some
!    --  alternative implementation.
! 
!    function Normalize
!      (X   : Digit_Vector;
!       Neg : Boolean := False) return Bignum;
!    --  Given a digit vector and sign, allocate and construct a Bignum value.
!    --  Note that X may have leading zeroes which must be removed, and if the
!    --  result is zero, the sign is forced positive.
! 
!    ---------
!    -- Add --
!    ---------
! 
!    function Add
!      (X, Y  : Digit_Vector;
!       X_Neg : Boolean;
!       Y_Neg : Boolean) return Bignum
!    is
!    begin
!       --  If signs are the same, we are doing an addition, it is convenient to
!       --  ensure that the first operand is the longer of the two.
! 
!       if X_Neg = Y_Neg then
!          if X'Last < Y'Last then
!             return Add (X => Y, Y => X, X_Neg => Y_Neg, Y_Neg => X_Neg);
! 
!          --  Here signs are the same, and the first operand is the longer
! 
!          else
!             pragma Assert (X_Neg = Y_Neg and then X'Last >= Y'Last);
! 
!             --  Do addition, putting result in Sum (allowing for carry)
! 
!             declare
!                Sum : Digit_Vector (0 .. X'Last);
!                RD  : DD;
! 
!             begin
!                RD := 0;
!                for J in reverse 1 .. X'Last loop
!                   RD := RD + DD (X (J));
! 
!                   if J >= 1 + (X'Last - Y'Last) then
!                      RD := RD + DD (Y (J - (X'Last - Y'Last)));
!                   end if;
! 
!                   Sum (J) := LSD (RD);
!                   RD := RD / Base;
!                end loop;
! 
!                Sum (0) := SD (RD);
!                return Normalize (Sum, X_Neg);
!             end;
!          end if;
! 
!       --  Signs are different so really this is a subtraction, we want to make
!       --  sure that the largest magnitude operand is the first one, and then
!       --  the result will have the sign of the first operand.
! 
!       else
!          declare
!             CR : constant Compare_Result := Compare (X, Y, False, False);
! 
!          begin
!             if CR = EQ then
!                return Normalize (Zero_Data);
! 
!             elsif CR = LT then
!                return Add (X => Y, Y => X, X_Neg => Y_Neg, Y_Neg => X_Neg);
! 
!             else
!                pragma Assert (X_Neg /= Y_Neg and then CR = GT);
! 
!                --  Do subtraction, putting result in Diff
! 
!                declare
!                   Diff : Digit_Vector (1 .. X'Length);
!                   RD   : DD;
! 
!                begin
!                   RD := 0;
!                   for J in reverse 1 .. X'Last loop
!                      RD := RD + DD (X (J));
! 
!                      if J >= 1 + (X'Last - Y'Last) then
!                         RD := RD - DD (Y (J - (X'Last - Y'Last)));
!                      end if;
! 
!                      Diff (J) := LSD (RD);
!                      RD := (if RD < Base then 0 else -1);
!                   end loop;
! 
!                   return Normalize (Diff, X_Neg);
!                end;
!             end if;
!          end;
!       end if;
!    end Add;
! 
!    ---------------------
!    -- Allocate_Bignum --
!    ---------------------
! 
!    function Allocate_Bignum (Len : Length) return Bignum is
!       Addr : Address;
! 
!    begin
!       --  Change the if False here to if True to get allocation on the heap
!       --  instead of the secondary stack, which is convenient for debugging
!       --  System.Bignum itself.
! 
!       if False then
!          declare
!             B : Bignum;
!          begin
!             B := new Bignum_Data'(Len, False, (others => 0));
!             return B;
!          end;
! 
!       --  Normal case of allocation on the secondary stack
! 
!       else
!          --  Note: The approach used here is designed to avoid strict aliasing
!          --  warnings that appeared previously using unchecked conversion.
! 
!          SS_Allocate (Addr, Storage_Offset (4 + 4 * Len));
! 
!          declare
!             B : Bignum;
!             for B'Address use Addr'Address;
!             pragma Import (Ada, B);
! 
!             BD : Bignum_Data (Len);
!             for BD'Address use Addr;
!             pragma Import (Ada, BD);
! 
!             --  Expose a writable view of discriminant BD.Len so that we can
!             --  initialize it. We need to use the exact layout of the record
!             --  to ensure that the Length field has 24 bits as expected.
! 
!             type Bignum_Data_Header is record
!                Len : Length;
!                Neg : Boolean;
!             end record;
! 
!             for Bignum_Data_Header use record
!                Len at 0 range 0 .. 23;
!                Neg at 3 range 0 .. 7;
!             end record;
! 
!             BDH : Bignum_Data_Header;
!             for BDH'Address use BD'Address;
!             pragma Import (Ada, BDH);
! 
!             pragma Assert (BDH.Len'Size = BD.Len'Size);
! 
!          begin
!             BDH.Len := Len;
!             return B;
!          end;
!       end if;
!    end Allocate_Bignum;
! 
!    -------------
!    -- Big_Abs --
!    -------------
! 
!    function Big_Abs (X : Bignum) return Bignum is
!    begin
!       return Normalize (X.D);
!    end Big_Abs;
! 
!    -------------
!    -- Big_Add --
!    -------------
! 
!    function Big_Add  (X, Y : Bignum) return Bignum is
!    begin
!       return Add (X.D, Y.D, X.Neg, Y.Neg);
!    end Big_Add;
! 
!    -------------
!    -- Big_Div --
!    -------------
! 
!    --  This table is excerpted from RM 4.5.5(28-30) and shows how the result
!    --  varies with the signs of the operands.
! 
!    --   A      B   A/B      A     B    A/B
!    --
!    --   10     5    2      -10    5    -2
!    --   11     5    2      -11    5    -2
!    --   12     5    2      -12    5    -2
!    --   13     5    2      -13    5    -2
!    --   14     5    2      -14    5    -2
!    --
!    --   A      B   A/B      A     B    A/B
!    --
!    --   10    -5   -2      -10   -5     2
!    --   11    -5   -2      -11   -5     2
!    --   12    -5   -2      -12   -5     2
!    --   13    -5   -2      -13   -5     2
!    --   14    -5   -2      -14   -5     2
! 
!    function Big_Div  (X, Y : Bignum) return Bignum is
!       Q, R : Bignum;
!    begin
!       Div_Rem (X, Y, Q, R, Discard_Remainder => True);
!       Q.Neg := Q.Len > 0 and then (X.Neg xor Y.Neg);
!       return Q;
!    end Big_Div;
! 
!    -------------
!    -- Big_Exp --
!    -------------
! 
!    function Big_Exp  (X, Y : Bignum) return Bignum is
! 
!       function "**" (X : Bignum; Y : SD) return Bignum;
!       --  Internal routine where we know right operand is one word
! 
!       ----------
!       -- "**" --
!       ----------
! 
!       function "**" (X : Bignum; Y : SD) return Bignum is
!       begin
!          case Y is
! 
!             --  X ** 0 is 1
! 
!             when 0 =>
!                return Normalize (One_Data);
! 
!             --  X ** 1 is X
! 
!             when 1 =>
!                return Normalize (X.D);
! 
!             --  X ** 2 is X * X
! 
!             when 2 =>
!                return Big_Mul (X, X);
! 
!             --  For X greater than 2, use the recursion
! 
!             --  X even, X ** Y = (X ** (Y/2)) ** 2;
!             --  X odd,  X ** Y = (X ** (Y/2)) ** 2 * X;
! 
!             when others =>
!                declare
!                   XY2  : constant Bignum := X ** (Y / 2);
!                   XY2S : constant Bignum := Big_Mul (XY2, XY2);
!                   Res  : Bignum;
! 
!                begin
!                   Free_Bignum (XY2);
! 
!                   --  Raise storage error if intermediate value is getting too
!                   --  large, which we arbitrarily define as 200 words for now.
! 
!                   if XY2S.Len > 200 then
!                      Free_Bignum (XY2S);
!                      raise Storage_Error with
!                        "exponentiation result is too large";
!                   end if;
! 
!                   --  Otherwise take care of even/odd cases
! 
!                   if (Y and 1) = 0 then
!                      return XY2S;
! 
!                   else
!                      Res := Big_Mul (XY2S, X);
!                      Free_Bignum (XY2S);
!                      return Res;
!                   end if;
!                end;
!          end case;
!       end "**";
! 
!    --  Start of processing for Big_Exp
! 
!    begin
!       --  Error if right operand negative
! 
!       if Y.Neg then
!          raise Constraint_Error with "exponentiation to negative power";
! 
!       --  X ** 0 is always 1 (including 0 ** 0, so do this test first)
! 
!       elsif Y.Len = 0 then
!          return Normalize (One_Data);
! 
!       --  0 ** X is always 0 (for X non-zero)
! 
!       elsif X.Len = 0 then
!          return Normalize (Zero_Data);
! 
!       --  (+1) ** Y = 1
!       --  (-1) ** Y = +/-1 depending on whether Y is even or odd
! 
!       elsif X.Len = 1 and then X.D (1) = 1 then
!          return Normalize
!            (X.D, Neg => X.Neg and then ((Y.D (Y.Len) and 1) = 1));
! 
!       --  If the absolute value of the base is greater than 1, then the
!       --  exponent must not be bigger than one word, otherwise the result
!       --  is ludicrously large, and we just signal Storage_Error right away.
! 
!       elsif Y.Len > 1 then
!          raise Storage_Error with "exponentiation result is too large";
! 
!       --  Special case (+/-)2 ** K, where K is 1 .. 31 using a shift
! 
!       elsif X.Len = 1 and then X.D (1) = 2 and then Y.D (1) < 32 then
!          declare
!             D : constant Digit_Vector (1 .. 1) :=
!                   (1 => Shift_Left (SD'(1), Natural (Y.D (1))));
!          begin
!             return Normalize (D, X.Neg);
!          end;
! 
!       --  Remaining cases have right operand of one word
! 
!       else
!          return X ** Y.D (1);
!       end if;
!    end Big_Exp;
! 
!    ------------
!    -- Big_EQ --
!    ------------
! 
!    function Big_EQ (X, Y : Bignum) return Boolean is
!    begin
!       return Compare (X.D, Y.D, X.Neg, Y.Neg) = EQ;
!    end Big_EQ;
! 
!    ------------
!    -- Big_GE --
!    ------------
! 
!    function Big_GE (X, Y : Bignum) return Boolean is
!    begin
!       return Compare (X.D, Y.D, X.Neg, Y.Neg) /= LT;
!    end Big_GE;
! 
!    ------------
!    -- Big_GT --
!    ------------
! 
!    function Big_GT (X, Y : Bignum) return Boolean is
!    begin
!       return Compare (X.D, Y.D, X.Neg, Y.Neg) = GT;
!    end Big_GT;
! 
!    ------------
!    -- Big_LE --
!    ------------
! 
!    function Big_LE (X, Y : Bignum) return Boolean is
!    begin
!       return Compare (X.D, Y.D, X.Neg, Y.Neg) /= GT;
!    end Big_LE;
! 
!    ------------
!    -- Big_LT --
!    ------------
! 
!    function Big_LT (X, Y : Bignum) return Boolean is
!    begin
!       return Compare (X.D, Y.D, X.Neg, Y.Neg) = LT;
!    end Big_LT;
! 
!    -------------
!    -- Big_Mod --
!    -------------
! 
!    --  This table is excerpted from RM 4.5.5(28-30) and shows how the result
!    --  of Rem and Mod vary with the signs of the operands.
! 
!    --   A      B    A mod B  A rem B     A     B    A mod B  A rem B
! 
!    --   10     5       0        0       -10    5       0        0
!    --   11     5       1        1       -11    5       4       -1
!    --   12     5       2        2       -12    5       3       -2
!    --   13     5       3        3       -13    5       2       -3
!    --   14     5       4        4       -14    5       1       -4
! 
!    --   A      B    A mod B  A rem B     A     B    A mod B  A rem B
! 
!    --   10    -5       0        0       -10   -5       0        0
!    --   11    -5      -4        1       -11   -5      -1       -1
!    --   12    -5      -3        2       -12   -5      -2       -2
!    --   13    -5      -2        3       -13   -5      -3       -3
!    --   14    -5      -1        4       -14   -5      -4       -4
! 
!    function Big_Mod (X, Y : Bignum) return Bignum is
!       Q, R : Bignum;
! 
!    begin
!       --  If signs are same, result is same as Rem
! 
!       if X.Neg = Y.Neg then
!          return Big_Rem (X, Y);
! 
!       --  Case where Mod is different
! 
!       else
!          --  Do division
! 
!          Div_Rem (X, Y, Q, R, Discard_Quotient => True);
! 
!          --  Zero result is unchanged
  
!          if R.Len = 0 then
!             return R;
  
!          --  Otherwise adjust result
  
!          else
!             declare
!                T1 : constant Bignum := Big_Sub (Y, R);
!             begin
!                T1.Neg := Y.Neg;
!                Free_Bignum (R);
!                return T1;
!             end;
!          end if;
!       end if;
!    end Big_Mod;
  
!    -------------
!    -- Big_Mul --
!    -------------
  
     function Big_Mul (X, Y : Bignum) return Bignum is
!       Result : Digit_Vector (1 .. X.Len + Y.Len) := (others => 0);
!       --  Accumulate result (max length of result is sum of operand lengths)
! 
!       L : Length;
!       --  Current result digit
! 
!       D : DD;
!       --  Result digit
! 
!    begin
!       for J in 1 .. X.Len loop
!          for K in 1 .. Y.Len loop
!             L := Result'Last - (X.Len - J) - (Y.Len - K);
!             D := DD (X.D (J)) * DD (Y.D (K)) + DD (Result (L));
!             Result (L) := LSD (D);
!             D := D / Base;
! 
!             --  D is carry which must be propagated
! 
!             while D /= 0 and then L >= 1 loop
!                L := L - 1;
!                D := D + DD (Result (L));
!                Result (L) := LSD (D);
!                D := D / Base;
!             end loop;
! 
!             --  Must not have a carry trying to extend max length
! 
!             pragma Assert (D = 0);
!          end loop;
!       end loop;
! 
!       --  Return result
! 
!       return Normalize (Result, X.Neg xor Y.Neg);
!    end Big_Mul;
! 
!    ------------
!    -- Big_NE --
!    ------------
! 
!    function Big_NE (X, Y : Bignum) return Boolean is
!    begin
!       return Compare (X.D, Y.D, X.Neg, Y.Neg) /= EQ;
!    end Big_NE;
! 
!    -------------
!    -- Big_Neg --
!    -------------
! 
!    function Big_Neg (X : Bignum) return Bignum is
!    begin
!       return Normalize (X.D, not X.Neg);
!    end Big_Neg;
! 
!    -------------
!    -- Big_Rem --
!    -------------
! 
!    --  This table is excerpted from RM 4.5.5(28-30) and shows how the result
!    --  varies with the signs of the operands.
! 
!    --   A      B   A rem B   A     B   A rem B
  
!    --   10     5      0     -10    5      0
!    --   11     5      1     -11    5     -1
!    --   12     5      2     -12    5     -2
!    --   13     5      3     -13    5     -3
!    --   14     5      4     -14    5     -4
  
!    --   A      B  A rem B    A     B   A rem B
  
!    --   10    -5     0      -10   -5      0
!    --   11    -5     1      -11   -5     -1
!    --   12    -5     2      -12   -5     -2
!    --   13    -5     3      -13   -5     -3
!    --   14    -5     4      -14   -5     -4
  
     function Big_Rem (X, Y : Bignum) return Bignum is
!       Q, R : Bignum;
!    begin
!       Div_Rem (X, Y, Q, R, Discard_Quotient => True);
!       R.Neg := R.Len > 0 and then X.Neg;
!       return R;
!    end Big_Rem;
! 
!    -------------
!    -- Big_Sub --
!    -------------
! 
!    function Big_Sub (X, Y : Bignum) return Bignum is
!    begin
!       --  If right operand zero, return left operand (avoiding sharing)
! 
!       if Y.Len = 0 then
!          return Normalize (X.D, X.Neg);
! 
!       --  Otherwise add negative of right operand
! 
!       else
!          return Add (X.D, Y.D, X.Neg, not Y.Neg);
!       end if;
!    end Big_Sub;
! 
!    -------------
!    -- Compare --
!    -------------
! 
!    function Compare
!      (X, Y         : Digit_Vector;
!       X_Neg, Y_Neg : Boolean) return Compare_Result
!    is
!    begin
!       --  Signs are different, that's decisive, since 0 is always plus
! 
!       if X_Neg /= Y_Neg then
!          return (if X_Neg then LT else GT);
! 
!       --  Lengths are different, that's decisive since no leading zeroes
! 
!       elsif X'Last /= Y'Last then
!          return (if (X'Last > Y'Last) xor X_Neg then GT else LT);
! 
!       --  Need to compare data
! 
!       else
!          for J in X'Range loop
!             if X (J) /= Y (J) then
!                return (if (X (J) > Y (J)) xor X_Neg then GT else LT);
!             end if;
!          end loop;
! 
!          return EQ;
!       end if;
!    end Compare;
! 
!    -------------
!    -- Div_Rem --
!    -------------
! 
!    procedure Div_Rem
!      (X, Y              : Bignum;
!       Quotient          : out Bignum;
!       Remainder         : out Bignum;
!       Discard_Quotient  : Boolean := False;
!       Discard_Remainder : Boolean := False)
!    is
!    begin
!       --  Error if division by zero
! 
!       if Y.Len = 0 then
!          raise Constraint_Error with "division by zero";
!       end if;
! 
!       --  Handle simple cases with special tests
! 
!       --  If X < Y then quotient is zero and remainder is X
! 
!       if Compare (X.D, Y.D, False, False) = LT then
!          Remainder := Normalize (X.D);
!          Quotient  := Normalize (Zero_Data);
!          return;
! 
!       --  If both X and Y are less than 2**63-1, we can use Long_Long_Integer
!       --  arithmetic. Note it is good not to do an accurate range check against
!       --  Long_Long_Integer since -2**63 / -1 overflows.
! 
!       elsif (X.Len <= 1 or else (X.Len = 2 and then X.D (1) < 2**31))
!               and then
!             (Y.Len <= 1 or else (Y.Len = 2 and then Y.D (1) < 2**31))
!       then
!          declare
!             A : constant LLI := abs (From_Bignum (X));
!             B : constant LLI := abs (From_Bignum (Y));
!          begin
!             Quotient  := To_Bignum (A / B);
!             Remainder := To_Bignum (A rem B);
!             return;
!          end;
! 
!       --  Easy case if divisor is one digit
! 
!       elsif Y.Len = 1 then
!          declare
!             ND  : DD;
!             Div : constant DD := DD (Y.D (1));
! 
!             Result : Digit_Vector (1 .. X.Len);
!             Remdr  : Digit_Vector (1 .. 1);
! 
!          begin
!             ND := 0;
!             for J in 1 .. X.Len loop
!                ND := Base * ND + DD (X.D (J));
!                Result (J) := SD (ND / Div);
!                ND := ND rem Div;
!             end loop;
! 
!             Quotient  := Normalize (Result);
!             Remdr (1) := SD (ND);
!             Remainder := Normalize (Remdr);
!             return;
!          end;
!       end if;
! 
!       --  The complex full multi-precision case. We will employ algorithm
!       --  D defined in the section "The Classical Algorithms" (sec. 4.3.1)
!       --  of Donald Knuth's "The Art of Computer Programming", Vol. 2, 2nd
!       --  edition. The terminology is adjusted for this section to match that
!       --  reference.
! 
!       --  We are dividing X.Len digits of X (called u here) by Y.Len digits
!       --  of Y (called v here), developing the quotient and remainder. The
!       --  numbers are represented using Base, which was chosen so that we have
!       --  the operations of multiplying to single digits (SD) to form a double
!       --  digit (DD), and dividing a double digit (DD) by a single digit (SD)
!       --  to give a single digit quotient and a single digit remainder.
! 
!       --  Algorithm D from Knuth
! 
!       --  Comments here with square brackets are directly from Knuth
! 
!       Algorithm_D : declare
! 
!          --  The following lower case variables correspond exactly to the
!          --  terminology used in algorithm D.
! 
!          m : constant Length := X.Len - Y.Len;
!          n : constant Length := Y.Len;
!          b : constant DD     := Base;
! 
!          u : Digit_Vector (0 .. m + n);
!          v : Digit_Vector (1 .. n);
!          q : Digit_Vector (0 .. m);
!          r : Digit_Vector (1 .. n);
! 
!          u0 : SD renames u (0);
!          v1 : SD renames v (1);
!          v2 : SD renames v (2);
! 
!          d    : DD;
!          j    : Length;
!          qhat : DD;
!          rhat : DD;
!          temp : DD;
! 
!       begin
!          --  Initialize data of left and right operands
! 
!          for J in 1 .. m + n loop
!             u (J) := X.D (J);
!          end loop;
! 
!          for J in 1 .. n loop
!             v (J) := Y.D (J);
!          end loop;
! 
!          --  [Division of nonnegative integers.] Given nonnegative integers u
!          --  = (ul,u2..um+n) and v = (v1,v2..vn), where v1 /= 0 and n > 1, we
!          --  form the quotient u / v = (q0,ql..qm) and the remainder u mod v =
!          --  (r1,r2..rn).
! 
!          pragma Assert (v1 /= 0);
!          pragma Assert (n > 1);
! 
!          --  Dl. [Normalize.] Set d = b/(vl + 1). Then set (u0,u1,u2..um+n)
!          --  equal to (u1,u2..um+n) times d, and set (v1,v2..vn) equal to
!          --  (v1,v2..vn) times d. Note the introduction of a new digit position
!          --  u0 at the left of u1; if d = 1 all we need to do in this step is
!          --  to set u0 = 0.
! 
!          d := b / (DD (v1) + 1);
! 
!          if d = 1 then
!             u0 := 0;
! 
!          else
!             declare
!                Carry : DD;
!                Tmp   : DD;
! 
!             begin
!                --  Multiply Dividend (u) by d
! 
!                Carry := 0;
!                for J in reverse 1 .. m + n loop
!                   Tmp   := DD (u (J)) * d + Carry;
!                   u (J) := LSD (Tmp);
!                   Carry := Tmp / Base;
!                end loop;
! 
!                u0 := SD (Carry);
! 
!                --  Multiply Divisor (v) by d
! 
!                Carry := 0;
!                for J in reverse 1 .. n loop
!                   Tmp   := DD (v (J)) * d + Carry;
!                   v (J) := LSD (Tmp);
!                   Carry := Tmp / Base;
!                end loop;
! 
!                pragma Assert (Carry = 0);
!             end;
!          end if;
! 
!          --  D2. [Initialize j.] Set j = 0. The loop on j, steps D2 through D7,
!          --  will be essentially a division of (uj, uj+1..uj+n) by (v1,v2..vn)
!          --  to get a single quotient digit qj.
! 
!          j := 0;
! 
!          --  Loop through digits
! 
!          loop
!             --  Note: In the original printing, step D3 was as follows:
! 
!             --  D3. [Calculate qhat.] If uj = v1, set qhat to b-l; otherwise
!             --  set qhat to (uj,uj+1)/v1. Now test if v2 * qhat is greater than
!             --  (uj*b + uj+1 - qhat*v1)*b + uj+2. If so, decrease qhat by 1 and
!             --  repeat this test
! 
!             --  This had a bug not discovered till 1995, see Vol 2 errata:
!             --  http://www-cs-faculty.stanford.edu/~uno/err2-2e.ps.gz. Under
!             --  rare circumstances the expression in the test could overflow.
!             --  This version was further corrected in 2005, see Vol 2 errata:
!             --  http://www-cs-faculty.stanford.edu/~uno/all2-pre.ps.gz.
!             --  The code below is the fixed version of this step.
! 
!             --  D3. [Calculate qhat.] Set qhat to (uj,uj+1)/v1 and rhat to
!             --  to (uj,uj+1) mod v1.
! 
!             temp := u (j) & u (j + 1);
!             qhat := temp / DD (v1);
!             rhat := temp mod DD (v1);
! 
!             --  D3 (continued). Now test if qhat >= b or v2*qhat > (rhat,uj+2):
!             --  if so, decrease qhat by 1, increase rhat by v1, and repeat this
!             --  test if rhat < b. [The test on v2 determines at high speed
!             --  most of the cases in which the trial value qhat is one too
!             --  large, and eliminates all cases where qhat is two too large.]
! 
!             while qhat >= b
!               or else DD (v2) * qhat > LSD (rhat) & u (j + 2)
!             loop
!                qhat := qhat - 1;
!                rhat := rhat + DD (v1);
!                exit when rhat >= b;
!             end loop;
! 
!             --  D4. [Multiply and subtract.] Replace (uj,uj+1..uj+n) by
!             --  (uj,uj+1..uj+n) minus qhat times (v1,v2..vn). This step
!             --  consists of a simple multiplication by a one-place number,
!             --  combined with a subtraction.
! 
!             --  The digits (uj,uj+1..uj+n) are always kept positive; if the
!             --  result of this step is actually negative then (uj,uj+1..uj+n)
!             --  is left as the true value plus b**(n+1), i.e. as the b's
!             --  complement of the true value, and a "borrow" to the left is
!             --  remembered.
! 
!             declare
!                Borrow : SD;
!                Carry  : DD;
!                Temp   : DD;
! 
!                Negative : Boolean;
!                --  Records if subtraction causes a negative result, requiring
!                --  an add back (case where qhat turned out to be 1 too large).
! 
!             begin
!                Borrow := 0;
!                for K in reverse 1 .. n loop
!                   Temp := qhat * DD (v (K)) + DD (Borrow);
!                   Borrow := MSD (Temp);
! 
!                   if LSD (Temp) > u (j + K) then
!                      Borrow := Borrow + 1;
!                   end if;
! 
!                   u (j + K) := u (j + K) - LSD (Temp);
!                end loop;
! 
!                Negative := u (j) < Borrow;
!                u (j) := u (j) - Borrow;
! 
!                --  D5. [Test remainder.] Set qj = qhat. If the result of step
!                --  D4 was negative, we will do the add back step (step D6).
! 
!                q (j) := LSD (qhat);
! 
!                if Negative then
! 
!                   --  D6. [Add back.] Decrease qj by 1, and add (0,v1,v2..vn)
!                   --  to (uj,uj+1,uj+2..uj+n). (A carry will occur to the left
!                   --  of uj, and it is be ignored since it cancels with the
!                   --  borrow that occurred in D4.)
! 
!                   q (j) := q (j) - 1;
! 
!                   Carry := 0;
!                   for K in reverse 1 .. n loop
!                      Temp := DD (v (K)) + DD (u (j + K)) + Carry;
!                      u (j + K) := LSD (Temp);
!                      Carry := Temp / Base;
!                   end loop;
! 
!                   u (j) := u (j) + SD (Carry);
!                end if;
!             end;
! 
!             --  D7. [Loop on j.] Increase j by one. Now if j <= m, go back to
!             --  D3 (the start of the loop on j).
! 
!             j := j + 1;
!             exit when not (j <= m);
!          end loop;
! 
!          --  D8. [Unnormalize.] Now (qo,ql..qm) is the desired quotient, and
!          --  the desired remainder may be obtained by dividing (um+1..um+n)
!          --  by d.
! 
!          if not Discard_Quotient then
!             Quotient := Normalize (q);
!          end if;
! 
!          if not Discard_Remainder then
!             declare
!                Remdr : DD;
! 
!             begin
!                Remdr := 0;
!                for K in 1 .. n loop
!                   Remdr := Base * Remdr + DD (u (m + K));
!                   r (K) := SD (Remdr / d);
!                   Remdr := Remdr rem d;
!                end loop;
! 
!                pragma Assert (Remdr = 0);
!             end;
! 
!             Remainder := Normalize (r);
!          end if;
!       end Algorithm_D;
!    end Div_Rem;
! 
!    -----------------
!    -- From_Bignum --
!    -----------------
! 
!    function From_Bignum (X : Bignum) return Long_Long_Integer is
!    begin
!       if X.Len = 0 then
!          return 0;
! 
!       elsif X.Len = 1 then
!          return (if X.Neg then -LLI (X.D (1)) else LLI (X.D (1)));
  
!       elsif X.Len = 2 then
!          declare
!             Mag : constant DD := X.D (1) & X.D (2);
!          begin
!             if X.Neg and then Mag <= 2 ** 63 then
!                return -LLI (Mag);
!             elsif Mag < 2 ** 63 then
!                return LLI (Mag);
!             end if;
!          end;
!       end if;
  
!       raise Constraint_Error with "expression value out of range";
!    end From_Bignum;
  
!    -------------------------
!    -- Bignum_In_LLI_Range --
!    -------------------------
  
     function Bignum_In_LLI_Range (X : Bignum) return Boolean is
!    begin
!       --  If length is 0 or 1, definitely fits
! 
!       if X.Len <= 1 then
!          return True;
! 
!       --  If length is greater than 2, definitely does not fit
! 
!       elsif X.Len > 2 then
!          return False;
! 
!       --  Length is 2, more tests needed
! 
!       else
!          declare
!             Mag : constant DD := X.D (1) & X.D (2);
!          begin
!             return Mag < 2 ** 63 or else (X.Neg and then Mag = 2 ** 63);
!          end;
!       end if;
!    end Bignum_In_LLI_Range;
! 
!    ---------------
!    -- Normalize --
!    ---------------
! 
!    function Normalize
!      (X   : Digit_Vector;
!       Neg : Boolean := False) return Bignum
!    is
!       B : Bignum;
!       J : Length;
! 
!    begin
!       J := X'First;
!       while J <= X'Last and then X (J) = 0 loop
!          J := J + 1;
!       end loop;
! 
!       B := Allocate_Bignum (X'Last - J + 1);
!       B.Neg := B.Len > 0 and then Neg;
!       B.D := X (J .. X'Last);
!       return B;
!    end Normalize;
! 
!    ---------------
!    -- To_Bignum --
!    ---------------
  
     function To_Bignum (X : Long_Long_Integer) return Bignum is
!       R : Bignum;
! 
!    begin
!       if X = 0 then
!          R := Allocate_Bignum (0);
! 
!       --  One word result
! 
!       elsif X in -(2 ** 32 - 1) .. +(2 ** 32 - 1) then
!          R := Allocate_Bignum (1);
!          R.D (1) := SD (abs (X));
! 
!       --  Largest negative number annoyance
! 
!       elsif X = Long_Long_Integer'First then
!          R := Allocate_Bignum (2);
!          R.D (1) := 2 ** 31;
!          R.D (2) := 0;
! 
!       --  Normal two word case
! 
!       else
!          R := Allocate_Bignum (2);
!          R.D (2) := SD (abs (X) mod Base);
!          R.D (1) := SD (abs (X) / Base);
!       end if;
  
!       R.Neg := X < 0;
!       return R;
!    end To_Bignum;
  
  end System.Bignums;
--- 29,96 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
! with System.Generic_Bignums;
! with Ada.Unchecked_Conversion;
  
  package body System.Bignums is
  
!    package Sec_Stack_Bignums is new
!      System.Generic_Bignums (Use_Secondary_Stack => True);
!    use Sec_Stack_Bignums;
  
!    function "+" is new Ada.Unchecked_Conversion
!      (Bignum, Sec_Stack_Bignums.Bignum);
  
!    function "-" is new Ada.Unchecked_Conversion
!      (Sec_Stack_Bignums.Bignum, Bignum);
  
!    function Big_Add (X, Y : Bignum) return Bignum is
!      (-Sec_Stack_Bignums.Big_Add (+X, +Y));
  
!    function Big_Sub (X, Y : Bignum) return Bignum is
!      (-Sec_Stack_Bignums.Big_Sub (+X, +Y));
  
     function Big_Mul (X, Y : Bignum) return Bignum is
!      (-Sec_Stack_Bignums.Big_Mul (+X, +Y));
  
!    function Big_Div (X, Y : Bignum) return Bignum is
!      (-Sec_Stack_Bignums.Big_Div (+X, +Y));
  
!    function Big_Exp (X, Y : Bignum) return Bignum is
!      (-Sec_Stack_Bignums.Big_Exp (+X, +Y));
  
!    function Big_Mod (X, Y : Bignum) return Bignum is
!      (-Sec_Stack_Bignums.Big_Mod (+X, +Y));
  
     function Big_Rem (X, Y : Bignum) return Bignum is
!      (-Sec_Stack_Bignums.Big_Rem (+X, +Y));
  
!    function Big_Neg (X    : Bignum) return Bignum is
!      (-Sec_Stack_Bignums.Big_Neg (+X));
  
!    function Big_Abs (X    : Bignum) return Bignum is
!      (-Sec_Stack_Bignums.Big_Abs (+X));
  
!    function Big_EQ  (X, Y : Bignum) return Boolean is
!      (Sec_Stack_Bignums.Big_EQ (+X, +Y));
!    function Big_NE  (X, Y : Bignum) return Boolean is
!      (Sec_Stack_Bignums.Big_NE (+X, +Y));
!    function Big_GE  (X, Y : Bignum) return Boolean is
!      (Sec_Stack_Bignums.Big_GE (+X, +Y));
!    function Big_LE  (X, Y : Bignum) return Boolean is
!      (Sec_Stack_Bignums.Big_LE (+X, +Y));
!    function Big_GT  (X, Y : Bignum) return Boolean is
!      (Sec_Stack_Bignums.Big_GT (+X, +Y));
!    function Big_LT  (X, Y : Bignum) return Boolean is
!      (Sec_Stack_Bignums.Big_LT (+X, +Y));
  
     function Bignum_In_LLI_Range (X : Bignum) return Boolean is
!      (Sec_Stack_Bignums.Bignum_In_LLI_Range (+X));
  
     function To_Bignum (X : Long_Long_Integer) return Bignum is
!      (-Sec_Stack_Bignums.To_Bignum (X));
  
!    function From_Bignum (X : Bignum) return Long_Long_Integer is
!      (Sec_Stack_Bignums.From_Bignum (+X));
  
  end System.Bignums;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-bignum.ads gcc-10.1.0/gcc/ada/libgnat/s-bignum.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-bignum.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-bignum.ads	Thu May  7 10:49:59 2020
***************
*** 33,83 ****
  --  use in computing intermediate values in expressions for the case where
  --  pragma Overflow_Check (Eliminated) is in effect.
  
! with Interfaces;
  
  package System.Bignums is
  
!    pragma Assert (Long_Long_Integer'Size = 64);
!    --  This package assumes that Long_Long_Integer size is 64 bit (i.e. that it
!    --  has a range of -2**63 to 2**63-1). The front end ensures that the mode
!    --  ELIMINATED is not allowed for overflow checking if this is not the case.
! 
!    subtype Length is Natural range 0 .. 2 ** 23 - 1;
!    --  Represent number of words in Digit_Vector
! 
!    Base : constant := 2 ** 32;
!    --  Digit vectors use this base
! 
!    subtype SD is Interfaces.Unsigned_32;
!    --  Single length digit
! 
!    type Digit_Vector is array (Length range <>) of SD;
!    --  Represent digits of a number (most significant digit first)
! 
!    type Bignum_Data (Len : Length) is record
!       Neg : Boolean;
!       --  Set if value is negative, never set for zero
! 
!       D : Digit_Vector (1 .. Len);
!       --  Digits of number, most significant first, represented in base
!       --  2**Base. No leading zeroes are stored, and the value of zero is
!       --  represented using an empty vector for D.
!    end record;
! 
!    for Bignum_Data use record
!       Len at 0 range 0 .. 23;
!       Neg at 3 range 0 .. 7;
!    end record;
! 
!    type Bignum is access all Bignum_Data;
!    --  This is the type that is used externally. Possibly this could be a
!    --  private type, but we leave the structure exposed for now. For one
!    --  thing it helps with debugging. Note that this package never shares
!    --  an allocated Bignum value, so for example for X + 0, a copy of X is
!    --  returned, not X itself.
! 
!    --  Note: none of the subprograms in this package modify the Bignum_Data
!    --  records referenced by Bignum arguments of mode IN.
  
     function Big_Add (X, Y : Bignum) return Bignum;  --  "+"
     function Big_Sub (X, Y : Bignum) return Bignum;  --  "-"
--- 33,45 ----
  --  use in computing intermediate values in expressions for the case where
  --  pragma Overflow_Check (Eliminated) is in effect.
  
! --  Note that we cannot use a straight instantiation of System.Generic_Bignums
! --  because the rtsfind mechanism is not ready to handle instantiations.
  
  package System.Bignums is
+    pragma Preelaborate;
  
!    type Bignum is private;
  
     function Big_Add (X, Y : Bignum) return Bignum;  --  "+"
     function Big_Sub (X, Y : Bignum) return Bignum;  --  "-"
*************** package System.Bignums is
*** 113,116 ****
--- 75,101 ----
     --  Convert Bignum to Long_Long_Integer. Constraint_Error raised with
     --  appropriate message if value is out of range of Long_Long_Integer.
  
+ private
+ 
+    type Bignum is new System.Address;
+ 
+    pragma Inline (Big_Add);
+    pragma Inline (Big_Sub);
+    pragma Inline (Big_Mul);
+    pragma Inline (Big_Div);
+    pragma Inline (Big_Exp);
+    pragma Inline (Big_Mod);
+    pragma Inline (Big_Rem);
+    pragma Inline (Big_Neg);
+    pragma Inline (Big_Abs);
+    pragma Inline (Big_EQ);
+    pragma Inline (Big_NE);
+    pragma Inline (Big_GE);
+    pragma Inline (Big_LE);
+    pragma Inline (Big_GT);
+    pragma Inline (Big_LT);
+    pragma Inline (Bignum_In_LLI_Range);
+    pragma Inline (To_Bignum);
+    pragma Inline (From_Bignum);
+ 
  end System.Bignums;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-bitfie.ads gcc-10.1.0/gcc/ada/libgnat/s-bitfie.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-bitfie.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/s-bitfie.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,60 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                 S Y S T E M . B I T F I E L D _ U T I L S                --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --               Copyright (C) 2019, Free Software Foundation, Inc.         --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with System.Bitfield_Utils;
+ 
+ package System.Bitfields is
+ 
+    --  Instances of the generic package in System.Bitfield_Utils. So far
+    --  we have just one, which defaults to the natural endianness of the
+    --  machine. We might someday want to support Scalar_Storage_Order.
+    --  Note: we use Long_Long_Integer'Size / 2 instead of 32 to support
+    --  specifying a target configuration file where the largest integer is
+    --  32 bits instead of 64.
+ 
+    Val_Bits  : constant := Long_Long_Integer'Size / 2;
+    Val_Bytes : constant := Val_Bits / System.Storage_Unit;
+ 
+    type Val_2 is mod 2**(Val_Bits * 2) with Alignment => Val_Bytes;
+    pragma Provide_Shift_Operators (Val_2);
+    type Val is mod 2**Val_Bits with Alignment => Val_Bytes;
+ 
+    package Utils is new System.Bitfield_Utils.G (Val, Val_2);
+ 
+    procedure Copy_Bitfield
+      (Src_Address  : Address;
+       Src_Offset   : Utils.Bit_Offset_In_Byte;
+       Dest_Address : Address;
+       Dest_Offset  : Utils.Bit_Offset_In_Byte;
+       Size         : Utils.Bit_Size)
+      renames Utils.Copy_Bitfield;
+ 
+ end System.Bitfields;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-bituti.adb gcc-10.1.0/gcc/ada/libgnat/s-bituti.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-bituti.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/s-bituti.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,419 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                 S Y S T E M . B I T F I E L D _ U T I L S                --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --               Copyright (C) 2019, Free Software Foundation, Inc.         --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ package body System.Bitfield_Utils is
+ 
+    --  ???
+    --
+    --  This code does not yet work for overlapping bit fields. We need to copy
+    --  backwards in some cases (i.e. from higher to lower bit addresses).
+    --  Alternatively, we could avoid calling this if Forwards_OK is False.
+    --
+    --  ???
+ 
+    package body G is
+ 
+       Val_Bytes : constant Address := Address (Val'Size / Storage_Unit);
+ 
+       --  A Val_2 can cross a memory page boundary (e.g. an 8-byte Val_2 that
+       --  starts 4 bytes before the end of a page). If the bit field also
+       --  crosses that boundary, then the second page is known to exist, and we
+       --  can safely load or store the Val_2. On the other hand, if the bit
+       --  field is entirely within the first half of the Val_2, then it is
+       --  possible (albeit highly unlikely) that the second page does not
+       --  exist, so we must load or store only the first half of the Val_2.
+       --  Get_Val_2 and Set_Val_2 take care of all this.
+ 
+       function Get_Val_2
+         (Src_Address : Address;
+          Src_Offset : Bit_Offset;
+          Size : Small_Size)
+         return Val_2;
+       --  Get the Val_2, taking care to only load the first half when
+       --  necessary.
+ 
+       procedure Set_Val_2
+         (Dest_Address : Address;
+          Dest_Offset : Bit_Offset;
+          V : Val_2;
+          Size : Small_Size);
+       --  Set the Val_2, taking care to only store the first half when
+       --  necessary.
+ 
+       --  Get_Bitfield and Set_Bitfield are helper functions that get/set small
+       --  bit fields -- the value fits in Val, and the bit field is placed
+       --  starting at some offset within the first half of a Val_2.
+       --  Copy_Bitfield, on the other hand, supports arbitrarily large bit
+       --  fields. All operations require bit offsets to point within the first
+       --  Val pointed to by the address.
+ 
+       function Get_Bitfield
+         (Src : Val_2; Src_Offset : Bit_Offset; Size : Small_Size)
+          return Val;
+       --  Returns the bit field in Src starting at Src_Offset, of the given
+       --  Size. If Size < Small_Size'Last, then high order bits are zero.
+ 
+       function Set_Bitfield
+         (Src_Value : Val;
+          Dest : Val_2;
+          Dest_Offset : Bit_Offset;
+          Size : Small_Size)
+         return Val_2;
+       --  The bit field in Dest starting at Dest_Offset, of the given Size, is
+       --  set to Src_Value. Src_Value must have high order bits (Size and
+       --  above) zero. The result is returned as the function result.
+ 
+       procedure Set_Bitfield
+         (Src_Value : Val;
+          Dest_Address : Address;
+          Dest_Offset : Bit_Offset;
+          Size : Small_Size);
+       --  This version takes the bit address and size of the destination.
+ 
+       procedure Copy_Small_Bitfield
+         (Src_Address  : Address;
+          Src_Offset   : Bit_Offset;
+          Dest_Address : Address;
+          Dest_Offset  : Bit_Offset;
+          Size         : Small_Size);
+       --  Copy_Bitfield in the case where Size <= Val'Size.
+       --  The Address values must be aligned as for Val and Val_2.
+       --  This works for overlapping bit fields.
+ 
+       procedure Copy_Large_Bitfield
+         (Src_Address  : Address;
+          Src_Offset   : Bit_Offset;
+          Dest_Address : Address;
+          Dest_Offset  : Bit_Offset;
+          Size         : Bit_Size);
+       --  Copy_Bitfield in the case where Size > Val'Size.
+       --  The Address values must be aligned as for Val and Val_2.
+       --  This works for overlapping bit fields only if the source
+       --  bit address is greater than or equal to the destination
+       --  bit address, because it copies forward (from lower to higher
+       --  bit addresses).
+ 
+       function Get_Val_2
+         (Src_Address : Address;
+          Src_Offset : Bit_Offset;
+          Size : Small_Size)
+         return Val_2 is
+       begin
+          pragma Assert (Src_Address mod Val'Alignment = 0);
+ 
+          --  Bit field fits in first half; fetch just one Val. On little
+          --  endian, we want that in the low half, but on big endian, we
+          --  want it in the high half.
+ 
+          if Src_Offset + Size <= Val'Size then
+             declare
+                Result : aliased constant Val with
+                  Import, Address => Src_Address;
+             begin
+                return (case Endian is
+                   when Little => Val_2 (Result),
+                   when Big => Shift_Left (Val_2 (Result), Val'Size));
+             end;
+ 
+          --  Bit field crosses into the second half, so it's safe to fetch the
+          --  whole Val_2.
+ 
+          else
+             declare
+                Result : aliased constant Val_2 with
+                  Import, Address => Src_Address;
+             begin
+                return Result;
+             end;
+          end if;
+       end Get_Val_2;
+ 
+       procedure Set_Val_2
+         (Dest_Address : Address;
+          Dest_Offset : Bit_Offset;
+          V : Val_2;
+          Size : Small_Size) is
+       begin
+          pragma Assert (Dest_Address mod Val'Alignment = 0);
+ 
+          --  Comments in Get_Val_2 apply, except we're storing instead of
+          --  fetching.
+ 
+          if Dest_Offset + Size <= Val'Size then
+             declare
+                Dest : aliased Val with Import, Address => Dest_Address;
+             begin
+                Dest := (case Endian is
+                   when Little => Val'Mod (V),
+                   when Big => Val (Shift_Right (V, Val'Size)));
+             end;
+          else
+             declare
+                Dest : aliased Val_2 with Import, Address => Dest_Address;
+             begin
+                Dest := V;
+             end;
+          end if;
+       end Set_Val_2;
+ 
+       function Get_Bitfield
+         (Src : Val_2; Src_Offset : Bit_Offset; Size : Small_Size)
+          return Val
+       is
+          L_Shift_Amount : constant Natural :=
+            (case Endian is
+               when Little => Val_2'Size - (Src_Offset + Size),
+               when Big => Src_Offset);
+          Temp1 : constant Val_2 :=
+            Shift_Left (Src, L_Shift_Amount);
+          Temp2 : constant Val_2 :=
+            Shift_Right (Temp1, Val_2'Size - Size);
+       begin
+          return Val (Temp2);
+       end Get_Bitfield;
+ 
+       function Set_Bitfield
+         (Src_Value : Val;
+          Dest : Val_2;
+          Dest_Offset : Bit_Offset;
+          Size : Small_Size)
+         return Val_2
+       is
+          pragma Assert (Size = Val'Size or else Src_Value < 2**Size);
+          L_Shift_Amount : constant Natural :=
+            (case Endian is
+               when Little => Dest_Offset,
+               when Big => Val_2'Size - (Dest_Offset + Size));
+          Mask : constant Val_2 :=
+            Shift_Left (Shift_Left (1, Size) - 1, L_Shift_Amount);
+          Temp1 : constant Val_2 := Dest and not Mask;
+          Temp2 : constant Val_2 :=
+            Shift_Left (Val_2 (Src_Value), L_Shift_Amount);
+          Result : constant Val_2 := Temp1 or Temp2;
+       begin
+          return Result;
+       end Set_Bitfield;
+ 
+       procedure Set_Bitfield
+         (Src_Value : Val;
+          Dest_Address : Address;
+          Dest_Offset : Bit_Offset;
+          Size : Small_Size)
+       is
+          Old_Dest : constant Val_2 :=
+            Get_Val_2 (Dest_Address, Dest_Offset, Size);
+          New_Dest : constant Val_2 :=
+            Set_Bitfield (Src_Value, Old_Dest, Dest_Offset, Size);
+       begin
+          Set_Val_2 (Dest_Address, Dest_Offset, New_Dest, Size);
+       end Set_Bitfield;
+ 
+       procedure Copy_Small_Bitfield
+         (Src_Address  : Address;
+          Src_Offset   : Bit_Offset;
+          Dest_Address : Address;
+          Dest_Offset  : Bit_Offset;
+          Size         : Small_Size)
+       is
+          Src : constant Val_2 := Get_Val_2 (Src_Address, Src_Offset, Size);
+          V : constant Val := Get_Bitfield (Src, Src_Offset, Size);
+       begin
+          Set_Bitfield (V, Dest_Address, Dest_Offset, Size);
+       end Copy_Small_Bitfield;
+ 
+       --  Copy_Large_Bitfield does the main work. Copying aligned Vals is more
+       --  efficient than fiddling with shifting and whatnot. But we can't align
+       --  both source and destination. We choose to align the destination,
+       --  because that's more efficient -- Set_Bitfield needs to read, then
+       --  modify, then write, whereas Get_Bitfield does not.
+       --
+       --  So the method is:
+       --
+       --      Step 1:
+       --      If the destination is not already aligned, copy Initial_Size
+       --      bits, and increment the bit addresses. Initial_Size is chosen to
+       --      be the smallest size that will cause the destination bit address
+       --      to be aligned (i.e. have zero bit offset from the already-aligned
+       --      Address). Get_Bitfield and Set_Bitfield are used here.
+       --
+       --      Step 2:
+       --      Loop, copying Vals. Get_Bitfield is used to fetch a Val-sized
+       --      bit field, but Set_Bitfield is not needed -- we can set the
+       --      aligned Val with an array indexing.
+       --
+       --      Step 3:
+       --      Copy remaining smaller-than-Val bits, if any
+ 
+       procedure Copy_Large_Bitfield
+         (Src_Address  : Address;
+          Src_Offset   : Bit_Offset;
+          Dest_Address : Address;
+          Dest_Offset  : Bit_Offset;
+          Size         : Bit_Size)
+       is
+          Sz : Bit_Size := Size;
+          S_Addr : Address := Src_Address;
+          S_Off : Bit_Offset := Src_Offset;
+          D_Addr : Address := Dest_Address;
+          D_Off : Bit_Offset := Dest_Offset;
+       begin
+          if S_Addr < D_Addr or else (S_Addr = D_Addr and then S_Off < D_Off)
+          then
+             --  Here, the source bit address is less than the destination bit
+             --  address. Assert that there is no overlap.
+ 
+             declare
+                Temp_Off : constant Bit_Offset'Base := S_Off + Size;
+                After_S_Addr : constant Address :=
+                  S_Addr + Address (Temp_Off / Storage_Unit);
+                After_S_Off : constant Bit_Offset_In_Byte :=
+                  Temp_Off mod Storage_Unit;
+                --  (After_S_Addr, After_S_Off) is the bit address of the bit
+                --  just after the source bit field. Assert that it's less than
+                --  or equal to the destination bit address.
+                Overlap_OK : constant Boolean :=
+                  After_S_Addr < D_Addr
+                    or else
+                  (After_S_Addr = D_Addr and then After_S_Off <= D_Off);
+             begin
+                pragma Assert (Overlap_OK);
+             end;
+          end if;
+ 
+          if D_Off /= 0 then
+             --  Step 1:
+ 
+             declare
+                Initial_Size : constant Small_Size := Val'Size - D_Off;
+                Initial_Val_2 : constant Val_2 :=
+                  Get_Val_2 (S_Addr, S_Off, Initial_Size);
+                Initial_Val : constant Val :=
+                  Get_Bitfield (Initial_Val_2, S_Off, Initial_Size);
+             begin
+                Set_Bitfield
+                  (Initial_Val, D_Addr, D_Off, Initial_Size);
+ 
+                Sz := Sz - Initial_Size;
+                declare
+                   New_S_Off : constant Bit_Offset'Base := S_Off + Initial_Size;
+                begin
+                   if New_S_Off > Bit_Offset'Last then
+                      S_Addr := S_Addr + Val_Bytes;
+                      S_Off := New_S_Off - Small_Size'Last;
+                   else
+                      S_Off := New_S_Off;
+                   end if;
+                end;
+                D_Addr := D_Addr + Val_Bytes;
+                pragma Assert (D_Off + Initial_Size = Val'Size);
+                D_Off := 0;
+             end;
+          end if;
+ 
+          --  Step 2:
+ 
+          declare
+             Dest_Arr : Val_Array (1 .. Sz / Val'Size) with Import,
+               Address => D_Addr;
+          begin
+             for Dest_Comp of Dest_Arr loop
+                declare
+                   pragma Warnings (Off);
+                   pragma Assert (Dest_Comp in Val);
+                   pragma Warnings (On);
+                   pragma Assert (Dest_Comp'Valid);
+                   Src_V_2 : constant Val_2 :=
+                     Get_Val_2 (S_Addr, S_Off, Val'Size);
+                   Full_V : constant Val :=
+                     Get_Bitfield (Src_V_2, S_Off, Val'Size);
+                begin
+                   Dest_Comp := Full_V;
+                   S_Addr := S_Addr + Val_Bytes;
+                   --  S_Off remains the same
+                end;
+             end loop;
+ 
+             Sz := Sz mod Val'Size;
+             if Sz /= 0 then
+                --  Step 3:
+ 
+                declare
+                   Final_Val_2 : constant Val_2 :=
+                     Get_Val_2 (S_Addr, S_Off, Sz);
+                   Final_Val : constant Val :=
+                     Get_Bitfield (Final_Val_2, S_Off, Sz);
+                begin
+                   Set_Bitfield
+                     (Final_Val, D_Addr + Dest_Arr'Length * Val_Bytes, 0, Sz);
+                end;
+             end if;
+          end;
+       end Copy_Large_Bitfield;
+ 
+       procedure Copy_Bitfield
+         (Src_Address  : Address;
+          Src_Offset   : Bit_Offset_In_Byte;
+          Dest_Address : Address;
+          Dest_Offset  : Bit_Offset_In_Byte;
+          Size         : Bit_Size)
+       is
+          --  Align the Address values as for Val and Val_2, and adjust the
+          --  Bit_Offsets accordingly.
+ 
+          Src_Adjust     : constant Address := Src_Address mod Val_Bytes;
+          Al_Src_Address : constant Address := Src_Address - Src_Adjust;
+          Al_Src_Offset  : constant Bit_Offset :=
+            Src_Offset + Bit_Offset (Src_Adjust * Storage_Unit);
+ 
+          Dest_Adjust     : constant Address := Dest_Address mod Val_Bytes;
+          Al_Dest_Address : constant Address := Dest_Address - Dest_Adjust;
+          Al_Dest_Offset  : constant Bit_Offset :=
+            Dest_Offset + Bit_Offset (Dest_Adjust * Storage_Unit);
+ 
+          pragma Assert (Al_Src_Address mod Val'Alignment = 0);
+          pragma Assert (Al_Dest_Address mod Val'Alignment = 0);
+       begin
+          if Size in Small_Size then
+             Copy_Small_Bitfield
+               (Al_Src_Address, Al_Src_Offset,
+                Al_Dest_Address, Al_Dest_Offset,
+                Size);
+          else
+             Copy_Large_Bitfield
+               (Al_Src_Address, Al_Src_Offset,
+                Al_Dest_Address, Al_Dest_Offset,
+                Size);
+          end if;
+       end Copy_Bitfield;
+ 
+    end G;
+ 
+ end System.Bitfield_Utils;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-bituti.ads gcc-10.1.0/gcc/ada/libgnat/s-bituti.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-bituti.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/s-bituti.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,132 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT RUN-TIME COMPONENTS                         --
+ --                                                                          --
+ --                 S Y S T E M . B I T F I E L D _ U T I L S                --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --               Copyright (C) 2019, Free Software Foundation, Inc.         --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ package System.Bitfield_Utils is
+ 
+    --  This package provides a procedure for copying arbitrarily large and
+    --  arbitrarily bit-aligned bit fields.
+ 
+    --  Type Val is used to represent small bit fields. Val_2 represents a
+    --  contiguous pair of Vals. Val_2'Alignment is half of its size in bytes,
+    --  which is likely not the natural alignment. This is done to ensure that
+    --  any bit field that fits in a Val can fit in an aligned Val_2, starting
+    --  somewhere in the first half, and possibly crossing over into the second
+    --  half. This allows us to isolate a Val value by shifting and masking the
+    --  Val_2.
+    --
+    --  Val can be 8, 16, or 32 bits; larger values are more efficient. It can't
+    --  be 64 bits, because we need Val_2 to be a double-wide shiftable type,
+    --  and 128 bits is not supported. Instantiating with an 8-bit Val is useful
+    --  for testing and debugging; 32 bits should be used for production.
+    --
+    --  We use modular types here, not because we want modular arithmetic, but
+    --  so we can do shifting and masking. The actual for Val_2 should have
+    --  pragma Provide_Shift_Operators, so that the Shift_Left and Shift_Right
+    --  intrinsics can be passed in. It is impossible to put that pragma on a
+    --  generic formal, or on a type derived from a generic formal, so they have
+    --  to be passed in.
+    --
+    --  Endian indicates whether we're on little-endian or big-endian machine.
+ 
+    pragma Elaborate_Body;
+ 
+    Little : constant Bit_Order := Low_Order_First;
+    Big : constant Bit_Order := High_Order_First;
+ 
+    generic
+       type Val is mod <>;
+       type Val_2 is mod <>;
+ 
+      with function Shift_Left
+        (Value  : Val_2;
+         Amount : Natural) return Val_2 is <>;
+ 
+      with function Shift_Right
+        (Value  : Val_2;
+         Amount : Natural) return Val_2 is <>;
+ 
+       Endian : Bit_Order := Default_Bit_Order;
+ 
+    package G is
+       --  Assert that Val has one of the allowed sizes, and that Val_2 is twice
+       --  that.
+ 
+       pragma Assert (Val'Size in 8 | 16 | 32);
+       pragma Assert (Val_2'Size = Val'Size * 2);
+ 
+       --  Assert that both are aligned the same, to the size in bytes of Val
+       --  (not Val_2).
+ 
+       pragma Assert (Val'Alignment = Val'Size / Storage_Unit);
+       pragma Assert (Val_2'Alignment = Val'Alignment);
+ 
+       type Val_Array is array (Positive range <>) of Val;
+ 
+       --  It might make more sense to have:
+       --    subtype Val is Val_2 range 0 .. 2**Val'Size - 1;
+       --  But then GNAT gets the component size of Val_Array wrong.
+ 
+       pragma Assert (Val_Array'Alignment = Val'Alignment);
+       pragma Assert (Val_Array'Component_Size = Val'Size);
+ 
+       subtype Bit_Size is Natural; -- Size in bits of a bit field
+       subtype Small_Size is Bit_Size range 0 .. Val'Size;
+       --  Size of a small one
+       subtype Bit_Offset is Small_Size range 0 .. Val'Size - 1;
+       --  Starting offset
+       subtype Bit_Offset_In_Byte is Bit_Offset range 0 .. Storage_Unit - 1;
+ 
+       procedure Copy_Bitfield
+         (Src_Address  : Address;
+          Src_Offset   : Bit_Offset_In_Byte;
+          Dest_Address : Address;
+          Dest_Offset  : Bit_Offset_In_Byte;
+          Size         : Bit_Size);
+       --  An Address and a Bit_Offset together form a "bit address". This
+       --  copies the source bit field to the destination. Size is the size in
+       --  bits of the bit field. The bit fields can be arbitrarily large, but
+       --  the starting offsets must be within the first byte that the Addresses
+       --  point to. The Address values need not be aligned.
+       --
+       --  For example, a slice assignment of a packed bit field:
+       --
+       --     D (D_First .. D_Last) := S (S_First .. S_Last);
+       --
+       --  can be implemented using:
+       --
+       --     Copy_Bitfield
+       --       (S (S_First)'Address, S (S_First)'Bit,
+       --        D (D_First)'Address, D (D_First)'Bit,
+       --        Size);
+ 
+    end G;
+ 
+ end System.Bitfield_Utils;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-genbig.adb gcc-10.1.0/gcc/ada/libgnat/s-genbig.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-genbig.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/s-genbig.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,1133 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --               S Y S T E M . G E N E R I C _ B I G N U M S                --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --          Copyright (C) 2012-2019, Free Software Foundation, Inc.         --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  This package provides arbitrary precision signed integer arithmetic.
+ 
+ with System;                  use System;
+ with System.Secondary_Stack;  use System.Secondary_Stack;
+ with System.Storage_Elements; use System.Storage_Elements;
+ 
+ package body System.Generic_Bignums is
+ 
+    use Interfaces;
+    --  So that operations on Unsigned_32/Unsigned_64 are available
+ 
+    type DD is mod Base ** 2;
+    --  Double length digit used for intermediate computations
+ 
+    function MSD (X : DD) return SD is (SD (X / Base));
+    function LSD (X : DD) return SD is (SD (X mod Base));
+    --  Most significant and least significant digit of double digit value
+ 
+    function "&" (X, Y : SD) return DD is (DD (X) * Base + DD (Y));
+    --  Compose double digit value from two single digit values
+ 
+    subtype LLI is Long_Long_Integer;
+ 
+    One_Data : constant Digit_Vector (1 .. 1) := (1 => 1);
+    --  Constant one
+ 
+    Zero_Data : constant Digit_Vector (1 .. 0) := (1 .. 0 => 0);
+    --  Constant zero
+ 
+    -----------------------
+    -- Local Subprograms --
+    -----------------------
+ 
+    function Add
+      (X, Y  : Digit_Vector;
+       X_Neg : Boolean;
+       Y_Neg : Boolean) return Bignum
+    with
+      Pre => X'First = 1 and then Y'First = 1;
+    --  This procedure adds two signed numbers returning the Sum, it is used
+    --  for both addition and subtraction. The value computed is X + Y, with
+    --  X_Neg and Y_Neg giving the signs of the operands.
+ 
+    function Allocate_Bignum (Len : Length) return Bignum with
+      Post => Allocate_Bignum'Result.Len = Len;
+    --  Allocate Bignum value of indicated length on secondary stack. On return
+    --  the Neg and D fields are left uninitialized.
+ 
+    type Compare_Result is (LT, EQ, GT);
+    --  Indicates result of comparison in following call
+ 
+    function Compare
+      (X, Y         : Digit_Vector;
+       X_Neg, Y_Neg : Boolean) return Compare_Result
+    with
+      Pre => X'First = 1 and then Y'First = 1;
+    --  Compare (X with sign X_Neg) with (Y with sign Y_Neg), and return the
+    --  result of the signed comparison.
+ 
+    procedure Div_Rem
+      (X, Y              : Bignum;
+       Quotient          : out Bignum;
+       Remainder         : out Bignum;
+       Discard_Quotient  : Boolean := False;
+       Discard_Remainder : Boolean := False);
+    --  Returns the Quotient and Remainder from dividing abs (X) by abs (Y). The
+    --  values of X and Y are not modified. If Discard_Quotient is True, then
+    --  Quotient is undefined on return, and if Discard_Remainder is True, then
+    --  Remainder is undefined on return. Service routine for Big_Div/Rem/Mod.
+ 
+    procedure Free_Bignum (X : Bignum) is null;
+    --  Called to free a Bignum value used in intermediate computations. In
+    --  this implementation using the secondary stack, it does nothing at all,
+    --  because we rely on Mark/Release, but it may be of use for some
+    --  alternative implementation.
+ 
+    function Normalize
+      (X   : Digit_Vector;
+       Neg : Boolean := False) return Bignum;
+    --  Given a digit vector and sign, allocate and construct a Bignum value.
+    --  Note that X may have leading zeroes which must be removed, and if the
+    --  result is zero, the sign is forced positive.
+ 
+    ---------
+    -- Add --
+    ---------
+ 
+    function Add
+      (X, Y  : Digit_Vector;
+       X_Neg : Boolean;
+       Y_Neg : Boolean) return Bignum
+    is
+    begin
+       --  If signs are the same, we are doing an addition, it is convenient to
+       --  ensure that the first operand is the longer of the two.
+ 
+       if X_Neg = Y_Neg then
+          if X'Last < Y'Last then
+             return Add (X => Y, Y => X, X_Neg => Y_Neg, Y_Neg => X_Neg);
+ 
+          --  Here signs are the same, and the first operand is the longer
+ 
+          else
+             pragma Assert (X_Neg = Y_Neg and then X'Last >= Y'Last);
+ 
+             --  Do addition, putting result in Sum (allowing for carry)
+ 
+             declare
+                Sum : Digit_Vector (0 .. X'Last);
+                RD  : DD;
+ 
+             begin
+                RD := 0;
+                for J in reverse 1 .. X'Last loop
+                   RD := RD + DD (X (J));
+ 
+                   if J >= 1 + (X'Last - Y'Last) then
+                      RD := RD + DD (Y (J - (X'Last - Y'Last)));
+                   end if;
+ 
+                   Sum (J) := LSD (RD);
+                   RD := RD / Base;
+                end loop;
+ 
+                Sum (0) := SD (RD);
+                return Normalize (Sum, X_Neg);
+             end;
+          end if;
+ 
+       --  Signs are different so really this is a subtraction, we want to make
+       --  sure that the largest magnitude operand is the first one, and then
+       --  the result will have the sign of the first operand.
+ 
+       else
+          declare
+             CR : constant Compare_Result := Compare (X, Y, False, False);
+ 
+          begin
+             if CR = EQ then
+                return Normalize (Zero_Data);
+ 
+             elsif CR = LT then
+                return Add (X => Y, Y => X, X_Neg => Y_Neg, Y_Neg => X_Neg);
+ 
+             else
+                pragma Assert (X_Neg /= Y_Neg and then CR = GT);
+ 
+                --  Do subtraction, putting result in Diff
+ 
+                declare
+                   Diff : Digit_Vector (1 .. X'Length);
+                   RD   : DD;
+ 
+                begin
+                   RD := 0;
+                   for J in reverse 1 .. X'Last loop
+                      RD := RD + DD (X (J));
+ 
+                      if J >= 1 + (X'Last - Y'Last) then
+                         RD := RD - DD (Y (J - (X'Last - Y'Last)));
+                      end if;
+ 
+                      Diff (J) := LSD (RD);
+                      RD := (if RD < Base then 0 else -1);
+                   end loop;
+ 
+                   return Normalize (Diff, X_Neg);
+                end;
+             end if;
+          end;
+       end if;
+    end Add;
+ 
+    ---------------------
+    -- Allocate_Bignum --
+    ---------------------
+ 
+    function Allocate_Bignum (Len : Length) return Bignum is
+       Addr : Address;
+ 
+    begin
+       --  Allocation on the heap
+ 
+       if not Use_Secondary_Stack then
+          declare
+             B : Bignum;
+          begin
+             B := new Bignum_Data'(Len, False, (others => 0));
+             return B;
+          end;
+ 
+       --  Allocation on the secondary stack
+ 
+       else
+          --  Note: The approach used here is designed to avoid strict aliasing
+          --  warnings that appeared previously using unchecked conversion.
+ 
+          SS_Allocate (Addr, Storage_Offset (4 + 4 * Len));
+ 
+          declare
+             B : Bignum;
+             for B'Address use Addr'Address;
+             pragma Import (Ada, B);
+ 
+             BD : Bignum_Data (Len);
+             for BD'Address use Addr;
+             pragma Import (Ada, BD);
+ 
+             --  Expose a writable view of discriminant BD.Len so that we can
+             --  initialize it. We need to use the exact layout of the record
+             --  to ensure that the Length field has 24 bits as expected.
+ 
+             type Bignum_Data_Header is record
+                Len : Length;
+                Neg : Boolean;
+             end record;
+ 
+             for Bignum_Data_Header use record
+                Len at 0 range 0 .. 23;
+                Neg at 3 range 0 .. 7;
+             end record;
+ 
+             BDH : Bignum_Data_Header;
+             for BDH'Address use BD'Address;
+             pragma Import (Ada, BDH);
+ 
+             pragma Assert (BDH.Len'Size = BD.Len'Size);
+ 
+          begin
+             BDH.Len := Len;
+             return B;
+          end;
+       end if;
+    end Allocate_Bignum;
+ 
+    -------------
+    -- Big_Abs --
+    -------------
+ 
+    function Big_Abs (X : Bignum) return Bignum is
+    begin
+       return Normalize (X.D);
+    end Big_Abs;
+ 
+    -------------
+    -- Big_Add --
+    -------------
+ 
+    function Big_Add  (X, Y : Bignum) return Bignum is
+    begin
+       return Add (X.D, Y.D, X.Neg, Y.Neg);
+    end Big_Add;
+ 
+    -------------
+    -- Big_Div --
+    -------------
+ 
+    --  This table is excerpted from RM 4.5.5(28-30) and shows how the result
+    --  varies with the signs of the operands.
+ 
+    --   A      B   A/B      A     B    A/B
+    --
+    --   10     5    2      -10    5    -2
+    --   11     5    2      -11    5    -2
+    --   12     5    2      -12    5    -2
+    --   13     5    2      -13    5    -2
+    --   14     5    2      -14    5    -2
+    --
+    --   A      B   A/B      A     B    A/B
+    --
+    --   10    -5   -2      -10   -5     2
+    --   11    -5   -2      -11   -5     2
+    --   12    -5   -2      -12   -5     2
+    --   13    -5   -2      -13   -5     2
+    --   14    -5   -2      -14   -5     2
+ 
+    function Big_Div  (X, Y : Bignum) return Bignum is
+       Q, R : Bignum;
+    begin
+       Div_Rem (X, Y, Q, R, Discard_Remainder => True);
+       Q.Neg := Q.Len > 0 and then (X.Neg xor Y.Neg);
+       return Q;
+    end Big_Div;
+ 
+    -------------
+    -- Big_Exp --
+    -------------
+ 
+    function Big_Exp  (X, Y : Bignum) return Bignum is
+ 
+       function "**" (X : Bignum; Y : SD) return Bignum;
+       --  Internal routine where we know right operand is one word
+ 
+       ----------
+       -- "**" --
+       ----------
+ 
+       function "**" (X : Bignum; Y : SD) return Bignum is
+       begin
+          case Y is
+ 
+             --  X ** 0 is 1
+ 
+             when 0 =>
+                return Normalize (One_Data);
+ 
+             --  X ** 1 is X
+ 
+             when 1 =>
+                return Normalize (X.D);
+ 
+             --  X ** 2 is X * X
+ 
+             when 2 =>
+                return Big_Mul (X, X);
+ 
+             --  For X greater than 2, use the recursion
+ 
+             --  X even, X ** Y = (X ** (Y/2)) ** 2;
+             --  X odd,  X ** Y = (X ** (Y/2)) ** 2 * X;
+ 
+             when others =>
+                declare
+                   XY2  : constant Bignum := X ** (Y / 2);
+                   XY2S : constant Bignum := Big_Mul (XY2, XY2);
+                   Res  : Bignum;
+ 
+                begin
+                   Free_Bignum (XY2);
+ 
+                   --  Raise storage error if intermediate value is getting too
+                   --  large, which we arbitrarily define as 200 words for now.
+ 
+                   if XY2S.Len > 200 then
+                      Free_Bignum (XY2S);
+                      raise Storage_Error with
+                        "exponentiation result is too large";
+                   end if;
+ 
+                   --  Otherwise take care of even/odd cases
+ 
+                   if (Y and 1) = 0 then
+                      return XY2S;
+ 
+                   else
+                      Res := Big_Mul (XY2S, X);
+                      Free_Bignum (XY2S);
+                      return Res;
+                   end if;
+                end;
+          end case;
+       end "**";
+ 
+    --  Start of processing for Big_Exp
+ 
+    begin
+       --  Error if right operand negative
+ 
+       if Y.Neg then
+          raise Constraint_Error with "exponentiation to negative power";
+ 
+       --  X ** 0 is always 1 (including 0 ** 0, so do this test first)
+ 
+       elsif Y.Len = 0 then
+          return Normalize (One_Data);
+ 
+       --  0 ** X is always 0 (for X non-zero)
+ 
+       elsif X.Len = 0 then
+          return Normalize (Zero_Data);
+ 
+       --  (+1) ** Y = 1
+       --  (-1) ** Y = +/-1 depending on whether Y is even or odd
+ 
+       elsif X.Len = 1 and then X.D (1) = 1 then
+          return Normalize
+            (X.D, Neg => X.Neg and then ((Y.D (Y.Len) and 1) = 1));
+ 
+       --  If the absolute value of the base is greater than 1, then the
+       --  exponent must not be bigger than one word, otherwise the result
+       --  is ludicrously large, and we just signal Storage_Error right away.
+ 
+       elsif Y.Len > 1 then
+          raise Storage_Error with "exponentiation result is too large";
+ 
+       --  Special case (+/-)2 ** K, where K is 1 .. 31 using a shift
+ 
+       elsif X.Len = 1 and then X.D (1) = 2 and then Y.D (1) < 32 then
+          declare
+             D : constant Digit_Vector (1 .. 1) :=
+                   (1 => Shift_Left (SD'(1), Natural (Y.D (1))));
+          begin
+             return Normalize (D, X.Neg);
+          end;
+ 
+       --  Remaining cases have right operand of one word
+ 
+       else
+          return X ** Y.D (1);
+       end if;
+    end Big_Exp;
+ 
+    ------------
+    -- Big_EQ --
+    ------------
+ 
+    function Big_EQ (X, Y : Bignum) return Boolean is
+    begin
+       return Compare (X.D, Y.D, X.Neg, Y.Neg) = EQ;
+    end Big_EQ;
+ 
+    ------------
+    -- Big_GE --
+    ------------
+ 
+    function Big_GE (X, Y : Bignum) return Boolean is
+    begin
+       return Compare (X.D, Y.D, X.Neg, Y.Neg) /= LT;
+    end Big_GE;
+ 
+    ------------
+    -- Big_GT --
+    ------------
+ 
+    function Big_GT (X, Y : Bignum) return Boolean is
+    begin
+       return Compare (X.D, Y.D, X.Neg, Y.Neg) = GT;
+    end Big_GT;
+ 
+    ------------
+    -- Big_LE --
+    ------------
+ 
+    function Big_LE (X, Y : Bignum) return Boolean is
+    begin
+       return Compare (X.D, Y.D, X.Neg, Y.Neg) /= GT;
+    end Big_LE;
+ 
+    ------------
+    -- Big_LT --
+    ------------
+ 
+    function Big_LT (X, Y : Bignum) return Boolean is
+    begin
+       return Compare (X.D, Y.D, X.Neg, Y.Neg) = LT;
+    end Big_LT;
+ 
+    -------------
+    -- Big_Mod --
+    -------------
+ 
+    --  This table is excerpted from RM 4.5.5(28-30) and shows how the result
+    --  of Rem and Mod vary with the signs of the operands.
+ 
+    --   A      B    A mod B  A rem B     A     B    A mod B  A rem B
+ 
+    --   10     5       0        0       -10    5       0        0
+    --   11     5       1        1       -11    5       4       -1
+    --   12     5       2        2       -12    5       3       -2
+    --   13     5       3        3       -13    5       2       -3
+    --   14     5       4        4       -14    5       1       -4
+ 
+    --   A      B    A mod B  A rem B     A     B    A mod B  A rem B
+ 
+    --   10    -5       0        0       -10   -5       0        0
+    --   11    -5      -4        1       -11   -5      -1       -1
+    --   12    -5      -3        2       -12   -5      -2       -2
+    --   13    -5      -2        3       -13   -5      -3       -3
+    --   14    -5      -1        4       -14   -5      -4       -4
+ 
+    function Big_Mod (X, Y : Bignum) return Bignum is
+       Q, R : Bignum;
+ 
+    begin
+       --  If signs are same, result is same as Rem
+ 
+       if X.Neg = Y.Neg then
+          return Big_Rem (X, Y);
+ 
+       --  Case where Mod is different
+ 
+       else
+          --  Do division
+ 
+          Div_Rem (X, Y, Q, R, Discard_Quotient => True);
+ 
+          --  Zero result is unchanged
+ 
+          if R.Len = 0 then
+             return R;
+ 
+          --  Otherwise adjust result
+ 
+          else
+             declare
+                T1 : constant Bignum := Big_Sub (Y, R);
+             begin
+                T1.Neg := Y.Neg;
+                Free_Bignum (R);
+                return T1;
+             end;
+          end if;
+       end if;
+    end Big_Mod;
+ 
+    -------------
+    -- Big_Mul --
+    -------------
+ 
+    function Big_Mul (X, Y : Bignum) return Bignum is
+       Result : Digit_Vector (1 .. X.Len + Y.Len) := (others => 0);
+       --  Accumulate result (max length of result is sum of operand lengths)
+ 
+       L : Length;
+       --  Current result digit
+ 
+       D : DD;
+       --  Result digit
+ 
+    begin
+       for J in 1 .. X.Len loop
+          for K in 1 .. Y.Len loop
+             L := Result'Last - (X.Len - J) - (Y.Len - K);
+             D := DD (X.D (J)) * DD (Y.D (K)) + DD (Result (L));
+             Result (L) := LSD (D);
+             D := D / Base;
+ 
+             --  D is carry which must be propagated
+ 
+             while D /= 0 and then L >= 1 loop
+                L := L - 1;
+                D := D + DD (Result (L));
+                Result (L) := LSD (D);
+                D := D / Base;
+             end loop;
+ 
+             --  Must not have a carry trying to extend max length
+ 
+             pragma Assert (D = 0);
+          end loop;
+       end loop;
+ 
+       --  Return result
+ 
+       return Normalize (Result, X.Neg xor Y.Neg);
+    end Big_Mul;
+ 
+    ------------
+    -- Big_NE --
+    ------------
+ 
+    function Big_NE (X, Y : Bignum) return Boolean is
+    begin
+       return Compare (X.D, Y.D, X.Neg, Y.Neg) /= EQ;
+    end Big_NE;
+ 
+    -------------
+    -- Big_Neg --
+    -------------
+ 
+    function Big_Neg (X : Bignum) return Bignum is
+    begin
+       return Normalize (X.D, not X.Neg);
+    end Big_Neg;
+ 
+    -------------
+    -- Big_Rem --
+    -------------
+ 
+    --  This table is excerpted from RM 4.5.5(28-30) and shows how the result
+    --  varies with the signs of the operands.
+ 
+    --   A      B   A rem B   A     B   A rem B
+ 
+    --   10     5      0     -10    5      0
+    --   11     5      1     -11    5     -1
+    --   12     5      2     -12    5     -2
+    --   13     5      3     -13    5     -3
+    --   14     5      4     -14    5     -4
+ 
+    --   A      B  A rem B    A     B   A rem B
+ 
+    --   10    -5     0      -10   -5      0
+    --   11    -5     1      -11   -5     -1
+    --   12    -5     2      -12   -5     -2
+    --   13    -5     3      -13   -5     -3
+    --   14    -5     4      -14   -5     -4
+ 
+    function Big_Rem (X, Y : Bignum) return Bignum is
+       Q, R : Bignum;
+    begin
+       Div_Rem (X, Y, Q, R, Discard_Quotient => True);
+       R.Neg := R.Len > 0 and then X.Neg;
+       return R;
+    end Big_Rem;
+ 
+    -------------
+    -- Big_Sub --
+    -------------
+ 
+    function Big_Sub (X, Y : Bignum) return Bignum is
+    begin
+       --  If right operand zero, return left operand (avoiding sharing)
+ 
+       if Y.Len = 0 then
+          return Normalize (X.D, X.Neg);
+ 
+       --  Otherwise add negative of right operand
+ 
+       else
+          return Add (X.D, Y.D, X.Neg, not Y.Neg);
+       end if;
+    end Big_Sub;
+ 
+    -------------
+    -- Compare --
+    -------------
+ 
+    function Compare
+      (X, Y         : Digit_Vector;
+       X_Neg, Y_Neg : Boolean) return Compare_Result
+    is
+    begin
+       --  Signs are different, that's decisive, since 0 is always plus
+ 
+       if X_Neg /= Y_Neg then
+          return (if X_Neg then LT else GT);
+ 
+       --  Lengths are different, that's decisive since no leading zeroes
+ 
+       elsif X'Last /= Y'Last then
+          return (if (X'Last > Y'Last) xor X_Neg then GT else LT);
+ 
+       --  Need to compare data
+ 
+       else
+          for J in X'Range loop
+             if X (J) /= Y (J) then
+                return (if (X (J) > Y (J)) xor X_Neg then GT else LT);
+             end if;
+          end loop;
+ 
+          return EQ;
+       end if;
+    end Compare;
+ 
+    -------------
+    -- Div_Rem --
+    -------------
+ 
+    procedure Div_Rem
+      (X, Y              : Bignum;
+       Quotient          : out Bignum;
+       Remainder         : out Bignum;
+       Discard_Quotient  : Boolean := False;
+       Discard_Remainder : Boolean := False)
+    is
+    begin
+       --  Error if division by zero
+ 
+       if Y.Len = 0 then
+          raise Constraint_Error with "division by zero";
+       end if;
+ 
+       --  Handle simple cases with special tests
+ 
+       --  If X < Y then quotient is zero and remainder is X
+ 
+       if Compare (X.D, Y.D, False, False) = LT then
+          Remainder := Normalize (X.D);
+          Quotient  := Normalize (Zero_Data);
+          return;
+ 
+       --  If both X and Y are less than 2**63-1, we can use Long_Long_Integer
+       --  arithmetic. Note it is good not to do an accurate range check against
+       --  Long_Long_Integer since -2**63 / -1 overflows.
+ 
+       elsif (X.Len <= 1 or else (X.Len = 2 and then X.D (1) < 2**31))
+               and then
+             (Y.Len <= 1 or else (Y.Len = 2 and then Y.D (1) < 2**31))
+       then
+          declare
+             A : constant LLI := abs (From_Bignum (X));
+             B : constant LLI := abs (From_Bignum (Y));
+          begin
+             Quotient  := To_Bignum (A / B);
+             Remainder := To_Bignum (A rem B);
+             return;
+          end;
+ 
+       --  Easy case if divisor is one digit
+ 
+       elsif Y.Len = 1 then
+          declare
+             ND  : DD;
+             Div : constant DD := DD (Y.D (1));
+ 
+             Result : Digit_Vector (1 .. X.Len);
+             Remdr  : Digit_Vector (1 .. 1);
+ 
+          begin
+             ND := 0;
+             for J in 1 .. X.Len loop
+                ND := Base * ND + DD (X.D (J));
+                Result (J) := SD (ND / Div);
+                ND := ND rem Div;
+             end loop;
+ 
+             Quotient  := Normalize (Result);
+             Remdr (1) := SD (ND);
+             Remainder := Normalize (Remdr);
+             return;
+          end;
+       end if;
+ 
+       --  The complex full multi-precision case. We will employ algorithm
+       --  D defined in the section "The Classical Algorithms" (sec. 4.3.1)
+       --  of Donald Knuth's "The Art of Computer Programming", Vol. 2, 2nd
+       --  edition. The terminology is adjusted for this section to match that
+       --  reference.
+ 
+       --  We are dividing X.Len digits of X (called u here) by Y.Len digits
+       --  of Y (called v here), developing the quotient and remainder. The
+       --  numbers are represented using Base, which was chosen so that we have
+       --  the operations of multiplying to single digits (SD) to form a double
+       --  digit (DD), and dividing a double digit (DD) by a single digit (SD)
+       --  to give a single digit quotient and a single digit remainder.
+ 
+       --  Algorithm D from Knuth
+ 
+       --  Comments here with square brackets are directly from Knuth
+ 
+       Algorithm_D : declare
+ 
+          --  The following lower case variables correspond exactly to the
+          --  terminology used in algorithm D.
+ 
+          m : constant Length := X.Len - Y.Len;
+          n : constant Length := Y.Len;
+          b : constant DD     := Base;
+ 
+          u : Digit_Vector (0 .. m + n);
+          v : Digit_Vector (1 .. n);
+          q : Digit_Vector (0 .. m);
+          r : Digit_Vector (1 .. n);
+ 
+          u0 : SD renames u (0);
+          v1 : SD renames v (1);
+          v2 : SD renames v (2);
+ 
+          d    : DD;
+          j    : Length;
+          qhat : DD;
+          rhat : DD;
+          temp : DD;
+ 
+       begin
+          --  Initialize data of left and right operands
+ 
+          for J in 1 .. m + n loop
+             u (J) := X.D (J);
+          end loop;
+ 
+          for J in 1 .. n loop
+             v (J) := Y.D (J);
+          end loop;
+ 
+          --  [Division of nonnegative integers.] Given nonnegative integers u
+          --  = (ul,u2..um+n) and v = (v1,v2..vn), where v1 /= 0 and n > 1, we
+          --  form the quotient u / v = (q0,ql..qm) and the remainder u mod v =
+          --  (r1,r2..rn).
+ 
+          pragma Assert (v1 /= 0);
+          pragma Assert (n > 1);
+ 
+          --  Dl. [Normalize.] Set d = b/(vl + 1). Then set (u0,u1,u2..um+n)
+          --  equal to (u1,u2..um+n) times d, and set (v1,v2..vn) equal to
+          --  (v1,v2..vn) times d. Note the introduction of a new digit position
+          --  u0 at the left of u1; if d = 1 all we need to do in this step is
+          --  to set u0 = 0.
+ 
+          d := b / (DD (v1) + 1);
+ 
+          if d = 1 then
+             u0 := 0;
+ 
+          else
+             declare
+                Carry : DD;
+                Tmp   : DD;
+ 
+             begin
+                --  Multiply Dividend (u) by d
+ 
+                Carry := 0;
+                for J in reverse 1 .. m + n loop
+                   Tmp   := DD (u (J)) * d + Carry;
+                   u (J) := LSD (Tmp);
+                   Carry := Tmp / Base;
+                end loop;
+ 
+                u0 := SD (Carry);
+ 
+                --  Multiply Divisor (v) by d
+ 
+                Carry := 0;
+                for J in reverse 1 .. n loop
+                   Tmp   := DD (v (J)) * d + Carry;
+                   v (J) := LSD (Tmp);
+                   Carry := Tmp / Base;
+                end loop;
+ 
+                pragma Assert (Carry = 0);
+             end;
+          end if;
+ 
+          --  D2. [Initialize j.] Set j = 0. The loop on j, steps D2 through D7,
+          --  will be essentially a division of (uj, uj+1..uj+n) by (v1,v2..vn)
+          --  to get a single quotient digit qj.
+ 
+          j := 0;
+ 
+          --  Loop through digits
+ 
+          loop
+             --  Note: In the original printing, step D3 was as follows:
+ 
+             --  D3. [Calculate qhat.] If uj = v1, set qhat to b-l; otherwise
+             --  set qhat to (uj,uj+1)/v1. Now test if v2 * qhat is greater than
+             --  (uj*b + uj+1 - qhat*v1)*b + uj+2. If so, decrease qhat by 1 and
+             --  repeat this test
+ 
+             --  This had a bug not discovered till 1995, see Vol 2 errata:
+             --  http://www-cs-faculty.stanford.edu/~uno/err2-2e.ps.gz. Under
+             --  rare circumstances the expression in the test could overflow.
+             --  This version was further corrected in 2005, see Vol 2 errata:
+             --  http://www-cs-faculty.stanford.edu/~uno/all2-pre.ps.gz.
+             --  The code below is the fixed version of this step.
+ 
+             --  D3. [Calculate qhat.] Set qhat to (uj,uj+1)/v1 and rhat to
+             --  to (uj,uj+1) mod v1.
+ 
+             temp := u (j) & u (j + 1);
+             qhat := temp / DD (v1);
+             rhat := temp mod DD (v1);
+ 
+             --  D3 (continued). Now test if qhat >= b or v2*qhat > (rhat,uj+2):
+             --  if so, decrease qhat by 1, increase rhat by v1, and repeat this
+             --  test if rhat < b. [The test on v2 determines at high speed
+             --  most of the cases in which the trial value qhat is one too
+             --  large, and eliminates all cases where qhat is two too large.]
+ 
+             while qhat >= b
+               or else DD (v2) * qhat > LSD (rhat) & u (j + 2)
+             loop
+                qhat := qhat - 1;
+                rhat := rhat + DD (v1);
+                exit when rhat >= b;
+             end loop;
+ 
+             --  D4. [Multiply and subtract.] Replace (uj,uj+1..uj+n) by
+             --  (uj,uj+1..uj+n) minus qhat times (v1,v2..vn). This step
+             --  consists of a simple multiplication by a one-place number,
+             --  combined with a subtraction.
+ 
+             --  The digits (uj,uj+1..uj+n) are always kept positive; if the
+             --  result of this step is actually negative then (uj,uj+1..uj+n)
+             --  is left as the true value plus b**(n+1), i.e. as the b's
+             --  complement of the true value, and a "borrow" to the left is
+             --  remembered.
+ 
+             declare
+                Borrow : SD;
+                Carry  : DD;
+                Temp   : DD;
+ 
+                Negative : Boolean;
+                --  Records if subtraction causes a negative result, requiring
+                --  an add back (case where qhat turned out to be 1 too large).
+ 
+             begin
+                Borrow := 0;
+                for K in reverse 1 .. n loop
+                   Temp := qhat * DD (v (K)) + DD (Borrow);
+                   Borrow := MSD (Temp);
+ 
+                   if LSD (Temp) > u (j + K) then
+                      Borrow := Borrow + 1;
+                   end if;
+ 
+                   u (j + K) := u (j + K) - LSD (Temp);
+                end loop;
+ 
+                Negative := u (j) < Borrow;
+                u (j) := u (j) - Borrow;
+ 
+                --  D5. [Test remainder.] Set qj = qhat. If the result of step
+                --  D4 was negative, we will do the add back step (step D6).
+ 
+                q (j) := LSD (qhat);
+ 
+                if Negative then
+ 
+                   --  D6. [Add back.] Decrease qj by 1, and add (0,v1,v2..vn)
+                   --  to (uj,uj+1,uj+2..uj+n). (A carry will occur to the left
+                   --  of uj, and it is be ignored since it cancels with the
+                   --  borrow that occurred in D4.)
+ 
+                   q (j) := q (j) - 1;
+ 
+                   Carry := 0;
+                   for K in reverse 1 .. n loop
+                      Temp := DD (v (K)) + DD (u (j + K)) + Carry;
+                      u (j + K) := LSD (Temp);
+                      Carry := Temp / Base;
+                   end loop;
+ 
+                   u (j) := u (j) + SD (Carry);
+                end if;
+             end;
+ 
+             --  D7. [Loop on j.] Increase j by one. Now if j <= m, go back to
+             --  D3 (the start of the loop on j).
+ 
+             j := j + 1;
+             exit when not (j <= m);
+          end loop;
+ 
+          --  D8. [Unnormalize.] Now (qo,ql..qm) is the desired quotient, and
+          --  the desired remainder may be obtained by dividing (um+1..um+n)
+          --  by d.
+ 
+          if not Discard_Quotient then
+             Quotient := Normalize (q);
+          end if;
+ 
+          if not Discard_Remainder then
+             declare
+                Remdr : DD;
+ 
+             begin
+                Remdr := 0;
+                for K in 1 .. n loop
+                   Remdr := Base * Remdr + DD (u (m + K));
+                   r (K) := SD (Remdr / d);
+                   Remdr := Remdr rem d;
+                end loop;
+ 
+                pragma Assert (Remdr = 0);
+             end;
+ 
+             Remainder := Normalize (r);
+          end if;
+       end Algorithm_D;
+    end Div_Rem;
+ 
+    -----------------
+    -- From_Bignum --
+    -----------------
+ 
+    function From_Bignum (X : Bignum) return Long_Long_Integer is
+    begin
+       if X.Len = 0 then
+          return 0;
+ 
+       elsif X.Len = 1 then
+          return (if X.Neg then -LLI (X.D (1)) else LLI (X.D (1)));
+ 
+       elsif X.Len = 2 then
+          declare
+             Mag : constant DD := X.D (1) & X.D (2);
+          begin
+             if X.Neg and then Mag <= 2 ** 63 then
+                return -LLI (Mag);
+             elsif Mag < 2 ** 63 then
+                return LLI (Mag);
+             end if;
+          end;
+       end if;
+ 
+       raise Constraint_Error with "expression value out of range";
+    end From_Bignum;
+ 
+    -------------------------
+    -- Bignum_In_LLI_Range --
+    -------------------------
+ 
+    function Bignum_In_LLI_Range (X : Bignum) return Boolean is
+    begin
+       --  If length is 0 or 1, definitely fits
+ 
+       if X.Len <= 1 then
+          return True;
+ 
+       --  If length is greater than 2, definitely does not fit
+ 
+       elsif X.Len > 2 then
+          return False;
+ 
+       --  Length is 2, more tests needed
+ 
+       else
+          declare
+             Mag : constant DD := X.D (1) & X.D (2);
+          begin
+             return Mag < 2 ** 63 or else (X.Neg and then Mag = 2 ** 63);
+          end;
+       end if;
+    end Bignum_In_LLI_Range;
+ 
+    ---------------
+    -- Normalize --
+    ---------------
+ 
+    function Normalize
+      (X   : Digit_Vector;
+       Neg : Boolean := False) return Bignum
+    is
+       B : Bignum;
+       J : Length;
+ 
+    begin
+       J := X'First;
+       while J <= X'Last and then X (J) = 0 loop
+          J := J + 1;
+       end loop;
+ 
+       B := Allocate_Bignum (X'Last - J + 1);
+       B.Neg := B.Len > 0 and then Neg;
+       B.D := X (J .. X'Last);
+       return B;
+    end Normalize;
+ 
+    ---------------
+    -- To_Bignum --
+    ---------------
+ 
+    function To_Bignum (X : Long_Long_Integer) return Bignum is
+       R : Bignum;
+ 
+    begin
+       if X = 0 then
+          R := Allocate_Bignum (0);
+ 
+       --  One word result
+ 
+       elsif X in -(2 ** 32 - 1) .. +(2 ** 32 - 1) then
+          R := Allocate_Bignum (1);
+          R.D (1) := SD (abs (X));
+ 
+       --  Largest negative number annoyance
+ 
+       elsif X = Long_Long_Integer'First then
+          R := Allocate_Bignum (2);
+          R.D (1) := 2 ** 31;
+          R.D (2) := 0;
+ 
+       --  Normal two word case
+ 
+       else
+          R := Allocate_Bignum (2);
+          R.D (2) := SD (abs (X) mod Base);
+          R.D (1) := SD (abs (X) / Base);
+       end if;
+ 
+       R.Neg := X < 0;
+       return R;
+    end To_Bignum;
+ 
+    function To_Bignum (X : Unsigned_64) return Bignum is
+       R : Bignum;
+ 
+    begin
+       if X = 0 then
+          R := Allocate_Bignum (0);
+ 
+       --  One word result
+ 
+       elsif X < 2 ** 32 then
+          R := Allocate_Bignum (1);
+          R.D (1) := SD (X);
+ 
+       --  Two word result
+ 
+       else
+          R := Allocate_Bignum (2);
+          R.D (2) := SD (X mod Base);
+          R.D (1) := SD (X / Base);
+       end if;
+ 
+       R.Neg := False;
+       return R;
+    end To_Bignum;
+ 
+    -------------
+    -- Is_Zero --
+    -------------
+ 
+    function Is_Zero (X : Bignum) return Boolean is
+      (X /= null and then X.D = Zero_Data);
+ 
+ end System.Generic_Bignums;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-genbig.ads gcc-10.1.0/gcc/ada/libgnat/s-genbig.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-genbig.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/libgnat/s-genbig.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,135 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --               S Y S T E M . G E N E R I C _ B I G N U M S                --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --            Copyright (C) 2012-2019, Free Software Foundation, Inc.       --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  This package provides arbitrary precision signed integer arithmetic
+ --  and can be used either built into the compiler via System.Bignums or to
+ --  implement a default version of Ada.Numerics.Big_Numbers.Big_Integers.
+ 
+ --  If Use_Secondary_Stack is True then all Bignum values are allocated on the
+ --  secondary stack. If False, the heap is used and the caller is responsible
+ --  for memory management.
+ 
+ with Ada.Unchecked_Conversion;
+ with Interfaces;
+ 
+ generic
+    Use_Secondary_Stack : Boolean;
+ package System.Generic_Bignums is
+    pragma Preelaborate;
+ 
+    pragma Assert (Long_Long_Integer'Size = 64);
+    --  This package assumes that Long_Long_Integer size is 64 bit (i.e. that it
+    --  has a range of -2**63 to 2**63-1). The front end ensures that the mode
+    --  ELIMINATED is not allowed for overflow checking if this is not the case.
+ 
+    subtype Length is Natural range 0 .. 2 ** 23 - 1;
+    --  Represent number of words in Digit_Vector
+ 
+    Base : constant := 2 ** 32;
+    --  Digit vectors use this base
+ 
+    subtype SD is Interfaces.Unsigned_32;
+    --  Single length digit
+ 
+    type Digit_Vector is array (Length range <>) of SD;
+    --  Represent digits of a number (most significant digit first)
+ 
+    type Bignum_Data (Len : Length) is record
+       Neg : Boolean;
+       --  Set if value is negative, never set for zero
+ 
+       D : Digit_Vector (1 .. Len);
+       --  Digits of number, most significant first, represented in base
+       --  2**Base. No leading zeroes are stored, and the value of zero is
+       --  represented using an empty vector for D.
+    end record;
+ 
+    for Bignum_Data use record
+       Len at 0 range 0 .. 23;
+       Neg at 3 range 0 .. 7;
+    end record;
+ 
+    type Bignum is access all Bignum_Data;
+    --  This is the type that is used externally. Possibly this could be a
+    --  private type, but we leave the structure exposed for now. For one
+    --  thing it helps with debugging. Note that this package never shares
+    --  an allocated Bignum value, so for example for X + 0, a copy of X is
+    --  returned, not X itself.
+ 
+    function To_Bignum is new Ada.Unchecked_Conversion (System.Address, Bignum);
+    function To_Address is new
+      Ada.Unchecked_Conversion (Bignum, System.Address);
+ 
+    --  Note: none of the subprograms in this package modify the Bignum_Data
+    --  records referenced by Bignum arguments of mode IN.
+ 
+    function Big_Add (X, Y : Bignum) return Bignum;  --  "+"
+    function Big_Sub (X, Y : Bignum) return Bignum;  --  "-"
+    function Big_Mul (X, Y : Bignum) return Bignum;  --  "*"
+    function Big_Div (X, Y : Bignum) return Bignum;  --  "/"
+    function Big_Exp (X, Y : Bignum) return Bignum;  --  "**"
+    function Big_Mod (X, Y : Bignum) return Bignum;  --  "mod"
+    function Big_Rem (X, Y : Bignum) return Bignum;  --  "rem"
+    function Big_Neg (X    : Bignum) return Bignum;  --  "-"
+    function Big_Abs (X    : Bignum) return Bignum;  --  "abs"
+    --  Perform indicated arithmetic operation on bignum values. No exception
+    --  raised except for Div/Mod/Rem by 0 which raises Constraint_Error with
+    --  an appropriate message.
+ 
+    function Big_EQ  (X, Y : Bignum) return Boolean;  -- "="
+    function Big_NE  (X, Y : Bignum) return Boolean;  -- "/="
+    function Big_GE  (X, Y : Bignum) return Boolean;  -- ">="
+    function Big_LE  (X, Y : Bignum) return Boolean;  -- "<="
+    function Big_GT  (X, Y : Bignum) return Boolean;  --  ">"
+    function Big_LT  (X, Y : Bignum) return Boolean;  --  "<"
+    --  Perform indicated comparison on bignums, returning result as Boolean.
+    --  No exception raised for any input arguments.
+ 
+    function Bignum_In_LLI_Range (X : Bignum) return Boolean;
+    --  Returns True if the Bignum value is in the range of Long_Long_Integer,
+    --  so that a call to From_Bignum is guaranteed not to raise an exception.
+ 
+    function To_Bignum (X : Long_Long_Integer) return Bignum;
+    --  Convert Long_Long_Integer to Bignum. No exception can be raised for any
+    --  input argument.
+ 
+    function To_Bignum (X : Interfaces.Unsigned_64) return Bignum;
+    --  Convert Unsigned_64 to Bignum. No exception can be raised for any
+    --  input argument.
+ 
+    function From_Bignum (X : Bignum) return Long_Long_Integer;
+    --  Convert Bignum to Long_Long_Integer. Constraint_Error raised with
+    --  appropriate message if value is out of range of Long_Long_Integer.
+ 
+    function Is_Zero (X : Bignum) return Boolean;
+    --  Return True if X = 0
+ 
+ end System.Generic_Bignums;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-imenne.adb gcc-10.1.0/gcc/ada/libgnat/s-imenne.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-imenne.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-imenne.adb	Thu May  7 10:49:59 2020
*************** package body System.Img_Enum_New is
*** 49,55 ****
        pragma Assert (S'First = 1);
  
        type Natural_8 is range 0 .. 2 ** 7 - 1;
!       type Index_Table is array (Natural) of Natural_8;
        type Index_Table_Ptr is access Index_Table;
  
        function To_Index_Table_Ptr is
--- 49,56 ----
        pragma Assert (S'First = 1);
  
        type Natural_8 is range 0 .. 2 ** 7 - 1;
!       subtype Index is Natural range Natural'First .. Names'Length;
!       type Index_Table is array (Index) of Natural_8;
        type Index_Table_Ptr is access Index_Table;
  
        function To_Index_Table_Ptr is
*************** package body System.Img_Enum_New is
*** 79,85 ****
        pragma Assert (S'First = 1);
  
        type Natural_16 is range 0 .. 2 ** 15 - 1;
!       type Index_Table is array (Natural) of Natural_16;
        type Index_Table_Ptr is access Index_Table;
  
        function To_Index_Table_Ptr is
--- 80,87 ----
        pragma Assert (S'First = 1);
  
        type Natural_16 is range 0 .. 2 ** 15 - 1;
!       subtype Index is Natural range Natural'First .. Names'Length;
!       type Index_Table is array (Index) of Natural_16;
        type Index_Table_Ptr is access Index_Table;
  
        function To_Index_Table_Ptr is
*************** package body System.Img_Enum_New is
*** 109,115 ****
        pragma Assert (S'First = 1);
  
        type Natural_32 is range 0 .. 2 ** 31 - 1;
!       type Index_Table is array (Natural) of Natural_32;
        type Index_Table_Ptr is access Index_Table;
  
        function To_Index_Table_Ptr is
--- 111,118 ----
        pragma Assert (S'First = 1);
  
        type Natural_32 is range 0 .. 2 ** 31 - 1;
!       subtype Index is Natural range Natural'First .. Names'Length;
!       type Index_Table is array (Index) of Natural_32;
        type Index_Table_Ptr is access Index_Table;
  
        function To_Index_Table_Ptr is
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-memory.adb gcc-10.1.0/gcc/ada/libgnat/s-memory.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-memory.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-memory.adb	Thu May  7 10:49:59 2020
***************
*** 33,45 ****
  
  --  This implementation assumes that the underlying malloc/free/realloc
  --  implementation is thread safe, and thus, no additional lock is required.
! --  Note that we still need to defer abort because on most systems, an
! --  asynchronous signal (as used for implementing asynchronous abort of
! --  task) cannot safely be handled while malloc is executing.
! 
! --  If you are not using Ada constructs containing the "abort" keyword, then
! --  you can remove the calls to Abort_Defer.all and Abort_Undefer.all from
! --  this unit.
  
  pragma Compiler_Unit_Warning;
  
--- 33,42 ----
  
  --  This implementation assumes that the underlying malloc/free/realloc
  --  implementation is thread safe, and thus, no additional lock is required.
! --  Note that when using sjlj exception handling, we still need to defer abort
! --  because an asynchronous signal (as used for implementing asynchronous abort
! --  of task on sjlj runtimes) cannot safely be handled while malloc is
! --  executing.
  
  pragma Compiler_Unit_Warning;
  
*************** package body System.Memory is
*** 80,86 ****
           raise Storage_Error with "object too large";
        end if;
  
!       if Parameters.No_Abort then
           Result := c_malloc (System.CRTL.size_t (Size));
        else
           Abort_Defer.all;
--- 77,83 ----
           raise Storage_Error with "object too large";
        end if;
  
!       if ZCX_By_Default or else Parameters.No_Abort then
           Result := c_malloc (System.CRTL.size_t (Size));
        else
           Abort_Defer.all;
*************** package body System.Memory is
*** 121,127 ****
  
     procedure Free (Ptr : System.Address) is
     begin
!       if Parameters.No_Abort then
           c_free (Ptr);
        else
           Abort_Defer.all;
--- 118,124 ----
  
     procedure Free (Ptr : System.Address) is
     begin
!       if ZCX_By_Default or else Parameters.No_Abort then
           c_free (Ptr);
        else
           Abort_Defer.all;
*************** package body System.Memory is
*** 145,151 ****
           raise Storage_Error with "object too large";
        end if;
  
!       if Parameters.No_Abort then
           Result := c_realloc (Ptr, System.CRTL.size_t (Size));
        else
           Abort_Defer.all;
--- 142,148 ----
           raise Storage_Error with "object too large";
        end if;
  
!       if ZCX_By_Default or else Parameters.No_Abort then
           Result := c_realloc (Ptr, System.CRTL.size_t (Size));
        else
           Abort_Defer.all;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-os_lib.adb gcc-10.1.0/gcc/ada/libgnat/s-os_lib.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-os_lib.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-os_lib.adb	Thu May  7 10:49:59 2020
*************** package body System.OS_Lib is
*** 1629,1638 ****
        pragma Import (C, C_Kill, "__gnat_kill");
  
     begin
!       if Hard_Kill then
!          C_Kill (Pid, SIGKILL, 1);
!       else
!          C_Kill (Pid, SIGINT, 1);
        end if;
     end Kill;
  
--- 1629,1640 ----
        pragma Import (C, C_Kill, "__gnat_kill");
  
     begin
!       if Pid /= Invalid_Pid then
!          if Hard_Kill then
!             C_Kill (Pid, SIGKILL, 1);
!          else
!             C_Kill (Pid, SIGINT, 1);
!          end if;
        end if;
     end Kill;
  
*************** package body System.OS_Lib is
*** 2977,2982 ****
--- 2979,2993 ----
        end loop;
     end Spawn_Internal;
  
+    ------------
+    -- To_Ada --
+    ------------
+ 
+    function To_Ada (Time : time_t) return OS_Time is
+    begin
+       return OS_Time (Time);
+    end To_Ada;
+ 
     ---------------------------
     -- To_Path_String_Access --
     ---------------------------
*************** package body System.OS_Lib is
*** 3006,3011 ****
--- 3017,3031 ----
        return Return_Val;
     end To_Path_String_Access;
  
+    ----------
+    -- To_C --
+    ----------
+ 
+    function To_C (Time : OS_Time) return time_t is
+    begin
+       return time_t (Time);
+    end To_C;
+ 
     ------------------
     -- Wait_Process --
     ------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-os_lib.ads gcc-10.1.0/gcc/ada/libgnat/s-os_lib.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-os_lib.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-os_lib.ads	Thu May  7 10:49:59 2020
*************** package System.OS_Lib is
*** 164,169 ****
--- 164,178 ----
     --  component parts to be interpreted in the local time zone, and returns
     --  an OS_Time. Returns Invalid_Time if the creation fails.
  
+    subtype time_t is Long_Integer;
+    --  C time_t type of the time representation
+ 
+    function To_C (Time : OS_Time) return time_t;
+    --  Convert OS_Time to C time_t type
+ 
+    function To_Ada (Time : time_t) return OS_Time;
+    --  Convert C time_t type to OS_Time
+ 
     ----------------
     -- File Stuff --
     ----------------
*************** package System.OS_Lib is
*** 246,252 ****
        Success  : out Boolean;
        Mode     : Copy_Mode := Copy;
        Preserve : Attribute := Time_Stamps);
!    --  Copy a file. Name must designate a single file (no wild cards allowed).
     --  Pathname can be a filename or directory name. In the latter case Name
     --  is copied into the directory preserving the same file name. Mode
     --  defines the kind of copy, see above with the default being a normal
--- 255,261 ----
        Success  : out Boolean;
        Mode     : Copy_Mode := Copy;
        Preserve : Attribute := Time_Stamps);
!    --  Copy a file. Name must designate a single file (no wildcards allowed).
     --  Pathname can be a filename or directory name. In the latter case Name
     --  is copied into the directory preserving the same file name. Mode
     --  defines the kind of copy, see above with the default being a normal
*************** private
*** 1107,1112 ****
--- 1116,1123 ----
     pragma Inline (">");
     pragma Inline ("<=");
     pragma Inline (">=");
+    pragma Inline (To_C);
+    pragma Inline (To_Ada);
  
     type Process_Id is new Integer;
     Invalid_Pid : constant Process_Id := -1;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-regexp.ads gcc-10.1.0/gcc/ada/libgnat/s-regexp.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-regexp.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-regexp.ads	Thu May  7 10:49:59 2020
*************** package System.Regexp is
*** 77,83 ****
     --  See also regexp(1) man page on Unix systems for further details
  
     --  A second kind of regular expressions is provided. This one is more
!    --  like the wild card patterns used in file names by the Unix shell (or
     --  DOS prompt) command lines. The grammar is the following:
  
     --     regexp ::= term
--- 77,83 ----
     --  See also regexp(1) man page on Unix systems for further details
  
     --  A second kind of regular expressions is provided. This one is more
!    --  like the wildcard patterns used in file names by the Unix shell (or
     --  DOS prompt) command lines. The grammar is the following:
  
     --     regexp ::= term
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-regpat.adb gcc-10.1.0/gcc/ada/libgnat/s-regpat.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-regpat.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-regpat.adb	Thu May  7 10:49:59 2020
*************** package body System.Regpat is
*** 1558,1564 ****
           Has_Special_Operator : Boolean := False;
  
        begin
!          Parse_Pos := Parse_Pos - 1;      --  Look at current character
  
           IP :=
             Emit_Node
--- 1558,1565 ----
           Has_Special_Operator : Boolean := False;
  
        begin
!          Expr_Flags := Worst_Expression;  --  Ensure Expr_Flags is initialized
!          Parse_Pos  := Parse_Pos - 1;     --  Look at current character
  
           IP :=
             Emit_Node
*************** package body System.Regpat is
*** 1684,1694 ****
        begin
           Parse_Atom (New_Flags, IP);
  
!          if IP = 0 then
!             return;
!          end if;
! 
!          if Parse_Pos > Parse_End
             or else not Is_Mult (Parse_Pos)
           then
              Expr_Flags := New_Flags;
--- 1685,1692 ----
        begin
           Parse_Atom (New_Flags, IP);
  
!          if IP = 0
!            or else Parse_Pos > Parse_End
             or else not Is_Mult (Parse_Pos)
           then
              Expr_Flags := New_Flags;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-soflin.ads gcc-10.1.0/gcc/ada/libgnat/s-soflin.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-soflin.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-soflin.ads	Thu May  7 10:49:59 2020
*************** package System.Soft_Links is
*** 302,316 ****
     --  Wrapper to the possible user specified traceback decorator to be
     --  called during automatic output of exception data.
  
!    --  The null value of this wrapper correspond sto the null value of the
     --  current actual decorator. This is ensured first by the null initial
     --  value of the corresponding variables, and then by Set_Trace_Decorator
     --  in g-exctra.adb.
  
     pragma Atomic (Traceback_Decorator_Wrapper);
     --  Since concurrent read/write operations may occur on this variable.
!    --  See the body of Tailored_Exception_Traceback in Ada.Exceptions for
!    --  a more detailed description of the potential problems.
  
     procedure Save_Library_Occurrence (E : EOA);
     --  When invoked, this routine saves an exception occurrence into a hidden
--- 302,317 ----
     --  Wrapper to the possible user specified traceback decorator to be
     --  called during automatic output of exception data.
  
!    --  The null value of this wrapper corresponds to the null value of the
     --  current actual decorator. This is ensured first by the null initial
     --  value of the corresponding variables, and then by Set_Trace_Decorator
     --  in g-exctra.adb.
  
     pragma Atomic (Traceback_Decorator_Wrapper);
     --  Since concurrent read/write operations may occur on this variable.
!    --  See the body of Tailored_Exception_Traceback in
!    --  Ada.Exceptions.Exception_Data for a more detailed description of the
!    --  potential problems.
  
     procedure Save_Library_Occurrence (E : EOA);
     --  When invoked, this routine saves an exception occurrence into a hidden
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-stausa.adb gcc-10.1.0/gcc/ada/libgnat/s-stausa.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-stausa.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-stausa.adb	Thu May  7 10:49:59 2020
*************** package body System.Stack_Usage is
*** 42,48 ****
     -- Stack_Slots --
     -----------------
  
!    --  Stackl_Slots is an internal data type to represent a sequence of real
     --  stack slots initialized with a provided pattern, with operations to
     --  abstract away the target call stack growth direction.
  
--- 42,48 ----
     -- Stack_Slots --
     -----------------
  
!    --  Stack_Slots is an internal data type to represent a sequence of real
     --  stack slots initialized with a provided pattern, with operations to
     --  abstract away the target call stack growth direction.
  
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-stausa.ads gcc-10.1.0/gcc/ada/libgnat/s-stausa.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-stausa.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-stausa.ads	Thu May  7 10:49:59 2020
*************** package System.Stack_Usage is
*** 67,72 ****
--- 67,77 ----
     --  Type of the stack analyzer tool. It is used to fill a portion of the
     --  stack with Pattern, and to compute the stack used after some execution.
  
+    --  Note that Fill_Stack writes data past the current top of the stack
+    --  (i.e. at addresses less than the stack pointer register, assuming the
+    --  stack grows downward). Therefore, this package is incompatible with
+    --  tools like Valgrind and DrMemory.
+ 
     --  Usage:
  
     --  A typical use of the package is something like:
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-stratt.ads gcc-10.1.0/gcc/ada/libgnat/s-stratt.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-stratt.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-stratt.ads	Thu May  7 10:49:59 2020
*************** package System.Stream_Attributes is
*** 154,160 ****
  
     function Block_IO_OK return Boolean;
     --  Package System.Stream_Attributes has several bodies - the default one
!    --  distributed with GNAT, and s-stratt-xdr.adb, which is based on the XDR
     --  standard. Both bodies share the same spec. The role of this function is
     --  to indicate whether the current version of System.Stream_Attributes
     --  supports block IO. See System.Strings.Stream_Ops (s-ststop) for details.
--- 154,160 ----
  
     function Block_IO_OK return Boolean;
     --  Package System.Stream_Attributes has several bodies - the default one
!    --  distributed with GNAT, and s-stratt__xdr.adb, which is based on the XDR
     --  standard. Both bodies share the same spec. The role of this function is
     --  to indicate whether the current version of System.Stream_Attributes
     --  supports block IO. See System.Strings.Stream_Ops (s-ststop) for details.
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-ststop.adb gcc-10.1.0/gcc/ada/libgnat/s-ststop.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-ststop.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-ststop.adb	Thu May  7 10:49:59 2020
***************
*** 31,38 ****
  
  pragma Compiler_Unit_Warning;
  
  with Ada.Streams;              use Ada.Streams;
- with Ada.Streams.Stream_IO;    use Ada.Streams.Stream_IO;
  with Ada.Unchecked_Conversion;
  
  with System;                   use System;
--- 31,38 ----
  
  pragma Compiler_Unit_Warning;
  
+ with Ada.IO_Exceptions;        use Ada.IO_Exceptions;
  with Ada.Streams;              use Ada.Streams;
  with Ada.Unchecked_Conversion;
  
  with System;                   use System;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-valboo.ads gcc-10.1.0/gcc/ada/libgnat/s-valboo.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-valboo.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-valboo.ads	Thu May  7 10:49:59 2020
***************
*** 30,36 ****
  ------------------------------------------------------------------------------
  
  package System.Val_Bool is
!    pragma Pure;
  
     function Value_Boolean (Str : String) return Boolean;
     --  Computes Boolean'Value (Str)
--- 30,36 ----
  ------------------------------------------------------------------------------
  
  package System.Val_Bool is
!    pragma Preelaborate;
  
     function Value_Boolean (Str : String) return Boolean;
     --  Computes Boolean'Value (Str)
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-valcha.ads gcc-10.1.0/gcc/ada/libgnat/s-valcha.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-valcha.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-valcha.ads	Thu May  7 10:49:59 2020
***************
*** 30,36 ****
  ------------------------------------------------------------------------------
  
  package System.Val_Char is
!    pragma Pure;
  
     function Value_Character (Str : String) return Character;
     --  Computes Character'Value (Str)
--- 30,36 ----
  ------------------------------------------------------------------------------
  
  package System.Val_Char is
!    pragma Preelaborate;
  
     function Value_Character (Str : String) return Character;
     --  Computes Character'Value (Str)
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-valdec.ads gcc-10.1.0/gcc/ada/libgnat/s-valdec.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-valdec.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-valdec.ads	Thu May  7 10:49:59 2020
***************
*** 34,40 ****
  --  Decimal_IO, and the Value attribute for such decimal types.
  
  package System.Val_Dec is
!    pragma Pure;
  
     function Scan_Decimal
       (Str   : String;
--- 34,40 ----
  --  Decimal_IO, and the Value attribute for such decimal types.
  
  package System.Val_Dec is
!    pragma Preelaborate;
  
     function Scan_Decimal
       (Str   : String;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-valenu.ads gcc-10.1.0/gcc/ada/libgnat/s-valenu.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-valenu.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-valenu.ads	Thu May  7 10:49:59 2020
***************
*** 34,40 ****
  --  details of the format of constructed image tables.
  
  package System.Val_Enum is
!    pragma Pure;
  
     function Value_Enumeration_8
       (Names   : String;
--- 34,40 ----
  --  details of the format of constructed image tables.
  
  package System.Val_Enum is
!    pragma Preelaborate;
  
     function Value_Enumeration_8
       (Names   : String;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-valint.ads gcc-10.1.0/gcc/ada/libgnat/s-valint.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-valint.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-valint.ads	Thu May  7 10:49:59 2020
***************
*** 33,39 ****
  --  in Text_IO.Integer_IO, and the Value attribute.
  
  package System.Val_Int is
!    pragma Pure;
  
     function Scan_Integer
       (Str : String;
--- 33,39 ----
  --  in Text_IO.Integer_IO, and the Value attribute.
  
  package System.Val_Int is
!    pragma Preelaborate;
  
     function Scan_Integer
       (Str : String;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-vallld.ads gcc-10.1.0/gcc/ada/libgnat/s-vallld.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-vallld.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-vallld.ads	Thu May  7 10:49:59 2020
***************
*** 34,40 ****
  --  Decimal_IO, and the Value attribute for such decimal types.
  
  package System.Val_LLD is
!    pragma Pure;
  
     function Scan_Long_Long_Decimal
       (Str   : String;
--- 34,40 ----
  --  Decimal_IO, and the Value attribute for such decimal types.
  
  package System.Val_LLD is
!    pragma Preelaborate;
  
     function Scan_Long_Long_Decimal
       (Str   : String;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-vallli.ads gcc-10.1.0/gcc/ada/libgnat/s-vallli.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-vallli.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-vallli.ads	Thu May  7 10:49:59 2020
***************
*** 33,39 ****
  --  values for use in Text_IO.Integer_IO, and the Value attribute.
  
  package System.Val_LLI is
!    pragma Pure;
  
     function Scan_Long_Long_Integer
       (Str  : String;
--- 33,39 ----
  --  values for use in Text_IO.Integer_IO, and the Value attribute.
  
  package System.Val_LLI is
!    pragma Preelaborate;
  
     function Scan_Long_Long_Integer
       (Str  : String;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-valllu.ads gcc-10.1.0/gcc/ada/libgnat/s-valllu.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-valllu.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-valllu.ads	Thu May  7 10:49:59 2020
***************
*** 35,41 ****
  with System.Unsigned_Types;
  
  package System.Val_LLU is
!    pragma Pure;
  
     function Scan_Raw_Long_Long_Unsigned
       (Str : String;
--- 35,41 ----
  with System.Unsigned_Types;
  
  package System.Val_LLU is
!    pragma Preelaborate;
  
     function Scan_Raw_Long_Long_Unsigned
       (Str : String;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-valrea.adb gcc-10.1.0/gcc/ada/libgnat/s-valrea.adb
*** gcc-9.3.0/gcc/ada/libgnat/s-valrea.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-valrea.adb	Thu May  7 10:49:59 2020
***************
*** 29,380 ****
  --                                                                          --
  ------------------------------------------------------------------------------
  
- with System.Powten_Table;  use System.Powten_Table;
  with System.Val_Util;      use System.Val_Util;
  with System.Float_Control;
  
  package body System.Val_Real is
  
!    ---------------
!    -- Scan_Real --
!    ---------------
! 
!    function Scan_Real
!      (Str : String;
!       Ptr : not null access Integer;
!       Max : Integer) return Long_Long_Float
!    is
!       P : Integer;
!       --  Local copy of string pointer
! 
!       Base : Long_Long_Float;
!       --  Base value
! 
!       Uval : Long_Long_Float;
!       --  Accumulated float result
  
!       subtype Digs is Character range '0' .. '9';
!       --  Used to check for decimal digit
  
!       Scale : Integer := 0;
!       --  Power of Base to multiply result by
  
!       Start : Positive;
!       --  Position of starting non-blank character
  
!       Minus : Boolean;
!       --  Set to True if minus sign is present, otherwise to False
  
!       Bad_Base : Boolean := False;
!       --  Set True if Base out of range or if out of range digit
  
!       After_Point : Natural := 0;
!       --  Set to 1 after the point
  
!       Num_Saved_Zeroes : Natural := 0;
!       --  This counts zeroes after the decimal point. A non-zero value means
!       --  that this number of previously scanned digits are zero. If the end
!       --  of the number is reached, these zeroes are simply discarded, which
!       --  ensures that trailing zeroes after the point never affect the value
!       --  (which might otherwise happen as a result of rounding). With this
!       --  processing in place, we can ensure that, for example, we get the
!       --  same exact result from 1.0E+49 and 1.0000000E+49. This is not
!       --  necessarily required in a case like this where the result is not
!       --  a machine number, but it is certainly a desirable behavior.
  
!       procedure Scanf;
!       --  Scans integer literal value starting at current character position.
!       --  For each digit encountered, Uval is multiplied by 10.0, and the new
!       --  digit value is incremented. In addition Scale is decremented for each
!       --  digit encountered if we are after the point (After_Point = 1). The
!       --  longest possible syntactically valid numeral is scanned out, and on
!       --  return P points past the last character. On entry, the current
!       --  character is known to be a digit, so a numeral is definitely present.
  
!       -----------
!       -- Scanf --
!       -----------
  
!       procedure Scanf is
!          Digit : Natural;
  
!       begin
!          loop
!             Digit := Character'Pos (Str (P)) - Character'Pos ('0');
!             P := P + 1;
  
!             --  Save up trailing zeroes after the decimal point
  
!             if Digit = 0 and then After_Point = 1 then
!                Num_Saved_Zeroes := Num_Saved_Zeroes + 1;
  
!             --  Here for a non-zero digit
  
              else
-                --  First deal with any previously saved zeroes
  
!                if Num_Saved_Zeroes /= 0 then
!                   while Num_Saved_Zeroes > Maxpow loop
!                      Uval := Uval * Powten (Maxpow);
!                      Num_Saved_Zeroes := Num_Saved_Zeroes - Maxpow;
!                      Scale := Scale - Maxpow;
!                   end loop;
  
!                   Uval := Uval * Powten (Num_Saved_Zeroes);
!                   Scale := Scale - Num_Saved_Zeroes;
  
!                   Num_Saved_Zeroes := 0;
                 end if;
- 
-                --  Accumulate new digit
- 
-                Uval := Uval * 10.0 + Long_Long_Float (Digit);
-                Scale := Scale - After_Point;
              end if;
  
!             --  Done if end of input field
  
!             if P > Max then
!                return;
  
!             --  Check next character
  
!             elsif Str (P) not in Digs then
!                if Str (P) = '_' then
!                   Scan_Underscore (Str, P, Ptr, Max, False);
                 else
                    return;
                 end if;
              end if;
!          end loop;
!       end Scanf;
! 
!    --  Start of processing for System.Scan_Real
! 
!    begin
!       --  We do not tolerate strings with Str'Last = Positive'Last
! 
!       if Str'Last = Positive'Last then
!          raise Program_Error with
!            "string upper bound is Positive'Last, not supported";
!       end if;
! 
!       --  We call the floating-point processor reset routine so that we can
!       --  be sure the floating-point processor is properly set for conversion
!       --  calls. This is notably need on Windows, where calls to the operating
!       --  system randomly reset the processor into 64-bit mode.
! 
!       System.Float_Control.Reset;
! 
!       Scan_Sign (Str, Ptr, Max, Minus, Start);
!       P := Ptr.all;
!       Ptr.all := Start;
! 
!       --  If digit, scan numeral before point
! 
!       if Str (P) in Digs then
!          Uval := 0.0;
!          Scanf;
! 
!       --  Initial point, allowed only if followed by digit (RM 3.5(47))
  
!       elsif Str (P) = '.'
!         and then P < Max
!         and then Str (P + 1) in Digs
!       then
!          Uval := 0.0;
  
!       --  Any other initial character is an error
  
!       else
!          Bad_Value (Str);
!       end if;
  
!       --  Deal with based case. We reognize either the standard '#' or the
!       --  allowed alternative replacement ':' (see RM J.2(3)).
  
!       if P < Max and then (Str (P) = '#' or else Str (P) = ':') then
!          declare
!             Base_Char : constant Character := Str (P);
!             Digit     : Natural;
!             Fdigit    : Long_Long_Float;
  
!          begin
!             --  Set bad base if out of range, and use safe base of 16.0,
!             --  to guard against division by zero in the loop below.
  
!             if Uval < 2.0 or else Uval > 16.0 then
!                Bad_Base := True;
!                Uval := 16.0;
              end if;
  
!             Base := Uval;
!             Uval := 0.0;
!             P := P + 1;
! 
!             --  Special check to allow initial point (RM 3.5(49))
! 
!             if Str (P) = '.' then
!                After_Point := 1;
!                P := P + 1;
              end if;
  
!             --  Loop to scan digits of based number. On entry to the loop we
!             --  must have a valid digit. If we don't, then we have an illegal
!             --  floating-point value, and we raise Constraint_Error, note that
!             --  Ptr at this stage was reset to the proper (Start) value.
! 
!             loop
!                if P > Max then
!                   Bad_Value (Str);
! 
!                elsif Str (P) in Digs then
!                   Digit := Character'Pos (Str (P)) - Character'Pos ('0');
! 
!                elsif Str (P) in 'A' .. 'F' then
!                   Digit :=
!                     Character'Pos (Str (P)) - (Character'Pos ('A') - 10);
  
!                elsif Str (P) in 'a' .. 'f' then
!                   Digit :=
!                     Character'Pos (Str (P)) - (Character'Pos ('a') - 10);
  
                 else
!                   Bad_Value (Str);
                 end if;
  
!                --  Save up trailing zeroes after the decimal point
  
!                if Digit = 0 and then After_Point = 1 then
!                   Num_Saved_Zeroes := Num_Saved_Zeroes + 1;
  
!                --  Here for a non-zero digit
  
!                else
!                   --  First deal with any previously saved zeroes
  
!                   if Num_Saved_Zeroes /= 0 then
!                      Uval := Uval * Base ** Num_Saved_Zeroes;
!                      Scale := Scale - Num_Saved_Zeroes;
!                      Num_Saved_Zeroes := 0;
!                   end if;
  
!                   --  Now accumulate the new digit
  
!                   Fdigit := Long_Long_Float (Digit);
  
!                   if Fdigit >= Base then
!                      Bad_Base := True;
!                   else
!                      Scale := Scale - After_Point;
!                      Uval := Uval * Base + Fdigit;
!                   end if;
!                end if;
  
!                P := P + 1;
  
!                if P > Max then
!                   Bad_Value (Str);
  
!                elsif Str (P) = '_' then
!                   Scan_Underscore (Str, P, Ptr, Max, True);
  
!                else
!                   --  Skip past period after digit. Note that the processing
!                   --  here will permit either a digit after the period, or the
!                   --  terminating base character, as allowed in (RM 3.5(48))
  
!                   if Str (P) = '.' and then After_Point = 0 then
!                      P := P + 1;
!                      After_Point := 1;
  
!                      if P > Max then
!                         Bad_Value (Str);
!                      end if;
!                   end if;
  
!                   exit when Str (P) = Base_Char;
!                end if;
!             end loop;
  
!             --  Based number successfully scanned out (point was found)
  
!             Ptr.all := P + 1;
!          end;
  
!       --  Non-based case, check for being at decimal point now. Note that
!       --  in Ada 95, we do not insist on a decimal point being present
  
        else
!          Base := 10.0;
!          After_Point := 1;
! 
!          if P <= Max and then Str (P) = '.' then
!             P := P + 1;
  
!             --  Scan digits after point if any are present (RM 3.5(46))
  
!             if P <= Max and then Str (P) in Digs then
!                Scanf;
!             end if;
           end if;
  
!          Ptr.all := P;
!       end if;
  
!       --  At this point, we have Uval containing the digits of the value as
!       --  an integer, and Scale indicates the negative of the number of digits
!       --  after the point. Base contains the base value (an integral value in
!       --  the range 2.0 .. 16.0). Test for exponent, must be at least one
!       --  character after the E for the exponent to be valid.
  
!       Scale := Scale + Scan_Exponent (Str, Ptr, Max, Real => True);
  
!       --  At this point the exponent has been scanned if one is present and
!       --  Scale is adjusted to include the exponent value. Uval contains the
!       --  the integral value which is to be multiplied by Base ** Scale.
  
!       --  If base is not 10, use exponentiation for scaling
  
!       if Base /= 10.0 then
!          Uval := Uval * Base ** Scale;
  
!       --  For base 10, use power of ten table, repeatedly if necessary
  
!       elsif Scale > 0 then
!          while Scale > Maxpow and then Uval'Valid loop
!             Uval := Uval * Powten (Maxpow);
!             Scale := Scale - Maxpow;
!          end loop;
  
!          --  Note that we still know that Scale > 0, since the loop
!          --  above leaves Scale in the range 1 .. Maxpow.
  
!          if Uval'Valid then
!             Uval := Uval * Powten (Scale);
!          end if;
  
!       elsif Scale < 0 then
!          while (-Scale) > Maxpow and then Uval'Valid loop
!             Uval := Uval / Powten (Maxpow);
!             Scale := Scale + Maxpow;
!          end loop;
  
!          --  Note that we still know that Scale < 0, since the loop
!          --  above leaves Scale in the range -Maxpow .. -1.
!          if Uval'Valid then
!             Uval := Uval / Powten (-Scale);
!          end if;
!       end if;
  
        --  Here is where we check for a bad based number
! 
!       if Bad_Base then
           Bad_Value (Str);
  
        --  If OK, then deal with initial minus sign, note that this processing
        --  is done even if Uval is zero, so that -0.0 is correctly interpreted.
- 
        else
           if Minus then
              return -Uval;
--- 29,497 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
  with System.Val_Util;      use System.Val_Util;
  with System.Float_Control;
  
  package body System.Val_Real is
  
!    procedure Scan_Integral_Digits
!       (Str            : String;
!        Index          : in out Integer;
!        Max            : Integer;
!        Value          : out Long_Long_Integer;
!        Scale          : out Integer;
!        Base_Violation : in out Boolean;
!        Base           : Long_Long_Integer := 10;
!        Base_Specified : Boolean := False);
!    --  Scan the integral part of a real (i.e: before decimal separator)
!    --
!    --  The string parsed is Str (Index .. Max), and after the call Index will
!    --  point to the first non parsed character.
!    --
!    --  For each digit parsed either value := value * base + digit, or scale
!    --  is incremented by 1.
!    --
!    --  Base_Violation will be set to True a digit found is not part of the Base
  
!    procedure Scan_Decimal_Digits
!       (Str            : String;
!        Index          : in out Integer;
!        Max            : Integer;
!        Value          : in out Long_Long_Integer;
!        Scale          : in out Integer;
!        Base_Violation : in out Boolean;
!        Base           : Long_Long_Integer := 10;
!        Base_Specified : Boolean := False);
!    --  Scan the decimal part of a real (i.e: after decimal separator)
!    --
!    --  The string parsed is Str (Index .. Max), and after the call Index will
!    --  point to the first non parsed character.
!    --
!    --  For each digit parsed value = value * base + digit and scale is
!    --  decremented by 1. If precision limit is reached remaining digits are
!    --  still parsed but ignored.
!    --
!    --  Base_Violation will be set to True a digit found is not part of the Base
  
!    subtype Char_As_Digit is Long_Long_Integer range -2 .. 15;
!    subtype Valid_Digit is Char_As_Digit range 0 .. Char_As_Digit'Last;
!    Underscore : constant Char_As_Digit := -2;
!    E_Digit : constant Char_As_Digit := 14;
  
!    function As_Digit (C : Character) return Char_As_Digit;
!    --  Given a character return the digit it represent. If the character is
!    --  not a digit then a negative value is returned, -2 for underscore and
!    --  -1 for any other character.
  
!    Precision_Limit : constant Long_Long_Integer :=
!       2 ** (Long_Long_Float'Machine_Mantissa - 1) - 1;
!    --  This is an upper bound for the number of bits used to represent the
!    --  mantissa. Beyond that number, any digits parsed are useless.
  
!    --------------
!    -- As_Digit --
!    --------------
  
!    function As_Digit (C : Character) return Char_As_Digit
!    is
!    begin
!       case C is
!          when '0' .. '9' =>
!             return Character'Pos (C) - Character'Pos ('0');
!          when 'a' .. 'f' =>
!             return Character'Pos (C) - (Character'Pos ('a') - 10);
!          when 'A' .. 'F' =>
!             return Character'Pos (C) - (Character'Pos ('A') - 10);
!          when '_' =>
!             return Underscore;
!          when others =>
!             return -1;
!       end case;
!    end As_Digit;
  
!    -------------------------
!    -- Scan_Decimal_Digits --
!    -------------------------
  
!    procedure Scan_Decimal_Digits
!       (Str            : String;
!        Index          : in out Integer;
!        Max            : Integer;
!        Value          : in out Long_Long_Integer;
!        Scale          : in out Integer;
!        Base_Violation : in out Boolean;
!        Base           : Long_Long_Integer := 10;
!        Base_Specified : Boolean := False)
  
!    is
!       Precision_Limit_Reached : Boolean := False;
!       --  Set to True if addition of a digit will cause Value to be superior
!       --  to Precision_Limit.
  
!       Digit : Char_As_Digit;
!       --  The current digit.
  
!       Trailing_Zeros : Natural := 0;
!       --  Number of trailing zeros at a given point.
!    begin
  
!       --  If initial Scale is not 0 then it means that Precision_Limit was
!       --  reached during integral part scanning.
!       if Scale > 0 then
!          Precision_Limit_Reached := True;
!       end if;
  
!       --  The function precondition is that the first character is a valid
!       --  digit.
!       Digit := As_Digit (Str (Index));
  
!       loop
!          --  Check if base is correct. If the base is not specified the digit
!          --  E or e cannot be considered as a base violation as it can be used
!          --  for exponentiation.
!          if Digit >= Base then
!             if Base_Specified then
!                Base_Violation := True;
!             elsif Digit = E_Digit then
!                return;
!             else
!                Base_Violation := True;
!             end if;
!          end if;
  
+          --  If precision limit has been reached just ignore any remaining
+          --  digits for the computation of Value and Scale. The scanning
+          --  should continue only to assess the validity of the string
+          if not Precision_Limit_Reached then
+             if Digit = 0 then
+                --  Trailing '0' digits are ignored unless a non-zero digit is
+                --  found.
+                Trailing_Zeros := Trailing_Zeros + 1;
              else
  
!                --  Handle accumulated zeros.
!                for J in 1 .. Trailing_Zeros loop
!                   if Value > Precision_Limit / Base then
!                      Precision_Limit_Reached := True;
!                      exit;
!                   else
!                      Value := Value * Base;
!                      Scale := Scale - 1;
!                   end if;
!                end loop;
  
!                --  Reset trailing zero counter
!                Trailing_Zeros := 0;
  
!                --  Handle current non zero digit
!                if Value > (Precision_Limit - Digit) / Base then
!                   Precision_Limit_Reached := True;
!                else
!                   Value := Value * Base + Digit;
!                   Scale := Scale - 1;
                 end if;
              end if;
+          end if;
  
!          --  Check next character
!          Index := Index + 1;
  
!          if Index > Max then
!             return;
!          end if;
  
!          Digit := As_Digit (Str (Index));
  
!          if Digit < 0 then
!             if Digit = Underscore and Index + 1 <= Max then
!                --  Underscore is only allowed if followed by a digit
!                Digit := As_Digit (Str (Index + 1));
!                if Digit in Valid_Digit then
!                   Index := Index + 1;
                 else
                    return;
                 end if;
+             else
+                --  Neither a valid underscore nor a digit.
+                return;
              end if;
!          end if;
!       end loop;
  
!    end Scan_Decimal_Digits;
  
!    --------------------------
!    -- Scan_Integral_Digits --
!    --------------------------
  
!    procedure Scan_Integral_Digits
!       (Str            : String;
!        Index          : in out Integer;
!        Max            : Integer;
!        Value          : out Long_Long_Integer;
!        Scale          : out Integer;
!        Base_Violation : in out Boolean;
!        Base           : Long_Long_Integer := 10;
!        Base_Specified : Boolean := False)
!    is
!       Precision_Limit_Reached : Boolean := False;
!       --  Set to True if addition of a digit will cause Value to be superior
!       --  to Precision_Limit.
  
!       Digit : Char_As_Digit;
!       --  The current digit
!    begin
  
!       --  Initialize Scale and Value
!       Value := 0;
!       Scale := 0;
  
!       --  The function precondition is that the first character is a valid
!       --  digit.
!       Digit := As_Digit (Str (Index));
  
!       loop
!          --  Check if base is correct. If the base is not specified the digit
!          --  E or e cannot be considered as a base violation as it can be used
!          --  for exponentiation.
!          if Digit >= Base then
!             if Base_Specified then
!                Base_Violation := True;
!             elsif Digit = E_Digit then
!                return;
!             else
!                Base_Violation := True;
              end if;
+          end if;
  
!          if Precision_Limit_Reached then
!             --  Precision limit has been reached so just update the exponent
!             Scale := Scale + 1;
!          else
!             if Value > (Precision_Limit - Digit) / Base then
!                --  Updating Value will overflow so ignore this digit and any
!                --  following ones. Only update the scale
!                Precision_Limit_Reached := True;
!                Scale := Scale + 1;
!             else
!                Value := Value * Base + Digit;
              end if;
+          end if;
  
!          --  Look for the next character
!          Index := Index + 1;
!          if Index > Max then
!             return;
!          end if;
  
!          Digit := As_Digit (Str (Index));
  
+          if Digit not in Valid_Digit then
+             --  Next character is not a digit. In that case stop scanning
+             --  unless the next chracter is an underscore followed by a digit.
+             if Digit = Underscore and Index + 1 <= Max then
+                Digit := As_Digit (Str (Index + 1));
+                if Digit in Valid_Digit then
+                   Index := Index + 1;
                 else
!                   return;
                 end if;
+             else
+                return;
+             end if;
+          end if;
+       end loop;
  
!    end Scan_Integral_Digits;
  
!    ---------------
!    -- Scan_Real --
!    ---------------
  
!    function Scan_Real
!       (Str : String;
!        Ptr : not null access Integer;
!        Max : Integer)
!       return Long_Long_Float
  
!    is
!       Start : Positive;
!       --  Position of starting non-blank character
  
!       Minus : Boolean;
!       --  Set to True if minus sign is present, otherwise to False
  
!       Index : Integer;
!       --  Local copy of string pointer
  
!       Int_Value : Long_Long_Integer := -1;
!       --  Mantissa as an Integer
  
!       Int_Scale : Integer := 0;
!       --  Exponent value
  
!       Base_Violation : Boolean := False;
!       --  If True some digits where not in the base. The float is still scan
!       --  till the end even if an error will be raised.
  
!       Uval : Long_Long_Float := 0.0;
!       --  Contain the final value at the end of the function
  
!       After_Point : Boolean := False;
!       --  True if a decimal should be parsed
  
!       Base : Long_Long_Integer := 10;
!       --  Current base (default: 10)
  
!       Base_Char : Character := ASCII.NUL;
!       --  Character used to set the base. If Nul this means that default
!       --  base is used.
  
!    begin
!       --  We do not tolerate strings with Str'Last = Positive'Last
  
!       if Str'Last = Positive'Last then
!          raise Program_Error with
!            "string upper bound is Positive'Last, not supported";
!       end if;
  
!       --  We call the floating-point processor reset routine so that we can
!       --  be sure the floating-point processor is properly set for conversion
!       --  calls. This is notably need on Windows, where calls to the operating
!       --  system randomly reset the processor into 64-bit mode.
  
!       System.Float_Control.Reset;
  
!       --  Scan the optional sign
!       Scan_Sign (Str, Ptr, Max, Minus, Start);
!       Index := Ptr.all;
!       Ptr.all := Start;
  
+       --  First character can be either a decimal digit or a dot.
+       if Str (Index) in '0' .. '9' then
+          --  If this is a digit it can indicates either the float decimal
+          --  part or the base to use
+          Scan_Integral_Digits
+             (Str,
+              Index,
+              Max            => Max,
+              Value          => Int_Value,
+              Scale          => Int_Scale,
+              Base_Violation => Base_Violation,
+              Base           => 10);
+       elsif Str (Index) = '.' and then
+          --  A dot is only allowed if followed by a digit.
+          Index < Max and then
+          Str (Index + 1) in '0' .. '9'
+       then
+          --  Initial point, allowed only if followed by digit (RM 3.5(47))
+          After_Point := True;
+          Index := Index + 1;
+          Int_Value := 0;
        else
!          Bad_Value (Str);
!       end if;
  
!       --  Check if the first number encountered is a base
!       if Index < Max and then
!          (Str (Index) = '#' or else Str (Index) = ':')
!       then
!          Base_Char := Str (Index);
!          Base := Int_Value;
  
!          --  Reset Int_Value to indicate that parsing of integral value should
!          --  be done
!          Int_Value := -1;
!          if Base < 2 or else Base > 16 then
!             Base_Violation := True;
!             Base := 16;
           end if;
  
!          Index := Index + 1;
  
!          if Str (Index) = '.' and then
!             Index < Max and then
!             As_Digit (Str (Index + 1)) in Valid_Digit
!          then
!             After_Point := True;
!             Index := Index + 1;
!             Int_Value := 0;
!          end if;
!       end if;
  
!       --  Does scanning of integral part needed
!       if Int_Value < 0 then
!          if Index > Max or else As_Digit (Str (Index)) not in Valid_Digit then
!             Bad_Value (Str);
!          end if;
  
!          Scan_Integral_Digits
!             (Str,
!              Index,
!              Max => Max,
!              Value => Int_Value,
!              Scale => Int_Scale,
!              Base_Violation => Base_Violation,
!              Base => Base,
!              Base_Specified => Base_Char /= ASCII.NUL);
!       end if;
  
!       --  Do we have a dot ?
!       if not After_Point and then
!          Index <= Max and then
!          Str (Index) = '.'
!       then
!          --  At this stage if After_Point was not set, this means that an
!          --  integral part has been found. Thus the dot is valid even if not
!          --  followed by a digit.
!          if Index < Max and then As_Digit (Str (Index + 1)) in Valid_Digit then
!             After_Point := True;
!          end if;
  
!          Index := Index + 1;
!       end if;
  
!       if After_Point then
!          --  Parse decimal part
!          Scan_Decimal_Digits
!             (Str,
!              Index,
!              Max => Max,
!              Value => Int_Value,
!              Scale => Int_Scale,
!              Base_Violation => Base_Violation,
!              Base => Base,
!              Base_Specified => Base_Char /= ASCII.NUL);
!       end if;
  
!       --  If an explicit base was specified ensure that the delimiter is found
!       if Base_Char /= ASCII.NUL then
!          if Index > Max or else Str (Index) /= Base_Char then
!             Bad_Value (Str);
!          else
!             Index := Index + 1;
!          end if;
!       end if;
  
!       --  Compute the final value
!       Uval := Long_Long_Float (Int_Value);
  
!       --  Update pointer and scan exponent.
!       Ptr.all := Index;
  
!       Int_Scale := Int_Scale + Scan_Exponent (Str,
!                                               Ptr,
!                                               Max,
!                                               Real => True);
  
!       Uval := Uval * Long_Long_Float (Base) ** Int_Scale;
  
        --  Here is where we check for a bad based number
!       if Base_Violation then
           Bad_Value (Str);
  
        --  If OK, then deal with initial minus sign, note that this processing
        --  is done even if Uval is zero, so that -0.0 is correctly interpreted.
        else
           if Minus then
              return -Uval;
*************** package body System.Val_Real is
*** 382,387 ****
--- 499,505 ----
              return Uval;
           end if;
        end if;
+ 
     end Scan_Real;
  
     ----------------
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-valrea.ads gcc-10.1.0/gcc/ada/libgnat/s-valrea.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-valrea.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-valrea.ads	Thu May  7 10:49:59 2020
***************
*** 30,36 ****
  ------------------------------------------------------------------------------
  
  package System.Val_Real is
!    pragma Pure;
  
     function Scan_Real
       (Str : String;
--- 30,36 ----
  ------------------------------------------------------------------------------
  
  package System.Val_Real is
!    pragma Preelaborate;
  
     function Scan_Real
       (Str : String;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-valuns.ads gcc-10.1.0/gcc/ada/libgnat/s-valuns.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-valuns.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-valuns.ads	Thu May  7 10:49:59 2020
***************
*** 35,41 ****
  with System.Unsigned_Types;
  
  package System.Val_Uns is
!    pragma Pure;
  
     function Scan_Raw_Unsigned
       (Str : String;
--- 35,41 ----
  with System.Unsigned_Types;
  
  package System.Val_Uns is
!    pragma Preelaborate;
  
     function Scan_Raw_Unsigned
       (Str : String;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-valwch.ads gcc-10.1.0/gcc/ada/libgnat/s-valwch.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-valwch.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-valwch.ads	Thu May  7 10:49:59 2020
***************
*** 34,40 ****
  with System.WCh_Con;
  
  package System.Val_WChar is
!    pragma Pure;
  
     function Value_Wide_Character
       (Str : String;
--- 34,40 ----
  with System.WCh_Con;
  
  package System.Val_WChar is
!    pragma Preelaborate;
  
     function Value_Wide_Character
       (Str : String;
diff -Nrcpad gcc-9.3.0/gcc/ada/libgnat/s-win32.ads gcc-10.1.0/gcc/ada/libgnat/s-win32.ads
*** gcc-9.3.0/gcc/ada/libgnat/s-win32.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/libgnat/s-win32.ads	Thu May  7 10:49:59 2020
*************** package System.Win32 is
*** 57,69 ****
     INVALID_HANDLE_VALUE : constant HANDLE := -1;
     INVALID_FILE_SIZE    : constant := 16#FFFFFFFF#;
  
!    type DWORD  is new Interfaces.C.unsigned_long;
!    type WORD   is new Interfaces.C.unsigned_short;
!    type BYTE   is new Interfaces.C.unsigned_char;
!    type LONG   is new Interfaces.C.long;
!    type CHAR   is new Interfaces.C.char;
  
!    type BOOL   is new Interfaces.C.int;
     for BOOL'Size use Interfaces.C.int'Size;
  
     type Bits1  is range 0 .. 2 ** 1 - 1;
--- 57,72 ----
     INVALID_HANDLE_VALUE : constant HANDLE := -1;
     INVALID_FILE_SIZE    : constant := 16#FFFFFFFF#;
  
!    type ULONG     is new Interfaces.C.unsigned_long;
!    type DWORD     is new Interfaces.C.unsigned_long;
!    type WORD      is new Interfaces.C.unsigned_short;
!    type BYTE      is new Interfaces.C.unsigned_char;
!    type LONG      is new Interfaces.C.long;
!    type CHAR      is new Interfaces.C.char;
!    type SIZE_T    is new Interfaces.C.size_t;
!    type DWORD_PTR is mod 2 ** Standard'Address_Size;
  
!    type BOOL      is new Interfaces.C.int;
     for BOOL'Size use Interfaces.C.int'Size;
  
     type Bits1  is range 0 .. 2 ** 1 - 1;
*************** package System.Win32 is
*** 157,174 ****
     GET_MODULE_HANDLE_EX_FLAG_FROM_ADDRESS : constant := 16#00000004#;
  
     type OVERLAPPED is record
!       Internal     : DWORD;
!       InternalHigh : DWORD;
        Offset       : DWORD;
        OffsetHigh   : DWORD;
        hEvent       : HANDLE;
     end record;
  
     type SECURITY_ATTRIBUTES is record
        nLength             : DWORD;
        pSecurityDescriptor : PVOID;
        bInheritHandle      : BOOL;
     end record;
  
     function CreateFileA
       (lpFileName            : Address;
--- 160,179 ----
     GET_MODULE_HANDLE_EX_FLAG_FROM_ADDRESS : constant := 16#00000004#;
  
     type OVERLAPPED is record
!       Internal     : access ULONG;
!       InternalHigh : access ULONG;
        Offset       : DWORD;
        OffsetHigh   : DWORD;
        hEvent       : HANDLE;
     end record;
+    pragma Convention (C_Pass_By_Copy, OVERLAPPED);
  
     type SECURITY_ATTRIBUTES is record
        nLength             : DWORD;
        pSecurityDescriptor : PVOID;
        bInheritHandle      : BOOL;
     end record;
+    pragma Convention (C_Pass_By_Copy, SECURITY_ATTRIBUTES);
  
     function CreateFileA
       (lpFileName            : Address;
*************** package System.Win32 is
*** 235,241 ****
        dwDesiredAccess      : DWORD;
        dwFileOffsetHigh     : DWORD;
        dwFileOffsetLow      : DWORD;
!       dwNumberOfBytesToMap : DWORD) return System.Address;
     pragma Import (Stdcall, MapViewOfFile, "MapViewOfFile");
  
     function UnmapViewOfFile (lpBaseAddress : System.Address) return BOOL;
--- 240,246 ----
        dwDesiredAccess      : DWORD;
        dwFileOffsetHigh     : DWORD;
        dwFileOffsetLow      : DWORD;
!       dwNumberOfBytesToMap : SIZE_T) return System.Address;
     pragma Import (Stdcall, MapViewOfFile, "MapViewOfFile");
  
     function UnmapViewOfFile (lpBaseAddress : System.Address) return BOOL;
*************** package System.Win32 is
*** 261,272 ****
        dwPageSize                  : DWORD;
        lpMinimumApplicationAddress : PVOID;
        lpMaximumApplicationAddress : PVOID;
!       dwActiveProcessorMask       : DWORD;
        dwNumberOfProcessors        : DWORD;
        dwProcessorType             : DWORD;
        dwAllocationGranularity     : DWORD;
        dwReserved                  : DWORD;
     end record;
  
     procedure GetSystemInfo (SI : access SYSTEM_INFO);
     pragma Import (Stdcall, GetSystemInfo, "GetSystemInfo");
--- 266,278 ----
        dwPageSize                  : DWORD;
        lpMinimumApplicationAddress : PVOID;
        lpMaximumApplicationAddress : PVOID;
!       dwActiveProcessorMask       : DWORD_PTR;
        dwNumberOfProcessors        : DWORD;
        dwProcessorType             : DWORD;
        dwAllocationGranularity     : DWORD;
        dwReserved                  : DWORD;
     end record;
+    pragma Convention (C_Pass_By_Copy, SYSTEM_INFO);
  
     procedure GetSystemInfo (SI : access SYSTEM_INFO);
     pragma Import (Stdcall, GetSystemInfo, "GetSystemInfo");
*************** package System.Win32 is
*** 285,290 ****
--- 291,297 ----
        wSecond       : WORD;
        wMilliseconds : WORD;
     end record;
+    pragma Convention (C_Pass_By_Copy, SYSTEMTIME);
  
     procedure GetSystemTime (pSystemTime : access SYSTEMTIME);
     pragma Import (Stdcall, GetSystemTime, "GetSystemTime");
diff -Nrcpad gcc-9.3.0/gcc/ada/make.adb gcc-10.1.0/gcc/ada/make.adb
*** gcc-9.3.0/gcc/ada/make.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/make.adb	Thu May  7 10:49:59 2020
*************** package body Make is
*** 502,508 ****
     --  linker). For the sake of convenience, some program specific switches
     --  can be passed directly on the gnatmake command line. This procedure
     --  records these switches so that gnatmake can pass them to the right
!    --  program.  S is the switch to be added at the end of the command line
     --  for Program if Append_Switch is True. If Append_Switch is False S is
     --  added at the beginning of the command line.
  
--- 502,508 ----
     --  linker). For the sake of convenience, some program specific switches
     --  can be passed directly on the gnatmake command line. This procedure
     --  records these switches so that gnatmake can pass them to the right
!    --  program. S is the switch to be added at the end of the command line
     --  for Program if Append_Switch is True. If Append_Switch is False S is
     --  added at the beginning of the command line.
  
*************** package body Make is
*** 3789,3795 ****
  
                 if Gprbuild = null then
                    Fail_Program
!                     ("project files are no longer supported by gnamake;" &
                       " use gprbuild instead");
                 end if;
  
--- 3789,3795 ----
  
                 if Gprbuild = null then
                    Fail_Program
!                     ("project files are no longer supported by gnatmake;" &
                       " use gprbuild instead");
                 end if;
  
*************** package body Make is
*** 4516,4522 ****
                 end;
              end if;
  
!          elsif Argv'Length >= 8 and then Argv (1 .. 8) = "--param=" then
              Add_Switch (Argv, Compiler);
              Add_Switch (Argv, Linker);
  
--- 4516,4524 ----
                 end;
              end if;
  
!          elsif (Argv'Length >= 8 and then Argv (1 .. 8) = "--param=")
!            or else (Argv'Length >= 10 and then Argv (1 .. 10) = "--sysroot=")
!          then
              Add_Switch (Argv, Compiler);
              Add_Switch (Argv, Linker);
  
diff -Nrcpad gcc-9.3.0/gcc/ada/make_util.ads gcc-10.1.0/gcc/ada/make_util.ads
*** gcc-9.3.0/gcc/ada/make_util.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/make_util.ads	Thu May  7 10:49:59 2020
*************** package Make_Util is
*** 50,56 ****
     --  Name of the configuration file used by gprbuild and generated by
     --  gprconfig by default.
  
!    On_Windows : constant Boolean := Directory_Separator = '\';
     --  True when on Windows
  
     Source_Info_Option : constant String := "--source-info=";
--- 50,56 ----
     --  Name of the configuration file used by gprbuild and generated by
     --  gprconfig by default.
  
!    On_Windows : Boolean renames Osint.On_Windows;
     --  True when on Windows
  
     Source_Info_Option : constant String := "--source-info=";
diff -Nrcpad gcc-9.3.0/gcc/ada/mingw32.h gcc-10.1.0/gcc/ada/mingw32.h
*** gcc-9.3.0/gcc/ada/mingw32.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/mingw32.h	Thu May  7 10:49:59 2020
***************
*** 56,61 ****
--- 56,62 ----
  /* Note: windows.h on cygwin-64 includes x86intrin.h which uses malloc.
     That fails to compile, if malloc is poisoned, i.e. if !IN_RTS.  */
  #define _X86INTRIN_H_INCLUDED
+ #define _EMMINTRIN_H_INCLUDED
  #endif
  #include <windows.h>
  
diff -Nrcpad gcc-9.3.0/gcc/ada/mkdir.c gcc-10.1.0/gcc/ada/mkdir.c
*** gcc-9.3.0/gcc/ada/mkdir.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/mkdir.c	Thu May  7 10:49:59 2020
***************
*** 35,42 ****
  #endif /* __vxworks */
  
  #ifdef IN_RTS
! #include "tconfig.h"
! #include "tsystem.h"
  #include <sys/stat.h>
  #else
  #include "config.h"
--- 35,41 ----
  #endif /* __vxworks */
  
  #ifdef IN_RTS
! #include "runtime.h"
  #include <sys/stat.h>
  #else
  #include "config.h"
diff -Nrcpad gcc-9.3.0/gcc/ada/namet.adb gcc-10.1.0/gcc/ada/namet.adb
*** gcc-9.3.0/gcc/ada/namet.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/namet.adb	Thu May  7 10:49:59 2020
*************** package body Namet is
*** 1497,1502 ****
--- 1497,1529 ----
        return N1 = N2 or else Get_Name_String (N1) = Get_Name_String (N2);
     end Name_Equals;
  
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (Nam : File_Name_Type) return Boolean is
+    begin
+       return Nam /= No_File;
+    end Present;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (Nam : Name_Id) return Boolean is
+    begin
+       return Nam /= No_Name;
+    end Present;
+ 
+    -------------
+    -- Present --
+    -------------
+ 
+    function Present (Nam : Unit_Name_Type) return Boolean is
+    begin
+       return Nam /= No_Unit_Name;
+    end Present;
+ 
     ------------------
     -- Reinitialize --
     ------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/namet.ads gcc-10.1.0/gcc/ada/namet.ads
*** gcc-9.3.0/gcc/ada/namet.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/namet.ads	Thu May  7 10:49:59 2020
*************** package Namet is
*** 38,44 ****
  
  --  WARNING: There is a C version of this package. Any changes to this
  --  source file must be properly reflected in the C header file namet.h
- --  which is created manually from namet.ads and namet.adb.
  
  --  This package contains routines for handling the names table. The table
  --  is used to store character strings for identifiers and operator symbols,
--- 38,43 ----
*************** package Namet is
*** 204,209 ****
--- 203,212 ----
     subtype Valid_Name_Id is Name_Id range First_Name_Id .. Name_Id'Last;
     --  All but No_Name and Error_Name
  
+    function Present (Nam : Name_Id) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether name Nam exists
+ 
     ------------------------------
     -- Name_Id Membership Tests --
     ------------------------------
*************** package Namet is
*** 427,433 ****
     --  Uhh encoding (hh = hex code), other 16-bit wide character values are
     --  stored using the Whhhh (hhhh = hex code) encoding, and other 32-bit wide
     --  wide character values are stored using the WWhhhhhhhh (hhhhhhhh = hex
!    --  code).  Note that this procedure does not fold upper case letters (they
     --  are stored using the Uhh encoding).
  
     procedure Set_Character_Literal_Name
--- 430,436 ----
     --  Uhh encoding (hh = hex code), other 16-bit wide character values are
     --  stored using the Whhhh (hhhh = hex code) encoding, and other 32-bit wide
     --  wide character values are stored using the WWhhhhhhhh (hhhhhhhh = hex
!    --  code). Note that this procedure does not fold upper case letters (they
     --  are stored using the Uhh encoding).
  
     procedure Set_Character_Literal_Name
*************** package Namet is
*** 626,631 ****
--- 629,638 ----
     --  Constant used to indicate no file is present (this is used for example
     --  when a search for a file indicates that no file of the name exists).
  
+    function Present (Nam : File_Name_Type) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether file name Nam exists
+ 
     Error_File_Name : constant File_Name_Type := File_Name_Type (Error_Name);
     --  The special File_Name_Type value Error_File_Name is used to indicate
     --  a unit name where some previous processing has found an error.
*************** package Namet is
*** 650,655 ****
--- 657,666 ----
     No_Unit_Name : constant Unit_Name_Type := Unit_Name_Type (No_Name);
     --  Constant used to indicate no file name present
  
+    function Present (Nam : Unit_Name_Type) return Boolean;
+    pragma Inline (Present);
+    --  Determine whether unit name Nam exists
+ 
     Error_Unit_Name : constant Unit_Name_Type := Unit_Name_Type (Error_Name);
     --  The special Unit_Name_Type value Error_Unit_Name is used to indicate
     --  a unit name where some previous processing has found an error.
diff -Nrcpad gcc-9.3.0/gcc/ada/namet.h gcc-10.1.0/gcc/ada/namet.h
*** gcc-9.3.0/gcc/ada/namet.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/namet.h	Thu May  7 10:49:59 2020
***************
*** 23,31 ****
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C file that corresponds to the Ada package specification
!    Namet.  It was created manually from files namet.ads and namet.adb.
!    Subprograms from Exp_Dbug and Sinput are also made accessible here.  */
  
  #ifdef __cplusplus
  extern "C" {
--- 23,32 ----
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header that corresponds to the Ada package specification for
!    Namet.  It also contains the implementation of inlined functions from the
!    package body for Namet.  It was created manually from namet.ads and
!    namet.adb and must be kept synchronized with changes in these files.  */
  
  #ifdef __cplusplus
  extern "C" {
*************** Get_Name_String (Name_Id Id)
*** 85,127 ****
  #define Name_Equals namet__name_equals
  extern Boolean Name_Equals (Name_Id, Name_Id);
  
- /* The following routines and variables are not part of Namet, but we
-    include the header here since it seems the best place for it.  */
- 
- #define Get_Encoded_Type_Name exp_dbug__get_encoded_type_name
- extern Boolean Get_Encoded_Type_Name (Entity_Id);
- #define Get_Variant_Encoding exp_dbug__get_variant_encoding
- extern void Get_Variant_Encoding (Entity_Id);
- 
- #define Spec_Context_List exp_dbug__spec_context_list
- #define Body_Context_List exp_dbug__body_context_list
- extern char *Spec_Context_List, *Body_Context_List;
- #define Spec_Filename exp_dbug__spec_filename
- #define Body_Filename exp_dbug__body_filename
- extern char *Spec_Filename, *Body_Filename;
- 
- /* Here are some functions in sinput.adb we call from trans.c.  */
- 
- typedef Nat Source_File_Index;
- typedef Int Logical_Line_Number;
- typedef Int Column_Number;
- 
- #define Debug_Source_Name sinput__debug_source_name
- #define Full_Debug_Name sinput__full_debug_name
- #define Reference_Name sinput__reference_name
- #define Get_Source_File_Index sinput__get_source_file_index
- #define Get_Logical_Line_Number sinput__get_logical_line_number
- #define Get_Column_Number sinput__get_column_number
- #define Instantiation sinput__instantiation
- 
- extern File_Name_Type Debug_Source_Name	(Source_File_Index);
- extern File_Name_Type Full_Debug_Name	(Source_File_Index);
- extern File_Name_Type Reference_Name	(Source_File_Index);
- extern Source_File_Index Get_Source_File_Index (Source_Ptr);
- extern Logical_Line_Number Get_Logical_Line_Number (Source_Ptr);
- extern Column_Number Get_Column_Number (Source_Ptr);
- extern Source_Ptr Instantiation (Source_File_Index);
- 
  #ifdef __cplusplus
  }
  #endif
--- 86,91 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/nlists.ads gcc-10.1.0/gcc/ada/nlists.ads
*** gcc-9.3.0/gcc/ada/nlists.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/nlists.ads	Thu May  7 10:49:59 2020
***************
*** 35,40 ****
--- 35,43 ----
  --  package Elists which provides another form of lists that are not threaded
  --  through the nodes (and therefore allow nodes to be on multiple lists).
  
+ --  WARNING: There is a C version of this package. Any changes to this
+ --  source file must be properly reflected in the C header file nlists.h
+ 
  with System;
  with Types; use Types;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/nlists.h gcc-10.1.0/gcc/ada/nlists.h
*** gcc-9.3.0/gcc/ada/nlists.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/nlists.h	Thu May  7 10:49:59 2020
***************
*** 23,31 ****
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header corresponding to the Ada package specification for
!    Nlists. It also contains the implementations of inlined functions from
!    the package body for Nlists.  It was generated manually from nlists.ads and
     nlists.adb and must be kept synchronized with changes in these files.
  
     Note that only routines for reading the tree are included, since the
--- 23,31 ----
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header that corresponds to the Ada package specification for
!    Nlists.  It also contains the implementation of inlined functions from the
!    package body for Nlists.  It was created manually from nlists.ads and
     nlists.adb and must be kept synchronized with changes in these files.
  
     Note that only routines for reading the tree are included, since the
diff -Nrcpad gcc-9.3.0/gcc/ada/opt.adb gcc-10.1.0/gcc/ada/opt.adb
*** gcc-9.3.0/gcc/ada/opt.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/opt.adb	Thu May  7 10:49:59 2020
*************** package body Opt is
*** 248,254 ****
              SPARK_Mode_Pragma        := SPARK_Mode_Pragma_Config;
  
           else
!             if GNAT_Mode_Config then
                 Assertions_Enabled    := Assertions_Enabled_Config;
              else
                 Assertions_Enabled    := False;
--- 248,261 ----
              SPARK_Mode_Pragma        := SPARK_Mode_Pragma_Config;
  
           else
!             --  In GNATprove mode assertions should be always enabled, even
!             --  when analysing internal units.
! 
!             if GNATprove_Mode then
!                pragma Assert (Assertions_Enabled);
!                null;
! 
!             elsif GNAT_Mode_Config then
                 Assertions_Enabled    := Assertions_Enabled_Config;
              else
                 Assertions_Enabled    := False;
diff -Nrcpad gcc-9.3.0/gcc/ada/opt.ads gcc-10.1.0/gcc/ada/opt.ads
*** gcc-9.3.0/gcc/ada/opt.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/opt.ads	Thu May  7 10:49:59 2020
*************** package Opt is
*** 124,134 ****
--- 124,137 ----
  
     type Ada_Version_Type is (Ada_83, Ada_95, Ada_2005, Ada_2012, Ada_2020);
     pragma Ordered (Ada_Version_Type);
+    pragma Convention (C, Ada_Version_Type);
     --  Versions of Ada for Ada_Version below. Note that these are ordered,
     --  so that tests like Ada_Version >= Ada_95 are legitimate and useful.
     --  Think twice before using "="; Ada_Version >= Ada_2012 is more likely
     --  what you want, because it will apply to future versions of the language.
  
+    --  WARNING: There is a matching C declaration of this type in fe.h
+ 
     Ada_Version_Default : constant Ada_Version_Type := Ada_2012;
     pragma Warnings (Off, Ada_Version_Default);
     --  GNAT
*************** package Opt is
*** 141,146 ****
--- 144,151 ----
     --  compiler switches, or implicitly (to Ada_Version_Runtime) when a
     --  predefined or internal file is compiled.
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     Ada_Version_Pragma : Node_Id := Empty;
     --  Reflects the Ada_xxx pragma that resulted in setting Ada_Version. Used
     --  to specialize error messages complaining about the Ada version in use.
*************** package Opt is
*** 191,196 ****
--- 196,206 ----
     --  GNAT, GNATBIND
     --  Set True if package System has the line "type Address is private;"
  
+    Aggregate_Individually_Assign : Boolean := False;
+    --  GNAT
+    --  Set True if record aggregates are to be always converted into assignment
+    --  statements. Set through the corresponding pragma.
+ 
     All_Errors_Mode : Boolean := False;
     --  GNAT
     --  Flag set to force display of multiple errors on a single line and
*************** package Opt is
*** 268,273 ****
--- 278,285 ----
     --  switches -gnatN or -gnatd.z are used. See circuitry in gnat1drv for the
     --  exact conditions for setting this switch.
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     Bind_Alternate_Main_Name : Boolean := False;
     --  GNATBIND
     --  True if main should be called Alternate_Main_Name.all.
*************** package Opt is
*** 453,458 ****
--- 465,472 ----
     --  of the original source code. Causes debugging information to be
     --  written with respect to the generated code file that is written.
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     Default_Pool : Node_Id := Empty;
     --  GNAT
     --  Used to record the storage pool name (or null literal) that is the
*************** package Opt is
*** 496,507 ****
     Display_Compilation_Progress : Boolean := False;
     --  GNATMAKE, GPRBUILD
     --  Set True (-d switch) to display information on progress while compiling
!    --  files. Internal flag to be used in conjunction with an IDE (e.g GPS).
  
     type Distribution_Stub_Mode_Type is
     --  GNAT
       (No_Stubs,
!       --  Normal mode, no generation/compilation of distribution stubs
  
        Generate_Receiver_Stub_Body,
        --  The unit being compiled is the RCI body, and the compiler will
--- 510,522 ----
     Display_Compilation_Progress : Boolean := False;
     --  GNATMAKE, GPRBUILD
     --  Set True (-d switch) to display information on progress while compiling
!    --  files. Internal flag to be used in conjunction with an IDE
!    --  (e.g GNAT Studio).
  
     type Distribution_Stub_Mode_Type is
     --  GNAT
       (No_Stubs,
!       --  Normal mode, no generation of distribution stubs
  
        Generate_Receiver_Stub_Body,
        --  The unit being compiled is the RCI body, and the compiler will
*************** package Opt is
*** 513,520 ****
  
     Distribution_Stub_Mode : Distribution_Stub_Mode_Type := No_Stubs;
     --  GNAT
!    --  This enumeration variable indicates the five states of distribution
!    --  annex stub generation/compilation.
  
     Do_Not_Execute : Boolean := False;
     --  GNATMAKE
--- 528,535 ----
  
     Distribution_Stub_Mode : Distribution_Stub_Mode_Type := No_Stubs;
     --  GNAT
!    --  This enumeration variable indicates the three states of distribution
!    --  annex stub generation.
  
     Do_Not_Execute : Boolean := False;
     --  GNATMAKE
*************** package Opt is
*** 589,599 ****
--- 604,618 ----
     --  associated with exception messages (in particular range and index
     --  checks).
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     Exception_Locations_Suppressed : Boolean := False;
     --  GNAT
     --  Set to True if a Suppress_Exception_Locations configuration pragma is
     --  currently active.
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     type Exception_Mechanism_Type is
     --  Determines the kind of mechanism used to handle exceptions
     --
*************** package Opt is
*** 615,629 ****
        --  Similar to Back_End_ZCX with respect to the front-end processing
        --  of regular and AT-END handlers. A setjmp/longjmp scheme is used to
        --  propagate and setup handler contexts on regular execution paths.
- 
     pragma Convention (C, Exception_Mechanism_Type);
  
     Exception_Mechanism : Exception_Mechanism_Type := Front_End_SJLJ;
     --  GNAT
     --  Set to the appropriate value depending on the flags in system.ads
     --  (Frontend_Exceptions + ZCX_By_Default). The C convention is there to
     --  allow access by gigi.
  
     function Back_End_Exceptions return Boolean;
     function Front_End_Exceptions return Boolean;
     function ZCX_Exceptions return Boolean;
--- 634,651 ----
        --  Similar to Back_End_ZCX with respect to the front-end processing
        --  of regular and AT-END handlers. A setjmp/longjmp scheme is used to
        --  propagate and setup handler contexts on regular execution paths.
     pragma Convention (C, Exception_Mechanism_Type);
  
+    --  WARNING: There is a matching C declaration of this type in fe.h
+ 
     Exception_Mechanism : Exception_Mechanism_Type := Front_End_SJLJ;
     --  GNAT
     --  Set to the appropriate value depending on the flags in system.ads
     --  (Frontend_Exceptions + ZCX_By_Default). The C convention is there to
     --  allow access by gigi.
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     function Back_End_Exceptions return Boolean;
     function Front_End_Exceptions return Boolean;
     function ZCX_Exceptions return Boolean;
*************** package Opt is
*** 631,636 ****
--- 653,660 ----
     --  GNAT
     --  Various properties of the active Exception_Mechanism
  
+    --  WARNING: There is a matching C declaration of these subprograms in fe.h
+ 
     Exception_Tracebacks : Boolean := False;
     --  GNATBIND
     --  Set to True to store tracebacks in exception occurrences (-Ea or -E)
*************** package Opt is
*** 746,754 ****
     --  file name with extension stripped.
  
     Generate_C_Code : Boolean := False;
!    --  GNAT
     --  If True, the Cprint circuitry to generate C code output is activated.
!    --  Set True by use of -gnateg or -gnatd.V.
  
     Generate_CodePeer_Messages : Boolean := False;
     --  GNAT
--- 770,778 ----
     --  file name with extension stripped.
  
     Generate_C_Code : Boolean := False;
!    --  GNAT, GNATBIND
     --  If True, the Cprint circuitry to generate C code output is activated.
!    --  Set True by use of -gnateg or -gnatd.V for GNAT, and -G for GNATBIND.
  
     Generate_CodePeer_Messages : Boolean := False;
     --  GNAT
*************** package Opt is
*** 775,780 ****
--- 799,806 ----
     --  True when switch -fdump-scos is used. When True, a table of instances is
     --  included in SCOs.
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     Generating_Code : Boolean := False;
     --  GNAT
     --  True if the frontend finished its work and has called the backend to
*************** package Opt is
*** 947,952 ****
--- 973,983 ----
     --  Set to True when the pre-18.x access-before-elaboration model is to be
     --  used. Modified by use of -gnatH.
  
+    Legacy_Elaboration_Order : Boolean := False;
+    --  GNATBIND
+    --  Set to True when the pre-20.x elaboration-order model is to be used.
+    --  Modified by use of -H.
+ 
     Link_Only : Boolean := False;
     --  GNATMAKE, GPRBUILD
     --  Set to True to skip compile and bind steps (except when Bind_Only is
*************** package Opt is
*** 997,1002 ****
--- 1028,1035 ----
     --    3 = like 2, but variable fields are decoded symbolically
     --    4 = like 3, but list rep info for relevant compiler-generated types
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     List_Representation_Info_To_File : Boolean := False;
     --  GNAT
     --  Set true by -gnatRs switch. Causes information from -gnatR[1-4]m to be
*************** package Opt is
*** 1115,1120 ****
--- 1148,1159 ----
     --  Maximum number of processes that should be spawned to carry out
     --  compilations.
  
+    Minimal_Binder : Boolean := False;
+    --  GNATBIND
+    --  Set to True to suppress the generation of objects by the binder that
+    --  are not strictly required for a program to run. Intended for ZFP
+    --  applications that have tight memory constraints.
+ 
     Minimal_Recompilation : Boolean := False;
     --  GNATMAKE
     --  Set to True if minimal recompilation mode requested
*************** package Opt is
*** 1192,1197 ****
--- 1231,1238 ----
     --  GNAT
     --  Set True if pragma No_Strict_Aliasing with no parameters encountered.
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     No_Tagged_Streams : Node_Id := Empty;
     --  GNAT
     --  If a pragma No_Tagged_Streams is active for the current scope, this
*************** package Opt is
*** 1524,1529 ****
--- 1565,1572 ----
     --  GNAT
     --  Set to True if -gnatp (suppress all checks) switch present.
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     Suppress_Options : Suppress_Record;
     --  GNAT
     --  Indicates outer level setting of check suppression. This initializes
*************** package Opt is
*** 1730,1735 ****
--- 1773,1784 ----
     --  including warnings on Ada 2012 obsolescent features used in Ada 2012
     --  mode. Modified by use of -gnatwy/Y.
  
+    Warn_On_Ada_202X_Compatibility : Boolean := True;
+    --  GNAT
+    --  Set to True to generate all warnings on Ada 202X compatibility issues,
+    --  including warnings on Ada 202X obsolescent features used in Ada 202X
+    --  mode. ???There is no warning switch for this yet.
+ 
     Warn_On_All_Unread_Out_Parameters : Boolean := False;
     --  GNAT
     --  Set to True to generate warnings in all cases where a variable is
*************** package Opt is
*** 1933,1942 ****
     --  which requires pragma Warnings to be stored for the formal verification
     --  backend.
  
-    Warnings_As_Errors_Count : Natural;
-    --  GNAT
-    --  Number of entries stored in Warnings_As_Errors table
- 
     Wide_Character_Encoding_Method : WC_Encoding_Method := WCEM_Brackets;
     --  GNAT, GNATBIND
     --  Method used for encoding wide characters in the source program. See
--- 1982,1987 ----
*************** package Opt is
*** 1979,1985 ****
     --  set by the command line switches -gnat83/95/2005/2012, and possibly
     --  modified by the use of configuration pragmas Ada_*. This switch is used
     --  to set the initial value for Ada_Version mode at the start of analysis
!    --  of a unit.  Note however that the setting of this flag is ignored for
     --  internal and predefined units (which are always compiled in the most up
     --  to date version of Ada).
  
--- 2024,2030 ----
     --  set by the command line switches -gnat83/95/2005/2012, and possibly
     --  modified by the use of configuration pragmas Ada_*. This switch is used
     --  to set the initial value for Ada_Version mode at the start of analysis
!    --  of a unit. Note however that the setting of this flag is ignored for
     --  internal and predefined units (which are always compiled in the most up
     --  to date version of Ada).
  
*************** package Opt is
*** 2147,2156 ****
     --  is ignored for internal and predefined units (which are always compiled
     --  with the standard Size semantics).
  
-    Warnings_As_Errors_Count_Config : Natural;
-    --  GNAT
-    --  Count of pattern strings stored from Warning_As_Error pragmas
- 
     type Config_Switches_Type is private;
     --  Type used to save values of the switches set from Config values
  
--- 2192,2197 ----
*************** package Opt is
*** 2257,2272 ****
     ---------------------------
  
     --  The following array would more reasonably be located in Err_Vars or
!    --  Errour, but we put them here to deal with licensing issues (we need
     --  this to have the GPL exception licensing, since these variables and
     --  subprograms are accessed from units with this licensing).
  
     Warnings_As_Errors : array (1 .. 10_000) of String_Ptr;
!    --  Table for recording Warning_As_Error pragmas as they are processed.
!    --  It would be nicer to use Table, but there are circular elaboration
!    --  problems if we try to do this, and an attempt to find some other
!    --  appropriately licensed unit to declare this as a Table failed with
!    --  various elaboration circularities. Memory is getting cheap these days!
  
     ---------------
     -- GNAT_Mode --
--- 2298,2321 ----
     ---------------------------
  
     --  The following array would more reasonably be located in Err_Vars or
!    --  Errout, but we put them here to deal with licensing issues (we need
     --  this to have the GPL exception licensing, since these variables and
     --  subprograms are accessed from units with this licensing).
  
     Warnings_As_Errors : array (1 .. 10_000) of String_Ptr;
!    --  Table for recording Warning_As_Error pragmas as they are processed. It
!    --  would be nicer to use Table, but there are circular elaboration problems
!    --  if we try to do this, and an attempt to find some other appropriately
!    --  licensed unit to declare this as a Table failed with various elaboration
!    --  circularities.
! 
!    Warnings_As_Errors_Count : Natural;
!    --  GNAT
!    --  Number of entries stored in Warnings_As_Errors table
! 
!    Warnings_As_Errors_Count_Config : Natural;
!    --  GNAT
!    --  Count of pattern strings stored from Warning_As_Error pragmas
  
     ---------------
     -- GNAT_Mode --
*************** package Opt is
*** 2276,2281 ****
--- 2325,2332 ----
     --  GNAT
     --  True if compiling in GNAT system mode (-gnatg switch)
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     GNAT_Mode_Config : Boolean := False;
     --  GNAT
     --  True if -gnatg switch is present. GNAT_Mode may be temporary set to
diff -Nrcpad gcc-9.3.0/gcc/ada/osint-c.adb gcc-10.1.0/gcc/ada/osint-c.adb
*** gcc-9.3.0/gcc/ada/osint-c.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/osint-c.adb	Thu May  7 10:49:59 2020
*************** package body Osint.C is
*** 385,390 ****
--- 385,405 ----
           end if;
        end loop;
  
+       --  If we are in multiple-units-per-file mode, then add a ~nnn extension
+       --  to the name.
+ 
+       if Multiple_Unit_Index /= 0 then
+          declare
+             Exten : constant String := Name_Buffer (Dot_Index .. Name_Len);
+          begin
+             Name_Len := Dot_Index - 1;
+             Add_Char_To_Name_Buffer (Multi_Unit_Index_Character);
+             Add_Nat_To_Name_Buffer (Multiple_Unit_Index);
+             Dot_Index := Name_Len + 1;
+             Add_Str_To_Name_Buffer (Exten);
+          end;
+       end if;
+ 
        --  Make sure that the output file name matches the source file name.
        --  To compare them, remove file name directories and extensions.
  
*************** package body Osint.C is
*** 395,415 ****
  
           Name_Buffer (Dot_Index) := '.';
  
-          --  If we are in multiple unit per file mode, then add ~nnn
-          --  extension to the name before doing the comparison.
- 
-          if Multiple_Unit_Index /= 0 then
-             declare
-                Exten : constant String := Name_Buffer (Dot_Index .. Name_Len);
-             begin
-                Name_Len := Dot_Index - 1;
-                Add_Char_To_Name_Buffer (Multi_Unit_Index_Character);
-                Add_Nat_To_Name_Buffer (Multiple_Unit_Index);
-                Dot_Index := Name_Len + 1;
-                Add_Str_To_Name_Buffer (Exten);
-             end;
-          end if;
- 
           --  Remove extension preparing to replace it
  
           declare
--- 410,415 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/osint.adb gcc-10.1.0/gcc/ada/osint.adb
*** gcc-9.3.0/gcc/ada/osint.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/osint.adb	Thu May  7 10:49:59 2020
*************** package body Osint is
*** 88,93 ****
--- 88,97 ----
     function OS_Time_To_GNAT_Time (T : OS_Time) return Time_Stamp_Type;
     --  Convert OS format time to GNAT format time stamp. If T is Invalid_Time,
     --  then returns Empty_Time_Stamp.
+    --  Round to even seconds on Windows before conversion.
+    --  Windows ALI files had timestamps rounded to even seconds historically.
+    --  The rounding was originally done in GM_Split. Now that GM_Split no
+    --  longer does it, we are rounding it here only for ALI files.
  
     function Executable_Prefix return String_Ptr;
     --  Returns the name of the root directory where the executable is stored.
*************** package body Osint is
*** 1422,1427 ****
--- 1426,1440 ----
        return Name_Find;
     end Get_Directory;
  
+    ------------------------------
+    -- Get_First_Main_File_Name --
+    ------------------------------
+ 
+    function Get_First_Main_File_Name return String is
+    begin
+       return File_Names (1).all;
+    end Get_First_Main_File_Name;
+ 
     --------------------------
     -- Get_Next_Dir_In_Path --
     --------------------------
*************** package body Osint is
*** 2170,2175 ****
--- 2183,2201 ----
     function OS_Time_To_GNAT_Time (T : OS_Time) return Time_Stamp_Type is
        GNAT_Time : Time_Stamp_Type;
  
+       type Underlying_OS_Time is
+         range -(2 ** (Standard'Address_Size - Integer'(1))) ..
+               +(2 ** (Standard'Address_Size - Integer'(1)) - 1);
+       --  Underlying_OS_Time is a redeclaration of OS_Time to allow integer
+       --  manipulation. Remove this in favor of To_Ada/To_C once newer
+       --  GNAT releases are available with these functions.
+ 
+       function To_Int is
+         new Unchecked_Conversion (OS_Time, Underlying_OS_Time);
+       function From_Int is
+         new Unchecked_Conversion (Underlying_OS_Time, OS_Time);
+ 
+       TI : Underlying_OS_Time := To_Int (T);
        Y  : Year_Type;
        Mo : Month_Type;
        D  : Day_Type;
*************** package body Osint is
*** 2182,2188 ****
           return Empty_Time_Stamp;
        end if;
  
!       GM_Split (T, Y, Mo, D, H, Mn, S);
        Make_Time_Stamp
          (Year    => Nat (Y),
           Month   => Nat (Mo),
--- 2208,2224 ----
           return Empty_Time_Stamp;
        end if;
  
!       if On_Windows and then TI mod 2 > 0 then
!          --  Windows ALI files had timestamps rounded to even seconds
!          --  historically. The rounding was originally done in GM_Split.
!          --  Now that GM_Split no longer does it, we are rounding it here
!          --  only for ALI files.
! 
!          TI := TI + 1;
!       end if;
! 
!       GM_Split (From_Int (TI), Y, Mo, D, H, Mn, S);
! 
        Make_Time_Stamp
          (Year    => Nat (Y),
           Month   => Nat (Mo),
diff -Nrcpad gcc-9.3.0/gcc/ada/osint.ads gcc-10.1.0/gcc/ada/osint.ads
*** gcc-9.3.0/gcc/ada/osint.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/osint.ads	Thu May  7 10:49:59 2020
*************** package Osint is
*** 56,61 ****
--- 56,64 ----
     --  File descriptor for current library info, list, tree, C, H, or binder
     --  output. Only one of these is open at a time, so we need only one FD.
  
+    On_Windows : constant Boolean := Directory_Separator = '\';
+    --  True when on Windows
+ 
     procedure Initialize;
     --  Initialize internal tables
  
*************** package Osint is
*** 511,516 ****
--- 514,522 ----
     procedure Dump_Command_Line_Source_File_Names;
     --  Prints out the names of all source files on the command-line
  
+    function Get_First_Main_File_Name return String;
+    --  Return the file name of the first main file
+ 
     -------------------------------------------
     -- Representation of Library Information --
     -------------------------------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/par-ch10.adb gcc-10.1.0/gcc/ada/par-ch10.adb
*** gcc-9.3.0/gcc/ada/par-ch10.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-ch10.adb	Thu May  7 10:49:59 2020
*************** package body Ch10 is
*** 397,406 ****
                 or else Token in Token_Class_Deckn
              then
                 Push_Scope_Stack;
!                Scope.Table (Scope.Last).Etyp := E_Name;
!                Scope.Table (Scope.Last).Sloc := SIS_Sloc;
!                Scope.Table (Scope.Last).Ecol := SIS_Ecol;
!                Scope.Table (Scope.Last).Lreq := False;
                 SIS_Entry_Active := False;
  
                 --  If we had a missing semicolon in the declaration, then
--- 397,406 ----
                 or else Token in Token_Class_Deckn
              then
                 Push_Scope_Stack;
!                Scopes (Scope.Last).Etyp := E_Name;
!                Scopes (Scope.Last).Sloc := SIS_Sloc;
!                Scopes (Scope.Last).Ecol := SIS_Ecol;
!                Scopes (Scope.Last).Lreq := False;
                 SIS_Entry_Active := False;
  
                 --  If we had a missing semicolon in the declaration, then
diff -Nrcpad gcc-9.3.0/gcc/ada/par-ch12.adb gcc-10.1.0/gcc/ada/par-ch12.adb
*** gcc-9.3.0/gcc/ada/par-ch12.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-ch12.adb	Thu May  7 10:49:59 2020
*************** package body Ch12 is
*** 302,308 ****
  
        elsif Token /= Tok_Left_Paren
          and then Token_Is_At_Start_Of_Line
!         and then Start_Column <= Scope.Table (Scope.Last).Ecol
        then
           return No_List;
  
--- 302,308 ----
  
        elsif Token /= Tok_Left_Paren
          and then Token_Is_At_Start_Of_Line
!         and then Start_Column <= Scopes (Scope.Last).Ecol
        then
           return No_List;
  
*************** package body Ch12 is
*** 971,979 ****
        end if;
  
        if Token = Tok_With then
!          Scan; -- past WITH
!          Set_Private_Present (Def_Node, True);
!          T_Private;
  
        elsif Token = Tok_Tagged then
           Scan;
--- 971,986 ----
        end if;
  
        if Token = Tok_With then
! 
!          if Ada_Version >= Ada_2020 and Token /= Tok_Private then
!             --  Formal type has aspect specifications, parsed later.
!             return Def_Node;
! 
!          else
!             Scan; -- past WITH
!             Set_Private_Present (Def_Node, True);
!             T_Private;
!          end if;
  
        elsif Token = Tok_Tagged then
           Scan;
diff -Nrcpad gcc-9.3.0/gcc/ada/par-ch13.adb gcc-10.1.0/gcc/ada/par-ch13.adb
*** gcc-9.3.0/gcc/ada/par-ch13.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-ch13.adb	Thu May  7 10:49:59 2020
*************** package body Ch13 is
*** 528,534 ****
                    Inside_Depends := True;
                 end if;
  
!                --  Parse the aspect definition depening on the expected
                 --  argument kind.
  
                 if Aspect_Argument (A_Id) = Name
--- 528,542 ----
                    Inside_Depends := True;
                 end if;
  
!                --  Note that we have seen an Import aspect specification.
!                --  This matters only while parsing a subprogram.
! 
!                if A_Id = Aspect_Import then
!                   SIS_Aspect_Import_Seen := True;
!                   --  Should do it only for subprograms
!                end if;
! 
!                --  Parse the aspect definition depending on the expected
                 --  argument kind.
  
                 if Aspect_Argument (A_Id) = Name
*************** package body Ch13 is
*** 826,834 ****
              Set_Identifier (Rep_Clause_Node, Identifier_Node);
  
              Push_Scope_Stack;
!             Scope.Table (Scope.Last).Etyp := E_Record;
!             Scope.Table (Scope.Last).Ecol := Start_Column;
!             Scope.Table (Scope.Last).Sloc := Token_Ptr;
              Scan; -- past RECORD
              Record_Items := P_Pragmas_Opt;
  
--- 834,842 ----
              Set_Identifier (Rep_Clause_Node, Identifier_Node);
  
              Push_Scope_Stack;
!             Scopes (Scope.Last).Etyp := E_Record;
!             Scopes (Scope.Last).Ecol := Start_Column;
!             Scopes (Scope.Last).Sloc := Token_Ptr;
              Scan; -- past RECORD
              Record_Items := P_Pragmas_Opt;
  
*************** package body Ch13 is
*** 948,954 ****
  
           --  If Decl is Error, we ignore the aspects, and issue a message
  
!          elsif Decl = Error then
              Error_Msg ("aspect specifications not allowed here", Ptr);
  
           --  Here aspects are allowed, and we store them
--- 956,964 ----
  
           --  If Decl is Error, we ignore the aspects, and issue a message
  
!          elsif Decl = Error
!             or else not Permits_Aspect_Specifications (Decl)
!          then
              Error_Msg ("aspect specifications not allowed here", Ptr);
  
           --  Here aspects are allowed, and we store them
diff -Nrcpad gcc-9.3.0/gcc/ada/par-ch2.adb gcc-10.1.0/gcc/ada/par-ch2.adb
*** gcc-9.3.0/gcc/ada/par-ch2.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-ch2.adb	Thu May  7 10:49:59 2020
*************** package body Ch2 is
*** 247,257 ****
  
        --  Local variables
  
-       Interface_Check_Required : Boolean := False;
-       --  Set True if check of pragma INTERFACE is required
- 
        Import_Check_Required : Boolean := False;
!       --  Set True if check of pragma IMPORT is required
  
        Arg_Count : Nat := 0;
        --  Number of argument associations processed
--- 247,254 ----
  
        --  Local variables
  
        Import_Check_Required : Boolean := False;
!       --  Set True if check of pragma IMPORT or INTERFACE is required
  
        Arg_Count : Nat := 0;
        --  Number of argument associations processed
*************** package body Ch2 is
*** 295,305 ****
        --  See if special INTERFACE/IMPORT check is required
  
        if SIS_Entry_Active then
!          Interface_Check_Required := (Prag_Name = Name_Interface);
!          Import_Check_Required    := (Prag_Name = Name_Import);
        else
!          Interface_Check_Required := False;
!          Import_Check_Required    := False;
        end if;
  
        --  Set global to indicate if we are within a Depends pragma
--- 292,301 ----
        --  See if special INTERFACE/IMPORT check is required
  
        if SIS_Entry_Active then
!          Import_Check_Required :=
!            (Prag_Name = Name_Import) or else (Prag_Name = Name_Interface);
        else
!          Import_Check_Required := False;
        end if;
  
        --  Set global to indicate if we are within a Depends pragma
*************** package body Ch2 is
*** 331,339 ****
                   Nam_In (Prag_Name, Name_Restriction_Warnings,
                                      Name_Restrictions));
  
!             if Arg_Count = 2
!               and then (Interface_Check_Required or else Import_Check_Required)
!             then
                 --  Here is where we cancel the SIS active status if this pragma
                 --  supplies a body for the currently active subprogram spec.
  
--- 327,333 ----
                   Nam_In (Prag_Name, Name_Restriction_Warnings,
                                      Name_Restrictions));
  
!             if Arg_Count = 2 and then Import_Check_Required then
                 --  Here is where we cancel the SIS active status if this pragma
                 --  supplies a body for the currently active subprogram spec.
  
diff -Nrcpad gcc-9.3.0/gcc/ada/par-ch3.adb gcc-10.1.0/gcc/ada/par-ch3.adb
*** gcc-9.3.0/gcc/ada/par-ch3.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-ch3.adb	Thu May  7 10:49:59 2020
*************** package body Ch3 is
*** 228,235 ****
           raise Error_Resync;
        end if;
  
        Ident_Node := Token_Node;
!       Scan; -- past the reserved identifier
  
        --  If we already have a defining identifier, clean it out and make
        --  a new clean identifier. This situation arises in some error cases
--- 228,239 ----
           raise Error_Resync;
        end if;
  
+       if Style_Check then
+          Style.Check_Defining_Identifier_Casing;
+       end if;
+ 
        Ident_Node := Token_Node;
!       Scan; -- past the identifier
  
        --  If we already have a defining identifier, clean it out and make
        --  a new clean identifier. This situation arises in some error cases
*************** package body Ch3 is
*** 3334,3344 ****
  
        else
           Push_Scope_Stack;
!          Scope.Table (Scope.Last).Etyp := E_Record;
!          Scope.Table (Scope.Last).Ecol := Start_Column;
!          Scope.Table (Scope.Last).Sloc := Token_Ptr;
!          Scope.Table (Scope.Last).Labl := Error;
!          Scope.Table (Scope.Last).Junk := (Token /= Tok_Record);
  
           T_Record;
  
--- 3338,3348 ----
  
        else
           Push_Scope_Stack;
!          Scopes (Scope.Last).Etyp := E_Record;
!          Scopes (Scope.Last).Ecol := Start_Column;
!          Scopes (Scope.Last).Sloc := Token_Ptr;
!          Scopes (Scope.Last).Labl := Error;
!          Scopes (Scope.Last).Junk := (Token /= Tok_Record);
  
           T_Record;
  
*************** package body Ch3 is
*** 3415,3421 ****
              --  additional clue that confirms the incorrect spelling.
  
              if Token /= Tok_Identifier then
!                if Start_Column > Scope.Table (Scope.Last).Ecol
                   and then Is_Reserved_Identifier
                 then
                    Save_Scan_State (Scan_State); -- at reserved id
--- 3419,3425 ----
              --  additional clue that confirms the incorrect spelling.
  
              if Token /= Tok_Identifier then
!                if Start_Column > Scopes (Scope.Last).Ecol
                   and then Is_Reserved_Identifier
                 then
                    Save_Scan_State (Scan_State); -- at reserved id
*************** package body Ch3 is
*** 3657,3665 ****
     begin
        Variant_Part_Node := New_Node (N_Variant_Part, Token_Ptr);
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Etyp := E_Case;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
!       Scope.Table (Scope.Last).Ecol := Start_Column;
  
        Scan; -- past CASE
        Case_Node := P_Expression;
--- 3661,3669 ----
     begin
        Variant_Part_Node := New_Node (N_Variant_Part, Token_Ptr);
        Push_Scope_Stack;
!       Scopes (Scope.Last).Etyp := E_Case;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
!       Scopes (Scope.Last).Ecol := Start_Column;
  
        Scan; -- past CASE
        Case_Node := P_Expression;
*************** package body Ch3 is
*** 4510,4520 ****
                    --  scan it out
  
                    Push_Scope_Stack;
!                   Scope.Table (Scope.Last).Sloc := SIS_Sloc;
!                   Scope.Table (Scope.Last).Etyp := E_Name;
!                   Scope.Table (Scope.Last).Ecol := SIS_Ecol;
!                   Scope.Table (Scope.Last).Labl := SIS_Labl;
!                   Scope.Table (Scope.Last).Lreq := False;
                    SIS_Entry_Active := False;
                    Scan; -- past BEGIN
                    Set_Handled_Statement_Sequence (Body_Node,
--- 4514,4524 ----
                    --  scan it out
  
                    Push_Scope_Stack;
!                   Scopes (Scope.Last).Sloc := SIS_Sloc;
!                   Scopes (Scope.Last).Etyp := E_Name;
!                   Scopes (Scope.Last).Ecol := SIS_Ecol;
!                   Scopes (Scope.Last).Labl := SIS_Labl;
!                   Scopes (Scope.Last).Lreq := False;
                    SIS_Entry_Active := False;
                    Scan; -- past BEGIN
                    Set_Handled_Statement_Sequence (Body_Node,
diff -Nrcpad gcc-9.3.0/gcc/ada/par-ch4.adb gcc-10.1.0/gcc/ada/par-ch4.adb
*** gcc-9.3.0/gcc/ada/par-ch4.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-ch4.adb	Thu May  7 10:49:59 2020
*************** package body Ch4 is
*** 81,86 ****
--- 81,88 ----
     function P_Primary                                 return Node_Id;
     function P_Relation                                return Node_Id;
     function P_Term                                    return Node_Id;
+    function P_Reduction_Attribute_Reference (S : Node_Id)
+       return Node_Id;
  
     function P_Binary_Adding_Operator                  return Node_Kind;
     function P_Logical_Operator                        return Node_Kind;
*************** package body Ch4 is
*** 1202,1213 ****
--- 1204,1251 ----
        return Attr_Node;
     end P_Range_Attribute_Reference;
  
+    -------------------------------------
+    -- P_Reduction_Attribute_Reference --
+    -------------------------------------
+ 
+    function P_Reduction_Attribute_Reference (S : Node_Id)
+       return Node_Id
+    is
+       Attr_Node  : Node_Id;
+       Attr_Name  : Name_Id;
+ 
+    begin
+       Attr_Name := Token_Name;
+       Scan;   --  past Reduce
+       Attr_Node := New_Node (N_Attribute_Reference, Token_Ptr);
+       Set_Attribute_Name (Attr_Node, Attr_Name);
+       if Attr_Name /= Name_Reduce then
+          Error_Msg ("reduce attribute expected", Prev_Token_Ptr);
+       end if;
+ 
+       Set_Prefix (Attr_Node, S);
+       Set_Expressions (Attr_Node, New_List);
+       T_Left_Paren;
+       Append (P_Name, Expressions (Attr_Node));
+       T_Comma;
+       Append (P_Expression, Expressions (Attr_Node));
+       T_Right_Paren;
+ 
+       return Attr_Node;
+    end P_Reduction_Attribute_Reference;
+ 
     ---------------------------------------
     -- 4.1.4  Range Attribute Designator --
     ---------------------------------------
  
     --  Parsed by P_Range_Attribute_Reference (4.4)
  
+    ---------------------------------------------
+    -- 4.1.4 (2) Reduction_Attribute_Reference --
+    ---------------------------------------------
+ 
+    --  parsed by P_Reduction_Attribute_Reference
+ 
     --------------------
     -- 4.3  Aggregate --
     --------------------
*************** package body Ch4 is
*** 1229,1234 ****
--- 1267,1273 ----
        if Nkind (Aggr_Node) /= N_Aggregate
             and then
           Nkind (Aggr_Node) /= N_Extension_Aggregate
+          and then Ada_Version < Ada_2020
        then
           Error_Msg
             ("aggregate may not have single positional component", Aggr_Sloc);
*************** package body Ch4 is
*** 1343,1349 ****
  
     begin
        Lparen_Sloc := Token_Ptr;
!       T_Left_Paren;
  
        --  Note on parentheses count. For cases like an if expression, the
        --  parens here really count as real parentheses for the paren count,
--- 1382,1402 ----
  
     begin
        Lparen_Sloc := Token_Ptr;
!       if Token = Tok_Left_Bracket and then Ada_Version >= Ada_2020 then
!          Scan;
! 
!          --  Special case for null aggregate in Ada2020.
! 
!          if Token = Tok_Right_Bracket then
!             Scan;   --  past ]
!             Aggregate_Node := New_Node (N_Aggregate, Lparen_Sloc);
!             Set_Expressions (Aggregate_Node, New_List);
!             Set_Is_Homogeneous_Aggregate (Aggregate_Node);
!             return Aggregate_Node;
!          end if;
!       else
!          T_Left_Paren;
!       end if;
  
        --  Note on parentheses count. For cases like an if expression, the
        --  parens here really count as real parentheses for the paren count,
*************** package body Ch4 is
*** 1577,1582 ****
--- 1630,1643 ----
  
              Append (Expr_Node, Expr_List);
  
+          elsif Token = Tok_Right_Bracket then
+             if No (Expr_List) then
+                Expr_List := New_List;
+             end if;
+ 
+             Append (Expr_Node, Expr_List);
+             exit;
+ 
           --  Anything else is assumed to be a named association
  
           else
*************** package body Ch4 is
*** 1625,1631 ****
  
        --  All component associations (positional and named) have been scanned
  
!       T_Right_Paren;
  
        if Nkind (Aggregate_Node) /= N_Delta_Aggregate then
           Set_Expressions (Aggregate_Node, Expr_List);
--- 1686,1704 ----
  
        --  All component associations (positional and named) have been scanned
  
!       if Token = Tok_Right_Bracket and then Ada_Version >= Ada_2020 then
!          Set_Component_Associations (Aggregate_Node, Assoc_List);
!          Set_Is_Homogeneous_Aggregate (Aggregate_Node);
!          Scan;  --  past right bracket
!          if Token = Tok_Apostrophe then
!             Scan;
!             if Token = Tok_Identifier then
!                return P_Reduction_Attribute_Reference (Aggregate_Node);
!             end if;
!          end if;
!       else
!          T_Right_Paren;
!       end if;
  
        if Nkind (Aggregate_Node) /= N_Delta_Aggregate then
           Set_Expressions (Aggregate_Node, Expr_List);
*************** package body Ch4 is
*** 2262,2268 ****
           --  capacity-exceeded error. The purpose of this trick is to avoid
           --  creating a deeply nested tree, which would cause deep recursion
           --  during semantics, causing stack overflow. This way, we can handle
!          --  enormous concatenations in the normal case of predefined "&".  We
           --  first build up the normal tree, and then rewrite it if
           --  appropriate.
  
--- 2335,2341 ----
           --  capacity-exceeded error. The purpose of this trick is to avoid
           --  creating a deeply nested tree, which would cause deep recursion
           --  during semantics, causing stack overflow. This way, we can handle
!          --  enormous concatenations in the normal case of predefined "&". We
           --  first build up the normal tree, and then rewrite it if
           --  appropriate.
  
*************** package body Ch4 is
*** 2623,2628 ****
--- 2696,2702 ----
     --  | STRING_LITERAL   | AGGREGATE
     --  | NAME             | QUALIFIED_EXPRESSION
     --  | ALLOCATOR        | (EXPRESSION) | QUANTIFIED_EXPRESSION
+    --  | REDUCTION_ATTRIBUTE_REFERENCE
  
     --  Error recovery: can raise Error_Resync
  
*************** package body Ch4 is
*** 2715,2720 ****
--- 2789,2797 ----
                    return Expr;
                 end;
  
+             when Tok_Left_Bracket =>
+                return P_Aggregate;
+ 
              --  Allocator
  
              when Tok_New =>
*************** package body Ch4 is
*** 2850,2856 ****
  
              when Tok_At_Sign =>  --  AI12-0125 : target_name
                 if Ada_Version < Ada_2020 then
!                   Error_Msg_SC ("target name is an Ada 2020 extension");
                    Error_Msg_SC ("\compile with -gnatX");
                 end if;
  
--- 2927,2933 ----
  
              when Tok_At_Sign =>  --  AI12-0125 : target_name
                 if Ada_Version < Ada_2020 then
!                   Error_Msg_SC ("target name is an Ada 202x feature");
                    Error_Msg_SC ("\compile with -gnatX");
                 end if;
  
*************** package body Ch4 is
*** 3325,3331 ****
        Set_Expression (Assoc_Node, P_Expression);
  
        if Ada_Version < Ada_2020 then
!          Error_Msg_SC ("iterated component is an Ada 2020 extension");
           Error_Msg_SC ("\compile with -gnatX");
        end if;
  
--- 3402,3408 ----
        Set_Expression (Assoc_Node, P_Expression);
  
        if Ada_Version < Ada_2020 then
!          Error_Msg_SC ("iterated component is an Ada 202x feature");
           Error_Msg_SC ("\compile with -gnatX");
        end if;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/par-ch5.adb gcc-10.1.0/gcc/ada/par-ch5.adb
*** gcc-9.3.0/gcc/ada/par-ch5.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-ch5.adb	Thu May  7 10:49:59 2020
*************** package body Ch5 is
*** 358,364 ****
                    --  of the expected column of the end for this sequence
  
                    if SS_Flags.Eftm
!                      or else Start_Column < Scope.Table (Scope.Last).Ecol
                    then
                       Test_Statement_Required;
                       exit;
--- 358,364 ----
                    --  of the expected column of the end for this sequence
  
                    if SS_Flags.Eftm
!                      or else Start_Column < Scopes (Scope.Last).Ecol
                    then
                       Test_Statement_Required;
                       exit;
*************** package body Ch5 is
*** 381,387 ****
                    --  of the expected column of the end for this sequence
  
                    if SS_Flags.Eltm
!                      or else Start_Column < Scope.Table (Scope.Last).Ecol
                    then
                       Test_Statement_Required;
                       exit;
--- 381,387 ----
                    --  of the expected column of the end for this sequence
  
                    if SS_Flags.Eltm
!                      or else Start_Column < Scopes (Scope.Last).Ecol
                    then
                       Test_Statement_Required;
                       exit;
*************** package body Ch5 is
*** 405,411 ****
                    --  is not permitted.
  
                    if not SS_Flags.Extm and then
!                      Start_Column >= Scope.Table (Scope.Last).Ecol
  
                    then
                       Error_Msg_SC ("exception handler not permitted here");
--- 405,411 ----
                    --  is not permitted.
  
                    if not SS_Flags.Extm and then
!                      Start_Column >= Scopes (Scope.Last).Ecol
  
                    then
                       Error_Msg_SC ("exception handler not permitted here");
*************** package body Ch5 is
*** 427,433 ****
                    --  expected column of the end for this sequence.
  
                    if SS_Flags.Ortm
!                      or else Start_Column < Scope.Table (Scope.Last).Ecol
                    then
                       Test_Statement_Required;
                       exit;
--- 427,433 ----
                    --  expected column of the end for this sequence.
  
                    if SS_Flags.Ortm
!                      or else Start_Column < Scopes (Scope.Last).Ecol
                    then
                       Test_Statement_Required;
                       exit;
*************** package body Ch5 is
*** 467,473 ****
                    --  the expected column of the end for this sequence.
  
                    if SS_Flags.Whtm
!                     or else Start_Column < Scope.Table (Scope.Last).Ecol
                    then
                       Test_Statement_Required;
                       exit;
--- 467,473 ----
                    --  the expected column of the end for this sequence.
  
                    if SS_Flags.Whtm
!                     or else Start_Column < Scopes (Scope.Last).Ecol
                    then
                       Test_Statement_Required;
                       exit;
*************** package body Ch5 is
*** 1142,1150 ****
        procedure Check_If_Column is
        begin
           if RM_Column_Check and then Token_Is_At_Start_Of_Line
!            and then Start_Column /= Scope.Table (Scope.Last).Ecol
           then
!             Error_Msg_Col := Scope.Table (Scope.Last).Ecol;
              Error_Msg_SC ("(style) this token should be@");
           end if;
        end Check_If_Column;
--- 1142,1150 ----
        procedure Check_If_Column is
        begin
           if RM_Column_Check and then Token_Is_At_Start_Of_Line
!            and then Start_Column /= Scopes (Scope.Last).Ecol
           then
!             Error_Msg_Col := Scopes (Scope.Last).Ecol;
              Error_Msg_SC ("(style) this token should be@");
           end if;
        end Check_If_Column;
*************** package body Ch5 is
*** 1192,1202 ****
        If_Node := New_Node (N_If_Statement, Token_Ptr);
  
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Etyp := E_If;
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
!       Scope.Table (Scope.Last).Labl := Error;
!       Scope.Table (Scope.Last).Node := If_Node;
  
        if Token = Tok_If then
           Loc := Token_Ptr;
--- 1192,1202 ----
        If_Node := New_Node (N_If_Statement, Token_Ptr);
  
        Push_Scope_Stack;
!       Scopes (Scope.Last).Etyp := E_If;
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
!       Scopes (Scope.Last).Labl := Error;
!       Scopes (Scope.Last).Node := If_Node;
  
        if Token = Tok_If then
           Loc := Token_Ptr;
*************** package body Ch5 is
*** 1350,1360 ****
        Case_Node := New_Node (N_Case_Statement, Token_Ptr);
  
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Etyp := E_Case;
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
!       Scope.Table (Scope.Last).Labl := Error;
!       Scope.Table (Scope.Last).Node := Case_Node;
  
        Scan; -- past CASE
        Set_Expression (Case_Node, P_Expression_No_Right_Paren);
--- 1350,1360 ----
        Case_Node := New_Node (N_Case_Statement, Token_Ptr);
  
        Push_Scope_Stack;
!       Scopes (Scope.Last).Etyp := E_Case;
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
!       Scopes (Scope.Last).Labl := Error;
!       Scopes (Scope.Last).Node := Case_Node;
  
        Scan; -- past CASE
        Set_Expression (Case_Node, P_Expression_No_Right_Paren);
*************** package body Ch5 is
*** 1392,1398 ****
           --  complain about the missing WHEN, and discard the junk statements.
  
           elsif not Token_Is_At_Start_Of_Line
!            or else Start_Column > Scope.Table (Scope.Last).Ecol
           then
              Error_Msg_BC ("WHEN (case statement alternative) expected");
  
--- 1392,1398 ----
           --  complain about the missing WHEN, and discard the junk statements.
  
           elsif not Token_Is_At_Start_Of_Line
!            or else Start_Column > Scopes (Scope.Last).Ecol
           then
              Error_Msg_BC ("WHEN (case statement alternative) expected");
  
*************** package body Ch5 is
*** 1490,1499 ****
  
     begin
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Labl := Loop_Name;
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
!       Scope.Table (Scope.Last).Etyp := E_Loop;
  
        Loop_Node := New_Node (N_Loop_Statement, Token_Ptr);
        TF_Loop;
--- 1490,1499 ----
  
     begin
        Push_Scope_Stack;
!       Scopes (Scope.Last).Labl := Loop_Name;
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
!       Scopes (Scope.Last).Etyp := E_Loop;
  
        Loop_Node := New_Node (N_Loop_Statement, Token_Ptr);
        TF_Loop;
*************** package body Ch5 is
*** 1504,1510 ****
           Set_Comes_From_Source (Created_Name, False);
           Set_Has_Created_Identifier (Loop_Node, True);
           Set_Identifier (Loop_Node, Created_Name);
!          Scope.Table (Scope.Last).Labl := Created_Name;
        else
           Set_Identifier (Loop_Node, Loop_Name);
        end if;
--- 1504,1510 ----
           Set_Comes_From_Source (Created_Name, False);
           Set_Has_Created_Identifier (Loop_Node, True);
           Set_Identifier (Loop_Node, Created_Name);
!          Scopes (Scope.Last).Labl := Created_Name;
        else
           Set_Identifier (Loop_Node, Loop_Name);
        end if;
*************** package body Ch5 is
*** 1536,1545 ****
  
     begin
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Labl := Loop_Name;
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
!       Scope.Table (Scope.Last).Etyp := E_Loop;
  
        Loop_For_Flag := (Prev_Token = Tok_Loop);
        Scan; -- past FOR
--- 1536,1545 ----
  
     begin
        Push_Scope_Stack;
!       Scopes (Scope.Last).Labl := Loop_Name;
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
!       Scopes (Scope.Last).Etyp := E_Loop;
  
        Loop_For_Flag := (Prev_Token = Tok_Loop);
        Scan; -- past FOR
*************** package body Ch5 is
*** 1575,1581 ****
              Set_Comes_From_Source (Created_Name, False);
              Set_Has_Created_Identifier (Loop_Node, True);
              Set_Identifier (Loop_Node, Created_Name);
!             Scope.Table (Scope.Last).Labl := Created_Name;
           else
              Set_Identifier (Loop_Node, Loop_Name);
           end if;
--- 1575,1581 ----
              Set_Comes_From_Source (Created_Name, False);
              Set_Has_Created_Identifier (Loop_Node, True);
              Set_Identifier (Loop_Node, Created_Name);
!             Scopes (Scope.Last).Labl := Created_Name;
           else
              Set_Identifier (Loop_Node, Loop_Name);
           end if;
*************** package body Ch5 is
*** 1607,1616 ****
  
     begin
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Labl := Loop_Name;
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
!       Scope.Table (Scope.Last).Etyp := E_Loop;
  
        Loop_While_Flag := (Prev_Token = Tok_Loop);
        Iter_Scheme_Node := New_Node (N_Iteration_Scheme, Token_Ptr);
--- 1607,1616 ----
  
     begin
        Push_Scope_Stack;
!       Scopes (Scope.Last).Labl := Loop_Name;
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
!       Scopes (Scope.Last).Etyp := E_Loop;
  
        Loop_While_Flag := (Prev_Token = Tok_Loop);
        Iter_Scheme_Node := New_Node (N_Iteration_Scheme, Token_Ptr);
*************** package body Ch5 is
*** 1641,1647 ****
              Set_Comes_From_Source (Created_Name, False);
              Set_Has_Created_Identifier (Loop_Node, True);
              Set_Identifier (Loop_Node, Created_Name);
!             Scope.Table (Scope.Last).Labl := Created_Name;
           else
              Set_Identifier (Loop_Node, Loop_Name);
           end if;
--- 1641,1647 ----
              Set_Comes_From_Source (Created_Name, False);
              Set_Has_Created_Identifier (Loop_Node, True);
              Set_Identifier (Loop_Node, Created_Name);
!             Scopes (Scope.Last).Labl := Created_Name;
           else
              Set_Identifier (Loop_Node, Loop_Name);
           end if;
*************** package body Ch5 is
*** 1805,1815 ****
        Block_Node := New_Node (N_Block_Statement, Token_Ptr);
  
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Etyp := E_Name;
!       Scope.Table (Scope.Last).Lreq := Present (Block_Name);
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Labl := Block_Name;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
  
        Scan; -- past DECLARE
  
--- 1805,1815 ----
        Block_Node := New_Node (N_Block_Statement, Token_Ptr);
  
        Push_Scope_Stack;
!       Scopes (Scope.Last).Etyp := E_Name;
!       Scopes (Scope.Last).Lreq := Present (Block_Name);
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Labl := Block_Name;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
  
        Scan; -- past DECLARE
  
*************** package body Ch5 is
*** 1819,1825 ****
           Set_Comes_From_Source (Created_Name, False);
           Set_Has_Created_Identifier (Block_Node, True);
           Set_Identifier (Block_Node, Created_Name);
!          Scope.Table (Scope.Last).Labl := Created_Name;
        else
           Set_Identifier (Block_Node, Block_Name);
        end if;
--- 1819,1825 ----
           Set_Comes_From_Source (Created_Name, False);
           Set_Has_Created_Identifier (Block_Node, True);
           Set_Identifier (Block_Node, Created_Name);
!          Scopes (Scope.Last).Labl := Created_Name;
        else
           Set_Identifier (Block_Node, Block_Name);
        end if;
*************** package body Ch5 is
*** 1848,1858 ****
        Block_Node := New_Node (N_Block_Statement, Token_Ptr);
  
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Etyp := E_Name;
!       Scope.Table (Scope.Last).Lreq := Present (Block_Name);
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Labl := Block_Name;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
  
        if No (Block_Name) then
           Created_Name :=
--- 1848,1858 ----
        Block_Node := New_Node (N_Block_Statement, Token_Ptr);
  
        Push_Scope_Stack;
!       Scopes (Scope.Last).Etyp := E_Name;
!       Scopes (Scope.Last).Lreq := Present (Block_Name);
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Labl := Block_Name;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
  
        if No (Block_Name) then
           Created_Name :=
*************** package body Ch5 is
*** 1860,1874 ****
           Set_Comes_From_Source (Created_Name, False);
           Set_Has_Created_Identifier (Block_Node, True);
           Set_Identifier (Block_Node, Created_Name);
!          Scope.Table (Scope.Last).Labl := Created_Name;
        else
           Set_Identifier (Block_Node, Block_Name);
        end if;
  
        Append_Elmt (Block_Node, Label_List);
  
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
        Scan; -- past BEGIN
        Set_Handled_Statement_Sequence
          (Block_Node, P_Handled_Sequence_Of_Statements);
--- 1860,1874 ----
           Set_Comes_From_Source (Created_Name, False);
           Set_Has_Created_Identifier (Block_Node, True);
           Set_Identifier (Block_Node, Created_Name);
!          Scopes (Scope.Last).Labl := Created_Name;
        else
           Set_Identifier (Block_Node, Block_Name);
        end if;
  
        Append_Elmt (Block_Node, Label_List);
  
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
        Scan; -- past BEGIN
        Set_Handled_Statement_Sequence
          (Block_Node, P_Handled_Sequence_Of_Statements);
*************** package body Ch5 is
*** 1913,1919 ****
           if not Token_Is_At_Start_Of_Line then
              return False;
  
!          elsif Scope.Table (Scope.Last).Etyp /= E_Case then
              return False;
  
           else
--- 1913,1919 ----
           if not Token_Is_At_Start_Of_Line then
              return False;
  
!          elsif Scopes (Scope.Last).Etyp /= E_Case then
              return False;
  
           else
*************** package body Ch5 is
*** 1946,1958 ****
  
           Check_No_Exit_Name :
           for J in reverse 1 .. Scope.Last loop
!             if Scope.Table (J).Etyp = E_Loop then
!                if Present (Scope.Table (J).Labl)
!                  and then Comes_From_Source (Scope.Table (J).Labl)
                 then
                    --  Innermost loop in fact had a name, style check fails
  
!                   Style.No_Exit_Name (Scope.Table (J).Labl);
                 end if;
  
                 exit Check_No_Exit_Name;
--- 1946,1958 ----
  
           Check_No_Exit_Name :
           for J in reverse 1 .. Scope.Last loop
!             if Scopes (J).Etyp = E_Loop then
!                if Present (Scopes (J).Labl)
!                  and then Comes_From_Source (Scopes (J).Labl)
                 then
                    --  Innermost loop in fact had a name, style check fails
  
!                   Style.No_Exit_Name (Scopes (J).Labl);
                 end if;
  
                 exit Check_No_Exit_Name;
*************** package body Ch5 is
*** 2154,2160 ****
                 Style.Check_Indentation;
              end if;
  
!             Error_Msg_Col := Scope.Table (Scope.Last).Ecol;
  
              if RM_Column_Check
                and then Token_Is_At_Start_Of_Line
--- 2154,2160 ----
                 Style.Check_Indentation;
              end if;
  
!             Error_Msg_Col := Scopes (Scope.Last).Ecol;
  
              if RM_Column_Check
                and then Token_Is_At_Start_Of_Line
*************** package body Ch5 is
*** 2163,2172 ****
                 Error_Msg_SC ("(style) BEGIN in wrong column, should be@");
  
              else
!                Scope.Table (Scope.Last).Ecol := Start_Column;
              end if;
  
!             Scope.Table (Scope.Last).Sloc := Token_Ptr;
              Scan; -- past BEGIN
              Set_Handled_Statement_Sequence (Parent,
                P_Handled_Sequence_Of_Statements);
--- 2163,2172 ----
                 Error_Msg_SC ("(style) BEGIN in wrong column, should be@");
  
              else
!                Scopes (Scope.Last).Ecol := Start_Column;
              end if;
  
!             Scopes (Scope.Last).Sloc := Token_Ptr;
              Scan; -- past BEGIN
              Set_Handled_Statement_Sequence (Parent,
                P_Handled_Sequence_Of_Statements);
*************** package body Ch5 is
*** 2183,2191 ****
  
              if Parent_Nkind = N_Subprogram_Body
                and then Token  = Tok_End
!               and then Scope.Table (Scope.Last).Etyp = E_Suspicious_Is
              then
!                Scope.Table (Scope.Last).Etyp := E_Bad_Is;
  
              --  Otherwise BEGIN is not required for a package body, so we
              --  don't mind if it is missing, but we do construct a dummy
--- 2183,2191 ----
  
              if Parent_Nkind = N_Subprogram_Body
                and then Token  = Tok_End
!               and then Scopes (Scope.Last).Etyp = E_Suspicious_Is
              then
!                Scopes (Scope.Last).Etyp := E_Bad_Is;
  
              --  Otherwise BEGIN is not required for a package body, so we
              --  don't mind if it is missing, but we do construct a dummy
*************** package body Ch5 is
*** 2211,2218 ****
  
                 --  Prepare to issue error message
  
!                Error_Msg_Sloc := Scope.Table (Scope.Last).Sloc;
!                Error_Msg_Node_1 := Scope.Table (Scope.Last).Labl;
  
                 --  Now issue appropriate message
  
--- 2211,2218 ----
  
                 --  Prepare to issue error message
  
!                Error_Msg_Sloc := Scopes (Scope.Last).Sloc;
!                Error_Msg_Node_1 := Scopes (Scope.Last).Labl;
  
                 --  Now issue appropriate message
  
*************** package body Ch5 is
*** 2272,2277 ****
--- 2272,2278 ----
        --  (because it is required to do so under all circumstances). We can
        --  therefore reference the entry it removed one past the stack top.
        --  What we are interested in is whether it was a case of a bad IS.
+       --  We can't call Scopes here.
  
        if Scope.Table (Scope.Last + 1).Etyp = E_Bad_Is then
           Error_Msg -- CODEFIX
diff -Nrcpad gcc-9.3.0/gcc/ada/par-ch6.adb gcc-10.1.0/gcc/ada/par-ch6.adb
*** gcc-9.3.0/gcc/ada/par-ch6.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-ch6.adb	Thu May  7 10:49:59 2020
*************** package body Ch6 is
*** 229,240 ****
        --  Set up scope stack entry. Note that the Labl field will be set later
  
        SIS_Entry_Active := False;
        SIS_Missing_Semicolon_Message := No_Error_Msg;
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
!       Scope.Table (Scope.Last).Etyp := E_Name;
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Lreq := False;
  
        Aspects := Empty_List;
  
--- 229,241 ----
        --  Set up scope stack entry. Note that the Labl field will be set later
  
        SIS_Entry_Active := False;
+       SIS_Aspect_Import_Seen := False;
        SIS_Missing_Semicolon_Message := No_Error_Msg;
        Push_Scope_Stack;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
!       Scopes (Scope.Last).Etyp := E_Name;
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Lreq := False;
  
        Aspects := Empty_List;
  
*************** package body Ch6 is
*** 335,341 ****
           Name_Node := P_Defining_Program_Unit_Name;
        end if;
  
!       Scope.Table (Scope.Last).Labl := Name_Node;
        Current_Node := Name_Node;
        Ignore (Tok_Colon);
  
--- 336,342 ----
           Name_Node := P_Defining_Program_Unit_Name;
        end if;
  
!       Scopes (Scope.Last).Labl := Name_Node;
        Current_Node := Name_Node;
        Ignore (Tok_Colon);
  
*************** package body Ch6 is
*** 533,539 ****
           --  i.e. that the terminating semicolon should have been IS.
  
           elsif Token = Tok_Begin
!             and then Start_Column >= Scope.Table (Scope.Last).Ecol
           then
              Error_Msg_SP -- CODEFIX
                ("|"";"" should be IS!");
--- 534,540 ----
           --  i.e. that the terminating semicolon should have been IS.
  
           elsif Token = Tok_Begin
!             and then Start_Column >= Scopes (Scope.Last).Ecol
           then
              Error_Msg_SP -- CODEFIX
                ("|"";"" should be IS!");
*************** package body Ch6 is
*** 764,770 ****
  
                             Spec_Node : constant Node_Id :=
                                           Parent
!                                            (Scope.Table (Scope.Last).Labl);
                             Lib_Node : Node_Id := Spec_Node;
  
                          begin
--- 765,771 ----
  
                             Spec_Node : constant Node_Id :=
                                           Parent
!                                            (Scopes (Scope.Last).Labl);
                             Lib_Node : Node_Id := Spec_Node;
  
                          begin
*************** package body Ch6 is
*** 773,779 ****
  
                             if Scope.Last > 1 then
                                Lib_Node  :=
!                                 Parent (Scope.Table (Scope.Last - 1).Labl);
                             end if;
  
                             if Ada_Version >= Ada_2012
--- 774,780 ----
  
                             if Scope.Last > 1 then
                                Lib_Node  :=
!                                 Parent (Scopes (Scope.Last - 1).Labl);
                             end if;
  
                             if Ada_Version >= Ada_2012
*************** package body Ch6 is
*** 917,927 ****
                    if (Token in Token_Class_Declk
                          or else
                        Token = Tok_Identifier)
!                     and then Start_Column <= Scope.Table (Scope.Last).Ecol
                      and then Scope.Last /= 1
                    then
!                      Scope.Table (Scope.Last).Etyp := E_Suspicious_Is;
!                      Scope.Table (Scope.Last).S_Is := Prev_Token_Ptr;
                    end if;
  
                    --  Build and return subprogram body, parsing declarations
--- 918,928 ----
                    if (Token in Token_Class_Declk
                          or else
                        Token = Tok_Identifier)
!                     and then Start_Column <= Scopes (Scope.Last).Ecol
                      and then Scope.Last /= 1
                    then
!                      Scopes (Scope.Last).Etyp := E_Suspicious_Is;
!                      Scopes (Scope.Last).S_Is := Prev_Token_Ptr;
                    end if;
  
                    --  Build and return subprogram body, parsing declarations
*************** package body Ch6 is
*** 998,1015 ****
  
           if Pf_Flags.Pbod
  
!            --  Disconnnect this processing if we have scanned a null procedure
             --  because in this case the spec is complete anyway with no body.
  
             and then (Nkind (Specification_Node) /= N_Procedure_Specification
                        or else not Null_Present (Specification_Node))
           then
!             SIS_Labl := Scope.Table (Scope.Last).Labl;
!             SIS_Sloc := Scope.Table (Scope.Last).Sloc;
!             SIS_Ecol := Scope.Table (Scope.Last).Ecol;
              SIS_Declaration_Node := Decl_Node;
              SIS_Semicolon_Sloc := Prev_Token_Ptr;
!             SIS_Entry_Active := True;
           end if;
  
           Pop_Scope_Stack;
--- 999,1021 ----
  
           if Pf_Flags.Pbod
  
!            --  Disconnect this processing if we have scanned a null procedure
             --  because in this case the spec is complete anyway with no body.
  
             and then (Nkind (Specification_Node) /= N_Procedure_Specification
                        or else not Null_Present (Specification_Node))
           then
!             SIS_Labl := Scopes (Scope.Last).Labl;
!             SIS_Sloc := Scopes (Scope.Last).Sloc;
!             SIS_Ecol := Scopes (Scope.Last).Ecol;
              SIS_Declaration_Node := Decl_Node;
              SIS_Semicolon_Sloc := Prev_Token_Ptr;
! 
!             --  Do not activate the entry if we have "with Import"
! 
!             if not SIS_Aspect_Import_Seen then
!                SIS_Entry_Active := True;
!             end if;
           end if;
  
           Pop_Scope_Stack;
*************** package body Ch6 is
*** 1442,1448 ****
                    Look_Ahead : loop
  
                       --  If we run into a semicolon, then assume that a
!                      --  colon was missing, e.g.  Parms (X Y; ...). Also
                       --  assume missing colon on EOF (a real disaster)
                       --  and on a right paren, e.g. Parms (X Y), and also
                       --  on an assignment symbol, e.g. Parms (X Y := ..)
--- 1448,1454 ----
                    Look_Ahead : loop
  
                       --  If we run into a semicolon, then assume that a
!                      --  colon was missing, e.g. Parms (X Y; ...). Also
                       --  assume missing colon on EOF (a real disaster)
                       --  and on a right paren, e.g. Parms (X Y), and also
                       --  on an assignment symbol, e.g. Parms (X Y := ..)
*************** package body Ch6 is
*** 1946,1955 ****
  
              if Token = Tok_Do then
                 Push_Scope_Stack;
!                Scope.Table (Scope.Last).Ecol := Ret_Strt;
!                Scope.Table (Scope.Last).Etyp := E_Return;
!                Scope.Table (Scope.Last).Labl := Error;
!                Scope.Table (Scope.Last).Sloc := Ret_Sloc;
  
                 Scan; -- past DO
                 Set_Handled_Statement_Sequence
--- 1952,1961 ----
  
              if Token = Tok_Do then
                 Push_Scope_Stack;
!                Scopes (Scope.Last).Ecol := Ret_Strt;
!                Scopes (Scope.Last).Etyp := E_Return;
!                Scopes (Scope.Last).Labl := Error;
!                Scopes (Scope.Last).Sloc := Ret_Sloc;
  
                 Scan; -- past DO
                 Set_Handled_Statement_Sequence
diff -Nrcpad gcc-9.3.0/gcc/ada/par-ch7.adb gcc-10.1.0/gcc/ada/par-ch7.adb
*** gcc-9.3.0/gcc/ada/par-ch7.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-ch7.adb	Thu May  7 10:49:59 2020
*************** package body Ch7 is
*** 121,129 ****
  
     begin
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Etyp := E_Name;
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Lreq := False;
  
        Package_Sloc := Token_Ptr;
        Scan; -- past PACKAGE
--- 121,129 ----
  
     begin
        Push_Scope_Stack;
!       Scopes (Scope.Last).Etyp := E_Name;
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Lreq := False;
  
        Package_Sloc := Token_Ptr;
        Scan; -- past PACKAGE
*************** package body Ch7 is
*** 143,151 ****
           end if;
  
           T_Body;
!          Scope.Table (Scope.Last).Sloc := Token_Ptr;
           Name_Node := P_Defining_Program_Unit_Name;
!          Scope.Table (Scope.Last).Labl := Name_Node;
           Current_Node := Name_Node;
  
           if Aspect_Specifications_Present then
--- 143,151 ----
           end if;
  
           T_Body;
!          Scopes (Scope.Last).Sloc := Token_Ptr;
           Name_Node := P_Defining_Program_Unit_Name;
!          Scopes (Scope.Last).Labl := Name_Node;
           Current_Node := Name_Node;
  
           if Aspect_Specifications_Present then
*************** package body Ch7 is
*** 209,217 ****
        --  Cases other than Package_Body
  
        else
!          Scope.Table (Scope.Last).Sloc := Token_Ptr;
           Name_Node := P_Defining_Program_Unit_Name;
!          Scope.Table (Scope.Last).Labl := Name_Node;
           Current_Node := Name_Node;
  
           --  Case of renaming declaration
--- 209,217 ----
        --  Cases other than Package_Body
  
        else
!          Scopes (Scope.Last).Sloc := Token_Ptr;
           Name_Node := P_Defining_Program_Unit_Name;
!          Scopes (Scope.Last).Labl := Name_Node;
           Current_Node := Name_Node;
  
           --  Case of renaming declaration
*************** package body Ch7 is
*** 290,296 ****
                   (Specification_Node, P_Basic_Declarative_Items);
  
                 if Token = Tok_Private then
!                   Error_Msg_Col := Scope.Table (Scope.Last).Ecol;
  
                    if RM_Column_Check then
                       if Token_Is_At_Start_Of_Line
--- 290,296 ----
                   (Specification_Node, P_Basic_Declarative_Items);
  
                 if Token = Tok_Private then
!                   Error_Msg_Col := Scopes (Scope.Last).Ecol;
  
                    if RM_Column_Check then
                       if Token_Is_At_Start_Of_Line
diff -Nrcpad gcc-9.3.0/gcc/ada/par-ch9.adb gcc-10.1.0/gcc/ada/par-ch9.adb
*** gcc-9.3.0/gcc/ada/par-ch9.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-ch9.adb	Thu May  7 10:49:59 2020
*************** package body Ch9 is
*** 91,106 ****
  
     begin
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Etyp := E_Name;
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
!       Scope.Table (Scope.Last).Lreq := False;
        Task_Sloc := Prev_Token_Ptr;
  
        if Token = Tok_Body then
           Scan; -- past BODY
           Name_Node := P_Defining_Identifier (C_Is);
!          Scope.Table (Scope.Last).Labl := Name_Node;
           Current_Node := Name_Node;
  
           if Token = Tok_Left_Paren then
--- 91,106 ----
  
     begin
        Push_Scope_Stack;
!       Scopes (Scope.Last).Etyp := E_Name;
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
!       Scopes (Scope.Last).Lreq := False;
        Task_Sloc := Prev_Token_Ptr;
  
        if Token = Tok_Body then
           Scan; -- past BODY
           Name_Node := P_Defining_Identifier (C_Is);
!          Scopes (Scope.Last).Labl := Name_Node;
           Current_Node := Name_Node;
  
           if Token = Tok_Left_Paren then
*************** package body Ch9 is
*** 168,174 ****
              Task_Node := New_Node (N_Task_Type_Declaration, Task_Sloc);
              Name_Node := P_Defining_Identifier;
              Set_Defining_Identifier (Task_Node, Name_Node);
!             Scope.Table (Scope.Last).Labl := Name_Node;
              Current_Node := Name_Node;
              Set_Discriminant_Specifications
                (Task_Node, P_Known_Discriminant_Part_Opt);
--- 168,174 ----
              Task_Node := New_Node (N_Task_Type_Declaration, Task_Sloc);
              Name_Node := P_Defining_Identifier;
              Set_Defining_Identifier (Task_Node, Name_Node);
!             Scopes (Scope.Last).Labl := Name_Node;
              Current_Node := Name_Node;
              Set_Discriminant_Specifications
                (Task_Node, P_Known_Discriminant_Part_Opt);
*************** package body Ch9 is
*** 177,183 ****
              Task_Node := New_Node (N_Single_Task_Declaration, Task_Sloc);
              Name_Node := P_Defining_Identifier (C_Is);
              Set_Defining_Identifier (Task_Node, Name_Node);
!             Scope.Table (Scope.Last).Labl := Name_Node;
              Current_Node := Name_Node;
  
              if Token = Tok_Left_Paren then
--- 177,183 ----
              Task_Node := New_Node (N_Single_Task_Declaration, Task_Sloc);
              Name_Node := P_Defining_Identifier (C_Is);
              Set_Defining_Identifier (Task_Node, Name_Node);
!             Scopes (Scope.Last).Labl := Name_Node;
              Current_Node := Name_Node;
  
              if Token = Tok_Left_Paren then
*************** package body Ch9 is
*** 441,455 ****
  
     begin
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Etyp := E_Name;
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Lreq := False;
        Protected_Sloc := Prev_Token_Ptr;
  
        if Token = Tok_Body then
           Scan; -- past BODY
           Name_Node := P_Defining_Identifier (C_Is);
!          Scope.Table (Scope.Last).Labl := Name_Node;
           Current_Node := Name_Node;
  
           if Token = Tok_Left_Paren then
--- 441,455 ----
  
     begin
        Push_Scope_Stack;
!       Scopes (Scope.Last).Etyp := E_Name;
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Lreq := False;
        Protected_Sloc := Prev_Token_Ptr;
  
        if Token = Tok_Body then
           Scan; -- past BODY
           Name_Node := P_Defining_Identifier (C_Is);
!          Scopes (Scope.Last).Labl := Name_Node;
           Current_Node := Name_Node;
  
           if Token = Tok_Left_Paren then
*************** package body Ch9 is
*** 504,510 ****
                New_Node (N_Protected_Type_Declaration, Protected_Sloc);
              Name_Node := P_Defining_Identifier (C_Is);
              Set_Defining_Identifier (Protected_Node, Name_Node);
!             Scope.Table (Scope.Last).Labl := Name_Node;
              Current_Node := Name_Node;
              Set_Discriminant_Specifications
                (Protected_Node, P_Known_Discriminant_Part_Opt);
--- 504,510 ----
                New_Node (N_Protected_Type_Declaration, Protected_Sloc);
              Name_Node := P_Defining_Identifier (C_Is);
              Set_Defining_Identifier (Protected_Node, Name_Node);
!             Scopes (Scope.Last).Labl := Name_Node;
              Current_Node := Name_Node;
              Set_Discriminant_Specifications
                (Protected_Node, P_Known_Discriminant_Part_Opt);
*************** package body Ch9 is
*** 521,527 ****
                 Discard_Junk_List (P_Known_Discriminant_Part_Opt);
              end if;
  
!             Scope.Table (Scope.Last).Labl := Name_Node;
              Current_Node := Name_Node;
           end if;
  
--- 521,527 ----
                 Discard_Junk_List (P_Known_Discriminant_Part_Opt);
              end if;
  
!             Scopes (Scope.Last).Labl := Name_Node;
              Current_Node := Name_Node;
           end if;
  
*************** package body Ch9 is
*** 1074,1085 ****
  
     begin
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
!       Scope.Table (Scope.Last).Ecol := Start_Column;
  
        Accept_Node := New_Node (N_Accept_Statement, Token_Ptr);
        Scan; -- past ACCEPT
!       Scope.Table (Scope.Last).Labl := Token_Node;
        Current_Node := Token_Node;
  
        Set_Entry_Direct_Name (Accept_Node, P_Identifier (C_Do));
--- 1074,1085 ----
  
     begin
        Push_Scope_Stack;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
!       Scopes (Scope.Last).Ecol := Start_Column;
  
        Accept_Node := New_Node (N_Accept_Statement, Token_Ptr);
        Scan; -- past ACCEPT
!       Scopes (Scope.Last).Labl := Token_Node;
        Current_Node := Token_Node;
  
        Set_Entry_Direct_Name (Accept_Node, P_Identifier (C_Do));
*************** package body Ch9 is
*** 1123,1130 ****
        --  Scan out DO if present
  
        if Token = Tok_Do then
!          Scope.Table (Scope.Last).Etyp := E_Name;
!          Scope.Table (Scope.Last).Lreq := False;
           Scan; -- past DO
           Hand_Seq := P_Handled_Sequence_Of_Statements;
           Set_Handled_Statement_Sequence (Accept_Node, Hand_Seq);
--- 1123,1130 ----
        --  Scan out DO if present
  
        if Token = Tok_Do then
!          Scopes (Scope.Last).Etyp := E_Name;
!          Scopes (Scope.Last).Lreq := False;
           Scan; -- past DO
           Hand_Seq := P_Handled_Sequence_Of_Statements;
           Set_Handled_Statement_Sequence (Accept_Node, Hand_Seq);
*************** package body Ch9 is
*** 1221,1234 ****
        Entry_Node := New_Node (N_Entry_Body, Token_Ptr);
        Scan; -- past ENTRY
  
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Lreq := False;
!       Scope.Table (Scope.Last).Etyp := E_Name;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
  
        Name_Node := P_Defining_Identifier;
        Set_Defining_Identifier (Entry_Node, Name_Node);
!       Scope.Table (Scope.Last).Labl := Name_Node;
        Current_Node := Name_Node;
  
        Formal_Part_Node := P_Entry_Body_Formal_Part;
--- 1221,1234 ----
        Entry_Node := New_Node (N_Entry_Body, Token_Ptr);
        Scan; -- past ENTRY
  
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Lreq := False;
!       Scopes (Scope.Last).Etyp := E_Name;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
  
        Name_Node := P_Defining_Identifier;
        Set_Defining_Identifier (Entry_Node, Name_Node);
!       Scopes (Scope.Last).Labl := Name_Node;
        Current_Node := Name_Node;
  
        Formal_Part_Node := P_Entry_Body_Formal_Part;
*************** package body Ch9 is
*** 1521,1530 ****
  
     begin
        Push_Scope_Stack;
!       Scope.Table (Scope.Last).Etyp := E_Select;
!       Scope.Table (Scope.Last).Ecol := Start_Column;
!       Scope.Table (Scope.Last).Sloc := Token_Ptr;
!       Scope.Table (Scope.Last).Labl := Error;
  
        Select_Sloc := Token_Ptr;
        Scan; -- past SELECT
--- 1521,1530 ----
  
     begin
        Push_Scope_Stack;
!       Scopes (Scope.Last).Etyp := E_Select;
!       Scopes (Scope.Last).Ecol := Start_Column;
!       Scopes (Scope.Last).Sloc := Token_Ptr;
!       Scopes (Scope.Last).Labl := Error;
  
        Select_Sloc := Token_Ptr;
        Scan; -- past SELECT
diff -Nrcpad gcc-9.3.0/gcc/ada/par-endh.adb gcc-10.1.0/gcc/ada/par-endh.adb
*** gcc-9.3.0/gcc/ada/par-endh.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-endh.adb	Thu May  7 10:49:59 2020
*************** package body Endh is
*** 180,186 ****
        Name_Scan_State : Saved_Scan_State;
        --  Save state at start of name if Name_On_Separate_Line is TRUE
  
!       Span_Node : constant Node_Id := Scope.Table (Scope.Last).Node;
  
     begin
        End_Labl_Present := False;
--- 180,186 ----
        Name_Scan_State : Saved_Scan_State;
        --  Save state at start of name if Name_On_Separate_Line is TRUE
  
!       Span_Node : constant Node_Id := Scopes (Scope.Last).Node;
  
     begin
        End_Labl_Present := False;
*************** package body Endh is
*** 284,290 ****
  
                 if Name_On_Separate_Line then
                    if Token /= Tok_Semicolon or else
!                     not Same_Label (End_Labl, Scope.Table (Scope.Last).Labl)
                    then
                       Restore_Scan_State (Name_Scan_State);
                       End_Labl := Empty;
--- 284,290 ----
  
                 if Name_On_Separate_Line then
                    if Token /= Tok_Semicolon or else
!                     not Same_Label (End_Labl, Scopes (Scope.Last).Labl)
                    then
                       Restore_Scan_State (Name_Scan_State);
                       End_Labl := Empty;
*************** package body Endh is
*** 297,303 ****
              --  to the scan location past the END token.
  
              else
!                End_Labl := Scope.Table (Scope.Last).Labl;
  
                 if End_Labl > Empty_Or_Error then
  
--- 297,303 ----
              --  to the scan location past the END token.
  
              else
!                End_Labl := Scopes (Scope.Last).Labl;
  
                 if End_Labl > Empty_Or_Error then
  
*************** package body Endh is
*** 382,391 ****
                    if Style_Check
                      and then End_Type = E_Name
                      and then Explicit_Start_Label (Scope.Last)
!                     and then Nkind (Parent (Scope.Table (Scope.Last).Labl))
                                 /= N_Block_Statement
                    then
!                      Style.No_End_Name (Scope.Table (Scope.Last).Labl);
                    end if;
                 end if;
              end if;
--- 382,391 ----
                    if Style_Check
                      and then End_Type = E_Name
                      and then Explicit_Start_Label (Scope.Last)
!                     and then Nkind (Parent (Scopes (Scope.Last).Labl))
                                 /= N_Block_Statement
                    then
!                      Style.No_End_Name (Scopes (Scope.Last).Labl);
                    end if;
                 end if;
              end if;
*************** package body Endh is
*** 710,716 ****
     ------------------------
  
     procedure Evaluate_End_Entry (SS_Index : Nat) is
!       STE : Scope_Table_Entry renames Scope.Table (SS_Index);
  
     begin
        Column_OK := (End_Column = STE.Ecol);
--- 710,716 ----
     ------------------------
  
     procedure Evaluate_End_Entry (SS_Index : Nat) is
!       STE : Scope_Table_Entry renames Scopes (SS_Index).all;
  
     begin
        Column_OK := (End_Column = STE.Ecol);
*************** package body Endh is
*** 741,747 ****
  
        if not Label_OK
          and then End_Labl_Present
!         and then not Comes_From_Source (Scope.Table (SS_Index).Labl)
        then
           --  Here is where we will search the suspicious labels table
  
--- 741,747 ----
  
        if not Label_OK
          and then End_Labl_Present
!         and then not Comes_From_Source (Scopes (SS_Index).Labl)
        then
           --  Here is where we will search the suspicious labels table
  
*************** package body Endh is
*** 792,798 ****
           --  If probably misspelling, then complain, and pretend it is OK
  
           declare
!             Nam : constant Node_Or_Entity_Id := Scope.Table (SS_Index).Labl;
  
           begin
              if Nkind (End_Labl) in N_Has_Chars
--- 792,798 ----
           --  If probably misspelling, then complain, and pretend it is OK
  
           declare
!             Nam : constant Node_Or_Entity_Id := Scopes (SS_Index).Labl;
  
           begin
              if Nkind (End_Labl) in N_Has_Chars
*************** package body Endh is
*** 828,834 ****
        elsif End_Type = E_Name then
           Syntax_OK := (not Explicit_Start_Label (SS_Index))
                           or else
!                       (not Scope.Table (SS_Index).Lreq);
  
        --  Otherwise we have cases which don't allow labels anyway, so we
        --  certainly accept an END which does not have a label.
--- 828,834 ----
        elsif End_Type = E_Name then
           Syntax_OK := (not Explicit_Start_Label (SS_Index))
                           or else
!                       (not Scopes (SS_Index).Lreq);
  
        --  Otherwise we have cases which don't allow labels anyway, so we
        --  certainly accept an END which does not have a label.
*************** package body Endh is
*** 843,850 ****
     --------------------------
  
     function Explicit_Start_Label (SS_Index : Nat) return Boolean is
!       L    : constant Node_Id := Scope.Table (SS_Index).Labl;
!       Etyp : constant SS_End_Type := Scope.Table (SS_Index).Etyp;
  
     begin
        if No (L) then
--- 843,850 ----
     --------------------------
  
     function Explicit_Start_Label (SS_Index : Nat) return Boolean is
!       L    : constant Node_Id := Scopes (SS_Index).Labl;
!       Etyp : constant SS_End_Type := Scopes (SS_Index).Etyp;
  
     begin
        if No (L) then
*************** package body Endh is
*** 906,921 ****
        --  Suppress message if this was a potentially junk entry (e.g. a record
        --  entry where no record keyword was present).
  
!       if Scope.Table (Scope.Last).Junk then
           return;
        end if;
  
!       End_Type := Scope.Table (Scope.Last).Etyp;
!       Error_Msg_Col  := Scope.Table (Scope.Last).Ecol;
!       Error_Msg_Sloc := Scope.Table (Scope.Last).Sloc;
  
        if Explicit_Start_Label (Scope.Last) then
!          Error_Msg_Node_1 := Scope.Table (Scope.Last).Labl;
        else
           Error_Msg_Node_1 := Empty;
        end if;
--- 906,921 ----
        --  Suppress message if this was a potentially junk entry (e.g. a record
        --  entry where no record keyword was present).
  
!       if Scopes (Scope.Last).Junk then
           return;
        end if;
  
!       End_Type := Scopes (Scope.Last).Etyp;
!       Error_Msg_Col  := Scopes (Scope.Last).Ecol;
!       Error_Msg_Sloc := Scopes (Scope.Last).Sloc;
  
        if Explicit_Start_Label (Scope.Last) then
!          Error_Msg_Node_1 := Scopes (Scope.Last).Labl;
        else
           Error_Msg_Node_1 := Empty;
        end if;
*************** package body Endh is
*** 975,981 ****
        --  missing IS confirms the suspicion.
  
        else -- End_Type = E_Suspicious_Is or E_Bad_Is
!          Scope.Table (Scope.Last).Etyp := E_Bad_Is;
        end if;
     end Output_End_Expected;
  
--- 975,981 ----
        --  missing IS confirms the suspicion.
  
        else -- End_Type = E_Suspicious_Is or E_Bad_Is
!          Scopes (Scope.Last).Etyp := E_Bad_Is;
        end if;
     end Output_End_Expected;
  
*************** package body Endh is
*** 990,1004 ****
        --  Suppress message if this was a potentially junk entry (e.g. a record
        --  entry where no record keyword was present).
  
!       if Scope.Table (Scope.Last).Junk then
           return;
        end if;
  
!       End_Type := Scope.Table (Scope.Last).Etyp;
!       Error_Msg_Sloc   := Scope.Table (Scope.Last).Sloc;
  
        if Explicit_Start_Label (Scope.Last) then
!          Error_Msg_Node_1 := Scope.Table (Scope.Last).Labl;
        else
           Error_Msg_Node_1 := Empty;
        end if;
--- 990,1004 ----
        --  Suppress message if this was a potentially junk entry (e.g. a record
        --  entry where no record keyword was present).
  
!       if Scopes (Scope.Last).Junk then
           return;
        end if;
  
!       End_Type := Scopes (Scope.Last).Etyp;
!       Error_Msg_Sloc   := Scopes (Scope.Last).Sloc;
  
        if Explicit_Start_Label (Scope.Last) then
!          Error_Msg_Node_1 := Scopes (Scope.Last).Labl;
        else
           Error_Msg_Node_1 := Empty;
        end if;
*************** package body Endh is
*** 1036,1042 ****
           end if;
  
        else -- End_Type = E_Suspicious_Is or E_Bad_Is
!          Scope.Table (Scope.Last).Etyp := E_Bad_Is;
        end if;
     end Output_End_Missing;
  
--- 1036,1042 ----
           end if;
  
        else -- End_Type = E_Suspicious_Is or E_Bad_Is
!          Scopes (Scope.Last).Etyp := E_Bad_Is;
        end if;
     end Output_End_Missing;
  
*************** package body Endh is
*** 1100,1106 ****
               Token = Tok_Separate)
             and then End_Type >= E_Name
             and then (not End_Labl_Present
!                       or else Same_Label (End_Labl, Scope.Table (1).Labl))
             and then Scope.Last > 1
           then
              Restore_Scan_State (Scan_State); -- to END
--- 1100,1106 ----
               Token = Tok_Separate)
             and then End_Type >= E_Name
             and then (not End_Labl_Present
!                       or else Same_Label (End_Labl, Scopes (1).Labl))
             and then Scope.Last > 1
           then
              Restore_Scan_State (Scan_State); -- to END
*************** package body Endh is
*** 1125,1141 ****
              --  line as the opener.
  
              if RM_Column_Check then
!                if End_Column /= Scope.Table (Scope.Last).Ecol
!                  and then Current_Line_Start > Scope.Table (Scope.Last).Sloc
  
                 --  A special case, for END RECORD, we are also allowed to
                 --  line up with the TYPE keyword opening the declaration.
  
!                  and then (Scope.Table (Scope.Last).Etyp /= E_Record
                              or else Get_Column_Number (End_Sloc) /=
                                      Get_Column_Number (Type_Token_Location))
                 then
!                   Error_Msg_Col := Scope.Table (Scope.Last).Ecol;
                    Error_Msg
                      ("(style) END in wrong column, should be@", End_Sloc);
                 end if;
--- 1125,1141 ----
              --  line as the opener.
  
              if RM_Column_Check then
!                if End_Column /= Scopes (Scope.Last).Ecol
!                  and then Current_Line_Start > Scopes (Scope.Last).Sloc
  
                 --  A special case, for END RECORD, we are also allowed to
                 --  line up with the TYPE keyword opening the declaration.
  
!                  and then (Scopes (Scope.Last).Etyp /= E_Record
                              or else Get_Column_Number (End_Sloc) /=
                                      Get_Column_Number (Type_Token_Location))
                 then
!                   Error_Msg_Col := Scopes (Scope.Last).Ecol;
                    Error_Msg
                      ("(style) END in wrong column, should be@", End_Sloc);
                 end if;
*************** package body Endh is
*** 1176,1182 ****
                                   or else
                                (not Same_Label
                                       (End_Labl,
!                                       Scope.Table (Scope.Last - 1).Labl)))
                       then
                          T_Semicolon;
                          Error_Msg ("duplicate end line ignored", End_Loc);
--- 1176,1182 ----
                                   or else
                                (not Same_Label
                                       (End_Labl,
!                                       Scopes (Scope.Last - 1).Labl)))
                       then
                          T_Semicolon;
                          Error_Msg ("duplicate end line ignored", End_Loc);
*************** package body Endh is
*** 1229,1235 ****
           --  also it is unlikely that such nesting could occur by accident.
  
           Pretty_Good := (Token_OK and (Column_OK or Label_OK))
!                           or else Scope.Table (Scope.Last).Etyp = E_Record;
  
           --  Next check, if there is a deeper entry in the stack which
           --  has a very high probability of being acceptable, then insert
--- 1229,1235 ----
           --  also it is unlikely that such nesting could occur by accident.
  
           Pretty_Good := (Token_OK and (Column_OK or Label_OK))
!                           or else Scopes (Scope.Last).Etyp = E_Record;
  
           --  Next check, if there is a deeper entry in the stack which
           --  has a very high probability of being acceptable, then insert
*************** package body Endh is
*** 1289,1296 ****
           --  practices vary substantially in practice.
  
           if Pretty_Good
!             or else End_Column <= Scope.Table (Scope.Last).Ecol
!             or else (End_Type = Scope.Table (Scope.Last).Etyp
                          and then End_Type = E_Loop)
           then
              Output_End_Expected (Ins => False);
--- 1289,1296 ----
           --  practices vary substantially in practice.
  
           if Pretty_Good
!             or else End_Column <= Scopes (Scope.Last).Ecol
!             or else (End_Type = Scopes (Scope.Last).Etyp
                          and then End_Type = E_Loop)
           then
              Output_End_Expected (Ins => False);
diff -Nrcpad gcc-9.3.0/gcc/ada/par-labl.adb gcc-10.1.0/gcc/ada/par-labl.adb
*** gcc-9.3.0/gcc/ada/par-labl.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-labl.adb	Thu May  7 10:49:59 2020
*************** procedure Labl is
*** 79,85 ****
        --  then we have an error.
  
        --  Note that in the worst case, this is quadratic in the number
!       --  of labels.  However, labels are not all that common, and this
        --  is only called for explicit labels.
  
        --  ???Nonetheless, the efficiency could be improved. For example,
--- 79,85 ----
        --  then we have an error.
  
        --  Note that in the worst case, this is quadratic in the number
!       --  of labels. However, labels are not all that common, and this
        --  is only called for explicit labels.
  
        --  ???Nonetheless, the efficiency could be improved. For example,
diff -Nrcpad gcc-9.3.0/gcc/ada/par-load.adb gcc-10.1.0/gcc/ada/par-load.adb
*** gcc-9.3.0/gcc/ada/par-load.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-load.adb	Thu May  7 10:49:59 2020
*************** with Uname;    use Uname;
*** 36,42 ****
  with Osint;    use Osint;
  with Sinput.L; use Sinput.L;
  with Stylesw;  use Stylesw;
- with Validsw;  use Validsw;
  
  with GNAT.Spelling_Checker; use GNAT.Spelling_Checker;
  
--- 36,41 ----
*************** procedure Load is
*** 61,70 ****
     Save_Style_Checks : Style_Check_Options;
     --  Save style check so it can be restored later
  
-    Save_Validity_Check  : Boolean;
-    Save_Validity_Checks : Validity_Check_Options;
-    --  Save validity check so it can be restored later
- 
     With_Cunit : Node_Id;
     --  Compilation unit node for withed unit
  
--- 60,65 ----
*************** begin
*** 134,142 ****
     Save_Style_Check_Options (Save_Style_Checks);
     Save_Style_Check := Opt.Style_Check;
  
-    Save_Validity_Check_Options (Save_Validity_Checks);
-    Save_Validity_Check := Opt.Validity_Checks_On;
- 
     --  If main unit, set Main_Unit_Entity (this will get overwritten if
     --  the main unit has a separate spec, that happens later on in Load)
  
--- 129,134 ----
*************** begin
*** 318,328 ****
       or else Nkind (Unit (Curunit)) in N_Generic_Instantiation
       or else Nkind (Unit (Curunit)) in N_Renaming_Declaration
     then
!       --  Turn style and validity checks off for parent unit
  
        if not GNAT_Mode then
           Reset_Style_Check_Options;
-          Reset_Validity_Check_Options;
        end if;
  
        Spec_Name := Get_Parent_Spec_Name (Unit_Name (Cur_Unum));
--- 310,319 ----
       or else Nkind (Unit (Curunit)) in N_Generic_Instantiation
       or else Nkind (Unit (Curunit)) in N_Renaming_Declaration
     then
!       --  Turn style checks off for parent unit
  
        if not GNAT_Mode then
           Reset_Style_Check_Options;
        end if;
  
        Spec_Name := Get_Parent_Spec_Name (Unit_Name (Cur_Unum));
*************** begin
*** 356,366 ****
        end if;
     end if;
  
!    --  Now we load with'ed units, with style/validity checks turned off
  
     if not GNAT_Mode then
        Reset_Style_Check_Options;
-       Reset_Validity_Check_Options;
     end if;
  
     --  Load the context items in two rounds: the first round handles normal
--- 347,356 ----
        end if;
     end if;
  
!    --  Now we load with'ed units, with style checks turned off
  
     if not GNAT_Mode then
        Reset_Style_Check_Options;
     end if;
  
     --  Load the context items in two rounds: the first round handles normal
*************** begin
*** 470,475 ****
  
     Set_Style_Check_Options (Save_Style_Checks);
     Opt.Style_Check := Save_Style_Check;
-    Set_Validity_Check_Options (Save_Validity_Checks);
-    Opt.Validity_Checks_On := Save_Validity_Check;
  end Load;
--- 460,463 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/par-prag.adb gcc-10.1.0/gcc/ada/par-prag.adb
*** gcc-9.3.0/gcc/ada/par-prag.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-prag.adb	Thu May  7 10:49:59 2020
*************** begin
*** 1088,1093 ****
--- 1088,1108 ----
        when Pragma_Suppress_All =>
           Set_Has_Pragma_Suppress_All (Cunit (Current_Source_Unit));
  
+       ----------------------
+       -- Warning_As_Error --
+       ----------------------
+ 
+       --  pragma Warning_As_Error (static_string_EXPRESSION);
+ 
+       --  Further processing is done in Sem_Prag
+ 
+       when Pragma_Warning_As_Error =>
+          Check_Arg_Count (1);
+          Check_Arg_Is_String_Literal (Arg1);
+          Warnings_As_Errors_Count := Warnings_As_Errors_Count + 1;
+          Warnings_As_Errors (Warnings_As_Errors_Count) :=
+            new String'(Acquire_Warning_Match_String (Get_Pragma_Arg (Arg1)));
+ 
        ---------------------
        -- Warnings (GNAT) --
        ---------------------
*************** begin
*** 1304,1309 ****
--- 1319,1325 ----
           | Pragma_Acc_Kernels
           | Pragma_Acc_Loop
           | Pragma_Acc_Parallel
+          | Pragma_Aggregate_Individually_Assign
           | Pragma_Async_Readers
           | Pragma_Async_Writers
           | Pragma_Assertion_Policy
*************** begin
*** 1415,1423 ****
--- 1431,1441 ----
           | Pragma_Main
           | Pragma_Main_Storage
           | Pragma_Max_Entry_Queue_Depth
+          | Pragma_Max_Entry_Queue_Length
           | Pragma_Max_Queue_Length
           | Pragma_Memory_Size
           | Pragma_No_Body
+          | Pragma_No_Caching
           | Pragma_No_Component_Reordering
           | Pragma_No_Elaboration_Code_All
           | Pragma_No_Heap_Finalization
*************** begin
*** 1517,1523 ****
           | Pragma_Volatile_Components
           | Pragma_Volatile_Full_Access
           | Pragma_Volatile_Function
-          | Pragma_Warning_As_Error
           | Pragma_Weak_External
           | Pragma_Validity_Checks
        =>
--- 1535,1540 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/par-util.adb gcc-10.1.0/gcc/ada/par-util.adb
*** gcc-9.3.0/gcc/ada/par-util.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par-util.adb	Thu May  7 10:49:59 2020
*************** package body Util is
*** 162,168 ****
     procedure Check_Bad_Layout is
     begin
        if RM_Column_Check and then Token_Is_At_Start_Of_Line
!         and then Start_Column <= Scope.Table (Scope.Last).Ecol
        then
           Error_Msg_BC -- CODEFIX
             ("(style) incorrect layout");
--- 162,168 ----
     procedure Check_Bad_Layout is
     begin
        if RM_Column_Check and then Token_Is_At_Start_Of_Line
!         and then Start_Column <= Scopes (Scope.Last).Ecol
        then
           Error_Msg_BC -- CODEFIX
             ("(style) incorrect layout");
*************** package body Util is
*** 276,283 ****
  
        --  If we have a right paren, then that is taken as ending the list
        --  i.e. no comma is present.
  
!       elsif Token = Tok_Right_Paren then
           return False;
  
        --  If pragmas, then get rid of them and make a recursive call
--- 276,286 ----
  
        --  If we have a right paren, then that is taken as ending the list
        --  i.e. no comma is present.
+       --  Ditto for a right bracket in Ada2020.
  
!       elsif Token = Tok_Right_Paren
!         or else (Token = Tok_Right_Bracket and then Ada_Version >= Ada_2020)
!       then
           return False;
  
        --  If pragmas, then get rid of them and make a recursive call
*************** package body Util is
*** 668,676 ****
        Scope.Decrement_Last;
  
        if Include_Subprogram_In_Messages
!         and then Scope.Table (Scope.Last).Labl /= Error
        then
!          Current_Node := Scope.Table (Scope.Last).Labl;
        end if;
  
        if Debug_Flag_P then
--- 671,679 ----
        Scope.Decrement_Last;
  
        if Include_Subprogram_In_Messages
!         and then Scopes (Scope.Last).Labl /= Error
        then
!          Current_Node := Scopes (Scope.Last).Labl;
        end if;
  
        if Debug_Flag_P then
*************** package body Util is
*** 695,702 ****
              First_Non_Blank_Location);
        end if;
  
!       Scope.Table (Scope.Last).Junk := False;
!       Scope.Table (Scope.Last).Node := Empty;
  
        if Debug_Flag_P then
           Error_Msg_Uint_1 := UI_From_Int (Scope.Last);
--- 698,705 ----
              First_Non_Blank_Location);
        end if;
  
!       Scopes (Scope.Last).Junk := False;
!       Scopes (Scope.Last).Node := Empty;
  
        if Debug_Flag_P then
           Error_Msg_Uint_1 := UI_From_Int (Scope.Last);
diff -Nrcpad gcc-9.3.0/gcc/ada/par.adb gcc-10.1.0/gcc/ada/par.adb
*** gcc-9.3.0/gcc/ada/par.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par.adb	Thu May  7 10:49:59 2020
*************** function Par (Configuration_Pragmas : Bo
*** 151,158 ****
  
     SIS_Entry_Active : Boolean := False;
     --  Set True to indicate that an entry is active (i.e. that a subprogram
!    --  declaration has been encountered, and no body for this subprogram has
!    --  been encountered). The remaining fields are valid only if this is True.
  
     SIS_Labl : Node_Id;
     --  Subprogram designator
--- 151,167 ----
  
     SIS_Entry_Active : Boolean := False;
     --  Set True to indicate that an entry is active (i.e. that a subprogram
!    --  declaration has been encountered, and no body for this subprogram
!    --  has been encountered). The remaining variables other than
!    --  SIS_Aspect_Import_Seen are valid only if this is True.
! 
!    SIS_Aspect_Import_Seen : Boolean := False;
!    --  If this is True when a subprogram declaration has been encountered, we
!    --  do not set SIS_Entry_Active, because the Import means there is no body.
!    --  Set False at the start of P_Subprogram, set True when an Import aspect
!    --  specification is seen, and used when P_Subprogram finds a subprogram
!    --  declaration.  This is necessary because the aspects are parsed before
!    --  we know we have a subprogram declaration.
  
     SIS_Labl : Node_Id;
     --  Subprogram designator
*************** function Par (Configuration_Pragmas : Bo
*** 535,540 ****
--- 544,563 ----
       Table_Increment      => 100,
       Table_Name           => "Scope");
  
+    type Scope_Table_Entry_Ptr is access all Scope_Table_Entry;
+ 
+    function Scopes (Index : Int) return Scope_Table_Entry_Ptr;
+    --  Return the indicated Scope_Table_Entry. We use a pointer for
+    --  efficiency. Callers should not save the pointer, but should do things
+    --  like Scopes (Scope.Last).Something. Note that there is one place in
+    --  Par.Ch5 that indexes the stack out of bounds, and can't call this.
+ 
+    function Scopes (Index : Int) return Scope_Table_Entry_Ptr is
+    begin
+       pragma Assert (Index in Scope.First .. Scope.Last);
+       return Scope.Table (Index)'Unrestricted_Access;
+    end Scopes;
+ 
     ------------------------------------------
     -- Table for Handling Suspicious Labels --
     ------------------------------------------
*************** function Par (Configuration_Pragmas : Bo
*** 1332,1338 ****
        --  Push a new entry onto the scope stack. Scope.Last (the stack pointer)
        --  is incremented. The Junk field is preinitialized to False. The caller
        --  is expected to fill in all remaining entries of the new top stack
!       --  entry at Scope.Table (Scope.Last).
  
        procedure Pop_Scope_Stack;
        --  Pop an entry off the top of the scope stack. Scope_Last (the scope
--- 1355,1361 ----
        --  Push a new entry onto the scope stack. Scope.Last (the stack pointer)
        --  is incremented. The Junk field is preinitialized to False. The caller
        --  is expected to fill in all remaining entries of the new top stack
!       --  entry at Scopes (Scope.Last).
  
        procedure Pop_Scope_Stack;
        --  Pop an entry off the top of the scope stack. Scope_Last (the scope
*************** begin
*** 1534,1540 ****
           Compiler_State := Parsing;
           Scope.Init;
           Scope.Increment_Last;
!          Scope.Table (0).Etyp := E_Dummy;
           SIS_Entry_Active := False;
           Last_Resync_Point := No_Location;
  
--- 1557,1563 ----
           Compiler_State := Parsing;
           Scope.Init;
           Scope.Increment_Last;
!          Scopes (0).Etyp := E_Dummy;
           SIS_Entry_Active := False;
           Last_Resync_Point := No_Location;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/par_sco.adb gcc-10.1.0/gcc/ada/par_sco.adb
*** gcc-9.3.0/gcc/ada/par_sco.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/par_sco.adb	Thu May  7 10:49:59 2020
*************** package body Par_SCO is
*** 92,99 ****
     --  writing out the SCO information to the ALI file, we can fill in the
     --  proper dependency numbers and file names.
  
!    --  Note that the zero'th entry is here for convenience in sorting the
!    --  table, the real lower bound is 1.
  
     package SCO_Unit_Number_Table is new Table.Table
       (Table_Component_Type => Unit_Number_Type,
--- 92,99 ----
     --  writing out the SCO information to the ALI file, we can fill in the
     --  proper dependency numbers and file names.
  
!    --  Note that the zeroth entry is here for convenience in sorting the table;
!    --  the real lower bound is 1.
  
     package SCO_Unit_Number_Table is new Table.Table
       (Table_Component_Type => Unit_Number_Type,
diff -Nrcpad gcc-9.3.0/gcc/ada/prep.adb gcc-10.1.0/gcc/ada/prep.adb
*** gcc-9.3.0/gcc/ada/prep.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/prep.adb	Thu May  7 10:49:59 2020
*************** package body Prep is
*** 825,831 ****
     ------------------
  
     procedure List_Symbols (Foreword : String) is
!       Order : array (0 ..  Integer (Symbol_Table.Last (Mapping)))
                   of Symbol_Id;
        --  After alphabetical sorting, this array stores the indexes of the
        --  symbols in the order they are displayed.
--- 825,831 ----
     ------------------
  
     procedure List_Symbols (Foreword : String) is
!       Order : array (0 .. Integer (Symbol_Table.Last (Mapping)))
                   of Symbol_Id;
        --  After alphabetical sorting, this array stores the indexes of the
        --  symbols in the order they are displayed.
diff -Nrcpad gcc-9.3.0/gcc/ada/raise-gcc.c gcc-10.1.0/gcc/ada/raise-gcc.c
*** gcc-9.3.0/gcc/ada/raise-gcc.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/raise-gcc.c	Thu May  7 10:49:59 2020
***************
*** 39,49 ****
    /* Don't use fancy_abort.  */
  # undef abort
  #else
! # ifndef CERT
  #  include "tconfig.h"
  #  include "tsystem.h"
  # else
! #  define ATTRIBUTE_UNUSED __attribute__((unused))
  #  define HAVE_GETIPINFO 1
  # endif
  #endif
--- 39,49 ----
    /* Don't use fancy_abort.  */
  # undef abort
  #else
! # if !defined(CERT) && !defined(STANDALONE)
  #  include "tconfig.h"
  #  include "tsystem.h"
  # else
! #  include "runtime.h"
  #  define HAVE_GETIPINFO 1
  # endif
  #endif
*************** extern void __gnat_unhandled_except_hand
*** 115,120 ****
--- 115,124 ----
  /* Called in case of error during propagation.  */
  extern void __gnat_raise_abort (void) __attribute__ ((noreturn));
  #define abort() __gnat_raise_abort()
+ 
+ #elif defined(STANDALONE)
+ #include <stdlib.h>
+ #define inhibit_libc
  #endif
  
  #include "unwind-pe.h"
*************** get_call_site_action_for (_Unwind_Ptr ip
*** 885,891 ****
     argument, and PROPAGATED_EXCEPTION a pointer to the currently propagated
     occurrence, return true if the latter matches the former, that is, if
     PROPAGATED_EXCEPTION is caught by the handling code controlled by CHOICE.
!    This takes care of the special Non_Ada_Error case on VMS.  */
  
  #define Is_Handled_By_Others  __gnat_is_handled_by_others
  #define Language_For          __gnat_language_for
--- 889,895 ----
     argument, and PROPAGATED_EXCEPTION a pointer to the currently propagated
     occurrence, return true if the latter matches the former, that is, if
     PROPAGATED_EXCEPTION is caught by the handling code controlled by CHOICE.
! */
  
  #define Is_Handled_By_Others  __gnat_is_handled_by_others
  #define Language_For          __gnat_language_for
*************** extern Exception_Id EID_For (_GNAT_Excep
*** 902,912 ****
  #define Foreign_Exception system__exceptions__foreign_exception
  extern struct Exception_Data Foreign_Exception;
  
- #ifdef VMS
- #define Non_Ada_Error system__aux_dec__non_ada_error
- extern struct Exception_Data Non_Ada_Error;
- #endif
- 
  /* Return true iff the exception class of EXCEPT is EC.  */
  
  static int
--- 906,911 ----
*************** is_handled_by (_Unwind_Ptr choice, _GNAT
*** 947,969 ****
        if (choice == E || (choice == GNAT_OTHERS && Is_Handled_By_Others (E)))
  	return handler;
  
- #ifdef VMS
-       /* In addition, on OpenVMS, Non_Ada_Error matches VMS exceptions, and we
-          may have different exception data pointers that should match for the
-          same condition code, if both an export and an import have been
-          registered.  The import code for both the choice and the propagated
-          occurrence are expected to have been masked off regarding severity
-          bits already (at registration time for the former and from within the
-          low level exception vector for the latter).  */
-       if ((Language_For (E) == 'V'
- 	   && choice != GNAT_OTHERS
- 	   && ((Language_For (choice) == 'V'
- 		&& Foreign_Data_For (choice) != 0
- 		&& Foreign_Data_For (choice) == Foreign_Data_For (E))
- 	       || choice == (_Unwind_Ptr)&Non_Ada_Error)))
- 	return handler;
- #endif
- 
        /* Otherwise, it doesn't match an Ada choice.  */
        return nothing;
      }
--- 946,951 ----
*************** personality_body (_Unwind_Action uw_phas
*** 1229,1234 ****
--- 1211,1226 ----
  	}
        else
  	{
+ #ifdef __ARM_EABI_UNWINDER__
+ 	  /* Though we do not use this field ourselves, initializing
+ 	     it is required by the ARM EH ABI before a personality
+ 	     function in phase1 returns _URC_HANDLER_FOUND, so that
+ 	     any personality function can use it in phase2 to test
+ 	     whether the handler frame was reached.  */
+ 	  uw_exception->barrier_cache.sp
+ 	    = _Unwind_GetGR (uw_context, UNWIND_STACK_REG);
+ #endif
+ 
  #ifndef CERT
  	  /* Trigger the appropriate notification routines before the second
  	     phase starts, when the stack is still intact.  First install what
*************** personality_body (_Unwind_Action uw_phas
*** 1267,1302 ****
  }
  
  #ifndef __ARM_EABI_UNWINDER__
- /* Major tweak for ia64-vms : the CHF propagation phase calls this personality
-    routine with sigargs/mechargs arguments and has very specific expectations
-    on possible return values.
- 
-    We handle this with a number of specific tricks:
- 
-    1. We tweak the personality routine prototype to have the "version" and
-       "phases" two first arguments be void * instead of int and _Unwind_Action
-       as nominally expected in the GCC context.
- 
-       This allows us to access the full range of bits passed in every case and
-       has no impact on the callers side since each argument remains assigned
-       the same single 64bit slot.
- 
-    2. We retrieve the corresponding int and _Unwind_Action values within the
-       routine for regular use with truncating conversions. This is a noop when
-       called from the libgcc unwinder.
- 
-    3. We assume we're called by the VMS CHF when unexpected bits are set in
-       both those values. The incoming arguments are then real sigargs and
-       mechargs pointers, which we then redirect to __gnat_handle_vms_condition
-       for proper processing.
- */
- #if defined (VMS) && defined (__IA64)
- typedef void * version_arg_t;
- typedef void * phases_arg_t;
- #else
  typedef int version_arg_t;
  typedef _Unwind_Action phases_arg_t;
- #endif
  
  PERSONALITY_STORAGE _Unwind_Reason_Code
  PERSONALITY_FUNCTION (version_arg_t, phases_arg_t,
--- 1259,1266 ----
*************** PERSONALITY_FUNCTION (version_arg_t vers
*** 1317,1344 ****
    int uw_version = (int) version_arg;
    _Unwind_Action uw_phases = (_Unwind_Action) phases_arg;
  
!   /* Check that we're called from the ABI context we expect, with a major
!      possible variation on VMS for IA64.  */
    if (uw_version != 1)
!     {
! #if defined (VMS) && defined (__IA64)
! 
!       /* Assume we're called with sigargs/mechargs arguments if really
! 	 unexpected bits are set in our first two formals.  Redirect to the
! 	 GNAT condition handling code in this case.  */
! 
!       extern long __gnat_handle_vms_condition (void *, void *);
! 
!       unsigned int version_unexpected_bits_mask = 0xffffff00U;
!       unsigned int phases_unexpected_bits_mask  = 0xffffff00U;
! 
!       if ((unsigned int)uw_version & version_unexpected_bits_mask
! 	  && (unsigned int)uw_phases & phases_unexpected_bits_mask)
! 	return __gnat_handle_vms_condition (version_arg, phases_arg);
! #endif
! 
!       return _URC_FATAL_PHASE1_ERROR;
!     }
  
    return personality_body (uw_phases, uw_exception, uw_context);
  }
--- 1281,1289 ----
    int uw_version = (int) version_arg;
    _Unwind_Action uw_phases = (_Unwind_Action) phases_arg;
  
!   /* Check that we're called from the ABI context we expect.  */
    if (uw_version != 1)
!     return _URC_FATAL_PHASE1_ERROR;
  
    return personality_body (uw_phases, uw_exception, uw_context);
  }
*************** __gnat_personality_seh0 (PEXCEPTION_RECO
*** 1664,1669 ****
--- 1609,1627 ----
  			   __gnat_personality_imp);
  }
  
+ /* Define __gnat_personality_v0 for convenience */
+ 
+ PERSONALITY_STORAGE _Unwind_Reason_Code
+ __gnat_personality_v0 (version_arg_t version_arg,
+ 		       phases_arg_t phases_arg,
+ 		       _Unwind_Exception_Class uw_exception_class,
+ 		       _Unwind_Exception *uw_exception,
+ 		       _Unwind_Context *uw_context)
+ {
+   return PERSONALITY_FUNCTION
+     (version_arg, phases_arg, uw_exception_class, uw_exception, uw_context);
+ }
+ 
  #endif /* SEH */
  
  #if !defined (__USING_SJLJ_EXCEPTIONS__)
diff -Nrcpad gcc-9.3.0/gcc/ada/raise.c gcc-10.1.0/gcc/ada/raise.c
*** gcc-9.3.0/gcc/ada/raise.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/raise.c	Thu May  7 10:49:59 2020
***************
*** 33,40 ****
     is shared between all exception handling mechanisms.  */
  
  #ifdef IN_RTS
! #include "tconfig.h"
! #include "tsystem.h"
  #else
  #include "config.h"
  #include "system.h"
--- 33,39 ----
     is shared between all exception handling mechanisms.  */
  
  #ifdef IN_RTS
! #include "runtime.h"
  #else
  #include "config.h"
  #include "system.h"
*************** extern "C" {
*** 56,71 ****
  void
  __gnat_unhandled_terminate (void)
  {
- #ifdef VMS
-   /* Special termination handling for VMS */
-   long prvhnd;
- 
-   /* Remove the exception vector so it won't intercept any errors
-      in the call to exit, and go into and endless loop */
- 
-   SYS$SETEXV (1, 0, 3, &prvhnd);
- #endif
- 
    /* Default termination handling */
    __gnat_os_exit (1);
  }
--- 55,60 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/repinfo-input.adb gcc-10.1.0/gcc/ada/repinfo-input.adb
*** gcc-9.3.0/gcc/ada/repinfo-input.adb	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/repinfo-input.adb	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,1350 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                         R E P I N F O - I N P U T                        --
+ --                                                                          --
+ --                                 B o d y                                  --
+ --                                                                          --
+ --          Copyright (C) 2018-2019, Free Software Foundation, Inc.         --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ with Alloc;
+ with Csets;    use Csets;
+ with Hostparm; use Hostparm;
+ with Namet;    use Namet;
+ with Output;   use Output;
+ with Snames;   use Snames;
+ with Table;
+ 
+ package body Repinfo.Input is
+ 
+    SSU : constant := 8;
+    --  Value for Storage_Unit, we do not want to get this from TTypes, since
+    --  this introduces problematic dependencies in ASIS, and in any case this
+    --  value is assumed to be 8 for the implementation of the DDA.
+ 
+    type JSON_Entity_Kind is (JE_Record_Type, JE_Array_Type, JE_Other);
+    --  Kind of an entiy
+ 
+    type JSON_Entity_Node (Kind : JSON_Entity_Kind := JE_Other) is record
+       Esize   : Node_Ref_Or_Val;
+       RM_Size : Node_Ref_Or_Val;
+       case Kind is
+          when JE_Record_Type => Variant        : Nat;
+          when JE_Array_Type  => Component_Size : Node_Ref_Or_Val;
+          when JE_Other       => Dummy          : Boolean;
+       end case;
+    end record;
+    pragma Unchecked_Union (JSON_Entity_Node);
+    --  Record to represent an entity
+ 
+    package JSON_Entity_Table is new Table.Table (
+       Table_Component_Type => JSON_Entity_Node,
+       Table_Index_Type     => Nat,
+       Table_Low_Bound      => 1,
+       Table_Initial        => Alloc.Rep_JSON_Table_Initial,
+       Table_Increment      => Alloc.Rep_JSON_Table_Increment,
+       Table_Name           => "JSON_Entity_Table");
+    --  Table of entities
+ 
+    type JSON_Component_Node is record
+       Bit_Offset : Node_Ref_Or_Val;
+       Esize      : Node_Ref_Or_Val;
+    end record;
+    --  Record to represent a component
+ 
+    package JSON_Component_Table is new Table.Table (
+       Table_Component_Type => JSON_Component_Node,
+       Table_Index_Type     => Nat,
+       Table_Low_Bound      => 1,
+       Table_Initial        => Alloc.Rep_JSON_Table_Initial,
+       Table_Increment      => Alloc.Rep_JSON_Table_Increment,
+       Table_Name           => "JSON_Component_Table");
+    --  Table of components
+ 
+    type JSON_Variant_Node is record
+       Present : Node_Ref_Or_Val;
+       Variant : Nat;
+       Next    : Nat;
+    end record;
+    --  Record to represent a variant
+ 
+    package JSON_Variant_Table is new Table.Table (
+       Table_Component_Type => JSON_Variant_Node,
+       Table_Index_Type     => Nat,
+       Table_Low_Bound      => 1,
+       Table_Initial        => Alloc.Rep_JSON_Table_Initial,
+       Table_Increment      => Alloc.Rep_JSON_Table_Increment,
+       Table_Name           => "JSON_Variant_Table");
+    --  Table of variants
+ 
+    -------------------------------------
+    --  Get_JSON_Component_Bit_Offset  --
+    -------------------------------------
+ 
+    function Get_JSON_Component_Bit_Offset
+      (Name        : String;
+       Record_Name : String) return Node_Ref_Or_Val
+    is
+       Namid : constant Valid_Name_Id := Name_Find (Record_Name & '.' & Name);
+       Index : constant Int := Get_Name_Table_Int (Namid);
+ 
+    begin
+       --  Return No_Uint if no information is available for the component
+ 
+       if Index = 0 then
+          return No_Uint;
+       end if;
+ 
+       return JSON_Component_Table.Table (Index).Bit_Offset;
+    end Get_JSON_Component_Bit_Offset;
+ 
+    -------------------------------
+    --  Get_JSON_Component_Size  --
+    -------------------------------
+ 
+    function Get_JSON_Component_Size (Name : String) return Node_Ref_Or_Val is
+       Namid : constant Valid_Name_Id := Name_Find (Name);
+       Index : constant Int := Get_Name_Table_Int (Namid);
+ 
+    begin
+       --  Return No_Uint if no information is available for the component
+ 
+       if Index = 0 then
+          return No_Uint;
+       end if;
+ 
+       return JSON_Entity_Table.Table (Index).Component_Size;
+    end Get_JSON_Component_Size;
+ 
+    ----------------------
+    --  Get_JSON_Esize  --
+    ----------------------
+ 
+    function Get_JSON_Esize (Name : String) return Node_Ref_Or_Val is
+       Namid : constant Valid_Name_Id := Name_Find (Name);
+       Index : constant Int := Get_Name_Table_Int (Namid);
+ 
+    begin
+       --  Return No_Uint if no information is available for the entity
+ 
+       if Index = 0 then
+          return No_Uint;
+       end if;
+ 
+       return JSON_Entity_Table.Table (Index).Esize;
+    end Get_JSON_Esize;
+ 
+    ----------------------
+    --  Get_JSON_Esize  --
+    ----------------------
+ 
+    function Get_JSON_Esize
+      (Name        : String;
+       Record_Name : String) return Node_Ref_Or_Val
+    is
+       Namid : constant Valid_Name_Id := Name_Find (Record_Name & '.' & Name);
+       Index : constant Int := Get_Name_Table_Int (Namid);
+ 
+    begin
+       --  Return No_Uint if no information is available for the entity
+ 
+       if Index = 0 then
+          return No_Uint;
+       end if;
+ 
+       return JSON_Component_Table.Table (Index).Esize;
+    end Get_JSON_Esize;
+ 
+    ------------------------
+    --  Get_JSON_RM_Size  --
+    ------------------------
+ 
+    function Get_JSON_RM_Size (Name : String) return Node_Ref_Or_Val is
+       Namid : constant Valid_Name_Id := Name_Find (Name);
+       Index : constant Int := Get_Name_Table_Int (Namid);
+ 
+    begin
+       --  Return No_Uint if no information is available for the entity
+ 
+       if Index = 0 then
+          return No_Uint;
+       end if;
+ 
+       return JSON_Entity_Table.Table (Index).RM_Size;
+    end Get_JSON_RM_Size;
+ 
+    -----------------------
+    --  Read_JSON_Stream --
+    -----------------------
+ 
+    procedure Read_JSON_Stream (Text : Text_Buffer; File_Name : String) is
+ 
+       type Text_Position is record
+          Index  : Text_Ptr := 0;
+          Line   : Natural := 0;
+          Column : Natural := 0;
+       end record;
+       --  Record to represent position in the text
+ 
+       type Token_Kind is
+         (J_NULL,
+          J_TRUE,
+          J_FALSE,
+          J_NUMBER,
+          J_INTEGER,
+          J_STRING,
+          J_ARRAY,
+          J_OBJECT,
+          J_ARRAY_END,
+          J_OBJECT_END,
+          J_COMMA,
+          J_COLON,
+          J_EOF);
+       --  JSON Token kind. Note that in ECMA 404 there is no notion of integer.
+       --  Only numbers are supported. In our implementation we return J_INTEGER
+       --  if there is no decimal part in the number. The semantic is that this
+       --  is a J_NUMBER token that might be represented as an integer. Special
+       --  token J_EOF means that end of stream has been reached.
+ 
+       function Decode_Integer (Lo, Hi : Text_Ptr) return Uint;
+       --  Decode and return the integer in Text (Lo .. Hi)
+ 
+       function Decode_Name (Lo, Hi : Text_Ptr) return Valid_Name_Id;
+       --  Decode and return the name in Text (Lo .. Hi)
+ 
+       function Decode_Symbol (Lo, Hi : Text_Ptr) return TCode;
+       --  Decode and return the expression symbol in Text (Lo .. Hi)
+ 
+       procedure Error (Msg : String);
+       pragma No_Return (Error);
+       --  Print an error message and raise an exception
+ 
+       procedure Read_Entity;
+       --  Read an entity
+ 
+       function Read_Name return Valid_Name_Id;
+       --  Read a name
+ 
+       function Read_Name_With_Prefix return Valid_Name_Id;
+       --  Read a name and prepend a prefix
+ 
+       function Read_Number return Uint;
+       --  Read a number
+ 
+       function Read_Numerical_Expr return Node_Ref_Or_Val;
+       --  Read a numerical expression
+ 
+       procedure Read_Record;
+       --  Read a record
+ 
+       function Read_String return Valid_Name_Id;
+       --  Read a string
+ 
+       procedure Read_Token
+         (Kind        : out Token_Kind;
+          Token_Start : out Text_Position;
+          Token_End   : out Text_Position);
+       --  Read a token and return it (this is a standard JSON lexer)
+ 
+       procedure Read_Token_And_Error
+         (TK          : Token_Kind;
+          Token_Start : out Text_Position;
+          Token_End   : out Text_Position);
+       pragma Inline (Read_Token_And_Error);
+       --  Read a specified token and error out on failure
+ 
+       function Read_Variant_Part return Nat;
+       --  Read a variant part
+ 
+       procedure Skip_Value;
+       --  Skip a value
+ 
+       Pos : Text_Position := (Text'First, 1, 1);
+       --  The current position in the text buffer
+ 
+       Name_Buffer : Bounded_String (4 * Max_Name_Length);
+       --  The buffer used to build full qualifed names
+ 
+       Prefix_Len : Natural := 0;
+       --  The length of the prefix present in Name_Buffer
+ 
+       ----------------------
+       --  Decode_Integer  --
+       ----------------------
+ 
+       function Decode_Integer (Lo, Hi : Text_Ptr) return Uint is
+          Len  : constant Nat := Int (Hi) - Int (Lo) + 1;
+ 
+       begin
+          --  Decode up to 9 characters manually, otherwise call into Uint
+ 
+          if Len < 10 then
+             declare
+                Val : Int := 0;
+ 
+             begin
+                for J in Lo .. Hi loop
+                   Val := Val * 10
+                            + Character'Pos (Text (J)) - Character'Pos ('0');
+                end loop;
+                return UI_From_Int (Val);
+             end;
+ 
+          else
+             declare
+                Val : Uint := Uint_0;
+ 
+             begin
+                for J in Lo .. Hi loop
+                   Val := Val * 10
+                            + Character'Pos (Text (J)) - Character'Pos ('0');
+                end loop;
+                return Val;
+             end;
+          end if;
+       end Decode_Integer;
+ 
+       -------------------
+       --  Decode_Name  --
+       -------------------
+ 
+       function Decode_Name (Lo, Hi : Text_Ptr) return Valid_Name_Id is
+       begin
+          --  Names are stored in lower case so fold them if need be
+ 
+          if Is_Upper_Case_Letter (Text (Lo)) then
+             declare
+                S : String (Integer (Lo) .. Integer (Hi));
+ 
+             begin
+                for J in Lo .. Hi loop
+                   S (Integer (J)) := Fold_Lower (Text (J));
+                end loop;
+ 
+                return Name_Find (S);
+             end;
+ 
+          else
+             declare
+                S : String (Integer (Lo) .. Integer (Hi));
+                for S'Address use Text (Lo)'Address;
+ 
+             begin
+                return Name_Find (S);
+             end;
+          end if;
+       end Decode_Name;
+ 
+       ---------------------
+       --  Decode_Symbol  --
+       ---------------------
+ 
+       function Decode_Symbol (Lo, Hi : Text_Ptr) return TCode is
+ 
+          function Cmp12 (A, B : Character) return Boolean;
+          pragma Inline (Cmp12);
+          --  Compare Text (Lo + 1 .. Lo + 2) with A & B.
+ 
+          -------------
+          --  Cmp12  --
+          -------------
+ 
+          function Cmp12 (A, B : Character) return Boolean is
+          begin
+             return Text (Lo + 1) = A and then Text (Lo + 2) = B;
+          end Cmp12;
+ 
+          Len : constant Nat := Int (Hi) - Int (Lo) + 1;
+ 
+       --  Start of processing for Decode_Symbol
+ 
+       begin
+          case Len is
+             when 1 =>
+                case Text (Lo) is
+                   when '+' =>
+                      return Plus_Expr;
+                   when '-' =>
+                      return Minus_Expr; -- or Negate_Expr
+                   when '*' =>
+                      return Mult_Expr;
+                   when '<' =>
+                      return Lt_Expr;
+                   when '>' =>
+                      return Gt_Expr;
+                   when '&' =>
+                      return Bit_And_Expr;
+                   when '#' =>
+                      return Discrim_Val;
+                   when others =>
+                      null;
+                end case;
+             when 2 =>
+                if Text (Lo) = '/' then
+                   case Text (Lo + 1) is
+                      when 't' =>
+                         return Trunc_Div_Expr;
+                      when 'c' =>
+                         return Ceil_Div_Expr;
+                      when 'f' =>
+                         return Floor_Div_Expr;
+                      when 'e' =>
+                         return Exact_Div_Expr;
+                      when others =>
+                         null;
+                   end case;
+                elsif Text (Lo + 1) = '=' then
+                   case Text (Lo) is
+                      when '<' =>
+                         return Le_Expr;
+                      when '>' =>
+                         return Ge_Expr;
+                      when '=' =>
+                         return Eq_Expr;
+                      when '!' =>
+                         return Ne_Expr;
+                      when others =>
+                         null;
+                   end case;
+                elsif Text (Lo) = 'o' and then Text (Lo + 1) = 'r' then
+                   return Truth_Or_Expr;
+                end if;
+             when 3 =>
+                case Text (Lo) is
+                   when '?' =>
+                      if Cmp12 ('<', '>') then
+                         return Cond_Expr;
+                      end if;
+                   when 'a' =>
+                      if Cmp12 ('b', 's') then
+                         return Abs_Expr;
+                      elsif Cmp12 ('n', 'd') then
+                         return Truth_And_Expr;
+                      end if;
+                   when 'm' =>
+                      if Cmp12 ('a', 'x') then
+                         return Max_Expr;
+                      elsif Cmp12 ('i', 'n') then
+                         return Min_Expr;
+                      end if;
+                   when 'n' =>
+                      if Cmp12 ('o', 't') then
+                         return Truth_Not_Expr;
+                      end if;
+                   when 'x' =>
+                      if Cmp12 ('o', 'r') then
+                         return Truth_Xor_Expr;
+                      end if;
+                   when 'v' =>
+                      if Cmp12 ('a', 'r') then
+                         return Dynamic_Val;
+                      end if;
+                   when others =>
+                      null;
+                end case;
+             when 4 =>
+                if Text (Lo) = 'm'
+                  and then Text (Lo + 1) = 'o'
+                  and then Text (Lo + 2) = 'd'
+                then
+                   case Text (Lo + 3) is
+                      when 't' =>
+                         return Trunc_Mod_Expr;
+                      when 'c' =>
+                         return Ceil_Mod_Expr;
+                      when 'f' =>
+                         return Floor_Mod_Expr;
+                      when others =>
+                         null;
+                   end case;
+                end if;
+ 
+                pragma Annotate
+                  (CodePeer, Intentional,
+                   "condition predetermined", "Error called as defensive code");
+ 
+             when others =>
+                null;
+          end case;
+ 
+          Error ("unknown symbol");
+       end Decode_Symbol;
+ 
+       -----------
+       -- Error --
+       -----------
+ 
+       procedure Error (Msg : String) is
+          L : constant String := Pos.Line'Img;
+          C : constant String := Pos.Column'Img;
+ 
+       begin
+          Set_Standard_Error;
+          Write_Eol;
+          Write_Str (File_Name);
+          Write_Char (':');
+          Write_Str (L (L'First + 1 .. L'Last));
+          Write_Char (':');
+          Write_Str (C (C'First + 1 .. C'Last));
+          Write_Char (':');
+          Write_Line (Msg);
+          raise Invalid_JSON_Stream;
+       end Error;
+ 
+       ------------------
+       --  Read_Entity --
+       ------------------
+ 
+       procedure Read_Entity is
+          Ent         : JSON_Entity_Node;
+          Nam         : Name_Id := No_Name;
+          Siz         : Node_Ref_Or_Val;
+          Token_Start : Text_Position;
+          Token_End   : Text_Position;
+          TK          : Token_Kind;
+ 
+       begin
+          Ent.Esize          := No_Uint;
+          Ent.RM_Size        := No_Uint;
+          Ent.Component_Size := No_Uint;
+ 
+          --  Read the members as string : value pairs
+ 
+          loop
+             case Read_String is
+                when Name_Name =>
+                   Nam := Read_Name;
+                when Name_Record =>
+                   if Nam = No_Name then
+                      Error ("name expected");
+                   end if;
+                   Ent.Variant := 0;
+                   Prefix_Len := Natural (Length_Of_Name (Nam));
+                   Name_Buffer.Chars (1 .. Prefix_Len) := Get_Name_String (Nam);
+                   Read_Record;
+                when Name_Variant =>
+                   Ent.Variant := Read_Variant_Part;
+                when Name_Size =>
+                   Siz := Read_Numerical_Expr;
+                   Ent.Esize := Siz;
+                   Ent.RM_Size := Siz;
+                when Name_Object_Size =>
+                   Ent.Esize := Read_Numerical_Expr;
+                when Name_Value_Size =>
+                   Ent.RM_Size := Read_Numerical_Expr;
+                when Name_Component_Size =>
+                   Ent.Component_Size := Read_Numerical_Expr;
+                when others =>
+                   Skip_Value;
+             end case;
+ 
+             Read_Token (TK, Token_Start, Token_End);
+             if TK = J_OBJECT_END then
+                exit;
+             elsif TK /= J_COMMA then
+                Error ("comma expected");
+             end if;
+          end loop;
+ 
+          --  Store the entity into the table
+ 
+          JSON_Entity_Table.Append (Ent);
+ 
+          --  Associate the name with the entity
+ 
+          if Nam = No_Name then
+             Error ("name expected");
+          end if;
+ 
+          Set_Name_Table_Int (Nam, JSON_Entity_Table.Last);
+       end Read_Entity;
+ 
+       -----------------
+       --  Read_Name  --
+       -----------------
+ 
+       function Read_Name return Valid_Name_Id is
+          Token_Start : Text_Position;
+          Token_End   : Text_Position;
+ 
+       begin
+          --  Read a single string
+ 
+          Read_Token_And_Error (J_STRING, Token_Start, Token_End);
+ 
+          return Decode_Name (Token_Start.Index + 1, Token_End.Index - 1);
+       end Read_Name;
+ 
+       -----------------------------
+       --  Read_Name_With_Prefix  --
+       -----------------------------
+ 
+       function Read_Name_With_Prefix return Valid_Name_Id is
+          Len         : Natural;
+          Lo, Hi      : Text_Ptr;
+          Token_Start : Text_Position;
+          Token_End   : Text_Position;
+ 
+       begin
+          --  Read a single string
+ 
+          Read_Token_And_Error (J_STRING, Token_Start, Token_End);
+          Lo := Token_Start.Index + 1;
+          Hi := Token_End.Index - 1;
+ 
+          --  Prepare for the concatenation with the prefix
+ 
+          Len := Integer (Hi) - Integer (Lo) + 1;
+          if Prefix_Len + 1 + Len > Name_Buffer.Max_Length then
+             Error ("Name buffer too small");
+          end if;
+ 
+          Name_Buffer.Length := Prefix_Len + 1 + Len;
+          Name_Buffer.Chars (Prefix_Len + 1) := '.';
+ 
+          --  Names are stored in lower case so fold them if need be
+ 
+          if Is_Upper_Case_Letter (Text (Lo)) then
+             for J in Lo .. Hi loop
+                Name_Buffer.Chars (Prefix_Len + 2 + Integer (J - Lo)) :=
+                                                          Fold_Lower (Text (J));
+             end loop;
+ 
+          else
+             declare
+                S : String (Integer (Lo) .. Integer (Hi));
+                for S'Address use Text (Lo)'Address;
+ 
+             begin
+                Name_Buffer.Chars (Prefix_Len + 2 .. Prefix_Len + 1 + Len) := S;
+             end;
+          end if;
+ 
+          return Name_Find (Name_Buffer);
+       end Read_Name_With_Prefix;
+ 
+       ------------------
+       --  Read_Number --
+       ------------------
+ 
+       function Read_Number return Uint is
+          Token_Start : Text_Position;
+          Token_End   : Text_Position;
+ 
+       begin
+          --  Only integers are to be expected here
+ 
+          Read_Token_And_Error (J_INTEGER, Token_Start, Token_End);
+ 
+          return Decode_Integer (Token_Start.Index, Token_End.Index);
+       end Read_Number;
+ 
+       --------------------------
+       --  Read_Numerical_Expr --
+       --------------------------
+ 
+       function Read_Numerical_Expr return Node_Ref_Or_Val is
+          Code        : TCode;
+          Nop         : Integer;
+          Ops         : array (1 .. 3) of Node_Ref_Or_Val;
+          TK          : Token_Kind;
+          Token_Start : Text_Position;
+          Token_End   : Text_Position;
+ 
+       begin
+          --  Read either an integer or an expression
+ 
+          Read_Token (TK, Token_Start, Token_End);
+          if TK = J_INTEGER then
+             return Decode_Integer (Token_Start.Index, Token_End.Index);
+ 
+          elsif TK = J_OBJECT then
+             --  Read the code of the expression and decode it
+ 
+             if Read_String /= Name_Code then
+                Error ("name expected");
+             end if;
+ 
+             Read_Token_And_Error (J_STRING, Token_Start, Token_End);
+             Code := Decode_Symbol (Token_Start.Index + 1, Token_End.Index - 1);
+             Read_Token_And_Error (J_COMMA, Token_Start, Token_End);
+ 
+             --  Read the array of operands
+ 
+             if Read_String /= Name_Operands then
+                Error ("operands expected");
+             end if;
+ 
+             Read_Token_And_Error (J_ARRAY, Token_Start, Token_End);
+ 
+             Nop := 0;
+             Ops := (others => No_Uint);
+             loop
+                Nop := Nop + 1;
+                Ops (Nop) := Read_Numerical_Expr;
+                Read_Token (TK, Token_Start, Token_End);
+                if TK = J_ARRAY_END then
+                   exit;
+                elsif TK /= J_COMMA then
+                   Error ("comma expected");
+                end if;
+             end loop;
+ 
+             Read_Token_And_Error (J_OBJECT_END, Token_Start, Token_End);
+ 
+             --  Resolve the ambiguity for '-' now
+ 
+             if Code = Minus_Expr and then Nop = 1 then
+                Code := Negate_Expr;
+             end if;
+ 
+             return Create_Node (Code, Ops (1), Ops (2), Ops (3));
+ 
+          else
+             Error ("numerical expression expected");
+          end if;
+       end Read_Numerical_Expr;
+ 
+       -------------------
+       --  Read_Record  --
+       -------------------
+ 
+       procedure Read_Record is
+          Comp        : JSON_Component_Node;
+          First_Bit   : Node_Ref_Or_Val := No_Uint;
+          Is_First    : Boolean := True;
+          Nam         : Name_Id := No_Name;
+          Position    : Node_Ref_Or_Val := No_Uint;
+          TK          : Token_Kind;
+          Token_Start : Text_Position;
+          Token_End   : Text_Position;
+ 
+       begin
+          --  Read a possibly empty array of components
+ 
+          Read_Token_And_Error (J_ARRAY, Token_Start, Token_End);
+ 
+          loop
+             Read_Token (TK, Token_Start, Token_End);
+             if Is_First and then TK = J_ARRAY_END then
+                exit;
+             elsif TK /= J_OBJECT then
+                Error ("object expected");
+             end if;
+ 
+             --  Read the members as string : value pairs
+ 
+             loop
+                case Read_String is
+                   when Name_Name =>
+                      Nam := Read_Name_With_Prefix;
+                   when Name_Discriminant =>
+                      Skip_Value;
+                   when Name_Position =>
+                      Position := Read_Numerical_Expr;
+                   when Name_First_Bit =>
+                      First_Bit := Read_Number;
+                   when Name_Size =>
+                      Comp.Esize := Read_Numerical_Expr;
+                   when others =>
+                      Error ("invalid component");
+                end case;
+ 
+                Read_Token (TK, Token_Start, Token_End);
+                if TK = J_OBJECT_END then
+                   exit;
+                elsif TK /= J_COMMA then
+                   Error ("comma expected");
+                end if;
+             end loop;
+ 
+             --  Compute Component_Bit_Offset from Position and First_Bit,
+             --  either symbolically or literally depending on Position.
+ 
+             if Position = No_Uint or else First_Bit = No_Uint then
+                Error ("bit offset expected");
+             end if;
+ 
+             if Position < Uint_0 then
+                declare
+                   Bit_Position : constant Node_Ref_Or_Val :=
+                           Create_Node (Mult_Expr, Position, UI_From_Int (SSU));
+                begin
+                   if First_Bit = Uint_0 then
+                      Comp.Bit_Offset := Bit_Position;
+                   else
+                      Comp.Bit_Offset :=
+                               Create_Node (Plus_Expr, Bit_Position, First_Bit);
+                   end if;
+                end;
+             else
+                Comp.Bit_Offset := Position * SSU + First_Bit;
+             end if;
+ 
+             --  Store the component into the table
+ 
+             JSON_Component_Table.Append (Comp);
+ 
+             --  Associate the name with the component
+ 
+             if Nam = No_Name then
+                Error ("name expected");
+             end if;
+ 
+             Set_Name_Table_Int (Nam, JSON_Component_Table.Last);
+ 
+             Read_Token (TK, Token_Start, Token_End);
+             if TK = J_ARRAY_END then
+                exit;
+             elsif TK /= J_COMMA then
+                Error ("comma expected");
+             end if;
+ 
+             Is_First := False;
+          end loop;
+       end Read_Record;
+ 
+       ------------------
+       --  Read_String --
+       ------------------
+ 
+       function Read_String return Valid_Name_Id is
+          Token_Start : Text_Position;
+          Token_End   : Text_Position;
+          Nam         : Valid_Name_Id;
+ 
+       begin
+          --  Read the string and the following colon
+ 
+          Read_Token_And_Error (J_STRING, Token_Start, Token_End);
+          Nam := Decode_Name (Token_Start.Index + 1, Token_End.Index - 1);
+          Read_Token_And_Error (J_COLON, Token_Start, Token_End);
+ 
+          return Nam;
+       end Read_String;
+ 
+       ------------------
+       --  Read_Token  --
+       ------------------
+ 
+       procedure Read_Token
+         (Kind        : out Token_Kind;
+          Token_Start : out Text_Position;
+          Token_End   : out Text_Position)
+       is
+          procedure Next_Char;
+          --  Update Pos to point to next char
+ 
+          function Is_Whitespace return Boolean;
+          pragma Inline (Is_Whitespace);
+          --  Return True of current character is a whitespace
+ 
+          function Is_Structural_Token return Boolean;
+          pragma Inline (Is_Structural_Token);
+          --  Return True if current character is one of the structural tokens
+ 
+          function Is_Token_Sep return Boolean;
+          pragma Inline (Is_Token_Sep);
+          --  Return True if current character is a token separator
+ 
+          procedure Delimit_Keyword (Kw : String);
+          --  Helper function to parse tokens such as null, false and true
+ 
+          ---------------
+          -- Next_Char --
+          ---------------
+ 
+          procedure Next_Char is
+          begin
+             if Pos.Index > Text'Last then
+                Pos.Column := Pos.Column + 1;
+             elsif Text (Pos.Index) = ASCII.LF then
+                Pos.Column := 1;
+                Pos.Line := Pos.Line + 1;
+             else
+                Pos.Column := Pos.Column + 1;
+             end if;
+             Pos.Index := Pos.Index + 1;
+          end Next_Char;
+ 
+          -------------------
+          -- Is_Whitespace --
+          -------------------
+ 
+          function Is_Whitespace return Boolean is
+          begin
+             return
+               Pos.Index <= Text'Last
+                 and then
+               (Text (Pos.Index) = ASCII.LF
+                  or else
+                Text (Pos.Index) = ASCII.CR
+                  or else
+                Text (Pos.Index) = ASCII.HT
+                  or else
+                Text (Pos.Index) = ' ');
+          end Is_Whitespace;
+ 
+          -------------------------
+          -- Is_Structural_Token --
+          -------------------------
+ 
+          function Is_Structural_Token return Boolean is
+          begin
+             return
+               Pos.Index <= Text'Last
+                 and then
+               (Text (Pos.Index) = '['
+                  or else
+                Text (Pos.Index) = ']'
+                  or else
+                Text (Pos.Index) = '{'
+                  or else
+                Text (Pos.Index) = '}'
+                  or else
+                Text (Pos.Index) = ','
+                  or else
+                Text (Pos.Index) = ':');
+          end Is_Structural_Token;
+ 
+          ------------------
+          -- Is_Token_Sep --
+          ------------------
+ 
+          function Is_Token_Sep return Boolean is
+          begin
+             return
+               Pos.Index > Text'Last
+                 or else
+               Is_Whitespace
+                 or else
+               Is_Structural_Token;
+          end Is_Token_Sep;
+ 
+          ---------------------
+          -- Delimit_Keyword --
+          ---------------------
+ 
+          procedure Delimit_Keyword (Kw : String) is
+             pragma Unreferenced (Kw);
+          begin
+             while not Is_Token_Sep loop
+                Token_End := Pos;
+                Next_Char;
+             end loop;
+          end Delimit_Keyword;
+ 
+          CC             : Character;
+          Can_Be_Integer : Boolean := True;
+ 
+       --  Start of processing for Read_Token
+ 
+       begin
+          --  Skip leading whitespaces
+ 
+          while Is_Whitespace loop
+             Next_Char;
+          end loop;
+ 
+          --  Initialize token delimiters
+ 
+          Token_Start := Pos;
+          Token_End   := Pos;
+ 
+          --  End of stream reached
+ 
+          if Pos.Index > Text'Last then
+             Kind := J_EOF;
+             return;
+          end if;
+ 
+          CC := Text (Pos.Index);
+ 
+          if CC = '[' then
+             Next_Char;
+             Kind := J_ARRAY;
+             return;
+          elsif CC = ']' then
+             Next_Char;
+             Kind := J_ARRAY_END;
+             return;
+          elsif CC = '{' then
+             Next_Char;
+             Kind := J_OBJECT;
+             return;
+          elsif CC = '}' then
+             Next_Char;
+             Kind := J_OBJECT_END;
+             return;
+          elsif CC = ',' then
+             Next_Char;
+             Kind := J_COMMA;
+             return;
+          elsif CC = ':' then
+             Next_Char;
+             Kind := J_COLON;
+             return;
+          elsif CC = 'n' then
+             Delimit_Keyword ("null");
+             Kind := J_NULL;
+             return;
+          elsif CC = 'f' then
+             Delimit_Keyword ("false");
+             Kind := J_FALSE;
+             return;
+          elsif CC = 't' then
+             Delimit_Keyword ("true");
+             Kind := J_TRUE;
+             return;
+          elsif CC = '"' then
+             --  We expect a string
+             --  Just scan till the end the of the string but do not attempt
+             --  to decode it. This means that even if we get a string token
+             --  it might not be a valid string from the ECMA 404 point of
+             --  view.
+ 
+             Next_Char;
+             while Pos.Index <= Text'Last and then Text (Pos.Index) /= '"' loop
+                if Text (Pos.Index) in ASCII.NUL .. ASCII.US then
+                   Error ("control character not allowed in string");
+                end if;
+ 
+                if Text (Pos.Index) = '\' then
+                   Next_Char;
+                   if Pos.Index > Text'Last then
+                      Error ("non terminated string token");
+                   end if;
+ 
+                   case Text (Pos.Index) is
+                      when 'u' =>
+                         for Idx in 1 .. 4 loop
+                            Next_Char;
+                            if Pos.Index > Text'Last
+                              or else (Text (Pos.Index) not in 'a' .. 'f'
+                                         and then
+                                       Text (Pos.Index) not in 'A' .. 'F'
+                                         and then
+                                       Text (Pos.Index) not in '0' .. '9')
+                            then
+                               Error ("invalid unicode escape sequence");
+                            end if;
+                         end loop;
+                      when '\' | '/' | '"' | 'b' | 'f' | 'n' | 'r' | 't' =>
+                         null;
+                      when others =>
+                         Error ("invalid escape sequence");
+                   end case;
+                end if;
+                Next_Char;
+             end loop;
+ 
+             --  No quote found report and error
+ 
+             if Pos.Index > Text'Last then
+                Error ("non terminated string token");
+             end if;
+ 
+             Token_End := Pos;
+ 
+             --  Go to next char and ensure that this is separator. Indeed
+             --  construction such as "string1""string2" are not allowed
+ 
+             Next_Char;
+             if not Is_Token_Sep then
+                Error ("invalid syntax");
+             end if;
+             Kind := J_STRING;
+             return;
+          elsif CC = '-' or else CC in '0' .. '9' then
+             --  We expect a number
+             if CC = '-' then
+                Next_Char;
+             end if;
+ 
+             if Pos.Index > Text'Last then
+                Error ("invalid number");
+             end if;
+ 
+             --  Parse integer part of a number. Superfluous leading zeros are
+             --  not allowed.
+ 
+             if Text (Pos.Index) = '0' then
+                Token_End := Pos;
+                Next_Char;
+             elsif Text (Pos.Index) in '1' .. '9' then
+                Token_End := Pos;
+                Next_Char;
+                while Pos.Index <= Text'Last
+                  and then Text (Pos.Index) in '0' .. '9'
+                loop
+                   Token_End := Pos;
+                   Next_Char;
+                end loop;
+             else
+                Error ("invalid number");
+             end if;
+ 
+             if Is_Token_Sep then
+                --  Valid integer number
+ 
+                Kind := J_INTEGER;
+                return;
+             elsif Text (Pos.Index) /= '.'
+               and then Text (Pos.Index) /= 'e'
+               and then Text (Pos.Index) /= 'E'
+             then
+                Error ("invalid number");
+             end if;
+ 
+             --  Check for a fractional part
+ 
+             if Text (Pos.Index) = '.' then
+                Can_Be_Integer := False;
+                Token_End := Pos;
+                Next_Char;
+                if Pos.Index > Text'Last
+                  or else Text (Pos.Index) not in '0' .. '9'
+                then
+                   Error ("invalid number");
+                end if;
+ 
+                while Pos.Index <= Text'Last
+                  and then Text (Pos.Index) in '0' .. '9'
+                loop
+                   Token_End := Pos;
+                   Next_Char;
+                end loop;
+ 
+             end if;
+ 
+             --  Check for exponent part
+ 
+             if Pos.Index <= Text'Last
+               and then (Text (Pos.Index) = 'e' or else Text (Pos.Index) = 'E')
+             then
+                Token_End := Pos;
+                Next_Char;
+                if Pos.Index > Text'Last then
+                   Error ("invalid number");
+                end if;
+ 
+                if Text (Pos.Index) = '-' then
+                   --  Also a few corner cases can lead to an integer, assume
+                   --  that the number is not an integer.
+ 
+                   Can_Be_Integer := False;
+                end if;
+ 
+                if Text (Pos.Index) = '-' or else Text (Pos.Index) = '+' then
+                   Next_Char;
+                end if;
+ 
+                if Pos.Index > Text'Last
+                  or else Text (Pos.Index) not in '0' .. '9'
+                then
+                   Error ("invalid number");
+                end if;
+ 
+                while Pos.Index <= Text'Last
+                  and then Text (Pos.Index) in '0' .. '9'
+                loop
+                   Token_End := Pos;
+                   Next_Char;
+                end loop;
+             end if;
+ 
+             if Is_Token_Sep then
+                --  Valid decimal number
+ 
+                if Can_Be_Integer then
+                   Kind := J_INTEGER;
+                else
+                   Kind := J_NUMBER;
+                end if;
+                return;
+             else
+                Error ("invalid number");
+             end if;
+          elsif CC = EOF then
+             Kind := J_EOF;
+          else
+             Error ("Unexpected character");
+          end if;
+       end Read_Token;
+ 
+       ----------------------------
+       --  Read_Token_And_Error  --
+       ----------------------------
+ 
+       procedure Read_Token_And_Error
+         (TK          : Token_Kind;
+          Token_Start : out Text_Position;
+          Token_End   : out Text_Position)
+       is
+          Kind : Token_Kind;
+ 
+       begin
+          --  Read a token and errout out if not of the expected kind
+ 
+          Read_Token (Kind, Token_Start, Token_End);
+          if Kind /= TK then
+             Error ("specific token expected");
+          end if;
+       end Read_Token_And_Error;
+ 
+       -------------------------
+       --  Read_Variant_Part  --
+       -------------------------
+ 
+       function Read_Variant_Part return Nat is
+          Next        : Nat := 0;
+          TK          : Token_Kind;
+          Token_Start : Text_Position;
+          Token_End   : Text_Position;
+          Var         : JSON_Variant_Node;
+ 
+       begin
+          --  Read a non-empty array of components
+ 
+          Read_Token_And_Error (J_ARRAY, Token_Start, Token_End);
+ 
+          loop
+             Read_Token_And_Error (J_OBJECT, Token_Start, Token_End);
+ 
+             Var.Variant := 0;
+ 
+             --  Read the members as string : value pairs
+ 
+             loop
+                case Read_String is
+                   when Name_Present =>
+                      Var.Present := Read_Numerical_Expr;
+                   when Name_Record =>
+                      Read_Record;
+                   when Name_Variant =>
+                      Var.Variant := Read_Variant_Part;
+                   when others =>
+                      Error ("invalid variant");
+                end case;
+ 
+                Read_Token (TK, Token_Start, Token_End);
+                if TK = J_OBJECT_END then
+                   exit;
+                elsif TK /= J_COMMA then
+                   Error ("comma expected");
+                end if;
+             end loop;
+ 
+             --  Chain the variant and store it into the table
+ 
+             Var.Next := Next;
+             JSON_Variant_Table.Append (Var);
+             Next := JSON_Variant_Table.Last;
+ 
+             Read_Token (TK, Token_Start, Token_End);
+             if TK = J_ARRAY_END then
+                exit;
+             elsif TK /= J_COMMA then
+                Error ("comma expected");
+             end if;
+          end loop;
+ 
+          return Next;
+       end Read_Variant_Part;
+ 
+       ------------------
+       --  Skip_Value  --
+       ------------------
+ 
+       procedure Skip_Value is
+          Array_Depth  : Natural := 0;
+          Object_Depth : Natural := 0;
+          TK           : Token_Kind;
+          Token_Start  : Text_Position;
+          Token_End    : Text_Position;
+ 
+       begin
+          --  Read a value without recursing
+ 
+          loop
+             Read_Token (TK, Token_Start, Token_End);
+ 
+             case TK is
+                when J_STRING | J_INTEGER | J_NUMBER =>
+                   null;
+                when J_ARRAY =>
+                   Array_Depth := Array_Depth + 1;
+                when J_ARRAY_END =>
+                   Array_Depth := Array_Depth - 1;
+                when J_OBJECT =>
+                   Object_Depth := Object_Depth + 1;
+                when J_OBJECT_END =>
+                   Object_Depth := Object_Depth - 1;
+                when J_COLON | J_COMMA =>
+                   if Array_Depth = 0 and then Object_Depth = 0 then
+                      Error ("value expected");
+                   end if;
+                when others =>
+                   Error ("value expected");
+             end case;
+ 
+             exit when Array_Depth = 0 and then Object_Depth = 0;
+          end loop;
+       end Skip_Value;
+ 
+       Token_Start : Text_Position;
+       Token_End   : Text_Position;
+       TK          : Token_Kind;
+       Is_First    : Boolean := True;
+ 
+    --  Start of processing for Read_JSON_Stream
+ 
+    begin
+       --  Read a possibly empty array of entities
+ 
+       Read_Token_And_Error (J_ARRAY, Token_Start, Token_End);
+ 
+       loop
+          Read_Token (TK, Token_Start, Token_End);
+          if Is_First and then TK = J_ARRAY_END then
+             exit;
+          elsif TK /= J_OBJECT then
+             Error ("object expected");
+          end if;
+ 
+          Read_Entity;
+ 
+          Read_Token (TK, Token_Start, Token_End);
+          if TK = J_ARRAY_END then
+             exit;
+          elsif TK /= J_COMMA then
+             Error ("comma expected");
+          end if;
+ 
+          Is_First := False;
+       end loop;
+    end Read_JSON_Stream;
+ 
+ end Repinfo.Input;
diff -Nrcpad gcc-9.3.0/gcc/ada/repinfo-input.ads gcc-10.1.0/gcc/ada/repinfo-input.ads
*** gcc-9.3.0/gcc/ada/repinfo-input.ads	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/repinfo-input.ads	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,78 ----
+ ------------------------------------------------------------------------------
+ --                                                                          --
+ --                         GNAT COMPILER COMPONENTS                         --
+ --                                                                          --
+ --                         R E P I N F O - I N P U T                        --
+ --                                                                          --
+ --                                 S p e c                                  --
+ --                                                                          --
+ --          Copyright (C) 2018-2019, Free Software Foundation, Inc.         --
+ --                                                                          --
+ -- GNAT is free software;  you can  redistribute it  and/or modify it under --
+ -- terms of the  GNU General Public License as published  by the Free Soft- --
+ -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+ -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+ -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+ -- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
+ --                                                                          --
+ -- As a special exception under Section 7 of GPL version 3, you are granted --
+ -- additional permissions described in the GCC Runtime Library Exception,   --
+ -- version 3.1, as published by the Free Software Foundation.               --
+ --                                                                          --
+ -- You should have received a copy of the GNU General Public License and    --
+ -- a copy of the GCC Runtime Library Exception along with this program;     --
+ -- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
+ -- <http://www.gnu.org/licenses/>.                                          --
+ --                                                                          --
+ -- GNAT was originally developed  by the GNAT team at  New York University. --
+ -- Extensive contributions were provided by Ada Core Technologies Inc.      --
+ --                                                                          --
+ ------------------------------------------------------------------------------
+ 
+ --  This package provides an alternate way of populating the internal tables
+ --  of Repinfo from a JSON input rather than the binary blob of the tree file.
+ --  Note that this is an additive mechanism, i.e. nothing is destroyed in the
+ --  internal state of the unit when it is used.
+ 
+ --  The first step is to feed the unit with a JSON stream of a specified format
+ --  (see the spec of Repinfo for its description) by means of Read_JSON_Stream.
+ --  Then, for each entity whose representation information is present in the
+ --  JSON stream, the appropriate Get_JSON_* routines can be invoked to override
+ --  the eponymous fields of the entity in the tree.
+ 
+ package Repinfo.Input is
+ 
+    function Get_JSON_Esize (Name : String) return Node_Ref_Or_Val;
+    --  Returns the Esize value of the entity specified by Name, which is not
+    --  the component of a record type, or else No_Uint if no representation
+    --  information was supplied for the entity. Name is the full qualified name
+    --  of the entity in lower case letters.
+ 
+    function Get_JSON_RM_Size (Name : String) return Node_Ref_Or_Val;
+    --  Likewise for the RM_Size
+ 
+    function Get_JSON_Component_Size (Name : String) return Node_Ref_Or_Val;
+    --  Likewise for the Component_Size of an array type
+ 
+    function Get_JSON_Component_Bit_Offset
+      (Name        : String;
+       Record_Name : String) return Node_Ref_Or_Val;
+    --  Returns the Component_Bit_Offset of the component specified by Name,
+    --  which is declared in the record type specified by Record_Name, or else
+    --  No_Uint if no representation information was supplied for the component.
+    --  Name is the unqualified name of the component whereas Record_Name is the
+    --  full qualified name of the record type, both in lower case letters.
+ 
+    function Get_JSON_Esize
+      (Name        : String;
+       Record_Name : String) return Node_Ref_Or_Val;
+    --  Likewise for the Esize
+ 
+    Invalid_JSON_Stream : exception;
+    --  Raised if a format error is detected in the JSON stream
+ 
+    procedure Read_JSON_Stream (Text : Text_Buffer; File_Name : String);
+    --  Reads a JSON stream and populates internal tables from it. File_Name is
+    --  only used in error messages issued by the JSON parser.
+ 
+ end Repinfo.Input;
diff -Nrcpad gcc-9.3.0/gcc/ada/repinfo.adb gcc-10.1.0/gcc/ada/repinfo.adb
*** gcc-9.3.0/gcc/ada/repinfo.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/repinfo.adb	Thu May  7 10:49:59 2020
*************** package body Repinfo is
*** 115,124 ****
     --  Identifier casing for current unit. This is set by List_Rep_Info for
     --  each unit, before calling subprograms which may read it.
  
!    Need_Blank_Line : Boolean;
!    --  Set True if a blank line is needed before outputting any information for
!    --  the current entity. Set True when a new entity is processed, and false
!    --  when the blank line is output.
  
     ------------------------------
     -- Set of Relevant Entities --
--- 115,123 ----
     --  Identifier casing for current unit. This is set by List_Rep_Info for
     --  each unit, before calling subprograms which may read it.
  
!    Need_Separator : Boolean;
!    --  Set True if a separator is needed before outputting any information for
!    --  the current entity.
  
     ------------------------------
     -- Set of Relevant Entities --
*************** package body Repinfo is
*** 151,160 ****
     --  is used rather than checking the configuration parameter because we do
     --  not want Repinfo to depend on Targparm (for ASIS)
  
-    procedure Blank_Line;
-    --  Called before outputting anything for an entity. Ensures that
-    --  a blank line precedes the output for a particular entity.
- 
     procedure List_Entities
       (Ent              : Entity_Id;
        Bytes_Big_Endian : Boolean;
--- 150,155 ----
*************** package body Repinfo is
*** 172,177 ****
--- 167,175 ----
     procedure List_Array_Info (Ent : Entity_Id; Bytes_Big_Endian : Boolean);
     --  List representation info for array type Ent
  
+    procedure List_Common_Type_Info (Ent : Entity_Id);
+    --  List common type info (name, size, alignment) for type Ent
+ 
     procedure List_Linker_Section (Ent : Entity_Id);
     --  List linker section for Ent (caller has checked that Ent is an entity
     --  for which the Linker_Section_Pragma field is defined).
*************** package body Repinfo is
*** 179,188 ****
     procedure List_Location (Ent : Entity_Id);
     --  List location information for Ent
  
-    procedure List_Mechanisms (Ent : Entity_Id);
-    --  List mechanism information for parameters of Ent, which is subprogram,
-    --  subprogram type, or an entry or entry family.
- 
     procedure List_Object_Info (Ent : Entity_Id);
     --  List representation info for object Ent
  
--- 177,182 ----
*************** package body Repinfo is
*** 195,200 ****
--- 189,197 ----
     --  List scalar storage order information for record or array type Ent.
     --  Also includes bit order information for record types, if necessary.
  
+    procedure List_Subprogram_Info (Ent : Entity_Id);
+    --  List subprogram info for subprogram Ent
+ 
     procedure List_Type_Info (Ent : Entity_Id);
     --  List type info for type Ent
  
*************** package body Repinfo is
*** 215,220 ****
--- 212,221 ----
     procedure Write_Mechanism (M : Mechanism_Type);
     --  Writes symbolic string for mechanism represented by M
  
+    procedure Write_Separator;
+    --  Called before outputting anything for an entity. Ensures that
+    --  a separator precedes the output for a particular entity.
+ 
     procedure Write_Unknown_Val;
     --  Writes symbolic string for an unknown or non-representable value
  
*************** package body Repinfo is
*** 236,253 ****
        return Rep_Table.Last > 0;
     end Back_End_Layout;
  
-    ----------------
-    -- Blank_Line --
-    ----------------
- 
-    procedure Blank_Line is
-    begin
-       if Need_Blank_Line then
-          Write_Eol;
-          Need_Blank_Line := False;
-       end if;
-    end Blank_Line;
- 
     ------------------------
     -- Create_Discrim_Ref --
     ------------------------
--- 237,242 ----
*************** package body Repinfo is
*** 340,352 ****
  
     procedure List_Array_Info (Ent : Entity_Id; Bytes_Big_Endian : Boolean) is
     begin
!       Blank_Line;
  
        if List_Representation_Info_To_JSON then
           Write_Line ("{");
        end if;
  
!       List_Type_Info (Ent);
  
        if List_Representation_Info_To_JSON then
           Write_Line (",");
--- 329,341 ----
  
     procedure List_Array_Info (Ent : Entity_Id; Bytes_Big_Endian : Boolean) is
     begin
!       Write_Separator;
  
        if List_Representation_Info_To_JSON then
           Write_Line ("{");
        end if;
  
!       List_Common_Type_Info (Ent);
  
        if List_Representation_Info_To_JSON then
           Write_Line (",");
*************** package body Repinfo is
*** 368,375 ****
--- 357,447 ----
           Write_Eol;
           Write_Line ("}");
        end if;
+ 
+       --  The component type is relevant for an array
+ 
+       if List_Representation_Info = 4
+         and then Is_Itype (Component_Type (Base_Type (Ent)))
+       then
+          Relevant_Entities.Set (Component_Type (Base_Type (Ent)), True);
+       end if;
     end List_Array_Info;
  
+    ---------------------------
+    -- List_Common_Type_Info --
+    ---------------------------
+ 
+    procedure List_Common_Type_Info (Ent : Entity_Id) is
+    begin
+       if List_Representation_Info_To_JSON then
+          Write_Str ("  ""name"": """);
+          List_Name (Ent);
+          Write_Line (""",");
+          List_Location (Ent);
+       end if;
+ 
+       --  Do not list size info for unconstrained arrays, not meaningful
+ 
+       if Is_Array_Type (Ent) and then not Is_Constrained (Ent) then
+          null;
+ 
+       else
+          --  If Esize and RM_Size are the same, list as Size. This is a common
+          --  case, which we may as well list in simple form.
+ 
+          if Esize (Ent) = RM_Size (Ent) then
+             if List_Representation_Info_To_JSON then
+                Write_Str ("  ""Size"": ");
+                Write_Val (Esize (Ent));
+                Write_Line (",");
+             else
+                Write_Str ("for ");
+                List_Name (Ent);
+                Write_Str ("'Size use ");
+                Write_Val (Esize (Ent));
+                Write_Line (";");
+             end if;
+ 
+          --  Otherwise list size values separately
+ 
+          else
+             if List_Representation_Info_To_JSON then
+                Write_Str ("  ""Object_Size"": ");
+                Write_Val (Esize (Ent));
+                Write_Line (",");
+ 
+                Write_Str ("  ""Value_Size"": ");
+                Write_Val (RM_Size (Ent));
+                Write_Line (",");
+ 
+             else
+                Write_Str ("for ");
+                List_Name (Ent);
+                Write_Str ("'Object_Size use ");
+                Write_Val (Esize (Ent));
+                Write_Line (";");
+ 
+                Write_Str ("for ");
+                List_Name (Ent);
+                Write_Str ("'Value_Size use ");
+                Write_Val (RM_Size (Ent));
+                Write_Line (";");
+             end if;
+          end if;
+       end if;
+ 
+       if List_Representation_Info_To_JSON then
+          Write_Str ("  ""Alignment"": ");
+          Write_Val (Alignment (Ent));
+       else
+          Write_Str ("for ");
+          List_Name (Ent);
+          Write_Str ("'Alignment use ");
+          Write_Val (Alignment (Ent));
+          Write_Line (";");
+       end if;
+    end List_Common_Type_Info;
+ 
     -------------------
     -- List_Entities --
     -------------------
*************** package body Repinfo is
*** 415,420 ****
--- 487,493 ----
  
        if Present (Ent)
          and then Nkind (Declaration_Node (Ent)) not in N_Renaming_Declaration
+         and then not Is_Ignored_Ghost_Entity (Ent)
        then
           --  If entity is a subprogram and we are listing mechanisms,
           --  then we need to list mechanisms for this entity. We skip this
*************** package body Repinfo is
*** 427,440 ****
                        or else Ekind (Ent) = E_Entry_Family)
             and then not In_Subprogram
           then
!             Need_Blank_Line := True;
!             List_Mechanisms (Ent);
           end if;
  
           E := First_Entity (Ent);
           while Present (E) loop
-             Need_Blank_Line := True;
- 
              --  We list entities that come from source (excluding private or
              --  incomplete types or deferred constants, for which we will list
              --  the information for the full view). If requested, we also list
--- 500,510 ----
                        or else Ekind (Ent) = E_Entry_Family)
             and then not In_Subprogram
           then
!             List_Subprogram_Info (Ent);
           end if;
  
           E := First_Entity (Ent);
           while Present (E) loop
              --  We list entities that come from source (excluding private or
              --  incomplete types or deferred constants, for which we will list
              --  the information for the full view). If requested, we also list
*************** package body Repinfo is
*** 457,478 ****
              then
                 if Is_Subprogram (E) then
                    if List_Representation_Info_Mechanisms then
!                      List_Mechanisms (E);
                    end if;
  
                    --  Recurse into entities local to subprogram
  
                    List_Entities (E, Bytes_Big_Endian, True);
  
-                elsif Is_Formal (E) and then In_Subprogram then
-                   null;
- 
                 elsif Ekind_In (E, E_Entry,
                                    E_Entry_Family,
                                    E_Subprogram_Type)
                 then
                    if List_Representation_Info_Mechanisms then
!                      List_Mechanisms (E);
                    end if;
  
                 elsif Is_Record_Type (E) then
--- 527,545 ----
              then
                 if Is_Subprogram (E) then
                    if List_Representation_Info_Mechanisms then
!                      List_Subprogram_Info (E);
                    end if;
  
                    --  Recurse into entities local to subprogram
  
                    List_Entities (E, Bytes_Big_Endian, True);
  
                 elsif Ekind_In (E, E_Entry,
                                    E_Entry_Family,
                                    E_Subprogram_Type)
                 then
                    if List_Representation_Info_Mechanisms then
!                      List_Subprogram_Info (E);
                    end if;
  
                 elsif Is_Record_Type (E) then
*************** package body Repinfo is
*** 480,519 ****
                       List_Record_Info (E, Bytes_Big_Endian);
                    end if;
  
                 elsif Is_Array_Type (E) then
                    if List_Representation_Info >= 1 then
                       List_Array_Info (E, Bytes_Big_Endian);
                    end if;
  
-                   --  The component type is relevant for an array
- 
-                   if List_Representation_Info = 4
-                     and then Is_Itype (Component_Type (Base_Type (E)))
-                   then
-                      Relevant_Entities.Set
-                        (Component_Type (Base_Type (E)), True);
-                   end if;
- 
                 elsif Is_Type (E) then
                    if List_Representation_Info >= 2 then
-                      Blank_Line;
-                      if List_Representation_Info_To_JSON then
-                         Write_Line ("{");
-                      end if;
                       List_Type_Info (E);
-                      List_Linker_Section (E);
-                      if List_Representation_Info_To_JSON then
-                         Write_Eol;
-                         Write_Line ("}");
-                      end if;
                    end if;
  
!                elsif Ekind_In (E, E_Variable, E_Constant) then
!                   if List_Representation_Info >= 2 then
!                      List_Object_Info (E);
!                   end if;
  
!                elsif Ekind (E) = E_Loop_Parameter or else Is_Formal (E) then
                    if List_Representation_Info >= 2 then
                       List_Object_Info (E);
                    end if;
--- 547,574 ----
                       List_Record_Info (E, Bytes_Big_Endian);
                    end if;
  
+                   --  Recurse into entities local to a record type
+ 
+                   if List_Representation_Info = 4 then
+                      List_Entities (E, Bytes_Big_Endian, False);
+                   end if;
+ 
                 elsif Is_Array_Type (E) then
                    if List_Representation_Info >= 1 then
                       List_Array_Info (E, Bytes_Big_Endian);
                    end if;
  
                 elsif Is_Type (E) then
                    if List_Representation_Info >= 2 then
                       List_Type_Info (E);
                    end if;
  
!                --  Note that formals are not annotated so we skip them here
  
!                elsif Ekind_In (E, E_Constant,
!                                   E_Loop_Parameter,
!                                   E_Variable)
!                then
                    if List_Representation_Info >= 2 then
                       List_Object_Info (E);
                    end if;
*************** package body Repinfo is
*** 530,541 ****
  
                 --  Recurse into bodies
  
!                elsif Ekind_In (E, E_Protected_Type,
!                                   E_Task_Type,
                                    E_Subprogram_Body,
-                                   E_Package_Body,
                                    E_Task_Body,
!                                   E_Protected_Body)
                 then
                    List_Entities (E, Bytes_Big_Endian);
  
--- 585,596 ----
  
                 --  Recurse into bodies
  
!                elsif Ekind_In (E, E_Package_Body,
!                                   E_Protected_Body,
!                                   E_Protected_Type,
                                    E_Subprogram_Body,
                                    E_Task_Body,
!                                   E_Task_Type)
                 then
                    List_Entities (E, Bytes_Big_Endian);
  
*************** package body Repinfo is
*** 842,1034 ****
        Write_Line (""",");
     end List_Location;
  
-    ---------------------
-    -- List_Mechanisms --
-    ---------------------
- 
-    procedure List_Mechanisms (Ent : Entity_Id) is
-       First : Boolean := True;
-       Plen  : Natural;
-       Form  : Entity_Id;
- 
-    begin
-       Blank_Line;
- 
-       if List_Representation_Info_To_JSON then
-          Write_Line ("{");
-          Write_Str ("  ""name"": """);
-          List_Name (Ent);
-          Write_Line (""",");
-          List_Location (Ent);
- 
-          Write_Str ("  ""Convention"": """);
-       else
-          case Ekind (Ent) is
-             when E_Function =>
-                Write_Str ("function ");
- 
-             when E_Operator =>
-                Write_Str ("operator ");
- 
-             when E_Procedure =>
-                Write_Str ("procedure ");
- 
-             when E_Subprogram_Type =>
-                Write_Str ("type ");
- 
-             when E_Entry
-                | E_Entry_Family
-             =>
-                Write_Str ("entry ");
- 
-             when others =>
-                raise Program_Error;
-          end case;
- 
-          List_Name (Ent);
-          Write_Str (" declared at ");
-          Write_Location (Sloc (Ent));
-          Write_Eol;
- 
-          Write_Str ("convention : ");
-       end if;
- 
-       case Convention (Ent) is
-          when Convention_Ada =>
-             Write_Str ("Ada");
- 
-          when Convention_Ada_Pass_By_Copy =>
-             Write_Str ("Ada_Pass_By_Copy");
- 
-          when Convention_Ada_Pass_By_Reference =>
-             Write_Str ("Ada_Pass_By_Reference");
- 
-          when Convention_Intrinsic =>
-             Write_Str ("Intrinsic");
- 
-          when Convention_Entry =>
-             Write_Str ("Entry");
- 
-          when Convention_Protected =>
-             Write_Str ("Protected");
- 
-          when Convention_Assembler =>
-             Write_Str ("Assembler");
- 
-          when Convention_C =>
-             Write_Str ("C");
- 
-          when Convention_COBOL =>
-             Write_Str ("COBOL");
- 
-          when Convention_CPP =>
-             Write_Str ("C++");
- 
-          when Convention_Fortran =>
-             Write_Str ("Fortran");
- 
-          when Convention_Stdcall =>
-             Write_Str ("Stdcall");
- 
-          when Convention_Stubbed =>
-             Write_Str ("Stubbed");
-       end case;
- 
-       if List_Representation_Info_To_JSON then
-          Write_Line (""",");
-          Write_Str ("  ""formal"": [");
-       else
-          Write_Eol;
-       end if;
- 
-       --  Find max length of formal name
- 
-       Plen := 0;
-       Form := First_Formal (Ent);
-       while Present (Form) loop
-          Get_Unqualified_Decoded_Name_String (Chars (Form));
- 
-          if Name_Len > Plen then
-             Plen := Name_Len;
-          end if;
- 
-          Next_Formal (Form);
-       end loop;
- 
-       --  Output formals and mechanisms
- 
-       Form := First_Formal (Ent);
-       while Present (Form) loop
-          Get_Unqualified_Decoded_Name_String (Chars (Form));
-          Set_Casing (Unit_Casing);
- 
-          if List_Representation_Info_To_JSON then
-             if First then
-                Write_Eol;
-                First := False;
-             else
-                Write_Line (",");
-             end if;
- 
-             Write_Line ("    {");
-             Write_Str ("      ""name"": """);
-             Write_Str (Name_Buffer (1 .. Name_Len));
-             Write_Line (""",");
- 
-             Write_Str ("      ""mechanism"": """);
-             Write_Mechanism (Mechanism (Form));
-             Write_Line ("""");
-             Write_Str ("    }");
-          else
-             while Name_Len <= Plen loop
-                Name_Len := Name_Len + 1;
-                Name_Buffer (Name_Len) := ' ';
-             end loop;
- 
-             Write_Str ("   ");
-             Write_Str (Name_Buffer (1 .. Plen + 1));
-             Write_Str (": passed by ");
- 
-             Write_Mechanism (Mechanism (Form));
-             Write_Eol;
-          end if;
- 
-          Next_Formal (Form);
-       end loop;
- 
-       if List_Representation_Info_To_JSON then
-          Write_Eol;
-          Write_Str ("  ]");
-       end if;
- 
-       if Ekind (Ent) = E_Function then
-          if List_Representation_Info_To_JSON then
-             Write_Line (",");
-             Write_Str ("  ""mechanism"": """);
-             Write_Mechanism (Mechanism (Ent));
-             Write_Str ("""");
-          else
-             Write_Str ("returns by ");
-             Write_Mechanism (Mechanism (Ent));
-             Write_Eol;
-          end if;
-       end if;
- 
-       if not Is_Entry (Ent) then
-          List_Linker_Section (Ent);
-       end if;
- 
-       if List_Representation_Info_To_JSON then
-          Write_Eol;
-          Write_Line ("}");
-       end if;
-    end List_Mechanisms;
- 
     ---------------
     -- List_Name --
     ---------------
  
     procedure List_Name (Ent : Entity_Id) is
     begin
        --  List the qualified name recursively, except
        --  at compilation unit level in default mode.
--- 897,909 ----
        Write_Line (""",");
     end List_Location;
  
     ---------------
     -- List_Name --
     ---------------
  
     procedure List_Name (Ent : Entity_Id) is
+       C : Character;
+ 
     begin
        --  List the qualified name recursively, except
        --  at compilation unit level in default mode.
*************** package body Repinfo is
*** 1044,1050 ****
  
        Get_Unqualified_Decoded_Name_String (Chars (Ent));
        Set_Casing (Unit_Casing);
!       Write_Str (Name_Buffer (1 .. Name_Len));
     end List_Name;
  
     ---------------------
--- 919,934 ----
  
        Get_Unqualified_Decoded_Name_String (Chars (Ent));
        Set_Casing (Unit_Casing);
! 
!       --  The name of operators needs to be properly escaped for JSON
! 
!       for J in 1 .. Name_Len loop
!          C := Name_Buffer (J);
!          if C = '"' and then List_Representation_Info_To_JSON then
!             Write_Char ('\');
!          end if;
!          Write_Char (C);
!       end loop;
     end List_Name;
  
     ---------------------
*************** package body Repinfo is
*** 1053,1059 ****
  
     procedure List_Object_Info (Ent : Entity_Id) is
     begin
!       Blank_Line;
  
        if List_Representation_Info_To_JSON then
           Write_Line ("{");
--- 937,943 ----
  
     procedure List_Object_Info (Ent : Entity_Id) is
     begin
!       Write_Separator;
  
        if List_Representation_Info_To_JSON then
           Write_Line ("{");
*************** package body Repinfo is
*** 1089,1094 ****
--- 973,984 ----
  
           List_Linker_Section (Ent);
        end if;
+ 
+       --  The type is relevant for an object
+ 
+       if List_Representation_Info = 4 and then Is_Itype (Etype (Ent)) then
+          Relevant_Entities.Set (Etype (Ent), True);
+       end if;
     end List_Object_Info;
  
     ----------------------
*************** package body Repinfo is
*** 1125,1130 ****
--- 1015,1026 ----
           Indent    : Natural := 0);
        --  Internal recursive procedure to display the structural layout
  
+       Incomplete_Layout : exception;
+       --  Exception raised if the layout is incomplete in -gnatc mode
+ 
+       Not_In_Extended_Main : exception;
+       --  Exception raised when an ancestor is not declared in the main unit
+ 
        Max_Name_Length : Natural := 0;
        Max_Spos_Length : Natural := 0;
  
*************** package body Repinfo is
*** 1259,1265 ****
              if Ekind (Ent) = E_Discriminant then
                 Spaces (Indent);
                 Write_Str ("      ""discriminant"": ");
!                UI_Write (Discriminant_Number (Ent));
                 Write_Line (",");
              end if;
              Spaces (Indent);
--- 1155,1161 ----
              if Ekind (Ent) = E_Discriminant then
                 Spaces (Indent);
                 Write_Str ("      ""discriminant"": ");
!                UI_Write (Discriminant_Number (Ent), Decimal);
                 Write_Line (",");
              end if;
              Spaces (Indent);
*************** package body Repinfo is
*** 1290,1296 ****
              Spaces (Max_Spos_Length - 2);
  
              if Starting_Position /= Uint_0 then
!                UI_Write (Starting_Position);
                 Write_Str (" + ");
              end if;
  
--- 1186,1192 ----
              Spaces (Max_Spos_Length - 2);
  
              if Starting_Position /= Uint_0 then
!                UI_Write (Starting_Position, Decimal);
                 Write_Str (" + ");
              end if;
  
*************** package body Repinfo is
*** 1314,1320 ****
              Sbit := Sbit - SSU;
           end if;
  
!          UI_Write (Sbit);
  
           if List_Representation_Info_To_JSON then
              Write_Line (", ");
--- 1210,1216 ----
              Sbit := Sbit - SSU;
           end if;
  
!          UI_Write (Sbit, Decimal);
  
           if List_Representation_Info_To_JSON then
              Write_Line (", ");
*************** package body Repinfo is
*** 1336,1348 ****
              Lbit := Sbit + Esiz - 1;
  
              if List_Representation_Info_To_JSON then
!                UI_Write (Esiz);
              else
                 if Lbit >= 0 and then Lbit < 10 then
                    Write_Char (' ');
                 end if;
  
!                UI_Write (Lbit);
              end if;
  
           --  The test for Esize (Ent) not Uint_0 here is an annoying special
--- 1232,1244 ----
              Lbit := Sbit + Esiz - 1;
  
              if List_Representation_Info_To_JSON then
!                UI_Write (Esiz, Decimal);
              else
                 if Lbit >= 0 and then Lbit < 10 then
                    Write_Char (' ');
                 end if;
  
!                UI_Write (Lbit, Decimal);
              end if;
  
           --  The test for Esize (Ent) not Uint_0 here is an annoying special
*************** package body Repinfo is
*** 1391,1396 ****
--- 1287,1298 ----
           else
              Write_Line (";");
           end if;
+ 
+          --  The type is relevant for a component
+ 
+          if List_Representation_Info = 4 and then Is_Itype (Etype (Ent)) then
+             Relevant_Entities.Set (Etype (Ent), True);
+          end if;
        end List_Component_Layout;
  
        ------------------------
*************** package body Repinfo is
*** 1564,1577 ****
  
                 Disc        : Entity_Id;
                 Listed_Disc : Entity_Id;
  
              begin
                 --  If this is an extension, first list the layout of the parent
                 --  and then proceed to the extension part, if any.
  
                 if Is_Extension then
!                   List_Structural_Record_Layout
!                     (Base_Type (Parent_Subtype (Ent)), Outer_Ent);
                    First := False;
  
                    if Present (Record_Extension_Part (Definition)) then
--- 1466,1494 ----
  
                 Disc        : Entity_Id;
                 Listed_Disc : Entity_Id;
+                Parent_Type : Entity_Id;
  
              begin
                 --  If this is an extension, first list the layout of the parent
                 --  and then proceed to the extension part, if any.
  
                 if Is_Extension then
!                   Parent_Type := Parent_Subtype (Ent);
!                   if No (Parent_Type) then
!                      raise Incomplete_Layout;
!                   end if;
! 
!                   if Is_Private_Type (Parent_Type) then
!                      Parent_Type := Full_View (Parent_Type);
!                      pragma Assert (Present (Parent_Type));
!                   end if;
! 
!                   Parent_Type := Base_Type (Parent_Type);
!                   if not In_Extended_Main_Source_Unit (Parent_Type) then
!                      raise Not_In_Extended_Main;
!                   end if;
! 
!                   List_Structural_Record_Layout (Parent_Type, Outer_Ent);
                    First := False;
  
                    if Present (Record_Extension_Part (Definition)) then
*************** package body Repinfo is
*** 1714,1726 ****
     --  Start of processing for List_Record_Info
  
     begin
!       Blank_Line;
  
        if List_Representation_Info_To_JSON then
           Write_Line ("{");
        end if;
  
!       List_Type_Info (Ent);
  
        --  First find out max line length and max starting position
        --  length, for the purpose of lining things up nicely.
--- 1631,1643 ----
     --  Start of processing for List_Record_Info
  
     begin
!       Write_Separator;
  
        if List_Representation_Info_To_JSON then
           Write_Line ("{");
        end if;
  
!       List_Common_Type_Info (Ent);
  
        --  First find out max line length and max starting position
        --  length, for the purpose of lining things up nicely.
*************** package body Repinfo is
*** 1733,1740 ****
           Write_Line (",");
           Write_Str ("  ""record"": [");
  
           if Is_Base_Type (Ent) then
!             List_Structural_Record_Layout (Ent, Ent);
           else
              List_Record_Layout (Ent);
           end if;
--- 1650,1672 ----
           Write_Line (",");
           Write_Str ("  ""record"": [");
  
+          --  ??? We can output structural layout only for base types fully
+          --  declared in the extended main source unit for the time being,
+          --  because otherwise declarations might not be processed at all.
+ 
           if Is_Base_Type (Ent) then
!             begin
!                List_Structural_Record_Layout (Ent, Ent);
! 
!             exception
!                when Incomplete_Layout
!                   | Not_In_Extended_Main
!                =>
!                   List_Record_Layout (Ent);
! 
!                when others =>
!                   raise Program_Error;
!             end;
           else
              List_Record_Layout (Ent);
           end if;
*************** package body Repinfo is
*** 1759,1764 ****
--- 1691,1705 ----
           Write_Eol;
           Write_Line ("}");
        end if;
+ 
+       --  The type is relevant for a record subtype
+ 
+       if List_Representation_Info = 4
+         and then not Is_Base_Type (Ent)
+         and then Is_Itype (Etype (Ent))
+       then
+          Relevant_Entities.Set (Etype (Ent), True);
+       end if;
     end List_Record_Info;
  
     -------------------
*************** package body Repinfo is
*** 1772,1777 ****
--- 1713,1727 ----
        if List_Representation_Info /= 0
          or else List_Representation_Info_Mechanisms
        then
+          --  For the normal case, we output a single JSON stream
+ 
+          if not List_Representation_Info_To_File
+            and then List_Representation_Info_To_JSON
+          then
+             Write_Line ("[");
+             Need_Separator := False;
+          end if;
+ 
           for U in Main_Unit .. Last_Unit loop
              if In_Extended_Main_Source_Unit (Cunit_Entity (U)) then
                 Unit_Casing := Identifier_Casing (Source_Index (U));
*************** package body Repinfo is
*** 1795,1800 ****
--- 1745,1751 ----
                       end loop;
  
                       Write_Eol;
+                      Need_Separator := True;
                    end if;
  
                    List_Entities (Cunit_Entity (U), Bytes_Big_Endian);
*************** package body Repinfo is
*** 1805,1816 ****
--- 1756,1780 ----
                    Create_Repinfo_File_Access.all
                      (Get_Name_String (File_Name (Source_Index (U))));
                    Set_Special_Output (Write_Info_Line'Access);
+                   if List_Representation_Info_To_JSON then
+                      Write_Line ("[");
+                   end if;
+                   Need_Separator := False;
                    List_Entities (Cunit_Entity (U), Bytes_Big_Endian);
+                   if List_Representation_Info_To_JSON then
+                      Write_Line ("]");
+                   end if;
                    Cancel_Special_Output;
                    Close_Repinfo_File_Access.all;
                 end if;
              end if;
           end loop;
+ 
+          if not List_Representation_Info_To_File
+            and then List_Representation_Info_To_JSON
+          then
+             Write_Line ("]");
+          end if;
        end if;
     end List_Rep_Info;
  
*************** package body Repinfo is
*** 1864,1879 ****
                     Has_Rep_Item (Ent, Name_Scalar_Storage_Order)
                       or else SSO_Set_Low_By_Default  (Ent)
                       or else SSO_Set_High_By_Default (Ent);
!       --  Scalar_Storage_Order is displayed if specified explicitly
!       --  or set by Default_Scalar_Storage_Order.
  
     --  Start of processing for List_Scalar_Storage_Order
  
     begin
        --  For record types, list Bit_Order if not default, or if SSO is shown
  
        if Is_Record_Type (Ent)
!         and then (List_SSO or else Reverse_Bit_Order (Ent))
        then
           List_Attr ("Bit_Order", Reverse_Bit_Order (Ent));
        end if;
--- 1828,1850 ----
                     Has_Rep_Item (Ent, Name_Scalar_Storage_Order)
                       or else SSO_Set_Low_By_Default  (Ent)
                       or else SSO_Set_High_By_Default (Ent);
!       --  Scalar_Storage_Order is displayed if specified explicitly or set by
!       --  Default_Scalar_Storage_Order.
  
     --  Start of processing for List_Scalar_Storage_Order
  
     begin
        --  For record types, list Bit_Order if not default, or if SSO is shown
  
+       --  Also, when -gnatR4 is in effect always list bit order and scalar
+       --  storage order explicitly, so that you don't need to know the native
+       --  endianness of the target for which the output was produced in order
+       --  to interpret it.
+ 
        if Is_Record_Type (Ent)
!         and then (List_SSO
!                    or else Reverse_Bit_Order (Ent)
!                    or else List_Representation_Info = 4)
        then
           List_Attr ("Bit_Order", Reverse_Bit_Order (Ent));
        end if;
*************** package body Repinfo is
*** 1881,1887 ****
        --  List SSO if required. If not, then storage is supposed to be in
        --  native order.
  
!       if List_SSO then
           List_Attr ("Scalar_Storage_Order", Reverse_Storage_Order (Ent));
        else
           pragma Assert (not Reverse_Storage_Order (Ent));
--- 1852,1858 ----
        --  List SSO if required. If not, then storage is supposed to be in
        --  native order.
  
!       if List_SSO or else List_Representation_Info = 4 then
           List_Attr ("Scalar_Storage_Order", Reverse_Storage_Order (Ent));
        else
           pragma Assert (not Reverse_Storage_Order (Ent));
*************** package body Repinfo is
*** 1889,1967 ****
        end if;
     end List_Scalar_Storage_Order;
  
!    --------------------
!    -- List_Type_Info --
!    --------------------
  
-    procedure List_Type_Info (Ent : Entity_Id) is
     begin
        if List_Representation_Info_To_JSON then
           Write_Str ("  ""name"": """);
           List_Name (Ent);
           Write_Line (""",");
           List_Location (Ent);
        end if;
  
!       --  Do not list size info for unconstrained arrays, not meaningful
  
!       if Is_Array_Type (Ent) and then not Is_Constrained (Ent) then
!          null;
  
        else
!          --  If Esize and RM_Size are the same, list as Size. This is a common
!          --  case, which we may as well list in simple form.
  
!          if Esize (Ent) = RM_Size (Ent) then
!             if List_Representation_Info_To_JSON then
!                Write_Str ("  ""Size"": ");
!                Write_Val (Esize (Ent));
!                Write_Line (",");
              else
!                Write_Str ("for ");
!                List_Name (Ent);
!                Write_Str ("'Size use ");
!                Write_Val (Esize (Ent));
!                Write_Line (";");
              end if;
  
!          --  Otherwise list size values separately
  
           else
!             if List_Representation_Info_To_JSON then
!                Write_Str ("  ""Object_Size"": ");
!                Write_Val (Esize (Ent));
!                Write_Line (",");
  
!                Write_Str ("  ""Value_Size"": ");
!                Write_Val (RM_Size (Ent));
!                Write_Line (",");
  
!             else
!                Write_Str ("for ");
!                List_Name (Ent);
!                Write_Str ("'Object_Size use ");
!                Write_Val (Esize (Ent));
!                Write_Line (";");
  
!                Write_Str ("for ");
!                List_Name (Ent);
!                Write_Str ("'Value_Size use ");
!                Write_Val (RM_Size (Ent));
!                Write_Line (";");
!             end if;
           end if;
        end if;
  
        if List_Representation_Info_To_JSON then
!          Write_Str ("  ""Alignment"": ");
!          Write_Val (Alignment (Ent));
!       else
!          Write_Str ("for ");
!          List_Name (Ent);
!          Write_Str ("'Alignment use ");
!          Write_Val (Alignment (Ent));
!          Write_Line (";");
        end if;
  
        --  Special stuff for fixed-point
  
--- 1860,2060 ----
        end if;
     end List_Scalar_Storage_Order;
  
!    --------------------------
!    -- List_Subprogram_Info --
!    --------------------------
! 
!    procedure List_Subprogram_Info (Ent : Entity_Id) is
!       First : Boolean := True;
!       Plen  : Natural;
!       Form  : Entity_Id;
  
     begin
+       Write_Separator;
+ 
        if List_Representation_Info_To_JSON then
+          Write_Line ("{");
           Write_Str ("  ""name"": """);
           List_Name (Ent);
           Write_Line (""",");
           List_Location (Ent);
+ 
+          Write_Str ("  ""Convention"": """);
+       else
+          case Ekind (Ent) is
+             when E_Function =>
+                Write_Str ("function ");
+ 
+             when E_Operator =>
+                Write_Str ("operator ");
+ 
+             when E_Procedure =>
+                Write_Str ("procedure ");
+ 
+             when E_Subprogram_Type =>
+                Write_Str ("type ");
+ 
+             when E_Entry
+                | E_Entry_Family
+             =>
+                Write_Str ("entry ");
+ 
+             when others =>
+                raise Program_Error;
+          end case;
+ 
+          List_Name (Ent);
+          Write_Str (" declared at ");
+          Write_Location (Sloc (Ent));
+          Write_Eol;
+ 
+          Write_Str ("convention : ");
        end if;
  
!       case Convention (Ent) is
!          when Convention_Ada =>
!             Write_Str ("Ada");
  
!          when Convention_Ada_Pass_By_Copy =>
!             Write_Str ("Ada_Pass_By_Copy");
! 
!          when Convention_Ada_Pass_By_Reference =>
!             Write_Str ("Ada_Pass_By_Reference");
! 
!          when Convention_Intrinsic =>
!             Write_Str ("Intrinsic");
! 
!          when Convention_Entry =>
!             Write_Str ("Entry");
! 
!          when Convention_Protected =>
!             Write_Str ("Protected");
! 
!          when Convention_Assembler =>
!             Write_Str ("Assembler");
! 
!          when Convention_C =>
!             Write_Str ("C");
! 
!          when Convention_COBOL =>
!             Write_Str ("COBOL");
! 
!          when Convention_CPP =>
!             Write_Str ("C++");
! 
!          when Convention_Fortran =>
!             Write_Str ("Fortran");
! 
!          when Convention_Stdcall =>
!             Write_Str ("Stdcall");
! 
!          when Convention_Stubbed =>
!             Write_Str ("Stubbed");
!       end case;
  
+       if List_Representation_Info_To_JSON then
+          Write_Line (""",");
+          Write_Str ("  ""formal"": [");
        else
!          Write_Eol;
!       end if;
  
!       --  Find max length of formal name
! 
!       Plen := 0;
!       Form := First_Formal (Ent);
!       while Present (Form) loop
!          Get_Unqualified_Decoded_Name_String (Chars (Form));
! 
!          if Name_Len > Plen then
!             Plen := Name_Len;
!          end if;
! 
!          Next_Formal (Form);
!       end loop;
! 
!       --  Output formals and mechanisms
! 
!       Form := First_Formal (Ent);
!       while Present (Form) loop
!          Get_Unqualified_Decoded_Name_String (Chars (Form));
!          Set_Casing (Unit_Casing);
! 
!          if List_Representation_Info_To_JSON then
!             if First then
!                Write_Eol;
!                First := False;
              else
!                Write_Line (",");
              end if;
  
!             Write_Line ("    {");
!             Write_Str ("      ""name"": """);
!             Write_Str (Name_Buffer (1 .. Name_Len));
!             Write_Line (""",");
  
+             Write_Str ("      ""mechanism"": """);
+             Write_Mechanism (Mechanism (Form));
+             Write_Line ("""");
+             Write_Str ("    }");
           else
!             while Name_Len <= Plen loop
!                Name_Len := Name_Len + 1;
!                Name_Buffer (Name_Len) := ' ';
!             end loop;
  
!             Write_Str ("   ");
!             Write_Str (Name_Buffer (1 .. Plen + 1));
!             Write_Str (": passed by ");
  
!             Write_Mechanism (Mechanism (Form));
!             Write_Eol;
!          end if;
  
!          Next_Formal (Form);
!       end loop;
! 
!       if List_Representation_Info_To_JSON then
!          Write_Eol;
!          Write_Str ("  ]");
!       end if;
! 
!       if Ekind (Ent) = E_Function then
!          if List_Representation_Info_To_JSON then
!             Write_Line (",");
!             Write_Str ("  ""mechanism"": """);
!             Write_Mechanism (Mechanism (Ent));
!             Write_Str ("""");
!          else
!             Write_Str ("returns by ");
!             Write_Mechanism (Mechanism (Ent));
!             Write_Eol;
           end if;
        end if;
  
+       if not Is_Entry (Ent) then
+          List_Linker_Section (Ent);
+       end if;
+ 
        if List_Representation_Info_To_JSON then
!          Write_Eol;
!          Write_Line ("}");
        end if;
+    end List_Subprogram_Info;
+ 
+    --------------------
+    -- List_Type_Info --
+    --------------------
+ 
+    procedure List_Type_Info (Ent : Entity_Id) is
+    begin
+       Write_Separator;
+ 
+       if List_Representation_Info_To_JSON then
+          Write_Line ("{");
+       end if;
+ 
+       List_Common_Type_Info (Ent);
  
        --  Special stuff for fixed-point
  
*************** package body Repinfo is
*** 2010,2015 ****
--- 2103,2115 ----
              end if;
           end;
        end if;
+ 
+       List_Linker_Section (Ent);
+ 
+       if List_Representation_Info_To_JSON then
+          Write_Eol;
+          Write_Line ("}");
+       end if;
     end List_Type_Info;
  
     ----------------------
*************** package body Repinfo is
*** 2284,2289 ****
--- 2384,2406 ----
        end case;
     end Write_Mechanism;
  
+    ---------------------
+    -- Write_Separator --
+    ---------------------
+ 
+    procedure Write_Separator is
+    begin
+       if Need_Separator then
+          if List_Representation_Info_To_JSON then
+             Write_Line (",");
+          else
+             Write_Eol;
+          end if;
+       else
+          Need_Separator := True;
+       end if;
+    end Write_Separator;
+ 
     -----------------------
     -- Write_Unknown_Val --
     -----------------------
*************** package body Repinfo is
*** 2324,2330 ****
           end if;
  
        else
!          UI_Write (Val);
        end if;
     end Write_Val;
  
--- 2441,2447 ----
           end if;
  
        else
!          UI_Write (Val, Decimal);
        end if;
     end Write_Val;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/repinfo.ads gcc-10.1.0/gcc/ada/repinfo.ads
*** gcc-9.3.0/gcc/ada/repinfo.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/repinfo.ads	Thu May  7 10:49:59 2020
***************
*** 35,40 ****
--- 35,43 ----
  --  compiler and in ASIS (it is used in ASIS as part of the implementation
  --  of the Data Decomposition Annex).
  
+ --  WARNING: There is a C version of this package. Any changes to this
+ --  source file must be properly reflected in the C header file repinfo.h
+ 
  with Types; use Types;
  with Uintp; use Uintp;
  
*************** package Repinfo is
*** 193,199 ****
     --  following description, the terminology is that of the JSON syntax
     --  from the ECMA document and of the JSON grammar from www.json.org.
  
!    --  The output is a concatenation of entities
  
     --  An entity is an object whose members are pairs taken from:
  
--- 196,202 ----
     --  following description, the terminology is that of the JSON syntax
     --  from the ECMA document and of the JSON grammar from www.json.org.
  
!    --  The output is an array of entities
  
     --  An entity is an object whose members are pairs taken from:
  
diff -Nrcpad gcc-9.3.0/gcc/ada/repinfo.h gcc-10.1.0/gcc/ada/repinfo.h
*** gcc-9.3.0/gcc/ada/repinfo.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/repinfo.h	Thu May  7 10:49:59 2020
***************
*** 29,35 ****
   *                                                                          *
   ****************************************************************************/
  
! /* This file corresponds to the Ada file repinfo.ads.  */
  
  #ifdef __cplusplus
  extern "C" {
--- 29,37 ----
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header that corresponds to the Ada package specification for
!    Repinfo.  It was created manually from repinfo.ads and must be kept
!    synchronized with changes in this file.  */
  
  #ifdef __cplusplus
  extern "C" {
diff -Nrcpad gcc-9.3.0/gcc/ada/restrict.ads gcc-10.1.0/gcc/ada/restrict.ads
*** gcc-9.3.0/gcc/ada/restrict.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/restrict.ads	Thu May  7 10:49:59 2020
*************** package Restrict is
*** 307,312 ****
--- 307,314 ----
     --  elaboration routine. If elaboration code is not allowed, an error
     --  message is posted on the node given as argument.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     procedure Check_SPARK_05_Restriction
       (Msg   : String;
        N     : Node_Id;
*************** package Restrict is
*** 337,355 ****
     --  that generates a trampoline. If not allowed, an error message is posted
     --  on the node given as argument.
  
     procedure Check_No_Implicit_Heap_Alloc (N : Node_Id);
     --  Equivalent to Check_Restriction (No_Implicit_Heap_Allocations, N).
     --  Provided for easy use by back end, which has to check this restriction.
  
!    procedure Check_No_Implicit_Task_Alloc (N : Node_Id);
!    --  Equivalent to Check_Restriction (No_Implicit_Task_Allocations, N).
!    --  Provided for easy use by back end, which has to check this restriction.
  
     procedure Check_No_Implicit_Protected_Alloc (N : Node_Id);
     --  Equivalent to:
     --    Check_Restriction (No_Implicit_Protected_Object_Allocations, N)
     --  Provided for easy use by back end, which has to check this restriction.
  
     procedure Check_Obsolescent_2005_Entity (E : Entity_Id; N : Node_Id);
     --  This routine checks if the entity E is one of the obsolescent entries
     --  in Ada.Characters.Handling in Ada 2005 and No_Obsolescent_Features
--- 339,365 ----
     --  that generates a trampoline. If not allowed, an error message is posted
     --  on the node given as argument.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     procedure Check_No_Implicit_Heap_Alloc (N : Node_Id);
     --  Equivalent to Check_Restriction (No_Implicit_Heap_Allocations, N).
     --  Provided for easy use by back end, which has to check this restriction.
  
!    --  WARNING: There is a matching C declaration of this subprogram in fe.h
  
     procedure Check_No_Implicit_Protected_Alloc (N : Node_Id);
     --  Equivalent to:
     --    Check_Restriction (No_Implicit_Protected_Object_Allocations, N)
     --  Provided for easy use by back end, which has to check this restriction.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
+    procedure Check_No_Implicit_Task_Alloc (N : Node_Id);
+    --  Equivalent to Check_Restriction (No_Implicit_Task_Allocations, N).
+    --  Provided for easy use by back end, which has to check this restriction.
+ 
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     procedure Check_Obsolescent_2005_Entity (E : Entity_Id; N : Node_Id);
     --  This routine checks if the entity E is one of the obsolescent entries
     --  in Ada.Characters.Handling in Ada 2005 and No_Obsolescent_Features
*************** package Restrict is
*** 394,399 ****
--- 404,411 ----
     --  set. In the latter case, the source may contain handlers but they either
     --  get converted using the local goto transformation or deleted.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function No_Exception_Propagation_Active return Boolean;
     --  Test to see if current restrictions settings specify that no
     --  exception propagation is activated.
diff -Nrcpad gcc-9.3.0/gcc/ada/rtinit.c gcc-10.1.0/gcc/ada/rtinit.c
*** gcc-9.3.0/gcc/ada/rtinit.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/rtinit.c	Thu May  7 10:49:59 2020
***************
*** 41,48 ****
  #endif
  
  #ifdef IN_RTS
- #include "tconfig.h"
- #include "tsystem.h"
  /* We don't have libiberty, so use malloc.  */
  #define xmalloc(S) malloc (S)
  #define xrealloc(V,S) realloc (V,S)
--- 41,46 ----
*************** extern "C" {
*** 62,68 ****
  /* __gnat_runtime_initialize (NT-mingw32 Version) */
  /**************************************************/
  
! extern void __gnat_install_handler(void);
  
  int __gnat_wide_text_translation_required = 0;
  /* wide text translation, 0=none, 1=activated */
--- 60,66 ----
  /* __gnat_runtime_initialize (NT-mingw32 Version) */
  /**************************************************/
  
! extern void __gnat_install_handler (void);
  
  int __gnat_wide_text_translation_required = 0;
  /* wide text translation, 0=none, 1=activated */
*************** extern HANDLE ProcListEvt;
*** 89,94 ****
--- 87,275 ----
  int __gnat_do_argv_expansion = 1;
  #pragma weak __gnat_do_argv_expansion
  
+ /* Assuming we are pointing to the beginning of a quoted part of an
+ argument, skip until the end of the quoted part.  */
+ static void skip_quoted_string (const WCHAR **current_in,
+ 				WCHAR **current_out)
+ {
+   /* Number of backslashes buffered.  */
+   int qbs_count = 0;
+ 
+   /* Pointer to current input character.  */
+   const WCHAR *ci = *current_in;
+ 
+   /* Pointer to next output character.  */
+   WCHAR *co = *current_out;
+ 
+   /* Skip initial quote.  */
+   ci++;
+ 
+   while (*ci)
+     {
+       if (*ci == '\\')
+ 	{
+ 	  /* Buffer incoming backslashes.  */
+ 	  qbs_count++;
+ 	}
+       else if (*ci == '"')
+ 	{
+ 	  /* Append qbs_count / 2 backslahes.  */
+ 	  for (int i=0; i<qbs_count / 2; i++)
+ 	    {
+ 	      *co = '\\';
+ 	      co++;
+ 	    }
+ 	  if ((qbs_count & 1) == 0)
+ 	    {
+ 	      /* 2n backslashes means that the quotation mark is the end of
+ 	         the quoted portion.  */
+ 	      qbs_count = 0;
+ 	      break;
+ 	    }
+ 	  else
+ 	    {
+ 	      /* Otherwise this is a double quote literal.  */
+ 	      qbs_count = 0;
+ 	      *co = '"'; co++;
+ 	    }
+ 	}
+       else
+ 	{
+ 	  /* If the character is not a double quote we should append
+ 	     qbs_count backslashes.  */
+ 	  for (int i=0; i<qbs_count; i++)
+ 	    {
+ 	      *co = '\\';
+ 	      co++;
+ 	    }
+ 	  *co = *ci; co++;
+ 	  qbs_count = 0;
+ 	}
+       ci++;
+     }
+   *current_in = ci;
+   *current_out = co;
+ }
+ 
+ /* Assuming that this is the beginning of an argument. Skip characters
+    until we reach the character right after the last argument character.  */
+ static void skip_argument (const WCHAR **current_in,
+ 			   WCHAR **current_out)
+ {
+   /* Number of backslashes buffered.  */
+   int bs_count = 0;
+ 
+   /* Pointer to current input character.  */
+   const WCHAR *ci = *current_in;
+ 
+   /* Pointer to next output character.  */
+   WCHAR *co = *current_out;
+ 
+   while (*ci && ! (*ci == ' ' || *ci == '\t'))
+     {
+       if (*ci == '\\')
+ 	{
+ 	  /* Buffer incoming backslashes.  */
+ 	  bs_count++;
+ 	}
+       else if (*ci == '"')
+ 	{
+ 	  /* Append qbs_count / 2 backslahes.  */
+ 	  for (int i=0; i< bs_count / 2; i++)
+ 	    {
+ 	      *co = '\\'; co++;
+ 	    }
+ 	  if ((bs_count & 1) == 0)
+ 	    {
+ 	      /* 2n backslashes followed by a quotation mark means that
+ 		 this is a start of a quoted string.  */
+ 	      skip_quoted_string (&ci, &co);
+ 	    }
+ 	  else
+ 	    {
+ 	      /* Otherwise this is quotation mark literal.  */
+ 	      *co = '"';
+ 	      co++;
+ 	    }
+ 	  bs_count = 0;
+ 	}
+       else
+ 	{
+ 	  /* This is a regular character. */
+ 	  /* Backslashes are interpreted literally.  */
+ 	  for (int i=0; i<bs_count; i++)
+ 	    {
+ 	      *co = '\\';
+ 	      co++;
+ 	    }
+ 	  bs_count = 0;
+ 	  *co = *ci; co++;
+ 	}
+       ci++;
+     }
+ 
+   for (int i=0; i<bs_count; i++)
+     {
+       *co = '\\';
+       co++;
+     }
+ 
+   /* End the argument with a null character. */
+   *co = '\0';
+   co++;
+ 
+   *current_in = ci;
+   *current_out = co;
+ }
+ 
+ 
+ void __gnat_get_argw (const WCHAR *command_line, WCHAR ***argv, int *argc)
+ {
+   WCHAR *inline_argv;
+   WCHAR *co;
+   int arg_count = 1;
+   const WCHAR *ci;
+ 
+   inline_argv =
+     (WCHAR *) xmalloc ((wcslen (command_line) + 1) * sizeof (WCHAR));
+   co = inline_argv;
+ 
+   /* Start iteration on command line characters. */
+   ci = command_line;
+ 
+   /* Skip command name. Note that if the command line starts with whitechars
+      then the command name will be the empty string. */
+   skip_argument (&ci, &co);
+ 
+   /* Count remaining arguments. */
+   while (*ci)
+     {
+       /* skip whitechar */
+       while (*ci && (*ci == ' ' || *ci == '\t')) { ci++; }
+       if (*ci)
+ 	{
+ 	  skip_argument (&ci, &co);
+ 	  arg_count++;
+ 	}
+       else
+ 	break;
+     }
+ 
+   /* Allocate table with pointer to each arguments */
+   argv[0] = (WCHAR **) xmalloc (arg_count * sizeof (WCHAR *));
+ 
+   for (int idx = 0; idx < arg_count; idx++)
+     {
+       argv[0][idx] = inline_argv;
+       while (*inline_argv)
+ 	{
+ 	  inline_argv++;
+ 	}
+       inline_argv++;
+      }
+   *argc = arg_count;
+ }
+ 
  static void
  append_arg (int *index, LPWSTR dir, LPWSTR value,
  	    char ***argv, int *last, int quoted)
*************** append_arg (int *index, LPWSTR dir, LPWS
*** 102,115 ****
      {
        /* no dir prefix */
        dirlen = 0;
!       fullvalue = (LPWSTR) xmalloc ((vallen + 1) * sizeof(TCHAR));
      }
    else
      {
        /* Add dir first */
        dirlen = _tcslen (dir);
  
!       fullvalue = (LPWSTR) xmalloc ((dirlen + vallen + 1) * sizeof(TCHAR));
        _tcscpy (fullvalue, dir);
      }
  
--- 283,296 ----
      {
        /* no dir prefix */
        dirlen = 0;
!       fullvalue = (LPWSTR) xmalloc ((vallen + 1) * sizeof (TCHAR));
      }
    else
      {
        /* Add dir first */
        dirlen = _tcslen (dir);
  
!       fullvalue = (LPWSTR) xmalloc ((dirlen + vallen + 1) * sizeof (TCHAR));
        _tcscpy (fullvalue, dir);
      }
  
*************** append_arg (int *index, LPWSTR dir, LPWS
*** 118,124 ****
    if (quoted)
      {
        _tcsncpy (fullvalue + dirlen, value + 1, vallen - 1);
!       fullvalue [dirlen + vallen - sizeof(TCHAR)] = _T('\0');
      }
    else
      _tcscpy (fullvalue + dirlen, value);
--- 299,305 ----
    if (quoted)
      {
        _tcsncpy (fullvalue + dirlen, value + 1, vallen - 1);
!       fullvalue [dirlen + vallen - sizeof (TCHAR)] = _T ('\0');
      }
    else
      _tcscpy (fullvalue + dirlen, value);
*************** append_arg (int *index, LPWSTR dir, LPWS
*** 130,136 ****
      }
  
    size = WS2SC (NULL, fullvalue, 0);
!   (*argv)[*index] = (char *) xmalloc (size + sizeof(TCHAR));
    WS2SC ((*argv)[*index], fullvalue, size);
  
    free (fullvalue);
--- 311,317 ----
      }
  
    size = WS2SC (NULL, fullvalue, 0);
!   (*argv)[*index] = (char *) xmalloc (size + sizeof (TCHAR));
    WS2SC ((*argv)[*index], fullvalue, size);
  
    free (fullvalue);
*************** append_arg (int *index, LPWSTR dir, LPWS
*** 140,146 ****
  #endif
  
  void
! __gnat_runtime_initialize(int install_handler)
  {
    /*  increment the reference counter */
  
--- 321,327 ----
  #endif
  
  void
! __gnat_runtime_initialize (int install_handler)
  {
    /*  increment the reference counter */
  
*************** __gnat_runtime_initialize(int install_ha
*** 223,229 ****
       TCHAR result [MAX_PATH];
       int quoted;
  
!      wargv = CommandLineToArgvW (GetCommandLineW(), &wargc);
  
       if (wargv != NULL)
         {
--- 404,410 ----
       TCHAR result [MAX_PATH];
       int quoted;
  
!      __gnat_get_argw (GetCommandLineW (), &wargv, &wargc);
  
       if (wargv != NULL)
         {
*************** __gnat_runtime_initialize(int install_ha
*** 297,303 ****
  	       }
  	   }
  
! 	 LocalFree (wargv);
  	 gnat_argc = argc_expanded;
  	 gnat_argv = (char **) xrealloc
  	   (gnat_argv, argc_expanded * sizeof (char *));
--- 478,485 ----
  	       }
  	   }
  
! 	 free (wargv[0]);
! 	 free (wargv);
  	 gnat_argc = argc_expanded;
  	 gnat_argv = (char **) xrealloc
  	   (gnat_argv, argc_expanded * sizeof (char *));
diff -Nrcpad gcc-9.3.0/gcc/ada/rtsfind.adb gcc-10.1.0/gcc/ada/rtsfind.adb
*** gcc-9.3.0/gcc/ada/rtsfind.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/rtsfind.adb	Thu May  7 10:49:59 2020
*************** package body Rtsfind is
*** 949,970 ****
        Install_Ghost_Region (None, Empty);
        Install_SPARK_Mode   (None, Empty);
  
!       --  Note if secondary stack is used
! 
!       if U_Id = System_Secondary_Stack then
!          Opt.Sec_Stack_Used := True;
!       end if;
! 
!       --  Otherwise we need to load the unit, First build unit name
!       --  from the enumeration literal name in type RTU_Id.
  
        U.Uname                := Get_Unit_Name (U_Id);
        U.First_Implicit_With  := Empty;
  
!       --  Now do the load call, note that setting Error_Node to Empty is
!       --  a signal to Load_Unit that we will regard a failure to find the
!       --  file as a fatal error, and that it should not output any kind
!       --  of diagnostics, since we will take care of it here.
  
        --  We save style checking switches and turn off style checking for
        --  loading the unit, since we don't want any style checking.
--- 949,964 ----
        Install_Ghost_Region (None, Empty);
        Install_SPARK_Mode   (None, Empty);
  
!       --  Otherwise we need to load the unit, First build unit name from the
!       --  enumeration literal name in type RTU_Id.
  
        U.Uname                := Get_Unit_Name (U_Id);
        U.First_Implicit_With  := Empty;
  
!       --  Now do the load call, note that setting Error_Node to Empty is a
!       --  signal to Load_Unit that we will regard a failure to find the file as
!       --  a fatal error, and that it should not output any kind of diagnostics,
!       --  since we will take care of it here.
  
        --  We save style checking switches and turn off style checking for
        --  loading the unit, since we don't want any style checking.
*************** package body Rtsfind is
*** 1245,1265 ****
     ---------
  
     function RTE (E : RE_Id) return Entity_Id is
-       U_Id : constant RTU_Id := RE_Unit_Table (E);
-       U    : RT_Unit_Table_Record renames RT_Unit_Table (U_Id);
- 
-       Lib_Unit : Node_Id;
-       Pkg_Ent  : Entity_Id;
-       Ename    : Name_Id;
- 
-       --  The following flag is used to disable front-end inlining when RTE
-       --  is invoked. This prevents the analysis of other runtime bodies when
-       --  a particular spec is loaded through Rtsfind. This is both efficient,
-       --  and it prevents spurious visibility conflicts between use-visible
-       --  user entities, and entities in run-time packages.
- 
-       Save_Front_End_Inlining : Boolean;
- 
        procedure Check_RPC;
        --  Reject programs that make use of distribution features not supported
        --  on the current target. Also check that the PCS is compatible with the
--- 1239,1244 ----
*************** package body Rtsfind is
*** 1351,1356 ****
--- 1330,1351 ----
           return Ent;
        end Find_Local_Entity;
  
+       --  Local variables
+ 
+       U_Id : constant RTU_Id := RE_Unit_Table (E);
+       U    : RT_Unit_Table_Record renames RT_Unit_Table (U_Id);
+ 
+       Ename    : Name_Id;
+       Lib_Unit : Node_Id;
+       Pkg_Ent  : Entity_Id;
+ 
+       Save_Front_End_Inlining : constant Boolean := Front_End_Inlining;
+       --  This flag is used to disable front-end inlining when RTE is invoked.
+       --  This prevents the analysis of other runtime bodies when a particular
+       --  spec is loaded through Rtsfind. This is both efficient, and prevents
+       --  spurious visibility conflicts between use-visible user entities, and
+       --  entities in run-time packages.
+ 
     --  Start of processing for RTE
  
     begin
*************** package body Rtsfind is
*** 1372,1378 ****
           return Check_CRT (E, Find_Local_Entity (E));
        end if;
  
-       Save_Front_End_Inlining := Front_End_Inlining;
        Front_End_Inlining := False;
  
        --  Load unit if unit not previously loaded
--- 1367,1372 ----
*************** package body Rtsfind is
*** 1435,1443 ****
        end if;
  
     <<Found>>
-       Maybe_Add_With (U);
  
        Front_End_Inlining := Save_Front_End_Inlining;
        return Check_CRT (E, RE_Table (E));
     end RTE;
  
--- 1429,1447 ----
        end if;
  
     <<Found>>
  
+       --  Record whether the secondary stack is in use in order to generate
+       --  the proper binder code. No action is taken when the secondary stack
+       --  is pulled within an ignored Ghost context because all this code will
+       --  disappear.
+ 
+       if U_Id = System_Secondary_Stack and then Ghost_Mode /= Ignore then
+          Sec_Stack_Used := True;
+       end if;
+ 
+       Maybe_Add_With (U);
        Front_End_Inlining := Save_Front_End_Inlining;
+ 
        return Check_CRT (E, RE_Table (E));
     end RTE;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/rtsfind.ads gcc-10.1.0/gcc/ada/rtsfind.ads
*** gcc-9.3.0/gcc/ada/rtsfind.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/rtsfind.ads	Thu May  7 10:49:59 2020
*************** package Rtsfind is
*** 36,94 ****
     -- Runtime Unit Table --
     ------------------------
  
!    --  The following type includes an enumeration entry for each runtime unit.
!    --  The enumeration literal represents the fully qualified name of the unit,
!    --  as follows:
! 
!    --    Names of the form Ada_xxx are first level children of Ada, whose name
!    --    is Ada.xxx. For example, the name Ada_Tags refers to package Ada.Tags.
! 
!    --    Names of the form Ada_Calendar_xxx are second level children of
!    --    Ada.Calendar. This is part of a temporary implementation of delays;
!    --    eventually, packages implementing delays will be found relative to
!    --    the package that declares the time type.
! 
!    --    Names of the form Ada_Interrupts_xxx are second level children of
!    --    Ada.Interrupts. This is needed for Ada.Interrupts.Names which is used
!    --    by pragma Interrupt_State.
! 
!    --    Names of the form Ada_Real_Time_xxx are second level children of
!    --    Ada.Real_Time.
! 
!    --    Names of the form Ada_Streams_xxx are second level children
!    --    of Ada.Streams.
! 
!    --    Names of the form Ada_Strings_xxx are second level children
!    --    of Ada.Strings.
! 
!    --    Names of the form Ada_Text_IO_xxx are second level children of
!    --    Ada.Text_IO.
! 
!    --    Names of the form Ada_Wide_Text_IO_xxx are second level children of
!    --    Ada.Wide_Text_IO.
! 
!    --    Names of the form Ada_Wide_Wide_Text_IO_xxx are second level children
!    --    of Ada.Wide_Wide_Text_IO.
! 
!    --    Names of the form Interfaces_xxx are first level children of
!    --    Interfaces. For example, the name Interfaces_Packed_Decimal refers to
!    --    package Interfaces.Packed_Decimal.
! 
!    --    Names of the form System_xxx are first level children of System, whose
!    --    name is System.xxx. For example, the name System_Str_Concat refers to
!    --    package System.Str_Concat.
! 
!    --    Names of the form System_Storage_Pools_xxx are second level children
!    --    of the package System.Storage_Pools.
! 
!    --    Names of the form System_Strings_xxx are second level children of the
!    --    package System.Strings.
! 
!    --    Names of the form System_Tasking_xxx are second level children of the
!    --    package System.Tasking. For example, System_Tasking_Stages refers to
!    --    the package System.Tasking.Stages.
! 
!    --    Other names stand for themselves (e.g. System for package System)
  
     --  This list can contain both subprogram and package unit names. For
     --  packages, the accessible entities in the package are separately listed
--- 36,45 ----
     -- Runtime Unit Table --
     ------------------------
  
!    --  The following type includes an enumeration literal for each runtime
!    --  unit. The enumeration literal is the full expanded name of the unit
!    --  with "." replaced by "_". For example, the enumeration literal for
!    --  Ada.Interrupts.Names is Ada_Interrupts_Names
  
     --  This list can contain both subprogram and package unit names. For
     --  packages, the accessible entities in the package are separately listed
*************** package Rtsfind is
*** 100,112 ****
     --  seem worthwhile, since the implementation controls the set of units that
     --  are referenced, and this restriction is easily met.
  
!    --  IMPORTANT NOTE: the specs of packages and procedures with'ed using this
!    --  mechanism may not contain use clauses. This is because these subprograms
!    --  are compiled in the current visibility environment, and it would be too
!    --  much trouble to establish a clean environment for the compilation. The
!    --  presence of extraneous visible stuff has no effect on the compilation
!    --  except in the presence of use clauses (which might result in unexpected
!    --  ambiguities).
  
     type RTU_Id is (
  
--- 51,63 ----
     --  seem worthwhile, since the implementation controls the set of units that
     --  are referenced, and this restriction is easily met.
  
!    --  IMPORTANT NOTE: the specs of packages and procedures with'ed using
!    --  this mechanism must not contain use clauses. This is because these
!    --  subprograms are compiled in the current visibility environment, and it
!    --  would be too much trouble to establish a clean environment for the
!    --  compilation. The presence of extraneous visible stuff has no effect on
!    --  the compilation except in the presence of use clauses, which might
!    --  result in unexpected ambiguities.
  
     type RTU_Id is (
  
*************** package Rtsfind is
*** 220,225 ****
--- 171,177 ----
        System_Atomic_Primitives,
        System_Aux_DEC,
        System_Bignums,
+       System_Bitfields,
        System_Bit_Ops,
        System_Boolean_Array_Operations,
        System_Byte_Swapping,
*************** package Rtsfind is
*** 809,814 ****
--- 761,768 ----
       RE_To_Bignum,                       -- System.Bignums
       RE_From_Bignum,                     -- System.Bignums
  
+      RE_Copy_Bitfield,                   -- System.Bitfields
+ 
       RE_Bit_And,                         -- System.Bit_Ops
       RE_Bit_Eq,                          -- System.Bit_Ops
       RE_Bit_Not,                         -- System.Bit_Ops
*************** package Rtsfind is
*** 2051,2056 ****
--- 2005,2012 ----
       RE_To_Bignum                        => System_Bignums,
       RE_From_Bignum                      => System_Bignums,
  
+      RE_Copy_Bitfield                    => System_Bitfields,
+ 
       RE_Bit_And                          => System_Bit_Ops,
       RE_Bit_Eq                           => System_Bit_Ops,
       RE_Bit_Not                          => System_Bit_Ops,
*************** package Rtsfind is
*** 2755,2777 ****
       RE_W_WC                             => System_Stream_Attributes,
       RE_W_WWC                            => System_Stream_Attributes,
  
!      RE_Storage_Array_Input              =>  System_Strings_Stream_Ops,
!      RE_Storage_Array_Input_Blk_IO       =>  System_Strings_Stream_Ops,
!      RE_Storage_Array_Output             =>  System_Strings_Stream_Ops,
!      RE_Storage_Array_Output_Blk_IO      =>  System_Strings_Stream_Ops,
!      RE_Storage_Array_Read               =>  System_Strings_Stream_Ops,
!      RE_Storage_Array_Read_Blk_IO        =>  System_Strings_Stream_Ops,
!      RE_Storage_Array_Write              =>  System_Strings_Stream_Ops,
!      RE_Storage_Array_Write_Blk_IO       =>  System_Strings_Stream_Ops,
  
!      RE_Stream_Element_Array_Input          =>  System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Input_Blk_IO   =>  System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Output         =>  System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Output_Blk_IO  =>  System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Read           =>  System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Read_Blk_IO    =>  System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Write          =>  System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Write_Blk_IO   =>  System_Strings_Stream_Ops,
  
       RE_String_Input                     => System_Strings_Stream_Ops,
       RE_String_Input_Blk_IO              => System_Strings_Stream_Ops,
--- 2711,2733 ----
       RE_W_WC                             => System_Stream_Attributes,
       RE_W_WWC                            => System_Stream_Attributes,
  
!      RE_Storage_Array_Input              => System_Strings_Stream_Ops,
!      RE_Storage_Array_Input_Blk_IO       => System_Strings_Stream_Ops,
!      RE_Storage_Array_Output             => System_Strings_Stream_Ops,
!      RE_Storage_Array_Output_Blk_IO      => System_Strings_Stream_Ops,
!      RE_Storage_Array_Read               => System_Strings_Stream_Ops,
!      RE_Storage_Array_Read_Blk_IO        => System_Strings_Stream_Ops,
!      RE_Storage_Array_Write              => System_Strings_Stream_Ops,
!      RE_Storage_Array_Write_Blk_IO       => System_Strings_Stream_Ops,
  
!      RE_Stream_Element_Array_Input          => System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Input_Blk_IO   => System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Output         => System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Output_Blk_IO  => System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Read           => System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Read_Blk_IO    => System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Write          => System_Strings_Stream_Ops,
!      RE_Stream_Element_Array_Write_Blk_IO   => System_Strings_Stream_Ops,
  
       RE_String_Input                     => System_Strings_Stream_Ops,
       RE_String_Input_Blk_IO              => System_Strings_Stream_Ops,
*************** package Rtsfind is
*** 3155,3161 ****
     --  immediately, since obviously Ent cannot be the entity in question if the
     --  corresponding unit has not been loaded.
  
!    function Is_RTU (Ent : Entity_Id;  U : RTU_Id) return Boolean;
     pragma Inline (Is_RTU);
     --  This function determines if the given entity corresponds to the entity
     --  for the unit referenced by U. If this unit has not been loaded, the
--- 3111,3117 ----
     --  immediately, since obviously Ent cannot be the entity in question if the
     --  corresponding unit has not been loaded.
  
!    function Is_RTU (Ent : Entity_Id; U : RTU_Id) return Boolean;
     pragma Inline (Is_RTU);
     --  This function determines if the given entity corresponds to the entity
     --  for the unit referenced by U. If this unit has not been loaded, the
*************** package Rtsfind is
*** 3198,3203 ****
--- 3154,3176 ----
     --  Returns true if a call to RTE will succeed without raising an exception
     --  and without generating an error message, i.e. if the call will obtain
     --  the desired entity without any problems.
+    --
+    --  If we call this and it returns True, we should generate a call to E.
+    --  In other words, the compiler should not call RTE_Available (E) until
+    --  it has decided it wants to generate a call to E. Otherwise we can get
+    --  spurious dependencies and elaboration orders.
+    --
+    --     if RTE_Available (E) -- WRONG!
+    --       and then <some condition>
+    --     then
+    --        generate call to E;
+    --
+    --  Should be:
+    --
+    --     if <some condition>
+    --       and then RTE_Available (E) -- Correct
+    --     then
+    --        generate call to E;
  
     function RTE_Record_Component (E : RE_Id) return Entity_Id;
     --  Given the entity defined in the above tables, as identified by the
diff -Nrcpad gcc-9.3.0/gcc/ada/runtime.h gcc-10.1.0/gcc/ada/runtime.h
*** gcc-9.3.0/gcc/ada/runtime.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/runtime.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,44 ----
+ /****************************************************************************
+  *                                                                          *
+  *                         GNAT COMPILER COMPONENTS                         *
+  *                                                                          *
+  *                                 RUNTIME                                  *
+  *                                                                          *
+  *                              C Header File                               *
+  *                                                                          *
+  *          Copyright (C) 2019, Free Software Foundation, Inc.              *
+  *                                                                          *
+  * GNAT is free software;  you can  redistribute it  and/or modify it under *
+  * terms of the  GNU General Public License as published  by the Free Soft- *
+  * ware  Foundation;  either version 3,  or (at your option) any later ver- *
+  * sion.  GNAT is distributed in the hope that it will be useful, but WITH- *
+  * OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY *
+  * or FITNESS FOR A PARTICULAR PURPOSE.                                     *
+  *                                                                          *
+  * As a special exception under Section 7 of GPL version 3, you are granted *
+  * additional permissions described in the GCC Runtime Library Exception,   *
+  * version 3.1, as published by the Free Software Foundation.               *
+  *                                                                          *
+  * You should have received a copy of the GNU General Public License and    *
+  * a copy of the GCC Runtime Library Exception along with this program;     *
+  * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    *
+  * <http://www.gnu.org/licenses/>.                                          *
+  *                                                                          *
+  * GNAT was originally developed  by the GNAT team at  New York University. *
+  * Extensive contributions were provided by Ada Core Technologies Inc.      *
+  *                                                                          *
+  ****************************************************************************/
+ 
+ /* This file provides common definitions used by GNAT C runtime files.  */
+ 
+ #ifdef __vxworks
+ #include "vxWorks.h"
+ #endif /* __vxworks */
+ 
+ #ifndef ATTRIBUTE_UNUSED
+ #define ATTRIBUTE_UNUSED __attribute__((unused))
+ #endif
+ 
+ #ifndef ATTRIBUTE_NORETURN
+ #define ATTRIBUTE_NORETURN __attribute__((noreturn))
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/ada/s-oscons-tmplt.c gcc-10.1.0/gcc/ada/s-oscons-tmplt.c
*** gcc-9.3.0/gcc/ada/s-oscons-tmplt.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/s-oscons-tmplt.c	Thu May  7 10:49:59 2020
*************** main (void) {
*** 261,266 ****
--- 261,274 ----
  TXT("--  This is the version for " TARGET)
  TXT("")
  TXT("with Interfaces.C;")
+ #if defined (__MINGW32__) || defined (__CYGWIN__)
+ # define TARGET_OS "Windows"
+ # define Serial_Port_Descriptor "System.Win32.HANDLE"
+ TXT("with System.Win32;")
+ #else
+ # define TARGET_OS "Other_OS"
+ # define Serial_Port_Descriptor "Interfaces.C.int"
+ #endif
  
  /*
  package System.OS_Constants is
*************** package System.OS_Constants is
*** 280,290 ****
  
     type OS_Type is (Windows, Other_OS);
  */
- #if defined (__MINGW32__)
- # define TARGET_OS "Windows"
- #else
- # define TARGET_OS "Other_OS"
- #endif
  C("Target_OS", OS_Type, TARGET_OS, "")
  /*
     pragma Warnings (Off, Target_OS);
--- 288,293 ----
*************** CST(Target_Name, "")
*** 303,308 ****
--- 306,313 ----
  #define SIZEOF_unsigned_int sizeof (unsigned int)
  CND(SIZEOF_unsigned_int, "Size of unsigned int")
  
+ SUB(Serial_Port_Descriptor)
+ 
  /*
  
     -------------------
*************** CND(FNDELAY, "Nonblocking")
*** 405,414 ****
  
  #if defined (__FreeBSD__) || defined (__DragonFly__)
  # define CNI CNU
! # define IOCTL_Req_T "unsigned"
  #else
  # define CNI CND
! # define IOCTL_Req_T "int"
  #endif
  
  SUB(IOCTL_Req_T)
--- 410,419 ----
  
  #if defined (__FreeBSD__) || defined (__DragonFly__)
  # define CNI CNU
! # define IOCTL_Req_T "Interfaces.C.unsigned"
  #else
  # define CNI CND
! # define IOCTL_Req_T "Interfaces.C.int"
  #endif
  
  SUB(IOCTL_Req_T)
*************** CND(AF_INET, "IPv4 address family")
*** 1048,1053 ****
--- 1053,1063 ----
  #endif
  CND(AF_INET6, "IPv6 address family")
  
+ #ifndef AF_UNIX
+ # define AF_UNIX -1
+ #endif
+ CND(AF_UNIX, "Local unix family")
+ 
  #ifndef AF_UNSPEC
  # define AF_UNSPEC -1
  #else
*************** CND(IPPROTO_UDP, "UDP")
*** 1287,1292 ****
--- 1297,1407 ----
  #endif
  CND(IPPROTO_TCP, "TCP")
  
+ #ifndef IPPROTO_ICMP
+ # define IPPROTO_ICMP -1
+ #endif
+ CND(IPPROTO_ICMP, "Internet Control Message Protocol")
+ 
+ #ifndef IPPROTO_IGMP
+ # define IPPROTO_IGMP -1
+ #endif
+ CND(IPPROTO_IGMP, "Internet Group Management Protocol")
+ 
+ #ifndef IPPROTO_IPIP
+ # define IPPROTO_IPIP -1
+ #endif
+ CND(IPPROTO_IPIP, "IPIP tunnels (older KA9Q tunnels use 94)")
+ 
+ #ifndef IPPROTO_EGP
+ # define IPPROTO_EGP -1
+ #endif
+ CND(IPPROTO_EGP, "Exterior Gateway Protocol")
+ 
+ #ifndef IPPROTO_PUP
+ # define IPPROTO_PUP -1
+ #endif
+ CND(IPPROTO_PUP, "PUP protocol")
+ 
+ #ifndef IPPROTO_IDP
+ # define IPPROTO_IDP -1
+ #endif
+ CND(IPPROTO_IDP, "XNS IDP protocol")
+ 
+ #ifndef IPPROTO_TP
+ # define IPPROTO_TP -1
+ #endif
+ CND(IPPROTO_TP, "SO Transport Protocol Class 4")
+ 
+ #ifndef IPPROTO_DCCP
+ # define IPPROTO_DCCP -1
+ #endif
+ CND(IPPROTO_DCCP, "Datagram Congestion Control Protocol")
+ 
+ #ifndef IPPROTO_RSVP
+ # define IPPROTO_RSVP -1
+ #endif
+ CND(IPPROTO_RSVP, "Reservation Protocol")
+ 
+ #ifndef IPPROTO_GRE
+ # define IPPROTO_GRE -1
+ #endif
+ CND(IPPROTO_GRE, "General Routing Encapsulation")
+ 
+ #ifndef IPPROTO_ESP
+ # define IPPROTO_ESP -1
+ #endif
+ CND(IPPROTO_ESP, "encapsulating security payload")
+ 
+ #ifndef IPPROTO_AH
+ # define IPPROTO_AH -1
+ #endif
+ CND(IPPROTO_AH, "authentication header")
+ 
+ #ifndef IPPROTO_MTP
+ # define IPPROTO_MTP -1
+ #endif
+ CND(IPPROTO_MTP, "Multicast Transport Protocol")
+ 
+ #ifndef IPPROTO_BEETPH
+ # define IPPROTO_BEETPH -1
+ #endif
+ CND(IPPROTO_BEETPH, "IP option pseudo header for BEET")
+ 
+ #ifndef IPPROTO_ENCAP
+ # define IPPROTO_ENCAP -1
+ #endif
+ CND(IPPROTO_ENCAP, "Encapsulation Header")
+ 
+ #ifndef IPPROTO_PIM
+ # define IPPROTO_PIM -1
+ #endif
+ CND(IPPROTO_PIM, "Protocol Independent Multicast")
+ 
+ #ifndef IPPROTO_COMP
+ # define IPPROTO_COMP -1
+ #endif
+ CND(IPPROTO_COMP, "Compression Header Protocol")
+ 
+ #ifndef IPPROTO_SCTP
+ # define IPPROTO_SCTP -1
+ #endif
+ CND(IPPROTO_SCTP, "Stream Control Transmission Protocol")
+ 
+ #ifndef IPPROTO_UDPLITE
+ # define IPPROTO_UDPLITE -1
+ #endif
+ CND(IPPROTO_UDPLITE, "UDP-Lite protocol")
+ 
+ #ifndef IPPROTO_MPLS
+ # define IPPROTO_MPLS -1
+ #endif
+ CND(IPPROTO_MPLS, "MPLS in IP")
+ 
+ #ifndef IPPROTO_RAW
+ # define IPPROTO_RAW -1
+ #endif
+ CND(IPPROTO_RAW, "Raw IP packets")
+ 
  /*
  
     -------------------
*************** CND(SIZEOF_sockaddr_in, "struct sockaddr
*** 1591,1596 ****
--- 1706,1724 ----
  #endif
  CND(SIZEOF_sockaddr_in6, "struct sockaddr_in6")
  
+ /**
+  ** The sockaddr_un structure is not defined in MINGW C headers
+  ** but Windows supports it from build 17063.
+  **/
+ #if defined(__MINGW32__)
+ struct sockaddr_un {
+   ADDRESS_FAMILY sun_family;    /* AF_UNIX */
+   char           sun_path[108]; /* Pathname */
+ };
+ #endif
+ #define SIZEOF_sockaddr_un (sizeof (struct sockaddr_un))
+ CND(SIZEOF_sockaddr_un, "struct sockaddr_un")
+ 
  #define SIZEOF_fd_set (sizeof (fd_set))
  CND(SIZEOF_fd_set, "fd_set")
  CND(FD_SETSIZE, "Max fd value")
*************** CND(IF_NAMESIZE, "Max size of interface
*** 1628,1636 ****
  */
  
  #if defined (__sun__) || defined (__hpux__)
! # define Msg_Iovlen_T "int"
  #else
! # define Msg_Iovlen_T "size_t"
  #endif
  
  SUB(Msg_Iovlen_T)
--- 1756,1764 ----
  */
  
  #if defined (__sun__) || defined (__hpux__)
! # define Msg_Iovlen_T "Interfaces.C.int"
  #else
! # define Msg_Iovlen_T "Interfaces.C.size_t"
  #endif
  
  SUB(Msg_Iovlen_T)
diff -Nrcpad gcc-9.3.0/gcc/ada/scans.ads gcc-10.1.0/gcc/ada/scans.ads
*** gcc-9.3.0/gcc/ada/scans.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/scans.ads	Thu May  7 10:49:59 2020
*************** package Scans is
*** 87,97 ****
--- 87,101 ----
        --  exception-name". This degrades error recovery slightly, and perhaps
        --  we could do better, but not worth the effort.
  
+       --  Ada2020 introduces square brackets as delimiters for array and
+       --  container aggregates.
+ 
        Tok_Raise,           -- RAISE
  
        Tok_Dot,             -- .            Namext
        Tok_Apostrophe,      -- '            Namext
  
+       Tok_Left_Bracket,    -- [            Namest
        Tok_Left_Paren,      -- (            Namext, Consk
  
        Tok_Delta,           -- DELTA        Atkwd, Sterm, Consk
*************** package Scans is
*** 99,104 ****
--- 103,109 ----
        Tok_Range,           -- RANGE        Atkwd, Sterm, Consk
  
        Tok_Right_Paren,     -- )            Sterm
+       Tok_Right_Bracket,   -- ]            Sterm
        Tok_Comma,           -- ,            Sterm
  
        Tok_And,             -- AND          Logop, Sterm
diff -Nrcpad gcc-9.3.0/gcc/ada/scil_ll.adb gcc-10.1.0/gcc/ada/scil_ll.adb
*** gcc-9.3.0/gcc/ada/scil_ll.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/scil_ll.adb	Thu May  7 10:49:59 2020
*************** package body SCIL_LL is
*** 49,73 ****
     -- Internal Hash Tables --
     --------------------------
  
-    package Contract_Only_Body_Flag is new Simple_HTable
-      (Header_Num => Header_Num,
-       Element    => Boolean,
-       No_Element => False,
-       Key        => Node_Id,
-       Hash       => Hash,
-       Equal      => "=");
-    --  This table records the value of flag Is_Contract_Only_Flag of tree nodes
- 
-    package Contract_Only_Body_Nodes is new Simple_HTable
-      (Header_Num => Header_Num,
-       Element    => Node_Id,
-       No_Element => Empty,
-       Key        => Node_Id,
-       Hash       => Hash,
-       Equal      => "=");
-    --  This table records the value of attribute Contract_Only_Body of tree
-    --  nodes.
- 
     package SCIL_Nodes is new Simple_HTable
       (Header_Num => Header_Num,
        Element    => Node_Id,
--- 49,54 ----
*************** package body SCIL_LL is
*** 86,106 ****
        Set_SCIL_Node (Target, Get_SCIL_Node (Source));
     end Copy_SCIL_Node;
  
-    ----------------------------
-    -- Get_Contract_Only_Body --
-    ----------------------------
- 
-    function Get_Contract_Only_Body (N : Node_Id) return Node_Id is
-    begin
-       if CodePeer_Mode
-         and then Present (N)
-       then
-          return Contract_Only_Body_Nodes.Get (N);
-       else
-          return Empty;
-       end if;
-    end Get_Contract_Only_Body;
- 
     -------------------
     -- Get_SCIL_Node --
     -------------------
--- 67,72 ----
*************** package body SCIL_LL is
*** 132,173 ****
     procedure Initialize is
     begin
        SCIL_Nodes.Reset;
-       Contract_Only_Body_Nodes.Reset;
-       Contract_Only_Body_Flag.Reset;
        Set_Reporting_Proc (Copy_SCIL_Node'Access);
     end Initialize;
  
-    ---------------------------
-    -- Is_Contract_Only_Body --
-    ---------------------------
- 
-    function Is_Contract_Only_Body (E : Entity_Id) return Boolean is
-    begin
-       return Contract_Only_Body_Flag.Get (E);
-    end Is_Contract_Only_Body;
- 
-    ----------------------------
-    -- Set_Contract_Only_Body --
-    ----------------------------
- 
-    procedure Set_Contract_Only_Body (N : Node_Id; Value : Node_Id) is
-    begin
-       pragma Assert (CodePeer_Mode
-         and then Present (N)
-         and then Is_Contract_Only_Body (Value));
- 
-       Contract_Only_Body_Nodes.Set (N, Value);
-    end Set_Contract_Only_Body;
- 
-    -------------------------------
-    -- Set_Is_Contract_Only_Body --
-    -------------------------------
- 
-    procedure Set_Is_Contract_Only_Body (E : Entity_Id) is
-    begin
-       Contract_Only_Body_Flag.Set (E, True);
-    end Set_Is_Contract_Only_Body;
- 
     -------------------
     -- Set_SCIL_Node --
     -------------------
--- 98,106 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/scil_ll.ads gcc-10.1.0/gcc/ada/scil_ll.ads
*** gcc-9.3.0/gcc/ada/scil_ll.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/scil_ll.ads	Thu May  7 10:49:59 2020
***************
*** 30,60 ****
  ------------------------------------------------------------------------------
  
  --  This package extends the tree nodes with fields that are used to reference
! --  the SCIL node and the Contract_Only_Body of a subprogram with aspects.
  
  with Types; use Types;
  
  package SCIL_LL is
  
-    function Get_Contract_Only_Body (N : Node_Id) return Node_Id;
-    --  Read the value of attribute Contract_Only_Body
- 
     function Get_SCIL_Node (N : Node_Id) return Node_Id;
     --  Read the value of attribute SCIL node
  
-    procedure Set_Contract_Only_Body (N : Node_Id; Value : Node_Id);
-    --  Set the value of attribute Contract_Only_Body
- 
     procedure Set_SCIL_Node (N : Node_Id; Value : Node_Id);
     --  Set the value of attribute SCIL node
  
     procedure Initialize;
     --  Initialize the table of SCIL nodes
  
-    function Is_Contract_Only_Body (E : Entity_Id) return Boolean;
-    --  Return True if E is a Contract_Only_Body subprogram
- 
-    procedure Set_Is_Contract_Only_Body (E : Entity_Id);
-    --  Set E as Contract_Only_Body subprogram
- 
  end SCIL_LL;
--- 30,48 ----
  ------------------------------------------------------------------------------
  
  --  This package extends the tree nodes with fields that are used to reference
! --  the SCIL node.
  
  with Types; use Types;
  
  package SCIL_LL is
  
     function Get_SCIL_Node (N : Node_Id) return Node_Id;
     --  Read the value of attribute SCIL node
  
     procedure Set_SCIL_Node (N : Node_Id; Value : Node_Id);
     --  Set the value of attribute SCIL node
  
     procedure Initialize;
     --  Initialize the table of SCIL nodes
  
  end SCIL_LL;
diff -Nrcpad gcc-9.3.0/gcc/ada/scng.adb gcc-10.1.0/gcc/ada/scng.adb
*** gcc-9.3.0/gcc/ada/scng.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/scng.adb	Thu May  7 10:49:59 2020
*************** package body Scng is
*** 182,187 ****
--- 182,188 ----
              | Tok_Integer_Literal
              | Tok_Interface
              | Tok_Is
+             | Tok_Left_Bracket
              | Tok_Left_Paren
              | Tok_Less
              | Tok_Less_Equal
*************** package body Scng is
*** 204,209 ****
--- 205,211 ----
              | Tok_Rem
              | Tok_Renames
              | Tok_Reverse
+             | Tok_Right_Bracket
              | Tok_Right_Paren
              | Tok_Slash
              | Tok_String_Literal
*************** package body Scng is
*** 324,329 ****
--- 326,332 ----
              | Tok_In
              | Tok_Integer_Literal
              | Tok_Is
+             | Tok_Left_Bracket
              | Tok_Left_Paren
              | Tok_Less
              | Tok_Less_Equal
*************** package body Scng is
*** 340,345 ****
--- 343,349 ----
              | Tok_Range
              | Tok_Real_Literal
              | Tok_Rem
+             | Tok_Right_Bracket
              | Tok_Right_Paren
              | Tok_Slash
              | Tok_String_Literal
*************** package body Scng is
*** 1697,1702 ****
--- 1701,1711 ----
              if Source (Scan_Ptr + 1) = '"' then
                 goto Scan_Wide_Character;
  
+             elsif Ada_Version = Ada_2020 then
+                Scan_Ptr := Scan_Ptr + 1;
+                Token := Tok_Left_Bracket;
+                return;
+ 
              else
                 Error_Msg_S ("illegal character, replaced by ""(""");
                 Scan_Ptr := Scan_Ptr + 1;
*************** package body Scng is
*** 2063,2068 ****
--- 2072,2078 ----
                or else Prev_Token = Tok_Identifier
                or else Prev_Token = Tok_Project
                or else Prev_Token = Tok_Right_Paren
+               or else Prev_Token = Tok_Right_Bracket
                or else Prev_Token in Token_Class_Literal
              then
                 Token := Tok_Apostrophe;
*************** package body Scng is
*** 2172,2182 ****
              return;
  
           --  Right bracket or right brace, treated as right paren
  
           when ']' | '}' =>
!             Error_Msg_S ("illegal character, replaced by "")""");
              Scan_Ptr := Scan_Ptr + 1;
-             Token := Tok_Right_Paren;
              return;
  
           --  Slash (can be division operator or first character of not equal)
--- 2182,2199 ----
              return;
  
           --  Right bracket or right brace, treated as right paren
+          --  but proper aggregate delimiter in Ada_2020
  
           when ']' | '}' =>
!             if Ada_Version >= Ada_2020 then
!                Token := Tok_Right_Bracket;
! 
!             else
!                Error_Msg_S ("illegal character, replaced by "")""");
!                Token := Tok_Right_Paren;
!             end if;
! 
              Scan_Ptr := Scan_Ptr + 1;
              return;
  
           --  Slash (can be division operator or first character of not equal)
diff -Nrcpad gcc-9.3.0/gcc/ada/scos.ads gcc-10.1.0/gcc/ada/scos.ads
*** gcc-9.3.0/gcc/ada/scos.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/scos.ads	Thu May  7 10:49:59 2020
***************
*** 28,33 ****
--- 28,36 ----
  --  the ALI file, and by Get_SCO/Put_SCO to read and write the text form that
  --  is used in the ALI file.
  
+ --  WARNING: There is a C version of this package. Any changes to this
+ --  source file must be properly reflected in the C header file scos.h
+ 
  with Namet; use Namet;
  with Table;
  with Types; use Types;
*************** package SCOs is
*** 48,56 ****
     --  Put_SCO reads the internal tables and generates text lines in the ALI
     --  format.
  
-    --  WARNING: There are C bindings for this package. Any changes to this
-    --  source file must be properly reflected in the C header file scos.h
- 
     --------------------
     -- SCO ALI Format --
     --------------------
--- 51,56 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/scos.h gcc-10.1.0/gcc/ada/scos.h
*** gcc-9.3.0/gcc/ada/scos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/scos.h	Thu May  7 10:49:59 2020
***************
*** 23,30 ****
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C file that corresponds to the Ada package spec SCOs.  It was
!    created manually from the file scos.ads.  */
  
  #ifdef __cplusplus
  extern "C" {
--- 23,31 ----
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header that corresponds to the Ada package specification for
!    Scos.  It was created manually from scos.ads and must be kept synchronized
!    with changes in this file.  */
  
  #ifdef __cplusplus
  extern "C" {
diff -Nrcpad gcc-9.3.0/gcc/ada/seh_init.c gcc-10.1.0/gcc/ada/seh_init.c
*** gcc-9.3.0/gcc/ada/seh_init.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/seh_init.c	Thu May  7 10:49:59 2020
***************
*** 39,46 ****
  #endif
  
  #ifdef IN_RTS
! #include "tconfig.h"
! #include "tsystem.h"
  
  /* We don't have libiberty, so use malloc.  */
  #define xmalloc(S) malloc (S)
--- 39,46 ----
  #endif
  
  #ifdef IN_RTS
! 
! #include "runtime.h"
  
  /* We don't have libiberty, so use malloc.  */
  #define xmalloc(S) malloc (S)
diff -Nrcpad gcc-9.3.0/gcc/ada/sem.adb gcc-10.1.0/gcc/ada/sem.adb
*** gcc-9.3.0/gcc/ada/sem.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem.adb	Thu May  7 10:49:59 2020
*************** package body Sem is
*** 1360,1366 ****
           --  unconditionally, and has no restore mechanism, because it is
           --  intended as a lowest-level Pure package.
  
!          Saved_ML : constant Int := Style_Max_Line_Length;
  
           List : Elist_Id;
  
--- 1360,1367 ----
           --  unconditionally, and has no restore mechanism, because it is
           --  intended as a lowest-level Pure package.
  
!          Saved_ML  : constant Int     := Style_Max_Line_Length;
!          Saved_CML : constant Boolean := Style_Check_Max_Line_Length;
  
           List : Elist_Id;
  
*************** package body Sem is
*** 1395,1400 ****
--- 1396,1402 ----
           Restore_Scope_Stack  (List);
           Restore_Ghost_Region (Saved_GM, Saved_IGR);
           Style_Max_Line_Length := Saved_ML;
+          Style_Check_Max_Line_Length := Saved_CML;
        end Do_Analyze;
  
        --  Local variables
*************** package body Sem is
*** 1579,1585 ****
             and then Nkind (Unit (Comp_Unit)) in N_Proper_Body
             and then (Nkind (Unit (Comp_Unit)) /= N_Subprogram_Body
                         or else not Acts_As_Spec (Comp_Unit))
!            and then not In_Extended_Main_Source_Unit (Comp_Unit)
           then
              null;
  
--- 1581,1587 ----
             and then Nkind (Unit (Comp_Unit)) in N_Proper_Body
             and then (Nkind (Unit (Comp_Unit)) /= N_Subprogram_Body
                         or else not Acts_As_Spec (Comp_Unit))
!            and then not Ext_Main_Source_Unit
           then
              null;
  
*************** package body Sem is
*** 1728,1743 ****
           MCU : constant Node_Id := Unit (Main_CU);
  
        begin
-          CL := First (Context_Items (CU));
- 
           --  Problem does not arise with main subprograms
  
!          if
!            not Nkind_In (MCU, N_Package_Body, N_Package_Declaration)
!          then
              return False;
           end if;
  
           while Present (CL) loop
              if Nkind (CL) = N_With_Clause
                and then Library_Unit (CL) = Main_CU
--- 1730,1743 ----
           MCU : constant Node_Id := Unit (Main_CU);
  
        begin
           --  Problem does not arise with main subprograms
  
!          if not Nkind_In (MCU, N_Package_Body, N_Package_Declaration) then
              return False;
           end if;
  
+          CL := First (Context_Items (CU));
+ 
           while Present (CL) loop
              if Nkind (CL) = N_With_Clause
                and then Library_Unit (CL) = Main_CU
diff -Nrcpad gcc-9.3.0/gcc/ada/sem.ads gcc-10.1.0/gcc/ada/sem.ads
*** gcc-9.3.0/gcc/ada/sem.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem.ads	Thu May  7 10:49:59 2020
*************** package Sem is
*** 275,281 ****
     --  flag is False to disable any code expansion (see package Expander). Only
     --  the generic processing can modify the status of this flag, any other
     --  client should regard it as read-only.
-    --  Probably should be called Inside_A_Generic_Template ???
  
     Inside_Freezing_Actions : Nat := 0;
     --  Flag indicating whether we are within a call to Expand_N_Freeze_Actions.
--- 275,280 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_aggr.adb gcc-10.1.0/gcc/ada/sem_aggr.adb
*** gcc-9.3.0/gcc/ada/sem_aggr.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_aggr.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Aggr is
*** 602,607 ****
--- 602,608 ----
        Set_Etype                  (Itype, Base_Type             (Typ));
        Set_Has_Alignment_Clause   (Itype, Has_Alignment_Clause  (Typ));
        Set_Is_Aliased             (Itype, Is_Aliased            (Typ));
+       Set_Is_Independent         (Itype, Is_Independent        (Typ));
        Set_Depends_On_Private     (Itype, Depends_On_Private    (Typ));
  
        Copy_Suppress_Status (Index_Check,  Typ, Itype);
*************** package body Sem_Aggr is
*** 614,623 ****
        if Has_Predicates (Typ) then
           Set_Has_Predicates (Itype);
  
           if Present (Predicate_Function (Typ)) then
              Set_Predicate_Function (Itype, Predicate_Function (Typ));
!          else
              Set_Predicated_Parent (Itype, Predicated_Parent (Typ));
           end if;
        end if;
  
--- 615,631 ----
        if Has_Predicates (Typ) then
           Set_Has_Predicates (Itype);
  
+          --  If the base type has a predicate, capture the predicated parent
+          --  or the existing predicate function for SPARK use.
+ 
           if Present (Predicate_Function (Typ)) then
              Set_Predicate_Function (Itype, Predicate_Function (Typ));
! 
!          elsif Is_Itype (Typ) then
              Set_Predicated_Parent (Itype, Predicated_Parent (Typ));
+ 
+          else
+             Set_Predicated_Parent (Itype, Typ);
           end if;
        end if;
  
*************** package body Sem_Aggr is
*** 886,892 ****
  
     procedure Resolve_Aggregate (N : Node_Id; Typ : Entity_Id) is
        Loc   : constant Source_Ptr := Sloc (N);
-       Pkind : constant Node_Kind  := Nkind (Parent (N));
  
        Aggr_Subtyp : Entity_Id;
        --  The actual aggregate subtype. This is not necessarily the same as Typ
--- 894,899 ----
*************** package body Sem_Aggr is
*** 904,910 ****
  
        --  If the aggregate has box-initialized components, its type must be
        --  frozen so that initialization procedures can properly be called
!       --  in the resolution that follows.  The replacement of boxes with
        --  initialization calls is properly an expansion activity but it must
        --  be done during resolution.
  
--- 911,917 ----
  
        --  If the aggregate has box-initialized components, its type must be
        --  frozen so that initialization procedures can properly be called
!       --  in the resolution that follows. The replacement of boxes with
        --  initialization calls is properly an expansion activity but it must
        --  be done during resolution.
  
*************** package body Sem_Aggr is
*** 1071,1086 ****
              --  permit it, or the aggregate type is unconstrained, an OTHERS
              --  choice is not allowed (except that it is always allowed on the
              --  right-hand side of an assignment statement; in this case the
!             --  constrainedness of the type doesn't matter).
  
              --  If expansion is disabled (generic context, or semantics-only
              --  mode) actual subtypes cannot be constructed, and the type of an
              --  object may be its unconstrained nominal type. However, if the
!             --  context is an assignment, we assume that OTHERS is allowed,
!             --  because the target of the assignment will have a constrained
!             --  subtype when fully compiled. Ditto if the context is an
!             --  initialization procedure where a component may have a predicate
!             --  function that carries the base type.
  
              --  Note that there is no node for Explicit_Actual_Parameter.
              --  To test for this context we therefore have to test for node
--- 1078,1094 ----
              --  permit it, or the aggregate type is unconstrained, an OTHERS
              --  choice is not allowed (except that it is always allowed on the
              --  right-hand side of an assignment statement; in this case the
!             --  constrainedness of the type doesn't matter, because an array
!             --  object is always constrained).
  
              --  If expansion is disabled (generic context, or semantics-only
              --  mode) actual subtypes cannot be constructed, and the type of an
              --  object may be its unconstrained nominal type. However, if the
!             --  context is an assignment statement, OTHERS is allowed, because
!             --  the target of the assignment will have a constrained subtype
!             --  when fully compiled. Ditto if the context is an initialization
!             --  procedure where a component may have a predicate function that
!             --  carries the base type.
  
              --  Note that there is no node for Explicit_Actual_Parameter.
              --  To test for this context we therefore have to test for node
*************** package body Sem_Aggr is
*** 1094,1117 ****
  
              Set_Etype (N, Aggr_Typ);  --  May be overridden later on
  
!             if Pkind = N_Assignment_Statement
                or else Inside_Init_Proc
                or else (Is_Constrained (Typ)
!                         and then
!                           (Pkind = N_Parameter_Association     or else
!                            Pkind = N_Function_Call             or else
!                            Pkind = N_Procedure_Call_Statement  or else
!                            Pkind = N_Generic_Association       or else
!                            Pkind = N_Formal_Object_Declaration or else
!                            Pkind = N_Simple_Return_Statement   or else
!                            Pkind = N_Object_Declaration        or else
!                            Pkind = N_Component_Declaration     or else
!                            Pkind = N_Parameter_Specification   or else
!                            Pkind = N_Qualified_Expression      or else
!                            Pkind = N_Reference                 or else
!                            Pkind = N_Aggregate                 or else
!                            Pkind = N_Extension_Aggregate       or else
!                            Pkind = N_Component_Association))
              then
                 Aggr_Resolved :=
                   Resolve_Array_Aggregate
--- 1102,1127 ----
  
              Set_Etype (N, Aggr_Typ);  --  May be overridden later on
  
!             if Nkind (Parent (N)) = N_Assignment_Statement
                or else Inside_Init_Proc
                or else (Is_Constrained (Typ)
!                         and then Nkind_In (Parent (N),
!                                            N_Parameter_Association,
!                                            N_Function_Call,
!                                            N_Procedure_Call_Statement,
!                                            N_Generic_Association,
!                                            N_Formal_Object_Declaration,
!                                            N_Simple_Return_Statement,
!                                            N_Object_Declaration,
!                                            N_Component_Declaration,
!                                            N_Parameter_Specification,
!                                            N_Qualified_Expression,
!                                            N_Reference,
!                                            N_Aggregate,
!                                            N_Extension_Aggregate,
!                                            N_Component_Association,
!                                            N_Case_Expression_Alternative,
!                                            N_If_Expression))
              then
                 Aggr_Resolved :=
                   Resolve_Array_Aggregate
*************** package body Sem_Aggr is
*** 2799,2804 ****
--- 2809,2819 ----
        Base : constant Node_Id := Expression (N);
  
     begin
+       if Ada_Version < Ada_2020 then
+          Error_Msg_N ("delta_aggregate is an Ada 202x feature", N);
+          Error_Msg_N ("\compile with -gnatX", N);
+       end if;
+ 
        if not Is_Composite_Type (Typ) then
           Error_Msg_N ("not a composite type", N);
        end if;
*************** package body Sem_Aggr is
*** 3153,3158 ****
--- 3168,3176 ----
           elsif Nkind (Anc) = N_Qualified_Expression then
              return Valid_Limited_Ancestor (Expression (Anc));
  
+          elsif Nkind (Anc) = N_Raise_Expression then
+             return True;
+ 
           else
              return False;
           end if;
*************** package body Sem_Aggr is
*** 3194,3199 ****
--- 3212,3224 ----
              then
                 return True;
  
+             --  The parent type may be a raise expression (which is legal in
+             --  any expression context).
+ 
+             elsif A_Type = Raise_Type then
+                A_Type := Etype (Imm_Type);
+                return True;
+ 
              else
                 Imm_Type := Etype (Base_Type (Imm_Type));
              end if;
*************** package body Sem_Aggr is
*** 4264,4271 ****
              Expr_Disc : Node_Id)
           is
           begin
!             if Nkind (Bound) = N_Identifier
!               and then Entity (Bound) = Disc
              then
                 Rewrite (Bound, New_Copy_Tree (Expr_Disc));
              end if;
--- 4289,4303 ----
              Expr_Disc : Node_Id)
           is
           begin
!             if Nkind (Bound) /= N_Identifier then
!                return;
!             end if;
! 
!             --  We expect either the discriminant or the discriminal
! 
!             if Entity (Bound) = Disc
!               or else (Ekind (Entity (Bound)) = E_In_Parameter
!                         and then Discriminal_Link (Entity (Bound)) = Disc)
              then
                 Rewrite (Bound, New_Copy_Tree (Expr_Disc));
              end if;
*************** package body Sem_Aggr is
*** 4280,4288 ****
        --  Start of processing for Rewrite_Range
  
        begin
!          if Has_Discriminants (Root_Type)
!            and then Nkind (Rge) = N_Range
!          then
              Low := Low_Bound (Rge);
              High := High_Bound (Rge);
  
--- 4312,4318 ----
        --  Start of processing for Rewrite_Range
  
        begin
!          if Has_Discriminants (Root_Type) and then Nkind (Rge) = N_Range then
              Low := Low_Bound (Rge);
              High := High_Bound (Rge);
  
*************** package body Sem_Aggr is
*** 4903,4909 ****
                          --  Root record type whose discriminants may be used as
                          --  bounds in range nodes.
  
!                         Index : Node_Id;
  
                       begin
                          --  Rewrite the range nodes occurring in the indexes
--- 4933,4941 ----
                          --  Root record type whose discriminants may be used as
                          --  bounds in range nodes.
  
!                         Assoc  : Node_Id;
!                         Choice : Node_Id;
!                         Index  : Node_Id;
  
                       begin
                          --  Rewrite the range nodes occurring in the indexes
*************** package body Sem_Aggr is
*** 4919,4930 ****
                          end loop;
  
                          --  Rewrite the range nodes occurring as aggregate
!                         --  bounds.
  
!                         if Nkind (Expr) = N_Aggregate
!                           and then Present (Aggregate_Bounds (Expr))
!                         then
!                            Rewrite_Range (Rec_Typ, Aggregate_Bounds (Expr));
                          end if;
                       end;
                    end if;
--- 4951,4976 ----
                          end loop;
  
                          --  Rewrite the range nodes occurring as aggregate
!                         --  bounds and component associations.
  
!                         if Nkind (Expr) = N_Aggregate then
!                            if Present (Aggregate_Bounds (Expr)) then
!                               Rewrite_Range (Rec_Typ, Aggregate_Bounds (Expr));
!                            end if;
! 
!                            if Present (Component_Associations (Expr)) then
!                               Assoc := First (Component_Associations (Expr));
!                               while Present (Assoc) loop
!                                  Choice := First (Choices (Assoc));
!                                  while Present (Choice) loop
!                                     Rewrite_Range (Rec_Typ, Choice);
! 
!                                     Next (Choice);
!                                  end loop;
! 
!                                  Next (Assoc);
!                               end loop;
!                            end if;
                          end if;
                       end;
                    end if;
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_aggr.ads gcc-10.1.0/gcc/ada/sem_aggr.ads
*** gcc-9.3.0/gcc/ada/sem_aggr.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_aggr.ads	Thu May  7 10:49:59 2020
*************** package Sem_Aggr is
*** 37,40 ****
--- 37,42 ----
     function Is_Others_Aggregate (Aggr : Node_Id) return Boolean;
     --  Returns True is aggregate Aggr consists of a single OTHERS choice
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
  end Sem_Aggr;
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_attr.adb gcc-10.1.0/gcc/ada/sem_attr.adb
*** gcc-9.3.0/gcc/ada/sem_attr.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_attr.adb	Thu May  7 10:49:59 2020
***************
*** 25,30 ****
--- 25,31 ----
  
  with Ada.Characters.Latin_1; use Ada.Characters.Latin_1;
  
+ with Aspects;  use Aspects;
  with Atree;    use Atree;
  with Casing;   use Casing;
  with Checks;   use Checks;
*************** package body Sem_Attr is
*** 1634,1640 ****
              raise Bad_Attribute;
           end if;
  
!          --  Normal case of array type or subtype
  
           Check_Either_E0_Or_E1;
           Check_Dereference;
--- 1635,1643 ----
              raise Bad_Attribute;
           end if;
  
!          --  Normal case of array type or subtype. Note that if the
!          --  prefix is a current instance of a type declaration it
!          --  appears within an aspect specification and is legal.
  
           Check_Either_E0_Or_E1;
           Check_Dereference;
*************** package body Sem_Attr is
*** 1643,1648 ****
--- 1646,1652 ----
              if not Is_Constrained (P_Type)
                and then Is_Entity_Name (P)
                and then Is_Type (Entity (P))
+               and then not Is_Current_Instance (P)
              then
                 --  Note: we do not call Error_Attr here, since we prefer to
                 --  continue, using the relevant index type of the array,
*************** package body Sem_Attr is
*** 3833,3846 ****
              Check_Discrete_Type;
              Resolve (E1, P_Base_Type);
  
!          --  X'Enum_Rep case. X must be an object or enumeration literal, and
!          --  it must be of a discrete type.
  
           elsif not
             ((Is_Object_Reference (P)
                 or else
                   (Is_Entity_Name (P)
!                     and then Ekind (Entity (P)) = E_Enumeration_Literal))
               and then Is_Discrete_Type (Etype (P)))
           then
              Error_Attr_P ("prefix of % attribute must be discrete object");
--- 3837,3852 ----
              Check_Discrete_Type;
              Resolve (E1, P_Base_Type);
  
!          --  X'Enum_Rep case. X must be an object or enumeration literal
!          --  (including an attribute reference), and it must be of a
!          --  discrete type.
  
           elsif not
             ((Is_Object_Reference (P)
                 or else
                   (Is_Entity_Name (P)
!                     and then Ekind (Entity (P)) = E_Enumeration_Literal)
!                or else Nkind (P) = N_Attribute_Reference)
               and then Is_Discrete_Type (Etype (P)))
           then
              Error_Attr_P ("prefix of % attribute must be discrete object");
*************** package body Sem_Attr is
*** 5409,5414 ****
--- 5415,5421 ----
              Spec_Id := Entity (P);
  
           elsif not Legal then
+             Error_Attr ("prefix of % attribute must be a function", P);
              return;
           end if;
  
*************** package body Sem_Attr is
*** 5491,5496 ****
--- 5498,5552 ----
           Check_Discrete_Type;
           Set_Etype (N, Universal_Integer);
  
+       ------------
+       -- Reduce --
+       ------------
+ 
+       when Attribute_Reduce =>
+          Check_E2;
+ 
+          declare
+             Stream : constant Node_Id := Prefix (N);
+             Typ    : Entity_Id;
+          begin
+             if Nkind (Stream) /= N_Aggregate then
+                --  Prefix is a name, as for other attributes.
+ 
+                --  If the object is a function we asume that it is not
+                --  overloaded. AI12-242 does not suggest an name resulution
+                --  rule for that case, but can suppose that the expected
+                --  type of the reduction is the expected type of the
+                --  component of the prefix.
+ 
+                Analyze_And_Resolve (Stream);
+                Typ := Etype (Stream);
+ 
+                --  Verify that prefix can be iterated upon.
+ 
+                if Is_Array_Type (Typ)
+                  or else Present (Find_Aspect (Typ, Aspect_Default_Iterator))
+                  or else Present (Find_Aspect (Typ, Aspect_Iterable))
+                then
+                   null;
+                else
+                   Error_Msg_NE
+                     ("cannot apply reduce to object of type$", N, Typ);
+                end if;
+ 
+             elsif Present (Expressions (Stream))
+               or else No (Component_Associations (Stream))
+               or else Nkind (First (Component_Associations (Stream))) /=
+                 N_Iterated_Component_Association
+             then
+                Error_Msg_N
+                  ("Prefix of reduce must be an iterated component", N);
+             end if;
+ 
+             Analyze (E1);
+             Analyze (E2);
+             Set_Etype (N, Etype (E2));
+          end;
+ 
        ----------
        -- Read --
        ----------
*************** package body Sem_Attr is
*** 5835,5850 ****
           --  Time_Errors after the back end has been called and this occurrence
           --  of 'Size is known at compile time then it is safe to perform this
           --  evaluation. Needed to perform the static evaluation of the full
!          --  boolean expression of these pragmas.
  
           if In_Compile_Time_Warning_Or_Error
             and then Is_Entity_Name (P)
             and then (Is_Type (Entity (P))
                        or else Ekind (Entity (P)) = E_Enumeration_Literal)
!            and then Size_Known_At_Compile_Time (Entity (P))
           then
!             Rewrite (N, Make_Integer_Literal (Sloc (N), Esize (Entity (P))));
!             Analyze (N);
           end if;
  
        -----------
--- 5891,5920 ----
           --  Time_Errors after the back end has been called and this occurrence
           --  of 'Size is known at compile time then it is safe to perform this
           --  evaluation. Needed to perform the static evaluation of the full
!          --  boolean expression of these pragmas. Note that Known_RM_Size is
!          --  sometimes True when Size_Known_At_Compile_Time is False, when the
!          --  back end has computed it.
  
           if In_Compile_Time_Warning_Or_Error
             and then Is_Entity_Name (P)
             and then (Is_Type (Entity (P))
                        or else Ekind (Entity (P)) = E_Enumeration_Literal)
!            and then (Known_RM_Size (Entity (P))
!                        or else Size_Known_At_Compile_Time (Entity (P)))
           then
!             declare
!                Siz : Uint;
! 
!             begin
!                if Known_Static_RM_Size (Entity (P)) then
!                   Siz := RM_Size (Entity (P));
!                else
!                   Siz := Esize (Entity (P));
!                end if;
! 
!                Rewrite (N, Make_Integer_Literal (Sloc (N), Siz));
!                Analyze (N);
!             end;
           end if;
  
        -----------
*************** package body Sem_Attr is
*** 7836,7841 ****
--- 7906,7913 ----
  
        --  is legal, since here this expression appears in a statically
        --  unevaluated position, so it does not actually raise an exception.
+       --
+       --  T'Descriptor_Size is never static, even if T is static.
  
        if Is_Scalar_Type (P_Entity)
          and then (not Is_Generic_Type (P_Entity))
*************** package body Sem_Attr is
*** 7849,7854 ****
--- 7921,7927 ----
            (No (E2)
              or else (Is_Static_Expression (E2)
                        and then Is_Scalar_Type (Etype (E1))))
+         and then Id /= Attribute_Descriptor_Size
        then
           Static := True;
           Set_Is_Static_Expression (N, True);
*************** package body Sem_Attr is
*** 8218,8223 ****
--- 8291,8297 ----
           | Attribute_Implicit_Dereference
           | Attribute_Iterator_Element
           | Attribute_Iterable
+          | Attribute_Reduce
           | Attribute_Variable_Indexing
        =>
           null;
*************** package body Sem_Attr is
*** 10429,10435 ****
                    --  to a missed warning (the Valid check does not really
                    --  modify!) If this case, Note will be reset to False.
  
!                   --  Skip it as well if the type is an Acccess_To_Constant,
                    --  given that no use of the value can modify the prefix.
  
                 begin
--- 10503,10509 ----
                    --  to a missed warning (the Valid check does not really
                    --  modify!) If this case, Note will be reset to False.
  
!                   --  Skip it as well if the type is an Access_To_Constant,
                    --  given that no use of the value can modify the prefix.
  
                 begin
*************** package body Sem_Attr is
*** 11416,11422 ****
                    if Present (Lo) then
                       Rewrite (P,
                          Make_Indexed_Component (Loc,
!                            Prefix =>  Relocate_Node (Prefix (P)),
                             Expressions => New_List (Lo)));
  
                       Analyze_And_Resolve (P);
--- 11490,11496 ----
                    if Present (Lo) then
                       Rewrite (P,
                          Make_Indexed_Component (Loc,
!                            Prefix => Relocate_Node (Prefix (P)),
                             Expressions => New_List (Lo)));
  
                       Analyze_And_Resolve (P);
*************** package body Sem_Attr is
*** 11554,11559 ****
--- 11628,11643 ----
           begin
              if not Is_Entity_Name (P) or else not Is_Type (Entity (P)) then
                 Resolve (P);
+ 
+                --  If the prefix is a function call returning on the secondary
+                --  stack, we must make sure to mark/release the stack.
+ 
+                if Nkind (P) = N_Function_Call
+                  and then Nkind (Parent (N)) = N_Loop_Parameter_Specification
+                  and then Requires_Transient_Scope (Etype (P))
+                then
+                   Set_Uses_Sec_Stack (Scope (Current_Scope));
+                end if;
              end if;
  
              Dims := Expressions (N);
*************** package body Sem_Attr is
*** 11618,11623 ****
--- 11702,11771 ----
              return;
           end Range_Attribute;
  
+          -------------
+          -- Reduce --
+          -------------
+ 
+          when Attribute_Reduce =>
+             declare
+                E1 : constant Node_Id := First (Expressions (N));
+                E2 : constant Node_Id := Next (E1);
+                Op : Entity_Id := Empty;
+ 
+                Index : Interp_Index;
+                It    : Interp;
+                function Proper_Op (Op : Entity_Id) return Boolean;
+ 
+                ---------------
+                -- Proper_Op --
+                ---------------
+ 
+                function Proper_Op (Op : Entity_Id) return Boolean is
+                   F1, F2 : Entity_Id;
+ 
+                begin
+                   F1 := First_Formal (Op);
+                   if No (F1) then
+                      return False;
+                   else
+                      F2 := Next_Formal (F1);
+                      if No (F2)
+                        or else Present (Next_Formal (F2))
+                      then
+                         return False;
+                      else
+                         return
+                           (Ekind (Op) = E_Operator
+                             and then Scope (Op) = Standard_Standard)
+                             or else  Covers (Typ, Etype (Op));
+                      end if;
+                   end if;
+                end Proper_Op;
+ 
+             begin
+                Resolve (E2, Typ);
+                if Is_Overloaded (E1) then
+                   Get_First_Interp (E1, Index, It);
+                   while Present (It.Nam) loop
+                      if Proper_Op (It.Nam) then
+                         Op := It.Nam;
+                         Set_Entity (E1, Op);
+                         exit;
+                      end if;
+ 
+                      Get_Next_Interp (Index, It);
+                   end loop;
+ 
+                elsif Proper_Op (Entity (E1)) then
+                   Op := Entity (E1);
+                   Set_Etype (N, Typ);
+                end if;
+ 
+                if No (Op) then
+                   Error_Msg_N ("No visible function for reduction", E1);
+                end if;
+             end;
+ 
           ------------
           -- Result --
           ------------
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_aux.adb gcc-10.1.0/gcc/ada/sem_aux.adb
*** gcc-9.3.0/gcc/ada/sem_aux.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_aux.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Aux is
*** 569,574 ****
--- 569,580 ----
              elsif Entity (N) = E then
                 return N;
              end if;
+ 
+          --  A Ghost-related aspect, if disabled, may have been replaced by a
+          --  null statement.
+ 
+          elsif Nkind (N) = N_Null_Statement then
+             N := Original_Node (N);
           end if;
  
           Next_Rep_Item (N);
*************** package body Sem_Aux is
*** 1324,1329 ****
--- 1330,1348 ----
        end if;
     end Is_Limited_View;
  
+    ----------------------------
+    -- Is_Protected_Operation --
+    ----------------------------
+ 
+    function Is_Protected_Operation (E : Entity_Id) return Boolean is
+    begin
+       return
+         Is_Entry (E)
+           or else (Is_Subprogram (E)
+                     and then Nkind (Parent (Unit_Declaration_Node (E))) =
+                                N_Protected_Definition);
+    end Is_Protected_Operation;
+ 
     ----------------------
     -- Nearest_Ancestor --
     ----------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_aux.ads gcc-10.1.0/gcc/ada/sem_aux.ads
*** gcc-9.3.0/gcc/ada/sem_aux.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_aux.ads	Thu May  7 10:49:59 2020
*************** package Sem_Aux is
*** 87,96 ****
     -----------------
  
     function Ancestor_Subtype (Typ : Entity_Id) return Entity_Id;
!    --  The argument Id is a type or subtype entity. If the argument is a
     --  subtype then it returns the subtype or type from which the subtype was
     --  obtained, otherwise it returns Empty.
  
     function Available_View (Ent : Entity_Id) return Entity_Id;
     --  Ent denotes an abstract state or a type that may come from a limited
     --  with clause. Return the non-limited view of Ent if there is one or Ent
--- 87,98 ----
     -----------------
  
     function Ancestor_Subtype (Typ : Entity_Id) return Entity_Id;
!    --  The argument Typ is a type or subtype entity. If the argument is a
     --  subtype then it returns the subtype or type from which the subtype was
     --  obtained, otherwise it returns Empty.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Available_View (Ent : Entity_Id) return Entity_Id;
     --  Ent denotes an abstract state or a type that may come from a limited
     --  with clause. Return the non-limited view of Ent if there is one or Ent
*************** package Sem_Aux is
*** 104,109 ****
--- 106,113 ----
     --  constants from the point of view of constant folding. Empty is also
     --  returned for variables with no initialization expression.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Corresponding_Unsigned_Type (Typ : Entity_Id) return Entity_Id;
     --  Typ is a signed integer subtype. This routine returns the standard
     --  unsigned type with the same Esize as the implementation base type of
*************** package Sem_Aux is
*** 123,128 ****
--- 127,134 ----
     --  When called on a private type with unknown discriminants, the function
     --  always returns Empty.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function First_Stored_Discriminant (Typ : Entity_Id) return Entity_Id;
     --  Typ is a type with discriminants. Gives the first discriminant stored
     --  in an object of this type. In many cases, these are the same as the
*************** package Sem_Aux is
*** 146,156 ****
--- 152,166 ----
     --  discriminants from Gigi's standpoint, i.e. those that will be stored in
     --  actual objects of the type.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function First_Subtype (Typ : Entity_Id) return Entity_Id;
     --  Applies to all types and subtypes. For types, yields the first subtype
     --  of the type. For subtypes, yields the first subtype of the base type of
     --  the subtype.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function First_Tag_Component (Typ : Entity_Id) return Entity_Id;
     --  Typ must be a tagged record type. This function returns the Entity for
     --  the first _Tag field in the record type.
*************** package Sem_Aux is
*** 317,322 ****
--- 327,334 ----
     --  Ent is any entity. Returns True if Ent is a type entity where the type
     --  is required to be passed by reference, as defined in (RM 6.2(4-9)).
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Is_Definite_Subtype (T : Entity_Id) return Boolean;
     --  T is a type entity. Returns True if T is a definite subtype.
     --  Indefinite subtypes are unconstrained arrays, unconstrained
*************** package Sem_Aux is
*** 329,334 ****
--- 341,348 ----
     --  Determines if the given entity Ent is a derived type. Result is always
     --  false if argument is not a type.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Is_Generic_Formal (E : Entity_Id) return Boolean;
     --  Determine whether E is a generic formal parameter. In particular this is
     --  used to set the visibility of generic formals of a generic package
*************** package Sem_Aux is
*** 357,362 ****
--- 371,380 ----
     --  these types). This older routine overlaps with the previous one, this
     --  should be cleaned up???
  
+    function Is_Protected_Operation (E : Entity_Id) return Boolean;
+    --  Given a subprogram or entry, determines whether E is a protected entry
+    --  or subprogram.
+ 
     function Nearest_Ancestor (Typ : Entity_Id) return Entity_Id;
     --  Given a subtype Typ, this function finds out the nearest ancestor from
     --  which constraints and predicates are inherited. There is no simple link
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_cat.adb gcc-10.1.0/gcc/ada/sem_cat.adb
*** gcc-9.3.0/gcc/ada/sem_cat.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_cat.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Cat is
*** 721,729 ****
        --  The purpose is to set categorization flags before analyzing the
        --  unit itself, so as to diagnose violations of categorization as
        --  we process each declaration, even though the pragma appears after
!       --  the unit.
  
!       if Nkind (P) /= N_Compilation_Unit then
           return;
        end if;
  
--- 721,735 ----
        --  The purpose is to set categorization flags before analyzing the
        --  unit itself, so as to diagnose violations of categorization as
        --  we process each declaration, even though the pragma appears after
!       --  the unit. This processing is only needed if compilation unit pragmas
!       --  are present.
!       --  Note: This code may be incorrect in the unlikely case a child generic
!       --  unit is instantiated as a child of its (nongeneric) parent, so that
!       --  generic and instance are siblings.
  
!       if Nkind (P) /= N_Compilation_Unit
!          or else No (First (Pragmas_After (Aux_Decls_Node (P))))
!       then
           return;
        end if;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch10.adb gcc-10.1.0/gcc/ada/sem_ch10.adb
*** gcc-9.3.0/gcc/ada/sem_ch10.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch10.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Ch10 is
*** 2226,2234 ****
--- 2226,2243 ----
  
           --  If the subunit occurs within a child unit, we must restore the
           --  immediate visibility of any siblings that may occur in context.
+          --  In addition, we must reset the previous visibility of the
+          --  parent unit which is now on the scope stack. This is because
+          --  the Previous_Visibility was previously set when removing the
+          --  context. This is necessary to prevent the parent entity from
+          --  remaining visible after the subunit is compiled. This only
+          --  has an effect if a homonym exists in a body to be processed
+          --  later if inlining is enabled.
  
           if Present (Enclosing_Child) then
              Install_Siblings (Enclosing_Child, L);
+             Scope_Stack.Table (Scope_Stack.Last).Previous_Visibility :=
+               False;
           end if;
  
           Push_Scope (Scop);
*************** package body Sem_Ch10 is
*** 2424,2429 ****
--- 2433,2452 ----
  
        Install_Elaboration_Model (Par_Unit);
  
+       --  The syntax rules require a proper body for a subprogram subunit
+ 
+       if Nkind (Proper_Body (Sinfo.Unit (N))) = N_Subprogram_Declaration then
+          if Null_Present (Specification (Proper_Body (Sinfo.Unit (N)))) then
+             Error_Msg_N
+               ("null procedure not allowed as subunit",
+                Proper_Body (Unit (N)));
+          else
+             Error_Msg_N
+               ("subprogram declaration not allowed as subunit",
+                Defining_Unit_Name (Specification (Proper_Body (Unit (N)))));
+          end if;
+       end if;
+ 
        Analyze (Proper_Body (Unit (N)));
        Remove_Context (N);
  
*************** package body Sem_Ch10 is
*** 2657,2668 ****
             and then not Implicit_With (N)
             and then not Restriction_Violation
           then
!             declare
!                U_Kind : constant Kind_Of_Unit :=
!                           Get_Kind_Of_Unit (Get_Source_Unit (U));
! 
!             begin
!                if U_Kind = Implementation_Unit then
                    Error_Msg_F ("& is an internal 'G'N'A'T unit?i?", Name (N));
  
                    --  Add alternative name if available, otherwise issue a
--- 2680,2687 ----
             and then not Implicit_With (N)
             and then not Restriction_Violation
           then
!             case Get_Kind_Of_Unit (Get_Source_Unit (U)) is
!                when Implementation_Unit =>
                    Error_Msg_F ("& is an internal 'G'N'A'T unit?i?", Name (N));
  
                    --  Add alternative name if available, otherwise issue a
*************** package body Sem_Ch10 is
*** 2676,2694 ****
                          & "version-dependent?i?", Name (N));
                    end if;
  
!                elsif U_Kind = Ada_2005_Unit
!                  and then Ada_Version < Ada_2005
!                  and then Warn_On_Ada_2005_Compatibility
!                then
!                   Error_Msg_N ("& is an Ada 2005 unit?i?", Name (N));
  
!                elsif U_Kind = Ada_2012_Unit
!                  and then Ada_Version < Ada_2012
!                  and then Warn_On_Ada_2012_Compatibility
!                then
!                   Error_Msg_N ("& is an Ada 2012 unit?i?", Name (N));
!                end if;
!             end;
           end if;
        end if;
  
--- 2695,2724 ----
                          & "version-dependent?i?", Name (N));
                    end if;
  
!                when Not_Predefined_Unit | Ada_95_Unit =>
!                   null; -- no checks needed
  
!                when Ada_2005_Unit =>
!                   if Ada_Version < Ada_2005
!                     and then Warn_On_Ada_2005_Compatibility
!                   then
!                      Error_Msg_N ("& is an Ada 2005 unit?i?", Name (N));
!                   end if;
! 
!                when Ada_2012_Unit =>
!                   if Ada_Version < Ada_2012
!                     and then Warn_On_Ada_2012_Compatibility
!                   then
!                      Error_Msg_N ("& is an Ada 2012 unit?i?", Name (N));
!                   end if;
! 
!                when Ada_202X_Unit =>
!                   if Ada_Version < Ada_2020
!                     and then Warn_On_Ada_202X_Compatibility
!                   then
!                      Error_Msg_N ("& is an Ada 202X unit?i?", Name (N));
!                   end if;
!             end case;
           end if;
        end if;
  
*************** package body Sem_Ch10 is
*** 4355,4361 ****
                    end;
                 end if;
  
!             --  The With_Clause may be on a grand-child or one of its further
              --  descendants, which makes a child immediately visible. Examine
              --  ancestry to determine whether such a child exists. For example,
              --  if current unit is A.C, and with_clause is on A.X.Y.Z, then X
--- 4385,4391 ----
                    end;
                 end if;
  
!             --  The With_Clause may be on a grandchild or one of its further
              --  descendants, which makes a child immediately visible. Examine
              --  ancestry to determine whether such a child exists. For example,
              --  if current unit is A.C, and with_clause is on A.X.Y.Z, then X
*************** package body Sem_Ch10 is
*** 4394,4400 ****
                    --  Scan context of current unit, to check whether there is
                    --  a with_clause on the same unit as a private with-clause
                    --  on a parent, in which case child unit is visible. If the
!                   --  unit is a grand-child, the same applies to its parent.
  
                    ----------------
                    -- In_Context --
--- 4424,4430 ----
                    --  Scan context of current unit, to check whether there is
                    --  a with_clause on the same unit as a private with-clause
                    --  on a parent, in which case child unit is visible. If the
!                   --  unit is a grandchild, the same applies to its parent.
  
                    ----------------
                    -- In_Context --
*************** package body Sem_Ch10 is
*** 5327,5332 ****
--- 5357,5376 ----
              Error_Msg_N
                ("instantiation depends on itself", Name (With_Clause));
  
+          elsif not Analyzed (Uname)
+            and then Is_Internal_Unit (Current_Sem_Unit)
+            and then not Is_Visible_Lib_Unit (Uname)
+            and then No (Scope (Uname))
+          then
+             if Is_Predefined_Unit (Current_Sem_Unit) then
+                Error_Msg_N
+                  ("predefined unit depends on itself", Name (With_Clause));
+             else
+                Error_Msg_N
+                  ("GNAT-defined unit depends on itself", Name (With_Clause));
+             end if;
+             return;
+ 
           elsif not Is_Visible_Lib_Unit (Uname) then
  
              --  Abandon processing in case of previous errors
*************** package body Sem_Ch10 is
*** 6379,6400 ****
  
     begin
        --  Ada 2005 (AI-50217): We remove the context clauses in two phases:
!       --  limited-views first and regular-views later (to maintain the
!       --  stack model).
  
        --  First Phase: Remove limited_with context clauses
  
        Item := First (Context_Items (N));
        while Present (Item) loop
  
!          --  We are interested only in with clauses which got installed
!          --  on entry.
  
           if Nkind (Item) = N_With_Clause
             and then Limited_Present (Item)
-            and then Limited_View_Installed (Item)
           then
!             Remove_Limited_With_Clause (Item);
           end if;
  
           Next (Item);
--- 6423,6460 ----
  
     begin
        --  Ada 2005 (AI-50217): We remove the context clauses in two phases:
!       --  limited-views first and regular-views later (to maintain the stack
!       --  model).
  
        --  First Phase: Remove limited_with context clauses
  
        Item := First (Context_Items (N));
        while Present (Item) loop
  
!          --  We are interested only in with clauses that got installed on entry
  
           if Nkind (Item) = N_With_Clause
             and then Limited_Present (Item)
           then
!             if Limited_View_Installed (Item) then
!                Remove_Limited_With_Clause (Item);
! 
!             --  An unusual case: If the library unit of the Main_Unit has a
!             --  limited with_clause on some unit P and the context somewhere
!             --  includes a with_clause on P, P has been analyzed. The entity
!             --  for P is still visible, which in general is harmless because
!             --  this is the end of the compilation, but it can affect pending
!             --  instantiations that may have been generated elsewhere, so it
!             --  it is necessary to remove U from visibility so that inlining
!             --  and the analysis of instance bodies can proceed cleanly.
! 
!             elsif Current_Sem_Unit = Main_Unit
!               and then Serious_Errors_Detected = 0
!               and then not Implicit_With (Item)
!             then
!                Set_Is_Immediately_Visible
!                  (Defining_Entity (Unit (Library_Unit (Item))), False);
!             end if;
           end if;
  
           Next (Item);
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch12.adb gcc-10.1.0/gcc/ada/sem_ch12.adb
*** gcc-9.3.0/gcc/ada/sem_ch12.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch12.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Ch12 is
*** 240,245 ****
--- 240,249 ----
     --  circularity is detected, and used to abandon compilation after the
     --  messages have been posted.
  
+    Circularity_Detected : Boolean := False;
+    --  It should really be reset upon encountering a new main unit, but in
+    --  practice we do not use multiple main units so this is not critical.
+ 
     -----------------------------------------
     -- Implementation of Generic Contracts --
     -----------------------------------------
*************** package body Sem_Ch12 is
*** 352,361 ****
  
     --    Instantiate_Subprogram_Contract
  
-    Circularity_Detected : Boolean := False;
-    --  This should really be reset on encountering a new main unit, but in
-    --  practice we are not using multiple main units so it is not critical.
- 
     --------------------------------------------------
     -- Formal packages and partial parameterization --
     --------------------------------------------------
--- 356,361 ----
*************** package body Sem_Ch12 is
*** 380,402 ****
     --  the generic package, and a set of declarations that map the actuals
     --  into local renamings, just as we do for bona fide instantiations. For
     --  defaulted parameters and formals with a box, we copy directly the
!    --  declarations of the formal into this local package. The result is a
!    --  a package whose visible declarations may include generic formals. This
     --  package is only used for type checking and visibility analysis, and
!    --  never reaches the back-end, so it can freely violate the placement
     --  rules for generic formal declarations.
  
     --  The list of declarations (renamings and copies of formals) is built
     --  by Analyze_Associations, just as for regular instantiations.
  
     --  At the point of instantiation, conformance checking must be applied only
!    --  to those parameters that were specified in the formal. We perform this
     --  checking by creating another internal instantiation, this one including
     --  only the renamings and the formals (the rest of the package spec is not
     --  relevant to conformance checking). We can then traverse two lists: the
     --  list of actuals in the instance that corresponds to the formal package,
     --  and the list of actuals produced for this bogus instantiation. We apply
!    --  the conformance rules to those actuals that are not defaulted (i.e.
     --  which still appear as generic formals.
  
     --  When we compile an instance body we must make the right parameters
--- 380,402 ----
     --  the generic package, and a set of declarations that map the actuals
     --  into local renamings, just as we do for bona fide instantiations. For
     --  defaulted parameters and formals with a box, we copy directly the
!    --  declarations of the formals into this local package. The result is a
!    --  package whose visible declarations may include generic formals. This
     --  package is only used for type checking and visibility analysis, and
!    --  never reaches the back end, so it can freely violate the placement
     --  rules for generic formal declarations.
  
     --  The list of declarations (renamings and copies of formals) is built
     --  by Analyze_Associations, just as for regular instantiations.
  
     --  At the point of instantiation, conformance checking must be applied only
!    --  to those parameters that were specified in the formals. We perform this
     --  checking by creating another internal instantiation, this one including
     --  only the renamings and the formals (the rest of the package spec is not
     --  relevant to conformance checking). We can then traverse two lists: the
     --  list of actuals in the instance that corresponds to the formal package,
     --  and the list of actuals produced for this bogus instantiation. We apply
!    --  the conformance rules to those actuals that are not defaulted, i.e.
     --  which still appear as generic formals.
  
     --  When we compile an instance body we must make the right parameters
*************** package body Sem_Ch12 is
*** 1025,1050 ****
        raise Instantiation_Error;
     end Abandon_Instantiation;
  
-    --------------------------------
-    --  Add_Pending_Instantiation --
-    --------------------------------
- 
-    procedure Add_Pending_Instantiation (Inst : Node_Id; Act_Decl : Node_Id) is
-    begin
-       --  Capture the body of the generic instantiation along with its context
-       --  for later processing by Instantiate_Bodies.
- 
-       Pending_Instantiations.Append
-         ((Act_Decl                 => Act_Decl,
-           Config_Switches          => Save_Config_Switches,
-           Current_Sem_Unit         => Current_Sem_Unit,
-           Expander_Status          => Expander_Active,
-           Inst_Node                => Inst,
-           Local_Suppress_Stack_Top => Local_Suppress_Stack_Top,
-           Scope_Suppress           => Scope_Suppress,
-           Warnings                 => Save_Warnings));
-    end Add_Pending_Instantiation;
- 
     ----------------------------------
     -- Adjust_Inherited_Pragma_Sloc --
     ----------------------------------
--- 1025,1030 ----
*************** package body Sem_Ch12 is
*** 2945,2950 ****
--- 2925,2965 ----
        Set_Ekind  (Formal, E_Package);
        Set_Etype  (Formal, Standard_Void_Type);
        Set_Inner_Instances (Formal, New_Elmt_List);
+ 
+       --  It is unclear that any aspects can apply to a formal package
+       --  declaration, given that they look like a hidden conformance
+       --  requirement on the corresponding actual. However, Abstract_State
+       --  must be treated specially because it generates declarations that
+       --  must appear before other declarations in the specification and
+       --  must be analyzed at once.
+ 
+       if Present (Aspect_Specifications (Gen_Decl)) then
+          if No (Aspect_Specifications (N)) then
+             Set_Aspect_Specifications (N, New_List);
+             Set_Has_Aspects (N);
+          end if;
+ 
+          declare
+             ASN   : Node_Id := First (Aspect_Specifications (Gen_Decl));
+             New_A : Node_Id;
+ 
+          begin
+             while Present (ASN) loop
+                if Get_Aspect_Id (ASN) = Aspect_Abstract_State then
+                   New_A :=
+                     Copy_Generic_Node (ASN, Empty, Instantiating => True);
+                   Set_Entity (New_A, Formal);
+                   Set_Analyzed (New_A, False);
+                   Append (New_A, Aspect_Specifications (N));
+                   Analyze_Aspect_Specifications (N, Formal);
+                   exit;
+                end if;
+ 
+                Next (ASN);
+             end loop;
+          end;
+       end if;
+ 
        Push_Scope  (Formal);
  
        --  Manually set the SPARK_Mode from the context because the package
*************** package body Sem_Ch12 is
*** 3043,3048 ****
--- 3058,3066 ----
  
     <<Leave>>
        if Has_Aspects (N) then
+          --  Unclear that any other aspects may appear here, snalyze them
+          --  for completion, given that the grammar allows their appearance.
+ 
           Analyze_Aspect_Specifications (N, Pack_Id);
        end if;
  
*************** package body Sem_Ch12 is
*** 3392,3398 ****
--- 3410,3420 ----
              raise Program_Error;
        end case;
  
+       --  A formal type declaration declares a type and its first
+       --  subtype.
+ 
        Set_Is_Generic_Type (T);
+       Set_Is_First_Subtype (T);
  
        if Has_Aspects (N) then
           Analyze_Aspect_Specifications (N, T);
*************** package body Sem_Ch12 is
*** 3473,3478 ****
--- 3495,3511 ----
     begin
        Check_SPARK_05_Restriction ("generic is not allowed", N);
  
+       --  A generic may grant access to its private enclosing context depending
+       --  on the placement of its corresponding body. From elaboration point of
+       --  view, the flow of execution may enter this private context, and then
+       --  reach an external unit, thus producing a dependency on that external
+       --  unit. For such a path to be properly discovered and encoded in the
+       --  ALI file of the main unit, let the ABE mechanism process the body of
+       --  the main unit, and encode all relevant invocation constructs and the
+       --  relations between them.
+ 
+       Mark_Save_Invocation_Graph_Of_Body;
+ 
        --  We introduce a renaming of the enclosing package, to have a usable
        --  entity as the prefix of an expanded name for a local entity of the
        --  form Par.P.Q, where P is the generic package. This is because a local
*************** package body Sem_Ch12 is
*** 3668,3673 ****
--- 3701,3717 ----
     begin
        Check_SPARK_05_Restriction ("generic is not allowed", N);
  
+       --  A generic may grant access to its private enclosing context depending
+       --  on the placement of its corresponding body. From elaboration point of
+       --  view, the flow of execution may enter this private context, and then
+       --  reach an external unit, thus producing a dependency on that external
+       --  unit. For such a path to be properly discovered and encoded in the
+       --  ALI file of the main unit, let the ABE mechanism process the body of
+       --  the main unit, and encode all relevant invocation constructs and the
+       --  relations between them.
+ 
+       Mark_Save_Invocation_Graph_Of_Body;
+ 
        --  Create copy of generic unit, and save for instantiation. If the unit
        --  is a child unit, do not copy the specifications for the parent, which
        --  are not part of the generic tree.
*************** package body Sem_Ch12 is
*** 3843,3869 ****
  
     procedure Analyze_Package_Instantiation (N : Node_Id) is
        Has_Inline_Always : Boolean := False;
! 
!       procedure Delay_Descriptors (E : Entity_Id);
!       --  Delay generation of subprogram descriptors for given entity
  
        function Might_Inline_Subp (Gen_Unit : Entity_Id) return Boolean;
!       --  If inlining is active and the generic contains inlined subprograms,
!       --  we instantiate the body. This may cause superfluous instantiations,
!       --  but it is simpler than detecting the need for the body at the point
!       --  of inlining, when the context of the instance is not available.
! 
!       -----------------------
!       -- Delay_Descriptors --
!       -----------------------
  
!       procedure Delay_Descriptors (E : Entity_Id) is
!       begin
!          if not Delay_Subprogram_Descriptors (E) then
!             Set_Delay_Subprogram_Descriptors (E);
!             Pending_Descriptor.Append (E);
!          end if;
!       end Delay_Descriptors;
  
        -----------------------
        -- Might_Inline_Subp --
--- 3887,3907 ----
  
     procedure Analyze_Package_Instantiation (N : Node_Id) is
        Has_Inline_Always : Boolean := False;
!       --  Set if the generic unit contains any subprograms with Inline_Always.
!       --  Only relevant when back-end inlining is not enabled.
  
        function Might_Inline_Subp (Gen_Unit : Entity_Id) return Boolean;
!       --  Return True if inlining is active and Gen_Unit contains inlined
!       --  subprograms. In this case, we may either instantiate the body when
!       --  front-end inlining is enabled, or add a pending instantiation when
!       --  back-end inlining is enabled. In the former case, this may cause
!       --  superfluous instantiations, but in either case we need to perform
!       --  the instantiation of the body in the context of the instance and
!       --  not in that of the point of inlining.
  
!       function Needs_Body_Instantiated (Gen_Unit : Entity_Id) return Boolean;
!       --  Return True if Gen_Unit needs to have its body instantiated in the
!       --  context of N. This in particular excludes generic contexts.
  
        -----------------------
        -- Might_Inline_Subp --
*************** package body Sem_Ch12 is
*** 3873,3882 ****
           E : Entity_Id;
  
        begin
!          if not Inline_Processing_Required then
!             return False;
  
-          else
              E := First_Entity (Gen_Unit);
              while Present (E) loop
                 if Is_Subprogram (E) and then Is_Inlined (E) then
--- 3911,3924 ----
           E : Entity_Id;
  
        begin
!          if Inline_Processing_Required then
!             --  No need to recompute the answer if we know it is positive
!             --  and back-end inlining is enabled.
! 
!             if Is_Inlined (Gen_Unit) and then Back_End_Inlining then
!                return True;
!             end if;
  
              E := First_Entity (Gen_Unit);
              while Present (E) loop
                 if Is_Subprogram (E) and then Is_Inlined (E) then
*************** package body Sem_Ch12 is
*** 3886,3891 ****
--- 3928,3934 ----
                       Has_Inline_Always := True;
                    end if;
  
+                   Set_Is_Inlined (Gen_Unit);
                    return True;
                 end if;
  
*************** package body Sem_Ch12 is
*** 3896,3906 ****
           return False;
        end Might_Inline_Subp;
  
        --  Local declarations
  
        Gen_Id         : constant Node_Id    := Name (N);
!       Is_Actual_Pack : constant Boolean    :=
!                          Is_Internal (Defining_Entity (N));
        Loc            : constant Source_Ptr := Sloc (N);
  
        Saved_GM   : constant Ghost_Mode_Type := Ghost_Mode;
--- 3939,3991 ----
           return False;
        end Might_Inline_Subp;
  
+       -------------------------------
+       --  Needs_Body_Instantiated  --
+       -------------------------------
+ 
+       function Needs_Body_Instantiated (Gen_Unit : Entity_Id) return Boolean is
+       begin
+          --  No need to instantiate bodies in generic units
+ 
+          if Is_Generic_Unit (Cunit_Entity (Main_Unit)) then
+             return False;
+          end if;
+ 
+          --  If the instantiation is in the main unit, then the body is needed
+ 
+          if Is_In_Main_Unit (N) then
+             return True;
+          end if;
+ 
+          --  If not, then again no need to instantiate bodies in generic units
+ 
+          if Is_Generic_Unit (Cunit_Entity (Get_Code_Unit (N))) then
+             return False;
+          end if;
+ 
+          --  Here we have a special handling for back-end inlining: if inline
+          --  processing is required, then we unconditionally want to have the
+          --  body instantiated. The reason is that Might_Inline_Subp does not
+          --  catch all the cases (as it does not recurse into nested packages)
+          --  so this avoids the need to patch things up afterwards. Moreover,
+          --  these instantiations are only performed on demand when back-end
+          --  inlining is enabled, so this causes very little extra work.
+ 
+          if Inline_Processing_Required and then Back_End_Inlining then
+             return True;
+          end if;
+ 
+          --  We want to have the bodies instantiated in non-main units if
+          --  they might contribute inlined subprograms.
+ 
+          return Might_Inline_Subp (Gen_Unit);
+       end Needs_Body_Instantiated;
+ 
        --  Local declarations
  
        Gen_Id         : constant Node_Id    := Name (N);
!       Inst_Id        : constant Entity_Id  := Defining_Entity (N);
!       Is_Actual_Pack : constant Boolean    := Is_Internal (Inst_Id);
        Loc            : constant Source_Ptr := Sloc (N);
  
        Saved_GM   : constant Ghost_Mode_Type := Ghost_Mode;
*************** package body Sem_Ch12 is
*** 4109,4114 ****
--- 4194,4202 ----
           goto Leave;
  
        else
+          Set_Ekind (Inst_Id, E_Package);
+          Set_Scope (Inst_Id, Current_Scope);
+ 
           --  If the context of the instance is subject to SPARK_Mode "off" or
           --  the annotation is altogether missing, set the global flag which
           --  signals Analyze_Pragma to ignore all SPARK_Mode pragmas within
*************** package body Sem_Ch12 is
*** 4256,4267 ****
              end if;
           end if;
  
!          --  Save the instantiation node, for subsequent instantiation of the
!          --  body, if there is one and we are generating code for the current
!          --  unit. Mark unit as having a body (avoids premature error message).
  
!          --  We instantiate the body if we are generating code, if we are
!          --  generating cross-reference information, or if we are building
           --  trees for ASIS use or GNATprove use.
  
           declare
--- 4344,4354 ----
              end if;
           end if;
  
!          --  Save the instantiation node for a subsequent instantiation of the
!          --  body if there is one and it needs to be instantiated here.
  
!          --  We instantiate the body only if we are generating code, or if we
!          --  are generating cross-reference information, or if we are building
           --  trees for ASIS use or GNATprove use.
  
           declare
*************** package body Sem_Ch12 is
*** 4354,4367 ****
                (Unit_Requires_Body (Gen_Unit)
                  or else Enclosing_Body_Present
                  or else Present (Corresponding_Body (Gen_Decl)))
!                and then (Is_In_Main_Unit (N)
!                           or else Might_Inline_Subp (Gen_Unit))
                 and then not Is_Actual_Pack
                 and then not Inline_Now
                 and then (Operating_Mode = Generate_Code
- 
-                           --  Need comment for this check ???
- 
                            or else (Operating_Mode = Check_Semantics
                                      and then (ASIS_Mode or GNATprove_Mode)));
  
--- 4441,4450 ----
                (Unit_Requires_Body (Gen_Unit)
                  or else Enclosing_Body_Present
                  or else Present (Corresponding_Body (Gen_Decl)))
!                and then Needs_Body_Instantiated (Gen_Unit)
                 and then not Is_Actual_Pack
                 and then not Inline_Now
                 and then (Operating_Mode = Generate_Code
                            or else (Operating_Mode = Check_Semantics
                                      and then (ASIS_Mode or GNATprove_Mode)));
  
*************** package body Sem_Ch12 is
*** 4369,4377 ****
              --  marked with Inline_Always, do not instantiate body when within
              --  a generic context.
  
!             if ((Front_End_Inlining or else Has_Inline_Always)
!                   and then not Expander_Active)
!               or else Is_Generic_Unit (Cunit_Entity (Main_Unit))
              then
                 Needs_Body := False;
              end if;
--- 4452,4460 ----
              --  marked with Inline_Always, do not instantiate body when within
              --  a generic context.
  
!             if not Back_End_Inlining
!               and then (Front_End_Inlining or else Has_Inline_Always)
!               and then not Expander_Active
              then
                 Needs_Body := False;
              end if;
*************** package body Sem_Ch12 is
*** 4422,4428 ****
           --  the case of nested instances for the time being.
  
           --  When we generate a nested instance body, calling stubs for any
!          --  relevant subprogram will be be inserted immediately after the
           --  subprogram declarations, and will take precedence over the
           --  subsequent (original) body. (The stub and original body will be
           --  complete homographs, but this is permitted in an instance).
--- 4505,4511 ----
           --  the case of nested instances for the time being.
  
           --  When we generate a nested instance body, calling stubs for any
!          --  relevant subprogram will be inserted immediately after the
           --  subprogram declarations, and will take precedence over the
           --  subsequent (original) body. (The stub and original body will be
           --  complete homographs, but this is permitted in an instance).
*************** package body Sem_Ch12 is
*** 4436,4452 ****
           end if;
  
           if Needs_Body then
- 
-             --  Here is a defence against a ludicrous number of instantiations
-             --  caused by a circular set of instantiation attempts.
- 
-             if Pending_Instantiations.Last > Maximum_Instantiations then
-                Error_Msg_Uint_1 := UI_From_Int (Maximum_Instantiations);
-                Error_Msg_N ("too many instantiations, exceeds max of^", N);
-                Error_Msg_N ("\limit can be changed using -gnateinn switch", N);
-                raise Unrecoverable_Error;
-             end if;
- 
              --  Indicate that the enclosing scopes contain an instantiation,
              --  and that cleanup actions should be delayed until after the
              --  instance body is expanded.
--- 4519,4524 ----
*************** package body Sem_Ch12 is
*** 4464,4473 ****
                       if Ekind (Enclosing_Master) = E_Package then
                          if Is_Compilation_Unit (Enclosing_Master) then
                             if In_Package_Body (Enclosing_Master) then
!                               Delay_Descriptors
                                  (Body_Entity (Enclosing_Master));
                             else
!                               Delay_Descriptors
                                  (Enclosing_Master);
                             end if;
  
--- 4536,4545 ----
                       if Ekind (Enclosing_Master) = E_Package then
                          if Is_Compilation_Unit (Enclosing_Master) then
                             if In_Package_Body (Enclosing_Master) then
!                               Set_Delay_Subprogram_Descriptors
                                  (Body_Entity (Enclosing_Master));
                             else
!                               Set_Delay_Subprogram_Descriptors
                                  (Enclosing_Master);
                             end if;
  
*************** package body Sem_Ch12 is
*** 4507,4513 ****
                          end loop;
  
                          if Is_Subprogram (Enclosing_Master) then
!                            Delay_Descriptors (Enclosing_Master);
  
                          elsif Is_Task_Type (Enclosing_Master) then
                             declare
--- 4579,4585 ----
                          end loop;
  
                          if Is_Subprogram (Enclosing_Master) then
!                            Set_Delay_Subprogram_Descriptors (Enclosing_Master);
  
                          elsif Is_Task_Type (Enclosing_Master) then
                             declare
*************** package body Sem_Ch12 is
*** 4516,4522 ****
                                          (Enclosing_Master);
                             begin
                                if Present (TBP) then
!                                  Delay_Descriptors  (TBP);
                                   Set_Delay_Cleanups (TBP);
                                end if;
                             end;
--- 4588,4594 ----
                                          (Enclosing_Master);
                             begin
                                if Present (TBP) then
!                                  Set_Delay_Subprogram_Descriptors (TBP);
                                   Set_Delay_Cleanups (TBP);
                                end if;
                             end;
*************** package body Sem_Ch12 is
*** 4644,4654 ****
           --  The instantiation results in a guaranteed ABE
  
           if Is_Known_Guaranteed_ABE (N) and then Needs_Body then
- 
              --  Do not instantiate the corresponding body because gigi cannot
              --  handle certain types of premature instantiations.
  
!             Pending_Instantiations.Decrement_Last;
  
              --  Create completing bodies for all subprogram declarations since
              --  their real bodies will not be instantiated.
--- 4716,4725 ----
           --  The instantiation results in a guaranteed ABE
  
           if Is_Known_Guaranteed_ABE (N) and then Needs_Body then
              --  Do not instantiate the corresponding body because gigi cannot
              --  handle certain types of premature instantiations.
  
!             Remove_Dead_Instance (N);
  
              --  Create completing bodies for all subprogram declarations since
              --  their real bodies will not be instantiated.
*************** package body Sem_Ch12 is
*** 5156,5169 ****
       (N : Node_Id;
        K : Entity_Kind)
     is
!       Loc    : constant Source_Ptr := Sloc (N);
!       Gen_Id : constant Node_Id    := Name (N);
!       Errs   : constant Nat        := Serious_Errors_Detected;
! 
!       Anon_Id : constant Entity_Id :=
!                   Make_Defining_Identifier (Sloc (Defining_Entity (N)),
!                     Chars => New_External_Name
!                                (Chars (Defining_Entity (N)), 'R'));
  
        Act_Decl_Id : Entity_Id := Empty; -- init to avoid warning
        Act_Decl    : Node_Id;
--- 5227,5239 ----
       (N : Node_Id;
        K : Entity_Kind)
     is
!       Errs    : constant Nat        := Serious_Errors_Detected;
!       Gen_Id  : constant Node_Id    := Name (N);
!       Inst_Id : constant Entity_Id  := Defining_Entity (N);
!       Anon_Id : constant Entity_Id  :=
!                   Make_Defining_Identifier (Sloc (Inst_Id),
!                     Chars => New_External_Name (Chars (Inst_Id), 'R'));
!       Loc     : constant Source_Ptr := Sloc (N);
  
        Act_Decl_Id : Entity_Id := Empty; -- init to avoid warning
        Act_Decl    : Node_Id;
*************** package body Sem_Ch12 is
*** 5261,5270 ****
  
           Analyze (Pack_Decl);
           Check_Formal_Packages (Pack_Id);
-          Set_Is_Generic_Instance (Pack_Id, False);
- 
-          --  Why do we clear Is_Generic_Instance??? We set it 20 lines
-          --  above???
  
           --  Body of the enclosing package is supplied when instantiating the
           --  subprogram body, after semantic analysis is completed.
--- 5331,5336 ----
*************** package body Sem_Ch12 is
*** 5369,5376 ****
                    Instantiating => True),
               Name          => New_Occurrence_Of (Anon_Id, Loc));
  
!          --  The generic may be a a child unit. The renaming needs an
!          --  identifier with the proper name.
  
           Set_Defining_Unit_Name (Specification (Unit_Renaming),
              Make_Defining_Identifier (Loc, Chars (Gen_Unit)));
--- 5435,5442 ----
                    Instantiating => True),
               Name          => New_Occurrence_Of (Anon_Id, Loc));
  
!          --  The generic may be a child unit. The renaming needs an identifier
!          --  with the proper name.
  
           Set_Defining_Unit_Name (Specification (Unit_Renaming),
              Make_Defining_Identifier (Loc, Chars (Gen_Unit)));
*************** package body Sem_Ch12 is
*** 5489,5494 ****
--- 5555,5563 ----
           Error_Msg_NE ("instantiation of & within itself", N, Gen_Unit);
  
        else
+          Set_Ekind (Inst_Id, K);
+          Set_Scope (Inst_Id, Current_Scope);
+ 
           Set_Entity (Gen_Id, Gen_Unit);
           Set_Is_Instantiated (Gen_Unit);
  
*************** package body Sem_Ch12 is
*** 5654,5659 ****
--- 5723,5738 ----
           Set_Has_Pragma_Inline (Act_Decl_Id, Has_Pragma_Inline (Gen_Unit));
           Set_Has_Pragma_Inline (Anon_Id,     Has_Pragma_Inline (Gen_Unit));
  
+          Set_Has_Pragma_Inline_Always
+            (Act_Decl_Id, Has_Pragma_Inline_Always (Gen_Unit));
+          Set_Has_Pragma_Inline_Always
+            (Anon_Id,     Has_Pragma_Inline_Always (Gen_Unit));
+ 
+          Set_Has_Pragma_No_Inline
+            (Act_Decl_Id, Has_Pragma_No_Inline (Gen_Unit));
+          Set_Has_Pragma_No_Inline
+            (Anon_Id,     Has_Pragma_No_Inline (Gen_Unit));
+ 
           --  Propagate No_Return if pragma applied to generic unit. This must
           --  be done explicitly because pragma does not appear in generic
           --  declaration (unlike the aspect case).
*************** package body Sem_Ch12 is
*** 5663,5673 ****
              Set_No_Return (Anon_Id);
           end if;
  
-          Set_Has_Pragma_Inline_Always
-            (Act_Decl_Id, Has_Pragma_Inline_Always (Gen_Unit));
-          Set_Has_Pragma_Inline_Always
-            (Anon_Id,     Has_Pragma_Inline_Always (Gen_Unit));
- 
           --  Mark both the instance spec and the anonymous package in case the
           --  body is instantiated at a later pass. This preserves the original
           --  context in effect for the body.
--- 5742,5747 ----
*************** package body Sem_Ch12 is
*** 5970,5976 ****
              Make_Parameter_Specification (Loc,
                 Defining_Identifier => F1,
                 Parameter_Type      => New_Occurrence_Of (Op_Type, Loc))),
!           Result_Definition        =>  New_Occurrence_Of (Ret_Type, Loc));
  
        if Is_Binary then
           Append_To (Parameter_Specifications (Spec),
--- 6044,6050 ----
              Make_Parameter_Specification (Loc,
                 Defining_Identifier => F1,
                 Parameter_Type      => New_Occurrence_Of (Op_Type, Loc))),
!           Result_Definition        => New_Occurrence_Of (Ret_Type, Loc));
  
        if Is_Binary then
           Append_To (Parameter_Specifications (Spec),
*************** package body Sem_Ch12 is
*** 6190,6195 ****
--- 6264,6275 ----
        --  Common error routine for mismatch between the parameters of the
        --  actual instance and those of the formal package.
  
+       function Is_Defaulted (Param : Entity_Id) return Boolean;
+       --  If the formal package has partly box-initialized formals, skip
+       --  conformance check for these formals. Previously the code assumed
+       --  that box initialization for a formal package applied to all its
+       --  formal parameters.
+ 
        function Same_Instantiated_Constant (E1, E2 : Entity_Id) return Boolean;
        --  The formal may come from a nested formal package, and the actual may
        --  have been constant-folded. To determine whether the two denote the
*************** package body Sem_Ch12 is
*** 6240,6245 ****
--- 6320,6353 ----
           end if;
        end Check_Mismatch;
  
+       ------------------
+       -- Is_Defaulted --
+       ------------------
+ 
+       function Is_Defaulted (Param : Entity_Id) return Boolean is
+          Assoc : Node_Id;
+ 
+       begin
+          Assoc :=
+             First (Generic_Associations (Parent
+               (Associated_Formal_Package (Actual_Pack))));
+ 
+          while Present (Assoc) loop
+             if Nkind (Assoc) = N_Others_Choice then
+                return True;
+ 
+             elsif Nkind (Assoc) = N_Generic_Association
+               and then Chars (Selector_Name (Assoc)) = Chars (Param)
+             then
+                return Box_Present (Assoc);
+             end if;
+ 
+             Next (Assoc);
+          end loop;
+ 
+          return False;
+       end Is_Defaulted;
+ 
        --------------------------------
        -- Same_Instantiated_Constant --
        --------------------------------
*************** package body Sem_Ch12 is
*** 6409,6414 ****
--- 6517,6525 ----
           then
              goto Next_E;
  
+          elsif Is_Defaulted (E1) then
+             goto Next_E;
+ 
           elsif Is_Type (E1) then
  
              --  Subtypes must statically match. E1, E2 are the local entities
*************** package body Sem_Ch12 is
*** 6588,6596 ****
                 Formal_Decl := Parent (Associated_Formal_Package (E));
  
                 --  Nothing to check if the formal has a box or an others_clause
!                --  (necessarily with a box).
  
!                if Box_Present (Formal_Decl) then
                    null;
  
                 elsif Nkind (First (Generic_Associations (Formal_Decl))) =
--- 6699,6709 ----
                 Formal_Decl := Parent (Associated_Formal_Package (E));
  
                 --  Nothing to check if the formal has a box or an others_clause
!                --  (necessarily with a box), or no associations altogether
  
!                if Box_Present (Formal_Decl)
!                  or else No (Generic_Associations (Formal_Decl))
!                then
                    null;
  
                 elsif Nkind (First (Generic_Associations (Formal_Decl))) =
*************** package body Sem_Ch12 is
*** 6754,6760 ****
                 Check_Private_View (Subtype_Indication (Parent (E)));
              end if;
  
!             Set_Is_Generic_Actual_Type (E, True);
              Set_Is_Hidden (E, False);
              Set_Is_Potentially_Use_Visible (E, In_Use (Instance));
  
--- 6867,6878 ----
                 Check_Private_View (Subtype_Indication (Parent (E)));
              end if;
  
!             Set_Is_Generic_Actual_Type (E);
! 
!             if Is_Private_Type (E) and then Present (Full_View (E)) then
!                Set_Is_Generic_Actual_Type (Full_View (E));
!             end if;
! 
              Set_Is_Hidden (E, False);
              Set_Is_Potentially_Use_Visible (E, In_Use (Instance));
  
*************** package body Sem_Ch12 is
*** 7402,7407 ****
--- 7520,7530 ----
                 end loop;
              end;
  
+          --  The following case does not test Has_Private_View (N) so it may
+          --  end up switching views when they are not supposed to be switched.
+          --  This might be in keeping with Set_Global_Type setting the flag
+          --  for an array type even if it is not private ???
+ 
           elsif Is_Private_Type (T)
             and then Present (Full_View (T))
             and then Is_Array_Type (Full_View (T))
*************** package body Sem_Ch12 is
*** 8873,8882 ****
              Decl := Unit_Declaration_Node (Corresponding_Body (Decl));
           end if;
  
!          if Nkind_In (Original_Node (Decl), N_Function_Instantiation,
!                                             N_Package_Instantiation,
!                                             N_Procedure_Instantiation)
!          then
              return Original_Node (Decl);
           else
              return Unit (Parent (Decl));
--- 8996,9002 ----
              Decl := Unit_Declaration_Node (Corresponding_Body (Decl));
           end if;
  
!          if Nkind (Original_Node (Decl)) in N_Generic_Instantiation then
              return Original_Node (Decl);
           else
              return Unit (Parent (Decl));
*************** package body Sem_Ch12 is
*** 10240,10247 ****
     begin
        Analyze (Actual);
  
        if not Is_Entity_Name (Actual)
!         or else Ekind (Entity (Actual)) /= E_Package
        then
           Error_Msg_N
             ("expect package instance to instantiate formal", Actual);
--- 10360,10370 ----
     begin
        Analyze (Actual);
  
+       --  The actual must be a package instance, or else a current instance
+       --  such as a parent generic within the body of a generic child.
+ 
        if not Is_Entity_Name (Actual)
!         or else not Ekind_In (Entity (Actual), E_Generic_Package, E_Package)
        then
           Error_Msg_N
             ("expect package instance to instantiate formal", Actual);
*************** package body Sem_Ch12 is
*** 10280,10287 ****
                ("previous error in declaration of formal package", Actual);
              Abandon_Instantiation (Actual);
  
!          elsif
!            Is_Instance_Of (Parent_Spec, Get_Instance_Of (Gen_Parent))
           then
              null;
  
--- 10403,10416 ----
                ("previous error in declaration of formal package", Actual);
              Abandon_Instantiation (Actual);
  
!          elsif Is_Instance_Of (Parent_Spec, Get_Instance_Of (Gen_Parent)) then
!             null;
! 
!          --  If this is the current instance of an enclosing generic, that unit
!          --  is the generic package we need.
! 
!          elsif In_Open_Scopes (Actual_Pack)
!            and then Ekind (Actual_Pack) = E_Generic_Package
           then
              null;
  
*************** package body Sem_Ch12 is
*** 10343,10349 ****
  
              Actual_Ent := First_Entity (Actual_Pack);
              Actual_Of_Formal :=
!                First (Visible_Declarations (Specification (Analyzed_Formal)));
              while Present (Actual_Ent)
                and then Actual_Ent /= First_Private_Entity (Actual_Pack)
              loop
--- 10472,10478 ----
  
              Actual_Ent := First_Entity (Actual_Pack);
              Actual_Of_Formal :=
!               First (Visible_Declarations (Specification (Analyzed_Formal)));
              while Present (Actual_Ent)
                and then Actual_Ent /= First_Private_Entity (Actual_Pack)
              loop
*************** package body Sem_Ch12 is
*** 10418,10423 ****
--- 10547,10563 ----
  
                 Next_Entity (Actual_Ent);
              end loop;
+ 
+             --  No conformance to check if the generic has no formal parameters
+             --  and the formal package has no generic associations.
+ 
+             if Is_Empty_List (Formals)
+               and then
+                 (Box_Present (Formal)
+                    or else No (Generic_Associations (Formal)))
+             then
+                return Decls;
+             end if;
           end;
  
           --  If the formal is not declared with a box, reanalyze it as an
*************** package body Sem_Ch12 is
*** 10975,10993 ****
  
           Note_Possible_Modification (Actual, Sure => True);
  
!          --  Check for instantiation of atomic/volatile actual for
!          --  non-atomic/volatile formal (RM C.6 (12)).
  
           if Is_Atomic_Object (Actual) and then not Is_Atomic (Orig_Ftyp) then
!             Error_Msg_N
!               ("cannot instantiate non-atomic formal object "
!                & "with atomic actual", Actual);
  
           elsif Is_Volatile_Object (Actual) and then not Is_Volatile (Orig_Ftyp)
           then
              Error_Msg_N
!               ("cannot instantiate non-volatile formal object "
!                & "with volatile actual", Actual);
           end if;
  
        --  Formal in-parameter
--- 11115,11150 ----
  
           Note_Possible_Modification (Actual, Sure => True);
  
!          --  Check for instantiation with atomic/volatile object actual for
!          --  nonatomic/nonvolatile formal (RM C.6 (12)).
  
           if Is_Atomic_Object (Actual) and then not Is_Atomic (Orig_Ftyp) then
!             Error_Msg_NE
!               ("cannot instantiate nonatomic formal & of mode in out",
!                Actual, Gen_Obj);
!             Error_Msg_N ("\with atomic object actual (RM C.6(12))", Actual);
  
           elsif Is_Volatile_Object (Actual) and then not Is_Volatile (Orig_Ftyp)
           then
+             Error_Msg_NE
+               ("cannot instantiate nonvolatile formal & of mode in out",
+                Actual, Gen_Obj);
+             Error_Msg_N ("\with volatile object actual (RM C.6(12))", Actual);
+          end if;
+ 
+          --  Check for instantiation on nonatomic subcomponent of an atomic
+          --  object in Ada 2020 (RM C.6 (13)).
+ 
+          if Ada_Version >= Ada_2020
+             and then Is_Subcomponent_Of_Atomic_Object (Actual)
+             and then not Is_Atomic_Object (Actual)
+          then
+             Error_Msg_NE
+               ("cannot instantiate formal & of mode in out with actual",
+                Actual, Gen_Obj);
              Error_Msg_N
!               ("\nonatomic subcomponent of atomic object (RM C.6(13))",
!                Actual);
           end if;
  
        --  Formal in-parameter
*************** package body Sem_Ch12 is
*** 11349,11354 ****
--- 11506,11573 ----
           else
              Load_Parent_Of_Generic
                (Inst_Node, Specification (Gen_Decl), Body_Optional);
+ 
+             --  Surprisingly enough, loading the body of the parent can cause
+             --  the body to be instantiated and the double instantiation needs
+             --  to be prevented in order to avoid giving bogus semantic errors.
+ 
+             --  This case can occur because of the Collect_Previous_Instances
+             --  machinery of Load_Parent_Of_Generic, which will instantiate
+             --  bodies that are deemed to be ahead of the body of the parent
+             --  in the compilation unit. But the relative position of these
+             --  bodies is computed using the mere comparison of their Sloc.
+ 
+             --  Now suppose that you have two generic packages G and H, with
+             --  G containing a mere instantiation of H:
+ 
+             --    generic
+             --    package H is
+ 
+             --      generic
+             --      package Nested_G is
+             --         ...
+             --      end Nested_G;
+ 
+             --    end H;
+ 
+             --    with H;
+ 
+             --    generic
+             --    package G is
+ 
+             --      package My_H is new H;
+ 
+             --    end G;
+ 
+             --  and a third package Q instantiating G and Nested_G:
+ 
+             --    with G;
+ 
+             --    package Q is
+ 
+             --      package My_G is new G;
+ 
+             --      package My_Nested_G is new My_G.My_H.Nested_G;
+ 
+             --    end Q;
+ 
+             --  The body to be instantiated is that of My_Nested_G and its
+             --  parent is the instance My_G.My_H. This latter instantiation
+             --  is done when My_G is analyzed, i.e. after the declarations
+             --  of My_G and My_Nested_G have been parsed; as a result, the
+             --  Sloc of My_G.My_H is greater than the Sloc of My_Nested_G.
+ 
+             --  Therefore loading the body of My_G.My_H will cause the body
+             --  of My_Nested_G to be instantiated because it is deemed to be
+             --  ahead of My_G.My_H. This means that Load_Parent_Of_Generic
+             --  will again be invoked on My_G.My_H, but this time with the
+             --  Collect_Previous_Instances machinery disabled, so there is
+             --  no endless mutual recursion and things are done in order.
+ 
+             if Present (Corresponding_Body (Instance_Spec (Inst_Node))) then
+                goto Leave;
+             end if;
+ 
              Gen_Body_Id := Corresponding_Body (Gen_Decl);
           end if;
        end if;
*************** package body Sem_Ch12 is
*** 11510,11534 ****
              --  indicate that the body instance is to be delayed.
  
              Install_Body (Act_Body, Inst_Node, Gen_Body, Gen_Decl);
! 
!             --  Now analyze the body. We turn off all checks if this is an
!             --  internal unit, since there is no reason to have checks on for
!             --  any predefined run-time library code. All such code is designed
!             --  to be compiled with checks off.
! 
!             --  Note that we do NOT apply this criterion to children of GNAT
!             --  The latter units must suppress checks explicitly if needed.
! 
!             --  We also do not suppress checks in CodePeer mode where we are
!             --  interested in finding possible runtime errors.
! 
!             if not CodePeer_Mode
!               and then In_Predefined_Unit (Gen_Decl)
!             then
!                Analyze (Act_Body, Suppress => All_Checks);
!             else
!                Analyze (Act_Body);
!             end if;
           end if;
  
           Inherit_Context (Gen_Body, Inst_Node);
--- 11729,11735 ----
              --  indicate that the body instance is to be delayed.
  
              Install_Body (Act_Body, Inst_Node, Gen_Body, Gen_Decl);
!             Analyze (Act_Body);
           end if;
  
           Inherit_Context (Gen_Body, Inst_Node);
*************** package body Sem_Ch12 is
*** 11981,11986 ****
--- 12182,12191 ----
        Loc        : Source_Ptr;
        Subt       : Entity_Id;
  
+       procedure Check_Shared_Variable_Control_Aspects;
+       --  Ada_2020: Verify that shared variable control aspects (RM C.6)
+       --  that may be specified for a formal type are obeyed by the actual.
+ 
        procedure Diagnose_Predicated_Actual;
        --  There are a number of constructs in which a discrete type with
        --  predicates is illegal, e.g. as an index in an array type declaration.
*************** package body Sem_Ch12 is
*** 12005,12010 ****
--- 12210,12288 ----
        --  Check that base types are the same and that the subtypes match
        --  statically. Used in several of the above.
  
+       --------------------------------------------
+       --  Check_Shared_Variable_Control_Aspects --
+       --------------------------------------------
+ 
+       --  Ada_2020: Verify that shared variable control aspects (RM C.6)
+       --  that may be specified for the formal are obeyed by the actual.
+ 
+       procedure Check_Shared_Variable_Control_Aspects is
+       begin
+          if Ada_Version >= Ada_2020 then
+             if Is_Atomic (A_Gen_T) and then not Is_Atomic (Act_T) then
+                Error_Msg_NE
+                   ("actual for& must be an atomic type", Actual, A_Gen_T);
+             end if;
+ 
+             if Is_Volatile (A_Gen_T) and then not Is_Volatile (Act_T) then
+                Error_Msg_NE
+                   ("actual for& must be a Volatile type", Actual, A_Gen_T);
+             end if;
+ 
+             if
+               Is_Independent (A_Gen_T) and then not Is_Independent (Act_T)
+             then
+                Error_Msg_NE
+                  ("actual for& must be an Independent type", Actual, A_Gen_T);
+             end if;
+ 
+             --  We assume that an array type whose atomic component type
+             --  is Atomic is equivalent to an array type with the explicit
+             --  aspect Has_Atomic_Components. This is a reasonable inference
+             --  from the intent of AI12-0282, and makes it legal to use an
+             --  actual that does not have the identical aspect as the formal.
+ 
+             if Has_Atomic_Components (A_Gen_T)
+                and then not Has_Atomic_Components (Act_T)
+             then
+                if Is_Array_Type (Act_T)
+                  and then Is_Atomic (Component_Type (Act_T))
+                then
+                   null;
+ 
+                else
+                   Error_Msg_NE
+                     ("actual for& must have atomic components",
+                        Actual, A_Gen_T);
+                end if;
+             end if;
+ 
+             if Has_Independent_Components (A_Gen_T)
+                and then not Has_Independent_Components (Act_T)
+             then
+                Error_Msg_NE
+                  ("actual for& must have independent components",
+                     Actual, A_Gen_T);
+             end if;
+ 
+             if Has_Volatile_Components (A_Gen_T)
+                and then not Has_Volatile_Components (Act_T)
+             then
+                if Is_Array_Type (Act_T)
+                  and then Is_Volatile (Component_Type (Act_T))
+                then
+                   null;
+ 
+                else
+                   Error_Msg_NE
+                     ("actual for& must have volatile components",
+                        Actual, A_Gen_T);
+                end if;
+             end if;
+          end if;
+       end Check_Shared_Variable_Control_Aspects;
+ 
        ---------------------------------
        --  Diagnose_Predicated_Actual --
        ---------------------------------
*************** package body Sem_Ch12 is
*** 12106,12111 ****
--- 12384,12395 ----
              Error_Msg_NE
                ("actual for formal & must have convention %", Actual, Gen_T);
           end if;
+ 
+          if Can_Never_Be_Null (A_Gen_T) /= Can_Never_Be_Null (Act_T) then
+             Error_Msg_NE
+                ("non null exclusion of actual and formal & do not match",
+                Actual, Gen_T);
+          end if;
        end Validate_Access_Subprogram_Instance;
  
        -----------------------------------
*************** package body Sem_Ch12 is
*** 12617,12628 ****
           --  Perform atomic/volatile checks (RM C.6(12)). Note that AI05-0218-1
           --  removes the second instance of the phrase "or allow pass by copy".
  
!          if Is_Atomic (Act_T) and then not Is_Atomic (Ancestor) then
              Error_Msg_N
                ("cannot have atomic actual type for non-atomic formal type",
                 Actual);
  
!          elsif Is_Volatile (Act_T) and then not Is_Volatile (Ancestor) then
              Error_Msg_N
                ("cannot have volatile actual type for non-volatile formal type",
                 Actual);
--- 12901,12921 ----
           --  Perform atomic/volatile checks (RM C.6(12)). Note that AI05-0218-1
           --  removes the second instance of the phrase "or allow pass by copy".
  
!          --  In Ada_2020 the aspect may be specified explicitly for the formal
!          --  regardless of whether an ancestor obeys it.
! 
!          if Is_Atomic (Act_T)
!              and then not Is_Atomic (Ancestor)
!              and then not Is_Atomic (A_Gen_T)
!          then
              Error_Msg_N
                ("cannot have atomic actual type for non-atomic formal type",
                 Actual);
  
!          elsif Is_Volatile (Act_T)
!            and then not Is_Volatile (Ancestor)
!            and then not Is_Volatile (A_Gen_T)
!          then
              Error_Msg_N
                ("cannot have volatile actual type for non-volatile formal type",
                 Actual);
*************** package body Sem_Ch12 is
*** 12986,12991 ****
--- 13279,13313 ----
                 Abandon_Instantiation (Actual);
              end if;
           end if;
+ 
+          --  Don't check Ada_Version here (for now) because AI12-0036 is
+          --  a binding interpretation; this decision may be reversed if
+          --  the situation turns out to be similar to that of the preceding
+          --  Is_Limited_Type test (see preceding comment).
+ 
+          declare
+             Formal_Is_Private_Extension : constant Boolean :=
+               Nkind (Parent (A_Gen_T)) = N_Private_Extension_Declaration;
+ 
+             Actual_Is_Tagged : constant Boolean := Is_Tagged_Type (Act_T);
+          begin
+             if Actual_Is_Tagged /= Formal_Is_Private_Extension then
+                if In_Instance then
+                   null;
+                else
+                   if Actual_Is_Tagged then
+                      Error_Msg_NE
+                        ("actual for & cannot be a tagged type",
+                         Actual, Gen_T);
+                   else
+                      Error_Msg_NE
+                        ("actual for & must be a tagged type",
+                         Actual, Gen_T);
+                   end if;
+                   Abandon_Instantiation (Actual);
+                end if;
+             end if;
+          end;
        end Validate_Derived_Type_Instance;
  
        ----------------------------------------
*************** package body Sem_Ch12 is
*** 13272,13277 ****
--- 13594,13601 ----
           end if;
        end if;
  
+       Check_Shared_Variable_Control_Aspects;
+ 
        if Error_Posted (Act_T) then
           null;
        else
*************** package body Sem_Ch12 is
*** 13620,13634 ****
                and then
                  Nkind (Original_Node (True_Parent)) = N_Package_Instantiation
              then
!                --  Parent is a compilation unit that is an instantiation.
!                --  Instantiation node has been replaced with package decl.
  
                 Inst_Node := Original_Node (True_Parent);
                 exit;
  
              elsif Nkind (True_Parent) = N_Package_Declaration
!               and then Present (Generic_Parent (Specification (True_Parent)))
                and then Nkind (Parent (True_Parent)) /= N_Compilation_Unit
              then
                 --  Parent is an instantiation within another specification.
                 --  Declaration for instance has been inserted before original
--- 13944,13969 ----
                and then
                  Nkind (Original_Node (True_Parent)) = N_Package_Instantiation
              then
!                --  Parent is a compilation unit that is an instantiation, and
!                --  instantiation node has been replaced with package decl.
  
                 Inst_Node := Original_Node (True_Parent);
                 exit;
  
              elsif Nkind (True_Parent) = N_Package_Declaration
!              and then Nkind (Parent (True_Parent)) = N_Compilation_Unit
!              and then
!                Nkind (Unit (Parent (True_Parent))) = N_Package_Instantiation
!             then
!                --  Parent is a compilation unit that is an instantiation, but
!                --  instantiation node has not been replaced with package decl.
! 
!                Inst_Node := Unit (Parent (True_Parent));
!                exit;
! 
!             elsif Nkind (True_Parent) = N_Package_Declaration
                and then Nkind (Parent (True_Parent)) /= N_Compilation_Unit
+               and then Present (Generic_Parent (Specification (True_Parent)))
              then
                 --  Parent is an instantiation within another specification.
                 --  Declaration for instance has been inserted before original
*************** package body Sem_Ch12 is
*** 14034,14042 ****
     ------------------------
  
     procedure Preanalyze_Actuals (N : Node_Id; Inst : Entity_Id := Empty) is
        Assoc : Node_Id;
        Act   : Node_Id;
-       Errs  : constant Nat := Serious_Errors_Detected;
  
        Cur : Entity_Id := Empty;
        --  Current homograph of the instance name
--- 14369,14401 ----
     ------------------------
  
     procedure Preanalyze_Actuals (N : Node_Id; Inst : Entity_Id := Empty) is
+       procedure Perform_Appropriate_Analysis (N : Node_Id);
+       --  Determine if the actuals we are analyzing come from a generic
+       --  instantiation that is a library unit and dispatch accordingly.
+ 
+       ----------------------------------
+       -- Perform_Appropriate_Analysis --
+       ----------------------------------
+ 
+       procedure Perform_Appropriate_Analysis (N : Node_Id) is
+       begin
+          --  When we have a library instantiation we cannot allow any expansion
+          --  to occur, since there may be no place to put it. Instead, in that
+          --  case we perform a preanalysis of the actual.
+ 
+          if Present (Inst) and then Is_Compilation_Unit (Inst) then
+             Preanalyze (N);
+          else
+             Analyze (N);
+          end if;
+       end Perform_Appropriate_Analysis;
+ 
+       --  Local variables
+ 
+       Errs : constant Nat := Serious_Errors_Detected;
+ 
        Assoc : Node_Id;
        Act   : Node_Id;
  
        Cur : Entity_Id := Empty;
        --  Current homograph of the instance name
*************** package body Sem_Ch12 is
*** 14044,14049 ****
--- 14403,14410 ----
        Vis : Boolean := False;
        --  Saved visibility status of the current homograph
  
+    --  Start of processing for Preanalyze_Actuals
+ 
     begin
        Assoc := First (Generic_Associations (N));
  
*************** package body Sem_Ch12 is
*** 14085,14094 ****
                 null;
  
              elsif Nkind (Act) = N_Attribute_Reference then
!                Analyze (Prefix (Act));
  
              elsif Nkind (Act) = N_Explicit_Dereference then
!                Analyze (Prefix (Act));
  
              elsif Nkind (Act) = N_Allocator then
                 declare
--- 14446,14455 ----
                 null;
  
              elsif Nkind (Act) = N_Attribute_Reference then
!                Perform_Appropriate_Analysis (Prefix (Act));
  
              elsif Nkind (Act) = N_Explicit_Dereference then
!                Perform_Appropriate_Analysis (Prefix (Act));
  
              elsif Nkind (Act) = N_Allocator then
                 declare
*************** package body Sem_Ch12 is
*** 14096,14102 ****
  
                 begin
                    if Nkind (Expr) = N_Subtype_Indication then
!                      Analyze (Subtype_Mark (Expr));
  
                       --  Analyze separately each discriminant constraint, when
                       --  given with a named association.
--- 14457,14463 ----
  
                 begin
                    if Nkind (Expr) = N_Subtype_Indication then
!                      Perform_Appropriate_Analysis (Subtype_Mark (Expr));
  
                       --  Analyze separately each discriminant constraint, when
                       --  given with a named association.
*************** package body Sem_Ch12 is
*** 14108,14116 ****
                          Constr := First (Constraints (Constraint (Expr)));
                          while Present (Constr) loop
                             if Nkind (Constr) = N_Discriminant_Association then
!                               Analyze (Expression (Constr));
                             else
!                               Analyze (Constr);
                             end if;
  
                             Next (Constr);
--- 14469,14478 ----
                          Constr := First (Constraints (Constraint (Expr)));
                          while Present (Constr) loop
                             if Nkind (Constr) = N_Discriminant_Association then
!                               Perform_Appropriate_Analysis
!                                 (Expression (Constr));
                             else
!                               Perform_Appropriate_Analysis (Constr);
                             end if;
  
                             Next (Constr);
*************** package body Sem_Ch12 is
*** 14118,14129 ****
                       end;
  
                    else
!                      Analyze (Expr);
                    end if;
                 end;
  
              elsif Nkind (Act) /= N_Operator_Symbol then
!                Analyze (Act);
  
                 --  Within a package instance, mark actuals that are limited
                 --  views, so their use can be moved to the body of the
--- 14480,14491 ----
                       end;
  
                    else
!                      Perform_Appropriate_Analysis (Expr);
                    end if;
                 end;
  
              elsif Nkind (Act) /= N_Operator_Symbol then
!                Perform_Appropriate_Analysis (Act);
  
                 --  Within a package instance, mark actuals that are limited
                 --  views, so their use can be moved to the body of the
*************** package body Sem_Ch12 is
*** 14144,14150 ****
                 --  warnings complaining about the generic being unreferenced,
                 --  before abandoning the instantiation.
  
!                Analyze (Name (N));
  
                 if Is_Entity_Name (Name (N))
                   and then Etype (Name (N)) /= Any_Type
--- 14506,14512 ----
                 --  warnings complaining about the generic being unreferenced,
                 --  before abandoning the instantiation.
  
!                Perform_Appropriate_Analysis (Name (N));
  
                 if Is_Entity_Name (Name (N))
                   and then Etype (Name (N)) /= Any_Type
*************** package body Sem_Ch12 is
*** 14524,14529 ****
--- 14886,14903 ----
                 null;
              else
                 Set_Is_Generic_Actual_Type (E, False);
+ 
+                --  It might seem reasonable to clear the Is_Generic_Actual_Type
+                --  flag also on the Full_View if the type is private, since it
+                --  was set also on this Full_View. However, this flag is relied
+                --  upon by Covers to spot "types exported from instantiations"
+                --  which are implicit Full_Views built for instantiations made
+                --  on private types and we get type mismatches if we do it when
+                --  the block exchanging the declarations below triggers ???
+ 
+                --  if Is_Private_Type (E) and then Present (Full_View (E)) then
+                --    Set_Is_Generic_Actual_Type (Full_View (E), False);
+                --  end if;
              end if;
  
              --  An unusual case of aliasing: the actual may also be directly
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch12.ads gcc-10.1.0/gcc/ada/sem_ch12.ads
*** gcc-9.3.0/gcc/ada/sem_ch12.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch12.ads	Thu May  7 10:49:59 2020
*************** package Sem_Ch12 is
*** 37,46 ****
     procedure Analyze_Formal_Subprogram_Declaration      (N : Node_Id);
     procedure Analyze_Formal_Package_Declaration         (N : Node_Id);
  
-    procedure Add_Pending_Instantiation (Inst : Node_Id; Act_Decl : Node_Id);
-    --  Add an entry in the table of instance bodies that must be analyzed
-    --  when inlining requires its body or the body of a nested instance.
- 
     function Build_Function_Wrapper
       (Formal_Subp : Entity_Id;
        Actual_Subp : Entity_Id) return Node_Id;
--- 37,42 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch13.adb gcc-10.1.0/gcc/ada/sem_ch13.adb
*** gcc-9.3.0/gcc/ada/sem_ch13.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch13.adb	Thu May  7 10:49:59 2020
*************** with Debug;    use Debug;
*** 30,36 ****
  with Einfo;    use Einfo;
  with Elists;   use Elists;
  with Errout;   use Errout;
- with Expander; use Expander;
  with Exp_Disp; use Exp_Disp;
  with Exp_Tss;  use Exp_Tss;
  with Exp_Util; use Exp_Util;
--- 30,35 ----
*************** package body Sem_Ch13 is
*** 155,160 ****
--- 154,163 ----
     --  that do not specify a representation characteristic are operational
     --  attributes.
  
+    function Is_Type_Related_Rep_Item (N : Node_Id) return Boolean;
+    --  Returns True for a representation clause/pragma that specifies a
+    --  type-related representation (as opposed to operational) aspect.
+ 
     function Is_Predicate_Static
       (Expr : Node_Id;
        Nam  : Name_Id) return Boolean;
*************** package body Sem_Ch13 is
*** 247,287 ****
     --  Remove visibility to the discriminants of type entity E and pop the
     --  scope stack if E has discriminants and is not a subtype.
  
-    ---------------------------------------------------
-    -- Table for Validate_Compile_Time_Warning_Error --
-    ---------------------------------------------------
- 
-    --  The following table collects pragmas Compile_Time_Error and Compile_
-    --  Time_Warning for validation. Entries are made by calls to subprogram
-    --  Validate_Compile_Time_Warning_Error, and the call to the procedure
-    --  Validate_Compile_Time_Warning_Errors does the actual error checking
-    --  and posting of warning and error messages. The reason for this delayed
-    --  processing is to take advantage of back-annotations of attributes size
-    --  and alignment values performed by the back end.
- 
-    --  Note: the reason we store a Source_Ptr value instead of a Node_Id is
-    --  that by the time Validate_Unchecked_Conversions is called, Sprint will
-    --  already have modified all Sloc values if the -gnatD option is set.
- 
-    type CTWE_Entry is record
-       Eloc  : Source_Ptr;
-       --  Source location used in warnings and error messages
- 
-       Prag  : Node_Id;
-       --  Pragma Compile_Time_Error or Compile_Time_Warning
- 
-       Scope : Node_Id;
-       --  The scope which encloses the pragma
-    end record;
- 
-    package Compile_Time_Warnings_Errors is new Table.Table (
-      Table_Component_Type => CTWE_Entry,
-      Table_Index_Type     => Int,
-      Table_Low_Bound      => 1,
-      Table_Initial        => 50,
-      Table_Increment      => 200,
-      Table_Name           => "Compile_Time_Warnings_Errors");
- 
     ----------------------------------------------
     -- Table for Validate_Unchecked_Conversions --
     ----------------------------------------------
--- 250,255 ----
*************** package body Sem_Ch13 is
*** 396,406 ****
        Num_CC : Natural;
  
     begin
!       --  Processing here used to depend on Ada version: the behavior was
!       --  changed by AI95-0133. However this AI is a Binding interpretation,
!       --  so we now implement it even in Ada 95 mode. The original behavior
!       --  from unamended Ada 95 is still available for compatibility under
!       --  debugging switch -gnatd.
  
        if Ada_Version < Ada_2005 and then Debug_Flag_Dot_P then
           Adjust_Record_For_Reverse_Bit_Order_Ada_95 (R);
--- 364,374 ----
        Num_CC : Natural;
  
     begin
!       --  The processing done here used to depend on the Ada version, but the
!       --  behavior has been changed by AI95-0133. However this AI is a Binding
!       --  Interpretation, so we now implement it even in Ada 95 mode. But the
!       --  original behavior from unamended Ada 95 is available for the sake of
!       --  compatibility under the debugging switch -gnatd.p in Ada 95 mode.
  
        if Ada_Version < Ada_2005 and then Debug_Flag_Dot_P then
           Adjust_Record_For_Reverse_Bit_Order_Ada_95 (R);
*************** package body Sem_Ch13 is
*** 412,417 ****
--- 380,390 ----
        --  same byte offset and processing them together. Same approach is still
        --  valid in later versions including Ada 2012.
  
+       --  Note that component clauses found on record types may be inherited,
+       --  in which case the layout of the component with such a clause still
+       --  has to be done at this point. Therefore, the processing done here
+       --  must exclusively rely on the Component_Clause of the component.
+ 
        --  This first loop through components does two things. First it deals
        --  with the case of components with component clauses whose length is
        --  greater than the maximum machine scalar size (either accepting them
*************** package body Sem_Ch13 is
*** 652,664 ****
                    Comp : constant Entity_Id := Comps (C);
                    CC   : constant Node_Id   := Component_Clause (Comp);
  
                    LB   : constant Uint := Static_Integer (Last_Bit (CC));
!                   NFB  : constant Uint := MSS - Uint_1 - LB;
!                   NLB  : constant Uint := NFB + Esize (Comp) - 1;
                    Pos  : constant Uint := Static_Integer (Position (CC));
  
                 begin
!                   if Warn_On_Reverse_Bit_Order then
                       Error_Msg_Uint_1 := MSS;
                       Error_Msg_N
                         ("info: reverse bit order in machine scalar of "
--- 625,643 ----
                    Comp : constant Entity_Id := Comps (C);
                    CC   : constant Node_Id   := Component_Clause (Comp);
  
+                   FB   : constant Uint := Static_Integer (First_Bit (CC));
                    LB   : constant Uint := Static_Integer (Last_Bit (CC));
!                   NFB  : constant Uint := MSS - 1 - LB;
!                   NLB  : constant Uint := NFB + LB - FB;
                    Pos  : constant Uint := Static_Integer (Position (CC));
  
                 begin
!                   --  Do not warn for the artificial clause built for the tag
!                   --  in Check_Record_Representation_Clause if it is inherited.
! 
!                   if Warn_On_Reverse_Bit_Order
!                     and then Chars (Comp) /= Name_uTag
!                   then
                       Error_Msg_Uint_1 := MSS;
                       Error_Msg_N
                         ("info: reverse bit order in machine scalar of "
*************** package body Sem_Ch13 is
*** 678,685 ****
                    end if;
  
                    Set_Component_Bit_Offset (Comp, Pos * SSU + NFB);
!                   Set_Normalized_Position  (Comp, Pos + NFB / SSU);
                    Set_Normalized_First_Bit (Comp, NFB mod SSU);
                 end;
              end loop;
           end loop;
--- 657,665 ----
                    end if;
  
                    Set_Component_Bit_Offset (Comp, Pos * SSU + NFB);
!                   Set_Esize                (Comp, 1 + (NLB - NFB));
                    Set_Normalized_First_Bit (Comp, NFB mod SSU);
+                   Set_Normalized_Position  (Comp, Pos + NFB / SSU);
                 end;
              end loop;
           end loop;
*************** package body Sem_Ch13 is
*** 794,801 ****
                    --     1 .. 4       3 .. 6         1         3
                    --     4 .. 7       0 .. 3         4         0
  
!                   --  The rule is that the first bit is is obtained by
!                   --  subtracting the old ending bit from storage_unit - 1.
  
                    Set_Component_Bit_Offset (Comp,
                      (Storage_Unit_Offset * System_Storage_Unit) +
--- 774,781 ----
                    --     1 .. 4       3 .. 6         1         3
                    --     4 .. 7       0 .. 3         4         0
  
!                   --  The rule is that the first bit is obtained by subtracting
!                   --  the old ending bit from storage_unit - 1.
  
                    Set_Component_Bit_Offset (Comp,
                      (Storage_Unit_Offset * System_Storage_Unit) +
*************** package body Sem_Ch13 is
*** 2151,2162 ****
                       Aspect);
                 end if;
  
!                --  Not allowed for formal type declarations
  
                 if Nkind (N) = N_Formal_Type_Declaration then
!                   Error_Msg_N
!                     ("aspect % not allowed for formal type declaration",
!                      Aspect);
                 end if;
              end if;
  
--- 2131,2157 ----
                       Aspect);
                 end if;
  
!                --  Not allowed for formal type declarations in previous
!                --  versions of the language. Allowed for them only for
!                --  shared variable control aspects.
  
                 if Nkind (N) = N_Formal_Type_Declaration then
!                   if Ada_Version < Ada_2020 then
!                      Error_Msg_N
!                        ("aspect % not allowed for formal type declaration",
!                         Aspect);
! 
!                   elsif A_Id /= Aspect_Atomic
!                      and then A_Id /= Aspect_Volatile
!                      and then A_Id /= Aspect_Independent
!                      and then A_Id /= Aspect_Atomic_Components
!                      and then A_Id /= Aspect_Independent_Components
!                      and then A_Id /= Aspect_Volatile_Components
!                   then
!                      Error_Msg_N
!                        ("aspect % not allowed for formal type declaration",
!                         Aspect);
!                   end if;
                 end if;
              end if;
  
*************** package body Sem_Ch13 is
*** 2860,2866 ****
                    Insert_Pragma (Aitem);
                    goto Continue;
  
!                --  Aspect Effecitve_Reads is never delayed because it is
                 --  equivalent to a source pragma which appears after the
                 --  related object declaration.
  
--- 2855,2861 ----
                    Insert_Pragma (Aitem);
                    goto Continue;
  
!                --  Aspect Effective_Reads is never delayed because it is
                 --  equivalent to a source pragma which appears after the
                 --  related object declaration.
  
*************** package body Sem_Ch13 is
*** 3050,3055 ****
--- 3045,3063 ----
                    Insert_Pragma (Aitem);
                    goto Continue;
  
+                --  Max_Entry_Queue_Length
+ 
+                when Aspect_Max_Entry_Queue_Length =>
+                   Make_Aitem_Pragma
+                     (Pragma_Argument_Associations => New_List (
+                        Make_Pragma_Argument_Association (Loc,
+                          Expression => Relocate_Node (Expr))),
+                      Pragma_Name => Name_Max_Entry_Queue_Length);
+ 
+                   Decorate (Aspect, Aitem);
+                   Insert_Pragma (Aitem);
+                   goto Continue;
+ 
                 --  Max_Queue_Length
  
                 when Aspect_Max_Queue_Length =>
*************** package body Sem_Ch13 is
*** 3063,3068 ****
--- 3071,3091 ----
                    Insert_Pragma (Aitem);
                    goto Continue;
  
+                --  Aspect No_Caching is never delayed because it is equivalent
+                --  to a source pragma which appears after the related object
+                --  declaration.
+ 
+                when Aspect_No_Caching =>
+                   Make_Aitem_Pragma
+                     (Pragma_Argument_Associations => New_List (
+                        Make_Pragma_Argument_Association (Loc,
+                          Expression => Relocate_Node (Expr))),
+                      Pragma_Name                  => Name_No_Caching);
+ 
+                   Decorate (Aspect, Aitem);
+                   Insert_Pragma (Aitem);
+                   goto Continue;
+ 
                 --  Obsolescent
  
                 when Aspect_Obsolescent => declare
*************** package body Sem_Ch13 is
*** 3471,3481 ****
                    --  don't do this in GNATprove mode, because it brings no
                    --  benefit for proof and causes annoynace for flow analysis,
                    --  which prefers to be as close to the original source code
!                   --  as possible.
  
                    if not (ASIS_Mode or GNATprove_Mode)
                      and then (Pname = Name_Postcondition
                                 or else not Class_Present (Aspect))
                    then
                       while Nkind (Expr) = N_And_Then loop
                          Insert_After (Aspect,
--- 3494,3507 ----
                    --  don't do this in GNATprove mode, because it brings no
                    --  benefit for proof and causes annoynace for flow analysis,
                    --  which prefers to be as close to the original source code
!                   --  as possible. Also we don't do this when analyzing generic
!                   --  units since it causes spurious visibility errors in the
!                   --  preanalysis of instantiations.
  
                    if not (ASIS_Mode or GNATprove_Mode)
                      and then (Pname = Name_Postcondition
                                 or else not Class_Present (Aspect))
+                     and then not Inside_A_Generic
                    then
                       while Nkind (Expr) = N_And_Then loop
                          Insert_After (Aspect,
*************** package body Sem_Ch13 is
*** 3491,3504 ****
  
                    --  Build the precondition/postcondition pragma
  
!                   --  Add note about why we do NOT need Copy_Tree here???
  
!                   Make_Aitem_Pragma
!                     (Pragma_Argument_Associations => New_List (
!                        Make_Pragma_Argument_Association (Eloc,
!                          Chars      => Name_Check,
!                          Expression => Relocate_Node (Expr))),
!                        Pragma_Name                => Pname);
  
                    --  Add message unless exception messages are suppressed
  
--- 3517,3548 ----
  
                    --  Build the precondition/postcondition pragma
  
!                   --  We use Relocate_Node here rather than New_Copy_Tree
!                   --  because subsequent visibility analysis of the aspect
!                   --  depends on this sharing. This should be cleaned up???
  
!                   --  If the context is generic or involves ASIS, we want
!                   --  to preserve the original tree, and simply share it
!                   --  between aspect and generated attribute. This parallels
!                   --  what is done in sem_prag.adb (see Get_Argument).
! 
!                   declare
!                      New_Expr : Node_Id;
! 
!                   begin
!                      if ASIS_Mode or else Inside_A_Generic then
!                         New_Expr := Expr;
!                      else
!                         New_Expr := Relocate_Node (Expr);
!                      end if;
! 
!                      Make_Aitem_Pragma
!                        (Pragma_Argument_Associations => New_List (
!                           Make_Pragma_Argument_Association (Eloc,
!                             Chars      => Name_Check,
!                             Expression => New_Expr)),
!                           Pragma_Name                => Pname);
!                   end;
  
                    --  Add message unless exception messages are suppressed
  
*************** package body Sem_Ch13 is
*** 3766,3771 ****
--- 3810,3824 ----
                 Set_From_Aspect_Specification (Aitem);
              end if;
  
+             --  For an aspect that applies to a type, indicate whether it
+             --  appears on a partial view of the type.
+ 
+             if Is_Type (E)
+               and then Is_Private_Type (E)
+             then
+                Set_Aspect_On_Partial_View (Aspect);
+             end if;
+ 
              --  In the context of a compilation unit, we directly put the
              --  pragma in the Pragmas_After list of the N_Compilation_Unit_Aux
              --  node (no delay is required here) except for aspects on a
*************** package body Sem_Ch13 is
*** 4643,4652 ****
           end if;
  
           if not Is_Overloaded (Expr) then
!             if not Check_Primitive_Function (Entity (Expr)) then
                 Error_Msg_NE
                   ("aspect Indexing requires a function that applies to type&",
!                    Entity (Expr), Ent);
              end if;
  
              --  Flag the default_iterator as well as the denoted function.
--- 4696,4707 ----
           end if;
  
           if not Is_Overloaded (Expr) then
!             if Entity (Expr) /= Any_Id
!               and then not Check_Primitive_Function (Entity (Expr))
!             then
                 Error_Msg_NE
                   ("aspect Indexing requires a function that applies to type&",
!                   Entity (Expr), Ent);
              end if;
  
              --  Flag the default_iterator as well as the denoted function.
*************** package body Sem_Ch13 is
*** 4933,4941 ****
        elsif Is_Object (Ent)
          and then Present (Renamed_Object (Ent))
        then
!          --  Case of renamed object from source, this is an error
  
!          if Comes_From_Source (Renamed_Object (Ent)) then
              Get_Name_String (Chars (N));
              Error_Msg_Strlen := Name_Len;
              Error_Msg_String (1 .. Name_Len) := Name_Buffer (1 .. Name_Len);
--- 4988,5000 ----
        elsif Is_Object (Ent)
          and then Present (Renamed_Object (Ent))
        then
!          --  In the case of a renamed object from source, this is an error
!          --  unless the object is an aggregate and the renaming is created
!          --  for an object declaration.
  
!          if Comes_From_Source (Renamed_Object (Ent))
!            and then Nkind (Renamed_Object (Ent)) /= N_Aggregate
!          then
              Get_Name_String (Chars (N));
              Error_Msg_Strlen := Name_Len;
              Error_Msg_String (1 .. Name_Len) := Name_Buffer (1 .. Name_Len);
*************** package body Sem_Ch13 is
*** 5159,5164 ****
--- 5218,5224 ----
                       --  aspect case properly.
  
                       if Is_Object (O_Ent)
+                        and then not Is_Generic_Formal (O_Ent)
                         and then not Is_Generic_Type (Etype (U_Ent))
                         and then Address_Clause_Overlay_Warnings
                       then
*************** package body Sem_Ch13 is
*** 5431,5437 ****
                    Analyze (Decl, Suppress => All_Checks);
  
                    Set_Has_Delayed_Freeze        (New_Ctyp, False);
!                   Set_Esize                     (New_Ctyp, Csize);
                    Set_RM_Size                   (New_Ctyp, Csize);
                    Init_Alignment                (New_Ctyp);
                    Set_Is_Itype                  (New_Ctyp, True);
--- 5491,5497 ----
                    Analyze (Decl, Suppress => All_Checks);
  
                    Set_Has_Delayed_Freeze        (New_Ctyp, False);
!                   Init_Esize                    (New_Ctyp);
                    Set_RM_Size                   (New_Ctyp, Csize);
                    Init_Alignment                (New_Ctyp);
                    Set_Is_Itype                  (New_Ctyp, True);
*************** package body Sem_Ch13 is
*** 5507,5513 ****
           -- Default_Iterator --
           ----------------------
  
!          when Attribute_Default_Iterator =>  Default_Iterator : declare
              Func : Entity_Id;
              Typ  : Entity_Id;
  
--- 5567,5573 ----
           -- Default_Iterator --
           ----------------------
  
!          when Attribute_Default_Iterator => Default_Iterator : declare
              Func : Entity_Id;
              Typ  : Entity_Id;
  
*************** package body Sem_Ch13 is
*** 5795,5800 ****
--- 5855,5863 ----
                 if ASIS_Mode then
                    null;
  
+                elsif Size <= 0 then
+                   Error_Msg_N ("Object_Size must be positive", Expr);
+ 
                 elsif Is_Scalar_Type (U_Ent) then
                    if Size /= 8 and then Size /= 16 and then Size /= 32
                      and then UI_Mod (Size, 64) /= 0
*************** package body Sem_Ch13 is
*** 6917,6923 ****
        CC      : Node_Id;
        Comp    : Entity_Id;
        Fbit    : Uint;
-       Hbit    : Uint := Uint_0;
        Lbit    : Uint;
        Ocomp   : Entity_Id;
        Posit   : Uint;
--- 6980,6985 ----
*************** package body Sem_Ch13 is
*** 7243,7248 ****
--- 7305,7313 ----
                          Set_Normalized_First_Bit (Comp, Fbit mod SSU);
                          Set_Normalized_Position  (Comp, Fbit / SSU);
  
+                         Set_Normalized_Position_Max
+                           (Comp, Normalized_Position (Comp));
+ 
                          if Warn_On_Overridden_Size
                            and then Has_Size_Clause (Etype (Comp))
                            and then RM_Size (Etype (Comp)) /= Esize (Comp)
*************** package body Sem_Ch13 is
*** 7252,7267 ****
                                Component_Name (CC), Etype (Comp));
                          end if;
  
-                         --  This information is also set in the corresponding
-                         --  component of the base type, found by accessing the
-                         --  Original_Record_Component link if it is present.
- 
-                         Ocomp := Original_Record_Component (Comp);
- 
-                         if Hbit < Lbit then
-                            Hbit := Lbit;
-                         end if;
- 
                          Check_Size
                            (Component_Name (CC),
                             Etype (Comp),
--- 7317,7322 ----
*************** package body Sem_Ch13 is
*** 7271,7282 ****
                          Set_Biased
                            (Comp, First_Node (CC), "component clause", Biased);
  
!                         if Present (Ocomp) then
                             Set_Component_Clause     (Ocomp, CC);
                             Set_Component_Bit_Offset (Ocomp, Fbit);
                             Set_Normalized_First_Bit (Ocomp, Fbit mod SSU);
                             Set_Normalized_Position  (Ocomp, Fbit / SSU);
-                            Set_Esize                (Ocomp, 1 + (Lbit - Fbit));
  
                             Set_Normalized_Position_Max
                               (Ocomp, Normalized_Position (Ocomp));
--- 7326,7343 ----
                          Set_Biased
                            (Comp, First_Node (CC), "component clause", Biased);
  
!                         --  This information is also set in the corresponding
!                         --  component of the base type, found by accessing the
!                         --  Original_Record_Component link if it is present.
! 
!                         Ocomp := Original_Record_Component (Comp);
! 
!                         if Present (Ocomp) and then Ocomp /= Comp then
                             Set_Component_Clause     (Ocomp, CC);
                             Set_Component_Bit_Offset (Ocomp, Fbit);
+                            Set_Esize                (Ocomp, 1 + (Lbit - Fbit));
                             Set_Normalized_First_Bit (Ocomp, Fbit mod SSU);
                             Set_Normalized_Position  (Ocomp, Fbit / SSU);
  
                             Set_Normalized_Position_Max
                               (Ocomp, Normalized_Position (Ocomp));
*************** package body Sem_Ch13 is
*** 8197,8202 ****
--- 8258,8270 ----
  
           Set_Static_Discrete_Predicate (Typ, Plist);
  
+          --  Within a generic the predicate functions themselves need not
+          --  be constructed.
+ 
+          if Inside_A_Generic then
+             return;
+          end if;
+ 
           --  The processing for static predicates put the expression into
           --  canonical form as a series of ranges. It also eliminated
           --  duplicates and collapsed and combined ranges. We might as well
*************** package body Sem_Ch13 is
*** 8729,8737 ****
  
          --  Do not generate predicate bodies within a generic unit. The
          --  expressions have been analyzed already, and the bodies play
!         --  no role if not within an executable unit.
  
!       elsif Inside_A_Generic then
           return;
        end if;
  
--- 8797,8809 ----
  
          --  Do not generate predicate bodies within a generic unit. The
          --  expressions have been analyzed already, and the bodies play
!         --  no role if not within an executable unit. However, if a statc
!         --  predicate is present it must be processed for legality checks
!         --  such as case coverage in an expression.
  
!       elsif Inside_A_Generic
!         and then not Has_Static_Predicate_Aspect (Typ)
!       then
           return;
        end if;
  
*************** package body Sem_Ch13 is
*** 8887,8895 ****
                          Expression => Expr))));
  
              --  The declaration has been analyzed when created, and placed
!             --  after type declaration. Insert body itself after freeze node.
  
!             Insert_After_And_Analyze (N, FBody);
  
              --  The defining identifier of a quantified expression carries the
              --  scope in which the type appears, but when unnesting we need
--- 8959,8973 ----
                          Expression => Expr))));
  
              --  The declaration has been analyzed when created, and placed
!             --  after type declaration. Insert body itself after freeze node,
!             --  unless subprogram declaration is already there, in which case
!             --  body better be placed afterwards.
  
!             if FDecl = Next (N) then
!                Insert_After_And_Analyze (FDecl, FBody);
!             else
!                Insert_After_And_Analyze (N, FBody);
!             end if;
  
              --  The defining identifier of a quantified expression carries the
              --  scope in which the type appears, but when unnesting we need
*************** package body Sem_Ch13 is
*** 9324,9331 ****
           Analyze (End_Decl_Expr);
           Set_Is_Frozen (Ent, True);
  
!          --  If the end of declarations comes before any other freeze
!          --  point, the Freeze_Expr is not analyzed: no check needed.
  
           if Analyzed (Freeze_Expr) and then not In_Instance then
              Check_Overloaded_Name;
--- 9402,9409 ----
           Analyze (End_Decl_Expr);
           Set_Is_Frozen (Ent, True);
  
!          --  If the end of declarations comes before any other freeze point,
!          --  the Freeze_Expr is not analyzed: no check needed.
  
           if Analyzed (Freeze_Expr) and then not In_Instance then
              Check_Overloaded_Name;
*************** package body Sem_Ch13 is
*** 9336,9352 ****
        --  All other cases
  
        else
           --  Indicate that the expression comes from an aspect specification,
           --  which is used in subsequent analysis even if expansion is off.
  
           Set_Parent (End_Decl_Expr, ASN);
  
!          --  In a generic context the aspect expressions have not been
!          --  preanalyzed, so do it now. There are no conformance checks
!          --  to perform in this case.
  
           if No (T) then
!             Check_Aspect_At_Freeze_Point (ASN);
              return;
  
           --  The default values attributes may be defined in the private part,
--- 9414,9463 ----
        --  All other cases
  
        else
+          --  In a generic context freeze nodes are not always generated, so
+          --  analyze the expression now. If the aspect is for a type, we must
+          --  also make its potential components accessible.
+ 
+          if not Analyzed (Freeze_Expr) and then Inside_A_Generic then
+             if A_Id = Aspect_Dynamic_Predicate
+               or else A_Id = Aspect_Predicate
+             then
+                Push_Type (Ent);
+                Preanalyze_Spec_Expression (Freeze_Expr, Standard_Boolean);
+                Pop_Type (Ent);
+ 
+             elsif A_Id = Aspect_Priority then
+                Push_Type (Ent);
+                Preanalyze_Spec_Expression (Freeze_Expr, Any_Integer);
+                Pop_Type (Ent);
+ 
+             else
+                Preanalyze (Freeze_Expr);
+             end if;
+          end if;
+ 
           --  Indicate that the expression comes from an aspect specification,
           --  which is used in subsequent analysis even if expansion is off.
  
           Set_Parent (End_Decl_Expr, ASN);
  
!          --  In a generic context the original  aspect expressions have not
!          --  been preanalyzed, so do it now. There are no conformance checks
!          --  to perform in this case. As before, we have to make components
!          --  visible for aspects that may reference them.
  
           if No (T) then
!             if A_Id = Aspect_Dynamic_Predicate
!               or else A_Id = Aspect_Predicate
!               or else A_Id = Aspect_Priority
!             then
!                Push_Type (Ent);
!                Check_Aspect_At_Freeze_Point (ASN);
!                Pop_Type (Ent);
! 
!             else
!                Check_Aspect_At_Freeze_Point (ASN);
!             end if;
              return;
  
           --  The default values attributes may be defined in the private part,
*************** package body Sem_Ch13 is
*** 9367,9372 ****
--- 9478,9484 ----
           elsif A_Id = Aspect_Dynamic_Predicate
             or else A_Id = Aspect_Predicate
             or else A_Id = Aspect_Priority
+            or else A_Id = Aspect_CPU
           then
              Push_Type (Ent);
              Preanalyze_Spec_Expression (End_Decl_Expr, T);
*************** package body Sem_Ch13 is
*** 9614,9620 ****
--- 9726,9734 ----
              | Aspect_Initial_Condition
              | Aspect_Initializes
              | Aspect_Max_Entry_Queue_Depth
+             | Aspect_Max_Entry_Queue_Length
              | Aspect_Max_Queue_Length
+             | Aspect_No_Caching
              | Aspect_Obsolescent
              | Aspect_Part_Of
              | Aspect_Post
*************** package body Sem_Ch13 is
*** 10068,10073 ****
--- 10182,10200 ----
        --  issued, since the message was already given. Comp is also set to
        --  Empty if the current "component clause" is in fact a pragma.
  
+       procedure Record_Hole_Check
+         (Rectype : Entity_Id; After_Last : out Uint; Warn : Boolean);
+       --  Checks for gaps in the given Rectype. Compute After_Last, the bit
+       --  number after the last component. Warn is True on the initial call,
+       --  and warnings are given for gaps. For a type extension, this is called
+       --  recursively to compute After_Last for the parent type; in this case
+       --  Warn is False and the warnings are suppressed.
+ 
+       procedure Component_Order_Check (Rectype : Entity_Id);
+       --  Check that the order of component clauses agrees with the order of
+       --  component declarations, and that the component clauses are given in
+       --  increasing order of bit offset.
+ 
        -----------------------------
        -- Check_Component_Overlap --
        -----------------------------
*************** package body Sem_Ch13 is
*** 10110,10115 ****
--- 10237,10289 ----
           end if;
        end Check_Component_Overlap;
  
+       ---------------------------
+       -- Component_Order_Check --
+       ---------------------------
+ 
+       procedure Component_Order_Check (Rectype : Entity_Id) is
+          Comp : Entity_Id := First_Component (Rectype);
+          Clause : Node_Id := First (Component_Clauses (N));
+          Prev_Bit_Offset : Uint := Uint_0;
+          OOO : constant String :=
+            "?component clause out of order with respect to declaration";
+ 
+       begin
+          --  Step Comp through components and Clause through component clauses,
+          --  skipping pragmas. We ignore discriminants and variant parts,
+          --  because we get most of the benefit from the plain vanilla
+          --  component cases, without the extra complexity. If we find a Comp
+          --  and Clause that don't match, give a warning on both and quit. If
+          --  we find two subsequent clauses out of order by bit layout, give
+          --  warning and quit. On each iteration, Prev_Bit_Offset is the one
+          --  from the previous iteration (or 0 to start).
+ 
+          while Present (Comp) and then Present (Clause) loop
+             if Nkind (Clause) = N_Component_Clause
+               and then Ekind (Entity (Component_Name (Clause))) = E_Component
+             then
+                if Entity (Component_Name (Clause)) /= Comp then
+                   Error_Msg_N (OOO, Comp);
+                   Error_Msg_N (OOO, Clause);
+                   exit;
+                end if;
+ 
+                if not Reverse_Bit_Order (Rectype)
+                  and then not Reverse_Storage_Order (Rectype)
+                  and then Component_Bit_Offset (Comp) < Prev_Bit_Offset
+                then
+                   Error_Msg_N ("?memory layout out of order", Clause);
+                   exit;
+                end if;
+ 
+                Prev_Bit_Offset := Component_Bit_Offset (Comp);
+                Comp := Next_Component (Comp);
+             end if;
+ 
+             Next (Clause);
+          end loop;
+       end Component_Order_Check;
+ 
        --------------------
        -- Find_Component --
        --------------------
*************** package body Sem_Ch13 is
*** 10179,10184 ****
--- 10353,10579 ----
           end if;
        end Find_Component;
  
+       -----------------------
+       -- Record_Hole_Check --
+       -----------------------
+ 
+       procedure Record_Hole_Check
+         (Rectype : Entity_Id; After_Last : out Uint; Warn : Boolean)
+       is
+          Decl : constant Node_Id := Declaration_Node (Base_Type (Rectype));
+          --  Full declaration of record type
+ 
+          procedure Check_Component_List
+            (DS   : List_Id;
+             CL   : Node_Id;
+             Sbit : Uint;
+             Abit : out Uint);
+          --  Check component list CL for holes. DS is a list of discriminant
+          --  specifications to be included in the consideration of components.
+          --  Sbit is the starting bit, which is zero if there are no preceding
+          --  components (before a variant part, or a parent type, or a tag
+          --  field). If there are preceding components, Sbit is the bit just
+          --  after the last such component. Abit is set to the bit just after
+          --  the last component of DS and CL.
+ 
+          --------------------------
+          -- Check_Component_List --
+          --------------------------
+ 
+          procedure Check_Component_List
+            (DS   : List_Id;
+             CL   : Node_Id;
+             Sbit : Uint;
+             Abit : out Uint)
+          is
+             Compl : Integer;
+ 
+          begin
+             Compl := Integer (List_Length (Component_Items (CL)));
+ 
+             if DS /= No_List then
+                Compl := Compl + Integer (List_Length (DS));
+             end if;
+ 
+             declare
+                Comps : array (Natural range 0 .. Compl) of Entity_Id;
+                --  Gather components (zero entry is for sort routine)
+ 
+                Ncomps : Natural := 0;
+                --  Number of entries stored in Comps (starting at Comps (1))
+ 
+                Citem : Node_Id;
+                --  One component item or discriminant specification
+ 
+                Nbit  : Uint;
+                --  Starting bit for next component
+ 
+                CEnt  : Entity_Id;
+                --  Component entity
+ 
+                Variant : Node_Id;
+                --  One variant
+ 
+                function Lt (Op1, Op2 : Natural) return Boolean;
+                --  Compare routine for Sort
+ 
+                procedure Move (From : Natural; To : Natural);
+                --  Move routine for Sort
+ 
+                package Sorting is new GNAT.Heap_Sort_G (Move, Lt);
+ 
+                --------
+                -- Lt --
+                --------
+ 
+                function Lt (Op1, Op2 : Natural) return Boolean is
+                begin
+                   return Component_Bit_Offset (Comps (Op1))
+                        < Component_Bit_Offset (Comps (Op2));
+                end Lt;
+ 
+                ----------
+                -- Move --
+                ----------
+ 
+                procedure Move (From : Natural; To : Natural) is
+                begin
+                   Comps (To) := Comps (From);
+                end Move;
+ 
+             begin
+                --  Gather discriminants into Comp
+ 
+                if DS /= No_List then
+                   Citem := First (DS);
+                   while Present (Citem) loop
+                      if Nkind (Citem) = N_Discriminant_Specification then
+                         declare
+                            Ent : constant Entity_Id :=
+                                    Defining_Identifier (Citem);
+                         begin
+                            if Ekind (Ent) = E_Discriminant then
+                               Ncomps := Ncomps + 1;
+                               Comps (Ncomps) := Ent;
+                            end if;
+                         end;
+                      end if;
+ 
+                      Next (Citem);
+                   end loop;
+                end if;
+ 
+                --  Gather component entities into Comp
+ 
+                Citem := First (Component_Items (CL));
+                while Present (Citem) loop
+                   if Nkind (Citem) = N_Component_Declaration then
+                      Ncomps := Ncomps + 1;
+                      Comps (Ncomps) := Defining_Identifier (Citem);
+                   end if;
+ 
+                   Next (Citem);
+                end loop;
+ 
+                --  Now sort the component entities based on the first bit.
+                --  Note we already know there are no overlapping components.
+ 
+                Sorting.Sort (Ncomps);
+ 
+                --  Loop through entries checking for holes
+ 
+                Nbit := Sbit;
+                for J in 1 .. Ncomps loop
+                   CEnt := Comps (J);
+ 
+                   declare
+                      CBO : constant Uint := Component_Bit_Offset (CEnt);
+ 
+                   begin
+                      --  Skip components with unknown offsets
+ 
+                      if CBO /= No_Uint and then CBO >= 0 then
+                         Error_Msg_Uint_1 := CBO - Nbit;
+ 
+                         if Warn and then Error_Msg_Uint_1 > 0 then
+                            Error_Msg_NE
+                              ("?H?^-bit gap before component&",
+                               Component_Name (Component_Clause (CEnt)),
+                               CEnt);
+                         end if;
+ 
+                         Nbit := CBO + Esize (CEnt);
+                      end if;
+                   end;
+                end loop;
+ 
+                --  Set Abit to just after the last nonvariant component
+ 
+                Abit := Nbit;
+ 
+                --  Process variant parts recursively if present. Set Abit to
+                --  the maximum for all variant parts.
+ 
+                if Present (Variant_Part (CL)) then
+                   declare
+                      Var_Start : constant Uint := Nbit;
+                   begin
+                      Variant := First (Variants (Variant_Part (CL)));
+                      while Present (Variant) loop
+                         Check_Component_List
+                           (No_List, Component_List (Variant), Var_Start, Nbit);
+                         Next (Variant);
+                         if Nbit > Abit then
+                            Abit := Nbit;
+                         end if;
+                      end loop;
+                   end;
+                end if;
+             end;
+          end Check_Component_List;
+ 
+          Sbit : Uint;
+          --  Starting bit for call to Check_Component_List. Zero for an
+          --  untagged type. The size of the Tag for a nonderived tagged
+          --  type. Parent size for a type extension.
+ 
+          Record_Definition : Node_Id;
+          --  Record_Definition containing Component_List to pass to
+          --  Check_Component_List.
+ 
+       --  Start of processing for Record_Hole_Check
+ 
+       begin
+          if Is_Tagged_Type (Rectype) then
+             Sbit := UI_From_Int (System_Address_Size);
+          else
+             Sbit := Uint_0;
+          end if;
+ 
+          After_Last := Uint_0;
+ 
+          if Nkind (Decl) = N_Full_Type_Declaration then
+             Record_Definition := Type_Definition (Decl);
+ 
+             --  If we have a record extension, set Sbit to point after the last
+             --  component of the parent type, by calling Record_Hole_Check
+             --  recursively.
+ 
+             if Nkind (Record_Definition) = N_Derived_Type_Definition then
+                Record_Definition := Record_Extension_Part (Record_Definition);
+                Record_Hole_Check (Underlying_Type (Parent_Subtype (Rectype)),
+                                   After_Last => Sbit, Warn => False);
+             end if;
+ 
+             if Nkind (Record_Definition) = N_Record_Definition then
+                Check_Component_List
+                  (Discriminant_Specifications (Decl),
+                   Component_List (Record_Definition),
+                   Sbit, After_Last);
+             end if;
+          end if;
+       end Record_Hole_Check;
+ 
     --  Start of processing for Check_Record_Representation_Clause
  
     begin
*************** package body Sem_Ch13 is
*** 10262,10268 ****
               First_Bit => Make_Integer_Literal (Loc, Uint_0),
               Last_Bit  =>
                 Make_Integer_Literal (Loc,
!                  UI_From_Int (System_Address_Size))));
  
           Ccount := Ccount + 1;
        end if;
--- 10657,10663 ----
               First_Bit => Make_Integer_Literal (Loc, Uint_0),
               Last_Bit  =>
                 Make_Integer_Literal (Loc,
!                  UI_From_Int (System_Address_Size - 1))));
  
           Ccount := Ccount + 1;
        end if;
*************** package body Sem_Ch13 is
*** 10535,10732 ****
           end Overlap_Check2;
        end if;
  
!       --  The following circuit deals with warning on record holes (gaps). We
!       --  skip this check if overlap was detected, since it makes sense for the
!       --  programmer to fix this illegality before worrying about warnings.
! 
!       if not Overlap_Detected and Warn_On_Record_Holes then
!          Record_Hole_Check : declare
!             Decl : constant Node_Id := Declaration_Node (Base_Type (Rectype));
!             --  Full declaration of record type
! 
!             procedure Check_Component_List
!               (CL   : Node_Id;
!                Sbit : Uint;
!                DS   : List_Id);
!             --  Check component list CL for holes. The starting bit should be
!             --  Sbit. which is zero for the main record component list and set
!             --  appropriately for recursive calls for variants. DS is set to
!             --  a list of discriminant specifications to be included in the
!             --  consideration of components. It is No_List if none to consider.
! 
!             --------------------------
!             -- Check_Component_List --
!             --------------------------
! 
!             procedure Check_Component_List
!               (CL   : Node_Id;
!                Sbit : Uint;
!                DS   : List_Id)
!             is
!                Compl : Integer;
! 
!             begin
!                Compl := Integer (List_Length (Component_Items (CL)));
! 
!                if DS /= No_List then
!                   Compl := Compl + Integer (List_Length (DS));
!                end if;
! 
!                declare
!                   Comps : array (Natural range 0 .. Compl) of Entity_Id;
!                   --  Gather components (zero entry is for sort routine)
! 
!                   Ncomps : Natural := 0;
!                   --  Number of entries stored in Comps (starting at Comps (1))
! 
!                   Citem : Node_Id;
!                   --  One component item or discriminant specification
! 
!                   Nbit  : Uint;
!                   --  Starting bit for next component
! 
!                   CEnt  : Entity_Id;
!                   --  Component entity
! 
!                   Variant : Node_Id;
!                   --  One variant
! 
!                   function Lt (Op1, Op2 : Natural) return Boolean;
!                   --  Compare routine for Sort
! 
!                   procedure Move (From : Natural; To : Natural);
!                   --  Move routine for Sort
! 
!                   package Sorting is new GNAT.Heap_Sort_G (Move, Lt);
! 
!                   --------
!                   -- Lt --
!                   --------
! 
!                   function Lt (Op1, Op2 : Natural) return Boolean is
!                   begin
!                      return Component_Bit_Offset (Comps (Op1))
!                        <
!                        Component_Bit_Offset (Comps (Op2));
!                   end Lt;
! 
!                   ----------
!                   -- Move --
!                   ----------
! 
!                   procedure Move (From : Natural; To : Natural) is
!                   begin
!                      Comps (To) := Comps (From);
!                   end Move;
! 
!                begin
!                   --  Gather discriminants into Comp
! 
!                   if DS /= No_List then
!                      Citem := First (DS);
!                      while Present (Citem) loop
!                         if Nkind (Citem) = N_Discriminant_Specification then
!                            declare
!                               Ent : constant Entity_Id :=
!                                       Defining_Identifier (Citem);
!                            begin
!                               if Ekind (Ent) = E_Discriminant then
!                                  Ncomps := Ncomps + 1;
!                                  Comps (Ncomps) := Ent;
!                               end if;
!                            end;
!                         end if;
! 
!                         Next (Citem);
!                      end loop;
!                   end if;
! 
!                   --  Gather component entities into Comp
! 
!                   Citem := First (Component_Items (CL));
!                   while Present (Citem) loop
!                      if Nkind (Citem) = N_Component_Declaration then
!                         Ncomps := Ncomps + 1;
!                         Comps (Ncomps) := Defining_Identifier (Citem);
!                      end if;
! 
!                      Next (Citem);
!                   end loop;
! 
!                   --  Now sort the component entities based on the first bit.
!                   --  Note we already know there are no overlapping components.
! 
!                   Sorting.Sort (Ncomps);
! 
!                   --  Loop through entries checking for holes
! 
!                   Nbit := Sbit;
!                   for J in 1 .. Ncomps loop
!                      CEnt := Comps (J);
! 
!                      declare
!                         CBO : constant Uint := Component_Bit_Offset (CEnt);
! 
!                      begin
!                         --  Skip components with unknown offsets
! 
!                         if CBO /= No_Uint and then CBO >= 0 then
!                            Error_Msg_Uint_1 := CBO - Nbit;
! 
!                            if Error_Msg_Uint_1 > 0 then
!                               Error_Msg_NE
!                                 ("?H?^-bit gap before component&",
!                                  Component_Name (Component_Clause (CEnt)),
!                                  CEnt);
!                            end if;
! 
!                            Nbit := CBO + Esize (CEnt);
!                         end if;
!                      end;
!                   end loop;
! 
!                   --  Process variant parts recursively if present
! 
!                   if Present (Variant_Part (CL)) then
!                      Variant := First (Variants (Variant_Part (CL)));
!                      while Present (Variant) loop
!                         Check_Component_List
!                           (Component_List (Variant), Nbit, No_List);
!                         Next (Variant);
!                      end loop;
!                   end if;
!                end;
!             end Check_Component_List;
  
!          --  Start of processing for Record_Hole_Check
  
!          begin
              declare
!                Sbit : Uint;
! 
              begin
!                if Is_Tagged_Type (Rectype) then
!                   Sbit := UI_From_Int (System_Address_Size);
!                else
!                   Sbit := Uint_0;
!                end if;
! 
!                if Nkind (Decl) = N_Full_Type_Declaration
!                  and then Nkind (Type_Definition (Decl)) = N_Record_Definition
!                then
!                   Check_Component_List
!                     (Component_List (Type_Definition (Decl)),
!                      Sbit,
!                      Discriminant_Specifications (Decl));
!                end if;
              end;
!          end Record_Hole_Check;
        end if;
  
        --  For records that have component clauses for all components, and whose
!       --  size is less than or equal to 32, we need to know the size in the
!       --  front end to activate possible packed array processing where the
!       --  component type is a record.
  
        --  At this stage Hbit + 1 represents the first unused bit from all the
        --  component clauses processed, so if the component clauses are
--- 10930,10960 ----
           end Overlap_Check2;
        end if;
  
!       --  Skip the following warnings if overlap was detected; programmer
!       --  should fix the errors first.
  
!       if not Overlap_Detected then
!          --  Check for record holes (gaps)
  
!          if Warn_On_Record_Holes then
              declare
!                Ignore : Uint;
              begin
!                Record_Hole_Check (Rectype, After_Last => Ignore, Warn => True);
              end;
!          end if;
! 
!          --  Check for out-of-order component clauses
! 
!          if Warn_On_Component_Order then
!             Component_Order_Check (Rectype);
!          end if;
        end if;
  
        --  For records that have component clauses for all components, and whose
!       --  size is less than or equal to 32, and which can be fully packed, we
!       --  need to know the size in the front end to activate possible packed
!       --  array processing where the component type is a record.
  
        --  At this stage Hbit + 1 represents the first unused bit from all the
        --  component clauses processed, so if the component clauses are
*************** package body Sem_Ch13 is
*** 10737,10743 ****
        --  length (it may for example be appropriate to round up the size
        --  to some convenient boundary, based on alignment considerations, etc).
  
!       if Unknown_RM_Size (Rectype) and then Hbit + 1 <= 32 then
  
           --  Nothing to do if at least one component has no component clause
  
--- 10965,10974 ----
        --  length (it may for example be appropriate to round up the size
        --  to some convenient boundary, based on alignment considerations, etc).
  
!       if Unknown_RM_Size (Rectype)
!         and then Hbit + 1 <= 32
!         and then not Strict_Alignment (Rectype)
!       then
  
           --  Nothing to do if at least one component has no component clause
  
*************** package body Sem_Ch13 is
*** 10781,10787 ****
  
           if not ASIS_Mode then
              Error_Msg_Uint_1 := Min_Siz;
!             Error_Msg_NE ("size for& too small, minimum allowed is ^", N, T);
           end if;
        end Size_Too_Small_Error;
  
--- 11012,11018 ----
  
           if not ASIS_Mode then
              Error_Msg_Uint_1 := Min_Siz;
!             Error_Msg_NE (Size_Too_Small_Message, N, T);
           end if;
        end Size_Too_Small_Error;
  
*************** package body Sem_Ch13 is
*** 11258,11263 ****
--- 11489,11495 ----
                    if A_Id = Aspect_Dynamic_Predicate
                      or else A_Id = Aspect_Predicate
                      or else A_Id = Aspect_Priority
+                     or else A_Id = Aspect_CPU
                    then
                      --  Retrieve the visibility to components and discriminants
                      --  in order to properly analyze the aspects.
*************** package body Sem_Ch13 is
*** 11454,11460 ****
        if Align = No_Uint then
           return No_Uint;
  
!       elsif Align <= 0 then
  
           --  This error is suppressed in ASIS mode to allow for different ASIS
           --  back ends or ASIS-based tools to query the illegal clause.
--- 11686,11692 ----
        if Align = No_Uint then
           return No_Uint;
  
!       elsif Align < 0 then
  
           --  This error is suppressed in ASIS mode to allow for different ASIS
           --  back ends or ASIS-based tools to query the illegal clause.
*************** package body Sem_Ch13 is
*** 11465,11470 ****
--- 11697,11707 ----
  
           return No_Uint;
  
+       --  If Alignment is specified to be 0, we treat it the same as 1
+ 
+       elsif Align = 0 then
+          return Uint_1;
+ 
        else
           for J in Int range 0 .. 64 loop
              declare
*************** package body Sem_Ch13 is
*** 11541,11547 ****
  
     begin
        --  A representation item is either subtype-specific (Size and Alignment
!       --  clauses) or type-related (all others).  Subtype-specific aspects may
        --  differ for different subtypes of the same type (RM 13.1.8).
  
        --  A derived type inherits each type-related representation aspect of
--- 11778,11784 ----
  
     begin
        --  A representation item is either subtype-specific (Size and Alignment
!       --  clauses) or type-related (all others). Subtype-specific aspects may
        --  differ for different subtypes of the same type (RM 13.1.8).
  
        --  A derived type inherits each type-related representation aspect of
*************** package body Sem_Ch13 is
*** 11774,11780 ****
     procedure Initialize is
     begin
        Address_Clause_Checks.Init;
-       Compile_Time_Warnings_Errors.Init;
        Unchecked_Conversions.Init;
  
        --  ??? Might be needed in the future for some non GCC back-ends
--- 12011,12016 ----
*************** package body Sem_Ch13 is
*** 12071,12076 ****
--- 12307,12365 ----
        end if;
     end Is_Predicate_Static;
  
+    ------------------------------
+    -- Is_Type_Related_Rep_Item --
+    ------------------------------
+ 
+    function Is_Type_Related_Rep_Item (N : Node_Id) return Boolean is
+    begin
+       case Nkind (N) is
+          when N_Attribute_Definition_Clause =>
+             declare
+                Id : constant Attribute_Id := Get_Attribute_Id (Chars (N));
+                --  See AARM 13.1(8.f-8.x) list items that end in "clause"
+                --  ???: include any GNAT-defined attributes here?
+             begin
+                return    Id = Attribute_Component_Size
+                  or else Id = Attribute_Bit_Order
+                  or else Id = Attribute_Storage_Pool
+                  or else Id = Attribute_Stream_Size
+                  or else Id = Attribute_Machine_Radix;
+             end;
+ 
+          when N_Pragma =>
+             case Get_Pragma_Id (N) is
+                --  See AARM 13.1(8.f-8.x) list items that start with "pragma"
+                --  ???: include any GNAT-defined pragmas here?
+                when Pragma_Pack
+                   | Pragma_Import
+                   | Pragma_Export
+                   | Pragma_Convention
+                   | Pragma_Atomic
+                   | Pragma_Independent
+                   | Pragma_Volatile
+                   | Pragma_Atomic_Components
+                   | Pragma_Independent_Components
+                   | Pragma_Volatile_Components
+                   | Pragma_Discard_Names
+                =>
+                   return True;
+                when others =>
+                   null;
+             end case;
+ 
+          when N_Enumeration_Representation_Clause
+             | N_Record_Representation_Clause
+          =>
+             return True;
+ 
+          when others =>
+             null;
+       end case;
+ 
+       return False;
+    end Is_Type_Related_Rep_Item;
+ 
     ---------------------
     -- Kill_Rep_Clause --
     ---------------------
*************** package body Sem_Ch13 is
*** 12528,12533 ****
--- 12817,12846 ----
     ------------------------
  
     function Rep_Item_Too_Early (T : Entity_Id; N : Node_Id) return Boolean is
+       function Has_Generic_Parent (E : Entity_Id) return Boolean;
+       --  Return True if any ancestor is a generic type
+ 
+       ------------------------
+       -- Has_Generic_Parent --
+       ------------------------
+ 
+       function Has_Generic_Parent (E : Entity_Id) return Boolean is
+          Ancestor_Type : Entity_Id := Etype (E);
+ 
+       begin
+          while Present (Ancestor_Type)
+            and then not Is_Generic_Type (Ancestor_Type)
+            and then Etype (Ancestor_Type) /= Ancestor_Type
+          loop
+             Ancestor_Type := Etype (Ancestor_Type);
+          end loop;
+ 
+          return
+            Present (Ancestor_Type) and then Is_Generic_Type (Ancestor_Type);
+       end Has_Generic_Parent;
+ 
+    --  Start of processing for Rep_Item_Too_Early
+ 
     begin
        --  Cannot apply non-operational rep items to generic types
  
*************** package body Sem_Ch13 is
*** 12535,12546 ****
           return False;
  
        elsif Is_Type (T)
!         and then Is_Generic_Type (Root_Type (T))
          and then (Nkind (N) /= N_Pragma
                     or else Get_Pragma_Id (N) /= Pragma_Convention)
        then
!          Error_Msg_N ("representation item not allowed for generic type", N);
!          return True;
        end if;
  
        --  Otherwise check for incomplete type
--- 12848,12864 ----
           return False;
  
        elsif Is_Type (T)
!         and then Has_Generic_Parent (T)
          and then (Nkind (N) /= N_Pragma
                     or else Get_Pragma_Id (N) /= Pragma_Convention)
        then
!          if Ada_Version < Ada_2020 then
!             Error_Msg_N
!               ("representation item not allowed for generic type", N);
!             return True;
!          else
!             return False;
!          end if;
        end if;
  
        --  Otherwise check for incomplete type
*************** package body Sem_Ch13 is
*** 12585,12591 ****
        function Is_Derived_Type_With_Constraint return Boolean;
        --  Check whether T is a derived type with an explicit constraint, in
        --  which case the constraint has frozen the type and the item is too
!       --  late.  This compensates for the fact that for derived scalar types
        --  we freeze the base type unconditionally on account of a long-standing
        --  issue in gigi.
  
--- 12903,12909 ----
        function Is_Derived_Type_With_Constraint return Boolean;
        --  Check whether T is a derived type with an explicit constraint, in
        --  which case the constraint has frozen the type and the item is too
!       --  late. This compensates for the fact that for derived scalar types
        --  we freeze the base type unconditionally on account of a long-standing
        --  issue in gigi.
  
*************** package body Sem_Ch13 is
*** 12729,12735 ****
        end if;
  
        --  No error, but one more warning to consider. The RM (surprisingly)
!       --  allows this pattern:
  
        --    type S is ...
        --    primitive operations for S
--- 13047,13053 ----
        end if;
  
        --  No error, but one more warning to consider. The RM (surprisingly)
!       --  allows this pattern in some cases:
  
        --    type S is ...
        --    primitive operations for S
*************** package body Sem_Ch13 is
*** 12738,12744 ****
  
        --  Meaning that calls on the primitive operations of S for values of
        --  type R may require possibly expensive implicit conversion operations.
!       --  This is not an error, but is worth a warning.
  
        if not Relaxed_RM_Semantics and then Is_Type (T) then
           declare
--- 13056,13062 ----
  
        --  Meaning that calls on the primitive operations of S for values of
        --  type R may require possibly expensive implicit conversion operations.
!       --  So even when this is not an error, it is still worth a warning.
  
        if not Relaxed_RM_Semantics and then Is_Type (T) then
           declare
*************** package body Sem_Ch13 is
*** 12746,12771 ****
  
           begin
              if Present (DTL)
-               and then Has_Primitive_Operations (Base_Type (T))
  
!               --  For now, do not generate this warning for the case of aspect
!               --  specification using Ada 2012 syntax, since we get wrong
!               --  messages we do not understand. The whole business of derived
!               --  types and rep items seems a bit confused when aspects are
!               --  used, since the aspects are not evaluated till freeze time.
  
                and then not From_Aspect_Specification (N)
              then
!                Error_Msg_Sloc := Sloc (DTL);
!                Error_Msg_N
!                  ("representation item for& appears after derived type "
!                   & "declaration#??", N);
!                Error_Msg_NE
!                  ("\may result in implicit conversions for primitive "
!                   & "operations of&??", N, T);
!                Error_Msg_NE
!                  ("\to change representations when called with arguments "
!                   & "of type&??", N, DTL);
              end if;
           end;
        end if;
--- 13064,13110 ----
  
           begin
              if Present (DTL)
  
!               --  For now, do not generate this warning for the case of
!               --  aspect specification using Ada 2012 syntax, since we get
!               --  wrong messages we do not understand. The whole business
!               --  of derived types and rep items seems a bit confused when
!               --  aspects are used, since the aspects are not evaluated
!               --  till freeze time. However, AI12-0109 confirms (in an AARM
!               --  ramification) that inheritance in this case is required
!               --  to work.
  
                and then not From_Aspect_Specification (N)
              then
!                if Is_By_Reference_Type (T)
!                  and then not Is_Tagged_Type (T)
!                  and then Is_Type_Related_Rep_Item (N)
!                  and then (Ada_Version >= Ada_2012
!                             or else Has_Primitive_Operations (Base_Type (T)))
!                then
!                   --  Treat as hard error (AI12-0109, binding interpretation).
!                   --  Implementing a change of representation is not really
!                   --  an option in the case of a by-reference type, so we
!                   --  take this path for all Ada dialects if primitive
!                   --  operations are present.
!                   Error_Msg_Sloc := Sloc (DTL);
!                   Error_Msg_N
!                     ("representation item for& appears after derived type "
!                      & "declaration#", N);
! 
!                elsif Has_Primitive_Operations (Base_Type (T)) then
!                   Error_Msg_Sloc := Sloc (DTL);
! 
!                   Error_Msg_N
!                     ("representation item for& appears after derived type "
!                      & "declaration#??", N);
!                   Error_Msg_NE
!                     ("\may result in implicit conversions for primitive "
!                      & "operations of&??", N, T);
!                   Error_Msg_NE
!                     ("\to change representations when called with arguments "
!                      & "of type&??", N, DTL);
!                end if;
              end if;
           end;
        end if;
*************** package body Sem_Ch13 is
*** 13118,13126 ****
                    =>
                       --  Build predicate function specification and preanalyze
                       --  expression after type replacement. The function
!                      --  declaration must be analyzed in the scope of the
!                      --  type, but the the expression can reference components
!                      --  and discriminants of the type.
  
                       if No (Predicate_Function (E)) then
                          declare
--- 13457,13465 ----
                    =>
                       --  Build predicate function specification and preanalyze
                       --  expression after type replacement. The function
!                      --  declaration must be analyzed in the scope of the type,
!                      --  but the expression can reference components and
!                      --  discriminants of the type.
  
                       if No (Predicate_Function (E)) then
                          declare
*************** package body Sem_Ch13 is
*** 13222,13227 ****
--- 13561,13574 ----
          and then Base_Type (T1) = Full_View (Base_Type (T2))
        then
           return True;
+ 
+       --  If T2 is a generic actual it is declared as a subtype, so
+       --  check against its base type.
+ 
+       elsif Is_Generic_Actual_Type (T1)
+         and then Same_Representation (Base_Type (T1), T2)
+       then
+          return True;
        end if;
  
        --  Tagged types always have the same representation, because it is not
*************** package body Sem_Ch13 is
*** 13881,13959 ****
        end loop;
     end Validate_Address_Clauses;
  
-    -----------------------------------------
-    -- Validate_Compile_Time_Warning_Error --
-    -----------------------------------------
- 
-    procedure Validate_Compile_Time_Warning_Error (N : Node_Id) is
-    begin
-       Compile_Time_Warnings_Errors.Append
-         (New_Val => CTWE_Entry'(Eloc  => Sloc (N),
-                                 Scope => Current_Scope,
-                                 Prag  => N));
-    end Validate_Compile_Time_Warning_Error;
- 
-    ------------------------------------------
-    -- Validate_Compile_Time_Warning_Errors --
-    ------------------------------------------
- 
-    procedure Validate_Compile_Time_Warning_Errors is
-       procedure Set_Scope (S : Entity_Id);
-       --  Install all enclosing scopes of S along with S itself
- 
-       procedure Unset_Scope (S : Entity_Id);
-       --  Uninstall all enclosing scopes of S along with S itself
- 
-       ---------------
-       -- Set_Scope --
-       ---------------
- 
-       procedure Set_Scope (S : Entity_Id) is
-       begin
-          if S /= Standard_Standard then
-             Set_Scope (Scope (S));
-          end if;
- 
-          Push_Scope (S);
-       end Set_Scope;
- 
-       -----------------
-       -- Unset_Scope --
-       -----------------
- 
-       procedure Unset_Scope (S : Entity_Id) is
-       begin
-          if S /= Standard_Standard then
-             Unset_Scope (Scope (S));
-          end if;
- 
-          Pop_Scope;
-       end Unset_Scope;
- 
-    --  Start of processing for Validate_Compile_Time_Warning_Errors
- 
-    begin
-       Expander_Mode_Save_And_Set (False);
-       In_Compile_Time_Warning_Or_Error := True;
- 
-       for N in Compile_Time_Warnings_Errors.First ..
-                Compile_Time_Warnings_Errors.Last
-       loop
-          declare
-             T : CTWE_Entry renames Compile_Time_Warnings_Errors.Table (N);
- 
-          begin
-             Set_Scope (T.Scope);
-             Reset_Analyzed_Flags (T.Prag);
-             Process_Compile_Time_Warning_Or_Error (T.Prag, T.Eloc);
-             Unset_Scope (T.Scope);
-          end;
-       end loop;
- 
-       In_Compile_Time_Warning_Or_Error := False;
-       Expander_Mode_Restore;
-    end Validate_Compile_Time_Warning_Errors;
- 
     ---------------------------
     -- Validate_Independence --
     ---------------------------
--- 14228,14233 ----
*************** package body Sem_Ch13 is
*** 14498,14503 ****
--- 14772,14810 ----
     ------------------------------------
  
     procedure Validate_Unchecked_Conversions is
+       function Is_Null_Array (T : Entity_Id) return Boolean;
+       --  We want to warn in the case of converting to a wrong-sized array of
+       --  bytes, including the zero-size case. This returns True in that case,
+       --  which is necessary because a size of 0 is used to indicate both an
+       --  unknown size and a size of 0. It's OK for this to return True in
+       --  other zero-size cases, but we don't go out of our way; for example,
+       --  we don't bother with multidimensional arrays.
+ 
+       function Is_Null_Array (T : Entity_Id) return Boolean is
+       begin
+          if Is_Array_Type (T) and then Is_Constrained (T) then
+             declare
+                Index : constant Node_Id := First_Index (T);
+                R : Node_Id; -- N_Range
+             begin
+                case Nkind (Index) is
+                   when N_Range =>
+                      R := Index;
+                   when N_Subtype_Indication =>
+                      R := Range_Expression (Constraint (Index));
+                   when N_Identifier | N_Expanded_Name =>
+                      R := Scalar_Range (Entity (Index));
+                   when others =>
+                      raise Program_Error;
+                end case;
+ 
+                return Is_Null_Range (Low_Bound (R), High_Bound (R));
+             end;
+          end if;
+ 
+          return False;
+       end Is_Null_Array;
+ 
     begin
        for N in Unchecked_Conversions.First .. Unchecked_Conversions.Last loop
           declare
*************** package body Sem_Ch13 is
*** 14514,14541 ****
           begin
              --  Skip if function marked as warnings off
  
!             if Warnings_Off (Act_Unit) then
                 goto Continue;
              end if;
  
!             --  This validation check, which warns if we have unequal sizes for
!             --  unchecked conversion, and thus potentially implementation
!             --  dependent semantics, is one of the few occasions on which we
!             --  use the official RM size instead of Esize. See description in
!             --  Einfo "Handling of Type'Size Values" for details.
! 
!             if Serious_Errors_Detected = 0
!               and then Known_Static_RM_Size (Source)
!               and then Known_Static_RM_Size (Target)
  
!               --  Don't do the check if warnings off for either type, note the
!               --  deliberate use of OR here instead of OR ELSE to get the flag
!               --  Warnings_Off_Used set for both types if appropriate.
  
!               and then not (Has_Warnings_Off (Source)
!                               or
!                             Has_Warnings_Off (Target))
              then
                 Source_Siz := RM_Size (Source);
                 Target_Siz := RM_Size (Target);
  
--- 14821,14848 ----
           begin
              --  Skip if function marked as warnings off
  
!             if Warnings_Off (Act_Unit) or else Serious_Errors_Detected > 0 then
                 goto Continue;
              end if;
  
!            --  Don't do the check if warnings off for either type, note the
!            --  deliberate use of OR here instead of OR ELSE to get the flag
!            --  Warnings_Off_Used set for both types if appropriate.
  
!             if Has_Warnings_Off (Source) or Has_Warnings_Off (Target) then
!                goto Continue;
!             end if;
  
!             if (Known_Static_RM_Size (Source)
!                   and then Known_Static_RM_Size (Target))
!               or else Is_Null_Array (Target)
              then
+                --  This validation check, which warns if we have unequal sizes
+                --  for unchecked conversion, and thus implementation dependent
+                --  semantics, is one of the few occasions on which we use the
+                --  official RM size instead of Esize. See description in Einfo
+                --  "Handling of Type'Size Values" for details.
+ 
                 Source_Siz := RM_Size (Source);
                 Target_Siz := RM_Size (Target);
  
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch13.ads gcc-10.1.0/gcc/ada/sem_ch13.ads
*** gcc-9.3.0/gcc/ada/sem_ch13.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch13.ads	Thu May  7 10:49:59 2020
*************** package Sem_Ch13 is
*** 189,206 ****
     --  change. A False result is possible only for array, enumeration or
     --  record types.
  
-    procedure Validate_Compile_Time_Warning_Error (N : Node_Id);
-    --  N is a pragma Compile_Time_Error or Compile_Warning_Error whose boolean
-    --  expression is not known at compile time. This procedure makes an entry
-    --  in a table. The actual checking is performed by Validate_Compile_Time_
-    --  Warning_Errors, which is invoked after calling the back end.
- 
-    procedure Validate_Compile_Time_Warning_Errors;
-    --  This routine is called after calling the back end to validate pragmas
-    --  Compile_Time_Error and Compile_Time_Warning for size and alignment
-    --  appropriateness. The reason it is called that late is to take advantage
-    --  of any back-annotation of size and alignment performed by the back end.
- 
     procedure Validate_Unchecked_Conversion
       (N        : Node_Id;
        Act_Unit : Entity_Id);
--- 189,194 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch2.adb gcc-10.1.0/gcc/ada/sem_ch2.adb
*** gcc-9.3.0/gcc/ada/sem_ch2.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch2.adb	Thu May  7 10:49:59 2020
***************
*** 24,29 ****
--- 24,30 ----
  ------------------------------------------------------------------------------
  
  with Atree;    use Atree;
+ with Einfo;    use Einfo;
  with Namet;    use Namet;
  with Opt;      use Opt;
  with Restrict; use Restrict;
*************** package body Sem_Ch2 is
*** 83,89 ****
  
     procedure Analyze_Integer_Literal (N : Node_Id) is
     begin
!       Set_Etype (N, Universal_Integer);
        Set_Is_Static_Expression (N);
     end Analyze_Integer_Literal;
  
--- 84,105 ----
  
     procedure Analyze_Integer_Literal (N : Node_Id) is
     begin
!       --  As a lexical element, an integer literal has type Universal_Integer,
!       --  i.e., is compatible with any integer type. This is semantically
!       --  consistent and simplifies type checking and subsequent constant
!       --  folding when needed. An exception is caused by 64-bit modular types,
!       --  whose upper bound is not representable in a nonstatic context that
!       --  will use 64-bit integers at run time. For such cases, we need to
!       --  preserve the information that the analyzed literal has that modular
!       --  type. For simplicity, we preserve the information for all integer
!       --  literals that result from a modular operation. This happens after
!       --  prior analysis (or construction) of the literal, and after type
!       --  checking and resolution.
! 
!       if No (Etype (N)) or else not Is_Modular_Integer_Type (Etype (N)) then
!          Set_Etype (N, Universal_Integer);
!       end if;
! 
        Set_Is_Static_Expression (N);
     end Analyze_Integer_Literal;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch3.adb gcc-10.1.0/gcc/ada/sem_ch3.adb
*** gcc-9.3.0/gcc/ada/sem_ch3.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch3.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Ch3 is
*** 221,229 ****
     --  T has discriminants but there are no discriminant constraints). The
     --  Related_Nod is the same as Decl_Node in Create_Constrained_Components.
     --  The For_Access says whether or not this subtype is really constraining
!    --  an access type. That is its sole purpose is the designated type of an
!    --  access type -- in which case a Private_Subtype Is_For_Access_Subtype
!    --  is built to avoid freezing T when the access subtype is frozen.
  
     function Build_Scalar_Bound
       (Bound : Node_Id;
--- 221,227 ----
     --  T has discriminants but there are no discriminant constraints). The
     --  Related_Nod is the same as Decl_Node in Create_Constrained_Components.
     --  The For_Access says whether or not this subtype is really constraining
!    --  an access type.
  
     function Build_Scalar_Bound
       (Bound : Node_Id;
*************** package body Sem_Ch3 is
*** 234,251 ****
     --  Needs a more complete spec--what are the parameters exactly, and what
     --  exactly is the returned value, and how is Bound affected???
  
-    procedure Build_Underlying_Full_View
-      (N   : Node_Id;
-       Typ : Entity_Id;
-       Par : Entity_Id);
-    --  If the completion of a private type is itself derived from a private
-    --  type, or if the full view of a private subtype is itself private, the
-    --  back-end has no way to compute the actual size of this type. We build
-    --  an internal subtype declaration of the proper parent type to convey
-    --  this information. This extra mechanism is needed because a full
-    --  view cannot itself have a full view (it would get clobbered during
-    --  view exchanges).
- 
     procedure Check_Access_Discriminant_Requires_Limited
       (D   : Node_Id;
        Loc : Node_Id);
--- 232,237 ----
*************** package body Sem_Ch3 is
*** 924,945 ****
           Set_Has_Delayed_Freeze (Current_Scope);
        end if;
  
!       --  Ada 2005: If the designated type is an interface that may contain
!       --  tasks, create a Master entity for the declaration. This must be done
!       --  before expansion of the full declaration, because the declaration may
!       --  include an expression that is an allocator, whose expansion needs the
!       --  proper Master for the created tasks.
  
!       if Nkind (Related_Nod) = N_Object_Declaration and then Expander_Active
        then
!          if Is_Interface (Desig_Type) and then Is_Limited_Record (Desig_Type)
           then
              Build_Class_Wide_Master (Anon_Type);
  
           --  Similarly, if the type is an anonymous access that designates
           --  tasks, create a master entity for it in the current context.
  
!          elsif Has_Task (Desig_Type) and then Comes_From_Source (Related_Nod)
           then
              Build_Master_Entity (Defining_Identifier (Related_Nod));
              Build_Master_Renaming (Anon_Type);
--- 910,935 ----
           Set_Has_Delayed_Freeze (Current_Scope);
        end if;
  
!       --  If the designated type is limited and class-wide, the object might
!       --  contain tasks, so we create a Master entity for the declaration. This
!       --  must be done before expansion of the full declaration, because the
!       --  declaration may include an expression that is an allocator, whose
!       --  expansion needs the proper Master for the created tasks.
  
!       if Expander_Active
!         and then Nkind (Related_Nod) = N_Object_Declaration
        then
!          if Is_Limited_Record (Desig_Type)
!            and then Is_Class_Wide_Type (Desig_Type)
!            and then Tasking_Allowed
           then
              Build_Class_Wide_Master (Anon_Type);
  
           --  Similarly, if the type is an anonymous access that designates
           --  tasks, create a master entity for it in the current context.
  
!          elsif Has_Task (Desig_Type)
!            and then Comes_From_Source (Related_Nod)
           then
              Build_Master_Entity (Defining_Identifier (Related_Nod));
              Build_Master_Renaming (Anon_Type);
*************** package body Sem_Ch3 is
*** 1515,1520 ****
--- 1505,1511 ----
           Set_Ekind               (Tag, E_Component);
           Set_Is_Tag              (Tag);
           Set_Is_Aliased          (Tag);
+          Set_Is_Independent      (Tag);
           Set_Related_Type        (Tag, Iface);
           Init_Component_Location (Tag);
  
*************** package body Sem_Ch3 is
*** 1554,1559 ****
--- 1545,1551 ----
              Set_Analyzed (Decl);
              Set_Ekind               (Offset, E_Component);
              Set_Is_Aliased          (Offset);
+             Set_Is_Independent      (Offset);
              Set_Related_Type        (Offset, Iface);
              Init_Component_Location (Offset);
              Insert_After (Last_Tag, Decl);
*************** package body Sem_Ch3 is
*** 2057,2066 ****
           end if;
        end if;
  
        --  The parent type may be a private view with unknown discriminants,
        --  and thus unconstrained. Regular components must be constrained.
  
!       if not Is_Definite_Subtype (T) and then Chars (Id) /= Name_uParent then
           if Is_Class_Wide_Type (T) then
              Error_Msg_N
                 ("class-wide subtype with unknown discriminants" &
--- 2049,2071 ----
           end if;
        end if;
  
+       --  Avoid reporting spurious errors if the component is initialized with
+       --  a raise expression (which is legal in any expression context)
+ 
+       if Present (E)
+         and then
+           (Nkind (E) = N_Raise_Expression
+              or else (Nkind (E) = N_Qualified_Expression
+                         and then Nkind (Expression (E)) = N_Raise_Expression))
+       then
+          null;
+ 
        --  The parent type may be a private view with unknown discriminants,
        --  and thus unconstrained. Regular components must be constrained.
  
!       elsif not Is_Definite_Subtype (T)
!         and then Chars (Id) /= Name_uParent
!       then
           if Is_Class_Wide_Type (T) then
              Error_Msg_N
                 ("class-wide subtype with unknown discriminants" &
*************** package body Sem_Ch3 is
*** 2080,2086 ****
        end if;
  
        Set_Etype (Id, T);
!       Set_Is_Aliased (Id, Aliased_Present (Component_Definition (N)));
  
        --  The component declaration may have a per-object constraint, set
        --  the appropriate flag in the defining identifier of the subtype.
--- 2085,2099 ----
        end if;
  
        Set_Etype (Id, T);
! 
!       if Aliased_Present (Component_Definition (N)) then
!          Set_Is_Aliased (Id);
! 
!          --  AI12-001: All aliased objects are considered to be specified as
!          --  independently addressable (RM C.6(8.1/4)).
! 
!          Set_Is_Independent (Id);
!       end if;
  
        --  The component declaration may have a per-object constraint, set
        --  the appropriate flag in the defining identifier of the subtype.
*************** package body Sem_Ch3 is
*** 3005,3018 ****
                 --  is consistent with that of the parent.
  
                 declare
!                   Par_Discr  : constant Entity_Id :=
!                                 Get_Reference_Discriminant (Par_Type);
!                   Cur_Discr  : constant Entity_Id :=
                                  Get_Reference_Discriminant (Prev);
  
                 begin
                    if Corresponding_Discriminant (Cur_Discr) /= Par_Discr then
!                      Error_Msg_N ("aspect incosistent with that of parent", N);
                    end if;
  
                    --  Check that specification in partial view matches the
--- 3018,3032 ----
                 --  is consistent with that of the parent.
  
                 declare
!                   Cur_Discr : constant Entity_Id :=
                                  Get_Reference_Discriminant (Prev);
+                   Par_Discr : constant Entity_Id :=
+                                 Get_Reference_Discriminant (Par_Type);
  
                 begin
                    if Corresponding_Discriminant (Cur_Discr) /= Par_Discr then
!                      Error_Msg_N
!                        ("aspect inconsistent with that of parent", N);
                    end if;
  
                    --  Check that specification in partial view matches the
*************** package body Sem_Ch3 is
*** 3025,3031 ****
                                 Chars (Cur_Discr)
                    then
                       Error_Msg_N
!                        ("aspect incosistent with that of parent", N);
                    end if;
                 end;
              end if;
--- 3039,3045 ----
                                 Chars (Cur_Discr)
                    then
                       Error_Msg_N
!                        ("aspect inconsistent with that of parent", N);
                    end if;
                 end;
              end if;
*************** package body Sem_Ch3 is
*** 3518,3523 ****
--- 3532,3539 ----
           Set_Etype     (Id, Universal_Integer);
           Set_Ekind     (Id, E_Named_Integer);
           Set_Is_Frozen (Id, True);
+ 
+          Set_Debug_Info_Needed (Id);
           return;
        end if;
  
*************** package body Sem_Ch3 is
*** 3645,3652 ****
     --  Ghost mode.
  
     procedure Analyze_Object_Declaration (N : Node_Id) is
!       Loc   : constant Source_Ptr := Sloc (N);
!       Id    : constant Entity_Id  := Defining_Identifier (N);
        Act_T : Entity_Id;
        T     : Entity_Id;
  
--- 3661,3670 ----
     --  Ghost mode.
  
     procedure Analyze_Object_Declaration (N : Node_Id) is
!       Loc       : constant Source_Ptr := Sloc (N);
!       Id        : constant Entity_Id  := Defining_Identifier (N);
!       Next_Decl : constant Node_Id    := Next (N);
! 
        Act_T : Entity_Id;
        T     : Entity_Id;
  
*************** package body Sem_Ch3 is
*** 3908,3913 ****
--- 3926,3936 ----
              A_Id := Get_Aspect_Id (Chars (Identifier (A)));
              while Present (A) loop
                 if A_Id = Aspect_Alignment or else A_Id = Aspect_Address then
+ 
+                   --  Set flag on object entity, for later processing at
+                   --  the freeze point.
+ 
+                   Set_Has_Delayed_Aspects (Id);
                    return True;
                 end if;
  
*************** package body Sem_Ch3 is
*** 3925,3930 ****
--- 3948,3954 ----
        --  Save the Ghost-related attributes to restore on exit
  
        Related_Id : Entity_Id;
+       Full_View_Present : Boolean := False;
  
     --  Start of processing for Analyze_Object_Declaration
  
*************** package body Sem_Ch3 is
*** 4491,4498 ****
              null;
  
           else
!             Insert_After (N,
!               Make_Predicate_Check (T, New_Occurrence_Of (Id, Loc)));
           end if;
        end if;
  
--- 4515,4534 ----
              null;
  
           else
!             --  The check must be inserted after the expanded aggregate
!             --  expansion code, if any.
! 
!             declare
!                Check : constant Node_Id :=
!                          Make_Predicate_Check (T, New_Occurrence_Of (Id, Loc));
! 
!             begin
!                if No (Next_Decl) then
!                   Append_To (List_Containing (N), Check);
!                else
!                   Insert_Before (Next_Decl, Check);
!                end if;
!             end;
           end if;
        end if;
  
*************** package body Sem_Ch3 is
*** 4588,4601 ****
              elsif Is_Interface (T) then
                 null;
  
-             --  In GNATprove mode, Expand_Subtype_From_Expr does nothing. Thus,
-             --  we should prevent the generation of another Itype with the
-             --  same name as the one already generated, or we end up with
-             --  two identical types in GNATprove.
- 
-             elsif GNATprove_Mode then
-                null;
- 
              --  If the type is an unchecked union, no subtype can be built from
              --  the expression. Rewrite declaration as a renaming, which the
              --  back-end can handle properly. This is a rather unusual case,
--- 4624,4629 ----
*************** package body Sem_Ch3 is
*** 4643,4652 ****
--- 4671,4695 ----
                 Act_T := Find_Type_Of_Object (Object_Definition (N), N);
              end if;
  
+             --  Propagate attributes to full view when needed.
+ 
              Set_Is_Constr_Subt_For_U_Nominal (Act_T);
  
+             if Is_Private_Type (Act_T) and then Present (Full_View (Act_T))
+             then
+                Full_View_Present := True;
+             end if;
+ 
+             if Full_View_Present then
+                Set_Is_Constr_Subt_For_U_Nominal (Full_View (Act_T));
+             end if;
+ 
              if Aliased_Present (N) then
                 Set_Is_Constr_Subt_For_UN_Aliased (Act_T);
+ 
+                if Full_View_Present then
+                   Set_Is_Constr_Subt_For_UN_Aliased (Full_View (Act_T));
+                end if;
              end if;
  
              Freeze_Before (N, Act_T);
*************** package body Sem_Ch3 is
*** 4813,4818 ****
--- 4856,4866 ----
        if Aliased_Present (N) then
           Set_Is_Aliased (Id);
  
+          --  AI12-001: All aliased objects are considered to be specified as
+          --  independently addressable (RM C.6(8.1/4)).
+ 
+          Set_Is_Independent (Id);
+ 
           --  If the object is aliased and the type is unconstrained with
           --  defaulted discriminants and there is no expression, then the
           --  object is constrained by the defaults, so it is worthwhile
*************** package body Sem_Ch3 is
*** 5537,5542 ****
--- 5585,5598 ----
              =>
                 Set_Ekind                (Id, E_Record_Subtype);
  
+                --  Subtype declarations introduced for formal type parameters
+                --  in generic instantiations should inherit the Size value of
+                --  the type they rename.
+ 
+                if Present (Generic_Parent_Type (N)) then
+                   Set_RM_Size           (Id, RM_Size (T));
+                end if;
+ 
                 if Ekind (T) = E_Record_Subtype
                   and then Present (Cloned_Subtype (T))
                 then
*************** package body Sem_Ch3 is
*** 6305,6310 ****
--- 6361,6371 ----
           Check_SPARK_05_Restriction
             ("aliased is not allowed", Component_Definition (Def));
           Set_Has_Aliased_Components (Etype (T));
+ 
+          --  AI12-001: All aliased objects are considered to be specified as
+          --  independently addressable (RM C.6(8.1/4)).
+ 
+          Set_Has_Independent_Components (Etype (T));
        end if;
  
        --  Ada 2005 (AI-231): Propagate the null-excluding attribute to the
*************** package body Sem_Ch3 is
*** 6684,6689 ****
--- 6745,6755 ----
                                Has_Private_Component (Derived_Type));
        Conditional_Delay      (Derived_Type, Subt);
  
+       if Is_Access_Subprogram_Type (Derived_Type) then
+          Set_Can_Use_Internal_Rep
+            (Derived_Type, Can_Use_Internal_Rep (Parent_Type));
+       end if;
+ 
        --  Ada 2005 (AI-231): Set the null-exclusion attribute, and verify
        --  that it is not redundant.
  
*************** package body Sem_Ch3 is
*** 6829,6835 ****
        Parent_Type  : Entity_Id;
        Derived_Type : Entity_Id)
     is
!       Loc : constant Source_Ptr := Sloc (N);
  
        Corr_Record      : constant Entity_Id := Make_Temporary (Loc, 'C');
        Corr_Decl        : Node_Id;
--- 6895,6903 ----
        Parent_Type  : Entity_Id;
        Derived_Type : Entity_Id)
     is
!       Loc   : constant Source_Ptr := Sloc (N);
!       Def   : constant Node_Id    := Type_Definition (N);
!       Indic : constant Node_Id    := Subtype_Indication (Def);
  
        Corr_Record      : constant Entity_Id := Make_Temporary (Loc, 'C');
        Corr_Decl        : Node_Id;
*************** package body Sem_Ch3 is
*** 6840,6847 ****
        --  this case.
  
        Constraint_Present : constant Boolean :=
!                              Nkind (Subtype_Indication (Type_Definition (N))) =
!                                                           N_Subtype_Indication;
  
        D_Constraint   : Node_Id;
        New_Constraint : Elist_Id := No_Elist;
--- 6908,6914 ----
        --  this case.
  
        Constraint_Present : constant Boolean :=
!                                           Nkind (Indic) = N_Subtype_Indication;
  
        D_Constraint   : Node_Id;
        New_Constraint : Elist_Id := No_Elist;
*************** package body Sem_Ch3 is
*** 6916,6951 ****
                Expand_To_Stored_Constraint
                  (Parent_Type,
                   Build_Discriminant_Constraints
!                    (Parent_Type,
!                     Subtype_Indication (Type_Definition (N)), True));
           end if;
  
           End_Scope;
  
        elsif Constraint_Present then
  
!          --  Build constrained subtype, copying the constraint, and derive
!          --  from it to create a derived constrained type.
  
           declare
!             Loc  : constant Source_Ptr := Sloc (N);
!             Anon : constant Entity_Id :=
!                      Make_Defining_Identifier (Loc,
!                        Chars => New_External_Name (Chars (Derived_Type), 'T'));
!             Decl : Node_Id;
  
           begin
!             Decl :=
                Make_Subtype_Declaration (Loc,
!                 Defining_Identifier => Anon,
!                 Subtype_Indication =>
!                   New_Copy_Tree (Subtype_Indication (Type_Definition (N))));
!             Insert_Before (N, Decl);
!             Analyze (Decl);
  
-             Rewrite (Subtype_Indication (Type_Definition (N)),
-               New_Occurrence_Of (Anon, Loc));
-             Set_Analyzed (Derived_Type, False);
              Analyze (N);
              return;
           end;
--- 6983,7032 ----
                Expand_To_Stored_Constraint
                  (Parent_Type,
                   Build_Discriminant_Constraints
!                    (Parent_Type, Indic, True));
           end if;
  
           End_Scope;
  
        elsif Constraint_Present then
  
!          --  Build an unconstrained derived type and rewrite the derived type
!          --  as a subtype of this new base type.
  
           declare
!             Parent_Base : constant Entity_Id := Base_Type (Parent_Type);
!             New_Base    : Entity_Id;
!             New_Decl    : Node_Id;
!             New_Indic   : Node_Id;
  
           begin
!             New_Base :=
!                      Create_Itype (Ekind (Derived_Type), N, Derived_Type, 'B');
! 
!             New_Decl :=
!               Make_Full_Type_Declaration (Loc,
!                  Defining_Identifier => New_Base,
!                  Type_Definition     =>
!                    Make_Derived_Type_Definition (Loc,
!                      Abstract_Present      => Abstract_Present (Def),
!                      Limited_Present       => Limited_Present (Def),
!                      Subtype_Indication    =>
!                        New_Occurrence_Of (Parent_Base, Loc)));
! 
!             Mark_Rewrite_Insertion (New_Decl);
!             Insert_Before (N, New_Decl);
!             Analyze (New_Decl);
! 
!             New_Indic :=
!               Make_Subtype_Indication (Loc,
!                 Subtype_Mark => New_Occurrence_Of (New_Base, Loc),
!                 Constraint   => Relocate_Node (Constraint (Indic)));
! 
!             Rewrite (N,
                Make_Subtype_Declaration (Loc,
!                 Defining_Identifier => Derived_Type,
!                 Subtype_Indication  => New_Indic));
  
              Analyze (N);
              return;
           end;
*************** package body Sem_Ch3 is
*** 6976,6985 ****
  
              --  Verify that new discriminants are used to constrain old ones
  
!             D_Constraint :=
!               First
!                 (Constraints
!                   (Constraint (Subtype_Indication (Type_Definition (N)))));
  
              Old_Disc := First_Discriminant (Parent_Type);
  
--- 7057,7063 ----
  
              --  Verify that new discriminants are used to constrain old ones
  
!             D_Constraint := First (Constraints (Constraint (Indic)));
  
              Old_Disc := First_Discriminant (Parent_Type);
  
*************** package body Sem_Ch3 is
*** 7121,7126 ****
--- 7199,7225 ----
        Parent_Type  : Entity_Id;
        Derived_Type : Entity_Id)
     is
+       function Bound_Belongs_To_Type (B : Node_Id) return Boolean;
+       --  When the type declaration includes a constraint, we generate
+       --  a subtype declaration of an anonymous base type, with the constraint
+       --  given in the original type declaration. Conceptually, the bounds
+       --  are converted to the new base type, and this conversion freezes
+       --  (prematurely) that base type, when the bounds are simply literals.
+       --  As a result, a representation clause for the derived type is then
+       --  rejected or ignored. This procedure recognizes the simple case of
+       --  literal bounds, which allows us to indicate that the conversions
+       --  are not freeze points, and the subsequent representation clause
+       --  can be accepted.
+       --  A similar approach might be used to resolve the long-standing
+       --  problem of premature freezing of derived numeric types ???
+ 
+       function Bound_Belongs_To_Type (B : Node_Id) return Boolean is
+       begin
+          return Nkind (B) = N_Type_Conversion
+            and then Is_Entity_Name (Expression (B))
+            and then Ekind (Entity (Expression (B))) = E_Enumeration_Literal;
+       end Bound_Belongs_To_Type;
+ 
        Loc           : constant Source_Ptr := Sloc (N);
        Def           : constant Node_Id    := Type_Definition (N);
        Indic         : constant Node_Id    := Subtype_Indication (Def);
*************** package body Sem_Ch3 is
*** 7336,7342 ****
           --  However, if the type inherits predicates the expressions will
           --  be elaborated earlier and must freeze.
  
!          if Nkind (Indic) /= N_Subtype_Indication
             and then not Has_Predicates (Derived_Type)
           then
              Set_Must_Not_Freeze (Lo);
--- 7435,7443 ----
           --  However, if the type inherits predicates the expressions will
           --  be elaborated earlier and must freeze.
  
!          if (Nkind (Indic) /= N_Subtype_Indication
!            or else
!              (Bound_Belongs_To_Type (Lo) and then Bound_Belongs_To_Type (Hi)))
             and then not Has_Predicates (Derived_Type)
           then
              Set_Must_Not_Freeze (Lo);
*************** package body Sem_Ch3 is
*** 7660,7673 ****
              Full_Parent := Underlying_Full_View (Full_Parent);
           end if;
  
!          --  For record, access and most enumeration types, derivation from
!          --  the full view requires a fully-fledged declaration. In the other
!          --  cases, just use an itype.
  
!          if Ekind (Full_Parent) in Record_Kind
!            or else Ekind (Full_Parent) in Access_Kind
             or else
!              (Ekind (Full_Parent) in Enumeration_Kind
                 and then not Is_Standard_Character_Type (Full_Parent)
                 and then not Is_Generic_Type (Root_Type (Full_Parent)))
           then
--- 7761,7775 ----
              Full_Parent := Underlying_Full_View (Full_Parent);
           end if;
  
!          --  For record, concurrent, access and most enumeration types, the
!          --  derivation from full view requires a fully-fledged declaration.
!          --  In the other cases, just use an itype.
  
!          if Is_Record_Type (Full_Parent)
!            or else Is_Concurrent_Type (Full_Parent)
!            or else Is_Access_Type (Full_Parent)
             or else
!              (Is_Enumeration_Type (Full_Parent)
                 and then not Is_Standard_Character_Type (Full_Parent)
                 and then not Is_Generic_Type (Root_Type (Full_Parent)))
           then
*************** package body Sem_Ch3 is
*** 7696,7702 ****
              --  is now installed. Subprograms have been derived on the partial
              --  view, the completion does not derive them anew.
  
!             if Ekind (Full_Parent) in Record_Kind then
  
                 --  If parent type is tagged, the completion inherits the proper
                 --  primitive operations.
--- 7798,7804 ----
              --  is now installed. Subprograms have been derived on the partial
              --  view, the completion does not derive them anew.
  
!             if Is_Record_Type (Full_Parent) then
  
                 --  If parent type is tagged, the completion inherits the proper
                 --  primitive operations.
*************** package body Sem_Ch3 is
*** 7898,7909 ****
           --  Build the full derivation if this is not the anonymous derived
           --  base type created by Build_Derived_Record_Type in the constrained
           --  case (see point 5. of its head comment) since we build it for the
!          --  derived subtype. And skip it for synchronized types altogether, as
!          --  gigi does not use these types directly.
  
           if Present (Full_View (Parent_Type))
             and then not Is_Itype (Derived_Type)
-            and then not Is_Concurrent_Type (Full_View (Parent_Type))
           then
              declare
                 Der_Base   : constant Entity_Id := Base_Type (Derived_Type);
--- 8000,8009 ----
           --  Build the full derivation if this is not the anonymous derived
           --  base type created by Build_Derived_Record_Type in the constrained
           --  case (see point 5. of its head comment) since we build it for the
!          --  derived subtype.
  
           if Present (Full_View (Parent_Type))
             and then not Is_Itype (Derived_Type)
           then
              declare
                 Der_Base   : constant Entity_Id := Base_Type (Derived_Type);
*************** package body Sem_Ch3 is
*** 8572,8577 ****
--- 8672,8757 ----
        --  An empty Discs list means that there were no constraints in the
        --  subtype indication or that there was an error processing it.
  
+       procedure Check_Generic_Ancestors;
+       --  In Ada 2005 (AI-344), the restriction that a derived tagged type
+       --  cannot be declared at a deeper level than its parent type is
+       --  removed. The check on derivation within a generic body is also
+       --  relaxed, but there's a restriction that a derived tagged type
+       --  cannot be declared in a generic body if it's derived directly
+       --  or indirectly from a formal type of that generic. This applies
+       --  to progenitors as well.
+ 
+       -----------------------------
+       -- Check_Generic_Ancestors --
+       -----------------------------
+ 
+       procedure Check_Generic_Ancestors is
+          Ancestor_Type : Entity_Id;
+          Intf_List     : List_Id;
+          Intf_Name     : Node_Id;
+ 
+          procedure Check_Ancestor;
+          --  For parent and progenitors.
+ 
+          --------------------
+          -- Check_Ancestor --
+          --------------------
+ 
+          procedure Check_Ancestor is
+          begin
+             --  If the derived type does have a formal type as an ancestor
+             --  then it's an error if the derived type is declared within
+             --  the body of the generic unit that declares the formal type
+             --  in its generic formal part. It's sufficient to check whether
+             --  the ancestor type is declared inside the same generic body
+             --  as the derived type (such as within a nested generic spec),
+             --  in which case the derivation is legal. If the formal type is
+             --  declared outside of that generic body, then it's certain
+             --  that the derived type is declared within the generic body
+             --  of the generic unit declaring the formal type.
+ 
+             if Is_Generic_Type (Ancestor_Type)
+               and then Enclosing_Generic_Body (Ancestor_Type) /=
+                          Enclosing_Generic_Body (Derived_Type)
+             then
+                Error_Msg_NE
+                  ("ancestor type& is formal type of enclosing"
+                     & " generic unit (RM 3.9.1 (4/2))",
+                       Indic, Ancestor_Type);
+             end if;
+          end Check_Ancestor;
+ 
+       begin
+          if Nkind (N) = N_Private_Extension_Declaration then
+             Intf_List := Interface_List (N);
+          else
+             Intf_List := Interface_List (Type_Definition (N));
+          end if;
+ 
+          if Present (Enclosing_Generic_Body (Derived_Type)) then
+             Ancestor_Type := Parent_Type;
+ 
+             while not Is_Generic_Type (Ancestor_Type)
+               and then Etype (Ancestor_Type) /= Ancestor_Type
+             loop
+                Ancestor_Type := Etype (Ancestor_Type);
+             end loop;
+ 
+             Check_Ancestor;
+ 
+             if Present (Intf_List) then
+                Intf_Name := First (Intf_List);
+                while Present (Intf_Name) loop
+                   Ancestor_Type := Entity (Intf_Name);
+                   Check_Ancestor;
+                   Next (Intf_Name);
+                end loop;
+             end if;
+          end if;
+       end Check_Generic_Ancestors;
+ 
+    --  Start of processing for Build_Derived_Record_Type
+ 
     begin
        if Ekind (Parent_Type) = E_Record_Type_With_Private
          and then Present (Full_View (Parent_Type))
*************** package body Sem_Ch3 is
*** 8582,8587 ****
--- 8762,8777 ----
           Parent_Base := Base_Type (Parent_Type);
        end if;
  
+       --  If the parent type is declared as a subtype of another private
+       --  type with inherited discriminants, its generated base type is
+       --  itself a record subtype. To further inherit the constraint we
+       --  need to use its own base to have an unconstrained type on which
+       --  to apply the inherited constraint.
+ 
+       if Ekind (Parent_Base) = E_Record_Subtype then
+          Parent_Base := Base_Type (Parent_Base);
+       end if;
+ 
        --  AI05-0115: if this is a derivation from a private type in some
        --  other scope that may lead to invisible components for the derived
        --  type, mark it accordingly.
*************** package body Sem_Ch3 is
*** 8668,8674 ****
  
        --  Indic can either be an N_Identifier if the subtype indication
        --  contains no constraint or an N_Subtype_Indication if the subtype
!       --  indication has a constraint.
  
        Indic := Subtype_Indication (Type_Def);
        Constraint_Present := (Nkind (Indic) = N_Subtype_Indication);
--- 8858,8865 ----
  
        --  Indic can either be an N_Identifier if the subtype indication
        --  contains no constraint or an N_Subtype_Indication if the subtype
!       --  indication has a constraint. In either case it can include an
!       --  interface list.
  
        Indic := Subtype_Indication (Type_Def);
        Constraint_Present := (Nkind (Indic) = N_Subtype_Indication);
*************** package body Sem_Ch3 is
*** 8897,8948 ****
              Freeze_Before (N, Parent_Type);
           end if;
  
-          --  In Ada 2005 (AI-344), the restriction that a derived tagged type
-          --  cannot be declared at a deeper level than its parent type is
-          --  removed. The check on derivation within a generic body is also
-          --  relaxed, but there's a restriction that a derived tagged type
-          --  cannot be declared in a generic body if it's derived directly
-          --  or indirectly from a formal type of that generic.
- 
           if Ada_Version >= Ada_2005 then
!             if Present (Enclosing_Generic_Body (Derived_Type)) then
!                declare
!                   Ancestor_Type : Entity_Id;
! 
!                begin
!                   --  Check to see if any ancestor of the derived type is a
!                   --  formal type.
! 
!                   Ancestor_Type := Parent_Type;
!                   while not Is_Generic_Type (Ancestor_Type)
!                     and then Etype (Ancestor_Type) /= Ancestor_Type
!                   loop
!                      Ancestor_Type := Etype (Ancestor_Type);
!                   end loop;
! 
!                   --  If the derived type does have a formal type as an
!                   --  ancestor, then it's an error if the derived type is
!                   --  declared within the body of the generic unit that
!                   --  declares the formal type in its generic formal part. It's
!                   --  sufficient to check whether the ancestor type is declared
!                   --  inside the same generic body as the derived type (such as
!                   --  within a nested generic spec), in which case the
!                   --  derivation is legal. If the formal type is declared
!                   --  outside of that generic body, then it's guaranteed that
!                   --  the derived type is declared within the generic body of
!                   --  the generic unit declaring the formal type.
! 
!                   if Is_Generic_Type (Ancestor_Type)
!                     and then Enclosing_Generic_Body (Ancestor_Type) /=
!                                Enclosing_Generic_Body (Derived_Type)
!                   then
!                      Error_Msg_NE
!                        ("parent type of& must not be descendant of formal type"
!                           & " of an enclosing generic body",
!                             Indic, Derived_Type);
!                   end if;
!                end;
!             end if;
  
           elsif Type_Access_Level (Derived_Type) /=
                   Type_Access_Level (Parent_Type)
--- 9088,9095 ----
              Freeze_Before (N, Parent_Type);
           end if;
  
           if Ada_Version >= Ada_2005 then
!             Check_Generic_Ancestors;
  
           elsif Type_Access_Level (Derived_Type) /=
                   Type_Access_Level (Parent_Type)
*************** package body Sem_Ch3 is
*** 9614,9622 ****
             (Derived_Type, No_Tagged_Streams_Pragma (Parent_Type));
        end if;
  
!       --  If the parent has primitive routines, set the derived type link
  
!       if Has_Primitive_Operations (Parent_Type) then
           Set_Derived_Type_Link (Parent_Base, Derived_Type);
        end if;
  
--- 9761,9777 ----
             (Derived_Type, No_Tagged_Streams_Pragma (Parent_Type));
        end if;
  
!       --  If the parent has primitive routines and may have not-seen-yet aspect
!       --  specifications (e.g., a Pack pragma), then set the derived type link
!       --  in order to later diagnose "early derivation" issues. If in different
!       --  compilation units, then "early derivation" cannot be an issue (and we
!       --  don't like interunit references that go in the opposite direction of
!       --  semantic dependencies).
  
!       if Has_Primitive_Operations (Parent_Type)
!          and then Enclosing_Comp_Unit_Node (Parent_Type) =
!            Enclosing_Comp_Unit_Node (Derived_Type)
!       then
           Set_Derived_Type_Link (Parent_Base, Derived_Type);
        end if;
  
*************** package body Sem_Ch3 is
*** 10210,10221 ****
  
     begin
        if Ekind (T) = E_Record_Type then
!          if For_Access then
!             Set_Ekind (Def_Id, E_Private_Subtype);
!             Set_Is_For_Access_Subtype (Def_Id, True);
!          else
!             Set_Ekind (Def_Id, E_Record_Subtype);
!          end if;
  
           --  Inherit preelaboration flag from base, for types for which it
           --  may have been set: records, private types, protected types.
--- 10365,10371 ----
  
     begin
        if Ekind (T) = E_Record_Type then
!          Set_Ekind (Def_Id, E_Record_Subtype);
  
           --  Inherit preelaboration flag from base, for types for which it
           --  may have been set: records, private types, protected types.
*************** package body Sem_Ch3 is
*** 10346,10352 ****
           then
              Create_Constrained_Components (Def_Id, Related_Nod, T, Elist);
  
!          elsif not For_Access then
              Set_Cloned_Subtype (Def_Id, T);
           end if;
        end if;
--- 10496,10502 ----
           then
              Create_Constrained_Components (Def_Id, Related_Nod, T, Elist);
  
!          else
              Set_Cloned_Subtype (Def_Id, T);
           end if;
        end if;
*************** package body Sem_Ch3 is
*** 10376,10385 ****
           --  build-in-place library function, child unit or not.
  
           if (Nkind (Nod) in N_Entity and then Is_Compilation_Unit (Nod))
!            or else
!              (Nkind_In (Nod,
!                 N_Defining_Program_Unit_Name, N_Subprogram_Declaration)
!                and then Is_Compilation_Unit (Defining_Entity (Nod)))
           then
              Add_Global_Declaration (IR);
           else
--- 10526,10534 ----
           --  build-in-place library function, child unit or not.
  
           if (Nkind (Nod) in N_Entity and then Is_Compilation_Unit (Nod))
!            or else (Nkind_In (Nod, N_Defining_Program_Unit_Name,
!                                    N_Subprogram_Declaration)
!                       and then Is_Compilation_Unit (Defining_Entity (Nod)))
           then
              Add_Global_Declaration (IR);
           else
*************** package body Sem_Ch3 is
*** 10429,10539 ****
        return New_Bound;
     end Build_Scalar_Bound;
  
-    --------------------------------
-    -- Build_Underlying_Full_View --
-    --------------------------------
- 
-    procedure Build_Underlying_Full_View
-      (N   : Node_Id;
-       Typ : Entity_Id;
-       Par : Entity_Id)
-    is
-       Loc  : constant Source_Ptr := Sloc (N);
-       Subt : constant Entity_Id :=
-                Make_Defining_Identifier
-                  (Loc, New_External_Name (Chars (Typ), 'S'));
- 
-       Constr : Node_Id;
-       Indic  : Node_Id;
-       C      : Node_Id;
-       Id     : Node_Id;
- 
-       procedure Set_Discriminant_Name (Id : Node_Id);
-       --  If the derived type has discriminants, they may rename discriminants
-       --  of the parent. When building the full view of the parent, we need to
-       --  recover the names of the original discriminants if the constraint is
-       --  given by named associations.
- 
-       ---------------------------
-       -- Set_Discriminant_Name --
-       ---------------------------
- 
-       procedure Set_Discriminant_Name (Id : Node_Id) is
-          Disc : Entity_Id;
- 
-       begin
-          Set_Original_Discriminant (Id, Empty);
- 
-          if Has_Discriminants (Typ) then
-             Disc := First_Discriminant (Typ);
-             while Present (Disc) loop
-                if Chars (Disc) = Chars (Id)
-                  and then Present (Corresponding_Discriminant (Disc))
-                then
-                   Set_Chars (Id, Chars (Corresponding_Discriminant (Disc)));
-                end if;
-                Next_Discriminant (Disc);
-             end loop;
-          end if;
-       end Set_Discriminant_Name;
- 
-    --  Start of processing for Build_Underlying_Full_View
- 
-    begin
-       if Nkind (N) = N_Full_Type_Declaration then
-          Constr := Constraint (Subtype_Indication (Type_Definition (N)));
- 
-       elsif Nkind (N) = N_Subtype_Declaration then
-          Constr := New_Copy_Tree (Constraint (Subtype_Indication (N)));
- 
-       elsif Nkind (N) = N_Component_Declaration then
-          Constr :=
-            New_Copy_Tree
-              (Constraint (Subtype_Indication (Component_Definition (N))));
- 
-       else
-          raise Program_Error;
-       end if;
- 
-       C := First (Constraints (Constr));
-       while Present (C) loop
-          if Nkind (C) = N_Discriminant_Association then
-             Id := First (Selector_Names (C));
-             while Present (Id) loop
-                Set_Discriminant_Name (Id);
-                Next (Id);
-             end loop;
-          end if;
- 
-          Next (C);
-       end loop;
- 
-       Indic :=
-         Make_Subtype_Declaration (Loc,
-           Defining_Identifier => Subt,
-           Subtype_Indication  =>
-             Make_Subtype_Indication (Loc,
-               Subtype_Mark => New_Occurrence_Of (Par, Loc),
-               Constraint   => New_Copy_Tree (Constr)));
- 
-       --  If this is a component subtype for an outer itype, it is not
-       --  a list member, so simply set the parent link for analysis: if
-       --  the enclosing type does not need to be in a declarative list,
-       --  neither do the components.
- 
-       if Is_List_Member (N)
-         and then Nkind (N) /= N_Component_Declaration
-       then
-          Insert_Before (N, Indic);
-       else
-          Set_Parent (Indic, Parent (N));
-       end if;
- 
-       Analyze (Indic);
-       Set_Underlying_Full_View (Typ, Full_View (Subt));
-       Set_Is_Underlying_Full_View (Full_View (Subt));
-    end Build_Underlying_Full_View;
- 
     -------------------------------
     -- Check_Abstract_Overriding --
     -------------------------------
--- 10578,10583 ----
*************** package body Sem_Ch3 is
*** 10617,10625 ****
              if Ekind (Contr_Typ) /= E_Protected_Type then
                 Error_Msg_Node_2 := Contr_Typ;
                 Error_Msg_NE
!                  ("interface subprogram & cannot be implemented by a " &
!                   "primitive procedure of task type &", Subp_Alias,
!                   Iface_Alias);
  
              --  An interface subprogram whose implementation kind is By_
              --  Protected_Procedure must be implemented by a procedure.
--- 10661,10669 ----
              if Ekind (Contr_Typ) /= E_Protected_Type then
                 Error_Msg_Node_2 := Contr_Typ;
                 Error_Msg_NE
!                  ("interface subprogram & cannot be implemented by a "
!                   & "primitive procedure of task type &",
!                   Subp_Alias, Iface_Alias);
  
              --  An interface subprogram whose implementation kind is By_
              --  Protected_Procedure must be implemented by a procedure.
*************** package body Sem_Ch3 is
*** 10627,10654 ****
              elsif Ekind (Impl_Subp) /= E_Procedure then
                 Error_Msg_Node_2 := Iface_Alias;
                 Error_Msg_NE
!                  ("type & must implement abstract subprogram & with a " &
!                   "procedure", Subp_Alias, Contr_Typ);
  
              elsif Present (Get_Rep_Pragma (Impl_Subp, Name_Implemented))
                and then Implementation_Kind (Impl_Subp) /= Impl_Kind
              then
                 Error_Msg_Name_1 := Impl_Kind;
                 Error_Msg_N
!                 ("overriding operation& must have synchronization%",
!                  Subp_Alias);
              end if;
  
           --  If primitive has Optional synchronization, overriding operation
!          --  must match if it has an explicit synchronization..
  
           elsif Present (Get_Rep_Pragma (Impl_Subp, Name_Implemented))
             and then Implementation_Kind (Impl_Subp) /= Impl_Kind
           then
!                Error_Msg_Name_1 := Impl_Kind;
!                Error_Msg_N
!                 ("overriding operation& must have syncrhonization%",
!                  Subp_Alias);
           end if;
        end Check_Pragma_Implemented;
  
--- 10671,10697 ----
              elsif Ekind (Impl_Subp) /= E_Procedure then
                 Error_Msg_Node_2 := Iface_Alias;
                 Error_Msg_NE
!                  ("type & must implement abstract subprogram & with a "
!                   & "procedure", Subp_Alias, Contr_Typ);
  
              elsif Present (Get_Rep_Pragma (Impl_Subp, Name_Implemented))
                and then Implementation_Kind (Impl_Subp) /= Impl_Kind
              then
                 Error_Msg_Name_1 := Impl_Kind;
                 Error_Msg_N
!                  ("overriding operation& must have synchronization%",
!                   Subp_Alias);
              end if;
  
           --  If primitive has Optional synchronization, overriding operation
!          --  must match if it has an explicit synchronization.
  
           elsif Present (Get_Rep_Pragma (Impl_Subp, Name_Implemented))
             and then Implementation_Kind (Impl_Subp) /= Impl_Kind
           then
!             Error_Msg_Name_1 := Impl_Kind;
!             Error_Msg_N
!               ("overriding operation& must have synchronization%", Subp_Alias);
           end if;
        end Check_Pragma_Implemented;
  
*************** package body Sem_Ch3 is
*** 11899,11908 ****
  
              else
                 --  Specialize error message according to kind of illegal
!                --  initial expression.
  
!                if Nkind (Exp) = N_Type_Conversion
!                  and then Nkind (Expression (Exp)) = N_Function_Call
                 then
                    --  No error for internally-generated object declarations,
                    --  which can come from build-in-place assignment statements.
--- 11942,11955 ----
  
              else
                 --  Specialize error message according to kind of illegal
!                --  initial expression. We check the Original_Node to cover
!                --  cases where the initialization expression of an object
!                --  declaration generated by the compiler has been rewritten
!                --  (such as for dispatching calls).
  
!                if Nkind (Original_Node (Exp)) = N_Type_Conversion
!                  and then
!                    Nkind (Expression (Original_Node (Exp))) = N_Function_Call
                 then
                    --  No error for internally-generated object declarations,
                    --  which can come from build-in-place assignment statements.
*************** package body Sem_Ch3 is
*** 12327,12410 ****
        --  Next_Entity field of full to ensure that the calls to Copy_Node do
        --  not corrupt the entity chain.
  
-       --  Note that the type of the full view is the same entity as the type
-       --  of the partial view. In this fashion, the subtype has access to the
-       --  correct view of the parent.
-       --  The list below included access types, but this leads to several
-       --  regressions. How should the base type of the full view be
-       --  set consistently for subtypes completed by access types?
- 
        Save_Next_Entity := Next_Entity (Full);
        Save_Homonym     := Homonym (Priv);
  
!       case Ekind (Full_Base) is
!          when Class_Wide_Kind
!             | Private_Kind
!             | Protected_Kind
!             | Task_Kind
!             | E_Record_Subtype
!             | E_Record_Type
!          =>
!             Copy_Node (Priv, Full);
  
!             Set_Has_Discriminants
!                              (Full, Has_Discriminants (Full_Base));
!             Set_Has_Unknown_Discriminants
!                              (Full, Has_Unknown_Discriminants (Full_Base));
!             Set_First_Entity (Full, First_Entity (Full_Base));
!             Set_Last_Entity  (Full, Last_Entity (Full_Base));
  
!             --  If the underlying base type is constrained, we know that the
!             --  full view of the subtype is constrained as well (the converse
!             --  is not necessarily true).
  
!             if Is_Constrained (Full_Base) then
!                Set_Is_Constrained (Full);
!             end if;
  
!          when others =>
!             Copy_Node (Full_Base, Full);
  
!             Set_Chars         (Full, Chars (Priv));
!             Conditional_Delay (Full, Priv);
!             Set_Sloc          (Full, Sloc (Priv));
!       end case;
  
!       Link_Entities                 (Full, Save_Next_Entity);
!       Set_Homonym                   (Full, Save_Homonym);
!       Set_Associated_Node_For_Itype (Full, Related_Nod);
  
!       --  Set common attributes for all subtypes: kind, convention, etc.
  
!       Set_Ekind (Full, Subtype_Kind (Ekind (Full_Base)));
!       Set_Convention (Full, Convention (Full_Base));
  
!       --  The Etype of the full view is inconsistent. Gigi needs to see the
!       --  structural full view, which is what the current scheme gives: the
!       --  Etype of the full view is the etype of the full base. However, if the
!       --  full base is a derived type, the full view then looks like a subtype
!       --  of the parent, not a subtype of the full base. If instead we write:
  
!       --       Set_Etype (Full, Full_Base);
  
!       --  then we get inconsistencies in the front-end (confusion between
!       --  views). Several outstanding bugs are related to this ???
  
        Set_Is_First_Subtype (Full, False);
        Set_Scope            (Full, Scope (Priv));
        Set_Size_Info        (Full, Full_Base);
        Set_RM_Size          (Full, RM_Size (Full_Base));
        Set_Is_Itype         (Full);
  
-       --  For the unusual case of a type with unknown discriminants whose
-       --  completion is an array, use the proper full base.
- 
-       if Is_Array_Type (Full_Base)
-         and then Has_Unknown_Discriminants (Priv)
-       then
-          Set_Etype (Full, Full_Base);
-       end if;
- 
        --  A subtype of a private-type-without-discriminants, whose full-view
        --  has discriminants with default expressions, is not constrained.
  
--- 12374,12460 ----
        --  Next_Entity field of full to ensure that the calls to Copy_Node do
        --  not corrupt the entity chain.
  
        Save_Next_Entity := Next_Entity (Full);
        Save_Homonym     := Homonym (Priv);
  
!       if Is_Private_Type (Full_Base)
!         or else Is_Record_Type (Full_Base)
!         or else Is_Concurrent_Type (Full_Base)
!       then
!          Copy_Node (Priv, Full);
  
!          --  Note that the Etype of the full view is the same as the Etype of
!          --  the partial view. In this fashion, the subtype has access to the
!          --  correct view of the parent.
  
!          Set_Has_Discriminants (Full, Has_Discriminants (Full_Base));
!          Set_Has_Unknown_Discriminants
!                                  (Full, Has_Unknown_Discriminants (Full_Base));
!          Set_First_Entity (Full, First_Entity (Full_Base));
!          Set_Last_Entity  (Full, Last_Entity (Full_Base));
  
!          --  If the underlying base type is constrained, we know that the
!          --  full view of the subtype is constrained as well (the converse
!          --  is not necessarily true).
  
!          if Is_Constrained (Full_Base) then
!             Set_Is_Constrained (Full);
!          end if;
  
!       else
!          Copy_Node (Full_Base, Full);
  
!          --  The following subtlety with the Etype of the full view needs to be
!          --  taken into account here. One could think that it must naturally be
!          --  set to the base type of the full base:
  
!          --    Set_Etype (Full, Base_Type (Full_Base));
  
!          --  so that the full view becomes a subtype of the full base when the
!          --  latter is a base type, which must for example happen when the full
!          --  base is declared as derived type. That's also correct if the full
!          --  base is declared as an array type, or a floating-point type, or a
!          --  fixed-point type, or a signed integer type, as these declarations
!          --  create an implicit base type and a first subtype so the Etype of
!          --  the full views must be the implicit base type. But that's wrong
!          --  if the full base is declared as an access type, or an enumeration
!          --  type, or a modular integer type, as these declarations directly
!          --  create a base type, i.e. with Etype pointing to itself. Moreover
!          --  the full base being declared in the private part, i.e. when the
!          --  views are swapped, the end result is that the Etype of the full
!          --  base is set to its private view in this case and that we need to
!          --  propagate this setting to the full view in order for the subtype
!          --  to be compatible with the base type.
  
!          if Is_Base_Type (Full_Base)
!            and then (Is_Derived_Type (Full_Base)
!                       or else Ekind (Full_Base) in Array_Kind
!                       or else Ekind (Full_Base) in Fixed_Point_Kind
!                       or else Ekind (Full_Base) in Float_Kind
!                       or else Ekind (Full_Base) in Signed_Integer_Kind)
!          then
!             Set_Etype (Full, Full_Base);
!          end if;
  
!          Set_Chars         (Full, Chars (Priv));
!          Set_Sloc          (Full, Sloc (Priv));
!          Conditional_Delay (Full, Priv);
!       end if;
  
!       Link_Entities                 (Full, Save_Next_Entity);
!       Set_Homonym                   (Full, Save_Homonym);
!       Set_Associated_Node_For_Itype (Full, Related_Nod);
! 
!       --  Set common attributes for all subtypes: kind, convention, etc.
  
+       Set_Ekind            (Full, Subtype_Kind (Ekind (Full_Base)));
+       Set_Convention       (Full, Convention (Full_Base));
        Set_Is_First_Subtype (Full, False);
        Set_Scope            (Full, Scope (Priv));
        Set_Size_Info        (Full, Full_Base);
        Set_RM_Size          (Full, RM_Size (Full_Base));
        Set_Is_Itype         (Full);
  
        --  A subtype of a private-type-without-discriminants, whose full-view
        --  has discriminants with default expressions, is not constrained.
  
*************** package body Sem_Ch3 is
*** 12450,12456 ****
  
        Set_Freeze_Node (Full, Empty);
        Set_Is_Frozen (Full, False);
-       Set_Full_View (Priv, Full);
  
        if Has_Discriminants (Full) then
           Set_Stored_Constraint_From_Discriminant_Constraint (Full);
--- 12500,12505 ----
*************** package body Sem_Ch3 is
*** 12471,12502 ****
             (Full, Related_Nod, Full_Base, Discriminant_Constraint (Priv));
  
        --  If the full base is itself derived from private, build a congruent
!       --  subtype of its underlying type, for use by the back end. For a
!       --  constrained record component, the declaration cannot be placed on
!       --  the component list, but it must nevertheless be built an analyzed, to
!       --  supply enough information for Gigi to compute the size of component.
  
!       elsif Ekind (Full_Base) in Private_Kind
!         and then Is_Derived_Type (Full_Base)
!         and then Has_Discriminants (Full_Base)
!         and then (Ekind (Current_Scope) /= E_Record_Subtype)
        then
!          if not Is_Itype (Priv)
!            and then
!              Nkind (Subtype_Indication (Parent (Priv))) = N_Subtype_Indication
!          then
!             Build_Underlying_Full_View
!               (Parent (Priv), Full, Etype (Full_Base));
! 
!          elsif Nkind (Related_Nod) = N_Component_Declaration then
!             Build_Underlying_Full_View (Related_Nod, Full, Etype (Full_Base));
!          end if;
  
        elsif Is_Record_Type (Full_Base) then
  
           --  Show Full is simply a renaming of Full_Base
  
           Set_Cloned_Subtype (Full, Full_Base);
        end if;
  
        --  It is unsafe to share the bounds of a scalar type, because the Itype
--- 12520,12561 ----
             (Full, Related_Nod, Full_Base, Discriminant_Constraint (Priv));
  
        --  If the full base is itself derived from private, build a congruent
!       --  subtype of its underlying full view, for use by the back end.
  
!       elsif Is_Private_Type (Full_Base)
!         and then Present (Underlying_Full_View (Full_Base))
        then
!          declare
!             Underlying_Full_Base : constant Entity_Id
!                                            := Underlying_Full_View (Full_Base);
!             Underlying_Full : constant Entity_Id
!                        := Make_Defining_Identifier (Sloc (Priv), Chars (Priv));
!          begin
!             Set_Is_Itype (Underlying_Full);
!             Set_Associated_Node_For_Itype (Underlying_Full, Related_Nod);
!             Complete_Private_Subtype
!               (Priv, Underlying_Full, Underlying_Full_Base, Related_Nod);
!             Set_Underlying_Full_View (Full, Underlying_Full);
!             Set_Is_Underlying_Full_View (Underlying_Full);
!          end;
  
        elsif Is_Record_Type (Full_Base) then
  
           --  Show Full is simply a renaming of Full_Base
  
           Set_Cloned_Subtype (Full, Full_Base);
+ 
+          --  Propagate predicates
+ 
+          if Has_Predicates (Full_Base) then
+             Set_Has_Predicates (Full);
+ 
+             if Present (Predicate_Function (Full_Base))
+               and then No (Predicate_Function (Full))
+             then
+                Set_Predicate_Function (Full, Predicate_Function (Full_Base));
+             end if;
+          end if;
        end if;
  
        --  It is unsafe to share the bounds of a scalar type, because the Itype
*************** package body Sem_Ch3 is
*** 12940,12960 ****
                or else Is_Incomplete_Or_Private_Type (Desig_Type))
          and then not Is_Constrained (Desig_Type)
        then
!          --  ??? The following code is a temporary bypass to ignore a
!          --  discriminant constraint on access type if it is constraining
!          --  the current record. Avoid creating the implicit subtype of the
!          --  record we are currently compiling since right now, we cannot
!          --  handle these. For now, just return the access type itself.
  
           if Desig_Type = Current_Scope
             and then No (Def_Id)
           then
              Set_Ekind (Desig_Subtype, E_Record_Subtype);
              Def_Id := Entity (Subtype_Mark (S));
  
              --  This call added to ensure that the constraint is analyzed
              --  (needed for a B test). Note that we still return early from
!             --  this procedure to avoid recursive processing. ???
  
              Constrain_Discriminated_Type
                (Desig_Subtype, S, Related_Nod, For_Access => True);
--- 12999,13031 ----
                or else Is_Incomplete_Or_Private_Type (Desig_Type))
          and then not Is_Constrained (Desig_Type)
        then
!          --  If this is a constrained access definition for a record
!          --  component, we leave the type as an unconstrained access,
!          --  and mark the component so that its actual type is built
!          --  at a point of use (e.g., an assignment statement). This
!          --  is handled in Sem_Util.Build_Actual_Subtype_Of_Component.
  
           if Desig_Type = Current_Scope
             and then No (Def_Id)
           then
+             Desig_Subtype :=
+               Create_Itype
+                 (E_Void, Related_Nod, Scope_Id => Scope (Desig_Type));
              Set_Ekind (Desig_Subtype, E_Record_Subtype);
              Def_Id := Entity (Subtype_Mark (S));
  
+             --  We indicate that the component has a per-object constraint
+             --  for treatment at a point of use, even though the constraint
+             --  may be independent of discriminants of the enclosing type.
+ 
+             if Nkind (Related_Nod) = N_Component_Declaration then
+                Set_Has_Per_Object_Constraint
+                  (Defining_Identifier (Related_Nod));
+             end if;
+ 
              --  This call added to ensure that the constraint is analyzed
              --  (needed for a B test). Note that we still return early from
!             --  this procedure to avoid recursive processing.
  
              Constrain_Discriminated_Type
                (Desig_Subtype, S, Related_Nod, For_Access => True);
*************** package body Sem_Ch3 is
*** 13186,13191 ****
--- 13257,13263 ----
  
        Set_Is_Constrained     (Def_Id, True);
        Set_Is_Aliased         (Def_Id, Is_Aliased (T));
+       Set_Is_Independent     (Def_Id, Is_Independent (T));
        Set_Depends_On_Private (Def_Id, Has_Private_Component (Def_Id));
  
        Set_Is_Private_Composite (Def_Id, Is_Private_Composite (T));
*************** package body Sem_Ch3 is
*** 13230,13236 ****
  
        function Build_Constrained_Discriminated_Type
          (Old_Type : Entity_Id) return Entity_Id;
!       --  Ditto for record components
  
        function Build_Constrained_Access_Type
          (Old_Type : Entity_Id) return Entity_Id;
--- 13302,13310 ----
  
        function Build_Constrained_Discriminated_Type
          (Old_Type : Entity_Id) return Entity_Id;
!       --  Ditto for record components. Handle the case where the constraint
!       --  is a conversion of the discriminant value, introduced during
!       --  expansion.
  
        function Build_Constrained_Access_Type
          (Old_Type : Entity_Id) return Entity_Id;
*************** package body Sem_Ch3 is
*** 13415,13420 ****
--- 13489,13505 ----
  
              if Is_Discriminant (Expr) then
                 Need_To_Create_Itype := True;
+ 
+             --  After expansion of discriminated task types, the value
+             --  of the discriminant may be converted to a run-time type
+             --  for restricted run-times. Propagate the value of the
+             --  discriminant as well, so that e.g. the secondary stack
+             --  component has a static constraint. Necessary for LLVM.
+ 
+             elsif Nkind (Expr) = N_Type_Conversion
+               and then Is_Discriminant (Expression (Expr))
+             then
+                Need_To_Create_Itype := True;
              end if;
  
              Next_Elmt (Old_Constraint);
*************** package body Sem_Ch3 is
*** 13429,13434 ****
--- 13514,13525 ----
  
                 if Is_Discriminant (Expr) then
                    Expr := Get_Discr_Value (Expr);
+ 
+                elsif Nkind (Expr) = N_Type_Conversion
+                  and then Is_Discriminant (Expression (Expr))
+                then
+                   Expr := New_Copy_Tree (Expr);
+                   Set_Expression (Expr, Get_Discr_Value (Expression (Expr)));
                 end if;
  
                 Append (New_Copy_Tree (Expr), To => Constr_List);
*************** package body Sem_Ch3 is
*** 13734,13739 ****
--- 13825,13831 ----
     begin
        Set_Etype             (T_Sub, Corr_Rec);
        Set_Has_Discriminants (T_Sub, Has_Discriminants (Prot_Subt));
+       Set_Is_Tagged_Type    (T_Sub, Is_Tagged_Type (Corr_Rec));
        Set_Is_Constrained    (T_Sub, True);
        Set_First_Entity      (T_Sub, First_Entity (Corr_Rec));
        Set_Last_Entity       (T_Sub, Last_Entity  (Corr_Rec));
*************** package body Sem_Ch3 is
*** 14508,14523 ****
  
     procedure Copy_Array_Base_Type_Attributes (T1, T2 : Entity_Id) is
     begin
!       Set_Component_Alignment      (T1, Component_Alignment      (T2));
!       Set_Component_Type           (T1, Component_Type           (T2));
!       Set_Component_Size           (T1, Component_Size           (T2));
!       Set_Has_Controlled_Component (T1, Has_Controlled_Component (T2));
!       Set_Has_Non_Standard_Rep     (T1, Has_Non_Standard_Rep     (T2));
!       Propagate_Concurrent_Flags   (T1, T2);
!       Set_Is_Packed                (T1, Is_Packed                (T2));
!       Set_Has_Aliased_Components   (T1, Has_Aliased_Components   (T2));
!       Set_Has_Atomic_Components    (T1, Has_Atomic_Components    (T2));
!       Set_Has_Volatile_Components  (T1, Has_Volatile_Components  (T2));
     end Copy_Array_Base_Type_Attributes;
  
     -----------------------------------
--- 14600,14616 ----
  
     procedure Copy_Array_Base_Type_Attributes (T1, T2 : Entity_Id) is
     begin
!       Set_Component_Alignment        (T1, Component_Alignment        (T2));
!       Set_Component_Type             (T1, Component_Type             (T2));
!       Set_Component_Size             (T1, Component_Size             (T2));
!       Set_Has_Controlled_Component   (T1, Has_Controlled_Component   (T2));
!       Set_Has_Non_Standard_Rep       (T1, Has_Non_Standard_Rep       (T2));
!       Propagate_Concurrent_Flags     (T1,                             T2);
!       Set_Is_Packed                  (T1, Is_Packed                  (T2));
!       Set_Has_Aliased_Components     (T1, Has_Aliased_Components     (T2));
!       Set_Has_Atomic_Components      (T1, Has_Atomic_Components      (T2));
!       Set_Has_Independent_Components (T1, Has_Independent_Components (T2));
!       Set_Has_Volatile_Components    (T1, Has_Volatile_Components    (T2));
     end Copy_Array_Base_Type_Attributes;
  
     -----------------------------------
*************** package body Sem_Ch3 is
*** 14528,14544 ****
     begin
        Set_Size_Info (T1, T2);
  
!       Set_First_Index            (T1, First_Index            (T2));
!       Set_Is_Aliased             (T1, Is_Aliased             (T2));
!       Set_Is_Volatile            (T1, Is_Volatile            (T2));
!       Set_Treat_As_Volatile      (T1, Treat_As_Volatile      (T2));
!       Set_Is_Constrained         (T1, Is_Constrained         (T2));
!       Set_Depends_On_Private     (T1, Has_Private_Component  (T2));
!       Inherit_Rep_Item_Chain     (T1,                         T2);
!       Set_Convention             (T1, Convention             (T2));
!       Set_Is_Limited_Composite   (T1, Is_Limited_Composite   (T2));
!       Set_Is_Private_Composite   (T1, Is_Private_Composite   (T2));
!       Set_Packed_Array_Impl_Type (T1, Packed_Array_Impl_Type (T2));
     end Copy_Array_Subtype_Attributes;
  
     -----------------------------------
--- 14621,14640 ----
     begin
        Set_Size_Info (T1, T2);
  
!       Set_First_Index             (T1, First_Index             (T2));
!       Set_Is_Aliased              (T1, Is_Aliased              (T2));
!       Set_Is_Atomic               (T1, Is_Atomic               (T2));
!       Set_Is_Independent          (T1, Is_Independent          (T2));
!       Set_Is_Volatile             (T1, Is_Volatile             (T2));
!       Set_Is_Volatile_Full_Access (T1, Is_Volatile_Full_Access (T2));
!       Set_Treat_As_Volatile       (T1, Treat_As_Volatile       (T2));
!       Set_Is_Constrained          (T1, Is_Constrained          (T2));
!       Set_Depends_On_Private      (T1, Has_Private_Component   (T2));
!       Inherit_Rep_Item_Chain      (T1,                          T2);
!       Set_Convention              (T1, Convention              (T2));
!       Set_Is_Limited_Composite    (T1, Is_Limited_Composite    (T2));
!       Set_Is_Private_Composite    (T1, Is_Private_Composite    (T2));
!       Set_Packed_Array_Impl_Type  (T1, Packed_Array_Impl_Type  (T2));
     end Copy_Array_Subtype_Attributes;
  
     -----------------------------------
*************** package body Sem_Ch3 is
*** 15510,15516 ****
           Set_Derived_Name;
  
        --  Otherwise, the type is inheriting a private operation, so enter it
!       --  with a special name so it can't be overridden.
  
        else
           Set_Chars (New_Subp, New_External_Name (Chars (Parent_Subp), 'P'));
--- 15606,15613 ----
           Set_Derived_Name;
  
        --  Otherwise, the type is inheriting a private operation, so enter it
!       --  with a special name so it can't be overridden. See also below, where
!       --  we check for this case, and if so avoid setting Requires_Overriding.
  
        else
           Set_Chars (New_Subp, New_External_Name (Chars (Parent_Subp), 'P'));
*************** package body Sem_Ch3 is
*** 15690,15696 ****
             or else Is_Abstract_Subprogram (Alias (New_Subp))
           then
              Set_Is_Abstract_Subprogram (New_Subp);
!          else
              Set_Requires_Overriding (New_Subp);
           end if;
  
--- 15787,15801 ----
             or else Is_Abstract_Subprogram (Alias (New_Subp))
           then
              Set_Is_Abstract_Subprogram (New_Subp);
! 
!          --  If the Chars of the new subprogram is different from that of the
!          --  parent's one, it means that we entered it with a special name so
!          --  it can't be overridden (see above). In that case we had better not
!          --  *require* it to be overridden. This is the case where the parent
!          --  type inherited the operation privately, so there's no danger of
!          --  dangling dispatching.
! 
!          elsif Chars (New_Subp) = Chars (Alias (New_Subp)) then
              Set_Requires_Overriding (New_Subp);
           end if;
  
*************** package body Sem_Ch3 is
*** 17803,17814 ****
        Digs_Val      : Uint;
        Base_Typ      : Entity_Id;
        Implicit_Base : Entity_Id;
-       Bound         : Node_Id;
  
        function Can_Derive_From (E : Entity_Id) return Boolean;
        --  Find if given digits value, and possibly a specified range, allows
        --  derivation from specified type
  
        function Find_Base_Type return Entity_Id;
        --  Find a predefined base type that Def can derive from, or generate
        --  an error and substitute Long_Long_Float if none exists.
--- 17908,17923 ----
        Digs_Val      : Uint;
        Base_Typ      : Entity_Id;
        Implicit_Base : Entity_Id;
  
        function Can_Derive_From (E : Entity_Id) return Boolean;
        --  Find if given digits value, and possibly a specified range, allows
        --  derivation from specified type
  
+       procedure Convert_Bound (B : Node_Id);
+       --  If specified, the bounds must be static but may be of different
+       --  types. They must be converted into machine numbers of the base type,
+       --  in accordance with RM 4.9(38).
+ 
        function Find_Base_Type return Entity_Id;
        --  Find a predefined base type that Def can derive from, or generate
        --  an error and substitute Long_Long_Float if none exists.
*************** package body Sem_Ch3 is
*** 17846,17851 ****
--- 17955,17982 ----
           return True;
        end Can_Derive_From;
  
+       -------------------
+       -- Convert_Bound --
+       --------------------
+ 
+       procedure Convert_Bound (B : Node_Id) is
+       begin
+          --  If the bound is not a literal it can only be static if it is
+          --  a static constant, possibly of a specified type.
+ 
+          if Is_Entity_Name (B)
+            and then Ekind (Entity (B)) = E_Constant
+          then
+             Rewrite (B, Constant_Value (Entity (B)));
+          end if;
+ 
+          if Nkind (B) = N_Real_Literal then
+             Set_Realval (B, Machine (Base_Typ, Realval (B), Round, B));
+             Set_Is_Machine_Number (B);
+             Set_Etype (B, Base_Typ);
+          end if;
+       end Convert_Bound;
+ 
        --------------------
        -- Find_Base_Type --
        --------------------
*************** package body Sem_Ch3 is
*** 17943,17966 ****
           Set_Scalar_Range (T, Real_Range_Specification (Def));
           Set_Is_Constrained (T);
  
!          --  The bounds of this range must be converted to machine numbers
!          --  in accordance with RM 4.9(38).
! 
!          Bound := Type_Low_Bound (T);
! 
!          if Nkind (Bound) = N_Real_Literal then
!             Set_Realval
!               (Bound, Machine (Base_Typ, Realval (Bound), Round, Bound));
!             Set_Is_Machine_Number (Bound);
!          end if;
! 
!          Bound := Type_High_Bound (T);
! 
!          if Nkind (Bound) = N_Real_Literal then
!             Set_Realval
!               (Bound, Machine (Base_Typ, Realval (Bound), Round, Bound));
!             Set_Is_Machine_Number (Bound);
!          end if;
  
        else
           Set_Scalar_Range (T, Scalar_Range (Base_Typ));
--- 18074,18081 ----
           Set_Scalar_Range (T, Real_Range_Specification (Def));
           Set_Is_Constrained (T);
  
!          Convert_Bound (Type_Low_Bound (T));
!          Convert_Bound (Type_High_Bound (T));
  
        else
           Set_Scalar_Range (T, Scalar_Range (Base_Typ));
*************** package body Sem_Ch3 is
*** 19663,19670 ****
           =>
              return not Comes_From_Source (Exp)
                and then
!                 OK_For_Limited_Init_In_05
!                   (Typ, Expression (Original_Node (Exp)));
  
           when N_Explicit_Dereference
              | N_Indexed_Component
--- 19778,19797 ----
           =>
              return not Comes_From_Source (Exp)
                and then
!                 --  If the conversion has been rewritten, check Original_Node
! 
!                 ((Original_Node (Exp) /= Exp
!                    and then
!                      OK_For_Limited_Init_In_05 (Typ, Original_Node (Exp)))
! 
!                   --  Otherwise, check the expression of the compiler-generated
!                   --  conversion (which is a conversion that we want to ignore
!                   --  for purposes of the limited-initialization restrictions).
! 
!                   or else
!                     (Original_Node (Exp) = Exp
!                       and then
!                         OK_For_Limited_Init_In_05 (Typ, Expression (Exp))));
  
           when N_Explicit_Dereference
              | N_Indexed_Component
*************** package body Sem_Ch3 is
*** 19893,19912 ****
        Related_Nod : Node_Id)
     is
        Id_B   : constant Entity_Id := Base_Type (Id);
!       Full_B : Entity_Id := Full_View (Id_B);
        Full   : Entity_Id;
  
     begin
        if Present (Full_B) then
  
-          --  Get to the underlying full view if necessary
- 
-          if Is_Private_Type (Full_B)
-            and then Present (Underlying_Full_View (Full_B))
-          then
-             Full_B := Underlying_Full_View (Full_B);
-          end if;
- 
           --  The Base_Type is already completed, we can complete the subtype
           --  now. We have to create a new entity with the same name, Thus we
           --  can't use Create_Itype.
--- 20020,20031 ----
        Related_Nod : Node_Id)
     is
        Id_B   : constant Entity_Id := Base_Type (Id);
!       Full_B : constant Entity_Id := Full_View (Id_B);
        Full   : Entity_Id;
  
     begin
        if Present (Full_B) then
  
           --  The Base_Type is already completed, we can complete the subtype
           --  now. We have to create a new entity with the same name, Thus we
           --  can't use Create_Itype.
*************** package body Sem_Ch3 is
*** 19915,19920 ****
--- 20034,20040 ----
           Set_Is_Itype (Full);
           Set_Associated_Node_For_Itype (Full, Related_Nod);
           Complete_Private_Subtype (Id, Full, Full_B, Related_Nod);
+          Set_Full_View (Id, Full);
        end if;
  
        --  The parent subtype may be private, but the base might not, in some
*************** package body Sem_Ch3 is
*** 20720,20725 ****
--- 20840,20846 ----
                 end if;
  
                 Complete_Private_Subtype (Full, Priv, Full_T, N);
+                Set_Full_View (Full, Priv);
  
                 if Present (Priv_Scop) then
                    Pop_Scope;
*************** package body Sem_Ch3 is
*** 21982,21987 ****
--- 22103,22109 ----
              Set_Ekind                     (Tag_Comp, E_Component);
              Set_Is_Tag                    (Tag_Comp);
              Set_Is_Aliased                (Tag_Comp);
+             Set_Is_Independent            (Tag_Comp);
              Set_Etype                     (Tag_Comp, RTE (RE_Tag));
              Set_DT_Entry_Count            (Tag_Comp, No_Uint);
              Set_Original_Record_Component (Tag_Comp, Tag_Comp);
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch4.adb gcc-10.1.0/gcc/ada/sem_ch4.adb
*** gcc-9.3.0/gcc/ada/sem_ch4.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch4.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Ch4 is
*** 676,684 ****
  
                 --  In GNATprove mode we need to preserve the link between
                 --  the original subtype indication and the anonymous subtype,
!                --  to extend proofs to constrained acccess types.
  
!                if Expander_Active or else GNATprove_Mode then
                    Def_Id := Make_Temporary (Loc, 'S');
  
                    Insert_Action (E,
--- 676,690 ----
  
                 --  In GNATprove mode we need to preserve the link between
                 --  the original subtype indication and the anonymous subtype,
!                --  to extend proofs to constrained access types. We only do
!                --  that outside of spec expressions, otherwise the declaration
!                --  cannot be inserted and analyzed. In such a case, GNATprove
!                --  later rejects the allocator as it is not used here in
!                --  a non-interfering context (SPARK 4.8(2) and 7.1.3(12)).
  
!                if Expander_Active
!                  or else (GNATprove_Mode and then not In_Spec_Expression)
!                then
                    Def_Id := Make_Temporary (Loc, 'S');
  
                    Insert_Action (E,
*************** package body Sem_Ch4 is
*** 790,814 ****
                            ("\constraint with discriminant values required", N);
                       end if;
  
!                   --  Limited Ada 2005 and general nonlimited case
  
                    else
!                      Error_Msg_N
!                        ("uninitialized unconstrained allocation not "
!                         & "allowed", N);
  
!                      if Is_Array_Type (Type_Id) then
                          Error_Msg_N
!                           ("\qualified expression or constraint with "
!                            & "array bounds required", N);
  
!                      elsif Has_Unknown_Discriminants (Type_Id) then
!                         Error_Msg_N ("\qualified expression required", N);
  
!                      else pragma Assert (Has_Discriminants (Type_Id));
!                         Error_Msg_N
!                           ("\qualified expression or constraint with "
!                            & "discriminant values required", N);
                       end if;
                    end if;
                 end if;
--- 796,842 ----
                            ("\constraint with discriminant values required", N);
                       end if;
  
!                   --  Limited Ada 2005 and general nonlimited case.
!                   --  This is an error, except in the case of an
!                   --  uninitialized allocator that is generated
!                   --  for a build-in-place function return of a
!                   --  discriminated but compile-time-known-size
!                   --  type.
  
                    else
!                      if Original_Node (N) /= N
!                        and then Nkind (Original_Node (N)) = N_Allocator
!                      then
!                         declare
!                            Qual : constant Node_Id :=
!                              Expression (Original_Node (N));
!                            pragma Assert
!                              (Nkind (Qual) = N_Qualified_Expression);
!                            Call : constant Node_Id := Expression (Qual);
!                            pragma Assert
!                              (Is_Expanded_Build_In_Place_Call (Call));
!                         begin
!                            null;
!                         end;
  
!                      else
                          Error_Msg_N
!                           ("uninitialized unconstrained allocation not "
!                            & "allowed", N);
  
!                         if Is_Array_Type (Type_Id) then
!                            Error_Msg_N
!                              ("\qualified expression or constraint with "
!                               & "array bounds required", N);
  
!                         elsif Has_Unknown_Discriminants (Type_Id) then
!                            Error_Msg_N ("\qualified expression required", N);
! 
!                         else pragma Assert (Has_Discriminants (Type_Id));
!                            Error_Msg_N
!                              ("\qualified expression or constraint with "
!                               & "discriminant values required", N);
!                         end if;
                       end if;
                    end if;
                 end if;
*************** package body Sem_Ch4 is
*** 1527,1533 ****
              --  there is only a limited view of it and there is nothing in
              --  the context of the current unit that has required a regular
              --  compilation of the unit containing the type. We recognize
!             --  this unusual case by the fact that that unit is not analyzed.
              --  Note that the call being analyzed is in a different unit from
              --  the function declaration, and nothing indicates that the type
              --  is a limited view.
--- 1555,1561 ----
              --  there is only a limited view of it and there is nothing in
              --  the context of the current unit that has required a regular
              --  compilation of the unit containing the type. We recognize
!             --  this unusual case by the fact that unit is not analyzed.
              --  Note that the call being analyzed is in a different unit from
              --  the function declaration, and nothing indicates that the type
              --  is a limited view.
*************** package body Sem_Ch4 is
*** 1699,1705 ****
  
        --  If the case expression is a formal object of mode in out, then
        --  treat it as having a nonstatic subtype by forcing use of the base
!       --  type (which has to get passed to Check_Case_Choices below).  Also
        --  use base type when the case expression is parenthesized.
  
        if Paren_Count (Expr) > 0
--- 1727,1733 ----
  
        --  If the case expression is a formal object of mode in out, then
        --  treat it as having a nonstatic subtype by forcing use of the base
!       --  type (which has to get passed to Check_Case_Choices below). Also
        --  use base type when the case expression is parenthesized.
  
        if Paren_Count (Expr) > 0
*************** package body Sem_Ch4 is
*** 2101,2121 ****
        if not Is_Overloaded (P) then
           if Is_Access_Type (Etype (P)) then
  
!             --  Set the Etype. We need to go through Is_For_Access_Subtypes to
!             --  avoid other problems caused by the Private_Subtype and it is
!             --  safe to go to the Base_Type because this is the same as
!             --  converting the access value to its Base_Type.
  
              declare
!                DT : Entity_Id := Designated_Type (Etype (P));
  
              begin
-                if Ekind (DT) = E_Private_Subtype
-                  and then Is_For_Access_Subtype (DT)
-                then
-                   DT := Base_Type (DT);
-                end if;
- 
                 --  An explicit dereference is a legal occurrence of an
                 --  incomplete type imported through a limited_with clause, if
                 --  the full view is visible, or if we are within an instance
--- 2129,2140 ----
        if not Is_Overloaded (P) then
           if Is_Access_Type (Etype (P)) then
  
!             --  Set the Etype
  
              declare
!                DT : constant Entity_Id := Designated_Type (Etype (P));
  
              begin
                 --  An explicit dereference is a legal occurrence of an
                 --  incomplete type imported through a limited_with clause, if
                 --  the full view is visible, or if we are within an instance
*************** package body Sem_Ch4 is
*** 3230,3235 ****
--- 3249,3255 ----
        --  is already known to be compatible, and because this may be an
        --  indexing of a call with default parameters.
  
+       First_Form  : Entity_Id;
        Formal      : Entity_Id;
        Actual      : Node_Id;
        Is_Indexed  : Boolean := False;
*************** package body Sem_Ch4 is
*** 3562,3569 ****
           --  Normalize_Actuals has chained the named associations in the
           --  correct order of the formals.
  
!          Actual := First_Actual (N);
!          Formal := First_Formal (Nam);
  
           --  If we are analyzing a call rewritten from object notation, skip
           --  first actual, which may be rewritten later as an explicit
--- 3582,3590 ----
           --  Normalize_Actuals has chained the named associations in the
           --  correct order of the formals.
  
!          Actual     := First_Actual (N);
!          Formal     := First_Formal (Nam);
!          First_Form := Formal;
  
           --  If we are analyzing a call rewritten from object notation, skip
           --  first actual, which may be rewritten later as an explicit
*************** package body Sem_Ch4 is
*** 3628,3686 ****
                    Next_Actual (Actual);
                    Next_Formal (Formal);
  
-                --  In a complex case where an enclosing generic and a nested
-                --  generic package, both declared with partially parameterized
-                --  formal subprograms with the same names, are instantiated
-                --  with the same type, the types of the actual parameter and
-                --  that of the formal may appear incompatible at first sight.
- 
-                --   generic
-                --      type Outer_T is private;
-                --      with function Func (Formal : Outer_T)
-                --                         return ... is <>;
- 
-                --   package Outer_Gen is
-                --      generic
-                --         type Inner_T is private;
-                --         with function Func (Formal : Inner_T)   --  (1)
-                --           return ... is <>;
- 
-                --      package Inner_Gen is
-                --         function Inner_Func (Formal : Inner_T)  --  (2)
-                --           return ... is (Func (Formal));
-                --      end Inner_Gen;
-                --   end Outer_Generic;
- 
-                --   package Outer_Inst is new Outer_Gen (Actual_T);
-                --   package Inner_Inst is new Outer_Inst.Inner_Gen (Actual_T);
- 
-                --  In the example above, the type of parameter
-                --  Inner_Func.Formal at (2) is incompatible with the type of
-                --  Func.Formal at (1) in the context of instantiations
-                --  Outer_Inst and Inner_Inst. In reality both types are generic
-                --  actual subtypes renaming base type Actual_T as part of the
-                --  generic prologues for the instantiations.
- 
-                --  Recognize this case and add a type conversion to allow this
-                --  kind of generic actual subtype conformance. Note that this
-                --  is done only when the call is non-overloaded because the
-                --  resolution mechanism already has the means to disambiguate
-                --  similar cases.
- 
-                elsif not Is_Overloaded (Name (N))
-                  and then Is_Type (Etype (Actual))
-                  and then Is_Type (Etype (Formal))
-                  and then Is_Generic_Actual_Type (Etype (Actual))
-                  and then Is_Generic_Actual_Type (Etype (Formal))
-                  and then Base_Type (Etype (Actual)) =
-                           Base_Type (Etype (Formal))
-                then
-                   Rewrite (Actual,
-                     Convert_To (Etype (Formal), Relocate_Node (Actual)));
-                   Analyze_And_Resolve (Actual, Etype (Formal));
-                   Next_Actual (Actual);
-                   Next_Formal (Formal);
- 
                 --  Handle failed type check
  
                 else
--- 3649,3654 ----
*************** package body Sem_Ch4 is
*** 3776,3781 ****
--- 3744,3797 ----
              end if;
           end loop;
  
+          --  Due to our current model of controlled type expansion we may
+          --  have resolved a user call to a non-visible controlled primitive
+          --  since these inherited subprograms may be generated in the current
+          --  scope. This is a side effect of the need for the expander to be
+          --  able to resolve internally generated calls.
+ 
+          --  Specifically, the issue appears when predefined controlled
+          --  operations get called on a type extension whose parent is a
+          --  private extension completed with a controlled extension - see
+          --  below:
+ 
+          --  package X is
+          --     type Par_Typ is tagged private;
+          --  private
+          --     type Par_Typ is new Controlled with null record;
+          --  end;
+          --  ...
+          --  procedure Main is
+          --     type Ext_Typ is new Par_Typ with null record;
+          --     Obj : Ext_Typ;
+          --  begin
+          --     Finalize (Obj); --  Will improperly resolve
+          --  end;
+ 
+          --  To avoid breaking privacy, Is_Hidden gets set elsewhere on such
+          --  primitives, but we still need to verify that Nam is indeed a
+          --  controlled subprogram. So, we do that here and issue the
+          --  appropriate error.
+ 
+          if Is_Hidden (Nam)
+            and then not In_Instance
+            and then not Comes_From_Source (Nam)
+            and then Comes_From_Source (N)
+ 
+            --  Verify Nam is a controlled primitive
+ 
+            and then Nam_In (Chars (Nam), Name_Adjust,
+                                          Name_Finalize,
+                                          Name_Initialize)
+            and then Ekind (Nam) = E_Procedure
+            and then Is_Controlled (Etype (First_Form))
+            and then No (Next_Formal (First_Form))
+          then
+             Error_Msg_Node_2 := Etype (First_Form);
+             Error_Msg_NE ("call to non-visible controlled primitive & on type"
+                             & " &", N, Nam);
+          end if;
+ 
           --  On exit, all actuals match
  
           Indicate_Name_And_Type;
*************** package body Sem_Ch4 is
*** 4035,4041 ****
  
        if Is_Class_Wide_Type (T) then
           if not Is_Overloaded (Expr) then
!             if Base_Type (Etype (Expr)) /= Base_Type (T) then
                 if Nkind (Expr) = N_Aggregate then
                    Error_Msg_N ("type of aggregate cannot be class-wide", Expr);
                 else
--- 4051,4059 ----
  
        if Is_Class_Wide_Type (T) then
           if not Is_Overloaded (Expr) then
!             if Base_Type (Etype (Expr)) /= Base_Type (T)
!               and then Etype (Expr) /= Raise_Type
!             then
                 if Nkind (Expr) = N_Aggregate then
                    Error_Msg_N ("type of aggregate cannot be class-wide", Expr);
                 else
*************** package body Sem_Ch4 is
*** 4844,4859 ****
                       Set_Etype (N, Etype (Comp));
  
                    else
!                      --  Component type depends on discriminants. Enter the
!                      --  main attributes of the subtype.
  
                       declare
                          Subt : constant Entity_Id :=
                                   Defining_Identifier (Act_Decl);
- 
                       begin
                          Set_Etype (Subt, Base_Type (Etype (Comp)));
-                         Set_Ekind (Subt, Ekind (Etype (Comp)));
                          Set_Etype (N, Subt);
                       end;
                    end if;
--- 4862,4876 ----
                       Set_Etype (N, Etype (Comp));
  
                    else
!                      --  If discriminants were present in the component
!                      --  declaration, they have been replaced by the
!                      --  actual values in the prefix object.
  
                       declare
                          Subt : constant Entity_Id :=
                                   Defining_Identifier (Act_Decl);
                       begin
                          Set_Etype (Subt, Base_Type (Etype (Comp)));
                          Set_Etype (N, Subt);
                       end;
                    end if;
*************** package body Sem_Ch4 is
*** 5050,5056 ****
                 if Comp = First_Private_Entity (Type_To_Use) then
                    if Etype (Sel) /= Any_Type then
  
!                      --  We have a candiate
  
                       exit;
  
--- 5067,5081 ----
                 if Comp = First_Private_Entity (Type_To_Use) then
                    if Etype (Sel) /= Any_Type then
  
!                      --  If the first private entity's name matches, then treat
!                      --  it as a private op: needed for the error check for
!                      --  illegal selection of private entities further below.
! 
!                      if Chars (Comp) = Chars (Sel) then
!                         Is_Private_Op := True;
!                      end if;
! 
!                      --  We have a candidate, so exit the loop
  
                       exit;
  
*************** package body Sem_Ch4 is
*** 6173,6205 ****
  
        if Nkind (N) = N_Function_Call then
           Get_First_Interp (Nam, X, It);
-          while Present (It.Nam) loop
-             if Ekind_In (It.Nam, E_Function, E_Operator) then
-                return;
-             else
-                Get_Next_Interp (X, It);
-             end if;
-          end loop;
  
!          --  If all interpretations are procedures, this deserves a
!          --  more precise message. Ditto if this appears as the prefix
!          --  of a selected component, which may be a lexical error.
  
!          Error_Msg_N
!            ("\context requires function call, found procedure name", Nam);
  
!          if Nkind (Parent (N)) = N_Selected_Component
!            and then N = Prefix (Parent (N))
!          then
!             Error_Msg_N -- CODEFIX
!               ("\period should probably be semicolon", Parent (N));
           end if;
  
        elsif Nkind (N) = N_Procedure_Call_Statement
          and then not Void_Interp_Seen
        then
!          Error_Msg_N (
!          "\function name found in procedure call", Nam);
        end if;
  
        All_Errors_Mode := Err_Mode;
--- 6198,6254 ----
  
        if Nkind (N) = N_Function_Call then
           Get_First_Interp (Nam, X, It);
  
!          if No (It.Typ)
!            and then Ekind (Entity (Name (N))) = E_Function
!            and then Present (Homonym (Entity (Name (N))))
!          then
!             --  A name may appear overloaded if it has a homonym, even if that
!             --  homonym is non-overloadable, in which case the overload list is
!             --  in fact empty. This specialized case deserves a special message
!             --  if the homonym is a child package.
  
!             declare
!                Nam : constant Node_Id := Name (N);
!                H   : constant Entity_Id := Homonym (Entity (Nam));
  
!             begin
!                if Ekind (H) = E_Package and then Is_Child_Unit (H) then
!                   Error_Msg_Qual_Level := 2;
!                   Error_Msg_NE ("if an entity in package& is meant, ", Nam, H);
!                   Error_Msg_NE ("\use a fully qualified name", Nam, H);
!                   Error_Msg_Qual_Level := 0;
!                end if;
!             end;
! 
!          else
!             while Present (It.Nam) loop
!                if Ekind_In (It.Nam, E_Function, E_Operator) then
!                   return;
!                else
!                   Get_Next_Interp (X, It);
!                end if;
!             end loop;
! 
!             --  If all interpretations are procedures, this deserves a more
!             --  precise message. Ditto if this appears as the prefix of a
!             --  selected component, which may be a lexical error.
! 
!             Error_Msg_N
!               ("\context requires function call, found procedure name", Nam);
! 
!             if Nkind (Parent (N)) = N_Selected_Component
!               and then N = Prefix (Parent (N))
!             then
!                Error_Msg_N -- CODEFIX
!                  ("\period should probably be semicolon", Parent (N));
!             end if;
           end if;
  
        elsif Nkind (N) = N_Procedure_Call_Statement
          and then not Void_Interp_Seen
        then
!          Error_Msg_N ("\function name found in procedure call", Nam);
        end if;
  
        All_Errors_Mode := Err_Mode;
*************** package body Sem_Ch4 is
*** 7375,7381 ****
                                    Etype (Next_Formal (First_Formal (Op_Id))))
                             then
                                Error_Msg_N
!                                 ("No legal interpretation for operator&", N);
                                Error_Msg_NE
                                  ("\use clause on& would make operation legal",
                                   N, Scope (Op_Id));
--- 7424,7430 ----
                                    Etype (Next_Formal (First_Formal (Op_Id))))
                             then
                                Error_Msg_N
!                                 ("no legal interpretation for operator&", N);
                                Error_Msg_NE
                                  ("\use clause on& would make operation legal",
                                   N, Scope (Op_Id));
*************** package body Sem_Ch4 is
*** 7393,7398 ****
--- 7442,7467 ----
                             Error_Msg_NE ("\left operand has}!",  N, Etype (L));
                             Error_Msg_NE ("\right operand has}!", N, Etype (R));
  
+                            --  For multiplication and division operators with
+                            --  a fixed-point operand and an integer operand,
+                            --  indicate that the integer operand should be of
+                            --  type Integer.
+ 
+                            if Nkind_In (N, N_Op_Multiply, N_Op_Divide)
+                              and then Is_Fixed_Point_Type (Etype (L))
+                              and then Is_Integer_Type (Etype (R))
+                            then
+                               Error_Msg_N
+                                 ("\convert right operand to `Integer`", N);
+ 
+                            elsif Nkind (N) = N_Op_Multiply
+                              and then Is_Fixed_Point_Type (Etype (R))
+                              and then Is_Integer_Type (Etype (L))
+                            then
+                               Error_Msg_N
+                                 ("\convert left operand to `Integer`", N);
+                            end if;
+ 
                          --  For concatenation operators it is more difficult to
                          --  determine which is the wrong operand. It is worth
                          --  flagging explicitly an access type, for those who
*************** package body Sem_Ch4 is
*** 7786,7792 ****
                    --  In_Parameter, but for now we examine the formal that
                    --  corresponds to the indexing, and assume that variable
                    --  indexing is required if some interpretation has an
!                   --  assignable formal at that position.  Still does not
                    --  cover the most complex cases ???
  
                    if Is_Overloaded (Name (Parent (Par))) then
--- 7855,7861 ----
                    --  In_Parameter, but for now we examine the formal that
                    --  corresponds to the indexing, and assume that variable
                    --  indexing is required if some interpretation has an
!                   --  assignable formal at that position. Still does not
                    --  cover the most complex cases ???
  
                    if Is_Overloaded (Name (Parent (Par))) then
*************** package body Sem_Ch4 is
*** 8220,8232 ****
        --  Note that predefined containers are typically all derived from one of
        --  the Controlled types. The code below is motivated by containers that
        --  are derived from other types with a Reference aspect.
  
        elsif Is_Derived_Type (C_Type)
          and then Etype (First_Formal (Entity (Func_Name))) /= Pref_Typ
        then
           Func_Name :=
             Find_Indexing_Operations
!              (T           => C_Type,
                Nam         => Chars (Func_Name),
                Is_Constant => Is_Constant_Indexing);
        end if;
--- 8289,8304 ----
        --  Note that predefined containers are typically all derived from one of
        --  the Controlled types. The code below is motivated by containers that
        --  are derived from other types with a Reference aspect.
+       --  Note as well that we need to examine the base type, given that
+       --  the container object may be a constrained subtype or itype which
+       --  does not have an explicit declaration,
  
        elsif Is_Derived_Type (C_Type)
          and then Etype (First_Formal (Entity (Func_Name))) /= Pref_Typ
        then
           Func_Name :=
             Find_Indexing_Operations
!              (T           => Base_Type (C_Type),
                Nam         => Chars (Func_Name),
                Is_Constant => Is_Constant_Indexing);
        end if;
*************** package body Sem_Ch4 is
*** 8555,8561 ****
        procedure Transform_Object_Operation
          (Call_Node       : out Node_Id;
           Node_To_Replace : out Node_Id);
!       --  Transform Obj.Operation (X, Y,,) into Operation (Obj, X, Y ..)
        --  Call_Node is the resulting subprogram call, Node_To_Replace is
        --  either N or the parent of N, and Subprog is a reference to the
        --  subprogram we are trying to match.
--- 8627,8633 ----
        procedure Transform_Object_Operation
          (Call_Node       : out Node_Id;
           Node_To_Replace : out Node_Id);
!       --  Transform Obj.Operation (X, Y, ...) into Operation (Obj, X, Y ...).
        --  Call_Node is the resulting subprogram call, Node_To_Replace is
        --  either N or the parent of N, and Subprog is a reference to the
        --  subprogram we are trying to match.
*************** package body Sem_Ch4 is
*** 9280,9286 ****
           --  Prefix notation can also be used on operations that are not
           --  primitives of the type, but are declared in the same immediate
           --  declarative part, which can only mean the corresponding package
!          --  body (See RM 4.1.3 (9.2/3)). If we are in that body we extend the
           --  list of primitives with body operations with the same name that
           --  may be candidates, so that Try_Primitive_Operations can examine
           --  them if no real primitive is found.
--- 9352,9358 ----
           --  Prefix notation can also be used on operations that are not
           --  primitives of the type, but are declared in the same immediate
           --  declarative part, which can only mean the corresponding package
!          --  body (see RM 4.1.3 (9.2/3)). If we are in that body we extend the
           --  list of primitives with body operations with the same name that
           --  may be candidates, so that Try_Primitive_Operations can examine
           --  them if no real primitive is found.
*************** package body Sem_Ch4 is
*** 9406,9461 ****
  
           function Extended_Primitive_Ops (T : Entity_Id) return Elist_Id is
              Type_Scope : constant Entity_Id := Scope (T);
! 
!             Body_Decls : List_Id;
!             Op_Found   : Boolean;
!             Op         : Entity_Id;
!             Op_List    : Elist_Id;
! 
           begin
!             Op_List := Primitive_Operations (T);
! 
!             if Ekind (Type_Scope) = E_Package
!               and then In_Package_Body (Type_Scope)
!               and then In_Open_Scopes (Type_Scope)
              then
!                --  Retrieve list of declarations of package body.
! 
!                Body_Decls :=
!                  Declarations
!                    (Unit_Declaration_Node
!                      (Corresponding_Body
!                        (Unit_Declaration_Node (Type_Scope))));
  
!                Op       := Current_Entity (Subprog);
!                Op_Found := False;
!                while Present (Op) loop
!                   if Comes_From_Source (Op)
!                     and then Is_Overloadable (Op)
  
!                     --  Exclude overriding primitive operations of a type
!                     --  extension declared in the package body, to prevent
!                     --  duplicates in extended list.
  
!                     and then not Is_Primitive (Op)
!                     and then Is_List_Member (Unit_Declaration_Node (Op))
!                     and then List_Containing (Unit_Declaration_Node (Op)) =
!                                                                    Body_Decls
!                   then
!                      if not Op_Found then
  
!                         --  Copy list of primitives so it is not affected for
!                         --  other uses.
  
!                         Op_List  := New_Copy_Elist (Op_List);
!                         Op_Found := True;
!                      end if;
  
!                      Append_Elmt (Op, Op_List);
                    end if;
! 
!                   Op := Homonym (Op);
!                end loop;
              end if;
  
              return Op_List;
--- 9478,9532 ----
  
           function Extended_Primitive_Ops (T : Entity_Id) return Elist_Id is
              Type_Scope : constant Entity_Id := Scope (T);
!             Op_List    : Elist_Id := Primitive_Operations (T);
           begin
!             if Ekind_In (Type_Scope, E_Package, E_Generic_Package)
!               and then ((In_Package_Body (Type_Scope)
!               and then In_Open_Scopes (Type_Scope)) or else In_Instance_Body)
              then
!                --  Retrieve list of declarations of package body if possible
  
!                declare
!                   The_Body : constant Node_Id :=
!                     Corresponding_Body (Unit_Declaration_Node (Type_Scope));
!                begin
!                   if Present (The_Body) then
!                      declare
!                         Body_Decls : constant List_Id :=
!                           Declarations (Unit_Declaration_Node (The_Body));
!                         Op_Found : Boolean := False;
!                         Op : Entity_Id := Current_Entity (Subprog);
!                      begin
!                         while Present (Op) loop
!                            if Comes_From_Source (Op)
!                              and then Is_Overloadable (Op)
  
!                              --  Exclude overriding primitive operations of a
!                              --  type extension declared in the package body,
!                              --  to prevent duplicates in extended list.
  
!                              and then not Is_Primitive (Op)
!                              and then Is_List_Member
!                                (Unit_Declaration_Node (Op))
!                              and then List_Containing
!                                (Unit_Declaration_Node (Op)) = Body_Decls
!                            then
!                               if not Op_Found then
!                                  --  Copy list of primitives so it is not
!                                  --  affected for other uses.
  
!                                  Op_List  := New_Copy_Elist (Op_List);
!                                  Op_Found := True;
!                               end if;
  
!                               Append_Elmt (Op, Op_List);
!                            end if;
  
!                            Op := Homonym (Op);
!                         end loop;
!                      end;
                    end if;
!                end;
              end if;
  
              return Op_List;
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch5.adb gcc-10.1.0/gcc/ada/sem_ch5.adb
*** gcc-9.3.0/gcc/ada/sem_ch5.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch5.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Ch5 is
*** 2234,2241 ****
                 It : Interp;
  
              begin
                 if No (Iterator) then
!                   null;  --  error reported below
  
                 elsif not Is_Overloaded (Iterator) then
                    Check_Reverse_Iteration (Etype (Iterator));
--- 2234,2249 ----
                 It : Interp;
  
              begin
+                --  The domain of iteration must implement either the RM
+                --  iterator interface, or the SPARK Iterable aspect.
+ 
                 if No (Iterator) then
!                   if No (Find_Aspect (Etype (Iter_Name), Aspect_Iterable)) then
!                      Error_Msg_NE
!                        ("cannot iterate over&",
!                         N, Base_Type (Etype (Iter_Name)));
!                      return;
!                   end if;
  
                 elsif not Is_Overloaded (Iterator) then
                    Check_Reverse_Iteration (Etype (Iterator));
*************** package body Sem_Ch5 is
*** 2335,2340 ****
--- 2343,2369 ----
                 Check_Reverse_Iteration (Typ);
              end if;
  
+             --  For an element iteration over a slice, we must complete
+             --  the resolution and expansion of the slice bounds. These
+             --  can be arbitrary expressions, and the preanalysis that
+             --  was performed in preparation for the iteration may have
+             --  generated an itype whose bounds must be fully expanded.
+             --  We set the parent node to provide a proper insertion
+             --  point for generated actions, if any.
+ 
+             if Nkind (Iter_Name) = N_Slice
+               and then Nkind (Discrete_Range (Iter_Name)) = N_Range
+               and then not Analyzed (Discrete_Range (Iter_Name))
+             then
+                declare
+                   Indx : constant Node_Id :=
+                      Entity (First_Index (Etype (Iter_Name)));
+                begin
+                   Set_Parent (Indx, Iter_Name);
+                   Resolve (Scalar_Range (Indx), Etype (Indx));
+                end;
+             end if;
+ 
              --  The name in the renaming declaration may be a function call.
              --  Indicate that it does not come from source, to suppress
              --  spurious warnings on renamings of parameterless functions,
*************** package body Sem_Ch5 is
*** 2412,2420 ****
              Set_Etype (Def_Id, Component_Type (Typ));
  
              --  The loop variable is aliased if the array components are
!             --  aliased.
  
!             Set_Is_Aliased (Def_Id, Has_Aliased_Components (Typ));
  
              --  AI12-0047 stipulates that the domain (array or container)
              --  cannot be a component that depends on a discriminant if the
--- 2441,2450 ----
              Set_Etype (Def_Id, Component_Type (Typ));
  
              --  The loop variable is aliased if the array components are
!             --  aliased. Likewise for the independent aspect.
  
!             Set_Is_Aliased     (Def_Id, Has_Aliased_Components     (Typ));
!             Set_Is_Independent (Def_Id, Has_Independent_Components (Typ));
  
              --  AI12-0047 stipulates that the domain (array or container)
              --  cannot be a component that depends on a discriminant if the
*************** package body Sem_Ch5 is
*** 3080,3086 ****
  
           else
              --  A quantified expression that appears in a pre/post condition
!             --  is preanalyzed several times.  If the range is given by an
              --  attribute reference it is rewritten as a range, and this is
              --  done even with expansion disabled. If the type is already set
              --  do not reanalyze, because a range with static bounds may be
--- 3110,3116 ----
  
           else
              --  A quantified expression that appears in a pre/post condition
!             --  is preanalyzed several times. If the range is given by an
              --  attribute reference it is rewritten as a range, and this is
              --  done even with expansion disabled. If the type is already set
              --  do not reanalyze, because a range with static bounds may be
*************** package body Sem_Ch5 is
*** 3627,3637 ****
              then
                 Rng := Range_Expression (Constraint (Rng));
  
!                --  Preanalyze the bounds of the range constraint
  
                 Low  := New_Copy_Tree (Low_Bound  (Rng));
                 High := New_Copy_Tree (High_Bound (Rng));
  
                 Preanalyze (Low);
                 Preanalyze (High);
  
--- 3657,3672 ----
              then
                 Rng := Range_Expression (Constraint (Rng));
  
!                --  Preanalyze the bounds of the range constraint, setting
!                --  parent fields to associate the copied bounds with the range,
!                --  allowing proper tree climbing during preanalysis.
  
                 Low  := New_Copy_Tree (Low_Bound  (Rng));
                 High := New_Copy_Tree (High_Bound (Rng));
  
+                Set_Parent (Low, Rng);
+                Set_Parent (High, Rng);
+ 
                 Preanalyze (Low);
                 Preanalyze (High);
  
*************** package body Sem_Ch5 is
*** 3904,3910 ****
        --  If the expander is not active then we want to analyze the loop body
        --  now even in the Ada 2012 iterator case, since the rewriting will not
        --  be done. Insert the loop variable in the current scope, if not done
!       --  when analysing the iteration scheme.  Set its kind properly to detect
        --  improper uses in the loop body.
  
        --  In GNATprove mode, we do one of the above depending on the kind of
--- 3939,3945 ----
        --  If the expander is not active then we want to analyze the loop body
        --  now even in the Ada 2012 iterator case, since the rewriting will not
        --  be done. Insert the loop variable in the current scope, if not done
!       --  when analysing the iteration scheme. Set its kind properly to detect
        --  improper uses in the loop body.
  
        --  In GNATprove mode, we do one of the above depending on the kind of
*************** package body Sem_Ch5 is
*** 3998,4004 ****
  
        --  Variables referenced within a loop subject to possible OpenACC
        --  offloading may be implicitly written to as part of the OpenACC
!       --  transaction.  Clear flags possibly conveying that they are constant,
        --  set for example when the code does not explicitly assign them.
  
        if Is_OpenAcc_Environment (Stmt) then
--- 4033,4039 ----
  
        --  Variables referenced within a loop subject to possible OpenACC
        --  offloading may be implicitly written to as part of the OpenACC
!       --  transaction. Clear flags possibly conveying that they are constant,
        --  set for example when the code does not explicitly assign them.
  
        if Is_OpenAcc_Environment (Stmt) then
*************** package body Sem_Ch5 is
*** 4062,4068 ****
                 end if;
  
              --  If we failed to find a label, it means the implicit declaration
!             --  of the label was hidden.  A for-loop parameter can do this to
              --  a label with the same name inside the loop, since the implicit
              --  label declaration is in the innermost enclosing body or block
              --  statement.
--- 4097,4103 ----
                 end if;
  
              --  If we failed to find a label, it means the implicit declaration
!             --  of the label was hidden. A for-loop parameter can do this to
              --  a label with the same name inside the loop, since the implicit
              --  label declaration is in the innermost enclosing body or block
              --  statement.
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch6.adb gcc-10.1.0/gcc/ada/sem_ch6.adb
*** gcc-9.3.0/gcc/ada/sem_ch6.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch6.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Ch6 is
*** 694,762 ****
        R_Type : constant Entity_Id := Etype (Scope_Id);
        --  Function result subtype
  
!       procedure Check_Aggregate_Accessibility (Aggr : Node_Id);
!       --  Apply legality rule of 6.5 (5.8) to the access discriminants of an
        --  aggregate in a return statement.
  
        procedure Check_Return_Subtype_Indication (Obj_Decl : Node_Id);
        --  Check that the return_subtype_indication properly matches the result
        --  subtype of the function, as required by RM-6.5(5.1/2-5.3/2).
  
!       -----------------------------------
!       -- Check_Aggregate_Accessibility --
!       -----------------------------------
  
!       procedure Check_Aggregate_Accessibility (Aggr : Node_Id) is
!          Typ   : constant Entity_Id := Etype (Aggr);
!          Assoc : Node_Id;
!          Discr : Entity_Id;
!          Expr  : Node_Id;
!          Obj   : Node_Id;
  
        begin
!          if Is_Record_Type (Typ) and then Has_Discriminants (Typ) then
!             Discr := First_Discriminant (Typ);
!             Assoc := First (Component_Associations (Aggr));
!             while Present (Discr) loop
!                if Ekind (Etype (Discr)) = E_Anonymous_Access_Type then
                    Expr := Expression (Assoc);
  
!                   if Nkind (Expr) = N_Attribute_Reference
!                     and then Attribute_Name (Expr) /= Name_Unrestricted_Access
!                   then
!                      Obj := Prefix (Expr);
!                      while Nkind_In (Obj, N_Indexed_Component,
!                                           N_Selected_Component)
!                      loop
                          Obj := Prefix (Obj);
!                      end loop;
  
!                      --  Do not check aliased formals or function calls. A
!                      --  run-time check may still be needed ???
  
!                      if Is_Entity_Name (Obj)
!                        and then Comes_From_Source (Obj)
                       then
!                         if Is_Formal (Entity (Obj))
!                            and then Is_Aliased (Entity (Obj))
!                         then
!                            null;
  
!                         elsif Object_Access_Level (Obj) >
!                                 Scope_Depth (Scope (Scope_Id))
!                         then
!                            Error_Msg_N
!                              ("access discriminant in return aggregate would "
!                               & "be a dangling reference", Obj);
!                         end if;
                       end if;
                    end if;
                 end if;
  
!                Next_Discriminant (Discr);
!             end loop;
!          end if;
!       end Check_Aggregate_Accessibility;
  
        -------------------------------------
        -- Check_Return_Subtype_Indication --
--- 694,892 ----
        R_Type : constant Entity_Id := Etype (Scope_Id);
        --  Function result subtype
  
!       procedure Check_Return_Obj_Accessibility (Return_Stmt : Node_Id);
!       --  Apply legality rule of 6.5 (5.9) to the access discriminants of an
        --  aggregate in a return statement.
  
        procedure Check_Return_Subtype_Indication (Obj_Decl : Node_Id);
        --  Check that the return_subtype_indication properly matches the result
        --  subtype of the function, as required by RM-6.5(5.1/2-5.3/2).
  
!       ------------------------------------
!       -- Check_Return_Obj_Accessibility --
!       ------------------------------------
  
!       procedure Check_Return_Obj_Accessibility (Return_Stmt : Node_Id) is
!          Assoc         : Node_Id;
!          Agg           : Node_Id := Empty;
!          Discr         : Entity_Id;
!          Expr          : Node_Id;
!          Obj           : Node_Id;
!          Process_Exprs : Boolean := False;
!          Return_Obj    : Node_Id;
  
        begin
!          --  Only perform checks on record types with access discriminants
! 
!          if not Is_Record_Type (R_Type)
!            or else not Has_Discriminants (R_Type)
!          then
!             return;
!          end if;
! 
!          --  We are only interested in return statements
! 
!          if not Nkind_In (Return_Stmt, N_Extended_Return_Statement,
!                                        N_Simple_Return_Statement)
!          then
!             return;
!          end if;
! 
!          --  Fetch the object from the return statement, in the case of a
!          --  simple return statement the expression is part of the node.
! 
!          if Nkind (Return_Stmt) = N_Extended_Return_Statement then
!             Return_Obj := Last (Return_Object_Declarations (Return_Stmt));
! 
!             --  We could be looking at something that's been expanded with
!             --  an initialzation procedure which we can safely ignore.
! 
!             if Nkind (Return_Obj) /= N_Object_Declaration then
!                return;
!             end if;
!          else
!             Return_Obj := Return_Stmt;
!          end if;
! 
!          --  We may need to check an aggregate or a subtype indication
!          --  depending on how the discriminants were specified and whether
!          --  we are looking at an extended return statement.
! 
!          if Nkind (Return_Obj) = N_Object_Declaration
!            and then Nkind (Object_Definition (Return_Obj))
!                       = N_Subtype_Indication
!          then
!             Assoc := First (Constraints
!                              (Constraint (Object_Definition (Return_Obj))));
!          else
!             --  Qualified expressions may be nested
! 
!             Agg := Original_Node (Expression (Return_Obj));
!             while Nkind (Agg) = N_Qualified_Expression loop
!                Agg := Original_Node (Expression (Agg));
!             end loop;
! 
!             --  If we are looking at an aggregate instead of a function call we
!             --  can continue checking accessibility for the supplied
!             --  discriminant associations.
! 
!             if Nkind (Agg) = N_Aggregate then
!                if Present (Expressions (Agg)) then
!                   Assoc         := First (Expressions (Agg));
!                   Process_Exprs := True;
!                else
!                   Assoc := First (Component_Associations (Agg));
!                end if;
! 
!             --  Otherwise the expression is not of interest ???
! 
!             else
!                return;
!             end if;
!          end if;
! 
!          --  Move through the discriminants checking the accessibility level
!          --  of each co-extension's associated expression.
! 
!          Discr := First_Discriminant (R_Type);
!          while Present (Discr) loop
!             if Ekind (Etype (Discr)) = E_Anonymous_Access_Type then
! 
!                if Nkind (Assoc) = N_Attribute_Reference then
!                   Expr := Assoc;
!                elsif Nkind_In (Assoc, N_Component_Association,
!                                       N_Discriminant_Association)
!                then
                    Expr := Expression (Assoc);
+                end if;
  
!                --  This anonymous access discriminant has an associated
!                --  expression which needs checking.
! 
!                if Nkind (Expr) = N_Attribute_Reference
!                  and then Attribute_Name (Expr) /= Name_Unrestricted_Access
!                then
!                   --  Obtain the object to perform static checks on by moving
!                   --  up the prefixes in the expression taking into account
!                   --  named access types.
! 
!                   Obj := Prefix (Expr);
!                   while Nkind_In (Obj, N_Indexed_Component,
!                                        N_Selected_Component)
!                   loop
!                      --  When we encounter a named access type then we can
!                      --  ignore accessibility checks on the dereference.
! 
!                      if Ekind (Etype (Prefix (Obj)))
!                           in E_Access_Type ..
!                              E_Access_Protected_Subprogram_Type
!                      then
!                         if Nkind (Obj) = N_Selected_Component then
!                            Obj := Selector_Name (Obj);
!                         end if;
!                         exit;
!                      end if;
! 
!                      --  Skip over the explicit dereference
! 
!                      if Nkind (Prefix (Obj)) = N_Explicit_Dereference then
!                         Obj := Prefix (Prefix (Obj));
! 
!                      --  Otherwise move up to the next prefix
! 
!                      else
                          Obj := Prefix (Obj);
!                      end if;
!                   end loop;
  
!                   --  Do not check aliased formals or function calls. A
!                   --  run-time check may still be needed ???
  
!                   if Is_Entity_Name (Obj)
!                     and then Comes_From_Source (Obj)
!                   then
!                      --  Explicitly aliased formals are allowed
! 
!                      if Is_Formal (Entity (Obj))
!                        and then Is_Aliased (Entity (Obj))
                       then
!                         null;
  
!                      elsif Object_Access_Level (Obj) >
!                              Scope_Depth (Scope (Scope_Id))
!                      then
!                         Error_Msg_N
!                           ("access discriminant in return aggregate would "
!                            & "be a dangling reference", Obj);
                       end if;
                    end if;
                 end if;
+             end if;
  
!             Next_Discriminant (Discr);
! 
!             if not Is_List_Member (Assoc) then
!                Assoc := Empty;
!             else
!                Nlists.Next (Assoc);
!             end if;
! 
!             --  After aggregate expressions, examine component associations if
!             --  present.
! 
!             if No (Assoc) then
!                if Present (Agg)
!                  and then Process_Exprs
!                  and then Present (Component_Associations (Agg))
!                then
!                   Assoc         := First (Component_Associations (Agg));
!                   Process_Exprs := False;
!                else
!                   exit;
!                end if;
!             end if;
!          end loop;
!       end Check_Return_Obj_Accessibility;
  
        -------------------------------------
        -- Check_Return_Subtype_Indication --
*************** package body Sem_Ch6 is
*** 963,971 ****
              Resolve (Expr, R_Type);
              Check_Limited_Return (N, Expr, R_Type);
  
!             if Present (Expr) and then Nkind (Expr) = N_Aggregate then
!                Check_Aggregate_Accessibility (Expr);
!             end if;
           end if;
  
           --  RETURN only allowed in SPARK as the last statement in function
--- 1093,1099 ----
              Resolve (Expr, R_Type);
              Check_Limited_Return (N, Expr, R_Type);
  
!             Check_Return_Obj_Accessibility (N);
           end if;
  
           --  RETURN only allowed in SPARK as the last statement in function
*************** package body Sem_Ch6 is
*** 1021,1026 ****
--- 1149,1156 ----
  
              Check_References (Stm_Entity);
  
+             Check_Return_Obj_Accessibility (N);
+ 
              --  Check RM 6.5 (5.9/3)
  
              if Has_Aliased then
*************** package body Sem_Ch6 is
*** 1056,1064 ****
           --  Apply constraint check. Note that this is done before the implicit
           --  conversion of the expression done for anonymous access types to
           --  ensure correct generation of the null-excluding check associated
!          --  with null-excluding expressions found in return statements.
  
!          Apply_Constraint_Check (Expr, R_Type);
  
           --  The return value is converted to the return type of the function,
           --  which implies a predicate check if the return type is predicated.
--- 1186,1202 ----
           --  Apply constraint check. Note that this is done before the implicit
           --  conversion of the expression done for anonymous access types to
           --  ensure correct generation of the null-excluding check associated
!          --  with null-excluding expressions found in return statements. We
!          --  don't need a check if the subtype of the return object is the
!          --  same as the result subtype of the function.
  
!          if Nkind (N) /= N_Extended_Return_Statement
!            or else Nkind (Obj_Decl) /= N_Object_Declaration
!            or else Nkind (Object_Definition (Obj_Decl)) not in N_Has_Entity
!            or else Entity (Object_Definition (Obj_Decl)) /= R_Type
!          then
!             Apply_Constraint_Check (Expr, R_Type);
!          end if;
  
           --  The return value is converted to the return type of the function,
           --  which implies a predicate check if the return type is predicated.
*************** package body Sem_Ch6 is
*** 3296,3302 ****
              then
                 null;
  
!             elsif not Present (Overridden_Operation (Spec_Id)) then
                 Error_Msg_NE
                   ("subprogram& is not overriding", Body_Spec, Spec_Id);
  
--- 3434,3451 ----
              then
                 null;
  
!             --  Overridden controlled primitives may have had their
!             --  Overridden_Operation field cleared according to the setting of
!             --  the Is_Hidden flag. An issue arises, however, when analyzing
!             --  an instance that may have manipulated the flag during
!             --  expansion. As a result, we add an exception for this case.
! 
!             elsif not Present (Overridden_Operation (Spec_Id))
!               and then not (Nam_In (Chars (Spec_Id), Name_Adjust,
!                                                      Name_Finalize,
!                                                      Name_Initialize)
!                              and then In_Instance)
!             then
                 Error_Msg_NE
                   ("subprogram& is not overriding", Body_Spec, Spec_Id);
  
*************** package body Sem_Ch6 is
*** 3368,3373 ****
--- 3517,3525 ----
  
        --  Local variables
  
+       Body_Nod         : Node_Id := Empty;
+       Minimum_Acc_Objs : List_Id := No_List;
+ 
        Saved_GM   : constant Ghost_Mode_Type := Ghost_Mode;
        Saved_IGR  : constant Node_Id         := Ignored_Ghost_Region;
        Saved_EA   : constant Boolean         := Expander_Active;
*************** package body Sem_Ch6 is
*** 3689,3695 ****
           --  generated. Freeze nodes, if any, are inserted before the current
           --  body. These freeze actions are also needed in ASIS mode and in
           --  Compile_Only mode to enable the proper back-end type annotations.
!          --  They are necessary in any case to insure order of elaboration
           --  in gigi.
  
           if Nkind (N) = N_Subprogram_Body
--- 3841,3847 ----
           --  generated. Freeze nodes, if any, are inserted before the current
           --  body. These freeze actions are also needed in ASIS mode and in
           --  Compile_Only mode to enable the proper back-end type annotations.
!          --  They are necessary in any case to ensure proper elaboration order
           --  in gigi.
  
           if Nkind (N) = N_Subprogram_Body
*************** package body Sem_Ch6 is
*** 3698,3710 ****
             and then Serious_Errors_Detected = 0
             and then (Expander_Active
                        or else ASIS_Mode
!                       or else Operating_Mode = Check_Semantics)
           then
              --  The body generated for an expression function that is not a
              --  completion is a freeze point neither for the profile nor for
              --  anything else. That's why, in order to prevent any freezing
              --  during analysis, we need to mask types declared outside the
              --  expression (and in an outer scope) that are not yet frozen.
  
              Set_Is_Frozen (Spec_Id);
              Mask_Types := Mask_Unfrozen_Types (Spec_Id);
--- 3850,3865 ----
             and then Serious_Errors_Detected = 0
             and then (Expander_Active
                        or else ASIS_Mode
!                       or else Operating_Mode = Check_Semantics
!                       or else Is_Ignored_Ghost_Entity (Spec_Id))
           then
              --  The body generated for an expression function that is not a
              --  completion is a freeze point neither for the profile nor for
              --  anything else. That's why, in order to prevent any freezing
              --  during analysis, we need to mask types declared outside the
              --  expression (and in an outer scope) that are not yet frozen.
+             --  This also needs to be done in the case of an ignored Ghost
+             --  expression function, where the expander isn't active.
  
              Set_Is_Frozen (Spec_Id);
              Mask_Types := Mask_Unfrozen_Types (Spec_Id);
*************** package body Sem_Ch6 is
*** 4243,4248 ****
--- 4398,4507 ----
           end;
        end if;
  
+       --  Generate minimum accessibility local objects to correspond with
+       --  any extra formal added for anonymous access types. This new local
+       --  object can then be used instead of the formal in case it is used
+       --  in an actual to a call to a nested subprogram.
+ 
+       --  This method is used to supplement our "small integer model" for
+       --  accessibility-check generation (for more information see
+       --  Dynamic_Accessibility_Level).
+ 
+       --  Because we allow accessibility values greater than our expected value
+       --  passing along the same extra accessibility formal as an actual
+       --  to a nested subprogram becomes a problem because high values mean
+       --  different things to the callee even though they are the same to the
+       --  caller. So, as described in the first section, we create a local
+       --  object representing the minimum of the accessibility level value that
+       --  is passed in and the accessibility level of the callee's parameter
+       --  and locals and use it in the case of a call to a nested subprogram.
+       --  This generated object is refered to as a "minimum accessiblity
+       --  level."
+ 
+       if Present (Spec_Id) or else Present (Body_Id) then
+          Body_Nod := Unit_Declaration_Node (Body_Id);
+ 
+          declare
+             Form : Entity_Id;
+          begin
+             --  Grab the appropriate formal depending on whether there exists
+             --  an actual spec for the subprogram or whether we are dealing
+             --  with a protected subprogram.
+ 
+             if Present (Spec_Id) then
+                if Present (Protected_Body_Subprogram (Spec_Id)) then
+                   Form := First_Formal (Protected_Body_Subprogram (Spec_Id));
+                else
+                   Form := First_Formal (Spec_Id);
+                end if;
+             else
+                Form := First_Formal (Body_Id);
+             end if;
+ 
+             --  Loop through formals if the subprogram is capable of accepting
+             --  a generated local object. If it is not then it is also not
+             --  capable of having local subprograms meaning it would not need
+             --  a minimum accessibility level object anyway.
+ 
+             if Present (Body_Nod)
+               and then Has_Declarations (Body_Nod)
+               and then Nkind (Body_Nod) /= N_Package_Specification
+             then
+                while Present (Form) loop
+ 
+                   if Present (Extra_Accessibility (Form))
+                     and then No (Minimum_Accessibility (Form))
+                   then
+                      --  Generate the minimum accessibility level object
+ 
+                      --    A60b : integer := integer'min(2, paramL);
+ 
+                      declare
+                         Loc      : constant Source_Ptr := Sloc (Body_Nod);
+                         Obj_Node : constant Node_Id :=
+                            Make_Object_Declaration (Loc,
+                             Defining_Identifier =>
+                               Make_Temporary
+                                 (Loc, 'A', Extra_Accessibility (Form)),
+                             Object_Definition   => New_Occurrence_Of
+                                                      (Standard_Integer, Loc),
+                             Expression          =>
+                               Make_Attribute_Reference (Loc,
+                                 Prefix         => New_Occurrence_Of
+                                                     (Standard_Integer, Loc),
+                                 Attribute_Name => Name_Min,
+                                 Expressions    => New_List (
+                                   Make_Integer_Literal (Loc,
+                                     Object_Access_Level (Form)),
+                                   New_Occurrence_Of
+                                     (Extra_Accessibility (Form), Loc))));
+                      begin
+                         --  Add the new local object to the Minimum_Acc_Obj to
+                         --  be later prepended to the subprogram's list of
+                         --  declarations after we are sure all expansion is
+                         --  done.
+ 
+                         if Present (Minimum_Acc_Objs) then
+                            Prepend (Obj_Node, Minimum_Acc_Objs);
+                         else
+                            Minimum_Acc_Objs := New_List (Obj_Node);
+                         end if;
+ 
+                         --  Register the object and analyze it
+ 
+                         Set_Minimum_Accessibility
+                           (Form, Defining_Identifier (Obj_Node));
+ 
+                         Analyze (Obj_Node);
+                      end;
+                   end if;
+ 
+                   Next_Formal (Form);
+                end loop;
+             end if;
+          end;
+       end if;
+ 
        --  Now we can go on to analyze the body
  
        HSS := Handled_Statement_Sequence (N);
*************** package body Sem_Ch6 is
*** 4347,4352 ****
--- 4606,4624 ----
        Inspect_Deferred_Constant_Completion (Declarations (N));
        Analyze (HSS);
  
+       --  Add the generated minimum accessibility objects to the subprogram
+       --  body's list of declarations after analysis of the statements and
+       --  contracts.
+ 
+       while Is_Non_Empty_List (Minimum_Acc_Objs) loop
+          if Present (Declarations (Body_Nod)) then
+             Prepend (Remove_Head (Minimum_Acc_Objs), Declarations (Body_Nod));
+          else
+             Set_Declarations
+               (Body_Nod, New_List (Remove_Head (Minimum_Acc_Objs)));
+          end if;
+       end loop;
+ 
        --  Deal with end of scope processing for the body
  
        Process_End_Label (HSS, 't', Current_Scope);
*************** package body Sem_Ch6 is
*** 5444,5453 ****
                 and then Directly_Designated_Type (Old_Formal_Base) =
                                      Directly_Designated_Type (New_Formal_Base)
             and then ((Is_Itype (Old_Formal_Base)
!                        and then Can_Never_Be_Null (Old_Formal_Base))
                       or else
                        (Is_Itype (New_Formal_Base)
!                         and then Can_Never_Be_Null (New_Formal_Base)));
  
           --  Types must always match. In the visible part of an instance,
           --  usual overloading rules for dispatching operations apply, and
--- 5716,5729 ----
                 and then Directly_Designated_Type (Old_Formal_Base) =
                                      Directly_Designated_Type (New_Formal_Base)
             and then ((Is_Itype (Old_Formal_Base)
!                        and then (Can_Never_Be_Null (Old_Formal_Base)
!                                   or else Is_Access_Constant
!                                             (Old_Formal_Base)))
                       or else
                        (Is_Itype (New_Formal_Base)
!                         and then (Can_Never_Be_Null (New_Formal_Base)
!                                    or else Is_Access_Constant
!                                              (New_Formal_Base))));
  
           --  Types must always match. In the visible part of an instance,
           --  usual overloading rules for dispatching operations apply, and
*************** package body Sem_Ch6 is
*** 5953,5959 ****
                Access_Definition (N, Discriminant_Type (New_Discr));
  
           else
!             Analyze (Discriminant_Type (New_Discr));
              New_Discr_Type := Etype (Discriminant_Type (New_Discr));
  
              --  Ada 2005: if the discriminant definition carries a null
--- 6229,6235 ----
                Access_Definition (N, Discriminant_Type (New_Discr));
  
           else
!             Find_Type (Discriminant_Type (New_Discr));
              New_Discr_Type := Etype (Discriminant_Type (New_Discr));
  
              --  Ada 2005: if the discriminant definition carries a null
*************** package body Sem_Ch6 is
*** 6292,6304 ****
  
        --  If there is an overridden subprogram, then check that there is no
        --  "not overriding" indicator, and mark the subprogram as overriding.
        --  This is not done if the overridden subprogram is marked as hidden,
        --  which can occur for the case of inherited controlled operations
        --  (see Derive_Subprogram), unless the inherited subprogram's parent
!       --  subprogram is not itself hidden. (Note: This condition could probably
!       --  be simplified, leaving out the testing for the specific controlled
!       --  cases, but it seems safer and clearer this way, and echoes similar
!       --  special-case tests of this kind in other places.)
  
        if Present (Overridden_Subp)
          and then (not Is_Hidden (Overridden_Subp)
--- 6568,6585 ----
  
        --  If there is an overridden subprogram, then check that there is no
        --  "not overriding" indicator, and mark the subprogram as overriding.
+ 
        --  This is not done if the overridden subprogram is marked as hidden,
        --  which can occur for the case of inherited controlled operations
        --  (see Derive_Subprogram), unless the inherited subprogram's parent
!       --  subprogram is not itself hidden or we are within a generic instance,
!       --  in which case the hidden flag may have been modified for the
!       --  expansion of the instance.
! 
!       --  (Note: This condition could probably be simplified, leaving out the
!       --  testing for the specific controlled cases, but it seems safer and
!       --  clearer this way, and echoes similar special-case tests of this
!       --  kind in other places.)
  
        if Present (Overridden_Subp)
          and then (not Is_Hidden (Overridden_Subp)
*************** package body Sem_Ch6 is
*** 6307,6313 ****
                                                         Name_Adjust,
                                                         Name_Finalize)
                        and then Present (Alias (Overridden_Subp))
!                       and then not Is_Hidden (Alias (Overridden_Subp))))
        then
           if Must_Not_Override (Spec) then
              Error_Msg_Sloc := Sloc (Overridden_Subp);
--- 6588,6595 ----
                                                         Name_Adjust,
                                                         Name_Finalize)
                        and then Present (Alias (Overridden_Subp))
!                       and then (not Is_Hidden (Alias (Overridden_Subp))
!                                  or else In_Instance)))
        then
           if Must_Not_Override (Spec) then
              Error_Msg_Sloc := Sloc (Overridden_Subp);
*************** package body Sem_Ch6 is
*** 7019,7024 ****
--- 7301,7311 ----
        In_Scope    : Boolean;
        Typ         : Entity_Id;
  
+       function Is_Valid_Formal (F : Entity_Id) return Boolean;
+       --  Predicate for legality rule in 9.4 (11.9/2): If an inherited
+       --  subprogram is implemented by a protected procedure or entry,
+       --  its first parameter must be out, in out, or access-to-variable.
+ 
        function Matches_Prefixed_View_Profile
          (Prim_Params  : List_Id;
           Iface_Params : List_Id) return Boolean;
*************** package body Sem_Ch6 is
*** 7027,7032 ****
--- 7314,7332 ----
        --  Iface_Params. Also determine if the type of first parameter of
        --  Iface_Params is an implemented interface.
  
+       ----------------------
+       --  Is_Valid_Formal --
+       ----------------------
+ 
+       function Is_Valid_Formal (F : Entity_Id) return Boolean is
+       begin
+          return
+            Ekind_In (F, E_In_Out_Parameter, E_Out_Parameter)
+              or else
+                (Nkind (Parameter_Type (Parent (F))) = N_Access_Definition
+                  and then not Constant_Present (Parameter_Type (Parent (F))));
+       end Is_Valid_Formal;
+ 
        -----------------------------------
        -- Matches_Prefixed_View_Profile --
        -----------------------------------
*************** package body Sem_Ch6 is
*** 7280,7289 ****
  
                    if Ekind_In (Candidate, E_Entry, E_Procedure)
                      and then Is_Protected_Type (Typ)
!                     and then Ekind (Formal) /= E_In_Out_Parameter
!                     and then Ekind (Formal) /= E_Out_Parameter
!                     and then Nkind (Parameter_Type (Parent (Formal))) /=
!                                                        N_Access_Definition
                    then
                       null;
  
--- 7580,7586 ----
  
                    if Ekind_In (Candidate, E_Entry, E_Procedure)
                      and then Is_Protected_Type (Typ)
!                     and then not Is_Valid_Formal (Formal)
                    then
                       null;
  
*************** package body Sem_Ch6 is
*** 8050,8056 ****
        if Is_Build_In_Place_Function (E) then
           declare
              Result_Subt : constant Entity_Id := Etype (E);
-             Full_Subt   : constant Entity_Id := Available_View (Result_Subt);
              Formal_Typ  : Entity_Id;
              Subp_Decl   : Node_Id;
              Discard     : Entity_Id;
--- 8347,8352 ----
*************** package body Sem_Ch6 is
*** 8100,8106 ****
              --  master of the tasks to be created, and the caller's activation
              --  chain.
  
!             if Has_Task (Full_Subt) then
                 Discard :=
                   Add_Extra_Formal
                     (E, RTE (RE_Master_Id),
--- 8396,8402 ----
              --  master of the tasks to be created, and the caller's activation
              --  chain.
  
!             if Needs_BIP_Task_Actuals (E) then
                 Discard :=
                   Add_Extra_Formal
                     (E, RTE (RE_Master_Id),
*************** package body Sem_Ch6 is
*** 8413,8423 ****
  
     begin
        --  This check applies only if we have a subprogram declaration with an
!       --  untagged record type.
  
        if Nkind (Decl) /= N_Subprogram_Declaration
          or else not Is_Record_Type (Typ)
          or else Is_Tagged_Type (Typ)
        then
           return;
        end if;
--- 8709,8720 ----
  
     begin
        --  This check applies only if we have a subprogram declaration with an
!       --  untagged record type that is conformant to the predefined op.
  
        if Nkind (Decl) /= N_Subprogram_Declaration
          or else not Is_Record_Type (Typ)
          or else Is_Tagged_Type (Typ)
+         or else Etype (Next_Formal (First_Formal (Eq_Op))) /= Typ
        then
           return;
        end if;
*************** package body Sem_Ch6 is
*** 10148,10154 ****
  
                          --  Here, S is "function ... return T;" declared in
                          --  the private part, not overriding some visible
!                         --  operation.  That's illegal in the tagged case
                          --  (but not if the private type is untagged).
  
                          if ((Present (Partial_View)
--- 10445,10451 ----
  
                          --  Here, S is "function ... return T;" declared in
                          --  the private part, not overriding some visible
!                         --  operation. That's illegal in the tagged case
                          --  (but not if the private type is untagged).
  
                          if ((Present (Partial_View)
*************** package body Sem_Ch6 is
*** 10337,10345 ****
        is
           function Check_Conforming_Parameters
             (E1_Param : Node_Id;
!             E2_Param : Node_Id) return Boolean;
           --  Starting from the given parameters, check that all the parameters
!          --  of two entries or subprograms are subtype conformant. Used to skip
           --  the check on the controlling argument.
  
           function Matching_Entry_Or_Subprogram
--- 10634,10643 ----
        is
           function Check_Conforming_Parameters
             (E1_Param : Node_Id;
!             E2_Param : Node_Id;
!             Ctype    : Conformance_Type) return Boolean;
           --  Starting from the given parameters, check that all the parameters
!          --  of two entries or subprograms are conformant. Used to skip
           --  the check on the controlling argument.
  
           function Matching_Entry_Or_Subprogram
*************** package body Sem_Ch6 is
*** 10366,10391 ****
           --  whose name matches the original name of Subp and has a profile
           --  conformant with the profile of Subp; return Empty if not found.
  
           ---------------------------------
           -- Check_Conforming_Parameters --
           ---------------------------------
  
           function Check_Conforming_Parameters
             (E1_Param : Node_Id;
!             E2_Param : Node_Id) return Boolean
           is
              Param_E1 : Node_Id := E1_Param;
              Param_E2 : Node_Id := E2_Param;
  
           begin
              while Present (Param_E1) and then Present (Param_E2) loop
!                if Ekind (Defining_Identifier (Param_E1)) /=
!                     Ekind (Defining_Identifier (Param_E2))
!                  or else not
                     Conforming_Types
                       (Find_Parameter_Type (Param_E1),
                        Find_Parameter_Type (Param_E2),
!                       Subtype_Conformant)
                 then
                    return False;
                 end if;
--- 10664,10701 ----
           --  whose name matches the original name of Subp and has a profile
           --  conformant with the profile of Subp; return Empty if not found.
  
+          function Normalized_First_Parameter_Type
+            (E : Entity_Id) return Entity_Id;
+          --  Return the type of the first parameter unless that type
+          --  is an anonymous access type, in which case return the
+          --  designated type. Used to treat anonymous-access-to-synchronized
+          --  the same as synchronized for purposes of checking for
+          --  prefixed view profile conflicts.
+ 
           ---------------------------------
           -- Check_Conforming_Parameters --
           ---------------------------------
  
           function Check_Conforming_Parameters
             (E1_Param : Node_Id;
!             E2_Param : Node_Id;
!             Ctype    : Conformance_Type) return Boolean
           is
              Param_E1 : Node_Id := E1_Param;
              Param_E2 : Node_Id := E2_Param;
  
           begin
              while Present (Param_E1) and then Present (Param_E2) loop
!                if (Ctype >= Mode_Conformant) and then
!                  Ekind (Defining_Identifier (Param_E1)) /=
!                  Ekind (Defining_Identifier (Param_E2))
!                then
!                   return False;
!                elsif not
                     Conforming_Types
                       (Find_Parameter_Type (Param_E1),
                        Find_Parameter_Type (Param_E2),
!                       Ctype)
                 then
                    return False;
                 end if;
*************** package body Sem_Ch6 is
*** 10418,10424 ****
                   and then
                     Check_Conforming_Parameters
                       (First (Parameter_Specifications (Parent (E))),
!                       Next (First (Parameter_Specifications (Parent (Subp)))))
                 then
                    return E;
                 end if;
--- 10728,10735 ----
                   and then
                     Check_Conforming_Parameters
                       (First (Parameter_Specifications (Parent (E))),
!                       Next (First (Parameter_Specifications (Parent (Subp)))),
!                       Type_Conformant)
                 then
                    return E;
                 end if;
*************** package body Sem_Ch6 is
*** 10458,10464 ****
                   and then
                     Check_Conforming_Parameters
                       (First (Parameter_Specifications (Parent (Ent))),
!                       Next (First (Parameter_Specifications (Parent (E)))))
                 then
                    return E;
                 end if;
--- 10769,10776 ----
                   and then
                     Check_Conforming_Parameters
                       (First (Parameter_Specifications (Parent (Ent))),
!                       Next (First (Parameter_Specifications (Parent (E)))),
!                       Subtype_Conformant)
                 then
                    return E;
                 end if;
*************** package body Sem_Ch6 is
*** 10512,10517 ****
--- 10824,10844 ----
              return Empty;
           end Matching_Original_Protected_Subprogram;
  
+          -------------------------------------
+          -- Normalized_First_Parameter_Type --
+          -------------------------------------
+ 
+          function Normalized_First_Parameter_Type
+            (E : Entity_Id) return Entity_Id
+          is
+             Result : Entity_Id := Etype (First_Entity (E));
+          begin
+             if Ekind (Result) = E_Anonymous_Access_Type then
+                Result := Designated_Type (Result);
+             end if;
+             return Result;
+          end Normalized_First_Parameter_Type;
+ 
        --  Start of processing for Has_Matching_Entry_Or_Subprogram
  
        begin
*************** package body Sem_Ch6 is
*** 10522,10541 ****
           if Comes_From_Source (E)
             and then Is_Subprogram (E)
             and then Present (First_Entity (E))
!            and then Is_Concurrent_Record_Type (Etype (First_Entity (E)))
           then
              if Scope (E) =
                   Scope (Corresponding_Concurrent_Type
!                          (Etype (First_Entity (E))))
                and then
                  Present
                    (Matching_Entry_Or_Subprogram
!                      (Corresponding_Concurrent_Type (Etype (First_Entity (E))),
                        Subp => E))
              then
                 Report_Conflict (E,
                   Matching_Entry_Or_Subprogram
!                    (Corresponding_Concurrent_Type (Etype (First_Entity (E))),
                      Subp => E));
                 return True;
              end if;
--- 10849,10871 ----
           if Comes_From_Source (E)
             and then Is_Subprogram (E)
             and then Present (First_Entity (E))
!            and then Is_Concurrent_Record_Type
!                       (Normalized_First_Parameter_Type (E))
           then
              if Scope (E) =
                   Scope (Corresponding_Concurrent_Type
!                          (Normalized_First_Parameter_Type (E)))
                and then
                  Present
                    (Matching_Entry_Or_Subprogram
!                      (Corresponding_Concurrent_Type
!                         (Normalized_First_Parameter_Type (E)),
                        Subp => E))
              then
                 Report_Conflict (E,
                   Matching_Entry_Or_Subprogram
!                    (Corresponding_Concurrent_Type
!                       (Normalized_First_Parameter_Type (E)),
                      Subp => E));
                 return True;
              end if;
*************** package body Sem_Ch6 is
*** 11335,11341 ****
                 goto Continue;
              end if;
  
!             Formal_Type := Entity (Ptype);
  
              if Is_Incomplete_Type (Formal_Type)
                or else
--- 11665,11677 ----
                 goto Continue;
              end if;
  
!             --  Protect against malformed parameter types
! 
!             if Nkind (Ptype) not in N_Has_Entity then
!                Formal_Type := Any_Type;
!             else
!                Formal_Type := Entity (Ptype);
!             end if;
  
              if Is_Incomplete_Type (Formal_Type)
                or else
*************** package body Sem_Ch6 is
*** 11448,11453 ****
--- 11784,11794 ----
                and then Aliased_Present (Param_Spec)
              then
                 Set_Is_Aliased (Formal);
+ 
+                --  AI12-001: All aliased objects are considered to be specified
+                --  as independently addressable (RM C.6(8.1/4)).
+ 
+                Set_Is_Independent (Formal);
              end if;
  
              --  Ada 2005 (AI-231): Create and decorate an internal subtype
*************** package body Sem_Ch6 is
*** 11882,11888 ****
              --  predicate may come from an explicit aspect of be inherited.
  
              elsif Has_Predicates (T) then
!                Insert_List_Before_And_Analyze (Decl,
                   Freeze_Entity (Defining_Identifier (Decl), N));
              end if;
  
--- 12223,12229 ----
              --  predicate may come from an explicit aspect of be inherited.
  
              elsif Has_Predicates (T) then
!                Insert_List_After_And_Analyze (Decl,
                   Freeze_Entity (Defining_Identifier (Decl), N));
              end if;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch6.ads gcc-10.1.0/gcc/ada/sem_ch6.ads
*** gcc-9.3.0/gcc/ada/sem_ch6.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch6.ads	Thu May  7 10:49:59 2020
*************** package Sem_Ch6 is
*** 100,106 ****
        Overridden_Subp : Entity_Id;
        Is_Primitive    : Boolean);
     --  Verify the consistency of an overriding_indicator given for subprogram
!    --  declaration, body, renaming, or instantiation.  Overridden_Subp is set
     --  if the scope where we are introducing the subprogram contains a
     --  type-conformant subprogram that becomes hidden by the new subprogram.
     --  Is_Primitive indicates whether the subprogram is primitive.
--- 100,106 ----
        Overridden_Subp : Entity_Id;
        Is_Primitive    : Boolean);
     --  Verify the consistency of an overriding_indicator given for subprogram
!    --  declaration, body, renaming, or instantiation. Overridden_Subp is set
     --  if the scope where we are introducing the subprogram contains a
     --  type-conformant subprogram that becomes hidden by the new subprogram.
     --  Is_Primitive indicates whether the subprogram is primitive.
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch7.adb gcc-10.1.0/gcc/ada/sem_ch7.adb
*** gcc-9.3.0/gcc/ada/sem_ch7.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch7.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Ch7 is
*** 389,394 ****
--- 389,396 ----
                       end if;
  
                       --  An inlined subprogram body acts as a referencer
+                      --  unless we generate C code since inlining is then
+                      --  handled by the C compiler.
  
                       --  Note that we test Has_Pragma_Inline here in addition
                       --  to Is_Inlined. We are doing this for a client, since
*************** package body Sem_Ch7 is
*** 397,404 ****
                       --  should occur, so we need to catch all cases where the
                       --  subprogram may be inlined by the client.
  
!                      if Is_Inlined (Decl_Id)
!                        or else Has_Pragma_Inline (Decl_Id)
                       then
                          Has_Referencer_Of_Non_Subprograms := True;
  
--- 399,407 ----
                       --  should occur, so we need to catch all cases where the
                       --  subprogram may be inlined by the client.
  
!                      if not Generate_C_Code
!                        and then (Is_Inlined (Decl_Id)
!                                   or else Has_Pragma_Inline (Decl_Id))
                       then
                          Has_Referencer_Of_Non_Subprograms := True;
  
*************** package body Sem_Ch7 is
*** 415,423 ****
                       Decl_Id := Defining_Entity (Decl);
  
                       --  An inlined subprogram body acts as a referencer
  
!                      if Is_Inlined (Decl_Id)
!                        or else Has_Pragma_Inline (Decl_Id)
                       then
                          Has_Referencer_Of_Non_Subprograms := True;
  
--- 418,429 ----
                       Decl_Id := Defining_Entity (Decl);
  
                       --  An inlined subprogram body acts as a referencer
+                      --  unless we generate C code since inlining is then
+                      --  handled by the C compiler.
  
!                      if not Generate_C_Code
!                        and then (Is_Inlined (Decl_Id)
!                                   or else Has_Pragma_Inline (Decl_Id))
                       then
                          Has_Referencer_Of_Non_Subprograms := True;
  
*************** package body Sem_Ch7 is
*** 784,790 ****
        --  Deactivate expansion inside the body of ignored Ghost entities,
        --  as this code will ultimately be ignored. This avoids requiring the
        --  presence of run-time units which are not needed. Only do this for
!       --  user entities, as internally generated entitities might still need
        --  to be expanded (e.g. those generated for types).
  
        if Present (Ignored_Ghost_Region)
--- 790,796 ----
        --  Deactivate expansion inside the body of ignored Ghost entities,
        --  as this code will ultimately be ignored. This avoids requiring the
        --  presence of run-time units which are not needed. Only do this for
!       --  user entities, as internally generated entities might still need
        --  to be expanded (e.g. those generated for types).
  
        if Present (Ignored_Ghost_Region)
*************** package body Sem_Ch7 is
*** 919,927 ****
--- 925,936 ----
        --  This is a nested package, so it may be necessary to declare certain
        --  inherited subprograms that are not yet visible because the parent
        --  type's subprograms are now visible.
+       --  Note that for child units these operations were generated when
+       --  analyzing the package specification.
  
        if Ekind (Scope (Spec_Id)) = E_Package
          and then Scope (Spec_Id) /= Standard_Standard
+         and then not Is_Child_Unit (Spec_Id)
        then
           Declare_Inherited_Private_Subprograms (Spec_Id);
        end if;
*************** package body Sem_Ch7 is
*** 1057,1063 ****
        --  to the linker as their Is_Public flag is set to True. This proactive
        --  approach is necessary because an inlined or a generic body for which
        --  code is generated in other units may need to see these entities. Cut
!       --  down the number of global symbols that do not neet public visibility
        --  as this has two beneficial effects:
        --    (1) It makes the compilation process more efficient.
        --    (2) It gives the code generator more leeway to optimize within each
--- 1066,1072 ----
        --  to the linker as their Is_Public flag is set to True. This proactive
        --  approach is necessary because an inlined or a generic body for which
        --  code is generated in other units may need to see these entities. Cut
!       --  down the number of global symbols that do not need public visibility
        --  as this has two beneficial effects:
        --    (1) It makes the compilation process more efficient.
        --    (2) It gives the code generator more leeway to optimize within each
*************** package body Sem_Ch7 is
*** 1265,1271 ****
  
        procedure Generate_Parent_References;
        --  For a child unit, generate references to parent units, for
!       --  GPS navigation purposes.
  
        function Is_Public_Child (Child, Unit : Entity_Id) return Boolean;
        --  Child and Unit are entities of compilation units. True if Child
--- 1274,1280 ----
  
        procedure Generate_Parent_References;
        --  For a child unit, generate references to parent units, for
!       --  GNAT Studio navigation purposes.
  
        function Is_Public_Child (Child, Unit : Entity_Id) return Boolean;
        --  Child and Unit are entities of compilation units. True if Child
*************** package body Sem_Ch7 is
*** 1502,1510 ****
                    Inst_Par := Renamed_Entity (Inst_Par);
                 end if;
  
!                Gen_Par :=
!                  Generic_Parent
!                    (Specification (Unit_Declaration_Node (Inst_Par)));
  
                 --  Install the private declarations and private use clauses
                 --  of a parent instance of the child instance, unless the
--- 1511,1531 ----
                    Inst_Par := Renamed_Entity (Inst_Par);
                 end if;
  
!                --  The instance may appear in a sibling generic unit, in
!                --  which case the prefix must include the common (generic)
!                --  ancestor, which is treated as a current instance.
! 
!                if Inside_A_Generic
!                  and then Ekind (Inst_Par) = E_Generic_Package
!                then
!                   Gen_Par := Inst_Par;
!                   pragma Assert (In_Open_Scopes (Gen_Par));
! 
!                else
!                   Gen_Par :=
!                     Generic_Parent
!                       (Specification (Unit_Declaration_Node (Inst_Par)));
!                end if;
  
                 --  Install the private declarations and private use clauses
                 --  of a parent instance of the child instance, unless the
*************** package body Sem_Ch7 is
*** 1751,1757 ****
           end if;
  
        --  There may be inherited private subprograms that need to be declared,
!       --  even in the absence of an explicit private part.  If there are any
        --  public declarations in the package and the package is a public child
        --  unit, then an implicit private part is assumed.
  
--- 1772,1778 ----
           end if;
  
        --  There may be inherited private subprograms that need to be declared,
!       --  even in the absence of an explicit private part. If there are any
        --  public declarations in the package and the package is a public child
        --  unit, then an implicit private part is assumed.
  
*************** package body Sem_Ch7 is
*** 1877,1883 ****
        end if;
  
        --  Nested package specs that do not require bodies are not checked for
!       --  ineffective use clauses due to the possbility of subunits. This is
        --  because at this stage it is impossible to tell whether there will be
        --  a separate body.
  
--- 1898,1904 ----
        end if;
  
        --  Nested package specs that do not require bodies are not checked for
!       --  ineffective use clauses due to the possibility of subunits. This is
        --  because at this stage it is impossible to tell whether there will be
        --  a separate body.
  
*************** package body Sem_Ch7 is
*** 2255,2267 ****
        procedure Swap_Private_Dependents (Priv_Deps : Elist_Id);
        --  When the full view of a private type is made available, we do the
        --  same for its private dependents under proper visibility conditions.
!       --  When compiling a grand-chid unit this needs to be done recursively.
  
        -----------------------------
        -- Swap_Private_Dependents --
        -----------------------------
  
        procedure Swap_Private_Dependents (Priv_Deps : Elist_Id) is
           Deps      : Elist_Id;
           Priv      : Entity_Id;
           Priv_Elmt : Elmt_Id;
--- 2276,2289 ----
        procedure Swap_Private_Dependents (Priv_Deps : Elist_Id);
        --  When the full view of a private type is made available, we do the
        --  same for its private dependents under proper visibility conditions.
!       --  When compiling a child unit this needs to be done recursively.
  
        -----------------------------
        -- Swap_Private_Dependents --
        -----------------------------
  
        procedure Swap_Private_Dependents (Priv_Deps : Elist_Id) is
+          Cunit     : Entity_Id;
           Deps      : Elist_Id;
           Priv      : Entity_Id;
           Priv_Elmt : Elmt_Id;
*************** package body Sem_Ch7 is
*** 2279,2284 ****
--- 2301,2307 ----
              if Present (Full_View (Priv)) and then Is_Visible_Dependent (Priv)
              then
                 if Is_Private_Type (Priv) then
+                   Cunit := Cunit_Entity (Current_Sem_Unit);
                    Deps := Private_Dependents (Priv);
                    Is_Priv := True;
                 else
*************** package body Sem_Ch7 is
*** 2306,2316 ****
                 Set_Is_Potentially_Use_Visible
                   (Priv, Is_Potentially_Use_Visible (Node (Priv_Elmt)));
  
!                --  Within a child unit, recurse, except in generic child unit,
!                --  which (unfortunately) handle private_dependents separately.
  
                 if Is_Priv
!                  and then Is_Child_Unit (Cunit_Entity (Current_Sem_Unit))
                   and then not Is_Empty_Elmt_List (Deps)
                   and then not Inside_A_Generic
                 then
--- 2329,2342 ----
                 Set_Is_Potentially_Use_Visible
                   (Priv, Is_Potentially_Use_Visible (Node (Priv_Elmt)));
  
!                --  Recurse for child units, except in generic child units,
!                --  which unfortunately handle private_dependents separately.
!                --  Note that the current unit may not have been analyzed,
!                --  for example a package body, so we cannot rely solely on
!                --  the Is_Child_Unit flag, but that's only an optimization.
  
                 if Is_Priv
!                  and then (No (Etype (Cunit)) or else Is_Child_Unit (Cunit))
                   and then not Is_Empty_Elmt_List (Deps)
                   and then not Inside_A_Generic
                 then
*************** package body Sem_Ch7 is
*** 2695,2707 ****
        Decl      : constant Node_Id := Unit_Declaration_Node (P);
        Id        : Entity_Id;
        Full      : Entity_Id;
-       Priv_Elmt : Elmt_Id;
-       Priv_Sub  : Entity_Id;
  
        procedure Preserve_Full_Attributes (Priv : Entity_Id; Full : Entity_Id);
        --  Copy to the private declaration the attributes of the full view that
        --  need to be available for the partial view also.
  
        function Type_In_Use (T : Entity_Id) return Boolean;
        --  Check whether type or base type appear in an active use_type clause
  
--- 2721,2736 ----
        Decl      : constant Node_Id := Unit_Declaration_Node (P);
        Id        : Entity_Id;
        Full      : Entity_Id;
  
        procedure Preserve_Full_Attributes (Priv : Entity_Id; Full : Entity_Id);
        --  Copy to the private declaration the attributes of the full view that
        --  need to be available for the partial view also.
  
+       procedure Swap_Private_Dependents (Priv_Deps : Elist_Id);
+       --  When the full view of a private type is made unavailable, we do the
+       --  same for its private dependents under proper visibility conditions.
+       --  When compiling a child unit this needs to be done recursively.
+ 
        function Type_In_Use (T : Entity_Id) return Boolean;
        --  Check whether type or base type appear in an active use_type clause
  
*************** package body Sem_Ch7 is
*** 2820,2825 ****
--- 2849,2914 ----
           end if;
        end Preserve_Full_Attributes;
  
+       -----------------------------
+       -- Swap_Private_Dependents --
+       -----------------------------
+ 
+       procedure Swap_Private_Dependents (Priv_Deps : Elist_Id) is
+          Cunit     : Entity_Id;
+          Deps      : Elist_Id;
+          Priv      : Entity_Id;
+          Priv_Elmt : Elmt_Id;
+          Is_Priv   : Boolean;
+ 
+       begin
+          Priv_Elmt := First_Elmt (Priv_Deps);
+          while Present (Priv_Elmt) loop
+             Priv := Node (Priv_Elmt);
+ 
+             --  Before we do the swap, we verify the presence of the Full_View
+             --  field, which may be empty due to a swap by a previous call to
+             --  End_Package_Scope (e.g. from the freezing mechanism).
+ 
+             if Present (Full_View (Priv)) then
+                if Is_Private_Type (Priv) then
+                   Cunit := Cunit_Entity (Current_Sem_Unit);
+                   Deps := Private_Dependents (Priv);
+                   Is_Priv := True;
+                else
+                   Is_Priv := False;
+                end if;
+ 
+                if Scope (Priv) = P
+                  or else not In_Open_Scopes (Scope (Priv))
+                then
+                   Set_Is_Immediately_Visible (Priv, False);
+                end if;
+ 
+                if Is_Visible_Dependent (Priv) then
+                   Preserve_Full_Attributes (Priv, Full_View (Priv));
+                   Replace_Elmt (Priv_Elmt, Full_View (Priv));
+                   Exchange_Declarations (Priv);
+ 
+                   --  Recurse for child units, except in generic child units,
+                   --  which unfortunately handle private_dependents separately.
+                   --  Note that the current unit may not have been analyzed,
+                   --  for example a package body, so we cannot rely solely on
+                   --  the Is_Child_Unit flag, but that's only an optimization.
+ 
+                   if Is_Priv
+                     and then (No (Etype (Cunit)) or else Is_Child_Unit (Cunit))
+                     and then not Is_Empty_Elmt_List (Deps)
+                     and then not Inside_A_Generic
+                   then
+                      Swap_Private_Dependents (Deps);
+                   end if;
+                end if;
+             end if;
+ 
+             Next_Elmt (Priv_Elmt);
+          end loop;
+       end Swap_Private_Dependents;
+ 
        -----------------
        -- Type_In_Use --
        -----------------
*************** package body Sem_Ch7 is
*** 3071,3101 ****
              --  were compiled in this scope, or installed previously
              --  by Install_Private_Declarations.
  
!             --  Before we do the swap, we verify the presence of the Full_View
!             --  field which may be empty due to a swap by a previous call to
!             --  End_Package_Scope (e.g. from the freezing mechanism).
! 
!             Priv_Elmt := First_Elmt (Private_Dependents (Id));
!             while Present (Priv_Elmt) loop
!                Priv_Sub := Node (Priv_Elmt);
! 
!                if Present (Full_View (Priv_Sub)) then
!                   if Scope (Priv_Sub) = P
!                      or else not In_Open_Scopes (Scope (Priv_Sub))
!                   then
!                      Set_Is_Immediately_Visible (Priv_Sub, False);
!                   end if;
! 
!                   if Is_Visible_Dependent (Priv_Sub) then
!                      Preserve_Full_Attributes
!                        (Priv_Sub, Full_View (Priv_Sub));
!                      Replace_Elmt (Priv_Elmt, Full_View (Priv_Sub));
!                      Exchange_Declarations (Priv_Sub);
!                   end if;
!                end if;
! 
!                Next_Elmt (Priv_Elmt);
!             end loop;
  
              --  Now restore the type itself to its private view
  
--- 3160,3166 ----
              --  were compiled in this scope, or installed previously
              --  by Install_Private_Declarations.
  
!             Swap_Private_Dependents (Private_Dependents (Id));
  
              --  Now restore the type itself to its private view
  
*************** package body Sem_Ch7 is
*** 3190,3196 ****
        E : Entity_Id;
  
        Requires_Body : Boolean := False;
!       --  Flag set when the unit has at least one construct that requries
        --  completion in a body.
  
     begin
--- 3255,3261 ----
        E : Entity_Id;
  
        Requires_Body : Boolean := False;
!       --  Flag set when the unit has at least one construct that requires
        --  completion in a body.
  
     begin
*************** package body Sem_Ch7 is
*** 3253,3259 ****
  
        --  A [generic] package that defines at least one non-null abstract state
        --  requires a completion only when at least one other construct requires
!       --  a completion in a body (SPARK RM 7.1.4(4) and (6)). This check is not
        --  performed if the caller requests this behavior.
  
        if Do_Abstract_States
--- 3318,3324 ----
  
        --  A [generic] package that defines at least one non-null abstract state
        --  requires a completion only when at least one other construct requires
!       --  a completion in a body (SPARK RM 7.1.4(4) and (5)). This check is not
        --  performed if the caller requests this behavior.
  
        if Do_Abstract_States
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch8.adb gcc-10.1.0/gcc/ada/sem_ch8.adb
*** gcc-9.3.0/gcc/ada/sem_ch8.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch8.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Ch8 is
*** 774,779 ****
--- 774,783 ----
        --  has already established its actual subtype. This is only relevant
        --  if the renamed object is an explicit dereference.
  
+       function Get_Object_Name (Nod : Node_Id) return Node_Id;
+       --  Obtain the name of the object from node Nod which is being renamed by
+       --  the object renaming declaration N.
+ 
        ------------------------------
        -- Check_Constrained_Object --
        ------------------------------
*************** package body Sem_Ch8 is
*** 784,792 ****
  
        begin
           if Nkind_In (Nam, N_Function_Call, N_Explicit_Dereference)
!            and then Is_Composite_Type (Etype (Nam))
!            and then not Is_Constrained (Etype (Nam))
!            and then not Has_Unknown_Discriminants (Etype (Nam))
             and then Expander_Active
           then
              --  If Actual_Subtype is already set, nothing to do
--- 788,796 ----
  
        begin
           if Nkind_In (Nam, N_Function_Call, N_Explicit_Dereference)
!            and then Is_Composite_Type (Typ)
!            and then not Is_Constrained (Typ)
!            and then not Has_Unknown_Discriminants (Typ)
             and then Expander_Active
           then
              --  If Actual_Subtype is already set, nothing to do
*************** package body Sem_Ch8 is
*** 802,818 ****
                 null;
  
              --  If a record is limited its size is invariant. This is the case
!             --  in particular with record types with an access discirminant
              --  that are used in iterators. This is an optimization, but it
              --  also prevents typing anomalies when the prefix is further
!             --  expanded. Limited types with discriminants are included.
  
!             elsif Is_Limited_Record (Typ)
!               or else
!                 (Ekind (Typ) = E_Limited_Private_Type
!                   and then Has_Discriminants (Typ)
!                   and then Is_Access_Type (Etype (First_Discriminant (Typ))))
!             then
                 null;
  
              else
--- 806,820 ----
                 null;
  
              --  If a record is limited its size is invariant. This is the case
!             --  in particular with record types with an access discriminant
              --  that are used in iterators. This is an optimization, but it
              --  also prevents typing anomalies when the prefix is further
!             --  expanded.
!             --  Note that we cannot just use the Is_Limited_Record flag because
!             --  it does not apply to records with limited components, for which
!             --  this syntactic flag is not set, but whose size is also fixed.
  
!             elsif Is_Limited_Type (Typ) then
                 null;
  
              else
*************** package body Sem_Ch8 is
*** 835,840 ****
--- 837,869 ----
           end if;
        end Check_Constrained_Object;
  
+       ---------------------
+       -- Get_Object_Name --
+       ---------------------
+ 
+       function Get_Object_Name (Nod : Node_Id) return Node_Id is
+          Obj_Nam : Node_Id;
+ 
+       begin
+          Obj_Nam := Nod;
+          while Present (Obj_Nam) loop
+             if Nkind_In (Obj_Nam, N_Attribute_Reference,
+                                   N_Explicit_Dereference,
+                                   N_Indexed_Component,
+                                   N_Slice)
+             then
+                Obj_Nam := Prefix (Obj_Nam);
+ 
+             elsif Nkind (Obj_Nam) = N_Selected_Component then
+                Obj_Nam := Selector_Name (Obj_Nam);
+             else
+                exit;
+             end if;
+          end loop;
+ 
+          return Obj_Nam;
+       end Get_Object_Name;
+ 
     --  Start of processing for Analyze_Object_Renaming
  
     begin
*************** package body Sem_Ch8 is
*** 1122,1128 ****
           Wrong_Type (Nam, T);
        end if;
  
!       T2 := Etype (Nam);
  
        --  Ada 2005 (AI-326): Handle wrong use of incomplete type
  
--- 1151,1161 ----
           Wrong_Type (Nam, T);
        end if;
  
!       --  We must search for an actual subtype here so that the bounds of
!       --  objects of unconstrained types don't get dropped on the floor - such
!       --  as with renamings of formal parameters.
! 
!       T2 := Get_Actual_Subtype_If_Available (Nam);
  
        --  Ada 2005 (AI-326): Handle wrong use of incomplete type
  
*************** package body Sem_Ch8 is
*** 1147,1164 ****
  
        elsif Ada_Version >= Ada_2005 and then Nkind (Nam) in N_Has_Entity then
           declare
!             Nam_Decl : Node_Id;
!             Nam_Ent  : Entity_Id;
  
           begin
-             if Nkind (Nam) = N_Attribute_Reference then
-                Nam_Ent := Entity (Prefix (Nam));
-             else
-                Nam_Ent := Entity (Nam);
-             end if;
- 
-             Nam_Decl := Parent (Nam_Ent);
- 
              if Has_Null_Exclusion (N)
                and then not Has_Null_Exclusion (Nam_Decl)
              then
--- 1180,1189 ----
  
        elsif Ada_Version >= Ada_2005 and then Nkind (Nam) in N_Has_Entity then
           declare
!             Nam_Ent  : constant Entity_Id := Entity (Get_Object_Name (Nam));
!             Nam_Decl : constant Node_Id   := Declaration_Node (Nam_Ent);
  
           begin
              if Has_Null_Exclusion (N)
                and then not Has_Null_Exclusion (Nam_Decl)
              then
*************** package body Sem_Ch8 is
*** 1333,1351 ****
        end if;
  
        --  The entity of the renaming declaration needs to reflect whether the
!       --  renamed object is volatile. Is_Volatile is set if the renamed object
!       --  is volatile in the RM legality sense.
! 
!       Set_Is_Volatile (Id, Is_Volatile_Object (Nam));
! 
!       --  Also copy settings of Atomic/Independent/Volatile_Full_Access
  
!       if Is_Entity_Name (Nam) then
!          Set_Is_Atomic               (Id, Is_Atomic      (Entity (Nam)));
!          Set_Is_Independent          (Id, Is_Independent (Entity (Nam)));
!          Set_Is_Volatile_Full_Access (Id,
!            Is_Volatile_Full_Access (Entity (Nam)));
!       end if;
  
        --  Treat as volatile if we just set the Volatile flag
  
--- 1358,1370 ----
        end if;
  
        --  The entity of the renaming declaration needs to reflect whether the
!       --  renamed object is atomic, independent, volatile or VFA. These flags
!       --  are set on the renamed object in the RM legality sense.
  
!       Set_Is_Atomic               (Id, Is_Atomic_Object (Nam));
!       Set_Is_Independent          (Id, Is_Independent_Object (Nam));
!       Set_Is_Volatile             (Id, Is_Volatile_Object (Nam));
!       Set_Is_Volatile_Full_Access (Id, Is_Volatile_Full_Access_Object (Nam));
  
        --  Treat as volatile if we just set the Volatile flag
  
*************** package body Sem_Ch8 is
*** 1671,1677 ****
        --  AI05-0225: If the renamed entity is a procedure or entry of a
        --  protected object, the target object must be a variable.
  
!       if Ekind (Scope (Old_S)) in Protected_Kind
          and then Ekind (New_S) = E_Procedure
          and then not Is_Variable (Prefix (Nam))
        then
--- 1690,1696 ----
        --  AI05-0225: If the renamed entity is a procedure or entry of a
        --  protected object, the target object must be a variable.
  
!       if Is_Protected_Type (Scope (Old_S))
          and then Ekind (New_S) = E_Procedure
          and then not Is_Variable (Prefix (Nam))
        then
*************** package body Sem_Ch8 is
*** 3343,3349 ****
  
              if CW_Actual then
                 null;
!             elsif not Is_Actual or else No (Enclosing_Instance) then
                 Check_Mode_Conformant (New_S, Old_S);
              end if;
  
--- 3362,3377 ----
  
              if CW_Actual then
                 null;
! 
!             --  No need for a redundant error message if this is a nested
!             --  instance, unless the current instantiation (of a child unit)
!             --  is a compilation unit, which is not analyzed when the parent
!             --  generic is analyzed.
! 
!             elsif not Is_Actual
!                or else No (Enclosing_Instance)
!                or else Is_Compilation_Unit (Current_Scope)
!             then
                 Check_Mode_Conformant (New_S, Old_S);
              end if;
  
*************** package body Sem_Ch8 is
*** 3419,3427 ****
                    if Old_S_Ctrl_Type /= New_S_Ctrl_Type
                      or else No (New_S_Ctrl_Type)
                    then
!                      Error_Msg_NE
!                        ("actual must be dispatching subprogram for type&",
!                         Nam, New_S_Ctrl_Type);
  
                    else
                       Set_Is_Dispatching_Operation (New_S);
--- 3447,3460 ----
                    if Old_S_Ctrl_Type /= New_S_Ctrl_Type
                      or else No (New_S_Ctrl_Type)
                    then
!                      if No (New_S_Ctrl_Type) then
!                         Error_Msg_N
!                           ("actual must be dispatching subprogram", Nam);
!                      else
!                         Error_Msg_NE
!                           ("actual must be dispatching subprogram for type&",
!                            Nam, New_S_Ctrl_Type);
!                      end if;
  
                    else
                       Set_Is_Dispatching_Operation (New_S);
*************** package body Sem_Ch8 is
*** 4809,4814 ****
--- 4842,4854 ----
              Set_In_Use (Base_Type (T), False);
              Set_Current_Use_Clause (T, Empty);
              Set_Current_Use_Clause (Base_Type (T), Empty);
+ 
+             --  See Use_One_Type for the rationale. This is a bit on the naive
+             --  side, but should be good enough in practice.
+ 
+             if Is_Tagged_Type (T) then
+                Set_In_Use (Class_Wide_Type (T), False);
+             end if;
           end if;
        end if;
  
*************** package body Sem_Ch8 is
*** 5487,5494 ****
  
        if Nkind (N) = N_Identifier then
           Mark_Elaboration_Attributes
!            (N_Id  => N,
!             Modes => True);
        end if;
  
        --  Here if Entity pointer was not set, we need full visibility analysis
--- 5527,5536 ----
  
        if Nkind (N) = N_Identifier then
           Mark_Elaboration_Attributes
!            (N_Id     => N,
!             Checks   => True,
!             Modes    => True,
!             Warnings => True);
        end if;
  
        --  Here if Entity pointer was not set, we need full visibility analysis
*************** package body Sem_Ch8 is
*** 6512,6519 ****
        --  resolution, and expansion are over.
  
        Mark_Elaboration_Attributes
!         (N_Id  => N,
!          Modes => True);
  
        --  Set appropriate type
  
--- 6554,6563 ----
        --  resolution, and expansion are over.
  
        Mark_Elaboration_Attributes
!         (N_Id     => N,
!          Checks   => True,
!          Modes    => True,
!          Warnings => True);
  
        --  Set appropriate type
  
*************** package body Sem_Ch8 is
*** 6683,6688 ****
--- 6727,6741 ----
        Old_S : Entity_Id;
        Inst  : Entity_Id;
  
+       function Find_Nearer_Entity
+         (New_S  : Entity_Id;
+          Old1_S : Entity_Id;
+          Old2_S : Entity_Id) return Entity_Id;
+       --  Determine whether one of Old_S1 and Old_S2 is nearer to New_S than
+       --  the other, and return it if so. Return Empty otherwise. We use this
+       --  in conjunction with Inherit_Renamed_Profile to simplify later type
+       --  disambiguation for actual subprograms in instances.
+ 
        function Is_Visible_Operation (Op : Entity_Id) return Boolean;
        --  If the renamed entity is an implicit operator, check whether it is
        --  visible because its operand type is properly visible. This check
*************** package body Sem_Ch8 is
*** 6699,6704 ****
--- 6752,6850 ----
        --  enclosing instance. If yes, it has precedence over outer candidates.
  
        --------------------------
+       --  Find_Nearer_Entity  --
+       --------------------------
+ 
+       function Find_Nearer_Entity
+         (New_S  : Entity_Id;
+          Old1_S : Entity_Id;
+          Old2_S : Entity_Id) return Entity_Id
+       is
+          New_F  : Entity_Id;
+          Old1_F : Entity_Id;
+          Old2_F : Entity_Id;
+          Anc_T  : Entity_Id;
+ 
+       begin
+          New_F  := First_Formal (New_S);
+          Old1_F := First_Formal (Old1_S);
+          Old2_F := First_Formal (Old2_S);
+ 
+          --  The criterion is whether the type of the formals of one of Old1_S
+          --  and Old2_S is an ancestor subtype of the type of the corresponding
+          --  formals of New_S while the other is not (we already know that they
+          --  are all subtypes of the same base type).
+ 
+          --  This makes it possible to find the more correct renamed entity in
+          --  the case of a generic instantiation nested in an enclosing one for
+          --  which different formal types get the same actual type, which will
+          --  in turn make it possible for Inherit_Renamed_Profile to preserve
+          --  types on formal parameters and ultimately simplify disambiguation.
+ 
+          --  Consider the follow package G:
+ 
+          --    generic
+          --       type Item_T is private;
+          --       with function Compare (L, R: Item_T) return Boolean is <>;
+ 
+          --       type Bound_T is private;
+          --       with function Compare (L, R : Bound_T) return Boolean is <>;
+          --    package G is
+          --       ...
+          --    end G;
+ 
+          --    package body G is
+          --       package My_Inner is Inner_G (Bound_T);
+          --       ...
+          --    end G;
+ 
+          --    with the following package Inner_G:
+ 
+          --    generic
+          --       type T is private;
+          --       with function Compare (L, R: T) return Boolean is <>;
+          --    package Inner_G is
+          --       function "<" (L, R: T) return Boolean is (Compare (L, R));
+          --    end Inner_G;
+ 
+          --  If G is instantiated on the same actual type with a single Compare
+          --  function:
+ 
+          --    type T is ...
+          --    function Compare (L, R : T) return Boolean;
+          --    package My_G is new (T, T);
+ 
+          --  then the renaming generated for Compare in the inner instantiation
+          --  is ambiguous: it can rename either of the renamings generated for
+          --  the outer instantiation. Now if the first one is picked up, then
+          --  the subtypes of the formal parameters of the renaming will not be
+          --  preserved in Inherit_Renamed_Profile because they are subtypes of
+          --  the Bound_T formal type and not of the Item_T formal type, so we
+          --  need to arrange for the second one to be picked up instead.
+ 
+          while Present (New_F) loop
+             if Etype (Old1_F) /= Etype (Old2_F) then
+                Anc_T := Ancestor_Subtype (Etype (New_F));
+ 
+                if Etype (Old1_F) = Anc_T then
+                   return Old1_S;
+                elsif Etype (Old2_F) = Anc_T then
+                   return Old2_S;
+                end if;
+             end if;
+ 
+             Next_Formal (New_F);
+             Next_Formal (Old1_F);
+             Next_Formal (Old2_F);
+          end loop;
+ 
+          pragma Assert (No (Old1_F));
+          pragma Assert (No (Old2_F));
+ 
+          return Empty;
+       end Find_Nearer_Entity;
+ 
+       --------------------------
        -- Is_Visible_Operation --
        --------------------------
  
*************** package body Sem_Ch8 is
*** 6822,6842 ****
                       if Present (Inst) then
                          if Within (It.Nam, Inst) then
                             if Within (Old_S, Inst) then
  
!                               --  Choose the innermost subprogram, which would
!                               --  have hidden the outer one in the generic.
  
!                               if Scope_Depth (It.Nam) <
!                                 Scope_Depth (Old_S)
!                               then
!                                  return Old_S;
!                               else
!                                  return It.Nam;
!                               end if;
                             end if;
  
                          elsif Within (Old_S, Inst) then
!                            return (Old_S);
  
                          else
                             return Report_Overload;
--- 6968,7004 ----
                       if Present (Inst) then
                          if Within (It.Nam, Inst) then
                             if Within (Old_S, Inst) then
+                               declare
+                                  It_D  : constant Uint := Scope_Depth (It.Nam);
+                                  Old_D : constant Uint := Scope_Depth (Old_S);
+                                  N_Ent : Entity_Id;
+                               begin
+                                  --  Choose the innermost subprogram, which
+                                  --  would hide the outer one in the generic.
  
!                                  if Old_D > It_D then
!                                     return Old_S;
!                                  elsif It_D > Old_D then
!                                     return It.Nam;
!                                  end if;
  
!                                  --  Otherwise, if we can determine that one
!                                  --  of the entities is nearer to the renaming
!                                  --  than the other, choose it. If not, then
!                                  --  return the newer one as done historically.
! 
!                                  N_Ent :=
!                                      Find_Nearer_Entity (New_S, Old_S, It.Nam);
!                                  if Present (N_Ent) then
!                                     return N_Ent;
!                                  else
!                                     return It.Nam;
!                                  end if;
!                               end;
                             end if;
  
                          elsif Within (Old_S, Inst) then
!                            return Old_S;
  
                          else
                             return Report_Overload;
*************** package body Sem_Ch8 is
*** 7416,7425 ****
  
              --  It is not an error if the prefix is the current instance of
              --  type name, e.g. the expression of a type aspect, when it is
!             --  analyzed for ASIS use.
  
              elsif Is_Entity_Name (P) and then Is_Current_Instance (P) then
!                null;
  
              elsif Ekind (P_Name) = E_Void then
                 Premature_Usage (P);
--- 7578,7605 ----
  
              --  It is not an error if the prefix is the current instance of
              --  type name, e.g. the expression of a type aspect, when it is
!             --  analyzed for ASIS use, or within a generic unit. We still
!             --  have to verify that a component of that name exists, and
!             --  decorate the node accordingly.
  
              elsif Is_Entity_Name (P) and then Is_Current_Instance (P) then
!                declare
!                   Comp : Entity_Id;
! 
!                begin
!                   Comp := First_Entity (Entity (P));
!                   while Present (Comp) loop
!                      if Chars (Comp) = Chars (Selector_Name (N)) then
!                         Set_Entity (N, Comp);
!                         Set_Etype  (N, Etype (Comp));
!                         Set_Entity (Selector_Name (N), Comp);
!                         Set_Etype  (Selector_Name (N), Etype (Comp));
!                         return;
!                      end if;
! 
!                      Next_Entity (Comp);
!                   end loop;
!                end;
  
              elsif Ekind (P_Name) = E_Void then
                 Premature_Usage (P);
*************** package body Sem_Ch8 is
*** 8705,8711 ****
           if Scope_Stack.Last > Scope_Stack.First then
              SST.Component_Alignment_Default :=
                Scope_Stack.Table
!                 (Scope_Stack.Last - 1).  Component_Alignment_Default;
  
           --  Otherwise, this is the first scope being pushed on the scope
           --  stack. Inherit the component alignment from the configuration
--- 8885,8891 ----
           if Scope_Stack.Last > Scope_Stack.First then
              SST.Component_Alignment_Default :=
                Scope_Stack.Table
!                 (Scope_Stack.Last - 1).Component_Alignment_Default;
  
           --  Otherwise, this is the first scope being pushed on the scope
           --  stack. Inherit the component alignment from the configuration
*************** package body Sem_Ch8 is
*** 9427,9441 ****
                    Par : constant Entity_Id := Defining_Entity (Parent (Decl));
                    Spec : constant Node_Id  :=
                             Specification (Unit (Cunit (Current_Sem_Unit)));
! 
                 begin
                    if Is_Compilation_Unit (Par)
                      and then Par /= Cunit_Entity (Current_Sem_Unit)
-                     and then Parent (Cur_Use) = Spec
-                     and then List_Containing (Cur_Use) =
-                                Visible_Declarations (Spec)
                    then
!                      return;
                    end if;
                 end;
              end if;
--- 9607,9622 ----
                    Par : constant Entity_Id := Defining_Entity (Parent (Decl));
                    Spec : constant Node_Id  :=
                             Specification (Unit (Cunit (Current_Sem_Unit)));
!                   Cur_List : constant List_Id := List_Containing (Cur_Use);
                 begin
                    if Is_Compilation_Unit (Par)
                      and then Par /= Cunit_Entity (Current_Sem_Unit)
                    then
!                      if Cur_List = Context_Items (Cunit (Current_Sem_Unit))
!                        or else Cur_List = Visible_Declarations (Spec)
!                      then
!                         return;
!                      end if;
                    end if;
                 end;
              end if;
*************** package body Sem_Ch8 is
*** 9449,9455 ****
           then
              Redundant := Clause;
              Prev_Use  := Cur_Use;
- 
           end if;
  
           if Present (Redundant) and then Parent (Redundant) /= Prev_Use then
--- 9630,9635 ----
*************** package body Sem_Ch8 is
*** 9936,9942 ****
           Set_In_Use (T);
  
           --  If T is tagged, primitive operators on class-wide operands are
!          --  also available.
  
           if Is_Tagged_Type (T) then
              Set_In_Use (Class_Wide_Type (T));
--- 10116,10125 ----
           Set_In_Use (T);
  
           --  If T is tagged, primitive operators on class-wide operands are
!          --  also deemed available. Note that this is really necessary only
!          --  in semantics-only mode, because the primitive operators are not
!          --  fully constructed in this mode, but we do it in all modes for the
!          --  sake of uniformity, as this should not matter in practice.
  
           if Is_Tagged_Type (T) then
              Set_In_Use (Class_Wide_Type (T));
*************** package body Sem_Ch8 is
*** 10151,10161 ****
           --  The package where T is declared is already used
  
           elsif In_Use (Scope (T)) then
!             Error_Msg_Sloc :=
!               Sloc (Find_Most_Prev (Current_Use_Clause (Scope (T))));
!             Error_Msg_NE -- CODEFIX
!               ("& is already use-visible through package use clause #??",
!                Id, T);
  
           --  The current scope is the package where T is declared
  
--- 10334,10351 ----
           --  The package where T is declared is already used
  
           elsif In_Use (Scope (T)) then
!             --  Due to expansion of contracts we could be attempting to issue
!             --  a spurious warning - so verify there is a previous use clause.
! 
!             if Current_Use_Clause (Scope (T)) /=
!                  Find_Most_Prev (Current_Use_Clause (Scope (T)))
!             then
!                Error_Msg_Sloc :=
!                  Sloc (Find_Most_Prev (Current_Use_Clause (Scope (T))));
!                Error_Msg_NE -- CODEFIX
!                  ("& is already use-visible through package use clause #??",
!                   Id, T);
!             end if;
  
           --  The current scope is the package where T is declared
  
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_ch9.adb gcc-10.1.0/gcc/ada/sem_ch9.adb
*** gcc-9.3.0/gcc/ada/sem_ch9.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_ch9.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Ch9 is
*** 883,889 ****
           exit when Task_Nam = Scope_Stack.Table (J).Entity;
  
           if Entry_Nam = Scope_Stack.Table (J).Entity then
!             Error_Msg_N ("duplicate accept statement for same entry", N);
           end if;
        end loop;
  
--- 883,895 ----
           exit when Task_Nam = Scope_Stack.Table (J).Entity;
  
           if Entry_Nam = Scope_Stack.Table (J).Entity then
!             Error_Msg_N
!               ("duplicate accept statement for same entry (RM 9.5.2 (15))", N);
! 
!             --  Do not continue analysis of accept statement, to prevent
!             --  cascaded errors.
! 
!             return;
           end if;
        end loop;
  
*************** package body Sem_Ch9 is
*** 1891,1899 ****
     ----------------------------------
  
     procedure Analyze_Protected_Definition (N : Node_Id) is
-       E : Entity_Id;
-       L : Entity_Id;
- 
        procedure Undelay_Itypes (T : Entity_Id);
        --  Itypes created for the private components of a protected type
        --  do not receive freeze nodes, because there is no scope in which
--- 1897,1902 ----
*************** package body Sem_Ch9 is
*** 1926,1934 ****
           end if;
  
           while Present (Comp) loop
!             if Is_Type (Comp)
!               and then Is_Itype (Comp)
!             then
                 Set_Has_Delayed_Freeze (Comp, False);
                 Set_Is_Frozen (Comp);
  
--- 1929,1935 ----
           end if;
  
           while Present (Comp) loop
!             if Is_Type (Comp) and then Is_Itype (Comp) then
                 Set_Has_Delayed_Freeze (Comp, False);
                 Set_Is_Frozen (Comp);
  
*************** package body Sem_Ch9 is
*** 1936,1944 ****
                    Layout_Type (Comp);
                 end if;
  
!                if Is_Record_Type (Comp)
!                  or else Is_Protected_Type (Comp)
!                then
                    Undelay_Itypes (Comp);
                 end if;
              end if;
--- 1937,1943 ----
                    Layout_Type (Comp);
                 end if;
  
!                if Is_Record_Type (Comp) or else Is_Protected_Type (Comp) then
                    Undelay_Itypes (Comp);
                 end if;
              end if;
*************** package body Sem_Ch9 is
*** 1947,1952 ****
--- 1946,1957 ----
           end loop;
        end Undelay_Itypes;
  
+       --  Local variables
+ 
+       Prot_Typ : constant Entity_Id := Current_Scope;
+       Item_Id  : Entity_Id;
+       Last_Id  : Entity_Id;
+ 
     --  Start of processing for Analyze_Protected_Definition
  
     begin
*************** package body Sem_Ch9 is
*** 1957,1988 ****
        if Present (Private_Declarations (N))
          and then not Is_Empty_List (Private_Declarations (N))
        then
!          L := Last_Entity (Current_Scope);
           Analyze_Declarations (Private_Declarations (N));
  
!          if Present (L) then
!             Set_First_Private_Entity (Current_Scope, Next_Entity (L));
           else
!             Set_First_Private_Entity (Current_Scope,
!               First_Entity (Current_Scope));
           end if;
        end if;
  
!       E := First_Entity (Current_Scope);
!       while Present (E) loop
!          if Ekind_In (E, E_Function, E_Procedure) then
!             Set_Convention (E, Convention_Protected);
           else
!             Propagate_Concurrent_Flags (Current_Scope, Etype (E));
           end if;
  
!          Next_Entity (E);
        end loop;
  
!       Undelay_Itypes (Current_Scope);
  
        Check_Max_Entries (N, Max_Protected_Entries);
!       Process_End_Label (N, 'e', Current_Scope);
     end Analyze_Protected_Definition;
  
     ----------------------------------------
--- 1962,1998 ----
        if Present (Private_Declarations (N))
          and then not Is_Empty_List (Private_Declarations (N))
        then
!          Last_Id := Last_Entity (Prot_Typ);
           Analyze_Declarations (Private_Declarations (N));
  
!          if Present (Last_Id) then
!             Set_First_Private_Entity (Prot_Typ, Next_Entity (Last_Id));
           else
!             Set_First_Private_Entity (Prot_Typ, First_Entity (Prot_Typ));
           end if;
        end if;
  
!       Item_Id := First_Entity (Prot_Typ);
!       while Present (Item_Id) loop
!          if Ekind_In (Item_Id, E_Function, E_Procedure) then
!             Set_Convention (Item_Id, Convention_Protected);
           else
!             Propagate_Concurrent_Flags (Prot_Typ, Etype (Item_Id));
! 
!             if Chars (Item_Id) /= Name_uParent
!               and then Needs_Finalization (Etype (Item_Id))
!             then
!                Set_Has_Controlled_Component (Prot_Typ);
!             end if;
           end if;
  
!          Next_Entity (Item_Id);
        end loop;
  
!       Undelay_Itypes (Prot_Typ);
  
        Check_Max_Entries (N, Max_Protected_Entries);
!       Process_End_Label (N, 'e', Prot_Typ);
     end Analyze_Protected_Definition;
  
     ----------------------------------------
*************** package body Sem_Ch9 is
*** 2340,2347 ****
           for S in reverse 0 .. Scope_Stack.Last loop
              Req_Scope := Scope_Stack.Table (S).Entity;
  
!             exit when Ekind (Req_Scope) in Task_Kind
!               or else Ekind (Req_Scope) in Protected_Kind;
  
              if Is_Entry (Req_Scope) then
                 Outer_Ent := Req_Scope;
--- 2350,2356 ----
           for S in reverse 0 .. Scope_Stack.Last loop
              Req_Scope := Scope_Stack.Table (S).Entity;
  
!             exit when Is_Concurrent_Type (Req_Scope);
  
              if Is_Entry (Req_Scope) then
                 Outer_Ent := Req_Scope;
*************** package body Sem_Ch9 is
*** 2749,2755 ****
        Insert_After (N, Obj_Decl);
        Mark_Rewrite_Insertion (Obj_Decl);
  
!       --  Relocate aspect Part_Of from the the original single protected
        --  declaration to the anonymous object declaration. This emulates the
        --  placement of an equivalent source pragma.
  
--- 2758,2764 ----
        Insert_After (N, Obj_Decl);
        Mark_Rewrite_Insertion (Obj_Decl);
  
!       --  Relocate aspect Part_Of from the original single protected
        --  declaration to the anonymous object declaration. This emulates the
        --  placement of an equivalent source pragma.
  
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_dim.adb gcc-10.1.0/gcc/ada/sem_dim.adb
*** gcc-9.3.0/gcc/ada/sem_dim.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_dim.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Dim is
*** 115,121 ****
  
     type Symbol_Array is
       array (Dimension_Position range
!               Low_Position_Bound ..  High_Position_Bound) of String_Id;
     --  Store the symbols of all units within a system
  
     No_Symbols : constant Symbol_Array := (others => No_String);
--- 115,121 ----
  
     type Symbol_Array is
       array (Dimension_Position range
!               Low_Position_Bound .. High_Position_Bound) of String_Id;
     --  Store the symbols of all units within a system
  
     No_Symbols : constant Symbol_Array := (others => No_String);
*************** package body Sem_Dim is
*** 151,157 ****
  
     type Dimension_Type is
       array (Dimension_Position range
!               Low_Position_Bound ..  High_Position_Bound) of Rational;
  
     Null_Dimension : constant Dimension_Type := (others => Zero);
  
--- 151,157 ----
  
     type Dimension_Type is
       array (Dimension_Position range
!               Low_Position_Bound .. High_Position_Bound) of Rational;
  
     Null_Dimension : constant Dimension_Type := (others => Zero);
  
*************** package body Sem_Dim is
*** 399,407 ****
  
     function "+" (Left, Right : Rational) return Rational is
        R : constant Rational :=
!             Rational'(Numerator   =>  Left.Numerator   * Right.Denominator +
!                                       Left.Denominator * Right.Numerator,
!                       Denominator => Left.Denominator  * Right.Denominator);
     begin
        return Reduce (R);
     end "+";
--- 399,407 ----
  
     function "+" (Left, Right : Rational) return Rational is
        R : constant Rational :=
!             Rational'(Numerator   => Left.Numerator   * Right.Denominator +
!                                      Left.Denominator * Right.Numerator,
!                       Denominator => Left.Denominator * Right.Denominator);
     begin
        return Reduce (R);
     end "+";
*************** package body Sem_Dim is
*** 1142,1147 ****
--- 1142,1152 ----
        if Ada_Version < Ada_2012 then
           return;
  
+       --  Inlined bodies have already been checked for dimensionality
+ 
+       elsif In_Inlined_Body then
+          return;
+ 
        elsif not Comes_From_Source (N) then
           if Nkind_In (N, N_Explicit_Dereference,
                           N_Identifier,
*************** package body Sem_Dim is
*** 1233,1240 ****
        Dims_Of_Comp_Typ : constant Dimension_Type := Dimensions_Of (Comp_Typ);
        Exps             : constant List_Id        := Expressions (N);
  
!       Comp : Node_Id;
!       Expr : Node_Id;
  
        Error_Detected : Boolean := False;
        --  This flag is used in order to indicate if an error has been detected
--- 1238,1246 ----
        Dims_Of_Comp_Typ : constant Dimension_Type := Dimensions_Of (Comp_Typ);
        Exps             : constant List_Id        := Expressions (N);
  
!       Comp         : Node_Id;
!       Dims_Of_Expr : Dimension_Type;
!       Expr         : Node_Id;
  
        Error_Detected : Boolean := False;
        --  This flag is used in order to indicate if an error has been detected
*************** package body Sem_Dim is
*** 1244,1253 ****
--- 1250,1262 ----
        --  Aspect is an Ada 2012 feature. Nothing to do here if the component
        --  base type is not a dimensioned type.
  
+       --  Inlined bodies have already been checked for dimensionality.
+ 
        --  Note that here the original node must come from source since the
        --  original array aggregate may not have been entirely decorated.
  
        if Ada_Version < Ada_2012
+         or else In_Inlined_Body
          or else not Comes_From_Source (Original_Node (N))
          or else not Has_Dimension_System (Base_Type (Comp_Typ))
        then
*************** package body Sem_Dim is
*** 1281,1291 ****
           --  (may happen when an aggregate is converted into a positional
           --  aggregate). We also must verify that this is a scalar component,
           --  and not a subaggregate of a multidimensional aggregate.
  
           if Comes_From_Source (Original_Node (Expr))
             and then Present (Etype (Expr))
             and then Is_Numeric_Type (Etype (Expr))
!            and then Dimensions_Of (Expr) /= Dims_Of_Comp_Typ
             and then Sloc (Comp) /= Sloc (Prev (Comp))
           then
              --  Check if an error has already been encountered so far
--- 1290,1308 ----
           --  (may happen when an aggregate is converted into a positional
           --  aggregate). We also must verify that this is a scalar component,
           --  and not a subaggregate of a multidimensional aggregate.
+          --  The expression may be an identifier that has been copied several
+          --  times during expansion, its dimensions are those of its type.
+ 
+          if Is_Entity_Name (Expr) then
+             Dims_Of_Expr := Dimensions_Of (Etype (Expr));
+          else
+             Dims_Of_Expr := Dimensions_Of (Expr);
+          end if;
  
           if Comes_From_Source (Original_Node (Expr))
             and then Present (Etype (Expr))
             and then Is_Numeric_Type (Etype (Expr))
!            and then Dims_Of_Expr /= Dims_Of_Comp_Typ
             and then Sloc (Comp) /= Sloc (Prev (Comp))
           then
              --  Check if an error has already been encountered so far
*************** package body Sem_Dim is
*** 1625,1634 ****
  
     begin
        --  Aspect is an Ada 2012 feature. Note that there is no need to check
!       --  dimensions for calls that don't come from source, or those that may
!       --  have semantic errors.
  
        if Ada_Version < Ada_2012
          or else not Comes_From_Source (N)
          or else Error_Posted (N)
        then
--- 1642,1652 ----
  
     begin
        --  Aspect is an Ada 2012 feature. Note that there is no need to check
!       --  dimensions for calls in inlined bodies, or calls that don't come
!       --  from source, or those that may have semantic errors.
  
        if Ada_Version < Ada_2012
+         or else In_Inlined_Body
          or else not Comes_From_Source (N)
          or else Error_Posted (N)
        then
*************** package body Sem_Dim is
*** 1957,1967 ****
  
     begin
        --  Aspect is an Ada 2012 feature. Note that there is no need to check
!       --  dimensions for aggregates that don't come from source, or if we are
!       --  within an initialization procedure, whose expressions have been
!       --  checked at the point of record declaration.
  
        if Ada_Version < Ada_2012
          or else not Comes_From_Source (N)
          or else Inside_Init_Proc
        then
--- 1975,1986 ----
  
     begin
        --  Aspect is an Ada 2012 feature. Note that there is no need to check
!       --  dimensions in inlined bodies, or for aggregates that don't come
!       --  from source, or if we are within an initialization procedure, whose
!       --  expressions have been checked at the point of record declaration.
  
        if Ada_Version < Ada_2012
+         or else In_Inlined_Body
          or else not Comes_From_Source (N)
          or else Inside_Init_Proc
        then
*************** package body Sem_Dim is
*** 2897,2903 ****
           New_Aspects  := Empty_List;
  
           List_Of_Dims := New_List;
!          for Position in Dims_Of_N'First ..  System.Count loop
              Dim_Power := Dims_Of_N (Position);
              Append_To (List_Of_Dims,
                 Make_Op_Divide (Loc,
--- 2916,2922 ----
           New_Aspects  := Empty_List;
  
           List_Of_Dims := New_List;
!          for Position in Dims_Of_N'First .. System.Count loop
              Dim_Power := Dims_Of_N (Position);
              Append_To (List_Of_Dims,
                 Make_Op_Divide (Loc,
*************** package body Sem_Dim is
*** 3014,3020 ****
     --  System.Dim.Float_IO or System.Dim.Integer_IO, the default string
     --  parameter is rewritten to include the unit symbol (or the dimension
     --  symbols if not a defined quantity) in the output of a dimensioned
!    --  object.  If a value is already supplied by the user for the parameter
     --  Symbol, it is used as is.
  
     --  Case 1. Item is dimensionless
--- 3033,3039 ----
     --  System.Dim.Float_IO or System.Dim.Integer_IO, the default string
     --  parameter is rewritten to include the unit symbol (or the dimension
     --  symbols if not a defined quantity) in the output of a dimensioned
!    --  object. If a value is already supplied by the user for the parameter
     --  Symbol, it is used as is.
  
     --  Case 1. Item is dimensionless
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_disp.adb gcc-10.1.0/gcc/ada/sem_disp.adb
*** gcc-9.3.0/gcc/ada/sem_disp.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_disp.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Disp is
*** 211,216 ****
--- 211,225 ----
  
           if Present (Ctrl_Type) then
  
+             --  Obtain the full type in case we are looking at an incomplete
+             --  view.
+ 
+             if Ekind (Ctrl_Type) = E_Incomplete_Type
+               and then Present (Full_View (Ctrl_Type))
+             then
+                Ctrl_Type := Full_View (Ctrl_Type);
+             end if;
+ 
              --  When controlling type is concurrent and declared within a
              --  generic or inside an instance use corresponding record type.
  
*************** package body Sem_Disp is
*** 587,593 ****
                 --  We need to determine whether the context of the call
                 --  provides a tag to make the call dispatching. This requires
                 --  the call to be the actual in an enclosing call, and that
!                --  actual must be controlling.  If the call is an operand of
                 --  equality, the other operand must not ve abstract.
  
                 if not Is_Tagged_Type (Typ)
--- 596,602 ----
                 --  We need to determine whether the context of the call
                 --  provides a tag to make the call dispatching. This requires
                 --  the call to be the actual in an enclosing call, and that
!                --  actual must be controlling. If the call is an operand of
                 --  equality, the other operand must not ve abstract.
  
                 if not Is_Tagged_Type (Typ)
*************** package body Sem_Disp is
*** 1135,1145 ****
           --  3. Subprograms associated with stream attributes (built by
           --     New_Stream_Subprogram)
  
!          --  4. Wrapper built for inherited operations with inherited class-
           --     wide conditions, where the conditions include calls to other
           --     overridden primitives. The wrappers include checks on these
           --     modified conditions. (AI12-113).
  
           if Present (Old_Subp)
             and then Present (Overridden_Operation (Subp))
             and then Is_Dispatching_Operation (Old_Subp)
--- 1144,1158 ----
           --  3. Subprograms associated with stream attributes (built by
           --     New_Stream_Subprogram)
  
!          --  4. Wrappers built for inherited operations with inherited class-
           --     wide conditions, where the conditions include calls to other
           --     overridden primitives. The wrappers include checks on these
           --     modified conditions. (AI12-113).
  
+          --  5. Declarations built for subprograms without separate specs that
+          --     are eligible for inlining in GNATprove (inside
+          --     Sem_Ch6.Analyze_Subprogram_Body_Helper).
+ 
           if Present (Old_Subp)
             and then Present (Overridden_Operation (Subp))
             and then Is_Dispatching_Operation (Old_Subp)
*************** package body Sem_Disp is
*** 1159,1165 ****
                or else Get_TSS_Name (Subp) = TSS_Stream_Read
                or else Get_TSS_Name (Subp) = TSS_Stream_Write
  
!               or else Present (Contract (Overridden_Operation (Subp))));
  
              Check_Controlling_Formals (Tagged_Type, Subp);
              Override_Dispatching_Operation (Tagged_Type, Old_Subp, Subp);
--- 1172,1180 ----
                or else Get_TSS_Name (Subp) = TSS_Stream_Read
                or else Get_TSS_Name (Subp) = TSS_Stream_Write
  
!               or else Present (Contract (Overridden_Operation (Subp)))
! 
!               or else GNATprove_Mode);
  
              Check_Controlling_Formals (Tagged_Type, Subp);
              Override_Dispatching_Operation (Tagged_Type, Old_Subp, Subp);
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_disp.ads gcc-10.1.0/gcc/ada/sem_disp.ads
*** gcc-9.3.0/gcc/ada/sem_disp.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_disp.ads	Thu May  7 10:49:59 2020
*************** package Sem_Disp is
*** 151,157 ****
     --  Returns True if E is a null procedure that is an interface primitive
  
     function Is_Overriding_Subprogram (E : Entity_Id) return Boolean;
!    --  Returns True if E is an overriding subprogram
  
     function Is_Tag_Indeterminate (N : Node_Id) return Boolean;
     --  Returns true if the expression N is tag-indeterminate. An expression
--- 151,158 ----
     --  Returns True if E is a null procedure that is an interface primitive
  
     function Is_Overriding_Subprogram (E : Entity_Id) return Boolean;
!    --  Returns True if E is an overriding subprogram and False otherwise, in
!    --  particular for an inherited subprogram.
  
     function Is_Tag_Indeterminate (N : Node_Id) return Boolean;
     --  Returns true if the expression N is tag-indeterminate. An expression
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_elab.adb gcc-10.1.0/gcc/ada/sem_elab.adb
*** gcc-9.3.0/gcc/ada/sem_elab.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_elab.adb	Thu May  7 10:49:59 2020
***************
*** 23,28 ****
--- 23,29 ----
  --                                                                          --
  ------------------------------------------------------------------------------
  
+ with ALI;      use ALI;
  with Atree;    use Atree;
  with Checks;   use Checks;
  with Debug;    use Debug;
*************** with Sem_Aux;  use Sem_Aux;
*** 48,53 ****
--- 49,55 ----
  with Sem_Cat;  use Sem_Cat;
  with Sem_Ch7;  use Sem_Ch7;
  with Sem_Ch8;  use Sem_Ch8;
+ with Sem_Disp; use Sem_Disp;
  with Sem_Prag; use Sem_Prag;
  with Sem_Util; use Sem_Util;
  with Sinfo;    use Sinfo;
*************** with Tbuild;   use Tbuild;
*** 59,65 ****
  with Uintp;    use Uintp;
  with Uname;    use Uname;
  
! with GNAT.HTable; use GNAT.HTable;
  
  package body Sem_Elab is
  
--- 61,70 ----
  with Uintp;    use Uintp;
  with Uname;    use Uname;
  
! with GNAT;                 use GNAT;
! with GNAT.Dynamic_HTables; use GNAT.Dynamic_HTables;
! with GNAT.Lists;           use GNAT.Lists;
! with GNAT.Sets;            use GNAT.Sets;
  
  package body Sem_Elab is
  
*************** package body Sem_Elab is
*** 80,109 ****
     --      Due to control and data flow, the ABE mechanism cannot accurately
     --      determine whether a particular scenario will be elaborated or not.
     --      Conditional ABE checks are therefore used to verify the elaboration
!    --      status of a local and external target at run time.
     --
!    --    * Supply elaboration dependencies for a unit to binde
     --
!    --      The ABE mechanism registers each outgoing elaboration edge for the
!    --      main unit in its ALI file. GNATbind and binde can then reconstruct
!    --      the full elaboration graph and determine the proper elaboration
!    --      order for all units in the compilation.
     --
     --  The ABE mechanism supports three models of elaboration:
     --
     --    * Dynamic model - This is the most permissive of the three models.
!    --      When the dynamic model is in effect, the mechanism performs very
!    --      little diagnostics and generates run-time checks to detect ABE
!    --      issues. The behaviour of this model is identical to that specified
!    --      by the Ada RM. This model is enabled with switch -gnatE.
     --
!    --    * Static model - This is the middle ground of the three models. When
     --      the static model is in effect, the mechanism diagnoses and installs
     --      run-time checks to detect ABE issues in the main unit. In addition,
!    --      the mechanism generates implicit Elaborate or Elaborate_All pragmas
!    --      to ensure the prior elaboration of withed units. The model employs
!    --      textual order, with clause context, and elaboration-related source
!    --      pragmas. This is the default model.
     --
     --    * SPARK model - This is the most conservative of the three models and
     --      impelements the semantics defined in SPARK RM 7.7. The SPARK model
--- 85,125 ----
     --      Due to control and data flow, the ABE mechanism cannot accurately
     --      determine whether a particular scenario will be elaborated or not.
     --      Conditional ABE checks are therefore used to verify the elaboration
!    --      status of local and external targets at run time.
     --
!    --    * Supply implicit elaboration dependencies for a unit to binde
     --
!    --      The ABE mechanism creates implicit dependencies in the form of with
!    --      clauses subject to pragma Elaborate[_All] when the elaboration graph
!    --      reaches into an external unit. The implicit dependencies are encoded
!    --      in the ALI file of the main unit. GNATbind and binde then use these
!    --      dependencies to augment the library item graph and determine the
!    --      elaboration order of all units in the compilation.
!    --
!    --    * Supply pieces of the invocation graph for a unit to bindo
!    --
!    --      The ABE mechanism captures paths starting from elaboration code or
!    --      top level constructs that reach into an external unit. The paths are
!    --      encoded in the ALI file of the main unit in the form of declarations
!    --      which represent nodes, and relations which represent edges. GNATbind
!    --      and bindo then build the full invocation graph in order to augment
!    --      the library item graph and determine the elaboration order of all
!    --      units in the compilation.
     --
     --  The ABE mechanism supports three models of elaboration:
     --
     --    * Dynamic model - This is the most permissive of the three models.
!    --      When the dynamic model is in effect, the mechanism diagnoses and
!    --      installs run-time checks to detect ABE issues in the main unit.
!    --      The behaviour of this model is identical to that specified by the
!    --      Ada RM. This model is enabled with switch -gnatE.
     --
!    --    Static model - This is the middle ground of the three models. When
     --      the static model is in effect, the mechanism diagnoses and installs
     --      run-time checks to detect ABE issues in the main unit. In addition,
!    --      the mechanism generates implicit dependencies between units in the
!    --      form of with clauses subject to pragma Elaborate[_All] to ensure
!    --      the prior elaboration of withed units. This is the default model.
     --
     --    * SPARK model - This is the most conservative of the three models and
     --      impelements the semantics defined in SPARK RM 7.7. The SPARK model
*************** package body Sem_Elab is
*** 117,124 ****
     -- Terminology --
     -----------------
  
!    --  * ABE - An attempt to activate, call, or instantiate a scenario which
!    --    has not been fully elaborated.
     --
     --  * Bridge target - A type of target. A bridge target is a link between
     --    scenarios. It is usually a byproduct of expansion and does not have
--- 133,140 ----
     -- Terminology --
     -----------------
  
!    --  * ABE - An attempt to invoke a scenario which has not been elaborated
!    --    yet.
     --
     --  * Bridge target - A type of target. A bridge target is a link between
     --    scenarios. It is usually a byproduct of expansion and does not have
*************** package body Sem_Elab is
*** 129,137 ****
     --    call. N_Call_Marker nodes do not have static and run-time semantics.
     --
     --  * Conditional ABE - A type of ABE. A conditional ABE occurs when the
!    --    elaboration or invocation of a target by a scenario within the main
!    --    unit causes an ABE, but does not cause an ABE for another scenarios
!    --    within the main unit.
     --
     --  * Declaration level - A type of enclosing level. A scenario or target is
     --    at the declaration level when it appears within the declarations of a
--- 145,153 ----
     --    call. N_Call_Marker nodes do not have static and run-time semantics.
     --
     --  * Conditional ABE - A type of ABE. A conditional ABE occurs when the
!    --    invocation of a target by a scenario within the main unit causes an
!    --    ABE, but does not cause an ABE for another scenarios within the main
!    --    unit.
     --
     --  * Declaration level - A type of enclosing level. A scenario or target is
     --    at the declaration level when it appears within the declarations of a
*************** package body Sem_Elab is
*** 148,160 ****
     --    package library unit, ignoring enclosing packages.
     --
     --  * Guaranteed ABE - A type of ABE. A guaranteed ABE occurs when the
!    --    elaboration or invocation of a target by all scenarios within the
!    --    main unit causes an ABE.
     --
     --  * Instantiation library level - A type of enclosing level. A scenario
     --    or target is at the instantiation library level if it appears in an
     --    instantiation library unit, ignoring enclosing packages.
     --
     --  * Library level - A type of enclosing level. A scenario or target is at
     --    the library level if it appears in a package library unit, ignoring
     --    enclosng packages.
--- 164,189 ----
     --    package library unit, ignoring enclosing packages.
     --
     --  * Guaranteed ABE - A type of ABE. A guaranteed ABE occurs when the
!    --    invocation of a target by all scenarios within the main unit causes
!    --    an ABE.
     --
     --  * Instantiation library level - A type of enclosing level. A scenario
     --    or target is at the instantiation library level if it appears in an
     --    instantiation library unit, ignoring enclosing packages.
     --
+    --  * Invocation - The act of activating a task, calling a subprogram, or
+    --    instantiating a generic.
+    --
+    --  * Invocation construct - An entry declaration, [single] protected type,
+    --    subprogram declaration, subprogram instantiation, or a [single] task
+    --    type declared in the visible, private, or body declarations of the
+    --    main unit.
+    --
+    --  * Invocation relation - A flow link between two invocation constructs
+    --
+    --  * Invocation signature - A set of attributes that uniquely identify an
+    --    invocation construct within the namespace of all ALI files.
+    --
     --  * Library level - A type of enclosing level. A scenario or target is at
     --    the library level if it appears in a package library unit, ignoring
     --    enclosng packages.
*************** package body Sem_Elab is
*** 162,170 ****
     --  * Non-library-level encapsulator - A construct that cannot be elaborated
     --    on its own and requires elaboration by a top-level scenario.
     --
!    --  * Scenario - A construct or context which may be elaborated or executed
!    --    by elaboration code. The scenarios recognized by the ABE mechanism are
!    --    as follows:
     --
     --      - '[Unrestricted_]Access of entries, operators, and subprograms
     --
--- 191,199 ----
     --  * Non-library-level encapsulator - A construct that cannot be elaborated
     --    on its own and requires elaboration by a top-level scenario.
     --
!    --  * Scenario - A construct or context which is invoked by elaboration code
!    --    or invocation construct. The scenarios recognized by the ABE mechanism
!    --    are as follows:
     --
     --      - '[Unrestricted_]Access of entries, operators, and subprograms
     --
*************** package body Sem_Elab is
*** 182,189 ****
     --
     --      - Task activation
     --
!    --  * Target - A construct referenced by a scenario. The targets recognized
!    --    by the ABE mechanism are as follows:
     --
     --      - For '[Unrestricted_]Access of entries, operators, and subprograms,
     --        the target is the entry, operator, or subprogram.
--- 211,218 ----
     --
     --      - Task activation
     --
!    --  * Target - A construct invoked by a scenario. The targets recognized by
!    --    the ABE mechanism are as follows:
     --
     --      - For '[Unrestricted_]Access of entries, operators, and subprograms,
     --        the target is the entry, operator, or subprogram.
*************** package body Sem_Elab is
*** 201,216 ****
     --      - For reads of variables, the target is the variable
     --
     --      - For task activation, the target is the task body
!    --
!    --  * Top-level scenario - A scenario which appears in a non-generic main
!    --    unit. Depending on the elaboration model is in effect, the following
!    --    addotional restrictions apply:
!    --
!    --      - Dynamic model - No restrictions
!    --
!    --      - SPARK model - Falls back to either the dynamic or static model
!    --
!    --      - Static model - The scenario must be at the library level
  
     ---------------------
     -- Recording phase --
--- 230,313 ----
     --      - For reads of variables, the target is the variable
     --
     --      - For task activation, the target is the task body
! 
!    ------------------
!    -- Architecture --
!    ------------------
! 
!    --     Analysis/Resolution
!    --     |
!    --     +- Build_Call_Marker
!    --     |
!    --     +- Build_Variable_Reference_Marker
!    --     |
!    --  +- | -------------------- Recording phase ---------------------------+
!    --  |  v                                                                 |
!    --  |  Record_Elaboration_Scenario                                       |
!    --  |  |                                                                 |
!    --  |  +--> Check_Preelaborated_Call                                     |
!    --  |  |                                                                 |
!    --  |  +--> Process_Guaranteed_ABE                                       |
!    --  |  |    |                                                            |
!    --  |  |    +--> Process_Guaranteed_ABE_Activation                       |
!    --  |  |    +--> Process_Guaranteed_ABE_Call                             |
!    --  |  |    +--> Process_Guaranteed_ABE_Instantiation                    |
!    --  |  |                                                                 |
!    --  +- | ----------------------------------------------------------------+
!    --     |
!    --     |
!    --     +--> Internal_Representation
!    --     |
!    --     +--> Scenario_Storage
!    --     |
!    --     End of Compilation
!    --     |
!    --  +- | --------------------- Processing phase -------------------------+
!    --  |  v                                                                 |
!    --  |  Check_Elaboration_Scenarios                                       |
!    --  |  |                                                                 |
!    --  |  +--> Check_Conditional_ABE_Scenarios                              |
!    --  |  |    |                                                            |
!    --  |  |    +--> Process_Conditional_ABE <----------------------+        |
!    --  |  |         |                                              |        |
!    --  |  |         +--> Process_Conditional_ABE_Activation        |        |
!    --  |  |         |    |                                         |        |
!    --  |  |         |    +-----------------------------+           |        |
!    --  |  |         |                                  |           |        |
!    --  |  |         +--> Process_Conditional_ABE_Call  +---> Traverse_Body  |
!    --  |  |         |    |                             |                    |
!    --  |  |         |    +-----------------------------+                    |
!    --  |  |         |                                                       |
!    --  |  |         +--> Process_Conditional_ABE_Access_Taken               |
!    --  |  |         +--> Process_Conditional_ABE_Instantiation              |
!    --  |  |         +--> Process_Conditional_ABE_Variable_Assignment        |
!    --  |  |         +--> Process_Conditional_ABE_Variable_Reference         |
!    --  |  |                                                                 |
!    --  |  +--> Check_SPARK_Scenario                                         |
!    --  |  |    |                                                            |
!    --  |  |    +--> Process_SPARK_Scenario                                  |
!    --  |  |         |                                                       |
!    --  |  |         +--> Process_SPARK_Derived_Type                         |
!    --  |  |         +--> Process_SPARK_Instantiation                        |
!    --  |  |         +--> Process_SPARK_Refined_State_Pragma                 |
!    --  |  |                                                                 |
!    --  |  +--> Record_Invocation_Graph                                      |
!    --  |       |                                                            |
!    --  |       +--> Process_Invocation_Body_Scenarios                       |
!    --  |       +--> Process_Invocation_Spec_Scenarios                       |
!    --  |       +--> Process_Main_Unit                                       |
!    --  |            |                                                       |
!    --  |            +--> Process_Invocation_Scenario <-------------+        |
!    --  |                 |                                         |        |
!    --  |                 +--> Process_Invocation_Activation        |        |
!    --  |                 |    |                                    |        |
!    --  |                 |    +------------------------+           |        |
!    --  |                 |                             |           |        |
!    --  |                 +--> Process_Invocation_Call  +---> Traverse_Body  |
!    --  |                      |                        |                    |
!    --  |                      +------------------------+                    |
!    --  |                                                                    |
!    --  +--------------------------------------------------------------------+
  
     ---------------------
     -- Recording phase --
*************** package body Sem_Elab is
*** 219,232 ****
     --  The Recording phase coincides with the analysis/resolution phase of the
     --  compiler. It has the following objectives:
     --
!    --    * Record all top-level scenarios for examination by the Processing
     --      phase.
     --
     --      Saving only a certain number of nodes improves the performance of
     --      the ABE mechanism. This eliminates the need to examine the whole
     --      tree in a separate pass.
     --
!    --    * Record certain SPARK scenarios which are not necessarily executable
     --      during elaboration, but still require elaboration-related checks.
     --
     --      Saving only a certain number of nodes improves the performance of
--- 316,329 ----
     --  The Recording phase coincides with the analysis/resolution phase of the
     --  compiler. It has the following objectives:
     --
!    --    * Record all suitable scenarios for examination by the Processing
     --      phase.
     --
     --      Saving only a certain number of nodes improves the performance of
     --      the ABE mechanism. This eliminates the need to examine the whole
     --      tree in a separate pass.
     --
!    --    * Record certain SPARK scenarios which are not necessarily invoked
     --      during elaboration, but still require elaboration-related checks.
     --
     --      Saving only a certain number of nodes improves the performance of
*************** package body Sem_Elab is
*** 240,247 ****
     --      does not need the heavy recursive traversal done by the Processing
     --      phase.
     --
!    --    * Detect and diagnose guaranteed ABEs caused by instantiations,
!    --      calls, and task activation.
     --
     --      The issues detected by the ABE mechanism are reported as warnings
     --      because they do not violate Ada semantics. Forward instantiations
--- 337,344 ----
     --      does not need the heavy recursive traversal done by the Processing
     --      phase.
     --
!    --    * Detect and diagnose guaranteed ABEs caused by instantiations, calls,
!    --      and task activation.
     --
     --      The issues detected by the ABE mechanism are reported as warnings
     --      because they do not violate Ada semantics. Forward instantiations
*************** package body Sem_Elab is
*** 259,359 ****
     --  and/or inlining of bodies, but before the removal of Ghost code. It has
     --  the following objectives:
     --
!    --    * Examine all top-level scenarios saved during the Recording phase
     --
!    --      The top-level scenarios act as roots for depth-first traversal of
!    --      the call/instantiation/task activation graph. The traversal stops
!    --      when an outgoing edge leaves the main unit.
     --
!    --    * Examine all SPARK scenarios saved during the Recording phase
     --
!    --    * Depending on the elaboration model in effect, perform the following
!    --      actions:
     --
!    --        - Dynamic model - Install run-time conditional ABE checks.
     --
!    --        - SPARK model - Enforce the SPARK elaboration rules
     --
!    --        - Static model - Diagnose conditional ABEs, install run-time
!    --          conditional ABE checks, and guarantee the elaboration of
!    --          external units.
     --
!    --    * Examine nested scenarios
     --
!    --      Nested scenarios discovered during the depth-first traversal are
!    --      in turn subjected to the same actions outlined above and examined
!    --      for the next level of nested scenarios.
! 
!    ------------------
!    -- Architecture --
!    ------------------
! 
!    --     Analysis/Resolution
!    --     |
!    --     +- Build_Call_Marker
!    --     |
!    --     +- Build_Variable_Reference_Marker
!    --     |
!    --  +- | -------------------- Recording phase ---------------------------+
!    --  |  v                                                                 |
!    --  |  Record_Elaboration_Scenario                                       |
!    --  |  |                                                                 |
!    --  |  +--> Check_Preelaborated_Call                                     |
!    --  |  |                                                                 |
!    --  |  +--> Process_Guaranteed_ABE                                       |
!    --  |  |    |                                                            |
!    --  |  |    +--> Process_Guaranteed_ABE_Activation                       |
!    --  |  |    |                                                            |
!    --  |  |    +--> Process_Guaranteed_ABE_Call                             |
!    --  |  |    |                                                            |
!    --  |  |    +--> Process_Guaranteed_ABE_Instantiation                    |
!    --  |  |                                                                 |
!    --  +- | ----------------------------------------------------------------+
!    --     |
!    --     |
!    --     +--> SPARK_Scenarios
!    --     |    +-----------+-----------+ .. +-----------+
!    --     |    | Scenario1 | Scenario2 | .. | ScenarioN |
!    --     |    +-----------+-----------+ .. +-----------+
!    --     |
!    --     +--> Top_Level_Scenarios
!    --     |    +-----------+-----------+ .. +-----------+
!    --     |    | Scenario1 | Scenario2 | .. | ScenarioN |
!    --     |    +-----------+-----------+ .. +-----------+
!    --     |
!    --     End of Compilation
!    --     |
!    --  +- | --------------------- Processing phase -------------------------+
!    --  |  v                                                                 |
!    --  |  Check_Elaboration_Scenarios                                       |
!    --  |  |                                                                 |
!    --  |  +--> Check_SPARK_Scenario                                         |
!    --  |  |    |                                                            |
!    --  |  |    +--> Check_SPARK_Derived_Type                                |
!    --  |  |    |                                                            |
!    --  |  |    +--> Check_SPARK_Instantiation                               |
!    --  |  |    |                                                            |
!    --  |  |    +--> Check_SPARK_Refined_State_Pragma                        |
!    --  |  |                                                                 |
!    --  |  +--> Process_Conditional_ABE <---------------------------+        |
!    --  |       |                                                   |        |
!    --  |       +--> Process_Conditional_ABE_Access    Is_Suitable_Scenario  |
!    --  |       |                                                   ^        |
!    --  |       +--> Process_Conditional_ABE_Activation             |        |
!    --  |       |    |                                              |        |
!    --  |       |    +-----------------------------+                |        |
!    --  |       |                                  |                |        |
!    --  |       +--> Process_Conditional_ABE_Call  +--------> Traverse_Body  |
!    --  |       |    |                             |                         |
!    --  |       |    +-----------------------------+                         |
!    --  |       |                                                            |
!    --  |       +--> Process_Conditional_ABE_Instantiation                   |
!    --  |       |                                                            |
!    --  |       +--> Process_Conditional_ABE_Variable_Assignment             |
!    --  |       |                                                            |
!    --  |       +--> Process_Conditional_ABE_Variable_Reference              |
!    --  |                                                                    |
!    --  +--------------------------------------------------------------------+
  
     ----------------------
     -- Important points --
--- 356,389 ----
     --  and/or inlining of bodies, but before the removal of Ghost code. It has
     --  the following objectives:
     --
!    --    * Examine all scenarios saved during the Recording phase, and perform
!    --      the following actions:
     --
!    --        - Dynamic model
     --
!    --          Diagnose conditional ABEs, and install run-time conditional ABE
!    --          checks for all scenarios.
     --
!    --        - SPARK model
     --
!    --          Enforce the SPARK elaboration rules
     --
!    --        - Static model
     --
!    --          Diagnose conditional ABEs, install run-time conditional ABE
!    --          checks only for scenarios are reachable from elaboration code,
!    --          and guarantee the elaboration of external units by creating
!    --          implicit with clauses subject to pragma Elaborate[_All].
     --
!    --    * Examine library-level scenarios and invocation constructs, and
!    --      perform the following actions:
     --
!    --        - Determine whether the flow of execution reaches into an external
!    --          unit. If this is the case, encode the path in the ALI file of
!    --          the main unit.
!    --
!    --        - Create declarations for invocation constructs in the ALI file of
!    --          the main unit.
  
     ----------------------
     -- Important points --
*************** package body Sem_Elab is
*** 364,374 ****
     --  available. The scope stack is empty, global flags such as In_Instance
     --  or Inside_A_Generic become useless. To remedy this, the ABE mechanism
     --  must either save or recompute semantic information.
! 
     --  Expansion heavily transforms calls and to some extent instantiations. To
     --  remedy this, the ABE mechanism generates N_Call_Marker nodes in order to
     --  capture the target and relevant attributes of the original call.
! 
     --  The diagnostics of the ABE mechanism depend on accurate source locations
     --  to determine the spacial relation of nodes.
  
--- 394,404 ----
     --  available. The scope stack is empty, global flags such as In_Instance
     --  or Inside_A_Generic become useless. To remedy this, the ABE mechanism
     --  must either save or recompute semantic information.
!    --
     --  Expansion heavily transforms calls and to some extent instantiations. To
     --  remedy this, the ABE mechanism generates N_Call_Marker nodes in order to
     --  capture the target and relevant attributes of the original call.
!    --
     --  The diagnostics of the ABE mechanism depend on accurate source locations
     --  to determine the spacial relation of nodes.
  
*************** package body Sem_Elab is
*** 453,458 ****
--- 483,495 ----
     --           The ABE mechanism considers scenarios which appear in internal
     --           units (Ada, GNAT, Interfaces, System).
     --
+    --  -gnatd_F encode full invocation paths in ALI files
+    --
+    --           The ABE mechanism encodes the full path from an elaboration
+    --           procedure or invocable construct to an external target. The
+    --           path contains all intermediate activations, instantiations,
+    --           and calls.
+    --
     --  -gnatd.G ignore calls through generic formal parameters for elaboration
     --
     --           The ABE mechanism does not generate N_Call_Marker nodes for
*************** package body Sem_Elab is
*** 508,513 ****
--- 545,555 ----
     --             Ada.Synchronous_Barriers.Wait_For_Release
     --             Ada.Synchronous_Task_Control.Suspend_Until_True
     --
+    --  -gnatd_T output trace information on invocation relation construction
+    --
+    --           The ABE mechanism outputs text information concerning relation
+    --           construction to standard output.
+    --
     --  -gnatd.U ignore indirect calls for static elaboration
     --
     --           The ABE mechanism does not consider '[Unrestricted_]Access of
*************** package body Sem_Elab is
*** 589,654 ****
     --
     --           The complementary switch for -gnatwl.
  
-    ---------------------------
-    -- Adding a new scenario --
-    ---------------------------
- 
-    --  The following steps describe how to add a new elaboration scenario and
-    --  preserve the existing architecture. Note that not all of the steps may
-    --  need to be carried out.
-    --
-    --    1) Update predicate Is_Scenario
-    --
-    --    2) Add predicate Is_Suitable_xxx. Include a call to it in predicate
-    --       Is_Suitable_Scenario.
-    --
-    --    3) Update routine Record_Elaboration_Scenario
-    --
-    --    4) Add routine Process_Conditional_ABE_xxx. Include a call to it in
-    --       routine Process_Conditional_ABE.
-    --
-    --    5) Add routine Process_Guaranteed_ABE_xxx. Include a call to it in
-    --       routine Process_Guaranteed_ABE.
-    --
-    --    6) Add routine Check_SPARK_xxx. Include a call to it in routine
-    --       Check_SPARK_Scenario.
-    --
-    --    7) Add routine Info_xxx. Include a call to it in routine
-    --       Process_Conditional_ABE_xxx.
-    --
-    --    8) Add routine Output_xxx. Include a call to it in routine
-    --       Output_Active_Scenarios.
-    --
-    --    9) Add routine Extract_xxx_Attributes
-    --
-    --   10) Update routine Is_Potential_Scenario
- 
-    -------------------------
-    -- Adding a new target --
-    -------------------------
- 
-    --  The following steps describe how to add a new elaboration target and
-    --  preserve the existing architecture. Note that not all of the steps may
-    --  need to be carried out.
-    --
-    --    1) Add predicate Is_xxx.
-    --
-    --    2) Update the following predicates
-    --
-    --         Is_Ada_Semantic_Target
-    --         Is_Assertion_Pragma_Target
-    --         Is_Bridge_Target
-    --         Is_SPARK_Semantic_Target
-    --
-    --       If necessary, create a new category.
-    --
-    --    3) Update the appropriate Info_xxx routine.
-    --
-    --    4) Update the appropriate Output_xxx routine.
-    --
-    --    5) Update routine Extract_Target_Attributes. If necessary, create a
-    --       new Extract_xxx routine.
- 
     --------------------------
     -- Debugging ABE issues --
     --------------------------
--- 631,636 ----
*************** package body Sem_Elab is
*** 659,665 ****
     --
     --      Build_Call_Marker
     --      Record_Elaboration_Scenario
! 
     --  * If the issue involves an arbitrary scenario, ensure that the scenario
     --    is either recorded, or is successfully recognized while traversing a
     --    body. The routines of interest are
--- 641,647 ----
     --
     --      Build_Call_Marker
     --      Record_Elaboration_Scenario
!    --
     --  * If the issue involves an arbitrary scenario, ensure that the scenario
     --    is either recorded, or is successfully recognized while traversing a
     --    body. The routines of interest are
*************** package body Sem_Elab is
*** 668,674 ****
     --      Process_Conditional_ABE
     --      Process_Guaranteed_ABE
     --      Traverse_Body
! 
     --  * If the issue involves a circularity in the elaboration order, examine
     --    the ALI files and look for the following encodings next to units:
     --
--- 650,656 ----
     --      Process_Conditional_ABE
     --      Process_Guaranteed_ABE
     --      Traverse_Body
!    --
     --  * If the issue involves a circularity in the elaboration order, examine
     --    the ALI files and look for the following encodings next to units:
     --
*************** package body Sem_Elab is
*** 685,1284 ****
     --
     --      Ensure_Prior_Elaboration
  
!    ----------------
!    -- Attributes --
!    ----------------
  
!    --  To minimize the amount of code within routines, the ABE mechanism relies
!    --  on "attribute" records to capture relevant information for a scenario or
!    --  a target.
  
!    --  The following type captures relevant attributes which pertain to a call
  
!    type Call_Attributes is record
!       Elab_Checks_OK : Boolean;
!       --  This flag is set when the call has elaboration checks enabled
  
!       Elab_Warnings_OK : Boolean;
!       --  This flag is set when the call has elaboration warnings elabled
  
!       From_Source : Boolean;
!       --  This flag is set when the call comes from source
  
!       Ghost_Mode_Ignore : Boolean;
!       --  This flag is set when the call appears in a region subject to pragma
!       --  Ghost with policy Ignore.
  
!       In_Declarations : Boolean;
!       --  This flag is set when the call appears at the declaration level
  
!       Is_Dispatching : Boolean;
!       --  This flag is set when the call is dispatching
  
!       SPARK_Mode_On : Boolean;
!       --  This flag is set when the call appears in a region subject to pragma
!       --  SPARK_Mode with value On.
!    end record;
  
!    --  The following type captures relevant attributes which pertain to the
!    --  prior elaboration of a unit. This type is coupled together with a unit
!    --  to form a key -> value relationship.
  
!    type Elaboration_Attributes is record
!       Source_Pragma : Node_Id;
!       --  This attribute denotes a source Elaborate or Elaborate_All pragma
!       --  which guarantees the prior elaboration of some unit with respect
!       --  to the main unit. The pragma may come from the following contexts:
  
!       --    * The main unit
!       --    * The spec of the main unit (if applicable)
!       --    * Any parent spec of the main unit (if applicable)
!       --    * Any parent subunit of the main unit (if applicable)
  
!       --  The attribute remains Empty if no such pragma is available. Source
!       --  pragmas play a role in satisfying SPARK elaboration requirements.
  
!       With_Clause : Node_Id;
!       --  This attribute denotes an internally generated or source with clause
!       --  for some unit withed by the main unit. With clauses carry flags which
!       --  represent implicit Elaborate or Elaborate_All pragmas. These clauses
!       --  play a role in supplying the elaboration dependencies to binde.
!    end record;
  
!    No_Elaboration_Attributes : constant Elaboration_Attributes :=
!      (Source_Pragma => Empty,
!       With_Clause   => Empty);
  
!    --  The following type captures relevant attributes which pertain to an
!    --  instantiation.
  
!    type Instantiation_Attributes is record
!       Elab_Checks_OK : Boolean;
!       --  This flag is set when the instantiation has elaboration checks
!       --  enabled.
  
!       Elab_Warnings_OK : Boolean;
!       --  This flag is set when the instantiation has elaboration warnings
!       --  enabled.
  
!       Ghost_Mode_Ignore : Boolean;
!       --  This flag is set when the instantiation appears in a region subject
!       --  to pragma Ghost with policy ignore, or starts one such region.
  
!       In_Declarations : Boolean;
!       --  This flag is set when the instantiation appears at the declaration
!       --  level.
  
!       SPARK_Mode_On : Boolean;
!       --  This flag is set when the instantiation appears in a region subject
!       --  to pragma SPARK_Mode with value On, or starts one such region.
!    end record;
  
     --  The following type captures relevant attributes which pertain to the
!    --  state of the Processing phase.
  
!    type Processing_Attributes is record
!       Suppress_Implicit_Pragmas : Boolean;
        --  This flag is set when the Processing phase must not generate any
        --  implicit Elaborate[_All] pragmas.
  
!       Suppress_Warnings : Boolean;
        --  This flag is set when the Processing phase must not emit any warnings
        --  on elaboration problems.
  
!       Within_Initial_Condition : Boolean;
!       --  This flag is set when the Processing phase is currently examining a
!       --  scenario which was reached from an initial condition procedure.
  
!       Within_Instance : Boolean;
        --  This flag is set when the Processing phase is currently examining a
!       --  scenario which was reached from a scenario defined in an instance.
  
!       Within_Partial_Finalization : Boolean;
        --  This flag is set when the Processing phase is currently examining a
        --  scenario which was reached from a partial finalization procedure.
  
!       Within_Task_Body : Boolean;
        --  This flag is set when the Processing phase is currently examining a
        --  scenario which was reached from a task body.
     end record;
  
!    Initial_State : constant Processing_Attributes :=
!      (Suppress_Implicit_Pragmas   => False,
!       Suppress_Warnings           => False,
!       Within_Initial_Condition    => False,
!       Within_Instance             => False,
!       Within_Partial_Finalization => False,
!       Within_Task_Body            => False);
  
!    --  The following type captures relevant attributes which pertain to a
!    --  target.
  
!    type Target_Attributes is record
!       Elab_Checks_OK : Boolean;
!       --  This flag is set when the target has elaboration checks enabled
  
!       Elab_Warnings_OK : Boolean;
!       --  This flag is set when the target has elaboration warnings enabled
  
!       From_Source : Boolean;
!       --  This flag is set when the target comes from source
  
!       Ghost_Mode_Ignore : Boolean;
!       --  This flag is set when the target appears in a region subject to
!       --  pragma Ghost with policy ignore, or starts one such region.
  
!       SPARK_Mode_On : Boolean;
!       --  This flag is set when the target appears in a region subject to
!       --  pragma SPARK_Mode with value On, or starts one such region.
  
!       Spec_Decl : Node_Id;
!       --  This attribute denotes the declaration of Spec_Id
  
!       Unit_Id : Entity_Id;
!       --  This attribute denotes the top unit where Spec_Id resides
  
!       --  The semantics of the following attributes depend on the target
  
!       Body_Barf : Node_Id;
!       Body_Decl : Node_Id;
!       Spec_Id   : Entity_Id;
  
!       --  The target is a generic package or a subprogram
!       --
!       --    * Body_Barf - Empty
!       --
!       --    * Body_Decl - This attribute denotes the generic or subprogram
!       --      body.
!       --
!       --    * Spec_Id - This attribute denotes the entity of the generic
!       --      package or subprogram.
  
!       --  The target is a protected entry
!       --
!       --    * Body_Barf - This attribute denotes the body of the barrier
!       --      function if expansion took place, otherwise it is Empty.
!       --
!       --    * Body_Decl - This attribute denotes the body of the procedure
!       --      which emulates the entry if expansion took place, otherwise it
!       --      denotes the body of the protected entry.
!       --
!       --    * Spec_Id - This attribute denotes the entity of the procedure
!       --      which emulates the entry if expansion took place, otherwise it
!       --      denotes the protected entry.
  
!       --  The target is a protected subprogram
        --
!       --    * Body_Barf - Empty
        --
!       --    * Body_Decl - This attribute denotes the body of the protected or
!       --      unprotected version of the protected subprogram if expansion took
!       --      place, otherwise it denotes the body of the protected subprogram.
        --
!       --    * Spec_Id - This attribute denotes the entity of the protected or
!       --      unprotected version of the protected subprogram if expansion took
!       --      place, otherwise it is the entity of the protected subprogram.
! 
!       --  The target is a task entry
        --
!       --    * Body_Barf - Empty
        --
!       --    * Body_Decl - This attribute denotes the body of the procedure
!       --      which emulates the task body if expansion took place, otherwise
!       --      it denotes the body of the task type.
        --
!       --    * Spec_Id - This attribute denotes the entity of the procedure
!       --      which emulates the task body if expansion took place, otherwise
!       --      it denotes the entity of the task type.
!    end record;
  
!    --  The following type captures relevant attributes which pertain to a task
!    --  type.
  
!    type Task_Attributes is record
!       Body_Decl : Node_Id;
!       --  This attribute denotes the declaration of the procedure body which
!       --  emulates the behaviour of the task body.
  
!       Elab_Checks_OK : Boolean;
!       --  This flag is set when the task type has elaboration checks enabled
  
!       Elab_Warnings_OK : Boolean;
!       --  This flag is set when the task type has elaboration warnings enabled
  
!       Ghost_Mode_Ignore : Boolean;
!       --  This flag is set when the task type appears in a region subject to
!       --  pragma Ghost with policy ignore, or starts one such region.
  
!       SPARK_Mode_On : Boolean;
!       --  This flag is set when the task type appears in a region subject to
!       --  pragma SPARK_Mode with value On, or starts one such region.
  
!       Spec_Id : Entity_Id;
!       --  This attribute denotes the entity of the initial declaration of the
!       --  procedure body which emulates the behaviour of the task body.
  
!       Task_Decl : Node_Id;
!       --  This attribute denotes the declaration of the task type
  
!       Unit_Id : Entity_Id;
!       --  This attribute denotes the entity of the compilation unit where the
!       --  task type resides.
!    end record;
  
!    --  The following type captures relevant attributes which pertain to a
!    --  variable.
  
!    type Variable_Attributes is record
!       Unit_Id : Entity_Id;
!       --  This attribute denotes the entity of the compilation unit where the
!       --  variable resides.
!    end record;
  
!    ---------------------
!    -- Data structures --
!    ---------------------
  
!    --  The ABE mechanism employs lists and hash tables to store information
!    --  pertaining to scenarios and targets, as well as the Processing phase.
!    --  The need for data structures comes partly from the size limitation of
!    --  nodes. Note that the use of hash tables is conservative and operations
!    --  are carried out only when a particular hash table has at least one key
!    --  value pair (see xxx_In_Use flags).
  
!    --  The following table stores the early call regions of subprogram bodies
  
!    Early_Call_Regions_Max : constant := 101;
  
!    type Early_Call_Regions_Index is range 0 .. Early_Call_Regions_Max - 1;
  
!    function Early_Call_Regions_Hash
!      (Key : Entity_Id) return Early_Call_Regions_Index;
!    --  Obtain the hash value of entity Key
  
!    Early_Call_Regions_In_Use : Boolean := False;
!    --  This flag determines whether table Early_Call_Regions contains at least
!    --  least one key/value pair.
  
!    Early_Call_Regions_No_Element : constant Node_Id := Empty;
  
!    package Early_Call_Regions is new Simple_HTable
!      (Header_Num => Early_Call_Regions_Index,
!       Element    => Node_Id,
!       No_Element => Early_Call_Regions_No_Element,
!       Key        => Entity_Id,
!       Hash       => Early_Call_Regions_Hash,
!       Equal      => "=");
  
!    --  The following table stores the elaboration status of all units withed by
!    --  the main unit.
  
!    Elaboration_Statuses_Max : constant := 1009;
  
!    type Elaboration_Statuses_Index is range 0 .. Elaboration_Statuses_Max - 1;
  
!    function Elaboration_Statuses_Hash
!      (Key : Entity_Id) return Elaboration_Statuses_Index;
!    --  Obtain the hash value of entity Key
  
!    Elaboration_Statuses_In_Use : Boolean := False;
!    --  This flag flag determines whether table Elaboration_Statuses contains at
!    --  least one key/value pair.
  
!    Elaboration_Statuses_No_Element : constant Elaboration_Attributes :=
!                                        No_Elaboration_Attributes;
  
!    package Elaboration_Statuses is new Simple_HTable
!      (Header_Num => Elaboration_Statuses_Index,
!       Element    => Elaboration_Attributes,
!       No_Element => Elaboration_Statuses_No_Element,
!       Key        => Entity_Id,
!       Hash       => Elaboration_Statuses_Hash,
!       Equal      => "=");
  
!    --  The following table stores a status flag for each SPARK scenario saved
!    --  in table SPARK_Scenarios.
  
!    Recorded_SPARK_Scenarios_Max : constant := 127;
  
!    type Recorded_SPARK_Scenarios_Index is
!      range 0 .. Recorded_SPARK_Scenarios_Max - 1;
  
!    function Recorded_SPARK_Scenarios_Hash
!      (Key : Node_Id) return Recorded_SPARK_Scenarios_Index;
!    --  Obtain the hash value of Key
  
!    Recorded_SPARK_Scenarios_In_Use : Boolean := False;
!    --  This flag flag determines whether table Recorded_SPARK_Scenarios
!    --  contains at least one key/value pair.
  
!    Recorded_SPARK_Scenarios_No_Element : constant Boolean := False;
  
!    package Recorded_SPARK_Scenarios is new Simple_HTable
!      (Header_Num => Recorded_SPARK_Scenarios_Index,
!       Element    => Boolean,
!       No_Element => Recorded_SPARK_Scenarios_No_Element,
!       Key        => Node_Id,
!       Hash       => Recorded_SPARK_Scenarios_Hash,
!       Equal      => "=");
  
!    --  The following table stores a status flag for each top-level scenario
!    --  recorded in table Top_Level_Scenarios.
  
!    Recorded_Top_Level_Scenarios_Max : constant := 503;
  
!    type Recorded_Top_Level_Scenarios_Index is
!      range 0 .. Recorded_Top_Level_Scenarios_Max - 1;
  
!    function Recorded_Top_Level_Scenarios_Hash
!      (Key : Node_Id) return Recorded_Top_Level_Scenarios_Index;
!    --  Obtain the hash value of entity Key
  
!    Recorded_Top_Level_Scenarios_In_Use : Boolean := False;
!    --  This flag flag determines whether table Recorded_Top_Level_Scenarios
!    --  contains at least one key/value pair.
  
!    Recorded_Top_Level_Scenarios_No_Element : constant Boolean := False;
  
!    package Recorded_Top_Level_Scenarios is new Simple_HTable
!      (Header_Num => Recorded_Top_Level_Scenarios_Index,
!       Element    => Boolean,
!       No_Element => Recorded_Top_Level_Scenarios_No_Element,
!       Key        => Node_Id,
!       Hash       => Recorded_Top_Level_Scenarios_Hash,
!       Equal      => "=");
  
!    --  The following table stores all active scenarios in a recursive traversal
!    --  starting from a top-level scenario. This table must be maintained in a
!    --  FIFO fashion.
  
!    package Scenario_Stack is new Table.Table
!      (Table_Component_Type => Node_Id,
!       Table_Index_Type     => Int,
!       Table_Low_Bound      => 1,
!       Table_Initial        => 50,
!       Table_Increment      => 100,
!       Table_Name           => "Scenario_Stack");
  
!    --  The following table stores SPARK scenarios which are not necessarily
!    --  executable during elaboration, but still require elaboration-related
!    --  checks.
  
!    package SPARK_Scenarios is new Table.Table
!      (Table_Component_Type => Node_Id,
!       Table_Index_Type     => Int,
!       Table_Low_Bound      => 1,
!       Table_Initial        => 50,
!       Table_Increment      => 100,
!       Table_Name           => "SPARK_Scenarios");
  
!    --  The following table stores all top-level scenario saved during the
!    --  Recording phase. The contents of this table act as traversal roots
!    --  later in the Processing phase. This table must be maintained in a
!    --  LIFO fashion.
  
!    package Top_Level_Scenarios is new Table.Table
!      (Table_Component_Type => Node_Id,
!       Table_Index_Type     => Int,
!       Table_Low_Bound      => 1,
!       Table_Initial        => 1000,
!       Table_Increment      => 100,
!       Table_Name           => "Top_Level_Scenarios");
  
!    --  The following table stores the bodies of all eligible scenarios visited
!    --  during a traversal starting from a top-level scenario. The contents of
!    --  this table must be reset upon each new traversal.
  
!    Visited_Bodies_Max : constant := 511;
  
!    type Visited_Bodies_Index is range 0 .. Visited_Bodies_Max - 1;
  
!    function Visited_Bodies_Hash (Key : Node_Id) return Visited_Bodies_Index;
!    --  Obtain the hash value of node Key
  
!    Visited_Bodies_In_Use : Boolean := False;
!    --  This flag determines whether table Visited_Bodies contains at least one
!    --  key/value pair.
  
!    Visited_Bodies_No_Element : constant Boolean := False;
  
!    package Visited_Bodies is new Simple_HTable
!      (Header_Num => Visited_Bodies_Index,
!       Element    => Boolean,
!       No_Element => Visited_Bodies_No_Element,
!       Key        => Node_Id,
!       Hash       => Visited_Bodies_Hash,
!       Equal      => "=");
  
!    -----------------------
!    -- Local subprograms --
!    -----------------------
  
!    --  Multiple local subprograms are utilized to lower the semantic complexity
!    --  of the Recording and Processing phase.
  
!    procedure Check_Preelaborated_Call (Call : Node_Id);
!    pragma Inline (Check_Preelaborated_Call);
!    --  Verify that entry, operator, or subprogram call Call does not appear at
!    --  the library level of a preelaborated unit.
  
!    procedure Check_SPARK_Derived_Type (Typ_Decl : Node_Id);
!    pragma Inline (Check_SPARK_Derived_Type);
!    --  Verify that the freeze node of a derived type denoted by declaration
!    --  Typ_Decl is within the early call region of each overriding primitive
!    --  body that belongs to the derived type (SPARK RM 7.7(8)).
  
!    procedure Check_SPARK_Instantiation (Exp_Inst : Node_Id);
!    pragma Inline (Check_SPARK_Instantiation);
!    --  Verify that expanded instance Exp_Inst does not precede the generic body
!    --  it instantiates (SPARK RM 7.7(6)).
  
!    procedure Check_SPARK_Model_In_Effect (N : Node_Id);
!    pragma Inline (Check_SPARK_Model_In_Effect);
!    --  Determine whether a suitable elaboration model is currently in effect
!    --  for verifying the SPARK rules of scenario N. Emit a warning if this is
!    --  not the case.
  
!    procedure Check_SPARK_Scenario (N : Node_Id);
!    pragma Inline (Check_SPARK_Scenario);
!    --  Top-level dispatcher for verifying SPARK scenarios which are not always
!    --  executable during elaboration but still need elaboration-related checks.
  
!    procedure Check_SPARK_Refined_State_Pragma (N : Node_Id);
!    pragma Inline (Check_SPARK_Refined_State_Pragma);
!    --  Verify that each constituent of Refined_State pragma N which belongs to
!    --  an abstract state mentioned in pragma Initializes has prior elaboration
!    --  with respect to the main unit (SPARK RM 7.7.1(7)).
  
!    function Compilation_Unit (Unit_Id : Entity_Id) return Node_Id;
!    pragma Inline (Compilation_Unit);
!    --  Return the N_Compilation_Unit node of unit Unit_Id
  
!    function Early_Call_Region (Body_Id : Entity_Id) return Node_Id;
!    pragma Inline (Early_Call_Region);
!    --  Return the early call region associated with entry or subprogram body
!    --  Body_Id. IMPORTANT: This routine does not find the early call region.
!    --  To compute it, use routine Find_Early_Call_Region.
  
!    procedure Elab_Msg_NE
!      (Msg      : String;
!       N        : Node_Id;
!       Id       : Entity_Id;
!       Info_Msg : Boolean;
!       In_SPARK : Boolean);
!    pragma Inline (Elab_Msg_NE);
!    --  Wrapper around Error_Msg_NE. Emit message Msg concerning arbitrary node
!    --  N and entity. If flag Info_Msg is set, the routine emits an information
!    --  message, otherwise it emits an error. If flag In_SPARK is set, then
!    --  string " in SPARK" is added to the end of the message.
  
!    function Elaboration_Status
!      (Unit_Id : Entity_Id) return Elaboration_Attributes;
!    pragma Inline (Elaboration_Status);
!    --  Return the set of elaboration attributes associated with unit Unit_Id
  
!    procedure Ensure_Prior_Elaboration
!      (N        : Node_Id;
!       Unit_Id  : Entity_Id;
!       Prag_Nam : Name_Id;
!       State    : Processing_Attributes);
!    --  Guarantee the elaboration of unit Unit_Id with respect to the main unit
!    --  by installing pragma Elaborate or Elaborate_All denoted by Prag_Nam. N
!    --  denotes the related scenario. State denotes the current state of the
!    --  Processing phase.
  
!    procedure Ensure_Prior_Elaboration_Dynamic
!      (N        : Node_Id;
!       Unit_Id  : Entity_Id;
!       Prag_Nam : Name_Id);
!    --  Guarantee the elaboration of unit Unit_Id with respect to the main unit
!    --  by suggesting the use of Elaborate[_All] with name Prag_Nam. N denotes
!    --  the related scenario.
  
!    procedure Ensure_Prior_Elaboration_Static
!      (N        : Node_Id;
!       Unit_Id  : Entity_Id;
!       Prag_Nam : Name_Id);
!    --  Guarantee the elaboration of unit Unit_Id with respect to the main unit
!    --  by installing an implicit Elaborate[_All] pragma with name Prag_Nam. N
!    --  denotes the related scenario.
  
!    function Extract_Assignment_Name (Asmt : Node_Id) return Node_Id;
!    pragma Inline (Extract_Assignment_Name);
!    --  Obtain the Name attribute of assignment statement Asmt
  
!    procedure Extract_Call_Attributes
!      (Call      : Node_Id;
!       Target_Id : out Entity_Id;
!       Attrs     : out Call_Attributes);
!    pragma Inline (Extract_Call_Attributes);
!    --  Obtain attributes Attrs associated with call Call. Target_Id is the
!    --  entity of the call target.
  
!    function Extract_Call_Name (Call : Node_Id) return Node_Id;
!    pragma Inline (Extract_Call_Name);
!    --  Obtain the Name attribute of entry or subprogram call Call
  
!    procedure Extract_Instance_Attributes
!      (Exp_Inst  : Node_Id;
!       Inst_Body : out Node_Id;
!       Inst_Decl : out Node_Id);
!    pragma Inline (Extract_Instance_Attributes);
!    --  Obtain body Inst_Body and spec Inst_Decl of expanded instance Exp_Inst
  
!    procedure Extract_Instantiation_Attributes
!      (Exp_Inst : Node_Id;
!       Inst     : out Node_Id;
!       Inst_Id  : out Entity_Id;
!       Gen_Id   : out Entity_Id;
!       Attrs    : out Instantiation_Attributes);
!    pragma Inline (Extract_Instantiation_Attributes);
!    --  Obtain attributes Attrs associated with expanded instantiation Exp_Inst.
!    --  Inst is the instantiation. Inst_Id is the entity of the instance. Gen_Id
!    --  is the entity of the generic unit being instantiated.
  
!    procedure Extract_Target_Attributes
!      (Target_Id : Entity_Id;
!       Attrs     : out Target_Attributes);
!    --  Obtain attributes Attrs associated with an entry, package, or subprogram
!    --  denoted by Target_Id.
  
!    procedure Extract_Task_Attributes
!      (Typ   : Entity_Id;
!       Attrs : out Task_Attributes);
!    pragma Inline (Extract_Task_Attributes);
!    --  Obtain attributes Attrs associated with task type Typ
  
!    procedure Extract_Variable_Reference_Attributes
!      (Ref    : Node_Id;
!       Var_Id : out Entity_Id;
!       Attrs  : out Variable_Attributes);
!    pragma Inline (Extract_Variable_Reference_Attributes);
!    --  Obtain attributes Attrs associated with reference Ref that mentions
!    --  variable Var_Id.
  
!    function Find_Code_Unit (N : Node_Or_Entity_Id) return Entity_Id;
!    pragma Inline (Find_Code_Unit);
!    --  Return the code unit which contains arbitrary node or entity N. This
!    --  is the unit of the file which physically contains the related construct
!    --  denoted by N except when N is within an instantiation. In that case the
!    --  unit is that of the top-level instantiation.
  
!    function Find_Early_Call_Region
!      (Body_Decl        : Node_Id;
!       Assume_Elab_Body : Boolean := False;
!       Skip_Memoization : Boolean := False) return Node_Id;
!    --  Find the start of the early call region which belongs to subprogram body
!    --  Body_Decl as defined in SPARK RM 7.7. The behavior of the routine is to
!    --  find the early call region, memoize it, and return it, but this behavior
!    --  can be altered. Flag Assume_Elab_Body should be set when a package spec
!    --  may lack pragma Elaborate_Body, but the routine must still examine that
!    --  spec. Flag Skip_Memoization should be set when the routine must avoid
!    --  memoizing the region.
  
!    procedure Find_Elaborated_Units;
!    --  Populate table Elaboration_Statuses with all units which have prior
!    --  elaboration with respect to the main unit.
  
     function Find_Enclosing_Instance (N : Node_Id) return Node_Id;
     pragma Inline (Find_Enclosing_Instance);
--- 667,1956 ----
     --
     --      Ensure_Prior_Elaboration
  
!    -----------
!    -- Kinds --
!    -----------
  
!    --  The following type enumerates all possible elaboration phase statutes
  
!    type Elaboration_Phase_Status is
!      (Inactive,
!       --  The elaboration phase of the compiler has not started yet
  
!       Active,
!       --  The elaboration phase of the compiler is currently in progress
  
!       Completed);
!       --  The elaboration phase of the compiler has finished
  
!    Elaboration_Phase : Elaboration_Phase_Status := Inactive;
!    --  The status of the elaboration phase. Use routine Set_Elaboration_Phase
!    --  to alter its value.
  
!    --  The following type enumerates all subprogram body traversal modes
  
!    type Body_Traversal_Kind is
!      (Deep_Traversal,
!       --  The traversal examines the internals of a subprogram
  
!       No_Traversal);
  
!    --  The following type enumerates all operation modes
  
!    type Processing_Kind is
!      (Conditional_ABE_Processing,
!       --  The ABE mechanism detects and diagnoses conditional ABEs for library
!       --  and declaration-level scenarios.
  
!       Dynamic_Model_Processing,
!       --  The ABE mechanism installs conditional ABE checks for all eligible
!       --  scenarios when the dynamic model is in effect.
  
!       Guaranteed_ABE_Processing,
!       --  The ABE mechanism detects and diagnoses guaranteed ABEs caused by
!       --  calls, instantiations, and task activations.
  
!       Invocation_Construct_Processing,
!       --  The ABE mechanism locates all invocation constructs within the main
!       --  unit and utilizes them as roots of miltiple DFS traversals aimed at
!       --  detecting transitions from the main unit to an external unit.
  
!       Invocation_Body_Processing,
!       --  The ABE mechanism utilizes all library-level body scenarios as roots
!       --  of miltiple DFS traversals aimed at detecting transitions from the
!       --  main unit to an external unit.
  
!       Invocation_Spec_Processing,
!       --  The ABE mechanism utilizes all library-level spec scenarios as roots
!       --  of miltiple DFS traversals aimed at detecting transitions from the
!       --  main unit to an external unit.
  
!       SPARK_Processing,
!       --  The ABE mechanism detects and diagnoses violations of the SPARK
!       --  elaboration rules for SPARK-specific scenarios.
  
!       No_Processing);
  
!    --  The following type enumerates all possible scenario kinds
  
!    type Scenario_Kind is
!      (Access_Taken_Scenario,
!       --  An attribute reference which takes 'Access or 'Unrestricted_Access of
!       --  an entry, operator, or subprogram.
  
!       Call_Scenario,
!       --  A call which invokes an entry, operator, or subprogram
  
!       Derived_Type_Scenario,
!       --  A declaration of a derived type. This is a SPARK-specific scenario.
! 
!       Instantiation_Scenario,
!       --  An instantiation which instantiates a generic package or subprogram.
!       --  This scenario is also subject to SPARK-specific rules.
! 
!       Refined_State_Pragma_Scenario,
!       --  A Refined_State pragma. This is a SPARK-specific scenario.
! 
!       Task_Activation_Scenario,
!       --  A call which activates objects of various task types
! 
!       Variable_Assignment_Scenario,
!       --  An assignment statement which modifies the value of some variable
! 
!       Variable_Reference_Scenario,
!       --  A reference to a variable. This is a SPARK-specific scenario.
! 
!       No_Scenario);
! 
!    --  The following type enumerates all possible consistency models of target
!    --  and scenario representations.
! 
!    type Representation_Kind is
!      (Inconsistent_Representation,
!       --  A representation is said to be "inconsistent" when it is created from
!       --  a partially analyzed tree. In such an environment, certain attributes
!       --  such as a completing body may not be available yet.
! 
!       Consistent_Representation,
!       --  A representation is said to be "consistent" when it is created from a
!       --  fully analyzed tree, where all attributes are available.
! 
!       No_Representation);
! 
!    --  The following type enumerates all possible target kinds
! 
!    type Target_Kind is
!      (Generic_Target,
!       --  A generic unit being instantiated
! 
!       Package_Target,
!       --  The package form of an instantiation
! 
!       Subprogram_Target,
!       --  An entry, operator, or subprogram being invoked, or aliased through
!       --  'Access or 'Unrestricted_Access.
! 
!       Task_Target,
!       --  A task being activated by an activation call
! 
!       Variable_Target,
!       --  A variable being updated through an assignment statement, or read
!       --  through a variable reference.
! 
!       No_Target);
! 
!    -----------
!    -- Types --
!    -----------
! 
!    procedure Destroy (NE : in out Node_Or_Entity_Id);
!    pragma Inline (Destroy);
!    --  Destroy node or entity NE
! 
!    function Hash (NE : Node_Or_Entity_Id) return Bucket_Range_Type;
!    pragma Inline (Hash);
!    --  Obtain the hash value of key NE
! 
!    --  The following is a general purpose list for nodes and entities
! 
!    package NE_List is new Doubly_Linked_Lists
!      (Element_Type    => Node_Or_Entity_Id,
!       "="             => "=",
!       Destroy_Element => Destroy);
! 
!    --  The following is a general purpose map which relates nodes and entities
!    --  to lists of nodes and entities.
! 
!    package NE_List_Map is new Dynamic_Hash_Tables
!      (Key_Type              => Node_Or_Entity_Id,
!       Value_Type            => NE_List.Doubly_Linked_List,
!       No_Value              => NE_List.Nil,
!       Expansion_Threshold   => 1.5,
!       Expansion_Factor      => 2,
!       Compression_Threshold => 0.3,
!       Compression_Factor    => 2,
!       "="                   => "=",
!       Destroy_Value         => NE_List.Destroy,
!       Hash                  => Hash);
! 
!    --  The following is a general purpose membership set for nodes and entities
! 
!    package NE_Set is new Membership_Sets
!      (Element_Type => Node_Or_Entity_Id,
!       "="          => "=",
!       Hash         => Hash);
  
     --  The following type captures relevant attributes which pertain to the
!    --  in state of the Processing phase.
  
!    type Processing_In_State is record
!       Processing : Processing_Kind := No_Processing;
!       --  Operation mode of the Processing phase. Once set, this value should
!       --  not be changed.
! 
!       Representation : Representation_Kind := No_Representation;
!       --  Required level of scenario and target representation. Once set, this
!       --  value should not be changed.
! 
!       Suppress_Checks : Boolean := False;
!       --  This flag is set when the Processing phase must not generate any ABE
!       --  checks.
! 
!       Suppress_Implicit_Pragmas : Boolean := False;
        --  This flag is set when the Processing phase must not generate any
        --  implicit Elaborate[_All] pragmas.
  
!       Suppress_Info_Messages : Boolean := False;
!       --  This flag is set when the Processing phase must not emit any info
!       --  messages.
! 
!       Suppress_Up_Level_Targets : Boolean := False;
!       --  This flag is set when the Processing phase must ignore up-level
!       --  targets.
! 
!       Suppress_Warnings : Boolean := False;
        --  This flag is set when the Processing phase must not emit any warnings
        --  on elaboration problems.
  
!       Traversal : Body_Traversal_Kind := No_Traversal;
!       --  The subprogram body traversal mode. Once set, this value should not
!       --  be changed.
  
!       Within_Generic : Boolean := False;
!       --  This flag is set when the Processing phase is currently within a
!       --  generic unit.
! 
!       Within_Initial_Condition : Boolean := False;
        --  This flag is set when the Processing phase is currently examining a
!       --  scenario which was reached from an initial condition procedure.
  
!       Within_Partial_Finalization : Boolean := False;
        --  This flag is set when the Processing phase is currently examining a
        --  scenario which was reached from a partial finalization procedure.
  
!       Within_Task_Body : Boolean := False;
        --  This flag is set when the Processing phase is currently examining a
        --  scenario which was reached from a task body.
     end record;
  
!    --  The following constants define the various operational states of the
!    --  Processing phase.
  
!    --  The conditional ABE state is used when processing scenarios that appear
!    --  at the declaration, instantiation, and library levels to detect errors
!    --  and install conditional ABE checks.
  
!    Conditional_ABE_State : constant Processing_In_State :=
!      (Processing                => Conditional_ABE_Processing,
!       Representation            => Consistent_Representation,
!       Traversal                 => Deep_Traversal,
!       others                    => False);
  
!    --  The dynamic model state is used to install conditional ABE checks when
!    --  switch -gnatE (dynamic elaboration checking mode enabled) is in effect.
  
!    Dynamic_Model_State : constant Processing_In_State :=
!      (Processing                => Dynamic_Model_Processing,
!       Representation            => Consistent_Representation,
!       Suppress_Implicit_Pragmas => True,
!       Suppress_Info_Messages    => True,
!       Suppress_Up_Level_Targets => True,
!       Suppress_Warnings         => True,
!       Traversal                 => No_Traversal,
!       others                    => False);
  
!    --  The guaranteed ABE state is used when processing scenarios that appear
!    --  at the declaration, instantiation, and library levels to detect errors
!    --  and install guarateed ABE failures.
  
!    Guaranteed_ABE_State : constant Processing_In_State :=
!      (Processing                => Guaranteed_ABE_Processing,
!       Representation            => Inconsistent_Representation,
!       Suppress_Implicit_Pragmas => True,
!       Traversal                 => No_Traversal,
!       others                    => False);
  
!    --  The invocation body state is used when processing scenarios that appear
!    --  at the body library level to encode paths that start from elaboration
!    --  code and ultimately reach into external units.
  
!    Invocation_Body_State : constant Processing_In_State :=
!      (Processing                => Invocation_Body_Processing,
!       Representation            => Consistent_Representation,
!       Suppress_Checks           => True,
!       Suppress_Implicit_Pragmas => True,
!       Suppress_Info_Messages    => True,
!       Suppress_Up_Level_Targets => True,
!       Suppress_Warnings         => True,
!       Traversal                 => Deep_Traversal,
!       others                    => False);
  
!    --  The invocation construct state is used when processing constructs that
!    --  appear within the spec and body of the main unit and eventually reach
!    --  into external units.
  
!    Invocation_Construct_State : constant Processing_In_State :=
!      (Processing                => Invocation_Construct_Processing,
!       Representation            => Consistent_Representation,
!       Suppress_Checks           => True,
!       Suppress_Implicit_Pragmas => True,
!       Suppress_Info_Messages    => True,
!       Suppress_Up_Level_Targets => True,
!       Suppress_Warnings         => True,
!       Traversal                 => Deep_Traversal,
!       others                    => False);
  
!    --  The invocation spec state is used when processing scenarios that appear
!    --  at the spec library level to encode paths that start from elaboration
!    --  code and ultimately reach into external units.
  
!    Invocation_Spec_State : constant Processing_In_State :=
!      (Processing                => Invocation_Spec_Processing,
!       Representation            => Consistent_Representation,
!       Suppress_Checks           => True,
!       Suppress_Implicit_Pragmas => True,
!       Suppress_Info_Messages    => True,
!       Suppress_Up_Level_Targets => True,
!       Suppress_Warnings         => True,
!       Traversal                 => Deep_Traversal,
!       others                    => False);
  
!    --  The SPARK state is used when verying SPARK-specific semantics of certain
!    --  scenarios.
! 
!    SPARK_State : constant Processing_In_State :=
!      (Processing                => SPARK_Processing,
!       Representation            => Consistent_Representation,
!       Traversal                 => No_Traversal,
!       others                    => False);
! 
!    --  The following type identifies a scenario representation
! 
!    type Scenario_Rep_Id is new Natural;
! 
!    No_Scenario_Rep    : constant Scenario_Rep_Id := Scenario_Rep_Id'First;
!    First_Scenario_Rep : constant Scenario_Rep_Id := No_Scenario_Rep + 1;
! 
!    --  The following type identifies a target representation
! 
!    type Target_Rep_Id is new Natural;
! 
!    No_Target_Rep    : constant Target_Rep_Id := Target_Rep_Id'First;
!    First_Target_Rep : constant Target_Rep_Id := No_Target_Rep + 1;
! 
!    --------------
!    -- Services --
!    --------------
! 
!    --  The following package keeps track of all active scenarios during a DFS
!    --  traversal.
! 
!    package Active_Scenarios is
! 
!       -----------
!       -- Types --
!       -----------
! 
!       --  The following type defines the position within the active scenario
!       --  stack.
! 
!       type Active_Scenario_Pos is new Natural;
! 
!       ---------------------
!       -- Data structures --
!       ---------------------
! 
!       --  The following table stores all active scenarios in a DFS traversal.
!       --  This table must be maintained in a FIFO fashion.
! 
!       package Active_Scenario_Stack is new Table.Table
!         (Table_Index_Type     => Active_Scenario_Pos,
!          Table_Component_Type => Node_Id,
!          Table_Low_Bound      => 1,
!          Table_Initial        => 50,
!          Table_Increment      => 200,
!          Table_Name           => "Active_Scenario_Stack");
! 
!       ---------
!       -- API --
!       ---------
! 
!       procedure Output_Active_Scenarios
!         (Error_Nod : Node_Id;
!          In_State  : Processing_In_State);
!       pragma Inline (Output_Active_Scenarios);
!       --  Output the contents of the active scenario stack from earliest to
!       --  latest to supplement an earlier error emitted for node Error_Nod.
!       --  In_State denotes the current state of the Processing phase.
! 
!       procedure Pop_Active_Scenario (N : Node_Id);
!       pragma Inline (Pop_Active_Scenario);
!       --  Pop the top of the scenario stack. A check is made to ensure that the
!       --  scenario being removed is the same as N.
! 
!       procedure Push_Active_Scenario (N : Node_Id);
!       pragma Inline (Push_Active_Scenario);
!       --  Push scenario N on top of the scenario stack
! 
!       function Root_Scenario return Node_Id;
!       pragma Inline (Root_Scenario);
!       --  Return the scenario which started a DFS traversal
! 
!    end Active_Scenarios;
!    use Active_Scenarios;
! 
!    --  The following package provides the main entry point for task activation
!    --  processing.
! 
!    package Activation_Processor is
! 
!       -----------
!       -- Types --
!       -----------
! 
!       type Activation_Processor_Ptr is access procedure
!         (Call     : Node_Id;
!          Call_Rep : Scenario_Rep_Id;
!          Obj_Id   : Entity_Id;
!          Obj_Rep  : Target_Rep_Id;
!          Task_Typ : Entity_Id;
!          Task_Rep : Target_Rep_Id;
!          In_State : Processing_In_State);
!       --  Reference to a procedure that takes all attributes of an activation
!       --  and performs a desired action. Call is the activation call. Call_Rep
!       --  is the representation of the call. Obj_Id is the task object being
!       --  activated. Obj_Rep is the representation of the object. Task_Typ is
!       --  the task type whose body is being activated. Task_Rep denotes the
!       --  representation of the task type. In_State is the current state of
!       --  the Processing phase.
! 
!       ---------
!       -- API --
!       ---------
! 
!       procedure Process_Activation
!         (Call      : Node_Id;
!          Call_Rep  : Scenario_Rep_Id;
!          Processor : Activation_Processor_Ptr;
!          In_State  : Processing_In_State);
!       --  Find all task objects activated by activation call Call and invoke
!       --  Processor on them. Call_Rep denotes the representation of the call.
!       --  In_State is the current state of the Processing phase.
! 
!    end Activation_Processor;
!    use Activation_Processor;
! 
!    --  The following package profides functionality for traversing subprogram
!    --  bodies in DFS manner and processing of eligible scenarios within.
! 
!    package Body_Processor is
! 
!       -----------
!       -- Types --
!       -----------
! 
!       type Scenario_Predicate_Ptr is access function
!         (N : Node_Id) return Boolean;
!       --  Reference to a function which determines whether arbitrary node N
!       --  denotes a suitable scenario for processing.
! 
!       type Scenario_Processor_Ptr is access procedure
!         (N : Node_Id; In_State : Processing_In_State);
!       --  Reference to a procedure which processes scenario N. In_State is the
!       --  current state of the Processing phase.
! 
!       ---------
!       -- API --
!       ---------
! 
!       procedure Traverse_Body
!         (N                   : Node_Id;
!          Requires_Processing : Scenario_Predicate_Ptr;
!          Processor           : Scenario_Processor_Ptr;
!          In_State            : Processing_In_State);
!       pragma Inline (Traverse_Body);
!       --  Traverse the declarations and handled statements of subprogram body
!       --  N, looking for scenarios that satisfy predicate Requires_Processing.
!       --  Routine Processor is invoked for each such scenario.
! 
!       procedure Reset_Traversed_Bodies;
!       pragma Inline (Reset_Traversed_Bodies);
!       --  Reset the visited status of all subprogram bodies that have already
!       --  been processed by routine Traverse_Body.
! 
!       -----------------
!       -- Maintenance --
!       -----------------
! 
!       procedure Finalize_Body_Processor;
!       pragma Inline (Finalize_Body_Processor);
!       --  Finalize all internal data structures
! 
!       procedure Initialize_Body_Processor;
!       pragma Inline (Initialize_Body_Processor);
!       --  Initialize all internal data structures
! 
!    end Body_Processor;
!    use Body_Processor;
! 
!    --  The following package provides functionality for installing ABE-related
!    --  checks and failures.
! 
!    package Check_Installer is
! 
!       ---------
!       -- API --
!       ---------
! 
!       function Check_Or_Failure_Generation_OK return Boolean;
!       pragma Inline (Check_Or_Failure_Generation_OK);
!       --  Determine whether a conditional ABE check or guaranteed ABE failure
!       --  can be generated.
! 
!       procedure Install_Dynamic_ABE_Checks;
!       pragma Inline (Install_Dynamic_ABE_Checks);
!       --  Install conditional ABE checks for all saved scenarios when the
!       --  dynamic model is in effect.
! 
!       procedure Install_Scenario_ABE_Check
!         (N        : Node_Id;
!          Targ_Id  : Entity_Id;
!          Targ_Rep : Target_Rep_Id;
!          Disable  : Scenario_Rep_Id);
!       pragma Inline (Install_Scenario_ABE_Check);
!       --  Install a conditional ABE check for scenario N to ensure that target
!       --  Targ_Id is properly elaborated. Targ_Rep is the representation of the
!       --  target. If the check is installed, disable the elaboration checks of
!       --  scenario Disable.
! 
!       procedure Install_Scenario_ABE_Check
!         (N        : Node_Id;
!          Targ_Id  : Entity_Id;
!          Targ_Rep : Target_Rep_Id;
!          Disable  : Target_Rep_Id);
!       pragma Inline (Install_Scenario_ABE_Check);
!       --  Install a conditional ABE check for scenario N to ensure that target
!       --  Targ_Id is properly elaborated. Targ_Rep is the representation of the
!       --  target. If the check is installed, disable the elaboration checks of
!       --  target Disable.
! 
!       procedure Install_Scenario_ABE_Failure
!         (N        : Node_Id;
!          Targ_Id  : Entity_Id;
!          Targ_Rep : Target_Rep_Id;
!          Disable  : Scenario_Rep_Id);
!       pragma Inline (Install_Scenario_ABE_Failure);
!       --  Install a guaranteed ABE failure for scenario N with target Targ_Id.
!       --  Targ_Rep denotes the representation of the target. If the failure is
!       --  installed, disable the elaboration checks of scenario Disable.
! 
!       procedure Install_Scenario_ABE_Failure
!         (N        : Node_Id;
!          Targ_Id  : Entity_Id;
!          Targ_Rep : Target_Rep_Id;
!          Disable  : Target_Rep_Id);
!       pragma Inline (Install_Scenario_ABE_Failure);
!       --  Install a guaranteed ABE failure for scenario N with target Targ_Id.
!       --  Targ_Rep denotes the representation of the target. If the failure is
!       --  installed, disable the elaboration checks of target Disable.
! 
!       procedure Install_Unit_ABE_Check
!         (N       : Node_Id;
!          Unit_Id : Entity_Id;
!          Disable : Scenario_Rep_Id);
!       pragma Inline (Install_Unit_ABE_Check);
!       --  Install a conditional ABE check for scenario N to ensure that unit
!       --  Unit_Id is properly elaborated. If the check is installed, disable
!       --  the elaboration checks of scenario Disable.
! 
!       procedure Install_Unit_ABE_Check
!         (N       : Node_Id;
!          Unit_Id : Entity_Id;
!          Disable : Target_Rep_Id);
!       pragma Inline (Install_Unit_ABE_Check);
!       --  Install a conditional ABE check for scenario N to ensure that unit
!       --  Unit_Id is properly elaborated. If the check is installed, disable
!       --  the elaboration checks of target Disable.
! 
!    end Check_Installer;
!    use Check_Installer;
! 
!    --  The following package provides the main entry point for conditional ABE
!    --  checks and diagnostics.
! 
!    package Conditional_ABE_Processor is
! 
!       ---------
!       -- API --
!       ---------
! 
!       procedure Check_Conditional_ABE_Scenarios
!         (Iter : in out NE_Set.Iterator);
!       pragma Inline (Check_Conditional_ABE_Scenarios);
!       --  Perform conditional ABE checks and diagnostics for all scenarios
!       --  available through iterator Iter.
! 
!       procedure Process_Conditional_ABE
!         (N        : Node_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Conditional_ABE);
!       --  Perform conditional ABE checks and diagnostics for scenario N.
!       --  In_State denotes the current state of the Processing phase.
! 
!    end Conditional_ABE_Processor;
!    use Conditional_ABE_Processor;
! 
!    --  The following package provides functionality to emit errors, information
!    --  messages, and warnings.
! 
!    package Diagnostics is
! 
!       ---------
!       -- API --
!       ---------
! 
!       procedure Elab_Msg_NE
!         (Msg      : String;
!          N        : Node_Id;
!          Id       : Entity_Id;
!          Info_Msg : Boolean;
!          In_SPARK : Boolean);
!       pragma Inline (Elab_Msg_NE);
!       --  Wrapper around Error_Msg_NE. Emit message Msg concerning arbitrary
!       --  node N and entity. If flag Info_Msg is set, the routine emits an
!       --  information message, otherwise it emits an error. If flag In_SPARK
!       --  is set, then string " in SPARK" is added to the end of the message.
! 
!       procedure Info_Call
!         (Call     : Node_Id;
!          Subp_Id  : Entity_Id;
!          Info_Msg : Boolean;
!          In_SPARK : Boolean);
!       pragma Inline (Info_Call);
!       --  Output information concerning call Call that invokes subprogram
!       --  Subp_Id. When flag Info_Msg is set, the routine emits an information
!       --  message, otherwise it emits an error. When flag In_SPARK is set, " in
!       --  SPARK" is added to the end of the message.
! 
!       procedure Info_Instantiation
!         (Inst     : Node_Id;
!          Gen_Id   : Entity_Id;
!          Info_Msg : Boolean;
!          In_SPARK : Boolean);
!       pragma Inline (Info_Instantiation);
!       --  Output information concerning instantiation Inst which instantiates
!       --  generic unit Gen_Id. If flag Info_Msg is set, the routine emits an
!       --  information message, otherwise it emits an error. If flag In_SPARK
!       --  is set, then string " in SPARK" is added to the end of the message.
! 
!       procedure Info_Variable_Reference
!         (Ref      : Node_Id;
!          Var_Id   : Entity_Id;
!          Info_Msg : Boolean;
!          In_SPARK : Boolean);
!       pragma Inline (Info_Variable_Reference);
!       --  Output information concerning reference Ref which mentions variable
!       --  Var_Id. If flag Info_Msg is set, the routine emits an information
!       --  message, otherwise it emits an error. If flag In_SPARK is set, then
!       --  string " in SPARK" is added to the end of the message.
! 
!    end Diagnostics;
!    use Diagnostics;
! 
!    --  The following package provides functionality to locate the early call
!    --  region of a subprogram body.
! 
!    package Early_Call_Region_Processor is
! 
!       ---------
!       -- API --
!       ---------
! 
!       function Find_Early_Call_Region
!         (Body_Decl        : Node_Id;
!          Assume_Elab_Body : Boolean := False;
!          Skip_Memoization : Boolean := False) return Node_Id;
!       pragma Inline (Find_Early_Call_Region);
!       --  Find the start of the early call region that belongs to subprogram
!       --  body Body_Decl as defined in SPARK RM 7.7. This routine finds the
!       --  early call region, memoizes it, and returns it, but this behavior
!       --  can be altered. Flag Assume_Elab_Body should be set when a package
!       --  spec may lack pragma Elaborate_Body, but the routine must still
!       --  examine that spec. Flag Skip_Memoization should be set when the
!       --  routine must avoid memoizing the region.
! 
!       -----------------
!       -- Maintenance --
!       -----------------
! 
!       procedure Finalize_Early_Call_Region_Processor;
!       pragma Inline (Finalize_Early_Call_Region_Processor);
!       --  Finalize all internal data structures
! 
!       procedure Initialize_Early_Call_Region_Processor;
!       pragma Inline (Initialize_Early_Call_Region_Processor);
!       --  Initialize all internal data structures
! 
!    end Early_Call_Region_Processor;
!    use Early_Call_Region_Processor;
! 
!    --  The following package provides access to the elaboration statuses of all
!    --  units withed by the main unit.
! 
!    package Elaborated_Units is
! 
!       ---------
!       -- API --
!       ---------
! 
!       procedure Collect_Elaborated_Units;
!       pragma Inline (Collect_Elaborated_Units);
!       --  Save the elaboration statuses of all units withed by the main unit
! 
!       procedure Ensure_Prior_Elaboration
!         (N        : Node_Id;
!          Unit_Id  : Entity_Id;
!          Prag_Nam : Name_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Ensure_Prior_Elaboration);
!       --  Guarantee the elaboration of unit Unit_Id with respect to the main
!       --  unit by either suggesting or installing an Elaborate[_All] pragma
!       --  denoted by Prag_Nam. N denotes the related scenario. In_State is the
!       --  current state of the Processing phase.
! 
!       function Has_Prior_Elaboration
!         (Unit_Id      : Entity_Id;
!          Context_OK   : Boolean := False;
!          Elab_Body_OK : Boolean := False;
!          Same_Unit_OK : Boolean := False) return Boolean;
!       pragma Inline (Has_Prior_Elaboration);
!       --  Determine whether unit Unit_Id is elaborated prior to the main unit.
!       --  If flag Context_OK is set, the routine considers the following case
!       --  as valid prior elaboration:
        --
!       --    * Unit_Id is in the elaboration context of the main unit
        --
!       --  If flag Elab_Body_OK is set, the routine considers the following case
!       --  as valid prior elaboration:
        --
!       --    * Unit_Id has pragma Elaborate_Body and is not the main unit
        --
!       --  If flag Same_Unit_OK is set, the routine considers the following
!       --  cases as valid prior elaboration:
        --
!       --    * Unit_Id is the main unit
        --
!       --    * Unit_Id denotes the spec of the main unit body
  
!       procedure Meet_Elaboration_Requirement
!         (N        : Node_Id;
!          Targ_Id  : Entity_Id;
!          Req_Nam  : Name_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Meet_Elaboration_Requirement);
!       --  Determine whether elaboration requirement Req_Nam for scenario N with
!       --  target Targ_Id is met by the context of the main unit using the SPARK
!       --  rules. Req_Nam must denote either Elaborate or Elaborate_All. Emit an
!       --  error if this is not the case. In_State denotes the current state of
!       --  the Processing phase.
  
!       -----------------
!       -- Maintenance --
!       -----------------
  
!       procedure Finalize_Elaborated_Units;
!       pragma Inline (Finalize_Elaborated_Units);
!       --  Finalize all internal data structures
  
!       procedure Initialize_Elaborated_Units;
!       pragma Inline (Initialize_Elaborated_Units);
!       --  Initialize all internal data structures
  
!    end Elaborated_Units;
!    use Elaborated_Units;
  
!    --  The following package provides the main entry point for guaranteed ABE
!    --  checks and diagnostics.
  
!    package Guaranteed_ABE_Processor is
  
!       ---------
!       -- API --
!       ---------
  
!       procedure Process_Guaranteed_ABE
!         (N        : Node_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Guaranteed_ABE);
!       --  Perform guaranteed ABE checks and diagnostics for scenario N.
!       --  In_State is the current state of the Processing phase.
  
!    end Guaranteed_ABE_Processor;
!    use Guaranteed_ABE_Processor;
  
!    --  The following package provides access to the internal representation of
!    --  scenarios and targets.
  
!    package Internal_Representation is
  
!       -----------
!       -- Types --
!       -----------
  
!       --  The following type enumerates all possible Ghost mode kinds
  
!       type Extended_Ghost_Mode is
!         (Is_Ignored,
!          Is_Checked_Or_Not_Specified);
  
!       --  The following type enumerates all possible SPARK mode kinds
  
!       type Extended_SPARK_Mode is
!         (Is_On,
!          Is_Off_Or_Not_Specified);
  
!       --------------
!       -- Builders --
!       --------------
  
!       function Scenario_Representation_Of
!         (N        : Node_Id;
!          In_State : Processing_In_State) return Scenario_Rep_Id;
!       pragma Inline (Scenario_Representation_Of);
!       --  Obtain the id of elaboration scenario N's representation. The routine
!       --  constructs the representation if it is not available. In_State is the
!       --  current state of the Processing phase.
  
!       function Target_Representation_Of
!         (Id       : Entity_Id;
!          In_State : Processing_In_State) return Target_Rep_Id;
!       pragma Inline (Target_Representation_Of);
!       --  Obtain the id of elaboration target Id's representation. The routine
!       --  constructs the representation if it is not available. In_State is the
!       --  current state of the Processing phase.
  
!       -------------------------
!       -- Scenario attributes --
!       -------------------------
  
!       function Activated_Task_Objects
!         (S_Id : Scenario_Rep_Id) return NE_List.Doubly_Linked_List;
!       pragma Inline (Activated_Task_Objects);
!       --  For Task_Activation_Scenario S_Id, obtain the list of task objects
!       --  the scenario is activating.
  
!       function Activated_Task_Type (S_Id : Scenario_Rep_Id) return Entity_Id;
!       pragma Inline (Activated_Task_Type);
!       --  For Task_Activation_Scenario S_Id, obtain the currently activated
!       --  task type.
  
!       procedure Disable_Elaboration_Checks (S_Id : Scenario_Rep_Id);
!       pragma Inline (Disable_Elaboration_Checks);
!       --  Disable elaboration checks of scenario S_Id
  
!       function Elaboration_Checks_OK (S_Id : Scenario_Rep_Id) return Boolean;
!       pragma Inline (Elaboration_Checks_OK);
!       --  Determine whether scenario S_Id may be subjected to elaboration
!       --  checks.
  
!       function Elaboration_Warnings_OK (S_Id : Scenario_Rep_Id) return Boolean;
!       pragma Inline (Elaboration_Warnings_OK);
!       --  Determine whether scenario S_Id may be subjected to elaboration
!       --  warnings.
  
!       function Ghost_Mode_Of
!         (S_Id : Scenario_Rep_Id) return Extended_Ghost_Mode;
!       pragma Inline (Ghost_Mode_Of);
!       --  Obtain the Ghost mode of scenario S_Id
  
!       function Is_Dispatching_Call (S_Id : Scenario_Rep_Id) return Boolean;
!       pragma Inline (Is_Dispatching_Call);
!       --  For Call_Scenario S_Id, determine whether the call is dispatching
  
!       function Is_Read_Reference (S_Id : Scenario_Rep_Id) return Boolean;
!       pragma Inline (Is_Read_Reference);
!       --  For Variable_Reference_Scenario S_Id, determine whether the reference
!       --  is a read.
  
!       function Kind (S_Id : Scenario_Rep_Id) return Scenario_Kind;
!       pragma Inline (Kind);
!       --  Obtain the nature of scenario S_Id
  
!       function Level (S_Id : Scenario_Rep_Id) return Enclosing_Level_Kind;
!       pragma Inline (Level);
!       --  Obtain the enclosing level of scenario S_Id
  
!       procedure Set_Activated_Task_Objects
!         (S_Id      : Scenario_Rep_Id;
!          Task_Objs : NE_List.Doubly_Linked_List);
!       pragma Inline (Set_Activated_Task_Objects);
!       --  For Task_Activation_Scenario S_Id, set the list of task objects
!       --  activated by the scenario to Task_Objs.
  
!       procedure Set_Activated_Task_Type
!         (S_Id     : Scenario_Rep_Id;
!          Task_Typ : Entity_Id);
!       pragma Inline (Set_Activated_Task_Type);
!       --  For Task_Activation_Scenario S_Id, set the currently activated task
!       --  type to Task_Typ.
  
!       function SPARK_Mode_Of
!         (S_Id : Scenario_Rep_Id) return Extended_SPARK_Mode;
!       pragma Inline (SPARK_Mode_Of);
!       --  Obtain the SPARK mode of scenario S_Id
  
!       function Target (S_Id : Scenario_Rep_Id) return Entity_Id;
!       pragma Inline (Target);
!       --  Obtain the target of scenario S_Id
  
!       -----------------------
!       -- Target attributes --
!       -----------------------
  
!       function Barrier_Body_Declaration (T_Id : Target_Rep_Id) return Node_Id;
!       pragma Inline (Barrier_Body_Declaration);
!       --  For Subprogram_Target T_Id, obtain the declaration of the barrier
!       --  function's body.
  
!       function Body_Declaration (T_Id : Target_Rep_Id) return Node_Id;
!       pragma Inline (Body_Declaration);
!       --  Obtain the declaration of the body which belongs to target T_Id
  
!       procedure Disable_Elaboration_Checks (T_Id : Target_Rep_Id);
!       pragma Inline (Disable_Elaboration_Checks);
!       --  Disable elaboration checks of target T_Id
  
!       function Elaboration_Checks_OK (T_Id : Target_Rep_Id) return Boolean;
!       pragma Inline (Elaboration_Checks_OK);
!       --  Determine whether target T_Id may be subjected to elaboration checks
  
!       function Elaboration_Warnings_OK (T_Id : Target_Rep_Id) return Boolean;
!       pragma Inline (Elaboration_Warnings_OK);
!       --  Determine whether target T_Id may be subjected to elaboration
!       --  warnings.
  
!       function Ghost_Mode_Of (T_Id : Target_Rep_Id) return Extended_Ghost_Mode;
!       pragma Inline (Ghost_Mode_Of);
!       --  Obtain the Ghost mode of target T_Id
  
!       function Kind (T_Id : Target_Rep_Id) return Target_Kind;
!       pragma Inline (Kind);
!       --  Obtain the nature of target T_Id
  
!       function SPARK_Mode_Of (T_Id : Target_Rep_Id) return Extended_SPARK_Mode;
!       pragma Inline (SPARK_Mode_Of);
!       --  Obtain the SPARK mode of target T_Id
  
!       function Spec_Declaration (T_Id : Target_Rep_Id) return Node_Id;
!       pragma Inline (Spec_Declaration);
!       --  Obtain the declaration of the spec which belongs to target T_Id
  
!       function Unit (T_Id : Target_Rep_Id) return Entity_Id;
!       pragma Inline (Unit);
!       --  Obtain the unit where the target is defined
  
!       function Variable_Declaration (T_Id : Target_Rep_Id) return Node_Id;
!       pragma Inline (Variable_Declaration);
!       --  For Variable_Target T_Id, obtain the declaration of the variable
  
!       -----------------
!       -- Maintenance --
!       -----------------
  
!       procedure Finalize_Internal_Representation;
!       pragma Inline (Finalize_Internal_Representation);
!       --  Finalize all internal data structures
  
!       procedure Initialize_Internal_Representation;
!       pragma Inline (Initialize_Internal_Representation);
!       --  Initialize all internal data structures
  
!    end Internal_Representation;
!    use Internal_Representation;
  
!    --  The following package provides functionality for recording pieces of the
!    --  invocation graph in the ALI file of the main unit.
  
!    package Invocation_Graph is
  
!       ---------
!       -- API --
!       ---------
  
!       procedure Record_Invocation_Graph;
!       pragma Inline (Record_Invocation_Graph);
!       --  Process all declaration, instantiation, and library level scenarios,
!       --  along with invocation construct within the spec and body of the main
!       --  unit to determine whether any of these reach into an external unit.
!       --  If such a path exists, encode in the ALI file of the main unit.
  
!       -----------------
!       -- Maintenance --
!       -----------------
  
!       procedure Finalize_Invocation_Graph;
!       pragma Inline (Finalize_Invocation_Graph);
!       --  Finalize all internal data structures
  
!       procedure Initialize_Invocation_Graph;
!       pragma Inline (Initialize_Invocation_Graph);
!       --  Initialize all internal data structures
  
!    end Invocation_Graph;
!    use Invocation_Graph;
  
!    --  The following package stores scenarios
  
!    package Scenario_Storage is
  
!       ---------
!       -- API --
!       ---------
  
!       procedure Add_Declaration_Scenario (N : Node_Id);
!       pragma Inline (Add_Declaration_Scenario);
!       --  Save declaration level scenario N
  
!       procedure Add_Dynamic_ABE_Check_Scenario (N : Node_Id);
!       pragma Inline (Add_Dynamic_ABE_Check_Scenario);
!       --  Save scenario N for conditional ABE check installation purposes when
!       --  the dynamic model is in effect.
  
!       procedure Add_Library_Body_Scenario (N : Node_Id);
!       pragma Inline (Add_Library_Body_Scenario);
!       --  Save library-level body scenario N
  
!       procedure Add_Library_Spec_Scenario (N : Node_Id);
!       pragma Inline (Add_Library_Spec_Scenario);
!       --  Save library-level spec scenario N
  
!       procedure Add_SPARK_Scenario (N : Node_Id);
!       pragma Inline (Add_SPARK_Scenario);
!       --  Save SPARK scenario N
  
!       procedure Delete_Scenario (N : Node_Id);
!       pragma Inline (Delete_Scenario);
!       --  Delete arbitrary scenario N
  
!       function Iterate_Declaration_Scenarios return NE_Set.Iterator;
!       pragma Inline (Iterate_Declaration_Scenarios);
!       --  Obtain an iterator over all declaration level scenarios
  
!       function Iterate_Dynamic_ABE_Check_Scenarios return NE_Set.Iterator;
!       pragma Inline (Iterate_Dynamic_ABE_Check_Scenarios);
!       --  Obtain an iterator over all scenarios that require a conditional ABE
!       --  check when the dynamic model is in effect.
  
!       function Iterate_Library_Body_Scenarios return NE_Set.Iterator;
!       pragma Inline (Iterate_Library_Body_Scenarios);
!       --  Obtain an iterator over all library level body scenarios
  
!       function Iterate_Library_Spec_Scenarios return NE_Set.Iterator;
!       pragma Inline (Iterate_Library_Spec_Scenarios);
!       --  Obtain an iterator over all library level spec scenarios
  
!       function Iterate_SPARK_Scenarios return NE_Set.Iterator;
!       pragma Inline (Iterate_SPARK_Scenarios);
!       --  Obtain an iterator over all SPARK scenarios
  
!       procedure Replace_Scenario (Old_N : Node_Id; New_N : Node_Id);
!       pragma Inline (Replace_Scenario);
!       --  Replace scenario Old_N with scenario New_N
  
!       -----------------
!       -- Maintenance --
!       -----------------
  
!       procedure Finalize_Scenario_Storage;
!       pragma Inline (Finalize_Scenario_Storage);
!       --  Finalize all internal data structures
  
!       procedure Initialize_Scenario_Storage;
!       pragma Inline (Initialize_Scenario_Storage);
!       --  Initialize all internal data structures
  
!    end Scenario_Storage;
!    use Scenario_Storage;
  
!    --  The following package provides various semantic predicates
  
!    package Semantics is
! 
!       ---------
!       -- API --
!       ---------
! 
!       function Is_Accept_Alternative_Proc (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Accept_Alternative_Proc);
!       --  Determine whether arbitrary entity Id denotes an internally generated
!       --  procedure which encapsulates the statements of an accept alternative.
! 
!       function Is_Activation_Proc (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Activation_Proc);
!       --  Determine whether arbitrary entity Id denotes a runtime procedure in
!       --  charge with activating tasks.
! 
!       function Is_Ada_Semantic_Target (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Ada_Semantic_Target);
!       --  Determine whether arbitrary entity Id denodes a source or internally
!       --  generated subprogram which emulates Ada semantics.
! 
!       function Is_Assertion_Pragma_Target (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Assertion_Pragma_Target);
!       --  Determine whether arbitrary entity Id denotes a procedure which
!       --  varifies the run-time semantics of an assertion pragma.
! 
!       function Is_Bodiless_Subprogram (Subp_Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Bodiless_Subprogram);
!       --  Determine whether subprogram Subp_Id will never have a body
! 
!       function Is_Bridge_Target (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Bridge_Target);
!       --  Determine whether arbitrary entity Id denotes a bridge target
! 
!       function Is_Controlled_Proc
!         (Subp_Id  : Entity_Id;
!          Subp_Nam : Name_Id) return Boolean;
!       pragma Inline (Is_Controlled_Proc);
!       --  Determine whether subprogram Subp_Id denotes controlled type
!       --  primitives Adjust, Finalize, or Initialize as denoted by name
!       --  Subp_Nam.
! 
!       function Is_Default_Initial_Condition_Proc
!         (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Default_Initial_Condition_Proc);
!       --  Determine whether arbitrary entity Id denotes internally generated
!       --  routine Default_Initial_Condition.
! 
!       function Is_Finalizer_Proc (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Finalizer_Proc);
!       --  Determine whether arbitrary entity Id denotes internally generated
!       --  routine _Finalizer.
! 
!       function Is_Initial_Condition_Proc (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Initial_Condition_Proc);
!       --  Determine whether arbitrary entity Id denotes internally generated
!       --  routine Initial_Condition.
! 
!       function Is_Initialized (Obj_Decl : Node_Id) return Boolean;
!       pragma Inline (Is_Initialized);
!       --  Determine whether object declaration Obj_Decl is initialized
! 
!       function Is_Invariant_Proc (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Invariant_Proc);
!       --  Determine whether arbitrary entity Id denotes an invariant procedure
! 
!       function Is_Non_Library_Level_Encapsulator (N : Node_Id) return Boolean;
!       pragma Inline (Is_Non_Library_Level_Encapsulator);
!       --  Determine whether arbitrary node N is a non-library encapsulator
! 
!       function Is_Partial_Invariant_Proc (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Partial_Invariant_Proc);
!       --  Determine whether arbitrary entity Id denotes a partial invariant
!       --  procedure.
! 
!       function Is_Postconditions_Proc (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Postconditions_Proc);
!       --  Determine whether arbitrary entity Id denotes internally generated
!       --  routine _Postconditions.
! 
!       function Is_Preelaborated_Unit (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Preelaborated_Unit);
!       --  Determine whether arbitrary entity Id denotes a unit which is subject
!       --  to one of the following pragmas:
!       --
!       --    * Preelaborable
!       --    * Pure
!       --    * Remote_Call_Interface
!       --    * Remote_Types
!       --    * Shared_Passive
! 
!       function Is_Protected_Entry (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Protected_Entry);
!       --  Determine whether arbitrary entity Id denotes a protected entry
! 
!       function Is_Protected_Subp (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Protected_Subp);
!       --  Determine whether entity Id denotes a protected subprogram
! 
!       function Is_Protected_Body_Subp (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Protected_Body_Subp);
!       --  Determine whether entity Id denotes the protected or unprotected
!       --  version of a protected subprogram.
! 
!       function Is_Scenario (N : Node_Id) return Boolean;
!       pragma Inline (Is_Scenario);
!       --  Determine whether attribute node N denotes a scenario. The scenario
!       --  may not necessarily be eligible for ABE processing.
! 
!       function Is_SPARK_Semantic_Target (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_SPARK_Semantic_Target);
!       --  Determine whether arbitrary entity Id nodes a source or internally
!       --  generated subprogram which emulates SPARK semantics.
! 
!       function Is_Subprogram_Inst (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Subprogram_Inst);
!       --  Determine whether arbitrary entity Id denotes a subprogram instance
! 
!       function Is_Suitable_Access_Taken (N : Node_Id) return Boolean;
!       pragma Inline (Is_Suitable_Access_Taken);
!       --  Determine whether arbitrary node N denotes a suitable attribute for
!       --  ABE processing.
! 
!       function Is_Suitable_Call (N : Node_Id) return Boolean;
!       pragma Inline (Is_Suitable_Call);
!       --  Determine whether arbitrary node N denotes a suitable call for ABE
!       --  processing.
! 
!       function Is_Suitable_Instantiation (N : Node_Id) return Boolean;
!       pragma Inline (Is_Suitable_Instantiation);
!       --  Determine whether arbitrary node N is a suitable instantiation for
!       --  ABE processing.
! 
!       function Is_Suitable_SPARK_Derived_Type (N : Node_Id) return Boolean;
!       pragma Inline (Is_Suitable_SPARK_Derived_Type);
!       --  Determine whether arbitrary node N denotes a suitable derived type
!       --  declaration for ABE processing using the SPARK rules.
! 
!       function Is_Suitable_SPARK_Instantiation (N : Node_Id) return Boolean;
!       pragma Inline (Is_Suitable_SPARK_Instantiation);
!       --  Determine whether arbitrary node N denotes a suitable instantiation
!       --  for ABE processing using the SPARK rules.
! 
!       function Is_Suitable_SPARK_Refined_State_Pragma
!         (N : Node_Id) return Boolean;
!       pragma Inline (Is_Suitable_SPARK_Refined_State_Pragma);
!       --  Determine whether arbitrary node N denotes a suitable Refined_State
!       --  pragma for ABE processing using the SPARK rules.
! 
!       function Is_Suitable_Variable_Assignment (N : Node_Id) return Boolean;
!       pragma Inline (Is_Suitable_Variable_Assignment);
!       --  Determine whether arbitrary node N denotes a suitable assignment for
!       --  ABE processing.
! 
!       function Is_Suitable_Variable_Reference (N : Node_Id) return Boolean;
!       pragma Inline (Is_Suitable_Variable_Reference);
!       --  Determine whether arbitrary node N is a suitable variable reference
!       --  for ABE processing.
! 
!       function Is_Task_Entry (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Task_Entry);
!       --  Determine whether arbitrary entity Id denotes a task entry
! 
!       function Is_Up_Level_Target
!         (Targ_Decl : Node_Id;
!          In_State  : Processing_In_State) return Boolean;
!       pragma Inline (Is_Up_Level_Target);
!       --  Determine whether the current root resides at the declaration level.
!       --  If this is the case, determine whether a target with by declaration
!       --  Target_Decl is within a context which encloses the current root or is
!       --  in a different unit. In_State is the current state of the Processing
!       --  phase.
! 
!    end Semantics;
!    use Semantics;
! 
!    --  The following package provides the main entry point for SPARK-related
!    --  checks and diagnostics.
! 
!    package SPARK_Processor is
! 
!       ---------
!       -- API --
!       ---------
! 
!       procedure Check_SPARK_Model_In_Effect;
!       pragma Inline (Check_SPARK_Model_In_Effect);
!       --  Determine whether a suitable elaboration model is currently in effect
!       --  for verifying SPARK rules. Emit a warning if this is not the case.
! 
!       procedure Check_SPARK_Scenarios;
!       pragma Inline (Check_SPARK_Scenarios);
!       --  Examine SPARK scenarios which are not necessarily executable during
!       --  elaboration, but still requires elaboration-related checks.
! 
!    end SPARK_Processor;
!    use SPARK_Processor;
! 
!    -----------------------
!    -- Local subprograms --
!    -----------------------
! 
!    function Assignment_Target (Asmt : Node_Id) return Node_Id;
!    pragma Inline (Assignment_Target);
!    --  Obtain the target of assignment statement Asmt
! 
!    function Call_Name (Call : Node_Id) return Node_Id;
!    pragma Inline (Call_Name);
!    --  Obtain the name of an entry, operator, or subprogram call Call
! 
!    function Canonical_Subprogram (Subp_Id : Entity_Id) return Entity_Id;
!    pragma Inline (Canonical_Subprogram);
!    --  Obtain the uniform canonical entity of subprogram Subp_Id
! 
!    function Compilation_Unit (Unit_Id : Entity_Id) return Node_Id;
!    pragma Inline (Compilation_Unit);
!    --  Return the N_Compilation_Unit node of unit Unit_Id
  
     function Find_Enclosing_Instance (N : Node_Id) return Node_Id;
     pragma Inline (Find_Enclosing_Instance);
*************** package body Sem_Elab is
*** 1300,1333 ****
     --  Return the type of subprogram Subp_Id's first formal parameter. If the
     --  subprogram lacks formal parameters, return Empty.
  
     function Has_Body (Pack_Decl : Node_Id) return Boolean;
     --  Determine whether package declaration Pack_Decl has a corresponding body
     --  or would eventually have one.
  
-    function Has_Prior_Elaboration
-      (Unit_Id      : Entity_Id;
-       Context_OK   : Boolean := False;
-       Elab_Body_OK : Boolean := False;
-       Same_Unit_OK : Boolean := False) return Boolean;
-    pragma Inline (Has_Prior_Elaboration);
-    --  Determine whether unit Unit_Id is elaborated prior to the main unit.
-    --  If flag Context_OK is set, the routine considers the following case
-    --  as valid prior elaboration:
-    --
-    --    * Unit_Id is in the elaboration context of the main unit
-    --
-    --  If flag Elab_Body_OK is set, the routine considers the following case
-    --  as valid prior elaboration:
-    --
-    --    * Unit_Id has pragma Elaborate_Body and is not the main unit
-    --
-    --  If flag Same_Unit_OK is set, the routine considers the following cases
-    --  as valid prior elaboration:
-    --
-    --    * Unit_Id is the main unit
-    --
-    --    * Unit_Id denotes the spec of the main unit body
- 
     function In_External_Instance
       (N           : Node_Id;
        Target_Decl : Node_Id) return Boolean;
--- 1972,1990 ----
     --  Return the type of subprogram Subp_Id's first formal parameter. If the
     --  subprogram lacks formal parameters, return Empty.
  
+    function Elaboration_Phase_Active return Boolean;
+    pragma Inline (Elaboration_Phase_Active);
+    --  Determine whether the elaboration phase of the compilation has started
+ 
+    procedure Finalize_All_Data_Structures;
+    pragma Inline (Finalize_All_Data_Structures);
+    --  Destroy all internal data structures
+ 
     function Has_Body (Pack_Decl : Node_Id) return Boolean;
+    pragma Inline (Has_Body);
     --  Determine whether package declaration Pack_Decl has a corresponding body
     --  or would eventually have one.
  
     function In_External_Instance
       (N           : Node_Id;
        Target_Decl : Node_Id) return Boolean;
*************** package body Sem_Elab is
*** 1344,1880 ****
       (N1        : Node_Id;
        N2        : Node_Id;
        Nested_OK : Boolean := False) return Boolean;
     --  Determine whether two arbitrary nodes N1 and N2 appear within the same
     --  context ignoring enclosing library levels. Nested_OK should be set when
     --  the context of N1 can enclose that of N2.
  
!    function In_Task_Body (N : Node_Id) return Boolean;
!    pragma Inline (In_Task_Body);
!    --  Determine whether arbitrary node N appears within a task body
  
!    procedure Info_Call
!      (Call      : Node_Id;
!       Target_Id : Entity_Id;
!       Info_Msg  : Boolean;
!       In_SPARK  : Boolean);
!    --  Output information concerning call Call which invokes target Target_Id.
!    --  If flag Info_Msg is set, the routine emits an information message,
!    --  otherwise it emits an error. If flag In_SPARK is set, then the string
!    --  " in SPARK" is added to the end of the message.
  
!    procedure Info_Instantiation
!      (Inst     : Node_Id;
!       Gen_Id   : Entity_Id;
!       Info_Msg : Boolean;
!       In_SPARK : Boolean);
!    pragma Inline (Info_Instantiation);
!    --  Output information concerning instantiation Inst which instantiates
!    --  generic unit Gen_Id. If flag Info_Msg is set, the routine emits an
!    --  information message, otherwise it emits an error. If flag In_SPARK
!    --  is set, then string " in SPARK" is added to the end of the message.
  
!    procedure Info_Variable_Reference
!      (Ref      : Node_Id;
!       Var_Id   : Entity_Id;
!       Info_Msg : Boolean;
!       In_SPARK : Boolean);
!    pragma Inline (Info_Variable_Reference);
!    --  Output information concerning reference Ref which mentions variable
!    --  Var_Id. If flag Info_Msg is set, the routine emits an information
!    --  message, otherwise it emits an error. If flag In_SPARK is set, then
!    --  string " in SPARK" is added to the end of the message.
  
!    function Insertion_Node (N : Node_Id; Ins_Nod : Node_Id) return Node_Id;
!    pragma Inline (Insertion_Node);
!    --  Obtain the proper insertion node of an ABE check or failure for scenario
!    --  N and candidate insertion node Ins_Nod.
  
!    procedure Install_ABE_Check
!      (N       : Node_Id;
!       Id      : Entity_Id;
!       Ins_Nod : Node_Id);
!    --  Insert a run-time ABE check for elaboration scenario N which verifies
!    --  whether arbitrary entity Id is elaborated. The check in inserted prior
!    --  to node Ins_Nod.
  
!    procedure Install_ABE_Check
!      (N           : Node_Id;
!       Target_Id   : Entity_Id;
!       Target_Decl : Node_Id;
!       Target_Body : Node_Id;
!       Ins_Nod     : Node_Id);
!    --  Insert a run-time ABE check for elaboration scenario N which verifies
!    --  whether target Target_Id with initial declaration Target_Decl and body
!    --  Target_Body is elaborated. The check is inserted prior to node Ins_Nod.
  
!    procedure Install_ABE_Failure (N : Node_Id; Ins_Nod : Node_Id);
!    --  Insert a Program_Error concerning a guaranteed ABE for elaboration
!    --  scenario N. The failure is inserted prior to node Node_Id.
  
!    function Is_Accept_Alternative_Proc (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Accept_Alternative_Proc);
!    --  Determine whether arbitrary entity Id denotes an internally generated
!    --  procedure which encapsulates the statements of an accept alternative.
  
!    function Is_Activation_Proc (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Activation_Proc);
!    --  Determine whether arbitrary entity Id denotes a runtime procedure in
!    --  charge with activating tasks.
  
!    function Is_Ada_Semantic_Target (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Ada_Semantic_Target);
!    --  Determine whether arbitrary entity Id denodes a source or internally
!    --  generated subprogram which emulates Ada semantics.
  
!    function Is_Assertion_Pragma_Target (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Assertion_Pragma_Target);
!    --  Determine whether arbitrary entity Id denotes a procedure which varifies
!    --  the run-time semantics of an assertion pragma.
  
!    function Is_Bodiless_Subprogram (Subp_Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Bodiless_Subprogram);
!    --  Determine whether subprogram Subp_Id will never have a body
  
!    function Is_Controlled_Proc
!      (Subp_Id  : Entity_Id;
!       Subp_Nam : Name_Id) return Boolean;
!    pragma Inline (Is_Controlled_Proc);
!    --  Determine whether subprogram Subp_Id denotes controlled type primitives
!    --  Adjust, Finalize, or Initialize as denoted by name Subp_Nam.
  
!    function Is_Default_Initial_Condition_Proc (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Default_Initial_Condition_Proc);
!    --  Determine whether arbitrary entity Id denotes internally generated
!    --  routine Default_Initial_Condition.
  
!    function Is_Finalizer_Proc (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Finalizer_Proc);
!    --  Determine whether arbitrary entity Id denotes internally generated
!    --  routine _Finalizer.
  
!    function Is_Guaranteed_ABE
!      (N           : Node_Id;
!       Target_Decl : Node_Id;
!       Target_Body : Node_Id) return Boolean;
!    pragma Inline (Is_Guaranteed_ABE);
!    --  Determine whether scenario N with a target described by its initial
!    --  declaration Target_Decl and body Target_Decl results in a guaranteed
!    --  ABE.
  
!    function Is_Initial_Condition_Proc (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Initial_Condition_Proc);
!    --  Determine whether arbitrary entity Id denotes internally generated
!    --  routine Initial_Condition.
  
!    function Is_Initialized (Obj_Decl : Node_Id) return Boolean;
!    pragma Inline (Is_Initialized);
!    --  Determine whether object declaration Obj_Decl is initialized
  
!    function Is_Invariant_Proc (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Invariant_Proc);
!    --  Determine whether arbitrary entity Id denotes an invariant procedure
  
!    function Is_Non_Library_Level_Encapsulator (N : Node_Id) return Boolean;
!    pragma Inline (Is_Non_Library_Level_Encapsulator);
!    --  Determine whether arbitrary node N is a non-library encapsulator
  
!    function Is_Partial_Invariant_Proc (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Partial_Invariant_Proc);
!    --  Determine whether arbitrary entity Id denotes a partial invariant
!    --  procedure.
  
!    function Is_Postconditions_Proc (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Postconditions_Proc);
!    --  Determine whether arbitrary entity Id denotes internally generated
!    --  routine _Postconditions.
  
!    function Is_Preelaborated_Unit (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Preelaborated_Unit);
!    --  Determine whether arbitrary entity Id denotes a unit which is subject to
!    --  one of the following pragmas:
!    --
!    --    * Preelaborable
!    --    * Pure
!    --    * Remote_Call_Interface
!    --    * Remote_Types
!    --    * Shared_Passive
  
!    function Is_Protected_Entry (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Protected_Entry);
!    --  Determine whether arbitrary entity Id denotes a protected entry
  
!    function Is_Protected_Subp (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Protected_Subp);
!    --  Determine whether entity Id denotes a protected subprogram
  
!    function Is_Protected_Body_Subp (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Protected_Body_Subp);
!    --  Determine whether entity Id denotes the protected or unprotected version
!    --  of a protected subprogram.
  
!    function Is_Recorded_SPARK_Scenario (N : Node_Id) return Boolean;
!    pragma Inline (Is_Recorded_SPARK_Scenario);
!    --  Determine whether arbitrary node N is a recorded SPARK scenario which
!    --  appears in table SPARK_Scenarios.
  
!    function Is_Recorded_Top_Level_Scenario (N : Node_Id) return Boolean;
!    pragma Inline (Is_Recorded_Top_Level_Scenario);
!    --  Determine whether arbitrary node N is a recorded top-level scenario
!    --  which appears in table Top_Level_Scenarios.
  
!    function Is_Safe_Activation
!      (Call      : Node_Id;
!       Task_Decl : Node_Id) return Boolean;
!    pragma Inline (Is_Safe_Activation);
!    --  Determine whether call Call which activates a task object described by
!    --  declaration Task_Decl is always ABE-safe.
  
!    function Is_Safe_Call
!      (Call         : Node_Id;
!       Target_Attrs : Target_Attributes) return Boolean;
!    pragma Inline (Is_Safe_Call);
!    --  Determine whether call Call which invokes a target described by
!    --  attributes Target_Attrs is always ABE-safe.
  
!    function Is_Safe_Instantiation
!      (Inst      : Node_Id;
!       Gen_Attrs : Target_Attributes) return Boolean;
!    pragma Inline (Is_Safe_Instantiation);
!    --  Determine whether instance Inst which instantiates a generic unit
!    --  described by attributes Gen_Attrs is always ABE-safe.
  
!    function Is_Same_Unit
!      (Unit_1 : Entity_Id;
!       Unit_2 : Entity_Id) return Boolean;
!    pragma Inline (Is_Same_Unit);
!    --  Determine whether entities Unit_1 and Unit_2 denote the same unit
  
!    function Is_Scenario (N : Node_Id) return Boolean;
!    pragma Inline (Is_Scenario);
!    --  Determine whether attribute node N denotes a scenario. The scenario may
!    --  not necessarily be eligible for ABE processing.
  
!    function Is_SPARK_Semantic_Target (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_SPARK_Semantic_Target);
!    --  Determine whether arbitrary entity Id nodes a source or internally
!    --  generated subprogram which emulates SPARK semantics.
  
!    function Is_Suitable_Access (N : Node_Id) return Boolean;
!    pragma Inline (Is_Suitable_Access);
!    --  Determine whether arbitrary node N denotes a suitable attribute for ABE
!    --  processing.
  
!    function Is_Suitable_Call (N : Node_Id) return Boolean;
!    pragma Inline (Is_Suitable_Call);
!    --  Determine whether arbitrary node N denotes a suitable call for ABE
!    --  processing.
  
!    function Is_Suitable_Instantiation (N : Node_Id) return Boolean;
!    pragma Inline (Is_Suitable_Instantiation);
!    --  Determine whether arbitrary node N is a suitable instantiation for ABE
!    --  processing.
  
!    function Is_Suitable_Scenario (N : Node_Id) return Boolean;
!    pragma Inline (Is_Suitable_Scenario);
!    --  Determine whether arbitrary node N is a suitable scenario for ABE
!    --  processing.
  
!    function Is_Suitable_SPARK_Derived_Type (N : Node_Id) return Boolean;
!    pragma Inline (Is_Suitable_SPARK_Derived_Type);
!    --  Determine whether arbitrary node N denotes a suitable derived type
!    --  declaration for ABE processing using the SPARK rules.
  
!    function Is_Suitable_SPARK_Instantiation (N : Node_Id) return Boolean;
!    pragma Inline (Is_Suitable_SPARK_Instantiation);
!    --  Determine whether arbitrary node N denotes a suitable instantiation for
!    --  ABE processing using the SPARK rules.
  
!    function Is_Suitable_SPARK_Refined_State_Pragma
!      (N : Node_Id) return Boolean;
!    pragma Inline (Is_Suitable_SPARK_Refined_State_Pragma);
!    --  Determine whether arbitrary node N denotes a suitable Refined_State
!    --  pragma for ABE processing using the SPARK rules.
  
!    function Is_Suitable_Variable_Assignment (N : Node_Id) return Boolean;
!    pragma Inline (Is_Suitable_Variable_Assignment);
!    --  Determine whether arbitrary node N denotes a suitable assignment for ABE
!    --  processing.
  
!    function Is_Suitable_Variable_Reference (N : Node_Id) return Boolean;
!    pragma Inline (Is_Suitable_Variable_Reference);
!    --  Determine whether arbitrary node N is a suitable variable reference for
!    --  ABE processing.
  
!    function Is_Synchronous_Suspension_Call (N : Node_Id) return Boolean;
!    pragma Inline (Is_Synchronous_Suspension_Call);
!    --  Determine whether arbitrary node N denotes a call to one the following
!    --  routines:
!    --
!    --    Ada.Synchronous_Barriers.Wait_For_Release
!    --    Ada.Synchronous_Task_Control.Suspend_Until_True
  
!    function Is_Task_Entry (Id : Entity_Id) return Boolean;
!    pragma Inline (Is_Task_Entry);
!    --  Determine whether arbitrary entity Id denotes a task entry
  
!    function Is_Up_Level_Target (Target_Decl : Node_Id) return Boolean;
!    pragma Inline (Is_Up_Level_Target);
!    --  Determine whether the current root resides at the declaration level. If
!    --  this is the case, determine whether a target described by declaration
!    --  Target_Decl is within a context which encloses the current root or is in
!    --  a different unit.
  
!    function Is_Visited_Body (Body_Decl : Node_Id) return Boolean;
!    pragma Inline (Is_Visited_Body);
!    --  Determine whether subprogram body Body_Decl is already visited during a
!    --  recursive traversal started from a top-level scenario.
  
!    procedure Meet_Elaboration_Requirement
!      (N         : Node_Id;
!       Target_Id : Entity_Id;
!       Req_Nam   : Name_Id);
!    --  Determine whether elaboration requirement Req_Nam for scenario N with
!    --  target Target_Id is met by the context of the main unit using the SPARK
!    --  rules. Req_Nam must denote either Elaborate or Elaborate_All. Emit an
!    --  error if this is not the case.
  
!    function Non_Private_View (Typ : Entity_Id) return Entity_Id;
!    pragma Inline (Non_Private_View);
!    --  Return the full view of private type Typ if available, otherwise return
!    --  type Typ.
  
!    procedure Output_Active_Scenarios (Error_Nod : Node_Id);
!    --  Output the contents of the active scenario stack from earliest to latest
!    --  to supplement an earlier error emitted for node Error_Nod.
  
!    procedure Pop_Active_Scenario (N : Node_Id);
!    pragma Inline (Pop_Active_Scenario);
!    --  Pop the top of the scenario stack. A check is made to ensure that the
!    --  scenario being removed is the same as N.
  
!    generic
!       with procedure Process_Single_Activation
!         (Call       : Node_Id;
!          Call_Attrs : Call_Attributes;
!          Obj_Id     : Entity_Id;
!          Task_Attrs : Task_Attributes;
!          State      : Processing_Attributes);
!       --  Perform ABE checks and diagnostics for task activation call Call
!       --  which activates task Obj_Id. Call_Attrs are the attributes of the
!       --  activation call. Task_Attrs are the attributes of the task type.
!       --  State is the current state of the Processing phase.
  
!    procedure Process_Activation_Generic
!      (Call       : Node_Id;
!       Call_Attrs : Call_Attributes;
!       State      : Processing_Attributes);
!    --  Perform ABE checks and diagnostics for activation call Call by invoking
!    --  routine Process_Single_Activation on each task object being activated.
!    --  Call_Attrs are the attributes of the activation call. State is the
!    --  current state of the Processing phase.
  
!    procedure Process_Conditional_ABE
!      (N     : Node_Id;
!       State : Processing_Attributes := Initial_State);
!    --  Top-level dispatcher for processing of various elaboration scenarios.
!    --  Perform conditional ABE checks and diagnostics for scenario N. State
!    --  is the current state of the Processing phase.
  
!    procedure Process_Conditional_ABE_Access
!      (Attr  : Node_Id;
!       State : Processing_Attributes);
!    --  Perform ABE checks and diagnostics for 'Access to entry, operator, or
!    --  subprogram denoted by Attr. State is the current state of the Processing
!    --  phase.
  
!    procedure Process_Conditional_ABE_Activation_Impl
!      (Call       : Node_Id;
!       Call_Attrs : Call_Attributes;
!       Obj_Id     : Entity_Id;
!       Task_Attrs : Task_Attributes;
!       State      : Processing_Attributes);
!    --  Perform common conditional ABE checks and diagnostics for call Call
!    --  which activates task Obj_Id ignoring the Ada or SPARK rules. Call_Attrs
!    --  are the attributes of the activation call. Task_Attrs are the attributes
!    --  of the task type. State is the current state of the Processing phase.
  
!    procedure Process_Conditional_ABE_Call
!      (Call       : Node_Id;
!       Call_Attrs : Call_Attributes;
!       Target_Id  : Entity_Id;
!       State      : Processing_Attributes);
!    --  Top-level dispatcher for processing of calls. Perform ABE checks and
!    --  diagnostics for call Call which invokes target Target_Id. Call_Attrs
!    --  are the attributes of the call. State is the current state of the
!    --  Processing phase.
  
!    procedure Process_Conditional_ABE_Call_Ada
!      (Call         : Node_Id;
!       Call_Attrs   : Call_Attributes;
!       Target_Id    : Entity_Id;
!       Target_Attrs : Target_Attributes;
!       State        : Processing_Attributes);
!    --  Perform ABE checks and diagnostics for call Call which invokes target
!    --  Target_Id using the Ada rules. Call_Attrs are the attributes of the
!    --  call. Target_Attrs are attributes of the target. State is the current
!    --  state of the Processing phase.
  
!    procedure Process_Conditional_ABE_Call_SPARK
!      (Call         : Node_Id;
!       Target_Id    : Entity_Id;
!       Target_Attrs : Target_Attributes;
!       State        : Processing_Attributes);
!    --  Perform ABE checks and diagnostics for call Call which invokes target
!    --  Target_Id using the SPARK rules. Target_Attrs denotes the attributes of
!    --  the target. State is the current state of the Processing phase.
  
!    procedure Process_Conditional_ABE_Instantiation
!      (Exp_Inst : Node_Id;
!       State    : Processing_Attributes);
!    --  Top-level dispatcher for processing of instantiations. Perform ABE
!    --  checks and diagnostics for expanded instantiation Exp_Inst. State is
!    --  the current state of the Processing phase.
  
!    procedure Process_Conditional_ABE_Instantiation_Ada
!      (Exp_Inst   : Node_Id;
!       Inst       : Node_Id;
!       Inst_Attrs : Instantiation_Attributes;
!       Gen_Id     : Entity_Id;
!       Gen_Attrs  : Target_Attributes;
!       State      : Processing_Attributes);
!    --  Perform ABE checks and diagnostics for expanded instantiation Exp_Inst
!    --  of generic Gen_Id using the Ada rules. Inst is the instantiation node.
!    --  Inst_Attrs are the attributes of the instance. Gen_Attrs denotes the
!    --  attributes of the generic. State is the current state of the Processing
!    --  phase.
  
!    procedure Process_Conditional_ABE_Instantiation_SPARK
!      (Inst      : Node_Id;
!       Gen_Id    : Entity_Id;
!       Gen_Attrs : Target_Attributes;
!       State     : Processing_Attributes);
!    --  Perform ABE checks and diagnostics for instantiation Inst of generic
!    --  Gen_Id using the SPARK rules. Gen_Attrs denotes the attributes of the
!    --  generic. State is the current state of the Processing phase.
  
!    procedure Process_Conditional_ABE_Variable_Assignment (Asmt : Node_Id);
!    --  Top-level dispatcher for processing of variable assignments. Perform ABE
!    --  checks and diagnostics for assignment statement Asmt.
  
!    procedure Process_Conditional_ABE_Variable_Assignment_Ada
!      (Asmt   : Node_Id;
!       Var_Id : Entity_Id);
!    --  Perform ABE checks and diagnostics for assignment statement Asmt that
!    --  updates the value of variable Var_Id using the Ada rules.
  
!    procedure Process_Conditional_ABE_Variable_Assignment_SPARK
!      (Asmt   : Node_Id;
!       Var_Id : Entity_Id);
!    --  Perform ABE checks and diagnostics for assignment statement Asmt that
!    --  updates the value of variable Var_Id using the SPARK rules.
  
!    procedure Process_Conditional_ABE_Variable_Reference (Ref : Node_Id);
!    --  Top-level dispatcher for processing of variable references. Perform ABE
!    --  checks and diagnostics for variable reference Ref.
  
!    procedure Process_Conditional_ABE_Variable_Reference_Read
!      (Ref    : Node_Id;
!       Var_Id : Entity_Id;
!       Attrs  : Variable_Attributes);
!    --  Perform ABE checks and diagnostics for reference Ref described by its
!    --  attributes Attrs, that reads variable Var_Id.
  
!    procedure Process_Guaranteed_ABE (N : Node_Id);
!    --  Top-level dispatcher for processing of scenarios which result in a
!    --  guaranteed ABE.
  
!    procedure Process_Guaranteed_ABE_Activation_Impl
!      (Call       : Node_Id;
!       Call_Attrs : Call_Attributes;
!       Obj_Id     : Entity_Id;
!       Task_Attrs : Task_Attributes;
!       State      : Processing_Attributes);
!    --  Perform common guaranteed ABE checks and diagnostics for call Call which
!    --  activates task Obj_Id ignoring the Ada or SPARK rules. Call_Attrs are
!    --  the attributes of the activation call. Task_Attrs are the attributes of
!    --  the task type. State is provided for compatibility and is not used.
  
!    procedure Process_Guaranteed_ABE_Call
!      (Call       : Node_Id;
!       Call_Attrs : Call_Attributes;
!       Target_Id  : Entity_Id);
!    --  Perform common guaranteed ABE checks and diagnostics for call Call which
!    --  invokes target Target_Id ignoring the Ada or SPARK rules. Call_Attrs are
!    --  the attributes of the call.
  
!    procedure Process_Guaranteed_ABE_Instantiation (Exp_Inst : Node_Id);
!    --  Perform common guaranteed ABE checks and diagnostics for expanded
!    --  instantiation Exp_Inst of generic Gen_Id ignoring the Ada or SPARK
!    --  rules.
  
!    procedure Push_Active_Scenario (N : Node_Id);
!    pragma Inline (Push_Active_Scenario);
!    --  Push scenario N on top of the scenario stack
  
!    procedure Record_SPARK_Elaboration_Scenario (N : Node_Id);
!    pragma Inline (Record_SPARK_Elaboration_Scenario);
!    --  Save SPARK scenario N in table SPARK_Scenarios for later processing
  
!    procedure Reset_Visited_Bodies;
!    pragma Inline (Reset_Visited_Bodies);
!    --  Clear the contents of table Visited_Bodies
  
!    function Root_Scenario return Node_Id;
!    pragma Inline (Root_Scenario);
!    --  Return the top-level scenario which started a recursive search for other
!    --  scenarios. It is assumed that there is a valid top-level scenario on the
!    --  active scenario stack.
  
!    procedure Set_Early_Call_Region (Body_Id : Entity_Id; Start : Node_Id);
!    pragma Inline (Set_Early_Call_Region);
!    --  Associate an early call region with begins at construct Start with entry
!    --  or subprogram body Body_Id.
  
!    procedure Set_Elaboration_Status
!      (Unit_Id : Entity_Id;
!       Val     : Elaboration_Attributes);
!    pragma Inline (Set_Elaboration_Status);
!    --  Associate an set of elaboration attributes with unit Unit_Id
  
!    procedure Set_Is_Recorded_SPARK_Scenario
!      (N   : Node_Id;
!       Val : Boolean := True);
!    pragma Inline (Set_Is_Recorded_SPARK_Scenario);
!    --  Mark scenario N as being recorded in table SPARK_Scenarios
  
!    procedure Set_Is_Recorded_Top_Level_Scenario
!      (N   : Node_Id;
!       Val : Boolean := True);
!    pragma Inline (Set_Is_Recorded_Top_Level_Scenario);
!    --  Mark scenario N as being recorded in table Top_Level_Scenarios
  
!    procedure Set_Is_Visited_Body (Subp_Body : Node_Id);
!    pragma Inline (Set_Is_Visited_Body);
!    --  Mark subprogram body Subp_Body as being visited during a recursive
!    --  traversal started from a top-level scenario.
  
!    function Static_Elaboration_Checks return Boolean;
!    pragma Inline (Static_Elaboration_Checks);
!    --  Determine whether the static model is in effect
  
!    procedure Traverse_Body (N : Node_Id; State : Processing_Attributes);
!    --  Inspect the declarative and statement lists of subprogram body N for
!    --  suitable elaboration scenarios and process them. State is the current
!    --  state of the Processing phase.
  
!    function Unit_Entity (Unit_Id : Entity_Id) return Entity_Id;
!    pragma Inline (Unit_Entity);
!    --  Return the entity of the initial declaration for unit Unit_Id
  
!    procedure Update_Elaboration_Scenario (New_N : Node_Id; Old_N : Node_Id);
!    pragma Inline (Update_Elaboration_Scenario);
!    --  Update all relevant internal data structures when scenario Old_N is
!    --  transformed into scenario New_N by Atree.Rewrite.
  
     -----------------------
     -- Build_Call_Marker --
--- 2001,3425 ----
       (N1        : Node_Id;
        N2        : Node_Id;
        Nested_OK : Boolean := False) return Boolean;
+    pragma Inline (In_Same_Context);
     --  Determine whether two arbitrary nodes N1 and N2 appear within the same
     --  context ignoring enclosing library levels. Nested_OK should be set when
     --  the context of N1 can enclose that of N2.
  
!    procedure Initialize_All_Data_Structures;
!    pragma Inline (Initialize_All_Data_Structures);
!    --  Create all internal data structures
  
!    function Instantiated_Generic (Inst : Node_Id) return Entity_Id;
!    pragma Inline (Instantiated_Generic);
!    --  Obtain the generic instantiated by instance Inst
  
!    function Is_Safe_Activation
!      (Call     : Node_Id;
!       Task_Rep : Target_Rep_Id) return Boolean;
!    pragma Inline (Is_Safe_Activation);
!    --  Determine whether activation call Call which activates an object of a
!    --  task type described by representation Task_Rep is always ABE-safe.
  
!    function Is_Safe_Call
!      (Call     : Node_Id;
!       Subp_Id  : Entity_Id;
!       Subp_Rep : Target_Rep_Id) return Boolean;
!    pragma Inline (Is_Safe_Call);
!    --  Determine whether call Call which invokes entry, operator, or subprogram
!    --  Subp_Id is always ABE-safe. Subp_Rep is the representation of the entry,
!    --  operator, or subprogram.
  
!    function Is_Safe_Instantiation
!      (Inst    : Node_Id;
!       Gen_Id  : Entity_Id;
!       Gen_Rep : Target_Rep_Id) return Boolean;
!    pragma Inline (Is_Safe_Instantiation);
!    --  Determine whether instantiation Inst which instantiates generic Gen_Id
!    --  is always ABE-safe. Gen_Rep is the representation of the generic.
  
!    function Is_Same_Unit
!      (Unit_1 : Entity_Id;
!       Unit_2 : Entity_Id) return Boolean;
!    pragma Inline (Is_Same_Unit);
!    --  Determine whether entities Unit_1 and Unit_2 denote the same unit
  
!    function Main_Unit_Entity return Entity_Id;
!    pragma Inline (Main_Unit_Entity);
!    --  Return the entity of the main unit
  
!    function Non_Private_View (Typ : Entity_Id) return Entity_Id;
!    pragma Inline (Non_Private_View);
!    --  Return the full view of private type Typ if available, otherwise return
!    --  type Typ.
  
!    function Scenario (N : Node_Id) return Node_Id;
!    pragma Inline (Scenario);
!    --  Return the appropriate scenario node for scenario N
  
!    procedure Set_Elaboration_Phase (Status : Elaboration_Phase_Status);
!    pragma Inline (Set_Elaboration_Phase);
!    --  Change the status of the elaboration phase of the compiler to Status
  
!    procedure Spec_And_Body_From_Entity
!      (Id        : Node_Id;
!       Spec_Decl : out Node_Id;
!       Body_Decl : out Node_Id);
!    pragma Inline (Spec_And_Body_From_Entity);
!    --  Given arbitrary entity Id representing a construct with a spec and body,
!    --  retrieve declaration of the spec in Spec_Decl and the declaration of the
!    --  body in Body_Decl.
  
!    procedure Spec_And_Body_From_Node
!      (N         : Node_Id;
!       Spec_Decl : out Node_Id;
!       Body_Decl : out Node_Id);
!    pragma Inline (Spec_And_Body_From_Node);
!    --  Given arbitrary node N representing a construct with a spec and body,
!    --  retrieve declaration of the spec in Spec_Decl and the declaration of
!    --  the body in Body_Decl.
  
!    function Static_Elaboration_Checks return Boolean;
!    pragma Inline (Static_Elaboration_Checks);
!    --  Determine whether the static model is in effect
  
!    function Unit_Entity (Unit_Id : Entity_Id) return Entity_Id;
!    pragma Inline (Unit_Entity);
!    --  Return the entity of the initial declaration for unit Unit_Id
  
!    procedure Update_Elaboration_Scenario (New_N : Node_Id; Old_N : Node_Id);
!    pragma Inline (Update_Elaboration_Scenario);
!    --  Update all relevant internal data structures when scenario Old_N is
!    --  transformed into scenario New_N by Atree.Rewrite.
  
!    ----------------------
!    -- Active_Scenarios --
!    ----------------------
  
!    package body Active_Scenarios is
  
!       -----------------------
!       -- Local subprograms --
!       -----------------------
  
!       procedure Output_Access_Taken
!         (Attr      : Node_Id;
!          Attr_Rep  : Scenario_Rep_Id;
!          Error_Nod : Node_Id);
!       pragma Inline (Output_Access_Taken);
!       --  Emit a specific diagnostic message for 'Access attribute reference
!       --  Attr with representation Attr_Rep. The message is associated with
!       --  node Error_Nod.
  
!       procedure Output_Active_Scenario
!         (N         : Node_Id;
!          Error_Nod : Node_Id;
!          In_State  : Processing_In_State);
!       pragma Inline (Output_Active_Scenario);
!       --  Top level dispatcher for outputting a scenario. Emit a specific
!       --  diagnostic message for scenario N. The message is associated with
!       --  node Error_Nod. In_State is the current state of the Processing
!       --  phase.
  
!       procedure Output_Call
!         (Call      : Node_Id;
!          Call_Rep  : Scenario_Rep_Id;
!          Error_Nod : Node_Id);
!       pragma Inline (Output_Call);
!       --  Emit a diagnostic message for call Call with representation Call_Rep.
!       --  The message is associated with node Error_Nod.
  
!       procedure Output_Header (Error_Nod : Node_Id);
!       pragma Inline (Output_Header);
!       --  Emit a specific diagnostic message for the unit of the root scenario.
!       --  The message is associated with node Error_Nod.
  
!       procedure Output_Instantiation
!         (Inst      : Node_Id;
!          Inst_Rep  : Scenario_Rep_Id;
!          Error_Nod : Node_Id);
!       pragma Inline (Output_Instantiation);
!       --  Emit a specific diagnostic message for instantiation Inst with
!       --  representation Inst_Rep. The message is associated with node
!       --  Error_Nod.
  
!       procedure Output_Refined_State_Pragma
!         (Prag      : Node_Id;
!          Prag_Rep  : Scenario_Rep_Id;
!          Error_Nod : Node_Id);
!       pragma Inline (Output_Refined_State_Pragma);
!       --  Emit a specific diagnostic message for Refined_State pragma Prag
!       --  with representation Prag_Rep. The message is associated with node
!       --  Error_Nod.
  
!       procedure Output_Task_Activation
!         (Call      : Node_Id;
!          Call_Rep  : Scenario_Rep_Id;
!          Error_Nod : Node_Id);
!       pragma Inline (Output_Task_Activation);
!       --  Emit a specific diagnostic message for activation call Call
!       --  with representation Call_Rep. The message is associated with
!       --  node Error_Nod.
  
!       procedure Output_Variable_Assignment
!         (Asmt      : Node_Id;
!          Asmt_Rep  : Scenario_Rep_Id;
!          Error_Nod : Node_Id);
!       pragma Inline (Output_Variable_Assignment);
!       --  Emit a specific diagnostic message for assignment statement Asmt
!       --  with representation Asmt_Rep. The message is associated with node
!       --  Error_Nod.
  
!       procedure Output_Variable_Reference
!         (Ref      : Node_Id;
!          Ref_Rep  : Scenario_Rep_Id;
!          Error_Nod : Node_Id);
!       pragma Inline (Output_Variable_Reference);
!       --  Emit a specific diagnostic message for read reference Ref with
!       --  representation Ref_Rep. The message is associated with node
!       --  Error_Nod.
  
!       -------------------
!       -- Output_Access --
!       -------------------
  
!       procedure Output_Access_Taken
!         (Attr      : Node_Id;
!          Attr_Rep  : Scenario_Rep_Id;
!          Error_Nod : Node_Id)
!       is
!          Subp_Id : constant Entity_Id := Target (Attr_Rep);
  
!       begin
!          Error_Msg_Name_1 := Attribute_Name (Attr);
!          Error_Msg_Sloc   := Sloc (Attr);
!          Error_Msg_NE ("\\  % of & taken #", Error_Nod, Subp_Id);
!       end Output_Access_Taken;
  
!       ----------------------------
!       -- Output_Active_Scenario --
!       ----------------------------
  
!       procedure Output_Active_Scenario
!         (N         : Node_Id;
!          Error_Nod : Node_Id;
!          In_State  : Processing_In_State)
!       is
!          Scen     : constant Node_Id := Scenario (N);
!          Scen_Rep : Scenario_Rep_Id;
  
!       begin
!          --  'Access
  
!          if Is_Suitable_Access_Taken (Scen) then
!             Output_Access_Taken
!               (Attr      => Scen,
!                Attr_Rep  => Scenario_Representation_Of (Scen, In_State),
!                Error_Nod => Error_Nod);
  
!          --  Call or task activation
  
!          elsif Is_Suitable_Call (Scen) then
!             Scen_Rep := Scenario_Representation_Of (Scen, In_State);
  
!             if Kind (Scen_Rep) = Call_Scenario then
!                Output_Call
!                  (Call      => Scen,
!                   Call_Rep  => Scen_Rep,
!                   Error_Nod => Error_Nod);
  
!             else
!                pragma Assert (Kind (Scen_Rep) = Task_Activation_Scenario);
  
!                Output_Task_Activation
!                  (Call      => Scen,
!                   Call_Rep  => Scen_Rep,
!                   Error_Nod => Error_Nod);
!             end if;
  
!          --  Instantiation
  
!          elsif Is_Suitable_Instantiation (Scen) then
!             Output_Instantiation
!               (Inst      => Scen,
!                Inst_Rep  => Scenario_Representation_Of (Scen, In_State),
!                Error_Nod => Error_Nod);
  
!          --  Pragma Refined_State
  
!          elsif Is_Suitable_SPARK_Refined_State_Pragma (Scen) then
!             Output_Refined_State_Pragma
!               (Prag      => Scen,
!                Prag_Rep  => Scenario_Representation_Of (Scen, In_State),
!                Error_Nod => Error_Nod);
  
!          --  Variable assignment
  
!          elsif Is_Suitable_Variable_Assignment (Scen) then
!             Output_Variable_Assignment
!               (Asmt      => Scen,
!                Asmt_Rep  => Scenario_Representation_Of (Scen, In_State),
!                Error_Nod => Error_Nod);
  
!          --  Variable reference
  
!          elsif Is_Suitable_Variable_Reference (Scen) then
!             Output_Variable_Reference
!               (Ref       => Scen,
!                Ref_Rep   => Scenario_Representation_Of (Scen, In_State),
!                Error_Nod => Error_Nod);
!          end if;
!       end Output_Active_Scenario;
  
!       -----------------------------
!       -- Output_Active_Scenarios --
!       -----------------------------
  
!       procedure Output_Active_Scenarios
!         (Error_Nod : Node_Id;
!          In_State  : Processing_In_State)
!       is
!          package Scenarios renames Active_Scenario_Stack;
  
!          Header_Posted : Boolean := False;
  
!       begin
!          --  Output the contents of the active scenario stack starting from the
!          --  bottom, or the least recent scenario.
  
!          for Index in Scenarios.First .. Scenarios.Last loop
!             if not Header_Posted then
!                Output_Header (Error_Nod);
!                Header_Posted := True;
!             end if;
  
!             Output_Active_Scenario
!               (N         => Scenarios.Table (Index),
!                Error_Nod => Error_Nod,
!                In_State  => In_State);
!          end loop;
!       end Output_Active_Scenarios;
  
!       -----------------
!       -- Output_Call --
!       -----------------
  
!       procedure Output_Call
!         (Call      : Node_Id;
!          Call_Rep  : Scenario_Rep_Id;
!          Error_Nod : Node_Id)
!       is
!          procedure Output_Accept_Alternative (Alt_Id : Entity_Id);
!          pragma Inline (Output_Accept_Alternative);
!          --  Emit a specific diagnostic message concerning accept alternative
!          --  with entity Alt_Id.
  
!          procedure Output_Call (Subp_Id : Entity_Id; Kind : String);
!          pragma Inline (Output_Call);
!          --  Emit a specific diagnostic message concerning a call of kind Kind
!          --  which invokes subprogram Subp_Id.
  
!          procedure Output_Type_Actions (Subp_Id : Entity_Id; Action : String);
!          pragma Inline (Output_Type_Actions);
!          --  Emit a specific diagnostic message concerning action Action of a
!          --  type performed by subprogram Subp_Id.
  
!          procedure Output_Verification_Call
!            (Pred    : String;
!             Id      : Entity_Id;
!             Id_Kind : String);
!          pragma Inline (Output_Verification_Call);
!          --  Emit a specific diagnostic message concerning the verification of
!          --  predicate Pred applied to related entity Id with kind Id_Kind.
  
!          -------------------------------
!          -- Output_Accept_Alternative --
!          -------------------------------
  
!          procedure Output_Accept_Alternative (Alt_Id : Entity_Id) is
!             Entry_Id : constant Entity_Id := Receiving_Entry (Alt_Id);
  
!          begin
!             pragma Assert (Present (Entry_Id));
  
!             Error_Msg_NE ("\\  entry & selected #", Error_Nod, Entry_Id);
!          end Output_Accept_Alternative;
  
!          -----------------
!          -- Output_Call --
!          -----------------
  
!          procedure Output_Call (Subp_Id : Entity_Id; Kind : String) is
!          begin
!             Error_Msg_NE ("\\  " & Kind & " & called #", Error_Nod, Subp_Id);
!          end Output_Call;
  
!          -------------------------
!          -- Output_Type_Actions --
!          -------------------------
  
!          procedure Output_Type_Actions
!            (Subp_Id : Entity_Id;
!             Action  : String)
!          is
!             Typ : constant Entity_Id := First_Formal_Type (Subp_Id);
  
!          begin
!             pragma Assert (Present (Typ));
  
!             Error_Msg_NE
!               ("\\  " & Action & " actions for type & #", Error_Nod, Typ);
!          end Output_Type_Actions;
  
!          ------------------------------
!          -- Output_Verification_Call --
!          ------------------------------
  
!          procedure Output_Verification_Call
!            (Pred    : String;
!             Id      : Entity_Id;
!             Id_Kind : String)
!          is
!          begin
!             pragma Assert (Present (Id));
  
!             Error_Msg_NE
!               ("\\  " & Pred & " of " & Id_Kind & " & verified #",
!                Error_Nod, Id);
!          end Output_Verification_Call;
  
!          --  Local variables
  
!          Subp_Id : constant Entity_Id := Target (Call_Rep);
  
!       --  Start of processing for Output_Call
  
!       begin
!          Error_Msg_Sloc := Sloc (Call);
  
!          --  Accept alternative
  
!          if Is_Accept_Alternative_Proc (Subp_Id) then
!             Output_Accept_Alternative (Subp_Id);
  
!          --  Adjustment
  
!          elsif Is_TSS (Subp_Id, TSS_Deep_Adjust) then
!             Output_Type_Actions (Subp_Id, "adjustment");
  
!          --  Default_Initial_Condition
  
!          elsif Is_Default_Initial_Condition_Proc (Subp_Id) then
!             Output_Verification_Call
!               (Pred    => "Default_Initial_Condition",
!                Id      => First_Formal_Type (Subp_Id),
!                Id_Kind => "type");
  
!          --  Entries
  
!          elsif Is_Protected_Entry (Subp_Id) then
!             Output_Call (Subp_Id, "entry");
  
!          --  Task entry calls are never processed because the entry being
!          --  invoked does not have a corresponding "body", it has a select. A
!          --  task entry call appears in the stack of active scenarios for the
!          --  sole purpose of checking No_Entry_Calls_In_Elaboration_Code and
!          --  nothing more.
  
!          elsif Is_Task_Entry (Subp_Id) then
!             null;
! 
!          --  Finalization
! 
!          elsif Is_TSS (Subp_Id, TSS_Deep_Finalize) then
!             Output_Type_Actions (Subp_Id, "finalization");
! 
!          --  Calls to _Finalizer procedures must not appear in the output
!          --  because this creates confusing noise.
! 
!          elsif Is_Finalizer_Proc (Subp_Id) then
!             null;
! 
!          --  Initial_Condition
! 
!          elsif Is_Initial_Condition_Proc (Subp_Id) then
!             Output_Verification_Call
!               (Pred    => "Initial_Condition",
!                Id      => Find_Enclosing_Scope (Call),
!                Id_Kind => "package");
! 
!          --  Initialization
! 
!          elsif Is_Init_Proc (Subp_Id)
!            or else Is_TSS (Subp_Id, TSS_Deep_Initialize)
!          then
!             Output_Type_Actions (Subp_Id, "initialization");
! 
!          --  Invariant
! 
!          elsif Is_Invariant_Proc (Subp_Id) then
!             Output_Verification_Call
!               (Pred    => "invariants",
!                Id      => First_Formal_Type (Subp_Id),
!                Id_Kind => "type");
! 
!          --  Partial invariant calls must not appear in the output because this
!          --  creates confusing noise. Note that a partial invariant is always
!          --  invoked by the "full" invariant which is already placed on the
!          --  stack.
! 
!          elsif Is_Partial_Invariant_Proc (Subp_Id) then
!             null;
! 
!          --  _Postconditions
! 
!          elsif Is_Postconditions_Proc (Subp_Id) then
!             Output_Verification_Call
!               (Pred    => "postconditions",
!                Id      => Find_Enclosing_Scope (Call),
!                Id_Kind => "subprogram");
! 
!          --  Subprograms must come last because some of the previous cases fall
!          --  under this category.
! 
!          elsif Ekind (Subp_Id) = E_Function then
!             Output_Call (Subp_Id, "function");
! 
!          elsif Ekind (Subp_Id) = E_Procedure then
!             Output_Call (Subp_Id, "procedure");
! 
!          else
!             pragma Assert (False);
!             return;
!          end if;
!       end Output_Call;
! 
!       -------------------
!       -- Output_Header --
!       -------------------
! 
!       procedure Output_Header (Error_Nod : Node_Id) is
!          Unit_Id : constant Entity_Id := Find_Top_Unit (Root_Scenario);
! 
!       begin
!          if Ekind (Unit_Id) = E_Package then
!             Error_Msg_NE ("\\  spec of unit & elaborated", Error_Nod, Unit_Id);
! 
!          elsif Ekind (Unit_Id) = E_Package_Body then
!             Error_Msg_NE ("\\  body of unit & elaborated", Error_Nod, Unit_Id);
! 
!          else
!             Error_Msg_NE ("\\  in body of unit &", Error_Nod, Unit_Id);
!          end if;
!       end Output_Header;
! 
!       --------------------------
!       -- Output_Instantiation --
!       --------------------------
! 
!       procedure Output_Instantiation
!         (Inst      : Node_Id;
!          Inst_Rep  : Scenario_Rep_Id;
!          Error_Nod : Node_Id)
!       is
!          procedure Output_Instantiation (Gen_Id : Entity_Id; Kind : String);
!          pragma Inline (Output_Instantiation);
!          --  Emit a specific diagnostic message concerning an instantiation of
!          --  generic unit Gen_Id. Kind denotes the kind of the instantiation.
! 
!          --------------------------
!          -- Output_Instantiation --
!          --------------------------
! 
!          procedure Output_Instantiation (Gen_Id : Entity_Id; Kind : String) is
!          begin
!             Error_Msg_NE
!               ("\\  " & Kind & " & instantiated as & #", Error_Nod, Gen_Id);
!          end Output_Instantiation;
! 
!          --  Local variables
! 
!          Gen_Id : constant Entity_Id := Target (Inst_Rep);
! 
!       --  Start of processing for Output_Instantiation
! 
!       begin
!          Error_Msg_Node_2 := Defining_Entity (Inst);
!          Error_Msg_Sloc   := Sloc (Inst);
! 
!          if Nkind (Inst) = N_Function_Instantiation then
!             Output_Instantiation (Gen_Id, "function");
! 
!          elsif Nkind (Inst) = N_Package_Instantiation then
!             Output_Instantiation (Gen_Id, "package");
! 
!          elsif Nkind (Inst) = N_Procedure_Instantiation then
!             Output_Instantiation (Gen_Id, "procedure");
! 
!          else
!             pragma Assert (False);
!             return;
!          end if;
!       end Output_Instantiation;
! 
!       ---------------------------------
!       -- Output_Refined_State_Pragma --
!       ---------------------------------
! 
!       procedure Output_Refined_State_Pragma
!         (Prag      : Node_Id;
!          Prag_Rep  : Scenario_Rep_Id;
!          Error_Nod : Node_Id)
!       is
!          pragma Unreferenced (Prag_Rep);
! 
!       begin
!          Error_Msg_Sloc := Sloc (Prag);
!          Error_Msg_N ("\\  refinement constituents read #", Error_Nod);
!       end Output_Refined_State_Pragma;
! 
!       ----------------------------
!       -- Output_Task_Activation --
!       ----------------------------
! 
!       procedure Output_Task_Activation
!         (Call      : Node_Id;
!          Call_Rep  : Scenario_Rep_Id;
!          Error_Nod : Node_Id)
!       is
!          pragma Unreferenced (Call_Rep);
! 
!          function Find_Activator return Entity_Id;
!          --  Find the nearest enclosing construct which houses call Call
! 
!          --------------------
!          -- Find_Activator --
!          --------------------
! 
!          function Find_Activator return Entity_Id is
!             Par : Node_Id;
! 
!          begin
!             --  Climb the parent chain looking for a package [body] or a
!             --  construct with a statement sequence.
! 
!             Par := Parent (Call);
!             while Present (Par) loop
!                if Nkind_In (Par, N_Package_Body, N_Package_Declaration) then
!                   return Defining_Entity (Par);
! 
!                elsif Nkind (Par) = N_Handled_Sequence_Of_Statements then
!                   return Defining_Entity (Parent (Par));
!                end if;
! 
!                Par := Parent (Par);
!             end loop;
! 
!             return Empty;
!          end Find_Activator;
! 
!          --  Local variables
! 
!          Activator : constant Entity_Id := Find_Activator;
! 
!       --  Start of processing for Output_Task_Activation
! 
!       begin
!          pragma Assert (Present (Activator));
! 
!          Error_Msg_NE ("\\  local tasks of & activated", Error_Nod, Activator);
!       end Output_Task_Activation;
! 
!       --------------------------------
!       -- Output_Variable_Assignment --
!       --------------------------------
! 
!       procedure Output_Variable_Assignment
!         (Asmt      : Node_Id;
!          Asmt_Rep  : Scenario_Rep_Id;
!          Error_Nod : Node_Id)
!       is
!          Var_Id : constant Entity_Id := Target (Asmt_Rep);
! 
!       begin
!          Error_Msg_Sloc := Sloc (Asmt);
!          Error_Msg_NE ("\\  variable & assigned #", Error_Nod, Var_Id);
!       end Output_Variable_Assignment;
! 
!       -------------------------------
!       -- Output_Variable_Reference --
!       -------------------------------
! 
!       procedure Output_Variable_Reference
!         (Ref       : Node_Id;
!          Ref_Rep   : Scenario_Rep_Id;
!          Error_Nod : Node_Id)
!       is
!          Var_Id : constant Entity_Id := Target (Ref_Rep);
! 
!       begin
!          Error_Msg_Sloc := Sloc (Ref);
!          Error_Msg_NE ("\\  variable & read #", Error_Nod, Var_Id);
!       end Output_Variable_Reference;
! 
!       -------------------------
!       -- Pop_Active_Scenario --
!       -------------------------
! 
!       procedure Pop_Active_Scenario (N : Node_Id) is
!          package Scenarios renames Active_Scenario_Stack;
!          Top : Node_Id renames Scenarios.Table (Scenarios.Last);
! 
!       begin
!          pragma Assert (Top = N);
!          Scenarios.Decrement_Last;
!       end Pop_Active_Scenario;
! 
!       --------------------------
!       -- Push_Active_Scenario --
!       --------------------------
! 
!       procedure Push_Active_Scenario (N : Node_Id) is
!       begin
!          Active_Scenario_Stack.Append (N);
!       end Push_Active_Scenario;
! 
!       -------------------
!       -- Root_Scenario --
!       -------------------
! 
!       function Root_Scenario return Node_Id is
!          package Scenarios renames Active_Scenario_Stack;
! 
!       begin
!          --  Ensure that the scenario stack has at least one active scenario in
!          --  it. The one at the bottom (index First) is the root scenario.
! 
!          pragma Assert (Scenarios.Last >= Scenarios.First);
!          return Scenarios.Table (Scenarios.First);
!       end Root_Scenario;
!    end Active_Scenarios;
! 
!    --------------------------
!    -- Activation_Processor --
!    --------------------------
! 
!    package body Activation_Processor is
! 
!       ------------------------
!       -- Process_Activation --
!       ------------------------
! 
!       procedure Process_Activation
!         (Call      : Node_Id;
!          Call_Rep  : Scenario_Rep_Id;
!          Processor : Activation_Processor_Ptr;
!          In_State  : Processing_In_State)
!       is
!          procedure Process_Task_Object (Obj_Id : Entity_Id; Typ : Entity_Id);
!          pragma Inline (Process_Task_Object);
!          --  Invoke Processor for task object Obj_Id of type Typ
! 
!          procedure Process_Task_Objects
!            (Task_Objs : NE_List.Doubly_Linked_List);
!          pragma Inline (Process_Task_Objects);
!          --  Invoke Processor for all task objects found in list Task_Objs
! 
!          procedure Traverse_List
!            (List      : List_Id;
!             Task_Objs : NE_List.Doubly_Linked_List);
!          pragma Inline (Traverse_List);
!          --  Traverse declarative or statement list List while searching for
!          --  objects of a task type, or containing task components. If such an
!          --  object is found, first save it in list Task_Objs and then invoke
!          --  Processor on it.
! 
!          -------------------------
!          -- Process_Task_Object --
!          -------------------------
! 
!          procedure Process_Task_Object (Obj_Id : Entity_Id; Typ : Entity_Id) is
!             Root_Typ : constant Entity_Id :=
!                          Non_Private_View (Root_Type (Typ));
!             Comp_Id  : Entity_Id;
!             Obj_Rep  : Target_Rep_Id;
!             Root_Rep : Target_Rep_Id;
! 
!             New_In_State : Processing_In_State := In_State;
!             --  Each step of the Processing phase constitutes a new state
! 
!          begin
!             if Is_Task_Type (Typ) then
!                Obj_Rep  := Target_Representation_Of (Obj_Id,   New_In_State);
!                Root_Rep := Target_Representation_Of (Root_Typ, New_In_State);
! 
!                --  Warnings are suppressed when a prior scenario is already in
!                --  that mode, or when the object, activation call, or task type
!                --  have warnings suppressed. Update the state of the Processing
!                --  phase to reflect this.
! 
!                New_In_State.Suppress_Warnings :=
!                  New_In_State.Suppress_Warnings
!                    or else not Elaboration_Warnings_OK (Call_Rep)
!                    or else not Elaboration_Warnings_OK (Obj_Rep)
!                    or else not Elaboration_Warnings_OK (Root_Rep);
! 
!                --  Update the state of the Processing phase to indicate that
!                --  any further traversal is now within a task body.
! 
!                New_In_State.Within_Task_Body := True;
! 
!                --  Associate the current task type with the activation call
! 
!                Set_Activated_Task_Type (Call_Rep, Root_Typ);
! 
!                --  Process the activation of the current task object by calling
!                --  the supplied processor.
! 
!                Processor.all
!                  (Call     => Call,
!                   Call_Rep => Call_Rep,
!                   Obj_Id   => Obj_Id,
!                   Obj_Rep  => Obj_Rep,
!                   Task_Typ => Root_Typ,
!                   Task_Rep => Root_Rep,
!                   In_State => New_In_State);
! 
!                --  Reset the association between the current task and the
!                --  activtion call.
! 
!                Set_Activated_Task_Type (Call_Rep, Empty);
! 
!             --  Examine the component type when the object is an array
! 
!             elsif Is_Array_Type (Typ) and then Has_Task (Root_Typ) then
!                Process_Task_Object
!                  (Obj_Id => Obj_Id,
!                   Typ    => Component_Type (Typ));
! 
!             --  Examine individual component types when the object is a record
! 
!             elsif Is_Record_Type (Typ) and then Has_Task (Root_Typ) then
!                Comp_Id := First_Component (Typ);
!                while Present (Comp_Id) loop
!                   Process_Task_Object
!                     (Obj_Id => Obj_Id,
!                      Typ    => Etype (Comp_Id));
! 
!                   Next_Component (Comp_Id);
!                end loop;
!             end if;
!          end Process_Task_Object;
! 
!          --------------------------
!          -- Process_Task_Objects --
!          --------------------------
! 
!          procedure Process_Task_Objects
!            (Task_Objs : NE_List.Doubly_Linked_List)
!          is
!             Iter   : NE_List.Iterator;
!             Obj_Id : Entity_Id;
! 
!          begin
!             Iter := NE_List.Iterate (Task_Objs);
!             while NE_List.Has_Next (Iter) loop
!                NE_List.Next (Iter, Obj_Id);
! 
!                Process_Task_Object
!                  (Obj_Id => Obj_Id,
!                   Typ    => Etype (Obj_Id));
!             end loop;
!          end Process_Task_Objects;
! 
!          -------------------
!          -- Traverse_List --
!          -------------------
! 
!          procedure Traverse_List
!            (List      : List_Id;
!             Task_Objs : NE_List.Doubly_Linked_List)
!          is
!             Item     : Node_Id;
!             Item_Id  : Entity_Id;
!             Item_Typ : Entity_Id;
! 
!          begin
!             --  Examine the contents of the list looking for an object
!             --  declaration of a task type or one that contains a task
!             --  within.
! 
!             Item := First (List);
!             while Present (Item) loop
!                if Nkind (Item) = N_Object_Declaration then
!                   Item_Id  := Defining_Entity (Item);
!                   Item_Typ := Etype (Item_Id);
! 
!                   if Has_Task (Item_Typ) then
! 
!                      --  The object is either of a task type, or contains a
!                      --  task component. Save it in the list of task objects
!                      --  associated with the activation call.
! 
!                      NE_List.Append (Task_Objs, Item_Id);
! 
!                      Process_Task_Object
!                        (Obj_Id => Item_Id,
!                         Typ    => Item_Typ);
!                   end if;
!                end if;
! 
!                Next (Item);
!             end loop;
!          end Traverse_List;
! 
!          --  Local variables
! 
!          Context   : Node_Id;
!          Spec      : Node_Id;
!          Task_Objs : NE_List.Doubly_Linked_List;
! 
!       --  Start of processing for Process_Activation
! 
!       begin
!          --  Nothing to do when the activation is a guaranteed ABE
! 
!          if Is_Known_Guaranteed_ABE (Call) then
!             return;
!          end if;
! 
!          Task_Objs := Activated_Task_Objects (Call_Rep);
! 
!          --  The activation call has been processed at least once, and all
!          --  task objects have already been collected. Directly process the
!          --  objects without having to reexamine the context of the call.
! 
!          if NE_List.Present (Task_Objs) then
!             Process_Task_Objects (Task_Objs);
! 
!          --  Otherwise the activation call is being processed for the first
!          --  time. Collect all task objects in case the call is reprocessed
!          --  multiple times.
! 
!          else
!             Task_Objs := NE_List.Create;
!             Set_Activated_Task_Objects (Call_Rep, Task_Objs);
! 
!             --  Find the context of the activation call where all task objects
!             --  being activated are declared. This is usually the parent of the
!             --  call.
! 
!             Context := Parent (Call);
! 
!             --  Handle the case where the activation call appears within the
!             --  handled statements of a block or a body.
! 
!             if Nkind (Context) = N_Handled_Sequence_Of_Statements then
!                Context := Parent (Context);
!             end if;
! 
!             --  Process all task objects in both the spec and body when the
!             --  activation call appears in a package body.
! 
!             if Nkind (Context) = N_Package_Body then
!                Spec :=
!                  Specification
!                    (Unit_Declaration_Node (Corresponding_Spec (Context)));
! 
!                Traverse_List
!                  (List      => Visible_Declarations (Spec),
!                   Task_Objs => Task_Objs);
! 
!                Traverse_List
!                  (List      => Private_Declarations (Spec),
!                   Task_Objs => Task_Objs);
! 
!                Traverse_List
!                  (List      => Declarations (Context),
!                   Task_Objs => Task_Objs);
! 
!             --  Process all task objects in the spec when the activation call
!             --  appears in a package spec.
! 
!             elsif Nkind (Context) = N_Package_Specification then
!                Traverse_List
!                  (List      => Visible_Declarations (Context),
!                   Task_Objs => Task_Objs);
! 
!                Traverse_List
!                  (List      => Private_Declarations (Context),
!                   Task_Objs => Task_Objs);
! 
!             --  Otherwise the context must be a block or a body. Process all
!             --  task objects found in the declarations.
! 
!             else
!                pragma Assert (Nkind_In (Context, N_Block_Statement,
!                                                  N_Entry_Body,
!                                                  N_Protected_Body,
!                                                  N_Subprogram_Body,
!                                                  N_Task_Body));
! 
!                Traverse_List
!                  (List      => Declarations (Context),
!                   Task_Objs => Task_Objs);
!             end if;
!          end if;
!       end Process_Activation;
!    end Activation_Processor;
! 
!    -----------------------
!    -- Assignment_Target --
!    -----------------------
! 
!    function Assignment_Target (Asmt : Node_Id) return Node_Id is
!       Nam : Node_Id;
! 
!    begin
!       Nam := Name (Asmt);
! 
!       --  When the name denotes an array or record component, find the whole
!       --  object.
! 
!       while Nkind_In (Nam, N_Explicit_Dereference,
!                            N_Indexed_Component,
!                            N_Selected_Component,
!                            N_Slice)
!       loop
!          Nam := Prefix (Nam);
!       end loop;
! 
!       return Nam;
!    end Assignment_Target;
! 
!    --------------------
!    -- Body_Processor --
!    --------------------
! 
!    package body Body_Processor is
! 
!       ---------------------
!       -- Data structures --
!       ---------------------
! 
!       --  The following map relates scenario lists to subprogram bodies
! 
!       Nested_Scenarios_Map : NE_List_Map.Dynamic_Hash_Table := NE_List_Map.Nil;
! 
!       --  The following set contains all subprogram bodies that have been
!       --  processed by routine Traverse_Body.
! 
!       Traversed_Bodies_Set : NE_Set.Membership_Set := NE_Set.Nil;
! 
!       -----------------------
!       -- Local subprograms --
!       -----------------------
! 
!       function Is_Traversed_Body (N : Node_Id) return Boolean;
!       pragma Inline (Is_Traversed_Body);
!       --  Determine whether subprogram body N has already been traversed
! 
!       function Nested_Scenarios
!         (N : Node_Id) return NE_List.Doubly_Linked_List;
!       pragma Inline (Nested_Scenarios);
!       --  Obtain the list of scenarios associated with subprogram body N
! 
!       procedure Set_Is_Traversed_Body
!         (N   : Node_Id;
!          Val : Boolean := True);
!       pragma Inline (Set_Is_Traversed_Body);
!       --  Mark subprogram body N as traversed depending on value Val
! 
!       procedure Set_Nested_Scenarios
!         (N         : Node_Id;
!          Scenarios : NE_List.Doubly_Linked_List);
!       pragma Inline (Set_Nested_Scenarios);
!       --  Associate scenario list Scenarios with subprogram body N
! 
!       -----------------------------
!       -- Finalize_Body_Processor --
!       -----------------------------
! 
!       procedure Finalize_Body_Processor is
!       begin
!          NE_List_Map.Destroy (Nested_Scenarios_Map);
!          NE_Set.Destroy      (Traversed_Bodies_Set);
!       end Finalize_Body_Processor;
! 
!       -------------------------------
!       -- Initialize_Body_Processor --
!       -------------------------------
! 
!       procedure Initialize_Body_Processor is
!       begin
!          Nested_Scenarios_Map := NE_List_Map.Create (250);
!          Traversed_Bodies_Set := NE_Set.Create      (250);
!       end Initialize_Body_Processor;
! 
!       -----------------------
!       -- Is_Traversed_Body --
!       -----------------------
! 
!       function Is_Traversed_Body (N : Node_Id) return Boolean is
!          pragma Assert (Present (N));
!       begin
!          return NE_Set.Contains (Traversed_Bodies_Set, N);
!       end Is_Traversed_Body;
! 
!       ----------------------
!       -- Nested_Scenarios --
!       ----------------------
! 
!       function Nested_Scenarios
!         (N : Node_Id) return NE_List.Doubly_Linked_List
!       is
!          pragma Assert (Present (N));
!          pragma Assert (Nkind (N) = N_Subprogram_Body);
! 
!       begin
!          return NE_List_Map.Get (Nested_Scenarios_Map, N);
!       end Nested_Scenarios;
! 
!       ----------------------------
!       -- Reset_Traversed_Bodies --
!       ----------------------------
! 
!       procedure Reset_Traversed_Bodies is
!       begin
!          NE_Set.Reset (Traversed_Bodies_Set);
!       end Reset_Traversed_Bodies;
! 
!       ---------------------------
!       -- Set_Is_Traversed_Body --
!       ---------------------------
! 
!       procedure Set_Is_Traversed_Body
!         (N   : Node_Id;
!          Val : Boolean := True)
!       is
!          pragma Assert (Present (N));
! 
!       begin
!          if Val then
!             NE_Set.Insert (Traversed_Bodies_Set, N);
!          else
!             NE_Set.Delete (Traversed_Bodies_Set, N);
!          end if;
!       end Set_Is_Traversed_Body;
! 
!       --------------------------
!       -- Set_Nested_Scenarios --
!       --------------------------
! 
!       procedure Set_Nested_Scenarios
!         (N         : Node_Id;
!          Scenarios : NE_List.Doubly_Linked_List)
!       is
!          pragma Assert (Present (N));
!       begin
!          NE_List_Map.Put (Nested_Scenarios_Map, N, Scenarios);
!       end Set_Nested_Scenarios;
! 
!       -------------------
!       -- Traverse_Body --
!       -------------------
! 
!       procedure Traverse_Body
!         (N                   : Node_Id;
!          Requires_Processing : Scenario_Predicate_Ptr;
!          Processor           : Scenario_Processor_Ptr;
!          In_State            : Processing_In_State)
!       is
!          Scenarios : NE_List.Doubly_Linked_List := NE_List.Nil;
!          --  The list of scenarios that appear within the declarations and
!          --  statement of subprogram body N. The variable is intentionally
!          --  global because Is_Potential_Scenario needs to populate it.
! 
!          function In_Task_Body (Nod : Node_Id) return Boolean;
!          pragma Inline (In_Task_Body);
!          --  Determine whether arbitrary node Nod appears within a task body
! 
!          function Is_Synchronous_Suspension_Call
!            (Nod : Node_Id) return Boolean;
!          pragma Inline (Is_Synchronous_Suspension_Call);
!          --  Determine whether arbitrary node Nod denotes a call to one of
!          --  these routines:
!          --
!          --    Ada.Synchronous_Barriers.Wait_For_Release
!          --    Ada.Synchronous_Task_Control.Suspend_Until_True
! 
!          procedure Traverse_Collected_Scenarios;
!          pragma Inline (Traverse_Collected_Scenarios);
!          --  Traverse the already collected scenarios in list Scenarios by
!          --  invoking Processor on each individual one.
! 
!          procedure Traverse_List (List : List_Id);
!          pragma Inline (Traverse_List);
!          --  Invoke Traverse_Potential_Scenarios on each node in list List
! 
!          function Traverse_Potential_Scenario
!            (Scen : Node_Id) return Traverse_Result;
!          pragma Inline (Traverse_Potential_Scenario);
!          --  Determine whether arbitrary node Scen is a suitable scenario using
!          --  predicate Is_Scenario and traverse it by invoking Processor on it.
! 
!          procedure Traverse_Potential_Scenarios is
!            new Traverse_Proc (Traverse_Potential_Scenario);
! 
!          ------------------
!          -- In_Task_Body --
!          ------------------
! 
!          function In_Task_Body (Nod : Node_Id) return Boolean is
!             Par : Node_Id;
! 
!          begin
!             --  Climb the parent chain looking for a task body [procedure]
! 
!             Par := Nod;
!             while Present (Par) loop
!                if Nkind (Par) = N_Task_Body then
!                   return True;
! 
!                elsif Nkind (Par) = N_Subprogram_Body
!                  and then Is_Task_Body_Procedure (Par)
!                then
!                   return True;
! 
!                --  Prevent the search from going too far. Note that this test
!                --  shares nodes with the two cases above, and must come last.
! 
!                elsif Is_Body_Or_Package_Declaration (Par) then
!                   return False;
!                end if;
! 
!                Par := Parent (Par);
!             end loop;
! 
!             return False;
!          end In_Task_Body;
! 
!          ------------------------------------
!          -- Is_Synchronous_Suspension_Call --
!          ------------------------------------
! 
!          function Is_Synchronous_Suspension_Call
!            (Nod : Node_Id) return Boolean
!          is
!             Subp_Id : Entity_Id;
! 
!          begin
!             --  To qualify, the call must invoke one of the runtime routines
!             --  which perform synchronous suspension.
! 
!             if Is_Suitable_Call (Nod) then
!                Subp_Id := Target (Nod);
! 
!                return
!                  Is_RTE (Subp_Id, RE_Suspend_Until_True)
!                    or else
!                  Is_RTE (Subp_Id, RE_Wait_For_Release);
!             end if;
! 
!             return False;
!          end Is_Synchronous_Suspension_Call;
! 
!          ----------------------------------
!          -- Traverse_Collected_Scenarios --
!          ----------------------------------
! 
!          procedure Traverse_Collected_Scenarios is
!             Iter : NE_List.Iterator;
!             Scen : Node_Id;
! 
!          begin
!             Iter := NE_List.Iterate (Scenarios);
!             while NE_List.Has_Next (Iter) loop
!                NE_List.Next (Iter, Scen);
! 
!                --  The current scenario satisfies the input predicate, process
!                --  it.
! 
!                if Requires_Processing.all (Scen) then
!                   Processor.all (Scen, In_State);
!                end if;
!             end loop;
!          end Traverse_Collected_Scenarios;
! 
!          -------------------
!          -- Traverse_List --
!          -------------------
! 
!          procedure Traverse_List (List : List_Id) is
!             Scen : Node_Id;
! 
!          begin
!             Scen := First (List);
!             while Present (Scen) loop
!                Traverse_Potential_Scenarios (Scen);
!                Next (Scen);
!             end loop;
!          end Traverse_List;
! 
!          ---------------------------------
!          -- Traverse_Potential_Scenario --
!          ---------------------------------
! 
!          function Traverse_Potential_Scenario
!            (Scen : Node_Id) return Traverse_Result
!          is
!          begin
!             --  Special cases
! 
!             --  Skip constructs which do not have elaboration of their own and
!             --  need to be elaborated by other means such as invocation, task
!             --  activation, etc.
! 
!             if Is_Non_Library_Level_Encapsulator (Scen) then
!                return Skip;
! 
!             --  Terminate the traversal of a task body when encountering an
!             --  accept or select statement, and
!             --
!             --    * Entry calls during elaboration are not allowed. In this
!             --      case the accept or select statement will cause the task
!             --      to block at elaboration time because there are no entry
!             --      calls to unblock it.
!             --
!             --  or
!             --
!             --    * Switch -gnatd_a (stop elaboration checks on accept or
!             --      select statement) is in effect.
! 
!             elsif (Debug_Flag_Underscore_A
!                     or else Restriction_Active
!                               (No_Entry_Calls_In_Elaboration_Code))
!               and then Nkind_In (Original_Node (Scen), N_Accept_Statement,
!                                                        N_Selective_Accept)
!             then
!                return Abandon;
! 
!             --  Terminate the traversal of a task body when encountering a
!             --  suspension call, and
!             --
!             --    * Entry calls during elaboration are not allowed. In this
!             --      case the suspension call emulates an entry call and will
!             --      cause the task to block at elaboration time.
!             --
!             --  or
!             --
!             --    * Switch -gnatd_s (stop elaboration checks on synchronous
!             --      suspension) is in effect.
!             --
!             --  Note that the guard should not be checking the state of flag
!             --  Within_Task_Body because only suspension calls which appear
!             --  immediately within the statements of the task are supported.
!             --  Flag Within_Task_Body carries over to deeper levels of the
!             --  traversal.
! 
!             elsif (Debug_Flag_Underscore_S
!                     or else Restriction_Active
!                               (No_Entry_Calls_In_Elaboration_Code))
!               and then Is_Synchronous_Suspension_Call (Scen)
!               and then In_Task_Body (Scen)
!             then
!                return Abandon;
! 
!             --  Certain nodes carry semantic lists which act as repositories
!             --  until expansion transforms the node and relocates the contents.
!             --  Examine these lists in case expansion is disabled.
! 
!             elsif Nkind_In (Scen, N_And_Then, N_Or_Else) then
!                Traverse_List (Actions (Scen));
! 
!             elsif Nkind_In (Scen, N_Elsif_Part, N_Iteration_Scheme) then
!                Traverse_List (Condition_Actions (Scen));
! 
!             elsif Nkind (Scen) = N_If_Expression then
!                Traverse_List (Then_Actions (Scen));
!                Traverse_List (Else_Actions (Scen));
! 
!             elsif Nkind_In (Scen, N_Component_Association,
!                                   N_Iterated_Component_Association)
!             then
!                Traverse_List (Loop_Actions (Scen));
! 
!             --  General case
! 
!             --  The current node satisfies the input predicate, process it
! 
!             elsif Requires_Processing.all (Scen) then
!                Processor.all (Scen, In_State);
!             end if;
! 
!             --  Save a general scenario regardless of whether it satisfies the
!             --  input predicate. This allows for quick subsequent traversals of
!             --  general scenarios, even with different predicates.
! 
!             if Is_Suitable_Access_Taken (Scen)
!               or else Is_Suitable_Call (Scen)
!               or else Is_Suitable_Instantiation (Scen)
!               or else Is_Suitable_Variable_Assignment (Scen)
!               or else Is_Suitable_Variable_Reference (Scen)
!             then
!                NE_List.Append (Scenarios, Scen);
!             end if;
! 
!             return OK;
!          end Traverse_Potential_Scenario;
! 
!       --  Start of processing for Traverse_Body
! 
!       begin
!          --  Nothing to do when the traversal is suppressed
! 
!          if In_State.Traversal = No_Traversal then
!             return;
! 
!          --  Nothing to do when there is no input
! 
!          elsif No (N) then
!             return;
! 
!          --  Nothing to do when the input is not a subprogram body
! 
!          elsif Nkind (N) /= N_Subprogram_Body then
!             return;
! 
!          --  Nothing to do if the subprogram body was already traversed
! 
!          elsif Is_Traversed_Body (N) then
!             return;
!          end if;
! 
!          --  Mark the subprogram body as traversed
! 
!          Set_Is_Traversed_Body (N);
! 
!          Scenarios := Nested_Scenarios (N);
! 
!          --  The subprogram body has been traversed at least once, and all
!          --  scenarios that appear within its declarations and statements
!          --  have already been collected. Directly retraverse the scenarios
!          --  without having to retraverse the subprogram body subtree.
! 
!          if NE_List.Present (Scenarios) then
!             Traverse_Collected_Scenarios;
! 
!          --  Otherwise the subprogram body is being traversed for the first
!          --  time. Collect all scenarios that appear within its declarations
!          --  and statements in case the subprogram body has to be retraversed
!          --  multiple times.
! 
!          else
!             Scenarios := NE_List.Create;
!             Set_Nested_Scenarios (N, Scenarios);
! 
!             Traverse_List (Declarations (N));
!             Traverse_Potential_Scenarios (Handled_Statement_Sequence (N));
!          end if;
!       end Traverse_Body;
!    end Body_Processor;
  
     -----------------------
     -- Build_Call_Marker --
*************** package body Sem_Elab is
*** 1882,1900 ****
  
     procedure Build_Call_Marker (N : Node_Id) is
        function In_External_Context
!         (Call         : Node_Id;
!          Target_Attrs : Target_Attributes) return Boolean;
        pragma Inline (In_External_Context);
!       --  Determine whether a target described by attributes Target_Attrs is
!       --  external to call Call which must reside within an instance.
  
        function In_Premature_Context (Call : Node_Id) return Boolean;
        --  Determine whether call Call appears within a premature context
  
-       function Is_Bridge_Target (Id : Entity_Id) return Boolean;
-       pragma Inline (Is_Bridge_Target);
-       --  Determine whether arbitrary entity Id denotes a bridge target
- 
        function Is_Default_Expression (Call : Node_Id) return Boolean;
        pragma Inline (Is_Default_Expression);
        --  Determine whether call Call acts as the expression of a defaulted
--- 3427,3442 ----
  
     procedure Build_Call_Marker (N : Node_Id) is
        function In_External_Context
!         (Call    : Node_Id;
!          Subp_Id : Entity_Id) return Boolean;
        pragma Inline (In_External_Context);
!       --  Determine whether entry, operator, or subprogram Subp_Id is external
!       --  to call Call which must reside within an instance.
  
        function In_Premature_Context (Call : Node_Id) return Boolean;
+       pragma Inline (In_Premature_Context);
        --  Determine whether call Call appears within a premature context
  
        function Is_Default_Expression (Call : Node_Id) return Boolean;
        pragma Inline (Is_Default_Expression);
        --  Determine whether call Call acts as the expression of a defaulted
*************** package body Sem_Elab is
*** 1910,1925 ****
        -------------------------
  
        function In_External_Context
!         (Call         : Node_Id;
!          Target_Attrs : Target_Attributes) return Boolean
        is
           Inst      : Node_Id;
           Inst_Body : Node_Id;
!          Inst_Decl : Node_Id;
  
        begin
-          --  Performance note: parent traversal
- 
           Inst := Find_Enclosing_Instance (Call);
  
           --  The call appears within an instance
--- 3452,3467 ----
        -------------------------
  
        function In_External_Context
!         (Call    : Node_Id;
!          Subp_Id : Entity_Id) return Boolean
        is
+          Spec_Decl : constant Entity_Id := Unit_Declaration_Node (Subp_Id);
+ 
           Inst      : Node_Id;
           Inst_Body : Node_Id;
!          Inst_Spec : Node_Id;
  
        begin
           Inst := Find_Enclosing_Instance (Call);
  
           --  The call appears within an instance
*************** package body Sem_Elab is
*** 1929,1935 ****
              --  The call comes from the main unit and the target does not
  
              if In_Extended_Main_Code_Unit (Call)
!               and then not In_Extended_Main_Code_Unit (Target_Attrs.Spec_Decl)
              then
                 return True;
  
--- 3471,3477 ----
              --  The call comes from the main unit and the target does not
  
              if In_Extended_Main_Code_Unit (Call)
!               and then not In_Extended_Main_Code_Unit (Spec_Decl)
              then
                 return True;
  
*************** package body Sem_Elab is
*** 1937,1952 ****
              --  instance spec or body.
  
              else
!                Extract_Instance_Attributes
!                  (Exp_Inst  => Inst,
!                   Inst_Decl => Inst_Decl,
!                   Inst_Body => Inst_Body);
! 
!                --  Performance note: parent traversal
  
                 return not In_Subtree
!                             (N     => Target_Attrs.Spec_Decl,
!                              Root1 => Inst_Decl,
                               Root2 => Inst_Body);
              end if;
           end if;
--- 3479,3492 ----
              --  instance spec or body.
  
              else
!                Spec_And_Body_From_Node
!                  (N         => Inst,
!                   Spec_Decl => Inst_Spec,
!                   Body_Decl => Inst_Body);
  
                 return not In_Subtree
!                             (N     => Spec_Decl,
!                              Root1 => Inst_Spec,
                               Root2 => Inst_Body);
              end if;
           end if;
*************** package body Sem_Elab is
*** 1988,2009 ****
           return False;
        end In_Premature_Context;
  
-       ----------------------
-       -- Is_Bridge_Target --
-       ----------------------
- 
-       function Is_Bridge_Target (Id : Entity_Id) return Boolean is
-       begin
-          return
-            Is_Accept_Alternative_Proc (Id)
-              or else Is_Finalizer_Proc (Id)
-              or else Is_Partial_Invariant_Proc (Id)
-              or else Is_Postconditions_Proc (Id)
-              or else Is_TSS (Id, TSS_Deep_Adjust)
-              or else Is_TSS (Id, TSS_Deep_Finalize)
-              or else Is_TSS (Id, TSS_Deep_Initialize);
-       end Is_Bridge_Target;
- 
        ---------------------------
        -- Is_Default_Expression --
        ---------------------------
--- 3528,3533 ----
*************** package body Sem_Elab is
*** 2021,2027 ****
                                    N_Procedure_Call_Statement)
             and then Comes_From_Source (Outer_Call)
           then
!             Outer_Nam := Extract_Call_Name (Outer_Call);
  
              return
                Is_Entity_Name (Outer_Nam)
--- 3545,3551 ----
                                    N_Procedure_Call_Statement)
             and then Comes_From_Source (Outer_Call)
           then
!             Outer_Nam := Call_Name (Outer_Call);
  
              return
                Is_Entity_Name (Outer_Nam)
*************** package body Sem_Elab is
*** 2056,2066 ****
  
        --  Local variables
  
!       Call_Attrs   : Call_Attributes;
!       Call_Nam     : Node_Id;
!       Marker       : Node_Id;
!       Target_Attrs : Target_Attributes;
!       Target_Id    : Entity_Id;
  
     --  Start of processing for Build_Call_Marker
  
--- 3580,3588 ----
  
        --  Local variables
  
!       Call_Nam : Node_Id;
!       Marker   : Node_Id;
!       Subp_Id  : Entity_Id;
  
     --  Start of processing for Build_Call_Marker
  
*************** package body Sem_Elab is
*** 2084,2089 ****
--- 3606,3617 ----
        elsif Preanalysis_Active then
           return;
  
+       --  Nothing to do when the elaboration phase of the compiler is not
+       --  active.
+ 
+       elsif not Elaboration_Phase_Active then
+          return;
+ 
        --  Nothing to do when the input does not denote a call or a requeue
  
        elsif not Nkind_In (N, N_Entry_Call_Statement,
*************** package body Sem_Elab is
*** 2101,2109 ****
          and then Nkind_In (N, N_Entry_Call_Statement, N_Requeue_Statement)
        then
           return;
        end if;
  
!       Call_Nam := Extract_Call_Name (N);
  
        --  Nothing to do when the call is erroneous or left in a bad state
  
--- 3629,3644 ----
          and then Nkind_In (N, N_Entry_Call_Statement, N_Requeue_Statement)
        then
           return;
+ 
+       --  Nothing to do when the call is analyzed/resolved too early within an
+       --  intermediate context. This check is saved for last because it incurs
+       --  a performance penalty.
+ 
+       elsif In_Premature_Context (N) then
+          return;
        end if;
  
!       Call_Nam := Call_Name (N);
  
        --  Nothing to do when the call is erroneous or left in a bad state
  
*************** package body Sem_Elab is
*** 2112,2117 ****
--- 3647,3655 ----
                 and then Is_Subprogram_Or_Entry (Entity (Call_Nam)))
        then
           return;
+       end if;
+ 
+       Subp_Id := Canonical_Subprogram (Entity (Call_Nam));
  
        --  Nothing to do when the call invokes a generic formal subprogram and
        --  switch -gnatd.G (ignore calls through generic formal parameters for
*************** package body Sem_Elab is
*** 2119,2162 ****
        --  direct target of the call to avoid the side effects of mapping
        --  actuals to formals using renamings.
  
!       elsif Debug_Flag_Dot_GG
          and then Is_Generic_Formal_Subp (Entity (Call_Nam))
        then
           return;
  
-       --  Nothing to do when the call is analyzed/resolved too early within an
-       --  intermediate context. This check is saved for last because it incurs
-       --  a performance penalty.
- 
-       --  Performance note: parent traversal
- 
-       elsif In_Premature_Context (N) then
-          return;
-       end if;
- 
-       Extract_Call_Attributes
-         (Call      => N,
-          Target_Id => Target_Id,
-          Attrs     => Call_Attrs);
- 
-       Extract_Target_Attributes
-         (Target_Id => Target_Id,
-          Attrs     => Target_Attrs);
- 
        --  Nothing to do when the call appears within the expanded spec or
        --  body of an instantiated generic, the call does not invoke a generic
        --  formal subprogram, the target is external to the instance, and switch
        --  -gnatdL (ignore external calls from instances for elaboration) is in
!       --  effect.
  
!       if Debug_Flag_LL
          and then not Is_Generic_Formal_Subp (Entity (Call_Nam))
- 
-         --  Performance note: parent traversal
- 
          and then In_External_Context
!                    (Call         => N,
!                     Target_Attrs => Target_Attrs)
        then
           return;
  
--- 3657,3680 ----
        --  direct target of the call to avoid the side effects of mapping
        --  actuals to formals using renamings.
  
!       if Debug_Flag_Dot_GG
          and then Is_Generic_Formal_Subp (Entity (Call_Nam))
        then
           return;
  
        --  Nothing to do when the call appears within the expanded spec or
        --  body of an instantiated generic, the call does not invoke a generic
        --  formal subprogram, the target is external to the instance, and switch
        --  -gnatdL (ignore external calls from instances for elaboration) is in
!       --  effect. This check must be performed with the direct target of the
!       --  call to avoid the side effects of mapping actuals to formals using
!       --  renamings.
  
!       elsif Debug_Flag_LL
          and then not Is_Generic_Formal_Subp (Entity (Call_Nam))
          and then In_External_Context
!                    (Call    => N,
!                     Subp_Id => Subp_Id)
        then
           return;
  
*************** package body Sem_Elab is
*** 2165,2184 ****
        --  in effect.
  
        elsif Debug_Flag_Underscore_P
!         and then Is_Assertion_Pragma_Target (Target_Id)
        then
           return;
  
        --  Source calls to source targets are always considered because they
        --  reflect the original call graph.
  
!       elsif Target_Attrs.From_Source and then Call_Attrs.From_Source then
           null;
  
        --  A call to a source function which acts as the default expression in
        --  another call requires special detection.
  
!       elsif Target_Attrs.From_Source
          and then Nkind (N) = N_Function_Call
          and then Is_Default_Expression (N)
        then
--- 3683,3702 ----
        --  in effect.
  
        elsif Debug_Flag_Underscore_P
!         and then Is_Assertion_Pragma_Target (Subp_Id)
        then
           return;
  
        --  Source calls to source targets are always considered because they
        --  reflect the original call graph.
  
!       elsif Comes_From_Source (N) and then Comes_From_Source (Subp_Id) then
           null;
  
        --  A call to a source function which acts as the default expression in
        --  another call requires special detection.
  
!       elsif Comes_From_Source (Subp_Id)
          and then Nkind (N) = N_Function_Call
          and then Is_Default_Expression (N)
        then
*************** package body Sem_Elab is
*** 2186,2202 ****
  
        --  The target emulates Ada semantics
  
!       elsif Is_Ada_Semantic_Target (Target_Id) then
           null;
  
        --  The target acts as a link between scenarios
  
!       elsif Is_Bridge_Target (Target_Id) then
           null;
  
        --  The target emulates SPARK semantics
  
!       elsif Is_SPARK_Semantic_Target (Target_Id) then
           null;
  
        --  Otherwise the call is not suitable for ABE processing. This prevents
--- 3704,3720 ----
  
        --  The target emulates Ada semantics
  
!       elsif Is_Ada_Semantic_Target (Subp_Id) then
           null;
  
        --  The target acts as a link between scenarios
  
!       elsif Is_Bridge_Target (Subp_Id) then
           null;
  
        --  The target emulates SPARK semantics
  
!       elsif Is_SPARK_Semantic_Target (Subp_Id) then
           null;
  
        --  Otherwise the call is not suitable for ABE processing. This prevents
*************** package body Sem_Elab is
*** 2215,2230 ****
  
        --  Inherit the attributes of the original call
  
!       Set_Target                    (Marker, Target_Id);
!       Set_Is_Declaration_Level_Node (Marker, Call_Attrs.In_Declarations);
!       Set_Is_Dispatching_Call       (Marker, Call_Attrs.Is_Dispatching);
        Set_Is_Elaboration_Checks_OK_Node
!                                     (Marker, Call_Attrs.Elab_Checks_OK);
        Set_Is_Elaboration_Warnings_OK_Node
!                                     (Marker, Call_Attrs.Elab_Warnings_OK);
!       Set_Is_Ignored_Ghost_Node     (Marker, Call_Attrs.Ghost_Mode_Ignore);
!       Set_Is_Source_Call            (Marker, Call_Attrs.From_Source);
!       Set_Is_SPARK_Mode_On_Node     (Marker, Call_Attrs.SPARK_Mode_On);
  
        --  The marker is inserted prior to the original call. This placement has
        --  several desirable effects:
--- 3733,3755 ----
  
        --  Inherit the attributes of the original call
  
!       Set_Is_Declaration_Level_Node
!         (Marker, Find_Enclosing_Level (N) = Declaration_Level);
! 
!       Set_Is_Dispatching_Call
!         (Marker, Nkind_In (N, N_Function_Call, N_Procedure_Call_Statement)
!                    and then Present (Controlling_Argument (N)));
! 
        Set_Is_Elaboration_Checks_OK_Node
!         (Marker, Is_Elaboration_Checks_OK_Node (N));
! 
        Set_Is_Elaboration_Warnings_OK_Node
!         (Marker, Is_Elaboration_Warnings_OK_Node (N));
! 
!       Set_Is_Ignored_Ghost_Node (Marker, Is_Ignored_Ghost_Node (N));
!       Set_Is_Source_Call        (Marker, Comes_From_Source (N));
!       Set_Is_SPARK_Mode_On_Node (Marker, Is_SPARK_Mode_On_Node (N));
!       Set_Target                (Marker, Subp_Id);
  
        --  The marker is inserted prior to the original call. This placement has
        --  several desirable effects:
*************** package body Sem_Elab is
*** 2274,2296 ****
        Read  : Boolean;
        Write : Boolean)
     is
!       Marker    : Node_Id;
!       Var_Attrs : Variable_Attributes;
!       Var_Id    : Entity_Id;
  
     begin
!       Extract_Variable_Reference_Attributes
!         (Ref    => N,
!          Var_Id => Var_Id,
!          Attrs  => Var_Attrs);
  
        Marker := Make_Variable_Reference_Marker (Sloc (N));
  
        --  Inherit the attributes of the original variable reference
  
!       Set_Target   (Marker, Var_Id);
!       Set_Is_Read  (Marker, Read);
!       Set_Is_Write (Marker, Write);
  
        --  The marker is inserted prior to the original variable reference. The
        --  insertion must take place even when the reference does not occur in
--- 3799,3855 ----
        Read  : Boolean;
        Write : Boolean)
     is
!       function Ultimate_Variable (Var_Id : Entity_Id) return Entity_Id;
!       pragma Inline (Ultimate_Variable);
!       --  Obtain the ultimate renamed variable of variable Var_Id
! 
!       -----------------------
!       -- Ultimate_Variable --
!       -----------------------
! 
!       function Ultimate_Variable (Var_Id : Entity_Id) return Entity_Id is
!          Ren_Id : Entity_Id;
! 
!       begin
!          Ren_Id := Var_Id;
!          while Present (Renamed_Entity (Ren_Id))
!            and then Nkind (Renamed_Entity (Ren_Id)) in N_Entity
!          loop
!             Ren_Id := Renamed_Entity (Ren_Id);
!          end loop;
! 
!          return Ren_Id;
!       end Ultimate_Variable;
! 
!       --  Local variables
! 
!       Var_Id : constant Entity_Id := Ultimate_Variable (Entity (N));
!       Marker : Node_Id;
! 
!    --  Start of processing for Build_Variable_Reference_Marker
  
     begin
!       --  Nothing to do when the elaboration phase of the compiler is not
!       --  active.
! 
!       if not Elaboration_Phase_Active then
!          return;
!       end if;
  
        Marker := Make_Variable_Reference_Marker (Sloc (N));
  
        --  Inherit the attributes of the original variable reference
  
!       Set_Is_Elaboration_Checks_OK_Node
!         (Marker, Is_Elaboration_Checks_OK_Node (N));
! 
!       Set_Is_Elaboration_Warnings_OK_Node
!         (Marker, Is_Elaboration_Warnings_OK_Node (N));
! 
!       Set_Is_Read               (Marker, Read);
!       Set_Is_SPARK_Mode_On_Node (Marker, Is_SPARK_Mode_On_Node (N));
!       Set_Is_Write              (Marker, Write);
!       Set_Target                (Marker, Var_Id);
  
        --  The marker is inserted prior to the original variable reference. The
        --  insertion must take place even when the reference does not occur in
*************** package body Sem_Elab is
*** 2306,2328 ****
--- 3865,3954 ----
        Record_Elaboration_Scenario (Marker);
     end Build_Variable_Reference_Marker;
  
+    ---------------
+    -- Call_Name --
+    ---------------
+ 
+    function Call_Name (Call : Node_Id) return Node_Id is
+       Nam : Node_Id;
+ 
+    begin
+       Nam := Name (Call);
+ 
+       --  When the call invokes an entry family, the name appears as an indexed
+       --  component.
+ 
+       if Nkind (Nam) = N_Indexed_Component then
+          Nam := Prefix (Nam);
+       end if;
+ 
+       --  When the call employs the object.operation form, the name appears as
+       --  a selected component.
+ 
+       if Nkind (Nam) = N_Selected_Component then
+          Nam := Selector_Name (Nam);
+       end if;
+ 
+       return Nam;
+    end Call_Name;
+ 
+    --------------------------
+    -- Canonical_Subprogram --
+    --------------------------
+ 
+    function Canonical_Subprogram (Subp_Id : Entity_Id) return Entity_Id is
+       Canon_Id : Entity_Id;
+ 
+    begin
+       Canon_Id := Subp_Id;
+ 
+       --  Use the original protected subprogram when dealing with one of the
+       --  specialized lock-manipulating versions.
+ 
+       if Is_Protected_Body_Subp (Canon_Id) then
+          Canon_Id := Protected_Subprogram (Canon_Id);
+       end if;
+ 
+       --  Obtain the original subprogram except when the subprogram is also
+       --  an instantiation. In this case the alias is the internally generated
+       --  subprogram which appears within the anonymous package created for the
+       --  instantiation, making it unuitable.
+ 
+       if not Is_Generic_Instance (Canon_Id) then
+          Canon_Id := Get_Renamed_Entity (Canon_Id);
+       end if;
+ 
+       return Canon_Id;
+    end Canonical_Subprogram;
+ 
     ---------------------------------
     -- Check_Elaboration_Scenarios --
     ---------------------------------
  
     procedure Check_Elaboration_Scenarios is
+       Iter : NE_Set.Iterator;
+ 
     begin
        --  Nothing to do when switch -gnatH (legacy elaboration checking mode
        --  enabled) is in effect because the legacy ABE mechanism does not need
        --  to carry out this action.
  
        if Legacy_Elaboration_Checks then
+          Finalize_All_Data_Structures;
           return;
  
        --  Nothing to do for ASIS because ABE checks and diagnostics are not
        --  performed in this mode.
  
        elsif ASIS_Mode then
+          Finalize_All_Data_Structures;
+          return;
+ 
+       --  Nothing to do when the elaboration phase of the compiler is not
+       --  active.
+ 
+       elsif not Elaboration_Phase_Active then
+          Finalize_All_Data_Structures;
           return;
        end if;
  
*************** package body Sem_Elab is
*** 2331,5331 ****
        --  Elaboration_Checks which appears on the initial declaration of the
        --  main unit.
  
!       Install_Elaboration_Model (Unit_Entity (Cunit_Entity (Main_Unit)));
  
        --  Examine the context of the main unit and record all units with prior
        --  elaboration with respect to it.
  
!       Find_Elaborated_Units;
  
!       --  Examine each top-level scenario saved during the Recording phase for
!       --  conditional ABEs and perform various actions depending on the model
!       --  in effect. The table of visited bodies is created for each new top-
!       --  level scenario.
  
!       for Index in Top_Level_Scenarios.First .. Top_Level_Scenarios.Last loop
!          Reset_Visited_Bodies;
  
!          Process_Conditional_ABE (Top_Level_Scenarios.Table (Index));
!       end loop;
  
        --  Examine each SPARK scenario saved during the Recording phase which
        --  is not necessarily executable during elaboration, but still requires
        --  elaboration-related checks.
  
!       for Index in SPARK_Scenarios.First .. SPARK_Scenarios.Last loop
!          Check_SPARK_Scenario (SPARK_Scenarios.Table (Index));
!       end loop;
     end Check_Elaboration_Scenarios;
  
!    ------------------------------
!    -- Check_Preelaborated_Call --
!    ------------------------------
  
!    procedure Check_Preelaborated_Call (Call : Node_Id) is
!       function In_Preelaborated_Context (N : Node_Id) return Boolean;
!       --  Determine whether arbitrary node appears in a preelaborated context
  
!       ------------------------------
!       -- In_Preelaborated_Context --
!       ------------------------------
  
!       function In_Preelaborated_Context (N : Node_Id) return Boolean is
!          Body_Id : constant Entity_Id := Find_Code_Unit (N);
!          Spec_Id : constant Entity_Id := Unique_Entity (Body_Id);
  
        begin
!          --  The node appears within a package body whose corresponding spec is
!          --  subject to pragma Remote_Call_Interface or Remote_Types. This does
!          --  not result in a preelaborated context because the package body may
!          --  be on another machine.
  
!          if Ekind (Body_Id) = E_Package_Body
!            and then Ekind_In (Spec_Id, E_Generic_Package, E_Package)
!            and then (Is_Remote_Call_Interface (Spec_Id)
!                       or else Is_Remote_Types (Spec_Id))
!          then
              return False;
  
!          --  Otherwise the node appears within a preelaborated context when the
!          --  associated unit is preelaborated.
  
!          else
!             return Is_Preelaborated_Unit (Spec_Id);
           end if;
-       end In_Preelaborated_Context;
  
!       --  Local variables
  
!       Call_Attrs : Call_Attributes;
!       Level      : Enclosing_Level_Kind;
!       Target_Id  : Entity_Id;
  
!    --  Start of processing for Check_Preelaborated_Call
  
!    begin
!       Extract_Call_Attributes
!         (Call      => Call,
!          Target_Id => Target_Id,
!          Attrs     => Call_Attrs);
  
!       --  Nothing to do when the call is internally generated because it is
!       --  assumed that it will never violate preelaboration.
  
!       if not Call_Attrs.From_Source then
!          return;
!       end if;
  
!       --  Performance note: parent traversal
  
!       Level := Find_Enclosing_Level (Call);
  
!       --  Library-level calls are always considered because they are part of
!       --  the associated unit's elaboration actions.
  
!       if Level in Library_Level then
!          null;
  
!       --  Calls at the library level of a generic package body must be checked
!       --  because they would render an instantiation illegal if the template is
!       --  marked as preelaborated. Note that this does not apply to calls at
!       --  the library level of a generic package spec.
  
!       elsif Level = Generic_Package_Body then
!          null;
  
!       --  Otherwise the call does not appear at the proper level and must not
!       --  be considered for this check.
  
!       else
!          return;
!       end if;
  
!       --  The call appears within a preelaborated unit. Emit a warning only for
!       --  internal uses, otherwise this is an error.
  
!       if In_Preelaborated_Context (Call) then
!          Error_Msg_Warn := GNAT_Mode;
!          Error_Msg_N
!            ("<<non-static call not allowed in preelaborated unit", Call);
!       end if;
!    end Check_Preelaborated_Call;
  
!    ------------------------------
!    -- Check_SPARK_Derived_Type --
!    ------------------------------
  
!    procedure Check_SPARK_Derived_Type (Typ_Decl : Node_Id) is
!       Typ : constant Entity_Id := Defining_Entity (Typ_Decl);
  
!       --  NOTE: The routines within Check_SPARK_Derived_Type are intentionally
!       --  unnested to avoid deep indentation of code.
  
!       Stop_Check : exception;
!       --  This exception is raised when the freeze node violates the placement
!       --  rules.
  
!       procedure Check_Overriding_Primitive
!         (Prim  : Entity_Id;
!          FNode : Node_Id);
!       pragma Inline (Check_Overriding_Primitive);
!       --  Verify that freeze node FNode is within the early call region of
!       --  overriding primitive Prim's body.
  
!       function Freeze_Node_Location (FNode : Node_Id) return Source_Ptr;
!       pragma Inline (Freeze_Node_Location);
!       --  Return a more accurate source location associated with freeze node
!       --  FNode.
  
!       function Precedes_Source_Construct (N : Node_Id) return Boolean;
!       pragma Inline (Precedes_Source_Construct);
!       --  Determine whether arbitrary node N appears prior to some source
!       --  construct.
  
!       procedure Suggest_Elaborate_Body
!         (N         : Node_Id;
!          Body_Decl : Node_Id;
!          Error_Nod : Node_Id);
!       pragma Inline (Suggest_Elaborate_Body);
!       --  Suggest the use of pragma Elaborate_Body when the pragma will allow
!       --  for node N to appear within the early call region of subprogram body
!       --  Body_Decl. The suggestion is attached to Error_Nod as a continuation
!       --  error.
  
        --------------------------------
!       -- Check_Overriding_Primitive --
        --------------------------------
  
!       procedure Check_Overriding_Primitive
!         (Prim  : Entity_Id;
!          FNode : Node_Id)
        is
-          Prim_Decl : constant Node_Id := Unit_Declaration_Node (Prim);
-          Body_Decl : Node_Id;
-          Body_Id   : Entity_Id;
-          Region    : Node_Id;
- 
        begin
!          --  Nothing to do for predefined primitives because they are artifacts
!          --  of tagged type expansion and cannot override source primitives.
  
!          if Is_Predefined_Dispatching_Operation (Prim) then
              return;
           end if;
  
!          Body_Id := Corresponding_Body (Prim_Decl);
  
!          --  Nothing to do when the primitive does not have a corresponding
!          --  body. This can happen when the unit with the bodies is not the
!          --  main unit subjected to ABE checks.
  
!          if No (Body_Id) then
              return;
  
!          --  The primitive overrides a parent or progenitor primitive
  
!          elsif Present (Overridden_Operation (Prim)) then
  
!             --  Nothing to do when overriding an interface primitive happens by
!             --  inheriting a non-interface primitive as the check would be done
!             --  on the parent primitive.
  
!             if Present (Alias (Prim)) then
!                return;
!             end if;
  
!          --  Nothing to do when the primitive is not overriding. The body of
!          --  such a primitive cannot be targeted by a dispatching call which
!          --  is executable during elaboration, and cannot cause an ABE.
  
!          else
!             return;
!          end if;
  
!          Body_Decl := Unit_Declaration_Node (Body_Id);
!          Region    := Find_Early_Call_Region (Body_Decl);
  
!          --  The freeze node appears prior to the early call region of the
!          --  primitive body.
  
!          --  IMPORTANT: This check must always be performed even when -gnatd.v
!          --  (enforce SPARK elaboration rules in SPARK code) is not specified
!          --  because the static model cannot guarantee the absence of ABEs in
!          --  in the presence of dispatching calls.
  
!          if Earlier_In_Extended_Unit (FNode, Region) then
!             Error_Msg_Node_2 := Prim;
!             Error_Msg_NE
!               ("first freezing point of type & must appear within early call "
!                & "region of primitive body & (SPARK RM 7.7(8))",
!                Typ_Decl, Typ);
  
!             Error_Msg_Sloc := Sloc (Region);
!             Error_Msg_N ("\region starts #", Typ_Decl);
  
!             Error_Msg_Sloc := Sloc (Body_Decl);
!             Error_Msg_N ("\region ends #", Typ_Decl);
  
!             Error_Msg_Sloc := Freeze_Node_Location (FNode);
!             Error_Msg_N ("\first freezing point #", Typ_Decl);
  
!             --  If applicable, suggest the use of pragma Elaborate_Body in the
!             --  associated package spec.
  
!             Suggest_Elaborate_Body
!               (N         => FNode,
!                Body_Decl => Body_Decl,
!                Error_Nod => Typ_Decl);
  
!             raise Stop_Check;
!          end if;
!       end Check_Overriding_Primitive;
  
!       --------------------------
!       -- Freeze_Node_Location --
!       --------------------------
  
!       function Freeze_Node_Location (FNode : Node_Id) return Source_Ptr is
!          Context : constant Node_Id    := Parent (FNode);
!          Loc     : constant Source_Ptr := Sloc (FNode);
  
!          Prv_Decls : List_Id;
!          Vis_Decls : List_Id;
  
!       begin
!          --  In general, the source location of the freeze node is as close as
!          --  possible to the real freeze point, except when the freeze node is
!          --  at the "bottom" of a package spec.
  
!          if Nkind (Context) = N_Package_Specification then
!             Prv_Decls := Private_Declarations (Context);
!             Vis_Decls := Visible_Declarations (Context);
  
!             --  The freeze node appears in the private declarations of the
!             --  package.
  
!             if Present (Prv_Decls)
!               and then List_Containing (FNode) = Prv_Decls
!             then
!                null;
  
!             --  The freeze node appears in the visible declarations of the
!             --  package and there are no private declarations.
  
!             elsif Present (Vis_Decls)
!               and then List_Containing (FNode) = Vis_Decls
!               and then (No (Prv_Decls) or else Is_Empty_List (Prv_Decls))
!             then
!                null;
  
!             --  Otherwise the freeze node is not in the "last" declarative list
!             --  of the package. Use the existing source location of the freeze
!             --  node.
  
!             else
!                return Loc;
!             end if;
  
!             --  The freeze node appears at the "bottom" of the package when it
!             --  is in the "last" declarative list and is either the last in the
!             --  list or is followed by internal constructs only. In that case
!             --  the more appropriate source location is that of the package end
!             --  label.
  
!             if not Precedes_Source_Construct (FNode) then
!                return Sloc (End_Label (Context));
!             end if;
           end if;
  
!          return Loc;
!       end Freeze_Node_Location;
  
!       -------------------------------
!       -- Precedes_Source_Construct --
!       -------------------------------
  
!       function Precedes_Source_Construct (N : Node_Id) return Boolean is
!          Decl : Node_Id;
  
        begin
!          Decl := Next (N);
!          while Present (Decl) loop
!             if Comes_From_Source (Decl) then
!                return True;
  
!             --  A generated body for a source expression function is treated as
!             --  a source construct.
  
!             elsif Nkind (Decl) = N_Subprogram_Body
!               and then Was_Expression_Function (Decl)
!               and then Comes_From_Source (Original_Node (Decl))
!             then
!                return True;
!             end if;
  
!             Next (Decl);
!          end loop;
  
!          return False;
!       end Precedes_Source_Construct;
  
        ----------------------------
!       -- Suggest_Elaborate_Body --
        ----------------------------
  
!       procedure Suggest_Elaborate_Body
!         (N         : Node_Id;
!          Body_Decl : Node_Id;
!          Error_Nod : Node_Id)
        is
!          Unt    : constant Node_Id := Unit (Cunit (Main_Unit));
!          Region : Node_Id;
  
        begin
!          --  The suggestion applies only when the subprogram body resides in a
!          --  compilation package body, and a pragma Elaborate_Body would allow
!          --  for the node to appear in the early call region of the subprogram
!          --  body. This implies that all code from the subprogram body up to
!          --  the node is preelaborable.
  
!          if Nkind (Unt) = N_Package_Body then
  
!             --  Find the start of the early call region again assuming that the
!             --  package spec has pragma Elaborate_Body. Note that the internal
!             --  data structures are intentionally not updated because this is a
!             --  speculative search.
  
!             Region :=
!               Find_Early_Call_Region
!                 (Body_Decl        => Body_Decl,
!                  Assume_Elab_Body => True,
!                  Skip_Memoization => True);
  
!             --  If the node appears within the early call region, assuming that
!             --  the package spec carries pragma Elaborate_Body, then it is safe
!             --  to suggest the pragma.
  
!             if Earlier_In_Extended_Unit (Region, N) then
!                Error_Msg_Name_1 := Name_Elaborate_Body;
!                Error_Msg_NE
!                  ("\consider adding pragma % in spec of unit &",
!                   Error_Nod, Defining_Entity (Unt));
!             end if;
!          end if;
!       end Suggest_Elaborate_Body;
  
!       --  Local variables
  
!       FNode : constant Node_Id  := Freeze_Node (Typ);
!       Prims : constant Elist_Id := Direct_Primitive_Operations (Typ);
  
!       Prim_Elmt : Elmt_Id;
  
!    --  Start of processing for Check_SPARK_Derived_Type
  
!    begin
!       --  A type should have its freeze node set by the time SPARK scenarios
!       --  are being verified.
  
!       pragma Assert (Present (FNode));
  
!       --  Verify that the freeze node of the derived type is within the early
!       --  call region of each overriding primitive body (SPARK RM 7.7(8)).
  
!       if Present (Prims) then
!          Prim_Elmt := First_Elmt (Prims);
!          while Present (Prim_Elmt) loop
!             Check_Overriding_Primitive
!               (Prim  => Node (Prim_Elmt),
!                FNode => FNode);
  
!             Next_Elmt (Prim_Elmt);
!          end loop;
!       end if;
  
!    exception
!       when Stop_Check =>
!          null;
!    end Check_SPARK_Derived_Type;
  
!    -------------------------------
!    -- Check_SPARK_Instantiation --
!    -------------------------------
  
!    procedure Check_SPARK_Instantiation (Exp_Inst : Node_Id) is
!       Gen_Attrs  : Target_Attributes;
!       Gen_Id     : Entity_Id;
!       Inst       : Node_Id;
!       Inst_Attrs : Instantiation_Attributes;
!       Inst_Id    : Entity_Id;
  
     begin
!       Extract_Instantiation_Attributes
!         (Exp_Inst => Exp_Inst,
!          Inst     => Inst,
!          Inst_Id  => Inst_Id,
!          Gen_Id   => Gen_Id,
!          Attrs    => Inst_Attrs);
  
!       Extract_Target_Attributes (Gen_Id, Gen_Attrs);
  
!       --  The instantiation and the generic body are both in the main unit
  
!       if Present (Gen_Attrs.Body_Decl)
!         and then In_Extended_Main_Code_Unit (Gen_Attrs.Body_Decl)
  
!         --  If the instantiation appears prior to the generic body, then the
!         --  instantiation is illegal (SPARK RM 7.7(6)).
  
!         --  IMPORTANT: This check must always be performed even when -gnatd.v
!         --  (enforce SPARK elaboration rules in SPARK code) is not specified
!         --  because the rule prevents use-before-declaration of objects that
!         --  may precede the generic body.
  
!         and then Earlier_In_Extended_Unit (Inst, Gen_Attrs.Body_Decl)
        then
!          Error_Msg_NE ("cannot instantiate & before body seen", Inst, Gen_Id);
        end if;
-    end Check_SPARK_Instantiation;
  
!    ---------------------------------
!    -- Check_SPARK_Model_In_Effect --
!    ---------------------------------
  
!    SPARK_Model_Warning_Posted : Boolean := False;
!    --  This flag prevents the same SPARK model-related warning from being
!    --  emitted multiple times.
  
!    procedure Check_SPARK_Model_In_Effect (N : Node_Id) is
!    begin
!       --  Do not emit the warning multiple times as this creates useless noise
  
!       if SPARK_Model_Warning_Posted then
!          null;
  
!       --  SPARK rule verification requires the "strict" static model
  
!       elsif Static_Elaboration_Checks and not Relaxed_Elaboration_Checks then
!          null;
  
!       --  Any other combination of models does not guarantee the absence of ABE
!       --  problems for SPARK rule verification purposes. Note that there is no
!       --  need to check for the legacy ABE mechanism because the legacy code
!       --  has its own orthogonal processing for SPARK rules.
  
!       else
!          SPARK_Model_Warning_Posted := True;
  
!          Error_Msg_N
!            ("??SPARK elaboration checks require static elaboration model", N);
  
!          if Dynamic_Elaboration_Checks then
!             Error_Msg_N ("\dynamic elaboration model is in effect", N);
!          else
!             pragma Assert (Relaxed_Elaboration_Checks);
!             Error_Msg_N ("\relaxed elaboration model is in effect", N);
!          end if;
!       end if;
!    end Check_SPARK_Model_In_Effect;
  
!    --------------------------
!    -- Check_SPARK_Scenario --
!    --------------------------
  
!    procedure Check_SPARK_Scenario (N : Node_Id) is
!    begin
!       --  Ensure that a suitable elaboration model is in effect for SPARK rule
!       --  verification.
  
!       Check_SPARK_Model_In_Effect (N);
  
!       --  Add the current scenario to the stack of active scenarios
  
!       Push_Active_Scenario (N);
  
!       if Is_Suitable_SPARK_Derived_Type (N) then
!          Check_SPARK_Derived_Type (N);
  
!       elsif Is_Suitable_SPARK_Instantiation (N) then
!          Check_SPARK_Instantiation (N);
  
!       elsif Is_Suitable_SPARK_Refined_State_Pragma (N) then
!          Check_SPARK_Refined_State_Pragma (N);
!       end if;
  
!       --  Remove the current scenario from the stack of active scenarios once
!       --  all ABE diagnostics and checks have been performed.
  
!       Pop_Active_Scenario (N);
!    end Check_SPARK_Scenario;
  
!    --------------------------------------
!    -- Check_SPARK_Refined_State_Pragma --
!    --------------------------------------
  
!    procedure Check_SPARK_Refined_State_Pragma (N : Node_Id) is
  
!       --  NOTE: The routines within Check_SPARK_Refined_State_Pragma are
!       --  intentionally unnested to avoid deep indentation of code.
  
!       procedure Check_SPARK_Constituent (Constit_Id : Entity_Id);
!       pragma Inline (Check_SPARK_Constituent);
!       --  Ensure that a single constituent Constit_Id is elaborated prior to
!       --  the main unit.
  
!       procedure Check_SPARK_Constituents (Constits : Elist_Id);
!       pragma Inline (Check_SPARK_Constituents);
!       --  Ensure that all constituents found in list Constits are elaborated
!       --  prior to the main unit.
  
!       procedure Check_SPARK_Initialized_State (State : Node_Id);
!       pragma Inline (Check_SPARK_Initialized_State);
!       --  Ensure that the constituents of single abstract state State are
!       --  elaborated prior to the main unit.
  
!       procedure Check_SPARK_Initialized_States (Pack_Id : Entity_Id);
!       pragma Inline (Check_SPARK_Initialized_States);
!       --  Ensure that the constituents of all abstract states which appear in
!       --  the Initializes pragma of package Pack_Id are elaborated prior to the
!       --  main unit.
  
        -----------------------------
!       -- Check_SPARK_Constituent --
        -----------------------------
  
!       procedure Check_SPARK_Constituent (Constit_Id : Entity_Id) is
!          Prag : Node_Id;
  
        begin
!          --  Nothing to do for "null" constituents
  
!          if Nkind (Constit_Id) = N_Null then
!             return;
  
!          --  Nothing to do for illegal constituents
  
!          elsif Error_Posted (Constit_Id) then
!             return;
!          end if;
  
!          Prag := SPARK_Pragma (Constit_Id);
  
!          --  The check applies only when the constituent is subject to pragma
!          --  SPARK_Mode On.
  
!          if Present (Prag)
!            and then Get_SPARK_Mode_From_Annotation (Prag) = On
!          then
!             --  An external constituent of an abstract state which appears in
!             --  the Initializes pragma of a package spec imposes an Elaborate
!             --  requirement on the context of the main unit. Determine whether
!             --  the context has a pragma strong enough to meet the requirement.
  
!             --  IMPORTANT: This check is performed only when -gnatd.v (enforce
!             --  SPARK elaboration rules in SPARK code) is in effect because the
!             --  static model can ensure the prior elaboration of the unit which
!             --  contains a constituent by installing implicit Elaborate pragma.
  
!             if Debug_Flag_Dot_V then
!                Meet_Elaboration_Requirement
!                  (N         => N,
!                   Target_Id => Constit_Id,
!                   Req_Nam   => Name_Elaborate);
  
!             --  Otherwise ensure that the unit with the external constituent is
!             --  elaborated prior to the main unit.
  
!             else
!                Ensure_Prior_Elaboration
!                  (N        => N,
!                   Unit_Id  => Find_Top_Unit (Constit_Id),
!                   Prag_Nam => Name_Elaborate,
!                   State    => Initial_State);
              end if;
-          end if;
-       end Check_SPARK_Constituent;
  
!       ------------------------------
!       -- Check_SPARK_Constituents --
!       ------------------------------
  
!       procedure Check_SPARK_Constituents (Constits : Elist_Id) is
!          Constit_Elmt : Elmt_Id;
  
!       begin
!          if Present (Constits) then
!             Constit_Elmt := First_Elmt (Constits);
!             while Present (Constit_Elmt) loop
!                Check_SPARK_Constituent (Node (Constit_Elmt));
!                Next_Elmt (Constit_Elmt);
!             end loop;
           end if;
-       end Check_SPARK_Constituents;
  
!       -----------------------------------
!       -- Check_SPARK_Initialized_State --
!       -----------------------------------
  
!       procedure Check_SPARK_Initialized_State (State : Node_Id) is
!          Prag     : Node_Id;
!          State_Id : Entity_Id;
  
!       begin
!          --  Nothing to do for "null" initialization items
  
!          if Nkind (State) = N_Null then
!             return;
  
!          --  Nothing to do for illegal states
  
!          elsif Error_Posted (State) then
!             return;
!          end if;
  
!          State_Id := Entity_Of (State);
  
!          --  Sanitize the state
  
!          if No (State_Id) then
!             return;
  
!          elsif Error_Posted (State_Id) then
!             return;
  
!          elsif Ekind (State_Id) /= E_Abstract_State then
!             return;
!          end if;
  
!          --  The check is performed only when the abstract state is subject to
!          --  SPARK_Mode On.
  
!          Prag := SPARK_Pragma (State_Id);
  
!          if Present (Prag)
!            and then Get_SPARK_Mode_From_Annotation (Prag) = On
           then
!             Check_SPARK_Constituents (Refinement_Constituents (State_Id));
           end if;
-       end Check_SPARK_Initialized_State;
  
!       ------------------------------------
!       -- Check_SPARK_Initialized_States --
!       ------------------------------------
  
!       procedure Check_SPARK_Initialized_States (Pack_Id : Entity_Id) is
!          Prag  : constant Node_Id := Get_Pragma (Pack_Id, Pragma_Initializes);
!          Init  : Node_Id;
!          Inits : Node_Id;
  
!       begin
!          if Present (Prag) then
!             Inits := Expression (Get_Argument (Prag, Pack_Id));
  
!             --  Avoid processing a "null" initialization list. The only other
!             --  alternative is an aggregate.
  
!             if Nkind (Inits) = N_Aggregate then
  
!                --  The initialization items appear in list form:
!                --
!                --    (state1, state2)
  
!                if Present (Expressions (Inits)) then
!                   Init := First (Expressions (Inits));
!                   while Present (Init) loop
!                      Check_SPARK_Initialized_State (Init);
!                      Next (Init);
!                   end loop;
!                end if;
  
!                --  The initialization items appear in associated form:
!                --
!                --    (state1 => item1,
!                --     state2 => (item2, item3))
  
!                if Present (Component_Associations (Inits)) then
!                   Init := First (Component_Associations (Inits));
!                   while Present (Init) loop
!                      Check_SPARK_Initialized_State (Init);
!                      Next (Init);
!                   end loop;
!                end if;
!             end if;
           end if;
!       end Check_SPARK_Initialized_States;
  
!       --  Local variables
  
!       Pack_Body : constant Node_Id := Find_Related_Package_Or_Body (N);
  
!    --  Start of processing for Check_SPARK_Refined_State_Pragma
  
!    begin
!       --  Pragma Refined_State must be associated with a package body
  
!       pragma Assert
!         (Present (Pack_Body) and then Nkind (Pack_Body) = N_Package_Body);
  
!       --  Verify that each external contitunent of an abstract state mentioned
!       --  in pragma Initializes is properly elaborated.
  
!       Check_SPARK_Initialized_States (Unique_Defining_Entity (Pack_Body));
!    end Check_SPARK_Refined_State_Pragma;
  
!    ----------------------
!    -- Compilation_Unit --
!    ----------------------
  
!    function Compilation_Unit (Unit_Id : Entity_Id) return Node_Id is
!       Comp_Unit : Node_Id;
  
!    begin
!       Comp_Unit := Parent (Unit_Id);
  
!       --  Handle the case where a concurrent subunit is rewritten as a null
!       --  statement due to expansion activities.
  
!       if Nkind (Comp_Unit) = N_Null_Statement
!         and then Nkind_In (Original_Node (Comp_Unit), N_Protected_Body,
!                                                       N_Task_Body)
!       then
!          Comp_Unit := Parent (Comp_Unit);
!          pragma Assert (Nkind (Comp_Unit) = N_Subunit);
  
!       --  Otherwise use the declaration node of the unit
  
!       else
!          Comp_Unit := Parent (Unit_Declaration_Node (Unit_Id));
!       end if;
  
!       --  Handle the case where a subprogram instantiation which acts as a
!       --  compilation unit is expanded into an anonymous package that wraps
!       --  the instantiated subprogram.
  
!       if Nkind (Comp_Unit) = N_Package_Specification
!         and then Nkind_In (Original_Node (Parent (Comp_Unit)),
!                            N_Function_Instantiation,
!                            N_Procedure_Instantiation)
!       then
!          Comp_Unit := Parent (Parent (Comp_Unit));
  
!       --  Handle the case where the compilation unit is a subunit
  
!       elsif Nkind (Comp_Unit) = N_Subunit then
!          Comp_Unit := Parent (Comp_Unit);
!       end if;
  
!       pragma Assert (Nkind (Comp_Unit) = N_Compilation_Unit);
  
!       return Comp_Unit;
!    end Compilation_Unit;
  
!    -----------------------
!    -- Early_Call_Region --
!    -----------------------
  
!    function Early_Call_Region (Body_Id : Entity_Id) return Node_Id is
!    begin
!       pragma Assert (Ekind_In (Body_Id, E_Entry,
!                                         E_Entry_Family,
!                                         E_Function,
!                                         E_Procedure,
!                                         E_Subprogram_Body));
  
!       if Early_Call_Regions_In_Use then
!          return Early_Call_Regions.Get (Body_Id);
!       end if;
  
!       return Early_Call_Regions_No_Element;
!    end Early_Call_Region;
  
!    -----------------------------
!    -- Early_Call_Regions_Hash --
!    -----------------------------
  
!    function Early_Call_Regions_Hash
!      (Key : Entity_Id) return Early_Call_Regions_Index
!    is
!    begin
!       return Early_Call_Regions_Index (Key mod Early_Call_Regions_Max);
!    end Early_Call_Regions_Hash;
  
!    -----------------
!    -- Elab_Msg_NE --
!    -----------------
  
!    procedure Elab_Msg_NE
!      (Msg      : String;
!       N        : Node_Id;
!       Id       : Entity_Id;
!       Info_Msg : Boolean;
!       In_SPARK : Boolean)
!    is
!       function Prefix return String;
!       --  Obtain the prefix of the message
  
!       function Suffix return String;
!       --  Obtain the suffix of the message
  
!       ------------
!       -- Prefix --
!       ------------
  
!       function Prefix return String is
!       begin
!          if Info_Msg then
!             return "info: ";
!          else
!             return "";
           end if;
-       end Prefix;
  
!       ------------
!       -- Suffix --
!       ------------
  
-       function Suffix return String is
-       begin
-          if In_SPARK then
-             return " in SPARK";
           else
!             return "";
           end if;
-       end Suffix;
  
!    --  Start of processing for Elab_Msg_NE
! 
!    begin
!       Error_Msg_NE (Prefix & Msg & Suffix, N, Id);
!    end Elab_Msg_NE;
  
!    ------------------------
!    -- Elaboration_Status --
!    ------------------------
  
!    function Elaboration_Status
!      (Unit_Id : Entity_Id) return Elaboration_Attributes
!    is
!    begin
!       if Elaboration_Statuses_In_Use then
!          return Elaboration_Statuses.Get (Unit_Id);
!       end if;
  
!       return Elaboration_Statuses_No_Element;
!    end Elaboration_Status;
  
!    -------------------------------
!    -- Elaboration_Statuses_Hash --
!    -------------------------------
  
!    function Elaboration_Statuses_Hash
!      (Key : Entity_Id) return Elaboration_Statuses_Index
!    is
!    begin
!       return Elaboration_Statuses_Index (Key mod Elaboration_Statuses_Max);
!    end Elaboration_Statuses_Hash;
  
!    ------------------------------
!    -- Ensure_Prior_Elaboration --
!    ------------------------------
  
!    procedure Ensure_Prior_Elaboration
!      (N        : Node_Id;
!       Unit_Id  : Entity_Id;
!       Prag_Nam : Name_Id;
!       State    : Processing_Attributes)
!    is
!    begin
!       pragma Assert (Nam_In (Prag_Nam, Name_Elaborate, Name_Elaborate_All));
  
!       --  Nothing to do when the caller has suppressed the generation of
!       --  implicit Elaborate[_All] pragmas.
  
!       if State.Suppress_Implicit_Pragmas then
!          return;
  
!       --  Nothing to do when the need for prior elaboration came from a partial
!       --  finalization routine which occurs in an initialization context. This
!       --  behaviour parallels that of the old ABE mechanism.
  
!       elsif State.Within_Partial_Finalization then
!          return;
  
!       --  Nothing to do when the need for prior elaboration came from a task
!       --  body and switch -gnatd.y (disable implicit pragma Elaborate_All on
!       --  task bodies) is in effect.
  
!       elsif Debug_Flag_Dot_Y and then State.Within_Task_Body then
!          return;
  
!       --  Nothing to do when the unit is elaborated prior to the main unit.
!       --  This check must also consider the following cases:
  
!       --  * No check is made against the context of the main unit because this
!       --    is specific to the elaboration model in effect and requires custom
!       --    handling (see Ensure_xxx_Prior_Elaboration).
  
!       --  * Unit_Id is subject to pragma Elaborate_Body. An implicit pragma
!       --    Elaborate[_All] MUST be generated even though Unit_Id is always
!       --    elaborated prior to the main unit. This is a conservative strategy
!       --    which ensures that other units withed by Unit_Id will not lead to
!       --    an ABE.
  
!       --      package A is               package body A is
!       --         procedure ABE;             procedure ABE is ... end ABE;
!       --      end A;                     end A;
  
!       --      with A;
!       --      package B is               package body B is
!       --         pragma Elaborate_Body;     procedure Proc is
!       --                                    begin
!       --         procedure Proc;               A.ABE;
!       --      package B;                    end Proc;
!       --                                 end B;
  
!       --      with B;
!       --      package C is               package body C is
!       --         ...                        ...
!       --      end C;                     begin
!       --                                    B.Proc;
!       --                                 end C;
  
!       --    In the example above, the elaboration of C invokes B.Proc. B is
!       --    subject to pragma Elaborate_Body. If no pragma Elaborate[_All] is
!       --    generated for B in C, then the following elaboratio order will lead
!       --    to an ABE:
  
!       --       spec of A elaborated
!       --       spec of B elaborated
!       --       body of B elaborated
!       --       spec of C elaborated
!       --       body of C elaborated  <--  calls B.Proc which calls A.ABE
!       --       body of A elaborated  <--  problem
  
!       --    The generation of an implicit pragma Elaborate_All (B) ensures that
!       --    the elaboration order mechanism will not pick the above order.
  
!       --    An implicit Elaborate is NOT generated when the unit is subject to
!       --    Elaborate_Body because both pragmas have the exact same effect.
  
!       --  * Unit_Id is the main unit. An implicit pragma Elaborate[_All] MUST
!       --    NOT be generated in this case because a unit cannot depend on its
!       --    own elaboration. This case is therefore treated as valid prior
!       --    elaboration.
  
!       elsif Has_Prior_Elaboration
!               (Unit_Id      => Unit_Id,
!                Same_Unit_OK => True,
!                Elab_Body_OK => Prag_Nam = Name_Elaborate)
!       then
!          return;
  
!       --  Suggest the use of pragma Prag_Nam when the dynamic model is in
!       --  effect.
  
!       elsif Dynamic_Elaboration_Checks then
!          Ensure_Prior_Elaboration_Dynamic
!            (N        => N,
!             Unit_Id  => Unit_Id,
!             Prag_Nam => Prag_Nam);
  
!       --  Install an implicit pragma Prag_Nam when the static model is in
!       --  effect.
  
!       else
!          pragma Assert (Static_Elaboration_Checks);
  
!          Ensure_Prior_Elaboration_Static
!            (N        => N,
!             Unit_Id  => Unit_Id,
!             Prag_Nam => Prag_Nam);
!       end if;
!    end Ensure_Prior_Elaboration;
  
!    --------------------------------------
!    -- Ensure_Prior_Elaboration_Dynamic --
!    --------------------------------------
  
!    procedure Ensure_Prior_Elaboration_Dynamic
!      (N        : Node_Id;
!       Unit_Id  : Entity_Id;
!       Prag_Nam : Name_Id)
!    is
!       procedure Info_Missing_Pragma;
!       pragma Inline (Info_Missing_Pragma);
!       --  Output information concerning missing Elaborate or Elaborate_All
!       --  pragma with name Prag_Nam for scenario N, which would ensure the
!       --  prior elaboration of Unit_Id.
  
!       -------------------------
!       -- Info_Missing_Pragma --
!       -------------------------
  
!       procedure Info_Missing_Pragma is
!       begin
!          --  Internal units are ignored as they cause unnecessary noise
  
!          if not In_Internal_Unit (Unit_Id) then
  
!             --  The name of the unit subjected to the elaboration pragma is
!             --  fully qualified to improve the clarity of the info message.
  
!             Error_Msg_Name_1     := Prag_Nam;
!             Error_Msg_Qual_Level := Nat'Last;
  
!             Error_Msg_NE ("info: missing pragma % for unit &", N, Unit_Id);
!             Error_Msg_Qual_Level := 0;
           end if;
-       end Info_Missing_Pragma;
  
!       --  Local variables
  
!       Elab_Attrs : Elaboration_Attributes;
!       Level      : Enclosing_Level_Kind;
  
!    --  Start of processing for Ensure_Prior_Elaboration_Dynamic
  
!    begin
!       Elab_Attrs := Elaboration_Status (Unit_Id);
  
!       --  Nothing to do when the unit is guaranteed prior elaboration by means
!       --  of a source Elaborate[_All] pragma.
  
!       if Present (Elab_Attrs.Source_Pragma) then
!          return;
!       end if;
  
!       --  Output extra information on a missing Elaborate[_All] pragma when
!       --  switch -gnatel (info messages on implicit Elaborate[_All] pragmas
!       --  is in effect.
  
!       if Elab_Info_Messages then
  
!          --  Performance note: parent traversal
  
!          Level := Find_Enclosing_Level (N);
  
!          --  Declaration-level scenario
  
!          if (Is_Suitable_Call (N) or else Is_Suitable_Instantiation (N))
!            and then Level = Declaration_Level
!          then
!             null;
  
!          --  Library-level scenario
  
!          elsif Level in Library_Level then
!             null;
  
!          --  Instantiation library-level scenario
  
!          elsif Level = Instantiation then
!             null;
  
!          --  Otherwise the scenario does not appear at the proper level and
!          --  cannot possibly act as a top-level scenario.
  
!          else
              return;
-          end if;
  
!          Info_Missing_Pragma;
!       end if;
!    end Ensure_Prior_Elaboration_Dynamic;
  
!    -------------------------------------
!    -- Ensure_Prior_Elaboration_Static --
!    -------------------------------------
  
!    procedure Ensure_Prior_Elaboration_Static
!      (N        : Node_Id;
!       Unit_Id  : Entity_Id;
!       Prag_Nam : Name_Id)
!    is
!       function Find_With_Clause
!         (Items     : List_Id;
!          Withed_Id : Entity_Id) return Node_Id;
!       pragma Inline (Find_With_Clause);
!       --  Find a nonlimited with clause in the list of context items Items
!       --  that withs unit Withed_Id. Return Empty if no such clause is found.
  
!       procedure Info_Implicit_Pragma;
!       pragma Inline (Info_Implicit_Pragma);
!       --  Output information concerning an implicitly generated Elaborate or
!       --  Elaborate_All pragma with name Prag_Nam for scenario N which ensures
!       --  the prior elaboration of unit Unit_Id.
  
!       ----------------------
!       -- Find_With_Clause --
!       ----------------------
  
!       function Find_With_Clause
!         (Items     : List_Id;
!          Withed_Id : Entity_Id) return Node_Id
!       is
!          Item : Node_Id;
  
!       begin
!          --  Examine the context clauses looking for a suitable with. Note that
!          --  limited clauses do not affect the elaboration order.
  
!          Item := First (Items);
!          while Present (Item) loop
!             if Nkind (Item) = N_With_Clause
!               and then not Error_Posted (Item)
!               and then not Limited_Present (Item)
!               and then Entity (Name (Item)) = Withed_Id
!             then
!                return Item;
!             end if;
  
!             Next (Item);
!          end loop;
  
!          return Empty;
!       end Find_With_Clause;
  
!       --------------------------
!       -- Info_Implicit_Pragma --
!       --------------------------
  
!       procedure Info_Implicit_Pragma is
!       begin
!          --  Internal units are ignored as they cause unnecessary noise
  
!          if not In_Internal_Unit (Unit_Id) then
  
!             --  The name of the unit subjected to the elaboration pragma is
!             --  fully qualified to improve the clarity of the info message.
  
!             Error_Msg_Name_1     := Prag_Nam;
!             Error_Msg_Qual_Level := Nat'Last;
  
!             Error_Msg_NE
!               ("info: implicit pragma % generated for unit &", N, Unit_Id);
  
!             Error_Msg_Qual_Level := 0;
!             Output_Active_Scenarios (N);
           end if;
-       end Info_Implicit_Pragma;
  
!       --  Local variables
! 
!       Main_Cunit : constant Node_Id    := Cunit (Main_Unit);
!       Loc        : constant Source_Ptr := Sloc (Main_Cunit);
!       Unit_Cunit : constant Node_Id    := Compilation_Unit (Unit_Id);
! 
!       Clause     : Node_Id;
!       Elab_Attrs : Elaboration_Attributes;
!       Items      : List_Id;
  
!    --  Start of processing for Ensure_Prior_Elaboration_Static
  
!    begin
!       Elab_Attrs := Elaboration_Status (Unit_Id);
  
!       --  Nothing to do when the unit is guaranteed prior elaboration by means
!       --  of a source Elaborate[_All] pragma.
  
!       if Present (Elab_Attrs.Source_Pragma) then
!          return;
  
!       --  Nothing to do when the unit has an existing implicit Elaborate[_All]
!       --  pragma installed by a previous scenario.
  
!       elsif Present (Elab_Attrs.With_Clause) then
  
!          --  The unit is already guaranteed prior elaboration by means of an
!          --  implicit Elaborate pragma, however the current scenario imposes
!          --  a stronger requirement of Elaborate_All. "Upgrade" the existing
!          --  pragma to match this new requirement.
  
!          if Elaborate_Desirable (Elab_Attrs.With_Clause)
!            and then Prag_Nam = Name_Elaborate_All
           then
!             Set_Elaborate_All_Desirable (Elab_Attrs.With_Clause);
!             Set_Elaborate_Desirable     (Elab_Attrs.With_Clause, False);
!          end if;
  
!          return;
!       end if;
  
!       --  At this point it is known that the unit has no prior elaboration
!       --  according to pragmas and hierarchical relationships.
  
!       Items := Context_Items (Main_Cunit);
  
!       if No (Items) then
!          Items := New_List;
!          Set_Context_Items (Main_Cunit, Items);
!       end if;
  
!       --  Locate the with clause for the unit. Note that there may not be a
!       --  clause if the unit is visible through a subunit-body, body-spec, or
!       --  spec-parent relationship.
  
!       Clause :=
!         Find_With_Clause
!           (Items     => Items,
!            Withed_Id => Unit_Id);
  
!       --  Generate:
!       --    with Id;
  
!       --  Note that adding implicit with clauses is safe because analysis,
!       --  resolution, and expansion have already taken place and it is not
!       --  possible to interfere with visibility.
  
!       if No (Clause) then
!          Clause :=
!            Make_With_Clause (Loc,
!              Name => New_Occurrence_Of (Unit_Id, Loc));
  
!          Set_Implicit_With (Clause);
!          Set_Library_Unit  (Clause, Unit_Cunit);
  
!          Append_To (Items, Clause);
!       end if;
  
!       --  Mark the with clause depending on the pragma required
  
!       if Prag_Nam = Name_Elaborate then
!          Set_Elaborate_Desirable (Clause);
!       else
!          Set_Elaborate_All_Desirable (Clause);
!       end if;
  
!       --  The implicit Elaborate[_All] ensures the prior elaboration of the
!       --  unit. Include the unit in the elaboration context of the main unit.
  
!       Set_Elaboration_Status
!         (Unit_Id => Unit_Id,
!          Val     => Elaboration_Attributes'(Source_Pragma => Empty,
!                                             With_Clause   => Clause));
  
!       --  Output extra information on an implicit Elaborate[_All] pragma when
!       --  switch -gnatel (info messages on implicit Elaborate[_All] pragmas is
!       --  in effect.
  
!       if Elab_Info_Messages then
!          Info_Implicit_Pragma;
!       end if;
!    end Ensure_Prior_Elaboration_Static;
  
!    -----------------------------
!    -- Extract_Assignment_Name --
!    -----------------------------
  
!    function Extract_Assignment_Name (Asmt : Node_Id) return Node_Id is
!       Nam : Node_Id;
  
!    begin
!       Nam := Name (Asmt);
  
!       --  When the name denotes an array or record component, find the whole
!       --  object.
  
!       while Nkind_In (Nam, N_Explicit_Dereference,
!                            N_Indexed_Component,
!                            N_Selected_Component,
!                            N_Slice)
!       loop
!          Nam := Prefix (Nam);
!       end loop;
  
!       return Nam;
!    end Extract_Assignment_Name;
  
!    -----------------------------
!    -- Extract_Call_Attributes --
!    -----------------------------
  
!    procedure Extract_Call_Attributes
!      (Call      : Node_Id;
!       Target_Id : out Entity_Id;
!       Attrs     : out Call_Attributes)
!    is
!       From_Source     : Boolean;
!       In_Declarations : Boolean;
!       Is_Dispatching  : Boolean;
  
!    begin
!       --  Extraction for call markers
  
!       if Nkind (Call) = N_Call_Marker then
!          Target_Id       := Target (Call);
!          From_Source     := Is_Source_Call (Call);
!          In_Declarations := Is_Declaration_Level_Node (Call);
!          Is_Dispatching  := Is_Dispatching_Call (Call);
  
!       --  Extraction for entry calls, requeue, and subprogram calls
  
!       else
!          pragma Assert (Nkind_In (Call, N_Entry_Call_Statement,
!                                         N_Function_Call,
!                                         N_Procedure_Call_Statement,
!                                         N_Requeue_Statement));
  
!          Target_Id   := Entity (Extract_Call_Name (Call));
!          From_Source := Comes_From_Source (Call);
  
!          --  Performance note: parent traversal
  
!          In_Declarations := Find_Enclosing_Level (Call) = Declaration_Level;
!          Is_Dispatching  :=
!            Nkind_In (Call, N_Function_Call, N_Procedure_Call_Statement)
!              and then Present (Controlling_Argument (Call));
!       end if;
  
!       --  Obtain the original entry or subprogram which the target may rename
!       --  except when the target is an instantiation. In this case the alias
!       --  is the internally generated subprogram which appears within the the
!       --  anonymous package created for the instantiation. Such an alias is not
!       --  a suitable target.
  
!       if not (Is_Subprogram (Target_Id)
!                and then Is_Generic_Instance (Target_Id))
!       then
!          Target_Id := Get_Renamed_Entity (Target_Id);
!       end if;
  
!       --  Set all attributes
  
!       Attrs.Elab_Checks_OK    := Is_Elaboration_Checks_OK_Node (Call);
!       Attrs.Elab_Warnings_OK  := Is_Elaboration_Warnings_OK_Node (Call);
!       Attrs.From_Source       := From_Source;
!       Attrs.Ghost_Mode_Ignore := Is_Ignored_Ghost_Node (Call);
!       Attrs.In_Declarations   := In_Declarations;
!       Attrs.Is_Dispatching    := Is_Dispatching;
!       Attrs.SPARK_Mode_On     := Is_SPARK_Mode_On_Node (Call);
!    end Extract_Call_Attributes;
  
!    -----------------------
!    -- Extract_Call_Name --
!    -----------------------
  
!    function Extract_Call_Name (Call : Node_Id) return Node_Id is
!       Nam : Node_Id;
  
!    begin
!       Nam := Name (Call);
  
!       --  When the call invokes an entry family, the name appears as an indexed
!       --  component.
  
!       if Nkind (Nam) = N_Indexed_Component then
!          Nam := Prefix (Nam);
!       end if;
  
!       --  When the call employs the object.operation form, the name appears as
!       --  a selected component.
  
!       if Nkind (Nam) = N_Selected_Component then
!          Nam := Selector_Name (Nam);
!       end if;
  
!       return Nam;
!    end Extract_Call_Name;
  
!    ---------------------------------
!    -- Extract_Instance_Attributes --
!    ---------------------------------
  
!    procedure Extract_Instance_Attributes
!      (Exp_Inst  : Node_Id;
!       Inst_Body : out Node_Id;
!       Inst_Decl : out Node_Id)
!    is
!       Body_Id : Entity_Id;
  
!    begin
!       --  Assume that the attributes are unavailable
  
!       Inst_Body := Empty;
!       Inst_Decl := Empty;
  
!       --  Generic package or subprogram spec
  
!       if Nkind_In (Exp_Inst, N_Package_Declaration,
!                              N_Subprogram_Declaration)
!       then
!          Inst_Decl := Exp_Inst;
!          Body_Id   := Corresponding_Body (Inst_Decl);
  
!          if Present (Body_Id) then
!             Inst_Body := Unit_Declaration_Node (Body_Id);
           end if;
  
!       --  Generic package or subprogram body
  
!       else
!          pragma Assert
!            (Nkind_In (Exp_Inst, N_Package_Body, N_Subprogram_Body));
  
!          Inst_Body := Exp_Inst;
!          Inst_Decl := Unit_Declaration_Node (Corresponding_Spec (Inst_Body));
!       end if;
!    end Extract_Instance_Attributes;
  
!    --------------------------------------
!    -- Extract_Instantiation_Attributes --
!    --------------------------------------
  
!    procedure Extract_Instantiation_Attributes
!      (Exp_Inst : Node_Id;
!       Inst     : out Node_Id;
!       Inst_Id  : out Entity_Id;
!       Gen_Id   : out Entity_Id;
!       Attrs    : out Instantiation_Attributes)
!    is
!    begin
!       Inst    := Original_Node (Exp_Inst);
!       Inst_Id := Defining_Entity (Inst);
  
!       --  Traverse a possible chain of renamings to obtain the original generic
!       --  being instantiatied.
  
!       Gen_Id := Get_Renamed_Entity (Entity (Name (Inst)));
  
!       --  Set all attributes
  
!       Attrs.Elab_Checks_OK    := Is_Elaboration_Checks_OK_Node (Inst);
!       Attrs.Elab_Warnings_OK  := Is_Elaboration_Warnings_OK_Node (Inst);
!       Attrs.Ghost_Mode_Ignore := Is_Ignored_Ghost_Node (Inst);
!       Attrs.In_Declarations   := Is_Declaration_Level_Node (Inst);
!       Attrs.SPARK_Mode_On     := Is_SPARK_Mode_On_Node (Inst);
!    end Extract_Instantiation_Attributes;
  
!    -------------------------------
!    -- Extract_Target_Attributes --
!    -------------------------------
  
!    procedure Extract_Target_Attributes
!      (Target_Id : Entity_Id;
!       Attrs     : out Target_Attributes)
!    is
!       procedure Extract_Package_Or_Subprogram_Attributes
!         (Spec_Id   : out Entity_Id;
!          Body_Decl : out Node_Id);
!       --  Obtain the attributes associated with a package or a subprogram.
!       --  Spec_Id is the package or subprogram. Body_Decl is the declaration
!       --  of the corresponding package or subprogram body.
  
!       procedure Extract_Protected_Entry_Attributes
!         (Spec_Id   : out Entity_Id;
!          Body_Decl : out Node_Id;
!          Body_Barf : out Node_Id);
!       --  Obtain the attributes associated with a protected entry [family].
!       --  Spec_Id is the entity of the protected body subprogram. Body_Decl
!       --  is the declaration of Spec_Id's corresponding body. Body_Barf is
!       --  the declaration of the barrier function body.
  
!       procedure Extract_Protected_Subprogram_Attributes
!         (Spec_Id   : out Entity_Id;
!          Body_Decl : out Node_Id);
!       --  Obtain the attributes associated with a protected subprogram. Formal
!       --  Spec_Id is the entity of the protected body subprogram. Body_Decl is
!       --  the declaration of Spec_Id's corresponding body.
  
!       procedure Extract_Task_Entry_Attributes
!         (Spec_Id   : out Entity_Id;
!          Body_Decl : out Node_Id);
!       --  Obtain the attributes associated with a task entry [family]. Formal
!       --  Spec_Id is the entity of the task body procedure. Body_Decl is the
!       --  declaration of Spec_Id's corresponding body.
  
!       ----------------------------------------------
!       -- Extract_Package_Or_Subprogram_Attributes --
!       ----------------------------------------------
  
!       procedure Extract_Package_Or_Subprogram_Attributes
!         (Spec_Id   : out Entity_Id;
!          Body_Decl : out Node_Id)
!       is
!          Body_Id   : Entity_Id;
!          Init_Id   : Entity_Id;
!          Spec_Decl : Node_Id;
  
        begin
!          --  Assume that the body is not available
  
!          Body_Decl := Empty;
!          Spec_Id   := Target_Id;
  
!          --  For body retrieval purposes, the entity of the initial declaration
!          --  is that of the spec.
  
!          Init_Id := Spec_Id;
  
!          --  The only exception to the above is a function which returns a
!          --  constrained array type in a SPARK-to-C compilation. In this case
!          --  the function receives a corresponding procedure which has an out
!          --  parameter. The proper body for ABE checks and diagnostics is that
!          --  of the procedure.
  
!          if Ekind (Init_Id) = E_Function
!            and then Rewritten_For_C (Init_Id)
!          then
!             Init_Id := Corresponding_Procedure (Init_Id);
           end if;
  
!          --  Extract the attributes of the body
! 
!          Spec_Decl := Unit_Declaration_Node (Init_Id);
  
!          --  The initial declaration is a stand alone subprogram body
  
!          if Nkind (Spec_Decl) = N_Subprogram_Body then
!             Body_Decl := Spec_Decl;
  
!          --  Otherwise the package or subprogram has a spec and a completing
!          --  body.
  
!          elsif Nkind_In (Spec_Decl, N_Generic_Package_Declaration,
!                                     N_Generic_Subprogram_Declaration,
!                                     N_Package_Declaration,
!                                     N_Subprogram_Body_Stub,
!                                     N_Subprogram_Declaration)
           then
!             Body_Id := Corresponding_Body (Spec_Decl);
  
!             if Present (Body_Id) then
!                Body_Decl := Unit_Declaration_Node (Body_Id);
              end if;
           end if;
!       end Extract_Package_Or_Subprogram_Attributes;
  
!       ----------------------------------------
!       -- Extract_Protected_Entry_Attributes --
!       ----------------------------------------
  
!       procedure Extract_Protected_Entry_Attributes
!         (Spec_Id   : out Entity_Id;
!          Body_Decl : out Node_Id;
!          Body_Barf : out Node_Id)
        is
!          Barf_Id : Entity_Id;
!          Body_Id : Entity_Id;
  
!       begin
!          --  Assume that the bodies are not available
  
!          Body_Barf := Empty;
!          Body_Decl := Empty;
  
!          --  When the entry [family] has already been expanded, it carries both
!          --  the procedure which emulates the behavior of the entry [family] as
!          --  well as the barrier function.
  
!          if Present (Protected_Body_Subprogram (Target_Id)) then
!             Spec_Id := Protected_Body_Subprogram (Target_Id);
  
!             --  Extract the attributes of the barrier function
  
!             Barf_Id :=
!               Corresponding_Body
!                 (Unit_Declaration_Node (Barrier_Function (Target_Id)));
  
!             if Present (Barf_Id) then
!                Body_Barf := Unit_Declaration_Node (Barf_Id);
!             end if;
  
!          --  Otherwise no expansion took place
  
!          else
!             Spec_Id := Target_Id;
           end if;
  
!          --  Extract the attributes of the entry body
  
!          Body_Id := Corresponding_Body (Unit_Declaration_Node (Spec_Id));
  
!          if Present (Body_Id) then
!             Body_Decl := Unit_Declaration_Node (Body_Id);
           end if;
-       end Extract_Protected_Entry_Attributes;
  
!       ---------------------------------------------
!       -- Extract_Protected_Subprogram_Attributes --
!       ---------------------------------------------
  
!       procedure Extract_Protected_Subprogram_Attributes
!         (Spec_Id   : out Entity_Id;
!          Body_Decl : out Node_Id)
!       is
!          Body_Id : Entity_Id;
  
!       begin
!          --  Assume that the body is not available
  
!          Body_Decl := Empty;
  
!          --  When the protected subprogram has already been expanded, it
!          --  carries the subprogram which seizes the lock and invokes the
!          --  original statements.
  
!          if Present (Protected_Subprogram (Target_Id)) then
!             Spec_Id :=
!               Protected_Body_Subprogram (Protected_Subprogram (Target_Id));
  
!          --  Otherwise no expansion took place
  
!          else
!             Spec_Id := Target_Id;
!          end if;
  
!          --  Extract the attributes of the body
  
!          Body_Id := Corresponding_Body (Unit_Declaration_Node (Spec_Id));
  
!          if Present (Body_Id) then
!             Body_Decl := Unit_Declaration_Node (Body_Id);
           end if;
!       end Extract_Protected_Subprogram_Attributes;
  
        -----------------------------------
!       -- Extract_Task_Entry_Attributes --
        -----------------------------------
  
!       procedure Extract_Task_Entry_Attributes
!         (Spec_Id   : out Entity_Id;
!          Body_Decl : out Node_Id)
        is
-          Task_Typ : constant Entity_Id := Non_Private_View (Scope (Target_Id));
-          Body_Id  : Entity_Id;
- 
        begin
!          --  Assume that the body is not available
  
!          Body_Decl := Empty;
  
!          --  The the task type has already been expanded, it carries the
!          --  procedure which emulates the behavior of the task body.
  
!          if Present (Task_Body_Procedure (Task_Typ)) then
!             Spec_Id := Task_Body_Procedure (Task_Typ);
  
!          --  Otherwise no expansion took place
  
!          else
!             Spec_Id := Task_Typ;
!          end if;
  
!          --  Extract the attributes of the body
  
!          Body_Id := Corresponding_Body (Unit_Declaration_Node (Spec_Id));
  
!          if Present (Body_Id) then
!             Body_Decl := Unit_Declaration_Node (Body_Id);
!          end if;
!       end Extract_Task_Entry_Attributes;
  
!       --  Local variables
  
!       Prag      : constant Node_Id := SPARK_Pragma (Target_Id);
!       Body_Barf : Node_Id;
!       Body_Decl : Node_Id;
!       Spec_Id   : Entity_Id;
  
!    --  Start of processing for Extract_Target_Attributes
  
!    begin
!       --  Assume that the body of the barrier function is not available
  
!       Body_Barf := Empty;
  
!       --  The target is a protected entry [family]
  
!       if Is_Protected_Entry (Target_Id) then
!          Extract_Protected_Entry_Attributes
!            (Spec_Id   => Spec_Id,
!             Body_Decl => Body_Decl,
!             Body_Barf => Body_Barf);
  
!       --  The target is a protected subprogram
  
!       elsif Is_Protected_Subp (Target_Id)
!         or else Is_Protected_Body_Subp (Target_Id)
!       then
!          Extract_Protected_Subprogram_Attributes
!            (Spec_Id   => Spec_Id,
!             Body_Decl => Body_Decl);
  
!       --  The target is a task entry [family]
  
!       elsif Is_Task_Entry (Target_Id) then
!          Extract_Task_Entry_Attributes
!            (Spec_Id   => Spec_Id,
!             Body_Decl => Body_Decl);
  
!       --  Otherwise the target is a package or a subprogram
  
!       else
!          Extract_Package_Or_Subprogram_Attributes
!            (Spec_Id   => Spec_Id,
!             Body_Decl => Body_Decl);
!       end if;
  
!       --  Set all attributes
  
!       Attrs.Body_Barf         := Body_Barf;
!       Attrs.Body_Decl         := Body_Decl;
!       Attrs.Elab_Checks_OK    := Is_Elaboration_Checks_OK_Id (Target_Id);
!       Attrs.Elab_Warnings_OK  := Is_Elaboration_Warnings_OK_Id (Target_Id);
!       Attrs.From_Source       := Comes_From_Source (Target_Id);
!       Attrs.Ghost_Mode_Ignore := Is_Ignored_Ghost_Entity (Target_Id);
!       Attrs.SPARK_Mode_On     :=
!         Present (Prag) and then Get_SPARK_Mode_From_Annotation (Prag) = On;
!       Attrs.Spec_Decl         := Unit_Declaration_Node (Spec_Id);
!       Attrs.Spec_Id           := Spec_Id;
!       Attrs.Unit_Id           := Find_Top_Unit (Target_Id);
  
!       --  At this point certain attributes should always be available
  
!       pragma Assert (Present (Attrs.Spec_Decl));
!       pragma Assert (Present (Attrs.Spec_Id));
!       pragma Assert (Present (Attrs.Unit_Id));
!    end Extract_Target_Attributes;
  
!    -----------------------------
!    -- Extract_Task_Attributes --
!    -----------------------------
  
!    procedure Extract_Task_Attributes
!      (Typ   : Entity_Id;
!       Attrs : out Task_Attributes)
!    is
!       Task_Typ : constant Entity_Id := Non_Private_View (Typ);
  
!       Body_Decl : Node_Id;
!       Body_Id   : Entity_Id;
!       Prag      : Node_Id;
!       Spec_Id   : Entity_Id;
  
!    begin
!       --  Assume that the body of the task procedure is not available
  
!       Body_Decl := Empty;
  
!       --  The initial declaration is that of the task body procedure
  
!       Spec_Id := Get_Task_Body_Procedure (Task_Typ);
!       Body_Id := Corresponding_Body (Unit_Declaration_Node (Spec_Id));
  
!       if Present (Body_Id) then
!          Body_Decl := Unit_Declaration_Node (Body_Id);
!       end if;
  
!       Prag := SPARK_Pragma (Task_Typ);
  
!       --  Set all attributes
  
!       Attrs.Body_Decl         := Body_Decl;
!       Attrs.Elab_Checks_OK    := Is_Elaboration_Checks_OK_Id (Task_Typ);
!       Attrs.Elab_Warnings_OK  := Is_Elaboration_Warnings_OK_Id (Task_Typ);
!       Attrs.Ghost_Mode_Ignore := Is_Ignored_Ghost_Entity (Task_Typ);
!       Attrs.SPARK_Mode_On     :=
!         Present (Prag) and then Get_SPARK_Mode_From_Annotation (Prag) = On;
!       Attrs.Spec_Id           := Spec_Id;
!       Attrs.Task_Decl         := Declaration_Node (Task_Typ);
!       Attrs.Unit_Id           := Find_Top_Unit (Task_Typ);
  
!       --  At this point certain attributes should always be available
  
!       pragma Assert (Present (Attrs.Spec_Id));
!       pragma Assert (Present (Attrs.Task_Decl));
!       pragma Assert (Present (Attrs.Unit_Id));
!    end Extract_Task_Attributes;
  
!    -------------------------------------------
!    -- Extract_Variable_Reference_Attributes --
!    -------------------------------------------
  
!    procedure Extract_Variable_Reference_Attributes
!      (Ref    : Node_Id;
!       Var_Id : out Entity_Id;
!       Attrs  : out Variable_Attributes)
!    is
!       function Get_Renamed_Variable (Id : Entity_Id) return Entity_Id;
!       --  Obtain the ultimate renamed variable of variable Id
  
!       --------------------------
!       -- Get_Renamed_Variable --
!       --------------------------
  
!       function Get_Renamed_Variable (Id : Entity_Id) return Entity_Id is
!          Ren_Id : Entity_Id;
  
!       begin
!          Ren_Id := Id;
!          while Present (Renamed_Entity (Ren_Id))
!            and then Nkind (Renamed_Entity (Ren_Id)) in N_Entity
!          loop
!             Ren_Id := Renamed_Entity (Ren_Id);
!          end loop;
  
!          return Ren_Id;
!       end Get_Renamed_Variable;
  
!    --  Start of processing for Extract_Variable_Reference_Attributes
  
!    begin
!       --  Extraction for variable reference markers
  
!       if Nkind (Ref) = N_Variable_Reference_Marker then
!          Var_Id := Target (Ref);
  
!       --  Extraction for expanded names and identifiers
  
!       else
!          Var_Id := Entity (Ref);
!       end if;
  
!       --  Obtain the original variable which the reference mentions
  
!       Var_Id        := Get_Renamed_Variable (Var_Id);
!       Attrs.Unit_Id := Find_Top_Unit (Var_Id);
  
!       --  At this point certain attributes should always be available
  
!       pragma Assert (Present (Attrs.Unit_Id));
!    end Extract_Variable_Reference_Attributes;
  
!    --------------------
!    -- Find_Code_Unit --
!    --------------------
  
!    function Find_Code_Unit (N : Node_Or_Entity_Id) return Entity_Id is
!    begin
!       return Find_Unit_Entity (Unit (Cunit (Get_Code_Unit (N))));
!    end Find_Code_Unit;
  
!    ----------------------------
!    -- Find_Early_Call_Region --
!    ----------------------------
  
!    function Find_Early_Call_Region
!      (Body_Decl        : Node_Id;
!       Assume_Elab_Body : Boolean := False;
!       Skip_Memoization : Boolean := False) return Node_Id
!    is
!       --  NOTE: The routines within Find_Early_Call_Region are intentionally
!       --  unnested to avoid deep indentation of code.
  
!       ECR_Found : exception;
!       --  This exception is raised when the early call region has been found
  
!       Start : Node_Id := Empty;
!       --  The start of the early call region. This variable is updated by the
!       --  various nested routines. Due to the use of exceptions, the variable
!       --  must be global to the nested routines.
  
!       --  The algorithm implemented in this routine attempts to find the early
!       --  call region of a subprogram body by inspecting constructs in reverse
!       --  declarative order, while navigating the tree. The algorithm consists
!       --  of an Inspection phase and an Advancement phase. The pseudocode is as
!       --  follows:
!       --
!       --    loop
!       --       inspection phase
!       --       advancement phase
!       --    end loop
!       --
!       --  The infinite loop is terminated by raising exception ECR_Found. The
!       --  algorithm utilizes two pointers, Curr and Start, to represent the
!       --  current construct to inspect and the start of the early call region.
!       --
!       --  IMPORTANT: The algorithm must maintain the following invariant at all
!       --  time for it to function properly - a nested construct is entered only
!       --  when it contains suitable constructs. This guarantees that leaving a
!       --  nested or encapsulating construct functions properly.
!       --
!       --  The Inspection phase determines whether the current construct is non-
!       --  preelaborable, and if it is, the algorithm terminates.
!       --
!       --  The Advancement phase walks the tree in reverse declarative order,
!       --  while entering and leaving nested and encapsulating constructs. It
!       --  may also terminate the elaborithm. There are several special cases
!       --  of advancement.
!       --
!       --  1) General case:
!       --
!       --    <construct 1>
!       --     ...
!       --    <construct N-1>                      <- Curr
!       --    <construct N>                        <- Start
!       --    <subprogram body>
!       --
!       --  In the general case, a declarative or statement list is traversed in
!       --  reverse order where Curr is the lead pointer, and Start indicates the
!       --  last preelaborable construct.
!       --
!       --  2) Entering handled bodies
!       --
!       --    package body Nested is               <- Curr (2.3)
!       --       <declarations>                    <- Curr (2.2)
!       --    begin
!       --       <statements>                      <- Curr (2.1)
!       --    end Nested;
!       --    <construct>                          <- Start
!       --
!       --  In this case, the algorithm enters a handled body by starting from
!       --  the last statement (2.1), or the last declaration (2.2), or the body
!       --  is consumed (2.3) because it is empty and thus preelaborable.
!       --
!       --  3) Entering package declarations
!       --
!       --    package Nested is                    <- Curr (2.3)
!       --       <visible declarations>            <- Curr (2.2)
!       --    private
!       --       <private declarations>            <- Curr (2.1)
!       --    end Nested;
!       --    <construct>                          <- Start
!       --
!       --  In this case, the algorithm enters a package declaration by starting
!       --  from the last private declaration (2.1), the last visible declaration
!       --  (2.2), or the package is consumed (2.3) because it is empty and thus
!       --  preelaborable.
!       --
!       --  4) Transitioning from list to list of the same construct
!       --
!       --  Certain constructs have two eligible lists. The algorithm must thus
!       --  transition from the second to the first list when the second list is
!       --  exhausted.
!       --
!       --    declare                              <- Curr (4.2)
!       --       <declarations>                    <- Curr (4.1)
!       --    begin
!       --       <statements>                      <- Start
!       --    end;
!       --
!       --  In this case, the algorithm has exhausted the second list (statements
!       --  in the example), and continues with the last declaration (4.1) or the
!       --  construct is consumed (4.2) because it contains only preelaborable
!       --  code.
!       --
!       --  5) Transitioning from list to construct
!       --
!       --    tack body Task is                    <- Curr (5.1)
!       --                                         <- Curr (Empty)
!       --       <construct 1>                     <- Start
!       --
!       --  In this case, the algorithm has exhausted a list, Curr is Empty, and
!       --  the owner of the list is consumed (5.1).
!       --
!       --  6) Transitioning from unit to unit
!       --
!       --  A package body with a spec subject to pragma Elaborate_Body extends
!       --  the possible range of the early call region to the package spec.
!       --
!       --    package Pack is                      <- Curr (6.3)
!       --       pragma Elaborate_Body;            <- Curr (6.2)
!       --       <visible declarations>            <- Curr (6.2)
!       --    private
!       --       <private declarations>            <- Curr (6.1)
!       --    end Pack;
!       --
!       --    package body Pack is                 <- Curr, Start
!       --
!       --  In this case, the algorithm has reached a package body compilation
!       --  unit whose spec is subject to pragma Elaborate_Body, or the caller
!       --  of the algorithm has specified this behavior. This transition is
!       --  equivalent to 3).
!       --
!       --  7) Transitioning from unit to termination
!       --
!       --  Reaching a compilation unit always terminates the algorithm as there
!       --  are no more lists to examine. This must take 6) into account.
!       --
!       --  8) Transitioning from subunit to stub
!       --
!       --    package body Pack is separate;       <- Curr (8.1)
!       --
!       --    separate (...)
!       --    package body Pack is                 <- Curr, Start
!       --
!       --  Reaching a subunit continues the search from the corresponding stub
!       --  (8.1).
  
!       procedure Advance (Curr : in out Node_Id);
!       pragma Inline (Advance);
!       --  Update the Curr and Start pointers depending on their location in the
!       --  tree to the next eligible construct. This routine raises ECR_Found.
  
!       procedure Enter_Handled_Body (Curr : in out Node_Id);
!       pragma Inline (Enter_Handled_Body);
!       --  Update the Curr and Start pointers to enter a nested handled body if
!       --  applicable. This routine raises ECR_Found.
  
!       procedure Enter_Package_Declaration (Curr : in out Node_Id);
!       pragma Inline (Enter_Package_Declaration);
!       --  Update the Curr and Start pointers to enter a nested package spec if
!       --  applicable. This routine raises ECR_Found.
  
!       function Find_ECR (N : Node_Id) return Node_Id;
!       pragma Inline (Find_ECR);
!       --  Find an early call region starting from arbitrary node N
  
!       function Has_Suitable_Construct (List : List_Id) return Boolean;
!       pragma Inline (Has_Suitable_Construct);
!       --  Determine whether list List contains at least one suitable construct
!       --  for inclusion into an early call region.
  
!       procedure Include (N : Node_Id; Curr : out Node_Id);
!       pragma Inline (Include);
!       --  Update the Curr and Start pointers to include arbitrary construct N
!       --  in the early call region. This routine raises ECR_Found.
  
!       function Is_OK_Preelaborable_Construct (N : Node_Id) return Boolean;
!       pragma Inline (Is_OK_Preelaborable_Construct);
!       --  Determine whether arbitrary node N denotes a preelaboration-safe
!       --  construct.
  
!       function Is_Suitable_Construct (N : Node_Id) return Boolean;
!       pragma Inline (Is_Suitable_Construct);
!       --  Determine whether arbitrary node N denotes a suitable construct for
!       --  inclusion into the early call region.
  
!       procedure Transition_Body_Declarations
!         (Bod  : Node_Id;
!          Curr : out Node_Id);
!       pragma Inline (Transition_Body_Declarations);
!       --  Update the Curr and Start pointers when construct Bod denotes a block
!       --  statement or a suitable body. This routine raises ECR_Found.
  
!       procedure Transition_Handled_Statements
!         (HSS  : Node_Id;
!          Curr : out Node_Id);
!       pragma Inline (Transition_Handled_Statements);
!       --  Update the Curr and Start pointers when node HSS denotes a handled
!       --  sequence of statements. This routine raises ECR_Found.
  
!       procedure Transition_Spec_Declarations
!         (Spec : Node_Id;
!          Curr : out Node_Id);
!       pragma Inline (Transition_Spec_Declarations);
!       --  Update the Curr and Start pointers when construct Spec denotes
!       --  a concurrent definition or a package spec. This routine raises
!       --  ECR_Found.
  
!       procedure Transition_Unit (Unit : Node_Id; Curr : out Node_Id);
!       pragma Inline (Transition_Unit);
!       --  Update the Curr and Start pointers when node Unit denotes a potential
!       --  compilation unit. This routine raises ECR_Found.
  
        -------------
!       -- Advance --
        -------------
  
!       procedure Advance (Curr : in out Node_Id) is
!          Context : Node_Id;
  
        begin
!          --  Curr denotes one of the following cases upon entry into this
!          --  routine:
           --
!          --    * Empty - There is no current construct when a declarative or a
!          --      statement list has been exhausted. This does not necessarily
!          --      indicate that the early call region has been computed as it
!          --      may still be possible to transition to another list.
           --
!          --    * Encapsulator - The current construct encapsulates declarations
!          --      and/or statements. This indicates that the early call region
!          --      may extend within the nested construct.
           --
!          --    * Preelaborable - The current construct is always preelaborable
!          --      because Find_ECR would not invoke Advance if this was not the
!          --      case.
  
!          --  The current construct is an encapsulator or is preelaborable
  
!          if Present (Curr) then
  
!             --  Enter encapsulators by inspecting their declarations and/or
!             --  statements.
  
!             if Nkind_In (Curr, N_Block_Statement, N_Package_Body) then
!                Enter_Handled_Body (Curr);
  
!             elsif Nkind (Curr) = N_Package_Declaration then
!                Enter_Package_Declaration (Curr);
  
!             --  Early call regions have a property which can be exploited to
!             --  optimize the algorithm.
!             --
!             --    <preceding subprogram body>
!             --    <preelaborable construct 1>
!             --     ...
!             --    <preelaborable construct N>
!             --    <initiating subprogram body>
!             --
!             --  If a traversal initiated from a subprogram body reaches a
!             --  preceding subprogram body, then both bodies share the same
!             --  early call region.
              --
!             --  The property results in the following desirable effects:
              --
!             --  * If the preceding body already has an early call region, then
!             --    the initiating body can reuse it. This minimizes the amount
!             --    of processing performed by the algorithm.
              --
!             --  * If the preceding body lack an early call region, then the
!             --    algorithm can compute the early call region, and reuse it
!             --    for the initiating body. This processing performs the same
!             --    amount of work, but has the beneficial effect of computing
!             --    the early call regions of all preceding bodies.
  
!             elsif Nkind_In (Curr, N_Entry_Body, N_Subprogram_Body) then
!                Start :=
!                  Find_Early_Call_Region
!                    (Body_Decl        => Curr,
!                     Assume_Elab_Body => Assume_Elab_Body,
!                     Skip_Memoization => Skip_Memoization);
  
!                raise ECR_Found;
  
!             --  Otherwise current construct is preelaborable. Unpdate the early
!             --  call region to include it.
  
              else
                 Include (Curr, Curr);
              end if;
  
!          --  Otherwise the current construct is missing, indicating that the
!          --  current list has been exhausted. Depending on the context of the
!          --  list, several transitions are possible.
  
!          else
!             --  The invariant of the algorithm ensures that Curr and Start are
!             --  at the same level of nesting at the point of a transition. The
!             --  algorithm can determine which list the traversal came from by
!             --  examining Start.
  
!             Context := Parent (Start);
  
!             --  Attempt the following transitions:
              --
-             --    private declarations -> visible declarations
-             --    private declarations -> upper level
              --    private declarations -> terminate
-             --    visible declarations -> upper level
              --    visible declarations -> terminate
  
!             if Nkind_In (Context, N_Package_Specification,
!                                   N_Protected_Definition,
!                                   N_Task_Definition)
              then
!                Transition_Spec_Declarations (Context, Curr);
  
!             --  Attempt the following transitions:
              --
              --    statements -> declarations
              --    statements -> upper level
              --    statements -> corresponding package spec (Elab_Body)
              --    statements -> terminate
  
!             elsif Nkind (Context) = N_Handled_Sequence_Of_Statements then
!                Transition_Handled_Statements (Context, Curr);
  
!             --  Attempt the following transitions:
              --
!             --    declarations -> upper level
!             --    declarations -> corresponding package spec (Elab_Body)
!             --    declarations -> terminate
  
!             elsif Nkind_In (Context, N_Block_Statement,
!                                      N_Entry_Body,
!                                      N_Package_Body,
!                                      N_Protected_Body,
!                                      N_Subprogram_Body,
!                                      N_Task_Body)
              then
!                Transition_Body_Declarations (Context, Curr);
  
!             --  Otherwise it is not possible to transition. Stop the search
!             --  because there are no more declarations or statements to check.
  
              else
                 raise ECR_Found;
              end if;
!          end if;
!       end Advance;
  
!       --------------------------
!       -- Enter_Handled_Body --
!       --------------------------
  
!       procedure Enter_Handled_Body (Curr : in out Node_Id) is
!          Decls : constant List_Id := Declarations (Curr);
!          HSS   : constant Node_Id := Handled_Statement_Sequence (Curr);
!          Stmts : List_Id := No_List;
  
!       begin
!          if Present (HSS) then
!             Stmts := Statements (HSS);
!          end if;
  
!          --  The handled body has a non-empty statement sequence. The construct
!          --  to inspect is the last statement.
  
!          if Has_Suitable_Construct (Stmts) then
!             Curr := Last (Stmts);
  
!          --  The handled body lacks statements, but has non-empty declarations.
!          --  The construct to inspect is the last declaration.
  
!          elsif Has_Suitable_Construct (Decls) then
!             Curr := Last (Decls);
  
!          --  Otherwise the handled body lacks both declarations and statements.
!          --  The construct to inspect is the node which precedes the handled
!          --  body. Update the early call region to include the handled body.
  
!          else
!             Include (Curr, Curr);
!          end if;
!       end Enter_Handled_Body;
  
!       -------------------------------
!       -- Enter_Package_Declaration --
!       -------------------------------
  
!       procedure Enter_Package_Declaration (Curr : in out Node_Id) is
!          Pack_Spec : constant Node_Id := Specification (Curr);
!          Prv_Decls : constant List_Id := Private_Declarations (Pack_Spec);
!          Vis_Decls : constant List_Id := Visible_Declarations (Pack_Spec);
  
!       begin
!          --  The package has a non-empty private declarations. The construct to
!          --  inspect is the last private declaration.
  
!          if Has_Suitable_Construct (Prv_Decls) then
!             Curr := Last (Prv_Decls);
  
!          --  The package lacks private declarations, but has non-empty visible
!          --  declarations. In this case the construct to inspect is the last
!          --  visible declaration.
  
!          elsif Has_Suitable_Construct (Vis_Decls) then
!             Curr := Last (Vis_Decls);
  
!          --  Otherwise the package lacks any declarations. The construct to
!          --  inspect is the node which precedes the package. Update the early
!          --  call region to include the package declaration.
  
           else
!             Include (Curr, Curr);
           end if;
-       end Enter_Package_Declaration;
  
!       --------------
!       -- Find_ECR --
!       --------------
  
!       function Find_ECR (N : Node_Id) return Node_Id is
!          Curr : Node_Id;
  
        begin
!          --  The early call region starts at N
  
!          Curr  := Prev (N);
!          Start := N;
  
!          --  Inspect each node in reverse declarative order while going in and
!          --  out of nested and enclosing constructs. Note that the only way to
!          --  terminate this infinite loop is to raise exception ECR_Found.
  
!          loop
!             --  The current construct is not preelaboration-safe. Terminate the
!             --  traversal.
  
!             if Present (Curr)
!               and then not Is_OK_Preelaborable_Construct (Curr)
!             then
!                raise ECR_Found;
              end if;
  
!             --  Advance to the next suitable construct. This may terminate the
!             --  traversal by raising ECR_Found.
  
!             Advance (Curr);
!          end loop;
  
!       exception
!          when ECR_Found =>
!             return Start;
!       end Find_ECR;
  
!       ----------------------------
!       -- Has_Suitable_Construct --
!       ----------------------------
  
!       function Has_Suitable_Construct (List : List_Id) return Boolean is
!          Item : Node_Id;
  
!       begin
!          --  Examine the list in reverse declarative order, looking for a
!          --  suitable construct.
  
!          if Present (List) then
!             Item := Last (List);
!             while Present (Item) loop
!                if Is_Suitable_Construct (Item) then
!                   return True;
                 end if;
  
!                Prev (Item);
!             end loop;
!          end if;
  
!          return False;
!       end Has_Suitable_Construct;
  
!       -------------
!       -- Include --
!       -------------
  
!       procedure Include (N : Node_Id; Curr : out Node_Id) is
!       begin
!          Start := N;
  
!          --  The input node is a compilation unit. This terminates the search
!          --  because there are no more lists to inspect and there are no more
!          --  enclosing constructs to climb up to. The transitions are:
!          --
!          --    private declarations -> terminate
!          --    visible declarations -> terminate
!          --    statements           -> terminate
!          --    declarations         -> terminate
  
!          if Nkind (Parent (Start)) = N_Compilation_Unit then
!             raise ECR_Found;
  
!          --  Otherwise the input node is still within some list
  
!          else
!             Curr := Prev (Start);
!          end if;
!       end Include;
  
!       -----------------------------------
!       -- Is_OK_Preelaborable_Construct --
!       -----------------------------------
  
!       function Is_OK_Preelaborable_Construct (N : Node_Id) return Boolean is
!       begin
!          --  Assignment statements are acceptable as long as they were produced
!          --  by the ABE mechanism to update elaboration flags.
  
!          if Nkind (N) = N_Assignment_Statement then
!             return Is_Elaboration_Code (N);
  
!          --  Block statements are acceptable even though they directly violate
!          --  preelaborability. The intention is not to penalize the early call
!          --  region when a block contains only preelaborable constructs.
           --
!          --    declare
!          --       Val : constant Integer := 1;
!          --    begin
!          --       pragma Assert (Val = 1);
!          --       null;
!          --    end;
           --
!          --  Note that the Advancement phase does enter blocks, and will detect
!          --  any non-preelaborable declarations or statements within.
  
!          elsif Nkind (N) = N_Block_Statement then
!             return True;
!          end if;
  
!          --  Otherwise the construct must be preelaborable. The check must take
!          --  the syntactic and semantic structure of the construct. DO NOT use
!          --  Is_Preelaborable_Construct here.
  
!          return not Is_Non_Preelaborable_Construct (N);
!       end Is_OK_Preelaborable_Construct;
  
!       ---------------------------
!       -- Is_Suitable_Construct --
!       ---------------------------
  
!       function Is_Suitable_Construct (N : Node_Id) return Boolean is
!          Context : constant Node_Id := Parent (N);
  
!       begin
!          --  An internally-generated statement sequence which contains only a
!          --  single null statement is not a suitable construct because it is a
!          --  byproduct of the parser. Such a null statement should be excluded
!          --  from the early call region because it carries the source location
!          --  of the "end" keyword, and may lead to confusing diagnistics.
  
!          if Nkind (N) = N_Null_Statement
!            and then not Comes_From_Source (N)
!            and then Present (Context)
!            and then Nkind (Context) = N_Handled_Sequence_Of_Statements
           then
!             return False;
           end if;
  
!          --  Otherwise only constructs which correspond to pure Ada constructs
!          --  are considered suitable.
  
!          case Nkind (N) is
!             when N_Call_Marker
!                | N_Freeze_Entity
!                | N_Freeze_Generic_Entity
!                | N_Implicit_Label_Declaration
!                | N_Itype_Reference
!                | N_Pop_Constraint_Error_Label
!                | N_Pop_Program_Error_Label
!                | N_Pop_Storage_Error_Label
!                | N_Push_Constraint_Error_Label
!                | N_Push_Program_Error_Label
!                | N_Push_Storage_Error_Label
!                | N_SCIL_Dispatch_Table_Tag_Init
!                | N_SCIL_Dispatching_Call
!                | N_SCIL_Membership_Test
!                | N_Variable_Reference_Marker
!             =>
!                return False;
  
!             when others =>
!                return True;
!          end case;
!       end Is_Suitable_Construct;
  
!       ----------------------------------
!       -- Transition_Body_Declarations --
!       ----------------------------------
  
!       procedure Transition_Body_Declarations
!         (Bod  : Node_Id;
!          Curr : out Node_Id)
        is
!          Decls : constant List_Id := Declarations (Bod);
  
        begin
!          --  The search must come from the declarations of the body
  
!          pragma Assert
!            (Is_Non_Empty_List (Decls)
!              and then List_Containing (Start) = Decls);
  
!          --  The search finished inspecting the declarations. The construct
!          --  to inspect is the node which precedes the handled body, unless
!          --  the body is a compilation unit. The transitions are:
!          --
!          --    declarations -> upper level
!          --    declarations -> corresponding package spec (Elab_Body)
!          --    declarations -> terminate
  
!          Transition_Unit (Bod, Curr);
!       end Transition_Body_Declarations;
  
!       -----------------------------------
!       -- Transition_Handled_Statements --
!       -----------------------------------
  
!       procedure Transition_Handled_Statements
!         (HSS  : Node_Id;
!          Curr : out Node_Id)
        is
!          Bod   : constant Node_Id := Parent (HSS);
!          Decls : constant List_Id := Declarations (Bod);
!          Stmts : constant List_Id := Statements (HSS);
  
        begin
!          --  The search must come from the statements of certain bodies or
!          --  statements.
  
!          pragma Assert (Nkind_In (Bod, N_Block_Statement,
!                                        N_Entry_Body,
!                                        N_Package_Body,
!                                        N_Protected_Body,
!                                        N_Subprogram_Body,
!                                        N_Task_Body));
  
!          --  The search must come from the statements of the handled sequence
  
!          pragma Assert
!            (Is_Non_Empty_List (Stmts)
!              and then List_Containing (Start) = Stmts);
  
!          --  The search finished inspecting the statements. The handled body
!          --  has non-empty declarations. The construct to inspect is the last
!          --  declaration. The transitions are:
           --
!          --    statements -> declarations
  
!          if Has_Suitable_Construct (Decls) then
!             Curr := Last (Decls);
  
!          --  Otherwise the handled body lacks declarations. The construct to
!          --  inspect is the node which precedes the handled body, unless the
!          --  body is a compilation unit. The transitions are:
!          --
!          --    statements -> upper level
!          --    statements -> corresponding package spec (Elab_Body)
!          --    statements -> terminate
  
           else
!             Transition_Unit (Bod, Curr);
           end if;
!       end Transition_Handled_Statements;
  
!       ----------------------------------
!       -- Transition_Spec_Declarations --
!       ----------------------------------
  
!       procedure Transition_Spec_Declarations
!         (Spec : Node_Id;
!          Curr : out Node_Id)
        is
!          Prv_Decls : constant List_Id := Private_Declarations (Spec);
!          Vis_Decls : constant List_Id := Visible_Declarations (Spec);
  
!       begin
!          pragma Assert (Present (Start) and then Is_List_Member (Start));
  
!          --  The search came from the private declarations and finished their
!          --  inspection.
  
!          if Has_Suitable_Construct (Prv_Decls)
!            and then List_Containing (Start) = Prv_Decls
!          then
!             --  The context has non-empty visible declarations. The node to
!             --  inspect is the last visible declaration. The transitions are:
!             --
!             --    private declarations -> visible declarations
  
!             if Has_Suitable_Construct (Vis_Decls) then
!                Curr := Last (Vis_Decls);
  
!             --  Otherwise the context lacks visible declarations. The construct
!             --  to inspect is the node which precedes the context unless the
!             --  context is a compilation unit. The transitions are:
!             --
!             --    private declarations -> upper level
!             --    private declarations -> terminate
  
!             else
!                Transition_Unit (Parent (Spec), Curr);
              end if;
  
!          --  The search came from the visible declarations and finished their
!          --  inspections. The construct to inspect is the node which precedes
!          --  the context, unless the context is a compilaton unit. The
!          --  transitions are:
!          --
!          --    visible declarations -> upper level
!          --    visible declarations -> terminate
  
!          elsif Has_Suitable_Construct (Vis_Decls)
!            and then List_Containing (Start) = Vis_Decls
!          then
!             Transition_Unit (Parent (Spec), Curr);
  
!          --  At this point both declarative lists are empty, but the traversal
!          --  still came from within the spec. This indicates that the invariant
!          --  of the algorithm has been violated.
  
!          else
!             pragma Assert (False);
!             raise ECR_Found;
           end if;
-       end Transition_Spec_Declarations;
  
!       ---------------------
!       -- Transition_Unit --
!       ---------------------
  
!       procedure Transition_Unit
!         (Unit : Node_Id;
!          Curr : out Node_Id)
!       is
!          Context : constant Node_Id := Parent (Unit);
  
!       begin
!          --  The unit is a compilation unit. This terminates the search because
!          --  there are no more lists to inspect and there are no more enclosing
!          --  constructs to climb up to.
  
!          if Nkind (Context) = N_Compilation_Unit then
  
!             --  A package body with a corresponding spec subject to pragma
!             --  Elaborate_Body is an exception to the above. The annotation
!             --  allows the search to continue into the package declaration.
!             --  The transitions are:
!             --
!             --    statements   -> corresponding package spec (Elab_Body)
!             --    declarations -> corresponding package spec (Elab_Body)
  
!             if Nkind (Unit) = N_Package_Body
!               and then (Assume_Elab_Body
!                          or else Has_Pragma_Elaborate_Body
!                                    (Corresponding_Spec (Unit)))
!             then
!                Curr := Unit_Declaration_Node (Corresponding_Spec (Unit));
!                Enter_Package_Declaration (Curr);
  
!             --  Otherwise terminate the search. The transitions are:
!             --
!             --    private declarations -> terminate
!             --    visible declarations -> terminate
!             --    statements           -> terminate
!             --    declarations         -> terminate
  
              else
!                raise ECR_Found;
              end if;
  
!          --  The unit is a subunit. The construct to inspect is the node which
!          --  precedes the corresponding stub. Update the early call region to
!          --  include the unit.
  
!          elsif Nkind (Context) = N_Subunit then
!             Start := Unit;
!             Curr  := Corresponding_Stub (Context);
  
!          --  Otherwise the unit is nested. The construct to inspect is the node
!          --  which precedes the unit. Update the early call region to include
!          --  the unit.
  
!          else
!             Include (Unit, Curr);
!          end if;
!       end Transition_Unit;
  
!       --  Local variables
  
!       Body_Id : constant Entity_Id := Defining_Entity (Body_Decl);
!       Region  : Node_Id;
  
!    --  Start of processing for Find_Early_Call_Region
  
!    begin
!       --  The caller demands the start of the early call region without saving
!       --  or retrieving it to/from internal data structures.
  
!       if Skip_Memoization then
!          Region := Find_ECR (Body_Decl);
  
!       --  Default behavior
  
!       else
!          --  Check whether the early call region of the subprogram body is
!          --  available.
  
!          Region := Early_Call_Region (Body_Id);
  
!          if No (Region) then
  
!             --  Traverse the declarations in reverse order, starting from the
!             --  subprogram body, searching for the nearest non-preelaborable
!             --  construct. The early call region starts after this construct
!             --  and ends at the subprogram body.
  
!             Region := Find_ECR (Body_Decl);
  
!             --  Associate the early call region with the subprogram body in
!             --  case other scenarios need it.
  
!             Set_Early_Call_Region (Body_Id, Region);
!          end if;
!       end if;
  
!       --  A subprogram body must always have an early call region
  
!       pragma Assert (Present (Region));
  
!       return Region;
!    end Find_Early_Call_Region;
  
!    ---------------------------
!    -- Find_Elaborated_Units --
!    ---------------------------
  
!    procedure Find_Elaborated_Units is
!       procedure Add_Pragma (Prag : Node_Id);
!       --  Determine whether pragma Prag denotes a legal Elaborate[_All] pragma.
!       --  If this is the case, add the related unit to the elaboration context.
!       --  For pragma Elaborate_All, include recursively all units withed by the
!       --  related unit.
  
!       procedure Add_Unit
!         (Unit_Id      : Entity_Id;
!          Prag         : Node_Id;
!          Full_Context : Boolean);
!       --  Add unit Unit_Id to the elaboration context. Prag denotes the pragma
!       --  which prompted the inclusion of the unit to the elaboration context.
!       --  If flag Full_Context is set, examine the nonlimited clauses of unit
!       --  Unit_Id and add each withed unit to the context.
  
!       procedure Find_Elaboration_Context (Comp_Unit : Node_Id);
!       --  Examine the context items of compilation unit Comp_Unit for suitable
!       --  elaboration-related pragmas and add all related units to the context.
  
!       ----------------
!       -- Add_Pragma --
!       ----------------
  
!       procedure Add_Pragma (Prag : Node_Id) is
!          Prag_Args : constant List_Id := Pragma_Argument_Associations (Prag);
!          Prag_Nam  : constant Name_Id := Pragma_Name (Prag);
!          Unit_Arg  : Node_Id;
  
!       begin
!          --  Nothing to do if the pragma is not related to elaboration
  
!          if not Nam_In (Prag_Nam, Name_Elaborate, Name_Elaborate_All) then
!             return;
  
!          --  Nothing to do when the pragma is illegal
  
-          elsif Error_Posted (Prag) then
              return;
           end if;
  
!          Unit_Arg := Get_Pragma_Arg (First (Prag_Args));
  
!          --  The argument of the pragma may appear in package.package form
  
!          if Nkind (Unit_Arg) = N_Selected_Component then
!             Unit_Arg := Selector_Name (Unit_Arg);
           end if;
  
!          Add_Unit
!            (Unit_Id      => Entity (Unit_Arg),
!             Prag         => Prag,
!             Full_Context => Prag_Nam = Name_Elaborate_All);
!       end Add_Pragma;
  
!       --------------
!       -- Add_Unit --
!       --------------
  
!       procedure Add_Unit
          (Unit_Id      : Entity_Id;
!          Prag         : Node_Id;
!          Full_Context : Boolean)
        is
!          Clause     : Node_Id;
!          Elab_Attrs : Elaboration_Attributes;
  
        begin
!          --  Nothing to do when some previous error left a with clause or a
!          --  pragma in a bad state.
  
!          if No (Unit_Id) then
!             return;
           end if;
  
!          Elab_Attrs := Elaboration_Status (Unit_Id);
  
!          --  The unit is already included in the context by means of pragma
!          --  Elaborate[_All].
  
!          if Present (Elab_Attrs.Source_Pragma) then
  
!             --  Upgrade an existing pragma Elaborate when the unit is subject
!             --  to Elaborate_All because the new pragma covers a larger set of
!             --  units.
  
!             if Pragma_Name (Elab_Attrs.Source_Pragma) = Name_Elaborate
!               and then Pragma_Name (Prag) = Name_Elaborate_All
!             then
!                Elab_Attrs.Source_Pragma := Prag;
  
!             --  Otherwise the unit retains its existing pragma and does not
!             --  need to be included in the context again.
  
              else
                 return;
              end if;
  
!          --  The current unit is not part of the context. Prepare a new set of
!          --  attributes.
  
!          else
!             Elab_Attrs :=
!               Elaboration_Attributes'(Source_Pragma => Prag,
!                                       With_Clause   => Empty);
!          end if;
  
!          --  Add or update the attributes of the unit
  
!          Set_Elaboration_Status (Unit_Id, Elab_Attrs);
  
!          --  Includes all units withed by the current one when computing the
!          --  full context.
  
!          if Full_Context then
  
!             --  Process all nonlimited with clauses found in the context of
!             --  the current unit. Note that limited clauses do not impose an
!             --  elaboration order.
  
!             Clause := First (Context_Items (Compilation_Unit (Unit_Id)));
!             while Present (Clause) loop
!                if Nkind (Clause) = N_With_Clause
!                  and then not Error_Posted (Clause)
!                  and then not Limited_Present (Clause)
!                then
!                   Add_Unit
!                     (Unit_Id      => Entity (Name (Clause)),
!                      Prag         => Prag,
!                      Full_Context => Full_Context);
!                end if;
  
!                Next (Clause);
!             end loop;
!          end if;
!       end Add_Unit;
  
!       ------------------------------
!       -- Find_Elaboration_Context --
!       ------------------------------
  
!       procedure Find_Elaboration_Context (Comp_Unit : Node_Id) is
!          Prag : Node_Id;
  
        begin
!          pragma Assert (Nkind (Comp_Unit) = N_Compilation_Unit);
  
!          --  Process all elaboration-related pragmas found in the context of
!          --  the compilation unit.
  
!          Prag := First (Context_Items (Comp_Unit));
!          while Present (Prag) loop
!             if Nkind (Prag) = N_Pragma then
!                Add_Pragma (Prag);
!             end if;
  
!             Next (Prag);
!          end loop;
!       end Find_Elaboration_Context;
  
!       --  Local variables
  
!       Par_Id : Entity_Id;
!       Unt    : Node_Id;
  
!    --  Start of processing for Find_Elaborated_Units
  
!    begin
!       --  Perform a traversal which examines the context of the main unit and
!       --  populates the Elaboration_Context table with all units elaborated
!       --  prior to the main unit. The traversal performs the following jumps:
  
!       --    subunit        -> parent subunit
!       --    parent subunit -> body
!       --    body           -> spec
!       --    spec           -> parent spec
!       --    parent spec    -> grandparent spec and so on
  
!       --  The traversal relies on units rather than scopes because the scope of
!       --  a subunit is some spec, while this traversal must process the body as
!       --  well. Given that protected and task bodies can also be subunits, this
!       --  complicates the scope approach even further.
  
!       Unt := Unit (Cunit (Main_Unit));
  
!       --  Perform the following traversals when the main unit is a subunit
  
!       --    subunit        -> parent subunit
!       --    parent subunit -> body
  
!       while Present (Unt) and then Nkind (Unt) = N_Subunit loop
!          Find_Elaboration_Context (Parent (Unt));
  
!          --  Continue the traversal by going to the unit which contains the
!          --  corresponding stub.
  
!          if Present (Corresponding_Stub (Unt)) then
!             Unt := Unit (Cunit (Get_Source_Unit (Corresponding_Stub (Unt))));
  
!          --  Otherwise the subunit may be erroneous or left in a bad state
  
           else
!             exit;
!          end if;
!       end loop;
  
!       --  Perform the following traversal now that subunits have been taken
!       --  care of, or the main unit is a body.
  
!       --    body -> spec
  
!       if Present (Unt)
!         and then Nkind_In (Unt, N_Package_Body, N_Subprogram_Body)
!       then
!          Find_Elaboration_Context (Parent (Unt));
  
!          --  Continue the traversal by going to the unit which contains the
!          --  corresponding spec.
  
!          if Present (Corresponding_Spec (Unt)) then
!             Unt := Unit (Cunit (Get_Source_Unit (Corresponding_Spec (Unt))));
           end if;
!       end if;
  
!       --  Perform the following traversals now that the body has been taken
!       --  care of, or the main unit is a spec.
  
!       --    spec        -> parent spec
!       --    parent spec -> grandparent spec and so on
  
!       if Present (Unt)
!         and then Nkind_In (Unt, N_Generic_Package_Declaration,
!                                 N_Generic_Subprogram_Declaration,
!                                 N_Package_Declaration,
!                                 N_Subprogram_Declaration)
!       then
!          Find_Elaboration_Context (Parent (Unt));
  
!          --  Process a potential chain of parent units which ends with the
!          --  main unit spec. The traversal can now safely rely on the scope
!          --  chain.
  
!          Par_Id := Scope (Defining_Entity (Unt));
!          while Present (Par_Id) and then Par_Id /= Standard_Standard loop
!             Find_Elaboration_Context (Compilation_Unit (Par_Id));
  
!             Par_Id := Scope (Par_Id);
!          end loop;
!       end if;
!    end Find_Elaborated_Units;
  
     -----------------------------
     -- Find_Enclosing_Instance --
     -----------------------------
  
     function Find_Enclosing_Instance (N : Node_Id) return Node_Id is
!       Par     : Node_Id;
!       Spec_Id : Entity_Id;
  
     begin
        --  Climb the parent chain looking for an enclosing instance spec or body
  
        Par := N;
        while Present (Par) loop
! 
!          --  Generic package or subprogram spec
! 
!          if Nkind_In (Par, N_Package_Declaration,
                             N_Subprogram_Declaration)
!            and then Is_Generic_Instance (Defining_Entity (Par))
           then
              return Par;
- 
-          --  Generic package or subprogram body
- 
-          elsif Nkind_In (Par, N_Package_Body, N_Subprogram_Body) then
-             Spec_Id := Corresponding_Spec (Par);
- 
-             if Present (Spec_Id) and then Is_Generic_Instance (Spec_Id) then
-                return Par;
-             end if;
           end if;
  
           Par := Parent (Par);
--- 3957,8889 ----
        --  Elaboration_Checks which appears on the initial declaration of the
        --  main unit.
  
!       Install_Elaboration_Model (Unit_Entity (Main_Unit_Entity));
  
        --  Examine the context of the main unit and record all units with prior
        --  elaboration with respect to it.
  
!       Collect_Elaborated_Units;
  
!       --  Examine all scenarios saved during the Recording phase applying the
!       --  Ada or SPARK elaboration rules in order to detect and diagnose ABE
!       --  issues, install conditional ABE checks, and ensure the elaboration
!       --  of units.
  
!       Iter := Iterate_Declaration_Scenarios;
!       Check_Conditional_ABE_Scenarios (Iter);
  
!       Iter := Iterate_Library_Body_Scenarios;
!       Check_Conditional_ABE_Scenarios (Iter);
! 
!       Iter := Iterate_Library_Spec_Scenarios;
!       Check_Conditional_ABE_Scenarios (Iter);
  
        --  Examine each SPARK scenario saved during the Recording phase which
        --  is not necessarily executable during elaboration, but still requires
        --  elaboration-related checks.
  
!       Check_SPARK_Scenarios;
! 
!       --  Add conditional ABE checks for all scenarios that require one when
!       --  the dynamic model is in effect.
! 
!       Install_Dynamic_ABE_Checks;
! 
!       --  Examine all scenarios saved during the Recording phase along with
!       --  invocation constructs within the spec and body of the main unit.
!       --  Record the declarations and paths that reach into an external unit
!       --  in the ALI file of the main unit.
! 
!       Record_Invocation_Graph;
! 
!       --  Destroy all internal data structures and complete the elaboration
!       --  phase of the compiler.
! 
!       Finalize_All_Data_Structures;
!       Set_Elaboration_Phase (Completed);
     end Check_Elaboration_Scenarios;
  
!    ---------------------
!    -- Check_Installer --
!    ---------------------
  
!    package body Check_Installer is
  
!       -----------------------
!       -- Local subprograms --
!       -----------------------
  
!       function ABE_Check_Or_Failure_OK
!         (N       : Node_Id;
!          Targ_Id : Entity_Id;
!          Unit_Id : Entity_Id) return Boolean;
!       pragma Inline (ABE_Check_Or_Failure_OK);
!       --  Determine whether a conditional ABE check or guaranteed ABE failure
!       --  can be installed for scenario N with target Targ_Id which resides in
!       --  unit Unit_Id.
! 
!       function Insertion_Node (N : Node_Id) return Node_Id;
!       pragma Inline (Insertion_Node);
!       --  Obtain the proper insertion node of an ABE check or failure for
!       --  scenario N.
! 
!       procedure Insert_ABE_Check_Or_Failure (N : Node_Id; Check : Node_Id);
!       pragma Inline (Insert_ABE_Check_Or_Failure);
!       --  Insert conditional ABE check or guaranteed ABE failure Check prior to
!       --  scenario N.
! 
!       procedure Install_Scenario_ABE_Check_Common
!         (N        : Node_Id;
!          Targ_Id  : Entity_Id;
!          Targ_Rep : Target_Rep_Id);
!       pragma Inline (Install_Scenario_ABE_Check_Common);
!       --  Install a conditional ABE check for scenario N to ensure that target
!       --  Targ_Id is properly elaborated. Targ_Rep is the representation of the
!       --  target.
! 
!       procedure Install_Scenario_ABE_Failure_Common (N : Node_Id);
!       pragma Inline (Install_Scenario_ABE_Failure_Common);
!       --  Install a guaranteed ABE failure for scenario N
! 
!       procedure Install_Unit_ABE_Check_Common
!         (N       : Node_Id;
!          Unit_Id : Entity_Id);
!       pragma Inline (Install_Unit_ABE_Check_Common);
!       --  Install a conditional ABE check for scenario N to ensure that unit
!       --  Unit_Id is properly elaborated.
! 
!       -----------------------------
!       -- ABE_Check_Or_Failure_OK --
!       -----------------------------
! 
!       function ABE_Check_Or_Failure_OK
!         (N       : Node_Id;
!          Targ_Id : Entity_Id;
!          Unit_Id : Entity_Id) return Boolean
!       is
!          pragma Unreferenced (Targ_Id);
! 
!          Ins_Node : constant Node_Id := Insertion_Node (N);
  
        begin
!          if not Check_Or_Failure_Generation_OK then
!             return False;
  
!          --  Nothing to do when the scenario denots a compilation unit because
!          --  there is no executable environment at that level.
! 
!          elsif Nkind (Parent (Ins_Node)) = N_Compilation_Unit then
              return False;
  
!          --  An ABE check or failure is not needed when the target is defined
!          --  in a unit which is elaborated prior to the main unit. This check
!          --  must also consider the following cases:
!          --
!          --  * The unit of the target appears in the context of the main unit
!          --
!          --  * The unit of the target is subject to pragma Elaborate_Body. An
!          --    ABE check MUST NOT be generated because the unit is always
!          --    elaborated prior to the main unit.
!          --
!          --  * The unit of the target is the main unit. An ABE check MUST be
!          --    added in this case because a conditional ABE may be raised
!          --    depending on the flow of execution within the main unit (flag
!          --    Same_Unit_OK is False).
  
!          elsif Has_Prior_Elaboration
!                  (Unit_Id      => Unit_Id,
!                   Context_OK   => True,
!                   Elab_Body_OK => True)
!          then
!             return False;
           end if;
  
!          return True;
!       end ABE_Check_Or_Failure_OK;
  
!       ------------------------------------
!       -- Check_Or_Failure_Generation_OK --
!       ------------------------------------
  
!       function Check_Or_Failure_Generation_OK return Boolean is
!       begin
!          --  An ABE check or failure is not needed when the compilation will
!          --  not produce an executable.
  
!          if Serious_Errors_Detected > 0 then
!             return False;
  
!          --  An ABE check or failure must not be installed when compiling for
!          --  GNATprove because raise statements are not supported.
  
!          elsif GNATprove_Mode then
!             return False;
!          end if;
  
!          return True;
!       end Check_Or_Failure_Generation_OK;
  
!       --------------------
!       -- Insertion_Node --
!       --------------------
  
!       function Insertion_Node (N : Node_Id) return Node_Id is
!       begin
!          --  When the scenario denotes an instantiation, the proper insertion
!          --  node is the instance spec. This ensures that the generic actuals
!          --  will not be evaluated prior to a potential ABE.
  
!          if Nkind (N) in N_Generic_Instantiation
!            and then Present (Instance_Spec (N))
!          then
!             return Instance_Spec (N);
  
!          --  Otherwise the proper insertion node is the scenario itself
  
!          else
!             return N;
!          end if;
!       end Insertion_Node;
  
!       ---------------------------------
!       -- Insert_ABE_Check_Or_Failure --
!       ---------------------------------
  
!       procedure Insert_ABE_Check_Or_Failure (N : Node_Id; Check : Node_Id) is
!          Ins_Nod : constant Node_Id   := Insertion_Node (N);
!          Scop_Id : constant Entity_Id := Find_Enclosing_Scope (Ins_Nod);
  
!       begin
!          --  Install the nearest enclosing scope of the scenario as there must
!          --  be something on the scope stack.
  
!          Push_Scope (Scop_Id);
  
!          Insert_Action (Ins_Nod, Check);
  
!          Pop_Scope;
!       end Insert_ABE_Check_Or_Failure;
  
!       --------------------------------
!       -- Install_Dynamic_ABE_Checks --
!       --------------------------------
  
!       procedure Install_Dynamic_ABE_Checks is
!          Iter : NE_Set.Iterator;
!          N    : Node_Id;
  
!       begin
!          if not Check_Or_Failure_Generation_OK then
!             return;
  
!          --  Nothing to do if the dynamic model is not in effect
  
!          elsif not Dynamic_Elaboration_Checks then
!             return;
!          end if;
  
!          --  Install a conditional ABE check for each saved scenario
! 
!          Iter := Iterate_Dynamic_ABE_Check_Scenarios;
!          while NE_Set.Has_Next (Iter) loop
!             NE_Set.Next (Iter, N);
! 
!             Process_Conditional_ABE
!               (N        => N,
!                In_State => Dynamic_Model_State);
!          end loop;
!       end Install_Dynamic_ABE_Checks;
  
        --------------------------------
!       -- Install_Scenario_ABE_Check --
        --------------------------------
  
!       procedure Install_Scenario_ABE_Check
!         (N        : Node_Id;
!          Targ_Id  : Entity_Id;
!          Targ_Rep : Target_Rep_Id;
!          Disable  : Scenario_Rep_Id)
        is
        begin
!          --  Nothing to do when the scenario does not need an ABE check
  
!          if not ABE_Check_Or_Failure_OK
!                   (N       => N,
!                    Targ_Id => Targ_Id,
!                    Unit_Id => Unit (Targ_Rep))
!          then
              return;
           end if;
  
!          --  Prevent multiple attempts to install the same ABE check
  
!          Disable_Elaboration_Checks (Disable);
  
!          Install_Scenario_ABE_Check_Common
!            (N        => N,
!             Targ_Id  => Targ_Id,
!             Targ_Rep => Targ_Rep);
!       end Install_Scenario_ABE_Check;
! 
!       --------------------------------
!       -- Install_Scenario_ABE_Check --
!       --------------------------------
! 
!       procedure Install_Scenario_ABE_Check
!         (N        : Node_Id;
!          Targ_Id  : Entity_Id;
!          Targ_Rep : Target_Rep_Id;
!          Disable  : Target_Rep_Id)
!       is
!       begin
!          --  Nothing to do when the scenario does not need an ABE check
! 
!          if not ABE_Check_Or_Failure_OK
!                   (N       => N,
!                    Targ_Id => Targ_Id,
!                    Unit_Id => Unit (Targ_Rep))
!          then
              return;
+          end if;
  
!          --  Prevent multiple attempts to install the same ABE check
  
!          Disable_Elaboration_Checks (Disable);
  
!          Install_Scenario_ABE_Check_Common
!            (N        => N,
!             Targ_Id  => Targ_Id,
!             Targ_Rep => Targ_Rep);
!       end Install_Scenario_ABE_Check;
  
!       ---------------------------------------
!       -- Install_Scenario_ABE_Check_Common --
!       ---------------------------------------
  
!       procedure Install_Scenario_ABE_Check_Common
!         (N        : Node_Id;
!          Targ_Id  : Entity_Id;
!          Targ_Rep : Target_Rep_Id)
!       is
!          Targ_Body : constant Node_Id := Body_Declaration (Targ_Rep);
!          Targ_Decl : constant Node_Id := Spec_Declaration (Targ_Rep);
  
!          pragma Assert (Present (Targ_Body));
!          pragma Assert (Present (Targ_Decl));
  
!          procedure Build_Elaboration_Entity;
!          pragma Inline (Build_Elaboration_Entity);
!          --  Create a new elaboration flag for Targ_Id, insert it prior to
!          --  Targ_Decl, and set it after Targ_Body.
  
!          ------------------------------
!          -- Build_Elaboration_Entity --
!          ------------------------------
  
!          procedure Build_Elaboration_Entity is
!             Loc     : constant Source_Ptr := Sloc (Targ_Id);
!             Flag_Id : Entity_Id;
  
!          begin
!             --  Nothing to do if the target has an elaboration flag
  
!             if Present (Elaboration_Entity (Targ_Id)) then
!                return;
!             end if;
  
!             --  Create the declaration of the elaboration flag. The name
!             --  carries a unique counter in case the name is overloaded.
  
!             Flag_Id :=
!               Make_Defining_Identifier (Loc,
!                 Chars => New_External_Name (Chars (Targ_Id), 'E', -1));
  
!             Set_Elaboration_Entity          (Targ_Id, Flag_Id);
!             Set_Elaboration_Entity_Required (Targ_Id);
  
!             Push_Scope (Scope (Targ_Id));
  
!             --  Generate:
!             --    Enn : Short_Integer := 0;
  
!             Insert_Action (Targ_Decl,
!               Make_Object_Declaration (Loc,
!                 Defining_Identifier => Flag_Id,
!                 Object_Definition   =>
!                   New_Occurrence_Of (Standard_Short_Integer, Loc),
!                 Expression          => Make_Integer_Literal (Loc, Uint_0)));
  
!             --  Generate:
!             --    Enn := 1;
  
!             Set_Elaboration_Flag (Targ_Body, Targ_Id);
  
!             Pop_Scope;
!          end Build_Elaboration_Entity;
  
!          --  Local variables
  
!          Loc  : constant Source_Ptr := Sloc (N);
  
!       --  Start for processing for Install_Scenario_ABE_Check_Common
  
!       begin
!          --  Create an elaboration flag for the target when it does not have
!          --  one.
  
!          Build_Elaboration_Entity;
  
!          --  Generate:
!          --    if not Targ_Id'Elaborated then
!          --       raise Program_Error with "access before elaboration";
!          --    end if;
  
!          Insert_ABE_Check_Or_Failure
!            (N     => N,
!             Check =>
!               Make_Raise_Program_Error (Loc,
!                 Condition =>
!                   Make_Op_Not (Loc,
!                     Right_Opnd =>
!                       Make_Attribute_Reference (Loc,
!                         Prefix         => New_Occurrence_Of (Targ_Id, Loc),
!                         Attribute_Name => Name_Elaborated)),
!                 Reason    => PE_Access_Before_Elaboration));
!       end Install_Scenario_ABE_Check_Common;
  
!       ----------------------------------
!       -- Install_Scenario_ABE_Failure --
!       ----------------------------------
  
!       procedure Install_Scenario_ABE_Failure
!         (N        : Node_Id;
!          Targ_Id  : Entity_Id;
!          Targ_Rep : Target_Rep_Id;
!          Disable  : Scenario_Rep_Id)
!       is
!       begin
!          --  Nothing to do when the scenario does not require an ABE failure
! 
!          if not ABE_Check_Or_Failure_OK
!                   (N       => N,
!                    Targ_Id => Targ_Id,
!                    Unit_Id => Unit (Targ_Rep))
!          then
!             return;
           end if;
  
!          --  Prevent multiple attempts to install the same ABE check
  
!          Disable_Elaboration_Checks (Disable);
  
!          Install_Scenario_ABE_Failure_Common (N);
!       end Install_Scenario_ABE_Failure;
  
+       ----------------------------------
+       -- Install_Scenario_ABE_Failure --
+       ----------------------------------
+ 
+       procedure Install_Scenario_ABE_Failure
+         (N        : Node_Id;
+          Targ_Id  : Entity_Id;
+          Targ_Rep : Target_Rep_Id;
+          Disable  : Target_Rep_Id)
+       is
        begin
!          --  Nothing to do when the scenario does not require an ABE failure
  
!          if not ABE_Check_Or_Failure_OK
!                   (N       => N,
!                    Targ_Id => Targ_Id,
!                    Unit_Id => Unit (Targ_Rep))
!          then
!             return;
!          end if;
  
!          --  Prevent multiple attempts to install the same ABE check
  
!          Disable_Elaboration_Checks (Disable);
  
!          Install_Scenario_ABE_Failure_Common (N);
!       end Install_Scenario_ABE_Failure;
! 
!       -----------------------------------------
!       -- Install_Scenario_ABE_Failure_Common --
!       -----------------------------------------
! 
!       procedure Install_Scenario_ABE_Failure_Common (N : Node_Id) is
!          Loc : constant Source_Ptr := Sloc (N);
! 
!       begin
!          --  Generate:
!          --    raise Program_Error with "access before elaboration";
! 
!          Insert_ABE_Check_Or_Failure
!            (N     => N,
!             Check =>
!               Make_Raise_Program_Error (Loc,
!                 Reason => PE_Access_Before_Elaboration));
!       end Install_Scenario_ABE_Failure_Common;
  
        ----------------------------
!       -- Install_Unit_ABE_Check --
        ----------------------------
  
!       procedure Install_Unit_ABE_Check
!         (N       : Node_Id;
!          Unit_Id : Entity_Id;
!          Disable : Scenario_Rep_Id)
        is
!          Spec_Id : constant Entity_Id  := Unique_Entity (Unit_Id);
  
        begin
!          --  Nothing to do when the scenario does not require an ABE check
  
!          if not ABE_Check_Or_Failure_OK
!                   (N       => N,
!                    Targ_Id => Empty,
!                    Unit_Id => Spec_Id)
!          then
!             return;
!          end if;
  
!          --  Prevent multiple attempts to install the same ABE check
  
!          Disable_Elaboration_Checks (Disable);
  
!          Install_Unit_ABE_Check_Common
!            (N       => N,
!             Unit_Id => Unit_Id);
!       end Install_Unit_ABE_Check;
  
!       ----------------------------
!       -- Install_Unit_ABE_Check --
!       ----------------------------
  
!       procedure Install_Unit_ABE_Check
!         (N       : Node_Id;
!          Unit_Id : Entity_Id;
!          Disable : Target_Rep_Id)
!       is
!          Spec_Id : constant Entity_Id  := Unique_Entity (Unit_Id);
  
!       begin
!          --  Nothing to do when the scenario does not require an ABE check
  
!          if not ABE_Check_Or_Failure_OK
!                   (N       => N,
!                    Targ_Id => Empty,
!                    Unit_Id => Spec_Id)
!          then
!             return;
!          end if;
  
!          --  Prevent multiple attempts to install the same ABE check
  
!          Disable_Elaboration_Checks (Disable);
  
!          Install_Unit_ABE_Check_Common
!            (N       => N,
!             Unit_Id => Unit_Id);
!       end Install_Unit_ABE_Check;
  
!       -----------------------------------
!       -- Install_Unit_ABE_Check_Common --
!       -----------------------------------
  
!       procedure Install_Unit_ABE_Check_Common
!         (N       : Node_Id;
!          Unit_Id : Entity_Id)
!       is
!          Loc     : constant Source_Ptr := Sloc (N);
!          Spec_Id : constant Entity_Id  := Unique_Entity (Unit_Id);
  
!       begin
!          --  Generate:
!          --    if not Spec_Id'Elaborated then
!          --       raise Program_Error with "access before elaboration";
!          --    end if;
  
!          Insert_ABE_Check_Or_Failure
!            (N     => N,
!             Check =>
!               Make_Raise_Program_Error (Loc,
!                 Condition =>
!                   Make_Op_Not (Loc,
!                     Right_Opnd =>
!                       Make_Attribute_Reference (Loc,
!                         Prefix         => New_Occurrence_Of (Spec_Id, Loc),
!                         Attribute_Name => Name_Elaborated)),
!                 Reason    => PE_Access_Before_Elaboration));
!       end Install_Unit_ABE_Check_Common;
!    end Check_Installer;
  
!    ----------------------
!    -- Compilation_Unit --
!    ----------------------
  
!    function Compilation_Unit (Unit_Id : Entity_Id) return Node_Id is
!       Comp_Unit : Node_Id;
  
     begin
!       Comp_Unit := Parent (Unit_Id);
  
!       --  Handle the case where a concurrent subunit is rewritten as a null
!       --  statement due to expansion activities.
  
!       if Nkind (Comp_Unit) = N_Null_Statement
!         and then Nkind_In (Original_Node (Comp_Unit), N_Protected_Body,
!                                                       N_Task_Body)
!       then
!          Comp_Unit := Parent (Comp_Unit);
!          pragma Assert (Nkind (Comp_Unit) = N_Subunit);
  
!       --  Otherwise use the declaration node of the unit
  
!       else
!          Comp_Unit := Parent (Unit_Declaration_Node (Unit_Id));
!       end if;
  
!       --  Handle the case where a subprogram instantiation which acts as a
!       --  compilation unit is expanded into an anonymous package that wraps
!       --  the instantiated subprogram.
  
!       if Nkind (Comp_Unit) = N_Package_Specification
!         and then Nkind_In (Original_Node (Parent (Comp_Unit)),
!                            N_Function_Instantiation,
!                            N_Procedure_Instantiation)
        then
!          Comp_Unit := Parent (Parent (Comp_Unit));
! 
!       --  Handle the case where the compilation unit is a subunit
! 
!       elsif Nkind (Comp_Unit) = N_Subunit then
!          Comp_Unit := Parent (Comp_Unit);
        end if;
  
!       pragma Assert (Nkind (Comp_Unit) = N_Compilation_Unit);
  
!       return Comp_Unit;
!    end Compilation_Unit;
  
!    -------------------------------
!    -- Conditional_ABE_Processor --
!    -------------------------------
  
!    package body Conditional_ABE_Processor is
  
!       -----------------------
!       -- Local subprograms --
!       -----------------------
  
!       function Is_Conditional_ABE_Scenario (N : Node_Id) return Boolean;
!       pragma Inline (Is_Conditional_ABE_Scenario);
!       --  Determine whether node N is a suitable scenario for conditional ABE
!       --  checks and diagnostics.
  
!       procedure Process_Conditional_ABE_Access_Taken
!         (Attr     : Node_Id;
!          Attr_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Conditional_ABE_Access_Taken);
!       --  Perform ABE checks and diagnostics for attribute reference Attr with
!       --  representation Attr_Rep which takes 'Access of an entry, operator, or
!       --  subprogram. In_State is the current state of the Processing phase.
  
!       procedure Process_Conditional_ABE_Activation
!         (Call     : Node_Id;
!          Call_Rep : Scenario_Rep_Id;
!          Obj_Id   : Entity_Id;
!          Obj_Rep  : Target_Rep_Id;
!          Task_Typ : Entity_Id;
!          Task_Rep : Target_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Conditional_ABE_Activation);
!       --  Perform common conditional ABE checks and diagnostics for activation
!       --  call Call which activates object Obj_Id of task type Task_Typ. Formal
!       --  Call_Rep denotes the representation of the call. Obj_Rep denotes the
!       --  representation of the object. Task_Rep denotes the representation of
!       --  the task type. In_State is the current state of the Processing phase.
  
!       procedure Process_Conditional_ABE_Call
!         (Call     : Node_Id;
!          Call_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Conditional_ABE_Call);
!       --  Top-level dispatcher for processing of calls. Perform ABE checks and
!       --  diagnostics for call Call with representation Call_Rep. In_State is
!       --  the current state of the Processing phase.
  
!       procedure Process_Conditional_ABE_Call_Ada
!         (Call     : Node_Id;
!          Call_Rep : Scenario_Rep_Id;
!          Subp_Id  : Entity_Id;
!          Subp_Rep : Target_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Conditional_ABE_Call_Ada);
!       --  Perform ABE checks and diagnostics for call Call which invokes entry,
!       --  operator, or subprogram Subp_Id using the Ada rules. Call_Rep denotes
!       --  the representation of the call. Subp_Rep denotes the representation
!       --  of the subprogram. In_State is the current state of the Processing
!       --  phase.
  
!       procedure Process_Conditional_ABE_Call_SPARK
!         (Call     : Node_Id;
!          Call_Rep : Scenario_Rep_Id;
!          Subp_Id  : Entity_Id;
!          Subp_Rep : Target_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Conditional_ABE_Call_SPARK);
!       --  Perform ABE checks and diagnostics for call Call which invokes entry,
!       --  operator, or subprogram Subp_Id using the SPARK rules. Call_Rep is
!       --  the representation of the call. Subp_Rep denotes the representation
!       --  of the subprogram. In_State is the current state of the Processing
!       --  phase.
  
!       procedure Process_Conditional_ABE_Instantiation
!         (Inst     : Node_Id;
!          Inst_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Conditional_ABE_Instantiation);
!       --  Top-level dispatcher for processing of instantiations. Perform ABE
!       --  checks and diagnostics for instantiation Inst with representation
!       --  Inst_Rep. In_State is the current state of the Processing phase.
  
!       procedure Process_Conditional_ABE_Instantiation_Ada
!         (Inst     : Node_Id;
!          Inst_Rep : Scenario_Rep_Id;
!          Gen_Id   : Entity_Id;
!          Gen_Rep  : Target_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Conditional_ABE_Instantiation_Ada);
!       --  Perform ABE checks and diagnostics for instantiation Inst of generic
!       --  Gen_Id using the Ada rules. Inst_Rep denotes the representation of
!       --  the instnace. Gen_Rep is the representation of the generic. In_State
!       --  is the current state of the Processing phase.
  
!       procedure Process_Conditional_ABE_Instantiation_SPARK
!         (Inst     : Node_Id;
!          Inst_Rep : Scenario_Rep_Id;
!          Gen_Id   : Entity_Id;
!          Gen_Rep  : Target_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Conditional_ABE_Instantiation_SPARK);
!       --  Perform ABE checks and diagnostics for instantiation Inst of generic
!       --  Gen_Id using the SPARK rules. Inst_Rep denotes the representation of
!       --  the instnace. Gen_Rep is the representation of the generic. In_State
!       --  is the current state of the Processing phase.
  
!       procedure Process_Conditional_ABE_Variable_Assignment
!         (Asmt     : Node_Id;
!          Asmt_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Conditional_ABE_Variable_Assignment);
!       --  Top-level dispatcher for processing of variable assignments. Perform
!       --  ABE checks and diagnostics for assignment Asmt with representation
!       --  Asmt_Rep. In_State denotes the current state of the Processing phase.
  
!       procedure Process_Conditional_ABE_Variable_Assignment_Ada
!         (Asmt     : Node_Id;
!          Asmt_Rep : Scenario_Rep_Id;
!          Var_Id   : Entity_Id;
!          Var_Rep  : Target_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Conditional_ABE_Variable_Assignment_Ada);
!       --  Perform ABE checks and diagnostics for assignment statement Asmt that
!       --  modifies the value of variable Var_Id using the Ada rules. Asmt_Rep
!       --  denotes the representation of the assignment. Var_Rep denotes the
!       --  representation of the variable. In_State is the current state of the
!       --  Processing phase.
  
!       procedure Process_Conditional_ABE_Variable_Assignment_SPARK
!         (Asmt     : Node_Id;
!          Asmt_Rep : Scenario_Rep_Id;
!          Var_Id   : Entity_Id;
!          Var_Rep  : Target_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Conditional_ABE_Variable_Assignment_SPARK);
!       --  Perform ABE checks and diagnostics for assignment statement Asmt that
!       --  modifies the value of variable Var_Id using the SPARK rules. Asmt_Rep
!       --  denotes the representation of the assignment. Var_Rep denotes the
!       --  representation of the variable. In_State is the current state of the
!       --  Processing phase.
  
!       procedure Process_Conditional_ABE_Variable_Reference
!         (Ref      : Node_Id;
!          Ref_Rep  : Scenario_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Conditional_ABE_Variable_Reference);
!       --  Perform ABE checks and diagnostics for variable reference Ref with
!       --  representation Ref_Rep. In_State denotes the current state of the
!       --  Processing phase.
  
!       procedure Traverse_Conditional_ABE_Body
!         (N        : Node_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Traverse_Conditional_ABE_Body);
!       --  Traverse subprogram body N looking for suitable scenarios that need
!       --  to be processed for conditional ABE checks and diagnostics. In_State
!       --  is the current state of the Processing phase.
  
!       -------------------------------------
!       -- Check_Conditional_ABE_Scenarios --
!       -------------------------------------
  
!       procedure Check_Conditional_ABE_Scenarios
!         (Iter : in out NE_Set.Iterator)
!       is
!          N : Node_Id;
  
!       begin
!          while NE_Set.Has_Next (Iter) loop
!             NE_Set.Next (Iter, N);
  
!             --  Reset the traversed status of all subprogram bodies because the
!             --  current conditional scenario acts as a new DFS traversal root.
  
!             Reset_Traversed_Bodies;
  
!             Process_Conditional_ABE
!               (N        => N,
!                In_State => Conditional_ABE_State);
!          end loop;
!       end Check_Conditional_ABE_Scenarios;
  
!       ---------------------------------
!       -- Is_Conditional_ABE_Scenario --
!       ---------------------------------
  
!       function Is_Conditional_ABE_Scenario (N : Node_Id) return Boolean is
!       begin
!          return
!            Is_Suitable_Access_Taken (N)
!              or else Is_Suitable_Call (N)
!              or else Is_Suitable_Instantiation (N)
!              or else Is_Suitable_Variable_Assignment (N)
!              or else Is_Suitable_Variable_Reference (N);
!       end Is_Conditional_ABE_Scenario;
  
        -----------------------------
!       -- Process_Conditional_ABE --
        -----------------------------
  
!       procedure Process_Conditional_ABE
!         (N        : Node_Id;
!          In_State : Processing_In_State)
!       is
!          Scen     : constant Node_Id := Scenario (N);
!          Scen_Rep : Scenario_Rep_Id;
  
        begin
!          --  Add the current scenario to the stack of active scenarios
  
!          Push_Active_Scenario (Scen);
  
!          --  'Access
  
!          if Is_Suitable_Access_Taken (Scen) then
!             Process_Conditional_ABE_Access_Taken
!               (Attr     => Scen,
!                Attr_Rep => Scenario_Representation_Of (Scen, In_State),
!                In_State => In_State);
  
!          --  Call or task activation
  
!          elsif Is_Suitable_Call (Scen) then
!             Scen_Rep := Scenario_Representation_Of (Scen, In_State);
  
!             --  Routine Build_Call_Marker creates call markers regardless of
!             --  whether the call occurs within the main unit or not. This way
!             --  the serialization of internal names is kept consistent. Only
!             --  call markers found within the main unit must be processed.
  
!             if In_Main_Context (Scen) then
!                Scen_Rep := Scenario_Representation_Of (Scen, In_State);
  
!                if Kind (Scen_Rep) = Call_Scenario then
!                   Process_Conditional_ABE_Call
!                     (Call     => Scen,
!                      Call_Rep => Scen_Rep,
!                      In_State => In_State);
  
!                else
!                   pragma Assert (Kind (Scen_Rep) = Task_Activation_Scenario);
  
!                   Process_Activation
!                     (Call      => Scen,
!                      Call_Rep  => Scen_Rep,
!                      Processor => Process_Conditional_ABE_Activation'Access,
!                      In_State  => In_State);
!                end if;
              end if;
  
!          --  Instantiation
  
!          elsif Is_Suitable_Instantiation (Scen) then
!             Process_Conditional_ABE_Instantiation
!               (Inst     => Scen,
!                Inst_Rep => Scenario_Representation_Of (Scen, In_State),
!                In_State => In_State);
  
!          --  Variable assignments
! 
!          elsif Is_Suitable_Variable_Assignment (Scen) then
!             Process_Conditional_ABE_Variable_Assignment
!               (Asmt     => Scen,
!                Asmt_Rep => Scenario_Representation_Of (Scen, In_State),
!                In_State => In_State);
! 
!          --  Variable references
! 
!          elsif Is_Suitable_Variable_Reference (Scen) then
! 
!             --  Routine Build_Variable_Reference_Marker makes variable markers
!             --  regardless of whether the reference occurs within the main unit
!             --  or not. This way the serialization of internal names is kept
!             --  consistent. Only variable markers within the main unit must be
!             --  processed.
! 
!             if In_Main_Context (Scen) then
!                Process_Conditional_ABE_Variable_Reference
!                  (Ref      => Scen,
!                   Ref_Rep  => Scenario_Representation_Of (Scen, In_State),
!                   In_State => In_State);
!             end if;
           end if;
  
!          --  Remove the current scenario from the stack of active scenarios
!          --  once all ABE diagnostics and checks have been performed.
  
!          Pop_Active_Scenario (Scen);
!       end Process_Conditional_ABE;
  
!       ------------------------------------------
!       -- Process_Conditional_ABE_Access_Taken --
!       ------------------------------------------
  
!       procedure Process_Conditional_ABE_Access_Taken
!         (Attr     : Node_Id;
!          Attr_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          function Build_Access_Marker (Subp_Id : Entity_Id) return Node_Id;
!          pragma Inline (Build_Access_Marker);
!          --  Create a suitable call marker which invokes subprogram Subp_Id
  
!          -------------------------
!          -- Build_Access_Marker --
!          -------------------------
  
!          function Build_Access_Marker (Subp_Id : Entity_Id) return Node_Id is
!             Marker : Node_Id;
  
!          begin
!             Marker := Make_Call_Marker (Sloc (Attr));
  
!             --  Inherit relevant attributes from the attribute
  
!             Set_Target (Marker, Subp_Id);
!             Set_Is_Declaration_Level_Node
!                        (Marker, Level (Attr_Rep) = Declaration_Level);
!             Set_Is_Dispatching_Call
!                        (Marker, False);
!             Set_Is_Elaboration_Checks_OK_Node
!                        (Marker, Elaboration_Checks_OK (Attr_Rep));
!             Set_Is_Elaboration_Warnings_OK_Node
!                        (Marker, Elaboration_Warnings_OK (Attr_Rep));
!             Set_Is_Source_Call
!                        (Marker, Comes_From_Source (Attr));
!             Set_Is_SPARK_Mode_On_Node
!                        (Marker, SPARK_Mode_Of (Attr_Rep) = Is_On);
  
!             --  Partially insert the call marker into the tree by setting its
!             --  parent pointer.
  
!             Set_Parent (Marker, Attr);
  
!             return Marker;
!          end Build_Access_Marker;
  
!          --  Local variables
  
!          Root      : constant Node_Id       := Root_Scenario;
!          Subp_Id   : constant Entity_Id     := Target (Attr_Rep);
!          Subp_Rep  : constant Target_Rep_Id :=
!                                 Target_Representation_Of (Subp_Id, In_State);
!          Body_Decl : constant Node_Id       := Body_Declaration (Subp_Rep);
! 
!          New_In_State : Processing_In_State := In_State;
!          --  Each step of the Processing phase constitutes a new state
! 
!       --  Start of processing for Process_Conditional_ABE_Access
! 
!       begin
!          --  Output relevant information when switch -gnatel (info messages on
!          --  implicit Elaborate[_All] pragmas) is in effect.
! 
!          if Elab_Info_Messages
!            and then not New_In_State.Suppress_Info_Messages
           then
!             Error_Msg_NE
!               ("info: access to & during elaboration", Attr, Subp_Id);
           end if;
  
!          --  Warnings are suppressed when a prior scenario is already in that
!          --  mode or when the attribute or the target have warnings suppressed.
!          --  Update the state of the Processing phase to reflect this.
  
!          New_In_State.Suppress_Warnings :=
!            New_In_State.Suppress_Warnings
!              or else not Elaboration_Warnings_OK (Attr_Rep)
!              or else not Elaboration_Warnings_OK (Subp_Rep);
  
!          --  Do not emit any ABE diagnostics when the current or previous
!          --  scenario in this traversal has suppressed elaboration warnings.
  
!          if New_In_State.Suppress_Warnings then
!             null;
  
!          --  Both the attribute and the corresponding subprogram body are in
!          --  the same unit. The body must appear prior to the root scenario
!          --  which started the recursive search. If this is not the case, then
!          --  there is a potential ABE if the access value is used to call the
!          --  subprogram. Emit a warning only when switch -gnatw.f (warnings on
!          --  suspucious 'Access) is in effect.
  
!          elsif Warn_On_Elab_Access
!            and then Present (Body_Decl)
!            and then In_Extended_Main_Code_Unit (Body_Decl)
!            and then Earlier_In_Extended_Unit (Root, Body_Decl)
!          then
!             Error_Msg_Name_1 := Attribute_Name (Attr);
!             Error_Msg_NE
!               ("??% attribute of & before body seen", Attr, Subp_Id);
!             Error_Msg_N ("\possible Program_Error on later references", Attr);
  
!             Output_Active_Scenarios (Attr, New_In_State);
!          end if;
  
!          --  Treat the attribute an immediate invocation of the target when
!          --  switch -gnatd.o (conservative elaboration order for indirect
!          --  calls) is in effect. This has the following desirable effects:
!          --
!          --    * Ensure that the unit with the corresponding body is elaborated
!          --      prior to the main unit.
!          --
!          --    * Perform conditional ABE checks and diagnostics
!          --
!          --    * Traverse the body of the target (if available)
  
!          if Debug_Flag_Dot_O then
!             Process_Conditional_ABE
!               (N        => Build_Access_Marker (Subp_Id),
!                In_State => New_In_State);
! 
!          --  Otherwise ensure that the unit with the corresponding body is
!          --  elaborated prior to the main unit.
! 
!          else
!             Ensure_Prior_Elaboration
!               (N        => Attr,
!                Unit_Id  => Unit (Subp_Rep),
!                Prag_Nam => Name_Elaborate_All,
!                In_State => New_In_State);
           end if;
!       end Process_Conditional_ABE_Access_Taken;
  
!       ----------------------------------------
!       -- Process_Conditional_ABE_Activation --
!       ----------------------------------------
  
!       procedure Process_Conditional_ABE_Activation
!         (Call     : Node_Id;
!          Call_Rep : Scenario_Rep_Id;
!          Obj_Id   : Entity_Id;
!          Obj_Rep  : Target_Rep_Id;
!          Task_Typ : Entity_Id;
!          Task_Rep : Target_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          pragma Unreferenced (Task_Typ);
  
!          Body_Decl : constant Node_Id := Body_Declaration (Task_Rep);
!          Spec_Decl : constant Node_Id := Spec_Declaration (Task_Rep);
!          Root      : constant Node_Id := Root_Scenario;
!          Unit_Id   : constant Node_Id := Unit (Task_Rep);
  
!          Check_OK : constant Boolean :=
!                       not In_State.Suppress_Checks
!                         and then Ghost_Mode_Of (Obj_Rep)  /= Is_Ignored
!                         and then Ghost_Mode_Of (Task_Rep) /= Is_Ignored
!                         and then Elaboration_Checks_OK (Obj_Rep)
!                         and then Elaboration_Checks_OK (Task_Rep);
!          --  A run-time ABE check may be installed only when the object and the
!          --  task type have active elaboration checks, and both are not ignored
!          --  Ghost constructs.
  
!          New_In_State : Processing_In_State := In_State;
!          --  Each step of the Processing phase constitutes a new state
  
!       begin
!          --  Output relevant information when switch -gnatel (info messages on
!          --  implicit Elaborate[_All] pragmas) is in effect.
  
!          if Elab_Info_Messages
!            and then not New_In_State.Suppress_Info_Messages
!          then
!             Error_Msg_NE
!               ("info: activation of & during elaboration", Call, Obj_Id);
!          end if;
  
!          --  Nothing to do when the call activates a task whose type is defined
!          --  within an instance and switch -gnatd_i (ignore activations and
!          --  calls to instances for elaboration) is in effect.
  
!          if Debug_Flag_Underscore_I
!            and then In_External_Instance
!                       (N           => Call,
!                        Target_Decl => Spec_Decl)
!          then
!             return;
  
!          --  Nothing to do when the activation is a guaranteed ABE
  
!          elsif Is_Known_Guaranteed_ABE (Call) then
!             return;
  
!          --  Nothing to do when the root scenario appears at the declaration
!          --  level and the task is in the same unit, but outside this context.
!          --
!          --    task type Task_Typ;                  --  task declaration
!          --
!          --    procedure Proc is
!          --       function A ... is
!          --       begin
!          --          if Some_Condition then
!          --             declare
!          --                T : Task_Typ;
!          --             begin
!          --                <activation call>        --  activation site
!          --             end;
!          --          ...
!          --       end A;
!          --
!          --       X : ... := A;                     --  root scenario
!          --    ...
!          --
!          --    task body Task_Typ is
!          --       ...
!          --    end Task_Typ;
!          --
!          --  In the example above, the context of X is the declarative list of
!          --  Proc. The "elaboration" of X may reach the activation of T whose
!          --  body is defined outside of X's context. The task body is relevant
!          --  only when Proc is invoked, but this happens only during "normal"
!          --  elaboration, therefore the task body must not be considered if
!          --  this is not the case.
  
!          elsif Is_Up_Level_Target
!                  (Targ_Decl => Spec_Decl,
!                   In_State  => New_In_State)
!          then
!             return;
  
!          --  Nothing to do when the activation is ABE-safe
!          --
!          --    generic
!          --    package Gen is
!          --       task type Task_Typ;
!          --    end Gen;
!          --
!          --    package body Gen is
!          --       task body Task_Typ is
!          --       begin
!          --          ...
!          --       end Task_Typ;
!          --    end Gen;
!          --
!          --    with Gen;
!          --    procedure Main is
!          --       package Nested is
!          --          package Inst is new Gen;
!          --          T : Inst.Task_Typ;
!          --          <activation call>              --  safe activation
!          --       end Nested;
!          --    ...
  
!          elsif Is_Safe_Activation (Call, Task_Rep) then
  
!             --  Note that the task body must still be examined for any nested
!             --  scenarios.
  
!             null;
  
!          --  The activation call and the task body are both in the main unit
!          --
!          --  If the root scenario appears prior to the task body, then this is
!          --  a possible ABE with respect to the root scenario.
!          --
!          --    task type Task_Typ;
!          --
!          --    function A ... is
!          --    begin
!          --       if Some_Condition then
!          --          declare
!          --             package Pack is
!          --                T : Task_Typ;
!          --             end Pack;                --  activation of T
!          --       ...
!          --    end A;
!          --
!          --    X : ... := A;                     --  root scenario
!          --
!          --    task body Task_Typ is             --  task body
!          --       ...
!          --    end Task_Typ;
!          --
!          --    Y : ... := A;                     --  root scenario
!          --
!          --  IMPORTANT: The activation of T is a possible ABE for X, but
!          --  not for Y. Intalling an unconditional ABE raise prior to the
!          --  activation call would be wrong as it will fail for Y as well
!          --  but in Y's case the activation of T is never an ABE.
  
!          elsif Present (Body_Decl)
!            and then In_Extended_Main_Code_Unit (Body_Decl)
!          then
!             if Earlier_In_Extended_Unit (Root, Body_Decl) then
  
!                --  Do not emit any ABE diagnostics when a previous scenario in
!                --  this traversal has suppressed elaboration warnings.
  
!                if New_In_State.Suppress_Warnings then
!                   null;
  
!                --  Do not emit any ABE diagnostics when the activation occurs
!                --  in a partial finalization context because this action leads
!                --  to confusing noise.
  
!                elsif New_In_State.Within_Partial_Finalization then
!                   null;
  
!                --  Otherwise emit the ABE disgnostic
  
!                else
!                   Error_Msg_Sloc := Sloc (Call);
!                   Error_Msg_N
!                     ("??task & will be activated # before elaboration of its "
!                      & "body", Obj_Id);
!                   Error_Msg_N
!                     ("\Program_Error may be raised at run time", Obj_Id);
  
!                   Output_Active_Scenarios (Obj_Id, New_In_State);
!                end if;
  
!                --  Install a conditional run-time ABE check to verify that the
!                --  task body has been elaborated prior to the activation call.
  
!                if Check_OK then
!                   Install_Scenario_ABE_Check
!                     (N        => Call,
!                      Targ_Id  => Defining_Entity (Spec_Decl),
!                      Targ_Rep => Task_Rep,
!                      Disable  => Obj_Rep);
  
!                   --  Update the state of the Processing phase to indicate that
!                   --  no implicit Elaborate[_All] pragma must be generated from
!                   --  this point on.
!                   --
!                   --    task type Task_Typ;
!                   --
!                   --    function A ... is
!                   --    begin
!                   --       if Some_Condition then
!                   --          declare
!                   --             package Pack is
!                   --                <ABE check>
!                   --                T : Task_Typ;
!                   --             end Pack;          --  activation of T
!                   --       ...
!                   --    end A;
!                   --
!                   --    X : ... := A;
!                   --
!                   --    task body Task_Typ is
!                   --    begin
!                   --       External.Subp;           --  imparts Elaborate_All
!                   --    end Task_Typ;
!                   --
!                   --  If Some_Condition is True, then the ABE check will fail
!                   --  at runtime and the call to External.Subp will never take
!                   --  place, rendering the implicit Elaborate_All useless.
!                   --
!                   --  If the value of Some_Condition is False, then the call
!                   --  to External.Subp will never take place, rendering the
!                   --  implicit Elaborate_All useless.
  
!                   New_In_State.Suppress_Implicit_Pragmas := True;
!                end if;
!             end if;
  
!          --  Otherwise the task body is not available in this compilation or
!          --  it resides in an external unit. Install a run-time ABE check to
!          --  verify that the task body has been elaborated prior to the
!          --  activation call when the dynamic model is in effect.
! 
!          elsif Check_OK
!            and then New_In_State.Processing = Dynamic_Model_Processing
!          then
!             Install_Unit_ABE_Check
!               (N       => Call,
!                Unit_Id => Unit_Id,
!                Disable => Obj_Rep);
           end if;
  
!          --  Both the activation call and task type are subject to SPARK_Mode
!          --  On, this triggers the SPARK rules for task activation. Compared
!          --  to calls and instantiations, task activation in SPARK does not
!          --  require the presence of Elaborate[_All] pragmas in case the task
!          --  type is defined outside the main unit. This is because SPARK uses
!          --  a special policy which activates all tasks after the main unit has
!          --  finished its elaboration.
! 
!          if SPARK_Mode_Of (Call_Rep) = Is_On
!            and then SPARK_Mode_Of (Task_Rep) = Is_On
!          then
!             null;
! 
!          --  Otherwise the Ada rules are in effect. Ensure that the unit with
!          --  the task body is elaborated prior to the main unit.
  
           else
!             Ensure_Prior_Elaboration
!               (N        => Call,
!                Unit_Id  => Unit_Id,
!                Prag_Nam => Name_Elaborate_All,
!                In_State => New_In_State);
           end if;
  
!          Traverse_Conditional_ABE_Body
!            (N        => Body_Decl,
!             In_State => New_In_State);
!       end Process_Conditional_ABE_Activation;
  
!       ----------------------------------
!       -- Process_Conditional_ABE_Call --
!       ----------------------------------
  
!       procedure Process_Conditional_ABE_Call
!         (Call     : Node_Id;
!          Call_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          function In_Initialization_Context (N : Node_Id) return Boolean;
!          pragma Inline (In_Initialization_Context);
!          --  Determine whether arbitrary node N appears within a type init
!          --  proc, primitive [Deep_]Initialize, or a block created for
!          --  initialization purposes.
  
!          function Is_Partial_Finalization_Proc
!            (Subp_Id : Entity_Id) return Boolean;
!          pragma Inline (Is_Partial_Finalization_Proc);
!          --  Determine whether subprogram Subp_Id is a partial finalization
!          --  procedure.
  
!          -------------------------------
!          -- In_Initialization_Context --
!          -------------------------------
  
!          function In_Initialization_Context (N : Node_Id) return Boolean is
!             Par     : Node_Id;
!             Spec_Id : Entity_Id;
  
!          begin
!             --  Climb the parent chain looking for initialization actions
  
!             Par := Parent (N);
!             while Present (Par) loop
  
!                --  A block may be part of the initialization actions of a
!                --  default initialized object.
  
!                if Nkind (Par) = N_Block_Statement
!                  and then Is_Initialization_Block (Par)
!                then
!                   return True;
  
!                --  A subprogram body may denote an initialization routine
  
!                elsif Nkind (Par) = N_Subprogram_Body then
!                   Spec_Id := Unique_Defining_Entity (Par);
  
!                   --  The current subprogram body denotes a type init proc or
!                   --  primitive [Deep_]Initialize.
  
!                   if Is_Init_Proc (Spec_Id)
!                     or else Is_Controlled_Proc (Spec_Id, Name_Initialize)
!                     or else Is_TSS (Spec_Id, TSS_Deep_Initialize)
!                   then
!                      return True;
!                   end if;
  
!                --  Prevent the search from going too far
  
!                elsif Is_Body_Or_Package_Declaration (Par) then
!                   exit;
!                end if;
  
!                Par := Parent (Par);
!             end loop;
  
!             return False;
!          end In_Initialization_Context;
  
!          ----------------------------------
!          -- Is_Partial_Finalization_Proc --
!          ----------------------------------
  
!          function Is_Partial_Finalization_Proc
!            (Subp_Id : Entity_Id) return Boolean
!          is
!          begin
!             --  To qualify, the subprogram must denote a finalizer procedure
!             --  or primitive [Deep_]Finalize, and the call must appear within
!             --  an initialization context.
  
!             return
!               (Is_Controlled_Proc (Subp_Id, Name_Finalize)
!                  or else Is_Finalizer_Proc (Subp_Id)
!                  or else Is_TSS (Subp_Id, TSS_Deep_Finalize))
!                and then In_Initialization_Context (Call);
!          end Is_Partial_Finalization_Proc;
  
!          --  Local variables
  
!          Subp_Id   : constant Entity_Id     := Target (Call_Rep);
!          Subp_Rep  : constant Target_Rep_Id :=
!                        Target_Representation_Of (Subp_Id, In_State);
!          Subp_Decl : constant Node_Id       := Spec_Declaration (Subp_Rep);
  
!          SPARK_Rules_On : constant Boolean :=
!                             SPARK_Mode_Of (Call_Rep) = Is_On
!                               and then SPARK_Mode_Of (Subp_Rep) = Is_On;
  
!          New_In_State : Processing_In_State := In_State;
!          --  Each step of the Processing phase constitutes a new state
  
!       --  Start of processing for Process_Conditional_ABE_Call
  
!       begin
!          --  Output relevant information when switch -gnatel (info messages on
!          --  implicit Elaborate[_All] pragmas) is in effect.
  
!          if Elab_Info_Messages
!            and then not New_In_State.Suppress_Info_Messages
!          then
!             Info_Call
!               (Call     => Call,
!                Subp_Id  => Subp_Id,
!                Info_Msg => True,
!                In_SPARK => SPARK_Rules_On);
!          end if;
  
!          --  Check whether the invocation of an entry clashes with an existing
!          --  restriction. This check is relevant only when the processing was
!          --  started from some library-level scenario.
  
!          if Is_Protected_Entry (Subp_Id) then
!             Check_Restriction (No_Entry_Calls_In_Elaboration_Code, Call);
  
!          elsif Is_Task_Entry (Subp_Id) then
!             Check_Restriction (No_Entry_Calls_In_Elaboration_Code, Call);
  
!             --  Task entry calls are never processed because the entry being
!             --  invoked does not have a corresponding "body", it has a select.
  
!             return;
!          end if;
  
!          --  Nothing to do when the call invokes a target defined within an
!          --  instance and switch -gnatd_i (ignore activations and calls to
!          --  instances for elaboration) is in effect.
  
!          if Debug_Flag_Underscore_I
!            and then In_External_Instance
!                       (N           => Call,
!                        Target_Decl => Subp_Decl)
!          then
!             return;
  
!          --  Nothing to do when the call is a guaranteed ABE
  
!          elsif Is_Known_Guaranteed_ABE (Call) then
!             return;
  
!          --  Nothing to do when the root scenario appears at the declaration
!          --  level and the target is in the same unit but outside this context.
!          --
!          --    function B ...;                      --  target declaration
!          --
!          --    procedure Proc is
!          --       function A ... is
!          --       begin
!          --          if Some_Condition then
!          --             return B;                   --  call site
!          --          ...
!          --       end A;
!          --
!          --       X : ... := A;                     --  root scenario
!          --    ...
!          --
!          --    function B ... is
!          --       ...
!          --    end B;
!          --
!          --  In the example above, the context of X is the declarative region
!          --  of Proc. The "elaboration" of X may eventually reach B which is
!          --  defined outside of X's context. B is relevant only when Proc is
!          --  invoked, but this happens only by means of "normal" elaboration,
!          --  therefore B must not be considered if this is not the case.
  
!          elsif Is_Up_Level_Target
!                  (Targ_Decl => Subp_Decl,
!                   In_State  => New_In_State)
!          then
!             return;
           end if;
  
!          --  Warnings are suppressed when a prior scenario is already in that
!          --  mode, or the call or target have warnings suppressed. Update the
!          --  state of the Processing phase to reflect this.
  
!          New_In_State.Suppress_Warnings :=
!            New_In_State.Suppress_Warnings
!              or else not Elaboration_Warnings_OK (Call_Rep)
!              or else not Elaboration_Warnings_OK (Subp_Rep);
  
!          --  The call occurs in an initial condition context when a prior
!          --  scenario is already in that mode, or when the target is an
!          --  Initial_Condition procedure. Update the state of the Processing
!          --  phase to reflect this.
  
!          New_In_State.Within_Initial_Condition :=
!            New_In_State.Within_Initial_Condition
!              or else Is_Initial_Condition_Proc (Subp_Id);
  
!          --  The call occurs in a partial finalization context when a prior
!          --  scenario is already in that mode, or when the target denotes a
!          --  [Deep_]Finalize primitive or a finalizer within an initialization
!          --  context. Update the state of the Processing phase to reflect this.
  
!          New_In_State.Within_Partial_Finalization :=
!            New_In_State.Within_Partial_Finalization
!              or else Is_Partial_Finalization_Proc (Subp_Id);
  
!          --  The SPARK rules are in effect. Note that -gnatd.v (enforce SPARK
!          --  elaboration rules in SPARK code) is intentionally not taken into
!          --  account here because Process_Conditional_ABE_Call_SPARK has two
!          --  separate modes of operation.
  
!          if SPARK_Rules_On then
!             Process_Conditional_ABE_Call_SPARK
!               (Call     => Call,
!                Call_Rep => Call_Rep,
!                Subp_Id  => Subp_Id,
!                Subp_Rep => Subp_Rep,
!                In_State => New_In_State);
  
!          --  Otherwise the Ada rules are in effect
  
!          else
!             Process_Conditional_ABE_Call_Ada
!               (Call     => Call,
!                Call_Rep => Call_Rep,
!                Subp_Id  => Subp_Id,
!                Subp_Rep => Subp_Rep,
!                In_State => New_In_State);
!          end if;
  
!          --  Inspect the target body (and barried function) for other suitable
!          --  elaboration scenarios.
  
!          Traverse_Conditional_ABE_Body
!            (N        => Barrier_Body_Declaration (Subp_Rep),
!             In_State => New_In_State);
  
!          Traverse_Conditional_ABE_Body
!            (N        => Body_Declaration (Subp_Rep),
!             In_State => New_In_State);
!       end Process_Conditional_ABE_Call;
  
!       --------------------------------------
!       -- Process_Conditional_ABE_Call_Ada --
!       --------------------------------------
  
!       procedure Process_Conditional_ABE_Call_Ada
!         (Call     : Node_Id;
!          Call_Rep : Scenario_Rep_Id;
!          Subp_Id  : Entity_Id;
!          Subp_Rep : Target_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          Body_Decl : constant Node_Id := Body_Declaration (Subp_Rep);
!          Root      : constant Node_Id := Root_Scenario;
!          Unit_Id   : constant Node_Id := Unit (Subp_Rep);
  
!          Check_OK : constant Boolean :=
!                       not In_State.Suppress_Checks
!                         and then Ghost_Mode_Of (Call_Rep) /= Is_Ignored
!                         and then Ghost_Mode_Of (Subp_Rep) /= Is_Ignored
!                         and then Elaboration_Checks_OK (Call_Rep)
!                         and then Elaboration_Checks_OK (Subp_Rep);
!          --  A run-time ABE check may be installed only when both the call
!          --  and the target have active elaboration checks, and both are not
!          --  ignored Ghost constructs.
  
!          New_In_State : Processing_In_State := In_State;
!          --  Each step of the Processing phase constitutes a new state
  
!       begin
!          --  Nothing to do for an Ada dispatching call because there are no
!          --  ABE diagnostics for either models. ABE checks for the dynamic
!          --  model are handled by Install_Primitive_Elaboration_Check.
! 
!          if Is_Dispatching_Call (Call_Rep) then
              return;
  
!          --  Nothing to do when the call is ABE-safe
!          --
!          --    generic
!          --    function Gen ...;
!          --
!          --    function Gen ... is
!          --    begin
!          --       ...
!          --    end Gen;
!          --
!          --    with Gen;
!          --    procedure Main is
!          --       function Inst is new Gen;
!          --       X : ... := Inst;                  --  safe call
!          --    ...
  
!          elsif Is_Safe_Call (Call, Subp_Id, Subp_Rep) then
!             return;
  
!          --  The call and the target body are both in the main unit
!          --
!          --  If the root scenario appears prior to the target body, then this
!          --  is a possible ABE with respect to the root scenario.
!          --
!          --    function B ...;
!          --
!          --    function A ... is
!          --    begin
!          --       if Some_Condition then
!          --          return B;                      --  call site
!          --       ...
!          --    end A;
!          --
!          --    X : ... := A;                        --  root scenario
!          --
!          --    function B ... is                    --  target body
!          --       ...
!          --    end B;
!          --
!          --    Y : ... := A;                        --  root scenario
!          --
!          --  IMPORTANT: The call to B from A is a possible ABE for X, but
!          --  not for Y. Installing an unconditional ABE raise prior to the
!          --  call to B would be wrong as it will fail for Y as well, but in
!          --  Y's case the call to B is never an ABE.
  
!          elsif Present (Body_Decl)
!            and then In_Extended_Main_Code_Unit (Body_Decl)
!          then
!             if Earlier_In_Extended_Unit (Root, Body_Decl) then
  
!                --  Do not emit any ABE diagnostics when a previous scenario in
!                --  this traversal has suppressed elaboration warnings.
  
!                if New_In_State.Suppress_Warnings then
!                   null;
  
!                --  Do not emit any ABE diagnostics when the call occurs in a
!                --  partial finalization context because this leads to confusing
!                --  noise.
  
!                elsif New_In_State.Within_Partial_Finalization then
!                   null;
  
!                --  Otherwise emit the ABE diagnostic
  
!                else
!                   Error_Msg_NE
!                     ("??cannot call & before body seen", Call, Subp_Id);
!                   Error_Msg_N
!                     ("\Program_Error may be raised at run time", Call);
  
!                   Output_Active_Scenarios (Call, New_In_State);
!                end if;
  
!                --  Install a conditional run-time ABE check to verify that the
!                --  target body has been elaborated prior to the call.
  
!                if Check_OK then
!                   Install_Scenario_ABE_Check
!                     (N        => Call,
!                      Targ_Id  => Subp_Id,
!                      Targ_Rep => Subp_Rep,
!                      Disable  => Call_Rep);
  
!                   --  Update the state of the Processing phase to indicate that
!                   --  no implicit Elaborate[_All] pragma must be generated from
!                   --  this point on.
!                   --
!                   --    function B ...;
!                   --
!                   --    function A ... is
!                   --    begin
!                   --       if Some_Condition then
!                   --          <ABE check>
!                   --          return B;
!                   --       ...
!                   --    end A;
!                   --
!                   --    X : ... := A;
!                   --
!                   --    function B ... is
!                   --       External.Subp;           --  imparts Elaborate_All
!                   --    end B;
!                   --
!                   --  If Some_Condition is True, then the ABE check will fail
!                   --  at runtime and the call to External.Subp will never take
!                   --  place, rendering the implicit Elaborate_All useless.
!                   --
!                   --  If the value of Some_Condition is False, then the call
!                   --  to External.Subp will never take place, rendering the
!                   --  implicit Elaborate_All useless.
  
!                   New_In_State.Suppress_Implicit_Pragmas := True;
!                end if;
!             end if;
  
!          --  Otherwise the target body is not available in this compilation or
!          --  it resides in an external unit. Install a run-time ABE check to
!          --  verify that the target body has been elaborated prior to the call
!          --  site when the dynamic model is in effect.
  
!          elsif Check_OK
!            and then New_In_State.Processing = Dynamic_Model_Processing
!          then
!             Install_Unit_ABE_Check
!               (N       => Call,
!                Unit_Id => Unit_Id,
!                Disable => Call_Rep);
           end if;
  
!          --  Ensure that the unit with the target body is elaborated prior to
!          --  the main unit. The implicit Elaborate[_All] is generated only when
!          --  the call has elaboration checks enabled. This behaviour parallels
!          --  that of the old ABE mechanism.
  
!          if Elaboration_Checks_OK (Call_Rep) then
!             Ensure_Prior_Elaboration
!               (N        => Call,
!                Unit_Id  => Unit_Id,
!                Prag_Nam => Name_Elaborate_All,
!                In_State => New_In_State);
!          end if;
!       end Process_Conditional_ABE_Call_Ada;
  
!       ----------------------------------------
!       -- Process_Conditional_ABE_Call_SPARK --
!       ----------------------------------------
  
!       procedure Process_Conditional_ABE_Call_SPARK
!         (Call     : Node_Id;
!          Call_Rep : Scenario_Rep_Id;
!          Subp_Id  : Entity_Id;
!          Subp_Rep : Target_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          pragma Unreferenced (Call_Rep);
  
!          Body_Decl : constant Node_Id := Body_Declaration (Subp_Rep);
!          Region    : Node_Id;
  
!       begin
!          --  Ensure that a suitable elaboration model is in effect for SPARK
!          --  rule verification.
  
!          Check_SPARK_Model_In_Effect;
  
!          --  The call and the target body are both in the main unit
  
!          if Present (Body_Decl)
!            and then In_Extended_Main_Code_Unit (Body_Decl)
!            and then Earlier_In_Extended_Unit (Call, Body_Decl)
           then
!             --  Do not emit any ABE diagnostics when a previous scenario in
!             --  this traversal has suppressed elaboration warnings.
  
!             if In_State.Suppress_Warnings then
!                null;
  
!             --  Do not emit any ABE diagnostics when the call occurs in an
!             --  initial condition context because this leads to incorrect
!             --  diagnostics.
  
!             elsif In_State.Within_Initial_Condition then
!                null;
  
!             --  Do not emit any ABE diagnostics when the call occurs in a
!             --  partial finalization context because this leads to confusing
!             --  noise.
  
!             elsif In_State.Within_Partial_Finalization then
!                null;
  
!             --  Ensure that a call that textually precedes the subprogram body
!             --  it invokes appears within the early call region of the body.
!             --
!             --  IMPORTANT: This check must always be performed even when switch
!             --  -gnatd.v (enforce SPARK elaboration rules in SPARK code) is not
!             --  specified because the static model cannot guarantee the absence
!             --  of elaboration issues when dispatching calls are involved.
  
!             else
!                Region := Find_Early_Call_Region (Body_Decl);
  
!                if Earlier_In_Extended_Unit (Call, Region) then
!                   Error_Msg_NE
!                     ("call must appear within early call region of subprogram "
!                      & "body & (SPARK RM 7.7(3))",
!                      Call, Subp_Id);
  
!                   Error_Msg_Sloc := Sloc (Region);
!                   Error_Msg_N ("\region starts #", Call);
  
!                   Error_Msg_Sloc := Sloc (Body_Decl);
!                   Error_Msg_N ("\region ends #", Call);
  
!                   Output_Active_Scenarios (Call, In_State);
!                end if;
!             end if;
!          end if;
  
!          --  A call to a source target or to a target which emulates Ada
!          --  or SPARK semantics imposes an Elaborate_All requirement on the
!          --  context of the main unit. Determine whether the context has a
!          --  pragma strong enough to meet the requirement.
!          --
!          --  IMPORTANT: This check must be performed only when switch -gnatd.v
!          --  (enforce SPARK elaboration rules in SPARK code) is active because
!          --  the static model can ensure the prior elaboration of the unit
!          --  which contains a body by installing an implicit Elaborate[_All]
!          --  pragma.
  
!          if Debug_Flag_Dot_V then
!             if Comes_From_Source (Subp_Id)
!               or else Is_Ada_Semantic_Target (Subp_Id)
!               or else Is_SPARK_Semantic_Target (Subp_Id)
!             then
!                Meet_Elaboration_Requirement
!                  (N        => Call,
!                   Targ_Id  => Subp_Id,
!                   Req_Nam  => Name_Elaborate_All,
!                   In_State => In_State);
!             end if;
  
!          --  Otherwise ensure that the unit with the target body is elaborated
!          --  prior to the main unit.
  
!          else
!             Ensure_Prior_Elaboration
!               (N        => Call,
!                Unit_Id  => Unit (Subp_Rep),
!                Prag_Nam => Name_Elaborate_All,
!                In_State => In_State);
!          end if;
!       end Process_Conditional_ABE_Call_SPARK;
  
!       -------------------------------------------
!       -- Process_Conditional_ABE_Instantiation --
!       -------------------------------------------
  
!       procedure Process_Conditional_ABE_Instantiation
!         (Inst     : Node_Id;
!          Inst_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          Gen_Id  : constant Entity_Id     := Target (Inst_Rep);
!          Gen_Rep : constant Target_Rep_Id :=
!                      Target_Representation_Of (Gen_Id, In_State);
  
!          SPARK_Rules_On : constant Boolean :=
!                             SPARK_Mode_Of (Inst_Rep) = Is_On
!                               and then SPARK_Mode_Of (Gen_Rep) = Is_On;
  
!          New_In_State : Processing_In_State := In_State;
!          --  Each step of the Processing phase constitutes a new state
  
!       begin
!          --  Output relevant information when switch -gnatel (info messages on
!          --  implicit Elaborate[_All] pragmas) is in effect.
  
!          if Elab_Info_Messages
!            and then not New_In_State.Suppress_Info_Messages
!          then
!             Info_Instantiation
!               (Inst     => Inst,
!                Gen_Id   => Gen_Id,
!                Info_Msg => True,
!                In_SPARK => SPARK_Rules_On);
!          end if;
  
!          --  Nothing to do when the instantiation is a guaranteed ABE
  
!          if Is_Known_Guaranteed_ABE (Inst) then
!             return;
  
!          --  Nothing to do when the root scenario appears at the declaration
!          --  level and the generic is in the same unit, but outside this
!          --  context.
!          --
!          --    generic
!          --    procedure Gen is ...;                --  generic declaration
!          --
!          --    procedure Proc is
!          --       function A ... is
!          --       begin
!          --          if Some_Condition then
!          --             declare
!          --                procedure I is new Gen;  --  instantiation site
!          --             ...
!          --          ...
!          --       end A;
!          --
!          --       X : ... := A;                     --  root scenario
!          --    ...
!          --
!          --    procedure Gen is
!          --       ...
!          --    end Gen;
!          --
!          --  In the example above, the context of X is the declarative region
!          --  of Proc. The "elaboration" of X may eventually reach Gen which
!          --  appears outside of X's context. Gen is relevant only when Proc is
!          --  invoked, but this happens only by means of "normal" elaboration,
!          --  therefore Gen must not be considered if this is not the case.
  
!          elsif Is_Up_Level_Target
!                  (Targ_Decl => Spec_Declaration (Gen_Rep),
!                   In_State  => New_In_State)
!          then
!             return;
!          end if;
  
!          --  Warnings are suppressed when a prior scenario is already in that
!          --  mode, or when the instantiation has warnings suppressed. Update
!          --  the state of the processing phase to reflect this.
  
!          New_In_State.Suppress_Warnings :=
!            New_In_State.Suppress_Warnings
!              or else not Elaboration_Warnings_OK (Inst_Rep);
  
!          --  The SPARK rules are in effect
  
!          if SPARK_Rules_On then
!             Process_Conditional_ABE_Instantiation_SPARK
!               (Inst     => Inst,
!                Inst_Rep => Inst_Rep,
!                Gen_Id   => Gen_Id,
!                Gen_Rep  => Gen_Rep,
!                In_State => New_In_State);
  
!          --  Otherwise the Ada rules are in effect, or SPARK code is allowed to
!          --  violate the SPARK rules.
  
!          else
!             Process_Conditional_ABE_Instantiation_Ada
!               (Inst     => Inst,
!                Inst_Rep => Inst_Rep,
!                Gen_Id   => Gen_Id,
!                Gen_Rep  => Gen_Rep,
!                In_State => New_In_State);
!          end if;
!       end Process_Conditional_ABE_Instantiation;
  
!       -----------------------------------------------
!       -- Process_Conditional_ABE_Instantiation_Ada --
!       -----------------------------------------------
  
!       procedure Process_Conditional_ABE_Instantiation_Ada
!         (Inst     : Node_Id;
!          Inst_Rep : Scenario_Rep_Id;
!          Gen_Id   : Entity_Id;
!          Gen_Rep  : Target_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          Body_Decl : constant Node_Id   := Body_Declaration (Gen_Rep);
!          Root      : constant Node_Id   := Root_Scenario;
!          Unit_Id   : constant Entity_Id := Unit (Gen_Rep);
  
!          Check_OK : constant Boolean :=
!                       not In_State.Suppress_Checks
!                         and then Ghost_Mode_Of (Inst_Rep) /= Is_Ignored
!                         and then Ghost_Mode_Of (Gen_Rep)  /= Is_Ignored
!                         and then Elaboration_Checks_OK (Inst_Rep)
!                         and then Elaboration_Checks_OK (Gen_Rep);
!          --  A run-time ABE check may be installed only when both the instance
!          --  and the generic have active elaboration checks and both are not
!          --  ignored Ghost constructs.
  
!          New_In_State : Processing_In_State := In_State;
!          --  Each step of the Processing phase constitutes a new state
  
!       begin
!          --  Nothing to do when the instantiation is ABE-safe
!          --
!          --    generic
!          --    package Gen is
!          --       ...
!          --    end Gen;
!          --
!          --    package body Gen is
!          --       ...
!          --    end Gen;
!          --
!          --    with Gen;
!          --    procedure Main is
!          --       package Inst is new Gen (ABE);    --  safe instantiation
!          --    ...
  
!          if Is_Safe_Instantiation (Inst, Gen_Id, Gen_Rep) then
!             return;
  
!          --  The instantiation and the generic body are both in the main unit
!          --
!          --  If the root scenario appears prior to the generic body, then this
!          --  is a possible ABE with respect to the root scenario.
!          --
!          --    generic
!          --    package Gen is
!          --       ...
!          --    end Gen;
!          --
!          --    function A ... is
!          --    begin
!          --       if Some_Condition then
!          --          declare
!          --             package Inst is new Gen;    --  instantiation site
!          --       ...
!          --    end A;
!          --
!          --    X : ... := A;                        --  root scenario
!          --
!          --    package body Gen is                  --  generic body
!          --       ...
!          --    end Gen;
!          --
!          --    Y : ... := A;                        --  root scenario
!          --
!          --  IMPORTANT: The instantiation of Gen is a possible ABE for X,
!          --  but not for Y. Installing an unconditional ABE raise prior to
!          --  the instance site would be wrong as it will fail for Y as well,
!          --  but in Y's case the instantiation of Gen is never an ABE.
  
!          elsif Present (Body_Decl)
!            and then In_Extended_Main_Code_Unit (Body_Decl)
!          then
!             if Earlier_In_Extended_Unit (Root, Body_Decl) then
  
!                --  Do not emit any ABE diagnostics when a previous scenario in
!                --  this traversal has suppressed elaboration warnings.
  
!                if New_In_State.Suppress_Warnings then
!                   null;
  
!                --  Do not emit any ABE diagnostics when the instantiation
!                --  occurs in partial finalization context because this leads
!                --  to unwanted noise.
  
!                elsif New_In_State.Within_Partial_Finalization then
!                   null;
  
!                --  Otherwise output the diagnostic
  
!                else
!                   Error_Msg_NE
!                     ("??cannot instantiate & before body seen", Inst, Gen_Id);
!                   Error_Msg_N
!                     ("\Program_Error may be raised at run time", Inst);
  
!                   Output_Active_Scenarios (Inst, New_In_State);
!                end if;
  
!                --  Install a conditional run-time ABE check to verify that the
!                --  generic body has been elaborated prior to the instantiation.
  
!                if Check_OK then
!                   Install_Scenario_ABE_Check
!                     (N        => Inst,
!                      Targ_Id  => Gen_Id,
!                      Targ_Rep => Gen_Rep,
!                      Disable  => Inst_Rep);
  
!                   --  Update the state of the Processing phase to indicate that
!                   --  no implicit Elaborate[_All] pragma must be generated from
!                   --  this point on.
!                   --
!                   --    generic
!                   --    package Gen is
!                   --       ...
!                   --    end Gen;
!                   --
!                   --    function A ... is
!                   --    begin
!                   --       if Some_Condition then
!                   --          <ABE check>
!                   --          declare Inst is new Gen;
!                   --       ...
!                   --    end A;
!                   --
!                   --    X : ... := A;
!                   --
!                   --    package body Gen is
!                   --    begin
!                   --       External.Subp;           --  imparts Elaborate_All
!                   --    end Gen;
!                   --
!                   --  If Some_Condition is True, then the ABE check will fail
!                   --  at runtime and the call to External.Subp will never take
!                   --  place, rendering the implicit Elaborate_All useless.
!                   --
!                   --  If the value of Some_Condition is False, then the call
!                   --  to External.Subp will never take place, rendering the
!                   --  implicit Elaborate_All useless.
  
!                   New_In_State.Suppress_Implicit_Pragmas := True;
!                end if;
!             end if;
  
!          --  Otherwise the generic body is not available in this compilation
!          --  or it resides in an external unit. Install a run-time ABE check
!          --  to verify that the generic body has been elaborated prior to the
!          --  instantiation when the dynamic model is in effect.
! 
!          elsif Check_OK
!            and then New_In_State.Processing = Dynamic_Model_Processing
!          then
!             Install_Unit_ABE_Check
!               (N       => Inst,
!                Unit_Id => Unit_Id,
!                Disable => Inst_Rep);
           end if;
  
!          --  Ensure that the unit with the generic body is elaborated prior
!          --  to the main unit. No implicit pragma has to be generated if the
!          --  instantiation has elaboration checks suppressed. This behaviour
!          --  parallels that of the old ABE mechanism.
  
!          if Elaboration_Checks_OK (Inst_Rep) then
!             Ensure_Prior_Elaboration
!               (N        => Inst,
!                Unit_Id  => Unit_Id,
!                Prag_Nam => Name_Elaborate,
!                In_State => New_In_State);
!          end if;
!       end Process_Conditional_ABE_Instantiation_Ada;
  
!       -------------------------------------------------
!       -- Process_Conditional_ABE_Instantiation_SPARK --
!       -------------------------------------------------
  
!       procedure Process_Conditional_ABE_Instantiation_SPARK
!         (Inst     : Node_Id;
!          Inst_Rep : Scenario_Rep_Id;
!          Gen_Id   : Entity_Id;
!          Gen_Rep  : Target_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          pragma Unreferenced (Inst_Rep);
  
!          Req_Nam : Name_Id;
  
!       begin
!          --  Ensure that a suitable elaboration model is in effect for SPARK
!          --  rule verification.
  
!          Check_SPARK_Model_In_Effect;
  
!          --  A source instantiation imposes an Elaborate[_All] requirement
!          --  on the context of the main unit. Determine whether the context
!          --  has a pragma strong enough to meet the requirement. The check
!          --  is orthogonal to the ABE ramifications of the instantiation.
!          --
!          --  IMPORTANT: This check must be performed only when switch -gnatd.v
!          --  (enforce SPARK elaboration rules in SPARK code) is active because
!          --  the static model can ensure the prior elaboration of the unit
!          --  which contains a body by installing an implicit Elaborate[_All]
!          --  pragma.
  
!          if Debug_Flag_Dot_V then
!             if Nkind (Inst) = N_Package_Instantiation then
!                Req_Nam := Name_Elaborate_All;
!             else
!                Req_Nam := Name_Elaborate;
!             end if;
  
!             Meet_Elaboration_Requirement
!               (N        => Inst,
!                Targ_Id  => Gen_Id,
!                Req_Nam  => Req_Nam,
!                In_State => In_State);
  
!          --  Otherwise ensure that the unit with the target body is elaborated
!          --  prior to the main unit.
  
!          else
!             Ensure_Prior_Elaboration
!               (N        => Inst,
!                Unit_Id  => Unit (Gen_Rep),
!                Prag_Nam => Name_Elaborate,
!                In_State => In_State);
!          end if;
!       end Process_Conditional_ABE_Instantiation_SPARK;
  
!       -------------------------------------------------
!       -- Process_Conditional_ABE_Variable_Assignment --
!       -------------------------------------------------
  
!       procedure Process_Conditional_ABE_Variable_Assignment
!         (Asmt     : Node_Id;
!          Asmt_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State)
!       is
  
!          Var_Id  : constant Entity_Id     := Target (Asmt_Rep);
!          Var_Rep : constant Target_Rep_Id :=
!                      Target_Representation_Of (Var_Id, In_State);
  
!          SPARK_Rules_On : constant Boolean :=
!                             SPARK_Mode_Of (Asmt_Rep) = Is_On
!                               and then SPARK_Mode_Of (Var_Rep) = Is_On;
  
        begin
!          --  Output relevant information when switch -gnatel (info messages on
!          --  implicit Elaborate[_All] pragmas) is in effect.
  
!          if Elab_Info_Messages
!            and then not In_State.Suppress_Info_Messages
!          then
!             Elab_Msg_NE
!               (Msg      => "assignment to & during elaboration",
!                N        => Asmt,
!                Id       => Var_Id,
!                Info_Msg => True,
!                In_SPARK => SPARK_Rules_On);
!          end if;
  
!          --  The SPARK rules are in effect. These rules are applied regardless
!          --  of whether switch -gnatd.v (enforce SPARK elaboration rules in
!          --  SPARK code) is in effect because the static model cannot ensure
!          --  safe assignment of variables.
  
!          if SPARK_Rules_On then
!             Process_Conditional_ABE_Variable_Assignment_SPARK
!               (Asmt     => Asmt,
!                Asmt_Rep => Asmt_Rep,
!                Var_Id   => Var_Id,
!                Var_Rep  => Var_Rep,
!                In_State => In_State);
  
!          --  Otherwise the Ada rules are in effect
  
!          else
!             Process_Conditional_ABE_Variable_Assignment_Ada
!               (Asmt     => Asmt,
!                Asmt_Rep => Asmt_Rep,
!                Var_Id   => Var_Id,
!                Var_Rep  => Var_Rep,
!                In_State => In_State);
           end if;
+       end Process_Conditional_ABE_Variable_Assignment;
  
!       -----------------------------------------------------
!       -- Process_Conditional_ABE_Variable_Assignment_Ada --
!       -----------------------------------------------------
  
!       procedure Process_Conditional_ABE_Variable_Assignment_Ada
!         (Asmt     : Node_Id;
!          Asmt_Rep : Scenario_Rep_Id;
!          Var_Id   : Entity_Id;
!          Var_Rep  : Target_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          pragma Unreferenced (Asmt_Rep);
  
!          Var_Decl : constant Node_Id   := Variable_Declaration (Var_Rep);
!          Unit_Id  : constant Entity_Id := Unit (Var_Rep);
  
!       begin
!          --  Emit a warning when an uninitialized variable declared in a
!          --  package spec without a pragma Elaborate_Body is initialized
!          --  by elaboration code within the corresponding body.
  
!          if Is_Elaboration_Warnings_OK_Id (Var_Id)
!            and then not Is_Initialized (Var_Decl)
!            and then not Has_Pragma_Elaborate_Body (Unit_Id)
           then
!             --  Do not emit any ABE diagnostics when a previous scenario in
!             --  this traversal has suppressed elaboration warnings.
  
!             if not In_State.Suppress_Warnings then
!                Error_Msg_NE
!                  ("??variable & can be accessed by clients before this "
!                   & "initialization", Asmt, Var_Id);
! 
!                Error_Msg_NE
!                  ("\add pragma ""Elaborate_Body"" to spec & to ensure proper "
!                   & "initialization", Asmt, Unit_Id);
! 
!                Output_Active_Scenarios (Asmt, In_State);
              end if;
+ 
+             --  Generate an implicit Elaborate_Body in the spec
+ 
+             Set_Elaborate_Body_Desirable (Unit_Id);
           end if;
!       end Process_Conditional_ABE_Variable_Assignment_Ada;
  
!       -------------------------------------------------------
!       -- Process_Conditional_ABE_Variable_Assignment_SPARK --
!       -------------------------------------------------------
  
!       procedure Process_Conditional_ABE_Variable_Assignment_SPARK
!         (Asmt     : Node_Id;
!          Asmt_Rep : Scenario_Rep_Id;
!          Var_Id   : Entity_Id;
!          Var_Rep  : Target_Rep_Id;
!          In_State : Processing_In_State)
        is
!          pragma Unreferenced (Asmt_Rep);
  
!          Var_Decl : constant Node_Id   := Variable_Declaration (Var_Rep);
!          Unit_Id  : constant Entity_Id := Unit (Var_Rep);
  
!       begin
!          --  Ensure that a suitable elaboration model is in effect for SPARK
!          --  rule verification.
  
!          Check_SPARK_Model_In_Effect;
  
!          --  Do not emit any ABE diagnostics when a previous scenario in this
!          --  traversal has suppressed elaboration warnings.
  
!          if In_State.Suppress_Warnings then
!             null;
  
!          --  Emit an error when an initialized variable declared in a package
!          --  spec that is missing pragma Elaborate_Body is further modified by
!          --  elaboration code within the corresponding body.
  
!          elsif Is_Elaboration_Warnings_OK_Id (Var_Id)
!            and then Is_Initialized (Var_Decl)
!            and then not Has_Pragma_Elaborate_Body (Unit_Id)
!          then
!             Error_Msg_NE
!               ("variable & modified by elaboration code in package body",
!                Asmt, Var_Id);
  
!             Error_Msg_NE
!               ("\add pragma ""Elaborate_Body"" to spec & to ensure full "
!                & "initialization", Asmt, Unit_Id);
  
!             Output_Active_Scenarios (Asmt, In_State);
           end if;
+       end Process_Conditional_ABE_Variable_Assignment_SPARK;
  
!       ------------------------------------------------
!       -- Process_Conditional_ABE_Variable_Reference --
!       ------------------------------------------------
  
!       procedure Process_Conditional_ABE_Variable_Reference
!         (Ref      : Node_Id;
!          Ref_Rep  : Scenario_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          Var_Id  : constant Entity_Id := Target (Ref);
!          Var_Rep : Target_Rep_Id;
!          Unit_Id : Entity_Id;
  
!       begin
!          --  Nothing to do when the variable reference is not a read
! 
!          if not Is_Read_Reference (Ref_Rep) then
!             return;
           end if;
  
!          Var_Rep := Target_Representation_Of (Var_Id, In_State);
!          Unit_Id := Unit (Var_Rep);
  
!          --  Output relevant information when switch -gnatel (info messages on
!          --  implicit Elaborate[_All] pragmas) is in effect.
  
!          if Elab_Info_Messages
!            and then not In_State.Suppress_Info_Messages
!          then
!             Elab_Msg_NE
!               (Msg      => "read of variable & during elaboration",
!                N        => Ref,
!                Id       => Var_Id,
!                Info_Msg => True,
!                In_SPARK => True);
!          end if;
  
!          --  Nothing to do when the variable appears within the main unit
!          --  because diagnostics on reads are relevant only for external
!          --  variables.
  
!          if Is_Same_Unit (Unit_Id, Main_Unit_Entity) then
!             null;
  
!          --  Nothing to do when the variable is already initialized. Note that
!          --  the variable may be further modified by the external unit.
  
!          elsif Is_Initialized (Variable_Declaration (Var_Rep)) then
!             null;
  
!          --  Nothing to do when the external unit guarantees the initialization
!          --  of the variable by means of pragma Elaborate_Body.
  
!          elsif Has_Pragma_Elaborate_Body (Unit_Id) then
!             null;
  
!          --  A variable read imposes an Elaborate requirement on the context of
!          --  the main unit. Determine whether the context has a pragma strong
!          --  enough to meet the requirement.
  
!          else
!             Meet_Elaboration_Requirement
!               (N        => Ref,
!                Targ_Id  => Var_Id,
!                Req_Nam  => Name_Elaborate,
!                In_State => In_State);
           end if;
!       end Process_Conditional_ABE_Variable_Reference;
  
        -----------------------------------
!       -- Traverse_Conditional_ABE_Body --
        -----------------------------------
  
!       procedure Traverse_Conditional_ABE_Body
!         (N        : Node_Id;
!          In_State : Processing_In_State)
        is
        begin
!          Traverse_Body
!            (N                   => N,
!             Requires_Processing => Is_Conditional_ABE_Scenario'Access,
!             Processor           => Process_Conditional_ABE'Access,
!             In_State            => In_State);
!       end Traverse_Conditional_ABE_Body;
!    end Conditional_ABE_Processor;
  
!    -------------
!    -- Destroy --
!    -------------
  
!    procedure Destroy (NE : in out Node_Or_Entity_Id) is
!       pragma Unreferenced (NE);
!    begin
!       null;
!    end Destroy;
  
!    -----------------
!    -- Diagnostics --
!    -----------------
  
!    package body Diagnostics is
  
!       -----------------
!       -- Elab_Msg_NE --
!       -----------------
  
!       procedure Elab_Msg_NE
!         (Msg      : String;
!          N        : Node_Id;
!          Id       : Entity_Id;
!          Info_Msg : Boolean;
!          In_SPARK : Boolean)
!       is
!          function Prefix return String;
!          pragma Inline (Prefix);
!          --  Obtain the prefix of the message
  
!          function Suffix return String;
!          pragma Inline (Suffix);
!          --  Obtain the suffix of the message
  
!          ------------
!          -- Prefix --
!          ------------
  
!          function Prefix return String is
!          begin
!             if Info_Msg then
!                return "info: ";
!             else
!                return "";
!             end if;
!          end Prefix;
  
!          ------------
!          -- Suffix --
!          ------------
  
!          function Suffix return String is
!          begin
!             if In_SPARK then
!                return " in SPARK";
!             else
!                return "";
!             end if;
!          end Suffix;
  
!       --  Start of processing for Elab_Msg_NE
  
!       begin
!          Error_Msg_NE (Prefix & Msg & Suffix, N, Id);
!       end Elab_Msg_NE;
  
!       ---------------
!       -- Info_Call --
!       ---------------
  
!       procedure Info_Call
!         (Call     : Node_Id;
!          Subp_Id  : Entity_Id;
!          Info_Msg : Boolean;
!          In_SPARK : Boolean)
!       is
!          procedure Info_Accept_Alternative;
!          pragma Inline (Info_Accept_Alternative);
!          --  Output information concerning an accept alternative
  
!          procedure Info_Simple_Call;
!          pragma Inline (Info_Simple_Call);
!          --  Output information concerning the call
  
!          procedure Info_Type_Actions (Action : String);
!          pragma Inline (Info_Type_Actions);
!          --  Output information concerning action Action of a type
  
!          procedure Info_Verification_Call
!            (Pred    : String;
!             Id      : Entity_Id;
!             Id_Kind : String);
!          pragma Inline (Info_Verification_Call);
!          --  Output information concerning the verification of predicate Pred
!          --  applied to related entity Id with kind Id_Kind.
  
!          -----------------------------
!          -- Info_Accept_Alternative --
!          -----------------------------
  
!          procedure Info_Accept_Alternative is
!             Entry_Id : constant Entity_Id := Receiving_Entry (Subp_Id);
!             pragma Assert (Present (Entry_Id));
  
!          begin
!             Elab_Msg_NE
!               (Msg      => "accept for entry & during elaboration",
!                N        => Call,
!                Id       => Entry_Id,
!                Info_Msg => Info_Msg,
!                In_SPARK => In_SPARK);
!          end Info_Accept_Alternative;
  
!          ----------------------
!          -- Info_Simple_Call --
!          ----------------------
  
!          procedure Info_Simple_Call is
!          begin
!             Elab_Msg_NE
!               (Msg      => "call to & during elaboration",
!                N        => Call,
!                Id       => Subp_Id,
!                Info_Msg => Info_Msg,
!                In_SPARK => In_SPARK);
!          end Info_Simple_Call;
  
!          -----------------------
!          -- Info_Type_Actions --
!          -----------------------
  
!          procedure Info_Type_Actions (Action : String) is
!             Typ : constant Entity_Id := First_Formal_Type (Subp_Id);
!             pragma Assert (Present (Typ));
  
!          begin
!             Elab_Msg_NE
!               (Msg      => Action & " actions for type & during elaboration",
!                N        => Call,
!                Id       => Typ,
!                Info_Msg => Info_Msg,
!                In_SPARK => In_SPARK);
!          end Info_Type_Actions;
  
!          ----------------------------
!          -- Info_Verification_Call --
!          ----------------------------
  
!          procedure Info_Verification_Call
!            (Pred    : String;
!             Id      : Entity_Id;
!             Id_Kind : String)
!          is
!             pragma Assert (Present (Id));
  
!          begin
!             Elab_Msg_NE
!               (Msg      =>
!                  "verification of " & Pred & " of " & Id_Kind & " & during "
!                  & "elaboration",
!                N        => Call,
!                Id       => Id,
!                Info_Msg => Info_Msg,
!                In_SPARK => In_SPARK);
!          end Info_Verification_Call;
  
!       --  Start of processing for Info_Call
  
!       begin
!          --  Do not output anything for targets defined in internal units
!          --  because this creates noise.
  
!          if not In_Internal_Unit (Subp_Id) then
  
!             --  Accept alternative
  
!             if Is_Accept_Alternative_Proc (Subp_Id) then
!                Info_Accept_Alternative;
  
!             --  Adjustment
  
!             elsif Is_TSS (Subp_Id, TSS_Deep_Adjust) then
!                Info_Type_Actions ("adjustment");
  
!             --  Default_Initial_Condition
  
!             elsif Is_Default_Initial_Condition_Proc (Subp_Id) then
!                Info_Verification_Call
!                  (Pred    => "Default_Initial_Condition",
!                   Id      => First_Formal_Type (Subp_Id),
!                   Id_Kind => "type");
  
!             --  Entries
  
!             elsif Is_Protected_Entry (Subp_Id) then
!                Info_Simple_Call;
  
!             --  Task entry calls are never processed because the entry being
!             --  invoked does not have a corresponding "body", it has a select.
  
!             elsif Is_Task_Entry (Subp_Id) then
!                null;
  
!             --  Finalization
  
!             elsif Is_TSS (Subp_Id, TSS_Deep_Finalize) then
!                Info_Type_Actions ("finalization");
  
!             --  Calls to _Finalizer procedures must not appear in the output
!             --  because this creates confusing noise.
  
!             elsif Is_Finalizer_Proc (Subp_Id) then
!                null;
  
!             --  Initial_Condition
  
!             elsif Is_Initial_Condition_Proc (Subp_Id) then
!                Info_Verification_Call
!                  (Pred    => "Initial_Condition",
!                   Id      => Find_Enclosing_Scope (Call),
!                   Id_Kind => "package");
  
!             --  Initialization
  
!             elsif Is_Init_Proc (Subp_Id)
!               or else Is_TSS (Subp_Id, TSS_Deep_Initialize)
!             then
!                Info_Type_Actions ("initialization");
  
!             --  Invariant
  
!             elsif Is_Invariant_Proc (Subp_Id) then
!                Info_Verification_Call
!                  (Pred    => "invariants",
!                   Id      => First_Formal_Type (Subp_Id),
!                   Id_Kind => "type");
  
!             --  Partial invariant calls must not appear in the output because
!             --  this creates confusing noise.
  
!             elsif Is_Partial_Invariant_Proc (Subp_Id) then
!                null;
  
!             --  _Postconditions
  
!             elsif Is_Postconditions_Proc (Subp_Id) then
!                Info_Verification_Call
!                  (Pred    => "postconditions",
!                   Id      => Find_Enclosing_Scope (Call),
!                   Id_Kind => "subprogram");
  
!             --  Subprograms must come last because some of the previous cases
!             --  fall under this category.
  
!             elsif Ekind (Subp_Id) = E_Function then
!                Info_Simple_Call;
  
!             elsif Ekind (Subp_Id) = E_Procedure then
!                Info_Simple_Call;
  
!             else
!                pragma Assert (False);
!                return;
!             end if;
!          end if;
!       end Info_Call;
  
!       ------------------------
!       -- Info_Instantiation --
!       ------------------------
  
!       procedure Info_Instantiation
!         (Inst     : Node_Id;
!          Gen_Id   : Entity_Id;
!          Info_Msg : Boolean;
!          In_SPARK : Boolean)
!       is
!       begin
!          Elab_Msg_NE
!            (Msg      => "instantiation of & during elaboration",
!             N        => Inst,
!             Id       => Gen_Id,
!             Info_Msg => Info_Msg,
!             In_SPARK => In_SPARK);
!       end Info_Instantiation;
  
!       -----------------------------
!       -- Info_Variable_Reference --
!       -----------------------------
  
!       procedure Info_Variable_Reference
!         (Ref      : Node_Id;
!          Var_Id   : Entity_Id;
!          Info_Msg : Boolean;
!          In_SPARK : Boolean)
!       is
!       begin
!          if Is_Read (Ref) then
!             Elab_Msg_NE
!               (Msg      => "read of variable & during elaboration",
!                N        => Ref,
!                Id       => Var_Id,
!                Info_Msg => Info_Msg,
!                In_SPARK => In_SPARK);
!          end if;
!       end Info_Variable_Reference;
!    end Diagnostics;
  
!    ---------------------------------
!    -- Early_Call_Region_Processor --
!    ---------------------------------
  
!    package body Early_Call_Region_Processor is
  
!       ---------------------
!       -- Data structures --
!       ---------------------
  
!       --  The following map relates early call regions to subprogram bodies
  
!       procedure Destroy (N : in out Node_Id);
!       --  Destroy node N
  
!       package ECR_Map is new Dynamic_Hash_Tables
!         (Key_Type              => Entity_Id,
!          Value_Type            => Node_Id,
!          No_Value              => Empty,
!          Expansion_Threshold   => 1.5,
!          Expansion_Factor      => 2,
!          Compression_Threshold => 0.3,
!          Compression_Factor    => 2,
!          "="                   => "=",
!          Destroy_Value         => Destroy,
!          Hash                  => Hash);
  
!       Early_Call_Regions_Map : ECR_Map.Dynamic_Hash_Table := ECR_Map.Nil;
  
!       -----------------------
!       -- Local subprograms --
!       -----------------------
! 
!       function Early_Call_Region (Body_Id : Entity_Id) return Node_Id;
!       pragma Inline (Early_Call_Region);
!       --  Obtain the early call region associated with entry or subprogram body
!       --  Body_Id.
! 
!       procedure Set_Early_Call_Region (Body_Id : Entity_Id; Start : Node_Id);
!       pragma Inline (Set_Early_Call_Region);
!       --  Associate an early call region with begins at construct Start with
!       --  entry or subprogram body Body_Id.
  
        -------------
!       -- Destroy --
        -------------
  
!       procedure Destroy (N : in out Node_Id) is
!          pragma Unreferenced (N);
!       begin
!          null;
!       end Destroy;
  
+       -----------------------
+       -- Early_Call_Region --
+       -----------------------
+ 
+       function Early_Call_Region (Body_Id : Entity_Id) return Node_Id is
+          pragma Assert (Present (Body_Id));
        begin
!          return ECR_Map.Get (Early_Call_Regions_Map, Body_Id);
!       end Early_Call_Region;
! 
!       ------------------------------------------
!       -- Finalize_Early_Call_Region_Processor --
!       ------------------------------------------
! 
!       procedure Finalize_Early_Call_Region_Processor is
!       begin
!          ECR_Map.Destroy (Early_Call_Regions_Map);
!       end Finalize_Early_Call_Region_Processor;
! 
!       ----------------------------
!       -- Find_Early_Call_Region --
!       ----------------------------
! 
!       function Find_Early_Call_Region
!         (Body_Decl        : Node_Id;
!          Assume_Elab_Body : Boolean := False;
!          Skip_Memoization : Boolean := False) return Node_Id
!       is
!          --  NOTE: The routines within Find_Early_Call_Region are intentionally
!          --  unnested to avoid deep indentation of code.
! 
!          ECR_Found : exception;
!          --  This exception is raised when the early call region has been found
! 
!          Start : Node_Id := Empty;
!          --  The start of the early call region. This variable is updated by
!          --  the various nested routines. Due to the use of exceptions, the
!          --  variable must be global to the nested routines.
! 
!          --  The algorithm implemented in this routine attempts to find the
!          --  early call region of a subprogram body by inspecting constructs
!          --  in reverse declarative order, while navigating the tree. The
!          --  algorithm consists of an Inspection phase and Advancement phase.
!          --  The pseudocode is as follows:
           --
!          --    loop
!          --       inspection phase
!          --       advancement phase
!          --    end loop
           --
!          --  The infinite loop is terminated by raising exception ECR_Found.
!          --  The algorithm utilizes two pointers, Curr and Start, to represent
!          --  the current construct to inspect and the start of the early call
!          --  region.
           --
!          --  IMPORTANT: The algorithm must maintain the following invariant at
!          --  all time for it to function properly:
!          --
!          --    A nested construct is entered only when it contains suitable
!          --    constructs.
!          --
!          --  This guarantees that leaving a nested or encapsulating construct
!          --  functions properly.
!          --
!          --  The Inspection phase determines whether the current construct is
!          --  non-preelaborable, and if it is, the algorithm terminates.
!          --
!          --  The Advancement phase walks the tree in reverse declarative order,
!          --  while entering and leaving nested and encapsulating constructs. It
!          --  may also terminate the elaborithm. There are several special cases
!          --  of advancement.
!          --
!          --  1) General case:
!          --
!          --    <construct 1>
!          --     ...
!          --    <construct N-1>                      <- Curr
!          --    <construct N>                        <- Start
!          --    <subprogram body>
!          --
!          --  In the general case, a declarative or statement list is traversed
!          --  in reverse order where Curr is the lead pointer, and Start is the
!          --  last preelaborable construct.
!          --
!          --  2) Entering handled bodies
!          --
!          --    package body Nested is               <- Curr (2.3)
!          --       <declarations>                    <- Curr (2.2)
!          --    begin
!          --       <statements>                      <- Curr (2.1)
!          --    end Nested;
!          --    <construct>                          <- Start
!          --
!          --  In this case, the algorithm enters a handled body by starting from
!          --  the last statement (2.1), or the last declaration (2.2), or the
!          --  body is consumed (2.3) because it is empty and thus preelaborable.
!          --
!          --  3) Entering package declarations
!          --
!          --    package Nested is                    <- Curr (2.3)
!          --       <visible declarations>            <- Curr (2.2)
!          --    private
!          --       <private declarations>            <- Curr (2.1)
!          --    end Nested;
!          --    <construct>                          <- Start
!          --
!          --  In this case, the algorithm enters a package declaration by
!          --  starting from the last private declaration (2.1), the last visible
!          --  declaration (2.2), or the package is consumed (2.3) because it is
!          --  empty and thus preelaborable.
!          --
!          --  4) Transitioning from list to list of the same construct
!          --
!          --  Certain constructs have two eligible lists. The algorithm must
!          --  thus transition from the second to the first list when the second
!          --  list is exhausted.
!          --
!          --    declare                              <- Curr (4.2)
!          --       <declarations>                    <- Curr (4.1)
!          --    begin
!          --       <statements>                      <- Start
!          --    end;
!          --
!          --  In this case, the algorithm has exhausted the second list (the
!          --  statements in the example above), and continues with the last
!          --  declaration (4.1) or the construct is consumed (4.2) because it
!          --  contains only preelaborable code.
!          --
!          --  5) Transitioning from list to construct
!          --
!          --    tack body Task is                    <- Curr (5.1)
!          --                                         <- Curr (Empty)
!          --       <construct 1>                     <- Start
!          --
!          --  In this case, the algorithm has exhausted a list, Curr is Empty,
!          --  and the owner of the list is consumed (5.1).
!          --
!          --  6) Transitioning from unit to unit
!          --
!          --  A package body with a spec subject to pragma Elaborate_Body
!          --  extends the possible range of the early call region to the package
!          --  spec.
!          --
!          --    package Pack is                      <- Curr (6.3)
!          --       pragma Elaborate_Body;            <- Curr (6.2)
!          --       <visible declarations>            <- Curr (6.2)
!          --    private
!          --       <private declarations>            <- Curr (6.1)
!          --    end Pack;
!          --
!          --    package body Pack is                 <- Curr, Start
!          --
!          --  In this case, the algorithm has reached a package body compilation
!          --  unit whose spec is subject to pragma Elaborate_Body, or the caller
!          --  of the algorithm has specified this behavior. This transition is
!          --  equivalent to 3).
!          --
!          --  7) Transitioning from unit to termination
!          --
!          --  Reaching a compilation unit always terminates the algorithm as
!          --  there are no more lists to examine. This must take case 6) into
!          --  account.
!          --
!          --  8) Transitioning from subunit to stub
!          --
!          --    package body Pack is separate;       <- Curr (8.1)
!          --
!          --    separate (...)
!          --    package body Pack is                 <- Curr, Start
!          --
!          --  Reaching a subunit continues the search from the corresponding
!          --  stub (8.1).
  
!          procedure Advance (Curr : in out Node_Id);
!          pragma Inline (Advance);
!          --  Update the Curr and Start pointers depending on their location
!          --  in the tree to the next eligible construct. This routine raises
!          --  ECR_Found.
  
!          procedure Enter_Handled_Body (Curr : in out Node_Id);
!          pragma Inline (Enter_Handled_Body);
!          --  Update the Curr and Start pointers to enter a nested handled body
!          --  if applicable. This routine raises ECR_Found.
  
!          procedure Enter_Package_Declaration (Curr : in out Node_Id);
!          pragma Inline (Enter_Package_Declaration);
!          --  Update the Curr and Start pointers to enter a nested package spec
!          --  if applicable. This routine raises ECR_Found.
  
!          function Find_ECR (N : Node_Id) return Node_Id;
!          pragma Inline (Find_ECR);
!          --  Find an early call region starting from arbitrary node N
  
!          function Has_Suitable_Construct (List : List_Id) return Boolean;
!          pragma Inline (Has_Suitable_Construct);
!          --  Determine whether list List contains a suitable construct for
!          --  inclusion into an early call region.
  
!          procedure Include (N : Node_Id; Curr : out Node_Id);
!          pragma Inline (Include);
!          --  Update the Curr and Start pointers to include arbitrary construct
!          --  N in the early call region. This routine raises ECR_Found.
! 
!          function Is_OK_Preelaborable_Construct (N : Node_Id) return Boolean;
!          pragma Inline (Is_OK_Preelaborable_Construct);
!          --  Determine whether arbitrary node N denotes a preelaboration-safe
!          --  construct.
! 
!          function Is_Suitable_Construct (N : Node_Id) return Boolean;
!          pragma Inline (Is_Suitable_Construct);
!          --  Determine whether arbitrary node N denotes a suitable construct
!          --  for inclusion into the early call region.
! 
!          procedure Transition_Body_Declarations
!            (Bod  : Node_Id;
!             Curr : out Node_Id);
!          pragma Inline (Transition_Body_Declarations);
!          --  Update the Curr and Start pointers when construct Bod denotes a
!          --  block statement or a suitable body. This routine raises ECR_Found.
! 
!          procedure Transition_Handled_Statements
!            (HSS  : Node_Id;
!             Curr : out Node_Id);
!          pragma Inline (Transition_Handled_Statements);
!          --  Update the Curr and Start pointers when node HSS denotes a handled
!          --  sequence of statements. This routine raises ECR_Found.
! 
!          procedure Transition_Spec_Declarations
!            (Spec : Node_Id;
!             Curr : out Node_Id);
!          pragma Inline (Transition_Spec_Declarations);
!          --  Update the Curr and Start pointers when construct Spec denotes
!          --  a concurrent definition or a package spec. This routine raises
!          --  ECR_Found.
! 
!          procedure Transition_Unit (Unit : Node_Id; Curr : out Node_Id);
!          pragma Inline (Transition_Unit);
!          --  Update the Curr and Start pointers when node Unit denotes a
!          --  potential compilation unit. This routine raises ECR_Found.
! 
!          -------------
!          -- Advance --
!          -------------
! 
!          procedure Advance (Curr : in out Node_Id) is
!             Context : Node_Id;
! 
!          begin
!             --  Curr denotes one of the following cases upon entry into this
!             --  routine:
              --
!             --    * Empty - There is no current construct when a declarative or
!             --      a statement list has been exhausted. This does not indicate
!             --      that the early call region has been computed as it is still
!             --      possible to transition to another list.
              --
!             --    * Encapsulator - The current construct wraps declarations
!             --      and/or statements. This indicates that the early call
!             --      region may extend within the nested construct.
              --
!             --    * Preelaborable - The current construct is preelaborable
!             --      because Find_ECR would not invoke Advance if this was not
!             --      the case.
  
!             --  The current construct is an encapsulator or is preelaborable
  
!             if Present (Curr) then
  
!                --  Enter encapsulators by inspecting their declarations and/or
!                --  statements.
! 
!                if Nkind_In (Curr, N_Block_Statement, N_Package_Body) then
!                   Enter_Handled_Body (Curr);
! 
!                elsif Nkind (Curr) = N_Package_Declaration then
!                   Enter_Package_Declaration (Curr);
! 
!                --  Early call regions have a property which can be exploited to
!                --  optimize the algorithm.
!                --
!                --    <preceding subprogram body>
!                --    <preelaborable construct 1>
!                --     ...
!                --    <preelaborable construct N>
!                --    <initiating subprogram body>
!                --
!                --  If a traversal initiated from a subprogram body reaches a
!                --  preceding subprogram body, then both bodies share the same
!                --  early call region.
!                --
!                --  The property results in the following desirable effects:
!                --
!                --  * If the preceding body already has an early call region,
!                --    then the initiating body can reuse it. This minimizes the
!                --    amount of processing performed by the algorithm.
!                --
!                --  * If the preceding body lack an early call region, then the
!                --    algorithm can compute the early call region, and reuse it
!                --    for the initiating body. This processing performs the same
!                --    amount of work, but has the beneficial effect of computing
!                --    the early call regions of all preceding bodies.
! 
!                elsif Nkind_In (Curr, N_Entry_Body, N_Subprogram_Body) then
!                   Start :=
!                     Find_Early_Call_Region
!                       (Body_Decl        => Curr,
!                        Assume_Elab_Body => Assume_Elab_Body,
!                        Skip_Memoization => Skip_Memoization);
! 
!                   raise ECR_Found;
! 
!                --  Otherwise current construct is preelaborable. Unpdate the
!                --  early call region to include it.
! 
!                else
!                   Include (Curr, Curr);
!                end if;
! 
!             --  Otherwise the current construct is missing, indicating that the
!             --  current list has been exhausted. Depending on the context of
!             --  the list, several transitions are possible.
! 
!             else
!                --  The invariant of the algorithm ensures that Curr and Start
!                --  are at the same level of nesting at the point of transition.
!                --  The algorithm can determine which list the traversal came
!                --  from by examining Start.
! 
!                Context := Parent (Start);
! 
!                --  Attempt the following transitions:
!                --
!                --    private declarations -> visible declarations
!                --    private declarations -> upper level
!                --    private declarations -> terminate
!                --    visible declarations -> upper level
!                --    visible declarations -> terminate
! 
!                if Nkind_In (Context, N_Package_Specification,
!                                      N_Protected_Definition,
!                                      N_Task_Definition)
!                then
!                   Transition_Spec_Declarations (Context, Curr);
! 
!                --  Attempt the following transitions:
!                --
!                --    statements -> declarations
!                --    statements -> upper level
!                --    statements -> corresponding package spec (Elab_Body)
!                --    statements -> terminate
! 
!                elsif Nkind (Context) = N_Handled_Sequence_Of_Statements then
!                   Transition_Handled_Statements (Context, Curr);
! 
!                --  Attempt the following transitions:
!                --
!                --    declarations -> upper level
!                --    declarations -> corresponding package spec (Elab_Body)
!                --    declarations -> terminate
! 
!                elsif Nkind_In (Context, N_Block_Statement,
!                                         N_Entry_Body,
!                                         N_Package_Body,
!                                         N_Protected_Body,
!                                         N_Subprogram_Body,
!                                         N_Task_Body)
!                then
!                   Transition_Body_Declarations (Context, Curr);
! 
!                --  Otherwise it is not possible to transition. Stop the search
!                --  because there are no more declarations or statements to
!                --  check.
! 
!                else
!                   raise ECR_Found;
!                end if;
!             end if;
!          end Advance;
! 
!          --------------------------
!          -- Enter_Handled_Body --
!          --------------------------
! 
!          procedure Enter_Handled_Body (Curr : in out Node_Id) is
!             Decls : constant List_Id := Declarations (Curr);
!             HSS   : constant Node_Id := Handled_Statement_Sequence (Curr);
!             Stmts : List_Id := No_List;
! 
!          begin
!             if Present (HSS) then
!                Stmts := Statements (HSS);
!             end if;
! 
!             --  The handled body has a non-empty statement sequence. The
!             --  construct to inspect is the last statement.
! 
!             if Has_Suitable_Construct (Stmts) then
!                Curr := Last (Stmts);
! 
!             --  The handled body lacks statements, but has non-empty
!             --  declarations. The construct to inspect is the last declaration.
! 
!             elsif Has_Suitable_Construct (Decls) then
!                Curr := Last (Decls);
! 
!             --  Otherwise the handled body lacks both declarations and
!             --  statements. The construct to inspect is the node which precedes
!             --  the handled body. Update the early call region to include the
!             --  handled body.
  
              else
                 Include (Curr, Curr);
              end if;
+          end Enter_Handled_Body;
  
!          -------------------------------
!          -- Enter_Package_Declaration --
!          -------------------------------
  
!          procedure Enter_Package_Declaration (Curr : in out Node_Id) is
!             Pack_Spec : constant Node_Id := Specification (Curr);
!             Prv_Decls : constant List_Id := Private_Declarations (Pack_Spec);
!             Vis_Decls : constant List_Id := Visible_Declarations (Pack_Spec);
  
!          begin
!             --  The package has a non-empty private declarations. The construct
!             --  to inspect is the last private declaration.
  
!             if Has_Suitable_Construct (Prv_Decls) then
!                Curr := Last (Prv_Decls);
! 
!             --  The package lacks private declarations, but has non-empty
!             --  visible declarations. In this case the construct to inspect
!             --  is the last visible declaration.
! 
!             elsif Has_Suitable_Construct (Vis_Decls) then
!                Curr := Last (Vis_Decls);
! 
!             --  Otherwise the package lacks any declarations. The construct
!             --  to inspect is the node which precedes the package. Update the
!             --  early call region to include the package declaration.
! 
!             else
!                Include (Curr, Curr);
!             end if;
!          end Enter_Package_Declaration;
! 
!          --------------
!          -- Find_ECR --
!          --------------
! 
!          function Find_ECR (N : Node_Id) return Node_Id is
!             Curr : Node_Id;
! 
!          begin
!             --  The early call region starts at N
! 
!             Curr  := Prev (N);
!             Start := N;
! 
!             --  Inspect each node in reverse declarative order while going in
!             --  and out of nested and enclosing constructs. Note that the only
!             --  way to terminate this infinite loop is to raise ECR_Found.
! 
!             loop
!                --  The current construct is not preelaboration-safe. Terminate
!                --  the traversal.
! 
!                if Present (Curr)
!                  and then not Is_OK_Preelaborable_Construct (Curr)
!                then
!                   raise ECR_Found;
!                end if;
! 
!                --  Advance to the next suitable construct. This may terminate
!                --  the traversal by raising ECR_Found.
! 
!                Advance (Curr);
!             end loop;
! 
!          exception
!             when ECR_Found =>
!                return Start;
!          end Find_ECR;
! 
!          ----------------------------
!          -- Has_Suitable_Construct --
!          ----------------------------
! 
!          function Has_Suitable_Construct (List : List_Id) return Boolean is
!             Item : Node_Id;
! 
!          begin
!             --  Examine the list in reverse declarative order, looking for a
!             --  suitable construct.
! 
!             if Present (List) then
!                Item := Last (List);
!                while Present (Item) loop
!                   if Is_Suitable_Construct (Item) then
!                      return True;
!                   end if;
! 
!                   Prev (Item);
!                end loop;
!             end if;
! 
!             return False;
!          end Has_Suitable_Construct;
! 
!          -------------
!          -- Include --
!          -------------
! 
!          procedure Include (N : Node_Id; Curr : out Node_Id) is
!          begin
!             Start := N;
! 
!             --  The input node is a compilation unit. This terminates the
!             --  search because there are no more lists to inspect and there are
!             --  no more enclosing constructs to climb up to. The transitions
!             --  are:
              --
              --    private declarations -> terminate
              --    visible declarations -> terminate
+             --    statements           -> terminate
+             --    declarations         -> terminate
  
!             if Nkind (Parent (Start)) = N_Compilation_Unit then
!                raise ECR_Found;
! 
!             --  Otherwise the input node is still within some list
! 
!             else
!                Curr := Prev (Start);
!             end if;
!          end Include;
! 
!          -----------------------------------
!          -- Is_OK_Preelaborable_Construct --
!          -----------------------------------
! 
!          function Is_OK_Preelaborable_Construct (N : Node_Id) return Boolean is
!          begin
!             --  Assignment statements are acceptable as long as they were
!             --  produced by the ABE mechanism to update elaboration flags.
! 
!             if Nkind (N) = N_Assignment_Statement then
!                return Is_Elaboration_Code (N);
! 
!             --  Block statements are acceptable even though they directly
!             --  violate preelaborability. The intention is not to penalize
!             --  the early call region when a block contains only preelaborable
!             --  constructs.
!             --
!             --    declare
!             --       Val : constant Integer := 1;
!             --    begin
!             --       pragma Assert (Val = 1);
!             --       null;
!             --    end;
!             --
!             --  Note that the Advancement phase does enter blocks, and will
!             --  detect any non-preelaborable declarations or statements within.
! 
!             elsif Nkind (N) = N_Block_Statement then
!                return True;
!             end if;
! 
!             --  Otherwise the construct must be preelaborable. The check must
!             --  take the syntactic and semantic structure of the construct. DO
!             --  NOT use Is_Preelaborable_Construct here.
! 
!             return not Is_Non_Preelaborable_Construct (N);
!          end Is_OK_Preelaborable_Construct;
! 
!          ---------------------------
!          -- Is_Suitable_Construct --
!          ---------------------------
! 
!          function Is_Suitable_Construct (N : Node_Id) return Boolean is
!             Context : constant Node_Id := Parent (N);
! 
!          begin
!             --  An internally-generated statement sequence which contains only
!             --  a single null statement is not a suitable construct because it
!             --  is a byproduct of the parser. Such a null statement should be
!             --  excluded from the early call region because it carries the
!             --  source location of the "end" keyword, and may lead to confusing
!             --  diagnistics.
! 
!             if Nkind (N) = N_Null_Statement
!               and then not Comes_From_Source (N)
!               and then Present (Context)
!               and then Nkind (Context) = N_Handled_Sequence_Of_Statements
              then
!                return False;
!             end if;
  
!             --  Otherwise only constructs which correspond to pure Ada
!             --  constructs are considered suitable.
! 
!             case Nkind (N) is
!                when N_Call_Marker
!                   | N_Freeze_Entity
!                   | N_Freeze_Generic_Entity
!                   | N_Implicit_Label_Declaration
!                   | N_Itype_Reference
!                   | N_Pop_Constraint_Error_Label
!                   | N_Pop_Program_Error_Label
!                   | N_Pop_Storage_Error_Label
!                   | N_Push_Constraint_Error_Label
!                   | N_Push_Program_Error_Label
!                   | N_Push_Storage_Error_Label
!                   | N_SCIL_Dispatch_Table_Tag_Init
!                   | N_SCIL_Dispatching_Call
!                   | N_SCIL_Membership_Test
!                   | N_Variable_Reference_Marker
!                =>
!                   return False;
! 
!                when others =>
!                   return True;
!             end case;
!          end Is_Suitable_Construct;
! 
!          ----------------------------------
!          -- Transition_Body_Declarations --
!          ----------------------------------
! 
!          procedure Transition_Body_Declarations
!            (Bod  : Node_Id;
!             Curr : out Node_Id)
!          is
!             Decls : constant List_Id := Declarations (Bod);
! 
!          begin
!             --  The search must come from the declarations of the body
! 
!             pragma Assert
!               (Is_Non_Empty_List (Decls)
!                 and then List_Containing (Start) = Decls);
! 
!             --  The search finished inspecting the declarations. The construct
!             --  to inspect is the node which precedes the handled body, unless
!             --  the body is a compilation unit. The transitions are:
!             --
!             --    declarations -> upper level
!             --    declarations -> corresponding package spec (Elab_Body)
!             --    declarations -> terminate
! 
!             Transition_Unit (Bod, Curr);
!          end Transition_Body_Declarations;
! 
!          -----------------------------------
!          -- Transition_Handled_Statements --
!          -----------------------------------
! 
!          procedure Transition_Handled_Statements
!            (HSS  : Node_Id;
!             Curr : out Node_Id)
!          is
!             Bod   : constant Node_Id := Parent (HSS);
!             Decls : constant List_Id := Declarations (Bod);
!             Stmts : constant List_Id := Statements (HSS);
! 
!          begin
!             --  The search must come from the statements of certain bodies or
!             --  statements.
! 
!             pragma Assert (Nkind_In (Bod, N_Block_Statement,
!                                           N_Entry_Body,
!                                           N_Package_Body,
!                                           N_Protected_Body,
!                                           N_Subprogram_Body,
!                                           N_Task_Body));
! 
!             --  The search must come from the statements of the handled
!             --  sequence.
! 
!             pragma Assert
!               (Is_Non_Empty_List (Stmts)
!                 and then List_Containing (Start) = Stmts);
! 
!             --  The search finished inspecting the statements. The handled body
!             --  has non-empty declarations. The construct to inspect is the
!             --  last declaration. The transitions are:
              --
              --    statements -> declarations
+ 
+             if Has_Suitable_Construct (Decls) then
+                Curr := Last (Decls);
+ 
+             --  Otherwise the handled body lacks declarations. The construct to
+             --  inspect is the node which precedes the handled body, unless the
+             --  body is a compilation unit. The transitions are:
+             --
              --    statements -> upper level
              --    statements -> corresponding package spec (Elab_Body)
              --    statements -> terminate
  
!             else
!                Transition_Unit (Bod, Curr);
!             end if;
!          end Transition_Handled_Statements;
  
!          ----------------------------------
!          -- Transition_Spec_Declarations --
!          ----------------------------------
! 
!          procedure Transition_Spec_Declarations
!            (Spec : Node_Id;
!             Curr : out Node_Id)
!          is
!             Prv_Decls : constant List_Id := Private_Declarations (Spec);
!             Vis_Decls : constant List_Id := Visible_Declarations (Spec);
! 
!          begin
!             pragma Assert (Present (Start) and then Is_List_Member (Start));
! 
!             --  The search came from the private declarations and finished
!             --  their inspection.
! 
!             if Has_Suitable_Construct (Prv_Decls)
!               and then List_Containing (Start) = Prv_Decls
!             then
!                --  The context has non-empty visible declarations. The node to
!                --  inspect is the last visible declaration. The transitions
!                --  are:
!                --
!                --    private declarations -> visible declarations
! 
!                if Has_Suitable_Construct (Vis_Decls) then
!                   Curr := Last (Vis_Decls);
! 
!                --  Otherwise the context lacks visible declarations. The
!                --  construct to inspect is the node which precedes the context
!                --  unless the context is a compilation unit. The transitions
!                --  are:
!                --
!                --    private declarations -> upper level
!                --    private declarations -> terminate
! 
!                else
!                   Transition_Unit (Parent (Spec), Curr);
!                end if;
! 
!             --  The search came from the visible declarations and finished
!             --  their inspections. The construct to inspect is the node which
!             --  precedes the context, unless the context is a compilaton unit.
!             --  The transitions are:
              --
!             --    visible declarations -> upper level
!             --    visible declarations -> terminate
  
!             elsif Has_Suitable_Construct (Vis_Decls)
!               and then List_Containing (Start) = Vis_Decls
              then
!                Transition_Unit (Parent (Spec), Curr);
  
!             --  At this point both declarative lists are empty, but the
!             --  traversal still came from within the spec. This indicates
!             --  that the invariant of the algorithm has been violated.
  
              else
+                pragma Assert (False);
                 raise ECR_Found;
              end if;
!          end Transition_Spec_Declarations;
  
!          ---------------------
!          -- Transition_Unit --
!          ---------------------
  
!          procedure Transition_Unit
!            (Unit : Node_Id;
!             Curr : out Node_Id)
!          is
!             Context : constant Node_Id := Parent (Unit);
  
!          begin
!             --  The unit is a compilation unit. This terminates the search
!             --  because there are no more lists to inspect and there are no
!             --  more enclosing constructs to climb up to.
  
!             if Nkind (Context) = N_Compilation_Unit then
  
!                --  A package body with a corresponding spec subject to pragma
!                --  Elaborate_Body is an exception to the above. The annotation
!                --  allows the search to continue into the package declaration.
!                --  The transitions are:
!                --
!                --    statements   -> corresponding package spec (Elab_Body)
!                --    declarations -> corresponding package spec (Elab_Body)
  
!                if Nkind (Unit) = N_Package_Body
!                  and then (Assume_Elab_Body
!                             or else Has_Pragma_Elaborate_Body
!                                       (Corresponding_Spec (Unit)))
!                then
!                   Curr := Unit_Declaration_Node (Corresponding_Spec (Unit));
!                   Enter_Package_Declaration (Curr);
  
!                --  Otherwise terminate the search. The transitions are:
!                --
!                --    private declarations -> terminate
!                --    visible declarations -> terminate
!                --    statements           -> terminate
!                --    declarations         -> terminate
  
!                else
!                   raise ECR_Found;
!                end if;
  
!             --  The unit is a subunit. The construct to inspect is the node
!             --  which precedes the corresponding stub. Update the early call
!             --  region to include the unit.
  
!             elsif Nkind (Context) = N_Subunit then
!                Start := Unit;
!                Curr  := Corresponding_Stub (Context);
  
!             --  Otherwise the unit is nested. The construct to inspect is the
!             --  node which precedes the unit. Update the early call region to
!             --  include the unit.
  
!             else
!                Include (Unit, Curr);
!             end if;
!          end Transition_Unit;
  
!          --  Local variables
  
!          Body_Id : constant Entity_Id := Unique_Defining_Entity (Body_Decl);
!          Region  : Node_Id;
  
!       --  Start of processing for Find_Early_Call_Region
  
!       begin
!          --  The caller demands the start of the early call region without
!          --  saving or retrieving it to/from internal data structures.
! 
!          if Skip_Memoization then
!             Region := Find_ECR (Body_Decl);
! 
!          --  Default behavior
  
           else
!             --  Check whether the early call region of the subprogram body is
!             --  available.
! 
!             Region := Early_Call_Region (Body_Id);
! 
!             if No (Region) then
!                Region := Find_ECR (Body_Decl);
! 
!                --  Associate the early call region with the subprogram body in
!                --  case other scenarios need it.
! 
!                Set_Early_Call_Region (Body_Id, Region);
!             end if;
           end if;
  
!          --  A subprogram body must always have an early call region
  
!          pragma Assert (Present (Region));
  
+          return Region;
+       end Find_Early_Call_Region;
+ 
+       --------------------------------------------
+       -- Initialize_Early_Call_Region_Processor --
+       --------------------------------------------
+ 
+       procedure Initialize_Early_Call_Region_Processor is
        begin
!          Early_Call_Regions_Map := ECR_Map.Create (100);
!       end Initialize_Early_Call_Region_Processor;
  
!       ---------------------------
!       -- Set_Early_Call_Region --
!       ---------------------------
  
!       procedure Set_Early_Call_Region (Body_Id : Entity_Id; Start : Node_Id) is
!          pragma Assert (Present (Body_Id));
!          pragma Assert (Present (Start));
  
!       begin
!          ECR_Map.Put (Early_Call_Regions_Map, Body_Id, Start);
!       end Set_Early_Call_Region;
!    end Early_Call_Region_Processor;
  
!    ----------------------
!    -- Elaborated_Units --
!    ----------------------
! 
!    package body Elaborated_Units is
! 
!       -----------
!       -- Types --
!       -----------
! 
!       --  The following type idenfities the elaboration attributes of a unit
! 
!       type Elaboration_Attributes_Id is new Natural;
! 
!       No_Elaboration_Attributes    : constant Elaboration_Attributes_Id :=
!                                        Elaboration_Attributes_Id'First;
!       First_Elaboration_Attributes : constant Elaboration_Attributes_Id :=
!                                        No_Elaboration_Attributes + 1;
! 
!       --  The following type represents the elaboration attributes of a unit
! 
!       type Elaboration_Attributes_Record is record
!          Elab_Pragma : Node_Id := Empty;
!          --  This attribute denotes a source Elaborate or Elaborate_All pragma
!          --  which guarantees the prior elaboration of some unit with respect
!          --  to the main unit. The pragma may come from the following contexts:
!          --
!          --    * The main unit
!          --    * The spec of the main unit (if applicable)
!          --    * Any parent spec of the main unit (if applicable)
!          --    * Any parent subunit of the main unit (if applicable)
!          --
!          --  The attribute remains Empty if no such pragma is available. Source
!          --  pragmas play a role in satisfying SPARK elaboration requirements.
! 
!          With_Clause : Node_Id := Empty;
!          --  This attribute denotes an internally-generated or a source with
!          --  clause for some unit withed by the main unit. With clauses carry
!          --  flags which represent implicit Elaborate or Elaborate_All pragmas.
!          --  These clauses play a role in supplying elaboration dependencies to
!          --  binde.
!       end record;
! 
!       ---------------------
!       -- Data structures --
!       ---------------------
! 
!       --  The following table stores all elaboration attributes
! 
!       package Elaboration_Attributes is new Table.Table
!         (Table_Index_Type     => Elaboration_Attributes_Id,
!          Table_Component_Type => Elaboration_Attributes_Record,
!          Table_Low_Bound      => First_Elaboration_Attributes,
!          Table_Initial        => 250,
!          Table_Increment      => 200,
!          Table_Name           => "Elaboration_Attributes");
! 
!       procedure Destroy (EA_Id : in out Elaboration_Attributes_Id);
!       --  Destroy elaboration attributes EA_Id
! 
!       package UA_Map is new Dynamic_Hash_Tables
!         (Key_Type              => Entity_Id,
!          Value_Type            => Elaboration_Attributes_Id,
!          No_Value              => No_Elaboration_Attributes,
!          Expansion_Threshold   => 1.5,
!          Expansion_Factor      => 2,
!          Compression_Threshold => 0.3,
!          Compression_Factor    => 2,
!          "="                   => "=",
!          Destroy_Value         => Destroy,
!          Hash                  => Hash);
! 
!       --  The following map relates an elaboration attributes of a unit to the
!       --  unit.
! 
!       Unit_To_Attributes_Map : UA_Map.Dynamic_Hash_Table := UA_Map.Nil;
! 
!       ------------------
!       -- Constructors --
!       ------------------
! 
!       function Elaboration_Attributes_Of
!         (Unit_Id : Entity_Id) return Elaboration_Attributes_Id;
!       pragma Inline (Elaboration_Attributes_Of);
!       --  Obtain the elaboration attributes of unit Unit_Id
! 
!       -----------------------
!       -- Local subprograms --
!       -----------------------
! 
!       function Elab_Pragma (EA_Id : Elaboration_Attributes_Id) return Node_Id;
!       pragma Inline (Elab_Pragma);
!       --  Obtain the Elaborate[_All] pragma of elaboration attributes EA_Id
! 
!       procedure Ensure_Prior_Elaboration_Dynamic
!         (N        : Node_Id;
!          Unit_Id  : Entity_Id;
!          Prag_Nam : Name_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Ensure_Prior_Elaboration_Dynamic);
!       --  Guarantee the elaboration of unit Unit_Id with respect to the main
!       --  unit by suggesting the use of Elaborate[_All] with name Prag_Nam. N
!       --  denotes the related scenario. In_State is the current state of the
!       --  Processing phase.
! 
!       procedure Ensure_Prior_Elaboration_Static
!         (N        : Node_Id;
!          Unit_Id  : Entity_Id;
!          Prag_Nam : Name_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Ensure_Prior_Elaboration_Static);
!       --  Guarantee the elaboration of unit Unit_Id with respect to the main
!       --  unit by installing an implicit Elaborate[_All] pragma with name
!       --  Prag_Nam. N denotes the related scenario. In_State is the current
!       --  state of the Processing phase.
! 
!       function Present (EA_Id : Elaboration_Attributes_Id) return Boolean;
!       pragma Inline (Present);
!       --  Determine whether elaboration attributes UA_Id exist
! 
!       procedure Set_Elab_Pragma
!         (EA_Id : Elaboration_Attributes_Id;
!          Prag  : Node_Id);
!       pragma Inline (Set_Elab_Pragma);
!       --  Set the Elaborate[_All] pragma of elaboration attributes EA_Id to
!       --  Prag.
! 
!       procedure Set_With_Clause
!         (EA_Id  : Elaboration_Attributes_Id;
!          Clause : Node_Id);
!       pragma Inline (Set_With_Clause);
!       --  Set the with clause of elaboration attributes EA_Id to Clause
! 
!       function With_Clause (EA_Id : Elaboration_Attributes_Id) return Node_Id;
!       pragma Inline (With_Clause);
!       --  Obtain the implicit or source with clause of elaboration attributes
!       --  EA_Id.
! 
!       ------------------------------
!       -- Collect_Elaborated_Units --
!       ------------------------------
! 
!       procedure Collect_Elaborated_Units is
!          procedure Add_Pragma (Prag : Node_Id);
!          pragma Inline (Add_Pragma);
!          --  Determine whether pragma Prag denotes a legal Elaborate[_All]
!          --  pragma. If this is the case, add the related unit to the context.
!          --  For pragma Elaborate_All, include recursively all units withed by
!          --  the related unit.
! 
!          procedure Add_Unit
!            (Unit_Id      : Entity_Id;
!             Prag         : Node_Id;
!             Full_Context : Boolean);
!          pragma Inline (Add_Unit);
!          --  Add unit Unit_Id to the elaboration context. Prag denotes the
!          --  pragma which prompted the inclusion of the unit to the context.
!          --  If flag Full_Context is set, examine the nonlimited clauses of
!          --  unit Unit_Id and add each withed unit to the context.
! 
!          procedure Find_Elaboration_Context (Comp_Unit : Node_Id);
!          pragma Inline (Find_Elaboration_Context);
!          --  Examine the context items of compilation unit Comp_Unit for
!          --  suitable elaboration-related pragmas and add all related units
!          --  to the context.
! 
!          ----------------
!          -- Add_Pragma --
!          ----------------
! 
!          procedure Add_Pragma (Prag : Node_Id) is
!             Prag_Args : constant List_Id :=
!                           Pragma_Argument_Associations (Prag);
!             Prag_Nam  : constant Name_Id := Pragma_Name (Prag);
!             Unit_Arg  : Node_Id;
! 
!          begin
!             --  Nothing to do if the pragma is not related to elaboration
! 
!             if not Nam_In (Prag_Nam, Name_Elaborate, Name_Elaborate_All) then
!                return;
! 
!             --  Nothing to do when the pragma is illegal
! 
!             elsif Error_Posted (Prag) then
!                return;
              end if;
  
!             Unit_Arg := Get_Pragma_Arg (First (Prag_Args));
  
!             --  The argument of the pragma may appear in package.package form
  
!             if Nkind (Unit_Arg) = N_Selected_Component then
!                Unit_Arg := Selector_Name (Unit_Arg);
!             end if;
  
!             Add_Unit
!               (Unit_Id      => Entity (Unit_Arg),
!                Prag         => Prag,
!                Full_Context => Prag_Nam = Name_Elaborate_All);
!          end Add_Pragma;
  
!          --------------
!          -- Add_Unit --
!          --------------
  
!          procedure Add_Unit
!            (Unit_Id      : Entity_Id;
!             Prag         : Node_Id;
!             Full_Context : Boolean)
!          is
!             Clause    : Node_Id;
!             EA_Id     : Elaboration_Attributes_Id;
!             Unit_Prag : Node_Id;
  
!          begin
!             --  Nothing to do when some previous error left a with clause or a
!             --  pragma in a bad state.
! 
!             if No (Unit_Id) then
!                return;
!             end if;
! 
!             EA_Id     := Elaboration_Attributes_Of (Unit_Id);
!             Unit_Prag := Elab_Pragma (EA_Id);
! 
!             --  The unit is already included in the context by means of pragma
!             --  Elaborate[_All].
! 
!             if Present (Unit_Prag) then
! 
!                --  Upgrade an existing pragma Elaborate when the unit is
!                --  subject to Elaborate_All because the new pragma covers a
!                --  larger set of units.
! 
!                if Pragma_Name (Unit_Prag) = Name_Elaborate
!                  and then Pragma_Name (Prag) = Name_Elaborate_All
!                then
!                   Set_Elab_Pragma (EA_Id, Prag);
! 
!                --  Otherwise the unit retains its existing pragma and does not
!                --  need to be included in the context again.
! 
!                else
!                   return;
                 end if;
  
!             --  Otherwise the current unit is not included in the context
  
!             else
!                Set_Elab_Pragma (EA_Id, Prag);
!             end if;
  
!             --  Includes all units withed by the current one when computing the
!             --  full context.
  
!             if Full_Context then
  
!                --  Process all nonlimited with clauses found in the context of
!                --  the current unit. Note that limited clauses do not impose an
!                --  elaboration order.
  
!                Clause := First (Context_Items (Compilation_Unit (Unit_Id)));
!                while Present (Clause) loop
!                   if Nkind (Clause) = N_With_Clause
!                     and then not Error_Posted (Clause)
!                     and then not Limited_Present (Clause)
!                   then
!                      Add_Unit
!                        (Unit_Id      => Entity (Name (Clause)),
!                         Prag         => Prag,
!                         Full_Context => Full_Context);
!                   end if;
  
!                   Next (Clause);
!                end loop;
!             end if;
!          end Add_Unit;
  
!          ------------------------------
!          -- Find_Elaboration_Context --
!          ------------------------------
  
!          procedure Find_Elaboration_Context (Comp_Unit : Node_Id) is
!             pragma Assert (Nkind (Comp_Unit) = N_Compilation_Unit);
  
!             Prag : Node_Id;
  
!          begin
!             --  Process all elaboration-related pragmas found in the context of
!             --  the compilation unit.
  
!             Prag := First (Context_Items (Comp_Unit));
!             while Present (Prag) loop
!                if Nkind (Prag) = N_Pragma then
!                   Add_Pragma (Prag);
!                end if;
! 
!                Next (Prag);
!             end loop;
!          end Find_Elaboration_Context;
! 
!          --  Local variables
! 
!          Par_Id  : Entity_Id;
!          Unit_Id : Node_Id;
! 
!       --  Start of processing for Collect_Elaborated_Units
! 
!       begin
!          --  Perform a traversal to examines the context of the main unit. The
!          --  traversal performs the following jumps:
           --
!          --    subunit        -> parent subunit
!          --    parent subunit -> body
!          --    body           -> spec
!          --    spec           -> parent spec
!          --    parent spec    -> grandparent spec and so on
           --
!          --  The traversal relies on units rather than scopes because the scope
!          --  of a subunit is some spec, while this traversal must process the
!          --  body as well. Given that protected and task bodies can also be
!          --  subunits, this complicates the scope approach even further.
  
!          Unit_Id := Unit (Cunit (Main_Unit));
  
!          --  Perform the following traversals when the main unit is a subunit
!          --
!          --    subunit        -> parent subunit
!          --    parent subunit -> body
  
!          while Present (Unit_Id) and then Nkind (Unit_Id) = N_Subunit loop
!             Find_Elaboration_Context (Parent (Unit_Id));
  
!             --  Continue the traversal by going to the unit which contains the
!             --  corresponding stub.
  
!             if Present (Corresponding_Stub (Unit_Id)) then
!                Unit_Id :=
!                  Unit (Cunit (Get_Source_Unit (Corresponding_Stub (Unit_Id))));
  
!             --  Otherwise the subunit may be erroneous or left in a bad state
  
!             else
!                exit;
!             end if;
!          end loop;
! 
!          --  Perform the following traversal now that subunits have been taken
!          --  care of, or the main unit is a body.
!          --
!          --    body -> spec
! 
!          if Present (Unit_Id)
!            and then Nkind_In (Unit_Id, N_Package_Body, N_Subprogram_Body)
           then
!             Find_Elaboration_Context (Parent (Unit_Id));
! 
!             --  Continue the traversal by going to the unit which contains the
!             --  corresponding spec.
! 
!             if Present (Corresponding_Spec (Unit_Id)) then
!                Unit_Id :=
!                  Unit (Cunit (Get_Source_Unit (Corresponding_Spec (Unit_Id))));
!             end if;
           end if;
  
!          --  Perform the following traversals now that the body has been taken
!          --  care of, or the main unit is a spec.
!          --
!          --    spec        -> parent spec
!          --    parent spec -> grandparent spec and so on
  
!          if Present (Unit_Id)
!            and then Nkind_In (Unit_Id, N_Generic_Package_Declaration,
!                                    N_Generic_Subprogram_Declaration,
!                                    N_Package_Declaration,
!                                    N_Subprogram_Declaration)
!          then
!             Find_Elaboration_Context (Parent (Unit_Id));
  
!             --  Process a potential chain of parent units which ends with the
!             --  main unit spec. The traversal can now safely rely on the scope
!             --  chain.
  
!             Par_Id := Scope (Defining_Entity (Unit_Id));
!             while Present (Par_Id) and then Par_Id /= Standard_Standard loop
!                Find_Elaboration_Context (Compilation_Unit (Par_Id));
  
!                Par_Id := Scope (Par_Id);
!             end loop;
!          end if;
!       end Collect_Elaborated_Units;
! 
!       -------------
!       -- Destroy --
!       -------------
! 
!       procedure Destroy (EA_Id : in out Elaboration_Attributes_Id) is
!          pragma Unreferenced (EA_Id);
!       begin
!          null;
!       end Destroy;
! 
!       -----------------
!       -- Elab_Pragma --
!       -----------------
! 
!       function Elab_Pragma
!         (EA_Id : Elaboration_Attributes_Id) return Node_Id
        is
!          pragma Assert (Present (EA_Id));
!       begin
!          return Elaboration_Attributes.Table (EA_Id).Elab_Pragma;
!       end Elab_Pragma;
! 
!       -------------------------------
!       -- Elaboration_Attributes_Of --
!       -------------------------------
! 
!       function Elaboration_Attributes_Of
!         (Unit_Id : Entity_Id) return Elaboration_Attributes_Id
!       is
!          EA_Id : Elaboration_Attributes_Id;
  
        begin
!          EA_Id := UA_Map.Get (Unit_To_Attributes_Map, Unit_Id);
  
!          --  The unit lacks elaboration attributes. This indicates that the
!          --  unit is encountered for the first time. Create the elaboration
!          --  attributes for it.
  
!          if not Present (EA_Id) then
!             Elaboration_Attributes.Append
!               ((Elab_Pragma => Empty,
!                 With_Clause => Empty));
!             EA_Id := Elaboration_Attributes.Last;
  
!             --  Associate the elaboration attributes with the unit
  
!             UA_Map.Put (Unit_To_Attributes_Map, Unit_Id, EA_Id);
!          end if;
  
!          pragma Assert (Present (EA_Id));
! 
!          return EA_Id;
!       end Elaboration_Attributes_Of;
! 
!       ------------------------------
!       -- Ensure_Prior_Elaboration --
!       ------------------------------
! 
!       procedure Ensure_Prior_Elaboration
!         (N        : Node_Id;
!          Unit_Id  : Entity_Id;
!          Prag_Nam : Name_Id;
!          In_State : Processing_In_State)
        is
!          pragma Assert (Nam_In (Prag_Nam, Name_Elaborate, Name_Elaborate_All));
  
        begin
!          --  Nothing to do when the need for prior elaboration came from a
!          --  partial finalization routine which occurs in an initialization
!          --  context. This behaviour parallels that of the old ABE mechanism.
  
!          if In_State.Within_Partial_Finalization then
!             return;
  
!          --  Nothing to do when the need for prior elaboration came from a task
!          --  body and switch -gnatd.y (disable implicit pragma Elaborate_All on
!          --  task bodies) is in effect.
  
!          elsif Debug_Flag_Dot_Y and then In_State.Within_Task_Body then
!             return;
  
!          --  Nothing to do when the unit is elaborated prior to the main unit.
!          --  This check must also consider the following cases:
           --
!          --  * No check is made against the context of the main unit because
!          --    this is specific to the elaboration model in effect and requires
!          --    custom handling (see Ensure_xxx_Prior_Elaboration).
!          --
!          --  * Unit_Id is subject to pragma Elaborate_Body. An implicit pragma
!          --    Elaborate[_All] MUST be generated even though Unit_Id is always
!          --    elaborated prior to the main unit. This conservative strategy
!          --    ensures that other units withed by Unit_Id will not lead to an
!          --  ABE.
!          --
!          --      package A is               package body A is
!          --         procedure ABE;             procedure ABE is ... end ABE;
!          --      end A;                     end A;
!          --
!          --      with A;
!          --      package B is               package body B is
!          --         pragma Elaborate_Body;     procedure Proc is
!          --                                    begin
!          --         procedure Proc;               A.ABE;
!          --      package B;                    end Proc;
!          --                                 end B;
!          --
!          --      with B;
!          --      package C is               package body C is
!          --         ...                        ...
!          --      end C;                     begin
!          --                                    B.Proc;
!          --                                 end C;
!          --
!          --    In the example above, the elaboration of C invokes B.Proc. B is
!          --    subject to pragma Elaborate_Body. If no pragma Elaborate[_All]
!          --    is gnerated for B in C, then the following elaboratio order will
!          --    lead to an ABE:
!          --
!          --       spec of A elaborated
!          --       spec of B elaborated
!          --       body of B elaborated
!          --       spec of C elaborated
!          --       body of C elaborated  <--  calls B.Proc which calls A.ABE
!          --       body of A elaborated  <--  problem
!          --
!          --    The generation of an implicit pragma Elaborate_All (B) ensures
!          --    that the elaboration-order mechanism will not pick the above
!          --    order.
!          --
!          --    An implicit Elaborate is NOT generated when the unit is subject
!          --    to Elaborate_Body because both pragmas have the same effect.
!          --
!          --  * Unit_Id is the main unit. An implicit pragma Elaborate[_All]
!          --    MUST NOT be generated in this case because a unit cannot depend
!          --    on its own elaboration. This case is therefore treated as valid
!          --    prior elaboration.
  
!          elsif Has_Prior_Elaboration
!                  (Unit_Id      => Unit_Id,
!                   Same_Unit_OK => True,
!                   Elab_Body_OK => Prag_Nam = Name_Elaborate)
!          then
!             return;
!          end if;
  
!          --  Suggest the use of pragma Prag_Nam when the dynamic model is in
!          --  effect.
! 
!          if Dynamic_Elaboration_Checks then
!             Ensure_Prior_Elaboration_Dynamic
!               (N        => N,
!                Unit_Id  => Unit_Id,
!                Prag_Nam => Prag_Nam,
!                In_State => In_State);
! 
!          --  Install an implicit pragma Prag_Nam when the static model is in
!          --  effect.
  
           else
!             pragma Assert (Static_Elaboration_Checks);
! 
!             Ensure_Prior_Elaboration_Static
!               (N        => N,
!                Unit_Id  => Unit_Id,
!                Prag_Nam => Prag_Nam,
!                In_State => In_State);
           end if;
!       end Ensure_Prior_Elaboration;
  
!       --------------------------------------
!       -- Ensure_Prior_Elaboration_Dynamic --
!       --------------------------------------
  
!       procedure Ensure_Prior_Elaboration_Dynamic
!         (N        : Node_Id;
!          Unit_Id  : Entity_Id;
!          Prag_Nam : Name_Id;
!          In_State : Processing_In_State)
        is
!          procedure Info_Missing_Pragma;
!          pragma Inline (Info_Missing_Pragma);
!          --  Output information concerning missing Elaborate or Elaborate_All
!          --  pragma with name Prag_Nam for scenario N, which would ensure the
!          --  prior elaboration of Unit_Id.
  
!          -------------------------
!          -- Info_Missing_Pragma --
!          -------------------------
  
!          procedure Info_Missing_Pragma is
!          begin
!             --  Internal units are ignored as they cause unnecessary noise
  
!             if not In_Internal_Unit (Unit_Id) then
  
!                --  The name of the unit subjected to the elaboration pragma is
!                --  fully qualified to improve the clarity of the info message.
  
!                Error_Msg_Name_1     := Prag_Nam;
!                Error_Msg_Qual_Level := Nat'Last;
  
!                Error_Msg_NE ("info: missing pragma % for unit &", N, Unit_Id);
!                Error_Msg_Qual_Level := 0;
              end if;
+          end Info_Missing_Pragma;
  
!          --  Local variables
  
!          EA_Id : constant Elaboration_Attributes_Id :=
!                    Elaboration_Attributes_Of (Unit_Id);
!          N_Lvl : Enclosing_Level_Kind;
!          N_Rep : Scenario_Rep_Id;
  
!       --  Start of processing for Ensure_Prior_Elaboration_Dynamic
  
!       begin
!          --  Nothing to do when the unit is guaranteed prior elaboration by
!          --  means of a source Elaborate[_All] pragma.
! 
!          if Present (Elab_Pragma (EA_Id)) then
!             return;
           end if;
  
!          --  Output extra information on a missing Elaborate[_All] pragma when
!          --  switch -gnatel (info messages on implicit Elaborate[_All] pragmas
!          --  is in effect.
  
!          if Elab_Info_Messages
!            and then not In_State.Suppress_Info_Messages
!          then
!             N_Rep := Scenario_Representation_Of (N, In_State);
!             N_Lvl := Level (N_Rep);
  
!             --  Declaration-level scenario
  
!             if (Is_Suitable_Call (N) or else Is_Suitable_Instantiation (N))
!               and then N_Lvl = Declaration_Level
!             then
!                null;
  
!             --  Library-level scenario
  
!             elsif N_Lvl in Library_Level then
!                null;
  
!             --  Instantiation library-level scenario
! 
!             elsif N_Lvl = Instantiation_Level then
!                null;
! 
!             --  Otherwise the scenario does not appear at the proper level
  
              else
!                return;
              end if;
  
!             Info_Missing_Pragma;
!          end if;
!       end Ensure_Prior_Elaboration_Dynamic;
  
!       -------------------------------------
!       -- Ensure_Prior_Elaboration_Static --
!       -------------------------------------
  
!       procedure Ensure_Prior_Elaboration_Static
!         (N        : Node_Id;
!          Unit_Id  : Entity_Id;
!          Prag_Nam : Name_Id;
!          In_State : Processing_In_State)
!       is
!          function Find_With_Clause
!            (Items     : List_Id;
!             Withed_Id : Entity_Id) return Node_Id;
!          pragma Inline (Find_With_Clause);
!          --  Find a nonlimited with clause in the list of context items Items
!          --  that withs unit Withed_Id. Return Empty if no such clause exists.
  
!          procedure Info_Implicit_Pragma;
!          pragma Inline (Info_Implicit_Pragma);
!          --  Output information concerning an implicitly generated Elaborate
!          --  or Elaborate_All pragma with name Prag_Nam for scenario N which
!          --  ensures the prior elaboration of unit Unit_Id.
  
!          ----------------------
!          -- Find_With_Clause --
!          ----------------------
  
!          function Find_With_Clause
!            (Items     : List_Id;
!             Withed_Id : Entity_Id) return Node_Id
!          is
!             Item : Node_Id;
  
!          begin
!             --  Examine the context clauses looking for a suitable with. Note
!             --  that limited clauses do not affect the elaboration order.
  
!             Item := First (Items);
!             while Present (Item) loop
!                if Nkind (Item) = N_With_Clause
!                  and then not Error_Posted (Item)
!                  and then not Limited_Present (Item)
!                  and then Entity (Name (Item)) = Withed_Id
!                then
!                   return Item;
!                end if;
  
!                Next (Item);
!             end loop;
  
!             return Empty;
!          end Find_With_Clause;
  
!          --------------------------
!          -- Info_Implicit_Pragma --
!          --------------------------
  
!          procedure Info_Implicit_Pragma is
!          begin
!             --  Internal units are ignored as they cause unnecessary noise
  
!             if not In_Internal_Unit (Unit_Id) then
  
!                --  The name of the unit subjected to the elaboration pragma is
!                --  fully qualified to improve the clarity of the info message.
  
!                Error_Msg_Name_1     := Prag_Nam;
!                Error_Msg_Qual_Level := Nat'Last;
  
!                Error_Msg_NE
!                  ("info: implicit pragma % generated for unit &", N, Unit_Id);
  
!                Error_Msg_Qual_Level := 0;
!                Output_Active_Scenarios (N, In_State);
!             end if;
!          end Info_Implicit_Pragma;
  
!          --  Local variables
  
!          EA_Id : constant Elaboration_Attributes_Id :=
!                    Elaboration_Attributes_Of (Unit_Id);
  
!          Main_Cunit : constant Node_Id    := Cunit (Main_Unit);
!          Loc        : constant Source_Ptr := Sloc (Main_Cunit);
!          Unit_Cunit : constant Node_Id    := Compilation_Unit (Unit_Id);
!          Unit_Prag  : constant Node_Id    := Elab_Pragma (EA_Id);
!          Unit_With  : constant Node_Id    := With_Clause (EA_Id);
  
!          Clause : Node_Id;
!          Items  : List_Id;
  
!       --  Start of processing for Ensure_Prior_Elaboration_Static
  
!       begin
!          --  Nothing to do when the caller has suppressed the generation of
!          --  implicit Elaborate[_All] pragmas.
  
!          if In_State.Suppress_Implicit_Pragmas then
!             return;
  
!          --  Nothing to do when the unit is guaranteed prior elaboration by
!          --  means of a source Elaborate[_All] pragma.
  
!          elsif Present (Unit_Prag) then
!             return;
  
!          --  Nothing to do when the unit has an existing implicit Elaborate or
!          --  Elaborate_All pragma installed by a previous scenario.
  
!          elsif Present (Unit_With) then
  
!             --  The unit is already guaranteed prior elaboration by means of an
!             --  implicit Elaborate pragma, however the current scenario imposes
!             --  a stronger requirement of Elaborate_All. "Upgrade" the existing
!             --  pragma to match this new requirement.
! 
!             if Elaborate_Desirable (Unit_With)
!               and then Prag_Nam = Name_Elaborate_All
!             then
!                Set_Elaborate_All_Desirable (Unit_With);
!                Set_Elaborate_Desirable     (Unit_With, False);
!             end if;
  
              return;
           end if;
  
!          --  At this point it is known that the unit has no prior elaboration
!          --  according to pragmas and hierarchical relationships.
  
!          Items := Context_Items (Main_Cunit);
  
!          if No (Items) then
!             Items := New_List;
!             Set_Context_Items (Main_Cunit, Items);
           end if;
  
!          --  Locate the with clause for the unit. Note that there may not be a
!          --  clause if the unit is visible through a subunit-body, body-spec,
!          --  or spec-parent relationship.
  
!          Clause :=
!            Find_With_Clause
!              (Items     => Items,
!               Withed_Id => Unit_Id);
  
!          --  Generate:
!          --    with Id;
! 
!          --  Note that adding implicit with clauses is safe because analysis,
!          --  resolution, and expansion have already taken place and it is not
!          --  possible to interfere with visibility.
! 
!          if No (Clause) then
!             Clause :=
!               Make_With_Clause (Loc,
!                 Name => New_Occurrence_Of (Unit_Id, Loc));
! 
!             Set_Implicit_With (Clause);
!             Set_Library_Unit  (Clause, Unit_Cunit);
! 
!             Append_To (Items, Clause);
!          end if;
! 
!          --  Mark the with clause depending on the pragma required
! 
!          if Prag_Nam = Name_Elaborate then
!             Set_Elaborate_Desirable (Clause);
!          else
!             Set_Elaborate_All_Desirable (Clause);
!          end if;
! 
!          --  The implicit Elaborate[_All] ensures the prior elaboration of
!          --  the unit. Include the unit in the elaboration context of the
!          --  main unit.
! 
!          Set_With_Clause (EA_Id, Clause);
! 
!          --  Output extra information on an implicit Elaborate[_All] pragma
!          --  when switch -gnatel (info messages on implicit Elaborate[_All]
!          --  pragmas is in effect.
! 
!          if Elab_Info_Messages then
!             Info_Implicit_Pragma;
!          end if;
!       end Ensure_Prior_Elaboration_Static;
! 
!       -------------------------------
!       -- Finalize_Elaborated_Units --
!       -------------------------------
! 
!       procedure Finalize_Elaborated_Units is
!       begin
!          UA_Map.Destroy (Unit_To_Attributes_Map);
!       end Finalize_Elaborated_Units;
! 
!       ---------------------------
!       -- Has_Prior_Elaboration --
!       ---------------------------
! 
!       function Has_Prior_Elaboration
          (Unit_Id      : Entity_Id;
!          Context_OK   : Boolean := False;
!          Elab_Body_OK : Boolean := False;
!          Same_Unit_OK : Boolean := False) return Boolean
        is
!          EA_Id     : constant Elaboration_Attributes_Id :=
!                        Elaboration_Attributes_Of (Unit_Id);
!          Main_Id   : constant Entity_Id := Main_Unit_Entity;
!          Unit_Prag : constant Node_Id   := Elab_Pragma (EA_Id);
!          Unit_With : constant Node_Id   := With_Clause (EA_Id);
  
        begin
!          --  A preelaborated unit is always elaborated prior to the main unit
  
!          if Is_Preelaborated_Unit (Unit_Id) then
!             return True;
! 
!          --  An internal unit is always elaborated prior to a non-internal main
!          --  unit.
! 
!          elsif In_Internal_Unit (Unit_Id)
!            and then not In_Internal_Unit (Main_Id)
!          then
!             return True;
! 
!          --  A unit has prior elaboration if it appears within the context
!          --  of the main unit. Consider this case only when requested by the
!          --  caller.
! 
!          elsif Context_OK
!            and then (Present (Unit_Prag) or else Present (Unit_With))
!          then
!             return True;
! 
!          --  A unit whose body is elaborated together with its spec has prior
!          --  elaboration except with respect to itself. Consider this case only
!          --  when requested by the caller.
! 
!          elsif Elab_Body_OK
!            and then Has_Pragma_Elaborate_Body (Unit_Id)
!            and then not Is_Same_Unit (Unit_Id, Main_Id)
!          then
!             return True;
! 
!          --  A unit has no prior elaboration with respect to itself, but does
!          --  not require any means of ensuring its own elaboration either.
!          --  Treat this case as valid prior elaboration only when requested by
!          --  the caller.
! 
!          elsif Same_Unit_OK and then Is_Same_Unit (Unit_Id, Main_Id) then
!             return True;
           end if;
  
!          return False;
!       end Has_Prior_Elaboration;
  
!       ---------------------------------
!       -- Initialize_Elaborated_Units --
!       ---------------------------------
  
!       procedure Initialize_Elaborated_Units is
!       begin
!          Unit_To_Attributes_Map := UA_Map.Create (250);
!       end Initialize_Elaborated_Units;
  
!       ----------------------------------
!       -- Meet_Elaboration_Requirement --
!       ----------------------------------
  
!       procedure Meet_Elaboration_Requirement
!         (N        : Node_Id;
!          Targ_Id  : Entity_Id;
!          Req_Nam  : Name_Id;
!          In_State : Processing_In_State)
!       is
!          pragma Assert (Nam_In (Req_Nam, Name_Elaborate, Name_Elaborate_All));
  
!          Main_Id : constant Entity_Id := Main_Unit_Entity;
!          Unit_Id : constant Entity_Id := Find_Top_Unit (Targ_Id);
! 
!          procedure Elaboration_Requirement_Error;
!          pragma Inline (Elaboration_Requirement_Error);
!          --  Emit an error concerning scenario N which has failed to meet the
!          --  elaboration requirement.
! 
!          function Find_Preelaboration_Pragma
!            (Prag_Nam : Name_Id) return Node_Id;
!          pragma Inline (Find_Preelaboration_Pragma);
!          --  Traverse the visible declarations of unit Unit_Id and locate a
!          --  source preelaboration-related pragma with name Prag_Nam.
! 
!          procedure Info_Requirement_Met (Prag : Node_Id);
!          pragma Inline (Info_Requirement_Met);
!          --  Output information concerning pragma Prag which meets requirement
!          --  Req_Nam.
! 
!          -----------------------------------
!          -- Elaboration_Requirement_Error --
!          -----------------------------------
! 
!          procedure Elaboration_Requirement_Error is
!          begin
!             if Is_Suitable_Call (N) then
!                Info_Call
!                  (Call     => N,
!                   Subp_Id  => Targ_Id,
!                   Info_Msg => False,
!                   In_SPARK => True);
! 
!             elsif Is_Suitable_Instantiation (N) then
!                Info_Instantiation
!                  (Inst     => N,
!                   Gen_Id   => Targ_Id,
!                   Info_Msg => False,
!                   In_SPARK => True);
! 
!             elsif Is_Suitable_SPARK_Refined_State_Pragma (N) then
!                Error_Msg_N
!                  ("read of refinement constituents during elaboration in "
!                   & "SPARK", N);
! 
!             elsif Is_Suitable_Variable_Reference (N) then
!                Info_Variable_Reference
!                  (Ref      => N,
!                   Var_Id   => Targ_Id,
!                   Info_Msg => False,
!                   In_SPARK => True);
! 
!             --  No other scenario may impose a requirement on the context of
!             --  the main unit.
  
              else
+                pragma Assert (False);
                 return;
              end if;
  
!             Error_Msg_Name_1 := Req_Nam;
!             Error_Msg_Node_2 := Unit_Id;
!             Error_Msg_NE ("\\unit & requires pragma % for &", N, Main_Id);
  
!             Output_Active_Scenarios (N, In_State);
!          end Elaboration_Requirement_Error;
  
!          --------------------------------
!          -- Find_Preelaboration_Pragma --
!          --------------------------------
  
!          function Find_Preelaboration_Pragma
!            (Prag_Nam : Name_Id) return Node_Id
!          is
!             Spec : constant Node_Id := Parent (Unit_Id);
!             Decl : Node_Id;
  
!          begin
!             --  A preelaboration-related pragma comes from source and appears
!             --  at the top of the visible declarations of a package.
  
!             if Nkind (Spec) = N_Package_Specification then
!                Decl := First (Visible_Declarations (Spec));
!                while Present (Decl) loop
!                   if Comes_From_Source (Decl) then
!                      if Nkind (Decl) = N_Pragma
!                        and then Pragma_Name (Decl) = Prag_Nam
!                      then
!                         return Decl;
  
!                      --  Otherwise the construct terminates the region where
!                      --  the preelaboration-related pragma may appear.
  
!                      else
!                         exit;
!                      end if;
!                   end if;
  
!                   Next (Decl);
!                end loop;
!             end if;
  
!             return Empty;
!          end Find_Preelaboration_Pragma;
  
!          --------------------------
!          -- Info_Requirement_Met --
!          --------------------------
! 
!          procedure Info_Requirement_Met (Prag : Node_Id) is
!             pragma Assert (Present (Prag));
! 
!          begin
!             Error_Msg_Name_1 := Req_Nam;
!             Error_Msg_Sloc   := Sloc (Prag);
!             Error_Msg_NE
!               ("\\% requirement for unit & met by pragma #", N, Unit_Id);
!          end Info_Requirement_Met;
! 
!          --  Local variables
! 
!          EA_Id     : Elaboration_Attributes_Id;
!          Elab_Nam  : Name_Id;
!          Req_Met   : Boolean;
!          Unit_Prag : Node_Id;
! 
!       --  Start of processing for Meet_Elaboration_Requirement
  
        begin
!          --  Assume that the requirement has not been met
  
!          Req_Met := False;
  
!          --  If the target is within the main unit, either at the source level
!          --  or through an instantiation, then there is no real requirement to
!          --  meet because the main unit cannot force its own elaboration by
!          --  means of an Elaborate[_All] pragma. Treat this case as valid
!          --  coverage.
  
!          if In_Extended_Main_Code_Unit (Targ_Id) then
!             Req_Met := True;
  
!          --  Otherwise the target resides in an external unit
  
!          --  The requirement is met when the target comes from an internal unit
!          --  because such a unit is elaborated prior to a non-internal unit.
  
!          elsif In_Internal_Unit (Unit_Id)
!            and then not In_Internal_Unit (Main_Id)
!          then
!             Req_Met := True;
  
!          --  The requirement is met when the target comes from a preelaborated
!          --  unit. This portion must parallel predicate Is_Preelaborated_Unit.
  
!          elsif Is_Preelaborated_Unit (Unit_Id) then
!             Req_Met := True;
  
!             --  Output extra information when switch -gnatel (info messages on
!             --  implicit Elaborate[_All] pragmas.
  
!             if Elab_Info_Messages
!               and then not In_State.Suppress_Info_Messages
!             then
!                if Is_Preelaborated (Unit_Id) then
!                   Elab_Nam := Name_Preelaborate;
  
!                elsif Is_Pure (Unit_Id) then
!                   Elab_Nam := Name_Pure;
  
!                elsif Is_Remote_Call_Interface (Unit_Id) then
!                   Elab_Nam := Name_Remote_Call_Interface;
  
!                elsif Is_Remote_Types (Unit_Id) then
!                   Elab_Nam := Name_Remote_Types;
  
!                else
!                   pragma Assert (Is_Shared_Passive (Unit_Id));
!                   Elab_Nam := Name_Shared_Passive;
!                end if;
  
!                Info_Requirement_Met (Find_Preelaboration_Pragma (Elab_Nam));
!             end if;
  
!          --  Determine whether the context of the main unit has a pragma strong
!          --  enough to meet the requirement.
  
           else
!             EA_Id     := Elaboration_Attributes_Of (Unit_Id);
!             Unit_Prag := Elab_Pragma (EA_Id);
  
!             --  The pragma must be either Elaborate_All or be as strong as the
!             --  requirement.
  
!             if Present (Unit_Prag)
!               and then Nam_In (Pragma_Name (Unit_Prag), Name_Elaborate_All,
!                                                         Req_Nam)
!             then
!                Req_Met := True;
  
!                --  Output extra information when switch -gnatel (info messages
!                --  on implicit Elaborate[_All] pragmas.
  
!                if Elab_Info_Messages
!                  and then not In_State.Suppress_Info_Messages
!                then
!                   Info_Requirement_Met (Unit_Prag);
!                end if;
!             end if;
!          end if;
  
!          --  The requirement was not met by the context of the main unit, issue
!          --  an error.
! 
!          if not Req_Met then
!             Elaboration_Requirement_Error;
           end if;
!       end Meet_Elaboration_Requirement;
  
!       -------------
!       -- Present --
!       -------------
  
!       function Present (EA_Id : Elaboration_Attributes_Id) return Boolean is
!       begin
!          return EA_Id /= No_Elaboration_Attributes;
!       end Present;
  
!       ---------------------
!       -- Set_Elab_Pragma --
!       ---------------------
  
!       procedure Set_Elab_Pragma
!         (EA_Id : Elaboration_Attributes_Id;
!          Prag  : Node_Id)
!       is
!          pragma Assert (Present (EA_Id));
!       begin
!          Elaboration_Attributes.Table (EA_Id).Elab_Pragma := Prag;
!       end Set_Elab_Pragma;
  
!       ---------------------
!       -- Set_With_Clause --
!       ---------------------
  
!       procedure Set_With_Clause
!         (EA_Id  : Elaboration_Attributes_Id;
!          Clause : Node_Id)
!       is
!          pragma Assert (Present (EA_Id));
!       begin
!          Elaboration_Attributes.Table (EA_Id).With_Clause := Clause;
!       end Set_With_Clause;
! 
!       -----------------
!       -- With_Clause --
!       -----------------
! 
!       function With_Clause
!         (EA_Id : Elaboration_Attributes_Id) return Node_Id
!       is
!          pragma Assert (Present (EA_Id));
!       begin
!          return Elaboration_Attributes.Table (EA_Id).With_Clause;
!       end With_Clause;
!    end Elaborated_Units;
! 
!    ------------------------------
!    -- Elaboration_Phase_Active --
!    ------------------------------
! 
!    function Elaboration_Phase_Active return Boolean is
!    begin
!       return Elaboration_Phase = Active;
!    end Elaboration_Phase_Active;
! 
!    ----------------------------------
!    -- Finalize_All_Data_Structures --
!    ----------------------------------
! 
!    procedure Finalize_All_Data_Structures is
!    begin
!       Finalize_Body_Processor;
!       Finalize_Early_Call_Region_Processor;
!       Finalize_Elaborated_Units;
!       Finalize_Internal_Representation;
!       Finalize_Invocation_Graph;
!       Finalize_Scenario_Storage;
!    end Finalize_All_Data_Structures;
  
     -----------------------------
     -- Find_Enclosing_Instance --
     -----------------------------
  
     function Find_Enclosing_Instance (N : Node_Id) return Node_Id is
!       Par : Node_Id;
  
     begin
        --  Climb the parent chain looking for an enclosing instance spec or body
  
        Par := N;
        while Present (Par) loop
!          if Nkind_In (Par, N_Package_Body,
!                            N_Package_Declaration,
!                            N_Subprogram_Body,
                             N_Subprogram_Declaration)
!            and then Is_Generic_Instance (Unique_Defining_Entity (Par))
           then
              return Par;
           end if;
  
           Par := Parent (Par);
*************** package body Sem_Elab is
*** 5340,5345 ****
--- 8898,8904 ----
  
     function Find_Enclosing_Level (N : Node_Id) return Enclosing_Level_Kind is
        function Level_Of (Unit : Node_Id) return Enclosing_Level_Kind;
+       pragma Inline (Level_Of);
        --  Obtain the corresponding level of unit Unit
  
        --------------
*************** package body Sem_Elab is
*** 5351,5363 ****
  
        begin
           if Nkind (Unit) in N_Generic_Instantiation then
!             return Instantiation;
  
           elsif Nkind (Unit) = N_Generic_Package_Declaration then
!             return Generic_Package_Spec;
  
           elsif Nkind (Unit) = N_Package_Declaration then
!             return Package_Spec;
  
           elsif Nkind (Unit) = N_Package_Body then
              Spec_Id := Corresponding_Spec (Unit);
--- 8910,8922 ----
  
        begin
           if Nkind (Unit) in N_Generic_Instantiation then
!             return Instantiation_Level;
  
           elsif Nkind (Unit) = N_Generic_Package_Declaration then
!             return Generic_Spec_Level;
  
           elsif Nkind (Unit) = N_Package_Declaration then
!             return Library_Spec_Level;
  
           elsif Nkind (Unit) = N_Package_Body then
              Spec_Id := Corresponding_Spec (Unit);
*************** package body Sem_Elab is
*** 5367,5380 ****
              if Present (Spec_Id)
                and then Ekind (Spec_Id) = E_Generic_Package
              then
!                return Generic_Package_Body;
  
              --  Otherwise the body belongs to a non-generic package. This also
              --  treats an illegal package body without a corresponding spec as
              --  a non-generic package body.
  
              else
!                return Package_Body;
              end if;
           end if;
  
--- 8926,8939 ----
              if Present (Spec_Id)
                and then Ekind (Spec_Id) = E_Generic_Package
              then
!                return Generic_Body_Level;
  
              --  Otherwise the body belongs to a non-generic package. This also
              --  treats an illegal package body without a corresponding spec as
              --  a non-generic package body.
  
              else
!                return Library_Body_Level;
              end if;
           end if;
  
*************** package body Sem_Elab is
*** 5472,5480 ****
              end if;
  
           --  The current construct is a non-library-level encapsulator which
!          --  indicates that the node cannot possibly appear at any level.
!          --  Note that this check must come after the declaration-level check
!          --  because both predicates share certain nodes.
  
           elsif Is_Non_Library_Level_Encapsulator (Curr) then
              Context := Parent (Curr);
--- 9031,9039 ----
              end if;
  
           --  The current construct is a non-library-level encapsulator which
!          --  indicates that the node cannot possibly appear at any level. Note
!          --  that the check must come after the declaration-level check because
!          --  both predicates share certain nodes.
  
           elsif Is_Non_Library_Level_Encapsulator (Curr) then
              Context := Parent (Curr);
*************** package body Sem_Elab is
*** 5601,5622 ****
--- 9160,9713 ----
        return Empty;
     end First_Formal_Type;
  
+    ------------------------------
+    -- Guaranteed_ABE_Processor --
+    ------------------------------
+ 
+    package body Guaranteed_ABE_Processor is
+       function Is_Guaranteed_ABE
+         (N           : Node_Id;
+          Target_Decl : Node_Id;
+          Target_Body : Node_Id) return Boolean;
+       pragma Inline (Is_Guaranteed_ABE);
+       --  Determine whether scenario N with a target described by its initial
+       --  declaration Target_Decl and body Target_Decl results in a guaranteed
+       --  ABE.
+ 
+       procedure Process_Guaranteed_ABE_Activation
+         (Call     : Node_Id;
+          Call_Rep : Scenario_Rep_Id;
+          Obj_Id   : Entity_Id;
+          Obj_Rep  : Target_Rep_Id;
+          Task_Typ : Entity_Id;
+          Task_Rep : Target_Rep_Id;
+          In_State : Processing_In_State);
+       pragma Inline (Process_Guaranteed_ABE_Activation);
+       --  Perform common guaranteed ABE checks and diagnostics for activation
+       --  call Call which activates object Obj_Id of task type Task_Typ. Formal
+       --  Call_Rep denotes the representation of the call. Obj_Rep denotes the
+       --  representation of the object. Task_Rep denotes the representation of
+       --  the task type. In_State is the current state of the Processing phase.
+ 
+       procedure Process_Guaranteed_ABE_Call
+         (Call     : Node_Id;
+          Call_Rep : Scenario_Rep_Id;
+          In_State : Processing_In_State);
+       pragma Inline (Process_Guaranteed_ABE_Call);
+       --  Perform common guaranteed ABE checks and diagnostics for call Call
+       --  with representation Call_Rep. In_State denotes the current state of
+       --  the Processing phase.
+ 
+       procedure Process_Guaranteed_ABE_Instantiation
+         (Inst     : Node_Id;
+          Inst_Rep : Scenario_Rep_Id;
+          In_State : Processing_In_State);
+       pragma Inline (Process_Guaranteed_ABE_Instantiation);
+       --  Perform common guaranteed ABE checks and diagnostics for instance
+       --  Inst with representation Inst_Rep. In_State is the current state of
+       --  the Processing phase.
+ 
+       -----------------------
+       -- Is_Guaranteed_ABE --
+       -----------------------
+ 
+       function Is_Guaranteed_ABE
+         (N           : Node_Id;
+          Target_Decl : Node_Id;
+          Target_Body : Node_Id) return Boolean
+       is
+       begin
+          --  Avoid cascaded errors if there were previous serious infractions.
+          --  As a result the scenario will not be treated as a guaranteed ABE.
+          --  This behaviour parallels that of the old ABE mechanism.
+ 
+          if Serious_Errors_Detected > 0 then
+             return False;
+ 
+          --  The scenario and the target appear in the same context ignoring
+          --  enclosing library levels.
+ 
+          elsif In_Same_Context (N, Target_Decl) then
+ 
+             --  The target body has already been encountered. The scenario
+             --  results in a guaranteed ABE if it appears prior to the body.
+ 
+             if Present (Target_Body) then
+                return Earlier_In_Extended_Unit (N, Target_Body);
+ 
+             --  Otherwise the body has not been encountered yet. The scenario
+             --  is a guaranteed ABE since the body will appear later. It is
+             --  assumed that the caller has already ensured that the scenario
+             --  is ABE-safe because optional bodies are not considered here.
+ 
+             else
+                return True;
+             end if;
+          end if;
+ 
+          return False;
+       end Is_Guaranteed_ABE;
+ 
+       ----------------------------
+       -- Process_Guaranteed_ABE --
+       ----------------------------
+ 
+       procedure Process_Guaranteed_ABE
+         (N        : Node_Id;
+          In_State : Processing_In_State)
+       is
+          Scen     : constant Node_Id := Scenario (N);
+          Scen_Rep : Scenario_Rep_Id;
+ 
+       begin
+          --  Add the current scenario to the stack of active scenarios
+ 
+          Push_Active_Scenario (Scen);
+ 
+          --  Only calls, instantiations, and task activations may result in a
+          --  guaranteed ABE.
+ 
+          --  Call or task activation
+ 
+          if Is_Suitable_Call (Scen) then
+             Scen_Rep := Scenario_Representation_Of (Scen, In_State);
+ 
+             if Kind (Scen_Rep) = Call_Scenario then
+                Process_Guaranteed_ABE_Call
+                  (Call     => Scen,
+                   Call_Rep => Scen_Rep,
+                   In_State => In_State);
+ 
+             else
+                pragma Assert (Kind (Scen_Rep) = Task_Activation_Scenario);
+ 
+                Process_Activation
+                  (Call      => Scen,
+                   Call_Rep  => Scenario_Representation_Of (Scen, In_State),
+                   Processor => Process_Guaranteed_ABE_Activation'Access,
+                   In_State  => In_State);
+             end if;
+ 
+          --  Instantiation
+ 
+          elsif Is_Suitable_Instantiation (Scen) then
+             Process_Guaranteed_ABE_Instantiation
+               (Inst     => Scen,
+                Inst_Rep => Scenario_Representation_Of (Scen, In_State),
+                In_State => In_State);
+          end if;
+ 
+          --  Remove the current scenario from the stack of active scenarios
+          --  once all ABE diagnostics and checks have been performed.
+ 
+          Pop_Active_Scenario (Scen);
+       end Process_Guaranteed_ABE;
+ 
+       ---------------------------------------
+       -- Process_Guaranteed_ABE_Activation --
+       ---------------------------------------
+ 
+       procedure Process_Guaranteed_ABE_Activation
+         (Call     : Node_Id;
+          Call_Rep : Scenario_Rep_Id;
+          Obj_Id   : Entity_Id;
+          Obj_Rep  : Target_Rep_Id;
+          Task_Typ : Entity_Id;
+          Task_Rep : Target_Rep_Id;
+          In_State : Processing_In_State)
+       is
+          Spec_Decl : constant Node_Id := Spec_Declaration (Task_Rep);
+ 
+          Check_OK : constant Boolean :=
+                       not In_State.Suppress_Checks
+                         and then Ghost_Mode_Of (Obj_Rep)  /= Is_Ignored
+                         and then Ghost_Mode_Of (Task_Rep) /= Is_Ignored
+                         and then Elaboration_Checks_OK (Obj_Rep)
+                         and then Elaboration_Checks_OK (Task_Rep);
+          --  A run-time ABE check may be installed only when the object and the
+          --  task type have active elaboration checks, and both are not ignored
+          --  Ghost constructs.
+ 
+       begin
+          --  Nothing to do when the root scenario appears at the declaration
+          --  level and the task is in the same unit, but outside this context.
+          --
+          --    task type Task_Typ;                  --  task declaration
+          --
+          --    procedure Proc is
+          --       function A ... is
+          --       begin
+          --          if Some_Condition then
+          --             declare
+          --                T : Task_Typ;
+          --             begin
+          --                <activation call>        --  activation site
+          --             end;
+          --          ...
+          --       end A;
+          --
+          --       X : ... := A;                     --  root scenario
+          --    ...
+          --
+          --    task body Task_Typ is
+          --       ...
+          --    end Task_Typ;
+          --
+          --  In the example above, the context of X is the declarative list
+          --  of Proc. The "elaboration" of X may reach the activation of T
+          --  whose body is defined outside of X's context. The task body is
+          --  relevant only when Proc is invoked, but this happens only in
+          --  "normal" elaboration, therefore the task body must not be
+          --  considered if this is not the case.
+ 
+          if Is_Up_Level_Target
+               (Targ_Decl => Spec_Decl,
+                In_State  => In_State)
+          then
+             return;
+ 
+          --  Nothing to do when the activation is ABE-safe
+          --
+          --    generic
+          --    package Gen is
+          --       task type Task_Typ;
+          --    end Gen;
+          --
+          --    package body Gen is
+          --       task body Task_Typ is
+          --       begin
+          --          ...
+          --       end Task_Typ;
+          --    end Gen;
+          --
+          --    with Gen;
+          --    procedure Main is
+          --       package Nested is
+          --          package Inst is new Gen;
+          --          T : Inst.Task_Typ;
+          --       end Nested;                       --  safe activation
+          --    ...
+ 
+          elsif Is_Safe_Activation (Call, Task_Rep) then
+             return;
+ 
+          --  An activation call leads to a guaranteed ABE when the activation
+          --  call and the task appear within the same context ignoring library
+          --  levels, and the body of the task has not been seen yet or appears
+          --  after the activation call.
+          --
+          --    procedure Guaranteed_ABE is
+          --       task type Task_Typ;
+          --
+          --       package Nested is
+          --          T : Task_Typ;
+          --          <activation call>              --  guaranteed ABE
+          --       end Nested;
+          --
+          --       task body Task_Typ is
+          --          ...
+          --       end Task_Typ;
+          --    ...
+ 
+          elsif Is_Guaranteed_ABE
+                  (N           => Call,
+                   Target_Decl => Spec_Decl,
+                   Target_Body => Body_Declaration (Task_Rep))
+          then
+             if Elaboration_Warnings_OK (Call_Rep) then
+                Error_Msg_Sloc := Sloc (Call);
+                Error_Msg_N
+                  ("??task & will be activated # before elaboration of its "
+                   & "body", Obj_Id);
+                Error_Msg_N
+                  ("\Program_Error will be raised at run time", Obj_Id);
+             end if;
+ 
+             --  Mark the activation call as a guaranteed ABE
+ 
+             Set_Is_Known_Guaranteed_ABE (Call);
+ 
+             --  Install a run-time ABE failue because this activation call will
+             --  always result in an ABE.
+ 
+             if Check_OK then
+                Install_Scenario_ABE_Failure
+                  (N        => Call,
+                   Targ_Id  => Task_Typ,
+                   Targ_Rep => Task_Rep,
+                   Disable  => Obj_Rep);
+             end if;
+          end if;
+       end Process_Guaranteed_ABE_Activation;
+ 
+       ---------------------------------
+       -- Process_Guaranteed_ABE_Call --
+       ---------------------------------
+ 
+       procedure Process_Guaranteed_ABE_Call
+         (Call      : Node_Id;
+          Call_Rep  : Scenario_Rep_Id;
+          In_State  : Processing_In_State)
+       is
+          Subp_Id   : constant Entity_Id     := Target (Call_Rep);
+          Subp_Rep  : constant Target_Rep_Id :=
+                        Target_Representation_Of (Subp_Id, In_State);
+          Spec_Decl : constant Node_Id       := Spec_Declaration (Subp_Rep);
+ 
+          Check_OK : constant Boolean :=
+                       not In_State.Suppress_Checks
+                         and then Ghost_Mode_Of (Call_Rep) /= Is_Ignored
+                         and then Ghost_Mode_Of (Subp_Rep) /= Is_Ignored
+                         and then Elaboration_Checks_OK (Call_Rep)
+                         and then Elaboration_Checks_OK (Subp_Rep);
+          --  A run-time ABE check may be installed only when both the call
+          --  and the target have active elaboration checks, and both are not
+          --  ignored Ghost constructs.
+ 
+       begin
+          --  Nothing to do when the root scenario appears at the declaration
+          --  level and the target is in the same unit but outside this context.
+          --
+          --    function B ...;                      --  target declaration
+          --
+          --    procedure Proc is
+          --       function A ... is
+          --       begin
+          --          if Some_Condition then
+          --             return B;                   --  call site
+          --          ...
+          --       end A;
+          --
+          --       X : ... := A;                     --  root scenario
+          --    ...
+          --
+          --    function B ... is
+          --       ...
+          --    end B;
+          --
+          --  In the example above, the context of X is the declarative region
+          --  of Proc. The "elaboration" of X may eventually reach B which is
+          --  defined outside of X's context. B is relevant only when Proc is
+          --  invoked, but this happens only by means of "normal" elaboration,
+          --  therefore B must not be considered if this is not the case.
+ 
+          if Is_Up_Level_Target
+               (Targ_Decl => Spec_Decl,
+                In_State  => In_State)
+          then
+             return;
+ 
+          --  Nothing to do when the call is ABE-safe
+          --
+          --    generic
+          --    function Gen ...;
+          --
+          --    function Gen ... is
+          --    begin
+          --       ...
+          --    end Gen;
+          --
+          --    with Gen;
+          --    procedure Main is
+          --       function Inst is new Gen;
+          --       X : ... := Inst;                  --  safe call
+          --    ...
+ 
+          elsif Is_Safe_Call (Call, Subp_Id, Subp_Rep) then
+             return;
+ 
+          --  A call leads to a guaranteed ABE when the call and the target
+          --  appear within the same context ignoring library levels, and the
+          --  body of the target has not been seen yet or appears after the
+          --  call.
+          --
+          --    procedure Guaranteed_ABE is
+          --       function Func ...;
+          --
+          --       package Nested is
+          --          Obj : ... := Func;             --  guaranteed ABE
+          --       end Nested;
+          --
+          --       function Func ... is
+          --          ...
+          --       end Func;
+          --    ...
+ 
+          elsif Is_Guaranteed_ABE
+                  (N           => Call,
+                   Target_Decl => Spec_Decl,
+                   Target_Body => Body_Declaration (Subp_Rep))
+          then
+             if Elaboration_Warnings_OK (Call_Rep) then
+                Error_Msg_NE
+                  ("??cannot call & before body seen", Call, Subp_Id);
+                Error_Msg_N ("\Program_Error will be raised at run time", Call);
+             end if;
+ 
+             --  Mark the call as a guarnateed ABE
+ 
+             Set_Is_Known_Guaranteed_ABE (Call);
+ 
+             --  Install a run-time ABE failure because the call will always
+             --  result in an ABE.
+ 
+             if Check_OK then
+                Install_Scenario_ABE_Failure
+                  (N        => Call,
+                   Targ_Id  => Subp_Id,
+                   Targ_Rep => Subp_Rep,
+                   Disable  => Call_Rep);
+             end if;
+          end if;
+       end Process_Guaranteed_ABE_Call;
+ 
+       ------------------------------------------
+       -- Process_Guaranteed_ABE_Instantiation --
+       ------------------------------------------
+ 
+       procedure Process_Guaranteed_ABE_Instantiation
+         (Inst     : Node_Id;
+          Inst_Rep : Scenario_Rep_Id;
+          In_State : Processing_In_State)
+       is
+          Gen_Id    : constant Entity_Id     := Target (Inst_Rep);
+          Gen_Rep   : constant Target_Rep_Id :=
+                        Target_Representation_Of (Gen_Id, In_State);
+          Spec_Decl : constant Node_Id       := Spec_Declaration (Gen_Rep);
+ 
+          Check_OK : constant Boolean :=
+                       not In_State.Suppress_Checks
+                         and then Ghost_Mode_Of (Inst_Rep) /= Is_Ignored
+                         and then Ghost_Mode_Of (Gen_Rep)  /= Is_Ignored
+                         and then Elaboration_Checks_OK (Inst_Rep)
+                         and then Elaboration_Checks_OK (Gen_Rep);
+          --  A run-time ABE check may be installed only when both the instance
+          --  and the generic have active elaboration checks and both are not
+          --  ignored Ghost constructs.
+ 
+       begin
+          --  Nothing to do when the root scenario appears at the declaration
+          --  level and the generic is in the same unit, but outside this
+          --  context.
+          --
+          --    generic
+          --    procedure Gen is ...;                --  generic declaration
+          --
+          --    procedure Proc is
+          --       function A ... is
+          --       begin
+          --          if Some_Condition then
+          --             declare
+          --                procedure I is new Gen;  --  instantiation site
+          --             ...
+          --          ...
+          --       end A;
+          --
+          --       X : ... := A;                     --  root scenario
+          --    ...
+          --
+          --    procedure Gen is
+          --       ...
+          --    end Gen;
+          --
+          --  In the example above, the context of X is the declarative region
+          --  of Proc. The "elaboration" of X may eventually reach Gen which
+          --  appears outside of X's context. Gen is relevant only when Proc is
+          --  invoked, but this happens only by means of "normal" elaboration,
+          --  therefore Gen must not be considered if this is not the case.
+ 
+          if Is_Up_Level_Target
+               (Targ_Decl => Spec_Decl,
+                In_State  => In_State)
+          then
+             return;
+ 
+          --  Nothing to do when the instantiation is ABE-safe
+          --
+          --    generic
+          --    package Gen is
+          --       ...
+          --    end Gen;
+          --
+          --    package body Gen is
+          --       ...
+          --    end Gen;
+          --
+          --    with Gen;
+          --    procedure Main is
+          --       package Inst is new Gen (ABE);    --  safe instantiation
+          --    ...
+ 
+          elsif Is_Safe_Instantiation (Inst, Gen_Id, Gen_Rep) then
+             return;
+ 
+          --  An instantiation leads to a guaranteed ABE when the instantiation
+          --  and the generic appear within the same context ignoring library
+          --  levels, and the body of the generic has not been seen yet or
+          --  appears after the instantiation.
+          --
+          --    procedure Guaranteed_ABE is
+          --       generic
+          --       procedure Gen;
+          --
+          --       package Nested is
+          --          procedure Inst is new Gen;     --  guaranteed ABE
+          --       end Nested;
+          --
+          --       procedure Gen is
+          --          ...
+          --       end Gen;
+          --    ...
+ 
+          elsif Is_Guaranteed_ABE
+                  (N           => Inst,
+                   Target_Decl => Spec_Decl,
+                   Target_Body => Body_Declaration (Gen_Rep))
+          then
+             if Elaboration_Warnings_OK (Inst_Rep) then
+                Error_Msg_NE
+                  ("??cannot instantiate & before body seen", Inst, Gen_Id);
+                Error_Msg_N ("\Program_Error will be raised at run time", Inst);
+             end if;
+ 
+             --  Mark the instantiation as a guarantee ABE. This automatically
+             --  suppresses the instantiation of the generic body.
+ 
+             Set_Is_Known_Guaranteed_ABE (Inst);
+ 
+             --  Install a run-time ABE failure because the instantiation will
+             --  always result in an ABE.
+ 
+             if Check_OK then
+                Install_Scenario_ABE_Failure
+                  (N        => Inst,
+                   Targ_Id  => Gen_Id,
+                   Targ_Rep => Gen_Rep,
+                   Disable  => Inst_Rep);
+             end if;
+          end if;
+       end Process_Guaranteed_ABE_Instantiation;
+    end Guaranteed_ABE_Processor;
+ 
     --------------
     -- Has_Body --
     --------------
  
     function Has_Body (Pack_Decl : Node_Id) return Boolean is
        function Find_Corresponding_Body (Spec_Id : Entity_Id) return Node_Id;
+       pragma Inline (Find_Corresponding_Body);
        --  Try to locate the corresponding body of spec Spec_Id. If no body is
        --  found, return Empty.
  
        function Find_Body
          (Spec_Id : Entity_Id;
           From    : Node_Id) return Node_Id;
+       pragma Inline (Find_Body);
        --  Try to locate the corresponding body of spec Spec_Id in the node list
        --  which follows arbitrary node From. If no body is found, return Empty.
  
        function Load_Package_Body (Unit_Nam : Unit_Name_Type) return Node_Id;
+       pragma Inline (Load_Package_Body);
        --  Attempt to load the body of unit Unit_Nam. If the load failed, return
        --  Empty. If the compilation will not generate code, return Empty.
  
*************** package body Sem_Elab is
*** 5833,5892 ****
        end if;
     end Has_Body;
  
!    ---------------------------
!    -- Has_Prior_Elaboration --
!    ---------------------------
! 
!    function Has_Prior_Elaboration
!      (Unit_Id      : Entity_Id;
!       Context_OK   : Boolean := False;
!       Elab_Body_OK : Boolean := False;
!       Same_Unit_OK : Boolean := False) return Boolean
!    is
!       Main_Id : constant Entity_Id := Cunit_Entity (Main_Unit);
  
     begin
!       --  A preelaborated unit is always elaborated prior to the main unit
! 
!       if Is_Preelaborated_Unit (Unit_Id) then
!          return True;
! 
!       --  An internal unit is always elaborated prior to a non-internal main
!       --  unit.
! 
!       elsif In_Internal_Unit (Unit_Id)
!         and then not In_Internal_Unit (Main_Id)
!       then
!          return True;
! 
!       --  A unit has prior elaboration if it appears within the context of the
!       --  main unit. Consider this case only when requested by the caller.
! 
!       elsif Context_OK
!         and then Elaboration_Status (Unit_Id) /= No_Elaboration_Attributes
!       then
!          return True;
! 
!       --  A unit whose body is elaborated together with its spec has prior
!       --  elaboration except with respect to itself. Consider this case only
!       --  when requested by the caller.
! 
!       elsif Elab_Body_OK
!         and then Has_Pragma_Elaborate_Body (Unit_Id)
!         and then not Is_Same_Unit (Unit_Id, Main_Id)
!       then
!          return True;
! 
!       --  A unit has no prior elaboration with respect to itself, but does not
!       --  require any means of ensuring its own elaboration either. Treat this
!       --  case as valid prior elaboration only when requested by the caller.
! 
!       elsif Same_Unit_OK and then Is_Same_Unit (Unit_Id, Main_Id) then
!          return True;
!       end if;
! 
!       return False;
!    end Has_Prior_Elaboration;
  
     --------------------------
     -- In_External_Instance --
--- 9924,9938 ----
        end if;
     end Has_Body;
  
!    ----------
!    -- Hash --
!    ----------
  
+    function Hash (NE : Node_Or_Entity_Id) return Bucket_Range_Type is
+       pragma Assert (Present (NE));
     begin
!       return Bucket_Range_Type (NE);
!    end Hash;
  
     --------------------------
     -- In_External_Instance --
*************** package body Sem_Elab is
*** 5896,5921 ****
       (N           : Node_Id;
        Target_Decl : Node_Id) return Boolean
     is
!       Dummy     : Node_Id;
        Inst_Body : Node_Id;
!       Inst_Decl : Node_Id;
  
     begin
!       --  Performance note: parent traversal
! 
!       Inst_Decl := Find_Enclosing_Instance (Target_Decl);
  
        --  The target declaration appears within an instance spec. Visibility is
        --  ignored because internally generated primitives for private types may
        --  reside in the private declarations and still be invoked from outside.
  
!       if Present (Inst_Decl)
!         and then Nkind (Inst_Decl) = N_Package_Declaration
!       then
           --  The scenario comes from the main unit and the instance does not
  
           if In_Extended_Main_Code_Unit (N)
!            and then not In_Extended_Main_Code_Unit (Inst_Decl)
           then
              return True;
  
--- 9942,9964 ----
       (N           : Node_Id;
        Target_Decl : Node_Id) return Boolean
     is
!       Inst      : Node_Id;
        Inst_Body : Node_Id;
!       Inst_Spec : Node_Id;
  
     begin
!       Inst := Find_Enclosing_Instance (Target_Decl);
  
        --  The target declaration appears within an instance spec. Visibility is
        --  ignored because internally generated primitives for private types may
        --  reside in the private declarations and still be invoked from outside.
  
!       if Present (Inst) and then Nkind (Inst) = N_Package_Declaration then
! 
           --  The scenario comes from the main unit and the instance does not
  
           if In_Extended_Main_Code_Unit (N)
!            and then not In_Extended_Main_Code_Unit (Inst)
           then
              return True;
  
*************** package body Sem_Elab is
*** 5923,5938 ****
           --  body.
  
           else
!             Extract_Instance_Attributes
!               (Exp_Inst  => Inst_Decl,
!                Inst_Body => Inst_Body,
!                Inst_Decl => Dummy);
! 
!             --  Performance note: parent traversal
  
              return not In_Subtree
                           (N     => N,
!                           Root1 => Inst_Decl,
                            Root2 => Inst_Body);
           end if;
        end if;
--- 9966,9979 ----
           --  body.
  
           else
!             Spec_And_Body_From_Node
!               (N         => Inst,
!                Spec_Decl => Inst_Spec,
!                Body_Decl => Inst_Body);
  
              return not In_Subtree
                           (N     => N,
!                           Root1 => Inst_Spec,
                            Root2 => Inst_Body);
           end if;
        end if;
*************** package body Sem_Elab is
*** 5972,5984 ****
        Nested_OK : Boolean := False) return Boolean
     is
        function Find_Enclosing_Context (N : Node_Id) return Node_Id;
        --  Return the nearest enclosing non-library-level or compilation unit
!       --  node which which encapsulates arbitrary node N. Return Empty is no
!       --  such context is available.
  
        function In_Nested_Context
          (Outer : Node_Id;
           Inner : Node_Id) return Boolean;
        --  Determine whether arbitrary node Outer encapsulates arbitrary node
        --  Inner.
  
--- 10013,10027 ----
        Nested_OK : Boolean := False) return Boolean
     is
        function Find_Enclosing_Context (N : Node_Id) return Node_Id;
+       pragma Inline (Find_Enclosing_Context);
        --  Return the nearest enclosing non-library-level or compilation unit
!       --  node which encapsulates arbitrary node N. Return Empty is no such
!       --  context is available.
  
        function In_Nested_Context
          (Outer : Node_Id;
           Inner : Node_Id) return Boolean;
+       pragma Inline (In_Nested_Context);
        --  Determine whether arbitrary node Outer encapsulates arbitrary node
        --  Inner.
  
*************** package body Sem_Elab is
*** 6094,11216 ****
        return False;
     end In_Same_Context;
  
!    ------------------
!    -- In_Task_Body --
!    ------------------
  
!    function In_Task_Body (N : Node_Id) return Boolean is
!       Par : Node_Id;
  
     begin
!       --  Climb the parent chain looking for a task body [procedure]
  
!       Par := N;
!       while Present (Par) loop
!          if Nkind (Par) = N_Task_Body then
!             return True;
  
!          elsif Nkind (Par) = N_Subprogram_Body
!            and then Is_Task_Body_Procedure (Par)
!          then
!             return True;
  
!          --  Prevent the search from going too far. Note that this predicate
!          --  shares nodes with the two cases above, and must come last.
  
!          elsif Is_Body_Or_Package_Declaration (Par) then
!             return False;
!          end if;
  
!          Par := Parent (Par);
!       end loop;
  
!       return False;
!    end In_Task_Body;
  
!    ----------------
!    -- Initialize --
!    ----------------
  
!    procedure Initialize is
!    begin
!       --  Set the soft link which enables Atree.Rewrite to update a top-level
!       --  scenario each time it is transformed into another node.
  
!       Set_Rewriting_Proc (Update_Elaboration_Scenario'Access);
!    end Initialize;
  
!    ---------------
!    -- Info_Call --
!    ---------------
  
!    procedure Info_Call
!      (Call      : Node_Id;
!       Target_Id : Entity_Id;
!       Info_Msg  : Boolean;
!       In_SPARK  : Boolean)
!    is
!       procedure Info_Accept_Alternative;
!       pragma Inline (Info_Accept_Alternative);
!       --  Output information concerning an accept alternative
  
!       procedure Info_Simple_Call;
!       pragma Inline (Info_Simple_Call);
!       --  Output information concerning the call
  
!       procedure Info_Type_Actions (Action : String);
!       pragma Inline (Info_Type_Actions);
!       --  Output information concerning action Action of a type
  
!       procedure Info_Verification_Call
!         (Pred    : String;
!          Id      : Entity_Id;
!          Id_Kind : String);
!       pragma Inline (Info_Verification_Call);
!       --  Output information concerning the verification of predicate Pred
!       --  applied to related entity Id with kind Id_Kind.
  
!       -----------------------------
!       -- Info_Accept_Alternative --
!       -----------------------------
  
!       procedure Info_Accept_Alternative is
!          Entry_Id : constant Entity_Id := Receiving_Entry (Target_Id);
  
!       begin
!          pragma Assert (Present (Entry_Id));
  
!          Elab_Msg_NE
!            (Msg      => "accept for entry & during elaboration",
!             N        => Call,
!             Id       => Entry_Id,
!             Info_Msg => Info_Msg,
!             In_SPARK => In_SPARK);
!       end Info_Accept_Alternative;
  
!       ----------------------
!       -- Info_Simple_Call --
!       ----------------------
  
!       procedure Info_Simple_Call is
!       begin
!          Elab_Msg_NE
!            (Msg      => "call to & during elaboration",
!             N        => Call,
!             Id       => Target_Id,
!             Info_Msg => Info_Msg,
!             In_SPARK => In_SPARK);
!       end Info_Simple_Call;
  
!       -----------------------
!       -- Info_Type_Actions --
!       -----------------------
  
!       procedure Info_Type_Actions (Action : String) is
!          Typ : constant Entity_Id := First_Formal_Type (Target_Id);
  
!       begin
!          pragma Assert (Present (Typ));
  
!          Elab_Msg_NE
!            (Msg      => Action & " actions for type & during elaboration",
!             N        => Call,
!             Id       => Typ,
!             Info_Msg => Info_Msg,
!             In_SPARK => In_SPARK);
!       end Info_Type_Actions;
  
!       ----------------------------
!       -- Info_Verification_Call --
!       ----------------------------
  
!       procedure Info_Verification_Call
!         (Pred    : String;
!          Id      : Entity_Id;
!          Id_Kind : String)
!       is
!       begin
!          pragma Assert (Present (Id));
  
!          Elab_Msg_NE
!            (Msg      =>
!               "verification of " & Pred & " of " & Id_Kind & " & during "
!               & "elaboration",
!             N        => Call,
!             Id       => Id,
!             Info_Msg => Info_Msg,
!             In_SPARK => In_SPARK);
!       end Info_Verification_Call;
  
!    --  Start of processing for Info_Call
  
!    begin
!       --  Do not output anything for targets defined in internal units because
!       --  this creates noise.
  
!       if not In_Internal_Unit (Target_Id) then
  
!          --  Accept alternative
  
!          if Is_Accept_Alternative_Proc (Target_Id) then
!             Info_Accept_Alternative;
  
!          --  Adjustment
  
!          elsif Is_TSS (Target_Id, TSS_Deep_Adjust) then
!             Info_Type_Actions ("adjustment");
  
!          --  Default_Initial_Condition
  
!          elsif Is_Default_Initial_Condition_Proc (Target_Id) then
!             Info_Verification_Call
!               (Pred    => "Default_Initial_Condition",
!                Id      => First_Formal_Type (Target_Id),
!                Id_Kind => "type");
  
!          --  Entries
  
!          elsif Is_Protected_Entry (Target_Id) then
!             Info_Simple_Call;
  
!          --  Task entry calls are never processed because the entry being
!          --  invoked does not have a corresponding "body", it has a select.
  
!          elsif Is_Task_Entry (Target_Id) then
!             null;
  
!          --  Finalization
  
!          elsif Is_TSS (Target_Id, TSS_Deep_Finalize) then
!             Info_Type_Actions ("finalization");
  
!          --  Calls to _Finalizer procedures must not appear in the output
!          --  because this creates confusing noise.
  
!          elsif Is_Finalizer_Proc (Target_Id) then
!             null;
  
!          --  Initial_Condition
  
!          elsif Is_Initial_Condition_Proc (Target_Id) then
!             Info_Verification_Call
!               (Pred    => "Initial_Condition",
!                Id      => Find_Enclosing_Scope (Call),
!                Id_Kind => "package");
  
!          --  Initialization
  
!          elsif Is_Init_Proc (Target_Id)
!            or else Is_TSS (Target_Id, TSS_Deep_Initialize)
!          then
!             Info_Type_Actions ("initialization");
  
!          --  Invariant
  
!          elsif Is_Invariant_Proc (Target_Id) then
!             Info_Verification_Call
!               (Pred    => "invariants",
!                Id      => First_Formal_Type (Target_Id),
!                Id_Kind => "type");
  
!          --  Partial invariant calls must not appear in the output because this
!          --  creates confusing noise.
  
!          elsif Is_Partial_Invariant_Proc (Target_Id) then
!             null;
  
!          --  _Postconditions
  
!          elsif Is_Postconditions_Proc (Target_Id) then
!             Info_Verification_Call
!               (Pred    => "postconditions",
!                Id      => Find_Enclosing_Scope (Call),
!                Id_Kind => "subprogram");
  
!          --  Subprograms must come last because some of the previous cases fall
!          --  under this category.
  
!          elsif Ekind (Target_Id) = E_Function then
!             Info_Simple_Call;
  
!          elsif Ekind (Target_Id) = E_Procedure then
!             Info_Simple_Call;
  
!          else
!             pragma Assert (False);
!             null;
!          end if;
!       end if;
!    end Info_Call;
  
!    ------------------------
!    -- Info_Instantiation --
!    ------------------------
  
!    procedure Info_Instantiation
!      (Inst     : Node_Id;
!       Gen_Id   : Entity_Id;
!       Info_Msg : Boolean;
!       In_SPARK : Boolean)
!    is
!    begin
!       Elab_Msg_NE
!         (Msg      => "instantiation of & during elaboration",
!          N        => Inst,
!          Id       => Gen_Id,
!          Info_Msg => Info_Msg,
!          In_SPARK => In_SPARK);
!    end Info_Instantiation;
  
!    -----------------------------
!    -- Info_Variable_Reference --
!    -----------------------------
  
!    procedure Info_Variable_Reference
!      (Ref      : Node_Id;
!       Var_Id   : Entity_Id;
!       Info_Msg : Boolean;
!       In_SPARK : Boolean)
!    is
!    begin
!       if Is_Read (Ref) then
!          Elab_Msg_NE
!            (Msg      => "read of variable & during elaboration",
!             N        => Ref,
!             Id       => Var_Id,
!             Info_Msg => Info_Msg,
!             In_SPARK => In_SPARK);
!       end if;
!    end Info_Variable_Reference;
  
!    --------------------
!    -- Insertion_Node --
!    --------------------
  
!    function Insertion_Node (N : Node_Id; Ins_Nod : Node_Id) return Node_Id is
!    begin
!       --  When the scenario denotes an instantiation, the proper insertion node
!       --  is the instance spec. This ensures that the generic actuals will not
!       --  be evaluated prior to a potential ABE.
  
!       if Nkind (N) in N_Generic_Instantiation
!         and then Present (Instance_Spec (N))
!       then
!          return Instance_Spec (N);
  
!       --  Otherwise the proper insertion node is the candidate insertion node
  
!       else
!          return Ins_Nod;
!       end if;
!    end Insertion_Node;
  
!    -----------------------
!    -- Install_ABE_Check --
!    -----------------------
  
!    procedure Install_ABE_Check
!      (N       : Node_Id;
!       Id      : Entity_Id;
!       Ins_Nod : Node_Id)
!    is
!       Check_Ins_Nod : constant Node_Id := Insertion_Node (N, Ins_Nod);
!       --  Insert the check prior to this node
  
!       Loc     : constant Source_Ptr := Sloc (N);
!       Spec_Id : constant Entity_Id  := Unique_Entity (Id);
!       Unit_Id : constant Entity_Id  := Find_Top_Unit (Id);
!       Scop_Id : Entity_Id;
  
!    begin
!       --  Nothing to do when compiling for GNATprove because raise statements
!       --  are not supported.
  
!       if GNATprove_Mode then
!          return;
  
!       --  Nothing to do when the compilation will not produce an executable
  
!       elsif Serious_Errors_Detected > 0 then
!          return;
  
!       --  Nothing to do for a compilation unit because there is no executable
!       --  environment at that level.
  
!       elsif Nkind (Parent (Check_Ins_Nod)) = N_Compilation_Unit then
!          return;
  
!       --  Nothing to do when the unit is elaborated prior to the main unit.
!       --  This check must also consider the following cases:
  
!       --  * Id's unit appears in the context of the main unit
  
!       --  * Id's unit is subject to pragma Elaborate_Body. An ABE check MUST
!       --    NOT be generated because Id's unit is always elaborated prior to
!       --    the main unit.
  
!       --  * Id's unit is the main unit. An ABE check MUST be generated in this
!       --    case because a conditional ABE may be raised depending on the flow
!       --    of execution within the main unit (flag Same_Unit_OK is False).
  
!       elsif Has_Prior_Elaboration
!               (Unit_Id      => Unit_Id,
!                Context_OK   => True,
!                Elab_Body_OK => True)
!       then
!          return;
!       end if;
  
!       --  Prevent multiple scenarios from installing the same ABE check
  
!       Set_Is_Elaboration_Checks_OK_Node (N, False);
  
!       --  Install the nearest enclosing scope of the scenario as there must be
!       --  something on the scope stack.
  
!       --  Performance note: parent traversal
  
!       Scop_Id := Find_Enclosing_Scope (Check_Ins_Nod);
!       pragma Assert (Present (Scop_Id));
  
!       Push_Scope (Scop_Id);
  
!       --  Generate:
!       --    if not Spec_Id'Elaborated then
!       --       raise Program_Error with "access before elaboration";
!       --    end if;
  
!       Insert_Action (Check_Ins_Nod,
!         Make_Raise_Program_Error (Loc,
!           Condition =>
!             Make_Op_Not (Loc,
!               Right_Opnd =>
!                 Make_Attribute_Reference (Loc,
!                   Prefix         => New_Occurrence_Of (Spec_Id, Loc),
!                   Attribute_Name => Name_Elaborated)),
!           Reason    => PE_Access_Before_Elaboration));
  
!       Pop_Scope;
!    end Install_ABE_Check;
  
!    -----------------------
!    -- Install_ABE_Check --
!    -----------------------
  
!    procedure Install_ABE_Check
!      (N           : Node_Id;
!       Target_Id   : Entity_Id;
!       Target_Decl : Node_Id;
!       Target_Body : Node_Id;
!       Ins_Nod     : Node_Id)
!    is
!       procedure Build_Elaboration_Entity;
!       pragma Inline (Build_Elaboration_Entity);
!       --  Create a new elaboration flag for Target_Id, insert it prior to
!       --  Target_Decl, and set it after Body_Decl.
  
        ------------------------------
!       -- Build_Elaboration_Entity --
        ------------------------------
  
!       procedure Build_Elaboration_Entity is
!          Loc     : constant Source_Ptr := Sloc (Target_Id);
!          Flag_Id : Entity_Id;
  
        begin
!          --  Create the declaration of the elaboration flag. The name carries a
!          --  unique counter in case of name overloading.
  
!          Flag_Id :=
!            Make_Defining_Identifier (Loc,
!              Chars => New_External_Name (Chars (Target_Id), 'E', -1));
  
!          Set_Elaboration_Entity          (Target_Id, Flag_Id);
!          Set_Elaboration_Entity_Required (Target_Id);
  
!          Push_Scope (Scope (Target_Id));
  
!          --  Generate:
!          --    Enn : Short_Integer := 0;
  
!          Insert_Action (Target_Decl,
!            Make_Object_Declaration (Loc,
!              Defining_Identifier => Flag_Id,
!              Object_Definition   =>
!                New_Occurrence_Of (Standard_Short_Integer, Loc),
!              Expression          => Make_Integer_Literal (Loc, Uint_0)));
  
!          --  Generate:
!          --    Enn := 1;
  
!          Set_Elaboration_Flag (Target_Body, Target_Id);
  
!          Pop_Scope;
!       end Build_Elaboration_Entity;
  
!       --  Local variables
  
!       Target_Unit_Id : constant Entity_Id := Find_Top_Unit (Target_Id);
  
!    --  Start for processing for Install_ABE_Check
  
!    begin
!       --  Nothing to do when compiling for GNATprove because raise statements
!       --  are not supported.
  
!       if GNATprove_Mode then
!          return;
  
!       --  Nothing to do when the compilation will not produce an executable
  
!       elsif Serious_Errors_Detected > 0 then
!          return;
  
!       --  Nothing to do when the target is a protected subprogram because the
!       --  check is associated with the protected body subprogram.
  
!       elsif Is_Protected_Subp (Target_Id) then
!          return;
  
!       --  Nothing to do when the target is elaborated prior to the main unit.
!       --  This check must also consider the following cases:
  
!       --  * The unit of the target appears in the context of the main unit
  
!       --  * The unit of the target is subject to pragma Elaborate_Body. An ABE
!       --    check MUST NOT be generated because the unit is always elaborated
!       --    prior to the main unit.
  
!       --  * The unit of the target is the main unit. An ABE check MUST be added
!       --    in this case because a conditional ABE may be raised depending on
!       --    the flow of execution within the main unit (flag Same_Unit_OK is
!       --    False).
  
!       elsif Has_Prior_Elaboration
!               (Unit_Id      => Target_Unit_Id,
!                Context_OK   => True,
!                Elab_Body_OK => True)
!       then
!          return;
  
!       --  Create an elaboration flag for the target when it does not have one
  
!       elsif No (Elaboration_Entity (Target_Id)) then
!          Build_Elaboration_Entity;
!       end if;
  
!       Install_ABE_Check
!         (N       => N,
!          Ins_Nod => Ins_Nod,
!          Id      => Target_Id);
!    end Install_ABE_Check;
  
!    -------------------------
!    -- Install_ABE_Failure --
!    -------------------------
  
!    procedure Install_ABE_Failure (N : Node_Id; Ins_Nod : Node_Id) is
!       Fail_Ins_Nod : constant Node_Id := Insertion_Node (N, Ins_Nod);
!       --  Insert the failure prior to this node
  
!       Loc     : constant Source_Ptr := Sloc (N);
!       Scop_Id : Entity_Id;
  
!    begin
!       --  Nothing to do when compiling for GNATprove because raise statements
!       --  are not supported.
  
!       if GNATprove_Mode then
!          return;
  
!       --  Nothing to do when the compilation will not produce an executable
  
!       elsif Serious_Errors_Detected > 0 then
!          return;
  
!       --  Do not install an ABE check for a compilation unit because there is
!       --  no executable environment at that level.
  
!       elsif Nkind (Parent (Fail_Ins_Nod)) = N_Compilation_Unit then
!          return;
!       end if;
  
!       --  Prevent multiple scenarios from installing the same ABE failure
  
!       Set_Is_Elaboration_Checks_OK_Node (N, False);
  
!       --  Install the nearest enclosing scope of the scenario as there must be
!       --  something on the scope stack.
  
!       --  Performance note: parent traversal
  
!       Scop_Id := Find_Enclosing_Scope (Fail_Ins_Nod);
!       pragma Assert (Present (Scop_Id));
  
!       Push_Scope (Scop_Id);
  
!       --  Generate:
!       --    raise Program_Error with "access before elaboration";
  
!       Insert_Action (Fail_Ins_Nod,
!         Make_Raise_Program_Error (Loc,
!           Reason => PE_Access_Before_Elaboration));
  
!       Pop_Scope;
!    end Install_ABE_Failure;
  
!    --------------------------------
!    -- Is_Accept_Alternative_Proc --
!    --------------------------------
  
!    function Is_Accept_Alternative_Proc (Id : Entity_Id) return Boolean is
!    begin
!       --  To qualify, the entity must denote a procedure with a receiving entry
  
!       return Ekind (Id) = E_Procedure and then Present (Receiving_Entry (Id));
!    end Is_Accept_Alternative_Proc;
  
!    ------------------------
!    -- Is_Activation_Proc --
!    ------------------------
  
!    function Is_Activation_Proc (Id : Entity_Id) return Boolean is
!    begin
!       --  To qualify, the entity must denote one of the runtime procedures in
!       --  charge of task activation.
  
-       if Ekind (Id) = E_Procedure then
-          if Restricted_Profile then
-             return Is_RTE (Id, RE_Activate_Restricted_Tasks);
           else
!             return Is_RTE (Id, RE_Activate_Tasks);
           end if;
-       end if;
  
!       return False;
!    end Is_Activation_Proc;
  
!    ----------------------------
!    -- Is_Ada_Semantic_Target --
!    ----------------------------
  
!    function Is_Ada_Semantic_Target (Id : Entity_Id) return Boolean is
!    begin
!       return
!         Is_Activation_Proc (Id)
!           or else Is_Controlled_Proc (Id, Name_Adjust)
!           or else Is_Controlled_Proc (Id, Name_Finalize)
!           or else Is_Controlled_Proc (Id, Name_Initialize)
!           or else Is_Init_Proc (Id)
!           or else Is_Invariant_Proc (Id)
!           or else Is_Protected_Entry (Id)
!           or else Is_Protected_Subp (Id)
!           or else Is_Protected_Body_Subp (Id)
!           or else Is_Task_Entry (Id);
!    end Is_Ada_Semantic_Target;
  
!    --------------------------------
!    -- Is_Assertion_Pragma_Target --
!    --------------------------------
  
!    function Is_Assertion_Pragma_Target (Id : Entity_Id) return Boolean is
!    begin
!       return
!         Is_Default_Initial_Condition_Proc (Id)
!           or else Is_Initial_Condition_Proc (Id)
!           or else Is_Invariant_Proc (Id)
!           or else Is_Partial_Invariant_Proc (Id)
!           or else Is_Postconditions_Proc (Id);
!    end Is_Assertion_Pragma_Target;
  
!    ----------------------------
!    -- Is_Bodiless_Subprogram --
!    ----------------------------
  
!    function Is_Bodiless_Subprogram (Subp_Id : Entity_Id) return Boolean is
!    begin
!       --  An abstract subprogram does not have a body
  
!       if Ekind_In (Subp_Id, E_Function,
!                             E_Operator,
!                             E_Procedure)
!         and then Is_Abstract_Subprogram (Subp_Id)
!       then
!          return True;
  
!       --  A formal subprogram does not have a body
  
!       elsif Is_Formal_Subprogram (Subp_Id) then
!          return True;
  
!       --  An imported subprogram may have a body, however it is not known at
!       --  compile or bind time where the body resides and whether it will be
!       --  elaborated on time.
  
!       elsif Is_Imported (Subp_Id) then
!          return True;
!       end if;
  
!       return False;
!    end Is_Bodiless_Subprogram;
  
!    ------------------------
!    -- Is_Controlled_Proc --
!    ------------------------
  
!    function Is_Controlled_Proc
!      (Subp_Id  : Entity_Id;
!       Subp_Nam : Name_Id) return Boolean
!    is
!       Formal_Id : Entity_Id;
  
!    begin
!       pragma Assert (Nam_In (Subp_Nam, Name_Adjust,
!                                        Name_Finalize,
!                                        Name_Initialize));
  
!       --  To qualify, the subprogram must denote a source procedure with name
!       --  Adjust, Finalize, or Initialize where the sole formal is controlled.
  
!       if Comes_From_Source (Subp_Id)
!         and then Ekind (Subp_Id) = E_Procedure
!         and then Chars (Subp_Id) = Subp_Nam
!       then
!          Formal_Id := First_Formal (Subp_Id);
  
!          return
!            Present (Formal_Id)
!              and then Is_Controlled (Etype (Formal_Id))
!              and then No (Next_Formal (Formal_Id));
!       end if;
  
!       return False;
!    end Is_Controlled_Proc;
  
!    ---------------------------------------
!    -- Is_Default_Initial_Condition_Proc --
!    ---------------------------------------
  
!    function Is_Default_Initial_Condition_Proc
!      (Id : Entity_Id) return Boolean
!    is
!    begin
!       --  To qualify, the entity must denote a Default_Initial_Condition
!       --  procedure.
  
!       return Ekind (Id) = E_Procedure and then Is_DIC_Procedure (Id);
!    end Is_Default_Initial_Condition_Proc;
  
!    -----------------------
!    -- Is_Finalizer_Proc --
!    -----------------------
  
!    function Is_Finalizer_Proc (Id : Entity_Id) return Boolean is
!    begin
!       --  To qualify, the entity must denote a _Finalizer procedure
  
!       return Ekind (Id) = E_Procedure and then Chars (Id) = Name_uFinalizer;
!    end Is_Finalizer_Proc;
  
!    -----------------------
!    -- Is_Guaranteed_ABE --
!    -----------------------
  
!    function Is_Guaranteed_ABE
!      (N           : Node_Id;
!       Target_Decl : Node_Id;
!       Target_Body : Node_Id) return Boolean
!    is
!    begin
!       --  Avoid cascaded errors if there were previous serious infractions.
!       --  As a result the scenario will not be treated as a guaranteed ABE.
!       --  This behaviour parallels that of the old ABE mechanism.
  
!       if Serious_Errors_Detected > 0 then
!          return False;
  
!       --  The scenario and the target appear within the same context ignoring
!       --  enclosing library levels.
  
!       --  Performance note: parent traversal
  
!       elsif In_Same_Context (N, Target_Decl) then
  
!          --  The target body has already been encountered. The scenario results
!          --  in a guaranteed ABE if it appears prior to the body.
  
!          if Present (Target_Body) then
!             return Earlier_In_Extended_Unit (N, Target_Body);
  
!          --  Otherwise the body has not been encountered yet. The scenario is
!          --  a guaranteed ABE since the body will appear later. It is assumed
!          --  that the caller has already checked whether the scenario is ABE-
!          --  safe as optional bodies are not considered here.
  
!          else
!             return True;
!          end if;
!       end if;
  
!       return False;
!    end Is_Guaranteed_ABE;
  
!    -------------------------------
!    -- Is_Initial_Condition_Proc --
!    -------------------------------
  
!    function Is_Initial_Condition_Proc (Id : Entity_Id) return Boolean is
!    begin
!       --  To qualify, the entity must denote an Initial_Condition procedure
  
!       return
!         Ekind (Id) = E_Procedure and then Is_Initial_Condition_Procedure (Id);
!    end Is_Initial_Condition_Proc;
  
!    --------------------
!    -- Is_Initialized --
!    --------------------
  
!    function Is_Initialized (Obj_Decl : Node_Id) return Boolean is
!    begin
!       --  To qualify, the object declaration must have an expression
  
!       return
!         Present (Expression (Obj_Decl)) or else Has_Init_Expression (Obj_Decl);
!    end Is_Initialized;
  
!    -----------------------
!    -- Is_Invariant_Proc --
!    -----------------------
  
!    function Is_Invariant_Proc (Id : Entity_Id) return Boolean is
!    begin
!       --  To qualify, the entity must denote the "full" invariant procedure
  
!       return Ekind (Id) = E_Procedure and then Is_Invariant_Procedure (Id);
!    end Is_Invariant_Proc;
  
!    ---------------------------------------
!    -- Is_Non_Library_Level_Encapsulator --
!    ---------------------------------------
  
!    function Is_Non_Library_Level_Encapsulator (N : Node_Id) return Boolean is
!    begin
!       case Nkind (N) is
!          when N_Abstract_Subprogram_Declaration
!             | N_Aspect_Specification
!             | N_Component_Declaration
!             | N_Entry_Body
!             | N_Entry_Declaration
!             | N_Expression_Function
!             | N_Formal_Abstract_Subprogram_Declaration
!             | N_Formal_Concrete_Subprogram_Declaration
!             | N_Formal_Object_Declaration
!             | N_Formal_Package_Declaration
!             | N_Formal_Type_Declaration
!             | N_Generic_Association
!             | N_Implicit_Label_Declaration
!             | N_Incomplete_Type_Declaration
!             | N_Private_Extension_Declaration
!             | N_Private_Type_Declaration
!             | N_Protected_Body
!             | N_Protected_Type_Declaration
!             | N_Single_Protected_Declaration
!             | N_Single_Task_Declaration
!             | N_Subprogram_Body
!             | N_Subprogram_Declaration
!             | N_Task_Body
!             | N_Task_Type_Declaration
!          =>
!             return True;
  
!          when others =>
!             return Is_Generic_Declaration_Or_Body (N);
!       end case;
!    end Is_Non_Library_Level_Encapsulator;
  
!    -------------------------------
!    -- Is_Partial_Invariant_Proc --
!    -------------------------------
  
!    function Is_Partial_Invariant_Proc (Id : Entity_Id) return Boolean is
!    begin
!       --  To qualify, the entity must denote the "partial" invariant procedure
  
!       return
!         Ekind (Id) = E_Procedure and then Is_Partial_Invariant_Procedure (Id);
!    end Is_Partial_Invariant_Proc;
  
!    ----------------------------
!    -- Is_Postconditions_Proc --
!    ----------------------------
  
!    function Is_Postconditions_Proc (Id : Entity_Id) return Boolean is
!    begin
!       --  To qualify, the entity must denote a _Postconditions procedure
  
!       return
!         Ekind (Id) = E_Procedure and then Chars (Id) = Name_uPostconditions;
!    end Is_Postconditions_Proc;
  
!    ---------------------------
!    -- Is_Preelaborated_Unit --
!    ---------------------------
  
!    function Is_Preelaborated_Unit (Id : Entity_Id) return Boolean is
!    begin
!       return
!         Is_Preelaborated (Id)
!           or else Is_Pure (Id)
!           or else Is_Remote_Call_Interface (Id)
!           or else Is_Remote_Types (Id)
!           or else Is_Shared_Passive (Id);
!    end Is_Preelaborated_Unit;
  
!    ------------------------
!    -- Is_Protected_Entry --
!    ------------------------
  
!    function Is_Protected_Entry (Id : Entity_Id) return Boolean is
!    begin
!       --  To qualify, the entity must denote an entry defined in a protected
!       --  type.
  
!       return
!         Is_Entry (Id)
!           and then Is_Protected_Type (Non_Private_View (Scope (Id)));
!    end Is_Protected_Entry;
  
!    -----------------------
!    -- Is_Protected_Subp --
!    -----------------------
  
!    function Is_Protected_Subp (Id : Entity_Id) return Boolean is
!    begin
!       --  To qualify, the entity must denote a subprogram defined within a
!       --  protected type.
  
!       return
!         Ekind_In (Id, E_Function, E_Procedure)
!           and then Is_Protected_Type (Non_Private_View (Scope (Id)));
!    end Is_Protected_Subp;
  
!    ----------------------------
!    -- Is_Protected_Body_Subp --
!    ----------------------------
  
!    function Is_Protected_Body_Subp (Id : Entity_Id) return Boolean is
!    begin
!       --  To qualify, the entity must denote a subprogram with attribute
!       --  Protected_Subprogram set.
  
!       return
!         Ekind_In (Id, E_Function, E_Procedure)
!           and then Present (Protected_Subprogram (Id));
!    end Is_Protected_Body_Subp;
  
!    --------------------------------
!    -- Is_Recorded_SPARK_Scenario --
!    --------------------------------
  
!    function Is_Recorded_SPARK_Scenario (N : Node_Id) return Boolean is
!    begin
!       if Recorded_SPARK_Scenarios_In_Use then
!          return Recorded_SPARK_Scenarios.Get (N);
!       end if;
  
!       return Recorded_SPARK_Scenarios_No_Element;
!    end Is_Recorded_SPARK_Scenario;
  
!    ------------------------------------
!    -- Is_Recorded_Top_Level_Scenario --
!    ------------------------------------
  
!    function Is_Recorded_Top_Level_Scenario (N : Node_Id) return Boolean is
!    begin
!       if Recorded_Top_Level_Scenarios_In_Use then
!          return Recorded_Top_Level_Scenarios.Get (N);
!       end if;
  
!       return Recorded_Top_Level_Scenarios_No_Element;
!    end Is_Recorded_Top_Level_Scenario;
  
!    ------------------------
!    -- Is_Safe_Activation --
!    ------------------------
  
!    function Is_Safe_Activation
!      (Call      : Node_Id;
!       Task_Decl : Node_Id) return Boolean
!    is
!    begin
!       --  The activation of a task coming from an external instance cannot
!       --  cause an ABE because the generic was already instantiated. Note
!       --  that the instantiation itself may lead to an ABE.
  
!       return
!         In_External_Instance
!           (N           => Call,
!            Target_Decl => Task_Decl);
!    end Is_Safe_Activation;
  
!    ------------------
!    -- Is_Safe_Call --
!    ------------------
  
!    function Is_Safe_Call
!      (Call         : Node_Id;
!       Target_Attrs : Target_Attributes) return Boolean
!    is
!    begin
!       --  The target is either an abstract subprogram, formal subprogram, or
!       --  imported, in which case it does not have a body at compile or bind
!       --  time. Assume that the call is ABE-safe.
  
!       if Is_Bodiless_Subprogram (Target_Attrs.Spec_Id) then
!          return True;
  
!       --  The target is an instantiation of a generic subprogram. The call
!       --  cannot cause an ABE because the generic was already instantiated.
!       --  Note that the instantiation itself may lead to an ABE.
  
!       elsif Is_Generic_Instance (Target_Attrs.Spec_Id) then
!          return True;
  
!       --  The invocation of a target coming from an external instance cannot
!       --  cause an ABE because the generic was already instantiated. Note that
!       --  the instantiation itself may lead to an ABE.
  
!       elsif In_External_Instance
!               (N           => Call,
!                Target_Decl => Target_Attrs.Spec_Decl)
!       then
!          return True;
  
!       --  The target is a subprogram body without a previous declaration. The
!       --  call cannot cause an ABE because the body has already been seen.
  
!       elsif Nkind (Target_Attrs.Spec_Decl) = N_Subprogram_Body
!         and then No (Corresponding_Spec (Target_Attrs.Spec_Decl))
!       then
!          return True;
  
!       --  The target is a subprogram body stub without a prior declaration.
!       --  The call cannot cause an ABE because the proper body substitutes
!       --  the stub.
  
!       elsif Nkind (Target_Attrs.Spec_Decl) = N_Subprogram_Body_Stub
!         and then No (Corresponding_Spec_Of_Stub (Target_Attrs.Spec_Decl))
!       then
!          return True;
  
!       --  Subprogram bodies which wrap attribute references used as actuals
!       --  in instantiations are always ABE-safe. These bodies are artifacts
!       --  of expansion.
  
!       elsif Present (Target_Attrs.Body_Decl)
!         and then Nkind (Target_Attrs.Body_Decl) = N_Subprogram_Body
!         and then Was_Attribute_Reference (Target_Attrs.Body_Decl)
!       then
!          return True;
!       end if;
  
!       return False;
!    end Is_Safe_Call;
  
!    ---------------------------
!    -- Is_Safe_Instantiation --
!    ---------------------------
  
!    function Is_Safe_Instantiation
!      (Inst      : Node_Id;
!       Gen_Attrs : Target_Attributes) return Boolean
!    is
!    begin
!       --  The generic is an intrinsic subprogram in which case it does not
!       --  have a body at compile or bind time. Assume that the instantiation
!       --  is ABE-safe.
  
!       if Is_Bodiless_Subprogram (Gen_Attrs.Spec_Id) then
!          return True;
  
!       --  The instantiation of an external nested generic cannot cause an ABE
!       --  if the outer generic was already instantiated. Note that the instance
!       --  of the outer generic may lead to an ABE.
  
!       elsif In_External_Instance
!               (N           => Inst,
!                Target_Decl => Gen_Attrs.Spec_Decl)
!       then
!          return True;
  
!       --  The generic is a package. The instantiation cannot cause an ABE when
!       --  the package has no body.
  
!       elsif Ekind (Gen_Attrs.Spec_Id) = E_Generic_Package
!         and then not Has_Body (Gen_Attrs.Spec_Decl)
!       then
!          return True;
!       end if;
  
!       return False;
!    end Is_Safe_Instantiation;
  
!    ------------------
!    -- Is_Same_Unit --
!    ------------------
  
!    function Is_Same_Unit
!      (Unit_1 : Entity_Id;
!       Unit_2 : Entity_Id) return Boolean
!    is
!    begin
!       return Unit_Entity (Unit_1) = Unit_Entity (Unit_2);
!    end Is_Same_Unit;
  
!    -----------------
!    -- Is_Scenario --
!    -----------------
  
!    function Is_Scenario (N : Node_Id) return Boolean is
!    begin
!       case Nkind (N) is
!          when N_Assignment_Statement
!             | N_Attribute_Reference
!             | N_Call_Marker
!             | N_Entry_Call_Statement
!             | N_Expanded_Name
!             | N_Function_Call
!             | N_Function_Instantiation
!             | N_Identifier
!             | N_Package_Instantiation
!             | N_Procedure_Call_Statement
!             | N_Procedure_Instantiation
!             | N_Requeue_Statement
!          =>
!             return True;
  
!          when others =>
!             return False;
!       end case;
!    end Is_Scenario;
  
!    ------------------------------
!    -- Is_SPARK_Semantic_Target --
!    ------------------------------
  
!    function Is_SPARK_Semantic_Target (Id : Entity_Id) return Boolean is
!    begin
!       return
!         Is_Default_Initial_Condition_Proc (Id)
!           or else Is_Initial_Condition_Proc (Id);
!    end Is_SPARK_Semantic_Target;
  
!    ------------------------
!    -- Is_Suitable_Access --
!    ------------------------
  
!    function Is_Suitable_Access (N : Node_Id) return Boolean is
!       Nam     : Name_Id;
!       Pref    : Node_Id;
!       Subp_Id : Entity_Id;
  
!    begin
!       --  This scenario is relevant only when the static model is in effect
!       --  because it is graph-dependent and does not involve any run-time
!       --  checks. Allowing it in the dynamic model would create confusing
!       --  noise.
  
!       if not Static_Elaboration_Checks then
!          return False;
  
!       --  Nothing to do when switch -gnatd.U (ignore 'Access) is in effect
  
!       elsif Debug_Flag_Dot_UU then
!          return False;
  
!       --  Nothing to do when the scenario is not an attribute reference
  
!       elsif Nkind (N) /= N_Attribute_Reference then
!          return False;
  
!       --  Nothing to do for internally-generated attributes because they are
!       --  assumed to be ABE safe.
  
!       elsif not Comes_From_Source (N) then
!          return False;
!       end if;
  
!       Nam  := Attribute_Name (N);
!       Pref := Prefix (N);
  
!       --  Sanitize the prefix of the attribute
  
!       if not Is_Entity_Name (Pref) then
!          return False;
  
!       elsif No (Entity (Pref)) then
!          return False;
!       end if;
  
!       Subp_Id := Entity (Pref);
  
!       if not Is_Subprogram_Or_Entry (Subp_Id) then
!          return False;
!       end if;
  
!       --  Traverse a possible chain of renamings to obtain the original entry
!       --  or subprogram which the prefix may rename.
  
!       Subp_Id := Get_Renamed_Entity (Subp_Id);
  
!       --  To qualify, the attribute must meet the following prerequisites:
  
!       return
  
!         --  The prefix must denote a source entry, operator, or subprogram
!         --  which is not imported.
  
!         Comes_From_Source (Subp_Id)
!           and then Is_Subprogram_Or_Entry (Subp_Id)
!           and then not Is_Bodiless_Subprogram (Subp_Id)
  
!           --  The attribute name must be one of the 'Access forms. Note that
!           --  'Unchecked_Access cannot apply to a subprogram.
  
!           and then Nam_In (Nam, Name_Access, Name_Unrestricted_Access);
!    end Is_Suitable_Access;
  
     ----------------------
!    -- Is_Suitable_Call --
     ----------------------
  
!    function Is_Suitable_Call (N : Node_Id) return Boolean is
!    begin
!       --  Entry and subprogram calls are intentionally ignored because they
!       --  may undergo expansion depending on the compilation mode, previous
!       --  errors, generic context, etc. Call markers play the role of calls
!       --  and provide a uniform foundation for ABE processing.
  
!       return Nkind (N) = N_Call_Marker;
!    end Is_Suitable_Call;
  
!    -------------------------------
!    -- Is_Suitable_Instantiation --
!    -------------------------------
  
!    function Is_Suitable_Instantiation (N : Node_Id) return Boolean is
!       Orig_N : constant Node_Id := Original_Node (N);
!       --  Use the original node in case an instantiation library unit is
!       --  rewritten as a package or subprogram.
  
!    begin
!       --  To qualify, the instantiation must come from source
  
!       return
!         Comes_From_Source (Orig_N)
!           and then Nkind (Orig_N) in N_Generic_Instantiation;
!    end Is_Suitable_Instantiation;
  
!    --------------------------
!    -- Is_Suitable_Scenario --
!    --------------------------
  
!    function Is_Suitable_Scenario (N : Node_Id) return Boolean is
!    begin
!       --  NOTE: Derived types and pragma Refined_State are intentionally left
!       --  out because they are not executable during elaboration.
  
!       return
!         Is_Suitable_Access (N)
!           or else Is_Suitable_Call (N)
!           or else Is_Suitable_Instantiation (N)
!           or else Is_Suitable_Variable_Assignment (N)
!           or else Is_Suitable_Variable_Reference (N);
!    end Is_Suitable_Scenario;
  
!    ------------------------------------
!    -- Is_Suitable_SPARK_Derived_Type --
!    ------------------------------------
  
!    function Is_Suitable_SPARK_Derived_Type (N : Node_Id) return Boolean is
!       Prag : Node_Id;
!       Typ  : Entity_Id;
  
!    begin
!       --  To qualify, the type declaration must denote a derived tagged type
!       --  with primitive operations, subject to pragma SPARK_Mode On.
  
!       if Nkind (N) = N_Full_Type_Declaration
!         and then Nkind (Type_Definition (N)) = N_Derived_Type_Definition
!       then
!          Typ  := Defining_Entity (N);
!          Prag := SPARK_Pragma (Typ);
  
!          return
!            Is_Tagged_Type (Typ)
!              and then Has_Primitive_Operations (Typ)
!              and then Present (Prag)
!              and then Get_SPARK_Mode_From_Annotation (Prag) = On;
!       end if;
  
!       return False;
!    end Is_Suitable_SPARK_Derived_Type;
  
!    -------------------------------------
!    -- Is_Suitable_SPARK_Instantiation --
!    -------------------------------------
  
!    function Is_Suitable_SPARK_Instantiation (N : Node_Id) return Boolean is
!       Gen_Attrs  : Target_Attributes;
!       Gen_Id     : Entity_Id;
!       Inst       : Node_Id;
!       Inst_Attrs : Instantiation_Attributes;
!       Inst_Id    : Entity_Id;
  
!    begin
!       --  To qualify, both the instantiation and the generic must be subject to
!       --  SPARK_Mode On.
  
!       if Is_Suitable_Instantiation (N) then
!          Extract_Instantiation_Attributes
!            (Exp_Inst => N,
!             Inst     => Inst,
!             Inst_Id  => Inst_Id,
!             Gen_Id   => Gen_Id,
!             Attrs    => Inst_Attrs);
  
!          Extract_Target_Attributes (Gen_Id, Gen_Attrs);
  
!          return Inst_Attrs.SPARK_Mode_On and Gen_Attrs.SPARK_Mode_On;
!       end if;
  
!       return False;
!    end Is_Suitable_SPARK_Instantiation;
  
!    --------------------------------------------
!    -- Is_Suitable_SPARK_Refined_State_Pragma --
!    --------------------------------------------
  
!    function Is_Suitable_SPARK_Refined_State_Pragma
!      (N : Node_Id) return Boolean
!    is
!    begin
!       --  To qualfy, the pragma must denote Refined_State
  
!       return
!         Nkind (N) = N_Pragma
!           and then Pragma_Name (N) = Name_Refined_State;
!    end Is_Suitable_SPARK_Refined_State_Pragma;
  
!    -------------------------------------
!    -- Is_Suitable_Variable_Assignment --
!    -------------------------------------
  
!    function Is_Suitable_Variable_Assignment (N : Node_Id) return Boolean is
!       N_Unit      : Node_Id;
!       N_Unit_Id   : Entity_Id;
!       Nam         : Node_Id;
!       Var_Decl    : Node_Id;
!       Var_Id      : Entity_Id;
!       Var_Unit    : Node_Id;
!       Var_Unit_Id : Entity_Id;
  
!    begin
!       --  This scenario is relevant only when the static model is in effect
!       --  because it is graph-dependent and does not involve any run-time
!       --  checks. Allowing it in the dynamic model would create confusing
!       --  noise.
  
!       if not Static_Elaboration_Checks then
!          return False;
  
!       --  Nothing to do when the scenario is not an assignment
  
!       elsif Nkind (N) /= N_Assignment_Statement then
!          return False;
  
!       --  Nothing to do for internally-generated assignments because they are
!       --  assumed to be ABE safe.
  
!       elsif not Comes_From_Source (N) then
!          return False;
  
!       --  Assignments are ignored in GNAT mode on the assumption that they are
!       --  ABE-safe. This behaviour parallels that of the old ABE mechanism.
  
!       elsif GNAT_Mode then
!          return False;
!       end if;
  
!       Nam := Extract_Assignment_Name (N);
  
!       --  Sanitize the left hand side of the assignment
  
!       if not Is_Entity_Name (Nam) then
!          return False;
  
!       elsif No (Entity (Nam)) then
!          return False;
!       end if;
  
!       Var_Id := Entity (Nam);
  
!       --  Sanitize the variable
  
!       if Var_Id = Any_Id then
!          return False;
  
!       elsif Ekind (Var_Id) /= E_Variable then
!          return False;
!       end if;
  
!       Var_Decl := Declaration_Node (Var_Id);
  
!       if Nkind (Var_Decl) /= N_Object_Declaration then
!          return False;
!       end if;
  
!       N_Unit_Id := Find_Top_Unit (N);
!       N_Unit    := Unit_Declaration_Node (N_Unit_Id);
  
!       Var_Unit_Id := Find_Top_Unit (Var_Decl);
!       Var_Unit    := Unit_Declaration_Node (Var_Unit_Id);
  
!       --  To qualify, the assignment must meet the following prerequisites:
  
!       return
!         Comes_From_Source (Var_Id)
  
!           --  The variable must be declared in the spec of compilation unit U
  
!           and then Nkind (Var_Unit) = N_Package_Declaration
  
!           --  Performance note: parent traversal
  
!           and then Find_Enclosing_Level (Var_Decl) = Package_Spec
  
!           --  The assignment must occur in the body of compilation unit U
  
!           and then Nkind (N_Unit) = N_Package_Body
!           and then Present (Corresponding_Body (Var_Unit))
!           and then Corresponding_Body (Var_Unit) = N_Unit_Id;
!    end Is_Suitable_Variable_Assignment;
  
!    ------------------------------------
!    -- Is_Suitable_Variable_Reference --
!    ------------------------------------
  
!    function Is_Suitable_Variable_Reference (N : Node_Id) return Boolean is
!    begin
!       --  Expanded names and identifiers are intentionally ignored because they
!       --  be folded, optimized away, etc. Variable references markers play the
!       --  role of variable references and provide a uniform foundation for ABE
!       --  processing.
  
!       return Nkind (N) = N_Variable_Reference_Marker;
!    end Is_Suitable_Variable_Reference;
  
!    ------------------------------------
!    -- Is_Synchronous_Suspension_Call --
!    ------------------------------------
  
!    function Is_Synchronous_Suspension_Call (N : Node_Id) return Boolean is
!       Call_Attrs : Call_Attributes;
!       Target_Id  : Entity_Id;
  
!    begin
!       --  To qualify, the call must invoke one of the runtime routines which
!       --  perform synchronous suspension.
  
!       if Is_Suitable_Call (N) then
!          Extract_Call_Attributes
!            (Call      => N,
!             Target_Id => Target_Id,
!             Attrs     => Call_Attrs);
  
!          return
!            Is_RTE (Target_Id, RE_Suspend_Until_True)
!              or else
!            Is_RTE (Target_Id, RE_Wait_For_Release);
!       end if;
  
!       return False;
!    end Is_Synchronous_Suspension_Call;
  
!    -------------------
!    -- Is_Task_Entry --
!    -------------------
  
!    function Is_Task_Entry (Id : Entity_Id) return Boolean is
!    begin
!       --  To qualify, the entity must denote an entry defined in a task type
  
!       return
!         Is_Entry (Id) and then Is_Task_Type (Non_Private_View (Scope (Id)));
!    end Is_Task_Entry;
  
!    ------------------------
!    -- Is_Up_Level_Target --
!    ------------------------
  
!    function Is_Up_Level_Target (Target_Decl : Node_Id) return Boolean is
!       Root : constant Node_Id := Root_Scenario;
  
!    begin
!       --  The root appears within the declaratons of a block statement, entry
!       --  body, subprogram body, or task body ignoring enclosing packages. The
!       --  root is always within the main unit. An up-level target is a notion
!       --  applicable only to the static model because scenarios are reached by
!       --  means of graph traversal started from a fixed declarative or library
!       --  level.
  
!       --  Performance note: parent traversal
  
!       if Static_Elaboration_Checks
!         and then Find_Enclosing_Level (Root) = Declaration_Level
!       then
!          --  The target is within the main unit. It acts as an up-level target
!          --  when it appears within a context which encloses the root.
  
!          --    package body Main_Unit is
!          --       function Func ...;             --  target
  
!          --       procedure Proc is
!          --          X : ... := Func;            --  root scenario
  
!          if In_Extended_Main_Code_Unit (Target_Decl) then
  
!             --  Performance note: parent traversal
  
!             return not In_Same_Context (Root, Target_Decl, Nested_OK => True);
  
!          --  Otherwise the target is external to the main unit which makes it
!          --  an up-level target.
  
           else
!             return True;
           end if;
-       end if;
  
!       return False;
!    end Is_Up_Level_Target;
  
!    ---------------------
!    -- Is_Visited_Body --
!    ---------------------
  
!    function Is_Visited_Body (Body_Decl : Node_Id) return Boolean is
!    begin
!       if Visited_Bodies_In_Use then
!          return Visited_Bodies.Get (Body_Decl);
!       end if;
  
!       return Visited_Bodies_No_Element;
!    end Is_Visited_Body;
  
!    -------------------------------
!    -- Kill_Elaboration_Scenario --
!    -------------------------------
  
!    procedure Kill_Elaboration_Scenario (N : Node_Id) is
!       procedure Kill_SPARK_Scenario;
!       pragma Inline (Kill_SPARK_Scenario);
!       --  Eliminate scenario N from table SPARK_Scenarios if it is recorded
!       --  there.
  
!       procedure Kill_Top_Level_Scenario;
!       pragma Inline (Kill_Top_Level_Scenario);
!       --  Eliminate scenario N from table Top_Level_Scenarios if it is recorded
!       --  there.
  
!       -------------------------
!       -- Kill_SPARK_Scenario --
!       -------------------------
  
!       procedure Kill_SPARK_Scenario is
!          package Scenarios renames SPARK_Scenarios;
  
!       begin
!          if Is_Recorded_SPARK_Scenario (N) then
  
!             --  Performance note: list traversal
  
!             for Index in Scenarios.First .. Scenarios.Last loop
!                if Scenarios.Table (Index) = N then
!                   Scenarios.Table (Index) := Empty;
  
!                   --  The SPARK scenario is no longer recorded
  
!                   Set_Is_Recorded_SPARK_Scenario (N, False);
!                   return;
!                end if;
!             end loop;
  
!             --  A recorded SPARK scenario must be in the table of recorded
!             --  SPARK scenarios.
  
!             pragma Assert (False);
!          end if;
!       end Kill_SPARK_Scenario;
  
!       -----------------------------
!       -- Kill_Top_Level_Scenario --
!       -----------------------------
  
!       procedure Kill_Top_Level_Scenario is
!          package Scenarios renames Top_Level_Scenarios;
  
!       begin
!          if Is_Recorded_Top_Level_Scenario (N) then
  
!             --  Performance node: list traversal
  
!             for Index in Scenarios.First .. Scenarios.Last loop
!                if Scenarios.Table (Index) = N then
!                   Scenarios.Table (Index) := Empty;
  
!                   --  The top-level scenario is no longer recorded
  
!                   Set_Is_Recorded_Top_Level_Scenario (N, False);
!                   return;
                 end if;
-             end loop;
  
!             --  A recorded top-level scenario must be in the table of recorded
!             --  top-level scenarios.
  
!             pragma Assert (False);
           end if;
-       end Kill_Top_Level_Scenario;
  
!    --  Start of processing for Kill_Elaboration_Scenario
  
!    begin
!       --  Nothing to do when switch -gnatH (legacy elaboration checking mode
!       --  enabled) is in effect because the legacy ABE lechanism does not need
!       --  to carry out this action.
  
!       if Legacy_Elaboration_Checks then
!          return;
!       end if;
  
!       --  Eliminate a recorded scenario when it appears within dead code
!       --  because it will not be executed at elaboration time.
  
!       if Is_Scenario (N) then
!          Kill_SPARK_Scenario;
!          Kill_Top_Level_Scenario;
!       end if;
!    end Kill_Elaboration_Scenario;
  
!    ----------------------------------
!    -- Meet_Elaboration_Requirement --
!    ----------------------------------
  
!    procedure Meet_Elaboration_Requirement
!      (N         : Node_Id;
!       Target_Id : Entity_Id;
!       Req_Nam   : Name_Id)
!    is
!       Main_Id : constant Entity_Id := Cunit_Entity (Main_Unit);
!       Unit_Id : constant Entity_Id := Find_Top_Unit (Target_Id);
  
!       function Find_Preelaboration_Pragma
!         (Prag_Nam : Name_Id) return Node_Id;
!       pragma Inline (Find_Preelaboration_Pragma);
!       --  Traverse the visible declarations of unit Unit_Id and locate a source
!       --  preelaboration-related pragma with name Prag_Nam.
  
!       procedure Info_Requirement_Met (Prag : Node_Id);
!       pragma Inline (Info_Requirement_Met);
!       --  Output information concerning pragma Prag which meets requirement
!       --  Req_Nam.
  
!       procedure Info_Scenario;
!       pragma Inline (Info_Scenario);
!       --  Output information concerning scenario N
  
!       --------------------------------
!       -- Find_Preelaboration_Pragma --
!       --------------------------------
  
!       function Find_Preelaboration_Pragma
!         (Prag_Nam : Name_Id) return Node_Id
!       is
!          Spec : constant Node_Id := Parent (Unit_Id);
!          Decl : Node_Id;
  
        begin
!          --  A preelaboration-related pragma comes from source and appears at
!          --  the top of the visible declarations of a package.
  
!          if Nkind (Spec) = N_Package_Specification then
!             Decl := First (Visible_Declarations (Spec));
!             while Present (Decl) loop
!                if Comes_From_Source (Decl) then
!                   if Nkind (Decl) = N_Pragma
!                     and then Pragma_Name (Decl) = Prag_Nam
!                   then
!                      return Decl;
  
!                   --  Otherwise the construct terminates the region where the
!                   --  preelaboration-related pragma may appear.
  
!                   else
!                      exit;
!                   end if;
!                end if;
  
!                Next (Decl);
!             end loop;
           end if;
  
!          return Empty;
!       end Find_Preelaboration_Pragma;
  
        --------------------------
!       -- Info_Requirement_Met --
        --------------------------
  
!       procedure Info_Requirement_Met (Prag : Node_Id) is
        begin
!          pragma Assert (Present (Prag));
  
!          Error_Msg_Name_1 := Req_Nam;
!          Error_Msg_Sloc   := Sloc (Prag);
!          Error_Msg_NE
!            ("\\% requirement for unit & met by pragma #", N, Unit_Id);
!       end Info_Requirement_Met;
  
!       -------------------
!       -- Info_Scenario --
!       -------------------
  
!       procedure Info_Scenario is
        begin
!          if Is_Suitable_Call (N) then
!             Info_Call
!               (Call      => N,
!                Target_Id => Target_Id,
!                Info_Msg  => False,
!                In_SPARK  => True);
  
!          elsif Is_Suitable_Instantiation (N) then
!             Info_Instantiation
!               (Inst     => N,
!                Gen_Id   => Target_Id,
!                Info_Msg => False,
!                In_SPARK => True);
  
!          elsif Is_Suitable_SPARK_Refined_State_Pragma (N) then
!             Error_Msg_N
!               ("read of refinement constituents during elaboration in SPARK",
!                N);
  
!          elsif Is_Suitable_Variable_Reference (N) then
!             Info_Variable_Reference
!               (Ref      => N,
!                Var_Id   => Target_Id,
!                Info_Msg => False,
!                In_SPARK => True);
  
!          --  No other scenario may impose a requirement on the context of the
!          --  main unit.
  
!          else
!             pragma Assert (False);
!             null;
!          end if;
!       end Info_Scenario;
  
!       --  Local variables
  
!       Elab_Attrs : Elaboration_Attributes;
!       Elab_Nam   : Name_Id;
!       Req_Met    : Boolean;
  
!    --  Start of processing for Meet_Elaboration_Requirement
  
!    begin
!       pragma Assert (Nam_In (Req_Nam, Name_Elaborate, Name_Elaborate_All));
  
!       --  Assume that the requirement has not been met
  
!       Req_Met := False;
  
!       --  Elaboration requirements are verified only when the static model is
!       --  in effect because this diagnostic is graph-dependent.
  
!       if not Static_Elaboration_Checks then
!          return;
  
!       --  If the target is within the main unit, either at the source level or
!       --  through an instantiation, then there is no real requirement to meet
!       --  because the main unit cannot force its own elaboration by means of an
!       --  Elaborate[_All] pragma. Treat this case as valid coverage.
  
!       elsif In_Extended_Main_Code_Unit (Target_Id) then
!          Req_Met := True;
  
!       --  Otherwise the target resides in an external unit
  
!       --  The requirement is met when the target comes from an internal unit
!       --  because such a unit is elaborated prior to a non-internal unit.
  
!       elsif In_Internal_Unit (Unit_Id)
!         and then not In_Internal_Unit (Main_Id)
!       then
!          Req_Met := True;
  
!       --  The requirement is met when the target comes from a preelaborated
!       --  unit. This portion must parallel predicate Is_Preelaborated_Unit.
  
!       elsif Is_Preelaborated_Unit (Unit_Id) then
!          Req_Met := True;
  
!          --  Output extra information when switch -gnatel (info messages on
!          --  implicit Elaborate[_All] pragmas.
  
!          if Elab_Info_Messages then
!             if Is_Preelaborated (Unit_Id) then
!                Elab_Nam := Name_Preelaborate;
  
!             elsif Is_Pure (Unit_Id) then
!                Elab_Nam := Name_Pure;
  
!             elsif Is_Remote_Call_Interface (Unit_Id) then
!                Elab_Nam := Name_Remote_Call_Interface;
  
!             elsif Is_Remote_Types (Unit_Id) then
!                Elab_Nam := Name_Remote_Types;
  
!             else
!                pragma Assert (Is_Shared_Passive (Unit_Id));
!                Elab_Nam := Name_Shared_Passive;
!             end if;
  
!             Info_Requirement_Met (Find_Preelaboration_Pragma (Elab_Nam));
!          end if;
  
!       --  Determine whether the context of the main unit has a pragma strong
!       --  enough to meet the requirement.
  
!       else
!          Elab_Attrs := Elaboration_Status (Unit_Id);
  
!          --  The pragma must be either Elaborate_All or be as strong as the
!          --  requirement.
  
!          if Present (Elab_Attrs.Source_Pragma)
!            and then Nam_In (Pragma_Name (Elab_Attrs.Source_Pragma),
!                             Name_Elaborate_All,
!                             Req_Nam)
!          then
!             Req_Met := True;
  
!             --  Output extra information when switch -gnatel (info messages on
!             --  implicit Elaborate[_All] pragmas.
  
!             if Elab_Info_Messages then
!                Info_Requirement_Met (Elab_Attrs.Source_Pragma);
!             end if;
           end if;
!       end if;
  
!       --  The requirement was not met by the context of the main unit, issue an
!       --  error.
  
!       if not Req_Met then
!          Info_Scenario;
  
!          Error_Msg_Name_1 := Req_Nam;
!          Error_Msg_Node_2 := Unit_Id;
!          Error_Msg_NE ("\\unit & requires pragma % for &", N, Main_Id);
  
!          Output_Active_Scenarios (N);
!       end if;
!    end Meet_Elaboration_Requirement;
  
!    ----------------------
!    -- Non_Private_View --
!    ----------------------
  
!    function Non_Private_View (Typ : Entity_Id) return Entity_Id is
!    begin
!       if Is_Private_Type (Typ) and then Present (Full_View (Typ)) then
!          return Full_View (Typ);
!       else
!          return Typ;
!       end if;
!    end Non_Private_View;
  
!    -----------------------------
!    -- Output_Active_Scenarios --
!    -----------------------------
  
!    procedure Output_Active_Scenarios (Error_Nod : Node_Id) is
!       procedure Output_Access (N : Node_Id);
!       --  Emit a specific diagnostic message for 'Access denote by N
  
!       procedure Output_Activation_Call (N : Node_Id);
!       --  Emit a specific diagnostic message for task activation N
  
!       procedure Output_Call (N : Node_Id; Target_Id : Entity_Id);
!       --  Emit a specific diagnostic message for call N which invokes target
!       --  Target_Id.
  
!       procedure Output_Header;
!       --  Emit a specific diagnostic message for the unit of the root scenario
  
!       procedure Output_Instantiation (N : Node_Id);
!       --  Emit a specific diagnostic message for instantiation N
  
!       procedure Output_SPARK_Refined_State_Pragma (N : Node_Id);
!       --  Emit a specific diagnostic message for Refined_State pragma N
  
!       procedure Output_Variable_Assignment (N : Node_Id);
!       --  Emit a specific diagnostic message for assignment statement N
  
!       procedure Output_Variable_Reference (N : Node_Id);
!       --  Emit a specific diagnostic message for reference N which mentions a
!       --  variable.
  
!       -------------------
!       -- Output_Access --
!       -------------------
  
!       procedure Output_Access (N : Node_Id) is
!          Subp_Id : constant Entity_Id := Entity (Prefix (N));
  
        begin
!          Error_Msg_Name_1 := Attribute_Name (N);
!          Error_Msg_Sloc   := Sloc (N);
!          Error_Msg_NE ("\\  % of & taken #", Error_Nod, Subp_Id);
!       end Output_Access;
  
!       ----------------------------
!       -- Output_Activation_Call --
!       ----------------------------
  
!       procedure Output_Activation_Call (N : Node_Id) is
!          function Find_Activator (Call : Node_Id) return Entity_Id;
!          --  Find the nearest enclosing construct which houses call Call
  
!          --------------------
!          -- Find_Activator --
!          --------------------
  
!          function Find_Activator (Call : Node_Id) return Entity_Id is
!             Par : Node_Id;
  
!          begin
!             --  Climb the parent chain looking for a package [body] or a
!             --  construct with a statement sequence.
  
!             Par := Parent (Call);
!             while Present (Par) loop
!                if Nkind_In (Par, N_Package_Body, N_Package_Declaration) then
!                   return Defining_Entity (Par);
  
!                elsif Nkind (Par) = N_Handled_Sequence_Of_Statements then
!                   return Defining_Entity (Parent (Par));
                 end if;
  
!                Par := Parent (Par);
!             end loop;
  
!             return Empty;
!          end Find_Activator;
  
!          --  Local variables
  
!          Activator : constant Entity_Id := Find_Activator (N);
  
!       --  Start of processing for Output_Activation_Call
  
        begin
!          pragma Assert (Present (Activator));
  
!          Error_Msg_NE ("\\  local tasks of & activated", Error_Nod, Activator);
!       end Output_Activation_Call;
  
!       -----------------
!       -- Output_Call --
!       -----------------
  
!       procedure Output_Call (N : Node_Id; Target_Id : Entity_Id) is
!          procedure Output_Accept_Alternative;
!          pragma Inline (Output_Accept_Alternative);
!          --  Emit a specific diagnostic message concerning an accept
!          --  alternative.
  
!          procedure Output_Call (Kind : String);
!          pragma Inline (Output_Call);
!          --  Emit a specific diagnostic message concerning a call of kind Kind
  
!          procedure Output_Type_Actions (Action : String);
!          pragma Inline (Output_Type_Actions);
!          --  Emit a specific diagnostic message concerning action Action of a
!          --  type.
  
!          procedure Output_Verification_Call
!            (Pred    : String;
!             Id      : Entity_Id;
!             Id_Kind : String);
!          pragma Inline (Output_Verification_Call);
!          --  Emit a specific diagnostic message concerning the verification of
!          --  predicate Pred applied to related entity Id with kind Id_Kind.
  
!          -------------------------------
!          -- Output_Accept_Alternative --
!          -------------------------------
  
!          procedure Output_Accept_Alternative is
!             Entry_Id : constant Entity_Id := Receiving_Entry (Target_Id);
  
!          begin
!             pragma Assert (Present (Entry_Id));
  
!             Error_Msg_NE ("\\  entry & selected #", Error_Nod, Entry_Id);
!          end Output_Accept_Alternative;
  
!          -----------------
!          -- Output_Call --
!          -----------------
  
!          procedure Output_Call (Kind : String) is
!          begin
!             Error_Msg_NE ("\\  " & Kind & " & called #", Error_Nod, Target_Id);
!          end Output_Call;
  
!          -------------------------
!          -- Output_Type_Actions --
!          -------------------------
  
!          procedure Output_Type_Actions (Action : String) is
!             Typ : constant Entity_Id := First_Formal_Type (Target_Id);
  
!          begin
!             pragma Assert (Present (Typ));
  
!             Error_Msg_NE
!               ("\\  " & Action & " actions for type & #", Error_Nod, Typ);
!          end Output_Type_Actions;
  
!          ------------------------------
!          -- Output_Verification_Call --
!          ------------------------------
  
!          procedure Output_Verification_Call
!            (Pred    : String;
!             Id      : Entity_Id;
!             Id_Kind : String)
!          is
!          begin
!             pragma Assert (Present (Id));
  
!             Error_Msg_NE
!               ("\\  " & Pred & " of " & Id_Kind & " & verified #",
!                Error_Nod, Id);
!          end Output_Verification_Call;
  
!       --  Start of processing for Output_Call
  
        begin
!          Error_Msg_Sloc := Sloc (N);
  
!          --  Accept alternative
  
!          if Is_Accept_Alternative_Proc (Target_Id) then
!             Output_Accept_Alternative;
  
!          --  Adjustment
  
!          elsif Is_TSS (Target_Id, TSS_Deep_Adjust) then
!             Output_Type_Actions ("adjustment");
  
!          --  Default_Initial_Condition
  
!          elsif Is_Default_Initial_Condition_Proc (Target_Id) then
!             Output_Verification_Call
!               (Pred    => "Default_Initial_Condition",
!                Id      => First_Formal_Type (Target_Id),
!                Id_Kind => "type");
  
!          --  Entries
  
!          elsif Is_Protected_Entry (Target_Id) then
!             Output_Call ("entry");
  
!          --  Task entry calls are never processed because the entry being
!          --  invoked does not have a corresponding "body", it has a select. A
!          --  task entry call appears in the stack of active scenarios for the
!          --  sole purpose of checking No_Entry_Calls_In_Elaboration_Code and
!          --  nothing more.
  
!          elsif Is_Task_Entry (Target_Id) then
!             null;
  
!          --  Finalization
  
!          elsif Is_TSS (Target_Id, TSS_Deep_Finalize) then
!             Output_Type_Actions ("finalization");
  
!          --  Calls to _Finalizer procedures must not appear in the output
!          --  because this creates confusing noise.
  
!          elsif Is_Finalizer_Proc (Target_Id) then
              null;
  
!          --  Initial_Condition
  
!          elsif Is_Initial_Condition_Proc (Target_Id) then
!             Output_Verification_Call
!               (Pred    => "Initial_Condition",
!                Id      => Find_Enclosing_Scope (N),
!                Id_Kind => "package");
  
!          --  Initialization
  
!          elsif Is_Init_Proc (Target_Id)
!            or else Is_TSS (Target_Id, TSS_Deep_Initialize)
!          then
!             Output_Type_Actions ("initialization");
  
!          --  Invariant
  
!          elsif Is_Invariant_Proc (Target_Id) then
!             Output_Verification_Call
!               (Pred    => "invariants",
!                Id      => First_Formal_Type (Target_Id),
!                Id_Kind => "type");
  
!          --  Partial invariant calls must not appear in the output because this
!          --  creates confusing noise. Note that a partial invariant is always
!          --  invoked by the "full" invariant which is already placed on the
!          --  stack.
  
!          elsif Is_Partial_Invariant_Proc (Target_Id) then
!             null;
  
!          --  _Postconditions
  
!          elsif Is_Postconditions_Proc (Target_Id) then
!             Output_Verification_Call
!               (Pred    => "postconditions",
!                Id      => Find_Enclosing_Scope (N),
!                Id_Kind => "subprogram");
  
!          --  Subprograms must come last because some of the previous cases fall
!          --  under this category.
  
!          elsif Ekind (Target_Id) = E_Function then
!             Output_Call ("function");
  
!          elsif Ekind (Target_Id) = E_Procedure then
!             Output_Call ("procedure");
  
!          else
!             pragma Assert (False);
!             null;
           end if;
-       end Output_Call;
  
!       -------------------
!       -- Output_Header --
!       -------------------
  
!       procedure Output_Header is
!          Unit_Id : constant Entity_Id := Find_Top_Unit (Root_Scenario);
  
        begin
!          if Ekind (Unit_Id) = E_Package then
!             Error_Msg_NE ("\\  spec of unit & elaborated", Error_Nod, Unit_Id);
  
!          elsif Ekind (Unit_Id) = E_Package_Body then
!             Error_Msg_NE ("\\  body of unit & elaborated", Error_Nod, Unit_Id);
  
!          else
!             Error_Msg_NE ("\\  in body of unit &", Error_Nod, Unit_Id);
           end if;
-       end Output_Header;
  
!       --------------------------
!       -- Output_Instantiation --
!       --------------------------
  
!       procedure Output_Instantiation (N : Node_Id) is
!          procedure Output_Instantiation (Gen_Id : Entity_Id; Kind : String);
!          pragma Inline (Output_Instantiation);
!          --  Emit a specific diagnostic message concerning an instantiation of
!          --  generic unit Gen_Id. Kind denotes the kind of the instantiation.
  
!          --------------------------
!          -- Output_Instantiation --
!          --------------------------
  
!          procedure Output_Instantiation (Gen_Id : Entity_Id; Kind : String) is
!          begin
!             Error_Msg_NE
!               ("\\  " & Kind & " & instantiated as & #", Error_Nod, Gen_Id);
!          end Output_Instantiation;
  
!          --  Local variables
  
!          Inst       : Node_Id;
!          Inst_Attrs : Instantiation_Attributes;
!          Inst_Id    : Entity_Id;
!          Gen_Id     : Entity_Id;
  
!       --  Start of processing for Output_Instantiation
  
!       begin
!          Extract_Instantiation_Attributes
!            (Exp_Inst => N,
!             Inst     => Inst,
!             Inst_Id  => Inst_Id,
!             Gen_Id   => Gen_Id,
!             Attrs    => Inst_Attrs);
  
!          Error_Msg_Node_2 := Inst_Id;
!          Error_Msg_Sloc   := Sloc (Inst);
  
!          if Nkind (Inst) = N_Function_Instantiation then
!             Output_Instantiation (Gen_Id, "function");
  
!          elsif Nkind (Inst) = N_Package_Instantiation then
!             Output_Instantiation (Gen_Id, "package");
  
!          elsif Nkind (Inst) = N_Procedure_Instantiation then
!             Output_Instantiation (Gen_Id, "procedure");
  
           else
!             pragma Assert (False);
!             null;
           end if;
-       end Output_Instantiation;
  
!       ---------------------------------------
!       -- Output_SPARK_Refined_State_Pragma --
!       ---------------------------------------
  
-       procedure Output_SPARK_Refined_State_Pragma (N : Node_Id) is
        begin
!          Error_Msg_Sloc := Sloc (N);
!          Error_Msg_N ("\\  refinement constituents read #", Error_Nod);
!       end Output_SPARK_Refined_State_Pragma;
  
        --------------------------------
!       -- Output_Variable_Assignment --
        --------------------------------
  
!       procedure Output_Variable_Assignment (N : Node_Id) is
!          Var_Id : constant Entity_Id := Entity (Extract_Assignment_Name (N));
  
!       begin
!          Error_Msg_Sloc := Sloc (N);
!          Error_Msg_NE ("\\  variable & assigned #", Error_Nod, Var_Id);
!       end Output_Variable_Assignment;
  
!       -------------------------------
!       -- Output_Variable_Reference --
!       -------------------------------
  
!       procedure Output_Variable_Reference (N : Node_Id) is
!          Dummy  : Variable_Attributes;
!          Var_Id : Entity_Id;
  
!       begin
!          Extract_Variable_Reference_Attributes
!            (Ref    => N,
!             Var_Id => Var_Id,
!             Attrs  => Dummy);
  
!          Error_Msg_Sloc := Sloc (N);
  
!          if Is_Read (N) then
!             Error_Msg_NE ("\\  variable & read #", Error_Nod, Var_Id);
  
!          else
!             pragma Assert (False);
!             null;
!          end if;
!       end Output_Variable_Reference;
  
!       --  Local variables
  
!       package Stack renames Scenario_Stack;
  
!       Dummy     : Call_Attributes;
!       N         : Node_Id;
!       Posted    : Boolean;
!       Target_Id : Entity_Id;
  
!    --  Start of processing for Output_Active_Scenarios
  
!    begin
!       --  Active scenarios are emitted only when the static model is in effect
!       --  because there is an inherent order by which all these scenarios were
!       --  reached from the declaration or library level.
  
!       if not Static_Elaboration_Checks then
!          return;
!       end if;
  
!       Posted := False;
  
!       for Index in Stack.First .. Stack.Last loop
!          N := Stack.Table (Index);
  
!          if not Posted then
!             Posted := True;
!             Output_Header;
!          end if;
  
!          --  'Access
  
!          if Nkind (N) = N_Attribute_Reference then
!             Output_Access (N);
  
!          --  Calls
  
!          elsif Is_Suitable_Call (N) then
!             Extract_Call_Attributes
!               (Call      => N,
!                Target_Id => Target_Id,
!                Attrs     => Dummy);
  
-             if Is_Activation_Proc (Target_Id) then
-                Output_Activation_Call (N);
              else
!                Output_Call (N, Target_Id);
              end if;
  
!          --  Instantiations
  
!          elsif Is_Suitable_Instantiation (N) then
!             Output_Instantiation (N);
  
!          --  Pragma Refined_State
  
!          elsif Is_Suitable_SPARK_Refined_State_Pragma (N) then
!             Output_SPARK_Refined_State_Pragma (N);
  
!          --  Variable assignments
  
!          elsif Nkind (N) = N_Assignment_Statement then
!             Output_Variable_Assignment (N);
  
!          --  Variable references
  
!          elsif Is_Suitable_Variable_Reference (N) then
!             Output_Variable_Reference (N);
  
           else
!             pragma Assert (False);
!             null;
           end if;
-       end loop;
-    end Output_Active_Scenarios;
  
!    -------------------------
!    -- Pop_Active_Scenario --
!    -------------------------
  
!    procedure Pop_Active_Scenario (N : Node_Id) is
!       Top : Node_Id renames Scenario_Stack.Table (Scenario_Stack.Last);
  
!    begin
!       pragma Assert (Top = N);
!       Scenario_Stack.Decrement_Last;
!    end Pop_Active_Scenario;
  
!    --------------------------------
!    -- Process_Activation_Generic --
!    --------------------------------
  
!    procedure Process_Activation_Generic
!      (Call       : Node_Id;
!       Call_Attrs : Call_Attributes;
!       State      : Processing_Attributes)
!    is
!       procedure Process_Task_Object (Obj_Id : Entity_Id; Typ : Entity_Id);
!       --  Perform ABE checks and diagnostics for object Obj_Id with type Typ.
!       --  Typ may be a task type or a composite type with at least one task
!       --  component.
  
!       procedure Process_Task_Objects (List : List_Id);
!       --  Perform ABE checks and diagnostics for all task objects found in the
!       --  list List.
  
!       -------------------------
!       -- Process_Task_Object --
!       -------------------------
  
!       procedure Process_Task_Object (Obj_Id : Entity_Id; Typ : Entity_Id) is
!          Base_Typ : constant Entity_Id := Base_Type (Typ);
  
!          Comp_Id    : Entity_Id;
!          Task_Attrs : Task_Attributes;
  
!          New_State : Processing_Attributes := State;
!          --  Each step of the Processing phase constitutes a new state
  
        begin
!          if Is_Task_Type (Typ) then
!             Extract_Task_Attributes
!               (Typ   => Base_Typ,
!                Attrs => Task_Attrs);
  
!             --  Warnings are suppressed when a prior scenario is already in
!             --  that mode, or when the object, activation call, or task type
!             --  have warnings suppressed. Update the state of the Processing
!             --  phase to reflect this.
  
!             New_State.Suppress_Warnings :=
!               New_State.Suppress_Warnings
!                 or else not Is_Elaboration_Warnings_OK_Id (Obj_Id)
!                 or else not Call_Attrs.Elab_Warnings_OK
!                 or else not Task_Attrs.Elab_Warnings_OK;
  
!             --  Update the state of the Processing phase to indicate that any
!             --  further traversal is now within a task body.
  
!             New_State.Within_Task_Body := True;
  
!             Process_Single_Activation
!               (Call       => Call,
!                Call_Attrs => Call_Attrs,
!                Obj_Id     => Obj_Id,
!                Task_Attrs => Task_Attrs,
!                State      => New_State);
  
!          --  Examine the component type when the object is an array
  
!          elsif Is_Array_Type (Typ) and then Has_Task (Base_Typ) then
!             Process_Task_Object
!               (Obj_Id => Obj_Id,
!                Typ    => Component_Type (Typ));
  
!          --  Examine individual component types when the object is a record
  
!          elsif Is_Record_Type (Typ) and then Has_Task (Base_Typ) then
!             Comp_Id := First_Component (Typ);
!             while Present (Comp_Id) loop
!                Process_Task_Object
!                  (Obj_Id => Obj_Id,
!                   Typ    => Etype (Comp_Id));
  
!                Next_Component (Comp_Id);
!             end loop;
!          end if;
!       end Process_Task_Object;
  
!       --------------------------
!       -- Process_Task_Objects --
!       --------------------------
  
!       procedure Process_Task_Objects (List : List_Id) is
!          Item     : Node_Id;
!          Item_Id  : Entity_Id;
!          Item_Typ : Entity_Id;
  
!       begin
!          --  Examine the contents of the list looking for an object declaration
!          --  of a task type or one that contains a task within.
  
!          Item := First (List);
!          while Present (Item) loop
!             if Nkind (Item) = N_Object_Declaration then
!                Item_Id  := Defining_Entity (Item);
!                Item_Typ := Etype (Item_Id);
  
!                if Has_Task (Item_Typ) then
!                   Process_Task_Object
!                     (Obj_Id => Item_Id,
!                      Typ    => Item_Typ);
!                end if;
              end if;
  
!             Next (Item);
!          end loop;
!       end Process_Task_Objects;
  
!       --  Local variables
  
!       Context : Node_Id;
!       Spec    : Node_Id;
  
!    --  Start of processing for Process_Activation_Generic
  
!    begin
!       --  Nothing to do when the activation is a guaranteed ABE
  
!       if Is_Known_Guaranteed_ABE (Call) then
!          return;
!       end if;
  
!       --  Find the proper context of the activation call where all task objects
!       --  being activated are declared. This is usually the immediate parent of
!       --  the call.
  
!       Context := Parent (Call);
  
!       --  In the case of package bodies, the activation call is in the handled
!       --  sequence of statements, but the task objects are in the declaration
!       --  list of the body.
  
!       if Nkind (Context) = N_Handled_Sequence_Of_Statements
!         and then Nkind (Parent (Context)) = N_Package_Body
!       then
!          Context := Parent (Context);
!       end if;
  
!       --  Process all task objects defined in both the spec and body when the
!       --  activation call precedes the "begin" of a package body.
  
!       if Nkind (Context) = N_Package_Body then
!          Spec :=
!            Specification
!              (Unit_Declaration_Node (Corresponding_Spec (Context)));
  
!          Process_Task_Objects (Visible_Declarations (Spec));
!          Process_Task_Objects (Private_Declarations (Spec));
!          Process_Task_Objects (Declarations (Context));
  
!       --  Process all task objects defined in the spec when the activation call
!       --  appears at the end of a package spec.
  
!       elsif Nkind (Context) = N_Package_Specification then
!          Process_Task_Objects (Visible_Declarations (Context));
!          Process_Task_Objects (Private_Declarations (Context));
  
!       --  Otherwise the context of the activation is some construct with a
!       --  declarative part. Note that the corresponding record type of a task
!       --  type is controlled. Because of this, the finalization machinery must
!       --  relocate the task object to the handled statements of the construct
!       --  to perform proper finalization in case of an exception. Examine the
!       --  statements of the construct rather than the declarations.
  
!       else
!          pragma Assert (Nkind (Context) = N_Handled_Sequence_Of_Statements);
  
!          Process_Task_Objects (Statements (Context));
!       end if;
!    end Process_Activation_Generic;
  
!    ------------------------------------
!    -- Process_Conditional_ABE_Access --
!    ------------------------------------
  
!    procedure Process_Conditional_ABE_Access
!      (Attr  : Node_Id;
!       State : Processing_Attributes)
!    is
!       function Build_Access_Marker (Target_Id : Entity_Id) return Node_Id;
!       pragma Inline (Build_Access_Marker);
!       --  Create a suitable call marker which invokes target Target_Id
  
!       -------------------------
!       -- Build_Access_Marker --
!       -------------------------
  
!       function Build_Access_Marker (Target_Id : Entity_Id) return Node_Id is
!          Marker : Node_Id;
  
        begin
!          Marker := Make_Call_Marker (Sloc (Attr));
  
!          --  Inherit relevant attributes from the attribute
  
!          --  Performance note: parent traversal
  
!          Set_Target (Marker, Target_Id);
!          Set_Is_Declaration_Level_Node
!                     (Marker, Find_Enclosing_Level (Attr) = Declaration_Level);
!          Set_Is_Dispatching_Call
!                     (Marker, False);
!          Set_Is_Elaboration_Checks_OK_Node
!                     (Marker, Is_Elaboration_Checks_OK_Node (Attr));
!          Set_Is_Elaboration_Warnings_OK_Node
!                     (Marker, Is_Elaboration_Warnings_OK_Node (Attr));
!          Set_Is_Source_Call
!                     (Marker, Comes_From_Source (Attr));
!          Set_Is_SPARK_Mode_On_Node
!                     (Marker, Is_SPARK_Mode_On_Node (Attr));
  
!          --  Partially insert the call marker into the tree by setting its
!          --  parent pointer.
  
!          Set_Parent (Marker, Attr);
  
!          return Marker;
!       end Build_Access_Marker;
  
!       --  Local variables
  
!       Root      : constant Node_Id   := Root_Scenario;
!       Target_Id : constant Entity_Id := Entity (Prefix (Attr));
  
!       Target_Attrs : Target_Attributes;
  
!       New_State : Processing_Attributes := State;
!       --  Each step of the Processing phase constitutes a new state
  
!    --  Start of processing for Process_Conditional_ABE_Access
  
     begin
!       --  Output relevant information when switch -gnatel (info messages on
!       --  implicit Elaborate[_All] pragmas) is in effect.
  
!       if Elab_Info_Messages then
!          Error_Msg_NE
!            ("info: access to & during elaboration", Attr, Target_Id);
!       end if;
  
!       Extract_Target_Attributes
!         (Target_Id => Target_Id,
!          Attrs     => Target_Attrs);
  
!       --  Warnings are suppressed when a prior scenario is already in that
!       --  mode, or when the attribute or the target have warnings suppressed.
!       --  Update the state of the Processing phase to reflect this.
  
!       New_State.Suppress_Warnings :=
!         New_State.Suppress_Warnings
!           or else not Is_Elaboration_Warnings_OK_Node (Attr)
!           or else not Target_Attrs.Elab_Warnings_OK;
  
!       --  Do not emit any ABE diagnostics when the current or previous scenario
!       --  in this traversal has suppressed elaboration warnings.
  
!       if New_State.Suppress_Warnings then
!          null;
  
!       --  Both the attribute and the corresponding body are in the same unit.
!       --  The corresponding body must appear prior to the root scenario which
!       --  started the recursive search. If this is not the case, then there is
!       --  a potential ABE if the access value is used to call the subprogram.
!       --  Emit a warning only when switch -gnatw.f (warnings on suspucious
!       --  'Access) is in effect.
  
!       elsif Warn_On_Elab_Access
!         and then Present (Target_Attrs.Body_Decl)
!         and then In_Extended_Main_Code_Unit (Target_Attrs.Body_Decl)
!         and then Earlier_In_Extended_Unit (Root, Target_Attrs.Body_Decl)
        then
!          Error_Msg_Name_1 := Attribute_Name (Attr);
!          Error_Msg_NE ("??% attribute of & before body seen", Attr, Target_Id);
!          Error_Msg_N ("\possible Program_Error on later references", Attr);
  
!          Output_Active_Scenarios (Attr);
        end if;
  
!       --  Treat the attribute as an immediate invocation of the target when
!       --  switch -gnatd.o (conservative elaboration order for indirect calls)
!       --  is in effect. Note that the prior elaboration of the unit containing
!       --  the target is ensured processing the corresponding call marker.
  
!       if Debug_Flag_Dot_O then
!          Process_Conditional_ABE
!            (N     => Build_Access_Marker (Target_Id),
!             State => New_State);
  
!       --  Otherwise ensure that the unit with the corresponding body is
!       --  elaborated prior to the main unit.
  
!       else
!          Ensure_Prior_Elaboration
!            (N        => Attr,
!             Unit_Id  => Target_Attrs.Unit_Id,
!             Prag_Nam => Name_Elaborate_All,
!             State    => New_State);
        end if;
-    end Process_Conditional_ABE_Access;
  
!    ---------------------------------------------
!    -- Process_Conditional_ABE_Activation_Impl --
!    ---------------------------------------------
  
!    procedure Process_Conditional_ABE_Activation_Impl
!      (Call       : Node_Id;
!       Call_Attrs : Call_Attributes;
!       Obj_Id     : Entity_Id;
!       Task_Attrs : Task_Attributes;
!       State      : Processing_Attributes)
     is
!       Check_OK : constant Boolean :=
!                    not Is_Ignored_Ghost_Entity (Obj_Id)
!                      and then not Task_Attrs.Ghost_Mode_Ignore
!                      and then Is_Elaboration_Checks_OK_Id (Obj_Id)
!                      and then Task_Attrs.Elab_Checks_OK;
!       --  A run-time ABE check may be installed only when the object and the
!       --  task type have active elaboration checks, and both are not ignored
!       --  Ghost constructs.
  
!       Root : constant Node_Id := Root_Scenario;
  
!       New_State : Processing_Attributes := State;
!       --  Each step of the Processing phase constitutes a new state
  
     begin
!       --  Output relevant information when switch -gnatel (info messages on
!       --  implicit Elaborate[_All] pragmas) is in effect.
  
!       if Elab_Info_Messages then
!          Error_Msg_NE
!            ("info: activation of & during elaboration", Call, Obj_Id);
        end if;
  
!       --  Nothing to do when the call activates a task whose type is defined
!       --  within an instance and switch -gnatd_i (ignore activations and calls
!       --  to instances for elaboration) is in effect.
  
!       if Debug_Flag_Underscore_I
!         and then In_External_Instance
!                    (N           => Call,
!                     Target_Decl => Task_Attrs.Task_Decl)
!       then
!          return;
  
!       --  Nothing to do when the activation is a guaranteed ABE
  
!       elsif Is_Known_Guaranteed_ABE (Call) then
!          return;
  
!       --  Nothing to do when the root scenario appears at the declaration
!       --  level and the task is in the same unit, but outside this context.
!       --
!       --    task type Task_Typ;                  --  task declaration
!       --
!       --    procedure Proc is
!       --       function A ... is
!       --       begin
!       --          if Some_Condition then
!       --             declare
!       --                T : Task_Typ;
!       --             begin
!       --                <activation call>        --  activation site
!       --             end;
!       --          ...
!       --       end A;
!       --
!       --       X : ... := A;                     --  root scenario
!       --    ...
!       --
!       --    task body Task_Typ is
!       --       ...
!       --    end Task_Typ;
!       --
!       --  In the example above, the context of X is the declarative list of
!       --  Proc. The "elaboration" of X may reach the activation of T whose body
!       --  is defined outside of X's context. The task body is relevant only
!       --  when Proc is invoked, but this happens only in "normal" elaboration,
!       --  therefore the task body must not be considered if this is not the
!       --  case.
  
!       --  Performance note: parent traversal
  
!       elsif Is_Up_Level_Target (Task_Attrs.Task_Decl) then
!          return;
  
!       --  Nothing to do when the activation is ABE-safe
!       --
!       --    generic
!       --    package Gen is
!       --       task type Task_Typ;
!       --    end Gen;
!       --
!       --    package body Gen is
!       --       task body Task_Typ is
!       --       begin
!       --          ...
!       --       end Task_Typ;
!       --    end Gen;
!       --
!       --    with Gen;
!       --    procedure Main is
!       --       package Nested is
!       --          package Inst is new Gen;
!       --          T : Inst.Task_Typ;
!       --          <activation call>              --  safe activation
!       --       end Nested;
!       --    ...
  
!       elsif Is_Safe_Activation (Call, Task_Attrs.Task_Decl) then
  
!          --  Note that the task body must still be examined for any nested
!          --  scenarios.
  
!          null;
  
!       --  The activation call and the task body are both in the main unit
  
!       elsif Present (Task_Attrs.Body_Decl)
!         and then In_Extended_Main_Code_Unit (Task_Attrs.Body_Decl)
!       then
!          --  If the root scenario appears prior to the task body, then this is
!          --  a possible ABE with respect to the root scenario.
!          --
!          --    task type Task_Typ;
!          --
!          --    function A ... is
!          --    begin
!          --       if Some_Condition then
!          --          declare
!          --             package Pack is
!          --                T : Task_Typ;
!          --             end Pack;                --  activation of T
!          --       ...
!          --    end A;
!          --
!          --    X : ... := A;                     --  root scenario
!          --
!          --    task body Task_Typ is             --  task body
!          --       ...
!          --    end Task_Typ;
!          --
!          --    Y : ... := A;                     --  root scenario
!          --
!          --  IMPORTANT: The activation of T is a possible ABE for X, but
!          --  not for Y. Intalling an unconditional ABE raise prior to the
!          --  activation call would be wrong as it will fail for Y as well
!          --  but in Y's case the activation of T is never an ABE.
  
!          if Earlier_In_Extended_Unit (Root, Task_Attrs.Body_Decl) then
  
!             --  Do not emit any ABE diagnostics when a previous scenario in
!             --  this traversal has suppressed elaboration warnings.
  
!             if State.Suppress_Warnings then
!                null;
  
!             --  Do not emit any ABE diagnostics when the activation occurs in
!             --  a partial finalization context because this leads to confusing
!             --  noise.
  
!             elsif State.Within_Partial_Finalization then
!                null;
  
!             --  ABE diagnostics are emitted only in the static model because
!             --  there is a well-defined order to visiting scenarios. Without
!             --  this order diagnostics appear jumbled and result in unwanted
!             --  noise.
  
!             elsif Static_Elaboration_Checks then
!                Error_Msg_Sloc := Sloc (Call);
!                Error_Msg_N
!                  ("??task & will be activated # before elaboration of its "
!                   & "body", Obj_Id);
!                Error_Msg_N
!                  ("\Program_Error may be raised at run time", Obj_Id);
  
!                Output_Active_Scenarios (Obj_Id);
!             end if;
  
!             --  Install a conditional run-time ABE check to verify that the
!             --  task body has been elaborated prior to the activation call.
  
!             if Check_OK then
!                Install_ABE_Check
!                  (N           => Call,
!                   Ins_Nod     => Call,
!                   Target_Id   => Task_Attrs.Spec_Id,
!                   Target_Decl => Task_Attrs.Task_Decl,
!                   Target_Body => Task_Attrs.Body_Decl);
  
!                --  Update the state of the Processing phase to indicate that
!                --  no implicit Elaborate[_All] pragmas must be generated from
!                --  this point on.
!                --
!                --    task type Task_Typ;
!                --
!                --    function A ... is
!                --    begin
!                --       if Some_Condition then
!                --          declare
!                --             package Pack is
!                --                <ABE check>
!                --                T : Task_Typ;
!                --             end Pack;          --  activation of T
!                --       ...
!                --    end A;
!                --
!                --    X : ... := A;
!                --
!                --    task body Task_Typ is
!                --    begin
!                --       External.Subp;           --  imparts Elaborate_All
!                --    end Task_Typ;
!                --
!                --  If Some_Condition is True, then the ABE check will fail at
!                --  runtime and the call to External.Subp will never take place,
!                --  rendering the implicit Elaborate_All useless.
!                --
!                --  If Some_Condition is False, then the call to External.Subp
!                --  will never take place, rendering the implicit Elaborate_All
!                --  useless.
  
!                New_State.Suppress_Implicit_Pragmas := True;
!             end if;
           end if;
  
!       --  Otherwise the task body is not available in this compilation or it
!       --  resides in an external unit. Install a run-time ABE check to verify
!       --  that the task body has been elaborated prior to the activation call
!       --  when the dynamic model is in effect.
  
!       elsif Dynamic_Elaboration_Checks and then Check_OK then
!          Install_ABE_Check
!            (N       => Call,
!             Ins_Nod => Call,
!             Id      => Task_Attrs.Unit_Id);
!       end if;
  
!       --  Both the activation call and task type are subject to SPARK_Mode
!       --  On, this triggers the SPARK rules for task activation. Compared to
!       --  calls and instantiations, task activation in SPARK does not require
!       --  the presence of Elaborate[_All] pragmas in case the task type is
!       --  defined outside the main unit. This is because SPARK utilizes a
!       --  special policy which activates all tasks after the main unit has
!       --  finished its elaboration.
  
!       if Call_Attrs.SPARK_Mode_On and Task_Attrs.SPARK_Mode_On then
!          null;
  
!       --  Otherwise the Ada rules are in effect. Ensure that the unit with the
!       --  task body is elaborated prior to the main unit.
  
!       else
!          Ensure_Prior_Elaboration
             (N        => Call,
!             Unit_Id  => Task_Attrs.Unit_Id,
!             Prag_Nam => Name_Elaborate_All,
!             State    => New_State);
!       end if;
  
!       Traverse_Body
!         (N     => Task_Attrs.Body_Decl,
!          State => New_State);
!    end Process_Conditional_ABE_Activation_Impl;
  
!    procedure Process_Conditional_ABE_Activation is
!      new Process_Activation_Generic (Process_Conditional_ABE_Activation_Impl);
  
!    ----------------------------------
!    -- Process_Conditional_ABE_Call --
!    ----------------------------------
  
!    procedure Process_Conditional_ABE_Call
!      (Call       : Node_Id;
!       Call_Attrs : Call_Attributes;
!       Target_Id  : Entity_Id;
!       State      : Processing_Attributes)
!    is
!       function In_Initialization_Context (N : Node_Id) return Boolean;
!       --  Determine whether arbitrary node N appears within a type init proc,
!       --  primitive [Deep_]Initialize, or a block created for initialization
!       --  purposes.
  
!       function Is_Partial_Finalization_Proc return Boolean;
!       pragma Inline (Is_Partial_Finalization_Proc);
!       --  Determine whether call Call with target Target_Id invokes a partial
!       --  finalization procedure.
  
!       -------------------------------
!       -- In_Initialization_Context --
!       -------------------------------
  
!       function In_Initialization_Context (N : Node_Id) return Boolean is
!          Par     : Node_Id;
!          Spec_Id : Entity_Id;
  
        begin
!          --  Climb the parent chain looking for initialization actions
  
!          Par := Parent (N);
!          while Present (Par) loop
  
!             --  A block may be part of the initialization actions of a default
!             --  initialized object.
  
!             if Nkind (Par) = N_Block_Statement
!               and then Is_Initialization_Block (Par)
!             then
!                return True;
  
!             --  A subprogram body may denote an initialization routine
  
!             elsif Nkind (Par) = N_Subprogram_Body then
!                Spec_Id := Unique_Defining_Entity (Par);
  
!                --  The current subprogram body denotes a type init proc or
!                --  primitive [Deep_]Initialize.
  
!                if Is_Init_Proc (Spec_Id)
!                  or else Is_Controlled_Proc (Spec_Id, Name_Initialize)
!                  or else Is_TSS (Spec_Id, TSS_Deep_Initialize)
!                then
!                   return True;
!                end if;
  
!             --  Prevent the search from going too far
  
!             elsif Is_Body_Or_Package_Declaration (Par) then
!                exit;
!             end if;
  
!             Par := Parent (Par);
!          end loop;
  
!          return False;
!       end In_Initialization_Context;
  
!       ----------------------------------
!       -- Is_Partial_Finalization_Proc --
!       ----------------------------------
  
!       function Is_Partial_Finalization_Proc return Boolean is
        begin
!          --  To qualify, the target must denote primitive [Deep_]Finalize or a
!          --  finalizer procedure, and the call must appear in an initialization
!          --  context.
  
!          return
!            (Is_Controlled_Proc (Target_Id, Name_Finalize)
!               or else Is_Finalizer_Proc (Target_Id)
!               or else Is_TSS (Target_Id, TSS_Deep_Finalize))
!             and then In_Initialization_Context (Call);
!       end Is_Partial_Finalization_Proc;
  
!       --  Local variables
  
!       SPARK_Rules_On : Boolean;
!       Target_Attrs   : Target_Attributes;
  
!       New_State : Processing_Attributes := State;
!       --  Each step of the Processing phase constitutes a new state
  
!    --  Start of processing for Process_Conditional_ABE_Call
  
!    begin
!       Extract_Target_Attributes
!         (Target_Id => Target_Id,
!          Attrs     => Target_Attrs);
  
!       --  The SPARK rules are in effect when both the call and target are
!       --  subject to SPARK_Mode On.
  
!       SPARK_Rules_On :=
!         Call_Attrs.SPARK_Mode_On and Target_Attrs.SPARK_Mode_On;
  
!       --  Output relevant information when switch -gnatel (info messages on
!       --  implicit Elaborate[_All] pragmas) is in effect.
  
!       if Elab_Info_Messages then
!          Info_Call
!            (Call      => Call,
!             Target_Id => Target_Id,
!             Info_Msg  => True,
!             In_SPARK  => SPARK_Rules_On);
!       end if;
  
!       --  Check whether the invocation of an entry clashes with an existing
!       --  restriction.
  
!       if Is_Protected_Entry (Target_Id) then
!          Check_Restriction (No_Entry_Calls_In_Elaboration_Code, Call);
  
!       elsif Is_Task_Entry (Target_Id) then
!          Check_Restriction (No_Entry_Calls_In_Elaboration_Code, Call);
  
!          --  Task entry calls are never processed because the entry being
!          --  invoked does not have a corresponding "body", it has a select.
  
           return;
-       end if;
  
!       --  Nothing to do when the call invokes a target defined within an
!       --  instance and switch -gnatd_i (ignore activations and calls to
!       --  instances for elaboration) is in effect.
  
!       if Debug_Flag_Underscore_I
!         and then In_External_Instance
!                    (N           => Call,
!                     Target_Decl => Target_Attrs.Spec_Decl)
!       then
           return;
  
!       --  Nothing to do when the call is a guaranteed ABE
  
!       elsif Is_Known_Guaranteed_ABE (Call) then
!          return;
  
!       --  Nothing to do when the root scenario appears at the declaration level
!       --  and the target is in the same unit, but outside this context.
!       --
!       --    function B ...;                      --  target declaration
!       --
!       --    procedure Proc is
!       --       function A ... is
!       --       begin
!       --          if Some_Condition then
!       --             return B;                   --  call site
!       --          ...
!       --       end A;
!       --
!       --       X : ... := A;                     --  root scenario
!       --    ...
!       --
!       --    function B ... is
!       --       ...
!       --    end B;
!       --
!       --  In the example above, the context of X is the declarative region of
!       --  Proc. The "elaboration" of X may eventually reach B which is defined
!       --  outside of X's context. B is relevant only when Proc is invoked, but
!       --  this happens only by means of "normal" elaboration, therefore B must
!       --  not be considered if this is not the case.
  
!       --  Performance note: parent traversal
  
!       elsif Is_Up_Level_Target (Target_Attrs.Spec_Decl) then
           return;
-       end if;
  
!       --  Warnings are suppressed when a prior scenario is already in that
!       --  mode, or the call or target have warnings suppressed. Update the
!       --  state of the Processing phase to reflect this.
  
!       New_State.Suppress_Warnings :=
!         New_State.Suppress_Warnings
!           or else not Call_Attrs.Elab_Warnings_OK
!           or else not Target_Attrs.Elab_Warnings_OK;
  
!       --  The call occurs in an initial condition context when a prior scenario
!       --  is already in that mode, or when the target is an Initial_Condition
!       --  procedure. Update the state of the Processing phase to reflect this.
  
!       New_State.Within_Initial_Condition :=
!         New_State.Within_Initial_Condition
!           or else Is_Initial_Condition_Proc (Target_Id);
  
!       --  The call occurs in a partial finalization context when a prior
!       --  scenario is already in that mode, or when the target denotes a
!       --  [Deep_]Finalize primitive or a finalizer within an initialization
!       --  context. Update the state of the Processing phase to reflect this.
  
!       New_State.Within_Partial_Finalization :=
!         New_State.Within_Partial_Finalization
!           or else Is_Partial_Finalization_Proc;
  
!       --  The SPARK rules are in effect. Note that -gnatd.v (enforce SPARK
!       --  elaboration rules in SPARK code) is intentionally not taken into
!       --  account here because Process_Conditional_ABE_Call_SPARK has two
!       --  separate modes of operation.
  
!       if SPARK_Rules_On then
!          Process_Conditional_ABE_Call_SPARK
!            (Call         => Call,
!             Target_Id    => Target_Id,
!             Target_Attrs => Target_Attrs,
!             State        => New_State);
  
!       --  Otherwise the Ada rules are in effect
  
!       else
!          Process_Conditional_ABE_Call_Ada
!            (Call         => Call,
!             Call_Attrs   => Call_Attrs,
!             Target_Id    => Target_Id,
!             Target_Attrs => Target_Attrs,
!             State        => New_State);
!       end if;
  
!       --  Inspect the target body (and barried function) for other suitable
!       --  elaboration scenarios.
  
!       Traverse_Body
!         (N     => Target_Attrs.Body_Barf,
!          State => New_State);
  
!       Traverse_Body
!         (N     => Target_Attrs.Body_Decl,
!          State => New_State);
!    end Process_Conditional_ABE_Call;
  
!    --------------------------------------
!    -- Process_Conditional_ABE_Call_Ada --
!    --------------------------------------
  
!    procedure Process_Conditional_ABE_Call_Ada
!      (Call         : Node_Id;
!       Call_Attrs   : Call_Attributes;
!       Target_Id    : Entity_Id;
!       Target_Attrs : Target_Attributes;
!       State        : Processing_Attributes)
!    is
!       Check_OK : constant Boolean :=
!                    not Call_Attrs.Ghost_Mode_Ignore
!                      and then not Target_Attrs.Ghost_Mode_Ignore
!                      and then Call_Attrs.Elab_Checks_OK
!                      and then Target_Attrs.Elab_Checks_OK;
!       --  A run-time ABE check may be installed only when both the call and the
!       --  target have active elaboration checks, and both are not ignored Ghost
!       --  constructs.
  
!       Root : constant Node_Id := Root_Scenario;
  
!       New_State : Processing_Attributes := State;
!       --  Each step of the Processing phase constitutes a new state
  
     begin
!       --  Nothing to do for an Ada dispatching call because there are no ABE
!       --  diagnostics for either models. ABE checks for the dynamic model are
!       --  handled by Install_Primitive_Elaboration_Check.
  
!       if Call_Attrs.Is_Dispatching then
!          return;
  
!       --  Nothing to do when the call is ABE-safe
!       --
!       --    generic
!       --    function Gen ...;
!       --
!       --    function Gen ... is
!       --    begin
!       --       ...
!       --    end Gen;
!       --
!       --    with Gen;
!       --    procedure Main is
!       --       function Inst is new Gen;
!       --       X : ... := Inst;                  --  safe call
!       --    ...
  
!       elsif Is_Safe_Call (Call, Target_Attrs) then
!          return;
  
!       --  The call and the target body are both in the main unit
  
!       elsif Present (Target_Attrs.Body_Decl)
!         and then In_Extended_Main_Code_Unit (Target_Attrs.Body_Decl)
!       then
!          --  If the root scenario appears prior to the target body, then this
!          --  is a possible ABE with respect to the root scenario.
!          --
!          --    function B ...;
!          --
!          --    function A ... is
!          --    begin
!          --       if Some_Condition then
!          --          return B;                      --  call site
!          --       ...
!          --    end A;
!          --
!          --    X : ... := A;                        --  root scenario
!          --
!          --    function B ... is                    --  target body
!          --       ...
!          --    end B;
!          --
!          --    Y : ... := A;                        --  root scenario
!          --
!          --  IMPORTANT: The call to B from A is a possible ABE for X, but not
!          --  for Y. Installing an unconditional ABE raise prior to the call to
!          --  B would be wrong as it will fail for Y as well, but in Y's case
!          --  the call to B is never an ABE.
  
!          if Earlier_In_Extended_Unit (Root, Target_Attrs.Body_Decl) then
  
!             --  Do not emit any ABE diagnostics when a previous scenario in
!             --  this traversal has suppressed elaboration warnings.
  
!             if State.Suppress_Warnings then
!                null;
  
!             --  Do not emit any ABE diagnostics when the call occurs in a
!             --  partial finalization context because this leads to confusing
!             --  noise.
  
!             elsif State.Within_Partial_Finalization then
!                null;
  
!             --  ABE diagnostics are emitted only in the static model because
!             --  there is a well-defined order to visiting scenarios. Without
!             --  this order diagnostics appear jumbled and result in unwanted
!             --  noise.
  
!             elsif Static_Elaboration_Checks then
!                Error_Msg_NE
!                  ("??cannot call & before body seen", Call, Target_Id);
!                Error_Msg_N ("\Program_Error may be raised at run time", Call);
  
!                Output_Active_Scenarios (Call);
!             end if;
  
!             --  Install a conditional run-time ABE check to verify that the
!             --  target body has been elaborated prior to the call.
  
!             if Check_OK then
!                Install_ABE_Check
!                  (N           => Call,
!                   Ins_Nod     => Call,
!                   Target_Id   => Target_Attrs.Spec_Id,
!                   Target_Decl => Target_Attrs.Spec_Decl,
!                   Target_Body => Target_Attrs.Body_Decl);
  
!                --  Update the state of the Processing phase to indicate that
!                --  no implicit Elaborate[_All] pragmas must be generated from
!                --  this point on.
!                --
!                --    function B ...;
!                --
!                --    function A ... is
!                --    begin
!                --       if Some_Condition then
!                --          <ABE check>
!                --          return B;
!                --       ...
!                --    end A;
!                --
!                --    X : ... := A;
!                --
!                --    function B ... is
!                --       External.Subp;           --  imparts Elaborate_All
!                --    end B;
!                --
!                --  If Some_Condition is True, then the ABE check will fail at
!                --  runtime and the call to External.Subp will never take place,
!                --  rendering the implicit Elaborate_All useless.
!                --
!                --  If Some_Condition is False, then the call to External.Subp
!                --  will never take place, rendering the implicit Elaborate_All
!                --  useless.
  
!                New_State.Suppress_Implicit_Pragmas := True;
!             end if;
           end if;
  
!       --  Otherwise the target body is not available in this compilation or it
!       --  resides in an external unit. Install a run-time ABE check to verify
!       --  that the target body has been elaborated prior to the call site when
!       --  the dynamic model is in effect.
  
!       elsif Dynamic_Elaboration_Checks and then Check_OK then
!          Install_ABE_Check
!            (N       => Call,
!             Ins_Nod => Call,
!             Id      => Target_Attrs.Unit_Id);
!       end if;
  
!       --  Ensure that the unit with the target body is elaborated prior to the
!       --  main unit. The implicit Elaborate[_All] is generated only when the
!       --  call has elaboration checks enabled. This behaviour parallels that of
!       --  the old ABE mechanism.
  
!       if Call_Attrs.Elab_Checks_OK then
!          Ensure_Prior_Elaboration
!            (N        => Call,
!             Unit_Id  => Target_Attrs.Unit_Id,
!             Prag_Nam => Name_Elaborate_All,
!             State    => New_State);
!       end if;
!    end Process_Conditional_ABE_Call_Ada;
  
!    ----------------------------------------
!    -- Process_Conditional_ABE_Call_SPARK --
!    ----------------------------------------
  
!    procedure Process_Conditional_ABE_Call_SPARK
!      (Call         : Node_Id;
!       Target_Id    : Entity_Id;
!       Target_Attrs : Target_Attributes;
!       State        : Processing_Attributes)
!    is
!       Region : Node_Id;
  
!    begin
!       --  Ensure that a suitable elaboration model is in effect for SPARK rule
!       --  verification.
  
!       Check_SPARK_Model_In_Effect (Call);
  
!       --  The call and the target body are both in the main unit
  
!       if Present (Target_Attrs.Body_Decl)
!         and then In_Extended_Main_Code_Unit (Target_Attrs.Body_Decl)
!       then
!          --  If the call appears prior to the target body, then the call must
!          --  appear within the early call region of the target body.
!          --
!          --    function B ...;
!          --
!          --    X : ... := B;                     --  call site
!          --
!          --    <preelaborable construct 1>       --+
!          --               ...                      | early call region
!          --    <preelaborable construct N>       --+
!          --
!          --    function B ... is                 --  target body
!          --       ...
!          --    end B;
!          --
!          --  When the call to B is not nested within some other scenario, the
!          --  call is automatically illegal because it can never appear in the
!          --  early call region of B's body. This is equivalent to a guaranteed
!          --  ABE.
!          --
!          --    <preelaborable construct 1>       --+
!          --                                        |
!          --    function B ...;                     |
!          --                                        |
!          --    function A ... is                   |
!          --    begin                               | early call region
!          --       if Some_Condition then
!          --          return B;                   --  call site
!          --       ...
!          --    end A;                              |
!          --                                        |
!          --    <preelaborable construct N>       --+
!          --
!          --    function B ... is                 --  target body
!          --       ...
!          --    end B;
!          --
!          --  When the call to B is nested within some other scenario, the call
!          --  is always ABE-safe. It is not immediately obvious why this is the
!          --  case. The elaboration safety follows from the early call region
!          --  rule being applied to ALL calls preceding their associated bodies.
!          --
!          --  In the example above, the call to B is safe as long as the call to
!          --  A is safe. There are several cases to consider:
!          --
!          --    <call 1 to A>
!          --    function B ...;
!          --
!          --    <call 2 to A>
!          --    function A ... is
!          --    begin
!          --       if Some_Condition then
!          --          return B;
!          --       ...
!          --    end A;
!          --
!          --    <call 3 to A>
!          --    function B ... is
!          --       ...
!          --    end B;
!          --
!          --  * Call 1 - This call is either nested within some scenario or not,
!          --    which falls under the two general cases outlined above.
!          --
!          --  * Call 2 - This is the same case as Call 1.
!          --
!          --  * Call 3 - The placement of this call limits the range of B's
!          --    early call region unto call 3, therefore the call to B is no
!          --    longer within the early call region of B's body, making it ABE-
!          --    unsafe and therefore illegal.
  
!          if Earlier_In_Extended_Unit (Call, Target_Attrs.Body_Decl) then
  
!             --  Do not emit any ABE diagnostics when a previous scenario in
!             --  this traversal has suppressed elaboration warnings.
  
!             if State.Suppress_Warnings then
!                null;
  
!             --  Do not emit any ABE diagnostics when the call occurs in an
!             --  initial condition context because this leads to incorrect
!             --  diagnostics.
  
!             elsif State.Within_Initial_Condition then
!                null;
  
!             --  Do not emit any ABE diagnostics when the call occurs in a
!             --  partial finalization context because this leads to confusing
!             --  noise.
  
!             elsif State.Within_Partial_Finalization then
!                null;
  
!             --  ABE diagnostics are emitted only in the static model because
!             --  there is a well-defined order to visiting scenarios. Without
!             --  this order diagnostics appear jumbled and result in unwanted
!             --  noise.
  
!             elsif Static_Elaboration_Checks then
  
!                --  Ensure that a call which textually precedes the subprogram
!                --  body it invokes appears within the early call region of the
!                --  subprogram body.
  
!                --  IMPORTANT: This check must always be performed even when
!                --  -gnatd.v (enforce SPARK elaboration rules in SPARK code) is
!                --  not specified because the static model cannot guarantee the
!                --  absence of elaboration issues in the presence of dispatching
!                --  calls.
  
!                Region := Find_Early_Call_Region (Target_Attrs.Body_Decl);
  
!                if Earlier_In_Extended_Unit (Call, Region) then
!                   Error_Msg_NE
!                     ("call must appear within early call region of subprogram "
!                      & "body & (SPARK RM 7.7(3))", Call, Target_Id);
  
!                   Error_Msg_Sloc := Sloc (Region);
!                   Error_Msg_N ("\region starts #", Call);
  
!                   Error_Msg_Sloc := Sloc (Target_Attrs.Body_Decl);
!                   Error_Msg_N ("\region ends #", Call);
  
!                   Output_Active_Scenarios (Call);
!                end if;
              end if;
  
!          --  Otherwise the call appears after the target body. The call is
!          --  ABE-safe as a consequence of applying the early call region rule
!          --  to ALL calls preceding their associated bodies.
! 
!          else
!             null;
!          end if;
!       end if;
  
!       --  A call to a source target or to a target which emulates Ada or SPARK
!       --  semantics imposes an Elaborate_All requirement on the context of the
!       --  main unit. Determine whether the context has a pragma strong enough
!       --  to meet the requirement.
  
!       --  IMPORTANT: This check must be performed only when -gnatd.v (enforce
!       --  SPARK elaboration rules in SPARK code) is active because the static
!       --  model can ensure the prior elaboration of the unit which contains a
!       --  body by installing an implicit Elaborate[_All] pragma.
  
!       if Debug_Flag_Dot_V then
!          if Target_Attrs.From_Source
!            or else Is_Ada_Semantic_Target (Target_Id)
!            or else Is_SPARK_Semantic_Target (Target_Id)
!          then
!             Meet_Elaboration_Requirement
!               (N         => Call,
!                Target_Id => Target_Id,
!                Req_Nam   => Name_Elaborate_All);
!          end if;
  
!       --  Otherwise ensure that the unit with the target body is elaborated
!       --  prior to the main unit.
  
!       else
!          Ensure_Prior_Elaboration
!            (N        => Call,
!             Unit_Id  => Target_Attrs.Unit_Id,
!             Prag_Nam => Name_Elaborate_All,
!             State    => State);
!       end if;
!    end Process_Conditional_ABE_Call_SPARK;
  
!    -------------------------------------------
!    -- Process_Conditional_ABE_Instantiation --
!    -------------------------------------------
  
!    procedure Process_Conditional_ABE_Instantiation
!      (Exp_Inst : Node_Id;
!       State    : Processing_Attributes)
!    is
!       Gen_Attrs  : Target_Attributes;
!       Gen_Id     : Entity_Id;
!       Inst       : Node_Id;
!       Inst_Attrs : Instantiation_Attributes;
!       Inst_Id    : Entity_Id;
  
!       SPARK_Rules_On : Boolean;
!       --  This flag is set when the SPARK rules are in effect
  
!       New_State : Processing_Attributes := State;
!       --  Each step of the Processing phase constitutes a new state
  
!    begin
!       Extract_Instantiation_Attributes
!         (Exp_Inst => Exp_Inst,
!          Inst     => Inst,
!          Inst_Id  => Inst_Id,
!          Gen_Id   => Gen_Id,
!          Attrs    => Inst_Attrs);
  
!       Extract_Target_Attributes (Gen_Id, Gen_Attrs);
  
!       --  The SPARK rules are in effect when both the instantiation and generic
!       --  are subject to SPARK_Mode On.
  
!       SPARK_Rules_On := Inst_Attrs.SPARK_Mode_On and Gen_Attrs.SPARK_Mode_On;
  
!       --  Output relevant information when switch -gnatel (info messages on
!       --  implicit Elaborate[_All] pragmas) is in effect.
  
!       if Elab_Info_Messages then
!          Info_Instantiation
!            (Inst     => Inst,
!             Gen_Id   => Gen_Id,
!             Info_Msg => True,
!             In_SPARK => SPARK_Rules_On);
!       end if;
  
!       --  Nothing to do when the instantiation is a guaranteed ABE
  
!       if Is_Known_Guaranteed_ABE (Inst) then
!          return;
  
!       --  Nothing to do when the root scenario appears at the declaration level
!       --  and the generic is in the same unit, but outside this context.
!       --
!       --    generic
!       --    procedure Gen is ...;                --  generic declaration
!       --
!       --    procedure Proc is
!       --       function A ... is
!       --       begin
!       --          if Some_Condition then
!       --             declare
!       --                procedure I is new Gen;  --  instantiation site
!       --             ...
!       --          ...
!       --       end A;
!       --
!       --       X : ... := A;                     --  root scenario
!       --    ...
!       --
!       --    procedure Gen is
!       --       ...
!       --    end Gen;
!       --
!       --  In the example above, the context of X is the declarative region of
!       --  Proc. The "elaboration" of X may eventually reach Gen which appears
!       --  outside of X's context. Gen is relevant only when Proc is invoked,
!       --  but this happens only by means of "normal" elaboration, therefore
!       --  Gen must not be considered if this is not the case.
  
!       --  Performance note: parent traversal
  
!       elsif Is_Up_Level_Target (Gen_Attrs.Spec_Decl) then
!          return;
!       end if;
  
!       --  Warnings are suppressed when a prior scenario is already in that
!       --  mode, or when the instantiation has warnings suppressed. Update
!       --  the state of the processing phase to reflect this.
  
!       New_State.Suppress_Warnings :=
!         New_State.Suppress_Warnings or else not Inst_Attrs.Elab_Warnings_OK;
  
!       --  The SPARK rules are in effect
  
!       if SPARK_Rules_On then
!          Process_Conditional_ABE_Instantiation_SPARK
!            (Inst      => Inst,
!             Gen_Id    => Gen_Id,
!             Gen_Attrs => Gen_Attrs,
!             State     => New_State);
  
!       --  Otherwise the Ada rules are in effect, or SPARK code is allowed to
!       --  violate the SPARK rules.
  
!       else
!          Process_Conditional_ABE_Instantiation_Ada
!            (Exp_Inst   => Exp_Inst,
!             Inst       => Inst,
!             Inst_Attrs => Inst_Attrs,
!             Gen_Id     => Gen_Id,
!             Gen_Attrs  => Gen_Attrs,
!             State      => New_State);
!       end if;
!    end Process_Conditional_ABE_Instantiation;
  
!    -----------------------------------------------
!    -- Process_Conditional_ABE_Instantiation_Ada --
!    -----------------------------------------------
  
!    procedure Process_Conditional_ABE_Instantiation_Ada
!      (Exp_Inst   : Node_Id;
!       Inst       : Node_Id;
!       Inst_Attrs : Instantiation_Attributes;
!       Gen_Id     : Entity_Id;
!       Gen_Attrs  : Target_Attributes;
!       State      : Processing_Attributes)
!    is
!       Check_OK : constant Boolean :=
!                    not Inst_Attrs.Ghost_Mode_Ignore
!                      and then not Gen_Attrs.Ghost_Mode_Ignore
!                      and then Inst_Attrs.Elab_Checks_OK
!                      and then Gen_Attrs.Elab_Checks_OK;
!       --  A run-time ABE check may be installed only when both the instance and
!       --  the generic have active elaboration checks and both are not ignored
!       --  Ghost constructs.
  
!       Root : constant Node_Id := Root_Scenario;
  
!       New_State : Processing_Attributes := State;
!       --  Each step of the Processing phase constitutes a new state
  
!    begin
!       --  Nothing to do when the instantiation is ABE-safe
!       --
!       --    generic
!       --    package Gen is
!       --       ...
!       --    end Gen;
!       --
!       --    package body Gen is
!       --       ...
!       --    end Gen;
!       --
!       --    with Gen;
!       --    procedure Main is
!       --       package Inst is new Gen (ABE);    --  safe instantiation
!       --    ...
  
!       if Is_Safe_Instantiation (Inst, Gen_Attrs) then
!          return;
  
!       --  The instantiation and the generic body are both in the main unit
  
!       elsif Present (Gen_Attrs.Body_Decl)
!         and then In_Extended_Main_Code_Unit (Gen_Attrs.Body_Decl)
!       then
!          --  If the root scenario appears prior to the generic body, then this
!          --  is a possible ABE with respect to the root scenario.
!          --
!          --    generic
!          --    package Gen is
!          --       ...
!          --    end Gen;
!          --
!          --    function A ... is
!          --    begin
!          --       if Some_Condition then
!          --          declare
!          --             package Inst is new Gen;    --  instantiation site
!          --       ...
!          --    end A;
!          --
!          --    X : ... := A;                        --  root scenario
!          --
!          --    package body Gen is                  --  generic body
!          --       ...
!          --    end Gen;
!          --
!          --    Y : ... := A;                        --  root scenario
!          --
!          --  IMPORTANT: The instantiation of Gen is a possible ABE for X, but
!          --  not for Y. Installing an unconditional ABE raise prior to the
!          --  instance site would be wrong as it will fail for Y as well, but in
!          --  Y's case the instantiation of Gen is never an ABE.
  
!          if Earlier_In_Extended_Unit (Root, Gen_Attrs.Body_Decl) then
  
!             --  Do not emit any ABE diagnostics when a previous scenario in
!             --  this traversal has suppressed elaboration warnings.
  
!             if State.Suppress_Warnings then
!                null;
  
!             --  Do not emit any ABE diagnostics when the instantiation occurs
!             --  in partial finalization context because this leads to unwanted
!             --  noise.
  
!             elsif State.Within_Partial_Finalization then
!                null;
  
!             --  ABE diagnostics are emitted only in the static model because
!             --  there is a well-defined order to visiting scenarios. Without
!             --  this order diagnostics appear jumbled and result in unwanted
!             --  noise.
  
!             elsif Static_Elaboration_Checks then
!                Error_Msg_NE
!                  ("??cannot instantiate & before body seen", Inst, Gen_Id);
!                Error_Msg_N ("\Program_Error may be raised at run time", Inst);
  
!                Output_Active_Scenarios (Inst);
!             end if;
  
!             --  Install a conditional run-time ABE check to verify that the
!             --  generic body has been elaborated prior to the instantiation.
  
!             if Check_OK then
!                Install_ABE_Check
!                  (N           => Inst,
!                   Ins_Nod     => Exp_Inst,
!                   Target_Id   => Gen_Attrs.Spec_Id,
!                   Target_Decl => Gen_Attrs.Spec_Decl,
!                   Target_Body => Gen_Attrs.Body_Decl);
  
!                --  Update the state of the Processing phase to indicate that
!                --  no implicit Elaborate[_All] pragmas must be generated from
!                --  this point on.
!                --
!                --    generic
!                --    package Gen is
!                --       ...
!                --    end Gen;
!                --
!                --    function A ... is
!                --    begin
!                --       if Some_Condition then
!                --          <ABE check>
!                --          declare Inst is new Gen;
!                --       ...
!                --    end A;
!                --
!                --    X : ... := A;
!                --
!                --    package body Gen is
!                --    begin
!                --       External.Subp;           --  imparts Elaborate_All
!                --    end Gen;
!                --
!                --  If Some_Condition is True, then the ABE check will fail at
!                --  runtime and the call to External.Subp will never take place,
!                --  rendering the implicit Elaborate_All useless.
!                --
!                --  If Some_Condition is False, then the call to External.Subp
!                --  will never take place, rendering the implicit Elaborate_All
!                --  useless.
  
!                New_State.Suppress_Implicit_Pragmas := True;
!             end if;
!          end if;
  
!       --  Otherwise the generic body is not available in this compilation or it
!       --  resides in an external unit. Install a run-time ABE check to verify
!       --  that the generic body has been elaborated prior to the instantiation
!       --  when the dynamic model is in effect.
  
!       elsif Dynamic_Elaboration_Checks and then Check_OK then
!          Install_ABE_Check
!            (N       => Inst,
!             Ins_Nod => Exp_Inst,
!             Id      => Gen_Attrs.Unit_Id);
!       end if;
  
!       --  Ensure that the unit with the generic body is elaborated prior to
!       --  the main unit. No implicit pragma is generated if the instantiation
!       --  has elaboration checks suppressed. This behaviour parallels that of
!       --  the old ABE mechanism.
  
!       if Inst_Attrs.Elab_Checks_OK then
!          Ensure_Prior_Elaboration
!            (N        => Inst,
!             Unit_Id  => Gen_Attrs.Unit_Id,
!             Prag_Nam => Name_Elaborate,
!             State    => New_State);
!       end if;
!    end Process_Conditional_ABE_Instantiation_Ada;
  
!    -------------------------------------------------
!    -- Process_Conditional_ABE_Instantiation_SPARK --
!    -------------------------------------------------
  
!    procedure Process_Conditional_ABE_Instantiation_SPARK
!      (Inst      : Node_Id;
!       Gen_Id    : Entity_Id;
!       Gen_Attrs : Target_Attributes;
!       State     : Processing_Attributes)
!    is
!       Req_Nam : Name_Id;
  
!    begin
!       --  Ensure that a suitable elaboration model is in effect for SPARK rule
!       --  verification.
  
!       Check_SPARK_Model_In_Effect (Inst);
  
!       --  A source instantiation imposes an Elaborate[_All] requirement on the
!       --  context of the main unit. Determine whether the context has a pragma
!       --  strong enough to meet the requirement. The check is orthogonal to the
!       --  ABE ramifications of the instantiation.
  
!       --  IMPORTANT: This check must be performed only when -gnatd.v (enforce
!       --  SPARK elaboration rules in SPARK code) is active because the static
!       --  model can ensure the prior elaboration of the unit which contains a
!       --  body by installing an implicit Elaborate[_All] pragma.
  
!       if Debug_Flag_Dot_V then
!          if Nkind (Inst) = N_Package_Instantiation then
!             Req_Nam := Name_Elaborate_All;
!          else
!             Req_Nam := Name_Elaborate;
!          end if;
  
!          Meet_Elaboration_Requirement
!            (N         => Inst,
!             Target_Id => Gen_Id,
!             Req_Nam   => Req_Nam);
  
!       --  Otherwise ensure that the unit with the target body is elaborated
!       --  prior to the main unit.
  
!       else
!          Ensure_Prior_Elaboration
!            (N        => Inst,
!             Unit_Id  => Gen_Attrs.Unit_Id,
!             Prag_Nam => Name_Elaborate,
!             State    => State);
!       end if;
!    end Process_Conditional_ABE_Instantiation_SPARK;
  
!    -------------------------------------------------
!    -- Process_Conditional_ABE_Variable_Assignment --
!    -------------------------------------------------
  
!    procedure Process_Conditional_ABE_Variable_Assignment (Asmt : Node_Id) is
!       Var_Id : constant Entity_Id := Entity (Extract_Assignment_Name (Asmt));
!       Prag   : constant Node_Id   := SPARK_Pragma (Var_Id);
  
!       SPARK_Rules_On : Boolean;
!       --  This flag is set when the SPARK rules are in effect
  
!    begin
!       --  The SPARK rules are in effect when both the assignment and the
!       --  variable are subject to SPARK_Mode On.
  
!       SPARK_Rules_On :=
!         Present (Prag)
!           and then Get_SPARK_Mode_From_Annotation (Prag) = On
!           and then Is_SPARK_Mode_On_Node (Asmt);
  
!       --  Output relevant information when switch -gnatel (info messages on
!       --  implicit Elaborate[_All] pragmas) is in effect.
  
!       if Elab_Info_Messages then
!          Elab_Msg_NE
!            (Msg      => "assignment to & during elaboration",
!             N        => Asmt,
!             Id       => Var_Id,
!             Info_Msg => True,
!             In_SPARK => SPARK_Rules_On);
!       end if;
  
!       --  The SPARK rules are in effect. These rules are applied regardless of
!       --  whether -gnatd.v (enforce SPARK elaboration rules in SPARK code) is
!       --  in effect because the static model cannot ensure safe assignment of
!       --  variables.
  
!       if SPARK_Rules_On then
!          Process_Conditional_ABE_Variable_Assignment_SPARK
!            (Asmt   => Asmt,
!             Var_Id => Var_Id);
  
!       --  Otherwise the Ada rules are in effect
  
!       else
!          Process_Conditional_ABE_Variable_Assignment_Ada
!            (Asmt   => Asmt,
!             Var_Id => Var_Id);
!       end if;
!    end Process_Conditional_ABE_Variable_Assignment;
  
!    -----------------------------------------------------
!    -- Process_Conditional_ABE_Variable_Assignment_Ada --
!    -----------------------------------------------------
  
!    procedure Process_Conditional_ABE_Variable_Assignment_Ada
!      (Asmt   : Node_Id;
!       Var_Id : Entity_Id)
!    is
!       Var_Decl : constant Node_Id   := Declaration_Node (Var_Id);
!       Spec_Id  : constant Entity_Id := Find_Top_Unit (Var_Decl);
  
!    begin
!       --  Emit a warning when an uninitialized variable declared in a package
!       --  spec without a pragma Elaborate_Body is initialized by elaboration
!       --  code within the corresponding body.
  
!       if Is_Elaboration_Warnings_OK_Id (Var_Id)
!         and then not Is_Initialized (Var_Decl)
!         and then not Has_Pragma_Elaborate_Body (Spec_Id)
!       then
!          Error_Msg_NE
!            ("??variable & can be accessed by clients before this "
!             & "initialization", Asmt, Var_Id);
  
!          Error_Msg_NE
!            ("\add pragma ""Elaborate_Body"" to spec & to ensure proper "
!             & "initialization", Asmt, Spec_Id);
  
!          Output_Active_Scenarios (Asmt);
  
!          --  Generate an implicit Elaborate_Body in the spec
  
!          Set_Elaborate_Body_Desirable (Spec_Id);
!       end if;
!    end Process_Conditional_ABE_Variable_Assignment_Ada;
  
!    -------------------------------------------------------
!    -- Process_Conditional_ABE_Variable_Assignment_SPARK --
!    -------------------------------------------------------
  
!    procedure Process_Conditional_ABE_Variable_Assignment_SPARK
!      (Asmt   : Node_Id;
!       Var_Id : Entity_Id)
!    is
!       Var_Decl : constant Node_Id   := Declaration_Node (Var_Id);
!       Spec_Id  : constant Entity_Id := Find_Top_Unit (Var_Decl);
  
!    begin
!       --  Ensure that a suitable elaboration model is in effect for SPARK rule
!       --  verification.
  
!       Check_SPARK_Model_In_Effect (Asmt);
  
!       --  Emit an error when an initialized variable declared in a package spec
!       --  without pragma Elaborate_Body is further modified by elaboration code
!       --  within the corresponding body.
  
!       if Is_Elaboration_Warnings_OK_Id (Var_Id)
!         and then Is_Initialized (Var_Decl)
!         and then not Has_Pragma_Elaborate_Body (Spec_Id)
!       then
!          Error_Msg_NE
!            ("variable & modified by elaboration code in package body",
!             Asmt, Var_Id);
  
!          Error_Msg_NE
!            ("\add pragma ""Elaborate_Body"" to spec & to ensure full "
!             & "initialization", Asmt, Spec_Id);
  
!          Output_Active_Scenarios (Asmt);
!       end if;
!    end Process_Conditional_ABE_Variable_Assignment_SPARK;
  
!    ------------------------------------------------
!    -- Process_Conditional_ABE_Variable_Reference --
!    ------------------------------------------------
  
!    procedure Process_Conditional_ABE_Variable_Reference (Ref : Node_Id) is
!       Var_Attrs : Variable_Attributes;
!       Var_Id    : Entity_Id;
  
!    begin
!       Extract_Variable_Reference_Attributes
!         (Ref    => Ref,
!          Var_Id => Var_Id,
!          Attrs  => Var_Attrs);
  
!       if Is_Read (Ref) then
!          Process_Conditional_ABE_Variable_Reference_Read
!            (Ref    => Ref,
!             Var_Id => Var_Id,
!             Attrs  => Var_Attrs);
!       end if;
!    end Process_Conditional_ABE_Variable_Reference;
  
!    -----------------------------------------------------
!    -- Process_Conditional_ABE_Variable_Reference_Read --
!    -----------------------------------------------------
  
!    procedure Process_Conditional_ABE_Variable_Reference_Read
!      (Ref    : Node_Id;
!       Var_Id : Entity_Id;
!       Attrs  : Variable_Attributes)
!    is
!    begin
!       --  Output relevant information when switch -gnatel (info messages on
!       --  implicit Elaborate[_All] pragmas) is in effect.
  
!       if Elab_Info_Messages then
!          Elab_Msg_NE
!            (Msg      => "read of variable & during elaboration",
!             N        => Ref,
!             Id       => Var_Id,
!             Info_Msg => True,
!             In_SPARK => True);
!       end if;
  
!       --  Nothing to do when the variable appears within the main unit because
!       --  diagnostics on reads are relevant only for external variables.
  
!       if Is_Same_Unit (Attrs.Unit_Id, Cunit_Entity (Main_Unit)) then
!          null;
  
!       --  Nothing to do when the variable is already initialized. Note that the
!       --  variable may be further modified by the external unit.
  
!       elsif Is_Initialized (Declaration_Node (Var_Id)) then
!          null;
  
!       --  Nothing to do when the external unit guarantees the initialization of
!       --  the variable by means of pragma Elaborate_Body.
  
!       elsif Has_Pragma_Elaborate_Body (Attrs.Unit_Id) then
!          null;
  
!       --  A variable read imposes an Elaborate requirement on the context of
!       --  the main unit. Determine whether the context has a pragma strong
!       --  enough to meet the requirement.
  
!       else
!          Meet_Elaboration_Requirement
!            (N         => Ref,
!             Target_Id => Var_Id,
!             Req_Nam   => Name_Elaborate);
!       end if;
!    end Process_Conditional_ABE_Variable_Reference_Read;
  
!    -----------------------------
!    -- Process_Conditional_ABE --
!    -----------------------------
  
!    --  NOTE: The body of this routine is intentionally out of order because it
!    --  invokes an instantiated subprogram (Process_Conditional_ABE_Activation).
!    --  Placing the body in alphabetical order will result in a guaranteed ABE.
  
!    procedure Process_Conditional_ABE
!      (N     : Node_Id;
!       State : Processing_Attributes := Initial_State)
!    is
!       Call_Attrs : Call_Attributes;
!       Target_Id  : Entity_Id;
  
!    begin
!       --  Add the current scenario to the stack of active scenarios
  
!       Push_Active_Scenario (N);
  
!       --  'Access
  
!       if Is_Suitable_Access (N) then
!          Process_Conditional_ABE_Access
!            (Attr  => N,
!             State => State);
  
!       --  Activations and calls
  
!       elsif Is_Suitable_Call (N) then
  
!          --  In general, only calls found within the main unit are processed
!          --  because the ALI information supplied to binde is for the main
!          --  unit only. However, to preserve the consistency of the tree and
!          --  ensure proper serialization of internal names, external calls
!          --  also receive corresponding call markers (see Build_Call_Marker).
!          --  Regardless of the reason, external calls must not be processed.
  
!          if In_Main_Context (N) then
!             Extract_Call_Attributes
!               (Call      => N,
!                Target_Id => Target_Id,
!                Attrs     => Call_Attrs);
  
!             if Is_Activation_Proc (Target_Id) then
!                Process_Conditional_ABE_Activation
!                  (Call       => N,
!                   Call_Attrs => Call_Attrs,
!                   State      => State);
  
!             else
!                Process_Conditional_ABE_Call
!                  (Call       => N,
!                   Call_Attrs => Call_Attrs,
!                   Target_Id  => Target_Id,
!                   State      => State);
!             end if;
           end if;
  
!       --  Instantiations
! 
!       elsif Is_Suitable_Instantiation (N) then
!          Process_Conditional_ABE_Instantiation
!            (Exp_Inst => N,
!             State    => State);
  
!       --  Variable assignments
  
!       elsif Is_Suitable_Variable_Assignment (N) then
!          Process_Conditional_ABE_Variable_Assignment (N);
  
!       --  Variable references
  
!       elsif Is_Suitable_Variable_Reference (N) then
  
!          --  In general, only variable references found within the main unit
!          --  are processed because the ALI information supplied to binde is for
!          --  the main unit only. However, to preserve the consistency of the
!          --  tree and ensure proper serialization of internal names, external
!          --  variable references also receive corresponding variable reference
!          --  markers (see Build_Varaible_Reference_Marker). Regardless of the
!          --  reason, external variable references must not be processed.
  
!          if In_Main_Context (N) then
!             Process_Conditional_ABE_Variable_Reference (N);
!          end if;
!       end if;
  
!       --  Remove the current scenario from the stack of active scenarios once
!       --  all ABE diagnostics and checks have been performed.
  
!       Pop_Active_Scenario (N);
!    end Process_Conditional_ABE;
  
!    --------------------------------------------
!    -- Process_Guaranteed_ABE_Activation_Impl --
!    --------------------------------------------
  
!    procedure Process_Guaranteed_ABE_Activation_Impl
!      (Call       : Node_Id;
!       Call_Attrs : Call_Attributes;
!       Obj_Id     : Entity_Id;
!       Task_Attrs : Task_Attributes;
!       State      : Processing_Attributes)
!    is
!       pragma Unreferenced (State);
  
!       Check_OK : constant Boolean :=
!                    not Is_Ignored_Ghost_Entity (Obj_Id)
!                      and then not Task_Attrs.Ghost_Mode_Ignore
!                      and then Is_Elaboration_Checks_OK_Id (Obj_Id)
!                      and then Task_Attrs.Elab_Checks_OK;
!       --  A run-time ABE check may be installed only when the object and the
!       --  task type have active elaboration checks, and both are not ignored
!       --  Ghost constructs.
  
!    begin
!       --  Nothing to do when the root scenario appears at the declaration
!       --  level and the task is in the same unit, but outside this context.
!       --
!       --    task type Task_Typ;                  --  task declaration
!       --
!       --    procedure Proc is
!       --       function A ... is
!       --       begin
!       --          if Some_Condition then
!       --             declare
!       --                T : Task_Typ;
!       --             begin
!       --                <activation call>        --  activation site
!       --             end;
!       --          ...
!       --       end A;
!       --
!       --       X : ... := A;                     --  root scenario
!       --    ...
!       --
!       --    task body Task_Typ is
!       --       ...
!       --    end Task_Typ;
!       --
!       --  In the example above, the context of X is the declarative list of
!       --  Proc. The "elaboration" of X may reach the activation of T whose body
!       --  is defined outside of X's context. The task body is relevant only
!       --  when Proc is invoked, but this happens only in "normal" elaboration,
!       --  therefore the task body must not be considered if this is not the
!       --  case.
  
!       --  Performance note: parent traversal
  
!       if Is_Up_Level_Target (Task_Attrs.Task_Decl) then
!          return;
  
!       --  Nothing to do when the activation is ABE-safe
!       --
!       --    generic
!       --    package Gen is
!       --       task type Task_Typ;
!       --    end Gen;
!       --
!       --    package body Gen is
!       --       task body Task_Typ is
!       --       begin
!       --          ...
!       --       end Task_Typ;
!       --    end Gen;
!       --
!       --    with Gen;
!       --    procedure Main is
!       --       package Nested is
!       --          package Inst is new Gen;
!       --          T : Inst.Task_Typ;
!       --       end Nested;                       --  safe activation
!       --    ...
  
!       elsif Is_Safe_Activation (Call, Task_Attrs.Task_Decl) then
!          return;
  
!       --  An activation call leads to a guaranteed ABE when the activation
!       --  call and the task appear within the same context ignoring library
!       --  levels, and the body of the task has not been seen yet or appears
!       --  after the activation call.
!       --
!       --    procedure Guaranteed_ABE is
!       --       task type Task_Typ;
!       --
!       --       package Nested is
!       --          T : Task_Typ;
!       --          <activation call>              --  guaranteed ABE
!       --       end Nested;
!       --
!       --       task body Task_Typ is
!       --          ...
!       --       end Task_Typ;
!       --    ...
  
!       --  Performance note: parent traversal
  
!       elsif Is_Guaranteed_ABE
!               (N           => Call,
!                Target_Decl => Task_Attrs.Task_Decl,
!                Target_Body => Task_Attrs.Body_Decl)
!       then
!          if Call_Attrs.Elab_Warnings_OK then
!             Error_Msg_Sloc := Sloc (Call);
!             Error_Msg_N
!               ("??task & will be activated # before elaboration of its body",
!                Obj_Id);
!             Error_Msg_N ("\Program_Error will be raised at run time", Obj_Id);
           end if;
  
!          --  Mark the activation call as a guaranteed ABE
  
!          Set_Is_Known_Guaranteed_ABE (Call);
  
!          --  Install a run-time ABE failue because this activation call will
!          --  always result in an ABE.
  
!          if Check_OK then
!             Install_ABE_Failure
!               (N       => Call,
!                Ins_Nod => Call);
!          end if;
!       end if;
!    end Process_Guaranteed_ABE_Activation_Impl;
  
!    procedure Process_Guaranteed_ABE_Activation is
!      new Process_Activation_Generic (Process_Guaranteed_ABE_Activation_Impl);
  
!    ---------------------------------
!    -- Process_Guaranteed_ABE_Call --
!    ---------------------------------
  
!    procedure Process_Guaranteed_ABE_Call
!      (Call       : Node_Id;
!       Call_Attrs : Call_Attributes;
!       Target_Id  : Entity_Id)
!    is
!       Target_Attrs : Target_Attributes;
  
!    begin
!       Extract_Target_Attributes
!         (Target_Id => Target_Id,
!          Attrs     => Target_Attrs);
  
!       --  Nothing to do when the root scenario appears at the declaration level
!       --  and the target is in the same unit, but outside this context.
!       --
!       --    function B ...;                      --  target declaration
!       --
!       --    procedure Proc is
!       --       function A ... is
!       --       begin
!       --          if Some_Condition then
!       --             return B;                   --  call site
!       --          ...
!       --       end A;
!       --
!       --       X : ... := A;                     --  root scenario
!       --    ...
!       --
!       --    function B ... is
!       --       ...
!       --    end B;
!       --
!       --  In the example above, the context of X is the declarative region of
!       --  Proc. The "elaboration" of X may eventually reach B which is defined
!       --  outside of X's context. B is relevant only when Proc is invoked, but
!       --  this happens only by means of "normal" elaboration, therefore B must
!       --  not be considered if this is not the case.
  
!       --  Performance note: parent traversal
  
!       if Is_Up_Level_Target (Target_Attrs.Spec_Decl) then
!          return;
  
!       --  Nothing to do when the call is ABE-safe
!       --
!       --    generic
!       --    function Gen ...;
!       --
!       --    function Gen ... is
!       --    begin
!       --       ...
!       --    end Gen;
!       --
!       --    with Gen;
!       --    procedure Main is
!       --       function Inst is new Gen;
!       --       X : ... := Inst;                  --  safe call
!       --    ...
  
!       elsif Is_Safe_Call (Call, Target_Attrs) then
!          return;
  
!       --  A call leads to a guaranteed ABE when the call and the target appear
!       --  within the same context ignoring library levels, and the body of the
!       --  target has not been seen yet or appears after the call.
!       --
!       --    procedure Guaranteed_ABE is
!       --       function Func ...;
!       --
!       --       package Nested is
!       --          Obj : ... := Func;             --  guaranteed ABE
!       --       end Nested;
!       --
!       --       function Func ... is
!       --          ...
!       --       end Func;
!       --    ...
  
!       --  Performance note: parent traversal
  
!       elsif Is_Guaranteed_ABE
!               (N           => Call,
!                Target_Decl => Target_Attrs.Spec_Decl,
!                Target_Body => Target_Attrs.Body_Decl)
!       then
!          if Call_Attrs.Elab_Warnings_OK then
!             Error_Msg_NE ("??cannot call & before body seen", Call, Target_Id);
!             Error_Msg_N ("\Program_Error will be raised at run time", Call);
!          end if;
  
!          --  Mark the call as a guarnateed ABE
  
!          Set_Is_Known_Guaranteed_ABE (Call);
  
!          --  Install a run-time ABE failure because the call will always result
!          --  in an ABE. The failure is installed when both the call and target
!          --  have enabled elaboration checks, and both are not ignored Ghost
!          --  constructs.
  
!          if Call_Attrs.Elab_Checks_OK
!            and then Target_Attrs.Elab_Checks_OK
!            and then not Call_Attrs.Ghost_Mode_Ignore
!            and then not Target_Attrs.Ghost_Mode_Ignore
           then
!             Install_ABE_Failure
!               (N       => Call,
!                Ins_Nod => Call);
           end if;
-       end if;
-    end Process_Guaranteed_ABE_Call;
  
!    ------------------------------------------
!    -- Process_Guaranteed_ABE_Instantiation --
!    ------------------------------------------
  
!    procedure Process_Guaranteed_ABE_Instantiation (Exp_Inst : Node_Id) is
!       Gen_Attrs  : Target_Attributes;
!       Gen_Id     : Entity_Id;
!       Inst       : Node_Id;
!       Inst_Attrs : Instantiation_Attributes;
!       Inst_Id    : Entity_Id;
  
     begin
!       Extract_Instantiation_Attributes
!         (Exp_Inst => Exp_Inst,
!          Inst     => Inst,
!          Inst_Id  => Inst_Id,
!          Gen_Id   => Gen_Id,
!          Attrs    => Inst_Attrs);
  
!       Extract_Target_Attributes (Gen_Id, Gen_Attrs);
  
!       --  Nothing to do when the root scenario appears at the declaration level
!       --  and the generic is in the same unit, but outside this context.
!       --
!       --    generic
!       --    procedure Gen is ...;                --  generic declaration
!       --
!       --    procedure Proc is
!       --       function A ... is
!       --       begin
!       --          if Some_Condition then
!       --             declare
!       --                procedure I is new Gen;  --  instantiation site
!       --             ...
!       --          ...
!       --       end A;
!       --
!       --       X : ... := A;                     --  root scenario
!       --    ...
!       --
!       --    procedure Gen is
!       --       ...
!       --    end Gen;
!       --
!       --  In the example above, the context of X is the declarative region of
!       --  Proc. The "elaboration" of X may eventually reach Gen which appears
!       --  outside of X's context. Gen is relevant only when Proc is invoked,
!       --  but this happens only by means of "normal" elaboration, therefore
!       --  Gen must not be considered if this is not the case.
  
!       --  Performance note: parent traversal
  
!       if Is_Up_Level_Target (Gen_Attrs.Spec_Decl) then
!          return;
  
!       --  Nothing to do when the instantiation is ABE-safe
!       --
!       --    generic
!       --    package Gen is
!       --       ...
!       --    end Gen;
!       --
!       --    package body Gen is
!       --       ...
!       --    end Gen;
!       --
!       --    with Gen;
!       --    procedure Main is
!       --       package Inst is new Gen (ABE);    --  safe instantiation
!       --    ...
  
!       elsif Is_Safe_Instantiation (Inst, Gen_Attrs) then
!          return;
  
!       --  An instantiation leads to a guaranteed ABE when the instantiation and
!       --  the generic appear within the same context ignoring library levels,
!       --  and the body of the generic has not been seen yet or appears after
!       --  the instantiation.
!       --
!       --    procedure Guaranteed_ABE is
!       --       generic
!       --       procedure Gen;
!       --
!       --       package Nested is
!       --          procedure Inst is new Gen;     --  guaranteed ABE
!       --       end Nested;
!       --
!       --       procedure Gen is
!       --          ...
!       --       end Gen;
!       --    ...
  
!       --  Performance note: parent traversal
  
!       elsif Is_Guaranteed_ABE
!               (N           => Inst,
!                Target_Decl => Gen_Attrs.Spec_Decl,
!                Target_Body => Gen_Attrs.Body_Decl)
!       then
!          if Inst_Attrs.Elab_Warnings_OK then
!             Error_Msg_NE
!               ("??cannot instantiate & before body seen", Inst, Gen_Id);
!             Error_Msg_N ("\Program_Error will be raised at run time", Inst);
!          end if;
  
!          --  Mark the instantiation as a guarantee ABE. This automatically
!          --  suppresses the instantiation of the generic body.
  
!          Set_Is_Known_Guaranteed_ABE (Inst);
  
!          --  Install a run-time ABE failure because the instantiation will
!          --  always result in an ABE. The failure is installed when both the
!          --  instance and the generic have enabled elaboration checks, and both
!          --  are not ignored Ghost constructs.
  
!          if Inst_Attrs.Elab_Checks_OK
!            and then Gen_Attrs.Elab_Checks_OK
!            and then not Inst_Attrs.Ghost_Mode_Ignore
!            and then not Gen_Attrs.Ghost_Mode_Ignore
           then
!             Install_ABE_Failure
!               (N       => Inst,
!                Ins_Nod => Exp_Inst);
           end if;
!       end if;
!    end Process_Guaranteed_ABE_Instantiation;
  
!    ----------------------------
!    -- Process_Guaranteed_ABE --
!    ----------------------------
  
!    --  NOTE: The body of this routine is intentionally out of order because it
!    --  invokes an instantiated subprogram (Process_Guaranteed_ABE_Activation).
!    --  Placing the body in alphabetical order will result in a guaranteed ABE.
  
!    procedure Process_Guaranteed_ABE (N : Node_Id) is
!       Call_Attrs : Call_Attributes;
!       Target_Id  : Entity_Id;
  
!    begin
!       --  Add the current scenario to the stack of active scenarios
  
!       Push_Active_Scenario (N);
  
!       --  Only calls, instantiations, and task activations may result in a
!       --  guaranteed ABE.
  
!       if Is_Suitable_Call (N) then
!          Extract_Call_Attributes
!            (Call      => N,
!             Target_Id => Target_Id,
!             Attrs     => Call_Attrs);
  
!          if Is_Activation_Proc (Target_Id) then
!             Process_Guaranteed_ABE_Activation
!               (Call       => N,
!                Call_Attrs => Call_Attrs,
!                State      => Initial_State);
  
!          else
!             Process_Guaranteed_ABE_Call
!               (Call       => N,
!                Call_Attrs => Call_Attrs,
!                Target_Id  => Target_Id);
!          end if;
  
!       elsif Is_Suitable_Instantiation (N) then
!          Process_Guaranteed_ABE_Instantiation (N);
!       end if;
  
!       --  Remove the current scenario from the stack of active scenarios once
!       --  all ABE diagnostics and checks have been performed.
  
!       Pop_Active_Scenario (N);
!    end Process_Guaranteed_ABE;
  
!    --------------------------
!    -- Push_Active_Scenario --
!    --------------------------
  
!    procedure Push_Active_Scenario (N : Node_Id) is
!    begin
!       Scenario_Stack.Append (N);
!    end Push_Active_Scenario;
  
!    ---------------------------------
!    -- Record_Elaboration_Scenario --
!    ---------------------------------
  
!    procedure Record_Elaboration_Scenario (N : Node_Id) is
!       Level : Enclosing_Level_Kind;
  
!       Any_Level_OK : Boolean;
!       --  This flag is set when a particular scenario is allowed to appear at
!       --  any level.
  
!       Declaration_Level_OK : Boolean;
!       --  This flag is set when a particular scenario is allowed to appear at
!       --  the declaration level.
  
!       Library_Level_OK : Boolean;
!       --  This flag is set when a particular scenario is allowed to appear at
!       --  the library level.
  
!    begin
!       --  Assume that the scenario cannot appear on any level
  
!       Any_Level_OK         := False;
!       Declaration_Level_OK := False;
!       Library_Level_OK     := False;
  
!       --  Nothing to do when switch -gnatH (legacy elaboration checking mode
!       --  enabled) is in effect because the legacy ABE mechanism does not need
!       --  to carry out this action.
  
!       if Legacy_Elaboration_Checks then
!          return;
  
!       --  Nothing to do for ASIS because ABE checks and diagnostics are not
!       --  performed in this mode.
  
!       elsif ASIS_Mode then
!          return;
  
!       --  Nothing to do when the scenario is being preanalyzed
  
!       elsif Preanalysis_Active then
!          return;
!       end if;
  
!       --  Ensure that a library-level call does not appear in a preelaborated
!       --  unit. The check must come before ignoring scenarios within external
!       --  units or inside generics because calls in those context must also be
!       --  verified.
  
!       if Is_Suitable_Call (N) then
!          Check_Preelaborated_Call (N);
!       end if;
  
!       --  Nothing to do when the scenario does not appear within the main unit
  
!       if not In_Main_Context (N) then
!          return;
  
!       --  Scenarios within a generic unit are never considered because generics
!       --  cannot be elaborated.
  
!       elsif Inside_A_Generic then
!          return;
  
!       --  Scenarios which do not fall in one of the elaboration categories
!       --  listed below are not considered. The categories are:
  
!       --   'Access for entries, operators, and subprograms
!       --    Assignments to variables
!       --    Calls (includes task activation)
!       --    Derived types
!       --    Instantiations
!       --    Pragma Refined_State
!       --    Reads of variables
  
!       elsif Is_Suitable_Access (N) then
!          Library_Level_OK := True;
  
!          --  Signal any enclosing local exception handlers that the 'Access may
!          --  raise Program_Error due to a failed ABE check when switch -gnatd.o
!          --  (conservative elaboration order for indirect calls) is in effect.
!          --  Marking the exception handlers ensures proper expansion by both
!          --  the front and back end restriction when No_Exception_Propagation
!          --  is in effect.
  
!          if Debug_Flag_Dot_O then
!             Possible_Local_Raise (N, Standard_Program_Error);
!          end if;
  
!       elsif Is_Suitable_Call (N) or else Is_Suitable_Instantiation (N) then
!          Declaration_Level_OK := True;
!          Library_Level_OK     := True;
  
!          --  Signal any enclosing local exception handlers that the call or
!          --  instantiation may raise Program_Error due to a failed ABE check.
!          --  Marking the exception handlers ensures proper expansion by both
!          --  the front and back end restriction when No_Exception_Propagation
!          --  is in effect.
  
!          Possible_Local_Raise (N, Standard_Program_Error);
  
!       elsif Is_Suitable_SPARK_Derived_Type (N) then
!          Any_Level_OK := True;
  
!       elsif Is_Suitable_SPARK_Refined_State_Pragma (N) then
!          Library_Level_OK := True;
  
!       elsif Is_Suitable_Variable_Assignment (N)
!         or else Is_Suitable_Variable_Reference (N)
!       then
!          Library_Level_OK := True;
  
!       --  Otherwise the input does not denote a suitable scenario
  
!       else
!          return;
!       end if;
  
!       --  The static model imposes additional restrictions on the placement of
!       --  scenarios. In contrast, the dynamic model assumes that every scenario
!       --  will be elaborated or invoked at some point.
  
!       if Static_Elaboration_Checks then
  
!          --  Certain scenarios are allowed to appear at any level. This check
!          --  is performed here in order to save on a parent traversal.
  
!          if Any_Level_OK then
!             null;
  
!          --  Otherwise the scenario must appear at a specific level
  
!          else
!             --  Performance note: parent traversal
  
!             Level := Find_Enclosing_Level (N);
  
!             --  Declaration-level scenario
  
!             if Declaration_Level_OK and then Level = Declaration_Level then
!                null;
  
!             --  Library-level or instantiation scenario
  
!             elsif Library_Level_OK
!               and then Level in Library_Or_Instantiation_Level
!             then
!                null;
  
!             --  Otherwise the scenario does not appear at the proper level and
!             --  cannot possibly act as a top-level scenario.
  
!             else
!                return;
              end if;
!          end if;
!       end if;
  
!       --  Derived types subject to SPARK_Mode On require elaboration-related
!       --  checks even though the type may not be declared within elaboration
!       --  code. The types are recorded in a separate table which is examined
!       --  during the Processing phase. Note that the checks must be delayed
!       --  because the bodies of overriding primitives are not available yet.
  
!       if Is_Suitable_SPARK_Derived_Type (N) then
!          Record_SPARK_Elaboration_Scenario (N);
  
!          --  Nothing left to do for derived types
  
!          return;
  
!       --  Instantiations of generics both subject to SPARK_Mode On require
!       --  elaboration-related checks even though the instantiations may not
!       --  appear within elaboration code. The instantiations are recored in
!       --  a separate table which is examined during the Procesing phase. Note
!       --  that the checks must be delayed because it is not known yet whether
!       --  the generic unit has a body or not.
  
!       --  IMPORTANT: A SPARK instantiation is also a normal instantiation which
!       --  is subject to common conditional and guaranteed ABE checks.
  
!       elsif Is_Suitable_SPARK_Instantiation (N) then
!          Record_SPARK_Elaboration_Scenario (N);
  
!       --  External constituents that refine abstract states which appear in
!       --  pragma Initializes require elaboration-related checks even though
!       --  a Refined_State pragma lacks any elaboration semantic.
  
!       elsif Is_Suitable_SPARK_Refined_State_Pragma (N) then
!          Record_SPARK_Elaboration_Scenario (N);
  
!          --  Nothing left to do for pragma Refined_State
  
!          return;
!       end if;
  
!       --  Perform early detection of guaranteed ABEs in order to suppress the
!       --  instantiation of generic bodies as gigi cannot handle certain types
!       --  of premature instantiations.
  
!       Process_Guaranteed_ABE (N);
  
!       --  At this point all checks have been performed. Record the scenario for
!       --  later processing by the ABE phase.
  
!       Top_Level_Scenarios.Append (N);
!       Set_Is_Recorded_Top_Level_Scenario (N);
!    end Record_Elaboration_Scenario;
  
!    ---------------------------------------
!    -- Record_SPARK_Elaboration_Scenario --
!    ---------------------------------------
  
!    procedure Record_SPARK_Elaboration_Scenario (N : Node_Id) is
!    begin
!       SPARK_Scenarios.Append (N);
!       Set_Is_Recorded_SPARK_Scenario (N);
!    end Record_SPARK_Elaboration_Scenario;
  
!    -----------------------------------
!    -- Recorded_SPARK_Scenarios_Hash --
!    -----------------------------------
  
!    function Recorded_SPARK_Scenarios_Hash
!      (Key : Node_Id) return Recorded_SPARK_Scenarios_Index
!    is
!    begin
!       return
!         Recorded_SPARK_Scenarios_Index (Key mod Recorded_SPARK_Scenarios_Max);
!    end Recorded_SPARK_Scenarios_Hash;
  
!    ---------------------------------------
!    -- Recorded_Top_Level_Scenarios_Hash --
!    ---------------------------------------
  
!    function Recorded_Top_Level_Scenarios_Hash
!      (Key : Node_Id) return Recorded_Top_Level_Scenarios_Index
!    is
!    begin
!       return
!         Recorded_Top_Level_Scenarios_Index
!           (Key mod Recorded_Top_Level_Scenarios_Max);
!    end Recorded_Top_Level_Scenarios_Hash;
  
!    --------------------------
!    -- Reset_Visited_Bodies --
!    --------------------------
  
!    procedure Reset_Visited_Bodies is
!    begin
!       if Visited_Bodies_In_Use then
!          Visited_Bodies_In_Use := False;
!          Visited_Bodies.Reset;
!       end if;
!    end Reset_Visited_Bodies;
  
!    -------------------
!    -- Root_Scenario --
!    -------------------
  
!    function Root_Scenario return Node_Id is
!       package Stack renames Scenario_Stack;
  
!    begin
!       --  Ensure that the scenario stack has at least one active scenario in
!       --  it. The one at the bottom (index First) is the root scenario.
  
!       pragma Assert (Stack.Last >= Stack.First);
!       return Stack.Table (Stack.First);
!    end Root_Scenario;
  
!    ---------------------------
!    -- Set_Early_Call_Region --
!    ---------------------------
  
!    procedure Set_Early_Call_Region (Body_Id : Entity_Id; Start : Node_Id) is
!    begin
!       pragma Assert (Ekind_In (Body_Id, E_Entry,
!                                         E_Entry_Family,
!                                         E_Function,
!                                         E_Procedure,
!                                         E_Subprogram_Body));
  
!       Early_Call_Regions_In_Use := True;
!       Early_Call_Regions.Set (Body_Id, Start);
!    end Set_Early_Call_Region;
  
!    ----------------------------
!    -- Set_Elaboration_Status --
!    ----------------------------
  
!    procedure Set_Elaboration_Status
!      (Unit_Id : Entity_Id;
!       Val     : Elaboration_Attributes)
!    is
!    begin
!       Elaboration_Statuses_In_Use := True;
!       Elaboration_Statuses.Set (Unit_Id, Val);
!    end Set_Elaboration_Status;
  
!    ------------------------------------
!    -- Set_Is_Recorded_SPARK_Scenario --
!    ------------------------------------
  
!    procedure Set_Is_Recorded_SPARK_Scenario
!      (N   : Node_Id;
!       Val : Boolean := True)
!    is
!    begin
!       Recorded_SPARK_Scenarios_In_Use := True;
!       Recorded_SPARK_Scenarios.Set (N, Val);
!    end Set_Is_Recorded_SPARK_Scenario;
  
!    ----------------------------------------
!    -- Set_Is_Recorded_Top_Level_Scenario --
!    ----------------------------------------
  
!    procedure Set_Is_Recorded_Top_Level_Scenario
!      (N   : Node_Id;
!       Val : Boolean := True)
!    is
!    begin
!       Recorded_Top_Level_Scenarios_In_Use := True;
!       Recorded_Top_Level_Scenarios.Set (N, Val);
!    end Set_Is_Recorded_Top_Level_Scenario;
  
!    -------------------------
!    -- Set_Is_Visited_Body --
!    -------------------------
  
!    procedure Set_Is_Visited_Body (Subp_Body : Node_Id) is
!    begin
!       Visited_Bodies_In_Use := True;
!       Visited_Bodies.Set (Subp_Body, True);
!    end Set_Is_Visited_Body;
  
!    -------------------------------
!    -- Static_Elaboration_Checks --
!    -------------------------------
  
!    function Static_Elaboration_Checks return Boolean is
!    begin
!       return not Dynamic_Elaboration_Checks;
!    end Static_Elaboration_Checks;
  
!    -------------------
!    -- Traverse_Body --
!    -------------------
  
!    procedure Traverse_Body (N : Node_Id; State : Processing_Attributes) is
!       procedure Find_And_Process_Nested_Scenarios;
!       pragma Inline (Find_And_Process_Nested_Scenarios);
!       --  Examine the declarations and statements of subprogram body N for
!       --  suitable scenarios.
  
!       ---------------------------------------
!       -- Find_And_Process_Nested_Scenarios --
!       ---------------------------------------
  
!       procedure Find_And_Process_Nested_Scenarios is
!          function Is_Potential_Scenario
!            (Nod : Node_Id) return Traverse_Result;
!          --  Determine whether arbitrary node Nod denotes a suitable scenario.
!          --  If it does, save it in the Nested_Scenarios list of the subprogram
!          --  body, and process it.
  
!          procedure Traverse_List (List : List_Id);
!          pragma Inline (Traverse_List);
!          --  Invoke Traverse_Potential_Scenarios on each node in list List
  
!          procedure Traverse_Potential_Scenarios is
!            new Traverse_Proc (Is_Potential_Scenario);
  
!          ---------------------------
!          -- Is_Potential_Scenario --
!          ---------------------------
  
-          function Is_Potential_Scenario
-            (Nod : Node_Id) return Traverse_Result
-          is
           begin
!             --  Special cases
  
!             --  Skip constructs which do not have elaboration of their own and
!             --  need to be elaborated by other means such as invocation, task
!             --  activation, etc.
  
!             if Is_Non_Library_Level_Encapsulator (Nod) then
!                return Skip;
  
!             --  Terminate the traversal of a task body when encountering an
!             --  accept or select statement, and
!             --
!             --    * Entry calls during elaboration are not allowed. In this
!             --      case the accept or select statement will cause the task
!             --      to block at elaboration time because there are no entry
!             --      calls to unblock it.
!             --
!             --  or
!             --
!             --    * Switch -gnatd_a (stop elaboration checks on accept or
!             --      select statement) is in effect.
  
!             elsif (Debug_Flag_Underscore_A
!                     or else Restriction_Active
!                               (No_Entry_Calls_In_Elaboration_Code))
!               and then Nkind_In (Original_Node (Nod), N_Accept_Statement,
!                                                       N_Selective_Accept)
!             then
!                return Abandon;
  
!             --  Terminate the traversal of a task body when encountering a
!             --  suspension call, and
!             --
!             --    * Entry calls during elaboration are not allowed. In this
!             --      case the suspension call emulates an entry call and will
!             --      cause the task to block at elaboration time.
!             --
!             --  or
!             --
!             --    * Switch -gnatd_s (stop elaboration checks on synchronous
!             --      suspension) is in effect.
!             --
!             --  Note that the guard should not be checking the state of flag
!             --  Within_Task_Body because only suspension calls which appear
!             --  immediately within the statements of the task are supported.
!             --  Flag Within_Task_Body carries over to deeper levels of the
!             --  traversal.
  
!             elsif (Debug_Flag_Underscore_S
!                     or else Restriction_Active
!                               (No_Entry_Calls_In_Elaboration_Code))
!               and then Is_Synchronous_Suspension_Call (Nod)
!               and then In_Task_Body (Nod)
!             then
!                return Abandon;
  
!             --  Certain nodes carry semantic lists which act as repositories
!             --  until expansion transforms the node and relocates the contents.
!             --  Examine these lists in case expansion is disabled.
  
!             elsif Nkind_In (Nod, N_And_Then, N_Or_Else) then
!                Traverse_List (Actions (Nod));
  
!             elsif Nkind_In (Nod, N_Elsif_Part, N_Iteration_Scheme) then
!                Traverse_List (Condition_Actions (Nod));
  
!             elsif Nkind (Nod) = N_If_Expression then
!                Traverse_List (Then_Actions (Nod));
!                Traverse_List (Else_Actions (Nod));
  
!             elsif Nkind_In (Nod, N_Component_Association,
!                                  N_Iterated_Component_Association)
!             then
!                Traverse_List (Loop_Actions (Nod));
  
!             --  General case
  
!             elsif Is_Suitable_Scenario (Nod) then
!                Process_Conditional_ABE
!                  (N     => Nod,
!                   State => State);
              end if;
  
!             return OK;
!          end Is_Potential_Scenario;
  
!          -------------------
!          -- Traverse_List --
!          -------------------
  
!          procedure Traverse_List (List : List_Id) is
!             Item : Node_Id;
  
           begin
!             Item := First (List);
!             while Present (Item) loop
!                Traverse_Potential_Scenarios (Item);
!                Next (Item);
!             end loop;
!          end Traverse_List;
  
!       --  Start of processing for Find_And_Process_Nested_Scenarios
  
        begin
!          --  Examine the declarations for suitable scenarios
  
!          Traverse_List (Declarations (N));
  
!          --  Examine the handled sequence of statements. This also includes any
!          --  exceptions handlers.
  
!          Traverse_Potential_Scenarios (Handled_Statement_Sequence (N));
!       end Find_And_Process_Nested_Scenarios;
  
!    --  Start of processing for Traverse_Body
  
     begin
!       --  Nothing to do when there is no body
  
!       if No (N) then
!          return;
  
!       elsif Nkind (N) /= N_Subprogram_Body then
!          return;
!       end if;
  
!       --  Nothing to do if the body was already traversed during the processing
!       --  of the same top-level scenario.
  
!       if Is_Visited_Body (N) then
!          return;
  
!       --  Otherwise mark the body as traversed
  
!       else
!          Set_Is_Visited_Body (N);
        end if;
  
!       --  Examine the declarations and statements of the subprogram body for
!       --  suitable scenarios, save and process them accordingly.
  
!       Find_And_Process_Nested_Scenarios;
!    end Traverse_Body;
  
     -----------------
     -- Unit_Entity --
--- 10137,15920 ----
        return False;
     end In_Same_Context;
  
!    ----------------
!    -- Initialize --
!    ----------------
  
!    procedure Initialize is
!    begin
!       --  Set the soft link which enables Atree.Rewrite to update a scenario
!       --  each time it is transformed into another node.
! 
!       Set_Rewriting_Proc (Update_Elaboration_Scenario'Access);
! 
!       --  Create all internal data structures and activate the elaboration
!       --  phase of the compiler.
  
+       Initialize_All_Data_Structures;
+       Set_Elaboration_Phase (Active);
+    end Initialize;
+ 
+    ------------------------------------
+    -- Initialize_All_Data_Structures --
+    ------------------------------------
+ 
+    procedure Initialize_All_Data_Structures is
     begin
!       Initialize_Body_Processor;
!       Initialize_Early_Call_Region_Processor;
!       Initialize_Elaborated_Units;
!       Initialize_Internal_Representation;
!       Initialize_Invocation_Graph;
!       Initialize_Scenario_Storage;
!    end Initialize_All_Data_Structures;
  
!    --------------------------
!    -- Instantiated_Generic --
!    --------------------------
  
!    function Instantiated_Generic (Inst : Node_Id) return Entity_Id is
!    begin
!       --  Traverse a possible chain of renamings to obtain the original generic
!       --  being instantiatied.
  
!       return Get_Renamed_Entity (Entity (Name (Inst)));
!    end Instantiated_Generic;
  
!    -----------------------------
!    -- Internal_Representation --
!    -----------------------------
  
!    package body Internal_Representation is
  
!       -----------
!       -- Types --
!       -----------
  
!       --  The following type represents the contents of a scenario
  
!       type Scenario_Rep_Record is record
!          Elab_Checks_OK : Boolean := False;
!          --  The status of elaboration checks for the scenario
  
!          Elab_Warnings_OK : Boolean := False;
!          --  The status of elaboration warnings for the scenario
  
!          GM : Extended_Ghost_Mode := Is_Checked_Or_Not_Specified;
!          --  The Ghost mode of the scenario
  
!          Kind : Scenario_Kind := No_Scenario;
!          --  The nature of the scenario
  
!          Level : Enclosing_Level_Kind := No_Level;
!          --  The enclosing level where the scenario resides
  
!          SM : Extended_SPARK_Mode := Is_Off_Or_Not_Specified;
!          --  The SPARK mode of the scenario
  
!          Target : Entity_Id := Empty;
!          --  The target of the scenario
  
!          --  The following attributes are multiplexed and depend on the Kind of
!          --  the scenario. They are mapped as follows:
!          --
!          --    Call_Scenario
!          --      Is_Dispatching_Call (Flag_1)
!          --
!          --    Task_Activation_Scenario
!          --      Activated_Task_Objects (List_1)
!          --      Activated_Task_Type (Field_1)
!          --
!          --    Variable_Reference
!          --      Is_Read_Reference (Flag_1)
  
!          Flag_1  : Boolean                    := False;
!          Field_1 : Node_Or_Entity_Id          := Empty;
!          List_1  : NE_List.Doubly_Linked_List := NE_List.Nil;
!       end record;
  
!       --  The following type represents the contents of a target
  
!       type Target_Rep_Record is record
!          Body_Decl : Node_Id := Empty;
!          --  The declaration of the target body
  
!          Elab_Checks_OK : Boolean := False;
!          --  The status of elaboration checks for the target
  
!          Elab_Warnings_OK : Boolean := False;
!          --  The status of elaboration warnings for the target
  
!          GM : Extended_Ghost_Mode := Is_Checked_Or_Not_Specified;
!          --  The Ghost mode of the target
  
!          Kind : Target_Kind := No_Target;
!          --  The nature of the target
  
!          SM : Extended_SPARK_Mode := Is_Off_Or_Not_Specified;
!          --  The SPARK mode of the target
  
!          Spec_Decl : Node_Id := Empty;
!          --  The declaration of the target spec
  
!          Unit : Entity_Id := Empty;
!          --  The top unit where the target is declared
  
!          Version : Representation_Kind := No_Representation;
!          --  The version of the target representation
  
!          --  The following attributes are multiplexed and depend on the Kind of
!          --  the target. They are mapped as follows:
!          --
!          --    Subprogram_Target
!          --      Barrier_Body_Declaration (Field_1)
!          --
!          --    Variable_Target
!          --      Variable_Declaration (Field_1)
  
!          Field_1 : Node_Or_Entity_Id := Empty;
!       end record;
  
!       ---------------------
!       -- Data structures --
!       ---------------------
  
!       procedure Destroy (T_Id : in out Target_Rep_Id);
!       --  Destroy a target representation T_Id
  
!       package ETT_Map is new Dynamic_Hash_Tables
!         (Key_Type              => Entity_Id,
!          Value_Type            => Target_Rep_Id,
!          No_Value              => No_Target_Rep,
!          Expansion_Threshold   => 1.5,
!          Expansion_Factor      => 2,
!          Compression_Threshold => 0.3,
!          Compression_Factor    => 2,
!          "="                   => "=",
!          Destroy_Value         => Destroy,
!          Hash                  => Hash);
  
!       --  The following map relates target representations to entities
  
!       Entity_To_Target_Map : ETT_Map.Dynamic_Hash_Table := ETT_Map.Nil;
  
!       procedure Destroy (S_Id : in out Scenario_Rep_Id);
!       --  Destroy a scenario representation S_Id
  
!       package NTS_Map is new Dynamic_Hash_Tables
!         (Key_Type              => Node_Id,
!          Value_Type            => Scenario_Rep_Id,
!          No_Value              => No_Scenario_Rep,
!          Expansion_Threshold   => 1.5,
!          Expansion_Factor      => 2,
!          Compression_Threshold => 0.3,
!          Compression_Factor    => 2,
!          "="                   => "=",
!          Destroy_Value         => Destroy,
!          Hash                  => Hash);
  
!       --  The following map relates scenario representations to nodes
  
!       Node_To_Scenario_Map : NTS_Map.Dynamic_Hash_Table := NTS_Map.Nil;
  
!       --  The following table stores all scenario representations
  
!       package Scenario_Reps is new Table.Table
!         (Table_Index_Type     => Scenario_Rep_Id,
!          Table_Component_Type => Scenario_Rep_Record,
!          Table_Low_Bound      => First_Scenario_Rep,
!          Table_Initial        => 1000,
!          Table_Increment      => 200,
!          Table_Name           => "Scenario_Reps");
  
!       --  The following table stores all target representations
  
!       package Target_Reps is new Table.Table
!         (Table_Index_Type     => Target_Rep_Id,
!          Table_Component_Type => Target_Rep_Record,
!          Table_Low_Bound      => First_Target_Rep,
!          Table_Initial        => 1000,
!          Table_Increment      => 200,
!          Table_Name           => "Target_Reps");
  
!       --------------
!       -- Builders --
!       --------------
  
!       function Create_Access_Taken_Rep
!         (Attr : Node_Id) return Scenario_Rep_Record;
!       pragma Inline (Create_Access_Taken_Rep);
!       --  Create the representation of 'Access attribute Attr
  
!       function Create_Call_Or_Task_Activation_Rep
!         (Call : Node_Id) return Scenario_Rep_Record;
!       pragma Inline (Create_Call_Or_Task_Activation_Rep);
!       --  Create the representation of call or task activation Call
  
!       function Create_Derived_Type_Rep
!         (Typ_Decl : Node_Id) return Scenario_Rep_Record;
!       pragma Inline (Create_Derived_Type_Rep);
!       --  Create the representation of a derived type described by declaration
!       --  Typ_Decl.
  
!       function Create_Generic_Rep
!         (Gen_Id : Entity_Id) return Target_Rep_Record;
!       pragma Inline (Create_Generic_Rep);
!       --  Create the representation of generic Gen_Id
  
!       function Create_Instantiation_Rep
!         (Inst : Node_Id) return Scenario_Rep_Record;
!       pragma Inline (Create_Instantiation_Rep);
!       --  Create the representation of instantiation Inst
  
!       function Create_Package_Rep
!         (Pack_Id : Entity_Id) return Target_Rep_Record;
!       pragma Inline (Create_Package_Rep);
!       --  Create the representation of package Pack_Id
  
!       function Create_Protected_Entry_Rep
!         (PE_Id : Entity_Id) return Target_Rep_Record;
!       pragma Inline (Create_Protected_Entry_Rep);
!       --  Create the representation of protected entry PE_Id
  
!       function Create_Protected_Subprogram_Rep
!         (PS_Id : Entity_Id) return Target_Rep_Record;
!       pragma Inline (Create_Protected_Subprogram_Rep);
!       --  Create the representation of protected subprogram PS_Id
  
!       function Create_Refined_State_Pragma_Rep
!         (Prag : Node_Id) return Scenario_Rep_Record;
!       pragma Inline (Create_Refined_State_Pragma_Rep);
!       --  Create the representation of Refined_State pragma Prag
  
!       function Create_Scenario_Rep
!         (N        : Node_Id;
!          In_State : Processing_In_State) return Scenario_Rep_Record;
!       pragma Inline (Create_Scenario_Rep);
!       --  Top level dispatcher. Create the representation of elaboration
!       --  scenario N. In_State is the current state of the Processing phase.
  
!       function Create_Subprogram_Rep
!         (Subp_Id : Entity_Id) return Target_Rep_Record;
!       pragma Inline (Create_Subprogram_Rep);
!       --  Create the representation of entry, operator, or subprogram Subp_Id
  
!       function Create_Target_Rep
!         (Id       : Entity_Id;
!          In_State : Processing_In_State) return Target_Rep_Record;
!       pragma Inline (Create_Target_Rep);
!       --  Top level dispatcher. Create the representation of elaboration target
!       --  Id. In_State is the current state of the Processing phase.
  
!       function Create_Task_Entry_Rep
!         (TE_Id : Entity_Id) return Target_Rep_Record;
!       pragma Inline (Create_Task_Entry_Rep);
!       --  Create the representation of task entry TE_Id
  
!       function Create_Task_Rep (Task_Typ : Entity_Id) return Target_Rep_Record;
!       pragma Inline (Create_Task_Rep);
!       --  Create the representation of task type Typ
  
!       function Create_Variable_Assignment_Rep
!         (Asmt : Node_Id) return Scenario_Rep_Record;
!       pragma Inline (Create_Variable_Assignment_Rep);
!       --  Create the representation of variable assignment Asmt
  
!       function Create_Variable_Reference_Rep
!         (Ref : Node_Id) return Scenario_Rep_Record;
!       pragma Inline (Create_Variable_Reference_Rep);
!       --  Create the representation of variable reference Ref
  
!       function Create_Variable_Rep
!         (Var_Id : Entity_Id) return Target_Rep_Record;
!       pragma Inline (Create_Variable_Rep);
!       --  Create the representation of variable Var_Id
  
!       -----------------------
!       -- Local subprograms --
!       -----------------------
  
!       function Ghost_Mode_Of_Entity
!         (Id : Entity_Id) return Extended_Ghost_Mode;
!       pragma Inline (Ghost_Mode_Of_Entity);
!       --  Obtain the extended Ghost mode of arbitrary entity Id
  
!       function Ghost_Mode_Of_Node (N : Node_Id) return Extended_Ghost_Mode;
!       pragma Inline (Ghost_Mode_Of_Node);
!       --  Obtain the extended Ghost mode of arbitrary node N
  
!       function Present (S_Id : Scenario_Rep_Id) return Boolean;
!       pragma Inline (Present);
!       --  Determine whether scenario representation S_Id exists
  
!       function Present (T_Id : Target_Rep_Id) return Boolean;
!       pragma Inline (Present);
!       --  Determine whether target representation T_Id exists
  
!       function SPARK_Mode_Of_Entity
!         (Id : Entity_Id) return Extended_SPARK_Mode;
!       pragma Inline (SPARK_Mode_Of_Entity);
!       --  Obtain the extended SPARK mode of arbitrary entity Id
  
!       function SPARK_Mode_Of_Node (N : Node_Id) return Extended_SPARK_Mode;
!       pragma Inline (SPARK_Mode_Of_Node);
!       --  Obtain the extended SPARK mode of arbitrary node N
  
!       function To_Ghost_Mode
!         (Ignored_Status : Boolean) return Extended_Ghost_Mode;
!       pragma Inline (To_Ghost_Mode);
!       --  Convert a Ghost mode indicated by Ignored_Status into its extended
!       --  equivalent.
  
!       function To_SPARK_Mode (On_Status : Boolean) return Extended_SPARK_Mode;
!       pragma Inline (To_SPARK_Mode);
!       --  Convert a SPARK mode indicated by On_Status into its extended
!       --  equivalent.
  
!       function Version (T_Id : Target_Rep_Id) return Representation_Kind;
!       pragma Inline (Version);
!       --  Obtain the version of target representation T_Id
  
!       ----------------------------
!       -- Activated_Task_Objects --
!       ----------------------------
  
!       function Activated_Task_Objects
!         (S_Id : Scenario_Rep_Id) return NE_List.Doubly_Linked_List
!       is
!          pragma Assert (Present (S_Id));
!          pragma Assert (Kind (S_Id) = Task_Activation_Scenario);
  
!       begin
!          return Scenario_Reps.Table (S_Id).List_1;
!       end Activated_Task_Objects;
  
!       -------------------------
!       -- Activated_Task_Type --
!       -------------------------
  
!       function Activated_Task_Type
!         (S_Id : Scenario_Rep_Id) return Entity_Id
!       is
!          pragma Assert (Present (S_Id));
!          pragma Assert (Kind (S_Id) = Task_Activation_Scenario);
  
!       begin
!          return Scenario_Reps.Table (S_Id).Field_1;
!       end Activated_Task_Type;
  
!       ------------------------------
!       -- Barrier_Body_Declaration --
!       ------------------------------
  
!       function Barrier_Body_Declaration
!         (T_Id : Target_Rep_Id) return Node_Id
!       is
!          pragma Assert (Present (T_Id));
!          pragma Assert (Kind (T_Id) = Subprogram_Target);
  
!       begin
!          return Target_Reps.Table (T_Id).Field_1;
!       end Barrier_Body_Declaration;
  
!       ----------------------
!       -- Body_Declaration --
!       ----------------------
  
!       function Body_Declaration (T_Id : Target_Rep_Id) return Node_Id is
!          pragma Assert (Present (T_Id));
!       begin
!          return Target_Reps.Table (T_Id).Body_Decl;
!       end Body_Declaration;
  
!       -----------------------------
!       -- Create_Access_Taken_Rep --
!       -----------------------------
  
!       function Create_Access_Taken_Rep
!         (Attr : Node_Id) return Scenario_Rep_Record
!       is
!          Rec : Scenario_Rep_Record;
  
!       begin
!          Rec.Elab_Checks_OK   := Is_Elaboration_Checks_OK_Node (Attr);
!          Rec.Elab_Warnings_OK := Is_Elaboration_Warnings_OK_Node (Attr);
!          Rec.GM               := Is_Checked_Or_Not_Specified;
!          Rec.SM               := SPARK_Mode_Of_Node (Attr);
!          Rec.Kind             := Access_Taken_Scenario;
!          Rec.Target           := Canonical_Subprogram (Entity (Prefix (Attr)));
  
!          return Rec;
!       end Create_Access_Taken_Rep;
  
!       ----------------------------------------
!       -- Create_Call_Or_Task_Activation_Rep --
!       ----------------------------------------
  
!       function Create_Call_Or_Task_Activation_Rep
!         (Call : Node_Id) return Scenario_Rep_Record
!       is
!          Subp_Id : constant Entity_Id := Canonical_Subprogram (Target (Call));
!          Kind    : Scenario_Kind;
!          Rec     : Scenario_Rep_Record;
  
!       begin
!          if Is_Activation_Proc (Subp_Id) then
!             Kind := Task_Activation_Scenario;
!          else
!             Kind := Call_Scenario;
!          end if;
  
!          Rec.Elab_Checks_OK   := Is_Elaboration_Checks_OK_Node (Call);
!          Rec.Elab_Warnings_OK := Is_Elaboration_Warnings_OK_Node (Call);
!          Rec.GM               := Ghost_Mode_Of_Node (Call);
!          Rec.SM               := SPARK_Mode_Of_Node (Call);
!          Rec.Kind             := Kind;
!          Rec.Target           := Subp_Id;
  
!          --  Scenario-specific attributes
  
!          Rec.Flag_1 := Is_Dispatching_Call (Call);  --  Dispatching_Call
  
!          return Rec;
!       end Create_Call_Or_Task_Activation_Rep;
  
!       -----------------------------
!       -- Create_Derived_Type_Rep --
!       -----------------------------
! 
!       function Create_Derived_Type_Rep
!         (Typ_Decl : Node_Id) return Scenario_Rep_Record
!       is
!          Typ : constant Entity_Id := Defining_Entity (Typ_Decl);
!          Rec : Scenario_Rep_Record;
! 
!       begin
!          Rec.Elab_Checks_OK   := False;  --  not relevant
!          Rec.Elab_Warnings_OK := False;  --  not relevant
!          Rec.GM               := Ghost_Mode_Of_Entity (Typ);
!          Rec.SM               := SPARK_Mode_Of_Entity (Typ);
!          Rec.Kind             := Derived_Type_Scenario;
!          Rec.Target           := Typ;
! 
!          return Rec;
!       end Create_Derived_Type_Rep;
! 
!       ------------------------
!       -- Create_Generic_Rep --
!       ------------------------
! 
!       function Create_Generic_Rep
!         (Gen_Id : Entity_Id) return Target_Rep_Record
!       is
!          Rec : Target_Rep_Record;
! 
!       begin
!          Rec.Kind := Generic_Target;
! 
!          Spec_And_Body_From_Entity
!            (Id        => Gen_Id,
!             Body_Decl => Rec.Body_Decl,
!             Spec_Decl => Rec.Spec_Decl);
! 
!          return Rec;
!       end Create_Generic_Rep;
  
        ------------------------------
!       -- Create_Instantiation_Rep --
        ------------------------------
  
!       function Create_Instantiation_Rep
!         (Inst : Node_Id) return Scenario_Rep_Record
!       is
!          Rec : Scenario_Rep_Record;
  
        begin
!          Rec.Elab_Checks_OK   := Is_Elaboration_Checks_OK_Node (Inst);
!          Rec.Elab_Warnings_OK := Is_Elaboration_Warnings_OK_Node (Inst);
!          Rec.GM               := Ghost_Mode_Of_Node (Inst);
!          Rec.SM               := SPARK_Mode_Of_Node (Inst);
!          Rec.Kind             := Instantiation_Scenario;
!          Rec.Target           := Instantiated_Generic (Inst);
  
!          return Rec;
!       end Create_Instantiation_Rep;
  
!       ------------------------
!       -- Create_Package_Rep --
!       ------------------------
  
!       function Create_Package_Rep
!         (Pack_Id : Entity_Id) return Target_Rep_Record
!       is
!          Rec : Target_Rep_Record;
  
!       begin
!          Rec.Kind := Package_Target;
  
!          Spec_And_Body_From_Entity
!            (Id        => Pack_Id,
!             Body_Decl => Rec.Body_Decl,
!             Spec_Decl => Rec.Spec_Decl);
  
!          return Rec;
!       end Create_Package_Rep;
  
!       --------------------------------
!       -- Create_Protected_Entry_Rep --
!       --------------------------------
  
!       function Create_Protected_Entry_Rep
!         (PE_Id : Entity_Id) return Target_Rep_Record
!       is
!          Prot_Id : constant Entity_Id := Protected_Body_Subprogram (PE_Id);
  
!          Barf_Id : Entity_Id;
!          Dummy   : Node_Id;
!          Rec     : Target_Rep_Record;
!          Spec_Id : Entity_Id;
  
!       begin
!          --  When the entry [family] has already been expanded, it carries both
!          --  the procedure which emulates the behavior of the entry [family] as
!          --  well as the barrier function.
  
!          if Present (Prot_Id) then
!             Barf_Id := Barrier_Function (PE_Id);
!             Spec_Id := Prot_Id;
  
!          --  Otherwise no expansion took place
  
!          else
!             Barf_Id := Empty;
!             Spec_Id := PE_Id;
!          end if;
  
!          Rec.Kind := Subprogram_Target;
  
!          Spec_And_Body_From_Entity
!            (Id        => Spec_Id,
!             Body_Decl => Rec.Body_Decl,
!             Spec_Decl => Rec.Spec_Decl);
  
!          --  Target-specific attributes
  
!          if Present (Barf_Id) then
!             Spec_And_Body_From_Entity
!               (Id        => Barf_Id,
!                Body_Decl => Rec.Field_1,  --  Barrier_Body_Declaration
!                Spec_Decl => Dummy);
!          end if;
  
!          return Rec;
!       end Create_Protected_Entry_Rep;
  
!       -------------------------------------
!       -- Create_Protected_Subprogram_Rep --
!       -------------------------------------
  
!       function Create_Protected_Subprogram_Rep
!         (PS_Id : Entity_Id) return Target_Rep_Record
!       is
!          Prot_Id : constant Entity_Id := Protected_Body_Subprogram (PS_Id);
!          Rec     : Target_Rep_Record;
!          Spec_Id : Entity_Id;
  
!       begin
!          --  When the protected subprogram has already been expanded, it
!          --  carries the subprogram which seizes the lock and invokes the
!          --  original statements.
  
!          if Present (Prot_Id) then
!             Spec_Id := Prot_Id;
  
!          --  Otherwise no expansion took place
  
!          else
!             Spec_Id := PS_Id;
!          end if;
  
!          Rec.Kind := Subprogram_Target;
  
!          Spec_And_Body_From_Entity
!            (Id        => Spec_Id,
!             Body_Decl => Rec.Body_Decl,
!             Spec_Decl => Rec.Spec_Decl);
  
!          return Rec;
!       end Create_Protected_Subprogram_Rep;
  
!       -------------------------------------
!       -- Create_Refined_State_Pragma_Rep --
!       -------------------------------------
  
!       function Create_Refined_State_Pragma_Rep
!         (Prag : Node_Id) return Scenario_Rep_Record
!       is
!          Rec : Scenario_Rep_Record;
  
!       begin
!          Rec.Elab_Checks_OK   := False;  --  not relevant
!          Rec.Elab_Warnings_OK := False;  --  not relevant
!          Rec.GM               :=
!            To_Ghost_Mode (Is_Ignored_Ghost_Pragma (Prag));
!          Rec.SM               := Is_Off_Or_Not_Specified;
!          Rec.Kind             := Refined_State_Pragma_Scenario;
!          Rec.Target           := Empty;
  
!          return Rec;
!       end Create_Refined_State_Pragma_Rep;
  
!       -------------------------
!       -- Create_Scenario_Rep --
!       -------------------------
  
!       function Create_Scenario_Rep
!         (N        : Node_Id;
!          In_State : Processing_In_State) return Scenario_Rep_Record
!       is
!          pragma Unreferenced (In_State);
  
!          Rec : Scenario_Rep_Record;
  
!       begin
!          if Is_Suitable_Access_Taken (N) then
!             Rec := Create_Access_Taken_Rep (N);
  
!          elsif Is_Suitable_Call (N) then
!             Rec := Create_Call_Or_Task_Activation_Rep (N);
  
!          elsif Is_Suitable_Instantiation (N) then
!             Rec := Create_Instantiation_Rep (N);
  
!          elsif Is_Suitable_SPARK_Derived_Type (N) then
!             Rec := Create_Derived_Type_Rep (N);
  
!          elsif Is_Suitable_SPARK_Refined_State_Pragma (N) then
!             Rec := Create_Refined_State_Pragma_Rep (N);
  
!          elsif Is_Suitable_Variable_Assignment (N) then
!             Rec := Create_Variable_Assignment_Rep (N);
  
!          elsif Is_Suitable_Variable_Reference (N) then
!             Rec := Create_Variable_Reference_Rep (N);
  
!          else
!             pragma Assert (False);
!             return Rec;
!          end if;
  
!          --  Common scenario attributes
  
!          Rec.Level := Find_Enclosing_Level (N);
  
!          return Rec;
!       end Create_Scenario_Rep;
  
!       ---------------------------
!       -- Create_Subprogram_Rep --
!       ---------------------------
  
!       function Create_Subprogram_Rep
!         (Subp_Id : Entity_Id) return Target_Rep_Record
!       is
!          Rec     : Target_Rep_Record;
!          Spec_Id : Entity_Id;
  
!       begin
!          Spec_Id := Subp_Id;
! 
!          --  The elaboration target denotes an internal function that returns a
!          --  constrained array type in a SPARK-to-C compilation. In this case
!          --  the function receives a corresponding procedure which has an out
!          --  parameter. The proper body for ABE checks and diagnostics is that
!          --  of the procedure.
! 
!          if Ekind (Spec_Id) = E_Function
!            and then Rewritten_For_C (Spec_Id)
!          then
!             Spec_Id := Corresponding_Procedure (Spec_Id);
!          end if;
! 
!          Rec.Kind := Subprogram_Target;
! 
!          Spec_And_Body_From_Entity
!            (Id        => Spec_Id,
!             Body_Decl => Rec.Body_Decl,
!             Spec_Decl => Rec.Spec_Decl);
! 
!          return Rec;
!       end Create_Subprogram_Rep;
! 
!       -----------------------
!       -- Create_Target_Rep --
!       -----------------------
! 
!       function Create_Target_Rep
!         (Id       : Entity_Id;
!          In_State : Processing_In_State) return Target_Rep_Record
!       is
!          Rec : Target_Rep_Record;
! 
!       begin
!          if Is_Generic_Unit (Id) then
!             Rec := Create_Generic_Rep (Id);
! 
!          elsif Is_Protected_Entry (Id) then
!             Rec := Create_Protected_Entry_Rep (Id);
! 
!          elsif Is_Protected_Subp (Id) then
!             Rec := Create_Protected_Subprogram_Rep (Id);
! 
!          elsif Is_Task_Entry (Id) then
!             Rec := Create_Task_Entry_Rep (Id);
! 
!          elsif Is_Task_Type (Id) then
!             Rec := Create_Task_Rep (Id);
! 
!          elsif Ekind_In (Id, E_Constant, E_Variable) then
!             Rec := Create_Variable_Rep (Id);
! 
!          elsif Ekind_In (Id, E_Entry,
!                              E_Function,
!                              E_Operator,
!                              E_Procedure)
!          then
!             Rec := Create_Subprogram_Rep (Id);
! 
!          elsif Ekind (Id) = E_Package then
!             Rec := Create_Package_Rep (Id);
  
           else
!             pragma Assert (False);
!             return Rec;
           end if;
  
!          --  Common target attributes
  
!          Rec.Elab_Checks_OK   := Is_Elaboration_Checks_OK_Id (Id);
!          Rec.Elab_Warnings_OK := Is_Elaboration_Warnings_OK_Id (Id);
!          Rec.GM               := Ghost_Mode_Of_Entity (Id);
!          Rec.SM               := SPARK_Mode_Of_Entity (Id);
!          Rec.Unit             := Find_Top_Unit (Id);
!          Rec.Version          := In_State.Representation;
  
!          return Rec;
!       end Create_Target_Rep;
  
!       ---------------------------
!       -- Create_Task_Entry_Rep --
!       ---------------------------
  
!       function Create_Task_Entry_Rep
!         (TE_Id : Entity_Id) return Target_Rep_Record
!       is
!          Task_Typ     : constant Entity_Id := Non_Private_View (Scope (TE_Id));
!          Task_Body_Id : constant Entity_Id := Task_Body_Procedure (Task_Typ);
  
!          Rec     : Target_Rep_Record;
!          Spec_Id : Entity_Id;
  
!       begin
!          --  The task type has already been expanded, it carries the procedure
!          --  which emulates the behavior of the task body.
  
!          if Present (Task_Body_Id) then
!             Spec_Id := Task_Body_Id;
  
!          --  Otherwise no expansion took place
  
!          else
!             Spec_Id := TE_Id;
!          end if;
  
!          Rec.Kind := Subprogram_Target;
  
!          Spec_And_Body_From_Entity
!            (Id        => Spec_Id,
!             Body_Decl => Rec.Body_Decl,
!             Spec_Decl => Rec.Spec_Decl);
  
!          return Rec;
!       end Create_Task_Entry_Rep;
  
!       ---------------------
!       -- Create_Task_Rep --
!       ---------------------
  
!       function Create_Task_Rep
!         (Task_Typ : Entity_Id) return Target_Rep_Record
!       is
!          Task_Body_Id : constant Entity_Id := Task_Body_Procedure (Task_Typ);
  
!          Rec     : Target_Rep_Record;
!          Spec_Id : Entity_Id;
  
!       begin
!          --  The task type has already been expanded, it carries the procedure
!          --  which emulates the behavior of the task body.
  
!          if Present (Task_Body_Id) then
!             Spec_Id := Task_Body_Id;
  
!          --  Otherwise no expansion took place
  
!          else
!             Spec_Id := Task_Typ;
!          end if;
  
!          Rec.Kind := Task_Target;
  
!          Spec_And_Body_From_Entity
!            (Id        => Spec_Id,
!             Body_Decl => Rec.Body_Decl,
!             Spec_Decl => Rec.Spec_Decl);
  
!          return Rec;
!       end Create_Task_Rep;
  
!       ------------------------------------
!       -- Create_Variable_Assignment_Rep --
!       ------------------------------------
  
!       function Create_Variable_Assignment_Rep
!         (Asmt : Node_Id) return Scenario_Rep_Record
!       is
!          Var_Id : constant Entity_Id := Entity (Assignment_Target (Asmt));
!          Rec    : Scenario_Rep_Record;
  
!       begin
!          Rec.Elab_Checks_OK   := Is_Elaboration_Checks_OK_Node (Asmt);
!          Rec.Elab_Warnings_OK := Is_Elaboration_Warnings_OK_Id (Var_Id);
!          Rec.GM               := Ghost_Mode_Of_Node (Asmt);
!          Rec.SM               := SPARK_Mode_Of_Node (Asmt);
!          Rec.Kind             := Variable_Assignment_Scenario;
!          Rec.Target           := Var_Id;
  
!          return Rec;
!       end Create_Variable_Assignment_Rep;
  
!       -----------------------------------
!       -- Create_Variable_Reference_Rep --
!       -----------------------------------
  
!       function Create_Variable_Reference_Rep
!         (Ref : Node_Id) return Scenario_Rep_Record
!       is
!          Rec : Scenario_Rep_Record;
  
!       begin
!          Rec.Elab_Checks_OK   := Is_Elaboration_Checks_OK_Node (Ref);
!          Rec.Elab_Warnings_OK := Is_Elaboration_Warnings_OK_Node (Ref);
!          Rec.GM               := Ghost_Mode_Of_Node (Ref);
!          Rec.SM               := SPARK_Mode_Of_Node (Ref);
!          Rec.Kind             := Variable_Reference_Scenario;
!          Rec.Target           := Target (Ref);
  
!          --  Scenario-specific attributes
  
!          Rec.Flag_1 := Is_Read (Ref);  --  Is_Read_Reference
  
!          return Rec;
!       end Create_Variable_Reference_Rep;
  
!       -------------------------
!       -- Create_Variable_Rep --
!       -------------------------
  
!       function Create_Variable_Rep
!         (Var_Id : Entity_Id) return Target_Rep_Record
!       is
!          Rec : Target_Rep_Record;
  
!       begin
!          Rec.Kind := Variable_Target;
  
!          --  Target-specific attributes
  
!          Rec.Field_1 := Declaration_Node (Var_Id);  --  Variable_Declaration
  
!          return Rec;
!       end Create_Variable_Rep;
  
!       -------------
!       -- Destroy --
!       -------------
  
!       procedure Destroy (S_Id : in out Scenario_Rep_Id) is
!          pragma Unreferenced (S_Id);
!       begin
!          null;
!       end Destroy;
  
!       -------------
!       -- Destroy --
!       -------------
  
!       procedure Destroy (T_Id : in out Target_Rep_Id) is
!          pragma Unreferenced (T_Id);
!       begin
!          null;
!       end Destroy;
  
!       --------------------------------
!       -- Disable_Elaboration_Checks --
!       --------------------------------
  
!       procedure Disable_Elaboration_Checks (S_Id : Scenario_Rep_Id) is
!          pragma Assert (Present (S_Id));
!       begin
!          Scenario_Reps.Table (S_Id).Elab_Checks_OK := False;
!       end Disable_Elaboration_Checks;
  
!       --------------------------------
!       -- Disable_Elaboration_Checks --
!       --------------------------------
  
!       procedure Disable_Elaboration_Checks (T_Id : Target_Rep_Id) is
!          pragma Assert (Present (T_Id));
!       begin
!          Target_Reps.Table (T_Id).Elab_Checks_OK := False;
!       end Disable_Elaboration_Checks;
  
!       ---------------------------
!       -- Elaboration_Checks_OK --
!       ---------------------------
  
!       function Elaboration_Checks_OK (S_Id : Scenario_Rep_Id) return Boolean is
!          pragma Assert (Present (S_Id));
!       begin
!          return Scenario_Reps.Table (S_Id).Elab_Checks_OK;
!       end Elaboration_Checks_OK;
  
!       ---------------------------
!       -- Elaboration_Checks_OK --
!       ---------------------------
  
!       function Elaboration_Checks_OK (T_Id : Target_Rep_Id) return Boolean is
!          pragma Assert (Present (T_Id));
!       begin
!          return Target_Reps.Table (T_Id).Elab_Checks_OK;
!       end Elaboration_Checks_OK;
  
!       -----------------------------
!       -- Elaboration_Warnings_OK --
!       -----------------------------
  
!       function Elaboration_Warnings_OK
!         (S_Id : Scenario_Rep_Id) return Boolean
!       is
!          pragma Assert (Present (S_Id));
!       begin
!          return Scenario_Reps.Table (S_Id).Elab_Warnings_OK;
!       end Elaboration_Warnings_OK;
  
!       -----------------------------
!       -- Elaboration_Warnings_OK --
!       -----------------------------
  
!       function Elaboration_Warnings_OK (T_Id : Target_Rep_Id) return Boolean is
!          pragma Assert (Present (T_Id));
!       begin
!          return Target_Reps.Table (T_Id).Elab_Warnings_OK;
!       end Elaboration_Warnings_OK;
  
!       --------------------------------------
!       -- Finalize_Internal_Representation --
!       --------------------------------------
  
!       procedure Finalize_Internal_Representation is
!       begin
!          ETT_Map.Destroy (Entity_To_Target_Map);
!          NTS_Map.Destroy (Node_To_Scenario_Map);
!       end Finalize_Internal_Representation;
  
!       -------------------
!       -- Ghost_Mode_Of --
!       -------------------
  
!       function Ghost_Mode_Of
!         (S_Id : Scenario_Rep_Id) return Extended_Ghost_Mode
!       is
!          pragma Assert (Present (S_Id));
!       begin
!          return Scenario_Reps.Table (S_Id).GM;
!       end Ghost_Mode_Of;
  
!       -------------------
!       -- Ghost_Mode_Of --
!       -------------------
  
!       function Ghost_Mode_Of
!         (T_Id : Target_Rep_Id) return Extended_Ghost_Mode
!       is
!          pragma Assert (Present (T_Id));
!       begin
!          return Target_Reps.Table (T_Id).GM;
!       end Ghost_Mode_Of;
  
!       --------------------------
!       -- Ghost_Mode_Of_Entity --
!       --------------------------
  
!       function Ghost_Mode_Of_Entity
!         (Id : Entity_Id) return Extended_Ghost_Mode
!       is
!       begin
!          return To_Ghost_Mode (Is_Ignored_Ghost_Entity (Id));
!       end Ghost_Mode_Of_Entity;
  
!       ------------------------
!       -- Ghost_Mode_Of_Node --
!       ------------------------
  
!       function Ghost_Mode_Of_Node (N : Node_Id) return Extended_Ghost_Mode is
!       begin
!          return To_Ghost_Mode (Is_Ignored_Ghost_Node (N));
!       end Ghost_Mode_Of_Node;
  
!       ----------------------------------------
!       -- Initialize_Internal_Representation --
!       ----------------------------------------
  
!       procedure Initialize_Internal_Representation is
!       begin
!          Entity_To_Target_Map := ETT_Map.Create (500);
!          Node_To_Scenario_Map := NTS_Map.Create (500);
!       end Initialize_Internal_Representation;
  
!       -------------------------
!       -- Is_Dispatching_Call --
!       -------------------------
  
!       function Is_Dispatching_Call (S_Id : Scenario_Rep_Id) return Boolean is
!          pragma Assert (Present (S_Id));
!          pragma Assert (Kind (S_Id) = Call_Scenario);
  
!       begin
!          return Scenario_Reps.Table (S_Id).Flag_1;
!       end Is_Dispatching_Call;
  
!       -----------------------
!       -- Is_Read_Reference --
!       -----------------------
  
!       function Is_Read_Reference (S_Id : Scenario_Rep_Id) return Boolean is
!          pragma Assert (Present (S_Id));
!          pragma Assert (Kind (S_Id) = Variable_Reference_Scenario);
  
!       begin
!          return Scenario_Reps.Table (S_Id).Flag_1;
!       end Is_Read_Reference;
  
!       ----------
!       -- Kind --
!       ----------
  
!       function Kind (S_Id : Scenario_Rep_Id) return Scenario_Kind is
!          pragma Assert (Present (S_Id));
!       begin
!          return Scenario_Reps.Table (S_Id).Kind;
!       end Kind;
  
!       ----------
!       -- Kind --
!       ----------
  
!       function Kind (T_Id : Target_Rep_Id) return Target_Kind is
!          pragma Assert (Present (T_Id));
!       begin
!          return Target_Reps.Table (T_Id).Kind;
!       end Kind;
  
!       -----------
!       -- Level --
!       -----------
  
!       function Level (S_Id : Scenario_Rep_Id) return Enclosing_Level_Kind is
!          pragma Assert (Present (S_Id));
!       begin
!          return Scenario_Reps.Table (S_Id).Level;
!       end Level;
  
!       -------------
!       -- Present --
!       -------------
  
!       function Present (S_Id : Scenario_Rep_Id) return Boolean is
!       begin
!          return S_Id /= No_Scenario_Rep;
!       end Present;
  
!       -------------
!       -- Present --
!       -------------
  
!       function Present (T_Id : Target_Rep_Id) return Boolean is
!       begin
!          return T_Id /= No_Target_Rep;
!       end Present;
  
!       --------------------------------
!       -- Scenario_Representation_Of --
!       --------------------------------
  
!       function Scenario_Representation_Of
!         (N        : Node_Id;
!          In_State : Processing_In_State) return Scenario_Rep_Id
!       is
!          S_Id : Scenario_Rep_Id;
  
!       begin
!          S_Id := NTS_Map.Get (Node_To_Scenario_Map, N);
  
!          --  The elaboration scenario lacks a representation. This indicates
!          --  that the scenario is encountered for the first time. Create the
!          --  representation of it.
  
!          if not Present (S_Id) then
!             Scenario_Reps.Append (Create_Scenario_Rep (N, In_State));
!             S_Id := Scenario_Reps.Last;
  
!             --  Associate the internal representation with the elaboration
!             --  scenario.
  
!             NTS_Map.Put (Node_To_Scenario_Map, N, S_Id);
!          end if;
  
!          pragma Assert (Present (S_Id));
  
!          return S_Id;
!       end Scenario_Representation_Of;
  
!       --------------------------------
!       -- Set_Activated_Task_Objects --
!       --------------------------------
  
!       procedure Set_Activated_Task_Objects
!         (S_Id      : Scenario_Rep_Id;
!          Task_Objs : NE_List.Doubly_Linked_List)
!       is
!          pragma Assert (Present (S_Id));
!          pragma Assert (Kind (S_Id) = Task_Activation_Scenario);
  
!       begin
!          Scenario_Reps.Table (S_Id).List_1 := Task_Objs;
!       end Set_Activated_Task_Objects;
  
!       -----------------------------
!       -- Set_Activated_Task_Type --
!       -----------------------------
  
!       procedure Set_Activated_Task_Type
!         (S_Id     : Scenario_Rep_Id;
!          Task_Typ : Entity_Id)
!       is
!          pragma Assert (Present (S_Id));
!          pragma Assert (Kind (S_Id) = Task_Activation_Scenario);
  
!       begin
!          Scenario_Reps.Table (S_Id).Field_1 := Task_Typ;
!       end Set_Activated_Task_Type;
  
!       -------------------
!       -- SPARK_Mode_Of --
!       -------------------
  
!       function SPARK_Mode_Of
!         (S_Id : Scenario_Rep_Id) return Extended_SPARK_Mode
!       is
!          pragma Assert (Present (S_Id));
!       begin
!          return Scenario_Reps.Table (S_Id).SM;
!       end SPARK_Mode_Of;
  
!       -------------------
!       -- SPARK_Mode_Of --
!       -------------------
  
!       function SPARK_Mode_Of
!         (T_Id : Target_Rep_Id) return Extended_SPARK_Mode
!       is
!          pragma Assert (Present (T_Id));
!       begin
!          return Target_Reps.Table (T_Id).SM;
!       end SPARK_Mode_Of;
  
!       --------------------------
!       -- SPARK_Mode_Of_Entity --
!       --------------------------
  
!       function SPARK_Mode_Of_Entity
!         (Id : Entity_Id) return Extended_SPARK_Mode
!       is
!          Prag : constant Node_Id := SPARK_Pragma (Id);
  
!       begin
!          return
!            To_SPARK_Mode
!              (Present (Prag)
!                and then Get_SPARK_Mode_From_Annotation (Prag) = On);
!       end SPARK_Mode_Of_Entity;
  
!       ------------------------
!       -- SPARK_Mode_Of_Node --
!       ------------------------
  
!       function SPARK_Mode_Of_Node (N : Node_Id) return Extended_SPARK_Mode is
!       begin
!          return To_SPARK_Mode (Is_SPARK_Mode_On_Node (N));
!       end SPARK_Mode_Of_Node;
  
!       ----------------------
!       -- Spec_Declaration --
!       ----------------------
  
!       function Spec_Declaration (T_Id : Target_Rep_Id) return Node_Id is
!          pragma Assert (Present (T_Id));
!       begin
!          return Target_Reps.Table (T_Id).Spec_Decl;
!       end Spec_Declaration;
  
!       ------------
!       -- Target --
!       ------------
  
!       function Target (S_Id : Scenario_Rep_Id) return Entity_Id is
!          pragma Assert (Present (S_Id));
!       begin
!          return Scenario_Reps.Table (S_Id).Target;
!       end Target;
  
!       ------------------------------
!       -- Target_Representation_Of --
!       ------------------------------
  
!       function Target_Representation_Of
!         (Id       : Entity_Id;
!          In_State : Processing_In_State) return Target_Rep_Id
!       is
!          T_Id : Target_Rep_Id;
  
!       begin
!          T_Id := ETT_Map.Get (Entity_To_Target_Map, Id);
  
!          --  The elaboration target lacks an internal representation. This
!          --  indicates that the target is encountered for the first time.
!          --  Create the internal representation of it.
  
!          if not Present (T_Id) then
!             Target_Reps.Append (Create_Target_Rep (Id, In_State));
!             T_Id := Target_Reps.Last;
  
!             --  Associate the internal representation with the elaboration
!             --  target.
  
!             ETT_Map.Put (Entity_To_Target_Map, Id, T_Id);
  
!          --  The Processing phase is working with a partially analyzed tree,
!          --  where various attributes become available as analysis continues.
!          --  This case arrises in the context of guaranteed ABE processing.
!          --  Update the existing representation by including new attributes.
  
!          elsif In_State.Representation = Inconsistent_Representation then
!             Target_Reps.Table (T_Id) := Create_Target_Rep (Id, In_State);
  
!          --  Otherwise the Processing phase imposes a particular representation
!          --  version which is not satisfied by the target. This case arrises
!          --  when the Processing phase switches from guaranteed ABE checks and
!          --  diagnostics to some other mode of operation. Update the existing
!          --  representation to include all attributes.
  
!          elsif In_State.Representation /= Version (T_Id) then
!             Target_Reps.Table (T_Id) := Create_Target_Rep (Id, In_State);
!          end if;
  
!          pragma Assert (Present (T_Id));
  
!          return T_Id;
!       end Target_Representation_Of;
  
!       -------------------
!       -- To_Ghost_Mode --
!       -------------------
  
!       function To_Ghost_Mode
!         (Ignored_Status : Boolean) return Extended_Ghost_Mode
!       is
!       begin
!          if Ignored_Status then
!             return Is_Ignored;
!          else
!             return Is_Checked_Or_Not_Specified;
!          end if;
!       end To_Ghost_Mode;
  
!       -------------------
!       -- To_SPARK_Mode --
!       -------------------
  
!       function To_SPARK_Mode
!         (On_Status : Boolean) return Extended_SPARK_Mode
!       is
!       begin
!          if On_Status then
!             return Is_On;
!          else
!             return Is_Off_Or_Not_Specified;
!          end if;
!       end To_SPARK_Mode;
! 
!       ----------
!       -- Unit --
!       ----------
! 
!       function Unit (T_Id : Target_Rep_Id) return Entity_Id is
!          pragma Assert (Present (T_Id));
!       begin
!          return Target_Reps.Table (T_Id).Unit;
!       end Unit;
! 
!       --------------------------
!       -- Variable_Declaration --
!       --------------------------
! 
!       function Variable_Declaration (T_Id : Target_Rep_Id) return Node_Id is
!          pragma Assert (Present (T_Id));
!          pragma Assert (Kind (T_Id) = Variable_Target);
! 
!       begin
!          return Target_Reps.Table (T_Id).Field_1;
!       end Variable_Declaration;
! 
!       -------------
!       -- Version --
!       -------------
! 
!       function Version (T_Id : Target_Rep_Id) return Representation_Kind is
!          pragma Assert (Present (T_Id));
!       begin
!          return Target_Reps.Table (T_Id).Version;
!       end Version;
!    end Internal_Representation;
  
     ----------------------
!    -- Invocation_Graph --
     ----------------------
  
!    package body Invocation_Graph is
  
!       -----------
!       -- Types --
!       -----------
  
!       --  The following type represents simplified version of an invocation
!       --  relation.
  
!       type Invoker_Target_Relation is record
!          Invoker : Entity_Id := Empty;
!          Target  : Entity_Id := Empty;
!       end record;
  
!       --  The following variables define the entities of the dummy elaboration
!       --  procedures used as origins of library level paths.
  
!       Elab_Body_Id : Entity_Id := Empty;
!       Elab_Spec_Id : Entity_Id := Empty;
  
!       ---------------------
!       -- Data structures --
!       ---------------------
  
!       --  The following set contains all declared invocation constructs. It
!       --  ensures that the same construct is not declared multiple times in
!       --  the ALI file of the main unit.
  
!       Saved_Constructs_Set : NE_Set.Membership_Set := NE_Set.Nil;
  
!       function Hash (Key : Invoker_Target_Relation) return Bucket_Range_Type;
!       --  Obtain the hash value of pair Key
  
!       package IR_Set is new Membership_Sets
!         (Element_Type => Invoker_Target_Relation,
!          "="          => "=",
!          Hash         => Hash);
  
!       --  The following set contains all recorded simple invocation relations.
!       --  It ensures that multiple relations involving the same invoker and
!       --  target do not appear in the ALI file of the main unit.
  
!       Saved_Relations_Set : IR_Set.Membership_Set := IR_Set.Nil;
  
!       --------------
!       -- Builders --
!       --------------
  
!       function Signature_Of (Id : Entity_Id) return Invocation_Signature_Id;
!       pragma Inline (Signature_Of);
!       --  Obtain the invication signature id of arbitrary entity Id
  
!       -----------------------
!       -- Local subprograms --
!       -----------------------
  
!       procedure Build_Elaborate_Body_Procedure;
!       pragma Inline (Build_Elaborate_Body_Procedure);
!       --  Create a dummy elaborate body procedure and store its entity in
!       --  Elab_Body_Id.
  
!       procedure Build_Elaborate_Procedure
!         (Proc_Id  : out Entity_Id;
!          Proc_Nam : Name_Id;
!          Loc      : Source_Ptr);
!       pragma Inline (Build_Elaborate_Procedure);
!       --  Create a dummy elaborate procedure with name Proc_Nam and source
!       --  location Loc. The entity is returned in Proc_Id.
  
!       procedure Build_Elaborate_Spec_Procedure;
!       pragma Inline (Build_Elaborate_Spec_Procedure);
!       --  Create a dummy elaborate spec procedure and store its entity in
!       --  Elab_Spec_Id.
  
!       function Build_Subprogram_Invocation
!         (Subp_Id : Entity_Id) return Node_Id;
!       pragma Inline (Build_Subprogram_Invocation);
!       --  Create a dummy call marker that invokes subprogram Subp_Id
  
!       function Build_Task_Activation
!         (Task_Typ : Entity_Id;
!          In_State : Processing_In_State) return Node_Id;
!       pragma Inline (Build_Task_Activation);
!       --  Create a dummy call marker that activates an anonymous task object of
!       --  type Task_Typ.
  
!       procedure Declare_Invocation_Construct
!         (Constr_Id : Entity_Id;
!          In_State  : Processing_In_State);
!       pragma Inline (Declare_Invocation_Construct);
!       --  Declare invocation construct Constr_Id by creating a declaration for
!       --  it in the ALI file of the main unit. In_State is the current state of
!       --  the Processing phase.
  
!       function Invocation_Graph_Recording_OK return Boolean;
!       pragma Inline (Invocation_Graph_Recording_OK);
!       --  Determine whether the invocation graph can be recorded
  
!       function Is_Invocation_Scenario (N : Node_Id) return Boolean;
!       pragma Inline (Is_Invocation_Scenario);
!       --  Determine whether node N is a suitable scenario for invocation graph
!       --  recording purposes.
  
!       function Is_Invocation_Target (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Invocation_Target);
!       --  Determine whether arbitrary entity Id denotes an invocation target
  
!       function Is_Saved_Construct (Constr : Entity_Id) return Boolean;
!       pragma Inline (Is_Saved_Construct);
!       --  Determine whether invocation construct Constr has already been
!       --  declared in the ALI file of the main unit.
  
!       function Is_Saved_Relation
!         (Rel : Invoker_Target_Relation) return Boolean;
!       pragma Inline (Is_Saved_Relation);
!       --  Determine whether simple invocation relation Rel has already been
!       --  recorded in the ALI file of the main unit.
  
!       procedure Process_Declarations
!         (Decls    : List_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Declarations);
!       --  Process declaration list Decls by processing all invocation scenarios
!       --  within it.
  
!       procedure Process_Freeze_Node
!         (Fnode    : Node_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Freeze_Node);
!       --  Process freeze node Fnode by processing all invocation scenarios in
!       --  its Actions list.
  
!       procedure Process_Invocation_Activation
!         (Call     : Node_Id;
!          Call_Rep : Scenario_Rep_Id;
!          Obj_Id   : Entity_Id;
!          Obj_Rep  : Target_Rep_Id;
!          Task_Typ : Entity_Id;
!          Task_Rep : Target_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Invocation_Activation);
!       --  Process activation call Call which activates object Obj_Id of task
!       --  type Task_Typ by processing all invocation scenarios within the task
!       --  body. Call_Rep is the representation of the call. Obj_Rep denotes the
!       --  representation of the object. Task_Rep is the representation of the
!       --  task type. In_State is the current state of the Processing phase.
  
!       procedure Process_Invocation_Body_Scenarios;
!       pragma Inline (Process_Invocation_Body_Scenarios);
!       --  Process all library level body scenarios
  
!       procedure Process_Invocation_Call
!         (Call     : Node_Id;
!          Call_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Invocation_Call);
!       --  Process invocation call scenario Call with representation Call_Rep.
!       --  In_State is the current state of the Processing phase.
  
!       procedure Process_Invocation_Instantiation
!         (Inst     : Node_Id;
!          Inst_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Invocation_Instantiation);
!       --  Process invocation instantiation scenario Inst with representation
!       --  Inst_Rep. In_State is the current state of the Processing phase.
  
!       procedure Process_Invocation_Scenario
!         (N        : Node_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Invocation_Scenario);
!       --  Process single invocation scenario N. In_State is the current state
!       --  of the Processing phase.
  
!       procedure Process_Invocation_Scenarios
!         (Iter     : in out NE_Set.Iterator;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Invocation_Scenarios);
!       --  Process all invocation scenarios obtained via iterator Iter. In_State
!       --  is the current state of the Processing phase.
  
!       procedure Process_Invocation_Spec_Scenarios;
!       pragma Inline (Process_Invocation_Spec_Scenarios);
!       --  Process all library level spec scenarios
  
!       procedure Process_Main_Unit;
!       pragma Inline (Process_Main_Unit);
!       --  Process all invocation scenarios within the main unit
  
!       procedure Process_Package_Declaration
!         (Pack_Decl : Node_Id;
!          In_State  : Processing_In_State);
!       pragma Inline (Process_Package_Declaration);
!       --  Process package declaration Pack_Decl by processing all invocation
!       --  scenarios in its visible and private declarations. If the main unit
!       --  contains a generic, the declarations of the body are also examined.
!       --  In_State is the current state of the Processing phase.
  
!       procedure Process_Protected_Type_Declaration
!         (Prot_Decl : Node_Id;
!          In_State  : Processing_In_State);
!       pragma Inline (Process_Protected_Type_Declaration);
!       --  Process the declarations of protected type Prot_Decl. In_State is the
!       --  current state of the Processing phase.
  
!       procedure Process_Subprogram_Declaration
!         (Subp_Decl : Node_Id;
!          In_State  : Processing_In_State);
!       pragma Inline (Process_Subprogram_Declaration);
!       --  Process subprogram declaration Subp_Decl by processing all invocation
!       --  scenarios within its body. In_State denotes the current state of the
!       --  Processing phase.
  
!       procedure Process_Subprogram_Instantiation
!         (Inst     : Node_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_Subprogram_Instantiation);
!       --  Process subprogram instantiation Inst. In_State is the current state
!       --  of the Processing phase.
  
!       procedure Process_Task_Type_Declaration
!         (Task_Decl : Node_Id;
!          In_State  : Processing_In_State);
!       pragma Inline (Process_Task_Type_Declaration);
!       --  Process task declaration Task_Decl by processing all invocation
!       --  scenarios within its body. In_State is the current state of the
!       --  Processing phase.
  
!       procedure Record_Full_Invocation_Path (In_State : Processing_In_State);
!       pragma Inline (Record_Full_Invocation_Path);
!       --  Record all relations between scenario pairs found in the stack of
!       --  active scenarios. In_State is the current state of the Processing
!       --  phase.
  
!       procedure Record_Invocation_Graph_Encoding;
!       pragma Inline (Record_Invocation_Graph_Encoding);
!       --  Record the encoding format used to capture information related to
!       --  invocation constructs and relations.
  
!       procedure Record_Invocation_Path (In_State : Processing_In_State);
!       pragma Inline (Record_Invocation_Path);
!       --  Record the invocation relations found within the path represented in
!       --  the active scenario stack. In_State denotes the current state of the
!       --  Processing phase.
  
!       procedure Record_Simple_Invocation_Path (In_State : Processing_In_State);
!       pragma Inline (Record_Simple_Invocation_Path);
!       --  Record a single relation from the start to the end of the stack of
!       --  active scenarios. In_State is the current state of the Processing
!       --  phase.
  
!       procedure Record_Invocation_Relation
!         (Invk_Id  : Entity_Id;
!          Targ_Id  : Entity_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Record_Invocation_Relation);
!       --  Record an invocation relation with invoker Invk_Id and target Targ_Id
!       --  by creating an entry for it in the ALI file of the main unit. Formal
!       --  In_State denotes the current state of the Processing phase.
  
!       procedure Set_Is_Saved_Construct
!         (Constr : Entity_Id;
!          Val    : Boolean := True);
!       pragma Inline (Set_Is_Saved_Construct);
!       --  Mark invocation construct Constr as declared in the ALI file of the
!       --  main unit depending on value Val.
  
!       procedure Set_Is_Saved_Relation
!         (Rel : Invoker_Target_Relation;
!          Val : Boolean := True);
!       pragma Inline (Set_Is_Saved_Relation);
!       --  Mark simple invocation relation Rel as recorded in the ALI file of
!       --  the main unit depending on value Val.
  
!       function Target_Of
!         (Pos      : Active_Scenario_Pos;
!          In_State : Processing_In_State) return Entity_Id;
!       pragma Inline (Target_Of);
!       --  Given position within the active scenario stack Pos, obtain the
!       --  target of the indicated scenario. In_State is the current state
!       --  of the Processing phase.
  
!       procedure Traverse_Invocation_Body
!         (N        : Node_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Traverse_Invocation_Body);
!       --  Traverse subprogram body N looking for suitable invocation scenarios
!       --  that need to be processed for invocation graph recording purposes.
!       --  In_State is the current state of the Processing phase.
  
!       procedure Write_Invocation_Path (In_State : Processing_In_State);
!       pragma Inline (Write_Invocation_Path);
!       --  Write out a path represented by the active scenario on the stack to
!       --  standard output. In_State denotes the current state of the Processing
!       --  phase.
  
!       ------------------------------------
!       -- Build_Elaborate_Body_Procedure --
!       ------------------------------------
  
!       procedure Build_Elaborate_Body_Procedure is
!          Body_Decl : Node_Id;
!          Spec_Decl : Node_Id;
  
!       begin
!          --  Nothing to do when a previous call already created the procedure
  
!          if Present (Elab_Body_Id) then
!             return;
!          end if;
  
!          Spec_And_Body_From_Entity
!            (Id        => Main_Unit_Entity,
!             Body_Decl => Body_Decl,
!             Spec_Decl => Spec_Decl);
  
!          pragma Assert (Present (Body_Decl));
  
!          Build_Elaborate_Procedure
!            (Proc_Id  => Elab_Body_Id,
!             Proc_Nam => Name_B,
!             Loc      => Sloc (Body_Decl));
!       end Build_Elaborate_Body_Procedure;
  
!       -------------------------------
!       -- Build_Elaborate_Procedure --
!       -------------------------------
  
!       procedure Build_Elaborate_Procedure
!         (Proc_Id  : out Entity_Id;
!          Proc_Nam : Name_Id;
!          Loc      : Source_Ptr)
!       is
!          Proc_Decl : Node_Id;
!          pragma Unreferenced (Proc_Decl);
  
!       begin
!          Proc_Id := Make_Defining_Identifier (Loc, Proc_Nam);
  
!          --  Partially decorate the elaboration procedure because it will not
!          --  be insertred into the tree and analyzed.
  
!          Set_Ekind (Proc_Id, E_Procedure);
!          Set_Etype (Proc_Id, Standard_Void_Type);
!          Set_Scope (Proc_Id, Unique_Entity (Main_Unit_Entity));
  
!          --  Create a dummy declaration for the elaboration procedure. The
!          --  declaration does not need to be syntactically legal, but must
!          --  carry an accurate source location.
  
!          Proc_Decl :=
!            Make_Subprogram_Body (Loc,
!              Specification              =>
!                Make_Procedure_Specification (Loc,
!                  Defining_Unit_Name => Proc_Id),
!              Declarations               => No_List,
!              Handled_Statement_Sequence => Empty);
!       end Build_Elaborate_Procedure;
  
!       ------------------------------------
!       -- Build_Elaborate_Spec_Procedure --
!       ------------------------------------
  
!       procedure Build_Elaborate_Spec_Procedure is
!          Body_Decl : Node_Id;
!          Spec_Decl : Node_Id;
  
!       begin
!          --  Nothing to do when a previous call already created the procedure
  
!          if Present (Elab_Spec_Id) then
!             return;
!          end if;
  
!          Spec_And_Body_From_Entity
!            (Id        => Main_Unit_Entity,
!             Body_Decl => Body_Decl,
!             Spec_Decl => Spec_Decl);
  
!          pragma Assert (Present (Spec_Decl));
  
!          Build_Elaborate_Procedure
!            (Proc_Id  => Elab_Spec_Id,
!             Proc_Nam => Name_S,
!             Loc      => Sloc (Spec_Decl));
!       end Build_Elaborate_Spec_Procedure;
  
!       ---------------------------------
!       -- Build_Subprogram_Invocation --
!       ---------------------------------
  
!       function Build_Subprogram_Invocation
!         (Subp_Id : Entity_Id) return Node_Id
!       is
!          Marker    : constant Node_Id := Make_Call_Marker (Sloc (Subp_Id));
!          Subp_Decl : constant Node_Id := Unit_Declaration_Node (Subp_Id);
  
!       begin
!          --  Create a dummy call marker which invokes the subprogram
  
!          Set_Is_Declaration_Level_Node       (Marker, False);
!          Set_Is_Dispatching_Call             (Marker, False);
!          Set_Is_Elaboration_Checks_OK_Node   (Marker, False);
!          Set_Is_Elaboration_Warnings_OK_Node (Marker, False);
!          Set_Is_Ignored_Ghost_Node           (Marker, False);
!          Set_Is_Source_Call                  (Marker, False);
!          Set_Is_SPARK_Mode_On_Node           (Marker, False);
  
!          --  Invoke the uniform canonical entity of the subprogram
  
+          Set_Target (Marker, Canonical_Subprogram (Subp_Id));
+ 
+          --  Partially insert the marker into the tree
+ 
+          Set_Parent (Marker, Parent (Subp_Decl));
+ 
+          return Marker;
+       end Build_Subprogram_Invocation;
+ 
+       ---------------------------
+       -- Build_Task_Activation --
+       ---------------------------
+ 
+       function Build_Task_Activation
+         (Task_Typ : Entity_Id;
+          In_State : Processing_In_State) return Node_Id
+       is
+          Loc       : constant Source_Ptr := Sloc (Task_Typ);
+          Marker    : constant Node_Id    := Make_Call_Marker (Loc);
+          Task_Decl : constant Node_Id    := Unit_Declaration_Node (Task_Typ);
+ 
+          Activ_Id      : Entity_Id;
+          Marker_Rep_Id : Scenario_Rep_Id;
+          Task_Obj      : Entity_Id;
+          Task_Objs     : NE_List.Doubly_Linked_List;
+ 
+       begin
+          --  Create a dummy call marker which activates some tasks
+ 
+          Set_Is_Declaration_Level_Node       (Marker, False);
+          Set_Is_Dispatching_Call             (Marker, False);
+          Set_Is_Elaboration_Checks_OK_Node   (Marker, False);
+          Set_Is_Elaboration_Warnings_OK_Node (Marker, False);
+          Set_Is_Ignored_Ghost_Node           (Marker, False);
+          Set_Is_Source_Call                  (Marker, False);
+          Set_Is_SPARK_Mode_On_Node           (Marker, False);
+ 
+          --  Invoke the appropriate version of Activate_Tasks
+ 
+          if Restricted_Profile then
+             Activ_Id := RTE (RE_Activate_Restricted_Tasks);
           else
!             Activ_Id := RTE (RE_Activate_Tasks);
           end if;
  
!          Set_Target (Marker, Activ_Id);
  
!          --  Partially insert the marker into the tree
  
!          Set_Parent (Marker, Parent (Task_Decl));
  
!          --  Create a dummy task object. Partially decorate the object because
!          --  it will not be inserted into the tree and analyzed.
  
!          Task_Obj := Make_Temporary (Loc, 'T');
!          Set_Ekind (Task_Obj, E_Variable);
!          Set_Etype (Task_Obj, Task_Typ);
  
!          --  Associate the dummy task object with the activation call
  
!          Task_Objs := NE_List.Create;
!          NE_List.Append (Task_Objs, Task_Obj);
  
!          Marker_Rep_Id := Scenario_Representation_Of (Marker, In_State);
!          Set_Activated_Task_Objects (Marker_Rep_Id, Task_Objs);
!          Set_Activated_Task_Type    (Marker_Rep_Id, Task_Typ);
  
!          return Marker;
!       end Build_Task_Activation;
  
!       ----------------------------------
!       -- Declare_Invocation_Construct --
!       ----------------------------------
  
!       procedure Declare_Invocation_Construct
!         (Constr_Id : Entity_Id;
!          In_State  : Processing_In_State)
!       is
!          function Body_Placement_Of
!            (Id : Entity_Id) return Declaration_Placement_Kind;
!          pragma Inline (Body_Placement_Of);
!          --  Obtain the placement of arbitrary entity Id's body
  
!          function Declaration_Placement_Of_Node
!            (N : Node_Id) return Declaration_Placement_Kind;
!          pragma Inline (Declaration_Placement_Of_Node);
!          --  Obtain the placement of arbitrary node N
  
!          function Kind_Of (Id : Entity_Id) return Invocation_Construct_Kind;
!          pragma Inline (Kind_Of);
!          --  Obtain the invocation construct kind of arbitrary entity Id
  
!          function Spec_Placement_Of
!            (Id : Entity_Id) return Declaration_Placement_Kind;
!          pragma Inline (Spec_Placement_Of);
!          --  Obtain the placement of arbitrary entity Id's spec
  
!          -----------------------
!          -- Body_Placement_Of --
!          -----------------------
  
!          function Body_Placement_Of
!            (Id : Entity_Id) return Declaration_Placement_Kind
!          is
!             Id_Rep    : constant Target_Rep_Id :=
!                           Target_Representation_Of (Id, In_State);
!             Body_Decl : constant Node_Id := Body_Declaration (Id_Rep);
!             Spec_Decl : constant Node_Id := Spec_Declaration (Id_Rep);
  
!          begin
!             --  The entity has a body
  
!             if Present (Body_Decl) then
!                return Declaration_Placement_Of_Node (Body_Decl);
  
!             --  Otherwise the entity must have a spec
  
!             else
!                pragma Assert (Present (Spec_Decl));
!                return Declaration_Placement_Of_Node (Spec_Decl);
!             end if;
!          end Body_Placement_Of;
  
!          -----------------------------------
!          -- Declaration_Placement_Of_Node --
!          -----------------------------------
  
!          function Declaration_Placement_Of_Node
!            (N : Node_Id) return Declaration_Placement_Kind
!          is
!             Main_Unit_Id : constant Entity_Id := Main_Unit_Entity;
!             N_Unit_Id    : constant Entity_Id := Find_Top_Unit (N);
  
!          begin
!             --  The node is in the main unit, its placement depends on the main
!             --  unit kind.
! 
!             if N_Unit_Id = Main_Unit_Id then
! 
!                --  The main unit is a body
! 
!                if Ekind_In (Main_Unit_Id, E_Package_Body,
!                                           E_Subprogram_Body)
!                then
!                   return In_Body;
! 
!                --  The main unit is a stand-alone subprogram body
! 
!                elsif Ekind_In (Main_Unit_Id, E_Function, E_Procedure)
!                  and then Nkind (Unit_Declaration_Node (Main_Unit_Id)) =
!                             N_Subprogram_Body
!                then
!                   return In_Body;
! 
!                --  Otherwise the main unit is a spec
! 
!                else
!                   return In_Spec;
                 end if;
  
!             --  Otherwise the node is in the complementary unit of the main
!             --  unit. The main unit is a body, the node is in the spec.
  
!             elsif Ekind_In (Main_Unit_Id, E_Package_Body,
!                                           E_Subprogram_Body)
!             then
!                return In_Spec;
! 
!             --  The main unit is a spec, the node is in the body
! 
!             else
!                return In_Body;
!             end if;
!          end Declaration_Placement_Of_Node;
! 
!          -------------
!          -- Kind_Of --
!          -------------
! 
!          function Kind_Of (Id : Entity_Id) return Invocation_Construct_Kind is
!          begin
!             if Id = Elab_Body_Id then
!                return Elaborate_Body_Procedure;
! 
!             elsif Id = Elab_Spec_Id then
!                return Elaborate_Spec_Procedure;
! 
!             else
!                return Regular_Construct;
!             end if;
!          end Kind_Of;
! 
!          -----------------------
!          -- Spec_Placement_Of --
!          -----------------------
! 
!          function Spec_Placement_Of
!            (Id : Entity_Id) return Declaration_Placement_Kind
!          is
!             Id_Rep    : constant Target_Rep_Id :=
!                           Target_Representation_Of (Id, In_State);
!             Body_Decl : constant Node_Id := Body_Declaration (Id_Rep);
!             Spec_Decl : constant Node_Id := Spec_Declaration (Id_Rep);
! 
!          begin
!             --  The entity has a spec
! 
!             if Present (Spec_Decl) then
!                return Declaration_Placement_Of_Node (Spec_Decl);
! 
!             --  Otherwise the entity must have a body
! 
!             else
!                pragma Assert (Present (Body_Decl));
!                return Declaration_Placement_Of_Node (Body_Decl);
!             end if;
!          end Spec_Placement_Of;
! 
!       --  Start of processing for Declare_Invocation_Construct
! 
!       begin
!          --  Nothing to do when the construct has already been declared in the
!          --  ALI file.
! 
!          if Is_Saved_Construct (Constr_Id) then
!             return;
           end if;
  
!          --  Mark the construct as declared in the ALI file
  
!          Set_Is_Saved_Construct (Constr_Id);
  
!          --  Add the construct in the ALI file
  
!          Add_Invocation_Construct
!            (Body_Placement => Body_Placement_Of (Constr_Id),
!             Kind           => Kind_Of           (Constr_Id),
!             Signature      => Signature_Of      (Constr_Id),
!             Spec_Placement => Spec_Placement_Of (Constr_Id),
!             Update_Units   => False);
!       end Declare_Invocation_Construct;
  
!       -------------------------------
!       -- Finalize_Invocation_Graph --
!       -------------------------------
  
!       procedure Finalize_Invocation_Graph is
!       begin
!          NE_Set.Destroy (Saved_Constructs_Set);
!          IR_Set.Destroy (Saved_Relations_Set);
!       end Finalize_Invocation_Graph;
  
!       ----------
!       -- Hash --
!       ----------
  
!       function Hash (Key : Invoker_Target_Relation) return Bucket_Range_Type is
!          pragma Assert (Present (Key.Invoker));
!          pragma Assert (Present (Key.Target));
  
!       begin
!          return
!            Hash_Two_Keys
!              (Bucket_Range_Type (Key.Invoker),
!               Bucket_Range_Type (Key.Target));
!       end Hash;
  
!       ---------------------------------
!       -- Initialize_Invocation_Graph --
!       ---------------------------------
  
!       procedure Initialize_Invocation_Graph is
!       begin
!          Saved_Constructs_Set := NE_Set.Create (100);
!          Saved_Relations_Set  := IR_Set.Create (200);
!       end Initialize_Invocation_Graph;
  
!       -----------------------------------
!       -- Invocation_Graph_Recording_OK --
!       -----------------------------------
! 
!       function Invocation_Graph_Recording_OK return Boolean is
!          Main_Cunit : constant Node_Id := Cunit (Main_Unit);
  
        begin
!          --  Nothing to do when compiling for GNATprove because the invocation
!          --  graph is not needed.
  
!          if GNATprove_Mode then
!             return False;
  
!          --  Nothing to do when the compilation will not produce an ALI file
  
!          elsif Serious_Errors_Detected > 0 then
!             return False;
  
!          --  Nothing to do when the main unit requires a body. Processing the
!          --  completing body will create the ALI file for the unit and record
!          --  the invocation graph.
! 
!          elsif Body_Required (Main_Cunit) then
!             return False;
           end if;
  
!          return True;
!       end Invocation_Graph_Recording_OK;
! 
!       ----------------------------
!       -- Is_Invocation_Scenario --
!       ----------------------------
! 
!       function Is_Invocation_Scenario (N : Node_Id) return Boolean is
!       begin
!          return
!            Is_Suitable_Access_Taken (N)
!              or else Is_Suitable_Call (N)
!              or else Is_Suitable_Instantiation (N);
!       end Is_Invocation_Scenario;
  
        --------------------------
!       -- Is_Invocation_Target --
        --------------------------
  
!       function Is_Invocation_Target (Id : Entity_Id) return Boolean is
        begin
!          --  To qualify, the entity must either come from source, or denote an
!          --  Ada, bridge, or SPARK target.
  
!          return
!            Comes_From_Source (Id)
!              or else Is_Ada_Semantic_Target (Id)
!              or else Is_Bridge_Target (Id)
!              or else Is_SPARK_Semantic_Target (Id);
!       end Is_Invocation_Target;
  
!       ------------------------
!       -- Is_Saved_Construct --
!       ------------------------
  
!       function Is_Saved_Construct (Constr : Entity_Id) return Boolean is
!          pragma Assert (Present (Constr));
        begin
!          return NE_Set.Contains (Saved_Constructs_Set, Constr);
!       end Is_Saved_Construct;
  
!       -----------------------
!       -- Is_Saved_Relation --
!       -----------------------
  
!       function Is_Saved_Relation
!         (Rel : Invoker_Target_Relation) return Boolean
!       is
!          pragma Assert (Present (Rel.Invoker));
!          pragma Assert (Present (Rel.Target));
  
!       begin
!          return IR_Set.Contains (Saved_Relations_Set, Rel);
!       end Is_Saved_Relation;
  
!       --------------------------
!       -- Process_Declarations --
!       --------------------------
  
!       procedure Process_Declarations
!         (Decls    : List_Id;
!          In_State : Processing_In_State)
!       is
!          Decl : Node_Id;
  
!       begin
!          Decl := First (Decls);
!          while Present (Decl) loop
  
!             --  Freeze node
  
!             if Nkind (Decl) = N_Freeze_Entity then
!                Process_Freeze_Node
!                  (Fnode    => Decl,
!                   In_State => In_State);
  
!             --  Package (nested)
  
!             elsif Nkind (Decl) = N_Package_Declaration then
!                Process_Package_Declaration
!                  (Pack_Decl => Decl,
!                   In_State  => In_State);
  
!             --  Protected type
  
!             elsif Nkind_In (Decl, N_Protected_Type_Declaration,
!                                   N_Single_Protected_Declaration)
!             then
!                Process_Protected_Type_Declaration
!                  (Prot_Decl => Decl,
!                   In_State  => In_State);
  
!             --  Subprogram or entry
  
!             elsif Nkind_In (Decl, N_Entry_Declaration,
!                                   N_Subprogram_Declaration)
!             then
!                Process_Subprogram_Declaration
!                  (Subp_Decl => Decl,
!                   In_State  => In_State);
  
!             --  Subprogram body (stand alone)
  
!             elsif Nkind (Decl) = N_Subprogram_Body
!               and then No (Corresponding_Spec (Decl))
!             then
!                Process_Subprogram_Declaration
!                  (Subp_Decl => Decl,
!                   In_State  => In_State);
  
!             --  Subprogram instantiation
  
!             elsif Nkind (Decl) in N_Subprogram_Instantiation then
!                Process_Subprogram_Instantiation
!                  (Inst     => Decl,
!                   In_State => In_State);
  
!             --  Task type
  
!             elsif Nkind_In (Decl, N_Single_Task_Declaration,
!                                   N_Task_Type_Declaration)
!             then
!                Process_Task_Type_Declaration
!                  (Task_Decl => Decl,
!                   In_State  => In_State);
  
!             --  Task type (derived)
  
!             elsif Nkind (Decl) = N_Full_Type_Declaration
!               and then Is_Task_Type (Defining_Entity (Decl))
!             then
!                Process_Task_Type_Declaration
!                  (Task_Decl => Decl,
!                   In_State  => In_State);
!             end if;
  
!             Next (Decl);
!          end loop;
!       end Process_Declarations;
  
!       -------------------------
!       -- Process_Freeze_Node --
!       -------------------------
  
!       procedure Process_Freeze_Node
!         (Fnode    : Node_Id;
!          In_State : Processing_In_State)
!       is
!       begin
!          Process_Declarations
!            (Decls    => Actions (Fnode),
!             In_State => In_State);
!       end Process_Freeze_Node;
  
!       -----------------------------------
!       -- Process_Invocation_Activation --
!       -----------------------------------
  
!       procedure Process_Invocation_Activation
!         (Call     : Node_Id;
!          Call_Rep : Scenario_Rep_Id;
!          Obj_Id   : Entity_Id;
!          Obj_Rep  : Target_Rep_Id;
!          Task_Typ : Entity_Id;
!          Task_Rep : Target_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          pragma Unreferenced (Call);
!          pragma Unreferenced (Call_Rep);
!          pragma Unreferenced (Obj_Id);
!          pragma Unreferenced (Obj_Rep);
  
!       begin
!          --  Nothing to do when the task type appears within an internal unit
  
!          if In_Internal_Unit (Task_Typ) then
!             return;
!          end if;
  
!          --  The task type being activated is within the main unit. Extend the
!          --  DFS traversal into its body.
  
!          if In_Extended_Main_Code_Unit (Task_Typ) then
!             Traverse_Invocation_Body
!               (N        => Body_Declaration (Task_Rep),
!                In_State => In_State);
  
!          --  The task type being activated resides within an external unit
!          --
!          --      Main unit         External unit
!          --    +-----------+      +-------------+
!          --    |           |      |             |
!          --    |  Start ------------> Task_Typ  |
!          --    |           |      |             |
!          --    +-----------+      +-------------+
!          --
!          --  Record the invocation path which originates from Start and reaches
!          --  the task type.
  
!          else
!             Record_Invocation_Path (In_State);
           end if;
!       end Process_Invocation_Activation;
  
!       ---------------------------------------
!       -- Process_Invocation_Body_Scenarios --
!       ---------------------------------------
  
!       procedure Process_Invocation_Body_Scenarios is
!          Iter : NE_Set.Iterator := Iterate_Library_Body_Scenarios;
!       begin
!          Process_Invocation_Scenarios
!            (Iter     => Iter,
!             In_State => Invocation_Body_State);
!       end Process_Invocation_Body_Scenarios;
  
!       -----------------------------
!       -- Process_Invocation_Call --
!       -----------------------------
  
!       procedure Process_Invocation_Call
!         (Call     : Node_Id;
!          Call_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          pragma Unreferenced (Call);
  
!          Subp_Id  : constant Entity_Id     := Target (Call_Rep);
!          Subp_Rep : constant Target_Rep_Id :=
!                       Target_Representation_Of (Subp_Id, In_State);
  
!       begin
!          --  Nothing to do when the subprogram appears within an internal unit
  
!          if In_Internal_Unit (Subp_Id) then
!             return;
  
!          --  Nothing to do for an abstract subprogram because it has no body to
!          --  examine.
  
!          elsif Ekind_In (Subp_Id, E_Function, E_Procedure)
!            and then Is_Abstract_Subprogram (Subp_Id)
!          then
!             return;
  
!          --  Nothin to do for a formal subprogram because it has no body to
!          --  examine.
  
!          elsif Is_Formal_Subprogram (Subp_Id) then
!             return;
!          end if;
  
!          --  The subprogram being called is within the main unit. Extend the
!          --  DFS traversal into its barrier function and body.
  
!          if In_Extended_Main_Code_Unit (Subp_Id) then
!             if Ekind_In (Subp_Id, E_Entry, E_Entry_Family, E_Procedure) then
!                Traverse_Invocation_Body
!                  (N        => Barrier_Body_Declaration (Subp_Rep),
!                   In_State => In_State);
!             end if;
  
!             Traverse_Invocation_Body
!               (N        => Body_Declaration (Subp_Rep),
!                In_State => In_State);
  
!          --  The subprogram being called resides within an external unit
!          --
!          --      Main unit         External unit
!          --    +-----------+      +-------------+
!          --    |           |      |             |
!          --    |  Start ------------> Subp_Id   |
!          --    |           |      |             |
!          --    +-----------+      +-------------+
!          --
!          --  Record the invocation path which originates from Start and reaches
!          --  the subprogram.
  
!          else
!             Record_Invocation_Path (In_State);
!          end if;
!       end Process_Invocation_Call;
  
!       --------------------------------------
!       -- Process_Invocation_Instantiation --
!       --------------------------------------
! 
!       procedure Process_Invocation_Instantiation
!         (Inst     : Node_Id;
!          Inst_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          pragma Unreferenced (Inst);
! 
!          Gen_Id : constant Entity_Id := Target (Inst_Rep);
  
        begin
!          --  Nothing to do when the generic appears within an internal unit
  
!          if In_Internal_Unit (Gen_Id) then
!             return;
!          end if;
  
!          --  The generic being instantiated resides within an external unit
!          --
!          --      Main unit         External unit
!          --    +-----------+      +-------------+
!          --    |           |      |             |
!          --    |  Start ------------> Generic   |
!          --    |           |      |             |
!          --    +-----------+      +-------------+
!          --
!          --  Record the invocation path which originates from Start and reaches
!          --  the generic.
  
!          if not In_Extended_Main_Code_Unit (Gen_Id) then
!             Record_Invocation_Path (In_State);
!          end if;
!       end Process_Invocation_Instantiation;
  
!       ---------------------------------
!       -- Process_Invocation_Scenario --
!       ---------------------------------
  
!       procedure Process_Invocation_Scenario
!         (N        : Node_Id;
!          In_State : Processing_In_State)
!       is
!          Scen     : constant Node_Id := Scenario (N);
!          Scen_Rep : Scenario_Rep_Id;
  
!       begin
!          --  Add the current scenario to the stack of active scenarios
  
!          Push_Active_Scenario (Scen);
! 
!          --  Call or task activation
! 
!          if Is_Suitable_Call (Scen) then
!             Scen_Rep := Scenario_Representation_Of (Scen, In_State);
! 
!             --  Routine Build_Call_Marker creates call markers regardless of
!             --  whether the call occurs within the main unit or not. This way
!             --  the serialization of internal names is kept consistent. Only
!             --  call markers found within the main unit must be processed.
! 
!             if In_Main_Context (Scen) then
!                Scen_Rep := Scenario_Representation_Of (Scen, In_State);
! 
!                if Kind (Scen_Rep) = Call_Scenario then
!                   Process_Invocation_Call
!                     (Call     => Scen,
!                      Call_Rep => Scen_Rep,
!                      In_State => In_State);
! 
!                else
!                   pragma Assert (Kind (Scen_Rep) = Task_Activation_Scenario);
! 
!                   Process_Activation
!                     (Call      => Scen,
!                      Call_Rep  => Scen_Rep,
!                      Processor => Process_Invocation_Activation'Access,
!                      In_State  => In_State);
                 end if;
+             end if;
  
!          --  Instantiation
  
!          elsif Is_Suitable_Instantiation (Scen) then
!             Process_Invocation_Instantiation
!               (Inst     => Scen,
!                Inst_Rep => Scenario_Representation_Of (Scen, In_State),
!                In_State => In_State);
!          end if;
  
!          --  Remove the current scenario from the stack of active scenarios
!          --  once all invocation constructs and paths have been saved.
  
!          Pop_Active_Scenario (Scen);
!       end Process_Invocation_Scenario;
  
!       ----------------------------------
!       -- Process_Invocation_Scenarios --
!       ----------------------------------
! 
!       procedure Process_Invocation_Scenarios
!         (Iter     : in out NE_Set.Iterator;
!          In_State : Processing_In_State)
!       is
!          N : Node_Id;
  
        begin
!          while NE_Set.Has_Next (Iter) loop
!             NE_Set.Next (Iter, N);
  
!             --  Reset the traversed status of all subprogram bodies because the
!             --  current invocation scenario acts as a new DFS traversal root.
  
!             Reset_Traversed_Bodies;
  
!             Process_Invocation_Scenario (N, In_State);
!          end loop;
!       end Process_Invocation_Scenarios;
  
!       ---------------------------------------
!       -- Process_Invocation_Spec_Scenarios --
!       ---------------------------------------
  
!       procedure Process_Invocation_Spec_Scenarios is
!          Iter : NE_Set.Iterator := Iterate_Library_Spec_Scenarios;
!       begin
!          Process_Invocation_Scenarios
!            (Iter     => Iter,
!             In_State => Invocation_Spec_State);
!       end Process_Invocation_Spec_Scenarios;
  
!       -----------------------
!       -- Process_Main_Unit --
!       -----------------------
  
!       procedure Process_Main_Unit is
!          Unit_Decl : constant Node_Id := Unit (Cunit (Main_Unit));
!          Spec_Id   : Entity_Id;
  
!       begin
!          --  The main unit is a [generic] package body
  
!          if Nkind (Unit_Decl) = N_Package_Body then
!             Spec_Id := Corresponding_Spec (Unit_Decl);
!             pragma Assert (Present (Spec_Id));
  
!             Process_Package_Declaration
!               (Pack_Decl => Unit_Declaration_Node (Spec_Id),
!                In_State  => Invocation_Construct_State);
  
!          --  The main unit is a [generic] package declaration
  
!          elsif Nkind (Unit_Decl) = N_Package_Declaration then
!             Process_Package_Declaration
!               (Pack_Decl => Unit_Decl,
!                In_State  => Invocation_Construct_State);
  
!          --  The main unit is a [generic] subprogram body
  
!          elsif Nkind (Unit_Decl) = N_Subprogram_Body then
!             Spec_Id := Corresponding_Spec (Unit_Decl);
  
!             --  The body completes a previous declaration
  
!             if Present (Spec_Id) then
!                Process_Subprogram_Declaration
!                  (Subp_Decl => Unit_Declaration_Node (Spec_Id),
!                   In_State  => Invocation_Construct_State);
  
!             --  Otherwise the body is stand-alone
  
!             else
!                Process_Subprogram_Declaration
!                  (Subp_Decl => Unit_Decl,
!                   In_State  => Invocation_Construct_State);
!             end if;
  
!          --  The main unit is a subprogram instantiation
  
!          elsif Nkind (Unit_Decl) in N_Subprogram_Instantiation then
!             Process_Subprogram_Instantiation
!               (Inst     => Unit_Decl,
!                In_State => Invocation_Construct_State);
! 
!          --  The main unit is an imported subprogram declaration
! 
!          elsif Nkind (Unit_Decl) = N_Subprogram_Declaration then
!             Process_Subprogram_Declaration
!               (Subp_Decl => Unit_Decl,
!                In_State  => Invocation_Construct_State);
!          end if;
!       end Process_Main_Unit;
! 
!       ---------------------------------
!       -- Process_Package_Declaration --
!       ---------------------------------
! 
!       procedure Process_Package_Declaration
!         (Pack_Decl : Node_Id;
!          In_State  : Processing_In_State)
!       is
!          Body_Id : constant Entity_Id := Corresponding_Body (Pack_Decl);
!          Spec    : constant Node_Id   := Specification (Pack_Decl);
!          Spec_Id : constant Entity_Id := Defining_Entity (Pack_Decl);
  
        begin
!          --  Add a declaration for the generic package in the ALI of the main
!          --  unit in case a client unit instantiates it.
  
!          if Ekind (Spec_Id) = E_Generic_Package then
!             Declare_Invocation_Construct
!               (Constr_Id => Spec_Id,
!                In_State  => In_State);
  
!          --  Otherwise inspect the visible and private declarations of the
!          --  package for invocation constructs.
  
!          else
!             Process_Declarations
!               (Decls    => Visible_Declarations (Spec),
!                In_State => In_State);
  
!             Process_Declarations
!               (Decls    => Private_Declarations (Spec),
!                In_State => In_State);
  
!             --  The package body containst at least one generic unit or an
!             --  inlinable subprogram. Such constructs may grant clients of
!             --  the main unit access to the private enclosing contexts of
!             --  the constructs. Process the main unit body to discover and
!             --  encode relevant invocation constructs and relations that
!             --  may ultimately reach an external unit.
  
!             if Present (Body_Id)
!               and then Save_Invocation_Graph_Of_Body (Cunit (Main_Unit))
!             then
!                Process_Declarations
!                  (Decls    => Declarations (Unit_Declaration_Node (Body_Id)),
!                   In_State => In_State);
!             end if;
!          end if;
!       end Process_Package_Declaration;
  
!       ----------------------------------------
!       -- Process_Protected_Type_Declaration --
!       ----------------------------------------
  
!       procedure Process_Protected_Type_Declaration
!         (Prot_Decl : Node_Id;
!          In_State  : Processing_In_State)
!       is
!          Prot_Def : constant Node_Id := Protected_Definition (Prot_Decl);
  
!       begin
!          if Present (Prot_Def) then
!             Process_Declarations
!               (Decls    => Visible_Declarations (Prot_Def),
!                In_State => In_State);
!          end if;
!       end Process_Protected_Type_Declaration;
  
!       ------------------------------------
!       -- Process_Subprogram_Declaration --
!       ------------------------------------
  
!       procedure Process_Subprogram_Declaration
!         (Subp_Decl : Node_Id;
!          In_State  : Processing_In_State)
!       is
!          Subp_Id : constant Entity_Id := Defining_Entity (Subp_Decl);
  
!       begin
!          --  Nothing to do when the subprogram is not an invocation target
  
!          if not Is_Invocation_Target (Subp_Id) then
!             return;
!          end if;
  
!          --  Add a declaration for the subprogram in the ALI file of the main
!          --  unit in case a client unit calls or instantiates it.
! 
!          Declare_Invocation_Construct
!            (Constr_Id => Subp_Id,
!             In_State  => In_State);
! 
!          --  Do not process subprograms without a body because they do not
!          --  contain any invocation scenarios.
! 
!          if Is_Bodiless_Subprogram (Subp_Id) then
              null;
  
!          --  Do not process generic subprograms because generics must not be
!          --  examined.
  
!          elsif Is_Generic_Subprogram (Subp_Id) then
!             null;
  
!          --  Otherwise create a dummy scenario which calls the subprogram to
!          --  act as a root for a DFS traversal.
  
!          else
!             --  Reset the traversed status of all subprogram bodies because the
!             --  subprogram acts as a new DFS traversal root.
  
!             Reset_Traversed_Bodies;
  
!             Process_Invocation_Scenario
!               (N        => Build_Subprogram_Invocation (Subp_Id),
!                In_State => In_State);
!          end if;
!       end Process_Subprogram_Declaration;
  
!       --------------------------------------
!       -- Process_Subprogram_Instantiation --
!       --------------------------------------
  
!       procedure Process_Subprogram_Instantiation
!         (Inst     : Node_Id;
!          In_State : Processing_In_State)
!       is
!       begin
!          --  Add a declaration for the instantiation in the ALI file of the
!          --  main unit in case a client unit calls it.
  
!          Declare_Invocation_Construct
!            (Constr_Id => Defining_Entity (Inst),
!             In_State  => In_State);
!       end Process_Subprogram_Instantiation;
  
!       -----------------------------------
!       -- Process_Task_Type_Declaration --
!       -----------------------------------
  
!       procedure Process_Task_Type_Declaration
!         (Task_Decl : Node_Id;
!          In_State  : Processing_In_State)
!       is
!          Task_Typ : constant Entity_Id := Defining_Entity (Task_Decl);
!          Task_Def : Node_Id;
  
!       begin
!          --  Add a declaration for the task type the ALI file of the main unit
!          --  in case a client unit creates a task object and activates it.
  
!          Declare_Invocation_Construct
!            (Constr_Id => Task_Typ,
!             In_State  => In_State);
  
!          --  Process the entries of the task type because they represent valid
!          --  entry points into the task body.
! 
!          if Nkind_In (Task_Decl, N_Single_Task_Declaration,
!                                  N_Task_Type_Declaration)
!          then
!             Task_Def := Task_Definition (Task_Decl);
! 
!             if Present (Task_Def) then
!                Process_Declarations
!                  (Decls    => Visible_Declarations (Task_Def),
!                   In_State => In_State);
!             end if;
           end if;
  
!          --  Reset the traversed status of all subprogram bodies because the
!          --  task type acts as a new DFS traversal root.
  
!          Reset_Traversed_Bodies;
! 
!          --  Create a dummy scenario which activates an anonymous object of the
!          --  task type to acts as a root of a DFS traversal.
! 
!          Process_Invocation_Scenario
!            (N        => Build_Task_Activation (Task_Typ, In_State),
!             In_State => In_State);
!       end Process_Task_Type_Declaration;
! 
!       ---------------------------------
!       -- Record_Full_Invocation_Path --
!       ---------------------------------
! 
!       procedure Record_Full_Invocation_Path (In_State : Processing_In_State) is
!          package Scenarios renames Active_Scenario_Stack;
  
        begin
!          --  The path originates from the elaboration of the body. Add an extra
!          --  relation from the elaboration body procedure to the first active
!          --  scenario.
  
!          if In_State.Processing = Invocation_Body_Processing then
!             Build_Elaborate_Body_Procedure;
  
!             Record_Invocation_Relation
!               (Invk_Id  => Elab_Body_Id,
!                Targ_Id  => Target_Of (Scenarios.First, In_State),
!                In_State => In_State);
! 
!          --  The path originates from the elaboration of the spec. Add an extra
!          --  relation from the elaboration spec procedure to the first active
!          --  scenario.
! 
!          elsif In_State.Processing = Invocation_Spec_Processing then
!             Build_Elaborate_Spec_Procedure;
! 
!             Record_Invocation_Relation
!               (Invk_Id  => Elab_Spec_Id,
!                Targ_Id  => Target_Of (Scenarios.First, In_State),
!                In_State => In_State);
           end if;
  
!          --  Record individual relations formed by pairs of scenarios
  
!          for Index in Scenarios.First .. Scenarios.Last - 1 loop
!             Record_Invocation_Relation
!               (Invk_Id  => Target_Of (Index,     In_State),
!                Targ_Id  => Target_Of (Index + 1, In_State),
!                In_State => In_State);
!          end loop;
!       end Record_Full_Invocation_Path;
  
!       -----------------------------
!       -- Record_Invocation_Graph --
!       -----------------------------
  
!       procedure Record_Invocation_Graph is
!       begin
!          --  Nothing to do when the invocation graph is not recorded
  
!          if not Invocation_Graph_Recording_OK then
!             return;
!          end if;
  
!          --  Save the encoding format used to capture information about the
!          --  invocation constructs and relations in the ALI file of the main
!          --  unit.
  
!          Record_Invocation_Graph_Encoding;
  
!          --  Examine all library level invocation scenarios and perform DFS
!          --  traversals from each one. Encode a path in the ALI file of the
!          --  main unit if it reaches into an external unit.
  
!          Process_Invocation_Body_Scenarios;
!          Process_Invocation_Spec_Scenarios;
  
!          --  Examine all invocation constructs within the spec and body of the
!          --  main unit and perform DFS traversals from each one. Encode a path
!          --  in the ALI file of the main unit if it reaches into an external
!          --  unit.
  
!          Process_Main_Unit;
!       end Record_Invocation_Graph;
  
!       --------------------------------------
!       -- Record_Invocation_Graph_Encoding --
!       --------------------------------------
  
+       procedure Record_Invocation_Graph_Encoding is
+          Kind : Invocation_Graph_Encoding_Kind := No_Encoding;
+ 
+       begin
+          --  Switch -gnatd_F (encode full invocation paths in ALI files) is in
+          --  effect.
+ 
+          if Debug_Flag_Underscore_FF then
+             Kind := Full_Path_Encoding;
           else
!             Kind := Endpoints_Encoding;
           end if;
  
!          --  Save the encoding format in the ALI file of the main unit
! 
!          Set_Invocation_Graph_Encoding
!            (Kind         => Kind,
!             Update_Units => False);
!       end Record_Invocation_Graph_Encoding;
! 
!       ----------------------------
!       -- Record_Invocation_Path --
!       ----------------------------
! 
!       procedure Record_Invocation_Path (In_State : Processing_In_State) is
!          package Scenarios renames Active_Scenario_Stack;
  
        begin
!          --  Save a path when the active scenario stack contains at least one
!          --  invocation scenario.
! 
!          if Scenarios.Last - Scenarios.First < 0 then
!             return;
!          end if;
! 
!          --  Register all relations in the path when switch -gnatd_F (encode
!          --  full invocation paths in ALI files) is in effect.
! 
!          if Debug_Flag_Underscore_FF then
!             Record_Full_Invocation_Path (In_State);
! 
!          --  Otherwise register a single relation
! 
!          else
!             Record_Simple_Invocation_Path (In_State);
!          end if;
! 
!          Write_Invocation_Path (In_State);
!       end Record_Invocation_Path;
  
        --------------------------------
!       -- Record_Invocation_Relation --
        --------------------------------
  
!       procedure Record_Invocation_Relation
!         (Invk_Id  : Entity_Id;
!          Targ_Id  : Entity_Id;
!          In_State : Processing_In_State)
!       is
!          pragma Assert (Present (Invk_Id));
!          pragma Assert (Present (Targ_Id));
  
!          procedure Get_Invocation_Attributes
!            (Extra : out Entity_Id;
!             Kind  : out Invocation_Kind);
!          pragma Inline (Get_Invocation_Attributes);
!          --  Return the additional entity used in error diagnostics in Extra
!          --  and the invocation kind in Kind which pertain to the invocation
!          --  relation with invoker Invk_Id and target Targ_Id.
  
!          -------------------------------
!          -- Get_Invocation_Attributes --
!          -------------------------------
  
!          procedure Get_Invocation_Attributes
!            (Extra : out Entity_Id;
!             Kind  : out Invocation_Kind)
!          is
!             Targ_Rep  : constant Target_Rep_Id :=
!                           Target_Representation_Of (Targ_Id, In_State);
!             Spec_Decl : constant Node_Id := Spec_Declaration (Targ_Rep);
  
!          begin
!             --  Accept within a task body
  
!             if Is_Accept_Alternative_Proc (Targ_Id) then
!                Extra := Receiving_Entry (Targ_Id);
!                Kind  := Accept_Alternative;
  
!             --  Activation of a task object
  
!             elsif Is_Activation_Proc (Targ_Id)
!               or else Is_Task_Type (Targ_Id)
!             then
!                Extra := Empty;
!                Kind  := Task_Activation;
  
!             --  Controlled adjustment actions
  
!             elsif Is_Controlled_Proc (Targ_Id, Name_Adjust) then
!                Extra := First_Formal_Type (Targ_Id);
!                Kind  := Controlled_Adjustment;
  
!             --  Controlled finalization actions
  
!             elsif Is_Controlled_Proc (Targ_Id, Name_Finalize)
!               or else Is_Finalizer_Proc (Targ_Id)
!             then
!                Extra := First_Formal_Type (Targ_Id);
!                Kind  := Controlled_Finalization;
  
!             --  Controlled initialization actions
  
!             elsif Is_Controlled_Proc (Targ_Id, Name_Initialize) then
!                Extra := First_Formal_Type (Targ_Id);
!                Kind  := Controlled_Initialization;
  
!             --  Default_Initial_Condition verification
  
!             elsif Is_Default_Initial_Condition_Proc (Targ_Id) then
!                Extra := First_Formal_Type (Targ_Id);
!                Kind  := Default_Initial_Condition_Verification;
  
!             --  Initialization of object
  
!             elsif Is_Init_Proc (Targ_Id) then
!                Extra := First_Formal_Type (Targ_Id);
!                Kind  := Type_Initialization;
  
!             --  Initial_Condition verification
  
!             elsif Is_Initial_Condition_Proc (Targ_Id) then
!                Extra := First_Formal_Type (Targ_Id);
!                Kind  := Initial_Condition_Verification;
  
!             --  Instantiation
! 
!             elsif Is_Generic_Unit (Targ_Id) then
!                Extra := Empty;
!                Kind  := Instantiation;
! 
!             --  Internal controlled adjustment actions
! 
!             elsif Is_TSS (Targ_Id, TSS_Deep_Adjust) then
!                Extra := First_Formal_Type (Targ_Id);
!                Kind  := Internal_Controlled_Adjustment;
! 
!             --  Internal controlled finalization actions
! 
!             elsif Is_TSS (Targ_Id, TSS_Deep_Finalize) then
!                Extra := First_Formal_Type (Targ_Id);
!                Kind  := Internal_Controlled_Finalization;
! 
!             --  Internal controlled initialization actions
! 
!             elsif Is_TSS (Targ_Id, TSS_Deep_Initialize) then
!                Extra := First_Formal_Type (Targ_Id);
!                Kind  := Internal_Controlled_Initialization;
! 
!             --  Invariant verification
! 
!             elsif Is_Invariant_Proc (Targ_Id)
!               or else Is_Partial_Invariant_Proc (Targ_Id)
!             then
!                Extra := First_Formal_Type (Targ_Id);
!                Kind  := Invariant_Verification;
! 
!             --  Postcondition verification
! 
!             elsif Is_Postconditions_Proc (Targ_Id) then
!                Extra := Find_Enclosing_Scope (Spec_Decl);
!                Kind  := Postcondition_Verification;
! 
!             --  Protected entry call
! 
!             elsif Is_Protected_Entry (Targ_Id) then
!                Extra := Empty;
!                Kind  := Protected_Entry_Call;
! 
!             --  Protected subprogram call
! 
!             elsif Is_Protected_Subp (Targ_Id) then
!                Extra := Empty;
!                Kind  := Protected_Subprogram_Call;
! 
!             --  Task entry call
! 
!             elsif Is_Task_Entry (Targ_Id) then
!                Extra := Empty;
!                Kind  := Task_Entry_Call;
! 
!             --  Entry, operator, or subprogram call. This case must come last
!             --  because most invocations above are variations of this case.
! 
!             elsif Ekind_In (Targ_Id, E_Entry,
!                                      E_Function,
!                                      E_Operator,
!                                      E_Procedure)
!             then
!                Extra := Empty;
!                Kind  := Call;
  
              else
!                pragma Assert (False);
!                Extra := Empty;
!                Kind  := No_Invocation;
              end if;
+          end Get_Invocation_Attributes;
  
!          --  Local variables
  
!          Extra     : Entity_Id;
!          Extra_Nam : Name_Id;
!          Kind      : Invocation_Kind;
!          Rel       : Invoker_Target_Relation;
  
!       --  Start of processing for Record_Invocation_Relation
  
!       begin
!          Rel.Invoker := Invk_Id;
!          Rel.Target  := Targ_Id;
  
!          --  Nothing to do when the invocation relation has already been
!          --  recorded in ALI file of the main unit.
  
!          if Is_Saved_Relation (Rel) then
!             return;
!          end if;
  
!          --  Mark the relation as recorded in the ALI file
  
!          Set_Is_Saved_Relation (Rel);
! 
!          --  Declare the invoker in the ALI file
! 
!          Declare_Invocation_Construct
!            (Constr_Id => Invk_Id,
!             In_State  => In_State);
  
+          --  Obtain the invocation-specific attributes of the relation
+ 
+          Get_Invocation_Attributes (Extra, Kind);
+ 
+          --  Certain invocations lack an extra entity used in error diagnostics
+ 
+          if Present (Extra) then
+             Extra_Nam := Chars (Extra);
           else
!             Extra_Nam := No_Name;
           end if;
  
!          --  Add the relation in the ALI file
  
!          Add_Invocation_Relation
!            (Extra        => Extra_Nam,
!             Invoker      => Signature_Of (Invk_Id),
!             Kind         => Kind,
!             Target       => Signature_Of (Targ_Id),
!             Update_Units => False);
!       end Record_Invocation_Relation;
  
!       -----------------------------------
!       -- Record_Simple_Invocation_Path --
!       -----------------------------------
  
!       procedure Record_Simple_Invocation_Path
!         (In_State : Processing_In_State)
!       is
!          package Scenarios renames Active_Scenario_Stack;
  
!          Last_Targ  : constant Entity_Id :=
!                         Target_Of (Scenarios.Last, In_State);
!          First_Targ : Entity_Id;
  
!       begin
!          --  The path originates from the elaboration of the body. Add an extra
!          --  relation from the elaboration body procedure to the first active
!          --  scenario.
  
!          if In_State.Processing = Invocation_Body_Processing then
!             Build_Elaborate_Body_Procedure;
!             First_Targ := Elab_Body_Id;
  
!          --  The path originates from the elaboration of the spec. Add an extra
!          --  relation from the elaboration spec procedure to the first active
!          --  scenario.
  
!          elsif In_State.Processing = Invocation_Spec_Processing then
!             Build_Elaborate_Spec_Procedure;
!             First_Targ := Elab_Spec_Id;
  
!          else
!             First_Targ := Target_Of (Scenarios.First, In_State);
!          end if;
! 
!          --  Record a single relation from the first to the last scenario
! 
!          if First_Targ /= Last_Targ then
!             Record_Invocation_Relation
!               (Invk_Id  => First_Targ,
!                Targ_Id  => Last_Targ,
!                In_State => In_State);
!          end if;
!       end Record_Simple_Invocation_Path;
! 
!       ----------------------------
!       -- Set_Is_Saved_Construct --
!       ----------------------------
! 
!       procedure Set_Is_Saved_Construct
!         (Constr : Entity_Id;
!          Val    : Boolean := True)
!       is
!          pragma Assert (Present (Constr));
  
        begin
!          if Val then
!             NE_Set.Insert (Saved_Constructs_Set, Constr);
!          else
!             NE_Set.Delete (Saved_Constructs_Set, Constr);
!          end if;
!       end Set_Is_Saved_Construct;
  
!       ---------------------------
!       -- Set_Is_Saved_Relation --
!       ---------------------------
  
!       procedure Set_Is_Saved_Relation
!         (Rel : Invoker_Target_Relation;
!          Val : Boolean := True)
!       is
!       begin
!          if Val then
!             IR_Set.Insert (Saved_Relations_Set, Rel);
!          else
!             IR_Set.Delete (Saved_Relations_Set, Rel);
!          end if;
!       end Set_Is_Saved_Relation;
  
!       ------------------
!       -- Signature_Of --
!       ------------------
  
!       function Signature_Of (Id : Entity_Id) return Invocation_Signature_Id is
!          Loc : constant Source_Ptr := Sloc (Id);
  
!          function Instantiation_Locations return Name_Id;
!          pragma Inline (Instantiation_Locations);
!          --  Create a concatenation of all lines and colums of each instance
!          --  where source location Loc appears. Return No_Name if no instances
!          --  exist.
  
!          function Qualified_Scope return Name_Id;
!          pragma Inline (Qualified_Scope);
!          --  Obtain the qualified name of Id's scope
  
!          -----------------------------
!          -- Instantiation_Locations --
!          -----------------------------
  
!          function Instantiation_Locations return Name_Id is
!             Buffer  : Bounded_String (2052);
!             Inst    : Source_Ptr;
!             Loc_Nam : Name_Id;
!             SFI     : Source_File_Index;
  
!          begin
!             SFI  := Get_Source_File_Index (Loc);
!             Inst := Instantiation (SFI);
  
!             --  The location is within an instance. Construct a concatenation
!             --  of all lines and colums of each individual instance using the
!             --  following format:
!             --
!             --    line1_column1_line2_column2_ ... _lineN_columnN
  
!             if Inst /= No_Location then
!                loop
!                   Append (Buffer, Nat (Get_Logical_Line_Number (Inst)));
!                   Append (Buffer, '_');
!                   Append (Buffer, Nat (Get_Column_Number (Inst)));
  
!                   SFI  := Get_Source_File_Index (Inst);
!                   Inst := Instantiation (SFI);
  
!                   exit when Inst = No_Location;
  
!                   Append (Buffer, '_');
!                end loop;
  
!                Loc_Nam := Name_Find (Buffer);
!                return Loc_Nam;
! 
!             --  Otherwise there no instances are involved
! 
!             else
!                return No_Name;
              end if;
+          end Instantiation_Locations;
  
!          ---------------------
!          -- Qualified_Scope --
!          ---------------------
  
!          function Qualified_Scope return Name_Id is
!             Scop : Entity_Id;
  
!          begin
!             Scop := Scope (Id);
  
!             --  The entity appears within an anonymous concurrent type created
!             --  for a single protected or task type declaration. Use the entity
!             --  of the anonymous object as it represents the original scope.
  
!             if Is_Concurrent_Type (Scop)
!               and then Present (Anonymous_Object (Scop))
!             then
!                Scop := Anonymous_Object (Scop);
!             end if;
  
!             return Get_Qualified_Name (Scop);
!          end Qualified_Scope;
  
!       --  Start of processing for Signature_Of
  
!       begin
!          return
!            Invocation_Signature_Of
!              (Column    => Nat (Get_Column_Number (Loc)),
!               Line      => Nat (Get_Logical_Line_Number (Loc)),
!               Locations => Instantiation_Locations,
!               Name      => Chars (Id),
!               Scope     => Qualified_Scope);
!       end Signature_Of;
  
!       ---------------
!       -- Target_Of --
!       ---------------
  
!       function Target_Of
!         (Pos      : Active_Scenario_Pos;
!          In_State : Processing_In_State) return Entity_Id
!       is
!          package Scenarios renames Active_Scenario_Stack;
  
!          --  Ensure that the position is within the bounds of the active
!          --  scenario stack.
  
!          pragma Assert (Scenarios.First <= Pos);
!          pragma Assert (Pos <= Scenarios.Last);
  
!          Scen_Rep : constant Scenario_Rep_Id :=
!                       Scenario_Representation_Of
!                         (Scenarios.Table (Pos), In_State);
  
!       begin
!          --  The true target of an activation call is the current task type
!          --  rather than routine Activate_Tasks.
  
!          if Kind (Scen_Rep) = Task_Activation_Scenario then
!             return Activated_Task_Type (Scen_Rep);
!          else
!             return Target (Scen_Rep);
!          end if;
!       end Target_Of;
  
!       ------------------------------
!       -- Traverse_Invocation_Body --
!       ------------------------------
  
!       procedure Traverse_Invocation_Body
!         (N        : Node_Id;
!          In_State : Processing_In_State)
!       is
!       begin
!          Traverse_Body
!            (N                   => N,
!             Requires_Processing => Is_Invocation_Scenario'Access,
!             Processor           => Process_Invocation_Scenario'Access,
!             In_State            => In_State);
!       end Traverse_Invocation_Body;
  
!       ---------------------------
!       -- Write_Invocation_Path --
!       ---------------------------
  
!       procedure Write_Invocation_Path (In_State : Processing_In_State) is
!          procedure Write_Target (Targ_Id : Entity_Id; Is_First : Boolean);
!          pragma Inline (Write_Target);
!          --  Write out invocation target Targ_Id to standard output. Flag
!          --  Is_First should be set when the target is first in a path.
  
!          -------------
!          -- Targ_Id --
!          -------------
  
!          procedure Write_Target (Targ_Id : Entity_Id; Is_First : Boolean) is
!          begin
!             if not Is_First then
!                Write_Str ("  --> ");
!             end if;
  
!             Write_Name (Get_Qualified_Name (Targ_Id));
!             Write_Eol;
!          end Write_Target;
! 
!          --  Local variables
! 
!          package Scenarios renames Active_Scenario_Stack;
! 
!          First_Seen : Boolean := False;
! 
!       --  Start of processing for Write_Invocation_Path
  
        begin
!          --  Nothing to do when flag -gnatd_T (output trace information on
!          --  invocation path recording) is not in effect.
  
!          if not Debug_Flag_Underscore_TT then
!             return;
!          end if;
  
!          --  The path originates from the elaboration of the body. Write the
!          --  elaboration body procedure.
  
!          if In_State.Processing = Invocation_Body_Processing then
!             Write_Target (Elab_Body_Id, True);
!             First_Seen := True;
  
!          --  The path originates from the elaboration of the spec. Write the
!          --  elaboration spec procedure.
  
!          elsif In_State.Processing = Invocation_Spec_Processing then
!             Write_Target (Elab_Spec_Id, True);
!             First_Seen := True;
!          end if;
  
!          --  Write each individual target invoked by its corresponding scenario
!          --  on the active scenario stack.
  
!          for Index in Scenarios.First .. Scenarios.Last loop
!             Write_Target
!               (Targ_Id  => Target_Of (Index, In_State),
!                Is_First => Index = Scenarios.First and then not First_Seen);
!          end loop;
  
!          Write_Eol;
!       end Write_Invocation_Path;
!    end Invocation_Graph;
  
!    ------------------------
!    -- Is_Safe_Activation --
!    ------------------------
  
!    function Is_Safe_Activation
!      (Call     : Node_Id;
!       Task_Rep : Target_Rep_Id) return Boolean
!    is
!    begin
!       --  The activation of a task coming from an external instance cannot
!       --  cause an ABE because the generic was already instantiated. Note
!       --  that the instantiation itself may lead to an ABE.
  
!       return
!         In_External_Instance
!           (N           => Call,
!            Target_Decl => Spec_Declaration (Task_Rep));
!    end Is_Safe_Activation;
! 
!    ------------------
!    -- Is_Safe_Call --
!    ------------------
! 
!    function Is_Safe_Call
!      (Call     : Node_Id;
!       Subp_Id  : Entity_Id;
!       Subp_Rep : Target_Rep_Id) return Boolean
!    is
!       Body_Decl : constant Node_Id := Body_Declaration (Subp_Rep);
!       Spec_Decl : constant Node_Id := Spec_Declaration (Subp_Rep);
  
     begin
!       --  The target is either an abstract subprogram, formal subprogram, or
!       --  imported, in which case it does not have a body at compile or bind
!       --  time. Assume that the call is ABE-safe.
  
!       if Is_Bodiless_Subprogram (Subp_Id) then
!          return True;
  
!       --  The target is an instantiation of a generic subprogram. The call
!       --  cannot cause an ABE because the generic was already instantiated.
!       --  Note that the instantiation itself may lead to an ABE.
  
!       elsif Is_Generic_Instance (Subp_Id) then
!          return True;
  
!       --  The invocation of a target coming from an external instance cannot
!       --  cause an ABE because the generic was already instantiated. Note that
!       --  the instantiation itself may lead to an ABE.
  
!       elsif In_External_Instance
!               (N           => Call,
!                Target_Decl => Spec_Decl)
!       then
!          return True;
  
!       --  The target is a subprogram body without a previous declaration. The
!       --  call cannot cause an ABE because the body has already been seen.
  
!       elsif Nkind (Spec_Decl) = N_Subprogram_Body
!         and then No (Corresponding_Spec (Spec_Decl))
!       then
!          return True;
  
!       --  The target is a subprogram body stub without a prior declaration.
!       --  The call cannot cause an ABE because the proper body substitutes
!       --  the stub.
! 
!       elsif Nkind (Spec_Decl) = N_Subprogram_Body_Stub
!         and then No (Corresponding_Spec_Of_Stub (Spec_Decl))
        then
!          return True;
  
!       --  Subprogram bodies which wrap attribute references used as actuals
!       --  in instantiations are always ABE-safe. These bodies are artifacts
!       --  of expansion.
! 
!       elsif Present (Body_Decl)
!         and then Nkind (Body_Decl) = N_Subprogram_Body
!         and then Was_Attribute_Reference (Body_Decl)
!       then
!          return True;
        end if;
  
!       return False;
!    end Is_Safe_Call;
  
!    ---------------------------
!    -- Is_Safe_Instantiation --
!    ---------------------------
  
!    function Is_Safe_Instantiation
!      (Inst    : Node_Id;
!       Gen_Id  : Entity_Id;
!       Gen_Rep : Target_Rep_Id) return Boolean
!    is
!       Spec_Decl : constant Node_Id := Spec_Declaration (Gen_Rep);
  
!    begin
!       --  The generic is an intrinsic subprogram in which case it does not
!       --  have a body at compile or bind time. Assume that the instantiation
!       --  is ABE-safe.
! 
!       if Is_Bodiless_Subprogram (Gen_Id) then
!          return True;
! 
!       --  The instantiation of an external nested generic cannot cause an ABE
!       --  if the outer generic was already instantiated. Note that the instance
!       --  of the outer generic may lead to an ABE.
! 
!       elsif In_External_Instance
!               (N           => Inst,
!                Target_Decl => Spec_Decl)
!       then
!          return True;
! 
!       --  The generic is a package. The instantiation cannot cause an ABE when
!       --  the package has no body.
! 
!       elsif Ekind (Gen_Id) = E_Generic_Package
!         and then not Has_Body (Spec_Decl)
!       then
!          return True;
        end if;
  
!       return False;
!    end Is_Safe_Instantiation;
  
!    ------------------
!    -- Is_Same_Unit --
!    ------------------
! 
!    function Is_Same_Unit
!      (Unit_1 : Entity_Id;
!       Unit_2 : Entity_Id) return Boolean
     is
!    begin
!       return Unit_Entity (Unit_1) = Unit_Entity (Unit_2);
!    end Is_Same_Unit;
  
!    -------------------------------
!    -- Kill_Elaboration_Scenario --
!    -------------------------------
  
!    procedure Kill_Elaboration_Scenario (N : Node_Id) is
!    begin
!       --  Nothing to do when switch -gnatH (legacy elaboration checking mode
!       --  enabled) is in effect because the legacy ABE lechanism does not need
!       --  to carry out this action.
! 
!       if Legacy_Elaboration_Checks then
!          return;
! 
!       --  Nothing to do when the elaboration phase of the compiler is not
!       --  active.
! 
!       elsif not Elaboration_Phase_Active then
!          return;
!       end if;
  
+       --  Eliminate a recorded scenario when it appears within dead code
+       --  because it will not be executed at elaboration time.
+ 
+       if Is_Scenario (N) then
+          Delete_Scenario (N);
+       end if;
+    end Kill_Elaboration_Scenario;
+ 
+    ----------------------
+    -- Main_Unit_Entity --
+    ----------------------
+ 
+    function Main_Unit_Entity return Entity_Id is
     begin
!       --  Note that Cunit_Entity (Main_Unit) is not reliable in the presence of
!       --  generic bodies and may return an outdated entity.
  
!       return Defining_Entity (Unit (Cunit (Main_Unit)));
!    end Main_Unit_Entity;
! 
!    ----------------------
!    -- Non_Private_View --
!    ----------------------
! 
!    function Non_Private_View (Typ : Entity_Id) return Entity_Id is
!    begin
!       if Is_Private_Type (Typ) and then Present (Full_View (Typ)) then
!          return Full_View (Typ);
!       else
!          return Typ;
        end if;
+    end Non_Private_View;
  
!    ---------------------------------
!    -- Record_Elaboration_Scenario --
!    ---------------------------------
  
!    procedure Record_Elaboration_Scenario (N : Node_Id) is
!       procedure Check_Preelaborated_Call
!         (Call     : Node_Id;
!          Call_Lvl : Enclosing_Level_Kind);
!       pragma Inline (Check_Preelaborated_Call);
!       --  Verify that entry, operator, or subprogram call Call with enclosing
!       --  level Call_Lvl does not appear at the library level of preelaborated
!       --  unit.
  
!       function Find_Code_Unit (Nod : Node_Or_Entity_Id) return Entity_Id;
!       pragma Inline (Find_Code_Unit);
!       --  Return the code unit which contains arbitrary node or entity Nod.
!       --  This is the unit of the file which physically contains the related
!       --  construct denoted by Nod except when Nod is within an instantiation.
!       --  In that case the unit is that of the top-level instantiation.
  
!       function In_Preelaborated_Context (Nod : Node_Id) return Boolean;
!       pragma Inline (In_Preelaborated_Context);
!       --  Determine whether arbitrary node Nod appears within a preelaborated
!       --  context.
  
!       procedure Record_Access_Taken
!         (Attr     : Node_Id;
!          Attr_Lvl : Enclosing_Level_Kind);
!       pragma Inline (Record_Access_Taken);
!       --  Record 'Access scenario Attr with enclosing level Attr_Lvl
  
!       procedure Record_Call_Or_Task_Activation
!         (Call     : Node_Id;
!          Call_Lvl : Enclosing_Level_Kind);
!       pragma Inline (Record_Call_Or_Task_Activation);
!       --  Record call scenario Call with enclosing level Call_Lvl
  
!       procedure Record_Instantiation
!         (Inst     : Node_Id;
!          Inst_Lvl : Enclosing_Level_Kind);
!       pragma Inline (Record_Instantiation);
!       --  Record instantiation scenario Inst with enclosing level Inst_Lvl
  
!       procedure Record_Variable_Assignment
!         (Asmt     : Node_Id;
!          Asmt_Lvl : Enclosing_Level_Kind);
!       pragma Inline (Record_Variable_Assignment);
!       --  Record variable assignment scenario Asmt with enclosing level
!       --  Asmt_Lvl.
  
!       procedure Record_Variable_Reference
!         (Ref     : Node_Id;
!          Ref_Lvl : Enclosing_Level_Kind);
!       pragma Inline (Record_Variable_Reference);
!       --  Record variable reference scenario Ref with enclosing level Ref_Lvl
  
!       ------------------------------
!       -- Check_Preelaborated_Call --
!       ------------------------------
  
!       procedure Check_Preelaborated_Call
!         (Call     : Node_Id;
!          Call_Lvl : Enclosing_Level_Kind)
!       is
!       begin
!          --  Nothing to do when the call is internally generated because it is
!          --  assumed that it will never violate preelaboration.
  
!          if not Is_Source_Call (Call) then
!             return;
  
!          --  Library-level calls are always considered because they are part of
!          --  the associated unit's elaboration actions.
  
!          elsif Call_Lvl in Library_Level then
!             null;
  
!          --  Calls at the library level of a generic package body have to be
!          --  checked because they would render an instantiation illegal if the
!          --  template is marked as preelaborated. Note that this does not apply
!          --  to calls at the library level of a generic package spec.
  
!          elsif Call_Lvl = Generic_Body_Level then
!             null;
  
!          --  Otherwise the call does not appear at the proper level and must
!          --  not be considered for this check.
  
!          else
!             return;
!          end if;
  
!          --  The call appears within a preelaborated unit. Emit a warning only
!          --  for internal uses, otherwise this is an error.
  
!          if In_Preelaborated_Context (Call) then
!             Error_Msg_Warn := GNAT_Mode;
!             Error_Msg_N
!               ("<<non-static call not allowed in preelaborated unit", Call);
!          end if;
!       end Check_Preelaborated_Call;
  
!       --------------------
!       -- Find_Code_Unit --
!       --------------------
  
!       function Find_Code_Unit (Nod : Node_Or_Entity_Id) return Entity_Id is
!       begin
!          return Find_Unit_Entity (Unit (Cunit (Get_Code_Unit (Nod))));
!       end Find_Code_Unit;
  
!       ------------------------------
!       -- In_Preelaborated_Context --
!       ------------------------------
  
!       function In_Preelaborated_Context (Nod : Node_Id) return Boolean is
!          Body_Id : constant Entity_Id := Find_Code_Unit (Nod);
!          Spec_Id : constant Entity_Id := Unique_Entity (Body_Id);
  
!       begin
!          --  The node appears within a package body whose corresponding spec is
!          --  subject to pragma Remote_Call_Interface or Remote_Types. This does
!          --  not result in a preelaborated context because the package body may
!          --  be on another machine.
! 
!          if Ekind (Body_Id) = E_Package_Body
!            and then Ekind_In (Spec_Id, E_Generic_Package, E_Package)
!            and then (Is_Remote_Call_Interface (Spec_Id)
!                       or else Is_Remote_Types (Spec_Id))
!          then
!             return False;
! 
!          --  Otherwise the node appears within a preelaborated context when the
!          --  associated unit is preelaborated.
! 
!          else
!             return Is_Preelaborated_Unit (Spec_Id);
           end if;
+       end In_Preelaborated_Context;
  
!       -------------------------
!       -- Record_Access_Taken --
!       -------------------------
  
!       procedure Record_Access_Taken
!         (Attr     : Node_Id;
!          Attr_Lvl : Enclosing_Level_Kind)
!       is
!       begin
!          --  Signal any enclosing local exception handlers that the 'Access may
!          --  raise Program_Error due to a failed ABE check when switch -gnatd.o
!          --  (conservative elaboration order for indirect calls) is in effect.
!          --  Marking the exception handlers ensures proper expansion by both
!          --  the front and back end restriction when No_Exception_Propagation
!          --  is in effect.
  
!          if Debug_Flag_Dot_O then
!             Possible_Local_Raise (Attr, Standard_Program_Error);
!          end if;
  
!          --  Add 'Access to the appropriate set
  
!          if Attr_Lvl = Library_Body_Level then
!             Add_Library_Body_Scenario (Attr);
  
!          elsif Attr_Lvl = Library_Spec_Level
!            or else Attr_Lvl = Instantiation_Level
!          then
!             Add_Library_Spec_Scenario (Attr);
!          end if;
! 
!          --  'Access requires a conditional ABE check when the dynamic model is
!          --  in effect.
! 
!          Add_Dynamic_ABE_Check_Scenario (Attr);
!       end Record_Access_Taken;
! 
!       ------------------------------------
!       -- Record_Call_Or_Task_Activation --
!       ------------------------------------
! 
!       procedure Record_Call_Or_Task_Activation
!         (Call     : Node_Id;
!          Call_Lvl : Enclosing_Level_Kind)
!       is
!       begin
!          --  Signal any enclosing local exception handlers that the call may
!          --  raise Program_Error due to failed ABE check. Marking the exception
!          --  handlers ensures proper expansion by both the front and back end
!          --  restriction when No_Exception_Propagation is in effect.
! 
!          Possible_Local_Raise (Call, Standard_Program_Error);
! 
!          --  Perform early detection of guaranteed ABEs in order to suppress
!          --  the instantiation of generic bodies because gigi cannot handle
!          --  certain types of premature instantiations.
! 
!          Process_Guaranteed_ABE
             (N        => Call,
!             In_State => Guaranteed_ABE_State);
  
!          --  Add the call or task activation to the appropriate set
  
!          if Call_Lvl = Declaration_Level then
!             Add_Declaration_Scenario (Call);
  
!          elsif Call_Lvl = Library_Body_Level then
!             Add_Library_Body_Scenario (Call);
  
!          elsif Call_Lvl = Library_Spec_Level
!            or else Call_Lvl = Instantiation_Level
!          then
!             Add_Library_Spec_Scenario (Call);
!          end if;
  
!          --  A call or a task activation requires a conditional ABE check when
!          --  the dynamic model is in effect.
  
!          Add_Dynamic_ABE_Check_Scenario (Call);
!       end Record_Call_Or_Task_Activation;
  
!       --------------------------
!       -- Record_Instantiation --
!       --------------------------
  
+       procedure Record_Instantiation
+         (Inst     : Node_Id;
+          Inst_Lvl : Enclosing_Level_Kind)
+       is
        begin
!          --  Signal enclosing local exception handlers that instantiation may
!          --  raise Program_Error due to failed ABE check. Marking the exception
!          --  handlers ensures proper expansion by both the front and back end
!          --  restriction when No_Exception_Propagation is in effect.
  
!          Possible_Local_Raise (Inst, Standard_Program_Error);
  
!          --  Perform early detection of guaranteed ABEs in order to suppress
!          --  the instantiation of generic bodies because gigi cannot handle
!          --  certain types of premature instantiations.
  
!          Process_Guaranteed_ABE
!            (N        => Inst,
!             In_State => Guaranteed_ABE_State);
  
!          --  Add the instantiation to the appropriate set
  
!          if Inst_Lvl = Declaration_Level then
!             Add_Declaration_Scenario (Inst);
  
!          elsif Inst_Lvl = Library_Body_Level then
!             Add_Library_Body_Scenario (Inst);
  
!          elsif Inst_Lvl = Library_Spec_Level
!            or else Inst_Lvl = Instantiation_Level
!          then
!             Add_Library_Spec_Scenario (Inst);
!          end if;
  
!          --  Instantiations of generics subject to SPARK_Mode On require
!          --  elaboration-related checks even though the instantiations may
!          --  not appear within elaboration code.
  
!          if Is_Suitable_SPARK_Instantiation (Inst) then
!             Add_SPARK_Scenario (Inst);
!          end if;
  
!          --  An instantiation requires a conditional ABE check when the dynamic
!          --  model is in effect.
  
!          Add_Dynamic_ABE_Check_Scenario (Inst);
!       end Record_Instantiation;
  
!       --------------------------------
!       -- Record_Variable_Assignment --
!       --------------------------------
  
!       procedure Record_Variable_Assignment
!         (Asmt     : Node_Id;
!          Asmt_Lvl : Enclosing_Level_Kind)
!       is
        begin
!          --  Add the variable assignment to the appropriate set
  
!          if Asmt_Lvl = Library_Body_Level then
!             Add_Library_Body_Scenario (Asmt);
  
!          elsif Asmt_Lvl = Library_Spec_Level
!            or else Asmt_Lvl = Instantiation_Level
!          then
!             Add_Library_Spec_Scenario (Asmt);
!          end if;
!       end Record_Variable_Assignment;
  
!       -------------------------------
!       -- Record_Variable_Reference --
!       -------------------------------
  
!       procedure Record_Variable_Reference
!         (Ref     : Node_Id;
!          Ref_Lvl : Enclosing_Level_Kind)
!       is
!       begin
!          --  Add the variable reference to the appropriate set
  
!          if Ref_Lvl = Library_Body_Level then
!             Add_Library_Body_Scenario (Ref);
  
!          elsif Ref_Lvl = Library_Spec_Level
!            or else Ref_Lvl = Instantiation_Level
!          then
!             Add_Library_Spec_Scenario (Ref);
!          end if;
!       end Record_Variable_Reference;
  
!       --  Local variables
  
!       Scen     : constant Node_Id := Scenario (N);
!       Scen_Lvl : Enclosing_Level_Kind;
  
!    --  Start of processing for Record_Elaboration_Scenario
  
!    begin
!       --  Nothing to do when switch -gnatH (legacy elaboration checking mode
!       --  enabled) is in effect because the legacy ABE mechanism does not need
!       --  to carry out this action.
  
!       if Legacy_Elaboration_Checks then
!          return;
  
!       --  Nothing to do for ASIS because ABE checks and diagnostics are not
!       --  performed in this mode.
  
!       elsif ASIS_Mode then
!          return;
  
!       --  Nothing to do when the scenario is being preanalyzed
  
+       elsif Preanalysis_Active then
           return;
  
!       --  Nothing to do when the elaboration phase of the compiler is not
!       --  active.
  
!       elsif not Elaboration_Phase_Active then
           return;
+       end if;
  
!       Scen_Lvl := Find_Enclosing_Level (Scen);
  
!       --  Ensure that a library-level call does not appear in a preelaborated
!       --  unit. The check must come before ignoring scenarios within external
!       --  units or inside generics because calls in those context must also be
!       --  verified.
  
!       if Is_Suitable_Call (Scen) then
!          Check_Preelaborated_Call (Scen, Scen_Lvl);
!       end if;
  
!       --  Nothing to do when the scenario does not appear within the main unit
  
!       if not In_Main_Context (Scen) then
           return;
  
!       --  Nothing to do when the scenario appears within a generic
  
!       elsif Inside_A_Generic then
!          return;
  
!       --  'Access
  
!       elsif Is_Suitable_Access_Taken (Scen) then
!          Record_Access_Taken
!            (Attr     => Scen,
!             Attr_Lvl => Scen_Lvl);
  
!       --  Call or task activation
  
!       elsif Is_Suitable_Call (Scen) then
!          Record_Call_Or_Task_Activation
!            (Call     => Scen,
!             Call_Lvl => Scen_Lvl);
  
!       --  Derived type declaration
  
!       elsif Is_Suitable_SPARK_Derived_Type (Scen) then
!          Add_SPARK_Scenario (Scen);
  
!       --  Instantiation
  
!       elsif Is_Suitable_Instantiation (Scen) then
!          Record_Instantiation
!            (Inst     => Scen,
!             Inst_Lvl => Scen_Lvl);
  
!       --  Refined_State pragma
  
!       elsif Is_Suitable_SPARK_Refined_State_Pragma (Scen) then
!          Add_SPARK_Scenario (Scen);
  
!       --  Variable assignment
  
!       elsif Is_Suitable_Variable_Assignment (Scen) then
!          Record_Variable_Assignment
!            (Asmt     => Scen,
!             Asmt_Lvl => Scen_Lvl);
  
!       --  Variable reference
  
!       elsif Is_Suitable_Variable_Reference (Scen) then
!          Record_Variable_Reference
!            (Ref     => Scen,
!             Ref_Lvl => Scen_Lvl);
!       end if;
!    end Record_Elaboration_Scenario;
  
!    --------------
!    -- Scenario --
!    --------------
! 
!    function Scenario (N : Node_Id) return Node_Id is
!       Orig_N : constant Node_Id := Original_Node (N);
  
     begin
!       --  An expanded instantiation is rewritten into a spec-body pair where
!       --  N denotes the spec. In this case the original instantiation is the
!       --  proper elaboration scenario.
  
!       if Nkind (Orig_N) in N_Generic_Instantiation then
!          return Orig_N;
  
!       --  Otherwise the scenario is already in its proper form
  
!       else
!          return N;
!       end if;
!    end Scenario;
  
!    ----------------------
!    -- Scenario_Storage --
!    ----------------------
  
!    package body Scenario_Storage is
  
!       ---------------------
!       -- Data structures --
!       ---------------------
  
!       --  The following sets store all scenarios
  
!       Declaration_Scenarios       : NE_Set.Membership_Set := NE_Set.Nil;
!       Dynamic_ABE_Check_Scenarios : NE_Set.Membership_Set := NE_Set.Nil;
!       Library_Body_Scenarios      : NE_Set.Membership_Set := NE_Set.Nil;
!       Library_Spec_Scenarios      : NE_Set.Membership_Set := NE_Set.Nil;
!       SPARK_Scenarios             : NE_Set.Membership_Set := NE_Set.Nil;
  
!       -------------------------------
!       -- Finalize_Scenario_Storage --
!       -------------------------------
  
!       procedure Finalize_Scenario_Storage is
!       begin
!          NE_Set.Destroy (Declaration_Scenarios);
!          NE_Set.Destroy (Dynamic_ABE_Check_Scenarios);
!          NE_Set.Destroy (Library_Body_Scenarios);
!          NE_Set.Destroy (Library_Spec_Scenarios);
!          NE_Set.Destroy (SPARK_Scenarios);
!       end Finalize_Scenario_Storage;
  
!       ---------------------------------
!       -- Initialize_Scenario_Storage --
!       ---------------------------------
  
!       procedure Initialize_Scenario_Storage is
!       begin
!          Declaration_Scenarios       := NE_Set.Create (1000);
!          Dynamic_ABE_Check_Scenarios := NE_Set.Create (500);
!          Library_Body_Scenarios      := NE_Set.Create (1000);
!          Library_Spec_Scenarios      := NE_Set.Create (1000);
!          SPARK_Scenarios             := NE_Set.Create (100);
!       end Initialize_Scenario_Storage;
  
!       ------------------------------
!       -- Add_Declaration_Scenario --
!       ------------------------------
  
!       procedure Add_Declaration_Scenario (N : Node_Id) is
!          pragma Assert (Present (N));
!       begin
!          NE_Set.Insert (Declaration_Scenarios, N);
!       end Add_Declaration_Scenario;
  
!       ------------------------------------
!       -- Add_Dynamic_ABE_Check_Scenario --
!       ------------------------------------
  
!       procedure Add_Dynamic_ABE_Check_Scenario (N : Node_Id) is
!          pragma Assert (Present (N));
  
!       begin
!          if not Check_Or_Failure_Generation_OK then
!             return;
! 
!          --  Nothing to do if the dynamic model is not in effect
! 
!          elsif not Dynamic_Elaboration_Checks then
!             return;
           end if;
  
!          NE_Set.Insert (Dynamic_ABE_Check_Scenarios, N);
!       end Add_Dynamic_ABE_Check_Scenario;
  
!       -------------------------------
!       -- Add_Library_Body_Scenario --
!       -------------------------------
  
!       procedure Add_Library_Body_Scenario (N : Node_Id) is
!          pragma Assert (Present (N));
!       begin
!          NE_Set.Insert (Library_Body_Scenarios, N);
!       end Add_Library_Body_Scenario;
  
!       -------------------------------
!       -- Add_Library_Spec_Scenario --
!       -------------------------------
  
!       procedure Add_Library_Spec_Scenario (N : Node_Id) is
!          pragma Assert (Present (N));
!       begin
!          NE_Set.Insert (Library_Spec_Scenarios, N);
!       end Add_Library_Spec_Scenario;
  
!       ------------------------
!       -- Add_SPARK_Scenario --
!       ------------------------
  
!       procedure Add_SPARK_Scenario (N : Node_Id) is
!          pragma Assert (Present (N));
!       begin
!          NE_Set.Insert (SPARK_Scenarios, N);
!       end Add_SPARK_Scenario;
  
!       ---------------------
!       -- Delete_Scenario --
!       ---------------------
  
!       procedure Delete_Scenario (N : Node_Id) is
!          pragma Assert (Present (N));
  
!       begin
!          --  Delete the scenario from whichever set it belongs to
  
!          NE_Set.Delete (Declaration_Scenarios,       N);
!          NE_Set.Delete (Dynamic_ABE_Check_Scenarios, N);
!          NE_Set.Delete (Library_Body_Scenarios,      N);
!          NE_Set.Delete (Library_Spec_Scenarios,      N);
!          NE_Set.Delete (SPARK_Scenarios,             N);
!       end Delete_Scenario;
  
!       -----------------------------------
!       -- Iterate_Declaration_Scenarios --
!       -----------------------------------
  
!       function Iterate_Declaration_Scenarios return NE_Set.Iterator is
!       begin
!          return NE_Set.Iterate (Declaration_Scenarios);
!       end Iterate_Declaration_Scenarios;
  
!       -----------------------------------------
!       -- Iterate_Dynamic_ABE_Check_Scenarios --
!       -----------------------------------------
  
!       function Iterate_Dynamic_ABE_Check_Scenarios return NE_Set.Iterator is
!       begin
!          return NE_Set.Iterate (Dynamic_ABE_Check_Scenarios);
!       end Iterate_Dynamic_ABE_Check_Scenarios;
  
!       ------------------------------------
!       -- Iterate_Library_Body_Scenarios --
!       ------------------------------------
  
!       function Iterate_Library_Body_Scenarios return NE_Set.Iterator is
!       begin
!          return NE_Set.Iterate (Library_Body_Scenarios);
!       end Iterate_Library_Body_Scenarios;
  
!       ------------------------------------
!       -- Iterate_Library_Spec_Scenarios --
!       ------------------------------------
  
!       function Iterate_Library_Spec_Scenarios return NE_Set.Iterator is
!       begin
!          return NE_Set.Iterate (Library_Spec_Scenarios);
!       end Iterate_Library_Spec_Scenarios;
  
!       -----------------------------
!       -- Iterate_SPARK_Scenarios --
!       -----------------------------
  
!       function Iterate_SPARK_Scenarios return NE_Set.Iterator is
!       begin
!          return NE_Set.Iterate (SPARK_Scenarios);
!       end Iterate_SPARK_Scenarios;
  
!       ----------------------
!       -- Replace_Scenario --
!       ----------------------
  
!       procedure Replace_Scenario (Old_N : Node_Id; New_N : Node_Id) is
!          procedure Replace_Scenario_In (Scenarios : NE_Set.Membership_Set);
!          --  Determine whether scenario Old_N is present in set Scenarios, and
!          --  if this is the case it, replace it with New_N.
  
!          -------------------------
!          -- Replace_Scenario_In --
!          -------------------------
  
!          procedure Replace_Scenario_In (Scenarios : NE_Set.Membership_Set) is
!          begin
!             --  The set is intentionally checked for existance because node
!             --  rewriting may occur after Sem_Elab has verified all scenarios
!             --  and data structures have been destroyed.
  
!             if NE_Set.Present (Scenarios)
!               and then NE_Set.Contains (Scenarios, Old_N)
!             then
!                NE_Set.Delete (Scenarios, Old_N);
!                NE_Set.Insert (Scenarios, New_N);
              end if;
+          end Replace_Scenario_In;
  
!       --  Start of processing for Replace_Scenario
  
!       begin
!          Replace_Scenario_In (Declaration_Scenarios);
!          Replace_Scenario_In (Dynamic_ABE_Check_Scenarios);
!          Replace_Scenario_In (Library_Body_Scenarios);
!          Replace_Scenario_In (Library_Spec_Scenarios);
!          Replace_Scenario_In (SPARK_Scenarios);
!       end Replace_Scenario;
!    end Scenario_Storage;
  
!    ---------------
!    -- Semantics --
!    ---------------
  
!    package body Semantics is
  
!       --------------------------------
!       -- Is_Accept_Alternative_Proc --
!       --------------------------------
  
!       function Is_Accept_Alternative_Proc (Id : Entity_Id) return Boolean is
!       begin
!          --  To qualify, the entity must denote a procedure with a receiving
!          --  entry.
  
!          return
!            Ekind (Id) = E_Procedure and then Present (Receiving_Entry (Id));
!       end Is_Accept_Alternative_Proc;
  
!       ------------------------
!       -- Is_Activation_Proc --
!       ------------------------
  
!       function Is_Activation_Proc (Id : Entity_Id) return Boolean is
!       begin
!          --  To qualify, the entity must denote one of the runtime procedures
!          --  in charge of task activation.
  
!          if Ekind (Id) = E_Procedure then
!             if Restricted_Profile then
!                return Is_RTE (Id, RE_Activate_Restricted_Tasks);
!             else
!                return Is_RTE (Id, RE_Activate_Tasks);
!             end if;
!          end if;
  
!          return False;
!       end Is_Activation_Proc;
  
!       ----------------------------
!       -- Is_Ada_Semantic_Target --
!       ----------------------------
  
!       function Is_Ada_Semantic_Target (Id : Entity_Id) return Boolean is
!       begin
!          return
!            Is_Activation_Proc (Id)
!              or else Is_Controlled_Proc (Id, Name_Adjust)
!              or else Is_Controlled_Proc (Id, Name_Finalize)
!              or else Is_Controlled_Proc (Id, Name_Initialize)
!              or else Is_Init_Proc (Id)
!              or else Is_Invariant_Proc (Id)
!              or else Is_Protected_Entry (Id)
!              or else Is_Protected_Subp (Id)
!              or else Is_Protected_Body_Subp (Id)
!              or else Is_Subprogram_Inst (Id)
!              or else Is_Task_Entry (Id);
!       end Is_Ada_Semantic_Target;
  
!       --------------------------------
!       -- Is_Assertion_Pragma_Target --
!       --------------------------------
  
!       function Is_Assertion_Pragma_Target (Id : Entity_Id) return Boolean is
!       begin
!          return
!            Is_Default_Initial_Condition_Proc (Id)
!              or else Is_Initial_Condition_Proc (Id)
!              or else Is_Invariant_Proc (Id)
!              or else Is_Partial_Invariant_Proc (Id)
!              or else Is_Postconditions_Proc (Id);
!       end Is_Assertion_Pragma_Target;
  
!       ----------------------------
!       -- Is_Bodiless_Subprogram --
!       ----------------------------
  
!       function Is_Bodiless_Subprogram (Subp_Id : Entity_Id) return Boolean is
!       begin
!          --  An abstract subprogram does not have a body
  
!          if Ekind_In (Subp_Id, E_Function,
!                                E_Operator,
!                                E_Procedure)
!            and then Is_Abstract_Subprogram (Subp_Id)
!          then
!             return True;
  
!          --  A formal subprogram does not have a body
  
!          elsif Is_Formal_Subprogram (Subp_Id) then
!             return True;
  
!          --  An imported subprogram may have a body, however it is not known at
!          --  compile or bind time where the body resides and whether it will be
!          --  elaborated on time.
  
!          elsif Is_Imported (Subp_Id) then
!             return True;
!          end if;
  
!          return False;
!       end Is_Bodiless_Subprogram;
  
!       ----------------------
!       -- Is_Bridge_Target --
!       ----------------------
  
!       function Is_Bridge_Target (Id : Entity_Id) return Boolean is
!       begin
!          return
!            Is_Accept_Alternative_Proc (Id)
!              or else Is_Finalizer_Proc (Id)
!              or else Is_Partial_Invariant_Proc (Id)
!              or else Is_Postconditions_Proc (Id)
!              or else Is_TSS (Id, TSS_Deep_Adjust)
!              or else Is_TSS (Id, TSS_Deep_Finalize)
!              or else Is_TSS (Id, TSS_Deep_Initialize);
!       end Is_Bridge_Target;
  
!       ------------------------
!       -- Is_Controlled_Proc --
!       ------------------------
  
!       function Is_Controlled_Proc
!         (Subp_Id  : Entity_Id;
!          Subp_Nam : Name_Id) return Boolean
!       is
!          Formal_Id : Entity_Id;
  
!       begin
!          pragma Assert (Nam_In (Subp_Nam, Name_Adjust,
!                                           Name_Finalize,
!                                           Name_Initialize));
  
!          --  To qualify, the subprogram must denote a source procedure with
!          --  name Adjust, Finalize, or Initialize where the sole formal is
!          --  controlled.
  
!          if Comes_From_Source (Subp_Id)
!            and then Ekind (Subp_Id) = E_Procedure
!            and then Chars (Subp_Id) = Subp_Nam
!          then
!             Formal_Id := First_Formal (Subp_Id);
  
!             return
!               Present (Formal_Id)
!                 and then Is_Controlled (Etype (Formal_Id))
!                 and then No (Next_Formal (Formal_Id));
!          end if;
  
!          return False;
!       end Is_Controlled_Proc;
  
!       ---------------------------------------
!       -- Is_Default_Initial_Condition_Proc --
!       ---------------------------------------
  
!       function Is_Default_Initial_Condition_Proc
!         (Id : Entity_Id) return Boolean
!       is
!       begin
!          --  To qualify, the entity must denote a Default_Initial_Condition
!          --  procedure.
  
!          return Ekind (Id) = E_Procedure and then Is_DIC_Procedure (Id);
!       end Is_Default_Initial_Condition_Proc;
  
!       -----------------------
!       -- Is_Finalizer_Proc --
!       -----------------------
  
!       function Is_Finalizer_Proc (Id : Entity_Id) return Boolean is
!       begin
!          --  To qualify, the entity must denote a _Finalizer procedure
  
!          return Ekind (Id) = E_Procedure and then Chars (Id) = Name_uFinalizer;
!       end Is_Finalizer_Proc;
  
!       -------------------------------
!       -- Is_Initial_Condition_Proc --
!       -------------------------------
  
!       function Is_Initial_Condition_Proc (Id : Entity_Id) return Boolean is
!       begin
!          --  To qualify, the entity must denote an Initial_Condition procedure
  
!          return
!            Ekind (Id) = E_Procedure
!              and then Is_Initial_Condition_Procedure (Id);
!       end Is_Initial_Condition_Proc;
  
!       --------------------
!       -- Is_Initialized --
!       --------------------
  
!       function Is_Initialized (Obj_Decl : Node_Id) return Boolean is
!       begin
!          --  To qualify, the object declaration must have an expression
  
!          return
!            Present (Expression (Obj_Decl))
!              or else Has_Init_Expression (Obj_Decl);
!       end Is_Initialized;
  
!       -----------------------
!       -- Is_Invariant_Proc --
!       -----------------------
  
!       function Is_Invariant_Proc (Id : Entity_Id) return Boolean is
!       begin
!          --  To qualify, the entity must denote the "full" invariant procedure
  
!          return Ekind (Id) = E_Procedure and then Is_Invariant_Procedure (Id);
!       end Is_Invariant_Proc;
  
!       ---------------------------------------
!       -- Is_Non_Library_Level_Encapsulator --
!       ---------------------------------------
  
!       function Is_Non_Library_Level_Encapsulator
!         (N : Node_Id) return Boolean
!       is
!       begin
!          case Nkind (N) is
!             when N_Abstract_Subprogram_Declaration
!                | N_Aspect_Specification
!                | N_Component_Declaration
!                | N_Entry_Body
!                | N_Entry_Declaration
!                | N_Expression_Function
!                | N_Formal_Abstract_Subprogram_Declaration
!                | N_Formal_Concrete_Subprogram_Declaration
!                | N_Formal_Object_Declaration
!                | N_Formal_Package_Declaration
!                | N_Formal_Type_Declaration
!                | N_Generic_Association
!                | N_Implicit_Label_Declaration
!                | N_Incomplete_Type_Declaration
!                | N_Private_Extension_Declaration
!                | N_Private_Type_Declaration
!                | N_Protected_Body
!                | N_Protected_Type_Declaration
!                | N_Single_Protected_Declaration
!                | N_Single_Task_Declaration
!                | N_Subprogram_Body
!                | N_Subprogram_Declaration
!                | N_Task_Body
!                | N_Task_Type_Declaration
!             =>
!                return True;
  
!             when others =>
!                return Is_Generic_Declaration_Or_Body (N);
!          end case;
!       end Is_Non_Library_Level_Encapsulator;
  
!       -------------------------------
!       -- Is_Partial_Invariant_Proc --
!       -------------------------------
  
!       function Is_Partial_Invariant_Proc (Id : Entity_Id) return Boolean is
!       begin
!          --  To qualify, the entity must denote the "partial" invariant
!          --  procedure.
  
!          return
!            Ekind (Id) = E_Procedure
!              and then Is_Partial_Invariant_Procedure (Id);
!       end Is_Partial_Invariant_Proc;
  
!       ----------------------------
!       -- Is_Postconditions_Proc --
!       ----------------------------
  
!       function Is_Postconditions_Proc (Id : Entity_Id) return Boolean is
!       begin
!          --  To qualify, the entity must denote a _Postconditions procedure
  
!          return
!            Ekind (Id) = E_Procedure and then Chars (Id) = Name_uPostconditions;
!       end Is_Postconditions_Proc;
  
!       ---------------------------
!       -- Is_Preelaborated_Unit --
!       ---------------------------
  
!       function Is_Preelaborated_Unit (Id : Entity_Id) return Boolean is
!       begin
!          return
!            Is_Preelaborated (Id)
!              or else Is_Pure (Id)
!              or else Is_Remote_Call_Interface (Id)
!              or else Is_Remote_Types (Id)
!              or else Is_Shared_Passive (Id);
!       end Is_Preelaborated_Unit;
  
!       ------------------------
!       -- Is_Protected_Entry --
!       ------------------------
  
!       function Is_Protected_Entry (Id : Entity_Id) return Boolean is
!       begin
!          --  To qualify, the entity must denote an entry defined in a protected
!          --  type.
  
!          return
!            Is_Entry (Id)
!              and then Is_Protected_Type (Non_Private_View (Scope (Id)));
!       end Is_Protected_Entry;
  
!       -----------------------
!       -- Is_Protected_Subp --
!       -----------------------
  
!       function Is_Protected_Subp (Id : Entity_Id) return Boolean is
!       begin
!          --  To qualify, the entity must denote a subprogram defined within a
!          --  protected type.
  
!          return
!            Ekind_In (Id, E_Function, E_Procedure)
!              and then Is_Protected_Type (Non_Private_View (Scope (Id)));
!       end Is_Protected_Subp;
  
!       ----------------------------
!       -- Is_Protected_Body_Subp --
!       ----------------------------
  
!       function Is_Protected_Body_Subp (Id : Entity_Id) return Boolean is
!       begin
!          --  To qualify, the entity must denote a subprogram with attribute
!          --  Protected_Subprogram set.
  
!          return
!            Ekind_In (Id, E_Function, E_Procedure)
!              and then Present (Protected_Subprogram (Id));
!       end Is_Protected_Body_Subp;
  
!       -----------------
!       -- Is_Scenario --
!       -----------------
  
!       function Is_Scenario (N : Node_Id) return Boolean is
!       begin
!          case Nkind (N) is
!             when N_Assignment_Statement
!                | N_Attribute_Reference
!                | N_Call_Marker
!                | N_Entry_Call_Statement
!                | N_Expanded_Name
!                | N_Function_Call
!                | N_Function_Instantiation
!                | N_Identifier
!                | N_Package_Instantiation
!                | N_Procedure_Call_Statement
!                | N_Procedure_Instantiation
!                | N_Requeue_Statement
!             =>
!                return True;
  
!             when others =>
!                return False;
!          end case;
!       end Is_Scenario;
  
!       ------------------------------
!       -- Is_SPARK_Semantic_Target --
!       ------------------------------
  
!       function Is_SPARK_Semantic_Target (Id : Entity_Id) return Boolean is
!       begin
!          return
!            Is_Default_Initial_Condition_Proc (Id)
!              or else Is_Initial_Condition_Proc (Id);
!       end Is_SPARK_Semantic_Target;
  
!       ------------------------
!       -- Is_Subprogram_Inst --
!       ------------------------
  
!       function Is_Subprogram_Inst (Id : Entity_Id) return Boolean is
!       begin
!          --  To qualify, the entity must denote a function or a procedure which
!          --  is hidden within an anonymous package, and is a generic instance.
  
!          return
!            Ekind_In (Id, E_Function, E_Procedure)
!              and then Is_Hidden (Id)
!              and then Is_Generic_Instance (Id);
!       end Is_Subprogram_Inst;
  
!       ------------------------------
!       -- Is_Suitable_Access_Taken --
!       ------------------------------
  
!       function Is_Suitable_Access_Taken (N : Node_Id) return Boolean is
!          Nam     : Name_Id;
!          Pref    : Node_Id;
!          Subp_Id : Entity_Id;
  
!       begin
!          --  Nothing to do when switch -gnatd.U (ignore 'Access) is in effect
  
!          if Debug_Flag_Dot_UU then
!             return False;
  
!          --  Nothing to do when the scenario is not an attribute reference
  
!          elsif Nkind (N) /= N_Attribute_Reference then
!             return False;
  
!          --  Nothing to do for internally-generated attributes because they are
!          --  assumed to be ABE safe.
  
!          elsif not Comes_From_Source (N) then
!             return False;
!          end if;
  
!          Nam  := Attribute_Name (N);
!          Pref := Prefix (N);
  
!          --  Sanitize the prefix of the attribute
  
!          if not Is_Entity_Name (Pref) then
!             return False;
  
!          elsif No (Entity (Pref)) then
!             return False;
!          end if;
  
!          Subp_Id := Entity (Pref);
  
!          if not Is_Subprogram_Or_Entry (Subp_Id) then
!             return False;
!          end if;
  
!          --  Traverse a possible chain of renamings to obtain the original
!          --  entry or subprogram which the prefix may rename.
  
!          Subp_Id := Get_Renamed_Entity (Subp_Id);
  
!          --  To qualify, the attribute must meet the following prerequisites:
  
!          return
  
!            --  The prefix must denote a source entry, operator, or subprogram
!            --  which is not imported.
  
!            Comes_From_Source (Subp_Id)
!              and then Is_Subprogram_Or_Entry (Subp_Id)
!              and then not Is_Bodiless_Subprogram (Subp_Id)
  
!              --  The attribute name must be one of the 'Access forms. Note that
!              --  'Unchecked_Access cannot apply to a subprogram.
  
!              and then Nam_In (Nam, Name_Access, Name_Unrestricted_Access);
!       end Is_Suitable_Access_Taken;
  
!       ----------------------
!       -- Is_Suitable_Call --
!       ----------------------
  
!       function Is_Suitable_Call (N : Node_Id) return Boolean is
!       begin
!          --  Entry and subprogram calls are intentionally ignored because they
!          --  may undergo expansion depending on the compilation mode, previous
!          --  errors, generic context, etc. Call markers play the role of calls
!          --  and provide a uniform foundation for ABE processing.
  
!          return Nkind (N) = N_Call_Marker;
!       end Is_Suitable_Call;
  
!       -------------------------------
!       -- Is_Suitable_Instantiation --
!       -------------------------------
  
!       function Is_Suitable_Instantiation (N : Node_Id) return Boolean is
!          Inst : constant Node_Id := Scenario (N);
  
!       begin
!          --  To qualify, the instantiation must come from source
  
!          return
!            Comes_From_Source (Inst)
!              and then Nkind (Inst) in N_Generic_Instantiation;
!       end Is_Suitable_Instantiation;
  
!       ------------------------------------
!       -- Is_Suitable_SPARK_Derived_Type --
!       ------------------------------------
  
!       function Is_Suitable_SPARK_Derived_Type (N : Node_Id) return Boolean is
!          Prag : Node_Id;
!          Typ  : Entity_Id;
  
!       begin
!          --  To qualify, the type declaration must denote a derived tagged type
!          --  with primitive operations, subject to pragma SPARK_Mode On.
  
!          if Nkind (N) = N_Full_Type_Declaration
!            and then Nkind (Type_Definition (N)) = N_Derived_Type_Definition
!          then
!             Typ  := Defining_Entity (N);
!             Prag := SPARK_Pragma (Typ);
  
!             return
!               Is_Tagged_Type (Typ)
!                 and then Has_Primitive_Operations (Typ)
!                 and then Present (Prag)
!                 and then Get_SPARK_Mode_From_Annotation (Prag) = On;
!          end if;
  
!          return False;
!       end Is_Suitable_SPARK_Derived_Type;
  
!       -------------------------------------
!       -- Is_Suitable_SPARK_Instantiation --
!       -------------------------------------
  
!       function Is_Suitable_SPARK_Instantiation (N : Node_Id) return Boolean is
!          Inst : constant Node_Id := Scenario (N);
  
!          Gen_Id : Entity_Id;
!          Prag   : Node_Id;
  
!       begin
!          --  To qualify, both the instantiation and the generic must be subject
!          --  to SPARK_Mode On.
  
!          if Is_Suitable_Instantiation (N) then
!             Gen_Id := Instantiated_Generic (Inst);
!             Prag   := SPARK_Pragma (Gen_Id);
  
!             return
!               Is_SPARK_Mode_On_Node (Inst)
!                 and then Present (Prag)
!                 and then Get_SPARK_Mode_From_Annotation (Prag) = On;
           end if;
  
!          return False;
!       end Is_Suitable_SPARK_Instantiation;
  
!       --------------------------------------------
!       -- Is_Suitable_SPARK_Refined_State_Pragma --
!       --------------------------------------------
  
!       function Is_Suitable_SPARK_Refined_State_Pragma
!         (N : Node_Id) return Boolean
!       is
!       begin
!          --  To qualfy, the pragma must denote Refined_State
  
!          return
!            Nkind (N) = N_Pragma
!              and then Pragma_Name (N) = Name_Refined_State;
!       end Is_Suitable_SPARK_Refined_State_Pragma;
  
!       -------------------------------------
!       -- Is_Suitable_Variable_Assignment --
!       -------------------------------------
  
!       function Is_Suitable_Variable_Assignment (N : Node_Id) return Boolean is
!          N_Unit      : Node_Id;
!          N_Unit_Id   : Entity_Id;
!          Nam         : Node_Id;
!          Var_Decl    : Node_Id;
!          Var_Id      : Entity_Id;
!          Var_Unit    : Node_Id;
!          Var_Unit_Id : Entity_Id;
  
!       begin
!          --  Nothing to do when the scenario is not an assignment
  
!          if Nkind (N) /= N_Assignment_Statement then
!             return False;
  
!          --  Nothing to do for internally-generated assignments because they
!          --  are assumed to be ABE safe.
  
!          elsif not Comes_From_Source (N) then
!             return False;
  
!          --  Assignments are ignored in GNAT mode on the assumption that
!          --  they are ABE-safe. This behaviour parallels that of the old
!          --  ABE mechanism.
  
!          elsif GNAT_Mode then
!             return False;
!          end if;
  
!          Nam := Assignment_Target (N);
  
!          --  Sanitize the left hand side of the assignment
  
!          if not Is_Entity_Name (Nam) then
!             return False;
  
!          elsif No (Entity (Nam)) then
!             return False;
!          end if;
  
!          Var_Id := Entity (Nam);
  
!          --  Sanitize the variable
  
!          if Var_Id = Any_Id then
!             return False;
  
!          elsif Ekind (Var_Id) /= E_Variable then
!             return False;
           end if;
  
!          Var_Decl := Declaration_Node (Var_Id);
  
!          if Nkind (Var_Decl) /= N_Object_Declaration then
!             return False;
!          end if;
  
!          N_Unit_Id := Find_Top_Unit (N);
!          N_Unit    := Unit_Declaration_Node (N_Unit_Id);
  
!          Var_Unit_Id := Find_Top_Unit (Var_Decl);
!          Var_Unit    := Unit_Declaration_Node (Var_Unit_Id);
  
!          --  To qualify, the assignment must meet the following prerequisites:
  
!          return
!            Comes_From_Source (Var_Id)
  
!              --  The variable must be declared in the spec of compilation unit
!              --  U.
  
!              and then Nkind (Var_Unit) = N_Package_Declaration
!              and then Find_Enclosing_Level (Var_Decl) = Library_Spec_Level
  
!              --  The assignment must occur in the body of compilation unit U
  
!              and then Nkind (N_Unit) = N_Package_Body
!              and then Present (Corresponding_Body (Var_Unit))
!              and then Corresponding_Body (Var_Unit) = N_Unit_Id;
!       end Is_Suitable_Variable_Assignment;
  
!       ------------------------------------
!       -- Is_Suitable_Variable_Reference --
!       ------------------------------------
  
!       function Is_Suitable_Variable_Reference (N : Node_Id) return Boolean is
!       begin
!          --  Expanded names and identifiers are intentionally ignored because
!          --  they be folded, optimized away, etc. Variable references markers
!          --  play the role of variable references and provide a uniform
!          --  foundation for ABE processing.
  
!          return Nkind (N) = N_Variable_Reference_Marker;
!       end Is_Suitable_Variable_Reference;
  
!       -------------------
!       -- Is_Task_Entry --
!       -------------------
  
!       function Is_Task_Entry (Id : Entity_Id) return Boolean is
!       begin
!          --  To qualify, the entity must denote an entry defined in a task type
  
!          return
!            Is_Entry (Id) and then Is_Task_Type (Non_Private_View (Scope (Id)));
!       end Is_Task_Entry;
  
!       ------------------------
!       -- Is_Up_Level_Target --
!       ------------------------
  
!       function Is_Up_Level_Target
!         (Targ_Decl : Node_Id;
!          In_State  : Processing_In_State) return Boolean
!       is
!          Root     : constant Node_Id         := Root_Scenario;
!          Root_Rep : constant Scenario_Rep_Id :=
!                       Scenario_Representation_Of (Root, In_State);
  
!       begin
!          --  The root appears within the declaratons of a block statement,
!          --  entry body, subprogram body, or task body ignoring enclosing
!          --  packages. The root is always within the main unit.
  
!          if not In_State.Suppress_Up_Level_Targets
!            and then Level (Root_Rep) = Declaration_Level
           then
!             --  The target is within the main unit. It acts as an up-level
!             --  target when it appears within a context which encloses the
!             --  root.
!             --
!             --    package body Main_Unit is
!             --       function Func ...;             --  target
!             --
!             --       procedure Proc is
!             --          X : ... := Func;            --  root scenario
! 
!             if In_Extended_Main_Code_Unit (Targ_Decl) then
!                return not In_Same_Context (Root, Targ_Decl, Nested_OK => True);
! 
!             --  Otherwise the target is external to the main unit which makes
!             --  it an up-level target.
! 
!             else
!                return True;
!             end if;
           end if;
  
!          return False;
!       end Is_Up_Level_Target;
!    end Semantics;
  
!    ---------------------------
!    -- Set_Elaboration_Phase --
!    ---------------------------
  
+    procedure Set_Elaboration_Phase (Status : Elaboration_Phase_Status) is
     begin
!       Elaboration_Phase := Status;
!    end Set_Elaboration_Phase;
  
!    ---------------------
!    -- SPARK_Processor --
!    ---------------------
  
!    package body SPARK_Processor is
  
!       -----------------------
!       -- Local subprograms --
!       -----------------------
  
!       procedure Process_SPARK_Derived_Type
!         (Typ_Decl : Node_Id;
!          Typ_Rep  : Scenario_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_SPARK_Derived_Type);
!       --  Verify that the freeze node of a derived type denoted by declaration
!       --  Typ_Decl is within the early call region of each overriding primitive
!       --  body that belongs to the derived type (SPARK RM 7.7(8)). Typ_Rep is
!       --  the representation of the type. In_State denotes the current state of
!       --  the Processing phase.
  
!       procedure Process_SPARK_Instantiation
!         (Inst     : Node_Id;
!          Inst_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_SPARK_Instantiation);
!       --  Verify that instanciation Inst does not precede the generic body it
!       --  instantiates (SPARK RM 7.7(6)). Inst_Rep is the representation of the
!       --  instantiation. In_State is the current state of the Processing phase.
  
!       procedure Process_SPARK_Refined_State_Pragma
!         (Prag     : Node_Id;
!          Prag_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_SPARK_Refined_State_Pragma);
!       --  Verify that each constituent of Refined_State pragma Prag which
!       --  belongs to abstract state mentioned in pragma Initializes has prior
!       --  elaboration with respect to the main unit (SPARK RM 7.7.1(7)).
!       --  Prag_Rep is the representation of the pragma. In_State denotes the
!       --  current state of the Processing phase.
  
!       procedure Process_SPARK_Scenario
!         (N        : Node_Id;
!          In_State : Processing_In_State);
!       pragma Inline (Process_SPARK_Scenario);
!       --  Top-level dispatcher for verifying SPARK scenarios which are not
!       --  always executable during elaboration but still need elaboration-
!       --  related checks. In_State is the current state of the Processing
!       --  phase.
  
!       ---------------------------------
!       -- Check_SPARK_Model_In_Effect --
!       ---------------------------------
  
!       SPARK_Model_Warning_Posted : Boolean := False;
!       --  This flag prevents the same SPARK model-related warning from being
!       --  emitted multiple times.
  
!       procedure Check_SPARK_Model_In_Effect is
!          Spec_Id : constant Entity_Id := Unique_Entity (Main_Unit_Entity);
  
!       begin
!          --  Do not emit the warning multiple times as this creates useless
!          --  noise.
  
!          if SPARK_Model_Warning_Posted then
!             null;
  
!          --  SPARK rule verification requires the "strict" static model
! 
!          elsif Static_Elaboration_Checks
!            and not Relaxed_Elaboration_Checks
           then
!             null;
! 
!          --  Any other combination of models does not guarantee the absence of
!          --  ABE problems for SPARK rule verification purposes. Note that there
!          --  is no need to check for the presence of the legacy ABE mechanism
!          --  because the legacy code has its own dedicated processing for SPARK
!          --  rules.
! 
!          else
!             SPARK_Model_Warning_Posted := True;
! 
!             Error_Msg_N
!               ("??SPARK elaboration checks require static elaboration model",
!                Spec_Id);
! 
!             if Dynamic_Elaboration_Checks then
!                Error_Msg_N
!                  ("\dynamic elaboration model is in effect", Spec_Id);
! 
!             else
!                pragma Assert (Relaxed_Elaboration_Checks);
!                Error_Msg_N
!                  ("\relaxed elaboration model is in effect", Spec_Id);
!             end if;
           end if;
!       end Check_SPARK_Model_In_Effect;
  
!       ---------------------------
!       -- Check_SPARK_Scenarios --
!       ---------------------------
  
!       procedure Check_SPARK_Scenarios is
!          Iter : NE_Set.Iterator;
!          N    : Node_Id;
  
!       begin
!          Iter := Iterate_SPARK_Scenarios;
!          while NE_Set.Has_Next (Iter) loop
!             NE_Set.Next (Iter, N);
  
!             Process_SPARK_Scenario
!               (N        => N,
!                In_State => SPARK_State);
!          end loop;
!       end Check_SPARK_Scenarios;
  
!       --------------------------------
!       -- Process_SPARK_Derived_Type --
!       --------------------------------
  
!       procedure Process_SPARK_Derived_Type
!         (Typ_Decl : Node_Id;
!          Typ_Rep  : Scenario_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          pragma Unreferenced (In_State);
  
!          Typ : constant Entity_Id := Target (Typ_Rep);
  
!          Stop_Check : exception;
!          --  This exception is raised when the freeze node violates the
!          --  placement rules.
  
!          procedure Check_Overriding_Primitive
!            (Prim  : Entity_Id;
!             FNode : Node_Id);
!          pragma Inline (Check_Overriding_Primitive);
!          --  Verify that freeze node FNode is within the early call region of
!          --  overriding primitive Prim's body.
  
!          function Freeze_Node_Location (FNode : Node_Id) return Source_Ptr;
!          pragma Inline (Freeze_Node_Location);
!          --  Return a more accurate source location associated with freeze node
!          --  FNode.
  
!          function Precedes_Source_Construct (N : Node_Id) return Boolean;
!          pragma Inline (Precedes_Source_Construct);
!          --  Determine whether arbitrary node N appears prior to some source
!          --  construct.
  
!          procedure Suggest_Elaborate_Body
!            (N         : Node_Id;
!             Body_Decl : Node_Id;
!             Error_Nod : Node_Id);
!          pragma Inline (Suggest_Elaborate_Body);
!          --  Suggest the use of pragma Elaborate_Body when the pragma will
!          --  allow for node N to appear within the early call region of
!          --  subprogram body Body_Decl. The suggestion is attached to
!          --  Error_Nod as a continuation error.
  
!          --------------------------------
!          -- Check_Overriding_Primitive --
!          --------------------------------
  
!          procedure Check_Overriding_Primitive
!            (Prim  : Entity_Id;
!             FNode : Node_Id)
!          is
!             Prim_Decl : constant Node_Id := Unit_Declaration_Node (Prim);
!             Body_Decl : Node_Id;
!             Body_Id   : Entity_Id;
!             Region    : Node_Id;
  
!          begin
!             --  Nothing to do for predefined primitives because they are
!             --  artifacts of tagged type expansion and cannot override source
!             --  primitives. Nothing to do as well for inherited primitives, as
!             --  the check concerns overriding ones.
  
!             if Is_Predefined_Dispatching_Operation (Prim)
!               or else not Is_Overriding_Subprogram (Prim)
!             then
!                return;
!             end if;
  
!             Body_Id := Corresponding_Body (Prim_Decl);
  
!             --  Nothing to do when the primitive does not have a corresponding
!             --  body. This can happen when the unit with the bodies is not the
!             --  main unit subjected to ABE checks.
  
!             if No (Body_Id) then
!                return;
  
!             --  The primitive overrides a parent or progenitor primitive
  
!             elsif Present (Overridden_Operation (Prim)) then
  
!                --  Nothing to do when overriding an interface primitive happens
!                --  by inheriting a non-interface primitive as the check would
!                --  be done on the parent primitive.
  
!                if Present (Alias (Prim)) then
!                   return;
!                end if;
  
!             --  Nothing to do when the primitive is not overriding. The body of
!             --  such a primitive cannot be targeted by a dispatching call which
!             --  is executable during elaboration, and cannot cause an ABE.
  
!             else
!                return;
!             end if;
  
!             Body_Decl := Unit_Declaration_Node (Body_Id);
!             Region    := Find_Early_Call_Region (Body_Decl);
  
!             --  The freeze node appears prior to the early call region of the
!             --  primitive body.
  
!             --  IMPORTANT: This check must always be performed even when
!             --  -gnatd.v (enforce SPARK elaboration rules in SPARK code) is not
!             --  specified because the static model cannot guarantee the absence
!             --  of ABEs in the presence of dispatching calls.
  
!             if Earlier_In_Extended_Unit (FNode, Region) then
!                Error_Msg_Node_2 := Prim;
!                Error_Msg_NE
!                  ("first freezing point of type & must appear within early "
!                   & "call region of primitive body & (SPARK RM 7.7(8))",
!                   Typ_Decl, Typ);
  
!                Error_Msg_Sloc := Sloc (Region);
!                Error_Msg_N ("\region starts #", Typ_Decl);
  
!                Error_Msg_Sloc := Sloc (Body_Decl);
!                Error_Msg_N ("\region ends #", Typ_Decl);
  
!                Error_Msg_Sloc := Freeze_Node_Location (FNode);
!                Error_Msg_N ("\first freezing point #", Typ_Decl);
  
!                --  If applicable, suggest the use of pragma Elaborate_Body in
!                --  the associated package spec.
  
!                Suggest_Elaborate_Body
!                  (N         => FNode,
!                   Body_Decl => Body_Decl,
!                   Error_Nod => Typ_Decl);
  
!                raise Stop_Check;
!             end if;
!          end Check_Overriding_Primitive;
  
!          --------------------------
!          -- Freeze_Node_Location --
!          --------------------------
  
!          function Freeze_Node_Location (FNode : Node_Id) return Source_Ptr is
!             Context : constant Node_Id    := Parent (FNode);
!             Loc     : constant Source_Ptr := Sloc (FNode);
  
!             Prv_Decls : List_Id;
!             Vis_Decls : List_Id;
  
!          begin
!             --  In general, the source location of the freeze node is as close
!             --  as possible to the real freeze point, except when the freeze
!             --  node is at the "bottom" of a package spec.
  
!             if Nkind (Context) = N_Package_Specification then
!                Prv_Decls := Private_Declarations (Context);
!                Vis_Decls := Visible_Declarations (Context);
  
!                --  The freeze node appears in the private declarations of the
!                --  package.
  
!                if Present (Prv_Decls)
!                  and then List_Containing (FNode) = Prv_Decls
!                then
!                   null;
  
!                --  The freeze node appears in the visible declarations of the
!                --  package and there are no private declarations.
  
!                elsif Present (Vis_Decls)
!                  and then List_Containing (FNode) = Vis_Decls
!                  and then (No (Prv_Decls) or else Is_Empty_List (Prv_Decls))
!                then
!                   null;
  
!                --  Otherwise the freeze node is not in the "last" declarative
!                --  list of the package. Use the existing source location of the
!                --  freeze node.
  
!                else
!                   return Loc;
!                end if;
  
!                --  The freeze node appears at the "bottom" of the package when
!                --  it is in the "last" declarative list and is either the last
!                --  in the list or is followed by internal constructs only. In
!                --  that case the more appropriate source location is that of
!                --  the package end label.
  
!                if not Precedes_Source_Construct (FNode) then
!                   return Sloc (End_Label (Context));
!                end if;
!             end if;
  
!             return Loc;
!          end Freeze_Node_Location;
  
!          -------------------------------
!          -- Precedes_Source_Construct --
!          -------------------------------
  
!          function Precedes_Source_Construct (N : Node_Id) return Boolean is
!             Decl : Node_Id;
  
!          begin
!             Decl := Next (N);
!             while Present (Decl) loop
!                if Comes_From_Source (Decl) then
!                   return True;
  
!                --  A generated body for a source expression function is treated
!                --  as a source construct.
  
!                elsif Nkind (Decl) = N_Subprogram_Body
!                  and then Was_Expression_Function (Decl)
!                  and then Comes_From_Source (Original_Node (Decl))
!                then
!                   return True;
!                end if;
  
!                Next (Decl);
!             end loop;
  
!             return False;
!          end Precedes_Source_Construct;
  
!          ----------------------------
!          -- Suggest_Elaborate_Body --
!          ----------------------------
  
!          procedure Suggest_Elaborate_Body
!            (N         : Node_Id;
!             Body_Decl : Node_Id;
!             Error_Nod : Node_Id)
!          is
!             Unit_Id : constant Node_Id := Unit (Cunit (Main_Unit));
!             Region  : Node_Id;
  
!          begin
!             --  The suggestion applies only when the subprogram body resides in
!             --  a compilation package body, and a pragma Elaborate_Body would
!             --  allow for the node to appear in the early call region of the
!             --  subprogram body. This implies that all code from the subprogram
!             --  body up to the node is preelaborable.
! 
!             if Nkind (Unit_Id) = N_Package_Body then
! 
!                --  Find the start of the early call region again assuming that
!                --  the package spec has pragma Elaborate_Body. Note that the
!                --  internal data structures are intentionally not updated
!                --  because this is a speculative search.
! 
!                Region :=
!                  Find_Early_Call_Region
!                    (Body_Decl        => Body_Decl,
!                     Assume_Elab_Body => True,
!                     Skip_Memoization => True);
! 
!                --  If the node appears within the early call region, assuming
!                --  that the package spec carries pragma Elaborate_Body, then it
!                --  is safe to suggest the pragma.
! 
!                if Earlier_In_Extended_Unit (Region, N) then
!                   Error_Msg_Name_1 := Name_Elaborate_Body;
!                   Error_Msg_NE
!                     ("\consider adding pragma % in spec of unit &",
!                      Error_Nod, Defining_Entity (Unit_Id));
!                end if;
              end if;
!          end Suggest_Elaborate_Body;
  
!          --  Local variables
  
!          FNode : constant Node_Id  := Freeze_Node (Typ);
!          Prims : constant Elist_Id := Direct_Primitive_Operations (Typ);
  
!          Prim_Elmt : Elmt_Id;
  
!       --  Start of processing for Process_SPARK_Derived_Type
  
!       begin
!          --  A type should have its freeze node set by the time SPARK scenarios
!          --  are being verified.
  
!          pragma Assert (Present (FNode));
  
!          --  Verify that the freeze node of the derived type is within the
!          --  early call region of each overriding primitive body
!          --  (SPARK RM 7.7(8)).
  
!          if Present (Prims) then
!             Prim_Elmt := First_Elmt (Prims);
!             while Present (Prim_Elmt) loop
!                Check_Overriding_Primitive
!                  (Prim  => Node (Prim_Elmt),
!                   FNode => FNode);
  
!                Next_Elmt (Prim_Elmt);
!             end loop;
!          end if;
  
!       exception
!          when Stop_Check =>
!             null;
!       end Process_SPARK_Derived_Type;
  
!       ---------------------------------
!       -- Process_SPARK_Instantiation --
!       ---------------------------------
  
!       procedure Process_SPARK_Instantiation
!         (Inst     : Node_Id;
!          Inst_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          Gen_Id    : constant Entity_Id     := Target (Inst_Rep);
!          Gen_Rep   : constant Target_Rep_Id :=
!                        Target_Representation_Of (Gen_Id, In_State);
!          Body_Decl : constant Node_Id       := Body_Declaration (Gen_Rep);
  
!       begin
!          --  The instantiation and the generic body are both in the main unit
  
!          if Present (Body_Decl)
!            and then In_Extended_Main_Code_Unit (Body_Decl)
  
!            --  If the instantiation appears prior to the generic body, then the
!            --  instantiation is illegal (SPARK RM 7.7(6)).
  
!            --  IMPORTANT: This check must always be performed even when
!            --  -gnatd.v (enforce SPARK elaboration rules in SPARK code) is not
!            --  specified because the rule prevents use-before-declaration of
!            --  objects that may precede the generic body.
  
!            and then Earlier_In_Extended_Unit (Inst, Body_Decl)
!          then
!             Error_Msg_NE
!               ("cannot instantiate & before body seen", Inst, Gen_Id);
!          end if;
!       end Process_SPARK_Instantiation;
  
!       ----------------------------
!       -- Process_SPARK_Scenario --
!       ----------------------------
  
!       procedure Process_SPARK_Scenario
!         (N        : Node_Id;
!          In_State : Processing_In_State)
!       is
!          Scen : constant Node_Id := Scenario (N);
  
!       begin
!          --  Ensure that a suitable elaboration model is in effect for SPARK
!          --  rule verification.
  
!          Check_SPARK_Model_In_Effect;
  
!          --  Add the current scenario to the stack of active scenarios
  
!          Push_Active_Scenario (Scen);
  
!          --  Derived type
  
!          if Is_Suitable_SPARK_Derived_Type (Scen) then
!             Process_SPARK_Derived_Type
!               (Typ_Decl => Scen,
!                Typ_Rep  => Scenario_Representation_Of (Scen, In_State),
!                In_State => In_State);
  
!          --  Instantiation
  
!          elsif Is_Suitable_SPARK_Instantiation (Scen) then
!             Process_SPARK_Instantiation
!               (Inst     => Scen,
!                Inst_Rep => Scenario_Representation_Of (Scen, In_State),
!                In_State => In_State);
  
!          --  Refined_State pragma
  
!          elsif Is_Suitable_SPARK_Refined_State_Pragma (Scen) then
!             Process_SPARK_Refined_State_Pragma
!               (Prag     => Scen,
!                Prag_Rep => Scenario_Representation_Of (Scen, In_State),
!                In_State => In_State);
!          end if;
  
!          --  Remove the current scenario from the stack of active scenarios
!          --  once all ABE diagnostics and checks have been performed.
  
!          Pop_Active_Scenario (Scen);
!       end Process_SPARK_Scenario;
  
!       ----------------------------------------
!       -- Process_SPARK_Refined_State_Pragma --
!       ----------------------------------------
  
!       procedure Process_SPARK_Refined_State_Pragma
!         (Prag     : Node_Id;
!          Prag_Rep : Scenario_Rep_Id;
!          In_State : Processing_In_State)
!       is
!          pragma Unreferenced (Prag_Rep);
  
!          procedure Check_SPARK_Constituent (Constit_Id : Entity_Id);
!          pragma Inline (Check_SPARK_Constituent);
!          --  Ensure that a single constituent Constit_Id is elaborated prior to
!          --  the main unit.
  
!          procedure Check_SPARK_Constituents (Constits : Elist_Id);
!          pragma Inline (Check_SPARK_Constituents);
!          --  Ensure that all constituents found in list Constits are elaborated
!          --  prior to the main unit.
  
!          procedure Check_SPARK_Initialized_State (State : Node_Id);
!          pragma Inline (Check_SPARK_Initialized_State);
!          --  Ensure that the constituents of single abstract state State are
!          --  elaborated prior to the main unit.
  
!          procedure Check_SPARK_Initialized_States (Pack_Id : Entity_Id);
!          pragma Inline (Check_SPARK_Initialized_States);
!          --  Ensure that the constituents of all abstract states which appear
!          --  in the Initializes pragma of package Pack_Id are elaborated prior
!          --  to the main unit.
  
!          -----------------------------
!          -- Check_SPARK_Constituent --
!          -----------------------------
  
!          procedure Check_SPARK_Constituent (Constit_Id : Entity_Id) is
!             SM_Prag : Node_Id;
  
!          begin
!             --  Nothing to do for "null" constituents
  
!             if Nkind (Constit_Id) = N_Null then
!                return;
  
!             --  Nothing to do for illegal constituents
  
!             elsif Error_Posted (Constit_Id) then
!                return;
!             end if;
  
!             SM_Prag := SPARK_Pragma (Constit_Id);
  
!             --  The check applies only when the constituent is subject to
!             --  pragma SPARK_Mode On.
  
!             if Present (SM_Prag)
!               and then Get_SPARK_Mode_From_Annotation (SM_Prag) = On
!             then
!                --  An external constituent of an abstract state which appears
!                --  in the Initializes pragma of a package spec imposes an
!                --  Elaborate requirement on the context of the main unit.
!                --  Determine whether the context has a pragma strong enough to
!                --  meet the requirement.
  
!                --  IMPORTANT: This check is performed only when -gnatd.v
!                --  (enforce SPARK elaboration rules in SPARK code) is in effect
!                --  because the static model can ensure the prior elaboration of
!                --  the unit which contains a constituent by installing implicit
!                --  Elaborate pragma.
! 
!                if Debug_Flag_Dot_V then
!                   Meet_Elaboration_Requirement
!                     (N        => Prag,
!                      Targ_Id  => Constit_Id,
!                      Req_Nam  => Name_Elaborate,
!                      In_State => In_State);
! 
!                --  Otherwise ensure that the unit with the external constituent
!                --  is elaborated prior to the main unit.
! 
!                else
!                   Ensure_Prior_Elaboration
!                     (N        => Prag,
!                      Unit_Id  => Find_Top_Unit (Constit_Id),
!                      Prag_Nam => Name_Elaborate,
!                      In_State => In_State);
!                end if;
!             end if;
!          end Check_SPARK_Constituent;
! 
!          ------------------------------
!          -- Check_SPARK_Constituents --
!          ------------------------------
! 
!          procedure Check_SPARK_Constituents (Constits : Elist_Id) is
!             Constit_Elmt : Elmt_Id;
  
           begin
!             if Present (Constits) then
!                Constit_Elmt := First_Elmt (Constits);
!                while Present (Constit_Elmt) loop
!                   Check_SPARK_Constituent (Node (Constit_Elmt));
!                   Next_Elmt (Constit_Elmt);
!                end loop;
!             end if;
!          end Check_SPARK_Constituents;
  
!          -----------------------------------
!          -- Check_SPARK_Initialized_State --
!          -----------------------------------
  
!          procedure Check_SPARK_Initialized_State (State : Node_Id) is
!             SM_Prag  : Node_Id;
!             State_Id : Entity_Id;
  
!          begin
!             --  Nothing to do for "null" initialization items
  
!             if Nkind (State) = N_Null then
!                return;
  
!             --  Nothing to do for illegal states
  
!             elsif Error_Posted (State) then
!                return;
!             end if;
  
!             State_Id := Entity_Of (State);
  
!             --  Sanitize the state
  
!             if No (State_Id) then
!                return;
  
!             elsif Error_Posted (State_Id) then
!                return;
  
!             elsif Ekind (State_Id) /= E_Abstract_State then
!                return;
!             end if;
  
!             --  The check is performed only when the abstract state is subject
!             --  to SPARK_Mode On.
  
!             SM_Prag := SPARK_Pragma (State_Id);
! 
!             if Present (SM_Prag)
!               and then Get_SPARK_Mode_From_Annotation (SM_Prag) = On
!             then
!                Check_SPARK_Constituents (Refinement_Constituents (State_Id));
              end if;
+          end Check_SPARK_Initialized_State;
  
!          ------------------------------------
!          -- Check_SPARK_Initialized_States --
!          ------------------------------------
  
!          procedure Check_SPARK_Initialized_States (Pack_Id : Entity_Id) is
!             Init_Prag : constant Node_Id :=
!                           Get_Pragma (Pack_Id, Pragma_Initializes);
  
!             Init  : Node_Id;
!             Inits : Node_Id;
  
           begin
!             if Present (Init_Prag) then
!                Inits := Expression (Get_Argument (Init_Prag, Pack_Id));
  
!                --  Avoid processing a "null" initialization list. The only
!                --  other alternative is an aggregate.
! 
!                if Nkind (Inits) = N_Aggregate then
! 
!                   --  The initialization items appear in list form:
!                   --
!                   --    (state1, state2)
! 
!                   if Present (Expressions (Inits)) then
!                      Init := First (Expressions (Inits));
!                      while Present (Init) loop
!                         Check_SPARK_Initialized_State (Init);
!                         Next (Init);
!                      end loop;
!                   end if;
! 
!                   --  The initialization items appear in associated form:
!                   --
!                   --    (state1 => item1,
!                   --     state2 => (item2, item3))
! 
!                   if Present (Component_Associations (Inits)) then
!                      Init := First (Component_Associations (Inits));
!                      while Present (Init) loop
!                         Check_SPARK_Initialized_State (Init);
!                         Next (Init);
!                      end loop;
!                   end if;
!                end if;
!             end if;
!          end Check_SPARK_Initialized_States;
! 
!          --  Local variables
! 
!          Pack_Body : constant Node_Id := Find_Related_Package_Or_Body (Prag);
! 
!       --  Start of processing for Process_SPARK_Refined_State_Pragma
  
        begin
!          --  Pragma Refined_State must be associated with a package body
  
!          pragma Assert
!            (Present (Pack_Body) and then Nkind (Pack_Body) = N_Package_Body);
  
!          --  Verify that each external contitunent of an abstract state
!          --  mentioned in pragma Initializes is properly elaborated.
  
!          Check_SPARK_Initialized_States (Unique_Defining_Entity (Pack_Body));
!       end Process_SPARK_Refined_State_Pragma;
!    end SPARK_Processor;
  
!    -------------------------------
!    -- Spec_And_Body_From_Entity --
!    -------------------------------
  
+    procedure Spec_And_Body_From_Entity
+      (Id        : Node_Id;
+       Spec_Decl : out Node_Id;
+       Body_Decl : out Node_Id)
+    is
     begin
!       Spec_And_Body_From_Node
!         (N         => Unit_Declaration_Node (Id),
!          Spec_Decl => Spec_Decl,
!          Body_Decl => Body_Decl);
!    end Spec_And_Body_From_Entity;
  
!    -----------------------------
!    -- Spec_And_Body_From_Node --
!    -----------------------------
  
!    procedure Spec_And_Body_From_Node
!      (N         : Node_Id;
!       Spec_Decl : out Node_Id;
!       Body_Decl : out Node_Id)
!    is
!       Body_Id : Entity_Id;
!       Spec_Id : Entity_Id;
  
!    begin
!       --  Assume that the construct lacks spec and body
  
!       Body_Decl := Empty;
!       Spec_Decl := Empty;
  
!       --  Bodies
  
!       if Nkind_In (N, N_Package_Body,
!                       N_Protected_Body,
!                       N_Subprogram_Body,
!                       N_Task_Body)
!       then
!          Spec_Id := Corresponding_Spec (N);
! 
!          --  The body completes a previous declaration
! 
!          if Present (Spec_Id) then
!             Spec_Decl := Unit_Declaration_Node (Spec_Id);
! 
!          --  Otherwise the body acts as the initial declaration, and is both a
!          --  spec and body. There is no need to look for an optional body.
! 
!          else
!             Body_Decl := N;
!             Spec_Decl := N;
!             return;
!          end if;
! 
!       --  Declarations
! 
!       elsif Nkind_In (N, N_Entry_Declaration,
!                          N_Generic_Package_Declaration,
!                          N_Generic_Subprogram_Declaration,
!                          N_Package_Declaration,
!                          N_Protected_Type_Declaration,
!                          N_Subprogram_Declaration,
!                          N_Task_Type_Declaration)
!       then
!          Spec_Decl := N;
! 
!       --  Expression function
! 
!       elsif Nkind (N) = N_Expression_Function then
!          Spec_Id := Corresponding_Spec (N);
!          pragma Assert (Present (Spec_Id));
! 
!          Spec_Decl := Unit_Declaration_Node (Spec_Id);
! 
!       --  Instantiations
! 
!       elsif Nkind (N) in N_Generic_Instantiation then
!          Spec_Decl := Instance_Spec (N);
!          pragma Assert (Present (Spec_Decl));
! 
!       --  Stubs
! 
!       elsif Nkind (N) in N_Body_Stub then
!          Spec_Id := Corresponding_Spec_Of_Stub (N);
! 
!          --  The stub completes a previous declaration
! 
!          if Present (Spec_Id) then
!             Spec_Decl := Unit_Declaration_Node (Spec_Id);
! 
!          --  Otherwise the stub acts as a spec
! 
!          else
!             Spec_Decl := N;
!          end if;
        end if;
  
!       --  Obtain an optional or mandatory body
  
!       if Present (Spec_Decl) then
!          Body_Id := Corresponding_Body (Spec_Decl);
! 
!          if Present (Body_Id) then
!             Body_Decl := Unit_Declaration_Node (Body_Id);
!          end if;
!       end if;
!    end Spec_And_Body_From_Node;
! 
!    -------------------------------
!    -- Static_Elaboration_Checks --
!    -------------------------------
! 
!    function Static_Elaboration_Checks return Boolean is
!    begin
!       return not Dynamic_Elaboration_Checks;
!    end Static_Elaboration_Checks;
  
     -----------------
     -- Unit_Entity --
*************** package body Sem_Elab is
*** 11266,11373 ****
     ---------------------------------
  
     procedure Update_Elaboration_Scenario (New_N : Node_Id; Old_N : Node_Id) is
!       procedure Update_SPARK_Scenario;
!       pragma Inline (Update_SPARK_Scenario);
!       --  Update the contents of table SPARK_Scenarios if Old_N is recorded
!       --  there.
! 
!       procedure Update_Top_Level_Scenario;
!       pragma Inline (Update_Top_Level_Scenario);
!       --  Update the contexts of table Top_Level_Scenarios if Old_N is recorded
!       --  there.
! 
!       ---------------------------
!       -- Update_SPARK_Scenario --
!       ---------------------------
! 
!       procedure Update_SPARK_Scenario is
!          package Scenarios renames SPARK_Scenarios;
! 
!       begin
!          if Is_Recorded_SPARK_Scenario (Old_N) then
! 
!             --  Performance note: list traversal
! 
!             for Index in Scenarios.First .. Scenarios.Last loop
!                if Scenarios.Table (Index) = Old_N then
!                   Scenarios.Table (Index) := New_N;
! 
!                   --  The old SPARK scenario is no longer recorded, but the new
!                   --  one is.
! 
!                   Set_Is_Recorded_Top_Level_Scenario (Old_N, False);
!                   Set_Is_Recorded_Top_Level_Scenario (New_N);
!                   return;
!                end if;
!             end loop;
! 
!             --  A recorded SPARK scenario must be in the table of recorded
!             --  SPARK scenarios.
! 
!             pragma Assert (False);
!          end if;
!       end Update_SPARK_Scenario;
! 
!       -------------------------------
!       -- Update_Top_Level_Scenario --
!       -------------------------------
! 
!       procedure Update_Top_Level_Scenario is
!          package Scenarios renames Top_Level_Scenarios;
! 
!       begin
!          if Is_Recorded_Top_Level_Scenario (Old_N) then
! 
!             --  Performance note: list traversal
! 
!             for Index in Scenarios.First .. Scenarios.Last loop
!                if Scenarios.Table (Index) = Old_N then
!                   Scenarios.Table (Index) := New_N;
! 
!                   --  The old top-level scenario is no longer recorded, but the
!                   --  new one is.
! 
!                   Set_Is_Recorded_Top_Level_Scenario (Old_N, False);
!                   Set_Is_Recorded_Top_Level_Scenario (New_N);
!                   return;
!                end if;
!             end loop;
! 
!             --  A recorded top-level scenario must be in the table of recorded
!             --  top-level scenarios.
! 
!             pragma Assert (False);
!          end if;
!       end Update_Top_Level_Scenario;
  
!    --  Start of processing for Update_Elaboration_Requirement
  
-    begin
        --  Nothing to do when the old and new scenarios are one and the same
  
!       if Old_N = New_N then
           return;
  
        --  A scenario is being transformed by Atree.Rewrite. Update all relevant
        --  internal data structures to reflect this change. This ensures that a
        --  potential run-time conditional ABE check or a guaranteed ABE failure
        --  is inserted at the proper place in the tree.
  
!       elsif Is_Scenario (Old_N) then
!          Update_SPARK_Scenario;
!          Update_Top_Level_Scenario;
        end if;
     end Update_Elaboration_Scenario;
  
-    -------------------------
-    -- Visited_Bodies_Hash --
-    -------------------------
- 
-    function Visited_Bodies_Hash (Key : Node_Id) return Visited_Bodies_Index is
-    begin
-       return Visited_Bodies_Index (Key mod Visited_Bodies_Max);
-    end Visited_Bodies_Hash;
- 
     ---------------------------------------------------------------------------
     --                                                                       --
     --  L E G A C Y    A C C E S S    B E F O R E    E L A B O R A T I O N   --
--- 15970,15998 ----
     ---------------------------------
  
     procedure Update_Elaboration_Scenario (New_N : Node_Id; Old_N : Node_Id) is
!    begin
!       --  Nothing to do when the elaboration phase of the compiler is not
!       --  active.
  
!       if not Elaboration_Phase_Active then
!          return;
  
        --  Nothing to do when the old and new scenarios are one and the same
  
!       elsif Old_N = New_N then
           return;
+       end if;
  
        --  A scenario is being transformed by Atree.Rewrite. Update all relevant
        --  internal data structures to reflect this change. This ensures that a
        --  potential run-time conditional ABE check or a guaranteed ABE failure
        --  is inserted at the proper place in the tree.
  
!       if Is_Scenario (Old_N) then
!          Replace_Scenario (Old_N, New_N);
        end if;
     end Update_Elaboration_Scenario;
  
     ---------------------------------------------------------------------------
     --                                                                       --
     --  L E G A C Y    A C C E S S    B E F O R E    E L A B O R A T I O N   --
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_elab.ads gcc-10.1.0/gcc/ada/sem_elab.ads
*** gcc-9.3.0/gcc/ada/sem_elab.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_elab.ads	Thu May  7 10:49:59 2020
*************** with Types; use Types;
*** 30,54 ****
  
  package Sem_Elab is
  
!    procedure Build_Call_Marker (N : Node_Id);
!    --  Create a call marker for call or requeue statement N and record it for
!    --  later processing by the ABE mechanism.
! 
!    procedure Build_Variable_Reference_Marker
!      (N     : Node_Id;
!       Read  : Boolean;
!       Write : Boolean);
!    --  Create a variable reference marker for arbitrary node N if it mentions a
!    --  variable, and record it for later processing by the ABE mechanism. Flag
!    --  Read should be set when the reference denotes a read. Flag Write should
!    --  be set when the reference denotes a write.
! 
!    procedure Check_Elaboration_Scenarios;
!    --  Examine each scenario recorded during analysis/resolution and apply the
!    --  Ada or SPARK elaboration rules taking into account the model in effect.
!    --  This processing detects and diagnoses ABE issues, installs conditional
!    --  ABE checks or guaranteed ABE failures, and ensures the elaboration of
!    --  units.
  
     --  The following type classifies the various enclosing levels used in ABE
     --  diagnostics.
--- 30,38 ----
  
  package Sem_Elab is
  
!    -----------
!    -- Types --
!    -----------
  
     --  The following type classifies the various enclosing levels used in ABE
     --  diagnostics.
*************** package Sem_Elab is
*** 64,72 ****
        --          package Nested is              --  enclosing package ignored
        --             X ...                       --  at declaration level
  
!       Generic_Package_Spec,
!       Generic_Package_Body,
!       --  A construct is at the "generic library level" when it appears in a
        --  generic package library unit, ignoring enclosing packages. Example:
  
        --    generic
--- 48,56 ----
        --          package Nested is              --  enclosing package ignored
        --             X ...                       --  at declaration level
  
!       Generic_Spec_Level,
!       Generic_Body_Level,
!       --  A construct is at the "generic level" when it appears in a
        --  generic package library unit, ignoring enclosing packages. Example:
  
        --    generic
*************** package Sem_Elab is
*** 74,87 ****
        --       package Nested is                 --  enclosing package ignored
        --          X ...                          --  at generic library level
  
!       Instantiation,
        --  A construct is at the "instantiation library level" when it appears
        --  in a library unit which is also an instantiation. Example:
  
        --    package Inst is new Gen;             --  at instantiation level
  
!       Package_Spec,
!       Package_Body,
        --  A construct is at the "library level" when it appears in a package
        --  library unit, ignoring enclosing packages. Example:
  
--- 58,71 ----
        --       package Nested is                 --  enclosing package ignored
        --          X ...                          --  at generic library level
  
!       Instantiation_Level,
        --  A construct is at the "instantiation library level" when it appears
        --  in a library unit which is also an instantiation. Example:
  
        --    package Inst is new Gen;             --  at instantiation level
  
!       Library_Spec_Level,
!       Library_Body_Level,
        --  A construct is at the "library level" when it appears in a package
        --  library unit, ignoring enclosing packages. Example:
  
*************** package Sem_Elab is
*** 93,118 ****
        --  This value is used to indicate that none of the levels above are in
        --  effect.
  
!    subtype Any_Library_Level is Enclosing_Level_Kind range
!      Generic_Package_Spec ..
!      Package_Body;
! 
!    subtype Generic_Library_Level is Enclosing_Level_Kind range
!      Generic_Package_Spec ..
!      Generic_Package_Body;
  
     subtype Library_Level is Enclosing_Level_Kind range
!      Package_Spec ..
!      Package_Body;
  
     subtype Library_Or_Instantiation_Level is Enclosing_Level_Kind range
!      Instantiation ..
!      Package_Body;
  
     function Find_Enclosing_Level (N : Node_Id) return Enclosing_Level_Kind;
     --  Determine the enclosing level of arbitrary node N
  
     procedure Initialize;
     --  Initialize the internal structures of this unit
  
     procedure Kill_Elaboration_Scenario (N : Node_Id);
--- 77,122 ----
        --  This value is used to indicate that none of the levels above are in
        --  effect.
  
!    subtype Generic_Level is Enclosing_Level_Kind range
!      Generic_Spec_Level ..
!      Generic_Body_Level;
  
     subtype Library_Level is Enclosing_Level_Kind range
!      Library_Spec_Level ..
!      Library_Body_Level;
  
     subtype Library_Or_Instantiation_Level is Enclosing_Level_Kind range
!      Instantiation_Level ..
!      Library_Body_Level;
! 
!    procedure Build_Call_Marker (N : Node_Id);
!    pragma Inline (Build_Call_Marker);
!    --  Create a call marker for call or requeue statement N and record it for
!    --  later processing by the ABE mechanism.
! 
!    procedure Build_Variable_Reference_Marker
!      (N     : Node_Id;
!       Read  : Boolean;
!       Write : Boolean);
!    pragma Inline (Build_Variable_Reference_Marker);
!    --  Create a variable reference marker for arbitrary node N if it mentions a
!    --  variable, and record it for later processing by the ABE mechanism. Flag
!    --  Read should be set when the reference denotes a read. Flag Write should
!    --  be set when the reference denotes a write.
! 
!    procedure Check_Elaboration_Scenarios;
!    --  Examine each scenario recorded during analysis/resolution and apply the
!    --  Ada or SPARK elaboration rules taking into account the model in effect.
!    --  This processing detects and diagnoses ABE issues, installs conditional
!    --  ABE checks or guaranteed ABE failures, and ensures the elaboration of
!    --  units.
  
     function Find_Enclosing_Level (N : Node_Id) return Enclosing_Level_Kind;
+    pragma Inline (Find_Enclosing_Level);
     --  Determine the enclosing level of arbitrary node N
  
     procedure Initialize;
+    pragma Inline (Initialize);
     --  Initialize the internal structures of this unit
  
     procedure Kill_Elaboration_Scenario (N : Node_Id);
*************** package Sem_Elab is
*** 121,129 ****
     --  dead code.
  
     procedure Record_Elaboration_Scenario (N : Node_Id);
     --  Determine whether atribtray node N denotes a scenario which requires
!    --  ABE diagnostics or runtime checks. If this is the case, store N into
!    --  a table for later processing.
  
     ---------------------------------------------------------------------------
     --                                                                       --
--- 125,134 ----
     --  dead code.
  
     procedure Record_Elaboration_Scenario (N : Node_Id);
+    pragma Inline (Record_Elaboration_Scenario);
     --  Determine whether atribtray node N denotes a scenario which requires
!    --  ABE diagnostics or runtime checks. If this is the case, store N for
!    --  later processing.
  
     ---------------------------------------------------------------------------
     --                                                                       --
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_eval.adb gcc-10.1.0/gcc/ada/sem_eval.adb
*** gcc-9.3.0/gcc/ada/sem_eval.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_eval.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Eval is
*** 562,584 ****
        elsif Is_Out_Of_Range (N, Base_Type (T), Assume_Valid => True) then
           Out_Of_Range (N);
  
!       --  Give warning if outside subtype (where one or both of the bounds of
!       --  the subtype is static). This warning is omitted if the expression
!       --  appears in a range that could be null (warnings are handled elsewhere
!       --  for this case).
  
        elsif T /= Base_Type (T) and then Nkind (Parent (N)) /= N_Range then
           if Is_In_Range (N, T, Assume_Valid => True) then
              null;
  
           elsif Is_Out_Of_Range (N, T, Assume_Valid => True) then
- 
              --  Ignore out of range values for System.Priority in CodePeer
              --  mode since the actual target compiler may provide a wider
              --  range.
  
              if CodePeer_Mode and then T = RTE (RE_Priority) then
                 Set_Do_Range_Check (N, False);
              else
                 Apply_Compile_Time_Constraint_Error
                   (N, "value not in range of}<<", CE_Range_Check_Failed);
--- 562,592 ----
        elsif Is_Out_Of_Range (N, Base_Type (T), Assume_Valid => True) then
           Out_Of_Range (N);
  
!       --  Give a warning or error on the value outside the subtype. A warning
!       --  is omitted if the expression appears in a range that could be null
!       --  (warnings are handled elsewhere for this case).
  
        elsif T /= Base_Type (T) and then Nkind (Parent (N)) /= N_Range then
           if Is_In_Range (N, T, Assume_Valid => True) then
              null;
  
           elsif Is_Out_Of_Range (N, T, Assume_Valid => True) then
              --  Ignore out of range values for System.Priority in CodePeer
              --  mode since the actual target compiler may provide a wider
              --  range.
  
              if CodePeer_Mode and then T = RTE (RE_Priority) then
                 Set_Do_Range_Check (N, False);
+ 
+             --  Determine if the out-of-range violation constitutes a warning
+             --  or an error based on context, according to RM 4.9 (34/3).
+ 
+             elsif Nkind_In (Original_Node (N), N_Type_Conversion,
+                                                N_Qualified_Expression)
+               and then Comes_From_Source (Original_Node (N))
+             then
+                Apply_Compile_Time_Constraint_Error
+                  (N, "value not in range of}", CE_Range_Check_Failed);
              else
                 Apply_Compile_Time_Constraint_Error
                   (N, "value not in range of}<<", CE_Range_Check_Failed);
*************** package body Sem_Eval is
*** 986,991 ****
--- 994,1006 ----
           Lf : constant Node_Id := Compare_Fixup (L);
           Rf : constant Node_Id := Compare_Fixup (R);
  
+          function Is_Rewritten_Loop_Entry (N : Node_Id) return Boolean;
+          --  An attribute reference to Loop_Entry may have been rewritten into
+          --  its prefix as a way to avoid generating a constant for that
+          --  attribute when the corresponding pragma is ignored. These nodes
+          --  should be ignored when deciding if they can be equal to one
+          --  another.
+ 
           function Is_Same_Subscript (L, R : List_Id) return Boolean;
           --  L, R are the Expressions values from two attribute nodes for First
           --  or Last attributes. Either may be set to No_List if no expressions
*************** package body Sem_Eval is
*** 993,998 ****
--- 1008,1026 ----
           --  expressions represent the same subscript (note one case is where
           --  one subscript is missing and the other is explicitly set to 1).
  
+          -----------------------------
+          -- Is_Rewritten_Loop_Entry --
+          -----------------------------
+ 
+          function Is_Rewritten_Loop_Entry (N : Node_Id) return Boolean is
+             Orig_N : constant Node_Id := Original_Node (N);
+          begin
+             return Orig_N /= N
+               and then Nkind (Orig_N) = N_Attribute_Reference
+               and then Get_Attribute_Id (Attribute_Name (Orig_N)) =
+                 Attribute_Loop_Entry;
+          end Is_Rewritten_Loop_Entry;
+ 
           -----------------------
           -- Is_Same_Subscript --
           -----------------------
*************** package body Sem_Eval is
*** 1018,1040 ****
        --  Start of processing for Is_Same_Value
  
        begin
!          --  Values are the same if they refer to the same entity and the
!          --  entity is non-volatile. This does not however apply to Float
!          --  types, since we may have two NaN values and they should never
!          --  compare equal.
  
!          --  If the entity is a discriminant, the two expressions may be bounds
!          --  of components of objects of the same discriminated type. The
!          --  values of the discriminants are not static, and therefore the
!          --  result is unknown.
  
!          --  It would be better to comment individual branches of this test ???
  
!          if Nkind_In (Lf, N_Identifier, N_Expanded_Name)
             and then Nkind_In (Rf, N_Identifier, N_Expanded_Name)
             and then Entity (Lf) = Entity (Rf)
             and then Ekind (Entity (Lf)) /= E_Discriminant
             and then Present (Entity (Lf))
             and then not Is_Floating_Point_Type (Etype (L))
             and then not Is_Volatile_Reference (L)
             and then not Is_Volatile_Reference (R)
--- 1046,1077 ----
        --  Start of processing for Is_Same_Value
  
        begin
!          --  Loop_Entry nodes rewritten into their prefix inside ignored
!          --  pragmas should never lead to a decision of equality.
  
!          if Is_Rewritten_Loop_Entry (Lf)
!            or else Is_Rewritten_Loop_Entry (Rf)
!          then
!             return False;
  
!          --  Values are the same if they refer to the same entity and the
!          --  entity is nonvolatile.
  
!          elsif Nkind_In (Lf, N_Identifier, N_Expanded_Name)
             and then Nkind_In (Rf, N_Identifier, N_Expanded_Name)
             and then Entity (Lf) = Entity (Rf)
+ 
+            --  If the entity is a discriminant, the two expressions may be
+            --  bounds of components of objects of the same discriminated type.
+            --  The values of the discriminants are not static, and therefore
+            --  the result is unknown.
+ 
             and then Ekind (Entity (Lf)) /= E_Discriminant
             and then Present (Entity (Lf))
+ 
+            --  This does not however apply to Float types, since we may have
+            --  two NaN values and they should never compare equal.
+ 
             and then not Is_Floating_Point_Type (Etype (L))
             and then not Is_Volatile_Reference (L)
             and then not Is_Volatile_Reference (R)
*************** package body Sem_Eval is
*** 4241,4253 ****
        --  The NULL access value
  
        elsif Kind = N_Null then
!          pragma Assert (Is_Access_Type (Underlying_Type (Etype (N))));
           Val := Uint_0;
  
!       --  Otherwise must be character literal
  
!       else
!          pragma Assert (Kind = N_Character_Literal);
           Ent := Entity (N);
  
           --  Since Character literals of type Standard.Character don't
--- 4278,4290 ----
        --  The NULL access value
  
        elsif Kind = N_Null then
!          pragma Assert (Is_Access_Type (Underlying_Type (Etype (N)))
!            or else Error_Posted (N));
           Val := Uint_0;
  
!       --  Character literal
  
!       elsif Kind = N_Character_Literal then
           Ent := Entity (N);
  
           --  Since Character literals of type Standard.Character don't
*************** package body Sem_Eval is
*** 4261,4266 ****
--- 4298,4312 ----
           else
              Val := Enumeration_Pos (Ent);
           end if;
+ 
+       --  Unchecked conversion, which can come from System'To_Address (X)
+       --  where X is a static integer expression. Recursively evaluate X.
+ 
+       elsif Kind = N_Unchecked_Type_Conversion then
+          Val := Expr_Value (Expression (N));
+ 
+       else
+          raise Program_Error;
        end if;
  
        --  Come here with Val set to value to be returned, set cache
*************** package body Sem_Eval is
*** 4281,4287 ****
           return Ent;
        else
           pragma Assert (Ekind (Ent) = E_Constant);
!          return Expr_Value_E (Constant_Value (Ent));
        end if;
     end Expr_Value_E;
  
--- 4327,4341 ----
           return Ent;
        else
           pragma Assert (Ekind (Ent) = E_Constant);
! 
!          --  We may be dealing with a enumerated character type constant, so
!          --  handle that case here.
! 
!          if Nkind (Constant_Value (Ent)) = N_Character_Literal then
!             return Ent;
!          else
!             return Expr_Value_E (Constant_Value (Ent));
!          end if;
        end if;
     end Expr_Value_E;
  
*************** package body Sem_Eval is
*** 4611,4620 ****
--- 4665,4678 ----
        --  will cause semantic errors if it is marked as static), and after
        --  the Resolve step (since Resolve in some cases sets this flag).
  
+       --  We mark the node as analyzed so that its type is not erased by
+       --  calling Analyze_Real_Literal.
+ 
        Analyze (N);
        Set_Is_Static_Expression (N, Static);
        Set_Etype (N, Typ);
        Resolve (N);
+       Set_Analyzed (N);
        Set_Is_Static_Expression (N, Static);
     end Fold_Ureal;
  
*************** package body Sem_Eval is
*** 5474,5481 ****
           --  CodePeer mode where the target runtime may have more priorities.
  
           elsif not CodePeer_Mode or else Etype (N) /= RTE (RE_Priority) then
!             Apply_Compile_Time_Constraint_Error
!               (N, "value not in range of}", CE_Range_Check_Failed);
           end if;
  
        --  Here we generate a warning for the Ada 83 case, or when we are in an
--- 5532,5549 ----
           --  CodePeer mode where the target runtime may have more priorities.
  
           elsif not CodePeer_Mode or else Etype (N) /= RTE (RE_Priority) then
!             --  Determine if the out-of-range violation constitutes a warning
!             --  or an error based on context, according to RM 4.9 (34/3).
! 
!             if Nkind (Original_Node (N)) = N_Type_Conversion
!               and then not Comes_From_Source (Original_Node (N))
!             then
!                Apply_Compile_Time_Constraint_Error
!                  (N, "value not in range of}??", CE_Range_Check_Failed);
!             else
!                Apply_Compile_Time_Constraint_Error
!                  (N, "value not in range of}", CE_Range_Check_Failed);
!             end if;
           end if;
  
        --  Here we generate a warning for the Ada 83 case, or when we are in an
*************** package body Sem_Eval is
*** 5837,5843 ****
     --  In addition, in GNAT, the object size (Esize) values of the types must
     --  match if they are set (unless checking an actual for a formal derived
     --  type). The use of 'Object_Size can cause this to be false even if the
!    --  types would otherwise match in the RM sense.
  
     function Subtypes_Statically_Match
       (T1                      : Entity_Id;
--- 5905,5912 ----
     --  In addition, in GNAT, the object size (Esize) values of the types must
     --  match if they are set (unless checking an actual for a formal derived
     --  type). The use of 'Object_Size can cause this to be false even if the
!    --  types would otherwise match in the Ada 95 RM sense, but this deviation
!    --  is adopted by AI12-059 which introduces Object_Size in Ada 2020.
  
     function Subtypes_Statically_Match
       (T1                      : Entity_Id;
*************** package body Sem_Eval is
*** 5853,5860 ****
        --  No match if sizes different (from use of 'Object_Size). This test
        --  is excluded if Formal_Derived_Matching is True, as the base types
        --  can be different in that case and typically have different sizes.
-       --  ??? Frontend_Layout_On_Target used to set Esizes but this is no
-       --  longer the case, consider removing the last test below.
  
        elsif not Formal_Derived_Matching
          and then Known_Static_Esize (T1)
--- 5922,5927 ----
*************** package body Sem_Eval is
*** 5972,5988 ****
           --  same base type.
  
           if Has_Discriminants (T1) /= Has_Discriminants (T2) then
!             --  A generic actual type is declared through a subtype declaration
!             --  and may have an inconsistent indication of the presence of
!             --  discriminants, so check the type it renames.
! 
!             if Is_Generic_Actual_Type (T1)
!               and then not Has_Discriminants (Etype (T1))
!               and then not Has_Discriminants (T2)
!             then
!                return True;
! 
!             elsif In_Instance then
                 if Is_Private_Type (T2)
                   and then Present (Full_View (T2))
                   and then Has_Discriminants (Full_View (T2))
--- 6039,6045 ----
           --  same base type.
  
           if Has_Discriminants (T1) /= Has_Discriminants (T2) then
!             if In_Instance then
                 if Is_Private_Type (T2)
                   and then Present (Full_View (T2))
                   and then Has_Discriminants (Full_View (T2))
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_eval.ads gcc-10.1.0/gcc/ada/sem_eval.ads
*** gcc-9.3.0/gcc/ada/sem_eval.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_eval.ads	Thu May  7 10:49:59 2020
*************** package Sem_Eval is
*** 224,229 ****
--- 224,231 ----
     --  efficient with compile time known values, e.g. range analysis for the
     --  purpose of removing checks is more effective if we know precise bounds.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Compile_Time_Known_Value_Or_Aggr (Op : Node_Id) return Boolean;
     --  Similar to Compile_Time_Known_Value, but also returns True if the value
     --  is a compile-time-known aggregate, i.e. an aggregate all of whose
*************** package Sem_Eval is
*** 412,417 ****
--- 414,421 ----
     --  for compile time evaluation purposes. Use Compile_Time_Known_Value
     --  instead (see section on "Compile-Time Known Values" above).
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Is_OK_Static_Range (N : Node_Id) return Boolean;
     --  Determines if range is static, as defined in RM 4.9(26), and also checks
     --  that neither bound of the range raises constraint error, thus ensuring
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_prag.adb gcc-10.1.0/gcc/ada/sem_prag.adb
*** gcc-9.3.0/gcc/ada/sem_prag.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_prag.adb	Thu May  7 10:49:59 2020
*************** with Elists;    use Elists;
*** 41,46 ****
--- 41,47 ----
  with Errout;    use Errout;
  with Exp_Dist;  use Exp_Dist;
  with Exp_Util;  use Exp_Util;
+ with Expander;  use Expander;
  with Freeze;    use Freeze;
  with Ghost;     use Ghost;
  with Gnatvsn;   use Gnatvsn;
*************** package body Sem_Prag is
*** 298,303 ****
--- 299,319 ----
     --  pragma. Entity name for unit and its parents is taken from item in
     --  previous with_clause that mentions the unit.
  
+    procedure Validate_Compile_Time_Warning_Or_Error
+      (N    : Node_Id;
+       Eloc : Source_Ptr);
+    --  Common processing for Compile_Time_Error and Compile_Time_Warning of
+    --  pragma N. Called when the pragma is processed as part of its regular
+    --  analysis but also called after calling the back end to validate these
+    --  pragmas for size and alignment appropriateness.
+ 
+    procedure Defer_Compile_Time_Warning_Error_To_BE (N : Node_Id);
+    --  N is a pragma Compile_Time_Error or Compile_Warning_Error whose boolean
+    --  expression is not known at compile time during the front end. This
+    --  procedure makes an entry in a table. The actual checking is performed by
+    --  Validate_Compile_Time_Warning_Errors, which is invoked after calling the
+    --  back end.
+ 
     Dummy : Integer := 0;
     pragma Volatile (Dummy);
     --  Dummy volatile integer used in bodies of ip/rv to prevent optimization
*************** package body Sem_Prag is
*** 316,321 ****
--- 332,372 ----
     --  pragma in the source program, a breakpoint on rv catches this place in
     --  the source, allowing convenient stepping to the point of interest.
  
+    ------------------------------------------------------
+    -- Table for Defer_Compile_Time_Warning_Error_To_BE --
+    ------------------------------------------------------
+ 
+    --  The following table collects pragmas Compile_Time_Error and Compile_
+    --  Time_Warning for validation. Entries are made by calls to subprogram
+    --  Defer_Compile_Time_Warning_Error_To_BE, and the call to the procedure
+    --  Validate_Compile_Time_Warning_Errors does the actual error checking
+    --  and posting of warning and error messages. The reason for this delayed
+    --  processing is to take advantage of back-annotations of attributes size
+    --  and alignment values performed by the back end.
+ 
+    --  Note: the reason we store a Source_Ptr value instead of a Node_Id is
+    --  that by the time Validate_Compile_Time_Warning_Errors is called, Sprint
+    --  will already have modified all Sloc values if the -gnatD option is set.
+ 
+    type CTWE_Entry is record
+       Eloc  : Source_Ptr;
+       --  Source location used in warnings and error messages
+ 
+       Prag  : Node_Id;
+       --  Pragma Compile_Time_Error or Compile_Time_Warning
+ 
+       Scope : Node_Id;
+       --  The scope which encloses the pragma
+    end record;
+ 
+    package Compile_Time_Warnings_Errors is new Table.Table (
+      Table_Component_Type => CTWE_Entry,
+      Table_Index_Type     => Int,
+      Table_Low_Bound      => 1,
+      Table_Initial        => 50,
+      Table_Increment      => 200,
+      Table_Name           => "Compile_Time_Warnings_Errors");
+ 
     -------------------------------
     -- Adjust_External_Name_Case --
     -------------------------------
*************** package body Sem_Prag is
*** 1040,1046 ****
                          --  template is legal, do not perform this check in
                          --  the instance to circumvent this oddity.
  
!                         if Is_Generic_Instance (Spec_Id) then
                             null;
  
                          --  An abstract state with visible refinement cannot
--- 1091,1097 ----
                          --  template is legal, do not perform this check in
                          --  the instance to circumvent this oddity.
  
!                         if In_Instance then
                             null;
  
                          --  An abstract state with visible refinement cannot
*************** package body Sem_Prag is
*** 1211,1218 ****
             (Item_Is_Input  : out Boolean;
              Item_Is_Output : out Boolean)
           is
           begin
!             case Ekind (Item_Id) is
  
                 --  Abstract states
  
--- 1262,1283 ----
             (Item_Is_Input  : out Boolean;
              Item_Is_Output : out Boolean)
           is
+             --  A constant or IN parameter of access type should be handled
+             --  like a variable, as the underlying memory pointed-to can be
+             --  modified. Use Adjusted_Kind to do this adjustment.
+ 
+             Adjusted_Kind : Entity_Kind := Ekind (Item_Id);
+ 
           begin
!             if Ekind_In (Item_Id, E_Constant,
!                                   E_Generic_In_Parameter,
!                                   E_In_Parameter)
!               and then Is_Access_Type (Etype (Item_Id))
!             then
!                Adjusted_Kind := E_Variable;
!             end if;
! 
!             case Adjusted_Kind is
  
                 --  Abstract states
  
*************** package body Sem_Prag is
*** 1252,1258 ****
  
                    Item_Is_Output := False;
  
!                --  Variables and IN OUT parameters
  
                 when E_Generic_In_Out_Parameter
                    | E_In_Out_Parameter
--- 1317,1325 ----
  
                    Item_Is_Output := False;
  
!                --  Variables and IN OUT parameters, as well as constants and
!                --  IN parameters of access type which are handled like
!                --  variables.
  
                 when E_Generic_In_Out_Parameter
                    | E_In_Out_Parameter
*************** package body Sem_Prag is
*** 2022,2027 ****
--- 2089,2095 ----
       (N        : Node_Id;
        Expr_Val : out Boolean)
     is
+       Prag_Id  : constant Pragma_Id := Get_Pragma_Id (Pragma_Name (N));
        Arg1     : constant Node_Id   :=
                     First (Pragma_Argument_Associations (N));
        Obj_Decl : constant Node_Id   := Find_Related_Context (N);
*************** package body Sem_Prag is
*** 2048,2056 ****
        --    pragma Async_Readers (Obj);
        --    pragma Volatile (Obj);
  
!       if not Is_Effectively_Volatile (Obj_Id) then
!          SPARK_Msg_N
!            ("external property % must apply to a volatile object", N);
        end if;
  
        --  Ensure that the Boolean expression (if present) is static. A missing
--- 2116,2143 ----
        --    pragma Async_Readers (Obj);
        --    pragma Volatile (Obj);
  
!       if Prag_Id /= Pragma_No_Caching
!         and then not Is_Effectively_Volatile (Obj_Id)
!       then
!          if No_Caching_Enabled (Obj_Id) then
!             SPARK_Msg_N
!               ("illegal combination of external property % and property "
!                & """No_Caching"" (SPARK RM 7.1.2(6))", N);
!          else
!             SPARK_Msg_N
!               ("external property % must apply to a volatile object", N);
!          end if;
! 
!       --  Pragma No_Caching should only apply to volatile variables of
!       --  a non-effectively volatile type (SPARK RM 7.1.2).
! 
!       elsif Prag_Id = Pragma_No_Caching then
!          if Is_Effectively_Volatile (Etype (Obj_Id)) then
!             SPARK_Msg_N ("property % must not apply to an object of "
!                          & "an effectively volatile type", N);
!          elsif not Is_Volatile (Obj_Id) then
!             SPARK_Msg_N ("property % must apply to a volatile object", N);
!          end if;
        end if;
  
        --  Ensure that the Boolean expression (if present) is static. A missing
*************** package body Sem_Prag is
*** 2303,2309 ****
                    --  do not perform this check in the instance to circumvent
                    --  this oddity.
  
!                   if Is_Generic_Instance (Spec_Id) then
                       null;
  
                    --  An abstract state with visible refinement cannot appear
--- 2390,2396 ----
                    --  do not perform this check in the instance to circumvent
                    --  this oddity.
  
!                   if In_Instance then
                       null;
  
                    --  An abstract state with visible refinement cannot appear
*************** package body Sem_Prag is
*** 2341,2350 ****
  
                 --  Constant related checks
  
!                elsif Ekind (Item_Id) = E_Constant then
  
!                   --  A constant is a read-only item, therefore it cannot act
!                   --  as an output.
  
                    if Nam_In (Global_Mode, Name_In_Out, Name_Output) then
                       SPARK_Msg_NE
--- 2428,2439 ----
  
                 --  Constant related checks
  
!                elsif Ekind (Item_Id) = E_Constant
!                  and then not Is_Access_Type (Etype (Item_Id))
!                then
  
!                   --  Unless it is of an access type, a constant is a read-only
!                   --  item, therefore it cannot act as an output.
  
                    if Nam_In (Global_Mode, Name_In_Out, Name_Output) then
                       SPARK_Msg_NE
*************** package body Sem_Prag is
*** 3697,3708 ****
        function Acc_Next (N : Node_Id) return Node_Id;
        --  Helper function to iterate over arguments given to OpenAcc pragmas
  
-       procedure Acquire_Warning_Match_String (Arg : Node_Id);
-       --  Used by pragma Warnings (Off, string), and Warn_As_Error (string) to
-       --  get the given string argument, and place it in Name_Buffer, adding
-       --  leading and trailing asterisks if they are not already present. The
-       --  caller has already checked that Arg is a static string expression.
- 
        procedure Ada_2005_Pragma;
        --  Called for pragmas defined in Ada 2005, that are not in Ada 95. In
        --  Ada 95 mode, these are implementation defined pragmas, so should be
--- 3786,3791 ----
*************** package body Sem_Prag is
*** 3844,3849 ****
--- 3927,3936 ----
        procedure Check_At_Most_N_Arguments (N : Nat);
        --  Check there are no more than N arguments present
  
+       procedure Check_Atomic_VFA (E : Entity_Id; VFA : Boolean);
+       --  Apply legality checks to type or object E subject to an Atomic aspect
+       --  in Ada 2020 (RM C.6(13)) or to a Volatile_Full_Access aspect.
+ 
        procedure Check_Component
          (Comp            : Node_Id;
           UU_Typ          : Entity_Id;
*************** package body Sem_Prag is
*** 4329,4360 ****
           end if;
        end Acc_Next;
  
-       ----------------------------------
-       -- Acquire_Warning_Match_String --
-       ----------------------------------
- 
-       procedure Acquire_Warning_Match_String (Arg : Node_Id) is
-       begin
-          String_To_Name_Buffer
-            (Strval (Expr_Value_S (Get_Pragma_Arg (Arg))));
- 
-          --  Add asterisk at start if not already there
- 
-          if Name_Len > 0 and then Name_Buffer (1) /= '*' then
-             Name_Buffer (2 .. Name_Len + 1) :=
-               Name_Buffer (1 .. Name_Len);
-             Name_Buffer (1) := '*';
-             Name_Len := Name_Len + 1;
-          end if;
- 
-          --  Add asterisk at end if not already there
- 
-          if Name_Buffer (Name_Len) /= '*' then
-             Name_Len := Name_Len + 1;
-             Name_Buffer (Name_Len) := '*';
-          end if;
-       end Acquire_Warning_Match_String;
- 
        ---------------------
        -- Ada_2005_Pragma --
        ---------------------
--- 4416,4421 ----
*************** package body Sem_Prag is
*** 5623,5628 ****
--- 5684,5848 ----
           end if;
        end Check_At_Most_N_Arguments;
  
+       ------------------------
+       --  Check_Atomic_VFA  --
+       ------------------------
+ 
+       procedure Check_Atomic_VFA (E : Entity_Id; VFA : Boolean) is
+ 
+          Aliased_Subcomponent : exception;
+          --  Exception raised if an aliased subcomponent is found in E
+ 
+          Independent_Subcomponent : exception;
+          --  Exception raised if an independent subcomponent is found in E
+ 
+          procedure Check_Subcomponents (Typ : Entity_Id);
+          --  Apply checks to subcomponents for Atomic and Volatile_Full_Access
+ 
+          -------------------------
+          -- Check_Subcomponents --
+          -------------------------
+ 
+          procedure Check_Subcomponents (Typ : Entity_Id) is
+             Comp : Entity_Id;
+ 
+          begin
+             if Is_Array_Type (Typ) then
+                Comp := Component_Type (Typ);
+ 
+                --  For Atomic we accept any atomic subcomponents
+ 
+                if not VFA
+                  and then (Has_Atomic_Components (Typ)
+                             or else Is_Atomic (Comp))
+                then
+                   null;
+ 
+                --  Give an error if the components are aliased
+ 
+                elsif Has_Aliased_Components (Typ)
+                  or else Is_Aliased (Comp)
+                then
+                   raise Aliased_Subcomponent;
+ 
+                --  For VFA we accept non-aliased VFA subcomponents
+ 
+                elsif VFA
+                  and then Is_Volatile_Full_Access (Comp)
+                then
+                   null;
+ 
+                --  Give an error if the components are independent
+ 
+                elsif Has_Independent_Components (Typ)
+                   or else Is_Independent (Comp)
+                then
+                   raise Independent_Subcomponent;
+                end if;
+ 
+                --  Recurse on the component type
+ 
+                Check_Subcomponents (Comp);
+ 
+             --  Note: Has_Aliased_Components, like Has_Atomic_Components,
+             --  and Has_Independent_Components, applies only to arrays.
+             --  However, this flag does not have a corresponding pragma, so
+             --  perhaps it should be possible to apply it to record types as
+             --  well. Should this be done ???
+ 
+             elsif Is_Record_Type (Typ) then
+                --  It is possible to have an aliased discriminant, so they
+                --  must be checked along with normal components.
+ 
+                Comp := First_Component_Or_Discriminant (Typ);
+                while Present (Comp) loop
+ 
+                   --  For Atomic we accept any atomic subcomponents
+ 
+                   if not VFA
+                     and then (Is_Atomic (Comp)
+                                or else Is_Atomic (Etype (Comp)))
+                   then
+                      null;
+ 
+                   --  Give an error if the component is aliased
+ 
+                   elsif Is_Aliased (Comp)
+                     or else Is_Aliased (Etype (Comp))
+                   then
+                      raise Aliased_Subcomponent;
+ 
+                   --  For VFA we accept non-aliased VFA subcomponents
+ 
+                   elsif VFA
+                     and then (Is_Volatile_Full_Access (Comp)
+                                or else Is_Volatile_Full_Access (Etype (Comp)))
+                   then
+                      null;
+ 
+                   --  Give an error if the component is independent
+ 
+                   elsif Is_Independent (Comp)
+                      or else Is_Independent (Etype (Comp))
+                   then
+                      raise Independent_Subcomponent;
+                   end if;
+ 
+                   --  Recurse on the component type
+ 
+                   Check_Subcomponents (Etype (Comp));
+ 
+                   Next_Component_Or_Discriminant (Comp);
+                end loop;
+             end if;
+          end Check_Subcomponents;
+ 
+          Typ : Entity_Id;
+ 
+       begin
+          --  Fetch the type in case we are dealing with an object or component
+ 
+          if Is_Type (E) then
+             Typ := E;
+          else
+             pragma Assert (Is_Object (E)
+               or else
+                 Nkind (Declaration_Node (E)) = N_Component_Declaration);
+ 
+             Typ := Etype (E);
+          end if;
+ 
+          --  Check all the subcomponents of the type recursively, if any
+ 
+          Check_Subcomponents (Typ);
+ 
+       exception
+          when Aliased_Subcomponent =>
+             if VFA then
+                Error_Pragma
+                  ("cannot apply Volatile_Full_Access with aliased "
+                   & "subcomponent ");
+             else
+                Error_Pragma
+                  ("cannot apply Atomic with aliased subcomponent "
+                   & "(RM C.6(13))");
+             end if;
+ 
+          when Independent_Subcomponent =>
+             if VFA then
+                Error_Pragma
+                  ("cannot apply Volatile_Full_Access with independent "
+                   & "subcomponent ");
+             else
+                Error_Pragma
+                  ("cannot apply Atomic with independent subcomponent "
+                   & "(RM C.6(13))");
+             end if;
+ 
+          when others =>
+             raise Program_Error;
+       end Check_Atomic_VFA;
+ 
        ---------------------
        -- Check_Component --
        ---------------------
*************** package body Sem_Prag is
*** 7075,7084 ****
           Item : Node_Id := First (Decls);
  
        begin
!          --  Only other pragmas can come before this pragma
  
           loop
!             if No (Item) or else Nkind (Item) /= N_Pragma then
                 return False;
  
              elsif Item = Pragma_Node then
--- 7295,7305 ----
           Item : Node_Id := First (Decls);
  
        begin
!          --  Only other pragmas can come before this pragma, but they might
!          --  have been rewritten so check the original node.
  
           loop
!             if No (Item) or else Nkind (Original_Node (Item)) /= N_Pragma then
                 return False;
  
              elsif Item = Pragma_Node then
*************** package body Sem_Prag is
*** 7202,7214 ****
  
        procedure Process_Atomic_Independent_Shared_Volatile is
           procedure Check_VFA_Conflicts (Ent : Entity_Id);
!          --  Apply additional checks for the GNAT pragma Volatile_Full_Access
  
           procedure Mark_Component_Or_Object (Ent : Entity_Id);
!          --  Appropriately set flags on the given entity (either an array or
           --  record component, or an object declaration) according to the
           --  current pragma.
  
           procedure Set_Atomic_VFA (Ent : Entity_Id);
           --  Set given type as Is_Atomic or Is_Volatile_Full_Access. Also, if
           --  no explicit alignment was given, set alignment to unknown, since
--- 7423,7438 ----
  
        procedure Process_Atomic_Independent_Shared_Volatile is
           procedure Check_VFA_Conflicts (Ent : Entity_Id);
!          --  Check that Volatile_Full_Access and VFA do not conflict
  
           procedure Mark_Component_Or_Object (Ent : Entity_Id);
!          --  Appropriately set flags on the given entity, either an array or
           --  record component, or an object declaration) according to the
           --  current pragma.
  
+          procedure Mark_Type (Ent : Entity_Id);
+          --  Appropriately set flags on the given entity, a type
+ 
           procedure Set_Atomic_VFA (Ent : Entity_Id);
           --  Set given type as Is_Atomic or Is_Volatile_Full_Access. Also, if
           --  no explicit alignment was given, set alignment to unknown, since
*************** package body Sem_Prag is
*** 7224,7233 ****
              Typ  : Entity_Id;
  
              VFA_And_Atomic : Boolean := False;
!             --  Set True if atomic component present
! 
!             VFA_And_Aliased : Boolean := False;
!             --  Set True if aliased component present
  
           begin
              --  Fetch the type in case we are dealing with an object or
--- 7448,7454 ----
              Typ  : Entity_Id;
  
              VFA_And_Atomic : Boolean := False;
!             --  Set True if both VFA and Atomic present
  
           begin
              --  Fetch the type in case we are dealing with an object or
*************** package body Sem_Prag is
*** 7285,7332 ****
                       & "entity");
                 end if;
              end if;
- 
-             --  Check for the application of VFA to an entity that has aliased
-             --  components.
- 
-             if Prag_Id = Pragma_Volatile_Full_Access then
-                if Is_Array_Type (Typ)
-                  and then Has_Aliased_Components (Typ)
-                then
-                   VFA_And_Aliased := True;
- 
-                --  Note: Has_Aliased_Components, like Has_Atomic_Components,
-                --  and Has_Independent_Components, applies only to arrays.
-                --  However, this flag does not have a corresponding pragma, so
-                --  perhaps it should be possible to apply it to record types as
-                --  well. Should this be done ???
- 
-                elsif Is_Record_Type (Typ) then
-                   --  It is possible to have an aliased discriminant, so they
-                   --  must be checked along with normal components.
- 
-                   Comp := First_Component_Or_Discriminant (Typ);
-                   while Present (Comp) loop
-                      if Is_Aliased (Comp)
-                        or else Is_Aliased (Etype (Comp))
-                      then
-                         VFA_And_Aliased := True;
-                         Check_SPARK_05_Restriction
-                           ("aliased is not allowed", Comp);
- 
-                         exit;
-                      end if;
- 
-                      Next_Component_Or_Discriminant (Comp);
-                   end loop;
-                end if;
- 
-                if VFA_And_Aliased then
-                   Error_Pragma
-                     ("cannot apply Volatile_Full_Access (aliased component "
-                      & "present)");
-                end if;
-             end if;
           end Check_VFA_Conflicts;
  
           ------------------------------
--- 7506,7511 ----
*************** package body Sem_Prag is
*** 7374,7379 ****
--- 7553,7630 ----
              end if;
           end Mark_Component_Or_Object;
  
+          ---------------
+          -- Mark_Type --
+          ---------------
+ 
+          procedure Mark_Type (Ent : Entity_Id) is
+          begin
+             --  Attribute belongs on the base type. If the view of the type is
+             --  currently private, it also belongs on the underlying type.
+ 
+             --  In Ada_2020, the pragma can apply to a formal type, for which
+             --  there may be no underlying type.
+ 
+             if Prag_Id = Pragma_Atomic
+               or else Prag_Id = Pragma_Shared
+               or else Prag_Id = Pragma_Volatile_Full_Access
+             then
+                Set_Atomic_VFA (Ent);
+                Set_Atomic_VFA (Base_Type (Ent));
+ 
+                if not Is_Generic_Type (Ent) then
+                   Set_Atomic_VFA (Underlying_Type (Ent));
+                end if;
+             end if;
+ 
+             --  Atomic/Shared/Volatile_Full_Access imply Independent
+ 
+             if Prag_Id /= Pragma_Volatile then
+                Set_Is_Independent (Ent);
+                Set_Is_Independent (Base_Type (Ent));
+ 
+                if not Is_Generic_Type (Ent) then
+                   Set_Is_Independent (Underlying_Type (Ent));
+ 
+                   if Prag_Id = Pragma_Independent then
+                      Record_Independence_Check (N, Base_Type (Ent));
+                   end if;
+                end if;
+             end if;
+ 
+             --  Atomic/Shared/Volatile_Full_Access imply Volatile
+ 
+             if Prag_Id /= Pragma_Independent then
+                Set_Is_Volatile (Ent);
+                Set_Is_Volatile (Base_Type (Ent));
+ 
+                if not Is_Generic_Type (Ent) then
+                   Set_Is_Volatile (Underlying_Type (Ent));
+                   Set_Treat_As_Volatile (Underlying_Type (Ent));
+                end if;
+ 
+                Set_Treat_As_Volatile (Ent);
+             end if;
+ 
+             --  Apply Volatile to the composite type's individual components,
+             --  (RM C.6(8/3)).
+ 
+             if Prag_Id = Pragma_Volatile
+               and then Is_Record_Type (Etype (Ent))
+             then
+                declare
+                   Comp : Entity_Id;
+                begin
+                   Comp := First_Component (Ent);
+                   while Present (Comp) loop
+                      Mark_Component_Or_Object (Comp);
+ 
+                      Next_Component (Comp);
+                   end loop;
+                end;
+             end if;
+          end Mark_Type;
+ 
           --------------------
           -- Set_Atomic_VFA --
           --------------------
*************** package body Sem_Prag is
*** 7436,7493 ****
                 Check_First_Subtype (Arg1);
              end if;
  
!             --  Attribute belongs on the base type. If the view of the type is
!             --  currently private, it also belongs on the underlying type.
! 
!             if Prag_Id = Pragma_Atomic
!               or else Prag_Id = Pragma_Shared
!               or else Prag_Id = Pragma_Volatile_Full_Access
!             then
!                Set_Atomic_VFA (E);
!                Set_Atomic_VFA (Base_Type (E));
!                Set_Atomic_VFA (Underlying_Type (E));
!             end if;
! 
!             --  Atomic/Shared/Volatile_Full_Access imply Independent
! 
!             if Prag_Id /= Pragma_Volatile then
!                Set_Is_Independent (E);
!                Set_Is_Independent (Base_Type (E));
!                Set_Is_Independent (Underlying_Type (E));
! 
!                if Prag_Id = Pragma_Independent then
!                   Record_Independence_Check (N, Base_Type (E));
!                end if;
!             end if;
! 
!             --  Atomic/Shared/Volatile_Full_Access imply Volatile
! 
!             if Prag_Id /= Pragma_Independent then
!                Set_Is_Volatile (E);
!                Set_Is_Volatile (Base_Type (E));
!                Set_Is_Volatile (Underlying_Type (E));
! 
!                Set_Treat_As_Volatile (E);
!                Set_Treat_As_Volatile (Underlying_Type (E));
!             end if;
! 
!             --  Apply Volatile to the composite type's individual components,
!             --  (RM C.6(8/3)).
! 
!             if Prag_Id = Pragma_Volatile
!               and then Is_Record_Type (Etype (E))
!             then
!                declare
!                   Comp : Entity_Id;
!                begin
!                   Comp := First_Component (E);
!                   while Present (Comp) loop
!                      Mark_Component_Or_Object (Comp);
! 
!                      Next_Component (Comp);
!                   end loop;
!                end;
!             end if;
  
           --  Deal with the case where the pragma/attribute applies to a
           --  component or object declaration.
--- 7687,7693 ----
                 Check_First_Subtype (Arg1);
              end if;
  
!             Mark_Type (E);
  
           --  Deal with the case where the pragma/attribute applies to a
           --  component or object declaration.
*************** package body Sem_Prag is
*** 7501,7515 ****
              end if;
  
              Mark_Component_Or_Object (E);
           else
              Error_Pragma_Arg ("inappropriate entity for pragma%", Arg1);
           end if;
  
!          --  Perform the checks needed to assure the proper use of the GNAT
!          --  pragma Volatile_Full_Access.
  
           Check_VFA_Conflicts (E);
  
           --  The following check is only relevant when SPARK_Mode is on as
           --  this is not a standard Ada legality rule. Pragma Volatile can
           --  only apply to a full type declaration or an object declaration
--- 7701,7727 ----
              end if;
  
              Mark_Component_Or_Object (E);
+ 
+          --  In other cases give an error
+ 
           else
              Error_Pragma_Arg ("inappropriate entity for pragma%", Arg1);
           end if;
  
!          --  Check that Volatile_Full_Access and Atomic do not conflict
  
           Check_VFA_Conflicts (E);
  
+          --  Check for the application of Atomic or Volatile_Full_Access to
+          --  an entity that has [nonatomic] aliased, or else specified to be
+          --  independently addressable, subcomponents.
+ 
+          if (Prag_Id = Pragma_Atomic and then Ada_Version >= Ada_2020)
+            or else Prag_Id = Pragma_Volatile_Full_Access
+          then
+             Check_Atomic_VFA (E, VFA => Prag_Id = Pragma_Volatile_Full_Access);
+          end if;
+ 
           --  The following check is only relevant when SPARK_Mode is on as
           --  this is not a standard Ada legality rule. Pragma Volatile can
           --  only apply to a full type declaration or an object declaration
*************** package body Sem_Prag is
*** 7536,7581 ****
        -------------------------------------------
  
        procedure Process_Compile_Time_Warning_Or_Error is
!          Validation_Needed : Boolean := False;
! 
!          function Check_Node (N : Node_Id) return Traverse_Result;
!          --  Tree visitor that checks if N is an attribute reference that can
!          --  be statically computed by the back end. Validation_Needed is set
!          --  to True if found.
! 
!          ----------------
!          -- Check_Node --
!          ----------------
! 
!          function Check_Node (N : Node_Id) return Traverse_Result is
!          begin
!             if Nkind (N) = N_Attribute_Reference
!               and then Is_Entity_Name (Prefix (N))
!               and then not Is_Generic_Unit (Scope (Entity (Prefix (N))))
!             then
!                declare
!                   Attr_Id : constant Attribute_Id :=
!                               Get_Attribute_Id (Attribute_Name (N));
!                begin
!                   if Attr_Id = Attribute_Alignment
!                     or else Attr_Id = Attribute_Size
!                   then
!                      Validation_Needed := True;
!                   end if;
!                end;
!             end if;
! 
!             return OK;
!          end Check_Node;
! 
!          procedure Check_Expression is new Traverse_Proc (Check_Node);
! 
!          --  Local variables
! 
           Arg1x : constant Node_Id := Get_Pragma_Arg (Arg1);
- 
-       --  Start of processing for Process_Compile_Time_Warning_Or_Error
- 
        begin
           --  In GNATprove mode, pragmas Compile_Time_Error and
           --  Compile_Time_Warning are ignored, as the analyzer may not have the
--- 7748,7755 ----
        -------------------------------------------
  
        procedure Process_Compile_Time_Warning_Or_Error is
!          P : Node_Id := Parent (N);
           Arg1x : constant Node_Id := Get_Pragma_Arg (Arg1);
        begin
           --  In GNATprove mode, pragmas Compile_Time_Error and
           --  Compile_Time_Warning are ignored, as the analyzer may not have the
*************** package body Sem_Prag is
*** 7593,7611 ****
           Check_Arg_Is_OK_Static_Expression (Arg2, Standard_String);
           Analyze_And_Resolve (Arg1x, Standard_Boolean);
  
!          if Compile_Time_Known_Value (Arg1x) then
!             Process_Compile_Time_Warning_Or_Error (N, Sloc (Arg1));
! 
!          --  Register the expression for its validation after the back end has
!          --  been called if it has occurrences of attributes Size or Alignment
!          --  (because they may be statically computed by the back end and hence
!          --  the whole expression needs to be reevaluated).
  
           else
!             Check_Expression (Arg1x);
  
!             if Validation_Needed then
!                Sem_Ch13.Validate_Compile_Time_Warning_Error (N);
              end if;
           end if;
        end Process_Compile_Time_Warning_Or_Error;
--- 7767,7794 ----
           Check_Arg_Is_OK_Static_Expression (Arg2, Standard_String);
           Analyze_And_Resolve (Arg1x, Standard_Boolean);
  
!          --  If the condition is known at compile time (now), validate it now.
!          --  Otherwise, register the expression for validation after the back
!          --  end has been called, because it might be known at compile time
!          --  then. For example, if the expression is "Record_Type'Size /= 32"
!          --  it might be known after the back end has determined the size of
!          --  Record_Type. We do not defer validation if we're inside a generic
!          --  unit, because we will have more information in the instances.
  
+          if Compile_Time_Known_Value (Arg1x) then
+             Validate_Compile_Time_Warning_Or_Error (N, Sloc (Arg1));
           else
!             while Present (P) and then Nkind (P) not in N_Generic_Declaration
!             loop
!                if Nkind_In (P, N_Package_Body, N_Subprogram_Body) then
!                   P := Corresponding_Spec (P);
!                else
!                   P := Parent (P);
!                end if;
!             end loop;
  
!             if No (P) then
!                Defer_Compile_Time_Warning_Error_To_BE (N);
              end if;
           end if;
        end Process_Compile_Time_Warning_Or_Error;
*************** package body Sem_Prag is
*** 8165,8179 ****
              Set_Convention_From_Pragma (E);
  
              --  Treat a pragma Import as an implicit body, and pragma import
!             --  as implicit reference (for navigation in GPS).
  
              if Prag_Id = Pragma_Import then
                 Generate_Reference (E, Id, 'b');
  
              --  For exported entities we restrict the generation of references
              --  to entities exported to foreign languages since entities
!             --  exported to Ada do not provide further information to GPS and
!             --  add undesired references to the output of the gnatxref tool.
  
              elsif Prag_Id = Pragma_Export
                and then Convention (E) /= Convention_Ada
--- 8348,8363 ----
              Set_Convention_From_Pragma (E);
  
              --  Treat a pragma Import as an implicit body, and pragma import
!             --  as implicit reference (for navigation in GNAT Studio).
  
              if Prag_Id = Pragma_Import then
                 Generate_Reference (E, Id, 'b');
  
              --  For exported entities we restrict the generation of references
              --  to entities exported to foreign languages since entities
!             --  exported to Ada do not provide further information to
!             --  GNAT Studio and add undesired references to the output of the
!             --  gnatxref tool.
  
              elsif Prag_Id = Pragma_Export
                and then Convention (E) /= Convention_Ada
*************** package body Sem_Prag is
*** 8921,8928 ****
              Mark_Rewrite_Insertion (Decl);
  
           else
!             Error_Pragma_Arg ("no matching type found for pragma%",
!             Arg2);
           end if;
        end Process_Import_Predefined_Type;
  
--- 9105,9111 ----
              Mark_Rewrite_Insertion (Decl);
  
           else
!             Error_Pragma_Arg ("no matching type found for pragma%", Arg2);
           end if;
        end Process_Import_Predefined_Type;
  
*************** package body Sem_Prag is
*** 9861,9866 ****
--- 10044,10060 ----
        --  Start of processing for Process_Inline
  
        begin
+          --  An inlined subprogram may grant access to its private enclosing
+          --  context depending on the placement of its body. From elaboration
+          --  point of view, the flow of execution may enter this private
+          --  context, and then reach an external unit, thus producing a
+          --  dependency on that external unit. For such a path to be properly
+          --  discovered and encoded in the ALI file of the main unit, let the
+          --  ABE mechanism process the body of the main unit, and encode all
+          --  relevant invocation constructs and the relations between them.
+ 
+          Mark_Save_Invocation_Graph_Of_Body;
+ 
           Check_No_Identifiers;
           Check_At_Least_N_Arguments (1);
  
*************** package body Sem_Prag is
*** 12219,12225 ****
                             Check_Ghost_Synchronous;
  
                          --  Option Part_Of without an encapsulating state is
!                         --  illegal (SPARK RM 7.1.4(9)).
  
                          elsif Chars (Opt) = Name_Part_Of then
                             SPARK_Msg_N
--- 12413,12419 ----
                             Check_Ghost_Synchronous;
  
                          --  Option Part_Of without an encapsulating state is
!                         --  illegal (SPARK RM 7.1.4(8)).
  
                          elsif Chars (Opt) = Name_Part_Of then
                             SPARK_Msg_N
*************** package body Sem_Prag is
*** 12958,12963 ****
--- 13152,13169 ----
              Ada_Version_Explicit := Ada_2020;
              Ada_Version_Pragma   := N;
  
+          -------------------------------------
+          -- Aggregate_Individually_Assign --
+          -------------------------------------
+ 
+          --  pragma Aggregate_Individually_Assign;
+ 
+          when Pragma_Aggregate_Individually_Assign =>
+             GNAT_Pragma;
+             Check_Arg_Count (0);
+             Check_Valid_Configuration_Pragma;
+             Aggregate_Individually_Assign := True;
+ 
           ----------------------
           -- All_Calls_Remote --
           ----------------------
*************** package body Sem_Prag is
*** 13033,13038 ****
--- 13239,13294 ----
              Expr    : Node_Id;
              Nam_Arg : Node_Id;
  
+             --------------------------
+             -- Inferred_String_Type --
+             --------------------------
+ 
+             function Preferred_String_Type (Expr : Node_Id) return Entity_Id;
+             --  Infer the type to use for a string literal or a concatentation
+             --  of operands whose types can be inferred. For such expressions,
+             --  returns the "narrowest" of the three predefined string types
+             --  that can represent the characters occurring in the expression.
+             --  For other expressions, returns Empty.
+ 
+             function Preferred_String_Type (Expr : Node_Id) return Entity_Id is
+             begin
+                case Nkind (Expr) is
+                   when N_String_Literal =>
+                      if Has_Wide_Wide_Character (Expr) then
+                         return Standard_Wide_Wide_String;
+                      elsif Has_Wide_Character (Expr) then
+                         return Standard_Wide_String;
+                      else
+                         return Standard_String;
+                      end if;
+ 
+                   when N_Op_Concat =>
+                      declare
+                         L_Type : constant Entity_Id
+                           := Preferred_String_Type (Left_Opnd (Expr));
+                         R_Type : constant Entity_Id
+                           := Preferred_String_Type (Right_Opnd (Expr));
+ 
+                         Type_Table : constant array (1 .. 4) of Entity_Id
+                           := (Empty,
+                               Standard_Wide_Wide_String,
+                               Standard_Wide_String,
+                               Standard_String);
+                      begin
+                         for Idx in Type_Table'Range loop
+                            if (L_Type = Type_Table (Idx)) or
+                               (R_Type = Type_Table (Idx))
+                            then
+                               return Type_Table (Idx);
+                            end if;
+                         end loop;
+                         raise Program_Error;
+                      end;
+ 
+                   when others =>
+                      return Empty;
+                end case;
+             end Preferred_String_Type;
           begin
              GNAT_Pragma;
              Check_At_Least_N_Arguments (1);
*************** package body Sem_Prag is
*** 13092,13109 ****
                    if Is_Entity_Name (Expr) then
                       null;
  
!                   --  For string literals, we assume Standard_String as the
!                   --  type, unless the string contains wide or wide_wide
!                   --  characters.
  
!                   elsif Nkind (Expr) = N_String_Literal then
!                      if Has_Wide_Wide_Character (Expr) then
!                         Resolve (Expr, Standard_Wide_Wide_String);
!                      elsif Has_Wide_Character (Expr) then
!                         Resolve (Expr, Standard_Wide_String);
!                      else
!                         Resolve (Expr, Standard_String);
!                      end if;
  
                    elsif Is_Overloaded (Expr) then
                       Error_Pragma_Arg ("ambiguous argument for pragma%", Expr);
--- 13348,13359 ----
                    if Is_Entity_Name (Expr) then
                       null;
  
!                   --  For string literals and concatenations of string literals
!                   --  we assume Standard_String as the type, unless the string
!                   --  contains wide or wide_wide characters.
  
!                   elsif Present (Preferred_String_Type (Expr)) then
!                      Resolve (Expr, Preferred_String_Type (Expr));
  
                    elsif Is_Overloaded (Expr) then
                       Error_Pragma_Arg ("ambiguous argument for pragma%", Expr);
*************** package body Sem_Prag is
*** 13566,13582 ****
  
           ------------------------------------------------------------------
           -- Async_Readers/Async_Writers/Effective_Reads/Effective_Writes --
           ------------------------------------------------------------------
  
!          --  pragma Asynch_Readers   [ (boolean_EXPRESSION) ];
!          --  pragma Asynch_Writers   [ (boolean_EXPRESSION) ];
           --  pragma Effective_Reads  [ (boolean_EXPRESSION) ];
           --  pragma Effective_Writes [ (boolean_EXPRESSION) ];
  
           when Pragma_Async_Readers
              | Pragma_Async_Writers
              | Pragma_Effective_Reads
              | Pragma_Effective_Writes
           =>
           Async_Effective : declare
              Obj_Decl : Node_Id;
--- 13816,13835 ----
  
           ------------------------------------------------------------------
           -- Async_Readers/Async_Writers/Effective_Reads/Effective_Writes --
+          --                          No_Caching                          --
           ------------------------------------------------------------------
  
!          --  pragma Async_Readers    [ (boolean_EXPRESSION) ];
!          --  pragma Async_Writers    [ (boolean_EXPRESSION) ];
           --  pragma Effective_Reads  [ (boolean_EXPRESSION) ];
           --  pragma Effective_Writes [ (boolean_EXPRESSION) ];
+          --  pragma No_Caching       [ (boolean_EXPRESSION) ];
  
           when Pragma_Async_Readers
              | Pragma_Async_Writers
              | Pragma_Effective_Reads
              | Pragma_Effective_Writes
+             | Pragma_No_Caching
           =>
           Async_Effective : declare
              Obj_Decl : Node_Id;
*************** package body Sem_Prag is
*** 13798,13804 ****
              D    : Node_Id;
              E    : Entity_Id;
              E_Id : Node_Id;
-             K    : Node_Kind;
  
           begin
              Check_Ada_83_Warning;
--- 14051,14056 ----
*************** package body Sem_Prag is
*** 13827,13850 ****
              end if;
  
              D := Declaration_Node (E);
-             K := Nkind (D);
  
!             if (K = N_Full_Type_Declaration and then Is_Array_Type (E))
                or else
!                 ((Ekind (E) = E_Constant or else Ekind (E) = E_Variable)
!                    and then Nkind (D) = N_Object_Declaration
                     and then Nkind (Object_Definition (D)) =
                                         N_Constrained_Array_Definition)
              then
!                --  The flag is set on the object, or on the base type
  
!                if Nkind (D) /= N_Object_Declaration then
                    E := Base_Type (E);
                 end if;
  
                 --  Atomic implies both Independent and Volatile
  
                 if Prag_Id = Pragma_Atomic_Components then
                    Set_Has_Atomic_Components (E);
                    Set_Has_Independent_Components (E);
                 end if;
--- 14079,14111 ----
              end if;
  
              D := Declaration_Node (E);
  
!             if (Nkind (D) = N_Full_Type_Declaration and then Is_Array_Type (E))
                or else
!                 (Nkind (D) = N_Object_Declaration
!                    and then (Ekind (E) = E_Constant
!                               or else
!                              Ekind (E) = E_Variable)
                     and then Nkind (Object_Definition (D)) =
                                         N_Constrained_Array_Definition)
+               or else
+                  (Ada_Version >= Ada_2020
+                    and then Nkind (D) = N_Formal_Type_Declaration)
              then
!                --  The flag is set on the base type, or on the object
  
!                if Nkind (D) = N_Full_Type_Declaration then
                    E := Base_Type (E);
                 end if;
  
                 --  Atomic implies both Independent and Volatile
  
                 if Prag_Id = Pragma_Atomic_Components then
+                   if Ada_Version >= Ada_2020 then
+                      Check_Atomic_VFA
+                        (Component_Type (Etype (E)), VFA => False);
+                   end if;
+ 
                    Set_Has_Atomic_Components (E);
                    Set_Has_Independent_Components (E);
                 end if;
*************** package body Sem_Prag is
*** 14061,14069 ****
  
              Expr := Get_Pragma_Arg (Arg2);
  
!             --  Deal with SCO generation
  
!             if Is_Checked (N) and then not Split_PPC (N) then
                 Set_SCO_Pragma_Enabled (Loc);
              end if;
  
--- 14322,14335 ----
  
              Expr := Get_Pragma_Arg (Arg2);
  
!             --  Mark the pragma (or, if rewritten from an aspect, the original
!             --  aspect) as enabled. Nothing to do for an internally generated
!             --  check for a dynamic predicate.
  
!             if Is_Checked (N)
!               and then not Split_PPC (N)
!               and then Cname /= Name_Dynamic_Predicate
!             then
                 Set_SCO_Pragma_Enabled (Loc);
              end if;
  
*************** package body Sem_Prag is
*** 14369,14393 ****
  
           --  Processing for this pragma is shared with Psect_Object
  
!          ------------------------
!          -- Compile_Time_Error --
!          ------------------------
  
           --  pragma Compile_Time_Error
           --    (boolean_EXPRESSION, static_string_EXPRESSION);
  
-          when Pragma_Compile_Time_Error =>
-             GNAT_Pragma;
-             Process_Compile_Time_Warning_Or_Error;
- 
-          --------------------------
-          -- Compile_Time_Warning --
-          --------------------------
- 
           --  pragma Compile_Time_Warning
           --    (boolean_EXPRESSION, static_string_EXPRESSION);
  
!          when Pragma_Compile_Time_Warning =>
              GNAT_Pragma;
              Process_Compile_Time_Warning_Or_Error;
  
--- 14635,14651 ----
  
           --  Processing for this pragma is shared with Psect_Object
  
!          ----------------------------------------------
!          -- Compile_Time_Error, Compile_Time_Warning --
!          ----------------------------------------------
  
           --  pragma Compile_Time_Error
           --    (boolean_EXPRESSION, static_string_EXPRESSION);
  
           --  pragma Compile_Time_Warning
           --    (boolean_EXPRESSION, static_string_EXPRESSION);
  
!          when Pragma_Compile_Time_Error | Pragma_Compile_Time_Warning =>
              GNAT_Pragma;
              Process_Compile_Time_Warning_Or_Error;
  
*************** package body Sem_Prag is
*** 17722,17728 ****
              D    : Node_Id;
              E_Id : Node_Id;
              E    : Entity_Id;
-             K    : Node_Kind;
  
           begin
              Check_Ada_83_Warning;
--- 17980,17985 ----
*************** package body Sem_Prag is
*** 17789,17799 ****
              end if;
  
              D := Declaration_Node (E);
-             K := Nkind (D);
  
              --  The flag is set on the base type, or on the object
  
!             if K = N_Full_Type_Declaration
                and then (Is_Array_Type (E) or else Is_Record_Type (E))
              then
                 Set_Has_Independent_Components (Base_Type (E));
--- 18046,18055 ----
              end if;
  
              D := Declaration_Node (E);
  
              --  The flag is set on the base type, or on the object
  
!             if Nkind (D) = N_Full_Type_Declaration
                and then (Is_Array_Type (E) or else Is_Record_Type (E))
              then
                 Set_Has_Independent_Components (Base_Type (E));
*************** package body Sem_Prag is
*** 18720,18725 ****
--- 18976,18990 ----
  
              Set_Has_Own_Invariants (Typ);
  
+             --  Set the Invariants_Ignored flag if that policy is in effect
+ 
+             Set_Invariants_Ignored (Typ,
+               Present (Check_Policy_List)
+                 and then
+                   (Policy_In_Effect (Name_Invariant) = Name_Ignore
+                      and then
+                    Policy_In_Effect (Name_Type_Invariant) = Name_Ignore));
+ 
              --  If the invariant is class-wide, then it can be inherited by
              --  derived or interface implementing types. The type is said to
              --  have "inheritable" invariants.
*************** package body Sem_Prag is
*** 19083,19088 ****
--- 19348,19364 ----
                       Set_Linker_Section_Pragma
                         (Entity (Corresponding_Aspect (N)), N);
  
+                      --  Propagate it to its ultimate aliased entity to
+                      --  facilitate the backend processing this attribute
+                      --  in instantiations of generic subprograms.
+ 
+                      if Present (Alias (Entity (Corresponding_Aspect (N))))
+                      then
+                         Set_Linker_Section_Pragma
+                           (Ultimate_Alias
+                             (Entity (Corresponding_Aspect (N))), N);
+                      end if;
+ 
                    --  Pragma case, we must climb the homonym chain, but skip
                    --  any for which the linker section is already set.
  
*************** package body Sem_Prag is
*** 19091,19096 ****
--- 19367,19381 ----
                          if No (Linker_Section_Pragma (Ent)) then
                             Set_Linker_Section_Pragma (Ent, N);
  
+                            --  Propagate it to its ultimate aliased entity to
+                            --  facilitate the backend processing this attribute
+                            --  in instantiations of generic subprograms.
+ 
+                            if Present (Alias (Ent)) then
+                               Set_Linker_Section_Pragma
+                                 (Ultimate_Alias (Ent), N);
+                            end if;
+ 
                             --  A pragma that applies to a Ghost entity becomes
                             --  Ghost for the purposes of legality checks and
                             --  removal of ignored Ghost code.
*************** package body Sem_Prag is
*** 19349,19368 ****
           -----------------------
  
           --  pragma Machine_Attribute (
!          --       [Entity         =>] LOCAL_NAME,
!          --       [Attribute_Name =>] static_string_EXPRESSION
!          --    [, [Info           =>] static_EXPRESSION] );
  
           when Pragma_Machine_Attribute => Machine_Attribute : declare
              Def_Id : Entity_Id;
  
           begin
              GNAT_Pragma;
              Check_Arg_Order ((Name_Entity, Name_Attribute_Name, Name_Info));
  
!             if Arg_Count = 3 then
                 Check_Optional_Identifier (Arg3, Name_Info);
!                Check_Arg_Is_OK_Static_Expression (Arg3);
              else
                 Check_Arg_Count (2);
              end if;
--- 19634,19658 ----
           -----------------------
  
           --  pragma Machine_Attribute (
!          --     [Entity         =>] LOCAL_NAME,
!          --     [Attribute_Name =>] static_string_EXPRESSION
!          --  [, [Info           =>] static_EXPRESSION {, static_EXPRESSION}] );
  
           when Pragma_Machine_Attribute => Machine_Attribute : declare
+             Arg : Node_Id;
              Def_Id : Entity_Id;
  
           begin
              GNAT_Pragma;
              Check_Arg_Order ((Name_Entity, Name_Attribute_Name, Name_Info));
  
!             if Arg_Count >= 3 then
                 Check_Optional_Identifier (Arg3, Name_Info);
!                Arg := Arg3;
!                while Present (Arg) loop
!                   Check_Arg_Is_OK_Static_Expression (Arg);
!                   Arg := Next (Arg);
!                end loop;
              else
                 Check_Arg_Count (2);
              end if;
*************** package body Sem_Prag is
*** 19487,19511 ****
              end loop;
           end Main_Storage;
  
!          ----------------------
!          -- Max_Queue_Length --
!          ----------------------
  
!          --  pragma Max_Queue_Length (static_integer_EXPRESSION);
  
!          --  This processing is shared by Pragma_Max_Entry_Queue_Depth
  
!          when Pragma_Max_Queue_Length
              | Pragma_Max_Entry_Queue_Depth
           =>
!          Max_Queue_Length : declare
              Arg        : Node_Id;
              Entry_Decl : Node_Id;
              Entry_Id   : Entity_Id;
              Val        : Uint;
  
           begin
!             if Prag_Id = Pragma_Max_Queue_Length then
                 GNAT_Pragma;
              end if;
  
--- 19777,19805 ----
              end loop;
           end Main_Storage;
  
!          ----------------------------
!          -- Max_Entry_Queue_Length --
!          ----------------------------
  
!          --  pragma Max_Entry_Queue_Length (static_integer_EXPRESSION);
  
!          --  This processing is shared by Pragma_Max_Entry_Queue_Depth and
!          --  Pragma_Max_Queue_Length.
  
!          when Pragma_Max_Entry_Queue_Length
              | Pragma_Max_Entry_Queue_Depth
+             | Pragma_Max_Queue_Length
           =>
!          Max_Entry_Queue_Length : declare
              Arg        : Node_Id;
              Entry_Decl : Node_Id;
              Entry_Id   : Entity_Id;
              Val        : Uint;
  
           begin
!             if Prag_Id = Pragma_Max_Entry_Queue_Depth
!               or else Prag_Id = Pragma_Max_Queue_Length
!             then
                 GNAT_Pragma;
              end if;
  
*************** package body Sem_Prag is
*** 19547,19555 ****
  
              Val := Expr_Value (Arg);
  
!             if Val <= 0 then
                 Error_Pragma_Arg
!                  ("argument for pragma% must be positive", Arg1);
  
              elsif not UI_Is_In_Int_Range (Val) then
                 Error_Pragma_Arg
--- 19841,19849 ----
  
              Val := Expr_Value (Arg);
  
!             if Val < -1 then
                 Error_Pragma_Arg
!                  ("argument for pragma% cannot be less than -1", Arg1);
  
              elsif not UI_Is_In_Int_Range (Val) then
                 Error_Pragma_Arg
*************** package body Sem_Prag is
*** 19557,19573 ****
  
              end if;
  
-             --  Manually substitute the expression value of the pragma argument
-             --  if it's not an integer literal because this is not taken care
-             --  of automatically elsewhere.
- 
-             if Nkind (Arg) /= N_Integer_Literal then
-                Rewrite (Arg, Make_Integer_Literal (Sloc (Arg), Val));
-                Set_Etype (Arg, Etype (Original_Node (Arg)));
-             end if;
- 
              Record_Rep_Item (Entry_Id, N);
!          end Max_Queue_Length;
  
           -----------------
           -- Memory_Size --
--- 19851,19858 ----
  
              end if;
  
              Record_Rep_Item (Entry_Id, N);
!          end Max_Entry_Queue_Length;
  
           -----------------
           -- Memory_Size --
*************** package body Sem_Prag is
*** 21050,21057 ****
                 Decl := Parent (Ent);
  
                 if Present (Expression (Decl)) then
!                   Error_Pragma_Arg
!                     ("object for pragma% cannot have initialization", Arg1);
                 end if;
  
                 if not Is_Potentially_Persistent_Type (Etype (Ent)) then
--- 21335,21358 ----
                 Decl := Parent (Ent);
  
                 if Present (Expression (Decl)) then
!                   --  Variables in Persistent_BSS cannot be initialized, so
!                   --  turn off any initialization that might be caused by
!                   --  pragmas Initialize_Scalars or Normalize_Scalars.
! 
!                   if Kill_Range_Check (Expression (Decl)) then
!                      Prag :=
!                        Make_Pragma (Loc,
!                          Name_Suppress_Initialization,
!                          Pragma_Argument_Associations => New_List (
!                            Make_Pragma_Argument_Association (Loc,
!                              Expression => New_Occurrence_Of (Ent, Loc))));
!                      Insert_Before (N, Prag);
!                      Analyze (Prag);
! 
!                   else
!                      Error_Pragma_Arg
!                        ("object for pragma% cannot have initialization", Arg1);
!                   end if;
                 end if;
  
                 if not Is_Potentially_Persistent_Type (Etype (Ent)) then
*************** package body Sem_Prag is
*** 21062,21068 ****
  
                 Prag :=
                   Make_Linker_Section_Pragma
!                    (Ent, Sloc (N), ".persistent.bss");
                 Insert_After (N, Prag);
                 Analyze (Prag);
  
--- 21363,21369 ----
  
                 Prag :=
                   Make_Linker_Section_Pragma
!                    (Ent, Loc, ".persistent.bss");
                 Insert_After (N, Prag);
                 Analyze (Prag);
  
*************** package body Sem_Prag is
*** 23173,23179 ****
              --  Start of processing for Check_Library_Level_Entity
  
              begin
!                if not Is_Library_Level_Entity (E) then
                    Error_Msg_Name_1 := Pname;
                    Error_Msg_N (Fix_Error (Msg_1), N);
  
--- 23474,23489 ----
              --  Start of processing for Check_Library_Level_Entity
  
              begin
!                --  A SPARK_Mode of On shall only apply to library-level
!                --  entities, except for those in generic instances, which are
!                --  ignored (even if the entity gets SPARK_Mode pragma attached
!                --  in the AST, its effect is not taken into account unless the
!                --  context already provides SPARK_Mode of On in GNATprove).
! 
!                if Get_SPARK_Mode_From_Annotation (N) = On
!                  and then not Is_Library_Level_Entity (E)
!                  and then Instantiation_Location (Sloc (N)) = No_Location
!                then
                    Error_Msg_Name_1 := Pname;
                    Error_Msg_N (Fix_Error (Msg_1), N);
  
*************** package body Sem_Prag is
*** 24075,24081 ****
                    Error_Pragma_Arg
                      ("argument of pragma% cannot be an incomplete type", Arg1);
                 else
!                   Set_Suppress_Initialization (Full_View (Base_Type (E)));
                 end if;
  
              --  For first subtype, set flag on base type
--- 24385,24391 ----
                    Error_Pragma_Arg
                      ("argument of pragma% cannot be an incomplete type", Arg1);
                 else
!                   Set_Suppress_Initialization (Full_View (E));
                 end if;
  
              --  For first subtype, set flag on base type
*************** package body Sem_Prag is
*** 25230,25239 ****
              --  OK static string expression
  
              else
-                Acquire_Warning_Match_String (Arg1);
                 Warnings_As_Errors_Count := Warnings_As_Errors_Count + 1;
                 Warnings_As_Errors (Warnings_As_Errors_Count) :=
!                  new String'(Name_Buffer (1 .. Name_Len));
              end if;
  
           --------------
--- 25540,25549 ----
              --  OK static string expression
  
              else
                 Warnings_As_Errors_Count := Warnings_As_Errors_Count + 1;
                 Warnings_As_Errors (Warnings_As_Errors_Count) :=
!                  new String'(Acquire_Warning_Match_String
!                                (Expr_Value_S (Get_Pragma_Arg (Arg1))));
              end if;
  
           --------------
*************** package body Sem_Prag is
*** 25538,25545 ****
                       --  Static string expression case
  
                       else
-                         Acquire_Warning_Match_String (Arg2);
- 
                          --  Note on configuration pragma case: If this is a
                          --  configuration pragma, then for an OFF pragma, we
                          --  just set Config True in the call, which is all
--- 25848,25853 ----
*************** package body Sem_Prag is
*** 25559,25580 ****
                          --  generic unit we are inside is public, but for now
                          --  we don't bother with that refinement.
  
!                         if Chars (Argx) = Name_Off then
!                            Set_Specific_Warning_Off
!                              (Loc, Name_Buffer (1 .. Name_Len), Reason,
!                               Config => Is_Configuration_Pragma,
!                               Used   => Inside_A_Generic or else In_Instance);
  
!                         elsif Chars (Argx) = Name_On then
!                            Set_Specific_Warning_On
!                              (Loc, Name_Buffer (1 .. Name_Len), Err);
  
!                            if Err then
!                               Error_Msg
!                                 ("??pragma Warnings On with no matching "
!                                  & "Warnings Off", Loc);
                             end if;
!                         end if;
                       end if;
                    end;
                 end if;
--- 25867,25893 ----
                          --  generic unit we are inside is public, but for now
                          --  we don't bother with that refinement.
  
!                         declare
!                            Message : constant String :=
!                              Acquire_Warning_Match_String
!                                (Expr_Value_S (Get_Pragma_Arg (Arg2)));
!                         begin
!                            if Chars (Argx) = Name_Off then
!                               Set_Specific_Warning_Off
!                                 (Loc, Message, Reason,
!                                  Config => Is_Configuration_Pragma,
!                                  Used => Inside_A_Generic or else In_Instance);
  
!                            elsif Chars (Argx) = Name_On then
!                               Set_Specific_Warning_On (Loc, Message, Err);
  
!                               if Err then
!                                  Error_Msg
!                                    ("??pragma Warnings On with no matching "
!                                     & "Warnings Off", Loc);
!                               end if;
                             end if;
!                         end;
                       end if;
                    end;
                 end if;
*************** package body Sem_Prag is
*** 25603,25608 ****
--- 25916,25927 ----
                 Ent := Underlying_Type (Ent);
              end if;
  
+             --  The pragma applies to entities with addresses
+ 
+             if Is_Type (Ent) then
+                Error_Pragma ("pragma applies to objects and subprograms");
+             end if;
+ 
              --  The only processing required is to link this item on to the
              --  list of rep items for the given entity. This is accomplished
              --  by the call to Rep_Item_Too_Late (when no error is detected
*************** package body Sem_Prag is
*** 25715,25721 ****
  
                 --  Otherwise we have a call to an overridden primitive, and we
                 --  will create a common class-wide clone for the body of
!                --  original operation and its eventual inherited versions.  If
                 --  the original operation dispatches on result it is never
                 --  inherited and there is no need for a clone. There is not
                 --  need for a clone either in GNATprove mode, as cases that
--- 26034,26040 ----
  
                 --  Otherwise we have a call to an overridden primitive, and we
                 --  will create a common class-wide clone for the body of
!                --  original operation and its eventual inherited versions. If
                 --  the original operation dispatches on result it is never
                 --  inherited and there is no need for a clone. There is not
                 --  need for a clone either in GNATprove mode, as cases that
*************** package body Sem_Prag is
*** 25887,25904 ****
        --  matched items found in pragma Depends.
  
        procedure Check_Output_States
!         (Spec_Id      : Entity_Id;
!          Spec_Inputs  : Elist_Id;
           Spec_Outputs : Elist_Id;
           Body_Inputs  : Elist_Id;
           Body_Outputs : Elist_Id);
        --  Determine whether pragma Depends contains an output state with a
        --  visible refinement and if so, ensure that pragma Refined_Depends
!       --  mentions all its constituents as outputs. Spec_Id is the entity of
!       --  the related subprograms. Spec_Inputs and Spec_Outputs denote the
!       --  inputs and outputs of the subprogram spec synthesized from pragma
!       --  Depends. Body_Inputs and Body_Outputs denote the inputs and outputs
!       --  of the subprogram body synthesized from pragma Refined_Depends.
  
        function Collect_States (Clauses : List_Id) return Elist_Id;
        --  Given a normalized list of dependencies obtained from calling
--- 26206,26222 ----
        --  matched items found in pragma Depends.
  
        procedure Check_Output_States
!         (Spec_Inputs  : Elist_Id;
           Spec_Outputs : Elist_Id;
           Body_Inputs  : Elist_Id;
           Body_Outputs : Elist_Id);
        --  Determine whether pragma Depends contains an output state with a
        --  visible refinement and if so, ensure that pragma Refined_Depends
!       --  mentions all its constituents as outputs. Spec_Inputs and
!       --  Spec_Outputs denote the inputs and outputs of the subprogram spec
!       --  synthesized from pragma Depends. Body_Inputs and Body_Outputs denote
!       --  the inputs and outputs of the subprogram body synthesized from pragma
!       --  Refined_Depends.
  
        function Collect_States (Clauses : List_Id) return Elist_Id;
        --  Given a normalized list of dependencies obtained from calling
*************** package body Sem_Prag is
*** 25920,25930 ****
        --  all special cases. Matched_Items contains the entities of all matched
        --  items found in pragma Depends.
  
!       procedure Report_Extra_Clauses
!         (Spec_Id : Entity_Id;
!          Clauses : List_Id);
!       --  Emit an error for each extra clause found in list Clauses. Spec_Id
!       --  denotes the entity of the related subprogram.
  
        -----------------------------
        -- Check_Dependency_Clause --
--- 26238,26245 ----
        --  all special cases. Matched_Items contains the entities of all matched
        --  items found in pragma Depends.
  
!       procedure Report_Extra_Clauses (Clauses : List_Id);
!       --  Emit an error for each extra clause found in list Clauses
  
        -----------------------------
        -- Check_Dependency_Clause --
*************** package body Sem_Prag is
*** 26188,26194 ****
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if Is_Generic_Instance (Spec_Id) then
              return;
           end if;
  
--- 26503,26509 ----
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if In_Instance then
              return;
           end if;
  
*************** package body Sem_Prag is
*** 26355,26362 ****
        -------------------------
  
        procedure Check_Output_States
!         (Spec_Id      : Entity_Id;
!          Spec_Inputs  : Elist_Id;
           Spec_Outputs : Elist_Id;
           Body_Inputs  : Elist_Id;
           Body_Outputs : Elist_Id)
--- 26670,26676 ----
        -------------------------
  
        procedure Check_Output_States
!         (Spec_Inputs  : Elist_Id;
           Spec_Outputs : Elist_Id;
           Body_Inputs  : Elist_Id;
           Body_Outputs : Elist_Id)
*************** package body Sem_Prag is
*** 26449,26455 ****
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if Is_Generic_Instance (Spec_Id) then
              null;
  
           --  Inspect the outputs of pragma Depends looking for a state with a
--- 26763,26769 ----
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if In_Instance then
              null;
  
           --  Inspect the outputs of pragma Depends looking for a state with a
*************** package body Sem_Prag is
*** 26794,26810 ****
        -- Report_Extra_Clauses --
        --------------------------
  
!       procedure Report_Extra_Clauses
!         (Spec_Id : Entity_Id;
!          Clauses : List_Id)
!       is
           Clause : Node_Id;
  
        begin
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if Is_Generic_Instance (Spec_Id) then
              null;
  
           elsif Present (Clauses) then
--- 27108,27121 ----
        -- Report_Extra_Clauses --
        --------------------------
  
!       procedure Report_Extra_Clauses (Clauses : List_Id) is
           Clause : Node_Id;
  
        begin
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if In_Instance then
              null;
  
           elsif Present (Clauses) then
*************** package body Sem_Prag is
*** 26939,26946 ****
              --  constituents appear as outputs in the dependency refinement.
  
              Check_Output_States
!               (Spec_Id      => Spec_Id,
!                Spec_Inputs  => Spec_Inputs,
                 Spec_Outputs => Spec_Outputs,
                 Body_Inputs  => Body_Inputs,
                 Body_Outputs => Body_Outputs);
--- 27250,27256 ----
              --  constituents appear as outputs in the dependency refinement.
  
              Check_Output_States
!               (Spec_Inputs  => Spec_Inputs,
                 Spec_Outputs => Spec_Outputs,
                 Body_Inputs  => Body_Inputs,
                 Body_Outputs => Body_Outputs);
*************** package body Sem_Prag is
*** 27010,27016 ****
           Remove_Extra_Clauses (Refinements, Matched_Items);
  
           if Serious_Errors_Detected = Errors then
!             Report_Extra_Clauses (Spec_Id, Refinements);
           end if;
        end if;
  
--- 27320,27326 ----
           Remove_Extra_Clauses (Refinements, Matched_Items);
  
           if Serious_Errors_Detected = Errors then
!             Report_Extra_Clauses (Refinements);
           end if;
        end if;
  
*************** package body Sem_Prag is
*** 27263,27269 ****
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if Is_Generic_Instance (Spec_Id) then
              null;
  
           --  Inspect the In_Out items of the corresponding Global pragma
--- 27573,27579 ----
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if In_Instance then
              null;
  
           --  Inspect the In_Out items of the corresponding Global pragma
*************** package body Sem_Prag is
*** 27372,27378 ****
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if Is_Generic_Instance (Spec_Id) then
              null;
  
           --  Inspect the Input items of the corresponding Global pragma looking
--- 27682,27688 ----
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if In_Instance then
              null;
  
           --  Inspect the Input items of the corresponding Global pragma looking
*************** package body Sem_Prag is
*** 27495,27501 ****
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if Is_Generic_Instance (Spec_Id) then
              null;
  
           --  Inspect the Output items of the corresponding Global pragma
--- 27805,27811 ----
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if In_Instance then
              null;
  
           --  Inspect the Output items of the corresponding Global pragma
*************** package body Sem_Prag is
*** 27601,27607 ****
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if Is_Generic_Instance (Spec_Id) then
              null;
  
           --  Inspect the Proof_In items of the corresponding Global pragma
--- 27911,27917 ----
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if In_Instance then
              null;
  
           --  Inspect the Proof_In items of the corresponding Global pragma
*************** package body Sem_Prag is
*** 27767,27773 ****
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if Is_Generic_Instance (Spec_Id) then
              null;
  
           elsif Nkind (List) = N_Null then
--- 28077,28083 ----
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if In_Instance then
              null;
  
           elsif Nkind (List) = N_Null then
*************** package body Sem_Prag is
*** 28018,28024 ****
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if Is_Generic_Instance (Spec_Id) then
              null;
  
           else
--- 28328,28334 ----
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if In_Instance then
              null;
  
           else
*************** package body Sem_Prag is
*** 28041,28047 ****
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if Is_Generic_Instance (Spec_Id) then
              null;
  
           else
--- 28351,28357 ----
           --  Do not perform this check in an instance because it was already
           --  performed successfully in the generic template.
  
!          if In_Instance then
              null;
  
           else
*************** package body Sem_Prag is
*** 28105,28111 ****
        --  body contract is instantiated. Since the generic template is legal,
        --  do not perform this check in the instance to circumvent this oddity.
  
!       if Is_Generic_Instance (Spec_Id) then
           null;
  
        --  Non-instance case
--- 28415,28421 ----
        --  body contract is instantiated. Since the generic template is legal,
        --  do not perform this check in the instance to circumvent this oddity.
  
!       if In_Instance then
           null;
  
        --  Non-instance case
*************** package body Sem_Prag is
*** 28221,28227 ****
        --  in the generic template.
  
        if Serious_Errors_Detected = Errors
!         and then not Is_Generic_Instance (Spec_Id)
          and then not Has_Null_State
          and then No_Constit
        then
--- 28531,28537 ----
        --  in the generic template.
  
        if Serious_Errors_Detected = Errors
!         and then not In_Instance
          and then not Has_Null_State
          and then No_Constit
        then
*************** package body Sem_Prag is
*** 30693,30698 ****
--- 31003,31009 ----
     procedure Initialize is
     begin
        Externals.Init;
+       Compile_Time_Warnings_Errors.Init;
     end Initialize;
  
     --------
*************** package body Sem_Prag is
*** 30841,30846 ****
--- 31152,31158 ----
        Pragma_Ada_12                         => -1,
        Pragma_Ada_2012                       => -1,
        Pragma_Ada_2020                       => -1,
+       Pragma_Aggregate_Individually_Assign  => 0,
        Pragma_All_Calls_Remote               => -1,
        Pragma_Allow_Integer_Address          => -1,
        Pragma_Annotate                       => 93,
*************** package body Sem_Prag is
*** 30958,30971 ****
        Pragma_Main                           => -1,
        Pragma_Main_Storage                   => -1,
        Pragma_Max_Entry_Queue_Depth          =>  0,
        Pragma_Max_Queue_Length               =>  0,
        Pragma_Memory_Size                    =>  0,
-       Pragma_No_Return                      =>  0,
        Pragma_No_Body                        =>  0,
        Pragma_No_Component_Reordering        => -1,
        Pragma_No_Elaboration_Code_All        =>  0,
        Pragma_No_Heap_Finalization           =>  0,
        Pragma_No_Inline                      =>  0,
        Pragma_No_Run_Time                    => -1,
        Pragma_No_Strict_Aliasing             => -1,
        Pragma_No_Tagged_Streams              =>  0,
--- 31270,31285 ----
        Pragma_Main                           => -1,
        Pragma_Main_Storage                   => -1,
        Pragma_Max_Entry_Queue_Depth          =>  0,
+       Pragma_Max_Entry_Queue_Length         =>  0,
        Pragma_Max_Queue_Length               =>  0,
        Pragma_Memory_Size                    =>  0,
        Pragma_No_Body                        =>  0,
+       Pragma_No_Caching                     =>  0,
        Pragma_No_Component_Reordering        => -1,
        Pragma_No_Elaboration_Code_All        =>  0,
        Pragma_No_Heap_Finalization           =>  0,
        Pragma_No_Inline                      =>  0,
+       Pragma_No_Return                      =>  0,
        Pragma_No_Run_Time                    => -1,
        Pragma_No_Strict_Aliasing             => -1,
        Pragma_No_Tagged_Streams              =>  0,
*************** package body Sem_Prag is
*** 31361,31371 ****
  
     end Process_Compilation_Unit_Pragmas;
  
!    -------------------------------------------
!    -- Process_Compile_Time_Warning_Or_Error --
!    -------------------------------------------
  
!    procedure Process_Compile_Time_Warning_Or_Error
       (N     : Node_Id;
        Eloc  : Source_Ptr)
     is
--- 31675,31685 ----
  
     end Process_Compilation_Unit_Pragmas;
  
!    --------------------------------------------
!    -- Validate_Compile_Time_Warning_Or_Error --
!    --------------------------------------------
  
!    procedure Validate_Compile_Time_Warning_Or_Error
       (N     : Node_Id;
        Eloc  : Source_Ptr)
     is
*************** package body Sem_Prag is
*** 31472,31479 ****
                 end loop;
              end;
           end if;
        end if;
!    end Process_Compile_Time_Warning_Or_Error;
  
     ------------------------------------
     -- Record_Possible_Body_Reference --
--- 31786,31801 ----
                 end loop;
              end;
           end if;
+ 
+       --  Arg1x is not known at compile time, so issue a warning. This can
+       --  happen only if the pragma's processing was deferred until after the
+       --  back end is run (see Process_Compile_Time_Warning_Or_Error).
+       --  Note that the warning control switch applies to both pragmas.
+ 
+       elsif Warn_On_Unknown_Compile_Time_Warning then
+          Error_Msg_N ("?condition is not known at compile time", Arg1x);
        end if;
!    end Validate_Compile_Time_Warning_Or_Error;
  
     ------------------------------------
     -- Record_Possible_Body_Reference --
*************** package body Sem_Prag is
*** 32035,32038 ****
--- 32357,32443 ----
        return Empty;
     end Test_Case_Arg;
  
+    -----------------------------------------
+    -- Defer_Compile_Time_Warning_Error_To_BE --
+    -----------------------------------------
+ 
+    procedure Defer_Compile_Time_Warning_Error_To_BE (N : Node_Id) is
+       Arg1  : constant Node_Id := First (Pragma_Argument_Associations (N));
+    begin
+       Compile_Time_Warnings_Errors.Append
+         (New_Val => CTWE_Entry'(Eloc  => Sloc (Arg1),
+                                 Scope => Current_Scope,
+                                 Prag  => N));
+ 
+       --  If the Boolean expression contains T'Size, and we're not in the main
+       --  unit being compiled, then we need to copy the pragma into the main
+       --  unit, because otherwise T'Size might never be computed, leaving it
+       --  as 0.
+ 
+       if not In_Extended_Main_Code_Unit (N) then
+          Insert_Library_Level_Action (New_Copy_Tree (N));
+       end if;
+    end Defer_Compile_Time_Warning_Error_To_BE;
+ 
+    ------------------------------------------
+    -- Validate_Compile_Time_Warning_Errors --
+    ------------------------------------------
+ 
+    procedure Validate_Compile_Time_Warning_Errors is
+       procedure Set_Scope (S : Entity_Id);
+       --  Install all enclosing scopes of S along with S itself
+ 
+       procedure Unset_Scope (S : Entity_Id);
+       --  Uninstall all enclosing scopes of S along with S itself
+ 
+       ---------------
+       -- Set_Scope --
+       ---------------
+ 
+       procedure Set_Scope (S : Entity_Id) is
+       begin
+          if S /= Standard_Standard then
+             Set_Scope (Scope (S));
+          end if;
+ 
+          Push_Scope (S);
+       end Set_Scope;
+ 
+       -----------------
+       -- Unset_Scope --
+       -----------------
+ 
+       procedure Unset_Scope (S : Entity_Id) is
+       begin
+          if S /= Standard_Standard then
+             Unset_Scope (Scope (S));
+          end if;
+ 
+          Pop_Scope;
+       end Unset_Scope;
+ 
+    --  Start of processing for Validate_Compile_Time_Warning_Errors
+ 
+    begin
+       Expander_Mode_Save_And_Set (False);
+       In_Compile_Time_Warning_Or_Error := True;
+ 
+       for N in Compile_Time_Warnings_Errors.First ..
+                Compile_Time_Warnings_Errors.Last
+       loop
+          declare
+             T : CTWE_Entry renames Compile_Time_Warnings_Errors.Table (N);
+ 
+          begin
+             Set_Scope (T.Scope);
+             Reset_Analyzed_Flags (T.Prag);
+             Validate_Compile_Time_Warning_Or_Error (T.Prag, T.Eloc);
+             Unset_Scope (T.Scope);
+          end;
+       end loop;
+ 
+       In_Compile_Time_Warning_Or_Error := False;
+       Expander_Mode_Restore;
+    end Validate_Compile_Time_Warning_Errors;
+ 
  end Sem_Prag;
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_prag.ads gcc-10.1.0/gcc/ada/sem_prag.ads
*** gcc-9.3.0/gcc/ada/sem_prag.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_prag.ads	Thu May  7 10:49:59 2020
*************** package Sem_Prag is
*** 218,225 ****
       (N        : Node_Id;
        Expr_Val : out Boolean);
     --  Perform full analysis of delayed pragmas Async_Readers, Async_Writers,
!    --  Effective_Reads and Effective_Writes. Flag Expr_Val contains the Boolean
!    --  argument of the pragma or a default True if no argument is present.
  
     procedure Analyze_Global_In_Decl_Part (N : Node_Id);
     --  Perform full analysis of delayed pragma Global. This routine is also
--- 218,226 ----
       (N        : Node_Id;
        Expr_Val : out Boolean);
     --  Perform full analysis of delayed pragmas Async_Readers, Async_Writers,
!    --  Effective_Reads, Effective_Writes and No_Caching. Flag Expr_Val contains
!    --  the Boolean argument of the pragma or a default True if no argument
!    --  is present.
  
     procedure Analyze_Global_In_Decl_Part (N : Node_Id);
     --  Perform full analysis of delayed pragma Global. This routine is also
*************** package Sem_Prag is
*** 398,403 ****
--- 399,405 ----
     --    Global
     --    Initializes
     --    Max_Entry_Queue_Depth
+    --    Max_Entry_Queue_Length
     --    Max_Queue_Length
     --    Post
     --    Post_Class
*************** package Sem_Prag is
*** 497,510 ****
     --  Name_uInvariant, and Name_uType_Invariant (_Pre, _Post, _Invariant,
     --  and _Type_Invariant).
  
-    procedure Process_Compile_Time_Warning_Or_Error
-      (N    : Node_Id;
-       Eloc : Source_Ptr);
-    --  Common processing for Compile_Time_Error and Compile_Time_Warning of
-    --  pragma N. Called when the pragma is processed as part of its regular
-    --  analysis but also called after calling the back end to validate these
-    --  pragmas for size and alignment appropriateness.
- 
     procedure Process_Compilation_Unit_Pragmas (N : Node_Id);
     --  Called at the start of processing compilation unit N to deal with any
     --  special issues regarding pragmas. In particular, we have to deal with
--- 499,504 ----
*************** package Sem_Prag is
*** 555,558 ****
--- 549,558 ----
     --
     --    Empty if there is no such argument
  
+    procedure Validate_Compile_Time_Warning_Errors;
+    --  This routine is called after calling the back end to validate pragmas
+    --  Compile_Time_Error and Compile_Time_Warning for size and alignment
+    --  appropriateness. The reason it is called that late is to take advantage
+    --  of any back-annotation of size and alignment performed by the back end.
+ 
  end Sem_Prag;
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_res.adb gcc-10.1.0/gcc/ada/sem_res.adb
*** gcc-9.3.0/gcc/ada/sem_res.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_res.adb	Thu May  7 10:49:59 2020
*************** with Debug_A;  use Debug_A;
*** 30,38 ****
  with Einfo;    use Einfo;
  with Errout;   use Errout;
  with Expander; use Expander;
- with Exp_Disp; use Exp_Disp;
  with Exp_Ch6;  use Exp_Ch6;
  with Exp_Ch7;  use Exp_Ch7;
  with Exp_Tss;  use Exp_Tss;
  with Exp_Util; use Exp_Util;
  with Freeze;   use Freeze;
--- 30,38 ----
  with Einfo;    use Einfo;
  with Errout;   use Errout;
  with Expander; use Expander;
  with Exp_Ch6;  use Exp_Ch6;
  with Exp_Ch7;  use Exp_Ch7;
+ with Exp_Disp; use Exp_Disp;
  with Exp_Tss;  use Exp_Tss;
  with Exp_Util; use Exp_Util;
  with Freeze;   use Freeze;
*************** with Restrict; use Restrict;
*** 51,62 ****
  with Rident;   use Rident;
  with Rtsfind;  use Rtsfind;
  with Sem;      use Sem;
- with Sem_Aux;  use Sem_Aux;
  with Sem_Aggr; use Sem_Aggr;
  with Sem_Attr; use Sem_Attr;
  with Sem_Cat;  use Sem_Cat;
- with Sem_Ch4;  use Sem_Ch4;
  with Sem_Ch3;  use Sem_Ch3;
  with Sem_Ch6;  use Sem_Ch6;
  with Sem_Ch8;  use Sem_Ch8;
  with Sem_Ch13; use Sem_Ch13;
--- 51,62 ----
  with Rident;   use Rident;
  with Rtsfind;  use Rtsfind;
  with Sem;      use Sem;
  with Sem_Aggr; use Sem_Aggr;
  with Sem_Attr; use Sem_Attr;
+ with Sem_Aux;  use Sem_Aux;
  with Sem_Cat;  use Sem_Cat;
  with Sem_Ch3;  use Sem_Ch3;
+ with Sem_Ch4;  use Sem_Ch4;
  with Sem_Ch6;  use Sem_Ch6;
  with Sem_Ch8;  use Sem_Ch8;
  with Sem_Ch13; use Sem_Ch13;
*************** with Sem_Elab; use Sem_Elab;
*** 67,75 ****
  with Sem_Elim; use Sem_Elim;
  with Sem_Eval; use Sem_Eval;
  with Sem_Intr; use Sem_Intr;
! with Sem_Util; use Sem_Util;
! with Targparm; use Targparm;
  with Sem_Type; use Sem_Type;
  with Sem_Warn; use Sem_Warn;
  with Sinfo;    use Sinfo;
  with Sinfo.CN; use Sinfo.CN;
--- 67,75 ----
  with Sem_Elim; use Sem_Elim;
  with Sem_Eval; use Sem_Eval;
  with Sem_Intr; use Sem_Intr;
! with Sem_Mech; use Sem_Mech;
  with Sem_Type; use Sem_Type;
+ with Sem_Util; use Sem_Util;
  with Sem_Warn; use Sem_Warn;
  with Sinfo;    use Sinfo;
  with Sinfo.CN; use Sinfo.CN;
*************** with Snames;   use Snames;
*** 77,82 ****
--- 77,83 ----
  with Stand;    use Stand;
  with Stringt;  use Stringt;
  with Style;    use Style;
+ with Targparm; use Targparm;
  with Tbuild;   use Tbuild;
  with Uintp;    use Uintp;
  with Urealp;   use Urealp;
*************** package body Sem_Res is
*** 111,118 ****
        Pref : Node_Id);
     --  Check that the type of the prefix of a dereference is not incomplete
  
!    function Check_Infinite_Recursion (N : Node_Id) return Boolean;
!    --  Given a call node, N, which is known to occur immediately within the
     --  subprogram being called, determines whether it is a detectable case of
     --  an infinite recursion, and if so, outputs appropriate messages. Returns
     --  True if an infinite recursion is detected, and False otherwise.
--- 112,119 ----
        Pref : Node_Id);
     --  Check that the type of the prefix of a dereference is not incomplete
  
!    function Check_Infinite_Recursion (Call : Node_Id) return Boolean;
!    --  Given a call node, Call, which is known to occur immediately within the
     --  subprogram being called, determines whether it is a detectable case of
     --  an infinite recursion, and if so, outputs appropriate messages. Returns
     --  True if an infinite recursion is detected, and False otherwise.
*************** package body Sem_Res is
*** 159,165 ****
        Typ     : Entity_Id;
        Is_Comp : Boolean);
     --  Internal procedure for Resolve_Op_Concat to resolve one operand of
!    --  concatenation operator.  The operand is either of the array type or of
     --  the component type. If the operand is an aggregate, and the component
     --  type is composite, this is ambiguous if component type has aggregates.
  
--- 160,166 ----
        Typ     : Entity_Id;
        Is_Comp : Boolean);
     --  Internal procedure for Resolve_Op_Concat to resolve one operand of
!    --  concatenation operator. The operand is either of the array type or of
     --  the component type. If the operand is an aggregate, and the component
     --  type is composite, this is ambiguous if component type has aggregates.
  
*************** package body Sem_Res is
*** 695,858 ****
     -- Check_Infinite_Recursion --
     ------------------------------
  
!    function Check_Infinite_Recursion (N : Node_Id) return Boolean is
!       P : Node_Id;
!       C : Node_Id;
  
!       function Same_Argument_List return Boolean;
!       --  Check whether list of actuals is identical to list of formals of
!       --  called function (which is also the enclosing scope).
  
!       ------------------------
!       -- Same_Argument_List --
!       ------------------------
  
!       function Same_Argument_List return Boolean is
!          A    : Node_Id;
!          F    : Entity_Id;
!          Subp : Entity_Id;
  
        begin
!          if not Is_Entity_Name (Name (N)) then
!             return False;
!          else
!             Subp := Entity (Name (N));
!          end if;
  
!          F := First_Formal (Subp);
!          A := First_Actual (N);
!          while Present (F) and then Present (A) loop
!             if not Is_Entity_Name (A) or else Entity (A) /= F then
!                return False;
              end if;
  
!             Next_Actual (A);
!             Next_Formal (F);
           end loop;
  
!          return True;
!       end Same_Argument_List;
  
!    --  Start of processing for Check_Infinite_Recursion
  
!    begin
!       --  Special case, if this is a procedure call and is a call to the
!       --  current procedure with the same argument list, then this is for
!       --  sure an infinite recursion and we insert a call to raise SE.
  
!       if Is_List_Member (N)
!         and then List_Length (List_Containing (N)) = 1
!         and then Same_Argument_List
!       then
!          declare
!             P : constant Node_Id := Parent (N);
!          begin
!             if Nkind (P) = N_Handled_Sequence_Of_Statements
!               and then Nkind (Parent (P)) = N_Subprogram_Body
!               and then Is_Empty_List (Declarations (Parent (P)))
              then
-                Error_Msg_Warn := SPARK_Mode /= On;
-                Error_Msg_N ("!infinite recursion<<", N);
-                Error_Msg_N ("\!Storage_Error [<<", N);
-                Insert_Action (N,
-                  Make_Raise_Storage_Error (Sloc (N),
-                    Reason => SE_Infinite_Recursion));
                 return True;
              end if;
-          end;
-       end if;
  
!       --  If not that special case, search up tree, quitting if we reach a
!       --  construct (e.g. a conditional) that tells us that this is not a
!       --  case for an infinite recursion warning.
  
!       C := N;
!       loop
!          P := Parent (C);
  
!          --  If no parent, then we were not inside a subprogram, this can for
!          --  example happen when processing certain pragmas in a spec. Just
!          --  return False in this case.
  
!          if No (P) then
!             return False;
           end if;
  
!          --  Done if we get to subprogram body, this is definitely an infinite
!          --  recursion case if we did not find anything to stop us.
  
!          exit when Nkind (P) = N_Subprogram_Body;
  
!          --  If appearing in conditional, result is false
  
!          if Nkind_In (P, N_Or_Else,
!                          N_And_Then,
!                          N_Case_Expression,
!                          N_Case_Statement,
!                          N_If_Expression,
!                          N_If_Statement)
!          then
!             return False;
  
!          elsif Nkind (P) = N_Handled_Sequence_Of_Statements
!            and then C /= First (Statements (P))
!          then
!             --  If the call is the expression of a return statement and the
!             --  actuals are identical to the formals, it's worth a warning.
!             --  However, we skip this if there is an immediately preceding
!             --  raise statement, since the call is never executed.
  
!             --  Furthermore, this corresponds to a common idiom:
  
!             --    function F (L : Thing) return Boolean is
!             --    begin
!             --       raise Program_Error;
!             --       return F (L);
!             --    end F;
  
!             --  for generating a stub function
  
!             if Nkind (Parent (N)) = N_Simple_Return_Statement
!               and then Same_Argument_List
!             then
!                exit when not Is_List_Member (Parent (N));
  
!                --  OK, return statement is in a statement list, look for raise
  
!                declare
!                   Nod : Node_Id;
  
!                begin
!                   --  Skip past N_Freeze_Entity nodes generated by expansion
  
!                   Nod := Prev (Parent (N));
!                   while Present (Nod)
!                     and then Nkind (Nod) = N_Freeze_Entity
!                   loop
!                      Prev (Nod);
!                   end loop;
  
!                   --  If no raise statement, give warning. We look at the
!                   --  original node, because in the case of "raise ... with
!                   --  ...", the node has been transformed into a call.
  
!                   exit when Nkind (Original_Node (Nod)) /= N_Raise_Statement
!                     and then
!                       (Nkind (Nod) not in N_Raise_xxx_Error
!                         or else Present (Condition (Nod)));
!                end;
!             end if;
  
!             return False;
  
!          else
!             C := P;
           end if;
-       end loop;
  
!       Error_Msg_Warn := SPARK_Mode /= On;
!       Error_Msg_N ("!possible infinite recursion<<", N);
!       Error_Msg_N ("\!??Storage_Error ]<<", N);
  
        return True;
     end Check_Infinite_Recursion;
--- 696,1093 ----
     -- Check_Infinite_Recursion --
     ------------------------------
  
!    function Check_Infinite_Recursion (Call : Node_Id) return Boolean is
!       function Enclosing_Declaration_Or_Statement (N : Node_Id) return Node_Id;
!       --  Return the nearest enclosing declaration or statement that houses
!       --  arbitrary node N.
  
!       function Invoked_With_Different_Arguments (N : Node_Id) return Boolean;
!       --  Determine whether call N invokes the related enclosing subprogram
!       --  with actuals that differ from the subprogram's formals.
  
!       function Is_Conditional_Statement (N : Node_Id) return Boolean;
!       --  Determine whether arbitrary node N denotes a conditional construct
  
!       function Is_Control_Flow_Statement (N : Node_Id) return Boolean;
!       --  Determine whether arbitrary node N denotes a control flow statement
!       --  or a construct that may contains such a statement.
! 
!       function Is_Immediately_Within_Body (N : Node_Id) return Boolean;
!       --  Determine whether arbitrary node N appears immediately within the
!       --  statements of an entry or subprogram body.
! 
!       function Is_Raise_Idiom (N : Node_Id) return Boolean;
!       --  Determine whether arbitrary node N appears immediately within the
!       --  body of an entry or subprogram, and is preceded by a single raise
!       --  statement.
! 
!       function Is_Raise_Statement (N : Node_Id) return Boolean;
!       --  Determine whether arbitrary node N denotes a raise statement
! 
!       function Is_Sole_Statement (N : Node_Id) return Boolean;
!       --  Determine whether arbitrary node N is the sole source statement in
!       --  the body of the enclosing subprogram.
! 
!       function Preceded_By_Control_Flow_Statement (N : Node_Id) return Boolean;
!       --  Determine whether arbitrary node N is preceded by a control flow
!       --  statement.
! 
!       function Within_Conditional_Statement (N : Node_Id) return Boolean;
!       --  Determine whether arbitrary node N appears within a conditional
!       --  construct.
! 
!       ----------------------------------------
!       -- Enclosing_Declaration_Or_Statement --
!       ----------------------------------------
! 
!       function Enclosing_Declaration_Or_Statement
!         (N : Node_Id) return Node_Id
!       is
!          Par : Node_Id;
  
        begin
!          Par := N;
!          while Present (Par) loop
!             if Is_Declaration (Par) or else Is_Statement (Par) then
!                return Par;
  
!             --  Prevent the search from going too far
! 
!             elsif Is_Body_Or_Package_Declaration (Par) then
!                exit;
              end if;
  
!             Par := Parent (Par);
           end loop;
  
!          return N;
!       end Enclosing_Declaration_Or_Statement;
  
!       --------------------------------------
!       -- Invoked_With_Different_Arguments --
!       --------------------------------------
  
!       function Invoked_With_Different_Arguments (N : Node_Id) return Boolean is
!          Subp : constant Entity_Id := Entity (Name (N));
  
!          Actual : Node_Id;
!          Formal : Entity_Id;
! 
!       begin
!          --  Determine whether the formals of the invoked subprogram are not
!          --  used as actuals in the call.
! 
!          Actual := First_Actual (Call);
!          Formal := First_Formal (Subp);
!          while Present (Actual) and then Present (Formal) loop
! 
!             --  The current actual does not match the current formal
! 
!             if not (Is_Entity_Name (Actual)
!                      and then Entity (Actual) = Formal)
              then
                 return True;
              end if;
  
!             Next_Actual (Actual);
!             Next_Formal (Formal);
!          end loop;
  
!          return False;
!       end Invoked_With_Different_Arguments;
  
!       ------------------------------
!       -- Is_Conditional_Statement --
!       ------------------------------
  
!       function Is_Conditional_Statement (N : Node_Id) return Boolean is
!       begin
!          return
!            Nkind_In (N, N_And_Then,
!                         N_Case_Expression,
!                         N_Case_Statement,
!                         N_If_Expression,
!                         N_If_Statement,
!                         N_Or_Else);
!       end Is_Conditional_Statement;
! 
!       -------------------------------
!       -- Is_Control_Flow_Statement --
!       -------------------------------
! 
!       function Is_Control_Flow_Statement (N : Node_Id) return Boolean is
!       begin
!          --  It is assumed that all statements may affect the control flow in
!          --  some way. A raise statement may be expanded into a non-statement
!          --  node.
! 
!          return Is_Statement (N) or else Is_Raise_Statement (N);
!       end Is_Control_Flow_Statement;
! 
!       --------------------------------
!       -- Is_Immediately_Within_Body --
!       --------------------------------
! 
!       function Is_Immediately_Within_Body (N : Node_Id) return Boolean is
!          HSS : constant Node_Id := Parent (N);
! 
!       begin
!          return
!            Nkind (HSS) = N_Handled_Sequence_Of_Statements
!              and then Nkind_In (Parent (HSS), N_Entry_Body, N_Subprogram_Body)
!              and then Is_List_Member (N)
!              and then List_Containing (N) = Statements (HSS);
!       end Is_Immediately_Within_Body;
! 
!       --------------------
!       -- Is_Raise_Idiom --
!       --------------------
! 
!       function Is_Raise_Idiom (N : Node_Id) return Boolean is
!          Raise_Stmt : Node_Id;
!          Stmt       : Node_Id;
! 
!       begin
!          if Is_Immediately_Within_Body (N) then
! 
!             --  Assume that no raise statement has been seen yet
! 
!             Raise_Stmt := Empty;
! 
!             --  Examine the statements preceding the input node, skipping
!             --  internally-generated constructs.
! 
!             Stmt := Prev (N);
!             while Present (Stmt) loop
! 
!                --  Multiple raise statements violate the idiom
! 
!                if Is_Raise_Statement (Stmt) then
!                   if Present (Raise_Stmt) then
!                      return False;
!                   end if;
! 
!                   Raise_Stmt := Stmt;
! 
!                elsif Comes_From_Source (Stmt) then
!                   exit;
!                end if;
! 
!                Stmt := Prev (Stmt);
!             end loop;
! 
!             --  At this point the node must be preceded by a raise statement,
!             --  and the raise statement has to be the sole statement within
!             --  the enclosing entry or subprogram body.
! 
!             return
!               Present (Raise_Stmt) and then Is_Sole_Statement (Raise_Stmt);
           end if;
  
!          return False;
!       end Is_Raise_Idiom;
  
!       ------------------------
!       -- Is_Raise_Statement --
!       ------------------------
  
!       function Is_Raise_Statement (N : Node_Id) return Boolean is
!       begin
!          --  A raise statement may be transfomed into a Raise_xxx_Error node
  
!          return
!            Nkind (N) = N_Raise_Statement
!              or else Nkind (N) in N_Raise_xxx_Error;
!       end Is_Raise_Statement;
  
!       -----------------------
!       -- Is_Sole_Statement --
!       -----------------------
  
!       function Is_Sole_Statement (N : Node_Id) return Boolean is
!          Stmt : Node_Id;
  
!       begin
!          --  The input node appears within the statements of an entry or
!          --  subprogram body. Examine the statements preceding the node.
  
!          if Is_Immediately_Within_Body (N) then
!             Stmt := Prev (N);
  
!             while Present (Stmt) loop
  
!                --  The statement is preceded by another statement or a source
!                --  construct. This indicates that the node does not appear by
!                --  itself.
  
!                if Is_Control_Flow_Statement (Stmt)
!                  or else Comes_From_Source (Stmt)
!                then
!                   return False;
!                end if;
  
!                Stmt := Prev (Stmt);
!             end loop;
  
!             return True;
!          end if;
  
!          --  The input node is within a construct nested inside the entry or
!          --  subprogram body.
  
!          return False;
!       end Is_Sole_Statement;
  
!       ----------------------------------------
!       -- Preceded_By_Control_Flow_Statement --
!       ----------------------------------------
  
!       function Preceded_By_Control_Flow_Statement
!         (N : Node_Id) return Boolean
!       is
!          Stmt : Node_Id;
! 
!       begin
!          if Is_List_Member (N) then
!             Stmt := Prev (N);
! 
!             --  Examine the statements preceding the input node
! 
!             while Present (Stmt) loop
!                if Is_Control_Flow_Statement (Stmt) then
!                   return True;
!                end if;
! 
!                Stmt := Prev (Stmt);
!             end loop;
! 
!             return False;
           end if;
  
!          --  Assume that the node is part of some control flow statement
! 
!          return True;
!       end Preceded_By_Control_Flow_Statement;
! 
!       ----------------------------------
!       -- Within_Conditional_Statement --
!       ----------------------------------
! 
!       function Within_Conditional_Statement (N : Node_Id) return Boolean is
!          Stmt : Node_Id;
! 
!       begin
!          Stmt := Parent (N);
!          while Present (Stmt) loop
!             if Is_Conditional_Statement (Stmt) then
!                return True;
! 
!             --  Prevent the search from going too far
! 
!             elsif Is_Body_Or_Package_Declaration (Stmt) then
!                exit;
!             end if;
! 
!             Stmt := Parent (Stmt);
!          end loop;
! 
!          return False;
!       end Within_Conditional_Statement;
! 
!       --  Local variables
! 
!       Call_Context : constant Node_Id :=
!                        Enclosing_Declaration_Or_Statement (Call);
! 
!    --  Start of processing for Check_Infinite_Recursion
! 
!    begin
!       --  The call is assumed to be safe when the enclosing subprogram is
!       --  invoked with actuals other than its formals.
!       --
!       --    procedure Proc (F1 : ...; F2 : ...; ...; FN : ...) is
!       --    begin
!       --       ...
!       --       Proc (A1, A2, ..., AN);
!       --       ...
!       --    end Proc;
! 
!       if Invoked_With_Different_Arguments (Call) then
!          return False;
! 
!       --  The call is assumed to be safe when the invocation of the enclosing
!       --  subprogram depends on a conditional statement.
!       --
!       --    procedure Proc (F1 : ...; F2 : ...; ...; FN : ...) is
!       --    begin
!       --       ...
!       --       if Some_Condition then
!       --          Proc (F1, F2, ..., FN);
!       --       end if;
!       --       ...
!       --    end Proc;
! 
!       elsif Within_Conditional_Statement (Call) then
!          return False;
! 
!       --  The context of the call is assumed to be safe when the invocation of
!       --  the enclosing subprogram is preceded by some control flow statement.
!       --
!       --    procedure Proc (F1 : ...; F2 : ...; ...; FN : ...) is
!       --    begin
!       --       ...
!       --       if Some_Condition then
!       --          ...
!       --       end if;
!       --       ...
!       --       Proc (F1, F2, ..., FN);
!       --       ...
!       --    end Proc;
! 
!       elsif Preceded_By_Control_Flow_Statement (Call_Context) then
!          return False;
! 
!       --  Detect an idiom where the context of the call is preceded by a single
!       --  raise statement.
!       --
!       --    procedure Proc (F1 : ...; F2 : ...; ...; FN : ...) is
!       --    begin
!       --       raise ...;
!       --       Proc (F1, F2, ..., FN);
!       --    end Proc;
! 
!       elsif Is_Raise_Idiom (Call_Context) then
!          return False;
!       end if;
! 
!       --  At this point it is certain that infinite recursion will take place
!       --  as long as the call is executed. Detect a case where the context of
!       --  the call is the sole source statement within the subprogram body.
!       --
!       --    procedure Proc (F1 : ...; F2 : ...; ...; FN : ...) is
!       --    begin
!       --       Proc (F1, F2, ..., FN);
!       --    end Proc;
!       --
!       --  Install an explicit raise to prevent the infinite recursion.
! 
!       if Is_Sole_Statement (Call_Context) then
!          Error_Msg_Warn := SPARK_Mode /= On;
!          Error_Msg_N ("!infinite recursion<<", Call);
!          Error_Msg_N ("\!Storage_Error [<<", Call);
! 
!          Insert_Action (Call,
!            Make_Raise_Storage_Error (Sloc (Call),
!              Reason => SE_Infinite_Recursion));
! 
!       --  Otherwise infinite recursion could take place, considering other flow
!       --  control constructs such as gotos, exit statements, etc.
! 
!       else
!          Error_Msg_Warn := SPARK_Mode /= On;
!          Error_Msg_N ("!possible infinite recursion<<", Call);
!          Error_Msg_N ("\!??Storage_Error ]<<", Call);
!       end if;
  
        return True;
     end Check_Infinite_Recursion;
*************** package body Sem_Res is
*** 2405,2421 ****
                    Set_Etype (N, Expr_Type);
  
                 --  AI05-0139-2: Expression is overloaded because type has
!                --  implicit dereference. If type matches context, no implicit
!                --  dereference is involved. If the expression is an entity,
!                --  generate a reference to it, as this is not done for an
!                --  overloaded construct during analysis.
  
                 elsif Has_Implicit_Dereference (Expr_Type) then
                    Set_Etype (N, Expr_Type);
                    Set_Is_Overloaded (N, False);
  
!                   if Is_Entity_Name (N) then
                       Generate_Reference (Entity (N), N);
                    end if;
  
                    exit Interp_Loop;
--- 2640,2682 ----
                    Set_Etype (N, Expr_Type);
  
                 --  AI05-0139-2: Expression is overloaded because type has
!                --  implicit dereference. The context may be the one that
!                --  requires implicit dereferemce.
  
                 elsif Has_Implicit_Dereference (Expr_Type) then
                    Set_Etype (N, Expr_Type);
                    Set_Is_Overloaded (N, False);
  
!                --  If the expression is an entity, generate a reference
!                --  to it, as this is not done for an overloaded construct
!                --  during analysis.
! 
!                   if Is_Entity_Name (N)
!                     and then Comes_From_Source (N)
!                   then
                       Generate_Reference (Entity (N), N);
+ 
+                      --  Examine access discriminants of entity type,
+                      --  to check whether one of them yields the
+                      --  expected type.
+ 
+                      declare
+                         Disc : Entity_Id :=
+                           First_Discriminant (Etype (Entity (N)));
+ 
+                      begin
+                         while Present (Disc) loop
+                            exit when Is_Access_Type (Etype (Disc))
+                              and then Has_Implicit_Dereference (Disc)
+                              and then Designated_Type (Etype (Disc)) = Typ;
+ 
+                            Next_Discriminant (Disc);
+                         end loop;
+ 
+                         if Present (Disc) then
+                            Build_Explicit_Dereference (N, Disc);
+                         end if;
+                      end;
                    end if;
  
                    exit Interp_Loop;
*************** package body Sem_Res is
*** 2995,3001 ****
           --  convert implicitly are allowed in membership tests).
  
           if Ada_Version >= Ada_2012
!            and then Ekind (Ctx_Type) = E_General_Access_Type
             and then Ekind (Etype (N)) = E_Anonymous_Access_Type
             and then Nkind (Parent (N)) not in N_Membership_Test
           then
--- 3256,3262 ----
           --  convert implicitly are allowed in membership tests).
  
           if Ada_Version >= Ada_2012
!            and then Ekind (Base_Type (Ctx_Type)) = E_General_Access_Type
             and then Ekind (Etype (N)) = E_Anonymous_Access_Type
             and then Nkind (Parent (N)) not in N_Membership_Test
           then
*************** package body Sem_Res is
*** 3224,3235 ****
        begin
           --  Nothing to do if no parameters, or original node is neither a
           --  function call nor a procedure call statement (happens in the
!          --  operator-transformed-to-function call case), or the call does
           --  not come from source, or this warning is off.
  
           if not Warn_On_Parameter_Order
             or else No (Parameter_Associations (N))
             or else Nkind (Original_Node (N)) not in N_Subprogram_Call
             or else not Comes_From_Source (N)
           then
              return;
--- 3485,3501 ----
        begin
           --  Nothing to do if no parameters, or original node is neither a
           --  function call nor a procedure call statement (happens in the
!          --  operator-transformed-to-function call case), or the call is to an
!          --  operator symbol (which is usually in infix form), or the call does
           --  not come from source, or this warning is off.
  
           if not Warn_On_Parameter_Order
             or else No (Parameter_Associations (N))
             or else Nkind (Original_Node (N)) not in N_Subprogram_Call
+            or else (Nkind (Name (N)) = N_Identifier
+                      and then Present (Entity (Name (N)))
+                      and then Nkind (Entity (Name (N))) =
+                                 N_Defining_Operator_Symbol)
             or else not Comes_From_Source (N)
           then
              return;
*************** package body Sem_Res is
*** 3951,3967 ****
                       DDT : constant Entity_Id :=
                               Directly_Designated_Type (Base_Type (Etype (F)));
  
-                      New_Itype : Entity_Id;
- 
                    begin
                       if Is_Class_Wide_Type (DDT)
                         and then Is_Interface (DDT)
                       then
!                         New_Itype := Create_Itype (E_Anonymous_Access_Type, A);
!                         Set_Etype (New_Itype, Etype (A));
!                         Set_Directly_Designated_Type
!                           (New_Itype, Directly_Designated_Type (Etype (A)));
!                         Set_Etype (A, New_Itype);
                       end if;
  
                       --  Ada 2005, AI-162:If the actual is an allocator, the
--- 4217,4232 ----
                       DDT : constant Entity_Id :=
                               Directly_Designated_Type (Base_Type (Etype (F)));
  
                    begin
+                      --  Displace the pointer to the object to reference its
+                      --  secondary dispatch table.
+ 
                       if Is_Class_Wide_Type (DDT)
                         and then Is_Interface (DDT)
                       then
!                         Rewrite (A, Convert_To (Etype (F), Relocate_Node (A)));
!                         Analyze_And_Resolve (A, Etype (F),
!                           Suppress => Access_Check);
                       end if;
  
                       --  Ada 2005, AI-162:If the actual is an allocator, the
*************** package body Sem_Res is
*** 4279,4285 ****
                 end if;
              end if;
  
!             if Etype (A) = Any_Type then
                 Set_Etype (N, Any_Type);
                 return;
              end if;
--- 4544,4550 ----
                 end if;
              end if;
  
!             if A_Typ = Any_Type then
                 Set_Etype (N, Any_Type);
                 return;
              end if;
*************** package body Sem_Res is
*** 4301,4318 ****
  
                 --  Apply required constraint checks
  
!                --  Gigi looks at the check flag and uses the appropriate types.
!                --  For now since one flag is used there is an optimization
!                --  which might not be done in the IN OUT case since Gigi does
!                --  not do any analysis. More thought required about this ???
! 
!                --  In fact is this comment obsolete??? doesn't the expander now
!                --  generate all these tests anyway???
! 
!                if Is_Scalar_Type (Etype (A)) then
                    Apply_Scalar_Range_Check (A, F_Typ);
  
!                elsif Is_Array_Type (Etype (A)) then
                    Apply_Length_Check (A, F_Typ);
  
                 elsif Is_Record_Type (F_Typ)
--- 4566,4575 ----
  
                 --  Apply required constraint checks
  
!                if Is_Scalar_Type (A_Typ) then
                    Apply_Scalar_Range_Check (A, F_Typ);
  
!                elsif Is_Array_Type (A_Typ) then
                    Apply_Length_Check (A, F_Typ);
  
                 elsif Is_Record_Type (F_Typ)
*************** package body Sem_Res is
*** 4383,4394 ****
  
                 if Nkind (A) = N_Type_Conversion then
                    if Is_Scalar_Type (A_Typ) then
-                      Apply_Scalar_Range_Check
-                        (Expression (A), Etype (Expression (A)), A_Typ);
  
!                      --  In addition, the returned value of the parameter must
!                      --  satisfy the bounds of the object type (see comment
!                      --  below).
  
                       Apply_Scalar_Range_Check (A, A_Typ, F_Typ);
  
--- 4640,4661 ----
  
                 if Nkind (A) = N_Type_Conversion then
                    if Is_Scalar_Type (A_Typ) then
  
!                      --  Special case here tailored to Exp_Ch6.Is_Legal_Copy,
!                      --  which would prevent the check from being generated.
!                      --  This is for Starlet only though, so long obsolete.
! 
!                      if Mechanism (F) = By_Reference
!                        and then Is_Valued_Procedure (Nam)
!                      then
!                         null;
!                      else
!                         Apply_Scalar_Range_Check
!                           (Expression (A), Etype (Expression (A)), A_Typ);
!                      end if;
! 
!                      --  In addition the return value must meet the constraints
!                      --  of the object type (see the comment below).
  
                       Apply_Scalar_Range_Check (A, A_Typ, F_Typ);
  
*************** package body Sem_Res is
*** 4412,4417 ****
--- 4679,4685 ----
                      and then Ekind (F) = E_Out_Parameter
                    then
                       Apply_Length_Check (A, F_Typ);
+ 
                    else
                       Apply_Range_Check (A, A_Typ, F_Typ);
                    end if;
*************** package body Sem_Res is
*** 4447,4469 ****
                 end if;
              end if;
  
!             --  Check bad case of atomic/volatile argument (RM C.6(12))
  
!             if Is_By_Reference_Type (Etype (F))
                and then Comes_From_Source (N)
              then
                 if Is_Atomic_Object (A)
                   and then not Is_Atomic (Etype (F))
                 then
                    Error_Msg_NE
!                     ("cannot pass atomic argument to non-atomic formal&",
                       A, F);
  
                 elsif Is_Volatile_Object (A)
                   and then not Is_Volatile (Etype (F))
                 then
                    Error_Msg_NE
!                     ("cannot pass volatile argument to non-volatile formal&",
                       A, F);
                 end if;
              end if;
--- 4715,4753 ----
                 end if;
              end if;
  
!             --  Check illegal cases of atomic/volatile actual (RM C.6(12,13))
  
!             if (Is_By_Reference_Type (Etype (F)) or else Is_Aliased (F))
                and then Comes_From_Source (N)
              then
                 if Is_Atomic_Object (A)
                   and then not Is_Atomic (Etype (F))
                 then
                    Error_Msg_NE
!                     ("cannot pass atomic object to nonatomic formal&",
                       A, F);
+                   Error_Msg_N
+                     ("\which is passed by reference (RM C.6(12))", A);
  
                 elsif Is_Volatile_Object (A)
                   and then not Is_Volatile (Etype (F))
                 then
                    Error_Msg_NE
!                     ("cannot pass volatile object to nonvolatile formal&",
!                      A, F);
!                   Error_Msg_N
!                     ("\which is passed by reference (RM C.6(12))", A);
!                end if;
! 
!                if Ada_Version >= Ada_2020
!                  and then Is_Subcomponent_Of_Atomic_Object (A)
!                  and then not Is_Atomic_Object (A)
!                then
!                   Error_Msg_N
!                     ("cannot pass nonatomic subcomponent of atomic object",
!                      A);
!                   Error_Msg_NE
!                     ("\to formal & which is passed by reference (RM C.6(13))",
                       A, F);
                 end if;
              end if;
*************** package body Sem_Res is
*** 4723,4728 ****
--- 5007,5018 ----
        --  the cases of a constraint expression which is an access attribute or
        --  an access discriminant.
  
+       procedure Check_Allocator_Discrim_Accessibility_Exprs
+         (Curr_Exp  : Node_Id;
+          Alloc_Typ : Entity_Id);
+       --  Dispatch checks performed by Check_Allocator_Discrim_Accessibility
+       --  across all expressions within a given conditional expression.
+ 
        function In_Dispatching_Context return Boolean;
        --  If the allocator is an actual in a call, it is allowed to be class-
        --  wide when the context is not because it is a controlling actual.
*************** package body Sem_Res is
*** 4774,4779 ****
--- 5064,5125 ----
           end if;
        end Check_Allocator_Discrim_Accessibility;
  
+       -------------------------------------------------
+       -- Check_Allocator_Discrim_Accessibility_Exprs --
+       -------------------------------------------------
+ 
+       procedure Check_Allocator_Discrim_Accessibility_Exprs
+         (Curr_Exp  : Node_Id;
+          Alloc_Typ : Entity_Id)
+       is
+          Alt      : Node_Id;
+          Expr     : Node_Id;
+          Disc_Exp : constant Node_Id := Original_Node (Curr_Exp);
+       begin
+          --  When conditional expressions are constant folded we know at
+          --  compile time which expression to check - so don't bother with
+          --  the rest of the cases.
+ 
+          if Nkind (Curr_Exp) = N_Attribute_Reference then
+             Check_Allocator_Discrim_Accessibility (Curr_Exp, Alloc_Typ);
+ 
+          --  Non-constant-folded if expressions
+ 
+          elsif Nkind (Disc_Exp) = N_If_Expression then
+             --  Check both expressions if they are still present in the face
+             --  of expansion.
+ 
+             Expr := Next (First (Expressions (Disc_Exp)));
+             if Present (Expr) then
+                Check_Allocator_Discrim_Accessibility_Exprs (Expr, Alloc_Typ);
+                Expr := Next (Expr);
+                if Present (Expr) then
+                   Check_Allocator_Discrim_Accessibility_Exprs
+                     (Expr, Alloc_Typ);
+                end if;
+             end if;
+ 
+          --  Non-constant-folded case expressions
+ 
+          elsif Nkind (Disc_Exp) = N_Case_Expression then
+             --  Check all alternatives
+ 
+             Alt := First (Alternatives (Disc_Exp));
+             while Present (Alt) loop
+                Check_Allocator_Discrim_Accessibility_Exprs
+                  (Expression (Alt), Alloc_Typ);
+ 
+                Next (Alt);
+             end loop;
+ 
+          --  Base case, check the accessibility of the original node of the
+          --  expression.
+ 
+          else
+             Check_Allocator_Discrim_Accessibility (Disc_Exp, Alloc_Typ);
+          end if;
+       end Check_Allocator_Discrim_Accessibility_Exprs;
+ 
        ----------------------------
        -- In_Dispatching_Context --
        ----------------------------
*************** package body Sem_Res is
*** 4925,4931 ****
  
                 while Present (Discrim) and then Present (Disc_Exp) loop
                    if Ekind (Etype (Discrim)) = E_Anonymous_Access_Type then
!                      Check_Allocator_Discrim_Accessibility (Disc_Exp, Typ);
                    end if;
  
                    Next_Discriminant (Discrim);
--- 5271,5278 ----
  
                 while Present (Discrim) and then Present (Disc_Exp) loop
                    if Ekind (Etype (Discrim)) = E_Anonymous_Access_Type then
!                      Check_Allocator_Discrim_Accessibility_Exprs
!                        (Disc_Exp, Typ);
                    end if;
  
                    Next_Discriminant (Discrim);
*************** package body Sem_Res is
*** 4983,4994 ****
                 while Present (Discrim) and then Present (Constr) loop
                    if Ekind (Etype (Discrim)) = E_Anonymous_Access_Type then
                       if Nkind (Constr) = N_Discriminant_Association then
!                         Disc_Exp := Original_Node (Expression (Constr));
                       else
!                         Disc_Exp := Original_Node (Constr);
                       end if;
  
!                      Check_Allocator_Discrim_Accessibility (Disc_Exp, Typ);
                    end if;
  
                    Next_Discriminant (Discrim);
--- 5330,5342 ----
                 while Present (Discrim) and then Present (Constr) loop
                    if Ekind (Etype (Discrim)) = E_Anonymous_Access_Type then
                       if Nkind (Constr) = N_Discriminant_Association then
!                         Disc_Exp := Expression (Constr);
                       else
!                         Disc_Exp := Constr;
                       end if;
  
!                      Check_Allocator_Discrim_Accessibility_Exprs
!                        (Disc_Exp, Typ);
                    end if;
  
                    Next_Discriminant (Discrim);
*************** package body Sem_Res is
*** 5432,5444 ****
  
           --  A universal real conditional expression can appear in a fixed-type
           --  context and must be resolved with that context to facilitate the
!          --  code generation in the back end.
  
           elsif Nkind_In (N, N_Case_Expression, N_If_Expression)
             and then Etype (N) = Universal_Real
             and then Is_Fixed_Point_Type (B_Typ)
           then
!             Resolve (N, B_Typ);
  
           else
              Resolve (N);
--- 5780,5800 ----
  
           --  A universal real conditional expression can appear in a fixed-type
           --  context and must be resolved with that context to facilitate the
!          --  code generation in the back end. However, If the context is
!          --  Universal_fixed (i.e. as an operand of a multiplication/division
!          --  involving a fixed-point operand) the conditional expression must
!          --  resolve to a unique visible fixed_point type, normally Duration.
  
           elsif Nkind_In (N, N_Case_Expression, N_If_Expression)
             and then Etype (N) = Universal_Real
             and then Is_Fixed_Point_Type (B_Typ)
           then
!             if B_Typ = Universal_Fixed then
!                Resolve (N, Unique_Fixed_Point_Type (N));
! 
!             else
!                Resolve (N, B_Typ);
!             end if;
  
           else
              Resolve (N);
*************** package body Sem_Res is
*** 6070,6084 ****
        --  is frozen in the usual fashion, by the appearance of a real body,
        --  or at the end of a declarative part. However an implicit call to
        --  an expression function may appear when it is part of a default
!       --  expression in a call to an initialiation procedure, and must be
        --  frozen now, even if the body is inserted at a later point.
  
        if Is_Entity_Name (Subp)
          and then not In_Spec_Expression
          and then not Is_Expression_Function_Or_Completion (Current_Scope)
          and then
            (not Is_Expression_Function_Or_Completion (Entity (Subp))
!             or else Scope (Entity (Subp)) = Current_Scope)
        then
           if Is_Expression_Function (Entity (Subp)) then
  
--- 6426,6442 ----
        --  is frozen in the usual fashion, by the appearance of a real body,
        --  or at the end of a declarative part. However an implicit call to
        --  an expression function may appear when it is part of a default
!       --  expression in a call to an initialization procedure, and must be
        --  frozen now, even if the body is inserted at a later point.
+       --  Otherwise, the call freezes the expression if expander is active,
+       --  for example as part of an object declaration.
  
        if Is_Entity_Name (Subp)
          and then not In_Spec_Expression
          and then not Is_Expression_Function_Or_Completion (Current_Scope)
          and then
            (not Is_Expression_Function_Or_Completion (Entity (Subp))
!             or else Expander_Active)
        then
           if Is_Expression_Function (Entity (Subp)) then
  
*************** package body Sem_Res is
*** 6317,6323 ****
                    --  checkable, the case of calling an immediately containing
                    --  subprogram is easy to catch.
  
!                   Check_Restriction (No_Recursion, N);
  
                    --  If the recursive call is to a parameterless subprogram,
                    --  then even if we can't statically detect infinite
--- 6675,6683 ----
                    --  checkable, the case of calling an immediately containing
                    --  subprogram is easy to catch.
  
!                   if not Is_Ignored_Ghost_Entity (Nam) then
!                      Check_Restriction (No_Recursion, N);
!                   end if;
  
                    --  If the recursive call is to a parameterless subprogram,
                    --  then even if we can't statically detect infinite
*************** package body Sem_Res is
*** 6462,6470 ****
--- 6822,6834 ----
        then
           null;
  
+       --  A return statement from an ignored Ghost function does not use the
+       --  secondary stack (or any other one).
+ 
        elsif Expander_Active
          and then Ekind_In (Nam, E_Function, E_Subprogram_Type)
          and then Requires_Transient_Scope (Etype (Nam))
+         and then not Is_Ignored_Ghost_Entity (Nam)
        then
           Establish_Transient_Scope (N, Manage_Sec_Stack => True);
  
*************** package body Sem_Res is
*** 6593,6599 ****
        end if;
  
        --  If this is a dispatching call, generate the appropriate reference,
!       --  for better source navigation in GPS.
  
        if Is_Overloadable (Nam)
          and then Present (Controlling_Argument (N))
--- 6957,6963 ----
        end if;
  
        --  If this is a dispatching call, generate the appropriate reference,
!       --  for better source navigation in GNAT Studio.
  
        if Is_Overloadable (Nam)
          and then Present (Controlling_Argument (N))
*************** package body Sem_Res is
*** 6726,6731 ****
--- 7090,7099 ----
  
        Build_Call_Marker (N);
  
+       Mark_Use_Clauses (Subp);
+ 
+       Warn_On_Overlapping_Actuals (Nam, N);
+ 
        --  In GNATprove mode, expansion is disabled, but we want to inline some
        --  subprograms to facilitate formal verification. Indirect calls through
        --  a subprogram type or within a generic cannot be inlined. Inlining is
*************** package body Sem_Res is
*** 6768,6773 ****
--- 7136,7150 ----
                 Cannot_Inline
                   ("cannot inline & (in default expression)?", N, Nam_UA);
  
+             --  Calls cannot be inlined inside quantified expressions, which
+             --  are left in expression form for GNATprove. Since these
+             --  expressions are only preanalyzed, we need to detect the failure
+             --  to inline outside of the case for Full_Analysis below.
+ 
+             elsif In_Quantified_Expression (N) then
+                Cannot_Inline
+                  ("cannot inline & (in quantified expression)?", N, Nam_UA);
+ 
              --  Inlining should not be performed during preanalysis
  
              elsif Full_Analysis then
*************** package body Sem_Res is
*** 6811,6816 ****
--- 7188,7202 ----
                       end if;
                    end if;
  
+                --  Cannot inline a call inside the definition of a record type,
+                --  typically inside the constraints of the type. Calls in
+                --  default expressions are also not inlined, but this is
+                --  filtered out above when testing In_Default_Expr.
+ 
+                elsif Is_Record_Type (Current_Scope) then
+                   Cannot_Inline
+                     ("cannot inline & (inside record type)?", N, Nam_UA);
+ 
                 --  With the one-pass inlining technique, a call cannot be
                 --  inlined if the corresponding body has not been seen yet.
  
*************** package body Sem_Res is
*** 6834,6839 ****
--- 7220,7233 ----
                      ("cannot inline & (in potentially unevaluated context)?",
                       N, Nam_UA);
  
+                --  Calls cannot be inlined inside the conditions of while
+                --  loops, as this would create complex actions inside
+                --  the condition, that are not handled by GNATprove.
+ 
+                elsif In_While_Loop_Condition (N) then
+                   Cannot_Inline
+                     ("cannot inline & (in while loop condition)?", N, Nam_UA);
+ 
                 --  Do not inline calls which would possibly lead to missing a
                 --  type conversion check on an input parameter.
  
*************** package body Sem_Res is
*** 6856,6865 ****
              end if;
           end if;
        end if;
- 
-       Mark_Use_Clauses (Subp);
- 
-       Warn_On_Overlapping_Actuals (Nam, N);
     end Resolve_Call;
  
     -----------------------------
--- 7250,7255 ----
*************** package body Sem_Res is
*** 8194,8199 ****
--- 8584,8638 ----
              Explain_Redundancy (Original_Node (R));
           end if;
  
+          --  If the equality is overloaded and the operands have resolved
+          --  properly, set the proper equality operator on the node. The
+          --  current setting is the first one found during analysis, which
+          --  is not necessarily the one to which the node has resolved.
+ 
+          if Is_Overloaded (N) then
+             declare
+                I  : Interp_Index;
+                It : Interp;
+ 
+             begin
+                Get_First_Interp (N, I, It);
+ 
+                --  If the equality is user-defined, the type of the operands
+                --  matches that of the formals. For a predefined operator,
+                --  it is the scope that matters, given that the predefined
+                --  equality has Any_Type formals. In either case the result
+                --  type (most often Boolean) must match the context. The scope
+                --  is either that of the type, if there is a generated equality
+                --  (when there is an equality for the component type), or else
+                --  Standard otherwise.
+ 
+                while Present (It.Typ) loop
+                   if Etype (It.Nam) = Typ
+                     and then
+                      (Etype (First_Entity (It.Nam)) = Etype (L)
+                        or else Scope (It.Nam) = Standard_Standard
+                        or else Scope (It.Nam) = Scope (T))
+                   then
+                      Set_Entity (N, It.Nam);
+ 
+                      Set_Is_Overloaded (N, False);
+                      exit;
+                   end if;
+ 
+                   Get_Next_Interp (I, It);
+                end loop;
+ 
+                --  If expansion is active and this is an inherited operation,
+                --  replace it with its ancestor. This must not be done during
+                --  preanalysis because the type may not be frozen yet, as when
+                --  the context is a precondition or postcondition.
+ 
+                if Present (Alias (Entity (N))) and then Expander_Active then
+                   Set_Entity (N, Alias (Entity (N)));
+                end if;
+             end;
+          end if;
+ 
           Check_Unset_Reference (L);
           Check_Unset_Reference (R);
           Generate_Operator_Reference (N, T);
*************** package body Sem_Res is
*** 9791,9799 ****
           end if;
  
           --  Complete resolution and evaluation of NOT
  
-          Resolve (Right_Opnd (N), B_Typ);
-          Check_Unset_Reference (Right_Opnd (N));
           Set_Etype (N, B_Typ);
           Generate_Operator_Reference (N, B_Typ);
           Eval_Op_Not (N);
--- 10230,10271 ----
           end if;
  
           --  Complete resolution and evaluation of NOT
+          --  If argument is an equality and expected type is boolean, that
+          --  expected type has no effect on resolution, and there are
+          --  special rules for resolution of Eq, Neq in the presence of
+          --  overloaded operands, so we directly call its resolution routines.
+ 
+          declare
+             Opnd : constant Node_Id := Right_Opnd (N);
+             Op_Id : Entity_Id;
+ 
+          begin
+             if B_Typ = Standard_Boolean
+               and then Nkind_In (Opnd, N_Op_Eq, N_Op_Ne)
+               and then Is_Overloaded (Opnd)
+             then
+                Resolve_Equality_Op (Opnd, B_Typ);
+                Op_Id := Entity (Opnd);
+ 
+                if Ekind (Op_Id) = E_Function
+                  and then not Is_Intrinsic_Subprogram (Op_Id)
+                then
+                   Rewrite_Operator_As_Call (Opnd, Op_Id);
+                end if;
+ 
+                if not Inside_A_Generic or else Is_Entity_Name (Opnd) then
+                   Freeze_Expression (Opnd);
+                end if;
+ 
+                Expand (Opnd);
+ 
+             else
+                Resolve (Opnd, B_Typ);
+             end if;
+ 
+             Check_Unset_Reference (Opnd);
+          end;
  
           Set_Etype (N, B_Typ);
           Generate_Operator_Reference (N, B_Typ);
           Eval_Op_Not (N);
*************** package body Sem_Res is
*** 10260,10265 ****
--- 10732,10741 ----
  
           pragma Assert (Found);
           Resolve (P, It1.Typ);
+ 
+          --  In general the expected type is the type of the context, not the
+          --  type of the candidate selected component.
+ 
           Set_Etype (N, Typ);
           Set_Entity_With_Checks (S, Comp1);
  
*************** package body Sem_Res is
*** 10272,10277 ****
--- 10748,10764 ----
  
           if Ekind (Typ) = E_Anonymous_Access_Subprogram_Type then
              Set_Etype (N, Etype (Comp1));
+ 
+          --  When the type of the component is an access to a class-wide type
+          --  the relevant type is that of the component (since in such case we
+          --  may need to generate implicit type conversions or dispatching
+          --  calls).
+ 
+          elsif Is_Access_Type (Typ)
+            and then not Is_Class_Wide_Type (Designated_Type (Typ))
+            and then Is_Class_Wide_Type (Designated_Type (Etype (Comp1)))
+          then
+             Set_Etype (N, Etype (Comp1));
           end if;
  
        else
*************** package body Sem_Res is
*** 10297,10304 ****
--- 10784,10808 ----
        if Is_Access_Type (Etype (P)) then
           T := Designated_Type (Etype (P));
           Check_Fully_Declared_Prefix (T, P);
+ 
        else
           T := Etype (P);
+ 
+          --  If the prefix is an entity it may have a deferred reference set
+          --  during analysis of the selected component. After resolution we
+          --  can transform it into a proper reference. This prevents spurious
+          --  warnings on useless assignments when the same selected component
+          --  is the actual for an out parameter in a subsequent call.
+ 
+          if Is_Entity_Name (P)
+            and then Has_Deferred_Reference (Entity (P))
+          then
+             if May_Be_Lvalue (N) then
+                Generate_Reference (Entity (P), P, 'm');
+             else
+                Generate_Reference (Entity (P), P, 'r');
+             end if;
+          end if;
        end if;
  
        --  Set flag for expander if discriminant check required on a component
*************** package body Sem_Res is
*** 11323,11334 ****
--- 11827,11861 ----
                 Set_Etype (Expression (N), Opnd);
              end if;
  
+             --  It seems that Non_Limited_View should also be applied for
+             --  Target when it has a limited view, but that leads to missing
+             --  error checks on interface conversions further below. ???
+ 
              if Is_Access_Type (Opnd) then
                 Opnd := Designated_Type (Opnd);
+ 
+                --  If the type of the operand is a limited view, use nonlimited
+                --  view when available. If it is a class-wide type, recover the
+                --  class-wide type of the nonlimited view.
+ 
+                if From_Limited_With (Opnd)
+                  and then Has_Non_Limited_View (Opnd)
+                then
+                   Opnd := Non_Limited_View (Opnd);
+                end if;
              end if;
  
              if Is_Access_Type (Target_Typ) then
                 Target := Designated_Type (Target);
+ 
+                --  If the target type is a limited view, use nonlimited view
+                --  when available.
+ 
+                if From_Limited_With (Target)
+                  and then Has_Non_Limited_View (Target)
+                then
+                   Target := Non_Limited_View (Target);
+                end if;
              end if;
  
              if Opnd = Target then
*************** package body Sem_Res is
*** 11336,11341 ****
--- 11863,11872 ----
  
              --  Conversion from interface type
  
+             --  It seems that it would be better for the error checks below
+             --  to be performed as part of Validate_Conversion (and maybe some
+             --  of the error checks above could be moved as well?). ???
+ 
              elsif Is_Interface (Opnd) then
  
                 --  Ada 2005 (AI-217): Handle entities from limited views
*************** package body Sem_Res is
*** 11413,11418 ****
--- 11944,11951 ----
          and then (Is_Fixed_Point_Type (Operand_Typ)
                     or else (not GNATprove_Mode
                               and then Is_Floating_Point_Type (Operand_Typ)))
+         and then not Range_Checks_Suppressed (Target_Typ)
+         and then not Range_Checks_Suppressed (Operand_Typ)
        then
           Set_Do_Range_Check (Operand);
        end if;
*************** package body Sem_Res is
*** 12057,12063 ****
              --     ityp (x)
  
              --  with the Float_Truncate flag set to False or True respectively,
!             --  which is more efficient.
  
              if Is_Floating_Point_Type (Opnd_Typ)
                and then
--- 12590,12597 ----
              --     ityp (x)
  
              --  with the Float_Truncate flag set to False or True respectively,
!             --  which is more efficient. We reuse Rounding for Machine_Rounding
!             --  as System.Fat_Gen, which is a permissible behavior.
  
              if Is_Floating_Point_Type (Opnd_Typ)
                and then
*************** package body Sem_Res is
*** 12066,12071 ****
--- 12600,12606 ----
                              and then Conversion_OK (N)))
                and then Nkind (Operand) = N_Attribute_Reference
                and then Nam_In (Attribute_Name (Operand), Name_Rounding,
+                                                          Name_Machine_Rounding,
                                                           Name_Truncation)
              then
                 declare
*************** package body Sem_Res is
*** 12842,12848 ****
              if Ada_Version >= Ada_2012
                and then not Comes_From_Source (N)
                and then Is_Rewrite_Substitution (N)
!               and then Ekind (Target_Type) = E_General_Access_Type
                and then Ekind (Opnd_Type) = E_Anonymous_Access_Type
              then
                 if Is_Itype (Opnd_Type) then
--- 13377,13383 ----
              if Ada_Version >= Ada_2012
                and then not Comes_From_Source (N)
                and then Is_Rewrite_Substitution (N)
!               and then Ekind (Base_Type (Target_Type)) = E_General_Access_Type
                and then Ekind (Opnd_Type) = E_Anonymous_Access_Type
              then
                 if Is_Itype (Opnd_Type) then
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_spark.adb gcc-10.1.0/gcc/ada/sem_spark.adb
*** gcc-9.3.0/gcc/ada/sem_spark.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_spark.adb	Thu Jan  1 00:00:00 1970
***************
*** 1,4629 ****
- ------------------------------------------------------------------------------
- --                                                                          --
- --                         GNAT COMPILER COMPONENTS                         --
- --                                                                          --
- --                            S E M _ S P A R K                             --
- --                                                                          --
- --                                 B o d y                                  --
- --                                                                          --
- --          Copyright (C) 2017-2019, Free Software Foundation, Inc.         --
- --                                                                          --
- -- GNAT is free software;  you can  redistribute it  and/or modify it under --
- -- terms of the  GNU General Public License as published  by the Free Soft- --
- -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
- -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
- -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
- -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
- -- for  more details.  You should have  received  a copy of the GNU General --
- -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
- -- http://www.gnu.org/licenses for a complete copy of the license.          --
- --                                                                          --
- -- GNAT was originally developed  by the GNAT team at  New York University. --
- -- Extensive contributions were provided by Ada Core Technologies Inc.      --
- --                                                                          --
- ------------------------------------------------------------------------------
- 
- with Atree;    use Atree;
- with Einfo;    use Einfo;
- with Errout;   use Errout;
- with Namet;    use Namet;
- with Nlists;   use Nlists;
- with Opt;      use Opt;
- with Osint;    use Osint;
- with Sem_Prag; use Sem_Prag;
- with Sem_Util; use Sem_Util;
- with Sem_Aux;  use Sem_Aux;
- with Sinfo;    use Sinfo;
- with Snames;   use Snames;
- with Treepr;   use Treepr;
- 
- with Ada.Unchecked_Deallocation;
- with GNAT.Dynamic_HTables; use GNAT.Dynamic_HTables;
- 
- package body Sem_SPARK is
- 
-    -------------------------------------------------
-    -- Handling of Permissions Associated to Paths --
-    -------------------------------------------------
- 
-    package Permissions is
-       Elaboration_Context_Max : constant := 1009;
-       --  The hash range
- 
-       type Elaboration_Context_Index is range 0 .. Elaboration_Context_Max - 1;
- 
-       function Elaboration_Context_Hash (Key : Entity_Id)
-                                          return Elaboration_Context_Index;
-       --  Function to hash any node of the AST
- 
-       type Perm_Kind is (Borrowed, Observed, Unrestricted, Moved);
-       --  Permission type associated with paths. The Moved permission is
-       --  equivalent to the Unrestricted one (same permissions). The Moved is
-       --  however used to mark the RHS after a move (which still unrestricted).
-       --  This way, we may generate warnings when manipulating the RHS
-       --  afterwads since it is set to Null after the assignment.
- 
-       type Perm_Tree_Wrapper;
- 
-       type Perm_Tree_Access is access Perm_Tree_Wrapper;
-       --  A tree of permissions is defined, where the root is a whole object
-       --  and tree branches follow access paths in memory. As Perm_Tree is a
-       --  discriminated record, a wrapper type is used for the access type
-       --  designating a subtree, to make it unconstrained so that it can be
-       --  updated.
- 
-       --  Nodes in the permission tree are of different kinds
- 
-       type Path_Kind is
-         (Entire_Object,    --  Scalar object, or folded object of any type
-          Reference,        --  Unfolded object of access type
-          Array_Component,  --  Unfolded object of array type
-          Record_Component  --  Unfolded object of record type
-         );
- 
-       package Perm_Tree_Maps is new Simple_HTable
-         (Header_Num => Elaboration_Context_Index,
-          Key        => Node_Id,
-          Element    => Perm_Tree_Access,
-          No_Element => null,
-          Hash       => Elaboration_Context_Hash,
-          Equal      => "=");
-       --  The instantation of a hash table, with keys being nodes and values
-       --  being pointers to trees. This is used to reference easily all
-       --  extensions of a Record_Component node (that can have name x, y, ...).
- 
-       --  The definition of permission trees. This is a tree, which has a
-       --  permission at each node, and depending on the type of the node,
-       --  can have zero, one, or more children pointed to by an access to tree.
- 
-       type Perm_Tree (Kind : Path_Kind := Entire_Object) is record
-          Permission : Perm_Kind;
-          --  Permission at this level in the path
- 
-          Is_Node_Deep : Boolean;
-          --  Whether this node is of a deep type, to be used when moving the
-          --  path.
- 
-          case Kind is
-             --  An entire object is either a leaf (an object which cannot be
-             --  extended further in a path) or a subtree in folded form (which
-             --  could later be unfolded further in another kind of node). The
-             --  field Children_Permission specifies a permission for every
-             --  extension of that node if that permission is different from
-             --  the node's permission.
- 
-             when Entire_Object =>
-                Children_Permission : Perm_Kind;
- 
-             --  Unfolded path of access type. The permission of the object
-             --  pointed to is given in Get_All.
- 
-             when Reference =>
-                Get_All : Perm_Tree_Access;
- 
-             --  Unfolded path of array type. The permission of the elements is
-             --  given in Get_Elem.
- 
-             when Array_Component =>
-                Get_Elem : Perm_Tree_Access;
- 
-             --  Unfolded path of record type. The permission of the regular
-             --  components is given in Component. The permission of unknown
-             --  components (for objects of tagged type) is given in
-             --  Other_Components.
- 
-             when Record_Component =>
-                Component : Perm_Tree_Maps.Instance;
-                Other_Components : Perm_Tree_Access;
-          end case;
-       end record;
- 
-       type Perm_Tree_Wrapper is record
-          Tree : Perm_Tree;
-       end record;
-       --  We use this wrapper in order to have unconstrained discriminants
- 
-       type Perm_Env is new Perm_Tree_Maps.Instance;
-       --  The definition of a permission environment for the analysis. This
-       --  is just a hash table of permission trees, each of them rooted with
-       --  an Identifier/Expanded_Name.
- 
-       type Perm_Env_Access is access Perm_Env;
-       --  Access to permission environments
- 
-       package Env_Maps is new Simple_HTable
-         (Header_Num => Elaboration_Context_Index,
-          Key        => Entity_Id,
-          Element    => Perm_Env_Access,
-          No_Element => null,
-          Hash       => Elaboration_Context_Hash,
-          Equal      => "=");
-       --  The instantiation of a hash table whose elements are permission
-       --  environments. This hash table is used to save the environments at
-       --  the entry of each loop, with the key being the loop label.
- 
-       type Env_Backups is new Env_Maps.Instance;
-       --  The type defining the hash table saving the environments at the entry
-       --  of each loop.
- 
-       package Boolean_Variables_Maps is new Simple_HTable
-         (Header_Num => Elaboration_Context_Index,
-          Key        => Entity_Id,
-          Element    => Boolean,
-          No_Element => False,
-          Hash       => Elaboration_Context_Hash,
-          Equal      => "=");
-       --  These maps allow tracking the variables that have been declared but
-       --  never used anywhere in the source code. Especially, we do not raise
-       --  an error if the variable stays write-only and is declared at package
-       --  level, because there is no risk that the variable has been moved,
-       --  because it has never been used.
- 
-       type Initialization_Map is new Boolean_Variables_Maps.Instance;
- 
-       --------------------
-       -- Simple Getters --
-       --------------------
- 
-       --  Simple getters to avoid having .all.Tree.Field everywhere. Of course,
-       --  that's only for the top access, as otherwise this reverses the order
-       --  in accesses visually.
- 
-       function Children_Permission (T : Perm_Tree_Access) return Perm_Kind;
-       function Component (T : Perm_Tree_Access) return Perm_Tree_Maps.Instance;
-       function Get_All (T : Perm_Tree_Access) return Perm_Tree_Access;
-       function Get_Elem (T : Perm_Tree_Access) return Perm_Tree_Access;
-       function Is_Node_Deep (T : Perm_Tree_Access) return Boolean;
-       function Kind (T : Perm_Tree_Access) return Path_Kind;
-       function Other_Components (T : Perm_Tree_Access) return Perm_Tree_Access;
-       function Permission (T : Perm_Tree_Access) return Perm_Kind;
- 
-       -----------------------
-       -- Memory Management --
-       -----------------------
- 
-       procedure Copy_Env
-         (From : Perm_Env;
-          To : in out Perm_Env);
-       --  Procedure to copy a permission environment
- 
-       procedure Copy_Init_Map
-         (From : Initialization_Map;
-          To : in out Initialization_Map);
-       --  Procedure to copy an initialization map
- 
-       procedure Copy_Tree
-         (From : Perm_Tree_Access;
-          To : Perm_Tree_Access);
-       --  Procedure to copy a permission tree
- 
-       procedure Free_Env
-         (PE : in out Perm_Env);
-       --  Procedure to free a permission environment
- 
-       procedure Free_Perm_Tree
-         (PT : in out Perm_Tree_Access);
-       --  Procedure to free a permission tree
- 
-       --------------------
-       -- Error Messages --
-       --------------------
- 
-       procedure Perm_Mismatch
-         (Exp_Perm, Act_Perm : Perm_Kind;
-          N                  : Node_Id);
-       --  Issues a continuation error message about a mismatch between a
-       --  desired permission Exp_Perm and a permission obtained Act_Perm. N
-       --  is the node on which the error is reported.
- 
-    end Permissions;
- 
-    package body Permissions is
- 
-       -------------------------
-       -- Children_Permission --
-       -------------------------
- 
-       function Children_Permission (T : Perm_Tree_Access) return Perm_Kind is
-       begin
-          return T.all.Tree.Children_Permission;
-       end Children_Permission;
- 
-       ---------------
-       -- Component --
-       ---------------
- 
-       function Component
-         (T : Perm_Tree_Access)
-          return Perm_Tree_Maps.Instance
-       is
-       begin
-          return T.all.Tree.Component;
-       end Component;
- 
-       --------------
-       -- Copy_Env --
-       --------------
- 
-       procedure Copy_Env (From : Perm_Env; To : in out Perm_Env) is
-          Comp_From : Perm_Tree_Access;
-          Key_From  : Perm_Tree_Maps.Key_Option;
-          Son       : Perm_Tree_Access;
- 
-       begin
-          Reset (To);
-          Key_From := Get_First_Key (From);
-          while Key_From.Present loop
-             Comp_From := Get (From, Key_From.K);
-             pragma Assert (Comp_From /= null);
- 
-             Son := new Perm_Tree_Wrapper;
-             Copy_Tree (Comp_From, Son);
- 
-             Set (To, Key_From.K, Son);
-             Key_From := Get_Next_Key (From);
-          end loop;
-       end Copy_Env;
- 
-       -------------------
-       -- Copy_Init_Map --
-       -------------------
- 
-       procedure Copy_Init_Map
-         (From : Initialization_Map;
-          To   : in out Initialization_Map)
-       is
-          Comp_From : Boolean;
-          Key_From : Boolean_Variables_Maps.Key_Option;
- 
-       begin
-          Reset (To);
-          Key_From := Get_First_Key (From);
-          while Key_From.Present loop
-             Comp_From := Get (From, Key_From.K);
-             Set (To, Key_From.K, Comp_From);
-             Key_From := Get_Next_Key (From);
-          end loop;
-       end Copy_Init_Map;
- 
-       ---------------
-       -- Copy_Tree --
-       ---------------
- 
-       procedure Copy_Tree (From : Perm_Tree_Access; To : Perm_Tree_Access) is
-       begin
-          To.all := From.all;
-          case Kind (From) is
-             when Entire_Object =>
-                null;
- 
-             when Reference =>
-                To.all.Tree.Get_All := new Perm_Tree_Wrapper;
-                Copy_Tree (Get_All (From), Get_All (To));
- 
-             when Array_Component =>
-                To.all.Tree.Get_Elem := new Perm_Tree_Wrapper;
-                Copy_Tree (Get_Elem (From), Get_Elem (To));
- 
-             when Record_Component =>
-                declare
-                   Comp_From : Perm_Tree_Access;
-                   Key_From : Perm_Tree_Maps.Key_Option;
-                   Son : Perm_Tree_Access;
-                   Hash_Table : Perm_Tree_Maps.Instance;
-                begin
-                --  We put a new hash table, so that it gets dealiased from the
-                --  Component (From) hash table.
-                   To.all.Tree.Component := Hash_Table;
-                   To.all.Tree.Other_Components :=
-                     new Perm_Tree_Wrapper'(Other_Components (From).all);
-                   Copy_Tree (Other_Components (From), Other_Components (To));
-                   Key_From := Perm_Tree_Maps.Get_First_Key
-                     (Component (From));
- 
-                   while Key_From.Present loop
-                      Comp_From := Perm_Tree_Maps.Get
-                        (Component (From), Key_From.K);
-                      pragma Assert (Comp_From /= null);
-                      Son := new Perm_Tree_Wrapper;
-                      Copy_Tree (Comp_From, Son);
-                      Perm_Tree_Maps.Set
-                        (To.all.Tree.Component, Key_From.K, Son);
-                      Key_From := Perm_Tree_Maps.Get_Next_Key
-                        (Component (From));
-                   end loop;
-                end;
-          end case;
- 
-       end Copy_Tree;
- 
-       ------------------------------
-       -- Elaboration_Context_Hash --
-       ------------------------------
- 
-       function Elaboration_Context_Hash
-         (Key : Entity_Id) return Elaboration_Context_Index
-       is
-       begin
-          return Elaboration_Context_Index (Key mod Elaboration_Context_Max);
-       end Elaboration_Context_Hash;
- 
-       --------------
-       -- Free_Env --
-       --------------
- 
-       procedure Free_Env (PE : in out Perm_Env) is
-          CompO : Perm_Tree_Access;
-       begin
-          CompO := Get_First (PE);
-          while CompO /= null loop
-             Free_Perm_Tree (CompO);
-             CompO := Get_Next (PE);
-          end loop;
-       end Free_Env;
- 
-       --------------------
-       -- Free_Perm_Tree --
-       --------------------
- 
-       procedure Free_Perm_Tree (PT : in out Perm_Tree_Access) is
-          procedure Free_Perm_Tree_Dealloc is
-            new Ada.Unchecked_Deallocation
-              (Perm_Tree_Wrapper, Perm_Tree_Access);
-          --  The deallocator for permission_trees
- 
-       begin
-          case Kind (PT) is
-             when Entire_Object =>
-                Free_Perm_Tree_Dealloc (PT);
- 
-             when Reference =>
-                Free_Perm_Tree (PT.all.Tree.Get_All);
-                Free_Perm_Tree_Dealloc (PT);
- 
-             when Array_Component =>
-                Free_Perm_Tree (PT.all.Tree.Get_Elem);
- 
-             when Record_Component =>
-                declare
-                   Comp : Perm_Tree_Access;
- 
-                begin
-                   Free_Perm_Tree (PT.all.Tree.Other_Components);
-                   Comp := Perm_Tree_Maps.Get_First (Component (PT));
-                   while Comp /= null loop
- 
-                      --  Free every Component subtree
- 
-                      Free_Perm_Tree (Comp);
-                      Comp := Perm_Tree_Maps.Get_Next (Component (PT));
-                   end loop;
-                end;
-                Free_Perm_Tree_Dealloc (PT);
-          end case;
-       end Free_Perm_Tree;
- 
-       -------------
-       -- Get_All --
-       -------------
- 
-       function Get_All (T : Perm_Tree_Access) return Perm_Tree_Access is
-       begin
-          return T.all.Tree.Get_All;
-       end Get_All;
- 
-       --------------
-       -- Get_Elem --
-       --------------
- 
-       function Get_Elem (T : Perm_Tree_Access) return Perm_Tree_Access is
-       begin
-          return T.all.Tree.Get_Elem;
-       end Get_Elem;
- 
-       ------------------
-       -- Is_Node_Deep --
-       ------------------
- 
-       function Is_Node_Deep (T : Perm_Tree_Access) return Boolean is
-       begin
-          return T.all.Tree.Is_Node_Deep;
-       end Is_Node_Deep;
- 
-       ----------
-       -- Kind --
-       ----------
- 
-       function Kind (T : Perm_Tree_Access) return Path_Kind is
-       begin
-          return T.all.Tree.Kind;
-       end Kind;
- 
-       ----------------------
-       -- Other_Components --
-       ----------------------
- 
-       function Other_Components
-         (T : Perm_Tree_Access)
-          return Perm_Tree_Access
-       is
-       begin
-          return T.all.Tree.Other_Components;
-       end Other_Components;
- 
-       ----------------
-       -- Permission --
-       ----------------
- 
-       function Permission (T : Perm_Tree_Access) return Perm_Kind is
-       begin
-          return T.all.Tree.Permission;
-       end Permission;
- 
-       -------------------
-       -- Perm_Mismatch --
-       -------------------
- 
-       procedure Perm_Mismatch (Exp_Perm, Act_Perm : Perm_Kind; N : Node_Id) is
-       begin
-          Error_Msg_N ("\expected state `"
-                       & Perm_Kind'Image (Exp_Perm) & "` at least, got `"
-                       & Perm_Kind'Image (Act_Perm) & "`", N);
-       end Perm_Mismatch;
- 
-    end Permissions;
- 
-    use Permissions;
- 
-    --------------------------------------
-    -- Analysis modes for AST traversal --
-    --------------------------------------
- 
-    --  The different modes for analysis. This allows to checking whether a path
-    --  found in the code should be moved, borrowed, or observed.
- 
-    type Checking_Mode is
- 
-      (Read,
-       --  Default mode
- 
-       Move,
-       --  Regular moving semantics. Checks that paths have Unrestricted
-       --  permission. After moving a path, the permission of both it and
-       --  its extensions are set to Unrestricted.
- 
-       Assign,
-       --  Used for the target of an assignment, or an actual parameter with
-       --  mode OUT. Checks that paths have Unrestricted permission. After
-       --  assigning to a path, its permission is set to Unrestricted.
- 
-       Borrow,
-       --  Used for the source of an assignement when initializes a stand alone
-       --  object of anonymous type, constant, or IN parameter and also OUT
-       --  or IN OUT composite object.
-       --  In the borrowed state, the access object is completely "dead".
- 
-       Observe
-       --  Used for actual IN parameters of a scalar type. Checks that paths
-       --  have Read_Perm permission. After checking a path, its permission
-       --  is set to Observed.
-       --
-       --  Also used for formal IN parameters
- 
-      );
- 
-    type Result_Kind is (Folded, Unfolded, Function_Call);
-    --  The type declaration to discriminate in the Perm_Or_Tree type
- 
-    --  The result type of the function Get_Perm_Or_Tree. This returns either a
-    --  tree when it found the appropriate tree, or a permission when the search
-    --  finds a leaf and the subtree we are looking for is folded. In the last
-    --  case, we return instead the Children_Permission field of the leaf.
- 
-    type Perm_Or_Tree (R : Result_Kind) is record
-       case R is
-          when Folded        => Found_Permission : Perm_Kind;
-          when Unfolded      => Tree_Access : Perm_Tree_Access;
-          when Function_Call => null;
-       end case;
-    end record;
- 
-    -----------------------
-    -- Local subprograms --
-    -----------------------
- 
-    --  Checking proceduress for safe pointer usage. These procedures traverse
-    --  the AST, check nodes for correct permissions according to SPARK RM
-    --  6.4.2, and update permissions depending on the node kind.
- 
-    procedure Check_Call_Statement (Call : Node_Id);
- 
-    procedure Check_Callable_Body (Body_N : Node_Id);
-    --  We are not in End_Of_Callee mode, hence we will save the environment
-    --  and start from a new one. We will add in the environment all formal
-    --  parameters as well as global used during the subprogram, with the
-    --  appropriate permissions (unrestricted for borrowed and moved, observed
-    --  for observed names).
- 
-    procedure Check_Declaration (Decl : Node_Id);
- 
-    procedure Check_Expression (Expr : Node_Id);
- 
-    procedure Check_Globals (N : Node_Id);
-    --  This procedure takes a global pragma and checks it
- 
-    procedure Check_List (L : List_Id);
-    --  Calls Check_Node on each element of the list
- 
-    procedure Check_Loop_Statement (Loop_N : Node_Id);
- 
-    procedure Check_Node (N : Node_Id);
-    --  Main traversal procedure to check safe pointer usage. This procedure is
-    --  mutually recursive with the specialized procedures that follow.
- 
-    procedure Check_Package_Body (Pack : Node_Id);
- 
-    procedure Check_Param_In (Formal : Entity_Id; Actual : Node_Id);
-    --  This procedure takes a formal and an actual parameter and checks the
-    --  permission of every in-mode parameter. This includes Observing and
-    --  Borrowing.
- 
-    procedure Check_Param_Out (Formal : Entity_Id; Actual : Node_Id);
-    --  This procedure takes a formal and an actual parameter and checks the
-    --  state of every out-mode and in out-mode parameter. This includes
-    --  Moving and Borrowing.
- 
-    procedure Check_Statement (Stmt : Node_Id);
- 
-    function Get_Perm (N : Node_Id) return Perm_Kind;
-    --  The function that takes a name as input and returns a permission
-    --  associated to it.
- 
-    function Get_Perm_Or_Tree (N : Node_Id) return Perm_Or_Tree;
-    --  This function gets a Node_Id and looks recursively to find the
-    --  appropriate subtree for that Node_Id. If the tree is folded on
-    --  that node, then it returns the permission given at the right level.
- 
-    function Get_Perm_Tree (N : Node_Id) return Perm_Tree_Access;
-    --  This function gets a Node_Id and looks recursively to find the
-    --  appropriate subtree for that Node_Id. If the tree is folded, then
-    --  it unrolls the tree up to the appropriate level.
- 
-    procedure Hp (P : Perm_Env);
-    --  A procedure that outputs the hash table. This function is used only in
-    --  the debugger to look into a hash table.
-    pragma Unreferenced (Hp);
- 
-    procedure Illegal_Global_Usage (N : Node_Or_Entity_Id);
-    pragma No_Return (Illegal_Global_Usage);
-    --  A procedure that is called when deep globals or aliased globals are used
-    --  without any global aspect.
- 
-    function Is_Deep (E : Entity_Id) return Boolean;
-    --  A function that can tell if a type is deep or not. Returns true if the
-    --  type passed as argument is deep.
- 
-    procedure Perm_Error
-      (N          : Node_Id;
-       Perm       : Perm_Kind;
-       Found_Perm : Perm_Kind);
-    --  A procedure that is called when the permissions found contradict the
-    --  rules established by the RM. This function is called with the node, its
-    --  entity and the permission that was expected, and adds an error message
-    --  with the appropriate values.
- 
-    procedure Perm_Error_Subprogram_End
-      (E          : Entity_Id;
-       Subp       : Entity_Id;
-       Perm       : Perm_Kind;
-       Found_Perm : Perm_Kind);
-    --  A procedure that is called when the permissions found contradict the
-    --  rules established by the RM at the end of subprograms. This function
-    --  is called with the node, its entity, the node of the returning function
-    --  and the permission that was expected, and adds an error message with the
-    --  appropriate values.
- 
-    procedure Process_Path (N : Node_Id);
- 
-    procedure Return_Declarations (L : List_Id);
-    --  Check correct permissions on every declared object at the end of a
-    --  callee. Used at the end of the body of a callable entity. Checks that
-    --  paths of all borrowed formal parameters and global have Unrestricted
-    --  permission.
- 
-    procedure Return_Globals (Subp : Entity_Id);
-    --  Takes a subprogram as input, and checks that all borrowed global items
-    --  of the subprogram indeed have RW permission at the end of the subprogram
-    --  execution.
- 
-    procedure Return_The_Global
-      (Id   : Entity_Id;
-       Mode : Formal_Kind;
-       Subp : Entity_Id);
-    --  Auxiliary procedure to Return_Globals
-    --  There is no need to return parameters because they will be reassigned
-    --  their state once the subprogram returns. Local variables that have
-    --  borrowed, observed, or moved an actual parameter go out of the scope.
- 
-    procedure Set_Perm_Extensions (T : Perm_Tree_Access; P : Perm_Kind);
-    --  This procedure takes an access to a permission tree and modifies the
-    --  tree so that any strict extensions of the given tree become of the
-    --  access specified by parameter P.
- 
-    function Set_Perm_Prefixes_Borrow (N : Node_Id) return Perm_Tree_Access;
-    --  This function modifies the permissions of a given node_id in the
-    --  permission environment as well as in all the prefixes of the path,
-    --  given that the path is borrowed with mode out.
- 
-    function Set_Perm_Prefixes
-      (N        : Node_Id;
-       New_Perm : Perm_Kind)
-       return Perm_Tree_Access;
-    --  This function sets the permissions of a given node_id in the
-    --  permission environment as well as in all the prefixes of the path
-    --  to the one given in parameter (P).
- 
-    procedure Setup_Globals (Subp : Entity_Id);
-    --  Takes a subprogram as input, and sets up the environment by adding
-    --  global items with appropriate permissions.
- 
-    procedure Setup_Parameter_Or_Global
-      (Id         : Entity_Id;
-       Mode       : Formal_Kind;
-       Global_Var : Boolean);
-    --  Auxiliary procedure to Setup_Parameters and Setup_Globals
- 
-    procedure Setup_Parameters (Subp : Entity_Id);
-    --  Takes a subprogram as input, and sets up the environment by adding
-    --  formal parameters with appropriate permissions.
- 
-    function Has_Ownership_Aspect_True
-      (N   : Node_Id;
-       Msg : String)
-       return Boolean;
-    --  Takes a node as an input, and finds out whether it has ownership aspect
-    --  True or False. This function is recursive whenever the node has a
-    --  composite type. Access-to-objects have ownership aspect False if they
-    --  have a general access type.
- 
-    ----------------------
-    -- Global Variables --
-    ----------------------
- 
-    Current_Perm_Env : Perm_Env;
-    --  The permission environment that is used for the analysis. This
-    --  environment can be saved, modified, reinitialized, but should be the
-    --  only one valid from which to extract the permissions of the paths in
-    --  scope. The analysis ensures at each point that this variables contains
-    --  a valid permission environment with all bindings in scope.
- 
-    Current_Checking_Mode : Checking_Mode := Read;
-    --  The current analysis mode. This global variable indicates at each point
-    --  of the analysis whether the node being analyzed is moved, borrowed,
-    --  assigned, read, ... The full list of possible values can be found in
-    --  the declaration of type Checking_Mode.
- 
-    Current_Loops_Envs : Env_Backups;
-    --  This variable contains saves of permission environments at each loop the
-    --  analysis entered. Each saved environment can be reached with the label
-    --  of the loop.
- 
-    Current_Loops_Accumulators : Env_Backups;
-    --  This variable contains the environments used as accumulators for loops,
-    --  that consist of the merge of all environments at each exit point of
-    --  the loop (which can also be the entry point of the loop in the case of
-    --  non-infinite loops), each of them reachable from the label of the loop.
-    --  We require that the environment stored in the accumulator be less
-    --  restrictive than the saved environment at the beginning of the loop, and
-    --  the permission environment after the loop is equal to the accumulator.
- 
-    Current_Initialization_Map : Initialization_Map;
-    --  This variable contains a map that binds each variable of the analyzed
-    --  source code to a boolean that becomes true whenever the variable is used
-    --  after declaration. Hence we can exclude from analysis variables that
-    --  are just declared and never accessed, typically at package declaration.
- 
-    --------------------------
-    -- Check_Call_Statement --
-    --------------------------
- 
-    procedure Check_Call_Statement (Call : Node_Id) is
-       Saved_Env : Perm_Env;
- 
-       procedure Iterate_Call_In is new
-         Iterate_Call_Parameters (Check_Param_In);
-       procedure Iterate_Call_Out is new
-         Iterate_Call_Parameters (Check_Param_Out);
- 
-    begin
-       --  Save environment, so that the modifications done by analyzing the
-       --  parameters are not kept at the end of the call.
- 
-       Copy_Env (Current_Perm_Env, Saved_Env);
- 
-       --  We first check the globals then parameters to handle the
-       --  No_Parameter_Aliasing Restriction. An out or in-out global is
-       --  considered as borrowing while a parameter with the same mode is
-       --  a move. This order disallow passing a part of a variable to a
-       --  subprogram if it is referenced as a global by the callable (when
-       --  writable).
-       --  For paremeters, we fisrt check in parameters and then the out ones.
-       --  This is to avoid Observing or Borrowing objects that are already
-       --  moved. This order is not mandatory but allows to catch runtime
-       --  errors like null pointer dereferencement at the analysis time.
- 
-       Current_Checking_Mode := Read;
-       Check_Globals (Get_Pragma (Get_Called_Entity (Call), Pragma_Global));
-       Iterate_Call_In (Call);
-       Iterate_Call_Out (Call);
- 
-       --  Restore environment, because after borrowing/observing actual
-       --  parameters, they get their permission reverted to the ones before
-       --  the call.
- 
-       Free_Env (Current_Perm_Env);
-       Copy_Env (Saved_Env, Current_Perm_Env);
-       Free_Env (Saved_Env);
-    end Check_Call_Statement;
- 
-    -------------------------
-    -- Check_Callable_Body --
-    -------------------------
- 
-    procedure Check_Callable_Body (Body_N : Node_Id) is
- 
-       Mode_Before    : constant Checking_Mode := Current_Checking_Mode;
-       Saved_Env      : Perm_Env;
-       Saved_Init_Map : Initialization_Map;
-       New_Env        : Perm_Env;
-       Body_Id        : constant Entity_Id := Defining_Entity (Body_N);
-       Spec_Id        : constant Entity_Id := Unique_Entity (Body_Id);
- 
-    begin
-       --  Check if SPARK pragma is not set to Off
- 
-       if Present (SPARK_Pragma (Defining_Entity (Body_N))) then
-          if Get_SPARK_Mode_From_Annotation
-            (SPARK_Pragma (Defining_Entity (Body_N))) /= Opt.On
-          then
-             return;
-          end if;
-       else
-          return;
-       end if;
- 
-       --  Save environment and put a new one in place
- 
-       Copy_Env (Current_Perm_Env, Saved_Env);
- 
-       --  Save initialization map
- 
-       Copy_Init_Map (Current_Initialization_Map, Saved_Init_Map);
-       Current_Checking_Mode := Read;
-       Current_Perm_Env      := New_Env;
- 
-       --  Add formals and globals to the environment with adequate permissions
- 
-       if Is_Subprogram_Or_Entry (Spec_Id) then
-          Setup_Parameters (Spec_Id);
-          Setup_Globals (Spec_Id);
-       end if;
- 
-       --  Analyze the body of the function
- 
-       Check_List (Declarations (Body_N));
-       Check_Node (Handled_Statement_Sequence (Body_N));
- 
-       --  Check the read-write permissions of borrowed parameters/globals
- 
-       if Ekind_In (Spec_Id, E_Procedure, E_Entry)
-         and then not No_Return (Spec_Id)
-       then
-          Return_Globals (Spec_Id);
-       end if;
- 
-       --  Free the environments
- 
-       Free_Env (Current_Perm_Env);
-       Copy_Env (Saved_Env, Current_Perm_Env);
-       Free_Env (Saved_Env);
- 
-       --  Restore initialization map
- 
-       Copy_Init_Map (Saved_Init_Map, Current_Initialization_Map);
-       Reset (Saved_Init_Map);
- 
-       --  The assignment of all out parameters will be done by caller
- 
-       Current_Checking_Mode := Mode_Before;
-    end Check_Callable_Body;
- 
-    -----------------------
-    -- Check_Declaration --
-    -----------------------
- 
-    procedure Check_Declaration (Decl : Node_Id) is
-       Target_Ent : constant Entity_Id := Defining_Identifier (Decl);
-       Target_Typ : Node_Id renames Etype (Target_Ent);
- 
-       Target_View_Typ : Entity_Id;
- 
-       Check : Boolean := True;
-    begin
-       if Present (Full_View (Target_Typ)) then
-          Target_View_Typ := Full_View (Target_Typ);
-       else
-          Target_View_Typ := Target_Typ;
-       end if;
- 
-       case N_Declaration'(Nkind (Decl)) is
-          when N_Full_Type_Declaration =>
-             if not Has_Ownership_Aspect_True (Target_Ent, "type declaration")
-             then
-                Check := False;
-             end if;
- 
-             --  ??? What about component declarations with defaults.
- 
-          when N_Object_Declaration =>
-             if (Is_Access_Type (Target_View_Typ)
-                 or else Is_Deep (Target_Typ))
-               and then not Has_Ownership_Aspect_True
-                 (Target_Ent, "Object declaration ")
-             then
-                Check := False;
-             end if;
- 
-             if Is_Anonymous_Access_Type (Target_View_Typ)
-               and then not Present (Expression (Decl))
-             then
- 
-                --  ??? Check the case of default value (AI)
-                --  ??? How an anonymous access type can be with default exp?
- 
-                Error_Msg_NE ("? object declaration & has OAF (Anonymous "
-                             & "access-to-object with no initialization)",
-                             Decl, Target_Ent);
- 
-             --  If it it an initialization
- 
-             elsif Present (Expression (Decl)) and Check then
- 
-                --  Find out the operation to be done on the right-hand side
- 
-                --  Initializing object, access type
- 
-                if Is_Access_Type (Target_View_Typ) then
- 
-                   --  Initializing object, constant access type
- 
-                   if Is_Constant_Object (Target_Ent) then
- 
-                      --  Initializing object, constant access to variable type
- 
-                      if not Is_Access_Constant (Target_View_Typ) then
-                         Current_Checking_Mode := Borrow;
- 
-                      --  Initializing object, constant access to constant type
- 
-                      --  Initializing object,
-                      --  constant access to constant anonymous type.
- 
-                      elsif Is_Anonymous_Access_Type (Target_View_Typ) then
- 
-                         --  This is an object declaration so the target
-                         --  of the assignement is a stand-alone object.
- 
-                         Current_Checking_Mode := Observe;
- 
-                      --  Initializing object, constant access to constant
-                      --  named type.
- 
-                      else
-                            --  If named then it is a general access type
-                            --  Hence, Has_Ownership_Aspec_True is False.
- 
-                         raise Program_Error;
-                      end if;
- 
-                   --  Initializing object, variable access type
- 
-                   else
-                      --  Initializing object, variable access to variable type
- 
-                      if not Is_Access_Constant (Target_View_Typ) then
- 
-                         --  Initializing object, variable named access to
-                         --  variable type.
- 
-                         if not Is_Anonymous_Access_Type (Target_View_Typ) then
-                            Current_Checking_Mode := Move;
- 
-                         --  Initializing object, variable anonymous access to
-                         --  variable type.
- 
-                         else
-                            --  This is an object declaration so the target
-                            --  object of the assignement is a stand-alone
-                            --  object.
- 
-                            Current_Checking_Mode := Borrow;
-                         end if;
- 
-                      --  Initializing object, variable access to constant type
- 
-                      else
-                         --  Initializing object,
-                         --  variable named access to constant type.
- 
-                         if not Is_Anonymous_Access_Type (Target_View_Typ) then
-                            Error_Msg_N ("assignment not allowed, Ownership "
-                                         & "Aspect False (Anonymous Access "
-                                         & "Object)", Decl);
-                            Check := False;
- 
-                         --  Initializing object,
-                         --  variable anonymous access to constant type.
- 
-                         else
-                            --  This is an object declaration so the target
-                            --  of the assignement is a stand-alone object.
- 
-                            Current_Checking_Mode := Observe;
-                         end if;
-                      end if;
-                   end if;
- 
-                --  Initializing object, composite (deep) type
- 
-                elsif Is_Deep (Target_Typ) then
- 
-                   --  Initializing object, constant composite type
- 
-                   if Is_Constant_Object (Target_Ent) then
-                      Current_Checking_Mode := Observe;
- 
-                   --  Initializing object, variable composite type
- 
-                   else
- 
-                      --  Initializing object, variable anonymous composite type
- 
-                      if Nkind (Object_Definition (Decl)) =
-                        N_Constrained_Array_Definition
- 
-                      --  An N_Constrained_Array_Definition is an anonymous
-                      --  array (to be checked). Record types are always
-                      --  named and are considered in the else part.
- 
-                      then
-                         declare
-                            Com_Ty : constant Node_Id :=
-                              Component_Type (Etype (Target_Typ));
-                         begin
- 
-                            if Is_Access_Type (Com_Ty) then
- 
-                               --  If components are of anonymous type
- 
-                               if Is_Anonymous_Access_Type (Com_Ty) then
-                                  if Is_Access_Constant (Com_Ty) then
-                                     Current_Checking_Mode := Observe;
- 
-                                  else
-                                     Current_Checking_Mode := Borrow;
-                                  end if;
- 
-                               else
-                                  Current_Checking_Mode := Move;
-                               end if;
- 
-                            elsif Is_Deep (Com_Ty) then
- 
-                               --  This is certainly named so it is a move
- 
-                               Current_Checking_Mode := Move;
-                            end if;
-                         end;
- 
-                      else
-                         Current_Checking_Mode := Move;
-                      end if;
-                   end if;
- 
-                end if;
-             end if;
- 
-             if Check then
-                Check_Node (Expression (Decl));
-             end if;
- 
-             --  If lhs is not a pointer, we still give it the unrestricted
-             --  state which is useless but not harmful.
- 
-             declare
-                Elem : Perm_Tree_Access;
-                Deep : constant Boolean := Is_Deep (Target_Typ);
- 
-             begin
-                --  Note that all declared variables are set to the unrestricted
-                --  state.
-                --
-                --  If variables are not initialized:
-                --  unrestricted to every declared object.
-                --  Exp:
-                --    R : Rec
-                --    S : Rec := (...)
-                --    R := S
-                --  The assignement R := S is not allowed in the new rules
-                --  if R is not unrestricted.
-                --
-                --  If variables are initialized:
-                --    If it is a move, then the target is unrestricted
-                --    If it is a borrow, then the target is unrestricted
-                --    If it is an observe, then the target should be observed
- 
-                if Current_Checking_Mode = Observe then
-                   Elem := new Perm_Tree_Wrapper'
-                     (Tree =>
-                        (Kind                => Entire_Object,
-                         Is_Node_Deep        => Deep,
-                         Permission          => Observed,
-                         Children_Permission => Observed));
-                else
-                   Elem := new Perm_Tree_Wrapper'
-                     (Tree =>
-                        (Kind                => Entire_Object,
-                         Is_Node_Deep        => Deep,
-                         Permission          => Unrestricted,
-                         Children_Permission => Unrestricted));
-                end if;
- 
-                --  Create new tree for defining identifier
- 
-                Set (Current_Perm_Env,
-                     Unique_Entity (Defining_Identifier (Decl)),
-                     Elem);
-                pragma Assert (Get_First (Current_Perm_Env) /= null);
-             end;
- 
-          when N_Subtype_Declaration =>
-             Check_Node (Subtype_Indication (Decl));
- 
-          when N_Iterator_Specification =>
-             null;
- 
-          when N_Loop_Parameter_Specification =>
-             null;
- 
-          --  Checking should not be called directly on these nodes
- 
-          when N_Function_Specification
-             | N_Entry_Declaration
-             | N_Procedure_Specification
-             | N_Component_Declaration
-          =>
-             raise Program_Error;
- 
-          --  Ignored constructs for pointer checking
- 
-          when N_Formal_Object_Declaration
-             | N_Formal_Type_Declaration
-             | N_Incomplete_Type_Declaration
-             | N_Private_Extension_Declaration
-             | N_Private_Type_Declaration
-             | N_Protected_Type_Declaration
-          =>
-             null;
- 
-          --  The following nodes are rewritten by semantic analysis
- 
-          when N_Expression_Function =>
-             raise Program_Error;
-       end case;
-    end Check_Declaration;
- 
-    ----------------------
-    -- Check_Expression --
-    ----------------------
- 
-    procedure Check_Expression (Expr : Node_Id) is
-       Mode_Before : constant Checking_Mode := Current_Checking_Mode;
-    begin
-       case N_Subexpr'(Nkind (Expr)) is
-          when N_Procedure_Call_Statement
-             | N_Function_Call
-          =>
-             Check_Call_Statement (Expr);
- 
-          when N_Identifier
-             | N_Expanded_Name
-          =>
-             --  Check if identifier is pointing to nothing (On/Off/...)
- 
-             if not Present (Entity (Expr)) then
-                return;
-             end if;
- 
-             --  Do not analyze things that are not of object Kind
- 
-             if Ekind (Entity (Expr)) not in Object_Kind then
-                return;
-             end if;
- 
-             --  Consider as ident
- 
-             Process_Path (Expr);
- 
-          --  Switch to read mode and then check the readability of each operand
- 
-          when N_Binary_Op =>
-             Current_Checking_Mode := Read;
-             Check_Node (Left_Opnd (Expr));
-             Check_Node (Right_Opnd (Expr));
- 
-          --  Switch to read mode and then check the readability of each operand
- 
-          when N_Op_Abs
-             | N_Op_Minus
-             | N_Op_Not
-             | N_Op_Plus
-          =>
-             Current_Checking_Mode := Read;
-             Check_Node (Right_Opnd (Expr));
- 
-          --  Forbid all deep expressions for Attribute ???
-          --  What about generics? (formal parameters).
- 
-          when N_Attribute_Reference =>
-             case Attribute_Name (Expr) is
-                when Name_Access =>
-                   Error_Msg_N ("access attribute not allowed", Expr);
- 
-                when Name_Last
-                   | Name_First
-                =>
-                   Current_Checking_Mode := Read;
-                   Check_Node (Prefix (Expr));
- 
-                when Name_Min =>
-                   Current_Checking_Mode := Read;
-                   Check_Node (Prefix (Expr));
- 
-                when Name_Image =>
-                   Check_List (Expressions (Expr));
- 
-                when Name_Img =>
-                   Check_Node (Prefix (Expr));
- 
-                when Name_SPARK_Mode =>
-                   null;
- 
-                when Name_Value =>
-                   Current_Checking_Mode := Read;
-                   Check_Node (Prefix (Expr));
- 
-                when Name_Update =>
-                   Check_List (Expressions (Expr));
-                   Check_Node (Prefix (Expr));
- 
-                when Name_Pred
-                   | Name_Succ
-                =>
-                   Check_List (Expressions (Expr));
-                   Check_Node (Prefix (Expr));
- 
-                when Name_Length =>
-                   Current_Checking_Mode := Read;
-                   Check_Node (Prefix (Expr));
- 
-                --  Any Attribute referring to the underlying memory is ignored
-                --  in the analysis. This means that taking the address of a
-                --  variable makes a silent alias that is not rejected by the
-                --  analysis.
- 
-                when Name_Address
-                   | Name_Alignment
-                   | Name_Component_Size
-                   | Name_First_Bit
-                   | Name_Last_Bit
-                   | Name_Size
-                   | Name_Position
-                =>
-                   null;
- 
-                --  Attributes referring to types (get values from types), hence
-                --  no need to check either for borrows or any loans.
- 
-                when Name_Base
-                   | Name_Val
-                =>
-                   null;
-                --  Other attributes that fall out of the scope of the analysis
- 
-                when others =>
-                   null;
-             end case;
- 
-          when N_In =>
-             Current_Checking_Mode := Read;
-             Check_Node (Left_Opnd (Expr));
-             Check_Node (Right_Opnd (Expr));
- 
-          when N_Not_In =>
-             Current_Checking_Mode := Read;
-             Check_Node (Left_Opnd (Expr));
-             Check_Node (Right_Opnd (Expr));
- 
-          --  Switch to read mode and then check the readability of each operand
- 
-          when N_And_Then
-             | N_Or_Else
-          =>
-             Current_Checking_Mode := Read;
-             Check_Node (Left_Opnd (Expr));
-             Check_Node (Right_Opnd (Expr));
- 
-          --  Check the arguments of the call
- 
-          when N_Explicit_Dereference =>
-             Process_Path (Expr);
- 
-          --  Copy environment, run on each branch, and then merge
- 
-          when N_If_Expression =>
-             declare
-                Saved_Env : Perm_Env;
- 
-                --  Accumulator for the different branches
- 
-                New_Env : Perm_Env;
-                Elmt    : Node_Id := First (Expressions (Expr));
- 
-             begin
-                Current_Checking_Mode := Read;
-                Check_Node (Elmt);
-                Current_Checking_Mode := Mode_Before;
- 
-                --  Save environment
- 
-                Copy_Env (Current_Perm_Env, Saved_Env);
- 
-                --  Here we have the original env in saved, current with a fresh
-                --  copy, and new aliased.
- 
-                --  THEN PART
- 
-                Next (Elmt);
-                Check_Node (Elmt);
- 
-                --  Here the new_environment contains curr env after then block
- 
-                --  ELSE part
-                --  Restore environment before if
-                Copy_Env (Current_Perm_Env, New_Env);
-                Free_Env (Current_Perm_Env);
-                Copy_Env (Saved_Env, Current_Perm_Env);
- 
-                --  Here new environment contains the environment after then and
-                --  current the fresh copy of old one.
- 
-                Next (Elmt);
-                Check_Node (Elmt);
- 
-                --  CLEANUP
- 
-                Copy_Env (New_Env, Current_Perm_Env);
-                Free_Env (New_Env);
-                Free_Env (Saved_Env);
-             end;
- 
-          when N_Indexed_Component =>
-             Process_Path (Expr);
- 
-          --  Analyze the expression that is getting qualified
- 
-          when N_Qualified_Expression =>
-             Check_Node (Expression (Expr));
- 
-          when N_Quantified_Expression =>
-             declare
-                Saved_Env : Perm_Env;
- 
-             begin
-                Copy_Env (Current_Perm_Env, Saved_Env);
-                Current_Checking_Mode := Read;
-                Check_Node (Iterator_Specification (Expr));
-                Check_Node (Loop_Parameter_Specification (Expr));
- 
-                Check_Node (Condition (Expr));
-                Free_Env (Current_Perm_Env);
-                Copy_Env (Saved_Env, Current_Perm_Env);
-                Free_Env (Saved_Env);
-             end;
-          --  Analyze the list of associations in the aggregate
- 
-          when N_Aggregate =>
-             Check_List (Expressions (Expr));
-             Check_List (Component_Associations (Expr));
- 
-          when N_Allocator =>
-             Check_Node (Expression (Expr));
- 
-          when N_Case_Expression =>
-             declare
-                Saved_Env : Perm_Env;
- 
-                --  Accumulator for the different branches
- 
-                New_Env : Perm_Env;
-                Elmt : Node_Id := First (Alternatives (Expr));
- 
-             begin
-                Current_Checking_Mode := Read;
-                Check_Node (Expression (Expr));
-                Current_Checking_Mode := Mode_Before;
- 
-                --  Save environment
- 
-                Copy_Env (Current_Perm_Env, Saved_Env);
- 
-                --  Here we have the original env in saved, current with a fresh
-                --  copy, and new aliased.
- 
-                --  First alternative
- 
-                Check_Node (Elmt);
-                Next (Elmt);
-                Copy_Env (Current_Perm_Env, New_Env);
-                Free_Env (Current_Perm_Env);
- 
-                --  Other alternatives
- 
-                while Present (Elmt) loop
- 
-                   --  Restore environment
- 
-                   Copy_Env (Saved_Env, Current_Perm_Env);
-                   Check_Node (Elmt);
-                   Next (Elmt);
-                end loop;
-                --  CLEANUP
- 
-                Copy_Env (Saved_Env, Current_Perm_Env);
-                Free_Env (New_Env);
-                Free_Env (Saved_Env);
-             end;
-          --  Analyze the list of associates in the aggregate as well as the
-          --  ancestor part.
- 
-          when N_Extension_Aggregate =>
-             Check_Node (Ancestor_Part (Expr));
-             Check_List (Expressions (Expr));
- 
-          when N_Range =>
-             Check_Node (Low_Bound (Expr));
-             Check_Node (High_Bound (Expr));
- 
-          --  We arrived at a path. Process it.
- 
-          when N_Selected_Component =>
-             Process_Path (Expr);
- 
-          when N_Slice =>
-             Process_Path (Expr);
- 
-          when N_Type_Conversion =>
-             Check_Node (Expression (Expr));
- 
-          when N_Unchecked_Type_Conversion =>
-             Check_Node (Expression (Expr));
- 
-          --  Checking should not be called directly on these nodes
- 
-          when N_Target_Name =>
-             raise Program_Error;
- 
-          --  Unsupported constructs in SPARK
- 
-          when N_Delta_Aggregate =>
-             Error_Msg_N ("unsupported construct in SPARK", Expr);
- 
-          --  Ignored constructs for pointer checking
- 
-          when N_Character_Literal
-             | N_Null
-             | N_Numeric_Or_String_Literal
-             | N_Operator_Symbol
-             | N_Raise_Expression
-             | N_Raise_xxx_Error
-          =>
-             null;
-          --  The following nodes are never generated in GNATprove mode
- 
-          when N_Expression_With_Actions
-             | N_Reference
-             | N_Unchecked_Expression
-          =>
-             raise Program_Error;
-       end case;
-    end Check_Expression;
- 
-    -------------------
-    -- Check_Globals --
-    -------------------
- 
-    procedure Check_Globals (N : Node_Id) is
-    begin
-       if Nkind (N) = N_Empty then
-          return;
-       end if;
- 
-       declare
-          pragma Assert (List_Length (Pragma_Argument_Associations (N)) = 1);
-          PAA : constant Node_Id := First (Pragma_Argument_Associations (N));
-          pragma Assert (Nkind (PAA) = N_Pragma_Argument_Association);
-          Row      : Node_Id;
-          The_Mode : Name_Id;
-          RHS      : Node_Id;
- 
-          procedure Process (Mode : Name_Id; The_Global : Entity_Id);
-          procedure Process (Mode : Name_Id; The_Global : Node_Id) is
-             Ident_Elt   : constant Entity_Id :=
-               Unique_Entity (Entity (The_Global));
-             Mode_Before : constant Checking_Mode := Current_Checking_Mode;
- 
-          begin
-             if Ekind (Ident_Elt) = E_Abstract_State then
-                return;
-             end if;
-             case Mode is
-                when Name_Input
-                   | Name_Proof_In
-                =>
-                   Current_Checking_Mode := Observe;
-                   Check_Node (The_Global);
- 
-                when Name_Output
-                   | Name_In_Out
-                =>
-                --  ??? Borrow not Move?
-                   Current_Checking_Mode := Borrow;
-                   Check_Node (The_Global);
- 
-                when others =>
-                   raise Program_Error;
-             end case;
-             Current_Checking_Mode := Mode_Before;
-          end Process;
- 
-       begin
-          if Nkind (Expression (PAA)) = N_Null then
- 
-             --  global => null
-             --  No globals, nothing to do
- 
-             return;
- 
-          elsif Nkind_In (Expression (PAA), N_Identifier, N_Expanded_Name) then
- 
-             --  global => foo
-             --  A single input
- 
-             Process (Name_Input, Expression (PAA));
- 
-          elsif Nkind (Expression (PAA)) = N_Aggregate
-            and then Expressions (Expression (PAA)) /= No_List
-          then
-             --  global => (foo, bar)
-             --  Inputs
- 
-             RHS := First (Expressions (Expression (PAA)));
-             while Present (RHS) loop
-                case Nkind (RHS) is
-                   when N_Identifier
-                      | N_Expanded_Name
-                   =>
-                      Process (Name_Input, RHS);
- 
-                   when N_Numeric_Or_String_Literal =>
-                      Process (Name_Input, Original_Node (RHS));
- 
-                   when others =>
-                      raise Program_Error;
-                end case;
-                RHS := Next (RHS);
-             end loop;
- 
-          elsif Nkind (Expression (PAA)) = N_Aggregate
-            and then Component_Associations (Expression (PAA)) /= No_List
-          then
-             --  global => (mode => foo,
-             --             mode => (bar, baz))
-             --  A mixture of things
- 
-             declare
-                CA : constant List_Id :=
-                  Component_Associations (Expression (PAA));
-             begin
-                Row := First (CA);
-                while Present (Row) loop
-                   pragma Assert (List_Length (Choices (Row)) = 1);
-                   The_Mode := Chars (First (Choices (Row)));
-                   RHS := Expression (Row);
- 
-                   case Nkind (RHS) is
-                      when N_Aggregate =>
-                         RHS := First (Expressions (RHS));
-                         while Present (RHS) loop
-                            case Nkind (RHS) is
-                               when N_Numeric_Or_String_Literal =>
-                                  Process (The_Mode, Original_Node (RHS));
- 
-                               when others =>
-                                  Process (The_Mode, RHS);
-                            end case;
-                            RHS := Next (RHS);
-                         end loop;
- 
-                      when N_Identifier
-                         | N_Expanded_Name
-                      =>
-                         Process (The_Mode, RHS);
- 
-                      when N_Null =>
-                         null;
- 
-                      when N_Numeric_Or_String_Literal =>
-                         Process (The_Mode, Original_Node (RHS));
- 
-                      when others =>
-                         raise Program_Error;
-                   end case;
-                   Row := Next (Row);
-                end loop;
-             end;
- 
-          else
-             raise Program_Error;
-          end if;
-       end;
-    end Check_Globals;
- 
-    ----------------
-    -- Check_List --
-    ----------------
- 
-    procedure Check_List (L : List_Id) is
-       N : Node_Id;
-    begin
-       N := First (L);
-       while Present (N) loop
-          Check_Node (N);
-          Next (N);
-       end loop;
-    end Check_List;
- 
-    --------------------------
-    -- Check_Loop_Statement --
-    --------------------------
- 
-    procedure Check_Loop_Statement (Loop_N : Node_Id) is
- 
-       --  Local variables
- 
-       Loop_Name : constant Entity_Id := Entity (Identifier (Loop_N));
-       Loop_Env  : constant Perm_Env_Access := new Perm_Env;
- 
-    begin
-       --  Save environment prior to the loop
- 
-       Copy_Env (From => Current_Perm_Env, To => Loop_Env.all);
- 
-       --  Add saved environment to loop environment
- 
-       Set (Current_Loops_Envs, Loop_Name, Loop_Env);
- 
-       --  If the loop is not a plain-loop, then it may either never be entered,
-       --  or it may be exited after a number of iterations. Hence add the
-       --  current permission environment as the initial loop exit environment.
-       --  Otherwise, the loop exit environment remains empty until it is
-       --  populated by analyzing exit statements.
- 
-       if Present (Iteration_Scheme (Loop_N)) then
-          declare
-             Exit_Env : constant Perm_Env_Access := new Perm_Env;
- 
-          begin
-             Copy_Env (From => Current_Perm_Env, To => Exit_Env.all);
-             Set (Current_Loops_Accumulators, Loop_Name, Exit_Env);
-          end;
-       end if;
- 
-       --  Analyze loop
- 
-       Check_Node (Iteration_Scheme (Loop_N));
-       Check_List (Statements (Loop_N));
- 
-       --  Set environment to the one for exiting the loop
- 
-       declare
-          Exit_Env : constant Perm_Env_Access :=
-            Get (Current_Loops_Accumulators, Loop_Name);
-       begin
-          Free_Env (Current_Perm_Env);
- 
-          --  In the normal case, Exit_Env is not null and we use it. In the
-          --  degraded case of a plain-loop without exit statements, Exit_Env is
-          --  null, and we use the initial permission environment at the start
-          --  of the loop to continue analysis. Any environment would be fine
-          --  here, since the code after the loop is dead code, but this way we
-          --  avoid spurious errors by having at least variables in scope inside
-          --  the environment.
- 
-          if Exit_Env /= null then
-             Copy_Env (From => Exit_Env.all, To => Current_Perm_Env);
-             Free_Env (Loop_Env.all);
-             Free_Env (Exit_Env.all);
-          else
-             Copy_Env (From => Loop_Env.all, To => Current_Perm_Env);
-             Free_Env (Loop_Env.all);
-          end if;
-       end;
-    end Check_Loop_Statement;
- 
-    ----------------
-    -- Check_Node --
-    ----------------
- 
-    procedure Check_Node (N : Node_Id) is
-       Mode_Before : constant Checking_Mode := Current_Checking_Mode;
-    begin
-       case Nkind (N) is
-          when N_Declaration =>
-             Check_Declaration (N);
- 
-          when N_Subexpr =>
-             Check_Expression (N);
- 
-          when N_Subtype_Indication =>
-             Check_Node (Constraint (N));
- 
-          when N_Body_Stub =>
-             Check_Node (Get_Body_From_Stub (N));
- 
-          when N_Statement_Other_Than_Procedure_Call =>
-             Check_Statement (N);
- 
-          when N_Package_Body =>
-             Check_Package_Body (N);
- 
-          when N_Subprogram_Body
-             | N_Entry_Body
-             | N_Task_Body
-          =>
-             Check_Callable_Body (N);
- 
-          when N_Protected_Body =>
-             Check_List (Declarations (N));
- 
-          when N_Package_Declaration =>
-             declare
-                Spec : constant Node_Id := Specification (N);
- 
-             begin
-                Current_Checking_Mode := Read;
-                Check_List (Visible_Declarations (Spec));
-                Check_List (Private_Declarations (Spec));
- 
-                Return_Declarations (Visible_Declarations (Spec));
-                Return_Declarations (Private_Declarations (Spec));
-             end;
- 
-          when N_Iteration_Scheme =>
-             Current_Checking_Mode := Read;
-             Check_Node (Condition (N));
-             Check_Node (Iterator_Specification (N));
-             Check_Node (Loop_Parameter_Specification (N));
- 
-          when N_Case_Expression_Alternative =>
-             Current_Checking_Mode := Read;
-             Check_List (Discrete_Choices (N));
-             Current_Checking_Mode := Mode_Before;
-             Check_Node (Expression (N));
- 
-          when N_Case_Statement_Alternative =>
-             Current_Checking_Mode := Read;
-             Check_List (Discrete_Choices (N));
-             Current_Checking_Mode := Mode_Before;
-             Check_List (Statements (N));
- 
-          when N_Component_Association =>
-             Check_Node (Expression (N));
- 
-          when N_Handled_Sequence_Of_Statements =>
-             Check_List (Statements (N));
- 
-          when N_Parameter_Association =>
-             Check_Node (Explicit_Actual_Parameter (N));
- 
-          when N_Range_Constraint =>
-             Check_Node (Range_Expression (N));
- 
-          when N_Index_Or_Discriminant_Constraint =>
-             Check_List (Constraints (N));
- 
-          --  Checking should not be called directly on these nodes
- 
-          when N_Abortable_Part
-             | N_Accept_Alternative
-             | N_Access_Definition
-             | N_Access_Function_Definition
-             | N_Access_Procedure_Definition
-             | N_Access_To_Object_Definition
-             | N_Aspect_Specification
-             | N_Compilation_Unit
-             | N_Compilation_Unit_Aux
-             | N_Component_Clause
-             | N_Component_Definition
-             | N_Component_List
-             | N_Constrained_Array_Definition
-             | N_Contract
-             | N_Decimal_Fixed_Point_Definition
-             | N_Defining_Character_Literal
-             | N_Defining_Identifier
-             | N_Defining_Operator_Symbol
-             | N_Defining_Program_Unit_Name
-             | N_Delay_Alternative
-             | N_Derived_Type_Definition
-             | N_Designator
-             | N_Discriminant_Specification
-             | N_Elsif_Part
-             | N_Entry_Body_Formal_Part
-             | N_Enumeration_Type_Definition
-             | N_Entry_Call_Alternative
-             | N_Entry_Index_Specification
-             | N_Error
-             | N_Exception_Handler
-             | N_Floating_Point_Definition
-             | N_Formal_Decimal_Fixed_Point_Definition
-             | N_Formal_Derived_Type_Definition
-             | N_Formal_Discrete_Type_Definition
-             | N_Formal_Floating_Point_Definition
-             | N_Formal_Incomplete_Type_Definition
-             | N_Formal_Modular_Type_Definition
-             | N_Formal_Ordinary_Fixed_Point_Definition
-             | N_Formal_Private_Type_Definition
-             | N_Formal_Signed_Integer_Type_Definition
-             | N_Generic_Association
-             | N_Mod_Clause
-             | N_Modular_Type_Definition
-             | N_Ordinary_Fixed_Point_Definition
-             | N_Package_Specification
-             | N_Parameter_Specification
-             | N_Pragma_Argument_Association
-             | N_Protected_Definition
-             | N_Push_Pop_xxx_Label
-             | N_Real_Range_Specification
-             | N_Record_Definition
-             | N_SCIL_Dispatch_Table_Tag_Init
-             | N_SCIL_Dispatching_Call
-             | N_SCIL_Membership_Test
-             | N_Signed_Integer_Type_Definition
-             | N_Subunit
-             | N_Task_Definition
-             | N_Terminate_Alternative
-             | N_Triggering_Alternative
-             | N_Unconstrained_Array_Definition
-             | N_Unused_At_Start
-             | N_Unused_At_End
-             | N_Variant
-             | N_Variant_Part
-          =>
-             raise Program_Error;
- 
-          --  Unsupported constructs in SPARK
- 
-          when N_Iterated_Component_Association =>
-             Error_Msg_N ("unsupported construct in SPARK", N);
- 
-          --  Ignored constructs for pointer checking
- 
-          when N_Abstract_Subprogram_Declaration
-             | N_At_Clause
-             | N_Attribute_Definition_Clause
-             | N_Call_Marker
-             | N_Delta_Constraint
-             | N_Digits_Constraint
-             | N_Empty
-             | N_Enumeration_Representation_Clause
-             | N_Exception_Declaration
-             | N_Exception_Renaming_Declaration
-             | N_Formal_Package_Declaration
-             | N_Formal_Subprogram_Declaration
-             | N_Freeze_Entity
-             | N_Freeze_Generic_Entity
-             | N_Function_Instantiation
-             | N_Generic_Function_Renaming_Declaration
-             | N_Generic_Package_Declaration
-             | N_Generic_Package_Renaming_Declaration
-             | N_Generic_Procedure_Renaming_Declaration
-             | N_Generic_Subprogram_Declaration
-             | N_Implicit_Label_Declaration
-             | N_Itype_Reference
-             | N_Label
-             | N_Number_Declaration
-             | N_Object_Renaming_Declaration
-             | N_Others_Choice
-             | N_Package_Instantiation
-             | N_Package_Renaming_Declaration
-             | N_Pragma
-             | N_Procedure_Instantiation
-             | N_Record_Representation_Clause
-             | N_Subprogram_Declaration
-             | N_Subprogram_Renaming_Declaration
-             | N_Task_Type_Declaration
-             | N_Use_Package_Clause
-             | N_With_Clause
-             | N_Use_Type_Clause
-             | N_Validate_Unchecked_Conversion
-             | N_Variable_Reference_Marker
-             | N_Discriminant_Association
- 
-             --  ??? check whether we should do sth special for
-             --  N_Discriminant_Association, or maybe raise a program error.
-          =>
-             null;
-          --  The following nodes are rewritten by semantic analysis
- 
-          when N_Single_Protected_Declaration
-             | N_Single_Task_Declaration
-          =>
-             raise Program_Error;
-       end case;
- 
-       Current_Checking_Mode := Mode_Before;
-    end Check_Node;
- 
-    ------------------------
-    -- Check_Package_Body --
-    ------------------------
- 
-    procedure Check_Package_Body (Pack : Node_Id) is
-       Saved_Env : Perm_Env;
-       CorSp : Node_Id;
- 
-    begin
-       if Present (SPARK_Pragma (Defining_Entity (Pack))) then
-          if Get_SPARK_Mode_From_Annotation
-            (SPARK_Pragma (Defining_Entity (Pack))) /= Opt.On
-          then
-             return;
-          end if;
-       else
-          return;
-       end if;
- 
-       CorSp := Parent (Corresponding_Spec (Pack));
-       while Nkind (CorSp) /= N_Package_Specification loop
-          CorSp := Parent (CorSp);
-       end loop;
- 
-       Check_List (Visible_Declarations (CorSp));
- 
-       --  Save environment
- 
-       Copy_Env (Current_Perm_Env, Saved_Env);
-       Check_List (Private_Declarations (CorSp));
- 
-       --  Set mode to Read, and then analyze declarations and statements
- 
-       Current_Checking_Mode := Read;
-       Check_List (Declarations (Pack));
-       Check_Node (Handled_Statement_Sequence (Pack));
- 
-       --  Check RW for every stateful variable (i.e. in declarations)
- 
-       Return_Declarations (Private_Declarations (CorSp));
-       Return_Declarations (Visible_Declarations (CorSp));
-       Return_Declarations (Declarations (Pack));
- 
-       --  Restore previous environment (i.e. delete every nonvisible
-       --  declaration) from environment.
- 
-       Free_Env (Current_Perm_Env);
-       Copy_Env (Saved_Env, Current_Perm_Env);
-    end Check_Package_Body;
- 
-    --------------------
-    -- Check_Param_In --
-    --------------------
- 
-    procedure Check_Param_In (Formal : Entity_Id; Actual : Node_Id) is
-       Mode : constant Entity_Kind := Ekind (Formal);
-       Mode_Before : constant Checking_Mode := Current_Checking_Mode;
-    begin
-       case Formal_Kind'(Mode) is
- 
-          --  Formal IN parameter
- 
-          when E_In_Parameter =>
- 
-             --  Formal IN parameter, access type
- 
-             if Is_Access_Type (Etype (Formal)) then
- 
-                --  Formal IN parameter, access to variable type
- 
-                if not Is_Access_Constant (Etype (Formal)) then
- 
-                   --  Formal IN parameter, named/anonymous access-to-variable
-                   --  type.
-                   --
-                   --  In SPARK, IN access-to-variable is an observe operation
-                   --  for a function, and a borrow operation for a procedure.
- 
-                   if Ekind (Scope (Formal)) = E_Function then
-                      Current_Checking_Mode := Observe;
-                      Check_Node (Actual);
-                   else
-                      Current_Checking_Mode := Borrow;
-                      Check_Node (Actual);
-                   end if;
- 
-                --  Formal IN parameter, access-to-constant type
-                --  Formal IN parameter, access-to-named-constant type
- 
-                elsif not Is_Anonymous_Access_Type (Etype (Formal)) then
-                   Error_Msg_N ("assignment not allowed, Ownership Aspect"
-                                & " False (Named general access type)",
-                                Formal);
- 
-                --  Formal IN parameter, access to anonymous constant type
- 
-                else
-                   Current_Checking_Mode := Observe;
-                   Check_Node (Actual);
-                end if;
- 
-             --  Formal IN parameter, composite type
- 
-             elsif Is_Deep (Etype (Formal)) then
- 
-                --  Composite formal types should be named
-                --  Formal IN parameter, composite named type
- 
-                Current_Checking_Mode := Observe;
-                Check_Node (Actual);
-             end if;
- 
-          when E_Out_Parameter
-             | E_In_Out_Parameter
-          =>
-             null;
-       end case;
- 
-       Current_Checking_Mode := Mode_Before;
-    end Check_Param_In;
- 
-    ----------------------
-    -- Check_Param_Out --
-    ----------------------
- 
-    procedure Check_Param_Out (Formal : Entity_Id; Actual : Node_Id) is
-       Mode        : constant Entity_Kind := Ekind (Formal);
-       Mode_Before : constant Checking_Mode := Current_Checking_Mode;
- 
-    begin
-       case Formal_Kind'(Mode) is
- 
-          --  Formal OUT/IN OUT parameter
- 
-          when E_Out_Parameter
-             | E_In_Out_Parameter
-          =>
- 
-             --  Formal OUT/IN OUT parameter, access type
- 
-             if Is_Access_Type (Etype (Formal)) then
- 
-                --  Formal OUT/IN OUT parameter, access to variable type
- 
-                if not Is_Access_Constant (Etype (Formal)) then
- 
-                   --  Cannot have anonymous out access parameter
-                   --  Formal out/in out parameter, access to named variable
-                   --  type.
- 
-                   Current_Checking_Mode := Move;
-                   Check_Node (Actual);
- 
-                --  Formal out/in out parameter, access to constant type
- 
-                else
-                   Error_Msg_N ("assignment not allowed, Ownership Aspect False"
-                                & " (Named general access type)", Formal);
- 
-                end if;
- 
-             --  Formal out/in out parameter, composite type
- 
-             elsif Is_Deep (Etype (Formal)) then
- 
-                --  Composite formal types should be named
-                --  Formal out/in out Parameter, Composite Named type.
- 
-                Current_Checking_Mode := Borrow;
-                Check_Node (Actual);
-             end if;
- 
-          when E_In_Parameter =>
-             null;
-       end case;
- 
-       Current_Checking_Mode := Mode_Before;
-    end Check_Param_Out;
- 
-    -------------------------
-    -- Check_Safe_Pointers --
-    -------------------------
- 
-    procedure Check_Safe_Pointers (N : Node_Id) is
- 
-       --  Local subprograms
- 
-       procedure Check_List (L : List_Id);
-       --  Call the main analysis procedure on each element of the list
- 
-       procedure Initialize;
-       --  Initialize global variables before starting the analysis of a body
- 
-       ----------------
-       -- Check_List --
-       ----------------
- 
-       procedure Check_List (L : List_Id) is
-          N : Node_Id;
-       begin
-          N := First (L);
-          while Present (N) loop
-             Check_Safe_Pointers (N);
-             Next (N);
-          end loop;
-       end Check_List;
- 
-       ----------------
-       -- Initialize --
-       ----------------
- 
-       procedure Initialize is
-       begin
-          Reset (Current_Loops_Envs);
-          Reset (Current_Loops_Accumulators);
-          Reset (Current_Perm_Env);
-          Reset (Current_Initialization_Map);
-       end Initialize;
- 
-       --  Local variables
- 
-       Prag : Node_Id;
- 
-       --  SPARK_Mode pragma in application
- 
-    --  Start of processing for Check_Safe_Pointers
- 
-    begin
-       Initialize;
-       case Nkind (N) is
-          when N_Compilation_Unit =>
-             Check_Safe_Pointers (Unit (N));
- 
-          when N_Package_Body
-             | N_Package_Declaration
-             | N_Subprogram_Body
-          =>
-             Prag := SPARK_Pragma (Defining_Entity (N));
-             if Present (Prag) then
-                if Get_SPARK_Mode_From_Annotation (Prag) = Opt.Off then
-                   return;
-                else
-                   Check_Node (N);
-                end if;
- 
-             elsif Nkind (N) = N_Package_Body then
-                Check_List (Declarations (N));
- 
-             elsif Nkind (N) = N_Package_Declaration then
-                Check_List (Private_Declarations (Specification (N)));
-                Check_List (Visible_Declarations (Specification (N)));
-             end if;
- 
-          when others =>
-             null;
-       end case;
-    end Check_Safe_Pointers;
- 
-    ---------------------
-    -- Check_Statement --
-    ---------------------
- 
-    procedure Check_Statement (Stmt : Node_Id) is
-       Mode_Before : constant Checking_Mode := Current_Checking_Mode;
-       State_N     : Perm_Kind;
-       Check       : Boolean := True;
-       St_Name     : Node_Id;
-       Ty_St_Name  : Node_Id;
- 
-       function Get_Root (Comp_Stmt : Node_Id) return Node_Id;
-       --  Return the root of the name given as input
- 
-       function Get_Root (Comp_Stmt : Node_Id) return Node_Id is
-       begin
-          case Nkind (Comp_Stmt) is
-             when N_Identifier
-                | N_Expanded_Name
-             => return Comp_Stmt;
- 
-             when N_Type_Conversion
-                | N_Unchecked_Type_Conversion
-                | N_Qualified_Expression
-             =>
-                return Get_Root (Expression (Comp_Stmt));
- 
-             when N_Parameter_Specification =>
-                return Get_Root (Defining_Identifier (Comp_Stmt));
- 
-             when N_Selected_Component
-                | N_Indexed_Component
-                | N_Slice
-                | N_Explicit_Dereference
-             =>
-                return Get_Root (Prefix (Comp_Stmt));
- 
-             when others =>
-                raise Program_Error;
-          end case;
-       end Get_Root;
- 
-    begin
-       case N_Statement_Other_Than_Procedure_Call'(Nkind (Stmt)) is
-          when N_Entry_Call_Statement =>
-             Check_Call_Statement (Stmt);
- 
-          --  Move right-hand side first, and then assign left-hand side
- 
-          when N_Assignment_Statement =>
- 
-             St_Name    := Name (Stmt);
-             Ty_St_Name := Etype (Name (Stmt));
- 
-             --  Check that is not a *general* access type
- 
-             if Has_Ownership_Aspect_True (St_Name, "assigning to") then
- 
-             --  Assigning to access type
- 
-                if Is_Access_Type (Ty_St_Name) then
- 
-                   --  Assigning to access to variable type
- 
-                   if not Is_Access_Constant (Ty_St_Name) then
- 
-                      --  Assigning to named access to variable type
- 
-                      if not Is_Anonymous_Access_Type (Ty_St_Name) then
-                         Current_Checking_Mode := Move;
- 
-                      --  Assigning to anonymous access to variable type
- 
-                      else
-                         --  Target /= source root
- 
-                         if Nkind_In (Expression (Stmt), N_Allocator, N_Null)
-                           or else Entity (St_Name) /=
-                           Entity (Get_Root (Expression (Stmt)))
-                         then
-                            Error_Msg_N ("assignment not allowed, anonymous "
-                                         & "access Object with Different Root",
-                                         Stmt);
-                            Check := False;
- 
-                         --  Target = source root
- 
-                         else
-                            --  Here we do nothing on the source nor on the
-                            --  target. However, we check the the legality rule:
-                            --  "The source shall be an owning access object
-                            --  denoted by a name that is not in the observed
-                            --  state".
- 
-                            State_N := Get_Perm (Expression (Stmt));
-                            if State_N = Observed then
-                               Error_Msg_N ("assignment not allowed, Anonymous "
-                                            & "access object with the same root"
-                                            & " but source Observed", Stmt);
-                               Check := False;
-                            end if;
-                         end if;
-                      end if;
- 
-                   --  else access-to-constant
- 
-                   --  Assigning to anonymous access-to-constant type
- 
-                   elsif Is_Anonymous_Access_Type (Ty_St_Name) then
- 
-                      --  ??? Check the follwing condition. We may have to
-                      --  add that the root is in the observed state too.
- 
-                      State_N := Get_Perm (Expression (Stmt));
-                      if State_N /= Observed then
-                         Error_Msg_N ("assignment not allowed, anonymous "
-                                      & "access-to-constant object not in "
-                                      & "the observed state)", Stmt);
-                         Check := False;
- 
-                      else
-                         Error_Msg_N ("?here check accessibility level cited in"
-                                      & " the second legality rule of assign",
-                                      Stmt);
-                         Check := False;
-                      end if;
- 
-                   --  Assigning to named access-to-constant type:
-                   --  This case should have been detected when checking
-                   --  Has_Onwership_Aspect_True (Name (Stmt), "msg").
- 
-                   else
-                      raise Program_Error;
-                   end if;
- 
-                --  Assigning to composite (deep) type.
- 
-                elsif Is_Deep (Ty_St_Name) then
-                   if Ekind_In (Ty_St_Name,
-                                E_Record_Type,
-                                E_Record_Subtype)
-                   then
-                      declare
-                         Elmt : Entity_Id :=
-                           First_Component_Or_Discriminant (Ty_St_Name);
- 
-                      begin
-                         while Present (Elmt) loop
-                            if Is_Anonymous_Access_Type (Etype (Elmt)) or
-                              Ekind (Elmt) = E_General_Access_Type
-                            then
-                               Error_Msg_N ("assignment not allowed, Ownership "
-                                            & "Aspect False (Components have "
-                                            & "Ownership Aspect False)", Stmt);
-                               Check := False;
-                               exit;
-                            end if;
- 
-                            Next_Component_Or_Discriminant (Elmt);
-                         end loop;
-                      end;
- 
-                      --  Record types are always named so this is a move
- 
-                      if Check then
-                         Current_Checking_Mode := Move;
-                      end if;
- 
-                   elsif Ekind_In (Ty_St_Name,
-                                   E_Array_Type,
-                                   E_Array_Subtype)
-                     and then Check
-                   then
-                      Current_Checking_Mode := Move;
-                   end if;
- 
-                --  Now handle legality rules of using a borrowed, observed,
-                --  or moved name as a prefix in an assignment.
- 
-                else
-                   if Nkind_In (St_Name,
-                                N_Attribute_Reference,
-                                N_Expanded_Name,
-                                N_Explicit_Dereference,
-                                N_Indexed_Component,
-                                N_Reference,
-                                N_Selected_Component,
-                                N_Slice)
-                   then
- 
-                      if Is_Access_Type (Etype (Prefix (St_Name))) or
-                        Is_Deep (Etype (Prefix (St_Name)))
-                      then
- 
-                         --  We set the Check variable to True so that we can
-                         --  Check_Node of the expression and the name first
-                         --  under the assumption of Current_Checking_Mode =
-                         --  Read => nothing to be done for the RHS if the
-                         --  following check on the expression fails, and
-                         --  Current_Checking_Mode := Assign => the name should
-                         --  not be borrowed or observed so that we can use it
-                         --  as a prefix in the target of an assignement.
-                         --
-                         --  Note that we do not need to check the OA here
-                         --  because we are allowed to read and write "through"
-                         --  an object of OAF (example: traversing a DS).
- 
-                         Check := True;
-                      end if;
-                   end if;
- 
-                   if Nkind_In (Expression (Stmt),
-                             N_Attribute_Reference,
-                             N_Expanded_Name,
-                             N_Explicit_Dereference,
-                             N_Indexed_Component,
-                             N_Reference,
-                             N_Selected_Component,
-                             N_Slice)
-                   then
- 
-                      if Is_Access_Type (Etype (Prefix (Expression (Stmt))))
-                        or else Is_Deep (Etype (Prefix (Expression (Stmt))))
-                      then
-                         Current_Checking_Mode := Observe;
-                         Check := True;
-                      end if;
-                   end if;
-                end if;
- 
-                if Check then
-                   Check_Node (Expression (Stmt));
-                   Current_Checking_Mode := Assign;
-                   Check_Node (St_Name);
-                end if;
-             end if;
- 
-          when N_Block_Statement =>
-             declare
-                Saved_Env : Perm_Env;
-             begin
-                --  Save environment
- 
-                Copy_Env (Current_Perm_Env, Saved_Env);
- 
-                --  Analyze declarations and Handled_Statement_Sequences
- 
-                Current_Checking_Mode := Read;
-                Check_List (Declarations (Stmt));
-                Check_Node (Handled_Statement_Sequence (Stmt));
- 
-                --  Restore environment
- 
-                Free_Env (Current_Perm_Env);
-                Copy_Env (Saved_Env, Current_Perm_Env);
-             end;
- 
-          when N_Case_Statement =>
-             declare
-                Saved_Env : Perm_Env;
- 
-                --  Accumulator for the different branches
- 
-                New_Env : Perm_Env;
-                Elmt : Node_Id := First (Alternatives (Stmt));
- 
-             begin
-                Current_Checking_Mode := Read;
-                Check_Node (Expression (Stmt));
-                Current_Checking_Mode := Mode_Before;
- 
-                --  Save environment
- 
-                Copy_Env (Current_Perm_Env, Saved_Env);
- 
-                --  Here we have the original env in saved, current with a fresh
-                --  copy, and new aliased.
- 
-                --  First alternative
- 
-                Check_Node (Elmt);
-                Next (Elmt);
-                Copy_Env (Current_Perm_Env, New_Env);
-                Free_Env (Current_Perm_Env);
- 
-                --  Other alternatives
- 
-                while Present (Elmt) loop
- 
-                   --  Restore environment
- 
-                   Copy_Env (Saved_Env, Current_Perm_Env);
-                   Check_Node (Elmt);
-                   Next (Elmt);
-                end loop;
- 
-                Copy_Env (Saved_Env, Current_Perm_Env);
-                Free_Env (New_Env);
-                Free_Env (Saved_Env);
-             end;
- 
-          when N_Delay_Relative_Statement =>
-             Check_Node (Expression (Stmt));
- 
-          when N_Delay_Until_Statement =>
-             Check_Node (Expression (Stmt));
- 
-          when N_Loop_Statement =>
-             Check_Loop_Statement (Stmt);
- 
-             --  If deep type expression, then move, else read
- 
-          when N_Simple_Return_Statement =>
-             case Nkind (Expression (Stmt)) is
-                when N_Empty =>
-                   declare
-                      --  ??? This does not take into account the fact that
-                      --  a simple return inside an extended return statement
-                      --  applies to the extended return statement.
-                      Subp : constant Entity_Id :=
-                        Return_Applies_To (Return_Statement_Entity (Stmt));
-                   begin
-                      Return_Globals (Subp);
-                   end;
- 
-                when others =>
-                   if Is_Deep (Etype (Expression (Stmt))) then
-                      Current_Checking_Mode := Move;
-                   else
-                      Check := False;
-                   end if;
- 
-                   if Check then
-                      Check_Node (Expression (Stmt));
-                   end if;
-             end case;
- 
-          when N_Extended_Return_Statement =>
-             Check_List (Return_Object_Declarations (Stmt));
-             Check_Node (Handled_Statement_Sequence (Stmt));
-             Return_Declarations (Return_Object_Declarations (Stmt));
-             declare
-                --  ??? This does not take into account the fact that a simple
-                --  return inside an extended return statement applies to the
-                --  extended return statement.
-                Subp : constant Entity_Id :=
-                  Return_Applies_To (Return_Statement_Entity (Stmt));
- 
-             begin
-                Return_Globals (Subp);
-             end;
- 
-          --  Nothing to do when exiting a loop. No merge needed
- 
-          when N_Exit_Statement =>
-             null;
- 
-          --  Copy environment, run on each branch
- 
-          when N_If_Statement =>
-             declare
-                Saved_Env : Perm_Env;
- 
-                --  Accumulator for the different branches
- 
-                New_Env : Perm_Env;
- 
-             begin
-                Check_Node (Condition (Stmt));
- 
-                --  Save environment
- 
-                Copy_Env (Current_Perm_Env, Saved_Env);
- 
-                --  Here we have the original env in saved, current with a fresh
-                --  copy.
- 
-                --  THEN PART
- 
-                Check_List (Then_Statements (Stmt));
-                Copy_Env (Current_Perm_Env, New_Env);
-                Free_Env (Current_Perm_Env);
- 
-                --  Here the new_environment contains curr env after then block
- 
-                --  ELSIF part
- 
-                declare
-                   Elmt : Node_Id;
- 
-                begin
-                   Elmt := First (Elsif_Parts (Stmt));
-                   while Present (Elmt) loop
- 
-                      --  Transfer into accumulator, and restore from save
- 
-                      Copy_Env (Saved_Env, Current_Perm_Env);
-                      Check_Node (Condition (Elmt));
-                      Check_List (Then_Statements (Stmt));
-                      Next (Elmt);
-                   end loop;
-                end;
- 
-                --  ELSE part
- 
-                --  Restore environment before if
- 
-                Copy_Env (Saved_Env, Current_Perm_Env);
- 
-                --  Here new environment contains the environment after then and
-                --  current the fresh copy of old one.
- 
-                Check_List (Else_Statements (Stmt));
- 
-                --  CLEANUP
- 
-                Copy_Env (Saved_Env, Current_Perm_Env);
- 
-                Free_Env (New_Env);
-                Free_Env (Saved_Env);
-             end;
- 
-          --  Unsupported constructs in SPARK
- 
-          when N_Abort_Statement
-             | N_Accept_Statement
-             | N_Asynchronous_Select
-             | N_Code_Statement
-             | N_Conditional_Entry_Call
-             | N_Goto_Statement
-             | N_Requeue_Statement
-             | N_Selective_Accept
-             | N_Timed_Entry_Call
-          =>
-             Error_Msg_N ("unsupported construct in SPARK", Stmt);
- 
-          --  Ignored constructs for pointer checking
- 
-          when N_Null_Statement
-             | N_Raise_Statement
-          =>
-             null;
- 
-          --  The following nodes are never generated in GNATprove mode
- 
-          when N_Compound_Statement
-             | N_Free_Statement
-          =>
-             raise Program_Error;
-       end case;
-    end Check_Statement;
- 
-    --------------
-    -- Get_Perm --
-    --------------
- 
-    function Get_Perm (N : Node_Id) return Perm_Kind is
-       Tree_Or_Perm : constant Perm_Or_Tree := Get_Perm_Or_Tree (N);
- 
-    begin
-       case Tree_Or_Perm.R is
-          when Folded =>
-             return Tree_Or_Perm.Found_Permission;
- 
-          when Unfolded =>
-             pragma Assert (Tree_Or_Perm.Tree_Access /= null);
-             return Permission (Tree_Or_Perm.Tree_Access);
- 
-          --  We encoutered a function call, hence the memory area is fresh,
-          --  which means that the association permission is RW.
- 
-          when Function_Call =>
-             return Unrestricted;
-       end case;
-    end Get_Perm;
- 
-    ----------------------
-    -- Get_Perm_Or_Tree --
-    ----------------------
- 
-    function Get_Perm_Or_Tree (N : Node_Id) return Perm_Or_Tree is
-    begin
-       case Nkind (N) is
- 
-          --  Base identifier. Normally those are the roots of the trees stored
-          --  in the permission environment.
- 
-          when N_Defining_Identifier =>
-             raise Program_Error;
- 
-          when N_Identifier
-             | N_Expanded_Name
-          =>
-             declare
-                P : constant Entity_Id := Entity (N);
-                C : constant Perm_Tree_Access :=
-                  Get (Current_Perm_Env, Unique_Entity (P));
- 
-             begin
-                --  Setting the initialization map to True, so that this
-                --  variable cannot be ignored anymore when looking at end
-                --  of elaboration of package.
- 
-                Set (Current_Initialization_Map, Unique_Entity (P), True);
-                if C = null then
-                   --  No null possible here, there are no parents for the path.
-                   --  This means we are using a global variable without adding
-                   --  it in environment with a global aspect.
- 
-                   Illegal_Global_Usage (N);
- 
-                else
-                   return (R => Unfolded, Tree_Access => C);
-                end if;
-             end;
- 
-          when N_Type_Conversion
-             | N_Unchecked_Type_Conversion
-             | N_Qualified_Expression
-          =>
-             return Get_Perm_Or_Tree (Expression (N));
- 
-          --  Happening when we try to get the permission of a variable that
-          --  is a formal parameter. We get instead the defining identifier
-          --  associated with the parameter (which is the one that has been
-          --  stored for indexing).
- 
-          when N_Parameter_Specification =>
-             return Get_Perm_Or_Tree (Defining_Identifier (N));
- 
-          --  We get the permission tree of its prefix, and then get either the
-          --  subtree associated with that specific selection, or if we have a
-          --  leaf that folds its children, we take the children's permission
-          --  and return it using the discriminant Folded.
- 
-          when N_Selected_Component =>
-             declare
-                C : constant Perm_Or_Tree := Get_Perm_Or_Tree (Prefix (N));
- 
-             begin
-                case C.R is
-                   when Folded
-                      | Function_Call
-                   =>
-                      return C;
- 
-                   when Unfolded =>
-                      pragma Assert (C.Tree_Access /= null);
-                      pragma Assert (Kind (C.Tree_Access) = Entire_Object
-                                     or else
-                                     Kind (C.Tree_Access) = Record_Component);
- 
-                      if Kind (C.Tree_Access) = Record_Component then
-                         declare
-                            Selected_Component : constant Entity_Id :=
-                              Entity (Selector_Name (N));
-                            Selected_C : constant Perm_Tree_Access :=
-                              Perm_Tree_Maps.Get
-                                (Component (C.Tree_Access), Selected_Component);
- 
-                         begin
-                            if Selected_C = null then
-                               return (R           => Unfolded,
-                                       Tree_Access =>
-                                         Other_Components (C.Tree_Access));
- 
-                            else
-                               return (R           => Unfolded,
-                                       Tree_Access => Selected_C);
-                            end if;
-                         end;
- 
-                      elsif Kind (C.Tree_Access) = Entire_Object then
-                         return (R                => Folded,
-                                 Found_Permission =>
-                                   Children_Permission (C.Tree_Access));
- 
-                      else
-                         raise Program_Error;
-                      end if;
-                end case;
-             end;
-          --  We get the permission tree of its prefix, and then get either the
-          --  subtree associated with that specific selection, or if we have a
-          --  leaf that folds its children, we take the children's permission
-          --  and return it using the discriminant Folded.
- 
-          when N_Indexed_Component
-             | N_Slice
-          =>
-             declare
-                C : constant Perm_Or_Tree := Get_Perm_Or_Tree (Prefix (N));
- 
-             begin
-                case C.R is
-                   when Folded
-                      | Function_Call
-                   =>
-                      return C;
- 
-                   when Unfolded =>
-                      pragma Assert (C.Tree_Access /= null);
-                      pragma Assert (Kind (C.Tree_Access) = Entire_Object
-                                     or else
-                                     Kind (C.Tree_Access) = Array_Component);
- 
-                      if Kind (C.Tree_Access) = Array_Component then
-                         pragma Assert (Get_Elem (C.Tree_Access) /= null);
-                         return (R => Unfolded,
-                                 Tree_Access => Get_Elem (C.Tree_Access));
- 
-                      elsif Kind (C.Tree_Access) = Entire_Object then
-                         return (R => Folded, Found_Permission =>
-                                   Children_Permission (C.Tree_Access));
- 
-                      else
-                         raise Program_Error;
-                      end if;
-                end case;
-             end;
-          --  We get the permission tree of its prefix, and then get either the
-          --  subtree associated with that specific selection, or if we have a
-          --  leaf that folds its children, we take the children's permission
-          --  and return it using the discriminant Folded.
- 
-          when N_Explicit_Dereference =>
-             declare
-                C : constant Perm_Or_Tree := Get_Perm_Or_Tree (Prefix (N));
- 
-             begin
-                case C.R is
-                   when Folded
-                      | Function_Call
-                   =>
-                      return C;
- 
-                   when Unfolded =>
-                      pragma Assert (C.Tree_Access /= null);
-                      pragma Assert (Kind (C.Tree_Access) = Entire_Object
-                                     or else
-                                     Kind (C.Tree_Access) = Reference);
- 
-                      if Kind (C.Tree_Access) = Reference then
-                         if Get_All (C.Tree_Access) = null then
- 
-                            --  Hash_Table_Error
- 
-                            raise Program_Error;
- 
-                         else
-                            return
-                              (R => Unfolded,
-                               Tree_Access => Get_All (C.Tree_Access));
-                         end if;
- 
-                      elsif Kind (C.Tree_Access) = Entire_Object then
-                         return (R => Folded, Found_Permission =>
-                                   Children_Permission (C.Tree_Access));
- 
-                      else
-                         raise Program_Error;
-                      end if;
-                end case;
-             end;
-          --  The name contains a function call, hence the given path is always
-          --  new. We do not have to check for anything.
- 
-          when N_Function_Call =>
-             return (R => Function_Call);
- 
-          when others =>
-             raise Program_Error;
-       end case;
-    end Get_Perm_Or_Tree;
- 
-    -------------------
-    -- Get_Perm_Tree --
-    -------------------
- 
-    function Get_Perm_Tree (N : Node_Id) return Perm_Tree_Access is
-    begin
-       case Nkind (N) is
- 
-          --  Base identifier. Normally those are the roots of the trees stored
-          --  in the permission environment.
- 
-          when N_Defining_Identifier =>
-             raise Program_Error;
- 
-          when N_Identifier
-             | N_Expanded_Name
-          =>
-             declare
-                P : constant Node_Id := Entity (N);
-                C : constant Perm_Tree_Access :=
-                  Get (Current_Perm_Env, Unique_Entity (P));
- 
-             begin
-                --  Setting the initialization map to True, so that this
-                --  variable cannot be ignored anymore when looking at end
-                --  of elaboration of package.
- 
-                Set (Current_Initialization_Map, Unique_Entity (P), True);
-                if C = null then
-                   --  No null possible here, there are no parents for the path.
-                   --  This means we are using a global variable without adding
-                   --  it in environment with a global aspect.
- 
-                   Illegal_Global_Usage (N);
- 
-                else
-                   return C;
-                end if;
-             end;
- 
-          when N_Type_Conversion
-             | N_Unchecked_Type_Conversion
-             | N_Qualified_Expression
-          =>
-             return Get_Perm_Tree (Expression (N));
- 
-          when N_Parameter_Specification =>
-             return Get_Perm_Tree (Defining_Identifier (N));
- 
-          --  We get the permission tree of its prefix, and then get either the
-          --  subtree associated with that specific selection, or if we have a
-          --  leaf that folds its children, we unroll it in one step.
- 
-          when N_Selected_Component =>
-             declare
-                C : constant Perm_Tree_Access := Get_Perm_Tree (Prefix (N));
- 
-             begin
-                if C = null then
- 
-                   --  If null then it means we went through a function call
- 
-                   return null;
-                end if;
- 
-                pragma Assert (Kind (C) = Entire_Object
-                               or else Kind (C) = Record_Component);
- 
-                if Kind (C) = Record_Component then
- 
-                   --  The tree is unfolded. We just return the subtree.
- 
-                   declare
-                      Selected_Component : constant Entity_Id :=
-                        Entity (Selector_Name (N));
-                      Selected_C : constant Perm_Tree_Access :=
-                        Perm_Tree_Maps.Get
-                          (Component (C), Selected_Component);
- 
-                   begin
-                      if Selected_C = null then
-                         return Other_Components (C);
-                      end if;
-                      return Selected_C;
-                   end;
- 
-                elsif Kind (C) = Entire_Object then
-                   declare
-                      --  Expand the tree. Replace the node with
-                      --  Record_Component.
- 
-                      Elem : Node_Id;
- 
-                      --  Create the unrolled nodes
- 
-                      Son : Perm_Tree_Access;
- 
-                      Child_Perm : constant Perm_Kind :=
-                        Children_Permission (C);
- 
-                   begin
-                      --  We change the current node from Entire_Object to
-                      --  Record_Component with same permission and an empty
-                      --  hash table as component list.
- 
-                      C.all.Tree :=
-                        (Kind             => Record_Component,
-                         Is_Node_Deep     => Is_Node_Deep (C),
-                         Permission       => Permission (C),
-                         Component        => Perm_Tree_Maps.Nil,
-                         Other_Components =>
-                            new Perm_Tree_Wrapper'
-                           (Tree =>
-                                (Kind                => Entire_Object,
-                                 --  Is_Node_Deep is true, to be conservative
-                                 Is_Node_Deep        => True,
-                                 Permission          => Child_Perm,
-                                 Children_Permission => Child_Perm)
-                           )
-                        );
- 
-                      --  We fill the hash table with all sons of the record,
-                      --  with basic Entire_Objects nodes.
- 
-                      Elem := First_Component_Or_Discriminant
-                        (Etype (Prefix (N)));
- 
-                      while Present (Elem) loop
-                         Son := new Perm_Tree_Wrapper'
-                           (Tree =>
-                              (Kind                => Entire_Object,
-                               Is_Node_Deep        => Is_Deep (Etype (Elem)),
-                               Permission          => Child_Perm,
-                               Children_Permission => Child_Perm));
- 
-                         Perm_Tree_Maps.Set
-                           (C.all.Tree.Component, Elem, Son);
-                         Next_Component_Or_Discriminant (Elem);
-                      end loop;
-                      --  we return the tree to the sons, so that the recursion
-                      --  can continue.
- 
-                      declare
-                         Selected_Component : constant Entity_Id :=
-                           Entity (Selector_Name (N));
- 
-                         Selected_C : constant Perm_Tree_Access :=
-                           Perm_Tree_Maps.Get
-                             (Component (C), Selected_Component);
- 
-                      begin
-                         pragma Assert (Selected_C /= null);
-                         return Selected_C;
-                      end;
-                   end;
-                else
-                   raise Program_Error;
-                end if;
-             end;
-          --  We set the permission tree of its prefix, and then we extract from
-          --  the returned pointer the subtree. If folded, we unroll the tree at
-          --  one step.
- 
-          when N_Indexed_Component
-             | N_Slice
-          =>
-             declare
-                C : constant Perm_Tree_Access := Get_Perm_Tree (Prefix (N));
- 
-             begin
-                if C = null then
-                   --  If null then we went through a function call
- 
-                   return null;
-                end if;
-                pragma Assert (Kind (C) = Entire_Object
-                               or else Kind (C) = Array_Component);
- 
-                if Kind (C) = Array_Component then
- 
-                   --  The tree is unfolded. We just return the elem subtree
- 
-                   pragma Assert (Get_Elem (C) = null);
-                   return Get_Elem (C);
- 
-                elsif Kind (C) = Entire_Object then
-                   declare
-                      --  Expand the tree. Replace node with Array_Component.
- 
-                      Son : Perm_Tree_Access;
- 
-                   begin
-                      Son := new Perm_Tree_Wrapper'
-                        (Tree =>
-                           (Kind                => Entire_Object,
-                            Is_Node_Deep        => Is_Node_Deep (C),
-                            Permission          => Children_Permission (C),
-                            Children_Permission => Children_Permission (C)));
- 
-                      --  We change the current node from Entire_Object
-                      --  to Array_Component with same permission and the
-                      --  previously defined son.
- 
-                      C.all.Tree := (Kind         => Array_Component,
-                                     Is_Node_Deep => Is_Node_Deep (C),
-                                     Permission   => Permission (C),
-                                     Get_Elem     => Son);
-                      return Get_Elem (C);
-                   end;
-                else
-                   raise Program_Error;
-                end if;
-             end;
-          --  We get the permission tree of its prefix, and then get either the
-          --  subtree associated with that specific selection, or if we have a
-          --  leaf that folds its children, we unroll the tree.
- 
-          when N_Explicit_Dereference =>
-             declare
-                C : Perm_Tree_Access;
- 
-             begin
-                C := Get_Perm_Tree (Prefix (N));
- 
-                if C = null then
- 
-                   --  If null, we went through a function call
- 
-                   return null;
-                end if;
- 
-                pragma Assert (Kind (C) = Entire_Object
-                               or else Kind (C) = Reference);
- 
-                if Kind (C) = Reference then
- 
-                   --  The tree is unfolded. We return the elem subtree
- 
-                   if Get_All (C) = null then
- 
-                      --  Hash_Table_Error
- 
-                      raise Program_Error;
-                   end if;
-                   return Get_All (C);
- 
-                elsif Kind (C) = Entire_Object then
-                   declare
-                      --  Expand the tree. Replace the node with Reference.
- 
-                      Son : Perm_Tree_Access;
- 
-                   begin
-                      Son := new Perm_Tree_Wrapper'
-                        (Tree =>
-                           (Kind                => Entire_Object,
-                            Is_Node_Deep        => Is_Deep (Etype (N)),
-                            Permission          => Children_Permission (C),
-                            Children_Permission => Children_Permission (C)));
- 
-                      --  We change the current node from Entire_Object to
-                      --  Reference with same permission and the previous son.
- 
-                      pragma Assert (Is_Node_Deep (C));
-                      C.all.Tree := (Kind         => Reference,
-                                     Is_Node_Deep => Is_Node_Deep (C),
-                                     Permission   => Permission (C),
-                                     Get_All      => Son);
-                      return Get_All (C);
-                   end;
-                else
-                   raise Program_Error;
-                end if;
-             end;
-          --  No permission tree for function calls
- 
-          when N_Function_Call =>
-             return null;
- 
-          when others =>
-             raise Program_Error;
-       end case;
-    end Get_Perm_Tree;
- 
-    --------
-    -- Hp --
-    --------
- 
-    procedure Hp (P : Perm_Env) is
-       Elem : Perm_Tree_Maps.Key_Option;
- 
-    begin
-       Elem := Get_First_Key (P);
-       while Elem.Present loop
-          Print_Node_Briefly (Elem.K);
-          Elem := Get_Next_Key (P);
-       end loop;
-    end Hp;
- 
-    --------------------------
-    -- Illegal_Global_Usage --
-    --------------------------
- 
-    procedure Illegal_Global_Usage (N : Node_Or_Entity_Id)  is
-    begin
-       Error_Msg_NE ("cannot use global variable & of deep type", N, N);
-       Error_Msg_N ("\without prior declaration in a Global aspect", N);
-       Errout.Finalize (Last_Call => True);
-       Errout.Output_Messages;
-       Exit_Program (E_Errors);
-    end Illegal_Global_Usage;
- 
-    -------------
-    -- Is_Deep --
-    -------------
- 
-    function Is_Deep (E : Entity_Id) return Boolean is
-       function Is_Private_Entity_Mode_Off (E : Entity_Id) return Boolean;
-       function Is_Private_Entity_Mode_Off (E : Entity_Id) return Boolean is
-          Decl : Node_Id;
-          Pack_Decl : Node_Id;
- 
-       begin
-          if Is_Itype (E) then
-             Decl := Associated_Node_For_Itype (E);
-          else
-             Decl := Parent (E);
-          end if;
- 
-          Pack_Decl := Parent (Parent (Decl));
- 
-          if Nkind (Pack_Decl) /= N_Package_Declaration then
-             return False;
-          end if;
- 
-          return
-            Present (SPARK_Aux_Pragma (Defining_Entity (Pack_Decl)))
-            and then Get_SPARK_Mode_From_Annotation
-              (SPARK_Aux_Pragma (Defining_Entity (Pack_Decl))) = Off;
-       end Is_Private_Entity_Mode_Off;
- 
-    begin
-       pragma Assert (Is_Type (E));
-       case Ekind (E) is
-          when Scalar_Kind =>
-             return False;
- 
-          when Access_Kind =>
-             return True;
- 
-          --  Just check the depth of its component type
- 
-          when E_Array_Type
-             | E_Array_Subtype
-          =>
-             return Is_Deep (Component_Type (E));
- 
-          when E_String_Literal_Subtype =>
-             return False;
- 
-          --  Per RM 8.11 for class-wide types
- 
-          when E_Class_Wide_Subtype
-             | E_Class_Wide_Type
-          =>
-             return True;
- 
-          --  ??? What about hidden components
- 
-          when E_Record_Type
-             | E_Record_Subtype
-          =>
-             declare
-                Elmt : Entity_Id;
- 
-             begin
-                Elmt := First_Component_Or_Discriminant (E);
-                while Present (Elmt) loop
-                   if Is_Deep (Etype (Elmt)) then
-                      return True;
-                   else
-                      Next_Component_Or_Discriminant (Elmt);
-                   end if;
-                end loop;
-                return False;
-             end;
- 
-          when Private_Kind =>
-             if Is_Private_Entity_Mode_Off (E) then
-                return False;
-             else
-                if Present (Full_View (E)) then
-                   return Is_Deep (Full_View (E));
-                else
-                   return True;
-                end if;
-             end if;
- 
-          when E_Incomplete_Type
-             | E_Incomplete_Subtype
-          =>
-             return True;
- 
-          --  No problem with synchronized types
- 
-          when E_Protected_Type
-             | E_Protected_Subtype
-             | E_Task_Subtype
-             | E_Task_Type
-           =>
-             return False;
- 
-          when E_Exception_Type =>
-             return False;
- 
-          when others =>
-             raise Program_Error;
-       end case;
-    end Is_Deep;
- 
-    ----------------
-    -- Perm_Error --
-    ----------------
- 
-    procedure Perm_Error
-      (N : Node_Id;
-       Perm : Perm_Kind;
-       Found_Perm : Perm_Kind)
-    is
-       procedure Set_Root_Object
-         (Path  : Node_Id;
-          Obj   : out Entity_Id;
-          Deref : out Boolean);
-       --  Set the root object Obj, and whether the path contains a dereference,
-       --  from a path Path.
- 
-       ---------------------
-       -- Set_Root_Object --
-       ---------------------
- 
-       procedure Set_Root_Object
-         (Path  : Node_Id;
-          Obj   : out Entity_Id;
-          Deref : out Boolean)
-       is
-       begin
-          case Nkind (Path) is
-             when N_Identifier
-                | N_Expanded_Name
-             =>
-                Obj := Entity (Path);
-                Deref := False;
- 
-             when N_Type_Conversion
-                | N_Unchecked_Type_Conversion
-                | N_Qualified_Expression
-             =>
-                Set_Root_Object (Expression (Path), Obj, Deref);
- 
-             when N_Indexed_Component
-                | N_Selected_Component
-                | N_Slice
-             =>
-                Set_Root_Object (Prefix (Path), Obj, Deref);
- 
-             when N_Explicit_Dereference =>
-                Set_Root_Object (Prefix (Path), Obj, Deref);
-                Deref := True;
- 
-             when others =>
-                raise Program_Error;
-          end case;
-       end Set_Root_Object;
-       --  Local variables
- 
-       Root : Entity_Id;
-       Is_Deref : Boolean;
- 
-    --  Start of processing for Perm_Error
- 
-    begin
-       Set_Root_Object (N, Root, Is_Deref);
- 
-       if Is_Deref then
-          Error_Msg_NE
-            ("insufficient permission on dereference from &", N, Root);
-       else
-          Error_Msg_NE ("insufficient permission for &", N, Root);
-       end if;
- 
-       Perm_Mismatch (Perm, Found_Perm, N);
-    end Perm_Error;
- 
-    -------------------------------
-    -- Perm_Error_Subprogram_End --
-    -------------------------------
- 
-    procedure Perm_Error_Subprogram_End
-      (E          : Entity_Id;
-       Subp       : Entity_Id;
-       Perm       : Perm_Kind;
-       Found_Perm : Perm_Kind)
-    is
-    begin
-       Error_Msg_Node_2 := Subp;
-       Error_Msg_NE ("insufficient permission for & when returning from &",
-                     Subp, E);
-       Perm_Mismatch (Perm, Found_Perm, Subp);
-    end Perm_Error_Subprogram_End;
- 
-    ------------------
-    -- Process_Path --
-    ------------------
- 
-    procedure Process_Path (N : Node_Id) is
-       Root    : constant Entity_Id := Get_Enclosing_Object (N);
-       State_N : Perm_Kind;
-    begin
-       --  We ignore if yielding to synchronized
- 
-       if Present (Root)
-         and then Is_Synchronized_Object (Root)
-       then
-          return;
-       end if;
- 
-       State_N := Get_Perm (N);
- 
-       case Current_Checking_Mode is
- 
-          --  Check permission R, do nothing
- 
-          when Read =>
- 
-             --  This condition should be removed when removing the read
-             --  checking mode.
- 
-             return;
- 
-          when Move =>
- 
-             --  The rhs object in an assignment statement (including copy in
-             --  and copy back) should be in the Unrestricted or Moved state.
-             --  Otherwise the move is not allowed.
-             --  This applies to both stand-alone and composite objects.
-             --  If the state of the source is Moved, then a warning message
-             --  is prompt to make the user aware of reading a nullified
-             --  object.
- 
-             if State_N /= Unrestricted and State_N /= Moved then
-                Perm_Error (N, Unrestricted, State_N);
-                return;
-             end if;
- 
-             --  In the AI, after moving a path nothing to do since the rhs
-             --  object was in the Unrestricted state and it shall be
-             --  refreshed to Unrestricted. The object should be nullified
-             --  however. To avoid moving again a name that has already been
-             --  moved, in this implementation we set the state of the moved
-             --  object to "Moved". This shall be used to prompt a warning
-             --  when manipulating a null pointer and also to implement
-             --  the no aliasing parameter restriction.
- 
-             if State_N = Moved then
-                Error_Msg_N ("?the source or one of its extensions has"
-                             & " already been moved", N);
-             end if;
- 
-             declare
-                --  Set state to Moved to the path and any of its prefixes
- 
-                Tree : constant Perm_Tree_Access :=
-                  Set_Perm_Prefixes (N, Moved);
- 
-             begin
-                if Tree = null then
- 
-                   --  We went through a function call, no permission to
-                   --  modify.
- 
-                   return;
-                end if;
- 
-                --  Set state to Moved on any strict extension of the path
- 
-                Set_Perm_Extensions (Tree, Moved);
-             end;
- 
-          when Assign =>
- 
-             --  The lhs object in an assignment statement (including copy in
-             --  and copy back) should be in the Unrestricted state.
-             --  Otherwise the move is not allowed.
-             --  This applies to both stand-alone and composite objects.
- 
-             if State_N /= Unrestricted and State_N /= Moved then
-                Perm_Error (N, Unrestricted, State_N);
-                return;
-             end if;
- 
-             --  After assigning to a path nothing to do since it was in the
-             --  Unrestricted state and it would be refreshed to
-             --  Unrestricted.
- 
-          when Borrow =>
- 
-             --  Borrowing is only allowed on Unrestricted objects.
- 
-             if State_N /= Unrestricted and State_N /= Moved then
-                Perm_Error (N, Unrestricted, State_N);
-             end if;
- 
-             if State_N = Moved then
-                Error_Msg_N ("?the source or one of its extensions has"
-                             & " already been moved", N);
-             end if;
- 
-             declare
-                --  Set state to Borrowed to the path and any of its prefixes
- 
-                Tree : constant Perm_Tree_Access :=
-                  Set_Perm_Prefixes (N, Borrowed);
- 
-             begin
-                if Tree = null then
- 
-                   --  We went through a function call, no permission to
-                   --  modify.
- 
-                   return;
-                end if;
- 
-                --  Set state to Borrowed on any strict extension of the path
- 
-                Set_Perm_Extensions (Tree, Borrowed);
-             end;
- 
-          when Observe =>
-             if State_N /= Unrestricted
-               and then State_N /= Observed
-             then
-                Perm_Error (N, Observed, State_N);
-             end if;
- 
-             declare
-                --  Set permission to Observed on the path and any of its
-                --  prefixes if it is of a deep type. Actually, some operation
-                --  like reading from an object of access type is considered as
-                --  observe while it should not affect the permissions of
-                --  the considered tree.
- 
-                Tree : Perm_Tree_Access;
- 
-             begin
-                if Is_Deep (Etype (N)) then
-                   Tree := Set_Perm_Prefixes (N, Observed);
-                else
-                   Tree := null;
-                end if;
- 
-                if Tree = null then
- 
-                   --  We went through a function call, no permission to
-                   --  modify.
- 
-                   return;
-                end if;
- 
-                --  Set permissions to No on any strict extension of the path
- 
-                Set_Perm_Extensions (Tree, Observed);
-             end;
-       end case;
-    end Process_Path;
- 
-    -------------------------
-    -- Return_Declarations --
-    -------------------------
- 
-    procedure Return_Declarations (L : List_Id) is
-       procedure Return_Declaration (Decl : Node_Id);
-       --  Check correct permissions for every declared object
- 
-       ------------------------
-       -- Return_Declaration --
-       ------------------------
- 
-       procedure Return_Declaration (Decl : Node_Id) is
-       begin
-          if Nkind (Decl) = N_Object_Declaration then
- 
-             --  Check RW for object declared, unless the object has never been
-             --  initialized.
- 
-             if Get (Current_Initialization_Map,
-                     Unique_Entity (Defining_Identifier (Decl))) = False
-             then
-                return;
-             end if;
- 
-             declare
-                Elem : constant Perm_Tree_Access :=
-                  Get (Current_Perm_Env,
-                       Unique_Entity (Defining_Identifier (Decl)));
- 
-             begin
-                if Elem = null then
- 
-                   --  Here we are on a declaration. Hence it should have been
-                   --  added in the environment when analyzing this node with
-                   --  mode Read. Hence it is not possible to find a null
-                   --  pointer here.
- 
-                   --  Hash_Table_Error
- 
-                   raise Program_Error;
-                end if;
- 
-                if Permission (Elem) /= Unrestricted then
-                   Perm_Error (Decl, Unrestricted, Permission (Elem));
-                end if;
-             end;
-          end if;
-       end Return_Declaration;
-       --  Local Variables
- 
-       N : Node_Id;
- 
-    --  Start of processing for Return_Declarations
- 
-    begin
-       N := First (L);
-       while Present (N) loop
-          Return_Declaration (N);
-          Next (N);
-       end loop;
-    end Return_Declarations;
- 
-    --------------------
-    -- Return_Globals --
-    --------------------
- 
-    procedure Return_Globals (Subp : Entity_Id) is
-       procedure Return_Globals_From_List
-         (First_Item : Node_Id;
-          Kind       : Formal_Kind);
-       --  Return global items from the list starting at Item
- 
-       procedure Return_Globals_Of_Mode (Global_Mode : Name_Id);
-       --  Return global items for the mode Global_Mode
- 
-       ------------------------------
-       -- Return_Globals_From_List --
-       ------------------------------
- 
-       procedure Return_Globals_From_List
-         (First_Item : Node_Id;
-          Kind       : Formal_Kind)
-       is
-          Item : Node_Id := First_Item;
-          E    : Entity_Id;
- 
-       begin
-          while Present (Item) loop
-             E := Entity (Item);
- 
-             --  Ignore abstract states, which play no role in pointer aliasing
- 
-             if Ekind (E) = E_Abstract_State then
-                null;
-             else
-                Return_The_Global (E, Kind, Subp);
-             end if;
-             Next_Global (Item);
-          end loop;
-       end Return_Globals_From_List;
- 
-       ----------------------------
-       -- Return_Globals_Of_Mode --
-       ----------------------------
- 
-       procedure Return_Globals_Of_Mode (Global_Mode : Name_Id) is
-          Kind : Formal_Kind;
- 
-       begin
-          case Global_Mode is
-             when Name_Input
-                | Name_Proof_In
-              =>
-                Kind := E_In_Parameter;
-             when Name_Output =>
-                Kind := E_Out_Parameter;
-             when Name_In_Out =>
-                Kind := E_In_Out_Parameter;
-             when others =>
-                raise Program_Error;
-          end case;
- 
-          --  Return both global items from Global and Refined_Global pragmas
- 
-          Return_Globals_From_List (First_Global (Subp, Global_Mode), Kind);
-          Return_Globals_From_List
-            (First_Global (Subp, Global_Mode, Refined => True), Kind);
-       end Return_Globals_Of_Mode;
- 
-    --  Start of processing for Return_Globals
- 
-    begin
-       Return_Globals_Of_Mode (Name_Proof_In);
-       Return_Globals_Of_Mode (Name_Input);
-       Return_Globals_Of_Mode (Name_Output);
-       Return_Globals_Of_Mode (Name_In_Out);
-    end Return_Globals;
- 
-    --------------------------------
-    -- Return_Parameter_Or_Global --
-    --------------------------------
- 
-    procedure Return_The_Global
-      (Id   : Entity_Id;
-       Mode : Formal_Kind;
-       Subp : Entity_Id)
-    is
-       Elem : constant Perm_Tree_Access := Get (Current_Perm_Env, Id);
-       pragma Assert (Elem /= null);
- 
-    begin
-       --  Observed IN parameters and globals need not return a permission to
-       --  the caller.
- 
-       if Mode = E_In_Parameter
- 
-       --  Check this for read-only globals.
- 
-       then
-          if Permission (Elem) /= Unrestricted
-            and then Permission (Elem) /= Observed
-          then
-             Perm_Error_Subprogram_End
-               (E          => Id,
-                Subp       => Subp,
-                Perm       => Observed,
-                Found_Perm => Permission (Elem));
-          end if;
- 
-          --  All globals of mode out or in/out should return with mode
-          --  Unrestricted.
- 
-       else
-          if Permission (Elem) /= Unrestricted then
-             Perm_Error_Subprogram_End
-               (E          => Id,
-                Subp       => Subp,
-                Perm       => Unrestricted,
-                Found_Perm => Permission (Elem));
-          end if;
-       end if;
-    end Return_The_Global;
- 
-    -------------------------
-    -- Set_Perm_Extensions --
-    -------------------------
- 
-    procedure Set_Perm_Extensions (T : Perm_Tree_Access; P : Perm_Kind) is
-       procedure Free_Perm_Tree_Children (T : Perm_Tree_Access);
-       procedure Free_Perm_Tree_Children (T : Perm_Tree_Access) is
-       begin
-          case Kind (T) is
-             when Entire_Object =>
-                null;
- 
-             when Reference =>
-                Free_Perm_Tree (T.all.Tree.Get_All);
- 
-             when Array_Component =>
-                Free_Perm_Tree (T.all.Tree.Get_Elem);
- 
-             --  Free every Component subtree
- 
-             when Record_Component =>
-                declare
-                   Comp : Perm_Tree_Access;
- 
-                begin
-                   Comp := Perm_Tree_Maps.Get_First (Component (T));
-                   while Comp /= null loop
-                      Free_Perm_Tree (Comp);
-                      Comp := Perm_Tree_Maps.Get_Next (Component (T));
-                   end loop;
- 
-                   Free_Perm_Tree (T.all.Tree.Other_Components);
-                end;
-          end case;
-       end Free_Perm_Tree_Children;
- 
-       Son : constant Perm_Tree :=
-         Perm_Tree'
-           (Kind                => Entire_Object,
-            Is_Node_Deep        => Is_Node_Deep (T),
-            Permission          => Permission (T),
-            Children_Permission => P);
- 
-    begin
-       Free_Perm_Tree_Children (T);
-       T.all.Tree := Son;
-    end Set_Perm_Extensions;
- 
-    ------------------------------
-    -- Set_Perm_Prefixes --
-    ------------------------------
- 
-    function Set_Perm_Prefixes
-      (N        : Node_Id;
-       New_Perm : Perm_Kind)
-       return Perm_Tree_Access
-    is
-    begin
- 
-       case Nkind (N) is
- 
-          when N_Identifier
-             | N_Expanded_Name
-             | N_Defining_Identifier
-          =>
-             if Nkind (N) = N_Defining_Identifier
-               and then New_Perm = Borrowed
-             then
-                raise Program_Error;
-             end if;
- 
-             declare
-                P : Node_Id;
-                C : Perm_Tree_Access;
- 
-             begin
-                if Nkind (N) = N_Defining_Identifier then
-                   P := N;
-                else
-                   P := Entity (N);
-                end if;
- 
-                C := Get (Current_Perm_Env, Unique_Entity (P));
-                pragma Assert (C /= null);
- 
-                --  Setting the initialization map to True, so that this
-                --  variable cannot be ignored anymore when looking at end
-                --  of elaboration of package.
- 
-                Set (Current_Initialization_Map, Unique_Entity (P), True);
-                if New_Perm = Observed
-                  and then C = null
-                then
- 
-                   --  No null possible here, there are no parents for the path.
-                   --  This means we are using a global variable without adding
-                   --  it in environment with a global aspect.
- 
-                   Illegal_Global_Usage (N);
-                end if;
- 
-                C.all.Tree.Permission := New_Perm;
-                return C;
-             end;
- 
-          when N_Type_Conversion
-             | N_Unchecked_Type_Conversion
-             | N_Qualified_Expression
-          =>
-             return Set_Perm_Prefixes (Expression (N), New_Perm);
- 
-          when N_Parameter_Specification =>
-             raise Program_Error;
- 
-             --  We set the permission tree of its prefix, and then we extract
-             --  our subtree from the returned pointer and assign an adequate
-             --  permission to it, if unfolded. If folded, we unroll the tree
-             --  in one step.
- 
-          when N_Selected_Component =>
-             declare
-                C : constant Perm_Tree_Access :=
-                  Set_Perm_Prefixes (Prefix (N), New_Perm);
- 
-             begin
-                if C = null then
- 
-                   --  We went through a function call, do nothing
- 
-                   return null;
-                end if;
- 
-                pragma Assert (Kind (C) = Entire_Object
-                               or else Kind (C) = Record_Component);
- 
-                if Kind (C) = Record_Component then
-                   --  The tree is unfolded. We just modify the permission and
-                   --  return the record subtree.
- 
-                   declare
-                      Selected_Component : constant Entity_Id :=
-                        Entity (Selector_Name (N));
- 
-                      Selected_C : Perm_Tree_Access :=
-                        Perm_Tree_Maps.Get
-                          (Component (C), Selected_Component);
- 
-                   begin
-                      if Selected_C = null then
-                         Selected_C := Other_Components (C);
-                      end if;
- 
-                      pragma Assert (Selected_C /= null);
-                      Selected_C.all.Tree.Permission := New_Perm;
-                      return Selected_C;
-                   end;
- 
-                elsif Kind (C) = Entire_Object then
-                   declare
-                      --  Expand the tree. Replace the node with
-                      --  Record_Component.
- 
-                      Elem : Node_Id;
- 
-                      --  Create an empty hash table
- 
-                      Hashtbl : Perm_Tree_Maps.Instance;
- 
-                      --  We create the unrolled nodes, that will all have same
-                      --  permission than parent.
- 
-                      Son           : Perm_Tree_Access;
-                      Children_Perm : constant Perm_Kind :=
-                        Children_Permission (C);
- 
-                   begin
-                      --  We change the current node from Entire_Object to
-                      --  Record_Component with same permission and an empty
-                      --  hash table as component list.
- 
-                      C.all.Tree :=
-                        (Kind         => Record_Component,
-                         Is_Node_Deep => Is_Node_Deep (C),
-                         Permission   => Permission (C),
-                         Component    => Hashtbl,
-                         Other_Components =>
-                            new Perm_Tree_Wrapper'
-                           (Tree =>
-                                (Kind                => Entire_Object,
-                                 Is_Node_Deep        => True,
-                                 Permission          => Children_Perm,
-                                 Children_Permission => Children_Perm)
-                           ));
- 
-                      --  We fill the hash table with all sons of the record,
-                      --  with basic Entire_Objects nodes.
- 
-                      Elem := First_Component_Or_Discriminant
-                        (Etype (Prefix (N)));
- 
-                      while Present (Elem) loop
-                         Son := new Perm_Tree_Wrapper'
-                           (Tree =>
-                              (Kind                => Entire_Object,
-                               Is_Node_Deep        => Is_Deep (Etype (Elem)),
-                               Permission          => Children_Perm,
-                               Children_Permission => Children_Perm));
- 
-                         Perm_Tree_Maps.Set (C.all.Tree.Component, Elem, Son);
-                         Next_Component_Or_Discriminant (Elem);
-                      end loop;
-                      --  Now we set the right field to Borrowed, and then we
-                      --  return the tree to the sons, so that the recursion can
-                      --  continue.
- 
-                      declare
-                         Selected_Component : constant Entity_Id :=
-                           Entity (Selector_Name (N));
-                         Selected_C : Perm_Tree_Access :=
-                           Perm_Tree_Maps.Get
-                             (Component (C), Selected_Component);
- 
-                      begin
-                         if Selected_C = null then
-                            Selected_C := Other_Components (C);
-                         end if;
- 
-                         pragma Assert (Selected_C /= null);
-                         Selected_C.all.Tree.Permission := New_Perm;
-                         return Selected_C;
-                      end;
-                   end;
-                else
-                   raise Program_Error;
-                end if;
-             end;
- 
-             --  We set the permission tree of its prefix, and then we extract
-             --  from the returned pointer the subtree and assign an adequate
-             --  permission to it, if unfolded. If folded, we unroll the tree in
-             --  one step.
- 
-          when N_Indexed_Component
-             | N_Slice
-          =>
-             declare
-                C : constant Perm_Tree_Access :=
-                  Set_Perm_Prefixes (Prefix (N), New_Perm);
- 
-             begin
-                if C = null then
- 
-                   --  We went through a function call, do nothing
- 
-                   return null;
-                end if;
- 
-                pragma Assert (Kind (C) = Entire_Object
-                               or else Kind (C) = Array_Component);
- 
-                if Kind (C) = Array_Component then
- 
-                   --  The tree is unfolded. We just modify the permission and
-                   --  return the elem subtree.
- 
-                   pragma Assert (Get_Elem (C) /= null);
-                   C.all.Tree.Get_Elem.all.Tree.Permission := New_Perm;
-                   return Get_Elem (C);
- 
-                elsif Kind (C) = Entire_Object then
-                   declare
-                      --  Expand the tree. Replace node with Array_Component.
- 
-                      Son : Perm_Tree_Access;
- 
-                   begin
-                      Son := new Perm_Tree_Wrapper'
-                        (Tree =>
-                           (Kind                => Entire_Object,
-                            Is_Node_Deep        => Is_Node_Deep (C),
-                            Permission          => New_Perm,
-                            Children_Permission => Children_Permission (C)));
- 
-                      --  Children_Permission => Children_Permission (C)
-                      --  this line should be checked maybe New_Perm
-                      --  instead of Children_Permission (C)
- 
-                      --  We change the current node from Entire_Object
-                      --  to Array_Component with same permission and the
-                      --  previously defined son.
- 
-                      C.all.Tree := (Kind         => Array_Component,
-                                     Is_Node_Deep => Is_Node_Deep (C),
-                                     Permission   => New_Perm,
-                                     Get_Elem     => Son);
-                      return Get_Elem (C);
-                   end;
-                else
-                   raise Program_Error;
-                end if;
-             end;
- 
-             --  We set the permission tree of its prefix, and then we extract
-             --  from the returned pointer the subtree and assign an adequate
-             --  permission to it, if unfolded. If folded, we unroll the tree
-             --  at one step.
- 
-          when N_Explicit_Dereference =>
-             declare
-                C : constant Perm_Tree_Access :=
-                 Set_Perm_Prefixes (Prefix (N), New_Perm);
- 
-             begin
-                if C = null then
- 
-                   --  We went through a function call. Do nothing.
- 
-                   return null;
-                end if;
- 
-                pragma Assert (Kind (C) = Entire_Object
-                               or else Kind (C) = Reference);
- 
-                if Kind (C) = Reference then
- 
-                   --  The tree is unfolded. We just modify the permission and
-                   --  return the elem subtree.
- 
-                   pragma Assert (Get_All (C) /= null);
-                   C.all.Tree.Get_All.all.Tree.Permission := New_Perm;
-                   return Get_All (C);
- 
-                elsif Kind (C) = Entire_Object then
-                   declare
-                      --  Expand the tree. Replace the node with Reference.
- 
-                      Son : Perm_Tree_Access;
- 
-                   begin
-                      Son := new Perm_Tree_Wrapper'
-                        (Tree =>
-                           (Kind                => Entire_Object,
-                            Is_Node_Deep        => Is_Deep (Etype (N)),
-                            Permission          => New_Perm,
-                            Children_Permission => Children_Permission (C)));
- 
-                      --  We change the current node from Entire_Object to
-                      --  Reference with Borrowed and the previous son.
- 
-                      pragma Assert (Is_Node_Deep (C));
-                      C.all.Tree := (Kind         => Reference,
-                                     Is_Node_Deep => Is_Node_Deep (C),
-                                     Permission   => New_Perm,
-                                     Get_All      => Son);
-                      return Get_All (C);
-                   end;
- 
-                else
-                   raise Program_Error;
-                end if;
-             end;
- 
-          when N_Function_Call =>
-             return null;
- 
-          when others =>
-             raise Program_Error;
-       end case;
-    end Set_Perm_Prefixes;
- 
-    ------------------------------
-    -- Set_Perm_Prefixes_Borrow --
-    ------------------------------
- 
-    function Set_Perm_Prefixes_Borrow (N : Node_Id) return Perm_Tree_Access
-    is
-    begin
-       pragma Assert (Current_Checking_Mode = Borrow);
-       case Nkind (N) is
- 
-          when N_Identifier
-             | N_Expanded_Name
-          =>
-             declare
-                P : constant Node_Id := Entity (N);
-                C : constant Perm_Tree_Access :=
-                  Get (Current_Perm_Env, Unique_Entity (P));
-                pragma Assert (C /= null);
- 
-             begin
-                --  Setting the initialization map to True, so that this
-                --  variable cannot be ignored anymore when looking at end
-                --  of elaboration of package.
- 
-                Set (Current_Initialization_Map, Unique_Entity (P), True);
-                C.all.Tree.Permission := Borrowed;
-                return C;
-             end;
- 
-          when N_Type_Conversion
-             | N_Unchecked_Type_Conversion
-             | N_Qualified_Expression
-          =>
-             return Set_Perm_Prefixes_Borrow (Expression (N));
- 
-          when N_Parameter_Specification
-             | N_Defining_Identifier
-          =>
-             raise Program_Error;
- 
-             --  We set the permission tree of its prefix, and then we extract
-             --  our subtree from the returned pointer and assign an adequate
-             --  permission to it, if unfolded. If folded, we unroll the tree
-             --  in one step.
- 
-          when N_Selected_Component =>
-             declare
-                C : constant Perm_Tree_Access :=
-                  Set_Perm_Prefixes_Borrow (Prefix (N));
- 
-             begin
-                if C = null then
- 
-                   --  We went through a function call, do nothing
- 
-                   return null;
-                end if;
- 
-                --  The permission of the returned node should be No
- 
-                pragma Assert (Permission (C) = Borrowed);
-                pragma Assert (Kind (C) = Entire_Object
-                               or else Kind (C) = Record_Component);
- 
-                if Kind (C) = Record_Component then
- 
-                   --  The tree is unfolded. We just modify the permission and
-                   --  return the record subtree.
- 
-                   declare
-                      Selected_Component : constant Entity_Id :=
-                        Entity (Selector_Name (N));
-                      Selected_C : Perm_Tree_Access :=
-                        Perm_Tree_Maps.Get
-                          (Component (C), Selected_Component);
- 
-                   begin
-                      if Selected_C = null then
-                         Selected_C := Other_Components (C);
-                      end if;
- 
-                      pragma Assert (Selected_C /= null);
-                      Selected_C.all.Tree.Permission := Borrowed;
-                      return Selected_C;
-                   end;
- 
-                elsif Kind (C) = Entire_Object then
-                   declare
-                      --  Expand the tree. Replace the node with
-                      --  Record_Component.
- 
-                      Elem : Node_Id;
- 
-                      --  Create an empty hash table
- 
-                      Hashtbl : Perm_Tree_Maps.Instance;
- 
-                      --  We create the unrolled nodes, that will all have same
-                      --  permission than parent.
- 
-                      Son : Perm_Tree_Access;
-                      ChildrenPerm : constant Perm_Kind :=
-                        Children_Permission (C);
- 
-                   begin
-                      --  We change the current node from Entire_Object to
-                      --  Record_Component with same permission and an empty
-                      --  hash table as component list.
- 
-                      C.all.Tree :=
-                        (Kind         => Record_Component,
-                         Is_Node_Deep => Is_Node_Deep (C),
-                         Permission   => Permission (C),
-                         Component    => Hashtbl,
-                         Other_Components =>
-                            new Perm_Tree_Wrapper'
-                           (Tree =>
-                                (Kind                => Entire_Object,
-                                 Is_Node_Deep        => True,
-                                 Permission          => ChildrenPerm,
-                                 Children_Permission => ChildrenPerm)
-                           ));
- 
-                      --  We fill the hash table with all sons of the record,
-                      --  with basic Entire_Objects nodes.
- 
-                      Elem := First_Component_Or_Discriminant
-                        (Etype (Prefix (N)));
- 
-                      while Present (Elem) loop
-                         Son := new Perm_Tree_Wrapper'
-                           (Tree =>
-                              (Kind                => Entire_Object,
-                               Is_Node_Deep        => Is_Deep (Etype (Elem)),
-                               Permission          => ChildrenPerm,
-                               Children_Permission => ChildrenPerm));
-                         Perm_Tree_Maps.Set (C.all.Tree.Component, Elem, Son);
-                         Next_Component_Or_Discriminant (Elem);
-                      end loop;
- 
-                      --  Now we set the right field to Borrowed, and then we
-                      --  return the tree to the sons, so that the recursion can
-                      --  continue.
- 
-                      declare
-                         Selected_Component : constant Entity_Id :=
-                           Entity (Selector_Name (N));
-                         Selected_C : Perm_Tree_Access := Perm_Tree_Maps.Get
-                           (Component (C), Selected_Component);
- 
-                      begin
-                         if Selected_C = null then
-                            Selected_C := Other_Components (C);
-                         end if;
- 
-                         pragma Assert (Selected_C /= null);
-                         Selected_C.all.Tree.Permission := Borrowed;
-                         return Selected_C;
-                      end;
-                   end;
- 
-                else
-                   raise Program_Error;
-                end if;
-             end;
- 
-             --  We set the permission tree of its prefix, and then we extract
-             --  from the returned pointer the subtree and assign an adequate
-             --  permission to it, if unfolded. If folded, we unroll the tree in
-             --  one step.
- 
-          when N_Indexed_Component
-             | N_Slice
-          =>
-             declare
-                C : constant Perm_Tree_Access :=
-                  Set_Perm_Prefixes_Borrow (Prefix (N));
- 
-             begin
-                if C = null then
- 
-                   --  We went through a function call, do nothing
- 
-                   return null;
-                end if;
- 
-                pragma Assert (Permission (C) = Borrowed);
-                pragma Assert (Kind (C) = Entire_Object
-                               or else Kind (C) = Array_Component);
- 
-                if Kind (C) = Array_Component then
- 
-                   --  The tree is unfolded. We just modify the permission and
-                   --  return the elem subtree.
- 
-                   pragma Assert (Get_Elem (C) /= null);
-                   C.all.Tree.Get_Elem.all.Tree.Permission := Borrowed;
-                   return Get_Elem (C);
- 
-                elsif Kind (C) = Entire_Object then
-                   declare
-                      --  Expand the tree. Replace node with Array_Component.
- 
-                      Son : Perm_Tree_Access;
- 
-                   begin
-                      Son := new Perm_Tree_Wrapper'
-                        (Tree =>
-                           (Kind                => Entire_Object,
-                            Is_Node_Deep        => Is_Node_Deep (C),
-                            Permission          => Borrowed,
-                            Children_Permission => Children_Permission (C)));
- 
-                      --  We change the current node from Entire_Object
-                      --  to Array_Component with same permission and the
-                      --  previously defined son.
- 
-                      C.all.Tree := (Kind         => Array_Component,
-                                     Is_Node_Deep => Is_Node_Deep (C),
-                                     Permission   => Borrowed,
-                                     Get_Elem     => Son);
-                      return Get_Elem (C);
-                   end;
- 
-                else
-                   raise Program_Error;
-                end if;
-             end;
- 
-             --  We set the permission tree of its prefix, and then we extract
-             --  from the returned pointer the subtree and assign an adequate
-             --  permission to it, if unfolded. If folded, we unroll the tree
-             --  at one step.
- 
-          when N_Explicit_Dereference =>
-             declare
-                C : constant Perm_Tree_Access :=
-                  Set_Perm_Prefixes_Borrow (Prefix (N));
- 
-             begin
-                if C = null then
- 
-                   --  We went through a function call. Do nothing.
- 
-                   return null;
-                end if;
- 
-                --  The permission of the returned node should be No
- 
-                pragma Assert (Permission (C) = Borrowed);
-                pragma Assert (Kind (C) = Entire_Object
-                               or else Kind (C) = Reference);
- 
-                if Kind (C) = Reference then
- 
-                   --  The tree is unfolded. We just modify the permission and
-                   --  return the elem subtree.
- 
-                   pragma Assert (Get_All (C) /= null);
-                   C.all.Tree.Get_All.all.Tree.Permission := Borrowed;
-                   return Get_All (C);
- 
-                elsif Kind (C) = Entire_Object then
-                   declare
-                      --  Expand the tree. Replace the node with Reference.
- 
-                      Son : Perm_Tree_Access;
- 
-                   begin
-                      Son := new Perm_Tree_Wrapper'
-                        (Tree =>
-                           (Kind                => Entire_Object,
-                            Is_Node_Deep        => Is_Deep (Etype (N)),
-                            Permission          => Borrowed,
-                            Children_Permission => Children_Permission (C)));
- 
-                      --  We change the current node from Entire_Object to
-                      --  Reference with Borrowed and the previous son.
- 
-                      pragma Assert (Is_Node_Deep (C));
-                      C.all.Tree := (Kind         => Reference,
-                                     Is_Node_Deep => Is_Node_Deep (C),
-                                     Permission   => Borrowed,
-                                     Get_All      => Son);
-                      return Get_All (C);
-                   end;
- 
-                else
-                   raise Program_Error;
-                end if;
-             end;
- 
-          when N_Function_Call =>
-             return null;
- 
-          when others =>
-             raise Program_Error;
-       end case;
-    end Set_Perm_Prefixes_Borrow;
- 
-    -------------------
-    -- Setup_Globals --
-    -------------------
- 
-    procedure Setup_Globals (Subp : Entity_Id) is
-       procedure Setup_Globals_From_List
-         (First_Item : Node_Id;
-          Kind       : Formal_Kind);
-       --  Set up global items from the list starting at Item
- 
-       procedure Setup_Globals_Of_Mode (Global_Mode : Name_Id);
-       --  Set up global items for the mode Global_Mode
- 
-       -----------------------------
-       -- Setup_Globals_From_List --
-       -----------------------------
- 
-       procedure Setup_Globals_From_List
-         (First_Item : Node_Id;
-          Kind       : Formal_Kind)
-       is
-          Item : Node_Id := First_Item;
-          E    : Entity_Id;
- 
-       begin
-          while Present (Item) loop
-             E := Entity (Item);
- 
-             --  Ignore abstract states, which play no role in pointer aliasing
- 
-             if Ekind (E) = E_Abstract_State then
-                null;
-             else
-                Setup_Parameter_Or_Global (E, Kind, Global_Var => True);
-             end if;
-             Next_Global (Item);
-          end loop;
-       end Setup_Globals_From_List;
- 
-       ---------------------------
-       -- Setup_Globals_Of_Mode --
-       ---------------------------
- 
-       procedure Setup_Globals_Of_Mode (Global_Mode : Name_Id) is
-          Kind : Formal_Kind;
- 
-       begin
-          case Global_Mode is
-             when Name_Input
-                | Name_Proof_In
-             =>
-                Kind := E_In_Parameter;
- 
-             when Name_Output =>
-                Kind := E_Out_Parameter;
- 
-             when Name_In_Out =>
-                Kind := E_In_Out_Parameter;
- 
-             when others =>
-                raise Program_Error;
-          end case;
- 
-          --  Set up both global items from Global and Refined_Global pragmas
- 
-          Setup_Globals_From_List (First_Global (Subp, Global_Mode), Kind);
-          Setup_Globals_From_List
-            (First_Global (Subp, Global_Mode, Refined => True), Kind);
-       end Setup_Globals_Of_Mode;
- 
-    --  Start of processing for Setup_Globals
- 
-    begin
-       Setup_Globals_Of_Mode (Name_Proof_In);
-       Setup_Globals_Of_Mode (Name_Input);
-       Setup_Globals_Of_Mode (Name_Output);
-       Setup_Globals_Of_Mode (Name_In_Out);
-    end Setup_Globals;
- 
-    -------------------------------
-    -- Setup_Parameter_Or_Global --
-    -------------------------------
- 
-    procedure Setup_Parameter_Or_Global
-      (Id         : Entity_Id;
-       Mode       : Formal_Kind;
-       Global_Var : Boolean)
-    is
-       Elem     : Perm_Tree_Access;
-       View_Typ : Entity_Id;
- 
-    begin
-       if Present (Full_View (Etype (Id))) then
-          View_Typ := Full_View (Etype (Id));
-       else
-          View_Typ := Etype (Id);
-       end if;
- 
-       Elem := new Perm_Tree_Wrapper'
-         (Tree =>
-            (Kind                => Entire_Object,
-             Is_Node_Deep        => Is_Deep (Etype (Id)),
-             Permission          => Unrestricted,
-             Children_Permission => Unrestricted));
- 
-       case Mode is
- 
-          --  All out and in out parameters are considered to be unrestricted.
-          --  They are whether borrowed or moved. Ada Rules would restrict
-          --  these permissions further. For example an in parameter cannot
-          --  be written.
- 
-          --  In the following we deal with in parameters that can be observed.
-          --  We only consider the observing cases.
- 
-          when E_In_Parameter =>
- 
-             --  Handling global variables as IN parameters here.
-             --  Remove the following condition once it's decided how globals
-             --  should be considered. ???
-             --
-             --  In SPARK, IN access-to-variable is an observe operation for
-             --  a function, and a borrow operation for a procedure.
- 
-             if not Global_Var then
-                if (Is_Access_Type (View_Typ)
-                     and then Is_Access_Constant (View_Typ)
-                     and then Is_Anonymous_Access_Type (View_Typ))
-                  or else
-                    (Is_Access_Type (View_Typ)
-                      and then Ekind (Scope (Id)) = E_Function)
-                  or else
-                    (not Is_Access_Type (View_Typ)
-                      and then Is_Deep (View_Typ)
-                      and then not Is_Anonymous_Access_Type (View_Typ))
-                then
-                   Elem.all.Tree.Permission := Observed;
-                   Elem.all.Tree.Children_Permission := Observed;
- 
-                else
-                   Elem.all.Tree.Permission := Unrestricted;
-                   Elem.all.Tree.Children_Permission := Unrestricted;
-                end if;
- 
-             else
-                Elem.all.Tree.Permission := Observed;
-                Elem.all.Tree.Children_Permission := Observed;
-             end if;
- 
-             --  When out or in/out formal or global parameters, we set them to
-             --  the Unrestricted state. "We want to be able to assume that all
-             --  relevant writable globals are unrestricted when a subprogram
-             --  starts executing". Formal parameters of mode out or in/out
-             --  are whether Borrowers or the targets of a move operation:
-             --  they start theirs lives in the subprogram as Unrestricted.
- 
-          when others =>
-             Elem.all.Tree.Permission := Unrestricted;
-             Elem.all.Tree.Children_Permission := Unrestricted;
-       end case;
- 
-       Set (Current_Perm_Env, Id, Elem);
-    end Setup_Parameter_Or_Global;
- 
-    ----------------------
-    -- Setup_Parameters --
-    ----------------------
- 
-    procedure Setup_Parameters (Subp : Entity_Id) is Formal : Entity_Id;
-    begin
-       Formal := First_Formal (Subp);
-       while Present (Formal) loop
-          Setup_Parameter_Or_Global
-            (Formal, Ekind (Formal), Global_Var => False);
-          Next_Formal (Formal);
-       end loop;
-    end Setup_Parameters;
- 
-    -------------------------------
-    -- Has_Ownership_Aspect_True --
-    -------------------------------
- 
-    function Has_Ownership_Aspect_True
-      (N   : Entity_Id;
-       Msg : String)
-       return Boolean
-    is
-    begin
-       case Ekind (Etype (N)) is
-          when Access_Kind =>
-             if Ekind (Etype (N)) = E_General_Access_Type then
-                Error_Msg_NE (Msg & " & not allowed " &
-                     "(Named General Access type)", N, N);
-                return False;
- 
-             else
-                return True;
-             end if;
- 
-          when E_Array_Type
-             | E_Array_Subtype
-          =>
-             declare
-                Com_Ty : constant Node_Id := Component_Type (Etype (N));
-                Ret    : Boolean :=  Has_Ownership_Aspect_True (Com_Ty, "");
- 
-             begin
-                if Nkind (Parent (N)) = N_Full_Type_Declaration and
-                  Is_Anonymous_Access_Type (Com_Ty)
-                then
-                   Ret := False;
-                end if;
- 
-                if not Ret then
-                   Error_Msg_NE (Msg & " & not allowed "
-                                 & "(Components of Named General Access type or"
-                                 & " Anonymous type)", N, N);
-                end if;
-                return Ret;
-             end;
- 
-          --  ??? What about hidden components
- 
-          when E_Record_Type
-             | E_Record_Subtype
-          =>
-             declare
-                Elmt        : Entity_Id;
-                Elmt_T_Perm : Boolean := True;
-                Elmt_Perm, Elmt_Anonym : Boolean;
- 
-             begin
-                Elmt := First_Component_Or_Discriminant (Etype (N));
-                while Present (Elmt) loop
-                   Elmt_Perm := Has_Ownership_Aspect_True (Elmt,
-                                                       "type of component");
-                   Elmt_Anonym := Is_Anonymous_Access_Type (Etype (Elmt));
-                   if Elmt_Anonym then
-                      Error_Msg_NE
-                        ("type of component & not allowed"
-                         & " (Components of Anonymous type)", Elmt, Elmt);
-                   end if;
-                   Elmt_T_Perm := Elmt_T_Perm and Elmt_Perm and not Elmt_Anonym;
-                   Next_Component_Or_Discriminant (Elmt);
-                end loop;
-                if not Elmt_T_Perm then
-                      Error_Msg_NE
-                        (Msg & " & not allowed (One or "
-                         & "more components have Ownership Aspect False)",
-                         N, N);
-                end if;
-                return Elmt_T_Perm;
-             end;
- 
-          when others =>
-             return True;
-       end case;
- 
-    end Has_Ownership_Aspect_True;
- end Sem_SPARK;
--- 0 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_spark.ads gcc-10.1.0/gcc/ada/sem_spark.ads
*** gcc-9.3.0/gcc/ada/sem_spark.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_spark.ads	Thu Jan  1 00:00:00 1970
***************
*** 1,143 ****
- ------------------------------------------------------------------------------
- --                                                                          --
- --                         GNAT COMPILER COMPONENTS                         --
- --                                                                          --
- --                            S E M _ S P A R K                             --
- --                                                                          --
- --                                 S p e c                                  --
- --                                                                          --
- --              Copyright (C) 2017-2019, Free Software Foundation, Inc.     --
- --                                                                          --
- -- GNAT is free software;  you can  redistribute it  and/or modify it under --
- -- terms of the  GNU General Public License as published  by the Free Soft- --
- -- ware  Foundation;  either version 3,  or (at your option) any later ver- --
- -- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
- -- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
- -- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
- -- for  more details.  You should have  received  a copy of the GNU General --
- -- Public License  distributed with GNAT; see file COPYING3.  If not, go to --
- -- http://www.gnu.org/licenses for a complete copy of the license.          --
- --                                                                          --
- -- GNAT was originally developed  by the GNAT team at  New York University. --
- -- Extensive contributions were provided by Ada Core Technologies Inc.      --
- --                                                                          --
- ------------------------------------------------------------------------------
- 
- --  This package implements an anti-aliasing analysis for access types. The
- --  rules that are enforced are defined in the anti-aliasing section of the
- --  SPARK RM 6.4.2
- --
- --  Check_Safe_Pointers is called by Gnat1drv, when GNATprove mode is
- --  activated. It does an analysis of the source code, looking for code that is
- --  considered as SPARK and launches another function called Analyze_Node that
- --  will do the whole analysis.
- --
- --  A path is an abstraction of a name, of which all indices, slices (for
- --  indexed components) and function calls have been abstracted and all
- --  dereferences are made explicit. A path is the atomic element viewed by the
- --  analysis, with the notion of prefixes and extensions of different paths.
- --
- --  The analysis explores the AST, and looks for different constructs
- --  that may involve aliasing. These main constructs are assignments
- --  (N_Assignment_Statement, N_Object_Declaration, ...), or calls
- --  (N_Procedure_Call_Statement, N_Entry_Call_Statement, N_Function_Call).
- --  The analysis checks the permissions of each construct and updates them
- --  according to the SPARK RM. This can follow three main different types
- --  of operations: move, borrow, and observe.
- 
- ----------------------------
- -- Deep and shallow types --
- ----------------------------
- 
- --  The analysis focuses on objects that can cause problems in terms of pointer
- --  aliasing. These objects have types that are called deep. Deep types are
- --  defined as being either types with an access part or class-wide types
- --  (which may have an access part in a derived type). Non-deep types are
- --  called shallow. Some objects of shallow type may cause pointer aliasing
- --  problems when they are explicitely marked as aliased (and then the aliasing
- --  occurs when we take the Access to this object and store it in a pointer).
- 
- ----------
- -- Move --
- ----------
- 
- --  Moves can happen at several points in the program: during assignment (and
- --  any similar statement such as object declaration with initial value), or
- --  during return statements.
- --
- --  The underlying concept consists of transferring the ownership of any path
- --  on the right-hand side to the left-hand side. There are some details that
- --  should be taken into account so as not to transfer paths that appear only
- --  as intermediate results of a more complex expression.
- 
- --  More specifically, the SPARK RM defines moved expressions, and any moved
- --  expression that points directly to a path is then checked and sees its
- --  permissions updated accordingly.
- 
- ------------
- -- Borrow --
- ------------
- 
- --  Borrows can happen in subprogram calls. They consist of a temporary
- --  transfer of ownership from a caller to a callee. Expressions that can be
- --  borrowed can be found in either procedure or entry actual parameters, and
- --  consist of parameters of mode either "out" or "in out", or parameters of
- --  mode "in" that are of type nonconstant access-to-variable. We consider
- --  global variables as implicit parameters to subprograms, with their mode
- --  given by the Global contract associated to the subprogram. Note that the
- --  analysis looks for such a Global contract mentioning any global variable
- --  of deep type accessed directly in the subprogram, and it raises an error if
- --  there is no Global contract, or if the Global contract does not mention the
- --  variable.
- --
- --  A borrow of a parameter X is equivalent in terms of aliasing to moving
- --  X'Access to the callee, and then assigning back X at the end of the call.
- --
- --  Borrowed parameters should have read-write permission (or write-only for
- --  "out" parameters), and should all have read-write permission at the end
- --  of the call (this guarantee is ensured by the callee).
- 
- -------------
- -- Observe --
- -------------
- 
- --  Observed parameters are all the other parameters that are not borrowed and
- --  that may cause problems with aliasing. They are considered as being sent to
- --  the callee with Read-Only permission, so that they can be aliased safely.
- --  This is the only construct that allows aliasing that does not prevent
- --  accessing the old path that is being aliased. However, this comes with
- --  the restriction that those aliased path cannot be written in the callee.
- 
- --------------------
- -- Implementation --
- --------------------
- 
- --  The implementation is based on trees that represent the possible paths
- --  in the source code. Those trees can be unbounded in depth, hence they are
- --  represented using lazy data structures, whose laziness is handled manually.
- --  Each time an identifier is declared, its path is added to the permission
- --  environment as a tree with only one node, the declared identifier. Each
- --  time a path is checked or updated, we look in the tree at the adequate
- --  node, unfolding the tree whenever needed.
- 
- --  For this, each node has several variables that indicate whether it is
- --  deep (Is_Node_Deep), what permission it has (Permission), and what is
- --  the lowest permission of all its descendants (Children_Permission). After
- --  unfolding the tree, we update the permissions of each node, deleting the
- --  Children_Permission, and specifying new ones for the leaves of the unfolded
- --  tree.
- 
- --  After assigning a path, the descendants of the assigned path are dumped
- --  (and hence the tree is folded back), given that all descendants directly
- --  get read-write permission, which can be specified using the node's
- --  Children_Permission field.
- 
- with Types; use Types;
- 
- package Sem_SPARK is
- 
-    procedure Check_Safe_Pointers (N : Node_Id);
-    --  The entry point of this package. It analyzes a node and reports errors
-    --  when there are violations of aliasing rules.
- 
- end Sem_SPARK;
--- 0 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_type.adb gcc-10.1.0/gcc/ada/sem_type.adb
*** gcc-9.3.0/gcc/ada/sem_type.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_type.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Type is
*** 2286,2297 ****
        --  ration "type P is access Integer" and an anonymous access to Integer,
        --  P is convertible to "access Integer" by 4.6 (24.11-24.15), but there
        --  is no rule in 4.6 that allows "access Integer" to be converted to P.
  
        elsif Ada_Version >= Ada_2005
          and then Ekind_In (Etype (L), E_Anonymous_Access_Type,
                                        E_Anonymous_Access_Subprogram_Type)
          and then Is_Access_Type (Etype (R))
-         and then Ekind (Etype (R)) /= E_Access_Type
        then
           return Etype (L);
  
--- 2286,2298 ----
        --  ration "type P is access Integer" and an anonymous access to Integer,
        --  P is convertible to "access Integer" by 4.6 (24.11-24.15), but there
        --  is no rule in 4.6 that allows "access Integer" to be converted to P.
+       --  Note that this does not preclude one operand to be a pool-specific
+       --  access type, as a previous version of this code enforced.
  
        elsif Ada_Version >= Ada_2005
          and then Ekind_In (Etype (L), E_Anonymous_Access_Type,
                                        E_Anonymous_Access_Subprogram_Type)
          and then Is_Access_Type (Etype (R))
        then
           return Etype (L);
  
*************** package body Sem_Type is
*** 2299,2305 ****
          and then Ekind_In (Etype (R), E_Anonymous_Access_Type,
                                        E_Anonymous_Access_Subprogram_Type)
          and then Is_Access_Type (Etype (L))
-         and then Ekind (Etype (L)) /= E_Access_Type
        then
           return Etype (R);
  
--- 2300,2305 ----
*************** package body Sem_Type is
*** 2849,2855 ****
           return False;
  
        else
!          return In_Generic_Actual (Parent (Par));
        end if;
     end In_Generic_Actual;
  
--- 2849,2855 ----
           return False;
  
        else
!          return In_Generic_Actual (Par);
        end if;
     end In_Generic_Actual;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_util.adb gcc-10.1.0/gcc/ada/sem_util.adb
*** gcc-9.3.0/gcc/ada/sem_util.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_util.adb	Thu May  7 10:49:59 2020
***************
*** 26,32 ****
  with Treepr; -- ???For debugging code below
  
  with Aspects;  use Aspects;
- with Atree;    use Atree;
  with Casing;   use Casing;
  with Checks;   use Checks;
  with Debug;    use Debug;
--- 26,31 ----
*************** with Tbuild;   use Tbuild;
*** 68,73 ****
--- 67,73 ----
  with Ttypes;   use Ttypes;
  with Uname;    use Uname;
  
+ with GNAT.Heap_Sort_G;
  with GNAT.HTable; use GNAT.HTable;
  
  package body Sem_Util is
*************** package body Sem_Util is
*** 122,127 ****
--- 122,131 ----
     --  T is a derived tagged type. Check whether the type extension is null.
     --  If the parent type is fully initialized, T can be treated as such.
  
+    function Is_Atomic_Object_Entity (Id : Entity_Id) return Boolean;
+    --  Determine whether arbitrary entity Id denotes an atomic object as per
+    --  RM C.6(7).
+ 
     function Is_Fully_Initialized_Variant (Typ : Entity_Id) return Boolean;
     --  Subsidiary to Is_Fully_Initialized_Type. For an unconstrained type
     --  with discriminants whose default values are static, examine only the
*************** package body Sem_Util is
*** 248,253 ****
--- 252,290 ----
        return Interface_List (Nod);
     end Abstract_Interface_List;
  
+    ----------------------------------
+    -- Acquire_Warning_Match_String --
+    ----------------------------------
+ 
+    function Acquire_Warning_Match_String (Str_Lit : Node_Id) return String is
+       S : constant String := To_String (Strval (Str_Lit));
+    begin
+       if S = "" then
+          return "";
+       else
+          --  Put "*" before or after or both, if it's not already there
+ 
+          declare
+             F : constant Boolean := S (S'First) = '*';
+             L : constant Boolean := S (S'Last) = '*';
+          begin
+             if F then
+                if L then
+                   return S;
+                else
+                   return S & "*";
+                end if;
+             else
+                if L then
+                   return "*" & S;
+                else
+                   return "*" & S & "*";
+                end if;
+             end if;
+          end;
+       end if;
+    end Acquire_Warning_Match_String;
+ 
     --------------------------------
     -- Add_Access_Type_To_Process --
     --------------------------------
*************** package body Sem_Util is
*** 1154,1171 ****
     is
        Loc       : constant Source_Ptr := Sloc (N);
        P         : constant Node_Id    := Prefix (N);
        D         : Elmt_Id;
        Id        : Node_Id;
        Index_Typ : Entity_Id;
  
        Desig_Typ : Entity_Id;
        --  This is either a copy of T, or if T is an access type, then it is
        --  the directly designated type of this access type.
  
        function Build_Actual_Array_Constraint return List_Id;
        --  If one or more of the bounds of the component depends on
        --  discriminants, build  actual constraint using the discriminants
!       --  of the prefix.
  
        function Build_Actual_Record_Constraint return List_Id;
        --  Similar to previous one, for discriminated components constrained
--- 1191,1218 ----
     is
        Loc       : constant Source_Ptr := Sloc (N);
        P         : constant Node_Id    := Prefix (N);
+ 
        D         : Elmt_Id;
        Id        : Node_Id;
        Index_Typ : Entity_Id;
+       Sel       : Entity_Id  := Empty;
  
        Desig_Typ : Entity_Id;
        --  This is either a copy of T, or if T is an access type, then it is
        --  the directly designated type of this access type.
  
+       function Build_Access_Record_Constraint (C : List_Id) return List_Id;
+       --  If the record component is a constrained access to the current
+       --  record, the subtype has not been constructed during analysis of
+       --  the enclosing record type (see Analyze_Access). In that case, build
+       --  a constrained access subtype after replacing references to the
+       --  enclosing discriminants with the corresponding discriminant values
+       --  of the prefix.
+ 
        function Build_Actual_Array_Constraint return List_Id;
        --  If one or more of the bounds of the component depends on
        --  discriminants, build  actual constraint using the discriminants
!       --  of the prefix, as above.
  
        function Build_Actual_Record_Constraint return List_Id;
        --  Similar to previous one, for discriminated components constrained
*************** package body Sem_Util is
*** 1253,1262 ****
           return Constraints;
        end Build_Actual_Record_Constraint;
  
     --  Start of processing for Build_Actual_Subtype_Of_Component
  
     begin
!       --  Why the test for Spec_Expression mode here???
  
        if In_Spec_Expression then
           return Empty;
--- 1300,1352 ----
           return Constraints;
        end Build_Actual_Record_Constraint;
  
+       ------------------------------------
+       -- Build_Access_Record_Constraint --
+       ------------------------------------
+ 
+       function Build_Access_Record_Constraint (C : List_Id) return List_Id is
+          Constraints : constant List_Id := New_List;
+          D           : Node_Id;
+          D_Val       : Node_Id;
+ 
+       begin
+          --  Retrieve the constraint from the component declaration, because
+          --  the component subtype has not been constructed and the component
+          --  type is an unconstrained access.
+ 
+          D := First (C);
+          while Present (D) loop
+             if Nkind (D) = N_Discriminant_Association
+               and then Denotes_Discriminant (Expression (D))
+             then
+                D_Val := New_Copy_Tree (D);
+                Set_Expression (D_Val,
+                  Make_Selected_Component (Loc,
+                    Prefix => New_Copy_Tree (P),
+                    Selector_Name =>
+                      New_Occurrence_Of (Entity (Expression (D)), Loc)));
+ 
+             elsif Denotes_Discriminant (D) then
+                D_Val := Make_Selected_Component (Loc,
+                  Prefix => New_Copy_Tree (P),
+                  Selector_Name => New_Occurrence_Of (Entity (D), Loc));
+ 
+             else
+                D_Val := New_Copy_Tree (D);
+             end if;
+ 
+             Append (D_Val, Constraints);
+             Next (D);
+          end loop;
+ 
+          return Constraints;
+       end Build_Access_Record_Constraint;
+ 
     --  Start of processing for Build_Actual_Subtype_Of_Component
  
     begin
!       --  The subtype does not need to be created for a selected component
!       --  in a Spec_Expression.
  
        if In_Spec_Expression then
           return Empty;
*************** package body Sem_Util is
*** 1281,1299 ****
                 Remove_Side_Effects (P);
                 return Build_Actual_Subtype (T, N);
              end if;
           else
              return Empty;
           end if;
        end if;
  
!       if Ekind (T) = E_Access_Subtype then
           Desig_Typ := Designated_Type (T);
        else
           Desig_Typ := T;
        end if;
  
        if Ekind (Desig_Typ) = E_Array_Subtype then
           Id := First_Index (Desig_Typ);
           while Present (Id) loop
              Index_Typ := Underlying_Type (Etype (Id));
  
--- 1371,1403 ----
                 Remove_Side_Effects (P);
                 return Build_Actual_Subtype (T, N);
              end if;
+ 
           else
              return Empty;
           end if;
+ 
+       elsif Nkind (N) = N_Selected_Component then
+          --  The entity of the selected component allows us to retrieve
+          --  the original constraint from its component declaration.
+ 
+          Sel := Entity (Selector_Name (N));
+          if Nkind (Parent (Sel)) /= N_Component_Declaration then
+             return Empty;
+          end if;
        end if;
  
!       if Is_Access_Type (T) then
           Desig_Typ := Designated_Type (T);
+ 
        else
           Desig_Typ := T;
        end if;
  
        if Ekind (Desig_Typ) = E_Array_Subtype then
           Id := First_Index (Desig_Typ);
+ 
+          --  Check whether an index bound is constrained by a discriminant.
+ 
           while Present (Id) loop
              Index_Typ := Underlying_Type (Etype (Id));
  
*************** package body Sem_Util is
*** 1312,1317 ****
--- 1416,1422 ----
  
        elsif Is_Composite_Type (Desig_Typ)
          and then Has_Discriminants (Desig_Typ)
+         and then not Is_Empty_Elmt_List (Discriminant_Constraint (Desig_Typ))
          and then not Has_Unknown_Discriminants (Desig_Typ)
        then
           if Is_Private_Type (Desig_Typ)
*************** package body Sem_Util is
*** 1331,1336 ****
--- 1436,1472 ----
  
              Next_Elmt (D);
           end loop;
+ 
+       --  Special processing for an access record component that is
+       --  the target of an assignment. If the designated type is an
+       --  unconstrained discriminated record we create its actual
+       --  subtype now.
+ 
+       elsif Ekind (T) = E_Access_Type
+         and then Present (Sel)
+         and then Has_Per_Object_Constraint (Sel)
+         and then Nkind (Parent (N)) = N_Assignment_Statement
+         and then N = Name (Parent (N))
+         --  and then not Inside_Init_Proc
+         --  and then Has_Discriminants (Desig_Typ)
+         --  and then not Is_Constrained (Desig_Typ)
+       then
+          declare
+             S_Indic : constant Node_Id :=
+               (Subtype_Indication
+                     (Component_Definition (Parent (Sel))));
+             Discs : List_Id;
+          begin
+             if Nkind (S_Indic) = N_Subtype_Indication then
+                Discs := Constraints (Constraint (S_Indic));
+ 
+                Remove_Side_Effects (P);
+                return Build_Component_Subtype
+                   (Build_Access_Record_Constraint (Discs), Loc, T);
+             else
+                return Empty;
+             end if;
+          end;
        end if;
  
        --  If none of the above, the actual and nominal subtypes are the same
*************** package body Sem_Util is
*** 5359,5369 ****
     -----------------------------------
  
     function Compile_Time_Constraint_Error
!      (N    : Node_Id;
!       Msg  : String;
!       Ent  : Entity_Id  := Empty;
!       Loc  : Source_Ptr := No_Location;
!       Warn : Boolean    := False) return Node_Id
     is
        Msgc : String (1 .. Msg'Length + 3);
        --  Copy of message, with room for possible ?? or << and ! at end
--- 5495,5506 ----
     -----------------------------------
  
     function Compile_Time_Constraint_Error
!      (N         : Node_Id;
!       Msg       : String;
!       Ent       : Entity_Id  := Empty;
!       Loc       : Source_Ptr := No_Location;
!       Warn      : Boolean    := False;
!       Extra_Msg : String     := "") return Node_Id
     is
        Msgc : String (1 .. Msg'Length + 3);
        --  Copy of message, with room for possible ?? or << and ! at end
*************** package body Sem_Util is
*** 5457,5462 ****
--- 5594,5605 ----
                 Error_Msg_NEL (Msgc (1 .. Msgl), N, Etype (N), Eloc);
              end if;
  
+             --  Emit any extra message as a continuation
+ 
+             if Extra_Msg /= "" then
+                Error_Msg_N ('\' & Extra_Msg, N);
+             end if;
+ 
              if Wmsg then
  
                 --  Check whether the context is an Init_Proc
*************** package body Sem_Util is
*** 6427,6434 ****
     -- Dynamic_Accessibility_Level --
     ---------------------------------
  
!    function Dynamic_Accessibility_Level (Expr : Node_Id) return Node_Id is
!       Loc : constant Source_Ptr := Sloc (Expr);
  
        function Make_Level_Literal (Level : Uint) return Node_Id;
        --  Construct an integer literal representing an accessibility level
--- 6570,6577 ----
     -- Dynamic_Accessibility_Level --
     ---------------------------------
  
!    function Dynamic_Accessibility_Level (N : Node_Id) return Node_Id is
!       Loc : constant Source_Ptr := Sloc (N);
  
        function Make_Level_Literal (Level : Uint) return Node_Id;
        --  Construct an integer literal representing an accessibility level
*************** package body Sem_Util is
*** 6448,6454 ****
  
        --  Local variables
  
!       E : Entity_Id;
  
     --  Start of processing for Dynamic_Accessibility_Level
  
--- 6591,6602 ----
  
        --  Local variables
  
!       Expr : Node_Id := Original_Node (N);
!       --  Expr references the original node because at this stage N may be the
!       --  reference to a variable internally created by the frontend to remove
!       --  side effects of an expression.
! 
!       E    : Entity_Id;
  
     --  Start of processing for Dynamic_Accessibility_Level
  
*************** package body Sem_Util is
*** 6460,6475 ****
              return Dynamic_Accessibility_Level (Renamed_Object (E));
           end if;
  
!          if Is_Formal (E) or else Ekind_In (E, E_Variable, E_Constant) then
!             if Present (Extra_Accessibility (E)) then
!                return New_Occurrence_Of (Extra_Accessibility (E), Loc);
!             end if;
           end if;
        end if;
  
        --  Unimplemented: Ptr.all'Access, where Ptr has Extra_Accessibility ???
  
        case Nkind (Expr) is
  
           --  For access discriminant, the level of the enclosing object
  
--- 6608,6646 ----
              return Dynamic_Accessibility_Level (Renamed_Object (E));
           end if;
  
!          if (Is_Formal (E)
!               or else Ekind_In (E, E_Variable, E_Constant))
!            and then Present (Get_Accessibility (E))
!          then
!             return New_Occurrence_Of (Get_Accessibility (E), Loc);
           end if;
        end if;
  
+       --  Handle a constant-folded conditional expression by avoiding use of
+       --  the original node.
+ 
+       if Nkind_In (Expr, N_Case_Expression, N_If_Expression) then
+          Expr := N;
+       end if;
+ 
        --  Unimplemented: Ptr.all'Access, where Ptr has Extra_Accessibility ???
  
        case Nkind (Expr) is
+          --  It may be possible that we have an access object denoted by an
+          --  attribute reference for 'Loop_Entry which may, in turn, have an
+          --  indexed component representing a loop identifier.
+ 
+          --  In this case we must climb up the indexed component and set expr
+          --  to the attribute reference so the rest of the machinery can
+          --  operate as expected.
+ 
+          when N_Indexed_Component =>
+             if Nkind (Prefix (Expr)) = N_Attribute_Reference
+               and then Get_Attribute_Id (Attribute_Name (Prefix (Expr)))
+                          = Attribute_Loop_Entry
+             then
+                Expr := Prefix (Expr);
+             end if;
  
           --  For access discriminant, the level of the enclosing object
  
*************** package body Sem_Util is
*** 6484,6489 ****
--- 6655,6667 ----
           when N_Attribute_Reference =>
              case Get_Attribute_Id (Attribute_Name (Expr)) is
  
+                --  Ignore 'Loop_Entry, 'Result, and 'Old as they can be used to
+                --  identify access objects and do not have an effect on
+                --  accessibility level.
+ 
+                when Attribute_Loop_Entry | Attribute_Old | Attribute_Result =>
+                   null;
+ 
                 --  For X'Access, the level of the prefix X
  
                 when Attribute_Access =>
*************** package body Sem_Util is
*** 6505,6516 ****
  
           when N_Allocator =>
  
!             --  Unimplemented: depends on context. As an actual parameter where
!             --  formal type is anonymous, use
!             --    Scope_Depth (Current_Scope) + 1.
!             --  For other cases, see 3.10.2(14/3) and following. ???
  
!             null;
  
           when N_Type_Conversion =>
              if not Is_Local_Anonymous_Access (Etype (Expr)) then
--- 6683,6751 ----
  
           when N_Allocator =>
  
!             --  This is not fully implemented since it depends on context (see
!             --  3.10.2(14/3-14.2/3). More work is needed in the following cases
!             --
!             --  1) For an anonymous allocator defining the value of an access
!             --     parameter, the accessibility level is that of the innermost
!             --     master of the call; however currently we pass the level of
!             --     execution of the called subprogram, which is one greater
!             --     than the current scope level (see Expand_Call_Helper).
!             --
!             --     For example, a statement is a master and a declaration is
!             --     not a master; so we should not pass in the same level for
!             --     the following cases:
!             --
!             --         function F (X : access Integer) return T is ... ;
!             --         Decl : T := F (new Integer); -- level is off by one
!             --      begin
!             --         Decl := F (new Integer); -- we get this case right
!             --
!             --  2) For an anonymous allocator that defines the result of a
!             --     function with an access result, the accessibility level is
!             --     determined as though the allocator were in place of the call
!             --     of the function. In the special case of a call that is the
!             --     operand of a type conversion the level is that of the target
!             --     access type of the conversion.
!             --
!             --  3) For an anonymous allocator defining an access discriminant
!             --     the accessibility level is determined as follows:
!             --       * for an allocator used to define the discriminant of an
!             --         object, the level of the object
!             --       * for an allocator used to define the constraint in a
!             --         subtype_indication in any other context, the level of
!             --         the master that elaborates the subtype_indication.
  
!             case Nkind (Parent (N)) is
!                when N_Object_Declaration =>
! 
!                   --  For an anonymous allocator whose type is that of a
!                   --  stand-alone object of an anonymous access-to-object type,
!                   --  the accessibility level is that of the declaration of the
!                   --  stand-alone object.
! 
!                   return
!                     Make_Level_Literal
!                       (Object_Access_Level
!                          (Defining_Identifier (Parent (N))));
! 
!                when N_Assignment_Statement =>
!                   return
!                     Make_Level_Literal
!                       (Object_Access_Level (Name (Parent (N))));
! 
!                when others =>
!                   declare
!                      S : constant String :=
!                            Node_Kind'Image (Nkind (Parent (N)));
!                   begin
!                      Error_Msg_Strlen := S'Length;
!                      Error_Msg_String (1 .. Error_Msg_Strlen) := S;
!                      Error_Msg_N
!                        ("unsupported context for anonymous allocator (~)",
!                         Parent (N));
!                   end;
!             end case;
  
           when N_Type_Conversion =>
              if not Is_Local_Anonymous_Access (Etype (Expr)) then
*************** package body Sem_Util is
*** 6696,6728 ****
     -- Enclosing_Generic_Body --
     ----------------------------
  
!    function Enclosing_Generic_Body
!      (N : Node_Id) return Node_Id
!    is
!       P    : Node_Id;
!       Decl : Node_Id;
!       Spec : Node_Id;
  
     begin
!       P := Parent (N);
!       while Present (P) loop
!          if Nkind (P) = N_Package_Body
!            or else Nkind (P) = N_Subprogram_Body
!          then
!             Spec := Corresponding_Spec (P);
! 
!             if Present (Spec) then
!                Decl := Unit_Declaration_Node (Spec);
  
!                if Nkind (Decl) = N_Generic_Package_Declaration
!                  or else Nkind (Decl) = N_Generic_Subprogram_Declaration
!                then
!                   return P;
!                end if;
              end if;
           end if;
  
!          P := Parent (P);
        end loop;
  
        return Empty;
--- 6931,6956 ----
     -- Enclosing_Generic_Body --
     ----------------------------
  
!    function Enclosing_Generic_Body (N : Node_Id) return Node_Id is
!       Par     : Node_Id;
!       Spec_Id : Entity_Id;
  
     begin
!       Par := Parent (N);
!       while Present (Par) loop
!          if Nkind_In (Par, N_Package_Body, N_Subprogram_Body) then
!             Spec_Id := Corresponding_Spec (Par);
  
!             if Present (Spec_Id)
!               and then Nkind_In (Unit_Declaration_Node (Spec_Id),
!                                  N_Generic_Package_Declaration,
!                                  N_Generic_Subprogram_Declaration)
!             then
!                return Par;
              end if;
           end if;
  
!          Par := Parent (Par);
        end loop;
  
        return Empty;
*************** package body Sem_Util is
*** 6732,6769 ****
     -- Enclosing_Generic_Unit --
     ----------------------------
  
!    function Enclosing_Generic_Unit
!      (N : Node_Id) return Node_Id
!    is
!       P    : Node_Id;
!       Decl : Node_Id;
!       Spec : Node_Id;
  
     begin
!       P := Parent (N);
!       while Present (P) loop
!          if Nkind (P) = N_Generic_Package_Declaration
!            or else Nkind (P) = N_Generic_Subprogram_Declaration
           then
!             return P;
  
!          elsif Nkind (P) = N_Package_Body
!            or else Nkind (P) = N_Subprogram_Body
!          then
!             Spec := Corresponding_Spec (P);
  
!             if Present (Spec) then
!                Decl := Unit_Declaration_Node (Spec);
  
!                if Nkind (Decl) = N_Generic_Package_Declaration
!                  or else Nkind (Decl) = N_Generic_Subprogram_Declaration
                 then
!                   return Decl;
                 end if;
              end if;
           end if;
  
!          P := Parent (P);
        end loop;
  
        return Empty;
--- 6960,6993 ----
     -- Enclosing_Generic_Unit --
     ----------------------------
  
!    function Enclosing_Generic_Unit (N : Node_Id) return Node_Id is
!       Par       : Node_Id;
!       Spec_Decl : Node_Id;
!       Spec_Id   : Entity_Id;
  
     begin
!       Par := Parent (N);
!       while Present (Par) loop
!          if Nkind_In (Par, N_Generic_Package_Declaration,
!                            N_Generic_Subprogram_Declaration)
           then
!             return Par;
  
!          elsif Nkind_In (Par, N_Package_Body, N_Subprogram_Body) then
!             Spec_Id := Corresponding_Spec (Par);
  
!             if Present (Spec_Id) then
!                Spec_Decl := Unit_Declaration_Node (Spec_Id);
  
!                if Nkind_In (Spec_Decl, N_Generic_Package_Declaration,
!                                        N_Generic_Subprogram_Declaration)
                 then
!                   return Spec_Decl;
                 end if;
              end if;
           end if;
  
!          Par := Parent (Par);
        end loop;
  
        return Empty;
*************** package body Sem_Util is
*** 6826,6833 ****
        elsif Dynamic_Scope = Empty then
           return Empty;
  
!       elsif Ekind_In (Dynamic_Scope, E_Package, E_Package_Body,
!                       E_Generic_Package)
        then
           return Dynamic_Scope;
  
--- 7050,7058 ----
        elsif Dynamic_Scope = Empty then
           return Empty;
  
!       elsif Ekind_In (Dynamic_Scope, E_Generic_Package,
!                                      E_Package,
!                                      E_Package_Body)
        then
           return Dynamic_Scope;
  
*************** package body Sem_Util is
*** 6847,6858 ****
        S := Scope (E);
        while Present (S) loop
           if Is_Package_Or_Generic_Package (S)
!            or else Ekind (S) = E_Package_Body
!          then
!             return S;
! 
!          elsif Is_Subprogram_Or_Generic_Subprogram (S)
!            or else Ekind (S) = E_Subprogram_Body
           then
              return S;
  
--- 7072,7078 ----
        S := Scope (E);
        while Present (S) loop
           if Is_Package_Or_Generic_Package (S)
!            or else Is_Subprogram_Or_Generic_Subprogram (S)
           then
              return S;
  
*************** package body Sem_Util is
*** 6881,6900 ****
        elsif Ekind (Dyn_Scop) = E_Subprogram_Body then
           return Corresponding_Spec (Parent (Parent (Dyn_Scop)));
  
!       elsif Ekind_In (Dyn_Scop, E_Block, E_Return_Statement) then
           return Enclosing_Subprogram (Dyn_Scop);
  
!       elsif Ekind (Dyn_Scop) = E_Entry then
  
!          --  For a task entry, return the enclosing subprogram of the
!          --  task itself.
  
           if Ekind (Scope (Dyn_Scop)) = E_Task_Type then
              return Enclosing_Subprogram (Dyn_Scop);
  
!          --  A protected entry is rewritten as a protected procedure which is
!          --  the desired enclosing subprogram. This is relevant when unnesting
!          --  a procedure local to an entry body.
  
           else
              return Protected_Body_Subprogram (Dyn_Scop);
--- 7101,7120 ----
        elsif Ekind (Dyn_Scop) = E_Subprogram_Body then
           return Corresponding_Spec (Parent (Parent (Dyn_Scop)));
  
!       elsif Ekind_In (Dyn_Scop, E_Block, E_Loop, E_Return_Statement) then
           return Enclosing_Subprogram (Dyn_Scop);
  
!       elsif Ekind_In (Dyn_Scop, E_Entry, E_Entry_Family) then
  
!          --  For a task entry or entry family, return the enclosing subprogram
!          --  of the task itself.
  
           if Ekind (Scope (Dyn_Scop)) = E_Task_Type then
              return Enclosing_Subprogram (Dyn_Scop);
  
!          --  A protected entry or entry family is rewritten as a protected
!          --  procedure which is the desired enclosing subprogram. This is
!          --  relevant when unnesting a procedure local to an entry body.
  
           else
              return Protected_Body_Subprogram (Dyn_Scop);
*************** package body Sem_Util is
*** 7554,7559 ****
--- 7774,7791 ----
        end loop;
     end Examine_Array_Bounds;
  
+    -------------------
+    -- Exceptions_OK --
+    -------------------
+ 
+    function Exceptions_OK return Boolean is
+    begin
+       return
+         not (Restriction_Active (No_Exception_Handlers)    or else
+              Restriction_Active (No_Exception_Propagation) or else
+              Restriction_Active (No_Exceptions));
+    end Exceptions_OK;
+ 
     --------------------------
     -- Explain_Limited_Type --
     --------------------------
*************** package body Sem_Util is
*** 8619,8624 ****
--- 8851,8858 ----
        Global  : Node_Id := Empty;
        Body_Id : Entity_Id;
  
+    --  Start of processing for First_Global
+ 
     begin
        pragma Assert (Nam_In (Global_Mode, Name_In_Out,
                                            Name_Input,
*************** package body Sem_Util is
*** 8629,8635 ****
        --  case, it can only be located on the body entity.
  
        if Refined then
!          Body_Id := Subprogram_Body_Entity (Subp);
           if Present (Body_Id) then
              Global := Get_Pragma (Body_Id, Pragma_Refined_Global);
           end if;
--- 8863,8884 ----
        --  case, it can only be located on the body entity.
  
        if Refined then
!          if Is_Subprogram_Or_Generic_Subprogram (Subp) then
!             Body_Id := Subprogram_Body_Entity (Subp);
! 
!          elsif Is_Entry (Subp) or else Is_Task_Type (Subp) then
!             Body_Id := Corresponding_Body (Parent (Subp));
! 
!          --  ??? It should be possible to retrieve the Refined_Global on the
!          --  task body associated to the task object. This is not yet possible.
! 
!          elsif Is_Single_Task_Object (Subp) then
!             Body_Id := Empty;
! 
!          else
!             Body_Id := Empty;
!          end if;
! 
           if Present (Body_Id) then
              Global := Get_Pragma (Body_Id, Pragma_Refined_Global);
           end if;
*************** package body Sem_Util is
*** 8744,8754 ****
        Variant         : Node_Id;
        Discrete_Choice : Node_Id;
        Comp_Item       : Node_Id;
  
!       Discrim       : Entity_Id;
!       Discrim_Name  : Node_Id;
!       Discrim_Value : Node_Id;
  
     begin
        Report_Errors := False;
  
--- 8993,9009 ----
        Variant         : Node_Id;
        Discrete_Choice : Node_Id;
        Comp_Item       : Node_Id;
+       Discrim         : Entity_Id;
+       Discrim_Name    : Node_Id;
  
!       type Discriminant_Value_Status is
!         (Static_Expr, Static_Subtype, Bad);
!       subtype Good_Discrim_Value_Status is Discriminant_Value_Status
!         range Static_Expr .. Static_Subtype; -- range excludes Bad
  
+       Discrim_Value         : Node_Id;
+       Discrim_Value_Subtype : Node_Id;
+       Discrim_Value_Status  : Discriminant_Value_Status := Bad;
     begin
        Report_Errors := False;
  
*************** package body Sem_Util is
*** 8881,8906 ****
        end loop Find_Constraint;
  
        Discrim_Value := Expression (Assoc);
  
!       if not Is_OK_Static_Expression (Discrim_Value) then
! 
!          --  If the variant part is governed by a discriminant of the type
!          --  this is an error. If the variant part and the discriminant are
!          --  inherited from an ancestor this is legal (AI05-120) unless the
!          --  components are being gathered for an aggregate, in which case
!          --  the caller must check Report_Errors.
  
!          if Scope (Original_Record_Component
!                      ((Entity (First (Choices (Assoc)))))) = Typ
!          then
!             Error_Msg_FE
!               ("value for discriminant & must be static!",
!                Discrim_Value, Discrim);
!             Why_Not_Static (Discrim_Value);
           end if;
  
!          Report_Errors := True;
!          return;
        end if;
  
        Search_For_Discriminant_Value : declare
--- 9136,9208 ----
        end loop Find_Constraint;
  
        Discrim_Value := Expression (Assoc);
+       if Is_OK_Static_Expression (Discrim_Value) then
+          Discrim_Value_Status := Static_Expr;
+       else
+          if Ada_Version >= Ada_2020 then
+             if Original_Node (Discrim_Value) /= Discrim_Value
+                and then Nkind (Discrim_Value) = N_Type_Conversion
+                and then Etype (Original_Node (Discrim_Value))
+                       = Etype (Expression (Discrim_Value))
+             then
+                Discrim_Value_Subtype := Etype (Original_Node (Discrim_Value));
+                --  An unhelpful (for this code) type conversion may be
+                --  introduced in some cases; deal with it.
+             else
+                Discrim_Value_Subtype := Etype (Discrim_Value);
+             end if;
  
!             if Is_OK_Static_Subtype (Discrim_Value_Subtype) and then
!                not Is_Null_Range (Type_Low_Bound (Discrim_Value_Subtype),
!                                   Type_High_Bound (Discrim_Value_Subtype))
!             then
!                --  Is_Null_Range test doesn't account for predicates, as in
!                --    subtype Null_By_Predicate is Natural
!                --      with Static_Predicate => Null_By_Predicate < 0;
!                --  so test for that null case separately.
  
!                if (not Has_Static_Predicate (Discrim_Value_Subtype))
!                  or else Present (First (Static_Discrete_Predicate
!                                            (Discrim_Value_Subtype)))
!                then
!                   Discrim_Value_Status := Static_Subtype;
!                end if;
!             end if;
           end if;
  
!          if Discrim_Value_Status = Bad then
! 
!             --  If the variant part is governed by a discriminant of the type
!             --  this is an error. If the variant part and the discriminant are
!             --  inherited from an ancestor this is legal (AI05-220) unless the
!             --  components are being gathered for an aggregate, in which case
!             --  the caller must check Report_Errors.
!             --
!             --  In Ada 2020 the above rules are relaxed. A nonstatic governing
!             --  discriminant is OK as long as it has a static subtype and
!             --  every value of that subtype (and there must be at least one)
!             --  selects the same variant.
! 
!             if Scope (Original_Record_Component
!                         ((Entity (First (Choices (Assoc)))))) = Typ
!             then
!                if Ada_Version >= Ada_2020 then
!                   Error_Msg_FE
!                     ("value for discriminant & must be static or " &
!                      "discriminant's nominal subtype must be static " &
!                      "and non-null!",
!                      Discrim_Value, Discrim);
!                else
!                   Error_Msg_FE
!                     ("value for discriminant & must be static!",
!                      Discrim_Value, Discrim);
!                end if;
!                Why_Not_Static (Discrim_Value);
!             end if;
! 
!             Report_Errors := True;
!             return;
!          end if;
        end if;
  
        Search_For_Discriminant_Value : declare
*************** package body Sem_Util is
*** 8909,8918 ****
  
           UI_High          : Uint;
           UI_Low           : Uint;
!          UI_Discrim_Value : constant Uint := Expr_Value (Discrim_Value);
  
        begin
           Find_Discrete_Value : while Present (Variant) loop
              Discrete_Choice := First (Discrete_Choices (Variant));
              while Present (Discrete_Choice) loop
                 exit Find_Discrete_Value when
--- 9211,9253 ----
  
           UI_High          : Uint;
           UI_Low           : Uint;
!          UI_Discrim_Value : Uint;
  
        begin
+          case Good_Discrim_Value_Status'(Discrim_Value_Status) is
+             when Static_Expr =>
+                UI_Discrim_Value := Expr_Value (Discrim_Value);
+             when Static_Subtype =>
+                --  Arbitrarily pick one value of the subtype and look
+                --  for the variant associated with that value; we will
+                --  check later that the same variant is associated with
+                --  all of the other values of the subtype.
+                if Has_Static_Predicate (Discrim_Value_Subtype) then
+                   declare
+                      Range_Or_Expr : constant Node_Id :=
+                        First (Static_Discrete_Predicate
+                                 (Discrim_Value_Subtype));
+                   begin
+                      if Nkind (Range_Or_Expr) = N_Range then
+                         UI_Discrim_Value :=
+                           Expr_Value (Low_Bound (Range_Or_Expr));
+                      else
+                         UI_Discrim_Value := Expr_Value (Range_Or_Expr);
+                      end if;
+                   end;
+                else
+                   UI_Discrim_Value
+                     := Expr_Value (Type_Low_Bound (Discrim_Value_Subtype));
+                end if;
+          end case;
+ 
           Find_Discrete_Value : while Present (Variant) loop
+ 
+             --  If a choice is a subtype with a static predicate, it must
+             --  be rewritten as an explicit list of non-predicated choices.
+ 
+             Expand_Static_Predicates_In_Choices (Variant);
+ 
              Discrete_Choice := First (Discrete_Choices (Variant));
              while Present (Discrete_Choice) loop
                 exit Find_Discrete_Value when
*************** package body Sem_Util is
*** 8938,8944 ****
        --  The case statement must include a variant that corresponds to the
        --  value of the discriminant, unless the discriminant type has a
        --  static predicate. In that case the absence of an others_choice that
!       --  would cover this value becomes a run-time error (3.8,1 (21.1/2)).
  
        if No (Variant)
          and then not Has_Static_Predicate (Etype (Discrim_Name))
--- 9273,9279 ----
        --  The case statement must include a variant that corresponds to the
        --  value of the discriminant, unless the discriminant type has a
        --  static predicate. In that case the absence of an others_choice that
!       --  would cover this value becomes a run-time error (3.8.1 (21.1/2)).
  
        if No (Variant)
          and then not Has_Static_Predicate (Etype (Discrim_Name))
*************** package body Sem_Util is
*** 8954,8964 ****
--- 9289,9348 ----
        --  the same record type.
  
        if Present (Variant) then
+          if Discrim_Value_Status = Static_Subtype then
+             declare
+                Discrim_Value_Subtype_Intervals
+                  : constant Interval_Lists.Discrete_Interval_List
+                  := Interval_Lists.Type_Intervals (Discrim_Value_Subtype);
+ 
+                Variant_Intervals
+                  : constant Interval_Lists.Discrete_Interval_List
+                  := Interval_Lists.Choice_List_Intervals
+                      (Discrete_Choices => Discrete_Choices (Variant));
+             begin
+                if not Interval_Lists.Is_Subset
+                         (Subset => Discrim_Value_Subtype_Intervals,
+                          Of_Set => Variant_Intervals)
+                then
+                   Error_Msg_NE
+                     ("no single variant is associated with all values of " &
+                      "the subtype of discriminant value &",
+                      Discrim_Value, Discrim);
+                   Report_Errors := True;
+                   return;
+                end if;
+             end;
+          end if;
+ 
           Gather_Components
             (Typ, Component_List (Variant), Governed_By, Into, Report_Errors);
        end if;
     end Gather_Components;
  
+    -----------------------
+    -- Get_Accessibility --
+    -----------------------
+ 
+    function Get_Accessibility (E : Entity_Id) return Node_Id is
+    begin
+       --  When minimum accessibility is set for E then we utilize it - except
+       --  in a few edge cases like the expansion of select statements where
+       --  generated subprogram may attempt to unnecessarily use a minimum
+       --  accessibility object declared outside of scope.
+ 
+       --  To avoid these situations where expansion may get complex we verify
+       --  that the minimum accessibility object is within scope.
+ 
+       if Ekind (E) in Formal_Kind
+         and then Present (Minimum_Accessibility (E))
+         and then In_Open_Scopes (Scope (Minimum_Accessibility (E)))
+       then
+          return Minimum_Accessibility (E);
+       end if;
+ 
+       return Extra_Accessibility (E);
+    end Get_Accessibility;
+ 
     ------------------------
     -- Get_Actual_Subtype --
     ------------------------
*************** package body Sem_Util is
*** 9176,9187 ****
           Next_Entity (Func);
        end loop;
  
!       --  If not found, no way to resolve remaining primitives.
  
        if Cursor = Any_Type then
           Error_Msg_N
!            ("primitive operation for Iterable type must appear "
!              & "in the same list of declarations as the type", Aspect);
        end if;
  
        return Cursor;
--- 9560,9571 ----
           Next_Entity (Func);
        end loop;
  
!       --  If not found, no way to resolve remaining primitives
  
        if Cursor = Any_Type then
           Error_Msg_N
!            ("primitive operation for Iterable type must appear in the same "
!             & "list of declarations as the type", Aspect);
        end if;
  
        return Cursor;
*************** package body Sem_Util is
*** 9606,9621 ****
     function Get_Max_Queue_Length (Id : Entity_Id) return Uint is
        pragma Assert (Is_Entry (Id));
        Prag : constant Entity_Id := Get_Pragma (Id, Pragma_Max_Queue_Length);
  
     begin
!       --  A value of 0 represents no maximum specified, and entries and entry
!       --  families with no Max_Queue_Length aspect or pragma default to it.
  
        if not Present (Prag) then
           return Uint_0;
        end if;
  
!       return Intval (Expression (First (Pragma_Argument_Associations (Prag))));
     end Get_Max_Queue_Length;
  
     ------------------------
--- 9990,10017 ----
     function Get_Max_Queue_Length (Id : Entity_Id) return Uint is
        pragma Assert (Is_Entry (Id));
        Prag : constant Entity_Id := Get_Pragma (Id, Pragma_Max_Queue_Length);
+       Max  : Uint;
  
     begin
!       --  A value of 0 or -1 represents no maximum specified, and entries and
!       --  entry families with no Max_Queue_Length aspect or pragma default to
!       --  it.
  
        if not Present (Prag) then
           return Uint_0;
        end if;
  
!       Max := Expr_Value
!         (Expression (First (Pragma_Argument_Associations (Prag))));
! 
!       --  Since -1 and 0 are equivalent, return 0 for instances of -1 for
!       --  uniformity.
! 
!       if Max = -1 then
!          return Uint_0;
!       end if;
! 
!       return Max;
     end Get_Max_Queue_Length;
  
     ------------------------
*************** package body Sem_Util is
*** 10708,10718 ****
           --  Simple option Synchronous
           --
           --    enables                disables
!          --       Asynch_Readers         Effective_Reads
!          --       Asynch_Writers         Effective_Writes
           --
           --  Note that both forms of External have higher precedence than
!          --  Synchronous (SPARK RM 7.1.4(10)).
  
           elsif Has_Synchronous then
              return Nam_In (Property, Name_Async_Readers, Name_Async_Writers);
--- 11104,11114 ----
           --  Simple option Synchronous
           --
           --    enables                disables
!          --       Async_Readers          Effective_Reads
!          --       Async_Writers          Effective_Writes
           --
           --  Note that both forms of External have higher precedence than
!          --  Synchronous (SPARK RM 7.1.4(9)).
  
           elsif Has_Synchronous then
              return Nam_In (Property, Name_Async_Readers, Name_Async_Writers);
*************** package body Sem_Util is
*** 12091,12105 ****
           if Is_Generic_Instance (S) then
  
              --  A child instance is always compiled in the context of a parent
!             --  instance. Nevertheless, the actuals are not analyzed in an
              --  instance context. We detect this case by examining the current
              --  compilation unit, which must be a child instance, and checking
!             --  that it is not currently on the scope stack.
  
              if Is_Child_Unit (Curr_Unit)
                and then Nkind (Unit (Cunit (Current_Sem_Unit))) =
                                                       N_Package_Instantiation
!               and then not In_Open_Scopes (Curr_Unit)
              then
                 return False;
              else
--- 12487,12501 ----
           if Is_Generic_Instance (S) then
  
              --  A child instance is always compiled in the context of a parent
!             --  instance. Nevertheless, its actuals must not be analyzed in an
              --  instance context. We detect this case by examining the current
              --  compilation unit, which must be a child instance, and checking
!             --  that it has not been analyzed yet.
  
              if Is_Child_Unit (Curr_Unit)
                and then Nkind (Unit (Cunit (Current_Sem_Unit))) =
                                                       N_Package_Instantiation
!               and then Ekind (Curr_Unit) = E_Void
              then
                 return False;
              else
*************** package body Sem_Util is
*** 12279,12284 ****
--- 12675,12699 ----
        end if;
     end In_Pre_Post_Condition;
  
+    ------------------------------
+    -- In_Quantified_Expression --
+    ------------------------------
+ 
+    function In_Quantified_Expression (N : Node_Id) return Boolean is
+       P : Node_Id;
+    begin
+       P := Parent (N);
+       loop
+          if No (P) then
+             return False;
+          elsif Nkind (P) = N_Quantified_Expression then
+             return True;
+          else
+             P := Parent (P);
+          end if;
+       end loop;
+    end In_Quantified_Expression;
+ 
     -------------------------------------
     -- In_Reverse_Storage_Order_Object --
     -------------------------------------
*************** package body Sem_Util is
*** 12444,12449 ****
--- 12859,12888 ----
          and then not In_Private_Part (Scope_Id);
     end In_Visible_Part;
  
+    -----------------------------
+    -- In_While_Loop_Condition --
+    -----------------------------
+ 
+    function In_While_Loop_Condition (N : Node_Id) return Boolean is
+       Prev : Node_Id := N;
+       P    : Node_Id := Parent (N);
+       --  P and Prev will be used for traversing the AST, while maintaining an
+       --  invariant that P = Parent (Prev).
+    begin
+       loop
+          if No (P) then
+             return False;
+          elsif Nkind (P) = N_Iteration_Scheme
+            and then Prev = Condition (P)
+          then
+             return True;
+          else
+             Prev := P;
+             P := Parent (P);
+          end if;
+       end loop;
+    end In_While_Loop_Condition;
+ 
     --------------------------------
     -- Incomplete_Or_Partial_View --
     --------------------------------
*************** package body Sem_Util is
*** 13289,13342 ****
     ----------------------
  
     function Is_Atomic_Object (N : Node_Id) return Boolean is
!       function Is_Atomic_Entity (Id : Entity_Id) return Boolean;
!       pragma Inline (Is_Atomic_Entity);
!       --  Determine whether arbitrary entity Id is either atomic or has atomic
!       --  components.
! 
!       function Is_Atomic_Prefix (Pref : Node_Id) return Boolean;
!       --  Determine whether prefix Pref of an indexed or selected component is
!       --  an atomic object.
! 
!       ----------------------
!       -- Is_Atomic_Entity --
!       ----------------------
! 
!       function Is_Atomic_Entity (Id : Entity_Id) return Boolean is
!       begin
!          return Is_Atomic (Id) or else Has_Atomic_Components (Id);
!       end Is_Atomic_Entity;
  
!       ----------------------
!       -- Is_Atomic_Prefix --
!       ----------------------
  
!       function Is_Atomic_Prefix (Pref : Node_Id) return Boolean is
!          Typ : constant Entity_Id := Etype (Pref);
  
        begin
           if Is_Access_Type (Typ) then
              return Has_Atomic_Components (Designated_Type (Typ));
  
!          elsif Is_Atomic_Entity (Typ) then
              return True;
  
!          elsif Is_Entity_Name (Pref)
!            and then Is_Atomic_Entity (Entity (Pref))
           then
              return True;
  
!          elsif Nkind (Pref) = N_Indexed_Component then
!             return Is_Atomic_Prefix (Prefix (Pref));
! 
!          elsif Nkind (Pref) = N_Selected_Component then
!             return
!               Is_Atomic_Prefix (Prefix (Pref))
!                 or else Is_Atomic (Entity (Selector_Name (Pref)));
           end if;
! 
!          return False;
!       end Is_Atomic_Prefix;
  
     --  Start of processing for Is_Atomic_Object
  
--- 13728,13760 ----
     ----------------------
  
     function Is_Atomic_Object (N : Node_Id) return Boolean is
!       function Prefix_Has_Atomic_Components (P : Node_Id) return Boolean;
!       --  Determine whether prefix P has atomic components. This requires the
!       --  presence of an Atomic_Components aspect/pragma.
  
!       ---------------------------------
!       -- Prefix_Has_Atomic_Components --
!       ---------------------------------
  
!       function Prefix_Has_Atomic_Components (P : Node_Id) return Boolean is
!          Typ : constant Entity_Id := Etype (P);
  
        begin
           if Is_Access_Type (Typ) then
              return Has_Atomic_Components (Designated_Type (Typ));
  
!          elsif Has_Atomic_Components (Typ) then
              return True;
  
!          elsif Is_Entity_Name (P)
!            and then Has_Atomic_Components (Entity (P))
           then
              return True;
  
!          else
!             return False;
           end if;
!       end Prefix_Has_Atomic_Components;
  
     --  Start of processing for Is_Atomic_Object
  
*************** package body Sem_Util is
*** 13344,13360 ****
        if Is_Entity_Name (N) then
           return Is_Atomic_Object_Entity (Entity (N));
  
        elsif Nkind (N) = N_Indexed_Component then
!          return Is_Atomic (Etype (N)) or else Is_Atomic_Prefix (Prefix (N));
  
        elsif Nkind (N) = N_Selected_Component then
!          return
!            Is_Atomic (Etype (N))
!              or else Is_Atomic_Prefix (Prefix (N))
!              or else Is_Atomic (Entity (Selector_Name (N)));
!       end if;
  
!       return False;
     end Is_Atomic_Object;
  
     -----------------------------
--- 13762,13779 ----
        if Is_Entity_Name (N) then
           return Is_Atomic_Object_Entity (Entity (N));
  
+       elsif Is_Atomic (Etype (N)) then
+          return True;
+ 
        elsif Nkind (N) = N_Indexed_Component then
!          return Prefix_Has_Atomic_Components (Prefix (N));
  
        elsif Nkind (N) = N_Selected_Component then
!          return Is_Atomic (Entity (Selector_Name (N)));
  
!       else
!          return False;
!       end if;
     end Is_Atomic_Object;
  
     -----------------------------
*************** package body Sem_Util is
*** 13374,13387 ****
  
     function Is_Atomic_Or_VFA_Object (N : Node_Id) return Boolean is
     begin
!       return Is_Atomic_Object (N)
!         or else (Is_Object_Reference (N)
!                    and then Is_Entity_Name (N)
!                    and then (Is_Volatile_Full_Access (Entity (N))
!                                 or else
!                              Is_Volatile_Full_Access (Etype (Entity (N)))));
     end Is_Atomic_Or_VFA_Object;
  
     -------------------------
     -- Is_Attribute_Result --
     -------------------------
--- 13793,13811 ----
  
     function Is_Atomic_Or_VFA_Object (N : Node_Id) return Boolean is
     begin
!       return Is_Atomic_Object (N) or else Is_Volatile_Full_Access_Object (N);
     end Is_Atomic_Or_VFA_Object;
  
+    ----------------------
+    -- Is_Attribute_Old --
+    ----------------------
+ 
+    function Is_Attribute_Old (N : Node_Id) return Boolean is
+    begin
+       return Nkind (N) = N_Attribute_Reference
+         and then Attribute_Name (N) = Name_Old;
+    end Is_Attribute_Old;
+ 
     -------------------------
     -- Is_Attribute_Result --
     -------------------------
*************** package body Sem_Util is
*** 14480,14487 ****
        --  Otherwise Id denotes an object
  
        else
           return
!            Is_Volatile (Id)
               or else Has_Volatile_Components (Id)
               or else Is_Effectively_Volatile (Etype (Id));
        end if;
--- 14904,14914 ----
        --  Otherwise Id denotes an object
  
        else
+          --  A volatile object for which No_Caching is enabled is not
+          --  effectively volatile.
+ 
           return
!            (Is_Volatile (Id) and then not No_Caching_Enabled (Id))
               or else Has_Volatile_Components (Id)
               or else Is_Effectively_Volatile (Etype (Id));
        end if;
*************** package body Sem_Util is
*** 14541,14546 ****
--- 14968,14974 ----
        return
          Nkind (E) = N_Function_Call
            and then not Configurable_Run_Time_Mode
+           and then Nkind (Original_Node (E)) = N_Attribute_Reference
            and then (Entity (Name (E)) = RTE (RE_Get_Ceiling)
                       or else Entity (Name (E)) = RTE (RO_PE_Get_Ceiling));
     end Is_Expanded_Priority_Attribute;
*************** package body Sem_Util is
*** 15013,15018 ****
--- 15441,15518 ----
                               N_Generic_Subprogram_Declaration);
     end Is_Generic_Declaration_Or_Body;
  
+    ---------------------------
+    -- Is_Independent_Object --
+    ---------------------------
+ 
+    function Is_Independent_Object (N : Node_Id) return Boolean is
+       function Is_Independent_Object_Entity (Id : Entity_Id) return Boolean;
+       --  Determine whether arbitrary entity Id denotes an object that is
+       --  Independent.
+ 
+       function Prefix_Has_Independent_Components (P : Node_Id) return Boolean;
+       --  Determine whether prefix P has independent components. This requires
+       --  the presence of an Independent_Components aspect/pragma.
+ 
+       ------------------------------------
+       --  Is_Independent_Object_Entity  --
+       ------------------------------------
+ 
+       function Is_Independent_Object_Entity (Id : Entity_Id) return Boolean is
+       begin
+          return
+            Is_Object (Id)
+              and then (Is_Independent (Id)
+                         or else
+                       Is_Independent (Etype (Id)));
+       end Is_Independent_Object_Entity;
+ 
+       -------------------------------------
+       -- Prefix_Has_Independent_Components --
+       -------------------------------------
+ 
+       function Prefix_Has_Independent_Components (P : Node_Id) return Boolean
+       is
+          Typ : constant Entity_Id := Etype (P);
+ 
+       begin
+          if Is_Access_Type (Typ) then
+             return Has_Independent_Components (Designated_Type (Typ));
+ 
+          elsif Has_Independent_Components (Typ) then
+             return True;
+ 
+          elsif Is_Entity_Name (P)
+            and then Has_Independent_Components (Entity (P))
+          then
+             return True;
+ 
+          else
+             return False;
+          end if;
+       end Prefix_Has_Independent_Components;
+ 
+    --  Start of processing for Is_Independent_Object
+ 
+    begin
+       if Is_Entity_Name (N) then
+          return Is_Independent_Object_Entity (Entity (N));
+ 
+       elsif Is_Independent (Etype (N)) then
+          return True;
+ 
+       elsif Nkind (N) = N_Indexed_Component then
+          return Prefix_Has_Independent_Components (Prefix (N));
+ 
+       elsif Nkind (N) = N_Selected_Component then
+          return Prefix_Has_Independent_Components (Prefix (N))
+            or else Is_Independent (Entity (Selector_Name (N)));
+ 
+       else
+          return False;
+       end if;
+    end Is_Independent_Object;
+ 
     ----------------------------
     -- Is_Inherited_Operation --
     ----------------------------
*************** package body Sem_Util is
*** 17415,17420 ****
--- 17915,17951 ----
            or else Nkind (N) = N_Procedure_Call_Statement;
     end Is_Statement;
  
+    ----------------------------------------
+    --  Is_Subcomponent_Of_Atomic_Object  --
+    ----------------------------------------
+ 
+    function Is_Subcomponent_Of_Atomic_Object (N : Node_Id) return Boolean is
+       R : Node_Id;
+ 
+    begin
+       R := Get_Referenced_Object (N);
+ 
+       while Nkind_In (R, N_Indexed_Component, N_Selected_Component, N_Slice)
+       loop
+          R := Get_Referenced_Object (Prefix (R));
+ 
+          --  If the prefix is an access value, only the designated type matters
+ 
+          if Is_Access_Type (Etype (R)) then
+             if Is_Atomic (Designated_Type (Etype (R))) then
+                return True;
+             end if;
+ 
+          else
+             if Is_Atomic_Object (R) then
+                return True;
+             end if;
+          end if;
+       end loop;
+ 
+       return False;
+    end Is_Subcomponent_Of_Atomic_Object;
+ 
     ---------------------------------------
     -- Is_Subprogram_Contract_Annotation --
     ---------------------------------------
*************** package body Sem_Util is
*** 18048,18053 ****
--- 18579,18623 ----
          and then Scope (Scope (Scope (Root))) = Standard_Standard;
     end Is_Visibly_Controlled;
  
+    --------------------------------------
+    --  Is_Volatile_Full_Access_Object  --
+    --------------------------------------
+ 
+    function Is_Volatile_Full_Access_Object (N : Node_Id) return Boolean is
+       function Is_VFA_Object_Entity (Id : Entity_Id) return Boolean;
+       --  Determine whether arbitrary entity Id denotes an object that is
+       --  Volatile_Full_Access.
+ 
+       ----------------------------
+       --  Is_VFA_Object_Entity  --
+       ----------------------------
+ 
+       function Is_VFA_Object_Entity (Id : Entity_Id) return Boolean is
+       begin
+          return
+            Is_Object (Id)
+              and then (Is_Volatile_Full_Access (Id)
+                          or else
+                        Is_Volatile_Full_Access (Etype (Id)));
+       end Is_VFA_Object_Entity;
+ 
+    --  Start of processing for Is_Volatile_Full_Access_Object
+ 
+    begin
+       if Is_Entity_Name (N) then
+          return Is_VFA_Object_Entity (Entity (N));
+ 
+       elsif Is_Volatile_Full_Access (Etype (N)) then
+          return True;
+ 
+       elsif Nkind (N) = N_Selected_Component then
+          return Is_Volatile_Full_Access (Entity (Selector_Name (N)));
+ 
+       else
+          return False;
+       end if;
+    end Is_Volatile_Full_Access_Object;
+ 
     --------------------------
     -- Is_Volatile_Function --
     --------------------------
*************** package body Sem_Util is
*** 18083,18100 ****
     ------------------------
  
     function Is_Volatile_Object (N : Node_Id) return Boolean is
!       function Is_Volatile_Prefix (N : Node_Id) return Boolean;
!       --  If prefix is an implicit dereference, examine designated type
  
!       function Object_Has_Volatile_Components (N : Node_Id) return Boolean;
!       --  Determines if given object has volatile components
  
!       ------------------------
!       -- Is_Volatile_Prefix --
!       ------------------------
  
!       function Is_Volatile_Prefix (N : Node_Id) return Boolean is
!          Typ  : constant Entity_Id := Etype (N);
  
        begin
           if Is_Access_Type (Typ) then
--- 18653,18684 ----
     ------------------------
  
     function Is_Volatile_Object (N : Node_Id) return Boolean is
!       function Is_Volatile_Object_Entity (Id : Entity_Id) return Boolean;
!       --  Determine whether arbitrary entity Id denotes an object that is
!       --  Volatile.
  
!       function Prefix_Has_Volatile_Components (P : Node_Id) return Boolean;
!       --  Determine whether prefix P has volatile components. This requires
!       --  the presence of a Volatile_Components aspect/pragma or that P be
!       --  itself a volatile object as per RM C.6(8).
  
!       ---------------------------------
!       --  Is_Volatile_Object_Entity  --
!       ---------------------------------
  
!       function Is_Volatile_Object_Entity (Id : Entity_Id) return Boolean is
!       begin
!          return
!            Is_Object (Id)
!              and then (Is_Volatile (Id) or else Is_Volatile (Etype (Id)));
!       end Is_Volatile_Object_Entity;
! 
!       ------------------------------------
!       -- Prefix_Has_Volatile_Components --
!       ------------------------------------
! 
!       function Prefix_Has_Volatile_Components (P : Node_Id) return Boolean is
!          Typ  : constant Entity_Id := Etype (P);
  
        begin
           if Is_Access_Type (Typ) then
*************** package body Sem_Util is
*** 18102,18168 ****
                 Dtyp : constant Entity_Id := Designated_Type (Typ);
  
              begin
!                return Is_Volatile (Dtyp)
!                  or else Has_Volatile_Components (Dtyp);
              end;
  
!          else
!             return Object_Has_Volatile_Components (N);
!          end if;
!       end Is_Volatile_Prefix;
! 
!       ------------------------------------
!       -- Object_Has_Volatile_Components --
!       ------------------------------------
! 
!       function Object_Has_Volatile_Components (N : Node_Id) return Boolean is
!          Typ : constant Entity_Id := Etype (N);
! 
!       begin
!          if Is_Volatile (Typ)
!            or else Has_Volatile_Components (Typ)
!          then
              return True;
  
!          elsif Is_Entity_Name (N)
!            and then (Has_Volatile_Components (Entity (N))
!                       or else Is_Volatile (Entity (N)))
           then
              return True;
  
!          elsif Nkind (N) = N_Indexed_Component
!            or else Nkind (N) = N_Selected_Component
!          then
!             return Is_Volatile_Prefix (Prefix (N));
  
           else
              return False;
           end if;
!       end Object_Has_Volatile_Components;
  
     --  Start of processing for Is_Volatile_Object
  
     begin
!       if Nkind (N) = N_Defining_Identifier then
!          return Is_Volatile (N) or else Is_Volatile (Etype (N));
! 
!       elsif Nkind (N) = N_Expanded_Name then
!          return Is_Volatile_Object (Entity (N));
  
!       elsif Is_Volatile (Etype (N))
!         or else (Is_Entity_Name (N) and then Is_Volatile (Entity (N)))
!       then
           return True;
  
!       elsif Nkind_In (N, N_Indexed_Component, N_Selected_Component)
!         and then Is_Volatile_Prefix (Prefix (N))
!       then
!          return True;
  
!       elsif Nkind (N) = N_Selected_Component
!         and then Is_Volatile (Entity (Selector_Name (N)))
!       then
!          return True;
  
        else
           return False;
--- 18686,18726 ----
                 Dtyp : constant Entity_Id := Designated_Type (Typ);
  
              begin
!                return Has_Volatile_Components (Dtyp)
!                  or else Is_Volatile (Dtyp);
              end;
  
!          elsif Has_Volatile_Components (Typ) then
              return True;
  
!          elsif Is_Entity_Name (P)
!            and then Has_Volatile_Component (Entity (P))
           then
              return True;
  
!          elsif Is_Volatile_Object (P) then
!             return True;
  
           else
              return False;
           end if;
!       end Prefix_Has_Volatile_Components;
  
     --  Start of processing for Is_Volatile_Object
  
     begin
!       if Is_Entity_Name (N) then
!          return Is_Volatile_Object_Entity (Entity (N));
  
!       elsif Is_Volatile (Etype (N)) then
           return True;
  
!       elsif Nkind (N) = N_Indexed_Component then
!          return Prefix_Has_Volatile_Components (Prefix (N));
  
!       elsif Nkind (N) = N_Selected_Component then
!          return Prefix_Has_Volatile_Components (Prefix (N))
!            or else Is_Volatile (Entity (Selector_Name (N)));
  
        else
           return False;
*************** package body Sem_Util is
*** 18875,18880 ****
--- 19433,19476 ----
        end if;
     end Mark_Elaboration_Attributes;
  
+    ----------------------------------------
+    -- Mark_Save_Invocation_Graph_Of_Body --
+    ----------------------------------------
+ 
+    procedure Mark_Save_Invocation_Graph_Of_Body is
+       Main      : constant Node_Id := Cunit (Main_Unit);
+       Main_Unit : constant Node_Id := Unit (Main);
+       Aux_Id    : Entity_Id;
+ 
+    begin
+       Set_Save_Invocation_Graph_Of_Body (Main);
+ 
+       --  Assume that the main unit does not have a complimentary unit
+ 
+       Aux_Id := Empty;
+ 
+       --  Obtain the complimentary unit of the main unit
+ 
+       if Nkind_In (Main_Unit, N_Generic_Package_Declaration,
+                               N_Generic_Subprogram_Declaration,
+                               N_Package_Declaration,
+                               N_Subprogram_Declaration)
+       then
+          Aux_Id := Corresponding_Body (Main_Unit);
+ 
+       elsif Nkind_In (Main_Unit, N_Package_Body,
+                                  N_Subprogram_Body,
+                                  N_Subprogram_Renaming_Declaration)
+       then
+          Aux_Id := Corresponding_Spec (Main_Unit);
+       end if;
+ 
+       if Present (Aux_Id) then
+          Set_Save_Invocation_Graph_Of_Body
+            (Parent (Unit_Declaration_Node (Aux_Id)));
+       end if;
+    end Mark_Save_Invocation_Graph_Of_Body;
+ 
     ----------------------------------
     -- Matching_Static_Array_Bounds --
     ----------------------------------
*************** package body Sem_Util is
*** 19256,19261 ****
--- 19852,19945 ----
        return Empty;
     end Nearest_Enclosing_Instance;
  
+    ------------------------
+    -- Needs_Finalization --
+    ------------------------
+ 
+    function Needs_Finalization (Typ : Entity_Id) return Boolean is
+       function Has_Some_Controlled_Component
+         (Input_Typ : Entity_Id) return Boolean;
+       --  Determine whether type Input_Typ has at least one controlled
+       --  component.
+ 
+       -----------------------------------
+       -- Has_Some_Controlled_Component --
+       -----------------------------------
+ 
+       function Has_Some_Controlled_Component
+         (Input_Typ : Entity_Id) return Boolean
+       is
+          Comp : Entity_Id;
+ 
+       begin
+          --  When a type is already frozen and has at least one controlled
+          --  component, or is manually decorated, it is sufficient to inspect
+          --  flag Has_Controlled_Component.
+ 
+          if Has_Controlled_Component (Input_Typ) then
+             return True;
+ 
+          --  Otherwise inspect the internals of the type
+ 
+          elsif not Is_Frozen (Input_Typ) then
+             if Is_Array_Type (Input_Typ) then
+                return Needs_Finalization (Component_Type (Input_Typ));
+ 
+             elsif Is_Record_Type (Input_Typ) then
+                Comp := First_Component (Input_Typ);
+                while Present (Comp) loop
+                   if Needs_Finalization (Etype (Comp)) then
+                      return True;
+                   end if;
+ 
+                   Next_Component (Comp);
+                end loop;
+             end if;
+          end if;
+ 
+          return False;
+       end Has_Some_Controlled_Component;
+ 
+    --  Start of processing for Needs_Finalization
+ 
+    begin
+       --  Certain run-time configurations and targets do not provide support
+       --  for controlled types.
+ 
+       if Restriction_Active (No_Finalization) then
+          return False;
+ 
+       --  C++ types are not considered controlled. It is assumed that the non-
+       --  Ada side will handle their clean up.
+ 
+       elsif Convention (Typ) = Convention_CPP then
+          return False;
+ 
+       --  Class-wide types are treated as controlled because derivations from
+       --  the root type may introduce controlled components.
+ 
+       elsif Is_Class_Wide_Type (Typ) then
+          return True;
+ 
+       --  Concurrent types are controlled as long as their corresponding record
+       --  is controlled.
+ 
+       elsif Is_Concurrent_Type (Typ)
+         and then Present (Corresponding_Record_Type (Typ))
+         and then Needs_Finalization (Corresponding_Record_Type (Typ))
+       then
+          return True;
+ 
+       --  Otherwise the type is controlled when it is either derived from type
+       --  [Limited_]Controlled and not subject to aspect Disable_Controlled, or
+       --  contains at least one controlled component.
+ 
+       else
+          return
+            Is_Controlled (Typ) or else Has_Some_Controlled_Component (Typ);
+       end if;
+    end Needs_Finalization;
+ 
     ----------------------
     -- Needs_One_Actual --
     ----------------------
*************** package body Sem_Util is
*** 20172,20177 ****
--- 20856,20876 ----
                 Update_First_Real_Statement
                   (Old_HSS => N,
                    New_HSS => Result);
+ 
+             --  Update the Chars attribute of identifiers
+ 
+             elsif Nkind (N) = N_Identifier then
+ 
+                --  The Entity field of identifiers that denote aspects is used
+                --  to store arbitrary expressions (and hence we must check that
+                --  they reference an actual entity before copying their Chars
+                --  value).
+ 
+                if Present (Entity (Result))
+                  and then Nkind (Entity (Result)) in N_Entity
+                then
+                   Set_Chars (Result, Chars (Entity (Result)));
+                end if;
              end if;
           end if;
  
*************** package body Sem_Util is
*** 20302,20307 ****
--- 21001,21010 ----
           Old_Next : Node_Id;
  
        begin
+          if No (First_Named_Actual (Old_Call)) then
+             return;
+          end if;
+ 
           --  Recreate the First/Next_Named_Actual chain of a call by traversing
           --  the chains of both the old and new calls in parallel.
  
*************** package body Sem_Util is
*** 20309,20323 ****
           Old_Act := First (Parameter_Associations (Old_Call));
           while Present (Old_Act) loop
              if Nkind (Old_Act) = N_Parameter_Association
!               and then Present (Next_Named_Actual (Old_Act))
              then
!                if First_Named_Actual (Old_Call) =
!                     Explicit_Actual_Parameter (Old_Act)
!                then
!                   Set_First_Named_Actual (New_Call,
!                     Explicit_Actual_Parameter (New_Act));
!                end if;
  
                 --  Scan the actual parameter list to find the next suitable
                 --  named actual. Note that the list may be out of order.
  
--- 21012,21027 ----
           Old_Act := First (Parameter_Associations (Old_Call));
           while Present (Old_Act) loop
              if Nkind (Old_Act) = N_Parameter_Association
!               and then Explicit_Actual_Parameter (Old_Act)
!                          = First_Named_Actual (Old_Call)
              then
!                Set_First_Named_Actual (New_Call,
!                  Explicit_Actual_Parameter (New_Act));
!             end if;
  
+             if Nkind (Old_Act) = N_Parameter_Association
+               and then Present (Next_Named_Actual (Old_Act))
+             then
                 --  Scan the actual parameter list to find the next suitable
                 --  named actual. Note that the list may be out of order.
  
*************** package body Sem_Util is
*** 20544,20559 ****
--- 21248,21274 ----
           --  this restriction leads to a performance penalty.
  
           --  ??? this list is flaky, and may hide dormant bugs
+          --  Should functions be included???
+ 
+          --  Loop parameters appear within quantified expressions and contain
+          --  an entity declaration that must be replaced when the expander is
+          --  active if the expression has been preanalyzed or analyzed.
  
           elsif not Ekind_In (Id, E_Block,
                                   E_Constant,
                                   E_Label,
+                                  E_Loop_Parameter,
                                   E_Procedure,
                                   E_Variable)
             and then not Is_Type (Id)
           then
              return;
  
+          elsif Ekind (Id) = E_Loop_Parameter
+            and then No (Etype (Condition (Parent (Parent (Id)))))
+          then
+             return;
+ 
           --  Nothing to do when the entity was already visited
  
           elsif NCT_Tables_In_Use
*************** package body Sem_Util is
*** 20826,20832 ****
        begin
           pragma Assert (Nkind (N) not in N_Entity);
  
!          if Nkind (N) = N_Expression_With_Actions then
              EWA_Level := EWA_Level + 1;
  
           elsif EWA_Level > 0
--- 21541,21554 ----
        begin
           pragma Assert (Nkind (N) not in N_Entity);
  
!          --  If the node is a quantified expression and expander is active,
!          --  it contains an implicit declaration that may require a new entity
!          --  when the condition has already been (pre)analyzed.
! 
!          if Nkind (N) = N_Expression_With_Actions
!            or else
!              (Nkind (N) = N_Quantified_Expression and then Expander_Active)
!          then
              EWA_Level := EWA_Level + 1;
  
           elsif EWA_Level > 0
*************** package body Sem_Util is
*** 20970,20975 ****
--- 21692,21703 ----
        --    * Semantic fields of nodes such as First_Real_Statement must be
        --      updated to reference the proper replicated nodes.
  
+       --  Finally, quantified expressions contain an implicit delaration for
+       --  the bound variable. Given that quantified expressions appearing
+       --  in contracts are copied to create pragmas and eventually checking
+       --  procedures, a new bound variable must be created for each copy, to
+       --  prevent multiple declarations of the same symbol.
+ 
        --  To meet all these demands, routine New_Copy_Tree is split into two
        --  phases.
  
*************** package body Sem_Util is
*** 21401,21406 ****
--- 22129,22166 ----
        end if;
     end New_Requires_Transient_Scope;
  
+    ------------------------
+    -- No_Caching_Enabled --
+    ------------------------
+ 
+    function No_Caching_Enabled (Id : Entity_Id) return Boolean is
+       Prag : constant Node_Id := Get_Pragma (Id, Pragma_No_Caching);
+       Arg1 : Node_Id;
+ 
+    begin
+       if Present (Prag) then
+          Arg1 := First (Pragma_Argument_Associations (Prag));
+ 
+          --  The pragma has an optional Boolean expression, the related
+          --  property is enabled only when the expression evaluates to True.
+ 
+          if Present (Arg1) then
+             return Is_True (Expr_Value (Get_Pragma_Arg (Arg1)));
+ 
+          --  Otherwise the lack of expression enables the property by
+          --  default.
+ 
+          else
+             return True;
+          end if;
+ 
+       --  The property was never set in the first place
+ 
+       else
+          return False;
+       end if;
+    end No_Caching_Enabled;
+ 
     --------------------------
     -- No_Heap_Finalization --
     --------------------------
*************** package body Sem_Util is
*** 22117,22125 ****
     --  Start of processing for Null_Status
  
     begin
        --  An allocator always creates a non-null value
  
!       if Nkind (N) = N_Allocator then
           return Is_Non_Null;
  
        --  Taking the 'Access of something yields a non-null value
--- 22877,22891 ----
     --  Start of processing for Null_Status
  
     begin
+       --  Prevent cascaded errors or infinite loops when trying to determine
+       --  the null status of an erroneous construct.
+ 
+       if Error_Posted (N) then
+          return Unknown;
+ 
        --  An allocator always creates a non-null value
  
!       elsif Nkind (N) = N_Allocator then
           return Is_Non_Null;
  
        --  Taking the 'Access of something yields a non-null value
*************** package body Sem_Util is
*** 22669,22681 ****
           Item := Corresponding_Aspect (Item);
        end if;
  
!       --  Retrieve the name of the aspect/pragma. Note that Pre, Pre_Class,
        --  Post and Post_Class rewrite their pragma identifier to preserve the
!       --  original name.
        --  ??? this is kludgey
  
        if Nkind (Item) = N_Pragma then
!          Item_Nam := Chars (Original_Node (Pragma_Identifier (Item)));
  
        else
           pragma Assert (Nkind (Item) = N_Aspect_Specification);
--- 23435,23450 ----
           Item := Corresponding_Aspect (Item);
        end if;
  
!       --  Retrieve the name of the aspect/pragma. As assertion pragmas from
!       --  a generic instantiation might have been rewritten into pragma Check,
!       --  we look at the original node for Item. Note also that Pre, Pre_Class,
        --  Post and Post_Class rewrite their pragma identifier to preserve the
!       --  original name, so we look at the original node for the identifier.
        --  ??? this is kludgey
  
        if Nkind (Item) = N_Pragma then
!          Item_Nam :=
!            Chars (Original_Node (Pragma_Identifier (Original_Node (Item))));
  
        else
           pragma Assert (Nkind (Item) = N_Aspect_Specification);
*************** package body Sem_Util is
*** 23263,23268 ****
--- 24032,24044 ----
  
           if From_Typ = Typ then
              return;
+ 
+          --  Nothing to do when the destination denotes an incomplete type
+          --  because the DIC is associated with the current instance of a
+          --  private type, thus it can never apply to an incomplete type.
+ 
+          elsif Is_Incomplete_Type (Typ) then
+             return;
           end if;
  
           DIC_Proc := DIC_Procedure (From_Typ);
*************** package body Sem_Util is
*** 24081,24088 ****
           --  A selective accept body appears within a task type, but the
           --  enclosing subprogram is the procedure of the task body.
  
!          elsif Ekind (Curr) = E_Task_Type
!            and then Outer = Task_Body_Procedure (Curr)
           then
              return True;
  
--- 24857,24865 ----
           --  A selective accept body appears within a task type, but the
           --  enclosing subprogram is the procedure of the task body.
  
!          elsif Ekind (Implementation_Base_Type (Curr)) = E_Task_Type
!            and then
!              Outer = Task_Body_Procedure (Implementation_Base_Type (Curr))
           then
              return True;
  
*************** package body Sem_Util is
*** 24114,24126 ****
       (Inner : Entity_Id;
        Outer : Entity_Id) return Boolean
     is
!       Curr : Entity_Id;
  
     begin
!       Curr := Inner;
        while Present (Curr) and then Curr /= Standard_Standard loop
           if Curr = Outer then
              return True;
           end if;
  
           Curr := Scope (Curr);
--- 24891,24924 ----
       (Inner : Entity_Id;
        Outer : Entity_Id) return Boolean
     is
!       Curr : Entity_Id := Inner;
  
     begin
!       --  Similar to the above, but check for scope identity first
! 
        while Present (Curr) and then Curr /= Standard_Standard loop
           if Curr = Outer then
              return True;
+ 
+          elsif Ekind (Implementation_Base_Type (Curr)) = E_Task_Type
+            and then
+              Outer = Task_Body_Procedure (Implementation_Base_Type (Curr))
+          then
+             return True;
+ 
+          elsif Is_Subprogram (Curr)
+            and then Outer = Protected_Body_Subprogram (Curr)
+          then
+             return True;
+ 
+          elsif Is_Private_Type (Curr)
+            and then Present (Full_View (Curr))
+          then
+             if Full_View (Curr) = Outer then
+                return True;
+             else
+                return Scope_Within (Full_View (Curr), Outer);
+             end if;
           end if;
  
           Curr := Scope (Curr);
*************** package body Sem_Util is
*** 25152,25157 ****
--- 25950,26159 ----
        end if;
     end Transfer_Entities;
  
+    ------------------------
+    -- Traverse_More_Func --
+    ------------------------
+ 
+    function Traverse_More_Func (Node : Node_Id) return Traverse_Final_Result is
+ 
+       Processing_Itype : Boolean := False;
+       --  Set to True while traversing the nodes under an Itype, to prevent
+       --  looping on Itype handling during that traversal.
+ 
+       function Process_More (N : Node_Id) return Traverse_Result;
+       --  Wrapper over the Process callback to handle parts of the AST that
+       --  are not normally traversed as syntactic children.
+ 
+       function Traverse_Rec (N : Node_Id) return Traverse_Final_Result;
+       --  Main recursive traversal implemented as an instantiation of
+       --  Traverse_Func over a modified Process callback.
+ 
+       ------------------
+       -- Process_More --
+       ------------------
+ 
+       function Process_More (N : Node_Id) return Traverse_Result is
+ 
+          procedure Traverse_More (N   : Node_Id;
+                                   Res : in out Traverse_Result);
+          procedure Traverse_More (L   : List_Id;
+                                   Res : in out Traverse_Result);
+          --  Traverse a node or list and update the traversal result to value
+          --  Abandon when needed.
+ 
+          -------------------
+          -- Traverse_More --
+          -------------------
+ 
+          procedure Traverse_More (N   : Node_Id;
+                                   Res : in out Traverse_Result)
+          is
+          begin
+             --  Do not process any more nodes if Abandon was reached
+ 
+             if Res = Abandon then
+                return;
+             end if;
+ 
+             if Traverse_Rec (N) = Abandon then
+                Res := Abandon;
+             end if;
+          end Traverse_More;
+ 
+          procedure Traverse_More (L   : List_Id;
+                                   Res : in out Traverse_Result)
+          is
+             N : Node_Id := First (L);
+ 
+          begin
+             --  Do not process any more nodes if Abandon was reached
+ 
+             if Res = Abandon then
+                return;
+             end if;
+ 
+             while Present (N) loop
+                Traverse_More (N, Res);
+                Next (N);
+             end loop;
+          end Traverse_More;
+ 
+          --  Local variables
+ 
+          Node   : Node_Id;
+          Result : Traverse_Result;
+ 
+       --  Start of processing for Process_More
+ 
+       begin
+          --  Initial callback to Process. Return immediately on Skip/Abandon.
+          --  Otherwise update the value of Node for further processing of
+          --  non-syntactic children.
+ 
+          Result := Process (N);
+ 
+          case Result is
+             when OK      => Node := N;
+             when OK_Orig => Node := Original_Node (N);
+             when Skip    => return Skip;
+             when Abandon => return Abandon;
+          end case;
+ 
+          --  Process the relevant semantic children which are a logical part of
+          --  the AST under this node before returning for the processing of
+          --  syntactic children.
+ 
+          --  Start with all non-syntactic lists of action nodes
+ 
+          case Nkind (Node) is
+             when N_Component_Association =>
+                Traverse_More (Loop_Actions (Node),      Result);
+ 
+             when N_Elsif_Part =>
+                Traverse_More (Condition_Actions (Node), Result);
+ 
+             when N_Short_Circuit =>
+                Traverse_More (Actions (Node),           Result);
+ 
+             when N_Case_Expression_Alternative =>
+                Traverse_More (Actions (Node),           Result);
+ 
+             when N_Iterated_Component_Association =>
+                Traverse_More (Loop_Actions (Node),      Result);
+ 
+             when N_Iteration_Scheme =>
+                Traverse_More (Condition_Actions (Node), Result);
+ 
+             when N_If_Expression =>
+                Traverse_More (Then_Actions (Node),      Result);
+                Traverse_More (Else_Actions (Node),      Result);
+ 
+             --  Various nodes have a field Actions as a syntactic node,
+             --  so it will be traversed in the regular syntactic traversal.
+ 
+             when N_Compilation_Unit_Aux
+                | N_Compound_Statement
+                | N_Expression_With_Actions
+                | N_Freeze_Entity
+             =>
+                null;
+ 
+             when others =>
+                null;
+          end case;
+ 
+          --  If Process_Itypes is True, process unattached nodes which come
+          --  from Itypes. This only concerns currently ranges of scalar
+          --  (possibly as index) types. This traversal is protected against
+          --  looping with Processing_Itype.
+ 
+          if Process_Itypes
+            and then not Processing_Itype
+            and then Nkind (Node) in N_Has_Etype
+            and then Present (Etype (Node))
+            and then Is_Itype (Etype (Node))
+          then
+             declare
+                Typ : constant Entity_Id := Etype (Node);
+             begin
+                Processing_Itype := True;
+ 
+                case Ekind (Typ) is
+                   when Scalar_Kind =>
+                      Traverse_More (Scalar_Range (Typ), Result);
+ 
+                   when Array_Kind =>
+                      declare
+                         Index : Node_Id := First_Index (Typ);
+                         Rng   : Node_Id;
+                      begin
+                         while Present (Index) loop
+                            if Nkind (Index) in N_Has_Entity then
+                               Rng := Scalar_Range (Entity (Index));
+                            else
+                               Rng := Index;
+                            end if;
+ 
+                            Traverse_More (Rng,          Result);
+                            Next_Index (Index);
+                         end loop;
+                      end;
+                   when others =>
+                      null;
+                end case;
+ 
+                Processing_Itype := False;
+             end;
+          end if;
+ 
+          return Result;
+       end Process_More;
+ 
+       --  Define Traverse_Rec as a renaming of the instantiation, as an
+       --  instantiation cannot complete a previous spec.
+ 
+       function Traverse_Recursive is new Traverse_Func (Process_More);
+       function Traverse_Rec (N : Node_Id) return Traverse_Final_Result
+                              renames Traverse_Recursive;
+ 
+    --  Start of processing for Traverse_More_Func
+ 
+    begin
+       return Traverse_Rec (Node);
+    end Traverse_More_Func;
+ 
+    ------------------------
+    -- Traverse_More_Proc --
+    ------------------------
+ 
+    procedure Traverse_More_Proc (Node : Node_Id) is
+       function Traverse is new Traverse_More_Func (Process, Process_Itypes);
+       Discard : Traverse_Final_Result;
+       pragma Warnings (Off, Discard);
+    begin
+       Discard := Traverse (Node);
+    end Traverse_More_Proc;
+ 
     -----------------------
     -- Type_Access_Level --
     -----------------------
*************** package body Sem_Util is
*** 25524,25547 ****
  
     function Unique_Name (E : Entity_Id) return String is
  
!       --  Names in E_Subprogram_Body or E_Package_Body entities are not
!       --  reliable, as they may not include the overloading suffix. Instead,
!       --  when looking for the name of E or one of its enclosing scope, we get
!       --  the name of the corresponding Unique_Entity.
  
!       U : constant Entity_Id := Unique_Entity (E);
  
        function This_Name return String;
  
        ---------------
        -- This_Name --
        ---------------
  
        function This_Name return String is
        begin
!          return Get_Name_String (Chars (U));
        end This_Name;
  
     --  Start of processing for Unique_Name
  
     begin
--- 26526,26584 ----
  
     function Unique_Name (E : Entity_Id) return String is
  
!       --  Local subprograms
  
!       function Add_Homonym_Suffix (E : Entity_Id) return String;
  
        function This_Name return String;
  
+       ------------------------
+       -- Add_Homonym_Suffix --
+       ------------------------
+ 
+       function Add_Homonym_Suffix (E : Entity_Id) return String is
+ 
+          --  Names in E_Subprogram_Body or E_Package_Body entities are not
+          --  reliable, as they may not include the overloading suffix.
+          --  Instead, when looking for the name of E or one of its enclosing
+          --  scope, we get the name of the corresponding Unique_Entity.
+ 
+          U   : constant Entity_Id := Unique_Entity (E);
+          Nam : constant String := Get_Name_String (Chars (U));
+ 
+       begin
+          --  If E has homonyms but is not fully qualified, as done in
+          --  GNATprove mode, append the homonym number on the fly. Strip the
+          --  leading space character in the image of natural numbers. Also do
+          --  not print the homonym value of 1.
+ 
+          if Has_Homonym (U) then
+             declare
+                N : constant Pos := Homonym_Number (U);
+                S : constant String := N'Img;
+             begin
+                if N > 1 then
+                   return Nam & "__" & S (2 .. S'Last);
+                end if;
+             end;
+          end if;
+ 
+          return Nam;
+       end Add_Homonym_Suffix;
+ 
        ---------------
        -- This_Name --
        ---------------
  
        function This_Name return String is
        begin
!          return Add_Homonym_Suffix (E);
        end This_Name;
  
+       --  Local variables
+ 
+       U : constant Entity_Id := Unique_Entity (E);
+ 
     --  Start of processing for Unique_Name
  
     begin
*************** package body Sem_Util is
*** 25571,25586 ****
                 end if;
  
              --  For intances of generic subprograms use the name of the related
!             --  instace and skip the scope of its wrapper package.
  
              elsif Is_Wrapper_Package (S) then
                 pragma Assert (Scope (S) = Scope (Related_Instance (S)));
                 --  Wrapper package and the instantiation are in the same scope
  
                 declare
                    Enclosing_Name : constant String :=
!                     Unique_Name (Scope (S)) & "__" &
!                       Get_Name_String (Chars (Related_Instance (S)));
  
                 begin
                    if Is_Subprogram (U)
--- 26608,26624 ----
                 end if;
  
              --  For intances of generic subprograms use the name of the related
!             --  instance and skip the scope of its wrapper package.
  
              elsif Is_Wrapper_Package (S) then
                 pragma Assert (Scope (S) = Scope (Related_Instance (S)));
                 --  Wrapper package and the instantiation are in the same scope
  
                 declare
+                   Related_Name : constant String :=
+                     Add_Homonym_Suffix (Related_Instance (S));
                    Enclosing_Name : constant String :=
!                     Unique_Name (Scope (S)) & "__" & Related_Name;
  
                 begin
                    if Is_Subprogram (U)
*************** package body Sem_Util is
*** 25592,25597 ****
--- 26630,26637 ----
                    end if;
                 end;
  
+             elsif Is_Child_Unit (U) then
+                return Child_Prefix & Unique_Name (S) & "__" & This_Name;
              else
                 return Unique_Name (S) & "__" & This_Name;
              end if;
*************** package body Sem_Util is
*** 26057,26063 ****
           return;
  
        --  In  an instance, there is an ongoing problem with completion of
!       --  type derived from private types. Their structure is what Gigi
        --  expects, but the  Etype is the parent type rather than the
        --  derived private type itself. Do not flag error in this case. The
        --  private completion is an entity without a parent, like an Itype.
--- 27097,27103 ----
           return;
  
        --  In  an instance, there is an ongoing problem with completion of
!       --  types derived from private types. Their structure is what Gigi
        --  expects, but the  Etype is the parent type rather than the
        --  derived private type itself. Do not flag error in this case. The
        --  private completion is an entity without a parent, like an Itype.
*************** package body Sem_Util is
*** 26068,26074 ****
        --  same reason: inserted body may be outside of the original package
        --  and only partial views are visible at the point of insertion.
  
!       elsif In_Instance or else In_Inlined_Body then
           if Etype (Etype (Expr)) = Etype (Expected_Type)
             and then
               (Has_Private_Declaration (Expected_Type)
--- 27108,27124 ----
        --  same reason: inserted body may be outside of the original package
        --  and only partial views are visible at the point of insertion.
  
!       --  If In_Generic_Actual (Expr) is True then we cannot assume that
!       --  the successful semantic analysis of the generic guarantees anything
!       --  useful about type checking of this instance, so we ignore
!       --  In_Instance in that case. There may be cases where this is not
!       --  right (the symptom would probably be rejecting something
!       --  that ought to be accepted) but we don't currently have any
!       --  concrete examples of this.
! 
!       elsif (In_Instance and then not In_Generic_Actual (Expr))
!         or else In_Inlined_Body
!       then
           if Etype (Etype (Expr)) = Etype (Expected_Type)
             and then
               (Has_Private_Declaration (Expected_Type)
*************** package body Sem_Util is
*** 26343,26354 ****
  
        --  A record type or type extension yields a synchronized object when its
        --  discriminants (if any) lack default values and all components are of
!       --  a type that yelds a synchronized object.
  
        elsif Is_Record_Type (Typ) then
  
           --  Inspect all entities defined in the scope of the type, looking for
!          --  components of a type that does not yeld a synchronized object or
           --  for discriminants with default values.
  
           Id := First_Entity (Typ);
--- 27393,27404 ----
  
        --  A record type or type extension yields a synchronized object when its
        --  discriminants (if any) lack default values and all components are of
!       --  a type that yields a synchronized object.
  
        elsif Is_Record_Type (Typ) then
  
           --  Inspect all entities defined in the scope of the type, looking for
!          --  components of a type that does not yield a synchronized object or
           --  for discriminants with default values.
  
           Id := First_Entity (Typ);
*************** package body Sem_Util is
*** 26378,26383 ****
--- 27428,27434 ----
           --  synchronized object.
  
           if Etype (Typ) /= Typ
+            and then not Is_Private_Type (Etype (Typ))
             and then not Yields_Synchronized_Object (Etype (Typ))
           then
              return False;
*************** package body Sem_Util is
*** 26393,26403 ****
        elsif Is_Synchronized_Interface (Typ) then
           return True;
  
!       --  A task type yelds a synchronized object by default
  
        elsif Is_Task_Type (Typ) then
           return True;
  
        --  Otherwise the type does not yield a synchronized object
  
        else
--- 27444,27462 ----
        elsif Is_Synchronized_Interface (Typ) then
           return True;
  
!       --  A task type yields a synchronized object by default
  
        elsif Is_Task_Type (Typ) then
           return True;
  
+       --  A private type yields a synchronized object if its underlying type
+       --  does.
+ 
+       elsif Is_Private_Type (Typ)
+         and then Present (Underlying_Type (Typ))
+       then
+          return Yields_Synchronized_Object (Underlying_Type (Typ));
+ 
        --  Otherwise the type does not yield a synchronized object
  
        else
*************** package body Sem_Util is
*** 26429,26434 ****
--- 27488,27854 ----
        end if;
     end Yields_Universal_Type;
  
+    package body Interval_Lists is
+ 
+       function In_Interval
+         (Value : Uint; Interval : Discrete_Interval) return Boolean;
+       --  Does the given value lie within the given interval?
+ 
+       -----------------
+       -- In_Interval --
+       -----------------
+       function In_Interval
+         (Value : Uint; Interval : Discrete_Interval) return Boolean is
+       begin
+          return Value >= Interval.Low and then Value <= Interval.High;
+       end In_Interval;
+ 
+       procedure Check_Consistency (Intervals : Discrete_Interval_List);
+       --  Check that list is sorted, lacks null intervals, and has gaps
+       --  between intervals.
+ 
+       ------------------------
+       --  Check_Consistency --
+       ------------------------
+       procedure Check_Consistency (Intervals : Discrete_Interval_List) is
+       begin
+          if Serious_Errors_Detected > 0 then
+             return;
+          end if;
+ 
+          --  low bound is 1 and high bound equals length
+          pragma Assert (Intervals'First = 1 and Intervals'Last >= 0);
+          for Idx in Intervals'Range loop
+             --  each interval is non-null
+             pragma Assert (Intervals (Idx).Low <= Intervals (Idx).High);
+             if Idx /= Intervals'First then
+                --  intervals are sorted with non-empty gaps between them
+                pragma Assert
+                  (Intervals (Idx - 1).High < (Intervals (Idx).Low - 1));
+                null;
+             end if;
+          end loop;
+       end Check_Consistency;
+ 
+       function Chosen_Interval (Choice : Node_Id) return Discrete_Interval;
+       --  Given an element of a Discrete_Choices list, a
+       --  Static_Discrete_Predicate list, or an Others_Discrete_Choices
+       --  list (but not an N_Others_Choice node) return the corresponding
+       --  interval. If an element that does not represent a single
+       --  contiguous interval due to a static predicate (or which
+       --  represents a single contiguous interval whose bounds depend on
+       --  a static predicate) is encountered, then that is an error on the
+       --  part of whoever built the list in question.
+ 
+       ---------------------
+       -- Chosen_Interval --
+       ---------------------
+       function Chosen_Interval (Choice : Node_Id) return Discrete_Interval is
+       begin
+          case Nkind (Choice) is
+             when N_Range =>
+                return (Low  => Expr_Value (Low_Bound (Choice)),
+                        High => Expr_Value (High_Bound (Choice)));
+ 
+             when N_Subtype_Indication =>
+                declare
+                   Range_Exp : constant Node_Id
+                     := Range_Expression (Constraint (Choice));
+                begin
+                   return (Low  => Expr_Value (Low_Bound (Range_Exp)),
+                           High => Expr_Value (High_Bound (Range_Exp)));
+                end;
+ 
+             when N_Others_Choice =>
+                raise Program_Error;
+ 
+             when others =>
+                if Is_Entity_Name (Choice) and then Is_Type (Entity (Choice))
+                then
+                   return
+                     (Low  => Expr_Value (Type_Low_Bound (Entity (Choice))),
+                      High => Expr_Value (Type_High_Bound (Entity (Choice))));
+                else
+                   --  an expression
+                   return (Low | High => Expr_Value (Choice));
+                end if;
+          end case;
+       end Chosen_Interval;
+ 
+       --------------------
+       -- Type_Intervals --
+       --------------------
+       function Type_Intervals
+         (Typ : Entity_Id) return Discrete_Interval_List
+       is
+       begin
+          if Has_Static_Predicate (Typ) then
+             declare
+                --  No sorting or merging needed
+                SDP_List : constant List_Id := Static_Discrete_Predicate (Typ);
+                Range_Or_Expr : Node_Id := First (SDP_List);
+                Result :
+                  Discrete_Interval_List (1 .. List_Length (SDP_List));
+             begin
+                for Idx in Result'Range loop
+                   Result (Idx) := Chosen_Interval (Range_Or_Expr);
+                   Range_Or_Expr := Next (Range_Or_Expr);
+                end loop;
+                pragma Assert (not Present (Range_Or_Expr));
+                Check_Consistency (Result);
+                return Result;
+             end;
+          else
+             declare
+                Low  : constant Uint := Expr_Value (Type_Low_Bound (Typ));
+                High : constant Uint := Expr_Value (Type_High_Bound (Typ));
+             begin
+                if Low > High then
+                   declare
+                      Null_Array : Discrete_Interval_List (1 .. 0);
+                   begin
+                      return Null_Array;
+                   end;
+                else
+                   return (1 => (Low => Low, High => High));
+                end if;
+             end;
+          end if;
+       end Type_Intervals;
+ 
+       procedure Normalize_Interval_List
+          (List : in out Discrete_Interval_List; Last : out Nat);
+       --  Perform sorting and merging as required by Check_Consistency.
+ 
+       -----------------------------
+       -- Normalize_Interval_List --
+       -----------------------------
+       procedure Normalize_Interval_List
+         (List : in out Discrete_Interval_List; Last : out Nat) is
+ 
+          procedure Move_Interval (From, To : Natural);
+          --  Copy interval from one location to another
+ 
+          function Lt_Interval (Idx1, Idx2 : Natural) return Boolean;
+          --  Compare two list elements
+ 
+          Temp_0 : Discrete_Interval := (others => Uint_0);
+          --  cope with Heap_Sort_G idiosyncrasies.
+ 
+          function Read_Interval (From : Natural) return Discrete_Interval;
+          --  Normal array indexing unless From = 0
+ 
+          -------------------
+          -- Read_Interval --
+          -------------------
+          function Read_Interval (From : Natural) return Discrete_Interval is
+          begin
+             if From = 0 then
+                return Temp_0;
+             else
+                return List (Pos (From));
+             end if;
+          end Read_Interval;
+ 
+          -------------------
+          -- Move_Interval --
+          -------------------
+          procedure Move_Interval (From, To : Natural) is
+             Rhs : constant Discrete_Interval := Read_Interval (From);
+          begin
+             if To = 0 then
+                Temp_0 := Rhs;
+             else
+                List (Pos (To)) := Rhs;
+             end if;
+          end Move_Interval;
+ 
+          -----------------
+          -- Lt_Interval --
+          -----------------
+          function Lt_Interval (Idx1, Idx2 : Natural) return Boolean is
+             Elem1  : constant Discrete_Interval := Read_Interval (Idx1);
+             Elem2  : constant Discrete_Interval := Read_Interval (Idx2);
+             Null_1 : constant Boolean := Elem1.Low > Elem1.High;
+             Null_2 : constant Boolean := Elem2.Low > Elem2.High;
+          begin
+             if Null_1 /= Null_2 then
+                --  So that sorting moves null intervals to high end
+                return Null_2;
+             elsif Elem1.Low /= Elem2.Low then
+                return Elem1.Low < Elem2.Low;
+             else
+                return Elem1.High < Elem2.High;
+             end if;
+          end Lt_Interval;
+ 
+          package Interval_Sorting is
+            new Gnat.Heap_Sort_G (Move_Interval, Lt_Interval);
+ 
+          function Is_Null (Idx : Pos) return Boolean;
+          --  True iff List (Idx) defines a null range
+ 
+          function Is_Null (Idx : Pos) return Boolean is
+          begin
+             return List (Idx).Low > List (Idx).High;
+          end Is_Null;
+ 
+          procedure Merge_Intervals (Null_Interval_Count : out Nat);
+          --  Merge contiguous ranges by replacing one with merged range
+          --  and the other with a null value. Return a count of the
+          --  null intervals, both preexisting and those introduced by
+          --  merging.
+ 
+          ---------------------
+          -- Merge_Intervals --
+          ---------------------
+          procedure Merge_Intervals (Null_Interval_Count : out Nat) is
+             Not_Null : Pos range List'Range;
+             --  Index of the most recently examined non-null interval
+ 
+             Null_Interval : constant Discrete_Interval
+               := (Low => Uint_1, High => Uint_0); -- any null range ok here
+          begin
+             if List'Length = 0 or else Is_Null (List'First) then
+                Null_Interval_Count := List'Length;
+                --  no non-null elements, so no merge candidates
+                return;
+             end if;
+ 
+             Null_Interval_Count := 0;
+             Not_Null := List'First;
+             for Idx in List'First + 1 .. List'Last loop
+                if Is_Null (Idx) then
+                   --  all remaining elements are null
+                   Null_Interval_Count :=
+                     Null_Interval_Count + List (Idx .. List'Last)'Length;
+                   return;
+                elsif List (Idx).Low = List (Not_Null).High + 1 then
+                   --  Merge the two intervals into one; discard the other
+                   List (Not_Null).High := List (Idx).High;
+                   List (Idx) := Null_Interval;
+                   Null_Interval_Count := Null_Interval_Count + 1;
+                else
+                   pragma Assert (List (Idx).Low > List (Not_Null).High);
+                   Not_Null := Idx;
+                end if;
+             end loop;
+          end Merge_Intervals;
+       begin
+          Interval_Sorting.Sort (Natural (List'Last));
+          declare
+             Null_Interval_Count : Nat;
+          begin
+             Merge_Intervals (Null_Interval_Count);
+             Last := List'Last - Null_Interval_Count;
+             if Null_Interval_Count /= 0 then
+                --  Move null intervals introduced during merging to high end
+                Interval_Sorting.Sort (Natural (List'Last));
+             end if;
+          end;
+       end Normalize_Interval_List;
+ 
+       ---------------------------
+       -- Choice_List_Intervals --
+       ---------------------------
+       function Choice_List_Intervals
+         (Discrete_Choices : List_Id) return Discrete_Interval_List
+       is
+          function Unmerged_Choice_Count return Nat;
+          --  The number of intervals before adjacent intervals are merged.
+ 
+          ---------------------------
+          -- Unmerged_Choice_Count --
+          ---------------------------
+          function Unmerged_Choice_Count return Nat is
+             Choice : Node_Id := First (Discrete_Choices);
+             Count  : Nat := 0;
+          begin
+             while Present (Choice) loop
+                --  Non-contiguous choices involving static predicates
+                --  have already been normalized away.
+ 
+                if Nkind (Choice) = N_Others_Choice then
+                   Count :=
+                     Count + List_Length (Others_Discrete_Choices (Choice));
+                else
+                   Count := Count + 1;  -- an ordinary expression or range
+                end if;
+ 
+                Choice := Next (Choice);
+             end loop;
+             return Count;
+          end Unmerged_Choice_Count;
+ 
+          Choice : Node_Id := First (Discrete_Choices);
+          Result : Discrete_Interval_List (1 .. Unmerged_Choice_Count);
+          Count  : Nat := 0;
+       begin
+          while Present (Choice) loop
+             if Nkind (Choice) = N_Others_Choice then
+                declare
+                   Others_Choice : Node_Id
+                     := First (Others_Discrete_Choices (Choice));
+                begin
+                   while Present (Others_Choice) loop
+                      Count := Count + 1;
+                      Result (Count) := Chosen_Interval (Others_Choice);
+                      Others_Choice := Next (Others_Choice);
+                   end loop;
+                end;
+             else
+                Count := Count + 1;
+                Result (Count) := Chosen_Interval (Choice);
+             end if;
+             Choice := Next (Choice);
+          end loop;
+          pragma Assert (Count = Result'Last);
+          Normalize_Interval_List (Result, Count);
+          Check_Consistency (Result (1 .. Count));
+          return Result (1 .. Count);
+       end Choice_List_Intervals;
+ 
+       ---------------
+       -- Is_Subset --
+       ---------------
+       function Is_Subset
+         (Subset, Of_Set : Discrete_Interval_List) return Boolean
+       is
+          --  Returns True iff for each interval of Subset we can find
+          --  a single interval of Of_Set which contains the Subset interval.
+       begin
+          if Of_Set'Length = 0 then
+             return Subset'Length = 0;
+          end if;
+ 
+          declare
+             Set_Index : Pos range Of_Set'Range := Of_Set'First;
+          begin
+             for Ss_Idx in Subset'Range loop
+                while not In_Interval
+                  (Value    => Subset (Ss_Idx).Low,
+                   Interval => Of_Set (Set_Index))
+                loop
+                   if Set_Index = Of_Set'Last then
+                      return False;
+                   end if;
+                   Set_Index := Set_Index + 1;
+                end loop;
+ 
+                if not In_Interval
+                  (Value    => Subset (Ss_Idx).High,
+                   Interval => Of_Set (Set_Index))
+                then
+                   return False;
+                end if;
+             end loop;
+          end;
+ 
+          return True;
+       end Is_Subset;
+ 
+    end Interval_Lists;
+ 
  begin
     Erroutc.Subprogram_Name_Ptr := Subprogram_Name'Access;
  end Sem_Util;
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_util.ads gcc-10.1.0/gcc/ada/sem_util.ads
*** gcc-9.3.0/gcc/ada/sem_util.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_util.ads	Thu May  7 10:49:59 2020
***************
*** 25,30 ****
--- 25,31 ----
  
  --  Package containing utility procedures used throughout the semantics
  
+ with Atree;   use Atree;
  with Einfo;   use Einfo;
  with Exp_Tss; use Exp_Tss;
  with Namet;   use Namet;
*************** package Sem_Util is
*** 41,46 ****
--- 42,53 ----
     --  including the cases where there can't be any because e.g. the type is
     --  not tagged.
  
+    function Acquire_Warning_Match_String (Str_Lit : Node_Id) return String;
+    --  Used by pragma Warnings (Off, string), and Warn_As_Error (string) to get
+    --  the given string argument, adding leading and trailing asterisks if they
+    --  are not already present.  Str_Lit is the static value of the pragma
+    --  argument.
+ 
     procedure Add_Access_Type_To_Process (E : Entity_Id; A : Entity_Id);
     --  Add A to the list of access types to process when expanding the
     --  freeze node of E.
*************** package Sem_Util is
*** 464,479 ****
     --  the type itself.
  
     function Compile_Time_Constraint_Error
!      (N    : Node_Id;
!       Msg  : String;
!       Ent  : Entity_Id  := Empty;
!       Loc  : Source_Ptr := No_Location;
!       Warn : Boolean    := False) return Node_Id;
     --  This is similar to Apply_Compile_Time_Constraint_Error in that it
     --  generates a warning (or error) message in the same manner, but it does
     --  not replace any nodes. For convenience, the function always returns its
     --  first argument. The message is a warning if the message ends with ?, or
     --  we are operating in Ada 83 mode, or the Warn parameter is set to True.
  
     procedure Conditional_Delay (New_Ent, Old_Ent : Entity_Id);
     --  Sets the Has_Delayed_Freeze flag of New_Ent if the Delayed_Freeze flag
--- 471,490 ----
     --  the type itself.
  
     function Compile_Time_Constraint_Error
!      (N         : Node_Id;
!       Msg       : String;
!       Ent       : Entity_Id  := Empty;
!       Loc       : Source_Ptr := No_Location;
!       Warn      : Boolean    := False;
!       Extra_Msg : String     := "") return Node_Id;
     --  This is similar to Apply_Compile_Time_Constraint_Error in that it
     --  generates a warning (or error) message in the same manner, but it does
     --  not replace any nodes. For convenience, the function always returns its
     --  first argument. The message is a warning if the message ends with ?, or
     --  we are operating in Ada 83 mode, or the Warn parameter is set to True.
+    --  If Extra_Msg is not a null string, then it's associated with N and
+    --  emitted immediately after the main message (and before output of any
+    --  message indicating that Constraint_Error will be raised).
  
     procedure Conditional_Delay (New_Ent, Old_Ent : Entity_Id);
     --  Sets the Has_Delayed_Freeze flag of New_Ent if the Delayed_Freeze flag
*************** package Sem_Util is
*** 536,542 ****
     function Deepest_Type_Access_Level (Typ : Entity_Id) return Uint;
     --  Same as Type_Access_Level, except that if the type is the type of an Ada
     --  2012 stand-alone object of an anonymous access type, then return the
!    --  static accesssibility level of the object. In that case, the dynamic
     --  accessibility level of the object may take on values in a range. The low
     --  bound of that range is returned by Type_Access_Level; this function
     --  yields the high bound of that range. Also differs from Type_Access_Level
--- 547,553 ----
     function Deepest_Type_Access_Level (Typ : Entity_Id) return Uint;
     --  Same as Type_Access_Level, except that if the type is the type of an Ada
     --  2012 stand-alone object of an anonymous access type, then return the
!    --  static accessibility level of the object. In that case, the dynamic
     --  accessibility level of the object may take on values in a range. The low
     --  bound of that range is returned by Type_Access_Level; this function
     --  yields the high bound of that range. Also differs from Type_Access_Level
*************** package Sem_Util is
*** 555,560 ****
--- 566,573 ----
     --  debugging information, generated through Qualify_Entity_Names, and
     --  the loop declaration must be placed in the table Name_Qualify_Units.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Denotes_Discriminant
       (N                : Node_Id;
        Check_Concurrent : Boolean := False) return Boolean;
*************** package Sem_Util is
*** 603,613 ****
     --  private components of protected objects, but is generally useful when
     --  restriction No_Implicit_Heap_Allocation is active.
  
!    function Dynamic_Accessibility_Level (Expr : Node_Id) return Node_Id;
!    --  Expr should be an expression of an access type. Builds an integer
!    --  literal except in cases involving anonymous access types, where
!    --  accessibility levels are tracked at run time (access parameters and
!    --  Ada 2012 stand-alone objects).
  
     function Effective_Extra_Accessibility (Id : Entity_Id) return Entity_Id;
     --  Same as Einfo.Extra_Accessibility except thtat object renames
--- 616,626 ----
     --  private components of protected objects, but is generally useful when
     --  restriction No_Implicit_Heap_Allocation is active.
  
!    function Dynamic_Accessibility_Level (N : Node_Id) return Node_Id;
!    --  N should be an expression of an access type. Builds an integer literal
!    --  except in cases involving anonymous access types, where accessibility
!    --  levels are tracked at run time (access parameters and Ada 2012 stand-
!    --  alone objects).
  
     function Effective_Extra_Accessibility (Id : Entity_Id) return Entity_Id;
     --  Same as Einfo.Extra_Accessibility except thtat object renames
*************** package Sem_Util is
*** 689,694 ****
--- 702,711 ----
     --  If no suitable entity is available, return Empty. This routine carries
     --  out actions that are tied to SPARK semantics.
  
+    function Exceptions_OK return Boolean;
+    --  Determine whether exceptions are allowed to be caught, propagated, or
+    --  raised.
+ 
     procedure Explain_Limited_Type (T : Entity_Id; N : Node_Id);
     --  This procedure is called after issuing a message complaining about an
     --  inappropriate use of limited type T. If useful, it adds additional
*************** package Sem_Util is
*** 886,891 ****
--- 903,910 ----
     --  Note that the value returned is always the expression (not the
     --  N_Parameter_Association nodes, even if named association is used).
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function First_Global
       (Subp        : Entity_Id;
        Global_Mode : Name_Id;
*************** package Sem_Util is
*** 949,954 ****
--- 968,977 ----
     --  discriminants. Otherwise all components of the parent must be included
     --  in the subtype for semantic analysis.
  
+    function Get_Accessibility (E : Entity_Id) return Node_Id;
+    --  Obtain the accessibility level for a given entity formal taking into
+    --  account both extra and minimum accessibility.
+ 
     function Get_Actual_Subtype (N : Node_Id) return Entity_Id;
     --  Given a node for an expression, obtain the actual subtype of the
     --  expression. In the case of a parameter where the formal is an
*************** package Sem_Util is
*** 1387,1392 ****
--- 1410,1418 ----
     --  Returns True if node N appears within a pre/postcondition pragma. Note
     --  the pragma Check equivalents are NOT considered.
  
+    function In_Quantified_Expression (N : Node_Id) return Boolean;
+    --  Returns true if the expression N occurs within a quantified expression
+ 
     function In_Reverse_Storage_Order_Object (N : Node_Id) return Boolean;
     --  Returns True if N denotes a component or subcomponent in a record or
     --  array that has Reverse_Storage_Order.
*************** package Sem_Util is
*** 1420,1425 ****
--- 1446,1454 ----
     --  package specification. The package must be on the scope stack, and the
     --  corresponding private part must not.
  
+    function In_While_Loop_Condition (N : Node_Id) return Boolean;
+    --  Returns true if the expression N occurs within the condition of a while
+ 
     function Incomplete_Or_Partial_View (Id : Entity_Id) return Entity_Id;
     --  Given the entity of a constant or a type, retrieve the incomplete or
     --  partial view of the same entity. Note that Id may not have a partial
*************** package Sem_Util is
*** 1502,1517 ****
  
     function Is_Atomic_Object (N : Node_Id) return Boolean;
     --  Determine whether arbitrary node N denotes a reference to an atomic
!    --  object as per Ada RM C.6(12).
! 
!    function Is_Atomic_Object_Entity (Id : Entity_Id) return Boolean;
!    --  Determine whether arbitrary entity Id denotes an atomic object as per
!    --  Ada RM C.6(12).
  
     function Is_Atomic_Or_VFA_Object (N : Node_Id) return Boolean;
     --  Determine whether arbitrary node N denotes a reference to an object
     --  which is either atomic or Volatile_Full_Access.
  
     function Is_Attribute_Result (N : Node_Id) return Boolean;
     --  Determine whether node N denotes attribute 'Result
  
--- 1531,1545 ----
  
     function Is_Atomic_Object (N : Node_Id) return Boolean;
     --  Determine whether arbitrary node N denotes a reference to an atomic
!    --  object as per RM C.6(7) and the crucial remark in RM C.6(8).
  
     function Is_Atomic_Or_VFA_Object (N : Node_Id) return Boolean;
     --  Determine whether arbitrary node N denotes a reference to an object
     --  which is either atomic or Volatile_Full_Access.
  
+    function Is_Attribute_Old (N : Node_Id) return Boolean;
+    --  Determine whether node N denotes attribute 'Old
+ 
     function Is_Attribute_Result (N : Node_Id) return Boolean;
     --  Determine whether node N denotes attribute 'Result
  
*************** package Sem_Util is
*** 1655,1661 ****
     function Is_Effectively_Volatile (Id : Entity_Id) return Boolean;
     --  Determine whether a type or object denoted by entity Id is effectively
     --  volatile (SPARK RM 7.1.2). To qualify as such, the entity must be either
!    --    * Volatile
     --    * An array type subject to aspect Volatile_Components
     --    * An array type whose component type is effectively volatile
     --    * A protected type
--- 1683,1689 ----
     function Is_Effectively_Volatile (Id : Entity_Id) return Boolean;
     --  Determine whether a type or object denoted by entity Id is effectively
     --  volatile (SPARK RM 7.1.2). To qualify as such, the entity must be either
!    --    * Volatile without No_Caching
     --    * An array type subject to aspect Volatile_Components
     --    * An array type whose component type is effectively volatile
     --    * A protected type
*************** package Sem_Util is
*** 1717,1722 ****
--- 1745,1754 ----
     --  Determine whether arbitrary declaration Decl denotes a generic package,
     --  a generic subprogram or a generic body.
  
+    function Is_Independent_Object (N : Node_Id) return Boolean;
+    --  Determine whether arbitrary node N denotes a reference to an independent
+    --  object as per RM C.6(8).
+ 
     function Is_Inherited_Operation (E : Entity_Id) return Boolean;
     --  E is a subprogram. Return True is E is an implicit operation inherited
     --  by a derived type declaration.
*************** package Sem_Util is
*** 1962,1967 ****
--- 1994,2003 ----
     --  the N_Statement_Other_Than_Procedure_Call subtype from Sinfo).
     --  Note that a label is *not* a statement, and will return False.
  
+    function Is_Subcomponent_Of_Atomic_Object (N : Node_Id) return Boolean;
+    --  Determine whether arbitrary node N denotes a reference to a subcomponent
+    --  of an atomic object as per RM C.6(7).
+ 
     function Is_Subprogram_Contract_Annotation (Item : Node_Id) return Boolean;
     --  Determine whether aspect specification or pragma Item is one of the
     --  following subprogram contract annotations:
*************** package Sem_Util is
*** 2037,2042 ****
--- 2073,2080 ----
     function Is_Variable_Size_Record (E : Entity_Id) return Boolean;
     --  Returns true if E has variable size components
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Is_Variable
       (N                 : Node_Id;
        Use_Original_Node : Boolean := True) return Boolean;
*************** package Sem_Util is
*** 2057,2072 ****
     --  Initialize/Adjust/Finalize subprogram does not override the inherited
     --  one.
  
     function Is_Volatile_Function (Func_Id : Entity_Id) return Boolean;
     --  Determine whether [generic] function Func_Id is subject to enabled
     --  pragma Volatile_Function. Protected functions are treated as volatile
     --  (SPARK RM 7.1.2).
  
     function Is_Volatile_Object (N : Node_Id) return Boolean;
!    --  Determines if the given node denotes an volatile object in the sense of
!    --  the legality checks described in RM C.6(12). Note that the test here is
!    --  for something actually declared as volatile, not for an object that gets
!    --  treated as volatile (see Einfo.Treat_As_Volatile).
  
     generic
        with procedure Handle_Parameter (Formal : Entity_Id; Actual : Node_Id);
--- 2095,2114 ----
     --  Initialize/Adjust/Finalize subprogram does not override the inherited
     --  one.
  
+    function Is_Volatile_Full_Access_Object (N : Node_Id) return Boolean;
+    --  Determine whether arbitrary node N denotes a reference to an object
+    --  which is Volatile_Full_Access.
+ 
     function Is_Volatile_Function (Func_Id : Entity_Id) return Boolean;
     --  Determine whether [generic] function Func_Id is subject to enabled
     --  pragma Volatile_Function. Protected functions are treated as volatile
     --  (SPARK RM 7.1.2).
  
     function Is_Volatile_Object (N : Node_Id) return Boolean;
!    --  Determine whether arbitrary node N denotes a reference to a volatile
!    --  object as per RM C.6(8). Note that the test here is for something that
!    --  is actually declared as volatile, not for an object that gets treated
!    --  as volatile (see Einfo.Treat_As_Volatile).
  
     generic
        with procedure Handle_Parameter (Formal : Entity_Id; Actual : Node_Id);
*************** package Sem_Util is
*** 2163,2168 ****
--- 2205,2214 ----
     --    Modes    - Save the Ghost and SPARK modes in effect (if applicable)
     --    Warnings - Save the status of Elab_Warnings
  
+    procedure Mark_Save_Invocation_Graph_Of_Body;
+    --  Notify the body of the main unit that the invocation constructs and
+    --  relations expressed within it must be recorded by the ABE mechanism.
+ 
     function Matching_Static_Array_Bounds
       (L_Typ : Node_Id;
        R_Typ : Node_Id) return Boolean;
*************** package Sem_Util is
*** 2190,2195 ****
--- 2236,2245 ----
     --  Return the entity of the nearest enclosing instance which encapsulates
     --  entity E. If no such instance exits, return Empty.
  
+    function Needs_Finalization (Typ : Entity_Id) return Boolean;
+    --  Determine whether type Typ is controlled and this requires finalization
+    --  actions.
+ 
     function Needs_One_Actual (E : Entity_Id) return Boolean;
     --  Returns True if a function has defaults for all but its first formal,
     --  which is a controlling formal. Used in Ada 2005 mode to solve the
*************** package Sem_Util is
*** 2328,2338 ****
     --  when the resulting entity does not have to be referenced as a
     --  public entity (and in this case Is_Public is not set).
  
-    procedure Next_Actual (Actual_Id : in out Node_Id);
-    pragma Inline (Next_Actual);
-    --  Next_Actual (N) is equivalent to N := Next_Actual (N). Note that we
-    --  inline this procedural form, but not the functional form that follows.
- 
     function Next_Actual (Actual_Id : Node_Id) return Node_Id;
     --  Find next actual parameter in declaration order. As described for
     --  First_Actual, this is the next actual in the declaration order, not
--- 2378,2383 ----
*************** package Sem_Util is
*** 2342,2357 ****
     --  Note that the result produced is always an expression, not a parameter
     --  association node, even if named notation was used.
  
!    procedure Next_Global (Node : in out Node_Id);
     pragma Inline (Next_Actual);
!    --  Next_Global (N) is equivalent to N := Next_Global (N). Note that we
!    --  inline this procedural form, but not the functional form that follows.
  
     function Next_Global (Node : Node_Id) return Node_Id;
     --  Node is a global item from a list, obtained through calling First_Global
     --  and possibly Next_Global a number of times. Returns the next global item
     --  with the same mode.
  
     function No_Heap_Finalization (Typ : Entity_Id) return Boolean;
     --  Determine whether type Typ is subject to pragma No_Heap_Finalization
  
--- 2387,2414 ----
     --  Note that the result produced is always an expression, not a parameter
     --  association node, even if named notation was used.
  
!    --  WARNING: There is a matching C declaration of this subprogram in fe.h
! 
!    procedure Next_Actual (Actual_Id : in out Node_Id);
     pragma Inline (Next_Actual);
!    --  Next_Actual (N) is equivalent to N := Next_Actual (N). Note that we
!    --  inline this procedural form, but not the functional form above.
  
     function Next_Global (Node : Node_Id) return Node_Id;
     --  Node is a global item from a list, obtained through calling First_Global
     --  and possibly Next_Global a number of times. Returns the next global item
     --  with the same mode.
  
+    procedure Next_Global (Node : in out Node_Id);
+    pragma Inline (Next_Actual);
+    --  Next_Global (N) is equivalent to N := Next_Global (N). Note that we
+    --  inline this procedural form, but not the functional form above.
+ 
+    function No_Caching_Enabled (Id : Entity_Id) return Boolean;
+    --  Given the entity of a variable, determine whether Id is subject to
+    --  volatility property No_Caching and if it is, the related expression
+    --  evaluates to True.
+ 
     function No_Heap_Finalization (Typ : Entity_Id) return Boolean;
     --  Determine whether type Typ is subject to pragma No_Heap_Finalization
  
*************** package Sem_Util is
*** 2550,2555 ****
--- 2607,2614 ----
     --  controlled types and variable-sized types including unconstrained
     --  arrays.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     procedure Reset_Analyzed_Flags (N : Node_Id);
     --  Reset the Analyzed flags in all nodes of the tree whose root is N
  
*************** package Sem_Util is
*** 2627,2633 ****
     function Scope_Within_Or_Same
       (Inner : Entity_Id;
        Outer : Entity_Id) return Boolean;
!    --  Determine whether scope Inner appears within scope Outer or both renote
     --  the same scope. Note that scopes are partially ordered, so Scope_Within
     --  (A, B) and Scope_Within (B, A) may both return False.
  
--- 2686,2692 ----
     function Scope_Within_Or_Same
       (Inner : Entity_Id;
        Outer : Entity_Id) return Boolean;
!    --  Determine whether scope Inner appears within scope Outer or both denote
     --  the same scope. Note that scopes are partially ordered, so Scope_Within
     --  (A, B) and Scope_Within (B, A) may both return False.
  
*************** package Sem_Util is
*** 2777,2782 ****
--- 2836,2860 ----
     --  Move a list of entities from one scope to another, and recompute
     --  Is_Public based upon the new scope.
  
+    generic
+       with function Process (N : Node_Id) return Traverse_Result is <>;
+       Process_Itypes : Boolean := False;
+    function Traverse_More_Func (Node : Node_Id) return Traverse_Final_Result;
+    --  This is a version of Atree.Traverse_Func that not only traverses
+    --  syntactic children of nodes, but also semantic children which are
+    --  logically children of the node. This concerns currently lists of
+    --  action nodes and ranges under Itypes, both inserted by the compiler.
+    --  Itypes are only traversed when Process_Itypes is True.
+ 
+    generic
+       with function Process (N : Node_Id) return Traverse_Result is <>;
+       Process_Itypes : Boolean := False;
+    procedure Traverse_More_Proc (Node : Node_Id);
+    pragma Inline (Traverse_More_Proc);
+    --  This is the same as Traverse_More_Func except that no result is
+    --  returned, i.e. Traverse_More_Func is called and the result is simply
+    --  discarded.
+ 
     function Type_Access_Level (Typ : Entity_Id) return Uint;
     --  Return the accessibility level of Typ
  
*************** package Sem_Util is
*** 2824,2829 ****
--- 2902,2911 ----
     --  Return a unique name for entity E, which could be used to identify E
     --  across compilation units.
  
+    Child_Prefix : constant String := "ada___";
+    --  Prefix for child packages when building a unique name for an entity. It
+    --  is included here to share between Unique_Name and gnatprove.
+ 
     function Unit_Is_Visible (U : Entity_Id) return Boolean;
     --  Determine whether a compilation unit is visible in the current context,
     --  because there is a with_clause that makes the unit available. Used to
*************** package Sem_Util is
*** 2889,2892 ****
--- 2971,3010 ----
     function Yields_Universal_Type (N : Node_Id) return Boolean;
     --  Determine whether unanalyzed node N yields a universal type
  
+    package Interval_Lists is
+       type Discrete_Interval is
+          record
+             Low, High : Uint;
+          end record;
+ 
+       type Discrete_Interval_List is
+         array (Pos range <>) of Discrete_Interval;
+       --  A sorted (in ascending order) list of non-empty pairwise-disjoint
+       --  intervals, always with a gap of at least one value between
+       --  successive intervals (i.e., mergeable intervals are merged).
+       --  Low bound is one; high bound is nonnegative.
+ 
+       function Type_Intervals (Typ : Entity_Id) return Discrete_Interval_List;
+       --  Given a static discrete type or subtype, returns the (unique)
+       --  interval list representing the values of the type/subtype.
+       --  If no static predicates are involved, the length of the result
+       --  will be at most one.
+ 
+       function Choice_List_Intervals (Discrete_Choices : List_Id)
+                                      return Discrete_Interval_List;
+       --  Given a discrete choice list, returns the (unique) interval
+       --  list representing the chosen values.
+ 
+       function Is_Subset (Subset, Of_Set : Discrete_Interval_List)
+         return Boolean;
+       --  Returns True iff every value belonging to some interval of
+       --  Subset also belongs to some interval of Of_Set.
+ 
+       --  TBD: When we get around to implementing "is statically compatible"
+       --  correctly for real types with static predicates, we may need
+       --  an analogous Real_Interval_List type. Most of the language
+       --  rules that reference "is statically compatible" pertain to
+       --  discriminants and therefore do require support for real types;
+       --  the exception is 12.5.1(8).
+    end Interval_Lists;
  end Sem_Util;
diff -Nrcpad gcc-9.3.0/gcc/ada/sem_warn.adb gcc-10.1.0/gcc/ada/sem_warn.adb
*** gcc-9.3.0/gcc/ada/sem_warn.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sem_warn.adb	Thu May  7 10:49:59 2020
*************** package body Sem_Warn is
*** 333,338 ****
--- 333,343 ----
  
              elsif Has_Warnings_Off (Entity (Name (N))) then
                 return;
+ 
+             --  Forget it if the parameter is not In
+ 
+             elsif Has_Out_Or_In_Out_Parameter (Entity (Name (N))) then
+                return;
              end if;
  
              --  OK, see if we have one argument
*************** package body Sem_Warn is
*** 632,640 ****
  
                 Expression := Condition (Iter);
  
!             --  For iteration, do not process, since loop will always terminate
  
!             elsif Present (Loop_Parameter_Specification (Iter)) then
                 return;
              end if;
           end if;
--- 637,652 ----
  
                 Expression := Condition (Iter);
  
!             --  For Loop_Parameter_Specification, do not process, since loop
!             --  will always terminate. For Iterator_Specification, also do not
!             --  process. Either it will always terminate (e.g. "for X of
!             --  Some_Array ..."), or we can't tell if it's going to terminate
!             --  without looking at the iterator, so any warning here would be
!             --  noise.
  
!             elsif Present (Loop_Parameter_Specification (Iter))
!               or else Present (Iterator_Specification (Iter))
!             then
                 return;
              end if;
           end if;
*************** package body Sem_Warn is
*** 806,811 ****
--- 818,831 ----
        --  For an entry formal entity from an entry declaration, find the
        --  corresponding body formal from the given accept statement.
  
+       function Generic_Body_Formal (E : Entity_Id) return Entity_Id;
+       --  Warnings on unused formals of subprograms are placed on the entity
+       --  in the subprogram body, which seems preferable because it suggests
+       --  a better codefix for GNAT Studio. The analysis of generic subprogram
+       --  bodies uses a different circuitry, so the choice for the proper
+       --  placement of the warning in the generic case takes place here, by
+       --  finding the body entity that corresponds to a formal in a spec.
+ 
        procedure May_Need_Initialized_Actual (Ent : Entity_Id);
        --  If an entity of a generic type has default initialization, then the
        --  corresponding actual type should be fully initialized, or else there
*************** package body Sem_Warn is
*** 864,869 ****
--- 884,918 ----
           raise Program_Error;
        end Body_Formal;
  
+       -------------------------
+       -- Generic_Body_Formal --
+       -------------------------
+ 
+       function Generic_Body_Formal (E : Entity_Id) return Entity_Id is
+          Gen_Decl : constant Node_Id   := Unit_Declaration_Node (Scope (E));
+          Gen_Body : constant Entity_Id := Corresponding_Body (Gen_Decl);
+          Form     : Entity_Id;
+ 
+       begin
+          if No (Gen_Body) then
+             return E;
+ 
+          else
+             Form := First_Entity (Gen_Body);
+             while Present (Form) loop
+                if Chars (Form) = Chars (E) then
+                   return Form;
+                end if;
+ 
+                Next_Entity (Form);
+             end loop;
+          end if;
+ 
+          --  Should never fall through, should always find a match
+ 
+          raise Program_Error;
+       end Generic_Body_Formal;
+ 
        ---------------------------------
        -- May_Need_Initialized_Actual --
        ---------------------------------
*************** package body Sem_Warn is
*** 1401,1409 ****
                    goto Continue;
                 end if;
  
!                --  Check for unset reference
  
!                if Warn_On_No_Value_Assigned and then Present (UR) then
  
                    --  For other than access type, go back to original node to
                    --  deal with case where original unset reference has been
--- 1450,1462 ----
                    goto Continue;
                 end if;
  
!                --  Check for unset reference. If type of object has
!                --  preelaborable initialization, warning is misleading.
  
!                if Warn_On_No_Value_Assigned
!                  and then Present (UR)
!                  and then not Known_To_Have_Preelab_Init (Etype (E1))
!                then
  
                    --  For other than access type, go back to original node to
                    --  deal with case where original unset reference has been
*************** package body Sem_Warn is
*** 1672,1678 ****
                    elsif not Warnings_Off_E1
                      and then not Has_Junk_Name (E1)
                    then
!                      Unreferenced_Entities.Append (E1);
                    end if;
                 end if;
  
--- 1725,1739 ----
                    elsif not Warnings_Off_E1
                      and then not Has_Junk_Name (E1)
                    then
!                      if Is_Formal (E1)
!                        and then Nkind (Unit_Declaration_Node (Scope (E1)))
!                          = N_Generic_Subprogram_Declaration
!                      then
!                         Unreferenced_Entities.Append
!                           (Generic_Body_Formal (E1));
!                      else
!                         Unreferenced_Entities.Append (E1);
!                      end if;
                    end if;
                 end if;
  
*************** package body Sem_Warn is
*** 2691,2697 ****
  
        --  Flag any unused with clauses. For a subunit, check only the units
        --  in its context, not those of the parent, which may be needed by other
!       --  subunits.  We will get the full warnings when we compile the parent,
        --  but the following is helpful when compiling a subunit by itself.
  
        if Nkind (Unit (Cunit (Main_Unit))) = N_Subunit then
--- 2752,2758 ----
  
        --  Flag any unused with clauses. For a subunit, check only the units
        --  in its context, not those of the parent, which may be needed by other
!       --  subunits. We will get the full warnings when we compile the parent,
        --  but the following is helpful when compiling a subunit by itself.
  
        if Nkind (Unit (Cunit (Main_Unit))) = N_Subunit then
*************** package body Sem_Warn is
*** 4346,4356 ****
                          E := Body_E;
                       end if;
  
!                      if not Is_Trivial_Subprogram (Scope (E)) then
!                         Error_Msg_NE -- CODEFIX
!                           ("?u?formal parameter & is not referenced!",
!                            E, Spec_E);
!                      end if;
                    end if;
                 end if;
  
--- 4407,4437 ----
                          E := Body_E;
                       end if;
  
!                      declare
!                         B : constant Node_Id := Parent (Parent (Scope (E)));
!                         S : Entity_Id := Empty;
!                      begin
!                         if Nkind_In (B,
!                                      N_Expression_Function,
!                                      N_Subprogram_Body,
!                                      N_Subprogram_Renaming_Declaration)
!                         then
!                            S := Corresponding_Spec (B);
!                         end if;
! 
!                         --  Do not warn for dispatching operations, because
!                         --  that causes too much noise. Also do not warn for
!                         --  trivial subprograms.
! 
!                         if (not Present (S)
!                             or else not Is_Dispatching_Operation (S))
!                           and then not Is_Trivial_Subprogram (Scope (E))
!                         then
!                            Error_Msg_NE -- CODEFIX
!                              ("?u?formal parameter & is not referenced!",
!                               E, Spec_E);
!                         end if;
!                      end;
                    end if;
                 end if;
  
*************** package body Sem_Warn is
*** 4465,4473 ****
--- 4546,4560 ----
        --  to capture the value. We are not going to capture any value, but
        --  the warning message depends on the same kind of conditions.
  
+       --  If the assignment appears as an out-parameter in a call within an
+       --  expression function it may be detected twice: once when expression
+       --  itself is analyzed, and once when the constructed body is analyzed.
+       --  We don't want to emit a spurious warning in this case.
+ 
        if Is_Assignable (Ent)
          and then not Is_Return_Object (Ent)
          and then Present (Last_Assignment (Ent))
+         and then Last_Assignment (Ent) /= N
          and then not Is_Imported (Ent)
          and then not Is_Exported (Ent)
          and then Safe_To_Capture_Value (N, Ent)
diff -Nrcpad gcc-9.3.0/gcc/ada/sfn_scan.adb gcc-10.1.0/gcc/ada/sfn_scan.adb
*** gcc-9.3.0/gcc/ada/sfn_scan.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sfn_scan.adb	Thu May  7 10:49:59 2020
*************** package body SFN_Scan is
*** 607,612 ****
--- 607,613 ----
  
     exception
        when others =>
+          pragma Assert (P'Valid);
           Cursor := P - S'First + 1;
           raise;
     end Scan_SFN_Pragmas;
diff -Nrcpad gcc-9.3.0/gcc/ada/sinfo.adb gcc-10.1.0/gcc/ada/sinfo.adb
*** gcc-9.3.0/gcc/ada/sinfo.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sinfo.adb	Thu May  7 10:49:59 2020
*************** package body Sinfo is
*** 269,274 ****
--- 269,282 ----
        return Node3 (N);
     end Array_Aggregate;
  
+    function Aspect_On_Partial_View
+       (N : Node_Id) return Boolean is
+    begin
+       pragma Assert (False
+         or else NT (N).Nkind = N_Aspect_Specification);
+       return Flag18 (N);
+    end Aspect_On_Partial_View;
+ 
     function Aspect_Rep_Item
        (N : Node_Id) return Node_Id is
     begin
*************** package body Sinfo is
*** 1913,1919 ****
          or else NT (N).Nkind = N_Package_Instantiation
          or else NT (N).Nkind = N_Procedure_Call_Statement
          or else NT (N).Nkind = N_Procedure_Instantiation
!         or else NT (N).Nkind = N_Requeue_Statement);
        return Flag1 (N);
     end Is_Elaboration_Checks_OK_Node;
  
--- 1921,1928 ----
          or else NT (N).Nkind = N_Package_Instantiation
          or else NT (N).Nkind = N_Procedure_Call_Statement
          or else NT (N).Nkind = N_Procedure_Instantiation
!         or else NT (N).Nkind = N_Requeue_Statement
!         or else NT (N).Nkind = N_Variable_Reference_Marker);
        return Flag1 (N);
     end Is_Elaboration_Checks_OK_Node;
  
*************** package body Sinfo is
*** 1932,1943 ****
          or else NT (N).Nkind = N_Attribute_Reference
          or else NT (N).Nkind = N_Call_Marker
          or else NT (N).Nkind = N_Entry_Call_Statement
          or else NT (N).Nkind = N_Function_Call
          or else NT (N).Nkind = N_Function_Instantiation
          or else NT (N).Nkind = N_Package_Instantiation
          or else NT (N).Nkind = N_Procedure_Call_Statement
          or else NT (N).Nkind = N_Procedure_Instantiation
!         or else NT (N).Nkind = N_Requeue_Statement);
        return Flag3 (N);
     end Is_Elaboration_Warnings_OK_Node;
  
--- 1941,1955 ----
          or else NT (N).Nkind = N_Attribute_Reference
          or else NT (N).Nkind = N_Call_Marker
          or else NT (N).Nkind = N_Entry_Call_Statement
+         or else NT (N).Nkind = N_Expanded_Name
          or else NT (N).Nkind = N_Function_Call
          or else NT (N).Nkind = N_Function_Instantiation
+         or else NT (N).Nkind = N_Identifier
          or else NT (N).Nkind = N_Package_Instantiation
          or else NT (N).Nkind = N_Procedure_Call_Statement
          or else NT (N).Nkind = N_Procedure_Instantiation
!         or else NT (N).Nkind = N_Requeue_Statement
!         or else NT (N).Nkind = N_Variable_Reference_Marker);
        return Flag3 (N);
     end Is_Elaboration_Warnings_OK_Node;
  
*************** package body Sinfo is
*** 1998,2003 ****
--- 2010,2023 ----
        return Flag2 (N);
     end Is_Generic_Contract_Pragma;
  
+    function Is_Homogeneous_Aggregate
+      (N : Node_Id) return Boolean is
+    begin
+       pragma Assert (False
+         or else NT (N).Nkind = N_Aggregate);
+       return Flag14 (N);
+    end Is_Homogeneous_Aggregate;
+ 
     function Is_Ignored
        (N : Node_Id) return Boolean is
     begin
*************** package body Sinfo is
*** 2130,2136 ****
     begin
        pragma Assert (False
          or else NT (N).Nkind = N_Variable_Reference_Marker);
!       return Flag1 (N);
     end Is_Read;
  
     function Is_Source_Call
--- 2150,2156 ----
     begin
        pragma Assert (False
          or else NT (N).Nkind = N_Variable_Reference_Marker);
!       return Flag4 (N);
     end Is_Read;
  
     function Is_Source_Call
*************** package body Sinfo is
*** 2156,2162 ****
          or else NT (N).Nkind = N_Package_Instantiation
          or else NT (N).Nkind = N_Procedure_Call_Statement
          or else NT (N).Nkind = N_Procedure_Instantiation
!         or else NT (N).Nkind = N_Requeue_Statement);
        return Flag2 (N);
     end Is_SPARK_Mode_On_Node;
  
--- 2176,2183 ----
          or else NT (N).Nkind = N_Package_Instantiation
          or else NT (N).Nkind = N_Procedure_Call_Statement
          or else NT (N).Nkind = N_Procedure_Instantiation
!         or else NT (N).Nkind = N_Requeue_Statement
!         or else NT (N).Nkind = N_Variable_Reference_Marker);
        return Flag2 (N);
     end Is_SPARK_Mode_On_Node;
  
*************** package body Sinfo is
*** 2216,2222 ****
     begin
        pragma Assert (False
          or else NT (N).Nkind = N_Variable_Reference_Marker);
!       return Flag2 (N);
     end Is_Write;
  
     function Iteration_Scheme
--- 2237,2243 ----
     begin
        pragma Assert (False
          or else NT (N).Nkind = N_Variable_Reference_Marker);
!       return Flag5 (N);
     end Is_Write;
  
     function Iteration_Scheme
*************** package body Sinfo is
*** 3091,3096 ****
--- 3112,3125 ----
        return Flag18 (N);
     end Rounded_Result;
  
+    function Save_Invocation_Graph_Of_Body
+       (N : Node_Id) return Boolean is
+    begin
+       pragma Assert (False
+         or else NT (N).Nkind = N_Compilation_Unit);
+       return Flag1 (N);
+    end Save_Invocation_Graph_Of_Body;
+ 
     function SCIL_Controlling_Tag
        (N : Node_Id) return Node_Id is
     begin
*************** package body Sinfo is
*** 3750,3755 ****
--- 3779,3792 ----
        Set_Node3_With_Parent (N, Val);
     end Set_Array_Aggregate;
  
+    procedure Set_Aspect_On_Partial_View
+       (N : Node_Id; Val : Boolean := True) is
+    begin
+       pragma Assert (False
+         or else NT (N).Nkind = N_Aspect_Specification);
+       Set_Flag18 (N, Val);
+    end Set_Aspect_On_Partial_View;
+ 
     procedure Set_Aspect_Rep_Item
        (N : Node_Id; Val : Node_Id) is
     begin
*************** package body Sinfo is
*** 5387,5393 ****
          or else NT (N).Nkind = N_Package_Instantiation
          or else NT (N).Nkind = N_Procedure_Call_Statement
          or else NT (N).Nkind = N_Procedure_Instantiation
!         or else NT (N).Nkind = N_Requeue_Statement);
        Set_Flag1 (N, Val);
     end Set_Is_Elaboration_Checks_OK_Node;
  
--- 5424,5431 ----
          or else NT (N).Nkind = N_Package_Instantiation
          or else NT (N).Nkind = N_Procedure_Call_Statement
          or else NT (N).Nkind = N_Procedure_Instantiation
!         or else NT (N).Nkind = N_Requeue_Statement
!         or else NT (N).Nkind = N_Variable_Reference_Marker);
        Set_Flag1 (N, Val);
     end Set_Is_Elaboration_Checks_OK_Node;
  
*************** package body Sinfo is
*** 5406,5417 ****
          or else NT (N).Nkind = N_Attribute_Reference
          or else NT (N).Nkind = N_Call_Marker
          or else NT (N).Nkind = N_Entry_Call_Statement
          or else NT (N).Nkind = N_Function_Call
          or else NT (N).Nkind = N_Function_Instantiation
          or else NT (N).Nkind = N_Package_Instantiation
          or else NT (N).Nkind = N_Procedure_Call_Statement
          or else NT (N).Nkind = N_Procedure_Instantiation
!         or else NT (N).Nkind = N_Requeue_Statement);
        Set_Flag3 (N, Val);
     end Set_Is_Elaboration_Warnings_OK_Node;
  
--- 5444,5458 ----
          or else NT (N).Nkind = N_Attribute_Reference
          or else NT (N).Nkind = N_Call_Marker
          or else NT (N).Nkind = N_Entry_Call_Statement
+         or else NT (N).Nkind = N_Expanded_Name
          or else NT (N).Nkind = N_Function_Call
          or else NT (N).Nkind = N_Function_Instantiation
+         or else NT (N).Nkind = N_Identifier
          or else NT (N).Nkind = N_Package_Instantiation
          or else NT (N).Nkind = N_Procedure_Call_Statement
          or else NT (N).Nkind = N_Procedure_Instantiation
!         or else NT (N).Nkind = N_Requeue_Statement
!         or else NT (N).Nkind = N_Variable_Reference_Marker);
        Set_Flag3 (N, Val);
     end Set_Is_Elaboration_Warnings_OK_Node;
  
*************** package body Sinfo is
*** 5472,5477 ****
--- 5513,5526 ----
        Set_Flag2 (N, Val);
     end Set_Is_Generic_Contract_Pragma;
  
+    procedure Set_Is_Homogeneous_Aggregate
+       (N : Node_Id; Val : Boolean := True) is
+    begin
+       pragma Assert (False
+         or else NT (N).Nkind = N_Aggregate);
+       Set_Flag14 (N, Val);
+    end Set_Is_Homogeneous_Aggregate;
+ 
     procedure Set_Is_Ignored
        (N : Node_Id; Val : Boolean := True) is
     begin
*************** package body Sinfo is
*** 5604,5610 ****
     begin
        pragma Assert (False
          or else NT (N).Nkind = N_Variable_Reference_Marker);
!       Set_Flag1 (N, Val);
     end Set_Is_Read;
  
     procedure Set_Is_Source_Call
--- 5653,5659 ----
     begin
        pragma Assert (False
          or else NT (N).Nkind = N_Variable_Reference_Marker);
!       Set_Flag4 (N, Val);
     end Set_Is_Read;
  
     procedure Set_Is_Source_Call
*************** package body Sinfo is
*** 5630,5636 ****
          or else NT (N).Nkind = N_Package_Instantiation
          or else NT (N).Nkind = N_Procedure_Call_Statement
          or else NT (N).Nkind = N_Procedure_Instantiation
!         or else NT (N).Nkind = N_Requeue_Statement);
        Set_Flag2 (N, Val);
     end Set_Is_SPARK_Mode_On_Node;
  
--- 5679,5686 ----
          or else NT (N).Nkind = N_Package_Instantiation
          or else NT (N).Nkind = N_Procedure_Call_Statement
          or else NT (N).Nkind = N_Procedure_Instantiation
!         or else NT (N).Nkind = N_Requeue_Statement
!         or else NT (N).Nkind = N_Variable_Reference_Marker);
        Set_Flag2 (N, Val);
     end Set_Is_SPARK_Mode_On_Node;
  
*************** package body Sinfo is
*** 5692,5698 ****
     begin
        pragma Assert (False
          or else NT (N).Nkind = N_Variable_Reference_Marker);
!       Set_Flag2 (N, Val);
     end Set_Is_Write;
  
     procedure Set_Iteration_Scheme
--- 5742,5748 ----
     begin
        pragma Assert (False
          or else NT (N).Nkind = N_Variable_Reference_Marker);
!       Set_Flag5 (N, Val);
     end Set_Is_Write;
  
     procedure Set_Iteration_Scheme
*************** package body Sinfo is
*** 6567,6572 ****
--- 6617,6630 ----
        Set_Flag18 (N, Val);
     end Set_Rounded_Result;
  
+    procedure Set_Save_Invocation_Graph_Of_Body
+       (N : Node_Id; Val : Boolean := True) is
+    begin
+       pragma Assert (False
+         or else NT (N).Nkind = N_Compilation_Unit);
+       Set_Flag1 (N, Val);
+    end Set_Save_Invocation_Graph_Of_Body;
+ 
     procedure Set_SCIL_Controlling_Tag
        (N : Node_Id; Val : Node_Id) is
     begin
*************** package body Sinfo is
*** 7269,7274 ****
--- 7327,7370 ----
               T = V11;
     end Nkind_In;
  
+    function Nkind_In
+      (T   : Node_Kind;
+       V1  : Node_Kind;
+       V2  : Node_Kind;
+       V3  : Node_Kind;
+       V4  : Node_Kind;
+       V5  : Node_Kind;
+       V6  : Node_Kind;
+       V7  : Node_Kind;
+       V8  : Node_Kind;
+       V9  : Node_Kind;
+       V10 : Node_Kind;
+       V11 : Node_Kind;
+       V12 : Node_Kind;
+       V13 : Node_Kind;
+       V14 : Node_Kind;
+       V15 : Node_Kind;
+       V16 : Node_Kind) return Boolean
+    is
+    begin
+       return T = V1  or else
+              T = V2  or else
+              T = V3  or else
+              T = V4  or else
+              T = V5  or else
+              T = V6  or else
+              T = V7  or else
+              T = V8  or else
+              T = V9  or else
+              T = V10 or else
+              T = V11 or else
+              T = V12 or else
+              T = V13 or else
+              T = V14 or else
+              T = V15 or else
+              T = V16;
+    end Nkind_In;
+ 
     --------------------------
     -- Pragma_Name_Unmapped --
     --------------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/sinfo.ads gcc-10.1.0/gcc/ada/sinfo.ads
*** gcc-9.3.0/gcc/ada/sinfo.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sinfo.ads	Thu May  7 10:49:59 2020
*************** package Sinfo is
*** 754,764 ****
     --  GNATprove mode. As a special case, the front end does not insert a
     --  Do_Division_Check flag on float exponentiation expressions, for the case
     --  where the value is 0.0 and the exponent is negative, although this case
!    --  does lead to a division check failure.
  
!    --  Note: the expander always takes care of the Do_Range check case,
!    --  so this flag will never be set in the expanded tree passed to the
!    --  back end code generator.
  
     --  Note that this accounts for all nodes that trigger the corresponding
     --  checks, except for range checks on subtype_indications, which may be
--- 754,769 ----
     --  GNATprove mode. As a special case, the front end does not insert a
     --  Do_Division_Check flag on float exponentiation expressions, for the case
     --  where the value is 0.0 and the exponent is negative, although this case
!    --  does lead to a division check failure. As another special case,
!    --  the front end does not insert a Do_Range_Check on an allocator where
!    --  the designated type is scalar, and the designated type is more
!    --  constrained than the type of the initialized allocator value or the type
!    --  of the default value for an uninitialized allocator.
  
!    --  Note that the expander always takes care of the Do_Range_Check case, so
!    --  this flag will never be set in the expanded tree passed to the back end.
!    --  For the other two flags, the check can be generated either by the back
!    --  end or by the front end, depending on the setting of a target parameter.
  
     --  Note that this accounts for all nodes that trigger the corresponding
     --  checks, except for range checks on subtype_indications, which may be
*************** package Sinfo is
*** 928,933 ****
--- 933,944 ----
     --    is used for translation of the at end handler into a normal exception
     --    handler.
  
+    --  Aspect_On_Partial_View (Flag18)
+    --    Present on an N_Aspect_Specification node. For an aspect that applies
+    --    to a type entity, indicates whether the specification appears on the
+    --    partial view of a private type or extension. Undefined for aspects
+    --    that apply to other entities.
+ 
     --  Aspect_Rep_Item (Node2-Sem)
     --    Present in N_Aspect_Specification nodes. Points to the corresponding
     --    pragma/attribute definition node used to process the aspect.
*************** package Sinfo is
*** 1182,1190 ****
     --    conversion nodes (and set if the conversion requires a check).
  
     --  Do_Division_Check (Flag13-Sem)
!    --    This flag is set on a division operator (/ mod rem) to indicate
!    --    that a zero divide check is required. The actual check is dealt
!    --    with by the backend (all the front end does is to set the flag).
  
     --  Do_Length_Check (Flag4-Sem)
     --    This flag is set in an N_Assignment_Statement, N_Op_And, N_Op_Or,
--- 1193,1202 ----
     --    conversion nodes (and set if the conversion requires a check).
  
     --  Do_Division_Check (Flag13-Sem)
!    --    This flag is set on a division operator (/ mod rem) to indicate that
!    --    a zero divide check is required. The actual check is either dealt with
!    --    by the back end if Backend_Divide_Checks is set to true, or by the
!    --    front end itself if it is set to false.
  
     --  Do_Length_Check (Flag4-Sem)
     --    This flag is set in an N_Assignment_Statement, N_Op_And, N_Op_Or,
*************** package Sinfo is
*** 1193,1207 ****
  
     --  Do_Overflow_Check (Flag17-Sem)
     --    This flag is set on an operator where an overflow check is required on
!    --    the operation. The actual check is dealt with by the backend (all the
!    --    front end does is to set the flag). The other cases where this flag is
!    --    used is on a Type_Conversion node and for attribute reference nodes.
     --    For a type conversion, it means that the conversion is from one base
     --    type to another, and the value may not fit in the target base type.
!    --    See also the description of Do_Range_Check for this case. The only
!    --    attribute references which use this flag are Pred and Succ, where it
!    --    means that the result should be checked for going outside the base
!    --    range. Note that this flag is not set for modular types. This flag is
     --    also set on if and case expression nodes if we are operating in either
     --    MINIMIZED or ELIMINATED overflow checking mode (to make sure that we
     --    properly process overflow checking for dependent expressions).
--- 1205,1217 ----
  
     --  Do_Overflow_Check (Flag17-Sem)
     --    This flag is set on an operator where an overflow check is required on
!    --    the operation. The actual check is either dealt with by the back end
!    --    if Backend_Overflow_Checks is set to true, or by the front end itself
!    --    if it is set to false. The other cases where this flag is used is on a
!    --    Type_Conversion node as well on if and case expression nodes.
     --    For a type conversion, it means that the conversion is from one base
     --    type to another, and the value may not fit in the target base type.
!    --    See also the description of Do_Range_Check for this case. This flag is
     --    also set on if and case expression nodes if we are operating in either
     --    MINIMIZED or ELIMINATED overflow checking mode (to make sure that we
     --    properly process overflow checking for dependent expressions).
*************** package Sinfo is
*** 1211,1219 ****
     --    range check is required. The target type is clear from the context.
     --    The contexts in which this flag can appear are the following:
  
!    --      Right side of an assignment. In this case the target type is
!    --      taken from the left side of the assignment, which is referenced
!    --      by the Name of the N_Assignment_Statement node.
  
     --      Subscript expressions in an indexed component. In this case the
     --      target type is determined from the type of the array, which is
--- 1221,1229 ----
     --    range check is required. The target type is clear from the context.
     --    The contexts in which this flag can appear are the following:
  
!    --      Right side of an assignment. In this case the target type is taken
!    --      from the left side of the assignment, which is referenced by the
!    --      Name of the N_Assignment_Statement node.
  
     --      Subscript expressions in an indexed component. In this case the
     --      target type is determined from the type of the array, which is
*************** package Sinfo is
*** 1247,1261 ****
     --    listed above (e.g. in a return statement), an additional type
     --    conversion node is introduced to represent the required check.
  
-    --    A special case arises for the arguments of the Pred/Succ attributes.
-    --    Here the range check needed is against First + 1 ..  Last (Pred) or
-    --    First .. Last - 1 (Succ) of the corresponding base type. Essentially
-    --    these checks are what would be performed within the implicit body of
-    --    the functions that correspond to these attributes. In these cases,
-    --    the Do_Range check flag is set on the argument to the attribute
-    --    function, and the back end must special case the appropriate range
-    --    to check against.
- 
     --  Do_Storage_Check (Flag17-Sem)
     --    This flag is set in an N_Allocator node to indicate that a storage
     --    check is required for the allocation, or in an N_Subprogram_Body node
--- 1257,1262 ----
*************** package Sinfo is
*** 1762,1767 ****
--- 1763,1769 ----
     --      procedure call statement
     --      procedure instantiation
     --      requeue statement
+    --      variable reference marker
     --
     --    Set when the node appears within a context which allows the generation
     --    of run-time ABE checks. This flag detemines whether the ABE Processing
*************** package Sinfo is
*** 1778,1789 ****
--- 1780,1794 ----
     --      attribute reference
     --      call marker
     --      entry call statement
+    --      expanded name
     --      function call
     --      function instantiation
+    --      identifier
     --      package instantiation
     --      procedure call statement
     --      procedure instantiation
     --      requeue statement
+    --      variable reference marker
     --
     --    Set when the node appears within a context where elaboration warnings
     --    are enabled. This flag determines whether the ABE processing phase
*************** package Sinfo is
*** 1832,1837 ****
--- 1837,1847 ----
     --      Refined_State
     --      Test_Case
  
+    --  Is_Homogeneous_Aggregate (Flag14)
+    --    A flag set on an Ada2020 aggregate that uses square brackets as
+    --    delimiters, and thus denotes an array or container aggregate, or
+    --    the prefix of a reduction attribute.
+ 
     --  Is_Ignored (Flag9-Sem)
     --    A flag set in an N_Aspect_Specification or N_Pragma node if there was
     --    a Check_Policy or Assertion_Policy (or in the case of a Debug_Pragma)
*************** package Sinfo is
*** 1941,1947 ****
     --    the resolution of accidental overloading of binary or unary operators
     --    which may occur in instances.
  
!    --  Is_Read (Flag1-Sem)
     --    Present in variable reference markers. Set when the original variable
     --    reference constitues a read of the variable.
  
--- 1951,1957 ----
     --    the resolution of accidental overloading of binary or unary operators
     --    which may occur in instances.
  
!    --  Is_Read (Flag4-Sem)
     --    Present in variable reference markers. Set when the original variable
     --    reference constitues a read of the variable.
  
*************** package Sinfo is
*** 1950,1962 ****
     --    source.
  
     --  Is_SPARK_Mode_On_Node (Flag2-Sem)
!    --    Present in nodes which represent an elaboration scenario. Those are
!    --    assignment statement, attribute reference, call marker, entry call
!    --    statement, expanded name, function call, identifier, instantiation,
!    --    procedure call statement, and requeue statement nodes. Set when the
!    --    node appears within a context subject to SPARK_Mode On. This flag
!    --    determines when the SPARK model of elaboration be activated by the
!    --    ABE Processing phase.
  
     --  Is_Static_Coextension (Flag14-Sem)
     --    Present in N_Allocator nodes. Set if the allocator is a coextension
--- 1960,1984 ----
     --    source.
  
     --  Is_SPARK_Mode_On_Node (Flag2-Sem)
!    --    Present in the following nodes:
!    --
!    --      assignment statement
!    --      attribute reference
!    --      call marker
!    --      entry call statement
!    --      expanded name
!    --      function call
!    --      function instantiation
!    --      identifier
!    --      package instantiation
!    --      procedure call statement
!    --      procedure instantiation
!    --      requeue statement
!    --      variable reference marker
!    --
!    --    Set when the node appears within a context subject to SPARK_Mode On.
!    --    This flag determines when the SPARK model of elaboration be activated
!    --    by the ABE Processing phase.
  
     --  Is_Static_Coextension (Flag14-Sem)
     --    Present in N_Allocator nodes. Set if the allocator is a coextension
*************** package Sinfo is
*** 1989,1995 ****
     --    indicate that the construct is a task master (i.e. has declared tasks
     --    or declares an access to a task type).
  
!    --  Is_Write (Flag2-Sem)
     --    Present in variable reference markers. Set when the original variable
     --    reference constitues a write of the variable.
  
--- 2011,2017 ----
     --    indicate that the construct is a task master (i.e. has declared tasks
     --    or declares an access to a task type).
  
!    --  Is_Write (Flag5-Sem)
     --    Present in variable reference markers. Set when the original variable
     --    reference constitues a write of the variable.
  
*************** package Sinfo is
*** 2316,2322 ****
     --    Present in N_Extended_Return_Statement. Points to a list initially
     --    containing a single N_Object_Declaration representing the return
     --    object. We use a list (instead of just a pointer to the object decl)
!    --    because Analyze wants to insert extra actions on this list.
  
     --  Rounded_Result (Flag18-Sem)
     --    Present in N_Type_Conversion, N_Op_Divide, and N_Op_Multiply nodes.
--- 2338,2345 ----
     --    Present in N_Extended_Return_Statement. Points to a list initially
     --    containing a single N_Object_Declaration representing the return
     --    object. We use a list (instead of just a pointer to the object decl)
!    --    because Analyze wants to insert extra actions on this list, before the
!    --    N_Object_Declaration, which always remains last on the list.
  
     --  Rounded_Result (Flag18-Sem)
     --    Present in N_Type_Conversion, N_Op_Divide, and N_Op_Multiply nodes.
*************** package Sinfo is
*** 2328,2333 ****
--- 2351,2361 ----
     --    are the result of expansion of rounded fixed-point divide, conversion
     --    and multiplication operations.
  
+    --  Save_Invocation_Graph_Of_Body (Flag1-Sem)
+    --    Present in compilation unit nodes. Set when the elaboration mechanism
+    --    must record all invocation constructs and invocation relations within
+    --    the body of the compilation unit.
+    --
     --  SCIL_Entity (Node4-Sem)
     --    Present in SCIL nodes. References the specific tagged type associated
     --    with the SCIL node (for an N_SCIL_Dispatching_Call node, this is
*************** package Sinfo is
*** 2606,2611 ****
--- 2634,2640 ----
        --  Original_Discriminant (Node2-Sem)
        --  Is_Elaboration_Checks_OK_Node (Flag1-Sem)
        --  Is_SPARK_Mode_On_Node (Flag2-Sem)
+       --  Is_Elaboration_Warnings_OK_Node (Flag3-Sem)
        --  Has_Private_View (Flag11-Sem) (set in generic units)
        --  Redundant_Use (Flag13-Sem)
        --  Atomic_Sync_Required (Flag14-Sem)
*************** package Sinfo is
*** 2857,2863 ****
        --  Einfo.
  
        --  Note: N_Defining_Identifier is an extended node whose fields are
!       --  deliberately layed out to match the layout of fields in an ordinary
        --  N_Identifier node allowing for easy alteration of an identifier
        --  node into a defining identifier node. For details, see procedure
        --  Sinfo.CN.Change_Identifier_To_Defining_Identifier.
--- 2886,2892 ----
        --  Einfo.
  
        --  Note: N_Defining_Identifier is an extended node whose fields are
!       --  deliberately laid out to match the layout of fields in an ordinary
        --  N_Identifier node allowing for easy alteration of an identifier
        --  node into a defining identifier node. For details, see procedure
        --  Sinfo.CN.Change_Identifier_To_Defining_Identifier.
*************** package Sinfo is
*** 3204,3211 ****
        --  in package Einfo.
  
        --  Note: N_Defining_Character_Literal is an extended node whose fields
!       --  are deliberate layed out to match the layout of fields in an ordinary
!       --  N_Character_Literal node allowing for easy alteration of a character
        --  literal node into a defining character literal node. For details, see
        --  Sinfo.CN.Change_Character_Literal_To_Defining_Character_Literal.
  
--- 3233,3240 ----
        --  in package Einfo.
  
        --  Note: N_Defining_Character_Literal is an extended node whose fields
!       --  are deliberately laid out to match layout of fields in an ordinary
!       --  N_Character_Literal node, allowing for easy alteration of a character
        --  literal node into a defining character literal node. For details, see
        --  Sinfo.CN.Change_Character_Literal_To_Defining_Character_Literal.
  
*************** package Sinfo is
*** 4139,4144 ****
--- 4168,4174 ----
        --  Compile_Time_Known_Aggregate (Flag18-Sem)
        --  Expansion_Delayed (Flag11-Sem)
        --  Has_Self_Reference (Flag13-Sem)
+       --  Is_Homogeneous_Aggregate (Flag14)
        --  plus fields for expression
  
        --  Note: this structure is used for both record and array aggregates
*************** package Sinfo is
*** 5429,5435 ****
        --  in package Einfo.
  
        --  Note: N_Defining_Operator_Symbol is an extended node whose fields
!       --  are deliberately layed out to match the layout of fields in an
        --  ordinary N_Operator_Symbol node allowing for easy alteration of
        --  an operator symbol node into a defining operator symbol node.
        --  See Sinfo.CN.Change_Operator_Symbol_To_Defining_Operator_Symbol
--- 5459,5465 ----
        --  in package Einfo.
  
        --  Note: N_Defining_Operator_Symbol is an extended node whose fields
!       --  are deliberately laid out to match the layout of fields in an
        --  ordinary N_Operator_Symbol node allowing for easy alteration of
        --  an operator symbol node into a defining operator symbol node.
        --  See Sinfo.CN.Change_Operator_Symbol_To_Defining_Operator_Symbol
*************** package Sinfo is
*** 6634,6650 ****
  
        --  N_Compilation_Unit
        --  Sloc points to first token of defining unit name
-       --  Library_Unit (Node4-Sem) corresponding/parent spec/body
        --  Context_Items (List1) context items and pragmas preceding unit
        --  Private_Present (Flag15) set if library unit has private keyword
        --  Unit (Node2) library item or subunit
        --  Aux_Decls_Node (Node5) points to the N_Compilation_Unit_Aux node
-       --  Has_No_Elaboration_Code (Flag17-Sem)
-       --  Body_Required (Flag13-Sem) set for spec if body is required
-       --  Acts_As_Spec (Flag4-Sem) flag for subprogram body with no spec
-       --  Context_Pending (Flag16-Sem)
        --  First_Inlined_Subprogram (Node3-Sem)
        --  Has_Pragma_Suppress_All (Flag14-Sem)
  
        --  N_Compilation_Unit_Aux
        --  Sloc is a copy of the Sloc from the N_Compilation_Unit node
--- 6664,6681 ----
  
        --  N_Compilation_Unit
        --  Sloc points to first token of defining unit name
        --  Context_Items (List1) context items and pragmas preceding unit
        --  Private_Present (Flag15) set if library unit has private keyword
        --  Unit (Node2) library item or subunit
        --  Aux_Decls_Node (Node5) points to the N_Compilation_Unit_Aux node
        --  First_Inlined_Subprogram (Node3-Sem)
+       --  Library_Unit (Node4-Sem) corresponding/parent spec/body
+       --  Save_Invocation_Graph_Of_Body (Flag1-Sem)
+       --  Acts_As_Spec (Flag4-Sem) flag for subprogram body with no spec
+       --  Body_Required (Flag13-Sem) set for spec if body is required
        --  Has_Pragma_Suppress_All (Flag14-Sem)
+       --  Context_Pending (Flag16-Sem)
+       --  Has_No_Elaboration_Code (Flag17-Sem)
  
        --  N_Compilation_Unit_Aux
        --  Sloc is a copy of the Sloc from the N_Compilation_Unit node
*************** package Sinfo is
*** 7619,7624 ****
--- 7650,7656 ----
        --  Is_Disabled (Flag15-Sem)
        --  Is_Boolean_Aspect (Flag16-Sem)
        --  Split_PPC (Flag17) Set if split pre/post attribute
+       --  Aspect_On_Partial_View (Flag18-Sem)
  
        --  Note: Aspect_Specification is an Ada 2012 feature
  
*************** package Sinfo is
*** 8035,8041 ****
        --  of this node, leaving the N_Selected_Component node used only when
        --  the prefix is a record or protected type.
  
!       --  The fields of the N_Expanded_Name node are layed out identically
        --  to those of the N_Selected_Component node, allowing conversion of
        --  an expanded name node to a selected component node to be done
        --  easily, see Sinfo.CN.Change_Selected_Component_To_Expanded_Name.
--- 8067,8073 ----
        --  of this node, leaving the N_Selected_Component node used only when
        --  the prefix is a record or protected type.
  
!       --  The fields of the N_Expanded_Name node are laid out identically
        --  to those of the N_Selected_Component node, allowing conversion of
        --  an expanded name node to a selected component node to be done
        --  easily, see Sinfo.CN.Change_Selected_Component_To_Expanded_Name.
*************** package Sinfo is
*** 8051,8056 ****
--- 8083,8089 ----
        --  Associated_Node (Node4-Sem)
        --  Is_Elaboration_Checks_OK_Node (Flag1-Sem)
        --  Is_SPARK_Mode_On_Node (Flag2-Sem)
+       --  Is_Elaboration_Warnings_OK_Node (Flag3-Sem)
        --  Has_Private_View (Flag11-Sem) set in generic units
        --  Redundant_Use (Flag13-Sem)
        --  Atomic_Sync_Required (Flag14-Sem)
*************** package Sinfo is
*** 8576,8583 ****
        --  N_Variable_Reference_Marker
        --  Sloc points to Sloc of original variable reference
        --  Target (Node1-Sem)
!       --  Is_Read (Flag1-Sem)
!       --  Is_Write (Flag2-Sem)
  
     -----------
     -- Empty --
--- 8609,8619 ----
        --  N_Variable_Reference_Marker
        --  Sloc points to Sloc of original variable reference
        --  Target (Node1-Sem)
!       --  Is_Elaboration_Checks_OK_Node (Flag1-Sem)
!       --  Is_SPARK_Mode_On_Node (Flag2-Sem)
!       --  Is_Elaboration_Warnings_OK_Node (Flag3-Sem)
!       --  Is_Read (Flag4-Sem)
!       --  Is_Write (Flag5-Sem)
  
     -----------
     -- Empty --
*************** package Sinfo is
*** 9276,9281 ****
--- 9312,9320 ----
     function Array_Aggregate
       (N : Node_Id) return Node_Id;    -- Node3
  
+    function Aspect_On_Partial_View
+      (N : Node_Id) return Boolean;    -- Flag18
+ 
     function Aspect_Rep_Item
       (N : Node_Id) return Node_Id;    -- Node2
  
*************** package Sinfo is
*** 9822,9827 ****
--- 9861,9869 ----
     function Is_Generic_Contract_Pragma
       (N : Node_Id) return Boolean;    -- Flag2
  
+    function Is_Homogeneous_Aggregate
+      (N : Node_Id) return Boolean;    -- Flag14
+ 
     function Is_Ignored
       (N : Node_Id) return Boolean;    -- Flag9
  
*************** package Sinfo is
*** 9868,9874 ****
       (N : Node_Id) return Boolean;    -- Flag4
  
     function Is_Read
!      (N : Node_Id) return Boolean;    -- Flag1
  
     function Is_Source_Call
       (N : Node_Id) return Boolean;    -- Flag4
--- 9910,9916 ----
       (N : Node_Id) return Boolean;    -- Flag4
  
     function Is_Read
!      (N : Node_Id) return Boolean;    -- Flag4
  
     function Is_Source_Call
       (N : Node_Id) return Boolean;    -- Flag4
*************** package Sinfo is
*** 9895,9901 ****
       (N : Node_Id) return Boolean;    -- Flag5
  
     function Is_Write
!      (N : Node_Id) return Boolean;    -- Flag2
  
     function Iteration_Scheme
       (N : Node_Id) return Node_Id;    -- Node2
--- 9937,9943 ----
       (N : Node_Id) return Boolean;    -- Flag5
  
     function Is_Write
!      (N : Node_Id) return Boolean;    -- Flag5
  
     function Iteration_Scheme
       (N : Node_Id) return Node_Id;    -- Node2
*************** package Sinfo is
*** 10164,10169 ****
--- 10206,10214 ----
     function Rounded_Result
       (N : Node_Id) return Boolean;    -- Flag18
  
+    function Save_Invocation_Graph_Of_Body
+      (N : Node_Id) return Boolean;    -- Flag1
+ 
     function SCIL_Controlling_Tag
       (N : Node_Id) return Node_Id;    -- Node5
  
*************** package Sinfo is
*** 10317,10322 ****
--- 10362,10369 ----
     --  tree pointers (List1-4), the parent pointer of the Val node is set to
     --  point back to node N. This automates the setting of the parent pointer.
  
+    --  WARNING: There is a matching C declaration of a few subprograms in fe.h
+ 
     procedure Set_Abort_Present
       (N : Node_Id; Val : Boolean := True);    -- Flag15
  
*************** package Sinfo is
*** 10383,10388 ****
--- 10430,10438 ----
     procedure Set_Array_Aggregate
       (N : Node_Id; Val : Node_Id);            -- Node3
  
+    procedure Set_Aspect_On_Partial_View
+      (N : Node_Id; Val : Boolean := True);    -- Flag18
+ 
     procedure Set_Aspect_Rep_Item
       (N : Node_Id; Val : Node_Id);            -- Node2
  
*************** package Sinfo is
*** 10926,10931 ****
--- 10976,10984 ----
     procedure Set_Is_Generic_Contract_Pragma
       (N : Node_Id; Val : Boolean := True);    -- Flag2
  
+    procedure Set_Is_Homogeneous_Aggregate
+      (N : Node_Id; Val : Boolean := True);    -- Flag14
+ 
     procedure Set_Is_Ignored
       (N : Node_Id; Val : Boolean := True);    -- Flag9
  
*************** package Sinfo is
*** 10972,10978 ****
       (N : Node_Id; Val : Boolean := True);    -- Flag4
  
     procedure Set_Is_Read
!      (N : Node_Id; Val : Boolean := True);    -- Flag1
  
     procedure Set_Is_Source_Call
       (N : Node_Id; Val : Boolean := True);    -- Flag4
--- 11025,11031 ----
       (N : Node_Id; Val : Boolean := True);    -- Flag4
  
     procedure Set_Is_Read
!      (N : Node_Id; Val : Boolean := True);    -- Flag4
  
     procedure Set_Is_Source_Call
       (N : Node_Id; Val : Boolean := True);    -- Flag4
*************** package Sinfo is
*** 10999,11005 ****
       (N : Node_Id; Val : Boolean := True);    -- Flag5
  
     procedure Set_Is_Write
!      (N : Node_Id; Val : Boolean := True);    -- Flag2
  
     procedure Set_Iteration_Scheme
       (N : Node_Id; Val : Node_Id);            -- Node2
--- 11052,11058 ----
       (N : Node_Id; Val : Boolean := True);    -- Flag5
  
     procedure Set_Is_Write
!      (N : Node_Id; Val : Boolean := True);    -- Flag5
  
     procedure Set_Iteration_Scheme
       (N : Node_Id; Val : Node_Id);            -- Node2
*************** package Sinfo is
*** 11268,11273 ****
--- 11321,11329 ----
     procedure Set_Rounded_Result
       (N : Node_Id; Val : Boolean := True);    -- Flag18
  
+    procedure Set_Save_Invocation_Graph_Of_Body
+      (N : Node_Id; Val : Boolean := True);    -- Flag1
+ 
     procedure Set_SCIL_Controlling_Tag
       (N : Node_Id; Val : Node_Id);            -- Node5
  
*************** package Sinfo is
*** 11429,11434 ****
--- 11485,11492 ----
     --  returns the location of the IF token in the END IF sequence by
     --  translating the value of the End_Span field.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     procedure Set_End_Location (N : Node_Id; S : Source_Ptr);
     --  N is an N_If_Statement or N_Case_Statement node. This procedure sets
     --  the End_Span field to correspond to the given value S. In other words,
*************** package Sinfo is
*** 11545,11550 ****
--- 11603,11629 ----
        V10 : Node_Kind;
        V11 : Node_Kind) return Boolean;
  
+    --  12..15-parameter versions are not yet needed
+ 
+    function Nkind_In
+      (T   : Node_Kind;
+       V1  : Node_Kind;
+       V2  : Node_Kind;
+       V3  : Node_Kind;
+       V4  : Node_Kind;
+       V5  : Node_Kind;
+       V6  : Node_Kind;
+       V7  : Node_Kind;
+       V8  : Node_Kind;
+       V9  : Node_Kind;
+       V10 : Node_Kind;
+       V11 : Node_Kind;
+       V12 : Node_Kind;
+       V13 : Node_Kind;
+       V14 : Node_Kind;
+       V15 : Node_Kind;
+       V16 : Node_Kind) return Boolean;
+ 
     pragma Inline (Nkind_In);
     --  Inline all above functions
  
*************** package Sinfo is
*** 11931,11937 ****
  
       N_Iterated_Component_Association =>
         (1 => True,    --  Defining_Identifier (Node1)
!         2 => False,   --  unused
          3 => True,    --  Expression (Node3)
          4 => True,    --  Discrete_Choices (List4)
          5 => False),  --  unused
--- 12010,12016 ----
  
       N_Iterated_Component_Association =>
         (1 => True,    --  Defining_Identifier (Node1)
!         2 => True,    --  Loop_Actions (List2-Sem)
          3 => True,    --  Expression (Node3)
          4 => True,    --  Discrete_Choices (List4)
          5 => False),  --  unused
*************** package Sinfo is
*** 13270,13275 ****
--- 13349,13355 ----
     pragma Inline (Ancestor_Part);
     pragma Inline (Atomic_Sync_Required);
     pragma Inline (Array_Aggregate);
+    pragma Inline (Aspect_On_Partial_View);
     pragma Inline (Aspect_Rep_Item);
     pragma Inline (Assignment_OK);
     pragma Inline (Associated_Node);
*************** package Sinfo is
*** 13453,13458 ****
--- 13533,13539 ----
     pragma Inline (Is_Finalization_Wrapper);
     pragma Inline (Is_Folded_In_Parser);
     pragma Inline (Is_Generic_Contract_Pragma);
+    pragma Inline (Is_Homogeneous_Aggregate);
     pragma Inline (Is_Ignored);
     pragma Inline (Is_Ignored_Ghost_Pragma);
     pragma Inline (Is_In_Discriminant_Check);
*************** package Sinfo is
*** 13566,13571 ****
--- 13647,13653 ----
     pragma Inline (Reverse_Present);
     pragma Inline (Right_Opnd);
     pragma Inline (Rounded_Result);
+    pragma Inline (Save_Invocation_Graph_Of_Body);
     pragma Inline (SCIL_Controlling_Tag);
     pragma Inline (SCIL_Entity);
     pragma Inline (SCIL_Tag_Value);
*************** package Sinfo is
*** 13635,13640 ****
--- 13717,13723 ----
     pragma Inline (Set_Alternatives);
     pragma Inline (Set_Ancestor_Part);
     pragma Inline (Set_Array_Aggregate);
+    pragma Inline (Set_Aspect_On_Partial_View);
     pragma Inline (Set_Aspect_Rep_Item);
     pragma Inline (Set_Assignment_OK);
     pragma Inline (Set_Associated_Node);
*************** package Sinfo is
*** 13817,13822 ****
--- 13900,13906 ----
     pragma Inline (Set_Is_Finalization_Wrapper);
     pragma Inline (Set_Is_Folded_In_Parser);
     pragma Inline (Set_Is_Generic_Contract_Pragma);
+    pragma Inline (Set_Is_Homogeneous_Aggregate);
     pragma Inline (Set_Is_Ignored);
     pragma Inline (Set_Is_Ignored_Ghost_Pragma);
     pragma Inline (Set_Is_In_Discriminant_Check);
*************** package Sinfo is
*** 13930,13935 ****
--- 14014,14020 ----
     pragma Inline (Set_Reverse_Present);
     pragma Inline (Set_Right_Opnd);
     pragma Inline (Set_Rounded_Result);
+    pragma Inline (Set_Save_Invocation_Graph_Of_Body);
     pragma Inline (Set_SCIL_Controlling_Tag);
     pragma Inline (Set_SCIL_Entity);
     pragma Inline (Set_SCIL_Tag_Value);
diff -Nrcpad gcc-9.3.0/gcc/ada/sinput.ads gcc-10.1.0/gcc/ada/sinput.ads
*** gcc-9.3.0/gcc/ada/sinput.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sinput.ads	Thu May  7 10:49:59 2020
*************** package Sinput is
*** 293,298 ****
--- 293,300 ----
     --  will be 1 since system.ads is read first.
  
     function Debug_Source_Name (S : SFI) return File_Name_Type;
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function File_Name         (S : SFI) return File_Name_Type;
     function File_Type         (S : SFI) return Type_Of_File;
     function First_Mapped_Line (S : SFI) return Logical_Line_Number;
*************** package Sinput is
*** 532,537 ****
--- 534,541 ----
     --  determined and returned. Tab characters if present are assumed to
     --  represent the standard 1,9,17.. spacing pattern.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Get_Logical_Line_Number
       (P : Source_Ptr) return Logical_Line_Number;
     --  The line number of the specified source position is obtained by
*************** package Sinput is
*** 543,548 ****
--- 547,554 ----
     --  reference pragmas have been encountered, the value returned is
     --  the same as the physical line number.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Get_Logical_Line_Number_Img
       (P : Source_Ptr) return String;
     --  Same as above function, but returns the line number as a string of
*************** package Sinput is
*** 561,566 ****
--- 567,574 ----
     --  value. This call must always succeed, since any valid source pointer
     --  value belongs to some previously loaded source file.
  
+    --  WARNING: There is a matching C declaration of this subprogram in fe.h
+ 
     function Instantiation_Depth (S : Source_Ptr) return Nat;
     --  Determine instantiation depth for given Sloc value. A value of
     --  zero means that the given Sloc is not in an instantiation.
diff -Nrcpad gcc-9.3.0/gcc/ada/snames.ads-tmpl gcc-10.1.0/gcc/ada/snames.ads-tmpl
*** gcc-9.3.0/gcc/ada/snames.ads-tmpl	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/snames.ads-tmpl	Thu May  7 10:49:59 2020
*************** package Snames is
*** 389,394 ****
--- 389,395 ----
     Name_Ada_12                         : constant Name_Id := N + $; -- GNAT
     Name_Ada_2012                       : constant Name_Id := N + $; -- GNAT
     Name_Ada_2020                       : constant Name_Id := N + $; -- GNAT
+    Name_Aggregate_Individually_Assign  : constant Name_Id := N + $; -- GNAT
     Name_Allow_Integer_Address          : constant Name_Id := N + $; -- GNAT
     Name_Annotate                       : constant Name_Id := N + $; -- GNAT
     Name_Assertion_Policy               : constant Name_Id := N + $; -- Ada 05
*************** package Snames is
*** 592,601 ****
     Name_Machine_Attribute              : constant Name_Id := N + $; -- GNAT
     Name_Main                           : constant Name_Id := N + $; -- GNAT
     Name_Main_Storage                   : constant Name_Id := N + $; -- GNAT
!    Name_Max_Entry_Queue_Depth          : constant Name_Id := N + $; -- Ada 12
     Name_Max_Queue_Length               : constant Name_Id := N + $; -- GNAT
     Name_Memory_Size                    : constant Name_Id := N + $; -- Ada 83
     Name_No_Body                        : constant Name_Id := N + $; -- GNAT
     Name_No_Elaboration_Code_All        : constant Name_Id := N + $; -- GNAT
     Name_No_Inline                      : constant Name_Id := N + $; -- GNAT
     Name_No_Return                      : constant Name_Id := N + $; -- Ada 05
--- 593,604 ----
     Name_Machine_Attribute              : constant Name_Id := N + $; -- GNAT
     Name_Main                           : constant Name_Id := N + $; -- GNAT
     Name_Main_Storage                   : constant Name_Id := N + $; -- GNAT
!    Name_Max_Entry_Queue_Depth          : constant Name_Id := N + $; -- GNAT
!    Name_Max_Entry_Queue_Length         : constant Name_Id := N + $; -- Ada 12
     Name_Max_Queue_Length               : constant Name_Id := N + $; -- GNAT
     Name_Memory_Size                    : constant Name_Id := N + $; -- Ada 83
     Name_No_Body                        : constant Name_Id := N + $; -- GNAT
+    Name_No_Caching                     : constant Name_Id := N + $; -- GNAT
     Name_No_Elaboration_Code_All        : constant Name_Id := N + $; -- GNAT
     Name_No_Inline                      : constant Name_Id := N + $; -- GNAT
     Name_No_Return                      : constant Name_Id := N + $; -- Ada 05
*************** package Snames is
*** 781,787 ****
     Name_Link_Name                      : constant Name_Id := N + $;
     Name_Low_Order_First                : constant Name_Id := N + $;
     Name_Lowercase                      : constant Name_Id := N + $;
-    Name_Max_Entry_Queue_Length         : constant Name_Id := N + $;
     Name_Max_Size                       : constant Name_Id := N + $;
     Name_Mechanism                      : constant Name_Id := N + $;
     Name_Message                        : constant Name_Id := N + $;
--- 784,789 ----
*************** package Snames is
*** 1000,1005 ****
--- 1002,1008 ----
     Name_Priority                       : constant Name_Id := N + $; -- Ada 05
     Name_Range                          : constant Name_Id := N + $;
     Name_Range_Length                   : constant Name_Id := N + $; -- GNAT
+    Name_Reduce                         : constant Name_Id := N + $;
     Name_Ref                            : constant Name_Id := N + $; -- GNAT
     Name_Restriction_Set                : constant Name_Id := N + $; -- GNAT
     Name_Result                         : constant Name_Id := N + $; -- GNAT
*************** package Snames is
*** 1511,1516 ****
--- 1514,1524 ----
     Name_Runtime_Library_Dir              : constant Name_Id := N + $;
     Name_Runtime_Source_Dir               : constant Name_Id := N + $;
  
+    --  Additional names used by the Repinfo unit
+ 
+    Name_Discriminant                     : constant Name_Id := N + $;
+    Name_Operands                         : constant Name_Id := N + $;
+ 
     --  Other miscellaneous names used in front end
  
     Name_Unaligned_Valid                  : constant Name_Id := N + $;
*************** package Snames is
*** 1667,1672 ****
--- 1675,1681 ----
        Attribute_Priority,
        Attribute_Range,
        Attribute_Range_Length,
+       Attribute_Reduce,
        Attribute_Ref,
        Attribute_Restriction_Set,
        Attribute_Result,
*************** package Snames is
*** 1841,1846 ****
--- 1850,1856 ----
        Pragma_Ada_2020,
        --  Note that there is no Pragma_Ada_20. Pragma_Ada_05/12 are for
        --  compatibility reasons only; the full year names are preferred.
+       Pragma_Aggregate_Individually_Assign,
        Pragma_Allow_Integer_Address,
        Pragma_Annotate,
        Pragma_Assertion_Policy,
*************** package Snames is
*** 2001,2009 ****
--- 2011,2021 ----
        Pragma_Main,
        Pragma_Main_Storage,
        Pragma_Max_Entry_Queue_Depth,
+       Pragma_Max_Entry_Queue_Length,
        Pragma_Max_Queue_Length,
        Pragma_Memory_Size,
        Pragma_No_Body,
+       Pragma_No_Caching,
        Pragma_No_Elaboration_Code_All,
        Pragma_No_Inline,
        Pragma_No_Return,
diff -Nrcpad gcc-9.3.0/gcc/ada/socket.c gcc-10.1.0/gcc/ada/socket.c
*** gcc-9.3.0/gcc/ada/socket.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/socket.c	Thu May  7 10:49:59 2020
***************
*** 34,40 ****
--- 34,42 ----
  #define ATTRIBUTE_UNUSED __attribute__((unused))
  
  /* Ensure access to errno is thread safe.  */
+ #ifndef _REENTRANT
  #define _REENTRANT
+ #endif
  #define _THREAD_SAFE
  
  #include "gsocket.h"
*************** __gnat_servent_s_proto (struct servent *
*** 704,715 ****
  
  #if defined(AF_INET6) && !defined(__rtems__)
  
- #if defined (__vxworks)
- #define getaddrinfo ipcom_getaddrinfo
- #define getnameinfo ipcom_getnameinfo
- #define freeaddrinfo ipcom_freeaddrinfo
- #endif
- 
  int __gnat_getaddrinfo(
    const char *node,
    const char *service,
--- 706,711 ----
*************** const char * __gnat_gai_strerror(int err
*** 803,806 ****
--- 799,813 ----
  
  #endif
  
+ int __gnat_minus_500ms() {
+ #if defined (_WIN32)
+   // Windows Server 2019 and Windows 8.0 do not need 500 millisecond socket
+   // timeout correction.
+   return !(IsWindows8OrGreater() && !IsWindowsServer()
+            || IsWindowsVersionOrGreater(10, 0, 17763));
+ #else
+    return 0;
+ #endif
+ }
+ 
  #endif /* defined(HAVE_SOCKETS) */
diff -Nrcpad gcc-9.3.0/gcc/ada/sprint.adb gcc-10.1.0/gcc/ada/sprint.adb
*** gcc-9.3.0/gcc/ada/sprint.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sprint.adb	Thu May  7 10:49:59 2020
*************** package body Sprint is
*** 1483,1491 ****
              end;
  
           when N_Decimal_Fixed_Point_Definition =>
!             Write_Str_With_Col_Check_Sloc (" delta ");
              Sprint_Node (Delta_Expression (Node));
!             Write_Str_With_Col_Check ("digits ");
              Sprint_Node (Digits_Expression (Node));
              Sprint_Opt_Node (Real_Range_Specification (Node));
  
--- 1483,1491 ----
              end;
  
           when N_Decimal_Fixed_Point_Definition =>
!             Write_Str_With_Col_Check_Sloc ("delta ");
              Sprint_Node (Delta_Expression (Node));
!             Write_Str_With_Col_Check (" digits ");
              Sprint_Node (Digits_Expression (Node));
              Sprint_Opt_Node (Real_Range_Specification (Node));
  
*************** package body Sprint is
*** 4187,4195 ****
  
           declare
              B : constant Node_Id := Etype (Typ);
-             X : Node_Id;
              P : constant Node_Id := Parent (Typ);
- 
              S : constant Saved_Output_Buffer := Save_Output_Buffer;
              --  Save current output buffer
  
--- 4187,4193 ----
*************** package body Sprint is
*** 4197,4202 ****
--- 4195,4202 ----
              --  Save sloc of related node, so it is not modified when
              --  printing with -gnatD.
  
+             X : Node_Id;
+ 
           begin
              --  Write indentation at start of line
  
*************** package body Sprint is
*** 4324,4331 ****
                       declare
                          L  : constant Node_Id := Type_Low_Bound (Typ);
                          H  : constant Node_Id := Type_High_Bound (Typ);
!                         LE : Node_Id;
!                         HE : Node_Id;
  
                       begin
                          --  B can either be a scalar type, in which case the
--- 4324,4331 ----
                       declare
                          L  : constant Node_Id := Type_Low_Bound (Typ);
                          H  : constant Node_Id := Type_High_Bound (Typ);
!                         BL : Node_Id;
!                         BH : Node_Id;
  
                       begin
                          --  B can either be a scalar type, in which case the
*************** package body Sprint is
*** 4335,4363 ****
                          --  constraint.
  
                          if Is_Scalar_Type (B) then
!                            LE := Type_Low_Bound (B);
!                            HE := Type_High_Bound (B);
                          else
!                            LE := Empty;
!                            HE := Empty;
                          end if;
  
!                         if No (LE)
                            or else (True
                              and then Nkind (L) = N_Integer_Literal
                              and then Nkind (H) = N_Integer_Literal
!                             and then Nkind (LE) = N_Integer_Literal
!                             and then Nkind (HE) = N_Integer_Literal
!                             and then UI_Eq (Intval (L), Intval (LE))
!                             and then UI_Eq (Intval (H), Intval (HE)))
                          then
                             null;
  
                          else
                             Write_Str (" range ");
!                            Sprint_Node (Type_Low_Bound (Typ));
                             Write_Str (" .. ");
!                            Sprint_Node (Type_High_Bound (Typ));
                          end if;
                       end;
  
--- 4335,4363 ----
                          --  constraint.
  
                          if Is_Scalar_Type (B) then
!                            BL := Type_Low_Bound (B);
!                            BH := Type_High_Bound (B);
                          else
!                            BL := Empty;
!                            BH := Empty;
                          end if;
  
!                         if No (BL)
                            or else (True
                              and then Nkind (L) = N_Integer_Literal
                              and then Nkind (H) = N_Integer_Literal
!                             and then Nkind (BL) = N_Integer_Literal
!                             and then Nkind (BH) = N_Integer_Literal
!                             and then UI_Eq (Intval (L), Intval (BL))
!                             and then UI_Eq (Intval (H), Intval (BH)))
                          then
                             null;
  
                          else
                             Write_Str (" range ");
!                            Sprint_Node (L);
                             Write_Str (" .. ");
!                            Sprint_Node (H);
                          end if;
                       end;
  
*************** package body Sprint is
*** 4368,4374 ****
                       Write_Str ("mod ");
                       Write_Uint_With_Col_Check (Modulus (Typ), Auto);
  
!                   --  Floating point types and subtypes
  
                    when E_Floating_Point_Subtype
                       | E_Floating_Point_Type
--- 4368,4374 ----
                       Write_Str ("mod ");
                       Write_Uint_With_Col_Check (Modulus (Typ), Auto);
  
!                   --  Floating-point types and subtypes
  
                    when E_Floating_Point_Subtype
                       | E_Floating_Point_Type
*************** package body Sprint is
*** 4379,4387 ****
                          Write_Str ("new ");
                       end if;
  
!                      Write_Id (Etype (Typ));
  
!                      if Digits_Value (Typ) /= Digits_Value (Etype (Typ)) then
                          Write_Str (" digits ");
                          Write_Uint_With_Col_Check
                            (Digits_Value (Typ), Decimal);
--- 4379,4387 ----
                          Write_Str ("new ");
                       end if;
  
!                      Write_Id (B);
  
!                      if Digits_Value (Typ) /= Digits_Value (B) then
                          Write_Str (" digits ");
                          Write_Uint_With_Col_Check
                            (Digits_Value (Typ), Decimal);
*************** package body Sprint is
*** 4392,4418 ****
                       declare
                          L  : constant Node_Id := Type_Low_Bound (Typ);
                          H  : constant Node_Id := Type_High_Bound (Typ);
!                         LE : constant Node_Id := Type_Low_Bound (B);
!                         HE : constant Node_Id := Type_High_Bound (B);
  
                       begin
!                         if Nkind (L) = N_Real_Literal
                            and then Nkind (H) = N_Real_Literal
!                           and then Nkind (LE) = N_Real_Literal
!                           and then Nkind (HE) = N_Real_Literal
!                           and then UR_Eq (Realval (L), Realval (LE))
!                           and then UR_Eq (Realval (H), Realval (HE))
                          then
                             null;
  
                          else
                             Write_Str (" range ");
!                            Sprint_Node (Type_Low_Bound (Typ));
                             Write_Str (" .. ");
!                            Sprint_Node (Type_High_Bound (Typ));
                          end if;
                       end;
  
                    --  Record subtypes
  
                    when E_Record_Subtype
--- 4392,4445 ----
                       declare
                          L  : constant Node_Id := Type_Low_Bound (Typ);
                          H  : constant Node_Id := Type_High_Bound (Typ);
!                         BL : constant Node_Id := Type_Low_Bound (B);
!                         BH : constant Node_Id := Type_High_Bound (B);
  
                       begin
!                         if True
!                           and then Nkind (L) = N_Real_Literal
                            and then Nkind (H) = N_Real_Literal
!                           and then Nkind (BL) = N_Real_Literal
!                           and then Nkind (BH) = N_Real_Literal
!                           and then UR_Eq (Realval (L), Realval (BL))
!                           and then UR_Eq (Realval (H), Realval (BH))
                          then
                             null;
  
                          else
                             Write_Str (" range ");
!                            Sprint_Node (L);
                             Write_Str (" .. ");
!                            Sprint_Node (H);
                          end if;
                       end;
  
+                   --  Ordinary fixed-point types and subtypes
+ 
+                   when E_Ordinary_Fixed_Point_Subtype
+                      | E_Ordinary_Fixed_Point_Type
+                   =>
+                      Write_Header (Ekind (Typ) = E_Ordinary_Fixed_Point_Type);
+ 
+                      Write_Str ("delta ");
+                      Write_Ureal_With_Col_Check_Sloc (Delta_Value (Typ));
+                      Write_Str (" range ");
+                      Sprint_Node (Type_Low_Bound (Typ));
+                      Write_Str (" .. ");
+                      Sprint_Node (Type_High_Bound (Typ));
+ 
+                   --  Decimal fixed-point types and subtypes
+ 
+                   when E_Decimal_Fixed_Point_Subtype
+                      | E_Decimal_Fixed_Point_Type
+                   =>
+                      Write_Header (Ekind (Typ) = E_Decimal_Fixed_Point_Type);
+ 
+                      Write_Str ("delta ");
+                      Write_Ureal_With_Col_Check_Sloc (Delta_Value (Typ));
+                      Write_Str (" digits ");
+                      Write_Uint_With_Col_Check (Digits_Value (Typ), Decimal);
+ 
                    --  Record subtypes
  
                    when E_Record_Subtype
*************** package body Sprint is
*** 4493,4508 ****
  
                    when E_String_Literal_Subtype =>
                       declare
!                         LB  : constant Uint :=
                                  Expr_Value (String_Literal_Low_Bound (Typ));
                          Len : constant Uint :=
                                  String_Literal_Length (Typ);
                       begin
                          Write_Header (False);
                          Write_Str ("String (");
!                         Write_Int (UI_To_Int (LB));
                          Write_Str (" .. ");
!                         Write_Int (UI_To_Int (LB + Len) - 1);
                          Write_Str (");");
                       end;
  
--- 4520,4535 ----
  
                    when E_String_Literal_Subtype =>
                       declare
!                         L   : constant Uint :=
                                  Expr_Value (String_Literal_Low_Bound (Typ));
                          Len : constant Uint :=
                                  String_Literal_Length (Typ);
                       begin
                          Write_Header (False);
                          Write_Str ("String (");
!                         Write_Int (UI_To_Int (L));
                          Write_Str (" .. ");
!                         Write_Int (UI_To_Int (L + Len) - 1);
                          Write_Str (");");
                       end;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/sprint.ads gcc-10.1.0/gcc/ada/sprint.ads
*** gcc-9.3.0/gcc/ada/sprint.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sprint.ads	Thu May  7 10:49:59 2020
*************** package Sprint is
*** 48,55 ****
  
     --    Allocator                           new xxx [storage_pool = xxx]
     --    Cleanup action                      at end procedure name;
-    --    Conversion wi Float_Truncate        target^(source)
     --    Convert wi Conversion_OK            target?(source)
     --    Convert wi Rounded_Result           target@(source)
     --    Divide wi Treat_Fixed_As_Integer    x #/ y
     --    Divide wi Rounded_Result            x @/ y
--- 48,55 ----
  
     --    Allocator                           new xxx [storage_pool = xxx]
     --    Cleanup action                      at end procedure name;
     --    Convert wi Conversion_OK            target?(source)
+    --    Convert wi Float_Truncate           target^(source)
     --    Convert wi Rounded_Result           target@(source)
     --    Divide wi Treat_Fixed_As_Integer    x #/ y
     --    Divide wi Rounded_Result            x @/ y
*************** package Sprint is
*** 70,76 ****
     --    Multiple concatenation              expr && expr && expr ... && expr
     --    Multiply wi Treat_Fixed_As_Integer  x #* y
     --    Multiply wi Rounded_Result          x @* y
!    --    Operator with range check           {operator} (e.g. {+})
     --    Others choice for cleanup           when all others
     --    Pop exception label                 %pop_xxx_exception_label
     --    Push exception label                %push_xxx_exception_label (label)
--- 70,76 ----
     --    Multiple concatenation              expr && expr && expr ... && expr
     --    Multiply wi Treat_Fixed_As_Integer  x #* y
     --    Multiply wi Rounded_Result          x @* y
!    --    Operator with overflow check        {operator} (e.g. {+})
     --    Others choice for cleanup           when all others
     --    Pop exception label                 %pop_xxx_exception_label
     --    Push exception label                %push_xxx_exception_label (label)
diff -Nrcpad gcc-9.3.0/gcc/ada/standard.ads.h gcc-10.1.0/gcc/ada/standard.ads.h
*** gcc-9.3.0/gcc/ada/standard.ads.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/ada/standard.ads.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,84 ----
+ /****************************************************************************
+  *                                                                          *
+  *                         GNAT COMPILER COMPONENTS                         *
+  *                                                                          *
+  *                             S T A N D A R D                              *
+  *                                                                          *
+  *                              C Header File                               *
+  *                                                                          *
+  *                       Copyright (C) 2015, AdaCore                        *
+  *                                                                          *
+  * GNAT is free software;  you can  redistribute it  and/or modify it under *
+  * terms of the  GNU General Public License as published  by the Free Soft- *
+  * ware  Foundation;  either version 3,  or (at your option) any later ver- *
+  * sion.  GNAT is distributed in the hope that it will be useful, but WITH- *
+  * OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY *
+  * or FITNESS FOR A PARTICULAR PURPOSE.                                     *
+  *                                                                          *
+  * As a special exception under Section 7 of GPL version 3, you are granted *
+  * additional permissions described in the GCC Runtime Library Exception,   *
+  * version 3.1, as published by the Free Software Foundation.               *
+  *                                                                          *
+  * You should have received a copy of the GNU General Public License and    *
+  * a copy of the GCC Runtime Library Exception along with this program;     *
+  * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    *
+  * <http://www.gnu.org/licenses/>.                                          *
+  *                                                                          *
+  * GNAT was originally developed  by the GNAT team at  New York University. *
+  * Extensive contributions were provided by Ada Core Technologies Inc.      *
+  *                                                                          *
+  ****************************************************************************/
+ 
+ #ifndef STANDARD_ADS_H
+ #define STANDARD_ADS_H
+ 
+ #include <stdint.h>
+ 
+ typedef unsigned char boolean;
+ 
+ #ifndef false
+ #define false 0
+ #endif
+ 
+ #ifndef true
+ #define true 1
+ #endif
+ 
+ typedef uint8_t unsigned_8;
+ typedef uint16_t unsigned_16;
+ typedef uint32_t unsigned_32;
+ typedef uint64_t unsigned_64;
+ 
+ typedef int8_t integer_8;
+ typedef int16_t integer_16;
+ typedef int32_t integer_32;
+ typedef int64_t integer_64;
+ 
+ typedef int integer;
+ 
+ typedef int natural;
+ typedef int positive;
+ 
+ typedef signed char short_short_integer;
+ typedef short short_integer;
+ typedef long long_integer;
+ typedef long long long_long_integer;
+ typedef long long universal_integer;
+ 
+ typedef float short_float;
+ typedef double long_float;
+ typedef long double long_long_float;
+ typedef long double universal_real;
+ 
+ typedef char character;
+ typedef integer_16 wide_character;
+ typedef integer_32 wide_wide_character;
+ 
+ typedef character *access_character;
+ typedef character *string;
+ typedef wide_character *wide_string;
+ typedef wide_wide_character *wide_wide_string;
+ 
+ typedef integer_64 duration;
+ 
+ #endif /* STANDARD_ADS_H */
diff -Nrcpad gcc-9.3.0/gcc/ada/stringt.adb gcc-10.1.0/gcc/ada/stringt.adb
*** gcc-9.3.0/gcc/ada/stringt.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/stringt.adb	Thu May  7 10:49:59 2020
*************** package body Stringt is
*** 350,355 ****
--- 350,366 ----
     end Strings_Address;
  
     ---------------
+    -- To_String --
+    ---------------
+ 
+    function To_String (S : String_Id) return String is
+       Buf : Bounded_String;
+    begin
+       Append (Buf, S);
+       return To_String (Buf);
+    end To_String;
+ 
+    ---------------
     -- Tree_Read --
     ---------------
  
diff -Nrcpad gcc-9.3.0/gcc/ada/stringt.ads gcc-10.1.0/gcc/ada/stringt.ads
*** gcc-9.3.0/gcc/ada/stringt.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/stringt.ads	Thu May  7 10:49:59 2020
*************** package Stringt is
*** 42,47 ****
--- 42,50 ----
  --  additional string constants generated by compile time concatenation and
  --  other similar processing.
  
+ --  WARNING: There is a C version of this package. Any changes to this
+ --  source file must be properly reflected in the C header file stringt.h
+ 
  --  A string constant in this table consists of a series of Char_Code values,
  --  so that 16-bit character codes can be properly handled if this feature
  --  is implemented in the scanner.
*************** package Stringt is
*** 127,132 ****
--- 130,138 ----
     --  out of Character range. Does not attempt to do any encoding of
     --  characters.
  
+    function To_String (S : String_Id) return String;
+    --  Return S as a String
+ 
     procedure String_To_Name_Buffer (S : String_Id);
     --  Place characters of given string in Name_Buffer, setting Name_Len.
     --  Error if any characters are out of Character range. Does not attempt
diff -Nrcpad gcc-9.3.0/gcc/ada/stringt.h gcc-10.1.0/gcc/ada/stringt.h
*** gcc-9.3.0/gcc/ada/stringt.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/stringt.h	Thu May  7 10:49:59 2020
***************
*** 23,30 ****
   *                                                                          *
   ****************************************************************************/
  
! /* This file is the C file that corresponds to the Ada package spec
!    Stringt. It was created manually from stringt.ads and stringt.adb
  
     Note: only the access functions are provided, since the tree transformer
     is not allowed to modify the tree or its auxiliary structures.
--- 23,32 ----
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header that corresponds to the Ada package specification for
!    Stringt.  It also contains the implementations of inlined functions from the
!    package body for Stringt.  It was created manually from stringt.ads and
!    stringt.adb and must be kept synchronized with changes in these files.
  
     Note: only the access functions are provided, since the tree transformer
     is not allowed to modify the tree or its auxiliary structures.
diff -Nrcpad gcc-9.3.0/gcc/ada/style.ads gcc-10.1.0/gcc/ada/style.ads
*** gcc-9.3.0/gcc/ada/style.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/style.ads	Thu May  7 10:49:59 2020
*************** package Style is
*** 125,130 ****
--- 125,133 ----
     --  Called with Scan_Ptr pointing to the first minus sign of a comment.
     --  Intended for checking any specific rules for comment placement/format.
  
+    procedure Check_Defining_Identifier_Casing
+      renames Style_Inst.Check_Defining_Identifier_Casing;
+ 
     procedure Check_Dot_Dot
       renames Style_Inst.Check_Dot_Dot;
     --  Called after scanning out dot dot to check spacing
*************** package Style is
*** 219,222 ****
--- 222,226 ----
     --  lower case letters. On entry Token_Ptr points to the keyword token.
     --  This is not used for keywords appearing as attribute designators,
     --  where instead Check_Attribute_Name (True) is called.
+ 
  end Style;
diff -Nrcpad gcc-9.3.0/gcc/ada/styleg.adb gcc-10.1.0/gcc/ada/styleg.adb
*** gcc-9.3.0/gcc/ada/styleg.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/styleg.adb	Thu May  7 10:49:59 2020
*************** package body Styleg is
*** 610,615 ****
--- 610,640 ----
        end if;
     end Check_Comment;
  
+    --------------------------------------
+    -- Check_Defining_Identifier_Casing --
+    --------------------------------------
+ 
+    procedure Check_Defining_Identifier_Casing is
+    begin
+       if Style_Check_Mixed_Case_Decls then
+          case Determine_Token_Casing is
+             when All_Lower_Case
+                | All_Upper_Case
+             =>
+                Error_Msg_SC -- CODEFIX
+                  ("(style) bad capitalization, mixed case required");
+ 
+             --  The Unknown case is something like A_B_C, which is both all
+             --  caps and mixed case.
+ 
+             when Mixed_Case
+                | Unknown
+             =>
+                null; -- OK
+          end case;
+       end if;
+    end Check_Defining_Identifier_Casing;
+ 
     -------------------
     -- Check_Dot_Dot --
     -------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/styleg.ads gcc-10.1.0/gcc/ada/styleg.ads
*** gcc-9.3.0/gcc/ada/styleg.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/styleg.ads	Thu May  7 10:49:59 2020
*************** package Styleg is
*** 91,96 ****
--- 91,101 ----
     --  Called with Scan_Ptr pointing to the first minus sign of a comment.
     --  Intended for checking any specific rules for comment placement/format.
  
+    procedure Check_Defining_Identifier_Casing;
+    --  The current token is an identifier that will be a defining
+    --  identifier. Check that it is mixed case, if the appropriate
+    --  switch is set.
+ 
     procedure Check_Dot_Dot;
     --  Called after scanning out dot dot to check spacing
  
diff -Nrcpad gcc-9.3.0/gcc/ada/stylesw.adb gcc-10.1.0/gcc/ada/stylesw.adb
*** gcc-9.3.0/gcc/ada/stylesw.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/stylesw.adb	Thu May  7 10:49:59 2020
*************** package body Stylesw is
*** 79,84 ****
--- 79,85 ----
        Style_Check_Boolean_And_Or        := False;
        Style_Check_Comments              := False;
        Style_Check_DOS_Line_Terminator   := False;
+       Style_Check_Mixed_Case_Decls      := False;
        Style_Check_End_Labels            := False;
        Style_Check_Form_Feeds            := False;
        Style_Check_Horizontal_Tabs       := False;
*************** package body Stylesw is
*** 168,173 ****
--- 169,175 ----
        end if;
  
        Add ('d', Style_Check_DOS_Line_Terminator);
+       Add ('D', Style_Check_Mixed_Case_Decls);
        Add ('e', Style_Check_End_Labels);
        Add ('f', Style_Check_Form_Feeds);
        Add ('h', Style_Check_Horizontal_Tabs);
*************** package body Stylesw is
*** 336,341 ****
--- 338,346 ----
              when 'd' =>
                 Style_Check_DOS_Line_Terminator   := True;
  
+             when 'D' =>
+                Style_Check_Mixed_Case_Decls      := True;
+ 
              when 'e' =>
                 Style_Check_End_Labels            := True;
  
*************** package body Stylesw is
*** 503,508 ****
--- 508,516 ----
              when 'd' =>
                 Style_Check_DOS_Line_Terminator   := False;
  
+             when 'D' =>
+                Style_Check_Mixed_Case_Decls      := False;
+ 
              when 'e' =>
                 Style_Check_End_Labels            := False;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/stylesw.ads gcc-10.1.0/gcc/ada/stylesw.ads
*** gcc-9.3.0/gcc/ada/stylesw.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/stylesw.ads	Thu May  7 10:49:59 2020
*************** package Stylesw is
*** 113,118 ****
--- 113,122 ----
     --  the line terminator must be a single LF, without an associated CR (e.g.
     --  DOS line terminator sequence CR/LF not allowed).
  
+    Style_Check_Mixed_Case_Decls : Boolean := False;
+    --  This can be set True by using the -gnatyD switch. If it is True, then
+    --  declared identifiers must be in Mixed_Case.
+ 
     Style_Check_End_Labels : Boolean := False;
     --  This can be set True by using the -gnatye switch. If it is True, then
     --  optional END labels must always be present.
diff -Nrcpad gcc-9.3.0/gcc/ada/switch-b.adb gcc-10.1.0/gcc/ada/switch-b.adb
*** gcc-9.3.0/gcc/ada/switch-b.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/switch-b.adb	Thu May  7 10:49:59 2020
*************** package body Switch.B is
*** 51,56 ****
--- 51,59 ----
        --  Used for -d and -D to scan stack size including handling k/m. S is
        --  set to 'd' or 'D' to indicate the switch being scanned.
  
+       procedure Scan_Debug_Switches;
+       --  Scan out debug switches
+ 
        ---------------------------
        -- Get_Optional_Filename --
        ---------------------------
*************** package body Switch.B is
*** 114,119 ****
--- 117,186 ----
           return Result;
        end Get_Stack_Size;
  
+       -------------------------
+       -- Scan_Debug_Switches --
+       -------------------------
+ 
+       procedure Scan_Debug_Switches is
+          Dot        : Boolean := False;
+          Underscore : Boolean := False;
+ 
+       begin
+          while Ptr <= Max loop
+             C := Switch_Chars (Ptr);
+ 
+             --  Binder debug flags come in the following forms:
+             --
+             --       letter
+             --     . letter
+             --     _ letter
+             --
+             --       digit
+             --     . digit
+             --     _ digit
+             --
+             --  Note that the processing of switch -d aleady takes care of the
+             --  case where the first flag is a digit (default stack size).
+ 
+             if C in '1' .. '9' or else
+                C in 'a' .. 'z' or else
+                C in 'A' .. 'Z'
+             then
+                --  . letter
+                --  . digit
+ 
+                if Dot then
+                   Set_Dotted_Debug_Flag (C);
+                   Dot := False;
+ 
+                --  _ letter
+                --  _ digit
+ 
+                elsif Underscore then
+                   Set_Underscored_Debug_Flag (C);
+                   Underscore := False;
+ 
+                --    letter
+                --    digit
+ 
+                else
+                   Set_Debug_Flag (C);
+                end if;
+ 
+             elsif C = '.' then
+                Dot := True;
+ 
+             elsif C = '_' then
+                Underscore := True;
+ 
+             else
+                Bad_Switch (Switch_Chars);
+             end if;
+ 
+             Ptr := Ptr + 1;
+          end loop;
+       end Scan_Debug_Switches;
+ 
     --  Start of processing for Scan_Binder_Switches
  
     begin
*************** package body Switch.B is
*** 170,176 ****
           --  Processing for d switch
  
           when 'd' =>
- 
              if Ptr = Max then
                 Bad_Switch (Switch_Chars);
              end if;
--- 237,242 ----
*************** package body Switch.B is
*** 189,214 ****
              --  Case where character after -d is not digit (debug flags)
  
              else
!                --  Note: for the debug switch, the remaining characters in this
!                --  switch field must all be debug flags, since all valid switch
!                --  characters are also valid debug characters. This switch is
!                --  not documented on purpose because it is only used by the
!                --  implementors.
! 
!                --  Loop to scan out debug flags
! 
!                loop
!                   C := Switch_Chars (Ptr);
! 
!                   if C in 'a' .. 'z' or else C in 'A' .. 'Z' then
!                      Set_Debug_Flag (C);
!                   else
!                      Bad_Switch (Switch_Chars);
!                   end if;
! 
!                   Ptr := Ptr + 1;
!                   exit when Ptr > Max;
!                end loop;
              end if;
  
           --  Processing for D switch
--- 255,261 ----
              --  Case where character after -d is not digit (debug flags)
  
              else
!                Scan_Debug_Switches;
              end if;
  
           --  Processing for D switch
*************** package body Switch.B is
*** 294,305 ****
--- 341,364 ----
                 Debugger_Level := 2;
              end if;
  
+          --  Processing for G switch
+ 
+          when 'G' =>
+             Ptr := Ptr + 1;
+             Generate_C_Code := True;
+ 
           --  Processing for h switch
  
           when 'h' =>
              Ptr := Ptr + 1;
              Usage_Requested := True;
  
+          --  Processing for H switch
+ 
+          when 'H' =>
+             Ptr := Ptr + 1;
+             Legacy_Elaboration_Order := True;
+ 
           --  Processing for i switch
  
           when 'i' =>
diff -Nrcpad gcc-9.3.0/gcc/ada/sysdep.c gcc-10.1.0/gcc/ada/sysdep.c
*** gcc-9.3.0/gcc/ada/sysdep.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/sysdep.c	Thu May  7 10:49:59 2020
***************
*** 33,38 ****
--- 33,39 ----
     GNAT Run Time Library */
  
  #ifdef __vxworks
+ #include "vxWorks.h"
  #include "ioLib.h"
  #if ! defined (VTHREADS)
  #include "dosFsLib.h"
***************
*** 41,47 ****
  # include "nfsLib.h"
  #endif
  #include "selectLib.h"
- #include "vxWorks.h"
  #include "version.h"
  #if defined (__RTP__)
  #  include "vwModNum.h"
--- 42,47 ----
***************
*** 54,61 ****
  
  #ifdef IN_RTS
  #define POSIX
! #include "tconfig.h"
! #include "tsystem.h"
  #include <fcntl.h>
  #include <sys/stat.h>
  #else
--- 54,63 ----
  
  #ifdef IN_RTS
  #define POSIX
! #include "runtime.h"
! #include <string.h>
! #include <unistd.h>
! 
  #include <fcntl.h>
  #include <sys/stat.h>
  #else
*************** __gnat_set_mode (int handle ATTRIBUTE_UN
*** 300,306 ****
  }
  
  char *
! __gnat_ttyname (int filedes)
  {
  #if defined (__vxworks)
    return "";
--- 302,308 ----
  }
  
  char *
! __gnat_ttyname (int filedes ATTRIBUTE_UNUSED)
  {
  #if defined (__vxworks)
    return "";
*************** __gnat_get_task_options (void)
*** 896,925 ****
  #endif
  
  int
! __gnat_is_file_not_found_error (int errno_val) {
!    switch (errno_val) {
!       case ENOENT:
  #ifdef __vxworks
!       /* In the case of VxWorks, we also have to take into account various
!        * filesystem-specific variants of this error.
!        */
  #if ! defined (VTHREADS) && (_WRS_VXWORKS_MAJOR < 7)
!       case S_dosFsLib_FILE_NOT_FOUND:
  #endif
  #if ! defined (__RTP__) && (! defined (VTHREADS) || defined (__VXWORKSMILS__))
!       case S_nfsLib_NFSERR_NOENT:
  #endif
  #if defined (__RTP__)
! 	/* An RTP can return an NFS file not found, and the NFS bits must
! 	   first be masked on to check the errno.  */
!       case M_nfsStat | ENOENT:
  #endif
  #endif
!          return 1;
! 
!       default:
!         return 0;
!    }
  }
  
  #if defined (__linux__)
--- 898,931 ----
  #endif
  
  int
! __gnat_is_file_not_found_error (int errno_val)
!  {
!     /* WARNING: Do not rewrite this as a switch/case statement.
!      * Some of the "cases" are duplicated in some versions of
!      * Vxworks, notably VxWorks7r2 SR0610.  */
!     if (errno_val == ENOENT)
!       return 1;
  #ifdef __vxworks
!     /* In the case of VxWorks, we also have to take into account various
!      * filesystem-specific variants of this error.
!      */
  #if ! defined (VTHREADS) && (_WRS_VXWORKS_MAJOR < 7)
!     else if (errno_val == S_dosFsLib_FILE_NOT_FOUND)
!       return 1;
  #endif
  #if ! defined (__RTP__) && (! defined (VTHREADS) || defined (__VXWORKSMILS__))
!     else if (errno_val ==  S_nfsLib_NFSERR_NOENT)
!       return 1;
  #endif
  #if defined (__RTP__)
!     /* An RTP can return an NFS file not found, and the NFS bits must
!        first be masked on to check the errno.  */
!     else if (errno_val == (M_nfsStat | ENOENT))
!       return 1;
  #endif
  #endif
!     else
!       return 0;
  }
  
  #if defined (__linux__)
*************** __gnat_name_case_equivalence ()
*** 1066,1069 ****
    return 1;
  #endif
  }
- 
--- 1072,1074 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/table.adb gcc-10.1.0/gcc/ada/table.adb
*** gcc-9.3.0/gcc/ada/table.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/table.adb	Thu May  7 10:49:59 2020
*************** package body Table is
*** 80,85 ****
--- 80,86 ----
  
        procedure Append (New_Val : Table_Component_Type) is
        begin
+          pragma Assert (not Locked);
           Set_Item (Table_Index_Type (Last_Val + 1), New_Val);
        end Append;
  
*************** package body Table is
*** 120,125 ****
--- 121,127 ----
  
        procedure Increment_Last is
        begin
+          pragma Assert (not Locked);
           Last_Val := Last_Val + 1;
  
           if Last_Val > Max then
*************** package body Table is
*** 384,389 ****
--- 386,393 ----
  
        procedure Set_Last (New_Val : Table_Index_Type) is
        begin
+          pragma Assert (Int (New_Val) <= Last_Val or else not Locked);
+ 
           if Int (New_Val) < Last_Val then
              Last_Val := Int (New_Val);
  
diff -Nrcpad gcc-9.3.0/gcc/ada/table.ads gcc-10.1.0/gcc/ada/table.ads
*** gcc-9.3.0/gcc/ada/table.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/table.ads	Thu May  7 10:49:59 2020
*************** package Table is
*** 130,143 ****
        --  First .. Last.
  
        Locked : Boolean := False;
!       --  Table expansion is permitted only if this switch is set to False. A
!       --  client may set Locked to True, in which case any attempt to expand
!       --  the table will cause an assertion failure. Note that while a table
!       --  is locked, its address in memory remains fixed and unchanging. This
!       --  feature is used to control table expansion during Gigi processing.
!       --  Gigi assumes that tables other than the Uint and Ureal tables do
!       --  not move during processing, which means that they cannot be expanded.
!       --  The Locked flag is used to enforce this restriction.
  
        procedure Init;
        --  This procedure allocates a new table of size Initial (freeing any
--- 130,144 ----
        --  First .. Last.
  
        Locked : Boolean := False;
!       --  Increasing the value of Last is permitted only if this switch is set
!       --  to False. A client may set Locked to True, in which case any attempt
!       --  to increase the value of Last (which might expand the table) will
!       --  cause an assertion failure. Note that while a table is locked, its
!       --  address in memory remains fixed and unchanging. This feature is used
!       --  to control table expansion during Gigi processing.  Gigi assumes that
!       --  tables other than the Uint and Ureal tables do not move during
!       --  processing, which means that they cannot be expanded.  The Locked
!       --  flag is used to enforce this restriction.
  
        procedure Init;
        --  This procedure allocates a new table of size Initial (freeing any
diff -Nrcpad gcc-9.3.0/gcc/ada/targext.c gcc-10.1.0/gcc/ada/targext.c
*** gcc-9.3.0/gcc/ada/targext.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/targext.c	Thu May  7 10:49:59 2020
***************
*** 36,49 ****
--- 36,56 ----
      the file must be compiled with IN_GCC defined, even for the library.  */
  
  #ifdef IN_RTS
+ 
+ #ifndef STANDALONE
  #include "tconfig.h"
  #include "tsystem.h"
+ #endif
+ 
  #else
  #include "config.h"
  #include "system.h"
  #endif
+ 
+ #ifndef STANDALONE
  #include "coretypes.h"
  #include "tm.h"
+ #endif
  
  #ifndef TARGET_OBJECT_SUFFIX
  #define TARGET_OBJECT_SUFFIX ".o"
diff -Nrcpad gcc-9.3.0/gcc/ada/targparm.ads gcc-10.1.0/gcc/ada/targparm.ads
*** gcc-9.3.0/gcc/ada/targparm.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/targparm.ads	Thu May  7 10:49:59 2020
*************** package Targparm is
*** 455,466 ****
--- 455,470 ----
     Stack_Check_Probes_On_Target : Boolean := False;
     --  Indicates if the GCC probing mechanism is used
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     Stack_Check_Limits_On_Target : Boolean := False;
     --  Indicates if the GCC stack-limit mechanism is used
  
     --  Both flags cannot be simultaneously set to True. If neither
     --  is, the target independent fallback method is used.
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     Stack_Check_Default_On_Target : Boolean := False;
     --  Indicates if stack checking is on by default
  
*************** package Targparm is
*** 536,544 ****
--- 540,552 ----
     Machine_Overflows_On_Target : Boolean := False;
     --  Set to True for targets where S'Machine_Overflows is True
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     Signed_Zeros_On_Target : Boolean := True;
     --  Set to False on targets that do not reliably support signed zeros
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     -------------------------------------------
     -- Boolean-Valued Fixed-Point Attributes --
     -------------------------------------------
diff -Nrcpad gcc-9.3.0/gcc/ada/terminals.c gcc-10.1.0/gcc/ada/terminals.c
*** gcc-9.3.0/gcc/ada/terminals.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/terminals.c	Thu May  7 10:49:59 2020
*************** __gnat_tty_supported (void)
*** 108,114 ****
  }
  
  int
! __gnat_tty_waitpid (void *desc ATTRIBUTE_UNUSED)
  {
    return 1;
  }
--- 108,114 ----
  }
  
  int
! __gnat_tty_waitpid (void *desc ATTRIBUTE_UNUSED, int blocking)
  {
    return 1;
  }
*************** __gnat_setup_winsize (void *desc ATTRIBU
*** 152,157 ****
--- 152,158 ----
  #include <stdlib.h>
  
  #include <windows.h>
+ #include <winternl.h>
  
  #define MAXPATHLEN 1024
  
*************** struct TTY_Process {
*** 169,175 ****
    BOOL usePipe;
  };
  
! /* Control whether create_child cause the process to inherit GPS'
     error mode setting.  The default is 1, to minimize the possibility of
     subprocesses blocking when accessing unmounted drives.  */
  static int Vw32_start_process_inherit_error_mode = 1;
--- 170,176 ----
    BOOL usePipe;
  };
  
! /* Control whether create_child cause the process to inherit GNAT Studio'
     error mode setting.  The default is 1, to minimize the possibility of
     subprocesses blocking when accessing unmounted drives.  */
  static int Vw32_start_process_inherit_error_mode = 1;
*************** __gnat_terminate_pid (int pid)
*** 1014,1033 ****
     the Win32 API instead of the C one. */
  
  int
! __gnat_tty_waitpid (struct TTY_Process* p)
  {
    DWORD exitcode;
!   DWORD res;
!   HANDLE proc_hand = p->procinfo.hProcess;
  
!   res = WaitForSingleObject (proc_hand, 0);
!   GetExitCodeProcess (proc_hand, &exitcode);
  
!   CloseHandle (p->procinfo.hThread);
!   CloseHandle (p->procinfo.hProcess);
  
!   /* No need to close the handles: they were closed on the ada side */
  
    return (int) exitcode;
  }
  
--- 1015,1042 ----
     the Win32 API instead of the C one. */
  
  int
! __gnat_tty_waitpid (struct TTY_Process* p, int blocking)
  {
    DWORD exitcode;
!   HANDLE hprocess = p->procinfo.hProcess;
  
!   if (blocking) {
!      /* Wait is needed on Windows only in blocking mode. */
!      WaitForSingleObject (hprocess, 0);
!   }
  
!   GetExitCodeProcess (hprocess, &exitcode);
  
!   if (exitcode == STILL_ACTIVE) {
!      /* If process is still active return -1. */
!      exitcode = -1;
!   } else {
!      /* Process is dead, so handle to process and main thread can be closed. */
!      CloseHandle (p->procinfo.hThread);
!      CloseHandle (hprocess);
!   }
  
+   /* No need to close the handles: they were closed on the ada side */
    return (int) exitcode;
  }
  
*************** __gnat_terminate_pid (int pid)
*** 1556,1566 ****
   *   exit status of the child process
   */
  int
! __gnat_tty_waitpid (pty_desc *desc)
  {
!   int status = 0;
!   waitpid (desc->child_pid, &status, 0);
!   return WEXITSTATUS (status);
  }
  
  /* __gnat_tty_supported - Are tty supported ?
--- 1565,1585 ----
   *   exit status of the child process
   */
  int
! __gnat_tty_waitpid (pty_desc *desc, int blocking)
  {
!   int status = -1;
!   int options = 0;
! 
!   if (blocking) {
!      options = 0;
!   } else {
!      options = WNOHANG;
!   }
!   waitpid (desc->child_pid, &status, options);
!   if WIFEXITED (status) {
!      status = WEXITSTATUS (status);
!   }
!   return status;
  }
  
  /* __gnat_tty_supported - Are tty supported ?
*************** __gnat_new_tty (void)
*** 1629,1636 ****
   */
  void __gnat_close_tty (pty_desc* desc)
  {
!   if (desc->master_fd >= 0) close (desc->master_fd);
!   if (desc->slave_fd  >= 0) close (desc->slave_fd);
  }
  
  /* __gnat_tty_name - return slave side device name
--- 1648,1655 ----
   */
  void __gnat_close_tty (pty_desc* desc)
  {
!   if (desc->master_fd >= 0) { close (desc->master_fd); desc->master_fd = -1; }
!   if (desc->slave_fd  >= 0) { close (desc->slave_fd);  desc->slave_fd  = -1; }
  }
  
  /* __gnat_tty_name - return slave side device name
diff -Nrcpad gcc-9.3.0/gcc/ada/tracebak.c gcc-10.1.0/gcc/ada/tracebak.c
*** gcc-9.3.0/gcc/ada/tracebak.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/tracebak.c	Thu May  7 10:49:59 2020
***************
*** 50,63 ****
  extern "C" {
  #endif
  
- #ifdef __alpha_vxworks
- #include "vxWorks.h"
- #endif
- 
  #ifdef IN_RTS
  #define POSIX
! #include "tconfig.h"
! #include "tsystem.h"
  #else
  #include "config.h"
  #include "system.h"
--- 50,59 ----
  extern "C" {
  #endif
  
  #ifdef IN_RTS
  #define POSIX
! #include "runtime.h"
! #include <stddef.h>
  #else
  #include "config.h"
  #include "system.h"
diff -Nrcpad gcc-9.3.0/gcc/ada/treepr.adb gcc-10.1.0/gcc/ada/treepr.adb
*** gcc-9.3.0/gcc/ada/treepr.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/treepr.adb	Thu May  7 10:49:59 2020
*************** package body Treepr is
*** 242,247 ****
--- 242,255 ----
  
     function par (N : Union_Id) return Node_Or_Entity_Id renames p;
  
+    procedure ppar (N : Union_Id) is
+    begin
+       if N /= Empty_List_Or_Node then
+          pp (N);
+          ppar (Union_Id (p (N)));
+       end if;
+    end ppar;
+ 
     --------
     -- pe --
     --------
diff -Nrcpad gcc-9.3.0/gcc/ada/treepr.ads gcc-10.1.0/gcc/ada/treepr.ads
*** gcc-9.3.0/gcc/ada/treepr.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/treepr.ads	Thu May  7 10:49:59 2020
*************** package Treepr is
*** 82,87 ****
--- 82,91 ----
     --  the definition of Union_Id. Historically this was only for printing
     --  nodes, hence the name.
  
+    procedure ppar (N : Union_Id);
+    pragma Export (Ada, ppar);
+    --  Print the node, its parent, its parent's parent, and so on
+ 
     procedure pt  (N : Union_Id);
     procedure ppp (N : Union_Id);
     pragma Export (Ada, pt);
diff -Nrcpad gcc-9.3.0/gcc/ada/types.ads gcc-10.1.0/gcc/ada/types.ads
*** gcc-9.3.0/gcc/ada/types.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/types.ads	Thu May  7 10:49:59 2020
***************
*** 38,44 ****
  --  would have to be dealt with.
  
  --  WARNING: There is a C version of this package. Any changes to this source
! --  file must be properly reflected in the C header file types.h declarations.
  
  --  Note: the declarations in this package reflect an expectation that the host
  --  machine has an efficient integer base type with a range at least 32 bits
--- 38,44 ----
  --  would have to be dealt with.
  
  --  WARNING: There is a C version of this package. Any changes to this source
! --  file must be properly reflected in the C header file types.h
  
  --  Note: the declarations in this package reflect an expectation that the host
  --  machine has an efficient integer base type with a range at least 32 bits
diff -Nrcpad gcc-9.3.0/gcc/ada/types.h gcc-10.1.0/gcc/ada/types.h
*** gcc-9.3.0/gcc/ada/types.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/types.h	Thu May  7 10:49:59 2020
***************
*** 23,30 ****
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C file that corresponds to the Ada package spec Types. It was
!    created manually from the files types.ads and types.adb.
  
     This package contains host independent type definitions which are used
     throughout the compiler modules. The comments in the C version are brief
--- 23,31 ----
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header that corresponds to the Ada package specification for
!    Types.  It was created manually from types.ads and must be kept synchronized
!    with changes in this file.
  
     This package contains host independent type definitions which are used
     throughout the compiler modules. The comments in the C version are brief
*************** typedef Int Unit_Number_Type;
*** 306,311 ****
--- 307,315 ----
  /* Unit number value for main unit.  */
  #define Main_Unit 0
  
+ /* Type used to index the source file table.  */
+ typedef Nat Source_File_Index;
+ 
  /* Type used for lines table.  */
  typedef Source_Ptr *Lines_Table_Type;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/uintp.adb gcc-10.1.0/gcc/ada/uintp.adb
*** gcc-9.3.0/gcc/ada/uintp.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/uintp.adb	Thu May  7 10:49:59 2020
*************** package body Uintp is
*** 1492,1497 ****
--- 1492,1540 ----
        end;
     end UI_From_Int;
  
+    ----------------------
+    -- UI_From_Integral --
+    ----------------------
+ 
+    function UI_From_Integral (Input : In_T) return Uint is
+    begin
+       --  If in range of our normal conversion function, use it so we can use
+       --  direct access and our cache.
+ 
+       if In_T'Size <= Int'Size
+         or else Input in In_T (Int'First) .. In_T (Int'Last)
+       then
+          return UI_From_Int (Int (Input));
+ 
+       else
+          --  For values of larger magnitude, compute digits into a vector and
+          --  call Vector_To_Uint.
+ 
+          declare
+             Max_For_In_T : constant Int  := 3 * In_T'Size / Int'Size;
+             Our_Base     : constant In_T := In_T (Base);
+             Temp_Integer : In_T := Input;
+             --  Base is defined so that 3 Uint digits is sufficient to hold the
+             --  largest possible Int value.
+ 
+             U : Uint;
+             V : UI_Vector (1 .. Max_For_In_T);
+ 
+          begin
+             for J in reverse V'Range loop
+                V (J) := Int (abs (Temp_Integer rem Our_Base));
+                Temp_Integer := Temp_Integer / Our_Base;
+             end loop;
+ 
+             U := Vector_To_Uint (V, Input < 0);
+             Uints_Min := Uints.Last;
+             Udigits_Min := Udigits.Last;
+ 
+             return U;
+          end;
+       end if;
+    end UI_From_Integral;
+ 
     ------------
     -- UI_GCD --
     ------------
*************** package body Uintp is
*** 2324,2373 ****
        return Uint_0;
     end Vector_To_Uint;
  
-    ----------------------
-    -- UI_From_Integral --
-    ----------------------
- 
-    function UI_From_Integral (Input : In_T) return Uint is
-       U : Uint;
- 
-    begin
-       --  If in range of our normal conversion function, use it so we can
-       --  use direct access and our cache.
- 
-       if In_T'Size <= Int'Size
-         or else Input in In_T (Int'First) .. In_T (Int'Last)
-       then
-          return UI_From_Int (Int (Input));
- 
-       else
-          --  pragma Warnings (Off);
- 
-          --  For values of larger magnitude, compute digits into a vector
-          --  and call Vector_To_Uint.
- 
-          declare
-             Max_For_In_T : constant Int  := 3 * In_T'Size / Int'Size;
-             Our_Base     : constant In_T := In_T (Base);
-             Temp_Integer : In_T := Input;
-             --  Base is defined so that 3 Uint digits is sufficient to hold the
-             --  largest possible Int value.
- 
-             V : UI_Vector (1 .. Max_For_In_T);
- 
-          begin
-             for J in reverse V'Range loop
-                V (J) := Int (abs (Temp_Integer rem Our_Base));
-                Temp_Integer := Temp_Integer / Our_Base;
-             end loop;
- 
-             U := Vector_To_Uint (V, Input < 0);
-             Uints_Min := Uints.Last;
-             Udigits_Min := Udigits.Last;
-             return U;
-          end;
- 
-          --  pragma Warnings (On);
-       end if;
-    end UI_From_Integral;
  end Uintp;
--- 2367,2370 ----
diff -Nrcpad gcc-9.3.0/gcc/ada/uintp.ads gcc-10.1.0/gcc/ada/uintp.ads
*** gcc-9.3.0/gcc/ada/uintp.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/uintp.ads	Thu May  7 10:49:59 2020
*************** package Uintp is
*** 251,259 ****
     generic
        type In_T is range <>;
     function UI_From_Integral (Input : In_T) return Uint;
!    --  Likewise, but converts from any integer type.
!    --  Must not be applied to biased types (instantiation will provide
!    --  a warning if actual is a biased type).
  
     function UI_From_CC (Input : Char_Code) return Uint;
     --  Converts Char_Code value to universal integer form
--- 251,259 ----
     generic
        type In_T is range <>;
     function UI_From_Integral (Input : In_T) return Uint;
!    --  Likewise, but converts from any integer type. Must not be applied to
!    --  biased types (instantiation will provide a warning if actual is a biased
!    --  type).
  
     function UI_From_CC (Input : Char_Code) return Uint;
     --  Converts Char_Code value to universal integer form
diff -Nrcpad gcc-9.3.0/gcc/ada/uintp.h gcc-10.1.0/gcc/ada/uintp.h
*** gcc-9.3.0/gcc/ada/uintp.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/uintp.h	Thu May  7 10:49:59 2020
***************
*** 23,30 ****
   *                                                                          *
   ****************************************************************************/
  
! /* This file corresponds to the Ada package specification Uintp.  It was
!    created manually from the files uintp.ads and uintp.adb.  */
  
  #ifdef __cplusplus
  extern "C" {
--- 23,31 ----
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header that corresponds to the Ada package specification for
!    Uintp.  It was created manually from uintp.ads and must be kept synchronized
!    with changes in this file.  */
  
  #ifdef __cplusplus
  extern "C" {
diff -Nrcpad gcc-9.3.0/gcc/ada/urealp.ads gcc-10.1.0/gcc/ada/urealp.ads
*** gcc-9.3.0/gcc/ada/urealp.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/urealp.ads	Thu May  7 10:49:59 2020
***************
*** 31,36 ****
--- 31,39 ----
  
  --  Support for universal real arithmetic
  
+ --  WARNING: There is a C version of this package. Any changes to this
+ --  source file must be properly reflected in the C header file urealp.h
+ 
  with Types; use Types;
  with Uintp; use Uintp;
  
diff -Nrcpad gcc-9.3.0/gcc/ada/urealp.h gcc-10.1.0/gcc/ada/urealp.h
*** gcc-9.3.0/gcc/ada/urealp.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/urealp.h	Thu May  7 10:49:59 2020
***************
*** 23,30 ****
   *                                                                          *
   ****************************************************************************/
  
! /* This file corresponds to the Ada package specification Urealp.  It was
!    created manually from the files urealp.ads and urealp.adb.  */
  
  #ifdef __cplusplus
  extern "C" {
--- 23,31 ----
   *                                                                          *
   ****************************************************************************/
  
! /* This is the C header that corresponds to the Ada package specification for
!    Urealp.  It was created manually from urealp.ads and must be kept
!    synchronized with changes in this file.  */
  
  #ifdef __cplusplus
  extern "C" {
diff -Nrcpad gcc-9.3.0/gcc/ada/usage.adb gcc-10.1.0/gcc/ada/usage.adb
*** gcc-9.3.0/gcc/ada/usage.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/usage.adb	Thu May  7 10:49:59 2020
*************** begin
*** 483,488 ****
--- 483,490 ----
     Write_Line ("        A    turn off all optional info/warnings");
     Write_Line ("        .a*+ turn on warnings for failing assertion");
     Write_Line ("        .A   turn off warnings for failing assertion");
+    Write_Line ("        _a*+ turn on warnings for anonymous allocators");
+    Write_Line ("        _A   turn off warnings for anonymous allocators");
     Write_Line ("        b+   turn on warnings for bad fixed value " &
                                                    "(not multiple of small)");
     Write_Line ("        B*   turn off warnings for bad fixed value " &
diff -Nrcpad gcc-9.3.0/gcc/ada/validsw.adb gcc-10.1.0/gcc/ada/validsw.adb
*** gcc-9.3.0/gcc/ada/validsw.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/validsw.adb	Thu May  7 10:49:59 2020
*************** package body Validsw is
*** 36,46 ****
     begin
        Validity_Check_Components     := False;
        Validity_Check_Copies         := False;
!       Validity_Check_Default        := True;
        Validity_Check_Floating_Point := False;
        Validity_Check_In_Out_Params  := False;
        Validity_Check_In_Params      := False;
        Validity_Check_Operands       := False;
        Validity_Check_Returns        := False;
        Validity_Check_Subscripts     := False;
        Validity_Check_Tests          := False;
--- 36,47 ----
     begin
        Validity_Check_Components     := False;
        Validity_Check_Copies         := False;
!       Validity_Check_Default        := False;
        Validity_Check_Floating_Point := False;
        Validity_Check_In_Out_Params  := False;
        Validity_Check_In_Params      := False;
        Validity_Check_Operands       := False;
+       Validity_Check_Parameters     := False;
        Validity_Check_Returns        := False;
        Validity_Check_Subscripts     := False;
        Validity_Check_Tests          := False;
*************** package body Validsw is
*** 73,86 ****
           Options (K) := ' ';
        end loop;
  
-       Add ('n', not Validity_Check_Default);
- 
-       Add ('c', Validity_Check_Copies);
        Add ('e', Validity_Check_Components);
        Add ('f', Validity_Check_Floating_Point);
        Add ('i', Validity_Check_In_Params);
        Add ('m', Validity_Check_In_Out_Params);
        Add ('o', Validity_Check_Operands);
        Add ('r', Validity_Check_Returns);
        Add ('s', Validity_Check_Subscripts);
        Add ('t', Validity_Check_Tests);
--- 74,87 ----
           Options (K) := ' ';
        end loop;
  
        Add ('e', Validity_Check_Components);
+       Add ('c', Validity_Check_Copies);
+       Add ('d', Validity_Check_Default);
        Add ('f', Validity_Check_Floating_Point);
        Add ('i', Validity_Check_In_Params);
        Add ('m', Validity_Check_In_Out_Params);
        Add ('o', Validity_Check_Operands);
+       Add ('p', Validity_Check_Parameters);
        Add ('r', Validity_Check_Returns);
        Add ('s', Validity_Check_Subscripts);
        Add ('t', Validity_Check_Tests);
diff -Nrcpad gcc-9.3.0/gcc/ada/validsw.ads gcc-10.1.0/gcc/ada/validsw.ads
*** gcc-9.3.0/gcc/ada/validsw.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/validsw.ads	Thu May  7 10:49:59 2020
*************** package Validsw is
*** 40,72 ****
     --  or in the argument of a Validity_Checks pragma to activate the option.
     --  The corresponding upper case letter deactivates the option.
  
     Validity_Check_Copies : Boolean := False;
     --  Controls the validity checking of copies. If this switch is set to
!    --  true using -gnatVc, or a 'c' in the argument of a Validity_Checks
!    --  pragma, then the right side of assignments and also initializing
     --  expressions in object declarations are checked for validity.
  
-    Validity_Check_Components : Boolean := False;
-    --  Controls validity checking for assignment to elementary components of
-    --  records. If this switch is set true using -gnatVe, or an 'e' in the
-    --  argument of Validity_Checks pragma, then the right hand of an assignment
-    --  to such a component is checked for validity.
- 
     Validity_Check_Default : Boolean := True;
     --  Controls default (reference manual) validity checking. If this switch is
     --  set to True using -gnatVd or a 'd' in the argument of a Validity_Checks
!    --  pragma (or the initial default value is used, set True), then left side
!    --  subscripts and case statement arguments are checked for validity. This
!    --  switch is also set by default if no -gnatV switch is used and no
     --  Validity_Checks pragma is processed.
  
     Validity_Check_Floating_Point : Boolean := False;
!    --  Normally validity checking applies only to discrete values (integer
!    --  and enumeration types). If this switch is set to True using -gnatVf
!    --  or an 'f' in the argument of a Validity_Checks pragma, then floating-
!    --  point values are also checked. The context in which such checks
!    --  occur depends on other flags, e.g. if Validity_Check_Copies is also
!    --  set then floating-point values on the right side of an assignment
     --  will be validity checked.
  
     Validity_Check_In_Out_Params : Boolean := False;
--- 40,72 ----
     --  or in the argument of a Validity_Checks pragma to activate the option.
     --  The corresponding upper case letter deactivates the option.
  
+    Validity_Check_Components : Boolean := False;
+    --  Controls validity checking for assignment to elementary components of
+    --  records. If this switch is set to True using -gnatVe, or an 'e' in the
+    --  argument of Validity_Checks pragma, then the right-hand side of an
+    --  assignment to such a component is checked for validity.
+ 
     Validity_Check_Copies : Boolean := False;
     --  Controls the validity checking of copies. If this switch is set to
!    --  True using -gnatVc, or a 'c' in the argument of a Validity_Checks
!    --  pragma, then the right-hand side of assignments and also initializing
     --  expressions in object declarations are checked for validity.
  
     Validity_Check_Default : Boolean := True;
     --  Controls default (reference manual) validity checking. If this switch is
     --  set to True using -gnatVd or a 'd' in the argument of a Validity_Checks
!    --  pragma (or the initial default value is used, set True), then left-hand
!    --  side subscripts and case statement arguments are checked for validity.
!    --  This switch is also set by default if no -gnatV switch is used and no
     --  Validity_Checks pragma is processed.
  
     Validity_Check_Floating_Point : Boolean := False;
!    --  Normally validity checking applies only to discrete values (integer and
!    --  enumeration types). If this switch is set to True using -gnatVf or an
!    --  'f' in the argument of a Validity_Checks pragma, then floating-point
!    --  values are also checked. If the context in which such checks occur
!    --  depends on other flags, e.g. if Validity_Check_Copies is also set,
!    --  then floating-point values on the right-hand side of an assignment
     --  will be validity checked.
  
     Validity_Check_In_Out_Params : Boolean := False;
*************** package Validsw is
*** 103,115 ****
     --  pragma, then the expression in a RETURN statement is validity checked.
  
     Validity_Check_Subscripts : Boolean := False;
!    --  Controls validity checking of subscripts. If this switch is set to
!    --  True using -gnatVs, or an 's' in the argument of a Validity_Checks
!    --  pragma, then all subscripts are checked for validity. Note that left
!    --  side subscript checking is controlled also by Validity_Check_Default.
!    --  If Validity_Check_Subscripts is True, then all subscripts are checked,
!    --  otherwise if Validity_Check_Default is True, then left side subscripts
!    --  are checked, otherwise no subscripts are checked.
  
     Validity_Check_Tests : Boolean := False;
     --  Controls validity checking of tests that occur in conditions (i.e. the
--- 103,115 ----
     --  pragma, then the expression in a RETURN statement is validity checked.
  
     Validity_Check_Subscripts : Boolean := False;
!    --  Controls validity checking of subscripts. If this switch is set to True
!    --  using -gnatVs, or an 's' in the argument of a Validity_Checks pragma,
!    --  then all subscripts are checked for validity. Note that left-hand side
!    --  subscript checking is also controlled by Validity_Check_Default. If
!    --  Validity_Check_Subscripts is True, then all subscripts are checked,
!    --  otherwise if Validity_Check_Default is True, then left-hand side
!    --  subscripts are checked; otherwise no subscripts are checked.
  
     Validity_Check_Tests : Boolean := False;
     --  Controls validity checking of tests that occur in conditions (i.e. the
diff -Nrcpad gcc-9.3.0/gcc/ada/warnsw.adb gcc-10.1.0/gcc/ada/warnsw.adb
*** gcc-9.3.0/gcc/ada/warnsw.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/warnsw.adb	Thu May  7 10:49:59 2020
*************** package body Warnsw is
*** 43,94 ****
  
     procedure All_Warnings (Setting : Boolean) is
     begin
!       Address_Clause_Overlay_Warnings     := Setting;
!       Check_Unreferenced                  := Setting;
!       Check_Unreferenced_Formals          := Setting;
!       Check_Withs                         := Setting;
!       Constant_Condition_Warnings         := Setting;
!       Elab_Warnings                       := Setting;
!       Implementation_Unit_Warnings        := Setting;
!       Ineffective_Inline_Warnings         := Setting;
!       List_Body_Required_Info             := Setting;
!       List_Inherited_Aspects              := Setting;
!       Warn_On_Ada_2005_Compatibility      := Setting;
!       Warn_On_Ada_2012_Compatibility      := Setting;
!       Warn_On_All_Unread_Out_Parameters   := Setting;
!       Warn_On_Assertion_Failure           := Setting;
!       Warn_On_Assumed_Low_Bound           := Setting;
!       Warn_On_Atomic_Synchronization      := Setting;
!       Warn_On_Bad_Fixed_Value             := Setting;
!       Warn_On_Biased_Representation       := Setting;
!       Warn_On_Constant                    := Setting;
!       Warn_On_Deleted_Code                := Setting;
!       Warn_On_Dereference                 := Setting;
!       Warn_On_Export_Import               := Setting;
!       Warn_On_Hiding                      := Setting;
!       Warn_On_Late_Primitives             := Setting;
!       Warn_On_Modified_Unread             := Setting;
!       Warn_On_No_Value_Assigned           := Setting;
!       Warn_On_Non_Local_Exception         := Setting;
!       Warn_On_Object_Renames_Function     := Setting;
!       Warn_On_Obsolescent_Feature         := Setting;
!       Warn_On_Overlap                     := Setting;
!       Warn_On_Overridden_Size             := Setting;
!       Warn_On_Parameter_Order             := Setting;
!       Warn_On_Questionable_Layout         := Setting;
!       Warn_On_Questionable_Missing_Parens := Setting;
!       Warn_On_Record_Holes                := Setting;
!       Warn_On_Redundant_Constructs        := Setting;
!       Warn_On_Reverse_Bit_Order           := Setting;
!       Warn_On_Size_Alignment              := Setting;
!       Warn_On_Standard_Redefinition       := Setting;
!       Warn_On_Suspicious_Contract         := Setting;
!       Warn_On_Suspicious_Modulus_Value    := Setting;
!       Warn_On_Unchecked_Conversion        := Setting;
!       Warn_On_Unordered_Enumeration_Type  := Setting;
!       Warn_On_Unrecognized_Pragma         := Setting;
!       Warn_On_Unrepped_Components         := Setting;
!       Warn_On_Warnings_Off                := Setting;
     end All_Warnings;
  
     ----------------------
--- 43,97 ----
  
     procedure All_Warnings (Setting : Boolean) is
     begin
!       Address_Clause_Overlay_Warnings      := Setting;
!       Check_Unreferenced                   := Setting;
!       Check_Unreferenced_Formals           := Setting;
!       Check_Withs                          := Setting;
!       Constant_Condition_Warnings          := Setting;
!       Elab_Warnings                        := Setting;
!       Implementation_Unit_Warnings         := Setting;
!       Ineffective_Inline_Warnings          := Setting;
!       List_Body_Required_Info              := Setting;
!       List_Inherited_Aspects               := Setting;
!       Warn_On_Ada_2005_Compatibility       := Setting;
!       Warn_On_Ada_2012_Compatibility       := Setting;
!       Warn_On_All_Unread_Out_Parameters    := Setting;
!       Warn_On_Anonymous_Allocators         := Setting;
!       Warn_On_Assertion_Failure            := Setting;
!       Warn_On_Assumed_Low_Bound            := Setting;
!       Warn_On_Atomic_Synchronization       := Setting;
!       Warn_On_Bad_Fixed_Value              := Setting;
!       Warn_On_Biased_Representation        := Setting;
!       Warn_On_Constant                     := Setting;
!       Warn_On_Deleted_Code                 := Setting;
!       Warn_On_Dereference                  := Setting;
!       Warn_On_Export_Import                := Setting;
!       Warn_On_Hiding                       := Setting;
!       Warn_On_Late_Primitives              := Setting;
!       Warn_On_Modified_Unread              := Setting;
!       Warn_On_No_Value_Assigned            := Setting;
!       Warn_On_Non_Local_Exception          := Setting;
!       Warn_On_Object_Renames_Function      := Setting;
!       Warn_On_Obsolescent_Feature          := Setting;
!       Warn_On_Overlap                      := Setting;
!       Warn_On_Overridden_Size              := Setting;
!       Warn_On_Parameter_Order              := Setting;
!       Warn_On_Questionable_Layout          := Setting;
!       Warn_On_Questionable_Missing_Parens  := Setting;
!       Warn_On_Record_Holes                 := Setting;
!       Warn_On_Component_Order              := Setting;
!       Warn_On_Redundant_Constructs         := Setting;
!       Warn_On_Reverse_Bit_Order            := Setting;
!       Warn_On_Size_Alignment               := Setting;
!       Warn_On_Standard_Redefinition        := Setting;
!       Warn_On_Suspicious_Contract          := Setting;
!       Warn_On_Suspicious_Modulus_Value     := Setting;
!       Warn_On_Unchecked_Conversion         := Setting;
!       Warn_On_Unknown_Compile_Time_Warning := Setting;
!       Warn_On_Unordered_Enumeration_Type   := Setting;
!       Warn_On_Unrecognized_Pragma          := Setting;
!       Warn_On_Unrepped_Components          := Setting;
!       Warn_On_Warnings_Off                 := Setting;
     end All_Warnings;
  
     ----------------------
*************** package body Warnsw is
*** 97,197 ****
  
     procedure Restore_Warnings (W : Warning_Record) is
     begin
!       Address_Clause_Overlay_Warnings     :=
          W.Address_Clause_Overlay_Warnings;
!       Check_Unreferenced                  :=
          W.Check_Unreferenced;
!       Check_Unreferenced_Formals          :=
          W.Check_Unreferenced_Formals;
!       Check_Withs                         :=
          W.Check_Withs;
!       Constant_Condition_Warnings         :=
          W.Constant_Condition_Warnings;
!       Elab_Warnings                       :=
          W.Elab_Warnings;
!       Elab_Info_Messages                  :=
          W.Elab_Info_Messages;
!       Implementation_Unit_Warnings        :=
          W.Implementation_Unit_Warnings;
!       Ineffective_Inline_Warnings         :=
          W.Ineffective_Inline_Warnings;
!       List_Body_Required_Info             :=
          W.List_Body_Required_Info;
!       List_Inherited_Aspects              :=
          W.List_Inherited_Aspects;
!       No_Warn_On_Non_Local_Exception      :=
          W.No_Warn_On_Non_Local_Exception;
!       Warning_Doc_Switch                  :=
          W.Warning_Doc_Switch;
!       Warn_On_Ada_2005_Compatibility      :=
          W.Warn_On_Ada_2005_Compatibility;
!       Warn_On_Ada_2012_Compatibility      :=
          W.Warn_On_Ada_2012_Compatibility;
!       Warn_On_All_Unread_Out_Parameters   :=
          W.Warn_On_All_Unread_Out_Parameters;
!       Warn_On_Assertion_Failure           :=
          W.Warn_On_Assertion_Failure;
!       Warn_On_Assumed_Low_Bound           :=
          W.Warn_On_Assumed_Low_Bound;
!       Warn_On_Atomic_Synchronization      :=
          W.Warn_On_Atomic_Synchronization;
!       Warn_On_Bad_Fixed_Value             :=
          W.Warn_On_Bad_Fixed_Value;
!       Warn_On_Biased_Representation       :=
          W.Warn_On_Biased_Representation;
!       Warn_On_Constant                    :=
          W.Warn_On_Constant;
!       Warn_On_Deleted_Code                :=
          W.Warn_On_Deleted_Code;
!       Warn_On_Dereference                 :=
          W.Warn_On_Dereference;
!       Warn_On_Export_Import               :=
          W.Warn_On_Export_Import;
!       Warn_On_Hiding                      :=
          W.Warn_On_Hiding;
!       Warn_On_Late_Primitives             :=
          W.Warn_On_Late_Primitives;
!       Warn_On_Modified_Unread             :=
          W.Warn_On_Modified_Unread;
!       Warn_On_No_Value_Assigned           :=
          W.Warn_On_No_Value_Assigned;
!       Warn_On_Non_Local_Exception         :=
          W.Warn_On_Non_Local_Exception;
!       Warn_On_Object_Renames_Function     :=
          W.Warn_On_Object_Renames_Function;
!       Warn_On_Obsolescent_Feature         :=
          W.Warn_On_Obsolescent_Feature;
!       Warn_On_Overlap                     :=
          W.Warn_On_Overlap;
!       Warn_On_Overridden_Size             :=
          W.Warn_On_Overridden_Size;
!       Warn_On_Parameter_Order             :=
          W.Warn_On_Parameter_Order;
!       Warn_On_Questionable_Layout         :=
          W.Warn_On_Questionable_Layout;
!       Warn_On_Questionable_Missing_Parens :=
          W.Warn_On_Questionable_Missing_Parens;
!       Warn_On_Record_Holes                :=
          W.Warn_On_Record_Holes;
!       Warn_On_Redundant_Constructs        :=
          W.Warn_On_Redundant_Constructs;
!       Warn_On_Reverse_Bit_Order           :=
          W.Warn_On_Reverse_Bit_Order;
!       Warn_On_Size_Alignment              :=
          W.Warn_On_Size_Alignment;
!       Warn_On_Standard_Redefinition       :=
          W.Warn_On_Standard_Redefinition;
!       Warn_On_Suspicious_Contract         :=
          W.Warn_On_Suspicious_Contract;
!       Warn_On_Unchecked_Conversion        :=
          W.Warn_On_Unchecked_Conversion;
!       Warn_On_Unordered_Enumeration_Type  :=
          W.Warn_On_Unordered_Enumeration_Type;
!       Warn_On_Unrecognized_Pragma         :=
          W.Warn_On_Unrecognized_Pragma;
!       Warn_On_Unrepped_Components         :=
          W.Warn_On_Unrepped_Components;
!       Warn_On_Warnings_Off                :=
          W.Warn_On_Warnings_Off;
     end Restore_Warnings;
  
--- 100,206 ----
  
     procedure Restore_Warnings (W : Warning_Record) is
     begin
!       Address_Clause_Overlay_Warnings      :=
          W.Address_Clause_Overlay_Warnings;
!       Check_Unreferenced                   :=
          W.Check_Unreferenced;
!       Check_Unreferenced_Formals           :=
          W.Check_Unreferenced_Formals;
!       Check_Withs                          :=
          W.Check_Withs;
!       Constant_Condition_Warnings          :=
          W.Constant_Condition_Warnings;
!       Elab_Warnings                        :=
          W.Elab_Warnings;
!       Elab_Info_Messages                   :=
          W.Elab_Info_Messages;
!       Implementation_Unit_Warnings         :=
          W.Implementation_Unit_Warnings;
!       Ineffective_Inline_Warnings          :=
          W.Ineffective_Inline_Warnings;
!       List_Body_Required_Info              :=
          W.List_Body_Required_Info;
!       List_Inherited_Aspects               :=
          W.List_Inherited_Aspects;
!       No_Warn_On_Non_Local_Exception       :=
          W.No_Warn_On_Non_Local_Exception;
!       Warning_Doc_Switch                   :=
          W.Warning_Doc_Switch;
!       Warn_On_Ada_2005_Compatibility       :=
          W.Warn_On_Ada_2005_Compatibility;
!       Warn_On_Ada_2012_Compatibility       :=
          W.Warn_On_Ada_2012_Compatibility;
!       Warn_On_All_Unread_Out_Parameters    :=
          W.Warn_On_All_Unread_Out_Parameters;
!       Warn_On_Anonymous_Allocators         :=
!         W.Warn_On_Anonymous_Allocators;
!       Warn_On_Assertion_Failure            :=
          W.Warn_On_Assertion_Failure;
!       Warn_On_Assumed_Low_Bound            :=
          W.Warn_On_Assumed_Low_Bound;
!       Warn_On_Atomic_Synchronization       :=
          W.Warn_On_Atomic_Synchronization;
!       Warn_On_Bad_Fixed_Value              :=
          W.Warn_On_Bad_Fixed_Value;
!       Warn_On_Biased_Representation        :=
          W.Warn_On_Biased_Representation;
!       Warn_On_Constant                     :=
          W.Warn_On_Constant;
!       Warn_On_Deleted_Code                 :=
          W.Warn_On_Deleted_Code;
!       Warn_On_Dereference                  :=
          W.Warn_On_Dereference;
!       Warn_On_Export_Import                :=
          W.Warn_On_Export_Import;
!       Warn_On_Hiding                       :=
          W.Warn_On_Hiding;
!       Warn_On_Late_Primitives              :=
          W.Warn_On_Late_Primitives;
!       Warn_On_Modified_Unread              :=
          W.Warn_On_Modified_Unread;
!       Warn_On_No_Value_Assigned            :=
          W.Warn_On_No_Value_Assigned;
!       Warn_On_Non_Local_Exception          :=
          W.Warn_On_Non_Local_Exception;
!       Warn_On_Object_Renames_Function      :=
          W.Warn_On_Object_Renames_Function;
!       Warn_On_Obsolescent_Feature          :=
          W.Warn_On_Obsolescent_Feature;
!       Warn_On_Overlap                      :=
          W.Warn_On_Overlap;
!       Warn_On_Overridden_Size              :=
          W.Warn_On_Overridden_Size;
!       Warn_On_Parameter_Order              :=
          W.Warn_On_Parameter_Order;
!       Warn_On_Questionable_Layout          :=
          W.Warn_On_Questionable_Layout;
!       Warn_On_Questionable_Missing_Parens  :=
          W.Warn_On_Questionable_Missing_Parens;
!       Warn_On_Record_Holes                 :=
          W.Warn_On_Record_Holes;
!       Warn_On_Component_Order              :=
!         W.Warn_On_Component_Order;
!       Warn_On_Redundant_Constructs         :=
          W.Warn_On_Redundant_Constructs;
!       Warn_On_Reverse_Bit_Order            :=
          W.Warn_On_Reverse_Bit_Order;
!       Warn_On_Size_Alignment               :=
          W.Warn_On_Size_Alignment;
!       Warn_On_Standard_Redefinition        :=
          W.Warn_On_Standard_Redefinition;
!       Warn_On_Suspicious_Contract          :=
          W.Warn_On_Suspicious_Contract;
!       Warn_On_Unchecked_Conversion         :=
          W.Warn_On_Unchecked_Conversion;
!       Warn_On_Unknown_Compile_Time_Warning :=
!         W.Warn_On_Unknown_Compile_Time_Warning;
!       Warn_On_Unordered_Enumeration_Type   :=
          W.Warn_On_Unordered_Enumeration_Type;
!       Warn_On_Unrecognized_Pragma          :=
          W.Warn_On_Unrecognized_Pragma;
!       Warn_On_Unrepped_Components          :=
          W.Warn_On_Unrepped_Components;
!       Warn_On_Warnings_Off                 :=
          W.Warn_On_Warnings_Off;
     end Restore_Warnings;
  
*************** package body Warnsw is
*** 203,303 ****
        W : Warning_Record;
  
     begin
!       W.Address_Clause_Overlay_Warnings     :=
          Address_Clause_Overlay_Warnings;
!       W.Check_Unreferenced                  :=
          Check_Unreferenced;
!       W.Check_Unreferenced_Formals          :=
          Check_Unreferenced_Formals;
!       W.Check_Withs                         :=
          Check_Withs;
!       W.Constant_Condition_Warnings         :=
          Constant_Condition_Warnings;
!       W.Elab_Info_Messages                  :=
          Elab_Info_Messages;
!       W.Elab_Warnings                       :=
          Elab_Warnings;
!       W.Implementation_Unit_Warnings        :=
          Implementation_Unit_Warnings;
!       W.Ineffective_Inline_Warnings         :=
          Ineffective_Inline_Warnings;
!       W.List_Body_Required_Info             :=
          List_Body_Required_Info;
!       W.List_Inherited_Aspects              :=
          List_Inherited_Aspects;
!       W.No_Warn_On_Non_Local_Exception      :=
          No_Warn_On_Non_Local_Exception;
!       W.Warning_Doc_Switch                  :=
          Warning_Doc_Switch;
!       W.Warn_On_Ada_2005_Compatibility      :=
          Warn_On_Ada_2005_Compatibility;
!       W.Warn_On_Ada_2012_Compatibility      :=
          Warn_On_Ada_2012_Compatibility;
!       W.Warn_On_All_Unread_Out_Parameters   :=
          Warn_On_All_Unread_Out_Parameters;
!       W.Warn_On_Assertion_Failure           :=
          Warn_On_Assertion_Failure;
!       W.Warn_On_Assumed_Low_Bound           :=
          Warn_On_Assumed_Low_Bound;
!       W.Warn_On_Atomic_Synchronization      :=
          Warn_On_Atomic_Synchronization;
!       W.Warn_On_Bad_Fixed_Value             :=
          Warn_On_Bad_Fixed_Value;
!       W.Warn_On_Biased_Representation       :=
          Warn_On_Biased_Representation;
!       W.Warn_On_Constant                    :=
          Warn_On_Constant;
!       W.Warn_On_Deleted_Code                :=
          Warn_On_Deleted_Code;
!       W.Warn_On_Dereference                 :=
          Warn_On_Dereference;
!       W.Warn_On_Export_Import               :=
          Warn_On_Export_Import;
!       W.Warn_On_Hiding                      :=
          Warn_On_Hiding;
!       W.Warn_On_Late_Primitives             :=
          Warn_On_Late_Primitives;
!       W.Warn_On_Modified_Unread             :=
          Warn_On_Modified_Unread;
!       W.Warn_On_No_Value_Assigned           :=
          Warn_On_No_Value_Assigned;
!       W.Warn_On_Non_Local_Exception         :=
          Warn_On_Non_Local_Exception;
!       W.Warn_On_Object_Renames_Function     :=
          Warn_On_Object_Renames_Function;
!       W.Warn_On_Obsolescent_Feature         :=
          Warn_On_Obsolescent_Feature;
!       W.Warn_On_Overlap                     :=
          Warn_On_Overlap;
!       W.Warn_On_Overridden_Size             :=
          Warn_On_Overridden_Size;
!       W.Warn_On_Parameter_Order             :=
          Warn_On_Parameter_Order;
!       W.Warn_On_Questionable_Layout         :=
          Warn_On_Questionable_Layout;
!       W.Warn_On_Questionable_Missing_Parens :=
          Warn_On_Questionable_Missing_Parens;
!       W.Warn_On_Record_Holes                :=
          Warn_On_Record_Holes;
!       W.Warn_On_Redundant_Constructs        :=
          Warn_On_Redundant_Constructs;
!       W.Warn_On_Reverse_Bit_Order           :=
          Warn_On_Reverse_Bit_Order;
!       W.Warn_On_Size_Alignment              :=
          Warn_On_Size_Alignment;
!       W.Warn_On_Standard_Redefinition       :=
          Warn_On_Standard_Redefinition;
!       W.Warn_On_Suspicious_Contract         :=
          Warn_On_Suspicious_Contract;
!       W.Warn_On_Unchecked_Conversion        :=
          Warn_On_Unchecked_Conversion;
!       W.Warn_On_Unordered_Enumeration_Type  :=
          Warn_On_Unordered_Enumeration_Type;
!       W.Warn_On_Unrecognized_Pragma         :=
          Warn_On_Unrecognized_Pragma;
!       W.Warn_On_Unrepped_Components         :=
          Warn_On_Unrepped_Components;
!       W.Warn_On_Warnings_Off                :=
          Warn_On_Warnings_Off;
        return W;
     end Save_Warnings;
--- 212,318 ----
        W : Warning_Record;
  
     begin
!       W.Address_Clause_Overlay_Warnings      :=
          Address_Clause_Overlay_Warnings;
!       W.Check_Unreferenced                   :=
          Check_Unreferenced;
!       W.Check_Unreferenced_Formals           :=
          Check_Unreferenced_Formals;
!       W.Check_Withs                          :=
          Check_Withs;
!       W.Constant_Condition_Warnings          :=
          Constant_Condition_Warnings;
!       W.Elab_Info_Messages                   :=
          Elab_Info_Messages;
!       W.Elab_Warnings                        :=
          Elab_Warnings;
!       W.Implementation_Unit_Warnings         :=
          Implementation_Unit_Warnings;
!       W.Ineffective_Inline_Warnings          :=
          Ineffective_Inline_Warnings;
!       W.List_Body_Required_Info              :=
          List_Body_Required_Info;
!       W.List_Inherited_Aspects               :=
          List_Inherited_Aspects;
!       W.No_Warn_On_Non_Local_Exception       :=
          No_Warn_On_Non_Local_Exception;
!       W.Warning_Doc_Switch                   :=
          Warning_Doc_Switch;
!       W.Warn_On_Ada_2005_Compatibility       :=
          Warn_On_Ada_2005_Compatibility;
!       W.Warn_On_Ada_2012_Compatibility       :=
          Warn_On_Ada_2012_Compatibility;
!       W.Warn_On_All_Unread_Out_Parameters    :=
          Warn_On_All_Unread_Out_Parameters;
!       W.Warn_On_Anonymous_Allocators         :=
!         Warn_On_Anonymous_Allocators;
!       W.Warn_On_Assertion_Failure            :=
          Warn_On_Assertion_Failure;
!       W.Warn_On_Assumed_Low_Bound            :=
          Warn_On_Assumed_Low_Bound;
!       W.Warn_On_Atomic_Synchronization       :=
          Warn_On_Atomic_Synchronization;
!       W.Warn_On_Bad_Fixed_Value              :=
          Warn_On_Bad_Fixed_Value;
!       W.Warn_On_Biased_Representation        :=
          Warn_On_Biased_Representation;
!       W.Warn_On_Constant                     :=
          Warn_On_Constant;
!       W.Warn_On_Deleted_Code                 :=
          Warn_On_Deleted_Code;
!       W.Warn_On_Dereference                  :=
          Warn_On_Dereference;
!       W.Warn_On_Export_Import                :=
          Warn_On_Export_Import;
!       W.Warn_On_Hiding                       :=
          Warn_On_Hiding;
!       W.Warn_On_Late_Primitives              :=
          Warn_On_Late_Primitives;
!       W.Warn_On_Modified_Unread              :=
          Warn_On_Modified_Unread;
!       W.Warn_On_No_Value_Assigned            :=
          Warn_On_No_Value_Assigned;
!       W.Warn_On_Non_Local_Exception          :=
          Warn_On_Non_Local_Exception;
!       W.Warn_On_Object_Renames_Function      :=
          Warn_On_Object_Renames_Function;
!       W.Warn_On_Obsolescent_Feature          :=
          Warn_On_Obsolescent_Feature;
!       W.Warn_On_Overlap                      :=
          Warn_On_Overlap;
!       W.Warn_On_Overridden_Size              :=
          Warn_On_Overridden_Size;
!       W.Warn_On_Parameter_Order              :=
          Warn_On_Parameter_Order;
!       W.Warn_On_Questionable_Layout          :=
          Warn_On_Questionable_Layout;
!       W.Warn_On_Questionable_Missing_Parens  :=
          Warn_On_Questionable_Missing_Parens;
!       W.Warn_On_Record_Holes                 :=
          Warn_On_Record_Holes;
!       W.Warn_On_Component_Order              :=
!         Warn_On_Component_Order;
!       W.Warn_On_Redundant_Constructs         :=
          Warn_On_Redundant_Constructs;
!       W.Warn_On_Reverse_Bit_Order            :=
          Warn_On_Reverse_Bit_Order;
!       W.Warn_On_Size_Alignment               :=
          Warn_On_Size_Alignment;
!       W.Warn_On_Standard_Redefinition        :=
          Warn_On_Standard_Redefinition;
!       W.Warn_On_Suspicious_Contract          :=
          Warn_On_Suspicious_Contract;
!       W.Warn_On_Unchecked_Conversion         :=
          Warn_On_Unchecked_Conversion;
!       W.Warn_On_Unknown_Compile_Time_Warning :=
!         Warn_On_Unknown_Compile_Time_Warning;
!       W.Warn_On_Unordered_Enumeration_Type   :=
          Warn_On_Unordered_Enumeration_Type;
!       W.Warn_On_Unrecognized_Pragma          :=
          Warn_On_Unrecognized_Pragma;
!       W.Warn_On_Unrepped_Components          :=
          Warn_On_Unrepped_Components;
!       W.Warn_On_Warnings_Off                 :=
          Warn_On_Warnings_Off;
        return W;
     end Save_Warnings;
*************** package body Warnsw is
*** 478,483 ****
--- 493,516 ----
     function Set_Underscore_Warning_Switch (C : Character) return Boolean is
     begin
        case C is
+          when 'a' =>
+             Warn_On_Anonymous_Allocators := True;
+ 
+          when 'A' =>
+             Warn_On_Anonymous_Allocators := False;
+ 
+          when 'c' =>
+             Warn_On_Unknown_Compile_Time_Warning := True;
+ 
+          when 'C' =>
+             Warn_On_Unknown_Compile_Time_Warning := False;
+ 
+          when 'r' =>
+             Warn_On_Component_Order := True;
+ 
+          when 'R' =>
+             Warn_On_Component_Order := False;
+ 
           when others =>
              if Ignore_Unrecognized_VWY_Switches then
                 Write_Line ("unrecognized switch -gnatw_" & C & " ignored");
*************** package body Warnsw is
*** 705,710 ****
--- 738,744 ----
        Ineffective_Inline_Warnings         := True; -- -gnatwp
        Warn_On_Ada_2005_Compatibility      := True; -- -gnatwy
        Warn_On_Ada_2012_Compatibility      := True; -- -gnatwy
+       Warn_On_Anonymous_Allocators        := True; -- -gnatw_a
        Warn_On_Assertion_Failure           := True; -- -gnatw.a
        Warn_On_Assumed_Low_Bound           := True; -- -gnatww
        Warn_On_Bad_Fixed_Value             := True; -- -gnatwb
diff -Nrcpad gcc-9.3.0/gcc/ada/warnsw.ads gcc-10.1.0/gcc/ada/warnsw.ads
*** gcc-9.3.0/gcc/ada/warnsw.ads	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/warnsw.ads	Thu May  7 10:49:59 2020
*************** package Warnsw is
*** 38,47 ****
--- 38,57 ----
     --  here as time goes by. And in fact a really nice idea would be to put
     --  them all in a Warn_Record so that they would be easy to save/restore.
  
+    Warn_On_Anonymous_Allocators : Boolean := False;
+    --  Warn when allocators for anonymous access types are present, which,
+    --  although not illegal in Ada, may be confusing to users due to how
+    --  accessibility checks get generated. Off by default, modified by use
+    --  of -gnatw_a/_A and set as part of -gnatwa.
+ 
     Warn_On_Late_Primitives : Boolean := False;
     --  Warn when tagged type public primitives are defined after its private
     --  extensions.
  
+    Warn_On_Unknown_Compile_Time_Warning : Boolean := True;
+    --  Warn on a pragma Compile_Time_Warning or Compile_Time_Error whose
+    --  condition has a value that is not known at compile time.
+ 
     Warn_On_Overridden_Size : Boolean := False;
     --  Warn when explicit record component clause or array component_size
     --  clause specifies a size that overrides a size for the type which was
*************** package Warnsw is
*** 53,62 ****
--- 63,80 ----
     --  efficiency reasons and would be improved by reordering the components.
     --  Off by default, modified by use of -gnatw.q/.Q (but not -gnatwa).
  
+    --  WARNING: There is a matching C declaration of this variable in fe.h
+ 
     Warn_On_Record_Holes : Boolean := False;
     --  Warn when explicit record component clauses leave uncovered holes (gaps)
     --  in a record layout. Off by default, set by -gnatw.h (but not -gnatwa).
  
+    Warn_On_Component_Order : Boolean := False;
+    --  Warn when record component clauses are out of order with respect to the
+    --  component declarations, or if the memory layout is out of order with
+    --  respect to component declarations and clauses.  Off by default, set by
+    --  -gnatw_r (but not -gnatwa).
+ 
     Warn_On_Size_Alignment : Boolean := True;
     --  Warn when explicit Size and Alignment clauses are given for a type, and
     --  the size is not a multiple of the alignment. Off by default, modified
*************** package Warnsw is
*** 74,128 ****
     --  Type used to save and restore warnings
  
     type Warning_Record is record
!       Address_Clause_Overlay_Warnings     : Boolean;
!       Check_Unreferenced                  : Boolean;
!       Check_Unreferenced_Formals          : Boolean;
!       Check_Withs                         : Boolean;
!       Constant_Condition_Warnings         : Boolean;
!       Elab_Info_Messages                  : Boolean;
!       Elab_Warnings                       : Boolean;
!       Implementation_Unit_Warnings        : Boolean;
!       Ineffective_Inline_Warnings         : Boolean;
!       List_Body_Required_Info             : Boolean;
!       List_Inherited_Aspects              : Boolean;
!       No_Warn_On_Non_Local_Exception      : Boolean;
!       Warning_Doc_Switch                  : Boolean;
!       Warn_On_Ada_2005_Compatibility      : Boolean;
!       Warn_On_Ada_2012_Compatibility      : Boolean;
!       Warn_On_All_Unread_Out_Parameters   : Boolean;
!       Warn_On_Assertion_Failure           : Boolean;
!       Warn_On_Assumed_Low_Bound           : Boolean;
!       Warn_On_Atomic_Synchronization      : Boolean;
!       Warn_On_Bad_Fixed_Value             : Boolean;
!       Warn_On_Biased_Representation       : Boolean;
!       Warn_On_Constant                    : Boolean;
!       Warn_On_Deleted_Code                : Boolean;
!       Warn_On_Dereference                 : Boolean;
!       Warn_On_Export_Import               : Boolean;
!       Warn_On_Hiding                      : Boolean;
!       Warn_On_Late_Primitives             : Boolean;
!       Warn_On_Modified_Unread             : Boolean;
!       Warn_On_No_Value_Assigned           : Boolean;
!       Warn_On_Non_Local_Exception         : Boolean;
!       Warn_On_Object_Renames_Function     : Boolean;
!       Warn_On_Obsolescent_Feature         : Boolean;
!       Warn_On_Overlap                     : Boolean;
!       Warn_On_Overridden_Size             : Boolean;
!       Warn_On_Parameter_Order             : Boolean;
!       Warn_On_Questionable_Layout         : Boolean;
!       Warn_On_Questionable_Missing_Parens : Boolean;
!       Warn_On_Record_Holes                : Boolean;
!       Warn_On_Redundant_Constructs        : Boolean;
!       Warn_On_Reverse_Bit_Order           : Boolean;
!       Warn_On_Size_Alignment              : Boolean;
!       Warn_On_Standard_Redefinition       : Boolean;
!       Warn_On_Suspicious_Contract         : Boolean;
!       Warn_On_Suspicious_Modulus_Value    : Boolean;
!       Warn_On_Unchecked_Conversion        : Boolean;
!       Warn_On_Unordered_Enumeration_Type  : Boolean;
!       Warn_On_Unrecognized_Pragma         : Boolean;
!       Warn_On_Unrepped_Components         : Boolean;
!       Warn_On_Warnings_Off                : Boolean;
     end record;
  
     function Save_Warnings return Warning_Record;
--- 92,149 ----
     --  Type used to save and restore warnings
  
     type Warning_Record is record
!       Address_Clause_Overlay_Warnings      : Boolean;
!       Check_Unreferenced                   : Boolean;
!       Check_Unreferenced_Formals           : Boolean;
!       Check_Withs                          : Boolean;
!       Constant_Condition_Warnings          : Boolean;
!       Elab_Info_Messages                   : Boolean;
!       Elab_Warnings                        : Boolean;
!       Implementation_Unit_Warnings         : Boolean;
!       Ineffective_Inline_Warnings          : Boolean;
!       List_Body_Required_Info              : Boolean;
!       List_Inherited_Aspects               : Boolean;
!       No_Warn_On_Non_Local_Exception       : Boolean;
!       Warning_Doc_Switch                   : Boolean;
!       Warn_On_Ada_2005_Compatibility       : Boolean;
!       Warn_On_Ada_2012_Compatibility       : Boolean;
!       Warn_On_All_Unread_Out_Parameters    : Boolean;
!       Warn_On_Anonymous_Allocators         : Boolean;
!       Warn_On_Assertion_Failure            : Boolean;
!       Warn_On_Assumed_Low_Bound            : Boolean;
!       Warn_On_Atomic_Synchronization       : Boolean;
!       Warn_On_Bad_Fixed_Value              : Boolean;
!       Warn_On_Biased_Representation        : Boolean;
!       Warn_On_Constant                     : Boolean;
!       Warn_On_Deleted_Code                 : Boolean;
!       Warn_On_Dereference                  : Boolean;
!       Warn_On_Export_Import                : Boolean;
!       Warn_On_Hiding                       : Boolean;
!       Warn_On_Late_Primitives              : Boolean;
!       Warn_On_Modified_Unread              : Boolean;
!       Warn_On_No_Value_Assigned            : Boolean;
!       Warn_On_Non_Local_Exception          : Boolean;
!       Warn_On_Object_Renames_Function      : Boolean;
!       Warn_On_Obsolescent_Feature          : Boolean;
!       Warn_On_Overlap                      : Boolean;
!       Warn_On_Overridden_Size              : Boolean;
!       Warn_On_Parameter_Order              : Boolean;
!       Warn_On_Questionable_Layout          : Boolean;
!       Warn_On_Questionable_Missing_Parens  : Boolean;
!       Warn_On_Record_Holes                 : Boolean;
!       Warn_On_Component_Order              : Boolean;
!       Warn_On_Redundant_Constructs         : Boolean;
!       Warn_On_Reverse_Bit_Order            : Boolean;
!       Warn_On_Size_Alignment               : Boolean;
!       Warn_On_Standard_Redefinition        : Boolean;
!       Warn_On_Suspicious_Contract          : Boolean;
!       Warn_On_Suspicious_Modulus_Value     : Boolean;
!       Warn_On_Unchecked_Conversion         : Boolean;
!       Warn_On_Unknown_Compile_Time_Warning : Boolean;
!       Warn_On_Unordered_Enumeration_Type   : Boolean;
!       Warn_On_Unrecognized_Pragma          : Boolean;
!       Warn_On_Unrepped_Components          : Boolean;
!       Warn_On_Warnings_Off                 : Boolean;
     end record;
  
     function Save_Warnings return Warning_Record;
diff -Nrcpad gcc-9.3.0/gcc/ada/xoscons.adb gcc-10.1.0/gcc/ada/xoscons.adb
*** gcc-9.3.0/gcc/ada/xoscons.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/xoscons.adb	Thu May  7 10:49:59 2020
*************** procedure XOSCons is
*** 229,236 ****
              case Lang is
                 when Lang_Ada =>
                    Put ("   subtype " & Info.Constant_Name.all
!                        & " is Interfaces.C."
!                        & Info.Text_Value.all & ";");
                 when Lang_C =>
                    Put ("#define " & Info.Constant_Name.all & " "
                         & Info.Text_Value.all);
--- 229,235 ----
              case Lang is
                 when Lang_Ada =>
                    Put ("   subtype " & Info.Constant_Name.all
!                        & " is " & Info.Text_Value.all & ";");
                 when Lang_C =>
                    Put ("#define " & Info.Constant_Name.all & " "
                         & Info.Text_Value.all);
diff -Nrcpad gcc-9.3.0/gcc/ada/xref_lib.adb gcc-10.1.0/gcc/ada/xref_lib.adb
*** gcc-9.3.0/gcc/ada/xref_lib.adb	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ada/xref_lib.adb	Thu May  7 10:49:59 2020
*************** package body Xref_Lib is
*** 723,728 ****
--- 723,730 ----
     is
     begin
        loop
+          pragma Assert (Source (Ptr) /= EOF);
+ 
           --  Skip to end of line
  
           while Source (Ptr) /= ASCII.CR and then Source (Ptr) /= ASCII.LF
*************** package body Xref_Lib is
*** 737,747 ****
              Ptr := Ptr + 1;
           end if;
  
!          --  Skip past CR/LF or LF/CR combination
  
!          if (Source (Ptr) = ASCII.CR or else Source (Ptr) = ASCII.LF)
!            and then Source (Ptr) /= Source (Ptr - 1)
!          then
              Ptr := Ptr + 1;
           end if;
  
--- 739,747 ----
              Ptr := Ptr + 1;
           end if;
  
!          --  Skip past CR/LF
  
!          if Source (Ptr - 1) = ASCII.CR and then Source (Ptr) = ASCII.LF then
              Ptr := Ptr + 1;
           end if;
  
*************** package body Xref_Lib is
*** 783,788 ****
--- 783,789 ----
        --  line and column in the dependent unit number Eun. For this we need
        --  to parse the ali file again because the parent entity is not in
        --  the declaration table if it did not match the search pattern.
+       --  If the symbol is not found, we return "???".
  
        procedure Skip_To_Matching_Closing_Bracket;
        --  When Ptr points to an opening square bracket, moves it to the
*************** package body Xref_Lib is
*** 803,808 ****
--- 804,813 ----
           --  Look for the X lines corresponding to unit Eun
  
           loop
+             if Ali (Ptr) = EOF then
+                return "???";
+             end if;
+ 
              if Ali (Ptr) = 'X' then
                 Ptr := Ptr + 1;
                 Parse_Number (Ali, Ptr, E_Eun);
*************** package body Xref_Lib is
*** 832,841 ****
              exit when Ali (Ptr) = EOF;
           end loop;
  
-          --  We were not able to find the symbol, this should not happen but
-          --  since we don't want to stop here we return a string of three
-          --  question marks as the symbol name.
- 
           return "???";
        end Get_Symbol_Name;
  
--- 837,842 ----
*************** package body Xref_Lib is
*** 1876,1882 ****
              end if;
  
           exception
!             when No_Xref_Information =>  null;
           end;
        end loop;
     end Search_Xref;
--- 1877,1883 ----
              end if;
  
           exception
!             when No_Xref_Information => null;
           end;
        end loop;
     end Search_Xref;
diff -Nrcpad gcc-9.3.0/gcc/addresses.h gcc-10.1.0/gcc/addresses.h
*** gcc-9.3.0/gcc/addresses.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/addresses.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Inline functions to test validity of reg classes for addressing modes.
!    Copyright (C) 2006-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Inline functions to test validity of reg classes for addressing modes.
!    Copyright (C) 2006-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/alias.c gcc-10.1.0/gcc/alias.c
*** gcc-9.3.0/gcc/alias.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/alias.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Alias analysis for GNU C
!    Copyright (C) 1997-2019 Free Software Foundation, Inc.
     Contributed by John Carr (jfc@mit.edu).
  
  This file is part of GCC.
--- 1,5 ----
  /* Alias analysis for GNU C
!    Copyright (C) 1997-2020 Free Software Foundation, Inc.
     Contributed by John Carr (jfc@mit.edu).
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 39,44 ****
--- 39,45 ----
  #include "cfganal.h"
  #include "rtl-iter.h"
  #include "cgraph.h"
+ #include "ipa-utils.h"
  
  /* The aliasing API provided here solves related but different problems:
  
*************** ao_ref_from_mem (ao_ref *ref, const_rtx
*** 307,324 ****
  	    && TREE_CODE (TMR_BASE (base)) == SSA_NAME)))
      return false;
  
-   /* If this is a reference based on a partitioned decl replace the
-      base with a MEM_REF of the pointer representative we
-      created during stack slot partitioning.  */
-   if (VAR_P (base)
-       && ! is_global_var (base)
-       && cfun->gimple_df->decls_to_pointers != NULL)
-     {
-       tree *namep = cfun->gimple_df->decls_to_pointers->get (base);
-       if (namep)
- 	ref->base = build_simple_mem_ref (*namep);
-     }
- 
    ref->ref_alias_set = MEM_ALIAS_SET (mem);
  
    /* If MEM_OFFSET or MEM_SIZE are unknown what we got from MEM_EXPR
--- 308,313 ----
*************** rtx_refs_may_alias_p (const_rtx x, const
*** 379,384 ****
--- 368,393 ----
  			     && MEM_ALIAS_SET (mem) != 0);
  }
  
+ /* Return true if the ref EARLIER behaves the same as LATER with respect
+    to TBAA for every memory reference that might follow LATER.  */
+ 
+ bool
+ refs_same_for_tbaa_p (tree earlier, tree later)
+ {
+   ao_ref earlier_ref, later_ref;
+   ao_ref_init (&earlier_ref, earlier);
+   ao_ref_init (&later_ref, later);
+   alias_set_type earlier_set = ao_ref_alias_set (&earlier_ref);
+   alias_set_type later_set = ao_ref_alias_set (&later_ref);
+   if (!(earlier_set == later_set
+ 	|| alias_set_subset_of (later_set, earlier_set)))
+     return false;
+   alias_set_type later_base_set = ao_ref_base_alias_set (&later_ref);
+   alias_set_type earlier_base_set = ao_ref_base_alias_set (&earlier_ref);
+   return (earlier_base_set == later_base_set
+ 	  || alias_set_subset_of (later_base_set, earlier_base_set));
+ }
+ 
  /* Returns a pointer to the alias set entry for ALIAS_SET, if there is
     such an entry, or NULL otherwise.  */
  
*************** objects_must_conflict_p (tree t1, tree t
*** 598,603 ****
--- 607,655 ----
    return alias_sets_must_conflict_p (set1, set2);
  }
  
+ /* Return true if T is an end of the access path which can be used
+    by type based alias oracle.  */
+ 
+ bool
+ ends_tbaa_access_path_p (const_tree t)
+ {
+   switch (TREE_CODE (t))
+     {
+     case COMPONENT_REF:
+       if (DECL_NONADDRESSABLE_P (TREE_OPERAND (t, 1)))
+ 	return true;
+       /* Permit type-punning when accessing a union, provided the access
+ 	 is directly through the union.  For example, this code does not
+ 	 permit taking the address of a union member and then storing
+ 	 through it.  Even the type-punning allowed here is a GCC
+ 	 extension, albeit a common and useful one; the C standard says
+ 	 that such accesses have implementation-defined behavior.  */
+       else if (TREE_CODE (TREE_TYPE (TREE_OPERAND (t, 0))) == UNION_TYPE)
+ 	return true;
+       break;
+ 
+     case ARRAY_REF:
+     case ARRAY_RANGE_REF:
+       if (TYPE_NONALIASED_COMPONENT (TREE_TYPE (TREE_OPERAND (t, 0))))
+ 	return true;
+       break;
+ 
+     case REALPART_EXPR:
+     case IMAGPART_EXPR:
+       break;
+ 
+     case BIT_FIELD_REF:
+     case VIEW_CONVERT_EXPR:
+       /* Bitfields and casts are never addressable.  */
+       return true;
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+   return false;
+ }
+ 
  /* Return the outermost parent of component present in the chain of
     component references handled by get_inner_reference in T with the
     following property:
*************** component_uses_parent_alias_set_from (co
*** 612,651 ****
  
    while (handled_component_p (t))
      {
!       switch (TREE_CODE (t))
! 	{
! 	case COMPONENT_REF:
! 	  if (DECL_NONADDRESSABLE_P (TREE_OPERAND (t, 1)))
! 	    found = t;
! 	  /* Permit type-punning when accessing a union, provided the access
! 	     is directly through the union.  For example, this code does not
! 	     permit taking the address of a union member and then storing
! 	     through it.  Even the type-punning allowed here is a GCC
! 	     extension, albeit a common and useful one; the C standard says
! 	     that such accesses have implementation-defined behavior.  */
! 	  else if (TREE_CODE (TREE_TYPE (TREE_OPERAND (t, 0))) == UNION_TYPE)
! 	    found = t;
! 	  break;
! 
! 	case ARRAY_REF:
! 	case ARRAY_RANGE_REF:
! 	  if (TYPE_NONALIASED_COMPONENT (TREE_TYPE (TREE_OPERAND (t, 0))))
! 	    found = t;
! 	  break;
! 
! 	case REALPART_EXPR:
! 	case IMAGPART_EXPR:
! 	  break;
! 
! 	case BIT_FIELD_REF:
! 	case VIEW_CONVERT_EXPR:
! 	  /* Bitfields and casts are never addressable.  */
! 	  found = t;
! 	  break;
! 
! 	default:
! 	  gcc_unreachable ();
! 	}
  
        t = TREE_OPERAND (t, 0);
      }
--- 664,671 ----
  
    while (handled_component_p (t))
      {
!       if (ends_tbaa_access_path_p (t))
! 	found = t;
  
        t = TREE_OPERAND (t, 0);
      }
*************** alias_ptr_types_compatible_p (tree t1, t
*** 804,811 ****
        || ref_all_alias_ptr_type_p (t2))
      return false;
  
!   return (TYPE_MAIN_VARIANT (TREE_TYPE (t1))
! 	  == TYPE_MAIN_VARIANT (TREE_TYPE (t2)));
  }
  
  /* Create emptry alias set entry.  */
--- 824,839 ----
        || ref_all_alias_ptr_type_p (t2))
      return false;
  
!     /* This function originally abstracts from simply comparing
!        get_deref_alias_set so that we are sure this still computes
!        the same result after LTO type merging is applied.
!        When in LTO type merging is done we can actually do this compare.
!     */
!   if (in_lto_p)
!     return get_deref_alias_set (t1) == get_deref_alias_set (t2);
!   else
!     return (TYPE_MAIN_VARIANT (TREE_TYPE (t1))
! 	    == TYPE_MAIN_VARIANT (TREE_TYPE (t2)));
  }
  
  /* Create emptry alias set entry.  */
*************** get_alias_set (tree t)
*** 833,839 ****
    alias_set_type set;
  
    /* We cannot give up with -fno-strict-aliasing because we need to build
!      proper type representation for possible functions which are build with
       -fstrict-aliasing.  */
  
    /* return 0 if this or its type is an error.  */
--- 861,867 ----
    alias_set_type set;
  
    /* We cannot give up with -fno-strict-aliasing because we need to build
!      proper type representations for possible functions which are built with
       -fstrict-aliasing.  */
  
    /* return 0 if this or its type is an error.  */
*************** get_alias_set (tree t)
*** 892,900 ****
        if (set != -1)
  	return set;
        /* Handle structure type equality for pointer types, arrays and vectors.
! 	 This is easy to do, because the code bellow ignore canonical types on
  	 these anyway.  This is important for LTO, where TYPE_CANONICAL for
! 	 pointers cannot be meaningfuly computed by the frotnend.  */
        if (canonical_type_used_p (t))
  	{
  	  /* In LTO we set canonical types for all types where it makes
--- 920,928 ----
        if (set != -1)
  	return set;
        /* Handle structure type equality for pointer types, arrays and vectors.
! 	 This is easy to do, because the code below ignores canonical types on
  	 these anyway.  This is important for LTO, where TYPE_CANONICAL for
! 	 pointers cannot be meaningfully computed by the frontend.  */
        if (canonical_type_used_p (t))
  	{
  	  /* In LTO we set canonical types for all types where it makes
*************** get_alias_set (tree t)
*** 1003,1011 ****
  	   || TREE_CODE (p) == VECTOR_TYPE;
  	   p = TREE_TYPE (p))
  	{
! 	  /* Ada supports recusive pointers.  Instead of doing recrusion check
! 	     just give up once the preallocated space of 8 elements is up.
! 	     In this case just punt to void * alias set.  */
  	  if (reference.length () == 8)
  	    {
  	      p = ptr_type_node;
--- 1031,1039 ----
  	   || TREE_CODE (p) == VECTOR_TYPE;
  	   p = TREE_TYPE (p))
  	{
! 	  /* Ada supports recursive pointers.  Instead of doing recursion
! 	     check, just give up once the preallocated space of 8 elements
! 	     is up.  In this case just punt to void * alias set.  */
  	  if (reference.length () == 8)
  	    {
  	      p = ptr_type_node;
*************** get_alias_set (tree t)
*** 1020,1025 ****
--- 1048,1061 ----
  	}
        p = TYPE_MAIN_VARIANT (p);
  
+       /* In LTO for C++ programs we can turn incomplete types to complete
+ 	 using ODR name lookup.  */
+       if (in_lto_p && TYPE_STRUCTURAL_EQUALITY_P (p) && odr_type_p (p))
+ 	{
+ 	  p = prevailing_odr_type (p);
+ 	  gcc_checking_assert (TYPE_MAIN_VARIANT (p) == p);
+ 	}
+ 
        /* Make void * compatible with char * and also void **.
  	 Programs are commonly violating TBAA by this.
  
*************** record_alias_subset (alias_set_type supe
*** 1159,1168 ****
      superset_entry->has_zero_child = 1;
    else
      {
-       subset_entry = get_alias_set_entry (subset);
        if (!superset_entry->children)
  	superset_entry->children
  	  = hash_map<alias_set_hash, int>::create_ggc (64);
        /* If there is an entry for the subset, enter all of its children
  	 (if they are not already present) as children of the SUPERSET.  */
        if (subset_entry)
--- 1195,1210 ----
      superset_entry->has_zero_child = 1;
    else
      {
        if (!superset_entry->children)
  	superset_entry->children
  	  = hash_map<alias_set_hash, int>::create_ggc (64);
+ 
+       /* Enter the SUBSET itself as a child of the SUPERSET.  If it was
+ 	 already there we're done.  */
+       if (superset_entry->children->put (subset, 0))
+ 	return;
+ 
+       subset_entry = get_alias_set_entry (subset);
        /* If there is an entry for the subset, enter all of its children
  	 (if they are not already present) as children of the SUPERSET.  */
        if (subset_entry)
*************** record_alias_subset (alias_set_type supe
*** 1180,1188 ****
  		superset_entry->children->put ((*iter).first, (*iter).second);
  	    }
  	}
- 
-       /* Enter the SUBSET itself as a child of the SUPERSET.  */
-       superset_entry->children->put (subset, 0);
      }
  }
  
--- 1222,1227 ----
*************** record_component_aliases (tree type, ali
*** 1204,1264 ****
      case RECORD_TYPE:
      case UNION_TYPE:
      case QUAL_UNION_TYPE:
!       for (field = TYPE_FIELDS (type); field != 0; field = DECL_CHAIN (field))
! 	if (TREE_CODE (field) == FIELD_DECL && !DECL_NONADDRESSABLE_P (field))
! 	  {
! 	    /* LTO type merging does not make any difference between 
! 	       component pointer types.  We may have
  
! 	       struct foo {int *a;};
  
! 	       as TYPE_CANONICAL of 
  
! 	       struct bar {float *a;};
  
! 	       Because accesses to int * and float * do not alias, we would get
! 	       false negative when accessing the same memory location by
! 	       float ** and bar *. We thus record the canonical type as:
  
! 	       struct {void *a;};
  
! 	       void * is special cased and works as a universal pointer type.
! 	       Accesses to it conflicts with accesses to any other pointer
! 	       type.  */
! 	    tree t = TREE_TYPE (field);
! 	    if (in_lto_p)
! 	      {
! 		/* VECTOR_TYPE and ARRAY_TYPE share the alias set with their
! 		   element type and that type has to be normalized to void *,
! 		   too, in the case it is a pointer. */
! 		while (!canonical_type_used_p (t) && !POINTER_TYPE_P (t))
! 		  {
! 		    gcc_checking_assert (TYPE_STRUCTURAL_EQUALITY_P (t));
! 		    t = TREE_TYPE (t);
! 		  }
! 		if (POINTER_TYPE_P (t))
! 		  t = ptr_type_node;
! 		else if (flag_checking)
! 		  gcc_checking_assert (get_alias_set (t)
! 				       == get_alias_set (TREE_TYPE (field)));
! 	      }
  
! 	    alias_set_type set = get_alias_set (t);
! 	    record_alias_subset (superset, set);
! 	    /* If the field has alias-set zero make sure to still record
! 	       any componets of it.  This makes sure that for
! 		 struct A {
! 		   struct B {
! 		     int i;
! 		     char c[4];
! 		   } b;
! 		 };
! 	       in C++ even though 'B' has alias-set zero because
! 	       TYPE_TYPELESS_STORAGE is set, 'A' has the alias-set of
! 	       'int' as subset.  */
! 	    if (set == 0)
! 	      record_component_aliases (t, superset);
! 	  }
        break;
  
      case COMPLEX_TYPE:
--- 1243,1308 ----
      case RECORD_TYPE:
      case UNION_TYPE:
      case QUAL_UNION_TYPE:
!       {
! 	/* LTO non-ODR type merging does not make any difference between 
! 	   component pointer types.  We may have
  
! 	   struct foo {int *a;};
  
! 	   as TYPE_CANONICAL of 
  
! 	   struct bar {float *a;};
  
! 	   Because accesses to int * and float * do not alias, we would get
! 	   false negative when accessing the same memory location by
! 	   float ** and bar *. We thus record the canonical type as:
  
! 	   struct {void *a;};
  
! 	   void * is special cased and works as a universal pointer type.
! 	   Accesses to it conflicts with accesses to any other pointer
! 	   type.  */
! 	bool void_pointers = in_lto_p
! 			     && (!odr_type_p (type)
! 				 || !odr_based_tbaa_p (type));
! 	for (field = TYPE_FIELDS (type); field != 0; field = DECL_CHAIN (field))
! 	  if (TREE_CODE (field) == FIELD_DECL && !DECL_NONADDRESSABLE_P (field))
! 	    {
! 	      tree t = TREE_TYPE (field);
! 	      if (void_pointers)
! 		{
! 		  /* VECTOR_TYPE and ARRAY_TYPE share the alias set with their
! 		     element type and that type has to be normalized to void *,
! 		     too, in the case it is a pointer. */
! 		  while (!canonical_type_used_p (t) && !POINTER_TYPE_P (t))
! 		    {
! 		      gcc_checking_assert (TYPE_STRUCTURAL_EQUALITY_P (t));
! 		      t = TREE_TYPE (t);
! 		    }
! 		  if (POINTER_TYPE_P (t))
! 		    t = ptr_type_node;
! 		  else if (flag_checking)
! 		    gcc_checking_assert (get_alias_set (t)
! 					 == get_alias_set (TREE_TYPE (field)));
! 		}
  
! 	      alias_set_type set = get_alias_set (t);
! 	      record_alias_subset (superset, set);
! 	      /* If the field has alias-set zero make sure to still record
! 		 any componets of it.  This makes sure that for
! 		   struct A {
! 		     struct B {
! 		       int i;
! 		       char c[4];
! 		     } b;
! 		   };
! 		 in C++ even though 'B' has alias-set zero because
! 		 TYPE_TYPELESS_STORAGE is set, 'A' has the alias-set of
! 		 'int' as subset.  */
! 	      if (set == 0)
! 		record_component_aliases (t, superset);
! 	    }
!       }
        break;
  
      case COMPLEX_TYPE:
*************** find_base_value (rtx src)
*** 1480,1488 ****
        return find_base_value (XEXP (src, 1));
  
      case AND:
!       /* If the second operand is constant set the base
! 	 address to the first operand.  */
!       if (CONST_INT_P (XEXP (src, 1)) && INTVAL (XEXP (src, 1)) != 0)
  	return find_base_value (XEXP (src, 0));
        return 0;
  
--- 1524,1534 ----
        return find_base_value (XEXP (src, 1));
  
      case AND:
!       /* Look through aligning ANDs.  And AND with zero or one with
!          the LSB set isn't one (see for example PR92462).  */
!       if (CONST_INT_P (XEXP (src, 1))
! 	  && INTVAL (XEXP (src, 1)) != 0
! 	  && (INTVAL (XEXP (src, 1)) & 1) == 0)
  	return find_base_value (XEXP (src, 0));
        return 0;
  
*************** record_set (rtx dest, const_rtx set, voi
*** 1572,1587 ****
  	  new_reg_base_value[regno] = 0;
  	  return;
  	}
-       /* A CLOBBER_HIGH only wipes out the old value if the mode of the old
- 	 value is greater than that of the clobber.  */
-       else if (GET_CODE (set) == CLOBBER_HIGH)
- 	{
- 	  if (new_reg_base_value[regno] != 0
- 	      && reg_is_clobbered_by_clobber_high (
- 		   regno, GET_MODE (new_reg_base_value[regno]), XEXP (set, 0)))
- 	    new_reg_base_value[regno] = 0;
- 	  return;
- 	}
  
        src = SET_SRC (set);
      }
--- 1618,1623 ----
*************** find_base_term (rtx x, vec<std::pair<cse
*** 1969,1974 ****
--- 2005,2013 ----
        if (cselib_sp_based_value_p (val))
  	return static_reg_base_value[STACK_POINTER_REGNUM];
  
+       if (visited_vals.length () > (unsigned) param_max_find_base_term_values)
+ 	return ret;
+ 
        f = val->locs;
        /* Reset val->locs to avoid infinite recursion.  */
        if (f)
*************** find_base_term (rtx x, vec<std::pair<cse
*** 2050,2056 ****
        }
  
      case AND:
!       if (CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) != 0)
  	return find_base_term (XEXP (x, 0), visited_vals);
        return 0;
  
--- 2089,2099 ----
        }
  
      case AND:
!       /* Look through aligning ANDs.  And AND with zero or one with
!          the LSB set isn't one (see for example PR92462).  */
!       if (CONST_INT_P (XEXP (x, 1))
! 	  && INTVAL (XEXP (x, 1)) != 0
! 	  && (INTVAL (XEXP (x, 1)) & 1) == 0)
  	return find_base_term (XEXP (x, 0), visited_vals);
        return 0;
  
*************** memory_modified_in_insn_p (const_rtx mem
*** 3284,3290 ****
    if (CALL_P (insn))
      return true;
    memory_modified = false;
!   note_stores (PATTERN (insn), memory_modified_1, CONST_CAST_RTX(mem));
    return memory_modified;
  }
  
--- 3327,3334 ----
    if (CALL_P (insn))
      return true;
    memory_modified = false;
!   note_stores (as_a<const rtx_insn *> (insn), memory_modified_1,
! 	       CONST_CAST_RTX(mem));
    return memory_modified;
  }
  
*************** init_alias_analysis (void)
*** 3412,3418 ****
  		      && find_reg_note (insn, REG_NOALIAS, NULL_RTX))
  		    record_set (SET_DEST (PATTERN (insn)), NULL_RTX, NULL);
  		  else
! 		    note_stores (PATTERN (insn), record_set, NULL);
  
  		  set = single_set (insn);
  
--- 3456,3462 ----
  		      && find_reg_note (insn, REG_NOALIAS, NULL_RTX))
  		    record_set (SET_DEST (PATTERN (insn)), NULL_RTX, NULL);
  		  else
! 		    note_stores (insn, record_set, NULL);
  
  		  set = single_set (insn);
  
diff -Nrcpad gcc-9.3.0/gcc/alias.h gcc-10.1.0/gcc/alias.h
*** gcc-9.3.0/gcc/alias.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/alias.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Exported functions from alias.c
!    Copyright (C) 2004-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Exported functions from alias.c
!    Copyright (C) 2004-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** extern alias_set_type get_deref_alias_se
*** 26,31 ****
--- 26,32 ----
  extern alias_set_type get_varargs_alias_set (void);
  extern alias_set_type get_frame_alias_set (void);
  extern tree component_uses_parent_alias_set_from (const_tree);
+ extern bool ends_tbaa_access_path_p (const_tree);
  extern bool alias_set_subset_of (alias_set_type, alias_set_type);
  extern void record_alias_subset (alias_set_type, alias_set_type);
  extern void record_component_aliases (tree);
*************** extern void dump_alias_stats_in_alias_c
*** 37,42 ****
--- 38,44 ----
  tree reference_alias_ptr_type (tree);
  bool alias_ptr_types_compatible_p (tree, tree);
  int compare_base_decls (tree, tree);
+ bool refs_same_for_tbaa_p (tree, tree);
  
  /* This alias set can be used to force a memory to conflict with all
     other memories, creating a barrier across which no memory reference
diff -Nrcpad gcc-9.3.0/gcc/align.h gcc-10.1.0/gcc/align.h
*** gcc-9.3.0/gcc/align.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/align.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Alignment-related classes.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Alignment-related classes.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** struct align_flags_tuple
*** 45,52 ****
  /* Alignment flags is structure used as value of -align-* options.
     It's used in target-dependant code.  */
  
! struct align_flags
  {
    /* Default constructor.  */
    align_flags (int log0 = 0, int maxskip0 = 0, int log1 = 0, int maxskip1 = 0)
    {
--- 45,53 ----
  /* Alignment flags is structure used as value of -align-* options.
     It's used in target-dependant code.  */
  
! class align_flags
  {
+ public:
    /* Default constructor.  */
    align_flags (int log0 = 0, int maxskip0 = 0, int log1 = 0, int maxskip1 = 0)
    {
diff -Nrcpad gcc-9.3.0/gcc/alloc-pool.c gcc-10.1.0/gcc/alloc-pool.c
*** gcc-9.3.0/gcc/alloc-pool.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/alloc-pool.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Functions to support a pool of allocatable objects.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
     Contributed by Daniel Berlin <dan@cgsoftware.com>
  
  This file is part of GCC.
--- 1,5 ----
  /* Functions to support a pool of allocatable objects.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
     Contributed by Daniel Berlin <dan@cgsoftware.com>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/alloc-pool.h gcc-10.1.0/gcc/alloc-pool.h
*** gcc-9.3.0/gcc/alloc-pool.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/alloc-pool.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Functions to support a pool of allocatable objects
!    Copyright (C) 1997-2019 Free Software Foundation, Inc.
     Contributed by Daniel Berlin <dan@cgsoftware.com>
  
  This file is part of GCC.
--- 1,5 ----
  /* Functions to support a pool of allocatable objects
!    Copyright (C) 1997-2020 Free Software Foundation, Inc.
     Contributed by Daniel Berlin <dan@cgsoftware.com>
  
  This file is part of GCC.
*************** typedef unsigned long ALLOC_POOL_ID_TYPE
*** 34,41 ****
  extern ALLOC_POOL_ID_TYPE last_id;
  
  /* Pool allocator memory usage.  */
! struct pool_usage: public mem_usage
  {
    /* Default contructor.  */
    pool_usage (): m_element_size (0), m_pool_name ("") {}
    /* Constructor.  */
--- 34,42 ----
  extern ALLOC_POOL_ID_TYPE last_id;
  
  /* Pool allocator memory usage.  */
! class pool_usage: public mem_usage
  {
+ public:
    /* Default contructor.  */
    pool_usage (): m_element_size (0), m_pool_name ("") {}
    /* Constructor.  */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/ChangeLog gcc-10.1.0/gcc/analyzer/ChangeLog
*** gcc-9.3.0/gcc/analyzer/ChangeLog	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/ChangeLog	Thu May  7 10:50:32 2020
***************
*** 0 ****
--- 1,1360 ----
+ 2020-05-07  Release Manager
+ 
+ 	* GCC 10.1.0 released.
+ 
+ 2020-04-28  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/94816
+ 	* engine.cc (impl_region_model_context::on_unexpected_tree_code):
+ 	Handle NULL tree.
+ 	* region-model.cc (region_model::add_region_for_type): Handle
+ 	NULL type.
+ 	* region-model.h
+ 	(test_region_model_context::on_unexpected_tree_code): Handle NULL
+ 	tree.
+ 
+ 2020-04-28  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/94447
+ 	PR analyzer/94639
+ 	PR analyzer/94732
+ 	PR analyzer/94754
+ 	* analyzer.opt (Wanalyzer-use-of-uninitialized-value): Delete.
+ 	* program-state.cc (selftest::test_program_state_dumping): Update
+ 	expected dump result for removal of "uninit".
+ 	* region-model.cc (poison_kind_to_str): Delete POISON_KIND_UNINIT
+ 	case.
+ 	(root_region::ensure_stack_region): Initialize stack with null
+ 	svalue_id rather than with a typeless POISON_KIND_UNINIT value.
+ 	(root_region::ensure_heap_region): Likewise for the heap.
+ 	(region_model::dump_summary_of_rep_path_vars): Remove
+ 	summarization of uninit values.
+ 	(region_model::validate): Remove check that the stack has a
+ 	POISON_KIND_UNINIT value.
+ 	(poisoned_value_diagnostic::emit): Remove POISON_KIND_UNINIT
+ 	case.
+ 	(poisoned_value_diagnostic::describe_final_event): Likewise.
+ 	(selftest::test_dump): Update expected dump result for removal of
+ 	"uninit".
+ 	(selftest::test_svalue_equality): Remove "uninit" and "freed".
+ 	* region-model.h (enum poison_kind): Remove POISON_KIND_UNINIT.
+ 
+ 2020-04-01  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/94378
+ 	* checker-path.cc: Include "bitmap.h".
+ 	* constraint-manager.cc: Likewise.
+ 	* diagnostic-manager.cc: Likewise.
+ 	* engine.cc: Likewise.
+ 	(exploded_node::detect_leaks): Pass null region_id to pop_frame.
+ 	* program-point.cc: Include "bitmap.h".
+ 	* program-state.cc: Likewise.
+ 	* region-model.cc (id_set<region_id>::id_set): Convert to...
+ 	(region_id_set::region_id_set): ...this.
+ 	(svalue_id_set::svalue_id_set): New ctor.
+ 	(region_model::copy_region): New function.
+ 	(region_model::copy_struct_region): New function.
+ 	(region_model::copy_union_region): New function.
+ 	(region_model::copy_array_region): New function.
+ 	(stack_region::pop_frame): Drop return value.  Add
+ 	"result_dst_rid" param; if it is non-null, use copy_region to copy
+ 	the result to it.  Rather than capture and pass a single "known
+ 	used" return value to be used by purge_unused_values, instead
+ 	gather and pass a set of known used return values.
+ 	(root_region::pop_frame): Drop return value.  Add "result_dst_rid"
+ 	param.
+ 	(region_model::on_assignment): Use copy_region.
+ 	(region_model::on_return): Likewise for the result.
+ 	(region_model::on_longjmp): Pass null for pop_frame's
+ 	result_dst_rid.
+ 	(region_model::update_for_return_superedge): Pass the region for the
+ 	return value of the call, if any, to pop_frame, rather than setting
+ 	the lvalue for the lhs of the result.
+ 	(region_model::pop_frame): Drop return value.  Add
+ 	"result_dst_rid" param.
+ 	(region_model::purge_unused_svalues): Convert third param from an
+ 	svalue_id * to an svalue_id_set *, updating the initial populating
+ 	of the "used" bitmap accordingly.  Don't remap it when done.
+ 	(struct selftest::coord_test): New selftest fixture, extracted from...
+ 	(selftest::test_dump_2): ...here.
+ 	(selftest::test_compound_assignment): New selftest.
+ 	(selftest::test_stack_frames): Pass null to new param of pop_frame.
+ 	(selftest::analyzer_region_model_cc_tests): Call the new selftest.
+ 	* region-model.h (class id_set): Delete template.
+ 	(class region_id_set): Reimplement, using old id_set implementation.
+ 	(class svalue_id_set): Likewise.  Convert from auto_sbitmap to
+ 	auto_bitmap.
+ 	(region::get_active_view): New accessor.
+ 	(stack_region::pop_frame): Drop return value.  Add
+ 	"result_dst_rid" param.
+ 	(root_region::pop_frame): Likewise.
+ 	(region_model::pop_frame): Likewise.
+ 	(region_model::copy_region): New decl.
+ 	(region_model::purge_unused_svalues): Convert third param from an
+ 	svalue_id * to an svalue_id_set *.
+ 	(region_model::copy_struct_region): New decl.
+ 	(region_model::copy_union_region): New decl.
+ 	(region_model::copy_array_region): New decl.
+ 
+ 2020-03-27  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* program-state.cc (selftest::test_program_state_dumping): Update
+ 	expected dump to include symbolic_region's possibly_null field.
+ 	* region-model.cc (symbolic_region::print_fields): New vfunc
+ 	implementation.
+ 	(region_model::add_constraint): Clear m_possibly_null from
+ 	symbolic_regions now known to be non-NULL.
+ 	(selftest::test_malloc_constraints): New selftest.
+ 	(selftest::analyzer_region_model_cc_tests): Call it.
+ 	* region-model.h (region::dyn_cast_symbolic_region): Add non-const
+ 	overload.
+ 	(symbolic_region::dyn_cast_symbolic_region): Implement it.
+ 	(symbolic_region::print_fields): New vfunc override decl.
+ 
+ 2020-03-27  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* analyzer.h (class feasibility_problem): New forward decl.
+ 	* diagnostic-manager.cc (saved_diagnostic::saved_diagnostic):
+ 	Initialize new fields m_status, m_epath_length, and m_problem.
+ 	(saved_diagnostic::~saved_diagnostic): Delete m_problem.
+ 	(dedupe_candidate::dedupe_candidate): Convert "sd" param from a
+ 	const ref to a mutable ptr.
+ 	(dedupe_winners::add): Convert "sd" param from a const ref to a
+ 	mutable ptr.  Record the length of the exploded_path.  Record the
+ 	feasibility/infeasibility of sd into sd, capturing a
+ 	feasibility_problem when feasible_p fails, and storing it in sd.
+ 	(diagnostic_manager::emit_saved_diagnostics): Update for pass by
+ 	ptr rather than by const ref.
+ 	* diagnostic-manager.h (class saved_diagnostic): Add new enum
+ 	status.  Add fields m_status, m_epath_length and m_problem.
+ 	(saved_diagnostic::set_feasible): New member function.
+ 	(saved_diagnostic::set_infeasible): New member function.
+ 	(saved_diagnostic::get_feasibility_problem): New accessor.
+ 	(saved_diagnostic::get_status): New accessor.
+ 	(saved_diagnostic::set_epath_length): New member function.
+ 	(saved_diagnostic::get_epath_length): New accessor.
+ 	* engine.cc: Include "gimple-pretty-print.h".
+ 	(exploded_path::feasible_p): Add OUT param and, if non-NULL, write
+ 	a new feasibility_problem to it on failure.
+ 	(viz_callgraph_node::dump_dot): Convert begin_tr calls to
+ 	begin_trtd.  Convert end_tr calls to end_tdtr.
+ 	(class exploded_graph_annotator): New subclass of dot_annotator.
+ 	(impl_run_checkers): Add a second -fdump-analyzer-supergraph dump
+ 	after the analysis runs, using exploded_graph_annotator. dumping
+ 	to DUMP_BASE_NAME.supergraph-eg.dot.
+ 	* exploded-graph.h (exploded_node::get_dot_fillcolor): Make
+ 	public.
+ 	(exploded_path::feasible_p): Add OUT param.
+ 	(class feasibility_problem): New class.
+ 	* state-purge.cc (state_purge_annotator::add_node_annotations):
+ 	Return a bool, add a "within_table" param.
+ 	(print_vec_of_names): Convert begin_tr calls to begin_trtd.
+ 	Convert end_tr calls to end_tdtr.
+ 	(state_purge_annotator::add_stmt_annotations): Add "within_row"
+ 	param.
+ 	* state-purge.h ((state_purge_annotator::add_node_annotations):
+ 	Return a bool, add a "within_table" param.
+ 	(state_purge_annotator::add_stmt_annotations): Add "within_row"
+ 	param.
+ 	* supergraph.cc (supernode::dump_dot): Call add_node_annotations
+ 	twice: as before, passing false for "within_table", then again
+ 	with true when within the TABLE element.  Convert some begin_tr
+ 	calls to begin_trtd, and some end_tr calls to end_tdtr.
+ 	Repeat each add_stmt_annotations call, distinguishing between
+ 	calls that add TRs and those that add TDs to an existing TR.
+ 	Add a call to add_after_node_annotations.
+ 	* supergraph.h (dot_annotator::add_node_annotations): Add a
+ 	"within_table" param.
+ 	(dot_annotator::add_stmt_annotations): Add a "within_row" param.
+ 	(dot_annotator::add_after_node_annotations): New vfunc.
+ 
+ 2020-03-27  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* diagnostic-manager.cc (dedupe_winners::add): Show the
+ 	exploded_node index in the log messages.
+ 	(diagnostic_manager::emit_saved_diagnostics): Log a summary of
+ 	m_saved_diagnostics at entry.
+ 
+ 2020-03-27  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* supergraph.cc (superedge::dump): Add space before description;
+ 	move newline to non-pretty_printer overload.
+ 
+ 2020-03-18  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* region-model.cc: Include "stor-layout.h".
+ 	(region_model::dump_to_pp): Rather than calling
+ 	dump_summary_of_map on each of the current frame and the globals,
+ 	instead get a vec of representative path_vars for all regions,
+ 	and then dump a summary of all of them.
+ 	(region_model::dump_summary_of_map): Delete, rewriting into...
+ 	(region_model::dump_summary_of_rep_path_vars): ...this new
+ 	function, working on a vec of path_vars.
+ 	(region_model::set_value): New overload.
+ 	(region_model::get_representative_path_var): Rename
+ 	"parent_region" local to "parent_reg" and consolidate with other
+ 	local.  Guard test for grandparent being stack on parent_reg being
+ 	non-NULL.  Move handling for parent being an array_region to
+ 	within guard for parent_reg being non-NULL.
+ 	(selftest::make_test_compound_type): New function.
+ 	(selftest::test_dump_2): New selftest.
+ 	(selftest::test_dump_3): New selftest.
+ 	(selftest::test_stack_frames): Update expected output from
+ 	simplified dump to show "a" and "b" from parent frame and "y" in
+ 	child frame.
+ 	(selftest::analyzer_region_model_cc_tests): Call test_dump_2 and
+ 	test_dump_3.
+ 	* region-model.h (region_model::set_value): New overload decl.
+ 	(region_model::dump_summary_of_map): Delete.
+ 	(region_model::dump_summary_of_rep_path_vars): New.
+ 
+ 2020-03-18  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* region-model.h (class noop_region_model_context): New subclass
+ 	of region_model_context.
+ 	(class tentative_region_model_context): Inherit from
+ 	noop_region_model_context rather than from region_model_context;
+ 	drop redundant vfunc implementations.
+ 	(class test_region_model_context): Likewise.
+ 
+ 2020-03-18  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* engine.cc (exploded_node::exploded_node): Move implementation
+ 	here from header; accept point_and_state by const reference rather
+ 	than by value.
+ 	* exploded-graph.h (exploded_node::exploded_node): Pass
+ 	point_and_state by const reference rather than by value.  Move
+ 	body to engine.cc.
+ 
+ 2020-03-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* sm-malloc.cc (malloc_state_machine::on_stmt): Fix up duplicated word
+ 	issue in a comment.
+ 	* region-model.cc (region_model::make_region_for_unexpected_tree_code,
+ 	region_model::delete_region_and_descendents): Likewise.
+ 	* engine.cc (class exploded_cluster): Likewise.
+ 	* diagnostic-manager.cc (class path_builder): Likewise.
+ 
+ 2020-03-13  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/94099
+ 	PR analyzer/94105
+ 	* diagnostic-manager.cc (for_each_state_change): Bulletproof
+ 	against errors in get_rvalue by passing a
+ 	tentative_region_model_context and rejecting if there's an error.
+ 	* region-model.cc (region_model::get_lvalue_1): When handling
+ 	ARRAY_REF, handle results of error-handling.  Handle NOP_EXPR.
+ 
+ 2020-03-06  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* analyzer.h (class array_region): New forward decl.
+ 	* program-state.cc (selftest::test_program_state_dumping_2): New.
+ 	(selftest::analyzer_program_state_cc_tests): Call it.
+ 	* region-model.cc (array_region::constant_from_key): New.
+ 	(region_model::get_representative_tree): Handle region_svalue by
+ 	generating an ADDR_EXPR.
+ 	(region_model::get_representative_path_var): In view handling,
+ 	remove erroneous TREE_TYPE when determining the type of the tree.
+ 	Handle array regions and STRING_CST.
+ 	(selftest::assert_dump_tree_eq): New.
+ 	(ASSERT_DUMP_TREE_EQ): New macro.
+ 	(selftest::test_get_representative_tree): New selftest.
+ 	(selftest::analyzer_region_model_cc_tests): Call it.
+ 	* region-model.h (region::dyn_cast_array_region): New vfunc.
+ 	(array_region::dyn_cast_array_region): New vfunc implementation.
+ 	(array_region::constant_from_key): New decl.
+ 
+ 2020-03-06  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* analyzer.h (dump_quoted_tree): New decl.
+ 	* engine.cc (exploded_node::dump_dot): Pass region model to
+ 	sm_state_map::print.
+ 	* program-state.cc: Include diagnostic-core.h.
+ 	(sm_state_map::print): Add "model" param and use it to print
+ 	representative trees.  Only print origin information if non-null.
+ 	(sm_state_map::dump): Pass NULL for model to print call.
+ 	(program_state::print): Pass region model to sm_state_map::print.
+ 	(program_state::dump_to_pp): Use spaces rather than newlines when
+ 	summarizing.  Pass region_model to sm_state_map::print.
+ 	(ana::selftest::assert_dump_eq): New function.
+ 	(ASSERT_DUMP_EQ): New macro.
+ 	(ana::selftest::test_program_state_dumping): New function.
+ 	(ana::selftest::analyzer_program_state_cc_tests): Call it.
+ 	* program-state.h (program_state::print): Add model param.
+ 	* region-model.cc (dump_quoted_tree): New function.
+ 	(map_region::print_fields): Use dump_quoted_tree rather than
+ 	%qE to avoid lang-dependent output.
+ 	(map_region::dump_child_label): Likewise.
+ 	(region_model::dump_summary_of_map): For SK_REGION, when
+ 	get_representative_path_var fails, print the region id rather than
+ 	erroneously printing NULL.
+ 	* sm.cc (state_machine::get_state_by_name): New function.
+ 	* sm.h (state_machine::get_state_by_name): New decl.
+ 
+ 2020-03-04  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* region-model.cc (region::validate): Convert model param from ptr
+ 	to reference.  Update comment to reflect that it's now a vfunc.
+ 	(map_region::validate): New vfunc implementation.
+ 	(array_region::validate): New vfunc implementation.
+ 	(stack_region::validate): New vfunc implementation.
+ 	(root_region::validate): New vfunc implementation.
+ 	(region_model::validate): Pass a reference rather than a pointer
+ 	to the region::validate vfunc.
+ 	* region-model.h (region::validate): Make virtual.  Convert model
+ 	param from ptr to reference.
+ 	(map_region::validate): New vfunc decl.
+ 	(array_region::validate): New vfunc decl.
+ 	(stack_region::validate): New vfunc decl.
+ 	(root_region::validate): New vfunc decl.
+ 
+ 2020-03-04  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93993
+ 	* region-model.cc (region_model::on_call_pre): Handle
+ 	BUILT_IN_EXPECT and its variants.
+ 	(region_model::add_any_constraints_from_ssa_def_stmt): Split out
+ 	gassign handling into add_any_constraints_from_gassign; add gcall
+ 	handling.
+ 	(region_model::add_any_constraints_from_gassign): New function,
+ 	based on the above.  Add handling for NOP_EXPR.
+ 	(region_model::add_any_constraints_from_gcall): New function.
+ 	(region_model::get_representative_path_var): Handle views.
+ 	* region-model.h
+ 	(region_model::add_any_constraints_from_ssa_def_stmt): New decl.
+ 	(region_model::add_any_constraints_from_gassign): New decl.
+ 
+ 2020-03-04  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93993
+ 	* checker-path.h (state_change_event::get_lvalue): Add ctxt param
+ 	and pass it to region_model::get_value call.
+ 	* diagnostic-manager.cc (get_any_origin): Pass a
+ 	tentative_region_model_context to the calls to get_lvalue and reject
+ 	the comparison if errors occur.
+ 	(can_be_expr_of_interest_p): New function.
+ 	(diagnostic_manager::prune_for_sm_diagnostic): Replace checks for
+ 	CONSTANT_CLASS_P with calls to update_for_unsuitable_sm_exprs.
+ 	Pass a tentative_region_model_context to the calls to
+ 	state_change_event::get_lvalue and reject the comparison if errors
+ 	occur.
+ 	(diagnostic_manager::update_for_unsuitable_sm_exprs): New.
+ 	* diagnostic-manager.h
+ 	(diagnostic_manager::update_for_unsuitable_sm_exprs): New decl.
+ 	* region-model.h (class tentative_region_model_context): New class.
+ 
+ 2020-03-04  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* engine.cc (worklist::worklist): Remove unused field m_eg.
+ 	(class viz_callgraph_edge): Remove unused field m_call_sedge.
+ 	(class viz_callgraph): Remove unused field m_sg.
+ 	* exploded-graph.h (worklist::::m_eg): Remove unused field.
+ 
+ 2020-03-02  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* analyzer.opt (fanalyzer-show-duplicate-count): New option.
+ 	* diagnostic-manager.cc
+ 	(diagnostic_manager::emit_saved_diagnostic): Use the above to
+ 	guard the printing of the duplicate count.
+ 
+ 2020-03-02  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93959
+ 	* analyzer.cc (is_std_function_p): New function.
+ 	(is_std_named_call_p): New functions.
+ 	* analyzer.h (is_std_named_call_p): New decl.
+ 	* sm-malloc.cc (malloc_state_machine::on_stmt): Check for "std::"
+ 	variants when checking for malloc, calloc and free.
+ 
+ 2020-02-26  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93950
+ 	* diagnostic-manager.cc
+ 	(diagnostic_manager::prune_for_sm_diagnostic): Assert that var is
+ 	either NULL or not a constant.  When updating var, bulletproof
+ 	against constant values.
+ 
+ 2020-02-26  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93947
+ 	* region-model.cc (region_model::get_fndecl_for_call): Gracefully
+ 	fail for fn_decls that don't have a cgraph_node.
+ 
+ 2020-02-26  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* bar-chart.cc: New file.
+ 	* bar-chart.h: New file.
+ 	* engine.cc: Include "analyzer/bar-chart.h".
+ 	(stats::log): Only log the m_num_nodes kinds that are non-zero.
+ 	(stats::dump): Likewise when dumping.
+ 	(stats::get_total_enodes): New.
+ 	(exploded_graph::get_or_create_node): Increment the per-point-data
+ 	m_excess_enodes when hitting the per-program-point limit on
+ 	enodes.
+ 	(exploded_graph::print_bar_charts): New.
+ 	(exploded_graph::log_stats): Log the number of unprocessed enodes
+ 	in the worklist.  Call print_bar_charts.
+ 	(exploded_graph::dump_stats): Print the number of unprocessed
+ 	enodes in the worklist.
+ 	* exploded-graph.h (stats::get_total_enodes): New decl.
+ 	(struct per_program_point_data): Add field m_excess_enodes.
+ 	(exploded_graph::print_bar_charts): New decl.
+ 	* supergraph.cc (superedge::dump): New.
+ 	(superedge::dump): New.
+ 	* supergraph.h (supernode::get_function): New.
+ 	(superedge::dump): New decl.
+ 	(superedge::dump): New decl.
+ 
+ 2020-02-24  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* engine.cc (exploded_graph::get_or_create_node): Dump the
+ 	program_state to the pp, rather than to stderr.
+ 
+ 2020-02-24  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93032
+ 	* sm.cc (make_checkers): Require the "taint" checker to be
+ 	explicitly enabled.
+ 
+ 2020-02-24  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93899
+ 	* engine.cc
+ 	(impl_region_model_context::impl_region_model_context): Add logger
+ 	param.
+ 	* engine.cc (exploded_graph::add_function_entry): Create an
+ 	impl_region_model_context and pass it to the push_frame call.
+ 	Bail if the resulting state is invalid.
+ 	(exploded_graph::build_initial_worklist): Likewise.
+ 	(exploded_graph::build_initial_worklist): Handle the case where
+ 	add_function_entry fails.
+ 	* exploded-graph.h
+ 	(impl_region_model_context::impl_region_model_context): Add logger
+ 	param.
+ 	* region-model.cc (map_region::get_or_create): Add ctxt param and
+ 	pass it to add_region_for_type.
+ 	(map_region::can_merge_p): Pass NULL as a ctxt to call to
+ 	get_or_create.
+ 	(array_region::get_element): Pass ctxt to call to get_or_create.
+ 	(array_region::get_or_create): Add ctxt param and pass it to
+ 	add_region_for_type.
+ 	(root_region::push_frame): Pass ctxt to get_or_create calls.
+ 	(region_model::get_lvalue_1): Likewise.
+ 	(region_model::make_region_for_unexpected_tree_code): Assert that
+ 	ctxt is non-NULL.
+ 	(region_model::get_rvalue_1): Pass ctxt to get_svalue_for_fndecl
+ 	and get_svalue_for_label calls.
+ 	(region_model::get_svalue_for_fndecl): Add ctxt param and pass it
+ 	to get_region_for_fndecl.
+ 	(region_model::get_region_for_fndecl): Add ctxt param and pass it
+ 	to get_or_create.
+ 	(region_model::get_svalue_for_label): Add ctxt param and pass it
+ 	to get_region_for_label.
+ 	(region_model::get_region_for_label): Add ctxt param and pass it
+ 	to get_region_for_fndecl and get_or_create.
+ 	(region_model::get_field_region): Add ctxt param and pass it to
+ 	get_or_create_view and get_or_create.
+ 	(make_region_for_type): Replace gcc_unreachable with return NULL.
+ 	(region_model::add_region_for_type): Add ctxt param.  Handle a
+ 	return of NULL from make_region_for_type by calling
+ 	make_region_for_unexpected_tree_code.
+ 	(region_model::get_or_create_mem_ref): Pass ctxt to calls to
+ 	get_or_create_view.
+ 	(region_model::get_or_create_view): Add ctxt param and pass it to
+ 	add_region_for_type.
+ 	(selftest::test_state_merging): Pass ctxt to get_or_create_view.
+ 	* region-model.h (region_model::get_or_create): Add ctxt param.
+ 	(region_model::add_region_for_type): Likewise.
+ 	(region_model::get_svalue_for_fndecl): Likewise.
+ 	(region_model::get_svalue_for_label): Likewise.
+ 	(region_model::get_region_for_fndecl): Likewise.
+ 	(region_model::get_region_for_label): Likewise.
+ 	(region_model::get_field_region): Likewise.
+ 	(region_model::get_or_create_view): Likewise.
+ 
+ 2020-02-24  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* checker-path.cc (superedge_event::should_filter_p): Update
+ 	filter for empty descriptions to cover verbosity level 3 as well
+ 	as 2.
+ 	* diagnostic-manager.cc: Include "analyzer/reachability.h".
+ 	(class path_builder): New class.
+ 	(diagnostic_manager::emit_saved_diagnostic): Create a path_builder
+ 	and pass it to build_emission_path, rather passing eg; similarly
+ 	for add_events_for_eedge and ext_state.
+ 	(diagnostic_manager::build_emission_path): Replace "eg" param
+ 	with a path_builder, pass it to add_events_for_eedge.
+ 	(diagnostic_manager::add_events_for_eedge): Replace ext_state
+ 	param with path_builder; pass it to add_events_for_superedge.
+ 	(diagnostic_manager::significant_edge_p): New.
+ 	(diagnostic_manager::add_events_for_superedge): Add path_builder
+ 	param.  Reject insignificant edges at verbosity levels below 3.
+ 	(diagnostic_manager::prune_for_sm_diagnostic): Update highest
+ 	verbosity level to 4.
+ 	* diagnostic-manager.h (class path_builder): New forward decl.
+ 	(diagnostic_manager::build_emission_path): Replace "eg" param
+ 	with a path_builder.
+ 	(diagnostic_manager::add_events_for_eedge): Replace ext_state
+ 	param with path_builder.
+ 	(diagnostic_manager::significant_edge_p): New.
+ 	(diagnostic_manager::add_events_for_superedge): Add path_builder
+ 	param.
+ 	* reachability.h: New file.
+ 
+ 2020-02-18  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93692
+ 	* analyzer.opt (fdump-analyzer-callgraph): Rewrite description.
+ 
+ 2020-02-18  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93777
+ 	* region-model.cc (region_model::maybe_cast_1): Replace assertion
+ 	that build_cast returns non-NULL with a conditional, falling
+ 	through to the logic which returns a new unknown value of the
+ 	desired type if it fails.
+ 
+ 2020-02-18  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93778
+ 	* engine.cc (impl_region_model_context::on_unknown_tree_code):
+ 	Rename to...
+ 	(impl_region_model_context::on_unexpected_tree_code): ...this and
+ 	convert first argument from path_var to tree.
+ 	(exploded_node::on_stmt): Pass ctxt to purge_for_unknown_fncall.
+ 	* exploded-graph.h (region_model_context::on_unknown_tree_code):
+ 	Rename to...
+ 	(region_model_context::on_unexpected_tree_code): ...this and
+ 	convert first argument from path_var to tree.
+ 	* program-state.cc (sm_state_map::purge_for_unknown_fncall): Add
+ 	ctxt param and pass on to calls to get_rvalue.
+ 	* program-state.h (sm_state_map::purge_for_unknown_fncall): Add
+ 	ctxt param.
+ 	* region-model.cc (region_model::handle_unrecognized_call): Pass
+ 	ctxt on to call to get_rvalue.
+ 	(region_model::get_lvalue_1): Move body of default case to
+ 	region_model::make_region_for_unexpected_tree_code and call it.
+ 	Within COMPONENT_REF case, reject attempts to handle types other
+ 	than RECORD_TYPE and UNION_TYPE.
+ 	(region_model::make_region_for_unexpected_tree_code): New
+ 	function, based on default case of region_model::get_lvalue_1.
+ 	* region-model.h
+ 	(region_model::make_region_for_unexpected_tree_code): New decl.
+ 	(region_model::on_unknown_tree_code): Rename to...
+ 	(region_model::on_unexpected_tree_code): ...this and convert first
+ 	argument from path_var to tree.
+ 	(class test_region_model_context): Update vfunc implementation for
+ 	above change.
+ 
+ 2020-02-18  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93774
+ 	* region-model.cc
+ 	(region_model::convert_byte_offset_to_array_index): Use
+ 	int_size_in_bytes before calling size_in_bytes, to gracefully fail
+ 	on incomplete types.
+ 
+ 2020-02-17  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93775
+ 	* region-model.cc (region_model::get_fndecl_for_call): Handle the
+ 	case where the code_region's get_tree_for_child_region returns
+ 	NULL.
+ 
+ 2020-02-17  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93388
+ 	* engine.cc (impl_region_model_context::on_unknown_tree_code):
+ 	New.
+ 	(exploded_graph::get_or_create_node): Reject invalid states.
+ 	* exploded-graph.h
+ 	(impl_region_model_context::on_unknown_tree_code): New decl.
+ 	(point_and_state::point_and_state): Assert that the state is
+ 	valid.
+ 	* program-state.cc (program_state::program_state): Initialize
+ 	m_valid to true.
+ 	(program_state::operator=): Copy m_valid.
+ 	(program_state::program_state): Likewise for move constructor.
+ 	(program_state::print): Print m_valid.
+ 	(program_state::dump_to_pp): Likewise.
+ 	* program-state.h (program_state::m_valid): New field.
+ 	* region-model.cc (region_model::get_lvalue_1): Implement the
+ 	default case by returning a new symbolic region and calling
+ 	the context's on_unknown_tree_code, rather than issuing an
+ 	internal_error.  Implement VIEW_CONVERT_EXPR.
+ 	* region-model.h (region_model_context::on_unknown_tree_code): New
+ 	vfunc.
+ 	(test_region_model_context::on_unknown_tree_code): New.
+ 
+ 2020-02-17  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* sm-malloc.cc (malloc_diagnostic::describe_state_change): For
+ 	transition to the "null" state, only say "assuming" when
+ 	transitioning from the "unchecked" state.
+ 
+ 2020-02-17  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* diagnostic-manager.h (diagnostic_manager::get_saved_diagnostic):
+ 	Add const overload.
+ 	* engine.cc (exploded_node::dump_dot): Dump saved_diagnostics.
+ 	* exploded-graph.h (exploded_graph::get_diagnostic_manager): Add
+ 	const overload.
+ 
+ 2020-02-11  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93288
+ 	* analysis-plan.cc (analysis_plan::use_summary_p): Look through
+ 	the ultimate_alias_target when getting the called function.
+ 	* engine.cc (exploded_node::on_stmt): Rename second "ctxt" to
+ 	"sm_ctxt".  Use the region_model's get_fndecl_for_call rather than
+ 	gimple_call_fndecl.
+ 	* region-model.cc (region_model::get_fndecl_for_call): Use
+ 	ultimate_alias_target on fndecl.
+ 	* supergraph.cc (get_ultimate_function_for_cgraph_edge): New
+ 	function.
+ 	(supergraph_call_edge): Use it when rejecting edges without
+ 	functions.
+ 	(supergraph::supergraph): Use it to get the function for the
+ 	cgraph_edge when building interprocedural superedges.
+ 	(callgraph_superedge::get_callee_function):  Use it.
+ 	* supergraph.h (supergraph::get_num_snodes): Make param const.
+ 	(supergraph::function_to_num_snodes_t): Make first type param
+ 	const.
+ 
+ 2020-02-11  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93374
+ 	* engine.cc (exploded_edge::exploded_edge): Add ext_state param
+ 	and pass it to change.validate.
+ 	(exploded_graph::get_or_create_node): Move purging of change
+ 	svalues to also cover the case of reusing an existing enode.
+ 	(exploded_graph::add_edge): Pass m_ext_state to exploded_edge's
+ 	ctor.
+ 	* exploded-graph.h (exploded_edge::exploded_edge): Add ext_state
+ 	param.
+ 	* program-state.cc (state_change::sm_change::validate): Likewise.
+ 	Assert that m_sm_idx is sane.  Use ext_state to validate
+ 	m_old_state and m_new_state.
+ 	(state_change::validate): Add ext_state param and pass it to
+ 	the sm_change validate calls.
+ 	* program-state.h (state_change::sm_change::validate): Add
+ 	ext_state param.
+ 	(state_change::validate): Likewise.
+ 
+ 2020-02-11  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93669
+ 	* engine.cc (exploded_graph::dump_exploded_nodes): Handle missing
+ 	case of STATUS_WORKLIST in implementation of
+ 	"__analyzer_dump_exploded_nodes".
+ 
+ 2020-02-11  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93649
+ 	* constraint-manager.cc (constraint_manager::add_constraint): When
+ 	merging equivalence classes and updating m_constant, also update
+ 	m_cst_sid.
+ 	(constraint_manager::validate): If m_constant is non-NULL assert
+ 	that m_cst_sid is non-null and is valid.
+ 
+ 2020-02-11  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93657
+ 	* analyzer.opt (fdump-analyzer): Reword description.
+ 	(fdump-analyzer-stderr): Likewise.
+ 
+ 2020-02-11  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* region-model.cc (print_quoted_type): New function.
+ 	(svalue::print): Use it to replace %qT.
+ 	(region::dump_to_pp): Likewise.
+ 	(region::dump_child_label): Likewise.
+ 	(region::print_fields): Likewise.
+ 
+ 2020-02-10  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93659
+ 	* analyzer.opt (-param=analyzer-max-recursion-depth=): Fix "tha"
+ 	-> "that" typo.
+ 	(Wanalyzer-use-of-uninitialized-value): Fix "initialized" ->
+ 	"uninitialized" typo.
+ 
+ 2020-02-10  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93350
+ 	* region-model.cc (region_model::get_lvalue_1):
+ 	Handle BIT_FIELD_REF.
+ 	(make_region_for_type): Handle VECTOR_TYPE.
+ 
+ 2020-02-10  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93647
+ 	* diagnostic-manager.cc
+ 	(diagnostic_manager::prune_for_sm_diagnostic): Bulletproof against
+ 	VAR being constant.
+ 	* region-model.cc (region_model::get_lvalue_1): Provide a better
+ 	error message when encountering an unhandled tree code.
+ 
+ 2020-02-10  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93405
+ 	* region-model.cc (region_model::get_lvalue_1): Implement
+ 	CONST_DECL.
+ 
+ 2020-02-06  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* region-model.cc (region_model::maybe_cast_1): Attempt to provide
+ 	a region_svalue if either type is a pointer, rather than if both
+ 	types are pointers.
+ 
+ 2020-02-05  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* engine.cc (exploded_node::dump_dot): Show merger enodes.
+ 	(worklist::add_node): Assert that the node's m_status is
+ 	STATUS_WORKLIST.
+ 	(exploded_graph::process_worklist): Likewise for nodes from the
+ 	worklist.  Set status of merged nodes to STATUS_MERGER.
+ 	(exploded_graph::process_node): Set status of node to
+ 	STATUS_PROCESSED.
+ 	(exploded_graph::dump_exploded_nodes): Rework handling of
+ 	"__analyzer_dump_exploded_nodes", splitting enodes by status into
+ 	"processed" and "merger", showing the count of just the processed
+ 	enodes at the call, rather than the count of all enodes.
+ 	* exploded-graph.h (exploded_node::status): New enum.
+ 	(exploded_node::exploded_node): Initialize m_status to
+ 	STATUS_WORKLIST.
+ 	(exploded_node::get_status): New getter.
+ 	(exploded_node::set_status): New setter.
+ 
+ 2020-02-04  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93543
+ 	* engine.cc (pod_hash_traits<function_call_string>::mark_empty):
+ 	Eliminate reinterpret_cast.
+ 	(pod_hash_traits<function_call_string>::is_empty): Likewise.
+ 
+ 2020-02-03  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* constraint-manager.cc (range::constrained_to_single_element):
+ 	Replace fold_build2 with fold_binary.  Remove unnecessary newline.
+ 	(constraint_manager::get_or_add_equiv_class): Replace fold_build2
+ 	with fold_binary in two places, and remove out-of-date comment.
+ 	(constraint_manager::eval_condition): Replace fold_build2 with
+ 	fold_binary.
+ 	* region-model.cc (constant_svalue::eval_condition): Likewise.
+ 	(region_model::on_assignment): Likewise.
+ 
+ 2020-02-03  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93544
+ 	* diagnostic-manager.cc
+ 	(diagnostic_manager::prune_for_sm_diagnostic): Bulletproof
+ 	against bad choices due to bad paths.
+ 	* engine.cc (impl_region_model_context::on_phi): New.
+ 	* exploded-graph.h (impl_region_model_context::on_phi): New decl.
+ 	* region-model.cc (region_model::on_longjmp): Likewise.
+ 	(region_model::handle_phi): Add phi param.  Call the ctxt's on_phi
+ 	vfunc.
+ 	(region_model::update_for_phis): Pass phi to handle_phi.
+ 	* region-model.h (region_model::handle_phi): Add phi param.
+ 	(region_model_context::on_phi): New vfunc.
+ 	(test_region_model_context::on_phi): New.
+ 	* sm-malloc.cc (malloc_state_machine::on_phi): New.
+ 	(malloc_state_machine::on_zero_assignment): New.
+ 	* sm.h (state_machine::on_phi): New vfunc.
+ 
+ 2020-02-03  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* engine.cc (supernode_cluster::dump_dot): Show BB index as
+ 	well as SN index.
+ 	* supergraph.cc (supernode::dump_dot): Likewise.
+ 
+ 2020-02-03  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93546
+ 	* region-model.cc (region_model::on_call_pre): Update for new
+ 	param of symbolic_region ctor.
+ 	(region_model::deref_rvalue): Likewise.
+ 	(region_model::add_new_malloc_region): Likewise.
+ 	(make_region_for_type): Likewise, preserving type.
+ 	* region-model.h (symbolic_region::symbolic_region): Add "type"
+ 	param and pass it to base class ctor.
+ 
+ 2020-02-03  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93547
+ 	* constraint-manager.cc
+ 	(constraint_manager::get_or_add_equiv_class): Ensure types are
+ 	compatible before comparing constants.
+ 
+ 2020-01-31  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93457
+ 	* region-model.cc (make_region_for_type): Use VOID_TYPE_P rather
+ 	than checking against void_type_node.
+ 
+ 2020-01-31  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93373
+ 	* region-model.cc (ASSERT_COMPAT_TYPES): Convert to...
+ 	(assert_compat_types): ...this, and bail when either type is NULL,
+ 	or when VOID_TYPE_P (dst_type).
+ 	(region_model::get_lvalue): Update for above conversion.
+ 	(region_model::get_rvalue): Likewise.
+ 
+ 2020-01-31  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93379
+ 	* region-model.cc (region_model::update_for_return_superedge):
+ 	Move check for null result so that it also guards setting the
+ 	lhs.
+ 
+ 2020-01-31  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93438
+ 	* region-model.cc (stack_region::can_merge_p): Split into a two
+ 	pass approach, creating all stack regions first, then populating
+ 	them.
+ 	(selftest::test_state_merging): Add test coverage for (a) the case
+ 	of self-merging a model in which a local in an older stack frame
+ 	points to a local in a more recent stack frame (which previously
+ 	would ICE), and (b) the case of self-merging a model in which a
+ 	local points to a global (which previously worked OK).
+ 
+ 2020-01-31  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* analyzer.cc (is_named_call_p): Replace tests for fndecl being
+ 	extern at file scope and having a non-NULL DECL_NAME with a call
+ 	to maybe_special_function_p.
+ 	* function-set.cc (function_set::contains_decl_p): Add call to
+ 	maybe_special_function_p.
+ 
+ 2020-01-31  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93450
+ 	* constraint-manager.cc
+ 	(constraint_manager::get_or_add_equiv_class): Only compare constants
+ 	if their types are compatible.
+ 	* region-model.cc (constant_svalue::eval_condition): Replace check
+ 	for identical types with call to types_compatible_p.
+ 
+ 2020-01-30  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* program-state.cc (extrinsic_state::dump_to_pp): New.
+ 	(extrinsic_state::dump_to_file): New.
+ 	(extrinsic_state::dump): New.
+ 	* program-state.h (extrinsic_state::dump_to_pp): New decl.
+ 	(extrinsic_state::dump_to_file): New decl.
+ 	(extrinsic_state::dump): New decl.
+ 	* sm.cc: Include "pretty-print.h".
+ 	(state_machine::dump_to_pp): New.
+ 	* sm.h (state_machine::dump_to_pp): New decl.
+ 
+ 2020-01-30  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* diagnostic-manager.cc (for_each_state_change): Use
+ 	extrinsic_state::get_num_checkers rather than accessing m_checkers
+ 	directly.
+ 	* program-state.cc (program_state::program_state): Likewise.
+ 	* program-state.h (extrinsic_state::m_checkers): Make private.
+ 
+ 2020-01-30  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93356
+ 	* region-model.cc (region_model::eval_condition): In both
+ 	overloads, bail out immediately on floating-point types.
+ 	(region_model::eval_condition_without_cm): Likewise.
+ 	(region_model::add_constraint): Likewise.
+ 
+ 2020-01-30  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93450
+ 	* program-state.cc (sm_state_map::set_state): For the overload
+ 	taking an svalue_id, bail out if the set_state on the ec does
+ 	nothing.  Convert the latter's return type from void to bool,
+ 	returning true if anything changed.
+ 	(sm_state_map::impl_set_state): Convert the return type from void
+ 	to bool, returning true if the state changed.
+ 	* program-state.h (sm_state_map::set_state): Convert return type
+ 	from void to bool.
+ 	(sm_state_map::impl_set_state): Likewise.
+ 	* region-model.cc (constant_svalue::eval_condition): Only call
+ 	fold_build2 if the types are the same.
+ 
+ 2020-01-29  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* analyzer.h (PUSH_IGNORE_WFORMAT, POP_IGNORE_WFORMAT): Remove.
+ 	* constraint-manager.cc: Include diagnostic-core.h before graphviz.h.
+ 	(range::dump, equiv_class::print): Don't use PUSH_IGNORE_WFORMAT or
+ 	POP_IGNORE_WFORMAT.
+ 	* state-purge.cc: Include diagnostic-core.h before
+ 	gimple-pretty-print.h.
+ 	(state_purge_annotator::add_node_annotations, print_vec_of_names):
+ 	Don't use PUSH_IGNORE_WFORMAT or POP_IGNORE_WFORMAT.
+ 	* region-model.cc: Move diagnostic-core.h include before graphviz.h.
+ 	(path_var::dump, svalue::print, constant_svalue::print_details,
+ 	region::dump_to_pp, region::dump_child_label, region::print_fields,
+ 	map_region::print_fields, map_region::dump_dot_to_pp,
+ 	map_region::dump_child_label, array_region::print_fields,
+ 	array_region::dump_dot_to_pp): Don't use PUSH_IGNORE_WFORMAT or
+ 	POP_IGNORE_WFORMAT.
+ 
+ 2020-01-28  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93316
+ 	* engine.cc (rewind_info_t::update_model): Get the longjmp call
+ 	stmt via get_longjmp_call () rather than assuming it is the last
+ 	stmt in the longjmp's supernode.
+ 	(rewind_info_t::add_events_to_path): Get the location_t for the
+ 	rewind_from_longjmp_event via get_longjmp_call () rather than from
+ 	the supernode's get_end_location ().
+ 
+ 2020-01-28  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* region-model.cc (poisoned_value_diagnostic::emit): Update for
+ 	renaming of warning_at overload to warning_meta.
+ 	* sm-file.cc (file_leak::emit): Likewise.
+ 	* sm-malloc.cc (double_free::emit): Likewise.
+ 	(possible_null_deref::emit): Likewise.
+ 	(possible_null_arg::emit): Likewise.
+ 	(null_deref::emit): Likewise.
+ 	(null_arg::emit): Likewise.
+ 	(use_after_free::emit): Likewise.
+ 	(malloc_leak::emit): Likewise.
+ 	(free_of_non_heap::emit): Likewise.
+ 	* sm-sensitive.cc (exposure_through_output_file::emit): Likewise.
+ 	* sm-signal.cc (signal_unsafe_call::emit): Likewise.
+ 	* sm-taint.cc (tainted_array_index::emit): Likewise.
+ 
+ 2020-01-27  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93451
+ 	* region-model.cc (tree_cmp): For the REAL_CST case, impose an
+ 	arbitrary order on NaNs relative to other NaNs and to non-NaNs;
+ 	const-correctness tweak.
+ 	(ana::selftests::build_real_cst_from_string): New function.
+ 	(ana::selftests::append_interesting_constants): New function.
+ 	(ana::selftests::test_tree_cmp_on_constants): New test.
+ 	(ana::selftests::test_canonicalization_4): New test.
+ 	(ana::selftests::analyzer_region_model_cc_tests): Call the new
+ 	tests.
+ 
+ 2020-01-27  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93349
+ 	* engine.cc (run_checkers): Save and restore input_location.
+ 
+ 2020-01-27  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* call-string.cc (call_string::cmp_1): Delete, moving body to...
+ 	(call_string::cmp): ...here.
+ 	* call-string.h (call_string::cmp_1): Delete decl.
+ 	* engine.cc (worklist::key_t::cmp_1): Delete, moving body to...
+ 	(worklist::key_t::cmp): ...here.  Implement hash comparisons
+ 	via comparison rather than subtraction to avoid overflow issues.
+ 	* exploded-graph.h (worklist::key_t::cmp_1): Delete decl.
+ 	* region-model.cc (tree_cmp): Eliminate buggy checking for
+ 	symmetry.
+ 
+ 2020-01-27  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* analyzer.cc  (is_named_call_p): Check that fndecl is "extern"
+ 	and at file scope.  Potentially disregard prefix _ or __ in
+ 	fndecl's name.  Bail if the identifier is NULL.
+ 	(is_setjmp_call_p): Expect a gcall rather than plain gimple.
+ 	Remove special-case check for leading prefix, and also check for
+ 	sigsetjmp.
+ 	(is_longjmp_call_p): Also check for siglongjmp.
+ 	(get_user_facing_name): New function.
+ 	* analyzer.h (is_setjmp_call_p): Expect a gcall rather than plain
+ 	gimple.
+ 	(get_user_facing_name): New decl.
+ 	* checker-path.cc (setjmp_event::get_desc): Use
+ 	get_user_facing_name to avoid hardcoding the function name.
+ 	(rewind_event::rewind_event): Add rewind_info param, using it to
+ 	initialize new m_rewind_info field, and strengthen the assertion.
+ 	(rewind_from_longjmp_event::get_desc): Use get_user_facing_name to
+ 	avoid hardcoding the function name.
+ 	(rewind_to_setjmp_event::get_desc): Likewise.
+ 	* checker-path.h (setjmp_event::setjmp_event): Add setjmp_call
+ 	param and use it to initialize...
+ 	(setjmp_event::m_setjmp_call): New field.
+ 	(rewind_event::rewind_event): Add rewind_info param.
+ 	(rewind_event::m_rewind_info): New protected field.
+ 	(rewind_from_longjmp_event::rewind_from_longjmp_event): Add
+ 	rewind_info param.
+ 	(class rewind_to_setjmp_event): Move rewind_info field to parent
+ 	class.
+ 	* diagnostic-manager.cc (diagnostic_manager::add_events_for_eedge):
+ 	Update setjmp-handling for is_setjmp_call_p requiring a gcall;
+ 	pass the call to the new setjmp_event.
+ 	* engine.cc (exploded_node::on_stmt): Update for is_setjmp_call_p
+ 	requiring a gcall.
+ 	(stale_jmp_buf::emit): Use get_user_facing_name to avoid
+ 	hardcoding the function names.
+ 	(exploded_node::on_longjmp): Pass the longjmp_call when
+ 	constructing rewind_info.
+ 	(rewind_info_t::add_events_to_path): Pass the rewind_info_t to the
+ 	rewind_from_longjmp_event's ctor.
+ 	* exploded-graph.h (rewind_info_t::rewind_info_t): Add
+ 	longjmp_call param.
+ 	(rewind_info_t::get_longjmp_call): New.
+ 	(rewind_info_t::m_longjmp_call): New.
+ 	* region-model.cc (region_model::on_setjmp): Update comment to
+ 	indicate this is also for sigsetjmp.
+ 	* region-model.h (struct setjmp_record): Likewise.
+ 	(class setjmp_svalue): Likewise.
+ 
+ 2020-01-27  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93276
+ 	* analyzer.h (PUSH_IGNORE_WFORMAT, POP_IGNORE_WFORMAT): Guard these
+ 	macros with GCC_VERSION >= 4006, making them no-op otherwise.
+ 	* engine.cc (exploded_edge::exploded_edge): Specify template for
+ 	base class initializer.
+ 	(exploded_graph::add_edge): Specify template when chaining up to
+ 	base class add_edge implementation.
+ 	(viz_callgraph_node::dump_dot): Drop redundant "typename".
+ 	(viz_callgraph_edge::viz_callgraph_edge): Specify template for
+ 	base class initializer.
+ 	* program-state.cc (sm_state_map::clone_with_remapping): Drop
+ 	redundant "typename".
+ 	(sm_state_map::print): Likewise.
+ 	(sm_state_map::hash): Likewise.
+ 	(sm_state_map::operator==): Likewise.
+ 	(sm_state_map::remap_svalue_ids): Likewise.
+ 	(sm_state_map::on_svalue_purge): Likewise.
+ 	(sm_state_map::validate): Likewise.
+ 	* program-state.h (sm_state_map::iterator_t): Likewise.
+ 	* supergraph.h (superedge::superedge): Specify template for base
+ 	class initializer.
+ 
+ 2020-01-23  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93375
+ 	* supergraph.cc (callgraph_superedge::get_arg_for_parm): Fail
+ 	gracefully is the number of parameters at the callee exceeds the
+ 	number of arguments at the call stmt.
+ 	(callgraph_superedge::get_parm_for_arg): Likewise.
+ 
+ 2020-01-22  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93382
+ 	* program-state.cc (sm_state_map::on_svalue_purge): If the
+ 	entry survives, but the origin is being purged, then reset the
+ 	origin to null.
+ 
+ 2020-01-22  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* sm-signal.cc: Fix nesting of CHECKING_P and namespace ana.
+ 
+ 2020-01-22  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93378
+ 	* engine.cc (setjmp_svalue::compare_fields): Update for
+ 	replacement of m_enode with m_setjmp_record.
+ 	(setjmp_svalue::add_to_hash): Likewise.
+ 	(setjmp_svalue::get_index): Rename...
+ 	(setjmp_svalue::get_enode_index): ...to this.
+ 	(setjmp_svalue::print_details): Update for replacement of m_enode
+ 	with m_setjmp_record.
+ 	(exploded_node::on_longjmp): Likewise.
+ 	* exploded-graph.h (rewind_info_t::m_enode_origin): Replace...
+ 	(rewind_info_t::m_setjmp_record): ...with this.
+ 	(rewind_info_t::rewind_info_t): Update for replacement of m_enode
+ 	with m_setjmp_record.
+ 	(rewind_info_t::get_setjmp_point): Likewise.
+ 	(rewind_info_t::get_setjmp_call): Likewise.
+ 	* region-model.cc (region_model::dump_summary_of_map): Likewise.
+ 	(region_model::on_setjmp): Likewise.
+ 	* region-model.h (struct setjmp_record): New struct.
+ 	(setjmp_svalue::m_enode): Replace...
+ 	(setjmp_svalue::m_setjmp_record): ...with this.
+ 	(setjmp_svalue::setjmp_svalue): Update for replacement of m_enode
+ 	with m_setjmp_record.
+ 	(setjmp_svalue::clone): Likewise.
+ 	(setjmp_svalue::get_index): Rename...
+ 	(setjmp_svalue::get_enode_index): ...to this.
+ 	(setjmp_svalue::get_exploded_node): Replace...
+ 	(setjmp_svalue::get_setjmp_record): ...with this.
+ 
+ 2020-01-22  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93316
+ 	* analyzer.cc (is_setjmp_call_p): Check for "setjmp" as well as
+ 	"_setjmp".
+ 
+ 2020-01-22  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93307
+ 	* analysis-plan.h: Wrap everything namespace "ana".
+ 	* analyzer-logging.cc: Likewise.
+ 	* analyzer-logging.h: Likewise.
+ 	* analyzer-pass.cc (pass_analyzer::execute): Update for "ana"
+ 	namespace.
+ 	* analyzer-selftests.cc: Wrap everything namespace "ana".
+ 	* analyzer-selftests.h: Likewise.
+ 	* analyzer.h: Likewise for forward decls of types.
+ 	* call-string.h: Likewise.
+ 	* checker-path.cc: Likewise.
+ 	* checker-path.h: Likewise.
+ 	* constraint-manager.cc: Likewise.
+ 	* constraint-manager.h: Likewise.
+ 	* diagnostic-manager.cc: Likewise.
+ 	* diagnostic-manager.h: Likewise.
+ 	* engine.cc: Likewise.
+ 	* engine.h: Likewise.
+ 	* exploded-graph.h: Likewise.
+ 	* function-set.cc: Likewise.
+ 	* function-set.h: Likewise.
+ 	* pending-diagnostic.cc: Likewise.
+ 	* pending-diagnostic.h: Likewise.
+ 	* program-point.cc: Likewise.
+ 	* program-point.h: Likewise.
+ 	* program-state.cc: Likewise.
+ 	* program-state.h: Likewise.
+ 	* region-model.cc: Likewise.
+ 	* region-model.h: Likewise.
+ 	* sm-file.cc: Likewise.
+ 	* sm-malloc.cc: Likewise.
+ 	* sm-pattern-test.cc: Likewise.
+ 	* sm-sensitive.cc: Likewise.
+ 	* sm-signal.cc: Likewise.
+ 	* sm-taint.cc: Likewise.
+ 	* sm.cc: Likewise.
+ 	* sm.h: Likewise.
+ 	* state-purge.h: Likewise.
+ 	* supergraph.cc: Likewise.
+ 	* supergraph.h: Likewise.
+ 
+ 2020-01-21  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93352
+ 	* region-model.cc (int_cmp): Rename to...
+ 	(array_region::key_cmp): ...this, using key_t rather than int.
+ 	Rewrite in terms of comparisons rather than subtraction to
+ 	ensure qsort is anti-symmetric when handling extreme values.
+ 	(array_region::walk_for_canonicalization): Update for above
+ 	renaming.
+ 	* region-model.h (array_region::key_cmp): New decl.
+ 
+ 2020-01-17  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93290
+ 	* region-model.cc (region_model::eval_condition_without_cm): Avoid
+ 	gcc_unreachable for unexpected operations for the case where
+ 	we're comparing an svalue against itself.
+ 
+ 2020-01-17  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93281
+ 	* region-model.cc
+ 	(region_model::convert_byte_offset_to_array_index): Convert to
+ 	ssizetype before dividing by byte_size.  Use fold_binary rather
+ 	than fold_build2 to avoid needlessly constructing a tree for the
+ 	non-const case.
+ 
+ 2020-01-15  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* engine.cc (class impl_region_model_context): Fix comment.
+ 
+ 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/93212
+ 	* region-model.cc (make_region_for_type): Use
+ 	FUNC_OR_METHOD_TYPE_P rather than comparing against FUNCTION_TYPE.
+ 	* region-model.h (function_region::function_region): Likewise.
+ 
+ 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* program-state.cc (sm_state_map::clone_with_remapping): Copy
+ 	m_global_state.
+ 	(selftest::test_program_state_merging_2): New selftest.
+ 	(selftest::analyzer_program_state_cc_tests): Call it.
+ 
+ 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* checker-path.h (checker_path::get_checker_event): New function.
+ 	(checker_path): Add DISABLE_COPY_AND_ASSIGN; make fields private.
+ 	* diagnostic-manager.cc
+ 	(diagnostic_manager::prune_for_sm_diagnostic): Replace direct
+ 	access to checker_path::m_events with accessor functions.  Fix
+ 	overlong line.
+ 	(diagnostic_manager::prune_interproc_events): Replace direct
+ 	access to checker_path::m_events with accessor functions.
+ 	(diagnostic_manager::finish_pruning): Likewise.
+ 
+ 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* checker-path.h (checker_event::clone): Delete vfunc decl.
+ 	(debug_event::clone): Delete vfunc impl.
+ 	(custom_event::clone): Delete vfunc impl.
+ 	(statement_event::clone): Delete vfunc impl.
+ 	(function_entry_event::clone): Delete vfunc impl.
+ 	(state_change_event::clone): Delete vfunc impl.
+ 	(start_cfg_edge_event::clone): Delete vfunc impl.
+ 	(end_cfg_edge_event::clone): Delete vfunc impl.
+ 	(call_event::clone): Delete vfunc impl.
+ 	(return_event::clone): Delete vfunc impl.
+ 	(setjmp_event::clone): Delete vfunc impl.
+ 	(rewind_from_longjmp_event::clone): Delete vfunc impl.
+ 	(rewind_to_setjmp_event::clone): Delete vfunc impl.
+ 	(warning_event::clone): Delete vfunc impl.
+ 
+ 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* supergraph.cc (supernode::dump_dot): Ensure that the TABLE
+ 	element has at least one TR.
+ 
+ 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/58237
+ 	* engine.cc (leak_stmt_finder::find_stmt): Use get_pure_location
+ 	when comparing against UNKNOWN_LOCATION.
+ 	(stmt_requires_new_enode_p): Likewise.
+ 	(exploded_graph::dump_exploded_nodes): Likewise.
+ 	* supergraph.cc (supernode::get_start_location): Likewise.
+ 	(supernode::get_end_location): Likewise.
+ 
+ 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	PR analyzer/58237
+ 	* analyzer-selftests.cc (selftest::run_analyzer_selftests): Call
+ 	selftest::analyzer_sm_file_cc_tests.
+ 	* analyzer-selftests.h (selftest::analyzer_sm_file_cc_tests): New
+ 	decl.
+ 	* sm-file.cc: Include "analyzer/function-set.h" and
+ 	"analyzer/analyzer-selftests.h".
+ 	(get_file_using_fns): New function.
+ 	(is_file_using_fn_p): New function.
+ 	(fileptr_state_machine::on_stmt): Return true for known functions.
+ 	(selftest::analyzer_sm_file_cc_tests): New function.
+ 
+ 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* analyzer-selftests.cc (selftest::run_analyzer_selftests): Call
+ 	selftest::analyzer_sm_signal_cc_tests.
+ 	* analyzer-selftests.h (selftest::analyzer_sm_signal_cc_tests):
+ 	New decl.
+ 	* sm-signal.cc: Include "analyzer/function-set.h" and
+ 	"analyzer/analyzer-selftests.h".
+ 	(get_async_signal_unsafe_fns): New function.
+ 	(signal_unsafe_p): Reimplement in terms of the above.
+ 	(selftest::analyzer_sm_signal_cc_tests): New function.
+ 
+ 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* analyzer-selftests.cc (selftest::run_analyzer_selftests): Call
+ 	selftest::analyzer_function_set_cc_tests.
+ 	* analyzer-selftests.h (selftest::analyzer_function_set_cc_tests):
+ 	New decl.
+ 	* function-set.cc: New file.
+ 	* function-set.h: New file.
+ 
+ 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* analyzer.h (fndecl_has_gimple_body_p): New decl.
+ 	* engine.cc (impl_region_model_context::on_unknown_change): New
+ 	function.
+ 	(fndecl_has_gimple_body_p): Make non-static.
+ 	(exploded_node::on_stmt): Treat __analyzer_dump_exploded_nodes as
+ 	known.  Track whether we have a call with unknown side-effects and
+ 	pass it to on_call_post.
+ 	* exploded-graph.h (impl_region_model_context::on_unknown_change):
+ 	New decl.
+ 	* program-state.cc (sm_state_map::on_unknown_change): New function.
+ 	* program-state.h (sm_state_map::on_unknown_change): New decl.
+ 	* region-model.cc: Include "bitmap.h".
+ 	(region_model::on_call_pre): Return a bool, capturing whether the
+ 	call has unknown side effects.
+ 	(region_model::on_call_post): Add arg "bool unknown_side_effects"
+ 	and if true, call handle_unrecognized_call.
+ 	(class reachable_regions): New class.
+ 	(region_model::handle_unrecognized_call): New function.
+ 	* region-model.h (region_model::on_call_pre): Return a bool.
+ 	(region_model::on_call_post): Add arg "bool unknown_side_effects".
+ 	(region_model::handle_unrecognized_call): New decl.
+ 	(region_model_context::on_unknown_change): New vfunc.
+ 	(test_region_model_context::on_unknown_change): New function.
+ 
+ 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* diagnostic-manager.cc (saved_diagnostic::operator==): Move here
+ 	from header.  Replace pointer equality test on m_var with call to
+ 	pending_diagnostic::same_tree_p.
+ 	* diagnostic-manager.h (saved_diagnostic::operator==): Move to
+ 	diagnostic-manager.cc.
+ 	* pending-diagnostic.cc (pending_diagnostic::same_tree_p): New.
+ 	* pending-diagnostic.h (pending_diagnostic::same_tree_p): New.
+ 	* sm-file.cc (file_diagnostic::subclass_equal_p): Replace pointer
+ 	equality on m_arg with call to pending_diagnostic::same_tree_p.
+ 	* sm-malloc.cc (malloc_diagnostic::subclass_equal_p): Likewise.
+ 	(possible_null_arg::subclass_equal_p): Likewise.
+ 	(null_arg::subclass_equal_p): Likewise.
+ 	(free_of_non_heap::subclass_equal_p): Likewise.
+ 	* sm-pattern-test.cc (pattern_match::operator==): Likewise.
+ 	* sm-sensitive.cc (exposure_through_output_file::operator==):
+ 	Likewise.
+ 	* sm-taint.cc (tainted_array_index::operator==): Likewise.
+ 
+ 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* diagnostic-manager.cc (dedupe_winners::add): Add logging
+ 	of deduplication decisions made.
+ 
+ 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* ChangeLog: New file.
+ 	* analyzer-selftests.cc: New file.
+ 	* analyzer-selftests.h: New file.
+ 	* analyzer.opt: New file.
+ 	* analysis-plan.cc: New file.
+ 	* analysis-plan.h: New file.
+ 	* analyzer-logging.cc: New file.
+ 	* analyzer-logging.h: New file.
+ 	* analyzer-pass.cc: New file.
+ 	* analyzer.cc: New file.
+ 	* analyzer.h: New file.
+ 	* call-string.cc: New file.
+ 	* call-string.h: New file.
+ 	* checker-path.cc: New file.
+ 	* checker-path.h: New file.
+ 	* constraint-manager.cc: New file.
+ 	* constraint-manager.h: New file.
+ 	* diagnostic-manager.cc: New file.
+ 	* diagnostic-manager.h: New file.
+ 	* engine.cc: New file.
+ 	* engine.h: New file.
+ 	* exploded-graph.h: New file.
+ 	* pending-diagnostic.cc: New file.
+ 	* pending-diagnostic.h: New file.
+ 	* program-point.cc: New file.
+ 	* program-point.h: New file.
+ 	* program-state.cc: New file.
+ 	* program-state.h: New file.
+ 	* region-model.cc: New file.
+ 	* region-model.h: New file.
+ 	* sm-file.cc: New file.
+ 	* sm-malloc.cc: New file.
+ 	* sm-malloc.dot: New file.
+ 	* sm-pattern-test.cc: New file.
+ 	* sm-sensitive.cc: New file.
+ 	* sm-signal.cc: New file.
+ 	* sm-taint.cc: New file.
+ 	* sm.cc: New file.
+ 	* sm.h: New file.
+ 	* state-purge.cc: New file.
+ 	* state-purge.h: New file.
+ 	* supergraph.cc: New file.
+ 	* supergraph.h: New file.
+ 
+ 2019-12-13  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* Initial creation
+ 
+ 
+ Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved.
diff -Nrcpad gcc-9.3.0/gcc/analyzer/analysis-plan.cc gcc-10.1.0/gcc/analyzer/analysis-plan.cc
*** gcc-9.3.0/gcc/analyzer/analysis-plan.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/analysis-plan.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,134 ----
+ /* A class to encapsulate decisions about how the analysis should happen.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "options.h"
+ #include "cgraph.h"
+ #include "timevar.h"
+ #include "ipa-utils.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "diagnostic-core.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/analysis-plan.h"
+ #include "ordered-hash-map.h"
+ #include "options.h"
+ #include "cgraph.h"
+ #include "function.h"
+ #include "cfg.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "gimple-iterator.h"
+ #include "digraph.h"
+ #include "analyzer/supergraph.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ /* class analysis_plan.  */
+ 
+ /* analysis_plan's ctor.  */
+ 
+ analysis_plan::analysis_plan (const supergraph &sg, logger *logger)
+ : log_user (logger), m_sg (sg),
+   m_cgraph_node_postorder (XCNEWVEC (struct cgraph_node *,
+ 				     symtab->cgraph_count)),
+   m_index_by_uid (symtab->cgraph_max_uid)
+ {
+   LOG_SCOPE (logger);
+   auto_timevar time (TV_ANALYZER_PLAN);
+ 
+   m_num_cgraph_nodes = ipa_reverse_postorder (m_cgraph_node_postorder);
+   gcc_assert (m_num_cgraph_nodes == symtab->cgraph_count);
+   if (get_logger_file ())
+     ipa_print_order (get_logger_file (),
+ 		     "analysis_plan", m_cgraph_node_postorder,
+ 		     m_num_cgraph_nodes);
+ 
+   /* Populate m_index_by_uid.  */
+   for (int i = 0; i < symtab->cgraph_max_uid; i++)
+     m_index_by_uid.quick_push (-1);
+   for (int i = 0; i < m_num_cgraph_nodes; i++)
+     {
+       gcc_assert (m_cgraph_node_postorder[i]->get_uid ()
+ 		  < symtab->cgraph_max_uid);
+       m_index_by_uid[m_cgraph_node_postorder[i]->get_uid ()] = i;
+     }
+ }
+ 
+ /* analysis_plan's dtor.  */
+ 
+ analysis_plan::~analysis_plan ()
+ {
+   free (m_cgraph_node_postorder);
+ }
+ 
+ /* Comparator for use by the exploded_graph's worklist, to order FUN_A
+    and FUN_B so that functions that are to be summarized are visited
+    before the summary is needed (based on a sort of the callgraph).  */
+ 
+ int
+ analysis_plan::cmp_function (function *fun_a, function *fun_b) const
+ {
+   cgraph_node *node_a = cgraph_node::get (fun_a->decl);
+   cgraph_node *node_b = cgraph_node::get (fun_b->decl);
+ 
+   int idx_a = m_index_by_uid[node_a->get_uid ()];
+   int idx_b = m_index_by_uid[node_b->get_uid ()];
+ 
+   return idx_b - idx_a;
+ }
+ 
+ /* Return true if the call EDGE should be analyzed using a call summary.
+    Return false if it should be analyzed using a full call and return.  */
+ 
+ bool
+ analysis_plan::use_summary_p (const cgraph_edge *edge) const
+ {
+   /* Don't use call summaries if -fno-analyzer-call-summaries.  */
+   if (!flag_analyzer_call_summaries)
+     return false;
+ 
+   /* TODO: don't count callsites each time.  */
+   int num_call_sites = 0;
+   const cgraph_node *callee = edge->callee;
+   for (cgraph_edge *edge = callee->callers; edge; edge = edge->next_caller)
+     ++num_call_sites;
+ 
+   /* Don't use a call summary if there's only one call site.  */
+   if (num_call_sites <= 1)
+     return false;
+ 
+   /* Require the callee to be sufficiently complex to be worth
+      summarizing.  */
+   const function *fun
+     = const_cast <cgraph_node *> (callee)->ultimate_alias_target ()->get_fun ();
+   /* TODO(stage1): can ultimate_alias_target be made const?  */
+ 
+   if ((int)m_sg.get_num_snodes (fun)
+       < param_analyzer_min_snodes_for_call_summary)
+     return false;
+ 
+   return true;
+ }
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/analysis-plan.h gcc-10.1.0/gcc/analyzer/analysis-plan.h
*** gcc-9.3.0/gcc/analyzer/analysis-plan.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/analysis-plan.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,60 ----
+ /* A class to encapsulate decisions about how the analysis should happen.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_ANALYSIS_PLAN_H
+ #define GCC_ANALYZER_ANALYSIS_PLAN_H
+ 
+ namespace ana {
+ 
+ /* A class to encapsulate decisions about how the analysis should happen.
+    Examples:
+    - the order in which functions should be analyzed, so that function
+      summaries are created before analysis of call sites that might use
+      them
+    - which callgraph edges should use call summaries
+    TODO: the above is a work-in-progress.  */
+ 
+ class analysis_plan : public log_user
+ {
+ public:
+   analysis_plan (const supergraph &sg, logger *logger);
+   ~analysis_plan ();
+ 
+   int cmp_function (function *fun_a, function *fun_b) const;
+ 
+   bool use_summary_p (const cgraph_edge *edge) const;
+ 
+ private:
+   DISABLE_COPY_AND_ASSIGN (analysis_plan);
+ 
+   const supergraph &m_sg;
+ 
+   /* Result of ipa_reverse_postorder.  */
+   cgraph_node **m_cgraph_node_postorder;
+   int m_num_cgraph_nodes;
+ 
+   /* Index of each node within the postorder ordering,
+      accessed via the "m_uid" field.  */
+   auto_vec<int> m_index_by_uid;
+ };
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_ANALYSIS_PLAN_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/analyzer-logging.cc gcc-10.1.0/gcc/analyzer/analyzer-logging.cc
*** gcc-9.3.0/gcc/analyzer/analyzer-logging.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/analyzer-logging.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,228 ----
+ /* Hierarchical log messages for the analyzer.
+    Copyright (C) 2014-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "toplev.h" /* for print_version */
+ #include "pretty-print.h" /* for print_version */
+ #include "diagnostic.h"
+ #include "tree-diagnostic.h"
+ 
+ #include "analyzer/analyzer-logging.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ /* Implementation of class logger.  */
+ 
+ /* ctor for logger.  */
+ 
+ logger::logger (FILE *f_out,
+ 		int, /* flags */
+ 		int /* verbosity */,
+ 		const pretty_printer &reference_pp) :
+   m_refcount (0),
+   m_f_out (f_out),
+   m_indent_level (0),
+   m_log_refcount_changes (false),
+   m_pp (reference_pp.clone ())
+ {
+   pp_show_color (m_pp) = 0;
+   pp_buffer (m_pp)->stream = f_out;
+ 
+   /* %qE in logs for SSA_NAMEs should show the ssa names, rather than
+      trying to prettify things by showing the underlying var.  */
+   pp_format_decoder (m_pp) = default_tree_printer;
+ 
+   /* Begin the log by writing the GCC version.  */
+   print_version (f_out, "", false);
+ }
+ 
+ /* The destructor for logger, invoked via
+    the decref method when the refcount hits zero.
+    Note that we do not close the underlying FILE * (m_f_out).  */
+ 
+ logger::~logger ()
+ {
+   /* This should be the last message emitted.  */
+   log ("%s", __PRETTY_FUNCTION__);
+   gcc_assert (m_refcount == 0);
+   delete m_pp;
+ }
+ 
+ /* Increment the reference count of the logger.  */
+ 
+ void
+ logger::incref (const char *reason)
+ {
+   m_refcount++;
+   if (m_log_refcount_changes)
+     log ("%s: reason: %s refcount now %i ",
+ 	 __PRETTY_FUNCTION__, reason, m_refcount);
+ }
+ 
+ /* Decrement the reference count of the logger,
+    deleting it if nothing is referring to it.  */
+ 
+ void
+ logger::decref (const char *reason)
+ {
+   gcc_assert (m_refcount > 0);
+   --m_refcount;
+   if (m_log_refcount_changes)
+     log ("%s: reason: %s refcount now %i",
+ 	 __PRETTY_FUNCTION__, reason, m_refcount);
+   if (m_refcount == 0)
+     delete this;
+ }
+ 
+ /* Write a formatted message to the log, by calling the log_va method.  */
+ 
+ void
+ logger::log (const char *fmt, ...)
+ {
+   va_list ap;
+   va_start (ap, fmt);
+   log_va (fmt, &ap);
+   va_end (ap);
+ }
+ 
+ /* Write an indented line to the log file.
+ 
+    We explicitly flush after each line: if something crashes the process,
+    we want the logfile/stream to contain the most up-to-date hint about the
+    last thing that was happening, without it being hidden in an in-process
+    buffer.  */
+ 
+ void
+ logger::log_va (const char *fmt, va_list *ap)
+ {
+   start_log_line ();
+   log_va_partial (fmt, ap);
+   end_log_line ();
+ }
+ 
+ void
+ logger::start_log_line ()
+ {
+   for (int i = 0; i < m_indent_level; i++)
+     fputc (' ', m_f_out);
+ }
+ 
+ void
+ logger::log_partial (const char *fmt, ...)
+ {
+   va_list ap;
+   va_start (ap, fmt);
+   log_va_partial (fmt, &ap);
+   va_end (ap);
+ }
+ 
+ void
+ logger::log_va_partial (const char *fmt, va_list *ap)
+ {
+   text_info text;
+   text.format_spec = fmt;
+   text.args_ptr = ap;
+   text.err_no = 0;
+   pp_format (m_pp, &text);
+   pp_output_formatted_text (m_pp);
+ }
+ 
+ void
+ logger::end_log_line ()
+ {
+   pp_flush (m_pp);
+   pp_clear_output_area (m_pp);
+   fprintf (m_f_out, "\n");
+   fflush (m_f_out);
+ }
+ 
+ /* Record the entry within a particular scope, indenting subsequent
+    log lines accordingly.  */
+ 
+ void
+ logger::enter_scope (const char *scope_name)
+ {
+   log ("entering: %s", scope_name);
+   m_indent_level += 1;
+ }
+ 
+ void
+ logger::enter_scope (const char *scope_name, const char *fmt, va_list *ap)
+ {
+   start_log_line ();
+   log_partial ("entering: %s: ", scope_name);
+   log_va_partial (fmt, ap);
+   end_log_line ();
+ 
+   m_indent_level += 1;
+ }
+ 
+ 
+ /* Record the exit from a particular scope, restoring the indent level to
+    before the scope was entered.  */
+ 
+ void
+ logger::exit_scope (const char *scope_name)
+ {
+   if (m_indent_level)
+     m_indent_level -= 1;
+   else
+     log ("(mismatching indentation)");
+   log ("exiting: %s", scope_name);
+ }
+ 
+ /* Implementation of class log_user.  */
+ 
+ /* The constructor for log_user.  */
+ 
+ log_user::log_user (logger *logger) : m_logger (logger)
+ {
+   if (m_logger)
+     m_logger->incref("log_user ctor");
+ }
+ 
+ /* The destructor for log_user.  */
+ 
+ log_user::~log_user ()
+ {
+   if (m_logger)
+     m_logger->decref("log_user dtor");
+ }
+ 
+ /* Set the logger for a log_user, managing the reference counts
+    of the old and new logger (either of which might be NULL).  */
+ 
+ void
+ log_user::set_logger (logger *logger)
+ {
+   if (logger)
+     logger->incref ("log_user::set_logger");
+   if (m_logger)
+     m_logger->decref ("log_user::set_logger");
+   m_logger = logger;
+ }
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/analyzer-logging.h gcc-10.1.0/gcc/analyzer/analyzer-logging.h
*** gcc-9.3.0/gcc/analyzer/analyzer-logging.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/analyzer-logging.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,264 ----
+ /* Hierarchical log messages for the analyzer.
+    Copyright (C) 2014-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ /* Adapted from jit-logging.h.  */
+ 
+ #ifndef ANALYZER_LOGGING_H
+ #define ANALYZER_LOGGING_H
+ 
+ namespace ana {
+ 
+ /* A logger encapsulates a logging stream: a way to send
+    lines of pertinent information to a FILE *.  */
+ 
+ class logger
+ {
+  public:
+   logger (FILE *f_out, int flags, int verbosity, const pretty_printer &reference_pp);
+   ~logger ();
+ 
+   void incref (const char *reason);
+   void decref (const char *reason);
+ 
+   void log (const char *fmt, ...)
+     ATTRIBUTE_GCC_DIAG(2, 3);
+   void log_va (const char *fmt, va_list *ap)
+     ATTRIBUTE_GCC_DIAG(2, 0);
+   void start_log_line ();
+   void log_partial (const char *fmt, ...)
+     ATTRIBUTE_GCC_DIAG(2, 3);
+   void log_va_partial (const char *fmt, va_list *ap)
+     ATTRIBUTE_GCC_DIAG(2, 0);
+   void end_log_line ();
+ 
+   void enter_scope (const char *scope_name);
+   void enter_scope (const char *scope_name, const char *fmt, va_list *ap)
+     ATTRIBUTE_GCC_DIAG(3, 0);
+   void exit_scope (const char *scope_name);
+ 
+   pretty_printer *get_printer () const { return m_pp; }
+   FILE *get_file () const { return m_f_out; }
+ 
+ private:
+   DISABLE_COPY_AND_ASSIGN (logger);
+ 
+   int m_refcount;
+   FILE *m_f_out;
+   int m_indent_level;
+   bool m_log_refcount_changes;
+   pretty_printer *m_pp;
+ };
+ 
+ /* The class log_scope is an RAII-style class intended to make
+    it easy to notify a logger about entering and exiting the body of a
+    given function.  */
+ 
+ class log_scope
+ {
+ public:
+   log_scope (logger *logger, const char *name);
+   log_scope (logger *logger, const char *name, const char *fmt, ...)
+     ATTRIBUTE_GCC_DIAG(4, 5);
+   ~log_scope ();
+ 
+  private:
+   DISABLE_COPY_AND_ASSIGN (log_scope);
+ 
+   logger *m_logger;
+   const char *m_name;
+ };
+ 
+ /* The constructor for log_scope.
+ 
+    The normal case is that the logger is NULL, in which case this should
+    be largely a no-op.
+ 
+    If we do have a logger, notify it that we're entering the given scope.
+    We also need to hold a reference on it, to avoid a use-after-free
+    when logging the cleanup of the owner of the logger.  */
+ 
+ inline
+ log_scope::log_scope (logger *logger, const char *name) :
+  m_logger (logger),
+  m_name (name)
+ {
+   if (m_logger)
+     {
+       m_logger->incref ("log_scope ctor");
+       m_logger->enter_scope (m_name);
+     }
+ }
+ 
+ inline
+ log_scope::log_scope (logger *logger, const char *name, const char *fmt, ...):
+  m_logger (logger),
+  m_name (name)
+ {
+   if (m_logger)
+     {
+       m_logger->incref ("log_scope ctor");
+       va_list ap;
+       va_start (ap, fmt);
+       m_logger->enter_scope (m_name, fmt, &ap);
+       va_end (ap);
+     }
+ }
+ 
+ 
+ /* The destructor for log_scope; essentially the opposite of
+    the constructor.  */
+ 
+ inline
+ log_scope::~log_scope ()
+ {
+   if (m_logger)
+     {
+       m_logger->exit_scope (m_name);
+       m_logger->decref ("log_scope dtor");
+     }
+ }
+ 
+ /* A log_user is something that potentially uses a logger (which could be NULL).
+ 
+    The log_user class keeps the reference-count of a logger up-to-date.  */
+ 
+ class log_user
+ {
+  public:
+   log_user (logger *logger);
+   ~log_user ();
+ 
+   logger * get_logger () const { return m_logger; }
+   void set_logger (logger * logger);
+ 
+   void log (const char *fmt, ...) const
+     ATTRIBUTE_GCC_DIAG(2, 3);
+ 
+   void start_log_line () const;
+   void end_log_line () const;
+ 
+   void enter_scope (const char *scope_name);
+   void exit_scope (const char *scope_name);
+ 
+   pretty_printer *get_logger_pp () const
+   {
+     gcc_assert (m_logger);
+     return m_logger->get_printer ();
+   }
+ 
+   FILE *get_logger_file () const
+   {
+     if (m_logger == NULL)
+       return NULL;
+     return m_logger->get_file ();
+   }
+ 
+  private:
+   DISABLE_COPY_AND_ASSIGN (log_user);
+ 
+   logger *m_logger;
+ };
+ 
+ /* A shortcut for calling log from a log_user, handling the common
+    case where the underlying logger is NULL via a no-op.  */
+ 
+ inline void
+ log_user::log (const char *fmt, ...) const
+ {
+   if (m_logger)
+     {
+       va_list ap;
+       va_start (ap, fmt);
+       m_logger->log_va (fmt, &ap);
+       va_end (ap);
+     }
+ }
+ 
+ /* A shortcut for starting a log line from a log_user,
+    handling the common case where the underlying logger is NULL via
+    a no-op.  */
+ 
+ inline void
+ log_user::start_log_line () const
+ {
+   if (m_logger)
+     m_logger->start_log_line ();
+ }
+ 
+ /* A shortcut for ending a log line from a log_user,
+    handling the common case where the underlying logger is NULL via
+    a no-op.  */
+ 
+ inline void
+ log_user::end_log_line () const
+ {
+   if (m_logger)
+     m_logger->end_log_line ();
+ }
+ 
+ /* A shortcut for recording entry into a scope from a log_user,
+    handling the common case where the underlying logger is NULL via
+    a no-op.  */
+ 
+ inline void
+ log_user::enter_scope (const char *scope_name)
+ {
+   if (m_logger)
+     m_logger->enter_scope (scope_name);
+ }
+ 
+ /* A shortcut for recording exit from a scope from a log_user,
+    handling the common case where the underlying logger is NULL via
+    a no-op.  */
+ 
+ inline void
+ log_user::exit_scope (const char *scope_name)
+ {
+   if (m_logger)
+     m_logger->exit_scope (scope_name);
+ }
+ 
+ /* If the given logger is non-NULL, log entry/exit of this scope to
+    it, identifying it using __PRETTY_FUNCTION__.  */
+ 
+ #define LOG_SCOPE(LOGGER)		\
+   log_scope s (LOGGER, __PRETTY_FUNCTION__)
+ 
+ /* If the given logger is non-NULL, log entry/exit of this scope to
+    it, identifying it using __func__.  */
+ 
+ #define LOG_FUNC(LOGGER) \
+   log_scope s (LOGGER, __func__)
+ 
+ #define LOG_FUNC_1(LOGGER, FMT, A0)	\
+   log_scope s (LOGGER, __func__, FMT, A0)
+ 
+ #define LOG_FUNC_2(LOGGER, FMT, A0, A1)		\
+   log_scope s (LOGGER, __func__, FMT, A0, A1)
+ 
+ #define LOG_FUNC_3(LOGGER, FMT, A0, A1, A2)	\
+   log_scope s (LOGGER, __func__, FMT, A0, A1, A2)
+ 
+ #define LOG_FUNC_4(LOGGER, FMT, A0, A1, A2, A3) \
+   log_scope s (LOGGER, __func__, FMT, A0, A1, A2, A3)
+ 
+ } // namespace ana
+ 
+ #endif /* ANALYZER_LOGGING_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/analyzer-pass.cc gcc-10.1.0/gcc/analyzer/analyzer-pass.cc
*** gcc-9.3.0/gcc/analyzer/analyzer-pass.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/analyzer-pass.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,102 ----
+ /* Integration of the analyzer with GCC's pass manager.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "context.h"
+ #include "tree-pass.h"
+ #include "diagnostic.h"
+ #include "options.h"
+ #include "analyzer/engine.h"
+ 
+ namespace {
+ 
+ /* Data for the analyzer pass.  */
+ 
+ const pass_data pass_data_analyzer =
+ {
+   IPA_PASS, /* type */
+   "analyzer", /* name */
+   OPTGROUP_NONE, /* optinfo_flags */
+   TV_ANALYZER, /* tv_id */
+   PROP_ssa, /* properties_required */
+   0, /* properties_provided */
+   0, /* properties_destroyed */
+   0, /* todo_flags_start */
+   0, /* todo_flags_finish */
+ };
+ 
+ /* The analyzer pass.  */
+ 
+ class pass_analyzer : public ipa_opt_pass_d
+ {
+ public:
+    pass_analyzer(gcc::context *ctxt)
+    : ipa_opt_pass_d (pass_data_analyzer, ctxt,
+ 		     NULL, /* generate_summary */
+ 		     NULL, /* write_summary */
+ 		     NULL, /* read_summary */
+ 		     NULL, /* write_optimization_summary */
+ 		     NULL, /* read_optimization_summary */
+ 		     NULL, /* stmt_fixup */
+ 		     0, /* function_transform_todo_flags_start */
+ 		     NULL, /* function_transform */
+ 		     NULL) /* variable_transform */
+   {}
+ 
+   /* opt_pass methods: */
+   bool gate (function *) FINAL OVERRIDE;
+   unsigned int execute (function *) FINAL OVERRIDE;
+ }; // class pass_analyzer
+ 
+ /* Only run the analyzer if -fanalyzer.  */
+ 
+ bool
+ pass_analyzer::gate (function *)
+ {
+   return flag_analyzer != 0;
+ }
+ 
+ /* Entrypoint for the analyzer pass.  */
+ 
+ unsigned int
+ pass_analyzer::execute (function *)
+ {
+ #if ENABLE_ANALYZER
+   ana::run_checkers ();
+ #else
+   sorry ("%qs was not enabled in this build of GCC"
+ 	 " (missing configure-time option %qs)",
+ 	 "-fanalyzer", "--enable-analyzer");
+ #endif
+ 
+   return 0;
+ }
+ 
+ } // anon namespace
+ 
+ /* Make an instance of the analyzer pass.  */
+ 
+ ipa_opt_pass_d *
+ make_pass_analyzer (gcc::context *ctxt)
+ {
+   return new pass_analyzer (ctxt);
+ }
diff -Nrcpad gcc-9.3.0/gcc/analyzer/analyzer-selftests.cc gcc-10.1.0/gcc/analyzer/analyzer-selftests.cc
*** gcc-9.3.0/gcc/analyzer/analyzer-selftests.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/analyzer-selftests.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,68 ----
+ /* Selftest support for the analyzer.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "stringpool.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "analyzer/analyzer-selftests.h"
+ 
+ #if CHECKING_P
+ 
+ namespace ana {
+ 
+ namespace selftest {
+ 
+ /* Build a VAR_DECL named NAME of type TYPE, simulating a file-level
+    static variable.  */
+ 
+ tree
+ build_global_decl (const char *name, tree type)
+ {
+   tree decl = build_decl (UNKNOWN_LOCATION, VAR_DECL,
+ 			  get_identifier (name), type);
+   TREE_STATIC (decl) = 1;
+   return decl;
+ }
+ 
+ /* Run all analyzer-specific selftests.  */
+ 
+ void
+ run_analyzer_selftests ()
+ {
+ #if ENABLE_ANALYZER
+   analyzer_constraint_manager_cc_tests ();
+   analyzer_function_set_cc_tests ();
+   analyzer_program_point_cc_tests ();
+   analyzer_program_state_cc_tests ();
+   analyzer_region_model_cc_tests ();
+   analyzer_sm_file_cc_tests ();
+   analyzer_sm_signal_cc_tests ();
+ #endif /* #if ENABLE_ANALYZER */
+ }
+ 
+ } /* end of namespace selftest.  */
+ 
+ } // namespace ana
+ 
+ #endif /* #if CHECKING_P */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/analyzer-selftests.h gcc-10.1.0/gcc/analyzer/analyzer-selftests.h
*** gcc-9.3.0/gcc/analyzer/analyzer-selftests.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/analyzer-selftests.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,51 ----
+ /* Selftests for the analyzer.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_SELFTESTS_H
+ #define GCC_ANALYZER_SELFTESTS_H
+ 
+ #if CHECKING_P
+ 
+ namespace ana {
+ 
+ namespace selftest {
+ 
+ extern tree build_global_decl (const char *name, tree type);
+ 
+ extern void run_analyzer_selftests ();
+ 
+ /* Declarations for specific families of tests (by source file), in
+    alphabetical order.  */
+ extern void analyzer_checker_script_cc_tests ();
+ extern void analyzer_constraint_manager_cc_tests ();
+ extern void analyzer_function_set_cc_tests ();
+ extern void analyzer_program_point_cc_tests ();
+ extern void analyzer_program_state_cc_tests ();
+ extern void analyzer_region_model_cc_tests ();
+ extern void analyzer_sm_file_cc_tests ();
+ extern void analyzer_sm_signal_cc_tests ();
+ 
+ } /* end of namespace ana::selftest.  */
+ 
+ } // namespace ana
+ 
+ #endif /* #if CHECKING_P */
+ 
+ #endif /* GCC_ANALYZER_SELFTESTS_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/analyzer.cc gcc-10.1.0/gcc/analyzer/analyzer.cc
*** gcc-9.3.0/gcc/analyzer/analyzer.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/analyzer.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,260 ----
+ /* Utility functions for the analyzer.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "diagnostic.h"
+ #include "intl.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ /* Helper function for checkers.  Is the CALL to the given function name,
+    and with the given number of arguments?
+ 
+    This doesn't resolve function pointers via the region model;
+    is_named_call_p should be used instead, using a fndecl from
+    get_fndecl_for_call; this function should only be used for special cases
+    where it's not practical to get at the region model, or for special
+    analyzer functions such as __analyzer_dump.  */
+ 
+ bool
+ is_special_named_call_p (const gcall *call, const char *funcname,
+ 			 unsigned int num_args)
+ {
+   gcc_assert (funcname);
+ 
+   tree fndecl = gimple_call_fndecl (call);
+   if (!fndecl)
+     return false;
+ 
+   return is_named_call_p (fndecl, funcname, call, num_args);
+ }
+ 
+ /* Helper function for checkers.  Is FNDECL an extern fndecl at file scope
+    that has the given FUNCNAME?
+ 
+    Compare with special_function_p in calls.c.  */
+ 
+ bool
+ is_named_call_p (tree fndecl, const char *funcname)
+ {
+   gcc_assert (fndecl);
+   gcc_assert (funcname);
+ 
+   if (!maybe_special_function_p (fndecl))
+     return false;
+ 
+   tree identifier = DECL_NAME (fndecl);
+   const char *name = IDENTIFIER_POINTER (identifier);
+   const char *tname = name;
+ 
+   /* Potentially disregard prefix _ or __ in FNDECL's name, but not if
+      FUNCNAME itself has leading underscores (e.g. when looking for
+      "__analyzer_eval").  */
+   if (funcname[0] != '_' && name[0] == '_')
+     {
+       if (name[1] == '_')
+ 	tname += 2;
+       else
+ 	tname += 1;
+     }
+ 
+   return 0 == strcmp (tname, funcname);
+ }
+ 
+ /* Return true if FNDECL is within the namespace "std".
+    Compare with cp/typeck.c: decl_in_std_namespace_p, but this doesn't
+    rely on being the C++ FE (or handle inline namespaces inside of std).  */
+ 
+ static inline bool
+ is_std_function_p (const_tree fndecl)
+ {
+   tree name_decl = DECL_NAME (fndecl);
+   if (!name_decl)
+     return false;
+   if (!DECL_CONTEXT (fndecl))
+     return false;
+   if (TREE_CODE (DECL_CONTEXT (fndecl)) != NAMESPACE_DECL)
+     return false;
+   tree ns = DECL_CONTEXT (fndecl);
+   if (!(DECL_CONTEXT (ns) == NULL_TREE
+ 	|| TREE_CODE (DECL_CONTEXT (ns)) == TRANSLATION_UNIT_DECL))
+     return false;
+   if (!DECL_NAME (ns))
+     return false;
+   return id_equal ("std", DECL_NAME (ns));
+ }
+ 
+ /* Like is_named_call_p, but look for std::FUNCNAME.  */
+ 
+ bool
+ is_std_named_call_p (tree fndecl, const char *funcname)
+ {
+   gcc_assert (fndecl);
+   gcc_assert (funcname);
+ 
+   if (!is_std_function_p (fndecl))
+     return false;
+ 
+   tree identifier = DECL_NAME (fndecl);
+   const char *name = IDENTIFIER_POINTER (identifier);
+   const char *tname = name;
+ 
+   /* Don't disregard prefix _ or __ in FNDECL's name.  */
+ 
+   return 0 == strcmp (tname, funcname);
+ }
+ 
+ /* Helper function for checkers.  Is FNDECL an extern fndecl at file scope
+    that has the given FUNCNAME, and does CALL have the given number of
+    arguments?  */
+ 
+ bool
+ is_named_call_p (tree fndecl, const char *funcname,
+ 		 const gcall *call, unsigned int num_args)
+ {
+   gcc_assert (fndecl);
+   gcc_assert (funcname);
+ 
+   if (!is_named_call_p (fndecl, funcname))
+     return false;
+ 
+   if (gimple_call_num_args (call) != num_args)
+     return false;
+ 
+   return true;
+ }
+ 
+ /* Like is_named_call_p, but check for std::FUNCNAME.  */
+ 
+ bool
+ is_std_named_call_p (tree fndecl, const char *funcname,
+ 		     const gcall *call, unsigned int num_args)
+ {
+   gcc_assert (fndecl);
+   gcc_assert (funcname);
+ 
+   if (!is_std_named_call_p (fndecl, funcname))
+     return false;
+ 
+   if (gimple_call_num_args (call) != num_args)
+     return false;
+ 
+   return true;
+ }
+ 
+ /* Return true if stmt is a setjmp or sigsetjmp call.  */
+ 
+ bool
+ is_setjmp_call_p (const gcall *call)
+ {
+   if (is_special_named_call_p (call, "setjmp", 1)
+       || is_special_named_call_p (call, "sigsetjmp", 2))
+     return true;
+ 
+   return false;
+ }
+ 
+ /* Return true if stmt is a longjmp or siglongjmp call.  */
+ 
+ bool
+ is_longjmp_call_p (const gcall *call)
+ {
+   if (is_special_named_call_p (call, "longjmp", 2)
+       || is_special_named_call_p (call, "siglongjmp", 2))
+     return true;
+ 
+   return false;
+ }
+ 
+ /* For a CALL that matched is_special_named_call_p or is_named_call_p for
+    some name, return a name for the called function suitable for use in
+    diagnostics (stripping the leading underscores).  */
+ 
+ const char *
+ get_user_facing_name (const gcall *call)
+ {
+   tree fndecl = gimple_call_fndecl (call);
+   gcc_assert (fndecl);
+ 
+   tree identifier = DECL_NAME (fndecl);
+   gcc_assert (identifier);
+ 
+   const char *name = IDENTIFIER_POINTER (identifier);
+ 
+   /* Strip prefix _ or __ in FNDECL's name.  */
+   if (name[0] == '_')
+     {
+       if (name[1] == '_')
+ 	return name + 2;
+       else
+ 	return name + 1;
+     }
+ 
+   return name;
+ }
+ 
+ /* Generate a label_text instance by formatting FMT, using a
+    temporary clone of the global_dc's printer (thus using its
+    formatting callbacks).
+ 
+    Colorize if the global_dc supports colorization and CAN_COLORIZE is
+    true.  */
+ 
+ label_text
+ make_label_text (bool can_colorize, const char *fmt, ...)
+ {
+   pretty_printer *pp = global_dc->printer->clone ();
+   pp_clear_output_area (pp);
+ 
+   if (!can_colorize)
+     pp_show_color (pp) = false;
+ 
+   text_info ti;
+   rich_location rich_loc (line_table, UNKNOWN_LOCATION);
+ 
+   va_list ap;
+ 
+   va_start (ap, fmt);
+ 
+   ti.format_spec = _(fmt);
+   ti.args_ptr = &ap;
+   ti.err_no = 0;
+   ti.x_data = NULL;
+   ti.m_richloc = &rich_loc;
+ 
+   pp_format (pp, &ti);
+   pp_output_formatted_text (pp);
+ 
+   va_end (ap);
+ 
+   label_text result = label_text::take (xstrdup (pp_formatted_text (pp)));
+   delete pp;
+   return result;
+ }
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/analyzer.h gcc-10.1.0/gcc/analyzer/analyzer.h
*** gcc-9.3.0/gcc/analyzer/analyzer.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/analyzer.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,127 ----
+ /* Utility functions for the analyzer.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_ANALYZER_H
+ #define GCC_ANALYZER_ANALYZER_H
+ 
+ class graphviz_out;
+ 
+ namespace ana {
+ 
+ /* Forward decls of common types, with indentation to show inheritance.  */
+ 
+ class supergraph;
+ class supernode;
+ class superedge;
+   class cfg_superedge;
+     class switch_cfg_superedge;
+   class callgraph_superedge;
+     class call_superedge;
+     class return_superedge;
+ class svalue;
+   class region_svalue;
+   class constant_svalue;
+   class poisoned_svalue;
+   class unknown_svalue;
+   class setjmp_svalue;
+ class region;
+   class map_region;
+   class array_region;
+   class symbolic_region;
+ class region_model;
+ class region_model_context;
+   class impl_region_model_context;
+ class constraint_manager;
+ class equiv_class;
+ struct model_merger;
+ struct svalue_id_merger_mapping;
+ struct canonicalization;
+ class pending_diagnostic;
+ class state_change_event;
+ class checker_path;
+ class extrinsic_state;
+ class sm_state_map;
+ class stmt_finder;
+ class program_point;
+ class program_state;
+ class exploded_graph;
+ class exploded_node;
+ class exploded_edge;
+ class feasibility_problem;
+ class exploded_cluster;
+ class exploded_path;
+ class analysis_plan;
+ class state_purge_map;
+ class state_purge_per_ssa_name;
+ class state_change;
+ class rewind_info_t;
+ 
+ /* Forward decls of functions.  */
+ 
+ extern void dump_quoted_tree (pretty_printer *pp, tree t);
+ 
+ } // namespace ana
+ 
+ extern bool is_special_named_call_p (const gcall *call, const char *funcname,
+ 				     unsigned int num_args);
+ extern bool is_named_call_p (tree fndecl, const char *funcname);
+ extern bool is_named_call_p (tree fndecl, const char *funcname,
+ 			     const gcall *call, unsigned int num_args);
+ extern bool is_std_named_call_p (tree fndecl, const char *funcname,
+ 				 const gcall *call, unsigned int num_args);
+ extern bool is_setjmp_call_p (const gcall *call);
+ extern bool is_longjmp_call_p (const gcall *call);
+ 
+ extern const char *get_user_facing_name (const gcall *call);
+ 
+ extern void register_analyzer_pass ();
+ 
+ extern label_text make_label_text (bool can_colorize, const char *fmt, ...);
+ 
+ extern bool fndecl_has_gimple_body_p (tree fndecl);
+ 
+ /* An RAII-style class for pushing/popping cfun within a scope.
+    Doing so ensures we get "In function " announcements
+    from the diagnostics subsystem.  */
+ 
+ class auto_cfun
+ {
+ public:
+   auto_cfun (function *fun) { push_cfun (fun); }
+   ~auto_cfun () { pop_cfun (); }
+ };
+ 
+ /* A template for creating hash traits for a POD type.  */
+ 
+ template <typename Type>
+ struct pod_hash_traits : typed_noop_remove<Type>
+ {
+   typedef Type value_type;
+   typedef Type compare_type;
+   static inline hashval_t hash (value_type);
+   static inline bool equal (const value_type &existing,
+ 			    const value_type &candidate);
+   static inline void mark_deleted (Type &);
+   static inline void mark_empty (Type &);
+   static inline bool is_deleted (Type);
+   static inline bool is_empty (Type);
+ };
+ 
+ #endif /* GCC_ANALYZER_ANALYZER_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/analyzer.opt gcc-10.1.0/gcc/analyzer/analyzer.opt
*** gcc-9.3.0/gcc/analyzer/analyzer.opt	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/analyzer.opt	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,181 ----
+ ; analyzer.opt -- Options for the analyzer.
+ 
+ ; Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ ;
+ ; This file is part of GCC.
+ ;
+ ; GCC is free software; you can redistribute it and/or modify it under
+ ; the terms of the GNU General Public License as published by the Free
+ ; Software Foundation; either version 3, or (at your option) any later
+ ; version.
+ ; 
+ ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+ ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ ; for more details.
+ ; 
+ ; You should have received a copy of the GNU General Public License
+ ; along with GCC; see the file COPYING3.  If not see
+ ; <http://www.gnu.org/licenses/>.
+ 
+ ; See the GCC internals manual for a description of this file's format.
+ 
+ ; Please try to keep this file in ASCII collating order.
+ 
+ -param=analyzer-bb-explosion-factor=
+ Common Joined UInteger Var(param_analyzer_bb_explosion_factor) Init(5) Param
+ The maximum number of 'after supernode' exploded nodes within the analyzer per supernode, before terminating analysis.
+ 
+ -param=analyzer-max-enodes-per-program-point=
+ Common Joined UInteger Var(param_analyzer_max_enodes_per_program_point) Init(8) Param
+ The maximum number of exploded nodes per program point within the analyzer, before terminating analysis of that point.
+ 
+ -param=analyzer-max-recursion-depth=
+ Common Joined UInteger Var(param_analyzer_max_recursion_depth) Init(2) Param
+ The maximum number of times a callsite can appear in a call stack within the analyzer, before terminating analysis of a call that would recurse deeper.
+ 
+ -param=analyzer-min-snodes-for-call-summary=
+ Common Joined UInteger Var(param_analyzer_min_snodes_for_call_summary) Init(10) Param
+ The minimum number of supernodes within a function for the analyzer to consider summarizing its effects at call sites.
+ 
+ Wanalyzer-double-fclose
+ Common Var(warn_analyzer_double_fclose) Init(1) Warning
+ Warn about code paths in which a stdio FILE can be closed more than once.
+ 
+ Wanalyzer-double-free
+ Common Var(warn_analyzer_double_free) Init(1) Warning
+ Warn about code paths in which a pointer can be freed more than once.
+ 
+ Wanalyzer-exposure-through-output-file
+ Common Var(warn_analyzer_exposure_through_output_file) Init(1) Warning
+ Warn about code paths in which sensitive data is written to a file.
+ 
+ Wanalyzer-file-leak
+ Common Var(warn_analyzer_file_leak) Init(1) Warning
+ Warn about code paths in which a stdio FILE is not closed.
+ 
+ Wanalyzer-free-of-non-heap
+ Common Var(warn_analyzer_free_of_non_heap) Init(1) Warning
+ Warn about code paths in which a non-heap pointer is freed.
+ 
+ Wanalyzer-malloc-leak
+ Common Var(warn_analyzer_malloc_leak) Init(1) Warning
+ Warn about code paths in which a heap-allocated pointer leaks.
+ 
+ Wanalyzer-possible-null-argument
+ Common Var(warn_analyzer_possible_null_argument) Init(1) Warning
+ Warn about code paths in which a possibly-NULL value is passed to a must-not-be-NULL function argument.
+ 
+ Wanalyzer-possible-null-dereference
+ Common Var(warn_analyzer_possible_null_dereference) Init(1) Warning
+ Warn about code paths in which a possibly-NULL pointer is dereferenced.
+ 
+ Wanalyzer-unsafe-call-within-signal-handler
+ Common Var(warn_analyzer_unsafe_call_within_signal_handler) Init(1) Warning
+ Warn about code paths in which an async-signal-unsafe function is called from a signal handler.
+ 
+ Wanalyzer-null-argument
+ Common Var(warn_analyzer_null_argument) Init(1) Warning
+ Warn about code paths in which NULL is passed to a must-not-be-NULL function argument.
+ 
+ Wanalyzer-null-dereference
+ Common Var(warn_analyzer_null_dereference) Init(1) Warning
+ Warn about code paths in which a NULL pointer is dereferenced.
+ 
+ Wanalyzer-stale-setjmp-buffer
+ Common Var(warn_analyzer_stale_setjmp_buffer) Init(1) Warning
+ Warn about code paths in which a longjmp rewinds to a jmp_buf saved in a stack frame that has returned.
+ 
+ Wanalyzer-tainted-array-index
+ Common Var(warn_analyzer_tainted_array_index) Init(1) Warning
+ Warn about code paths in which an unsanitized value is used as an array index.
+ 
+ Wanalyzer-use-after-free
+ Common Var(warn_analyzer_use_after_free) Init(1) Warning
+ Warn about code paths in which a freed value is used.
+ 
+ Wanalyzer-use-of-pointer-in-stale-stack-frame
+ Common Var(warn_analyzer_use_of_pointer_in_stale_stack_frame) Init(1) Warning
+ Warn about code paths in which a pointer to a stale stack frame is used.
+ 
+ Wanalyzer-too-complex
+ Common Var(warn_analyzer_too_complex) Init(0) Warning
+ Warn if the code is too complicated for the analyzer to fully explore.
+ 
+ fanalyzer-checker=
+ Common Joined RejectNegative Var(flag_analyzer_checker)
+ Restrict the analyzer to run just the named checker.
+ 
+ fanalyzer-fine-grained
+ Common Var(flag_analyzer_fine_grained) Init(0)
+ Avoid combining multiple statements into one exploded edge.
+ 
+ fanalyzer-show-duplicate-count
+ Common Var(flag_analyzer_show_duplicate_count) Init(0)
+ Issue a note when diagnostics are deduplicated.
+ 
+ fanalyzer-state-purge
+ Common Var(flag_analyzer_state_purge) Init(1)
+ Purge unneeded state during analysis.
+ 
+ fanalyzer-state-merge
+ Common Var(flag_analyzer_state_merge) Init(1)
+ Merge similar-enough states during analysis.
+ 
+ fanalyzer-transitivity
+ Common Var(flag_analyzer_transitivity) Init(0)
+ Enable transitivity of constraints during analysis.
+ 
+ fanalyzer-call-summaries
+ Common Var(flag_analyzer_call_summaries) Init(0)
+ Approximate the effect of function calls to simplify analysis.
+ 
+ fanalyzer-verbose-edges
+ Common Var(flag_analyzer_verbose_edges) Init(0)
+ Emit more verbose descriptions of control flow in diagnostics.
+ 
+ fanalyzer-verbose-state-changes
+ Common Var(flag_analyzer_verbose_state_changes) Init(0)
+ Emit more verbose descriptions of state changes in diagnostics.
+ 
+ fanalyzer-verbosity=
+ Common Joined UInteger Var(analyzer_verbosity) Init(2)
+ Control which events are displayed in diagnostic paths.
+ 
+ fdump-analyzer
+ Common RejectNegative Var(flag_dump_analyzer)
+ Dump various analyzer internals to SRCFILE.analyzer.txt.
+ 
+ fdump-analyzer-stderr
+ Common RejectNegative Var(flag_dump_analyzer_stderr)
+ Dump various analyzer internals to stderr.
+ 
+ fdump-analyzer-callgraph
+ Common RejectNegative Var(flag_dump_analyzer_callgraph)
+ Dump analyzer-specific call graph information to a SRCFILE.callgraph.dot file.
+ 
+ fdump-analyzer-exploded-graph
+ Common RejectNegative Var(flag_dump_analyzer_exploded_graph)
+ Dump the analyzer exploded graph to a SRCFILE.eg.dot file.
+ 
+ fdump-analyzer-exploded-nodes
+ Common RejectNegative Var(flag_dump_analyzer_exploded_nodes)
+ Emit diagnostics showing the location of nodes in the exploded graph.
+ 
+ fdump-analyzer-exploded-nodes-2
+ Common RejectNegative Var(flag_dump_analyzer_exploded_nodes_2)
+ Dump a textual representation of the exploded graph to SRCFILE.eg.txt.
+ 
+ fdump-analyzer-exploded-nodes-3
+ Common RejectNegative Var(flag_dump_analyzer_exploded_nodes_3)
+ Dump a textual representation of the exploded graph to SRCFILE.eg-ID.txt.
+ 
+ fdump-analyzer-state-purge
+ Common RejectNegative Var(flag_dump_analyzer_state_purge)
+ Dump state-purging information to a SRCFILE.state-purge.dot file.
+ 
+ fdump-analyzer-supergraph
+ Common RejectNegative Var(flag_dump_analyzer_supergraph)
+ Dump the analyzer supergraph to a SRCFILE.supergraph.dot file.
+ 
+ ; This comment is to ensure we retain the blank line above.
diff -Nrcpad gcc-9.3.0/gcc/analyzer/bar-chart.cc gcc-10.1.0/gcc/analyzer/bar-chart.cc
*** gcc-9.3.0/gcc/analyzer/bar-chart.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/bar-chart.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,102 ----
+ /* Support for plotting bar charts in dumps.
+    Copyright (C) 2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "pretty-print.h"
+ #include "analyzer/bar-chart.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ /* class bar_chart.  */
+ 
+ /* Add an item, taking a copy of NAME.  */
+ 
+ void
+ bar_chart::add_item (const char *name, value_t value)
+ {
+   m_items.safe_push (new item (name, value));
+ }
+ 
+ /* Print the data to PP.  */
+ 
+ void
+ bar_chart::print (pretty_printer *pp) const
+ {
+   /* Get maximum printing widths and maximum value.  */
+   size_t max_width_name = 0;
+   size_t max_width_value = 0;
+   value_t max_value = 0;
+   unsigned i;
+   item *item;
+   char digit_buffer[128];
+   FOR_EACH_VEC_ELT (m_items, i, item)
+     {
+       max_width_name = MAX (max_width_name, item->m_strlen);
+       sprintf (digit_buffer, "%li", item->m_value);
+       max_width_value = MAX (max_width_value, strlen (digit_buffer));
+       max_value = MAX (max_value, item->m_value);
+     }
+ 
+   /* Print items.  */
+   FOR_EACH_VEC_ELT (m_items, i, item)
+     {
+       /* Print left-aligned name, padding to max_width_name.  */
+       pp_string (pp, item->m_name);
+       print_padding (pp, max_width_name - item->m_strlen);
+ 
+       pp_string (pp, ": ");
+ 
+       /* Print right-aligned name, padding to max_width_value.  */
+       sprintf (digit_buffer, "%li", item->m_value);
+       const size_t value_width = strlen (digit_buffer);
+       print_padding (pp, max_width_value - value_width);
+       pp_string (pp, digit_buffer);
+ 
+       pp_character (pp, '|');
+ 
+       /* Print bar, scaled in proportion to max value.  */
+       const int max_width_bar
+ 	= MIN (max_value, 76 - (max_width_name + max_width_value + 4));
+       const int bar_width
+ 	= (max_value > 0 ? (max_width_bar * item->m_value) / max_value : 0);
+       for (int j = 0; j < bar_width; j++)
+ 	pp_character (pp, '#');
+       print_padding (pp, max_width_bar - bar_width);
+       pp_character (pp, '|');
+       pp_newline (pp);
+     }
+ }
+ 
+ /* Print COUNT spaces to PP.  */
+ 
+ void
+ bar_chart::print_padding (pretty_printer *pp, size_t count)
+ {
+   for (size_t i = 0; i < count; i++)
+     pp_character (pp, ' ');
+ }
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/bar-chart.h gcc-10.1.0/gcc/analyzer/bar-chart.h
*** gcc-9.3.0/gcc/analyzer/bar-chart.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/bar-chart.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,60 ----
+ /* Support for plotting bar charts in dumps.
+    Copyright (C) 2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_BAR_CHART_H
+ #define GCC_ANALYZER_BAR_CHART_H
+ 
+ namespace ana {
+ 
+ /* A class for printing bar charts to a pretty_printer.
+ 
+    TODO(stage1): move to gcc subdir? */
+ 
+ class bar_chart
+ {
+ public:
+   typedef unsigned long value_t;
+ 
+   /* Add an item, taking a copy of NAME.  */
+   void add_item (const char *name, value_t value);
+ 
+   /* Print the data to PP.  */
+   void print (pretty_printer *pp) const;
+ 
+ private:
+   struct item
+   {
+     item (const char *name, value_t value)
+     : m_name (xstrdup (name)), m_strlen (strlen (name)) , m_value (value) {}
+     ~item () { free (m_name); }
+ 
+     char *m_name;
+     size_t m_strlen;
+     value_t m_value;
+   };
+ 
+   static void print_padding (pretty_printer *pp, size_t count);
+ 
+   auto_delete_vec<item> m_items;
+ };
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_BAR_CHART_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/call-string.cc gcc-10.1.0/gcc/analyzer/call-string.cc
*** gcc-9.3.0/gcc/analyzer/call-string.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/call-string.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,212 ----
+ /* Call stacks at program points.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "pretty-print.h"
+ #include "tree.h"
+ #include "options.h"
+ #include "analyzer/call-string.h"
+ #include "ordered-hash-map.h"
+ #include "options.h"
+ #include "cgraph.h"
+ #include "function.h"
+ #include "cfg.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "gimple-iterator.h"
+ #include "digraph.h"
+ #include "analyzer/supergraph.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ /* class call_string.  */
+ 
+ /* call_string's copy ctor.  */
+ 
+ call_string::call_string (const call_string &other)
+ : m_return_edges (other.m_return_edges.length ())
+ {
+   const return_superedge *e;
+   int i;
+   FOR_EACH_VEC_ELT (other.m_return_edges, i, e)
+     m_return_edges.quick_push (e);
+ }
+ 
+ /* call_string's assignment operator.  */
+ 
+ call_string&
+ call_string::operator= (const call_string &other)
+ {
+   // would be much simpler if we could rely on vec<> assignment op
+   m_return_edges.truncate (0);
+   m_return_edges.reserve (other.m_return_edges.length (), true);
+   const return_superedge *e;
+   int i;
+   FOR_EACH_VEC_ELT (other.m_return_edges, i, e)
+     m_return_edges.quick_push (e);
+   return *this;
+ }
+ 
+ /* call_string's equality operator.  */
+ 
+ bool
+ call_string::operator== (const call_string &other) const
+ {
+   if (m_return_edges.length () != other.m_return_edges.length ())
+     return false;
+   const return_superedge *e;
+   int i;
+   FOR_EACH_VEC_ELT (m_return_edges, i, e)
+     if (e != other.m_return_edges[i])
+       return false;
+   return true;
+ }
+ 
+ /* Print this to PP.  */
+ 
+ void
+ call_string::print (pretty_printer *pp) const
+ {
+   pp_string (pp, "[");
+ 
+   const return_superedge *e;
+   int i;
+   FOR_EACH_VEC_ELT (m_return_edges, i, e)
+     {
+       if (i > 0)
+ 	pp_string (pp, ", ");
+       pp_printf (pp, "(SN: %i -> SN: %i in %s)",
+ 		 e->m_src->m_index, e->m_dest->m_index,
+ 		 function_name (e->m_dest->m_fun));
+     }
+ 
+   pp_string (pp, "]");
+ }
+ 
+ /* Generate a hash value for this call_string.  */
+ 
+ hashval_t
+ call_string::hash () const
+ {
+   inchash::hash hstate;
+   int i;
+   const return_superedge *e;
+   FOR_EACH_VEC_ELT (m_return_edges, i, e)
+     hstate.add_ptr (e);
+   return hstate.end ();
+ }
+ 
+ /* Push the return superedge for CALL_SEDGE onto the end of this
+    call_string.  */
+ 
+ void
+ call_string::push_call (const supergraph &sg,
+ 			const call_superedge *call_sedge)
+ {
+   gcc_assert (call_sedge);
+   const return_superedge *return_sedge = call_sedge->get_edge_for_return (sg);
+   gcc_assert (return_sedge);
+   m_return_edges.safe_push (return_sedge);
+ }
+ 
+ /* Count the number of times the top-most call site appears in the
+    stack.  */
+ 
+ int
+ call_string::calc_recursion_depth () const
+ {
+   if (m_return_edges.is_empty ())
+     return 0;
+   const return_superedge *top_return_sedge
+     = m_return_edges[m_return_edges.length () - 1];
+ 
+   int result = 0;
+   const return_superedge *e;
+   int i;
+   FOR_EACH_VEC_ELT (m_return_edges, i, e)
+     if (e == top_return_sedge)
+       ++result;
+   return result;
+ }
+ 
+ /* Comparator for call strings.
+    This implements a version of lexicographical order.
+    Return negative if A is before B.
+    Return positive if B is after A.
+    Return 0 if they are equal.  */
+ 
+ int
+ call_string::cmp (const call_string &a,
+ 		  const call_string &b)
+ {
+   unsigned len_a = a.length ();
+   unsigned len_b = b.length ();
+ 
+   unsigned i = 0;
+   while (1)
+     {
+       /* Consider index i; the strings have been equal up to it.  */
+ 
+       /* Have both strings run out?  */
+       if (i >= len_a && i >= len_b)
+ 	return 0;
+ 
+       /* Otherwise, has just one of the strings run out?  */
+       if (i >= len_a)
+ 	return 1;
+       if (i >= len_b)
+ 	return -1;
+ 
+       /* Otherwise, compare the edges.  */
+       const return_superedge *edge_a = a[i];
+       const return_superedge *edge_b = b[i];
+       int src_cmp = edge_a->m_src->m_index - edge_b->m_src->m_index;
+       if (src_cmp)
+ 	return src_cmp;
+       int dest_cmp = edge_a->m_dest->m_index - edge_b->m_dest->m_index;
+       if (dest_cmp)
+ 	return dest_cmp;
+       i++;
+       // TODO: test coverage for this
+     }
+ }
+ 
+ /* Assert that this object is sane.  */
+ 
+ void
+ call_string::validate () const
+ {
+   /* Skip this in a release build.  */
+ #if !CHECKING_P
+   return;
+ #endif
+ 
+   /* Each entry's "caller" should be the "callee" of the previous entry.  */
+   const return_superedge *e;
+   int i;
+   FOR_EACH_VEC_ELT (m_return_edges, i, e)
+     if (i > 0)
+       gcc_assert (e->get_caller_function ()
+ 		  == m_return_edges[i - 1]->get_callee_function ());
+ }
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/call-string.h gcc-10.1.0/gcc/analyzer/call-string.h
*** gcc-9.3.0/gcc/analyzer/call-string.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/call-string.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,77 ----
+ /* Call stacks at program points.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_CALL_STRING_H
+ #define GCC_ANALYZER_CALL_STRING_H
+ 
+ namespace ana {
+ 
+ class supergraph;
+ class call_superedge;
+ class return_superedge;
+ 
+ /* A string of return_superedge pointers, representing a call stack
+    at a program point.
+ 
+    This is used to ensure that we generate interprocedurally valid paths
+    i.e. that we return to the same callsite that called us.
+ 
+    The class actually stores the return edges, rather than the call edges,
+    since that's what we need to compare against.  */
+ 
+ class call_string
+ {
+ public:
+   call_string () : m_return_edges () {}
+   call_string (const call_string &other);
+   call_string& operator= (const call_string &other);
+ 
+   bool operator== (const call_string &other) const;
+ 
+   void print (pretty_printer *pp) const;
+ 
+   hashval_t hash () const;
+ 
+   bool empty_p () const { return m_return_edges.is_empty (); }
+ 
+   void push_call (const supergraph &sg,
+ 		  const call_superedge *sedge);
+   const return_superedge *pop () { return m_return_edges.pop (); }
+ 
+   int calc_recursion_depth () const;
+ 
+   static int cmp (const call_string &a,
+ 		  const call_string &b);
+ 
+   unsigned length () const { return m_return_edges.length (); }
+   const return_superedge *operator[] (unsigned idx) const
+   {
+     return m_return_edges[idx];
+   }
+ 
+   void validate () const;
+ 
+ private:
+   auto_vec<const return_superedge *> m_return_edges;
+ };
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_CALL_STRING_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/checker-path.cc gcc-10.1.0/gcc/analyzer/checker-path.cc
*** gcc-9.3.0/gcc/analyzer/checker-path.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/checker-path.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,966 ----
+ /* Subclasses of diagnostic_path and diagnostic_event for analyzer diagnostics.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "gimple-pretty-print.h"
+ #include "fold-const.h"
+ #include "function.h"
+ #include "diagnostic-path.h"
+ #include "options.h"
+ #include "cgraph.h"
+ #include "function.h"
+ #include "cfg.h"
+ #include "digraph.h"
+ #include "alloc-pool.h"
+ #include "fibonacci_heap.h"
+ #include "diagnostic-event-id.h"
+ #include "shortest-paths.h"
+ #include "analyzer/analyzer.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/sm.h"
+ #include "sbitmap.h"
+ #include "bitmap.h"
+ #include "tristate.h"
+ #include "ordered-hash-map.h"
+ #include "selftest.h"
+ #include "analyzer/region-model.h"
+ #include "analyzer/program-state.h"
+ #include "analyzer/checker-path.h"
+ #include "gimple-iterator.h"
+ #include "analyzer/supergraph.h"
+ #include "analyzer/pending-diagnostic.h"
+ #include "analyzer/diagnostic-manager.h"
+ #include "analyzer/constraint-manager.h"
+ #include "analyzer/diagnostic-manager.h"
+ #include "analyzer/checker-path.h"
+ #include "analyzer/call-string.h"
+ #include "analyzer/program-point.h"
+ #include "analyzer/exploded-graph.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ /* Get a string for EK.  */
+ 
+ const char *
+ event_kind_to_string (enum event_kind ek)
+ {
+   switch (ek)
+     {
+     default:
+       gcc_unreachable ();
+     case EK_DEBUG:
+       return "EK_DEBUG";
+     case EK_CUSTOM:
+       return "EK_CUSTOM";
+     case EK_STMT:
+       return "EK_STMT";
+     case EK_FUNCTION_ENTRY:
+       return "EK_FUNCTION_ENTRY";
+     case EK_STATE_CHANGE:
+       return "EK_STATE_CHANGE";
+     case EK_START_CFG_EDGE:
+       return "EK_START_CFG_EDGE";
+     case EK_END_CFG_EDGE:
+       return "EK_END_CFG_EDGE";
+     case EK_CALL_EDGE:
+       return "EK_CALL_EDGE";
+     case EK_RETURN_EDGE:
+       return "EK_RETURN_EDGE";
+     case EK_SETJMP:
+       return "EK_SETJMP";
+     case EK_REWIND_FROM_LONGJMP:
+       return "EK_REWIND_FROM_LONGJMP";
+     case EK_REWIND_TO_SETJMP:
+       return "EK_REWIND_TO_SETJMP";
+     case EK_WARNING:
+       return "EK_WARNING";
+     }
+ }
+ 
+ /* class checker_event : public diagnostic_event.  */
+ 
+ /* Dump this event to PP (for debugging/logging purposes).  */
+ 
+ void
+ checker_event::dump (pretty_printer *pp) const
+ {
+   label_text event_desc (get_desc (false));
+   pp_printf (pp, "\"%s\" (depth %i, m_loc=%x)",
+ 	     event_desc.m_buffer,
+ 	     get_stack_depth (),
+ 	     get_location ());
+   event_desc.maybe_free ();
+ }
+ 
+ /* Hook for being notified when this event has its final id EMISSION_ID
+    and is about to emitted for PD.
+ 
+    Base implementation of checker_event::prepare_for_emission vfunc;
+    subclasses that override this should chain up to it.
+ 
+    Record PD and EMISSION_ID, and call the get_desc vfunc, so that any
+    side-effects of the call to get_desc take place before
+    pending_diagnostic::emit is called.
+ 
+    For example, state_change_event::get_desc can call
+    pending_diagnostic::describe_state_change; free_of_non_heap can use this
+    to tweak the message (TODO: would be neater to simply capture the
+    pertinent data within the sm-state).  */
+ 
+ void
+ checker_event::prepare_for_emission (checker_path *,
+ 				     pending_diagnostic *pd,
+ 				     diagnostic_event_id_t emission_id)
+ {
+   m_pending_diagnostic = pd;
+   m_emission_id = emission_id;
+ 
+   label_text desc = get_desc (false);
+   desc.maybe_free ();
+ }
+ 
+ /* class debug_event : public checker_event.  */
+ 
+ /* Implementation of diagnostic_event::get_desc vfunc for
+    debug_event.
+    Use the saved string as the event's description.  */
+ 
+ label_text
+ debug_event::get_desc (bool) const
+ {
+   return label_text::borrow (m_desc);
+ }
+ 
+ /* class custom_event : public checker_event.  */
+ 
+ /* Implementation of diagnostic_event::get_desc vfunc for
+    custom_event.
+    Use the saved string as the event's description.  */
+ 
+ label_text
+ custom_event::get_desc (bool) const
+ {
+   return label_text::borrow (m_desc);
+ }
+ 
+ /* class statement_event : public checker_event.  */
+ 
+ /* statement_event's ctor.  */
+ 
+ statement_event::statement_event (const gimple *stmt, tree fndecl, int depth,
+ 				  const program_state &dst_state)
+ : checker_event (EK_STMT, gimple_location (stmt), fndecl, depth),
+   m_stmt (stmt),
+   m_dst_state (dst_state)
+ {
+ }
+ 
+ /* Implementation of diagnostic_event::get_desc vfunc for
+    statement_event.
+    Use the statement's dump form as the event's description.  */
+ 
+ label_text
+ statement_event::get_desc (bool) const
+ {
+   pretty_printer pp;
+   pp_string (&pp, "stmt: ");
+   pp_gimple_stmt_1 (&pp, m_stmt, 0, (dump_flags_t)0);
+   return label_text::take (xstrdup (pp_formatted_text (&pp)));
+ }
+ 
+ /* class function_entry_event : public checker_event.  */
+ 
+ /* Implementation of diagnostic_event::get_desc vfunc for
+    function_entry_event.
+ 
+    Use a string such as "entry to 'foo'" as the event's description.  */
+ 
+ label_text
+ function_entry_event::get_desc (bool can_colorize) const
+ {
+   return make_label_text (can_colorize, "entry to %qE", m_fndecl);
+ }
+ 
+ /* class state_change_event : public checker_event.  */
+ 
+ /* state_change_event's ctor.  */
+ 
+ state_change_event::state_change_event (const supernode *node,
+ 					const gimple *stmt,
+ 					int stack_depth,
+ 					const state_machine &sm,
+ 					tree var,
+ 					state_machine::state_t from,
+ 					state_machine::state_t to,
+ 					tree origin,
+ 					const program_state &dst_state)
+ : checker_event (EK_STATE_CHANGE,
+ 		 stmt->location, node->m_fun->decl,
+ 		 stack_depth),
+   m_node (node), m_stmt (stmt), m_sm (sm),
+   m_var (var), m_from (from), m_to (to),
+   m_origin (origin),
+   m_dst_state (dst_state)
+ {
+ }
+ 
+ /* Implementation of diagnostic_event::get_desc vfunc for
+    state_change_event.
+ 
+    Attempt to generate a nicer human-readable description.
+    For greatest precision-of-wording, give the pending diagnostic
+    a chance to describe this state change (in terms of the
+    diagnostic).
+    Note that we only have a pending_diagnostic set on the event once
+    the diagnostic is about to being emitted, so the description for
+    an event can change.  */
+ 
+ label_text
+ state_change_event::get_desc (bool can_colorize) const
+ {
+   if (m_pending_diagnostic)
+     {
+       label_text custom_desc
+ 	= m_pending_diagnostic->describe_state_change
+ 	    (evdesc::state_change (can_colorize, m_var, m_origin,
+ 				   m_from, m_to, m_emission_id, *this));
+       if (custom_desc.m_buffer)
+ 	{
+ 	  if (flag_analyzer_verbose_state_changes)
+ 	    {
+ 	      /* Append debug version.  */
+ 	      label_text result;
+ 	      if (m_origin)
+ 		result = make_label_text
+ 		  (can_colorize,
+ 		   "%s (state of %qE: %qs -> %qs, origin: %qE)",
+ 		   custom_desc.m_buffer,
+ 		   m_var,
+ 		   m_sm.get_state_name (m_from),
+ 		   m_sm.get_state_name (m_to),
+ 		   m_origin);
+ 	      else
+ 		result = make_label_text
+ 		  (can_colorize,
+ 		   "%s (state of %qE: %qs -> %qs, origin: NULL)",
+ 		   custom_desc.m_buffer,
+ 		   m_var,
+ 		   m_sm.get_state_name (m_from),
+ 		   m_sm.get_state_name (m_to));
+ 	      custom_desc.maybe_free ();
+ 	      return result;
+ 	    }
+ 	  else
+ 	    return custom_desc;
+ 	}
+     }
+ 
+   /* Fallback description.  */
+   if (m_var)
+     {
+       if (m_origin)
+ 	return make_label_text
+ 	  (can_colorize,
+ 	   "state of %qE: %qs -> %qs (origin: %qE)",
+ 	   m_var,
+ 	   m_sm.get_state_name (m_from),
+ 	   m_sm.get_state_name (m_to),
+ 	   m_origin);
+       else
+ 	return make_label_text
+ 	  (can_colorize,
+ 	   "state of %qE: %qs -> %qs (origin: NULL)",
+ 	   m_var,
+ 	   m_sm.get_state_name (m_from),
+ 	   m_sm.get_state_name (m_to));
+     }
+   else
+     {
+       gcc_assert (m_origin == NULL_TREE);
+       return make_label_text
+ 	(can_colorize,
+ 	 "global state: %qs -> %qs",
+ 	 m_sm.get_state_name (m_from),
+ 	 m_sm.get_state_name (m_to));
+     }
+ }
+ 
+ /* class superedge_event : public checker_event.  */
+ 
+ /* Get the callgraph_superedge for this superedge_event, which must be
+    for an interprocedural edge, rather than a CFG edge.  */
+ 
+ const callgraph_superedge&
+ superedge_event::get_callgraph_superedge () const
+ {
+   gcc_assert (m_sedge->m_kind != SUPEREDGE_CFG_EDGE);
+   return *m_sedge->dyn_cast_callgraph_superedge ();
+ }
+ 
+ /* Determine if this event should be filtered at the given verbosity
+    level.  */
+ 
+ bool
+ superedge_event::should_filter_p (int verbosity) const
+ {
+   switch (m_sedge->m_kind)
+     {
+     case SUPEREDGE_CFG_EDGE:
+       {
+ 	if (verbosity < 2)
+ 	  return true;
+ 
+ 	if (verbosity < 4)
+ 	  {
+ 	    /* Filter events with empty descriptions.  This ought to filter
+ 	       FALLTHRU, but retain true/false/switch edges.  */
+ 	    label_text desc = get_desc (false);
+ 	    gcc_assert (desc.m_buffer);
+ 	    if (desc.m_buffer[0] == '\0')
+ 	      return true;
+ 	    desc.maybe_free ();
+ 	  }
+       }
+       break;
+ 
+     default:
+       break;
+     }
+   return false;
+ }
+ 
+ /* superedge_event's ctor.  */
+ 
+ superedge_event::superedge_event (enum event_kind kind,
+ 				  const exploded_edge &eedge,
+ 				  location_t loc, tree fndecl, int depth)
+ : checker_event (kind, loc, fndecl, depth),
+   m_eedge (eedge), m_sedge (eedge.m_sedge),
+   m_var (NULL_TREE), m_critical_state (0)
+ {
+ }
+ 
+ /* class cfg_edge_event : public superedge_event.  */
+ 
+ /* Get the cfg_superedge for this cfg_edge_event.  */
+ 
+ const cfg_superedge &
+ cfg_edge_event::get_cfg_superedge () const
+ {
+   return *m_sedge->dyn_cast_cfg_superedge ();
+ }
+ 
+ /* cfg_edge_event's ctor.  */
+ 
+ cfg_edge_event::cfg_edge_event (enum event_kind kind,
+ 				const exploded_edge &eedge,
+ 				location_t loc, tree fndecl, int depth)
+ : superedge_event (kind, eedge, loc, fndecl, depth)
+ {
+   gcc_assert (eedge.m_sedge->m_kind == SUPEREDGE_CFG_EDGE);
+ }
+ 
+ /* class start_cfg_edge_event : public cfg_edge_event.  */
+ 
+ /* Implementation of diagnostic_event::get_desc vfunc for
+    start_cfg_edge_event.
+ 
+    If -fanalyzer-verbose-edges, then generate low-level descriptions, such
+    as
+      "taking 'true' edge SN:7 -> SN:8".
+ 
+    Otherwise, generate strings using the label of the underlying CFG if
+    any, such as:
+      "following 'true' branch..." or
+      "following 'case 3' branch..."
+      "following 'default' branch..."
+ 
+    For conditionals, attempt to supply a description of the condition that
+    holds, such as:
+      "following 'false' branch (when 'ptr' is non-NULL)..."
+ 
+    Failing that, return an empty description (which will lead to this event
+    being filtered).  */
+ 
+ label_text
+ start_cfg_edge_event::get_desc (bool can_colorize) const
+ {
+   bool user_facing = !flag_analyzer_verbose_edges;
+   char *edge_desc = m_sedge->get_description (user_facing);
+   if (user_facing)
+     {
+       if (edge_desc && strlen (edge_desc) > 0)
+ 	{
+ 	  label_text cond_desc = maybe_describe_condition (can_colorize);
+ 	  label_text result;
+ 	  if (cond_desc.m_buffer)
+ 	    {
+ 	      result = make_label_text (can_colorize,
+ 					"following %qs branch (%s)...",
+ 					edge_desc, cond_desc.m_buffer);
+ 	      cond_desc.maybe_free ();
+ 	    }
+ 	  else
+ 	    {
+ 	      result = make_label_text (can_colorize,
+ 					"following %qs branch...",
+ 					edge_desc);
+ 	    }
+ 	  free (edge_desc);
+ 	  return result;
+ 	}
+       else
+ 	{
+ 	  free (edge_desc);
+ 	  return label_text::borrow ("");
+ 	}
+     }
+   else
+     {
+       if (strlen (edge_desc) > 0)
+ 	{
+ 	  label_text result
+ 	    = make_label_text (can_colorize,
+ 			       "taking %qs edge SN:%i -> SN:%i",
+ 			       edge_desc,
+ 			       m_sedge->m_src->m_index,
+ 			       m_sedge->m_dest->m_index);
+ 	  free (edge_desc);
+ 	  return result;
+ 	}
+       else
+ 	{
+ 	  free (edge_desc);
+ 	  return make_label_text (can_colorize,
+ 				  "taking edge SN:%i -> SN:%i",
+ 				  m_sedge->m_src->m_index,
+ 				  m_sedge->m_dest->m_index);
+ 	}
+     }
+ }
+ 
+ /* Attempt to generate a description of any condition that holds at this edge.
+ 
+    The intent is to make the user-facing messages more clear, especially for
+    cases where there's a single or double-negative, such as
+    when describing the false branch of an inverted condition.
+ 
+    For example, rather than printing just:
+ 
+       |  if (!ptr)
+       |     ~
+       |     |
+       |     (1) following 'false' branch...
+ 
+    it's clearer to spell out the condition that holds:
+ 
+       |  if (!ptr)
+       |     ~
+       |     |
+       |     (1) following 'false' branch (when 'ptr' is non-NULL)...
+                                           ^^^^^^^^^^^^^^^^^^^^^^
+ 
+    In the above example, this function would generate the highlighted
+    string: "when 'ptr' is non-NULL".
+ 
+    If the edge is not a condition, or it's not clear that a description of
+    the condition would be helpful to the user, return NULL.  */
+ 
+ label_text
+ start_cfg_edge_event::maybe_describe_condition (bool can_colorize) const
+ {
+   const cfg_superedge& cfg_sedge = get_cfg_superedge ();
+ 
+   if (cfg_sedge.true_value_p () || cfg_sedge.false_value_p ())
+     {
+       const gimple *last_stmt = m_sedge->m_src->get_last_stmt ();
+       if (const gcond *cond_stmt = dyn_cast <const gcond *> (last_stmt))
+ 	{
+ 	  enum tree_code op = gimple_cond_code (cond_stmt);
+ 	  tree lhs = gimple_cond_lhs (cond_stmt);
+ 	  tree rhs = gimple_cond_rhs (cond_stmt);
+ 	  if (cfg_sedge.false_value_p ())
+ 	    op = invert_tree_comparison (op, false /* honor_nans */);
+ 	  return maybe_describe_condition (can_colorize,
+ 					   lhs, op, rhs);
+ 	}
+     }
+   return label_text::borrow (NULL);
+ }
+ 
+ /* Subroutine of maybe_describe_condition above.
+ 
+    Attempt to generate a user-facing description of the condition
+    LHS OP RHS, but only if it is likely to make it easier for the
+    user to understand a condition.  */
+ 
+ label_text
+ start_cfg_edge_event::maybe_describe_condition (bool can_colorize,
+ 						tree lhs,
+ 						enum tree_code op,
+ 						tree rhs)
+ {
+   /* In theory we could just build a tree via
+        fold_build2 (op, boolean_type_node, lhs, rhs)
+      and print it with %qE on it, but this leads to warts such as
+      parenthesizing vars, such as '(i) <= 9', and uses of '<unknown>'.  */
+ 
+   /* Special-case: describe testing the result of strcmp, as figuring
+      out what the "true" or "false" path is can be confusing to the user.  */
+   if (TREE_CODE (lhs) == SSA_NAME
+       && zerop (rhs))
+     {
+       if (gcall *call = dyn_cast <gcall *> (SSA_NAME_DEF_STMT (lhs)))
+ 	if (is_special_named_call_p (call, "strcmp", 2))
+ 	  {
+ 	    if (op == EQ_EXPR)
+ 	      return label_text::borrow ("when the strings are equal");
+ 	    if (op == NE_EXPR)
+ 	      return label_text::borrow ("when the strings are non-equal");
+ 	  }
+     }
+ 
+   /* Only attempt to generate text for sufficiently simple expressions.  */
+   if (!should_print_expr_p (lhs))
+     return label_text::borrow (NULL);
+   if (!should_print_expr_p (rhs))
+     return label_text::borrow (NULL);
+ 
+   /* Special cases for pointer comparisons against NULL.  */
+   if (POINTER_TYPE_P (TREE_TYPE (lhs))
+       && POINTER_TYPE_P (TREE_TYPE (rhs))
+       && zerop (rhs))
+     {
+       if (op == EQ_EXPR)
+ 	return make_label_text (can_colorize, "when %qE is NULL",
+ 				lhs);
+       if (op == NE_EXPR)
+ 	return make_label_text (can_colorize, "when %qE is non-NULL",
+ 				lhs);
+     }
+ 
+   return make_label_text (can_colorize, "when %<%E %s %E%>",
+ 			  lhs, op_symbol_code (op), rhs);
+ }
+ 
+ /* Subroutine of maybe_describe_condition.
+ 
+    Return true if EXPR is we will get suitable user-facing output
+    from %E on it.  */
+ 
+ bool
+ start_cfg_edge_event::should_print_expr_p (tree expr)
+ {
+   if (TREE_CODE (expr) == SSA_NAME)
+     {
+       if (SSA_NAME_VAR (expr))
+ 	return should_print_expr_p (SSA_NAME_VAR (expr));
+       else
+ 	return false;
+     }
+ 
+   if (DECL_P (expr))
+     return true;
+ 
+   if (CONSTANT_CLASS_P (expr))
+     return true;
+ 
+   return false;
+ }
+ 
+ /* class call_event : public superedge_event.  */
+ 
+ /* call_event's ctor.  */
+ 
+ call_event::call_event (const exploded_edge &eedge,
+ 			location_t loc, tree fndecl, int depth)
+ : superedge_event (EK_CALL_EDGE, eedge, loc, fndecl, depth)
+ {
+   gcc_assert (eedge.m_sedge->m_kind == SUPEREDGE_CALL);
+ }
+ 
+ /* Implementation of diagnostic_event::get_desc vfunc for
+    call_event.
+ 
+    If this call event passes critical state for an sm-based warning,
+    allow the diagnostic to generate a precise description, such as:
+ 
+      "passing freed pointer 'ptr' in call to 'foo' from 'bar'"
+ 
+    Otherwise, generate a description of the form
+    "calling 'foo' from 'bar'".  */
+ 
+ label_text
+ call_event::get_desc (bool can_colorize) const
+ {
+   if (m_critical_state && m_pending_diagnostic)
+     {
+       gcc_assert (m_var);
+       label_text custom_desc
+ 	= m_pending_diagnostic->describe_call_with_state
+ 	    (evdesc::call_with_state (can_colorize,
+ 				      m_sedge->m_src->m_fun->decl,
+ 				      m_sedge->m_dest->m_fun->decl,
+ 				      m_var,
+ 				      m_critical_state));
+       if (custom_desc.m_buffer)
+ 	return custom_desc;
+     }
+ 
+   return make_label_text (can_colorize,
+ 			  "calling %qE from %qE",
+ 			  m_sedge->m_dest->m_fun->decl,
+ 			  m_sedge->m_src->m_fun->decl);
+ }
+ 
+ /* Override of checker_event::is_call_p for calls.  */
+ 
+ bool
+ call_event::is_call_p () const
+ {
+   return true;
+ }
+ 
+ /* class return_event : public superedge_event.  */
+ 
+ /* return_event's ctor.  */
+ 
+ return_event::return_event (const exploded_edge &eedge,
+ 			    location_t loc, tree fndecl, int depth)
+ : superedge_event (EK_RETURN_EDGE, eedge, loc, fndecl, depth)
+ {
+   gcc_assert (eedge.m_sedge->m_kind == SUPEREDGE_RETURN);
+ }
+ 
+ /* Implementation of diagnostic_event::get_desc vfunc for
+    return_event.
+ 
+    If this return event returns critical state for an sm-based warning,
+    allow the diagnostic to generate a precise description, such as:
+ 
+       "possible of NULL to 'foo' from 'bar'"
+ 
+    Otherwise, generate a description of the form
+    "returning to 'foo' from 'bar'.  */
+ 
+ label_text
+ return_event::get_desc (bool can_colorize) const
+ {
+   /*  For greatest precision-of-wording, if this is returning the
+       state involved in the pending diagnostic, give the pending
+       diagnostic a chance to describe this return (in terms of
+       itself).  */
+   if (m_critical_state && m_pending_diagnostic)
+     {
+       label_text custom_desc
+ 	= m_pending_diagnostic->describe_return_of_state
+ 	    (evdesc::return_of_state (can_colorize,
+ 				      m_sedge->m_dest->m_fun->decl,
+ 				      m_sedge->m_src->m_fun->decl,
+ 				      m_critical_state));
+       if (custom_desc.m_buffer)
+ 	return custom_desc;
+     }
+   return make_label_text (can_colorize,
+ 			  "returning to %qE from %qE",
+ 			  m_sedge->m_dest->m_fun->decl,
+ 			  m_sedge->m_src->m_fun->decl);
+ }
+ 
+ /* Override of checker_event::is_return_p for returns.  */
+ 
+ bool
+ return_event::is_return_p () const
+ {
+   return true;
+ }
+ 
+ /* class setjmp_event : public checker_event.  */
+ 
+ /* Implementation of diagnostic_event::get_desc vfunc for
+    setjmp_event.  */
+ 
+ label_text
+ setjmp_event::get_desc (bool can_colorize) const
+ {
+   return make_label_text (can_colorize,
+ 			  "%qs called here",
+ 			  get_user_facing_name (m_setjmp_call));
+ }
+ 
+ /* Implementation of checker_event::prepare_for_emission vfunc for setjmp_event.
+ 
+    Record this setjmp's event ID into the path, so that rewind events can
+    use it.  */
+ 
+ void
+ setjmp_event::prepare_for_emission (checker_path *path,
+ 				    pending_diagnostic *pd,
+ 				    diagnostic_event_id_t emission_id)
+ {
+   checker_event::prepare_for_emission (path, pd, emission_id);
+   path->record_setjmp_event (m_enode, emission_id);
+ }
+ 
+ /* class rewind_event : public checker_event.  */
+ 
+ /* Get the fndecl containing the site of the longjmp call.  */
+ 
+ tree
+ rewind_event::get_longjmp_caller () const
+ {
+   return m_eedge->m_src->get_function ()->decl;
+ }
+ 
+ /* Get the fndecl containing the site of the setjmp call.  */
+ 
+ tree
+ rewind_event::get_setjmp_caller () const
+ {
+   return m_eedge->m_dest->get_function ()->decl;
+ }
+ 
+ /* rewind_event's ctor.  */
+ 
+ rewind_event::rewind_event (const exploded_edge *eedge,
+ 			    enum event_kind kind,
+ 			    location_t loc, tree fndecl, int depth,
+ 			    const rewind_info_t *rewind_info)
+ : checker_event (kind, loc, fndecl, depth),
+   m_rewind_info (rewind_info),
+   m_eedge (eedge)
+ {
+   gcc_assert (m_eedge->m_custom_info == m_rewind_info);
+ }
+ 
+ /* class rewind_from_longjmp_event : public rewind_event.  */
+ 
+ /* Implementation of diagnostic_event::get_desc vfunc for
+    rewind_from_longjmp_event.  */
+ 
+ label_text
+ rewind_from_longjmp_event::get_desc (bool can_colorize) const
+ {
+   const char *src_name
+     = get_user_facing_name (m_rewind_info->get_longjmp_call ());
+ 
+   if (get_longjmp_caller () == get_setjmp_caller ())
+     /* Special-case: purely intraprocedural rewind.  */
+     return make_label_text (can_colorize,
+ 			    "rewinding within %qE from %qs...",
+ 			    get_longjmp_caller (),
+ 			    src_name);
+   else
+     return make_label_text (can_colorize,
+ 			    "rewinding from %qs in %qE...",
+ 			    src_name,
+ 			    get_longjmp_caller ());
+ }
+ 
+ /* class rewind_to_setjmp_event : public rewind_event.  */
+ 
+ /* Implementation of diagnostic_event::get_desc vfunc for
+    rewind_to_setjmp_event.  */
+ 
+ label_text
+ rewind_to_setjmp_event::get_desc (bool can_colorize) const
+ {
+   const char *dst_name
+     = get_user_facing_name (m_rewind_info->get_setjmp_call ());
+ 
+   /* If we can, identify the ID of the setjmp_event.  */
+   if (m_original_setjmp_event_id.known_p ())
+     {
+       if (get_longjmp_caller () == get_setjmp_caller ())
+ 	/* Special-case: purely intraprocedural rewind.  */
+ 	return make_label_text (can_colorize,
+ 				"...to %qs (saved at %@)",
+ 				dst_name,
+ 				&m_original_setjmp_event_id);
+       else
+ 	return make_label_text (can_colorize,
+ 				"...to %qs in %qE (saved at %@)",
+ 				dst_name,
+ 				get_setjmp_caller (),
+ 				&m_original_setjmp_event_id);
+     }
+   else
+     {
+       if (get_longjmp_caller () == get_setjmp_caller ())
+ 	/* Special-case: purely intraprocedural rewind.  */
+ 	return make_label_text (can_colorize,
+ 				"...to %qs",
+ 				dst_name,
+ 				get_setjmp_caller ());
+       else
+ 	return make_label_text (can_colorize,
+ 				"...to %qs in %qE",
+ 				dst_name,
+ 				get_setjmp_caller ());
+     }
+ }
+ 
+ /* Implementation of checker_event::prepare_for_emission vfunc for
+    rewind_to_setjmp_event.
+ 
+    Attempt to look up the setjmp event ID that recorded the jmp_buf
+    for this rewind.  */
+ 
+ void
+ rewind_to_setjmp_event::prepare_for_emission (checker_path *path,
+ 					      pending_diagnostic *pd,
+ 					      diagnostic_event_id_t emission_id)
+ {
+   checker_event::prepare_for_emission (path, pd, emission_id);
+   path->get_setjmp_event (m_rewind_info->get_enode_origin (),
+ 			  &m_original_setjmp_event_id);
+ }
+ 
+ /* class warning_event : public checker_event.  */
+ 
+ /* Implementation of diagnostic_event::get_desc vfunc for
+    warning_event.
+ 
+    If the pending diagnostic implements describe_final_event, use it,
+    generating a precise description e.g.
+      "second 'free' here; first 'free' was at (7)"
+ 
+    Otherwise generate a generic description.  */
+ 
+ label_text
+ warning_event::get_desc (bool can_colorize) const
+ {
+   if (m_pending_diagnostic)
+     {
+       label_text ev_desc
+ 	= m_pending_diagnostic->describe_final_event
+ 	    (evdesc::final_event (can_colorize, m_var, m_state));
+       if (ev_desc.m_buffer)
+ 	{
+ 	  if (m_sm && flag_analyzer_verbose_state_changes)
+ 	    {
+ 	      label_text result
+ 		= make_label_text (can_colorize,
+ 				   "%s (%qE is in state %qs)",
+ 				   ev_desc.m_buffer,
+ 				   m_var,m_sm->get_state_name (m_state));
+ 	      ev_desc.maybe_free ();
+ 	      return result;
+ 	    }
+ 	  else
+ 	    return ev_desc;
+ 	}
+     }
+ 
+   if (m_sm)
+     return make_label_text (can_colorize,
+ 			    "here (%qE is in state %qs)",
+ 			    m_var,
+ 			    m_sm->get_state_name (m_state));
+   else
+     return label_text::borrow ("here");
+ }
+ 
+ /* Print a single-line representation of this path to PP.  */
+ 
+ void
+ checker_path::dump (pretty_printer *pp) const
+ {
+   pp_character (pp, '[');
+ 
+   checker_event *e;
+   int i;
+   FOR_EACH_VEC_ELT (m_events, i, e)
+     {
+       if (i > 0)
+ 	pp_string (pp, ", ");
+       label_text event_desc (e->get_desc (false));
+       pp_printf (pp, "\"%s\"", event_desc.m_buffer);
+       event_desc.maybe_free ();
+     }
+   pp_character (pp, ']');
+ }
+ 
+ /* Print a multiline form of this path to LOGGER, prefixing it with DESC.  */
+ 
+ void
+ checker_path::maybe_log (logger *logger, const char *desc) const
+ {
+   if (!logger)
+     return;
+   logger->start_log_line ();
+   logger->log_partial ("%s: ", desc);
+   dump (logger->get_printer ());
+   logger->end_log_line ();
+   for (unsigned i = 0; i < m_events.length (); i++)
+     {
+       logger->start_log_line ();
+       logger->log_partial ("%s[%i]: %s ", desc, i,
+ 			   event_kind_to_string (m_events[i]->m_kind));
+       m_events[i]->dump (logger->get_printer ());
+       logger->end_log_line ();
+     }
+ }
+ 
+ /* Print a multiline form of this path to STDERR.  */
+ 
+ DEBUG_FUNCTION void
+ checker_path::debug () const
+ {
+   checker_event *e;
+   int i;
+   FOR_EACH_VEC_ELT (m_events, i, e)
+     {
+       label_text event_desc (e->get_desc (false));
+       fprintf (stderr,
+ 	       "[%i]: %s \"%s\"\n",
+ 	       i,
+ 	       event_kind_to_string (m_events[i]->m_kind),
+ 	       event_desc.m_buffer);
+       event_desc.maybe_free ();
+     }
+ }
+ 
+ /* Add a warning_event to the end of this path.  */
+ 
+ void
+ checker_path::add_final_event (const state_machine *sm,
+ 			       const exploded_node *enode, const gimple *stmt,
+ 			       tree var, state_machine::state_t state)
+ {
+   checker_event *end_of_path
+     = new warning_event (stmt->location,
+ 			 enode->get_function ()->decl,
+ 			 enode->get_stack_depth (),
+ 			 sm, var, state);
+   add_event (end_of_path);
+ }
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/checker-path.h gcc-10.1.0/gcc/analyzer/checker-path.h
*** gcc-9.3.0/gcc/analyzer/checker-path.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/checker-path.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,532 ----
+ /* Subclasses of diagnostic_path and diagnostic_event for analyzer diagnostics.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_CHECKER_PATH_H
+ #define GCC_ANALYZER_CHECKER_PATH_H
+ 
+ namespace ana {
+ 
+ /* An enum for discriminating between the concrete subclasses of
+    checker_event.  */
+ 
+ enum event_kind
+ {
+   EK_DEBUG,
+   EK_CUSTOM,
+   EK_STMT,
+   EK_FUNCTION_ENTRY,
+   EK_STATE_CHANGE,
+   EK_START_CFG_EDGE,
+   EK_END_CFG_EDGE,
+   EK_CALL_EDGE,
+   EK_RETURN_EDGE,
+   EK_SETJMP,
+   EK_REWIND_FROM_LONGJMP,
+   EK_REWIND_TO_SETJMP,
+   EK_WARNING
+ };
+ 
+ extern const char *event_kind_to_string (enum event_kind ek);
+ 
+ /* Event subclasses.
+ 
+    The class hierarchy looks like this (using indentation to show
+    inheritance, and with event_kinds shown for the concrete subclasses):
+ 
+    diagnostic_event
+      checker_event
+        debug_event (EK_DEBUG)
+        custom_event (EK_CUSTOM)
+        statement_event (EK_STMT)
+        function_entry_event (EK_FUNCTION_ENTRY)
+        state_change_event (EK_STATE_CHANGE)
+        superedge_event
+          cfg_edge_event
+ 	   start_cfg_edge_event (EK_START_CFG_EDGE)
+ 	   end_cfg_edge_event (EK_END_CFG_EDGE)
+          call_event (EK_CALL_EDGE)
+          return_edge (EK_RETURN_EDGE)
+        setjmp_event (EK_SETJMP)
+        rewind_event
+          rewind_from_longjmp_event (EK_REWIND_FROM_LONGJMP)
+ 	 rewind_to_setjmp_event (EK_REWIND_TO_SETJMP)
+        warning_event (EK_WARNING).  */
+ 
+ /* Abstract subclass of diagnostic_event; the base class for use in
+    checker_path (the analyzer's diagnostic_path subclass).  */
+ 
+ class checker_event : public diagnostic_event
+ {
+ public:
+   checker_event (enum event_kind kind,
+ 		 location_t loc, tree fndecl, int depth)
+     : m_kind (kind), m_loc (loc), m_fndecl (fndecl), m_depth (depth),
+       m_pending_diagnostic (NULL), m_emission_id ()
+   {
+   }
+ 
+   /* Implementation of diagnostic_event.  */
+ 
+   location_t get_location () const FINAL OVERRIDE { return m_loc; }
+   tree get_fndecl () const FINAL OVERRIDE { return m_fndecl; }
+   int get_stack_depth () const FINAL OVERRIDE { return m_depth; }
+ 
+   /* Additional functionality.  */
+ 
+   virtual void prepare_for_emission (checker_path *,
+ 				     pending_diagnostic *pd,
+ 				     diagnostic_event_id_t emission_id);
+   virtual bool is_call_p () const { return false; }
+   virtual bool is_function_entry_p () const  { return false; }
+   virtual bool is_return_p () const  { return false; }
+ 
+   void dump (pretty_printer *pp) const;
+ 
+  public:
+   const enum event_kind m_kind;
+  protected:
+   location_t m_loc;
+   tree m_fndecl;
+   int m_depth;
+   pending_diagnostic *m_pending_diagnostic;
+   diagnostic_event_id_t m_emission_id; // only set once all pruning has occurred
+ };
+ 
+ /* A concrete event subclass for a purely textual event, for use in
+    debugging path creation and filtering.  */
+ 
+ class debug_event : public checker_event
+ {
+ public:
+   debug_event (location_t loc, tree fndecl, int depth,
+ 	      const char *desc)
+   : checker_event (EK_DEBUG, loc, fndecl, depth),
+     m_desc (xstrdup (desc))
+   {
+   }
+   ~debug_event ()
+   {
+     free (m_desc);
+   }
+ 
+   label_text get_desc (bool) const FINAL OVERRIDE;
+ 
+ private:
+   char *m_desc;
+ };
+ 
+ /* A concrete event subclass for custom events.  These are not filtered,
+    as they are likely to be pertinent to the diagnostic.  */
+ 
+ class custom_event : public checker_event
+ {
+ public:
+   custom_event (location_t loc, tree fndecl, int depth,
+ 		const char *desc)
+   : checker_event (EK_CUSTOM, loc, fndecl, depth),
+     m_desc (xstrdup (desc))
+   {
+   }
+   ~custom_event ()
+   {
+     free (m_desc);
+   }
+ 
+   label_text get_desc (bool) const FINAL OVERRIDE;
+ 
+ private:
+   char *m_desc;
+ };
+ 
+ /* A concrete event subclass describing the execution of a gimple statement,
+    for use at high verbosity levels when debugging paths.  */
+ 
+ class statement_event : public checker_event
+ {
+ public:
+   statement_event (const gimple *stmt, tree fndecl, int depth,
+ 		   const program_state &dst_state);
+ 
+   label_text get_desc (bool) const FINAL OVERRIDE;
+ 
+   const gimple * const m_stmt;
+   const program_state m_dst_state;
+ };
+ 
+ /* An event subclass describing the entry to a function.  */
+ 
+ class function_entry_event : public checker_event
+ {
+ public:
+   function_entry_event (location_t loc, tree fndecl, int depth)
+   : checker_event (EK_FUNCTION_ENTRY, loc, fndecl, depth)
+   {
+   }
+ 
+   label_text get_desc (bool can_colorize) const FINAL OVERRIDE;
+ 
+   bool is_function_entry_p () const FINAL OVERRIDE { return true; }
+ };
+ 
+ /* Subclass of checker_event describing a state change.  */
+ 
+ class state_change_event : public checker_event
+ {
+ public:
+   state_change_event (const supernode *node, const gimple *stmt,
+ 		      int stack_depth,
+ 		      const state_machine &sm,
+ 		      tree var,
+ 		      state_machine::state_t from,
+ 		      state_machine::state_t to,
+ 		      tree origin,
+ 		      const program_state &dst_state);
+ 
+   label_text get_desc (bool can_colorize) const FINAL OVERRIDE;
+ 
+   region_id get_lvalue (tree expr, region_model_context *ctxt) const
+   {
+     return m_dst_state.m_region_model->get_lvalue (expr, ctxt);
+   }
+ 
+   const supernode *m_node;
+   const gimple *m_stmt;
+   const state_machine &m_sm;
+   tree m_var;
+   state_machine::state_t m_from;
+   state_machine::state_t m_to;
+   tree m_origin;
+   program_state m_dst_state;
+ };
+ 
+ /* Subclass of checker_event; parent class for subclasses that relate to
+    a superedge.  */
+ 
+ class superedge_event : public checker_event
+ {
+ public:
+   /* Mark this edge event as being either an interprocedural call or
+      return in which VAR is in STATE, and that this is critical to the
+      diagnostic (so that get_desc can attempt to get a better description
+      from any pending_diagnostic).  */
+   void record_critical_state (tree var, state_machine::state_t state)
+   {
+     m_var = var;
+     m_critical_state = state;
+   }
+ 
+   const callgraph_superedge& get_callgraph_superedge () const;
+ 
+   bool should_filter_p (int verbosity) const;
+ 
+  protected:
+   superedge_event (enum event_kind kind, const exploded_edge &eedge,
+ 		   location_t loc, tree fndecl, int depth);
+ 
+  public:
+   const exploded_edge &m_eedge;
+   const superedge *m_sedge;
+   tree m_var;
+   state_machine::state_t m_critical_state;
+ };
+ 
+ /* An abstract event subclass for when a CFG edge is followed; it has two
+    subclasses, representing the start of the edge and the end of the
+    edge, which come in pairs.  */
+ 
+ class cfg_edge_event : public superedge_event
+ {
+ public:
+   const cfg_superedge& get_cfg_superedge () const;
+ 
+  protected:
+   cfg_edge_event (enum event_kind kind, const exploded_edge &eedge,
+ 		  location_t loc, tree fndecl, int depth);
+ };
+ 
+ /* A concrete event subclass for the start of a CFG edge
+    e.g. "following 'false' branch...'.  */
+ 
+ class start_cfg_edge_event : public cfg_edge_event
+ {
+ public:
+   start_cfg_edge_event (const exploded_edge &eedge,
+ 			location_t loc, tree fndecl, int depth)
+   : cfg_edge_event (EK_START_CFG_EDGE, eedge, loc, fndecl, depth)
+   {
+   }
+ 
+   label_text get_desc (bool can_colorize) const FINAL OVERRIDE;
+ 
+  private:
+   label_text maybe_describe_condition (bool can_colorize) const;
+ 
+   static label_text maybe_describe_condition (bool can_colorize,
+ 					      tree lhs,
+ 					      enum tree_code op,
+ 					      tree rhs);
+   static bool should_print_expr_p (tree);
+ };
+ 
+ /* A concrete event subclass for the end of a CFG edge
+    e.g. "...to here'.  */
+ 
+ class end_cfg_edge_event : public cfg_edge_event
+ {
+ public:
+   end_cfg_edge_event (const exploded_edge &eedge,
+ 		      location_t loc, tree fndecl, int depth)
+   : cfg_edge_event (EK_END_CFG_EDGE, eedge, loc, fndecl, depth)
+   {
+   }
+ 
+   label_text get_desc (bool /*can_colorize*/) const FINAL OVERRIDE
+   {
+     return label_text::borrow ("...to here");
+   }
+ };
+ 
+ /* A concrete event subclass for an interprocedural call.  */
+ 
+ class call_event : public superedge_event
+ {
+ public:
+   call_event (const exploded_edge &eedge,
+ 	      location_t loc, tree fndecl, int depth);
+ 
+   label_text get_desc (bool can_colorize) const FINAL OVERRIDE;
+ 
+   bool is_call_p () const FINAL OVERRIDE;
+ };
+ 
+ /* A concrete event subclass for an interprocedural return.  */
+ 
+ class return_event : public superedge_event
+ {
+ public:
+   return_event (const exploded_edge &eedge,
+ 		location_t loc, tree fndecl, int depth);
+ 
+   label_text get_desc (bool can_colorize) const FINAL OVERRIDE;
+ 
+   bool is_return_p () const FINAL OVERRIDE;
+ };
+ 
+ /* A concrete event subclass for a setjmp or sigsetjmp call.  */
+ 
+ class setjmp_event : public checker_event
+ {
+ public:
+   setjmp_event (location_t loc, const exploded_node *enode,
+ 		tree fndecl, int depth, const gcall *setjmp_call)
+   : checker_event (EK_SETJMP, loc, fndecl, depth),
+     m_enode (enode), m_setjmp_call (setjmp_call)
+   {
+   }
+ 
+   label_text get_desc (bool can_colorize) const FINAL OVERRIDE;
+ 
+   void prepare_for_emission (checker_path *path,
+ 			     pending_diagnostic *pd,
+ 			     diagnostic_event_id_t emission_id) FINAL OVERRIDE;
+ 
+ private:
+   const exploded_node *m_enode;
+   const gcall *m_setjmp_call;
+ };
+ 
+ /* An abstract event subclass for rewinding from a longjmp to a setjmp
+    (or siglongjmp to sigsetjmp).
+ 
+    Base class for two from/to subclasses, showing the two halves of the
+    rewind.  */
+ 
+ class rewind_event : public checker_event
+ {
+ public:
+   tree get_longjmp_caller () const;
+   tree get_setjmp_caller () const;
+   const exploded_edge *get_eedge () const { return m_eedge; }
+ 
+  protected:
+   rewind_event (const exploded_edge *eedge,
+ 		enum event_kind kind,
+ 		location_t loc, tree fndecl, int depth,
+ 		const rewind_info_t *rewind_info);
+   const rewind_info_t *m_rewind_info;
+ 
+  private:
+   const exploded_edge *m_eedge;
+ };
+ 
+ /* A concrete event subclass for rewinding from a longjmp to a setjmp,
+    showing the longjmp (or siglongjmp).  */
+ 
+ class rewind_from_longjmp_event : public rewind_event
+ {
+ public:
+   rewind_from_longjmp_event (const exploded_edge *eedge,
+ 			     location_t loc, tree fndecl, int depth,
+ 			     const rewind_info_t *rewind_info)
+   : rewind_event (eedge, EK_REWIND_FROM_LONGJMP, loc, fndecl, depth,
+ 		  rewind_info)
+   {
+   }
+ 
+   label_text get_desc (bool can_colorize) const FINAL OVERRIDE;
+ };
+ 
+ /* A concrete event subclass for rewinding from a longjmp to a setjmp,
+    showing the setjmp (or sigsetjmp).  */
+ 
+ class rewind_to_setjmp_event : public rewind_event
+ {
+ public:
+   rewind_to_setjmp_event (const exploded_edge *eedge,
+ 			  location_t loc, tree fndecl, int depth,
+ 			  const rewind_info_t *rewind_info)
+   : rewind_event (eedge, EK_REWIND_TO_SETJMP, loc, fndecl, depth,
+ 		  rewind_info)
+   {
+   }
+ 
+   label_text get_desc (bool can_colorize) const FINAL OVERRIDE;
+ 
+   void prepare_for_emission (checker_path *path,
+ 			     pending_diagnostic *pd,
+ 			     diagnostic_event_id_t emission_id) FINAL OVERRIDE;
+ 
+ private:
+   diagnostic_event_id_t m_original_setjmp_event_id;
+ };
+ 
+ /* Concrete subclass of checker_event for use at the end of a path:
+    a repeat of the warning message at the end of the path (perhaps with
+    references to pertinent events that occurred on the way), at the point
+    where the problem occurs.  */
+ 
+ class warning_event : public checker_event
+ {
+ public:
+   warning_event (location_t loc, tree fndecl, int depth,
+ 		 const state_machine *sm,
+ 		 tree var, state_machine::state_t state)
+   : checker_event (EK_WARNING, loc, fndecl, depth),
+     m_sm (sm), m_var (var), m_state (state)
+   {
+   }
+ 
+   label_text get_desc (bool can_colorize) const FINAL OVERRIDE;
+ 
+ private:
+   const state_machine *m_sm;
+   tree m_var;
+   state_machine::state_t m_state;
+ };
+ 
+ /* Subclass of diagnostic_path for analyzer diagnostics.  */
+ 
+ class checker_path : public diagnostic_path
+ {
+ public:
+   checker_path () : diagnostic_path () {}
+ 
+   /* Implementation of diagnostic_path vfuncs.  */
+ 
+   unsigned num_events () const FINAL OVERRIDE
+   {
+     return m_events.length ();
+   }
+ 
+   const diagnostic_event & get_event (int idx) const FINAL OVERRIDE
+   {
+     return *m_events[idx];
+   }
+ 
+   checker_event *get_checker_event (int idx)
+   {
+     return m_events[idx];
+   }
+ 
+   void dump (pretty_printer *pp) const;
+   void debug () const;
+ 
+   void maybe_log (logger *logger, const char *desc) const;
+ 
+   void add_event (checker_event *event)
+   {
+     m_events.safe_push (event);
+   }
+ 
+   void delete_event (int idx)
+   {
+     checker_event *event = m_events[idx];
+     m_events.ordered_remove (idx);
+     delete event;
+   }
+ 
+   void add_final_event (const state_machine *sm,
+ 			const exploded_node *enode, const gimple *stmt,
+ 			tree var, state_machine::state_t state);
+ 
+   /* After all event-pruning, a hook for notifying each event what
+      its ID will be.  The events are notified in order, allowing
+      for later events to refer to the IDs of earlier events in
+      their descriptions.  */
+   void prepare_for_emission (pending_diagnostic *pd)
+   {
+     checker_event *e;
+     int i;
+     FOR_EACH_VEC_ELT (m_events, i, e)
+       e->prepare_for_emission (this, pd, diagnostic_event_id_t (i));
+   }
+ 
+   void record_setjmp_event (const exploded_node *enode,
+ 			    diagnostic_event_id_t setjmp_emission_id)
+   {
+     m_setjmp_event_ids.put (enode, setjmp_emission_id);
+   }
+ 
+   bool get_setjmp_event (const exploded_node *enode,
+ 			 diagnostic_event_id_t *out_emission_id)
+   {
+     if (diagnostic_event_id_t *emission_id = m_setjmp_event_ids.get (enode))
+       {
+ 	*out_emission_id = *emission_id;
+ 	return true;
+       }
+     return false;
+   }
+ 
+ private:
+   DISABLE_COPY_AND_ASSIGN(checker_path);
+ 
+   /* The events that have occurred along this path.  */
+   auto_delete_vec<checker_event> m_events;
+ 
+   /* During prepare_for_emission (and after), the setjmp_event for each
+      exploded_node *, so that rewind events can refer to them in their
+      descriptions.  */
+   hash_map <const exploded_node *, diagnostic_event_id_t> m_setjmp_event_ids;
+ };
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_CHECKER_PATH_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/constraint-manager.cc gcc-10.1.0/gcc/analyzer/constraint-manager.cc
*** gcc-9.3.0/gcc/analyzer/constraint-manager.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/constraint-manager.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,2267 ----
+ /* Tracking equivalence classes and constraints at a point on an execution path.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "gimple-iterator.h"
+ #include "fold-const.h"
+ #include "selftest.h"
+ #include "diagnostic-core.h"
+ #include "graphviz.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "ordered-hash-map.h"
+ #include "options.h"
+ #include "cgraph.h"
+ #include "cfg.h"
+ #include "digraph.h"
+ #include "analyzer/supergraph.h"
+ #include "sbitmap.h"
+ #include "bitmap.h"
+ #include "tristate.h"
+ #include "analyzer/region-model.h"
+ #include "analyzer/constraint-manager.h"
+ #include "analyzer/analyzer-selftests.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ /* One of the end-points of a range.  */
+ 
+ struct bound
+ {
+   bound () : m_constant (NULL_TREE), m_closed (false) {}
+   bound (tree constant, bool closed)
+   : m_constant (constant), m_closed (closed) {}
+ 
+   void ensure_closed (bool is_upper);
+ 
+   const char * get_relation_as_str () const;
+ 
+   tree m_constant;
+   bool m_closed;
+ };
+ 
+ /* A range of values, used for determining if a value has been
+    constrained to just one possible constant value.  */
+ 
+ struct range
+ {
+   range () : m_lower_bound (), m_upper_bound () {}
+   range (const bound &lower, const bound &upper)
+   : m_lower_bound (lower), m_upper_bound (upper) {}
+ 
+   void dump (pretty_printer *pp) const;
+ 
+   bool constrained_to_single_element (tree *out);
+ 
+   bound m_lower_bound;
+   bound m_upper_bound;
+ };
+ 
+ /* struct bound.  */
+ 
+ /* Ensure that this bound is closed by converting an open bound to a
+    closed one.  */
+ 
+ void
+ bound::ensure_closed (bool is_upper)
+ {
+   if (!m_closed)
+     {
+       /* Offset by 1 in the appropriate direction.
+ 	 For example, convert 3 < x into 4 <= x,
+ 	 and convert x < 5 into x <= 4.  */
+       gcc_assert (CONSTANT_CLASS_P (m_constant));
+       m_constant = fold_build2 (is_upper ? MINUS_EXPR : PLUS_EXPR,
+ 				TREE_TYPE (m_constant),
+ 				m_constant, integer_one_node);
+       gcc_assert (CONSTANT_CLASS_P (m_constant));
+       m_closed = true;
+     }
+ }
+ 
+ /* Get "<=" vs "<" for this bound.  */
+ 
+ const char *
+ bound::get_relation_as_str () const
+ {
+   if (m_closed)
+     return "<=";
+   else
+     return "<";
+ }
+ 
+ /* struct range.  */
+ 
+ /* Dump this range to PP, which must support %E for tree.  */
+ 
+ void
+ range::dump (pretty_printer *pp) const
+ {
+   pp_printf (pp, "%qE %s x %s %qE",
+ 	     m_lower_bound.m_constant,
+ 	     m_lower_bound.get_relation_as_str (),
+ 	     m_upper_bound.get_relation_as_str (),
+ 	     m_upper_bound.m_constant);
+ }
+ 
+ /* Determine if there is only one possible value for this range.
+    If so, return true and write the constant to *OUT.
+    Otherwise, return false.  */
+ 
+ bool
+ range::constrained_to_single_element (tree *out)
+ {
+   if (!INTEGRAL_TYPE_P (TREE_TYPE (m_lower_bound.m_constant)))
+     return false;
+   if (!INTEGRAL_TYPE_P (TREE_TYPE (m_upper_bound.m_constant)))
+     return false;
+ 
+   /* Convert any open bounds to closed bounds.  */
+   m_lower_bound.ensure_closed (false);
+   m_upper_bound.ensure_closed (true);
+ 
+   // Are they equal?
+   tree comparison = fold_binary (EQ_EXPR, boolean_type_node,
+ 				 m_lower_bound.m_constant,
+ 				 m_upper_bound.m_constant);
+   if (comparison == boolean_true_node)
+     {
+       *out = m_lower_bound.m_constant;
+       return true;
+     }
+   else
+     return false;
+ }
+ 
+ /* class equiv_class.  */
+ 
+ /* equiv_class's default ctor.  */
+ 
+ equiv_class::equiv_class ()
+ : m_constant (NULL_TREE), m_cst_sid (svalue_id::null ()),
+   m_vars ()
+ {
+ }
+ 
+ /* equiv_class's copy ctor.  */
+ 
+ equiv_class::equiv_class (const equiv_class &other)
+ : m_constant (other.m_constant), m_cst_sid (other.m_cst_sid),
+   m_vars (other.m_vars.length ())
+ {
+   int i;
+   svalue_id *sid;
+   FOR_EACH_VEC_ELT (other.m_vars, i, sid)
+     m_vars.quick_push (*sid);
+ }
+ 
+ /* Print an all-on-one-line representation of this equiv_class to PP,
+    which must support %E for trees.  */
+ 
+ void
+ equiv_class::print (pretty_printer *pp) const
+ {
+   pp_character (pp, '{');
+   int i;
+   svalue_id *sid;
+   FOR_EACH_VEC_ELT (m_vars, i, sid)
+     {
+       if (i > 0)
+ 	pp_string (pp, " == ");
+       sid->print (pp);
+     }
+   if (m_constant)
+     {
+       if (i > 0)
+ 	pp_string (pp, " == ");
+       pp_printf (pp, "%qE", m_constant);
+     }
+   pp_character (pp, '}');
+ }
+ 
+ /* Generate a hash value for this equiv_class.  */
+ 
+ hashval_t
+ equiv_class::hash () const
+ {
+   inchash::hash hstate;
+   int i;
+   svalue_id *sid;
+ 
+   inchash::add_expr (m_constant, hstate);
+   FOR_EACH_VEC_ELT (m_vars, i, sid)
+     inchash::add (*sid, hstate);
+   return hstate.end ();
+ }
+ 
+ /* Equality operator for equiv_class.  */
+ 
+ bool
+ equiv_class::operator== (const equiv_class &other)
+ {
+   if (m_constant != other.m_constant)
+     return false; // TODO: use tree equality here?
+ 
+   /* FIXME: should we compare m_cst_sid?  */
+ 
+   if (m_vars.length () != other.m_vars.length ())
+     return false;
+ 
+   int i;
+   svalue_id *sid;
+   FOR_EACH_VEC_ELT (m_vars, i, sid)
+     if (! (*sid == other.m_vars[i]))
+       return false;
+ 
+   return true;
+ }
+ 
+ /* Add SID to this equiv_class, using CM to check if it's a constant.  */
+ 
+ void
+ equiv_class::add (svalue_id sid, const constraint_manager &cm)
+ {
+   gcc_assert (!sid.null_p ());
+   if (tree cst = cm.maybe_get_constant (sid))
+     {
+       gcc_assert (CONSTANT_CLASS_P (cst));
+       /* FIXME: should we canonicalize which svalue is the constant
+ 	 when there are multiple equal constants?  */
+       m_constant = cst;
+       m_cst_sid = sid;
+     }
+   m_vars.safe_push (sid);
+ }
+ 
+ /* Remove SID from this equivalence class.
+    Return true if SID was the last var in the equivalence class (suggesting
+    a possible leak).  */
+ 
+ bool
+ equiv_class::del (svalue_id sid)
+ {
+   gcc_assert (!sid.null_p ());
+   gcc_assert (sid != m_cst_sid);
+ 
+   int i;
+   svalue_id *iv;
+   FOR_EACH_VEC_ELT (m_vars, i, iv)
+     {
+       if (*iv == sid)
+ 	{
+ 	  m_vars[i] = m_vars[m_vars.length () - 1];
+ 	  m_vars.pop ();
+ 	  return m_vars.length () == 0;
+ 	}
+     }
+ 
+   /* SID must be in the class.  */
+   gcc_unreachable ();
+   return false;
+ }
+ 
+ /* Get a representative member of this class, for handling cases
+    where the IDs can change mid-traversal.  */
+ 
+ svalue_id
+ equiv_class::get_representative () const
+ {
+   if (!m_cst_sid.null_p ())
+     return m_cst_sid;
+   else
+     {
+       gcc_assert (m_vars.length () > 0);
+       return m_vars[0];
+     }
+ }
+ 
+ /* Remap all svalue_ids within this equiv_class using MAP.  */
+ 
+ void
+ equiv_class::remap_svalue_ids (const svalue_id_map &map)
+ {
+   int i;
+   svalue_id *iv;
+   FOR_EACH_VEC_ELT (m_vars, i, iv)
+     map.update (iv);
+   map.update (&m_cst_sid);
+ }
+ 
+ /* Comparator for use by equiv_class::canonicalize.  */
+ 
+ static int
+ svalue_id_cmp_by_id (const void *p1, const void *p2)
+ {
+   const svalue_id *sid1 = (const svalue_id *)p1;
+   const svalue_id *sid2 = (const svalue_id *)p2;
+   return sid1->as_int () - sid2->as_int ();
+ }
+ 
+ /* Sort the svalues_ids within this equiv_class.  */
+ 
+ void
+ equiv_class::canonicalize ()
+ {
+   m_vars.qsort (svalue_id_cmp_by_id);
+ }
+ 
+ /* Get a debug string for C_OP.  */
+ 
+ const char *
+ constraint_op_code (enum constraint_op c_op)
+ {
+   switch (c_op)
+     {
+     default:
+       gcc_unreachable ();
+     case CONSTRAINT_NE: return "!=";
+     case CONSTRAINT_LT: return "<";
+     case CONSTRAINT_LE: return "<=";
+     }
+ }
+ 
+ /* Convert C_OP to an enum tree_code.  */
+ 
+ enum tree_code
+ constraint_tree_code (enum constraint_op c_op)
+ {
+   switch (c_op)
+     {
+     default:
+       gcc_unreachable ();
+     case CONSTRAINT_NE: return NE_EXPR;
+     case CONSTRAINT_LT: return LT_EXPR;
+     case CONSTRAINT_LE: return LE_EXPR;
+     }
+ }
+ 
+ /* Given "lhs C_OP rhs", determine "lhs T_OP rhs".
+ 
+    For example, given "x < y", then "x > y" is false.  */
+ 
+ static tristate
+ eval_constraint_op_for_op (enum constraint_op c_op, enum tree_code t_op)
+ {
+   switch (c_op)
+     {
+     default:
+       gcc_unreachable ();
+     case CONSTRAINT_NE:
+       if (t_op == EQ_EXPR)
+ 	return tristate (tristate::TS_FALSE);
+       if (t_op == NE_EXPR)
+ 	return tristate (tristate::TS_TRUE);
+       break;
+     case CONSTRAINT_LT:
+       if (t_op == LT_EXPR || t_op == LE_EXPR || t_op == NE_EXPR)
+ 	return tristate (tristate::TS_TRUE);
+       if (t_op == EQ_EXPR || t_op == GT_EXPR || t_op == GE_EXPR)
+ 	return tristate (tristate::TS_FALSE);
+       break;
+     case CONSTRAINT_LE:
+       if (t_op == LE_EXPR)
+ 	return tristate (tristate::TS_TRUE);
+       if (t_op == GT_EXPR)
+ 	return tristate (tristate::TS_FALSE);
+       break;
+     }
+   return tristate (tristate::TS_UNKNOWN);
+ }
+ 
+ /* class constraint.  */
+ 
+ /* Print this constraint to PP (which must support %E for trees),
+    using CM to look up equiv_class instances from ids.  */
+ 
+ void
+ constraint::print (pretty_printer *pp, const constraint_manager &cm) const
+ {
+   m_lhs.print (pp);
+   pp_string (pp, ": ");
+   m_lhs.get_obj (cm).print (pp);
+   pp_string (pp, " ");
+   pp_string (pp, constraint_op_code (m_op));
+   pp_string (pp, " ");
+   m_rhs.print (pp);
+   pp_string (pp, ": ");
+   m_rhs.get_obj (cm).print (pp);
+ }
+ 
+ /* Generate a hash value for this constraint.  */
+ 
+ hashval_t
+ constraint::hash () const
+ {
+   inchash::hash hstate;
+   hstate.add_int (m_lhs.m_idx);
+   hstate.add_int (m_op);
+   hstate.add_int (m_rhs.m_idx);
+   return hstate.end ();
+ }
+ 
+ /* Equality operator for constraints.  */
+ 
+ bool
+ constraint::operator== (const constraint &other) const
+ {
+   if (m_lhs != other.m_lhs)
+     return false;
+   if (m_op != other.m_op)
+     return false;
+   if (m_rhs != other.m_rhs)
+     return false;
+   return true;
+ }
+ 
+ /* class equiv_class_id.  */
+ 
+ /* Get the underlying equiv_class for this ID from CM.  */
+ 
+ const equiv_class &
+ equiv_class_id::get_obj (const constraint_manager &cm) const
+ {
+   return cm.get_equiv_class_by_index (m_idx);
+ }
+ 
+ /* Access the underlying equiv_class for this ID from CM.  */
+ 
+ equiv_class &
+ equiv_class_id::get_obj (constraint_manager &cm) const
+ {
+   return cm.get_equiv_class_by_index (m_idx);
+ }
+ 
+ /* Print this equiv_class_id to PP.  */
+ 
+ void
+ equiv_class_id::print (pretty_printer *pp) const
+ {
+   if (null_p ())
+     pp_printf (pp, "null");
+   else
+     pp_printf (pp, "ec%i", m_idx);
+ }
+ 
+ /* class constraint_manager.  */
+ 
+ /* constraint_manager's copy ctor.  */
+ 
+ constraint_manager::constraint_manager (const constraint_manager &other)
+ : m_equiv_classes (other.m_equiv_classes.length ()),
+   m_constraints (other.m_constraints.length ())
+ {
+   int i;
+   equiv_class *ec;
+   FOR_EACH_VEC_ELT (other.m_equiv_classes, i, ec)
+     m_equiv_classes.quick_push (new equiv_class (*ec));
+   constraint *c;
+   FOR_EACH_VEC_ELT (other.m_constraints, i, c)
+     m_constraints.quick_push (*c);
+ }
+ 
+ /* constraint_manager's assignment operator.  */
+ 
+ constraint_manager&
+ constraint_manager::operator= (const constraint_manager &other)
+ {
+   gcc_assert (m_equiv_classes.length () == 0);
+   gcc_assert (m_constraints.length () == 0);
+ 
+   int i;
+   equiv_class *ec;
+   m_equiv_classes.reserve (other.m_equiv_classes.length ());
+   FOR_EACH_VEC_ELT (other.m_equiv_classes, i, ec)
+     m_equiv_classes.quick_push (new equiv_class (*ec));
+   constraint *c;
+   m_constraints.reserve (other.m_constraints.length ());
+   FOR_EACH_VEC_ELT (other.m_constraints, i, c)
+     m_constraints.quick_push (*c);
+ 
+   return *this;
+ }
+ 
+ /* Generate a hash value for this constraint_manager.  */
+ 
+ hashval_t
+ constraint_manager::hash () const
+ {
+   inchash::hash hstate;
+   int i;
+   equiv_class *ec;
+   constraint *c;
+ 
+   FOR_EACH_VEC_ELT (m_equiv_classes, i, ec)
+     hstate.merge_hash (ec->hash ());
+   FOR_EACH_VEC_ELT (m_constraints, i, c)
+     hstate.merge_hash (c->hash ());
+   return hstate.end ();
+ }
+ 
+ /* Equality operator for constraint_manager.  */
+ 
+ bool
+ constraint_manager::operator== (const constraint_manager &other) const
+ {
+   if (m_equiv_classes.length () != other.m_equiv_classes.length ())
+     return false;
+   if (m_constraints.length () != other.m_constraints.length ())
+     return false;
+ 
+   int i;
+   equiv_class *ec;
+ 
+   FOR_EACH_VEC_ELT (m_equiv_classes, i, ec)
+     if (!(*ec == *other.m_equiv_classes[i]))
+       return false;
+ 
+   constraint *c;
+ 
+   FOR_EACH_VEC_ELT (m_constraints, i, c)
+     if (!(*c == other.m_constraints[i]))
+       return false;
+ 
+   return true;
+ }
+ 
+ /* Print this constraint_manager to PP (which must support %E for trees).  */
+ 
+ void
+ constraint_manager::print (pretty_printer *pp) const
+ {
+   pp_string (pp, "{");
+   int i;
+   equiv_class *ec;
+   FOR_EACH_VEC_ELT (m_equiv_classes, i, ec)
+     {
+       if (i > 0)
+ 	pp_string (pp, ", ");
+       equiv_class_id (i).print (pp);
+       pp_string (pp, ": ");
+       ec->print (pp);
+     }
+   pp_string (pp, "  |  ");
+   constraint *c;
+   FOR_EACH_VEC_ELT (m_constraints, i, c)
+     {
+       if (i > 0)
+ 	pp_string (pp, " && ");
+       c->print (pp, *this);
+     }
+   pp_printf (pp, "}");
+ }
+ 
+ /* Dump a multiline representation of this constraint_manager to PP
+    (which must support %E for trees).  */
+ 
+ void
+ constraint_manager::dump_to_pp (pretty_printer *pp) const
+ {
+   // TODO
+   pp_string (pp, "  equiv classes:");
+   pp_newline (pp);
+   int i;
+   equiv_class *ec;
+   FOR_EACH_VEC_ELT (m_equiv_classes, i, ec)
+     {
+       pp_string (pp, "    ");
+       equiv_class_id (i).print (pp);
+       pp_string (pp, ": ");
+       ec->print (pp);
+       pp_newline (pp);
+     }
+   pp_string (pp, "  constraints:");
+   pp_newline (pp);
+   constraint *c;
+   FOR_EACH_VEC_ELT (m_constraints, i, c)
+     {
+       pp_printf (pp, "    %i: ", i);
+       c->print (pp, *this);
+       pp_newline (pp);
+     }
+ }
+ 
+ /* Dump a multiline representation of this constraint_manager to FP.  */
+ 
+ void
+ constraint_manager::dump (FILE *fp) const
+ {
+   pretty_printer pp;
+   pp_format_decoder (&pp) = default_tree_printer;
+   pp_show_color (&pp) = pp_show_color (global_dc->printer);
+   pp.buffer->stream = fp;
+   dump_to_pp (&pp);
+   pp_flush (&pp);
+ }
+ 
+ /* Dump a multiline representation of this constraint_manager to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ constraint_manager::dump () const
+ {
+   dump (stderr);
+ }
+ 
+ /* Dump a multiline representation of CM to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ debug (const constraint_manager &cm)
+ {
+   cm.dump ();
+ }
+ 
+ /* Attempt to add the constraint LHS OP RHS to this constraint_manager.
+    Return true if the constraint could be added (or is already true).
+    Return false if the constraint contradicts existing knowledge.  */
+ 
+ bool
+ constraint_manager::add_constraint (svalue_id lhs,
+ 				    enum tree_code op,
+ 				    svalue_id rhs)
+ {
+   equiv_class_id lhs_ec_id = get_or_add_equiv_class (lhs);
+   equiv_class_id rhs_ec_id = get_or_add_equiv_class (rhs);
+   return add_constraint (lhs_ec_id, op,rhs_ec_id);
+ }
+ 
+ /* Attempt to add the constraint LHS_EC_ID OP RHS_EC_ID to this
+    constraint_manager.
+    Return true if the constraint could be added (or is already true).
+    Return false if the constraint contradicts existing knowledge.  */
+ 
+ bool
+ constraint_manager::add_constraint (equiv_class_id lhs_ec_id,
+ 				    enum tree_code op,
+ 				    equiv_class_id rhs_ec_id)
+ {
+   tristate t = eval_condition (lhs_ec_id, op, rhs_ec_id);
+ 
+   /* Discard constraints that are already known.  */
+   if (t.is_true ())
+     return true;
+ 
+   /* Reject unsatisfiable constraints.  */
+   if (t.is_false ())
+     return false;
+ 
+   gcc_assert (lhs_ec_id != rhs_ec_id);
+ 
+   /* For now, simply accumulate constraints, without attempting any further
+      optimization.  */
+   switch (op)
+     {
+     case EQ_EXPR:
+       {
+ 	/* Merge rhs_ec into lhs_ec.  */
+ 	equiv_class &lhs_ec_obj = lhs_ec_id.get_obj (*this);
+ 	const equiv_class &rhs_ec_obj = rhs_ec_id.get_obj (*this);
+ 
+ 	int i;
+ 	svalue_id *sid;
+ 	FOR_EACH_VEC_ELT (rhs_ec_obj.m_vars, i, sid)
+ 	  lhs_ec_obj.add (*sid, *this);
+ 
+ 	if (rhs_ec_obj.m_constant)
+ 	  {
+ 	    lhs_ec_obj.m_constant = rhs_ec_obj.m_constant;
+ 	    lhs_ec_obj.m_cst_sid = rhs_ec_obj.m_cst_sid;
+ 	  }
+ 
+ 	/* Drop rhs equivalence class, overwriting it with the
+ 	   final ec (which might be the same one).  */
+ 	equiv_class_id final_ec_id = m_equiv_classes.length () - 1;
+ 	equiv_class *old_ec = m_equiv_classes[rhs_ec_id.m_idx];
+ 	equiv_class *final_ec = m_equiv_classes.pop ();
+ 	if (final_ec != old_ec)
+ 	  m_equiv_classes[rhs_ec_id.m_idx] = final_ec;
+ 	delete old_ec;
+ 
+ 	/* Update the constraints.  */
+ 	constraint *c;
+ 	FOR_EACH_VEC_ELT (m_constraints, i, c)
+ 	  {
+ 	    /* Update references to the rhs_ec so that
+ 	       they refer to the lhs_ec.  */
+ 	    if (c->m_lhs == rhs_ec_id)
+ 	      c->m_lhs = lhs_ec_id;
+ 	    if (c->m_rhs == rhs_ec_id)
+ 	      c->m_rhs = lhs_ec_id;
+ 
+ 	    /* Renumber all constraints that refer to the final rhs_ec
+ 	       to the old rhs_ec, where the old final_ec now lives.  */
+ 	    if (c->m_lhs == final_ec_id)
+ 	      c->m_lhs = rhs_ec_id;
+ 	    if (c->m_rhs == final_ec_id)
+ 	      c->m_rhs = rhs_ec_id;
+ 	  }
+       }
+       break;
+     case GE_EXPR:
+       add_constraint_internal (rhs_ec_id, CONSTRAINT_LE, lhs_ec_id);
+       break;
+     case LE_EXPR:
+       add_constraint_internal (lhs_ec_id, CONSTRAINT_LE, rhs_ec_id);
+       break;
+     case NE_EXPR:
+       add_constraint_internal (lhs_ec_id, CONSTRAINT_NE, rhs_ec_id);
+       break;
+     case GT_EXPR:
+       add_constraint_internal (rhs_ec_id, CONSTRAINT_LT, lhs_ec_id);
+       break;
+     case LT_EXPR:
+       add_constraint_internal (lhs_ec_id, CONSTRAINT_LT, rhs_ec_id);
+       break;
+     default:
+       /* do nothing.  */
+       break;
+     }
+   validate ();
+   return true;
+ }
+ 
+ /* Subroutine of constraint_manager::add_constraint, for handling all
+    operations other than equality (for which equiv classes are merged).  */
+ 
+ void
+ constraint_manager::add_constraint_internal (equiv_class_id lhs_id,
+ 					     enum constraint_op c_op,
+ 					     equiv_class_id rhs_id)
+ {
+   /* Add the constraint.  */
+   m_constraints.safe_push (constraint (lhs_id, c_op, rhs_id));
+ 
+   if (!flag_analyzer_transitivity)
+     return;
+ 
+   if (c_op != CONSTRAINT_NE)
+     {
+       /* The following can potentially add EQ_EXPR facts, which could lead
+ 	 to ECs being merged, which would change the meaning of the EC IDs.
+ 	 Hence we need to do this via representatives.  */
+       svalue_id lhs = lhs_id.get_obj (*this).get_representative ();
+       svalue_id rhs = rhs_id.get_obj (*this).get_representative ();
+ 
+       /* We have LHS </<= RHS */
+ 
+       /* Handle transitivity of ordering by adding additional constraints
+ 	 based on what we already knew.
+ 
+ 	 So if we have already have:
+ 	   (a < b)
+ 	   (c < d)
+ 	 Then adding:
+ 	   (b < c)
+ 	 will also add:
+ 	   (a < c)
+ 	   (b < d)
+ 	 We need to recurse to ensure we also add:
+ 	   (a < d).
+ 	 We call the checked add_constraint to avoid adding constraints
+ 	 that are already present.  Doing so also ensures termination
+ 	 in the case of cycles.
+ 
+ 	 We also check for single-element ranges, adding EQ_EXPR facts
+ 	 where we discover them.  For example 3 < x < 5 implies
+ 	 that x == 4 (if x is an integer).  */
+       for (unsigned i = 0; i < m_constraints.length (); i++)
+ 	{
+ 	  const constraint *other = &m_constraints[i];
+ 	  if (other->is_ordering_p ())
+ 	    {
+ 	      /* Refresh the EC IDs, in case any mergers have happened.  */
+ 	      lhs_id = get_or_add_equiv_class (lhs);
+ 	      rhs_id = get_or_add_equiv_class (rhs);
+ 
+ 	      tree lhs_const = lhs_id.get_obj (*this).m_constant;
+ 	      tree rhs_const = rhs_id.get_obj (*this).m_constant;
+ 	      tree other_lhs_const
+ 		= other->m_lhs.get_obj (*this).m_constant;
+ 	      tree other_rhs_const
+ 		= other->m_rhs.get_obj (*this).m_constant;
+ 
+ 	      /* We have "LHS </<= RHS" and "other.lhs </<= other.rhs".  */
+ 
+ 	      /* If we have LHS </<= RHS and RHS </<= LHS, then we have a
+ 		 cycle.  */
+ 	      if (rhs_id == other->m_lhs
+ 		  && other->m_rhs == lhs_id)
+ 		{
+ 		  /* We must have equality for this to be possible.  */
+ 		  gcc_assert (c_op == CONSTRAINT_LE
+ 			      && other->m_op == CONSTRAINT_LE);
+ 		  add_constraint (lhs_id, EQ_EXPR, rhs_id);
+ 		  /* Adding an equality will merge the two ECs and potentially
+ 		     reorganize the constraints.  Stop iterating.  */
+ 		  return;
+ 		}
+ 	      /* Otherwise, check for transitivity.  */
+ 	      if (rhs_id == other->m_lhs)
+ 		{
+ 		  /* With RHS == other.lhs, we have:
+ 		     "LHS </<= (RHS, other.lhs) </<= other.rhs"
+ 		     and thus this implies "LHS </<= other.rhs".  */
+ 
+ 		  /* Do we have a tightly-constrained range?  */
+ 		  if (lhs_const
+ 		      && !rhs_const
+ 		      && other_rhs_const)
+ 		    {
+ 		      range r (bound (lhs_const, c_op == CONSTRAINT_LE),
+ 			       bound (other_rhs_const,
+ 				      other->m_op == CONSTRAINT_LE));
+ 		      tree constant;
+ 		      if (r.constrained_to_single_element (&constant))
+ 			{
+ 			  svalue_id cst_sid = get_sid_for_constant (constant);
+ 			  add_constraint
+ 			    (rhs_id, EQ_EXPR,
+ 			     get_or_add_equiv_class (cst_sid));
+ 			  return;
+ 			}
+ 		    }
+ 
+ 		  /* Otherwise, add the constraint implied by transitivity.  */
+ 		  enum tree_code new_op
+ 		    = ((c_op == CONSTRAINT_LE && other->m_op == CONSTRAINT_LE)
+ 		       ? LE_EXPR : LT_EXPR);
+ 		  add_constraint (lhs_id, new_op, other->m_rhs);
+ 		}
+ 	      else if (other->m_rhs == lhs_id)
+ 		{
+ 		  /* With other.rhs == LHS, we have:
+ 		     "other.lhs </<= (other.rhs, LHS) </<= RHS"
+ 		     and thus this implies "other.lhs </<= RHS".  */
+ 
+ 		  /* Do we have a tightly-constrained range?  */
+ 		  if (other_lhs_const
+ 		      && !lhs_const
+ 		      && rhs_const)
+ 		    {
+ 		      range r (bound (other_lhs_const,
+ 				      other->m_op == CONSTRAINT_LE),
+ 			       bound (rhs_const,
+ 				      c_op == CONSTRAINT_LE));
+ 		      tree constant;
+ 		      if (r.constrained_to_single_element (&constant))
+ 			{
+ 			  svalue_id cst_sid = get_sid_for_constant (constant);
+ 			  add_constraint
+ 			    (lhs_id, EQ_EXPR,
+ 			     get_or_add_equiv_class (cst_sid));
+ 			  return;
+ 			}
+ 		    }
+ 
+ 		  /* Otherwise, add the constraint implied by transitivity.  */
+ 		  enum tree_code new_op
+ 		    = ((c_op == CONSTRAINT_LE && other->m_op == CONSTRAINT_LE)
+ 		       ? LE_EXPR : LT_EXPR);
+ 		  add_constraint (other->m_lhs, new_op, rhs_id);
+ 		}
+ 	    }
+ 	}
+     }
+ }
+ 
+ /* Look for SID within the equivalence classes of this constraint_manager;
+    if found, write the id to *OUT and return true, otherwise return false.  */
+ 
+ bool
+ constraint_manager::get_equiv_class_by_sid (svalue_id sid, equiv_class_id *out) const
+ {
+   /* TODO: should we have a map, rather than these searches?  */
+   int i;
+   equiv_class *ec;
+   FOR_EACH_VEC_ELT (m_equiv_classes, i, ec)
+     {
+       int j;
+       svalue_id *iv;
+       FOR_EACH_VEC_ELT (ec->m_vars, j, iv)
+ 	if (*iv == sid)
+ 	  {
+ 	    *out = equiv_class_id (i);
+ 	    return true;
+ 	  }
+     }
+   return false;
+ }
+ 
+ /* Ensure that SID has an equivalence class within this constraint_manager;
+    return the ID of the class.  */
+ 
+ equiv_class_id
+ constraint_manager::get_or_add_equiv_class (svalue_id sid)
+ {
+   equiv_class_id result (-1);
+ 
+   /* Try svalue_id match.  */
+   if (get_equiv_class_by_sid (sid, &result))
+     return result;
+ 
+   /* Try equality of constants.  */
+   if (tree cst = maybe_get_constant (sid))
+     {
+       int i;
+       equiv_class *ec;
+       FOR_EACH_VEC_ELT (m_equiv_classes, i, ec)
+ 	if (ec->m_constant
+ 	    && types_compatible_p (TREE_TYPE (cst),
+ 				   TREE_TYPE (ec->m_constant)))
+ 	  {
+ 	    tree eq = fold_binary (EQ_EXPR, boolean_type_node,
+ 				   cst, ec->m_constant);
+ 	    if (eq == boolean_true_node)
+ 	      {
+ 		ec->add (sid, *this);
+ 		return equiv_class_id (i);
+ 	      }
+ 	  }
+     }
+ 
+ 
+   /* Not found.  */
+   equiv_class *new_ec = new equiv_class ();
+   new_ec->add (sid, *this);
+   m_equiv_classes.safe_push (new_ec);
+ 
+   equiv_class_id new_id (m_equiv_classes.length () - 1);
+ 
+   if (maybe_get_constant (sid))
+     {
+       /* If we have a new EC for a constant, add constraints comparing this
+ 	 to other constants we may have (so that we accumulate the transitive
+ 	 closure of all constraints on constants as the constants are
+ 	 added).  */
+       for (equiv_class_id other_id (0); other_id.m_idx < new_id.m_idx;
+ 	   other_id.m_idx++)
+ 	{
+ 	  const equiv_class &other_ec = other_id.get_obj (*this);
+ 	  if (other_ec.m_constant
+ 	      && types_compatible_p (TREE_TYPE (new_ec->m_constant),
+ 				     TREE_TYPE (other_ec.m_constant)))
+ 	    {
+ 	      /* If we have two ECs, both with constants, the constants must be
+ 		 non-equal (or they would be in the same EC).
+ 		 Determine the direction of the inequality, and record that
+ 		 fact.  */
+ 	      tree lt
+ 		= fold_binary (LT_EXPR, boolean_type_node,
+ 			       new_ec->m_constant, other_ec.m_constant);
+ 	      if (lt == boolean_true_node)
+ 		add_constraint_internal (new_id, CONSTRAINT_LT, other_id);
+ 	      else if (lt == boolean_false_node)
+ 		add_constraint_internal (other_id, CONSTRAINT_LT, new_id);
+ 	      /* Refresh new_id, in case ECs were merged.  SID should always
+ 		 be present by now, so this should never lead to a
+ 		 recursion.  */
+ 	      new_id = get_or_add_equiv_class (sid);
+ 	    }
+ 	}
+     }
+ 
+   return new_id;
+ }
+ 
+ /* Evaluate the condition LHS_EC OP RHS_EC.  */
+ 
+ tristate
+ constraint_manager::eval_condition (equiv_class_id lhs_ec,
+ 				    enum tree_code op,
+ 				    equiv_class_id rhs_ec)
+ {
+   if (lhs_ec == rhs_ec)
+     {
+       switch (op)
+ 	{
+ 	case EQ_EXPR:
+ 	case GE_EXPR:
+ 	case LE_EXPR:
+ 	  return tristate (tristate::TS_TRUE);
+ 
+ 	case NE_EXPR:
+ 	case GT_EXPR:
+ 	case LT_EXPR:
+ 	  return tristate (tristate::TS_FALSE);
+ 	default:
+ 	  break;
+ 	}
+     }
+ 
+   tree lhs_const = lhs_ec.get_obj (*this).get_any_constant ();
+   tree rhs_const = rhs_ec.get_obj (*this).get_any_constant ();
+   if (lhs_const && rhs_const)
+     {
+       tree comparison
+ 	= fold_binary (op, boolean_type_node, lhs_const, rhs_const);
+       if (comparison == boolean_true_node)
+ 	return tristate (tristate::TS_TRUE);
+       if (comparison == boolean_false_node)
+ 	return tristate (tristate::TS_FALSE);
+     }
+ 
+   enum tree_code swapped_op = swap_tree_comparison (op);
+ 
+   int i;
+   constraint *c;
+   FOR_EACH_VEC_ELT (m_constraints, i, c)
+     {
+       if (c->m_lhs == lhs_ec
+ 	  && c->m_rhs == rhs_ec)
+ 	{
+ 	  tristate result_for_constraint
+ 	    = eval_constraint_op_for_op (c->m_op, op);
+ 	  if (result_for_constraint.is_known ())
+ 	    return result_for_constraint;
+ 	}
+       /* Swapped operands.  */
+       if (c->m_lhs == rhs_ec
+ 	  && c->m_rhs == lhs_ec)
+ 	{
+ 	  tristate result_for_constraint
+ 	    = eval_constraint_op_for_op (c->m_op, swapped_op);
+ 	  if (result_for_constraint.is_known ())
+ 	    return result_for_constraint;
+ 	}
+     }
+ 
+   return tristate (tristate::TS_UNKNOWN);
+ }
+ 
+ /* Evaluate the condition LHS OP RHS, creating equiv_class instances for
+    LHS and RHS if they aren't already in equiv_classes.  */
+ 
+ tristate
+ constraint_manager::eval_condition (svalue_id lhs,
+ 				    enum tree_code op,
+ 				    svalue_id rhs)
+ {
+   return eval_condition (get_or_add_equiv_class (lhs),
+ 			 op,
+ 			 get_or_add_equiv_class (rhs));
+ }
+ 
+ /* Delete any information about svalue_id instances identified by P.
+    Such instances are removed from equivalence classes, and any
+    redundant ECs and constraints are also removed.
+    Accumulate stats into STATS.  */
+ 
+ void
+ constraint_manager::purge (const purge_criteria &p, purge_stats *stats)
+ {
+   /* Delete any svalue_ids identified by P within the various equivalence
+      classes.  */
+   for (unsigned ec_idx = 0; ec_idx < m_equiv_classes.length (); )
+     {
+       equiv_class *ec = m_equiv_classes[ec_idx];
+ 
+       int i;
+       svalue_id *pv;
+       bool delete_ec = false;
+       FOR_EACH_VEC_ELT (ec->m_vars, i, pv)
+ 	{
+ 	  if (*pv == ec->m_cst_sid)
+ 	    continue;
+ 	  if (p.should_purge_p (*pv))
+ 	    {
+ 	      if (ec->del (*pv))
+ 		if (!ec->m_constant)
+ 		  delete_ec = true;
+ 	    }
+ 	}
+ 
+       if (delete_ec)
+ 	{
+ 	  delete ec;
+ 	  m_equiv_classes.ordered_remove (ec_idx);
+ 	  if (stats)
+ 	    stats->m_num_equiv_classes++;
+ 
+ 	  /* Update the constraints, potentially removing some.  */
+ 	  for (unsigned con_idx = 0; con_idx < m_constraints.length (); )
+ 	    {
+ 	      constraint *c = &m_constraints[con_idx];
+ 
+ 	      /* Remove constraints that refer to the deleted EC.  */
+ 	      if (c->m_lhs == ec_idx
+ 		  || c->m_rhs == ec_idx)
+ 		{
+ 		  m_constraints.ordered_remove (con_idx);
+ 		  if (stats)
+ 		    stats->m_num_constraints++;
+ 		}
+ 	      else
+ 		{
+ 		  /* Renumber constraints that refer to ECs that have
+ 		     had their idx changed.  */
+ 		  c->m_lhs.update_for_removal (ec_idx);
+ 		  c->m_rhs.update_for_removal (ec_idx);
+ 
+ 		  con_idx++;
+ 		}
+ 	    }
+ 	}
+       else
+ 	ec_idx++;
+     }
+ 
+   /* Now delete any constraints that are purely between constants.  */
+   for (unsigned con_idx = 0; con_idx < m_constraints.length (); )
+     {
+       constraint *c = &m_constraints[con_idx];
+       if (m_equiv_classes[c->m_lhs.m_idx]->m_vars.length () == 0
+ 	  && m_equiv_classes[c->m_rhs.m_idx]->m_vars.length () == 0)
+ 	{
+ 	  m_constraints.ordered_remove (con_idx);
+ 	  if (stats)
+ 	    stats->m_num_constraints++;
+ 	}
+       else
+ 	{
+ 	  con_idx++;
+ 	}
+     }
+ 
+   /* Finally, delete any ECs that purely contain constants and aren't
+      referenced by any constraints.  */
+   for (unsigned ec_idx = 0; ec_idx < m_equiv_classes.length (); )
+     {
+       equiv_class *ec = m_equiv_classes[ec_idx];
+       if (ec->m_vars.length () == 0)
+ 	{
+ 	  equiv_class_id ec_id (ec_idx);
+ 	  bool has_constraint = false;
+ 	  for (unsigned con_idx = 0; con_idx < m_constraints.length ();
+ 	       con_idx++)
+ 	    {
+ 	      constraint *c = &m_constraints[con_idx];
+ 	      if (c->m_lhs == ec_id
+ 		  || c->m_rhs == ec_id)
+ 		{
+ 		  has_constraint = true;
+ 		  break;
+ 		}
+ 	    }
+ 	  if (!has_constraint)
+ 	    {
+ 	      delete ec;
+ 	      m_equiv_classes.ordered_remove (ec_idx);
+ 	      if (stats)
+ 		stats->m_num_equiv_classes++;
+ 
+ 	      /* Renumber constraints that refer to ECs that have
+ 		 had their idx changed.  */
+ 	      for (unsigned con_idx = 0; con_idx < m_constraints.length ();
+ 		   con_idx++)
+ 		{
+ 		  constraint *c = &m_constraints[con_idx];
+ 		  c->m_lhs.update_for_removal (ec_idx);
+ 		  c->m_rhs.update_for_removal (ec_idx);
+ 		}
+ 	      continue;
+ 	    }
+ 	}
+       ec_idx++;
+     }
+ 
+   validate ();
+ }
+ 
+ /* Remap all svalue_ids within this constraint_manager using MAP.  */
+ 
+ void
+ constraint_manager::remap_svalue_ids (const svalue_id_map &map)
+ {
+   int i;
+   equiv_class *ec;
+   FOR_EACH_VEC_ELT (m_equiv_classes, i, ec)
+     ec->remap_svalue_ids (map);
+ }
+ 
+ /* Comparator for use by constraint_manager::canonicalize.
+    Sort a pair of equiv_class instances, using the representative
+    svalue_id as a sort key.  */
+ 
+ static int
+ equiv_class_cmp (const void *p1, const void *p2)
+ {
+   const equiv_class *ec1 = *(const equiv_class * const *)p1;
+   const equiv_class *ec2 = *(const equiv_class * const *)p2;
+ 
+   svalue_id rep1 = ec1->get_representative ();
+   svalue_id rep2 = ec2->get_representative ();
+ 
+   return rep1.as_int () - rep2.as_int ();
+ }
+ 
+ /* Comparator for use by constraint_manager::canonicalize.
+    Sort a pair of constraint instances.  */
+ 
+ static int
+ constraint_cmp (const void *p1, const void *p2)
+ {
+   const constraint *c1 = (const constraint *)p1;
+   const constraint *c2 = (const constraint *)p2;
+   int lhs_cmp = c1->m_lhs.as_int () - c2->m_lhs.as_int ();
+   if (lhs_cmp)
+     return lhs_cmp;
+   int rhs_cmp = c1->m_rhs.as_int () - c2->m_rhs.as_int ();
+   if (rhs_cmp)
+     return rhs_cmp;
+   return c1->m_op - c2->m_op;
+ }
+ 
+ /* Reorder the equivalence classes and constraints within this
+    constraint_manager into a canonical order, to increase the
+    chances of finding equality with another instance.  */
+ 
+ void
+ constraint_manager::canonicalize (unsigned num_svalue_ids)
+ {
+   /* First, sort svalue_ids within the ECs.  */
+   unsigned i;
+   equiv_class *ec;
+   FOR_EACH_VEC_ELT (m_equiv_classes, i, ec)
+     ec->canonicalize ();
+ 
+   /* Next, sort the ECs into a canonical order.  */
+ 
+   /* We will need to remap the equiv_class_ids in the constraints,
+      so we need to store the original index of each EC.
+      Build a lookup table, mapping from representative svalue_id
+      to the original equiv_class_id of that svalue_id.  */
+   auto_vec<equiv_class_id> original_ec_id (num_svalue_ids);
+   for (i = 0; i < num_svalue_ids; i++)
+     original_ec_id.quick_push (equiv_class_id::null ());
+   FOR_EACH_VEC_ELT (m_equiv_classes, i, ec)
+     {
+       svalue_id rep = ec->get_representative ();
+       gcc_assert (!rep.null_p ());
+       original_ec_id[rep.as_int ()] = i;
+     }
+ 
+   /* Sort the equivalence classes.  */
+   m_equiv_classes.qsort (equiv_class_cmp);
+ 
+   /* Populate ec_id_map based on the old vs new EC ids.  */
+   one_way_id_map<equiv_class_id> ec_id_map (m_equiv_classes.length ());
+   FOR_EACH_VEC_ELT (m_equiv_classes, i, ec)
+     {
+       svalue_id rep = ec->get_representative ();
+       ec_id_map.put (original_ec_id[rep.as_int ()], i);
+     }
+ 
+   /* Update the EC ids within the constraints.  */
+   constraint *c;
+   FOR_EACH_VEC_ELT (m_constraints, i, c)
+     {
+       ec_id_map.update (&c->m_lhs);
+       ec_id_map.update (&c->m_rhs);
+     }
+ 
+   /* Finally, sort the constraints. */
+   m_constraints.qsort (constraint_cmp);
+ }
+ 
+ /* A concrete subclass of constraint_manager for use when
+    merging two constraint_manager into a third constraint_manager,
+    each of which has its own region_model.
+    Calls are delegated to the constraint_manager for the merged model,
+    and thus affect its region_model.  */
+ 
+ class cleaned_constraint_manager : public constraint_manager
+ {
+ public:
+   cleaned_constraint_manager (constraint_manager *merged) : m_merged (merged) {}
+ 
+   constraint_manager *clone (region_model *) const FINAL OVERRIDE
+   {
+     gcc_unreachable ();
+   }
+   tree maybe_get_constant (svalue_id sid) const FINAL OVERRIDE
+   {
+     return m_merged->maybe_get_constant (sid);
+   }
+   svalue_id get_sid_for_constant (tree cst) const FINAL OVERRIDE
+   {
+     return m_merged->get_sid_for_constant (cst);
+   }
+   virtual int get_num_svalues () const FINAL OVERRIDE
+   {
+     return m_merged->get_num_svalues ();
+   }
+ private:
+   constraint_manager *m_merged;
+ };
+ 
+ /* Concrete subclass of fact_visitor for use by constraint_manager::merge.
+    For every fact in CM_A, see if it is also true in *CM_B.  Add such
+    facts to *OUT.  */
+ 
+ class merger_fact_visitor : public fact_visitor
+ {
+ public:
+   merger_fact_visitor (constraint_manager *cm_b,
+ 		       constraint_manager *out)
+   : m_cm_b (cm_b), m_out (out)
+   {}
+ 
+   void on_fact (svalue_id lhs, enum tree_code code, svalue_id rhs)
+     FINAL OVERRIDE
+   {
+     if (m_cm_b->eval_condition (lhs, code, rhs).is_true ())
+       {
+ 	bool sat = m_out->add_constraint (lhs, code, rhs);
+ 	gcc_assert (sat);
+       }
+   }
+ 
+ private:
+   constraint_manager *m_cm_b;
+   constraint_manager *m_out;
+ };
+ 
+ /* Use MERGER to merge CM_A and CM_B into *OUT.
+    If one thinks of a constraint_manager as a subset of N-dimensional
+    space, this takes the union of the points of CM_A and CM_B, and
+    expresses that into *OUT.  Alternatively, it can be thought of
+    as the intersection of the constraints.  */
+ 
+ void
+ constraint_manager::merge (const constraint_manager &cm_a,
+ 			   const constraint_manager &cm_b,
+ 			   constraint_manager *out,
+ 			   const model_merger &merger)
+ {
+   gcc_assert (merger.m_sid_mapping);
+ 
+   /* Map svalue_ids in each equiv class from both sources
+      to the merged region_model, dropping ids that don't survive merger,
+      and potentially creating svalues in *OUT for constants.  */
+   cleaned_constraint_manager cleaned_cm_a (out);
+   const one_way_svalue_id_map &map_a_to_m
+     = merger.m_sid_mapping->m_map_from_a_to_m;
+   clean_merger_input (cm_a, map_a_to_m, &cleaned_cm_a);
+ 
+   cleaned_constraint_manager cleaned_cm_b (out);
+   const one_way_svalue_id_map &map_b_to_m
+     = merger.m_sid_mapping->m_map_from_b_to_m;
+   clean_merger_input (cm_b, map_b_to_m, &cleaned_cm_b);
+ 
+   /* At this point, the two cleaned CMs have ECs and constraints referring
+      to svalues in the merged region model, but both of them have separate
+      ECs.  */
+ 
+   /* Merge the equivalence classes and constraints.
+      The easiest way to do this seems to be to enumerate all of the facts
+      in cleaned_cm_a, see which are also true in cleaned_cm_b,
+      and add those to *OUT.  */
+   merger_fact_visitor v (&cleaned_cm_b, out);
+   cleaned_cm_a.for_each_fact (&v);
+ }
+ 
+ /* A subroutine of constraint_manager::merge.
+    Use MAP_SID_TO_M to map equivalence classes and constraints from
+    SM_IN to *OUT.  Purge any non-constant svalue_id that don't appear
+    in the result of MAP_SID_TO_M, purging any ECs and their constraints
+    that become empty as a result.  Potentially create svalues in
+    the merged region_model for constants that weren't already in use there.  */
+ 
+ void
+ constraint_manager::
+ clean_merger_input (const constraint_manager &cm_in,
+ 		    const one_way_svalue_id_map &map_sid_to_m,
+ 		    constraint_manager *out)
+ {
+   one_way_id_map<equiv_class_id> map_ec_to_m
+     (cm_in.m_equiv_classes.length ());
+   unsigned ec_idx;
+   equiv_class *ec;
+   FOR_EACH_VEC_ELT (cm_in.m_equiv_classes, ec_idx, ec)
+     {
+       equiv_class cleaned_ec;
+       if (tree cst = ec->get_any_constant ())
+ 	{
+ 	  cleaned_ec.m_constant = cst;
+ 	  /* Lazily create the constant in the out region_model.  */
+ 	  cleaned_ec.m_cst_sid = out->get_sid_for_constant (cst);
+ 	}
+       unsigned var_idx;
+       svalue_id *var_in_sid;
+       FOR_EACH_VEC_ELT (ec->m_vars, var_idx, var_in_sid)
+ 	{
+ 	  svalue_id var_m_sid = map_sid_to_m.get_dst_for_src (*var_in_sid);
+ 	  if (!var_m_sid.null_p ())
+ 	    cleaned_ec.m_vars.safe_push (var_m_sid);
+ 	}
+       if (cleaned_ec.get_any_constant () || !cleaned_ec.m_vars.is_empty ())
+ 	{
+ 	  map_ec_to_m.put (ec_idx, out->m_equiv_classes.length ());
+ 	  out->m_equiv_classes.safe_push (new equiv_class (cleaned_ec));
+ 	}
+     }
+ 
+   /* Write out to *OUT any constraints for which both sides survived
+      cleaning, using the new EC IDs.  */
+   unsigned con_idx;
+   constraint *c;
+   FOR_EACH_VEC_ELT (cm_in.m_constraints, con_idx, c)
+     {
+       equiv_class_id new_lhs = map_ec_to_m.get_dst_for_src (c->m_lhs);
+       if (new_lhs.null_p ())
+ 	continue;
+       equiv_class_id new_rhs = map_ec_to_m.get_dst_for_src (c->m_rhs);
+       if (new_rhs.null_p ())
+ 	continue;
+       out->m_constraints.safe_push (constraint (new_lhs,
+ 						c->m_op,
+ 						new_rhs));
+     }
+ }
+ 
+ /* Call VISITOR's on_fact vfunc repeatedly to express the various
+    equivalence classes and constraints.
+    This is used by constraint_manager::merge to find the common
+    facts between two input constraint_managers.  */
+ 
+ void
+ constraint_manager::for_each_fact (fact_visitor *visitor) const
+ {
+   /* First, call EQ_EXPR within the various equivalence classes.  */
+   unsigned ec_idx;
+   equiv_class *ec;
+   FOR_EACH_VEC_ELT (m_equiv_classes, ec_idx, ec)
+     {
+       if (!ec->m_cst_sid.null_p ())
+ 	{
+ 	  unsigned i;
+ 	  svalue_id *sid;
+ 	  FOR_EACH_VEC_ELT (ec->m_vars, i, sid)
+ 	    visitor->on_fact (ec->m_cst_sid, EQ_EXPR, *sid);
+ 	}
+       for (unsigned i = 0; i < ec->m_vars.length (); i++)
+ 	for (unsigned j = i + 1; j < ec->m_vars.length (); j++)
+ 	  visitor->on_fact (ec->m_vars[i], EQ_EXPR, ec->m_vars[j]);
+     }
+ 
+   /* Now, express the various constraints.  */
+   unsigned con_idx;
+   constraint *c;
+   FOR_EACH_VEC_ELT (m_constraints, con_idx, c)
+     {
+       const equiv_class &ec_lhs = c->m_lhs.get_obj (*this);
+       const equiv_class &ec_rhs = c->m_rhs.get_obj (*this);
+       enum tree_code code = constraint_tree_code (c->m_op);
+ 
+       if (!ec_lhs.m_cst_sid.null_p ())
+ 	{
+ 	  for (unsigned j = 0; j < ec_rhs.m_vars.length (); j++)
+ 	    {
+ 	      visitor->on_fact (ec_lhs.m_cst_sid, code, ec_rhs.m_vars[j]);
+ 	    }
+ 	}
+       for (unsigned i = 0; i < ec_lhs.m_vars.length (); i++)
+ 	{
+ 	  if (!ec_rhs.m_cst_sid.null_p ())
+ 	    visitor->on_fact (ec_lhs.m_vars[i], code, ec_rhs.m_cst_sid);
+ 	  for (unsigned j = 0; j < ec_rhs.m_vars.length (); j++)
+ 	    visitor->on_fact (ec_lhs.m_vars[i], code, ec_rhs.m_vars[j]);
+ 	}
+     }
+ }
+ 
+ /* Assert that this object is valid.  */
+ 
+ void
+ constraint_manager::validate () const
+ {
+   /* Skip this in a release build.  */
+ #if !CHECKING_P
+   return;
+ #endif
+ 
+   int i;
+   equiv_class *ec;
+   FOR_EACH_VEC_ELT (m_equiv_classes, i, ec)
+     {
+       gcc_assert (ec);
+ 
+       int j;
+       svalue_id *sid;
+       FOR_EACH_VEC_ELT (ec->m_vars, j, sid)
+ 	{
+ 	  gcc_assert (!sid->null_p ());
+ 	  gcc_assert (sid->as_int () < get_num_svalues ());
+ 	}
+       if (ec->m_constant)
+ 	{
+ 	  gcc_assert (CONSTANT_CLASS_P (ec->m_constant));
+ 	  gcc_assert (!ec->m_cst_sid.null_p ());
+ 	  gcc_assert (ec->m_cst_sid.as_int () < get_num_svalues ());
+ 	}
+ #if 0
+       else
+ 	gcc_assert (ec->m_vars.length () > 0);
+ #endif
+     }
+ 
+   constraint *c;
+   FOR_EACH_VEC_ELT (m_constraints, i, c)
+     {
+       gcc_assert (!c->m_lhs.null_p ());
+       gcc_assert (c->m_lhs.as_int () <= (int)m_equiv_classes.length ());
+       gcc_assert (!c->m_rhs.null_p ());
+       gcc_assert (c->m_rhs.as_int () <= (int)m_equiv_classes.length ());
+     }
+ }
+ 
+ #if CHECKING_P
+ 
+ namespace selftest {
+ 
+ /* Various constraint_manager selftests.
+    These have to be written in terms of a region_model, since
+    the latter is responsible for managing svalue and svalue_id
+    instances.  */
+ 
+ /* Verify that setting and getting simple conditions within a region_model
+    work (thus exercising the underlying constraint_manager).  */
+ 
+ static void
+ test_constraint_conditions ()
+ {
+   tree int_42 = build_int_cst (integer_type_node, 42);
+   tree int_0 = build_int_cst (integer_type_node, 0);
+ 
+   tree x = build_global_decl ("x", integer_type_node);
+   tree y = build_global_decl ("y", integer_type_node);
+   tree z = build_global_decl ("z", integer_type_node);
+ 
+   /* Self-comparisons.  */
+   {
+     region_model model;
+     ASSERT_CONDITION_TRUE (model, x, EQ_EXPR, x);
+     ASSERT_CONDITION_TRUE (model, x, LE_EXPR, x);
+     ASSERT_CONDITION_TRUE (model, x, GE_EXPR, x);
+     ASSERT_CONDITION_FALSE (model, x, NE_EXPR, x);
+     ASSERT_CONDITION_FALSE (model, x, LT_EXPR, x);
+     ASSERT_CONDITION_FALSE (model, x, GT_EXPR, x);
+   }
+ 
+   /* x == y.  */
+   {
+     region_model model;
+     ASSERT_CONDITION_UNKNOWN (model, x, EQ_EXPR, y);
+ 
+     ADD_SAT_CONSTRAINT (model, x, EQ_EXPR, y);
+ 
+     ASSERT_CONDITION_TRUE (model, x, EQ_EXPR, y);
+     ASSERT_CONDITION_TRUE (model, x, LE_EXPR, y);
+     ASSERT_CONDITION_TRUE (model, x, GE_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, NE_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, LT_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, GT_EXPR, y);
+ 
+     /* Swapped operands.  */
+     ASSERT_CONDITION_TRUE (model, y, EQ_EXPR, x);
+     ASSERT_CONDITION_TRUE (model, y, LE_EXPR, x);
+     ASSERT_CONDITION_TRUE (model, y, GE_EXPR, x);
+     ASSERT_CONDITION_FALSE (model, y, NE_EXPR, x);
+     ASSERT_CONDITION_FALSE (model, y, LT_EXPR, x);
+     ASSERT_CONDITION_FALSE (model, y, GT_EXPR, x);
+ 
+     /* Comparison with other var.  */
+     ASSERT_CONDITION_UNKNOWN (model, x, EQ_EXPR, z);
+     ASSERT_CONDITION_UNKNOWN (model, x, LE_EXPR, z);
+     ASSERT_CONDITION_UNKNOWN (model, x, GE_EXPR, z);
+     ASSERT_CONDITION_UNKNOWN (model, x, NE_EXPR, z);
+     ASSERT_CONDITION_UNKNOWN (model, x, LT_EXPR, z);
+     ASSERT_CONDITION_UNKNOWN (model, x, GT_EXPR, z);
+   }
+ 
+   /* x == y, then y == z  */
+   {
+     region_model model;
+     ASSERT_CONDITION_UNKNOWN (model, x, EQ_EXPR, y);
+ 
+     ADD_SAT_CONSTRAINT (model, x, EQ_EXPR, y);
+     ADD_SAT_CONSTRAINT (model, y, EQ_EXPR, z);
+ 
+     ASSERT_CONDITION_TRUE (model, x, EQ_EXPR, z);
+     ASSERT_CONDITION_TRUE (model, x, LE_EXPR, z);
+     ASSERT_CONDITION_TRUE (model, x, GE_EXPR, z);
+     ASSERT_CONDITION_FALSE (model, x, NE_EXPR, z);
+     ASSERT_CONDITION_FALSE (model, x, LT_EXPR, z);
+     ASSERT_CONDITION_FALSE (model, x, GT_EXPR, z);
+   }
+ 
+   /* x != y.  */
+   {
+     region_model model;
+ 
+     ADD_SAT_CONSTRAINT (model, x, NE_EXPR, y);
+ 
+     ASSERT_CONDITION_TRUE (model, x, NE_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, EQ_EXPR, y);
+     ASSERT_CONDITION_UNKNOWN (model, x, LE_EXPR, y);
+     ASSERT_CONDITION_UNKNOWN (model, x, GE_EXPR, y);
+     ASSERT_CONDITION_UNKNOWN (model, x, LT_EXPR, y);
+     ASSERT_CONDITION_UNKNOWN (model, x, GT_EXPR, y);
+ 
+     /* Swapped operands.  */
+     ASSERT_CONDITION_TRUE (model, y, NE_EXPR, x);
+     ASSERT_CONDITION_FALSE (model, y, EQ_EXPR, x);
+     ASSERT_CONDITION_UNKNOWN (model, y, LE_EXPR, x);
+     ASSERT_CONDITION_UNKNOWN (model, y, GE_EXPR, x);
+     ASSERT_CONDITION_UNKNOWN (model, y, LT_EXPR, x);
+     ASSERT_CONDITION_UNKNOWN (model, y, GT_EXPR, x);
+ 
+     /* Comparison with other var.  */
+     ASSERT_CONDITION_UNKNOWN (model, x, EQ_EXPR, z);
+     ASSERT_CONDITION_UNKNOWN (model, x, LE_EXPR, z);
+     ASSERT_CONDITION_UNKNOWN (model, x, GE_EXPR, z);
+     ASSERT_CONDITION_UNKNOWN (model, x, NE_EXPR, z);
+     ASSERT_CONDITION_UNKNOWN (model, x, LT_EXPR, z);
+     ASSERT_CONDITION_UNKNOWN (model, x, GT_EXPR, z);
+   }
+ 
+   /* x < y.  */
+   {
+     region_model model;
+ 
+     ADD_SAT_CONSTRAINT (model, x, LT_EXPR, y);
+ 
+     ASSERT_CONDITION_TRUE (model, x, LT_EXPR, y);
+     ASSERT_CONDITION_TRUE (model, x, LE_EXPR, y);
+     ASSERT_CONDITION_TRUE (model, x, NE_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, EQ_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, GT_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, GE_EXPR, y);
+ 
+     /* Swapped operands.  */
+     ASSERT_CONDITION_FALSE (model, y, LT_EXPR, x);
+     ASSERT_CONDITION_FALSE (model, y, LE_EXPR, x);
+     ASSERT_CONDITION_TRUE (model, y, NE_EXPR, x);
+     ASSERT_CONDITION_FALSE (model, y, EQ_EXPR, x);
+     ASSERT_CONDITION_TRUE (model, y, GT_EXPR, x);
+     ASSERT_CONDITION_TRUE (model, y, GE_EXPR, x);
+   }
+ 
+   /* x <= y.  */
+   {
+     region_model model;
+ 
+     ADD_SAT_CONSTRAINT (model, x, LE_EXPR, y);
+ 
+     ASSERT_CONDITION_UNKNOWN (model, x, LT_EXPR, y);
+     ASSERT_CONDITION_TRUE (model, x, LE_EXPR, y);
+     ASSERT_CONDITION_UNKNOWN (model, x, NE_EXPR, y);
+     ASSERT_CONDITION_UNKNOWN (model, x, EQ_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, GT_EXPR, y);
+     ASSERT_CONDITION_UNKNOWN (model, x, GE_EXPR, y);
+ 
+     /* Swapped operands.  */
+     ASSERT_CONDITION_FALSE (model, y, LT_EXPR, x);
+     ASSERT_CONDITION_UNKNOWN (model, y, LE_EXPR, x);
+     ASSERT_CONDITION_UNKNOWN (model, y, NE_EXPR, x);
+     ASSERT_CONDITION_UNKNOWN (model, y, EQ_EXPR, x);
+     ASSERT_CONDITION_UNKNOWN (model, y, GT_EXPR, x);
+     ASSERT_CONDITION_TRUE (model, y, GE_EXPR, x);
+   }
+ 
+   /* x > y.  */
+   {
+     region_model model;
+ 
+     ADD_SAT_CONSTRAINT (model, x, GT_EXPR, y);
+ 
+     ASSERT_CONDITION_TRUE (model, x, GT_EXPR, y);
+     ASSERT_CONDITION_TRUE (model, x, GE_EXPR, y);
+     ASSERT_CONDITION_TRUE (model, x, NE_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, EQ_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, LT_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, LE_EXPR, y);
+ 
+     /* Swapped operands.  */
+     ASSERT_CONDITION_FALSE (model, y, GT_EXPR, x);
+     ASSERT_CONDITION_FALSE (model, y, GE_EXPR, x);
+     ASSERT_CONDITION_TRUE (model, y, NE_EXPR, x);
+     ASSERT_CONDITION_FALSE (model, y, EQ_EXPR, x);
+     ASSERT_CONDITION_TRUE (model, y, LT_EXPR, x);
+     ASSERT_CONDITION_TRUE (model, y, LE_EXPR, x);
+   }
+ 
+   /* x >= y.  */
+   {
+     region_model model;
+ 
+     ADD_SAT_CONSTRAINT (model, x, GE_EXPR, y);
+ 
+     ASSERT_CONDITION_UNKNOWN (model, x, GT_EXPR, y);
+     ASSERT_CONDITION_TRUE (model, x, GE_EXPR, y);
+     ASSERT_CONDITION_UNKNOWN (model, x, NE_EXPR, y);
+     ASSERT_CONDITION_UNKNOWN (model, x, EQ_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, LT_EXPR, y);
+     ASSERT_CONDITION_UNKNOWN (model, x, LE_EXPR, y);
+ 
+     /* Swapped operands.  */
+     ASSERT_CONDITION_FALSE (model, y, GT_EXPR, x);
+     ASSERT_CONDITION_UNKNOWN (model, y, GE_EXPR, x);
+     ASSERT_CONDITION_UNKNOWN (model, y, NE_EXPR, x);
+     ASSERT_CONDITION_UNKNOWN (model, y, EQ_EXPR, x);
+     ASSERT_CONDITION_UNKNOWN (model, y, LT_EXPR, x);
+     ASSERT_CONDITION_TRUE (model, y, LE_EXPR, x);
+   }
+ 
+   // TODO: implied orderings
+ 
+   /* Constants.  */
+   {
+     region_model model;
+     ASSERT_CONDITION_FALSE (model, int_0, EQ_EXPR, int_42);
+     ASSERT_CONDITION_TRUE (model, int_0, NE_EXPR, int_42);
+     ASSERT_CONDITION_TRUE (model, int_0, LT_EXPR, int_42);
+     ASSERT_CONDITION_TRUE (model, int_0, LE_EXPR, int_42);
+     ASSERT_CONDITION_FALSE (model, int_0, GT_EXPR, int_42);
+     ASSERT_CONDITION_FALSE (model, int_0, GE_EXPR, int_42);
+   }
+ 
+   /* x == 0, y == 42.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, x, EQ_EXPR, int_0);
+     ADD_SAT_CONSTRAINT (model, y, EQ_EXPR, int_42);
+ 
+     ASSERT_CONDITION_TRUE (model, x, NE_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, EQ_EXPR, y);
+     ASSERT_CONDITION_TRUE (model, x, LE_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, GE_EXPR, y);
+     ASSERT_CONDITION_TRUE (model, x, LT_EXPR, y);
+     ASSERT_CONDITION_FALSE (model, x, GT_EXPR, y);
+   }
+ 
+   /* Unsatisfiable combinations.  */
+ 
+   /* x == y && x != y.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, x, EQ_EXPR, y);
+     ADD_UNSAT_CONSTRAINT (model, x, NE_EXPR, y);
+   }
+ 
+   /* x == 0 then x == 42.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, x, EQ_EXPR, int_0);
+     ADD_UNSAT_CONSTRAINT (model, x, EQ_EXPR, int_42);
+   }
+ 
+   /* x == 0 then x != 0.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, x, EQ_EXPR, int_0);
+     ADD_UNSAT_CONSTRAINT (model, x, NE_EXPR, int_0);
+   }
+ 
+   /* x == 0 then x > 0.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, x, EQ_EXPR, int_0);
+     ADD_UNSAT_CONSTRAINT (model, x, GT_EXPR, int_0);
+   }
+ 
+   /* x != y && x == y.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, x, NE_EXPR, y);
+     ADD_UNSAT_CONSTRAINT (model, x, EQ_EXPR, y);
+   }
+ 
+   /* x <= y && x > y.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, x, LE_EXPR, y);
+     ADD_UNSAT_CONSTRAINT (model, x, GT_EXPR, y);
+   }
+ 
+   // etc
+ }
+ 
+ /* Test transitivity of conditions.  */
+ 
+ static void
+ test_transitivity ()
+ {
+   tree a = build_global_decl ("a", integer_type_node);
+   tree b = build_global_decl ("b", integer_type_node);
+   tree c = build_global_decl ("c", integer_type_node);
+   tree d = build_global_decl ("d", integer_type_node);
+ 
+   /* a == b, then c == d, then c == b.  */
+   {
+     region_model model;
+     ASSERT_CONDITION_UNKNOWN (model, a, EQ_EXPR, b);
+     ASSERT_CONDITION_UNKNOWN (model, b, EQ_EXPR, c);
+     ASSERT_CONDITION_UNKNOWN (model, c, EQ_EXPR, d);
+     ASSERT_CONDITION_UNKNOWN (model, a, EQ_EXPR, d);
+ 
+     ADD_SAT_CONSTRAINT (model, a, EQ_EXPR, b);
+     ASSERT_CONDITION_TRUE (model, a, EQ_EXPR, b);
+ 
+     ADD_SAT_CONSTRAINT (model, c, EQ_EXPR, d);
+     ASSERT_CONDITION_TRUE (model, c, EQ_EXPR, d);
+     ASSERT_CONDITION_UNKNOWN (model, a, EQ_EXPR, d);
+ 
+     ADD_SAT_CONSTRAINT (model, c, EQ_EXPR, b);
+     ASSERT_CONDITION_TRUE (model, c, EQ_EXPR, b);
+     ASSERT_CONDITION_TRUE (model, a, EQ_EXPR, d);
+   }
+ 
+   /* Transitivity: "a < b", "b < c" should imply "a < c".  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, LT_EXPR, b);
+     ADD_SAT_CONSTRAINT (model, b, LT_EXPR, c);
+ 
+     ASSERT_CONDITION_TRUE (model, a, LT_EXPR, c);
+     ASSERT_CONDITION_FALSE (model, a, EQ_EXPR, c);
+   }
+ 
+   /* Transitivity: "a <= b", "b < c" should imply "a < c".  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, LE_EXPR, b);
+     ADD_SAT_CONSTRAINT (model, b, LT_EXPR, c);
+ 
+     ASSERT_CONDITION_TRUE (model, a, LT_EXPR, c);
+     ASSERT_CONDITION_FALSE (model, a, EQ_EXPR, c);
+   }
+ 
+   /* Transitivity: "a <= b", "b <= c" should imply "a <= c".  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, LE_EXPR, b);
+     ADD_SAT_CONSTRAINT (model, b, LE_EXPR, c);
+ 
+     ASSERT_CONDITION_TRUE (model, a, LE_EXPR, c);
+     ASSERT_CONDITION_UNKNOWN (model, a, EQ_EXPR, c);
+   }
+ 
+   /* Transitivity: "a > b", "b > c" should imply "a > c".  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, GT_EXPR, b);
+     ADD_SAT_CONSTRAINT (model, b, GT_EXPR, c);
+ 
+     ASSERT_CONDITION_TRUE (model, a, GT_EXPR, c);
+     ASSERT_CONDITION_FALSE (model, a, EQ_EXPR, c);
+   }
+ 
+   /* Transitivity: "a >= b", "b > c" should imply " a > c".  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, GE_EXPR, b);
+     ADD_SAT_CONSTRAINT (model, b, GT_EXPR, c);
+ 
+     ASSERT_CONDITION_TRUE (model, a, GT_EXPR, c);
+     ASSERT_CONDITION_FALSE (model, a, EQ_EXPR, c);
+   }
+ 
+   /* Transitivity: "a >= b", "b >= c" should imply "a >= c".  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, GE_EXPR, b);
+     ADD_SAT_CONSTRAINT (model, b, GE_EXPR, c);
+ 
+     ASSERT_CONDITION_TRUE (model, a, GE_EXPR, c);
+     ASSERT_CONDITION_UNKNOWN (model, a, EQ_EXPR, c);
+   }
+ 
+   /* Transitivity: "(a < b)", "(c < d)", "(b < c)" should
+      imply the easy cases:
+        (a < c)
+        (b < d)
+      but also that:
+        (a < d).  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, LT_EXPR, b);
+     ADD_SAT_CONSTRAINT (model, c, LT_EXPR, d);
+     ADD_SAT_CONSTRAINT (model, b, LT_EXPR, c);
+ 
+     ASSERT_CONDITION_TRUE (model, a, LT_EXPR, c);
+     ASSERT_CONDITION_TRUE (model, b, LT_EXPR, d);
+     ASSERT_CONDITION_TRUE (model, a, LT_EXPR, d);
+   }
+ 
+   /* Transitivity: "a >= b", "b >= a" should imply that a == b.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, GE_EXPR, b);
+     ADD_SAT_CONSTRAINT (model, b, GE_EXPR, a);
+ 
+     // TODO:
+     ASSERT_CONDITION_TRUE (model, a, EQ_EXPR, b);
+   }
+ 
+   /* Transitivity: "a >= b", "b > a" should be impossible.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, GE_EXPR, b);
+     ADD_UNSAT_CONSTRAINT (model, b, GT_EXPR, a);
+   }
+ 
+   /* Transitivity: "a >= b", "b >= c", "c >= a" should imply
+      that a == b == c.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, GE_EXPR, b);
+     ADD_SAT_CONSTRAINT (model, b, GE_EXPR, c);
+     ADD_SAT_CONSTRAINT (model, c, GE_EXPR, a);
+ 
+     ASSERT_CONDITION_TRUE (model, a, EQ_EXPR, c);
+   }
+ 
+   /* Transitivity: "a > b", "b > c", "c > a"
+      should be impossible.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, GT_EXPR, b);
+     ADD_SAT_CONSTRAINT (model, b, GT_EXPR, c);
+     ADD_UNSAT_CONSTRAINT (model, c, GT_EXPR, a);
+   }
+ 
+ }
+ 
+ /* Test various conditionals involving constants where the results
+    ought to be implied based on the values of the constants.  */
+ 
+ static void
+ test_constant_comparisons ()
+ {
+   tree int_3 = build_int_cst (integer_type_node, 3);
+   tree int_4 = build_int_cst (integer_type_node, 4);
+   tree int_5 = build_int_cst (integer_type_node, 5);
+ 
+   tree int_1023 = build_int_cst (integer_type_node, 1023);
+   tree int_1024 = build_int_cst (integer_type_node, 1024);
+ 
+   tree a = build_global_decl ("a", integer_type_node);
+   tree b = build_global_decl ("b", integer_type_node);
+ 
+   /* Given a >= 1024, then a <= 1023 should be impossible.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, GE_EXPR, int_1024);
+     ADD_UNSAT_CONSTRAINT (model, a, LE_EXPR, int_1023);
+   }
+ 
+   /* a > 4.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, GT_EXPR, int_4);
+     ASSERT_CONDITION_TRUE (model, a, GT_EXPR, int_4);
+     ASSERT_CONDITION_TRUE (model, a, NE_EXPR, int_3);
+     ASSERT_CONDITION_UNKNOWN (model, a, NE_EXPR, int_5);
+   }
+ 
+   /* a <= 4.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, LE_EXPR, int_4);
+     ASSERT_CONDITION_FALSE (model, a, GT_EXPR, int_4);
+     ASSERT_CONDITION_FALSE (model, a, GT_EXPR, int_5);
+     ASSERT_CONDITION_UNKNOWN (model, a, NE_EXPR, int_3);
+   }
+ 
+   /* If "a > b" and "a == 3", then "b == 4" ought to be unsatisfiable.  */
+   {
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, a, GT_EXPR, b);
+     ADD_SAT_CONSTRAINT (model, a, EQ_EXPR, int_3);
+     ADD_UNSAT_CONSTRAINT (model, b, EQ_EXPR, int_4);
+   }
+ 
+   /* Various tests of int ranges where there is only one possible candidate.  */
+   {
+     /* If "a <= 4" && "a > 3", then "a == 4",
+        assuming a is of integral type.  */
+     {
+       region_model model;
+       ADD_SAT_CONSTRAINT (model, a, LE_EXPR, int_4);
+       ADD_SAT_CONSTRAINT (model, a, GT_EXPR, int_3);
+       ASSERT_CONDITION_TRUE (model, a, EQ_EXPR, int_4);
+     }
+ 
+     /* If "a > 3" && "a <= 4", then "a == 4",
+        assuming a is of integral type.  */
+     {
+       region_model model;
+       ADD_SAT_CONSTRAINT (model, a, GT_EXPR, int_3);
+       ADD_SAT_CONSTRAINT (model, a, LE_EXPR, int_4);
+       ASSERT_CONDITION_TRUE (model, a, EQ_EXPR, int_4);
+     }
+     /* If "a > 3" && "a < 5", then "a == 4",
+        assuming a is of integral type.  */
+     {
+       region_model model;
+       ADD_SAT_CONSTRAINT (model, a, GT_EXPR, int_3);
+       ADD_SAT_CONSTRAINT (model, a, LT_EXPR, int_5);
+       ASSERT_CONDITION_TRUE (model, a, EQ_EXPR, int_4);
+     }
+     /* If "a >= 4" && "a < 5", then "a == 4",
+        assuming a is of integral type.  */
+     {
+       region_model model;
+       ADD_SAT_CONSTRAINT (model, a, GE_EXPR, int_4);
+       ADD_SAT_CONSTRAINT (model, a, LT_EXPR, int_5);
+       ASSERT_CONDITION_TRUE (model, a, EQ_EXPR, int_4);
+     }
+     /* If "a >= 4" && "a <= 4", then "a == 4".  */
+     {
+       region_model model;
+       ADD_SAT_CONSTRAINT (model, a, GE_EXPR, int_4);
+       ADD_SAT_CONSTRAINT (model, a, LE_EXPR, int_4);
+       ASSERT_CONDITION_TRUE (model, a, EQ_EXPR, int_4);
+     }
+   }
+ 
+   /* As above, but for floating-point:
+      if "f > 3" && "f <= 4" we don't know that f == 4.  */
+   {
+     tree f = build_global_decl ("f", double_type_node);
+     tree float_3 = build_real_from_int_cst (double_type_node, int_3);
+     tree float_4 = build_real_from_int_cst (double_type_node, int_4);
+ 
+     region_model model;
+     ADD_SAT_CONSTRAINT (model, f, GT_EXPR, float_3);
+     ADD_SAT_CONSTRAINT (model, f, LE_EXPR, float_4);
+     ASSERT_CONDITION_UNKNOWN (model, f, EQ_EXPR, float_4);
+     ASSERT_CONDITION_UNKNOWN (model, f, EQ_EXPR, int_4);
+   }
+ }
+ 
+ /* Verify various lower-level implementation details about
+    constraint_manager.  */
+ 
+ static void
+ test_constraint_impl ()
+ {
+   tree int_42 = build_int_cst (integer_type_node, 42);
+   tree int_0 = build_int_cst (integer_type_node, 0);
+ 
+   tree x = build_global_decl ("x", integer_type_node);
+   tree y = build_global_decl ("y", integer_type_node);
+   tree z = build_global_decl ("z", integer_type_node);
+ 
+   /* x == y.  */
+   {
+     region_model model;
+ 
+     ADD_SAT_CONSTRAINT (model, x, EQ_EXPR, y);
+ 
+     /* Assert various things about the insides of model.  */
+     constraint_manager *cm = model.get_constraints ();
+     ASSERT_EQ (cm->m_constraints.length (), 0);
+     ASSERT_EQ (cm->m_equiv_classes.length (), 1);
+   }
+ 
+   /* y <= z; x == y.  */
+   {
+     region_model model;
+     ASSERT_CONDITION_UNKNOWN (model, x, EQ_EXPR, y);
+     ASSERT_CONDITION_UNKNOWN (model, x, GE_EXPR, z);
+ 
+     ADD_SAT_CONSTRAINT (model, y, GE_EXPR, z);
+     ASSERT_CONDITION_TRUE (model, y, GE_EXPR, z);
+     ASSERT_CONDITION_UNKNOWN (model, x, GE_EXPR, z);
+ 
+     ADD_SAT_CONSTRAINT (model, x, EQ_EXPR, y);
+ 
+     /* Assert various things about the insides of model.  */
+     constraint_manager *cm = model.get_constraints ();
+     ASSERT_EQ (cm->m_constraints.length (), 1);
+     ASSERT_EQ (cm->m_equiv_classes.length (), 2);
+ 
+     /* Ensure that we merged the constraints.  */
+     ASSERT_CONDITION_TRUE (model, x, GE_EXPR, z);
+   }
+ 
+   /* y <= z; y == x.  */
+   {
+     region_model model;
+     ASSERT_CONDITION_UNKNOWN (model, x, EQ_EXPR, y);
+     ASSERT_CONDITION_UNKNOWN (model, x, GE_EXPR, z);
+ 
+     ADD_SAT_CONSTRAINT (model, y, GE_EXPR, z);
+     ASSERT_CONDITION_TRUE (model, y, GE_EXPR, z);
+     ASSERT_CONDITION_UNKNOWN (model, x, GE_EXPR, z);
+ 
+     ADD_SAT_CONSTRAINT (model, y, EQ_EXPR, x);
+ 
+     /* Assert various things about the insides of model.  */
+     constraint_manager *cm = model.get_constraints ();
+     ASSERT_EQ (cm->m_constraints.length (), 1);
+     ASSERT_EQ (cm->m_equiv_classes.length (), 2);
+ 
+     /* Ensure that we merged the constraints.  */
+     ASSERT_CONDITION_TRUE (model, x, GE_EXPR, z);
+   }
+ 
+   /* x == 0, then x != 42.  */
+   {
+     region_model model;
+ 
+     ADD_SAT_CONSTRAINT (model, x, EQ_EXPR, int_0);
+     ADD_SAT_CONSTRAINT (model, x, NE_EXPR, int_42);
+ 
+     /* Assert various things about the insides of model.  */
+     constraint_manager *cm = model.get_constraints ();
+     ASSERT_EQ (cm->m_constraints.length (), 1);
+     ASSERT_EQ (cm->m_equiv_classes.length (), 2);
+     ASSERT_EQ (cm->m_constraints[0].m_lhs,
+ 	       cm->get_or_add_equiv_class (model.get_rvalue (int_0, NULL)));
+     ASSERT_EQ (cm->m_constraints[0].m_rhs,
+ 	       cm->get_or_add_equiv_class (model.get_rvalue (int_42, NULL)));
+     ASSERT_EQ (cm->m_constraints[0].m_op, CONSTRAINT_LT);
+   }
+ 
+   // TODO: selftest for merging ecs "in the middle"
+   // where a non-final one gets overwritten
+ 
+   // TODO: selftest where there are pre-existing constraints
+ }
+ 
+ /* Check that operator== and hashing works as expected for the
+    various types.  */
+ 
+ static void
+ test_equality ()
+ {
+   tree x = build_global_decl ("x", integer_type_node);
+   tree y = build_global_decl ("y", integer_type_node);
+ 
+   {
+     region_model model0;
+     region_model model1;
+ 
+     constraint_manager *cm0 = model0.get_constraints ();
+     constraint_manager *cm1 = model1.get_constraints ();
+ 
+     ASSERT_EQ (cm0->hash (), cm1->hash ());
+     ASSERT_EQ (*cm0, *cm1);
+ 
+     ASSERT_EQ (model0.hash (), model1.hash ());
+     ASSERT_EQ (model0, model1);
+ 
+     ADD_SAT_CONSTRAINT (model1, x, EQ_EXPR, y);
+     ASSERT_NE (cm0->hash (), cm1->hash ());
+     ASSERT_NE (*cm0, *cm1);
+ 
+     ASSERT_NE (model0.hash (), model1.hash ());
+     ASSERT_NE (model0, model1);
+ 
+     region_model model2;
+     constraint_manager *cm2 = model2.get_constraints ();
+     /* Make the same change to cm2.  */
+     ADD_SAT_CONSTRAINT (model2, x, EQ_EXPR, y);
+     ASSERT_EQ (cm1->hash (), cm2->hash ());
+     ASSERT_EQ (*cm1, *cm2);
+ 
+     ASSERT_EQ (model1.hash (), model2.hash ());
+     ASSERT_EQ (model1, model2);
+   }
+ }
+ 
+ /* Verify tracking inequality of a variable against many constants.  */
+ 
+ static void
+ test_many_constants ()
+ {
+   tree a = build_global_decl ("a", integer_type_node);
+ 
+   region_model model;
+   auto_vec<tree> constants;
+   for (int i = 0; i < 20; i++)
+     {
+       tree constant = build_int_cst (integer_type_node, i);
+       constants.safe_push (constant);
+       ADD_SAT_CONSTRAINT (model, a, NE_EXPR, constant);
+ 
+       /* Merge, and check the result.  */
+       region_model other (model);
+ 
+       region_model merged;
+       ASSERT_TRUE (model.can_merge_with_p (other, &merged));
+       model.canonicalize (NULL);
+       merged.canonicalize (NULL);
+       ASSERT_EQ (model, merged);
+ 
+       for (int j = 0; j <= i; j++)
+ 	ASSERT_CONDITION_TRUE (model, a, NE_EXPR, constants[j]);
+     }
+ }
+ 
+ /* Run the selftests in this file, temporarily overriding
+    flag_analyzer_transitivity with TRANSITIVITY.  */
+ 
+ static void
+ run_constraint_manager_tests (bool transitivity)
+ {
+   int saved_flag_analyzer_transitivity = flag_analyzer_transitivity;
+   flag_analyzer_transitivity = transitivity;
+ 
+   test_constraint_conditions ();
+   if (flag_analyzer_transitivity)
+     {
+       /* These selftests assume transitivity.  */
+       test_transitivity ();
+       test_constant_comparisons ();
+     }
+   test_constraint_impl ();
+   test_equality ();
+   test_many_constants ();
+ 
+   flag_analyzer_transitivity = saved_flag_analyzer_transitivity;
+ }
+ 
+ /* Run all of the selftests within this file.  */
+ 
+ void
+ analyzer_constraint_manager_cc_tests ()
+ {
+   /* Run the tests twice: with and without transitivity.  */
+   run_constraint_manager_tests (true);
+   run_constraint_manager_tests (false);
+ }
+ 
+ } // namespace selftest
+ 
+ #endif /* CHECKING_P */
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/constraint-manager.h gcc-10.1.0/gcc/analyzer/constraint-manager.h
*** gcc-9.3.0/gcc/analyzer/constraint-manager.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/constraint-manager.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,250 ----
+ /* Tracking equivalence classes and constraints at a point on an execution path.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_CONSTRAINT_MANAGER_H
+ #define GCC_ANALYZER_CONSTRAINT_MANAGER_H
+ 
+ namespace ana {
+ 
+ class constraint_manager;
+ 
+ /* Abstract base class for specifying how state should be purged.  */
+ 
+ class purge_criteria
+ {
+ public:
+   virtual ~purge_criteria () {}
+   virtual bool should_purge_p (svalue_id sid) const = 0;
+ };
+ 
+ /* An equivalence class within a constraint manager: a set of
+    svalue_ids that are known to all be equal to each other,
+    together with an optional tree constant that they are equal to.  */
+ 
+ class equiv_class
+ {
+ public:
+   equiv_class ();
+   equiv_class (const equiv_class &other);
+ 
+   hashval_t hash () const;
+   bool operator== (const equiv_class &other);
+ 
+   void add (svalue_id sid, const constraint_manager &cm);
+   bool del (svalue_id sid);
+ 
+   tree get_any_constant () const { return m_constant; }
+ 
+   svalue_id get_representative () const;
+ 
+   void remap_svalue_ids (const svalue_id_map &map);
+ 
+   void canonicalize ();
+ 
+   void print (pretty_printer *pp) const;
+ 
+   /* An equivalence class can contain multiple constants (e.g. multiple
+      different zeroes, for different types); these are just for the last
+      constant added.  */
+   tree m_constant;
+   svalue_id m_cst_sid;
+ 
+   // TODO: should this be a set rather than a vec?
+   auto_vec<svalue_id> m_vars;
+ };
+ 
+ /* The various kinds of constraint.  */
+ 
+ enum constraint_op
+ {
+   CONSTRAINT_NE,
+   CONSTRAINT_LT,
+   CONSTRAINT_LE
+ };
+ 
+ const char *constraint_op_code (enum constraint_op c_op);
+ 
+ /* An ID for an equiv_class within a constraint_manager.  Internally, this
+    is an index into a vector of equiv_class * within the constraint_manager.  */
+ 
+ class equiv_class_id
+ {
+ public:
+   static equiv_class_id null () { return equiv_class_id (-1); }
+ 
+   equiv_class_id (unsigned idx) : m_idx (idx) {}
+   const equiv_class &get_obj (const constraint_manager &cm) const;
+   equiv_class &get_obj (constraint_manager &cm) const;
+ 
+   bool operator== (const equiv_class_id &other) const
+   {
+     return m_idx == other.m_idx;
+   }
+   bool operator!= (const equiv_class_id &other) const
+   {
+     return m_idx != other.m_idx;
+   }
+ 
+   bool null_p () const { return m_idx == -1; }
+ 
+   static equiv_class_id from_int (int idx) { return equiv_class_id (idx); }
+   int as_int () const { return m_idx; }
+ 
+   void print (pretty_printer *pp) const;
+ 
+   void update_for_removal (equiv_class_id other)
+   {
+     if (m_idx > other.m_idx)
+       m_idx--;
+   }
+ 
+   int m_idx;
+ };
+ 
+ /* A relationship between two equivalence classes in a constraint_manager.  */
+ 
+ class constraint
+ {
+  public:
+   constraint (equiv_class_id lhs, enum constraint_op c_op, equiv_class_id rhs)
+   : m_lhs (lhs), m_op (c_op), m_rhs (rhs)
+   {
+     gcc_assert (!lhs.null_p ());
+     gcc_assert (!rhs.null_p ());
+   }
+ 
+   void print (pretty_printer *pp, const constraint_manager &cm) const;
+ 
+   hashval_t hash () const;
+   bool operator== (const constraint &other) const;
+ 
+   /* Is this an ordering, rather than a "!=".  */
+   bool is_ordering_p () const
+   {
+     return m_op != CONSTRAINT_NE;
+   }
+ 
+   equiv_class_id m_lhs;
+   enum constraint_op m_op;
+   equiv_class_id m_rhs;
+ };
+ 
+ /* An abstract base class for use with constraint_manager::for_each_fact.  */
+ 
+ class fact_visitor
+ {
+  public:
+   virtual ~fact_visitor () {}
+   virtual void on_fact (svalue_id lhs, enum tree_code, svalue_id rhs) = 0;
+ };
+ 
+ /* A collection of equivalence classes and constraints on them.
+ 
+    Given N svalues, this can be thought of as representing a subset of
+    N-dimensional space.  When we call add_constraint,
+    we are effectively taking an intersection with that constraint.  */
+ 
+ class constraint_manager
+ {
+ public:
+   constraint_manager () {}
+   constraint_manager (const constraint_manager &other);
+   virtual ~constraint_manager () {}
+ 
+   virtual constraint_manager *clone (region_model *) const = 0;
+   virtual tree maybe_get_constant (svalue_id sid) const = 0;
+   virtual svalue_id get_sid_for_constant (tree cst) const = 0;
+   virtual int get_num_svalues () const = 0;
+ 
+   constraint_manager& operator= (const constraint_manager &other);
+ 
+   hashval_t hash () const;
+   bool operator== (const constraint_manager &other) const;
+   bool operator!= (const constraint_manager &other) const
+   {
+     return !(*this == other);
+   }
+ 
+   void print (pretty_printer *pp) const;
+   void dump_to_pp (pretty_printer *pp) const;
+   void dump (FILE *fp) const;
+   void dump () const;
+ 
+   const equiv_class &get_equiv_class_by_index (unsigned idx) const
+   {
+     return *m_equiv_classes[idx];
+   }
+   equiv_class &get_equiv_class_by_index (unsigned idx)
+   {
+     return *m_equiv_classes[idx];
+   }
+ 
+   equiv_class &get_equiv_class (svalue_id sid)
+   {
+     equiv_class_id ec_id = get_or_add_equiv_class (sid);
+     return ec_id.get_obj (*this);
+   }
+ 
+   bool add_constraint (svalue_id lhs, enum tree_code op, svalue_id rhs);
+ 
+   bool add_constraint (equiv_class_id lhs_ec_id,
+ 		       enum tree_code op,
+ 		       equiv_class_id rhs_ec_id);
+ 
+   bool get_equiv_class_by_sid (svalue_id sid, equiv_class_id *out) const;
+   equiv_class_id get_or_add_equiv_class (svalue_id sid);
+   tristate eval_condition (equiv_class_id lhs,
+ 			   enum tree_code op,
+ 			   equiv_class_id rhs);
+   tristate eval_condition (svalue_id lhs,
+ 			   enum tree_code op,
+ 			   svalue_id rhs);
+ 
+   void purge (const purge_criteria &p, purge_stats *stats);
+ 
+   void remap_svalue_ids (const svalue_id_map &map);
+ 
+   void canonicalize (unsigned num_svalue_ids);
+ 
+   static void merge (const constraint_manager &cm_a,
+ 		     const constraint_manager &cm_b,
+ 		     constraint_manager *out,
+ 		     const model_merger &merger);
+ 
+   void for_each_fact (fact_visitor *) const;
+ 
+   void validate () const;
+ 
+   auto_delete_vec<equiv_class> m_equiv_classes;
+   auto_vec<constraint> m_constraints;
+ 
+  private:
+   static void clean_merger_input (const constraint_manager &cm_in,
+ 				  const one_way_svalue_id_map &map_sid_to_m,
+ 				  constraint_manager *out);
+ 
+   void add_constraint_internal (equiv_class_id lhs_id,
+ 				enum constraint_op c_op,
+ 				equiv_class_id rhs_id);
+ };
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_CONSTRAINT_MANAGER_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/diagnostic-manager.cc gcc-10.1.0/gcc/analyzer/diagnostic-manager.cc
*** gcc-9.3.0/gcc/analyzer/diagnostic-manager.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/diagnostic-manager.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,1479 ----
+ /* Classes for saving, deduplicating, and emitting analyzer diagnostics.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "pretty-print.h"
+ #include "gcc-rich-location.h"
+ #include "gimple-pretty-print.h"
+ #include "function.h"
+ #include "diagnostic-core.h"
+ #include "diagnostic-event-id.h"
+ #include "diagnostic-path.h"
+ #include "alloc-pool.h"
+ #include "fibonacci_heap.h"
+ #include "shortest-paths.h"
+ #include "sbitmap.h"
+ #include "bitmap.h"
+ #include "tristate.h"
+ #include "selftest.h"
+ #include "ordered-hash-map.h"
+ #include "analyzer/analyzer.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/sm.h"
+ #include "analyzer/pending-diagnostic.h"
+ #include "analyzer/diagnostic-manager.h"
+ #include "analyzer/region-model.h"
+ #include "analyzer/constraint-manager.h"
+ #include "cfg.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "gimple-iterator.h"
+ #include "cgraph.h"
+ #include "digraph.h"
+ #include "analyzer/supergraph.h"
+ #include "analyzer/call-string.h"
+ #include "analyzer/program-point.h"
+ #include "analyzer/program-state.h"
+ #include "analyzer/exploded-graph.h"
+ #include "analyzer/checker-path.h"
+ #include "analyzer/reachability.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ /* class saved_diagnostic.  */
+ 
+ /* saved_diagnostic's ctor.
+    Take ownership of D and STMT_FINDER.  */
+ 
+ saved_diagnostic::saved_diagnostic (const state_machine *sm,
+ 				    const exploded_node *enode,
+ 				    const supernode *snode, const gimple *stmt,
+ 				    stmt_finder *stmt_finder,
+ 				    tree var, state_machine::state_t state,
+ 				    pending_diagnostic *d)
+ : m_sm (sm), m_enode (enode), m_snode (snode), m_stmt (stmt),
+  /* stmt_finder could be on-stack; we want our own copy that can
+     outlive that.  */
+   m_stmt_finder (stmt_finder ? stmt_finder->clone () : NULL),
+   m_var (var), m_state (state),
+   m_d (d), m_trailing_eedge (NULL),
+   m_status (STATUS_NEW), m_epath_length (0), m_problem (NULL)
+ {
+   gcc_assert (m_stmt || m_stmt_finder);
+ 
+   /* We must have an enode in order to be able to look for paths
+      through the exploded_graph to this diagnostic.  */
+   gcc_assert (m_enode);
+ }
+ 
+ /* saved_diagnostic's dtor.  */
+ 
+ saved_diagnostic::~saved_diagnostic ()
+ {
+   delete m_stmt_finder;
+   delete m_d;
+   delete m_problem;
+ }
+ 
+ bool
+ saved_diagnostic::operator== (const saved_diagnostic &other) const
+ {
+   return (m_sm == other.m_sm
+ 	  /* We don't compare m_enode.  */
+ 	  && m_snode == other.m_snode
+ 	  && m_stmt == other.m_stmt
+ 	  /* We don't compare m_stmt_finder.  */
+ 	  && pending_diagnostic::same_tree_p (m_var, other.m_var)
+ 	  && m_state == other.m_state
+ 	  && m_d->equal_p (*other.m_d)
+ 	  && m_trailing_eedge == other.m_trailing_eedge);
+ }
+ 
+ /* State for building a checker_path from a particular exploded_path.
+    In particular, this precomputes reachability information: the set of
+    source enodes for which a path be found to the diagnostic enode.  */
+ 
+ class path_builder
+ {
+ public:
+   path_builder (const exploded_graph &eg,
+ 		const exploded_path &epath)
+   : m_eg (eg),
+     m_diag_enode (epath.get_final_enode ()),
+     m_reachability (eg, m_diag_enode)
+   {}
+ 
+   const exploded_node *get_diag_node () const { return m_diag_enode; }
+ 
+   bool reachable_from_p (const exploded_node *src_enode) const
+   {
+     return m_reachability.reachable_from_p (src_enode);
+   }
+ 
+   const extrinsic_state &get_ext_state () const { return m_eg.get_ext_state (); }
+ 
+ private:
+   typedef reachability<eg_traits> enode_reachability;
+ 
+   const exploded_graph &m_eg;
+ 
+   /* The enode where the diagnostic occurs.  */
+   const exploded_node *m_diag_enode;
+ 
+   /* Precompute all enodes from which the diagnostic is reachable.  */
+   enode_reachability m_reachability;
+ };
+ 
+ /* class diagnostic_manager.  */
+ 
+ /* diagnostic_manager's ctor.  */
+ 
+ diagnostic_manager::diagnostic_manager (logger *logger, int verbosity)
+ : log_user (logger), m_verbosity (verbosity)
+ {
+ }
+ 
+ /* Queue pending_diagnostic D at ENODE for later emission.  */
+ 
+ void
+ diagnostic_manager::add_diagnostic (const state_machine *sm,
+ 				    const exploded_node *enode,
+ 				    const supernode *snode, const gimple *stmt,
+ 				    stmt_finder *finder,
+ 				    tree var, state_machine::state_t state,
+ 				    pending_diagnostic *d)
+ {
+   LOG_FUNC (get_logger ());
+ 
+   /* We must have an enode in order to be able to look for paths
+      through the exploded_graph to the diagnostic.  */
+   gcc_assert (enode);
+ 
+   saved_diagnostic *sd
+     = new saved_diagnostic (sm, enode, snode, stmt, finder, var, state, d);
+   m_saved_diagnostics.safe_push (sd);
+   if (get_logger ())
+     log ("adding saved diagnostic %i at SN %i: %qs",
+ 	 m_saved_diagnostics.length () - 1,
+ 	 snode->m_index, d->get_kind ());
+ }
+ 
+ /* Queue pending_diagnostic D at ENODE for later emission.  */
+ 
+ void
+ diagnostic_manager::add_diagnostic (const exploded_node *enode,
+ 				    const supernode *snode, const gimple *stmt,
+ 				    stmt_finder *finder,
+ 				    pending_diagnostic *d)
+ {
+   gcc_assert (enode);
+   add_diagnostic (NULL, enode, snode, stmt, finder, NULL_TREE, 0, d);
+ }
+ 
+ /* A class for identifying sets of duplicated pending_diagnostic.
+ 
+    We want to find the simplest dedupe_candidate amongst those that share a
+    dedupe_key.  */
+ 
+ class dedupe_key
+ {
+ public:
+   dedupe_key (const saved_diagnostic &sd,
+ 	      const exploded_path &epath)
+   : m_sd (sd), m_stmt (sd.m_stmt)
+   {
+     /* Support deferring the choice of stmt until after an emission path has
+      been built, using an optional stmt_finder.  */
+     if (m_stmt == NULL)
+       {
+ 	gcc_assert (sd.m_stmt_finder);
+ 	m_stmt = sd.m_stmt_finder->find_stmt (epath);
+       }
+     gcc_assert (m_stmt);
+   }
+ 
+   hashval_t hash () const
+   {
+     inchash::hash hstate;
+     hstate.add_ptr (m_stmt);
+     // TODO: m_sd
+     return hstate.end ();
+   }
+   bool operator== (const dedupe_key &other) const
+   {
+     return (m_sd == other.m_sd
+ 	    && m_stmt == other.m_stmt);
+   }
+ 
+   location_t get_location () const
+   {
+     return m_stmt->location;
+   }
+ 
+   /* A qsort comparator for use by dedupe_winners::emit_best
+      to sort them into location_t order.  */
+ 
+   static int
+   comparator (const void *p1, const void *p2)
+   {
+     const dedupe_key *pk1 = *(const dedupe_key * const *)p1;
+     const dedupe_key *pk2 = *(const dedupe_key * const *)p2;
+ 
+     location_t loc1 = pk1->get_location ();
+     location_t loc2 = pk2->get_location ();
+ 
+     return linemap_compare_locations (line_table, loc2, loc1);
+   }
+ 
+   const saved_diagnostic &m_sd;
+   const gimple *m_stmt;
+ };
+ 
+ /* The value of a slot for a dedupe_key within dedupe_winners:
+    the exploded_path for the best candidate for that key, and the
+    number of duplicates seen so far.  */
+ 
+ class dedupe_candidate
+ {
+ public:
+   // has the exploded_path
+   dedupe_candidate (const shortest_exploded_paths &sp,
+ 		    saved_diagnostic *sd)
+   : m_epath (sp.get_shortest_path (sd->m_enode)),
+     m_num_dupes (0)
+   {
+   }
+ 
+   unsigned length () const { return m_epath.length (); }
+   const exploded_path &get_path () const { return m_epath; }
+ 
+   void add_duplicate () { m_num_dupes++; }
+   int get_num_dupes () const { return m_num_dupes; }
+ 
+ private:
+   exploded_path m_epath;
+ public:
+   int m_num_dupes;
+ };
+ 
+ /* Traits for use by dedupe_winners.  */
+ 
+ class dedupe_hash_map_traits
+ {
+ public:
+   typedef const dedupe_key *key_type;
+   typedef dedupe_candidate *value_type;
+   typedef dedupe_candidate *compare_type;
+ 
+   static inline hashval_t hash (const key_type &v)
+   {
+     return v->hash ();
+   }
+   static inline bool equal_keys (const key_type &k1, const key_type &k2)
+   {
+     return *k1 == *k2;
+   }
+   template <typename T>
+   static inline void remove (T &)
+   {
+     // TODO
+   }
+   template <typename T>
+   static inline void mark_deleted (T &entry)
+   {
+     entry.m_key = reinterpret_cast<key_type> (1);
+   }
+   template <typename T>
+   static inline void mark_empty (T &entry)
+   {
+     entry.m_key = NULL;
+   }
+   template <typename T>
+   static inline bool is_deleted (const T &entry)
+   {
+     return entry.m_key == reinterpret_cast<key_type> (1);
+   }
+   template <typename T>
+   static inline bool is_empty (const T &entry)
+   {
+     return entry.m_key == NULL;
+   }
+   static const bool empty_zero_p = true;
+ };
+ 
+ /* A class for deduplicating diagnostics and finding (and emitting) the
+    best diagnostic within each partition.  */
+ 
+ class dedupe_winners
+ {
+ public:
+   ~dedupe_winners ()
+   {
+     /* Delete all keys and candidates.  */
+     for (map_t::iterator iter = m_map.begin ();
+ 	 iter != m_map.end ();
+ 	 ++iter)
+       {
+ 	delete (*iter).first;
+ 	delete (*iter).second;
+       }
+   }
+ 
+   /* Determine an exploded_path for SD using SP and, if it's feasible,
+      determine if it's the best seen so far for its dedupe_key.
+      Retain the winner for each dedupe_key, and discard the rest.  */
+ 
+   void add (logger *logger,
+ 	    const shortest_exploded_paths &sp,
+ 	    saved_diagnostic *sd)
+   {
+     /* Build a dedupe_candidate for SD.
+        This uses SP to build an exploded_path.  */
+     dedupe_candidate *dc = new dedupe_candidate (sp, sd);
+ 
+     sd->set_epath_length (dc->length ());
+ 
+     /* Verify that the epath is feasible.
+        State-merging means that not every path in the epath corresponds
+        to a feasible one w.r.t. states.
+        Here we simply check each duplicate saved_diagnostic's
+        shortest_path, and reject any that aren't feasible.
+        This could introduce false negatives, as there could be longer
+        feasible paths within the egraph.  */
+     if (logger)
+       logger->log ("considering %qs at EN: %i, SN: %i",
+ 		   sd->m_d->get_kind (), sd->m_enode->m_index,
+ 		   sd->m_snode->m_index);
+ 
+     feasibility_problem *p = NULL;
+     if (!dc->get_path ().feasible_p (logger, &p))
+       {
+ 	if (logger)
+ 	  logger->log ("rejecting %qs at EN: %i, SN: %i"
+ 		       " due to infeasible path",
+ 		       sd->m_d->get_kind (), sd->m_enode->m_index,
+ 		       sd->m_snode->m_index);
+ 	sd->set_infeasible (p);
+ 	delete dc;
+ 	return;
+       }
+     else
+       if (logger)
+ 	logger->log ("accepting %qs at EN: %i, SN: %i with feasible path",
+ 		     sd->m_d->get_kind (), sd->m_enode->m_index,
+ 		     sd->m_snode->m_index);
+ 
+     sd->set_feasible ();
+ 
+     dedupe_key *key = new dedupe_key (*sd, dc->get_path ());
+     if (dedupe_candidate **slot = m_map.get (key))
+       {
+ 	if (logger)
+ 	  logger->log ("already have this dedupe_key");
+ 
+ 	(*slot)->add_duplicate ();
+ 
+ 	if (dc->length () < (*slot)->length ())
+ 	  {
+ 	    /* We've got a shorter path for the key; replace
+ 	       the current candidate.  */
+ 	    if (logger)
+ 	      logger->log ("length %i is better than existing length %i;"
+ 			   " taking over this dedupe_key",
+ 			   dc->length (), (*slot)->length ());
+ 	    dc->m_num_dupes = (*slot)->get_num_dupes ();
+ 	    delete *slot;
+ 	    *slot = dc;
+ 	  }
+ 	else
+ 	  /* We haven't beaten the current best candidate;
+ 	     drop the new candidate.  */
+ 	  {
+ 	    if (logger)
+ 	      logger->log ("length %i isn't better than existing length %i;"
+ 			   " dropping this candidate",
+ 			   dc->length (), (*slot)->length ());
+ 	    delete dc;
+ 	  }
+ 	delete key;
+       }
+     else
+       {
+ 	/* This is the first candidate for this key.  */
+ 	m_map.put (key, dc);
+ 	if (logger)
+ 	  logger->log ("first candidate for this dedupe_key");
+       }
+   }
+ 
+  /* Emit the simplest diagnostic within each set.  */
+ 
+   void emit_best (diagnostic_manager *dm,
+ 		  const exploded_graph &eg)
+   {
+     LOG_SCOPE (dm->get_logger ());
+ 
+     /* Get keys into a vec for sorting.  */
+     auto_vec<const dedupe_key *> keys (m_map.elements ());
+     for (map_t::iterator iter = m_map.begin ();
+ 	 iter != m_map.end ();
+ 	 ++iter)
+       keys.quick_push ((*iter).first);
+ 
+     dm->log ("# keys after de-duplication: %i", keys.length ());
+ 
+     /* Sort into a good emission order.  */
+     keys.qsort (dedupe_key::comparator);
+ 
+     /* Emit the best candidate for each key.  */
+     int i;
+     const dedupe_key *key;
+     FOR_EACH_VEC_ELT (keys, i, key)
+       {
+ 	dedupe_candidate **slot = m_map.get (key);
+ 	gcc_assert (*slot);
+ 	const dedupe_candidate &dc = **slot;
+ 
+ 	dm->emit_saved_diagnostic (eg, key->m_sd,
+ 				   dc.get_path (), key->m_stmt,
+ 				   dc.get_num_dupes ());
+       }
+   }
+ 
+ private:
+ 
+   /* This maps from each dedupe_key to a current best dedupe_candidate.  */
+ 
+   typedef hash_map<const dedupe_key *, dedupe_candidate *,
+ 		   dedupe_hash_map_traits> map_t;
+   map_t m_map;
+ };
+ 
+ /* Emit all saved diagnostics.  */
+ 
+ void
+ diagnostic_manager::emit_saved_diagnostics (const exploded_graph &eg)
+ {
+   LOG_SCOPE (get_logger ());
+   auto_timevar tv (TV_ANALYZER_DIAGNOSTICS);
+   log ("# saved diagnostics: %i", m_saved_diagnostics.length ());
+   if (get_logger ())
+     {
+       unsigned i;
+       saved_diagnostic *sd;
+       FOR_EACH_VEC_ELT (m_saved_diagnostics, i, sd)
+ 	log ("[%i] sd: %qs at EN: %i, SN: %i",
+ 	     i, sd->m_d->get_kind (), sd->m_enode->m_index,
+ 	     sd->m_snode->m_index);
+     }
+ 
+   if (m_saved_diagnostics.length () == 0)
+     return;
+ 
+   /* Compute the shortest_paths once, sharing it between all diagnostics.  */
+   shortest_exploded_paths sp (eg, eg.get_origin ());
+ 
+   /* Iterate through all saved diagnostics, adding them to a dedupe_winners
+      instance.  This partitions the saved diagnostics by dedupe_key,
+      generating exploded_paths for them, and retaining the best one in each
+      partition.  */
+   dedupe_winners best_candidates;
+ 
+   int i;
+   saved_diagnostic *sd;
+   FOR_EACH_VEC_ELT (m_saved_diagnostics, i, sd)
+     best_candidates.add (get_logger (), sp, sd);
+ 
+   /* For each dedupe-key, call emit_saved_diagnostic on the "best"
+      saved_diagnostic.  */
+   best_candidates.emit_best (this, eg);
+ }
+ 
+ /* Given a saved_diagnostic SD at STMT with feasible path EPATH through EG,
+    create an checker_path of suitable events and use it to call
+    SD's underlying pending_diagnostic "emit" vfunc to emit a diagnostic.  */
+ 
+ void
+ diagnostic_manager::emit_saved_diagnostic (const exploded_graph &eg,
+ 					   const saved_diagnostic &sd,
+ 					   const exploded_path &epath,
+ 					   const gimple *stmt,
+ 					   int num_dupes)
+ {
+   LOG_SCOPE (get_logger ());
+   log ("sd: %qs at SN: %i", sd.m_d->get_kind (), sd.m_snode->m_index);
+   log ("num dupes: %i", num_dupes);
+ 
+   pretty_printer *pp = global_dc->printer->clone ();
+ 
+   /* Precompute all enodes from which the diagnostic is reachable.  */
+   path_builder pb (eg, epath);
+ 
+   /* This is the diagnostic_path subclass that will be built for
+      the diagnostic.  */
+   checker_path emission_path;
+ 
+   /* Populate emission_path with a full description of EPATH.  */
+   build_emission_path (pb, epath, &emission_path);
+ 
+   /* Now prune it to just cover the most pertinent events.  */
+   prune_path (&emission_path, sd.m_sm, sd.m_var, sd.m_state);
+ 
+   /* Add a final event to the path, covering the diagnostic itself.
+      We use the final enode from the epath, which might be different from
+      the sd.m_enode, as the dedupe code doesn't care about enodes, just
+      snodes.  */
+   emission_path.add_final_event (sd.m_sm, epath.get_final_enode (), stmt,
+ 				 sd.m_var, sd.m_state);
+ 
+   /* The "final" event might not be final; if the saved_diagnostic has a
+      trailing eedge stashed, add any events for it.  This is for use
+      in handling longjmp, to show where a longjmp is rewinding to.  */
+   if (sd.m_trailing_eedge)
+     add_events_for_eedge (pb, *sd.m_trailing_eedge, &emission_path);
+ 
+   emission_path.prepare_for_emission (sd.m_d);
+ 
+   gcc_rich_location rich_loc (stmt->location);
+   rich_loc.set_path (&emission_path);
+ 
+   auto_diagnostic_group d;
+   auto_cfun sentinel (sd.m_snode->m_fun);
+   if (sd.m_d->emit (&rich_loc))
+     {
+       if (flag_analyzer_show_duplicate_count && num_dupes > 0)
+ 	inform_n (stmt->location, num_dupes,
+ 		  "%i duplicate", "%i duplicates",
+ 		  num_dupes);
+     }
+   delete pp;
+ }
+ 
+ /* Given a state change to DST_REP, determine a tree that gives the origin
+    of that state at STMT, using DST_STATE's region model, so that state
+    changes based on assignments can be tracked back to their origins.
+ 
+    For example, if we have
+ 
+      (S1) _1 = malloc (64);
+      (S2) EXPR = _1;
+ 
+    then at stmt S2 we can get the origin of EXPR's state as being _1,
+    and thus track the allocation back to S1.  */
+ 
+ static tree
+ get_any_origin (const gimple *stmt,
+ 		tree dst_rep,
+ 		const program_state &dst_state)
+ {
+   if (!stmt)
+     return NULL_TREE;
+ 
+   gcc_assert (dst_rep);
+ 
+   if (const gassign *assign = dyn_cast <const gassign *> (stmt))
+     {
+       tree lhs = gimple_assign_lhs (assign);
+       /* Use region IDs to compare lhs with DST_REP, bulletproofing against
+ 	 cases where they can't have lvalues by using
+ 	 tentative_region_model_context.  */
+       tentative_region_model_context ctxt;
+       region_id lhs_rid = dst_state.m_region_model->get_lvalue (lhs, &ctxt);
+       region_id dst_rep_rid
+ 	= dst_state.m_region_model->get_lvalue (dst_rep, &ctxt);
+       if (lhs_rid == dst_rep_rid && !ctxt.had_errors_p ())
+ 	{
+ 	  tree rhs1 = gimple_assign_rhs1 (assign);
+ 	  enum tree_code op = gimple_assign_rhs_code (assign);
+ 	  switch (op)
+ 	    {
+ 	    default:
+ 	      //gcc_unreachable ();  // TODO
+ 	      break;
+ 	    case COMPONENT_REF:
+ 	    case SSA_NAME:
+ 	      return rhs1;
+ 	    }
+ 	}
+     }
+   return NULL_TREE;
+ }
+ 
+ /* Emit a "path" of events to EMISSION_PATH describing the exploded path
+    EPATH within EG.  */
+ 
+ void
+ diagnostic_manager::build_emission_path (const path_builder &pb,
+ 					 const exploded_path &epath,
+ 					 checker_path *emission_path) const
+ {
+   LOG_SCOPE (get_logger ());
+   for (unsigned i = 0; i < epath.m_edges.length (); i++)
+     {
+       const exploded_edge *eedge = epath.m_edges[i];
+       add_events_for_eedge (pb, *eedge, emission_path);
+     }
+ }
+ 
+ /* Subclass of state_change_visitor that creates state_change_event
+    instances.  */
+ 
+ class state_change_event_creator : public state_change_visitor
+ {
+ public:
+   state_change_event_creator (const exploded_edge &eedge,
+ 			      checker_path *emission_path)
+     : m_eedge (eedge),
+       m_emission_path (emission_path)
+   {}
+ 
+   bool on_global_state_change (const state_machine &sm,
+ 			       state_machine::state_t src_sm_val,
+ 			       state_machine::state_t dst_sm_val)
+     FINAL OVERRIDE
+   {
+     const exploded_node *src_node = m_eedge.m_src;
+     const program_point &src_point = src_node->get_point ();
+     const int src_stack_depth = src_point.get_stack_depth ();
+     const exploded_node *dst_node = m_eedge.m_dest;
+     const gimple *stmt = src_point.get_stmt ();
+     const supernode *supernode = src_point.get_supernode ();
+     const program_state &dst_state = dst_node->get_state ();
+ 
+     int stack_depth = src_stack_depth;
+ 
+     m_emission_path->add_event (new state_change_event (supernode,
+ 							stmt,
+ 							stack_depth,
+ 							sm,
+ 							NULL_TREE,
+ 							src_sm_val,
+ 							dst_sm_val,
+ 							NULL_TREE,
+ 							dst_state));
+     return false;
+   }
+ 
+   bool on_state_change (const state_machine &sm,
+ 			state_machine::state_t src_sm_val,
+ 			state_machine::state_t dst_sm_val,
+ 			tree dst_rep,
+ 			svalue_id dst_origin_sid) FINAL OVERRIDE
+   {
+     const exploded_node *src_node = m_eedge.m_src;
+     const program_point &src_point = src_node->get_point ();
+     const int src_stack_depth = src_point.get_stack_depth ();
+     const exploded_node *dst_node = m_eedge.m_dest;
+     const gimple *stmt = src_point.get_stmt ();
+     const supernode *supernode = src_point.get_supernode ();
+     const program_state &dst_state = dst_node->get_state ();
+ 
+     int stack_depth = src_stack_depth;
+ 
+     if (m_eedge.m_sedge
+ 	&& m_eedge.m_sedge->m_kind == SUPEREDGE_CFG_EDGE)
+       {
+ 	supernode = src_point.get_supernode ();
+ 	stmt = supernode->get_last_stmt ();
+ 	stack_depth = src_stack_depth;
+       }
+ 
+     /* Bulletproofing for state changes at calls/returns;
+        TODO: is there a better way? */
+     if (!stmt)
+       return false;
+ 
+     tree origin_rep
+       = dst_state.get_representative_tree (dst_origin_sid);
+ 
+     if (origin_rep == NULL_TREE)
+       origin_rep = get_any_origin (stmt, dst_rep, dst_state);
+     m_emission_path->add_event (new state_change_event (supernode,
+ 							stmt,
+ 							stack_depth,
+ 							sm,
+ 							dst_rep,
+ 							src_sm_val,
+ 							dst_sm_val,
+ 							origin_rep,
+ 							dst_state));
+     return false;
+   }
+ 
+   const exploded_edge &m_eedge;
+   checker_path *m_emission_path;
+ };
+ 
+ /* Compare SRC_STATE and DST_STATE (which use EXT_STATE), and call
+    VISITOR's on_state_change for every sm-state change that occurs
+    to a tree, and on_global_state_change for every global state change
+    that occurs.
+ 
+    This determines the state changes that ought to be reported to
+    the user: a combination of the effects of changes to sm_state_map
+    (which maps svalues to sm-states), and of region_model changes
+    (which map trees to svalues).
+ 
+    Bail out early and return true if any call to on_global_state_change
+    or on_state_change returns true, otherwise return false.
+ 
+    This is split out to make it easier to experiment with changes to
+    exploded_node granularity (so that we can observe what state changes
+    lead to state_change_events being emitted).  */
+ 
+ bool
+ for_each_state_change (const program_state &src_state,
+ 		       const program_state &dst_state,
+ 		       const extrinsic_state &ext_state,
+ 		       state_change_visitor *visitor)
+ {
+   gcc_assert (src_state.m_checker_states.length ()
+ 	      == ext_state.get_num_checkers ());
+   gcc_assert (dst_state.m_checker_states.length ()
+ 	      == ext_state.get_num_checkers ());
+   for (unsigned i = 0; i < ext_state.get_num_checkers (); i++)
+     {
+       const state_machine &sm = ext_state.get_sm (i);
+       const sm_state_map &src_smap = *src_state.m_checker_states[i];
+       const sm_state_map &dst_smap = *dst_state.m_checker_states[i];
+ 
+       /* Add events for any global state changes.  */
+       if (src_smap.get_global_state () != dst_smap.get_global_state ())
+ 	if (visitor->on_global_state_change (sm,
+ 					     src_smap.get_global_state (),
+ 					     dst_smap.get_global_state ()))
+ 	  return true;
+ 
+       /* Add events for per-svalue state changes.  */
+       for (sm_state_map::iterator_t iter = dst_smap.begin ();
+ 	   iter != dst_smap.end ();
+ 	   ++iter)
+ 	{
+ 	  /* Ideally we'd directly compare the SM state between src state
+ 	     and dst state, but there's no guarantee that the IDs can
+ 	     be meaningfully compared.  */
+ 	  svalue_id dst_sid = (*iter).first;
+ 	  state_machine::state_t dst_sm_val = (*iter).second.m_state;
+ 
+ 	  auto_vec<path_var> dst_pvs;
+ 	  dst_state.m_region_model->get_path_vars_for_svalue (dst_sid,
+ 							      &dst_pvs);
+ 
+ 	  unsigned j;
+ 	  path_var *dst_pv;
+ 	  FOR_EACH_VEC_ELT (dst_pvs, j, dst_pv)
+ 	    {
+ 	      tree dst_rep = dst_pv->m_tree;
+ 	      gcc_assert (dst_rep);
+ 	      if (dst_pv->m_stack_depth
+ 		  >= src_state.m_region_model->get_stack_depth ())
+ 		continue;
+ 	      tentative_region_model_context ctxt;
+ 	      svalue_id src_sid
+ 		= src_state.m_region_model->get_rvalue (*dst_pv, &ctxt);
+ 	      if (src_sid.null_p () || ctxt.had_errors_p ())
+ 		continue;
+ 	      state_machine::state_t src_sm_val = src_smap.get_state (src_sid);
+ 	      if (dst_sm_val != src_sm_val)
+ 		{
+ 		  svalue_id dst_origin_sid = (*iter).second.m_origin;
+ 		  if (visitor->on_state_change (sm, src_sm_val, dst_sm_val,
+ 						dst_rep, dst_origin_sid))
+ 		    return true;
+ 		}
+ 	    }
+ 	}
+     }
+   return false;
+ }
+ 
+ /* Subroutine of diagnostic_manager::build_emission_path.
+    Add any events for EEDGE to EMISSION_PATH.  */
+ 
+ void
+ diagnostic_manager::add_events_for_eedge (const path_builder &pb,
+ 					  const exploded_edge &eedge,
+ 					  checker_path *emission_path) const
+ {
+   const exploded_node *src_node = eedge.m_src;
+   const program_point &src_point = src_node->get_point ();
+   const exploded_node *dst_node = eedge.m_dest;
+   const program_point &dst_point = dst_node->get_point ();
+   const int dst_stack_depth = dst_point.get_stack_depth ();
+   if (get_logger ())
+     {
+       get_logger ()->start_log_line ();
+       pretty_printer *pp = get_logger ()->get_printer ();
+       pp_printf (pp, "EN %i -> EN %i: ",
+ 		 eedge.m_src->m_index,
+ 		 eedge.m_dest->m_index);
+       src_point.print (pp, format (false));
+       pp_string (pp, "-> ");
+       dst_point.print (pp, format (false));
+       get_logger ()->end_log_line ();
+     }
+   const program_state &src_state = src_node->get_state ();
+   const program_state &dst_state = dst_node->get_state ();
+ 
+   /* Add state change events for the states that have changed.
+      We add these before events for superedges, so that if we have a
+      state_change_event due to following an edge, we'll get this sequence
+      of events:
+ 
+       | if (!ptr)
+       |    ~
+       |    |
+       |    (1) assuming 'ptr' is non-NULL  (state_change_event)
+       |    (2) following 'false' branch... (start_cfg_edge_event)
+      ...
+       | do_something (ptr);
+       | ~~~~~~~~~~~~~^~~~~
+       |              |
+       |              (3) ...to here        (end_cfg_edge_event).  */
+   state_change_event_creator visitor (eedge, emission_path);
+   for_each_state_change (src_state, dst_state, pb.get_ext_state (),
+ 			 &visitor);
+ 
+   /* Allow non-standard edges to add events, e.g. when rewinding from
+      longjmp to a setjmp.  */
+   if (eedge.m_custom_info)
+     eedge.m_custom_info->add_events_to_path (emission_path, eedge);
+ 
+   /* Add events for superedges, function entries, and for statements.  */
+   switch (dst_point.get_kind ())
+     {
+     default:
+       break;
+     case PK_BEFORE_SUPERNODE:
+       if (src_point.get_kind () == PK_AFTER_SUPERNODE)
+ 	{
+ 	  if (eedge.m_sedge)
+ 	    add_events_for_superedge (pb, eedge, emission_path);
+ 	}
+       /* Add function entry events.  */
+       if (dst_point.get_supernode ()->entry_p ())
+ 	{
+ 	  emission_path->add_event
+ 	    (new function_entry_event
+ 	     (dst_point.get_supernode ()->get_start_location (),
+ 	      dst_point.get_fndecl (),
+ 	      dst_stack_depth));
+ 	}
+       break;
+     case PK_BEFORE_STMT:
+       {
+ 	const gimple *stmt = dst_point.get_stmt ();
+ 	const gcall *call = dyn_cast <const gcall *> (stmt);
+ 	if (call && is_setjmp_call_p (call))
+ 	  emission_path->add_event
+ 	    (new setjmp_event (stmt->location,
+ 			       dst_node,
+ 			       dst_point.get_fndecl (),
+ 			       dst_stack_depth,
+ 			       call));
+ 	else
+ 	  emission_path->add_event
+ 	    (new statement_event (stmt,
+ 				  dst_point.get_fndecl (),
+ 				  dst_stack_depth, dst_state));
+       }
+       break;
+     }
+ }
+ 
+ /* Return true if EEDGE is a significant edge in the path to the diagnostic
+    for PB.
+ 
+    Consider all of the sibling out-eedges from the same source enode
+    as EEDGE.
+    If there's no path from the destinations of those eedges to the
+    diagnostic enode, then we have to take this eedge and thus it's
+    significant.
+ 
+    Conversely if there is a path from the destination of any other sibling
+    eedge to the diagnostic enode, then this edge is insignificant.
+ 
+    Example 1: redundant if-else:
+ 
+      (A) if (...)            A
+      (B)   ...              / \
+          else              B   C
+      (C)   ...              \ /
+      (D) [DIAGNOSTIC]        D
+ 
+      D is reachable by either B or C, so neither of these edges
+      are significant.
+ 
+    Example 2: pertinent if-else:
+ 
+      (A) if (...)                         A
+      (B)   ...                           / \
+          else                           B   C
+      (C)   [NECESSARY CONDITION]        |   |
+      (D) [POSSIBLE DIAGNOSTIC]          D1  D2
+ 
+      D becomes D1 and D2 in the exploded graph, where the diagnostic occurs
+      at D2.  D2 is only reachable via C, so the A -> C edge is significant.
+ 
+    Example 3: redundant loop:
+ 
+      (A) while (...)          +-->A
+      (B)   ...                |  / \
+      (C) ...                  +-B  C
+      (D) [DIAGNOSTIC]              |
+                                    D
+ 
+      D is reachable from both B and C, so the A->C edge is not significant.  */
+ 
+ bool
+ diagnostic_manager::significant_edge_p (const path_builder &pb,
+ 					const exploded_edge &eedge) const
+ {
+   int i;
+   exploded_edge *sibling;
+   FOR_EACH_VEC_ELT (eedge.m_src->m_succs, i, sibling)
+     {
+       if (sibling == &eedge)
+ 	continue;
+       if (pb.reachable_from_p (sibling->m_dest))
+ 	{
+ 	  if (get_logger ())
+ 	    get_logger ()->log ("  edge EN: %i -> EN: %i is insignificant as"
+ 				" EN: %i is also reachable via"
+ 				" EN: %i -> EN: %i",
+ 				eedge.m_src->m_index, eedge.m_dest->m_index,
+ 				pb.get_diag_node ()->m_index,
+ 				sibling->m_src->m_index,
+ 				sibling->m_dest->m_index);
+ 	  return false;
+ 	}
+     }
+ 
+   return true;
+ }
+ 
+ /* Subroutine of diagnostic_manager::add_events_for_eedge
+    where EEDGE has an underlying superedge i.e. a CFG edge,
+    or an interprocedural call/return.
+    Add any events for the superedge to EMISSION_PATH.  */
+ 
+ void
+ diagnostic_manager::add_events_for_superedge (const path_builder &pb,
+ 					      const exploded_edge &eedge,
+ 					      checker_path *emission_path)
+   const
+ {
+   gcc_assert (eedge.m_sedge);
+ 
+   /* Don't add events for insignificant edges at verbosity levels below 3.  */
+   if (m_verbosity < 3)
+     if (!significant_edge_p (pb, eedge))
+       return;
+ 
+   const exploded_node *src_node = eedge.m_src;
+   const program_point &src_point = src_node->get_point ();
+   const exploded_node *dst_node = eedge.m_dest;
+   const program_point &dst_point = dst_node->get_point ();
+   const int src_stack_depth = src_point.get_stack_depth ();
+   const int dst_stack_depth = dst_point.get_stack_depth ();
+   const gimple *last_stmt = src_point.get_supernode ()->get_last_stmt ();
+ 
+   switch (eedge.m_sedge->m_kind)
+     {
+     case SUPEREDGE_CFG_EDGE:
+       {
+ 	emission_path->add_event
+ 	  (new start_cfg_edge_event (eedge,
+ 			       (last_stmt
+ 				? last_stmt->location
+ 				: UNKNOWN_LOCATION),
+ 			       src_point.get_fndecl (),
+ 			       src_stack_depth));
+ 	emission_path->add_event
+ 	  (new end_cfg_edge_event (eedge,
+ 				   dst_point.get_supernode ()->get_start_location (),
+ 				   dst_point.get_fndecl (),
+ 				   dst_stack_depth));
+       }
+       break;
+ 
+     case SUPEREDGE_CALL:
+       {
+ 	emission_path->add_event
+ 	  (new call_event (eedge,
+ 			   (last_stmt
+ 			    ? last_stmt->location
+ 			    : UNKNOWN_LOCATION),
+ 			   src_point.get_fndecl (),
+ 			   src_stack_depth));
+       }
+       break;
+ 
+     case SUPEREDGE_INTRAPROCEDURAL_CALL:
+       {
+ 	/* TODO: add a subclass for this, or generate events for the
+ 	   summary.  */
+ 	emission_path->add_event
+ 	  (new debug_event ((last_stmt
+ 			     ? last_stmt->location
+ 			     : UNKNOWN_LOCATION),
+ 			    src_point.get_fndecl (),
+ 			    src_stack_depth,
+ 			    "call summary"));
+       }
+       break;
+ 
+     case SUPEREDGE_RETURN:
+       {
+ 	const return_superedge *return_edge
+ 	  = as_a <const return_superedge *> (eedge.m_sedge);
+ 
+ 	const gcall *call_stmt = return_edge->get_call_stmt ();
+ 	emission_path->add_event
+ 	  (new return_event (eedge,
+ 			     (call_stmt
+ 			      ? call_stmt->location
+ 			      : UNKNOWN_LOCATION),
+ 			     dst_point.get_fndecl (),
+ 			     dst_stack_depth));
+       }
+       break;
+     }
+ }
+ 
+ /* Prune PATH, based on the verbosity level, to the most pertinent
+    events for a diagnostic that involves VAR ending in state STATE
+    (for state machine SM).
+ 
+    PATH is updated in place, and the redundant checker_events are deleted.
+ 
+    As well as deleting events, call record_critical_state on events in
+    which state critical to the pending_diagnostic is being handled; see
+    the comment for diagnostic_manager::prune_for_sm_diagnostic.  */
+ 
+ void
+ diagnostic_manager::prune_path (checker_path *path,
+ 				const state_machine *sm,
+ 				tree var,
+ 				state_machine::state_t state) const
+ {
+   LOG_FUNC (get_logger ());
+   path->maybe_log (get_logger (), "path");
+   prune_for_sm_diagnostic (path, sm, var, state);
+   prune_interproc_events (path);
+   finish_pruning (path);
+   path->maybe_log (get_logger (), "pruned");
+ }
+ 
+ /* A cheap test to determine if EXPR can be the expression of interest in
+    an sm-diagnostic, so that we can reject cases where we have a non-lvalue.
+    We don't have always have a model when calling this, so we can't use
+    tentative_region_model_context, so there can be false positives.  */
+ 
+ static bool
+ can_be_expr_of_interest_p (tree expr)
+ {
+   if (!expr)
+     return false;
+ 
+   /* Reject constants.  */
+   if (CONSTANT_CLASS_P (expr))
+     return false;
+ 
+   /* Otherwise assume that it can be an lvalue.  */
+   return true;
+ }
+ 
+ /* First pass of diagnostic_manager::prune_path: apply verbosity level,
+    pruning unrelated state change events.
+ 
+    Iterate backwards through PATH, skipping state change events that aren't
+    VAR but update the pertinent VAR when state-copying occurs.
+ 
+    As well as deleting events, call record_critical_state on events in
+    which state critical to the pending_diagnostic is being handled, so
+    that the event's get_desc vfunc can potentially supply a more precise
+    description of the event to the user.
+    e.g. improving
+      "calling 'foo' from 'bar'"
+    to
+      "passing possibly-NULL pointer 'ptr' to 'foo' from 'bar' as param 1"
+    when the diagnostic relates to later dereferencing 'ptr'.  */
+ 
+ void
+ diagnostic_manager::prune_for_sm_diagnostic (checker_path *path,
+ 					     const state_machine *sm,
+ 					     tree var,
+ 					     state_machine::state_t state) const
+ {
+   update_for_unsuitable_sm_exprs (&var);
+ 
+   int idx = path->num_events () - 1;
+   while (idx >= 0 && idx < (signed)path->num_events ())
+     {
+       checker_event *base_event = path->get_checker_event (idx);
+       if (get_logger ())
+ 	{
+ 	  if (sm)
+ 	    {
+ 	      if (var)
+ 		log ("considering event %i, with var: %qE, state: %qs",
+ 		     idx, var, sm->get_state_name (state));
+ 	      else
+ 		log ("considering event %i, with global state: %qs",
+ 		     idx, sm->get_state_name (state));
+ 	    }
+ 	  else
+ 	    log ("considering event %i", idx);
+ 	}
+       gcc_assert (var == NULL || can_be_expr_of_interest_p (var));
+       switch (base_event->m_kind)
+ 	{
+ 	default:
+ 	  gcc_unreachable ();
+ 
+ 	case EK_DEBUG:
+ 	  if (m_verbosity < 4)
+ 	    {
+ 	      log ("filtering event %i: debug event", idx);
+ 	      path->delete_event (idx);
+ 	    }
+ 	  break;
+ 
+ 	case EK_CUSTOM:
+ 	  /* Don't filter custom events.  */
+ 	  break;
+ 
+ 	case EK_STMT:
+ 	  {
+ 	    /* If this stmt is the origin of "var", update var.  */
+ 	    if (var)
+ 	      {
+ 		statement_event *stmt_event = (statement_event *)base_event;
+ 		tree new_var = get_any_origin (stmt_event->m_stmt, var,
+ 					       stmt_event->m_dst_state);
+ 		if (new_var)
+ 		  {
+ 		    log ("event %i: switching var of interest from %qE to %qE",
+ 			 idx, var, new_var);
+ 		    var = new_var;
+ 		  }
+ 	      }
+ 	    if (m_verbosity < 4)
+ 	      {
+ 		log ("filtering event %i: statement event", idx);
+ 		path->delete_event (idx);
+ 	      }
+ 	  }
+ 	  break;
+ 
+ 	case EK_FUNCTION_ENTRY:
+ 	  if (m_verbosity < 1)
+ 	    {
+ 	      log ("filtering event %i: function entry", idx);
+ 	      path->delete_event (idx);
+ 	    }
+ 	  break;
+ 
+ 	case EK_STATE_CHANGE:
+ 	  {
+ 	    state_change_event *state_change = (state_change_event *)base_event;
+ 	    /* Use region IDs to compare var with the state_change's m_var,
+ 	       bulletproofing against cases where they can't have lvalues by
+ 	       using tentative_region_model_context.  */
+ 	    tentative_region_model_context ctxt;
+ 	    region_id state_var_rid
+ 	      = state_change->get_lvalue (state_change->m_var, &ctxt);
+ 	    region_id var_rid = state_change->get_lvalue (var, &ctxt);
+ 	    if (state_var_rid == var_rid && !ctxt.had_errors_p ())
+ 	      {
+ 		if (state_change->m_origin)
+ 		  {
+ 		    log ("event %i: switching var of interest from %qE to %qE",
+ 			 idx, var, state_change->m_origin);
+ 		    var = state_change->m_origin;
+ 		    update_for_unsuitable_sm_exprs (&var);
+ 		  }
+ 		log ("event %i: switching state of interest from %qs to %qs",
+ 		     idx, sm->get_state_name (state_change->m_to),
+ 		     sm->get_state_name (state_change->m_from));
+ 		state = state_change->m_from;
+ 	      }
+ 	    else if (m_verbosity < 4)
+ 	      {
+ 		if (var)
+ 		  log ("filtering event %i:"
+ 		       " state change to %qE unrelated to %qE",
+ 		       idx, state_change->m_var, var);
+ 		else
+ 		  log ("filtering event %i: state change to %qE",
+ 		       idx, state_change->m_var);
+ 		if (ctxt.had_errors_p ())
+ 		  log ("context had errors");
+ 		path->delete_event (idx);
+ 	      }
+ 	  }
+ 	  break;
+ 
+ 	case EK_START_CFG_EDGE:
+ 	  {
+ 	    cfg_edge_event *event = (cfg_edge_event *)base_event;
+ 	    const cfg_superedge& cfg_superedge
+ 	      = event->get_cfg_superedge ();
+ 	    const supernode *dest = event->m_sedge->m_dest;
+ 	    /* Do we have an SSA_NAME defined via a phi node in
+ 	       the dest CFG node?  */
+ 	    if (var && TREE_CODE (var) == SSA_NAME)
+ 	      if (SSA_NAME_DEF_STMT (var)->bb == dest->m_bb)
+ 		{
+ 		  if (gphi *phi
+ 		      = dyn_cast <gphi *> (SSA_NAME_DEF_STMT (var)))
+ 		    {
+ 		      /* Update var based on its phi node.  */
+ 		      tree old_var = var;
+ 		      var = cfg_superedge.get_phi_arg (phi);
+ 		      log ("updating from %qE to %qE based on phi node",
+ 			   old_var, var);
+ 		      if (get_logger ())
+ 			{
+ 			  pretty_printer pp;
+ 			  pp_gimple_stmt_1 (&pp, phi, 0, (dump_flags_t)0);
+ 			  log ("  phi: %s", pp_formatted_text (&pp));
+ 			}
+ 		      /* If we've chosen a bad exploded_path, then the
+ 			 phi arg might be a constant.  Fail gracefully for
+ 			 this case.  */
+ 		      update_for_unsuitable_sm_exprs (&var);
+ 		    }
+ 		}
+ 
+ 	    /* TODO: is this edge significant to var?
+ 	       See if var can be in other states in the dest, but not
+ 	       in other states in the src?
+ 	       Must have multiple sibling edges.  */
+ 
+ 	    if (event->should_filter_p (m_verbosity))
+ 	      {
+ 		log ("filtering event %i: CFG edge", idx);
+ 		path->delete_event (idx);
+ 		/* Also delete the corresponding EK_END_CFG_EDGE.  */
+ 		gcc_assert (path->get_checker_event (idx)->m_kind
+ 			    == EK_END_CFG_EDGE);
+ 		path->delete_event (idx);
+ 	      }
+ 	  }
+ 	  break;
+ 
+ 	case EK_END_CFG_EDGE:
+ 	  /* These come in pairs with EK_START_CFG_EDGE events and are
+ 	     filtered when their start event is filtered.  */
+ 	  break;
+ 
+ 	case EK_CALL_EDGE:
+ 	  {
+ 	    call_event *event = (call_event *)base_event;
+ 	    const callgraph_superedge& cg_superedge
+ 	      = event->get_callgraph_superedge ();
+ 	    callsite_expr expr;
+ 	    tree caller_var
+ 	      = cg_superedge.map_expr_from_callee_to_caller (var, &expr);
+ 	    if (caller_var)
+ 	      {
+ 		log ("event %i:"
+ 		     " switching var of interest"
+ 		     " from %qE in callee to %qE in caller",
+ 		     idx, var, caller_var);
+ 		var = caller_var;
+ 		if (expr.param_p ())
+ 		  event->record_critical_state (var, state);
+ 		update_for_unsuitable_sm_exprs (&var);
+ 	      }
+ 	  }
+ 	  break;
+ 
+ 	case EK_RETURN_EDGE:
+ 	  // TODO: potentially update var/state based on return value,
+ 	  // args etc
+ 	  {
+ 	    if (var)
+ 	      {
+ 		return_event *event = (return_event *)base_event;
+ 		const callgraph_superedge& cg_superedge
+ 		  = event->get_callgraph_superedge ();
+ 		callsite_expr expr;
+ 		tree callee_var
+ 		  = cg_superedge.map_expr_from_caller_to_callee (var, &expr);
+ 		if (callee_var)
+ 		  {
+ 		    log ("event %i:"
+ 			 " switching var of interest"
+ 			 " from %qE in caller to %qE in callee",
+ 			 idx, var, callee_var);
+ 		    var = callee_var;
+ 		    if (expr.return_value_p ())
+ 		      event->record_critical_state (var, state);
+ 		    update_for_unsuitable_sm_exprs (&var);
+ 		  }
+ 	      }
+ 	  }
+ 	  break;
+ 
+ 	case EK_SETJMP:
+ 	  /* TODO: only show setjmp_events that matter i.e. those for which
+ 	     there is a later rewind event using them.  */
+ 	case EK_REWIND_FROM_LONGJMP:
+ 	case EK_REWIND_TO_SETJMP:
+ 	  break;
+ 
+ 	case EK_WARNING:
+ 	  /* Always show the final "warning" event in the path.  */
+ 	  break;
+ 	}
+       idx--;
+     }
+ }
+ 
+ /* Subroutine of diagnostic_manager::prune_for_sm_diagnostic.
+    If *EXPR is not suitable to be the expression of interest in
+    an sm-diagnostic, set *EXPR to NULL and log.  */
+ 
+ void
+ diagnostic_manager::update_for_unsuitable_sm_exprs (tree *expr) const
+ {
+   gcc_assert (expr);
+   if (*expr && !can_be_expr_of_interest_p (*expr))
+     {
+       log ("new var %qE is unsuitable; setting var to NULL", *expr);
+       *expr = NULL_TREE;
+     }
+ }
+ 
+ /* Second pass of diagnostic_manager::prune_path: remove redundant
+    interprocedural information.
+ 
+    For example, given:
+      (1)- calling "f2" from "f1"
+      (2)--- entry to "f2"
+      (3)--- calling "f3" from "f2"
+      (4)----- entry to "f3"
+      (5)--- returning to "f2" to "f3"
+      (6)- returning to "f1" to "f2"
+    with no other intervening events, then none of these events are
+    likely to be interesting to the user.
+ 
+    Prune [..., call, function-entry, return, ...] triples repeatedly
+    until nothing has changed.  For the example above, this would
+    remove events (3, 4, 5), and then remove events (1, 2, 6).  */
+ 
+ void
+ diagnostic_manager::prune_interproc_events (checker_path *path) const
+ {
+   bool changed = false;
+   do
+     {
+       changed = false;
+       int idx = path->num_events () - 1;
+       while (idx >= 0)
+ 	{
+ 	  /* Prune [..., call, function-entry, return, ...] triples.  */
+ 	  if (idx + 2 < (signed)path->num_events ()
+ 	      && path->get_checker_event (idx)->is_call_p ()
+ 	      && path->get_checker_event (idx + 1)->is_function_entry_p ()
+ 	      && path->get_checker_event (idx + 2)->is_return_p ())
+ 	    {
+ 	      if (get_logger ())
+ 		{
+ 		  label_text desc
+ 		    (path->get_checker_event (idx)->get_desc (false));
+ 		  log ("filtering events %i-%i:"
+ 		       " irrelevant call/entry/return: %s",
+ 		       idx, idx + 2, desc.m_buffer);
+ 		  desc.maybe_free ();
+ 		}
+ 	      path->delete_event (idx + 2);
+ 	      path->delete_event (idx + 1);
+ 	      path->delete_event (idx);
+ 	      changed = true;
+ 	      idx--;
+ 	      continue;
+ 	    }
+ 
+ 	  /* Prune [..., call, return, ...] pairs
+ 	     (for -fanalyzer-verbosity=0).  */
+ 	  if (idx + 1 < (signed)path->num_events ()
+ 	      && path->get_checker_event (idx)->is_call_p ()
+ 	      && path->get_checker_event (idx + 1)->is_return_p ())
+ 	    {
+ 	      if (get_logger ())
+ 		{
+ 		  label_text desc
+ 		    (path->get_checker_event (idx)->get_desc (false));
+ 		  log ("filtering events %i-%i:"
+ 		       " irrelevant call/return: %s",
+ 		       idx, idx + 1, desc.m_buffer);
+ 		  desc.maybe_free ();
+ 		}
+ 	      path->delete_event (idx + 1);
+ 	      path->delete_event (idx);
+ 	      changed = true;
+ 	      idx--;
+ 	      continue;
+ 	    }
+ 
+ 	  idx--;
+ 	}
+ 
+     }
+   while (changed);
+ }
+ 
+ /* Final pass of diagnostic_manager::prune_path.
+ 
+    If all we're left with is in one function, then filter function entry
+    events.  */
+ 
+ void
+ diagnostic_manager::finish_pruning (checker_path *path) const
+ {
+   if (!path->interprocedural_p ())
+     {
+       int idx = path->num_events () - 1;
+       while (idx >= 0 && idx < (signed)path->num_events ())
+ 	{
+ 	  checker_event *base_event = path->get_checker_event (idx);
+ 	  if (base_event->m_kind == EK_FUNCTION_ENTRY)
+ 	    {
+ 	      log ("filtering event %i:"
+ 		   " function entry for purely intraprocedural path", idx);
+ 	      path->delete_event (idx);
+ 	    }
+ 	  idx--;
+ 	}
+     }
+ }
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/diagnostic-manager.h gcc-10.1.0/gcc/analyzer/diagnostic-manager.h
*** gcc-9.3.0/gcc/analyzer/diagnostic-manager.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/diagnostic-manager.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,171 ----
+ /* Classes for saving, deduplicating, and emitting analyzer diagnostics.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_DIAGNOSTIC_MANAGER_H
+ #define GCC_ANALYZER_DIAGNOSTIC_MANAGER_H
+ 
+ namespace ana {
+ 
+ /* A to-be-emitted diagnostic stored within diagnostic_manager.  */
+ 
+ class saved_diagnostic
+ {
+ public:
+   enum status
+   {
+    STATUS_NEW,
+    STATUS_INFEASIBLE_PATH,
+    STATUS_FEASIBLE_PATH
+   };
+ 
+   saved_diagnostic (const state_machine *sm,
+ 		    const exploded_node *enode,
+ 		    const supernode *snode, const gimple *stmt,
+ 		    stmt_finder *stmt_finder,
+ 		    tree var, state_machine::state_t state,
+ 		    pending_diagnostic *d);
+   ~saved_diagnostic ();
+ 
+   bool operator== (const saved_diagnostic &other) const;
+ 
+   void set_feasible ()
+   {
+     gcc_assert (m_status == STATUS_NEW);
+     m_status = STATUS_FEASIBLE_PATH;
+   }
+   void set_infeasible (feasibility_problem *p)
+   {
+     gcc_assert (m_status == STATUS_NEW);
+     m_status = STATUS_INFEASIBLE_PATH;
+     m_problem = p; // take ownership
+   }
+   const feasibility_problem *get_feasibility_problem () const
+   {
+     return m_problem;
+   }
+ 
+   enum status get_status () const { return m_status; }
+ 
+   void set_epath_length (unsigned length) { m_epath_length = length; }
+   unsigned get_epath_length () const { return m_epath_length; }
+ 
+   //private:
+   const state_machine *m_sm;
+   const exploded_node *m_enode;
+   const supernode *m_snode;
+   const gimple *m_stmt;
+   stmt_finder *m_stmt_finder;
+   tree m_var;
+   state_machine::state_t m_state;
+   pending_diagnostic *m_d;
+   exploded_edge *m_trailing_eedge;
+ 
+ private:
+   DISABLE_COPY_AND_ASSIGN (saved_diagnostic);
+ 
+   enum status m_status;
+   unsigned m_epath_length;
+   feasibility_problem *m_problem;
+ };
+ 
+ class path_builder;
+ 
+ /* A class with responsibility for saving pending diagnostics, so that
+    they can be emitted after the exploded_graph is complete.
+    This lets us de-duplicate diagnostics, and find the shortest path
+    for each similar diagnostic, potentially using edges that might
+    not have been found when each diagnostic was first saved.
+ 
+    This also lets us compute shortest_paths once, rather than
+    per-diagnostic.  */
+ 
+ class diagnostic_manager : public log_user
+ {
+ public:
+   diagnostic_manager (logger *logger, int verbosity);
+ 
+   void add_diagnostic (const state_machine *sm,
+ 		       const exploded_node *enode,
+ 		       const supernode *snode, const gimple *stmt,
+ 		       stmt_finder *finder,
+ 		       tree var, state_machine::state_t state,
+ 		       pending_diagnostic *d);
+ 
+   void add_diagnostic (const exploded_node *enode,
+ 		       const supernode *snode, const gimple *stmt,
+ 		       stmt_finder *finder,
+ 		       pending_diagnostic *d);
+ 
+   void emit_saved_diagnostics (const exploded_graph &eg);
+ 
+   void emit_saved_diagnostic (const exploded_graph &eg,
+ 			      const saved_diagnostic &sd,
+ 			      const exploded_path &epath,
+ 			      const gimple *stmt,
+ 			      int num_dupes);
+ 
+   unsigned get_num_diagnostics () const
+   {
+     return m_saved_diagnostics.length ();
+   }
+   saved_diagnostic *get_saved_diagnostic (unsigned idx)
+   {
+     return m_saved_diagnostics[idx];
+   }
+   const saved_diagnostic *get_saved_diagnostic (unsigned idx) const
+   {
+     return m_saved_diagnostics[idx];
+   }
+ 
+ private:
+   void build_emission_path (const path_builder &pb,
+ 			    const exploded_path &epath,
+ 			    checker_path *emission_path) const;
+ 
+   void add_events_for_eedge (const path_builder &pb,
+ 			     const exploded_edge &eedge,
+ 			     checker_path *emission_path) const;
+ 
+   bool significant_edge_p (const path_builder &pb,
+ 			   const exploded_edge &eedge) const;
+ 
+   void add_events_for_superedge (const path_builder &pb,
+ 				 const exploded_edge &eedge,
+ 				 checker_path *emission_path) const;
+ 
+   void prune_path (checker_path *path,
+ 		   const state_machine *sm,
+ 		   tree var, state_machine::state_t state) const;
+ 
+   void prune_for_sm_diagnostic (checker_path *path,
+ 				const state_machine *sm,
+ 				tree var,
+ 				state_machine::state_t state) const;
+   void update_for_unsuitable_sm_exprs (tree *expr) const;
+   void prune_interproc_events (checker_path *path) const;
+   void finish_pruning (checker_path *path) const;
+ 
+   auto_delete_vec<saved_diagnostic> m_saved_diagnostics;
+   const int m_verbosity;
+ };
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_DIAGNOSTIC_MANAGER_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/engine.cc gcc-10.1.0/gcc/analyzer/engine.cc
*** gcc-9.3.0/gcc/analyzer/engine.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/engine.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,4114 ----
+ /* The analysis "engine".
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "fold-const.h"
+ #include "gcc-rich-location.h"
+ #include "alloc-pool.h"
+ #include "fibonacci_heap.h"
+ #include "shortest-paths.h"
+ #include "diagnostic-core.h"
+ #include "diagnostic-event-id.h"
+ #include "diagnostic-path.h"
+ #include "function.h"
+ #include "pretty-print.h"
+ #include "sbitmap.h"
+ #include "bitmap.h"
+ #include "tristate.h"
+ #include "ordered-hash-map.h"
+ #include "selftest.h"
+ #include "analyzer/analyzer.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/region-model.h"
+ #include "analyzer/constraint-manager.h"
+ #include "analyzer/sm.h"
+ #include "analyzer/pending-diagnostic.h"
+ #include "analyzer/diagnostic-manager.h"
+ #include "cfg.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "gimple-iterator.h"
+ #include "gimple-pretty-print.h"
+ #include "cgraph.h"
+ #include "digraph.h"
+ #include "analyzer/supergraph.h"
+ #include "analyzer/call-string.h"
+ #include "analyzer/program-point.h"
+ #include "analyzer/program-state.h"
+ #include "analyzer/exploded-graph.h"
+ #include "analyzer/analysis-plan.h"
+ #include "analyzer/checker-path.h"
+ #include "analyzer/state-purge.h"
+ #include "analyzer/bar-chart.h"
+ 
+ /* For an overview, see gcc/doc/analyzer.texi.  */
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ static int readability_comparator (const void *p1, const void *p2);
+ 
+ /* class impl_region_model_context : public region_model_context.  */
+ 
+ impl_region_model_context::
+ impl_region_model_context (exploded_graph &eg,
+ 			   const exploded_node *enode_for_diag,
+ 			   const program_state *old_state,
+ 			   program_state *new_state,
+ 			   state_change *change,
+ 			   const gimple *stmt,
+ 			   stmt_finder *stmt_finder)
+ : m_eg (&eg), m_logger (eg.get_logger ()),
+   m_enode_for_diag (enode_for_diag),
+   m_old_state (old_state),
+   m_new_state (new_state),
+   m_change (change),
+   m_stmt (stmt),
+   m_stmt_finder (stmt_finder),
+   m_ext_state (eg.get_ext_state ())
+ {
+ }
+ 
+ impl_region_model_context::
+ impl_region_model_context (program_state *state,
+ 			   state_change *change,
+ 			   const extrinsic_state &ext_state,
+ 			   logger *logger)
+ : m_eg (NULL), m_logger (logger), m_enode_for_diag (NULL),
+   m_old_state (NULL),
+   m_new_state (state),
+   m_change (change),
+   m_stmt (NULL),
+   m_stmt_finder (NULL),
+   m_ext_state (ext_state)
+ {
+ }
+ 
+ void
+ impl_region_model_context::warn (pending_diagnostic *d)
+ {
+   LOG_FUNC (get_logger ());
+   if (m_eg)
+     m_eg->get_diagnostic_manager ().add_diagnostic
+       (m_enode_for_diag, m_enode_for_diag->get_supernode (),
+        m_stmt, m_stmt_finder, d);
+ }
+ 
+ void
+ impl_region_model_context::remap_svalue_ids (const svalue_id_map &map)
+ {
+   m_new_state->remap_svalue_ids (map);
+   if (m_change)
+     m_change->remap_svalue_ids (map);
+ }
+ 
+ int
+ impl_region_model_context::on_svalue_purge (svalue_id first_unused_sid,
+ 					    const svalue_id_map &map)
+ {
+   int total = 0;
+   int sm_idx;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (m_new_state->m_checker_states, sm_idx, smap)
+     {
+       const state_machine &sm = m_ext_state.get_sm (sm_idx);
+       total += smap->on_svalue_purge (sm, sm_idx, first_unused_sid,
+ 				      map, this);
+     }
+   if (m_change)
+     total += m_change->on_svalue_purge (first_unused_sid);
+   return total;
+ }
+ 
+ void
+ impl_region_model_context::on_unknown_change (svalue_id sid)
+ {
+   int sm_idx;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (m_new_state->m_checker_states, sm_idx, smap)
+     smap->on_unknown_change (sid);
+ }
+ 
+ /* class setjmp_svalue : public svalue.  */
+ 
+ /* Compare the fields of this setjmp_svalue with OTHER, returning true
+    if they are equal.
+    For use by svalue::operator==.  */
+ 
+ bool
+ setjmp_svalue::compare_fields (const setjmp_svalue &other) const
+ {
+   return m_setjmp_record == other.m_setjmp_record;
+ }
+ 
+ /* Implementation of svalue::add_to_hash vfunc for setjmp_svalue.  */
+ 
+ void
+ setjmp_svalue::add_to_hash (inchash::hash &hstate) const
+ {
+   hstate.add_int (m_setjmp_record.m_enode->m_index);
+ }
+ 
+ /* Get the index of the stored exploded_node.  */
+ 
+ int
+ setjmp_svalue::get_enode_index () const
+ {
+   return m_setjmp_record.m_enode->m_index;
+ }
+ 
+ /* Implementation of svalue::print_details vfunc for setjmp_svalue.  */
+ 
+ void
+ setjmp_svalue::print_details (const region_model &model ATTRIBUTE_UNUSED,
+ 			      svalue_id this_sid ATTRIBUTE_UNUSED,
+ 			      pretty_printer *pp) const
+ {
+   pp_printf (pp, "setjmp: EN: %i", get_enode_index ());
+ }
+ 
+ /* Concrete implementation of sm_context, wiring it up to the rest of this
+    file.  */
+ 
+ class impl_sm_context : public sm_context
+ {
+ public:
+   impl_sm_context (exploded_graph &eg,
+ 		   int sm_idx,
+ 		   const state_machine &sm,
+ 		   const exploded_node *enode_for_diag,
+ 		   const program_state *old_state,
+ 		   program_state *new_state,
+ 		   state_change *change,
+ 		   const sm_state_map *old_smap,
+ 		   sm_state_map *new_smap,
+ 		   stmt_finder *stmt_finder = NULL)
+   : sm_context (sm_idx, sm),
+     m_logger (eg.get_logger ()),
+     m_eg (eg), m_enode_for_diag (enode_for_diag),
+     m_old_state (old_state), m_new_state (new_state),
+     m_change (change),
+     m_old_smap (old_smap), m_new_smap (new_smap),
+     m_stmt_finder (stmt_finder)
+   {
+   }
+ 
+   logger *get_logger () const { return m_logger.get_logger (); }
+ 
+   tree get_fndecl_for_call (const gcall *call) FINAL OVERRIDE
+   {
+     impl_region_model_context old_ctxt
+       (m_eg, m_enode_for_diag, NULL, NULL/*m_enode->get_state ()*/,
+        m_change, call);
+     region_model *model = m_new_state->m_region_model;
+     return model->get_fndecl_for_call (call, &old_ctxt);
+   }
+ 
+   void on_transition (const supernode *node  ATTRIBUTE_UNUSED,
+ 		      const gimple *stmt  ATTRIBUTE_UNUSED,
+ 		      tree var,
+ 		      state_machine::state_t from,
+ 		      state_machine::state_t to,
+ 		      tree origin) FINAL OVERRIDE
+   {
+     logger * const logger = get_logger ();
+     LOG_FUNC (logger);
+     impl_region_model_context old_ctxt
+       (m_eg, m_enode_for_diag, NULL, NULL/*m_enode->get_state ()*/,
+        m_change, stmt);
+     svalue_id var_old_sid
+       = m_old_state->m_region_model->get_rvalue (var, &old_ctxt);
+ 
+     impl_region_model_context new_ctxt (m_eg, m_enode_for_diag,
+ 					m_old_state, m_new_state,
+ 					m_change, NULL);
+     svalue_id var_new_sid
+       = m_new_state->m_region_model->get_rvalue (var, &new_ctxt);
+     svalue_id origin_new_sid
+       = m_new_state->m_region_model->get_rvalue (origin, &new_ctxt);
+ 
+     state_machine::state_t current = m_old_smap->get_state (var_old_sid);
+     if (current == from)
+       {
+ 	if (logger)
+ 	  logger->log ("%s: state transition of %qE: %s -> %s",
+ 		       m_sm.get_name (),
+ 		       var,
+ 		       m_sm.get_state_name (from),
+ 		       m_sm.get_state_name (to));
+ 	m_new_smap->set_state (m_new_state->m_region_model, var_new_sid,
+ 			       to, origin_new_sid);
+ 	if (m_change)
+ 	  m_change->add_sm_change (m_sm_idx, var_new_sid, from, to);
+       }
+   }
+ 
+   void warn_for_state (const supernode *snode, const gimple *stmt,
+ 		       tree var, state_machine::state_t state,
+ 		       pending_diagnostic *d) FINAL OVERRIDE
+   {
+     LOG_FUNC (get_logger ());
+     gcc_assert (d); // take ownership
+ 
+     impl_region_model_context old_ctxt
+       (m_eg, m_enode_for_diag, m_old_state, m_new_state, m_change, NULL);
+     state_machine::state_t current;
+     if (var)
+       {
+ 	svalue_id var_old_sid
+ 	  = m_old_state->m_region_model->get_rvalue (var, &old_ctxt);
+ 	current = m_old_smap->get_state (var_old_sid);
+       }
+     else
+       current = m_old_smap->get_global_state ();
+ 
+     if (state == current)
+       {
+ 	m_eg.get_diagnostic_manager ().add_diagnostic
+ 	  (&m_sm, m_enode_for_diag, snode, stmt, m_stmt_finder,
+ 	   var, state, d);
+       }
+     else
+       delete d;
+   }
+ 
+   /* Hook for picking more readable trees for SSA names of temporaries,
+      so that rather than e.g.
+        "double-free of '<unknown>'"
+      we can print:
+        "double-free of 'inbuf.data'".  */
+ 
+   tree get_readable_tree (tree expr) FINAL OVERRIDE
+   {
+     /* Only for SSA_NAMEs of temporaries; otherwise, return EXPR, as it's
+        likely to be the least surprising tree to report.  */
+     if (TREE_CODE (expr) != SSA_NAME)
+       return expr;
+     if (SSA_NAME_VAR (expr) != NULL)
+       return expr;
+ 
+     gcc_assert (m_new_state);
+     svalue_id sid = m_new_state->m_region_model->get_rvalue (expr, NULL);
+     /* Find trees for all regions storing the value.  */
+     auto_vec<path_var> pvs;
+     m_new_state->m_region_model->get_path_vars_for_svalue (sid, &pvs);
+     if (pvs.length () < 1)
+       return expr;
+     /* Pick the "best" such tree.  */
+     // TODO: should we also consider (and consolidate) equiv classes?
+     pvs.qsort (readability_comparator);
+     return pvs[0].m_tree;
+   }
+ 
+   state_machine::state_t get_global_state () const FINAL OVERRIDE
+   {
+     return m_old_state->m_checker_states[m_sm_idx]->get_global_state ();
+   }
+ 
+   void set_global_state (state_machine::state_t state) FINAL OVERRIDE
+   {
+     m_new_state->m_checker_states[m_sm_idx]->set_global_state (state);
+   }
+ 
+   void on_custom_transition (custom_transition *transition) FINAL OVERRIDE
+   {
+     transition->impl_transition (&m_eg,
+ 				 const_cast<exploded_node *> (m_enode_for_diag),
+ 				 m_sm_idx);
+   }
+ 
+   log_user m_logger;
+   exploded_graph &m_eg;
+   const exploded_node *m_enode_for_diag;
+   const program_state *m_old_state;
+   program_state *m_new_state;
+   state_change *m_change;
+   const sm_state_map *m_old_smap;
+   sm_state_map *m_new_smap;
+   stmt_finder *m_stmt_finder;
+ };
+ 
+ /* Subclass of stmt_finder for finding the best stmt to report the leak at,
+    given the emission path.  */
+ 
+ class leak_stmt_finder : public stmt_finder
+ {
+ public:
+   leak_stmt_finder (const exploded_graph &eg, tree var)
+   : m_eg (eg), m_var (var) {}
+ 
+   stmt_finder *clone () const FINAL OVERRIDE
+   {
+     return new leak_stmt_finder (m_eg, m_var);
+   }
+ 
+   const gimple *find_stmt (const exploded_path &epath)
+     FINAL OVERRIDE
+   {
+     logger * const logger = m_eg.get_logger ();
+     LOG_FUNC (logger);
+ 
+     if (TREE_CODE (m_var) == SSA_NAME)
+       {
+ 	/* Locate the final write to this SSA name in the path.  */
+ 	const gimple *def_stmt = SSA_NAME_DEF_STMT (m_var);
+ 
+ 	int idx_of_def_stmt;
+ 	bool found = epath.find_stmt_backwards (def_stmt, &idx_of_def_stmt);
+ 	if (!found)
+ 	  goto not_found;
+ 
+ 	/* What was the next write to the underlying var
+ 	   after the SSA name was set? (if any).  */
+ 
+ 	for (unsigned idx = idx_of_def_stmt + 1;
+ 	     idx < epath.m_edges.length ();
+ 	     ++idx)
+ 	  {
+ 	    const exploded_edge *eedge = epath.m_edges[idx];
+ 	    if (logger)
+ 	      logger->log ("eedge[%i]: EN %i -> EN %i",
+ 			   idx,
+ 			   eedge->m_src->m_index,
+ 			   eedge->m_dest->m_index);
+ 	    const exploded_node *dst_node = eedge->m_dest;
+ 	    const program_point &dst_point = dst_node->get_point ();
+ 	    const gimple *stmt = dst_point.get_stmt ();
+ 	    if (!stmt)
+ 	      continue;
+ 	    if (const gassign *assign = dyn_cast <const gassign *> (stmt))
+ 	      {
+ 		tree lhs = gimple_assign_lhs (assign);
+ 		if (TREE_CODE (lhs) == SSA_NAME
+ 		    && SSA_NAME_VAR (lhs) == SSA_NAME_VAR (m_var))
+ 		  return assign;
+ 	      }
+ 	  }
+       }
+ 
+   not_found:
+ 
+     /* Look backwards for the first statement with a location.  */
+     int i;
+     const exploded_edge *eedge;
+     FOR_EACH_VEC_ELT_REVERSE (epath.m_edges, i, eedge)
+       {
+ 	if (logger)
+ 	  logger->log ("eedge[%i]: EN %i -> EN %i",
+ 		       i,
+ 		       eedge->m_src->m_index,
+ 		       eedge->m_dest->m_index);
+ 	const exploded_node *dst_node = eedge->m_dest;
+ 	const program_point &dst_point = dst_node->get_point ();
+ 	const gimple *stmt = dst_point.get_stmt ();
+ 	if (stmt)
+ 	  if (get_pure_location (stmt->location) != UNKNOWN_LOCATION)
+ 	    return stmt;
+       }
+ 
+     gcc_unreachable ();
+     return NULL;
+   }
+ 
+ private:
+   const exploded_graph &m_eg;
+   tree m_var;
+ };
+ 
+ /* A measurement of how good EXPR is for presenting to the user, so
+    that e.g. we can say prefer printing
+      "leak of 'tmp.m_ptr'"
+    over:
+      "leak of '<unknown>'".  */
+ 
+ static int
+ readability (const_tree expr)
+ {
+   gcc_assert (expr);
+   switch (TREE_CODE (expr))
+     {
+     case COMPONENT_REF:
+     case MEM_REF:
+       /* Impose a slight readability penalty relative to that of
+ 	 operand 0.  */
+       return readability (TREE_OPERAND (expr, 0)) - 1;
+ 
+     case SSA_NAME:
+       {
+ 	if (tree var = SSA_NAME_VAR (expr))
+ 	  return readability (var);
+ 	/* Avoid printing '<unknown>' for SSA names for temporaries.  */
+ 	return -1;
+       }
+       break;
+ 
+     case VAR_DECL:
+       /* Arbitrarily-chosen "high readability" value.  */
+       return 256;
+ 
+     default:
+       return 0;
+     }
+ 
+   return 0;
+ }
+ 
+ /* A qsort comparator for trees to sort them into most user-readable to
+    least user-readable.  */
+ 
+ static int
+ readability_comparator (const void *p1, const void *p2)
+ {
+   path_var pv1 = *(path_var const *)p1;
+   path_var pv2 = *(path_var const *)p2;
+ 
+   /* TODO: should we consider stack depths?  */
+   int r1 = readability (pv1.m_tree);
+   int r2 = readability (pv2.m_tree);
+ 
+   return r2 - r1;
+ }
+ 
+ /* Create an sm_context and use it to call SM's on_leak vfunc, so that
+    it can potentially complain about a leak of DST_SID (in a new region_model)
+    in the given STATE, where MAP can be used to map SID back to an "old"
+    region_model.  */
+ 
+ void
+ impl_region_model_context::on_state_leak (const state_machine &sm,
+ 					  int sm_idx,
+ 					  svalue_id dst_sid,
+ 					  svalue_id first_unused_sid,
+ 					  const svalue_id_map &map,
+ 					  state_machine::state_t state)
+ {
+   logger * const logger = get_logger ();
+   LOG_SCOPE (logger);
+   if (logger)
+     logger->log ("considering leak of sv%i", dst_sid.as_int ());
+ 
+   if (!m_eg)
+     return;
+ 
+   /* m_old_state also needs to be non-NULL so that the sm_ctxt can look
+      up the old state of the sid.  */
+   gcc_assert (m_old_state);
+ 
+   /* Don't report on sid leaking if it's equal to one of the used sids.
+      For example, given:
+        some_non_trivial_expression = malloc (sizeof (struct foo));
+      we have:
+        _1 = malloc;                         (void *)
+        some_non_trivial_expression = _1;    (struct foo *)
+      and at leak-detection time we may have:
+        sv5: {type: 'struct foo *', &r3}  (used)
+        sv6: {type: 'void *', &r3}         (unused)
+      where both point to the same region.  We don't want to report a
+      leak of sv6, so we reject the report due to its equality with sv5.  */
+   gcc_assert (m_new_state);
+   gcc_assert (!first_unused_sid.null_p ());
+   for (int i = 0; i < first_unused_sid.as_int (); i++)
+     {
+       svalue_id used_sid = svalue_id::from_int (i);
+ 
+       /* Use the "_without_cm" form of eval_condition, since
+ 	 we're half-way through purging - we don't want to introduce new
+ 	 equivalence classes into the constraint_manager for "sid" and
+ 	 for each of the used_sids.  */
+       const region_model &rm = *m_new_state->m_region_model;
+       tristate eq = rm.eval_condition_without_cm (dst_sid, EQ_EXPR, used_sid);
+       if (eq.is_true ())
+ 	{
+ 	  if (logger)
+ 	    logger->log ("rejecting leak of sv%i due to equality with sv%i",
+ 			 dst_sid.as_int (), used_sid.as_int ());
+ 	  return;
+ 	}
+     }
+ 
+   /* SID has leaked within the new state: no regions use it.
+      We need to convert it back to a tree, but since no regions use it, we
+      have to use MAP to convert it back to an svalue_id within the old state.
+      We can then look that svalue_id up to locate regions and thus tree(s)
+      that use it.  */
+ 
+   svalue_id old_sid = map.get_src_for_dst (dst_sid);
+ 
+   auto_vec<path_var> leaked_pvs;
+   m_old_state->m_region_model->get_path_vars_for_svalue (old_sid, &leaked_pvs);
+ 
+   if (leaked_pvs.length () < 1)
+     return;
+ 
+   /* Find "best" leaked tree.
+      Sort the leaks into most human-readable first, through
+      to least user-readable.  Given that we only emit one
+      leak per EC, this ought to ensure that we pick the most
+      user-readable description of each leaking EC.
+      This assumes that all vars in the EC have the same state.  */
+   leaked_pvs.qsort (readability_comparator);
+ 
+   tree leaked_tree = leaked_pvs[0].m_tree;
+   if (logger)
+     logger->log ("best leaked_tree: %qE", leaked_tree);
+ 
+   leak_stmt_finder stmt_finder (*m_eg, leaked_tree);
+   impl_sm_context sm_ctxt (*m_eg, sm_idx, sm, m_enode_for_diag,
+ 			   m_old_state, m_new_state,
+ 			   m_change,
+ 			   m_old_state->m_checker_states[sm_idx],
+ 			   m_new_state->m_checker_states[sm_idx],
+ 			   &stmt_finder);
+   gcc_assert (m_enode_for_diag);
+ 
+   /* Don't complain about leaks when returning from "main".  */
+   if (m_enode_for_diag->get_supernode ()
+       && m_enode_for_diag->get_supernode ()->return_p ())
+     {
+       tree fndecl = m_enode_for_diag->get_function ()->decl;
+       if (0 == strcmp (IDENTIFIER_POINTER (DECL_NAME (fndecl)), "main"))
+ 	{
+ 	  if (logger)
+ 	    logger->log ("not reporting leak from main");
+ 	  return;
+ 	}
+     }
+ 
+   pending_diagnostic *pd = sm.on_leak (leaked_tree);
+   if (pd)
+     m_eg->get_diagnostic_manager ().add_diagnostic
+       (&sm, m_enode_for_diag, m_enode_for_diag->get_supernode (),
+        m_stmt, &stmt_finder,
+        leaked_tree, state, pd);
+ }
+ 
+ /* Implementation of region_model_context::on_inherited_svalue vfunc
+    for impl_region_model_context.
+    Notify all checkers that CHILD_SID has been created from PARENT_SID,
+    so that those state machines that inherit state can propagate the state
+    from parent to child.  */
+ 
+ void
+ impl_region_model_context::on_inherited_svalue (svalue_id parent_sid,
+ 						svalue_id child_sid)
+ {
+   if (!m_new_state)
+     return;
+ 
+   int sm_idx;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (m_new_state->m_checker_states, sm_idx, smap)
+     {
+       const state_machine &sm = m_ext_state.get_sm (sm_idx);
+       if (sm.inherited_state_p ())
+ 	smap->on_inherited_svalue (parent_sid, child_sid);
+     }
+ }
+ 
+ /* Implementation of region_model_context::on_cast vfunc
+    for impl_region_model_context.
+    Notify all checkers that DST_SID is a cast of SRC_SID, so that sm-state
+    can be propagated from src to dst.  */
+ 
+ void
+ impl_region_model_context::on_cast (svalue_id src_sid,
+ 				    svalue_id dst_sid)
+ {
+   if (!m_new_state)
+     return;
+ 
+   int sm_idx;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (m_new_state->m_checker_states, sm_idx, smap)
+     smap->on_cast (src_sid, dst_sid);
+ }
+ 
+ /* Implementation of region_model_context::on_condition vfunc.
+    Notify all state machines about the condition, which could lead to
+    state transitions.  */
+ 
+ void
+ impl_region_model_context::on_condition (tree lhs, enum tree_code op, tree rhs)
+ {
+   int sm_idx;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (m_new_state->m_checker_states, sm_idx, smap)
+     {
+       const state_machine &sm = m_ext_state.get_sm (sm_idx);
+       impl_sm_context sm_ctxt (*m_eg, sm_idx, sm, m_enode_for_diag,
+ 			       m_old_state, m_new_state,
+ 			       m_change,
+ 			       m_old_state->m_checker_states[sm_idx],
+ 			       m_new_state->m_checker_states[sm_idx]);
+       sm.on_condition (&sm_ctxt,
+ 		       m_enode_for_diag->get_supernode (), m_stmt,
+ 		       lhs, op, rhs);
+     }
+ }
+ 
+ /* Implementation of region_model_context::on_phi vfunc.
+    Notify all state machines about the phi, which could lead to
+    state transitions.  */
+ 
+ void
+ impl_region_model_context::on_phi (const gphi *phi, tree rhs)
+ {
+   int sm_idx;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (m_new_state->m_checker_states, sm_idx, smap)
+     {
+       const state_machine &sm = m_ext_state.get_sm (sm_idx);
+       impl_sm_context sm_ctxt (*m_eg, sm_idx, sm, m_enode_for_diag,
+ 			       m_old_state, m_new_state,
+ 			       m_change,
+ 			       m_old_state->m_checker_states[sm_idx],
+ 			       m_new_state->m_checker_states[sm_idx]);
+       sm.on_phi (&sm_ctxt, m_enode_for_diag->get_supernode (), phi, rhs);
+     }
+ }
+ 
+ /* Implementation of region_model_context::on_unexpected_tree_code vfunc.
+    Mark the new state as being invalid for further exploration.
+    TODO(stage1): introduce a warning for when this occurs.  */
+ 
+ void
+ impl_region_model_context::on_unexpected_tree_code (tree t,
+ 						    const dump_location_t &loc)
+ {
+   logger * const logger = get_logger ();
+   if (logger)
+     logger->log ("unhandled tree code: %qs in %qs at %s:%i",
+ 		 t ? get_tree_code_name (TREE_CODE (t)) : "(null)",
+ 		 loc.get_impl_location ().m_function,
+ 		 loc.get_impl_location ().m_file,
+ 		 loc.get_impl_location ().m_line);
+   if (m_new_state)
+     m_new_state->m_valid = false;
+ }
+ 
+ /* struct point_and_state.  */
+ 
+ /* Assert that this object is sane.  */
+ 
+ void
+ point_and_state::validate (const extrinsic_state &ext_state) const
+ {
+   /* Skip this in a release build.  */
+ #if !CHECKING_P
+   return;
+ #endif
+ 
+   m_point.validate ();
+ 
+   m_state.validate (ext_state);
+ 
+   /* Verify that the callstring's model of the stack corresponds to that
+      of the region_model.  */
+   /* They should have the same depth.  */
+   gcc_assert (m_point.get_stack_depth ()
+ 	      == m_state.m_region_model->get_stack_depth ());
+   /* Check the functions in the callstring vs those in the frames
+      at each depth.  */
+   for (int depth = 0; depth < m_point.get_stack_depth (); ++depth)
+     {
+       gcc_assert (m_point.get_function_at_depth (depth)
+ 		  == m_state.m_region_model->get_function_at_depth (depth));
+     }
+ }
+ 
+ /* Subroutine of print_enode_indices: print a run of indices from START_IDX
+    to END_IDX to PP, using and updating *FIRST_RUN.  */
+ 
+ static void
+ print_run (pretty_printer *pp, int start_idx, int end_idx,
+ 	   bool *first_run)
+ {
+   if (!(*first_run))
+     pp_string (pp, ", ");
+   *first_run = false;
+   if (start_idx == end_idx)
+     pp_printf (pp, "EN: %i", start_idx);
+   else
+     pp_printf (pp, "EN: %i-%i", start_idx, end_idx);
+ }
+ 
+ /* Print the indices within ENODES to PP, collecting them as
+    runs/singletons e.g. "EN: 4-7, EN: 20-23, EN: 42".  */
+ 
+ static void
+ print_enode_indices (pretty_printer *pp,
+ 		     const auto_vec<exploded_node *> &enodes)
+ {
+   int cur_start_idx = -1;
+   int cur_finish_idx = -1;
+   bool first_run = true;
+   unsigned i;
+   exploded_node *enode;
+   FOR_EACH_VEC_ELT (enodes, i, enode)
+     {
+       if (cur_start_idx == -1)
+ 	{
+ 	  gcc_assert (cur_finish_idx == -1);
+ 	  cur_start_idx = cur_finish_idx = enode->m_index;
+ 	}
+       else
+ 	{
+ 	  if (enode->m_index == cur_finish_idx + 1)
+ 	    /* Continuation of a run.  */
+ 	    cur_finish_idx = enode->m_index;
+ 	  else
+ 	    {
+ 	      /* Finish existing run, start a new one.  */
+ 	      gcc_assert (cur_start_idx >= 0);
+ 	      gcc_assert (cur_finish_idx >= 0);
+ 	      print_run (pp, cur_start_idx, cur_finish_idx,
+ 			 &first_run);
+ 	      cur_start_idx = cur_finish_idx = enode->m_index;
+ 	    }
+ 	}
+     }
+   /* Finish any existing run.  */
+   if (cur_start_idx >= 0)
+     {
+       gcc_assert (cur_finish_idx >= 0);
+       print_run (pp, cur_start_idx, cur_finish_idx,
+ 		 &first_run);
+     }
+ }
+ 
+ /* class exploded_node : public dnode<eg_traits>.  */
+ 
+ /* exploded_node's ctor.  */
+ 
+ exploded_node::exploded_node (const point_and_state &ps,
+ 			      int index)
+ : m_ps (ps), m_status (STATUS_WORKLIST), m_index (index)
+ {
+   gcc_checking_assert (ps.get_state ().m_region_model->canonicalized_p ());
+ }
+ 
+ /* For use by dump_dot, get a value for the .dot "fillcolor" attribute.
+    Colorize by sm-state, to make it easier to see how sm-state propagates
+    through the exploded_graph.  */
+ 
+ const char *
+ exploded_node::get_dot_fillcolor () const
+ {
+   const program_state &state = get_state ();
+ 
+   /* We want to be able to easily distinguish the no-sm-state case,
+      and to be able to distinguish cases where there's a single state
+      from each other.
+ 
+      Sum the sm_states, and use the result to choose from a table,
+      modulo table-size, special-casing the "no sm-state" case.   */
+   int total_sm_state = 0;
+   int i;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (state.m_checker_states, i, smap)
+     {
+       for (sm_state_map::iterator_t iter = smap->begin ();
+ 	 iter != smap->end ();
+ 	   ++iter)
+ 	total_sm_state += (*iter).second.m_state;
+       total_sm_state += smap->get_global_state ();
+     }
+ 
+   if (total_sm_state > 0)
+     {
+       /* An arbitrarily-picked collection of light colors.  */
+       const char * const colors[]
+ 	= {"azure", "coral", "cornsilk", "lightblue", "yellow"};
+       const int num_colors = sizeof (colors) / sizeof (colors[0]);
+       return colors[total_sm_state % num_colors];
+     }
+   else
+     /* No sm-state.   */
+     return "lightgrey";
+ }
+ 
+ /* Implementation of dnode::dump_dot vfunc for exploded_node.  */
+ 
+ void
+ exploded_node::dump_dot (graphviz_out *gv, const dump_args_t &args) const
+ {
+   pretty_printer *pp = gv->get_pp ();
+ 
+   dump_dot_id (pp);
+   pp_printf (pp, " [shape=none,margin=0,style=filled,fillcolor=%s,label=\"",
+ 	     get_dot_fillcolor ());
+   pp_write_text_to_stream (pp);
+ 
+   pp_printf (pp, "EN: %i", m_index);
+   if (m_status == STATUS_MERGER)
+     pp_string (pp, " (merger)");
+   pp_newline (pp);
+ 
+   format f (true);
+   m_ps.get_point ().print (pp, f);
+   pp_newline (pp);
+ 
+   const extrinsic_state &ext_state = args.m_eg.get_ext_state ();
+   const program_state &state = m_ps.get_state ();
+   state.dump_to_pp (ext_state, true, pp);
+   pp_newline (pp);
+ 
+   {
+     int i;
+     sm_state_map *smap;
+     FOR_EACH_VEC_ELT (state.m_checker_states, i, smap)
+       {
+ 	if (!smap->is_empty_p ())
+ 	  {
+ 	    pp_printf (pp, "%s: ", ext_state.get_name (i));
+ 	    smap->print (ext_state.get_sm (i), state.m_region_model, pp);
+ 	    pp_newline (pp);
+ 	  }
+       }
+   }
+ 
+   /* Dump any saved_diagnostics at this enode.  */
+   {
+     const diagnostic_manager &dm = args.m_eg.get_diagnostic_manager ();
+     for (unsigned i = 0; i < dm.get_num_diagnostics (); i++)
+       {
+ 	const saved_diagnostic *sd = dm.get_saved_diagnostic (i);
+ 	if (sd->m_enode == this)
+ 	  {
+ 	    pp_printf (pp, "DIAGNOSTIC: %s", sd->m_d->get_kind ());
+ 	    pp_newline (pp);
+ 	  }
+       }
+   }
+ 
+   pp_write_text_as_dot_label_to_stream (pp, /*for_record=*/true);
+ 
+   pp_string (pp, "\"];\n\n");
+   pp_flush (pp);
+ }
+ 
+ /* Dump this to PP in a form suitable for use as an id in .dot output.  */
+ 
+ void
+ exploded_node::dump_dot_id (pretty_printer *pp) const
+ {
+   pp_printf (pp, "exploded_node_%i", m_index);
+ }
+ 
+ /* Dump a multiline representation of this node to PP.  */
+ 
+ void
+ exploded_node::dump_to_pp (pretty_printer *pp,
+ 			   const extrinsic_state &ext_state) const
+ {
+   pp_printf (pp, "EN: %i", m_index);
+   pp_newline (pp);
+ 
+   format f (true);
+   m_ps.get_point ().print (pp, f);
+   pp_newline (pp);
+ 
+   m_ps.get_state ().dump_to_pp (ext_state, false, pp);
+   pp_newline (pp);
+ }
+ 
+ /* Dump a multiline representation of this node to FILE.  */
+ 
+ void
+ exploded_node::dump (FILE *fp,
+ 		     const extrinsic_state &ext_state) const
+ {
+   pretty_printer pp;
+   pp_format_decoder (&pp) = default_tree_printer;
+   pp_show_color (&pp) = pp_show_color (global_dc->printer);
+   pp.buffer->stream = fp;
+   dump_to_pp (&pp, ext_state);
+   pp_flush (&pp);
+ }
+ 
+ /* Dump a multiline representation of this node to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ exploded_node::dump (const extrinsic_state &ext_state) const
+ {
+   dump (stderr, ext_state);
+ }
+ 
+ } // namespace ana
+ 
+ /* Return true if FNDECL has a gimple body.  */
+ // TODO: is there a pre-canned way to do this?
+ 
+ bool
+ fndecl_has_gimple_body_p (tree fndecl)
+ {
+   if (fndecl == NULL_TREE)
+     return false;
+ 
+   cgraph_node *n = cgraph_node::get (fndecl);
+   if (!n)
+     return false;
+ 
+   return n->has_gimple_body_p ();
+ }
+ 
+ namespace ana {
+ 
+ /* A pending_diagnostic subclass for implementing "__analyzer_dump_path".  */
+ 
+ class dump_path_diagnostic
+   : public pending_diagnostic_subclass<dump_path_diagnostic>
+ {
+ public:
+   bool emit (rich_location *richloc) FINAL OVERRIDE
+   {
+     inform (richloc, "path");
+     return true;
+   }
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "dump_path_diagnostic"; }
+ 
+   bool operator== (const dump_path_diagnostic &) const
+   {
+     return true;
+   }
+ };
+ 
+ /* Modify STATE in place, applying the effects of the stmt at this node's
+    point.  */
+ 
+ exploded_node::on_stmt_flags
+ exploded_node::on_stmt (exploded_graph &eg,
+ 			const supernode *snode,
+ 			const gimple *stmt,
+ 			program_state *state,
+ 			state_change *change) const
+ {
+   /* Preserve the old state.  It is used here for looking
+      up old checker states, for determining state transitions, and
+      also within impl_region_model_context and impl_sm_context for
+      going from tree to svalue_id.  */
+   const program_state old_state (*state);
+ 
+   impl_region_model_context ctxt (eg, this,
+ 				  &old_state, state, change,
+ 				  stmt);
+ 
+   if (const gassign *assign = dyn_cast <const gassign *> (stmt))
+     state->m_region_model->on_assignment (assign, &ctxt);
+ 
+   if (const greturn *return_ = dyn_cast <const greturn *> (stmt))
+     state->m_region_model->on_return (return_, &ctxt);
+ 
+   /* Track whether we have a gcall to a function that's not recognized by
+      anything, for which we don't have a function body, or for which we
+      don't know the fndecl.  */
+   bool unknown_side_effects = false;
+   if (const gcall *call = dyn_cast <const gcall *> (stmt))
+     {
+       /* Debugging/test support.  */
+       if (is_special_named_call_p (call, "__analyzer_dump", 0))
+ 	{
+ 	  /* Handle the builtin "__analyzer_dump" by dumping state
+ 	     to stderr.  */
+ 	  dump (eg.get_ext_state ());
+ 	}
+       else if (is_special_named_call_p (call, "__analyzer_dump_path", 0))
+ 	{
+ 	  /* Handle the builtin "__analyzer_dump_path" by queuing a
+ 	     diagnostic at this exploded_node.  */
+ 	  ctxt.warn (new dump_path_diagnostic ());
+ 	}
+       else if (is_special_named_call_p (call, "__analyzer_dump_region_model", 0))
+ 	{
+ 	  /* Handle the builtin "__analyzer_dump_region_model" by dumping
+ 	     the region model's state to stderr.  */
+ 	  state->m_region_model->dump (false);
+ 	}
+       else if (is_special_named_call_p (call, "__analyzer_eval", 1))
+ 	{
+ 	  /* Handle the builtin "__analyzer_eval" by evaluating the input
+ 	     and dumping as a dummy warning, so that test cases can use
+ 	     dg-warning to validate the result (and so unexpected warnings will
+ 	     lead to DejaGnu failures).  */
+ 	  tree t_arg = gimple_call_arg (call, 0);
+ 	  tristate t
+ 	    = state->m_region_model->eval_condition (t_arg,
+ 						     NE_EXPR,
+ 						     integer_zero_node,
+ 						     &ctxt);
+ 	  warning_at (call->location, 0, "%s", t.as_string ());
+ 	}
+       else if (is_special_named_call_p (call, "__analyzer_break", 0))
+ 	{
+ 	  /* Handle the builtin "__analyzer_break" by triggering a
+ 	     breakpoint.  */
+ 	  /* TODO: is there a good cross-platform way to do this?  */
+ 	  raise (SIGINT);
+ 	}
+       else if (is_special_named_call_p (call, "__analyzer_dump_exploded_nodes",
+ 					1))
+ 	{
+ 	  /* This is handled elsewhere.  */
+ 	}
+       else if (is_setjmp_call_p (call))
+ 	state->m_region_model->on_setjmp (call, this, &ctxt);
+       else if (is_longjmp_call_p (call))
+ 	{
+ 	  on_longjmp (eg, call, state, &ctxt);
+ 	  return on_stmt_flags::terminate_path ();
+ 	}
+       else
+ 	unknown_side_effects = state->m_region_model->on_call_pre (call, &ctxt);
+     }
+ 
+   bool any_sm_changes = false;
+   int sm_idx;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (old_state.m_checker_states, sm_idx, smap)
+     {
+       const state_machine &sm = eg.get_ext_state ().get_sm (sm_idx);
+       const sm_state_map *old_smap
+ 	= old_state.m_checker_states[sm_idx];
+       sm_state_map *new_smap = state->m_checker_states[sm_idx];
+       impl_sm_context sm_ctxt (eg, sm_idx, sm, this, &old_state, state,
+ 			       change,
+ 			       old_smap, new_smap);
+       /* Allow the state_machine to handle the stmt.  */
+       if (sm.on_stmt (&sm_ctxt, snode, stmt))
+ 	unknown_side_effects = false;
+       else
+ 	{
+ 	  /* For those stmts that were not handled by the state machine.  */
+ 	  if (const gcall *call = dyn_cast <const gcall *> (stmt))
+ 	    {
+ 	      tree callee_fndecl
+ 		= state->m_region_model->get_fndecl_for_call (call, &ctxt);
+ 
+ 	      if (!fndecl_has_gimple_body_p (callee_fndecl))
+ 		new_smap->purge_for_unknown_fncall (eg, sm, call, callee_fndecl,
+ 						    state->m_region_model,
+ 						    &ctxt);
+ 	    }
+ 	}
+       if (*old_smap != *new_smap)
+ 	any_sm_changes = true;
+     }
+ 
+   if (const gcall *call = dyn_cast <const gcall *> (stmt))
+     state->m_region_model->on_call_post (call, unknown_side_effects, &ctxt);
+ 
+   return on_stmt_flags (any_sm_changes);
+ }
+ 
+ /* Consider the effect of following superedge SUCC from this node.
+ 
+    Return true if it's feasible to follow the edge, or false
+    if it's infeasible.
+ 
+    Examples: if it's the "true" branch within
+    a CFG and we know the conditional is false, we know it's infeasible.
+    If it's one of multiple interprocedual "return" edges, then only
+    the edge back to the most recent callsite is feasible.
+ 
+    Update NEXT_STATE accordingly (e.g. to record that a condition was
+    true or false, or that the NULL-ness of a pointer has been checked,
+    pushing/popping stack frames, etc).
+ 
+    Update NEXT_POINT accordingly (updating the call string).  */
+ 
+ bool
+ exploded_node::on_edge (exploded_graph &eg,
+ 			const superedge *succ,
+ 			program_point *next_point,
+ 			program_state *next_state,
+ 			state_change *change) const
+ {
+   LOG_FUNC (eg.get_logger ());
+ 
+   if (!next_point->on_edge (eg, succ))
+     return false;
+ 
+   if (!next_state->on_edge (eg, *this, succ, change))
+     return false;
+ 
+   return true;
+ }
+ 
+ /* Verify that the stack at LONGJMP_POINT is still valid, given a call
+    to "setjmp" at SETJMP_POINT - the stack frame that "setjmp" was
+    called in must still be valid.
+ 
+    Caveat: this merely checks the call_strings in the points; it doesn't
+    detect the case where a frame returns and is then called again.  */
+ 
+ static bool
+ valid_longjmp_stack_p (const program_point &longjmp_point,
+ 		       const program_point &setjmp_point)
+ {
+   const call_string &cs_at_longjmp = longjmp_point.get_call_string ();
+   const call_string &cs_at_setjmp = setjmp_point.get_call_string ();
+ 
+   if (cs_at_longjmp.length () < cs_at_setjmp.length ())
+     return false;
+ 
+   /* Check that the call strings match, up to the depth of the
+      setjmp point.  */
+   for (unsigned depth = 0; depth < cs_at_setjmp.length (); depth++)
+     if (cs_at_longjmp[depth] != cs_at_setjmp[depth])
+       return false;
+ 
+   return true;
+ }
+ 
+ /* A pending_diagnostic subclass for complaining about bad longjmps,
+    where the enclosing function of the "setjmp" has returned (and thus
+    the stack frame no longer exists).  */
+ 
+ class stale_jmp_buf : public pending_diagnostic_subclass<dump_path_diagnostic>
+ {
+ public:
+   stale_jmp_buf (const gcall *setjmp_call, const gcall *longjmp_call)
+   : m_setjmp_call (setjmp_call), m_longjmp_call (longjmp_call)
+   {}
+ 
+   bool emit (rich_location *richloc) FINAL OVERRIDE
+   {
+     return warning_at
+       (richloc, OPT_Wanalyzer_stale_setjmp_buffer,
+        "%qs called after enclosing function of %qs has returned",
+        get_user_facing_name (m_longjmp_call),
+        get_user_facing_name (m_setjmp_call));
+   }
+ 
+   const char *get_kind () const FINAL OVERRIDE
+   { return "stale_jmp_buf"; }
+ 
+   bool operator== (const stale_jmp_buf &other) const
+   {
+     return (m_setjmp_call == other.m_setjmp_call
+ 	    && m_longjmp_call == other.m_longjmp_call);
+   }
+ 
+ private:
+   const gcall *m_setjmp_call;
+   const gcall *m_longjmp_call;
+ };
+ 
+ /* Handle LONGJMP_CALL, a call to longjmp or siglongjmp.
+ 
+    Attempt to locate where setjmp/sigsetjmp was called on the jmp_buf and build
+    an exploded_node and exploded_edge to it representing a rewind to that frame,
+    handling the various kinds of failure that can occur.  */
+ 
+ void
+ exploded_node::on_longjmp (exploded_graph &eg,
+ 			   const gcall *longjmp_call,
+ 			   program_state *new_state,
+ 			   region_model_context *ctxt) const
+ {
+   tree buf_ptr = gimple_call_arg (longjmp_call, 0);
+ 
+   region_model *new_region_model = new_state->m_region_model;
+   region_id buf_rid = new_region_model->deref_rvalue (buf_ptr, ctxt);
+   region *buf = new_region_model->get_region (buf_rid);
+   if (!buf)
+     return;
+ 
+   svalue_id buf_content_sid
+     = buf->get_value (*new_region_model, false, ctxt);
+   svalue *buf_content_sval = new_region_model->get_svalue (buf_content_sid);
+   if (!buf_content_sval)
+     return;
+   setjmp_svalue *setjmp_sval = buf_content_sval->dyn_cast_setjmp_svalue ();
+   if (!setjmp_sval)
+     return;
+ 
+   const setjmp_record tmp_setjmp_record = setjmp_sval->get_setjmp_record ();
+ 
+   /* Build a custom enode and eedge for rewinding from the longjmp/siglongjmp
+      call back to the setjmp/sigsetjmp.  */
+   rewind_info_t rewind_info (tmp_setjmp_record, longjmp_call);
+ 
+   const gcall *setjmp_call = rewind_info.get_setjmp_call ();
+   const program_point &setjmp_point = rewind_info.get_setjmp_point ();
+ 
+   const program_point &longjmp_point = get_point ();
+ 
+   /* Verify that the setjmp's call_stack hasn't been popped.  */
+   if (!valid_longjmp_stack_p (longjmp_point, setjmp_point))
+     {
+       ctxt->warn (new stale_jmp_buf (setjmp_call, longjmp_call));
+       return;
+     }
+ 
+   gcc_assert (longjmp_point.get_stack_depth ()
+ 	      >= setjmp_point.get_stack_depth ());
+ 
+   /* Update the state for use by the destination node.  */
+ 
+   /* Stash the current number of diagnostics so that we can update
+      any that this adds to show where the longjmp is rewinding to.  */
+ 
+   diagnostic_manager *dm = &eg.get_diagnostic_manager ();
+   unsigned prev_num_diagnostics = dm->get_num_diagnostics ();
+ 
+   new_region_model->on_longjmp (longjmp_call, setjmp_call,
+ 				setjmp_point.get_stack_depth (), ctxt);
+ 
+   program_point next_point
+     = program_point::after_supernode (setjmp_point.get_supernode (),
+ 				      setjmp_point.get_call_string ());
+ 
+   state_change change;
+   exploded_node *next = eg.get_or_create_node (next_point, *new_state, &change);
+ 
+   /* Create custom exploded_edge for a longjmp.  */
+   if (next)
+     {
+       exploded_edge *eedge
+ 	= eg.add_edge (const_cast<exploded_node *> (this), next, NULL,
+ 		       change,
+ 		       new rewind_info_t (tmp_setjmp_record, longjmp_call));
+ 
+       /* For any diagnostics that were queued here (such as leaks) we want
+ 	 the checker_path to show the rewinding events after the "final event"
+ 	 so that the user sees where the longjmp is rewinding to (otherwise the
+ 	 path is meaningless).
+ 
+ 	 For example, we want to emit something like:
+                         |   NN | {
+                         |   NN |   longjmp (env, 1);
+                         |      |   ~~~~~~~~~~~~~~~~
+                         |      |   |
+                         |      |   (10) 'ptr' leaks here; was allocated at (7)
+                         |      |   (11) rewinding from 'longjmp' in 'inner'...
+                         |
+           <-------------+
+           |
+         'outer': event 12
+           |
+           |   NN |   i = setjmp(env);
+           |      |       ^~~~~~
+           |      |       |
+           |      |       (12) ...to 'setjmp' in 'outer' (saved at (2))
+ 
+ 	 where the "final" event above is event (10), but we want to append
+ 	 events (11) and (12) afterwards.
+ 
+ 	 Do this by setting m_trailing_eedge on any diagnostics that were
+ 	 just saved.  */
+       unsigned num_diagnostics = dm->get_num_diagnostics ();
+       for (unsigned i = prev_num_diagnostics; i < num_diagnostics; i++)
+ 	{
+ 	  saved_diagnostic *sd = dm->get_saved_diagnostic (i);
+ 	  sd->m_trailing_eedge = eedge;
+ 	}
+     }
+ }
+ 
+ /* Subroutine of exploded_graph::process_node for finding the successors
+    of the supernode for a function exit basic block.
+ 
+    Ensure that pop_frame is called, potentially queuing diagnostics about
+    leaks.  */
+ 
+ void
+ exploded_node::detect_leaks (exploded_graph &eg) const
+ {
+   LOG_FUNC_1 (eg.get_logger (), "EN: %i", m_index);
+ 
+   gcc_assert (get_point ().get_supernode ()->return_p ());
+ 
+   /* If we're not a "top-level" function, do nothing; pop_frame
+      will be called when handling the return superedge.  */
+   if (get_point ().get_stack_depth () > 1)
+     return;
+ 
+   /* We have a "top-level" function.  */
+   gcc_assert (get_point ().get_stack_depth () == 1);
+ 
+   const program_state &old_state = get_state ();
+ 
+   /* Work with a temporary copy of the state: pop the frame, and see
+      what leaks (via purge_unused_svalues).  */
+   program_state new_state (old_state);
+ 
+   gcc_assert (new_state.m_region_model);
+ 
+   purge_stats stats;
+   impl_region_model_context ctxt (eg, this,
+ 				  &old_state, &new_state,
+ 				  NULL,
+ 				  get_stmt ());
+   new_state.m_region_model->pop_frame (region_id::null (),
+ 				       true, &stats, &ctxt);
+ }
+ 
+ /* Dump the successors and predecessors of this enode to OUTF.  */
+ 
+ void
+ exploded_node::dump_succs_and_preds (FILE *outf) const
+ {
+   unsigned i;
+   exploded_edge *e;
+   {
+     auto_vec<exploded_node *> preds (m_preds.length ());
+     FOR_EACH_VEC_ELT (m_preds, i, e)
+       preds.quick_push (e->m_src);
+     pretty_printer pp;
+     print_enode_indices (&pp, preds);
+     fprintf (outf, "preds: %s\n",
+ 	     pp_formatted_text (&pp));
+   }
+   {
+     auto_vec<exploded_node *> succs (m_succs.length ());
+     FOR_EACH_VEC_ELT (m_succs, i, e)
+       succs.quick_push (e->m_dest);
+     pretty_printer pp;
+     print_enode_indices (&pp, succs);
+     fprintf (outf, "succs: %s\n",
+ 	     pp_formatted_text (&pp));
+   }
+ }
+ 
+ /* class rewind_info_t : public exploded_edge::custom_info_t.  */
+ 
+ /* Implementation of exploded_edge::custom_info_t::update_model vfunc
+    for rewind_info_t.
+ 
+    Update state for the special-case of a rewind of a longjmp
+    to a setjmp (which doesn't have a superedge, but does affect
+    state).  */
+ 
+ void
+ rewind_info_t::update_model (region_model *model,
+ 			     const exploded_edge &eedge)
+ {
+   const program_point &longjmp_point = eedge.m_src->get_point ();
+   const program_point &setjmp_point = eedge.m_dest->get_point ();
+ 
+   gcc_assert (longjmp_point.get_stack_depth ()
+ 	      >= setjmp_point.get_stack_depth ());
+ 
+   model->on_longjmp (get_longjmp_call (),
+ 		     get_setjmp_call (),
+ 		     setjmp_point.get_stack_depth (), NULL);
+ }
+ 
+ /* Implementation of exploded_edge::custom_info_t::add_events_to_path vfunc
+    for rewind_info_t.  */
+ 
+ void
+ rewind_info_t::add_events_to_path (checker_path *emission_path,
+ 				   const exploded_edge &eedge)
+ {
+   const exploded_node *src_node = eedge.m_src;
+   const program_point &src_point = src_node->get_point ();
+   const int src_stack_depth = src_point.get_stack_depth ();
+   const exploded_node *dst_node = eedge.m_dest;
+   const program_point &dst_point = dst_node->get_point ();
+   const int dst_stack_depth = dst_point.get_stack_depth ();
+ 
+   emission_path->add_event
+     (new rewind_from_longjmp_event
+      (&eedge, get_longjmp_call ()->location,
+       src_point.get_fndecl (),
+       src_stack_depth, this));
+   emission_path->add_event
+     (new rewind_to_setjmp_event
+      (&eedge, get_setjmp_call ()->location,
+       dst_point.get_fndecl (),
+       dst_stack_depth, this));
+ }
+ 
+ /* class exploded_edge : public dedge<eg_traits>.  */
+ 
+ /* exploded_edge's ctor.  */
+ 
+ exploded_edge::exploded_edge (exploded_node *src, exploded_node *dest,
+ 			      const extrinsic_state &ext_state,
+ 			      const superedge *sedge,
+ 			      const state_change &change,
+ 			      custom_info_t *custom_info)
+ : dedge<eg_traits> (src, dest), m_sedge (sedge), m_change (change),
+   m_custom_info (custom_info)
+ {
+   change.validate (dest->get_state (), ext_state);
+ }
+ 
+ /* exploded_edge's dtor.  */
+ 
+ exploded_edge::~exploded_edge ()
+ {
+   delete m_custom_info;
+ }
+ 
+ /* Implementation of dedge::dump_dot vfunc for exploded_edge.
+    Use the label of the underlying superedge, if any.  */
+ 
+ void
+ exploded_edge::dump_dot (graphviz_out *gv, const dump_args_t &args) const
+ {
+   pretty_printer *pp = gv->get_pp ();
+ 
+   const char *style = "\"solid,bold\"";
+   const char *color = "black";
+   int weight = 10;
+   const char *constraint = "true";
+ 
+   if (m_sedge)
+     switch (m_sedge->m_kind)
+       {
+       default:
+ 	gcc_unreachable ();
+       case SUPEREDGE_CFG_EDGE:
+ 	break;
+       case SUPEREDGE_CALL:
+ 	color = "red";
+ 	//constraint = "false";
+ 	break;
+       case SUPEREDGE_RETURN:
+ 	color = "green";
+ 	//constraint = "false";
+ 	break;
+       case SUPEREDGE_INTRAPROCEDURAL_CALL:
+ 	style = "\"dotted\"";
+ 	break;
+       }
+   if (m_custom_info)
+     {
+       color = "red";
+       style = "\"dotted\"";
+     }
+ 
+   m_src->dump_dot_id (pp);
+   pp_string (pp, " -> ");
+   m_dest->dump_dot_id (pp);
+   pp_printf (pp,
+ 	     (" [style=%s, color=%s, weight=%d, constraint=%s,"
+ 	      " headlabel=\""),
+ 	     style, color, weight, constraint);
+ 
+   if (m_sedge)
+     m_sedge->dump_label_to_pp (pp, false);
+   else if (m_custom_info)
+     m_custom_info->print (pp);
+ 
+   m_change.dump (pp, args.m_eg.get_ext_state ());
+   //pp_write_text_as_dot_label_to_stream (pp, /*for_record=*/false);
+ 
+   pp_printf (pp, "\"];\n");
+ }
+ 
+ /* struct stats.  */
+ 
+ /* stats' ctor.  */
+ 
+ stats::stats (int num_supernodes)
+ : m_node_reuse_count (0),
+   m_node_reuse_after_merge_count (0),
+   m_num_supernodes (num_supernodes)
+ {
+   for (int i = 0; i < NUM_POINT_KINDS; i++)
+     m_num_nodes[i] = 0;
+ }
+ 
+ /* Log these stats in multiline form to LOGGER.  */
+ 
+ void
+ stats::log (logger *logger) const
+ {
+   gcc_assert (logger);
+   for (int i = 0; i < NUM_POINT_KINDS; i++)
+     if (m_num_nodes[i] > 0)
+       logger->log ("m_num_nodes[%s]: %i",
+ 		   point_kind_to_string (static_cast <enum point_kind> (i)),
+ 		   m_num_nodes[i]);
+   logger->log ("m_node_reuse_count: %i", m_node_reuse_count);
+   logger->log ("m_node_reuse_after_merge_count: %i",
+ 	       m_node_reuse_after_merge_count);
+ }
+ 
+ /* Dump these stats in multiline form to OUT.  */
+ 
+ void
+ stats::dump (FILE *out) const
+ {
+   for (int i = 0; i < NUM_POINT_KINDS; i++)
+     if (m_num_nodes[i] > 0)
+       fprintf (out, "m_num_nodes[%s]: %i\n",
+ 	       point_kind_to_string (static_cast <enum point_kind> (i)),
+ 	       m_num_nodes[i]);
+   fprintf (out, "m_node_reuse_count: %i\n", m_node_reuse_count);
+   fprintf (out, "m_node_reuse_after_merge_count: %i\n",
+ 	   m_node_reuse_after_merge_count);
+ 
+   if (m_num_supernodes > 0)
+     fprintf (out, "PK_AFTER_SUPERNODE nodes per supernode: %.2f\n",
+ 	     (float)m_num_nodes[PK_AFTER_SUPERNODE] / (float)m_num_supernodes);
+ }
+ 
+ /* Return the total number of enodes recorded within this object.  */
+ 
+ int
+ stats::get_total_enodes () const
+ {
+   int result = 0;
+   for (int i = 0; i < NUM_POINT_KINDS; i++)
+     result += m_num_nodes[i];
+   return result;
+ }
+ 
+ /* strongly_connected_components's ctor.  Tarjan's SCC algorithm.  */
+ 
+ strongly_connected_components::
+ strongly_connected_components (const supergraph &sg, logger *logger)
+ : m_sg (sg), m_per_node (m_sg.num_nodes ())
+ {
+   LOG_SCOPE (logger);
+   auto_timevar tv (TV_ANALYZER_SCC);
+ 
+   for (int i = 0; i < m_sg.num_nodes (); i++)
+     m_per_node.quick_push (per_node_data ());
+ 
+   for (int i = 0; i < m_sg.num_nodes (); i++)
+     if (m_per_node[i].m_index == -1)
+       strong_connect (i);
+ 
+   if (0)
+     dump ();
+ }
+ 
+ /* Dump this object to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ strongly_connected_components::dump () const
+ {
+   for (int i = 0; i < m_sg.num_nodes (); i++)
+     {
+       const per_node_data &v = m_per_node[i];
+       fprintf (stderr, "SN %i: index: %i lowlink: %i on_stack: %i\n",
+ 	       i, v.m_index, v.m_lowlink, v.m_on_stack);
+     }
+ }
+ 
+ /* Subroutine of strongly_connected_components's ctor, part of Tarjan's
+    SCC algorithm.  */
+ 
+ void
+ strongly_connected_components::strong_connect (unsigned index)
+ {
+   supernode *v_snode = m_sg.get_node_by_index (index);
+ 
+   /* Set the depth index for v to the smallest unused index.  */
+   per_node_data *v = &m_per_node[index];
+   v->m_index = index;
+   v->m_lowlink = index;
+   m_stack.safe_push (index);
+   v->m_on_stack = true;
+   index++;
+ 
+   /* Consider successors of v.  */
+   unsigned i;
+   superedge *sedge;
+   FOR_EACH_VEC_ELT (v_snode->m_succs, i, sedge)
+     {
+       supernode *w_snode = sedge->m_dest;
+       per_node_data *w = &m_per_node[w_snode->m_index];
+       if (w->m_index == -1)
+ 	{
+ 	  /* Successor w has not yet been visited; recurse on it.  */
+ 	  strong_connect (w_snode->m_index);
+ 	  v->m_lowlink = MIN (v->m_lowlink, w->m_lowlink);
+ 	}
+       else if (w->m_on_stack)
+ 	{
+ 	  /* Successor w is in stack S and hence in the current SCC
+ 	     If w is not on stack, then (v, w) is a cross-edge in the DFS
+ 	     tree and must be ignored.  */
+ 	  v->m_lowlink = MIN (v->m_lowlink, w->m_index);
+ 	}
+     }
+ 
+   /* If v is a root node, pop the stack and generate an SCC.  */
+ 
+   if (v->m_lowlink == v->m_index)
+     {
+       per_node_data *w;
+       do {
+ 	int idx = m_stack.pop ();
+ 	w = &m_per_node[idx];
+ 	w->m_on_stack = false;
+       } while (w != v);
+     }
+ }
+ 
+ /* worklist's ctor.  */
+ 
+ worklist::worklist (const exploded_graph &eg, const analysis_plan &plan)
+ : m_scc (eg.get_supergraph (), eg.get_logger ()),
+   m_plan (plan),
+   m_queue (key_t (*this, NULL))
+ {
+ }
+ 
+ /* Return the number of nodes in the worklist.  */
+ 
+ unsigned
+ worklist::length () const
+ {
+   return m_queue.nodes ();
+ }
+ 
+ /* Return the next node in the worklist, removing it.  */
+ 
+ exploded_node *
+ worklist::take_next ()
+ {
+   return m_queue.extract_min ();
+ }
+ 
+ /* Return the next node in the worklist without removing it.  */
+ 
+ exploded_node *
+ worklist::peek_next ()
+ {
+   return m_queue.min ();
+ }
+ 
+ /* Add ENODE to the worklist.  */
+ 
+ void
+ worklist::add_node (exploded_node *enode)
+ {
+   gcc_assert (enode->get_status () == exploded_node::STATUS_WORKLIST);
+   m_queue.insert (key_t (*this, enode), enode);
+ }
+ 
+ /* Comparator for implementing worklist::key_t comparison operators.
+    Return negative if KA is before KB
+    Return positive if KA is after KB
+    Return 0 if they are equal.  */
+ 
+ int
+ worklist::key_t::cmp (const worklist::key_t &ka, const worklist::key_t &kb)
+ {
+   const program_point &point_a = ka.m_enode->get_point ();
+   const program_point &point_b = kb.m_enode->get_point ();
+   const call_string &call_string_a = point_a.get_call_string ();
+   const call_string &call_string_b = point_b.get_call_string ();
+ 
+   /* Order empty-callstring points with different functions based on the
+      analysis_plan, so that we generate summaries before they are used.  */
+   if (flag_analyzer_call_summaries
+       && call_string_a.empty_p ()
+       && call_string_b.empty_p ()
+       && point_a.get_function () != NULL
+       && point_b.get_function () != NULL
+       && point_a.get_function () != point_b.get_function ())
+     {
+       return ka.m_worklist.m_plan.cmp_function (point_a.get_function (),
+ 						point_b.get_function ());
+     }
+ 
+   /* First, order by SCC.  */
+   int scc_id_a = ka.get_scc_id (ka.m_enode);
+   int scc_id_b = kb.get_scc_id (kb.m_enode);
+   if (scc_id_a != scc_id_b)
+     return scc_id_a - scc_id_b;
+ 
+   /* If in same SCC, order by supernode index (an arbitrary but stable
+      ordering).  */
+   const supernode *snode_a = ka.m_enode->get_supernode ();
+   const supernode *snode_b = kb.m_enode->get_supernode ();
+   if (snode_a == NULL)
+     {
+       if (snode_b != NULL)
+ 	/* One is NULL.  */
+ 	return -1;
+       else
+ 	/* Both are NULL.  */
+ 	return 0;
+     }
+   if (snode_b == NULL)
+     /* One is NULL.  */
+     return 1;
+   /* Neither are NULL.  */
+   gcc_assert (snode_a && snode_b);
+   if (snode_a->m_index != snode_b->m_index)
+     return snode_a->m_index - snode_b->m_index;
+ 
+   gcc_assert (snode_a == snode_b);
+ 
+   /* Order within supernode via program point.  */
+   int within_snode_cmp
+     = function_point::cmp_within_supernode (point_a.get_function_point (),
+ 					    point_b.get_function_point ());
+   if (within_snode_cmp)
+     return within_snode_cmp;
+ 
+   /* The points might vary by callstring; try sorting by callstring.  */
+   int cs_cmp = call_string::cmp (call_string_a, call_string_b);
+   if (cs_cmp)
+     return cs_cmp;
+ 
+   /* Otherwise, we ought to have the same program_point.  */
+   gcc_assert (point_a == point_b);
+ 
+   const program_state &state_a = ka.m_enode->get_state ();
+   const program_state &state_b = kb.m_enode->get_state ();
+ 
+   /* Sort by sm-state, so that identical sm-states are grouped
+      together in the worklist.
+      For now, sort by the hash value (might not be deterministic).  */
+   for (unsigned sm_idx = 0; sm_idx < state_a.m_checker_states.length ();
+        ++sm_idx)
+     {
+       sm_state_map *smap_a = state_a.m_checker_states[sm_idx];
+       sm_state_map *smap_b = state_b.m_checker_states[sm_idx];
+ 
+       hashval_t hash_a = smap_a->hash ();
+       hashval_t hash_b = smap_b->hash ();
+       if (hash_a < hash_b)
+ 	return -1;
+       else if (hash_a > hash_b)
+ 	return 1;
+     }
+ 
+   /* Otherwise, we have two enodes at the same program point but with
+      different states.  We don't have a good total ordering on states,
+      so order them by enode index, so that we have at least have a
+      stable sort.  */
+   return ka.m_enode->m_index - kb.m_enode->m_index;
+ }
+ 
+ /* exploded_graph's ctor.  */
+ 
+ exploded_graph::exploded_graph (const supergraph &sg, logger *logger,
+ 				const extrinsic_state &ext_state,
+ 				const state_purge_map *purge_map,
+ 				const analysis_plan &plan,
+ 				int verbosity)
+ : m_sg (sg), m_logger (logger),
+   m_worklist (*this, plan),
+   m_ext_state (ext_state),
+   m_purge_map (purge_map),
+   m_plan (plan),
+   m_diagnostic_manager (logger, verbosity),
+   m_global_stats (m_sg.num_nodes ()),
+   m_functionless_stats (m_sg.num_nodes ()),
+   m_PK_AFTER_SUPERNODE_per_snode (m_sg.num_nodes ())
+ {
+   m_origin = get_or_create_node (program_point (function_point (NULL, NULL,
+ 								0, PK_ORIGIN),
+ 						call_string ()),
+ 				 program_state (ext_state), NULL);
+   for (int i = 0; i < m_sg.num_nodes (); i++)
+     m_PK_AFTER_SUPERNODE_per_snode.quick_push (i);
+ }
+ 
+ /* exploded_graph's dtor.  */
+ 
+ exploded_graph::~exploded_graph ()
+ {
+   for (function_stat_map_t::iterator iter = m_per_function_stats.begin ();
+        iter != m_per_function_stats.end ();
+        ++iter)
+     delete (*iter).second;
+ 
+   for (point_map_t::iterator iter = m_per_point_data.begin ();
+        iter != m_per_point_data.end ();
+        ++iter)
+     delete (*iter).second;
+ }
+ 
+ /* Ensure that there is an exploded_node representing an external call to
+    FUN, adding it to the worklist if creating it.
+ 
+    Add an edge from the origin exploded_node to the function entrypoint
+    exploded_node.
+ 
+    Return the exploded_node for the entrypoint to the function.  */
+ 
+ exploded_node *
+ exploded_graph::add_function_entry (function *fun)
+ {
+   program_point point = program_point::from_function_entry (m_sg, fun);
+   program_state state (m_ext_state);
+   impl_region_model_context ctxt (&state, NULL, m_ext_state, get_logger ());
+   state.m_region_model->push_frame (fun, NULL, &ctxt);
+ 
+   if (!state.m_valid)
+     return NULL;
+ 
+   exploded_node *enode = get_or_create_node (point, state, NULL);
+   /* We should never fail to add such a node.  */
+   gcc_assert (enode);
+   state_change change;
+   add_edge (m_origin, enode, NULL, change);
+   return enode;
+ }
+ 
+ /* Get or create an exploded_node for (POINT, STATE).
+    If a new node is created, it is added to the worklist.
+    If CHANGE is non-NULL, use it to suppress some purging of state,
+    to make generation of state_change_event instances easier.  */
+ 
+ exploded_node *
+ exploded_graph::get_or_create_node (const program_point &point,
+ 				    const program_state &state,
+ 				    state_change *change)
+ {
+   logger * const logger = get_logger ();
+   LOG_FUNC (logger);
+   if (logger)
+     {
+       format f (false);
+       pretty_printer *pp = logger->get_printer ();
+       logger->start_log_line ();
+       pp_string (pp, "point: ");
+       point.print (pp, f);
+       logger->end_log_line ();
+       logger->start_log_line ();
+       pp_string (pp, "state: ");
+       state.dump_to_pp (m_ext_state, true, pp);
+       logger->end_log_line ();
+     }
+ 
+   /* Stop exploring paths for which we don't know how to effectively
+      model the state.  */
+   if (!state.m_valid)
+     {
+       if (logger)
+ 	logger->log ("invalid state; not creating node");
+       return NULL;
+     }
+ 
+   auto_cfun sentinel (point.get_function ());
+ 
+   state.validate (get_ext_state ());
+ 
+   //state.dump (get_ext_state ());
+ 
+   /* Prune state to try to improve the chances of a cache hit,
+      avoiding generating redundant nodes.  */
+   program_state pruned_state = state.prune_for_point (*this, point, change);
+ 
+   pruned_state.validate (get_ext_state ());
+ 
+   //pruned_state.dump (get_ext_state ());
+ 
+   if (logger)
+     {
+       pretty_printer *pp = logger->get_printer ();
+       logger->start_log_line ();
+       pp_string (pp, "pruned_state: ");
+       pruned_state.dump_to_pp (m_ext_state, true, pp);
+       logger->end_log_line ();
+       pruned_state.m_region_model->dump_to_pp (logger->get_printer (), true);
+     }
+ 
+   stats *per_fn_stats = get_or_create_function_stats (point.get_function ());
+ 
+   stats *per_cs_stats
+     = &get_or_create_per_call_string_data (point.get_call_string ())->m_stats;
+ 
+   point_and_state ps (point, pruned_state);
+   ps.validate (m_ext_state);
+   if (exploded_node **slot = m_point_and_state_to_node.get (&ps))
+     {
+       /* An exploded_node for PS already exists.  */
+       if (logger)
+ 	logger->log ("reused EN: %i", (*slot)->m_index);
+       m_global_stats.m_node_reuse_count++;
+       per_fn_stats->m_node_reuse_count++;
+       per_cs_stats->m_node_reuse_count++;
+       return *slot;
+     }
+ 
+   per_program_point_data *per_point_data
+     = get_or_create_per_program_point_data (point);
+ 
+   /* Consider merging state with another enode at this program_point.  */
+   if (flag_analyzer_state_merge)
+     {
+       exploded_node *existing_enode;
+       unsigned i;
+       FOR_EACH_VEC_ELT (per_point_data->m_enodes, i, existing_enode)
+ 	{
+ 	  if (logger)
+ 	    logger->log ("considering merging with existing EN: %i for point",
+ 			 existing_enode->m_index);
+ 	  gcc_assert (existing_enode->get_point () == point);
+ 	  const program_state &existing_state = existing_enode->get_state ();
+ 
+ 	  /* This merges successfully within the loop.  */
+ 
+ 	  program_state merged_state (m_ext_state);
+ 	  if (pruned_state.can_merge_with_p (existing_state, m_ext_state,
+ 					     &merged_state))
+ 	    {
+ 	      if (logger)
+ 		logger->log ("merging new state with that of EN: %i",
+ 			     existing_enode->m_index);
+ 
+ 	      /* Try again for a cache hit.
+ 		 Whether we get one or not, merged_state's value_ids have no
+ 		 relationship to those of the input state, and thus to those
+ 		 of CHANGE, so we must purge any svalue_ids from *CHANGE.  */
+ 	      ps.set_state (merged_state);
+ 	      if (change)
+ 		change->on_svalue_purge (svalue_id::from_int (0));
+ 
+ 	      if (exploded_node **slot = m_point_and_state_to_node.get (&ps))
+ 		{
+ 		  /* An exploded_node for PS already exists.  */
+ 		  if (logger)
+ 		    logger->log ("reused EN: %i", (*slot)->m_index);
+ 		  m_global_stats.m_node_reuse_after_merge_count++;
+ 		  per_fn_stats->m_node_reuse_after_merge_count++;
+ 		  per_cs_stats->m_node_reuse_after_merge_count++;
+ 		  return *slot;
+ 		}
+ 	    }
+ 	  else
+ 	    if (logger)
+ 	      logger->log ("not merging new state with that of EN: %i",
+ 			   existing_enode->m_index);
+ 	}
+     }
+ 
+   /* Impose a limit on the number of enodes per program point, and
+      simply stop if we exceed it.  */
+   if ((int)per_point_data->m_enodes.length ()
+       > param_analyzer_max_enodes_per_program_point)
+     {
+       if (logger)
+ 	logger->log ("not creating enode; too many at program point");
+       warning_at (point.get_location (), OPT_Wanalyzer_too_complex,
+ 		  "terminating analysis for this program point");
+       per_point_data->m_excess_enodes++;
+       return NULL;
+     }
+ 
+   ps.validate (m_ext_state);
+ 
+   /* An exploded_node for "ps" doesn't already exist; create one.  */
+   exploded_node *node = new exploded_node (ps, m_nodes.length ());
+   add_node (node);
+   m_point_and_state_to_node.put (node->get_ps_key (), node);
+ 
+   /* Update per-program_point data.  */
+   per_point_data->m_enodes.safe_push (node);
+ 
+   const enum point_kind node_pk = node->get_point ().get_kind ();
+   m_global_stats.m_num_nodes[node_pk]++;
+   per_fn_stats->m_num_nodes[node_pk]++;
+   per_cs_stats->m_num_nodes[node_pk]++;
+ 
+   if (node_pk == PK_AFTER_SUPERNODE)
+     m_PK_AFTER_SUPERNODE_per_snode[point.get_supernode ()->m_index]++;
+ 
+   if (logger)
+     {
+       format f (false);
+       pretty_printer *pp = logger->get_printer ();
+       logger->log ("created EN: %i", node->m_index);
+       logger->start_log_line ();
+       pp_string (pp, "point: ");
+       point.print (pp, f);
+       logger->end_log_line ();
+       logger->start_log_line ();
+       pp_string (pp, "pruned_state: ");
+       pruned_state.dump_to_pp (m_ext_state, true, pp);
+       logger->end_log_line ();
+     }
+ 
+   /* Add the new node to the worlist.  */
+   m_worklist.add_node (node);
+   return node;
+ }
+ 
+ /* Add an exploded_edge from SRC to DEST, recording its association
+    with SEDGE (which may be NULL), and, if non-NULL, taking ownership
+    of REWIND_INFO.
+    Return the newly-created eedge.  */
+ 
+ exploded_edge *
+ exploded_graph::add_edge (exploded_node *src, exploded_node *dest,
+ 			  const superedge *sedge,
+ 			  const state_change &change,
+ 			  exploded_edge::custom_info_t *custom_info)
+ {
+   exploded_edge *e = new exploded_edge (src, dest, m_ext_state,
+ 					sedge, change, custom_info);
+   digraph<eg_traits>::add_edge (e);
+   return e;
+ }
+ 
+ /* Ensure that this graph has per-program_point-data for POINT;
+    borrow a pointer to it.  */
+ 
+ per_program_point_data *
+ exploded_graph::
+ get_or_create_per_program_point_data (const program_point &point)
+ {
+   if (per_program_point_data **slot = m_per_point_data.get (&point))
+     return *slot;
+ 
+   per_program_point_data *per_point_data = new per_program_point_data (point);
+   m_per_point_data.put (&per_point_data->m_key, per_point_data);
+   return per_point_data;
+ }
+ 
+ /* Ensure that this graph has per-call_string-data for CS;
+    borrow a pointer to it.  */
+ 
+ per_call_string_data *
+ exploded_graph::get_or_create_per_call_string_data (const call_string &cs)
+ {
+   if (per_call_string_data **slot = m_per_call_string_data.get (&cs))
+     return *slot;
+ 
+   per_call_string_data *data = new per_call_string_data (cs, m_sg.num_nodes ());
+   m_per_call_string_data.put (&data->m_key,
+ 			      data);
+   return data;
+ }
+ 
+ /* Ensure that this graph has per-function-data for FUN;
+    borrow a pointer to it.  */
+ 
+ per_function_data *
+ exploded_graph::get_or_create_per_function_data (function *fun)
+ {
+   if (per_function_data **slot = m_per_function_data.get (fun))
+     return *slot;
+ 
+   per_function_data *data = new per_function_data ();
+   m_per_function_data.put (fun, data);
+   return data;
+ }
+ 
+ /* Get this graph's per-function-data for FUN if there is any,
+    otherwise NULL.  */
+ 
+ per_function_data *
+ exploded_graph::get_per_function_data (function *fun) const
+ {
+   if (per_function_data **slot
+         = const_cast <per_function_data_t &> (m_per_function_data).get (fun))
+     return *slot;
+ 
+   return NULL;
+ }
+ 
+ /* Return true if NODE and FUN should be traversed directly, rather than
+    called via other functions.  */
+ 
+ static bool
+ toplevel_function_p (cgraph_node *node, function *fun, logger *logger)
+ {
+   /* TODO: better logic here
+      e.g. only if more than one caller, and significantly complicated.
+      Perhaps some whole-callgraph analysis to decide if it's worth summarizing
+      an edge, and if so, we need summaries.  */
+   if (flag_analyzer_call_summaries)
+     {
+       int num_call_sites = 0;
+       for (cgraph_edge *edge = node->callers; edge; edge = edge->next_caller)
+ 	++num_call_sites;
+ 
+       /* For now, if there's more than one in-edge, and we want call
+ 	 summaries, do it at the top level so that there's a chance
+ 	 we'll have a summary when we need one.  */
+       if (num_call_sites > 1)
+ 	{
+ 	  if (logger)
+ 	    logger->log ("traversing %qE (%i call sites)",
+ 			 fun->decl, num_call_sites);
+ 	  return true;
+ 	}
+     }
+ 
+   if (!TREE_PUBLIC (fun->decl))
+     {
+       if (logger)
+ 	logger->log ("not traversing %qE (static)", fun->decl);
+       return false;
+     }
+ 
+   if (logger)
+     logger->log ("traversing %qE (all checks passed)", fun->decl);
+ 
+   return true;
+ }
+ 
+ /* Add initial nodes to EG, with entrypoints for externally-callable
+    functions.  */
+ 
+ void
+ exploded_graph::build_initial_worklist ()
+ {
+   logger * const logger = get_logger ();
+   LOG_SCOPE (logger);
+ 
+   cgraph_node *node;
+   FOR_EACH_FUNCTION_WITH_GIMPLE_BODY (node)
+   {
+     function *fun = node->get_fun ();
+     if (!toplevel_function_p (node, fun, logger))
+       continue;
+     exploded_node *enode = add_function_entry (fun);
+     if (logger)
+       {
+ 	if (enode)
+ 	  logger->log ("created EN %i for %qE entrypoint",
+ 		       enode->m_index, fun->decl);
+ 	else
+ 	  logger->log ("did not create enode for %qE entrypoint", fun->decl);
+       }
+   }
+ }
+ 
+ /* The main loop of the analysis.
+    Take freshly-created exploded_nodes from the worklist, calling
+    process_node on them to explore the <point, state> graph.
+    Add edges to their successors, potentially creating new successors
+    (which are also added to the worklist).  */
+ 
+ void
+ exploded_graph::process_worklist ()
+ {
+   logger * const logger = get_logger ();
+   LOG_SCOPE (logger);
+   auto_timevar tv (TV_ANALYZER_WORKLIST);
+ 
+   while (m_worklist.length () > 0)
+     {
+       exploded_node *node = m_worklist.take_next ();
+       gcc_assert (node->get_status () == exploded_node::STATUS_WORKLIST);
+       gcc_assert (node->m_succs.length () == 0
+ 		  || node == m_origin);
+ 
+       if (logger)
+ 	logger->log ("next to process: EN: %i", node->m_index);
+ 
+       /* Avoid exponential explosions of nodes by attempting to merge
+ 	 nodes that are at the same program point and which have
+ 	 sufficiently similar state.  */
+       if (flag_analyzer_state_merge && node != m_origin)
+ 	if (exploded_node *node_2 = m_worklist.peek_next ())
+ 	  {
+ 	    gcc_assert (node_2->get_status ()
+ 			== exploded_node::STATUS_WORKLIST);
+ 	    gcc_assert (node->m_succs.length () == 0);
+ 	    gcc_assert (node_2->m_succs.length () == 0);
+ 
+ 	    gcc_assert (node != node_2);
+ 
+ 	    if (logger)
+ 	      logger->log ("peek worklist: EN: %i", node_2->m_index);
+ 
+ 	    if (node->get_point () == node_2->get_point ())
+ 	      {
+ 		if (logger)
+ 		  {
+ 		    format f (false);
+ 		    pretty_printer *pp = logger->get_printer ();
+ 		    logger->start_log_line ();
+ 		    logger->log_partial
+ 		      ("got potential merge EN: %i and EN: %i at ",
+ 		       node->m_index, node_2->m_index);
+ 		    node->get_point ().print (pp, f);
+ 		    logger->end_log_line ();
+ 		  }
+ 
+ 		const program_state &state = node->get_state ();
+ 		const program_state &state_2 = node_2->get_state ();
+ 
+ 		/* They shouldn't be equal, or we wouldn't have two
+ 		   separate nodes.  */
+ 		gcc_assert (state != state_2);
+ 
+ 		program_state merged_state (m_ext_state);
+ 		state_change change;
+ 		if (state.can_merge_with_p (state_2, m_ext_state,
+ 					    &merged_state))
+ 		  {
+ 		    if (logger)
+ 		      logger->log ("merging EN: %i and EN: %i",
+ 				   node->m_index, node_2->m_index);
+ 
+ 		    if (merged_state == state)
+ 		      {
+ 			/* Then merge node_2 into node by adding an edge.  */
+ 			add_edge (node_2, node, NULL, change);
+ 
+ 			/* Remove node_2 from the worklist.  */
+ 			m_worklist.take_next ();
+ 			node_2->set_status (exploded_node::STATUS_MERGER);
+ 
+ 			/* Continue processing "node" below.  */
+ 		      }
+ 		    else if (merged_state == state_2)
+ 		      {
+ 			/* Then merge node into node_2, and leave node_2
+ 			   in the worklist, to be processed on the next
+ 			   iteration.  */
+ 			add_edge (node, node_2, NULL, change);
+ 			node->set_status (exploded_node::STATUS_MERGER);
+ 			continue;
+ 		      }
+ 		    else
+ 		      {
+ 			/* We have a merged state that differs from
+ 			   both state and state_2.  */
+ 
+ 			/* Remove node_2 from the worklist.  */
+ 			m_worklist.take_next ();
+ 
+ 			/* Create (or get) an exploded node for the merged
+ 			   states, adding to the worklist.  */
+ 			exploded_node *merged_enode
+ 			  = get_or_create_node (node->get_point (),
+ 						merged_state, &change);
+ 			if (merged_enode == NULL)
+ 			  continue;
+ 
+ 			if (logger)
+ 			  logger->log ("merged EN: %i and EN: %i into EN: %i",
+ 				       node->m_index, node_2->m_index,
+ 				       merged_enode->m_index);
+ 
+ 			/* "node" and "node_2" have both now been removed
+ 			   from the worklist; we should not process them.
+ 
+ 			   "merged_enode" may be a new node; if so it will be
+ 			   processed in a subsequent iteration.
+ 			   Alternatively, "merged_enode" could be an existing
+ 			   node; one way the latter can
+ 			   happen is if we end up merging a succession of
+ 			   similar nodes into one.  */
+ 
+ 			/* If merged_node is one of the two we were merging,
+ 			   add it back to the worklist to ensure it gets
+ 			   processed.
+ 
+ 			   Add edges from the merged nodes to it (but not a
+ 			   self-edge).  */
+ 			if (merged_enode == node)
+ 			  m_worklist.add_node (merged_enode);
+ 			else
+ 			  {
+ 			    add_edge (node, merged_enode, NULL, change);
+ 			    node->set_status (exploded_node::STATUS_MERGER);
+ 			  }
+ 
+ 			if (merged_enode == node_2)
+ 			  m_worklist.add_node (merged_enode);
+ 			else
+ 			  {
+ 			    add_edge (node_2, merged_enode, NULL, change);
+ 			    node_2->set_status (exploded_node::STATUS_MERGER);
+ 			  }
+ 
+ 			continue;
+ 		      }
+ 		  }
+ 
+ 		/* TODO: should we attempt more than two nodes,
+ 		   or just do pairs of nodes?  (and hope that we get
+ 		   a cascade of mergers).  */
+ 	      }
+ 	}
+ 
+       process_node (node);
+ 
+       /* Impose a hard limit on the number of exploded nodes, to ensure
+ 	 that the analysis terminates in the face of pathological state
+ 	 explosion (or bugs).
+ 
+ 	 Specifically, the limit is on the number of PK_AFTER_SUPERNODE
+ 	 exploded nodes, looking at supernode exit events.
+ 
+ 	 We use exit rather than entry since there can be multiple
+ 	 entry ENs, one per phi; the number of PK_AFTER_SUPERNODE ought
+ 	 to be equivalent to the number of supernodes multiplied by the
+ 	 number of states.  */
+       const int limit = m_sg.num_nodes () * param_analyzer_bb_explosion_factor;
+       if (m_global_stats.m_num_nodes[PK_AFTER_SUPERNODE] > limit)
+ 	{
+ 	  if (logger)
+ 	    logger->log ("bailing out; too many nodes");
+ 	  warning_at (node->get_point ().get_location (),
+ 		      OPT_Wanalyzer_too_complex,
+ 		      "analysis bailed out early"
+ 		      " (%i 'after-snode' enodes; %i enodes)",
+ 		      m_global_stats.m_num_nodes[PK_AFTER_SUPERNODE],
+ 		      m_nodes.length ());
+ 	  return;
+ 	}
+     }
+ }
+ 
+ /* Return true if STMT must appear at the start of its exploded node, and
+    thus we can't consolidate its effects within a run of other statements,
+    where PREV_STMT was the previous statement.  */
+ 
+ static bool
+ stmt_requires_new_enode_p (const gimple *stmt,
+ 			   const gimple *prev_stmt)
+ {
+   /* Stop consolidating at calls to
+      "__analyzer_dump_exploded_nodes", so they always appear at the
+      start of an exploded_node.  */
+   if (const gcall *call = dyn_cast <const gcall *> (stmt))
+     if (is_special_named_call_p (call, "__analyzer_dump_exploded_nodes",
+ 			 1))
+       return true;
+ 
+   /* If we had a PREV_STMT with an unknown location, and this stmt
+      has a known location, then if a state change happens here, it
+      could be consolidated into PREV_STMT, giving us an event with
+      no location.  Ensure that STMT gets its own exploded_node to
+      avoid this.  */
+   if (get_pure_location (prev_stmt->location) == UNKNOWN_LOCATION
+       && get_pure_location (stmt->location) != UNKNOWN_LOCATION)
+     return true;
+ 
+   return false;
+ }
+ 
+ /* The core of exploded_graph::process_worklist (the main analysis loop),
+    handling one node in the worklist.
+ 
+    Get successor <point, state> pairs for NODE, calling get_or_create on
+    them, and adding an exploded_edge to each successors.
+ 
+    Freshly-created nodes will be added to the worklist.  */
+ 
+ void
+ exploded_graph::process_node (exploded_node *node)
+ {
+   logger * const logger = get_logger ();
+   LOG_FUNC_1 (logger, "EN: %i", node->m_index);
+ 
+   node->set_status (exploded_node::STATUS_PROCESSED);
+ 
+   const program_point &point = node->get_point ();
+ 
+   /* Update cfun and input_location in case of an ICE: make it easier to
+      track down which source construct we're failing to handle.  */
+   auto_cfun sentinel (node->get_function ());
+   const gimple *stmt = point.get_stmt ();
+   if (stmt)
+     input_location = stmt->location;
+ 
+   const program_state &state = node->get_state ();
+   if (logger)
+     {
+       pretty_printer *pp = logger->get_printer ();
+       logger->start_log_line ();
+       pp_string (pp, "point: ");
+       point.print (pp, format (false));
+       pp_string (pp, ", state: ");
+       state.dump_to_pp (m_ext_state, true, pp);
+       logger->end_log_line ();
+     }
+ 
+   switch (point.get_kind ())
+     {
+     default:
+       gcc_unreachable ();
+     case PK_ORIGIN:
+       /* This node exists to simplify finding the shortest path
+ 	 to an exploded_node.  */
+       break;
+ 
+     case PK_BEFORE_SUPERNODE:
+       {
+ 	program_state next_state (state);
+ 	state_change change;
+ 
+ 	if (point.get_from_edge ())
+ 	  {
+ 	    impl_region_model_context ctxt (*this, node,
+ 					    &state, &next_state, &change,
+ 					    NULL);
+ 	    const cfg_superedge *last_cfg_superedge
+ 	      = point.get_from_edge ()->dyn_cast_cfg_superedge ();
+ 	    if (last_cfg_superedge)
+ 	      next_state.m_region_model->update_for_phis
+ 		(node->get_supernode (),
+ 		 last_cfg_superedge,
+ 		 &ctxt);
+ 	  }
+ 
+ 	if (point.get_supernode ()->m_stmts.length () > 0)
+ 	  {
+ 	    program_point next_point
+ 	      = program_point::before_stmt (point.get_supernode (), 0,
+ 					    point.get_call_string ());
+ 	    exploded_node *next
+ 	      = get_or_create_node (next_point, next_state, &change);
+ 	    if (next)
+ 	      add_edge (node, next, NULL, change);
+ 	  }
+ 	else
+ 	  {
+ 	    program_point next_point
+ 	      = program_point::after_supernode (point.get_supernode (),
+ 						point.get_call_string ());
+ 	    exploded_node *next = get_or_create_node (next_point, next_state,
+ 						      &change);
+ 	    if (next)
+ 	      add_edge (node, next, NULL, change);
+ 	  }
+       }
+       break;
+     case PK_BEFORE_STMT:
+       {
+ 	/* Determine the effect of a run of one or more statements
+ 	   within one supernode, generating an edge to the program_point
+ 	   after the last statement that's processed.
+ 
+ 	   Stop iterating statements and thus consolidating into one enode
+ 	   when:
+ 	   - reaching the end of the statements in the supernode
+ 	   - if an sm-state-change occurs (so that it gets its own
+ 	     exploded_node)
+ 	   - if "-fanalyzer-fine-grained" is active
+ 	   - encountering certain statements must appear at the start of
+ 	   their enode (for which stmt_requires_new_enode_p returns true)
+ 
+ 	   Update next_state in-place, to get the result of the one
+ 	   or more stmts that are processed.  */
+ 	program_state next_state (state);
+ 	state_change change;
+ 	const supernode *snode = point.get_supernode ();
+ 	unsigned stmt_idx;
+ 	const gimple *prev_stmt = NULL;
+ 	for (stmt_idx = point.get_stmt_idx ();
+ 	     stmt_idx < snode->m_stmts.length ();
+ 	     stmt_idx++)
+ 	  {
+ 	    const gimple *stmt = snode->m_stmts[stmt_idx];
+ 
+ 	    if (stmt_idx > point.get_stmt_idx ())
+ 	      if (stmt_requires_new_enode_p (stmt, prev_stmt))
+ 		{
+ 		  stmt_idx--;
+ 		  break;
+ 		}
+ 	    prev_stmt = stmt;
+ 
+ 	    /* Process the stmt.  */
+ 	    exploded_node::on_stmt_flags flags
+ 	      = node->on_stmt (*this, snode, stmt, &next_state, &change);
+ 
+ 	    /* If flags.m_terminate_path, stop analyzing; any nodes/edges
+ 	       will have been added by on_stmt (e.g. for handling longjmp).  */
+ 	    if (flags.m_terminate_path)
+ 	      return;
+ 
+ 	    if (flags.m_sm_changes || flag_analyzer_fine_grained)
+ 	      break;
+ 	  }
+ 	unsigned next_idx = stmt_idx + 1;
+ 	program_point next_point
+ 	  = (next_idx < point.get_supernode ()->m_stmts.length ()
+ 	     ? program_point::before_stmt (point.get_supernode (), next_idx,
+ 					   point.get_call_string ())
+ 	     : program_point::after_supernode (point.get_supernode (),
+ 					       point.get_call_string ()));
+ 	exploded_node *next = get_or_create_node (next_point,
+ 						  next_state, &change);
+ 	if (next)
+ 	  add_edge (node, next, NULL, change);
+       }
+       break;
+     case PK_AFTER_SUPERNODE:
+       {
+ 	/* If this is an EXIT BB, detect leaks, and potentially
+ 	   create a function summary.  */
+ 	if (point.get_supernode ()->return_p ())
+ 	  {
+ 	    node->detect_leaks (*this);
+ 	    if (flag_analyzer_call_summaries
+ 		&& point.get_call_string ().empty_p ())
+ 	      {
+ 		/* TODO: create function summary
+ 		   There can be more than one; each corresponds to a different
+ 		   final enode in the function.  */
+ 		if (logger)
+ 		  {
+ 		    pretty_printer *pp = logger->get_printer ();
+ 		    logger->start_log_line ();
+ 		    logger->log_partial
+ 		      ("would create function summary for %qE; state: ",
+ 		       point.get_fndecl ());
+ 		    state.dump_to_pp (m_ext_state, true, pp);
+ 		    logger->end_log_line ();
+ 		  }
+ 		per_function_data *per_fn_data
+ 		  = get_or_create_per_function_data (point.get_function ());
+ 		per_fn_data->add_call_summary (node);
+ 	      }
+ 	  }
+ 	/* Traverse into successors of the supernode.  */
+ 	int i;
+ 	superedge *succ;
+ 	FOR_EACH_VEC_ELT (point.get_supernode ()->m_succs, i, succ)
+ 	  {
+ 	    if (logger)
+ 	      logger->log ("considering SN: %i -> SN: %i",
+ 			   succ->m_src->m_index, succ->m_dest->m_index);
+ 
+ 	    state_change change;
+ 
+ 	    program_point next_point
+ 	      = program_point::before_supernode (succ->m_dest, succ,
+ 						 point.get_call_string ());
+ 	    program_state next_state (state);
+ 
+ 	    if (!node->on_edge (*this, succ, &next_point, &next_state, &change))
+ 	      {
+ 		if (logger)
+ 		  logger->log ("skipping impossible edge to SN: %i",
+ 			       succ->m_dest->m_index);
+ 		continue;
+ 	      }
+ 
+ 	    exploded_node *next = get_or_create_node (next_point, next_state,
+ 						      &change);
+ 	    if (next)
+ 	      add_edge (node, next, succ, change);
+ 	  }
+       }
+       break;
+     }
+ }
+ 
+ /* Ensure that this graph has a stats instance for FN, return it.
+    FN can be NULL, in which case a stats instances is returned covering
+    "functionless" parts of the graph (the origin node).  */
+ 
+ stats *
+ exploded_graph::get_or_create_function_stats (function *fn)
+ {
+   if (!fn)
+     return &m_functionless_stats;
+ 
+   if (stats **slot = m_per_function_stats.get (fn))
+     return *slot;
+   else
+     {
+       int num_supernodes = fn ? n_basic_blocks_for_fn (fn) : 0;
+       /* not quite the num supernodes, but nearly.  */
+       stats *new_stats = new stats (num_supernodes);
+       m_per_function_stats.put (fn, new_stats);
+       return new_stats;
+     }
+ }
+ 
+ /* Print bar charts to PP showing:
+    - the number of enodes per function, and
+    - for each function:
+      - the number of enodes per supernode/BB
+      - the number of excess enodes per supernode/BB beyond the
+        per-program-point limit, if there were any.  */
+ 
+ void
+ exploded_graph::print_bar_charts (pretty_printer *pp) const
+ {
+   cgraph_node *cgnode;
+ 
+   pp_string (pp, "enodes per function:");
+   pp_newline (pp);
+   bar_chart enodes_per_function;
+   FOR_EACH_FUNCTION_WITH_GIMPLE_BODY (cgnode)
+     {
+       function *fn = cgnode->get_fun ();
+       const stats * const *s_ptr
+ 	= const_cast <function_stat_map_t &> (m_per_function_stats).get (fn);
+       enodes_per_function.add_item (function_name (fn),
+ 				    s_ptr ? (*s_ptr)->get_total_enodes () : 0);
+     }
+   enodes_per_function.print (pp);
+ 
+   /* Accumulate number of enodes per supernode.  */
+   auto_vec<unsigned> enodes_per_supernode (m_sg.num_nodes ());
+   for (int i = 0; i < m_sg.num_nodes (); i++)
+     enodes_per_supernode.quick_push (0);
+   int i;
+   exploded_node *enode;
+   FOR_EACH_VEC_ELT (m_nodes, i, enode)
+     {
+       const supernode *iter_snode = enode->get_supernode ();
+       if (!iter_snode)
+ 	continue;
+       enodes_per_supernode[iter_snode->m_index]++;
+     }
+ 
+   /* Accumulate excess enodes per supernode.  */
+   auto_vec<unsigned> excess_enodes_per_supernode (m_sg.num_nodes ());
+   for (int i = 0; i < m_sg.num_nodes (); i++)
+     excess_enodes_per_supernode.quick_push (0);
+   for (point_map_t::iterator iter = m_per_point_data.begin ();
+        iter != m_per_point_data.end (); ++iter)
+     {
+       const program_point *point = (*iter).first;
+       const supernode *iter_snode = point->get_supernode ();
+       if (!iter_snode)
+ 	continue;
+       const per_program_point_data *point_data = (*iter).second;
+       excess_enodes_per_supernode[iter_snode->m_index]
+ 	+= point_data->m_excess_enodes;
+     }
+ 
+   /* Show per-function bar_charts of enodes per supernode/BB.  */
+   pp_string (pp, "per-function enodes per supernode/BB:");
+   pp_newline (pp);
+   FOR_EACH_FUNCTION_WITH_GIMPLE_BODY (cgnode)
+     {
+       function *fn = cgnode->get_fun ();
+       pp_printf (pp, "function: %qs", function_name (fn));
+       pp_newline (pp);
+ 
+       bar_chart enodes_per_snode;
+       bar_chart excess_enodes_per_snode;
+       bool have_excess_enodes = false;
+       for (int i = 0; i < m_sg.num_nodes (); i++)
+ 	{
+ 	  const supernode *iter_snode = m_sg.get_node_by_index (i);
+ 	  if (iter_snode->get_function () != fn)
+ 	    continue;
+ 	  pretty_printer tmp_pp;
+ 	  pp_printf (&tmp_pp, "sn %i (bb %i)",
+ 		     iter_snode->m_index, iter_snode->m_bb->index);
+ 	  enodes_per_snode.add_item (pp_formatted_text (&tmp_pp),
+ 				     enodes_per_supernode[iter_snode->m_index]);
+ 	  const int num_excess
+ 	    = excess_enodes_per_supernode[iter_snode->m_index];
+ 	  excess_enodes_per_snode.add_item (pp_formatted_text (&tmp_pp),
+ 					    num_excess);
+ 	  if (num_excess)
+ 	    have_excess_enodes = true;
+ 	}
+       enodes_per_snode.print (pp);
+       if (have_excess_enodes)
+ 	{
+ 	  pp_printf (pp, "EXCESS ENODES:");
+ 	  pp_newline (pp);
+ 	  excess_enodes_per_snode.print (pp);
+ 	}
+     }
+ }
+ 
+ /* Write all stats information to this graph's logger, if any.  */
+ 
+ void
+ exploded_graph::log_stats () const
+ {
+   logger * const logger = get_logger ();
+   if (!logger)
+     return;
+ 
+   LOG_SCOPE (logger);
+ 
+   logger->log ("m_sg.num_nodes (): %i", m_sg.num_nodes ());
+   logger->log ("m_nodes.length (): %i", m_nodes.length ());
+   logger->log ("m_edges.length (): %i", m_edges.length ());
+   logger->log ("remaining enodes in worklist: %i", m_worklist.length ());
+ 
+   logger->log ("global stats:");
+   m_global_stats.log (logger);
+ 
+   for (function_stat_map_t::iterator iter = m_per_function_stats.begin ();
+        iter != m_per_function_stats.end ();
+        ++iter)
+     {
+       function *fn = (*iter).first;
+       log_scope s (logger, function_name (fn));
+       (*iter).second->log (logger);
+     }
+ 
+   print_bar_charts (logger->get_printer ());
+ }
+ 
+ /* Dump all stats information to OUT.  */
+ 
+ void
+ exploded_graph::dump_stats (FILE *out) const
+ {
+   fprintf (out, "m_sg.num_nodes (): %i\n", m_sg.num_nodes ());
+   fprintf (out, "m_nodes.length (): %i\n", m_nodes.length ());
+   fprintf (out, "m_edges.length (): %i\n", m_edges.length ());
+   fprintf (out, "remaining enodes in worklist: %i", m_worklist.length ());
+ 
+   fprintf (out, "global stats:\n");
+   m_global_stats.dump (out);
+ 
+   for (function_stat_map_t::iterator iter = m_per_function_stats.begin ();
+        iter != m_per_function_stats.end ();
+        ++iter)
+     {
+       function *fn = (*iter).first;
+       fprintf (out, "function: %s\n", function_name (fn));
+       (*iter).second->dump (out);
+     }
+ 
+   fprintf (out, "PK_AFTER_SUPERNODE per supernode:\n");
+   for (unsigned i = 0; i < m_PK_AFTER_SUPERNODE_per_snode.length (); i++)
+     fprintf (out, "  SN %i: %3i\n", i, m_PK_AFTER_SUPERNODE_per_snode[i]);
+ }
+ 
+ void
+ exploded_graph::dump_states_for_supernode (FILE *out,
+ 					   const supernode *snode) const
+ {
+   fprintf (out, "PK_AFTER_SUPERNODE nodes for SN: %i\n", snode->m_index);
+   int i;
+   exploded_node *enode;
+   int state_idx = 0;
+   FOR_EACH_VEC_ELT (m_nodes, i, enode)
+     {
+       const supernode *iter_snode = enode->get_supernode ();
+       if (enode->get_point ().get_kind () == PK_AFTER_SUPERNODE
+ 	  && iter_snode == snode)
+ 	{
+ 	  pretty_printer pp;
+ 	  pp_format_decoder (&pp) = default_tree_printer;
+ 	  enode->get_state ().dump_to_pp (m_ext_state, true, &pp);
+ 	  fprintf (out, "state %i: EN: %i\n  %s\n",
+ 		   state_idx++, enode->m_index,
+ 		   pp_formatted_text (&pp));
+ 	}
+     }
+   fprintf (out, "#exploded_node for PK_AFTER_SUPERNODE for SN: %i = %i\n",
+ 	   snode->m_index, state_idx);
+ }
+ 
+ /* Look for the last use of SEARCH_STMT within this path.
+    If found write the edge's index to *OUT_IDX and return true, otherwise
+    return false.  */
+ 
+ bool
+ exploded_path::find_stmt_backwards (const gimple *search_stmt,
+ 				    int *out_idx) const
+ {
+   int i;
+   const exploded_edge *eedge;
+   FOR_EACH_VEC_ELT_REVERSE (m_edges, i, eedge)
+     {
+       const exploded_node *dst_node = eedge->m_dest;
+       const program_point &dst_point = dst_node->get_point ();
+       const gimple *stmt = dst_point.get_stmt ();
+       if (stmt == search_stmt)
+ 	{
+ 	  *out_idx = i;
+ 	  return true;
+ 	}
+     }
+   return false;
+ }
+ 
+ /* Get the final exploded_node in this path, which must be non-empty.  */
+ 
+ exploded_node *
+ exploded_path::get_final_enode () const
+ {
+   gcc_assert (m_edges.length () > 0);
+   return m_edges[m_edges.length () - 1]->m_dest;
+ }
+ 
+ /* Check state along this path, returning true if it is feasible.
+    If OUT is non-NULL, and the path is infeasible, write a new
+    feasibility_problem to *OUT.  */
+ 
+ bool
+ exploded_path::feasible_p (logger *logger, feasibility_problem **out) const
+ {
+   LOG_SCOPE (logger);
+ 
+   /* Traverse the path, updating this model.  */
+   region_model model;
+   for (unsigned i = 0; i < m_edges.length (); i++)
+     {
+       const exploded_edge *eedge = m_edges[i];
+       if (logger)
+ 	logger->log ("considering edge %i: EN:%i -> EN:%i",
+ 		     i,
+ 		     eedge->m_src->m_index,
+ 		     eedge->m_dest->m_index);
+       const exploded_node &src_enode = *eedge->m_src;
+       const program_point &src_point = src_enode.get_point ();
+       if (logger)
+ 	{
+ 	  logger->start_log_line ();
+ 	  src_point.print (logger->get_printer (), format (false));
+ 	  logger->end_log_line ();
+ 	}
+ 
+       if (const gimple *stmt = src_point.get_stmt ())
+ 	{
+ 	  /* Update cfun and input_location in case of ICE: make it easier to
+ 	     track down which source construct we're failing to handle.  */
+ 	  auto_cfun sentinel (src_point.get_function ());
+ 	  input_location = stmt->location;
+ 
+ 	  if (const gassign *assign = dyn_cast <const gassign *> (stmt))
+ 	    model.on_assignment (assign, NULL);
+ 	  else if (const greturn *return_ = dyn_cast <const greturn *> (stmt))
+ 	    model.on_return (return_, NULL);
+ 	}
+ 
+       const superedge *sedge = eedge->m_sedge;
+       if (sedge)
+ 	{
+ 	  if (logger)
+ 	    logger->log ("  sedge: SN:%i -> SN:%i %s",
+ 			 sedge->m_src->m_index,
+ 			 sedge->m_dest->m_index,
+ 			 sedge->get_description (false));
+ 
+ 	  const gimple *last_stmt = src_point.get_supernode ()->get_last_stmt ();
+ 	  if (!model.maybe_update_for_edge (*sedge, last_stmt, NULL))
+ 	    {
+ 	      if (logger)
+ 		{
+ 		  logger->log ("rejecting due to region model");
+ 		  model.dump_to_pp (logger->get_printer (), false);
+ 		}
+ 	      if (out)
+ 		*out = new feasibility_problem (i, model, *eedge, last_stmt);
+ 	      return false;
+ 	    }
+ 	}
+       else
+ 	{
+ 	  /* Special-case the initial eedge from the origin node to the
+ 	     initial function by pushing a frame for it.  */
+ 	  if (i == 0)
+ 	    {
+ 	      gcc_assert (eedge->m_src->m_index == 0);
+ 	      gcc_assert (src_point.get_kind () == PK_ORIGIN);
+ 	      gcc_assert (eedge->m_dest->get_point ().get_kind ()
+ 			  == PK_BEFORE_SUPERNODE);
+ 	      function *fun = eedge->m_dest->get_function ();
+ 	      gcc_assert (fun);
+ 	      model.push_frame (fun, NULL, NULL);
+ 	      if (logger)
+ 		logger->log ("  pushing frame for %qD", fun->decl);
+ 	    }
+ 	  else if (eedge->m_custom_info)
+ 	    eedge->m_custom_info->update_model (&model, *eedge);
+ 	}
+ 
+       /* Handle phi nodes on an edge leaving a PK_BEFORE_SUPERNODE (to
+ 	 a PK_BEFORE_STMT, or a PK_AFTER_SUPERNODE if no stmts).
+ 	 This will typically not be associated with a superedge.  */
+       if (src_point.get_from_edge ())
+ 	{
+ 	  const cfg_superedge *last_cfg_superedge
+ 	    = src_point.get_from_edge ()->dyn_cast_cfg_superedge ();
+ 	  if (last_cfg_superedge)
+ 	    {
+ 	      if (logger)
+ 		logger->log ("  update for phis");
+ 	      model.update_for_phis (src_enode.get_supernode (),
+ 				     last_cfg_superedge,
+ 				     NULL);
+ 	    }
+ 	}
+ 
+       if (logger)
+ 	{
+ 	  logger->log ("state after edge %i: EN:%i -> EN:%i",
+ 		       i,
+ 		       eedge->m_src->m_index,
+ 		       eedge->m_dest->m_index);
+ 	  logger->start_log_line ();
+ 	  model.dump_to_pp (logger->get_printer (), true);
+ 	  logger->end_log_line ();
+ 	}
+     }
+ 
+   return true;
+ }
+ 
+ /* Dump this path in multiline form to PP.  */
+ 
+ void
+ exploded_path::dump_to_pp (pretty_printer *pp) const
+ {
+   for (unsigned i = 0; i < m_edges.length (); i++)
+     {
+       const exploded_edge *eedge = m_edges[i];
+       pp_printf (pp, "m_edges[%i]: EN %i -> EN %i",
+ 		 i,
+ 		 eedge->m_src->m_index,
+ 		 eedge->m_dest->m_index);
+       pp_newline (pp);
+     }
+ }
+ 
+ /* Dump this path in multiline form to FP.  */
+ 
+ void
+ exploded_path::dump (FILE *fp) const
+ {
+   pretty_printer pp;
+   pp_format_decoder (&pp) = default_tree_printer;
+   pp_show_color (&pp) = pp_show_color (global_dc->printer);
+   pp.buffer->stream = fp;
+   dump_to_pp (&pp);
+   pp_flush (&pp);
+ }
+ 
+ /* Dump this path in multiline form to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ exploded_path::dump () const
+ {
+   dump (stderr);
+ }
+ 
+ /* A family of cluster subclasses for use when generating .dot output for
+    exploded graphs (-fdump-analyzer-exploded-graph), for grouping the
+    enodes into hierarchical boxes.
+ 
+    All functionless enodes appear in the top-level graph.
+    Every (function, call_string) pair gets its own cluster.  Within that
+    cluster, each supernode gets its own cluster.
+ 
+    Hence all enodes relating to a particular function with a particular
+    callstring will be in a cluster together; all enodes for the same
+    function but with a different callstring will be in a different
+    cluster.  */
+ 
+ /* Base class of cluster for clustering exploded_node instances in .dot
+    output, based on various subclass-specific criteria.  */
+ 
+ class exploded_cluster : public cluster<eg_traits>
+ {
+ };
+ 
+ /* Cluster containing all exploded_node instances for one supernode.  */
+ 
+ class supernode_cluster : public exploded_cluster
+ {
+ public:
+   supernode_cluster (const supernode *supernode) : m_supernode (supernode) {}
+ 
+   // TODO: dtor?
+ 
+   void dump_dot (graphviz_out *gv, const dump_args_t &args) const FINAL OVERRIDE
+   {
+     gv->println ("subgraph \"cluster_supernode_%p\" {",
+ 		 (const void *)this);
+     gv->indent ();
+     gv->println ("style=\"dashed\";");
+     gv->println ("label=\"SN: %i (bb: %i)\";",
+ 		 m_supernode->m_index, m_supernode->m_bb->index);
+ 
+     int i;
+     exploded_node *enode;
+     FOR_EACH_VEC_ELT (m_enodes, i, enode)
+       enode->dump_dot (gv, args);
+ 
+     /* Terminate subgraph.  */
+     gv->outdent ();
+     gv->println ("}");
+   }
+ 
+   void add_node (exploded_node *en) FINAL OVERRIDE
+   {
+     m_enodes.safe_push (en);
+   }
+ 
+ private:
+   const supernode *m_supernode;
+   auto_vec <exploded_node *> m_enodes;
+ };
+ 
+ /* Cluster containing all supernode_cluster instances for one
+    (function, call_string) pair.  */
+ 
+ class function_call_string_cluster : public exploded_cluster
+ {
+ public:
+   function_call_string_cluster (function *fun, call_string cs)
+   : m_fun (fun), m_cs (cs) {}
+ 
+   ~function_call_string_cluster ()
+   {
+     for (map_t::iterator iter = m_map.begin ();
+ 	 iter != m_map.end ();
+ 	 ++iter)
+       delete (*iter).second;
+   }
+ 
+   void dump_dot (graphviz_out *gv, const dump_args_t &args) const FINAL OVERRIDE
+   {
+     const char *funcname = function_name (m_fun);
+ 
+     gv->println ("subgraph \"cluster_function_%p\" {", (const void *)this);
+     gv->indent ();
+     gv->write_indent ();
+     gv->print ("label=\"call string: ");
+     m_cs.print (gv->get_pp ());
+     gv->print (" function: %s \";", funcname);
+     gv->print ("\n");
+ 
+     for (map_t::iterator iter = m_map.begin ();
+ 	 iter != m_map.end ();
+ 	 ++iter)
+       (*iter).second->dump_dot (gv, args);
+ 
+     /* Terminate subgraph.  */
+     gv->outdent ();
+     gv->println ("}");
+   }
+ 
+   void add_node (exploded_node *en) FINAL OVERRIDE
+   {
+     const supernode *supernode = en->get_supernode ();
+     gcc_assert (supernode);
+     supernode_cluster **slot = m_map.get (supernode);
+     if (slot)
+       (*slot)->add_node (en);
+     else
+       {
+ 	supernode_cluster *child = new supernode_cluster (supernode);
+ 	m_map.put (supernode, child);
+ 	child->add_node (en);
+       }
+   }
+ 
+ private:
+   function *m_fun;
+   call_string m_cs;
+   typedef ordered_hash_map<const supernode *, supernode_cluster *> map_t;
+   map_t m_map;
+ };
+ 
+ /* Keys for root_cluster.  */
+ 
+ struct function_call_string
+ {
+   function_call_string (function *fun, call_string cs)
+   : m_fun (fun), m_cs (cs)
+   {
+     gcc_assert (fun);
+   }
+ 
+   function *m_fun;
+   call_string m_cs;
+ };
+ 
+ } // namespace ana
+ 
+ template <> struct default_hash_traits<function_call_string>
+ : public pod_hash_traits<function_call_string>
+ {
+   static const bool empty_zero_p = false;
+ };
+ 
+ template <>
+ inline hashval_t
+ pod_hash_traits<function_call_string>::hash (value_type v)
+ {
+   return pointer_hash <function>::hash (v.m_fun) ^ v.m_cs.hash ();
+ }
+ 
+ template <>
+ inline bool
+ pod_hash_traits<function_call_string>::equal (const value_type &existing,
+ 					      const value_type &candidate)
+ {
+   return existing.m_fun == candidate.m_fun && existing.m_cs == candidate.m_cs;
+ }
+ template <>
+ inline void
+ pod_hash_traits<function_call_string>::mark_deleted (value_type &v)
+ {
+   v.m_fun = reinterpret_cast<function *> (1);
+ }
+ template <>
+ inline void
+ pod_hash_traits<function_call_string>::mark_empty (value_type &v)
+ {
+   v.m_fun = NULL;
+ }
+ template <>
+ inline bool
+ pod_hash_traits<function_call_string>::is_deleted (value_type v)
+ {
+   return v.m_fun == reinterpret_cast<function *> (1);
+ }
+ template <>
+ inline bool
+ pod_hash_traits<function_call_string>::is_empty (value_type v)
+ {
+   return v.m_fun == NULL;
+ }
+ 
+ namespace ana {
+ 
+ /* Top-level cluster for generating .dot output for exploded graphs,
+    handling the functionless nodes, and grouping the remaining nodes by
+    callstring.  */
+ 
+ class root_cluster : public exploded_cluster
+ {
+ public:
+   ~root_cluster ()
+   {
+     for (map_t::iterator iter = m_map.begin ();
+ 	 iter != m_map.end ();
+ 	 ++iter)
+       delete (*iter).second;
+   }
+ 
+   void dump_dot (graphviz_out *gv, const dump_args_t &args) const FINAL OVERRIDE
+   {
+     int i;
+     exploded_node *enode;
+     FOR_EACH_VEC_ELT (m_functionless_enodes, i, enode)
+       enode->dump_dot (gv, args);
+ 
+     for (map_t::iterator iter = m_map.begin ();
+ 	 iter != m_map.end ();
+ 	 ++iter)
+       (*iter).second->dump_dot (gv, args);
+   }
+ 
+   void add_node (exploded_node *en) FINAL OVERRIDE
+   {
+     function *fun = en->get_function ();
+     if (!fun)
+       {
+ 	m_functionless_enodes.safe_push (en);
+ 	return;
+       }
+ 
+     const call_string &cs = en->get_point ().get_call_string ();
+     function_call_string key (fun, cs);
+     function_call_string_cluster **slot = m_map.get (key);
+     if (slot)
+       (*slot)->add_node (en);
+     else
+       {
+ 	function_call_string_cluster *child
+ 	  = new function_call_string_cluster (fun, cs);
+ 	m_map.put (key, child);
+ 	child->add_node (en);
+       }
+   }
+ 
+ private:
+   /* This can't be an ordered_hash_map, as we can't store vec<call_string>,
+      since it's not a POD; vec<>::quick_push has:
+        *slot = obj;
+      and the slot isn't initialized, so the assignment op dies when cleaning up
+      un-inited *slot (within the truncate call).  */
+   typedef hash_map<function_call_string, function_call_string_cluster *> map_t;
+   map_t m_map;
+ 
+   /* This should just be the origin exploded_node.  */
+   auto_vec <exploded_node *> m_functionless_enodes;
+ };
+ 
+ /* Subclass of range_label for use within
+    exploded_graph::dump_exploded_nodes for implementing
+    -fdump-analyzer-exploded-nodes: a label for a specific
+    exploded_node.  */
+ 
+ class enode_label : public range_label
+ {
+  public:
+   enode_label (const extrinsic_state &ext_state,
+ 	       exploded_node *enode)
+   : m_ext_state (ext_state), m_enode (enode) {}
+ 
+   label_text get_text (unsigned) const FINAL OVERRIDE
+   {
+     pretty_printer pp;
+     pp_format_decoder (&pp) = default_tree_printer;
+     m_enode->get_state ().dump_to_pp (m_ext_state, true, &pp);
+     return make_label_text (false, "EN: %i: %s",
+ 			    m_enode->m_index, pp_formatted_text (&pp));
+   }
+ 
+ private:
+   const extrinsic_state &m_ext_state;
+   exploded_node *m_enode;
+ };
+ 
+ /* Postprocessing support for dumping the exploded nodes.
+    Handle -fdump-analyzer-exploded-nodes,
+    -fdump-analyzer-exploded-nodes-2, and the
+    "__analyzer_dump_exploded_nodes" builtin.  */
+ 
+ void
+ exploded_graph::dump_exploded_nodes () const
+ {
+   // TODO
+   /* Locate calls to __analyzer_dump_exploded_nodes.  */
+   // Print how many egs there are for them?
+   /* Better: log them as we go, and record the exploded nodes
+      in question.  */
+ 
+   /* Show every enode.  */
+ 
+   /* Gather them by stmt, so that we can more clearly see the
+      "hotspots" requiring numerous exploded nodes.  */
+ 
+   /* Alternatively, simply throw them all into one big rich_location
+      and see if the label-printing will sort it out...
+      This requires them all to be in the same source file.  */
+ 
+   if (flag_dump_analyzer_exploded_nodes)
+     {
+       auto_timevar tv (TV_ANALYZER_DUMP);
+       gcc_rich_location richloc (UNKNOWN_LOCATION);
+       unsigned i;
+       exploded_node *enode;
+       FOR_EACH_VEC_ELT (m_nodes, i, enode)
+ 	{
+ 	  if (const gimple *stmt = enode->get_stmt ())
+ 	    {
+ 	      if (get_pure_location (richloc.get_loc ()) == UNKNOWN_LOCATION)
+ 		richloc.set_range (0, stmt->location, SHOW_RANGE_WITH_CARET);
+ 	      else
+ 		richloc.add_range (stmt->location,
+ 				   SHOW_RANGE_WITHOUT_CARET,
+ 				   new enode_label (m_ext_state, enode));
+ 	    }
+ 	}
+       warning_at (&richloc, 0, "%i exploded nodes", m_nodes.length ());
+ 
+       /* Repeat the warning without all the labels, so that message is visible
+ 	 (the other one may well have scrolled past the terminal limit).  */
+       warning_at (richloc.get_loc (), 0,
+ 		  "%i exploded nodes", m_nodes.length ());
+ 
+       if (m_worklist.length () > 0)
+ 	warning_at (richloc.get_loc (), 0,
+ 		    "worklist still contains %i nodes", m_worklist.length ());
+     }
+ 
+   /* Dump the egraph in textual form to a dump file.  */
+   if (flag_dump_analyzer_exploded_nodes_2)
+     {
+       auto_timevar tv (TV_ANALYZER_DUMP);
+       char *filename
+ 	= concat (dump_base_name, ".eg.txt", NULL);
+       FILE *outf = fopen (filename, "w");
+       if (!outf)
+ 	error_at (UNKNOWN_LOCATION, "unable to open %qs for writing", filename);
+       free (filename);
+ 
+       fprintf (outf, "exploded graph for %s\n", dump_base_name);
+       fprintf (outf, "  nodes: %i\n", m_nodes.length ());
+       fprintf (outf, "  edges: %i\n", m_edges.length ());
+ 
+       unsigned i;
+       exploded_node *enode;
+       FOR_EACH_VEC_ELT (m_nodes, i, enode)
+ 	{
+ 	  fprintf (outf, "\nEN %i:\n", enode->m_index);
+ 	  enode->dump_succs_and_preds (outf);
+ 	  pretty_printer pp;
+ 	  enode->get_point ().print (&pp, format (true));
+ 	  fprintf (outf, "%s\n", pp_formatted_text (&pp));
+ 	  enode->get_state ().dump_to_file (m_ext_state, false, outf);
+ 	}
+ 
+       fclose (outf);
+     }
+ 
+   /* Dump the egraph in textual form to multiple dump files, one per enode.  */
+   if (flag_dump_analyzer_exploded_nodes_3)
+     {
+       auto_timevar tv (TV_ANALYZER_DUMP);
+ 
+       unsigned i;
+       exploded_node *enode;
+       FOR_EACH_VEC_ELT (m_nodes, i, enode)
+ 	{
+ 	  char *filename
+ 	    = xasprintf ("%s.en-%i.txt", dump_base_name, i);
+ 	  FILE *outf = fopen (filename, "w");
+ 	  if (!outf)
+ 	    error_at (UNKNOWN_LOCATION, "unable to open %qs for writing", filename);
+ 	  free (filename);
+ 
+ 	  fprintf (outf, "EN %i:\n", enode->m_index);
+ 	  enode->dump_succs_and_preds (outf);
+ 	  pretty_printer pp;
+ 	  enode->get_point ().print (&pp, format (true));
+ 	  fprintf (outf, "%s\n", pp_formatted_text (&pp));
+ 	  enode->get_state ().dump_to_file (m_ext_state, false, outf);
+ 
+ 	  fclose (outf);
+ 	}
+     }
+ 
+   /* Emit a warning at any call to "__analyzer_dump_exploded_nodes",
+      giving the number of processed exploded nodes for "before-stmt",
+      and the IDs of processed, merger, and worklist enodes.
+ 
+      We highlight the count of *processed* enodes since this is of most
+      interest in DejaGnu tests for ensuring that state merger has
+      happened.
+ 
+      We don't show the count of merger and worklist enodes, as this is
+      more of an implementation detail of the merging/worklist that we
+      don't want to bake into our expected DejaGnu messages.  */
+ 
+   unsigned i;
+   exploded_node *enode;
+   hash_set<const gimple *> seen;
+   FOR_EACH_VEC_ELT (m_nodes, i, enode)
+     {
+       if (enode->get_point ().get_kind () != PK_BEFORE_STMT)
+ 	continue;
+ 
+       if (const gimple *stmt = enode->get_stmt ())
+ 	if (const gcall *call = dyn_cast <const gcall *> (stmt))
+ 	  if (is_special_named_call_p (call, "__analyzer_dump_exploded_nodes",
+ 				       1))
+ 	    {
+ 	      if (seen.contains (stmt))
+ 		continue;
+ 
+ 	      auto_vec<exploded_node *> processed_enodes;
+ 	      auto_vec<exploded_node *> merger_enodes;
+ 	      auto_vec<exploded_node *> worklist_enodes;
+ 	      /* This is O(N^2).  */
+ 	      unsigned j;
+ 	      exploded_node *other_enode;
+ 	      FOR_EACH_VEC_ELT (m_nodes, j, other_enode)
+ 		{
+ 		  if (other_enode->get_point ().get_kind () != PK_BEFORE_STMT)
+ 		    continue;
+ 		  if (other_enode->get_stmt () == stmt)
+ 		    switch (other_enode->get_status ())
+ 		      {
+ 		      default:
+ 			gcc_unreachable ();
+ 		      case exploded_node::STATUS_WORKLIST:
+ 			worklist_enodes.safe_push (other_enode);
+ 			break;
+ 		      case exploded_node::STATUS_PROCESSED:
+ 			processed_enodes.safe_push (other_enode);
+ 			break;
+ 		      case exploded_node::STATUS_MERGER:
+ 			merger_enodes.safe_push (other_enode);
+ 			break;
+ 		      }
+ 		}
+ 
+ 	      pretty_printer pp;
+ 	      pp_character (&pp, '[');
+ 	      print_enode_indices (&pp, processed_enodes);
+ 	      if (merger_enodes.length () > 0)
+ 		{
+ 		  pp_string (&pp, "] merger(s): [");
+ 		  print_enode_indices (&pp, merger_enodes);
+ 		}
+ 	      if (worklist_enodes.length () > 0)
+ 		{
+ 		  pp_string (&pp, "] worklist: [");
+ 		  print_enode_indices (&pp, worklist_enodes);
+ 		}
+ 	      pp_character (&pp, ']');
+ 
+ 	      warning_n (stmt->location, 0, processed_enodes.length (),
+ 			 "%i processed enode: %s",
+ 			 "%i processed enodes: %s",
+ 			 processed_enodes.length (), pp_formatted_text (&pp));
+ 	      seen.add (stmt);
+ 
+ 	      /* If the argument is non-zero, then print all of the states
+ 		 of the various enodes.  */
+ 	      tree t_arg = fold (gimple_call_arg (call, 0));
+ 	      if (TREE_CODE (t_arg) != INTEGER_CST)
+ 		{
+ 		  error_at (call->location,
+ 			    "integer constant required for arg 1");
+ 		  return;
+ 		}
+ 	      int i_arg = TREE_INT_CST_LOW (t_arg);
+ 	      if (i_arg)
+ 		{
+ 		  exploded_node *other_enode;
+ 		  FOR_EACH_VEC_ELT (processed_enodes, j, other_enode)
+ 		    {
+ 		      fprintf (stderr, "%i of %i: EN %i:\n",
+ 			       j + 1, processed_enodes.length (),
+ 			       other_enode->m_index);
+ 		      other_enode->dump_succs_and_preds (stderr);
+ 		      /* Dump state.  */
+ 		      other_enode->get_state ().dump (m_ext_state, false);
+ 		    }
+ 		}
+ 	    }
+     }
+ }
+ 
+ /* A collection of classes for visualizing the callgraph in .dot form
+    (as represented in the supergraph).  */
+ 
+ /* Forward decls.  */
+ class viz_callgraph_node;
+ class viz_callgraph_edge;
+ class viz_callgraph;
+ class viz_callgraph_cluster;
+ 
+ /* Traits for using "digraph.h" to visualize the callgraph.  */
+ 
+ struct viz_callgraph_traits
+ {
+   typedef viz_callgraph_node node_t;
+   typedef viz_callgraph_edge edge_t;
+   typedef viz_callgraph graph_t;
+   struct dump_args_t
+   {
+     dump_args_t (const exploded_graph *eg) : m_eg (eg) {}
+     const exploded_graph *m_eg;
+   };
+   typedef viz_callgraph_cluster cluster_t;
+ };
+ 
+ /* Subclass of dnode representing a function within the callgraph.  */
+ 
+ class viz_callgraph_node : public dnode<viz_callgraph_traits>
+ {
+   friend class viz_callgraph;
+ 
+ public:
+   viz_callgraph_node (function *fun, int index)
+   : m_fun (fun), m_index (index), m_num_supernodes (0), m_num_superedges (0)
+   {
+     gcc_assert (fun);
+   }
+ 
+   void dump_dot (graphviz_out *gv, const dump_args_t &args) const FINAL OVERRIDE
+   {
+     pretty_printer *pp = gv->get_pp ();
+ 
+     dump_dot_id (pp);
+     pp_printf (pp, " [shape=none,margin=0,style=filled,fillcolor=%s,label=<",
+ 	       "lightgrey");
+     pp_string (pp, "<TABLE BORDER=\"0\">");
+     pp_write_text_to_stream (pp);
+ 
+     gv->begin_trtd ();
+     pp_printf (pp, "VCG: %i: %s", m_index, function_name (m_fun));
+     gv->end_tdtr ();
+     pp_newline (pp);
+ 
+     gv->begin_trtd ();
+     pp_printf (pp, "supernodes: %i\n", m_num_supernodes);
+     gv->end_tdtr ();
+     pp_newline (pp);
+ 
+     gv->begin_trtd ();
+     pp_printf (pp, "superedges: %i\n", m_num_superedges);
+     gv->end_tdtr ();
+     pp_newline (pp);
+ 
+     if (args.m_eg)
+       {
+ 	unsigned i;
+ 	exploded_node *enode;
+ 	unsigned num_enodes = 0;
+ 	FOR_EACH_VEC_ELT (args.m_eg->m_nodes, i, enode)
+ 	  {
+ 	    if (enode->get_point ().get_function () == m_fun)
+ 	      num_enodes++;
+ 	  }
+ 	gv->begin_trtd ();
+ 	pp_printf (pp, "enodes: %i\n", num_enodes);
+ 	gv->end_tdtr ();
+ 	pp_newline (pp);
+ 
+ 	// TODO: also show the per-callstring breakdown
+ 	const exploded_graph::call_string_data_map_t *per_cs_data
+ 	  = args.m_eg->get_per_call_string_data ();
+ 	for (exploded_graph::call_string_data_map_t::iterator iter
+ 	       = per_cs_data->begin ();
+ 	     iter != per_cs_data->end ();
+ 	     ++iter)
+ 	  {
+ 	    const call_string *cs = (*iter).first;
+ 	    //per_call_string_data *data = (*iter).second;
+ 	    num_enodes = 0;
+ 	    FOR_EACH_VEC_ELT (args.m_eg->m_nodes, i, enode)
+ 	      {
+ 		if (enode->get_point ().get_function () == m_fun
+ 		    && enode->get_point ().get_call_string () == *cs)
+ 		  num_enodes++;
+ 	      }
+ 	    if (num_enodes > 0)
+ 	      {
+ 		gv->begin_trtd ();
+ 		cs->print (pp);
+ 		pp_printf (pp, ": %i\n", num_enodes);
+ 		pp_write_text_as_html_like_dot_to_stream (pp);
+ 		gv->end_tdtr ();
+ 	      }
+ 	  }
+ 
+ 	/* Show any summaries.  */
+ 	per_function_data *data = args.m_eg->get_per_function_data (m_fun);
+ 	if (data)
+ 	  {
+ 	    pp_newline (pp);
+ 	    gv->begin_trtd ();
+ 	    pp_printf (pp, "summaries: %i\n", data->m_summaries.length ());
+ 	    pp_write_text_as_html_like_dot_to_stream (pp);
+ 	    gv->end_tdtr ();
+ 	  }
+       }
+ 
+     pp_string (pp, "</TABLE>>];\n\n");
+     pp_flush (pp);
+   }
+ 
+   void dump_dot_id (pretty_printer *pp) const
+   {
+     pp_printf (pp, "vcg_%i", m_index);
+   }
+ 
+ private:
+   function *m_fun;
+   int m_index;
+   int m_num_supernodes;
+   int m_num_superedges;
+ };
+ 
+ /* Subclass of dedge representing a callgraph edge.  */
+ 
+ class viz_callgraph_edge : public dedge<viz_callgraph_traits>
+ {
+ public:
+   viz_callgraph_edge (viz_callgraph_node *src, viz_callgraph_node *dest)
+   : dedge<viz_callgraph_traits> (src, dest)
+   {}
+ 
+   void dump_dot (graphviz_out *gv, const dump_args_t &) const
+     FINAL OVERRIDE
+   {
+     pretty_printer *pp = gv->get_pp ();
+ 
+     const char *style = "\"solid,bold\"";
+     const char *color = "black";
+     int weight = 10;
+     const char *constraint = "true";
+ 
+     m_src->dump_dot_id (pp);
+     pp_string (pp, " -> ");
+     m_dest->dump_dot_id (pp);
+     pp_printf (pp,
+ 	       (" [style=%s, color=%s, weight=%d, constraint=%s,"
+ 		" headlabel=\""),
+ 	       style, color, weight, constraint);
+     pp_printf (pp, "\"];\n");
+   }
+ };
+ 
+ /* Subclass of digraph representing the callgraph.  */
+ 
+ class viz_callgraph : public digraph<viz_callgraph_traits>
+ {
+ public:
+   viz_callgraph (const supergraph &sg);
+ 
+   viz_callgraph_node *get_vcg_node_for_function (function *fun)
+   {
+     return *m_map.get (fun);
+   }
+ 
+   viz_callgraph_node *get_vcg_node_for_snode (supernode *snode)
+   {
+     return get_vcg_node_for_function (snode->m_fun);
+   }
+ 
+ private:
+   hash_map<function *, viz_callgraph_node *> m_map;
+ };
+ 
+ /* Placeholder subclass of cluster.  */
+ 
+ class viz_callgraph_cluster : public cluster<viz_callgraph_traits>
+ {
+ };
+ 
+ /* viz_callgraph's ctor.  */
+ 
+ viz_callgraph::viz_callgraph (const supergraph &sg)
+ {
+   cgraph_node *node;
+   FOR_EACH_FUNCTION_WITH_GIMPLE_BODY (node)
+     {
+       function *fun = node->get_fun ();
+       viz_callgraph_node *vcg_node
+ 	= new viz_callgraph_node (fun, m_nodes.length ());
+       m_map.put (fun, vcg_node);
+       add_node (vcg_node);
+     }
+ 
+   unsigned i;
+   superedge *sedge;
+   FOR_EACH_VEC_ELT (sg.m_edges, i, sedge)
+     {
+       viz_callgraph_node *vcg_src = get_vcg_node_for_snode (sedge->m_src);
+       if (vcg_src->m_fun)
+ 	get_vcg_node_for_function (vcg_src->m_fun)->m_num_superedges++;
+       if (sedge->dyn_cast_call_superedge ())
+ 	{
+ 	  viz_callgraph_node *vcg_dest = get_vcg_node_for_snode (sedge->m_dest);
+ 	  viz_callgraph_edge *vcg_edge
+ 	    = new viz_callgraph_edge (vcg_src, vcg_dest);
+ 	  add_edge (vcg_edge);
+ 	}
+     }
+ 
+   supernode *snode;
+   FOR_EACH_VEC_ELT (sg.m_nodes, i, snode)
+     {
+       if (snode->m_fun)
+ 	get_vcg_node_for_function (snode->m_fun)->m_num_supernodes++;
+     }
+ }
+ 
+ /* Dump the callgraph to FILENAME.  */
+ 
+ static void
+ dump_callgraph (const supergraph &sg, const char *filename,
+ 		const exploded_graph *eg)
+ {
+   FILE *outf = fopen (filename, "w");
+   if (!outf)
+     return;
+ 
+   // TODO
+   viz_callgraph vcg (sg);
+   vcg.dump_dot (filename, NULL, viz_callgraph_traits::dump_args_t (eg));
+ 
+   fclose (outf);
+ }
+ 
+ /* Dump the callgraph to "<srcfile>.callgraph.dot".  */
+ 
+ static void
+ dump_callgraph (const supergraph &sg, const exploded_graph *eg)
+ {
+   auto_timevar tv (TV_ANALYZER_DUMP);
+   char *filename = concat (dump_base_name, ".callgraph.dot", NULL);
+   dump_callgraph (sg, filename, eg);
+   free (filename);
+ }
+ 
+ /* Subclass of dot_annotator for implementing
+    DUMP_BASE_NAME.supergraph-eg.dot, a post-analysis dump of the supergraph.
+ 
+    Annotate the supergraph nodes by printing the exploded nodes in concise
+    form within them, next to their pertinent statements where appropriate,
+    colorizing the exploded nodes based on sm-state.
+    Also show saved diagnostics within the exploded nodes, giving information
+    on whether they were feasible, and, if infeasible, where the problem
+    was.  */
+ 
+ class exploded_graph_annotator : public dot_annotator
+ {
+ public:
+   exploded_graph_annotator (const exploded_graph &eg)
+   : m_eg (eg)
+   {
+     /* Avoid O(N^2) by prepopulating m_enodes_per_snodes.  */
+     unsigned i;
+     supernode *snode;
+     FOR_EACH_VEC_ELT (eg.get_supergraph ().m_nodes, i, snode)
+       m_enodes_per_snodes.safe_push (new auto_vec <exploded_node *> ());
+     exploded_node *enode;
+     FOR_EACH_VEC_ELT (m_eg.m_nodes, i, enode)
+       if (enode->get_supernode ())
+ 	m_enodes_per_snodes[enode->get_supernode ()->m_index]->safe_push (enode);
+   }
+ 
+   /* Show exploded nodes for BEFORE_SUPERNODE points before N.  */
+   bool add_node_annotations (graphviz_out *gv, const supernode &n,
+ 			     bool within_table)
+     const FINAL OVERRIDE
+   {
+     if (!within_table)
+       return false;
+     gv->begin_tr ();
+     pretty_printer *pp = gv->get_pp ();
+ 
+     gv->begin_td ();
+     pp_string (pp, "BEFORE");
+     gv->end_td ();
+ 
+     unsigned i;
+     exploded_node *enode;
+     bool had_enode = false;
+     FOR_EACH_VEC_ELT (*m_enodes_per_snodes[n.m_index], i, enode)
+       {
+ 	gcc_assert (enode->get_supernode () == &n);
+ 	const program_point &point = enode->get_point ();
+ 	if (point.get_kind () != PK_BEFORE_SUPERNODE)
+ 	  continue;
+ 	print_enode (gv, enode);
+ 	had_enode = true;
+       }
+     if (!had_enode)
+       pp_string (pp, "<TD BGCOLOR=\"red\">UNREACHED</TD>");
+     pp_flush (pp);
+     gv->end_tr ();
+     return true;
+   }
+ 
+   /* Show exploded nodes for STMT.  */
+   void add_stmt_annotations (graphviz_out *gv, const gimple *stmt,
+ 			     bool within_row)
+     const FINAL OVERRIDE
+   {
+     if (!within_row)
+       return;
+     pretty_printer *pp = gv->get_pp ();
+ 
+     const supernode *snode
+       = m_eg.get_supergraph ().get_supernode_for_stmt (stmt);
+     unsigned i;
+     exploded_node *enode;
+     bool had_td = false;
+     FOR_EACH_VEC_ELT (*m_enodes_per_snodes[snode->m_index], i, enode)
+       {
+ 	const program_point &point = enode->get_point ();
+ 	if (point.get_kind () != PK_BEFORE_STMT)
+ 	  continue;
+ 	if (point.get_stmt () != stmt)
+ 	  continue;
+ 	print_enode (gv, enode);
+ 	had_td = true;
+       }
+     pp_flush (pp);
+     if (!had_td)
+       {
+ 	gv->begin_td ();
+ 	gv->end_td ();
+       }
+   }
+ 
+   /* Show exploded nodes for AFTER_SUPERNODE points after N.  */
+   bool add_after_node_annotations (graphviz_out *gv, const supernode &n)
+     const FINAL OVERRIDE
+   {
+     gv->begin_tr ();
+     pretty_printer *pp = gv->get_pp ();
+ 
+     gv->begin_td ();
+     pp_string (pp, "AFTER");
+     gv->end_td ();
+ 
+     unsigned i;
+     exploded_node *enode;
+     FOR_EACH_VEC_ELT (*m_enodes_per_snodes[n.m_index], i, enode)
+       {
+ 	gcc_assert (enode->get_supernode () == &n);
+ 	const program_point &point = enode->get_point ();
+ 	if (point.get_kind () != PK_AFTER_SUPERNODE)
+ 	  continue;
+ 	print_enode (gv, enode);
+       }
+     pp_flush (pp);
+     gv->end_tr ();
+     return true;
+   }
+ 
+ private:
+   /* Concisely print a TD element for ENODE, showing the index, status,
+      and any saved_diagnostics at the enode.  Colorize it to show sm-state.
+ 
+      Ideally we'd dump ENODE's state here, hidden behind some kind of
+      interactive disclosure method like a tooltip, so that the states
+      can be explored without overwhelming the graph.
+      However, I wasn't able to get graphviz/xdot to show tooltips on
+      individual elements within a HTML-like label.  */
+   void print_enode (graphviz_out *gv, const exploded_node *enode) const
+   {
+     pretty_printer *pp = gv->get_pp ();
+     pp_printf (pp, "<TD BGCOLOR=\"%s\">",
+ 	       enode->get_dot_fillcolor ());
+     pp_printf (pp, "<TABLE BORDER=\"0\">");
+     gv->begin_trtd ();
+     pp_printf (pp, "EN: %i", enode->m_index);
+     switch (enode->get_status ())
+       {
+       default:
+ 	gcc_unreachable ();
+       case exploded_node::STATUS_WORKLIST:
+ 	pp_string (pp, "(W)");
+ 	break;
+       case exploded_node::STATUS_PROCESSED:
+ 	break;
+       case exploded_node::STATUS_MERGER:
+ 	pp_string (pp, "(M)");
+ 	break;
+       }
+     gv->end_tdtr ();
+     /* Dump any saved_diagnostics at this enode.  */
+     {
+       const diagnostic_manager &dm = m_eg.get_diagnostic_manager ();
+       for (unsigned i = 0; i < dm.get_num_diagnostics (); i++)
+ 	{
+ 	  const saved_diagnostic *sd = dm.get_saved_diagnostic (i);
+ 	  if (sd->m_enode == enode)
+ 	    print_saved_diagnostic (gv, sd);
+ 	}
+     }
+     pp_printf (pp, "</TABLE>");
+     pp_printf (pp, "</TD>");
+   }
+ 
+   /* Print a TABLE element for SD, showing the kind, the length of the
+      exploded_path, whether the path was feasible, and if infeasible,
+      what the problem was.  */
+   void print_saved_diagnostic (graphviz_out *gv,
+ 			       const saved_diagnostic *sd) const
+   {
+     pretty_printer *pp = gv->get_pp ();
+     gv->begin_trtd ();
+     pp_printf (pp, "<TABLE BORDER=\"0\">");
+     gv->begin_tr ();
+     pp_string (pp, "<TD BGCOLOR=\"green\">");
+     pp_printf (pp, "DIAGNOSTIC: %s", sd->m_d->get_kind ());
+     gv->end_tdtr ();
+     gv->begin_trtd ();
+     pp_printf (pp, "epath length: %i", sd->get_epath_length ());
+     gv->end_tdtr ();
+     switch (sd->get_status ())
+       {
+       default:
+       case saved_diagnostic::STATUS_NEW:
+ 	gcc_unreachable ();
+ 	break;
+       case saved_diagnostic::STATUS_INFEASIBLE_PATH:
+ 	{
+ 	  gv->begin_trtd ();
+ 	  pp_printf (pp, "INFEASIBLE");
+ 	  gv->end_tdtr ();
+ 	  const feasibility_problem *p = sd->get_feasibility_problem ();
+ 	  gcc_assert (p);
+ 	  gv->begin_trtd ();
+ 	  pp_printf (pp, "at eedge %i: EN:%i -> EN:%i",
+ 		     p->m_eedge_idx,
+ 		     p->m_eedge.m_src->m_index,
+ 		     p->m_eedge.m_dest->m_index);
+ 	  pp_write_text_as_html_like_dot_to_stream (pp);
+ 	  gv->end_tdtr ();
+ 	  gv->begin_trtd ();
+ 	  p->m_eedge.m_sedge->dump (pp);
+ 	  pp_write_text_as_html_like_dot_to_stream (pp);
+ 	  gv->end_tdtr ();
+ 	  gv->begin_trtd ();
+ 	  pp_gimple_stmt_1 (pp, p->m_last_stmt, 0, (dump_flags_t)0);
+ 	  pp_write_text_as_html_like_dot_to_stream (pp);
+ 	  gv->end_tdtr ();
+ 	  /* Ideally we'd print p->m_model here; see the notes above about
+ 	     tooltips.  */
+ 	}
+ 	break;
+       case saved_diagnostic::STATUS_FEASIBLE_PATH:
+ 	gv->begin_trtd ();
+ 	pp_printf (pp, "FEASIBLE");
+ 	gv->end_tdtr ();
+ 	break;
+       }
+     pp_printf (pp, "</TABLE>");
+     gv->end_tdtr ();
+   }
+ 
+   const exploded_graph &m_eg;
+   auto_delete_vec<auto_vec <exploded_node *> > m_enodes_per_snodes;
+ };
+ 
+ /* Run the analysis "engine".  */
+ 
+ void
+ impl_run_checkers (logger *logger)
+ {
+   LOG_SCOPE (logger);
+ 
+   /* If using LTO, ensure that the cgraph nodes have function bodies.  */
+   cgraph_node *node;
+   FOR_EACH_FUNCTION_WITH_GIMPLE_BODY (node)
+     node->get_untransformed_body ();
+ 
+   /* Create the supergraph.  */
+   supergraph sg (logger);
+ 
+   state_purge_map *purge_map = NULL;
+ 
+   if (flag_analyzer_state_purge)
+     purge_map = new state_purge_map (sg, logger);
+ 
+   if (flag_dump_analyzer_supergraph)
+     {
+       /* Dump supergraph pre-analysis.  */
+       auto_timevar tv (TV_ANALYZER_DUMP);
+       char *filename = concat (dump_base_name, ".supergraph.dot", NULL);
+       supergraph::dump_args_t args ((enum supergraph_dot_flags)0, NULL);
+       sg.dump_dot (filename, args);
+       free (filename);
+     }
+ 
+   if (flag_dump_analyzer_state_purge)
+     {
+       auto_timevar tv (TV_ANALYZER_DUMP);
+       state_purge_annotator a (purge_map);
+       char *filename = concat (dump_base_name, ".state-purge.dot", NULL);
+       supergraph::dump_args_t args ((enum supergraph_dot_flags)0, &a);
+       sg.dump_dot (filename, args);
+       free (filename);
+     }
+ 
+   auto_delete_vec <state_machine> checkers;
+   make_checkers (checkers, logger);
+ 
+   if (logger)
+     {
+       int i;
+       state_machine *sm;
+       FOR_EACH_VEC_ELT (checkers, i, sm)
+ 	logger->log ("checkers[%i]: %s", i, sm->get_name ());
+     }
+ 
+   /* Extrinsic state shared by nodes in the graph.  */
+   const extrinsic_state ext_state (checkers);
+ 
+   const analysis_plan plan (sg, logger);
+ 
+   /* The exploded graph.  */
+   exploded_graph eg (sg, logger, ext_state, purge_map, plan,
+ 		     analyzer_verbosity);
+ 
+   /* Add entrypoints to the graph for externally-callable functions.  */
+   eg.build_initial_worklist ();
+ 
+   /* Now process the worklist, exploring the <point, state> graph.  */
+   eg.process_worklist ();
+ 
+   if (flag_dump_analyzer_exploded_graph)
+     {
+       auto_timevar tv (TV_ANALYZER_DUMP);
+       char *filename
+ 	= concat (dump_base_name, ".eg.dot", NULL);
+       exploded_graph::dump_args_t args (eg);
+       root_cluster c;
+       eg.dump_dot (filename, &c, args);
+       free (filename);
+     }
+ 
+   /* Now emit any saved diagnostics.  */
+   eg.get_diagnostic_manager ().emit_saved_diagnostics (eg);
+ 
+   eg.dump_exploded_nodes ();
+ 
+   eg.log_stats ();
+ 
+   if (flag_dump_analyzer_callgraph)
+     dump_callgraph (sg, &eg);
+ 
+   if (flag_dump_analyzer_supergraph)
+     {
+       /* Dump post-analysis form of supergraph.  */
+       auto_timevar tv (TV_ANALYZER_DUMP);
+       char *filename = concat (dump_base_name, ".supergraph-eg.dot", NULL);
+       exploded_graph_annotator a (eg);
+       supergraph::dump_args_t args ((enum supergraph_dot_flags)0, &a);
+       sg.dump_dot (filename, args);
+       free (filename);
+     }
+ 
+   delete purge_map;
+ }
+ 
+ /* External entrypoint to the analysis "engine".
+    Set up any dumps, then call impl_run_checkers.  */
+ 
+ void
+ run_checkers ()
+ {
+   /* Save input_location.  */
+   location_t saved_input_location = input_location;
+ 
+   /* Handle -fdump-analyzer and -fdump-analyzer-stderr.  */
+   FILE *dump_fout = NULL;
+   /* Track if we're responsible for closing dump_fout.  */
+   bool owns_dump_fout = false;
+   if (flag_dump_analyzer_stderr)
+     dump_fout = stderr;
+   else if (flag_dump_analyzer)
+     {
+       char *dump_filename = concat (dump_base_name, ".analyzer.txt", NULL);
+       dump_fout = fopen (dump_filename, "w");
+       free (dump_filename);
+       if (dump_fout)
+ 	owns_dump_fout = true;
+     }
+ 
+   {
+     log_user the_logger (NULL);
+     if (dump_fout)
+       the_logger.set_logger (new logger (dump_fout, 0, 0,
+ 					 *global_dc->printer));
+     LOG_SCOPE (the_logger.get_logger ());
+ 
+     impl_run_checkers (the_logger.get_logger ());
+ 
+     /* end of lifetime of the_logger (so that dump file is closed after the
+        various dtors run).  */
+   }
+ 
+   if (owns_dump_fout)
+     fclose (dump_fout);
+ 
+   /* Restore input_location.  Subsequent passes may assume that input_location
+      is some arbitrary value *not* in the block tree, which might be violated
+      if we didn't restore it.  */
+   input_location = saved_input_location;
+ }
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/engine.h gcc-10.1.0/gcc/analyzer/engine.h
*** gcc-9.3.0/gcc/analyzer/engine.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/engine.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,30 ----
+ /* The analysis "engine".
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_ENGINE_H
+ #define GCC_ANALYZER_ENGINE_H
+ 
+ namespace ana {
+ 
+ extern void run_checkers ();
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_ENGINE_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/exploded-graph.h gcc-10.1.0/gcc/analyzer/exploded-graph.h
*** gcc-9.3.0/gcc/analyzer/exploded-graph.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/exploded-graph.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,904 ----
+ /* Classes for managing a directed graph of <point, state> pairs.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_EXPLODED_GRAPH_H
+ #define GCC_ANALYZER_EXPLODED_GRAPH_H
+ 
+ namespace ana {
+ 
+ /* Concrete implementation of region_model_context, wiring it up to the
+    rest of the analysis engine.  */
+ 
+ class impl_region_model_context : public region_model_context
+ {
+  public:
+   impl_region_model_context (exploded_graph &eg,
+ 			     const exploded_node *enode_for_diag,
+ 
+ 			     /* TODO: should we be getting the ECs from the
+ 				old state, rather than the new?  */
+ 			     const program_state *old_state,
+ 			     program_state *new_state,
+ 			     state_change *change,
+ 
+ 			     const gimple *stmt,
+ 			     stmt_finder *stmt_finder = NULL);
+ 
+   impl_region_model_context (program_state *state,
+ 			     state_change *change,
+ 			     const extrinsic_state &ext_state,
+ 			     logger *logger = NULL);
+ 
+   void warn (pending_diagnostic *d) FINAL OVERRIDE;
+ 
+   void remap_svalue_ids (const svalue_id_map &map) FINAL OVERRIDE;
+ 
+   int on_svalue_purge (svalue_id first_unused_sid,
+ 		       const svalue_id_map &map) FINAL OVERRIDE;
+ 
+   logger *get_logger () FINAL OVERRIDE
+   {
+     return m_logger.get_logger ();
+   }
+ 
+   void on_state_leak (const state_machine &sm,
+ 		      int sm_idx,
+ 		      svalue_id sid,
+ 		      svalue_id first_unused_sid,
+ 		      const svalue_id_map &map,
+ 		      state_machine::state_t state);
+ 
+   void on_inherited_svalue (svalue_id parent_sid,
+ 			    svalue_id child_sid) FINAL OVERRIDE;
+ 
+   void on_cast (svalue_id src_sid,
+ 		svalue_id dst_sid) FINAL OVERRIDE;
+ 
+   void on_condition (tree lhs, enum tree_code op, tree rhs) FINAL OVERRIDE;
+ 
+   void on_unknown_change (svalue_id sid ATTRIBUTE_UNUSED) FINAL OVERRIDE;
+ 
+   void on_phi (const gphi *phi, tree rhs) FINAL OVERRIDE;
+ 
+   void on_unexpected_tree_code (tree t,
+ 				const dump_location_t &loc) FINAL OVERRIDE;
+ 
+   exploded_graph *m_eg;
+   log_user m_logger;
+   const exploded_node *m_enode_for_diag;
+   const program_state *m_old_state;
+   program_state *m_new_state;
+   state_change *m_change;
+   const gimple *m_stmt;
+   stmt_finder *m_stmt_finder;
+   const extrinsic_state &m_ext_state;
+ };
+ 
+ /* A <program_point, program_state> pair, used internally by
+    exploded_node as its immutable data, and as a key for identifying
+    exploded_nodes we've already seen in the graph.  */
+ 
+ class point_and_state
+ {
+ public:
+   point_and_state (const program_point &point,
+ 		   const program_state &state)
+   : m_point (point),
+     m_state (state),
+     m_hash (m_point.hash () ^ m_state.hash ())
+   {
+     /* We shouldn't be building point_and_states and thus exploded_nodes
+        for states that aren't valid.  */
+     gcc_assert (state.m_valid);
+   }
+ 
+   hashval_t hash () const
+   {
+     return m_hash;
+   }
+   bool operator== (const point_and_state &other) const
+   {
+     return m_point == other.m_point && m_state == other.m_state;
+   }
+ 
+   const program_point &get_point () const { return m_point; }
+   const program_state &get_state () const { return m_state; }
+ 
+   void set_state (const program_state &state)
+   {
+     m_state = state;
+     m_hash = m_point.hash () ^ m_state.hash ();
+   }
+ 
+   void validate (const extrinsic_state &ext_state) const;
+ 
+ private:
+   program_point m_point;
+   program_state m_state;
+   hashval_t m_hash;
+ };
+ 
+ /* A traits class for exploded graphs and their nodes and edges.  */
+ 
+ struct eg_traits
+ {
+   typedef exploded_node node_t;
+   typedef exploded_edge edge_t;
+   typedef exploded_graph graph_t;
+   struct dump_args_t
+   {
+     dump_args_t (const exploded_graph &eg) : m_eg (eg) {}
+     const exploded_graph &m_eg;
+   };
+   typedef exploded_cluster cluster_t;
+ };
+ 
+ /* An exploded_node is a unique, immutable <point, state> pair within the
+    exploded_graph.
+    Each exploded_node has a unique index within the graph
+    (for ease of debugging).  */
+ 
+ class exploded_node : public dnode<eg_traits>
+ {
+  public:
+   /* Has this enode had exploded_graph::process_node called on it?
+      This allows us to distinguish enodes that were merged during
+      worklist-handling, and thus never had process_node called on them
+      (in favor of processing the merged node).  */
+   enum status
+   {
+     /* Node is in the worklist.  */
+     STATUS_WORKLIST,
+ 
+     /* Node has had exploded_graph::process_node called on it.  */
+     STATUS_PROCESSED,
+ 
+     /* Node was left unprocessed due to merger; it won't have had
+        exploded_graph::process_node called on it.  */
+     STATUS_MERGER
+   };
+ 
+   exploded_node (const point_and_state &ps, int index);
+ 
+   hashval_t hash () const { return m_ps.hash (); }
+ 
+   const char * get_dot_fillcolor () const;
+   void dump_dot (graphviz_out *gv, const dump_args_t &args)
+     const FINAL OVERRIDE;
+   void dump_dot_id (pretty_printer *pp) const;
+ 
+   void dump_to_pp (pretty_printer *pp, const extrinsic_state &ext_state) const;
+   void dump (FILE *fp, const extrinsic_state &ext_state) const;
+   void dump (const extrinsic_state &ext_state) const;
+ 
+   /* The result of on_stmt.  */
+   struct on_stmt_flags
+   {
+     on_stmt_flags (bool sm_changes)
+     : m_sm_changes (sm_changes),
+       m_terminate_path (false)
+     {}
+ 
+     static on_stmt_flags terminate_path ()
+     {
+       return on_stmt_flags (true, true);
+     }
+ 
+     static on_stmt_flags state_change (bool any_sm_changes)
+     {
+       return on_stmt_flags (any_sm_changes, false);
+     }
+ 
+     /* Did any sm-changes occur handling the stmt.  */
+     bool m_sm_changes : 1;
+ 
+     /* Should we stop analyzing this path (on_stmt may have already
+        added nodes/edges, e.g. when handling longjmp).  */
+     bool m_terminate_path : 1;
+ 
+   private:
+     on_stmt_flags (bool sm_changes,
+ 		   bool terminate_path)
+     : m_sm_changes (sm_changes),
+       m_terminate_path (terminate_path)
+     {}
+   };
+ 
+   on_stmt_flags on_stmt (exploded_graph &eg,
+ 			 const supernode *snode,
+ 			 const gimple *stmt,
+ 			 program_state *state,
+ 			 state_change *change) const;
+   bool on_edge (exploded_graph &eg,
+ 		const superedge *succ,
+ 		program_point *next_point,
+ 		program_state *next_state,
+ 		state_change *change) const;
+   void on_longjmp (exploded_graph &eg,
+ 		   const gcall *call,
+ 		   program_state *new_state,
+ 		   region_model_context *ctxt) const;
+ 
+   void detect_leaks (exploded_graph &eg) const;
+ 
+   const program_point &get_point () const { return m_ps.get_point (); }
+   const supernode *get_supernode () const
+   {
+     return get_point ().get_supernode ();
+   }
+   function *get_function () const
+   {
+     return get_point ().get_function ();
+   }
+   int get_stack_depth () const
+   {
+     return get_point ().get_stack_depth ();
+   }
+   const gimple *get_stmt () const { return get_point ().get_stmt (); }
+ 
+   const program_state &get_state () const { return m_ps.get_state (); }
+ 
+   const point_and_state *get_ps_key () const { return &m_ps; }
+   const program_point *get_point_key () const { return &m_ps.get_point (); }
+ 
+   void dump_succs_and_preds (FILE *outf) const;
+ 
+   enum status get_status () const { return m_status; }
+   void set_status (enum status status)
+   {
+     gcc_assert (m_status == STATUS_WORKLIST);
+     m_status = status;
+   }
+ 
+ private:
+   DISABLE_COPY_AND_ASSIGN (exploded_node);
+ 
+   /* The <program_point, program_state> pair.  This is const, as it
+      is immutable once the exploded_node has been created.  */
+   const point_and_state m_ps;
+ 
+   enum status m_status;
+ 
+ public:
+   /* The index of this exploded_node.  */
+   const int m_index;
+ };
+ 
+ /* An edge within the exploded graph.
+    Some exploded_edges have an underlying superedge; others don't.  */
+ 
+ class exploded_edge : public dedge<eg_traits>
+ {
+  public:
+   /* Abstract base class for associating custom data with an
+      exploded_edge, for handling non-standard edges such as
+      rewinding from a longjmp, signal handlers, etc.  */
+   class custom_info_t
+   {
+   public:
+     virtual ~custom_info_t () {}
+ 
+     /* Hook for making .dot label more readable .  */
+     virtual void print (pretty_printer *pp) = 0;
+ 
+     /* Hook for updating MODEL within exploded_path::feasible_p.  */
+     virtual void update_model (region_model *model,
+ 			       const exploded_edge &eedge) = 0;
+ 
+     virtual void add_events_to_path (checker_path *emission_path,
+ 				     const exploded_edge &eedge) = 0;
+   };
+ 
+   exploded_edge (exploded_node *src, exploded_node *dest,
+ 		 const extrinsic_state &ext_state,
+ 		 const superedge *sedge,
+ 		 const state_change &change,
+ 		 custom_info_t *custom_info);
+   ~exploded_edge ();
+   void dump_dot (graphviz_out *gv, const dump_args_t &args)
+     const FINAL OVERRIDE;
+ 
+   //private:
+   const superedge *const m_sedge;
+ 
+   const state_change m_change;
+ 
+   /* NULL for most edges; will be non-NULL for special cases
+      such as an unwind from a longjmp to a setjmp, or when
+      a signal is delivered to a signal-handler.
+ 
+      Owned by this class.  */
+   custom_info_t *m_custom_info;
+ 
+ private:
+   DISABLE_COPY_AND_ASSIGN (exploded_edge);
+ };
+ 
+ /* Extra data for an exploded_edge that represents a rewind from a
+    longjmp to a setjmp (or from a siglongjmp to a sigsetjmp).  */
+ 
+ class rewind_info_t : public exploded_edge::custom_info_t
+ {
+ public:
+   rewind_info_t (const setjmp_record &setjmp_record,
+ 		 const gcall *longjmp_call)
+   : m_setjmp_record (setjmp_record),
+     m_longjmp_call (longjmp_call)
+   {}
+ 
+   void print (pretty_printer *pp) FINAL OVERRIDE
+   {
+     pp_string (pp, "rewind");
+   }
+ 
+   void update_model (region_model *model,
+ 		     const exploded_edge &eedge) FINAL OVERRIDE;
+ 
+   void add_events_to_path (checker_path *emission_path,
+ 			   const exploded_edge &eedge) FINAL OVERRIDE;
+ 
+   const program_point &get_setjmp_point () const
+   {
+     const program_point &origin_point = get_enode_origin ()->get_point ();
+ 
+     /* "origin_point" ought to be before the call to "setjmp".  */
+     gcc_assert (origin_point.get_kind () == PK_BEFORE_STMT);
+ 
+     /* TODO: assert that it's the final stmt in its supernode.  */
+ 
+     return origin_point;
+   }
+ 
+   const gcall *get_setjmp_call () const
+   {
+     return m_setjmp_record.m_setjmp_call;
+   }
+ 
+   const gcall *get_longjmp_call () const
+   {
+     return m_longjmp_call;
+   }
+ 
+   const exploded_node *get_enode_origin () const
+   {
+     return m_setjmp_record.m_enode;
+   }
+ 
+ private:
+   setjmp_record m_setjmp_record;
+   const gcall *m_longjmp_call;
+ };
+ 
+ /* Statistics about aspects of an exploded_graph.  */
+ 
+ struct stats
+ {
+   stats (int num_supernodes);
+   void log (logger *logger) const;
+   void dump (FILE *out) const;
+ 
+   int get_total_enodes () const;
+ 
+   int m_num_nodes[NUM_POINT_KINDS];
+   int m_node_reuse_count;
+   int m_node_reuse_after_merge_count;
+   int m_num_supernodes;
+ };
+ 
+ /* Traits class for ensuring uniqueness of point_and_state data within
+    an exploded_graph.  */
+ 
+ struct eg_hash_map_traits
+ {
+   typedef const point_and_state *key_type;
+   typedef exploded_node *value_type;
+   typedef exploded_node *compare_type;
+ 
+   static inline hashval_t hash (const key_type &k)
+   {
+     gcc_assert (k != NULL);
+     gcc_assert (k != reinterpret_cast<key_type> (1));
+     return k->hash ();
+   }
+   static inline bool equal_keys (const key_type &k1, const key_type &k2)
+   {
+     gcc_assert (k1 != NULL);
+     gcc_assert (k2 != NULL);
+     gcc_assert (k1 != reinterpret_cast<key_type> (1));
+     gcc_assert (k2 != reinterpret_cast<key_type> (1));
+     if (k1 && k2)
+       return *k1 == *k2;
+     else
+       /* Otherwise they must both be non-NULL.  */
+       return k1 == k2;
+   }
+   template <typename T>
+   static inline void remove (T &)
+   {
+     /* empty; the nodes are handled elsewhere.  */
+   }
+   template <typename T>
+   static inline void mark_deleted (T &entry)
+   {
+     entry.m_key = reinterpret_cast<key_type> (1);
+   }
+   template <typename T>
+   static inline void mark_empty (T &entry)
+   {
+     entry.m_key = NULL;
+   }
+   template <typename T>
+   static inline bool is_deleted (const T &entry)
+   {
+     return entry.m_key == reinterpret_cast<key_type> (1);
+   }
+   template <typename T>
+   static inline bool is_empty (const T &entry)
+   {
+     return entry.m_key == NULL;
+   }
+   static const bool empty_zero_p = false;
+ };
+ 
+ /* Per-program_point data for an exploded_graph.  */
+ 
+ struct per_program_point_data
+ {
+   per_program_point_data (const program_point &key)
+   : m_key (key), m_excess_enodes (0)
+   {}
+ 
+   const program_point m_key;
+   auto_vec<exploded_node *> m_enodes;
+   /* The number of attempts to create an enode for this point
+      after exceeding --param=analyzer-max-enodes-per-program-point.  */
+   int m_excess_enodes;
+ };
+ 
+ /* Traits class for storing per-program_point data within
+    an exploded_graph.  */
+ 
+ struct eg_point_hash_map_traits
+ {
+   typedef const program_point *key_type;
+   typedef per_program_point_data *value_type;
+   typedef per_program_point_data *compare_type;
+ 
+   static inline hashval_t hash (const key_type &k)
+   {
+     gcc_assert (k != NULL);
+     gcc_assert (k != reinterpret_cast<key_type> (1));
+     return k->hash ();
+   }
+   static inline bool equal_keys (const key_type &k1, const key_type &k2)
+   {
+     gcc_assert (k1 != NULL);
+     gcc_assert (k2 != NULL);
+     gcc_assert (k1 != reinterpret_cast<key_type> (1));
+     gcc_assert (k2 != reinterpret_cast<key_type> (1));
+     if (k1 && k2)
+       return *k1 == *k2;
+     else
+       /* Otherwise they must both be non-NULL.  */
+       return k1 == k2;
+   }
+   template <typename T>
+   static inline void remove (T &)
+   {
+     /* empty; the nodes are handled elsewhere.  */
+   }
+   template <typename T>
+   static inline void mark_deleted (T &entry)
+   {
+     entry.m_key = reinterpret_cast<key_type> (1);
+   }
+   template <typename T>
+   static inline void mark_empty (T &entry)
+   {
+     entry.m_key = NULL;
+   }
+   template <typename T>
+   static inline bool is_deleted (const T &entry)
+   {
+     return entry.m_key == reinterpret_cast<key_type> (1);
+   }
+   template <typename T>
+   static inline bool is_empty (const T &entry)
+   {
+     return entry.m_key == NULL;
+   }
+   static const bool empty_zero_p = false;
+ };
+ 
+ /* Data about a particular call_string within an exploded_graph.  */
+ 
+ struct per_call_string_data
+ {
+   per_call_string_data (const call_string &key, int num_supernodes)
+   : m_key (key), m_stats (num_supernodes)
+   {}
+ 
+   const call_string m_key;
+   stats m_stats;
+ };
+ 
+ /* Traits class for storing per-call_string data within
+    an exploded_graph.  */
+ 
+ struct eg_call_string_hash_map_traits
+ {
+   typedef const call_string *key_type;
+   typedef per_call_string_data *value_type;
+   typedef per_call_string_data *compare_type;
+ 
+   static inline hashval_t hash (const key_type &k)
+   {
+     gcc_assert (k != NULL);
+     gcc_assert (k != reinterpret_cast<key_type> (1));
+     return k->hash ();
+   }
+   static inline bool equal_keys (const key_type &k1, const key_type &k2)
+   {
+     gcc_assert (k1 != NULL);
+     gcc_assert (k2 != NULL);
+     gcc_assert (k1 != reinterpret_cast<key_type> (1));
+     gcc_assert (k2 != reinterpret_cast<key_type> (1));
+     if (k1 && k2)
+       return *k1 == *k2;
+     else
+       /* Otherwise they must both be non-NULL.  */
+       return k1 == k2;
+   }
+   template <typename T>
+   static inline void remove (T &)
+   {
+     /* empty; the nodes are handled elsewhere.  */
+   }
+   template <typename T>
+   static inline void mark_deleted (T &entry)
+   {
+     entry.m_key = reinterpret_cast<key_type> (1);
+   }
+   template <typename T>
+   static inline void mark_empty (T &entry)
+   {
+     entry.m_key = NULL;
+   }
+   template <typename T>
+   static inline bool is_deleted (const T &entry)
+   {
+     return entry.m_key == reinterpret_cast<key_type> (1);
+   }
+   template <typename T>
+   static inline bool is_empty (const T &entry)
+   {
+     return entry.m_key == NULL;
+   }
+   static const bool empty_zero_p = false;
+ };
+ 
+ /* Data about a particular function within an exploded_graph.  */
+ 
+ struct per_function_data
+ {
+   per_function_data () {}
+ 
+   void add_call_summary (exploded_node *node)
+   {
+     m_summaries.safe_push (node);
+   }
+ 
+   auto_vec<exploded_node *> m_summaries;
+ };
+ 
+ 
+ /* The strongly connected components of a supergraph.
+    In particular, this allows us to compute a partial ordering
+    of supernodes.  */
+ 
+ class strongly_connected_components
+ {
+ public:
+   strongly_connected_components (const supergraph &sg, logger *logger);
+ 
+   int get_scc_id (int node_index) const
+   {
+     return m_per_node[node_index].m_lowlink;
+   }
+ 
+   void dump () const;
+ 
+ private:
+   struct per_node_data
+   {
+     per_node_data ()
+       : m_index (-1), m_lowlink (-1), m_on_stack (false)
+     {}
+ 
+     int m_index;
+     int m_lowlink;
+     bool m_on_stack;
+   };
+ 
+   void strong_connect (unsigned index);
+ 
+   const supergraph &m_sg;
+   auto_vec<unsigned> m_stack;
+   auto_vec<per_node_data> m_per_node;
+ };
+ 
+ /* The worklist of exploded_node instances that have been added to
+    an exploded_graph, but that haven't yet been processed to find
+    their successors (or warnings).
+ 
+    The enodes are stored in a priority queue, ordered by a topological
+    sort of the SCCs in the supergraph, so that enodes for the same
+    program_point should appear at the front of the queue together.
+    This allows for state-merging at CFG join-points, so that
+    sufficiently-similar enodes can be merged into one.  */
+ 
+ class worklist
+ {
+ public:
+   worklist (const exploded_graph &eg, const analysis_plan &plan);
+   unsigned length () const;
+   exploded_node *take_next ();
+   exploded_node *peek_next ();
+   void add_node (exploded_node *enode);
+ 
+ private:
+   class key_t
+   {
+   public:
+     key_t (const worklist &w, exploded_node *enode)
+     : m_worklist (w), m_enode (enode)
+     {}
+ 
+     bool operator< (const key_t &other) const
+     {
+       return cmp (*this, other) < 0;
+     }
+ 
+     bool operator== (const key_t &other) const
+     {
+       return cmp (*this, other) == 0;
+     }
+ 
+     bool operator> (const key_t &other) const
+     {
+       return !(*this == other || *this < other);
+     }
+ 
+   private:
+     static int cmp (const key_t &ka, const key_t &kb);
+ 
+     int get_scc_id (const exploded_node *enode) const
+     {
+       const supernode *snode = enode->get_supernode ();
+       if (snode == NULL)
+ 	return 0;
+       return m_worklist.m_scc.get_scc_id (snode->m_index);
+     }
+ 
+     const worklist &m_worklist;
+     exploded_node *m_enode;
+   };
+ 
+   /* The order is important here: m_scc needs to stick around
+      until after m_queue has finished being cleaned up (the dtor
+      calls the ordering fns).  */
+   strongly_connected_components m_scc;
+   const analysis_plan &m_plan;
+ 
+   /* Priority queue, backed by a fibonacci_heap.  */
+   typedef fibonacci_heap<key_t, exploded_node> queue_t;
+   queue_t m_queue;
+ };
+ 
+ /* An exploded_graph is a directed graph of unique <point, state> pairs.
+    It also has a worklist of nodes that are waiting for their successors
+    to be added to the graph.  */
+ 
+ class exploded_graph : public digraph<eg_traits>
+ {
+ public:
+   typedef hash_map <const call_string *, per_call_string_data *,
+ 		    eg_call_string_hash_map_traits> call_string_data_map_t;
+ 
+   exploded_graph (const supergraph &sg, logger *logger,
+ 		  const extrinsic_state &ext_state,
+ 		  const state_purge_map *purge_map,
+ 		  const analysis_plan &plan,
+ 		  int verbosity);
+   ~exploded_graph ();
+ 
+   logger *get_logger () const { return m_logger.get_logger (); }
+ 
+   const supergraph &get_supergraph () const { return m_sg; }
+   const extrinsic_state &get_ext_state () const { return m_ext_state; }
+   const state_purge_map *get_purge_map () const { return m_purge_map; }
+   const analysis_plan &get_analysis_plan () const { return m_plan; }
+ 
+   exploded_node *get_origin () const { return m_origin; }
+ 
+   exploded_node *add_function_entry (function *fun);
+ 
+   void build_initial_worklist ();
+   void process_worklist ();
+   void process_node (exploded_node *node);
+ 
+   exploded_node *get_or_create_node (const program_point &point,
+ 				     const program_state &state,
+ 				     state_change *change);
+   exploded_edge *add_edge (exploded_node *src, exploded_node *dest,
+ 			   const superedge *sedge,
+ 			   const state_change &change,
+ 			   exploded_edge::custom_info_t *custom = NULL);
+ 
+   per_program_point_data *
+   get_or_create_per_program_point_data (const program_point &);
+ 
+   per_call_string_data *
+   get_or_create_per_call_string_data (const call_string &);
+ 
+   per_function_data *
+   get_or_create_per_function_data (function *);
+   per_function_data *get_per_function_data (function *) const;
+ 
+   void save_diagnostic (const state_machine &sm,
+ 			const exploded_node *enode,
+ 			const supernode *node, const gimple *stmt,
+ 			stmt_finder *finder,
+ 			tree var, state_machine::state_t state,
+ 			pending_diagnostic *d);
+ 
+   diagnostic_manager &get_diagnostic_manager ()
+   {
+     return m_diagnostic_manager;
+   }
+   const diagnostic_manager &get_diagnostic_manager () const
+   {
+     return m_diagnostic_manager;
+   }
+ 
+   stats *get_global_stats () { return &m_global_stats; }
+   stats *get_or_create_function_stats (function *fn);
+   void log_stats () const;
+   void dump_stats (FILE *) const;
+   void dump_states_for_supernode (FILE *, const supernode *snode) const;
+   void dump_exploded_nodes () const;
+ 
+   const call_string_data_map_t *get_per_call_string_data () const
+   { return &m_per_call_string_data; }
+ 
+ private:
+   void print_bar_charts (pretty_printer *pp) const;
+ 
+   DISABLE_COPY_AND_ASSIGN (exploded_graph);
+ 
+   const supergraph &m_sg;
+ 
+   log_user m_logger;
+ 
+   /* Map from point/state to exploded node.
+      To avoid duplication we store point_and_state
+      *pointers* as keys, rather than point_and_state, using the
+      instance from within the exploded_node, with a custom hasher.  */
+   typedef hash_map <const point_and_state *, exploded_node *,
+ 		    eg_hash_map_traits> map_t;
+   map_t m_point_and_state_to_node;
+ 
+   /* Map from program_point to per-program_point data.  */
+   typedef hash_map <const program_point *, per_program_point_data *,
+ 		    eg_point_hash_map_traits> point_map_t;
+   point_map_t m_per_point_data;
+ 
+   worklist m_worklist;
+ 
+   exploded_node *m_origin;
+ 
+   const extrinsic_state &m_ext_state;
+ 
+   const state_purge_map *const m_purge_map;
+ 
+   const analysis_plan &m_plan;
+ 
+   typedef hash_map<function *, per_function_data *> per_function_data_t;
+   per_function_data_t m_per_function_data;
+ 
+   diagnostic_manager m_diagnostic_manager;
+ 
+   /* Stats.  */
+   stats m_global_stats;
+   typedef ordered_hash_map<function *, stats *> function_stat_map_t;
+   function_stat_map_t m_per_function_stats;
+   stats m_functionless_stats;
+ 
+   call_string_data_map_t m_per_call_string_data;
+ 
+   auto_vec<int> m_PK_AFTER_SUPERNODE_per_snode;
+ };
+ 
+ /* A path within an exploded_graph: a sequence of edges.  */
+ 
+ class exploded_path
+ {
+ public:
+   exploded_path () : m_edges () {}
+   exploded_path (const exploded_path &other);
+   exploded_path & operator= (const exploded_path &other);
+ 
+   unsigned length () const { return m_edges.length (); }
+ 
+   bool find_stmt_backwards (const gimple *search_stmt,
+ 			    int *out_idx) const;
+ 
+   exploded_node *get_final_enode () const;
+ 
+   void dump_to_pp (pretty_printer *pp) const;
+   void dump (FILE *fp) const;
+   void dump () const;
+ 
+   bool feasible_p (logger *logger, feasibility_problem **out) const;
+ 
+   auto_vec<const exploded_edge *> m_edges;
+ };
+ 
+ /* A reason why a particular exploded_path is infeasible.  */
+ 
+ class feasibility_problem
+ {
+ public:
+   feasibility_problem (unsigned eedge_idx,
+ 		       const region_model &model,
+ 		       const exploded_edge &eedge,
+ 		       const gimple *last_stmt)
+   : m_eedge_idx (eedge_idx), m_model (model), m_eedge (eedge),
+     m_last_stmt (last_stmt)
+   {}
+ 
+   unsigned m_eedge_idx;
+   region_model m_model;
+   const exploded_edge &m_eedge;
+   const gimple *m_last_stmt;
+ };
+ 
+ /* Finding the shortest exploded_path within an exploded_graph.  */
+ 
+ typedef shortest_paths<eg_traits, exploded_path> shortest_exploded_paths;
+ 
+ /* Abstract base class for use when passing NULL as the stmt for
+    a possible warning, allowing the choice of stmt to be deferred
+    until after we have an emission path (and know we're emitting a
+    warning).  */
+ 
+ class stmt_finder
+ {
+ public:
+   virtual ~stmt_finder () {}
+   virtual stmt_finder *clone () const = 0;
+   virtual const gimple *find_stmt (const exploded_path &epath) = 0;
+ };
+ 
+ // TODO: split the above up?
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_EXPLODED_GRAPH_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/function-set.cc gcc-10.1.0/gcc/analyzer/function-set.cc
*** gcc-9.3.0/gcc/analyzer/function-set.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/function-set.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,197 ----
+ /* Sets of function names.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "selftest.h"
+ #include "analyzer/function-set.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ /* Return true if NAME is within this set.  */
+ 
+ bool
+ function_set::contains_name_p (const char *name) const
+ {
+   /* Binary search.  */
+   int min = 0;
+   int max = m_count - 1;
+   while (true)
+     {
+       if (min > max)
+ 	return false;
+       int midpoint = (min + max) / 2;
+       gcc_assert ((size_t)midpoint < m_count);
+       int cmp = strcmp (name, m_names[midpoint]);
+       if (cmp == 0)
+ 	return true;
+       else if (cmp < 0)
+ 	max = midpoint - 1;
+       else
+ 	min = midpoint + 1;
+     }
+ }
+ 
+ /* Return true if FNDECL is within this set.  */
+ 
+ bool
+ function_set::contains_decl_p (tree fndecl) const
+ {
+   gcc_assert (fndecl && DECL_P (fndecl));
+   if (!maybe_special_function_p (fndecl))
+     return false;
+   return contains_name_p (IDENTIFIER_POINTER (DECL_NAME (fndecl)));
+ }
+ 
+ /* Assert that the list of names is in sorted order.  */
+ 
+ void
+ function_set::assert_sorted () const
+ {
+ #if CHECKING_P
+   for (size_t idx = 1; idx < m_count; idx++)
+     gcc_assert (strcmp (m_names[idx - 1], m_names[idx]) < 0);
+ #endif /* #if CHECKING_P  */
+ }
+ 
+ /* Assert that contains_p is true for all members of the set.  */
+ 
+ void
+ function_set::assert_sane () const
+ {
+ #if CHECKING_P
+   for (size_t i = 0; i < m_count; i++)
+     gcc_assert (contains_name_p (m_names[i]));
+ #endif /* #if CHECKING_P  */
+ }
+ 
+ #if CHECKING_P
+ 
+ namespace selftest {
+ 
+ /* Verify that an empty function_set works as expected.  */
+ 
+ static void
+ test_empty ()
+ {
+   function_set fs (NULL, 0);
+   fs.assert_sorted ();
+   fs.assert_sane ();
+   ASSERT_FALSE (fs.contains_name_p (""));
+   ASSERT_FALSE (fs.contains_name_p ("haystack"));
+ }
+ 
+ /* Verify that a function_set with an odd number of elements works as
+    expected.  */
+ 
+ static void
+ test_odd ()
+ {
+   static const char * const names[3] = {"alpha", "beta", "gamma"};
+   function_set fs (names, 3);
+   fs.assert_sorted ();
+   fs.assert_sane ();
+   ASSERT_FALSE (fs.contains_name_p (""));
+   ASSERT_FALSE (fs.contains_name_p ("haystack"));
+ }
+ 
+ /* Verify that a function_set with an even number of elements works as
+    expected.  */
+ 
+ static void
+ test_even ()
+ {
+   static const char * const names[3] = {"alpha", "beta"};
+   function_set fs (names, 2);
+   fs.assert_sorted ();
+   fs.assert_sane ();
+   ASSERT_FALSE (fs.contains_name_p (""));
+   ASSERT_FALSE (fs.contains_name_p ("haystack"));
+ }
+ 
+ /* Verify that a function_set with some nontrivial stdio.h data works as
+    expected.  */
+ 
+ static void
+ test_stdio_example ()
+ {
+   static const char * const example[] = {
+     "__fbufsize",
+     "__flbf",
+     "__fpending",
+     "__fpurge",
+     "__freadable",
+     "__freading",
+     "__fsetlocking",
+     "__fwritable",
+     "__fwriting",
+     "clearerr_unlocked",
+     "feof_unlocked",
+     "ferror_unlocked",
+     "fflush_unlocked",
+     "fgetc_unlocked",
+     "fgets",
+     "fgets_unlocked",
+     "fgetwc_unlocked",
+     "fgetws_unlocked",
+     "fileno_unlocked",
+     "fputc_unlocked",
+     "fputs_unlocked",
+     "fputwc_unlocked",
+     "fputws_unlocked",
+     "fread_unlocked",
+     "fwrite_unlocked",
+     "getc_unlocked",
+     "getwc_unlocked",
+     "putc_unlocked"
+   };
+   const size_t count = sizeof(example) / sizeof (example[0]);
+   function_set fs (example, count);
+   fs.assert_sorted ();
+   fs.assert_sane ();
+   /* Examples of strings not present: before, after and alongside the
+      sorted list.  */
+   ASSERT_FALSE (fs.contains_name_p ("___"));
+   ASSERT_FALSE (fs.contains_name_p ("Z"));
+   ASSERT_FALSE (fs.contains_name_p ("fgets_WITH_A_PREFIX"));
+ }
+ 
+ /* Run all of the selftests within this file.  */
+ 
+ void
+ analyzer_function_set_cc_tests ()
+ {
+   test_empty ();
+   test_odd ();
+   test_even ();
+   test_stdio_example ();
+ }
+ 
+ } // namespace selftest
+ 
+ #endif /* CHECKING_P */
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/function-set.h gcc-10.1.0/gcc/analyzer/function-set.h
*** gcc-9.3.0/gcc/analyzer/function-set.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/function-set.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,50 ----
+ /* Sets of function names.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_FUNCTION_SET_H
+ #define GCC_ANALYZER_FUNCTION_SET_H
+ 
+ namespace ana {
+ 
+ /* A set of names.  */
+ 
+ class function_set
+ {
+ public:
+   /* Construct from a sorted array NAMES of size COUNT.  */
+   function_set (const char * const *names, size_t count)
+   : m_names (names), m_count (count)
+   {
+   }
+ 
+   bool contains_name_p (const char *name) const;
+   bool contains_decl_p (tree fndecl) const;
+ 
+   void assert_sorted () const;
+   void assert_sane () const;
+ 
+ private:
+   const char * const *m_names; // must be sorted
+   size_t m_count;
+ };
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_FUNCTION_SET_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/pending-diagnostic.cc gcc-10.1.0/gcc/analyzer/pending-diagnostic.cc
*** gcc-9.3.0/gcc/analyzer/pending-diagnostic.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/pending-diagnostic.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,83 ----
+ /* Classes for analyzer diagnostics.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "intl.h"
+ #include "diagnostic.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "diagnostic-event-id.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/sm.h"
+ #include "diagnostic-event-id.h"
+ #include "analyzer/sm.h"
+ #include "analyzer/pending-diagnostic.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ /* Generate a label_text by printing FMT.
+ 
+    Use a clone of the global_dc for formatting callbacks.
+ 
+    Use this evdesc::event_desc's m_colorize flag to control colorization
+    (so that e.g. we can disable it for JSON output).  */
+ 
+ label_text
+ evdesc::event_desc::formatted_print (const char *fmt, ...) const
+ {
+   pretty_printer *pp = global_dc->printer->clone ();
+ 
+   pp_show_color (pp) = m_colorize;
+ 
+   text_info ti;
+   rich_location rich_loc (line_table, UNKNOWN_LOCATION);
+   va_list ap;
+   va_start (ap, fmt);
+   ti.format_spec = _(fmt);
+   ti.args_ptr = &ap;
+   ti.err_no = 0;
+   ti.x_data = NULL;
+   ti.m_richloc = &rich_loc;
+   pp_format (pp, &ti);
+   pp_output_formatted_text (pp);
+   va_end (ap);
+ 
+   label_text result = label_text::take (xstrdup (pp_formatted_text (pp)));
+   delete pp;
+   return result;
+ }
+ 
+ /* Return true if T1 and T2 are "the same" for the purposes of
+    diagnostic deduplication.  */
+ 
+ bool
+ pending_diagnostic::same_tree_p (tree t1, tree t2)
+ {
+   return simple_cst_equal (t1, t2) == 1;
+ }
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/pending-diagnostic.h gcc-10.1.0/gcc/analyzer/pending-diagnostic.h
*** gcc-9.3.0/gcc/analyzer/pending-diagnostic.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/pending-diagnostic.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,274 ----
+ /* Classes for analyzer diagnostics.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_PENDING_DIAGNOSTIC_H
+ #define GCC_ANALYZER_PENDING_DIAGNOSTIC_H
+ 
+ namespace ana {
+ 
+ /* Various bundles of information used for generating more precise
+    messages for events within a diagnostic_path, for passing to the
+    various "describe_*" vfuncs of pending_diagnostic.  See those
+    for more information.  */
+ 
+ namespace evdesc {
+ 
+ struct event_desc
+ {
+   event_desc (bool colorize) : m_colorize (colorize) {}
+ 
+   label_text formatted_print (const char *fmt, ...) const
+     ATTRIBUTE_GCC_DIAG(2,3);
+ 
+   bool m_colorize;
+ };
+ 
+ /* For use by pending_diagnostic::describe_state_change.  */
+ 
+ struct state_change : public event_desc
+ {
+   state_change (bool colorize,
+ 		tree expr,
+ 		tree origin,
+ 		state_machine::state_t old_state,
+ 		state_machine::state_t new_state,
+ 		diagnostic_event_id_t event_id,
+ 		const state_change_event &event)
+   : event_desc (colorize),
+     m_expr (expr), m_origin (origin),
+     m_old_state (old_state), m_new_state (new_state),
+     m_event_id (event_id), m_event (event)
+   {}
+ 
+   bool is_global_p () const { return m_expr == NULL_TREE; }
+ 
+   tree m_expr;
+   tree m_origin;
+   state_machine::state_t m_old_state;
+   state_machine::state_t m_new_state;
+   diagnostic_event_id_t m_event_id;
+   const state_change_event &m_event;
+ };
+ 
+ /* For use by pending_diagnostic::describe_call_with_state.  */
+ 
+ struct call_with_state : public event_desc
+ {
+   call_with_state (bool colorize,
+ 		   tree caller_fndecl, tree callee_fndecl,
+ 		   tree expr, state_machine::state_t state)
+   : event_desc (colorize),
+     m_caller_fndecl (caller_fndecl),
+     m_callee_fndecl (callee_fndecl),
+     m_expr (expr),
+     m_state (state)
+   {
+   }
+ 
+   tree m_caller_fndecl;
+   tree m_callee_fndecl;
+   tree m_expr;
+   state_machine::state_t m_state;
+ };
+ 
+ /* For use by pending_diagnostic::describe_return_of_state.  */
+ 
+ struct return_of_state : public event_desc
+ {
+   return_of_state (bool colorize,
+ 		   tree caller_fndecl, tree callee_fndecl,
+ 		   state_machine::state_t state)
+   : event_desc (colorize),
+     m_caller_fndecl (caller_fndecl),
+     m_callee_fndecl (callee_fndecl),
+     m_state (state)
+   {
+   }
+ 
+   tree m_caller_fndecl;
+   tree m_callee_fndecl;
+   state_machine::state_t m_state;
+ };
+ 
+ /* For use by pending_diagnostic::describe_final_event.  */
+ 
+ struct final_event : public event_desc
+ {
+   final_event (bool colorize,
+ 	       tree expr, state_machine::state_t state)
+   : event_desc (colorize),
+     m_expr (expr), m_state (state)
+   {}
+ 
+   tree m_expr;
+   state_machine::state_t m_state;
+ };
+ 
+ } /* end of namespace evdesc */
+ 
+ /* An abstract base class for capturing information about a diagnostic in
+    a form that is ready to emit at a later point (or be rejected).
+    Each kind of diagnostic will have a concrete subclass of
+    pending_diagnostic.
+ 
+    Normally, gcc diagnostics are emitted using va_list, which can't be
+    portably stored for later use, so we have to use an "emit" virtual
+    function.
+ 
+    This class also supports comparison, so that multiple pending_diagnostic
+    instances can be de-duplicated.
+ 
+    As well as emitting a diagnostic, the class has various "precision of
+    wording" virtual functions, for generating descriptions for events
+    within a diagnostic_path.  These are optional, but implementing these
+    allows for more precise wordings than the more generic
+    implementation.  */
+ 
+ class pending_diagnostic
+ {
+  public:
+   virtual ~pending_diagnostic () {}
+ 
+   /* Vfunc for emitting the diagnostic.  The rich_location will have been
+      populated with a diagnostic_path.
+      Return true if a diagnostic is actually emitted.  */
+   virtual bool emit (rich_location *) = 0;
+ 
+   /* Hand-coded RTTI: get an ID for the subclass.  */
+   virtual const char *get_kind () const = 0;
+ 
+   /* Compare for equality with OTHER, which might be of a different
+      subclass.  */
+ 
+   bool equal_p (const pending_diagnostic &other)
+   {
+     /* Check for pointer equality on the IDs from get_kind.  */
+     if (get_kind () != other.get_kind ())
+       return false;
+     /* Call vfunc now we know they have the same ID: */
+     return subclass_equal_p (other);
+   }
+ 
+   /* A vfunc for testing for equality, where we've already
+      checked they have the same ID.  See pending_diagnostic_subclass
+      below for a convenience subclass for implementing this.  */
+   virtual bool subclass_equal_p (const pending_diagnostic &other) const = 0;
+ 
+   /* Return true if T1 and T2 are "the same" for the purposes of
+      diagnostic deduplication.  */
+   static bool same_tree_p (tree t1, tree t2);
+ 
+   /* For greatest precision-of-wording, the various following "describe_*"
+      virtual functions give the pending diagnostic a way to describe events
+      in a diagnostic_path in terms that make sense for that diagnostic.
+ 
+      In each case, return a non-NULL label_text to give the event a custom
+      description; NULL otherwise (falling back on a more generic
+      description).  */
+ 
+   /* Precision-of-wording vfunc for describing a critical state change
+      within the diagnostic_path.
+ 
+      For example, a double-free diagnostic might use the descriptions:
+      - "first 'free' happens here"
+      - "second 'free' happens here"
+      for the pertinent events, whereas a use-after-free might use the
+      descriptions:
+      - "freed here"
+      - "use after free here"
+      Note how in both cases the first event is a "free": the best
+      description to use depends on the diagnostic.  */
+ 
+   virtual label_text describe_state_change (const evdesc::state_change &)
+   {
+     /* Default no-op implementation.  */
+     return label_text ();
+   }
+ 
+   /* Precision-of-wording vfunc for describing an interprocedural call
+      carrying critial state for the diagnostic, from caller to callee.
+ 
+      For example a double-free diagnostic might use:
+      - "passing freed pointer 'ptr' in call to 'deallocator' from 'test'"
+      to make it clearer how the freed value moves from caller to
+      callee.  */
+ 
+   virtual label_text describe_call_with_state (const evdesc::call_with_state &)
+   {
+     /* Default no-op implementation.  */
+     return label_text ();
+   }
+ 
+   /* Precision-of-wording vfunc for describing an interprocedural return
+      within the diagnostic_path that carries critial state for the
+      diagnostic, from callee back to caller.
+ 
+      For example, a deref-of-unchecked-malloc diagnostic might use:
+      - "returning possibly-NULL pointer to 'make_obj' from 'allocator'"
+      to make it clearer how the unchecked value moves from callee
+      back to caller.  */
+ 
+   virtual label_text describe_return_of_state (const evdesc::return_of_state &)
+   {
+     /* Default no-op implementation.  */
+     return label_text ();
+   }
+ 
+   /* Precision-of-wording vfunc for describing the final event within a
+      diagnostic_path.
+ 
+      For example a double-free diagnostic might use:
+       - "second 'free' here; first 'free' was at (3)"
+      and a use-after-free might use
+       - "use after 'free' here; memory was freed at (2)".  */
+ 
+   virtual label_text describe_final_event (const evdesc::final_event &)
+   {
+     /* Default no-op implementation.  */
+     return label_text ();
+   }
+ 
+   /* End of precision-of-wording vfuncs.  */
+ };
+ 
+ /* A template to make it easier to make subclasses of pending_diagnostic.
+ 
+    This uses the curiously-recurring template pattern, to implement
+    pending_diagnostic::subclass_equal_p by casting and calling
+    the operator==
+ 
+    This assumes that BASE_OTHER has already been checked to have
+    been of the same subclass (which pending_diagnostic::equal_p does).  */
+ 
+ template <class Subclass>
+ class pending_diagnostic_subclass : public pending_diagnostic
+ {
+  public:
+   bool subclass_equal_p (const pending_diagnostic &base_other) const
+     FINAL OVERRIDE
+   {
+     const Subclass &other = (const Subclass &)base_other;
+     return *(const Subclass*)this == other;
+   }
+ };
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_PENDING_DIAGNOSTIC_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/program-point.cc gcc-10.1.0/gcc/analyzer/program-point.cc
*** gcc-9.3.0/gcc/analyzer/program-point.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/program-point.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,559 ----
+ /* Classes for representing locations within the program.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "gimple-pretty-print.h"
+ #include "gcc-rich-location.h"
+ #include "analyzer/call-string.h"
+ #include "ordered-hash-map.h"
+ #include "options.h"
+ #include "cgraph.h"
+ #include "function.h"
+ #include "cfg.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "gimple-iterator.h"
+ #include "digraph.h"
+ #include "analyzer/analyzer.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/supergraph.h"
+ #include "analyzer/program-point.h"
+ #include "sbitmap.h"
+ #include "bitmap.h"
+ #include "tristate.h"
+ #include "selftest.h"
+ #include "analyzer/region-model.h"
+ #include "analyzer/sm.h"
+ #include "analyzer/program-state.h"
+ #include "alloc-pool.h"
+ #include "fibonacci_heap.h"
+ #include "diagnostic-event-id.h"
+ #include "analyzer/pending-diagnostic.h"
+ #include "analyzer/diagnostic-manager.h"
+ #include "shortest-paths.h"
+ #include "analyzer/exploded-graph.h"
+ #include "analyzer/analysis-plan.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ /* Get a string for PK.  */
+ 
+ const char *
+ point_kind_to_string (enum point_kind pk)
+ {
+   switch (pk)
+     {
+     default:
+       gcc_unreachable ();
+     case PK_ORIGIN:
+       return "PK_ORIGIN";
+     case PK_BEFORE_SUPERNODE:
+       return "PK_BEFORE_SUPERNODE";
+     case PK_BEFORE_STMT:
+       return "PK_BEFORE_STMT";
+     case PK_AFTER_SUPERNODE:
+       return "PK_AFTER_SUPERNODE";
+     case PK_EMPTY:
+       return "PK_EMPTY";
+     case PK_DELETED:
+       return "PK_DELETED";
+     }
+ }
+ 
+ /* class function_point.  */
+ 
+ /* Print this function_point to PP.  */
+ 
+ void
+ function_point::print (pretty_printer *pp, const format &f) const
+ {
+   switch (get_kind ())
+     {
+     default:
+       gcc_unreachable ();
+ 
+     case PK_ORIGIN:
+       pp_printf (pp, "origin");
+       break;
+ 
+     case PK_BEFORE_SUPERNODE:
+       {
+ 	if (m_from_edge)
+ 	  pp_printf (pp, "before SN: %i (from SN: %i)",
+ 		     m_supernode->m_index, m_from_edge->m_src->m_index);
+ 	else
+ 	  pp_printf (pp, "before SN: %i (NULL from-edge)",
+ 		     m_supernode->m_index);
+ 	f.spacer (pp);
+ 	for (gphi_iterator gpi
+ 	       = const_cast<supernode *>(get_supernode ())->start_phis ();
+ 	     !gsi_end_p (gpi); gsi_next (&gpi))
+ 	  {
+ 	    const gphi *phi = gpi.phi ();
+ 	    pp_gimple_stmt_1 (pp, phi, 0, (dump_flags_t)0);
+ 	  }
+       }
+       break;
+ 
+     case PK_BEFORE_STMT:
+       pp_printf (pp, "before (SN: %i stmt: %i): ", m_supernode->m_index,
+ 		 m_stmt_idx);
+       f.spacer (pp);
+       pp_gimple_stmt_1 (pp, get_stmt (), 0, (dump_flags_t)0);
+       if (f.m_newlines)
+ 	{
+ 	  pp_newline (pp);
+ 	  print_source_line (pp);
+ 	}
+       break;
+ 
+     case PK_AFTER_SUPERNODE:
+       pp_printf (pp, "after SN: %i", m_supernode->m_index);
+       break;
+     }
+ }
+ 
+ /* Generate a hash value for this function_point.  */
+ 
+ hashval_t
+ function_point::hash () const
+ {
+   inchash::hash hstate;
+   if (m_supernode)
+     hstate.add_int (m_supernode->m_index);
+   hstate.add_ptr (m_from_edge);
+   hstate.add_int (m_stmt_idx);
+   hstate.add_int (m_kind);
+   return hstate.end ();
+ }
+ 
+ /* Get the gimple stmt for this function_point, if any.  */
+ 
+ const gimple *
+ function_point::get_stmt () const
+ {
+   if (m_kind == PK_BEFORE_STMT)
+     return m_supernode->m_stmts[m_stmt_idx];
+   else if (m_kind == PK_AFTER_SUPERNODE)
+     return m_supernode->get_last_stmt ();
+   else
+     return NULL;
+ }
+ 
+ /* Get a location for this function_point, if any.  */
+ 
+ location_t
+ function_point::get_location () const
+ {
+   const gimple *stmt = get_stmt ();
+   if (stmt)
+     return stmt->location;
+ 
+   return UNKNOWN_LOCATION;
+ }
+ 
+ /* A subclass of diagnostic_context for use by
+    program_point::print_source_line.  */
+ 
+ class debug_diagnostic_context : public diagnostic_context
+ {
+ public:
+   debug_diagnostic_context ()
+   {
+     diagnostic_initialize (this, 0);
+     show_line_numbers_p = true;
+     show_caret = true;
+   }
+   ~debug_diagnostic_context ()
+   {
+     diagnostic_finish (this);
+   }
+ };
+ 
+ /* Print the source line (if any) for this function_point to PP.  */
+ 
+ void
+ function_point::print_source_line (pretty_printer *pp) const
+ {
+   const gimple *stmt = get_stmt ();
+   if (!stmt)
+     return;
+   // TODO: monospace font
+   debug_diagnostic_context tmp_dc;
+   gcc_rich_location richloc (stmt->location);
+   diagnostic_show_locus (&tmp_dc, &richloc, DK_ERROR);
+   pp_string (pp, pp_formatted_text (tmp_dc.printer));
+ }
+ 
+ /* class program_point.  */
+ 
+ /* Print this program_point to PP.  */
+ 
+ void
+ program_point::print (pretty_printer *pp, const format &f) const
+ {
+   pp_string (pp, "callstring: ");
+   m_call_string.print (pp);
+   f.spacer (pp);
+ 
+   m_function_point.print (pp, f);
+ }
+ 
+ /* Dump this point to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ program_point::dump () const
+ {
+   pretty_printer pp;
+   pp_show_color (&pp) = pp_show_color (global_dc->printer);
+   pp.buffer->stream = stderr;
+   print (&pp, format (true));
+   pp_flush (&pp);
+ }
+ 
+ /* Generate a hash value for this program_point.  */
+ 
+ hashval_t
+ program_point::hash () const
+ {
+   inchash::hash hstate;
+   hstate.merge_hash (m_function_point.hash ());
+   hstate.merge_hash (m_call_string.hash ());
+   return hstate.end ();
+ }
+ 
+ /* Get the function * at DEPTH within the call stack.  */
+ 
+ function *
+ program_point::get_function_at_depth (unsigned depth) const
+ {
+   gcc_assert (depth <= m_call_string.length ());
+   if (depth == m_call_string.length ())
+     return m_function_point.get_function ();
+   else
+     return m_call_string[depth]->get_caller_function ();
+ }
+ 
+ /* Assert that this object is sane.  */
+ 
+ void
+ program_point::validate () const
+ {
+   /* Skip this in a release build.  */
+ #if !CHECKING_P
+   return;
+ #endif
+ 
+   m_call_string.validate ();
+   /* The "callee" of the final entry in the callstring should be the
+      function of the m_function_point.  */
+   if (m_call_string.length () > 0)
+     gcc_assert (m_call_string[m_call_string.length () - 1]->get_callee_function ()
+ 		== get_function ());
+ }
+ 
+ /* Check to see if SUCC is a valid edge to take (ensuring that we have
+    interprocedurally valid paths in the exploded graph, and enforcing
+    recursion limits).
+ 
+    Update the call string if SUCC is a call or a return.
+ 
+    Return true if SUCC can be taken, or false otherwise.
+ 
+    This is the "point" half of exploded_node::on_edge.  */
+ 
+ bool
+ program_point::on_edge (exploded_graph &eg,
+ 			const superedge *succ)
+ {
+   logger * const logger = eg.get_logger ();
+   LOG_FUNC (logger);
+   switch (succ->m_kind)
+     {
+     case SUPEREDGE_CFG_EDGE:
+       {
+ 	const cfg_superedge *cfg_sedge = as_a <const cfg_superedge *> (succ);
+ 
+ 	/* Reject abnormal edges; we special-case setjmp/longjmp.  */
+ 	if (cfg_sedge->get_flags () & EDGE_ABNORMAL)
+ 	  return false;
+       }
+       break;
+ 
+     case SUPEREDGE_CALL:
+       {
+ 	const call_superedge *call_sedge = as_a <const call_superedge *> (succ);
+ 
+ 	if (eg.get_analysis_plan ().use_summary_p (call_sedge->m_cedge))
+ 	  {
+ 	    if (logger)
+ 	      logger->log ("rejecting call edge: using summary instead");
+ 	    return false;
+ 	  }
+ 
+ 	/* Add the callsite to the call string.  */
+ 	m_call_string.push_call (eg.get_supergraph (), call_sedge);
+ 
+ 	/* Impose a maximum recursion depth and don't analyze paths
+ 	   that exceed it further.
+ 	   This is something of a blunt workaround, but it only
+ 	   applies to recursion (and mutual recursion), not to
+ 	   general call stacks.  */
+ 	if (m_call_string.calc_recursion_depth ()
+ 	    > param_analyzer_max_recursion_depth)
+ 	  {
+ 	    if (logger)
+ 	      logger->log ("rejecting call edge: recursion limit exceeded");
+ 	    // TODO: issue a sorry for this?
+ 	    return false;
+ 	  }
+       }
+       break;
+ 
+     case SUPEREDGE_RETURN:
+       {
+ 	/* Require that we return to the call site in the call string.  */
+ 	if (m_call_string.empty_p ())
+ 	  {
+ 	    if (logger)
+ 	      logger->log ("rejecting return edge: empty call string");
+ 	    return false;
+ 	  }
+ 	const return_superedge *top_of_stack = m_call_string.pop ();
+ 	if (top_of_stack != succ)
+ 	  {
+ 	    if (logger)
+ 	      logger->log ("rejecting return edge: return to wrong callsite");
+ 	    return false;
+ 	  }
+       }
+       break;
+ 
+     case SUPEREDGE_INTRAPROCEDURAL_CALL:
+       {
+ 	const callgraph_superedge *cg_sedge
+ 	  = as_a <const callgraph_superedge *> (succ);
+ 	/* Consider turning this edge into a use of an
+ 	   interprocedural summary.  */
+ 	if (eg.get_analysis_plan ().use_summary_p (cg_sedge->m_cedge))
+ 	  {
+ 	    if (logger)
+ 	      logger->log ("using function summary for %qE in %qE",
+ 			   cg_sedge->get_callee_decl (),
+ 			   cg_sedge->get_caller_decl ());
+ 	    return true;
+ 	  }
+ 	else
+ 	  {
+ 	    /* Otherwise, we ignore these edges  */
+ 	    if (logger)
+ 	      logger->log ("rejecting interprocedural edge");
+ 	    return false;
+ 	  }
+       }
+     }
+ 
+   return true;
+ }
+ 
+ /* Comparator for program points within the same supernode,
+    for implementing worklist::key_t comparison operators.
+    Return negative if POINT_A is before POINT_B
+    Return positive if POINT_A is after POINT_B
+    Return 0 if they are equal.  */
+ 
+ int
+ function_point::cmp_within_supernode_1 (const function_point &point_a,
+ 					const function_point &point_b)
+ {
+   gcc_assert (point_a.get_supernode () == point_b.get_supernode ());
+ 
+   switch (point_a.m_kind)
+     {
+     default:
+       gcc_unreachable ();
+     case PK_BEFORE_SUPERNODE:
+       switch (point_b.m_kind)
+ 	{
+ 	default:
+ 	  gcc_unreachable ();
+ 	case PK_BEFORE_SUPERNODE:
+ 	  {
+ 	    int a_src_idx = -1;
+ 	    int b_src_idx = -1;
+ 	    if (point_a.m_from_edge)
+ 	      a_src_idx = point_a.m_from_edge->m_src->m_index;
+ 	    if (point_b.m_from_edge)
+ 	      b_src_idx = point_b.m_from_edge->m_src->m_index;
+ 	    return a_src_idx - b_src_idx;
+ 	  }
+ 	  break;
+ 
+ 	case PK_BEFORE_STMT:
+ 	case PK_AFTER_SUPERNODE:
+ 	  return -1;
+ 	}
+       break;
+     case PK_BEFORE_STMT:
+       switch (point_b.m_kind)
+ 	{
+ 	default:
+ 	  gcc_unreachable ();
+ 	case PK_BEFORE_SUPERNODE:
+ 	  return 1;
+ 
+ 	case PK_BEFORE_STMT:
+ 	  return point_a.m_stmt_idx - point_b.m_stmt_idx;
+ 
+ 	case PK_AFTER_SUPERNODE:
+ 	  return -1;
+ 	}
+       break;
+     case PK_AFTER_SUPERNODE:
+       switch (point_b.m_kind)
+ 	{
+ 	default:
+ 	  gcc_unreachable ();
+ 	case PK_BEFORE_SUPERNODE:
+ 	case PK_BEFORE_STMT:
+ 	  return 1;
+ 
+ 	case PK_AFTER_SUPERNODE:
+ 	  return 0;
+ 	}
+       break;
+     }
+ }
+ 
+ /* Comparator for program points within the same supernode,
+    for implementing worklist::key_t comparison operators.
+    Return negative if POINT_A is before POINT_B
+    Return positive if POINT_A is after POINT_B
+    Return 0 if they are equal.  */
+ 
+ int
+ function_point::cmp_within_supernode (const function_point &point_a,
+ 				      const function_point &point_b)
+ {
+   int result = cmp_within_supernode_1 (point_a, point_b);
+ 
+   /* Check that the ordering is symmetric  */
+ #if CHECKING_P
+   int reversed = cmp_within_supernode_1 (point_b, point_a);
+   gcc_assert (reversed == -result);
+ #endif
+ 
+   return result;
+ }
+ 
+ #if CHECKING_P
+ 
+ namespace selftest {
+ 
+ /* Verify that function_point::operator== works as expected.  */
+ 
+ static void
+ test_function_point_equality ()
+ {
+   const supernode *snode = NULL;
+ 
+   function_point a = function_point (snode, NULL, 0,
+ 				     PK_BEFORE_SUPERNODE);
+   function_point b = function_point::before_supernode (snode, NULL);
+   ASSERT_EQ (a, b);
+ }
+ 
+ /* Verify that function_point::cmp_within_supernode works as expected.  */
+ 
+ static void
+ test_function_point_ordering ()
+ {
+   const supernode *snode = NULL;
+   const call_string call_string;
+ 
+   /* Populate an array with various points within the same
+      snode, in order.  */
+   auto_vec<function_point> points;
+   points.safe_push (function_point::before_supernode (snode, NULL));
+   points.safe_push (function_point::before_stmt (snode, 0));
+   points.safe_push (function_point::before_stmt (snode, 1));
+   points.safe_push (function_point::after_supernode (snode));
+ 
+   /* Check all pairs.  */
+   unsigned i;
+   function_point *point_a;
+   FOR_EACH_VEC_ELT (points, i, point_a)
+     {
+       unsigned j;
+       function_point *point_b;
+       FOR_EACH_VEC_ELT (points, j, point_b)
+ 	{
+ 	  int cmp = function_point::cmp_within_supernode (*point_a, *point_b);
+ 	  if (i == j)
+ 	    ASSERT_EQ (cmp, 0);
+ 	  if (i < j)
+ 	    ASSERT_TRUE (cmp < 0);
+ 	  if (i > j)
+ 	    ASSERT_TRUE (cmp > 0);
+ 	}
+     }
+ }
+ 
+ /* Verify that program_point::operator== works as expected.  */
+ 
+ static void
+ test_program_point_equality ()
+ {
+   const supernode *snode = NULL;
+ 
+   const call_string cs;
+ 
+   program_point a = program_point::before_supernode (snode, NULL,
+ 						     cs);
+ 
+   program_point b = program_point::before_supernode (snode, NULL,
+ 						     cs);
+ 
+   ASSERT_EQ (a, b);
+   // TODO: verify with non-empty callstrings, with different edges
+ }
+ 
+ /* Run all of the selftests within this file.  */
+ 
+ void
+ analyzer_program_point_cc_tests ()
+ {
+   test_function_point_equality ();
+   test_function_point_ordering ();
+   test_program_point_equality ();
+ }
+ 
+ } // namespace selftest
+ 
+ #endif /* CHECKING_P */
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/program-point.h gcc-10.1.0/gcc/analyzer/program-point.h
*** gcc-9.3.0/gcc/analyzer/program-point.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/program-point.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,314 ----
+ /* Classes for representing locations within the program.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_PROGRAM_POINT_H
+ #define GCC_ANALYZER_PROGRAM_POINT_H
+ 
+ namespace ana {
+ 
+ class exploded_graph;
+ 
+ /* An enum for distinguishing the various kinds of program_point.  */
+ 
+ enum point_kind {
+   /* A "fake" node which has edges to all entrypoints.  */
+   PK_ORIGIN,
+ 
+   PK_BEFORE_SUPERNODE,
+   PK_BEFORE_STMT,
+   PK_AFTER_SUPERNODE,
+ 
+   /* Special values used for hash_map:  */
+   PK_EMPTY,
+   PK_DELETED,
+ 
+   NUM_POINT_KINDS
+ };
+ 
+ extern const char *point_kind_to_string (enum point_kind pk);
+ 
+ class format
+ {
+ public:
+   format (bool newlines) : m_newlines (newlines) {}
+ 
+   void spacer (pretty_printer *pp) const
+   {
+     if (m_newlines)
+       pp_newline (pp);
+     else
+       pp_space (pp);
+   }
+ 
+   bool m_newlines;
+ };
+ 
+ /* A class for representing a location within the program, without
+    interprocedural information.
+ 
+    This represents a fine-grained location within the supergraph (or
+    within one of its nodes).  */
+ 
+ class function_point
+ {
+ public:
+   function_point (const supernode *supernode,
+ 		  const superedge *from_edge,
+ 		  unsigned stmt_idx,
+ 		  enum point_kind kind)
+   : m_supernode (supernode), m_from_edge (from_edge),
+     m_stmt_idx (stmt_idx), m_kind (kind)
+   {
+     if (from_edge)
+       {
+ 	gcc_checking_assert (m_kind == PK_BEFORE_SUPERNODE);
+ 	gcc_checking_assert (from_edge->get_kind () == SUPEREDGE_CFG_EDGE);
+       }
+     if (stmt_idx)
+       gcc_checking_assert (m_kind == PK_BEFORE_STMT);
+   }
+ 
+   void print (pretty_printer *pp, const format &f) const;
+   void print_source_line (pretty_printer *pp) const;
+   void dump () const;
+ 
+   hashval_t hash () const;
+   bool operator== (const function_point &other) const
+   {
+     return (m_supernode == other.m_supernode
+ 	    && m_from_edge == other.m_from_edge
+ 	    && m_stmt_idx == other.m_stmt_idx
+ 	    && m_kind == other.m_kind);
+   }
+ 
+   /* Accessors.  */
+ 
+   const supernode *get_supernode () const { return m_supernode; }
+   function *get_function () const
+   {
+     if (m_supernode)
+       return m_supernode->m_fun;
+     else
+       return NULL;
+   }
+   const gimple *get_stmt () const;
+   location_t get_location () const;
+   enum point_kind get_kind () const { return m_kind; }
+   const superedge *get_from_edge () const
+   {
+     return m_from_edge;
+   }
+   unsigned get_stmt_idx () const
+   {
+     gcc_assert (m_kind == PK_BEFORE_STMT);
+     return m_stmt_idx;
+   }
+ 
+   /* Factory functions for making various kinds of program_point.  */
+ 
+   static function_point from_function_entry (const supergraph &sg,
+ 					    function *fun)
+   {
+     return before_supernode (sg.get_node_for_function_entry (fun),
+ 			     NULL);
+   }
+ 
+   static function_point before_supernode (const supernode *supernode,
+ 					  const superedge *from_edge)
+   {
+     if (from_edge && from_edge->get_kind () != SUPEREDGE_CFG_EDGE)
+       from_edge = NULL;
+     return function_point (supernode, from_edge, 0, PK_BEFORE_SUPERNODE);
+   }
+ 
+   static function_point before_stmt (const supernode *supernode,
+ 				     unsigned stmt_idx)
+   {
+     return function_point (supernode, NULL, stmt_idx, PK_BEFORE_STMT);
+   }
+ 
+   static function_point after_supernode (const supernode *supernode)
+   {
+     return function_point (supernode, NULL, 0, PK_AFTER_SUPERNODE);
+   }
+ 
+   /* Support for hash_map.  */
+ 
+   static function_point empty ()
+   {
+     return function_point (NULL, NULL, 0, PK_EMPTY);
+   }
+   static function_point deleted ()
+   {
+     return function_point (NULL, NULL, 0, PK_DELETED);
+   }
+ 
+   static int cmp_within_supernode_1 (const function_point &point_a,
+ 				     const function_point &point_b);
+   static int cmp_within_supernode (const function_point &point_a,
+ 				   const function_point &point_b);
+ 
+  private:
+   const supernode *m_supernode;
+ 
+   /* For PK_BEFORE_SUPERNODE, and only for CFG edges.  */
+   const superedge *m_from_edge;
+ 
+   /* Only for PK_BEFORE_STMT.  */
+   unsigned m_stmt_idx;
+ 
+   enum point_kind m_kind;
+ };
+ 
+ /* A class for representing a location within the program, including
+    interprocedural information.
+ 
+    This represents a fine-grained location within the supergraph (or
+    within one of its nodes), along with a call string giving the
+    interprocedural context.  */
+ 
+ class program_point
+ {
+ public:
+   program_point (const function_point &fn_point,
+ 		 const call_string &call_string)
+   : m_function_point (fn_point),
+     m_call_string (call_string)
+   {
+   }
+ 
+   void print (pretty_printer *pp, const format &f) const;
+   void print_source_line (pretty_printer *pp) const;
+   void dump () const;
+ 
+   hashval_t hash () const;
+   bool operator== (const program_point &other) const
+   {
+     return (m_function_point == other.m_function_point
+ 	    && m_call_string == other.m_call_string);
+   }
+ 
+   /* Accessors.  */
+ 
+   const function_point &get_function_point () const { return m_function_point; }
+   const call_string &get_call_string () const { return m_call_string; }
+ 
+   const supernode *get_supernode () const
+   {
+     return m_function_point.get_supernode ();
+   }
+   function *get_function () const
+   {
+     return m_function_point.get_function ();
+   }
+   function *get_function_at_depth (unsigned depth) const;
+   tree get_fndecl () const
+   {
+     gcc_assert (get_kind () != PK_ORIGIN);
+     return get_function ()->decl;
+   }
+   const gimple *get_stmt () const
+   {
+     return m_function_point.get_stmt ();
+   }
+   location_t get_location () const
+   {
+     return m_function_point.get_location ();
+   }
+   enum point_kind get_kind () const
+   {
+     return m_function_point.get_kind ();
+   }
+   const superedge *get_from_edge () const
+   {
+     return m_function_point.get_from_edge ();
+   }
+   unsigned get_stmt_idx () const
+   {
+     return m_function_point.get_stmt_idx ();
+   }
+ 
+   /* Get the number of frames we expect at this program point.
+      This will be one more than the length of the call_string
+      (which stores the parent callsites), apart from the origin
+      node, which doesn't have any frames.  */
+   int get_stack_depth () const
+   {
+     if (get_kind () == PK_ORIGIN)
+       return 0;
+     return m_call_string.length () + 1;
+   }
+ 
+   /* Factory functions for making various kinds of program_point.  */
+ 
+   static program_point from_function_entry (const supergraph &sg,
+ 					    function *fun)
+   {
+     return program_point (function_point::from_function_entry (sg, fun),
+ 			  call_string ());
+   }
+ 
+   static program_point before_supernode (const supernode *supernode,
+ 					 const superedge *from_edge,
+ 					 const call_string &call_string)
+   {
+     return program_point (function_point::before_supernode (supernode,
+ 							    from_edge),
+ 			  call_string);
+   }
+ 
+   static program_point before_stmt (const supernode *supernode,
+ 				    unsigned stmt_idx,
+ 				    const call_string &call_string)
+   {
+     return program_point (function_point::before_stmt (supernode, stmt_idx),
+ 			  call_string);
+   }
+ 
+   static program_point after_supernode (const supernode *supernode,
+ 					const call_string &call_string)
+   {
+     return program_point (function_point::after_supernode (supernode),
+ 			  call_string);
+   }
+ 
+   /* Support for hash_map.  */
+ 
+   static program_point empty ()
+   {
+     return program_point (function_point::empty (), call_string ());
+   }
+   static program_point deleted ()
+   {
+     return program_point (function_point::deleted (), call_string ());
+   }
+ 
+   bool on_edge (exploded_graph &eg, const superedge *succ);
+ 
+   void validate () const;
+ 
+  private:
+   const function_point m_function_point;
+   call_string m_call_string;
+ };
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_PROGRAM_POINT_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/program-state.cc gcc-10.1.0/gcc/analyzer/program-state.cc
*** gcc-9.3.0/gcc/analyzer/program-state.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/program-state.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,1628 ----
+ /* Classes for representing the state of interest at a given path of analysis.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "diagnostic-core.h"
+ #include "diagnostic.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/sm.h"
+ #include "sbitmap.h"
+ #include "bitmap.h"
+ #include "tristate.h"
+ #include "ordered-hash-map.h"
+ #include "selftest.h"
+ #include "analyzer/region-model.h"
+ #include "analyzer/program-state.h"
+ #include "analyzer/constraint-manager.h"
+ #include "alloc-pool.h"
+ #include "fibonacci_heap.h"
+ #include "shortest-paths.h"
+ #include "analyzer/constraint-manager.h"
+ #include "diagnostic-event-id.h"
+ #include "analyzer/pending-diagnostic.h"
+ #include "analyzer/diagnostic-manager.h"
+ #include "cfg.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "gimple-iterator.h"
+ #include "cgraph.h"
+ #include "digraph.h"
+ #include "analyzer/supergraph.h"
+ #include "analyzer/call-string.h"
+ #include "analyzer/program-point.h"
+ #include "analyzer/program-state.h"
+ #include "analyzer/exploded-graph.h"
+ #include "analyzer/state-purge.h"
+ #include "analyzer/analyzer-selftests.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ /* class extrinsic_state.  */
+ 
+ /* Dump a multiline representation of this state to PP.  */
+ 
+ void
+ extrinsic_state::dump_to_pp (pretty_printer *pp) const
+ {
+   pp_printf (pp, "extrinsic_state: %i checker(s)\n", get_num_checkers ());
+   unsigned i;
+   state_machine *checker;
+   FOR_EACH_VEC_ELT (m_checkers, i, checker)
+     {
+       pp_printf (pp, "m_checkers[%i]: %qs\n", i, checker->get_name ());
+       checker->dump_to_pp (pp);
+     }
+ }
+ 
+ /* Dump a multiline representation of this state to OUTF.  */
+ 
+ void
+ extrinsic_state::dump_to_file (FILE *outf) const
+ {
+   pretty_printer pp;
+   if (outf == stderr)
+     pp_show_color (&pp) = pp_show_color (global_dc->printer);
+   pp.buffer->stream = outf;
+   dump_to_pp (&pp);
+   pp_flush (&pp);
+ }
+ 
+ /* Dump a multiline representation of this state to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ extrinsic_state::dump () const
+ {
+   dump_to_file (stderr);
+ }
+ 
+ /* class sm_state_map.  */
+ 
+ /* sm_state_map's ctor.  */
+ 
+ sm_state_map::sm_state_map ()
+ : m_map (), m_global_state (0)
+ {
+ }
+ 
+ /* Clone the sm_state_map.  */
+ 
+ sm_state_map *
+ sm_state_map::clone () const
+ {
+   return new sm_state_map (*this);
+ }
+ 
+ /* Clone this sm_state_map, remapping all svalue_ids within it with ID_MAP.
+ 
+    Return NULL if there are any svalue_ids that have sm-state for which
+    ID_MAP maps them to svalue_id::null (and thus the clone would have lost
+    the sm-state information). */
+ 
+ sm_state_map *
+ sm_state_map::clone_with_remapping (const one_way_svalue_id_map &id_map) const
+ {
+   sm_state_map *result = new sm_state_map ();
+   result->m_global_state = m_global_state;
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       svalue_id sid = (*iter).first;
+       gcc_assert (!sid.null_p ());
+       entry_t e = (*iter).second;
+       /* TODO: what should we do if the origin maps from non-null to null?
+ 	 Is that loss of information acceptable?  */
+       id_map.update (&e.m_origin);
+ 
+       svalue_id new_sid = id_map.get_dst_for_src (sid);
+       if (new_sid.null_p ())
+ 	{
+ 	  delete result;
+ 	  return NULL;
+ 	}
+       result->m_map.put (new_sid, e);
+     }
+   return result;
+ }
+ 
+ /* Print this sm_state_map (for SM) to PP.
+    If MODEL is non-NULL, print representative tree values where
+    available.  */
+ 
+ void
+ sm_state_map::print (const state_machine &sm, const region_model *model,
+ 		     pretty_printer *pp) const
+ {
+   bool first = true;
+   pp_string (pp, "{");
+   if (m_global_state != 0)
+     {
+       pp_printf (pp, "global: %s", sm.get_state_name (m_global_state));
+       first = false;
+     }
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       if (!first)
+ 	pp_string (pp, ", ");
+       first = false;
+       svalue_id sid = (*iter).first;
+       sid.print (pp);
+ 
+       entry_t e = (*iter).second;
+       pp_printf (pp, ": %s", sm.get_state_name (e.m_state));
+       if (model)
+ 	if (tree rep = model->get_representative_tree (sid))
+ 	  {
+ 	    pp_string (pp, " (");
+ 	    dump_quoted_tree (pp, rep);
+ 	    pp_character (pp, ')');
+ 	  }
+       if (!e.m_origin.null_p ())
+ 	{
+ 	  pp_string (pp, " (origin: ");
+ 	  e.m_origin.print (pp);
+ 	  if (model)
+ 	    if (tree rep = model->get_representative_tree (e.m_origin))
+ 	      {
+ 		pp_string (pp, " (");
+ 		dump_quoted_tree (pp, rep);
+ 		pp_character (pp, ')');
+ 	      }
+ 	  pp_string (pp, ")");
+ 	}
+     }
+   pp_string (pp, "}");
+ }
+ 
+ /* Dump this object (for SM) to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ sm_state_map::dump (const state_machine &sm) const
+ {
+   pretty_printer pp;
+   pp_show_color (&pp) = pp_show_color (global_dc->printer);
+   pp.buffer->stream = stderr;
+   print (sm, NULL, &pp);
+   pp_newline (&pp);
+   pp_flush (&pp);
+ }
+ 
+ /* Return true if no states have been set within this map
+    (all expressions are for the start state).  */
+ 
+ bool
+ sm_state_map::is_empty_p () const
+ {
+   return m_map.elements () == 0 && m_global_state == 0;
+ }
+ 
+ /* Generate a hash value for this sm_state_map.  */
+ 
+ hashval_t
+ sm_state_map::hash () const
+ {
+   hashval_t result = 0;
+ 
+   /* Accumulate the result by xoring a hash for each slot, so that the
+      result doesn't depend on the ordering of the slots in the map.  */
+ 
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       inchash::hash hstate;
+       inchash::add ((*iter).first, hstate);
+       entry_t e = (*iter).second;
+       hstate.add_int (e.m_state);
+       inchash::add (e.m_origin, hstate);
+       result ^= hstate.end ();
+     }
+   result ^= m_global_state;
+ 
+   return result;
+ }
+ 
+ /* Equality operator for sm_state_map.  */
+ 
+ bool
+ sm_state_map::operator== (const sm_state_map &other) const
+ {
+   if (m_global_state != other.m_global_state)
+     return false;
+ 
+   if (m_map.elements () != other.m_map.elements ())
+     return false;
+ 
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       svalue_id sid = (*iter).first;
+       entry_t e = (*iter).second;
+       entry_t *other_slot = const_cast <map_t &> (other.m_map).get (sid);
+       if (other_slot == NULL)
+ 	return false;
+       if (e != *other_slot)
+ 	return false;
+     }
+ 
+   gcc_checking_assert (hash () == other.hash ());
+ 
+   return true;
+ }
+ 
+ /* Get the state of SID within this object.
+    States default to the start state.  */
+ 
+ state_machine::state_t
+ sm_state_map::get_state (svalue_id sid) const
+ {
+   gcc_assert (!sid.null_p ());
+ 
+   if (entry_t *slot
+       = const_cast <map_t &> (m_map).get (sid))
+     return slot->m_state;
+   else
+     return 0;
+ }
+ 
+ /* Get the "origin" svalue_id for any state of SID.  */
+ 
+ svalue_id
+ sm_state_map::get_origin (svalue_id sid) const
+ {
+   gcc_assert (!sid.null_p ());
+ 
+   entry_t *slot
+     = const_cast <map_t &> (m_map).get (sid);
+   if (slot)
+     return slot->m_origin;
+   else
+     return svalue_id::null ();
+ }
+ 
+ /* Set the state of SID within MODEL to STATE, recording that
+    the state came from ORIGIN.  */
+ 
+ void
+ sm_state_map::set_state (region_model *model,
+ 			 svalue_id sid,
+ 			 state_machine::state_t state,
+ 			 svalue_id origin)
+ {
+   if (model == NULL)
+     return;
+   equiv_class &ec = model->get_constraints ()->get_equiv_class (sid);
+   if (!set_state (ec, state, origin))
+     return;
+ 
+   /* Also do it for all svalues that are equal via non-cm, so that
+      e.g. (void *)&r and (foo *)&r transition together.  */
+   for (unsigned i = 0; i < model->get_num_svalues (); i++)
+     {
+       svalue_id other_sid = svalue_id::from_int (i);
+       if (other_sid == sid)
+ 	continue;
+ 
+       tristate eq = model->eval_condition_without_cm (sid, EQ_EXPR, other_sid);
+       if (eq.is_true ())
+ 	impl_set_state (other_sid, state, origin);
+     }
+ }
+ 
+ /* Set the state of EC to STATE, recording that the state came from
+    ORIGIN.
+    Return true if any states of svalue_ids within EC changed.  */
+ 
+ bool
+ sm_state_map::set_state (const equiv_class &ec,
+ 			 state_machine::state_t state,
+ 			 svalue_id origin)
+ {
+   int i;
+   svalue_id *sid;
+   bool any_changed = false;
+   FOR_EACH_VEC_ELT (ec.m_vars, i, sid)
+     any_changed |= impl_set_state (*sid, state, origin);
+   return any_changed;
+ }
+ 
+ /* Set state of SID to STATE, bypassing equivalence classes.
+    Return true if the state changed.  */
+ 
+ bool
+ sm_state_map::impl_set_state (svalue_id sid, state_machine::state_t state,
+ 			      svalue_id origin)
+ {
+   if (get_state (sid) == state)
+     return false;
+ 
+   /* Special-case state 0 as the default value.  */
+   if (state == 0)
+     {
+       if (m_map.get (sid))
+ 	m_map.remove (sid);
+       return true;
+     }
+   gcc_assert (!sid.null_p ());
+   m_map.put (sid, entry_t (state, origin));
+   return true;
+ }
+ 
+ /* Set the "global" state within this state map to STATE.  */
+ 
+ void
+ sm_state_map::set_global_state (state_machine::state_t state)
+ {
+   m_global_state = state;
+ }
+ 
+ /* Get the "global" state within this state map.  */
+ 
+ state_machine::state_t
+ sm_state_map::get_global_state () const
+ {
+   return m_global_state;
+ }
+ 
+ /* Handle CALL to unknown FNDECL with an unknown function body, which
+    could do anything to the states passed to it.
+    Clear any state for SM for the params and any LHS.
+    Note that the function might be known to other state machines, but
+    not to this one.  */
+ 
+ void
+ sm_state_map::purge_for_unknown_fncall (const exploded_graph &eg,
+ 					const state_machine &sm,
+ 					const gcall *call,
+ 					tree fndecl,
+ 					region_model *new_model,
+ 					region_model_context *ctxt)
+ {
+   logger * const logger = eg.get_logger ();
+   if (logger)
+     {
+       if (fndecl)
+ 	logger->log ("function %qE is unknown to checker %qs",
+ 		     fndecl, sm.get_name ());
+       else
+ 	logger->log ("unknown function pointer for checker %qs",
+ 		     sm.get_name ());
+     }
+ 
+   /* Purge any state for parms.  */
+   tree iter_param_types = NULL_TREE;
+   if (fndecl)
+     iter_param_types = TYPE_ARG_TYPES (TREE_TYPE (fndecl));
+   for (unsigned arg_idx = 0; arg_idx < gimple_call_num_args (call); arg_idx++)
+     {
+       /* Track expected param type, where available.  */
+       if (iter_param_types)
+ 	{
+ 	  tree param_type = TREE_VALUE (iter_param_types);
+ 	  gcc_assert (param_type);
+ 	  iter_param_types = TREE_CHAIN (iter_param_types);
+ 
+ 	  /* Don't purge state if it was passed as a const pointer
+ 	     e.g. for things like strlen (PTR).  */
+ 	  if (TREE_CODE (param_type) == POINTER_TYPE)
+ 	    if (TYPE_READONLY (TREE_TYPE (param_type)))
+ 	      continue;
+ 	}
+       tree parm = gimple_call_arg (call, arg_idx);
+       svalue_id parm_sid = new_model->get_rvalue (parm, ctxt);
+       set_state (new_model, parm_sid, 0, svalue_id::null ());
+ 
+       /* Also clear sm-state from svalue_ids that are passed via a
+ 	 pointer.  */
+       if (TREE_CODE (parm) == ADDR_EXPR)
+ 	{
+ 	  tree pointee = TREE_OPERAND (parm, 0);
+ 	  svalue_id parm_sid = new_model->get_rvalue (pointee, ctxt);
+ 	  set_state (new_model, parm_sid, 0, svalue_id::null ());
+ 	}
+     }
+ 
+   /* Purge any state for any LHS.  */
+   if (tree lhs = gimple_call_lhs (call))
+     {
+       svalue_id lhs_sid = new_model->get_rvalue (lhs, ctxt);
+       set_state (new_model, lhs_sid, 0, svalue_id::null ());
+     }
+ }
+ 
+ /* Update this map based on MAP.  */
+ 
+ void
+ sm_state_map::remap_svalue_ids (const svalue_id_map &map)
+ {
+   map_t tmp_map;
+ 
+   /* Build an intermediate map, using the new sids.  */
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       svalue_id sid = (*iter).first;
+       entry_t e = (*iter).second;
+ 
+       map.update (&sid);
+       map.update (&e.m_origin);
+       tmp_map.put (sid, e);
+     }
+ 
+   /* Clear the existing values.  */
+   m_map.empty ();
+ 
+   /* Copy over from intermediate map.  */
+   for (map_t::iterator iter = tmp_map.begin ();
+        iter != tmp_map.end ();
+        ++iter)
+     {
+       svalue_id sid = (*iter).first;
+       entry_t e = (*iter).second;
+ 
+       impl_set_state (sid, e.m_state, e.m_origin);
+     }
+ }
+ 
+ /* Purge any state for svalue_ids >= FIRST_UNUSED_SID.
+    If !SM::can_purge_p, then report the state as leaking,
+    using SM_IDX, CTXT, and MAP.
+    Return the number of states that were purged.  */
+ 
+ int
+ sm_state_map::on_svalue_purge (const state_machine &sm,
+ 			       int sm_idx,
+ 			       svalue_id first_unused_sid,
+ 			       const svalue_id_map &map,
+ 			       impl_region_model_context *ctxt)
+ {
+   /* TODO: ideally remove the slot directly; for now
+      do it in two stages.  */
+   auto_vec<svalue_id> to_remove;
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       svalue_id dst_sid ((*iter).first);
+       if (dst_sid.as_int () >= first_unused_sid.as_int ())
+ 	{
+ 	  /* Complain about leaks here.  */
+ 	  entry_t e = (*iter).second;
+ 
+ 	  if (!sm.can_purge_p (e.m_state))
+ 	    ctxt->on_state_leak (sm, sm_idx, dst_sid, first_unused_sid,
+ 				 map, e.m_state);
+ 
+ 	  to_remove.safe_push (dst_sid);
+ 	}
+       else if ((*iter).second.m_origin.as_int () >= first_unused_sid.as_int ())
+ 	{
+ 	  /* If the origin svalue is being purged, then reset it to null.  */
+ 	  (*iter).second.m_origin = svalue_id::null ();
+ 	}
+     }
+ 
+   int i;
+   svalue_id *dst_sid;
+   FOR_EACH_VEC_ELT (to_remove, i, dst_sid)
+     m_map.remove (*dst_sid);
+ 
+   return to_remove.length ();
+ }
+ 
+ /* Set the state of CHILD_SID to that of PARENT_SID.  */
+ 
+ void
+ sm_state_map::on_inherited_svalue (svalue_id parent_sid,
+ 				   svalue_id child_sid)
+ {
+   state_machine::state_t state = get_state (parent_sid);
+   impl_set_state (child_sid, state, parent_sid);
+ }
+ 
+ /* Set the state of DST_SID to that of SRC_SID.  */
+ 
+ void
+ sm_state_map::on_cast (svalue_id src_sid,
+ 		       svalue_id dst_sid)
+ {
+   state_machine::state_t state = get_state (src_sid);
+   impl_set_state (dst_sid, state, get_origin (src_sid));
+ }
+ 
+ /* Purge state from SID (in response to a call to an unknown function).  */
+ 
+ void
+ sm_state_map::on_unknown_change (svalue_id sid)
+ {
+   impl_set_state (sid, (state_machine::state_t)0, svalue_id::null ());
+ }
+ 
+ /* Assert that this object is sane.  */
+ 
+ void
+ sm_state_map::validate (const state_machine &sm,
+ 			int num_svalues) const
+ {
+   /* Skip this in a release build.  */
+ #if !CHECKING_P
+   return;
+ #endif
+ 
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       svalue_id sid = (*iter).first;
+       entry_t e = (*iter).second;
+ 
+       gcc_assert (sid.as_int () < num_svalues);
+       sm.validate (e.m_state);
+       gcc_assert (e.m_origin.as_int () < num_svalues);
+     }
+ }
+ 
+ /* class program_state.  */
+ 
+ /* program_state's ctor.  */
+ 
+ program_state::program_state (const extrinsic_state &ext_state)
+ : m_region_model (new region_model ()),
+   m_checker_states (ext_state.get_num_checkers ()),
+   m_valid (true)
+ {
+   int num_states = ext_state.get_num_checkers ();
+   for (int i = 0; i < num_states; i++)
+     m_checker_states.quick_push (new sm_state_map ());
+ }
+ 
+ /* program_state's copy ctor.  */
+ 
+ program_state::program_state (const program_state &other)
+ : m_region_model (new region_model (*other.m_region_model)),
+   m_checker_states (other.m_checker_states.length ()),
+   m_valid (true)
+ {
+   int i;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (other.m_checker_states, i, smap)
+     m_checker_states.quick_push (smap->clone ());
+ }
+ 
+ /* program_state's assignment operator.  */
+ 
+ program_state&
+ program_state::operator= (const program_state &other)
+ {
+   delete m_region_model;
+   m_region_model = new region_model (*other.m_region_model);
+ 
+   int i;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (m_checker_states, i, smap)
+     delete smap;
+   m_checker_states.truncate (0);
+   gcc_assert (m_checker_states.space (other.m_checker_states.length ()));
+ 
+   FOR_EACH_VEC_ELT (other.m_checker_states, i, smap)
+     m_checker_states.quick_push (smap->clone ());
+ 
+   m_valid = other.m_valid;
+ 
+   return *this;
+ }
+ 
+ #if __cplusplus >= 201103
+ /* Move constructor for program_state (when building with C++11).  */
+ program_state::program_state (program_state &&other)
+ : m_region_model (other.m_region_model),
+   m_checker_states (other.m_checker_states.length ())
+ {
+   other.m_region_model = NULL;
+ 
+   int i;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (other.m_checker_states, i, smap)
+     m_checker_states.quick_push (smap);
+   other.m_checker_states.truncate (0);
+ 
+   m_valid = other.m_valid;
+ }
+ #endif
+ 
+ /* program_state's dtor.  */
+ 
+ program_state::~program_state ()
+ {
+   delete m_region_model;
+ }
+ 
+ /* Generate a hash value for this program_state.  */
+ 
+ hashval_t
+ program_state::hash () const
+ {
+   hashval_t result = m_region_model->hash ();
+ 
+   int i;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (m_checker_states, i, smap)
+     result ^= smap->hash ();
+   return result;
+ }
+ 
+ /* Equality operator for program_state.
+    All parts of the program_state (region model, checker states) must
+    equal their counterparts in OTHER for the two program_states to be
+    considered equal.  */
+ 
+ bool
+ program_state::operator== (const program_state &other) const
+ {
+   if (!(*m_region_model == *other.m_region_model))
+     return false;
+ 
+   int i;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (m_checker_states, i, smap)
+     if (!(*smap == *other.m_checker_states[i]))
+       return false;
+ 
+   gcc_checking_assert (hash () == other.hash ());
+ 
+   return true;
+ }
+ 
+ /* Print a compact representation of this state to PP.  */
+ 
+ void
+ program_state::print (const extrinsic_state &ext_state,
+ 		      pretty_printer *pp) const
+ {
+   pp_printf (pp, "rmodel: ");
+   m_region_model->print (pp);
+   pp_newline (pp);
+ 
+   int i;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (m_checker_states, i, smap)
+     {
+       if (!smap->is_empty_p ())
+ 	{
+ 	  pp_printf (pp, "%s: ", ext_state.get_name (i));
+ 	  smap->print (ext_state.get_sm (i), m_region_model, pp);
+ 	  pp_newline (pp);
+ 	}
+     }
+   if (!m_valid)
+     {
+       pp_printf (pp, "invalid state");
+       pp_newline (pp);
+     }
+ }
+ 
+ /* Dump a representation of this state to PP.
+    If SUMMARIZE is true, print a one-line summary;
+    if false, print a detailed multiline representation.  */
+ 
+ void
+ program_state::dump_to_pp (const extrinsic_state &ext_state,
+ 			   bool summarize,
+ 			   pretty_printer *pp) const
+ {
+   pp_printf (pp, "rmodel: ");
+   m_region_model->dump_to_pp (pp, summarize);
+ 
+   int i;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (m_checker_states, i, smap)
+     {
+       if (!smap->is_empty_p ())
+ 	{
+ 	  if (summarize)
+ 	    pp_space (pp);
+ 	  pp_printf (pp, "%s: ", ext_state.get_name (i));
+ 	  smap->print (ext_state.get_sm (i), m_region_model, pp);
+ 	  if (!summarize)
+ 	    pp_newline (pp);
+ 	}
+     }
+ 
+   if (!m_valid)
+     {
+       if (summarize)
+ 	pp_space (pp);
+       pp_printf (pp, "invalid state");
+       if (!summarize)
+ 	pp_newline (pp);
+     }
+ }
+ 
+ /* Dump a multiline representation of this state to OUTF.  */
+ 
+ void
+ program_state::dump_to_file (const extrinsic_state &ext_state,
+ 			     bool summarize,
+ 			     FILE *outf) const
+ {
+   pretty_printer pp;
+   pp_format_decoder (&pp) = default_tree_printer;
+   if (outf == stderr)
+     pp_show_color (&pp) = pp_show_color (global_dc->printer);
+   pp.buffer->stream = outf;
+   dump_to_pp (ext_state, summarize, &pp);
+   pp_flush (&pp);
+ }
+ 
+ /* Dump a multiline representation of this state to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ program_state::dump (const extrinsic_state &ext_state,
+ 		     bool summarize) const
+ {
+   dump_to_file (ext_state, summarize, stderr);
+ }
+ 
+ /* Determine if following edge SUCC from ENODE is valid within the graph EG
+    and update this state accordingly in-place.
+ 
+    Return true if the edge can be followed, or false otherwise.
+ 
+    Check for relevant conditionals and switch-values for conditionals
+    and switch statements, adding the relevant conditions to this state.
+    Push/pop frames for interprocedural edges and update params/returned
+    values.
+ 
+    This is the "state" half of exploded_node::on_edge.  */
+ 
+ bool
+ program_state::on_edge (exploded_graph &eg,
+ 			const exploded_node &enode,
+ 			const superedge *succ,
+ 			state_change *change)
+ {
+   /* Update state.  */
+   const program_point &point = enode.get_point ();
+   const gimple *last_stmt = point.get_supernode ()->get_last_stmt ();
+ 
+   /* For conditionals and switch statements, add the
+      relevant conditions (for the specific edge) to new_state;
+      skip edges for which the resulting constraints
+      are impossible.
+      This also updates frame information for call/return superedges.
+      Adding the relevant conditions for the edge could also trigger
+      sm-state transitions (e.g. transitions due to ptrs becoming known
+      to be NULL or non-NULL) */
+ 
+   impl_region_model_context ctxt (eg, &enode,
+ 				  &enode.get_state (),
+ 				  this, change,
+ 				  last_stmt);
+   if (!m_region_model->maybe_update_for_edge (*succ,
+ 					      last_stmt,
+ 					      &ctxt))
+     {
+       logger * const logger = eg.get_logger ();
+       if (logger)
+ 	logger->log ("edge to SN: %i is impossible"
+ 		     " due to region_model constraints",
+ 		     succ->m_dest->m_index);
+       return false;
+     }
+ 
+   return true;
+ }
+ 
+ /* Generate a simpler version of THIS, discarding state that's no longer
+    relevant at POINT.
+    The idea is that we're more likely to be able to consolidate
+    multiple (point, state) into single exploded_nodes if we discard
+    irrelevant state (e.g. at the end of functions).
+ 
+    Retain state affected by CHANGE, to make it easier to generate
+    state_change_events.  */
+ 
+ program_state
+ program_state::prune_for_point (exploded_graph &eg,
+ 				const program_point &point,
+ 				state_change *change) const
+ {
+   logger * const logger = eg.get_logger ();
+   LOG_SCOPE (logger);
+ 
+   function *fun = point.get_function ();
+   if (!fun)
+     return *this;
+ 
+   program_state new_state (*this);
+ 
+   purge_stats stats;
+ 
+   const state_purge_map *pm = eg.get_purge_map ();
+   if (pm)
+     {
+       region_id_set purgeable_ssa_regions (new_state.m_region_model);
+       region_id frame_rid
+ 	= new_state.m_region_model->get_current_frame_id ();
+       frame_region *frame
+ 	= new_state.m_region_model->get_region <frame_region>(frame_rid);
+ 
+       /* TODO: maybe move to a member of region_model?  */
+ 
+       auto_vec<tree> ssa_names_to_purge;
+       for (frame_region::map_t::iterator iter = frame->begin ();
+ 	   iter != frame->end ();
+ 	   ++iter)
+ 	{
+ 	  tree var = (*iter).first;
+ 	  region_id rid = (*iter).second;
+ 	  if (TREE_CODE (var) == SSA_NAME)
+ 	    {
+ 	      const state_purge_per_ssa_name &per_ssa
+ 		= pm->get_data_for_ssa_name (var);
+ 	      if (!per_ssa.needed_at_point_p (point.get_function_point ()))
+ 		{
+ 		  region *region
+ 		    = new_state.m_region_model->get_region (rid);
+ 		  svalue_id sid = region->get_value_direct ();
+ 		  if (!sid.null_p ())
+ 		    {
+ 		      if (!new_state.can_purge_p (eg.get_ext_state (), sid))
+ 			{
+ 			  /* (currently only state maps can keep things
+ 			     alive).  */
+ 			  if (logger)
+ 			    logger->log ("not purging RID: %i for %qE"
+ 					 " (used by state map)",
+ 					 rid.as_int (), var);
+ 			  continue;
+ 			}
+ 
+ 		      /* Don't purge regions containing svalues that
+ 			 have a change of sm-state, to make it easier to
+ 			 generate state_change_event messages.  */
+ 		      if (change)
+ 			if (change->affects_p (sid))
+ 			  {
+ 			    if (logger)
+ 			      logger->log ("not purging RID: %i for %qE"
+ 					   " (affected by change)",
+ 					   rid.as_int (), var);
+ 			    continue;
+ 			  }
+ 		    }
+ 		  purgeable_ssa_regions.add_region (rid);
+ 		  ssa_names_to_purge.safe_push (var);
+ 		  if (logger)
+ 		    logger->log ("purging RID: %i for %qE", rid.as_int (), var);
+ 		  /* We also need to remove the region from the map.
+ 		     We're in mid-traversal, so the removal is done in
+ 		     unbind below.  */
+ 		}
+ 	    }
+ 	}
+ 
+       /* Unbind the regions from the frame's map of vars-to-regions.  */
+       unsigned i;
+       tree var;
+       FOR_EACH_VEC_ELT (ssa_names_to_purge, i, var)
+ 	frame->unbind (var);
+ 
+       /* Purge the regions.  Nothing should point to them, and they
+ 	 should have no children, as they are for SSA names.  */
+       new_state.m_region_model->purge_regions (purgeable_ssa_regions,
+ 					       &stats,
+ 					       eg.get_logger ());
+     }
+ 
+   /* Purge unused svalues.  */
+   // TODO: which enode to use, if any?
+   impl_region_model_context ctxt (eg, NULL,
+ 				  this,
+ 				  &new_state,
+ 				  change,
+ 				  NULL);
+   new_state.m_region_model->purge_unused_svalues (&stats, &ctxt);
+   if (logger)
+     {
+       logger->log ("num svalues purged: %i", stats.m_num_svalues);
+       logger->log ("num regions purged: %i", stats.m_num_regions);
+       logger->log ("num equiv_classes purged: %i", stats.m_num_equiv_classes);
+       logger->log ("num constraints purged: %i", stats.m_num_constraints);
+       logger->log ("num sm map items purged: %i", stats.m_num_client_items);
+     }
+ 
+   new_state.m_region_model->canonicalize (&ctxt);
+ 
+   return new_state;
+ }
+ 
+ /* Remap all svalue_ids in this state's m_checker_states according to MAP.
+    The svalues_ids in the region_model are assumed to already have been
+    remapped.  */
+ 
+ void
+ program_state::remap_svalue_ids (const svalue_id_map &map)
+ {
+   int i;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (m_checker_states, i, smap)
+     smap->remap_svalue_ids (map);
+ }
+ 
+ /* Attempt to return a tree that represents SID, or return NULL_TREE.
+    Find the first region that stores the value (e.g. a local) and
+    generate a representative tree for it.  */
+ 
+ tree
+ program_state::get_representative_tree (svalue_id sid) const
+ {
+   return m_region_model->get_representative_tree (sid);
+ }
+ 
+ /* Attempt to merge this state with OTHER, both using EXT_STATE.
+    Write the result to *OUT.
+    If the states were merged successfully, return true.  */
+ 
+ bool
+ program_state::can_merge_with_p (const program_state &other,
+ 				 const extrinsic_state &ext_state,
+ 				 program_state *out) const
+ {
+   gcc_assert (out);
+ 
+   /* TODO:  initially I had an early reject here if there
+      are sm-differences between the states.  However, this was
+      falsely rejecting merger opportunities for states where the
+      only difference was in svalue_id ordering.  */
+ 
+   /* Attempt to merge the region_models.  */
+ 
+   svalue_id_merger_mapping sid_mapping (*m_region_model,
+ 					*other.m_region_model);
+   if (!m_region_model->can_merge_with_p (*other.m_region_model,
+ 					 out->m_region_model,
+ 					 &sid_mapping))
+     return false;
+ 
+   /* Copy m_checker_states to result, remapping svalue_ids using
+      sid_mapping.  */
+   int i;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (out->m_checker_states, i, smap)
+     delete smap;
+   out->m_checker_states.truncate (0);
+ 
+   /* Remap this and other's m_checker_states using sid_mapping.
+      Only merge states that have equality between the two end-results:
+      sm-state differences are likely to be interesting to end-users, and
+      hence are worth exploring as separate paths in the exploded graph.  */
+   FOR_EACH_VEC_ELT (m_checker_states, i, smap)
+     {
+       sm_state_map *other_smap = other.m_checker_states[i];
+ 
+       /* If clone_with_remapping returns NULL for one of the input smaps,
+ 	 then it has sm-state for an svalue_id where the svalue_id is
+ 	 being mapped to svalue_id::null in its sid_mapping, meaning that
+ 	 the svalue is to be dropped during the merger.  We don't want
+ 	 to lose sm-state during a state merger, so return false for these
+ 	 cases.  */
+       sm_state_map *remapped_a_smap
+ 	= smap->clone_with_remapping (sid_mapping.m_map_from_a_to_m);
+       if (!remapped_a_smap)
+ 	return false;
+       sm_state_map *remapped_b_smap
+ 	= other_smap->clone_with_remapping (sid_mapping.m_map_from_b_to_m);
+       if (!remapped_b_smap)
+ 	{
+ 	  delete remapped_a_smap;
+ 	  return false;
+ 	}
+ 
+       /* Both states have sm-state for the same values; now ensure that the
+ 	 states are equal.  */
+       if (*remapped_a_smap == *remapped_b_smap)
+ 	{
+ 	  out->m_checker_states.safe_push (remapped_a_smap);
+ 	  delete remapped_b_smap;
+ 	}
+       else
+ 	{
+ 	  /* Don't merge if there are sm-state differences.  */
+ 	  delete remapped_a_smap;
+ 	  delete remapped_b_smap;
+ 	  return false;
+ 	}
+     }
+ 
+   impl_region_model_context ctxt (out, NULL, ext_state);
+   out->m_region_model->canonicalize (&ctxt);
+ 
+   return true;
+ }
+ 
+ /* Assert that this object is valid.  */
+ 
+ void
+ program_state::validate (const extrinsic_state &ext_state) const
+ {
+   /* Skip this in a release build.  */
+ #if !CHECKING_P
+   return;
+ #endif
+ 
+   m_region_model->validate ();
+   gcc_assert (m_checker_states.length () == ext_state.get_num_checkers ());
+   int sm_idx;
+   sm_state_map *smap;
+   FOR_EACH_VEC_ELT (m_checker_states, sm_idx, smap)
+     {
+       const state_machine &sm = ext_state.get_sm (sm_idx);
+       smap->validate (sm, m_region_model->get_num_svalues ());
+     }
+ }
+ 
+ /* Dump this sm_change to PP.  */
+ 
+ void
+ state_change::sm_change::dump (pretty_printer *pp,
+ 			       const extrinsic_state &ext_state) const
+ {
+   const state_machine &sm = get_sm (ext_state);
+   pp_string (pp, "(");
+   m_new_sid.print (pp);
+   pp_printf (pp, ": %s: %qs -> %qs)",
+ 	     sm.get_name (),
+ 	     sm.get_state_name (m_old_state),
+ 	     sm.get_state_name (m_new_state));
+ }
+ 
+ /* Remap all svalue_ids in this change according to MAP.  */
+ 
+ void
+ state_change::sm_change::remap_svalue_ids (const svalue_id_map &map)
+ {
+   map.update (&m_new_sid);
+ }
+ 
+ /* Purge any svalue_ids >= FIRST_UNUSED_SID.
+    Return the number of states that were purged.  */
+ 
+ int
+ state_change::sm_change::on_svalue_purge (svalue_id first_unused_sid)
+ {
+   if (m_new_sid.as_int () >= first_unused_sid.as_int ())
+     {
+       m_new_sid = svalue_id::null ();
+       return 1;
+     }
+ 
+   return 0;
+ }
+ 
+ /* Assert that this object is sane.  */
+ 
+ void
+ state_change::sm_change::validate (const program_state &new_state,
+ 				   const extrinsic_state &ext_state) const
+ {
+   gcc_assert ((unsigned)m_sm_idx < ext_state.get_num_checkers ());
+   const state_machine &sm = ext_state.get_sm (m_sm_idx);
+   sm.validate (m_old_state);
+   sm.validate (m_new_state);
+   m_new_sid.validate (*new_state.m_region_model);
+ }
+ 
+ /* state_change's ctor.  */
+ 
+ state_change::state_change ()
+ {
+ }
+ 
+ /* state_change's copy ctor.  */
+ 
+ state_change::state_change (const state_change &other)
+ : m_sm_changes (other.m_sm_changes.length ())
+ {
+   unsigned i;
+   sm_change *change;
+   FOR_EACH_VEC_ELT (other.m_sm_changes, i, change)
+     m_sm_changes.quick_push (*change);
+ }
+ 
+ /* Record a state-machine state change.  */
+ 
+ void
+ state_change::add_sm_change (int sm_idx,
+ 			     svalue_id new_sid,
+ 			     state_machine::state_t old_state,
+ 			     state_machine::state_t new_state)
+ {
+   m_sm_changes.safe_push (sm_change (sm_idx,
+ 				     new_sid,
+ 				     old_state, new_state));
+ }
+ 
+ /* Return true if SID (in the new state) was affected by any
+    sm-state changes.  */
+ 
+ bool
+ state_change::affects_p (svalue_id sid) const
+ {
+   unsigned i;
+   sm_change *change;
+   FOR_EACH_VEC_ELT (m_sm_changes, i, change)
+     {
+       if (sid == change->m_new_sid)
+ 	return true;
+     }
+   return false;
+ }
+ 
+ /* Dump this state_change to PP.  */
+ 
+ void
+ state_change::dump (pretty_printer *pp,
+ 		    const extrinsic_state &ext_state) const
+ {
+   unsigned i;
+   sm_change *change;
+   FOR_EACH_VEC_ELT (m_sm_changes, i, change)
+     {
+       if (i > 0)
+ 	pp_string (pp, ", ");
+       change->dump (pp, ext_state);
+     }
+ }
+ 
+ /* Dump this state_change to stderr.  */
+ 
+ void
+ state_change::dump (const extrinsic_state &ext_state) const
+ {
+   pretty_printer pp;
+   pp_show_color (&pp) = pp_show_color (global_dc->printer);
+   pp.buffer->stream = stderr;
+   dump (&pp, ext_state);
+   pp_newline (&pp);
+   pp_flush (&pp);
+ }
+ 
+ /* Remap all svalue_ids in this state_change according to MAP.  */
+ 
+ void
+ state_change::remap_svalue_ids (const svalue_id_map &map)
+ {
+   unsigned i;
+   sm_change *change;
+   FOR_EACH_VEC_ELT (m_sm_changes, i, change)
+     change->remap_svalue_ids (map);
+ }
+ 
+ /* Purge any svalue_ids >= FIRST_UNUSED_SID.
+    Return the number of states that were purged.  */
+ 
+ int
+ state_change::on_svalue_purge (svalue_id first_unused_sid)
+ {
+   int result = 0;
+   unsigned i;
+   sm_change *change;
+   FOR_EACH_VEC_ELT (m_sm_changes, i, change)
+     result += change->on_svalue_purge (first_unused_sid);
+   return result;
+ }
+ 
+ /* Assert that this object is sane.  */
+ 
+ void
+ state_change::validate (const program_state &new_state,
+ 			const extrinsic_state &ext_state) const
+ {
+   /* Skip this in a release build.  */
+ #if !CHECKING_P
+   return;
+ #endif
+   unsigned i;
+   sm_change *change;
+   FOR_EACH_VEC_ELT (m_sm_changes, i, change)
+     change->validate (new_state, ext_state);
+ }
+ 
+ #if CHECKING_P
+ 
+ namespace selftest {
+ 
+ /* Implementation detail of ASSERT_DUMP_EQ.  */
+ 
+ static void
+ assert_dump_eq (const location &loc,
+ 		const program_state &state,
+ 		const extrinsic_state &ext_state,
+ 		bool summarize,
+ 		const char *expected)
+ {
+   auto_fix_quotes sentinel;
+   pretty_printer pp;
+   pp_format_decoder (&pp) = default_tree_printer;
+   state.dump_to_pp (ext_state, summarize, &pp);
+   ASSERT_STREQ_AT (loc, pp_formatted_text (&pp), expected);
+ }
+ 
+ /* Assert that STATE.dump_to_pp (SUMMARIZE) is EXPECTED.  */
+ 
+ #define ASSERT_DUMP_EQ(STATE, EXT_STATE, SUMMARIZE, EXPECTED)		\
+   SELFTEST_BEGIN_STMT							\
+   assert_dump_eq ((SELFTEST_LOCATION), (STATE), (EXT_STATE), (SUMMARIZE), \
+ 		  (EXPECTED));						\
+   SELFTEST_END_STMT
+ 
+ /* Tests for sm_state_map.  */
+ 
+ static void
+ test_sm_state_map ()
+ {
+   tree x = build_global_decl ("x", integer_type_node);
+   tree y = build_global_decl ("y", integer_type_node);
+   tree z = build_global_decl ("z", integer_type_node);
+ 
+   /* Test setting states on svalue_id instances directly.  */
+   {
+     region_model model;
+     svalue_id sid_x = model.get_rvalue (x, NULL);
+     svalue_id sid_y = model.get_rvalue (y, NULL);
+     svalue_id sid_z = model.get_rvalue (z, NULL);
+ 
+     sm_state_map map;
+     ASSERT_TRUE (map.is_empty_p ());
+     ASSERT_EQ (map.get_state (sid_x), 0);
+ 
+     map.impl_set_state (sid_x, 42, sid_z);
+     ASSERT_EQ (map.get_state (sid_x), 42);
+     ASSERT_EQ (map.get_origin (sid_x), sid_z);
+     ASSERT_EQ (map.get_state (sid_y), 0);
+     ASSERT_FALSE (map.is_empty_p ());
+ 
+     map.impl_set_state (sid_y, 0, sid_z);
+     ASSERT_EQ (map.get_state (sid_y), 0);
+ 
+     map.impl_set_state (sid_x, 0, sid_z);
+     ASSERT_EQ (map.get_state (sid_x), 0);
+     ASSERT_TRUE (map.is_empty_p ());
+   }
+ 
+   /* Test setting states via equivalence classes.  */
+   {
+     region_model model;
+     svalue_id sid_x = model.get_rvalue (x, NULL);
+     svalue_id sid_y = model.get_rvalue (y, NULL);
+     svalue_id sid_z = model.get_rvalue (z, NULL);
+ 
+     sm_state_map map;
+     ASSERT_TRUE (map.is_empty_p ());
+     ASSERT_EQ (map.get_state (sid_x), 0);
+     ASSERT_EQ (map.get_state (sid_y), 0);
+ 
+     model.add_constraint (x, EQ_EXPR, y, NULL);
+ 
+     /* Setting x to a state should also update y, as they
+        are in the same equivalence class.  */
+     map.set_state (&model, sid_x, 5, sid_z);
+     ASSERT_EQ (map.get_state (sid_x), 5);
+     ASSERT_EQ (map.get_state (sid_y), 5);
+     ASSERT_EQ (map.get_origin (sid_x), sid_z);
+     ASSERT_EQ (map.get_origin (sid_y), sid_z);
+   }
+ 
+   /* Test equality and hashing.  */
+   {
+     region_model model;
+     svalue_id sid_y = model.get_rvalue (y, NULL);
+     svalue_id sid_z = model.get_rvalue (z, NULL);
+ 
+     sm_state_map map0;
+     sm_state_map map1;
+     sm_state_map map2;
+ 
+     ASSERT_EQ (map0.hash (), map1.hash ());
+     ASSERT_EQ (map0, map1);
+ 
+     map1.impl_set_state (sid_y, 5, sid_z);
+     ASSERT_NE (map0.hash (), map1.hash ());
+     ASSERT_NE (map0, map1);
+ 
+     /* Make the same change to map2.  */
+     map2.impl_set_state (sid_y, 5, sid_z);
+     ASSERT_EQ (map1.hash (), map2.hash ());
+     ASSERT_EQ (map1, map2);
+   }
+ 
+   /* Equality and hashing shouldn't depend on ordering.  */
+   {
+     sm_state_map map0;
+     sm_state_map map1;
+     sm_state_map map2;
+ 
+     ASSERT_EQ (map0.hash (), map1.hash ());
+     ASSERT_EQ (map0, map1);
+ 
+     map1.impl_set_state (svalue_id::from_int (14), 2, svalue_id::null ());
+     map1.impl_set_state (svalue_id::from_int (16), 3, svalue_id::null ());
+     map1.impl_set_state (svalue_id::from_int (1), 2, svalue_id::null ());
+     map1.impl_set_state (svalue_id::from_int (9), 2, svalue_id::null ());
+ 
+     map2.impl_set_state (svalue_id::from_int (1), 2, svalue_id::null ());
+     map2.impl_set_state (svalue_id::from_int (16), 3, svalue_id::null ());
+     map2.impl_set_state (svalue_id::from_int (14), 2, svalue_id::null ());
+     map2.impl_set_state (svalue_id::from_int (9), 2, svalue_id::null ());
+ 
+     ASSERT_EQ (map1.hash (), map2.hash ());
+     ASSERT_EQ (map1, map2);
+   }
+ 
+   /* Test sm_state_map::remap_svalue_ids.  */
+   {
+     sm_state_map map;
+     svalue_id sid_0 = svalue_id::from_int (0);
+     svalue_id sid_1 = svalue_id::from_int (1);
+     svalue_id sid_2 = svalue_id::from_int (2);
+ 
+     map.impl_set_state (sid_0, 42, sid_2);
+     ASSERT_EQ (map.get_state (sid_0), 42);
+     ASSERT_EQ (map.get_origin (sid_0), sid_2);
+     ASSERT_EQ (map.get_state (sid_1), 0);
+     ASSERT_EQ (map.get_state (sid_2), 0);
+ 
+     /* Apply a remapping to the IDs.  */
+     svalue_id_map remapping (3);
+     remapping.put (sid_0, sid_1);
+     remapping.put (sid_1, sid_2);
+     remapping.put (sid_2, sid_0);
+     map.remap_svalue_ids (remapping);
+ 
+     /* Verify that the IDs have been remapped.  */
+     ASSERT_EQ (map.get_state (sid_1), 42);
+     ASSERT_EQ (map.get_origin (sid_1), sid_0);
+     ASSERT_EQ (map.get_state (sid_2), 0);
+     ASSERT_EQ (map.get_state (sid_0), 0);
+   }
+ 
+   // TODO: coverage for purging
+ }
+ 
+ /* Verify that program_state::dump_to_pp works as expected.  */
+ 
+ static void
+ test_program_state_dumping ()
+ {
+   /* Create a program_state for a global ptr "p" that has
+      malloc sm-state, pointing to a region on the heap.  */
+   tree p = build_global_decl ("p", ptr_type_node);
+ 
+   state_machine *sm = make_malloc_state_machine (NULL);
+   const state_machine::state_t UNCHECKED_STATE
+     = sm->get_state_by_name ("unchecked");
+   auto_delete_vec <state_machine> checkers;
+   checkers.safe_push (sm);
+   extrinsic_state ext_state (checkers);
+ 
+   program_state s (ext_state);
+   region_model *model = s.m_region_model;
+   region_id new_rid = model->add_new_malloc_region ();
+   svalue_id ptr_sid
+       = model->get_or_create_ptr_svalue (ptr_type_node, new_rid);
+   model->set_value (model->get_lvalue (p, NULL),
+ 		    ptr_sid, NULL);
+   sm_state_map *smap = s.m_checker_states[0];
+ 
+   smap->impl_set_state (ptr_sid, UNCHECKED_STATE, svalue_id::null ());
+   ASSERT_EQ (smap->get_state (ptr_sid), UNCHECKED_STATE);
+ 
+   ASSERT_DUMP_EQ
+     (s, ext_state, false,
+      "rmodel: r0: {kind: `root', parent: null, sval: null}\n"
+      "|-heap: r1: {kind: `heap', parent: r0, sval: null}\n"
+      "|  `-r2: {kind: `symbolic', parent: r1, sval: null, possibly_null: true}\n"
+      "`-globals: r3: {kind: `globals', parent: r0, sval: null, map: {`p': r4}}\n"
+      "  `-`p': r4: {kind: `primitive', parent: r3, sval: sv0, type: `void *'}\n"
+      "    |: sval: sv0: {type: `void *', &r2}\n"
+      "    |: type: `void *'\n"
+      "svalues:\n"
+      "  sv0: {type: `void *', &r2}\n"
+      "constraint manager:\n"
+      "  equiv classes:\n"
+      "  constraints:\n"
+      "malloc: {sv0: unchecked (`p')}\n");
+ 
+   ASSERT_DUMP_EQ (s, ext_state, true,
+ 		  "rmodel: p: &r2 malloc: {sv0: unchecked (`p')}");
+ }
+ 
+ /* Verify that program_state::dump_to_pp works for string literals.  */
+ 
+ static void
+ test_program_state_dumping_2 ()
+ {
+     /* Create a program_state for a global ptr "p" that points to
+        a string constant.  */
+   tree p = build_global_decl ("p", ptr_type_node);
+ 
+   tree string_cst_ptr = build_string_literal (4, "foo");
+ 
+   auto_delete_vec <state_machine> checkers;
+   extrinsic_state ext_state (checkers);
+ 
+   program_state s (ext_state);
+   region_model *model = s.m_region_model;
+   region_id p_rid = model->get_lvalue (p, NULL);
+   svalue_id str_sid = model->get_rvalue (string_cst_ptr, NULL);
+   model->set_value (p_rid, str_sid, NULL);
+ 
+   ASSERT_DUMP_EQ
+     (s, ext_state, false,
+      "rmodel: r0: {kind: `root', parent: null, sval: null}\n"
+      "|-globals: r1: {kind: `globals', parent: r0, sval: null, map: {`p': r2}}\n"
+      "|  `-`p': r2: {kind: `primitive', parent: r1, sval: sv3, type: `void *'}\n"
+      "|    |: sval: sv3: {type: `void *', &r4}\n"
+      "|    |: type: `void *'\n"
+      "`-r3: {kind: `array', parent: r0, sval: sv0, type: `const char[4]', array: {[0]: r4}}\n"
+      "  |: sval: sv0: {type: `const char[4]', `\"foo\"'}\n"
+      "  |: type: `const char[4]'\n"
+      "  `-[0]: r4: {kind: `primitive', parent: r3, sval: null, type: `const char'}\n"
+      "    |: type: `const char'\n"
+      "svalues:\n"
+      "  sv0: {type: `const char[4]', `\"foo\"'}\n"
+      "  sv1: {type: `int', `0'}\n"
+      "  sv2: {type: `const char *', &r4}\n"
+      "  sv3: {type: `void *', &r4}\n"
+      "constraint manager:\n"
+      "  equiv classes:\n"
+      "  constraints:\n");
+ 
+   ASSERT_DUMP_EQ (s, ext_state, true,
+ 		  "rmodel: p: &\"foo\"[0]");
+ }
+ 
+ /* Verify that program_states with identical sm-state can be merged,
+    and that the merged program_state preserves the sm-state.  */
+ 
+ static void
+ test_program_state_merging ()
+ {
+   /* Create a program_state for a global ptr "p" that has
+      malloc sm-state, pointing to a region on the heap.  */
+   tree p = build_global_decl ("p", ptr_type_node);
+ 
+   auto_delete_vec <state_machine> checkers;
+   checkers.safe_push (make_malloc_state_machine (NULL));
+   extrinsic_state ext_state (checkers);
+ 
+   program_state s0 (ext_state);
+   impl_region_model_context ctxt (&s0, NULL, ext_state);
+ 
+   region_model *model0 = s0.m_region_model;
+   region_id new_rid = model0->add_new_malloc_region ();
+   svalue_id ptr_sid
+       = model0->get_or_create_ptr_svalue (ptr_type_node, new_rid);
+   model0->set_value (model0->get_lvalue (p, &ctxt),
+ 		     ptr_sid, &ctxt);
+   sm_state_map *smap = s0.m_checker_states[0];
+   const state_machine::state_t TEST_STATE = 3;
+   smap->impl_set_state (ptr_sid, TEST_STATE, svalue_id::null ());
+   ASSERT_EQ (smap->get_state (ptr_sid), TEST_STATE);
+ 
+   model0->canonicalize (&ctxt);
+ 
+   /* Verify that canonicalization preserves sm-state.  */
+   ASSERT_EQ (smap->get_state (model0->get_rvalue (p, NULL)), TEST_STATE);
+ 
+   /* Make a copy of the program_state.  */
+   program_state s1 (s0);
+   ASSERT_EQ (s0, s1);
+ 
+   /* We have two identical states with "p" pointing to a heap region
+      with the given sm-state.
+      They ought to be mergeable, preserving the sm-state.  */
+   program_state merged (ext_state);
+   ASSERT_TRUE (s0.can_merge_with_p (s1, ext_state, &merged));
+   merged.validate (ext_state);
+ 
+   /* Verify that the merged state has the sm-state for "p".  */
+   region_model *merged_model = merged.m_region_model;
+   sm_state_map *merged_smap = merged.m_checker_states[0];
+   ASSERT_EQ (merged_smap->get_state (merged_model->get_rvalue (p, NULL)),
+ 	     TEST_STATE);
+ 
+   /* Try canonicalizing.  */
+   impl_region_model_context merged_ctxt (&merged, NULL, ext_state);
+   merged.m_region_model->canonicalize (&merged_ctxt);
+   merged.validate (ext_state);
+ 
+   /* Verify that the merged state still has the sm-state for "p".  */
+   ASSERT_EQ (merged_smap->get_state (merged_model->get_rvalue (p, NULL)),
+ 	     TEST_STATE);
+ 
+   /* After canonicalization, we ought to have equality with the inputs.  */
+   ASSERT_EQ (s0, merged);
+ }
+ 
+ /* Verify that program_states with different global-state in an sm-state
+    can't be merged.  */
+ 
+ static void
+ test_program_state_merging_2 ()
+ {
+   auto_delete_vec <state_machine> checkers;
+   checkers.safe_push (make_signal_state_machine (NULL));
+   extrinsic_state ext_state (checkers);
+ 
+   program_state s0 (ext_state);
+   {
+     sm_state_map *smap0 = s0.m_checker_states[0];
+     const state_machine::state_t TEST_STATE_0 = 0;
+     smap0->set_global_state (TEST_STATE_0);
+     ASSERT_EQ (smap0->get_global_state (), TEST_STATE_0);
+   }
+ 
+   program_state s1 (ext_state);
+   {
+     sm_state_map *smap1 = s1.m_checker_states[0];
+     const state_machine::state_t TEST_STATE_1 = 1;
+     smap1->set_global_state (TEST_STATE_1);
+     ASSERT_EQ (smap1->get_global_state (), TEST_STATE_1);
+   }
+ 
+   ASSERT_NE (s0, s1);
+ 
+   /* They ought to not be mergeable.  */
+   program_state merged (ext_state);
+   ASSERT_FALSE (s0.can_merge_with_p (s1, ext_state, &merged));
+ }
+ 
+ /* Run all of the selftests within this file.  */
+ 
+ void
+ analyzer_program_state_cc_tests ()
+ {
+   test_sm_state_map ();
+   test_program_state_dumping ();
+   test_program_state_dumping_2 ();
+   test_program_state_merging ();
+   test_program_state_merging_2 ();
+ }
+ 
+ } // namespace selftest
+ 
+ #endif /* CHECKING_P */
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/program-state.h gcc-10.1.0/gcc/analyzer/program-state.h
*** gcc-9.3.0/gcc/analyzer/program-state.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/program-state.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,387 ----
+ /* Classes for representing the state of interest at a given path of analysis.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_PROGRAM_STATE_H
+ #define GCC_ANALYZER_PROGRAM_STATE_H
+ 
+ namespace ana {
+ 
+ /* Data shared by all program_state instances.  */
+ 
+ class extrinsic_state
+ {
+ public:
+   extrinsic_state (auto_delete_vec <state_machine> &checkers)
+   : m_checkers (checkers)
+   {
+   }
+ 
+   const state_machine &get_sm (int idx) const
+   {
+     return *m_checkers[idx];
+   }
+ 
+   const char *get_name (int idx) const
+   {
+     return m_checkers[idx]->get_name ();
+   }
+ 
+   unsigned get_num_checkers () const { return m_checkers.length (); }
+ 
+   void dump_to_pp (pretty_printer *pp) const;
+   void dump_to_file (FILE *outf) const;
+   void dump () const;
+ 
+ private:
+   /* The state machines.  */
+   auto_delete_vec <state_machine> &m_checkers;
+ };
+ 
+ } // namespace ana
+ 
+ template <> struct default_hash_traits<svalue_id>
+ : public pod_hash_traits<svalue_id>
+ {
+   static const bool empty_zero_p = false;
+ };
+ 
+ template <>
+ inline hashval_t
+ pod_hash_traits<svalue_id>::hash (value_type v)
+ {
+   return v.as_int ();
+ }
+ 
+ template <>
+ inline bool
+ pod_hash_traits<svalue_id>::equal (const value_type &existing,
+ 				   const value_type &candidate)
+ {
+   return existing == candidate;
+ }
+ template <>
+ inline void
+ pod_hash_traits<svalue_id>::mark_deleted (value_type &v)
+ {
+   v = svalue_id::from_int (-2);
+ }
+ template <>
+ inline void
+ pod_hash_traits<svalue_id>::mark_empty (value_type &v)
+ {
+   v = svalue_id::null ();
+ }
+ template <>
+ inline bool
+ pod_hash_traits<svalue_id>::is_deleted (value_type v)
+ {
+   return v.as_int () == -2;
+ }
+ template <>
+ inline bool
+ pod_hash_traits<svalue_id>::is_empty (value_type v)
+ {
+   return v.null_p ();
+ }
+ 
+ namespace ana {
+ 
+ /* Map from svalue_id to state machine state, also capturing the origin of
+    each state.  */
+ 
+ class sm_state_map
+ {
+ public:
+   /* An entry in the hash_map.  */
+   struct entry_t
+   {
+     /* Default ctor needed by hash_map::empty.  */
+     entry_t ()
+     : m_state (0), m_origin (svalue_id::null ())
+     {
+     }
+ 
+     entry_t (state_machine::state_t state,
+ 	     svalue_id origin)
+     : m_state (state), m_origin (origin)
+     {}
+ 
+     bool operator== (const entry_t &other) const
+     {
+       return (m_state == other.m_state
+ 	      && m_origin == other.m_origin);
+     }
+     bool operator!= (const entry_t &other) const
+     {
+       return !(*this == other);
+     }
+ 
+     state_machine::state_t m_state;
+     svalue_id m_origin;
+   };
+   typedef hash_map <svalue_id, entry_t> map_t;
+   typedef map_t::iterator iterator_t;
+ 
+   sm_state_map ();
+ 
+   sm_state_map *clone () const;
+ 
+   sm_state_map *
+   clone_with_remapping (const one_way_svalue_id_map &id_map) const;
+ 
+   void print (const state_machine &sm, const region_model *model,
+ 	      pretty_printer *pp) const;
+   void dump (const state_machine &sm) const;
+ 
+   bool is_empty_p () const;
+ 
+   hashval_t hash () const;
+ 
+   bool operator== (const sm_state_map &other) const;
+   bool operator!= (const sm_state_map &other) const
+   {
+     return !(*this == other);
+   }
+ 
+   state_machine::state_t get_state (svalue_id sid) const;
+   svalue_id get_origin (svalue_id sid) const;
+ 
+   void set_state (region_model *model,
+ 		  svalue_id sid,
+ 		  state_machine::state_t state,
+ 		  svalue_id origin);
+   bool set_state (const equiv_class &ec,
+ 		  state_machine::state_t state,
+ 		  svalue_id origin);
+   bool impl_set_state (svalue_id sid,
+ 		       state_machine::state_t state,
+ 		       svalue_id origin);
+ 
+   void set_global_state (state_machine::state_t state);
+   state_machine::state_t get_global_state () const;
+ 
+   void purge_for_unknown_fncall (const exploded_graph &eg,
+ 				 const state_machine &sm,
+ 				 const gcall *call, tree fndecl,
+ 				 region_model *new_model,
+ 				 region_model_context *ctxt);
+ 
+   void remap_svalue_ids (const svalue_id_map &map);
+ 
+   int on_svalue_purge (const state_machine &sm,
+ 		       int sm_idx,
+ 		       svalue_id first_unused_sid,
+ 		       const svalue_id_map &map,
+ 		       impl_region_model_context *ctxt);
+ 
+   void on_inherited_svalue (svalue_id parent_sid,
+ 			    svalue_id child_sid);
+ 
+   void on_cast (svalue_id src_sid,
+ 		svalue_id dst_sid);
+ 
+   void on_unknown_change (svalue_id sid);
+ 
+   void validate (const state_machine &sm, int num_svalues) const;
+ 
+   iterator_t begin () const { return m_map.begin (); }
+   iterator_t end () const { return m_map.end (); }
+ 
+ private:
+   map_t m_map;
+   state_machine::state_t m_global_state;
+ };
+ 
+ /* A class for representing the state of interest at a given path of
+    analysis.
+ 
+    Currently this is a combination of:
+    (a) a region_model, giving:
+       (a.1) a hierarchy of memory regions
+       (a.2) values for the regions
+       (a.3) inequalities between values
+    (b) sm_state_maps per state machine, giving a sparse mapping of
+        values to states.  */
+ 
+ class program_state
+ {
+ public:
+   program_state (const extrinsic_state &ext_state);
+   program_state (const program_state &other);
+   program_state& operator= (const program_state &other);
+ 
+ #if __cplusplus >= 201103
+   program_state (program_state &&other);
+   program_state& operator= (program_state &&other); // doesn't seem to be used
+ #endif
+ 
+   ~program_state ();
+ 
+   hashval_t hash () const;
+   bool operator== (const program_state &other) const;
+   bool operator!= (const program_state &other) const
+   {
+     return !(*this == other);
+   }
+ 
+   void print (const extrinsic_state &ext_state,
+ 	      pretty_printer *pp) const;
+ 
+   void dump_to_pp (const extrinsic_state &ext_state, bool summarize,
+ 		   pretty_printer *pp) const;
+   void dump_to_file (const extrinsic_state &ext_state, bool summarize,
+ 		     FILE *outf) const;
+   void dump (const extrinsic_state &ext_state, bool summarize) const;
+ 
+   bool on_edge (exploded_graph &eg,
+ 		const exploded_node &enode,
+ 		const superedge *succ,
+ 		state_change *change);
+ 
+   program_state prune_for_point (exploded_graph &eg,
+ 				 const program_point &point,
+ 				 state_change *change) const;
+ 
+   void remap_svalue_ids (const svalue_id_map &map);
+ 
+   tree get_representative_tree (svalue_id sid) const;
+ 
+   bool can_purge_p (const extrinsic_state &ext_state,
+ 		    svalue_id sid)
+   {
+     /* Don't purge vars that have non-purgeable sm state, to avoid
+        generating false "leak" complaints.  */
+     int i;
+     sm_state_map *smap;
+     FOR_EACH_VEC_ELT (m_checker_states, i, smap)
+       {
+ 	const state_machine &sm = ext_state.get_sm (i);
+ 	if (!sm.can_purge_p (smap->get_state (sid)))
+ 	  return false;
+       }
+     return true;
+   }
+ 
+   bool can_merge_with_p (const program_state &other,
+ 			 const extrinsic_state &ext_state,
+ 			 program_state *out) const;
+ 
+   void validate (const extrinsic_state &ext_state) const;
+ 
+   /* TODO: lose the pointer here (const-correctness issues?).  */
+   region_model *m_region_model;
+   auto_delete_vec<sm_state_map> m_checker_states;
+ 
+   /* If false, then don't attempt to explore further states along this path.
+      For use in "handling" lvalues for tree codes we haven't yet
+      implemented.  */
+   bool m_valid;
+ };
+ 
+ /* An abstract base class for use with for_each_state_change.  */
+ 
+ class state_change_visitor
+ {
+ public:
+   virtual ~state_change_visitor () {}
+ 
+   /* Return true for early exit, false to keep iterating.  */
+   virtual bool on_global_state_change (const state_machine &sm,
+ 				       state_machine::state_t src_sm_val,
+ 				       state_machine::state_t dst_sm_val) = 0;
+ 
+   /* Return true for early exit, false to keep iterating.  */
+   virtual bool on_state_change (const state_machine &sm,
+ 				state_machine::state_t src_sm_val,
+ 				state_machine::state_t dst_sm_val,
+ 				tree dst_rep,
+ 				svalue_id dst_origin_sid) = 0;
+ };
+ 
+ extern bool for_each_state_change (const program_state &src_state,
+ 				   const program_state &dst_state,
+ 				   const extrinsic_state &ext_state,
+ 				   state_change_visitor *visitor);
+ 
+ /* A class for recording "interesting" state changes.
+    This is used for annotating edges in the GraphViz output of the
+    exploded_graph, and for recording sm-state-changes, so that
+    values that change aren't purged (to make it easier to generate
+    state_change_event instances in the diagnostic_path).  */
+ 
+ class state_change
+ {
+  public:
+   struct sm_change
+   {
+     sm_change (int sm_idx,
+ 	       svalue_id new_sid,
+ 	       state_machine::state_t old_state,
+ 	       state_machine::state_t new_state)
+     : m_sm_idx (sm_idx),
+       m_new_sid (new_sid),
+       m_old_state (old_state), m_new_state (new_state)
+     {}
+ 
+     const state_machine &get_sm (const extrinsic_state &ext_state) const
+     {
+       return ext_state.get_sm (m_sm_idx);
+     }
+ 
+     void dump (pretty_printer *pp, const extrinsic_state &ext_state) const;
+ 
+     void remap_svalue_ids (const svalue_id_map &map);
+     int on_svalue_purge (svalue_id first_unused_sid);
+ 
+     void validate (const program_state &new_state,
+ 		   const extrinsic_state &ext_state) const;
+ 
+     int m_sm_idx;
+     svalue_id m_new_sid;
+     state_machine::state_t m_old_state;
+     state_machine::state_t m_new_state;
+   };
+ 
+   state_change ();
+   state_change (const state_change &other);
+ 
+   void add_sm_change (int sm_idx,
+ 		      svalue_id new_sid,
+ 		      state_machine::state_t old_state,
+ 		      state_machine::state_t new_state);
+ 
+   bool affects_p (svalue_id sid) const;
+ 
+   void dump (pretty_printer *pp, const extrinsic_state &ext_state) const;
+   void dump (const extrinsic_state &ext_state) const;
+ 
+   void remap_svalue_ids (const svalue_id_map &map);
+   int on_svalue_purge (svalue_id first_unused_sid);
+ 
+   void validate (const program_state &new_state,
+ 		 const extrinsic_state &ext_state) const;
+ 
+  private:
+   auto_vec<sm_change> m_sm_changes;
+ };
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_PROGRAM_STATE_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/reachability.h gcc-10.1.0/gcc/analyzer/reachability.h
*** gcc-9.3.0/gcc/analyzer/reachability.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/reachability.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,76 ----
+ /* Digraph reachability.
+    Copyright (C) 2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_REACHABILITY_H
+ #define GCC_ANALYZER_REACHABILITY_H
+ 
+ namespace ana {
+ 
+ /* The set of nodes from which a target node in a digraph can be reached.  */
+ // TODO(stage1): move to gcc
+ 
+ template <typename GraphTraits>
+ class reachability
+ {
+ public:
+   typedef typename GraphTraits::graph_t graph_t;
+   typedef typename GraphTraits::node_t node_t;
+   typedef typename GraphTraits::edge_t edge_t;
+ 
+   reachability (const graph_t &graph,
+ 		const node_t *target_node)
+   : m_indices (graph.m_nodes.length ())
+   {
+     bitmap_clear (m_indices);
+     auto_vec<const node_t *> worklist;
+     worklist.safe_push (target_node);
+     bitmap_set_bit (m_indices, target_node->m_index);
+ 
+     while (worklist.length () > 0)
+       {
+ 	const node_t *next = worklist.pop ();
+ 	unsigned i;
+ 	edge_t *pred;
+ 	FOR_EACH_VEC_ELT (next->m_preds, i, pred)
+ 	  {
+ 	    if (!reachable_from_p (pred->m_src))
+ 	      {
+ 		worklist.safe_push (pred->m_src);
+ 		bitmap_set_bit (m_indices, pred->m_src->m_index);
+ 	      }
+ 	  }
+       }
+   }
+ 
+   bool reachable_from_p (const node_t *src_node) const
+   {
+     return bitmap_bit_p (m_indices, src_node->m_index);
+   }
+ 
+ private:
+   /* The nodes that can reach the target.  */
+   auto_sbitmap m_indices;
+ };
+ 
+ //TODO: selftests for reachability
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_REACHABILITY_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/region-model.cc gcc-10.1.0/gcc/analyzer/region-model.cc
*** gcc-9.3.0/gcc/analyzer/region-model.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/region-model.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,8845 ----
+ /* Classes for modeling the state of memory.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "gimple-iterator.h"
+ #include "diagnostic-core.h"
+ #include "graphviz.h"
+ #include "options.h"
+ #include "cgraph.h"
+ #include "tree-dfa.h"
+ #include "stringpool.h"
+ #include "convert.h"
+ #include "target.h"
+ #include "fold-const.h"
+ #include "tree-pretty-print.h"
+ #include "diagnostic-color.h"
+ #include "diagnostic-metadata.h"
+ #include "tristate.h"
+ #include "bitmap.h"
+ #include "selftest.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "ordered-hash-map.h"
+ #include "options.h"
+ #include "cgraph.h"
+ #include "cfg.h"
+ #include "digraph.h"
+ #include "analyzer/supergraph.h"
+ #include "sbitmap.h"
+ #include "analyzer/region-model.h"
+ #include "analyzer/constraint-manager.h"
+ #include "diagnostic-event-id.h"
+ #include "analyzer/sm.h"
+ #include "diagnostic-event-id.h"
+ #include "analyzer/sm.h"
+ #include "analyzer/pending-diagnostic.h"
+ #include "analyzer/analyzer-selftests.h"
+ #include "stor-layout.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ /* Dump T to PP in language-independent form, for debugging/logging/dumping
+    purposes.  */
+ 
+ static void
+ dump_tree (pretty_printer *pp, tree t)
+ {
+   dump_generic_node (pp, t, 0, TDF_SLIM, 0);
+ }
+ 
+ /* Dump T to PP in language-independent form in quotes, for
+    debugging/logging/dumping purposes.  */
+ 
+ void
+ dump_quoted_tree (pretty_printer *pp, tree t)
+ {
+   pp_begin_quote (pp, pp_show_color (pp));
+   dump_tree (pp, t);
+   pp_end_quote (pp, pp_show_color (pp));
+ }
+ 
+ /* Equivalent to pp_printf (pp, "%qT", t), to avoid nesting pp_printf
+    calls within other pp_printf calls.
+ 
+    default_tree_printer handles 'T' and some other codes by calling
+      dump_generic_node (pp, t, 0, TDF_SLIM, 0);
+    dump_generic_node calls pp_printf in various places, leading to
+    garbled output.
+ 
+    Ideally pp_printf could be made to be reentrant, but in the meantime
+    this function provides a workaround.  */
+ 
+ static void
+ print_quoted_type (pretty_printer *pp, tree t)
+ {
+   pp_begin_quote (pp, pp_show_color (pp));
+   dump_generic_node (pp, t, 0, TDF_SLIM, 0);
+   pp_end_quote (pp, pp_show_color (pp));
+ }
+ 
+ /* Dump this path_var to PP (which must support %E for trees).
+ 
+    Express the stack depth using an "@DEPTH" suffix, so e.g. given
+      void foo (int j);
+      void bar (int i)
+      {
+        foo (i);
+      }
+    then:
+    - the "i" in "bar" would be "(i @ 0)"
+    - the "j" in "foo" would be "(j @ 1)".  */
+ 
+ void
+ path_var::dump (pretty_printer *pp) const
+ {
+   if (m_tree == NULL_TREE)
+     pp_string (pp, "NULL");
+   if (CONSTANT_CLASS_P (m_tree))
+     pp_printf (pp, "%qE", m_tree);
+   else
+     pp_printf (pp, "(%qE @ %i)", m_tree, m_stack_depth);
+ }
+ 
+ /* For use in printing a comma-separated list.  */
+ 
+ static void
+ dump_separator (pretty_printer *pp, bool *is_first)
+ {
+   if (!*is_first)
+     pp_string (pp, ", ");
+   *is_first = false;
+ }
+ 
+ /* Concrete subclass of constraint_manager that wires it up to a region_model
+    (whilst allowing the constraint_manager and region_model to be somewhat
+    at arms length).
+    TODO: revisit this; maybe put the region_model * into the constraint_manager
+    base class.  */
+ 
+ class impl_constraint_manager : public constraint_manager
+ {
+  public:
+   impl_constraint_manager (region_model *model)
+   : constraint_manager (),
+     m_model (model)
+   {}
+ 
+   impl_constraint_manager (const impl_constraint_manager &other,
+ 			   region_model *model)
+   : constraint_manager (other),
+     m_model (model)
+   {}
+ 
+   constraint_manager *clone (region_model *model) const
+   {
+     return new impl_constraint_manager (*this, model);
+   }
+ 
+   tree maybe_get_constant (svalue_id sid) const FINAL OVERRIDE
+   {
+     svalue *svalue = m_model->get_svalue (sid);
+     return svalue->maybe_get_constant ();
+   }
+ 
+   svalue_id get_sid_for_constant (tree cst) const FINAL OVERRIDE
+   {
+     gcc_assert (CONSTANT_CLASS_P (cst));
+     return m_model->get_rvalue (cst, NULL);
+   }
+ 
+   int get_num_svalues () const FINAL OVERRIDE
+   {
+     return m_model->get_num_svalues ();
+   }
+ 
+  private:
+   region_model *m_model;
+ };
+ 
+ /* class svalue_id.  */
+ 
+ /* Print this svalue_id to PP.  */
+ 
+ void
+ svalue_id::print (pretty_printer *pp) const
+ {
+   if (null_p ())
+     pp_printf (pp, "null");
+   else
+     pp_printf (pp, "sv%i", m_idx);
+ }
+ 
+ /* Print this svalue_id in .dot format to PP.  */
+ 
+ void
+ svalue_id::dump_node_name_to_pp (pretty_printer *pp) const
+ {
+   gcc_assert (!null_p ());
+   pp_printf (pp, "svalue_%i", m_idx);
+ }
+ 
+ /* Assert that this object is valid (w.r.t. MODEL).  */
+ 
+ void
+ svalue_id::validate (const region_model &model) const
+ {
+   gcc_assert (null_p () || m_idx < (int)model.get_num_svalues ());
+ }
+ 
+ /* class region_id.  */
+ 
+ /* Print this region_id to PP.  */
+ 
+ void
+ region_id::print (pretty_printer *pp) const
+ {
+   if (null_p ())
+     pp_printf (pp, "null");
+   else
+     pp_printf (pp, "r%i", m_idx);
+ }
+ 
+ /* Print this region_id in .dot format to PP.  */
+ 
+ void
+ region_id::dump_node_name_to_pp (pretty_printer *pp) const
+ {
+   gcc_assert (!null_p ());
+   pp_printf (pp, "region_%i", m_idx);
+ }
+ 
+ /* Assert that this object is valid (w.r.t. MODEL).  */
+ 
+ void
+ region_id::validate (const region_model &model) const
+ {
+   gcc_assert (null_p () || m_idx < (int)model.get_num_regions ());
+ }
+ 
+ /* class region_id_set.  */
+ 
+ region_id_set::region_id_set (const region_model *model)
+ : m_bitmap (model->get_num_regions ())
+ {
+   bitmap_clear (m_bitmap);
+ }
+ 
+ /* class svalue_id_set.  */
+ 
+ svalue_id_set::svalue_id_set ()
+ : m_bitmap (NULL)
+ {
+   bitmap_clear (m_bitmap);
+ }
+ 
+ /* class svalue and its various subclasses.  */
+ 
+ /* class svalue.  */
+ 
+ /* svalue's equality operator.  Most of the work is done by the
+    a "compare_fields" implementation on each subclass.  */
+ 
+ bool
+ svalue::operator== (const svalue &other) const
+ {
+   enum svalue_kind this_kind = get_kind ();
+   enum svalue_kind other_kind = other.get_kind ();
+   if (this_kind != other_kind)
+     return false;
+ 
+   if (m_type != other.m_type)
+     return false;
+ 
+   switch (this_kind)
+     {
+     default:
+       gcc_unreachable ();
+     case SK_REGION:
+       {
+ 	const region_svalue &this_sub
+ 	  = (const region_svalue &)*this;
+ 	const region_svalue &other_sub
+ 	  = (const region_svalue &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+       break;
+     case SK_CONSTANT:
+       {
+ 	const constant_svalue &this_sub
+ 	  = (const constant_svalue &)*this;
+ 	const constant_svalue &other_sub
+ 	  = (const constant_svalue &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+       break;
+     case SK_UNKNOWN:
+       {
+ 	const unknown_svalue &this_sub
+ 	  = (const unknown_svalue &)*this;
+ 	const unknown_svalue &other_sub
+ 	  = (const unknown_svalue &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+       break;
+     case SK_POISONED:
+       {
+ 	const poisoned_svalue &this_sub
+ 	  = (const poisoned_svalue &)*this;
+ 	const poisoned_svalue &other_sub
+ 	  = (const poisoned_svalue &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+       break;
+     case SK_SETJMP:
+       {
+ 	const setjmp_svalue &this_sub
+ 	  = (const setjmp_svalue &)*this;
+ 	const setjmp_svalue &other_sub
+ 	  = (const setjmp_svalue &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+       break;
+     }
+ }
+ 
+ /* Generate a hash value for this svalue.  Most of the work is done by the
+    add_to_hash vfunc.  */
+ 
+ hashval_t
+ svalue::hash () const
+ {
+   inchash::hash hstate;
+   if (m_type)
+     hstate.add_int (TYPE_UID (m_type));
+   add_to_hash (hstate);
+   return hstate.end ();
+ }
+ 
+ /* Print this svalue and its ID to PP.  */
+ 
+ void
+ svalue::print (const region_model &model,
+ 	       svalue_id this_sid,
+ 	       pretty_printer *pp) const
+ {
+   this_sid.print (pp);
+   pp_string (pp, ": {");
+ 
+   if (m_type)
+     {
+       gcc_assert (TYPE_P (m_type));
+       pp_string (pp, "type: ");
+       print_quoted_type (pp, m_type);
+       pp_string (pp, ", ");
+     }
+ 
+   /* vfunc.  */
+   print_details (model, this_sid, pp);
+ 
+   pp_string (pp, "}");
+ }
+ 
+ /* Dump this svalue in the form of a .dot record to PP.  */
+ 
+ void
+ svalue::dump_dot_to_pp (const region_model &model,
+ 			svalue_id this_sid,
+ 			pretty_printer *pp) const
+ {
+   this_sid.dump_node_name_to_pp (pp);
+   pp_printf (pp, " [label=\"");
+   pp_write_text_to_stream (pp);
+   this_sid.print (pp);
+   pp_string (pp, ": {");
+   print (model, this_sid, pp);
+   pp_write_text_as_dot_label_to_stream (pp, /*for_record=*/false);
+   pp_string (pp, "}\"];");
+   pp_newline (pp);
+ }
+ 
+ /* Base implementation of svalue::remap_region_ids vfunc.  */
+ 
+ void
+ svalue::remap_region_ids (const region_id_map &)
+ {
+   /* Empty.  */
+ }
+ 
+ /* Base implementation of svalue::walk_for_canonicalization vfunc.  */
+ 
+ void
+ svalue::walk_for_canonicalization (canonicalization *) const
+ {
+   /* Empty.  */
+ }
+ 
+ /* Base implementation of svalue::get_child_sid vfunc.  */
+ 
+ svalue_id
+ svalue::get_child_sid (region *parent ATTRIBUTE_UNUSED,
+ 		       region *child,
+ 		       region_model &model,
+ 		       region_model_context *ctxt ATTRIBUTE_UNUSED)
+ {
+   svalue *new_child_value = clone ();
+   if (child->get_type ())
+     new_child_value->m_type = child->get_type ();
+   svalue_id new_child_sid = model.add_svalue (new_child_value);
+   return new_child_sid;
+ }
+ 
+ /* If this svalue is a constant_svalue, return the underlying tree constant.
+    Otherwise return NULL_TREE.  */
+ 
+ tree
+ svalue::maybe_get_constant () const
+ {
+   if (const constant_svalue *cst_sval = dyn_cast_constant_svalue ())
+     return cst_sval->get_constant ();
+   else
+     return NULL_TREE;
+ }
+ 
+ /* class region_svalue : public svalue.  */
+ 
+ /* Compare the fields of this region_svalue with OTHER, returning true
+    if they are equal.
+    For use by svalue::operator==.  */
+ 
+ bool
+ region_svalue::compare_fields (const region_svalue &other) const
+ {
+   return m_rid == other.m_rid;
+ }
+ 
+ /* Implementation of svalue::add_to_hash vfunc for region_svalue.  */
+ 
+ void
+ region_svalue::add_to_hash (inchash::hash &hstate) const
+ {
+   inchash::add (m_rid, hstate);
+ }
+ 
+ /* Implementation of svalue::print_details vfunc for region_svalue.  */
+ 
+ void
+ region_svalue::print_details (const region_model &model ATTRIBUTE_UNUSED,
+ 			      svalue_id this_sid ATTRIBUTE_UNUSED,
+ 			      pretty_printer *pp) const
+ {
+   if (m_rid.null_p ())
+     pp_string (pp, "NULL");
+   else
+     {
+       pp_string (pp, "&");
+       m_rid.print (pp);
+     }
+ }
+ 
+ /* Implementation of svalue::dump_dot_to_pp for region_svalue.  */
+ 
+ void
+ region_svalue::dump_dot_to_pp (const region_model &model,
+ 			       svalue_id this_sid,
+ 			       pretty_printer *pp) const
+ {
+   svalue::dump_dot_to_pp (model, this_sid, pp);
+ 
+   /* If non-NULL, add an edge to the pointed-to region.  */
+   if (!m_rid.null_p ())
+     {
+       this_sid.dump_node_name_to_pp (pp);
+       pp_string (pp, " -> ");
+       m_rid.dump_node_name_to_pp (pp);
+       pp_string (pp, ";");
+       pp_newline (pp);
+   }
+ }
+ 
+ /* Implementation of svalue::remap_region_ids vfunc for region_svalue.  */
+ 
+ void
+ region_svalue::remap_region_ids (const region_id_map &map)
+ {
+   map.update (&m_rid);
+ }
+ 
+ /* Merge REGION_SVAL_A and REGION_SVAL_B using MERGER, writing the result
+    into *MERGED_SID.  */
+ 
+ void
+ region_svalue::merge_values (const region_svalue &region_sval_a,
+ 			     const region_svalue &region_sval_b,
+ 			     svalue_id *merged_sid,
+ 			     tree type,
+ 			     model_merger *merger)
+ {
+   region_id a_rid = region_sval_a.get_pointee ();
+   region_id b_rid = region_sval_b.get_pointee ();
+ 
+   /* Both are non-NULL. */
+   gcc_assert (!a_rid.null_p () && !b_rid.null_p ());
+ 
+   /* Have these ptr-values already been merged?  */
+ 
+   region_id a_rid_in_m
+     = merger->m_map_regions_from_a_to_m.get_dst_for_src (a_rid);
+   region_id b_rid_in_m
+     = merger->m_map_regions_from_b_to_m.get_dst_for_src (b_rid);
+ 
+   /* "null_p" here means "we haven't seen this ptr-value before".
+      If we've seen one but not the other, or we have different
+      regions, then the merged ptr has to be "unknown".  */
+   if (a_rid_in_m != b_rid_in_m)
+     {
+       svalue *merged_sval = new unknown_svalue (type);
+       *merged_sid = merger->m_merged_model->add_svalue (merged_sval);
+       return;
+     }
+ 
+   /* Have we seen this yet?  If so, reuse the value.  */
+   if (!a_rid_in_m.null_p ())
+     {
+       *merged_sid
+ 	= merger->m_merged_model->get_or_create_ptr_svalue (type, a_rid_in_m);
+       return;
+     }
+ 
+   /* Otherwise we have A/B regions that haven't been referenced yet.  */
+ 
+   /* Are the regions the "same", when seen from the tree point-of-view.
+      If so, create a merged pointer to it.  */
+   path_var pv_a = merger->m_model_a->get_representative_path_var (a_rid);
+   path_var pv_b = merger->m_model_b->get_representative_path_var (b_rid);
+   if (pv_a.m_tree
+       && pv_a == pv_b)
+     {
+       region_id merged_pointee_rid
+ 	= merger->m_merged_model->get_lvalue (pv_a, NULL);
+       *merged_sid
+ 	= merger->m_merged_model->get_or_create_ptr_svalue (type,
+ 							    merged_pointee_rid);
+       merger->record_regions (a_rid, b_rid, merged_pointee_rid);
+       return;
+     }
+ 
+   /* Handle an A/B pair of ptrs that both point at heap regions.
+      If they both have a heap region in the merger model, merge them.  */
+   region *region_a = merger->m_model_a->get_region (a_rid);
+   region *region_b = merger->m_model_b->get_region (b_rid);
+   region_id a_parent_rid = region_a->get_parent ();
+   region_id b_parent_rid = region_b->get_parent ();
+   region *parent_region_a = merger->m_model_a->get_region (a_parent_rid);
+   region *parent_region_b = merger->m_model_b->get_region (b_parent_rid);
+   if (parent_region_a
+       && parent_region_b
+       && parent_region_a->get_kind () == RK_HEAP
+       && parent_region_b->get_kind () == RK_HEAP)
+     {
+ 	/* We have an A/B pair of ptrs that both point at heap regions.  */
+ 	/* presumably we want to see if each A/B heap region already
+ 	   has a merged region, and, if so, is it the same one.  */
+ 	// This check is above
+ 
+ 	region_id merged_pointee_rid
+ 	  = merger->m_merged_model->add_new_malloc_region ();
+ 	*merged_sid
+ 	  = merger->m_merged_model->get_or_create_ptr_svalue
+ 	     (type, merged_pointee_rid);
+ 	merger->record_regions (a_rid, b_rid, merged_pointee_rid);
+ 	return;
+     }
+ 
+   /* Two different non-NULL pointers?  Merge to unknown.  */
+   svalue *merged_sval = new unknown_svalue (type);
+   *merged_sid = merger->m_merged_model->add_svalue (merged_sval);
+   return;
+ }
+ 
+ /* Implementation of svalue::walk_for_canonicalization vfunc for
+    region_svalue.  */
+ 
+ void
+ region_svalue::walk_for_canonicalization (canonicalization *c) const
+ {
+   c->walk_rid (m_rid);
+ }
+ 
+ /* Evaluate the condition LHS OP RHS.
+    Subroutine of region_model::eval_condition for when we have a pair of
+    pointers.  */
+ 
+ tristate
+ region_svalue::eval_condition (region_svalue *lhs,
+ 			       enum tree_code op,
+ 			       region_svalue *rhs)
+ {
+   /* See if they point to the same region.  */
+   /* TODO: what about child regions where the child is the first child
+      (or descendent)?  */
+   region_id lhs_rid = lhs->get_pointee ();
+   region_id rhs_rid = rhs->get_pointee ();
+   switch (op)
+     {
+     default:
+       gcc_unreachable ();
+ 
+     case EQ_EXPR:
+       if (lhs_rid == rhs_rid)
+ 	return tristate::TS_TRUE;
+       else
+ 	return tristate::TS_FALSE;
+       break;
+ 
+     case NE_EXPR:
+       if (lhs_rid != rhs_rid)
+ 	return tristate::TS_TRUE;
+       else
+ 	return tristate::TS_FALSE;
+       break;
+ 
+     case GE_EXPR:
+     case LE_EXPR:
+       if (lhs_rid == rhs_rid)
+ 	return tristate::TS_TRUE;
+       break;
+ 
+     case GT_EXPR:
+     case LT_EXPR:
+       if (lhs_rid == rhs_rid)
+ 	return tristate::TS_FALSE;
+       break;
+     }
+ 
+   return tristate::TS_UNKNOWN;
+ }
+ 
+ /* class constant_svalue : public svalue.  */
+ 
+ /* Compare the fields of this constant_svalue with OTHER, returning true
+    if they are equal.
+    For use by svalue::operator==.  */
+ 
+ bool
+ constant_svalue::compare_fields (const constant_svalue &other) const
+ {
+   return m_cst_expr == other.m_cst_expr;
+ }
+ 
+ /* Implementation of svalue::add_to_hash vfunc for constant_svalue.  */
+ 
+ void
+ constant_svalue::add_to_hash (inchash::hash &hstate) const
+ {
+   inchash::add_expr (m_cst_expr, hstate);
+ }
+ 
+ /* Merge the CST_SVAL_A and CST_SVAL_B using MERGER, writing the id of
+    the resulting svalue into *MERGED_SID.  */
+ 
+ void
+ constant_svalue::merge_values (const constant_svalue &cst_sval_a,
+ 			       const constant_svalue &cst_sval_b,
+ 			       svalue_id *merged_sid,
+ 			       model_merger *merger)
+ {
+   tree cst_a = cst_sval_a.get_constant ();
+   tree cst_b = cst_sval_b.get_constant ();
+   svalue *merged_sval;
+   if (cst_a == cst_b)
+     {
+       /* If they are the same constant, merge as that constant value.  */
+       merged_sval = new constant_svalue (cst_a);
+     }
+   else
+     {
+       /* Otherwise, we have two different constant values.
+ 	 Merge as an unknown value.
+ 	 TODO: impose constraints on the value?
+ 	 (maybe just based on A, to avoid infinite chains)  */
+       merged_sval = new unknown_svalue (TREE_TYPE (cst_a));
+     }
+   *merged_sid = merger->m_merged_model->add_svalue (merged_sval);
+ }
+ 
+ /* Evaluate the condition LHS OP RHS.
+    Subroutine of region_model::eval_condition for when we have a pair of
+    constants.  */
+ 
+ tristate
+ constant_svalue::eval_condition (constant_svalue *lhs,
+ 				 enum tree_code op,
+ 				 constant_svalue *rhs)
+ {
+   tree lhs_const = lhs->get_constant ();
+   tree rhs_const = rhs->get_constant ();
+ 
+   gcc_assert (CONSTANT_CLASS_P (lhs_const));
+   gcc_assert (CONSTANT_CLASS_P (rhs_const));
+ 
+   /* Check for comparable types.  */
+   if (types_compatible_p (TREE_TYPE (lhs_const), TREE_TYPE (rhs_const)))
+     {
+       tree comparison
+ 	= fold_binary (op, boolean_type_node, lhs_const, rhs_const);
+       if (comparison == boolean_true_node)
+ 	return tristate (tristate::TS_TRUE);
+       if (comparison == boolean_false_node)
+ 	return tristate (tristate::TS_FALSE);
+     }
+   return tristate::TS_UNKNOWN;
+ }
+ 
+ /* Implementation of svalue::print_details vfunc for constant_svalue.  */
+ 
+ void
+ constant_svalue::print_details (const region_model &model ATTRIBUTE_UNUSED,
+ 				svalue_id this_sid ATTRIBUTE_UNUSED,
+ 				pretty_printer *pp) const
+ {
+   pp_printf (pp, "%qE", m_cst_expr);
+ }
+ 
+ /* Implementation of svalue::get_child_sid vfunc for constant_svalue.  */
+ 
+ svalue_id
+ constant_svalue::get_child_sid (region *parent ATTRIBUTE_UNUSED,
+ 				region *child,
+ 				region_model &model,
+ 				region_model_context *ctxt ATTRIBUTE_UNUSED)
+ {
+   /* TODO: handle the all-zeroes case by returning an all-zeroes of the
+      child type.  */
+ 
+   /* Otherwise, we don't have a good way to get a child value out of a
+      constant.
+ 
+      Handle this case by using an unknown value.  */
+   svalue *unknown_sval = new unknown_svalue (child->get_type ());
+   return model.add_svalue (unknown_sval);
+ }
+ 
+ /* class unknown_svalue : public svalue.  */
+ 
+ /* Compare the fields of this unknown_svalue with OTHER, returning true
+    if they are equal.
+    For use by svalue::operator==.  */
+ 
+ bool
+ unknown_svalue::compare_fields (const unknown_svalue &) const
+ {
+   /* I *think* we want to return true here, in that when comparing
+      two region models, we want two peer unknown_svalue instances
+      to be the "same".  */
+   return true;
+ }
+ 
+ /* Implementation of svalue::add_to_hash vfunc for unknown_svalue.  */
+ 
+ void
+ unknown_svalue::add_to_hash (inchash::hash &) const
+ {
+   /* Empty.  */
+ }
+ 
+ /* Implementation of svalue::print_details vfunc for unknown_svalue.  */
+ 
+ void
+ unknown_svalue::print_details (const region_model &model ATTRIBUTE_UNUSED,
+ 			       svalue_id this_sid ATTRIBUTE_UNUSED,
+ 			       pretty_printer *pp) const
+ {
+   pp_string (pp, "unknown");
+ }
+ 
+ /* Get a string for KIND for use in debug dumps.  */
+ 
+ const char *
+ poison_kind_to_str (enum poison_kind kind)
+ {
+   switch (kind)
+     {
+     default:
+       gcc_unreachable ();
+     case POISON_KIND_FREED:
+       return "freed";
+     case POISON_KIND_POPPED_STACK:
+       return "popped stack";
+     }
+ }
+ 
+ /* class poisoned_svalue : public svalue.  */
+ 
+ /* Compare the fields of this poisoned_svalue with OTHER, returning true
+    if they are equal.
+    For use by svalue::operator==.  */
+ 
+ bool
+ poisoned_svalue::compare_fields (const poisoned_svalue &other) const
+ {
+   return m_kind == other.m_kind;
+ }
+ 
+ /* Implementation of svalue::add_to_hash vfunc for poisoned_svalue.  */
+ 
+ void
+ poisoned_svalue::add_to_hash (inchash::hash &hstate) const
+ {
+   hstate.add_int (m_kind);
+ }
+ 
+ /* Implementation of svalue::print_details vfunc for poisoned_svalue.  */
+ 
+ void
+ poisoned_svalue::print_details (const region_model &model ATTRIBUTE_UNUSED,
+ 				svalue_id this_sid ATTRIBUTE_UNUSED,
+ 				pretty_printer *pp) const
+ {
+   pp_printf (pp, "poisoned: %s", poison_kind_to_str (m_kind));
+ }
+ 
+ /* class setjmp_svalue's implementation is in engine.cc, so that it can use
+    the declaration of exploded_node.  */
+ 
+ /* class region and its various subclasses.  */
+ 
+ /* Get a string for KIND for use in debug dumps.  */
+ 
+ const char *
+ region_kind_to_str (enum region_kind kind)
+ {
+   switch (kind)
+     {
+     default:
+       gcc_unreachable ();
+     case RK_PRIMITIVE:
+       return "primitive";
+     case RK_STRUCT:
+       return "struct";
+     case RK_UNION:
+       return "union";
+     case RK_ARRAY:
+       return "array";
+     case RK_FRAME:
+       return "frame";
+     case RK_GLOBALS:
+       return "globals";
+     case RK_CODE:
+       return "code";
+     case RK_FUNCTION:
+       return "function";
+     case RK_STACK:
+       return "stack";
+     case RK_HEAP:
+       return "heap";
+     case RK_ROOT:
+       return "root";
+     case RK_SYMBOLIC:
+       return "symbolic";
+     }
+ }
+ 
+ /* class region.  */
+ 
+ /* Equality operator for region.
+    After comparing base class fields and kind, the rest of the
+    comparison is handled off to a "compare_fields" member function
+    specific to the appropriate subclass.  */
+ 
+ bool
+ region::operator== (const region &other) const
+ {
+   if (m_parent_rid != other.m_parent_rid)
+     return false;
+   if (m_sval_id != other.m_sval_id)
+     return false;
+   if (m_type != other.m_type)
+     return false;
+ 
+   enum region_kind this_kind = get_kind ();
+   enum region_kind other_kind = other.get_kind ();
+   if (this_kind != other_kind)
+     return false;
+ 
+   /* Compare views.  */
+   if (m_view_rids.length () != other.m_view_rids.length ())
+     return false;
+   int i;
+   region_id *rid;
+   FOR_EACH_VEC_ELT (m_view_rids, i, rid)
+     if (! (*rid == other.m_view_rids[i]))
+       return false;
+ 
+   switch (this_kind)
+     {
+     default:
+       gcc_unreachable ();
+     case RK_PRIMITIVE:
+       {
+ #if 1
+ 	return true;
+ #else
+ 	const primitive_region &this_sub
+ 	  = (const primitive_region &)*this;
+ 	const primitive_region &other_sub
+ 	  = (const primitive_region &)other;
+ 	return this_sub.compare_fields (other_sub);
+ #endif
+       }
+     case RK_STRUCT:
+       {
+ 	const struct_region &this_sub
+ 	  = (const struct_region &)*this;
+ 	const struct_region &other_sub
+ 	  = (const struct_region &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+     case RK_UNION:
+       {
+ 	const union_region &this_sub
+ 	  = (const union_region &)*this;
+ 	const union_region &other_sub
+ 	  = (const union_region &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+     case RK_ARRAY:
+       {
+ 	const array_region &this_sub
+ 	  = (const array_region &)*this;
+ 	const array_region &other_sub
+ 	  = (const array_region &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+     case RK_FRAME:
+       {
+ 	const frame_region &this_sub
+ 	  = (const frame_region &)*this;
+ 	const frame_region &other_sub
+ 	  = (const frame_region &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+     case RK_GLOBALS:
+       {
+ 	const globals_region &this_sub
+ 	  = (const globals_region &)*this;
+ 	const globals_region &other_sub
+ 	  = (const globals_region &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+     case RK_CODE:
+       {
+ 	const code_region &this_sub
+ 	  = (const code_region &)*this;
+ 	const code_region &other_sub
+ 	  = (const code_region &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+     case RK_FUNCTION:
+       {
+ 	const function_region &this_sub
+ 	  = (const function_region &)*this;
+ 	const function_region &other_sub
+ 	  = (const function_region &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+     case RK_STACK:
+       {
+ 	const stack_region &this_sub
+ 	  = (const stack_region &)*this;
+ 	const stack_region &other_sub
+ 	  = (const stack_region &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+     case RK_ROOT:
+       {
+ 	const root_region &this_sub
+ 	  = (const root_region &)*this;
+ 	const root_region &other_sub
+ 	  = (const root_region &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+     case RK_SYMBOLIC:
+       {
+ 	const symbolic_region &this_sub
+ 	  = (const symbolic_region &)*this;
+ 	const symbolic_region &other_sub
+ 	  = (const symbolic_region &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+     case RK_HEAP:
+       {
+ 	const heap_region &this_sub
+ 	  = (const heap_region &)*this;
+ 	const heap_region &other_sub
+ 	  = (const heap_region &)other;
+ 	return this_sub.compare_fields (other_sub);
+       }
+     }
+ }
+ 
+ /* Get the parent region of this region.  */
+ 
+ region *
+ region::get_parent_region (const region_model &model) const
+ {
+   return model.get_region (m_parent_rid);
+ }
+ 
+ /* Set this region's value to RHS_SID (or potentially a variant of it,
+    for some kinds of casts).  */
+ 
+ void
+ region::set_value (region_model &model, region_id this_rid, svalue_id rhs_sid,
+ 		   region_model_context *ctxt)
+ {
+   /* Handle some kinds of casting.  */
+   if (m_type)
+     {
+       svalue *sval = model.get_svalue (rhs_sid);
+       if (sval->get_type ())
+ 	rhs_sid = model.maybe_cast (m_type, rhs_sid, ctxt);
+ 
+       sval = model.get_svalue (rhs_sid);
+       if (sval->get_type ())
+ 	gcc_assert (m_type == sval->get_type ());
+     }
+ 
+   m_sval_id = rhs_sid;
+ 
+   /* Update views.
+      If this is a view, it becomes its parent's active view.
+      If there was already an active views, invalidate its value; otherwise
+      if the parent itself had a value, invalidate it.
+      If it's not a view, then deactivate any view that is active on this
+      region.  */
+   {
+     if (m_is_view)
+       become_active_view (model, this_rid);
+     else
+       {
+ 	deactivate_any_active_view (model);
+ 	gcc_assert (m_active_view_rid.null_p ());
+       }
+   }
+ }
+ 
+ /* Make this region (with id THIS_RID) the "active" view of its parent.
+    Any other active view has its value set to "unknown" and descendent values
+    cleared.
+    If there wasn't an active view, then set the parent's value to unknown, and
+    clear its descendent values (apart from this view).  */
+ 
+ void
+ region::become_active_view (region_model &model, region_id this_rid)
+ {
+   gcc_assert (m_is_view);
+ 
+   region *parent_reg = model.get_region (m_parent_rid);
+   gcc_assert (parent_reg);
+ 
+   region_id old_active_view_rid = parent_reg->m_active_view_rid;
+ 
+   if (old_active_view_rid == this_rid)
+     {
+       /* Already the active view: do nothing.  */
+       return;
+     }
+ 
+   /* We have a change of active view.  */
+   parent_reg->m_active_view_rid = this_rid;
+ 
+   if (old_active_view_rid.null_p ())
+     {
+       /* No previous active view, but the parent and its other children
+ 	 might have values.
+ 	 If so, invalidate those values - but not that of the new view.  */
+       region_id_set below_region (&model);
+       model.get_descendents (m_parent_rid, &below_region, this_rid);
+       for (unsigned i = 0; i < model.get_num_regions (); i++)
+ 	{
+ 	  region_id rid (region_id::from_int (i));
+ 	  if (below_region.region_p (rid))
+ 	    {
+ 	      region *other_reg = model.get_region (rid);
+ 	      other_reg->m_sval_id = svalue_id::null ();
+ 	    }
+ 	}
+       region *parent = model.get_region (m_parent_rid);
+       parent->m_sval_id
+ 	= model.add_svalue (new unknown_svalue (parent->get_type ()));
+     }
+   else
+     {
+       /* If there was an active view, invalidate it.  */
+       region *old_active_view = model.get_region (old_active_view_rid);
+       old_active_view->deactivate_view (model, old_active_view_rid);
+     }
+ }
+ 
+ /* If this region (with id THIS_RID) has an active view, deactivate it,
+    clearing m_active_view_rid.  */
+ 
+ void
+ region::deactivate_any_active_view (region_model &model)
+ {
+   if (m_active_view_rid.null_p ())
+     return;
+   region *view = model.get_region (m_active_view_rid);
+   view->deactivate_view (model, m_active_view_rid);
+   m_active_view_rid = region_id::null ();
+ }
+ 
+ /* Clear any values for regions below THIS_RID.
+    Set the view's value to unknown.  */
+ 
+ void
+ region::deactivate_view (region_model &model, region_id this_view_rid)
+ {
+   gcc_assert (is_view_p ());
+ 
+   /* Purge values from old_active_this_view_rid and all its
+      descendents.  Potentially we could use a poison value
+      for this, but let's use unknown for now.  */
+   region_id_set below_view (&model);
+   model.get_descendents (this_view_rid, &below_view, region_id::null ());
+ 
+   for (unsigned i = 0; i < model.get_num_regions (); i++)
+     {
+       region_id rid (region_id::from_int (i));
+       if (below_view.region_p (rid))
+ 	{
+ 	  region *other_reg = model.get_region (rid);
+ 	  other_reg->m_sval_id = svalue_id::null ();
+ 	}
+     }
+ 
+   m_sval_id = model.add_svalue (new unknown_svalue (get_type ()));
+ }
+ 
+ /* Get a value for this region, either its value if it has one,
+    or, failing that, "inherit" a value from first ancestor with a
+    non-null value.
+ 
+    For example, when getting the value for a local variable within
+    a stack frame that doesn't have one, the frame doesn't have a value
+    either, but the stack as a whole will have an "uninitialized" poison
+    value, so inherit that.  */
+ 
+ svalue_id
+ region::get_value (region_model &model, bool non_null,
+ 		   region_model_context *ctxt)
+ {
+   /* If this region has a value, use it. */
+   if (!m_sval_id.null_p ())
+     return m_sval_id;
+ 
+   /* Otherwise, "inherit" value from first ancestor with a
+      non-null value. */
+ 
+   region *parent = model.get_region (m_parent_rid);
+   if (parent)
+     {
+       svalue_id inherited_sid
+ 	= parent->get_inherited_child_sid (this, model, ctxt);
+       if (!inherited_sid.null_p ())
+ 	return inherited_sid;
+     }
+ 
+   /* If a non-null value has been requested, then generate
+      a new unknown value.  Store it, so that repeated reads from this
+      region will yield the same unknown value.  */
+   if (non_null)
+     {
+       svalue_id unknown_sid = model.add_svalue (new unknown_svalue (m_type));
+       m_sval_id = unknown_sid;
+       return unknown_sid;
+     }
+ 
+   return svalue_id::null ();
+ }
+ 
+ /* Get a value for CHILD, inheriting from this region.
+ 
+    Recurse, so this region will inherit a value if it doesn't already
+    have one.  */
+ 
+ svalue_id
+ region::get_inherited_child_sid (region *child,
+ 				 region_model &model,
+ 				 region_model_context *ctxt)
+ {
+   if (m_sval_id.null_p ())
+     {
+       /* Recurse.  */
+       if (!m_parent_rid.null_p ())
+ 	{
+ 	  region *parent = model.get_region (m_parent_rid);
+ 	  m_sval_id = parent->get_inherited_child_sid (this, model, ctxt);
+ 	}
+     }
+ 
+   if (!m_sval_id.null_p ())
+     {
+       /* Clone the parent's value, so that attempts to update it
+ 	 (e.g giving a specific value to an inherited "uninitialized"
+ 	 value) touch the child, and not the parent.  */
+       svalue *this_value = model.get_svalue (m_sval_id);
+       svalue_id new_child_sid
+ 	= this_value->get_child_sid (this, child, model, ctxt);
+       if (ctxt)
+ 	ctxt->on_inherited_svalue (m_sval_id, new_child_sid);
+       child->m_sval_id = new_child_sid;
+       return new_child_sid;
+     }
+ 
+   return svalue_id::null ();
+ }
+ 
+ /* Copy from SRC_RID to DST_RID, using CTXT for any issues that occur.
+    Copy across any value for the region, and handle structs, unions
+    and arrays recursively.  */
+ 
+ void
+ region_model::copy_region (region_id dst_rid, region_id src_rid,
+ 			   region_model_context *ctxt)
+ {
+   gcc_assert (!dst_rid.null_p ());
+   gcc_assert (!src_rid.null_p ());
+   if (dst_rid == src_rid)
+     return;
+   region *dst_reg = get_region (dst_rid);
+   region *src_reg = get_region (src_rid);
+ 
+   /* Copy across any value for the src region itself.  */
+   svalue_id sid = src_reg->get_value (*this, true, ctxt);
+   set_value (dst_rid, sid, ctxt);
+ 
+   if (dst_reg->get_kind () != src_reg->get_kind ())
+     return;
+ 
+   /* Copy across child regions for structs, unions, and arrays.  */
+   switch (dst_reg->get_kind ())
+     {
+     case RK_PRIMITIVE:
+       return;
+     case RK_STRUCT:
+       {
+ 	struct_region *dst_sub = as_a <struct_region *> (dst_reg);
+ 	struct_region *src_sub = as_a <struct_region *> (src_reg);
+ 	copy_struct_region (dst_rid, dst_sub, src_sub, ctxt);
+       }
+       return;
+     case RK_UNION:
+       {
+ 	union_region *src_sub = as_a <union_region *> (src_reg);
+ 	copy_union_region (dst_rid, src_sub, ctxt);
+       }
+       return;
+     case RK_FRAME:
+     case RK_GLOBALS:
+     case RK_CODE:
+     case RK_FUNCTION:
+       return;
+     case RK_ARRAY:
+       {
+ 	array_region *dst_sub = as_a <array_region *> (dst_reg);
+ 	array_region *src_sub = as_a <array_region *> (src_reg);
+ 	copy_array_region (dst_rid, dst_sub, src_sub, ctxt);
+       }
+       return;
+     case RK_STACK:
+     case RK_HEAP:
+     case RK_ROOT:
+     case RK_SYMBOLIC:
+       return;
+     }
+ }
+ 
+ /* Subroutine of region_model::copy_region for copying the child
+    regions for a struct.  */
+ 
+ void
+ region_model::copy_struct_region (region_id dst_rid,
+ 				  struct_region *dst_reg,
+ 				  struct_region *src_reg,
+ 				  region_model_context *ctxt)
+ {
+   for (map_region::iterator_t iter = src_reg->begin ();
+        iter != src_reg->end (); ++iter)
+     {
+       tree src_key = (*iter).first;
+       region_id src_field_rid = (*iter).second;
+       region *src_field_reg = get_region (src_field_rid);
+       region_id dst_field_rid
+ 	= dst_reg->get_or_create (this, dst_rid, src_key,
+ 				  src_field_reg->get_type (), ctxt);
+       copy_region (dst_field_rid, src_field_rid, ctxt);
+     }
+ }
+ 
+ /* Subroutine of region_model::copy_region for copying the active
+    child region for a union.  */
+ 
+ void
+ region_model::copy_union_region (region_id dst_rid,
+ 				 union_region *src_reg,
+ 				 region_model_context *ctxt)
+ {
+   region_id src_active_view_rid = src_reg->get_active_view ();
+   if (src_active_view_rid.null_p ())
+     return;
+   region *src_active_view = get_region (src_active_view_rid);
+   tree type = src_active_view->get_type ();
+   region_id dst_active_view_rid = get_or_create_view (dst_rid, type, ctxt);
+   copy_region (dst_active_view_rid, src_active_view_rid, ctxt);
+ }
+ 
+ /* Subroutine of region_model::copy_region for copying the child
+    regions for an array.  */
+ 
+ void
+ region_model::copy_array_region (region_id dst_rid,
+ 				 array_region *dst_reg,
+ 				 array_region *src_reg,
+ 				 region_model_context *ctxt)
+ {
+   for (array_region::iterator_t iter = src_reg->begin ();
+        iter != src_reg->end (); ++iter)
+     {
+       array_region::key_t src_key = (*iter).first;
+       region_id src_field_rid = (*iter).second;
+       region *src_field_reg = get_region (src_field_rid);
+       region_id dst_field_rid
+ 	= dst_reg->get_or_create (this, dst_rid, src_key,
+ 				  src_field_reg->get_type (), ctxt);
+       copy_region (dst_field_rid, src_field_rid, ctxt);
+     }
+ }
+ 
+ /* Generate a hash value for this region.  The work is done by the
+    add_to_hash vfunc.  */
+ 
+ hashval_t
+ region::hash () const
+ {
+   inchash::hash hstate;
+   add_to_hash (hstate);
+   return hstate.end ();
+ }
+ 
+ /* Print a one-liner representation of this region to PP, assuming
+    that this region is within MODEL and its id is THIS_RID.  */
+ 
+ void
+ region::print (const region_model &model,
+ 	       region_id this_rid,
+ 	       pretty_printer *pp) const
+ {
+   this_rid.print (pp);
+   pp_string (pp, ": {");
+ 
+   /* vfunc.  */
+   print_fields (model, this_rid, pp);
+ 
+   pp_string (pp, "}");
+ }
+ 
+ /* Base class implementation of region::dump_dot_to_pp vfunc.  */
+ 
+ void
+ region::dump_dot_to_pp (const region_model &model,
+ 			region_id this_rid,
+ 			pretty_printer *pp) const
+ {
+   this_rid.dump_node_name_to_pp (pp);
+   pp_printf (pp, " [shape=none,margin=0,style=filled,fillcolor=%s,label=\"",
+ 	     "lightgrey");
+   pp_write_text_to_stream (pp);
+   print (model, this_rid, pp);
+   pp_write_text_as_dot_label_to_stream (pp, /*for_record=*/false);
+   pp_string (pp, "\"];");
+   pp_newline (pp);
+ 
+   /* Add edge to svalue.  */
+   if (!m_sval_id.null_p ())
+     {
+       this_rid.dump_node_name_to_pp (pp);
+       pp_string (pp, " -> ");
+       m_sval_id.dump_node_name_to_pp (pp);
+       pp_string (pp, ";");
+       pp_newline (pp);
+     }
+ 
+   /* Add edge to parent.  */
+   if (!m_parent_rid.null_p ())
+     {
+       this_rid.dump_node_name_to_pp (pp);
+       pp_string (pp, " -> ");
+       m_parent_rid.dump_node_name_to_pp (pp);
+       pp_string (pp, ";");
+       pp_newline (pp);
+     }
+ }
+ 
+ /* Dump a tree-like ASCII-art representation of this region to PP.  */
+ 
+ void
+ region::dump_to_pp (const region_model &model,
+ 		    region_id this_rid,
+ 		    pretty_printer *pp,
+ 		    const char *prefix,
+ 		    bool is_last_child) const
+ {
+   print (model, this_rid, pp);
+   pp_newline (pp);
+ 
+   const char *new_prefix;
+   if (!m_parent_rid.null_p ())
+     new_prefix = ACONCAT ((prefix, is_last_child ? "  " : "|  ", NULL));
+   else
+     new_prefix = prefix;
+ 
+   const char *begin_color = colorize_start (pp_show_color (pp), "note");
+   const char *end_color = colorize_stop (pp_show_color (pp));
+   char *field_prefix
+     = ACONCAT ((begin_color, new_prefix, "|:", end_color, NULL));
+ 
+   if (!m_sval_id.null_p ())
+     {
+       pp_printf (pp, "%s sval: ", field_prefix);
+       model.get_svalue (m_sval_id)->print (model, m_sval_id, pp);
+       pp_newline (pp);
+     }
+   if (m_type)
+     {
+       pp_printf (pp, "%s type: ", field_prefix);
+       print_quoted_type (pp, m_type);
+       pp_newline (pp);
+     }
+ 
+   /* Find the children.  */
+ 
+   auto_vec<region_id> child_rids;
+   unsigned i;
+   for (unsigned i = 0; i < model.get_num_regions (); ++i)
+     {
+       region_id rid = region_id::from_int (i);
+       region *child = model.get_region (rid);
+       if (child->m_parent_rid == this_rid)
+ 	child_rids.safe_push (rid);
+     }
+ 
+   /* Print the children, using dump_child_label to label them.  */
+ 
+   region_id *child_rid;
+   FOR_EACH_VEC_ELT (child_rids, i, child_rid)
+     {
+       is_last_child = (i == child_rids.length () - 1);
+       if (!this_rid.null_p ())
+ 	{
+ 	  const char *tail = is_last_child ? "`-" : "|-";
+ 	  pp_printf (pp, "%r%s%s%R", "note", new_prefix, tail);
+ 	}
+       dump_child_label (model, this_rid, *child_rid, pp);
+       model.get_region (*child_rid)->dump_to_pp (model, *child_rid, pp,
+ 						 new_prefix,
+ 						 is_last_child);
+     }
+ }
+ 
+ /* Base implementation of region::dump_child_label vfunc.  */
+ 
+ void
+ region::dump_child_label (const region_model &model,
+ 			  region_id this_rid ATTRIBUTE_UNUSED,
+ 			  region_id child_rid,
+ 			  pretty_printer *pp) const
+ {
+   region *child = model.get_region (child_rid);
+   if (child->m_is_view)
+     {
+       gcc_assert (TYPE_P (child->get_type ()));
+       if (m_active_view_rid == child_rid)
+ 	pp_string (pp, "active ");
+       else
+ 	pp_string (pp, "inactive ");
+       pp_string (pp, "view as ");
+       print_quoted_type (pp, child->get_type ());
+       pp_string (pp, ": ");
+     }
+ }
+ 
+ /* Base implementation of region::validate vfunc.
+    Assert that the fields of "region" are valid; subclasses should
+    chain up their implementation to this one.  */
+ 
+ void
+ region::validate (const region_model &model) const
+ {
+   m_parent_rid.validate (model);
+   m_sval_id.validate (model);
+   unsigned i;
+   region_id *view_rid;
+   FOR_EACH_VEC_ELT (m_view_rids, i, view_rid)
+     {
+       gcc_assert (!view_rid->null_p ());
+       view_rid->validate (model);
+     }
+   m_active_view_rid.validate (model);
+ }
+ 
+ /* Apply MAP to svalue_ids to this region.  This updates the value
+    for the region (if any).  */
+ 
+ void
+ region::remap_svalue_ids (const svalue_id_map &map)
+ {
+   map.update (&m_sval_id);
+ }
+ 
+ /* Base implementation of region::remap_region_ids vfunc; subclasses should
+    chain up to this, updating any region_id data.  */
+ 
+ void
+ region::remap_region_ids (const region_id_map &map)
+ {
+   map.update (&m_parent_rid);
+   unsigned i;
+   region_id *view_rid;
+   FOR_EACH_VEC_ELT (m_view_rids, i, view_rid)
+     map.update (view_rid);
+   map.update (&m_active_view_rid);
+ }
+ 
+ /* Add a new region with id VIEW_RID as a view of this region.  */
+ 
+ void
+ region::add_view (region_id view_rid, region_model *model)
+ {
+   gcc_assert (!view_rid.null_p ());
+   region *new_view = model->get_region (view_rid);
+   new_view->m_is_view = true;
+   gcc_assert (!new_view->m_parent_rid.null_p ());
+   gcc_assert (new_view->m_sval_id.null_p ());
+ 
+   //gcc_assert (new_view->get_type () != NULL_TREE);
+   // TODO: this can sometimes be NULL, when viewing through a (void *)
+ 
+   // TODO: the type ought to not be present yet
+ 
+   m_view_rids.safe_push (view_rid);
+ }
+ 
+ /* Look for a view of type TYPE of this region, returning its id if found,
+    or null otherwise.  */
+ 
+ region_id
+ region::get_view (tree type, region_model *model) const
+ {
+   unsigned i;
+   region_id *view_rid;
+   FOR_EACH_VEC_ELT (m_view_rids, i, view_rid)
+     {
+       region *view = model->get_region (*view_rid);
+       gcc_assert (view->m_is_view);
+       if (view->get_type () == type)
+ 	return *view_rid;
+     }
+   return region_id::null ();
+ }
+ 
+ /* region's ctor.  */
+ 
+ region::region (region_id parent_rid, svalue_id sval_id, tree type)
+ : m_parent_rid (parent_rid), m_sval_id (sval_id), m_type (type),
+   m_view_rids (), m_is_view (false), m_active_view_rid (region_id::null ())
+ {
+   gcc_assert (type == NULL_TREE || TYPE_P (type));
+ }
+ 
+ /* region's copy ctor.  */
+ 
+ region::region (const region &other)
+ : m_parent_rid (other.m_parent_rid), m_sval_id (other.m_sval_id),
+   m_type (other.m_type), m_view_rids (other.m_view_rids.length ()),
+   m_is_view (other.m_is_view), m_active_view_rid (other.m_active_view_rid)
+ {
+   int i;
+   region_id *rid;
+   FOR_EACH_VEC_ELT (other.m_view_rids, i, rid)
+     m_view_rids.quick_push (*rid);
+ }
+ 
+ /* Base implementation of region::add_to_hash vfunc; subclasses should
+    chain up to this.  */
+ 
+ void
+ region::add_to_hash (inchash::hash &hstate) const
+ {
+   inchash::add (m_parent_rid, hstate);
+   inchash::add (m_sval_id, hstate);
+   hstate.add_ptr (m_type);
+   // TODO: views
+ }
+ 
+ /* Base implementation of region::print_fields vfunc.  */
+ 
+ void
+ region::print_fields (const region_model &model ATTRIBUTE_UNUSED,
+ 		      region_id this_rid ATTRIBUTE_UNUSED,
+ 		      pretty_printer *pp) const
+ {
+   pp_printf (pp, "kind: %qs", region_kind_to_str (get_kind ()));
+ 
+   pp_string (pp, ", parent: ");
+   m_parent_rid.print (pp);
+ 
+   pp_printf (pp, ", sval: ");
+   m_sval_id.print (pp);
+ 
+   if (m_type)
+     {
+       pp_printf (pp, ", type: ");
+       print_quoted_type (pp, m_type);
+     }
+ }
+ 
+ /* Determine if a pointer to this region must be non-NULL.
+ 
+    Generally, pointers to regions must be non-NULL, but pointers
+    to symbolic_regions might, in fact, be NULL.
+ 
+    This allows us to simulate functions like malloc and calloc with:
+    - only one "outcome" from each statement,
+    - the idea that the pointer is on the heap if non-NULL
+    - the possibility that the pointer could be NULL
+    - the idea that successive values returned from malloc are non-equal
+    - to be able to zero-fill for calloc.  */
+ 
+ bool
+ region::non_null_p (const region_model &model) const
+ {
+   /* Look through views to get at the underlying region.  */
+   if (is_view_p ())
+     return model.get_region (m_parent_rid)->non_null_p (model);
+ 
+   /* Are we within a symbolic_region?  If so, it could be NULL.  */
+   if (const symbolic_region *sym_reg = dyn_cast_symbolic_region ())
+     {
+       if (sym_reg->m_possibly_null)
+ 	return false;
+     }
+ 
+   return true;
+ }
+ 
+ /* class primitive_region : public region.  */
+ 
+ /* Implementation of region::clone vfunc for primitive_region.  */
+ 
+ region *
+ primitive_region::clone () const
+ {
+   return new primitive_region (*this);
+ }
+ 
+ /* Implementation of region::walk_for_canonicalization vfunc for
+    primitive_region.  */
+ 
+ void
+ primitive_region::walk_for_canonicalization (canonicalization *) const
+ {
+   /* Empty.  */
+ }
+ 
+ /* class map_region : public region.  */
+ 
+ /* map_region's copy ctor.  */
+ 
+ map_region::map_region (const map_region &other)
+ : region (other),
+   m_map (other.m_map)
+ {
+ }
+ 
+ /* Compare the fields of this map_region with OTHER, returning true
+    if they are equal.
+    For use by region::operator==.  */
+ 
+ bool
+ map_region::compare_fields (const map_region &other) const
+ {
+   if (m_map.elements () != other.m_map.elements ())
+     return false;
+ 
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       tree key = (*iter).first;
+       region_id e = (*iter).second;
+       region_id *other_slot = const_cast <map_t &> (other.m_map).get (key);
+       if (other_slot == NULL)
+ 	return false;
+       if (e != *other_slot)
+ 	return false;
+     }
+   return true;
+ }
+ 
+ /* Implementation of region::print_fields vfunc for map_region.  */
+ 
+ void
+ map_region::print_fields (const region_model &model,
+ 			  region_id this_rid,
+ 			  pretty_printer *pp) const
+ {
+   region::print_fields (model, this_rid, pp);
+   pp_string (pp, ", map: {");
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       if (iter != m_map.begin ())
+ 	pp_string (pp, ", ");
+       tree expr = (*iter).first;
+       region_id child_rid = (*iter).second;
+       dump_quoted_tree (pp, expr);
+       pp_string (pp, ": ");
+       child_rid.print (pp);
+     }
+   pp_string (pp, "}");
+ }
+ 
+ /* Implementation of region::validate vfunc for map_region.  */
+ 
+ void
+ map_region::validate (const region_model &model) const
+ {
+   region::validate (model);
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       region_id child_rid = (*iter).second;
+       child_rid.validate (model);
+     }
+ }
+ 
+ /* Implementation of region::dump_dot_to_pp vfunc for map_region.  */
+ 
+ void
+ map_region::dump_dot_to_pp (const region_model &model,
+ 			    region_id this_rid,
+ 			    pretty_printer *pp) const
+ {
+   region::dump_dot_to_pp (model, this_rid, pp);
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       // TODO: add nodes/edges to label things
+ 
+       tree expr = (*iter).first;
+       region_id child_rid = (*iter).second;
+ 
+       pp_printf (pp, "rid_label_%i [label=\"", child_rid.as_int ());
+       pp_write_text_to_stream (pp);
+       pp_printf (pp, "%qE", expr);
+       pp_write_text_as_dot_label_to_stream (pp, /*for_record=*/false);
+       pp_string (pp, "\"];");
+       pp_newline (pp);
+ 
+       pp_printf (pp, "rid_label_%i", child_rid.as_int ());
+       pp_string (pp, " -> ");
+       child_rid.dump_node_name_to_pp (pp);
+       pp_string (pp, ";");
+       pp_newline (pp);
+     }
+ }
+ 
+ /* Implementation of region::dump_child_label vfunc for map_region.  */
+ 
+ void
+ map_region::dump_child_label (const region_model &model,
+ 			      region_id this_rid,
+ 			      region_id child_rid,
+ 			      pretty_printer *pp) const
+ {
+   region::dump_child_label (model, this_rid, child_rid, pp);
+ 
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       if (child_rid == (*iter).second)
+ 	{
+ 	  tree key = (*iter).first;
+ 	  dump_quoted_tree (pp, key);
+ 	  pp_string (pp, ": ");
+ 	}
+     }
+ }
+ 
+ /* Look for a child region for KEY within this map_region.
+    If it doesn't already exist, create a child map_region, using TYPE for
+    its type.
+    Return the region_id of the child (whether pre-existing, or
+    newly-created).
+    Notify CTXT if we don't know how to handle TYPE.  */
+ 
+ region_id
+ map_region::get_or_create (region_model *model,
+ 			   region_id this_rid,
+ 			   tree key,
+ 			   tree type,
+ 			   region_model_context *ctxt)
+ {
+   gcc_assert (key);
+   gcc_assert (valid_key_p (key));
+   region_id *slot = m_map.get (key);
+   if (slot)
+     return *slot;
+   region_id child_rid = model->add_region_for_type (this_rid, type, ctxt);
+   m_map.put (key, child_rid);
+   return child_rid;
+ }
+ 
+ /* Get the region_id for the child region for KEY within this
+    MAP_REGION, or NULL if there is no such child region.  */
+ 
+ region_id *
+ map_region::get (tree key)
+ {
+   gcc_assert (key);
+   gcc_assert (valid_key_p (key));
+   region_id *slot = m_map.get (key);
+   return slot;
+ }
+ 
+ /* Implementation of region::add_to_hash vfunc for map_region.  */
+ 
+ void
+ map_region::add_to_hash (inchash::hash &hstate) const
+ {
+   region::add_to_hash (hstate);
+   // TODO
+ }
+ 
+ /* Implementation of region::remap_region_ids vfunc for map_region.  */
+ 
+ void
+ map_region::remap_region_ids (const region_id_map &map)
+ {
+   region::remap_region_ids (map);
+ 
+   /* Remap the region ids within the map entries.  */
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end (); ++iter)
+     map.update (&(*iter).second);
+ }
+ 
+ /* Remove the binding of KEY to its child region (but not the
+    child region itself).
+    For use when purging unneeded SSA names.  */
+ 
+ void
+ map_region::unbind (tree key)
+ {
+   gcc_assert (key);
+   gcc_assert (valid_key_p (key));
+   m_map.remove (key);
+ }
+ 
+ /* Look for a child region with id CHILD_RID within this map_region.
+    If one is found, return its tree key, otherwise return NULL_TREE.  */
+ 
+ tree
+ map_region::get_tree_for_child_region (region_id child_rid) const
+ {
+   // TODO: do we want to store an inverse map?
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       tree key = (*iter).first;
+       region_id r = (*iter).second;
+       if (r == child_rid)
+ 	return key;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Look for a child region CHILD within this map_region.
+    If one is found, return its tree key, otherwise return NULL_TREE.  */
+ 
+ tree
+ map_region::get_tree_for_child_region (region *child,
+ 				       const region_model &model) const
+ {
+   // TODO: do we want to store an inverse map?
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       tree key = (*iter).first;
+       region_id r = (*iter).second;
+       if (model.get_region (r) == child)
+ 	return key;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Comparator for trees to impose a deterministic ordering on
+    T1 and T2.  */
+ 
+ static int
+ tree_cmp (const_tree t1, const_tree t2)
+ {
+   gcc_assert (t1);
+   gcc_assert (t2);
+ 
+   /* Test tree codes first.  */
+   if (TREE_CODE (t1) != TREE_CODE (t2))
+     return TREE_CODE (t1) - TREE_CODE (t2);
+ 
+   /* From this point on, we know T1 and T2 have the same tree code.  */
+ 
+   if (DECL_P (t1))
+     {
+       if (DECL_NAME (t1) && DECL_NAME (t2))
+ 	return strcmp (IDENTIFIER_POINTER (DECL_NAME (t1)),
+ 		       IDENTIFIER_POINTER (DECL_NAME (t2)));
+       else
+ 	{
+ 	  if (DECL_NAME (t1))
+ 	    return -1;
+ 	  else if (DECL_NAME (t2))
+ 	    return 1;
+ 	  else
+ 	    return DECL_UID (t1) - DECL_UID (t2);
+ 	}
+     }
+ 
+   switch (TREE_CODE (t1))
+     {
+     case SSA_NAME:
+       {
+ 	if (SSA_NAME_VAR (t1) && SSA_NAME_VAR (t2))
+ 	  {
+ 	    int var_cmp = tree_cmp (SSA_NAME_VAR (t1), SSA_NAME_VAR (t2));
+ 	    if (var_cmp)
+ 	      return var_cmp;
+ 	    return SSA_NAME_VERSION (t1) - SSA_NAME_VERSION (t2);
+ 	  }
+ 	else
+ 	  {
+ 	    if (SSA_NAME_VAR (t1))
+ 	      return -1;
+ 	    else if (SSA_NAME_VAR (t2))
+ 	      return 1;
+ 	    else
+ 	      return SSA_NAME_VERSION (t1) - SSA_NAME_VERSION (t2);
+ 	  }
+       }
+       break;
+ 
+     case INTEGER_CST:
+       return tree_int_cst_compare (t1, t2);
+ 
+     case REAL_CST:
+       {
+ 	const real_value *rv1 = TREE_REAL_CST_PTR (t1);
+ 	const real_value *rv2 = TREE_REAL_CST_PTR (t2);
+ 	if (real_compare (UNORDERED_EXPR, rv1, rv2))
+ 	  {
+ 	    /* Impose an arbitrary order on NaNs relative to other NaNs
+ 	       and to non-NaNs.  */
+ 	    if (int cmp_isnan = real_isnan (rv1) - real_isnan (rv2))
+ 	      return cmp_isnan;
+ 	    if (int cmp_issignaling_nan
+ 		  = real_issignaling_nan (rv1) - real_issignaling_nan (rv2))
+ 	      return cmp_issignaling_nan;
+ 	    return real_isneg (rv1) - real_isneg (rv2);
+ 	  }
+ 	if (real_compare (LT_EXPR, rv1, rv2))
+ 	  return -1;
+ 	if (real_compare (GT_EXPR, rv1, rv2))
+ 	  return 1;
+ 	return 0;
+       }
+ 
+     case STRING_CST:
+       return strcmp (TREE_STRING_POINTER (t1),
+ 		     TREE_STRING_POINTER (t2));
+ 
+     default:
+       gcc_unreachable ();
+       break;
+     }
+ 
+   gcc_unreachable ();
+ 
+   return 0;
+ }
+ 
+ /* qsort comparator for trees to impose a deterministic ordering on
+    P1 and P2.  */
+ 
+ static int
+ tree_cmp (const void *p1, const void *p2)
+ {
+   const_tree t1 = *(const_tree const *)p1;
+   const_tree t2 = *(const_tree const *)p2;
+ 
+   return tree_cmp (t1, t2);
+ }
+ 
+ /* Attempt to merge MAP_REGION_A and MAP_REGION_B into MERGED_MAP_REGION,
+    which has region_id MERGED_RID, using MERGER.
+    Return true if the merger is possible, false otherwise.  */
+ 
+ bool
+ map_region::can_merge_p (const map_region *map_region_a,
+ 			 const map_region *map_region_b,
+ 			 map_region *merged_map_region,
+ 			 region_id merged_rid,
+ 			 model_merger *merger)
+ {
+   for (map_t::iterator iter = map_region_a->m_map.begin ();
+        iter != map_region_a->m_map.end ();
+        ++iter)
+     {
+       tree key_a = (*iter).first;
+       region_id rid_a = (*iter).second;
+ 
+       if (const region_id *slot_b
+ 	  = const_cast<map_region *>(map_region_b)->m_map.get (key_a))
+ 	{
+ 	  region_id rid_b = *slot_b;
+ 
+ 	  region *child_region_a = merger->get_region_a <region> (rid_a);
+ 	  region *child_region_b = merger->get_region_b <region> (rid_b);
+ 
+ 	  gcc_assert (child_region_a->get_type ()
+ 		      == child_region_b->get_type ());
+ 
+ 	  gcc_assert (child_region_a->get_kind ()
+ 		      == child_region_b->get_kind ());
+ 
+ 	  region_id child_merged_rid
+ 	    = merged_map_region->get_or_create (merger->m_merged_model,
+ 						merged_rid,
+ 						key_a,
+ 						child_region_a->get_type (),
+ 						NULL);
+ 
+ 	  region *child_merged_region
+ 	    = merger->m_merged_model->get_region (child_merged_rid);
+ 
+ 	  /* Consider values.  */
+ 	  svalue_id child_a_sid = child_region_a->get_value_direct ();
+ 	  svalue_id child_b_sid = child_region_b->get_value_direct ();
+ 	  svalue_id child_merged_sid;
+ 	  if (!merger->can_merge_values_p (child_a_sid, child_b_sid,
+ 					   &child_merged_sid))
+ 	    return false;
+ 	  if (!child_merged_sid.null_p ())
+ 	    child_merged_region->set_value (*merger->m_merged_model,
+ 					    child_merged_rid,
+ 					    child_merged_sid,
+ 					    NULL);
+ 
+ 	  if (map_region *map_region_a = child_region_a->dyn_cast_map_region ())
+ 	    {
+ 	      /* Recurse.  */
+ 	      if (!can_merge_p (map_region_a,
+ 				as_a <map_region *> (child_region_b),
+ 				as_a <map_region *> (child_merged_region),
+ 				child_merged_rid,
+ 				merger))
+ 		return false;
+ 	    }
+ 
+ 	}
+       else
+ 	{
+ 	  /* TODO: region is present in A, but absent in B.  */
+ 	}
+     }
+ 
+   /* TODO: check for keys in B that aren't in A.  */
+ 
+   return true;
+ }
+ 
+ 
+ /* Implementation of region::walk_for_canonicalization vfunc for
+    map_region.  */
+ 
+ void
+ map_region::walk_for_canonicalization (canonicalization *c) const
+ {
+   auto_vec<tree> keys (m_map.elements ());
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       tree key_a = (*iter).first;
+       keys.quick_push (key_a);
+     }
+   keys.qsort (tree_cmp);
+ 
+   unsigned i;
+   tree key;
+   FOR_EACH_VEC_ELT (keys, i, key)
+     {
+       region_id rid = *const_cast<map_region *>(this)->m_map.get (key);
+       c->walk_rid (rid);
+     }
+ }
+ 
+ /* For debugging purposes: look for a child region for a decl named
+    IDENTIFIER (or an SSA_NAME for such a decl), returning its value,
+    or svalue_id::null if none are found.  */
+ 
+ svalue_id
+ map_region::get_value_by_name (tree identifier,
+ 			       const region_model &model) const
+ {
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       tree key = (*iter).first;
+       if (TREE_CODE (key) == SSA_NAME)
+ 	if (SSA_NAME_VAR (key))
+ 	  key = SSA_NAME_VAR (key);
+       if (DECL_P (key))
+ 	if (DECL_NAME (key) == identifier)
+ 	  {
+ 	    region_id rid = (*iter).second;
+ 	    region *region = model.get_region (rid);
+ 	    return region->get_value (const_cast<region_model &>(model),
+ 				      false, NULL);
+ 	  }
+     }
+   return svalue_id::null ();
+ }
+ 
+ /* class struct_or_union_region : public map_region.  */
+ 
+ /* Implementation of map_region::valid_key_p vfunc for
+    struct_or_union_region.  */
+ 
+ bool
+ struct_or_union_region::valid_key_p (tree key) const
+ {
+   return TREE_CODE (key) == FIELD_DECL;
+ }
+ 
+ /* Compare the fields of this struct_or_union_region with OTHER, returning
+    true if they are equal.
+    For use by region::operator==.  */
+ 
+ bool
+ struct_or_union_region::compare_fields (const struct_or_union_region &other)
+   const
+ {
+   return map_region::compare_fields (other);
+ }
+ 
+ /* class struct_region : public struct_or_union_region.  */
+ 
+ /* Implementation of region::clone vfunc for struct_region.  */
+ 
+ region *
+ struct_region::clone () const
+ {
+   return new struct_region (*this);
+ }
+ 
+ /* Compare the fields of this struct_region with OTHER, returning true
+    if they are equal.
+    For use by region::operator==.  */
+ 
+ bool
+ struct_region::compare_fields (const struct_region &other) const
+ {
+   return struct_or_union_region::compare_fields (other);
+ }
+ 
+ /* class union_region : public struct_or_union_region.  */
+ 
+ /* Implementation of region::clone vfunc for union_region.  */
+ 
+ region *
+ union_region::clone () const
+ {
+   return new union_region (*this);
+ }
+ 
+ /* Compare the fields of this union_region with OTHER, returning true
+    if they are equal.
+    For use by region::operator==.  */
+ 
+ bool
+ union_region::compare_fields (const union_region &other) const
+ {
+   return struct_or_union_region::compare_fields (other);
+ }
+ 
+ /* class frame_region : public map_region.  */
+ 
+ /* Compare the fields of this frame_region with OTHER, returning true
+    if they are equal.
+    For use by region::operator==.  */
+ 
+ bool
+ frame_region::compare_fields (const frame_region &other) const
+ {
+   if (!map_region::compare_fields (other))
+     return false;
+   if (m_fun != other.m_fun)
+     return false;
+   if (m_depth != other.m_depth)
+     return false;
+   return true;
+ }
+ 
+ /* Implementation of region::clone vfunc for frame_region.  */
+ 
+ region *
+ frame_region::clone () const
+ {
+   return new frame_region (*this);
+ }
+ 
+ /* Implementation of map_region::valid_key_p vfunc for frame_region.  */
+ 
+ bool
+ frame_region::valid_key_p (tree key) const
+ {
+   // TODO: could also check that VAR_DECLs are locals
+   return (TREE_CODE (key) == PARM_DECL
+ 	  || TREE_CODE (key) == VAR_DECL
+ 	  || TREE_CODE (key) == SSA_NAME
+ 	  || TREE_CODE (key) == RESULT_DECL);
+ }
+ 
+ /* Implementation of region::print_fields vfunc for frame_region.  */
+ 
+ void
+ frame_region::print_fields (const region_model &model,
+ 			    region_id this_rid,
+ 			    pretty_printer *pp) const
+ {
+   map_region::print_fields (model, this_rid, pp);
+   pp_printf (pp, ", function: %qs, depth: %i", function_name (m_fun), m_depth);
+ }
+ 
+ /* Implementation of region::add_to_hash vfunc for frame_region.  */
+ 
+ void
+ frame_region::add_to_hash (inchash::hash &hstate) const
+ {
+   map_region::add_to_hash (hstate);
+   hstate.add_ptr (m_fun);
+   hstate.add_int (m_depth);
+ }
+ 
+ /* class globals_region : public scope_region.  */
+ 
+ /* Compare the fields of this globals_region with OTHER, returning true
+    if they are equal.
+    For use by region::operator==.  */
+ 
+ bool
+ globals_region::compare_fields (const globals_region &other) const
+ {
+   return map_region::compare_fields (other);
+ }
+ 
+ /* Implementation of region::clone vfunc for globals_region.  */
+ 
+ region *
+ globals_region::clone () const
+ {
+   return new globals_region (*this);
+ }
+ 
+ /* Implementation of map_region::valid_key_p vfunc for globals_region.  */
+ 
+ bool
+ globals_region::valid_key_p (tree key) const
+ {
+   return TREE_CODE (key) == VAR_DECL;
+ }
+ 
+ /* class code_region : public map_region.  */
+ 
+ /* Compare the fields of this code_region with OTHER, returning true
+    if they are equal.
+    For use by region::operator==.  */
+ 
+ bool
+ code_region::compare_fields (const code_region &other) const
+ {
+   return map_region::compare_fields (other);
+ }
+ 
+ /* Implementation of region::clone vfunc for code_region.  */
+ 
+ region *
+ code_region::clone () const
+ {
+   return new code_region (*this);
+ }
+ 
+ /* Implementation of map_region::valid_key_p vfunc for code_region.  */
+ 
+ bool
+ code_region::valid_key_p (tree key) const
+ {
+   return TREE_CODE (key) == FUNCTION_DECL;
+ }
+ 
+ /* class array_region : public region.  */
+ 
+ /* array_region's copy ctor.  */
+ 
+ array_region::array_region (const array_region &other)
+ : region (other),
+   m_map (other.m_map)
+ {
+ }
+ 
+ /* Get a child region for the element with index INDEX_SID.  */
+ 
+ region_id
+ array_region::get_element (region_model *model,
+ 			   region_id this_rid,
+ 			   svalue_id index_sid,
+ 			   region_model_context *ctxt)
+ {
+   tree element_type = TREE_TYPE (get_type ());
+   svalue *index_sval = model->get_svalue (index_sid);
+   if (tree cst_index = index_sval->maybe_get_constant ())
+     {
+       key_t key = key_from_constant (cst_index);
+       region_id element_rid
+ 	= get_or_create (model, this_rid, key, element_type, ctxt);
+       return element_rid;
+    }
+ 
+   return model->get_or_create_view (this_rid, element_type, ctxt);
+ }
+ 
+ /* Implementation of region::clone vfunc for array_region.  */
+ 
+ region *
+ array_region::clone () const
+ {
+   return new array_region (*this);
+ }
+ 
+ /* Compare the fields of this array_region with OTHER, returning true
+    if they are equal.
+    For use by region::operator==.  */
+ 
+ bool
+ array_region::compare_fields (const array_region &other) const
+ {
+   if (m_map.elements () != other.m_map.elements ())
+     return false;
+ 
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       int key = (*iter).first;
+       region_id e = (*iter).second;
+       region_id *other_slot = const_cast <map_t &> (other.m_map).get (key);
+       if (other_slot == NULL)
+ 	return false;
+       if (e != *other_slot)
+ 	return false;
+     }
+   return true;
+ }
+ 
+ /* Implementation of region::print_fields vfunc for array_region.  */
+ 
+ void
+ array_region::print_fields (const region_model &model,
+ 			    region_id this_rid,
+ 			    pretty_printer *pp) const
+ {
+   region::print_fields (model, this_rid, pp);
+   pp_string (pp, ", array: {");
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       if (iter != m_map.begin ())
+ 	pp_string (pp, ", ");
+       int key = (*iter).first;
+       region_id child_rid = (*iter).second;
+       pp_printf (pp, "[%i]: ", key);
+       child_rid.print (pp);
+     }
+   pp_string (pp, "}");
+ }
+ 
+ /* Implementation of region::validate vfunc for array_region.  */
+ 
+ void
+ array_region::validate (const region_model &model) const
+ {
+   region::validate (model);
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       region_id child_rid = (*iter).second;
+       child_rid.validate (model);
+     }
+ }
+ 
+ /* Implementation of region::dump_dot_to_pp vfunc for array_region.  */
+ 
+ void
+ array_region::dump_dot_to_pp (const region_model &model,
+ 			      region_id this_rid,
+ 			      pretty_printer *pp) const
+ {
+   region::dump_dot_to_pp (model, this_rid, pp);
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       // TODO: add nodes/edges to label things
+ 
+       int key = (*iter).first;
+       region_id child_rid = (*iter).second;
+ 
+       pp_printf (pp, "rid_label_%i [label=\"", child_rid.as_int ());
+       pp_write_text_to_stream (pp);
+       pp_printf (pp, "%qi", key);
+       pp_write_text_as_dot_label_to_stream (pp, /*for_record=*/false);
+       pp_string (pp, "\"];");
+       pp_newline (pp);
+ 
+       pp_printf (pp, "rid_label_%i", child_rid.as_int ());
+       pp_string (pp, " -> ");
+       child_rid.dump_node_name_to_pp (pp);
+       pp_string (pp, ";");
+       pp_newline (pp);
+     }
+ }
+ 
+ /* Implementation of region::dump_child_label vfunc for array_region.  */
+ 
+ void
+ array_region::dump_child_label (const region_model &model,
+ 			      region_id this_rid,
+ 			      region_id child_rid,
+ 			      pretty_printer *pp) const
+ {
+   region::dump_child_label (model, this_rid, child_rid, pp);
+ 
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       if (child_rid == (*iter).second)
+ 	{
+ 	  int key = (*iter).first;
+ 	  pp_printf (pp, "[%i]: ", key);
+ 	}
+     }
+ }
+ 
+ /* Look for a child region for KEY within this array_region.
+    If it doesn't already exist, create a child array_region, using TYPE for
+    its type.
+    Return the region_id of the child (whether pre-existing, or
+    newly-created).
+    Notify CTXT if we don't know how to handle TYPE.  */
+ 
+ region_id
+ array_region::get_or_create (region_model *model,
+ 			     region_id this_rid,
+ 			     key_t key,
+ 			     tree type,
+ 			     region_model_context *ctxt)
+ {
+   region_id *slot = m_map.get (key);
+   if (slot)
+     return *slot;
+   region_id child_rid = model->add_region_for_type (this_rid, type, ctxt);
+   m_map.put (key, child_rid);
+   return child_rid;
+ }
+ 
+ /* Get the region_id for the child region for KEY within this
+    ARRAY_REGION, or NULL if there is no such child region.  */
+ 
+ region_id *
+ array_region::get (key_t key)
+ {
+   region_id *slot = m_map.get (key);
+   return slot;
+ }
+ 
+ /* Implementation of region::add_to_hash vfunc for array_region.  */
+ 
+ void
+ array_region::add_to_hash (inchash::hash &hstate) const
+ {
+   region::add_to_hash (hstate);
+   // TODO
+ }
+ 
+ /* Implementation of region::remap_region_ids vfunc for array_region.  */
+ 
+ void
+ array_region::remap_region_ids (const region_id_map &map)
+ {
+   region::remap_region_ids (map);
+ 
+   /* Remap the region ids within the map entries.  */
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end (); ++iter)
+     map.update (&(*iter).second);
+ }
+ 
+ /* Look for a child region with id CHILD_RID within this array_region.
+    If one is found, write its key to *OUT and return true,
+    otherwise return false.  */
+ 
+ bool
+ array_region::get_key_for_child_region (region_id child_rid, key_t *out) const
+ {
+   // TODO: do we want to store an inverse map?
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       key_t key = (*iter).first;
+       region_id r = (*iter).second;
+       if (r == child_rid)
+ 	{
+ 	  *out = key;
+ 	  return true;
+ 	}
+     }
+ 
+   return false;
+ }
+ 
+ /* qsort comparator for array_region's keys.  */
+ 
+ int
+ array_region::key_cmp (const void *p1, const void *p2)
+ {
+   key_t i1 = *(const key_t *)p1;
+   key_t i2 = *(const key_t *)p2;
+ 
+   if (i1 > i2)
+     return 1;
+   else if (i1 < i2)
+     return -1;
+   else
+     return 0;
+ }
+ 
+ /* Implementation of region::walk_for_canonicalization vfunc for
+    array_region.  */
+ 
+ void
+ array_region::walk_for_canonicalization (canonicalization *c) const
+ {
+   auto_vec<int> keys (m_map.elements ());
+   for (map_t::iterator iter = m_map.begin ();
+        iter != m_map.end ();
+        ++iter)
+     {
+       int key_a = (*iter).first;
+       keys.quick_push (key_a);
+     }
+   keys.qsort (key_cmp);
+ 
+   unsigned i;
+   int key;
+   FOR_EACH_VEC_ELT (keys, i, key)
+     {
+       region_id rid = *const_cast<array_region *>(this)->m_map.get (key);
+       c->walk_rid (rid);
+     }
+ }
+ 
+ /* Convert constant CST into an array_region::key_t.  */
+ 
+ array_region::key_t
+ array_region::key_from_constant (tree cst)
+ {
+   gcc_assert (CONSTANT_CLASS_P (cst));
+   wide_int w = wi::to_wide (cst);
+   key_t result = w.to_shwi ();
+   return result;
+ }
+ 
+ /* Convert array_region::key_t KEY into a tree constant.  */
+ 
+ tree
+ array_region::constant_from_key (key_t key)
+ {
+   tree array_type = get_type ();
+   tree index_type = TYPE_DOMAIN (array_type);
+   return build_int_cst (index_type, key);
+ }
+ 
+ /* class function_region : public map_region.  */
+ 
+ /* Compare the fields of this function_region with OTHER, returning true
+    if they are equal.
+    For use by region::operator==.  */
+ 
+ bool
+ function_region::compare_fields (const function_region &other) const
+ {
+   return map_region::compare_fields (other);
+ }
+ 
+ /* Implementation of region::clone vfunc for function_region.  */
+ 
+ region *
+ function_region::clone () const
+ {
+   return new function_region (*this);
+ }
+ 
+ /* Implementation of map_region::valid_key_p vfunc for function_region.  */
+ 
+ bool
+ function_region::valid_key_p (tree key) const
+ {
+   return TREE_CODE (key) == LABEL_DECL;
+ }
+ 
+ /* class stack_region : public region.  */
+ 
+ /* stack_region's copy ctor.  */
+ 
+ stack_region::stack_region (const stack_region &other)
+ : region (other),
+   m_frame_rids (other.m_frame_rids.length ())
+ {
+   int i;
+   region_id *frame_rid;
+   FOR_EACH_VEC_ELT (other.m_frame_rids, i, frame_rid)
+     m_frame_rids.quick_push (*frame_rid);
+ }
+ 
+ /* Compare the fields of this stack_region with OTHER, returning true
+    if they are equal.
+    For use by region::operator==.  */
+ 
+ bool
+ stack_region::compare_fields (const stack_region &other) const
+ {
+   if (m_frame_rids.length () != other.m_frame_rids.length ())
+     return false;
+ 
+   int i;
+   region_id *frame_rid;
+   FOR_EACH_VEC_ELT (m_frame_rids, i, frame_rid)
+     if (m_frame_rids[i] != other.m_frame_rids[i])
+       return false;
+ 
+   return true;
+ }
+ 
+ /* Implementation of region::clone vfunc for stack_region.  */
+ 
+ region *
+ stack_region::clone () const
+ {
+   return new stack_region (*this);
+ }
+ 
+ /* Implementation of region::print_fields vfunc for stack_region.  */
+ 
+ void
+ stack_region::print_fields (const region_model &model,
+ 			    region_id this_rid,
+ 			    pretty_printer *pp) const
+ {
+   region::print_fields (model, this_rid, pp);
+   // TODO
+ }
+ 
+ /* Implementation of region::dump_child_label vfunc for stack_region.  */
+ 
+ void
+ stack_region::dump_child_label (const region_model &model,
+ 				region_id this_rid ATTRIBUTE_UNUSED,
+ 				region_id child_rid,
+ 				pretty_printer *pp) const
+ {
+   function *fun = model.get_region<frame_region> (child_rid)->get_function ();
+   pp_printf (pp, "frame for %qs: ", function_name (fun));
+ }
+ 
+ /* Implementation of region::validate vfunc for stack_region.  */
+ 
+ void
+ stack_region::validate (const region_model &model) const
+ {
+   region::validate (model);
+   int i;
+   region_id *frame_rid;
+   FOR_EACH_VEC_ELT (m_frame_rids, i, frame_rid)
+     m_frame_rids[i].validate (model);
+ }
+ 
+ /* Push FRAME_RID (for a frame_region) onto this stack.  */
+ 
+ void
+ stack_region::push_frame (region_id frame_rid)
+ {
+   m_frame_rids.safe_push (frame_rid);
+ }
+ 
+ /* Get the region_id of the top-most frame in this stack, if any.  */
+ 
+ region_id
+ stack_region::get_current_frame_id () const
+ {
+   if (m_frame_rids.length () > 0)
+     return m_frame_rids[m_frame_rids.length () - 1];
+   else
+     return region_id::null ();
+ }
+ 
+ /* Pop the topmost frame_region from this stack.
+ 
+    If RESULT_DST_RID is non-null, copy any return value from the frame
+    into RESULT_DST_RID's region.
+ 
+    Purge the frame region and all its descendent regions.
+    Convert any pointers that point into such regions into
+    POISON_KIND_POPPED_STACK svalues.
+ 
+    If PURGE, then purge all unused svalues, with the exception of any
+    returned values.
+ 
+    Accumulate stats on purged entities into STATS.  */
+ 
+ void
+ stack_region::pop_frame (region_model *model, region_id result_dst_rid,
+ 			 bool purge, purge_stats *stats,
+ 			 region_model_context *ctxt)
+ {
+   gcc_assert (m_frame_rids.length () > 0);
+ 
+   region_id frame_rid = get_current_frame_id ();
+   frame_region *frame = model->get_region<frame_region> (frame_rid);
+ 
+   /* Evaluate the result, within the callee frame.  */
+   svalue_id_set returned_sids;
+   tree fndecl = frame->get_function ()->decl;
+   tree result = DECL_RESULT (fndecl);
+   if (result && TREE_TYPE (result) != void_type_node)
+     {
+       if (!result_dst_rid.null_p ())
+ 	{
+ 	  /* Copy the result to RESULT_DST_RID.  */
+ 	  model->copy_region (result_dst_rid, model->get_lvalue (result, ctxt),
+ 			      ctxt);
+ 	}
+       if (purge)
+ 	{
+ 	  /* Populate returned_sids, to avoid purging them.  */
+ 	  region_id return_rid = model->get_lvalue (result, NULL);
+ 	  region_id_set returned_rids (model);
+ 	  model->get_descendents (return_rid, &returned_rids,
+ 				  region_id::null ());
+ 	  for (unsigned i = 0; i < model->get_num_regions (); i++)
+ 	    {
+ 	      region_id rid = region_id::from_int (i);
+ 	      if (returned_rids.region_p (rid))
+ 		{
+ 		  svalue_id sid = model->get_region (rid)->get_value_direct ();
+ 		  returned_sids.add_svalue (sid);
+ 		}
+ 	    }
+ 	}
+     }
+ 
+   /* Pop the frame RID.  */
+   m_frame_rids.pop ();
+ 
+   model->delete_region_and_descendents (frame_rid,
+ 					POISON_KIND_POPPED_STACK,
+ 					stats,
+ 					ctxt ? ctxt->get_logger () : NULL);
+ 
+   /* Delete unused svalues, but don't delete the return value(s).  */
+   if (purge)
+     model->purge_unused_svalues (stats, ctxt, &returned_sids);
+ 
+   model->validate ();
+ }
+ 
+ /* Implementation of region::add_to_hash vfunc for stack_region.  */
+ 
+ void
+ stack_region::add_to_hash (inchash::hash &hstate) const
+ {
+   region::add_to_hash (hstate);
+ 
+   int i;
+   region_id *frame_rid;
+   FOR_EACH_VEC_ELT (m_frame_rids, i, frame_rid)
+     inchash::add (*frame_rid, hstate);
+ }
+ 
+ /* Implementation of region::remap_region_ids vfunc for stack_region.  */
+ 
+ void
+ stack_region::remap_region_ids (const region_id_map &map)
+ {
+   region::remap_region_ids (map);
+   int i;
+   region_id *frame_rid;
+   FOR_EACH_VEC_ELT (m_frame_rids, i, frame_rid)
+     map.update (&m_frame_rids[i]);
+ }
+ 
+ /* Attempt to merge STACK_REGION_A and STACK_REGION_B using MERGER.
+    Return true if the merger is possible, false otherwise.  */
+ 
+ bool
+ stack_region::can_merge_p (const stack_region *stack_region_a,
+ 			   const stack_region *stack_region_b,
+ 			   model_merger *merger)
+ {
+   if (stack_region_a->get_num_frames ()
+       != stack_region_b->get_num_frames ())
+     return false;
+ 
+   region_model *merged_model = merger->m_merged_model;
+ 
+   region_id rid_merged_stack
+     = merged_model->get_root_region ()->ensure_stack_region (merged_model);
+ 
+   stack_region *merged_stack
+     = merged_model->get_region <stack_region> (rid_merged_stack);
+ 
+   /* First, create all frames in the merged model, without populating them.
+      The merging code assumes that all frames in the merged model already exist,
+      so we have to do this first to handle the case in which a local in an
+      older frame points at a local in a more recent frame.  */
+     for (unsigned i = 0; i < stack_region_a->get_num_frames (); i++)
+       {
+ 	region_id rid_a = stack_region_a->get_frame_rid (i);
+ 	frame_region *frame_a = merger->get_region_a <frame_region> (rid_a);
+ 
+ 	region_id rid_b = stack_region_b->get_frame_rid (i);
+ 	frame_region *frame_b = merger->get_region_b <frame_region> (rid_b);
+ 
+ 	if (frame_a->get_function () != frame_b->get_function ())
+ 	  return false;
+ 
+ 	frame_region *merged_frame = new frame_region (rid_merged_stack,
+ 						       frame_a->get_function (),
+ 						       frame_a->get_depth ());
+ 	region_id rid_merged_frame = merged_model->add_region (merged_frame);
+ 	merged_stack->push_frame (rid_merged_frame);
+       }
+ 
+     /* Now populate the frames we created.  */
+     for (unsigned i = 0; i < stack_region_a->get_num_frames (); i++)
+       {
+ 	region_id rid_a = stack_region_a->get_frame_rid (i);
+ 	frame_region *frame_a = merger->get_region_a <frame_region> (rid_a);
+ 
+ 	region_id rid_b = stack_region_b->get_frame_rid (i);
+ 	frame_region *frame_b = merger->get_region_b <frame_region> (rid_b);
+ 
+ 	region_id rid_merged_frame = merged_stack->get_frame_rid (i);
+ 	frame_region *merged_frame
+ 	  = merged_model->get_region <frame_region> (rid_merged_frame);
+ 	if (!map_region::can_merge_p (frame_a, frame_b,
+ 				      merged_frame, rid_merged_frame,
+ 				      merger))
+ 	  return false;
+       }
+ 
+   return true;
+ }
+ 
+ /* Implementation of region::walk_for_canonicalization vfunc for
+    stack_region.  */
+ 
+ void
+ stack_region::walk_for_canonicalization (canonicalization *c) const
+ {
+   int i;
+   region_id *frame_rid;
+   FOR_EACH_VEC_ELT (m_frame_rids, i, frame_rid)
+     c->walk_rid (*frame_rid);
+ }
+ 
+ /* For debugging purposes: look for a grandchild region within one of
+    the child frame regions, where the grandchild is for a decl named
+    IDENTIFIER (or an SSA_NAME for such a decl):
+ 
+      stack_region
+      `-frame_region
+        `-region for decl named IDENTIFIER
+ 
+    returning its value, or svalue_id::null if none are found.  */
+ 
+ svalue_id
+ stack_region::get_value_by_name (tree identifier,
+ 				 const region_model &model) const
+ {
+   int i;
+   region_id *frame_rid;
+   FOR_EACH_VEC_ELT (m_frame_rids, i, frame_rid)
+     {
+       frame_region *frame = model.get_region<frame_region> (*frame_rid);
+       svalue_id sid = frame->get_value_by_name (identifier, model);
+       if (!sid.null_p ())
+ 	return sid;
+     }
+ 
+   return svalue_id::null ();
+ }
+ 
+ /* class heap_region : public region.  */
+ 
+ /* heap_region's copy ctor.  */
+ 
+ heap_region::heap_region (const heap_region &other)
+ : region (other)
+ {
+ }
+ 
+ /* Compare the fields of this heap_region with OTHER, returning true
+    if they are equal.
+    For use by region::operator==.  */
+ 
+ bool
+ heap_region::compare_fields (const heap_region &) const
+ {
+   /* Empty.  */
+   return true;
+ }
+ 
+ /* Implementation of region::clone vfunc for heap_region.  */
+ 
+ region *
+ heap_region::clone () const
+ {
+   return new heap_region (*this);
+ }
+ 
+ /* Implementation of region::walk_for_canonicalization vfunc for
+    heap_region.  */
+ 
+ void
+ heap_region::walk_for_canonicalization (canonicalization *) const
+ {
+   /* Empty.  */
+ }
+ 
+ /* class root_region : public region.  */
+ 
+ /* root_region's default ctor.  */
+ 
+ root_region::root_region ()
+ : region (region_id::null (),
+ 	  svalue_id::null (),
+ 	  NULL_TREE)
+ {
+ }
+ 
+ /* root_region's copy ctor.  */
+ 
+ root_region::root_region (const root_region &other)
+ : region (other),
+   m_stack_rid (other.m_stack_rid),
+   m_globals_rid (other.m_globals_rid),
+   m_code_rid (other.m_code_rid),
+   m_heap_rid (other.m_heap_rid)
+ {
+ }
+ 
+ /* Compare the fields of this root_region with OTHER, returning true
+    if they are equal.
+    For use by region::operator==.  */
+ 
+ bool
+ root_region::compare_fields (const root_region &other) const
+ {
+   if (m_stack_rid != other.m_stack_rid)
+     return false;
+   if (m_globals_rid != other.m_globals_rid)
+     return false;
+   if (m_code_rid != other.m_code_rid)
+     return false;
+   if (m_heap_rid != other.m_heap_rid)
+     return false;
+   return true;
+ }
+ 
+ /* Implementation of region::clone vfunc for root_region.  */
+ 
+ region *
+ root_region::clone () const
+ {
+   return new root_region (*this);
+ }
+ 
+ /* Implementation of region::print_fields vfunc for root_region.  */
+ 
+ void
+ root_region::print_fields (const region_model &model,
+ 			   region_id this_rid,
+ 			   pretty_printer *pp) const
+ {
+   region::print_fields (model, this_rid, pp);
+   // TODO
+ }
+ 
+ /* Implementation of region::validate vfunc for root_region.  */
+ 
+ void
+ root_region::validate (const region_model &model) const
+ {
+   region::validate (model);
+   m_stack_rid.validate (model);
+   m_globals_rid.validate (model);
+   m_code_rid.validate (model);
+   m_heap_rid.validate (model);
+ }
+ 
+ /* Implementation of region::dump_child_label vfunc for root_region.  */
+ 
+ void
+ root_region::dump_child_label (const region_model &model ATTRIBUTE_UNUSED,
+ 			       region_id this_rid ATTRIBUTE_UNUSED,
+ 			       region_id child_rid,
+ 			       pretty_printer *pp) const
+ {
+   if (child_rid == m_stack_rid)
+     pp_printf (pp, "stack: ");
+   else if (child_rid == m_globals_rid)
+     pp_printf (pp, "globals: ");
+   else if (child_rid == m_code_rid)
+     pp_printf (pp, "code: ");
+   else if (child_rid == m_heap_rid)
+     pp_printf (pp, "heap: ");
+ }
+ 
+ /* Create a new frame_region for a call to FUN and push it onto
+    the stack.
+ 
+    If ARG_SIDS is non-NULL, use it to populate the parameters
+    in the new frame.
+    Otherwise, populate them with unknown values.
+ 
+    Return the region_id of the new frame.  */
+ 
+ region_id
+ root_region::push_frame (region_model *model, function *fun,
+ 			 vec<svalue_id> *arg_sids,
+ 			 region_model_context *ctxt)
+ {
+   gcc_assert (fun);
+   /* arg_sids can be NULL.  */
+ 
+   ensure_stack_region (model);
+   stack_region *stack = model->get_region <stack_region> (m_stack_rid);
+ 
+   frame_region *region = new frame_region (m_stack_rid, fun,
+ 					   stack->get_num_frames ());
+   region_id frame_rid = model->add_region (region);
+ 
+   // TODO: unify these cases by building a vec of unknown?
+ 
+   if (arg_sids)
+     {
+       /* Arguments supplied from a caller frame.  */
+ 
+       tree fndecl = fun->decl;
+       unsigned idx = 0;
+       for (tree iter_parm = DECL_ARGUMENTS (fndecl); iter_parm;
+ 	   iter_parm = DECL_CHAIN (iter_parm), ++idx)
+ 	{
+ 	  /* If there's a mismatching declaration, the call stmt might
+ 	     not have enough args.  Handle this case by leaving the
+ 	     rest of the params as uninitialized.  */
+ 	  if (idx >= arg_sids->length ())
+ 	    break;
+ 	  svalue_id arg_sid = (*arg_sids)[idx];
+ 	  region_id parm_rid
+ 	    = region->get_or_create (model, frame_rid, iter_parm,
+ 				     TREE_TYPE (iter_parm), ctxt);
+ 	  model->set_value (parm_rid, arg_sid, ctxt);
+ 
+ 	  /* Also do it for default SSA name (sharing the same unknown
+ 	     value).  */
+ 	  tree parm_default_ssa = ssa_default_def (fun, iter_parm);
+ 	  if (parm_default_ssa)
+ 	    {
+ 	      region_id defssa_rid
+ 		= region->get_or_create (model, frame_rid, parm_default_ssa,
+ 					 TREE_TYPE (iter_parm), ctxt);
+ 	      model->set_value (defssa_rid, arg_sid, ctxt);
+ 	    }
+ 	}
+     }
+   else
+     {
+       /* No known arguments (a top-level call within the analysis).  */
+ 
+       /* Params have a defined, unknown value; they should not inherit
+ 	 from the poisoned uninit value.  */
+       tree fndecl = fun->decl;
+       for (tree iter_parm = DECL_ARGUMENTS (fndecl); iter_parm;
+ 	   iter_parm = DECL_CHAIN (iter_parm))
+ 	{
+ 	  region_id parm_rid
+ 	    = region->get_or_create (model, frame_rid, iter_parm,
+ 				     TREE_TYPE (iter_parm), ctxt);
+ 	  svalue_id parm_sid
+ 	    = model->set_to_new_unknown_value (parm_rid, TREE_TYPE (iter_parm),
+ 					       ctxt);
+ 
+ 	  /* Also do it for default SSA name (sharing the same unknown
+ 	     value).  */
+ 	  tree parm_default_ssa = ssa_default_def (fun, iter_parm);
+ 	  if (parm_default_ssa)
+ 	    {
+ 	      region_id defssa_rid
+ 		= region->get_or_create (model, frame_rid, parm_default_ssa,
+ 					 TREE_TYPE (iter_parm), ctxt);
+ 	      model->get_region (defssa_rid)->set_value (*model, defssa_rid,
+ 							 parm_sid, ctxt);
+ 	    }
+ 	}
+     }
+ 
+   stack->push_frame (frame_rid);
+ 
+   return frame_rid;
+ }
+ 
+ /* Get the region_id of the top-most frame in this root_region's stack,
+    if any.  */
+ 
+ region_id
+ root_region::get_current_frame_id (const region_model &model) const
+ {
+   stack_region *stack = model.get_region <stack_region> (m_stack_rid);
+   if (stack)
+     return stack->get_current_frame_id ();
+   else
+     return region_id::null ();
+ }
+ 
+ /* Pop the topmost frame_region from this root_region's stack;
+    see the comment for stack_region::pop_frame.  */
+ 
+ void
+ root_region::pop_frame (region_model *model, region_id result_dst_rid,
+ 			bool purge, purge_stats *out,
+ 			region_model_context *ctxt)
+ {
+   stack_region *stack = model->get_region <stack_region> (m_stack_rid);
+   stack->pop_frame (model, result_dst_rid, purge, out, ctxt);
+ }
+ 
+ /* Return the region_id of the stack region, creating it if doesn't
+    already exist.  */
+ 
+ region_id
+ root_region::ensure_stack_region (region_model *model)
+ {
+   if (m_stack_rid.null_p ())
+     {
+       m_stack_rid
+ 	= model->add_region (new stack_region (model->get_root_rid (),
+ 					       svalue_id::null ()));
+     }
+   return m_stack_rid;
+ }
+ 
+ /* Return the stack region (which could be NULL).  */
+ 
+ stack_region *
+ root_region::get_stack_region (const region_model *model) const
+ {
+   return model->get_region <stack_region> (m_stack_rid);
+ }
+ 
+ /* Return the region_id of the globals region, creating it if doesn't
+    already exist.  */
+ 
+ region_id
+ root_region::ensure_globals_region (region_model *model)
+ {
+   if (m_globals_rid.null_p ())
+     m_globals_rid
+       = model->add_region (new globals_region (model->get_root_rid ()));
+   return m_globals_rid;
+ }
+ 
+ /* Return the code region (which could be NULL).  */
+ 
+ code_region *
+ root_region::get_code_region (const region_model *model) const
+ {
+   return model->get_region <code_region> (m_code_rid);
+ }
+ 
+ /* Return the region_id of the code region, creating it if doesn't
+    already exist.  */
+ 
+ region_id
+ root_region::ensure_code_region (region_model *model)
+ {
+   if (m_code_rid.null_p ())
+     m_code_rid
+       = model->add_region (new code_region (model->get_root_rid ()));
+   return m_code_rid;
+ }
+ 
+ /* Return the globals region (which could be NULL).  */
+ 
+ globals_region *
+ root_region::get_globals_region (const region_model *model) const
+ {
+   return model->get_region <globals_region> (m_globals_rid);
+ }
+ 
+ /* Return the region_id of the heap region, creating it if doesn't
+    already exist.  */
+ 
+ region_id
+ root_region::ensure_heap_region (region_model *model)
+ {
+   if (m_heap_rid.null_p ())
+     {
+       m_heap_rid
+ 	= model->add_region (new heap_region (model->get_root_rid (),
+ 					      svalue_id::null ()));
+     }
+   return m_heap_rid;
+ }
+ 
+ /* Return the heap region (which could be NULL).  */
+ 
+ heap_region *
+ root_region::get_heap_region (const region_model *model) const
+ {
+   return model->get_region <heap_region> (m_heap_rid);
+ }
+ 
+ /* Implementation of region::remap_region_ids vfunc for root_region.  */
+ 
+ void
+ root_region::remap_region_ids (const region_id_map &map)
+ {
+   map.update (&m_stack_rid);
+   map.update (&m_globals_rid);
+   map.update (&m_code_rid);
+   map.update (&m_heap_rid);
+ }
+ 
+ /* Attempt to merge ROOT_REGION_A and ROOT_REGION_B into
+    MERGED_ROOT_REGION using MERGER.
+    Return true if the merger is possible, false otherwise.  */
+ 
+ bool
+ root_region::can_merge_p (const root_region *root_region_a,
+ 			  const root_region *root_region_b,
+ 			  root_region *merged_root_region,
+ 			  model_merger *merger)
+ {
+   /* We can only merge if the stacks are sufficiently similar.  */
+   stack_region *stack_a = root_region_a->get_stack_region (merger->m_model_a);
+   stack_region *stack_b = root_region_b->get_stack_region (merger->m_model_b);
+   if (stack_a && stack_b)
+     {
+       /* If the two models both have a stack, attempt to merge them.  */
+       merged_root_region->ensure_stack_region (merger->m_merged_model);
+       if (!stack_region::can_merge_p (stack_a, stack_b, merger))
+ 	return false;
+     }
+   else if (stack_a || stack_b)
+     /* Don't attempt to merge if one model has a stack and the other
+        doesn't.  */
+     return false;
+ 
+   map_region *globals_a = root_region_a->get_globals_region (merger->m_model_a);
+   map_region *globals_b = root_region_b->get_globals_region (merger->m_model_b);
+   if (globals_a && globals_b)
+     {
+       /* If both models have globals regions, attempt to merge them.  */
+       region_id merged_globals_rid
+ 	= merged_root_region->ensure_globals_region (merger->m_merged_model);
+       map_region *merged_globals
+ 	= merged_root_region->get_globals_region (merger->m_merged_model);
+       if (!map_region::can_merge_p (globals_a, globals_b,
+ 				    merged_globals, merged_globals_rid,
+ 				    merger))
+ 	return false;
+     }
+   /* otherwise, merge as "no globals".  */
+ 
+   map_region *code_a = root_region_a->get_code_region (merger->m_model_a);
+   map_region *code_b = root_region_b->get_code_region (merger->m_model_b);
+   if (code_a && code_b)
+     {
+       /* If both models have code regions, attempt to merge them.  */
+       region_id merged_code_rid
+ 	= merged_root_region->ensure_code_region (merger->m_merged_model);
+       map_region *merged_code
+ 	= merged_root_region->get_code_region (merger->m_merged_model);
+       if (!map_region::can_merge_p (code_a, code_b,
+ 				    merged_code, merged_code_rid,
+ 				    merger))
+ 	return false;
+     }
+   /* otherwise, merge as "no code".  */
+ 
+   heap_region *heap_a = root_region_a->get_heap_region (merger->m_model_a);
+   heap_region *heap_b = root_region_b->get_heap_region (merger->m_model_b);
+   if (heap_a && heap_b)
+     {
+       /* If both have a heap, create a "merged" heap.
+ 	 Actually merging the heap contents happens via the region_svalue
+ 	 instances, as needed, when seeing pairs of region_svalue instances.  */
+       merged_root_region->ensure_heap_region (merger->m_merged_model);
+     }
+   /* otherwise, merge as "no heap".  */
+ 
+   return true;
+ }
+ 
+ /* Implementation of region::add_to_hash vfunc for root_region.  */
+ 
+ void
+ root_region::add_to_hash (inchash::hash &hstate) const
+ {
+   region::add_to_hash (hstate);
+   inchash::add (m_stack_rid, hstate);
+   inchash::add (m_globals_rid, hstate);
+   inchash::add (m_code_rid, hstate);
+   inchash::add (m_heap_rid, hstate);
+ }
+ 
+ /* Implementation of region::walk_for_canonicalization vfunc for
+    root_region.  */
+ 
+ void
+ root_region::walk_for_canonicalization (canonicalization *c) const
+ {
+   c->walk_rid (m_stack_rid);
+   c->walk_rid (m_globals_rid);
+   c->walk_rid (m_code_rid);
+   c->walk_rid (m_heap_rid);
+ }
+ 
+ /* For debugging purposes: look for a descendant region for a local
+    or global decl named IDENTIFIER (or an SSA_NAME for such a decl),
+    returning its value, or svalue_id::null if none are found.  */
+ 
+ svalue_id
+ root_region::get_value_by_name (tree identifier,
+ 				const region_model &model) const
+ {
+   if (stack_region *stack = get_stack_region (&model))
+     {
+       svalue_id sid = stack->get_value_by_name (identifier, model);
+       if (!sid.null_p ())
+ 	return sid;
+     }
+   if (map_region *globals = get_globals_region (&model))
+     {
+       svalue_id sid = globals->get_value_by_name (identifier, model);
+       if (!sid.null_p ())
+ 	return sid;
+     }
+   return svalue_id::null ();
+ }
+ 
+ /* class symbolic_region : public map_region.  */
+ 
+ /* symbolic_region's copy ctor.  */
+ 
+ symbolic_region::symbolic_region (const symbolic_region &other)
+ : region (other),
+   m_possibly_null (other.m_possibly_null)
+ {
+ }
+ 
+ /* Compare the fields of this symbolic_region with OTHER, returning true
+    if they are equal.
+    For use by region::operator==.  */
+ 
+ bool
+ symbolic_region::compare_fields (const symbolic_region &other) const
+ {
+   return m_possibly_null == other.m_possibly_null;
+ }
+ 
+ /* Implementation of region::clone vfunc for symbolic_region.  */
+ 
+ region *
+ symbolic_region::clone () const
+ {
+   return new symbolic_region (*this);
+ }
+ 
+ /* Implementation of region::walk_for_canonicalization vfunc for
+    symbolic_region.  */
+ 
+ void
+ symbolic_region::walk_for_canonicalization (canonicalization *) const
+ {
+   /* Empty.  */
+ }
+ 
+ /* Implementation of region::print_fields vfunc for symbolic_region.  */
+ 
+ void
+ symbolic_region::print_fields (const region_model &model,
+ 			       region_id this_rid,
+ 			       pretty_printer *pp) const
+ {
+   region::print_fields (model, this_rid, pp);
+   pp_printf (pp, ", possibly_null: %s", m_possibly_null ? "true" : "false");
+ }
+ 
+ /* class region_model.  */
+ 
+ /* region_model's default ctor.  */
+ 
+ region_model::region_model ()
+ {
+   m_root_rid = add_region (new root_region ());
+   m_constraints = new impl_constraint_manager (this);
+   // TODO
+ }
+ 
+ /* region_model's copy ctor.  */
+ 
+ region_model::region_model (const region_model &other)
+ : m_svalues (other.m_svalues.length ()),
+   m_regions (other.m_regions.length ()),
+   m_root_rid (other.m_root_rid)
+ {
+   /* Clone the svalues and regions.  */
+   int i;
+ 
+   svalue *svalue;
+   FOR_EACH_VEC_ELT (other.m_svalues, i, svalue)
+     m_svalues.quick_push (svalue->clone ());
+ 
+   region *region;
+   FOR_EACH_VEC_ELT (other.m_regions, i, region)
+     m_regions.quick_push (region->clone ());
+ 
+   m_constraints = other.m_constraints->clone (this);
+ }
+ 
+ /* region_model's dtor.  */
+ 
+ region_model::~region_model ()
+ {
+   delete m_constraints;
+ }
+ 
+ /* region_model's assignment operator.  */
+ 
+ region_model &
+ region_model::operator= (const region_model &other)
+ {
+   unsigned i;
+   svalue *svalue;
+   region *region;
+ 
+   /* Delete existing content.  */
+   FOR_EACH_VEC_ELT (m_svalues, i, svalue)
+     delete svalue;
+   m_svalues.truncate (0);
+ 
+   FOR_EACH_VEC_ELT (m_regions, i, region)
+     delete region;
+   m_regions.truncate (0);
+ 
+   delete m_constraints;
+ 
+   /* Clone the svalues and regions.  */
+   m_svalues.reserve (other.m_svalues.length (), true);
+   FOR_EACH_VEC_ELT (other.m_svalues, i, svalue)
+     m_svalues.quick_push (svalue->clone ());
+ 
+   m_regions.reserve (other.m_regions.length (), true);
+   FOR_EACH_VEC_ELT (other.m_regions, i, region)
+     m_regions.quick_push (region->clone ());
+ 
+   m_root_rid = other.m_root_rid;
+ 
+   m_constraints = other.m_constraints->clone (this);
+ 
+   return *this;
+ }
+ 
+ /* Equality operator for region_model.
+ 
+    Amongst other things this directly compares the svalue and region
+    vectors and so for this to be meaningful both this and OTHER should
+    have been canonicalized.  */
+ 
+ bool
+ region_model::operator== (const region_model &other) const
+ {
+   if (m_root_rid != other.m_root_rid)
+     return false;
+ 
+   if (m_svalues.length () != other.m_svalues.length ())
+     return false;
+ 
+   if (m_regions.length () != other.m_regions.length ())
+     return false;
+ 
+   if (*m_constraints != *other.m_constraints)
+     return false;
+ 
+   unsigned i;
+   svalue *svalue;
+   FOR_EACH_VEC_ELT (other.m_svalues, i, svalue)
+     if (!(*m_svalues[i] == *other.m_svalues[i]))
+       return false;
+ 
+   region *region;
+   FOR_EACH_VEC_ELT (other.m_regions, i, region)
+     if (!(*m_regions[i] == *other.m_regions[i]))
+       return false;
+ 
+   gcc_checking_assert (hash () == other.hash ());
+ 
+   return true;
+ }
+ 
+ /* Generate a hash value for this region_model.  */
+ 
+ hashval_t
+ region_model::hash () const
+ {
+   hashval_t result = 0;
+   int i;
+ 
+   svalue *svalue;
+   FOR_EACH_VEC_ELT (m_svalues, i, svalue)
+     result ^= svalue->hash ();
+ 
+   region *region;
+   FOR_EACH_VEC_ELT (m_regions, i, region)
+     result ^= region->hash ();
+ 
+   result ^= m_constraints->hash ();
+ 
+   return result;
+ }
+ 
+ /* Print an all-on-one-line representation of this region_model to PP,
+    which must support %E for trees.  */
+ 
+ void
+ region_model::print (pretty_printer *pp) const
+ {
+   int i;
+ 
+   pp_string (pp, "svalues: [");
+   svalue *svalue;
+   FOR_EACH_VEC_ELT (m_svalues, i, svalue)
+     {
+       if (i > 0)
+ 	pp_string (pp, ", ");
+       print_svalue (svalue_id::from_int (i), pp);
+     }
+ 
+   pp_string (pp, "], regions: [");
+ 
+   region *region;
+   FOR_EACH_VEC_ELT (m_regions, i, region)
+     {
+       if (i > 0)
+ 	pp_string (pp, ", ");
+       region->print (*this, region_id::from_int (i), pp);
+     }
+ 
+   pp_string (pp, "], constraints: ");
+ 
+   m_constraints->print (pp);
+ }
+ 
+ /* Print the svalue with id SID to PP.  */
+ 
+ void
+ region_model::print_svalue (svalue_id sid, pretty_printer *pp) const
+ {
+   get_svalue (sid)->print (*this, sid, pp);
+ }
+ 
+ /* Dump a .dot representation of this region_model to PP, showing
+    the values and the hierarchy of regions.  */
+ 
+ void
+ region_model::dump_dot_to_pp (pretty_printer *pp) const
+ {
+   graphviz_out gv (pp);
+ 
+   pp_string (pp, "digraph \"");
+   pp_write_text_to_stream (pp);
+   pp_write_text_as_dot_label_to_stream (pp, /*for_record=*/false);
+   pp_string (pp, "\" {\n");
+ 
+   gv.indent ();
+ 
+   pp_string (pp, "overlap=false;\n");
+   pp_string (pp, "compound=true;\n");
+ 
+   int i;
+ 
+   svalue *svalue;
+   FOR_EACH_VEC_ELT (m_svalues, i, svalue)
+     svalue->dump_dot_to_pp (*this, svalue_id::from_int (i), pp);
+ 
+   region *region;
+   FOR_EACH_VEC_ELT (m_regions, i, region)
+     region->dump_dot_to_pp (*this, region_id::from_int (i), pp);
+ 
+   /* TODO: constraints.  */
+ 
+   /* Terminate "digraph" */
+   gv.outdent ();
+   pp_string (pp, "}");
+   pp_newline (pp);
+ }
+ 
+ /* Dump a .dot representation of this region_model to FP.  */
+ 
+ void
+ region_model::dump_dot_to_file (FILE *fp) const
+ {
+   pretty_printer pp;
+   pp_format_decoder (&pp) = default_tree_printer;
+   pp.buffer->stream = fp;
+   dump_dot_to_pp (&pp);
+   pp_flush (&pp);
+ }
+ 
+ /* Dump a .dot representation of this region_model to PATH.  */
+ 
+ void
+ region_model::dump_dot (const char *path) const
+ {
+   FILE *fp = fopen (path, "w");
+   dump_dot_to_file (fp);
+   fclose (fp);
+ }
+ 
+ /* Dump a multiline representation of this model to PP, showing the
+    region hierarchy, the svalues, and any constraints.
+ 
+    If SUMMARIZE is true, show only the most pertinent information,
+    in a form that attempts to be less verbose.
+    Otherwise, show all information.  */
+ 
+ void
+ region_model::dump_to_pp (pretty_printer *pp, bool summarize) const
+ {
+   if (summarize)
+     {
+       auto_vec<path_var> rep_path_vars;
+ 
+       unsigned i;
+       region *reg;
+       FOR_EACH_VEC_ELT (m_regions, i, reg)
+ 	{
+ 	  region_id rid = region_id::from_int (i);
+ 	  path_var pv = get_representative_path_var (rid);
+ 	  if (pv.m_tree)
+ 	    rep_path_vars.safe_push (pv);
+ 	}
+       bool is_first = true;
+ 
+       /* Work with a copy in case the get_lvalue calls change anything
+ 	 (they shouldn't).  */
+       region_model copy (*this);
+       copy.dump_summary_of_rep_path_vars (pp, &rep_path_vars, &is_first);
+ 
+       equiv_class *ec;
+       FOR_EACH_VEC_ELT (m_constraints->m_equiv_classes, i, ec)
+ 	{
+ 	  for (unsigned j = 0; j < ec->m_vars.length (); j++)
+ 	    {
+ 	      svalue_id lhs_sid = ec->m_vars[j];
+ 	      tree lhs_tree = get_representative_tree (lhs_sid);
+ 	      if (lhs_tree == NULL_TREE)
+ 		continue;
+ 	      for (unsigned k = j + 1; k < ec->m_vars.length (); k++)
+ 		{
+ 		  svalue_id rhs_sid = ec->m_vars[k];
+ 		  tree rhs_tree = get_representative_tree (rhs_sid);
+ 		  if (rhs_tree
+ 		      && !(CONSTANT_CLASS_P (lhs_tree)
+ 			   && CONSTANT_CLASS_P (rhs_tree)))
+ 		    {
+ 		      dump_separator (pp, &is_first);
+ 		      dump_tree (pp, lhs_tree);
+ 		      pp_string (pp, " == ");
+ 		      dump_tree (pp, rhs_tree);
+ 		    }
+ 		}
+ 	    }
+ 	}
+ 
+       constraint *c;
+       FOR_EACH_VEC_ELT (m_constraints->m_constraints, i, c)
+ 	{
+ 	  const equiv_class &lhs = c->m_lhs.get_obj (*m_constraints);
+ 	  const equiv_class &rhs = c->m_rhs.get_obj (*m_constraints);
+ 	  svalue_id lhs_sid = lhs.get_representative ();
+ 	  svalue_id rhs_sid = rhs.get_representative ();
+ 	  tree lhs_tree = get_representative_tree (lhs_sid);
+ 	  tree rhs_tree = get_representative_tree (rhs_sid);
+ 	  if (lhs_tree && rhs_tree
+ 	      && !(CONSTANT_CLASS_P (lhs_tree) && CONSTANT_CLASS_P (rhs_tree)))
+ 	    {
+ 	      dump_separator (pp, &is_first);
+ 	      dump_tree (pp, lhs_tree);
+ 	      pp_printf (pp, " %s ", constraint_op_code (c->m_op));
+ 	      dump_tree (pp, rhs_tree);
+ 	   }
+ 	}
+ 
+       return;
+     }
+ 
+   get_region (m_root_rid)->dump_to_pp (*this, m_root_rid, pp, "", true);
+ 
+   pp_string (pp, "svalues:");
+   pp_newline (pp);
+   int i;
+   svalue *svalue;
+   FOR_EACH_VEC_ELT (m_svalues, i, svalue)
+     {
+       pp_string (pp, "  ");
+       svalue_id sid = svalue_id::from_int (i);
+       print_svalue (sid, pp);
+       pp_newline (pp);
+     }
+ 
+   pp_string (pp, "constraint manager:");
+   pp_newline (pp);
+   m_constraints->dump_to_pp (pp);
+ }
+ 
+ /* Dump a multiline representation of this model to FILE.  */
+ 
+ void
+ region_model::dump (FILE *fp, bool summarize) const
+ {
+   pretty_printer pp;
+   pp_format_decoder (&pp) = default_tree_printer;
+   pp_show_color (&pp) = pp_show_color (global_dc->printer);
+   pp.buffer->stream = fp;
+   dump_to_pp (&pp, summarize);
+   pp_flush (&pp);
+ }
+ 
+ /* Dump a multiline representation of this model to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ region_model::dump (bool summarize) const
+ {
+   dump (stderr, summarize);
+ }
+ 
+ /* Dump RMODEL fully to stderr (i.e. without summarization).  */
+ 
+ DEBUG_FUNCTION void
+ region_model::debug () const
+ {
+   dump (false);
+ }
+ 
+ /* Dump VEC to PP, in the form "{VEC elements}: LABEL".  */
+ 
+ static void
+ dump_vec_of_tree (pretty_printer *pp,
+ 		  bool *is_first,
+ 		  const auto_vec<tree> &vec,
+ 		  const char *label)
+ {
+   if (vec.length () == 0)
+     return;
+ 
+   dump_separator (pp, is_first);
+   pp_printf (pp, "{");
+   unsigned i;
+   tree key;
+   FOR_EACH_VEC_ELT (vec, i, key)
+     {
+       if (i > 0)
+ 	pp_string (pp, ", ");
+       dump_tree (pp, key);
+     }
+   pp_printf (pp, "}: %s", label);
+ }
+ 
+ /* Dump all *REP_PATH_VARS to PP in compact form, updating *IS_FIRST.
+    Subroutine of region_model::dump_to_pp.  */
+ 
+ void
+ region_model::dump_summary_of_rep_path_vars (pretty_printer *pp,
+ 					     auto_vec<path_var> *rep_path_vars,
+ 					     bool *is_first)
+ {
+   /* Print pointers, constants, and poisoned values that aren't "uninit";
+      gather keys for unknown and uninit values.  */
+   unsigned i;
+   path_var *pv;
+   auto_vec<tree> unknown_trees;
+   FOR_EACH_VEC_ELT (*rep_path_vars, i, pv)
+     {
+       if (TREE_CODE (pv->m_tree) == STRING_CST)
+ 	continue;
+       tentative_region_model_context ctxt;
+       region_id child_rid = get_lvalue (*pv, &ctxt);
+       if (ctxt.had_errors_p ())
+ 	continue;
+       region *child_region = get_region (child_rid);
+       if (!child_region)
+ 	continue;
+       svalue_id sid = child_region->get_value_direct ();
+       if (sid.null_p ())
+ 	continue;
+       svalue *sval = get_svalue (sid);
+       switch (sval->get_kind ())
+ 	{
+ 	default:
+ 	  gcc_unreachable ();
+ 	case SK_REGION:
+ 	  {
+ 	    region_svalue *region_sval = as_a <region_svalue *> (sval);
+ 	    region_id pointee_rid = region_sval->get_pointee ();
+ 	    gcc_assert (!pointee_rid.null_p ());
+ 	    tree pointee = get_representative_path_var (pointee_rid).m_tree;
+ 	    dump_separator (pp, is_first);
+ 	    dump_tree (pp, pv->m_tree);
+ 	    pp_string (pp, ": ");
+ 	    pp_character (pp, '&');
+ 	    if (pointee)
+ 	      dump_tree (pp, pointee);
+ 	    else
+ 	      pointee_rid.print (pp);
+ 	  }
+ 	  break;
+ 	case SK_CONSTANT:
+ 	  dump_separator (pp, is_first);
+ 	  dump_tree (pp, pv->m_tree);
+ 	  pp_string (pp, ": ");
+ 	  dump_tree (pp, sval->dyn_cast_constant_svalue ()->get_constant ());
+ 	  break;
+ 	case SK_UNKNOWN:
+ 	  unknown_trees.safe_push (pv->m_tree);
+ 	  break;
+ 	case SK_POISONED:
+ 	  {
+ 	    poisoned_svalue *poisoned_sval = as_a <poisoned_svalue *> (sval);
+ 	    enum poison_kind pkind = poisoned_sval->get_poison_kind ();
+ 	    dump_separator (pp, is_first);
+ 	    dump_tree (pp, pv->m_tree);
+ 	    pp_printf (pp, ": %s", poison_kind_to_str (pkind));
+ 	  }
+ 	  break;
+ 	case SK_SETJMP:
+ 	  dump_separator (pp, is_first);
+ 	  pp_printf (pp, "setjmp: EN: %i",
+ 		     sval->dyn_cast_setjmp_svalue ()->get_enode_index ());
+ 	  break;
+ 	}
+     }
+ 
+   /* Print unknown and uninitialized values in consolidated form.  */
+   dump_vec_of_tree (pp, is_first, unknown_trees, "unknown");
+ }
+ 
+ /* Assert that this object is valid.  */
+ 
+ void
+ region_model::validate () const
+ {
+   /* Skip this in a release build.  */
+ #if !CHECKING_P
+   return;
+ #endif
+ 
+   m_constraints->validate ();
+ 
+   unsigned i;
+   region *r;
+   FOR_EACH_VEC_ELT (m_regions, i, r)
+     r->validate (*this);
+ 
+   // TODO: anything else?
+ }
+ 
+ /* Global data for use by svalue_id_cmp_by_constant_svalue.  */
+ 
+ static region_model *svalue_id_cmp_by_constant_svalue_model = NULL;
+ 
+ /* Comparator for use by region_model::canonicalize.  */
+ 
+ static int
+ svalue_id_cmp_by_constant_svalue (const void *p1, const void *p2)
+ {
+   const svalue_id *sid1 = (const svalue_id *)p1;
+   const svalue_id *sid2 = (const svalue_id *)p2;
+   gcc_assert (!sid1->null_p ());
+   gcc_assert (!sid2->null_p ());
+   gcc_assert (svalue_id_cmp_by_constant_svalue_model);
+   const svalue &sval1
+     = *svalue_id_cmp_by_constant_svalue_model->get_svalue (*sid1);
+   const svalue &sval2
+     = *svalue_id_cmp_by_constant_svalue_model->get_svalue (*sid2);
+   gcc_assert (sval1.get_kind () == SK_CONSTANT);
+   gcc_assert (sval2.get_kind () == SK_CONSTANT);
+ 
+   tree cst1 = ((const constant_svalue &)sval1).get_constant ();
+   tree cst2 = ((const constant_svalue &)sval2).get_constant ();
+   return tree_cmp (cst1, cst2);
+ }
+ 
+ /* Reorder the regions and svalues into a deterministic "canonical" order,
+    to maximize the chance of equality.
+    If non-NULL, notify CTXT about the svalue id remapping.  */
+ 
+ void
+ region_model::canonicalize (region_model_context *ctxt)
+ {
+   /* Walk all regions and values in a deterministic order, visiting
+      rids and sids, generating a rid and sid map.  */
+   canonicalization c (*this);
+ 
+   /* (1): Walk all svalues, putting constants first, sorting the constants
+      (thus imposing an ordering on any constants that are purely referenced
+      by constraints).
+      Ignore other svalues for now.  */
+   {
+     unsigned i;
+     auto_vec<svalue_id> sids;
+     svalue *sval;
+     FOR_EACH_VEC_ELT (m_svalues, i, sval)
+       {
+ 	if (sval->get_kind () == SK_CONSTANT)
+ 	  sids.safe_push (svalue_id::from_int (i));
+       }
+     svalue_id_cmp_by_constant_svalue_model = this;
+     sids.qsort (svalue_id_cmp_by_constant_svalue);
+     svalue_id_cmp_by_constant_svalue_model = NULL;
+     svalue_id *sid;
+     FOR_EACH_VEC_ELT (sids, i, sid)
+       c.walk_sid (*sid);
+   }
+ 
+   /* (2): Walk all regions (and thus their values) in a deterministic
+      order.  */
+   c.walk_rid (m_root_rid);
+ 
+   /* (3): Ensure we've visited everything, as we don't want to purge
+      at this stage.  Anything we visit for the first time here has
+      arbitrary order.  */
+   {
+     unsigned i;
+     region *region;
+     FOR_EACH_VEC_ELT (m_regions, i, region)
+       c.walk_rid (region_id::from_int (i));
+     svalue *sval;
+     FOR_EACH_VEC_ELT (m_svalues, i, sval)
+       c.walk_sid (svalue_id::from_int (i));
+   }
+ 
+   /* (4): We now have a reordering of the regions and values.
+      Apply it.  */
+   remap_svalue_ids (c.m_sid_map);
+   remap_region_ids (c.m_rid_map);
+   if (ctxt)
+     ctxt->remap_svalue_ids (c.m_sid_map);
+ 
+   /* (5): Canonicalize the constraint_manager (it has already had its
+      svalue_ids remapped above).  This makes use of the new svalue_id
+      values, and so must happen last.  */
+   m_constraints->canonicalize (get_num_svalues ());
+ 
+   validate ();
+ }
+ 
+ /* Return true if this region_model is in canonical form.  */
+ 
+ bool
+ region_model::canonicalized_p () const
+ {
+   region_model copy (*this);
+   copy.canonicalize (NULL);
+   return *this == copy;
+ }
+ 
+ /* A subclass of pending_diagnostic for complaining about uses of
+    poisoned values.  */
+ 
+ class poisoned_value_diagnostic
+ : public pending_diagnostic_subclass<poisoned_value_diagnostic>
+ {
+ public:
+   poisoned_value_diagnostic (tree expr, enum poison_kind pkind)
+   : m_expr (expr), m_pkind (pkind)
+   {}
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "poisoned_value_diagnostic"; }
+ 
+   bool operator== (const poisoned_value_diagnostic &other) const
+   {
+     return m_expr == other.m_expr;
+   }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     switch (m_pkind)
+       {
+       default:
+ 	gcc_unreachable ();
+       case POISON_KIND_FREED:
+ 	{
+ 	  diagnostic_metadata m;
+ 	  m.add_cwe (416); /* "CWE-416: Use After Free".  */
+ 	  return warning_meta (rich_loc, m,
+ 			       OPT_Wanalyzer_use_after_free,
+ 			       "use after %<free%> of %qE",
+ 			       m_expr);
+ 	}
+ 	break;
+       case POISON_KIND_POPPED_STACK:
+ 	{
+ 	  /* TODO: which CWE?  */
+ 	  return warning_at (rich_loc,
+ 			     OPT_Wanalyzer_use_of_pointer_in_stale_stack_frame,
+ 			     "use of pointer %qE within stale stack frame",
+ 			     m_expr);
+ 	}
+ 	break;
+       }
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     switch (m_pkind)
+       {
+       default:
+ 	gcc_unreachable ();
+       case POISON_KIND_FREED:
+ 	return ev.formatted_print ("use after %<free%> of %qE here",
+ 				   m_expr);
+       case POISON_KIND_POPPED_STACK:
+ 	return ev.formatted_print
+ 	  ("use of pointer %qE within stale stack frame here",
+ 	   m_expr);
+       }
+   }
+ 
+ private:
+   tree m_expr;
+   enum poison_kind m_pkind;
+ };
+ 
+ /* Determine if EXPR is poisoned, and if so, queue a diagnostic to CTXT.  */
+ 
+ void
+ region_model::check_for_poison (tree expr, region_model_context *ctxt)
+ {
+   if (!ctxt)
+     return;
+ 
+   // TODO: this is disabled for now (too many false positives)
+   return;
+ 
+   svalue_id expr_sid = get_rvalue (expr, ctxt);
+   gcc_assert (!expr_sid.null_p ());
+   svalue *expr_svalue = get_svalue (expr_sid);
+   gcc_assert (expr_svalue);
+   if (const poisoned_svalue *poisoned_sval
+ 	= expr_svalue->dyn_cast_poisoned_svalue ())
+     {
+       enum poison_kind pkind = poisoned_sval->get_poison_kind ();
+       ctxt->warn (new poisoned_value_diagnostic (expr, pkind));
+     }
+ }
+ 
+ /* Update this model for the ASSIGN stmt, using CTXT to report any
+    diagnostics.  */
+ 
+ void
+ region_model::on_assignment (const gassign *assign, region_model_context *ctxt)
+ {
+   tree lhs = gimple_assign_lhs (assign);
+   tree rhs1 = gimple_assign_rhs1 (assign);
+ 
+   region_id lhs_rid = get_lvalue (lhs, ctxt);
+ 
+   /* Check for uses of poisoned values.  */
+   switch (get_gimple_rhs_class (gimple_expr_code (assign)))
+     {
+     case GIMPLE_INVALID_RHS:
+       gcc_unreachable ();
+       break;
+     case GIMPLE_TERNARY_RHS:
+       check_for_poison (gimple_assign_rhs3 (assign), ctxt);
+       /* Fallthru */
+     case GIMPLE_BINARY_RHS:
+       check_for_poison (gimple_assign_rhs2 (assign), ctxt);
+       /* Fallthru */
+     case GIMPLE_UNARY_RHS:
+     case GIMPLE_SINGLE_RHS:
+       check_for_poison (gimple_assign_rhs1 (assign), ctxt);
+     }
+ 
+   if (lhs_rid.null_p ())
+     return;
+   // TODO: issue a warning for this case
+ 
+   enum tree_code op = gimple_assign_rhs_code (assign);
+   switch (op)
+     {
+     default:
+       {
+ 	if (0)
+ 	  sorry_at (assign->location, "unhandled assignment op: %qs",
+ 		    get_tree_code_name (op));
+ 	set_to_new_unknown_value (lhs_rid, TREE_TYPE (lhs), ctxt);
+       }
+       break;
+ 
+     case BIT_FIELD_REF:
+       {
+ 	// TODO
+       }
+       break;
+ 
+     case CONSTRUCTOR:
+       {
+ 	/* e.g. "x ={v} {CLOBBER};"  */
+ 	// TODO
+       }
+       break;
+ 
+     case POINTER_PLUS_EXPR:
+       {
+ 	/* e.g. "_1 = a_10(D) + 12;" */
+ 	tree ptr = rhs1;
+ 	tree offset = gimple_assign_rhs2 (assign);
+ 
+ 	svalue_id ptr_sid = get_rvalue (ptr, ctxt);
+ 	svalue_id offset_sid = get_rvalue (offset, ctxt);
+ 	region_id element_rid
+ 	  = get_or_create_pointer_plus_expr (TREE_TYPE (TREE_TYPE (ptr)),
+ 					     ptr_sid, offset_sid,
+ 					     ctxt);
+ 	svalue_id element_ptr_sid
+ 	  = get_or_create_ptr_svalue (TREE_TYPE (ptr), element_rid);
+ 	set_value (lhs_rid, element_ptr_sid, ctxt);
+       }
+       break;
+ 
+     case POINTER_DIFF_EXPR:
+       {
+ 	/* e.g. "_1 = p_2(D) - q_3(D);".  */
+ 
+ 	/* TODO.  */
+ 
+ 	set_to_new_unknown_value (lhs_rid, TREE_TYPE (lhs), ctxt);
+       }
+       break;
+ 
+     case ADDR_EXPR:
+       {
+ 	/* LHS = &RHS;  */
+ 	svalue_id ptr_sid = get_rvalue (rhs1, ctxt);
+ 	set_value (lhs_rid, ptr_sid, ctxt);
+       }
+       break;
+ 
+     case MEM_REF:
+       {
+ 	region_id rhs_rid = get_lvalue (rhs1, ctxt);
+ 	svalue_id rhs_sid
+ 	  = get_region (rhs_rid)->get_value (*this, true, ctxt);
+ 	set_value (lhs_rid, rhs_sid, ctxt);
+       }
+       break;
+ 
+     case REAL_CST:
+     case INTEGER_CST:
+     case ARRAY_REF:
+       {
+ 	/* LHS = RHS;  */
+ 	svalue_id cst_sid = get_rvalue (rhs1, ctxt);
+ 	set_value (lhs_rid, cst_sid, ctxt);
+       }
+       break;
+ 
+     case FIX_TRUNC_EXPR:
+     case FLOAT_EXPR:
+     case NOP_EXPR:
+       // cast: TODO
+       // fall though for now
+     case SSA_NAME:
+     case VAR_DECL:
+     case PARM_DECL:
+       {
+ 	/* LHS = VAR;  */
+ 	region_id rhs_rid = get_lvalue (rhs1, ctxt);
+ 	copy_region (lhs_rid, rhs_rid, ctxt);
+       }
+       break;
+ 
+     case EQ_EXPR:
+     case GE_EXPR:
+     case LE_EXPR:
+     case NE_EXPR:
+     case GT_EXPR:
+     case LT_EXPR:
+       {
+ 	tree rhs2 = gimple_assign_rhs2 (assign);
+ 
+ 	// TODO: constraints between svalues
+ 	svalue_id rhs1_sid = get_rvalue (rhs1, ctxt);
+ 	svalue_id rhs2_sid = get_rvalue (rhs2, ctxt);
+ 
+ 	tristate t = eval_condition (rhs1_sid, op, rhs2_sid);
+ 	if (t.is_known ())
+ 	  set_value (lhs_rid,
+ 		     get_rvalue (t.is_true ()
+ 				 ? boolean_true_node
+ 				 : boolean_false_node,
+ 				 ctxt),
+ 		     ctxt);
+ 	else
+ 	  set_to_new_unknown_value (lhs_rid, TREE_TYPE (lhs), ctxt);
+       }
+       break;
+ 
+     case NEGATE_EXPR:
+     case BIT_NOT_EXPR:
+       {
+ 	// TODO: unary ops
+ 
+ 	// TODO: constant?
+ 
+ 	set_to_new_unknown_value (lhs_rid, TREE_TYPE (lhs), ctxt);
+       }
+       break;
+ 
+     case PLUS_EXPR:
+     case MINUS_EXPR:
+     case MULT_EXPR:
+     case TRUNC_DIV_EXPR:
+     case TRUNC_MOD_EXPR:
+     case LSHIFT_EXPR:
+     case RSHIFT_EXPR:
+     case BIT_IOR_EXPR:
+     case BIT_XOR_EXPR:
+     case BIT_AND_EXPR:
+     case MIN_EXPR:
+     case MAX_EXPR:
+       {
+ 	/* Binary ops.  */
+ 	tree rhs2 = gimple_assign_rhs2 (assign);
+ 
+ 	svalue_id rhs1_sid = get_rvalue (rhs1, ctxt);
+ 	svalue_id rhs2_sid = get_rvalue (rhs2, ctxt);
+ 
+ 	if (tree rhs1_cst = maybe_get_constant (rhs1_sid))
+ 	  if (tree rhs2_cst = maybe_get_constant (rhs2_sid))
+ 	    {
+ 	      tree result = fold_binary (op, TREE_TYPE (lhs),
+ 					 rhs1_cst, rhs2_cst);
+ 	      if (result && CONSTANT_CLASS_P (result))
+ 		{
+ 		  svalue_id result_sid
+ 		    = get_or_create_constant_svalue (result);
+ 		  set_value (lhs_rid, result_sid, ctxt);
+ 		  return;
+ 		}
+ 	    }
+ 	set_to_new_unknown_value (lhs_rid, TREE_TYPE (lhs), ctxt);
+       }
+       break;
+ 
+     case COMPONENT_REF:
+       {
+ 	/* LHS = op0.op1;  */
+ 	region_id child_rid = get_lvalue (rhs1, ctxt);
+ 	svalue_id child_sid
+ 	  = get_region (child_rid)->get_value (*this, true, ctxt);
+ 	set_value (lhs_rid, child_sid, ctxt);
+       }
+       break;
+     }
+ }
+ 
+ /* Update this model for the CALL stmt, using CTXT to report any
+    diagnostics - the first half.
+ 
+    Updates to the region_model that should be made *before* sm-states
+    are updated are done here; other updates to the region_model are done
+    in region_model::on_call_post.
+ 
+    Return true if the function call has unknown side effects (it wasn't
+    recognized and we don't have a body for it, or are unable to tell which
+    fndecl it is).  */
+ 
+ bool
+ region_model::on_call_pre (const gcall *call, region_model_context *ctxt)
+ {
+   region_id lhs_rid;
+   tree lhs_type = NULL_TREE;
+   if (tree lhs = gimple_call_lhs (call))
+     {
+       lhs_rid = get_lvalue (lhs, ctxt);
+       lhs_type = TREE_TYPE (lhs);
+     }
+ 
+   /* Check for uses of poisoned values.
+      For now, special-case "free", to avoid warning about "use-after-free"
+      when "double free" would be more precise.  */
+   if (!is_special_named_call_p (call, "free", 1))
+     for (unsigned i = 0; i < gimple_call_num_args (call); i++)
+       check_for_poison (gimple_call_arg (call, i), ctxt);
+ 
+   bool unknown_side_effects = false;
+ 
+   if (tree callee_fndecl = get_fndecl_for_call (call, ctxt))
+     {
+       if (is_named_call_p (callee_fndecl, "malloc", call, 1))
+ 	{
+ 	  // TODO: capture size as a svalue?
+ 	  region_id new_rid = add_new_malloc_region ();
+ 	  if (!lhs_rid.null_p ())
+ 	    {
+ 	      svalue_id ptr_sid
+ 		= get_or_create_ptr_svalue (lhs_type, new_rid);
+ 	      set_value (lhs_rid, ptr_sid, ctxt);
+ 	    }
+ 	  return false;
+ 	}
+       else if (is_named_call_p (callee_fndecl, "__builtin_alloca", call, 1))
+ 	{
+ 	  region_id frame_rid = get_current_frame_id ();
+ 	  region_id new_rid
+ 	    = add_region (new symbolic_region (frame_rid, NULL_TREE, false));
+ 	  if (!lhs_rid.null_p ())
+ 	    {
+ 	      svalue_id ptr_sid
+ 		= get_or_create_ptr_svalue (lhs_type, new_rid);
+ 	      set_value (lhs_rid, ptr_sid, ctxt);
+ 	    }
+ 	  return false;
+ 	}
+       else if (gimple_call_builtin_p (call, BUILT_IN_EXPECT)
+ 	       || gimple_call_builtin_p (call, BUILT_IN_EXPECT_WITH_PROBABILITY)
+ 	       || gimple_call_internal_p (call, IFN_BUILTIN_EXPECT))
+ 	{
+ 	  /* __builtin_expect's return value is its initial argument.  */
+ 	  if (!lhs_rid.null_p ())
+ 	    {
+ 	      tree initial_arg = gimple_call_arg (call, 0);
+ 	      svalue_id sid = get_rvalue (initial_arg, ctxt);
+ 	      set_value (lhs_rid, sid, ctxt);
+ 	    }
+ 	  return false;
+ 	}
+       else if (is_named_call_p (callee_fndecl, "strlen", call, 1))
+ 	{
+ 	  region_id buf_rid = deref_rvalue (gimple_call_arg (call, 0), ctxt);
+ 	  svalue_id buf_sid
+ 	    = get_region (buf_rid)->get_value (*this, true, ctxt);
+ 	  if (tree cst_expr = maybe_get_constant (buf_sid))
+ 	    {
+ 	      if (TREE_CODE (cst_expr) == STRING_CST
+ 		  && !lhs_rid.null_p ())
+ 		{
+ 		  /* TREE_STRING_LENGTH is sizeof, not strlen.  */
+ 		  int sizeof_cst = TREE_STRING_LENGTH (cst_expr);
+ 		  int strlen_cst = sizeof_cst - 1;
+ 		  tree t_cst = build_int_cst (lhs_type, strlen_cst);
+ 		  svalue_id result_sid
+ 		    = get_or_create_constant_svalue (t_cst);
+ 		  set_value (lhs_rid, result_sid, ctxt);
+ 		  return false;
+ 		}
+ 	    }
+ 	  /* Otherwise an unknown value.  */
+ 	}
+       else if (is_named_call_p (callee_fndecl,
+ 				"__analyzer_dump_num_heap_regions", call, 0))
+ 	{
+ 	  /* Handle the builtin "__analyzer_dump_num_heap_regions" by emitting
+ 	     a warning (for use in DejaGnu tests).  */
+ 	  int num_heap_regions = 0;
+ 	  region_id heap_rid = get_root_region ()->ensure_heap_region (this);
+ 	  unsigned i;
+ 	  region *region;
+ 	  FOR_EACH_VEC_ELT (m_regions, i, region)
+ 	    if (region->get_parent () == heap_rid)
+ 	      num_heap_regions++;
+ 	  /* Use quotes to ensure the output isn't truncated.  */
+ 	  warning_at (call->location, 0,
+ 		      "num heap regions: %qi", num_heap_regions);
+ 	  return false;
+ 	}
+       else if (!fndecl_has_gimple_body_p (callee_fndecl)
+ 	       && !DECL_PURE_P (callee_fndecl))
+ 	unknown_side_effects = true;
+     }
+   else
+     unknown_side_effects = true;
+ 
+   /* Unknown return value.  */
+   if (!lhs_rid.null_p ())
+     set_to_new_unknown_value (lhs_rid, lhs_type, ctxt);
+ 
+   return unknown_side_effects;
+ }
+ 
+ /* Update this model for the CALL stmt, using CTXT to report any
+    diagnostics - the second half.
+ 
+    Updates to the region_model that should be made *after* sm-states
+    are updated are done here; other updates to the region_model are done
+    in region_model::on_call_pre.
+ 
+    If UNKNOWN_SIDE_EFFECTS is true, also call handle_unrecognized_call
+    to purge state.  */
+ 
+ void
+ region_model::on_call_post (const gcall *call,
+ 			    bool unknown_side_effects,
+ 			    region_model_context *ctxt)
+ {
+   /* Update for "free" here, after sm-handling.
+ 
+      If the ptr points to an underlying heap region, delete the region,
+      poisoning pointers to it and regions within it.
+ 
+      We delay this until after sm-state has been updated so that the
+      sm-handling can transition all of the various casts of the pointer
+      to a "freed" state *before* we delete the related region here.
+ 
+      This has to be done here so that the sm-handling can use the fact
+      that they point to the same region to establish that they are equal
+      (in region_model::eval_condition_without_cm), and thus transition
+      all pointers to the region to the "freed" state together, regardless
+      of casts.  */
+   if (tree callee_fndecl = get_fndecl_for_call (call, ctxt))
+     if (is_named_call_p (callee_fndecl, "free", call, 1))
+       {
+ 	tree ptr = gimple_call_arg (call, 0);
+ 	svalue_id ptr_sid = get_rvalue (ptr, ctxt);
+ 	svalue *ptr_sval = get_svalue (ptr_sid);
+ 	if (region_svalue *ptr_to_region_sval
+ 	    = ptr_sval->dyn_cast_region_svalue ())
+ 	  {
+ 	    /* If the ptr points to an underlying heap region, delete it,
+ 	       poisoning pointers.  */
+ 	    region_id pointee_rid = ptr_to_region_sval->get_pointee ();
+ 	    region_id heap_rid = get_root_region ()->ensure_heap_region (this);
+ 	    if (!pointee_rid.null_p ()
+ 		&& get_region (pointee_rid)->get_parent () == heap_rid)
+ 	      {
+ 		purge_stats stats;
+ 		delete_region_and_descendents (pointee_rid,
+ 					       POISON_KIND_FREED,
+ 					       &stats, ctxt->get_logger ());
+ 		purge_unused_svalues (&stats, ctxt);
+ 		validate ();
+ 		// TODO: do anything with stats?
+ 	      }
+ 	  }
+ 	return;
+       }
+ 
+   if (unknown_side_effects)
+     handle_unrecognized_call (call, ctxt);
+ }
+ 
+ /* Helper class for region_model::handle_unrecognized_call, for keeping
+    track of all regions that are reachable, and, of those, which are
+    mutable.  */
+ 
+ class reachable_regions
+ {
+ public:
+   reachable_regions (region_model *model)
+   : m_model (model), m_reachable_rids (), m_mutable_rids ()
+   {}
+ 
+   /* Lazily mark RID as being reachable, recursively adding regions
+      reachable from RID.  */
+   void add (region_id rid, bool is_mutable)
+   {
+     gcc_assert (!rid.null_p ());
+ 
+     unsigned idx = rid.as_int ();
+     /* Bail out if this region is already in the sets at the IS_MUTABLE
+        level of mutability.  */
+     if (!is_mutable && bitmap_bit_p (m_reachable_rids, idx))
+       return;
+     bitmap_set_bit (m_reachable_rids, idx);
+ 
+     if (is_mutable)
+       {
+ 	if (bitmap_bit_p (m_mutable_rids, idx))
+ 	  return;
+ 	else
+ 	  bitmap_set_bit (m_mutable_rids, idx);
+       }
+ 
+     /* If this region's value is a pointer, add the pointee.  */
+     region *reg = m_model->get_region (rid);
+     svalue_id sid = reg->get_value_direct ();
+     svalue *sval = m_model->get_svalue (sid);
+     if (sval)
+       if (region_svalue *ptr = sval->dyn_cast_region_svalue ())
+ 	{
+ 	  region_id pointee_rid = ptr->get_pointee ();
+ 	  /* Use const-ness of pointer type to affect mutability.  */
+ 	  bool ptr_is_mutable = true;
+ 	  if (ptr->get_type ()
+ 	      && TREE_CODE (ptr->get_type ()) == POINTER_TYPE
+ 	      && TYPE_READONLY (TREE_TYPE (ptr->get_type ())))
+ 	    ptr_is_mutable = false;
+ 	  add (pointee_rid, ptr_is_mutable);
+ 	}
+ 
+     /* Add descendents of this region.  */
+     region_id_set descendents (m_model);
+     m_model->get_descendents (rid, &descendents, region_id::null ());
+     for (unsigned i = 0; i < m_model->get_num_regions (); i++)
+       {
+ 	region_id iter_rid = region_id::from_int (i);
+ 	if (descendents.region_p (iter_rid))
+ 	  add (iter_rid, is_mutable);
+       }
+   }
+ 
+   bool mutable_p (region_id rid)
+   {
+     gcc_assert (!rid.null_p ());
+     return bitmap_bit_p (m_mutable_rids, rid.as_int ());
+   }
+ 
+ private:
+   region_model *m_model;
+ 
+   /* The region ids already seen.  This has to be an auto_bitmap rather than
+      an auto_sbitmap as new regions can be created within the model during
+      the traversal.  */
+   auto_bitmap m_reachable_rids;
+ 
+   /* The region_ids that can be changed (accessed via non-const pointers).  */
+   auto_bitmap m_mutable_rids;
+ };
+ 
+ /* Handle a call CALL to a function with unknown behavior.
+ 
+    Traverse the regions in this model, determining what regions are
+    reachable from pointer arguments to CALL and from global variables,
+    recursively.
+ 
+    Set all reachable regions to new unknown values and purge sm-state
+    from their values, and from values that point to them.  */
+ 
+ void
+ region_model::handle_unrecognized_call (const gcall *call,
+ 					region_model_context *ctxt)
+ {
+   tree fndecl = get_fndecl_for_call (call, ctxt);
+ 
+   reachable_regions reachable_regions (this);
+ 
+   /* Determine the reachable regions and their mutability.  */
+   {
+     /* Globals.  */
+     region_id globals_rid = get_globals_region_id ();
+     if (!globals_rid.null_p ())
+       reachable_regions.add (globals_rid, true);
+ 
+     /* Params that are pointers.  */
+     tree iter_param_types = NULL_TREE;
+     if (fndecl)
+       iter_param_types = TYPE_ARG_TYPES (TREE_TYPE (fndecl));
+     for (unsigned arg_idx = 0; arg_idx < gimple_call_num_args (call); arg_idx++)
+       {
+ 	/* Track expected param type, where available.  */
+ 	tree param_type = NULL_TREE;
+ 	if (iter_param_types)
+ 	  {
+ 	    param_type = TREE_VALUE (iter_param_types);
+ 	    gcc_assert (param_type);
+ 	    iter_param_types = TREE_CHAIN (iter_param_types);
+ 	  }
+ 
+ 	tree parm = gimple_call_arg (call, arg_idx);
+ 	svalue_id parm_sid = get_rvalue (parm, ctxt);
+ 	svalue *parm_sval = get_svalue (parm_sid);
+ 	if (parm_sval)
+ 	  if (region_svalue *parm_ptr = parm_sval->dyn_cast_region_svalue ())
+ 	    {
+ 	      region_id pointee_rid = parm_ptr->get_pointee ();
+ 	      bool is_mutable = true;
+ 	      if (param_type
+ 		  && TREE_CODE (param_type) == POINTER_TYPE
+ 		  &&  TYPE_READONLY (TREE_TYPE (param_type)))
+ 		is_mutable = false;
+ 	      reachable_regions.add (pointee_rid, is_mutable);
+ 	    }
+ 	// FIXME: what about compound parms that contain ptrs?
+       }
+   }
+ 
+   /* OK: we now have all reachable regions.
+      Set them all to new unknown values.  */
+   for (unsigned i = 0; i < get_num_regions (); i++)
+     {
+       region_id iter_rid = region_id::from_int (i);
+       if (reachable_regions.mutable_p (iter_rid))
+ 	{
+ 	  region *reg = get_region (iter_rid);
+ 
+ 	  /* Purge any sm-state for any underlying svalue.  */
+ 	  svalue_id curr_sid = reg->get_value_direct ();
+ 	  if (!curr_sid.null_p ())
+ 	    ctxt->on_unknown_change (curr_sid);
+ 
+ 	  set_to_new_unknown_value (iter_rid,
+ 				    reg->get_type (),
+ 				    ctxt);
+ 	}
+     }
+ 
+   /* Purge sm-state for any remaining svalues that point to regions that
+      were reachable.  This helps suppress leak false-positives.
+ 
+      For example, if we had a malloc call that was cast to a "foo *" type,
+      we could have a temporary void * for the result of malloc which has its
+      own svalue, not reachable from the function call, but for which the
+      "foo *" svalue was reachable.  If we don't purge it, the temporary will
+      be reported as a leak.  */
+   int i;
+   svalue *svalue;
+   FOR_EACH_VEC_ELT (m_svalues, i, svalue)
+     if (region_svalue *ptr = svalue->dyn_cast_region_svalue ())
+       {
+ 	region_id pointee_rid = ptr->get_pointee ();
+ 	if (reachable_regions.mutable_p (pointee_rid))
+ 	  ctxt->on_unknown_change (svalue_id::from_int (i));
+       }
+ 
+   validate ();
+ }
+ 
+ /* Update this model for the RETURN_STMT, using CTXT to report any
+    diagnostics.  */
+ 
+ void
+ region_model::on_return (const greturn *return_stmt, region_model_context *ctxt)
+ {
+   tree callee = get_current_function ()->decl;
+   tree lhs = DECL_RESULT (callee);
+   tree rhs = gimple_return_retval (return_stmt);
+ 
+   if (lhs && rhs)
+     copy_region (get_lvalue (lhs, ctxt), get_lvalue (rhs, ctxt), ctxt);
+ }
+ 
+ /* Update this model for a call and return of setjmp/sigsetjmp at CALL within
+    ENODE, using CTXT to report any diagnostics.
+ 
+    This is for the initial direct invocation of setjmp/sigsetjmp (which returns
+    0), as opposed to any second return due to longjmp/sigsetjmp.  */
+ 
+ void
+ region_model::on_setjmp (const gcall *call, const exploded_node *enode,
+ 			 region_model_context *ctxt)
+ {
+   region_id buf_rid = deref_rvalue (gimple_call_arg (call, 0), ctxt);
+   region *buf = get_region (buf_rid);
+ 
+   /* Create a setjmp_svalue for this call and store it in BUF_RID's region.  */
+   if (buf)
+     {
+       setjmp_record r (enode, call);
+       svalue *sval = new setjmp_svalue (r, buf->get_type ());
+       svalue_id new_sid = add_svalue (sval);
+       set_value (buf_rid, new_sid, ctxt);
+     }
+ 
+   /* Direct calls to setjmp return 0.  */
+   if (tree lhs = gimple_call_lhs (call))
+     {
+       tree zero = build_int_cst (TREE_TYPE (lhs), 0);
+       svalue_id new_sid = get_or_create_constant_svalue (zero);
+       region_id lhs_rid = get_lvalue (lhs, ctxt);
+       set_value (lhs_rid, new_sid, ctxt);
+     }
+ }
+ 
+ /* Update this region_model for rewinding from a "longjmp" at LONGJMP_CALL
+    to a "setjmp" at SETJMP_CALL where the final stack depth should be
+    SETJMP_STACK_DEPTH.  Purge any stack frames, potentially reporting on
+    leaks to CTXT.  */
+ 
+ void
+ region_model::on_longjmp (const gcall *longjmp_call, const gcall *setjmp_call,
+ 			  int setjmp_stack_depth,
+ 			  region_model_context *ctxt)
+ {
+   /* Evaluate the val, using the frame of the "longjmp".  */
+   tree fake_retval = gimple_call_arg (longjmp_call, 1);
+   svalue_id fake_retval_sid = get_rvalue (fake_retval, ctxt);
+ 
+   /* Pop any frames until we reach the stack depth of the function where
+      setjmp was called.  */
+   gcc_assert (get_stack_depth () >= setjmp_stack_depth);
+   while (get_stack_depth () > setjmp_stack_depth)
+     {
+       /* Don't purge unused svalues yet, as we're using fake_retval_sid.  */
+       pop_frame (region_id::null (), false, NULL, ctxt);
+     }
+ 
+   gcc_assert (get_stack_depth () == setjmp_stack_depth);
+ 
+   /* Assign to LHS of "setjmp" in new_state.  */
+   if (tree lhs = gimple_call_lhs (setjmp_call))
+     {
+       /* Passing 0 as the val to longjmp leads to setjmp returning 1.  */
+       tree t_zero = build_int_cst (TREE_TYPE (fake_retval), 0);
+       svalue_id zero_sid = get_or_create_constant_svalue (t_zero);
+       tristate eq_zero = eval_condition (fake_retval_sid, EQ_EXPR, zero_sid);
+       /* If we have 0, use 1.  */
+       if (eq_zero.is_true ())
+ 	{
+ 	  tree t_one = build_int_cst (TREE_TYPE (fake_retval), 1);
+ 	  svalue_id one_sid = get_or_create_constant_svalue (t_one);
+ 	  fake_retval_sid = one_sid;
+ 	}
+       else
+ 	{
+ 	  /* Otherwise note that the value is nonzero.  */
+ 	  m_constraints->add_constraint (fake_retval_sid, NE_EXPR, zero_sid);
+ 	}
+ 
+       region_id lhs_rid = get_lvalue (lhs, ctxt);
+       set_value (lhs_rid, fake_retval_sid, ctxt);
+     }
+ 
+   /* Now that we've assigned the fake_retval, we can purge the unused
+      svalues, which could detect leaks.  */
+   purge_unused_svalues (NULL, ctxt, NULL);
+   validate ();
+ }
+ 
+ /* Update this region_model for a phi stmt of the form
+      LHS = PHI <...RHS...>.
+    where RHS is for the appropriate edge.  */
+ 
+ void
+ region_model::handle_phi (const gphi *phi,
+ 			  tree lhs, tree rhs, bool is_back_edge,
+ 			  region_model_context *ctxt)
+ {
+   /* For now, don't bother tracking the .MEM SSA names.  */
+   if (tree var = SSA_NAME_VAR (lhs))
+     if (TREE_CODE (var) == VAR_DECL)
+       if (VAR_DECL_IS_VIRTUAL_OPERAND (var))
+ 	return;
+ 
+   svalue_id rhs_sid = get_rvalue (rhs, ctxt);
+ 
+   if (is_back_edge && get_svalue (rhs_sid)->get_kind () != SK_UNKNOWN)
+     {
+       /* If we have a back edge, we probably have a loop.
+ 	 Use an unknown value, to avoid effectively unrolling the
+ 	 loop.
+ 	 To terminate, we need to avoid generating a series of
+ 	 models with an unbounded monotonically increasing number of
+ 	 redundant unknown values; hence we need to purge svalues
+ 	 before inserting the state into the exploded graph, to
+ 	 collect unused svalues.  */
+       set_to_new_unknown_value (get_lvalue (lhs, ctxt), TREE_TYPE (lhs), ctxt);
+     }
+   else
+     set_value (get_lvalue (lhs, ctxt), rhs_sid, ctxt);
+ 
+   if (ctxt)
+     ctxt->on_phi (phi, rhs);
+ }
+ 
+ /* Implementation of region_model::get_lvalue; the latter adds type-checking.
+ 
+    Get the id of the region for PV within this region_model,
+    emitting any diagnostics to CTXT.  */
+ 
+ region_id
+ region_model::get_lvalue_1 (path_var pv, region_model_context *ctxt)
+ {
+   tree expr = pv.m_tree;
+ 
+   gcc_assert (expr);
+ 
+   switch (TREE_CODE (expr))
+     {
+     default:
+       return make_region_for_unexpected_tree_code (ctxt, expr,
+ 						   dump_location_t ());
+ 
+     case ARRAY_REF:
+       {
+ 	tree array = TREE_OPERAND (expr, 0);
+ 	tree index = TREE_OPERAND (expr, 1);
+ #if 0
+ 	// TODO: operands 2 and 3, if present:
+ 	gcc_assert (TREE_OPERAND (expr, 2) == NULL_TREE);
+ 	gcc_assert (TREE_OPERAND (expr, 3) == NULL_TREE);
+ #endif
+ 
+ 	region_id array_rid = get_lvalue (array, ctxt);
+ 	svalue_id index_sid = get_rvalue (index, ctxt);
+ 	region *base_array_reg = get_region (array_rid);
+ 	array_region *array_reg  = base_array_reg->dyn_cast_array_region ();
+ 	if (!array_reg)
+ 	  {
+ 	    /* Normally, array_rid ought to refer to an array_region, since
+ 	       array's type will be ARRAY_TYPE.  However, if we have an
+ 	       unexpected tree code for array, we could have a
+ 	       symbolic_region here.  If so, we're in error-handling. */
+ 	    gcc_assert (base_array_reg->get_type () == NULL_TREE);
+ 	    return make_region_for_unexpected_tree_code (ctxt, expr,
+ 							 dump_location_t ());
+ 	  }
+ 	return array_reg->get_element (this, array_rid, index_sid, ctxt);
+       }
+       break;
+ 
+     case BIT_FIELD_REF:
+       {
+ 	/* For now, create a view, as if a cast, ignoring the bit positions.  */
+ 	tree obj = TREE_OPERAND (expr, 0);
+ 	return get_or_create_view (get_lvalue (obj, ctxt), TREE_TYPE (expr),
+ 				   ctxt);
+       };
+       break;
+ 
+     case MEM_REF:
+       {
+ 	tree ptr = TREE_OPERAND (expr, 0);
+ 	tree offset = TREE_OPERAND (expr, 1);
+ 	svalue_id ptr_sid = get_rvalue (ptr, ctxt);
+ 	svalue_id offset_sid = get_rvalue (offset, ctxt);
+ 	return get_or_create_mem_ref (TREE_TYPE (expr), ptr_sid,
+ 				      offset_sid, ctxt);
+       }
+       break;
+ 
+     case VAR_DECL:
+       /* Handle globals.  */
+       if (is_global_var (expr))
+ 	{
+ 	  region_id globals_rid
+ 	    = get_root_region ()->ensure_globals_region (this);
+ 	  map_region *globals = get_region<map_region> (globals_rid);
+ 	  region_id var_rid = globals->get_or_create (this, globals_rid, expr,
+ 						      TREE_TYPE (expr), ctxt);
+ 	  return var_rid;
+ 	}
+ 
+       /* Fall through.  */
+ 
+     case SSA_NAME:
+     case PARM_DECL:
+     case RESULT_DECL:
+       {
+ 	gcc_assert (TREE_CODE (expr) == SSA_NAME
+ 		    || TREE_CODE (expr) == PARM_DECL
+ 		    || TREE_CODE (expr) == VAR_DECL
+ 		    || TREE_CODE (expr) == RESULT_DECL);
+ 
+ 	int stack_depth = pv.m_stack_depth;
+ 	stack_region *stack = get_root_region ()->get_stack_region (this);
+ 	gcc_assert (stack);
+ 	region_id frame_rid = stack->get_frame_rid (stack_depth);
+ 	frame_region *frame = get_region <frame_region> (frame_rid);
+ 	gcc_assert (frame);
+ 	region_id child_rid = frame->get_or_create (this, frame_rid, expr,
+ 						    TREE_TYPE (expr), ctxt);
+ 	return child_rid;
+       }
+ 
+     case COMPONENT_REF:
+       {
+ 	/* obj.field  */
+ 	tree obj = TREE_OPERAND (expr, 0);
+ 	tree field = TREE_OPERAND (expr, 1);
+ 	tree obj_type = TREE_TYPE (obj);
+ 	if (TREE_CODE (obj_type) != RECORD_TYPE
+ 	    && TREE_CODE (obj_type) != UNION_TYPE)
+ 	  return make_region_for_unexpected_tree_code (ctxt, obj_type,
+ 						       dump_location_t ());
+ 	region_id obj_rid = get_lvalue (obj, ctxt);
+ 	region_id struct_or_union_rid
+ 	  = get_or_create_view (obj_rid, TREE_TYPE (obj), ctxt);
+ 	return get_field_region (struct_or_union_rid, field, ctxt);
+       }
+       break;
+ 
+     case CONST_DECL:
+       {
+ 	tree cst_type = TREE_TYPE (expr);
+ 	region_id cst_rid = add_region_for_type (m_root_rid, cst_type, ctxt);
+ 	if (tree value = DECL_INITIAL (expr))
+ 	  {
+ 	    svalue_id sid = get_rvalue (value, ctxt);
+ 	    get_region (cst_rid)->set_value (*this, cst_rid, sid, ctxt);
+ 	  }
+ 	return cst_rid;
+       }
+       break;
+ 
+     case STRING_CST:
+       {
+ 	tree cst_type = TREE_TYPE (expr);
+ 	array_region *cst_region = new array_region (m_root_rid, cst_type);
+ 	region_id cst_rid = add_region (cst_region);
+ 	svalue_id cst_sid = get_or_create_constant_svalue (expr);
+ 	cst_region->set_value (*this, cst_rid, cst_sid, ctxt);
+ 	return cst_rid;
+       }
+       break;
+ 
+     case NOP_EXPR:
+     case VIEW_CONVERT_EXPR:
+       {
+ 	tree obj = TREE_OPERAND (expr, 0);
+ 	return get_or_create_view (get_lvalue (obj, ctxt), TREE_TYPE (expr),
+ 				   ctxt);
+       };
+       break;
+     }
+ }
+ 
+ /* If we see a tree code we don't know how to handle, rather than
+    ICE or generate bogus results, create a dummy region, and notify
+    CTXT so that it can mark the new state as being not properly
+    modelled.  The exploded graph can then stop exploring that path,
+    since any diagnostics we might issue will have questionable
+    validity.  */
+ 
+ region_id
+ region_model::make_region_for_unexpected_tree_code (region_model_context *ctxt,
+ 						    tree t,
+ 						    const dump_location_t &loc)
+ {
+   gcc_assert (ctxt);
+   region_id new_rid
+     = add_region (new symbolic_region (m_root_rid, NULL_TREE, false));
+   ctxt->on_unexpected_tree_code (t, loc);
+   return new_rid;
+ }
+ 
+ /* Assert that SRC_TYPE can be converted to DST_TYPE as a no-op.  */
+ 
+ static void
+ assert_compat_types (tree src_type, tree dst_type)
+ {
+   if (src_type && dst_type && !VOID_TYPE_P (dst_type))
+     gcc_checking_assert (useless_type_conversion_p (src_type, dst_type));
+ }
+ 
+ /* Get the id of the region for PV within this region_model,
+    emitting any diagnostics to CTXT.  */
+ 
+ region_id
+ region_model::get_lvalue (path_var pv, region_model_context *ctxt)
+ {
+   if (pv.m_tree == NULL_TREE)
+     return region_id::null ();
+ 
+   region_id result_rid = get_lvalue_1 (pv, ctxt);
+   assert_compat_types (get_region (result_rid)->get_type (),
+ 		       TREE_TYPE (pv.m_tree));
+   return result_rid;
+ }
+ 
+ /* Get the region_id for EXPR within this region_model (assuming the most
+    recent stack frame if it's a local).  */
+ 
+ region_id
+ region_model::get_lvalue (tree expr, region_model_context *ctxt)
+ {
+   return get_lvalue (path_var (expr, get_stack_depth () - 1), ctxt);
+ }
+ 
+ /* Implementation of region_model::get_rvalue; the latter adds type-checking.
+ 
+    Get the value of PV within this region_model,
+    emitting any diagnostics to CTXT.  */
+ 
+ svalue_id
+ region_model::get_rvalue_1 (path_var pv, region_model_context *ctxt)
+ {
+   gcc_assert (pv.m_tree);
+ 
+   switch (TREE_CODE (pv.m_tree))
+     {
+     default:
+       {
+ 	svalue *unknown_sval = new unknown_svalue (TREE_TYPE (pv.m_tree));
+ 	return add_svalue (unknown_sval);
+       }
+       break;
+ 
+     case ADDR_EXPR:
+       {
+ 	/* "&EXPR".  */
+ 	tree expr = pv.m_tree;
+ 	tree op0 = TREE_OPERAND (expr, 0);
+ 	if (TREE_CODE (op0) == FUNCTION_DECL)
+ 	  return get_svalue_for_fndecl (TREE_TYPE (expr), op0, ctxt);
+ 	else if (TREE_CODE (op0) == LABEL_DECL)
+ 	  return get_svalue_for_label (TREE_TYPE (expr), op0, ctxt);
+ 	region_id expr_rid = get_lvalue (op0, ctxt);
+ 	return get_or_create_ptr_svalue (TREE_TYPE (expr), expr_rid);
+       }
+       break;
+ 
+     case ARRAY_REF:
+       {
+ 	region_id element_rid = get_lvalue (pv, ctxt);
+ 	return get_region (element_rid)->get_value (*this, true, ctxt);
+       }
+ 
+     case INTEGER_CST:
+     case REAL_CST:
+     case STRING_CST:
+       return get_or_create_constant_svalue (pv.m_tree);
+ 
+     case COMPONENT_REF:
+     case MEM_REF:
+     case SSA_NAME:
+     case VAR_DECL:
+     case PARM_DECL:
+     case RESULT_DECL:
+       {
+ 	region_id var_rid = get_lvalue (pv, ctxt);
+ 	return get_region (var_rid)->get_value (*this, true, ctxt);
+       }
+     }
+ }
+ 
+ /* Get the value of PV within this region_model,
+    emitting any diagnostics to CTXT.  */
+ 
+ svalue_id
+ region_model::get_rvalue (path_var pv, region_model_context *ctxt)
+ {
+   if (pv.m_tree == NULL_TREE)
+     return svalue_id::null ();
+   svalue_id result_sid = get_rvalue_1 (pv, ctxt);
+ 
+   assert_compat_types (get_svalue (result_sid)->get_type (),
+ 		       TREE_TYPE (pv.m_tree));
+ 
+   return result_sid;
+ }
+ 
+ /* Get the value of EXPR within this region_model (assuming the most
+    recent stack frame if it's a local).  */
+ 
+ svalue_id
+ region_model::get_rvalue (tree expr, region_model_context *ctxt)
+ {
+   return get_rvalue (path_var (expr, get_stack_depth () - 1), ctxt);
+ }
+ 
+ /* Return an svalue_id for a pointer to RID of type PTR_TYPE, reusing
+    existing pointer values if one is available.  */
+ 
+ svalue_id
+ region_model::get_or_create_ptr_svalue (tree ptr_type, region_id rid)
+ {
+   /* Reuse existing region_svalue, if one of the right type is
+      available.  */
+   /* In theory we could stash a svalue_id in "region", but differing
+      pointer types muddles things.
+      For now, just do a linear search through all existing svalues.  */
+   int i;
+   svalue *svalue;
+   FOR_EACH_VEC_ELT (m_svalues, i, svalue)
+     if (region_svalue *ptr_svalue = svalue->dyn_cast_region_svalue ())
+       if (ptr_svalue->get_pointee () == rid
+ 	  && ptr_svalue->get_type () == ptr_type)
+ 	return svalue_id::from_int (i);
+ 
+   return add_svalue (new region_svalue (ptr_type, rid));
+ }
+ 
+ /* Return an svalue_id for a constant_svalue for CST_EXPR,
+    creating the constant_svalue if necessary.
+    The constant_svalue instances are reused, based on pointer equality
+    of trees  */
+ 
+ svalue_id
+ region_model::get_or_create_constant_svalue (tree cst_expr)
+ {
+   gcc_assert (cst_expr);
+ 
+   /* Reuse one if it already exists.  */
+   // TODO: maybe store a map, rather than do linear search?
+   int i;
+   svalue *svalue;
+   FOR_EACH_VEC_ELT (m_svalues, i, svalue)
+     if (svalue->maybe_get_constant () == cst_expr)
+       return svalue_id::from_int (i);
+ 
+   svalue_id cst_sid = add_svalue (new constant_svalue (cst_expr));
+   return cst_sid;
+ }
+ 
+ /* Return an svalue_id for a region_svalue for FNDECL,
+    creating the function_region if necessary.  */
+ 
+ svalue_id
+ region_model::get_svalue_for_fndecl (tree ptr_type, tree fndecl,
+ 				     region_model_context *ctxt)
+ {
+   gcc_assert (TREE_CODE (fndecl) == FUNCTION_DECL);
+   region_id function_rid = get_region_for_fndecl (fndecl, ctxt);
+   return get_or_create_ptr_svalue (ptr_type, function_rid);
+ }
+ 
+ /* Return a region_id for a function_region for FNDECL,
+    creating it if necessary.  */
+ 
+ region_id
+ region_model::get_region_for_fndecl (tree fndecl,
+ 				     region_model_context *ctxt)
+ {
+   gcc_assert (TREE_CODE (fndecl) == FUNCTION_DECL);
+ 
+   region_id code_rid = get_root_region ()->ensure_code_region (this);
+   code_region *code = get_root_region ()->get_code_region (this);
+ 
+   return code->get_or_create (this, code_rid, fndecl, TREE_TYPE (fndecl),
+ 			      ctxt);
+ }
+ 
+ /* Return an svalue_id for a region_svalue for LABEL,
+    creating the label_region if necessary.  */
+ 
+ svalue_id
+ region_model::get_svalue_for_label (tree ptr_type, tree label,
+ 				    region_model_context *ctxt)
+ {
+   gcc_assert (TREE_CODE (label) == LABEL_DECL);
+   region_id label_rid = get_region_for_label (label, ctxt);
+   return get_or_create_ptr_svalue (ptr_type, label_rid);
+ }
+ 
+ /* Return a region_id for a label_region for LABEL,
+    creating it if necessary.  */
+ 
+ region_id
+ region_model::get_region_for_label (tree label,
+ 				    region_model_context *ctxt)
+ {
+   gcc_assert (TREE_CODE (label) == LABEL_DECL);
+ 
+   tree fndecl = DECL_CONTEXT (label);
+   gcc_assert (fndecl && TREE_CODE (fndecl) == FUNCTION_DECL);
+ 
+   region_id func_rid = get_region_for_fndecl (fndecl, ctxt);
+   function_region *func_reg = get_region <function_region> (func_rid);
+   return func_reg->get_or_create (this, func_rid, label, TREE_TYPE (label),
+ 				  ctxt);
+ }
+ 
+ /* Build a cast of SRC_EXPR to DST_TYPE, or return NULL_TREE.
+ 
+    Adapted from gcc::jit::playback::context::build_cast, which in turn is
+    adapted from
+      - c/c-typeck.c:build_c_cast
+      - c/c-convert.c: convert
+      - convert.h
+    Only some kinds of cast are currently supported here.  */
+ 
+ static tree
+ build_cast (tree dst_type, tree src_expr)
+ {
+   tree result = targetm.convert_to_type (dst_type, src_expr);
+   if (result)
+     return result;
+   enum tree_code dst_code = TREE_CODE (dst_type);
+   switch (dst_code)
+     {
+     case INTEGER_TYPE:
+     case ENUMERAL_TYPE:
+       result = convert_to_integer (dst_type, src_expr);
+       goto maybe_fold;
+ 
+     case BOOLEAN_TYPE:
+       /* Compare with c_objc_common_truthvalue_conversion and
+ 	 c_common_truthvalue_conversion. */
+       /* For now, convert to: (src_expr != 0)  */
+       result = build2 (NE_EXPR, dst_type,
+ 		       src_expr,
+ 		       build_int_cst (TREE_TYPE (src_expr), 0));
+       goto maybe_fold;
+ 
+     case REAL_TYPE:
+       result = convert_to_real (dst_type, src_expr);
+       goto maybe_fold;
+ 
+     case POINTER_TYPE:
+       result = build1 (NOP_EXPR, dst_type, src_expr);
+       goto maybe_fold;
+ 
+     default:
+       return NULL_TREE;
+ 
+     maybe_fold:
+       if (TREE_CODE (result) != C_MAYBE_CONST_EXPR)
+ 	result = fold (result);
+       return result;
+     }
+ }
+ 
+ /* If the type of SID's underlying value is DST_TYPE, return SID.
+    Otherwise, attempt to create (or reuse) an svalue representing an access
+    of SID as a DST_TYPE and return that value's svalue_id.  */
+ 
+ svalue_id
+ region_model::maybe_cast_1 (tree dst_type, svalue_id sid)
+ {
+   svalue *sval = get_svalue (sid);
+   tree src_type = sval->get_type ();
+   if (src_type == dst_type)
+     return sid;
+ 
+   if (POINTER_TYPE_P (dst_type)
+       || POINTER_TYPE_P (src_type))
+     {
+       /* Pointer to region.  */
+       if (region_svalue *ptr_sval = sval->dyn_cast_region_svalue ())
+ 	return get_or_create_ptr_svalue (dst_type, ptr_sval->get_pointee ());
+ 
+       /* Unknown pointer?   Get or create a new unknown pointer of the
+ 	 correct type, preserving the equality between the pointers.  */
+       if (sval->dyn_cast_unknown_svalue ())
+ 	{
+ 	  equiv_class &ec = m_constraints->get_equiv_class (sid);
+ 
+ 	  /* Look for an existing pointer of the correct type within the EC.  */
+ 	  int i;
+ 	  svalue_id *equiv_sid;
+ 	  FOR_EACH_VEC_ELT (ec.m_vars, i, equiv_sid)
+ 	    {
+ 	      svalue *equiv_val = get_svalue (*equiv_sid);
+ 	      if (equiv_val->get_type () == dst_type)
+ 		return *equiv_sid;
+ 	    }
+ 
+ 	  /* Otherwise, create a new unknown pointer of the correct type.  */
+ 	  svalue *unknown_sval = new unknown_svalue (dst_type);
+ 	  svalue_id new_ptr_sid = add_svalue (unknown_sval);
+ 	  m_constraints->add_constraint (sid, EQ_EXPR, new_ptr_sid);
+ 	  return new_ptr_sid;
+ 	}
+     }
+ 
+   /* Attempt to cast constants.  */
+   if (tree src_cst = sval->maybe_get_constant ())
+     {
+       if (tree dst = build_cast (dst_type, src_cst))
+ 	if (CONSTANT_CLASS_P (dst))
+ 	  return get_or_create_constant_svalue (dst);
+     }
+ 
+   /* Otherwise, return a new unknown value.  */
+   svalue *unknown_sval = new unknown_svalue (dst_type);
+   return add_svalue (unknown_sval);
+ }
+ 
+ /* If the type of SID's underlying value is DST_TYPE, return SID.
+    Otherwise, attempt to create (or reuse) an svalue representing an access
+    of SID as a DST_TYPE and return that value's svalue_id.
+ 
+    If the result != SID, then call CTXT's on_cast vfunc (if CTXT is non-NULL),
+    so that sm-state can be propagated from SID to the result.  */
+ 
+ svalue_id
+ region_model::maybe_cast (tree dst_type, svalue_id sid,
+ 			  region_model_context *ctxt)
+ {
+   svalue_id result = maybe_cast_1 (dst_type, sid);
+   if (result != sid)
+     if (ctxt)
+       {
+ 	/* Notify ctxt about a cast, so any sm-state can be copied.  */
+ 	ctxt->on_cast (sid, result);
+       }
+   return result;
+ }
+ 
+ /* Ensure that the region for OBJ_RID has a child region for FIELD;
+    return the child region's region_id.  */
+ 
+ region_id
+ region_model::get_field_region (region_id struct_or_union_rid, tree field,
+ 				region_model_context *ctxt)
+ {
+   struct_or_union_region *sou_reg
+     = get_region<struct_or_union_region> (struct_or_union_rid);
+ 
+   /* Inherit constness from parent type.  */
+   const int qual_mask = TYPE_QUAL_CONST;
+   int sou_quals = TYPE_QUALS (sou_reg->get_type ()) & qual_mask;
+   tree field_type = TREE_TYPE (field);
+   tree field_type_with_quals = build_qualified_type (field_type, sou_quals);
+ 
+   // TODO: maybe convert to a vfunc?
+   if (sou_reg->get_kind () == RK_UNION)
+     {
+       /* Union.
+ 	 Get a view of the union as a whole, with the type of the field.  */
+       region_id view_rid
+ 	= get_or_create_view (struct_or_union_rid, field_type_with_quals, ctxt);
+       return view_rid;
+     }
+   else
+     {
+       /* Struct.  */
+       region_id child_rid
+ 	= sou_reg->get_or_create (this, struct_or_union_rid, field,
+ 				  field_type_with_quals, ctxt);
+       return child_rid;
+     }
+ }
+ 
+ /* Get a region_id for referencing PTR_SID, creating a region if need be, and
+    potentially generating warnings via CTXT.  */
+ 
+ region_id
+ region_model::deref_rvalue (svalue_id ptr_sid, region_model_context *ctxt)
+ {
+   gcc_assert (!ptr_sid.null_p ());
+   svalue *ptr_svalue = get_svalue (ptr_sid);
+   gcc_assert (ptr_svalue);
+ 
+   switch (ptr_svalue->get_kind ())
+     {
+     case SK_REGION:
+       {
+ 	region_svalue *region_sval = as_a <region_svalue *> (ptr_svalue);
+ 	return region_sval->get_pointee ();
+       }
+ 
+     case SK_CONSTANT:
+       goto create_symbolic_region;
+ 
+     case SK_POISONED:
+       {
+ 	if (ctxt)
+ 	  if (tree ptr = get_representative_tree (ptr_sid))
+ 	    {
+ 	      poisoned_svalue *poisoned_sval
+ 		= as_a <poisoned_svalue *> (ptr_svalue);
+ 	      enum poison_kind pkind = poisoned_sval->get_poison_kind ();
+ 	      ctxt->warn (new poisoned_value_diagnostic (ptr, pkind));
+ 	    }
+ 	goto create_symbolic_region;
+       }
+ 
+     case SK_UNKNOWN:
+       {
+       create_symbolic_region:
+ 	/* We need a symbolic_region to represent this unknown region.
+ 	   We don't know if it on the heap, stack, or a global,
+ 	   so use the root region as parent.  */
+ 	region_id new_rid
+ 	  = add_region (new symbolic_region (m_root_rid, NULL_TREE, false));
+ 
+ 	/* We need to write the region back into the pointer,
+ 	   or we'll get a new, different region each time.
+ 	   We do this by changing the meaning of ptr_sid, replacing
+ 	   the unknown value with the ptr to the new region.
+ 	   We replace the meaning of the ID rather than simply writing
+ 	   to PTR's lvalue since there could be several places sharing
+ 	   the same unknown ptr value.  */
+ 	svalue *ptr_val
+ 	  = new region_svalue (ptr_svalue->get_type (), new_rid);
+ 	replace_svalue (ptr_sid, ptr_val);
+ 
+ 	return new_rid;
+       }
+ 
+     case SK_SETJMP:
+       goto create_symbolic_region;
+     }
+ 
+   gcc_unreachable ();
+ }
+ 
+ /* Get a region_id for referencing PTR, creating a region if need be, and
+    potentially generating warnings via CTXT.  */
+ 
+ region_id
+ region_model::deref_rvalue (tree ptr, region_model_context *ctxt)
+ {
+   svalue_id ptr_sid = get_rvalue (ptr, ctxt);
+   return deref_rvalue (ptr_sid, ctxt);
+ }
+ 
+ /* Set the value of the region given by LHS_RID to the value given
+    by RHS_SID.  */
+ 
+ void
+ region_model::set_value (region_id lhs_rid, svalue_id rhs_sid,
+ 			 region_model_context *ctxt)
+ {
+   gcc_assert (!lhs_rid.null_p ());
+   gcc_assert (!rhs_sid.null_p ());
+   get_region (lhs_rid)->set_value (*this, lhs_rid, rhs_sid, ctxt);
+ }
+ 
+ /* Set the value of the region given by LHS to the value given
+    by RHS.  */
+ 
+ void
+ region_model::set_value (tree lhs, tree rhs, region_model_context *ctxt)
+ {
+   region_id lhs_rid = get_lvalue (lhs, ctxt);
+   svalue_id rhs_sid = get_rvalue (rhs, ctxt);
+   gcc_assert (!lhs_rid.null_p ());
+   gcc_assert (!rhs_sid.null_p ());
+   set_value (lhs_rid, rhs_sid, ctxt);
+ }
+ 
+ /* Determine what is known about the condition "LHS_SID OP RHS_SID" within
+    this model.  */
+ 
+ tristate
+ region_model::eval_condition (svalue_id lhs_sid,
+ 			      enum tree_code op,
+ 			      svalue_id rhs_sid) const
+ {
+   svalue *lhs = get_svalue (lhs_sid);
+   svalue *rhs = get_svalue (rhs_sid);
+ 
+   /* For now, make no attempt to capture constraints on floating-point
+      values.  */
+   if ((lhs->get_type () && FLOAT_TYPE_P (lhs->get_type ()))
+       || (rhs->get_type () && FLOAT_TYPE_P (rhs->get_type ())))
+     return tristate::unknown ();
+ 
+   tristate ts = eval_condition_without_cm (lhs_sid, op, rhs_sid);
+ 
+   if (ts.is_known ())
+     return ts;
+ 
+   /* Otherwise, try constraints.  */
+   return m_constraints->eval_condition (lhs_sid, op, rhs_sid);
+ }
+ 
+ /* Determine what is known about the condition "LHS_SID OP RHS_SID" within
+    this model, without resorting to the constraint_manager.
+ 
+    This is exposed so that impl_region_model_context::on_state_leak can
+    check for equality part-way through region_model::purge_unused_svalues
+    without risking creating new ECs.  */
+ 
+ tristate
+ region_model::eval_condition_without_cm (svalue_id lhs_sid,
+ 					 enum tree_code op,
+ 					 svalue_id rhs_sid) const
+ {
+   svalue *lhs = get_svalue (lhs_sid);
+   svalue *rhs = get_svalue (rhs_sid);
+   gcc_assert (lhs);
+   gcc_assert (rhs);
+ 
+   /* See what we know based on the values.  */
+   if (lhs && rhs)
+     {
+       /* For now, make no attempt to capture constraints on floating-point
+ 	 values.  */
+       if ((lhs->get_type () && FLOAT_TYPE_P (lhs->get_type ()))
+ 	  || (rhs->get_type () && FLOAT_TYPE_P (rhs->get_type ())))
+ 	return tristate::unknown ();
+ 
+       if (lhs == rhs)
+ 	{
+ 	  /* If we have the same svalue, then we have equality
+ 	     (apart from NaN-handling).
+ 	     TODO: should this definitely be the case for poisoned values?  */
+ 	  switch (op)
+ 	    {
+ 	    case EQ_EXPR:
+ 	    case GE_EXPR:
+ 	    case LE_EXPR:
+ 	      return tristate::TS_TRUE;
+ 
+ 	    case NE_EXPR:
+ 	    case GT_EXPR:
+ 	    case LT_EXPR:
+ 	      return tristate::TS_FALSE;
+ 
+ 	    default:
+ 	      /* For other ops, use the logic below.  */
+ 	      break;
+ 	    }
+ 	}
+ 
+       /* If we have a pair of region_svalues, compare them.  */
+       if (region_svalue *lhs_ptr = lhs->dyn_cast_region_svalue ())
+ 	if (region_svalue *rhs_ptr = rhs->dyn_cast_region_svalue ())
+ 	  {
+ 	    tristate res = region_svalue::eval_condition (lhs_ptr, op, rhs_ptr);
+ 	    if (res.is_known ())
+ 	      return res;
+ 	    /* Otherwise, only known through constraints.  */
+ 	  }
+ 
+       /* If we have a pair of constants, compare them.  */
+       if (constant_svalue *cst_lhs = lhs->dyn_cast_constant_svalue ())
+ 	if (constant_svalue *cst_rhs = rhs->dyn_cast_constant_svalue ())
+ 	  return constant_svalue::eval_condition (cst_lhs, op, cst_rhs);
+ 
+       /* Handle comparison of a region_svalue against zero.  */
+       if (region_svalue *ptr = lhs->dyn_cast_region_svalue ())
+ 	if (constant_svalue *cst_rhs = rhs->dyn_cast_constant_svalue ())
+ 	  if (zerop (cst_rhs->get_constant ()))
+ 	    {
+ 	      /* A region_svalue is a non-NULL pointer, except in certain
+ 		 special cases (see the comment for region::non_null_p.  */
+ 	      region *pointee = get_region (ptr->get_pointee ());
+ 	      if (pointee->non_null_p (*this))
+ 		{
+ 		  switch (op)
+ 		    {
+ 		    default:
+ 		      gcc_unreachable ();
+ 
+ 		    case EQ_EXPR:
+ 		    case GE_EXPR:
+ 		    case LE_EXPR:
+ 		      return tristate::TS_FALSE;
+ 
+ 		    case NE_EXPR:
+ 		    case GT_EXPR:
+ 		    case LT_EXPR:
+ 		      return tristate::TS_TRUE;
+ 		    }
+ 		}
+ 	    }
+     }
+ 
+   return tristate::TS_UNKNOWN;
+ }
+ 
+ /* Attempt to add the constraint "LHS OP RHS" to this region_model.
+    If it is consistent with existing constraints, add it, and return true.
+    Return false if it contradicts existing constraints.
+    Use CTXT for reporting any diagnostics associated with the accesses.  */
+ 
+ bool
+ region_model::add_constraint (tree lhs, enum tree_code op, tree rhs,
+ 			      region_model_context *ctxt)
+ {
+   /* For now, make no attempt to capture constraints on floating-point
+      values.  */
+   if (FLOAT_TYPE_P (TREE_TYPE (lhs)) || FLOAT_TYPE_P (TREE_TYPE (rhs)))
+     return true;
+ 
+   svalue_id lhs_sid = get_rvalue (lhs, ctxt);
+   svalue_id rhs_sid = get_rvalue (rhs, ctxt);
+ 
+   tristate t_cond = eval_condition (lhs_sid, op, rhs_sid);
+ 
+   /* If we already have the condition, do nothing.  */
+   if (t_cond.is_true ())
+     return true;
+ 
+   /* Reject a constraint that would contradict existing knowledge, as
+      unsatisfiable.  */
+   if (t_cond.is_false ())
+     return false;
+ 
+   /* Store the constraint.  */
+   m_constraints->add_constraint (lhs_sid, op, rhs_sid);
+ 
+   add_any_constraints_from_ssa_def_stmt (lhs, op, rhs, ctxt);
+ 
+   /* If we now know a symbolic_region is non-NULL, clear its
+      m_possibly_null.  */
+   if (zerop (rhs) && op == NE_EXPR)
+     if (region_svalue *ptr = get_svalue (lhs_sid)->dyn_cast_region_svalue ())
+       {
+ 	region *pointee = get_region (ptr->get_pointee ());
+ 	if (symbolic_region *sym_reg = pointee->dyn_cast_symbolic_region ())
+ 	  sym_reg->m_possibly_null = false;
+       }
+ 
+   /* Notify the context, if any.  This exists so that the state machines
+      in a program_state can be notified about the condition, and so can
+      set sm-state for e.g. unchecked->checked, both for cfg-edges, and
+      when synthesizing constraints as above.  */
+   if (ctxt)
+     ctxt->on_condition (lhs, op, rhs);
+ 
+   return true;
+ }
+ 
+ /* Subroutine of region_model::add_constraint for handling optimized
+    && and || conditionals.
+ 
+    If we have an SSA_NAME for a boolean compared against 0,
+    look at anything implied by the def stmt and call add_constraint
+    for it (which could recurse).
+ 
+    For example, if we have
+       _1 = p_6 == 0B;
+       _2 = p_8 == 0B
+       _3 = _1 | _2
+     and add the constraint
+       (_3 == 0),
+     then the def stmt for _3 implies that _1 and _2 are both false,
+     and hence we can add the constraints:
+       p_6 != 0B
+       p_8 != 0B.  */
+ 
+ void
+ region_model::add_any_constraints_from_ssa_def_stmt (tree lhs,
+ 						     enum tree_code op,
+ 						     tree rhs,
+ 						     region_model_context *ctxt)
+ {
+   if (TREE_CODE (lhs) != SSA_NAME)
+     return;
+ 
+   if (!zerop (rhs))
+     return;
+ 
+   if (op != NE_EXPR && op != EQ_EXPR)
+     return;
+ 
+   gimple *def_stmt = SSA_NAME_DEF_STMT (lhs);
+   if (const gassign *assign = dyn_cast<gassign *> (def_stmt))
+     add_any_constraints_from_gassign (op, rhs, assign, ctxt);
+   else if (gcall *call = dyn_cast<gcall *> (def_stmt))
+     add_any_constraints_from_gcall (op, rhs, call, ctxt);
+ }
+ 
+ /* Add any constraints for an SSA_NAME defined by ASSIGN
+    where the result OP RHS.  */
+ 
+ void
+ region_model::add_any_constraints_from_gassign (enum tree_code op,
+ 						tree rhs,
+ 						const gassign *assign,
+ 						region_model_context *ctxt)
+ {
+   /* We have either
+      - "LHS != false" (i.e. LHS is true), or
+      - "LHS == false" (i.e. LHS is false).  */
+   bool is_true = op == NE_EXPR;
+ 
+   enum tree_code rhs_code = gimple_assign_rhs_code (assign);
+ 
+   switch (rhs_code)
+     {
+     default:
+       break;
+ 
+     case NOP_EXPR:
+       {
+ 	add_constraint (gimple_assign_rhs1 (assign), op, rhs, ctxt);
+       }
+       break;
+ 
+     case BIT_AND_EXPR:
+       {
+ 	if (is_true)
+ 	  {
+ 	    /* ...and "LHS == (rhs1 & rhs2) i.e. "(rhs1 & rhs2)" is true
+ 	       then both rhs1 and rhs2 must be true.  */
+ 	    tree rhs1 = gimple_assign_rhs1 (assign);
+ 	    tree rhs2 = gimple_assign_rhs2 (assign);
+ 	    add_constraint (rhs1, NE_EXPR, boolean_false_node, ctxt);
+ 	    add_constraint (rhs2, NE_EXPR, boolean_false_node, ctxt);
+ 	  }
+       }
+       break;
+ 
+     case BIT_IOR_EXPR:
+       {
+ 	if (!is_true)
+ 	  {
+ 	    /* ...and "LHS == (rhs1 | rhs2)
+ 	       i.e. "(rhs1 | rhs2)" is false
+ 	       then both rhs1 and rhs2 must be false.  */
+ 	    tree rhs1 = gimple_assign_rhs1 (assign);
+ 	    tree rhs2 = gimple_assign_rhs2 (assign);
+ 	    add_constraint (rhs1, EQ_EXPR, boolean_false_node, ctxt);
+ 	    add_constraint (rhs2, EQ_EXPR, boolean_false_node, ctxt);
+ 	  }
+       }
+       break;
+ 
+     case EQ_EXPR:
+     case NE_EXPR:
+       {
+ 	/* ...and "LHS == (rhs1 OP rhs2)"
+ 	   then rhs1 OP rhs2 must have the same logical value as LHS.  */
+ 	tree rhs1 = gimple_assign_rhs1 (assign);
+ 	tree rhs2 = gimple_assign_rhs2 (assign);
+ 	if (!is_true)
+ 	  rhs_code
+ 	    = invert_tree_comparison (rhs_code, false /* honor_nans */);
+ 	add_constraint (rhs1, rhs_code, rhs2, ctxt);
+       }
+       break;
+     }
+ }
+ 
+ /* Add any constraints for an SSA_NAME defined by CALL
+    where the result OP RHS.  */
+ 
+ void
+ region_model::add_any_constraints_from_gcall (enum tree_code op,
+ 					      tree rhs,
+ 					      const gcall *call,
+ 					      region_model_context *ctxt)
+ {
+   if (gimple_call_builtin_p (call, BUILT_IN_EXPECT)
+       || gimple_call_builtin_p (call, BUILT_IN_EXPECT_WITH_PROBABILITY)
+       || gimple_call_internal_p (call, IFN_BUILTIN_EXPECT))
+     {
+       /* __builtin_expect's return value is its initial argument.  */
+       add_constraint (gimple_call_arg (call, 0), op, rhs, ctxt);
+     }
+ }
+ 
+ /* Determine what is known about the condition "LHS OP RHS" within
+    this model.
+    Use CTXT for reporting any diagnostics associated with the accesses.  */
+ 
+ tristate
+ region_model::eval_condition (tree lhs,
+ 			      enum tree_code op,
+ 			      tree rhs,
+ 			      region_model_context *ctxt)
+ {
+   /* For now, make no attempt to model constraints on floating-point
+      values.  */
+   if (FLOAT_TYPE_P (TREE_TYPE (lhs)) || FLOAT_TYPE_P (TREE_TYPE (rhs)))
+     return tristate::unknown ();
+ 
+   return eval_condition (get_rvalue (lhs, ctxt), op, get_rvalue (rhs, ctxt));
+ }
+ 
+ /* If SID is a constant value, return the underlying tree constant.
+    Otherwise, return NULL_TREE.  */
+ 
+ tree
+ region_model::maybe_get_constant (svalue_id sid) const
+ {
+   gcc_assert (!sid.null_p ());
+   svalue *sval = get_svalue (sid);
+   return sval->maybe_get_constant ();
+ }
+ 
+ /* Create a new child region of the heap (creating the heap region if
+    necessary).
+    Return the region_id of the new child region.  */
+ 
+ region_id
+ region_model::add_new_malloc_region ()
+ {
+   region_id heap_rid
+     = get_root_region ()->ensure_heap_region (this);
+   return add_region (new symbolic_region (heap_rid, NULL_TREE, true));
+ }
+ 
+ /* Attempt to return a tree that represents SID, or return NULL_TREE.  */
+ 
+ tree
+ region_model::get_representative_tree (svalue_id sid) const
+ {
+   if (sid.null_p ())
+     return NULL_TREE;
+ 
+   /* Find the first region that stores the value (e.g. a local) and
+      generate a representative tree for it.  */
+   unsigned i;
+   region *region;
+   FOR_EACH_VEC_ELT (m_regions, i, region)
+     if (sid == region->get_value_direct ())
+       {
+ 	path_var pv = get_representative_path_var (region_id::from_int (i));
+ 	if (pv.m_tree)
+ 	  return pv.m_tree;
+       }
+ 
+   /* Handle string literals and various other pointers.  */
+   svalue *sval = get_svalue (sid);
+   if (region_svalue *ptr_sval = sval->dyn_cast_region_svalue ())
+     {
+       region_id rid = ptr_sval->get_pointee ();
+       path_var pv = get_representative_path_var (rid);
+       if (pv.m_tree)
+ 	return build1 (ADDR_EXPR,
+ 		       TREE_TYPE (sval->get_type ()),
+ 		       pv.m_tree);
+     }
+ 
+   return maybe_get_constant (sid);
+ }
+ 
+ /* Attempt to return a path_var that represents the region, or return
+    the NULL path_var.
+    For example, a region for a field of a local would be a path_var
+    wrapping a COMPONENT_REF.  */
+ 
+ path_var
+ region_model::get_representative_path_var (region_id rid) const
+ {
+   region *reg = get_region (rid);
+   region *parent_reg = get_region (reg->get_parent ());
+   region_id stack_rid = get_stack_region_id ();
+   if (!stack_rid.null_p ())
+     if (parent_reg && parent_reg->get_parent () == stack_rid)
+       {
+ 	frame_region *parent_frame = (frame_region *)parent_reg;
+ 	tree t = parent_frame->get_tree_for_child_region (rid);
+ 	return path_var (t, parent_frame->get_depth ());
+     }
+   if (reg->get_parent () == get_globals_region_id ())
+     {
+       map_region *globals = get_root_region ()->get_globals_region (this);
+       if (globals)
+ 	return path_var (globals->get_tree_for_child_region (rid), -1);
+     }
+ 
+   /* Handle e.g. fields of a local by recursing.  */
+   region_id parent_rid = reg->get_parent ();
+   if (parent_reg)
+     {
+       if (reg->is_view_p ())
+ 	{
+ 	  path_var parent_pv = get_representative_path_var (parent_rid);
+ 	  if (parent_pv.m_tree && reg->get_type ())
+ 	    return path_var (build1 (NOP_EXPR,
+ 				     reg->get_type (),
+ 				     parent_pv.m_tree),
+ 			     parent_pv.m_stack_depth);
+ 	}
+ 
+       if (parent_reg->get_kind () == RK_STRUCT)
+ 	{
+ 	  map_region *parent_map_region = (map_region *)parent_reg;
+ 	  /* This can fail if we have a view, rather than a field.  */
+ 	  if (tree child_key
+ 		= parent_map_region->get_tree_for_child_region (rid))
+ 	    {
+ 	      path_var parent_pv = get_representative_path_var (parent_rid);
+ 	      if (parent_pv.m_tree && TREE_CODE (child_key) == FIELD_DECL)
+ 		return path_var (build3 (COMPONENT_REF,
+ 					 TREE_TYPE (child_key),
+ 					 parent_pv.m_tree, child_key,
+ 					 NULL_TREE),
+ 				 parent_pv.m_stack_depth);
+ 	    }
+ 	}
+ 
+       /* Handle elements within an array.  */
+       if (array_region *array_reg = parent_reg->dyn_cast_array_region ())
+       {
+ 	array_region::key_t key;
+ 	if (array_reg->get_key_for_child_region (rid, &key))
+ 	  {
+ 	    path_var parent_pv = get_representative_path_var (parent_rid);
+ 	    if (parent_pv.m_tree && reg->get_type ())
+ 	      {
+ 		tree index = array_reg->constant_from_key (key);
+ 		return path_var (build4 (ARRAY_REF,
+ 					 reg->get_type (),
+ 					 parent_pv.m_tree, index,
+ 					 NULL_TREE, NULL_TREE),
+ 				 parent_pv.m_stack_depth);
+ 	      }
+ 	  }
+       }
+     }
+ 
+   /* Handle string literals.  */
+   svalue_id sid = reg->get_value_direct ();
+   if (svalue *sval = get_svalue (sid))
+     if (tree cst = sval->maybe_get_constant ())
+       if (TREE_CODE (cst) == STRING_CST)
+ 	return path_var (cst, 0);
+ 
+   return path_var (NULL_TREE, 0);
+ }
+ 
+ /* Locate all regions that directly have value SID and append representative
+    path_var instances for them into *OUT.  */
+ 
+ void
+ region_model::get_path_vars_for_svalue (svalue_id sid, vec<path_var> *out) const
+ {
+   unsigned i;
+   region *region;
+   FOR_EACH_VEC_ELT (m_regions, i, region)
+     if (sid == region->get_value_direct ())
+       {
+ 	path_var pv = get_representative_path_var (region_id::from_int (i));
+ 	if (pv.m_tree)
+ 	  out->safe_push (pv);
+       }
+ }
+ 
+ /* Set DST_RID value to be a new unknown value of type TYPE.  */
+ 
+ svalue_id
+ region_model::set_to_new_unknown_value (region_id dst_rid, tree type,
+ 					region_model_context *ctxt)
+ {
+   gcc_assert (!dst_rid.null_p ());
+   svalue_id new_sid = add_svalue (new unknown_svalue (type));
+   set_value (dst_rid, new_sid, ctxt);
+ 
+   // TODO: presumably purge all child regions too (but do this in set_value?)
+ 
+   return new_sid;
+ }
+ 
+ /* Update this model for any phis in SNODE, assuming we came from
+    LAST_CFG_SUPEREDGE.  */
+ 
+ void
+ region_model::update_for_phis (const supernode *snode,
+ 			       const cfg_superedge *last_cfg_superedge,
+ 			       region_model_context *ctxt)
+ {
+   gcc_assert (last_cfg_superedge);
+ 
+   for (gphi_iterator gpi = const_cast<supernode *>(snode)->start_phis ();
+        !gsi_end_p (gpi); gsi_next (&gpi))
+     {
+       gphi *phi = gpi.phi ();
+ 
+       tree src = last_cfg_superedge->get_phi_arg (phi);
+       tree lhs = gimple_phi_result (phi);
+ 
+       /* Update next_state based on phi.  */
+       bool is_back_edge = last_cfg_superedge->back_edge_p ();
+       handle_phi (phi, lhs, src, is_back_edge, ctxt);
+     }
+ }
+ 
+ /* Attempt to update this model for taking EDGE (where the last statement
+    was LAST_STMT), returning true if the edge can be taken, false
+    otherwise.
+ 
+    For CFG superedges where LAST_STMT is a conditional or a switch
+    statement, attempt to add the relevant conditions for EDGE to this
+    model, returning true if they are feasible, or false if they are
+    impossible.
+ 
+    For call superedges, push frame information and store arguments
+    into parameters.
+ 
+    For return superedges, pop frame information and store return
+    values into any lhs.
+ 
+    Rejection of call/return superedges happens elsewhere, in
+    program_point::on_edge (i.e. based on program point, rather
+    than program state).  */
+ 
+ bool
+ region_model::maybe_update_for_edge (const superedge &edge,
+ 				     const gimple *last_stmt,
+ 				     region_model_context *ctxt)
+ {
+   /* Handle frame updates for interprocedural edges.  */
+   switch (edge.m_kind)
+     {
+     default:
+       break;
+ 
+     case SUPEREDGE_CALL:
+       {
+ 	const call_superedge *call_edge = as_a <const call_superedge *> (&edge);
+ 	update_for_call_superedge (*call_edge, ctxt);
+       }
+       break;
+ 
+     case SUPEREDGE_RETURN:
+       {
+ 	const return_superedge *return_edge
+ 	  = as_a <const return_superedge *> (&edge);
+ 	update_for_return_superedge (*return_edge, ctxt);
+       }
+       break;
+ 
+     case SUPEREDGE_INTRAPROCEDURAL_CALL:
+       {
+ 	const callgraph_superedge *cg_sedge
+ 	  = as_a <const callgraph_superedge *> (&edge);
+ 	update_for_call_summary (*cg_sedge, ctxt);
+       }
+       break;
+     }
+ 
+   if (last_stmt == NULL)
+     return true;
+ 
+   /* Apply any constraints for conditionals/switch statements.  */
+ 
+   if (const gcond *cond_stmt = dyn_cast <const gcond *> (last_stmt))
+     {
+       const cfg_superedge *cfg_sedge = as_a <const cfg_superedge *> (&edge);
+       return apply_constraints_for_gcond (*cfg_sedge, cond_stmt, ctxt);
+     }
+ 
+   if (const gswitch *switch_stmt = dyn_cast <const gswitch *> (last_stmt))
+     {
+       const switch_cfg_superedge *switch_sedge
+ 	= as_a <const switch_cfg_superedge *> (&edge);
+       return apply_constraints_for_gswitch (*switch_sedge, switch_stmt, ctxt);
+     }
+ 
+   return true;
+ }
+ 
+ /* Push a new frame_region on to the stack region.
+    Populate the frame_region with child regions for the function call's
+    parameters, using values from the arguments at the callsite in the
+    caller's frame.  */
+ 
+ void
+ region_model::update_for_call_superedge (const call_superedge &call_edge,
+ 					 region_model_context *ctxt)
+ {
+   /* Build a vec of argument svalue_id, using the current top
+      frame for resolving tree expressions.  */
+   const gcall *call_stmt = call_edge.get_call_stmt ();
+   auto_vec<svalue_id> arg_sids (gimple_call_num_args (call_stmt));
+ 
+   for (unsigned i = 0; i < gimple_call_num_args (call_stmt); i++)
+     {
+       tree arg = gimple_call_arg (call_stmt, i);
+       arg_sids.quick_push (get_rvalue (arg, ctxt));
+     }
+ 
+   push_frame (call_edge.get_callee_function (), &arg_sids, ctxt);
+ }
+ 
+ /* Pop the top-most frame_region from the stack, and copy the return
+    region's values (if any) into the region for the lvalue of the LHS of
+    the call (if any).  */
+ 
+ void
+ region_model::update_for_return_superedge (const return_superedge &return_edge,
+ 					   region_model_context *ctxt)
+ {
+   region_id stack_rid = get_stack_region_id ();
+   stack_region *stack = get_region <stack_region> (stack_rid);
+ 
+   /* Get the region for the result of the call, within the caller frame.  */
+   region_id result_dst_rid;
+   const gcall *call_stmt = return_edge.get_call_stmt ();
+   tree lhs = gimple_call_lhs (call_stmt);
+   if (lhs)
+     {
+       /* Normally we access the top-level frame, which is:
+ 	   path_var (expr, stack->get_num_frames () - 1)
+ 	 whereas here we need the caller frame, hence "- 2" here.  */
+       gcc_assert (stack->get_num_frames () >= 2);
+       result_dst_rid = get_lvalue (path_var (lhs, stack->get_num_frames () - 2),
+ 				   ctxt);
+     }
+ 
+   purge_stats stats;
+   stack->pop_frame (this, result_dst_rid, true, &stats, ctxt);
+   // TODO: do something with the stats?
+ 
+   if (!lhs)
+     {
+       /* This could be a leak; try purging again, but this time,
+ 	 don't special-case the result sids (as was done in pop_frame).  */
+       purge_unused_svalues (&stats, ctxt);
+     }
+ }
+ 
+ /* Update this region_model with a summary of the effect of calling
+    and returning from CG_SEDGE.
+ 
+    TODO: Currently this is extremely simplistic: we merely set the
+    return value to "unknown".  A proper implementation would e.g. update
+    sm-state, and presumably be reworked to support multiple outcomes.  */
+ 
+ void
+ region_model::update_for_call_summary (const callgraph_superedge &cg_sedge,
+ 				       region_model_context *ctxt)
+ {
+   /* For now, set any return value to "unknown".  */
+   const gcall *call_stmt = cg_sedge.get_call_stmt ();
+   tree lhs = gimple_call_lhs (call_stmt);
+   if (lhs)
+     set_to_new_unknown_value (get_lvalue (lhs, ctxt), TREE_TYPE (lhs), ctxt);
+ 
+   // TODO: actually implement some kind of summary here
+ }
+ 
+ /* Given a true or false edge guarded by conditional statement COND_STMT,
+    determine appropriate constraints for the edge to be taken.
+ 
+    If they are feasible, add the constraints and return true.
+ 
+    Return false if the constraints contradict existing knowledge
+    (and so the edge should not be taken).  */
+ 
+ bool
+ region_model::apply_constraints_for_gcond (const cfg_superedge &sedge,
+ 					   const gcond *cond_stmt,
+ 					   region_model_context *ctxt)
+ {
+   ::edge cfg_edge = sedge.get_cfg_edge ();
+   gcc_assert (cfg_edge != NULL);
+   gcc_assert (cfg_edge->flags & (EDGE_TRUE_VALUE | EDGE_FALSE_VALUE));
+ 
+   enum tree_code op = gimple_cond_code (cond_stmt);
+   tree lhs = gimple_cond_lhs (cond_stmt);
+   tree rhs = gimple_cond_rhs (cond_stmt);
+   if (cfg_edge->flags & EDGE_FALSE_VALUE)
+     op = invert_tree_comparison (op, false /* honor_nans */);
+   return add_constraint (lhs, op, rhs, ctxt);
+ }
+ 
+ /* Given an EDGE guarded by SWITCH_STMT, determine appropriate constraints
+    for the edge to be taken.
+ 
+    If they are feasible, add the constraints and return true.
+ 
+    Return false if the constraints contradict existing knowledge
+    (and so the edge should not be taken).  */
+ 
+ bool
+ region_model::apply_constraints_for_gswitch (const switch_cfg_superedge &edge,
+ 					     const gswitch *switch_stmt,
+ 					     region_model_context *ctxt)
+ {
+   tree index  = gimple_switch_index (switch_stmt);
+   tree case_label = edge.get_case_label ();
+   gcc_assert (TREE_CODE (case_label) == CASE_LABEL_EXPR);
+   tree lower_bound = CASE_LOW (case_label);
+   tree upper_bound = CASE_HIGH (case_label);
+   if (lower_bound)
+     {
+       if (upper_bound)
+ 	{
+ 	  /* Range.  */
+ 	  if (!add_constraint (index, GE_EXPR, lower_bound, ctxt))
+ 	    return false;
+ 	  return add_constraint (index, LE_EXPR, upper_bound, ctxt);
+ 	}
+       else
+ 	/* Single-value.  */
+ 	return add_constraint (index, EQ_EXPR, lower_bound, ctxt);
+     }
+   else
+     {
+       /* The default case.
+ 	 Add exclusions based on the other cases.  */
+       for (unsigned other_idx = 1;
+ 	   other_idx < gimple_switch_num_labels (switch_stmt);
+ 	   other_idx++)
+ 	{
+ 	  tree other_label = gimple_switch_label (switch_stmt,
+ 						  other_idx);
+ 	  tree other_lower_bound = CASE_LOW (other_label);
+ 	  tree other_upper_bound = CASE_HIGH (other_label);
+ 	  gcc_assert (other_lower_bound);
+ 	  if (other_upper_bound)
+ 	    {
+ 	      /* Exclude this range-valued case.
+ 		 For now, we just exclude the boundary values.
+ 		 TODO: exclude the values within the region.  */
+ 	      if (!add_constraint (index, NE_EXPR, other_lower_bound, ctxt))
+ 		return false;
+ 	      if (!add_constraint (index, NE_EXPR, other_upper_bound, ctxt))
+ 		return false;
+ 	    }
+ 	  else
+ 	    /* Exclude this single-valued case.  */
+ 	    if (!add_constraint (index, NE_EXPR, other_lower_bound, ctxt))
+ 	      return false;
+ 	}
+       return true;
+     }
+ }
+ 
+ /* Get the root_region within this model (guaranteed to be non-null).  */
+ 
+ root_region *
+ region_model::get_root_region () const
+ {
+   return get_region<root_region> (m_root_rid);
+ }
+ 
+ /* Get the region_id of this model's stack region (if any).  */
+ 
+ region_id
+ region_model::get_stack_region_id () const
+ {
+   return get_root_region ()->get_stack_region_id ();
+ }
+ 
+ /* Create a new frame_region for a call to FUN and push it onto
+    the stack.
+ 
+    If ARG_SIDS is non-NULL, use it to populate the parameters
+    in the new frame.
+    Otherwise, populate them with unknown values.
+ 
+    Return the region_id of the new frame_region.  */
+ 
+ region_id
+ region_model::push_frame (function *fun, vec<svalue_id> *arg_sids,
+ 			  region_model_context *ctxt)
+ {
+   return get_root_region ()->push_frame (this, fun, arg_sids, ctxt);
+ }
+ 
+ /* Get the region_id of the top-most frame in this region_model's stack,
+    if any.  */
+ 
+ region_id
+ region_model::get_current_frame_id () const
+ {
+   return get_root_region ()->get_current_frame_id (*this);
+ }
+ 
+ /* Get the function of the top-most frame in this region_model's stack.
+    There must be such a frame.  */
+ 
+ function *
+ region_model::get_current_function () const
+ {
+   region_id frame_id = get_current_frame_id ();
+   frame_region *frame = get_region<frame_region> (frame_id);
+   return frame->get_function ();
+ }
+ 
+ /* Pop the topmost frame_region from this region_model's stack;
+    see the comment for stack_region::pop_frame.  */
+ 
+ void
+ region_model::pop_frame (region_id result_dst_rid,
+ 			 bool purge, purge_stats *out,
+ 			 region_model_context *ctxt)
+ {
+   get_root_region ()->pop_frame (this, result_dst_rid, purge, out, ctxt);
+ }
+ 
+ /* Get the number of frames in this region_model's stack.  */
+ 
+ int
+ region_model::get_stack_depth () const
+ {
+   stack_region *stack = get_root_region ()->get_stack_region (this);
+   if (stack)
+     return stack->get_num_frames ();
+   else
+     return 0;
+ }
+ 
+ /* Get the function * at DEPTH within the call stack.  */
+ 
+ function *
+ region_model::get_function_at_depth (unsigned depth) const
+ {
+   stack_region *stack = get_root_region ()->get_stack_region (this);
+   gcc_assert (stack);
+   region_id frame_rid = stack->get_frame_rid (depth);
+   frame_region *frame = get_region <frame_region> (frame_rid);
+   return frame->get_function ();
+ }
+ 
+ /* Get the region_id of this model's globals region (if any).  */
+ 
+ region_id
+ region_model::get_globals_region_id () const
+ {
+   return get_root_region ()->get_globals_region_id ();
+ }
+ 
+ /* Add SVAL to this model, taking ownership, and returning its new
+    svalue_id.  */
+ 
+ svalue_id
+ region_model::add_svalue (svalue *sval)
+ {
+   gcc_assert (sval);
+   m_svalues.safe_push (sval);
+   return svalue_id::from_int (m_svalues.length () - 1);
+ }
+ 
+ /* Change the meaning of SID to be NEW_SVAL
+    (e.g. when deferencing an unknown pointer, the pointer
+    becomes a pointer to a symbolic region, so that all users
+    of the former unknown pointer are now effectively pointing
+    at the same region).  */
+ 
+ void
+ region_model::replace_svalue (svalue_id sid, svalue *new_sval)
+ {
+   gcc_assert (!sid.null_p ());
+   int idx = sid.as_int ();
+ 
+   gcc_assert (m_svalues[idx]);
+   gcc_assert (m_svalues[idx]->get_type () == new_sval->get_type ());
+   delete m_svalues[idx];
+ 
+   m_svalues[idx] = new_sval;
+ }
+ 
+ /* Add region R to this model, taking ownership, and returning its new
+    region_id.  */
+ 
+ region_id
+ region_model::add_region (region *r)
+ {
+   gcc_assert (r);
+   m_regions.safe_push (r);
+   return region_id::from_int (m_regions.length () - 1);
+ }
+ 
+ /* Return the svalue with id SVAL_ID, or NULL for a null id.  */
+ 
+ svalue *
+ region_model::get_svalue (svalue_id sval_id) const
+ {
+   if (sval_id.null_p ())
+     return NULL;
+   return m_svalues[sval_id.as_int ()];
+ }
+ 
+ /* Return the region with id RID, or NULL for a null id.  */
+ 
+ region *
+ region_model::get_region (region_id rid) const
+ {
+   if (rid.null_p ())
+     return NULL;
+   return m_regions[rid.as_int ()];
+ }
+ 
+ /* Make a region of an appropriate subclass for TYPE,
+    with parent PARENT_RID, or return NULL for types we don't yet know
+    how to handle.  */
+ 
+ static region *
+ make_region_for_type (region_id parent_rid, tree type)
+ {
+   gcc_assert (TYPE_P (type));
+ 
+   if (INTEGRAL_TYPE_P (type)
+       || SCALAR_FLOAT_TYPE_P (type)
+       || POINTER_TYPE_P (type)
+       || TREE_CODE (type) == COMPLEX_TYPE
+       || TREE_CODE (type) == VECTOR_TYPE)
+     return new primitive_region (parent_rid, type);
+ 
+   if (TREE_CODE (type) == RECORD_TYPE)
+     return new struct_region (parent_rid, type);
+ 
+   if (TREE_CODE (type) == ARRAY_TYPE)
+     return new array_region (parent_rid, type);
+ 
+   if (TREE_CODE (type) == UNION_TYPE)
+     return new union_region (parent_rid, type);
+ 
+   if (FUNC_OR_METHOD_TYPE_P (type))
+     return new function_region (parent_rid, type);
+ 
+   /* If we have a void *, make a new symbolic region.  */
+   if (VOID_TYPE_P (type))
+     return new symbolic_region (parent_rid, type, false);
+ 
+   return NULL;
+ }
+ 
+ /* Add a region with type TYPE and parent PARENT_RID.  */
+ 
+ region_id
+ region_model::add_region_for_type (region_id parent_rid, tree type,
+ 				   region_model_context *ctxt)
+ {
+   if (type)
+     {
+       gcc_assert (TYPE_P (type));
+ 
+       if (region *new_region = make_region_for_type (parent_rid, type))
+ 	return add_region (new_region);
+     }
+ 
+   /* If we can't handle TYPE, return a placeholder region, and stop
+      exploring this path.  */
+   return make_region_for_unexpected_tree_code (ctxt, type,
+ 					       dump_location_t ());
+ }
+ 
+ /* Helper class for region_model::purge_unused_svalues.  */
+ 
+ class restrict_to_used_svalues : public purge_criteria
+ {
+ public:
+   restrict_to_used_svalues (const auto_sbitmap &used) : m_used (used) {}
+ 
+   bool should_purge_p (svalue_id sid) const FINAL OVERRIDE
+   {
+     gcc_assert (!sid.null_p ());
+     return !bitmap_bit_p (m_used, sid.as_int ());
+   }
+ 
+ private:
+   const auto_sbitmap &m_used;
+ };
+ 
+ /* Remove unused svalues from this model, accumulating stats into STATS.
+    Unused svalues are deleted.  Doing so could reorder the svalues, and
+    thus change the meaning of svalue_ids.
+ 
+    If CTXT is non-NULL, then it is notified about svalue_id remappings,
+    and about svalue_ids that are about to be deleted.  This allows e.g.
+    for warning about resource leaks, for the case where the svalue
+    represents a resource handle in the user code (e.g. a FILE * or a malloc
+    buffer).
+ 
+    Amongst other things, removing unused svalues is important for ensuring
+    that the analysis of loops terminates.  Otherwise, we could generate a
+    succession of models with unreferenced "unknown" values, where the
+    number of redundant unknown values could grow without bounds, and each
+    such model would be treated as distinct.
+ 
+    If KNOWN_USED_SIDS is non-NULL, treat *KNOWN_USED_SIDS as used (this is for
+    handling values being returned from functions as their frame is popped,
+    since otherwise we'd have to simultaneously determine both the rvalue
+    of the return expr in the callee frame and the lvalue for the gcall's
+    assignment in the caller frame, and it seems cleaner to express all
+    lvalue and rvalue lookups implicitly relative to a "current" frame).
+    The svalue_ids in *KNOWN_USED_SIDS are not remapped and hence this
+    call makes it invalid.  */
+ 
+ void
+ region_model::purge_unused_svalues (purge_stats *stats,
+ 				    region_model_context *ctxt,
+ 				    svalue_id_set *known_used_sids)
+ {
+   // TODO: might want to avoid a vfunc call just to do logging here:
+   logger *logger = ctxt ? ctxt->get_logger () : NULL;
+ 
+   LOG_SCOPE (logger);
+ 
+   auto_sbitmap used (m_svalues.length ());
+   bitmap_clear (used);
+ 
+   if (known_used_sids)
+     {
+       /* We can't use an sbitmap for known_used_sids as the number of
+ 	 svalues could have grown since it was created.  */
+       for (unsigned i = 0; i < get_num_svalues (); i++)
+ 	if (known_used_sids->svalue_p (svalue_id::from_int (i)))
+ 	  bitmap_set_bit (used, i);
+     }
+ 
+   /* Walk the regions, marking sids that are used.  */
+   unsigned i;
+   region *r;
+   FOR_EACH_VEC_ELT (m_regions, i, r)
+     {
+       svalue_id sid = r->get_value_direct ();
+       if (!sid.null_p ())
+ 	bitmap_set_bit (used, sid.as_int ());
+     }
+ 
+   /* Now purge any constraints involving svalues we don't care about.  */
+   restrict_to_used_svalues criterion (used);
+   m_constraints->purge (criterion, stats);
+ 
+   /* Mark any sids that are in constraints that survived.  */
+   {
+     equiv_class *ec;
+     FOR_EACH_VEC_ELT (m_constraints->m_equiv_classes, i, ec)
+       {
+ 	int j;
+ 	svalue_id *sid;
+ 	FOR_EACH_VEC_ELT (ec->m_vars, j, sid)
+ 	  {
+ 	    gcc_assert (!sid->null_p ());
+ 	    bitmap_set_bit (used, sid->as_int ());
+ 	  }
+       }
+   }
+ 
+   /* Build a mapping from old-sid to new-sid so that we can preserve
+      order of the used IDs and move all redundant ones to the end.
+      Iterate though svalue IDs, adding used ones to the front of
+      the new list, and unused ones to the back.  */
+   svalue_id_map map (m_svalues.length ());
+   int next_used_new_sid = 0;
+   int after_next_unused_new_sid = m_svalues.length ();
+   for (unsigned i = 0; i < m_svalues.length (); i++)
+     {
+       svalue_id src (svalue_id::from_int (i));
+       if (bitmap_bit_p (used, i))
+ 	{
+ 	  if (logger)
+ 	    logger->log ("sv%i is used", i);
+ 	  map.put (src, svalue_id::from_int (next_used_new_sid++));
+ 	}
+       else
+ 	{
+ 	  if (logger)
+ 	    logger->log ("sv%i is unused", i);
+ 	  map.put (src, svalue_id::from_int (--after_next_unused_new_sid));
+ 	}
+     }
+   /* The two insertion points should have met.  */
+   gcc_assert (next_used_new_sid == after_next_unused_new_sid);
+ 
+   /* Now walk the regions and the constraints, remapping sids,
+      so that all the redundant svalues are at the end.  */
+   remap_svalue_ids (map);
+ 
+   if (logger)
+     {
+       logger->start_log_line ();
+       logger->log_partial ("map: ");
+       map.dump_to_pp (logger->get_printer ());
+       logger->end_log_line ();
+     }
+ 
+   /* Notify any client about the remapping and pending deletion.
+      Potentially this could trigger leak warnings.  */
+   if (ctxt)
+     {
+       ctxt->remap_svalue_ids (map);
+       int num_client_items_purged
+ 	= ctxt->on_svalue_purge (svalue_id::from_int (next_used_new_sid), map);
+       if (stats)
+ 	stats->m_num_client_items += num_client_items_purged;
+     }
+ 
+   /* Drop the redundant svalues from the end of the vector.  */
+   while ((signed)m_svalues.length () > next_used_new_sid)
+     {
+       if (logger)
+ 	{
+ 	  svalue_id victim = svalue_id::from_int (m_svalues.length () - 1);
+ 	  logger->log ("deleting sv%i (was sv%i)",
+ 		       victim.as_int (),
+ 		       map.get_src_for_dst (victim).as_int ());
+ 	}
+       delete m_svalues.pop ();
+       if (stats)
+ 	stats->m_num_svalues++;
+     }
+ 
+   validate ();
+ }
+ 
+ /* Renumber the svalues within this model according to MAP.  */
+ 
+ void
+ region_model::remap_svalue_ids (const svalue_id_map &map)
+ {
+   /* Update IDs within regions.  */
+   unsigned i;
+   region *r;
+   FOR_EACH_VEC_ELT (m_regions, i, r)
+     r->remap_svalue_ids (map);
+ 
+   /* Update IDs within ECs within constraints.  */
+   m_constraints->remap_svalue_ids (map);
+ 
+   /* Build a reordered svalues vector.  */
+   auto_vec<svalue *> new_svalues (m_svalues.length ());
+   for (unsigned i = 0; i < m_svalues.length (); i++)
+     {
+       svalue_id dst (svalue_id::from_int (i));
+       svalue_id src = map.get_src_for_dst (dst);
+       new_svalues.quick_push (get_svalue (src));
+     }
+ 
+   /* Copy over the reordered vec to m_svalues.  */
+   m_svalues.truncate (0);
+   gcc_assert (m_svalues.space (new_svalues.length ()));
+   svalue *sval;
+   FOR_EACH_VEC_ELT (new_svalues, i, sval)
+     m_svalues.quick_push (sval);
+ }
+ 
+ /* Renumber the regions within this model according to MAP.  */
+ 
+ void
+ region_model::remap_region_ids (const region_id_map &map)
+ {
+   /* Update IDs within regions.  */
+   unsigned i;
+   region *r;
+   FOR_EACH_VEC_ELT (m_regions, i, r)
+     r->remap_region_ids (map);
+ 
+   /* Update IDs within svalues.  */
+   svalue *sval;
+   FOR_EACH_VEC_ELT (m_svalues, i, sval)
+     sval->remap_region_ids (map);
+ 
+   /* Build a reordered regions vector.  */
+   auto_vec<region *> new_regions (m_regions.length ());
+   for (unsigned i = 0; i < m_regions.length (); i++)
+     {
+       region_id dst (region_id::from_int (i));
+       region_id src = map.get_src_for_dst (dst);
+       new_regions.quick_push (get_region (src));
+     }
+ 
+   /* Copy over the reordered vec to m_regions.  */
+   m_regions.truncate (0);
+   gcc_assert (m_regions.space (new_regions.length ()));
+   FOR_EACH_VEC_ELT (new_regions, i, r)
+     m_regions.quick_push (r);
+ }
+ 
+ /* Delete all regions within SET_TO_PURGE, remapping region IDs for
+    other regions.  It's required that there are no uses of the
+    regions within the set (or the region IDs will become invalid).
+ 
+    Accumulate stats to STATS.  */
+ 
+ void
+ region_model::purge_regions (const region_id_set &set_to_purge,
+ 			     purge_stats *stats,
+ 			     logger *)
+ {
+   /* Build a mapping from old-rid to new-rid so that we can preserve
+      order of the used IDs and move all redundant ones to the end.
+      Iterate though region IDs, adding used ones to the front of
+      the new list, and unused ones to the back.  */
+   region_id_map map (m_regions.length ());
+   int next_used_new_rid = 0;
+   int after_next_unused_new_rid = m_regions.length ();
+   for (unsigned i = 0; i < m_regions.length (); i++)
+     {
+       region_id src (region_id::from_int (i));
+       if (set_to_purge.region_p (src))
+ 	map.put (src, region_id::from_int (--after_next_unused_new_rid));
+       else
+ 	map.put (src, region_id::from_int (next_used_new_rid++));
+     }
+   /* The two insertion points should have met.  */
+   gcc_assert (next_used_new_rid == after_next_unused_new_rid);
+ 
+   /* Now walk the regions and svalues, remapping rids,
+      so that all the redundant regions are at the end.  */
+   remap_region_ids (map);
+ 
+   /* Drop the redundant regions from the end of the vector.  */
+   while ((signed)m_regions.length () > next_used_new_rid)
+     {
+       delete m_regions.pop ();
+       if (stats)
+ 	stats->m_num_regions++;
+     }
+ }
+ 
+ /* Populate *OUT with RID and all of its descendents.
+    If EXCLUDE_RID is non-null, then don't add it or its descendents.  */
+ 
+ void
+ region_model::get_descendents (region_id rid, region_id_set *out,
+ 			       region_id exclude_rid) const
+ {
+   out->add_region (rid);
+ 
+   bool changed = true;
+   while (changed)
+     {
+       changed = false;
+       unsigned i;
+       region *r;
+       FOR_EACH_VEC_ELT (m_regions, i, r)
+ 	{
+ 	  region_id iter_rid = region_id::from_int (i);
+ 	  if (iter_rid == exclude_rid)
+ 	    continue;
+ 	  if (!out->region_p (iter_rid))
+ 	    {
+ 	      region_id parent_rid = r->get_parent ();
+ 	      if (!parent_rid.null_p ())
+ 		if (out->region_p (parent_rid))
+ 		  {
+ 		    out->add_region (iter_rid);
+ 		    changed = true;
+ 		  }
+ 	    }
+ 	}
+     }
+ }
+ 
+ /* Delete RID and all descendent regions.
+    Find any pointers to such regions; convert them to
+    poisoned values of kind PKIND.
+    Accumulate stats on purged entities into STATS.  */
+ 
+ void
+ region_model::delete_region_and_descendents (region_id rid,
+ 					     enum poison_kind pkind,
+ 					     purge_stats *stats,
+ 					     logger *logger)
+ {
+   /* Find all child and descendent regions.  */
+   region_id_set descendents (this);
+   get_descendents (rid, &descendents, region_id::null ());
+ 
+   /* Find any pointers to such regions; convert to poisoned.  */
+   poison_any_pointers_to_bad_regions (descendents, pkind);
+ 
+   /* Delete all such regions.  */
+   purge_regions (descendents, stats, logger);
+ }
+ 
+ /* Find any pointers to regions within BAD_REGIONS; convert them to
+    poisoned values of kind PKIND.  */
+ 
+ void
+ region_model::poison_any_pointers_to_bad_regions (const region_id_set &
+ 						    bad_regions,
+ 						  enum poison_kind pkind)
+ {
+   int i;
+   svalue *sval;
+   FOR_EACH_VEC_ELT (m_svalues, i, sval)
+     if (region_svalue *ptr_sval = sval->dyn_cast_region_svalue ())
+       {
+ 	region_id ptr_dst = ptr_sval->get_pointee ();
+ 	if (!ptr_dst.null_p ())
+ 	  if (bad_regions.region_p (ptr_dst))
+ 	    replace_svalue
+ 	      (svalue_id::from_int (i),
+ 	       new poisoned_svalue (pkind, sval->get_type ()));
+       }
+ }
+ 
+ /* Attempt to merge THIS with OTHER_MODEL, writing the result
+    to OUT_MODEL, and populating SID_MAPPING.  */
+ 
+ bool
+ region_model::can_merge_with_p (const region_model &other_model,
+ 				region_model *out_model,
+ 				svalue_id_merger_mapping *sid_mapping) const
+ {
+   gcc_assert (m_root_rid == other_model.m_root_rid);
+   gcc_assert (m_root_rid.as_int () == 0);
+   gcc_assert (sid_mapping);
+   gcc_assert (out_model);
+ 
+   model_merger merger (this, &other_model, out_model, sid_mapping);
+ 
+   if (!root_region::can_merge_p (get_root_region (),
+ 				 other_model.get_root_region (),
+ 				 out_model->get_root_region (),
+ 				 &merger))
+     return false;
+ 
+   /* Merge constraints.  */
+   constraint_manager::merge (*m_constraints,
+ 			     *other_model.m_constraints,
+ 			     out_model->m_constraints,
+ 			     merger);
+ 
+   out_model->validate ();
+ 
+   /* The merged model should be simpler (or as simple) as the inputs.  */
+ #if 0
+   gcc_assert (out_model->m_svalues.length () <= m_svalues.length ());
+   gcc_assert (out_model->m_svalues.length ()
+ 	      <= other_model.m_svalues.length ());
+ #endif
+   gcc_assert (out_model->m_regions.length () <= m_regions.length ());
+   gcc_assert (out_model->m_regions.length ()
+ 	      <= other_model.m_regions.length ());
+   // TODO: same, for constraints
+ 
+   return true;
+ }
+ 
+ /* As above, but supply a placeholder svalue_id_merger_mapping
+    instance to be used and receive output.  For use in selftests.  */
+ 
+ bool
+ region_model::can_merge_with_p (const region_model &other_model,
+ 				region_model *out_model) const
+ {
+   svalue_id_merger_mapping sid_mapping (*this, other_model);
+   return can_merge_with_p (other_model, out_model, &sid_mapping);
+ }
+ 
+ /* For debugging purposes: look for a region within this region_model
+    for a decl named NAME (or an SSA_NAME for such a decl),
+    returning its value, or svalue_id::null if none are found.  */
+ 
+ svalue_id
+ region_model::get_value_by_name (const char *name) const
+ {
+   gcc_assert (name);
+   tree identifier = get_identifier (name);
+   return get_root_region ()->get_value_by_name (identifier, *this);
+ }
+ 
+ /* Generate or reuse an svalue_id within this model for an index
+    into an array of type PTR_TYPE, based on OFFSET_SID.  */
+ 
+ svalue_id
+ region_model::convert_byte_offset_to_array_index (tree ptr_type,
+ 						  svalue_id offset_sid)
+ {
+   gcc_assert (POINTER_TYPE_P (ptr_type));
+ 
+   if (tree offset_cst = maybe_get_constant (offset_sid))
+     {
+       tree elem_type = TREE_TYPE (ptr_type);
+ 
+       /* Arithmetic on void-pointers is a GNU C extension, treating the size
+ 	 of a void as 1.
+ 	 https://gcc.gnu.org/onlinedocs/gcc/Pointer-Arith.html  */
+       if (TREE_CODE (elem_type) == VOID_TYPE)
+ 	return offset_sid;
+ 
+       /* First, use int_size_in_bytes, to reject the case where we have an
+ 	 incomplete type, or a non-constant value.  */
+       HOST_WIDE_INT hwi_byte_size = int_size_in_bytes (elem_type);
+       if (hwi_byte_size > 0)
+ 	{
+ 	  /* Now call size_in_bytes to get the answer in tree form.  */
+ 	  tree byte_size = size_in_bytes (elem_type);
+ 	  gcc_assert (byte_size);
+ 	  /* Try to get a constant by dividing, ensuring that we're in a
+ 	     signed representation first.  */
+ 	  tree index
+ 	    = fold_binary (TRUNC_DIV_EXPR, ssizetype,
+ 			   fold_convert (ssizetype, offset_cst),
+ 			   fold_convert (ssizetype, byte_size));
+ 	  if (index && TREE_CODE (index) == INTEGER_CST)
+ 	    return get_or_create_constant_svalue (index);
+ 	}
+     }
+ 
+   /* Otherwise, we don't know the array index; generate a new unknown value.
+      TODO: do we need to capture the relationship between two unknown
+      values (the offset and the index)?  */
+   return add_svalue (new unknown_svalue (integer_type_node));
+ }
+ 
+ /* Get a region of type TYPE for PTR_SID[OFFSET_SID/sizeof (*PTR_SID)].
+ 
+    If OFFSET_SID is known to be zero, then dereference PTR_SID.
+    Otherwise, impose a view of "typeof(*PTR_SID)[]" on *PTR_SID,
+    and then get a view of type TYPE on the relevant array element.  */
+ 
+ region_id
+ region_model::get_or_create_mem_ref (tree type,
+ 				     svalue_id ptr_sid,
+ 				     svalue_id offset_sid,
+ 				     region_model_context *ctxt)
+ {
+   svalue *ptr_sval = get_svalue (ptr_sid);
+   tree ptr_type = ptr_sval->get_type ();
+   gcc_assert (ptr_type);
+ 
+   region_id raw_rid = deref_rvalue (ptr_sid, ctxt);
+ 
+   svalue *offset_sval = get_svalue (offset_sid);
+   tree offset_type = offset_sval->get_type ();
+   gcc_assert (offset_type);
+ 
+   if (constant_svalue *cst_sval = offset_sval->dyn_cast_constant_svalue ())
+     {
+       if (zerop (cst_sval->get_constant ()))
+ 	{
+ 	  /* Handle the zero offset case.  */
+ 	  return get_or_create_view (raw_rid, type, ctxt);
+ 	}
+ 
+       /* If we're already within an array of the correct type,
+ 	 then we want to reuse that array, rather than starting
+ 	 a new view.
+ 	 If so, figure out our raw_rid's offset from its parent,
+ 	 if we can, and use that to offset OFFSET_SID, and create
+ 	 the element within the parent region.  */
+       region *raw_reg = get_region (raw_rid);
+       region_id parent_rid = raw_reg->get_parent ();
+       tree parent_type = get_region (parent_rid)->get_type ();
+       if (parent_type
+ 	  && TREE_CODE (parent_type) == ARRAY_TYPE)
+ 	{
+ 	  // TODO: check we have the correct parent type
+ 	  array_region *parent_array = get_region <array_region> (parent_rid);
+ 	  array_region::key_t key_for_raw_rid;
+ 	  if (parent_array->get_key_for_child_region (raw_rid,
+ 						      &key_for_raw_rid))
+ 	    {
+ 	      /* Convert from offset to index.  */
+ 	      svalue_id index_sid
+ 		= convert_byte_offset_to_array_index (ptr_type, offset_sid);
+ 	      if (tree index_cst
+ 		    = get_svalue (index_sid)->maybe_get_constant ())
+ 		{
+ 		  array_region::key_t index_offset
+ 		    = array_region::key_from_constant (index_cst);
+ 		  array_region::key_t index_rel_to_parent
+ 		    = key_for_raw_rid + index_offset;
+ 		  tree index_rel_to_parent_cst
+ 		    = wide_int_to_tree (integer_type_node,
+ 					index_rel_to_parent);
+ 		  svalue_id index_sid
+ 		    = get_or_create_constant_svalue (index_rel_to_parent_cst);
+ 
+ 		  /* Carry on, using the parent region and adjusted index.  */
+ 		  region_id element_rid
+ 		    = parent_array->get_element (this, raw_rid, index_sid,
+ 						 ctxt);
+ 		  return get_or_create_view (element_rid, type, ctxt);
+ 		}
+ 	    }
+ 	}
+     }
+ 
+   tree array_type = build_array_type (TREE_TYPE (ptr_type),
+ 				      integer_type_node);
+   region_id array_view_rid = get_or_create_view (raw_rid, array_type, ctxt);
+   array_region *array_reg = get_region <array_region> (array_view_rid);
+ 
+   svalue_id index_sid
+     = convert_byte_offset_to_array_index (ptr_type, offset_sid);
+ 
+   region_id element_rid
+     = array_reg->get_element (this, array_view_rid, index_sid, ctxt);
+ 
+   return get_or_create_view (element_rid, type, ctxt);
+ }
+ 
+ /* Get a region of type TYPE for PTR_SID + OFFSET_SID.
+ 
+    If OFFSET_SID is known to be zero, then dereference PTR_SID.
+    Otherwise, impose a view of "typeof(*PTR_SID)[]" on *PTR_SID,
+    and then get a view of type TYPE on the relevant array element.  */
+ 
+ region_id
+ region_model::get_or_create_pointer_plus_expr (tree type,
+ 					       svalue_id ptr_sid,
+ 					       svalue_id offset_in_bytes_sid,
+ 					       region_model_context *ctxt)
+ {
+   return get_or_create_mem_ref (type,
+ 				ptr_sid,
+ 				offset_in_bytes_sid,
+ 				ctxt);
+ }
+ 
+ /* Get or create a view of type TYPE of the region with id RAW_ID.
+    Return the id of the view (or RAW_ID if it of the same type).  */
+ 
+ region_id
+ region_model::get_or_create_view (region_id raw_rid, tree type,
+ 				  region_model_context *ctxt)
+ {
+   region *raw_region = get_region (raw_rid);
+ 
+   gcc_assert (TYPE_P (type));
+   if (type != raw_region->get_type ())
+     {
+       /* If the region already has a view of the requested type,
+ 	 reuse it.  */
+       region_id existing_view_rid = raw_region->get_view (type, this);
+       if (!existing_view_rid.null_p ())
+ 	return existing_view_rid;
+ 
+       /* Otherwise, make one (adding it to the region_model and
+ 	 to the viewed region).  */
+       region_id view_rid = add_region_for_type (raw_rid, type, ctxt);
+       raw_region->add_view (view_rid, this);
+       // TODO: something to signify that this is a "view"
+       return view_rid;
+     }
+ 
+   return raw_rid;
+ }
+ 
+ /* Attempt to get the fndecl used at CALL, if known, or NULL_TREE
+    otherwise.  */
+ 
+ tree
+ region_model::get_fndecl_for_call (const gcall *call,
+ 				   region_model_context *ctxt)
+ {
+   tree fn_ptr = gimple_call_fn (call);
+   if (fn_ptr == NULL_TREE)
+     return NULL_TREE;
+   svalue_id fn_ptr_sid = get_rvalue (fn_ptr, ctxt);
+   svalue *fn_ptr_sval = get_svalue (fn_ptr_sid);
+   if (region_svalue *fn_ptr_ptr = fn_ptr_sval->dyn_cast_region_svalue ())
+     {
+       region_id fn_rid = fn_ptr_ptr->get_pointee ();
+       code_region *code = get_root_region ()->get_code_region (this);
+       if (code)
+ 	{
+ 	  tree fn_decl = code->get_tree_for_child_region (fn_rid);
+ 	  if (!fn_decl)
+ 	    return NULL_TREE;
+ 	  cgraph_node *node = cgraph_node::get (fn_decl);
+ 	  if (!node)
+ 	    return NULL_TREE;
+ 	  const cgraph_node *ultimate_node = node->ultimate_alias_target ();
+ 	  if (ultimate_node)
+ 	    return ultimate_node->decl;
+ 	}
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* struct model_merger.  */
+ 
+ /* Dump a multiline representation of this merger to PP.  */
+ 
+ void
+ model_merger::dump_to_pp (pretty_printer *pp) const
+ {
+   pp_string (pp, "model A:");
+   pp_newline (pp);
+   m_model_a->dump_to_pp (pp, false);
+   pp_newline (pp);
+ 
+   pp_string (pp, "model B:");
+   pp_newline (pp);
+   m_model_b->dump_to_pp (pp, false);
+   pp_newline (pp);
+ 
+   pp_string (pp, "merged model:");
+   pp_newline (pp);
+   m_merged_model->dump_to_pp (pp, false);
+   pp_newline (pp);
+ 
+   pp_string (pp, "region map: model A to merged model:");
+   pp_newline (pp);
+   m_map_regions_from_a_to_m.dump_to_pp (pp);
+   pp_newline (pp);
+ 
+   pp_string (pp, "region map: model B to merged model:");
+   pp_newline (pp);
+   m_map_regions_from_b_to_m.dump_to_pp (pp);
+   pp_newline (pp);
+ 
+   m_sid_mapping->dump_to_pp (pp);
+ }
+ 
+ /* Dump a multiline representation of this merger to FILE.  */
+ 
+ void
+ model_merger::dump (FILE *fp) const
+ {
+   pretty_printer pp;
+   pp_format_decoder (&pp) = default_tree_printer;
+   pp_show_color (&pp) = pp_show_color (global_dc->printer);
+   pp.buffer->stream = fp;
+   dump_to_pp (&pp);
+   pp_flush (&pp);
+ }
+ 
+ /* Dump a multiline representation of this merger to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ model_merger::dump () const
+ {
+   dump (stderr);
+ }
+ 
+ /* Attempt to merge the svalues of SID_A and SID_B (from their
+    respective models), writing the id of the resulting svalue
+    into *MERGED_SID.
+    Return true if the merger is possible, false otherwise.  */
+ 
+ bool
+ model_merger::can_merge_values_p (svalue_id sid_a,
+ 				  svalue_id sid_b,
+ 				  svalue_id *merged_sid)
+ {
+   gcc_assert (merged_sid);
+   svalue *sval_a = m_model_a->get_svalue (sid_a);
+   svalue *sval_b = m_model_b->get_svalue (sid_b);
+ 
+   /* If both are NULL, then the "values" are trivially mergeable.  */
+   if (!sval_a && !sval_b)
+     return true;
+ 
+   /* If one is NULL and the other non-NULL, then the "values"
+      are not mergeable.  */
+   if (!(sval_a && sval_b))
+     return false;
+ 
+   /* Have they both already been mapped to the same new svalue_id?
+      If so, use it.  */
+   svalue_id sid_a_in_m
+     = m_sid_mapping->m_map_from_a_to_m.get_dst_for_src (sid_a);
+   svalue_id sid_b_in_m
+     = m_sid_mapping->m_map_from_b_to_m.get_dst_for_src (sid_b);
+   if (!sid_a_in_m.null_p ()
+       && !sid_b_in_m.null_p ()
+       && sid_a_in_m == sid_b_in_m)
+     {
+       *merged_sid = sid_a_in_m;
+       return true;
+     }
+ 
+   tree type = sval_a->get_type ();
+   if (type == NULL_TREE)
+     type = sval_b->get_type ();
+ 
+   /* If the values have different kinds, or are both unknown,
+      then merge as "unknown".  */
+   if (sval_a->get_kind () != sval_b->get_kind ()
+       || sval_a->get_kind () == SK_UNKNOWN)
+     {
+       svalue *merged_sval = new unknown_svalue (type);
+       *merged_sid = m_merged_model->add_svalue (merged_sval);
+       record_svalues (sid_a, sid_b, *merged_sid);
+       return true;
+     }
+ 
+   gcc_assert (sval_a->get_kind () == sval_b->get_kind ());
+ 
+   switch (sval_a->get_kind ())
+     {
+     default:
+     case SK_UNKNOWN: /* SK_UNKNOWN handled above.  */
+        gcc_unreachable ();
+ 
+     case SK_REGION:
+       {
+ 	/* If we have two region pointers, then we can merge (possibly to
+ 	   "unknown").  */
+ 	const region_svalue &region_sval_a = *as_a <region_svalue *> (sval_a);
+ 	const region_svalue &region_sval_b = *as_a <region_svalue *> (sval_b);
+ 	region_svalue::merge_values (region_sval_a, region_sval_b,
+ 				     merged_sid, type,
+ 				     this);
+ 	record_svalues (sid_a, sid_b, *merged_sid);
+ 	return true;
+       }
+       break;
+     case SK_CONSTANT:
+       {
+ 	/* If we have two constants, then we can merge.  */
+ 	const constant_svalue &cst_sval_a = *as_a <constant_svalue *> (sval_a);
+ 	const constant_svalue &cst_sval_b = *as_a <constant_svalue *> (sval_b);
+ 	constant_svalue::merge_values (cst_sval_a, cst_sval_b,
+ 				       merged_sid, this);
+ 	record_svalues (sid_a, sid_b, *merged_sid);
+ 	return true;
+       }
+       break;
+ 
+     case SK_POISONED:
+     case SK_SETJMP:
+       return false;
+     }
+ }
+ 
+ /* Record that A_RID in model A and B_RID in model B
+    correspond to MERGED_RID in the merged model, so
+    that pointers can be accurately merged.  */
+ 
+ void
+ model_merger::record_regions (region_id a_rid,
+ 			      region_id b_rid,
+ 			      region_id merged_rid)
+ {
+   m_map_regions_from_a_to_m.put (a_rid, merged_rid);
+   m_map_regions_from_b_to_m.put (b_rid, merged_rid);
+ }
+ 
+ /* Record that A_SID in model A and B_SID in model B
+    correspond to MERGED_SID in the merged model.  */
+ 
+ void
+ model_merger::record_svalues (svalue_id a_sid,
+ 			      svalue_id b_sid,
+ 			      svalue_id merged_sid)
+ {
+   gcc_assert (m_sid_mapping);
+   m_sid_mapping->m_map_from_a_to_m.put (a_sid, merged_sid);
+   m_sid_mapping->m_map_from_b_to_m.put (b_sid, merged_sid);
+ }
+ 
+ /* struct svalue_id_merger_mapping.  */
+ 
+ /* svalue_id_merger_mapping's ctor.  */
+ 
+ svalue_id_merger_mapping::svalue_id_merger_mapping (const region_model &a,
+ 						    const region_model &b)
+ : m_map_from_a_to_m (a.get_num_svalues ()),
+   m_map_from_b_to_m (b.get_num_svalues ())
+ {
+ }
+ 
+ /* Dump a multiline representation of this to PP.  */
+ 
+ void
+ svalue_id_merger_mapping::dump_to_pp (pretty_printer *pp) const
+ {
+   pp_string (pp, "svalue_id map: model A to merged model:");
+   pp_newline (pp);
+   m_map_from_a_to_m.dump_to_pp (pp);
+   pp_newline (pp);
+ 
+   pp_string (pp, "svalue_id map: model B to merged model:");
+   pp_newline (pp);
+   m_map_from_b_to_m.dump_to_pp (pp);
+   pp_newline (pp);
+ }
+ 
+ /* Dump a multiline representation of this to FILE.  */
+ 
+ void
+ svalue_id_merger_mapping::dump (FILE *fp) const
+ {
+   pretty_printer pp;
+   pp_format_decoder (&pp) = default_tree_printer;
+   pp_show_color (&pp) = pp_show_color (global_dc->printer);
+   pp.buffer->stream = fp;
+   dump_to_pp (&pp);
+   pp_flush (&pp);
+ }
+ 
+ /* Dump a multiline representation of this to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ svalue_id_merger_mapping::dump () const
+ {
+   dump (stderr);
+ }
+ 
+ /* struct canonicalization.  */
+ 
+ /* canonicalization's ctor.  */
+ 
+ canonicalization::canonicalization (const region_model &model)
+ : m_model (model),
+   m_rid_map (model.get_num_regions ()),
+   m_sid_map (model.get_num_svalues ()),
+   m_next_rid_int (0),
+   m_next_sid_int (0)
+ {
+ }
+ 
+ /* If we've not seen RID yet, assign it a canonicalized region_id,
+    and walk the region's svalue and then the region.  */
+ 
+ void
+ canonicalization::walk_rid (region_id rid)
+ {
+   /* Stop if we've already seen RID.  */
+   if (!m_rid_map.get_dst_for_src (rid).null_p ())
+     return;
+ 
+   region *region = m_model.get_region (rid);
+   if (region)
+     {
+       m_rid_map.put (rid, region_id::from_int (m_next_rid_int++));
+       walk_sid (region->get_value_direct ());
+       region->walk_for_canonicalization (this);
+     }
+ }
+ 
+ /* If we've not seen SID yet, assign it a canonicalized svalue_id,
+    and walk the svalue (and potentially regions e.g. for ptr values).  */
+ 
+ void
+ canonicalization::walk_sid (svalue_id sid)
+ {
+   /* Stop if we've already seen SID.  */
+   if (!m_sid_map.get_dst_for_src (sid).null_p ())
+     return;
+ 
+   svalue *sval = m_model.get_svalue (sid);
+   if (sval)
+     {
+       m_sid_map.put (sid, svalue_id::from_int (m_next_sid_int++));
+       /* Potentially walk regions e.g. for ptrs.  */
+       sval->walk_for_canonicalization (this);
+     }
+ }
+ 
+ /* Dump a multiline representation of this to PP.  */
+ 
+ void
+ canonicalization::dump_to_pp (pretty_printer *pp) const
+ {
+   pp_string (pp, "region_id map:");
+   pp_newline (pp);
+   m_rid_map.dump_to_pp (pp);
+   pp_newline (pp);
+ 
+   pp_string (pp, "svalue_id map:");
+   pp_newline (pp);
+   m_sid_map.dump_to_pp (pp);
+   pp_newline (pp);
+ }
+ 
+ /* Dump a multiline representation of this to FILE.  */
+ 
+ void
+ canonicalization::dump (FILE *fp) const
+ {
+   pretty_printer pp;
+   pp_format_decoder (&pp) = default_tree_printer;
+   pp_show_color (&pp) = pp_show_color (global_dc->printer);
+   pp.buffer->stream = fp;
+   dump_to_pp (&pp);
+   pp_flush (&pp);
+ }
+ 
+ /* Dump a multiline representation of this to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ canonicalization::dump () const
+ {
+   dump (stderr);
+ }
+ 
+ } // namespace ana
+ 
+ /* Update HSTATE with a hash of SID.  */
+ 
+ void
+ inchash::add (svalue_id sid, inchash::hash &hstate)
+ {
+   hstate.add_int (sid.as_int ());
+ }
+ 
+ /* Update HSTATE with a hash of RID.  */
+ 
+ void
+ inchash::add (region_id rid, inchash::hash &hstate)
+ {
+   hstate.add_int (rid.as_int ());
+ }
+ 
+ /* Dump RMODEL fully to stderr (i.e. without summarization).  */
+ 
+ DEBUG_FUNCTION void
+ debug (const region_model &rmodel)
+ {
+   rmodel.dump (false);
+ }
+ 
+ namespace ana {
+ 
+ #if CHECKING_P
+ 
+ namespace selftest {
+ 
+ /* Build a constant tree of the given type from STR.  */
+ 
+ static tree
+ build_real_cst_from_string (tree type, const char *str)
+ {
+   REAL_VALUE_TYPE real;
+   real_from_string (&real, str);
+   return build_real (type, real);
+ }
+ 
+ /* Append various "interesting" constants to OUT (e.g. NaN).  */
+ 
+ static void
+ append_interesting_constants (auto_vec<tree> *out)
+ {
+   out->safe_push (build_int_cst (integer_type_node, 0));
+   out->safe_push (build_int_cst (integer_type_node, 42));
+   out->safe_push (build_int_cst (unsigned_type_node, 0));
+   out->safe_push (build_int_cst (unsigned_type_node, 42));
+   out->safe_push (build_real_cst_from_string (float_type_node, "QNaN"));
+   out->safe_push (build_real_cst_from_string (float_type_node, "-QNaN"));
+   out->safe_push (build_real_cst_from_string (float_type_node, "SNaN"));
+   out->safe_push (build_real_cst_from_string (float_type_node, "-SNaN"));
+   out->safe_push (build_real_cst_from_string (float_type_node, "0.0"));
+   out->safe_push (build_real_cst_from_string (float_type_node, "-0.0"));
+   out->safe_push (build_real_cst_from_string (float_type_node, "Inf"));
+   out->safe_push (build_real_cst_from_string (float_type_node, "-Inf"));
+ }
+ 
+ /* Verify that tree_cmp is a well-behaved comparator for qsort, even
+    if the underlying constants aren't comparable.  */
+ 
+ static void
+ test_tree_cmp_on_constants ()
+ {
+   auto_vec<tree> csts;
+   append_interesting_constants (&csts);
+ 
+   /* Try sorting every triple. */
+   const unsigned num = csts.length ();
+   for (unsigned i = 0; i < num; i++)
+     for (unsigned j = 0; j < num; j++)
+       for (unsigned k = 0; k < num; k++)
+ 	{
+ 	  auto_vec<tree> v (3);
+ 	  v.quick_push (csts[i]);
+ 	  v.quick_push (csts[j]);
+ 	  v.quick_push (csts[k]);
+ 	  v.qsort (tree_cmp);
+ 	}
+ }
+ 
+ /* Implementation detail of the ASSERT_CONDITION_* macros.  */
+ 
+ void
+ assert_condition (const location &loc,
+ 		  region_model &model,
+ 		  tree lhs, tree_code op, tree rhs,
+ 		  tristate expected)
+ {
+   tristate actual = model.eval_condition (lhs, op, rhs, NULL);
+   ASSERT_EQ_AT (loc, actual, expected);
+ }
+ 
+ /* Implementation detail of ASSERT_DUMP_TREE_EQ.  */
+ 
+ static void
+ assert_dump_tree_eq (const location &loc, tree t, const char *expected)
+ {
+   auto_fix_quotes sentinel;
+   pretty_printer pp;
+   pp_format_decoder (&pp) = default_tree_printer;
+   dump_tree (&pp, t);
+   ASSERT_STREQ_AT (loc, pp_formatted_text (&pp), expected);
+ }
+ 
+ /* Assert that dump_tree (T) is EXPECTED.  */
+ 
+ #define ASSERT_DUMP_TREE_EQ(T, EXPECTED) \
+   SELFTEST_BEGIN_STMT							\
+   assert_dump_tree_eq ((SELFTEST_LOCATION), (T), (EXPECTED)); \
+   SELFTEST_END_STMT
+ 
+ /* Implementation detail of ASSERT_DUMP_EQ.  */
+ 
+ static void
+ assert_dump_eq (const location &loc,
+ 		const region_model &model,
+ 		bool summarize,
+ 		const char *expected)
+ {
+   auto_fix_quotes sentinel;
+   pretty_printer pp;
+   pp_format_decoder (&pp) = default_tree_printer;
+   model.dump_to_pp (&pp, summarize);
+   ASSERT_STREQ_AT (loc, pp_formatted_text (&pp), expected);
+ }
+ 
+ /* Assert that MODEL.dump_to_pp (SUMMARIZE) is EXPECTED.  */
+ 
+ #define ASSERT_DUMP_EQ(MODEL, SUMMARIZE, EXPECTED) \
+   SELFTEST_BEGIN_STMT							\
+   assert_dump_eq ((SELFTEST_LOCATION), (MODEL), (SUMMARIZE), (EXPECTED)); \
+   SELFTEST_END_STMT
+ 
+ /* Smoketest for region_model::dump_to_pp.  */
+ 
+ static void
+ test_dump ()
+ {
+   region_model model;
+   model.get_root_region ()->ensure_stack_region (&model);
+   model.get_root_region ()->ensure_globals_region (&model);
+   model.get_root_region ()->ensure_heap_region (&model);
+ 
+   ASSERT_DUMP_EQ (model, false,
+ 		  "r0: {kind: `root', parent: null, sval: null}\n"
+ 		  "|-stack: r1: {kind: `stack', parent: r0, sval: null}\n"
+ 		  "|-globals: r2: {kind: `globals', parent: r0, sval: null, map: {}}\n"
+ 		  "`-heap: r3: {kind: `heap', parent: r0, sval: null}\n"
+ 		  "svalues:\n"
+ 		  "constraint manager:\n"
+ 		  "  equiv classes:\n"
+ 		  "  constraints:\n");
+   ASSERT_DUMP_EQ (model, true, "");
+ }
+ 
+ /* Helper function for selftests.  Create a struct or union type named NAME,
+    with the fields given by the FIELD_DECLS in FIELDS.
+    If IS_STRUCT is true create a RECORD_TYPE (aka a struct), otherwise
+    create a UNION_TYPE.  */
+ 
+ static tree
+ make_test_compound_type (const char *name, bool is_struct,
+ 			 const auto_vec<tree> *fields)
+ {
+   tree t = make_node (is_struct ? RECORD_TYPE : UNION_TYPE);
+   TYPE_NAME (t) = get_identifier (name);
+   TYPE_SIZE (t) = 0;
+ 
+   tree fieldlist = NULL;
+   int i;
+   tree field;
+   FOR_EACH_VEC_ELT (*fields, i, field)
+     {
+       gcc_assert (TREE_CODE (field) == FIELD_DECL);
+       DECL_CONTEXT (field) = t;
+       fieldlist = chainon (field, fieldlist);
+     }
+   fieldlist = nreverse (fieldlist);
+   TYPE_FIELDS (t) = fieldlist;
+ 
+   layout_type (t);
+   return t;
+ }
+ 
+ /* Selftest fixture for creating the type "struct coord {int x; int y; };".  */
+ 
+ struct coord_test
+ {
+   coord_test ()
+   {
+     auto_vec<tree> fields;
+     m_x_field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
+ 			       get_identifier ("x"), integer_type_node);
+     fields.safe_push (m_x_field);
+     m_y_field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
+ 			       get_identifier ("y"), integer_type_node);
+     fields.safe_push (m_y_field);
+     m_coord_type = make_test_compound_type ("coord", true, &fields);
+   }
+ 
+   tree m_x_field;
+   tree m_y_field;
+   tree m_coord_type;
+ };
+ 
+ /* Verify that dumps can show struct fields.  */
+ 
+ static void
+ test_dump_2 ()
+ {
+   coord_test ct;
+ 
+   tree c = build_global_decl ("c", ct.m_coord_type);
+   tree c_x = build3 (COMPONENT_REF, TREE_TYPE (ct.m_x_field),
+ 		     c, ct.m_x_field, NULL_TREE);
+   tree c_y = build3 (COMPONENT_REF, TREE_TYPE (ct.m_y_field),
+ 		     c, ct.m_y_field, NULL_TREE);
+ 
+   tree int_17 = build_int_cst (integer_type_node, 17);
+   tree int_m3 = build_int_cst (integer_type_node, -3);
+ 
+   region_model model;
+   model.set_value (c_x, int_17, NULL);
+   model.set_value (c_y, int_m3, NULL);
+ 
+   /* Simplified dump.  */
+   ASSERT_DUMP_EQ (model, true, "c.x: 17, c.y: -3");
+ 
+   /* Full dump.  */
+   ASSERT_DUMP_EQ
+     (model, false,
+      "r0: {kind: `root', parent: null, sval: null}\n"
+      "`-globals: r1: {kind: `globals', parent: r0, sval: null, map: {`c': r2}}\n"
+      "  `-`c': r2: {kind: `struct', parent: r1, sval: null, type: `struct coord', map: {`x': r3, `y': r4}}\n"
+      "    |: type: `struct coord'\n"
+      "    |-`x': r3: {kind: `primitive', parent: r2, sval: sv0, type: `int'}\n"
+      "    |  |: sval: sv0: {type: `int', `17'}\n"
+      "    |  |: type: `int'\n"
+      "    `-`y': r4: {kind: `primitive', parent: r2, sval: sv1, type: `int'}\n"
+      "      |: sval: sv1: {type: `int', `-3'}\n"
+      "      |: type: `int'\n"
+      "svalues:\n"
+      "  sv0: {type: `int', `17'}\n"
+      "  sv1: {type: `int', `-3'}\n"
+      "constraint manager:\n"
+      "  equiv classes:\n"
+      "  constraints:\n");
+ }
+ 
+ /* Verify that dumps can show array elements.  */
+ 
+ static void
+ test_dump_3 ()
+ {
+   tree tlen = size_int (10);
+   tree arr_type = build_array_type (char_type_node, build_index_type (tlen));
+ 
+   tree a = build_global_decl ("a", arr_type);
+ 
+   region_model model;
+   tree int_0 = build_int_cst (integer_type_node, 0);
+   tree a_0 = build4 (ARRAY_REF, char_type_node,
+ 		     a, int_0, NULL_TREE, NULL_TREE);
+   tree char_A = build_int_cst (char_type_node, 'A');
+   model.set_value (a_0, char_A, NULL);
+ 
+   /* Simplified dump.  */
+   ASSERT_DUMP_EQ (model, true, "a[0]: 65");
+ 
+   /* Full dump.  */
+   ASSERT_DUMP_EQ
+     (model, false,
+      "r0: {kind: `root', parent: null, sval: null}\n"
+      "`-globals: r1: {kind: `globals', parent: r0, sval: null, map: {`a': r2}}\n"
+      "  `-`a': r2: {kind: `array', parent: r1, sval: null, type: `char[11]', array: {[0]: r3}}\n"
+      "    |: type: `char[11]'\n"
+      "    `-[0]: r3: {kind: `primitive', parent: r2, sval: sv1, type: `char'}\n"
+      "      |: sval: sv1: {type: `char', `65'}\n"
+      "      |: type: `char'\n"
+      "svalues:\n"
+      "  sv0: {type: `int', `0'}\n"
+      "  sv1: {type: `char', `65'}\n"
+      "constraint manager:\n"
+      "  equiv classes:\n"
+      "  constraints:\n");
+ }
+ 
+ /* Verify that region_model::get_representative_tree works as expected.  */
+ 
+ static void
+ test_get_representative_tree ()
+ {
+   /* STRING_CST.  */
+   {
+     tree string_cst = build_string (4, "foo");
+     region_model m;
+     svalue_id str_sid = m.get_rvalue (string_cst, NULL);
+     tree rep = m.get_representative_tree (str_sid);
+     ASSERT_EQ (rep, string_cst);
+   }
+ 
+   /* String literal.  */
+   {
+     tree string_cst_ptr = build_string_literal (4, "foo");
+     region_model m;
+     svalue_id str_sid = m.get_rvalue (string_cst_ptr, NULL);
+     tree rep = m.get_representative_tree (str_sid);
+     ASSERT_DUMP_TREE_EQ (rep, "&\"foo\"[0]");
+   }
+ }
+ 
+ /* Verify that calling region_model::get_rvalue repeatedly on the same
+    tree constant retrieves the same svalue_id.  */
+ 
+ static void
+ test_unique_constants ()
+ {
+   tree int_0 = build_int_cst (integer_type_node, 0);
+   tree int_42 = build_int_cst (integer_type_node, 42);
+ 
+   test_region_model_context ctxt;
+   region_model model;
+   ASSERT_EQ (model.get_rvalue (int_0, &ctxt), model.get_rvalue (int_0, &ctxt));
+   ASSERT_EQ (model.get_rvalue (int_42, &ctxt),
+ 	     model.get_rvalue (int_42, &ctxt));
+   ASSERT_NE (model.get_rvalue (int_0, &ctxt), model.get_rvalue (int_42, &ctxt));
+   ASSERT_EQ (ctxt.get_num_diagnostics (), 0);
+ }
+ 
+ /* Check that operator== and hashing works as expected for the
+    various svalue subclasses.  */
+ 
+ static void
+ test_svalue_equality ()
+ {
+   tree int_42 = build_int_cst (integer_type_node, 42);
+   tree int_0 = build_int_cst (integer_type_node, 0);
+ 
+   /* Create pairs instances of the various subclasses of svalue,
+      testing for hash and equality between (this, this) and
+      (this, other of same subclass). */
+   svalue *ptr_to_r0
+     = new region_svalue (ptr_type_node, region_id::from_int (0));
+   svalue *ptr_to_r1
+     = new region_svalue (ptr_type_node, region_id::from_int (1));
+ 
+   ASSERT_EQ (ptr_to_r0->hash (), ptr_to_r0->hash ());
+   ASSERT_EQ (*ptr_to_r0, *ptr_to_r0);
+ 
+   ASSERT_NE (ptr_to_r0->hash (), ptr_to_r1->hash ());
+   ASSERT_NE (*ptr_to_r0, *ptr_to_r1);
+ 
+   svalue *cst_int_42 = new constant_svalue (int_42);
+   svalue *cst_int_0 = new constant_svalue (int_0);
+ 
+   ASSERT_EQ (cst_int_42->hash (), cst_int_42->hash ());
+   ASSERT_EQ (*cst_int_42, *cst_int_42);
+ 
+   ASSERT_NE (cst_int_42->hash (), cst_int_0->hash ());
+   ASSERT_NE (*cst_int_42, *cst_int_0);
+ 
+   svalue *unknown_0 = new unknown_svalue (ptr_type_node);
+   svalue *unknown_1 = new unknown_svalue (ptr_type_node);
+   ASSERT_EQ (unknown_0->hash (), unknown_0->hash ());
+   ASSERT_EQ (*unknown_0, *unknown_0);
+   ASSERT_EQ (*unknown_1, *unknown_1);
+ 
+   /* Comparisons between different kinds of svalue.  */
+   ASSERT_NE (*ptr_to_r0, *cst_int_42);
+   ASSERT_NE (*ptr_to_r0, *unknown_0);
+   ASSERT_NE (*cst_int_42, *ptr_to_r0);
+   ASSERT_NE (*cst_int_42, *unknown_0);
+   ASSERT_NE (*unknown_0, *ptr_to_r0);
+   ASSERT_NE (*unknown_0, *cst_int_42);
+ 
+   delete ptr_to_r0;
+   delete ptr_to_r1;
+   delete cst_int_42;
+   delete cst_int_0;
+   delete unknown_0;
+   delete unknown_1;
+ }
+ 
+ /* Check that operator== and hashing works as expected for the
+    various region subclasses.  */
+ 
+ static void
+ test_region_equality ()
+ {
+   region *r0
+     = new primitive_region (region_id::from_int (3), integer_type_node);
+   region *r1
+     = new primitive_region (region_id::from_int (4), integer_type_node);
+ 
+   ASSERT_EQ (*r0, *r0);
+   ASSERT_EQ (r0->hash (), r0->hash ());
+   ASSERT_NE (*r0, *r1);
+   ASSERT_NE (r0->hash (), r1->hash ());
+ 
+   delete r0;
+   delete r1;
+ 
+   // TODO: test coverage for the map within a map_region
+ }
+ 
+ /* A subclass of purge_criteria for selftests: purge all svalue_id instances.  */
+ 
+ class purge_all_svalue_ids : public purge_criteria
+ {
+ public:
+   bool should_purge_p (svalue_id) const FINAL OVERRIDE
+   {
+     return true;
+   }
+ };
+ 
+ /* A subclass of purge_criteria: purge a specific svalue_id.  */
+ 
+ class purge_one_svalue_id : public purge_criteria
+ {
+ public:
+   purge_one_svalue_id (svalue_id victim) : m_victim (victim) {}
+ 
+   purge_one_svalue_id (region_model model, tree expr)
+   : m_victim (model.get_rvalue (expr, NULL)) {}
+ 
+   bool should_purge_p (svalue_id sid) const FINAL OVERRIDE
+   {
+     return sid == m_victim;
+   }
+ 
+ private:
+   svalue_id m_victim;
+ };
+ 
+ /* Check that constraint_manager::purge works for individual svalue_ids.  */
+ 
+ static void
+ test_purging_by_criteria ()
+ {
+   tree int_42 = build_int_cst (integer_type_node, 42);
+   tree int_0 = build_int_cst (integer_type_node, 0);
+ 
+   tree x = build_global_decl ("x", integer_type_node);
+   tree y = build_global_decl ("y", integer_type_node);
+ 
+   {
+     region_model model0;
+     region_model model1;
+ 
+     ADD_SAT_CONSTRAINT (model1, x, EQ_EXPR, y);
+     ASSERT_NE (model0, model1);
+ 
+     purge_stats stats_for_px;
+     purge_one_svalue_id px (model1, x);
+     model1.get_constraints ()->purge (px, &stats_for_px);
+     ASSERT_EQ (stats_for_px.m_num_equiv_classes, 0);
+ 
+     purge_stats stats_for_py;
+     purge_one_svalue_id py (model1.get_rvalue (y, NULL));
+     model1.get_constraints ()->purge (py, &stats_for_py);
+     ASSERT_EQ (stats_for_py.m_num_equiv_classes, 1);
+ 
+     ASSERT_EQ (*model0.get_constraints (), *model1.get_constraints ());
+   }
+ 
+   {
+     region_model model0;
+     region_model model1;
+ 
+     ADD_SAT_CONSTRAINT (model1, x, EQ_EXPR, int_42);
+     ASSERT_NE (model0, model1);
+     ASSERT_CONDITION_TRUE (model1, x, EQ_EXPR, int_42);
+ 
+     purge_stats stats;
+     model1.get_constraints ()->purge (purge_one_svalue_id (model1, x), &stats);
+ 
+     ASSERT_CONDITION_UNKNOWN (model1, x, EQ_EXPR, int_42);
+   }
+ 
+   {
+     region_model model0;
+     region_model model1;
+ 
+     ADD_SAT_CONSTRAINT (model1, x, GE_EXPR, int_0);
+     ADD_SAT_CONSTRAINT (model1, x, LE_EXPR, int_42);
+     ASSERT_NE (model0, model1);
+ 
+     ASSERT_CONDITION_TRUE (model1, x, GE_EXPR, int_0);
+     ASSERT_CONDITION_TRUE (model1, x, LE_EXPR, int_42);
+ 
+     purge_stats stats;
+     model1.get_constraints ()->purge (purge_one_svalue_id (model1, x), &stats);
+ 
+     ASSERT_CONDITION_UNKNOWN (model1, x, GE_EXPR, int_0);
+     ASSERT_CONDITION_UNKNOWN (model1, x, LE_EXPR, int_42);
+   }
+ 
+   {
+     region_model model0;
+     region_model model1;
+ 
+     ADD_SAT_CONSTRAINT (model1, x, NE_EXPR, int_42);
+     ADD_SAT_CONSTRAINT (model1, y, NE_EXPR, int_0);
+     ASSERT_NE (model0, model1);
+     ASSERT_CONDITION_TRUE (model1, x, NE_EXPR, int_42);
+     ASSERT_CONDITION_TRUE (model1, y, NE_EXPR, int_0);
+ 
+     purge_stats stats;
+     model1.get_constraints ()->purge (purge_one_svalue_id (model1, x), &stats);
+     ASSERT_NE (model0, model1);
+ 
+     ASSERT_CONDITION_UNKNOWN (model1, x, NE_EXPR, int_42);
+     ASSERT_CONDITION_TRUE (model1, y, NE_EXPR, int_0);
+   }
+ 
+   {
+     region_model model0;
+     region_model model1;
+ 
+     ADD_SAT_CONSTRAINT (model1, x, NE_EXPR, int_42);
+     ADD_SAT_CONSTRAINT (model1, y, NE_EXPR, int_0);
+     ASSERT_NE (model0, model1);
+     ASSERT_CONDITION_TRUE (model1, x, NE_EXPR, int_42);
+     ASSERT_CONDITION_TRUE (model1, y, NE_EXPR, int_0);
+ 
+     purge_stats stats;
+     model1.get_constraints ()->purge (purge_all_svalue_ids (), &stats);
+     ASSERT_CONDITION_UNKNOWN (model1, x, NE_EXPR, int_42);
+     ASSERT_CONDITION_UNKNOWN (model1, y, NE_EXPR, int_0);
+   }
+ 
+ }
+ 
+ /* Test that region_model::purge_unused_svalues works as expected.  */
+ 
+ static void
+ test_purge_unused_svalues ()
+ {
+   tree int_42 = build_int_cst (integer_type_node, 42);
+   tree int_0 = build_int_cst (integer_type_node, 0);
+   tree x = build_global_decl ("x", integer_type_node);
+   tree y = build_global_decl ("y", integer_type_node);
+ 
+   test_region_model_context ctxt;
+   region_model model;
+   model.set_to_new_unknown_value (model.get_lvalue (x, &ctxt), TREE_TYPE (x),
+ 				  &ctxt);
+   model.set_to_new_unknown_value (model.get_lvalue (x, &ctxt), TREE_TYPE (x),
+ 				  &ctxt);
+   model.set_to_new_unknown_value (model.get_lvalue (x, &ctxt), TREE_TYPE (x),
+ 				  &ctxt);
+   model.add_constraint (x, NE_EXPR, int_42, &ctxt);
+ 
+   model.set_value (model.get_lvalue (x, &ctxt),
+ 		   model.get_rvalue (int_42, &ctxt),
+ 		   &ctxt);
+   model.add_constraint (y, GT_EXPR, int_0, &ctxt);
+ 
+   /* The redundant unknown values should have been purged.  */
+   purge_stats purged;
+   model.purge_unused_svalues (&purged, NULL);
+   ASSERT_EQ (purged.m_num_svalues, 3);
+ 
+   /* and the redundant constraint on an old, unknown value for x should
+      have been purged.  */
+   ASSERT_EQ (purged.m_num_equiv_classes, 1);
+   ASSERT_EQ (purged.m_num_constraints, 1);
+   ASSERT_EQ (model.get_constraints ()->m_constraints.length (), 2);
+ 
+   /* ...but we should still have x == 42.  */
+   ASSERT_EQ (model.eval_condition (x, EQ_EXPR, int_42, &ctxt),
+ 	     tristate::TS_TRUE);
+ 
+   /* ...and we should still have the constraint on y.  */
+   ASSERT_EQ (model.eval_condition (y, GT_EXPR, int_0, &ctxt),
+ 	     tristate::TS_TRUE);
+ 
+   ASSERT_EQ (ctxt.get_num_diagnostics (), 0);
+ }
+ 
+ /* Verify that simple assignments work as expected.  */
+ 
+ static void
+ test_assignment ()
+ {
+   tree int_0 = build_int_cst (integer_type_node, 0);
+   tree x = build_global_decl ("x", integer_type_node);
+   tree y = build_global_decl ("y", integer_type_node);
+ 
+   /* "x == 0", then use of y, then "y = 0;".  */
+   region_model model;
+   ADD_SAT_CONSTRAINT (model, x, EQ_EXPR, int_0);
+   ASSERT_CONDITION_UNKNOWN (model, y, EQ_EXPR, int_0);
+   model.set_value (model.get_lvalue (y, NULL),
+ 		   model.get_rvalue (int_0, NULL),
+ 		   NULL);
+   ASSERT_CONDITION_TRUE (model, y, EQ_EXPR, int_0);
+   ASSERT_CONDITION_TRUE (model, y, EQ_EXPR, x);
+ 
+   ASSERT_DUMP_EQ (model, true, "y: 0, {x}: unknown, x == y");
+ }
+ 
+ /* Verify that compound assignments work as expected.  */
+ 
+ static void
+ test_compound_assignment ()
+ {
+   coord_test ct;
+ 
+   tree c = build_global_decl ("c", ct.m_coord_type);
+   tree c_x = build3 (COMPONENT_REF, TREE_TYPE (ct.m_x_field),
+ 		     c, ct.m_x_field, NULL_TREE);
+   tree c_y = build3 (COMPONENT_REF, TREE_TYPE (ct.m_y_field),
+ 		     c, ct.m_y_field, NULL_TREE);
+   tree d = build_global_decl ("d", ct.m_coord_type);
+   tree d_x = build3 (COMPONENT_REF, TREE_TYPE (ct.m_x_field),
+ 		     d, ct.m_x_field, NULL_TREE);
+   tree d_y = build3 (COMPONENT_REF, TREE_TYPE (ct.m_y_field),
+ 		     d, ct.m_y_field, NULL_TREE);
+ 
+   tree int_17 = build_int_cst (integer_type_node, 17);
+   tree int_m3 = build_int_cst (integer_type_node, -3);
+ 
+   region_model model;
+   model.set_value (c_x, int_17, NULL);
+   model.set_value (c_y, int_m3, NULL);
+ 
+   ASSERT_DUMP_EQ (model, true, "c.x: 17, c.y: -3");
+ 
+   /* Copy c to d.  */
+   model.copy_region (model.get_lvalue (d, NULL), model.get_lvalue (c, NULL),
+ 		     NULL);
+   /* Check that the fields have the same svalues.  */
+   ASSERT_EQ (model.get_rvalue (c_x, NULL), model.get_rvalue (d_x, NULL));
+   ASSERT_EQ (model.get_rvalue (c_y, NULL), model.get_rvalue (d_y, NULL));
+ }
+ 
+ /* Verify the details of pushing and popping stack frames.  */
+ 
+ static void
+ test_stack_frames ()
+ {
+   tree int_42 = build_int_cst (integer_type_node, 42);
+   tree int_10 = build_int_cst (integer_type_node, 10);
+   tree int_5 = build_int_cst (integer_type_node, 5);
+   tree int_0 = build_int_cst (integer_type_node, 0);
+ 
+   auto_vec <tree> param_types;
+   tree parent_fndecl = make_fndecl (integer_type_node,
+ 				    "parent_fn",
+ 				    param_types);
+   allocate_struct_function (parent_fndecl, true);
+ 
+   tree child_fndecl = make_fndecl (integer_type_node,
+ 				   "child_fn",
+ 				   param_types);
+   allocate_struct_function (child_fndecl, true);
+ 
+   /* "a" and "b" in the parent frame.  */
+   tree a = build_decl (UNKNOWN_LOCATION, PARM_DECL,
+ 		       get_identifier ("a"),
+ 		       integer_type_node);
+   tree b = build_decl (UNKNOWN_LOCATION, PARM_DECL,
+ 		       get_identifier ("b"),
+ 		       integer_type_node);
+   /* "x" and "y" in a child frame.  */
+   tree x = build_decl (UNKNOWN_LOCATION, PARM_DECL,
+ 		       get_identifier ("x"),
+ 		       integer_type_node);
+   tree y = build_decl (UNKNOWN_LOCATION, PARM_DECL,
+ 		       get_identifier ("y"),
+ 		       integer_type_node);
+ 
+   /* "p" global.  */
+   tree p = build_global_decl ("p", ptr_type_node);
+ 
+   /* "q" global.  */
+   tree q = build_global_decl ("q", ptr_type_node);
+ 
+   test_region_model_context ctxt;
+   region_model model;
+ 
+   /* Push stack frame for "parent_fn".  */
+   region_id parent_frame_rid
+     = model.push_frame (DECL_STRUCT_FUNCTION (parent_fndecl), NULL, &ctxt);
+   ASSERT_EQ (model.get_current_frame_id (), parent_frame_rid);
+   region_id a_in_parent_rid = model.get_lvalue (a, &ctxt);
+   model.set_value (a_in_parent_rid, model.get_rvalue (int_42, &ctxt), &ctxt);
+   model.set_to_new_unknown_value (model.get_lvalue (b, &ctxt),
+ 				  integer_type_node, &ctxt);
+   model.add_constraint (b, LT_EXPR, int_10, &ctxt);
+   ASSERT_EQ (model.eval_condition (b, LT_EXPR, int_10, &ctxt),
+ 	     tristate (tristate::TS_TRUE));
+ 
+   /* Push stack frame for "child_fn".  */
+   region_id child_frame_rid
+     = model.push_frame (DECL_STRUCT_FUNCTION (child_fndecl), NULL, &ctxt);
+   ASSERT_EQ (model.get_current_frame_id (), child_frame_rid);
+   region_id x_in_child_rid = model.get_lvalue (x, &ctxt);
+   model.set_value (x_in_child_rid, model.get_rvalue (int_0, &ctxt), &ctxt);
+   model.set_to_new_unknown_value (model.get_lvalue (y, &ctxt),
+ 				  integer_type_node, &ctxt);
+   model.add_constraint (y, NE_EXPR, int_5, &ctxt);
+   ASSERT_EQ (model.eval_condition (y, NE_EXPR, int_5, &ctxt),
+ 	     tristate (tristate::TS_TRUE));
+ 
+   /* Point a global pointer at a local in the child frame:  p = &x.  */
+   region_id p_in_globals_rid = model.get_lvalue (p, &ctxt);
+   model.set_value (p_in_globals_rid,
+ 		   model.get_or_create_ptr_svalue (ptr_type_node,
+ 						   x_in_child_rid),
+ 		   &ctxt);
+ 
+   /* Point another global pointer at p: q = &p.  */
+   region_id q_in_globals_rid = model.get_lvalue (q, &ctxt);
+   model.set_value (q_in_globals_rid,
+ 		   model.get_or_create_ptr_svalue (ptr_type_node,
+ 						   p_in_globals_rid),
+ 		   &ctxt);
+ 
+   /* Test get_descendents.  */
+   region_id_set descendents (&model);
+   model.get_descendents (child_frame_rid, &descendents, region_id::null ());
+   ASSERT_TRUE (descendents.region_p (child_frame_rid));
+   ASSERT_TRUE (descendents.region_p (x_in_child_rid));
+   ASSERT_FALSE (descendents.region_p (a_in_parent_rid));
+   ASSERT_EQ (descendents.num_regions (), 3);
+ #if 0
+   auto_vec<region_id> test_vec;
+   for (region_id_set::iterator_t iter = descendents.begin ();
+        iter != descendents.end ();
+        ++iter)
+     test_vec.safe_push (*iter);
+   gcc_unreachable (); // TODO
+   //ASSERT_EQ ();
+ #endif
+ 
+   ASSERT_DUMP_EQ (model, true,
+ 		  "a: 42, x: 0, p: &x, q: &p, {b, y}: unknown, b < 10, y != 5");
+ 
+   /* Pop the "child_fn" frame from the stack.  */
+   purge_stats purged;
+   model.pop_frame (region_id::null (), true, &purged, &ctxt);
+ 
+   /* We should have purged the unknown values for x and y. */
+   ASSERT_EQ (purged.m_num_svalues, 2);
+ 
+   /* We should have purged the frame region and the regions for x and y. */
+   ASSERT_EQ (purged.m_num_regions, 3);
+ 
+   /* We should have purged the constraint on y.  */
+   ASSERT_EQ (purged.m_num_equiv_classes, 1);
+   ASSERT_EQ (purged.m_num_constraints, 1);
+ 
+   /* Verify that p (which was pointing at the local "x" in the popped
+      frame) has been poisoned.  */
+   svalue *new_p_sval = model.get_svalue (model.get_rvalue (p, &ctxt));
+   ASSERT_EQ (new_p_sval->get_kind (), SK_POISONED);
+   ASSERT_EQ (new_p_sval->dyn_cast_poisoned_svalue ()->get_poison_kind (),
+ 	     POISON_KIND_POPPED_STACK);
+ 
+   /* Verify that q still points to p, in spite of the region
+      renumbering.  */
+   svalue *new_q_sval = model.get_svalue (model.get_rvalue (q, &ctxt));
+   ASSERT_EQ (new_q_sval->get_kind (), SK_REGION);
+   ASSERT_EQ (new_q_sval->dyn_cast_region_svalue ()->get_pointee (),
+ 	     model.get_lvalue (p, &ctxt));
+ 
+   /* Verify that top of stack has been updated.  */
+   ASSERT_EQ (model.get_current_frame_id (), parent_frame_rid);
+ 
+   /* Verify locals in parent frame.  */
+   /* Verify "a" still has its value.  */
+   svalue *new_a_sval = model.get_svalue (model.get_rvalue (a, &ctxt));
+   ASSERT_EQ (new_a_sval->get_kind (), SK_CONSTANT);
+   ASSERT_EQ (new_a_sval->dyn_cast_constant_svalue ()->get_constant (),
+ 	     int_42);
+   /* Verify "b" still has its constraint.  */
+   ASSERT_EQ (model.eval_condition (b, LT_EXPR, int_10, &ctxt),
+ 	     tristate (tristate::TS_TRUE));
+ }
+ 
+ /* Verify that get_representative_path_var works as expected, that
+    we can map from region ids to parms and back within a recursive call
+    stack.  */
+ 
+ static void
+ test_get_representative_path_var ()
+ {
+   auto_vec <tree> param_types;
+   tree fndecl = make_fndecl (integer_type_node,
+ 			     "factorial",
+ 			     param_types);
+   allocate_struct_function (fndecl, true);
+ 
+   /* Parm "n".  */
+   tree n = build_decl (UNKNOWN_LOCATION, PARM_DECL,
+ 		       get_identifier ("n"),
+ 		       integer_type_node);
+ 
+   region_model model;
+ 
+   /* Push 5 stack frames for "factorial", each with a param  */
+   auto_vec<region_id> parm_rids;
+   auto_vec<svalue_id> parm_sids;
+   for (int depth = 0; depth < 5; depth++)
+     {
+       region_id frame_rid
+ 	= model.push_frame (DECL_STRUCT_FUNCTION (fndecl), NULL, NULL);
+       region_id rid_n = model.get_lvalue (path_var (n, depth), NULL);
+       parm_rids.safe_push (rid_n);
+ 
+       ASSERT_EQ (model.get_region (rid_n)->get_parent (), frame_rid);
+ 
+       svalue_id sid_n
+ 	= model.set_to_new_unknown_value (rid_n, integer_type_node, NULL);
+       parm_sids.safe_push (sid_n);
+     }
+ 
+   /* Verify that we can recognize that the regions are the parms,
+      at every depth.  */
+   for (int depth = 0; depth < 5; depth++)
+     {
+       ASSERT_EQ (model.get_representative_path_var (parm_rids[depth]),
+ 		 path_var (n, depth));
+       /* ...and that we can lookup lvalues for locals for all frames,
+ 	 not just the top.  */
+       ASSERT_EQ (model.get_lvalue (path_var (n, depth), NULL),
+ 		 parm_rids[depth]);
+       /* ...and that we can locate the svalues.  */
+       auto_vec<path_var> pvs;
+       model.get_path_vars_for_svalue (parm_sids[depth], &pvs);
+       ASSERT_EQ (pvs.length (), 1);
+       ASSERT_EQ (pvs[0], path_var (n, depth));
+     }
+ }
+ 
+ /* Verify that the core regions within a region_model are in a consistent
+    order after canonicalization.  */
+ 
+ static void
+ test_canonicalization_1 ()
+ {
+   region_model model0;
+   model0.get_root_region ()->ensure_stack_region (&model0);
+   model0.get_root_region ()->ensure_globals_region (&model0);
+ 
+   region_model model1;
+   model1.get_root_region ()->ensure_globals_region (&model1);
+   model1.get_root_region ()->ensure_stack_region (&model1);
+ 
+   model0.canonicalize (NULL);
+   model1.canonicalize (NULL);
+   ASSERT_EQ (model0, model1);
+ }
+ 
+ /* Verify that region models for
+       x = 42; y = 113;
+    and
+       y = 113; x = 42;
+    are equal after canonicalization.  */
+ 
+ static void
+ test_canonicalization_2 ()
+ {
+   tree int_42 = build_int_cst (integer_type_node, 42);
+   tree int_113 = build_int_cst (integer_type_node, 113);
+   tree x = build_global_decl ("x", integer_type_node);
+   tree y = build_global_decl ("y", integer_type_node);
+ 
+   region_model model0;
+   model0.set_value (model0.get_lvalue (x, NULL),
+ 		    model0.get_rvalue (int_42, NULL),
+ 		    NULL);
+   model0.set_value (model0.get_lvalue (y, NULL),
+ 		    model0.get_rvalue (int_113, NULL),
+ 		    NULL);
+ 
+   region_model model1;
+   model1.set_value (model1.get_lvalue (y, NULL),
+ 		    model1.get_rvalue (int_113, NULL),
+ 		    NULL);
+   model1.set_value (model1.get_lvalue (x, NULL),
+ 		    model1.get_rvalue (int_42, NULL),
+ 		    NULL);
+ 
+   model0.canonicalize (NULL);
+   model1.canonicalize (NULL);
+   ASSERT_EQ (model0, model1);
+ }
+ 
+ /* Verify that constraints for
+      x > 3 && y > 42
+    and
+      y > 42 && x > 3
+    are equal after canonicalization.  */
+ 
+ static void
+ test_canonicalization_3 ()
+ {
+   tree int_3 = build_int_cst (integer_type_node, 3);
+   tree int_42 = build_int_cst (integer_type_node, 42);
+   tree x = build_global_decl ("x", integer_type_node);
+   tree y = build_global_decl ("y", integer_type_node);
+ 
+   region_model model0;
+   model0.add_constraint (x, GT_EXPR, int_3, NULL);
+   model0.add_constraint (y, GT_EXPR, int_42, NULL);
+ 
+   region_model model1;
+   model1.add_constraint (y, GT_EXPR, int_42, NULL);
+   model1.add_constraint (x, GT_EXPR, int_3, NULL);
+ 
+   model0.canonicalize (NULL);
+   model1.canonicalize (NULL);
+   ASSERT_EQ (model0, model1);
+ }
+ 
+ /* Verify that we can canonicalize a model containing NaN and other real
+    constants.  */
+ 
+ static void
+ test_canonicalization_4 ()
+ {
+   auto_vec<tree> csts;
+   append_interesting_constants (&csts);
+ 
+   region_model model;
+ 
+   unsigned i;
+   tree cst;
+   FOR_EACH_VEC_ELT (csts, i, cst)
+     model.get_rvalue (cst, NULL);
+ 
+   model.canonicalize (NULL);
+ }
+ 
+ /* Assert that if we have two region_model instances
+    with values VAL_A and VAL_B for EXPR that they are
+    mergable.  Write the merged model to *OUT_MERGED_MODEL,
+    and the merged svalue ptr to *OUT_MERGED_SVALUE.
+    If VAL_A or VAL_B are NULL_TREE, don't populate EXPR
+    for that region_model.  */
+ 
+ static void
+ assert_region_models_merge (tree expr, tree val_a, tree val_b,
+ 			    region_model *out_merged_model,
+ 			    svalue **out_merged_svalue)
+ {
+   test_region_model_context ctxt;
+   region_model model0;
+   region_model model1;
+   if (val_a)
+     model0.set_value (model0.get_lvalue (expr, &ctxt),
+ 		      model0.get_rvalue (val_a, &ctxt),
+ 		      &ctxt);
+   if (val_b)
+     model1.set_value (model1.get_lvalue (expr, &ctxt),
+ 		      model1.get_rvalue (val_b, &ctxt),
+ 		      &ctxt);
+ 
+   /* They should be mergeable.  */
+   ASSERT_TRUE (model0.can_merge_with_p (model1, out_merged_model));
+ 
+   svalue_id merged_svalue_sid = out_merged_model->get_rvalue (expr, &ctxt);
+   *out_merged_svalue = out_merged_model->get_svalue (merged_svalue_sid);
+ }
+ 
+ /* Verify that we can merge region_model instances.  */
+ 
+ static void
+ test_state_merging ()
+ {
+   tree int_42 = build_int_cst (integer_type_node, 42);
+   tree int_113 = build_int_cst (integer_type_node, 113);
+   tree x = build_global_decl ("x", integer_type_node);
+   tree y = build_global_decl ("y", integer_type_node);
+   tree z = build_global_decl ("z", integer_type_node);
+   tree p = build_global_decl ("p", ptr_type_node);
+ 
+   tree addr_of_y = build1 (ADDR_EXPR, ptr_type_node, y);
+   tree addr_of_z = build1 (ADDR_EXPR, ptr_type_node, z);
+ 
+   auto_vec <tree> param_types;
+   tree test_fndecl = make_fndecl (integer_type_node, "test_fn", param_types);
+   allocate_struct_function (test_fndecl, true);
+ 
+   /* Param "a".  */
+   tree a = build_decl (UNKNOWN_LOCATION, PARM_DECL,
+ 		       get_identifier ("a"),
+ 		       integer_type_node);
+   tree addr_of_a = build1 (ADDR_EXPR, ptr_type_node, a);
+ 
+   /* Param "q", a pointer.  */
+   tree q = build_decl (UNKNOWN_LOCATION, PARM_DECL,
+ 		       get_identifier ("q"),
+ 		       ptr_type_node);
+ 
+   {
+     region_model model0;
+     region_model model1;
+     region_model merged;
+     /* Verify empty models can be merged.  */
+     ASSERT_TRUE (model0.can_merge_with_p (model1, &merged));
+     ASSERT_EQ (model0, merged);
+   }
+ 
+   /* Verify that we can merge two contradictory constraints on the
+      value for a global.  */
+   /* TODO: verify that the merged model doesn't have a value for
+      the global  */
+   {
+     region_model model0;
+     region_model model1;
+     region_model merged;
+     test_region_model_context ctxt;
+     model0.add_constraint (x, EQ_EXPR, int_42, &ctxt);
+     model1.add_constraint (x, EQ_EXPR, int_113, &ctxt);
+     ASSERT_TRUE (model0.can_merge_with_p (model1, &merged));
+     ASSERT_NE (model0, merged);
+     ASSERT_NE (model1, merged);
+   }
+ 
+   /* Verify handling of a PARM_DECL.  */
+   {
+     test_region_model_context ctxt;
+     region_model model0;
+     region_model model1;
+     ASSERT_EQ (model0.get_stack_depth (), 0);
+     model0.push_frame (DECL_STRUCT_FUNCTION (test_fndecl), NULL, &ctxt);
+     ASSERT_EQ (model0.get_stack_depth (), 1);
+     ASSERT_EQ (model0.get_function_at_depth (0),
+ 	       DECL_STRUCT_FUNCTION (test_fndecl));
+     model1.push_frame (DECL_STRUCT_FUNCTION (test_fndecl), NULL, &ctxt);
+ 
+     svalue_id sid_a
+       = model0.set_to_new_unknown_value (model0.get_lvalue (a, &ctxt),
+ 					 integer_type_node, &ctxt);
+     model1.set_to_new_unknown_value (model1.get_lvalue (a, &ctxt),
+ 				     integer_type_node, &ctxt);
+     ASSERT_EQ (model0, model1);
+ 
+     /* Check that get_value_by_name works for locals.  */
+     ASSERT_EQ (model0.get_value_by_name ("a"), sid_a);
+ 
+     /* They should be mergeable, and the result should be the same.  */
+     region_model merged;
+     ASSERT_TRUE (model0.can_merge_with_p (model1, &merged));
+     ASSERT_EQ (model0, merged);
+     /* In particular, there should be an unknown value for "a".  */
+     svalue *merged_a_sval = merged.get_svalue (merged.get_rvalue (a, &ctxt));
+     ASSERT_EQ (merged_a_sval->get_kind (), SK_UNKNOWN);
+   }
+ 
+   /* Verify handling of a global.  */
+   {
+     test_region_model_context ctxt;
+     region_model model0;
+     region_model model1;
+     svalue_id sid_x
+       = model0.set_to_new_unknown_value (model0.get_lvalue (x, &ctxt),
+ 					 integer_type_node, &ctxt);
+     model1.set_to_new_unknown_value (model1.get_lvalue (x, &ctxt),
+ 				     integer_type_node, &ctxt);
+     ASSERT_EQ (model0, model1);
+ 
+     /* Check that get_value_by_name works for globals.  */
+     ASSERT_EQ (model0.get_value_by_name ("x"), sid_x);
+ 
+     /* They should be mergeable, and the result should be the same.  */
+     region_model merged;
+     ASSERT_TRUE (model0.can_merge_with_p (model1, &merged));
+     ASSERT_EQ (model0, merged);
+     /* In particular, there should be an unknown value for "x".  */
+     svalue *merged_x_sval = merged.get_svalue (merged.get_rvalue (x, &ctxt));
+     ASSERT_EQ (merged_x_sval->get_kind (), SK_UNKNOWN);
+   }
+ 
+   /* Use global-handling to verify various combinations of values.  */
+ 
+   /* Two equal constant values.  */
+   {
+     region_model merged;
+     svalue *merged_x_sval;
+     assert_region_models_merge (x, int_42, int_42, &merged, &merged_x_sval);
+ 
+     /* In particular, there should be a constant value for "x".  */
+     ASSERT_EQ (merged_x_sval->get_kind (), SK_CONSTANT);
+     ASSERT_EQ (merged_x_sval->dyn_cast_constant_svalue ()->get_constant (),
+ 	       int_42);
+   }
+ 
+   /* Two non-equal constant values.  */
+   {
+     region_model merged;
+     svalue *merged_x_sval;
+     assert_region_models_merge (x, int_42, int_113, &merged, &merged_x_sval);
+ 
+     /* In particular, there should be an unknown value for "x".  */
+     ASSERT_EQ (merged_x_sval->get_kind (), SK_UNKNOWN);
+   }
+ 
+   /* Uninit and constant.  */
+   {
+     region_model merged;
+     svalue *merged_x_sval;
+     assert_region_models_merge (x, NULL_TREE, int_113, &merged, &merged_x_sval);
+ 
+     /* In particular, there should be an unknown value for "x".  */
+     ASSERT_EQ (merged_x_sval->get_kind (), SK_UNKNOWN);
+   }
+ 
+   /* Constant and uninit.  */
+   {
+     region_model merged;
+     svalue *merged_x_sval;
+     assert_region_models_merge (x, int_42, NULL_TREE, &merged, &merged_x_sval);
+ 
+     /* In particular, there should be an unknown value for "x".  */
+     ASSERT_EQ (merged_x_sval->get_kind (), SK_UNKNOWN);
+   }
+ 
+   /* Unknown and constant.  */
+   // TODO
+ 
+   /* Pointers: NULL and NULL.  */
+   // TODO
+ 
+   /* Pointers: NULL and non-NULL.  */
+   // TODO
+ 
+   /* Pointers: non-NULL and non-NULL: ptr to a local.  */
+   {
+     region_model model0;
+     model0.push_frame (DECL_STRUCT_FUNCTION (test_fndecl), NULL, NULL);
+     model0.set_to_new_unknown_value (model0.get_lvalue (a, NULL),
+ 				     integer_type_node, NULL);
+     model0.set_value (model0.get_lvalue (p, NULL),
+ 		      model0.get_rvalue (addr_of_a, NULL), NULL);
+ 
+     region_model model1 (model0);
+     ASSERT_EQ (model0, model1);
+ 
+     /* They should be mergeable, and the result should be the same.  */
+     region_model merged;
+     ASSERT_TRUE (model0.can_merge_with_p (model1, &merged));
+     ASSERT_EQ (model0, merged);
+   }
+ 
+   /* Pointers: non-NULL and non-NULL: ptr to a global.  */
+   {
+     region_model merged;
+     /* p == &y in both input models.  */
+     svalue *merged_p_sval;
+     assert_region_models_merge (p, addr_of_y, addr_of_y, &merged,
+ 				&merged_p_sval);
+ 
+     /* We should get p == &y in the merged model.  */
+     ASSERT_EQ (merged_p_sval->get_kind (), SK_REGION);
+     region_svalue *merged_p_ptr = merged_p_sval->dyn_cast_region_svalue ();
+     region_id merged_p_star_rid = merged_p_ptr->get_pointee ();
+     ASSERT_EQ (merged_p_star_rid, merged.get_lvalue (y, NULL));
+   }
+ 
+   /* Pointers: non-NULL ptrs to different globals: should be unknown.  */
+   {
+     region_model merged;
+     /* x == &y vs x == &z in the input models.  */
+     svalue *merged_x_sval;
+     assert_region_models_merge (x, addr_of_y, addr_of_z, &merged,
+ 				&merged_x_sval);
+ 
+     /* We should get x == unknown in the merged model.  */
+     ASSERT_EQ (merged_x_sval->get_kind (), SK_UNKNOWN);
+   }
+ 
+   /* Pointers: non-NULL and non-NULL: ptr to a heap region.  */
+   {
+     test_region_model_context ctxt;
+     region_model model0;
+     region_id new_rid = model0.add_new_malloc_region ();
+     svalue_id ptr_sid
+       = model0.get_or_create_ptr_svalue (ptr_type_node, new_rid);
+     model0.set_value (model0.get_lvalue (p, &ctxt),
+ 		      ptr_sid, &ctxt);
+     model0.canonicalize (&ctxt);
+ 
+     region_model model1 (model0);
+ 
+     ASSERT_EQ (model0, model1);
+ 
+     region_model merged;
+     ASSERT_TRUE (model0.can_merge_with_p (model1, &merged));
+ 
+     merged.canonicalize (&ctxt);
+ 
+     /* The merged model ought to be identical (after canonicalization,
+        at least).  */
+     ASSERT_EQ (model0, merged);
+   }
+ 
+   /* Two regions sharing the same unknown svalue should continue sharing
+      an unknown svalue after self-merger.  */
+   {
+     test_region_model_context ctxt;
+     region_model model0;
+     svalue_id sid
+       = model0.set_to_new_unknown_value (model0.get_lvalue (x, &ctxt),
+ 					 integer_type_node, &ctxt);
+     model0.set_value (model0.get_lvalue (y, &ctxt), sid, &ctxt);
+     region_model model1 (model0);
+ 
+     /* They should be mergeable, and the result should be the same.  */
+     region_model merged;
+     ASSERT_TRUE (model0.can_merge_with_p (model1, &merged));
+     ASSERT_EQ (model0, merged);
+ 
+     /* In particular, we should have x == y.  */
+     ASSERT_EQ (merged.eval_condition (x, EQ_EXPR, y, &ctxt),
+ 	       tristate (tristate::TS_TRUE));
+   }
+ 
+ #if 0
+   {
+     region_model model0;
+     region_model model1;
+     test_region_model_context ctxt;
+     model0.add_constraint (x, EQ_EXPR, int_42, &ctxt);
+     model1.add_constraint (x, NE_EXPR, int_42, &ctxt);
+     ASSERT_TRUE (model0.can_merge_with_p (model1));
+   }
+ 
+   {
+     region_model model0;
+     region_model model1;
+     test_region_model_context ctxt;
+     model0.add_constraint (x, EQ_EXPR, int_42, &ctxt);
+     model1.add_constraint (x, NE_EXPR, int_42, &ctxt);
+     model1.add_constraint (x, EQ_EXPR, int_113, &ctxt);
+     ASSERT_TRUE (model0.can_merge_with_p (model1));
+   }
+ #endif
+ 
+   // TODO: what can't we merge? need at least one such test
+ 
+   /* TODO: various things
+      - heap regions
+      - value merging:
+        - every combination, but in particular
+           - pairs of regions
+    */
+ 
+   /* Views.  */
+   {
+     test_region_model_context ctxt;
+     region_model model0;
+ 
+     region_id x_rid = model0.get_lvalue (x, &ctxt);
+     region_id x_as_ptr = model0.get_or_create_view (x_rid, ptr_type_node,
+ 						    &ctxt);
+     model0.set_value (x_as_ptr, model0.get_rvalue (addr_of_y, &ctxt), &ctxt);
+ 
+     region_model model1 (model0);
+     ASSERT_EQ (model1, model0);
+ 
+     /* They should be mergeable, and the result should be the same.  */
+     region_model merged;
+     ASSERT_TRUE (model0.can_merge_with_p (model1, &merged));
+   }
+ 
+   /* Verify that we can merge a model in which a local in an older stack
+      frame points to a local in a more recent stack frame.  */
+   {
+     region_model model0;
+     model0.push_frame (DECL_STRUCT_FUNCTION (test_fndecl), NULL, NULL);
+     region_id q_in_first_frame = model0.get_lvalue (q, NULL);
+ 
+     /* Push a second frame.  */
+     region_id rid_2nd_frame
+       = model0.push_frame (DECL_STRUCT_FUNCTION (test_fndecl), NULL, NULL);
+ 
+     /* Have a pointer in the older frame point to a local in the
+        more recent frame.  */
+     svalue_id sid_ptr = model0.get_rvalue (addr_of_a, NULL);
+     model0.set_value (q_in_first_frame, sid_ptr, NULL);
+ 
+     /* Verify that it's pointing at the newer frame.  */
+     region_id rid_pointee
+       = model0.get_svalue (sid_ptr)->dyn_cast_region_svalue ()->get_pointee ();
+     ASSERT_EQ (model0.get_region (rid_pointee)->get_parent (), rid_2nd_frame);
+ 
+     model0.canonicalize (NULL);
+ 
+     region_model model1 (model0);
+     ASSERT_EQ (model0, model1);
+ 
+     /* They should be mergeable, and the result should be the same
+        (after canonicalization, at least).  */
+     region_model merged;
+     ASSERT_TRUE (model0.can_merge_with_p (model1, &merged));
+     merged.canonicalize (NULL);
+     ASSERT_EQ (model0, merged);
+   }
+ 
+   /* Verify that we can merge a model in which a local points to a global.  */
+   {
+     region_model model0;
+     model0.push_frame (DECL_STRUCT_FUNCTION (test_fndecl), NULL, NULL);
+     model0.set_value (model0.get_lvalue (q, NULL),
+ 		      model0.get_rvalue (addr_of_y, NULL), NULL);
+ 
+     model0.canonicalize (NULL);
+ 
+     region_model model1 (model0);
+     ASSERT_EQ (model0, model1);
+ 
+     /* They should be mergeable, and the result should be the same
+        (after canonicalization, at least).  */
+     region_model merged;
+     ASSERT_TRUE (model0.can_merge_with_p (model1, &merged));
+     merged.canonicalize (NULL);
+     ASSERT_EQ (model0, merged);
+   }
+ }
+ 
+ /* Verify that constraints are correctly merged when merging region_model
+    instances.  */
+ 
+ static void
+ test_constraint_merging ()
+ {
+   tree int_0 = build_int_cst (integer_type_node, 0);
+   tree int_5 = build_int_cst (integer_type_node, 5);
+   tree x = build_global_decl ("x", integer_type_node);
+   tree y = build_global_decl ("y", integer_type_node);
+   tree z = build_global_decl ("z", integer_type_node);
+   tree n = build_global_decl ("n", integer_type_node);
+ 
+   test_region_model_context ctxt;
+ 
+   /* model0: 0 <= (x == y) < n.  */
+   region_model model0;
+   model0.set_to_new_unknown_value (model0.get_lvalue (x, &ctxt),
+ 				   integer_type_node, &ctxt);
+   model0.add_constraint (x, EQ_EXPR, y, &ctxt);
+   model0.add_constraint (x, GE_EXPR, int_0, NULL);
+   model0.add_constraint (x, LT_EXPR, n, NULL);
+ 
+   /* model1: z != 5 && (0 <= x < n).  */
+   region_model model1;
+   model1.set_to_new_unknown_value (model1.get_lvalue (x, &ctxt),
+ 				   integer_type_node, &ctxt);
+   model1.add_constraint (z, NE_EXPR, int_5, NULL);
+   model1.add_constraint (x, GE_EXPR, int_0, NULL);
+   model1.add_constraint (x, LT_EXPR, n, NULL);
+ 
+   /* They should be mergeable; the merged constraints should
+      be: (0 <= x < n).  */
+   region_model merged;
+   ASSERT_TRUE (model0.can_merge_with_p (model1, &merged));
+ 
+   ASSERT_EQ (merged.eval_condition (x, GE_EXPR, int_0, &ctxt),
+ 	     tristate (tristate::TS_TRUE));
+   ASSERT_EQ (merged.eval_condition (x, LT_EXPR, n, &ctxt),
+ 	     tristate (tristate::TS_TRUE));
+ 
+   ASSERT_EQ (merged.eval_condition (z, NE_EXPR, int_5, &ctxt),
+ 	     tristate (tristate::TS_UNKNOWN));
+   ASSERT_EQ (merged.eval_condition (x, LT_EXPR, y, &ctxt),
+ 	     tristate (tristate::TS_UNKNOWN));
+ }
+ 
+ /* Verify that if we mark a pointer to a malloc-ed region as non-NULL,
+    all cast pointers to that region are also known to be non-NULL.  */
+ 
+ static void
+ test_malloc_constraints ()
+ {
+   region_model model;
+   tree p = build_global_decl ("p", ptr_type_node);
+   tree char_star = build_pointer_type (char_type_node);
+   tree q = build_global_decl ("q", char_star);
+   tree null_ptr = build_int_cst (ptr_type_node, 0);
+ 
+   region_id rid = model.add_new_malloc_region ();
+   svalue_id sid = model.get_or_create_ptr_svalue (ptr_type_node, rid);
+   model.set_value (model.get_lvalue (p, NULL), sid, NULL);
+   model.set_value (q, p, NULL);
+ 
+   /* We should have a symbolic_region with m_possibly_null: true.  */
+   region *pointee = model.get_region (rid);
+   symbolic_region *sym_reg = pointee->dyn_cast_symbolic_region ();
+   ASSERT_NE (sym_reg, NULL);
+   ASSERT_TRUE (sym_reg->m_possibly_null);
+ 
+   ASSERT_CONDITION_UNKNOWN (model, p, NE_EXPR, null_ptr);
+   ASSERT_CONDITION_UNKNOWN (model, p, EQ_EXPR, null_ptr);
+   ASSERT_CONDITION_UNKNOWN (model, q, NE_EXPR, null_ptr);
+   ASSERT_CONDITION_UNKNOWN (model, q, EQ_EXPR, null_ptr);
+ 
+   model.add_constraint (p, NE_EXPR, null_ptr, NULL);
+ 
+   /* Adding the constraint should have cleared m_possibly_null.  */
+   ASSERT_FALSE (sym_reg->m_possibly_null);
+ 
+   ASSERT_CONDITION_TRUE (model, p, NE_EXPR, null_ptr);
+   ASSERT_CONDITION_FALSE (model, p, EQ_EXPR, null_ptr);
+   ASSERT_CONDITION_TRUE (model, q, NE_EXPR, null_ptr);
+   ASSERT_CONDITION_FALSE (model, q, EQ_EXPR, null_ptr);
+ }
+ 
+ /* Run all of the selftests within this file.  */
+ 
+ void
+ analyzer_region_model_cc_tests ()
+ {
+   test_tree_cmp_on_constants ();
+   test_dump ();
+   test_dump_2 ();
+   test_dump_3 ();
+   test_get_representative_tree ();
+   test_unique_constants ();
+   test_svalue_equality ();
+   test_region_equality ();
+   test_purging_by_criteria ();
+   test_purge_unused_svalues ();
+   test_assignment ();
+   test_compound_assignment ();
+   test_stack_frames ();
+   test_get_representative_path_var ();
+   test_canonicalization_1 ();
+   test_canonicalization_2 ();
+   test_canonicalization_3 ();
+   test_canonicalization_4 ();
+   test_state_merging ();
+   test_constraint_merging ();
+   test_malloc_constraints ();
+ }
+ 
+ } // namespace selftest
+ 
+ #endif /* CHECKING_P */
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/region-model.h gcc-10.1.0/gcc/analyzer/region-model.h
*** gcc-9.3.0/gcc/analyzer/region-model.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/region-model.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,2274 ----
+ /* Classes for modeling the state of memory.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_REGION_MODEL_H
+ #define GCC_ANALYZER_REGION_MODEL_H
+ 
+ /* Implementation of the region-based ternary model described in:
+      "A Memory Model for Static Analysis of C Programs"
+       (Zhongxing Xu, Ted Kremenek, and Jian Zhang)
+      http://lcs.ios.ac.cn/~xuzb/canalyze/memmodel.pdf  */
+ 
+ /* A tree, extended with stack frame information for locals, so that
+    we can distinguish between different values of locals within a potentially
+    recursive callstack.  */
+ // TODO: would this be better as a new tree code?
+ 
+ using namespace ana;
+ 
+ namespace ana {
+ 
+ class path_var
+ {
+ public:
+   path_var (tree t, int stack_depth)
+   : m_tree (t), m_stack_depth (stack_depth)
+   {
+     // TODO: ignore stack depth for globals and constants
+   }
+ 
+   bool operator== (const path_var &other) const
+   {
+     return (m_tree == other.m_tree
+ 	    && m_stack_depth == other.m_stack_depth);
+   }
+ 
+   void dump (pretty_printer *pp) const;
+ 
+   tree m_tree;
+   int m_stack_depth; // or -1 for globals?
+ };
+ 
+ } // namespace ana
+ 
+ namespace inchash
+ {
+   extern void add_path_var (path_var pv, hash &hstate);
+ } // namespace inchash
+ 
+ 
+ namespace ana {
+ 
+ /* A region_model is effectively a graph of regions and symbolic values.
+    We store per-model IDs rather than pointers to make it easier to clone
+    and to compare graphs.  */
+ 
+ /* An ID for an svalue within a region_model.  Internally, this is an index
+    into a vector of svalue * within the region_model.  */
+ 
+ class svalue_id
+ {
+ public:
+   static svalue_id null () { return svalue_id (-1); }
+ 
+   svalue_id () : m_idx (-1) {}
+ 
+   bool operator== (const svalue_id &other) const
+   {
+     return m_idx == other.m_idx;
+   }
+ 
+   bool operator!= (const svalue_id &other) const
+   {
+     return m_idx != other.m_idx;
+   }
+ 
+   bool null_p () const { return m_idx == -1; }
+ 
+   static svalue_id from_int (int idx) { return svalue_id (idx); }
+   int as_int () const { return m_idx; }
+ 
+   void print (pretty_printer *pp) const;
+   void dump_node_name_to_pp (pretty_printer *pp) const;
+ 
+   void validate (const region_model &model) const;
+ 
+ private:
+   svalue_id (int idx) : m_idx (idx) {}
+ 
+   int m_idx;
+ };
+ 
+ /* An ID for a region within a region_model.  Internally, this is an index
+    into a vector of region * within the region_model.  */
+ 
+ class region_id
+ {
+ public:
+   static region_id null () { return region_id (-1); }
+ 
+   region_id () : m_idx (-1) {}
+ 
+   bool operator== (const region_id &other) const
+   {
+     return m_idx == other.m_idx;
+   }
+ 
+   bool operator!= (const region_id &other) const
+   {
+     return m_idx != other.m_idx;
+   }
+ 
+   bool null_p () const { return m_idx == -1; }
+ 
+   static region_id from_int (int idx) { return region_id (idx); }
+   int as_int () const { return m_idx; }
+ 
+   void print (pretty_printer *pp) const;
+   void dump_node_name_to_pp (pretty_printer *pp) const;
+ 
+   void validate (const region_model &model) const;
+ 
+ private:
+   region_id (int idx) : m_idx (idx) {}
+ 
+   int m_idx;
+ };
+ 
+ /* A class for renumbering IDs within a region_model, mapping old IDs
+    to new IDs (e.g. when removing one or more elements, thus needing to
+    renumber).  */
+ // TODO: could this be useful for equiv_class_ids?
+ 
+ template <typename T>
+ class id_map
+ {
+  public:
+   id_map (int num_ids);
+   void put (T src, T dst);
+   T get_dst_for_src (T src) const;
+   T get_src_for_dst (T dst) const;
+   void dump_to_pp (pretty_printer *pp) const;
+   void dump () const;
+   void update (T *) const;
+ 
+  private:
+   auto_vec<T> m_src_to_dst;
+   auto_vec<T> m_dst_to_src;
+ };
+ 
+ typedef id_map<svalue_id> svalue_id_map;
+ typedef id_map<region_id> region_id_map;
+ 
+ /* class id_map.  */
+ 
+ /* id_map's ctor, which populates the map with dummy null values.  */
+ 
+ template <typename T>
+ inline id_map<T>::id_map (int num_svalues)
+ : m_src_to_dst (num_svalues),
+   m_dst_to_src (num_svalues)
+ {
+   for (int i = 0; i < num_svalues; i++)
+     {
+       m_src_to_dst.quick_push (T::null ());
+       m_dst_to_src.quick_push (T::null ());
+     }
+ }
+ 
+ /* Record that SRC is to be mapped to DST.  */
+ 
+ template <typename T>
+ inline void
+ id_map<T>::put (T src, T dst)
+ {
+   m_src_to_dst[src.as_int ()] = dst;
+   m_dst_to_src[dst.as_int ()] = src;
+ }
+ 
+ /* Get the new value for SRC within the map.  */
+ 
+ template <typename T>
+ inline T
+ id_map<T>::get_dst_for_src (T src) const
+ {
+   if (src.null_p ())
+     return src;
+   return m_src_to_dst[src.as_int ()];
+ }
+ 
+ /* Given DST, a new value, determine which old value will be mapped to it
+    (the inverse of the map).  */
+ 
+ template <typename T>
+ inline T
+ id_map<T>::get_src_for_dst (T dst) const
+ {
+   if (dst.null_p ())
+     return dst;
+   return m_dst_to_src[dst.as_int ()];
+ }
+ 
+ /* Dump this id_map to PP.  */
+ 
+ template <typename T>
+ inline void
+ id_map<T>::dump_to_pp (pretty_printer *pp) const
+ {
+   pp_string (pp, "src to dst: {");
+   unsigned i;
+   T *dst;
+   FOR_EACH_VEC_ELT (m_src_to_dst, i, dst)
+     {
+       if (i > 0)
+ 	pp_string (pp, ", ");
+       T src (T::from_int (i));
+       src.print (pp);
+       pp_string (pp, " -> ");
+       dst->print (pp);
+     }
+   pp_string (pp, "}");
+   pp_newline (pp);
+ 
+   pp_string (pp, "dst to src: {");
+   T *src;
+   FOR_EACH_VEC_ELT (m_dst_to_src, i, src)
+     {
+       if (i > 0)
+ 	pp_string (pp, ", ");
+       T dst (T::from_int (i));
+       dst.print (pp);
+       pp_string (pp, " <- ");
+       src->print (pp);
+     }
+   pp_string (pp, "}");
+   pp_newline (pp);
+ }
+ 
+ /* Dump this id_map to stderr.  */
+ 
+ template <typename T>
+ DEBUG_FUNCTION inline void
+ id_map<T>::dump () const
+ {
+   pretty_printer pp;
+   pp.buffer->stream = stderr;
+   dump_to_pp (&pp);
+   pp_flush (&pp);
+ }
+ 
+ /* Update *ID from the old value to its new value in this map.  */
+ 
+ template <typename T>
+ inline void
+ id_map<T>::update (T *id) const
+ {
+   *id = get_dst_for_src (*id);
+ }
+ 
+ /* Variant of the above, which only stores things in one direction.
+    (e.g. for merging, when the number of destination regions is not
+    the same of the src regions, and can grow).  */
+ 
+ template <typename T>
+ class one_way_id_map
+ {
+  public:
+   one_way_id_map (int num_ids);
+   void put (T src, T dst);
+   T get_dst_for_src (T src) const;
+   void dump_to_pp (pretty_printer *pp) const;
+   void dump () const;
+   void update (T *) const;
+ 
+  private:
+   auto_vec<T> m_src_to_dst;
+ };
+ 
+ typedef one_way_id_map<svalue_id> one_way_svalue_id_map;
+ typedef one_way_id_map<region_id> one_way_region_id_map;
+ 
+ /* class one_way_id_map.  */
+ 
+ /* one_way_id_map's ctor, which populates the map with dummy null values.  */
+ 
+ template <typename T>
+ inline one_way_id_map<T>::one_way_id_map (int num_svalues)
+ : m_src_to_dst (num_svalues)
+ {
+   for (int i = 0; i < num_svalues; i++)
+     m_src_to_dst.quick_push (T::null ());
+ }
+ 
+ /* Record that SRC is to be mapped to DST.  */
+ 
+ template <typename T>
+ inline void
+ one_way_id_map<T>::put (T src, T dst)
+ {
+   m_src_to_dst[src.as_int ()] = dst;
+ }
+ 
+ /* Get the new value for SRC within the map.  */
+ 
+ template <typename T>
+ inline T
+ one_way_id_map<T>::get_dst_for_src (T src) const
+ {
+   if (src.null_p ())
+     return src;
+   return m_src_to_dst[src.as_int ()];
+ }
+ 
+ /* Dump this map to PP.  */
+ 
+ template <typename T>
+ inline void
+ one_way_id_map<T>::dump_to_pp (pretty_printer *pp) const
+ {
+   pp_string (pp, "src to dst: {");
+   unsigned i;
+   T *dst;
+   FOR_EACH_VEC_ELT (m_src_to_dst, i, dst)
+     {
+       if (i > 0)
+ 	pp_string (pp, ", ");
+       T src (T::from_int (i));
+       src.print (pp);
+       pp_string (pp, " -> ");
+       dst->print (pp);
+     }
+   pp_string (pp, "}");
+   pp_newline (pp);
+ }
+ 
+ /* Dump this map to stderr.  */
+ 
+ template <typename T>
+ DEBUG_FUNCTION inline void
+ one_way_id_map<T>::dump () const
+ {
+   pretty_printer pp;
+   pp.buffer->stream = stderr;
+   dump_to_pp (&pp);
+   pp_flush (&pp);
+ }
+ 
+ /* Update *ID from the old value to its new value in this map.  */
+ 
+ template <typename T>
+ inline void
+ one_way_id_map<T>::update (T *id) const
+ {
+   *id = get_dst_for_src (*id);
+ }
+ 
+ /* A set of region_ids within a region_model.  */
+ 
+ class region_id_set
+ {
+ public:
+   region_id_set (const region_model *model);
+ 
+   void add_region (region_id rid)
+   {
+     if (!rid.null_p ())
+       bitmap_set_bit (m_bitmap, rid.as_int ());
+   }
+ 
+   bool region_p (region_id rid) const
+   {
+     gcc_assert (!rid.null_p ());
+     return bitmap_bit_p (const_cast <auto_sbitmap &> (m_bitmap),
+ 			 rid.as_int ());
+   }
+ 
+   unsigned int num_regions ()
+   {
+     return bitmap_count_bits (m_bitmap);
+   }
+ 
+ private:
+   auto_sbitmap m_bitmap;
+ };
+ 
+ /* A set of svalue_ids within a region_model.  */
+ 
+ class svalue_id_set
+ {
+ public:
+   svalue_id_set ();
+ 
+   void add_svalue (svalue_id sid)
+   {
+     if (!sid.null_p ())
+       bitmap_set_bit (m_bitmap, sid.as_int ());
+   }
+ 
+   bool svalue_p (svalue_id sid) const
+   {
+     gcc_assert (!sid.null_p ());
+     return bitmap_bit_p (const_cast <auto_bitmap &> (m_bitmap),
+ 			 sid.as_int ());
+   }
+ 
+ private:
+   auto_bitmap m_bitmap;
+ };
+ 
+ /* Various operations delete information from a region_model.
+ 
+    This struct tracks how many of each kind of entity were purged (e.g.
+    for selftests, and for debugging).  */
+ 
+ struct purge_stats
+ {
+   purge_stats ()
+   : m_num_svalues (0),
+     m_num_regions (0),
+     m_num_equiv_classes (0),
+     m_num_constraints (0),
+     m_num_client_items (0)
+   {}
+ 
+   int m_num_svalues;
+   int m_num_regions;
+   int m_num_equiv_classes;
+   int m_num_constraints;
+   int m_num_client_items;
+ };
+ 
+ /* An enum for discriminating between the different concrete subclasses
+    of svalue.  */
+ 
+ enum svalue_kind
+ {
+   SK_REGION,
+   SK_CONSTANT,
+   SK_UNKNOWN,
+   SK_POISONED,
+   SK_SETJMP
+ };
+ 
+ /* svalue and its subclasses.
+ 
+    The class hierarchy looks like this (using indentation to show
+    inheritance, and with svalue_kinds shown for the concrete subclasses):
+ 
+    svalue
+      region_svalue (SK_REGION)
+      constant_svalue (SK_CONSTANT)
+      unknown_svalue (SK_UNKNOWN)
+      poisoned_svalue (SK_POISONED)
+      setjmp_svalue (SK_SETJMP).  */
+ 
+ /* An abstract base class representing a value held by a region of memory.  */
+ 
+ class svalue
+ {
+ public:
+   virtual ~svalue () {}
+ 
+   bool operator== (const svalue &other) const;
+   bool operator!= (const svalue &other) const { return !(*this == other); }
+ 
+   virtual svalue *clone () const = 0;
+ 
+   tree get_type () const { return m_type; }
+ 
+   virtual enum svalue_kind get_kind () const = 0;
+ 
+   hashval_t hash () const;
+ 
+   void print (const region_model &model,
+ 	      svalue_id this_sid,
+ 	      pretty_printer *pp) const;
+ 
+   virtual void dump_dot_to_pp (const region_model &model,
+ 			       svalue_id this_sid,
+ 			       pretty_printer *pp) const;
+ 
+   virtual region_svalue *dyn_cast_region_svalue () { return NULL; }
+   virtual constant_svalue *dyn_cast_constant_svalue () { return NULL; }
+   virtual const constant_svalue *dyn_cast_constant_svalue () const
+   { return NULL; }
+   virtual poisoned_svalue *dyn_cast_poisoned_svalue () { return NULL; }
+   virtual unknown_svalue *dyn_cast_unknown_svalue () { return NULL; }
+   virtual setjmp_svalue *dyn_cast_setjmp_svalue () { return NULL; }
+ 
+   virtual void remap_region_ids (const region_id_map &map);
+ 
+   virtual void walk_for_canonicalization (canonicalization *c) const;
+ 
+   virtual svalue_id get_child_sid (region *parent, region *child,
+ 				   region_model &model,
+ 				   region_model_context *ctxt);
+ 
+   tree maybe_get_constant () const;
+ 
+  protected:
+   svalue (tree type) : m_type (type) {}
+ 
+   virtual void add_to_hash (inchash::hash &hstate) const = 0;
+ 
+  private:
+   virtual void print_details (const region_model &model,
+ 			      svalue_id this_sid,
+ 			      pretty_printer *pp) const = 0;
+   tree m_type;
+ };
+ 
+ /* Concrete subclass of svalue representing a pointer value that points to
+    a known region  */
+ 
+ class region_svalue : public svalue
+ {
+ public:
+   region_svalue (tree type, region_id rid) : svalue (type), m_rid (rid)
+   {
+     /* Should we support NULL ptrs here?  */
+     gcc_assert (!rid.null_p ());
+   }
+ 
+   bool compare_fields (const region_svalue &other) const;
+ 
+   svalue *clone () const FINAL OVERRIDE
+   { return new region_svalue (get_type (), m_rid); }
+ 
+   enum svalue_kind get_kind () const FINAL OVERRIDE { return SK_REGION; }
+ 
+   void dump_dot_to_pp (const region_model &model,
+ 		       svalue_id this_sid,
+ 		       pretty_printer *pp) const
+     FINAL OVERRIDE;
+ 
+   region_svalue *dyn_cast_region_svalue () FINAL OVERRIDE { return this; }
+ 
+   region_id get_pointee () const { return m_rid; }
+ 
+   void remap_region_ids (const region_id_map &map) FINAL OVERRIDE;
+ 
+   static void merge_values (const region_svalue &region_sval_a,
+ 			    const region_svalue &region_sval_b,
+ 			    svalue_id *merged_sid,
+ 			    tree type,
+ 			    model_merger *merger);
+ 
+   void walk_for_canonicalization (canonicalization *c) const FINAL OVERRIDE;
+ 
+   static tristate eval_condition (region_svalue *lhs_ptr,
+ 				  enum tree_code op,
+ 				  region_svalue *rhs_ptr);
+ 
+   void add_to_hash (inchash::hash &hstate) const FINAL OVERRIDE;
+ 
+  private:
+   void print_details (const region_model &model,
+ 		      svalue_id this_sid,
+ 		      pretty_printer *pp) const
+     FINAL OVERRIDE;
+ 
+   region_id m_rid;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <region_svalue *>::test (svalue *sval)
+ {
+   return sval->get_kind () == SK_REGION;
+ }
+ 
+ namespace ana {
+ 
+ /* Concrete subclass of svalue representing a specific constant value.  */
+ 
+ class constant_svalue : public svalue
+ {
+ public:
+   constant_svalue (tree cst_expr)
+   : svalue (TREE_TYPE (cst_expr)), m_cst_expr (cst_expr)
+   {
+     gcc_assert (cst_expr);
+     gcc_assert (CONSTANT_CLASS_P (cst_expr));
+   }
+ 
+   bool compare_fields (const constant_svalue &other) const;
+ 
+   svalue *clone () const FINAL OVERRIDE
+   { return new constant_svalue (m_cst_expr); }
+ 
+   enum svalue_kind get_kind () const FINAL OVERRIDE { return SK_CONSTANT; }
+ 
+   void add_to_hash (inchash::hash &hstate) const FINAL OVERRIDE;
+ 
+   constant_svalue *dyn_cast_constant_svalue () FINAL OVERRIDE { return this; }
+   const constant_svalue *dyn_cast_constant_svalue () const FINAL OVERRIDE
+   { return this; }
+ 
+   tree get_constant () const { return m_cst_expr; }
+ 
+   static void merge_values (const constant_svalue &cst_sval_a,
+ 			    const constant_svalue &cst_sval_b,
+ 			    svalue_id *merged_sid,
+ 			    model_merger *merger);
+ 
+   static tristate eval_condition (constant_svalue *lhs,
+ 				  enum tree_code op,
+ 				  constant_svalue *rhs);
+ 
+   svalue_id get_child_sid (region *parent, region *child,
+ 			   region_model &model,
+ 			   region_model_context *ctxt) FINAL OVERRIDE;
+ 
+  private:
+   void print_details (const region_model &model,
+ 		      svalue_id this_sid,
+ 		      pretty_printer *pp) const
+     FINAL OVERRIDE;
+ 
+   tree m_cst_expr;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <constant_svalue *>::test (svalue *sval)
+ {
+   return sval->get_kind () == SK_CONSTANT;
+ }
+ 
+ namespace ana {
+ 
+ /* Concrete subclass of svalue representing a unique but unknown value.
+    Comparisons of variables that share the same unknown value are known
+    to be equal, even if we don't know what the value is.  */
+ 
+ class unknown_svalue : public svalue
+ {
+ public:
+   unknown_svalue (tree type)
+   : svalue (type)
+   {}
+ 
+   bool compare_fields (const unknown_svalue &other) const;
+ 
+   svalue *clone () const FINAL OVERRIDE
+   { return new unknown_svalue (get_type ()); }
+ 
+   enum svalue_kind get_kind () const FINAL OVERRIDE { return SK_UNKNOWN; }
+ 
+   void add_to_hash (inchash::hash &hstate) const FINAL OVERRIDE;
+ 
+   unknown_svalue *dyn_cast_unknown_svalue () FINAL OVERRIDE { return this; }
+ 
+  private:
+   void print_details (const region_model &model,
+ 		      svalue_id this_sid,
+ 		      pretty_printer *pp) const
+     FINAL OVERRIDE;
+ };
+ 
+ /* An enum describing a particular kind of "poisoned" value.  */
+ 
+ enum poison_kind
+ {
+   /* For use to describe freed memory.  */
+   POISON_KIND_FREED,
+ 
+   /* For use on pointers to regions within popped stack frames.  */
+   POISON_KIND_POPPED_STACK
+ };
+ 
+ extern const char *poison_kind_to_str (enum poison_kind);
+ 
+ /* Concrete subclass of svalue representing a value that should not
+    be used (e.g. uninitialized memory, freed memory).  */
+ 
+ class poisoned_svalue : public svalue
+ {
+ public:
+   poisoned_svalue (enum poison_kind kind, tree type)
+   : svalue (type), m_kind (kind) {}
+ 
+   bool compare_fields (const poisoned_svalue &other) const;
+ 
+   svalue *clone () const FINAL OVERRIDE
+   { return new poisoned_svalue (m_kind, get_type ()); }
+ 
+   enum svalue_kind get_kind () const FINAL OVERRIDE { return SK_POISONED; }
+ 
+   void add_to_hash (inchash::hash &hstate) const FINAL OVERRIDE;
+ 
+   poisoned_svalue *dyn_cast_poisoned_svalue () FINAL OVERRIDE { return this; }
+ 
+   enum poison_kind get_poison_kind () const { return m_kind; }
+ 
+  private:
+   void print_details (const region_model &model,
+ 		      svalue_id this_sid,
+ 		      pretty_printer *pp) const
+     FINAL OVERRIDE;
+ 
+   enum poison_kind m_kind;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <poisoned_svalue *>::test (svalue *sval)
+ {
+   return sval->get_kind () == SK_POISONED;
+ }
+ 
+ namespace ana {
+ 
+ /* A bundle of information recording a setjmp/sigsetjmp call, corresponding
+    roughly to a jmp_buf.  */
+ 
+ struct setjmp_record
+ {
+   setjmp_record (const exploded_node *enode,
+ 		 const gcall *setjmp_call)
+   : m_enode (enode), m_setjmp_call (setjmp_call)
+   {
+   }
+ 
+   bool operator== (const setjmp_record &other) const
+   {
+     return (m_enode == other.m_enode
+ 	    && m_setjmp_call == other.m_setjmp_call);
+   }
+ 
+   const exploded_node *m_enode;
+   const gcall *m_setjmp_call;
+ };
+ 
+ /* Concrete subclass of svalue representing buffers for setjmp/sigsetjmp,
+    so that longjmp/siglongjmp can potentially "return" to an entirely
+    different function.  */
+ 
+ class setjmp_svalue : public svalue
+ {
+ public:
+   setjmp_svalue (const setjmp_record &setjmp_record,
+ 		 tree type)
+   : svalue (type), m_setjmp_record (setjmp_record)
+   {}
+ 
+   bool compare_fields (const setjmp_svalue &other) const;
+ 
+   svalue *clone () const FINAL OVERRIDE
+   { return new setjmp_svalue (m_setjmp_record, get_type ()); }
+ 
+   enum svalue_kind get_kind () const FINAL OVERRIDE { return SK_SETJMP; }
+ 
+   void add_to_hash (inchash::hash &hstate) const FINAL OVERRIDE;
+ 
+   setjmp_svalue *dyn_cast_setjmp_svalue () FINAL OVERRIDE { return this; }
+ 
+   int get_enode_index () const;
+ 
+   const setjmp_record &get_setjmp_record () const { return m_setjmp_record; }
+ 
+  private:
+   void print_details (const region_model &model,
+ 		      svalue_id this_sid,
+ 		      pretty_printer *pp) const
+     FINAL OVERRIDE;
+ 
+   setjmp_record m_setjmp_record;
+ };
+ 
+ /* An enum for discriminating between the different concrete subclasses
+    of region.  */
+ 
+ enum region_kind
+ {
+   RK_PRIMITIVE,
+   RK_STRUCT,
+   RK_UNION,
+   RK_FRAME,
+   RK_GLOBALS,
+   RK_CODE,
+   RK_FUNCTION,
+   RK_ARRAY,
+   RK_STACK,
+   RK_HEAP,
+   RK_ROOT,
+   RK_SYMBOLIC
+ };
+ 
+ extern const char *region_kind_to_str (enum region_kind);
+ 
+ /* Region and its subclasses.
+ 
+    The class hierarchy looks like this (using indentation to show
+    inheritance, and with region_kinds shown for the concrete subclasses):
+ 
+    region
+      primitive_region (RK_PRIMITIVE)
+      map_region
+        struct_or_union_region
+          struct_region (RK_STRUCT)
+          union_region (RK_UNION)
+        scope_region
+          frame_region (RK_FRAME)
+          globals_region (RK_GLOBALS)
+        code_region (RK_CODE)
+        function_region (RK_FUNCTION)
+      array_region (RK_ARRAY)
+      stack_region (RK_STACK)
+      heap_region (RK_HEAP)
+      root_region (RK_ROOT)
+      label_region (RK_FUNCTION)
+      symbolic_region (RK_SYMBOLIC).  */
+ 
+ /* Abstract base class representing a chunk of memory.
+ 
+    Regions form a tree-like hierarchy, with a root region at the base,
+    with memory space regions within it, representing the stack and
+    globals, with frames within the stack, and regions for variables
+    within the frames and the "globals" region.  Regions for structs
+    can have subregions for fields.
+ 
+    A region can optionally have a value, or inherit its value from
+    the first ancestor with a value.  For example, the stack region
+    has a "uninitialized" poison value which is inherited by all
+    descendent regions that don't themselves have a value.  */
+ 
+ class region
+ {
+ public:
+   virtual ~region () {}
+ 
+   bool operator== (const region &other) const;
+   bool operator!= (const region &other) const { return !(*this == other); }
+ 
+   virtual region *clone () const = 0;
+ 
+   virtual enum region_kind get_kind () const = 0;
+   virtual map_region *dyn_cast_map_region () { return NULL; }
+   virtual array_region *dyn_cast_array_region () { return NULL; }
+   virtual symbolic_region *dyn_cast_symbolic_region () { return NULL; }
+   virtual const symbolic_region *dyn_cast_symbolic_region () const { return NULL; }
+ 
+   region_id get_parent () const { return m_parent_rid; }
+   region *get_parent_region (const region_model &model) const;
+ 
+   void set_value (region_model &model, region_id this_rid, svalue_id rhs_sid,
+ 		  region_model_context *ctxt);
+   svalue_id get_value (region_model &model, bool non_null,
+ 		       region_model_context *ctxt);
+   svalue_id get_value_direct () const { return m_sval_id; }
+ 
+   svalue_id get_inherited_child_sid (region *child,
+ 				     region_model &model,
+ 				     region_model_context *ctxt);
+ 
+   tree get_type () const { return m_type; }
+ 
+   hashval_t hash () const;
+ 
+   void print (const region_model &model,
+ 	      region_id this_rid,
+ 	      pretty_printer *pp) const;
+ 
+   virtual void dump_dot_to_pp (const region_model &model,
+ 			       region_id this_rid,
+ 			       pretty_printer *pp) const;
+ 
+   void dump_to_pp (const region_model &model,
+ 		   region_id this_rid,
+ 		   pretty_printer *pp,
+ 		   const char *prefix,
+ 		   bool is_last_child) const;
+   virtual void dump_child_label (const region_model &model,
+ 				 region_id this_rid,
+ 				 region_id child_rid,
+ 				 pretty_printer *pp) const;
+ 
+   void remap_svalue_ids (const svalue_id_map &map);
+   virtual void remap_region_ids (const region_id_map &map);
+ 
+   virtual void walk_for_canonicalization (canonicalization *c) const = 0;
+ 
+   void add_view (region_id view_rid, region_model *model);
+   region_id get_view (tree type, region_model *model) const;
+   region_id get_active_view () const { return m_active_view_rid; }
+   bool is_view_p () const { return m_is_view; }
+ 
+   virtual void validate (const region_model &model) const;
+ 
+   bool non_null_p (const region_model &model) const;
+ 
+  protected:
+   region (region_id parent_rid, svalue_id sval_id, tree type);
+   region (const region &other);
+ 
+   virtual void add_to_hash (inchash::hash &hstate) const;
+   virtual void print_fields (const region_model &model,
+ 			     region_id this_rid,
+ 			     pretty_printer *pp) const;
+ 
+  private:
+   void become_active_view (region_model &model, region_id this_rid);
+   void deactivate_any_active_view (region_model &model);
+   void deactivate_view (region_model &model, region_id this_view_rid);
+ 
+   region_id m_parent_rid;
+   svalue_id m_sval_id;
+   tree m_type;
+   /* Child regions that are "views" (one per type).  */
+   auto_vec<region_id> m_view_rids;
+ 
+   bool m_is_view;
+   region_id m_active_view_rid;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <region *>::test (region *)
+ {
+   return true;
+ }
+ 
+ namespace ana {
+ 
+ /* Concrete region subclass for storing "primitive" types (integral types,
+    pointers, etc).  */
+ 
+ class primitive_region : public region
+ {
+ public:
+   primitive_region (region_id parent_rid, tree type)
+   : region (parent_rid, svalue_id::null (), type)
+   {}
+ 
+   region *clone () const FINAL OVERRIDE;
+ 
+   enum region_kind get_kind () const FINAL OVERRIDE { return RK_PRIMITIVE; }
+ 
+   void walk_for_canonicalization (canonicalization *c) const FINAL OVERRIDE;
+ };
+ 
+ /* A region that has children identified by tree keys.
+    For example a stack frame has subregions per local, and a region
+    for a struct has subregions per field.  */
+ 
+ class map_region : public region
+ {
+ public:
+   typedef ordered_hash_map<tree, region_id> map_t;
+   typedef map_t::iterator iterator_t;
+ 
+   map_region (region_id parent_rid, tree type)
+   : region (parent_rid, svalue_id::null (), type)
+   {}
+   map_region (const map_region &other);
+ 
+   map_region *dyn_cast_map_region () FINAL OVERRIDE { return this; }
+ 
+   void dump_dot_to_pp (const region_model &model,
+ 		       region_id this_rid,
+ 		       pretty_printer *pp) const
+     FINAL OVERRIDE;
+ 
+   void dump_child_label (const region_model &model,
+ 			 region_id this_rid,
+ 			 region_id child_rid,
+ 			 pretty_printer *pp) const
+     FINAL OVERRIDE;
+ 
+   region_id get_or_create (region_model *model,
+ 			   region_id this_rid,
+ 			   tree expr, tree type,
+ 			   region_model_context *ctxt);
+   void unbind (tree expr);
+   region_id *get (tree expr);
+ 
+   void remap_region_ids (const region_id_map &map) FINAL OVERRIDE;
+ 
+   tree get_tree_for_child_region (region_id child_rid) const;
+ 
+   tree get_tree_for_child_region (region *child,
+ 				  const region_model &model) const;
+ 
+   static bool can_merge_p (const map_region *map_region_a,
+ 			   const map_region *map_region_b,
+ 			   map_region *merged_map_region,
+ 			   region_id merged_rid,
+ 			   model_merger *merger);
+ 
+   void walk_for_canonicalization (canonicalization *c) const FINAL OVERRIDE;
+ 
+   virtual bool valid_key_p (tree key) const = 0;
+ 
+   svalue_id get_value_by_name (tree identifier,
+ 			       const region_model &model) const;
+ 
+   iterator_t begin () { return m_map.begin (); }
+   iterator_t end () { return m_map.end (); }
+   size_t elements () const { return m_map.elements (); }
+ 
+  protected:
+   bool compare_fields (const map_region &other) const;
+   void add_to_hash (inchash::hash &hstate) const OVERRIDE;
+   void print_fields (const region_model &model,
+ 		     region_id this_rid,
+ 		     pretty_printer *pp) const
+     OVERRIDE;
+   void validate (const region_model &model) const FINAL OVERRIDE;
+ 
+  private:
+   /* Mapping from tree to child region.  */
+   map_t m_map;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <map_region *>::test (region *reg)
+ {
+   return (reg->dyn_cast_map_region () != NULL);
+ }
+ 
+ namespace ana {
+ 
+ /* Abstract subclass representing a region with fields
+    (either a struct or a union).  */
+ 
+ class struct_or_union_region : public map_region
+ {
+ public:
+   bool valid_key_p (tree key) const FINAL OVERRIDE;
+ 
+  protected:
+   struct_or_union_region (region_id parent_rid, tree type)
+   : map_region (parent_rid, type)
+   {}
+ 
+   bool compare_fields (const struct_or_union_region &other) const;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <struct_or_union_region *>::test (region *reg)
+ {
+   return (reg->get_kind () == RK_STRUCT
+ 	  || reg->get_kind () == RK_UNION);
+ }
+ 
+ namespace ana {
+ 
+ /* Concrete region subclass.  A map_region representing a struct, using
+    FIELD_DECLs for its keys.  */
+ 
+ class struct_region : public struct_or_union_region
+ {
+ public:
+   struct_region (region_id parent_rid, tree type)
+   : struct_or_union_region (parent_rid, type)
+   {
+     gcc_assert (TREE_CODE (type) == RECORD_TYPE);
+   }
+ 
+   region *clone () const FINAL OVERRIDE;
+ 
+   enum region_kind get_kind () const FINAL OVERRIDE { return RK_STRUCT; }
+ 
+   bool compare_fields (const struct_region &other) const;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <struct_region *>::test (region *reg)
+ {
+   return reg->get_kind () == RK_STRUCT;
+ }
+ 
+ namespace ana {
+ 
+ /* Concrete region subclass.  A map_region representing a union, using
+    FIELD_DECLs for its keys.  */
+ 
+ class union_region : public struct_or_union_region
+ {
+ public:
+   union_region (region_id parent_rid, tree type)
+   : struct_or_union_region (parent_rid, type)
+   {
+     gcc_assert (TREE_CODE (type) == UNION_TYPE);
+   }
+ 
+   region *clone () const FINAL OVERRIDE;
+ 
+   enum region_kind get_kind () const FINAL OVERRIDE { return RK_UNION; }
+ 
+   bool compare_fields (const union_region &other) const;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <union_region *>::test (region *reg)
+ {
+   return reg->get_kind () == RK_UNION;
+ }
+ 
+ namespace ana {
+ 
+ /* Abstract map_region subclass for accessing decls, used as a base class
+    for function frames and for the globals region.  */
+ 
+ class scope_region : public map_region
+ {
+  public:
+ 
+  protected:
+   scope_region (region_id parent_rid)
+   : map_region (parent_rid, NULL_TREE)
+   {}
+ 
+   scope_region (const scope_region &other)
+   : map_region (other)
+   {
+   }
+ 
+   bool compare_fields (const scope_region &other) const;
+ };
+ 
+ /* Concrete region subclass, representing a function frame on the stack,
+    to contain the locals.  */
+ 
+ class frame_region : public scope_region
+ {
+ public:
+   frame_region (region_id parent_rid, function *fun, int depth)
+   : scope_region (parent_rid), m_fun (fun), m_depth (depth)
+   {}
+ 
+   frame_region (const frame_region &other)
+   : scope_region (other), m_fun (other.m_fun), m_depth (other.m_depth)
+   {
+   }
+ 
+   /* region vfuncs.  */
+   region *clone () const FINAL OVERRIDE;
+   enum region_kind get_kind () const FINAL OVERRIDE { return RK_FRAME; }
+   void print_fields (const region_model &model,
+ 		     region_id this_rid,
+ 		     pretty_printer *pp) const
+     FINAL OVERRIDE;
+   void add_to_hash (inchash::hash &hstate) const FINAL OVERRIDE;
+ 
+   /* map_region vfuncs.  */
+   bool valid_key_p (tree key) const FINAL OVERRIDE;
+ 
+   /* Accessors.  */
+   function *get_function () const { return m_fun; }
+   int get_depth () const { return m_depth; }
+ 
+   bool compare_fields (const frame_region &other) const;
+ 
+  private:
+   function *m_fun;
+   int m_depth;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <frame_region *>::test (region *reg)
+ {
+   return reg->get_kind () == RK_FRAME;
+ }
+ 
+ namespace ana {
+ 
+ /* Concrete region subclass, to hold global variables (data and bss).  */
+ 
+ class globals_region : public scope_region
+ {
+  public:
+   globals_region (region_id parent_rid)
+   : scope_region (parent_rid)
+   {}
+ 
+   globals_region (const globals_region &other)
+   : scope_region (other)
+   {
+   }
+ 
+   /* region vfuncs.  */
+   region *clone () const FINAL OVERRIDE;
+   enum region_kind get_kind () const FINAL OVERRIDE { return RK_GLOBALS; }
+ 
+   /* map_region vfuncs.  */
+   bool valid_key_p (tree key) const FINAL OVERRIDE;
+ 
+   bool compare_fields (const globals_region &other) const;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <globals_region *>::test (region *reg)
+ {
+   return reg->get_kind () == RK_GLOBALS;
+ }
+ 
+ namespace ana {
+ 
+ /* Concrete region subclass.  A map_region representing the code, using
+    FUNCTION_DECLs for its keys.  */
+ 
+ class code_region : public map_region
+ {
+ public:
+   code_region (region_id parent_rid)
+   : map_region (parent_rid, NULL_TREE)
+   {}
+   code_region (const code_region &other)
+   : map_region (other)
+   {}
+ 
+   /* region vfuncs.  */
+   region *clone () const FINAL OVERRIDE;
+   enum region_kind get_kind () const FINAL OVERRIDE { return RK_CODE; }
+ 
+   /* map_region vfunc.  */
+   bool valid_key_p (tree key) const FINAL OVERRIDE;
+ 
+   region_id get_element (region_model *model,
+ 			 region_id this_rid,
+ 			 svalue_id index_sid,
+ 			 region_model_context *ctxt);
+ 
+   bool compare_fields (const code_region &other) const;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <code_region *>::test (region *reg)
+ {
+   return reg->get_kind () == RK_CODE;
+ }
+ 
+ namespace ana {
+ 
+ /* Concrete region subclass.  A map_region representing the code for
+    a particular function, using LABEL_DECLs for its keys.  */
+ 
+ class function_region : public map_region
+ {
+ public:
+   function_region (region_id parent_rid, tree type)
+   : map_region (parent_rid, type)
+   {
+     gcc_assert (FUNC_OR_METHOD_TYPE_P (type));
+   }
+   function_region (const function_region &other)
+   : map_region (other)
+   {}
+ 
+   /* region vfuncs.  */
+   region *clone () const FINAL OVERRIDE;
+   enum region_kind get_kind () const FINAL OVERRIDE { return RK_FUNCTION; }
+ 
+   /* map_region vfunc.  */
+   bool valid_key_p (tree key) const FINAL OVERRIDE;
+ 
+   region_id get_element (region_model *model,
+ 			 region_id this_rid,
+ 			 svalue_id index_sid,
+ 			 region_model_context *ctxt);
+ 
+   bool compare_fields (const function_region &other) const;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <function_region *>::test (region *reg)
+ {
+   return reg->get_kind () == RK_FUNCTION;
+ }
+ 
+ namespace ana {
+ 
+ /* Concrete region subclass representing an array (or an array-like view
+    of a parent region of memory.
+    This can't be a map_region as we can't use trees as the keys: there's
+    no guarantee about the uniqueness of an INTEGER_CST.  */
+ 
+ class array_region : public region
+ {
+ public:
+ #if 0
+   wide_int m_test;
+ 
+   typedef wide_int key_t;
+   typedef int_hash <wide_int, -1, -2> hash_t;
+   typedef ordered_hash_map<hash_t, region_id> map_t;
+ #else
+   typedef int key_t;
+   typedef int_hash <int, -1, -2> int_hash_t;
+   typedef ordered_hash_map<int_hash_t, region_id> map_t;
+ #endif
+   typedef map_t::iterator iterator_t;
+ 
+   array_region (region_id parent_rid, tree type)
+   : region (parent_rid, svalue_id::null (), type)
+   {
+     gcc_assert (TREE_CODE (type) == ARRAY_TYPE);
+   }
+   array_region (const array_region &other);
+ 
+   void dump_dot_to_pp (const region_model &model,
+ 		       region_id this_rid,
+ 		       pretty_printer *pp) const
+     FINAL OVERRIDE;
+ 
+   void dump_child_label (const region_model &model,
+ 			 region_id this_rid,
+ 			 region_id child_rid,
+ 			 pretty_printer *pp) const
+     FINAL OVERRIDE;
+ 
+   /* region vfuncs.  */
+   region *clone () const FINAL OVERRIDE;
+   enum region_kind get_kind () const FINAL OVERRIDE { return RK_ARRAY; }
+   array_region *dyn_cast_array_region () { return this; }
+ 
+   region_id get_element (region_model *model,
+ 			 region_id this_rid,
+ 			 svalue_id index_sid,
+ 			 region_model_context *ctxt);
+ 
+   bool compare_fields (const array_region &other) const;
+ 
+   static bool can_merge_p (const array_region *array_region_a,
+ 			   const array_region *array_region_b,
+ 			   array_region *merged_array_region,
+ 			   region_id merged_rid,
+ 			   model_merger *merger);
+ 
+   void walk_for_canonicalization (canonicalization *c) const FINAL OVERRIDE;
+ 
+   iterator_t begin () { return m_map.begin (); }
+   iterator_t end () { return m_map.end (); }
+   size_t elements () const { return m_map.elements (); }
+ 
+   region_id get_or_create (region_model *model,
+ 			   region_id this_rid,
+ 			   key_t key, tree type,
+ 			   region_model_context *ctxt);
+ //  void unbind (int expr);
+   region_id *get (key_t key);
+ 
+   void remap_region_ids (const region_id_map &map) FINAL OVERRIDE;
+ 
+   bool get_key_for_child_region (region_id child_rid,
+ 				 key_t *out) const;
+ 
+ #if 0
+   bool get_key_for_child_region (region *child,
+ 				 const region_model &model,
+ 				 key_t *out) const;
+ #endif
+ 
+   void add_to_hash (inchash::hash &hstate) const OVERRIDE;
+   void print_fields (const region_model &model,
+ 		     region_id this_rid,
+ 		     pretty_printer *pp) const
+     OVERRIDE;
+   void validate (const region_model &model) const FINAL OVERRIDE;
+ 
+   static key_t key_from_constant (tree cst);
+   tree constant_from_key (key_t key);
+ 
+  private:
+   static int key_cmp (const void *, const void *);
+ 
+   /* Mapping from tree to child region.  */
+   map_t m_map;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <array_region *>::test (region *reg)
+ {
+   return reg->get_kind () == RK_ARRAY;
+ }
+ 
+ namespace ana {
+ 
+ /* Concrete region subclass representing a stack, containing all stack
+    frames, and implicitly providing a POISON_KIND_UNINIT value to all
+    child regions by default.  */
+ 
+ class stack_region : public region
+ {
+ public:
+   stack_region (region_id parent_rid, svalue_id sval_id)
+   : region (parent_rid, sval_id, NULL_TREE)
+   {}
+ 
+   stack_region (const stack_region &other);
+ 
+   bool compare_fields (const stack_region &other) const;
+ 
+   region *clone () const FINAL OVERRIDE;
+ 
+   enum region_kind get_kind () const FINAL OVERRIDE { return RK_STACK; }
+ 
+   void dump_child_label (const region_model &model,
+ 			 region_id this_rid,
+ 			 region_id child_rid,
+ 			 pretty_printer *pp) const
+     FINAL OVERRIDE;
+ 
+   void push_frame (region_id frame_rid);
+   region_id get_current_frame_id () const;
+   void pop_frame (region_model *model, region_id result_dst_rid,
+ 		  bool purge, purge_stats *stats,
+ 		  region_model_context *ctxt);
+ 
+   void remap_region_ids (const region_id_map &map) FINAL OVERRIDE;
+ 
+   unsigned get_num_frames () const { return m_frame_rids.length (); }
+   region_id get_frame_rid (unsigned i) const { return m_frame_rids[i]; }
+ 
+   static bool can_merge_p (const stack_region *stack_region_a,
+ 			   const stack_region *stack_region_b,
+ 			   model_merger *merger);
+ 
+   void walk_for_canonicalization (canonicalization *c) const FINAL OVERRIDE;
+ 
+   svalue_id get_value_by_name (tree identifier,
+ 			       const region_model &model) const;
+ 
+   void validate (const region_model &model) const FINAL OVERRIDE;
+ 
+  private:
+   void add_to_hash (inchash::hash &hstate) const FINAL OVERRIDE;
+   void print_fields (const region_model &model,
+ 		     region_id this_rid,
+ 		     pretty_printer *pp) const
+     FINAL OVERRIDE;
+ 
+   auto_vec<region_id> m_frame_rids;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <stack_region *>::test (region *reg)
+ {
+   return reg->get_kind () == RK_STACK;
+ }
+ 
+ namespace ana {
+ 
+ /* Concrete region subclass: a region within which regions can be
+    dynamically allocated.  */
+ 
+ class heap_region : public region
+ {
+ public:
+   heap_region (region_id parent_rid, svalue_id sval_id)
+   : region (parent_rid, sval_id, NULL_TREE)
+   {}
+   heap_region (const heap_region &other);
+ 
+   bool compare_fields (const heap_region &other) const;
+ 
+   region *clone () const FINAL OVERRIDE;
+ 
+   enum region_kind get_kind () const FINAL OVERRIDE { return RK_HEAP; }
+ 
+   static bool can_merge_p (const heap_region *heap_a, region_id heap_a_rid,
+ 			   const heap_region *heap_b, region_id heap_b_rid,
+ 			   heap_region *merged_heap, region_id merged_heap_rid,
+ 			   model_merger *merger);
+ 
+   void walk_for_canonicalization (canonicalization *c) const FINAL OVERRIDE;
+ 
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <heap_region *>::test (region *reg)
+ {
+   return reg->get_kind () == RK_HEAP;
+ }
+ 
+ namespace ana {
+ 
+ /* Concrete region subclass.  The root region, containing all regions
+    (either directly, or as descendents).
+    Unique within a region_model.  */
+ 
+ class root_region : public region
+ {
+ public:
+   root_region ();
+   root_region (const root_region &other);
+ 
+   bool compare_fields (const root_region &other) const;
+ 
+   region *clone () const FINAL OVERRIDE;
+ 
+   enum region_kind get_kind () const FINAL OVERRIDE { return RK_ROOT; }
+ 
+   void dump_child_label (const region_model &model,
+ 			 region_id this_rid,
+ 			 region_id child_rid,
+ 			 pretty_printer *pp) const
+     FINAL OVERRIDE;
+ 
+   region_id push_frame (region_model *model, function *fun,
+ 			vec<svalue_id> *arg_sids,
+ 			region_model_context *ctxt);
+   region_id get_current_frame_id (const region_model &model) const;
+   void pop_frame (region_model *model, region_id result_dst_rid,
+ 		  bool purge, purge_stats *stats,
+ 		  region_model_context *ctxt);
+ 
+   region_id ensure_stack_region (region_model *model);
+   region_id get_stack_region_id () const { return m_stack_rid; }
+   stack_region *get_stack_region (const region_model *model) const;
+ 
+   region_id ensure_globals_region (region_model *model);
+   region_id get_globals_region_id () const { return m_globals_rid; }
+   globals_region *get_globals_region (const region_model *model) const;
+ 
+   region_id ensure_code_region (region_model *model);
+   code_region *get_code_region (const region_model *model) const;
+ 
+   region_id ensure_heap_region (region_model *model);
+   heap_region *get_heap_region (const region_model *model) const;
+ 
+   void remap_region_ids (const region_id_map &map) FINAL OVERRIDE;
+ 
+   static bool can_merge_p (const root_region *root_region_a,
+ 			   const root_region *root_region_b,
+ 			   root_region *merged_root_region,
+ 			   model_merger *merger);
+ 
+   void walk_for_canonicalization (canonicalization *c) const FINAL OVERRIDE;
+ 
+   svalue_id get_value_by_name (tree identifier,
+ 			       const region_model &model) const;
+ 
+   void validate (const region_model &model) const FINAL OVERRIDE;
+ 
+ private:
+   void add_to_hash (inchash::hash &hstate) const FINAL OVERRIDE;
+   void print_fields (const region_model &model,
+ 		     region_id this_rid,
+ 		     pretty_printer *pp) const
+     FINAL OVERRIDE;
+ 
+   region_id m_stack_rid;
+   region_id m_globals_rid;
+   region_id m_code_rid;
+   region_id m_heap_rid;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <root_region *>::test (region *reg)
+ {
+   return reg->get_kind () == RK_ROOT;
+ }
+ 
+ namespace ana {
+ 
+ /* Concrete region subclass: a region to use when dereferencing an unknown
+    pointer.  */
+ 
+ class symbolic_region : public region
+ {
+ public:
+   symbolic_region (region_id parent_rid, tree type, bool possibly_null)
+   : region (parent_rid, svalue_id::null (), type),
+     m_possibly_null (possibly_null)
+   {}
+   symbolic_region (const symbolic_region &other);
+ 
+   const symbolic_region *dyn_cast_symbolic_region () const FINAL OVERRIDE
+   { return this; }
+   symbolic_region *dyn_cast_symbolic_region () FINAL OVERRIDE
+   { return this; }
+ 
+   bool compare_fields (const symbolic_region &other) const;
+ 
+   region *clone () const FINAL OVERRIDE;
+ 
+   enum region_kind get_kind () const FINAL OVERRIDE { return RK_SYMBOLIC; }
+ 
+   void walk_for_canonicalization (canonicalization *c) const FINAL OVERRIDE;
+ 
+   void print_fields (const region_model &model,
+ 		     region_id this_rid,
+ 		     pretty_printer *pp) const FINAL OVERRIDE;
+ 
+   bool m_possibly_null;
+ };
+ 
+ /* A region_model encapsulates a representation of the state of memory, with
+    a tree of regions, along with their associated values.
+    The representation is graph-like because values can be pointers to
+    regions.
+    It also stores a constraint_manager, capturing relationships between
+    the values.  */
+ 
+ class region_model
+ {
+  public:
+   region_model ();
+   region_model (const region_model &other);
+   ~region_model ();
+ 
+ #if 0//__cplusplus >= 201103
+   region_model (region_model &&other);
+ #endif
+ 
+   region_model &operator= (const region_model &other);
+ 
+   bool operator== (const region_model &other) const;
+   bool operator!= (const region_model &other) const
+   {
+     return !(*this == other);
+   }
+ 
+   hashval_t hash () const;
+ 
+   void print (pretty_printer *pp) const;
+ 
+   void print_svalue (svalue_id sid, pretty_printer *pp) const;
+ 
+   void dump_dot_to_pp (pretty_printer *pp) const;
+   void dump_dot_to_file (FILE *fp) const;
+   void dump_dot (const char *path) const;
+ 
+   void dump_to_pp (pretty_printer *pp, bool summarize) const;
+   void dump (FILE *fp, bool summarize) const;
+   void dump (bool summarize) const;
+ 
+   void debug () const;
+ 
+   void validate () const;
+ 
+   void canonicalize (region_model_context *ctxt);
+   bool canonicalized_p () const;
+ 
+   void check_for_poison (tree expr, region_model_context *ctxt);
+   void on_assignment (const gassign *stmt, region_model_context *ctxt);
+   bool on_call_pre (const gcall *stmt, region_model_context *ctxt);
+   void on_call_post (const gcall *stmt,
+ 		     bool unknown_side_effects,
+ 		     region_model_context *ctxt);
+   void handle_unrecognized_call (const gcall *call,
+ 				 region_model_context *ctxt);
+   void on_return (const greturn *stmt, region_model_context *ctxt);
+   void on_setjmp (const gcall *stmt, const exploded_node *enode,
+ 		  region_model_context *ctxt);
+   void on_longjmp (const gcall *longjmp_call, const gcall *setjmp_call,
+ 		   int setjmp_stack_depth, region_model_context *ctxt);
+ 
+   void update_for_phis (const supernode *snode,
+ 			const cfg_superedge *last_cfg_superedge,
+ 			region_model_context *ctxt);
+ 
+   void handle_phi (const gphi *phi,
+ 		   tree lhs, tree rhs, bool is_back_edge,
+ 		   region_model_context *ctxt);
+ 
+   bool maybe_update_for_edge (const superedge &edge,
+ 			      const gimple *last_stmt,
+ 			      region_model_context *ctxt);
+ 
+   region_id get_root_rid () const { return m_root_rid; }
+   root_region *get_root_region () const;
+ 
+   region_id get_stack_region_id () const;
+   region_id push_frame (function *fun, vec<svalue_id> *arg_sids,
+ 			region_model_context *ctxt);
+   region_id get_current_frame_id () const;
+   function * get_current_function () const;
+   void pop_frame (region_id result_dst_rid,
+ 		  bool purge, purge_stats *stats,
+ 		  region_model_context *ctxt);
+   int get_stack_depth () const;
+   function *get_function_at_depth (unsigned depth) const;
+ 
+   region_id get_globals_region_id () const;
+ 
+   svalue_id add_svalue (svalue *sval);
+   void replace_svalue (svalue_id sid, svalue *new_sval);
+ 
+   region_id add_region (region *r);
+ 
+   region_id add_region_for_type (region_id parent_rid, tree type,
+ 				 region_model_context *ctxt);
+ 
+   svalue *get_svalue (svalue_id sval_id) const;
+   region *get_region (region_id rid) const;
+ 
+   template <typename Subclass>
+   Subclass *get_region (region_id rid) const
+   {
+     region *result = get_region (rid);
+     if (result)
+       gcc_assert (is_a<Subclass *> (result));
+     return (Subclass *)result;
+   }
+ 
+   region_id get_lvalue (path_var pv, region_model_context *ctxt);
+   region_id get_lvalue (tree expr, region_model_context *ctxt);
+   svalue_id get_rvalue (path_var pv, region_model_context *ctxt);
+   svalue_id get_rvalue (tree expr, region_model_context *ctxt);
+ 
+   svalue_id get_or_create_ptr_svalue (tree ptr_type, region_id id);
+   svalue_id get_or_create_constant_svalue (tree cst_expr);
+   svalue_id get_svalue_for_fndecl (tree ptr_type, tree fndecl,
+ 				   region_model_context *ctxt);
+   svalue_id get_svalue_for_label (tree ptr_type, tree label,
+ 				  region_model_context *ctxt);
+ 
+   region_id get_region_for_fndecl (tree fndecl, region_model_context *ctxt);
+   region_id get_region_for_label (tree label, region_model_context *ctxt);
+ 
+   svalue_id maybe_cast (tree type, svalue_id sid, region_model_context *ctxt);
+   svalue_id maybe_cast_1 (tree type, svalue_id sid);
+ 
+   region_id get_field_region (region_id rid, tree field,
+ 			      region_model_context *ctxt);
+ 
+   region_id deref_rvalue (svalue_id ptr_sid, region_model_context *ctxt);
+   region_id deref_rvalue (tree ptr, region_model_context *ctxt);
+ 
+   void set_value (region_id lhs_rid, svalue_id rhs_sid,
+ 		  region_model_context *ctxt);
+   void set_value (tree lhs, tree rhs, region_model_context *ctxt);
+   svalue_id set_to_new_unknown_value (region_id dst_rid, tree type,
+ 				      region_model_context *ctxt);
+ 
+   void copy_region (region_id dst_rid, region_id src_rid,
+ 		    region_model_context *ctxt);
+ 
+   tristate eval_condition (svalue_id lhs,
+ 			   enum tree_code op,
+ 			   svalue_id rhs) const;
+   tristate eval_condition_without_cm (svalue_id lhs,
+ 				      enum tree_code op,
+ 				      svalue_id rhs) const;
+   tristate eval_condition (tree lhs,
+ 			   enum tree_code op,
+ 			   tree rhs,
+ 			   region_model_context *ctxt);
+   bool add_constraint (tree lhs, enum tree_code op, tree rhs,
+ 		       region_model_context *ctxt);
+ 
+   tree maybe_get_constant (svalue_id sid) const;
+ 
+   region_id add_new_malloc_region ();
+ 
+   tree get_representative_tree (svalue_id sid) const;
+   path_var get_representative_path_var (region_id rid) const;
+   void get_path_vars_for_svalue (svalue_id sid, vec<path_var> *out) const;
+ 
+   void purge_unused_svalues (purge_stats *out,
+ 			     region_model_context *ctxt,
+ 			     svalue_id_set *known_used_sids = NULL);
+   void remap_svalue_ids (const svalue_id_map &map);
+   void remap_region_ids (const region_id_map &map);
+ 
+   void purge_regions (const region_id_set &set,
+ 		      purge_stats *stats,
+ 		      logger *logger);
+ 
+   unsigned get_num_svalues () const { return m_svalues.length (); }
+   unsigned get_num_regions () const { return m_regions.length (); }
+ 
+   /* For selftests.  */
+   constraint_manager *get_constraints ()
+   {
+     return m_constraints;
+   }
+ 
+   void get_descendents (region_id rid, region_id_set *out,
+ 			region_id exclude_rid) const;
+ 
+   void delete_region_and_descendents (region_id rid,
+ 				      enum poison_kind pkind,
+ 				      purge_stats *stats,
+ 				      logger *logger);
+ 
+   bool can_merge_with_p (const region_model &other_model,
+ 			 region_model *out_model,
+ 			 svalue_id_merger_mapping *out) const;
+   bool can_merge_with_p (const region_model &other_model,
+ 			 region_model *out_model) const;
+ 
+   svalue_id get_value_by_name (const char *name) const;
+ 
+   svalue_id convert_byte_offset_to_array_index (tree ptr_type,
+ 						svalue_id offset_sid);
+ 
+   region_id get_or_create_mem_ref (tree type,
+ 				   svalue_id ptr_sid,
+ 				   svalue_id offset_sid,
+ 				   region_model_context *ctxt);
+   region_id get_or_create_pointer_plus_expr (tree type,
+ 					     svalue_id ptr_sid,
+ 					     svalue_id offset_sid,
+ 					     region_model_context *ctxt);
+   region_id get_or_create_view (region_id raw_rid, tree type,
+ 				region_model_context *ctxt);
+ 
+   tree get_fndecl_for_call (const gcall *call,
+ 			    region_model_context *ctxt);
+ 
+  private:
+   region_id get_lvalue_1 (path_var pv, region_model_context *ctxt);
+   svalue_id get_rvalue_1 (path_var pv, region_model_context *ctxt);
+ 
+   void copy_struct_region (region_id dst_rid, struct_region *dst_reg,
+ 			   struct_region *src_reg, region_model_context *ctxt);
+   void copy_union_region (region_id dst_rid, union_region *src_reg,
+ 			  region_model_context *ctxt);
+   void copy_array_region (region_id dst_rid, array_region *dst_reg,
+ 			  array_region *src_reg, region_model_context *ctxt);
+ 
+   region_id make_region_for_unexpected_tree_code (region_model_context *ctxt,
+ 						  tree t,
+ 						  const dump_location_t &loc);
+ 
+   void add_any_constraints_from_ssa_def_stmt (tree lhs,
+ 					      enum tree_code op,
+ 					      tree rhs,
+ 					      region_model_context *ctxt);
+   void add_any_constraints_from_gassign (enum tree_code op,
+ 					 tree rhs,
+ 					 const gassign *assign,
+ 					 region_model_context *ctxt);
+   void add_any_constraints_from_gcall (enum tree_code op,
+ 				       tree rhs,
+ 				       const gcall *call,
+ 				       region_model_context *ctxt);
+ 
+   void update_for_call_superedge (const call_superedge &call_edge,
+ 				  region_model_context *ctxt);
+   void update_for_return_superedge (const return_superedge &return_edge,
+ 				    region_model_context *ctxt);
+   void update_for_call_summary (const callgraph_superedge &cg_sedge,
+ 				region_model_context *ctxt);
+   bool apply_constraints_for_gcond (const cfg_superedge &edge,
+ 				    const gcond *cond_stmt,
+ 				    region_model_context *ctxt);
+   bool apply_constraints_for_gswitch (const switch_cfg_superedge &edge,
+ 				      const gswitch *switch_stmt,
+ 				      region_model_context *ctxt);
+ 
+   void poison_any_pointers_to_bad_regions (const region_id_set &bad_regions,
+ 					   enum poison_kind pkind);
+ 
+   void dump_summary_of_rep_path_vars (pretty_printer *pp,
+ 				      auto_vec<path_var> *rep_path_vars,
+ 				      bool *is_first);
+ 
+   auto_delete_vec<svalue> m_svalues;
+   auto_delete_vec<region> m_regions;
+   region_id m_root_rid;
+   constraint_manager *m_constraints; // TODO: embed, rather than dynalloc?
+ };
+ 
+ /* Some region_model activity could lead to warnings (e.g. attempts to use an
+    uninitialized value).  This abstract base class encapsulates an interface
+    for the region model to use when emitting such warnings.
+ 
+    It also provides an interface for being notified about svalue_ids being
+    remapped, and being deleted.
+ 
+    Having this as an abstract base class allows us to support the various
+    operations needed by program_state in the analyzer within region_model,
+    whilst keeping them somewhat modularized.  */
+ 
+ class region_model_context
+ {
+  public:
+   virtual void warn (pending_diagnostic *d) = 0;
+ 
+   /* Hook for clients that store svalue_id instances, so that they
+      can remap their IDs when the underlying region_model renumbers
+      the IDs.  */
+   virtual void remap_svalue_ids (const svalue_id_map &map) = 0;
+ 
+ #if 0
+   /* Return true if if's OK to purge SID when simplifying state.
+      Subclasses can return false for values that have sm state,
+      to avoid generating "leak" false positives.  */
+   virtual bool can_purge_p (svalue_id sid) = 0;
+ #endif
+ 
+   /* Hook for clients to be notified when a range of SIDs have
+      been purged, so that they can purge state relating to those
+      values (and potentially emit warnings about leaks).
+      All SIDs from FIRST_PURGED_SID numerically upwards are being
+      purged.
+      The return values is a count of how many items of data the client
+      has purged (potentially for use in selftests).
+      MAP has already been applied to the IDs, but is provided in case
+      the client needs to figure out the old IDs.  */
+   virtual int on_svalue_purge (svalue_id first_purged_sid,
+ 			       const svalue_id_map &map) = 0;
+ 
+   virtual logger *get_logger () = 0;
+ 
+   /* Hook for clients to be notified when CHILD_SID is created
+      from PARENT_SID, when "inheriting" a value for a region from a
+      parent region.
+      This exists so that state machines that inherit state can
+      propagate the state from parent to child.  */
+   virtual void on_inherited_svalue (svalue_id parent_sid,
+ 				    svalue_id child_sid) = 0;
+ 
+   /* Hook for clients to be notified when DST_SID is created
+      (or reused) as a cast from SRC_SID.
+      This exists so that state machines can propagate the state
+      from SRC_SID to DST_SID.  */
+   virtual void on_cast (svalue_id src_sid,
+ 			svalue_id dst_sid) = 0;
+ 
+   /* Hook for clients to be notified when the condition
+      "LHS OP RHS" is added to the region model.
+      This exists so that state machines can detect tests on edges,
+      and use them to trigger sm-state transitions (e.g. transitions due
+      to ptrs becoming known to be NULL or non-NULL, rather than just
+      "unchecked") */
+   virtual void on_condition (tree lhs, enum tree_code op, tree rhs) = 0;
+ 
+   /* Hooks for clients to be notified when an unknown change happens
+      to SID (in response to a call to an unknown function).  */
+   virtual void on_unknown_change (svalue_id sid) = 0;
+ 
+   /* Hooks for clients to be notified when a phi node is handled,
+      where RHS is the pertinent argument.  */
+   virtual void on_phi (const gphi *phi, tree rhs) = 0;
+ 
+   /* Hooks for clients to be notified when the region model doesn't
+      know how to handle the tree code of T at LOC.  */
+   virtual void on_unexpected_tree_code (tree t,
+ 					const dump_location_t &loc) = 0;
+ };
+ 
+ /* A "do nothing" subclass of region_model_context.  */
+ 
+ class noop_region_model_context : public region_model_context
+ {
+ public:
+   void warn (pending_diagnostic *) OVERRIDE {}
+   void remap_svalue_ids (const svalue_id_map &) OVERRIDE {}
+   int on_svalue_purge (svalue_id, const svalue_id_map &) OVERRIDE
+   {
+     return 0;
+   }
+   logger *get_logger () OVERRIDE { return NULL; }
+   void on_inherited_svalue (svalue_id parent_sid ATTRIBUTE_UNUSED,
+ 			    svalue_id child_sid  ATTRIBUTE_UNUSED)
+     OVERRIDE
+   {
+   }
+   void on_cast (svalue_id src_sid ATTRIBUTE_UNUSED,
+ 		svalue_id dst_sid ATTRIBUTE_UNUSED) OVERRIDE
+   {
+   }
+   void on_condition (tree lhs ATTRIBUTE_UNUSED,
+ 		     enum tree_code op ATTRIBUTE_UNUSED,
+ 		     tree rhs ATTRIBUTE_UNUSED) OVERRIDE
+   {
+   }
+   void on_unknown_change (svalue_id sid ATTRIBUTE_UNUSED) OVERRIDE
+   {
+   }
+   void on_phi (const gphi *phi ATTRIBUTE_UNUSED,
+ 	       tree rhs ATTRIBUTE_UNUSED) OVERRIDE
+   {
+   }
+   void on_unexpected_tree_code (tree, const dump_location_t &) OVERRIDE {}
+ };
+ 
+ /* A subclass of region_model_context for determining if operations fail
+    e.g. "can we generate a region for the lvalue of EXPR?".  */
+ 
+ class tentative_region_model_context : public noop_region_model_context
+ {
+ public:
+   tentative_region_model_context () : m_num_unexpected_codes (0) {}
+ 
+   void on_unexpected_tree_code (tree, const dump_location_t &)
+     FINAL OVERRIDE
+   {
+     m_num_unexpected_codes++;
+   }
+ 
+   bool had_errors_p () const { return m_num_unexpected_codes > 0; }
+ 
+ private:
+   int m_num_unexpected_codes;
+ };
+ 
+ /* A bundle of data for use when attempting to merge two region_model
+    instances to make a third.  */
+ 
+ struct model_merger
+ {
+   model_merger (const region_model *model_a,
+ 		const region_model *model_b,
+ 		region_model *merged_model,
+ 		svalue_id_merger_mapping *sid_mapping)
+   : m_model_a (model_a), m_model_b (model_b),
+     m_merged_model (merged_model),
+     m_map_regions_from_a_to_m (model_a->get_num_regions ()),
+     m_map_regions_from_b_to_m (model_b->get_num_regions ()),
+     m_sid_mapping (sid_mapping)
+   {
+     gcc_assert (sid_mapping);
+   }
+ 
+   void dump_to_pp (pretty_printer *pp) const;
+   void dump (FILE *fp) const;
+   void dump () const;
+ 
+   template <typename Subclass>
+   Subclass *get_region_a (region_id rid_a) const
+   {
+     return m_model_a->get_region <Subclass> (rid_a);
+   }
+ 
+   template <typename Subclass>
+   Subclass *get_region_b (region_id rid_b) const
+   {
+     return m_model_b->get_region <Subclass> (rid_b);
+   }
+ 
+   bool can_merge_values_p (svalue_id sid_a,
+ 			   svalue_id sid_b,
+ 			   svalue_id *merged_sid);
+ 
+   void record_regions (region_id a_rid,
+ 		       region_id b_rid,
+ 		       region_id merged_rid);
+ 
+   void record_svalues (svalue_id a_sid,
+ 		       svalue_id b_sid,
+ 		       svalue_id merged_sid);
+ 
+   const region_model *m_model_a;
+   const region_model *m_model_b;
+   region_model *m_merged_model;
+ 
+   one_way_region_id_map m_map_regions_from_a_to_m;
+   one_way_region_id_map m_map_regions_from_b_to_m;
+   svalue_id_merger_mapping *m_sid_mapping;
+ };
+ 
+ /* A bundle of data that can be optionally generated during merger of two
+    region_models that describes how svalue_ids in each of the two inputs
+    are mapped to svalue_ids in the merged output.
+ 
+    For use when merging sm-states within program_state.  */
+ 
+ struct svalue_id_merger_mapping
+ {
+   svalue_id_merger_mapping (const region_model &a,
+ 			    const region_model &b);
+ 
+   void dump_to_pp (pretty_printer *pp) const;
+   void dump (FILE *fp) const;
+   void dump () const;
+ 
+   one_way_svalue_id_map m_map_from_a_to_m;
+   one_way_svalue_id_map m_map_from_b_to_m;
+ };
+ 
+ /* A bundle of data used when canonicalizing a region_model so that the
+    order of regions and svalues is in a predictable order (thus increasing
+    the chance of two region_models being equal).
+ 
+    This object is used to keep track of a recursive traversal across the
+    svalues and regions within the model, made in a deterministic order,
+    assigning new ids the first time each region or svalue is
+    encountered.  */
+ 
+ struct canonicalization
+ {
+   canonicalization (const region_model &model);
+   void walk_rid (region_id rid);
+   void walk_sid (svalue_id sid);
+ 
+   void dump_to_pp (pretty_printer *pp) const;
+   void dump (FILE *fp) const;
+   void dump () const;
+ 
+   const region_model &m_model;
+   /* Maps from existing IDs to new IDs.  */
+   region_id_map m_rid_map;
+   svalue_id_map m_sid_map;
+   /* The next IDs to hand out.  */
+   int m_next_rid_int;
+   int m_next_sid_int;
+ };
+ 
+ } // namespace ana
+ 
+ namespace inchash
+ {
+   extern void add (svalue_id sid, hash &hstate);
+   extern void add (region_id rid, hash &hstate);
+ } // namespace inchash
+ 
+ extern void debug (const region_model &rmodel);
+ 
+ namespace ana {
+ 
+ #if CHECKING_P
+ 
+ namespace selftest {
+ 
+ using namespace ::selftest;
+ 
+ /* An implementation of region_model_context for use in selftests, which
+    stores any pending_diagnostic instances passed to it.  */
+ 
+ class test_region_model_context : public noop_region_model_context
+ {
+ public:
+   void warn (pending_diagnostic *d) FINAL OVERRIDE
+   {
+     m_diagnostics.safe_push (d);
+   }
+ 
+   unsigned get_num_diagnostics () const { return m_diagnostics.length (); }
+ 
+   void on_unexpected_tree_code (tree t, const dump_location_t &)
+     FINAL OVERRIDE
+   {
+     internal_error ("unhandled tree code: %qs",
+ 		    t ? get_tree_code_name (TREE_CODE (t)) : "(null)");
+   }
+ 
+ private:
+   /* Implicitly delete any diagnostics in the dtor.  */
+   auto_delete_vec<pending_diagnostic> m_diagnostics;
+ };
+ 
+ /* Attempt to add the constraint (LHS OP RHS) to MODEL.
+    Verify that MODEL remains satisfiable.  */
+ 
+ #define ADD_SAT_CONSTRAINT(MODEL, LHS, OP, RHS)	\
+   SELFTEST_BEGIN_STMT					\
+     bool sat = (MODEL).add_constraint (LHS, OP, RHS, NULL);	\
+     ASSERT_TRUE (sat);					\
+   SELFTEST_END_STMT
+ 
+ /* Attempt to add the constraint (LHS OP RHS) to MODEL.
+    Verify that the result is not satisfiable.  */
+ 
+ #define ADD_UNSAT_CONSTRAINT(MODEL, LHS, OP, RHS)	\
+   SELFTEST_BEGIN_STMT					\
+     bool sat = (MODEL).add_constraint (LHS, OP, RHS, NULL);	\
+     ASSERT_FALSE (sat);				\
+   SELFTEST_END_STMT
+ 
+ /* Implementation detail of the ASSERT_CONDITION_* macros.  */
+ 
+ void assert_condition (const location &loc,
+ 		       region_model &model,
+ 		       tree lhs, tree_code op, tree rhs,
+ 		       tristate expected);
+ 
+ /* Assert that REGION_MODEL evaluates the condition "LHS OP RHS"
+    as "true".  */
+ 
+ #define ASSERT_CONDITION_TRUE(REGION_MODEL, LHS, OP, RHS) \
+   SELFTEST_BEGIN_STMT							\
+   assert_condition (SELFTEST_LOCATION, REGION_MODEL, LHS, OP, RHS,	\
+ 		    tristate (tristate::TS_TRUE));		\
+   SELFTEST_END_STMT
+ 
+ /* Assert that REGION_MODEL evaluates the condition "LHS OP RHS"
+    as "false".  */
+ 
+ #define ASSERT_CONDITION_FALSE(REGION_MODEL, LHS, OP, RHS) \
+   SELFTEST_BEGIN_STMT							\
+   assert_condition (SELFTEST_LOCATION, REGION_MODEL, LHS, OP, RHS,	\
+ 		    tristate (tristate::TS_FALSE));		\
+   SELFTEST_END_STMT
+ 
+ /* Assert that REGION_MODEL evaluates the condition "LHS OP RHS"
+    as "unknown".  */
+ 
+ #define ASSERT_CONDITION_UNKNOWN(REGION_MODEL, LHS, OP, RHS) \
+   SELFTEST_BEGIN_STMT							\
+   assert_condition (SELFTEST_LOCATION, REGION_MODEL, LHS, OP, RHS,	\
+ 		    tristate (tristate::TS_UNKNOWN));		\
+   SELFTEST_END_STMT
+ 
+ } /* end of namespace selftest.  */
+ 
+ #endif /* #if CHECKING_P */
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_REGION_MODEL_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/sm-file.cc gcc-10.1.0/gcc/analyzer/sm-file.cc
*** gcc-9.3.0/gcc/analyzer/sm-file.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/sm-file.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,441 ----
+ /* A state machine for detecting misuses of <stdio.h>'s FILE * API.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "options.h"
+ #include "diagnostic-path.h"
+ #include "diagnostic-metadata.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "diagnostic-event-id.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/sm.h"
+ #include "analyzer/pending-diagnostic.h"
+ #include "analyzer/function-set.h"
+ #include "analyzer/analyzer-selftests.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ namespace {
+ 
+ /* A state machine for detecting misuses of <stdio.h>'s FILE * API.  */
+ 
+ class fileptr_state_machine : public state_machine
+ {
+ public:
+   fileptr_state_machine (logger *logger);
+ 
+   bool inherited_state_p () const FINAL OVERRIDE { return false; }
+ 
+   bool on_stmt (sm_context *sm_ctxt,
+ 		const supernode *node,
+ 		const gimple *stmt) const FINAL OVERRIDE;
+ 
+   void on_condition (sm_context *sm_ctxt,
+ 		     const supernode *node,
+ 		     const gimple *stmt,
+ 		     tree lhs,
+ 		     enum tree_code op,
+ 		     tree rhs) const FINAL OVERRIDE;
+ 
+   bool can_purge_p (state_t s) const FINAL OVERRIDE;
+   pending_diagnostic *on_leak (tree var) const FINAL OVERRIDE;
+ 
+   /* Start state.  */
+   state_t m_start;
+ 
+   /* State for a FILE * returned from fopen that hasn't been checked for
+      NULL.
+      It could be an open stream, or could be NULL.  */
+   state_t m_unchecked;
+ 
+   /* State for a FILE * that's known to be NULL.  */
+   state_t m_null;
+ 
+   /* State for a FILE * that's known to be a non-NULL open stream.  */
+   state_t m_nonnull;
+ 
+   /* State for a FILE * that's had fclose called on it.  */
+   state_t m_closed;
+ 
+   /* Stop state, for a FILE * we don't want to track any more.  */
+   state_t m_stop;
+ };
+ 
+ /* Base class for diagnostics relative to fileptr_state_machine.  */
+ 
+ class file_diagnostic : public pending_diagnostic
+ {
+ public:
+   file_diagnostic (const fileptr_state_machine &sm, tree arg)
+   : m_sm (sm), m_arg (arg)
+   {}
+ 
+   bool subclass_equal_p (const pending_diagnostic &base_other) const OVERRIDE
+   {
+     return same_tree_p (m_arg, ((const file_diagnostic &)base_other).m_arg);
+   }
+ 
+   label_text describe_state_change (const evdesc::state_change &change)
+     OVERRIDE
+   {
+     if (change.m_old_state == m_sm.m_start
+ 	&& change.m_new_state == m_sm.m_unchecked)
+       // TODO: verify that it's the fopen stmt, not a copy
+       return label_text::borrow ("opened here");
+     if (change.m_old_state == m_sm.m_unchecked
+ 	&& change.m_new_state == m_sm.m_nonnull)
+       return change.formatted_print ("assuming %qE is non-NULL",
+ 				     change.m_expr);
+     if (change.m_new_state == m_sm.m_null)
+       return change.formatted_print ("assuming %qE is NULL",
+ 				     change.m_expr);
+     return label_text ();
+   }
+ 
+ protected:
+   const fileptr_state_machine &m_sm;
+   tree m_arg;
+ };
+ 
+ class double_fclose : public file_diagnostic
+ {
+ public:
+   double_fclose (const fileptr_state_machine &sm, tree arg)
+     : file_diagnostic (sm, arg)
+   {}
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "double_fclose"; }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     return warning_at (rich_loc, OPT_Wanalyzer_double_fclose,
+ 		       "double %<fclose%> of FILE %qE",
+ 		       m_arg);
+   }
+ 
+   label_text describe_state_change (const evdesc::state_change &change)
+     OVERRIDE
+   {
+     if (change.m_new_state == m_sm.m_closed)
+       {
+ 	m_first_fclose_event = change.m_event_id;
+ 	return change.formatted_print ("first %qs here", "fclose");
+       }
+     return file_diagnostic::describe_state_change (change);
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     if (m_first_fclose_event.known_p ())
+       return ev.formatted_print ("second %qs here; first %qs was at %@",
+ 				 "fclose", "fclose",
+ 				 &m_first_fclose_event);
+     return ev.formatted_print ("second %qs here", "fclose");
+   }
+ 
+ private:
+   diagnostic_event_id_t m_first_fclose_event;
+ };
+ 
+ class file_leak : public file_diagnostic
+ {
+ public:
+   file_leak (const fileptr_state_machine &sm, tree arg)
+     : file_diagnostic (sm, arg)
+   {}
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "file_leak"; }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     diagnostic_metadata m;
+     /* CWE-775: "Missing Release of File Descriptor or Handle after
+        Effective Lifetime". */
+     m.add_cwe (775);
+     return warning_meta (rich_loc, m, OPT_Wanalyzer_file_leak,
+ 			 "leak of FILE %qE",
+ 			 m_arg);
+   }
+ 
+   label_text describe_state_change (const evdesc::state_change &change)
+     FINAL OVERRIDE
+   {
+     if (change.m_new_state == m_sm.m_unchecked)
+       {
+ 	m_fopen_event = change.m_event_id;
+ 	return label_text::borrow ("opened here");
+       }
+     return file_diagnostic::describe_state_change (change);
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     if (m_fopen_event.known_p ())
+       return ev.formatted_print ("%qE leaks here; was opened at %@",
+ 				 ev.m_expr, &m_fopen_event);
+     else
+       return ev.formatted_print ("%qE leaks here", ev.m_expr);
+   }
+ 
+ private:
+   diagnostic_event_id_t m_fopen_event;
+ };
+ 
+ /* fileptr_state_machine's ctor.  */
+ 
+ fileptr_state_machine::fileptr_state_machine (logger *logger)
+ : state_machine ("file", logger)
+ {
+   m_start = add_state ("start");
+   m_unchecked = add_state ("unchecked");
+   m_null = add_state ("null");
+   m_nonnull = add_state ("nonnull");
+   m_closed = add_state ("closed");
+   m_stop = add_state ("stop");
+ }
+ 
+ /* Get a set of functions that are known to take a FILE * that must be open,
+    and are known to not close it.  */
+ 
+ static function_set
+ get_file_using_fns ()
+ {
+   // TODO: populate this list more fully
+   static const char * const funcnames[] = {
+     /* This array must be kept sorted.  */
+     "__fbufsize",
+     "__flbf",
+     "__fpending",
+     "__fpurge"
+     "__freadable",
+     "__freading",
+     "__fsetlocking",
+     "__fwritable",
+     "__fwriting",
+     "clearerr",
+     "clearerr_unlocked",
+     "feof",
+     "feof_unlocked",
+     "ferror",
+     "ferror_unlocked",
+     "fflush", // safe to call with NULL
+     "fflush_unlocked",  // safe to call with NULL
+     "fgetc",
+     "fgetc_unlocked",
+     "fgetpos",
+     "fgets",
+     "fgets_unlocked",
+     "fgetwc_unlocked",
+     "fgetws_unlocked",
+     "fileno",
+     "fileno_unlocked",
+     "fprintf",
+     "fputc",
+     "fputc_unlocked",
+     "fputs",
+     "fputs_unlocked",
+     "fputwc_unlocked",
+     "fputws_unlocked",
+     "fread_unlocked",
+     "fseek",
+     "fsetpos",
+     "ftell",
+     "fwrite_unlocked",
+     "getc",
+     "getc_unlocked",
+     "getwc_unlocked",
+     "putc",
+     "putc_unlocked",
+     "rewind",
+     "setbuf",
+     "setbuffer",
+     "setlinebuf",
+     "setvbuf",
+     "ungetc",
+     "vfprintf"
+   };
+   const size_t count
+     = sizeof(funcnames) / sizeof (funcnames[0]);
+   function_set fs (funcnames, count);
+   return fs;
+ }
+ 
+ /* Return true if FNDECL is known to require an open FILE *, and is known
+    to not close it.  */
+ 
+ static bool
+ is_file_using_fn_p (tree fndecl)
+ {
+   function_set fs = get_file_using_fns ();
+   return fs.contains_decl_p (fndecl);
+ }
+ 
+ /* Implementation of state_machine::on_stmt vfunc for fileptr_state_machine.  */
+ 
+ bool
+ fileptr_state_machine::on_stmt (sm_context *sm_ctxt,
+ 				const supernode *node,
+ 				const gimple *stmt) const
+ {
+   if (const gcall *call = dyn_cast <const gcall *> (stmt))
+     if (tree callee_fndecl = sm_ctxt->get_fndecl_for_call (call))
+       {
+ 	if (is_named_call_p (callee_fndecl, "fopen", call, 2))
+ 	  {
+ 	    tree lhs = gimple_call_lhs (call);
+ 	    if (lhs)
+ 	      {
+ 		lhs = sm_ctxt->get_readable_tree (lhs);
+ 		sm_ctxt->on_transition (node, stmt, lhs, m_start, m_unchecked);
+ 	      }
+ 	    else
+ 	      {
+ 		/* TODO: report leak.  */
+ 	      }
+ 	    return true;
+ 	  }
+ 
+ 	if (is_named_call_p (callee_fndecl, "fclose", call, 1))
+ 	  {
+ 	    tree arg = gimple_call_arg (call, 0);
+ 	    arg = sm_ctxt->get_readable_tree (arg);
+ 
+ 	    sm_ctxt->on_transition (node, stmt, arg, m_start, m_closed);
+ 
+ 	    // TODO: is it safe to call fclose (NULL) ?
+ 	    sm_ctxt->on_transition (node, stmt, arg, m_unchecked, m_closed);
+ 	    sm_ctxt->on_transition (node, stmt, arg, m_null, m_closed);
+ 
+ 	    sm_ctxt->on_transition (node, stmt , arg, m_nonnull, m_closed);
+ 
+ 	    sm_ctxt->warn_for_state (node, stmt, arg, m_closed,
+ 				     new double_fclose (*this, arg));
+ 	    sm_ctxt->on_transition (node, stmt, arg, m_closed, m_stop);
+ 	    return true;
+ 	  }
+ 
+ 	if (is_file_using_fn_p (callee_fndecl))
+ 	  {
+ 	    // TODO: operations on unchecked file
+ 	    return true;
+ 	  }
+ 	// etc
+       }
+ 
+   return false;
+ }
+ 
+ /* Implementation of state_machine::on_condition vfunc for
+    fileptr_state_machine.
+    Potentially transition state 'unchecked' to 'nonnull' or to 'null'.  */
+ 
+ void
+ fileptr_state_machine::on_condition (sm_context *sm_ctxt,
+ 				     const supernode *node,
+ 				     const gimple *stmt,
+ 				     tree lhs,
+ 				     enum tree_code op,
+ 				     tree rhs) const
+ {
+   if (!zerop (rhs))
+     return;
+ 
+   // TODO: has to be a FILE *, specifically
+   if (TREE_CODE (TREE_TYPE (lhs)) != POINTER_TYPE)
+     return;
+ 
+   // TODO: has to be a FILE *, specifically
+   if (TREE_CODE (TREE_TYPE (rhs)) != POINTER_TYPE)
+     return;
+ 
+   if (op == NE_EXPR)
+     {
+       log ("got 'ARG != 0' match");
+       sm_ctxt->on_transition (node, stmt,
+ 			      lhs, m_unchecked, m_nonnull);
+     }
+   else if (op == EQ_EXPR)
+     {
+       log ("got 'ARG == 0' match");
+       sm_ctxt->on_transition (node, stmt,
+ 			      lhs, m_unchecked, m_null);
+     }
+ }
+ 
+ /* Implementation of state_machine::can_purge_p vfunc for fileptr_state_machine.
+    Don't allow purging of pointers in state 'unchecked' or 'nonnull'
+    (to avoid false leak reports).  */
+ 
+ bool
+ fileptr_state_machine::can_purge_p (state_t s) const
+ {
+   return s != m_unchecked && s != m_nonnull;
+ }
+ 
+ /* Implementation of state_machine::on_leak vfunc for
+    fileptr_state_machine, for complaining about leaks of FILE * in
+    state 'unchecked' and 'nonnull'.  */
+ 
+ pending_diagnostic *
+ fileptr_state_machine::on_leak (tree var) const
+ {
+   return new file_leak (*this, var);
+ }
+ 
+ } // anonymous namespace
+ 
+ /* Internal interface to this file. */
+ 
+ state_machine *
+ make_fileptr_state_machine (logger *logger)
+ {
+   return new fileptr_state_machine (logger);
+ }
+ 
+ #if CHECKING_P
+ 
+ namespace selftest {
+ 
+ /* Run all of the selftests within this file.  */
+ 
+ void
+ analyzer_sm_file_cc_tests ()
+ {
+   function_set fs = get_file_using_fns ();
+   fs.assert_sorted ();
+   fs.assert_sane ();
+ }
+ 
+ } // namespace selftest
+ 
+ #endif /* CHECKING_P */
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/sm-malloc.cc gcc-10.1.0/gcc/analyzer/sm-malloc.cc
*** gcc-9.3.0/gcc/analyzer/sm-malloc.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/sm-malloc.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,848 ----
+ /* A state machine for detecting misuses of the malloc/free API.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "options.h"
+ #include "bitmap.h"
+ #include "diagnostic-path.h"
+ #include "diagnostic-metadata.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "diagnostic-event-id.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/sm.h"
+ #include "analyzer/pending-diagnostic.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ namespace {
+ 
+ /* A state machine for detecting misuses of the malloc/free API.
+ 
+    See sm-malloc.dot for an overview (keep this in-sync with that file).  */
+ 
+ class malloc_state_machine : public state_machine
+ {
+ public:
+   malloc_state_machine (logger *logger);
+ 
+   bool inherited_state_p () const FINAL OVERRIDE { return false; }
+ 
+   bool on_stmt (sm_context *sm_ctxt,
+ 		const supernode *node,
+ 		const gimple *stmt) const FINAL OVERRIDE;
+ 
+   void on_phi (sm_context *sm_ctxt,
+ 	       const supernode *node,
+ 	       const gphi *phi,
+ 	       tree rhs) const FINAL OVERRIDE;
+ 
+   void on_condition (sm_context *sm_ctxt,
+ 		     const supernode *node,
+ 		     const gimple *stmt,
+ 		     tree lhs,
+ 		     enum tree_code op,
+ 		     tree rhs) const FINAL OVERRIDE;
+ 
+   bool can_purge_p (state_t s) const FINAL OVERRIDE;
+   pending_diagnostic *on_leak (tree var) const FINAL OVERRIDE;
+ 
+   /* Start state.  */
+   state_t m_start;
+ 
+   /* State for a pointer returned from malloc that hasn't been checked for
+      NULL.
+      It could be a pointer to heap-allocated memory, or could be NULL.  */
+   state_t m_unchecked;
+ 
+   /* State for a pointer that's known to be NULL.  */
+   state_t m_null;
+ 
+   /* State for a pointer to heap-allocated memory, known to be non-NULL.  */
+   state_t m_nonnull;
+ 
+   /* State for a pointer to freed memory.  */
+   state_t m_freed;
+ 
+   /* State for a pointer that's known to not be on the heap (e.g. to a local
+      or global).  */
+   state_t m_non_heap; // TODO: or should this be a different state machine?
+   // or do we need child values etc?
+ 
+   /* Stop state, for pointers we don't want to track any more.  */
+   state_t m_stop;
+ 
+ private:
+   void on_zero_assignment (sm_context *sm_ctxt,
+ 			   const supernode *node,
+ 			   const gimple *stmt,
+ 			   tree lhs) const;
+ };
+ 
+ /* Class for diagnostics relating to malloc_state_machine.  */
+ 
+ class malloc_diagnostic : public pending_diagnostic
+ {
+ public:
+   malloc_diagnostic (const malloc_state_machine &sm, tree arg)
+   : m_sm (sm), m_arg (arg)
+   {}
+ 
+   bool subclass_equal_p (const pending_diagnostic &base_other) const OVERRIDE
+   {
+     return same_tree_p (m_arg, ((const malloc_diagnostic &)base_other).m_arg);
+   }
+ 
+   label_text describe_state_change (const evdesc::state_change &change)
+     OVERRIDE
+   {
+     if (change.m_old_state == m_sm.m_start
+ 	&& change.m_new_state == m_sm.m_unchecked)
+       // TODO: verify that it's the allocation stmt, not a copy
+       return label_text::borrow ("allocated here");
+     if (change.m_old_state == m_sm.m_unchecked
+ 	&& change.m_new_state == m_sm.m_nonnull)
+       return change.formatted_print ("assuming %qE is non-NULL",
+ 				     change.m_expr);
+     if (change.m_new_state == m_sm.m_null)
+       {
+ 	if (change.m_old_state == m_sm.m_unchecked)
+ 	  return change.formatted_print ("assuming %qE is NULL",
+ 					 change.m_expr);
+ 	else
+ 	  return change.formatted_print ("%qE is NULL",
+ 					 change.m_expr);
+       }
+ 
+     return label_text ();
+   }
+ 
+ protected:
+   const malloc_state_machine &m_sm;
+   tree m_arg;
+ };
+ 
+ /* Concrete subclass for reporting double-free diagnostics.  */
+ 
+ class double_free : public malloc_diagnostic
+ {
+ public:
+   double_free (const malloc_state_machine &sm, tree arg)
+   : malloc_diagnostic (sm, arg)
+   {}
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "double_free"; }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     auto_diagnostic_group d;
+     diagnostic_metadata m;
+     m.add_cwe (415); /* CWE-415: Double Free.  */
+     return warning_meta (rich_loc, m, OPT_Wanalyzer_double_free,
+ 			 "double-%<free%> of %qE", m_arg);
+   }
+ 
+   label_text describe_state_change (const evdesc::state_change &change)
+     FINAL OVERRIDE
+   {
+     if (change.m_new_state == m_sm.m_freed)
+       {
+ 	m_first_free_event = change.m_event_id;
+ 	return change.formatted_print ("first %qs here", "free");
+       }
+     return malloc_diagnostic::describe_state_change (change);
+   }
+ 
+   label_text describe_call_with_state (const evdesc::call_with_state &info)
+     FINAL OVERRIDE
+   {
+     if (info.m_state == m_sm.m_freed)
+       return info.formatted_print
+ 	("passing freed pointer %qE in call to %qE from %qE",
+ 	 info.m_expr, info.m_callee_fndecl, info.m_caller_fndecl);
+     return label_text ();
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     if (m_first_free_event.known_p ())
+       return ev.formatted_print ("second %qs here; first %qs was at %@",
+ 				 "free", "free",
+ 				 &m_first_free_event);
+     return ev.formatted_print ("second %qs here", "free");
+   }
+ 
+ private:
+   diagnostic_event_id_t m_first_free_event;
+ };
+ 
+ /* Abstract subclass for describing possible bad uses of NULL.
+    Responsible for describing the call that could return NULL.  */
+ 
+ class possible_null : public malloc_diagnostic
+ {
+ public:
+   possible_null (const malloc_state_machine &sm, tree arg)
+   : malloc_diagnostic (sm, arg)
+   {}
+ 
+   label_text describe_state_change (const evdesc::state_change &change)
+     FINAL OVERRIDE
+   {
+     if (change.m_old_state == m_sm.m_start
+ 	&& change.m_new_state == m_sm.m_unchecked)
+       {
+ 	m_origin_of_unchecked_event = change.m_event_id;
+ 	return label_text::borrow ("this call could return NULL");
+       }
+     return malloc_diagnostic::describe_state_change (change);
+   }
+ 
+   label_text describe_return_of_state (const evdesc::return_of_state &info)
+     FINAL OVERRIDE
+   {
+     if (info.m_state == m_sm.m_unchecked)
+       return info.formatted_print ("possible return of NULL to %qE from %qE",
+ 				   info.m_caller_fndecl, info.m_callee_fndecl);
+     return label_text ();
+   }
+ 
+ protected:
+   diagnostic_event_id_t m_origin_of_unchecked_event;
+ };
+ 
+ /* Concrete subclass for describing dereference of a possible NULL
+    value.  */
+ 
+ class possible_null_deref : public possible_null
+ {
+ public:
+   possible_null_deref (const malloc_state_machine &sm, tree arg)
+   : possible_null (sm, arg)
+   {}
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "possible_null_deref"; }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     /* CWE-690: Unchecked Return Value to NULL Pointer Dereference.  */
+     diagnostic_metadata m;
+     m.add_cwe (690);
+     return warning_meta (rich_loc, m,
+ 			 OPT_Wanalyzer_possible_null_dereference,
+ 			 "dereference of possibly-NULL %qE", m_arg);
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     if (m_origin_of_unchecked_event.known_p ())
+       return ev.formatted_print ("%qE could be NULL: unchecked value from %@",
+ 				 ev.m_expr,
+ 				 &m_origin_of_unchecked_event);
+     else
+       return ev.formatted_print ("%qE could be NULL", ev.m_expr);
+   }
+ 
+ };
+ 
+ /* Subroutine for use by possible_null_arg::emit and null_arg::emit.
+    Issue a note informing that the pertinent argument must be non-NULL.  */
+ 
+ static void
+ inform_nonnull_attribute (tree fndecl, int arg_idx)
+ {
+   inform (DECL_SOURCE_LOCATION (fndecl),
+ 	  "argument %u of %qD must be non-null",
+ 	  arg_idx + 1, fndecl);
+   /* Ideally we would use the location of the parm and underline the
+      attribute also - but we don't have the location_t values at this point
+      in the middle-end.
+      For reference, the C and C++ FEs have get_fndecl_argument_location.  */
+ }
+ 
+ /* Concrete subclass for describing passing a possibly-NULL value to a
+    function marked with __attribute__((nonnull)).  */
+ 
+ class possible_null_arg : public possible_null
+ {
+ public:
+   possible_null_arg (const malloc_state_machine &sm, tree arg,
+ 		     tree fndecl, int arg_idx)
+   : possible_null (sm, arg),
+     m_fndecl (fndecl), m_arg_idx (arg_idx)
+   {}
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "possible_null_arg"; }
+ 
+   bool subclass_equal_p (const pending_diagnostic &base_other) const
+   {
+     const possible_null_arg &sub_other
+       = (const possible_null_arg &)base_other;
+     return (same_tree_p (m_arg, sub_other.m_arg)
+ 	    && m_fndecl == sub_other.m_fndecl
+ 	    && m_arg_idx == sub_other.m_arg_idx);
+   }
+ 
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     /* CWE-690: Unchecked Return Value to NULL Pointer Dereference.  */
+     auto_diagnostic_group d;
+     diagnostic_metadata m;
+     m.add_cwe (690);
+     bool warned
+       = warning_meta (rich_loc, m, OPT_Wanalyzer_possible_null_argument,
+ 		      "use of possibly-NULL %qE where non-null expected",
+ 		      m_arg);
+     if (warned)
+       inform_nonnull_attribute (m_fndecl, m_arg_idx);
+     return warned;
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     if (m_origin_of_unchecked_event.known_p ())
+       return ev.formatted_print ("argument %u (%qE) from %@ could be NULL"
+ 				 " where non-null expected",
+ 				 m_arg_idx + 1, ev.m_expr,
+ 				 &m_origin_of_unchecked_event);
+     else
+       return ev.formatted_print ("argument %u (%qE) could be NULL"
+ 				 " where non-null expected",
+ 				 m_arg_idx + 1, ev.m_expr);
+   }
+ 
+ private:
+   tree m_fndecl;
+   int m_arg_idx;
+ };
+ 
+ /* Concrete subclass for describing a dereference of a NULL value.  */
+ 
+ class null_deref : public malloc_diagnostic
+ {
+ public:
+   null_deref (const malloc_state_machine &sm, tree arg)
+   : malloc_diagnostic (sm, arg) {}
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "null_deref"; }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     /* CWE-690: Unchecked Return Value to NULL Pointer Dereference.  */
+     diagnostic_metadata m;
+     m.add_cwe (690);
+     return warning_meta (rich_loc, m,
+ 			 OPT_Wanalyzer_null_dereference,
+ 			 "dereference of NULL %qE", m_arg);
+   }
+ 
+   label_text describe_return_of_state (const evdesc::return_of_state &info)
+     FINAL OVERRIDE
+   {
+     if (info.m_state == m_sm.m_null)
+       return info.formatted_print ("return of NULL to %qE from %qE",
+ 				   info.m_caller_fndecl, info.m_callee_fndecl);
+     return label_text ();
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     return ev.formatted_print ("dereference of NULL %qE", ev.m_expr);
+   }
+ };
+ 
+ /* Concrete subclass for describing passing a NULL value to a
+    function marked with __attribute__((nonnull)).  */
+ 
+ class null_arg : public malloc_diagnostic
+ {
+ public:
+   null_arg (const malloc_state_machine &sm, tree arg,
+ 	    tree fndecl, int arg_idx)
+   : malloc_diagnostic (sm, arg),
+     m_fndecl (fndecl), m_arg_idx (arg_idx)
+   {}
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "null_arg"; }
+ 
+   bool subclass_equal_p (const pending_diagnostic &base_other) const
+   {
+     const null_arg &sub_other
+       = (const null_arg &)base_other;
+     return (same_tree_p (m_arg, sub_other.m_arg)
+ 	    && m_fndecl == sub_other.m_fndecl
+ 	    && m_arg_idx == sub_other.m_arg_idx);
+   }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     /* CWE-690: Unchecked Return Value to NULL Pointer Dereference.  */
+     auto_diagnostic_group d;
+     diagnostic_metadata m;
+     m.add_cwe (690);
+     bool warned = warning_meta (rich_loc, m, OPT_Wanalyzer_null_argument,
+ 				"use of NULL %qE where non-null expected",
+ 				m_arg);
+     if (warned)
+       inform_nonnull_attribute (m_fndecl, m_arg_idx);
+     return warned;
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     return ev.formatted_print ("argument %u (%qE) NULL"
+ 			       " where non-null expected",
+ 			       m_arg_idx + 1, ev.m_expr);
+   }
+ 
+ private:
+   tree m_fndecl;
+   int m_arg_idx;
+ };
+ 
+ class use_after_free : public malloc_diagnostic
+ {
+ public:
+   use_after_free (const malloc_state_machine &sm, tree arg)
+   : malloc_diagnostic (sm, arg)
+   {}
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "use_after_free"; }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     /* CWE-416: Use After Free.  */
+     diagnostic_metadata m;
+     m.add_cwe (416);
+     return warning_meta (rich_loc, m, OPT_Wanalyzer_use_after_free,
+ 			 "use after %<free%> of %qE", m_arg);
+   }
+ 
+   label_text describe_state_change (const evdesc::state_change &change)
+     FINAL OVERRIDE
+   {
+     if (change.m_new_state == m_sm.m_freed)
+       {
+ 	m_free_event = change.m_event_id;
+ 	return label_text::borrow ("freed here");
+       }
+     return malloc_diagnostic::describe_state_change (change);
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     if (m_free_event.known_p ())
+       return ev.formatted_print ("use after %<free%> of %qE; freed at %@",
+ 				 ev.m_expr, &m_free_event);
+     else
+       return ev.formatted_print ("use after %<free%> of %qE", ev.m_expr);
+   }
+ 
+ private:
+   diagnostic_event_id_t m_free_event;
+ };
+ 
+ class malloc_leak : public malloc_diagnostic
+ {
+ public:
+   malloc_leak (const malloc_state_machine &sm, tree arg)
+   : malloc_diagnostic (sm, arg) {}
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "malloc_leak"; }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     diagnostic_metadata m;
+     m.add_cwe (401);
+     return warning_meta (rich_loc, m, OPT_Wanalyzer_malloc_leak,
+ 			 "leak of %qE", m_arg);
+   }
+ 
+   label_text describe_state_change (const evdesc::state_change &change)
+     FINAL OVERRIDE
+   {
+     if (change.m_new_state == m_sm.m_unchecked)
+       {
+ 	m_malloc_event = change.m_event_id;
+ 	return label_text::borrow ("allocated here");
+       }
+     return malloc_diagnostic::describe_state_change (change);
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     if (m_malloc_event.known_p ())
+       return ev.formatted_print ("%qE leaks here; was allocated at %@",
+ 				 ev.m_expr, &m_malloc_event);
+     else
+       return ev.formatted_print ("%qE leaks here", ev.m_expr);
+   }
+ 
+ private:
+   diagnostic_event_id_t m_malloc_event;
+ };
+ 
+ class free_of_non_heap : public malloc_diagnostic
+ {
+ public:
+   free_of_non_heap (const malloc_state_machine &sm, tree arg)
+   : malloc_diagnostic (sm, arg), m_kind (KIND_UNKNOWN)
+   {
+   }
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "free_of_non_heap"; }
+ 
+   bool subclass_equal_p (const pending_diagnostic &base_other) const
+     FINAL OVERRIDE
+   {
+     const free_of_non_heap &other = (const free_of_non_heap &)base_other;
+     return (same_tree_p (m_arg, other.m_arg) && m_kind == other.m_kind);
+   }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     auto_diagnostic_group d;
+     diagnostic_metadata m;
+     m.add_cwe (590); /* CWE-590: Free of Memory not on the Heap.  */
+     switch (m_kind)
+       {
+       default:
+ 	gcc_unreachable ();
+       case KIND_UNKNOWN:
+ 	return warning_meta (rich_loc, m, OPT_Wanalyzer_free_of_non_heap,
+ 			     "%<free%> of %qE which points to memory"
+ 			     " not on the heap",
+ 			     m_arg);
+ 	break;
+       case KIND_ALLOCA:
+ 	return warning_meta (rich_loc, m, OPT_Wanalyzer_free_of_non_heap,
+ 			     "%<free%> of memory allocated on the stack by"
+ 			     " %qs (%qE) will corrupt the heap",
+ 			     "alloca", m_arg);
+ 	break;
+       }
+   }
+ 
+   label_text describe_state_change (const evdesc::state_change &change)
+     FINAL OVERRIDE
+   {
+     /* Attempt to reconstruct what kind of pointer it is.
+        (It seems neater for this to be a part of the state, though).  */
+     if (TREE_CODE (change.m_expr) == SSA_NAME)
+       {
+ 	gimple *def_stmt = SSA_NAME_DEF_STMT (change.m_expr);
+ 	if (gcall *call = dyn_cast <gcall *> (def_stmt))
+ 	  {
+ 	    if (is_special_named_call_p (call, "alloca", 1)
+ 		|| is_special_named_call_p (call, "__builtin_alloca", 1))
+ 	      {
+ 		m_kind = KIND_ALLOCA;
+ 		return label_text::borrow
+ 		  ("memory is allocated on the stack here");
+ 	      }
+ 	  }
+       }
+     return label_text::borrow ("pointer is from here");
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     return ev.formatted_print ("call to %qs here", "free");
+   }
+ 
+ private:
+   enum kind
+   {
+     KIND_UNKNOWN,
+     KIND_ALLOCA
+   };
+   enum kind m_kind;
+ };
+ 
+ /* malloc_state_machine's ctor.  */
+ 
+ malloc_state_machine::malloc_state_machine (logger *logger)
+ : state_machine ("malloc", logger)
+ {
+   m_start = add_state ("start");
+   m_unchecked = add_state ("unchecked");
+   m_null = add_state ("null");
+   m_nonnull = add_state ("nonnull");
+   m_freed = add_state ("freed");
+   m_non_heap = add_state ("non-heap");
+   m_stop = add_state ("stop");
+ }
+ 
+ /* Implementation of state_machine::on_stmt vfunc for malloc_state_machine.  */
+ 
+ bool
+ malloc_state_machine::on_stmt (sm_context *sm_ctxt,
+ 			       const supernode *node,
+ 			       const gimple *stmt) const
+ {
+   if (const gcall *call = dyn_cast <const gcall *> (stmt))
+     if (tree callee_fndecl = sm_ctxt->get_fndecl_for_call (call))
+       {
+ 	if (is_named_call_p (callee_fndecl, "malloc", call, 1)
+ 	    || is_named_call_p (callee_fndecl, "calloc", call, 2)
+ 	    || is_std_named_call_p (callee_fndecl, "malloc", call, 1)
+ 	    || is_std_named_call_p (callee_fndecl, "calloc", call, 2)
+ 	    || is_named_call_p (callee_fndecl, "__builtin_malloc", call, 1)
+ 	    || is_named_call_p (callee_fndecl, "__builtin_calloc", call, 2))
+ 	  {
+ 	    tree lhs = gimple_call_lhs (call);
+ 	    if (lhs)
+ 	      {
+ 		lhs = sm_ctxt->get_readable_tree (lhs);
+ 		sm_ctxt->on_transition (node, stmt, lhs, m_start, m_unchecked);
+ 	      }
+ 	    else
+ 	      {
+ 		/* TODO: report leak.  */
+ 	      }
+ 	    return true;
+ 	  }
+ 
+ 	if (is_named_call_p (callee_fndecl, "alloca", call, 1)
+ 	    || is_named_call_p (callee_fndecl, "__builtin_alloca", call, 1))
+ 	  {
+ 	    tree lhs = gimple_call_lhs (call);
+ 	    if (lhs)
+ 	      {
+ 		lhs = sm_ctxt->get_readable_tree (lhs);
+ 		sm_ctxt->on_transition (node, stmt, lhs, m_start, m_non_heap);
+ 	      }
+ 	    return true;
+ 	  }
+ 
+ 	if (is_named_call_p (callee_fndecl, "free", call, 1)
+ 	    || is_std_named_call_p (callee_fndecl, "free", call, 1)
+ 	    || is_named_call_p (callee_fndecl, "__builtin_free", call, 1))
+ 	  {
+ 	    tree arg = gimple_call_arg (call, 0);
+ 
+ 	    arg = sm_ctxt->get_readable_tree (arg);
+ 
+ 	    /* start/unchecked/nonnull -> freed.  */
+ 	    sm_ctxt->on_transition (node, stmt, arg, m_start, m_freed);
+ 	    sm_ctxt->on_transition (node, stmt, arg, m_unchecked, m_freed);
+ 	    sm_ctxt->on_transition (node, stmt, arg, m_nonnull, m_freed);
+ 
+ 	    /* Keep state "null" as-is, rather than transitioning to "free";
+ 	       we don't want to complain about double-free of NULL.  */
+ 
+ 	    /* freed -> stop, with warning.  */
+ 	    sm_ctxt->warn_for_state (node, stmt, arg, m_freed,
+ 				     new double_free (*this, arg));
+ 	    sm_ctxt->on_transition (node, stmt, arg, m_freed, m_stop);
+ 
+ 	    /* non-heap -> stop, with warning.  */
+ 	    sm_ctxt->warn_for_state (node, stmt, arg, m_non_heap,
+ 				     new free_of_non_heap (*this, arg));
+ 	    sm_ctxt->on_transition (node, stmt, arg, m_non_heap, m_stop);
+ 	    return true;
+ 	  }
+ 
+ 	/* Handle "__attribute__((nonnull))".   */
+ 	{
+ 	  tree fntype = TREE_TYPE (callee_fndecl);
+ 	  bitmap nonnull_args = get_nonnull_args (fntype);
+ 	  if (nonnull_args)
+ 	    {
+ 	      for (unsigned i = 0; i < gimple_call_num_args (stmt); i++)
+ 		{
+ 		  tree arg = gimple_call_arg (stmt, i);
+ 		  if (TREE_CODE (TREE_TYPE (arg)) != POINTER_TYPE)
+ 		    continue;
+ 		  /* If we have a nonnull-args, and either all pointers, or just
+ 		     the specified pointers.  */
+ 		  if (bitmap_empty_p (nonnull_args)
+ 		      || bitmap_bit_p (nonnull_args, i))
+ 		    {
+ 		      sm_ctxt->warn_for_state
+ 			(node, stmt, arg, m_unchecked,
+ 			 new possible_null_arg (*this, arg, callee_fndecl, i));
+ 		      sm_ctxt->on_transition (node, stmt, arg, m_unchecked,
+ 					      m_nonnull);
+ 
+ 		      sm_ctxt->warn_for_state
+ 			(node, stmt, arg, m_null,
+ 			 new null_arg (*this, arg, callee_fndecl, i));
+ 		      sm_ctxt->on_transition (node, stmt, arg, m_null, m_stop);
+ 		    }
+ 		}
+ 	      BITMAP_FREE (nonnull_args);
+ 	    }
+ 	}
+       }
+ 
+   if (tree lhs = is_zero_assignment (stmt))
+     if (any_pointer_p (lhs))
+       on_zero_assignment (sm_ctxt, node, stmt,lhs);
+ 
+   if (const gassign *assign_stmt = dyn_cast <const gassign *> (stmt))
+     {
+       enum tree_code op = gimple_assign_rhs_code (assign_stmt);
+       if (op == ADDR_EXPR)
+ 	{
+ 	  tree lhs = gimple_assign_lhs (assign_stmt);
+ 	  if (lhs)
+ 	    {
+ 	      lhs = sm_ctxt->get_readable_tree (lhs);
+ 	      sm_ctxt->on_transition (node, stmt, lhs, m_start, m_non_heap);
+ 	    }
+ 	}
+     }
+ 
+   /* Handle dereferences.  */
+   for (unsigned i = 0; i < gimple_num_ops (stmt); i++)
+     {
+       tree op = gimple_op (stmt, i);
+       if (!op)
+ 	continue;
+       if (TREE_CODE (op) == COMPONENT_REF)
+ 	op = TREE_OPERAND (op, 0);
+ 
+       if (TREE_CODE (op) == MEM_REF)
+ 	{
+ 	  tree arg = TREE_OPERAND (op, 0);
+ 	  arg = sm_ctxt->get_readable_tree (arg);
+ 
+ 	  sm_ctxt->warn_for_state (node, stmt, arg, m_unchecked,
+ 				   new possible_null_deref (*this, arg));
+ 	  sm_ctxt->on_transition (node, stmt, arg, m_unchecked, m_nonnull);
+ 
+ 	  sm_ctxt->warn_for_state (node, stmt, arg, m_null,
+ 				   new null_deref (*this, arg));
+ 	  sm_ctxt->on_transition (node, stmt, arg, m_null, m_stop);
+ 
+ 	  sm_ctxt->warn_for_state (node, stmt, arg, m_freed,
+ 				   new use_after_free (*this, arg));
+ 	  sm_ctxt->on_transition (node, stmt, arg, m_freed, m_stop);
+ 	}
+     }
+   return false;
+ }
+ 
+ /* Implementation of state_machine::on_phi vfunc for malloc_state_machine.  */
+ 
+ void
+ malloc_state_machine::on_phi (sm_context *sm_ctxt,
+ 			      const supernode *node,
+ 			      const gphi *phi,
+ 			      tree rhs) const
+ {
+   if (zerop (rhs))
+     {
+       tree lhs = gimple_phi_result (phi);
+       on_zero_assignment (sm_ctxt, node, phi, lhs);
+     }
+ }
+ 
+ /* Implementation of state_machine::on_condition vfunc for malloc_state_machine.
+    Potentially transition state 'unchecked' to 'nonnull' or to 'null'.  */
+ 
+ void
+ malloc_state_machine::on_condition (sm_context *sm_ctxt,
+ 				    const supernode *node,
+ 				    const gimple *stmt,
+ 				    tree lhs,
+ 				    enum tree_code op,
+ 				    tree rhs) const
+ {
+   if (!zerop (rhs))
+     return;
+ 
+   if (!any_pointer_p (lhs))
+     return;
+   if (!any_pointer_p (rhs))
+     return;
+ 
+   if (op == NE_EXPR)
+     {
+       log ("got 'ARG != 0' match");
+       sm_ctxt->on_transition (node, stmt,
+ 			      lhs, m_unchecked, m_nonnull);
+     }
+   else if (op == EQ_EXPR)
+     {
+       log ("got 'ARG == 0' match");
+       sm_ctxt->on_transition (node, stmt,
+ 			      lhs, m_unchecked, m_null);
+     }
+ }
+ 
+ /* Implementation of state_machine::can_purge_p vfunc for malloc_state_machine.
+    Don't allow purging of pointers in state 'unchecked' or 'nonnull'
+    (to avoid false leak reports).  */
+ 
+ bool
+ malloc_state_machine::can_purge_p (state_t s) const
+ {
+   return s != m_unchecked && s != m_nonnull;
+ }
+ 
+ /* Implementation of state_machine::on_leak vfunc for malloc_state_machine
+    (for complaining about leaks of pointers in state 'unchecked' and
+    'nonnull').  */
+ 
+ pending_diagnostic *
+ malloc_state_machine::on_leak (tree var) const
+ {
+   return new malloc_leak (*this, var);
+ }
+ 
+ /* Shared logic for handling GIMPLE_ASSIGNs and GIMPLE_PHIs that
+    assign zero to LHS.  */
+ 
+ void
+ malloc_state_machine::on_zero_assignment (sm_context *sm_ctxt,
+ 					  const supernode *node,
+ 					  const gimple *stmt,
+ 					  tree lhs) const
+ {
+   sm_ctxt->on_transition (node, stmt, lhs, m_start, m_null);
+   sm_ctxt->on_transition (node, stmt, lhs, m_unchecked, m_null);
+   sm_ctxt->on_transition (node, stmt, lhs, m_nonnull, m_null);
+   sm_ctxt->on_transition (node, stmt, lhs, m_freed, m_null);
+ }
+ 
+ } // anonymous namespace
+ 
+ /* Internal interface to this file. */
+ 
+ state_machine *
+ make_malloc_state_machine (logger *logger)
+ {
+   return new malloc_state_machine (logger);
+ }
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/sm-malloc.dot gcc-10.1.0/gcc/analyzer/sm-malloc.dot
*** gcc-9.3.0/gcc/analyzer/sm-malloc.dot	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/sm-malloc.dot	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,89 ----
+ /* An overview of the state machine from sm-malloc.cc.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ /* Keep this in-sync with sm-malloc.cc  */
+ 
+ digraph "malloc" {
+ 
+   /* STATES. */
+ 
+   /* Start state.  */
+   start;
+ 
+   /* State for a pointer returned from malloc that hasn't been checked for
+      NULL.
+      It could be a pointer to heap-allocated memory, or could be NULL.  */
+   unchecked;
+ 
+   /* State for a pointer that's known to be NULL.  */
+   null;
+ 
+   /* State for a pointer to heap-allocated memory, known to be non-NULL.  */
+   nonnull;
+ 
+   /* State for a pointer to freed memory.  */
+   freed;
+ 
+   /* State for a pointer that's known to not be on the heap (e.g. to a local
+      or global).  */
+   non_heap;
+ 
+   /* Stop state, for pointers we don't want to track any more.  */
+   stop;
+ 
+   /* TRANSITIONS. */
+ 
+   start -> unchecked [label="on 'X=malloc(...);'"];
+   start -> unchecked [label="on 'X=calloc(...);'"];
+ 
+   start -> non_heap [label="on 'X=alloca(...);'"];
+   start -> non_heap [label="on 'X=__builtin_alloca(...);'"];
+ 
+   /* On "free".  */
+   start -> freed [label="on 'free(X);'"];
+   unchecked -> freed [label="on 'free(X);'"];
+   nonnull -> freed [label="on 'free(X);'"];
+   freed -> stop [label="on 'free(X);':\n Warn('double-free')"];
+   non_heap -> stop  [label="on 'free(X);':\n Warn('free of non-heap')"];
+ 
+   /* Handle "__attribute__((nonnull))".   */
+   unchecked -> nonnull [label="on 'FN(X)' with __attribute__((nonnull)):\nWarn('possible NULL arg')"];
+   null -> stop [label="on 'FN(X)' with __attribute__((nonnull)):\nWarn('NULL arg')"];
+ 
+   /* is_zero_assignment.  */
+   start -> null [label="on 'X = 0;'"];
+   unchecked -> null [label="on 'X = 0;'"];
+   nonnull -> null [label="on 'X = 0;'"];
+   freed -> null [label="on 'X = 0;'"];
+ 
+   start -> non_heap [label="on 'X = &EXPR;'"];
+ 
+   /* Handle dereferences.  */
+   unchecked -> nonnull [label="on '*X':\nWarn('possible NULL deref')"];
+   null -> stop [label="on '*X':\nWarn('NULL deref')"];
+   freed -> stop [label="on '*X':\nWarn('use after free')"];
+ 
+   /* on_condition.  */
+   unchecked -> nonnull [label="on 'X != 0'"];
+   unchecked -> null [label="on 'X == 0'"];
+ 
+   unchecked -> stop [label="on leak:\nWarn('leak')"];
+   nonnull -> stop [label="on leak:\nWarn('leak')"];
+ }
diff -Nrcpad gcc-9.3.0/gcc/analyzer/sm-pattern-test.cc gcc-10.1.0/gcc/analyzer/sm-pattern-test.cc
*** gcc-9.3.0/gcc/analyzer/sm-pattern-test.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/sm-pattern-test.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,156 ----
+ /* A state machine for use in DejaGnu tests, to check that
+    pattern-matching works as expected.
+ 
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "tree-pretty-print.h"
+ #include "diagnostic-path.h"
+ #include "diagnostic-metadata.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "diagnostic-event-id.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/sm.h"
+ #include "analyzer/pending-diagnostic.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ namespace {
+ 
+ /* A state machine for use in DejaGnu tests, to check that
+    pattern-matching works as expected.  */
+ 
+ class pattern_test_state_machine : public state_machine
+ {
+ public:
+   pattern_test_state_machine (logger *logger);
+ 
+   bool inherited_state_p () const FINAL OVERRIDE { return false; }
+ 
+   bool on_stmt (sm_context *sm_ctxt,
+ 		const supernode *node,
+ 		const gimple *stmt) const FINAL OVERRIDE;
+ 
+   void on_condition (sm_context *sm_ctxt,
+ 		     const supernode *node,
+ 		     const gimple *stmt,
+ 		     tree lhs,
+ 		     enum tree_code op,
+ 		     tree rhs) const FINAL OVERRIDE;
+ 
+   bool can_purge_p (state_t s) const FINAL OVERRIDE;
+ 
+ private:
+   state_t m_start;
+ };
+ 
+ class pattern_match : public pending_diagnostic_subclass<pattern_match>
+ {
+ public:
+   pattern_match (tree lhs, enum tree_code op, tree rhs)
+   : m_lhs (lhs), m_op (op), m_rhs (rhs) {}
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "pattern_match"; }
+ 
+   bool operator== (const pattern_match &other) const
+   {
+     return (same_tree_p (m_lhs, other.m_lhs)
+ 	    && m_op == other.m_op
+ 	    && same_tree_p (m_rhs, other.m_rhs));
+   }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     return warning_at (rich_loc, 0, "pattern match on %<%E %s %E%>",
+ 		       m_lhs, op_symbol_code (m_op), m_rhs);
+   }
+ 
+ private:
+   tree m_lhs;
+   enum tree_code m_op;
+   tree m_rhs;
+ };
+ 
+ pattern_test_state_machine::pattern_test_state_machine (logger *logger)
+ : state_machine ("pattern-test", logger)
+ {
+   m_start = add_state ("start");
+ }
+ 
+ bool
+ pattern_test_state_machine::on_stmt (sm_context *sm_ctxt ATTRIBUTE_UNUSED,
+ 				     const supernode *node ATTRIBUTE_UNUSED,
+ 				     const gimple *stmt ATTRIBUTE_UNUSED) const
+ {
+   return false;
+ }
+ 
+ /* Implementation of state_machine::on_condition vfunc for
+    pattern_test_state_machine.
+ 
+    Queue a pattern_match diagnostic for any comparison against a
+    constant.  */
+ 
+ void
+ pattern_test_state_machine::on_condition (sm_context *sm_ctxt,
+ 					  const supernode *node,
+ 					  const gimple *stmt,
+ 					  tree lhs,
+ 					  enum tree_code op,
+ 					  tree rhs) const
+ {
+   if (stmt == NULL)
+     return;
+ 
+   if (!CONSTANT_CLASS_P (rhs))
+     return;
+ 
+   pending_diagnostic *diag = new pattern_match (lhs, op, rhs);
+   sm_ctxt->warn_for_state (node, stmt, lhs, m_start, diag);
+ }
+ 
+ bool
+ pattern_test_state_machine::can_purge_p (state_t s ATTRIBUTE_UNUSED) const
+ {
+   return true;
+ }
+ 
+ } // anonymous namespace
+ 
+ /* Internal interface to this file. */
+ 
+ state_machine *
+ make_pattern_test_state_machine (logger *logger)
+ {
+   return new pattern_test_state_machine (logger);
+ }
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/sm-sensitive.cc gcc-10.1.0/gcc/analyzer/sm-sensitive.cc
*** gcc-9.3.0/gcc/analyzer/sm-sensitive.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/sm-sensitive.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,253 ----
+ /* An experimental state machine, for tracking exposure of sensitive
+    data (e.g. through logging).
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "function.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "options.h"
+ #include "diagnostic-path.h"
+ #include "diagnostic-metadata.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "diagnostic-event-id.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/sm.h"
+ #include "analyzer/pending-diagnostic.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ namespace {
+ 
+ /* An experimental state machine, for tracking exposure of sensitive
+    data (e.g. through logging).  */
+ 
+ class sensitive_state_machine : public state_machine
+ {
+ public:
+   sensitive_state_machine (logger *logger);
+ 
+   bool inherited_state_p () const FINAL OVERRIDE { return true; }
+ 
+   bool on_stmt (sm_context *sm_ctxt,
+ 		const supernode *node,
+ 		const gimple *stmt) const FINAL OVERRIDE;
+ 
+   void on_condition (sm_context *sm_ctxt,
+ 		     const supernode *node,
+ 		     const gimple *stmt,
+ 		     tree lhs,
+ 		     enum tree_code op,
+ 		     tree rhs) const FINAL OVERRIDE;
+ 
+   bool can_purge_p (state_t s) const FINAL OVERRIDE;
+ 
+   /* Start state.  */
+   state_t m_start;
+ 
+   /* State for "sensitive" data, such as a password.  */
+   state_t m_sensitive;
+ 
+   /* Stop state, for a value we don't want to track any more.  */
+   state_t m_stop;
+ 
+ private:
+   void warn_for_any_exposure (sm_context *sm_ctxt,
+ 			      const supernode *node,
+ 			      const gimple *stmt,
+ 			      tree arg) const;
+ };
+ 
+ class exposure_through_output_file
+   : public pending_diagnostic_subclass<exposure_through_output_file>
+ {
+ public:
+   exposure_through_output_file (const sensitive_state_machine &sm, tree arg)
+   : m_sm (sm), m_arg (arg)
+   {}
+ 
+   const char *get_kind () const FINAL OVERRIDE
+   {
+     return "exposure_through_output_file";
+   }
+ 
+   bool operator== (const exposure_through_output_file &other) const
+   {
+     return same_tree_p (m_arg, other.m_arg);
+   }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     diagnostic_metadata m;
+     /* CWE-532: Information Exposure Through Log Files */
+     m.add_cwe (532);
+     return warning_meta (rich_loc, m,
+ 			 OPT_Wanalyzer_exposure_through_output_file,
+ 			 "sensitive value %qE written to output file",
+ 			 m_arg);
+   }
+ 
+   label_text describe_state_change (const evdesc::state_change &change)
+     FINAL OVERRIDE
+   {
+     if (change.m_new_state == m_sm.m_sensitive)
+       {
+ 	m_first_sensitive_event = change.m_event_id;
+ 	return change.formatted_print ("sensitive value acquired here");
+       }
+     return label_text ();
+   }
+ 
+   label_text describe_call_with_state (const evdesc::call_with_state &info)
+     FINAL OVERRIDE
+   {
+     if (info.m_state == m_sm.m_sensitive)
+       return info.formatted_print
+ 	("passing sensitive value %qE in call to %qE from %qE",
+ 	 info.m_expr, info.m_callee_fndecl, info.m_caller_fndecl);
+     return label_text ();
+   }
+ 
+   label_text describe_return_of_state (const evdesc::return_of_state &info)
+     FINAL OVERRIDE
+   {
+     if (info.m_state == m_sm.m_sensitive)
+       return info.formatted_print ("returning sensitive value to %qE from %qE",
+ 				   info.m_caller_fndecl, info.m_callee_fndecl);
+     return label_text ();
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     if (m_first_sensitive_event.known_p ())
+       return ev.formatted_print ("sensitive value %qE written to output file"
+ 				 "; acquired at %@",
+ 				 m_arg, &m_first_sensitive_event);
+     else
+       return ev.formatted_print ("sensitive value %qE written to output file",
+ 				 m_arg);
+   }
+ 
+ private:
+   const sensitive_state_machine &m_sm;
+   tree m_arg;
+   diagnostic_event_id_t m_first_sensitive_event;
+ };
+ 
+ /* sensitive_state_machine's ctor.  */
+ 
+ sensitive_state_machine::sensitive_state_machine (logger *logger)
+ : state_machine ("sensitive", logger)
+ {
+   m_start = add_state ("start");
+   m_sensitive = add_state ("sensitive");
+   m_stop = add_state ("stop");
+ }
+ 
+ /* Warn about an exposure at NODE and STMT if ARG is in the "sensitive"
+    state.  */
+ 
+ void
+ sensitive_state_machine::warn_for_any_exposure (sm_context *sm_ctxt,
+ 						const supernode *node,
+ 						const gimple *stmt,
+ 						tree arg) const
+ {
+   sm_ctxt->warn_for_state (node, stmt, arg, m_sensitive,
+ 			   new exposure_through_output_file (*this, arg));
+ }
+ 
+ /* Implementation of state_machine::on_stmt vfunc for
+    sensitive_state_machine.  */
+ 
+ bool
+ sensitive_state_machine::on_stmt (sm_context *sm_ctxt,
+ 				  const supernode *node,
+ 				  const gimple *stmt) const
+ {
+   if (const gcall *call = dyn_cast <const gcall *> (stmt))
+     if (tree callee_fndecl = sm_ctxt->get_fndecl_for_call (call))
+       {
+ 	if (is_named_call_p (callee_fndecl, "getpass", call, 1))
+ 	  {
+ 	    tree lhs = gimple_call_lhs (call);
+ 	    if (lhs)
+ 	      sm_ctxt->on_transition (node, stmt, lhs, m_start, m_sensitive);
+ 	    return true;
+ 	  }
+ 	else if (is_named_call_p (callee_fndecl, "fprintf")
+ 		 || is_named_call_p (callee_fndecl, "printf"))
+ 	  {
+ 	    /* Handle a match at any position in varargs.  */
+ 	    for (unsigned idx = 1; idx < gimple_call_num_args (call); idx++)
+ 	      {
+ 		tree arg = gimple_call_arg (call, idx);
+ 		warn_for_any_exposure (sm_ctxt, node, stmt, arg);
+ 	      }
+ 	    return true;
+ 	  }
+ 	else if (is_named_call_p (callee_fndecl, "fwrite", call, 4))
+ 	  {
+ 	    tree arg = gimple_call_arg (call, 0);
+ 	    warn_for_any_exposure (sm_ctxt, node, stmt, arg);
+ 	    return true;
+ 	  }
+ 	// TODO: ...etc.  This is just a proof-of-concept at this point.
+       }
+   return false;
+ }
+ 
+ void
+ sensitive_state_machine::on_condition (sm_context *sm_ctxt ATTRIBUTE_UNUSED,
+ 				       const supernode *node ATTRIBUTE_UNUSED,
+ 				       const gimple *stmt ATTRIBUTE_UNUSED,
+ 				       tree lhs ATTRIBUTE_UNUSED,
+ 				       enum tree_code op ATTRIBUTE_UNUSED,
+ 				       tree rhs ATTRIBUTE_UNUSED) const
+ {
+   /* Empty.  */
+ }
+ 
+ bool
+ sensitive_state_machine::can_purge_p (state_t s ATTRIBUTE_UNUSED) const
+ {
+   return true;
+ }
+ 
+ } // anonymous namespace
+ 
+ /* Internal interface to this file. */
+ 
+ state_machine *
+ make_sensitive_state_machine (logger *logger)
+ {
+   return new sensitive_state_machine (logger);
+ }
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/sm-signal.cc gcc-10.1.0/gcc/analyzer/sm-signal.cc
*** gcc-9.3.0/gcc/analyzer/sm-signal.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/sm-signal.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,376 ----
+ /* An experimental state machine, for tracking bad calls from within
+    signal handlers.
+ 
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "options.h"
+ #include "bitmap.h"
+ #include "diagnostic-path.h"
+ #include "diagnostic-metadata.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "diagnostic-event-id.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/sm.h"
+ #include "analyzer/pending-diagnostic.h"
+ #include "sbitmap.h"
+ #include "tristate.h"
+ #include "ordered-hash-map.h"
+ #include "selftest.h"
+ #include "analyzer/region-model.h"
+ #include "analyzer/program-state.h"
+ #include "analyzer/checker-path.h"
+ #include "digraph.h"
+ #include "cfg.h"
+ #include "gimple-iterator.h"
+ #include "cgraph.h"
+ #include "analyzer/supergraph.h"
+ #include "analyzer/call-string.h"
+ #include "analyzer/program-point.h"
+ #include "alloc-pool.h"
+ #include "fibonacci_heap.h"
+ #include "analyzer/diagnostic-manager.h"
+ #include "shortest-paths.h"
+ #include "analyzer/exploded-graph.h"
+ #include "analyzer/function-set.h"
+ #include "analyzer/analyzer-selftests.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ namespace {
+ 
+ /* An experimental state machine, for tracking calls to async-signal-unsafe
+    functions from within signal handlers.  */
+ 
+ class signal_state_machine : public state_machine
+ {
+ public:
+   signal_state_machine (logger *logger);
+ 
+   bool inherited_state_p () const FINAL OVERRIDE { return false; }
+ 
+   bool on_stmt (sm_context *sm_ctxt,
+ 		const supernode *node,
+ 		const gimple *stmt) const FINAL OVERRIDE;
+ 
+   void on_condition (sm_context *sm_ctxt,
+ 		     const supernode *node,
+ 		     const gimple *stmt,
+ 		     tree lhs,
+ 		     enum tree_code op,
+ 		     tree rhs) const FINAL OVERRIDE;
+ 
+   bool can_purge_p (state_t s) const FINAL OVERRIDE;
+ 
+   /* These states are "global", rather than per-expression.  */
+ 
+   /* Start state.  */
+   state_t m_start;
+ 
+   /* State for when we're in a signal handler.  */
+   state_t m_in_signal_handler;
+ 
+   /* Stop state.  */
+   state_t m_stop;
+ };
+ 
+ /* Concrete subclass for describing call to an async-signal-unsafe function
+    from a signal handler.  */
+ 
+ class signal_unsafe_call
+   : public pending_diagnostic_subclass<signal_unsafe_call>
+ {
+ public:
+   signal_unsafe_call (const signal_state_machine &sm, const gcall *unsafe_call,
+ 		      tree unsafe_fndecl)
+   : m_sm (sm), m_unsafe_call (unsafe_call), m_unsafe_fndecl (unsafe_fndecl)
+   {
+     gcc_assert (m_unsafe_fndecl);
+   }
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "signal_unsafe_call"; }
+ 
+   bool operator== (const signal_unsafe_call &other) const
+   {
+     return m_unsafe_call == other.m_unsafe_call;
+   }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     diagnostic_metadata m;
+     /* CWE-479: Signal Handler Use of a Non-reentrant Function.  */
+     m.add_cwe (479);
+     return warning_meta (rich_loc, m,
+ 			 OPT_Wanalyzer_unsafe_call_within_signal_handler,
+ 			 "call to %qD from within signal handler",
+ 			 m_unsafe_fndecl);
+   }
+ 
+   label_text describe_state_change (const evdesc::state_change &change)
+     FINAL OVERRIDE
+   {
+     if (change.is_global_p ()
+ 	&& change.m_new_state == m_sm.m_in_signal_handler)
+       {
+ 	function *handler
+ 	  = change.m_event.m_dst_state.m_region_model->get_current_function ();
+ 	return change.formatted_print ("registering %qD as signal handler",
+ 				       handler->decl);
+       }
+     return label_text ();
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     return ev.formatted_print ("call to %qD from within signal handler",
+ 			       m_unsafe_fndecl);
+   }
+ 
+ private:
+   const signal_state_machine &m_sm;
+   const gcall *m_unsafe_call;
+   tree m_unsafe_fndecl;
+ };
+ 
+ /* signal_state_machine's ctor.  */
+ 
+ signal_state_machine::signal_state_machine (logger *logger)
+ : state_machine ("signal", logger)
+ {
+   m_start = add_state ("start");
+   m_in_signal_handler = add_state ("in_signal_handler");
+   m_stop = add_state ("stop");
+ }
+ 
+ /* Update MODEL for edges that simulate HANDLER_FUN being called as
+    an signal-handler in response to a signal.  */
+ 
+ static void
+ update_model_for_signal_handler (region_model *model,
+ 				 function *handler_fun)
+ {
+   /* Purge all state within MODEL.  */
+   *model = region_model ();
+   model->push_frame (handler_fun, NULL, NULL);
+ }
+ 
+ /* Custom exploded_edge info: entry into a signal-handler.  */
+ 
+ class signal_delivery_edge_info_t : public exploded_edge::custom_info_t
+ {
+ public:
+   void print (pretty_printer *pp) FINAL OVERRIDE
+   {
+     pp_string (pp, "signal delivered");
+   }
+ 
+   void update_model (region_model *model,
+ 		     const exploded_edge &eedge) FINAL OVERRIDE
+   {
+     update_model_for_signal_handler (model, eedge.m_dest->get_function ());
+   }
+ 
+   void add_events_to_path (checker_path *emission_path,
+ 			   const exploded_edge &eedge ATTRIBUTE_UNUSED)
+     FINAL OVERRIDE
+   {
+     emission_path->add_event
+       (new custom_event (UNKNOWN_LOCATION, NULL_TREE, 0,
+ 			 "later on,"
+ 			 " when the signal is delivered to the process"));
+   }
+ };
+ 
+ /* Concrete subclass of custom_transition for modeling registration of a
+    signal handler and the signal handler later being called.  */
+ 
+ class register_signal_handler : public custom_transition
+ {
+ public:
+   register_signal_handler (const signal_state_machine &sm,
+ 			   tree fndecl)
+   : m_sm (sm), m_fndecl (fndecl) {}
+ 
+   /* Model a signal-handler FNDECL being called at some later point
+      by injecting an edge to a new function-entry node with an empty
+      callstring, setting the 'in-signal-handler' global state
+      on the node.  */
+   void impl_transition (exploded_graph *eg,
+ 			exploded_node *src_enode,
+ 			int sm_idx) FINAL OVERRIDE
+   {
+     function *handler_fun = DECL_STRUCT_FUNCTION (m_fndecl);
+     if (!handler_fun)
+       return;
+     program_point entering_handler
+       = program_point::from_function_entry (eg->get_supergraph (),
+ 					    handler_fun);
+ 
+     program_state state_entering_handler (eg->get_ext_state ());
+     update_model_for_signal_handler (state_entering_handler.m_region_model,
+ 				     handler_fun);
+     state_entering_handler.m_checker_states[sm_idx]->set_global_state
+       (m_sm.m_in_signal_handler);
+ 
+     exploded_node *dst_enode = eg->get_or_create_node (entering_handler,
+ 						       state_entering_handler,
+ 						       NULL);
+     if (dst_enode)
+       eg->add_edge (src_enode, dst_enode, NULL, state_change (),
+ 		    new signal_delivery_edge_info_t ());
+   }
+ 
+   const signal_state_machine &m_sm;
+   tree m_fndecl;
+ };
+ 
+ /* Get a set of functions that are known to be unsafe to call from an
+    async signal handler.  */
+ 
+ static function_set
+ get_async_signal_unsafe_fns ()
+ {
+   // TODO: populate this list more fully
+   static const char * const async_signal_unsafe_fns[] = {
+     /* This array must be kept sorted.  */
+     "fprintf",
+     "free",
+     "malloc",
+     "printf",
+     "snprintf",
+     "sprintf",
+     "vfprintf",
+     "vprintf",
+     "vsnprintf",
+     "vsprintf"
+   };
+   const size_t count
+     = sizeof(async_signal_unsafe_fns) / sizeof (async_signal_unsafe_fns[0]);
+   function_set fs (async_signal_unsafe_fns, count);
+   return fs;
+ };
+ 
+ /* Return true if FNDECL is known to be unsafe to call from a signal
+    handler.  */
+ 
+ static bool
+ signal_unsafe_p (tree fndecl)
+ {
+   function_set fs = get_async_signal_unsafe_fns ();
+   return fs.contains_decl_p (fndecl);
+ }
+ 
+ /* Implementation of state_machine::on_stmt vfunc for signal_state_machine.  */
+ 
+ bool
+ signal_state_machine::on_stmt (sm_context *sm_ctxt,
+ 			       const supernode *node,
+ 			       const gimple *stmt) const
+ {
+   const state_t global_state = sm_ctxt->get_global_state ();
+   if (global_state == m_start)
+     {
+       if (const gcall *call = dyn_cast <const gcall *> (stmt))
+ 	if (tree callee_fndecl = sm_ctxt->get_fndecl_for_call (call))
+ 	  if (is_named_call_p (callee_fndecl, "signal", call, 2))
+ 	    {
+ 	      tree handler = gimple_call_arg (call, 1);
+ 	      if (TREE_CODE (handler) == ADDR_EXPR
+ 		  && TREE_CODE (TREE_OPERAND (handler, 0)) == FUNCTION_DECL)
+ 		{
+ 		  tree fndecl = TREE_OPERAND (handler, 0);
+ 		  register_signal_handler rsh (*this, fndecl);
+ 		  sm_ctxt->on_custom_transition (&rsh);
+ 		}
+ 	    }
+     }
+   else if (global_state == m_in_signal_handler)
+     {
+       if (const gcall *call = dyn_cast <const gcall *> (stmt))
+ 	if (tree callee_fndecl = sm_ctxt->get_fndecl_for_call (call))
+ 	  if (signal_unsafe_p (callee_fndecl))
+ 	    sm_ctxt->warn_for_state (node, stmt, NULL_TREE, m_in_signal_handler,
+ 				     new signal_unsafe_call (*this, call,
+ 							     callee_fndecl));
+     }
+ 
+   return false;
+ }
+ 
+ /* Implementation of state_machine::on_condition vfunc for
+    signal_state_machine.  */
+ 
+ void
+ signal_state_machine::on_condition (sm_context *sm_ctxt ATTRIBUTE_UNUSED,
+ 				    const supernode *node ATTRIBUTE_UNUSED,
+ 				    const gimple *stmt ATTRIBUTE_UNUSED,
+ 				    tree lhs ATTRIBUTE_UNUSED,
+ 				    enum tree_code op ATTRIBUTE_UNUSED,
+ 				    tree rhs ATTRIBUTE_UNUSED) const
+ {
+   // Empty
+ }
+ 
+ bool
+ signal_state_machine::can_purge_p (state_t s ATTRIBUTE_UNUSED) const
+ {
+   return true;
+ }
+ 
+ } // anonymous namespace
+ 
+ /* Internal interface to this file. */
+ 
+ state_machine *
+ make_signal_state_machine (logger *logger)
+ {
+   return new signal_state_machine (logger);
+ }
+ 
+ #if CHECKING_P
+ 
+ namespace selftest {
+ 
+ /* Run all of the selftests within this file.  */
+ 
+ void
+ analyzer_sm_signal_cc_tests ()
+ {
+   function_set fs = get_async_signal_unsafe_fns ();
+   fs.assert_sorted ();
+   fs.assert_sane ();
+ }
+ 
+ } // namespace selftest
+ 
+ #endif /* CHECKING_P */
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/sm-taint.cc gcc-10.1.0/gcc/analyzer/sm-taint.cc
*** gcc-9.3.0/gcc/analyzer/sm-taint.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/sm-taint.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,332 ----
+ /* An experimental state machine, for tracking "taint": unsanitized uses
+    of data potentially under an attacker's control.
+ 
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "options.h"
+ #include "diagnostic-path.h"
+ #include "diagnostic-metadata.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "diagnostic-event-id.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/sm.h"
+ #include "analyzer/pending-diagnostic.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ namespace {
+ 
+ /* An experimental state machine, for tracking "taint": unsanitized uses
+    of data potentially under an attacker's control.  */
+ 
+ class taint_state_machine : public state_machine
+ {
+ public:
+   taint_state_machine (logger *logger);
+ 
+   bool inherited_state_p () const FINAL OVERRIDE { return true; }
+ 
+   bool on_stmt (sm_context *sm_ctxt,
+ 		const supernode *node,
+ 		const gimple *stmt) const FINAL OVERRIDE;
+ 
+   void on_condition (sm_context *sm_ctxt,
+ 		     const supernode *node,
+ 		     const gimple *stmt,
+ 		     tree lhs,
+ 		     enum tree_code op,
+ 		     tree rhs) const FINAL OVERRIDE;
+ 
+   bool can_purge_p (state_t s) const FINAL OVERRIDE;
+ 
+   /* Start state.  */
+   state_t m_start;
+ 
+   /* State for a "tainted" value: unsanitized data potentially under an
+      attacker's control.  */
+   state_t m_tainted;
+ 
+   /* State for a "tainted" value that has a lower bound.  */
+   state_t m_has_lb;
+ 
+   /* State for a "tainted" value that has an upper bound.  */
+   state_t m_has_ub;
+ 
+   /* Stop state, for a value we don't want to track any more.  */
+   state_t m_stop;
+ };
+ 
+ enum bounds
+ {
+   BOUNDS_NONE,
+   BOUNDS_UPPER,
+   BOUNDS_LOWER
+ };
+ 
+ class tainted_array_index
+   : public pending_diagnostic_subclass<tainted_array_index>
+ {
+ public:
+   tainted_array_index (const taint_state_machine &sm, tree arg,
+ 		       enum bounds has_bounds)
+   : m_sm (sm), m_arg (arg), m_has_bounds (has_bounds) {}
+ 
+   const char *get_kind () const FINAL OVERRIDE { return "tainted_array_index"; }
+ 
+   bool operator== (const tainted_array_index &other) const
+   {
+     return same_tree_p (m_arg, other.m_arg);
+   }
+ 
+   bool emit (rich_location *rich_loc) FINAL OVERRIDE
+   {
+     diagnostic_metadata m;
+     m.add_cwe (129);
+     switch (m_has_bounds)
+       {
+       default:
+ 	gcc_unreachable ();
+       case BOUNDS_NONE:
+ 	return warning_meta (rich_loc, m, OPT_Wanalyzer_tainted_array_index,
+ 			     "use of tainted value %qE in array lookup"
+ 			     " without bounds checking",
+ 			     m_arg);
+ 	break;
+       case BOUNDS_UPPER:
+ 	return warning_meta (rich_loc, m, OPT_Wanalyzer_tainted_array_index,
+ 			     "use of tainted value %qE in array lookup"
+ 			     " without lower-bounds checking",
+ 			     m_arg);
+ 	break;
+       case BOUNDS_LOWER:
+ 	return warning_meta (rich_loc, m, OPT_Wanalyzer_tainted_array_index,
+ 			     "use of tainted value %qE in array lookup"
+ 			     " without upper-bounds checking",
+ 			     m_arg);
+ 	break;
+       }
+   }
+ 
+   label_text describe_state_change (const evdesc::state_change &change)
+     FINAL OVERRIDE
+   {
+     if (change.m_new_state == m_sm.m_tainted)
+       {
+ 	if (change.m_origin)
+ 	  return change.formatted_print ("%qE has an unchecked value here"
+ 					 " (from %qE)",
+ 					 change.m_expr, change.m_origin);
+ 	else
+ 	  return change.formatted_print ("%qE gets an unchecked value here",
+ 					 change.m_expr);
+       }
+     else if (change.m_new_state == m_sm.m_has_lb)
+       return change.formatted_print ("%qE has its lower bound checked here",
+ 				     change.m_expr);
+     else if (change.m_new_state == m_sm.m_has_ub)
+       return change.formatted_print ("%qE has its upper bound checked here",
+ 				     change.m_expr);
+     return label_text ();
+   }
+ 
+   label_text describe_final_event (const evdesc::final_event &ev) FINAL OVERRIDE
+   {
+     switch (m_has_bounds)
+       {
+       default:
+ 	gcc_unreachable ();
+       case BOUNDS_NONE:
+ 	return ev.formatted_print ("use of tainted value %qE in array lookup"
+ 				   " without bounds checking",
+ 				   m_arg);
+       case BOUNDS_UPPER:
+ 	return ev.formatted_print ("use of tainted value %qE in array lookup"
+ 				   " without lower-bounds checking",
+ 				   m_arg);
+       case BOUNDS_LOWER:
+ 	return ev.formatted_print ("use of tainted value %qE in array lookup"
+ 				   " without upper-bounds checking",
+ 				   m_arg);
+       }
+   }
+ 
+ private:
+   const taint_state_machine &m_sm;
+   tree m_arg;
+   enum bounds m_has_bounds;
+ };
+ 
+ /* taint_state_machine's ctor.  */
+ 
+ taint_state_machine::taint_state_machine (logger *logger)
+ : state_machine ("taint", logger)
+ {
+   m_start = add_state ("start");
+   m_tainted = add_state ("tainted");
+   m_has_lb = add_state ("has_lb");
+   m_has_ub = add_state ("has_ub");
+   m_stop = add_state ("stop");
+ }
+ 
+ /* Implementation of state_machine::on_stmt vfunc for taint_state_machine.  */
+ 
+ bool
+ taint_state_machine::on_stmt (sm_context *sm_ctxt,
+ 			       const supernode *node,
+ 			       const gimple *stmt) const
+ {
+   if (const gcall *call = dyn_cast <const gcall *> (stmt))
+     if (tree callee_fndecl = sm_ctxt->get_fndecl_for_call (call))
+       {
+ 	if (is_named_call_p (callee_fndecl, "fread", call, 4))
+ 	  {
+ 	    tree arg = gimple_call_arg (call, 0);
+ 	    arg = sm_ctxt->get_readable_tree (arg);
+ 
+ 	    sm_ctxt->on_transition (node, stmt, arg, m_start, m_tainted);
+ 
+ 	    /* Dereference an ADDR_EXPR.  */
+ 	    // TODO: should the engine do this?
+ 	    if (TREE_CODE (arg) == ADDR_EXPR)
+ 	      sm_ctxt->on_transition (node, stmt, TREE_OPERAND (arg, 0),
+ 				      m_start, m_tainted);
+ 	    return true;
+ 	  }
+       }
+   // TODO: ...etc; many other sources of untrusted data
+ 
+   if (const gassign *assign = dyn_cast <const gassign *> (stmt))
+     {
+       tree rhs1 = gimple_assign_rhs1 (assign);
+       enum tree_code op = gimple_assign_rhs_code (assign);
+ 
+       /* Check array accesses.  */
+       if (op == ARRAY_REF)
+ 	{
+ 	  tree arg = TREE_OPERAND (rhs1, 1);
+ 	  arg = sm_ctxt->get_readable_tree (arg);
+ 
+ 	  /* Unsigned types have an implicit lower bound.  */
+ 	  bool is_unsigned = false;
+ 	  if (INTEGRAL_TYPE_P (TREE_TYPE (arg)))
+ 	    is_unsigned = TYPE_UNSIGNED (TREE_TYPE (arg));
+ 
+ 	  /* Complain about missing bounds.  */
+ 	  sm_ctxt->warn_for_state
+ 	    (node, stmt, arg, m_tainted,
+ 	     new tainted_array_index (*this, arg,
+ 				      is_unsigned
+ 				      ? BOUNDS_LOWER : BOUNDS_NONE));
+ 	  sm_ctxt->on_transition (node, stmt, arg, m_tainted, m_stop);
+ 
+ 	  /* Complain about missing upper bound.  */
+ 	  sm_ctxt->warn_for_state  (node, stmt, arg, m_has_lb,
+ 				    new tainted_array_index (*this, arg,
+ 							     BOUNDS_LOWER));
+ 	  sm_ctxt->on_transition (node, stmt, arg, m_has_lb, m_stop);
+ 
+ 	  /* Complain about missing lower bound.  */
+ 	  if (!is_unsigned)
+ 	    {
+ 	      sm_ctxt->warn_for_state  (node, stmt, arg, m_has_ub,
+ 					new tainted_array_index (*this, arg,
+ 								 BOUNDS_UPPER));
+ 	      sm_ctxt->on_transition (node, stmt, arg, m_has_ub, m_stop);
+ 	    }
+ 	}
+     }
+ 
+   return false;
+ }
+ 
+ /* Implementation of state_machine::on_condition vfunc for taint_state_machine.
+    Potentially transition state 'tainted' to 'has_ub' or 'has_lb',
+    and states 'has_ub' and 'has_lb' to 'stop'.  */
+ 
+ void
+ taint_state_machine::on_condition (sm_context *sm_ctxt,
+ 				   const supernode *node,
+ 				   const gimple *stmt,
+ 				   tree lhs,
+ 				   enum tree_code op,
+ 				   tree rhs ATTRIBUTE_UNUSED) const
+ {
+   if (stmt == NULL)
+     return;
+ 
+   // TODO: this doesn't use the RHS; should we make it symmetric?
+ 
+   // TODO
+   switch (op)
+     {
+       //case NE_EXPR:
+       //case EQ_EXPR:
+     case GE_EXPR:
+     case GT_EXPR:
+       {
+ 	sm_ctxt->on_transition (node, stmt, lhs, m_tainted,
+ 				m_has_lb);
+ 	sm_ctxt->on_transition (node, stmt, lhs, m_has_ub,
+ 				m_stop);
+       }
+       break;
+     case LE_EXPR:
+     case LT_EXPR:
+       {
+ 	sm_ctxt->on_transition (node, stmt, lhs, m_tainted,
+ 				m_has_ub);
+ 	sm_ctxt->on_transition (node, stmt, lhs, m_has_lb,
+ 				m_stop);
+       }
+       break;
+     default:
+       break;
+     }
+ }
+ 
+ bool
+ taint_state_machine::can_purge_p (state_t s ATTRIBUTE_UNUSED) const
+ {
+   return true;
+ }
+ 
+ } // anonymous namespace
+ 
+ /* Internal interface to this file. */
+ 
+ state_machine *
+ make_taint_state_machine (logger *logger)
+ {
+   return new taint_state_machine (logger);
+ }
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/sm.cc gcc-10.1.0/gcc/analyzer/sm.cc
*** gcc-9.3.0/gcc/analyzer/sm.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/sm.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,156 ----
+ /* Modeling API uses and misuses via state machines.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "options.h"
+ #include "function.h"
+ #include "diagnostic-core.h"
+ #include "pretty-print.h"
+ #include "analyzer/analyzer.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/sm.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ /* If STMT is an assignment from zero, return the LHS.  */
+ 
+ tree
+ is_zero_assignment (const gimple *stmt)
+ {
+   const gassign *assign_stmt = dyn_cast <const gassign *> (stmt);
+   if (!assign_stmt)
+     return NULL_TREE;
+ 
+   enum tree_code op = gimple_assign_rhs_code (assign_stmt);
+   if (TREE_CODE_CLASS (op) != tcc_constant)
+     return NULL_TREE;
+ 
+   if (!zerop (gimple_assign_rhs1 (assign_stmt)))
+     return NULL_TREE;
+ 
+   return gimple_assign_lhs (assign_stmt);
+ }
+ 
+ /* Return true if VAR has pointer or reference type.  */
+ 
+ bool
+ any_pointer_p (tree var)
+ {
+   return POINTER_TYPE_P (TREE_TYPE (var));
+ }
+ 
+ namespace ana {
+ 
+ /* Add a state with name NAME to this state_machine.
+    The string is required to outlive the state_machine.
+ 
+    Return the state_t for the new state.  */
+ 
+ state_machine::state_t
+ state_machine::add_state (const char *name)
+ {
+   m_state_names.safe_push (name);
+   return m_state_names.length () - 1;
+ }
+ 
+ /* Get the name of state S within this state_machine.  */
+ 
+ const char *
+ state_machine::get_state_name (state_t s) const
+ {
+   return m_state_names[s];
+ }
+ 
+ /* Get the state with name NAME, which must exist.
+    This is purely intended for use in selftests.  */
+ 
+ state_machine::state_t
+ state_machine::get_state_by_name (const char *name)
+ {
+   unsigned i;
+   const char *iter_name;
+   FOR_EACH_VEC_ELT (m_state_names, i, iter_name)
+     if (!strcmp (name, iter_name))
+       return i;
+   /* Name not found.  */
+   gcc_unreachable ();
+ }
+ 
+ /* Assert that S is a valid state for this state_machine.  */
+ 
+ void
+ state_machine::validate (state_t s) const
+ {
+   gcc_assert (s < m_state_names.length ());
+ }
+ 
+ /* Dump a multiline representation of this state machine to PP.  */
+ 
+ void
+ state_machine::dump_to_pp (pretty_printer *pp) const
+ {
+   unsigned i;
+   const char *name;
+   FOR_EACH_VEC_ELT (m_state_names, i, name)
+     pp_printf (pp, "  state %i: %qs\n", i, name);
+ }
+ 
+ /* Create instances of the various state machines, each using LOGGER,
+    and populate OUT with them.  */
+ 
+ void
+ make_checkers (auto_delete_vec <state_machine> &out, logger *logger)
+ {
+   out.safe_push (make_malloc_state_machine (logger));
+   out.safe_push (make_fileptr_state_machine (logger));
+   /* The "taint" checker must be explicitly enabled (as it currently
+      leads to state explosions that stop the other checkers working).  */
+   if (flag_analyzer_checker)
+     out.safe_push (make_taint_state_machine (logger));
+   out.safe_push (make_sensitive_state_machine (logger));
+   out.safe_push (make_signal_state_machine (logger));
+ 
+   /* We only attempt to run the pattern tests if it might have been manually
+      enabled (for DejaGnu purposes).  */
+   if (flag_analyzer_checker)
+     out.safe_push (make_pattern_test_state_machine (logger));
+ 
+   if (flag_analyzer_checker)
+     {
+       unsigned read_index, write_index;
+       state_machine **sm;
+ 
+       /* TODO: this leaks the machines
+ 	 Would be nice to log the things that were removed.  */
+       VEC_ORDERED_REMOVE_IF (out, read_index, write_index, sm,
+ 			     0 != strcmp (flag_analyzer_checker,
+ 					  (*sm)->get_name ()));
+     }
+ }
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/sm.h gcc-10.1.0/gcc/analyzer/sm.h
*** gcc-9.3.0/gcc/analyzer/sm.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/sm.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,193 ----
+ /* Modeling API uses and misuses via state machines.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_SM_H
+ #define GCC_ANALYZER_SM_H
+ 
+ /* Utility functions for use by state machines.  */
+ 
+ extern tree is_zero_assignment (const gimple *stmt);
+ extern bool any_pointer_p (tree var);
+ 
+ namespace ana {
+ 
+ class state_machine;
+ class sm_context;
+ class pending_diagnostic;
+ 
+ /* An abstract base class for a state machine describing an API.
+    A mapping from state IDs to names, and various virtual functions
+    for pattern-matching on statements.  */
+ 
+ class state_machine : public log_user
+ {
+ public:
+   typedef unsigned state_t;
+ 
+   state_machine (const char *name, logger *logger)
+   : log_user (logger), m_name (name) {}
+ 
+   virtual ~state_machine () {}
+ 
+   /* Should states be inherited from a parent region to a child region,
+      when first accessing a child region?
+      For example we should inherit the taintedness of a subregion,
+      but we should not inherit the "malloc:non-null" state of a field
+      within a heap-allocated struct.  */
+   virtual bool inherited_state_p () const = 0;
+ 
+   const char *get_name () const { return m_name; }
+ 
+   const char *get_state_name (state_t s) const;
+ 
+   state_t get_state_by_name (const char *name);
+ 
+   /* Return true if STMT is a function call recognized by this sm.  */
+   virtual bool on_stmt (sm_context *sm_ctxt,
+ 			const supernode *node,
+ 			const gimple *stmt) const = 0;
+ 
+   virtual void on_phi (sm_context *sm_ctxt ATTRIBUTE_UNUSED,
+ 		       const supernode *node ATTRIBUTE_UNUSED,
+ 		       const gphi *phi ATTRIBUTE_UNUSED,
+ 		       tree rhs ATTRIBUTE_UNUSED) const
+   {
+   }
+ 
+   virtual void on_condition (sm_context *sm_ctxt,
+ 			     const supernode *node,
+ 			     const gimple *stmt,
+ 			     tree lhs, enum tree_code op, tree rhs) const = 0;
+ 
+   /* Return true if it safe to discard the given state (to help
+      when simplifying state objects).
+      States that need leak detection should return false.  */
+   virtual bool can_purge_p (state_t s) const = 0;
+ 
+   /* Called when VAR leaks (and !can_purge_p).  */
+   virtual pending_diagnostic *on_leak (tree var ATTRIBUTE_UNUSED) const
+   {
+     return NULL;
+   }
+ 
+   void validate (state_t s) const;
+ 
+   void dump_to_pp (pretty_printer *pp) const;
+ 
+ protected:
+   state_t add_state (const char *name);
+ 
+ private:
+   DISABLE_COPY_AND_ASSIGN (state_machine);
+ 
+   const char *m_name;
+   auto_vec<const char *> m_state_names;
+ };
+ 
+ /* Is STATE the start state?  (zero is hardcoded as the start state).  */
+ 
+ static inline bool
+ start_start_p (state_machine::state_t state)
+ {
+   return state == 0;
+ }
+ 
+ /* Abstract base class for state machines to pass to
+    sm_context::on_custom_transition for handling non-standard transitions
+    (e.g. adding a node and edge to simulate registering a callback and having
+    the callback be called later).  */
+ 
+ class custom_transition
+ {
+ public:
+   virtual ~custom_transition () {}
+   virtual void impl_transition (exploded_graph *eg,
+ 				exploded_node *src_enode,
+ 				int sm_idx) = 0;
+ };
+ 
+ /* Abstract base class giving an interface for the state machine to call
+    the checker engine, at a particular stmt.  */
+ 
+ class sm_context
+ {
+ public:
+   virtual ~sm_context () {}
+ 
+   /* Get the fndecl used at call, or NULL_TREE.
+      Use in preference to gimple_call_fndecl (and gimple_call_addr_fndecl),
+      since it can look through function pointer assignments and
+      other callback handling.  */
+   virtual tree get_fndecl_for_call (const gcall *call) = 0;
+ 
+   /* Called by state_machine in response to pattern matches:
+      if VAR is in state FROM, transition it to state TO, potentially
+      recording the "origin" of the state as ORIGIN.
+      Use NODE and STMT for location information.  */
+    virtual void on_transition (const supernode *node, const gimple *stmt,
+ 			      tree var,
+ 			      state_machine::state_t from,
+ 			      state_machine::state_t to,
+ 			      tree origin = NULL_TREE) = 0;
+ 
+   /* Called by state_machine in response to pattern matches:
+      issue a diagnostic D if VAR is in state STATE, using NODE and STMT
+      for location information.  */
+   virtual void warn_for_state (const supernode *node, const gimple *stmt,
+ 			       tree var, state_machine::state_t state,
+ 			       pending_diagnostic *d) = 0;
+ 
+   virtual tree get_readable_tree (tree expr)
+   {
+     return expr;
+   }
+ 
+   virtual state_machine::state_t get_global_state () const = 0;
+   virtual void set_global_state (state_machine::state_t) = 0;
+ 
+   /* A vfunc for handling custom transitions, such as when registering
+      a signal handler.  */
+   virtual void on_custom_transition (custom_transition *transition) = 0;
+ 
+ protected:
+   sm_context (int sm_idx, const state_machine &sm)
+   : m_sm_idx (sm_idx), m_sm (sm) {}
+ 
+   int m_sm_idx;
+   const state_machine &m_sm;
+ };
+ 
+ 
+ /* The various state_machine subclasses are hidden in their respective
+    implementation files.  */
+ 
+ extern void make_checkers (auto_delete_vec <state_machine> &out,
+ 			   logger *logger);
+ 
+ extern state_machine *make_malloc_state_machine (logger *logger);
+ extern state_machine *make_fileptr_state_machine (logger *logger);
+ extern state_machine *make_taint_state_machine (logger *logger);
+ extern state_machine *make_sensitive_state_machine (logger *logger);
+ extern state_machine *make_signal_state_machine (logger *logger);
+ extern state_machine *make_pattern_test_state_machine (logger *logger);
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_SM_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/state-purge.cc gcc-10.1.0/gcc/analyzer/state-purge.cc
*** gcc-9.3.0/gcc/analyzer/state-purge.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/state-purge.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,540 ----
+ /* Classes for purging state at function_points.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "timevar.h"
+ #include "tree-ssa-alias.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
+ #include "stringpool.h"
+ #include "tree-vrp.h"
+ #include "gimple-ssa.h"
+ #include "tree-ssanames.h"
+ #include "tree-phinodes.h"
+ #include "options.h"
+ #include "ssa-iterators.h"
+ #include "diagnostic-core.h"
+ #include "gimple-pretty-print.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "analyzer/call-string.h"
+ #include "digraph.h"
+ #include "ordered-hash-map.h"
+ #include "cfg.h"
+ #include "gimple-iterator.h"
+ #include "cgraph.h"
+ #include "analyzer/supergraph.h"
+ #include "analyzer/program-point.h"
+ #include "analyzer/analyzer-logging.h"
+ #include "analyzer/state-purge.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ /* state_purge_map's ctor.  Walk all SSA names in all functions, building
+    a state_purge_per_ssa_name instance for each.  */
+ 
+ state_purge_map::state_purge_map (const supergraph &sg,
+ 				  logger *logger)
+ : log_user (logger), m_sg (sg)
+ {
+   LOG_FUNC (logger);
+ 
+   auto_timevar tv (TV_ANALYZER_STATE_PURGE);
+ 
+   cgraph_node *node;
+   FOR_EACH_FUNCTION_WITH_GIMPLE_BODY (node)
+   {
+     function *fun = node->get_fun ();
+     if (logger)
+       log ("function: %s", function_name (fun));
+     tree name;
+     unsigned int i;;
+     FOR_EACH_SSA_NAME (i, name, fun)
+       {
+ 	/* For now, don't bother tracking the .MEM SSA names.  */
+ 	if (tree var = SSA_NAME_VAR (name))
+ 	  if (TREE_CODE (var) == VAR_DECL)
+ 	    if (VAR_DECL_IS_VIRTUAL_OPERAND (var))
+ 	      continue;
+ 	m_map.put (name, new state_purge_per_ssa_name (*this, name, fun));
+       }
+   }
+ }
+ 
+ /* state_purge_map's dtor.  */
+ 
+ state_purge_map::~state_purge_map ()
+ {
+   for (iterator iter = m_map.begin (); iter != m_map.end (); ++iter)
+     delete (*iter).second;
+ }
+ 
+ /* state_purge_per_ssa_name's ctor.
+ 
+    Locate all uses of VAR within FUN.
+    Walk backwards from each use, marking program points, until
+    we reach the def stmt, populating m_points_needing_var.
+ 
+    We have to track program points rather than
+    just stmts since there could be empty basic blocks on the way.  */
+ 
+ state_purge_per_ssa_name::state_purge_per_ssa_name (const state_purge_map &map,
+ 						    tree name,
+ 						    function *fun)
+ : m_points_needing_name (), m_name (name), m_fun (fun)
+ {
+   LOG_FUNC (map.get_logger ());
+ 
+   if (map.get_logger ())
+     {
+       map.log ("SSA name: %qE within %qD", name, fun->decl);
+ 
+       /* Show def stmt.  */
+       const gimple *def_stmt = SSA_NAME_DEF_STMT (name);
+       pretty_printer pp;
+       pp_gimple_stmt_1 (&pp, def_stmt, 0, (dump_flags_t)0);
+       map.log ("def stmt: %s", pp_formatted_text (&pp));
+     }
+ 
+   auto_vec<function_point> worklist;
+ 
+   /* Add all immediate uses of name to the worklist.
+      Compare with debug_immediate_uses.  */
+   imm_use_iterator iter;
+   use_operand_p use_p;
+   FOR_EACH_IMM_USE_FAST (use_p, iter, name)
+     {
+       if (USE_STMT (use_p))
+ 	{
+ 	  const gimple *use_stmt = USE_STMT (use_p);
+ 	  if (map.get_logger ())
+ 	    {
+ 	      pretty_printer pp;
+ 	      pp_gimple_stmt_1 (&pp, use_stmt, 0, (dump_flags_t)0);
+ 	      map.log ("used by stmt: %s", pp_formatted_text (&pp));
+ 	    }
+ 
+ 	  const supernode *snode
+ 	    = map.get_sg ().get_supernode_for_stmt (use_stmt);
+ 
+ 	  /* If it's a use within a phi node, then we care about
+ 	     which in-edge we came from.  */
+ 	  if (use_stmt->code == GIMPLE_PHI)
+ 	    {
+ 	      for (gphi_iterator gpi
+ 		     = const_cast<supernode *> (snode)->start_phis ();
+ 		   !gsi_end_p (gpi); gsi_next (&gpi))
+ 		{
+ 		  gphi *phi = gpi.phi ();
+ 		  if (phi == use_stmt)
+ 		    {
+ 		      /* Find arguments (and thus in-edges) which use NAME.  */
+ 		      for (unsigned arg_idx = 0;
+ 			   arg_idx < gimple_phi_num_args (phi);
+ 			   ++arg_idx)
+ 			{
+ 			  if (name == gimple_phi_arg (phi, arg_idx)->def)
+ 			    {
+ 			      edge in_edge = gimple_phi_arg_edge (phi, arg_idx);
+ 			      const superedge *in_sedge
+ 				= map.get_sg ().get_edge_for_cfg_edge (in_edge);
+ 			      function_point point
+ 				= function_point::before_supernode
+ 				(snode, in_sedge);
+ 			      add_to_worklist (point, &worklist,
+ 					       map.get_logger ());
+ 			      m_points_needing_name.add (point);
+ 			    }
+ 			}
+ 		    }
+ 		}
+ 	    }
+ 	  else
+ 	    {
+ 	      function_point point = before_use_stmt (map, use_stmt);
+ 	      add_to_worklist (point, &worklist, map.get_logger ());
+ 	      m_points_needing_name.add (point);
+ 
+ 	      /* We also need to add uses for conditionals and switches,
+ 		 where the stmt "happens" at the after_supernode, for filtering
+ 		 the out-edges.  */
+ 	      if (use_stmt == snode->get_last_stmt ())
+ 		{
+ 		  if (map.get_logger ())
+ 		    map.log ("last stmt in BB");
+ 		  function_point point
+ 		    = function_point::after_supernode (snode);
+ 		  add_to_worklist (point, &worklist, map.get_logger ());
+ 		  m_points_needing_name.add (point);
+ 		}
+ 	      else
+ 		if (map.get_logger ())
+ 		  map.log ("not last stmt in BB");
+ 	    }
+ 	}
+     }
+ 
+   /* Process worklist by walking backwards until we reach the def stmt.  */
+   {
+     log_scope s (map.get_logger (), "processing worklist");
+     while (worklist.length () > 0)
+       {
+ 	function_point point = worklist.pop ();
+ 	process_point (point, &worklist, map);
+     }
+   }
+ 
+   if (map.get_logger ())
+     {
+       map.log ("%qE in %qD is needed to process:", name, fun->decl);
+       for (point_set_t::iterator iter = m_points_needing_name.begin ();
+ 	   iter != m_points_needing_name.end ();
+ 	   ++iter)
+ 	{
+ 	  map.start_log_line ();
+ 	  map.get_logger ()->log_partial ("  point: ");
+ 	  (*iter).print (map.get_logger ()->get_printer (), format (false));
+ 	  map.end_log_line ();
+ 	}
+     }
+ }
+ 
+ /* Return true if the SSA name is needed at POINT.  */
+ 
+ bool
+ state_purge_per_ssa_name::needed_at_point_p (const function_point &point) const
+ {
+   return const_cast <point_set_t &> (m_points_needing_name).contains (point);
+ }
+ 
+ /* Get the function_point representing immediately before USE_STMT.
+    Subroutine of ctor.  */
+ 
+ function_point
+ state_purge_per_ssa_name::before_use_stmt (const state_purge_map &map,
+ 					   const gimple *use_stmt)
+ {
+   gcc_assert (use_stmt->code != GIMPLE_PHI);
+ 
+   const supernode *supernode
+     = map.get_sg ().get_supernode_for_stmt (use_stmt);
+   unsigned int stmt_idx = supernode->get_stmt_index (use_stmt);
+   return function_point::before_stmt (supernode, stmt_idx);
+ }
+ 
+ /* Add POINT to *WORKLIST if the point has not already been seen.
+    Subroutine of ctor.  */
+ 
+ void
+ state_purge_per_ssa_name::add_to_worklist (const function_point &point,
+ 					   auto_vec<function_point> *worklist,
+ 					   logger *logger)
+ {
+   LOG_FUNC (logger);
+   if (logger)
+     {
+       logger->start_log_line ();
+       logger->log_partial ("point: '");
+       point.print (logger->get_printer (), format (false));
+       logger->log_partial ("' for worklist for %qE", m_name);
+       logger->end_log_line ();
+     }
+ 
+   gcc_assert (point.get_function () == m_fun);
+   if (point.get_from_edge ())
+     gcc_assert (point.get_from_edge ()->get_kind () == SUPEREDGE_CFG_EDGE);
+ 
+   if (m_points_needing_name.contains (point))
+     {
+       if (logger)
+ 	logger->log ("already seen for %qE", m_name);
+     }
+   else
+     {
+       if (logger)
+ 	logger->log ("not seen; adding to worklist for %qE", m_name);
+       m_points_needing_name.add (point);
+       worklist->safe_push (point);
+     }
+ }
+ 
+ /* Process POINT, popped from WORKLIST.
+    Iterate over predecessors of POINT, adding to WORKLIST.  */
+ 
+ void
+ state_purge_per_ssa_name::process_point (const function_point &point,
+ 					 auto_vec<function_point> *worklist,
+ 					 const state_purge_map &map)
+ {
+   logger *logger = map.get_logger ();
+   LOG_FUNC (logger);
+   if (logger)
+     {
+       logger->start_log_line ();
+       logger->log_partial ("considering point: '");
+       point.print (logger->get_printer (), format (false));
+       logger->log_partial ("' for %qE", m_name);
+       logger->end_log_line ();
+     }
+ 
+   gimple *def_stmt = SSA_NAME_DEF_STMT (m_name);
+ 
+   const supernode *snode = point.get_supernode ();
+ 
+   switch (point.get_kind ())
+     {
+     default:
+       gcc_unreachable ();
+ 
+     case PK_ORIGIN:
+       break;
+ 
+     case PK_BEFORE_SUPERNODE:
+       {
+ 	for (gphi_iterator gpi
+ 	       = const_cast<supernode *> (snode)->start_phis ();
+ 	     !gsi_end_p (gpi); gsi_next (&gpi))
+ 	  {
+ 	    gphi *phi = gpi.phi ();
+ 	    if (phi == def_stmt)
+ 	      {
+ 		if (logger)
+ 		  logger->log ("def stmt within phis; terminating");
+ 		return;
+ 	      }
+ 	  }
+ 
+ 	/* Add given pred to worklist.  */
+ 	if (point.get_from_edge ())
+ 	  {
+ 	    gcc_assert (point.get_from_edge ()->m_src);
+ 	    add_to_worklist
+ 	      (function_point::after_supernode (point.get_from_edge ()->m_src),
+ 	       worklist, logger);
+ 	  }
+ 	else
+ 	  {
+ 	    /* Add any intraprocedually edge for a call.  */
+ 	    if (snode->m_returning_call)
+ 	      {
+ 		cgraph_edge *cedge
+ 		  = supergraph_call_edge (snode->m_fun,
+ 					  snode->m_returning_call);
+ 		gcc_assert (cedge);
+ 		superedge *sedge
+ 		  = map.get_sg ().get_intraprocedural_edge_for_call (cedge);
+ 		gcc_assert (sedge);
+ 		add_to_worklist
+ 		  (function_point::after_supernode (sedge->m_src),
+ 		   worklist, logger);
+ 	      }
+ 	  }
+       }
+       break;
+ 
+     case PK_BEFORE_STMT:
+       {
+ 	if (def_stmt == point.get_stmt ())
+ 	  {
+ 	    if (logger)
+ 	      logger->log ("def stmt; terminating");
+ 	    return;
+ 	  }
+ 	if (point.get_stmt_idx () > 0)
+ 	  add_to_worklist (function_point::before_stmt
+ 			     (snode, point.get_stmt_idx () - 1),
+ 			   worklist, logger);
+ 	else
+ 	{
+ 	  /* Add before_supernode to worklist.  This captures the in-edge,
+ 	     so we have to do it once per in-edge.  */
+ 	  unsigned i;
+ 	  superedge *pred;
+ 	  FOR_EACH_VEC_ELT (snode->m_preds, i, pred)
+ 	    add_to_worklist (function_point::before_supernode (snode,
+ 							       pred),
+ 			     worklist, logger);
+ 	}
+       }
+       break;
+ 
+     case PK_AFTER_SUPERNODE:
+       {
+ 	if (snode->m_stmts.length ())
+ 	  add_to_worklist
+ 	    (function_point::before_stmt (snode,
+ 					  snode->m_stmts.length () - 1),
+ 	     worklist, logger);
+ 	else
+ 	  {
+ 	    /* Add before_supernode to worklist.  This captures the in-edge,
+ 	       so we have to do it once per in-edge.  */
+ 	    unsigned i;
+ 	    superedge *pred;
+ 	    FOR_EACH_VEC_ELT (snode->m_preds, i, pred)
+ 	      add_to_worklist (function_point::before_supernode (snode,
+ 								 pred),
+ 			       worklist, logger);
+ 	    /* If it's the initial BB, add it, to ensure that we
+ 	       have "before supernode" for the initial ENTRY block, and don't
+ 	       erroneously purge SSA names for initial values of parameters.  */
+ 	    if (snode->entry_p ())
+ 	      {
+ 		add_to_worklist
+ 		  (function_point::before_supernode (snode, NULL),
+ 		   worklist, logger);
+ 	      }
+ 	  }
+       }
+       break;
+     }
+ }
+ 
+ /* class state_purge_annotator : public dot_annotator.  */
+ 
+ /* Implementation of dot_annotator::add_node_annotations vfunc for
+    state_purge_annotator.
+ 
+    Add an additional record showing which names are purged on entry
+    to the supernode N.  */
+ 
+ bool
+ state_purge_annotator::add_node_annotations (graphviz_out *gv,
+ 					     const supernode &n,
+ 					     bool within_table) const
+ {
+   if (m_map == NULL)
+     return false;
+ 
+   if (within_table)
+     return false;
+ 
+   pretty_printer *pp = gv->get_pp ();
+ 
+    pp_printf (pp, "annotation_for_node_%i", n.m_index);
+    pp_printf (pp, " [shape=none,margin=0,style=filled,fillcolor=%s,label=\"",
+ 	      "lightblue");
+    pp_write_text_to_stream (pp);
+ 
+    // FIXME: passing in a NULL in-edge means we get no hits
+    function_point before_supernode
+      (function_point::before_supernode (&n, NULL));
+ 
+    for (state_purge_map::iterator iter = m_map->begin ();
+ 	iter != m_map->end ();
+ 	++iter)
+      {
+        tree name = (*iter).first;
+        state_purge_per_ssa_name *per_name_data = (*iter).second;
+        if (per_name_data->get_function () == n.m_fun)
+ 	 {
+ 	   if (per_name_data->needed_at_point_p (before_supernode))
+ 	     pp_printf (pp, "%qE needed here", name);
+ 	   else
+ 	     pp_printf (pp, "%qE not needed here", name);
+ 	 }
+        pp_newline (pp);
+      }
+ 
+    pp_string (pp, "\"];\n\n");
+    pp_flush (pp);
+    return false;
+ }
+ 
+ /* Print V to GV as a comma-separated list in braces within a <TR>,
+    titling it with TITLE.
+ 
+    Subroutine of state_purge_annotator::add_stmt_annotations.  */
+ 
+ static void
+ print_vec_of_names (graphviz_out *gv, const char *title,
+ 		    const auto_vec<tree> &v)
+ {
+   pretty_printer *pp = gv->get_pp ();
+   tree name;
+   unsigned i;
+   gv->begin_trtd ();
+   pp_printf (pp, "%s: {", title);
+   FOR_EACH_VEC_ELT (v, i, name)
+     {
+       if (i > 0)
+ 	pp_string (pp, ", ");
+       pp_printf (pp, "%qE", name);
+     }
+   pp_printf (pp, "}");
+   pp_write_text_as_html_like_dot_to_stream (pp);
+   gv->end_tdtr ();
+   pp_newline (pp);
+ }
+ 
+ /* Implementation of dot_annotator::add_stmt_annotations for
+    state_purge_annotator.
+ 
+    Add text showing which names are purged at STMT.  */
+ 
+ void
+ state_purge_annotator::add_stmt_annotations (graphviz_out *gv,
+ 					     const gimple *stmt,
+ 					     bool within_row) const
+ {
+   if (within_row)
+     return;
+ 
+   if (m_map == NULL)
+     return;
+ 
+   if (stmt->code == GIMPLE_PHI)
+     return;
+ 
+   pretty_printer *pp = gv->get_pp ();
+ 
+   pp_newline (pp);
+ 
+   const supernode *supernode = m_map->get_sg ().get_supernode_for_stmt (stmt);
+   unsigned int stmt_idx = supernode->get_stmt_index (stmt);
+   function_point before_stmt
+     (function_point::before_stmt (supernode, stmt_idx));
+ 
+   auto_vec<tree> needed;
+   auto_vec<tree> not_needed;
+   for (state_purge_map::iterator iter = m_map->begin ();
+        iter != m_map->end ();
+        ++iter)
+     {
+       tree name = (*iter).first;
+       state_purge_per_ssa_name *per_name_data = (*iter).second;
+       if (per_name_data->get_function () == supernode->m_fun)
+ 	{
+ 	  if (per_name_data->needed_at_point_p (before_stmt))
+ 	    needed.safe_push (name);
+ 	  else
+ 	    not_needed.safe_push (name);
+ 	}
+     }
+ 
+   print_vec_of_names (gv, "needed here", needed);
+   print_vec_of_names (gv, "not needed here", not_needed);
+ }
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/state-purge.h gcc-10.1.0/gcc/analyzer/state-purge.h
*** gcc-9.3.0/gcc/analyzer/state-purge.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/state-purge.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,167 ----
+ /* Classes for purging state at function_points.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_STATE_PURGE_H
+ #define GCC_ANALYZER_STATE_PURGE_H
+ 
+ /* Hash traits for function_point.  */
+ 
+ template <> struct default_hash_traits<function_point>
+ : public pod_hash_traits<function_point>
+ {
+   static const bool empty_zero_p = false;
+ };
+ 
+ template <>
+ inline hashval_t
+ pod_hash_traits<function_point>::hash (value_type v)
+ {
+   return v.hash ();
+ }
+ 
+ template <>
+ inline bool
+ pod_hash_traits<function_point>::equal (const value_type &existing,
+                                  const value_type &candidate)
+ {
+   return existing == candidate;
+ }
+ template <>
+ inline void
+ pod_hash_traits<function_point>::mark_deleted (value_type &v)
+ {
+   v = function_point::deleted ();
+ }
+ template <>
+ inline void
+ pod_hash_traits<function_point>::mark_empty (value_type &v)
+ {
+   v = function_point::empty ();
+ }
+ template <>
+ inline bool
+ pod_hash_traits<function_point>::is_deleted (value_type v)
+ {
+   return v.get_kind () == PK_DELETED;
+ }
+ template <>
+ inline bool
+ pod_hash_traits<function_point>::is_empty (value_type v)
+ {
+   return v.get_kind () == PK_EMPTY;
+ }
+ 
+ namespace ana {
+ 
+ /* The result of analyzing which SSA names can be purged from state at
+    different points in the program, so that we can simplify program_state
+    objects, in the hope of reducing state-blowup.  */
+ 
+ class state_purge_map : public log_user
+ {
+ public:
+   typedef ordered_hash_map<tree, state_purge_per_ssa_name *> map_t;
+   typedef map_t::iterator iterator;
+ 
+   state_purge_map (const supergraph &sg, logger *logger);
+   ~state_purge_map ();
+ 
+   const state_purge_per_ssa_name &get_data_for_ssa_name (tree name) const
+   {
+     gcc_assert (TREE_CODE (name) == SSA_NAME);
+     if (tree var = SSA_NAME_VAR (name))
+       if (TREE_CODE (var) == VAR_DECL)
+ 	gcc_assert (!VAR_DECL_IS_VIRTUAL_OPERAND (var));
+ 
+     state_purge_per_ssa_name **slot
+       = const_cast <map_t&> (m_map).get (name);
+     return **slot;
+   }
+ 
+   const supergraph &get_sg () const { return m_sg; }
+ 
+   iterator begin () const { return m_map.begin (); }
+   iterator end () const { return m_map.end (); }
+ 
+ private:
+   DISABLE_COPY_AND_ASSIGN (state_purge_map);
+ 
+   const supergraph &m_sg;
+   map_t m_map;
+ };
+ 
+ /* The part of a state_purge_map relating to a specific SSA name.
+ 
+    The result of analyzing a given SSA name, recording which
+    function_points need to retain state information about it to handle
+    their successor states, so that we can simplify program_state objects,
+    in the hope of reducing state-blowup.  */
+ 
+ class state_purge_per_ssa_name
+ {
+ public:
+   state_purge_per_ssa_name (const state_purge_map &map,
+ 			    tree name,
+ 			    function *fun);
+ 
+   bool needed_at_point_p (const function_point &point) const;
+ 
+   function *get_function () const { return m_fun; }
+ 
+ private:
+   static function_point before_use_stmt (const state_purge_map &map,
+ 					 const gimple *use_stmt);
+ 
+   void add_to_worklist (const function_point &point,
+ 			auto_vec<function_point> *worklist,
+ 			logger *logger);
+ 
+   void process_point (const function_point &point,
+ 		      auto_vec<function_point> *worklist,
+ 		      const state_purge_map &map);
+ 
+   typedef hash_set<function_point> point_set_t;
+   point_set_t m_points_needing_name;
+   tree m_name;
+   function *m_fun;
+ };
+ 
+ /* Subclass of dot_annotator for use by -fdump-analyzer-state-purge.
+    Annotate the .dot output with state-purge information.  */
+ 
+ class state_purge_annotator : public dot_annotator
+ {
+ public:
+   state_purge_annotator (const state_purge_map *map) : m_map (map) {}
+ 
+   bool add_node_annotations (graphviz_out *gv, const supernode &n, bool)
+     const FINAL OVERRIDE;
+ 
+   void add_stmt_annotations (graphviz_out *gv, const gimple *stmt,
+ 			     bool within_row)
+     const FINAL OVERRIDE;
+ 
+ private:
+   const state_purge_map *m_map;
+ };
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_STATE_PURGE_H */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/supergraph.cc gcc-10.1.0/gcc/analyzer/supergraph.cc
*** gcc-9.3.0/gcc/analyzer/supergraph.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/supergraph.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,1068 ----
+ /* "Supergraph" classes that combine CFGs and callgraph into one digraph.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tree.h"
+ #include "tm.h"
+ #include "toplev.h"
+ #include "hash-table.h"
+ #include "vec.h"
+ #include "ggc.h"
+ #include "basic-block.h"
+ #include "function.h"
+ #include "gimple-fold.h"
+ #include "tree-eh.h"
+ #include "gimple-expr.h"
+ #include "is-a.h"
+ #include "timevar.h"
+ #include "gimple.h"
+ #include "gimple-iterator.h"
+ #include "gimple-pretty-print.h"
+ #include "tree-pretty-print.h"
+ #include "graphviz.h"
+ #include "cgraph.h"
+ #include "tree-dfa.h"
+ #include "cfganal.h"
+ #include "function.h"
+ #include "analyzer/analyzer.h"
+ #include "ordered-hash-map.h"
+ #include "options.h"
+ #include "cgraph.h"
+ #include "cfg.h"
+ #include "digraph.h"
+ #include "analyzer/supergraph.h"
+ #include "analyzer/analyzer-logging.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ /* Get the function of the ultimate alias target being called at EDGE,
+    if any.  */
+ 
+ static function *
+ get_ultimate_function_for_cgraph_edge (cgraph_edge *edge)
+ {
+   cgraph_node *ultimate_node = edge->callee->ultimate_alias_target ();
+   if (!ultimate_node)
+     return NULL;
+   return ultimate_node->get_fun ();
+ }
+ 
+ /* Get the cgraph_edge, but only if there's an underlying function body.  */
+ 
+ cgraph_edge *
+ supergraph_call_edge (function *fun, gimple *stmt)
+ {
+   gcall *call = dyn_cast<gcall *> (stmt);
+   if (!call)
+     return NULL;
+   cgraph_edge *edge = cgraph_node::get (fun->decl)->get_edge (stmt);
+   if (!edge)
+     return NULL;
+   if (!edge->callee)
+     return NULL; /* e.g. for a function pointer.  */
+   if (!get_ultimate_function_for_cgraph_edge (edge))
+     return NULL;
+   return edge;
+ }
+ 
+ /* supergraph's ctor.  Walk the callgraph, building supernodes for each
+    CFG basic block, splitting the basic blocks at callsites.  Join
+    together the supernodes with interprocedural and intraprocedural
+    superedges as appropriate.  */
+ 
+ supergraph::supergraph (logger *logger)
+ {
+   auto_timevar tv (TV_ANALYZER_SUPERGRAPH);
+ 
+   LOG_FUNC (logger);
+ 
+   /* First pass: make supernodes.  */
+   {
+     /* Sort the cgraph_nodes?  */
+     cgraph_node *node;
+     FOR_EACH_FUNCTION_WITH_GIMPLE_BODY (node)
+     {
+       function *fun = node->get_fun ();
+ 
+       /* Ensure that EDGE_DFS_BACK is correct for every CFG edge in
+ 	 the supergraph (by doing it per-function).  */
+       auto_cfun sentinel (fun);
+       mark_dfs_back_edges ();
+ 
+       const int start_idx = m_nodes.length ();
+ 
+       basic_block bb;
+       FOR_ALL_BB_FN (bb, fun)
+ 	{
+ 	  /* The initial supernode for the BB gets the phi nodes (if any).  */
+ 	  supernode *node_for_stmts = add_node (fun, bb, NULL, phi_nodes (bb));
+ 	  m_bb_to_initial_node.put (bb, node_for_stmts);
+ 	  for (gphi_iterator gpi = gsi_start_phis (bb); !gsi_end_p (gpi);
+ 	       gsi_next (&gpi))
+ 	    {
+ 	      gimple *stmt = gsi_stmt (gpi);
+ 	      m_stmt_to_node_t.put (stmt, node_for_stmts);
+ 	    }
+ 
+ 	  /* Append statements from BB to the current supernode, splitting
+ 	     them into a new supernode at each call site; such call statements
+ 	     appear in both supernodes (representing call and return).  */
+ 	  gimple_stmt_iterator gsi;
+ 	  for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi))
+ 	    {
+ 	      gimple *stmt = gsi_stmt (gsi);
+ 	      node_for_stmts->m_stmts.safe_push (stmt);
+ 	      m_stmt_to_node_t.put (stmt, node_for_stmts);
+ 	      if (cgraph_edge *edge = supergraph_call_edge (fun, stmt))
+ 		{
+ 		  m_cgraph_edge_to_caller_prev_node.put(edge, node_for_stmts);
+ 		  node_for_stmts = add_node (fun, bb, as_a <gcall *> (stmt), NULL);
+ 		  m_cgraph_edge_to_caller_next_node.put (edge, node_for_stmts);
+ 		}
+ 	    }
+ 
+ 	  m_bb_to_final_node.put (bb, node_for_stmts);
+ 	}
+ 
+       const unsigned num_snodes = m_nodes.length () - start_idx;
+       m_function_to_num_snodes.put (fun, num_snodes);
+ 
+       if (logger)
+ 	{
+ 	  const int end_idx = m_nodes.length () - 1;
+ 	  logger->log ("SN: %i...%i: function %qD",
+ 		       start_idx, end_idx, fun->decl);
+ 	}
+     }
+   }
+ 
+   /* Second pass: make superedges.  */
+   {
+     /* Make superedges for CFG edges.  */
+     for (bb_to_node_t::iterator iter = m_bb_to_final_node.begin ();
+ 	 iter != m_bb_to_final_node.end ();
+ 	 ++iter)
+       {
+ 	basic_block bb = (*iter).first;
+ 	supernode *src_supernode = (*iter).second;
+ 
+ 	::edge cfg_edge;
+ 	int idx;
+ 	if (bb->succs)
+ 	  FOR_EACH_VEC_ELT (*bb->succs, idx, cfg_edge)
+ 	    {
+ 	      basic_block dest_cfg_block = cfg_edge->dest;
+ 	      supernode *dest_supernode
+ 		= *m_bb_to_initial_node.get (dest_cfg_block);
+ 	      cfg_superedge *cfg_sedge
+ 		= add_cfg_edge (src_supernode, dest_supernode, cfg_edge, idx);
+ 	      m_cfg_edge_to_cfg_superedge.put (cfg_edge, cfg_sedge);
+ 	    }
+       }
+ 
+     /* Make interprocedural superedges for calls.  */
+     {
+       for (cgraph_edge_to_node_t::iterator iter
+ 	     = m_cgraph_edge_to_caller_prev_node.begin ();
+ 	   iter != m_cgraph_edge_to_caller_prev_node.end ();
+ 	   ++iter)
+ 	{
+ 	  cgraph_edge *edge = (*iter).first;
+ 	  supernode *caller_prev_supernode = (*iter).second;
+ 	  function* callee_fn = get_ultimate_function_for_cgraph_edge (edge);
+ 	  if (!callee_fn || !callee_fn->cfg)
+ 	    continue;
+ 	  basic_block callee_cfg_block = ENTRY_BLOCK_PTR_FOR_FN (callee_fn);
+ 	  supernode *callee_supernode
+ 	    = *m_bb_to_initial_node.get (callee_cfg_block);
+ 	  call_superedge *sedge
+ 	    = add_call_superedge (caller_prev_supernode,
+ 				  callee_supernode,
+ 				  edge);
+ 	  m_cgraph_edge_to_call_superedge.put (edge, sedge);
+ 	}
+     }
+ 
+     /* Make interprocedural superedges for returns.  */
+     {
+       for (cgraph_edge_to_node_t::iterator iter
+ 	     = m_cgraph_edge_to_caller_next_node.begin ();
+ 	   iter != m_cgraph_edge_to_caller_next_node.end ();
+ 	   ++iter)
+ 	{
+ 	  cgraph_edge *edge = (*iter).first;
+ 	  supernode *caller_next_supernode = (*iter).second;
+ 	  function* callee_fn = get_ultimate_function_for_cgraph_edge (edge);
+ 	  if (!callee_fn || !callee_fn->cfg)
+ 	    continue;
+ 	  basic_block callee_cfg_block = EXIT_BLOCK_PTR_FOR_FN (callee_fn);
+ 	  supernode *callee_supernode
+ 	    = *m_bb_to_initial_node.get (callee_cfg_block);
+ 	  return_superedge *sedge
+ 	    = add_return_superedge (callee_supernode,
+ 				    caller_next_supernode,
+ 				    edge);
+ 	  m_cgraph_edge_to_return_superedge.put (edge, sedge);
+ 	}
+     }
+ 
+     /* Make intraprocedural superedges linking the two halves of a call.  */
+     {
+       for (cgraph_edge_to_node_t::iterator iter
+ 	     = m_cgraph_edge_to_caller_prev_node.begin ();
+ 	   iter != m_cgraph_edge_to_caller_prev_node.end ();
+ 	   ++iter)
+ 	{
+ 	  cgraph_edge *edge = (*iter).first;
+ 	  supernode *caller_prev_supernode = (*iter).second;
+ 	  supernode *caller_next_supernode
+ 	    = *m_cgraph_edge_to_caller_next_node.get (edge);
+ 	  superedge *sedge
+ 	    = new callgraph_superedge (caller_prev_supernode,
+ 				       caller_next_supernode,
+ 				       SUPEREDGE_INTRAPROCEDURAL_CALL,
+ 				       edge);
+ 	  add_edge (sedge);
+ 	  m_cgraph_edge_to_intraproc_superedge.put (edge, sedge);
+ 	}
+ 
+     }
+   }
+ }
+ 
+ /* Dump this graph in .dot format to PP, using DUMP_ARGS.
+    Cluster the supernodes by function, then by BB from original CFG.  */
+ 
+ void
+ supergraph::dump_dot_to_pp (pretty_printer *pp,
+ 			    const dump_args_t &dump_args) const
+ {
+   graphviz_out gv (pp);
+ 
+   pp_string (pp, "digraph \"");
+   pp_write_text_to_stream (pp);
+   pp_string (pp, "supergraph");
+   pp_write_text_as_dot_label_to_stream (pp, /*for_record=*/false);
+   pp_string (pp, "\" {\n");
+   gv.indent ();
+ 
+   gv.println ("overlap=false;");
+   gv.println ("compound=true;");
+ 
+   /* TODO: maybe (optionally) sub-subdivide by TU, for LTO; see also:
+      https://gcc-python-plugin.readthedocs.io/en/latest/_images/sample-supergraph.png
+   */
+ 
+   /* Break out the supernodes into clusters by function.  */
+   {
+     cgraph_node *node;
+     FOR_EACH_FUNCTION_WITH_GIMPLE_BODY (node)
+     {
+       function *fun = node->get_fun ();
+       const char *funcname = function_name (fun);
+       gv.println ("subgraph \"cluster_%s\" {",
+ 		  funcname);
+       gv.indent ();
+       pp_printf (pp,
+ 		 ("style=\"dashed\";"
+ 		  " color=\"black\";"
+ 		  " label=\"%s\";\n"),
+ 		 funcname);
+ 
+       /* Break out the nodes into clusters by BB from original CFG.  */
+       {
+ 	basic_block bb;
+ 	FOR_ALL_BB_FN (bb, fun)
+ 	  {
+ 	    if (dump_args.m_flags & SUPERGRAPH_DOT_SHOW_BBS)
+ 	      {
+ 		gv.println ("subgraph \"cluster_%s_bb_%i\" {",
+ 			    funcname, bb->index);
+ 		gv.indent ();
+ 		pp_printf (pp,
+ 			   ("style=\"dashed\";"
+ 			    " color=\"black\";"
+ 			    " label=\"bb: %i\";\n"),
+ 			   bb->index);
+ 	      }
+ 
+ 	    // TODO: maybe keep an index per-function/per-bb to speed this up???
+ 	    int i;
+ 	    supernode *n;
+ 	    FOR_EACH_VEC_ELT (m_nodes, i, n)
+ 	      if (n->m_fun == fun && n->m_bb == bb)
+ 		n->dump_dot (&gv, dump_args);
+ 
+ 	    if (dump_args.m_flags & SUPERGRAPH_DOT_SHOW_BBS)
+ 	      {
+ 		/* Terminate per-bb "subgraph" */
+ 		gv.outdent ();
+ 		gv.println ("}");
+ 	      }
+ 	  }
+       }
+ 
+       /* Add an invisible edge from ENTRY to EXIT, to improve the graph layout.  */
+       pp_string (pp, "\t");
+       get_node_for_function_entry (fun)->dump_dot_id (pp);
+       pp_string (pp, ":s -> ");
+       get_node_for_function_exit (fun)->dump_dot_id (pp);
+       pp_string (pp, ":n [style=\"invis\",constraint=true];\n");
+ 
+       /* Terminate per-function "subgraph" */
+       gv.outdent ();
+       gv.println ("}");
+     }
+   }
+ 
+   /* Superedges.  */
+   int i;
+   superedge *e;
+   FOR_EACH_VEC_ELT (m_edges, i, e)
+     e->dump_dot (&gv, dump_args);
+ 
+   /* Terminate "digraph" */
+   gv.outdent ();
+   gv.println ("}");
+ }
+ 
+ /* Dump this graph in .dot format to FP, using DUMP_ARGS.  */
+ 
+ void
+ supergraph::dump_dot_to_file (FILE *fp, const dump_args_t &dump_args) const
+ {
+   pretty_printer *pp = global_dc->printer->clone ();
+   pp_show_color (pp) = 0;
+   /* %qE in logs for SSA_NAMEs should show the ssa names, rather than
+      trying to prettify things by showing the underlying var.  */
+   pp_format_decoder (pp) = default_tree_printer;
+ 
+   pp->buffer->stream = fp;
+   dump_dot_to_pp (pp, dump_args);
+   pp_flush (pp);
+   delete pp;
+ }
+ 
+ /* Dump this graph in .dot format to PATH, using DUMP_ARGS.  */
+ 
+ void
+ supergraph::dump_dot (const char *path, const dump_args_t &dump_args) const
+ {
+   FILE *fp = fopen (path, "w");
+   dump_dot_to_file (fp, dump_args);
+   fclose (fp);
+ }
+ 
+ /* Create a supernode for BB within FUN and add it to this supergraph.
+ 
+    If RETURNING_CALL is non-NULL, the supernode represents the resumption
+    of the basic block after returning from that call.
+ 
+    If PHI_NODES is non-NULL, this is the initial supernode for the basic
+    block, and is responsible for any handling of the phi nodes.  */
+ 
+ supernode *
+ supergraph::add_node (function *fun, basic_block bb, gcall *returning_call,
+ 		      gimple_seq phi_nodes)
+ {
+   supernode *n = new supernode (fun, bb, returning_call, phi_nodes,
+ 				m_nodes.length ());
+   m_nodes.safe_push (n);
+   return n;
+ }
+ 
+ /* Create a new cfg_superedge from SRC to DEST for the underlying CFG edge E,
+    adding it to this supergraph.
+ 
+    If the edge is for a switch statement, create a switch_cfg_superedge
+    subclass using IDX (the index of E within the out-edges from SRC's
+    underlying basic block).  */
+ 
+ cfg_superedge *
+ supergraph::add_cfg_edge (supernode *src, supernode *dest, ::edge e, int idx)
+ {
+   /* Special-case switch edges.  */
+   gimple *stmt = src->get_last_stmt ();
+   cfg_superedge *new_edge;
+   if (stmt && stmt->code == GIMPLE_SWITCH)
+     new_edge = new switch_cfg_superedge (src, dest, e, idx);
+   else
+     new_edge = new cfg_superedge (src, dest, e);
+   add_edge (new_edge);
+   return new_edge;
+ }
+ 
+ /* Create and add a call_superedge representing an interprocedural call
+    from SRC to DEST, using CEDGE.  */
+ 
+ call_superedge *
+ supergraph::add_call_superedge (supernode *src, supernode *dest,
+ 				cgraph_edge *cedge)
+ {
+   call_superedge *new_edge = new call_superedge (src, dest, cedge);
+   add_edge (new_edge);
+   return new_edge;
+ }
+ 
+ /* Create and add a return_superedge representing returning from an
+    interprocedural call, returning from SRC to DEST, using CEDGE.  */
+ 
+ return_superedge *
+ supergraph::add_return_superedge (supernode *src, supernode *dest,
+ 				  cgraph_edge *cedge)
+ {
+   return_superedge *new_edge = new return_superedge (src, dest, cedge);
+   add_edge (new_edge);
+   return new_edge;
+ }
+ 
+ /* Implementation of dnode::dump_dot vfunc for supernodes.
+ 
+    Write a cluster for the node, and within it a .dot node showing
+    the phi nodes and stmts.  Call into any node annotator from ARGS to
+    potentially add other records to the cluster.  */
+ 
+ void
+ supernode::dump_dot (graphviz_out *gv, const dump_args_t &args) const
+ {
+   gv->println ("subgraph cluster_node_%i {",
+ 	       m_index);
+   gv->indent ();
+ 
+   gv->println("style=\"solid\";");
+   gv->println("color=\"black\";");
+   gv->println("fillcolor=\"lightgrey\";");
+   gv->println("label=\"sn: %i (bb: %i)\";", m_index, m_bb->index);
+ 
+   pretty_printer *pp = gv->get_pp ();
+ 
+   if (args.m_node_annotator)
+     args.m_node_annotator->add_node_annotations (gv, *this, false);
+ 
+   gv->write_indent ();
+   dump_dot_id (pp);
+   pp_printf (pp,
+ 	     " [shape=none,margin=0,style=filled,fillcolor=%s,label=<",
+ 	     "lightgrey");
+   pp_string (pp, "<TABLE BORDER=\"0\">");
+   pp_write_text_to_stream (pp);
+ 
+   bool had_row = false;
+ 
+   /* Give any annotator the chance to add its own per-node TR elements. */
+   if (args.m_node_annotator)
+     if (args.m_node_annotator->add_node_annotations (gv, *this, true))
+       had_row = true;
+ 
+   if (m_returning_call)
+     {
+       gv->begin_trtd ();
+       pp_string (pp, "returning call: ");
+       gv->end_tdtr ();
+ 
+       gv->begin_tr ();
+       gv->begin_td ();
+       pp_gimple_stmt_1 (pp, m_returning_call, 0, (dump_flags_t)0);
+       pp_write_text_as_html_like_dot_to_stream (pp);
+       gv->end_td ();
+       /* Give any annotator the chance to add per-stmt TD elements to
+ 	 this row.  */
+       if (args.m_node_annotator)
+ 	args.m_node_annotator->add_stmt_annotations (gv, m_returning_call,
+ 						     true);
+       gv->end_tr ();
+ 
+       /* Give any annotator the chance to add per-stmt TR elements.  */
+       if (args.m_node_annotator)
+ 	args.m_node_annotator->add_stmt_annotations (gv, m_returning_call,
+ 						     false);
+       pp_newline (pp);
+ 
+       had_row = true;
+     }
+ 
+   if (entry_p ())
+     {
+       pp_string (pp, "<TR><TD>ENTRY</TD></TR>");
+       pp_newline (pp);
+       had_row = true;
+     }
+ 
+   if (return_p ())
+     {
+       pp_string (pp, "<TR><TD>EXIT</TD></TR>");
+       pp_newline (pp);
+       had_row = true;
+     }
+ 
+   /* Phi nodes.  */
+   for (gphi_iterator gpi = const_cast<supernode *> (this)->start_phis ();
+        !gsi_end_p (gpi); gsi_next (&gpi))
+     {
+       const gimple *stmt = gsi_stmt (gpi);
+       gv->begin_tr ();
+       gv->begin_td ();
+       pp_gimple_stmt_1 (pp, stmt, 0, (dump_flags_t)0);
+       pp_write_text_as_html_like_dot_to_stream (pp);
+       gv->end_td ();
+       /* Give any annotator the chance to add per-phi TD elements to
+ 	 this row.  */
+       if (args.m_node_annotator)
+ 	args.m_node_annotator->add_stmt_annotations (gv, stmt, true);
+       gv->end_tr ();
+ 
+       /* Give any annotator the chance to add per-phi TR elements.  */
+       if (args.m_node_annotator)
+ 	args.m_node_annotator->add_stmt_annotations (gv, stmt, false);
+ 
+       pp_newline (pp);
+       had_row = true;
+     }
+ 
+   /* Statements.  */
+   int i;
+   gimple *stmt;
+   FOR_EACH_VEC_ELT (m_stmts, i, stmt)
+     {
+       gv->begin_tr ();
+       gv->begin_td ();
+       pp_gimple_stmt_1 (pp, stmt, 0, (dump_flags_t)0);
+       pp_write_text_as_html_like_dot_to_stream (pp);
+       gv->end_td ();
+       /* Give any annotator the chance to add per-stmt TD elements to
+ 	 this row.  */
+       if (args.m_node_annotator)
+ 	args.m_node_annotator->add_stmt_annotations (gv, stmt, true);
+       gv->end_tr ();
+ 
+       /* Give any annotator the chance to add per-stmt TR elements.  */
+       if (args.m_node_annotator)
+ 	args.m_node_annotator->add_stmt_annotations (gv, stmt, false);
+ 
+       pp_newline (pp);
+       had_row = true;
+     }
+ 
+   /* Give any annotator the chance to add additional per-node TR elements
+      to the end of the TABLE. */
+   if (args.m_node_annotator)
+     if (args.m_node_annotator->add_after_node_annotations (gv, *this))
+       had_row = true;
+ 
+   /* Graphviz requires a TABLE element to have at least one TR
+      (and each TR to have at least one TD).  */
+   if (!had_row)
+     {
+       pp_string (pp, "<TR><TD>(empty)</TD></TR>");
+       pp_newline (pp);
+     }
+ 
+   pp_string (pp, "</TABLE>>];\n\n");
+   pp_flush (pp);
+ 
+   /* Terminate "subgraph" */
+   gv->outdent ();
+   gv->println ("}");
+ }
+ 
+ /* Write an ID for this node to PP, for use in .dot output.  */
+ 
+ void
+ supernode::dump_dot_id (pretty_printer *pp) const
+ {
+   pp_printf (pp, "node_%i", m_index);
+ }
+ 
+ /* Get a location_t for the start of this supernode.  */
+ 
+ location_t
+ supernode::get_start_location () const
+ {
+   if (m_returning_call
+       && get_pure_location (m_returning_call->location) != UNKNOWN_LOCATION)
+     return m_returning_call->location;
+ 
+   int i;
+   gimple *stmt;
+   FOR_EACH_VEC_ELT (m_stmts, i, stmt)
+     if (get_pure_location (stmt->location) != UNKNOWN_LOCATION)
+       return stmt->location;
+ 
+   if (entry_p ())
+     {
+       // TWEAK: show the decl instead; this leads to more readable output:
+       return DECL_SOURCE_LOCATION (m_fun->decl);
+ 
+       return m_fun->function_start_locus;
+     }
+   if (return_p ())
+     return m_fun->function_end_locus;
+ 
+   return UNKNOWN_LOCATION;
+ }
+ 
+ /* Get a location_t for the end of this supernode.  */
+ 
+ location_t
+ supernode::get_end_location () const
+ {
+   int i;
+   gimple *stmt;
+   FOR_EACH_VEC_ELT_REVERSE (m_stmts, i, stmt)
+     if (get_pure_location (stmt->location) != UNKNOWN_LOCATION)
+       return stmt->location;
+ 
+   if (m_returning_call
+       && get_pure_location (m_returning_call->location) != UNKNOWN_LOCATION)
+     return m_returning_call->location;
+ 
+   if (entry_p ())
+     return m_fun->function_start_locus;
+   if (return_p ())
+     return m_fun->function_end_locus;
+ 
+   return UNKNOWN_LOCATION;
+ }
+ 
+ /* Given STMT within this supernode, return its index within m_stmts.  */
+ 
+ unsigned int
+ supernode::get_stmt_index (const gimple *stmt) const
+ {
+   unsigned i;
+   gimple *iter_stmt;
+   FOR_EACH_VEC_ELT (m_stmts, i, iter_stmt)
+     if (iter_stmt == stmt)
+       return i;
+   gcc_unreachable ();
+ }
+ 
+ /* Dump this superedge to PP.  */
+ 
+ void
+ superedge::dump (pretty_printer *pp) const
+ {
+   pp_printf (pp, "edge: SN: %i -> SN: %i", m_src->m_index, m_dest->m_index);
+   char *desc = get_description (false);
+   if (strlen (desc) > 0)
+     {
+       pp_space (pp);
+       pp_string (pp, desc);
+     }
+   free (desc);
+ }
+ 
+ /* Dump this superedge to stderr.  */
+ 
+ DEBUG_FUNCTION void
+ superedge::dump () const
+ {
+   pretty_printer pp;
+   pp_format_decoder (&pp) = default_tree_printer;
+   pp_show_color (&pp) = pp_show_color (global_dc->printer);
+   pp.buffer->stream = stderr;
+   dump (&pp);
+   pp_newline (&pp);
+   pp_flush (&pp);
+ }
+ 
+ /* Implementation of dedge::dump_dot for superedges.
+    Write a .dot edge to GV representing this superedge.  */
+ 
+ void
+ superedge::dump_dot (graphviz_out *gv, const dump_args_t &) const
+ {
+   const char *style = "\"solid,bold\"";
+   const char *color = "black";
+   int weight = 10;
+   const char *constraint = "true";
+ 
+   switch (m_kind)
+     {
+     default:
+       gcc_unreachable ();
+     case SUPEREDGE_CFG_EDGE:
+       break;
+     case SUPEREDGE_CALL:
+       color = "red";
+       break;
+     case SUPEREDGE_RETURN:
+       color = "green";
+       break;
+     case SUPEREDGE_INTRAPROCEDURAL_CALL:
+       style = "\"dotted\"";
+       break;
+     }
+ 
+   /* Adapted from graph.c:draw_cfg_node_succ_edges.  */
+   if (::edge cfg_edge = get_any_cfg_edge ())
+     {
+       if (cfg_edge->flags & EDGE_FAKE)
+ 	{
+ 	  style = "dotted";
+ 	  color = "green";
+ 	  weight = 0;
+ 	}
+       else if (cfg_edge->flags & EDGE_DFS_BACK)
+ 	{
+ 	  style = "\"dotted,bold\"";
+ 	  color = "blue";
+ 	  weight = 10;
+ 	}
+       else if (cfg_edge->flags & EDGE_FALLTHRU)
+ 	{
+ 	  color = "blue";
+ 	  weight = 100;
+ 	}
+ 
+       if (cfg_edge->flags & EDGE_ABNORMAL)
+ 	color = "red";
+     }
+ 
+   gv->write_indent ();
+ 
+   pretty_printer *pp = gv->get_pp ();
+ 
+   m_src->dump_dot_id (pp);
+   pp_string (pp, " -> ");
+   m_dest->dump_dot_id (pp);
+   pp_printf (pp,
+ 	     (" [style=%s, color=%s, weight=%d, constraint=%s,"
+ 	      " ltail=\"cluster_node_%i\", lhead=\"cluster_node_%i\""
+ 	      " headlabel=\""),
+ 	     style, color, weight, constraint,
+ 	     m_src->m_index, m_dest->m_index);
+ 
+   dump_label_to_pp (pp, false);
+ 
+   pp_printf (pp, "\"];\n");
+ }
+ 
+ /* If this is an intraprocedural superedge, return the associated
+    CFG edge.  Otherwise, return NULL.  */
+ 
+ ::edge
+ superedge::get_any_cfg_edge () const
+ {
+   if (const cfg_superedge *sub = dyn_cast_cfg_superedge ())
+     return sub->get_cfg_edge ();
+   return NULL;
+ }
+ 
+ /* If this is an interprocedural superedge, return the associated
+    cgraph_edge *.  Otherwise, return NULL.  */
+ 
+ cgraph_edge *
+ superedge::get_any_callgraph_edge () const
+ {
+   if (const callgraph_superedge *sub = dyn_cast_callgraph_superedge ())
+     return sub->m_cedge;
+   return NULL;
+ }
+ 
+ /* Build a description of this superedge (e.g. "true" for the true
+    edge of a conditional, or "case 42:" for a switch case).
+ 
+    The caller is responsible for freeing the result.
+ 
+    If USER_FACING is false, the result also contains any underlying
+    CFG edge flags. e.g. " (flags FALLTHRU | DFS_BACK)".  */
+ 
+ char *
+ superedge::get_description (bool user_facing) const
+ {
+   pretty_printer pp;
+   dump_label_to_pp (&pp, user_facing);
+   return xstrdup (pp_formatted_text (&pp));
+ }
+ 
+ /* Implementation of superedge::dump_label_to_pp for non-switch CFG
+    superedges.
+ 
+    For true/false edges, print "true" or "false" to PP.
+ 
+    If USER_FACING is false, also print flags on the underlying CFG edge to
+    PP.  */
+ 
+ void
+ cfg_superedge::dump_label_to_pp (pretty_printer *pp,
+ 				 bool user_facing) const
+ {
+   if (true_value_p ())
+     pp_printf (pp, "true");
+   else if (false_value_p ())
+     pp_printf (pp, "false");
+ 
+   if (user_facing)
+     return;
+ 
+   /* Express edge flags as a string with " | " separator.
+      e.g. " (flags FALLTHRU | DFS_BACK)".  */
+   if (get_flags ())
+     {
+       pp_string (pp, " (flags ");
+       bool seen_flag = false;
+ #define DEF_EDGE_FLAG(NAME,IDX)			\
+   do {						\
+     if (get_flags () & EDGE_##NAME)			\
+       {						\
+ 	if (seen_flag)				\
+ 	  pp_string (pp, " | ");			\
+ 	pp_printf (pp, "%s", (#NAME));		\
+ 	seen_flag = true;			\
+       }						\
+   } while (0);
+ #include "cfg-flags.def"
+ #undef DEF_EDGE_FLAG
+       pp_string (pp, ")");
+     }
+ 
+   /* Otherwise, no label.  */
+ }
+ 
+ /* Get the phi argument for PHI for this CFG edge.  */
+ 
+ tree
+ cfg_superedge::get_phi_arg (const gphi *phi) const
+ {
+   size_t index = m_cfg_edge->dest_idx;
+   return gimple_phi_arg_def (phi, index);
+ }
+ 
+ /* Implementation of superedge::dump_label_to_pp for CFG superedges for
+    "switch" statements.
+ 
+    Print "case VAL:", "case LOWER ... UPPER:", or "default:" to PP.  */
+ 
+ void
+ switch_cfg_superedge::dump_label_to_pp (pretty_printer *pp,
+ 					bool user_facing ATTRIBUTE_UNUSED) const
+ {
+   tree case_label = get_case_label ();
+   gcc_assert (TREE_CODE (case_label) == CASE_LABEL_EXPR);
+   tree lower_bound = CASE_LOW (case_label);
+   tree upper_bound = CASE_HIGH (case_label);
+   if (lower_bound)
+     {
+       pp_printf (pp, "case ");
+       dump_generic_node (pp, lower_bound, 0, (dump_flags_t)0, false);
+       if (upper_bound)
+ 	{
+ 	  pp_printf (pp, " ... ");
+ 	  dump_generic_node (pp, upper_bound, 0, (dump_flags_t)0, false);
+ 	}
+       pp_printf (pp, ":");
+     }
+   else
+     pp_printf (pp, "default:");
+ }
+ 
+ /* Get the case label for this "switch" superedge.  */
+ 
+ tree
+ switch_cfg_superedge::get_case_label () const
+ {
+   return gimple_switch_label (get_switch_stmt (), m_idx);
+ }
+ 
+ /* Implementation of superedge::dump_label_to_pp for interprocedural
+    superedges.  */
+ 
+ void
+ callgraph_superedge::dump_label_to_pp (pretty_printer *pp,
+ 				       bool user_facing ATTRIBUTE_UNUSED) const
+ {
+   switch (m_kind)
+     {
+     default:
+     case SUPEREDGE_CFG_EDGE:
+       gcc_unreachable ();
+ 
+     case SUPEREDGE_CALL:
+       pp_printf (pp, "call");
+       break;
+ 
+     case SUPEREDGE_RETURN:
+       pp_printf (pp, "return");
+       break;
+ 
+     case SUPEREDGE_INTRAPROCEDURAL_CALL:
+       pp_printf (pp, "intraproc link");
+       break;
+     }
+ }
+ 
+ /* Get the function that was called at this interprocedural call/return
+    edge.  */
+ 
+ function *
+ callgraph_superedge::get_callee_function () const
+ {
+   return get_ultimate_function_for_cgraph_edge (m_cedge);
+ }
+ 
+ /* Get the calling function at this interprocedural call/return edge.  */
+ 
+ function *
+ callgraph_superedge::get_caller_function () const
+ {
+   return m_cedge->caller->get_fun ();
+ }
+ 
+ /* Get the fndecl that was called at this interprocedural call/return
+    edge.  */
+ 
+ tree
+ callgraph_superedge::get_callee_decl () const
+ {
+   return get_callee_function ()->decl;
+ }
+ 
+ /* Get the calling fndecl at this interprocedural call/return edge.  */
+ 
+ tree
+ callgraph_superedge::get_caller_decl () const
+ {
+   return get_caller_function ()->decl;
+ }
+ 
+ /* Given PARM_TO_FIND, a PARM_DECL, identify its index (writing it
+    to *OUT if OUT is non-NULL), and return the corresponding argument
+    at the callsite.  */
+ 
+ tree
+ callgraph_superedge::get_arg_for_parm (tree parm_to_find,
+ 				       callsite_expr *out) const
+ {
+   gcc_assert  (TREE_CODE (parm_to_find) == PARM_DECL);
+ 
+   tree callee = get_callee_decl ();
+   const gcall *call_stmt = get_call_stmt ();
+ 
+   unsigned i = 0;
+   for (tree iter_parm = DECL_ARGUMENTS (callee); iter_parm;
+        iter_parm = DECL_CHAIN (iter_parm), ++i)
+     {
+       if (i >= gimple_call_num_args (call_stmt))
+ 	return NULL_TREE;
+       if (iter_parm == parm_to_find)
+ 	{
+ 	  if (out)
+ 	    *out = callsite_expr::from_zero_based_param (i);
+ 	  return gimple_call_arg (call_stmt, i);
+ 	}
+     }
+ 
+   /* Not found.  */
+   return NULL_TREE;
+ }
+ 
+ /* Look for a use of ARG_TO_FIND as an argument at this callsite.
+    If found, return the default SSA def of the corresponding parm within
+    the callee, and if OUT is non-NULL, write the index to *OUT.
+    Only the first match is handled.  */
+ 
+ tree
+ callgraph_superedge::get_parm_for_arg (tree arg_to_find,
+ 				       callsite_expr *out) const
+ {
+   tree callee = get_callee_decl ();
+   const gcall *call_stmt = get_call_stmt ();
+ 
+   unsigned i = 0;
+   for (tree iter_parm = DECL_ARGUMENTS (callee); iter_parm;
+        iter_parm = DECL_CHAIN (iter_parm), ++i)
+     {
+       if (i >= gimple_call_num_args (call_stmt))
+ 	return NULL_TREE;
+       tree param = gimple_call_arg (call_stmt, i);
+       if (arg_to_find == param)
+ 	{
+ 	  if (out)
+ 	    *out = callsite_expr::from_zero_based_param (i);
+ 	  return ssa_default_def (get_callee_function (), iter_parm);
+ 	}
+     }
+ 
+   /* Not found.  */
+   return NULL_TREE;
+ }
+ 
+ /* Map caller_expr back to an expr within the callee, or return NULL_TREE.
+    If non-NULL is returned, populate OUT.  */
+ 
+ tree
+ callgraph_superedge::map_expr_from_caller_to_callee (tree caller_expr,
+ 						     callsite_expr *out) const
+ {
+   /* Is it an argument (actual param)?  If so, convert to
+      parameter (formal param).  */
+   tree parm = get_parm_for_arg (caller_expr, out);
+   if (parm)
+     return parm;
+   /* Otherwise try return value.  */
+   if (caller_expr == gimple_call_lhs (get_call_stmt ()))
+     {
+       if (out)
+ 	*out = callsite_expr::from_return_value ();
+       return DECL_RESULT (get_callee_decl ());
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Map callee_expr back to an expr within the caller, or return NULL_TREE.
+    If non-NULL is returned, populate OUT.  */
+ 
+ tree
+ callgraph_superedge::map_expr_from_callee_to_caller (tree callee_expr,
+ 						     callsite_expr *out) const
+ {
+   if (callee_expr == NULL_TREE)
+     return NULL_TREE;
+ 
+   /* If it's a parameter (formal param), get the argument (actual param).  */
+   if (TREE_CODE (callee_expr) == PARM_DECL)
+     return get_arg_for_parm (callee_expr, out);
+ 
+   /* Similar for the default SSA name of the PARM_DECL.  */
+   if (TREE_CODE (callee_expr) == SSA_NAME
+       && SSA_NAME_IS_DEFAULT_DEF (callee_expr)
+       && TREE_CODE (SSA_NAME_VAR (callee_expr)) == PARM_DECL)
+     return get_arg_for_parm (SSA_NAME_VAR (callee_expr), out);
+ 
+   /* Otherwise try return value.  */
+   if (callee_expr == DECL_RESULT (get_callee_decl ()))
+     {
+       if (out)
+ 	*out = callsite_expr::from_return_value ();
+       return gimple_call_lhs (get_call_stmt ());
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-9.3.0/gcc/analyzer/supergraph.h gcc-10.1.0/gcc/analyzer/supergraph.h
*** gcc-9.3.0/gcc/analyzer/supergraph.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/analyzer/supergraph.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,595 ----
+ /* "Supergraph" classes that combine CFGs and callgraph into one digraph.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_SUPERGRAPH_H
+ #define GCC_ANALYZER_SUPERGRAPH_H
+ 
+ using namespace ana;
+ 
+ namespace ana {
+ 
+ /* Forward decls, using indentation to show inheritance.  */
+ 
+ class supergraph;
+ class supernode;
+ class superedge;
+   class callgraph_superedge;
+     class call_superedge;
+     class return_superedge;
+   class cfg_superedge;
+     class switch_cfg_superedge;
+ class supercluster;
+ class dot_annotator;
+ 
+ class logger;
+ 
+ /* An enum for discriminating between superedge subclasses.  */
+ 
+ enum edge_kind
+ {
+   SUPEREDGE_CFG_EDGE,
+   SUPEREDGE_CALL,
+   SUPEREDGE_RETURN,
+   SUPEREDGE_INTRAPROCEDURAL_CALL
+ };
+ 
+ /* Flags for controlling the appearance of .dot dumps.  */
+ 
+ enum supergraph_dot_flags
+ {
+   SUPERGRAPH_DOT_SHOW_BBS = (1 << 0)
+ };
+ 
+ /* A traits struct describing the family of node, edge and digraph
+    classes for supergraphs.  */
+ 
+ struct supergraph_traits
+ {
+   typedef supernode node_t;
+   typedef superedge edge_t;
+   typedef supergraph graph_t;
+   struct dump_args_t
+   {
+     dump_args_t (enum supergraph_dot_flags flags,
+ 		 const dot_annotator *node_annotator)
+     : m_flags (flags),
+       m_node_annotator (node_annotator)
+     {}
+ 
+     enum supergraph_dot_flags m_flags;
+     const dot_annotator *m_node_annotator;
+   };
+   typedef supercluster cluster_t;
+ };
+ 
+ /* A "supergraph" is a directed graph formed by joining together all CFGs,
+    linking them via interprocedural call and return edges.
+ 
+    Basic blocks are split at callsites, so that a call statement occurs
+    twice: once at the end of a supernode, and a second instance at the
+    start of the next supernode (to handle the return).  */
+ 
+ class supergraph : public digraph<supergraph_traits>
+ {
+ public:
+   supergraph (logger *logger);
+ 
+   supernode *get_node_for_function_entry (function *fun) const
+   {
+     return get_node_for_block (ENTRY_BLOCK_PTR_FOR_FN (fun));
+   }
+ 
+   supernode *get_node_for_function_exit (function *fun) const
+   {
+     return get_node_for_block (EXIT_BLOCK_PTR_FOR_FN (fun));
+   }
+ 
+   supernode *get_node_for_block (basic_block bb) const
+   {
+     return *const_cast <bb_to_node_t &> (m_bb_to_initial_node).get (bb);
+   }
+ 
+   /* Get the supernode containing the second half of the gcall *
+      at an interprocedural call, within the caller.  */
+   supernode *get_caller_next_node (cgraph_edge *edge) const
+   {
+     return (*const_cast <cgraph_edge_to_node_t &>
+ 	      (m_cgraph_edge_to_caller_next_node).get (edge));
+   }
+ 
+   call_superedge *get_edge_for_call (cgraph_edge *edge) const
+   {
+     return (*const_cast <cgraph_edge_to_call_superedge_t &>
+ 	      (m_cgraph_edge_to_call_superedge).get (edge));
+   }
+ 
+   return_superedge *get_edge_for_return (cgraph_edge *edge) const
+   {
+     return (*const_cast <cgraph_edge_to_return_superedge_t &>
+ 	      (m_cgraph_edge_to_return_superedge).get (edge));
+   }
+ 
+   superedge *get_intraprocedural_edge_for_call (cgraph_edge *edge) const
+   {
+     return (*const_cast <cgraph_edge_to_intraproc_superedge_t &>
+ 	      (m_cgraph_edge_to_intraproc_superedge).get (edge));
+   }
+ 
+   cfg_superedge *get_edge_for_cfg_edge (edge e) const
+   {
+     return (*const_cast <cfg_edge_to_cfg_superedge_t &>
+ 	      (m_cfg_edge_to_cfg_superedge).get (e));
+   }
+ 
+   supernode *get_supernode_for_stmt (const gimple *stmt) const
+   {
+     return (*const_cast <stmt_to_node_t &>(m_stmt_to_node_t).get
+ 	    (const_cast <gimple *> (stmt)));
+   }
+ 
+   void dump_dot_to_pp (pretty_printer *pp, const dump_args_t &) const;
+   void dump_dot_to_file (FILE *fp, const dump_args_t &) const;
+   void dump_dot (const char *path, const dump_args_t &) const;
+ 
+   int num_nodes () const { return m_nodes.length (); }
+   int num_edges () const { return m_edges.length (); }
+ 
+   supernode *get_node_by_index (int idx) const
+   {
+     return m_nodes[idx];
+   }
+ 
+   unsigned get_num_snodes (const function *fun) const
+   {
+     function_to_num_snodes_t &map
+       = const_cast <function_to_num_snodes_t &>(m_function_to_num_snodes);
+     return *map.get (fun);
+   }
+ 
+ private:
+   supernode *add_node (function *fun, basic_block bb, gcall *returning_call,
+ 		       gimple_seq phi_nodes);
+   cfg_superedge *add_cfg_edge (supernode *src, supernode *dest, ::edge e, int idx);
+   call_superedge *add_call_superedge (supernode *src, supernode *dest,
+ 				      cgraph_edge *cedge);
+   return_superedge *add_return_superedge (supernode *src, supernode *dest,
+ 					  cgraph_edge *cedge);
+ 
+   /* Data.  */
+ 
+   typedef ordered_hash_map<basic_block, supernode *> bb_to_node_t;
+   bb_to_node_t m_bb_to_initial_node;
+   bb_to_node_t m_bb_to_final_node;
+ 
+   typedef ordered_hash_map<cgraph_edge *, supernode *> cgraph_edge_to_node_t;
+   cgraph_edge_to_node_t m_cgraph_edge_to_caller_prev_node;
+   cgraph_edge_to_node_t m_cgraph_edge_to_caller_next_node;
+ 
+   typedef ordered_hash_map< ::edge, cfg_superedge *>
+     cfg_edge_to_cfg_superedge_t;
+   cfg_edge_to_cfg_superedge_t m_cfg_edge_to_cfg_superedge;
+ 
+   typedef ordered_hash_map<cgraph_edge *, call_superedge *>
+     cgraph_edge_to_call_superedge_t;
+   cgraph_edge_to_call_superedge_t m_cgraph_edge_to_call_superedge;
+ 
+   typedef ordered_hash_map<cgraph_edge *, return_superedge *>
+     cgraph_edge_to_return_superedge_t;
+   cgraph_edge_to_return_superedge_t m_cgraph_edge_to_return_superedge;
+ 
+   typedef ordered_hash_map<cgraph_edge *, superedge *>
+     cgraph_edge_to_intraproc_superedge_t;
+   cgraph_edge_to_intraproc_superedge_t m_cgraph_edge_to_intraproc_superedge;
+ 
+   typedef ordered_hash_map<gimple *, supernode *> stmt_to_node_t;
+   stmt_to_node_t m_stmt_to_node_t;
+ 
+   typedef hash_map<const function *, unsigned> function_to_num_snodes_t;
+   function_to_num_snodes_t m_function_to_num_snodes;
+ };
+ 
+ /* A node within a supergraph.  */
+ 
+ class supernode : public dnode<supergraph_traits>
+ {
+  public:
+   supernode (function *fun, basic_block bb, gcall *returning_call,
+ 	     gimple_seq phi_nodes, int index)
+   : m_fun (fun), m_bb (bb), m_returning_call (returning_call),
+     m_phi_nodes (phi_nodes), m_index (index)
+   {}
+ 
+   function *get_function () const { return m_fun; }
+ 
+   bool entry_p () const
+   {
+     return m_bb == ENTRY_BLOCK_PTR_FOR_FN (m_fun);
+   }
+ 
+   bool return_p () const
+   {
+     return m_bb == EXIT_BLOCK_PTR_FOR_FN (m_fun);
+   }
+ 
+   void dump_dot (graphviz_out *gv, const dump_args_t &args) const OVERRIDE;
+   void dump_dot_id (pretty_printer *pp) const;
+ 
+   location_t get_start_location () const;
+   location_t get_end_location () const;
+ 
+   /* Returns iterator at the start of the list of phi nodes, if any.  */
+   gphi_iterator start_phis ()
+   {
+     gimple_seq *pseq = &m_phi_nodes;
+ 
+     /* Adapted from gsi_start_1. */
+     gphi_iterator i;
+ 
+     i.ptr = gimple_seq_first (*pseq);
+     i.seq = pseq;
+     i.bb = i.ptr ? gimple_bb (i.ptr) : NULL;
+ 
+     return i;
+   }
+ 
+   gimple *get_last_stmt () const
+   {
+     if (m_stmts.length () == 0)
+       return NULL;
+     return m_stmts[m_stmts.length () - 1];
+   }
+ 
+   gcall *get_final_call () const
+   {
+     gimple *stmt = get_last_stmt ();
+     if (stmt == NULL)
+       return NULL;
+     return dyn_cast<gcall *> (stmt);
+   }
+ 
+   unsigned int get_stmt_index (const gimple *stmt) const;
+ 
+   function * const m_fun; // alternatively could be stored as runs of indices within the supergraph
+   const basic_block m_bb;
+   gcall * const m_returning_call; // for handling the result of a returned call
+   gimple_seq m_phi_nodes; // ptr to that of the underlying BB, for the first supernode for the BB
+   auto_vec<gimple *> m_stmts;
+   const int m_index; /* unique within the supergraph as a whole.  */
+ };
+ 
+ /* An abstract base class encapsulating an edge within a supergraph.
+    Edges can be CFG edges, or calls/returns for callgraph edges.  */
+ 
+ class superedge : public dedge<supergraph_traits>
+ {
+  public:
+   virtual ~superedge () {}
+ 
+   void dump (pretty_printer *pp) const;
+   void dump () const;
+   void dump_dot (graphviz_out *gv, const dump_args_t &args) const;
+ 
+   virtual void dump_label_to_pp (pretty_printer *pp,
+ 				 bool user_facing) const = 0;
+ 
+   enum edge_kind get_kind () const { return m_kind; }
+ 
+   virtual cfg_superedge *dyn_cast_cfg_superedge () { return NULL; }
+   virtual const cfg_superedge *dyn_cast_cfg_superedge () const { return NULL; }
+   virtual const switch_cfg_superedge *dyn_cast_switch_cfg_superedge () const { return NULL; }
+   virtual callgraph_superedge *dyn_cast_callgraph_superedge () { return NULL; }
+   virtual const callgraph_superedge *dyn_cast_callgraph_superedge () const { return NULL; }
+   virtual call_superedge *dyn_cast_call_superedge () { return NULL; }
+   virtual const call_superedge *dyn_cast_call_superedge () const { return NULL; }
+   virtual return_superedge *dyn_cast_return_superedge () { return NULL; }
+   virtual const return_superedge *dyn_cast_return_superedge () const { return NULL; }
+ 
+   ::edge get_any_cfg_edge () const;
+   cgraph_edge *get_any_callgraph_edge () const;
+ 
+   char *get_description (bool user_facing) const;
+ 
+  protected:
+   superedge (supernode *src, supernode *dest, enum edge_kind kind)
+   : dedge<supergraph_traits> (src, dest),
+     m_kind (kind)
+   {}
+ 
+  public:
+   const enum edge_kind m_kind;
+ };
+ 
+ /* An ID representing an expression at a callsite:
+    either a parameter index, or the return value (or unknown).  */
+ 
+ class callsite_expr
+ {
+  public:
+   callsite_expr () : m_val (-1) {}
+ 
+   static callsite_expr from_zero_based_param (int idx)
+   {
+     return callsite_expr (idx + 1);
+   }
+ 
+   static callsite_expr from_return_value ()
+   {
+     return callsite_expr (0);
+   }
+ 
+   bool param_p () const
+   {
+     return m_val > 0;
+   }
+ 
+   bool return_value_p () const
+   {
+     return m_val == 0;
+   }
+ 
+  private:
+   callsite_expr (int val) : m_val (val) {}
+ 
+   int m_val; /* 1-based parm, 0 for return value, or -1 for "unknown".  */
+ };
+ 
+ /* A subclass of superedge with an associated callgraph edge (either a
+    call or a return).  */
+ 
+ class callgraph_superedge : public superedge
+ {
+  public:
+   callgraph_superedge (supernode *src, supernode *dst, enum edge_kind kind,
+ 		       cgraph_edge *cedge)
+   : superedge (src, dst, kind),
+     m_cedge (cedge)
+   {}
+ 
+   void dump_label_to_pp (pretty_printer *pp, bool user_facing) const
+     FINAL OVERRIDE;
+ 
+   function *get_callee_function () const;
+   function *get_caller_function () const;
+   tree get_callee_decl () const;
+   tree get_caller_decl () const;
+   gcall *get_call_stmt () const { return m_cedge->call_stmt; }
+   tree get_arg_for_parm (tree parm, callsite_expr *out) const;
+   tree get_parm_for_arg (tree arg, callsite_expr *out) const;
+   tree map_expr_from_caller_to_callee (tree caller_expr,
+ 				       callsite_expr *out) const;
+   tree map_expr_from_callee_to_caller (tree callee_expr,
+ 				       callsite_expr *out) const;
+ 
+   cgraph_edge *const m_cedge;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <const callgraph_superedge *>::test (const superedge *sedge)
+ {
+   return (sedge->get_kind () == SUPEREDGE_INTRAPROCEDURAL_CALL
+ 	  || sedge->get_kind () == SUPEREDGE_CALL
+ 	  || sedge->get_kind () == SUPEREDGE_RETURN);
+ }
+ 
+ namespace ana {
+ 
+ /* A subclass of superedge representing an interprocedural call.  */
+ 
+ class call_superedge : public callgraph_superedge
+ {
+  public:
+   call_superedge (supernode *src, supernode *dst, cgraph_edge *cedge)
+   : callgraph_superedge (src, dst, SUPEREDGE_CALL, cedge)
+   {}
+ 
+   callgraph_superedge *dyn_cast_callgraph_superedge () FINAL OVERRIDE
+   {
+     return this;
+   }
+   const callgraph_superedge *dyn_cast_callgraph_superedge () const
+     FINAL OVERRIDE
+   {
+     return this;
+   }
+ 
+   call_superedge *dyn_cast_call_superedge () FINAL OVERRIDE
+   {
+     return this;
+   }
+   const call_superedge *dyn_cast_call_superedge () const FINAL OVERRIDE
+   {
+     return this;
+   }
+ 
+   return_superedge *get_edge_for_return (const supergraph &sg) const
+   {
+     return sg.get_edge_for_return (m_cedge);
+   }
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <const call_superedge *>::test (const superedge *sedge)
+ {
+   return sedge->get_kind () == SUPEREDGE_CALL;
+ }
+ 
+ namespace ana {
+ 
+ /* A subclass of superedge represesnting an interprocedural return.  */
+ 
+ class return_superedge : public callgraph_superedge
+ {
+  public:
+   return_superedge (supernode *src, supernode *dst, cgraph_edge *cedge)
+   : callgraph_superedge (src, dst, SUPEREDGE_RETURN, cedge)
+   {}
+ 
+   callgraph_superedge *dyn_cast_callgraph_superedge () FINAL OVERRIDE
+   {
+     return this;
+   }
+   const callgraph_superedge *dyn_cast_callgraph_superedge () const
+     FINAL OVERRIDE
+   { return this; }
+ 
+   return_superedge *dyn_cast_return_superedge () FINAL OVERRIDE { return this; }
+   const return_superedge *dyn_cast_return_superedge () const FINAL OVERRIDE
+   {
+     return this;
+   }
+ 
+   call_superedge *get_edge_for_call (const supergraph &sg) const
+   {
+     return sg.get_edge_for_call (m_cedge);
+   }
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <const return_superedge *>::test (const superedge *sedge)
+ {
+   return sedge->get_kind () == SUPEREDGE_RETURN;
+ }
+ 
+ namespace ana {
+ 
+ /* A subclass of superedge that corresponds to a CFG edge.  */
+ 
+ class cfg_superedge : public superedge
+ {
+  public:
+   cfg_superedge (supernode *src, supernode *dst, ::edge e)
+   : superedge (src, dst, SUPEREDGE_CFG_EDGE),
+     m_cfg_edge (e)
+   {}
+ 
+   void dump_label_to_pp (pretty_printer *pp, bool user_facing) const OVERRIDE;
+   cfg_superedge *dyn_cast_cfg_superedge () FINAL OVERRIDE { return this; }
+   const cfg_superedge *dyn_cast_cfg_superedge () const FINAL OVERRIDE { return this; }
+ 
+   ::edge get_cfg_edge () const { return m_cfg_edge; }
+   int get_flags () const { return m_cfg_edge->flags; }
+   int true_value_p () const { return get_flags () & EDGE_TRUE_VALUE; }
+   int false_value_p () const { return get_flags () & EDGE_FALSE_VALUE; }
+   int back_edge_p () const { return get_flags () & EDGE_DFS_BACK; }
+ 
+   tree get_phi_arg (const gphi *phi) const;
+ 
+  private:
+   const ::edge m_cfg_edge;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <const cfg_superedge *>::test (const superedge *sedge)
+ {
+   return sedge->get_kind () == SUPEREDGE_CFG_EDGE;
+ }
+ 
+ namespace ana {
+ 
+ /* A subclass for edges from switch statements, retaining enough
+    information to identify the pertinent case, and for adding labels
+    when rendering via graphviz.  */
+ 
+ class switch_cfg_superedge : public cfg_superedge {
+  public:
+   switch_cfg_superedge (supernode *src, supernode *dst, ::edge e, int idx)
+   : cfg_superedge (src, dst, e),
+     m_idx (idx)
+   {}
+ 
+   const switch_cfg_superedge *dyn_cast_switch_cfg_superedge () const
+     FINAL OVERRIDE
+   {
+     return this;
+   }
+ 
+   void dump_label_to_pp (pretty_printer *pp, bool user_facing) const
+     FINAL OVERRIDE;
+ 
+   gswitch *get_switch_stmt () const
+   {
+     return as_a <gswitch *> (m_src->get_last_stmt ());
+   }
+ 
+   tree get_case_label () const;
+ 
+  private:
+   const int m_idx;
+ };
+ 
+ } // namespace ana
+ 
+ template <>
+ template <>
+ inline bool
+ is_a_helper <const switch_cfg_superedge *>::test (const superedge *sedge)
+ {
+   return sedge->dyn_cast_switch_cfg_superedge () != NULL;
+ }
+ 
+ namespace ana {
+ 
+ /* Base class for adding additional content to the .dot output
+    for a supergraph.  */
+ 
+ class dot_annotator
+ {
+  public:
+   virtual ~dot_annotator () {}
+   virtual bool add_node_annotations (graphviz_out *gv ATTRIBUTE_UNUSED,
+ 				     const supernode &n ATTRIBUTE_UNUSED,
+ 				     bool within_table ATTRIBUTE_UNUSED)
+     const
+   {
+     return false;
+   }
+   virtual void add_stmt_annotations (graphviz_out *gv ATTRIBUTE_UNUSED,
+ 				     const gimple *stmt ATTRIBUTE_UNUSED,
+ 				     bool within_row ATTRIBUTE_UNUSED)
+     const {}
+   virtual bool add_after_node_annotations (graphviz_out *gv ATTRIBUTE_UNUSED,
+ 					   const supernode &n ATTRIBUTE_UNUSED)
+     const
+   {
+     return false;
+   }
+ };
+ 
+ extern cgraph_edge *supergraph_call_edge (function *fun, gimple *stmt);
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_SUPERGRAPH_H */
diff -Nrcpad gcc-9.3.0/gcc/array-traits.h gcc-10.1.0/gcc/array-traits.h
*** gcc-9.3.0/gcc/array-traits.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/array-traits.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,48 ----
+ /* Descriptions of array-like objects.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3, or (at your option) any later
+ version.
+ 
+ GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ARRAY_TRAITS_H
+ #define GCC_ARRAY_TRAITS_H
+ 
+ /* Implementation for single integers (and similar types).  */
+ template<typename T, T zero = T (0)>
+ struct scalar_array_traits
+ {
+   typedef T element_type;
+   static const bool has_constant_size = true;
+   static const size_t constant_size = 1;
+   static const T *base (const T &x) { return &x; }
+   static size_t size (const T &) { return 1; }
+ };
+ 
+ template<typename T>
+ struct array_traits : scalar_array_traits<T> {};
+ 
+ /* Implementation for arrays with a static size.  */
+ template<typename T, size_t N>
+ struct array_traits<T[N]>
+ {
+   typedef T element_type;
+   static const bool has_constant_size = true;
+   static const size_t constant_size = N;
+   static const T *base (const T (&x)[N]) { return x; }
+   static size_t size (const T (&)[N]) { return N; }
+ };
+ 
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/asan.c gcc-10.1.0/gcc/asan.c
*** gcc-9.3.0/gcc/asan.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/asan.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* AddressSanitizer, a fast memory error detector.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by Kostya Serebryany <kcc@google.com>
  
  This file is part of GCC.
--- 1,5 ----
  /* AddressSanitizer, a fast memory error detector.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by Kostya Serebryany <kcc@google.com>
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 59,68 ****
  #include "gimple-builder.h"
  #include "gimple-fold.h"
  #include "ubsan.h"
- #include "params.h"
  #include "builtins.h"
  #include "fnmatch.h"
  #include "tree-inline.h"
  
  /* AddressSanitizer finds out-of-bounds and use-after-free bugs
     with <2x slowdown on average.
--- 59,68 ----
  #include "gimple-builder.h"
  #include "gimple-fold.h"
  #include "ubsan.h"
  #include "builtins.h"
  #include "fnmatch.h"
  #include "tree-inline.h"
+ #include "tree-ssa.h"
  
  /* AddressSanitizer finds out-of-bounds and use-after-free bugs
     with <2x slowdown on average.
*************** asan_mark_p (gimple *stmt, enum asan_mar
*** 309,321 ****
  bool
  asan_sanitize_stack_p (void)
  {
!   return (sanitize_flags_p (SANITIZE_ADDRESS) && ASAN_STACK);
  }
  
  bool
  asan_sanitize_allocas_p (void)
  {
!   return (asan_sanitize_stack_p () && ASAN_PROTECT_ALLOCAS);
  }
  
  /* Checks whether section SEC should be sanitized.  */
--- 309,321 ----
  bool
  asan_sanitize_stack_p (void)
  {
!   return (sanitize_flags_p (SANITIZE_ADDRESS) && param_asan_stack);
  }
  
  bool
  asan_sanitize_allocas_p (void)
  {
!   return (asan_sanitize_stack_p () && param_asan_protect_allocas);
  }
  
  /* Checks whether section SEC should be sanitized.  */
*************** get_mem_refs_of_builtin_call (gcall *cal
*** 795,801 ****
        handle_builtin_alloca (call, iter);
        break;
      /* And now the __atomic* and __sync builtins.
!        These are handled differently from the classical memory memory
         access builtins above.  */
  
      case BUILT_IN_ATOMIC_LOAD_1:
--- 795,801 ----
        handle_builtin_alloca (call, iter);
        break;
      /* And now the __atomic* and __sync builtins.
!        These are handled differently from the classical memory
         access builtins above.  */
  
      case BUILT_IN_ATOMIC_LOAD_1:
*************** shadow_mem_size (unsigned HOST_WIDE_INT
*** 1225,1232 ****
  #define RZ_BUFFER_SIZE 4
  
  /* ASAN redzone buffer container that handles emission of shadow bytes.  */
! struct asan_redzone_buffer
  {
    /* Constructor.  */
    asan_redzone_buffer (rtx shadow_mem, HOST_WIDE_INT prev_offset):
      m_shadow_mem (shadow_mem), m_prev_offset (prev_offset),
--- 1225,1233 ----
  #define RZ_BUFFER_SIZE 4
  
  /* ASAN redzone buffer container that handles emission of shadow bytes.  */
! class asan_redzone_buffer
  {
+ public:
    /* Constructor.  */
    asan_redzone_buffer (rtx shadow_mem, HOST_WIDE_INT prev_offset):
      m_shadow_mem (shadow_mem), m_prev_offset (prev_offset),
*************** asan_emit_stack_protection (rtx base, rt
*** 1428,1434 ****
  
    /* Emit the prologue sequence.  */
    if (asan_frame_size > 32 && asan_frame_size <= 65536 && pbase
!       && ASAN_USE_AFTER_RETURN)
      {
        use_after_return_class = floor_log2 (asan_frame_size - 1) - 5;
        /* __asan_stack_malloc_N guarantees alignment
--- 1429,1435 ----
  
    /* Emit the prologue sequence.  */
    if (asan_frame_size > 32 && asan_frame_size <= 65536 && pbase
!       && param_asan_use_after_return)
      {
        use_after_return_class = floor_log2 (asan_frame_size - 1) - 5;
        /* __asan_stack_malloc_N guarantees alignment
*************** asan_emit_allocas_unpoison (rtx top, rtx
*** 1713,1720 ****
    rtx ret = init_one_libfunc ("__asan_allocas_unpoison");
    top = convert_memory_address (ptr_mode, top);
    bot = convert_memory_address (ptr_mode, bot);
!   ret = emit_library_call_value (ret, NULL_RTX, LCT_NORMAL, ptr_mode,
! 				 top, ptr_mode, bot, ptr_mode);
  
    do_pending_stack_adjust ();
    rtx_insn *insns = get_insns ();
--- 1714,1721 ----
    rtx ret = init_one_libfunc ("__asan_allocas_unpoison");
    top = convert_memory_address (ptr_mode, top);
    bot = convert_memory_address (ptr_mode, bot);
!   emit_library_call (ret, LCT_NORMAL, ptr_mode,
! 		     top, ptr_mode, bot, ptr_mode);
  
    do_pending_stack_adjust ();
    rtx_insn *insns = get_insns ();
*************** is_odr_indicator (tree decl)
*** 1749,1755 ****
  bool
  asan_protect_global (tree decl, bool ignore_decl_rtl_set_p)
  {
!   if (!ASAN_GLOBALS)
      return false;
  
    rtx rtl, symbol;
--- 1750,1756 ----
  bool
  asan_protect_global (tree decl, bool ignore_decl_rtl_set_p)
  {
!   if (!param_asan_globals)
      return false;
  
    rtx rtl, symbol;
*************** static tree
*** 2061,2070 ****
  maybe_create_ssa_name (location_t loc, tree base, gimple_stmt_iterator *iter,
  		       bool before_p)
  {
    if (TREE_CODE (base) == SSA_NAME)
      return base;
!   gimple *g = gimple_build_assign (make_ssa_name (TREE_TYPE (base)),
! 				  TREE_CODE (base), base);
    gimple_set_location (g, loc);
    if (before_p)
      gsi_insert_before (iter, g, GSI_SAME_STMT);
--- 2062,2071 ----
  maybe_create_ssa_name (location_t loc, tree base, gimple_stmt_iterator *iter,
  		       bool before_p)
  {
+   STRIP_USELESS_TYPE_CONVERSION (base);
    if (TREE_CODE (base) == SSA_NAME)
      return base;
!   gimple *g = gimple_build_assign (make_ssa_name (TREE_TYPE (base)), base);
    gimple_set_location (g, loc);
    if (before_p)
      gsi_insert_before (iter, g, GSI_SAME_STMT);
*************** static void
*** 2189,2197 ****
  instrument_derefs (gimple_stmt_iterator *iter, tree t,
  		   location_t location, bool is_store)
  {
!   if (is_store && !ASAN_INSTRUMENT_WRITES)
      return;
!   if (!is_store && !ASAN_INSTRUMENT_READS)
      return;
  
    tree type, base;
--- 2190,2198 ----
  instrument_derefs (gimple_stmt_iterator *iter, tree t,
  		   location_t location, bool is_store)
  {
!   if (is_store && !param_asan_instrument_writes)
      return;
!   if (!is_store && !param_asan_instrument_reads)
      return;
  
    tree type, base;
*************** instrument_derefs (gimple_stmt_iterator
*** 2252,2258 ****
      {
        if (DECL_THREAD_LOCAL_P (inner))
  	return;
!       if (!ASAN_GLOBALS && is_global_var (inner))
          return;
        if (!TREE_STATIC (inner))
  	{
--- 2253,2259 ----
      {
        if (DECL_THREAD_LOCAL_P (inner))
  	return;
!       if (!param_asan_globals && is_global_var (inner))
          return;
        if (!TREE_STATIC (inner))
  	{
*************** instrument_mem_region_access (tree base,
*** 2345,2351 ****
  static bool
  instrument_builtin_call (gimple_stmt_iterator *iter)
  {
!   if (!ASAN_MEMINTRIN)
      return false;
  
    bool iter_advanced_p = false;
--- 2346,2352 ----
  static bool
  instrument_builtin_call (gimple_stmt_iterator *iter)
  {
!   if (!param_asan_memintrin)
      return false;
  
    bool iter_advanced_p = false;
*************** asan_global_struct (void)
*** 2660,2665 ****
--- 2661,2667 ----
    TYPE_FIELDS (ret) = fields[0];
    TYPE_NAME (ret) = type_decl;
    TYPE_STUB_DECL (ret) = type_decl;
+   TYPE_ARTIFICIAL (ret) = 1;
    layout_type (ret);
    return ret;
  }
*************** asan_expand_mark_ifn (gimple_stmt_iterat
*** 3218,3224 ****
    tree base_addr = gimple_assign_lhs (g);
  
    /* Generate direct emission if size_in_bytes is small.  */
!   if (size_in_bytes <= ASAN_PARAM_USE_AFTER_SCOPE_DIRECT_EMISSION_THRESHOLD)
      {
        const unsigned HOST_WIDE_INT shadow_size
  	= shadow_mem_size (size_in_bytes);
--- 3220,3227 ----
    tree base_addr = gimple_assign_lhs (g);
  
    /* Generate direct emission if size_in_bytes is small.  */
!   if (size_in_bytes
!       <= (unsigned)param_use_after_scope_direct_emission_threshold)
      {
        const unsigned HOST_WIDE_INT shadow_size
  	= shadow_mem_size (size_in_bytes);
diff -Nrcpad gcc-9.3.0/gcc/asan.h gcc-10.1.0/gcc/asan.h
*** gcc-9.3.0/gcc/asan.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/asan.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* AddressSanitizer, a fast memory error detector.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by Kostya Serebryany <kcc@google.com>
  
  This file is part of GCC.
--- 1,5 ----
  /* AddressSanitizer, a fast memory error detector.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by Kostya Serebryany <kcc@google.com>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/attribs.c gcc-10.1.0/gcc/attribs.c
*** gcc-9.3.0/gcc/attribs.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/attribs.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Functions dealing with attribute handling, used by most front ends.
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Functions dealing with attribute handling, used by most front ends.
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** lookup_attribute_spec (const_tree name)
*** 340,346 ****
     Please read the comments of cxx11_attribute_p to understand the
     format of attributes.  */
  
! static tree
  get_attribute_namespace (const_tree attr)
  {
    if (cxx11_attribute_p (attr))
--- 340,346 ----
     Please read the comments of cxx11_attribute_p to understand the
     format of attributes.  */
  
! tree
  get_attribute_namespace (const_tree attr)
  {
    if (cxx11_attribute_p (attr))
*************** tree
*** 469,475 ****
  decl_attributes (tree *node, tree attributes, int flags,
  		 tree last_decl /* = NULL_TREE */)
  {
-   tree a;
    tree returned_attrs = NULL_TREE;
  
    if (TREE_TYPE (*node) == error_mark_node || attributes == error_mark_node)
--- 469,474 ----
*************** decl_attributes (tree *node, tree attrib
*** 548,569 ****
  
    /* Note that attributes on the same declaration are not necessarily
       in the same order as in the source.  */
!   for (a = attributes; a; a = TREE_CHAIN (a))
      {
!       tree ns = get_attribute_namespace (a);
!       tree name = get_attribute_name (a);
!       tree args = TREE_VALUE (a);
        tree *anode = node;
        const struct attribute_spec *spec
  	= lookup_scoped_attribute_spec (ns, name);
        int fn_ptr_quals = 0;
        tree fn_ptr_tmp = NULL_TREE;
  
        if (spec == NULL)
  	{
  	  if (!(flags & (int) ATTR_FLAG_BUILT_IN))
  	    {
! 	      if (ns == NULL_TREE || !cxx11_attribute_p (a))
  		warning (OPT_Wattributes, "%qE attribute directive ignored",
  			 name);
  	      else
--- 547,569 ----
  
    /* Note that attributes on the same declaration are not necessarily
       in the same order as in the source.  */
!   for (tree attr = attributes; attr; attr = TREE_CHAIN (attr))
      {
!       tree ns = get_attribute_namespace (attr);
!       tree name = get_attribute_name (attr);
!       tree args = TREE_VALUE (attr);
        tree *anode = node;
        const struct attribute_spec *spec
  	= lookup_scoped_attribute_spec (ns, name);
        int fn_ptr_quals = 0;
        tree fn_ptr_tmp = NULL_TREE;
+       const bool cxx11_attr_p = cxx11_attribute_p (attr);
  
        if (spec == NULL)
  	{
  	  if (!(flags & (int) ATTR_FLAG_BUILT_IN))
  	    {
! 	      if (ns == NULL_TREE || !cxx11_attr_p)
  		warning (OPT_Wattributes, "%qE attribute directive ignored",
  			 name);
  	      else
*************** decl_attributes (tree *node, tree attrib
*** 573,603 ****
  	    }
  	  continue;
  	}
!       else if (list_length (args) < spec->min_length
! 	       || (spec->max_length >= 0
! 		   && list_length (args) > spec->max_length))
  	{
! 	  error ("wrong number of arguments specified for %qE attribute",
! 		 name);
! 	  continue;
  	}
        gcc_assert (is_attribute_p (spec->name, name));
  
-       if (TYPE_P (*node)
- 	  && cxx11_attribute_p (a)
- 	  && !(flags & ATTR_FLAG_TYPE_IN_PLACE))
- 	{
- 	  /* This is a c++11 attribute that appertains to a
- 	     type-specifier, outside of the definition of, a class
- 	     type.  Ignore it.  */
- 	  auto_diagnostic_group d;
- 	  if (warning (OPT_Wattributes, "attribute ignored"))
- 	    inform (input_location,
- 		    "an attribute that appertains to a type-specifier "
- 		    "is ignored");
- 	  continue;
- 	}
- 
        if (spec->decl_required && !DECL_P (*anode))
  	{
  	  if (flags & ((int) ATTR_FLAG_DECL_NEXT
--- 573,598 ----
  	    }
  	  continue;
  	}
!       else
  	{
! 	  int nargs = list_length (args);
! 	  if (nargs < spec->min_length
! 	      || (spec->max_length >= 0
! 		  && nargs > spec->max_length))
! 	    {
! 	      error ("wrong number of arguments specified for %qE attribute",
! 		     name);
! 	      if (spec->max_length < 0)
! 		inform (input_location, "expected %i or more, found %i",
! 			spec->min_length, nargs);
! 	      else
! 		inform (input_location, "expected between %i and %i, found %i",
! 			spec->min_length, spec->max_length, nargs);
! 	      continue;
! 	    }
  	}
        gcc_assert (is_attribute_p (spec->name, name));
  
        if (spec->decl_required && !DECL_P (*anode))
  	{
  	  if (flags & ((int) ATTR_FLAG_DECL_NEXT
*************** decl_attributes (tree *node, tree attrib
*** 682,688 ****
  	 reject incompatible attributes.  */
        bool built_in = flags & ATTR_FLAG_BUILT_IN;
        if (spec->exclude
! 	  && (flag_checking || !built_in))
  	{
  	  /* Always check attributes on user-defined functions.
  	     Check them on built-ins only when -fchecking is set.
--- 677,684 ----
  	 reject incompatible attributes.  */
        bool built_in = flags & ATTR_FLAG_BUILT_IN;
        if (spec->exclude
! 	  && (flag_checking || !built_in)
! 	  && !error_operand_p (last_decl))
  	{
  	  /* Always check attributes on user-defined functions.
  	     Check them on built-ins only when -fchecking is set.
*************** decl_attributes (tree *node, tree attrib
*** 691,696 ****
--- 687,693 ----
  
  	  if (!built_in
  	      || !DECL_P (*anode)
+ 	      || DECL_BUILT_IN_CLASS (*anode) != BUILT_IN_NORMAL
  	      || (DECL_FUNCTION_CODE (*anode) != BUILT_IN_UNREACHABLE
  		  && (DECL_FUNCTION_CODE (*anode)
  		      != BUILT_IN_UBSAN_HANDLE_BUILTIN_UNREACHABLE)))
*************** decl_attributes (tree *node, tree attrib
*** 707,714 ****
  
        if (spec->handler != NULL)
  	{
! 	  int cxx11_flag =
! 	    cxx11_attribute_p (a) ? ATTR_FLAG_CXX11 : 0;
  
  	  /* Pass in an array of the current declaration followed
  	     by the last pushed/merged declaration if  one exists.
--- 704,710 ----
  
        if (spec->handler != NULL)
  	{
! 	  int cxx11_flag = (cxx11_attr_p ? ATTR_FLAG_CXX11 : 0);
  
  	  /* Pass in an array of the current declaration followed
  	     by the last pushed/merged declaration if  one exists.
*************** decl_attributes (tree *node, tree attrib
*** 756,772 ****
  	  if (a == NULL_TREE)
  	    {
  	      /* This attribute isn't already in the list.  */
  	      if (DECL_P (*anode))
! 		DECL_ATTRIBUTES (*anode) = tree_cons (name, args, old_attrs);
  	      else if (flags & (int) ATTR_FLAG_TYPE_IN_PLACE)
  		{
! 		  TYPE_ATTRIBUTES (*anode) = tree_cons (name, args, old_attrs);
  		  /* If this is the main variant, also push the attributes
  		     out to the other variants.  */
  		  if (*anode == TYPE_MAIN_VARIANT (*anode))
  		    {
! 		      tree variant;
! 		      for (variant = *anode; variant;
  			   variant = TYPE_NEXT_VARIANT (variant))
  			{
  			  if (TYPE_ATTRIBUTES (variant) == old_attrs)
--- 752,774 ----
  	  if (a == NULL_TREE)
  	    {
  	      /* This attribute isn't already in the list.  */
+ 	      tree r;
+ 	      /* Preserve the C++11 form.  */
+ 	      if (cxx11_attr_p)
+ 		r = tree_cons (build_tree_list (ns, name), args, old_attrs);
+ 	      else
+ 		r = tree_cons (name, args, old_attrs);
+ 
  	      if (DECL_P (*anode))
! 		DECL_ATTRIBUTES (*anode) = r;
  	      else if (flags & (int) ATTR_FLAG_TYPE_IN_PLACE)
  		{
! 		  TYPE_ATTRIBUTES (*anode) = r;
  		  /* If this is the main variant, also push the attributes
  		     out to the other variants.  */
  		  if (*anode == TYPE_MAIN_VARIANT (*anode))
  		    {
! 		      for (tree variant = *anode; variant;
  			   variant = TYPE_NEXT_VARIANT (variant))
  			{
  			  if (TYPE_ATTRIBUTES (variant) == old_attrs)
*************** decl_attributes (tree *node, tree attrib
*** 780,788 ****
  		    }
  		}
  	      else
! 		*anode = build_type_attribute_variant (*anode,
! 						       tree_cons (name, args,
! 								  old_attrs));
  	    }
  	}
  
--- 782,788 ----
  		    }
  		}
  	      else
! 		*anode = build_type_attribute_variant (*anode, r);
  	    }
  	}
  
*************** decls_mismatched_attributes (tree tmpl,
*** 1928,1942 ****
  	  if (!has_attribute (tmpls[j], tmpl_attrs[j], blacklist[i]))
  	    continue;
  
  	  unsigned kmax = 1 + !!decl_attrs[1];
  	  for (unsigned k = 0; k != kmax; ++k)
  	    {
  	      if (has_attribute (decls[k], decl_attrs[k], blacklist[i]))
! 		break;
! 
! 	      if (!k && kmax > 1)
! 		continue;
  
  	      if (nattrs)
  		pp_string (attrstr, ", ");
  	      pp_begin_quote (attrstr, pp_show_color (global_dc->printer));
--- 1928,1946 ----
  	  if (!has_attribute (tmpls[j], tmpl_attrs[j], blacklist[i]))
  	    continue;
  
+ 	  bool found = false;
  	  unsigned kmax = 1 + !!decl_attrs[1];
  	  for (unsigned k = 0; k != kmax; ++k)
  	    {
  	      if (has_attribute (decls[k], decl_attrs[k], blacklist[i]))
! 		{
! 		  found = true;
! 		  break;
! 		}
! 	    }
  
+ 	  if (!found)
+ 	    {
  	      if (nattrs)
  		pp_string (attrstr, ", ");
  	      pp_begin_quote (attrstr, pp_show_color (global_dc->printer));
*************** decls_mismatched_attributes (tree tmpl,
*** 1944,1949 ****
--- 1948,1955 ----
  	      pp_end_quote (attrstr, pp_show_color (global_dc->printer));
  	      ++nattrs;
  	    }
+ 
+ 	  break;
  	}
      }
  
*************** struct excl_hash_traits: typed_noop_remo
*** 2043,2048 ****
--- 2049,2056 ----
      x = value_type (NULL, NULL);
    }
  
+   static const bool empty_zero_p = false;
+ 
    static void mark_empty (value_type &x)
    {
      x = value_type ("", "");
diff -Nrcpad gcc-9.3.0/gcc/attribs.h gcc-10.1.0/gcc/attribs.h
*** gcc-9.3.0/gcc/attribs.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/attribs.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Declarations and definitions dealing with attribute handling.
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Declarations and definitions dealing with attribute handling.
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** extern tree decl_attributes (tree *, tre
*** 35,40 ****
--- 35,41 ----
  
  extern bool cxx11_attribute_p (const_tree);
  extern tree get_attribute_name (const_tree);
+ extern tree get_attribute_namespace (const_tree);
  extern void apply_tm_attr (tree, tree);
  extern tree make_attribute (const char *, const char *, tree);
  
*************** lookup_attribute_by_prefix (const char *
*** 217,220 ****
--- 218,241 ----
      }
  }
  
+ /* Description of a function argument declared with attribute access.
+    Used as an "iterator" over all such arguments in a function declaration
+    or call.  */
+ 
+ struct attr_access
+ {
+   /* The attribute pointer argument.  */
+   tree ptr;
+   /* The size of the pointed-to object or NULL when not specified.  */
+   tree size;
+ 
+   /* The zero-based number of each of the formal function arguments.  */
+   unsigned ptrarg;
+   unsigned sizarg;
+ 
+   /* The access mode.  */
+   enum access_mode { read_only, write_only, read_write };
+   access_mode mode;
+ };
+ 
  #endif // GCC_ATTRIBS_H
diff -Nrcpad gcc-9.3.0/gcc/auto-inc-dec.c gcc-10.1.0/gcc/auto-inc-dec.c
*** gcc-9.3.0/gcc/auto-inc-dec.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/auto-inc-dec.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Discovery of auto-inc and auto-dec instructions.
!    Copyright (C) 2006-2019 Free Software Foundation, Inc.
     Contributed by Kenneth Zadeck <zadeck@naturalbridge.com>
  
  This file is part of GCC.
--- 1,5 ----
  /* Discovery of auto-inc and auto-dec instructions.
!    Copyright (C) 2006-2020 Free Software Foundation, Inc.
     Contributed by Kenneth Zadeck <zadeck@naturalbridge.com>
  
  This file is part of GCC.
*************** merge_in_block (int max_reg, basic_block
*** 1441,1450 ****
  	  continue;
  	}
  
!       /* This continue is deliberate.  We do not want the uses of the
! 	 jump put into reg_next_use because it is not considered safe to
! 	 combine a preincrement with a jump.  */
!       if (JUMP_P (insn))
  	continue;
  
        if (dump_file)
--- 1441,1449 ----
  	  continue;
  	}
  
!       /* Reload should handle auto-inc within a jump correctly, while LRA
! 	 is known to have issues with autoinc.  */
!       if (JUMP_P (insn) && targetm.lra_p ())
  	continue;
  
        if (dump_file)
*************** merge_in_block (int max_reg, basic_block
*** 1603,1611 ****
        else
  	{
  	  insn_is_add_or_inc = false;
! 	  mem_insn.insn = insn;
! 	  if (find_mem (&PATTERN (insn)))
! 	    success_in_block++;
  	}
  
        /* If the inc insn was merged with a mem, the inc insn is gone
--- 1602,1616 ----
        else
  	{
  	  insn_is_add_or_inc = false;
! 	  /* We can't use auto inc/dec for bare USEs and CLOBBERs,
! 	     since they aren't supposed to generate any code.  */
! 	  rtx_code code = GET_CODE (PATTERN (insn));
! 	  if (code != USE && code != CLOBBER)
! 	    {
! 	      mem_insn.insn = insn;
! 	      if (find_mem (&PATTERN (insn)))
! 		success_in_block++;
! 	    }
  	}
  
        /* If the inc insn was merged with a mem, the inc insn is gone
diff -Nrcpad gcc-9.3.0/gcc/auto-profile.c gcc-10.1.0/gcc/auto-profile.c
*** gcc-9.3.0/gcc/auto-profile.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/auto-profile.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Read and annotate call graph profile from the auto profile data file.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
     Contributed by Dehao Chen (dehao@google.com)
  
  This file is part of GCC.
--- 1,5 ----
  /* Read and annotate call graph profile from the auto profile data file.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
     Contributed by Dehao Chen (dehao@google.com)
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 41,47 ****
  #include "tree-into-ssa.h"
  #include "gimple-iterator.h"
  #include "value-prof.h"
- #include "params.h"
  #include "symbol-summary.h"
  #include "ipa-prop.h"
  #include "ipa-fnsummary.h"
--- 41,46 ----
*************** namespace autofdo
*** 104,110 ****
  /* Intermediate edge info used when propagating AutoFDO profile information.
     We can't edge->count() directly since it's computed from edge's probability
     while probability is yet not decided during propagation.  */
! #define AFDO_EINFO(e)                     ((struct edge_info *) e->aux)
  class edge_info
  {
  public:
--- 103,109 ----
  /* Intermediate edge info used when propagating AutoFDO profile information.
     We can't edge->count() directly since it's computed from edge's probability
     while probability is yet not decided during propagation.  */
! #define AFDO_EINFO(e)                     ((class edge_info *) e->aux)
  class edge_info
  {
  public:
*************** typedef std::map<unsigned, gcov_type> ic
*** 136,143 ****
  typedef std::set<gimple *> stmt_set;
  
  /* Represent count info of an inline stack.  */
! struct count_info
  {
    /* Sampled count of the inline stack.  */
    gcov_type count;
  
--- 135,143 ----
  typedef std::set<gimple *> stmt_set;
  
  /* Represent count info of an inline stack.  */
! class count_info
  {
+ public:
    /* Sampled count of the inline stack.  */
    gcov_type count;
  
*************** function_instance::find_icall_target_map
*** 605,612 ****
            get_identifier (afdo_string_table->get_name (callee)));
        if (node == NULL)
          continue;
-       if (!check_ic_target (stmt, node))
-         continue;
        (*map)[callee] = iter->second->total_count ();
        ret += iter->second->total_count ();
      }
--- 605,610 ----
*************** afdo_indirect_call (gimple_stmt_iterator
*** 1033,1039 ****
        print_generic_expr (dump_file, direct_call->decl, TDF_SLIM);
      }
  
!   if (direct_call == NULL || !check_ic_target (stmt, direct_call))
      {
        if (dump_file)
          fprintf (dump_file, " not transforming\n");
--- 1031,1037 ----
        print_generic_expr (dump_file, direct_call->decl, TDF_SLIM);
      }
  
!   if (direct_call == NULL)
      {
        if (dump_file)
          fprintf (dump_file, " not transforming\n");
*************** afdo_indirect_call (gimple_stmt_iterator
*** 1057,1063 ****
    struct cgraph_edge *new_edge
        = indirect_edge->make_speculative (direct_call,
  					 profile_count::uninitialized ());
!   new_edge->redirect_call_stmt_to_callee ();
    gimple_remove_histogram_value (cfun, stmt, hist);
    inline_call (new_edge, true, NULL, NULL, false);
  }
--- 1055,1061 ----
    struct cgraph_edge *new_edge
        = indirect_edge->make_speculative (direct_call,
  					 profile_count::uninitialized ());
!   cgraph_edge::redirect_call_stmt_to_callee (new_edge);
    gimple_remove_histogram_value (cfun, stmt, hist);
    inline_call (new_edge, true, NULL, NULL, false);
  }
*************** auto_profile (void)
*** 1630,1636 ****
         function before annotation, so the profile inside bar@loc_foo2
         will be useful.  */
      autofdo::stmt_set promoted_stmts;
!     for (int i = 0; i < PARAM_VALUE (PARAM_EARLY_INLINER_MAX_ITERATIONS); i++)
        {
          if (!flag_value_profile_transformations
              || !autofdo::afdo_vpt_for_early_inline (&promoted_stmts))
--- 1628,1635 ----
         function before annotation, so the profile inside bar@loc_foo2
         will be useful.  */
      autofdo::stmt_set promoted_stmts;
!     for (int i = 0; i < opt_for_fn (node->decl,
! 				    param_early_inliner_max_iterations); i++)
        {
          if (!flag_value_profile_transformations
              || !autofdo::afdo_vpt_for_early_inline (&promoted_stmts))
diff -Nrcpad gcc-9.3.0/gcc/auto-profile.h gcc-10.1.0/gcc/auto-profile.h
*** gcc-9.3.0/gcc/auto-profile.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/auto-profile.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* auto-profile.h - Defines data exported from auto-profile.c
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
     Contributed by Dehao Chen (dehao@google.com)
  
  This file is part of GCC.
--- 1,5 ----
  /* auto-profile.h - Defines data exported from auto-profile.c
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
     Contributed by Dehao Chen (dehao@google.com)
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/backend.h gcc-10.1.0/gcc/backend.h
*** gcc-9.3.0/gcc/backend.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/backend.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Common Backend requirements. 
  
!    Copyright (C) 2015-2019 Free Software Foundation, Inc.
     Contributed by Andrew MacLeod <amacleod@redhat.com>
  
  This file is part of GCC.
--- 1,6 ----
  /* Common Backend requirements. 
  
!    Copyright (C) 2015-2020 Free Software Foundation, Inc.
     Contributed by Andrew MacLeod <amacleod@redhat.com>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/basic-block.h gcc-10.1.0/gcc/basic-block.h
*** gcc-9.3.0/gcc/basic-block.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/basic-block.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Define control flow data structures for the CFG.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Define control flow data structures for the CFG.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 23,29 ****
  #include <profile-count.h>
  
  /* Control flow edge information.  */
! struct GTY((user)) edge_def {
    /* The two blocks at the ends of the edge.  */
    basic_block src;
    basic_block dest;
--- 23,30 ----
  #include <profile-count.h>
  
  /* Control flow edge information.  */
! class GTY((user)) edge_def {
! public:
    /* The two blocks at the ends of the edge.  */
    basic_block src;
    basic_block dest;
*************** struct GTY((chain_next ("%h.next_bb"), c
*** 122,128 ****
    PTR GTY ((skip (""))) aux;
  
    /* Innermost loop containing the block.  */
!   struct loop *loop_father;
  
    /* The dominance and postdominance information node.  */
    struct et_node * GTY ((skip (""))) dom[2];
--- 123,129 ----
    PTR GTY ((skip (""))) aux;
  
    /* Innermost loop containing the block.  */
!   class loop *loop_father;
  
    /* The dominance and postdominance information node.  */
    struct et_node * GTY ((skip (""))) dom[2];
*************** ei_cond (edge_iterator ei, edge *p)
*** 507,512 ****
--- 508,515 ----
  #define CLEANUP_CFGLAYOUT	32	/* Do cleanup in cfglayout mode.  */
  #define CLEANUP_CFG_CHANGED	64      /* The caller changed the CFG.  */
  #define CLEANUP_NO_PARTITIONING	128     /* Do not try to fix partitions.  */
+ #define CLEANUP_FORCE_FAST_DCE	0x100	/* Force run_fast_dce to be called
+ 					   at least once.  */
  
  /* Return true if BB is in a transaction.  */
  
diff -Nrcpad gcc-9.3.0/gcc/bb-reorder.c gcc-10.1.0/gcc/bb-reorder.c
*** gcc-9.3.0/gcc/bb-reorder.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/bb-reorder.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Basic block reordering routines for the GNU compiler.
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Basic block reordering routines for the GNU compiler.
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
***************
*** 105,111 ****
  #include "emit-rtl.h"
  #include "output.h"
  #include "expr.h"
- #include "params.h"
  #include "tree-pass.h"
  #include "cfgrtl.h"
  #include "cfganal.h"
--- 105,110 ----
***************
*** 113,118 ****
--- 112,118 ----
  #include "cfgcleanup.h"
  #include "bb-reorder.h"
  #include "except.h"
+ #include "alloc-pool.h"
  #include "fibonacci_heap.h"
  #include "stringpool.h"
  #include "attribs.h"
*************** find_traces_1_round (int branch_th, prof
*** 592,598 ****
  	  /* If the best destination has multiple successors or predecessors,
  	     don't allow it to be added when optimizing for size.  This makes
  	     sure predecessors with smaller index are handled before the best
! 	     destinarion.  It breaks long trace and reduces long jumps.
  
  	     Take if-then-else as an example.
  		A
--- 592,598 ----
  	  /* If the best destination has multiple successors or predecessors,
  	     don't allow it to be added when optimizing for size.  This makes
  	     sure predecessors with smaller index are handled before the best
! 	     destination.  It breaks long trace and reduces long jumps.
  
  	     Take if-then-else as an example.
  		A
*************** connect_better_edge_p (const_edge e, boo
*** 1023,1030 ****
        e_index = e->src->index;
  
        /* We are looking for predecessor, so probabilities are not that
! 	 informative.  We do not want to connect A to B becuse A has
! 	 only one sucessor (probablity is 100%) while there is edge
  	 A' to B where probability is 90% but which is much more frequent.  */
        if (e->count () > cur_best_edge->count ())
  	/* The edge has higher probability than the temporary best edge.  */
--- 1023,1030 ----
        e_index = e->src->index;
  
        /* We are looking for predecessor, so probabilities are not that
! 	 informative.  We do not want to connect A to B because A has
! 	 only one successor (probability is 100%) while there is edge
  	 A' to B where probability is 90% but which is much more frequent.  */
        if (e->count () > cur_best_edge->count ())
  	/* The edge has higher probability than the temporary best edge.  */
*************** connect_better_edge_p (const_edge e, boo
*** 1032,1038 ****
        else if (e->count () < cur_best_edge->count ())
  	/* The edge has lower probability than the temporary best edge.  */
  	is_better_edge = false;
!       if (e->probability > cur_best_edge->probability)
  	/* The edge has higher probability than the temporary best edge.  */
  	is_better_edge = true;
        else if (e->probability < cur_best_edge->probability)
--- 1032,1038 ----
        else if (e->count () < cur_best_edge->count ())
  	/* The edge has lower probability than the temporary best edge.  */
  	is_better_edge = false;
!       else if (e->probability > cur_best_edge->probability)
  	/* The edge has higher probability than the temporary best edge.  */
  	is_better_edge = true;
        else if (e->probability < cur_best_edge->probability)
*************** connect_traces (int n_traces, struct tra
*** 1357,1364 ****
  static bool
  copy_bb_p (const_basic_block bb, int code_may_grow)
  {
!   int size = 0;
!   int max_size = uncond_jump_length;
    rtx_insn *insn;
  
    if (EDGE_COUNT (bb->preds) < 2)
--- 1357,1364 ----
  static bool
  copy_bb_p (const_basic_block bb, int code_may_grow)
  {
!   unsigned int size = 0;
!   unsigned int max_size = uncond_jump_length;
    rtx_insn *insn;
  
    if (EDGE_COUNT (bb->preds) < 2)
*************** copy_bb_p (const_basic_block bb, int cod
*** 1371,1382 ****
      return false;
  
    if (code_may_grow && optimize_bb_for_speed_p (bb))
!     max_size *= PARAM_VALUE (PARAM_MAX_GROW_COPY_BB_INSNS);
  
    FOR_BB_INSNS (bb, insn)
      {
        if (INSN_P (insn))
! 	size += get_attr_min_length (insn);
      }
  
    if (size <= max_size)
--- 1371,1386 ----
      return false;
  
    if (code_may_grow && optimize_bb_for_speed_p (bb))
!     max_size *= param_max_grow_copy_bb_insns;
  
    FOR_BB_INSNS (bb, insn)
      {
        if (INSN_P (insn))
! 	{
! 	  size += get_attr_min_length (insn);
! 	  if (size > max_size)
! 	    break;
! 	}
      }
  
    if (size <= max_size)
*************** copy_bb_p (const_basic_block bb, int cod
*** 1385,1391 ****
    if (dump_file)
      {
        fprintf (dump_file,
! 	       "Block %d can't be copied because its size = %d.\n",
  	       bb->index, size);
      }
  
--- 1389,1395 ----
    if (dump_file)
      {
        fprintf (dump_file,
! 	       "Block %d can't be copied because its size = %u.\n",
  	       bb->index, size);
      }
  
*************** copy_bb_p (const_basic_block bb, int cod
*** 1397,1403 ****
  int
  get_uncond_jump_length (void)
  {
!   int length;
  
    start_sequence ();
    rtx_code_label *label = emit_label (gen_label_rtx ());
--- 1401,1407 ----
  int
  get_uncond_jump_length (void)
  {
!   unsigned int length;
  
    start_sequence ();
    rtx_code_label *label = emit_label (gen_label_rtx ());
*************** get_uncond_jump_length (void)
*** 1405,1410 ****
--- 1409,1415 ----
    length = get_attr_min_length (jump);
    end_sequence ();
  
+   gcc_assert (length < INT_MAX);
    return length;
  }
  
*************** pass_reorder_blocks::execute (function *
*** 2657,2662 ****
--- 2662,2669 ----
        bb->aux = bb->next_bb;
    cfg_layout_finalize ();
  
+   FOR_EACH_BB_FN (bb, fun)
+     df_recompute_luids (bb);
    return 0;
  }
  
*************** duplicate_computed_gotos (function *fun)
*** 2746,2752 ****
  
    /* Never copy a block larger than this.  */
    int max_size
!     = uncond_jump_length * PARAM_VALUE (PARAM_MAX_GOTO_DUPLICATION_INSNS);
  
    bool changed = false;
  
--- 2753,2759 ----
  
    /* Never copy a block larger than this.  */
    int max_size
!     = uncond_jump_length * param_max_goto_duplication_insns;
  
    bool changed = false;
  
diff -Nrcpad gcc-9.3.0/gcc/bb-reorder.h gcc-10.1.0/gcc/bb-reorder.h
*** gcc-9.3.0/gcc/bb-reorder.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/bb-reorder.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Basic block reordering routines for the GNU compiler.
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Basic block reordering routines for the GNU compiler.
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/bitmap.c gcc-10.1.0/gcc/bitmap.c
*** gcc-9.3.0/gcc/bitmap.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/bitmap.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Functions to support general ended bitmaps.
!    Copyright (C) 1997-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Functions to support general ended bitmaps.
!    Copyright (C) 1997-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** static bitmap_element *bitmap_tree_listi
*** 36,53 ****
  void
  bitmap_register (bitmap b MEM_STAT_DECL)
  {
!   bitmap_mem_desc.register_descriptor (b, BITMAP_ORIGIN, false
! 				       FINAL_PASS_MEM_STAT);
  }
  
  /* Account the overhead.  */
  static void
  register_overhead (bitmap b, size_t amount)
  {
!   if (bitmap_mem_desc.contains_descriptor_for_instance (b))
!     bitmap_mem_desc.register_instance_overhead (amount, b);
  }
  
  /* Global data */
  bitmap_element bitmap_zero_bits;  /* An element of all zero bits.  */
  bitmap_obstack bitmap_default_obstack;    /* The default bitmap obstack.  */
--- 36,68 ----
  void
  bitmap_register (bitmap b MEM_STAT_DECL)
  {
!   static unsigned alloc_descriptor_max_uid = 1;
!   gcc_assert (b->alloc_descriptor == 0);
!   b->alloc_descriptor = alloc_descriptor_max_uid++;
! 
!   bitmap_mem_desc.register_descriptor (b->get_descriptor (), BITMAP_ORIGIN,
! 				       false FINAL_PASS_MEM_STAT);
  }
  
  /* Account the overhead.  */
  static void
  register_overhead (bitmap b, size_t amount)
  {
!   unsigned *d = b->get_descriptor ();
!   if (bitmap_mem_desc.contains_descriptor_for_instance (d))
!     bitmap_mem_desc.register_instance_overhead (amount, d);
! }
! 
! /* Release the overhead.  */
! static void
! release_overhead (bitmap b, size_t amount, bool remove_from_map)
! {
!   unsigned *d = b->get_descriptor ();
!   if (bitmap_mem_desc.contains_descriptor_for_instance (d))
!     bitmap_mem_desc.release_instance_overhead (d, amount, remove_from_map);
  }
  
+ 
  /* Global data */
  bitmap_element bitmap_zero_bits;  /* An element of all zero bits.  */
  bitmap_obstack bitmap_default_obstack;    /* The default bitmap obstack.  */
*************** bitmap_elem_to_freelist (bitmap head, bi
*** 65,71 ****
    bitmap_obstack *bit_obstack = head->obstack;
  
    if (GATHER_STATISTICS)
!     register_overhead (head, -((int)sizeof (bitmap_element)));
  
    elt->next = NULL;
    elt->indx = -1;
--- 80,86 ----
    bitmap_obstack *bit_obstack = head->obstack;
  
    if (GATHER_STATISTICS)
!     release_overhead (head, sizeof (bitmap_element), false);
  
    elt->next = NULL;
    elt->indx = -1;
*************** bitmap_elt_clear_from (bitmap head, bitm
*** 153,159 ****
        int n = 0;
        for (prev = elt; prev; prev = prev->next)
  	n++;
!       register_overhead (head, -sizeof (bitmap_element) * n);
      }
  
    prev = elt->prev;
--- 168,174 ----
        int n = 0;
        for (prev = elt; prev; prev = prev->next)
  	n++;
!       release_overhead (head, sizeof (bitmap_element) * n, false);
      }
  
    prev = elt->prev;
*************** bitmap_list_link_element (bitmap head, b
*** 252,258 ****
     and return it to the freelist.  */
  
  static inline void
! bitmap_list_unlink_element (bitmap head, bitmap_element *element)
  {
    bitmap_element *next = element->next;
    bitmap_element *prev = element->prev;
--- 267,274 ----
     and return it to the freelist.  */
  
  static inline void
! bitmap_list_unlink_element (bitmap head, bitmap_element *element,
! 			    bool to_freelist = true)
  {
    bitmap_element *next = element->next;
    bitmap_element *prev = element->prev;
*************** bitmap_list_unlink_element (bitmap head,
*** 279,296 ****
  	head->indx = 0;
      }
  
!   bitmap_elem_to_freelist (head, element);
  }
  
! /* Insert a new uninitialized element into bitmap HEAD after element
!    ELT.  If ELT is NULL, insert the element at the start.  Return the
!    new element.  */
  
  static bitmap_element *
  bitmap_list_insert_element_after (bitmap head,
! 				  bitmap_element *elt, unsigned int indx)
  {
!   bitmap_element *node = bitmap_element_allocate (head);
    node->indx = indx;
  
    gcc_checking_assert (!head->tree_form);
--- 295,315 ----
  	head->indx = 0;
      }
  
!   if (to_freelist)
!     bitmap_elem_to_freelist (head, element);
  }
  
! /* Insert a new uninitialized element (or NODE if not NULL) into bitmap
!    HEAD after element ELT.  If ELT is NULL, insert the element at the start.
!    Return the new element.  */
  
  static bitmap_element *
  bitmap_list_insert_element_after (bitmap head,
! 				  bitmap_element *elt, unsigned int indx,
! 				  bitmap_element *node = NULL)
  {
!   if (!node)
!     node = bitmap_element_allocate (head);
    node->indx = indx;
  
    gcc_checking_assert (!head->tree_form);
*************** bitmap_alloc (bitmap_obstack *bit_obstac
*** 760,766 ****
      bit_obstack = &bitmap_default_obstack;
    map = bit_obstack->heads;
    if (map)
!     bit_obstack->heads = (struct bitmap_head *) map->first;
    else
      map = XOBNEW (&bit_obstack->obstack, bitmap_head);
    bitmap_initialize (map, bit_obstack PASS_MEM_STAT);
--- 779,785 ----
      bit_obstack = &bitmap_default_obstack;
    map = bit_obstack->heads;
    if (map)
!     bit_obstack->heads = (class bitmap_head *) map->first;
    else
      map = XOBNEW (&bit_obstack->obstack, bitmap_head);
    bitmap_initialize (map, bit_obstack PASS_MEM_STAT);
*************** bitmap_obstack_free (bitmap map)
*** 798,804 ****
        map->first = (bitmap_element *) map->obstack->heads;
  
        if (GATHER_STATISTICS)
! 	register_overhead (map, -((int)sizeof (bitmap_head)));
  
        map->obstack->heads = map;
      }
--- 817,823 ----
        map->first = (bitmap_element *) map->obstack->heads;
  
        if (GATHER_STATISTICS)
! 	release_overhead (map, sizeof (bitmap_head), true);
  
        map->obstack->heads = map;
      }
*************** bitmap_move (bitmap to, bitmap from)
*** 872,887 ****
  
    bitmap_clear (to);
  
!   *to = *from;
! 
    if (GATHER_STATISTICS)
      {
-       size_t sz = 0;
        for (bitmap_element *e = to->first; e; e = e->next)
  	sz += sizeof (bitmap_element);
        register_overhead (to, sz);
-       register_overhead (from, -sz);
      }
  }
  
  /* Clear a single bit in a bitmap.  Return true if the bit changed.  */
--- 891,908 ----
  
    bitmap_clear (to);
  
!   size_t sz = 0;
    if (GATHER_STATISTICS)
      {
        for (bitmap_element *e = to->first; e; e = e->next)
  	sz += sizeof (bitmap_element);
        register_overhead (to, sz);
      }
+ 
+   *to = *from;
+ 
+   if (GATHER_STATISTICS)
+     release_overhead (from, sz, false);
  }
  
  /* Clear a single bit in a bitmap.  Return true if the bit changed.  */
*************** bitmap_set_bit (bitmap head, int bit)
*** 958,974 ****
  /* Return whether a bit is set within a bitmap.  */
  
  int
! bitmap_bit_p (bitmap head, int bit)
  {
    unsigned int indx = bit / BITMAP_ELEMENT_ALL_BITS;
!   bitmap_element *ptr;
    unsigned bit_num;
    unsigned word_num;
  
    if (!head->tree_form)
!     ptr = bitmap_list_find_element (head, indx);
    else
!     ptr = bitmap_tree_find_element (head, indx);
    if (ptr == 0)
      return 0;
  
--- 979,995 ----
  /* Return whether a bit is set within a bitmap.  */
  
  int
! bitmap_bit_p (const_bitmap head, int bit)
  {
    unsigned int indx = bit / BITMAP_ELEMENT_ALL_BITS;
!   const bitmap_element *ptr;
    unsigned bit_num;
    unsigned word_num;
  
    if (!head->tree_form)
!     ptr = bitmap_list_find_element (const_cast<bitmap> (head), indx);
    else
!     ptr = bitmap_tree_find_element (const_cast<bitmap> (head), indx);
    if (ptr == 0)
      return 0;
  
*************** bitmap_ior_into (bitmap a, const_bitmap
*** 2009,2014 ****
--- 2030,2085 ----
    return changed;
  }
  
+ /* A |= B.  Return true if A changes.  Free B (re-using its storage
+    for the result).  */
+ 
+ bool
+ bitmap_ior_into_and_free (bitmap a, bitmap *b_)
+ {
+   bitmap b = *b_;
+   bitmap_element *a_elt = a->first;
+   bitmap_element *b_elt = b->first;
+   bitmap_element *a_prev = NULL;
+   bitmap_element **a_prev_pnext = &a->first;
+   bool changed = false;
+ 
+   gcc_checking_assert (!a->tree_form && !b->tree_form);
+   gcc_assert (a->obstack == b->obstack);
+   if (a == b)
+     return false;
+ 
+   while (b_elt)
+     {
+       /* If A lags behind B, just advance it.  */
+       if (!a_elt || a_elt->indx == b_elt->indx)
+ 	{
+ 	  changed = bitmap_elt_ior (a, a_elt, a_prev, a_elt, b_elt, changed);
+ 	  b_elt = b_elt->next;
+ 	}
+       else if (a_elt->indx > b_elt->indx)
+ 	{
+ 	  bitmap_element *b_elt_next = b_elt->next;
+ 	  bitmap_list_unlink_element (b, b_elt, false);
+ 	  bitmap_list_insert_element_after (a, a_prev, b_elt->indx, b_elt);
+ 	  b_elt = b_elt_next;
+ 	}
+ 
+       a_prev = *a_prev_pnext;
+       a_prev_pnext = &a_prev->next;
+       a_elt = *a_prev_pnext;
+     }
+ 
+   gcc_checking_assert (!a->current == !a->first);
+   if (a->current)
+     a->indx = a->current->indx;
+ 
+   if (b->obstack)
+     BITMAP_FREE (*b_);
+   else
+     bitmap_clear (b);
+   return changed;
+ }
+ 
  /* DST = A ^ B  */
  
  void
*************** bitmap_ior_and_compl (bitmap dst, const_
*** 2350,2365 ****
  bool
  bitmap_ior_and_compl_into (bitmap a, const_bitmap b, const_bitmap c)
  {
!   bitmap_head tmp;
!   bool changed;
  
    gcc_checking_assert (!a->tree_form && !b->tree_form && !c->tree_form);
  
!   bitmap_initialize (&tmp, &bitmap_default_obstack);
!   bitmap_and_compl (&tmp, b, c);
!   changed = bitmap_ior_into (a, &tmp);
!   bitmap_clear (&tmp);
  
    return changed;
  }
  
--- 2421,2495 ----
  bool
  bitmap_ior_and_compl_into (bitmap a, const_bitmap b, const_bitmap c)
  {
!   bitmap_element *a_elt = a->first;
!   const bitmap_element *b_elt = b->first;
!   const bitmap_element *c_elt = c->first;
!   bitmap_element and_elt;
!   bitmap_element *a_prev = NULL;
!   bitmap_element **a_prev_pnext = &a->first;
!   bool changed = false;
!   unsigned ix;
  
    gcc_checking_assert (!a->tree_form && !b->tree_form && !c->tree_form);
  
!   if (a == b)
!     return false;
!   if (bitmap_empty_p (c))
!     return bitmap_ior_into (a, b);
!   else if (bitmap_empty_p (a))
!     return bitmap_and_compl (a, b, c);
  
+   and_elt.indx = -1;
+   while (b_elt)
+     {
+       /* Advance C.  */
+       while (c_elt && c_elt->indx < b_elt->indx)
+ 	c_elt = c_elt->next;
+ 
+       const bitmap_element *and_elt_ptr;
+       if (c_elt && c_elt->indx == b_elt->indx)
+ 	{
+ 	  BITMAP_WORD overall = 0;
+ 	  and_elt_ptr = &and_elt;
+ 	  and_elt.indx = b_elt->indx;
+ 	  for (ix = 0; ix < BITMAP_ELEMENT_WORDS; ix++)
+ 	    {
+ 	      and_elt.bits[ix] = b_elt->bits[ix] & ~c_elt->bits[ix];
+ 	      overall |= and_elt.bits[ix];
+ 	    }
+ 	  if (!overall)
+ 	    {
+ 	      b_elt = b_elt->next;
+ 	      continue;
+ 	    }
+ 	}
+       else
+ 	and_elt_ptr = b_elt;
+ 
+       b_elt = b_elt->next;
+ 
+       /* Now find a place to insert AND_ELT.  */
+       do
+ 	{
+ 	  ix = a_elt ? a_elt->indx : and_elt_ptr->indx;
+           if (ix == and_elt_ptr->indx)
+ 	    changed = bitmap_elt_ior (a, a_elt, a_prev, a_elt,
+ 				      and_elt_ptr, changed);
+           else if (ix > and_elt_ptr->indx)
+ 	    changed = bitmap_elt_copy (a, NULL, a_prev, and_elt_ptr, changed);
+ 
+           a_prev = *a_prev_pnext;
+           a_prev_pnext = &a_prev->next;
+           a_elt = *a_prev_pnext;
+ 
+           /* If A lagged behind B/C, we advanced it so loop once more.  */
+ 	}
+       while (ix < and_elt_ptr->indx);
+     }
+ 
+   gcc_checking_assert (!a->current == !a->first);
+   if (a->current)
+     a->indx = a->current->indx;
    return changed;
  }
  
diff -Nrcpad gcc-9.3.0/gcc/bitmap.h gcc-10.1.0/gcc/bitmap.h
*** gcc-9.3.0/gcc/bitmap.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/bitmap.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Functions to support general ended bitmaps.
!    Copyright (C) 1997-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Functions to support general ended bitmaps.
!    Copyright (C) 1997-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 210,219 ****
     on which many random-access membership tests will happen.  */
  
  #include "obstack.h"
  
  /* Bitmap memory usage.  */
! struct bitmap_usage: public mem_usage
  {
    /* Default contructor.  */
    bitmap_usage (): m_nsearches (0), m_search_iter (0) {}
    /* Constructor.  */
--- 210,221 ----
     on which many random-access membership tests will happen.  */
  
  #include "obstack.h"
+ #include "array-traits.h"
  
  /* Bitmap memory usage.  */
! class bitmap_usage: public mem_usage
  {
+ public:
    /* Default contructor.  */
    bitmap_usage (): m_nsearches (0), m_search_iter (0) {}
    /* Constructor.  */
*************** typedef unsigned long BITMAP_WORD;
*** 289,295 ****
  /* Obstack for allocating bitmaps and elements from.  */
  struct bitmap_obstack {
    struct bitmap_element *elements;
!   struct bitmap_head *heads;
    struct obstack obstack;
  };
  
--- 291,297 ----
  /* Obstack for allocating bitmaps and elements from.  */
  struct bitmap_obstack {
    struct bitmap_element *elements;
!   bitmap_head *heads;
    struct obstack obstack;
  };
  
*************** struct GTY((chain_next ("%h.next"))) bit
*** 321,338 ****
  /* Head of bitmap linked list.  The 'current' member points to something
     already pointed to by the chain started by first, so GTY((skip)) it.  */
  
! struct GTY(()) bitmap_head {
    static bitmap_obstack crashme;
    /* Poison obstack to not make it not a valid initialized GC bitmap.  */
    CONSTEXPR bitmap_head()
!     : indx(0), tree_form(false), first(NULL), current(NULL),
!       obstack (&crashme)
    {}
    /* Index of last element looked at.  */
    unsigned int indx;
    /* False if the bitmap is in list form; true if the bitmap is in tree form.
       Bitmap iterators only work on bitmaps in list form.  */
!   bool tree_form;
    /* In list form, the first element in the linked list;
       in tree form, the root of the tree.   */
    bitmap_element *first;
--- 323,345 ----
  /* Head of bitmap linked list.  The 'current' member points to something
     already pointed to by the chain started by first, so GTY((skip)) it.  */
  
! class GTY(()) bitmap_head {
! public:
    static bitmap_obstack crashme;
    /* Poison obstack to not make it not a valid initialized GC bitmap.  */
    CONSTEXPR bitmap_head()
!     : indx (0), tree_form (false), padding (0), alloc_descriptor (0), first (NULL),
!       current (NULL), obstack (&crashme)
    {}
    /* Index of last element looked at.  */
    unsigned int indx;
    /* False if the bitmap is in list form; true if the bitmap is in tree form.
       Bitmap iterators only work on bitmaps in list form.  */
!   unsigned tree_form: 1;
!   /* Next integer is shifted, so padding is needed.  */
!   unsigned padding: 2;
!   /* Bitmap UID used for memory allocation statistics.  */
!   unsigned alloc_descriptor: 29;
    /* In list form, the first element in the linked list;
       in tree form, the root of the tree.   */
    bitmap_element *first;
*************** struct GTY(()) bitmap_head {
*** 340,346 ****
--- 347,363 ----
    bitmap_element * GTY((skip(""))) current;
    /* Obstack to allocate elements from.  If NULL, then use GGC allocation.  */
    bitmap_obstack * GTY((skip(""))) obstack;
+ 
+   /* Dump bitmap.  */
    void dump ();
+ 
+   /* Get bitmap descriptor UID casted to an unsigned integer pointer.
+      Shift the descriptor because pointer_hash<Type>::hash is
+      doing >> 3 shift operation.  */
+   unsigned *get_descriptor ()
+   {
+     return (unsigned *)(ptrdiff_t)(alloc_descriptor << 3);
+   }
  };
  
  /* Global data */
*************** extern void bitmap_clear_range (bitmap,
*** 399,404 ****
--- 416,422 ----
  extern void bitmap_set_range (bitmap, unsigned int, unsigned int);
  extern bool bitmap_ior (bitmap, const_bitmap, const_bitmap);
  extern bool bitmap_ior_into (bitmap, const_bitmap);
+ extern bool bitmap_ior_into_and_free (bitmap, bitmap *);
  extern void bitmap_xor (bitmap, const_bitmap, const_bitmap);
  extern void bitmap_xor_into (bitmap, const_bitmap);
  
*************** extern bool bitmap_clear_bit (bitmap, in
*** 418,424 ****
  extern bool bitmap_set_bit (bitmap, int);
  
  /* Return true if a bit is set in a bitmap.  */
! extern int bitmap_bit_p (bitmap, int);
  
  /* Debug functions to print a bitmap.  */
  extern void debug_bitmap (const_bitmap);
--- 436,442 ----
  extern bool bitmap_set_bit (bitmap, int);
  
  /* Return true if a bit is set in a bitmap.  */
! extern int bitmap_bit_p (const_bitmap, int);
  
  /* Debug functions to print a bitmap.  */
  extern void debug_bitmap (const_bitmap);
*************** bitmap_initialize (bitmap head, bitmap_o
*** 441,446 ****
--- 459,466 ----
  {
    head->first = head->current = NULL;
    head->indx = head->tree_form = 0;
+   head->padding = 0;
+   head->alloc_descriptor = 0;
    head->obstack = obstack;
    if (GATHER_STATISTICS)
      bitmap_register (head PASS_MEM_STAT);
*************** class auto_bitmap
*** 937,940 ****
--- 957,1079 ----
    bitmap_head m_bits;
  };
  
+ /* Base class for bitmap_view; see there for details.  */
+ template<typename T, typename Traits = array_traits<T> >
+ class base_bitmap_view
+ {
+ public:
+   typedef typename Traits::element_type array_element_type;
+ 
+   base_bitmap_view (const T &, bitmap_element *);
+   operator const_bitmap () const { return &m_head; }
+ 
+ private:
+   base_bitmap_view (const base_bitmap_view &);
+ 
+   bitmap_head m_head;
+ };
+ 
+ /* Provides a read-only bitmap view of a single integer bitmask or a
+    constant-sized array of integer bitmasks, or of a wrapper around such
+    bitmasks.  */
+ template<typename T, typename Traits>
+ class bitmap_view<T, Traits, true> : public base_bitmap_view<T, Traits>
+ {
+ public:
+   bitmap_view (const T &array)
+     : base_bitmap_view<T, Traits> (array, m_bitmap_elements) {}
+ 
+ private:
+   /* How many bitmap_elements we need to hold a full T.  */
+   static const size_t num_bitmap_elements
+     = CEIL (CHAR_BIT
+ 	    * sizeof (typename Traits::element_type)
+ 	    * Traits::constant_size,
+ 	    BITMAP_ELEMENT_ALL_BITS);
+   bitmap_element m_bitmap_elements[num_bitmap_elements];
+ };
+ 
+ /* Initialize the view for array ARRAY, using the array of bitmap
+    elements in BITMAP_ELEMENTS (which is known to contain enough
+    entries).  */
+ template<typename T, typename Traits>
+ base_bitmap_view<T, Traits>::base_bitmap_view (const T &array,
+ 					       bitmap_element *bitmap_elements)
+ {
+   m_head.obstack = NULL;
+ 
+   /* The code currently assumes that each element of ARRAY corresponds
+      to exactly one bitmap_element.  */
+   const size_t array_element_bits = CHAR_BIT * sizeof (array_element_type);
+   STATIC_ASSERT (BITMAP_ELEMENT_ALL_BITS % array_element_bits == 0);
+   size_t array_step = BITMAP_ELEMENT_ALL_BITS / array_element_bits;
+   size_t array_size = Traits::size (array);
+ 
+   /* Process each potential bitmap_element in turn.  The loop is written
+      this way rather than per array element because usually there are
+      only a small number of array elements per bitmap element (typically
+      two or four).  The inner loops should therefore unroll completely.  */
+   const array_element_type *array_elements = Traits::base (array);
+   unsigned int indx = 0;
+   for (size_t array_base = 0;
+        array_base < array_size;
+        array_base += array_step, indx += 1)
+     {
+       /* How many array elements are in this particular bitmap_element.  */
+       unsigned int array_count
+ 	= (STATIC_CONSTANT_P (array_size % array_step == 0)
+ 	   ? array_step : MIN (array_step, array_size - array_base));
+ 
+       /* See whether we need this bitmap element.  */
+       array_element_type ior = array_elements[array_base];
+       for (size_t i = 1; i < array_count; ++i)
+ 	ior |= array_elements[array_base + i];
+       if (ior == 0)
+ 	continue;
+ 
+       /* Grab the next bitmap element and chain it.  */
+       bitmap_element *bitmap_element = bitmap_elements++;
+       if (m_head.current)
+ 	m_head.current->next = bitmap_element;
+       else
+ 	m_head.first = bitmap_element;
+       bitmap_element->prev = m_head.current;
+       bitmap_element->next = NULL;
+       bitmap_element->indx = indx;
+       m_head.current = bitmap_element;
+       m_head.indx = indx;
+ 
+       /* Fill in the bits of the bitmap element.  */
+       if (array_element_bits < BITMAP_WORD_BITS)
+ 	{
+ 	  /* Multiple array elements fit in one element of
+ 	     bitmap_element->bits.  */
+ 	  size_t array_i = array_base;
+ 	  for (unsigned int word_i = 0; word_i < BITMAP_ELEMENT_WORDS;
+ 	       ++word_i)
+ 	    {
+ 	      BITMAP_WORD word = 0;
+ 	      for (unsigned int shift = 0;
+ 		   shift < BITMAP_WORD_BITS && array_i < array_size;
+ 		   shift += array_element_bits)
+ 		word |= array_elements[array_i++] << shift;
+ 	      bitmap_element->bits[word_i] = word;
+ 	    }
+ 	}
+       else
+ 	{
+ 	  /* Array elements are the same size as elements of
+ 	     bitmap_element->bits, or are an exact multiple of that size.  */
+ 	  unsigned int word_i = 0;
+ 	  for (unsigned int i = 0; i < array_count; ++i)
+ 	    for (unsigned int shift = 0; shift < array_element_bits;
+ 		 shift += BITMAP_WORD_BITS)
+ 	      bitmap_element->bits[word_i++]
+ 		= array_elements[array_base + i] >> shift;
+ 	  while (word_i < BITMAP_ELEMENT_WORDS)
+ 	    bitmap_element->bits[word_i++] = 0;
+ 	}
+     }
+ }
+ 
  #endif /* GCC_BITMAP_H */
diff -Nrcpad gcc-9.3.0/gcc/brig/ChangeLog gcc-10.1.0/gcc/brig/ChangeLog
*** gcc-9.3.0/gcc/brig/ChangeLog	Thu Mar 12 11:08:03 2020
--- gcc-10.1.0/gcc/brig/ChangeLog	Thu May  7 10:50:32 2020
***************
*** 1,14 ****
! 2020-03-12  Release Manager
  
! 	* GCC 9.3.0 released.
  
! 2019-08-12  Release Manager
  
! 	* GCC 9.2.0 released.
  
! 2019-05-03  Release Manager
  
! 	* GCC 9.1.0 released.
  
  2019-01-01  Jakub Jelinek  <jakub@redhat.com>
  
--- 1,34 ----
! 2020-05-07  Release Manager
  
! 	* GCC 10.1.0 released.
  
! 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
  
! 	Update copyright years.
  
! 2019-10-04  Joseph Myers  <joseph@codesourcery.com>
  
! 	* brig-lang.c (flag_isoc2x): New variable.
! 
! 2019-08-23  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR middle-end/91283
! 	* brig-lang.c (brig_langhook_post_options): Set flag_excess_precision
! 	instead of flag_excess_precision_cmdline.
! 
! 2019-06-25  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
! 
! 	* brig-lang.c (brig_build_c_type_nodes): Accept "__intN__"
! 	format of "__intN" types for SIZE_TYPE.
! 
! 2019-05-16  Martin Sebor  <msebor@redhat.com>
! 
! 	* brigfrontend/brig-control-handler.cc
! 	(brig_directive_control_handler::operator): Remove trailing newline
! 	from a diagnostic.
! 	* brigfrontend/brig-module-handler.cc
! 	(brig_directive_module_handler::operator): Remove a duplicated space
! 	from a diagnostic.
  
  2019-01-01  Jakub Jelinek  <jakub@redhat.com>
  
***************
*** 21,27 ****
  2018-07-20  Martin Sebor  <msebor@redhat.com>
  
  	PR middle-end/82063
! 	* brig/brig-lang.c (brig_langhook_handle_option): Change function
  	argument to HOST_WIDE_INT.
  
  2018-07-04  Martin Jambor  <mjambor@suse.cz>
--- 41,47 ----
  2018-07-20  Martin Sebor  <msebor@redhat.com>
  
  	PR middle-end/82063
! 	* brig-lang.c (brig_langhook_handle_option): Change function
  	argument to HOST_WIDE_INT.
  
  2018-07-04  Martin Jambor  <mjambor@suse.cz>
***************
*** 49,55 ****
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
! 	* brig/brigfrontend/brig-basic-inst-handler.cc:  Fix handling of NOPs.
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
--- 69,75 ----
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
! 	* brigfrontend/brig-basic-inst-handler.cc: Fix handling of NOPs.
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
***************
*** 78,129 ****
  	- add qualifiers to generated function parameters.
  	Const and restrict on the hidden local/private pointers,
  	the arg buffer and the context pointer help some optimizations.
! 	* brig/brigfrontend/brig-basic-inst-handler.cc: See above.
! 	* brig/brigfrontend/brig-branch-inst-handler.cc: See above.
! 	* brig/brigfrontend/brig-cmp-inst-handler.cc: See above.
! 	* brig/brigfrontend/brig-code-entry-handler.cc: See above.
! 	* brig/brigfrontend/brig-code-entry-handler.h: See above.
! 	* brig/brigfrontend/brig-control-handler.cc: See above.
! 	* brig/brigfrontend/brig-cvt-inst-handler.cc: See above.
! 	* brig/brigfrontend/brig-function-handler.cc: See above.
! 	* brig/brigfrontend/brig-function.cc: See above.
! 	* brig/brigfrontend/brig-function.h: See above.
! 	* brig/brigfrontend/brig-label-handler.cc: See above.
! 	* brig/brigfrontend/brig-lane-inst-handler.cc: See above.
! 	* brig/brigfrontend/brig-mem-inst-handler.cc: See above.
! 	* brig/brigfrontend/phsa.h: See above.
! 	* brig/lang.opt: See above.
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
! 	* brig/brigfrontend/brig-function-handler.cc: Skip multiple forward
  	declarations of the same function.
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
! 	* brig/brig-lang.c: Do not allow optimizations based on known C
  	builtins.
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
! 	* brig/brig-lang.c: Allow controlling strict aliasing from
  	cmd line.
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
! 	* brig/brigfrontend/brig-code-entry-handler.cc: The modulo in
  	ID computation should not be needed.
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
! 	* brig/brig-lang.c: Add support for whole program
  	optimizations by marking the kernels externally visible.
! 	* brig/brigfrontend/brig-branch-inst-handler.cc: See above.
! 	* brig/brigfrontend/brig-function-handler.cc: See above.
! 	* brig/brigfrontend/brig-function.cc: See above.
! 	* brig/brigfrontend/brig-to-generic.cc: See above.
! 	* brig/brigfrontend/brig-to-generic.h: See above.
! 	* brig/brigfrontend/brig-variable-handler.h: See above.
  
  2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
  	    Alan Hayward  <alan.hayward@arm.com>
--- 98,149 ----
  	- add qualifiers to generated function parameters.
  	Const and restrict on the hidden local/private pointers,
  	the arg buffer and the context pointer help some optimizations.
! 	* brigfrontend/brig-basic-inst-handler.cc: See above.
! 	* brigfrontend/brig-branch-inst-handler.cc: See above.
! 	* brigfrontend/brig-cmp-inst-handler.cc: See above.
! 	* brigfrontend/brig-code-entry-handler.cc: See above.
! 	* brigfrontend/brig-code-entry-handler.h: See above.
! 	* brigfrontend/brig-control-handler.cc: See above.
! 	* brigfrontend/brig-cvt-inst-handler.cc: See above.
! 	* brigfrontend/brig-function-handler.cc: See above.
! 	* brigfrontend/brig-function.cc: See above.
! 	* brigfrontend/brig-function.h: See above.
! 	* brigfrontend/brig-label-handler.cc: See above.
! 	* brigfrontend/brig-lane-inst-handler.cc: See above.
! 	* brigfrontend/brig-mem-inst-handler.cc: See above.
! 	* brigfrontend/phsa.h: See above.
! 	* lang.opt: See above.
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
! 	* brigfrontend/brig-function-handler.cc: Skip multiple forward
  	declarations of the same function.
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
! 	* brig-lang.c: Do not allow optimizations based on known C
  	builtins.
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
! 	* brig-lang.c: Allow controlling strict aliasing from
  	cmd line.
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
! 	* brigfrontend/brig-code-entry-handler.cc: The modulo in
  	ID computation should not be needed.
  
  2018-05-04  Pekka Jääskeläinen  <pekka.jaaskelainen@parmance.com>
  
! 	* brig-lang.c: Add support for whole program
  	optimizations by marking the kernels externally visible.
! 	* brigfrontend/brig-branch-inst-handler.cc: See above.
! 	* brigfrontend/brig-function-handler.cc: See above.
! 	* brigfrontend/brig-function.cc: See above.
! 	* brigfrontend/brig-to-generic.cc: See above.
! 	* brigfrontend/brig-to-generic.h: See above.
! 	* brigfrontend/brig-variable-handler.h: See above.
  
  2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
  	    Alan Hayward  <alan.hayward@arm.com>
***************
*** 220,226 ****
  	can be used to patch away BRIG entries at the binary level.
  	Also add extra error detection for zeroed regions: make sure
  	the byteCount field is never zero.
! 	* brig/brigfrontend/phsa.h: Added a new error prefix for
  	errors which are due to corrupted BRIG modules.
  
  2017-10-09  Henry Linjamäki  <henry.linjamaki@parmance.com>
--- 240,246 ----
  	can be used to patch away BRIG entries at the binary level.
  	Also add extra error detection for zeroed regions: make sure
  	the byteCount field is never zero.
! 	* brigfrontend/phsa.h: Added a new error prefix for
  	errors which are due to corrupted BRIG modules.
  
  2017-10-09  Henry Linjamäki  <henry.linjamaki@parmance.com>
diff -Nrcpad gcc-9.3.0/gcc/brig/Make-lang.in gcc-10.1.0/gcc/brig/Make-lang.in
*** gcc-9.3.0/gcc/brig/Make-lang.in	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/Make-lang.in	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  # Make-lang.in -- Top level -*- makefile -*- fragment for gcc BRIG (HSAIL)
  # frontend.
  
! # Copyright (C) 2015-2019 Free Software Foundation, Inc.
  
  # This file is part of GCC.
  
--- 1,7 ----
  # Make-lang.in -- Top level -*- makefile -*- fragment for gcc BRIG (HSAIL)
  # frontend.
  
! # Copyright (C) 2015-2020 Free Software Foundation, Inc.
  
  # This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brig-builtins.h gcc-10.1.0/gcc/brig/brig-builtins.h
*** gcc-9.3.0/gcc/brig/brig-builtins.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brig-builtins.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-builtins.h -- brig builtin definitions
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
--- 1,5 ----
  /* brig-builtins.h -- brig builtin definitions
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
diff -Nrcpad gcc-9.3.0/gcc/brig/brig-c.h gcc-10.1.0/gcc/brig/brig-c.h
*** gcc-9.3.0/gcc/brig/brig-c.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brig-c.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-c.h -- Header file for brig input's gcc C interface.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-c.h -- Header file for brig input's gcc C interface.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brig-lang.c gcc-10.1.0/gcc/brig/brig-lang.c
*** gcc-9.3.0/gcc/brig/brig-lang.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brig-lang.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-lang.c -- brig (HSAIL) input gcc interface.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-lang.c -- brig (HSAIL) input gcc interface.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
*************** brig_langhook_handle_option
*** 166,173 ****
  static bool
  brig_langhook_post_options (const char **pfilename ATTRIBUTE_UNUSED)
  {
!   if (flag_excess_precision_cmdline == EXCESS_PRECISION_DEFAULT)
!     flag_excess_precision_cmdline = EXCESS_PRECISION_STANDARD;
  
    /* gccbrig casts pointers around like crazy, TBAA might produce broken
       code if not disabling it by default.  Some PRM conformance tests such
--- 166,173 ----
  static bool
  brig_langhook_post_options (const char **pfilename ATTRIBUTE_UNUSED)
  {
!   if (flag_excess_precision == EXCESS_PRECISION_DEFAULT)
!     flag_excess_precision = EXCESS_PRECISION_STANDARD;
  
    /* gccbrig casts pointers around like crazy, TBAA might produce broken
       code if not disabling it by default.  Some PRM conformance tests such
*************** static GTY(()) tree signed_size_type_nod
*** 587,592 ****
--- 587,593 ----
  int flag_isoc94;
  int flag_isoc99;
  int flag_isoc11;
+ int flag_isoc2x;
  
  static void
  def_fn_type (builtin_type def, builtin_type ret, bool var, int n, ...)
*************** brig_build_c_type_nodes (void)
*** 864,873 ****
        for (i = 0; i < NUM_INT_N_ENTS; i++)
  	if (int_n_enabled_p[i])
  	  {
! 	    char name[50];
  	    sprintf (name, "__int%d unsigned", int_n_data[i].bitsize);
  
! 	    if (strcmp (name, SIZE_TYPE) == 0)
  	      {
  		intmax_type_node = int_n_trees[i].signed_type;
  		uintmax_type_node = int_n_trees[i].unsigned_type;
--- 865,876 ----
        for (i = 0; i < NUM_INT_N_ENTS; i++)
  	if (int_n_enabled_p[i])
  	  {
! 	    char name[50], altname[50];
  	    sprintf (name, "__int%d unsigned", int_n_data[i].bitsize);
+ 	    sprintf (altname, "__int%d__ unsigned", int_n_data[i].bitsize);
  
! 	    if (strcmp (name, SIZE_TYPE) == 0
! 		|| strcmp (altname, SIZE_TYPE) == 0)
  	      {
  		intmax_type_node = int_n_trees[i].signed_type;
  		uintmax_type_node = int_n_trees[i].unsigned_type;
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-arg-block-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-arg-block-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-arg-block-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-arg-block-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-arg-block-handler.cc -- brig arg block start/end directive handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-arg-block-handler.cc -- brig arg block start/end directive handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-atomic-inst-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-atomic-inst-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-atomic-inst-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-atomic-inst-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-atomic-inst-handler.cc -- brig atomic instruction handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
--- 1,5 ----
  /* brig-atomic-inst-handler.cc -- brig atomic instruction handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-basic-inst-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-basic-inst-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-basic-inst-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-basic-inst-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-basic-inst-handler.cc -- brig basic instruction handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-basic-inst-handler.cc -- brig basic instruction handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-branch-inst-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-branch-inst-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-branch-inst-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-branch-inst-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-branch-inst-handler.cc -- brig branch instruction handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-branch-inst-handler.cc -- brig branch instruction handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-cmp-inst-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-cmp-inst-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-cmp-inst-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-cmp-inst-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-cmp-inst-handler.cc -- brig cmp instruction handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-cmp-inst-handler.cc -- brig cmp instruction handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-code-entry-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-code-entry-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-code-entry-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-code-entry-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-code-entry-handler.cc -- a gccbrig base class
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-code-entry-handler.cc -- a gccbrig base class
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-code-entry-handler.h gcc-10.1.0/gcc/brig/brigfrontend/brig-code-entry-handler.h
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-code-entry-handler.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-code-entry-handler.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-code-entry-handler.h -- a gccbrig base class
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-code-entry-handler.h -- a gccbrig base class
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-comment-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-comment-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-comment-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-comment-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-comment-handler.cc -- brig comment directive handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-comment-handler.cc -- brig comment directive handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-control-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-control-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-control-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-control-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-control-handler.cc -- brig control directive handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-control-handler.cc -- brig control directive handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
*************** brig_directive_control_handler::operator
*** 102,108 ****
        /* Unimplemented.  */
        break;
      default:
!       sorry ("Unsupported control directive %x.\n", inst->control);
      }
    return base->byteCount;
  }
--- 102,108 ----
        /* Unimplemented.  */
        break;
      default:
!       sorry ("Unsupported control directive %x.", inst->control);
      }
    return base->byteCount;
  }
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-copy-move-inst-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-copy-move-inst-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-copy-move-inst-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-copy-move-inst-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-copy-move-inst-handler.cc -- brig copy/move instruction handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-copy-move-inst-handler.cc -- brig copy/move instruction handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-cvt-inst-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-cvt-inst-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-cvt-inst-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-cvt-inst-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-cvt-inst-handler.cc -- brig cvt (convert) instruction handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-cvt-inst-handler.cc -- brig cvt (convert) instruction handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-fbarrier-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-fbarrier-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-fbarrier-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-fbarrier-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-fbarrier-handler.cc -- brig fbarrier directive handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-fbarrier-handler.cc -- brig fbarrier directive handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-function-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-function-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-function-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-function-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-code-entry-handler.cc -- brig function directive handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-code-entry-handler.cc -- brig function directive handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-function.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-function.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-function.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-function.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-function.cc -- declaration of brig_function class.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-function.cc -- declaration of brig_function class.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-function.h gcc-10.1.0/gcc/brig/brigfrontend/brig-function.h
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-function.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-function.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-function.h -- declaration of brig_function class.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-function.h -- declaration of brig_function class.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-inst-mod-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-inst-mod-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-inst-mod-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-inst-mod-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-inst-mod-handler.cc -- brig rounding moded instruction handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-inst-mod-handler.cc -- brig rounding moded instruction handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-label-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-label-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-label-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-label-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-label-handler.cc -- brig label directive handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-label-handler.cc -- brig label directive handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-lane-inst-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-lane-inst-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-lane-inst-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-lane-inst-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-lane-inst-handler.cc -- brig lane instruction handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-lane-inst-handler.cc -- brig lane instruction handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-machine.c gcc-10.1.0/gcc/brig/brigfrontend/brig-machine.c
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-machine.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-machine.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-machine.c -- gccbrig machine queries
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-machine.c -- gccbrig machine queries
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-machine.h gcc-10.1.0/gcc/brig/brigfrontend/brig-machine.h
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-machine.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-machine.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-machine.h -- gccbrig machine queries
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* brig-machine.h -- gccbrig machine queries
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-mem-inst-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-mem-inst-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-mem-inst-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-mem-inst-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-mem-inst-handler.cc -- brig memory inst handler
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-mem-inst-handler.cc -- brig memory inst handler
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-module-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-module-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-module-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-module-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-module-handler.cc -- brig module directive handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-module-handler.cc -- brig module directive handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
*************** brig_directive_module_handler::operator
*** 28,37 ****
    const BrigDirectiveModule* mod = (const BrigDirectiveModule*)base;
    m_parent.m_module_name = m_parent.get_string (mod->name).substr (1);
    if (mod->hsailMajor != 1 || mod->hsailMinor != 0)
!     fatal_error (UNKNOWN_LOCATION, PHSA_ERROR_PREFIX_INCOMPATIBLE_MODULE " "
  		 "HSAIL version not supported. HSAIL 1.0 required.");
    if (mod->machineModel != BRIG_MACHINE_LARGE)
!     fatal_error (UNKNOWN_LOCATION, PHSA_ERROR_PREFIX_INCOMPATIBLE_MODULE " "
  		 "Only HSA 'large' machine model supported.");
    /* Do not check for the profile as the runtime conformance suite tests
       with 'full' profile BRIGs even though they don't use any full profile
--- 28,37 ----
    const BrigDirectiveModule* mod = (const BrigDirectiveModule*)base;
    m_parent.m_module_name = m_parent.get_string (mod->name).substr (1);
    if (mod->hsailMajor != 1 || mod->hsailMinor != 0)
!     fatal_error (UNKNOWN_LOCATION, PHSA_ERROR_PREFIX_INCOMPATIBLE_MODULE
  		 "HSAIL version not supported. HSAIL 1.0 required.");
    if (mod->machineModel != BRIG_MACHINE_LARGE)
!     fatal_error (UNKNOWN_LOCATION, PHSA_ERROR_PREFIX_INCOMPATIBLE_MODULE
  		 "Only HSA 'large' machine model supported.");
    /* Do not check for the profile as the runtime conformance suite tests
       with 'full' profile BRIGs even though they don't use any full profile
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-queue-inst-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-queue-inst-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-queue-inst-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-queue-inst-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* brig-queue-inst-handler.cc -- brig user mode queue related instruction
     handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,6 ----
  /* brig-queue-inst-handler.cc -- brig user mode queue related instruction
     handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-seg-inst-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-seg-inst-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-seg-inst-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-seg-inst-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-seg-inst-handler.cc -- brig segment related instruction handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-seg-inst-handler.cc -- brig segment related instruction handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-signal-inst-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-signal-inst-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-signal-inst-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-signal-inst-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-signal-inst-handler.cc -- brig signal instruction handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-signal-inst-handler.cc -- brig signal instruction handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-to-generic.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-to-generic.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-to-generic.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-to-generic.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig2tree.cc -- brig to gcc generic/gimple tree conversion
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig2tree.cc -- brig to gcc generic/gimple tree conversion
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-to-generic.h gcc-10.1.0/gcc/brig/brigfrontend/brig-to-generic.h
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-to-generic.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-to-generic.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-to-generic.h -- brig to gcc generic conversion
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-to-generic.h -- brig to gcc generic conversion
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-util.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-util.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-util.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-util.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-util.cc -- gccbrig utility functions
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-util.cc -- gccbrig utility functions
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-util.h gcc-10.1.0/gcc/brig/brigfrontend/brig-util.h
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-util.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-util.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-util.h -- gccbrig utility functions
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-util.h -- gccbrig utility functions
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/brig-variable-handler.cc gcc-10.1.0/gcc/brig/brigfrontend/brig-variable-handler.cc
*** gcc-9.3.0/gcc/brig/brigfrontend/brig-variable-handler.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/brig-variable-handler.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brig-variable-handler.cc -- brig variable directive handling
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brig-variable-handler.cc -- brig variable directive handling
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigfrontend/phsa.h gcc-10.1.0/gcc/brig/brigfrontend/phsa.h
*** gcc-9.3.0/gcc/brig/brigfrontend/phsa.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigfrontend/phsa.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* phsa.h -- interfacing between the gcc BRIG FE and the phsa runtime
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* phsa.h -- interfacing between the gcc BRIG FE and the phsa runtime
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/brigspec.c gcc-10.1.0/gcc/brig/brigspec.c
*** gcc-9.3.0/gcc/brig/brigspec.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/brigspec.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* brigspec.c -- Specific flags and argument handling of the gcc BRIG front end.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* brigspec.c -- Specific flags and argument handling of the gcc BRIG front end.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/config-lang.in gcc-10.1.0/gcc/brig/config-lang.in
*** gcc-9.3.0/gcc/brig/config-lang.in	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/config-lang.in	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  # config-lang.in -- Top level configure fragment for gcc BRIG (HSAIL) frontend.
  
! # Copyright (C) 2015-2019 Free Software Foundation, Inc.
  
  # This file is part of GCC.
  
--- 1,6 ----
  # config-lang.in -- Top level configure fragment for gcc BRIG (HSAIL) frontend.
  
! # Copyright (C) 2015-2020 Free Software Foundation, Inc.
  
  # This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/gccbrig.texi gcc-10.1.0/gcc/brig/gccbrig.texi
*** gcc-9.3.0/gcc/brig/gccbrig.texi	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/gccbrig.texi	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  \input texinfo @c -*-texinfo-*-
  @setfilename gccbrig.info
  @settitle The GNU BRIG (HSAIL) Compiler
! @set copyrights-brig 2017-2019
  
  @c Merge the standard indexes into a single one.
  @syncodeindex fn cp
--- 1,7 ----
  \input texinfo @c -*-texinfo-*-
  @setfilename gccbrig.info
  @settitle The GNU BRIG (HSAIL) Compiler
! @set copyrights-brig 2017-2020
  
  @c Merge the standard indexes into a single one.
  @syncodeindex fn cp
diff -Nrcpad gcc-9.3.0/gcc/brig/lang-specs.h gcc-10.1.0/gcc/brig/lang-specs.h
*** gcc-9.3.0/gcc/brig/lang-specs.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/lang-specs.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* lang-specs.h -- gcc driver specs for BRIG (HSAIL) frontend.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
--- 1,5 ----
  /* lang-specs.h -- gcc driver specs for BRIG (HSAIL) frontend.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
  
diff -Nrcpad gcc-9.3.0/gcc/brig/lang.opt gcc-10.1.0/gcc/brig/lang.opt
*** gcc-9.3.0/gcc/brig/lang.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig/lang.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; lang.opt -- Options for the gcc BRIG (HSAIL) front end.
  
! ; Copyright (C) 2015-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; lang.opt -- Options for the gcc BRIG (HSAIL) front end.
  
! ; Copyright (C) 2015-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/brig-builtins.def gcc-10.1.0/gcc/brig-builtins.def
*** gcc-9.3.0/gcc/brig-builtins.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/brig-builtins.def	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* This file contains the definitions and documentation for the
     HSAIL builtins used in the GNU compiler.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
--- 1,6 ----
  /* This file contains the definitions and documentation for the
     HSAIL builtins used in the GNU compiler.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     Contributed by Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
     for General Processor Tech.
diff -Nrcpad gcc-9.3.0/gcc/bt-load.c gcc-10.1.0/gcc/bt-load.c
*** gcc-9.3.0/gcc/bt-load.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/bt-load.c	Thu Jan  1 00:00:00 1970
***************
*** 1,1578 ****
- /* Perform branch target register load optimizations.
-    Copyright (C) 2001-2019 Free Software Foundation, Inc.
- 
- This file is part of GCC.
- 
- GCC is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License as published by the Free
- Software Foundation; either version 3, or (at your option) any later
- version.
- 
- GCC is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- for more details.
- 
- You should have received a copy of the GNU General Public License
- along with GCC; see the file COPYING3.  If not see
- <http://www.gnu.org/licenses/>.  */
- 
- #include "config.h"
- #include "system.h"
- #include "coretypes.h"
- #include "backend.h"
- #include "target.h"
- #include "rtl.h"
- #include "tree.h"
- #include "df.h"
- #include "insn-config.h"
- #include "regs.h"
- #include "memmodel.h"
- #include "emit-rtl.h"
- #include "recog.h"
- #include "diagnostic-core.h"
- #include "expr.h"
- #include "insn-attr.h"
- #include "tree-pass.h"
- #include "cfgrtl.h"
- #include "cfganal.h"
- #include "cfgcleanup.h"
- #include "cfgloop.h"
- #include "rtl-iter.h"
- #include "fibonacci_heap.h"
- 
- struct btr_def;
- 
- /* Target register optimizations - these are performed after reload.  */
- 
- struct btr_def_group
- {
-   btr_def_group *next;
-   rtx src;
-   btr_def *members;
- };
- 
- struct btr_user
- {
-   btr_user *next;
-   basic_block bb;
-   int luid;
-   rtx_insn *insn;
-   /* If INSN has a single use of a single branch register, then
-      USE points to it within INSN.  If there is more than
-      one branch register use, or the use is in some way ambiguous,
-      then USE is NULL.  */
-   rtx use;
-   int n_reaching_defs;
-   int first_reaching_def;
-   char other_use_this_block;
- };
- 
- /* btr_def structs appear on three lists:
-      1. A list of all btr_def structures (head is
- 	ALL_BTR_DEFS, linked by the NEXT field).
-      2. A list of branch reg definitions per basic block (head is
- 	BB_BTR_DEFS[i], linked by the NEXT_THIS_BB field).
-      3. A list of all branch reg definitions belonging to the same
- 	group (head is in a BTR_DEF_GROUP struct, linked by
- 	NEXT_THIS_GROUP field).  */
- 
- struct btr_def
- {
-   btr_def *next_this_bb;
-   btr_def *next_this_group;
-   basic_block bb;
-   int luid;
-   rtx_insn *insn;
-   int btr;
-   int cost;
-   /* For a branch register setting insn that has a constant
-      source (i.e. a label), group links together all the
-      insns with the same source.  For other branch register
-      setting insns, group is NULL.  */
-   btr_def_group *group;
-   btr_user *uses;
-   /* If this def has a reaching use which is not a simple use
-      in a branch instruction, then has_ambiguous_use will be true,
-      and we will not attempt to migrate this definition.  */
-   char has_ambiguous_use;
-   /* live_range is an approximation to the true live range for this
-      def/use web, because it records the set of blocks that contain
-      the live range.  There could be other live ranges for the same
-      branch register in that set of blocks, either in the block
-      containing the def (before the def), or in a block containing
-      a use (after the use).  If there are such other live ranges, then
-      other_btr_uses_before_def or other_btr_uses_after_use must be set true
-      as appropriate.  */
-   char other_btr_uses_before_def;
-   char other_btr_uses_after_use;
-   /* We set own_end when we have moved a definition into a dominator.
-      Thus, when a later combination removes this definition again, we know
-      to clear out trs_live_at_end again.  */
-   char own_end;
-   bitmap live_range;
- };
- 
- typedef fibonacci_heap <long, btr_def> btr_heap_t;
- typedef fibonacci_node <long, btr_def> btr_heap_node_t;
- 
- static int issue_rate;
- 
- static int basic_block_freq (const_basic_block);
- static int insn_sets_btr_p (const rtx_insn *, int, int *);
- static void find_btr_def_group (btr_def_group **, btr_def *);
- static btr_def *add_btr_def (btr_heap_t *, basic_block, int, rtx_insn *,
- 			    unsigned int, int, btr_def_group **);
- static btr_user *new_btr_user (basic_block, int, rtx_insn *);
- static void dump_hard_reg_set (HARD_REG_SET);
- static void dump_btrs_live (int);
- static void note_other_use_this_block (unsigned int, btr_user *);
- static void compute_defs_uses_and_gen (btr_heap_t *, btr_def **, btr_user **,
- 				       sbitmap *, sbitmap *, HARD_REG_SET *);
- static void compute_kill (sbitmap *, sbitmap *, HARD_REG_SET *);
- static void compute_out (sbitmap *bb_out, sbitmap *, sbitmap *, int);
- static void link_btr_uses (btr_def **, btr_user **, sbitmap *, sbitmap *, int);
- static void build_btr_def_use_webs (btr_heap_t *);
- static int block_at_edge_of_live_range_p (int, btr_def *);
- static void clear_btr_from_live_range (btr_def *def);
- static void add_btr_to_live_range (btr_def *, int);
- static void augment_live_range (bitmap, HARD_REG_SET *, basic_block,
- 				basic_block, int);
- static int choose_btr (HARD_REG_SET);
- static void combine_btr_defs (btr_def *, HARD_REG_SET *);
- static void btr_def_live_range (btr_def *, HARD_REG_SET *);
- static void move_btr_def (basic_block, int, btr_def *, bitmap, HARD_REG_SET *);
- static int migrate_btr_def (btr_def *, int);
- static void migrate_btr_defs (enum reg_class, int);
- static int can_move_up (const_basic_block, const rtx_insn *, int);
- static void note_btr_set (rtx, const_rtx, void *);
- 
- /* The following code performs code motion of target load instructions
-    (instructions that set branch target registers), to move them
-    forward away from the branch instructions and out of loops (or,
-    more generally, from a more frequently executed place to a less
-    frequently executed place).
-    Moving target load instructions further in front of the branch
-    instruction that uses the target register value means that the hardware
-    has a better chance of preloading the instructions at the branch
-    target by the time the branch is reached.  This avoids bubbles
-    when a taken branch needs to flush out the pipeline.
-    Moving target load instructions out of loops means they are executed
-    less frequently.  */
- 
- /* An obstack to hold the def-use web data structures built up for
-    migrating branch target load instructions.  */
- static struct obstack migrate_btrl_obstack;
- 
- /* Array indexed by basic block number, giving the set of registers
-    live in that block.  */
- static HARD_REG_SET *btrs_live;
- 
- /* Array indexed by basic block number, giving the set of registers live at
-   the end of that block, including any uses by a final jump insn, if any.  */
- static HARD_REG_SET *btrs_live_at_end;
- 
- /* Set of all target registers that we are willing to allocate.  */
- static HARD_REG_SET all_btrs;
- 
- /* Provide lower and upper bounds for target register numbers, so that
-    we don't need to search through all the hard registers all the time.  */
- static int first_btr, last_btr;
- 
- 
- 
- /* Return an estimate of the frequency of execution of block bb.  */
- static int
- basic_block_freq (const_basic_block bb)
- {
-   return bb->count.to_frequency (cfun);
- }
- 
- /* If the rtx at *XP references (sets or reads) any branch target
-    register, return one such register.  If EXCLUDEP is set, disregard
-    any references within that location.  */
- static rtx *
- find_btr_use (rtx *xp, rtx *excludep = 0)
- {
-   subrtx_ptr_iterator::array_type array;
-   FOR_EACH_SUBRTX_PTR (iter, array, xp, NONCONST)
-     {
-       rtx *loc = *iter;
-       if (loc == excludep)
- 	iter.skip_subrtxes ();
-       else
- 	{
- 	  const_rtx x = *loc;
- 	  if (REG_P (x)
- 	      && overlaps_hard_reg_set_p (all_btrs, GET_MODE (x), REGNO (x)))
- 	    return loc;
- 	}
-     }
-   return 0;
- }
- 
- /* Return true if insn is an instruction that sets a target register.
-    if CHECK_CONST is true, only return true if the source is constant.
-    If such a set is found and REGNO is nonzero, assign the register number
-    of the destination register to *REGNO.  */
- static int
- insn_sets_btr_p (const rtx_insn *insn, int check_const, int *regno)
- {
-   rtx set;
- 
-   if (NONJUMP_INSN_P (insn)
-       && (set = single_set (insn)))
-     {
-       rtx dest = SET_DEST (set);
-       rtx src = SET_SRC (set);
- 
-       if (GET_CODE (dest) == SUBREG)
- 	dest = XEXP (dest, 0);
- 
-       if (REG_P (dest)
- 	  && TEST_HARD_REG_BIT (all_btrs, REGNO (dest)))
- 	{
- 	  gcc_assert (!find_btr_use (&src));
- 
- 	  if (!check_const || CONSTANT_P (src))
- 	    {
- 	      if (regno)
- 		*regno = REGNO (dest);
- 	      return 1;
- 	    }
- 	}
-     }
-   return 0;
- }
- 
- /* Find the group that the target register definition DEF belongs
-    to in the list starting with *ALL_BTR_DEF_GROUPS.  If no such
-    group exists, create one.  Add def to the group.  */
- static void
- find_btr_def_group (btr_def_group **all_btr_def_groups, btr_def *def)
- {
-   if (insn_sets_btr_p (def->insn, 1, NULL))
-     {
-       btr_def_group *this_group;
-       rtx def_src = SET_SRC (single_set (def->insn));
- 
-       /* ?? This linear search is an efficiency concern, particularly
- 	 as the search will almost always fail to find a match.  */
-       for (this_group = *all_btr_def_groups;
- 	   this_group != NULL;
- 	   this_group = this_group->next)
- 	if (rtx_equal_p (def_src, this_group->src))
- 	  break;
- 
-       if (!this_group)
- 	{
- 	  this_group = XOBNEW (&migrate_btrl_obstack, btr_def_group);
- 	  this_group->src = def_src;
- 	  this_group->members = NULL;
- 	  this_group->next = *all_btr_def_groups;
- 	  *all_btr_def_groups = this_group;
- 	}
-       def->group = this_group;
-       def->next_this_group = this_group->members;
-       this_group->members = def;
-     }
-   else
-     def->group = NULL;
- }
- 
- /* Create a new target register definition structure, for a definition in
-    block BB, instruction INSN, and insert it into ALL_BTR_DEFS.  Return
-    the new definition.  */
- static btr_def *
- add_btr_def (btr_heap_t *all_btr_defs, basic_block bb, int insn_luid,
- 	     rtx_insn *insn,
- 	     unsigned int dest_reg, int other_btr_uses_before_def,
- 	     btr_def_group **all_btr_def_groups)
- {
-   btr_def *this_def = XOBNEW (&migrate_btrl_obstack, btr_def);
-   this_def->bb = bb;
-   this_def->luid = insn_luid;
-   this_def->insn = insn;
-   this_def->btr = dest_reg;
-   this_def->cost = basic_block_freq (bb);
-   this_def->has_ambiguous_use = 0;
-   this_def->other_btr_uses_before_def = other_btr_uses_before_def;
-   this_def->other_btr_uses_after_use = 0;
-   this_def->next_this_bb = NULL;
-   this_def->next_this_group = NULL;
-   this_def->uses = NULL;
-   this_def->live_range = NULL;
-   find_btr_def_group (all_btr_def_groups, this_def);
- 
-   all_btr_defs->insert (-this_def->cost, this_def);
- 
-   if (dump_file)
-     fprintf (dump_file,
-       "Found target reg definition: sets %u { bb %d, insn %d }%s priority %d\n",
- 	     dest_reg, bb->index, INSN_UID (insn),
- 	     (this_def->group ? "" : ":not const"), this_def->cost);
- 
-   return this_def;
- }
- 
- /* Create a new target register user structure, for a use in block BB,
-    instruction INSN.  Return the new user.  */
- static btr_user *
- new_btr_user (basic_block bb, int insn_luid, rtx_insn *insn)
- {
-   /* This instruction reads target registers.  We need
-      to decide whether we can replace all target register
-      uses easily.
-    */
-   rtx *usep = find_btr_use (&PATTERN (insn));
-   rtx use;
-   btr_user *user = NULL;
- 
-   if (usep)
-     {
-       int unambiguous_single_use;
- 
-       /* We want to ensure that USE is the only use of a target
- 	 register in INSN, so that we know that to rewrite INSN to use
- 	 a different target register, all we have to do is replace USE.  */
-       unambiguous_single_use = !find_btr_use (&PATTERN (insn), usep);
-       if (!unambiguous_single_use)
- 	usep = NULL;
-     }
-   use = usep ? *usep : NULL_RTX;
-   user = XOBNEW (&migrate_btrl_obstack, btr_user);
-   user->bb = bb;
-   user->luid = insn_luid;
-   user->insn = insn;
-   user->use = use;
-   user->other_use_this_block = 0;
-   user->next = NULL;
-   user->n_reaching_defs = 0;
-   user->first_reaching_def = -1;
- 
-   if (dump_file)
-     {
-       fprintf (dump_file, "Uses target reg: { bb %d, insn %d }",
- 	       bb->index, INSN_UID (insn));
- 
-       if (user->use)
- 	fprintf (dump_file, ": unambiguous use of reg %d\n",
- 		 REGNO (user->use));
-     }
- 
-   return user;
- }
- 
- /* Write the contents of S to the dump file.  */
- static void
- dump_hard_reg_set (HARD_REG_SET s)
- {
-   int reg;
-   for (reg = 0; reg < FIRST_PSEUDO_REGISTER; reg++)
-     if (TEST_HARD_REG_BIT (s, reg))
-       fprintf (dump_file, " %d", reg);
- }
- 
- /* Write the set of target regs live in block BB to the dump file.  */
- static void
- dump_btrs_live (int bb)
- {
-   fprintf (dump_file, "BB%d live:", bb);
-   dump_hard_reg_set (btrs_live[bb]);
-   fprintf (dump_file, "\n");
- }
- 
- /* REGNO is the number of a branch target register that is being used or
-    set.  USERS_THIS_BB is a list of preceding branch target register users;
-    If any of them use the same register, set their other_use_this_block
-    flag.  */
- static void
- note_other_use_this_block (unsigned int regno, btr_user *users_this_bb)
- {
-   btr_user *user;
- 
-   for (user = users_this_bb; user != NULL; user = user->next)
-     if (user->use && REGNO (user->use) == regno)
-       user->other_use_this_block = 1;
- }
- 
- struct defs_uses_info {
-   btr_user *users_this_bb;
-   HARD_REG_SET btrs_written_in_block;
-   HARD_REG_SET btrs_live_in_block;
-   sbitmap bb_gen;
-   sbitmap *btr_defset;
- };
- 
- /* Called via note_stores or directly to register stores into /
-    clobbers of a branch target register DEST that are not recognized as
-    straightforward definitions.  DATA points to information about the
-    current basic block that needs updating.  */
- static void
- note_btr_set (rtx dest, const_rtx set ATTRIBUTE_UNUSED, void *data)
- {
-   defs_uses_info *info = (defs_uses_info *) data;
-   int regno, end_regno;
- 
-   if (!REG_P (dest))
-     return;
-   regno = REGNO (dest);
-   end_regno = END_REGNO (dest);
-   for (; regno < end_regno; regno++)
-     if (TEST_HARD_REG_BIT (all_btrs, regno))
-       {
- 	note_other_use_this_block (regno, info->users_this_bb);
- 	SET_HARD_REG_BIT (info->btrs_written_in_block, regno);
- 	SET_HARD_REG_BIT (info->btrs_live_in_block, regno);
- 	bitmap_and_compl (info->bb_gen, info->bb_gen,
- 			    info->btr_defset[regno - first_btr]);
-       }
- }
- 
- static void
- compute_defs_uses_and_gen (btr_heap_t *all_btr_defs, btr_def **def_array,
- 			   btr_user **use_array, sbitmap *btr_defset,
- 			   sbitmap *bb_gen, HARD_REG_SET *btrs_written)
- {
-   /* Scan the code building up the set of all defs and all uses.
-      For each target register, build the set of defs of that register.
-      For each block, calculate the set of target registers
-      written in that block.
-      Also calculate the set of btrs ever live in that block.
-   */
-   int i;
-   int insn_luid = 0;
-   btr_def_group *all_btr_def_groups = NULL;
-   defs_uses_info info;
- 
-   bitmap_vector_clear (bb_gen, last_basic_block_for_fn (cfun));
-   for (i = NUM_FIXED_BLOCKS; i < last_basic_block_for_fn (cfun); i++)
-     {
-       basic_block bb = BASIC_BLOCK_FOR_FN (cfun, i);
-       int reg;
-       btr_def *defs_this_bb = NULL;
-       rtx_insn *insn;
-       rtx_insn *last;
-       int can_throw = 0;
- 
-       info.users_this_bb = NULL;
-       info.bb_gen = bb_gen[i];
-       info.btr_defset = btr_defset;
- 
-       CLEAR_HARD_REG_SET (info.btrs_live_in_block);
-       CLEAR_HARD_REG_SET (info.btrs_written_in_block);
-       for (reg = first_btr; reg <= last_btr; reg++)
- 	if (TEST_HARD_REG_BIT (all_btrs, reg)
- 	    && REGNO_REG_SET_P (df_get_live_in (bb), reg))
- 	  SET_HARD_REG_BIT (info.btrs_live_in_block, reg);
- 
-       for (insn = BB_HEAD (bb), last = NEXT_INSN (BB_END (bb));
- 	   insn != last;
- 	   insn = NEXT_INSN (insn), insn_luid++)
- 	{
- 	  if (INSN_P (insn))
- 	    {
- 	      int regno;
- 	      int insn_uid = INSN_UID (insn);
- 
- 	      if (insn_sets_btr_p (insn, 0, &regno))
- 		{
- 		  btr_def *def = add_btr_def (
- 		      all_btr_defs, bb, insn_luid, insn, regno,
- 		      TEST_HARD_REG_BIT (info.btrs_live_in_block, regno),
- 		      &all_btr_def_groups);
- 
- 		  def_array[insn_uid] = def;
- 		  SET_HARD_REG_BIT (info.btrs_written_in_block, regno);
- 		  SET_HARD_REG_BIT (info.btrs_live_in_block, regno);
- 		  bitmap_and_compl (bb_gen[i], bb_gen[i],
- 				      btr_defset[regno - first_btr]);
- 		  bitmap_set_bit (bb_gen[i], insn_uid);
- 		  def->next_this_bb = defs_this_bb;
- 		  defs_this_bb = def;
- 		  bitmap_set_bit (btr_defset[regno - first_btr], insn_uid);
- 		  note_other_use_this_block (regno, info.users_this_bb);
- 		}
- 	      /* Check for the blockage emitted by expand_nl_goto_receiver.  */
- 	      else if (cfun->has_nonlocal_label
- 		       && GET_CODE (PATTERN (insn)) == UNSPEC_VOLATILE)
- 		{
- 		  btr_user *user;
- 
- 		  /* Do the equivalent of calling note_other_use_this_block
- 		     for every target register.  */
- 		  for (user = info.users_this_bb; user != NULL;
- 		       user = user->next)
- 		    if (user->use)
- 		      user->other_use_this_block = 1;
- 		  IOR_HARD_REG_SET (info.btrs_written_in_block, all_btrs);
- 		  IOR_HARD_REG_SET (info.btrs_live_in_block, all_btrs);
- 		  bitmap_clear (info.bb_gen);
- 		}
- 	      else
- 		{
- 		  if (find_btr_use (&PATTERN (insn)))
- 		    {
- 		      btr_user *user = new_btr_user (bb, insn_luid, insn);
- 
- 		      use_array[insn_uid] = user;
- 		      if (user->use)
- 			SET_HARD_REG_BIT (info.btrs_live_in_block,
- 					  REGNO (user->use));
- 		      else
- 			{
- 			  int reg;
- 			  for (reg = first_btr; reg <= last_btr; reg++)
- 			    if (TEST_HARD_REG_BIT (all_btrs, reg)
- 				&& refers_to_regno_p (reg, user->insn))
- 			      {
- 				note_other_use_this_block (reg,
- 							   info.users_this_bb);
- 				SET_HARD_REG_BIT (info.btrs_live_in_block, reg);
- 			      }
- 			  note_stores (PATTERN (insn), note_btr_set, &info);
- 			}
- 		      user->next = info.users_this_bb;
- 		      info.users_this_bb = user;
- 		    }
- 		  if (CALL_P (insn))
- 		    {
- 		      HARD_REG_SET *clobbered = &call_used_reg_set;
- 		      HARD_REG_SET call_saved;
- 		      rtx pat = PATTERN (insn);
- 		      int i;
- 
- 		      /* Check for sibcall.  */
- 		      if (GET_CODE (pat) == PARALLEL)
- 			for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
- 			  if (ANY_RETURN_P (XVECEXP (pat, 0, i)))
- 			    {
- 			      COMPL_HARD_REG_SET (call_saved,
- 						  call_used_reg_set);
- 			      clobbered = &call_saved;
- 			    }
- 
- 		      for (regno = first_btr; regno <= last_btr; regno++)
- 			if (TEST_HARD_REG_BIT (*clobbered, regno))
- 			  note_btr_set (regno_reg_rtx[regno], NULL_RTX, &info);
- 		    }
- 		}
- 	    }
- 	}
- 
-       COPY_HARD_REG_SET (btrs_live[i], info.btrs_live_in_block);
-       COPY_HARD_REG_SET (btrs_written[i], info.btrs_written_in_block);
- 
-       REG_SET_TO_HARD_REG_SET (btrs_live_at_end[i], df_get_live_out (bb));
-       /* If this block ends in a jump insn, add any uses or even clobbers
- 	 of branch target registers that it might have.  */
-       for (insn = BB_END (bb); insn != BB_HEAD (bb) && ! INSN_P (insn); )
- 	insn = PREV_INSN (insn);
-       /* ??? for the fall-through edge, it would make sense to insert the
- 	 btr set on the edge, but that would require to split the block
- 	 early on so that we can distinguish between dominance from the fall
- 	 through edge - which can use the call-clobbered registers - from
- 	 dominance by the throw edge.  */
-       if (can_throw_internal (insn))
- 	{
- 	  HARD_REG_SET tmp;
- 
- 	  COPY_HARD_REG_SET (tmp, call_used_reg_set);
- 	  AND_HARD_REG_SET (tmp, all_btrs);
- 	  IOR_HARD_REG_SET (btrs_live_at_end[i], tmp);
- 	  can_throw = 1;
- 	}
-       if (can_throw || JUMP_P (insn))
- 	{
- 	  int regno;
- 
- 	  for (regno = first_btr; regno <= last_btr; regno++)
- 	    if (refers_to_regno_p (regno, insn))
- 	      SET_HARD_REG_BIT (btrs_live_at_end[i], regno);
- 	}
- 
-       if (dump_file)
- 	dump_btrs_live (i);
-     }
- }
- 
- static void
- compute_kill (sbitmap *bb_kill, sbitmap *btr_defset,
- 	      HARD_REG_SET *btrs_written)
- {
-   int i;
-   int regno;
- 
-   /* For each basic block, form the set BB_KILL - the set
-      of definitions that the block kills.  */
-   bitmap_vector_clear (bb_kill, last_basic_block_for_fn (cfun));
-   for (i = NUM_FIXED_BLOCKS; i < last_basic_block_for_fn (cfun); i++)
-     {
-       for (regno = first_btr; regno <= last_btr; regno++)
- 	if (TEST_HARD_REG_BIT (all_btrs, regno)
- 	    && TEST_HARD_REG_BIT (btrs_written[i], regno))
- 	  bitmap_ior (bb_kill[i], bb_kill[i],
- 			  btr_defset[regno - first_btr]);
-     }
- }
- 
- static void
- compute_out (sbitmap *bb_out, sbitmap *bb_gen, sbitmap *bb_kill, int max_uid)
- {
-   /* Perform iterative dataflow:
-       Initially, for all blocks, BB_OUT = BB_GEN.
-       For each block,
- 	BB_IN  = union over predecessors of BB_OUT(pred)
- 	BB_OUT = (BB_IN - BB_KILL) + BB_GEN
-      Iterate until the bb_out sets stop growing.  */
-   int i;
-   int changed;
-   auto_sbitmap bb_in (max_uid);
- 
-   for (i = NUM_FIXED_BLOCKS; i < last_basic_block_for_fn (cfun); i++)
-     bitmap_copy (bb_out[i], bb_gen[i]);
- 
-   changed = 1;
-   while (changed)
-     {
-       changed = 0;
-       for (i = NUM_FIXED_BLOCKS; i < last_basic_block_for_fn (cfun); i++)
- 	{
- 	  bitmap_union_of_preds (bb_in, bb_out, BASIC_BLOCK_FOR_FN (cfun, i));
- 	  changed |= bitmap_ior_and_compl (bb_out[i], bb_gen[i],
- 					       bb_in, bb_kill[i]);
- 	}
-     }
- }
- 
- static void
- link_btr_uses (btr_def **def_array, btr_user **use_array, sbitmap *bb_out,
- 	       sbitmap *btr_defset, int max_uid)
- {
-   int i;
-   auto_sbitmap reaching_defs (max_uid);
- 
-   /* Link uses to the uses lists of all of their reaching defs.
-      Count up the number of reaching defs of each use.  */
-   for (i = NUM_FIXED_BLOCKS; i < last_basic_block_for_fn (cfun); i++)
-     {
-       basic_block bb = BASIC_BLOCK_FOR_FN (cfun, i);
-       rtx_insn *insn;
-       rtx_insn *last;
- 
-       bitmap_union_of_preds (reaching_defs, bb_out, BASIC_BLOCK_FOR_FN (cfun, i));
-       for (insn = BB_HEAD (bb), last = NEXT_INSN (BB_END (bb));
- 	   insn != last;
- 	   insn = NEXT_INSN (insn))
- 	{
- 	  if (INSN_P (insn))
- 	    {
- 	      int insn_uid = INSN_UID (insn);
- 
- 	      btr_def *def   = def_array[insn_uid];
- 	      btr_user *user = use_array[insn_uid];
- 	      if (def != NULL)
- 		{
- 		  /* Remove all reaching defs of regno except
- 		     for this one.  */
- 		  bitmap_and_compl (reaching_defs, reaching_defs,
- 				      btr_defset[def->btr - first_btr]);
- 		  bitmap_set_bit (reaching_defs, insn_uid);
- 		}
- 
- 	      if (user != NULL)
- 		{
- 		  /* Find all the reaching defs for this use.  */
- 		  auto_sbitmap reaching_defs_of_reg (max_uid);
- 		  unsigned int uid = 0;
- 		  sbitmap_iterator sbi;
- 
- 		  if (user->use)
- 		    bitmap_and (
- 		      reaching_defs_of_reg,
- 		      reaching_defs,
- 		      btr_defset[REGNO (user->use) - first_btr]);
- 		  else
- 		    {
- 		      int reg;
- 
- 		      bitmap_clear (reaching_defs_of_reg);
- 		      for (reg = first_btr; reg <= last_btr; reg++)
- 			if (TEST_HARD_REG_BIT (all_btrs, reg)
- 			    && refers_to_regno_p (reg, user->insn))
- 			  bitmap_or_and (reaching_defs_of_reg,
- 			    reaching_defs_of_reg,
- 			    reaching_defs,
- 			    btr_defset[reg - first_btr]);
- 		    }
- 		  EXECUTE_IF_SET_IN_BITMAP (reaching_defs_of_reg, 0, uid, sbi)
- 		    {
- 		      btr_def *def = def_array[uid];
- 
- 		      /* We now know that def reaches user.  */
- 
- 		      if (dump_file)
- 			fprintf (dump_file,
- 			  "Def in insn %d reaches use in insn %d\n",
- 			  uid, insn_uid);
- 
- 		      user->n_reaching_defs++;
- 		      if (!user->use)
- 			def->has_ambiguous_use = 1;
- 		      if (user->first_reaching_def != -1)
- 			{ /* There is more than one reaching def.  This is
- 			     a rare case, so just give up on this def/use
- 			     web when it occurs.  */
- 			  def->has_ambiguous_use = 1;
- 			  def_array[user->first_reaching_def]
- 			    ->has_ambiguous_use = 1;
- 			  if (dump_file)
- 			    fprintf (dump_file,
- 				     "(use %d has multiple reaching defs)\n",
- 				     insn_uid);
- 			}
- 		      else
- 			user->first_reaching_def = uid;
- 		      if (user->other_use_this_block)
- 			def->other_btr_uses_after_use = 1;
- 		      user->next = def->uses;
- 		      def->uses = user;
- 		    }
- 		}
- 
- 	      if (CALL_P (insn))
- 		{
- 		  int regno;
- 
- 		  for (regno = first_btr; regno <= last_btr; regno++)
- 		    if (TEST_HARD_REG_BIT (all_btrs, regno)
- 			&& TEST_HARD_REG_BIT (call_used_reg_set, regno))
- 		      bitmap_and_compl (reaching_defs, reaching_defs,
- 					  btr_defset[regno - first_btr]);
- 		}
- 	    }
- 	}
-     }
- }
- 
- static void
- build_btr_def_use_webs (btr_heap_t *all_btr_defs)
- {
-   const int max_uid = get_max_uid ();
-   btr_def  **def_array   = XCNEWVEC (btr_def *, max_uid);
-   btr_user **use_array   = XCNEWVEC (btr_user *, max_uid);
-   sbitmap *btr_defset   = sbitmap_vector_alloc (
- 			   (last_btr - first_btr) + 1, max_uid);
-   sbitmap *bb_gen = sbitmap_vector_alloc (last_basic_block_for_fn (cfun),
- 					  max_uid);
-   HARD_REG_SET *btrs_written = XCNEWVEC (HARD_REG_SET,
- 					 last_basic_block_for_fn (cfun));
-   sbitmap *bb_kill;
-   sbitmap *bb_out;
- 
-   bitmap_vector_clear (btr_defset, (last_btr - first_btr) + 1);
- 
-   compute_defs_uses_and_gen (all_btr_defs, def_array, use_array, btr_defset,
- 			     bb_gen, btrs_written);
- 
-   bb_kill = sbitmap_vector_alloc (last_basic_block_for_fn (cfun), max_uid);
-   compute_kill (bb_kill, btr_defset, btrs_written);
-   free (btrs_written);
- 
-   bb_out = sbitmap_vector_alloc (last_basic_block_for_fn (cfun), max_uid);
-   compute_out (bb_out, bb_gen, bb_kill, max_uid);
- 
-   sbitmap_vector_free (bb_gen);
-   sbitmap_vector_free (bb_kill);
- 
-   link_btr_uses (def_array, use_array, bb_out, btr_defset, max_uid);
- 
-   sbitmap_vector_free (bb_out);
-   sbitmap_vector_free (btr_defset);
-   free (use_array);
-   free (def_array);
- }
- 
- /* Return true if basic block BB contains the start or end of the
-    live range of the definition DEF, AND there are other live
-    ranges of the same target register that include BB.  */
- static int
- block_at_edge_of_live_range_p (int bb, btr_def *def)
- {
-   if (def->other_btr_uses_before_def
-       && BASIC_BLOCK_FOR_FN (cfun, bb) == def->bb)
-     return 1;
-   else if (def->other_btr_uses_after_use)
-     {
-       btr_user *user;
-       for (user = def->uses; user != NULL; user = user->next)
- 	if (BASIC_BLOCK_FOR_FN (cfun, bb) == user->bb)
- 	  return 1;
-     }
-   return 0;
- }
- 
- /* We are removing the def/use web DEF.  The target register
-    used in this web is therefore no longer live in the live range
-    of this web, so remove it from the live set of all basic blocks
-    in the live range of the web.
-    Blocks at the boundary of the live range may contain other live
-    ranges for the same target register, so we have to be careful
-    to remove the target register from the live set of these blocks
-    only if they do not contain other live ranges for the same register.  */
- static void
- clear_btr_from_live_range (btr_def *def)
- {
-   unsigned bb;
-   bitmap_iterator bi;
- 
-   EXECUTE_IF_SET_IN_BITMAP (def->live_range, 0, bb, bi)
-     {
-       if ((!def->other_btr_uses_before_def
- 	   && !def->other_btr_uses_after_use)
- 	  || !block_at_edge_of_live_range_p (bb, def))
- 	{
- 	  CLEAR_HARD_REG_BIT (btrs_live[bb], def->btr);
- 	  CLEAR_HARD_REG_BIT (btrs_live_at_end[bb], def->btr);
- 	  if (dump_file)
- 	    dump_btrs_live (bb);
- 	}
-     }
-  if (def->own_end)
-    CLEAR_HARD_REG_BIT (btrs_live_at_end[def->bb->index], def->btr);
- }
- 
- 
- /* We are adding the def/use web DEF.  Add the target register used
-    in this web to the live set of all of the basic blocks that contain
-    the live range of the web.
-    If OWN_END is set, also show that the register is live from our
-    definitions at the end of the basic block where it is defined.  */
- static void
- add_btr_to_live_range (btr_def *def, int own_end)
- {
-   unsigned bb;
-   bitmap_iterator bi;
- 
-   EXECUTE_IF_SET_IN_BITMAP (def->live_range, 0, bb, bi)
-     {
-       SET_HARD_REG_BIT (btrs_live[bb], def->btr);
-       SET_HARD_REG_BIT (btrs_live_at_end[bb], def->btr);
-       if (dump_file)
- 	dump_btrs_live (bb);
-     }
-   if (own_end)
-     {
-       SET_HARD_REG_BIT (btrs_live_at_end[def->bb->index], def->btr);
-       def->own_end = 1;
-     }
- }
- 
- /* Update a live range to contain the basic block NEW_BLOCK, and all
-    blocks on paths between the existing live range and NEW_BLOCK.
-    HEAD is a block contained in the existing live range that dominates
-    all other blocks in the existing live range.
-    Also add to the set BTRS_LIVE_IN_RANGE all target registers that
-    are live in the blocks that we add to the live range.
-    If FULL_RANGE is set, include the full live range of NEW_BB;
-    otherwise, if NEW_BB dominates HEAD_BB, only add registers that
-    are life at the end of NEW_BB for NEW_BB itself.
-    It is a precondition that either NEW_BLOCK dominates HEAD,or
-    HEAD dom NEW_BLOCK.  This is used to speed up the
-    implementation of this function.  */
- static void
- augment_live_range (bitmap live_range, HARD_REG_SET *btrs_live_in_range,
- 		    basic_block head_bb, basic_block new_bb, int full_range)
- {
-   basic_block *worklist, *tos;
- 
-   tos = worklist = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun) + 1);
- 
-   if (dominated_by_p (CDI_DOMINATORS, new_bb, head_bb))
-     {
-       if (new_bb == head_bb)
- 	{
- 	  if (full_range)
- 	    IOR_HARD_REG_SET (*btrs_live_in_range, btrs_live[new_bb->index]);
- 	  free (tos);
- 	  return;
- 	}
-       *tos++ = new_bb;
-     }
-   else
-     {
-       edge e;
-       edge_iterator ei;
-       int new_block = new_bb->index;
- 
-       gcc_assert (dominated_by_p (CDI_DOMINATORS, head_bb, new_bb));
- 
-       IOR_HARD_REG_SET (*btrs_live_in_range, btrs_live[head_bb->index]);
-       bitmap_set_bit (live_range, new_block);
-       /* A previous btr migration could have caused a register to be
- 	live just at the end of new_block which we need in full, so
- 	use trs_live_at_end even if full_range is set.  */
-       IOR_HARD_REG_SET (*btrs_live_in_range, btrs_live_at_end[new_block]);
-       if (full_range)
- 	IOR_HARD_REG_SET (*btrs_live_in_range, btrs_live[new_block]);
-       if (dump_file)
- 	{
- 	  fprintf (dump_file,
- 		   "Adding end of block %d and rest of %d to live range\n",
- 		   new_block, head_bb->index);
- 	  fprintf (dump_file,"Now live btrs are ");
- 	  dump_hard_reg_set (*btrs_live_in_range);
- 	  fprintf (dump_file, "\n");
- 	}
-       FOR_EACH_EDGE (e, ei, head_bb->preds)
- 	*tos++ = e->src;
-     }
- 
-   while (tos != worklist)
-     {
-       basic_block bb = *--tos;
-       if (!bitmap_bit_p (live_range, bb->index))
- 	{
- 	  edge e;
- 	  edge_iterator ei;
- 
- 	  bitmap_set_bit (live_range, bb->index);
- 	  IOR_HARD_REG_SET (*btrs_live_in_range,
- 	    btrs_live[bb->index]);
- 	  /* A previous btr migration could have caused a register to be
- 	     live just at the end of a block which we need in full.  */
- 	  IOR_HARD_REG_SET (*btrs_live_in_range,
- 	    btrs_live_at_end[bb->index]);
- 	  if (dump_file)
- 	    {
- 	      fprintf (dump_file,
- 		"Adding block %d to live range\n", bb->index);
- 	      fprintf (dump_file,"Now live btrs are ");
- 	      dump_hard_reg_set (*btrs_live_in_range);
- 	      fprintf (dump_file, "\n");
- 	    }
- 
- 	  FOR_EACH_EDGE (e, ei, bb->preds)
- 	    {
- 	      basic_block pred = e->src;
- 	      if (!bitmap_bit_p (live_range, pred->index))
- 		*tos++ = pred;
- 	    }
- 	}
-     }
- 
-   free (worklist);
- }
- 
- /*  Return the most desirable target register that is not in
-     the set USED_BTRS.  */
- static int
- choose_btr (HARD_REG_SET used_btrs)
- {
-   int i;
- 
-   if (!hard_reg_set_subset_p (all_btrs, used_btrs))
-     for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
-       {
- #ifdef REG_ALLOC_ORDER
- 	int regno = reg_alloc_order[i];
- #else
- 	int regno = i;
- #endif
- 	if (TEST_HARD_REG_BIT (all_btrs, regno)
- 	    && !TEST_HARD_REG_BIT (used_btrs, regno))
- 	  return regno;
-       }
-   return -1;
- }
- 
- /* Calculate the set of basic blocks that contain the live range of
-    the def/use web DEF.
-    Also calculate the set of target registers that are live at time
-    in this live range, but ignore the live range represented by DEF
-    when calculating this set.  */
- static void
- btr_def_live_range (btr_def *def, HARD_REG_SET *btrs_live_in_range)
- {
-   if (!def->live_range)
-     {
-       btr_user *user;
- 
-       def->live_range = BITMAP_ALLOC (NULL);
- 
-       bitmap_set_bit (def->live_range, def->bb->index);
-       COPY_HARD_REG_SET (*btrs_live_in_range,
- 			 (flag_btr_bb_exclusive
- 			  ? btrs_live : btrs_live_at_end)[def->bb->index]);
- 
-       for (user = def->uses; user != NULL; user = user->next)
- 	augment_live_range (def->live_range, btrs_live_in_range,
- 			    def->bb, user->bb,
- 			    (flag_btr_bb_exclusive
- 			     || user->insn != BB_END (def->bb)
- 			     || !JUMP_P (user->insn)));
-     }
-   else
-     {
-       /* def->live_range is accurate, but we need to recompute
- 	 the set of target registers live over it, because migration
- 	 of other PT instructions may have affected it.
-       */
-       unsigned bb;
-       unsigned def_bb = flag_btr_bb_exclusive ? -1 : def->bb->index;
-       bitmap_iterator bi;
- 
-       CLEAR_HARD_REG_SET (*btrs_live_in_range);
-       EXECUTE_IF_SET_IN_BITMAP (def->live_range, 0, bb, bi)
- 	{
- 	  IOR_HARD_REG_SET (*btrs_live_in_range,
- 			    (def_bb == bb
- 			     ? btrs_live_at_end : btrs_live) [bb]);
- 	}
-     }
-   if (!def->other_btr_uses_before_def &&
-       !def->other_btr_uses_after_use)
-     CLEAR_HARD_REG_BIT (*btrs_live_in_range, def->btr);
- }
- 
- /* Merge into the def/use web DEF any other def/use webs in the same
-    group that are dominated by DEF, provided that there is a target
-    register available to allocate to the merged web.  */
- static void
- combine_btr_defs (btr_def *def, HARD_REG_SET *btrs_live_in_range)
- {
-   btr_def *other_def;
- 
-   for (other_def = def->group->members;
-        other_def != NULL;
-        other_def = other_def->next_this_group)
-     {
-       if (other_def != def
- 	  && other_def->uses != NULL
- 	  && ! other_def->has_ambiguous_use
- 	  && dominated_by_p (CDI_DOMINATORS, other_def->bb, def->bb))
- 	{
- 	  /* def->bb dominates the other def, so def and other_def could
- 	     be combined.  */
- 	  /* Merge their live ranges, and get the set of
- 	     target registers live over the merged range.  */
- 	  int btr;
- 	  HARD_REG_SET combined_btrs_live;
- 	  auto_bitmap combined_live_range;
- 	  btr_user *user;
- 
- 	  if (other_def->live_range == NULL)
- 	    {
- 	      HARD_REG_SET dummy_btrs_live_in_range;
- 	      btr_def_live_range (other_def, &dummy_btrs_live_in_range);
- 	    }
- 	  COPY_HARD_REG_SET (combined_btrs_live, *btrs_live_in_range);
- 	  bitmap_copy (combined_live_range, def->live_range);
- 
- 	  for (user = other_def->uses; user != NULL; user = user->next)
- 	    augment_live_range (combined_live_range, &combined_btrs_live,
- 				def->bb, user->bb,
- 				(flag_btr_bb_exclusive
- 				 || user->insn != BB_END (def->bb)
- 				 || !JUMP_P (user->insn)));
- 
- 	  btr = choose_btr (combined_btrs_live);
- 	  if (btr != -1)
- 	    {
- 	      /* We can combine them.  */
- 	      if (dump_file)
- 		fprintf (dump_file,
- 			 "Combining def in insn %d with def in insn %d\n",
- 			 INSN_UID (other_def->insn), INSN_UID (def->insn));
- 
- 	      def->btr = btr;
- 	      user = other_def->uses;
- 	      while (user != NULL)
- 		{
- 		  btr_user *next = user->next;
- 
- 		  user->next = def->uses;
- 		  def->uses = user;
- 		  user = next;
- 		}
- 	      /* Combining def/use webs can make target registers live
- 		 after uses where they previously were not.  This means
- 		 some REG_DEAD notes may no longer be correct.  We could
- 		 be more precise about this if we looked at the combined
- 		 live range, but here I just delete any REG_DEAD notes
- 		 in case they are no longer correct.  */
- 	      for (user = def->uses; user != NULL; user = user->next)
- 		remove_note (user->insn,
- 			     find_regno_note (user->insn, REG_DEAD,
- 					      REGNO (user->use)));
- 	      clear_btr_from_live_range (other_def);
- 	      other_def->uses = NULL;
- 	      bitmap_copy (def->live_range, combined_live_range);
- 	      if (other_def->btr == btr && other_def->other_btr_uses_after_use)
- 		def->other_btr_uses_after_use = 1;
- 	      COPY_HARD_REG_SET (*btrs_live_in_range, combined_btrs_live);
- 
- 	      /* Delete the old target register initialization.  */
- 	      delete_insn (other_def->insn);
- 
- 	    }
- 	}
-     }
- }
- 
- /* Move the definition DEF from its current position to basic
-    block NEW_DEF_BB, and modify it to use branch target register BTR.
-    Delete the old defining insn, and insert a new one in NEW_DEF_BB.
-    Update all reaching uses of DEF in the RTL to use BTR.
-    If this new position means that other defs in the
-    same group can be combined with DEF then combine them.  */
- static void
- move_btr_def (basic_block new_def_bb, int btr, btr_def *def, bitmap live_range,
- 	     HARD_REG_SET *btrs_live_in_range)
- {
-   /* We can move the instruction.
-      Set a target register in block NEW_DEF_BB to the value
-      needed for this target register definition.
-      Replace all uses of the old target register definition by
-      uses of the new definition.  Delete the old definition.  */
-   basic_block b = new_def_bb;
-   rtx_insn *insp = BB_HEAD (b);
-   rtx_insn *old_insn = def->insn;
-   rtx src;
-   rtx btr_rtx;
-   rtx_insn *new_insn;
-   machine_mode btr_mode;
-   btr_user *user;
-   rtx set;
- 
-   if (dump_file)
-     fprintf(dump_file, "migrating to basic block %d, using reg %d\n",
- 	    new_def_bb->index, btr);
- 
-   clear_btr_from_live_range (def);
-   def->btr = btr;
-   def->bb = new_def_bb;
-   def->luid = 0;
-   def->cost = basic_block_freq (new_def_bb);
-   bitmap_copy (def->live_range, live_range);
-   combine_btr_defs (def, btrs_live_in_range);
-   btr = def->btr;
-   def->other_btr_uses_before_def
-     = TEST_HARD_REG_BIT (btrs_live[b->index], btr) ? 1 : 0;
-   add_btr_to_live_range (def, 1);
-   if (LABEL_P (insp))
-     insp = NEXT_INSN (insp);
-   /* N.B.: insp is expected to be NOTE_INSN_BASIC_BLOCK now.  Some
-      optimizations can result in insp being both first and last insn of
-      its basic block.  */
-   /* ?? some assertions to check that insp is sensible? */
- 
-   if (def->other_btr_uses_before_def)
-     {
-       insp = BB_END (b);
-       for (insp = BB_END (b); ! INSN_P (insp); insp = PREV_INSN (insp))
- 	gcc_assert (insp != BB_HEAD (b));
- 
-       if (JUMP_P (insp) || can_throw_internal (insp))
- 	insp = PREV_INSN (insp);
-     }
- 
-   set = single_set (old_insn);
-   src = SET_SRC (set);
-   btr_mode = GET_MODE (SET_DEST (set));
-   btr_rtx = gen_rtx_REG (btr_mode, btr);
- 
-   new_insn = gen_move_insn (btr_rtx, src);
- 
-   /* Insert target register initialization at head of basic block.  */
-   def->insn = emit_insn_after (new_insn, insp);
- 
-   df_set_regs_ever_live (btr, true);
- 
-   if (dump_file)
-     fprintf (dump_file, "New pt is insn %d, inserted after insn %d\n",
- 	     INSN_UID (def->insn), INSN_UID (insp));
- 
-   /* Delete the old target register initialization.  */
-   delete_insn (old_insn);
- 
-   /* Replace each use of the old target register by a use of the new target
-      register.  */
-   for (user = def->uses; user != NULL; user = user->next)
-     {
-       /* Some extra work here to ensure consistent modes, because
- 	 it seems that a target register REG rtx can be given a different
- 	 mode depending on the context (surely that should not be
- 	 the case?).  */
-       rtx replacement_rtx;
-       if (GET_MODE (user->use) == GET_MODE (btr_rtx)
- 	  || GET_MODE (user->use) == VOIDmode)
- 	replacement_rtx = btr_rtx;
-       else
- 	replacement_rtx = gen_rtx_REG (GET_MODE (user->use), btr);
-       validate_replace_rtx (user->use, replacement_rtx, user->insn);
-       user->use = replacement_rtx;
-     }
- }
- 
- /* We anticipate intra-block scheduling to be done.  See if INSN could move
-    up within BB by N_INSNS.  */
- static int
- can_move_up (const_basic_block bb, const rtx_insn *insn, int n_insns)
- {
-   while (insn != BB_HEAD (bb) && n_insns > 0)
-     {
-       insn = PREV_INSN (insn);
-       /* ??? What if we have an anti-dependency that actually prevents the
- 	 scheduler from doing the move?  We'd like to re-allocate the register,
- 	 but not necessarily put the load into another basic block.  */
-       if (INSN_P (insn))
- 	n_insns--;
-     }
-   return n_insns <= 0;
- }
- 
- /* Attempt to migrate the target register definition DEF to an
-    earlier point in the flowgraph.
- 
-    It is a precondition of this function that DEF is migratable:
-    i.e. it has a constant source, and all uses are unambiguous.
- 
-    Only migrations that reduce the cost of DEF will be made.
-    MIN_COST is the lower bound on the cost of the DEF after migration.
-    If we migrate DEF so that its cost falls below MIN_COST,
-    then we do not attempt to migrate further.  The idea is that
-    we migrate definitions in a priority order based on their cost,
-    when the cost of this definition falls below MIN_COST, then
-    there is another definition with cost == MIN_COST which now
-    has a higher priority than this definition.
- 
-    Return nonzero if there may be benefit from attempting to
-    migrate this DEF further (i.e. we have reduced the cost below
-    MIN_COST, but we may be able to reduce it further).
-    Return zero if no further migration is possible.  */
- static int
- migrate_btr_def (btr_def *def, int min_cost)
- {
-   HARD_REG_SET btrs_live_in_range;
-   int btr_used_near_def = 0;
-   int def_basic_block_freq;
-   basic_block attempt;
-   int give_up = 0;
-   int def_moved = 0;
-   btr_user *user;
-   int def_latency;
- 
-   if (dump_file)
-     fprintf (dump_file,
- 	     "Attempting to migrate pt from insn %d (cost = %d, min_cost = %d) ... ",
- 	     INSN_UID (def->insn), def->cost, min_cost);
- 
-   if (!def->group || def->has_ambiguous_use)
-     /* These defs are not migratable.  */
-     {
-       if (dump_file)
- 	fprintf (dump_file, "it's not migratable\n");
-       return 0;
-     }
- 
-   if (!def->uses)
-     /* We have combined this def with another in the same group, so
-        no need to consider it further.
-     */
-     {
-       if (dump_file)
- 	fprintf (dump_file, "it's already combined with another pt\n");
-       return 0;
-     }
- 
-   btr_def_live_range (def, &btrs_live_in_range);
-   auto_bitmap live_range;
-   bitmap_copy (live_range, def->live_range);
- 
- #ifdef INSN_SCHEDULING
-   def_latency = insn_default_latency (def->insn) * issue_rate;
- #else
-   def_latency = issue_rate;
- #endif
- 
-   for (user = def->uses; user != NULL; user = user->next)
-     {
-       if (user->bb == def->bb
- 	  && user->luid > def->luid
- 	  && (def->luid + def_latency) > user->luid
- 	  && ! can_move_up (def->bb, def->insn,
- 			    (def->luid + def_latency) - user->luid))
- 	{
- 	  btr_used_near_def = 1;
- 	  break;
- 	}
-     }
- 
-   def_basic_block_freq = basic_block_freq (def->bb);
- 
-   for (attempt = get_immediate_dominator (CDI_DOMINATORS, def->bb);
-        !give_up && attempt && attempt != ENTRY_BLOCK_PTR_FOR_FN (cfun)
-        && def->cost >= min_cost;
-        attempt = get_immediate_dominator (CDI_DOMINATORS, attempt))
-     {
-       /* Try to move the instruction that sets the target register into
- 	 basic block ATTEMPT.  */
-       int try_freq = basic_block_freq (attempt);
-       edge_iterator ei;
-       edge e;
- 
-       /* If ATTEMPT has abnormal edges, skip it.  */
-       FOR_EACH_EDGE (e, ei, attempt->succs)
- 	if (e->flags & EDGE_COMPLEX)
- 	  break;
-       if (e)
- 	continue;
- 
-       if (dump_file)
- 	fprintf (dump_file, "trying block %d ...", attempt->index);
- 
-       if (try_freq < def_basic_block_freq
- 	  || (try_freq == def_basic_block_freq && btr_used_near_def))
- 	{
- 	  int btr;
- 	  augment_live_range (live_range, &btrs_live_in_range, def->bb, attempt,
- 			      flag_btr_bb_exclusive);
- 	  if (dump_file)
- 	    {
- 	      fprintf (dump_file, "Now btrs live in range are: ");
- 	      dump_hard_reg_set (btrs_live_in_range);
- 	      fprintf (dump_file, "\n");
- 	    }
- 	  btr = choose_btr (btrs_live_in_range);
- 	  if (btr != -1)
- 	    {
- 	      move_btr_def (attempt, btr, def, live_range, &btrs_live_in_range);
- 	      bitmap_copy (live_range, def->live_range);
- 	      btr_used_near_def = 0;
- 	      def_moved = 1;
- 	      def_basic_block_freq = basic_block_freq (def->bb);
- 	    }
- 	  else
- 	    {
- 	      /* There are no free target registers available to move
- 		 this far forward, so give up */
- 	      give_up = 1;
- 	      if (dump_file)
- 		fprintf (dump_file,
- 			 "giving up because there are no free target registers\n");
- 	    }
- 
- 	}
-     }
-   if (!def_moved)
-     {
-       give_up = 1;
-       if (dump_file)
- 	fprintf (dump_file, "failed to move\n");
-     }
- 
-   return !give_up;
- }
- 
- /* Attempt to move instructions that set target registers earlier
-    in the flowgraph, away from their corresponding uses.  */
- static void
- migrate_btr_defs (enum reg_class btr_class, int allow_callee_save)
- {
-   btr_heap_t all_btr_defs (LONG_MIN);
-   int reg;
- 
-   gcc_obstack_init (&migrate_btrl_obstack);
-   if (dump_file)
-     {
-       int i;
- 
-       for (i = NUM_FIXED_BLOCKS; i < last_basic_block_for_fn (cfun); i++)
- 	{
- 	  basic_block bb = BASIC_BLOCK_FOR_FN (cfun, i);
- 	  fprintf (dump_file, "Basic block %d: count = ", i);
- 	  bb->count.dump (dump_file);
- 	  fprintf (dump_file, " loop-depth = %d idom = %d\n",
- 		   bb_loop_depth (bb),
- 		   get_immediate_dominator (CDI_DOMINATORS, bb)->index);
- 	}
-     }
- 
-   CLEAR_HARD_REG_SET (all_btrs);
-   for (first_btr = -1, reg = 0; reg < FIRST_PSEUDO_REGISTER; reg++)
-     if (TEST_HARD_REG_BIT (reg_class_contents[(int) btr_class], reg)
- 	&& (allow_callee_save || call_used_regs[reg]
- 	    || df_regs_ever_live_p (reg)))
-       {
- 	SET_HARD_REG_BIT (all_btrs, reg);
- 	last_btr = reg;
- 	if (first_btr < 0)
- 	  first_btr = reg;
-       }
- 
-   btrs_live = XCNEWVEC (HARD_REG_SET, last_basic_block_for_fn (cfun));
-   btrs_live_at_end = XCNEWVEC (HARD_REG_SET, last_basic_block_for_fn (cfun));
- 
-   build_btr_def_use_webs (&all_btr_defs);
- 
-   while (!all_btr_defs.empty ())
-     {
-       int min_cost = -all_btr_defs.min_key ();
-       btr_def *def = all_btr_defs.extract_min ();
-       if (migrate_btr_def (def, min_cost))
- 	{
- 	  all_btr_defs.insert (-def->cost, def);
- 	  if (dump_file)
- 	    {
- 	      fprintf (dump_file,
- 		"Putting insn %d back on queue with priority %d\n",
- 		INSN_UID (def->insn), def->cost);
- 	    }
- 	}
-       else
- 	BITMAP_FREE (def->live_range);
-     }
- 
-   free (btrs_live);
-   free (btrs_live_at_end);
-   obstack_free (&migrate_btrl_obstack, NULL);
- }
- 
- static void
- branch_target_load_optimize (bool after_prologue_epilogue_gen)
- {
-   enum reg_class klass
-     = (enum reg_class) targetm.branch_target_register_class ();
-   if (klass != NO_REGS)
-     {
-       /* Initialize issue_rate.  */
-       if (targetm.sched.issue_rate)
- 	issue_rate = targetm.sched.issue_rate ();
-       else
- 	issue_rate = 1;
- 
-       if (!after_prologue_epilogue_gen)
- 	{
- 	  /* Build the CFG for migrate_btr_defs.  */
- #if 1
- 	  /* This may or may not be needed, depending on where we
- 	     run this phase.  */
- 	  cleanup_cfg (optimize ? CLEANUP_EXPENSIVE : 0);
- #endif
- 	}
-       df_analyze ();
- 
- 
-       /* Dominator info is also needed for migrate_btr_def.  */
-       calculate_dominance_info (CDI_DOMINATORS);
-       migrate_btr_defs (klass,
- 		       (targetm.branch_target_register_callee_saved
- 			(after_prologue_epilogue_gen)));
- 
-       free_dominance_info (CDI_DOMINATORS);
-     }
- }
- 
- namespace {
- 
- const pass_data pass_data_branch_target_load_optimize1 =
- {
-   RTL_PASS, /* type */
-   "btl1", /* name */
-   OPTGROUP_NONE, /* optinfo_flags */
-   TV_NONE, /* tv_id */
-   0, /* properties_required */
-   0, /* properties_provided */
-   0, /* properties_destroyed */
-   0, /* todo_flags_start */
-   0, /* todo_flags_finish */
- };
- 
- class pass_branch_target_load_optimize1 : public rtl_opt_pass
- {
- public:
-   pass_branch_target_load_optimize1 (gcc::context *ctxt)
-     : rtl_opt_pass (pass_data_branch_target_load_optimize1, ctxt)
-   {}
- 
-   /* opt_pass methods: */
-   virtual bool gate (function *) { return flag_branch_target_load_optimize; }
-   virtual unsigned int execute (function *)
-     {
-       branch_target_load_optimize (epilogue_completed);
-       return 0;
-     }
- 
- }; // class pass_branch_target_load_optimize1
- 
- } // anon namespace
- 
- rtl_opt_pass *
- make_pass_branch_target_load_optimize1 (gcc::context *ctxt)
- {
-   return new pass_branch_target_load_optimize1 (ctxt);
- }
- 
- 
- namespace {
- 
- const pass_data pass_data_branch_target_load_optimize2 =
- {
-   RTL_PASS, /* type */
-   "btl2", /* name */
-   OPTGROUP_NONE, /* optinfo_flags */
-   TV_NONE, /* tv_id */
-   0, /* properties_required */
-   0, /* properties_provided */
-   0, /* properties_destroyed */
-   0, /* todo_flags_start */
-   0, /* todo_flags_finish */
- };
- 
- class pass_branch_target_load_optimize2 : public rtl_opt_pass
- {
- public:
-   pass_branch_target_load_optimize2 (gcc::context *ctxt)
-     : rtl_opt_pass (pass_data_branch_target_load_optimize2, ctxt)
-   {}
- 
-   /* opt_pass methods: */
-   virtual bool gate (function *)
-     {
-       return (optimize > 0 && flag_branch_target_load_optimize2);
-     }
- 
-   virtual unsigned int execute (function *);
- 
- }; // class pass_branch_target_load_optimize2
- 
- unsigned int
- pass_branch_target_load_optimize2::execute (function *)
- {
-   static int warned = 0;
- 
-   /* Leave this a warning for now so that it is possible to experiment
-      with running this pass twice.  In 3.6, we should either make this
-      an error, or use separate dump files.  */
-   if (flag_branch_target_load_optimize
-       && flag_branch_target_load_optimize2
-       && !warned)
-     {
-       warning (0, "branch target register load optimization is not intended "
- 	       "to be run twice");
- 
-       warned = 1;
-     }
- 
-   branch_target_load_optimize (epilogue_completed);
-   return 0;
- }
- 
- } // anon namespace
- 
- rtl_opt_pass *
- make_pass_branch_target_load_optimize2 (gcc::context *ctxt)
- {
-   return new pass_branch_target_load_optimize2 (ctxt);
- }
--- 0 ----
diff -Nrcpad gcc-9.3.0/gcc/builtin-attrs.def gcc-10.1.0/gcc/builtin-attrs.def
*** gcc-9.3.0/gcc/builtin-attrs.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/builtin-attrs.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2001-2019 Free Software Foundation, Inc.
     Contributed by Joseph Myers <jsm28@cam.ac.uk>.
  
  This file is part of GCC.
--- 1,4 ----
! /* Copyright (C) 2001-2020 Free Software Foundation, Inc.
     Contributed by Joseph Myers <jsm28@cam.ac.uk>.
  
  This file is part of GCC.
*************** DEF_ATTR_IDENT (ATTR_TM_REGPARM, "*tm re
*** 118,123 ****
--- 118,124 ----
  DEF_ATTR_IDENT (ATTR_TM_TMPURE, "transaction_pure")
  DEF_ATTR_IDENT (ATTR_RETURNS_TWICE, "returns_twice")
  DEF_ATTR_IDENT (ATTR_RETURNS_NONNULL, "returns_nonnull")
+ DEF_ATTR_IDENT (ATTR_WARN_UNUSED_RESULT, "warn_unused_result")
  
  DEF_ATTR_TREE_LIST (ATTR_NOVOPS_LIST, ATTR_NOVOPS, ATTR_NULL, ATTR_NULL)
  
*************** DEF_ATTR_TREE_LIST (ATTR_CONST_NORETURN_
*** 157,164 ****
  			ATTR_NULL, ATTR_CONST_NORETURN_NOTHROW_LEAF_LIST)
  DEF_ATTR_TREE_LIST (ATTR_MALLOC_NOTHROW_LIST, ATTR_MALLOC,	\
  			ATTR_NULL, ATTR_NOTHROW_LIST)
! DEF_ATTR_TREE_LIST (ATTR_MALLOC_NOTHROW_LEAF_LIST, ATTR_MALLOC,	\
  			ATTR_NULL, ATTR_NOTHROW_LEAF_LIST)
  DEF_ATTR_TREE_LIST (ATTR_SENTINEL_NOTHROW_LIST, ATTR_SENTINEL,	\
  			ATTR_NULL, ATTR_NOTHROW_LIST)
  DEF_ATTR_TREE_LIST (ATTR_SENTINEL_NOTHROW_LEAF_LIST, ATTR_SENTINEL,	\
--- 158,167 ----
  			ATTR_NULL, ATTR_CONST_NORETURN_NOTHROW_LEAF_LIST)
  DEF_ATTR_TREE_LIST (ATTR_MALLOC_NOTHROW_LIST, ATTR_MALLOC,	\
  			ATTR_NULL, ATTR_NOTHROW_LIST)
! DEF_ATTR_TREE_LIST (ATTR_WARN_UNUSED_RESULT_NOTHROW_LEAF_LIST, ATTR_WARN_UNUSED_RESULT,	\
  			ATTR_NULL, ATTR_NOTHROW_LEAF_LIST)
+ DEF_ATTR_TREE_LIST (ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_LEAF_LIST, ATTR_MALLOC,	\
+ 			ATTR_NULL, ATTR_WARN_UNUSED_RESULT_NOTHROW_LEAF_LIST)
  DEF_ATTR_TREE_LIST (ATTR_SENTINEL_NOTHROW_LIST, ATTR_SENTINEL,	\
  			ATTR_NULL, ATTR_NOTHROW_LIST)
  DEF_ATTR_TREE_LIST (ATTR_SENTINEL_NOTHROW_LEAF_LIST, ATTR_SENTINEL,	\
*************** DEF_ATTR_TREE_LIST (ATTR_COLD_CONST_NORE
*** 170,193 ****
     with _SIZE_1, or second argument with _SIZE_2, specifies the size
     of the allocated object.  */
  DEF_ATTR_TREE_LIST (ATTR_MALLOC_SIZE_1_NOTHROW_LIST, ATTR_ALLOC_SIZE,	\
! 			ATTR_LIST_1, ATTR_MALLOC_NOTHROW_LIST)
! DEF_ATTR_TREE_LIST (ATTR_ALLOC_SIZE_2_NOTHROW_LIST, ATTR_ALLOC_SIZE,	\
! 			ATTR_LIST_2, ATTR_MALLOC_NOTHROW_LIST)
! DEF_ATTR_TREE_LIST (ATTR_MALLOC_SIZE_1_NOTHROW_LEAF_LIST, ATTR_ALLOC_SIZE, \
! 		        ATTR_LIST_1, ATTR_MALLOC_NOTHROW_LEAF_LIST)
  /* Alloca is just like malloc except that it never returns null.  */
! DEF_ATTR_TREE_LIST (ATTR_ALLOCA_SIZE_1_NOTHROW_LEAF_LIST, ATTR_RETURNS_NONNULL,
! 		    ATTR_NULL, ATTR_MALLOC_SIZE_1_NOTHROW_LEAF_LIST)
  
  /* Allocation functions like calloc the product of whose first two arguments
     specifies the size of the allocated object.  */
! DEF_ATTR_TREE_LIST (ATTR_MALLOC_SIZE_1_2_NOTHROW_LEAF_LIST, ATTR_ALLOC_SIZE, \
! 		        ATTR_LIST_1_2, ATTR_MALLOC_NOTHROW_LEAF_LIST)
  
  /* Allocation functions like realloc whose second argument specifies
     the size of the allocated object.  */
! DEF_ATTR_TREE_LIST (ATTR_ALLOC_SIZE_2_NOTHROW_LEAF_LIST, ATTR_ALLOC_SIZE, \
! 		        ATTR_LIST_2, ATTR_NOTHROW_LEAF_LIST)
  
  /* Functions whose pointer parameter(s) are all nonnull.  */
  DEF_ATTR_TREE_LIST (ATTR_NONNULL_LIST, ATTR_NONNULL, ATTR_NULL, ATTR_NULL)
--- 173,198 ----
     with _SIZE_1, or second argument with _SIZE_2, specifies the size
     of the allocated object.  */
  DEF_ATTR_TREE_LIST (ATTR_MALLOC_SIZE_1_NOTHROW_LIST, ATTR_ALLOC_SIZE,	\
! 		    ATTR_LIST_1, ATTR_MALLOC_NOTHROW_LIST)
! DEF_ATTR_TREE_LIST (ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_LIST, ATTR_WARN_UNUSED_RESULT,	\
! 		    ATTR_NULL, ATTR_MALLOC_NOTHROW_LIST)
! DEF_ATTR_TREE_LIST (ATTR_ALLOC_WARN_UNUSED_RESULT_SIZE_2_NOTHROW_LIST, ATTR_ALLOC_SIZE,	\
! 		    ATTR_LIST_2, ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_LIST)
! DEF_ATTR_TREE_LIST (ATTR_MALLOC_WARN_UNUSED_RESULT_SIZE_1_NOTHROW_LEAF_LIST, ATTR_ALLOC_SIZE, \
! 		    ATTR_LIST_1, ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_LEAF_LIST)
  /* Alloca is just like malloc except that it never returns null.  */
! DEF_ATTR_TREE_LIST (ATTR_ALLOCA_WARN_UNUSED_RESULT_SIZE_1_NOTHROW_LEAF_LIST, ATTR_RETURNS_NONNULL,
! 		    ATTR_NULL, ATTR_MALLOC_WARN_UNUSED_RESULT_SIZE_1_NOTHROW_LEAF_LIST)
  
  /* Allocation functions like calloc the product of whose first two arguments
     specifies the size of the allocated object.  */
! DEF_ATTR_TREE_LIST (ATTR_MALLOC_WARN_UNUSED_RESULT_SIZE_1_2_NOTHROW_LEAF_LIST, ATTR_ALLOC_SIZE, \
! 		    ATTR_LIST_1_2, ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_LEAF_LIST)
  
  /* Allocation functions like realloc whose second argument specifies
     the size of the allocated object.  */
! DEF_ATTR_TREE_LIST (ATTR_ALLOC_WARN_UNUSED_RESULT_SIZE_2_NOTHROW_LEAF_LIST, ATTR_ALLOC_SIZE, \
! 		    ATTR_LIST_2, ATTR_WARN_UNUSED_RESULT_NOTHROW_LEAF_LIST)
  
  /* Functions whose pointer parameter(s) are all nonnull.  */
  DEF_ATTR_TREE_LIST (ATTR_NONNULL_LIST, ATTR_NONNULL, ATTR_NULL, ATTR_NULL)
*************** DEF_ATTR_TREE_LIST (ATTR_PURE_NOTHROW_NO
*** 290,300 ****
  DEF_ATTR_TREE_LIST (ATTR_PURE_NOTHROW_NONNULL_LEAF, ATTR_PURE, ATTR_NULL, \
  			ATTR_NOTHROW_NONNULL_LEAF)
  /* Nothrow malloc functions whose pointer parameter(s) are all nonnull.  */
! DEF_ATTR_TREE_LIST (ATTR_MALLOC_NOTHROW_NONNULL, ATTR_MALLOC, ATTR_NULL, \
  			ATTR_NOTHROW_NONNULL)
  /* Nothrow malloc leaf functions whose pointer parameter(s) are all nonnull.  */
! DEF_ATTR_TREE_LIST (ATTR_MALLOC_NOTHROW_NONNULL_LEAF, ATTR_MALLOC, ATTR_NULL, \
  			ATTR_NOTHROW_NONNULL_LEAF)
  
  /* Construct a tree for the format attribute (and implicitly nonnull).  */
  #define DEF_FORMAT_ATTRIBUTE(TYPE, FA, VALUES)				 \
--- 295,309 ----
  DEF_ATTR_TREE_LIST (ATTR_PURE_NOTHROW_NONNULL_LEAF, ATTR_PURE, ATTR_NULL, \
  			ATTR_NOTHROW_NONNULL_LEAF)
  /* Nothrow malloc functions whose pointer parameter(s) are all nonnull.  */
! DEF_ATTR_TREE_LIST (ATTR_WARN_UNUSED_RESULT_NOTHROW_NONNULL, ATTR_WARN_UNUSED_RESULT, ATTR_NULL, \
  			ATTR_NOTHROW_NONNULL)
+ DEF_ATTR_TREE_LIST (ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_NONNULL, ATTR_MALLOC, ATTR_NULL, \
+ 			ATTR_WARN_UNUSED_RESULT_NOTHROW_NONNULL)
  /* Nothrow malloc leaf functions whose pointer parameter(s) are all nonnull.  */
! DEF_ATTR_TREE_LIST (ATTR_WARN_UNUSED_RESULT_NOTHROW_NONNULL_LEAF, ATTR_WARN_UNUSED_RESULT, ATTR_NULL, \
  			ATTR_NOTHROW_NONNULL_LEAF)
+ DEF_ATTR_TREE_LIST (ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_NONNULL_LEAF, ATTR_MALLOC, ATTR_NULL, \
+ 			ATTR_WARN_UNUSED_RESULT_NOTHROW_NONNULL_LEAF)
  
  /* Construct a tree for the format attribute (and implicitly nonnull).  */
  #define DEF_FORMAT_ATTRIBUTE(TYPE, FA, VALUES)				 \
diff -Nrcpad gcc-9.3.0/gcc/builtin-types.def gcc-10.1.0/gcc/builtin-types.def
*** gcc-9.3.0/gcc/builtin-types.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/builtin-types.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2001-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2001-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** DEF_PRIMITIVE_TYPE (BT_CONST_DOUBLE_PTR,
*** 131,147 ****
  DEF_PRIMITIVE_TYPE (BT_LONGDOUBLE_PTR, long_double_ptr_type_node)
  DEF_PRIMITIVE_TYPE (BT_PID, pid_type_node)
  DEF_PRIMITIVE_TYPE (BT_SIZE, size_type_node)
  DEF_PRIMITIVE_TYPE (BT_SSIZE, signed_size_type_node)
  DEF_PRIMITIVE_TYPE (BT_WINT, wint_type_node)
  DEF_PRIMITIVE_TYPE (BT_STRING, string_type_node)
  DEF_PRIMITIVE_TYPE (BT_CONST_STRING, const_string_type_node)
  
! DEF_PRIMITIVE_TYPE (BT_DFLOAT32, dfloat32_type_node)
! DEF_PRIMITIVE_TYPE (BT_DFLOAT64, dfloat64_type_node)
! DEF_PRIMITIVE_TYPE (BT_DFLOAT128, dfloat128_type_node)
! DEF_PRIMITIVE_TYPE (BT_DFLOAT32_PTR, dfloat32_ptr_type_node)
! DEF_PRIMITIVE_TYPE (BT_DFLOAT64_PTR, dfloat64_ptr_type_node)
! DEF_PRIMITIVE_TYPE (BT_DFLOAT128_PTR, dfloat128_ptr_type_node)
  
  DEF_PRIMITIVE_TYPE (BT_VALIST_REF, va_list_ref_type_node)
  DEF_PRIMITIVE_TYPE (BT_VALIST_ARG, va_list_arg_type_node)
--- 131,152 ----
  DEF_PRIMITIVE_TYPE (BT_LONGDOUBLE_PTR, long_double_ptr_type_node)
  DEF_PRIMITIVE_TYPE (BT_PID, pid_type_node)
  DEF_PRIMITIVE_TYPE (BT_SIZE, size_type_node)
+ DEF_PRIMITIVE_TYPE (BT_CONST_SIZE,
+ 		    build_qualified_type (size_type_node, TYPE_QUAL_CONST))
  DEF_PRIMITIVE_TYPE (BT_SSIZE, signed_size_type_node)
  DEF_PRIMITIVE_TYPE (BT_WINT, wint_type_node)
  DEF_PRIMITIVE_TYPE (BT_STRING, string_type_node)
  DEF_PRIMITIVE_TYPE (BT_CONST_STRING, const_string_type_node)
  
! DEF_PRIMITIVE_TYPE (BT_DFLOAT32, (dfloat32_type_node
! 				  ? dfloat32_type_node
! 				  : error_mark_node))
! DEF_PRIMITIVE_TYPE (BT_DFLOAT64, (dfloat64_type_node
! 				  ? dfloat64_type_node
! 				  : error_mark_node))
! DEF_PRIMITIVE_TYPE (BT_DFLOAT128, (dfloat128_type_node
! 				   ? dfloat128_type_node
! 				   : error_mark_node))
  
  DEF_PRIMITIVE_TYPE (BT_VALIST_REF, va_list_ref_type_node)
  DEF_PRIMITIVE_TYPE (BT_VALIST_ARG, va_list_arg_type_node)
*************** DEF_FUNCTION_TYPE_1 (BT_FN_UINT32_UINT32
*** 297,302 ****
--- 302,308 ----
  DEF_FUNCTION_TYPE_1 (BT_FN_UINT64_UINT64, BT_UINT64, BT_UINT64)
  DEF_FUNCTION_TYPE_1 (BT_FN_UINT64_FLOAT, BT_UINT64, BT_FLOAT)
  DEF_FUNCTION_TYPE_1 (BT_FN_BOOL_INT, BT_BOOL, BT_INT)
+ DEF_FUNCTION_TYPE_1 (BT_FN_BOOL_PTR, BT_BOOL, BT_PTR)
  DEF_FUNCTION_TYPE_1 (BT_FN_PTR_CONST_PTR, BT_PTR, BT_CONST_PTR)
  DEF_FUNCTION_TYPE_1 (BT_FN_CONST_PTR_CONST_PTR, BT_CONST_PTR, BT_CONST_PTR)
  DEF_FUNCTION_TYPE_1 (BT_FN_UINT16_UINT32, BT_UINT16, BT_UINT32)
*************** DEF_FUNCTION_TYPE_3 (BT_FN_VOID_UINT32_U
*** 625,630 ****
--- 631,638 ----
  DEF_FUNCTION_TYPE_3 (BT_FN_VOID_SIZE_SIZE_PTR, BT_VOID, BT_SIZE, BT_SIZE,
  		     BT_PTR)
  DEF_FUNCTION_TYPE_3 (BT_FN_UINT_UINT_PTR_PTR, BT_UINT, BT_UINT, BT_PTR, BT_PTR)
+ DEF_FUNCTION_TYPE_3 (BT_FN_PTR_PTR_CONST_SIZE_BOOL,
+ 		     BT_PTR, BT_PTR, BT_CONST_SIZE, BT_BOOL)
  
  DEF_FUNCTION_TYPE_4 (BT_FN_SIZE_CONST_PTR_SIZE_SIZE_FILEPTR,
  		     BT_SIZE, BT_CONST_PTR, BT_SIZE, BT_SIZE, BT_FILEPTR)
diff -Nrcpad gcc-9.3.0/gcc/builtins.c gcc-10.1.0/gcc/builtins.c
*** gcc-9.3.0/gcc/builtins.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/builtins.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Expand builtin functions.
!    Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Expand builtin functions.
!    Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 31,37 ****
  #include "memmodel.h"
  #include "gimple.h"
  #include "predict.h"
- #include "params.h"
  #include "tm_p.h"
  #include "stringpool.h"
  #include "tree-vrp.h"
--- 31,36 ----
*************** along with GCC; see the file COPYING3.
*** 49,54 ****
--- 48,54 ----
  #include "calls.h"
  #include "varasm.h"
  #include "tree-object-size.h"
+ #include "tree-ssa-strlen.h"
  #include "realmpfr.h"
  #include "cfgrtl.h"
  #include "except.h"
*************** along with GCC; see the file COPYING3.
*** 72,77 ****
--- 72,78 ----
  #include "file-prefix-map.h" /* remap_macro_filename()  */
  #include "gomp-constants.h"
  #include "omp-general.h"
+ #include "tree-dfa.h"
  
  struct target_builtins default_target_builtins;
  #if SWITCHABLE_TARGET
*************** static rtx expand_builtin_memchr (tree,
*** 126,136 ****
  static rtx expand_builtin_memcpy (tree, rtx);
  static rtx expand_builtin_memory_copy_args (tree dest, tree src, tree len,
  					    rtx target, tree exp,
! 					    memop_ret retmode);
  static rtx expand_builtin_memmove (tree, rtx);
  static rtx expand_builtin_mempcpy (tree, rtx);
  static rtx expand_builtin_mempcpy_args (tree, tree, tree, rtx, tree, memop_ret);
! static rtx expand_builtin_strcat (tree, rtx);
  static rtx expand_builtin_strcpy (tree, rtx);
  static rtx expand_builtin_strcpy_args (tree, tree, tree, rtx);
  static rtx expand_builtin_stpcpy (tree, rtx, machine_mode);
--- 127,138 ----
  static rtx expand_builtin_memcpy (tree, rtx);
  static rtx expand_builtin_memory_copy_args (tree dest, tree src, tree len,
  					    rtx target, tree exp,
! 					    memop_ret retmode,
! 					    bool might_overlap);
  static rtx expand_builtin_memmove (tree, rtx);
  static rtx expand_builtin_mempcpy (tree, rtx);
  static rtx expand_builtin_mempcpy_args (tree, tree, tree, rtx, tree, memop_ret);
! static rtx expand_builtin_strcat (tree);
  static rtx expand_builtin_strcpy (tree, rtx);
  static rtx expand_builtin_strcpy_args (tree, tree, tree, rtx);
  static rtx expand_builtin_stpcpy (tree, rtx, machine_mode);
*************** static tree fold_builtin_fabs (location_
*** 165,179 ****
  static tree fold_builtin_abs (location_t, tree, tree);
  static tree fold_builtin_unordered_cmp (location_t, tree, tree, tree, enum tree_code,
  					enum tree_code);
- static tree fold_builtin_0 (location_t, tree);
- static tree fold_builtin_1 (location_t, tree, tree);
- static tree fold_builtin_2 (location_t, tree, tree, tree);
- static tree fold_builtin_3 (location_t, tree, tree, tree, tree);
  static tree fold_builtin_varargs (location_t, tree, tree*, int);
  
! static tree fold_builtin_strpbrk (location_t, tree, tree, tree);
! static tree fold_builtin_strspn (location_t, tree, tree);
! static tree fold_builtin_strcspn (location_t, tree, tree);
  
  static rtx expand_builtin_object_size (tree);
  static rtx expand_builtin_memory_chk (tree, rtx, machine_mode,
--- 167,177 ----
  static tree fold_builtin_abs (location_t, tree, tree);
  static tree fold_builtin_unordered_cmp (location_t, tree, tree, tree, enum tree_code,
  					enum tree_code);
  static tree fold_builtin_varargs (location_t, tree, tree*, int);
  
! static tree fold_builtin_strpbrk (location_t, tree, tree, tree, tree);
! static tree fold_builtin_strspn (location_t, tree, tree, tree);
! static tree fold_builtin_strcspn (location_t, tree, tree, tree);
  
  static rtx expand_builtin_object_size (tree);
  static rtx expand_builtin_memory_chk (tree, rtx, machine_mode,
*************** warn_string_no_nul (location_t loc, cons
*** 563,568 ****
--- 561,611 ----
      }
  }
  
+ /* For a call EXPR (which may be null) that expects a string argument
+    and SRC as the argument, returns false if SRC is a character array
+    with no terminating NUL.  When nonnull, BOUND is the number of
+    characters in which to expect the terminating NUL.
+    When EXPR is nonnull also issues a warning.  */
+ 
+ bool
+ check_nul_terminated_array (tree expr, tree src, tree bound /* = NULL_TREE */)
+ {
+   tree size;
+   bool exact;
+   tree nonstr = unterminated_array (src, &size, &exact);
+   if (!nonstr)
+     return true;
+ 
+   /* NONSTR refers to the non-nul terminated constant array and SIZE
+      is the constant size of the array in bytes.  EXACT is true when
+      SIZE is exact.  */
+ 
+   if (bound)
+     {
+       wide_int min, max;
+       if (TREE_CODE (bound) == INTEGER_CST)
+ 	min = max = wi::to_wide (bound);
+       else
+ 	{
+ 	  value_range_kind rng = get_range_info (bound, &min, &max);
+ 	  if (rng != VR_RANGE)
+ 	    return true;
+ 	}
+ 
+       if (wi::leu_p (min, wi::to_wide (size)))
+ 	return true;
+     }
+ 
+   if (expr && !TREE_NO_WARNING (expr))
+     {
+       tree fndecl = get_callee_fndecl (expr);
+       const char *fname = IDENTIFIER_POINTER (DECL_NAME (fndecl));
+       warn_string_no_nul (EXPR_LOCATION (expr), fname, src, nonstr);
+     }
+ 
+   return false;
+ }
+ 
  /* If EXP refers to an unterminated constant character array return
     the declaration of the object of which the array is a member or
     element and if SIZE is not null, set *SIZE to the size of
*************** unterminated_array (tree exp, tree *size
*** 620,626 ****
     into the instruction stream and zero if it is going to be expanded.
     E.g. with i++ ? "foo" : "bar", if ONLY_VALUE is nonzero, constant 3
     is returned, otherwise NULL, since
!    len = c_strlen (src, 1); if (len) expand_expr (len, ...); would not
     evaluate the side-effects.
  
     If ONLY_VALUE is two then we do not emit warnings about out-of-bound
--- 663,669 ----
     into the instruction stream and zero if it is going to be expanded.
     E.g. with i++ ? "foo" : "bar", if ONLY_VALUE is nonzero, constant 3
     is returned, otherwise NULL, since
!    len = c_strlen (ARG, 1); if (len) expand_expr (len, ...); would not
     evaluate the side-effects.
  
     If ONLY_VALUE is two then we do not emit warnings about out-of-bound
*************** unterminated_array (tree exp, tree *size
*** 628,634 ****
     into the instruction stream.
  
     Additional information about the string accessed may be recorded
!    in DATA.  For example, if SRC references an unterminated string,
     then the declaration will be stored in the DECL field.   If the
     length of the unterminated string can be determined, it'll be
     stored in the LEN field.  Note this length could well be different
--- 671,677 ----
     into the instruction stream.
  
     Additional information about the string accessed may be recorded
!    in DATA.  For example, if ARG references an unterminated string,
     then the declaration will be stored in the DECL field.   If the
     length of the unterminated string can be determined, it'll be
     stored in the LEN field.  Note this length could well be different
*************** unterminated_array (tree exp, tree *size
*** 640,646 ****
     The value returned is of type `ssizetype'.  */
  
  tree
! c_strlen (tree src, int only_value, c_strlen_data *data, unsigned eltsize)
  {
    /* If we were not passed a DATA pointer, then get one to a local
       structure.  That avoids having to check DATA for NULL before
--- 683,689 ----
     The value returned is of type `ssizetype'.  */
  
  tree
! c_strlen (tree arg, int only_value, c_strlen_data *data, unsigned eltsize)
  {
    /* If we were not passed a DATA pointer, then get one to a local
       structure.  That avoids having to check DATA for NULL before
*************** c_strlen (tree src, int only_value, c_st
*** 650,656 ****
      data = &local_strlen_data;
  
    gcc_checking_assert (eltsize == 1 || eltsize == 2 || eltsize == 4);
!   STRIP_NOPS (src);
    if (TREE_CODE (src) == COND_EXPR
        && (only_value || !TREE_SIDE_EFFECTS (TREE_OPERAND (src, 0))))
      {
--- 693,700 ----
      data = &local_strlen_data;
  
    gcc_checking_assert (eltsize == 1 || eltsize == 2 || eltsize == 4);
! 
!   tree src = STRIP_NOPS (arg);
    if (TREE_CODE (src) == COND_EXPR
        && (only_value || !TREE_SIDE_EFFECTS (TREE_OPERAND (src, 0))))
      {
*************** c_strlen (tree src, int only_value, c_st
*** 762,772 ****
      {
        /* Suppress multiple warnings for propagated constant strings.  */
        if (only_value != 2
! 	  && !TREE_NO_WARNING (src)
  	  && warning_at (loc, OPT_Warray_bounds,
  			 "offset %qwi outside bounds of constant string",
  			 eltoff))
! 	TREE_NO_WARNING (src) = 1;
        return NULL_TREE;
      }
  
--- 806,820 ----
      {
        /* Suppress multiple warnings for propagated constant strings.  */
        if (only_value != 2
! 	  && !TREE_NO_WARNING (arg)
  	  && warning_at (loc, OPT_Warray_bounds,
  			 "offset %qwi outside bounds of constant string",
  			 eltoff))
! 	{
! 	  if (decl)
! 	    inform (DECL_SOURCE_LOCATION (decl), "%qE declared here", decl);
! 	  TREE_NO_WARNING (arg) = 1;
! 	}
        return NULL_TREE;
      }
  
*************** expand_builtin_setjmp_setup (rtx buf_add
*** 981,987 ****
  
    mem = gen_rtx_MEM (Pmode, buf_addr);
    set_mem_alias_set (mem, setjmp_alias_set);
!   emit_move_insn (mem, targetm.builtin_setjmp_frame_value ());
  
    mem = gen_rtx_MEM (Pmode, plus_constant (Pmode, buf_addr,
  					   GET_MODE_SIZE (Pmode))),
--- 1029,1035 ----
  
    mem = gen_rtx_MEM (Pmode, buf_addr);
    set_mem_alias_set (mem, setjmp_alias_set);
!   emit_move_insn (mem, hard_frame_pointer_rtx);
  
    mem = gen_rtx_MEM (Pmode, plus_constant (Pmode, buf_addr,
  					   GET_MODE_SIZE (Pmode))),
*************** expand_builtin_setjmp_receiver (rtx rece
*** 1023,1053 ****
    if (chain && REG_P (chain))
      emit_clobber (chain);
  
-   /* Now put in the code to restore the frame pointer, and argument
-      pointer, if needed.  */
-   if (! targetm.have_nonlocal_goto ())
-     {
-       /* First adjust our frame pointer to its actual value.  It was
- 	 previously set to the start of the virtual area corresponding to
- 	 the stacked variables when we branched here and now needs to be
- 	 adjusted to the actual hardware fp value.
- 
- 	 Assignments to virtual registers are converted by
- 	 instantiate_virtual_regs into the corresponding assignment
- 	 to the underlying register (fp in this case) that makes
- 	 the original assignment true.
- 	 So the following insn will actually be decrementing fp by
- 	 TARGET_STARTING_FRAME_OFFSET.  */
-       emit_move_insn (virtual_stack_vars_rtx, hard_frame_pointer_rtx);
- 
-       /* Restoring the frame pointer also modifies the hard frame pointer.
- 	 Mark it used (so that the previous assignment remains live once
- 	 the frame pointer is eliminated) and clobbered (to represent the
- 	 implicit update from the assignment).  */
-       emit_use (hard_frame_pointer_rtx);
-       emit_clobber (hard_frame_pointer_rtx);
-     }
- 
    if (!HARD_FRAME_POINTER_IS_ARG_POINTER && fixed_regs[ARG_POINTER_REGNUM])
      {
        /* If the argument pointer can be eliminated in favor of the
--- 1071,1076 ----
*************** expand_builtin_longjmp (rtx buf_addr, rt
*** 1137,1151 ****
  	emit_insn (targetm.gen_nonlocal_goto (value, lab, stack, fp));
        else
  	{
- 	  lab = copy_to_reg (lab);
- 
  	  emit_clobber (gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode)));
  	  emit_clobber (gen_rtx_MEM (BLKmode, hard_frame_pointer_rtx));
  
  	  /* Restore the frame pointer and stack pointer.  We must use a
  	     temporary since the setjmp buffer may be a local.  */
  	  fp = copy_to_reg (fp);
  	  emit_stack_restore (SAVE_NONLOCAL, stack);
  	  emit_move_insn (hard_frame_pointer_rtx, fp);
  
  	  emit_use (hard_frame_pointer_rtx);
--- 1160,1179 ----
  	emit_insn (targetm.gen_nonlocal_goto (value, lab, stack, fp));
        else
  	{
  	  emit_clobber (gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode)));
  	  emit_clobber (gen_rtx_MEM (BLKmode, hard_frame_pointer_rtx));
  
+ 	  lab = copy_to_reg (lab);
+ 
  	  /* Restore the frame pointer and stack pointer.  We must use a
  	     temporary since the setjmp buffer may be a local.  */
  	  fp = copy_to_reg (fp);
  	  emit_stack_restore (SAVE_NONLOCAL, stack);
+ 
+ 	  /* Ensure the frame pointer move is not optimized.  */
+ 	  emit_insn (gen_blockage ());
+ 	  emit_clobber (hard_frame_pointer_rtx);
+ 	  emit_clobber (frame_pointer_rtx);
  	  emit_move_insn (hard_frame_pointer_rtx, fp);
  
  	  emit_use (hard_frame_pointer_rtx);
*************** expand_builtin_nonlocal_goto (tree exp)
*** 1284,1298 ****
      emit_insn (targetm.gen_nonlocal_goto (const0_rtx, r_label, r_sp, r_fp));
    else
      {
-       r_label = copy_to_reg (r_label);
- 
        emit_clobber (gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode)));
        emit_clobber (gen_rtx_MEM (BLKmode, hard_frame_pointer_rtx));
  
        /* Restore the frame pointer and stack pointer.  We must use a
  	 temporary since the setjmp buffer may be a local.  */
        r_fp = copy_to_reg (r_fp);
        emit_stack_restore (SAVE_NONLOCAL, r_sp);
        emit_move_insn (hard_frame_pointer_rtx, r_fp);
  
        /* USE of hard_frame_pointer_rtx added for consistency;
--- 1312,1331 ----
      emit_insn (targetm.gen_nonlocal_goto (const0_rtx, r_label, r_sp, r_fp));
    else
      {
        emit_clobber (gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode)));
        emit_clobber (gen_rtx_MEM (BLKmode, hard_frame_pointer_rtx));
  
+       r_label = copy_to_reg (r_label);
+ 
        /* Restore the frame pointer and stack pointer.  We must use a
  	 temporary since the setjmp buffer may be a local.  */
        r_fp = copy_to_reg (r_fp);
        emit_stack_restore (SAVE_NONLOCAL, r_sp);
+ 
+       /* Ensure the frame pointer move is not optimized.  */
+       emit_insn (gen_blockage ());
+       emit_clobber (hard_frame_pointer_rtx);
+       emit_clobber (frame_pointer_rtx);
        emit_move_insn (hard_frame_pointer_rtx, r_fp);
  
        /* USE of hard_frame_pointer_rtx added for consistency;
*************** expand_builtin_prefetch (tree exp)
*** 1415,1421 ****
  
    if (targetm.have_prefetch ())
      {
!       struct expand_operand ops[3];
  
        create_address_operand (&ops[0], op0);
        create_integer_operand (&ops[1], INTVAL (op1));
--- 1448,1454 ----
  
    if (targetm.have_prefetch ())
      {
!       class expand_operand ops[3];
  
        create_address_operand (&ops[0], op0);
        create_integer_operand (&ops[1], INTVAL (op1));
*************** expand_builtin_prefetch (tree exp)
*** 1431,1437 ****
  }
  
  /* Get a MEM rtx for expression EXP which is the address of an operand
!    to be used in a string instruction (cmpstrsi, movmemsi, ..).  LEN is
     the maximum length of the block of memory that might be accessed or
     NULL if unknown.  */
  
--- 1464,1470 ----
  }
  
  /* Get a MEM rtx for expression EXP which is the address of an operand
!    to be used in a string instruction (cmpstrsi, cpymemsi, ..).  LEN is
     the maximum length of the block of memory that might be accessed or
     NULL if unknown.  */
  
*************** expand_builtin_apply_args_1 (void)
*** 1653,1663 ****
    /* Save the structure value address unless this is passed as an
       "invisible" first argument.  */
    if (struct_incoming_value)
!     {
!       emit_move_insn (adjust_address (registers, Pmode, size),
! 		      copy_to_reg (struct_incoming_value));
!       size += GET_MODE_SIZE (Pmode);
!     }
  
    /* Return the address of the block.  */
    return copy_addr_to_reg (XEXP (registers, 0));
--- 1686,1693 ----
    /* Save the structure value address unless this is passed as an
       "invisible" first argument.  */
    if (struct_incoming_value)
!     emit_move_insn (adjust_address (registers, Pmode, size),
! 		    copy_to_reg (struct_incoming_value));
  
    /* Return the address of the block.  */
    return copy_addr_to_reg (XEXP (registers, 0));
*************** expand_builtin_apply (rtx function, rtx
*** 1806,1812 ****
        emit_move_insn (struct_value, value);
        if (REG_P (struct_value))
  	use_reg (&call_fusage, struct_value);
-       size += GET_MODE_SIZE (Pmode);
      }
  
    /* All arguments and registers used for the call are set up by now!  */
--- 1836,1841 ----
*************** mathfn_built_in_2 (tree type, combined_f
*** 2075,2080 ****
--- 2104,2110 ----
      CASE_MATHFN (REMQUO)
      CASE_MATHFN_FLOATN (RINT)
      CASE_MATHFN_FLOATN (ROUND)
+     CASE_MATHFN_FLOATN (ROUNDEVEN)
      CASE_MATHFN (SCALB)
      CASE_MATHFN (SCALBLN)
      CASE_MATHFN (SCALBN)
*************** expand_builtin_interclass_mathfn (tree e
*** 2464,2470 ****
  
    if (icode != CODE_FOR_nothing)
      {
!       struct expand_operand ops[1];
        rtx_insn *last = get_last_insn ();
        tree orig_arg = arg;
  
--- 2494,2500 ----
  
    if (icode != CODE_FOR_nothing)
      {
!       class expand_operand ops[1];
        rtx_insn *last = get_last_insn ();
        tree orig_arg = arg;
  
*************** expand_builtin_strlen (tree exp, rtx tar
*** 2965,2971 ****
    if (!validate_arglist (exp, POINTER_TYPE, VOID_TYPE))
      return NULL_RTX;
  
!   struct expand_operand ops[4];
    rtx pat;
    tree len;
    tree src = CALL_EXPR_ARG (exp, 0);
--- 2995,3001 ----
    if (!validate_arglist (exp, POINTER_TYPE, VOID_TYPE))
      return NULL_RTX;
  
!   class expand_operand ops[4];
    rtx pat;
    tree len;
    tree src = CALL_EXPR_ARG (exp, 0);
*************** expand_builtin_strnlen (tree exp, rtx ta
*** 3112,3138 ****
  	    return NULL_RTX;
  	}
  
!       if (lendata.decl
! 	  && !TREE_NO_WARNING (exp)
! 	  && ((tree_int_cst_lt (len, bound))
! 	      || !exact))
  	{
  	  location_t warnloc
  	    = expansion_point_location_if_in_system_header (loc);
  
! 	  if (warning_at (warnloc, OPT_Wstringop_overflow_,
! 			  exact
! 			  ? G_("%K%qD specified bound %E exceeds the size %E "
! 			       "of unterminated array")
! 			  : G_("%K%qD specified bound %E may exceed the size "
! 			       "of at most %E of unterminated array"),
! 			  exp, func, bound, len))
  	    {
  	      inform (DECL_SOURCE_LOCATION (lendata.decl),
  		      "referenced argument declared here");
  	      TREE_NO_WARNING (exp) = true;
- 	      return NULL_RTX;
  	    }
  	}
  
        if (!len)
--- 3142,3166 ----
  	    return NULL_RTX;
  	}
  
!       if (lendata.decl && (tree_int_cst_lt (len, bound) || !exact))
  	{
  	  location_t warnloc
  	    = expansion_point_location_if_in_system_header (loc);
  
! 	  if (!TREE_NO_WARNING (exp)
! 	      && warning_at (warnloc, OPT_Wstringop_overflow_,
! 			     exact
! 			     ? G_("%K%qD specified bound %E exceeds the size "
! 				  "%E of unterminated array")
! 			     : G_("%K%qD specified bound %E may exceed the "
! 				  "size of at most %E of unterminated array"),
! 			     exp, func, bound, len))
  	    {
  	      inform (DECL_SOURCE_LOCATION (lendata.decl),
  		      "referenced argument declared here");
  	      TREE_NO_WARNING (exp) = true;
  	    }
+ 	  return NULL_RTX;
  	}
  
        if (!len)
*************** determine_block_size (tree len, rtx len_
*** 3311,3317 ****
     If the call is successfully verified as safe return true, otherwise
     return false.  */
  
! static bool
  check_access (tree exp, tree, tree, tree dstwrite,
  	      tree maxread, tree srcstr, tree dstsize)
  {
--- 3339,3345 ----
     If the call is successfully verified as safe return true, otherwise
     return false.  */
  
! bool
  check_access (tree exp, tree, tree, tree dstwrite,
  	      tree maxread, tree srcstr, tree dstsize)
  {
*************** check_access (tree exp, tree, tree, tree
*** 3345,3351 ****
  	  c_strlen_data lendata = { };
  	  get_range_strlen (srcstr, &lendata, /* eltsize = */ 1);
  	  range[0] = lendata.minlen;
! 	  range[1] = lendata.maxbound;
  	  if (range[0] && (!maxread || TREE_CODE (maxread) == INTEGER_CST))
  	    {
  	      if (maxread && tree_int_cst_le (maxread, range[0]))
--- 3373,3379 ----
  	  c_strlen_data lendata = { };
  	  get_range_strlen (srcstr, &lendata, /* eltsize = */ 1);
  	  range[0] = lendata.minlen;
! 	  range[1] = lendata.maxbound ? lendata.maxbound : lendata.maxlen;
  	  if (range[0] && (!maxread || TREE_CODE (maxread) == INTEGER_CST))
  	    {
  	      if (maxread && tree_int_cst_le (maxread, range[0]))
*************** check_access (tree exp, tree, tree, tree
*** 3407,3422 ****
  
        bool warned;
        if (range[0] == range[1])
! 	warned = warning_at (loc, opt,
! 			     "%K%qD specified size %E "
! 			     "exceeds maximum object size %E",
! 			     exp, func, range[0], maxobjsize);
        else
! 	warned = warning_at (loc, opt,
! 			     "%K%qD specified size between %E and %E "
! 			     "exceeds maximum object size %E",
! 			     exp, func,
! 			     range[0], range[1], maxobjsize);
        if (warned)
  	TREE_NO_WARNING (exp) = true;
  
--- 3435,3460 ----
  
        bool warned;
        if (range[0] == range[1])
! 	warned = (func
! 		  ? warning_at (loc, opt,
! 				"%K%qD specified size %E "
! 				"exceeds maximum object size %E",
! 				exp, func, range[0], maxobjsize)
! 		  : warning_at (loc, opt,
! 				"%Kspecified size %E "
! 				"exceeds maximum object size %E",
! 				exp, range[0], maxobjsize));
        else
! 	warned = (func
! 		  ? warning_at (loc, opt,
! 				"%K%qD specified size between %E and %E "
! 				"exceeds maximum object size %E",
! 				exp, func,
! 				range[0], range[1], maxobjsize)
! 		  : warning_at (loc, opt,
! 				"%Kspecified size between %E and %E "
! 				"exceeds maximum object size %E",
! 				exp, range[0], range[1], maxobjsize));
        if (warned)
  	TREE_NO_WARNING (exp) = true;
  
*************** check_access (tree exp, tree, tree, tree
*** 3445,3481 ****
  	  location_t loc = tree_nonartificial_location (exp);
  	  loc = expansion_point_location_if_in_system_header (loc);
  
  	  if (dstwrite == slen && at_least_one)
  	    {
  	      /* This is a call to strcpy with a destination of 0 size
  		 and a source of unknown length.  The call will write
  		 at least one byte past the end of the destination.  */
! 	      warning_at (loc, opt,
! 			  "%K%qD writing %E or more bytes into a region "
! 			  "of size %E overflows the destination",
! 			  exp, func, range[0], dstsize);
  	    }
  	  else if (tree_int_cst_equal (range[0], range[1]))
! 	    warning_n (loc, opt, tree_to_uhwi (range[0]),
! 		       "%K%qD writing %E byte into a region "
! 		       "of size %E overflows the destination",
! 		       "%K%qD writing %E bytes into a region "
! 		       "of size %E overflows the destination",
! 		       exp, func, range[0], dstsize);
  	  else if (tree_int_cst_sign_bit (range[1]))
  	    {
  	      /* Avoid printing the upper bound if it's invalid.  */
! 	      warning_at (loc, opt,
! 			  "%K%qD writing %E or more bytes into a region "
! 			  "of size %E overflows the destination",
! 			  exp, func, range[0], dstsize);
  	    }
  	  else
! 	    warning_at (loc, opt,
! 			"%K%qD writing between %E and %E bytes into "
! 			"a region of size %E overflows the destination",
! 			exp, func, range[0], range[1],
! 			dstsize);
  
  	  /* Return error when an overflow has been detected.  */
  	  return false;
--- 3483,3551 ----
  	  location_t loc = tree_nonartificial_location (exp);
  	  loc = expansion_point_location_if_in_system_header (loc);
  
+ 	  bool warned = false;
  	  if (dstwrite == slen && at_least_one)
  	    {
  	      /* This is a call to strcpy with a destination of 0 size
  		 and a source of unknown length.  The call will write
  		 at least one byte past the end of the destination.  */
! 	      warned = (func
! 			? warning_at (loc, opt,
! 				      "%K%qD writing %E or more bytes into "
! 				      "a region of size %E overflows "
! 				      "the destination",
! 				      exp, func, range[0], dstsize)
! 			: warning_at (loc, opt,
! 				      "%Kwriting %E or more bytes into "
! 				      "a region of size %E overflows "
! 				      "the destination",
! 				      exp, range[0], dstsize));
  	    }
  	  else if (tree_int_cst_equal (range[0], range[1]))
! 	    warned = (func
! 		      ? warning_n (loc, opt, tree_to_uhwi (range[0]),
! 				   "%K%qD writing %E byte into a region "
! 				   "of size %E overflows the destination",
! 				   "%K%qD writing %E bytes into a region "
! 				   "of size %E overflows the destination",
! 				   exp, func, range[0], dstsize)
! 		      : warning_n (loc, opt, tree_to_uhwi (range[0]),
! 				   "%Kwriting %E byte into a region "
! 				   "of size %E overflows the destination",
! 				   "%Kwriting %E bytes into a region "
! 				   "of size %E overflows the destination",
! 				   exp, range[0], dstsize));
  	  else if (tree_int_cst_sign_bit (range[1]))
  	    {
  	      /* Avoid printing the upper bound if it's invalid.  */
! 	      warned = (func
! 			? warning_at (loc, opt,
! 				      "%K%qD writing %E or more bytes into "
! 				      "a region of size %E overflows "
! 				      "the destination",
! 				      exp, func, range[0], dstsize)
! 			: warning_at (loc, opt,
! 				      "%Kwriting %E or more bytes into "
! 				      "a region of size %E overflows "
! 				      "the destination",
! 				      exp, range[0], dstsize));
  	    }
  	  else
! 	    warned = (func
! 		      ? warning_at (loc, opt,
! 				    "%K%qD writing between %E and %E bytes "
! 				    "into a region of size %E overflows "
! 				    "the destination",
! 				    exp, func, range[0], range[1],
! 				    dstsize)
! 		      : warning_at (loc, opt,
! 				    "%Kwriting between %E and %E bytes "
! 				    "into a region of size %E overflows "
! 				    "the destination",
! 				    exp, range[0], range[1],
! 				    dstsize));
! 	  if (warned)
! 	    TREE_NO_WARNING (exp) = true;
  
  	  /* Return error when an overflow has been detected.  */
  	  return false;
*************** check_access (tree exp, tree, tree, tree
*** 3488,3498 ****
    if (maxread)
      {
        get_size_range (maxread, range);
- 
-       /* Use the lower end for MAXREAD from now on.  */
-       if (range[0])
- 	maxread = range[0];
- 
        if (range[0] && dstsize && tree_fits_uhwi_p (dstsize))
  	{
  	  location_t loc = tree_nonartificial_location (exp);
--- 3558,3563 ----
*************** check_access (tree exp, tree, tree, tree
*** 3503,3523 ****
  	      if (TREE_NO_WARNING (exp))
  		return false;
  
  	      /* Warn about crazy big sizes first since that's more
  		 likely to be meaningful than saying that the bound
  		 is greater than the object size if both are big.  */
  	      if (range[0] == range[1])
! 		warning_at (loc, opt,
! 			    "%K%qD specified bound %E "
! 			    "exceeds maximum object size %E",
! 			    exp, func,
! 			    range[0], maxobjsize);
  	      else
! 		warning_at (loc, opt,
! 			    "%K%qD specified bound between %E and %E "
! 			    "exceeds maximum object size %E",
! 			    exp, func,
! 			    range[0], range[1], maxobjsize);
  
  	      return false;
  	    }
--- 3568,3603 ----
  	      if (TREE_NO_WARNING (exp))
  		return false;
  
+ 	      bool warned = false;
+ 
  	      /* Warn about crazy big sizes first since that's more
  		 likely to be meaningful than saying that the bound
  		 is greater than the object size if both are big.  */
  	      if (range[0] == range[1])
! 		warned = (func
! 			  ? warning_at (loc, opt,
! 					"%K%qD specified bound %E "
! 					"exceeds maximum object size %E",
! 					exp, func, range[0], maxobjsize)
! 			  : warning_at (loc, opt,
! 					"%Kspecified bound %E "
! 					"exceeds maximum object size %E",
! 					exp, range[0], maxobjsize));
  	      else
! 		warned = (func
! 			  ? warning_at (loc, opt,
! 					"%K%qD specified bound between "
! 					"%E and %E exceeds maximum object "
! 					"size %E",
! 					exp, func,
! 					range[0], range[1], maxobjsize)
! 			  : warning_at (loc, opt,
! 					"%Kspecified bound between "
! 					"%E and %E exceeds maximum object "
! 					"size %E",
! 					exp, range[0], range[1], maxobjsize));
! 	      if (warned)
! 		TREE_NO_WARNING (exp) = true;
  
  	      return false;
  	    }
*************** check_access (tree exp, tree, tree, tree
*** 3527,3544 ****
  	      if (TREE_NO_WARNING (exp))
  		return false;
  
  	      if (tree_int_cst_equal (range[0], range[1]))
! 		warning_at (loc, opt,
! 			    "%K%qD specified bound %E "
! 			    "exceeds destination size %E",
! 			    exp, func,
! 			    range[0], dstsize);
  	      else
! 		warning_at (loc, opt,
! 			    "%K%qD specified bound between %E and %E "
! 			    "exceeds destination size %E",
! 			    exp, func,
! 			    range[0], range[1], dstsize);
  	      return false;
  	    }
  	}
--- 3607,3640 ----
  	      if (TREE_NO_WARNING (exp))
  		return false;
  
+ 	      bool warned = false;
+ 
  	      if (tree_int_cst_equal (range[0], range[1]))
! 		warned = (func
! 			  ? warning_at (loc, opt,
! 					"%K%qD specified bound %E "
! 					"exceeds destination size %E",
! 					exp, func,
! 					range[0], dstsize)
! 			  : warning_at (loc, opt,
! 					"%Kspecified bound %E "
! 					"exceeds destination size %E",
! 					exp, range[0], dstsize));
  	      else
! 		warned = (func
! 			  ? warning_at (loc, opt,
! 					"%K%qD specified bound between %E "
! 					"and %E exceeds destination size %E",
! 					exp, func,
! 					range[0], range[1], dstsize)
! 			  : warning_at (loc, opt,
! 					"%Kspecified bound between %E "
! 					"and %E exceeds destination size %E",
! 					exp,
! 					range[0], range[1], dstsize));
! 	      if (warned)
! 		TREE_NO_WARNING (exp) = true;
! 
  	      return false;
  	    }
  	}
*************** check_access (tree exp, tree, tree, tree
*** 3553,3608 ****
        if (TREE_NO_WARNING (exp))
  	return false;
  
        location_t loc = tree_nonartificial_location (exp);
  
        if (tree_int_cst_equal (range[0], range[1]))
! 	warning_n (loc, opt, tree_to_uhwi (range[0]),
! 		   "%K%qD reading %E byte from a region of size %E",
! 		   "%K%qD reading %E bytes from a region of size %E",
! 		    exp, func, range[0], slen);
        else if (tree_int_cst_sign_bit (range[1]))
  	{
  	  /* Avoid printing the upper bound if it's invalid.  */
! 	  warning_at (loc, opt,
! 		      "%K%qD reading %E or more bytes from a region "
! 		      "of size %E",
! 		      exp, func, range[0], slen);
  	}
        else
! 	warning_at (loc, opt,
! 		    "%K%qD reading between %E and %E bytes from a region "
! 		    "of size %E",
! 		    exp, func, range[0], range[1], slen);
        return false;
      }
  
    return true;
  }
  
  /* Helper to compute the size of the object referenced by the DEST
     expression which must have pointer type, using Object Size type
!    OSTYPE (only the least significant 2 bits are used).  Return
!    an estimate of the size of the object if successful or NULL when
!    the size cannot be determined.  When the referenced object involves
!    a non-constant offset in some range the returned value represents
!    the largest size given the smallest non-negative offset in the
!    range.  The function is intended for diagnostics and should not
!    be used to influence code generation or optimization.  */
  
  tree
! compute_objsize (tree dest, int ostype)
  {
!   unsigned HOST_WIDE_INT size;
  
    /* Only the two least significant bits are meaningful.  */
    ostype &= 3;
  
!   if (compute_builtin_object_size (dest, ostype, &size))
      return build_int_cst (sizetype, size);
  
    if (TREE_CODE (dest) == SSA_NAME)
      {
        gimple *stmt = SSA_NAME_DEF_STMT (dest);
        if (!is_gimple_assign (stmt))
  	return NULL_TREE;
  
--- 3649,3882 ----
        if (TREE_NO_WARNING (exp))
  	return false;
  
+       bool warned = false;
        location_t loc = tree_nonartificial_location (exp);
+       loc = expansion_point_location_if_in_system_header (loc);
  
        if (tree_int_cst_equal (range[0], range[1]))
! 	warned = (func
! 		  ? warning_n (loc, opt, tree_to_uhwi (range[0]),
! 			       "%K%qD reading %E byte from a region of size %E",
! 			       "%K%qD reading %E bytes from a region of size %E",
! 			       exp, func, range[0], slen)
! 		  : warning_n (loc, opt, tree_to_uhwi (range[0]),
! 			       "%Kreading %E byte from a region of size %E",
! 			       "%Kreading %E bytes from a region of size %E",
! 			       exp, range[0], slen));
        else if (tree_int_cst_sign_bit (range[1]))
  	{
  	  /* Avoid printing the upper bound if it's invalid.  */
! 	  warned = (func
! 		    ? warning_at (loc, opt,
! 				  "%K%qD reading %E or more bytes from a region "
! 				  "of size %E",
! 				  exp, func, range[0], slen)
! 		    : warning_at (loc, opt,
! 				  "%Kreading %E or more bytes from a region "
! 				  "of size %E",
! 				  exp, range[0], slen));
  	}
        else
! 	warned = (func
! 		  ? warning_at (loc, opt,
! 				"%K%qD reading between %E and %E bytes from "
! 				"a region of size %E",
! 				exp, func, range[0], range[1], slen)
! 		  : warning_at (loc, opt,
! 				"%Kreading between %E and %E bytes from "
! 				"a region of size %E",
! 				exp, range[0], range[1], slen));
!       if (warned)
! 	TREE_NO_WARNING (exp) = true;
! 
        return false;
      }
  
    return true;
  }
  
+ /* If STMT is a call to an allocation function, returns the constant
+    size of the object allocated by the call represented as sizetype.
+    If nonnull, sets RNG1[] to the range of the size.  */
+ 
+ tree
+ gimple_call_alloc_size (gimple *stmt, wide_int rng1[2] /* = NULL */,
+ 			const vr_values *rvals /* = NULL */)
+ {
+   if (!stmt)
+     return NULL_TREE;
+ 
+   tree allocfntype;
+   if (tree fndecl = gimple_call_fndecl (stmt))
+     allocfntype = TREE_TYPE (fndecl);
+   else
+     allocfntype = gimple_call_fntype (stmt);
+ 
+   if (!allocfntype)
+     return NULL_TREE;
+ 
+   unsigned argidx1 = UINT_MAX, argidx2 = UINT_MAX;
+   tree at = lookup_attribute ("alloc_size", TYPE_ATTRIBUTES (allocfntype));
+   if (!at)
+     {
+       if (!gimple_call_builtin_p (stmt, BUILT_IN_ALLOCA_WITH_ALIGN))
+ 	return NULL_TREE;
+ 
+       argidx1 = 0;
+     }
+ 
+   unsigned nargs = gimple_call_num_args (stmt);
+ 
+   if (argidx1 == UINT_MAX)
+     {
+       tree atval = TREE_VALUE (at);
+       if (!atval)
+ 	return NULL_TREE;
+ 
+       argidx1 = TREE_INT_CST_LOW (TREE_VALUE (atval)) - 1;
+       if (nargs <= argidx1)
+ 	return NULL_TREE;
+ 
+       atval = TREE_CHAIN (atval);
+       if (atval)
+ 	{
+ 	  argidx2 = TREE_INT_CST_LOW (TREE_VALUE (atval)) - 1;
+ 	  if (nargs <= argidx2)
+ 	    return NULL_TREE;
+ 	}
+     }
+ 
+   tree size = gimple_call_arg (stmt, argidx1);
+ 
+   wide_int rng1_buf[2];
+   /* If RNG1 is not set, use the buffer.  */
+   if (!rng1)
+     rng1 = rng1_buf;
+ 
+   if (!get_range (size, rng1, rvals))
+     return NULL_TREE;
+ 
+   if (argidx2 > nargs && TREE_CODE (size) == INTEGER_CST)
+     return fold_convert (sizetype, size);
+ 
+   /* To handle ranges do the math in wide_int and return the product
+      of the upper bounds as a constant.  Ignore anti-ranges.  */
+   tree n = argidx2 < nargs ? gimple_call_arg (stmt, argidx2) : integer_one_node;
+   wide_int rng2[2];
+   if (!get_range (n, rng2, rvals))
+     return NULL_TREE;
+ 
+   /* Extend to the maximum precision to avoid overflow.  */
+   const int prec = ADDR_MAX_PRECISION;
+   rng1[0] = wide_int::from (rng1[0], prec, UNSIGNED);
+   rng1[1] = wide_int::from (rng1[1], prec, UNSIGNED);
+   rng2[0] = wide_int::from (rng2[0], prec, UNSIGNED);
+   rng2[1] = wide_int::from (rng2[1], prec, UNSIGNED);
+ 
+   /* Compute products of both bounds for the caller but return the lesser
+      of SIZE_MAX and the product of the upper bounds as a constant.  */
+   rng1[0] = rng1[0] * rng2[0];
+   rng1[1] = rng1[1] * rng2[1];
+   tree size_max = TYPE_MAX_VALUE (sizetype);
+   if (wi::gtu_p (rng1[1], wi::to_wide (size_max, prec)))
+     {
+       rng1[1] = wi::to_wide (size_max);
+       return size_max;
+     }
+ 
+   return wide_int_to_tree (sizetype, rng1[1]);
+ }
+ 
+ /* Helper for compute_objsize.  Returns the constant size of the DEST
+    if it refers to a variable or field and sets *PDECL to the DECL and
+    *POFF to zero.  Otherwise returns null for other nodes.  */
+ 
+ static tree
+ addr_decl_size (tree dest, tree *pdecl, tree *poff)
+ {
+   if (TREE_CODE (dest) == ADDR_EXPR)
+     dest = TREE_OPERAND (dest, 0);
+ 
+   if (DECL_P (dest))
+     {
+       *pdecl = dest;
+       *poff = integer_zero_node;
+       if (tree size = DECL_SIZE_UNIT (dest))
+ 	return TREE_CODE (size) == INTEGER_CST ? size : NULL_TREE;
+     }
+ 
+   if (TREE_CODE (dest) == COMPONENT_REF)
+     {
+       *pdecl = TREE_OPERAND (dest, 1);
+       *poff = integer_zero_node;
+       /* Only return constant sizes for now while callers depend on it.  */
+       if (tree size = component_ref_size (dest))
+ 	return TREE_CODE (size) == INTEGER_CST ? size : NULL_TREE;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
  /* Helper to compute the size of the object referenced by the DEST
     expression which must have pointer type, using Object Size type
!    OSTYPE (only the least significant 2 bits are used).
!    Returns an estimate of the size of the object represented as
!    a sizetype constant if successful or NULL when the size cannot
!    be determined.
!    When the referenced object involves a non-constant offset in some
!    range the returned value represents the largest size given the
!    smallest non-negative offset in the range.
!    If nonnull, sets *PDECL to the decl of the referenced subobject
!    if it can be determined, or to null otherwise.  Likewise, when
!    POFF is nonnull *POFF is set to the offset into *PDECL.
! 
!    The function is intended for diagnostics and should not be used
!    to influence code generation or optimization.  */
  
  tree
! compute_objsize (tree dest, int ostype, tree *pdecl /* = NULL */,
! 		 tree *poff /* = NULL */, const vr_values *rvals /* = NULL */)
  {
!   tree dummy_decl = NULL_TREE;
!   if (!pdecl)
!     pdecl = &dummy_decl;
! 
!   tree dummy_off = NULL_TREE;
!   if (!poff)
!     poff = &dummy_off;
  
    /* Only the two least significant bits are meaningful.  */
    ostype &= 3;
  
!   if (ostype)
!     /* Except for overly permissive calls to memcpy and other raw
!        memory functions with zero OSTYPE, detect the size from simple
!        DECLs first to more reliably than compute_builtin_object_size
!        set *PDECL and *POFF.  */
!     if (tree size = addr_decl_size (dest, pdecl, poff))
!       return size;
! 
!   unsigned HOST_WIDE_INT size;
!   if (compute_builtin_object_size (dest, ostype, &size, pdecl, poff))
      return build_int_cst (sizetype, size);
  
    if (TREE_CODE (dest) == SSA_NAME)
      {
        gimple *stmt = SSA_NAME_DEF_STMT (dest);
+       if (is_gimple_call (stmt))
+ 	{
+ 	  /* If STMT is a call to an allocation function get the size
+ 	     from its argument(s).  If successful, also set *PDECL to
+ 	     DEST for the caller to include in diagnostics.  */
+ 	  if (tree size = gimple_call_alloc_size (stmt))
+ 	    {
+ 	      *pdecl = dest;
+ 	      *poff = integer_zero_node;
+ 	      return size;
+ 	    }
+ 	  return NULL_TREE;
+ 	}
+ 
        if (!is_gimple_assign (stmt))
  	return NULL_TREE;
  
*************** compute_objsize (tree dest, int ostype)
*** 3618,3624 ****
  	  tree off = gimple_assign_rhs2 (stmt);
  	  if (TREE_CODE (off) == INTEGER_CST)
  	    {
! 	      if (tree size = compute_objsize (dest, ostype))
  		{
  		  wide_int wioff = wi::to_wide (off);
  		  wide_int wisiz = wi::to_wide (size);
--- 3892,3898 ----
  	  tree off = gimple_assign_rhs2 (stmt);
  	  if (TREE_CODE (off) == INTEGER_CST)
  	    {
! 	      if (tree size = compute_objsize (dest, ostype, pdecl, poff))
  		{
  		  wide_int wioff = wi::to_wide (off);
  		  wide_int wisiz = wi::to_wide (size);
*************** compute_objsize (tree dest, int ostype)
*** 3626,3665 ****
  		  /* Ignore negative offsets for now.  For others,
  		     use the lower bound as the most optimistic
  		     estimate of the (remaining) size.  */
! 		  if (wi::sign_mask (wioff))
  		    ;
- 		  else if (wi::ltu_p (wioff, wisiz))
- 		    return wide_int_to_tree (TREE_TYPE (size),
- 					     wi::sub (wisiz, wioff));
  		  else
! 		    return size_zero_node;
  		}
  	    }
  	  else if (TREE_CODE (off) == SSA_NAME
! 	      && INTEGRAL_TYPE_P (TREE_TYPE (off)))
  	    {
  	      wide_int min, max;
  	      enum value_range_kind rng = get_range_info (off, &min, &max);
  
  	      if (rng == VR_RANGE)
! 		{
! 		  if (tree size = compute_objsize (dest, ostype))
! 		    {
! 		      wide_int wisiz = wi::to_wide (size);
  
! 		      /* Ignore negative offsets for now.  For others,
! 			 use the lower bound as the most optimistic
! 			 estimate of the (remaining)size.  */
! 		      if (wi::sign_mask (min)
! 			  || wi::sign_mask (max))
! 			;
! 		      else if (wi::ltu_p (min, wisiz))
! 			return wide_int_to_tree (TREE_TYPE (size),
! 						 wi::sub (wisiz, min));
! 		      else
  			return size_zero_node;
! 		    }
! 		}
  	    }
  	}
        else if (code != ADDR_EXPR)
--- 3900,3954 ----
  		  /* Ignore negative offsets for now.  For others,
  		     use the lower bound as the most optimistic
  		     estimate of the (remaining) size.  */
! 		  if (wi::neg_p (wioff))
  		    ;
  		  else
! 		    {
! 		      if (*poff)
! 			{
! 			  *poff = fold_convert (ptrdiff_type_node, *poff);
! 			  off = fold_convert (ptrdiff_type_node, *poff);
! 			  *poff = size_binop (PLUS_EXPR, *poff, off);
! 			}
! 		      else
! 			*poff = off;
! 		      if (wi::ltu_p (wioff, wisiz))
! 			return wide_int_to_tree (TREE_TYPE (size),
! 						 wi::sub (wisiz, wioff));
! 		      return size_zero_node;
! 		    }
  		}
  	    }
  	  else if (TREE_CODE (off) == SSA_NAME
! 		   && INTEGRAL_TYPE_P (TREE_TYPE (off)))
  	    {
  	      wide_int min, max;
  	      enum value_range_kind rng = get_range_info (off, &min, &max);
  
  	      if (rng == VR_RANGE)
! 		if (tree size = compute_objsize (dest, ostype, pdecl, poff))
! 		  {
! 		    wide_int wisiz = wi::to_wide (size);
  
! 		    /* Ignore negative offsets for now.  For others,
! 		       use the lower bound as the most optimistic
! 		       estimate of the (remaining)size.  */
! 		    if (wi::neg_p (min) || wi::neg_p (max))
! 		      ;
! 		    else
! 		      {
! 			/* FIXME: For now, since the offset is non-constant,
! 			   clear *POFF to keep it from being "misused."
! 			   Eventually *POFF will need to become a range that
! 			   can be properly added to the outer offset if it
! 			   too is one.  */
! 			*poff = NULL_TREE;
! 			if (wi::ltu_p (min, wisiz))
! 			  return wide_int_to_tree (TREE_TYPE (size),
! 						   wi::sub (wisiz, min));
  			return size_zero_node;
! 		      }
! 		  }
  	    }
  	}
        else if (code != ADDR_EXPR)
*************** compute_objsize (tree dest, int ostype)
*** 3671,3694 ****
    if (!ostype)
      return NULL_TREE;
  
!   if (TREE_CODE (dest) != ADDR_EXPR)
!     return NULL_TREE;
  
    tree type = TREE_TYPE (dest);
    if (TREE_CODE (type) == POINTER_TYPE)
      type = TREE_TYPE (type);
  
    type = TYPE_MAIN_VARIANT (type);
  
    if (TREE_CODE (type) == ARRAY_TYPE
!       && !array_at_struct_end_p (TREE_OPERAND (dest, 0)))
      {
!       /* Return the constant size unless it's zero (that's a zero-length
! 	 array likely at the end of a struct).  */
!       tree size = TYPE_SIZE_UNIT (type);
!       if (size && TREE_CODE (size) == INTEGER_CST
! 	  && !integer_zerop (size))
! 	return size;
      }
  
    return NULL_TREE;
--- 3960,4128 ----
    if (!ostype)
      return NULL_TREE;
  
!   if (TREE_CODE (dest) == ARRAY_REF
!       || TREE_CODE (dest) == MEM_REF)
!     {
!       tree ref = TREE_OPERAND (dest, 0);
!       tree reftype = TREE_TYPE (ref);
!       if (TREE_CODE (dest) == MEM_REF && TREE_CODE (reftype) == POINTER_TYPE)
! 	{
! 	  /* Give up for MEM_REFs of vector types; those may be synthesized
! 	     from multiple assignments to consecutive data members.  See PR
! 	     93200.
! 	     FIXME: Deal with this more generally, e.g., by marking up such
! 	     MEM_REFs at the time they're created.  */
! 	  reftype = TREE_TYPE (reftype);
! 	  if (TREE_CODE (reftype) == VECTOR_TYPE)
! 	    return NULL_TREE;
! 	}
!       tree off = TREE_OPERAND (dest, 1);
!       if (tree size = compute_objsize (ref, ostype, pdecl, poff))
! 	{
! 	  /* If the declaration of the destination object is known
! 	     to have zero size, return zero.  */
! 	  if (integer_zerop (size)
! 	      && *pdecl && DECL_P (*pdecl)
! 	      && *poff && integer_zerop (*poff))
! 	    return size_zero_node;
! 
! 	  /* A valid offset into a declared object cannot be negative.
! 	     A zero size with a zero "inner" offset is still zero size
! 	     regardless of the "other" offset OFF.  */
! 	  if (*poff
! 	      && ((integer_zerop (*poff) && integer_zerop (size))
! 		  || (TREE_CODE (*poff) == INTEGER_CST
! 		      && tree_int_cst_sgn (*poff) < 0)))
! 	    return size_zero_node;
! 
! 	  wide_int offrng[2];
! 	  if (!get_range (off, offrng, rvals))
! 	    return NULL_TREE;
! 
! 	  /* Convert to the same precision to keep wide_int from "helpfully"
! 	     crashing whenever it sees other arguments.  */
! 	  const unsigned sizprec = TYPE_PRECISION (sizetype);
! 	  offrng[0] = wide_int::from (offrng[0], sizprec, SIGNED);
! 	  offrng[1] = wide_int::from (offrng[1], sizprec, SIGNED);
! 
! 	  /* Adjust SIZE either up or down by the sum of *POFF and OFF
! 	     above.  */
! 	  if (TREE_CODE (dest) == ARRAY_REF)
! 	    {
! 	      tree lowbnd = array_ref_low_bound (dest);
! 	      if (!integer_zerop (lowbnd) && tree_fits_uhwi_p (lowbnd))
! 		{
! 		  /* Adjust the offset by the low bound of the array
! 		     domain (normally zero but 1 in Fortran).  */
! 		  unsigned HOST_WIDE_INT lb = tree_to_uhwi (lowbnd);
! 		  offrng[0] -= lb;
! 		  offrng[1] -= lb;
! 		}
! 
! 	      /* Convert the array index into a byte offset.  */
! 	      tree eltype = TREE_TYPE (dest);
! 	      tree tpsize = TYPE_SIZE_UNIT (eltype);
! 	      if (tpsize && TREE_CODE (tpsize) == INTEGER_CST)
! 		{
! 		  wide_int wsz = wi::to_wide (tpsize, offrng->get_precision ());
! 		  offrng[0] *= wsz;
! 		  offrng[1] *= wsz;
! 		}
! 	      else
! 		return NULL_TREE;
! 	    }
! 
! 	  wide_int wisize = wi::to_wide (size);
! 
! 	  if (!*poff)
! 	    {
! 	      /* If the "inner" offset is unknown and the "outer" offset
! 		 is either negative or less than SIZE, return the size
! 		 minus the offset.  This may be overly optimistic in
! 		 the first case if the inner offset happens to be less
! 		 than the absolute value of the outer offset.  */
! 	      if (wi::neg_p (offrng[0]))
! 		return size;
! 	      if (wi::ltu_p (offrng[0], wisize))
! 		return build_int_cst (sizetype, (wisize - offrng[0]).to_uhwi ());
! 	      return size_zero_node;
! 	    }
! 
! 	  /* Convert to the same precision to keep wide_int from "helpfuly"
! 	     crashing whenever it sees other argumments.  */
! 	  offrng[0] = wide_int::from (offrng[0], sizprec, SIGNED);
! 	  offrng[1] = wide_int::from (offrng[1], sizprec, SIGNED);
! 
! 	  tree dstoff = *poff;
! 	  if (integer_zerop (*poff))
! 	    *poff = off;
! 	  else if (!integer_zerop (off))
! 	    {
! 	      *poff = fold_convert (ptrdiff_type_node, *poff);
! 	      off = fold_convert (ptrdiff_type_node, off);
! 	      *poff = size_binop (PLUS_EXPR, *poff, off);
! 	    }
! 
! 	  if (!wi::neg_p (offrng[0]))
! 	    {
! 	      if (TREE_CODE (size) != INTEGER_CST)
! 		return NULL_TREE;
! 
! 	      /* Return the difference between the size and the offset
! 		 or zero if the offset is greater.  */
! 	      wide_int wisize = wi::to_wide (size, sizprec);
! 	      if (wi::ltu_p (wisize, offrng[0]))
! 		return size_zero_node;
! 
! 	      return wide_int_to_tree (sizetype, wisize - offrng[0]);
! 	    }
! 
! 	  wide_int dstoffrng[2];
! 	  if (TREE_CODE (dstoff) == INTEGER_CST)
! 	    dstoffrng[0] = dstoffrng[1] = wi::to_wide (dstoff);
! 	  else if (TREE_CODE (dstoff) == SSA_NAME)
! 	    {
! 	      enum value_range_kind rng
! 		= get_range_info (dstoff, dstoffrng, dstoffrng + 1);
! 	      if (rng != VR_RANGE)
! 		return NULL_TREE;
! 	    }
! 	  else
! 	    return NULL_TREE;
! 
! 	  dstoffrng[0] = wide_int::from (dstoffrng[0], sizprec, SIGNED);
! 	  dstoffrng[1] = wide_int::from (dstoffrng[1], sizprec, SIGNED);
! 
! 	  if (!wi::neg_p (dstoffrng[0]))
! 	    wisize += dstoffrng[0];
! 
! 	  offrng[1] += dstoffrng[1];
! 	  if (wi::neg_p (offrng[1]))
! 	    return size_zero_node;
! 
! 	  return wide_int_to_tree (sizetype, wisize);
! 	}
! 
!       return NULL_TREE;
!     }
! 
!   /* Try simple DECLs not handled above.  */
!   if (tree size = addr_decl_size (dest, pdecl, poff))
!     return size;
  
    tree type = TREE_TYPE (dest);
    if (TREE_CODE (type) == POINTER_TYPE)
      type = TREE_TYPE (type);
  
    type = TYPE_MAIN_VARIANT (type);
+   if (TREE_CODE (dest) == ADDR_EXPR)
+     dest = TREE_OPERAND (dest, 0);
  
    if (TREE_CODE (type) == ARRAY_TYPE
!       && !array_at_struct_end_p (dest))
      {
!       if (tree size = TYPE_SIZE_UNIT (type))
! 	return TREE_CODE (size) == INTEGER_CST ? size : NULL_TREE;
      }
  
    return NULL_TREE;
*************** expand_builtin_memcpy (tree exp, rtx tar
*** 3759,3772 ****
    check_memop_access (exp, dest, src, len);
  
    return expand_builtin_memory_copy_args (dest, src, len, target, exp,
! 					  /*retmode=*/ RETURN_BEGIN);
  }
  
  /* Check a call EXP to the memmove built-in for validity.
     Return NULL_RTX on both success and failure.  */
  
  static rtx
! expand_builtin_memmove (tree exp, rtx)
  {
    if (!validate_arglist (exp,
   			 POINTER_TYPE, POINTER_TYPE, INTEGER_TYPE, VOID_TYPE))
--- 4193,4206 ----
    check_memop_access (exp, dest, src, len);
  
    return expand_builtin_memory_copy_args (dest, src, len, target, exp,
! 					  /*retmode=*/ RETURN_BEGIN, false);
  }
  
  /* Check a call EXP to the memmove built-in for validity.
     Return NULL_RTX on both success and failure.  */
  
  static rtx
! expand_builtin_memmove (tree exp, rtx target)
  {
    if (!validate_arglist (exp,
   			 POINTER_TYPE, POINTER_TYPE, INTEGER_TYPE, VOID_TYPE))
*************** expand_builtin_memmove (tree exp, rtx)
*** 3778,3784 ****
  
    check_memop_access (exp, dest, src, len);
  
!   return NULL_RTX;
  }
  
  /* Expand a call EXP to the mempcpy builtin.
--- 4212,4219 ----
  
    check_memop_access (exp, dest, src, len);
  
!   return expand_builtin_memory_copy_args (dest, src, len, target, exp,
! 					  /*retmode=*/ RETURN_BEGIN, true);
  }
  
  /* Expand a call EXP to the mempcpy builtin.
*************** expand_builtin_mempcpy (tree exp, rtx ta
*** 3827,3833 ****
  
  static rtx
  expand_builtin_memory_copy_args (tree dest, tree src, tree len,
! 				 rtx target, tree exp, memop_ret retmode)
  {
    const char *src_str;
    unsigned int src_align = get_pointer_alignment (src);
--- 4262,4269 ----
  
  static rtx
  expand_builtin_memory_copy_args (tree dest, tree src, tree len,
! 				 rtx target, tree exp, memop_ret retmode,
! 				 bool might_overlap)
  {
    const char *src_str;
    unsigned int src_align = get_pointer_alignment (src);
*************** expand_builtin_memory_copy_args (tree de
*** 3839,3844 ****
--- 4275,4282 ----
    unsigned HOST_WIDE_INT max_size;
    unsigned HOST_WIDE_INT probable_max_size;
  
+   bool is_move_done;
+ 
    /* If DEST is not a pointer type, call the normal function.  */
    if (dest_align == 0)
      return NULL_RTX;
*************** expand_builtin_memory_copy_args (tree de
*** 3861,3869 ****
  			&probable_max_size);
    src_str = c_getstr (src);
  
!   /* If SRC is a string constant and block move would be done
!      by pieces, we can avoid loading the string from memory
!      and only stored the computed constants.  */
    if (src_str
        && CONST_INT_P (len_rtx)
        && (unsigned HOST_WIDE_INT) INTVAL (len_rtx) <= strlen (src_str) + 1
--- 4299,4310 ----
  			&probable_max_size);
    src_str = c_getstr (src);
  
!   /* If SRC is a string constant and block move would be done by
!      pieces, we can avoid loading the string from memory and only
!      stored the computed constants.  This works in the overlap
!      (memmove) case as well because store_by_pieces just generates a
!      series of stores of constants from the string constant returned
!      by c_getstr().  */
    if (src_str
        && CONST_INT_P (len_rtx)
        && (unsigned HOST_WIDE_INT) INTVAL (len_rtx) <= strlen (src_str) + 1
*************** expand_builtin_memory_copy_args (tree de
*** 3888,3898 ****
    if (CALL_EXPR_TAILCALL (exp)
        && (retmode == RETURN_BEGIN || target == const0_rtx))
      method = BLOCK_OP_TAILCALL;
!   if (retmode == RETURN_END && target != const0_rtx)
      method = BLOCK_OP_NO_LIBCALL_RET;
    dest_addr = emit_block_move_hints (dest_mem, src_mem, len_rtx, method,
  				     expected_align, expected_size,
! 				     min_size, max_size, probable_max_size);
    if (dest_addr == pc_rtx)
      return NULL_RTX;
  
--- 4329,4351 ----
    if (CALL_EXPR_TAILCALL (exp)
        && (retmode == RETURN_BEGIN || target == const0_rtx))
      method = BLOCK_OP_TAILCALL;
!   bool use_mempcpy_call = (targetm.libc_has_fast_function (BUILT_IN_MEMPCPY)
! 			   && retmode == RETURN_END
! 			   && !might_overlap
! 			   && target != const0_rtx);
!   if (use_mempcpy_call)
      method = BLOCK_OP_NO_LIBCALL_RET;
    dest_addr = emit_block_move_hints (dest_mem, src_mem, len_rtx, method,
  				     expected_align, expected_size,
! 				     min_size, max_size, probable_max_size,
! 				     use_mempcpy_call, &is_move_done, might_overlap);
! 
!   /* Bail out when a mempcpy call would be expanded as libcall and when
!      we have a target that provides a fast implementation
!      of mempcpy routine.  */
!   if (!is_move_done)
!     return NULL_RTX;
! 
    if (dest_addr == pc_rtx)
      return NULL_RTX;
  
*************** expand_builtin_mempcpy_args (tree dest,
*** 3918,3924 ****
  			     rtx target, tree orig_exp, memop_ret retmode)
  {
    return expand_builtin_memory_copy_args (dest, src, len, target, orig_exp,
! 					  retmode);
  }
  
  /* Expand into a movstr instruction, if one is available.  Return NULL_RTX if
--- 4371,4377 ----
  			     rtx target, tree orig_exp, memop_ret retmode)
  {
    return expand_builtin_memory_copy_args (dest, src, len, target, orig_exp,
! 					  retmode, false);
  }
  
  /* Expand into a movstr instruction, if one is available.  Return NULL_RTX if
*************** expand_builtin_mempcpy_args (tree dest,
*** 3929,3935 ****
  static rtx
  expand_movstr (tree dest, tree src, rtx target, memop_ret retmode)
  {
!   struct expand_operand ops[3];
    rtx dest_mem;
    rtx src_mem;
  
--- 4382,4388 ----
  static rtx
  expand_movstr (tree dest, tree src, rtx target, memop_ret retmode)
  {
!   class expand_operand ops[3];
    rtx dest_mem;
    rtx src_mem;
  
*************** expand_movstr (tree dest, tree src, rtx
*** 3972,3978 ****
     to the library function.  */
  
  static rtx
! expand_builtin_strcat (tree exp, rtx)
  {
    if (!validate_arglist (exp, POINTER_TYPE, POINTER_TYPE, VOID_TYPE)
        || !warn_stringop_overflow)
--- 4425,4431 ----
     to the library function.  */
  
  static rtx
! expand_builtin_strcat (tree exp)
  {
    if (!validate_arglist (exp, POINTER_TYPE, POINTER_TYPE, VOID_TYPE)
        || !warn_stringop_overflow)
*************** expand_builtin_strcat (tree exp, rtx)
*** 3981,3986 ****
--- 4434,4443 ----
    tree dest = CALL_EXPR_ARG (exp, 0);
    tree src = CALL_EXPR_ARG (exp, 1);
  
+   /* Detect unterminated source (only).  */
+   if (!check_nul_terminated_array (exp, src))
+     return NULL_RTX;
+ 
    /* There is no way here to determine the length of the string in
       the destination to which the SRC string is being appended so
       just diagnose cases when the souce string is longer than
*************** expand_builtin_stpncpy (tree exp, rtx)
*** 4176,4181 ****
--- 4633,4640 ----
  
    /* The exact number of bytes to write (not the maximum).  */
    tree len = CALL_EXPR_ARG (exp, 2);
+   if (!check_nul_terminated_array (exp, src, len))
+     return NULL_RTX;
  
    /* The size of the destination object.  */
    tree destsize = compute_objsize (dest, warn_stringop_overflow - 1);
*************** expand_builtin_strncat (tree exp, rtx)
*** 4278,4283 ****
--- 4737,4747 ----
    tree src = CALL_EXPR_ARG (exp, 1);
    /* The upper bound on the number of bytes to write.  */
    tree maxread = CALL_EXPR_ARG (exp, 2);
+ 
+   /* Detect unterminated source (only).  */
+   if (!check_nul_terminated_array (exp, src, maxread))
+     return NULL_RTX;
+ 
    /* The length of the source sequence.  */
    tree slen = c_strlen (src, 1);
  
*************** expand_builtin_strncpy (tree exp, rtx ta
*** 4339,4397 ****
  {
    location_t loc = EXPR_LOCATION (exp);
  
!   if (validate_arglist (exp,
!  			POINTER_TYPE, POINTER_TYPE, INTEGER_TYPE, VOID_TYPE))
!     {
!       tree dest = CALL_EXPR_ARG (exp, 0);
!       tree src = CALL_EXPR_ARG (exp, 1);
!       /* The number of bytes to write (not the maximum).  */
!       tree len = CALL_EXPR_ARG (exp, 2);
!       /* The length of the source sequence.  */
!       tree slen = c_strlen (src, 1);
  
!       if (warn_stringop_overflow)
! 	{
! 	  tree destsize = compute_objsize (dest,
! 					   warn_stringop_overflow - 1);
  
! 	  /* The number of bytes to write is LEN but check_access will also
! 	     check SLEN if LEN's value isn't known.  */
! 	  check_access (exp, dest, src, len, /*maxread=*/NULL_TREE, src,
! 			destsize);
! 	}
  
!       /* We must be passed a constant len and src parameter.  */
!       if (!tree_fits_uhwi_p (len) || !slen || !tree_fits_uhwi_p (slen))
! 	return NULL_RTX;
  
!       slen = size_binop_loc (loc, PLUS_EXPR, slen, ssize_int (1));
  
!       /* We're required to pad with trailing zeros if the requested
! 	 len is greater than strlen(s2)+1.  In that case try to
! 	 use store_by_pieces, if it fails, punt.  */
!       if (tree_int_cst_lt (slen, len))
! 	{
! 	  unsigned int dest_align = get_pointer_alignment (dest);
! 	  const char *p = c_getstr (src);
! 	  rtx dest_mem;
  
! 	  if (!p || dest_align == 0 || !tree_fits_uhwi_p (len)
! 	      || !can_store_by_pieces (tree_to_uhwi (len),
! 				       builtin_strncpy_read_str,
! 				       CONST_CAST (char *, p),
! 				       dest_align, false))
! 	    return NULL_RTX;
  
! 	  dest_mem = get_memory_rtx (dest, len);
! 	  store_by_pieces (dest_mem, tree_to_uhwi (len),
! 			   builtin_strncpy_read_str,
! 			   CONST_CAST (char *, p), dest_align, false,
! 			   RETURN_BEGIN);
! 	  dest_mem = force_operand (XEXP (dest_mem, 0), target);
! 	  dest_mem = convert_memory_address (ptr_mode, dest_mem);
! 	  return dest_mem;
! 	}
      }
    return NULL_RTX;
  }
  
--- 4803,4865 ----
  {
    location_t loc = EXPR_LOCATION (exp);
  
!   if (!validate_arglist (exp,
! 			 POINTER_TYPE, POINTER_TYPE, INTEGER_TYPE, VOID_TYPE))
!     return NULL_RTX;
!   tree dest = CALL_EXPR_ARG (exp, 0);
!   tree src = CALL_EXPR_ARG (exp, 1);
!   /* The number of bytes to write (not the maximum).  */
!   tree len = CALL_EXPR_ARG (exp, 2);
  
!   if (!check_nul_terminated_array (exp, src, len))
!     return NULL_RTX;
  
!   /* The length of the source sequence.  */
!   tree slen = c_strlen (src, 1);
  
!   if (warn_stringop_overflow)
!     {
!       tree destsize = compute_objsize (dest,
! 				       warn_stringop_overflow - 1);
  
!       /* The number of bytes to write is LEN but check_access will also
! 	 check SLEN if LEN's value isn't known.  */
!       check_access (exp, dest, src, len, /*maxread=*/NULL_TREE, src,
! 		    destsize);
!     }
  
!   /* We must be passed a constant len and src parameter.  */
!   if (!tree_fits_uhwi_p (len) || !slen || !tree_fits_uhwi_p (slen))
!     return NULL_RTX;
  
!   slen = size_binop_loc (loc, PLUS_EXPR, slen, ssize_int (1));
  
!   /* We're required to pad with trailing zeros if the requested
!      len is greater than strlen(s2)+1.  In that case try to
!      use store_by_pieces, if it fails, punt.  */
!   if (tree_int_cst_lt (slen, len))
!     {
!       unsigned int dest_align = get_pointer_alignment (dest);
!       const char *p = c_getstr (src);
!       rtx dest_mem;
! 
!       if (!p || dest_align == 0 || !tree_fits_uhwi_p (len)
! 	  || !can_store_by_pieces (tree_to_uhwi (len),
! 				   builtin_strncpy_read_str,
! 				   CONST_CAST (char *, p),
! 				   dest_align, false))
! 	return NULL_RTX;
! 
!       dest_mem = get_memory_rtx (dest, len);
!       store_by_pieces (dest_mem, tree_to_uhwi (len),
! 		       builtin_strncpy_read_str,
! 		       CONST_CAST (char *, p), dest_align, false,
! 		       RETURN_BEGIN);
!       dest_mem = force_operand (XEXP (dest_mem, 0), target);
!       dest_mem = convert_memory_address (ptr_mode, dest_mem);
!       return dest_mem;
      }
+ 
    return NULL_RTX;
  }
  
*************** expand_cmpstr (insn_code icode, rtx targ
*** 4639,4645 ****
    if (target && (!REG_P (target) || HARD_REGISTER_P (target)))
      target = NULL_RTX;
  
!   struct expand_operand ops[4];
    create_output_operand (&ops[0], target, insn_mode);
    create_fixed_operand (&ops[1], arg1_rtx);
    create_fixed_operand (&ops[2], arg2_rtx);
--- 5107,5113 ----
    if (target && (!REG_P (target) || HARD_REGISTER_P (target)))
      target = NULL_RTX;
  
!   class expand_operand ops[4];
    create_output_operand (&ops[0], target, insn_mode);
    create_fixed_operand (&ops[1], arg1_rtx);
    create_fixed_operand (&ops[2], arg2_rtx);
*************** expand_builtin_strcmp (tree exp, ATTRIBU
*** 4770,4775 ****
--- 5238,5250 ----
    if (!validate_arglist (exp, POINTER_TYPE, POINTER_TYPE, VOID_TYPE))
      return NULL_RTX;
  
+   tree arg1 = CALL_EXPR_ARG (exp, 0);
+   tree arg2 = CALL_EXPR_ARG (exp, 1);
+ 
+   if (!check_nul_terminated_array (exp, arg1)
+       || !check_nul_terminated_array (exp, arg2))
+     return NULL_RTX;
+ 
    /* Due to the performance benefit, always inline the calls first.  */
    rtx result = NULL_RTX;
    result = inline_expand_builtin_string_cmp (exp, target);
*************** expand_builtin_strcmp (tree exp, ATTRIBU
*** 4781,4789 ****
    if (cmpstr_icode == CODE_FOR_nothing && cmpstrn_icode == CODE_FOR_nothing)
      return NULL_RTX;
  
-   tree arg1 = CALL_EXPR_ARG (exp, 0);
-   tree arg2 = CALL_EXPR_ARG (exp, 1);
- 
    unsigned int arg1_align = get_pointer_alignment (arg1) / BITS_PER_UNIT;
    unsigned int arg2_align = get_pointer_alignment (arg2) / BITS_PER_UNIT;
  
--- 5256,5261 ----
*************** expand_builtin_strncmp (tree exp, ATTRIB
*** 4889,4894 ****
--- 5361,5374 ----
   			 POINTER_TYPE, POINTER_TYPE, INTEGER_TYPE, VOID_TYPE))
      return NULL_RTX;
  
+   tree arg1 = CALL_EXPR_ARG (exp, 0);
+   tree arg2 = CALL_EXPR_ARG (exp, 1);
+   tree arg3 = CALL_EXPR_ARG (exp, 2);
+ 
+   if (!check_nul_terminated_array (exp, arg1, arg3)
+       || !check_nul_terminated_array (exp, arg2, arg3))
+     return NULL_RTX;
+ 
    /* Due to the performance benefit, always inline the calls first.  */
    rtx result = NULL_RTX;
    result = inline_expand_builtin_string_cmp (exp, target);
*************** expand_builtin_strncmp (tree exp, ATTRIB
*** 4904,4913 ****
  
    tree len;
  
-   tree arg1 = CALL_EXPR_ARG (exp, 0);
-   tree arg2 = CALL_EXPR_ARG (exp, 1);
-   tree arg3 = CALL_EXPR_ARG (exp, 2);
- 
    unsigned int arg1_align = get_pointer_alignment (arg1) / BITS_PER_UNIT;
    unsigned int arg2_align = get_pointer_alignment (arg2) / BITS_PER_UNIT;
  
--- 5384,5389 ----
*************** expand_builtin_alloca (tree exp)
*** 5355,5360 ****
--- 5831,5840 ----
      = allocate_dynamic_stack_space (op0, 0, align, max_size, alloca_for_var);
    result = convert_memory_address (ptr_mode, result);
  
+   /* Dynamic allocations for variables are recorded during gimplification.  */
+   if (!alloca_for_var && (flag_callgraph_info & CALLGRAPH_INFO_DYNAMIC_ALLOC))
+     record_dynamic_alloc (exp);
+ 
    return result;
  }
  
*************** expand_builtin___clear_cache (tree exp)
*** 5612,5618 ****
  
    if (targetm.have_clear_cache ())
      {
!       struct expand_operand ops[2];
  
        begin = CALL_EXPR_ARG (exp, 0);
        begin_rtx = expand_expr (begin, NULL_RTX, Pmode, EXPAND_NORMAL);
--- 6092,6098 ----
  
    if (targetm.have_clear_cache ())
      {
!       class expand_operand ops[2];
  
        begin = CALL_EXPR_ARG (exp, 0);
        begin_rtx = expand_expr (begin, NULL_RTX, Pmode, EXPAND_NORMAL);
*************** expand_builtin_init_descriptor (tree exp
*** 5748,5753 ****
--- 6228,6234 ----
    r_descr = expand_normal (t_descr);
    m_descr = gen_rtx_MEM (BLKmode, r_descr);
    MEM_NOTRAP_P (m_descr) = 1;
+   set_mem_align (m_descr, GET_MODE_ALIGNMENT (ptr_mode));
  
    r_func = expand_normal (t_func);
    r_chain = expand_normal (t_chain);
*************** expand_builtin_fork_or_exec (tree fn, tr
*** 5897,5902 ****
--- 6378,6403 ----
    tree id, decl;
    tree call;
  
+   if (DECL_FUNCTION_CODE (fn) != BUILT_IN_FORK)
+     {
+       /* Detect unterminated path.  */
+       if (!check_nul_terminated_array (exp, CALL_EXPR_ARG (exp, 0)))
+ 	return NULL_RTX;
+ 
+       /* Also detect unterminated first argument.  */
+       switch (DECL_FUNCTION_CODE (fn))
+ 	{
+ 	case BUILT_IN_EXECL:
+ 	case BUILT_IN_EXECLE:
+ 	case BUILT_IN_EXECLP:
+ 	  if (!check_nul_terminated_array (exp, CALL_EXPR_ARG (exp, 0)))
+ 	    return NULL_RTX;
+ 	default:
+ 	  break;
+ 	}
+     }
+ 
+ 
    /* If we are not profiling, just call the function.  */
    if (!profile_arc_flag)
      return NULL_RTX;
*************** expand_ifn_atomic_bit_test_and (gcall *c
*** 6572,6578 ****
    machine_mode mode = TYPE_MODE (TREE_TYPE (flag));
    enum rtx_code code;
    optab optab;
!   struct expand_operand ops[5];
  
    gcc_assert (flag_inline_atomics);
  
--- 7073,7079 ----
    machine_mode mode = TYPE_MODE (TREE_TYPE (flag));
    enum rtx_code code;
    optab optab;
!   class expand_operand ops[5];
  
    gcc_assert (flag_inline_atomics);
  
*************** expand_builtin_atomic_always_lock_free (
*** 6784,6790 ****
  
    if (TREE_CODE (arg0) != INTEGER_CST)
      {
!       error ("non-constant argument 1 to __atomic_always_lock_free");
        return const0_rtx;
      }
  
--- 7285,7291 ----
  
    if (TREE_CODE (arg0) != INTEGER_CST)
      {
!       error ("non-constant argument 1 to %qs", "__atomic_always_lock_free");
        return const0_rtx;
      }
  
*************** expand_builtin_atomic_is_lock_free (tree
*** 6826,6832 ****
  
    if (!INTEGRAL_TYPE_P (TREE_TYPE (arg0)))
      {
!       error ("non-integer argument 1 to __atomic_is_lock_free");
        return NULL_RTX;
      }
  
--- 7327,7333 ----
  
    if (!INTEGRAL_TYPE_P (TREE_TYPE (arg0)))
      {
!       error ("non-integer argument 1 to %qs", "__atomic_is_lock_free");
        return NULL_RTX;
      }
  
*************** expand_builtin_thread_pointer (tree exp,
*** 6880,6886 ****
    icode = direct_optab_handler (get_thread_pointer_optab, Pmode);
    if (icode != CODE_FOR_nothing)
      {
!       struct expand_operand op;
        /* If the target is not sutitable then create a new target. */
        if (target == NULL_RTX
  	  || !REG_P (target)
--- 7381,7387 ----
    icode = direct_optab_handler (get_thread_pointer_optab, Pmode);
    if (icode != CODE_FOR_nothing)
      {
!       class expand_operand op;
        /* If the target is not sutitable then create a new target. */
        if (target == NULL_RTX
  	  || !REG_P (target)
*************** expand_builtin_set_thread_pointer (tree
*** 6903,6909 ****
    icode = direct_optab_handler (set_thread_pointer_optab, Pmode);
    if (icode != CODE_FOR_nothing)
      {
!       struct expand_operand op;
        rtx val = expand_expr (CALL_EXPR_ARG (exp, 0), NULL_RTX,
  			     Pmode, EXPAND_NORMAL);      
        create_input_operand (&op, val, Pmode);
--- 7404,7410 ----
    icode = direct_optab_handler (set_thread_pointer_optab, Pmode);
    if (icode != CODE_FOR_nothing)
      {
!       class expand_operand op;
        rtx val = expand_expr (CALL_EXPR_ARG (exp, 0), NULL_RTX,
  			     Pmode, EXPAND_NORMAL);      
        create_input_operand (&op, val, Pmode);
*************** inline_expand_builtin_string_cmp (tree e
*** 7157,7163 ****
    /* If the length of the comparision is larger than the threshold,
       do nothing.  */
    if (length > (unsigned HOST_WIDE_INT)
! 	       PARAM_VALUE (BUILTIN_STRING_CMP_INLINE_LENGTH))
      return NULL_RTX;
  
    machine_mode mode = TYPE_MODE (TREE_TYPE (exp));
--- 7658,7664 ----
    /* If the length of the comparision is larger than the threshold,
       do nothing.  */
    if (length > (unsigned HOST_WIDE_INT)
! 	       param_builtin_string_cmp_inline_length)
      return NULL_RTX;
  
    machine_mode mode = TYPE_MODE (TREE_TYPE (exp));
*************** expand_builtin (tree exp, rtx target, rt
*** 7228,7234 ****
  		int ignore)
  {
    tree fndecl = get_callee_fndecl (exp);
-   enum built_in_function fcode = DECL_FUNCTION_CODE (fndecl);
    machine_mode target_mode = TYPE_MODE (TREE_TYPE (exp));
    int flags;
  
--- 7729,7734 ----
*************** expand_builtin (tree exp, rtx target, rt
*** 7240,7245 ****
--- 7740,7746 ----
       redundant checks and be sure, that possible overflow will be detected
       by ASan.  */
  
+   enum built_in_function fcode = DECL_FUNCTION_CODE (fndecl);
    if ((flag_sanitize & SANITIZE_ADDRESS) && asan_intercepted_p (fcode))
      return expand_call (exp, target, ignore);
  
*************** expand_builtin (tree exp, rtx target, rt
*** 7547,7557 ****
        break;
  
      case BUILT_IN_STRCAT:
!       target = expand_builtin_strcat (exp, target);
        if (target)
  	return target;
        break;
  
      case BUILT_IN_STRCPY:
        target = expand_builtin_strcpy (exp, target);
        if (target)
--- 8048,8096 ----
        break;
  
      case BUILT_IN_STRCAT:
!       target = expand_builtin_strcat (exp);
        if (target)
  	return target;
        break;
  
+     case BUILT_IN_GETTEXT:
+     case BUILT_IN_PUTS:
+     case BUILT_IN_PUTS_UNLOCKED:
+     case BUILT_IN_STRDUP:
+       if (validate_arglist (exp, POINTER_TYPE, VOID_TYPE))
+ 	check_nul_terminated_array (exp, CALL_EXPR_ARG (exp, 0));
+       break;
+ 
+     case BUILT_IN_INDEX:
+     case BUILT_IN_RINDEX:
+     case BUILT_IN_STRCHR:
+     case BUILT_IN_STRRCHR:
+       if (validate_arglist (exp, POINTER_TYPE, INTEGER_TYPE, VOID_TYPE))
+ 	check_nul_terminated_array (exp, CALL_EXPR_ARG (exp, 0));
+       break;
+ 
+     case BUILT_IN_FPUTS:
+     case BUILT_IN_FPUTS_UNLOCKED:
+       if (validate_arglist (exp, POINTER_TYPE, POINTER_TYPE, VOID_TYPE))
+ 	check_nul_terminated_array (exp, CALL_EXPR_ARG (exp, 0));
+       break;
+ 
+     case BUILT_IN_STRNDUP:
+       if (validate_arglist (exp, POINTER_TYPE, INTEGER_TYPE, VOID_TYPE))
+ 	check_nul_terminated_array (exp,
+ 				    CALL_EXPR_ARG (exp, 0),
+ 				    CALL_EXPR_ARG (exp, 1));
+       break;
+ 
+     case BUILT_IN_STRCASECMP:
+     case BUILT_IN_STRSTR:
+       if (validate_arglist (exp, POINTER_TYPE, POINTER_TYPE, VOID_TYPE))
+ 	{
+ 	  check_nul_terminated_array (exp, CALL_EXPR_ARG (exp, 0));
+ 	  check_nul_terminated_array (exp, CALL_EXPR_ARG (exp, 1));
+ 	}
+       break;
+ 
      case BUILT_IN_STRCPY:
        target = expand_builtin_strcpy (exp, target);
        if (target)
*************** fold_builtin_interclass_mathfn (location
*** 8982,8988 ****
  	    mode = DFmode;
  	    arg = fold_build1_loc (loc, NOP_EXPR, type, arg);
  	  }
! 	get_max_float (REAL_MODE_FORMAT (mode), buf, sizeof (buf));
  	real_from_string (&r, buf);
  	result = build_call_expr (isgr_fn, 2,
  				  fold_build1_loc (loc, ABS_EXPR, type, arg),
--- 9521,9527 ----
  	    mode = DFmode;
  	    arg = fold_build1_loc (loc, NOP_EXPR, type, arg);
  	  }
! 	get_max_float (REAL_MODE_FORMAT (mode), buf, sizeof (buf), false);
  	real_from_string (&r, buf);
  	result = build_call_expr (isgr_fn, 2,
  				  fold_build1_loc (loc, ABS_EXPR, type, arg),
*************** fold_builtin_interclass_mathfn (location
*** 9006,9012 ****
  	    mode = DFmode;
  	    arg = fold_build1_loc (loc, NOP_EXPR, type, arg);
  	  }
! 	get_max_float (REAL_MODE_FORMAT (mode), buf, sizeof (buf));
  	real_from_string (&r, buf);
  	result = build_call_expr (isle_fn, 2,
  				  fold_build1_loc (loc, ABS_EXPR, type, arg),
--- 9545,9551 ----
  	    mode = DFmode;
  	    arg = fold_build1_loc (loc, NOP_EXPR, type, arg);
  	  }
! 	get_max_float (REAL_MODE_FORMAT (mode), buf, sizeof (buf), false);
  	real_from_string (&r, buf);
  	result = build_call_expr (isle_fn, 2,
  				  fold_build1_loc (loc, ABS_EXPR, type, arg),
*************** fold_builtin_interclass_mathfn (location
*** 9045,9051 ****
  	  }
  	arg = fold_build1_loc (loc, ABS_EXPR, type, arg);
  
! 	get_max_float (REAL_MODE_FORMAT (mode), buf, sizeof (buf));
  	real_from_string (&rmax, buf);
  	sprintf (buf, "0x1p%d", REAL_MODE_FORMAT (orig_mode)->emin - 1);
  	real_from_string (&rmin, buf);
--- 9584,9590 ----
  	  }
  	arg = fold_build1_loc (loc, ABS_EXPR, type, arg);
  
! 	get_max_float (REAL_MODE_FORMAT (mode), buf, sizeof (buf), false);
  	real_from_string (&rmax, buf);
  	sprintf (buf, "0x1p%d", REAL_MODE_FORMAT (orig_mode)->emin - 1);
  	real_from_string (&rmin, buf);
*************** fold_builtin_1 (location_t loc, tree fnd
*** 9614,9624 ****
  
  }
  
! /* Fold a call to built-in function FNDECL with 2 arguments, ARG0 and ARG1.
!    This function returns NULL_TREE if no simplification was possible.  */
  
  static tree
! fold_builtin_2 (location_t loc, tree fndecl, tree arg0, tree arg1)
  {
    tree type = TREE_TYPE (TREE_TYPE (fndecl));
    enum built_in_function fcode = DECL_FUNCTION_CODE (fndecl);
--- 10153,10164 ----
  
  }
  
! /* Folds a call EXPR (which may be null) to built-in function FNDECL
!    with 2 arguments, ARG0 and ARG1.  This function returns NULL_TREE
!    if no simplification was possible.  */
  
  static tree
! fold_builtin_2 (location_t loc, tree expr, tree fndecl, tree arg0, tree arg1)
  {
    tree type = TREE_TYPE (TREE_TYPE (fndecl));
    enum built_in_function fcode = DECL_FUNCTION_CODE (fndecl);
*************** fold_builtin_2 (location_t loc, tree fnd
*** 9646,9658 ****
        return fold_builtin_modf (loc, arg0, arg1, type);
  
      case BUILT_IN_STRSPN:
!       return fold_builtin_strspn (loc, arg0, arg1);
  
      case BUILT_IN_STRCSPN:
!       return fold_builtin_strcspn (loc, arg0, arg1);
  
      case BUILT_IN_STRPBRK:
!       return fold_builtin_strpbrk (loc, arg0, arg1, type);
  
      case BUILT_IN_EXPECT:
        return fold_builtin_expect (loc, arg0, arg1, NULL_TREE, NULL_TREE);
--- 10186,10198 ----
        return fold_builtin_modf (loc, arg0, arg1, type);
  
      case BUILT_IN_STRSPN:
!       return fold_builtin_strspn (loc, expr, arg0, arg1);
  
      case BUILT_IN_STRCSPN:
!       return fold_builtin_strcspn (loc, expr, arg0, arg1);
  
      case BUILT_IN_STRPBRK:
!       return fold_builtin_strpbrk (loc, expr, arg0, arg1, type);
  
      case BUILT_IN_EXPECT:
        return fold_builtin_expect (loc, arg0, arg1, NULL_TREE, NULL_TREE);
*************** fold_builtin_3 (location_t loc, tree fnd
*** 9770,9782 ****
    return NULL_TREE;
  }
  
! /* Fold a call to built-in function FNDECL.  ARGS is an array of NARGS
!    arguments.  IGNORE is true if the result of the
!    function call is ignored.  This function returns NULL_TREE if no
!    simplification was possible.  */
  
! tree
! fold_builtin_n (location_t loc, tree fndecl, tree *args, int nargs, bool)
  {
    tree ret = NULL_TREE;
  
--- 10310,10323 ----
    return NULL_TREE;
  }
  
! /* Folds a call EXPR (which may be null) to built-in function FNDECL.
!    ARGS is an array of NARGS arguments.  IGNORE is true if the result
!    of the function call is ignored.  This function returns NULL_TREE
!    if no simplification was possible.  */
  
! static tree
! fold_builtin_n (location_t loc, tree expr, tree fndecl, tree *args,
! 		int nargs, bool)
  {
    tree ret = NULL_TREE;
  
*************** fold_builtin_n (location_t loc, tree fnd
*** 9789,9795 ****
        ret = fold_builtin_1 (loc, fndecl, args[0]);
        break;
      case 2:
!       ret = fold_builtin_2 (loc, fndecl, args[0], args[1]);
        break;
      case 3:
        ret = fold_builtin_3 (loc, fndecl, args[0], args[1], args[2]);
--- 10330,10336 ----
        ret = fold_builtin_1 (loc, fndecl, args[0]);
        break;
      case 2:
!       ret = fold_builtin_2 (loc, expr, fndecl, args[0], args[1]);
        break;
      case 3:
        ret = fold_builtin_3 (loc, fndecl, args[0], args[1], args[2]);
*************** fold_call_expr (location_t loc, tree exp
*** 9887,9893 ****
        else
  	{
  	  tree *args = CALL_EXPR_ARGP (exp);
! 	  ret = fold_builtin_n (loc, fndecl, args, nargs, ignore);
  	  if (ret)
  	    return ret;
  	}
--- 10428,10434 ----
        else
  	{
  	  tree *args = CALL_EXPR_ARGP (exp);
! 	  ret = fold_builtin_n (loc, exp, fndecl, args, nargs, ignore);
  	  if (ret)
  	    return ret;
  	}
*************** fold_builtin_call_array (location_t loc,
*** 9925,9931 ****
        if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_MD)
  	return targetm.fold_builtin (fndecl, n, argarray, false);
        else
! 	return fold_builtin_n (loc, fndecl, argarray, n, false);
      }
  
    return NULL_TREE;
--- 10466,10472 ----
        if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_MD)
  	return targetm.fold_builtin (fndecl, n, argarray, false);
        else
! 	return fold_builtin_n (loc, NULL_TREE, fndecl, argarray, n, false);
      }
  
    return NULL_TREE;
*************** readonly_data_expr (tree exp)
*** 10077,10127 ****
     form of the builtin function call.  */
  
  static tree
! fold_builtin_strpbrk (location_t loc, tree s1, tree s2, tree type)
  {
    if (!validate_arg (s1, POINTER_TYPE)
        || !validate_arg (s2, POINTER_TYPE))
      return NULL_TREE;
-   else
-     {
-       tree fn;
-       const char *p1, *p2;
  
!       p2 = c_getstr (s2);
!       if (p2 == NULL)
! 	return NULL_TREE;
  
!       p1 = c_getstr (s1);
!       if (p1 != NULL)
! 	{
! 	  const char *r = strpbrk (p1, p2);
! 	  tree tem;
  
! 	  if (r == NULL)
! 	    return build_int_cst (TREE_TYPE (s1), 0);
  
! 	  /* Return an offset into the constant string argument.  */
! 	  tem = fold_build_pointer_plus_hwi_loc (loc, s1, r - p1);
! 	  return fold_convert_loc (loc, type, tem);
! 	}
  
!       if (p2[0] == '\0')
! 	/* strpbrk(x, "") == NULL.
! 	   Evaluate and ignore s1 in case it had side-effects.  */
! 	return omit_one_operand_loc (loc, type, integer_zero_node, s1);
  
!       if (p2[1] != '\0')
! 	return NULL_TREE;  /* Really call strpbrk.  */
  
!       fn = builtin_decl_implicit (BUILT_IN_STRCHR);
!       if (!fn)
! 	return NULL_TREE;
  
!       /* New argument list transforming strpbrk(s1, s2) to
! 	 strchr(s1, s2[0]).  */
!       return build_call_expr_loc (loc, fn, 2, s1,
! 				  build_int_cst (integer_type_node, p2[0]));
!     }
  }
  
  /* Simplify a call to the strspn builtin.  S1 and S2 are the arguments
--- 10618,10670 ----
     form of the builtin function call.  */
  
  static tree
! fold_builtin_strpbrk (location_t loc, tree expr, tree s1, tree s2, tree type)
  {
    if (!validate_arg (s1, POINTER_TYPE)
        || !validate_arg (s2, POINTER_TYPE))
      return NULL_TREE;
  
!   if (!check_nul_terminated_array (expr, s1)
!       || !check_nul_terminated_array (expr, s2))
!     return NULL_TREE;
  
!   tree fn;
!   const char *p1, *p2;
  
!   p2 = c_getstr (s2);
!   if (p2 == NULL)
!     return NULL_TREE;
  
!   p1 = c_getstr (s1);
!   if (p1 != NULL)
!     {
!       const char *r = strpbrk (p1, p2);
!       tree tem;
  
!       if (r == NULL)
! 	return build_int_cst (TREE_TYPE (s1), 0);
  
!       /* Return an offset into the constant string argument.  */
!       tem = fold_build_pointer_plus_hwi_loc (loc, s1, r - p1);
!       return fold_convert_loc (loc, type, tem);
!     }
  
!   if (p2[0] == '\0')
!     /* strpbrk(x, "") == NULL.
!        Evaluate and ignore s1 in case it had side-effects.  */
!     return omit_one_operand_loc (loc, type, integer_zero_node, s1);
  
!   if (p2[1] != '\0')
!     return NULL_TREE;  /* Really call strpbrk.  */
! 
!   fn = builtin_decl_implicit (BUILT_IN_STRCHR);
!   if (!fn)
!     return NULL_TREE;
! 
!   /* New argument list transforming strpbrk(s1, s2) to
!      strchr(s1, s2[0]).  */
!   return build_call_expr_loc (loc, fn, 2, s1,
! 			      build_int_cst (integer_type_node, p2[0]));
  }
  
  /* Simplify a call to the strspn builtin.  S1 and S2 are the arguments
*************** fold_builtin_strpbrk (location_t loc, tr
*** 10143,10165 ****
     form of the builtin function call.  */
  
  static tree
! fold_builtin_strspn (location_t loc, tree s1, tree s2)
  {
    if (!validate_arg (s1, POINTER_TYPE)
        || !validate_arg (s2, POINTER_TYPE))
      return NULL_TREE;
-   else
-     {
-       const char *p1 = c_getstr (s1), *p2 = c_getstr (s2);
  
!       /* If either argument is "", return NULL_TREE.  */
!       if ((p1 && *p1 == '\0') || (p2 && *p2 == '\0'))
! 	/* Evaluate and ignore both arguments in case either one has
! 	   side-effects.  */
! 	return omit_two_operands_loc (loc, size_type_node, size_zero_node,
  				  s1, s2);
!       return NULL_TREE;
!     }
  }
  
  /* Simplify a call to the strcspn builtin.  S1 and S2 are the arguments
--- 10686,10710 ----
     form of the builtin function call.  */
  
  static tree
! fold_builtin_strspn (location_t loc, tree expr, tree s1, tree s2)
  {
    if (!validate_arg (s1, POINTER_TYPE)
        || !validate_arg (s2, POINTER_TYPE))
      return NULL_TREE;
  
!   if (!check_nul_terminated_array (expr, s1)
!       || !check_nul_terminated_array (expr, s2))
!     return NULL_TREE;
! 
!   const char *p1 = c_getstr (s1), *p2 = c_getstr (s2);
! 
!   /* If either argument is "", return NULL_TREE.  */
!   if ((p1 && *p1 == '\0') || (p2 && *p2 == '\0'))
!     /* Evaluate and ignore both arguments in case either one has
!        side-effects.  */
!     return omit_two_operands_loc (loc, size_type_node, size_zero_node,
  				  s1, s2);
!   return NULL_TREE;
  }
  
  /* Simplify a call to the strcspn builtin.  S1 and S2 are the arguments
*************** fold_builtin_strspn (location_t loc, tre
*** 10181,10218 ****
     form of the builtin function call.  */
  
  static tree
! fold_builtin_strcspn (location_t loc, tree s1, tree s2)
  {
    if (!validate_arg (s1, POINTER_TYPE)
        || !validate_arg (s2, POINTER_TYPE))
      return NULL_TREE;
!   else
      {
!       /* If the first argument is "", return NULL_TREE.  */
!       const char *p1 = c_getstr (s1);
!       if (p1 && *p1 == '\0')
! 	{
! 	  /* Evaluate and ignore argument s2 in case it has
! 	     side-effects.  */
! 	  return omit_one_operand_loc (loc, size_type_node,
  				   size_zero_node, s2);
! 	}
  
!       /* If the second argument is "", return __builtin_strlen(s1).  */
!       const char *p2 = c_getstr (s2);
!       if (p2 && *p2 == '\0')
! 	{
! 	  tree fn = builtin_decl_implicit (BUILT_IN_STRLEN);
  
! 	  /* If the replacement _DECL isn't initialized, don't do the
! 	     transformation.  */
! 	  if (!fn)
! 	    return NULL_TREE;
  
! 	  return build_call_expr_loc (loc, fn, 1, s1);
! 	}
!       return NULL_TREE;
      }
  }
  
  /* Fold the next_arg or va_start call EXP. Returns true if there was an error
--- 10726,10765 ----
     form of the builtin function call.  */
  
  static tree
! fold_builtin_strcspn (location_t loc, tree expr, tree s1, tree s2)
  {
    if (!validate_arg (s1, POINTER_TYPE)
        || !validate_arg (s2, POINTER_TYPE))
      return NULL_TREE;
! 
!   if (!check_nul_terminated_array (expr, s1)
!       || !check_nul_terminated_array (expr, s2))
!     return NULL_TREE;
! 
!   /* If the first argument is "", return NULL_TREE.  */
!   const char *p1 = c_getstr (s1);
!   if (p1 && *p1 == '\0')
      {
!       /* Evaluate and ignore argument s2 in case it has
! 	 side-effects.  */
!       return omit_one_operand_loc (loc, size_type_node,
  				   size_zero_node, s2);
!     }
  
!   /* If the second argument is "", return __builtin_strlen(s1).  */
!   const char *p2 = c_getstr (s2);
!   if (p2 && *p2 == '\0')
!     {
!       tree fn = builtin_decl_implicit (BUILT_IN_STRLEN);
  
!       /* If the replacement _DECL isn't initialized, don't do the
! 	 transformation.  */
!       if (!fn)
! 	return NULL_TREE;
  
!       return build_call_expr_loc (loc, fn, 1, s1);
      }
+   return NULL_TREE;
  }
  
  /* Fold the next_arg or va_start call EXP. Returns true if there was an error
*************** fold_builtin_next_arg (tree exp, bool va
*** 10235,10241 ****
  
    if (!stdarg_p (fntype))
      {
!       error ("%<va_start%> used in function with fixed args");
        return true;
      }
  
--- 10782,10788 ----
  
    if (!stdarg_p (fntype))
      {
!       error ("%<va_start%> used in function with fixed arguments");
        return true;
      }
  
*************** do_mpfr_ckconv (mpfr_srcptr m, tree type
*** 10765,10771 ****
      {
        REAL_VALUE_TYPE rr;
  
!       real_from_mpfr (&rr, m, type, GMP_RNDN);
        /* Proceed iff GCC's REAL_VALUE_TYPE can hold the MPFR value,
  	 check for overflow/underflow.  If the REAL_VALUE_TYPE is zero
  	 but the mpft_t is not, then we underflowed in the
--- 11312,11318 ----
      {
        REAL_VALUE_TYPE rr;
  
!       real_from_mpfr (&rr, m, type, MPFR_RNDN);
        /* Proceed iff GCC's REAL_VALUE_TYPE can hold the MPFR value,
  	 check for overflow/underflow.  If the REAL_VALUE_TYPE is zero
  	 but the mpft_t is not, then we underflowed in the
*************** do_mpc_ckconv (mpc_srcptr m, tree type,
*** 10805,10812 ****
      {
        REAL_VALUE_TYPE re, im;
  
!       real_from_mpfr (&re, mpc_realref (m), TREE_TYPE (type), GMP_RNDN);
!       real_from_mpfr (&im, mpc_imagref (m), TREE_TYPE (type), GMP_RNDN);
        /* Proceed iff GCC's REAL_VALUE_TYPE can hold the MPFR values,
  	 check for overflow/underflow.  If the REAL_VALUE_TYPE is zero
  	 but the mpft_t is not, then we underflowed in the
--- 11352,11359 ----
      {
        REAL_VALUE_TYPE re, im;
  
!       real_from_mpfr (&re, mpc_realref (m), TREE_TYPE (type), MPFR_RNDN);
!       real_from_mpfr (&im, mpc_imagref (m), TREE_TYPE (type), MPFR_RNDN);
        /* Proceed iff GCC's REAL_VALUE_TYPE can hold the MPFR values,
  	 check for overflow/underflow.  If the REAL_VALUE_TYPE is zero
  	 but the mpft_t is not, then we underflowed in the
*************** do_mpfr_remquo (tree arg0, tree arg1, tr
*** 10858,10871 ****
          {
  	  const struct real_format *fmt = REAL_MODE_FORMAT (TYPE_MODE (type));
  	  const int prec = fmt->p;
! 	  const mp_rnd_t rnd = fmt->round_towards_zero? GMP_RNDZ : GMP_RNDN;
  	  tree result_rem;
  	  long integer_quo;
  	  mpfr_t m0, m1;
  
  	  mpfr_inits2 (prec, m0, m1, NULL);
! 	  mpfr_from_real (m0, ra0, GMP_RNDN);
! 	  mpfr_from_real (m1, ra1, GMP_RNDN);
  	  mpfr_clear_flags ();
  	  mpfr_remquo (m0, &integer_quo, m0, m1, rnd);
  	  /* Remquo is independent of the rounding mode, so pass
--- 11405,11418 ----
          {
  	  const struct real_format *fmt = REAL_MODE_FORMAT (TYPE_MODE (type));
  	  const int prec = fmt->p;
! 	  const mpfr_rnd_t rnd = fmt->round_towards_zero? MPFR_RNDZ : MPFR_RNDN;
  	  tree result_rem;
  	  long integer_quo;
  	  mpfr_t m0, m1;
  
  	  mpfr_inits2 (prec, m0, m1, NULL);
! 	  mpfr_from_real (m0, ra0, MPFR_RNDN);
! 	  mpfr_from_real (m1, ra1, MPFR_RNDN);
  	  mpfr_clear_flags ();
  	  mpfr_remquo (m0, &integer_quo, m0, m1, rnd);
  	  /* Remquo is independent of the rounding mode, so pass
*************** do_mpfr_lgamma_r (tree arg, tree arg_sg,
*** 10938,10950 ****
          {
  	  const struct real_format *fmt = REAL_MODE_FORMAT (TYPE_MODE (type));
  	  const int prec = fmt->p;
! 	  const mp_rnd_t rnd = fmt->round_towards_zero? GMP_RNDZ : GMP_RNDN;
  	  int inexact, sg;
  	  mpfr_t m;
  	  tree result_lg;
  
  	  mpfr_init2 (m, prec);
! 	  mpfr_from_real (m, ra, GMP_RNDN);
  	  mpfr_clear_flags ();
  	  inexact = mpfr_lgamma (m, &sg, m, rnd);
  	  result_lg = do_mpfr_ckconv (m, type, inexact);
--- 11485,11497 ----
          {
  	  const struct real_format *fmt = REAL_MODE_FORMAT (TYPE_MODE (type));
  	  const int prec = fmt->p;
! 	  const mpfr_rnd_t rnd = fmt->round_towards_zero? MPFR_RNDZ : MPFR_RNDN;
  	  int inexact, sg;
  	  mpfr_t m;
  	  tree result_lg;
  
  	  mpfr_init2 (m, prec);
! 	  mpfr_from_real (m, ra, MPFR_RNDN);
  	  mpfr_clear_flags ();
  	  inexact = mpfr_lgamma (m, &sg, m, rnd);
  	  result_lg = do_mpfr_ckconv (m, type, inexact);
*************** do_mpc_arg2 (tree arg0, tree arg1, tree
*** 11007,11013 ****
  	  const struct real_format *const fmt =
  	    REAL_MODE_FORMAT (TYPE_MODE (TREE_TYPE (type)));
  	  const int prec = fmt->p;
! 	  const mp_rnd_t rnd = fmt->round_towards_zero ? GMP_RNDZ : GMP_RNDN;
  	  const mpc_rnd_t crnd = fmt->round_towards_zero ? MPC_RNDZZ : MPC_RNDNN;
  	  int inexact;
  	  mpc_t m0, m1;
--- 11554,11561 ----
  	  const struct real_format *const fmt =
  	    REAL_MODE_FORMAT (TYPE_MODE (TREE_TYPE (type)));
  	  const int prec = fmt->p;
! 	  const mpfr_rnd_t rnd = fmt->round_towards_zero
! 				 ? MPFR_RNDZ : MPFR_RNDN;
  	  const mpc_rnd_t crnd = fmt->round_towards_zero ? MPC_RNDZZ : MPC_RNDNN;
  	  int inexact;
  	  mpc_t m0, m1;
*************** fold_call_stmt (gcall *stmt, bool ignore
*** 11055,11061 ****
          }
        else
  	{
! 	  ret = fold_builtin_n (loc, fndecl, args, nargs, ignore);
  	  if (ret)
  	    {
  	      /* Propagate location information from original call to
--- 11603,11609 ----
          }
        else
  	{
! 	  ret = fold_builtin_n (loc, NULL_TREE, fndecl, args, nargs, ignore);
  	  if (ret)
  	    {
  	      /* Propagate location information from original call to
diff -Nrcpad gcc-9.3.0/gcc/builtins.def gcc-10.1.0/gcc/builtins.def
*** gcc-9.3.0/gcc/builtins.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/builtins.def	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* This file contains the definitions and documentation for the
     builtins used in the GNU compiler.
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,6 ----
  /* This file contains the definitions and documentation for the
     builtins used in the GNU compiler.
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 154,159 ****
--- 154,166 ----
    DEF_BUILTIN (ENUM, "__builtin_" NAME, BUILT_IN_NORMAL, TYPE, TYPE,	\
  	       true, true, !flag_isoc11, ATTRS, targetm.libc_has_function (function_c11_misc), true)
  
+ /* Like DEF_LIB_BUILTIN, except that the function is only a part of
+    the standard in C2x or above.  */
+ #undef DEF_C2X_BUILTIN
+ #define DEF_C2X_BUILTIN(ENUM, NAME, TYPE, ATTRS)	\
+   DEF_BUILTIN (ENUM, "__builtin_" NAME, BUILT_IN_NORMAL, TYPE, TYPE,	\
+ 	       true, true, !flag_isoc2x, ATTRS, targetm.libc_has_function (function_c2x_misc), true)
+ 
  /* Like DEF_C99_BUILTIN, but for complex math functions.  */
  #undef DEF_C99_COMPL_BUILTIN
  #define DEF_C99_COMPL_BUILTIN(ENUM, NAME, TYPE, ATTRS)	\
*************** along with GCC; see the file COPYING3.
*** 182,187 ****
--- 189,200 ----
    DEF_BUILTIN (ENUM, NAME, BUILT_IN_NORMAL, BT_LAST, BT_LAST, false, false, \
  	       false, ATTR_LAST, false, false)
  
+ /* Builtins used in implementing coroutine support. */
+ #undef DEF_COROUTINE_BUILTIN
+ #define DEF_COROUTINE_BUILTIN(ENUM, NAME, TYPE, ATTRS) \
+   DEF_BUILTIN (ENUM, "__builtin_coro_" NAME, BUILT_IN_NORMAL, TYPE, TYPE, \
+ 	       true, true, true, ATTRS, true, flag_coroutines)
+ 
  /* Builtin used by the implementation of OpenACC and OpenMP.  Few of these are
     actually implemented in the compiler; most are in libgomp.  */
  /* These builtins also need to be enabled in offloading compilers invoked from
*************** DEF_C99_BUILTIN        (BUILT_IN_ACOSH,
*** 288,294 ****
  DEF_C99_BUILTIN        (BUILT_IN_ACOSHF, "acoshf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_ACOSHL, "acoshl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_C90RES_BUILTIN (BUILT_IN_ACOSL, "acosl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
! DEF_C11_BUILTIN        (BUILT_IN_ALIGNED_ALLOC, "aligned_alloc", BT_FN_PTR_SIZE_SIZE, ATTR_ALLOC_SIZE_2_NOTHROW_LIST)
  DEF_LIB_BUILTIN        (BUILT_IN_ASIN, "asin", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_C90RES_BUILTIN (BUILT_IN_ASINF, "asinf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_ASINH, "asinh", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING)
--- 301,307 ----
  DEF_C99_BUILTIN        (BUILT_IN_ACOSHF, "acoshf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_ACOSHL, "acoshl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_C90RES_BUILTIN (BUILT_IN_ACOSL, "acosl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
! DEF_C11_BUILTIN        (BUILT_IN_ALIGNED_ALLOC, "aligned_alloc", BT_FN_PTR_SIZE_SIZE, ATTR_ALLOC_WARN_UNUSED_RESULT_SIZE_2_NOTHROW_LIST)
  DEF_LIB_BUILTIN        (BUILT_IN_ASIN, "asin", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_C90RES_BUILTIN (BUILT_IN_ASINF, "asinf", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_ASINH, "asinh", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING)
*************** DEF_C99_BUILTIN        (BUILT_IN_ERFCL,
*** 335,343 ****
  DEF_C99_BUILTIN        (BUILT_IN_ERFF, "erff", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING)
  DEF_C99_BUILTIN        (BUILT_IN_ERFL, "erfl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
  DEF_LIB_BUILTIN        (BUILT_IN_EXP, "exp", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
! DEF_EXT_LIB_BUILTIN    (BUILT_IN_EXP10, "exp10", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
! DEF_EXT_LIB_BUILTIN    (BUILT_IN_EXP10F, "exp10f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
! DEF_EXT_LIB_BUILTIN    (BUILT_IN_EXP10L, "exp10l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_EXP2, "exp2", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_EXP2F, "exp2f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_EXP2L, "exp2l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
--- 348,356 ----
  DEF_C99_BUILTIN        (BUILT_IN_ERFF, "erff", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING)
  DEF_C99_BUILTIN        (BUILT_IN_ERFL, "erfl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
  DEF_LIB_BUILTIN        (BUILT_IN_EXP, "exp", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
! DEF_C2X_BUILTIN        (BUILT_IN_EXP10, "exp10", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
! DEF_C2X_BUILTIN        (BUILT_IN_EXP10F, "exp10f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
! DEF_C2X_BUILTIN        (BUILT_IN_EXP10L, "exp10l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_EXP2, "exp2", BT_FN_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_EXP2F, "exp2f", BT_FN_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_EXP2L, "exp2l", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
*************** DEF_C99_C90RES_BUILTIN (BUILT_IN_FABSL,
*** 352,360 ****
  #define FABS_TYPE(F) BT_FN_##F##_##F
  DEF_EXT_LIB_FLOATN_NX_BUILTINS (BUILT_IN_FABS, "fabs", FABS_TYPE, ATTR_CONST_NOTHROW_LEAF_LIST)
  #undef FABS_TYPE
! DEF_GCC_BUILTIN        (BUILT_IN_FABSD32, "fabsd32", BT_FN_DFLOAT32_DFLOAT32, ATTR_CONST_NOTHROW_LEAF_LIST)
! DEF_GCC_BUILTIN        (BUILT_IN_FABSD64, "fabsd64", BT_FN_DFLOAT64_DFLOAT64, ATTR_CONST_NOTHROW_LEAF_LIST)
! DEF_GCC_BUILTIN        (BUILT_IN_FABSD128, "fabsd128", BT_FN_DFLOAT128_DFLOAT128, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_C99_BUILTIN        (BUILT_IN_FDIM, "fdim", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_FDIMF, "fdimf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_FDIML, "fdiml", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
--- 365,373 ----
  #define FABS_TYPE(F) BT_FN_##F##_##F
  DEF_EXT_LIB_FLOATN_NX_BUILTINS (BUILT_IN_FABS, "fabs", FABS_TYPE, ATTR_CONST_NOTHROW_LEAF_LIST)
  #undef FABS_TYPE
! DEF_C2X_BUILTIN        (BUILT_IN_FABSD32, "fabsd32", BT_FN_DFLOAT32_DFLOAT32, ATTR_CONST_NOTHROW_LEAF_LIST)
! DEF_C2X_BUILTIN        (BUILT_IN_FABSD64, "fabsd64", BT_FN_DFLOAT64_DFLOAT64, ATTR_CONST_NOTHROW_LEAF_LIST)
! DEF_C2X_BUILTIN        (BUILT_IN_FABSD128, "fabsd128", BT_FN_DFLOAT128_DFLOAT128, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_C99_BUILTIN        (BUILT_IN_FDIM, "fdim", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_FDIMF, "fdimf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_C99_BUILTIN        (BUILT_IN_FDIML, "fdiml", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
*************** DEF_C99_BUILTIN        (BUILT_IN_NANF, "
*** 501,509 ****
  DEF_C99_BUILTIN        (BUILT_IN_NANL, "nanl", BT_FN_LONGDOUBLE_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
  #define NAN_TYPE(F) BT_FN_##F##_CONST_STRING
  DEF_EXT_LIB_FLOATN_NX_BUILTINS (BUILT_IN_NAN, "nan", NAN_TYPE, ATTR_CONST_NOTHROW_NONNULL)
! DEF_GCC_BUILTIN        (BUILT_IN_NAND32, "nand32", BT_FN_DFLOAT32_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
! DEF_GCC_BUILTIN        (BUILT_IN_NAND64, "nand64", BT_FN_DFLOAT64_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
! DEF_GCC_BUILTIN        (BUILT_IN_NAND128, "nand128", BT_FN_DFLOAT128_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
  DEF_GCC_BUILTIN        (BUILT_IN_NANS, "nans", BT_FN_DOUBLE_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
  DEF_GCC_BUILTIN        (BUILT_IN_NANSF, "nansf", BT_FN_FLOAT_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
  DEF_GCC_BUILTIN        (BUILT_IN_NANSL, "nansl", BT_FN_LONGDOUBLE_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
--- 514,522 ----
  DEF_C99_BUILTIN        (BUILT_IN_NANL, "nanl", BT_FN_LONGDOUBLE_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
  #define NAN_TYPE(F) BT_FN_##F##_CONST_STRING
  DEF_EXT_LIB_FLOATN_NX_BUILTINS (BUILT_IN_NAN, "nan", NAN_TYPE, ATTR_CONST_NOTHROW_NONNULL)
! DEF_C2X_BUILTIN        (BUILT_IN_NAND32, "nand32", BT_FN_DFLOAT32_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
! DEF_C2X_BUILTIN        (BUILT_IN_NAND64, "nand64", BT_FN_DFLOAT64_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
! DEF_C2X_BUILTIN        (BUILT_IN_NAND128, "nand128", BT_FN_DFLOAT128_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
  DEF_GCC_BUILTIN        (BUILT_IN_NANS, "nans", BT_FN_DOUBLE_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
  DEF_GCC_BUILTIN        (BUILT_IN_NANSF, "nansf", BT_FN_FLOAT_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
  DEF_GCC_BUILTIN        (BUILT_IN_NANSL, "nansl", BT_FN_LONGDOUBLE_CONST_STRING, ATTR_CONST_NOTHROW_NONNULL)
*************** DEF_C99_BUILTIN        (BUILT_IN_RINTL,
*** 542,553 ****
--- 555,572 ----
  #define RINT_TYPE(F) BT_FN_##F##_##F
  DEF_EXT_LIB_FLOATN_NX_BUILTINS (BUILT_IN_RINT, "rint", RINT_TYPE, ATTR_CONST_NOTHROW_LEAF_LIST)
  #undef RINT_TYPE
+ DEF_C2X_BUILTIN        (BUILT_IN_ROUNDEVEN, "roundeven", BT_FN_DOUBLE_DOUBLE, ATTR_CONST_NOTHROW_LEAF_LIST)
+ DEF_C2X_BUILTIN        (BUILT_IN_ROUNDEVENF, "roundevenf", BT_FN_FLOAT_FLOAT, ATTR_CONST_NOTHROW_LEAF_LIST)
+ DEF_C2X_BUILTIN        (BUILT_IN_ROUNDEVENL, "roundevenl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_C99_BUILTIN        (BUILT_IN_ROUND, "round", BT_FN_DOUBLE_DOUBLE, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_C99_BUILTIN        (BUILT_IN_ROUNDF, "roundf", BT_FN_FLOAT_FLOAT, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_C99_BUILTIN        (BUILT_IN_ROUNDL, "roundl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_CONST_NOTHROW_LEAF_LIST)
  #define ROUND_TYPE(F) BT_FN_##F##_##F
  DEF_EXT_LIB_FLOATN_NX_BUILTINS (BUILT_IN_ROUND, "round", ROUND_TYPE, ATTR_CONST_NOTHROW_LEAF_LIST)
  #undef ROUND_TYPE
+ #define ROUNDEVEN_TYPE(F) BT_FN_##F##_##F
+ DEF_EXT_LIB_FLOATN_NX_BUILTINS (BUILT_IN_ROUNDEVEN, "roundeven", ROUNDEVEN_TYPE, ATTR_CONST_NOTHROW_LEAF_LIST)
+ #undef ROUNDEVEN_TYPE
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_SCALB, "scalb", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_SCALBF, "scalbf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_SCALBL, "scalbl", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)
*************** DEF_C99_COMPL_BUILTIN        (BUILT_IN_C
*** 681,691 ****
  DEF_C99_COMPL_BUILTIN        (BUILT_IN_CTANL, "ctanl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
  
  /* Category: string/memory builtins.  */
! /* bcmp, bcopy and bzero have traditionally accepted NULL pointers
!    when the length parameter is zero, so don't apply attribute "nonnull".  */
! DEF_EXT_LIB_BUILTIN    (BUILT_IN_BCMP, "bcmp", BT_FN_INT_CONST_PTR_CONST_PTR_SIZE, ATTR_PURE_NOTHROW_LEAF_LIST)
! DEF_EXT_LIB_BUILTIN    (BUILT_IN_BCOPY, "bcopy", BT_FN_VOID_CONST_PTR_PTR_SIZE, ATTR_NOTHROW_LEAF_LIST)
! DEF_EXT_LIB_BUILTIN    (BUILT_IN_BZERO, "bzero", BT_FN_VOID_PTR_SIZE, ATTR_NOTHROW_LEAF_LIST)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_INDEX, "index", BT_FN_STRING_CONST_STRING_INT, ATTR_PURE_NOTHROW_NONNULL_LEAF)
  DEF_LIB_BUILTIN        (BUILT_IN_MEMCHR, "memchr", BT_FN_PTR_CONST_PTR_INT_SIZE, ATTR_PURE_NOTHROW_NONNULL_LEAF)
  DEF_LIB_BUILTIN        (BUILT_IN_MEMCMP, "memcmp", BT_FN_INT_CONST_PTR_CONST_PTR_SIZE, ATTR_PURE_NOTHROW_NONNULL_LEAF)
--- 700,708 ----
  DEF_C99_COMPL_BUILTIN        (BUILT_IN_CTANL, "ctanl", BT_FN_COMPLEX_LONGDOUBLE_COMPLEX_LONGDOUBLE, ATTR_MATHFN_FPROUNDING)
  
  /* Category: string/memory builtins.  */
! DEF_EXT_LIB_BUILTIN    (BUILT_IN_BCMP, "bcmp", BT_FN_INT_CONST_PTR_CONST_PTR_SIZE, ATTR_PURE_NOTHROW_NONNULL_LEAF)
! DEF_EXT_LIB_BUILTIN    (BUILT_IN_BCOPY, "bcopy", BT_FN_VOID_CONST_PTR_PTR_SIZE, ATTR_NOTHROW_NONNULL_LEAF)
! DEF_EXT_LIB_BUILTIN    (BUILT_IN_BZERO, "bzero", BT_FN_VOID_PTR_SIZE, ATTR_NOTHROW_NONNULL_LEAF)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_INDEX, "index", BT_FN_STRING_CONST_STRING_INT, ATTR_PURE_NOTHROW_NONNULL_LEAF)
  DEF_LIB_BUILTIN        (BUILT_IN_MEMCHR, "memchr", BT_FN_PTR_CONST_PTR_INT_SIZE, ATTR_PURE_NOTHROW_NONNULL_LEAF)
  DEF_LIB_BUILTIN        (BUILT_IN_MEMCMP, "memcmp", BT_FN_INT_CONST_PTR_CONST_PTR_SIZE, ATTR_PURE_NOTHROW_NONNULL_LEAF)
*************** DEF_LIB_BUILTIN        (BUILT_IN_STRCHR,
*** 702,709 ****
  DEF_LIB_BUILTIN        (BUILT_IN_STRCMP, "strcmp", BT_FN_INT_CONST_STRING_CONST_STRING, ATTR_PURE_NOTHROW_NONNULL_LEAF)
  DEF_LIB_BUILTIN        (BUILT_IN_STRCPY, "strcpy", BT_FN_STRING_STRING_CONST_STRING, ATTR_RET1_NOTHROW_NONNULL_LEAF)
  DEF_LIB_BUILTIN        (BUILT_IN_STRCSPN, "strcspn", BT_FN_SIZE_CONST_STRING_CONST_STRING, ATTR_PURE_NOTHROW_NONNULL_LEAF)
! DEF_EXT_LIB_BUILTIN    (BUILT_IN_STRDUP, "strdup", BT_FN_STRING_CONST_STRING, ATTR_MALLOC_NOTHROW_NONNULL_LEAF)
! DEF_EXT_LIB_BUILTIN    (BUILT_IN_STRNDUP, "strndup", BT_FN_STRING_CONST_STRING_SIZE, ATTR_MALLOC_NOTHROW_NONNULL_LEAF)
  DEF_LIB_BUILTIN        (BUILT_IN_STRLEN, "strlen", BT_FN_SIZE_CONST_STRING, ATTR_PURE_NOTHROW_NONNULL_LEAF)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_STRNCASECMP, "strncasecmp", BT_FN_INT_CONST_STRING_CONST_STRING_SIZE, ATTR_PURE_NOTHROW_NONNULL_LEAF)
  DEF_LIB_BUILTIN        (BUILT_IN_STRNCAT, "strncat", BT_FN_STRING_STRING_CONST_STRING_SIZE, ATTR_RET1_NOTHROW_NONNULL_LEAF)
--- 719,726 ----
  DEF_LIB_BUILTIN        (BUILT_IN_STRCMP, "strcmp", BT_FN_INT_CONST_STRING_CONST_STRING, ATTR_PURE_NOTHROW_NONNULL_LEAF)
  DEF_LIB_BUILTIN        (BUILT_IN_STRCPY, "strcpy", BT_FN_STRING_STRING_CONST_STRING, ATTR_RET1_NOTHROW_NONNULL_LEAF)
  DEF_LIB_BUILTIN        (BUILT_IN_STRCSPN, "strcspn", BT_FN_SIZE_CONST_STRING_CONST_STRING, ATTR_PURE_NOTHROW_NONNULL_LEAF)
! DEF_C2X_BUILTIN        (BUILT_IN_STRDUP, "strdup", BT_FN_STRING_CONST_STRING, ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_NONNULL_LEAF)
! DEF_C2X_BUILTIN        (BUILT_IN_STRNDUP, "strndup", BT_FN_STRING_CONST_STRING_SIZE, ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_NONNULL_LEAF)
  DEF_LIB_BUILTIN        (BUILT_IN_STRLEN, "strlen", BT_FN_SIZE_CONST_STRING, ATTR_PURE_NOTHROW_NONNULL_LEAF)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_STRNCASECMP, "strncasecmp", BT_FN_INT_CONST_STRING_CONST_STRING_SIZE, ATTR_PURE_NOTHROW_NONNULL_LEAF)
  DEF_LIB_BUILTIN        (BUILT_IN_STRNCAT, "strncat", BT_FN_STRING_STRING_CONST_STRING_SIZE, ATTR_RET1_NOTHROW_NONNULL_LEAF)
*************** DEF_GCC_BUILTIN        (BUILT_IN_UMULLL_
*** 811,817 ****
  DEF_LIB_BUILTIN        (BUILT_IN_ABORT, "abort", BT_FN_VOID, ATTR_TMPURE_NORETURN_NOTHROW_LEAF_COLD_LIST)
  DEF_LIB_BUILTIN        (BUILT_IN_ABS, "abs", BT_FN_INT_INT, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_AGGREGATE_INCOMING_ADDRESS, "aggregate_incoming_address", BT_FN_PTR_VAR, ATTR_LEAF_LIST)
! DEF_EXT_LIB_BUILTIN    (BUILT_IN_ALLOCA, "alloca", BT_FN_PTR_SIZE, ATTR_ALLOCA_SIZE_1_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_APPLY, "apply", BT_FN_PTR_PTR_FN_VOID_VAR_PTR_SIZE, ATTR_NULL)
  DEF_GCC_BUILTIN        (BUILT_IN_APPLY_ARGS, "apply_args", BT_FN_PTR_VAR, ATTR_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_BSWAP16, "bswap16", BT_FN_UINT16_UINT16, ATTR_CONST_NOTHROW_LEAF_LIST)
--- 828,834 ----
  DEF_LIB_BUILTIN        (BUILT_IN_ABORT, "abort", BT_FN_VOID, ATTR_TMPURE_NORETURN_NOTHROW_LEAF_COLD_LIST)
  DEF_LIB_BUILTIN        (BUILT_IN_ABS, "abs", BT_FN_INT_INT, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_AGGREGATE_INCOMING_ADDRESS, "aggregate_incoming_address", BT_FN_PTR_VAR, ATTR_LEAF_LIST)
! DEF_EXT_LIB_BUILTIN    (BUILT_IN_ALLOCA, "alloca", BT_FN_PTR_SIZE, ATTR_ALLOCA_WARN_UNUSED_RESULT_SIZE_1_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_APPLY, "apply", BT_FN_PTR_PTR_FN_VOID_VAR_PTR_SIZE, ATTR_NULL)
  DEF_GCC_BUILTIN        (BUILT_IN_APPLY_ARGS, "apply_args", BT_FN_PTR_VAR, ATTR_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_BSWAP16, "bswap16", BT_FN_UINT16_UINT16, ATTR_CONST_NOTHROW_LEAF_LIST)
*************** DEF_GCC_BUILTIN        (BUILT_IN_BSWAP32
*** 819,825 ****
  DEF_GCC_BUILTIN        (BUILT_IN_BSWAP64, "bswap64", BT_FN_UINT64_UINT64, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_CLEAR_CACHE, "__clear_cache", BT_FN_VOID_PTR_PTR, ATTR_NOTHROW_LEAF_LIST)
  /* [trans-mem]: Adjust BUILT_IN_TM_CALLOC if BUILT_IN_CALLOC is changed.  */
! DEF_LIB_BUILTIN        (BUILT_IN_CALLOC, "calloc", BT_FN_PTR_SIZE_SIZE, ATTR_MALLOC_SIZE_1_2_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_CLASSIFY_TYPE, "classify_type", BT_FN_INT_VAR, ATTR_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_CLZ, "clz", BT_FN_INT_UINT, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_CLZIMAX, "clzimax", BT_FN_INT_UINTMAX, ATTR_CONST_NOTHROW_LEAF_LIST)
--- 836,842 ----
  DEF_GCC_BUILTIN        (BUILT_IN_BSWAP64, "bswap64", BT_FN_UINT64_UINT64, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_CLEAR_CACHE, "__clear_cache", BT_FN_VOID_PTR_PTR, ATTR_NOTHROW_LEAF_LIST)
  /* [trans-mem]: Adjust BUILT_IN_TM_CALLOC if BUILT_IN_CALLOC is changed.  */
! DEF_LIB_BUILTIN        (BUILT_IN_CALLOC, "calloc", BT_FN_PTR_SIZE_SIZE, ATTR_MALLOC_WARN_UNUSED_RESULT_SIZE_1_2_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_CLASSIFY_TYPE, "classify_type", BT_FN_INT_VAR, ATTR_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_CLZ, "clz", BT_FN_INT_UINT, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_CLZIMAX, "clzimax", BT_FN_INT_UINTMAX, ATTR_CONST_NOTHROW_LEAF_LIST)
*************** DEF_LIB_BUILTIN        (BUILT_IN_LABS, "
*** 896,902 ****
  DEF_C99_BUILTIN        (BUILT_IN_LLABS, "llabs", BT_FN_LONGLONG_LONGLONG, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_LONGJMP, "longjmp", BT_FN_VOID_PTR_INT, ATTR_NORETURN_NOTHROW_LIST)
  /* [trans-mem]: Adjust BUILT_IN_TM_MALLOC if BUILT_IN_MALLOC is changed.  */
! DEF_LIB_BUILTIN        (BUILT_IN_MALLOC, "malloc", BT_FN_PTR_SIZE, ATTR_MALLOC_SIZE_1_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_NEXT_ARG, "next_arg", BT_FN_PTR_VAR, ATTR_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_PARITY, "parity", BT_FN_INT_UINT, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_PARITYIMAX, "parityimax", BT_FN_INT_UINTMAX, ATTR_CONST_NOTHROW_LEAF_LIST)
--- 913,919 ----
  DEF_C99_BUILTIN        (BUILT_IN_LLABS, "llabs", BT_FN_LONGLONG_LONGLONG, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_LONGJMP, "longjmp", BT_FN_VOID_PTR_INT, ATTR_NORETURN_NOTHROW_LIST)
  /* [trans-mem]: Adjust BUILT_IN_TM_MALLOC if BUILT_IN_MALLOC is changed.  */
! DEF_LIB_BUILTIN        (BUILT_IN_MALLOC, "malloc", BT_FN_PTR_SIZE, ATTR_MALLOC_WARN_UNUSED_RESULT_SIZE_1_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_NEXT_ARG, "next_arg", BT_FN_PTR_VAR, ATTR_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_PARITY, "parity", BT_FN_INT_UINT, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_PARITYIMAX, "parityimax", BT_FN_INT_UINTMAX, ATTR_CONST_NOTHROW_LEAF_LIST)
*************** DEF_GCC_BUILTIN        (BUILT_IN_POPCOUN
*** 908,914 ****
  DEF_GCC_BUILTIN        (BUILT_IN_POPCOUNTLL, "popcountll", BT_FN_INT_ULONGLONG, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_POSIX_MEMALIGN, "posix_memalign", BT_FN_INT_PTRPTR_SIZE_SIZE, ATTR_NOTHROW_NONNULL_LEAF)
  DEF_GCC_BUILTIN        (BUILT_IN_PREFETCH, "prefetch", BT_FN_VOID_CONST_PTR_VAR, ATTR_NOVOPS_LEAF_LIST)
! DEF_LIB_BUILTIN        (BUILT_IN_REALLOC, "realloc", BT_FN_PTR_PTR_SIZE, ATTR_ALLOC_SIZE_2_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_RETURN, "return", BT_FN_VOID_PTR, ATTR_NORETURN_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_RETURN_ADDRESS, "return_address", BT_FN_PTR_UINT, ATTR_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_SAVEREGS, "saveregs", BT_FN_PTR_VAR, ATTR_NULL)
--- 925,931 ----
  DEF_GCC_BUILTIN        (BUILT_IN_POPCOUNTLL, "popcountll", BT_FN_INT_ULONGLONG, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_POSIX_MEMALIGN, "posix_memalign", BT_FN_INT_PTRPTR_SIZE_SIZE, ATTR_NOTHROW_NONNULL_LEAF)
  DEF_GCC_BUILTIN        (BUILT_IN_PREFETCH, "prefetch", BT_FN_VOID_CONST_PTR_VAR, ATTR_NOVOPS_LEAF_LIST)
! DEF_LIB_BUILTIN        (BUILT_IN_REALLOC, "realloc", BT_FN_PTR_PTR_SIZE, ATTR_ALLOC_WARN_UNUSED_RESULT_SIZE_2_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_RETURN, "return", BT_FN_VOID_PTR, ATTR_NORETURN_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_RETURN_ADDRESS, "return_address", BT_FN_PTR_UINT, ATTR_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_SAVEREGS, "saveregs", BT_FN_PTR_VAR, ATTR_NULL)
*************** DEF_BUILTIN_STUB (BUILT_IN_STRCMP_EQ, "_
*** 955,961 ****
  DEF_BUILTIN_STUB (BUILT_IN_STRNCMP_EQ, "__builtin_strncmp_eq")
  
  /* Object size checking builtins.  */
! DEF_GCC_BUILTIN	       (BUILT_IN_OBJECT_SIZE, "object_size", BT_FN_SIZE_CONST_PTR_INT, ATTR_PURE_NOTHROW_LEAF_LIST)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_MEMCPY_CHK, "__memcpy_chk", BT_FN_PTR_PTR_CONST_PTR_SIZE_SIZE, ATTR_RET1_NOTHROW_NONNULL_LEAF)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_MEMMOVE_CHK, "__memmove_chk", BT_FN_PTR_PTR_CONST_PTR_SIZE_SIZE, ATTR_RET1_NOTHROW_NONNULL_LEAF)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_MEMPCPY_CHK, "__mempcpy_chk", BT_FN_PTR_PTR_CONST_PTR_SIZE_SIZE, ATTR_RETNONNULL_NOTHROW_LEAF)
--- 972,978 ----
  DEF_BUILTIN_STUB (BUILT_IN_STRNCMP_EQ, "__builtin_strncmp_eq")
  
  /* Object size checking builtins.  */
! DEF_GCC_BUILTIN	       (BUILT_IN_OBJECT_SIZE, "object_size", BT_FN_SIZE_CONST_PTR_INT, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_MEMCPY_CHK, "__memcpy_chk", BT_FN_PTR_PTR_CONST_PTR_SIZE_SIZE, ATTR_RET1_NOTHROW_NONNULL_LEAF)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_MEMMOVE_CHK, "__memmove_chk", BT_FN_PTR_PTR_CONST_PTR_SIZE_SIZE, ATTR_RET1_NOTHROW_NONNULL_LEAF)
  DEF_EXT_LIB_BUILTIN    (BUILT_IN_MEMPCPY_CHK, "__mempcpy_chk", BT_FN_PTR_PTR_CONST_PTR_SIZE_SIZE, ATTR_RETNONNULL_NOTHROW_LEAF)
*************** DEF_GCC_BUILTIN (BUILT_IN_LINE, "LINE",
*** 1053,1058 ****
--- 1070,1078 ----
  /* Sanitizer builtins. */
  #include "sanitizer.def"
  
+ /* Coroutine builtins.  */
+ #include "coroutine-builtins.def"
+ 
  /* Do not expose the BRIG builtins by default gcc-wide, but only privately in
     the BRIG FE as long as there are no references for them in the middle end
     or any of the upstream backends.  */
diff -Nrcpad gcc-9.3.0/gcc/builtins.h gcc-10.1.0/gcc/builtins.h
*** gcc-9.3.0/gcc/builtins.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/builtins.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Expand builtin functions.
!    Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Expand builtin functions.
!    Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** struct c_strlen_data
*** 91,97 ****
    tree minlen;
    tree maxlen;
    tree maxbound;
!   /* When non-null, NONSTR refers to the declaration known to store
       an unterminated constant character array, as in:
       const char s[] = { 'a', 'b', 'c' };
       It is used to diagnose uses of such arrays in functions such as
--- 91,97 ----
    tree minlen;
    tree maxlen;
    tree maxbound;
!   /* When non-null, DECL refers to the declaration known to store
       an unterminated constant character array, as in:
       const char s[] = { 'a', 'b', 'c' };
       It is used to diagnose uses of such arrays in functions such as
*************** extern tree fold_builtin_expect (locatio
*** 125,131 ****
  extern bool avoid_folding_inline_builtin (tree);
  extern tree fold_call_expr (location_t, tree, bool);
  extern tree fold_builtin_call_array (location_t, tree, tree, int, tree *);
- extern tree fold_builtin_n (location_t, tree, tree *, int, bool);
  extern bool validate_gimple_arglist (const gcall *, ...);
  extern rtx default_expand_builtin (tree, rtx, rtx, machine_mode, int);
  extern bool fold_builtin_next_arg (tree, bool);
--- 125,130 ----
*************** extern tree fold_call_stmt (gcall *, boo
*** 134,140 ****
  extern void set_builtin_user_assembler_name (tree decl, const char *asmspec);
  extern bool is_simple_builtin (tree);
  extern bool is_inexpensive_builtin (tree);
! extern tree compute_objsize (tree, int);
  
  extern bool readonly_data_expr (tree exp);
  extern bool init_target_chars (void);
--- 133,144 ----
  extern void set_builtin_user_assembler_name (tree decl, const char *asmspec);
  extern bool is_simple_builtin (tree);
  extern bool is_inexpensive_builtin (tree);
! 
! class vr_values;
! tree gimple_call_alloc_size (gimple *, wide_int[2] = NULL,
! 			     const vr_values * = NULL);
! extern tree compute_objsize (tree, int, tree * = NULL, tree * = NULL,
! 			     const vr_values * = NULL);
  
  extern bool readonly_data_expr (tree exp);
  extern bool init_target_chars (void);
*************** extern bool target_char_cst_p (tree t, c
*** 148,155 ****
--- 152,162 ----
  extern internal_fn associated_internal_fn (tree);
  extern internal_fn replacement_internal_fn (gcall *);
  
+ bool check_nul_terminated_array (tree, tree, tree = NULL_TREE);
  extern void warn_string_no_nul (location_t, const char *, tree, tree);
  extern tree unterminated_array (tree, tree * = NULL, bool * = NULL);
  extern bool builtin_with_linkage_p (tree);
+ extern bool check_access (tree, tree, tree, tree, tree, tree, tree);
+ 
  
  #endif /* GCC_BUILTINS_H */
diff -Nrcpad gcc-9.3.0/gcc/c/ChangeLog gcc-10.1.0/gcc/c/ChangeLog
*** gcc-9.3.0/gcc/c/ChangeLog	Thu Mar 12 11:08:03 2020
--- gcc-10.1.0/gcc/c/ChangeLog	Thu May  7 10:50:32 2020
***************
*** 1,6 ****
! 2020-03-12  Release Manager
  
! 	* GCC 9.3.0 released.
  
  2020-02-13  Jakub Jelinek  <jakub@redhat.com>
  
--- 1,118 ----
! 2020-05-07  Release Manager
  
! 	* GCC 10.1.0 released.
! 
! 2020-04-19  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR objc/94637
! 	* c-parser.c (c_parser_objc_selector_arg): Handle CPP_SCOPE like
! 	two CPP_COLON tokens.
! 
! 2020-04-17  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR other/94629
! 	* c-parser.c (c_parser_oacc_routine): Remove redundant assignment
! 	to data.clauses.
! 
! 2020-04-15  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c/94593
! 	* c-parser.c (c_parser_pragma) <case PRAGMA_OMP_REQUIRES>: Reject
! 	requires directive when not at file scope.
! 
! 2020-04-08  Tobias Burnus  <tobias@codesourcery.com>
! 
! 	PR middle-end/94120
! 	* c-decl.c (c_check_in_current_scope): New function.
! 	* c-tree.h (c_check_in_current_scope): Declare it.
! 	* c-parser.c (c_parser_oacc_declare): Add check that variables
! 	are declared in the same scope as the directive. Fix handling
! 	of namespace vars.
! 
! 2020-04-07  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c++/94512
! 	* c-parser.c (c_parser_omp_parallel): Set OMP_PARALLEL_COMBINED
! 	if c_parser_omp_master succeeded.
! 
! 2020-03-23  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR gcov-profile/94029
! 	PR c/94239
! 	* c-parser.c (c_parser_declaration_or_fndef): Initialize endloc to
! 	the function_start_locus location.  Don't do that afterwards for the
! 	__GIMPLE body parsing.
! 
! 2020-03-19  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR gcov-profile/94029
! 	* c-tree.h (finish_function): Add location_t argument defaulted to
! 	input_location.
! 	* c-parser.c (c_parser_compound_statement): Add endlocp argument and
! 	set it to the locus of closing } if non-NULL.
! 	(c_parser_compound_statement_nostart): Return locus of closing }.
! 	(c_parser_parse_rtl_body): Likewise.
! 	(c_parser_declaration_or_fndef): Propagate locus of closing } to
! 	finish_function.
! 	* c-decl.c (finish_function): Add end_loc argument, use it instead of
! 	input_location to set function_end_locus.
! 
! 2020-03-17  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c/94172
! 	* c-tree.h (C_TYPE_INCOMPLETE_VARS): Define to TYPE_LANG_SLOT_1
! 	instead of TYPE_VFIELD, and support it on {RECORD,UNION,ENUMERAL}_TYPE.
! 	(TYPE_ACTUAL_ARG_TYPES): Check that it is only used on FUNCTION_TYPEs.
! 	* c-decl.c (pushdecl): Push C_TYPE_INCOMPLETE_VARS also to
! 	ENUMERAL_TYPEs.
! 	(finish_incomplete_vars): New function, moved from finish_struct.  Use
! 	relayout_decl instead of layout_decl.
! 	(finish_struct): Remove obsolete comment about C_TYPE_INCOMPLETE_VARS
! 	being TYPE_VFIELD.  Use finish_incomplete_vars.
! 	(finish_enum): Clear C_TYPE_INCOMPLETE_VARS.  Call
! 	finish_incomplete_vars.
! 	* c-typeck.c (c_build_qualified_type): Clear C_TYPE_INCOMPLETE_VARS
! 	also on ENUMERAL_TYPEs.
! 
! 2020-03-16  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c/94179
! 	* c-fold.c (c_fully_fold_internal): Handle MEM_REF.
! 
! 2020-03-13  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c/94040
! 	* c-decl.c (builtin_structptr_type_count): New constant.
! 	(match_builtin_function_types): Reject decls that are incompatible
! 	in types pointed to by pointers.
! 	(diagnose_mismatched_decls): Adjust comments.
! 
! 2020-03-05  Joseph Myers  <joseph@codesourcery.com>
! 
! 	PR c/93577
! 	* c-typeck.c (pop_init_level): Do not diagnose initializers as
! 	empty when initialized type is error_mark_node.
! 	(set_designator, process_init_element): Ignore initializers for
! 	elements of a variable-size type or of error_mark_node.
! 
! 2020-03-01  Martin Sebor  <msebor@redhat.com>
! 
! 	PR middle-end/93926
! 	* c-decl.c (types_close_enough_to_match): New function.
! 	(match_builtin_function_types):
! 	(diagnose_mismatched_decls): Add missing inform call to a warning.
! 
! 2020-03-01  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c/93812
! 	* c-typeck.c (build_functype_attribute_variant): New function.
! 	(composite_type): Call it.
! 
! 2020-02-25  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR other/93912
! 	* gimple-parser.c (c_parser_gimple_parse_bb_spec_edge_probability):
! 	Rename last argument from probablity to probability.
  
  2020-02-13  Jakub Jelinek  <jakub@redhat.com>
  
***************
*** 8,26 ****
  	* c-decl.c (grokdeclarator): If this_size_varies, only push size into
  	*expr if it has side effects.
  
! 2020-01-22  Joseph Myers  <joseph@codesourcery.com>
  
! 	Backport from mainline:
! 	2020-01-22  Joseph Myers  <joseph@codesourcery.com>
  
  	PR c/93348
  	* c-typeck.c (build_c_cast): Call remove_c_maybe_const_expr on
  	argument with integer operands.
  
! 2020-01-15  Joseph Myers  <joseph@codesourcery.com>
  
! 	Backport from mainline:
! 	2020-01-15  Joseph Myers  <joseph@codesourcery.com>
  
  	PR c/93072
  	* c-decl.c (pushdecl): Use TREE_PUBLIC, not DECL_EXTERNAL, to
--- 120,144 ----
  	* c-decl.c (grokdeclarator): If this_size_varies, only push size into
  	*expr if it has side effects.
  
! 2020-01-30  Jeff Law  <law@redhat.com>
  
! 	PR c/88660
! 	* c-parser.c (c_parser_switch_statement): Make sure to request
! 	marking the switch expr as used.
! 
! 2020-01-22  Joseph Myers  <joseph@codesourcery.com>
  
  	PR c/93348
  	* c-typeck.c (build_c_cast): Call remove_c_maybe_const_expr on
  	argument with integer operands.
  
! 2020-01-16  Kerem Kat  <keremkat@gmail.com>
  
! 	PR c/92833
! 	* c-parser.c (c_parser_consume_token): Fix peeked token stack pop
! 	to support 4 available tokens.
! 
! 2020-01-15  Joseph Myers  <joseph@codesourcery.com>
  
  	PR c/93072
  	* c-decl.c (pushdecl): Use TREE_PUBLIC, not DECL_EXTERNAL, to
***************
*** 28,61 ****
  
  2020-01-13  Joseph Myers  <joseph@codesourcery.com>
  
- 	Backport from mainline:
- 	2020-01-13  Joseph Myers  <joseph@codesourcery.com>
- 
  	PR c/93241
  	* c-typeck.c (build_c_cast): Check for expressions with integer
  	operands that can occur in an unevaluated part of an integer
  	constant expression and call note_integer_operands as needed.
  
! 2019-12-20  Jakub Jelinek  <jakub@redhat.com>
  
! 	Backported from mainline
! 	2019-11-22  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c/90677
! 	* c-decl.c (identifier_global_tag): Define.
  
! 2019-12-02  Sandra Loosemore  <sandra@codesourcery.com>
  
- 	Fix bugs relating to flexibly-sized objects in nios2 backend.
- 	
  	PR target/92499
  
  	* c-decl.c (flexible_array_type_p): Move to common code.
  
! 2019-10-21  Jakub Jelinek  <jakub@redhat.com>
  
! 	Backported from mainline
! 	2019-09-27  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c++/88203
  	* c-parser.c (c_parser_predefined_identifier): New function.
--- 146,610 ----
  
  2020-01-13  Joseph Myers  <joseph@codesourcery.com>
  
  	PR c/93241
  	* c-typeck.c (build_c_cast): Check for expressions with integer
  	operands that can occur in an unevaluated part of an integer
  	constant expression and call note_integer_operands as needed.
  
! 2019-01-08  Richard Biener  <rguenther@suse.de>
  
! 	PR middle-end/93199
! 	* gimple-parser.c (c_parser_parse_gimple_body): Remove __PHI IFN
! 	permanently.
  
! 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
  
! 	Update copyright years.
! 
! 2019-12-20  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* c-decl.c (collect_source_ref_cb): Delete.
! 	(for_each_global_decl): Rename into...
! 	(collect_source_refs): ...this.  Call collect_source_ref directly.
! 	(c_parse_final_cleanups): Always call collect_source_ref on the main
! 	input filename.
! 
! 2019-12-19  Julian Brown  <julian@codesourcery.com>
! 	    Cesar Philippidis  <cesar@codesourcery.com>
! 
! 	* c-parser.c (c_parser_omp_clause_name): Add parsing of attach and
! 	detach clauses.
! 	(c_parser_omp_variable_list): Add ALLOW_DEREF optional parameter.
! 	Allow deref (->) in variable lists if true.
! 	(c_parser_omp_var_list_parens): Add ALLOW_DEREF optional parameter.
! 	Pass to c_parser_omp_variable_list.
! 	(c_parser_oacc_data_clause): Support attach and detach clauses.  Update
! 	call to c_parser_omp_variable_list.
! 	(c_parser_oacc_all_clauses): Support attach and detach clauses.
! 	(OACC_DATA_CLAUSE_MASK, OACC_ENTER_DATA_CLAUSE_MASK,
! 	OACC_KERNELS_CLAUSE_MASK, OACC_PARALLEL_CLAUSE_MASK,
! 	OACC_SERIAL_CLAUSE_MASK): Add PRAGMA_OACC_CLAUSE_ATTACH.
! 	(OACC_EXIT_DATA_CLAUSE_MASK): Add PRAGMA_OACC_CLAUSE_DETACH.
! 	* c-typeck.c (handle_omp_array_sections_1): Reject subarrays for attach
! 	and detach.  Support deref.
! 	(handle_omp_array_sections): Use GOMP_MAP_ATTACH_DETACH instead of
! 	GOMP_MAP_ALWAYS_POINTER for OpenACC.
! 	(c_oacc_check_attachments): New function.
! 	(c_finish_omp_clauses): Check attach/detach arguments for being
! 	pointers using above.  Support deref.
! 
! 2019-12-19  Julian Brown  <julian@codesourcery.com>
! 	    Maciej W. Rozycki  <macro@codesourcery.com>
! 	    Tobias Burnus  <tobias@codesourcery.com>
! 	    Thomas Schwinge  <thomas@codesourcery.com>
! 
! 	* c-parser.c (c_parser_omp_clause_name): Support no_create.
! 	(c_parser_oacc_data_clause): Likewise.
! 	(c_parser_oacc_all_clauses): Likewise.
! 	(OACC_DATA_CLAUSE_MASK, OACC_KERNELS_CLAUSE_MASK)
! 	(OACC_PARALLEL_CLAUSE_MASK, OACC_SERIAL_CLAUSE_MASK): Add
! 	PRAGMA_OACC_CLAUSE_NO_CREATE.
! 	* c-typeck.c (handle_omp_array_sections): Support
! 	GOMP_MAP_NO_ALLOC.
! 
! 2019-12-09  David Malcolm  <dmalcolm@redhat.com>
! 
! 	* c-objc-common.c (range_label_for_type_mismatch::get_text):
! 	Replace label_text ctor calls.
! 
! 2019-12-04  Joseph Myers  <joseph@codesourcery.com>
! 
! 	PR c/36941
! 	PR c/88827
! 	* c-typeck.c (convert_lvalue_to_rvalue): Call
! 	require_complete_type for arguments not of void types.
! 	(build_indirect_ref): Do not diagnose dereferencing pointers to
! 	incomplete types.
! 	* c-tree.h (C_TYPE_ERROR_REPORTED): Remove.
! 
! 2019-12-03  Joseph Myers  <joseph@codesourcery.com>
! 
! 	PR c/88704
! 	* c-decl.c (store_parm_decls_oldstyle): Diagnose use of [*] in
! 	old-style parameter definitions.
! 
! 2019-12-01  Sandra Loosemore  <sandra@codesourcery.com>
  
  	PR target/92499
  
  	* c-decl.c (flexible_array_type_p): Move to common code.
  
! 2019-11-30  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* c-decl.c (start_decl): Allow initialization of variables whose
! 	size is a POLY_INT_CST.
! 	(finish_decl): Use verify_type_context to check whether the target
! 	allows variables with a particular type to have static or thread-local
! 	storage duration.  Don't raise a second error if such variables do
! 	not have a constant size.
! 	(grokdeclarator): Use verify_type_context to check whether the
! 	target allows fields or array elements to have a particular type.
! 	* c-typeck.c (pointer_diff): Use verify_type_context to test whether
! 	the target allows pointer difference for the types involved.
! 	(build_unary_op): Likewise for pointer increment and decrement.
! 
! 2019-11-29  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-parser.c (struct c_parser): Add members raw_tokens and
! 	raw_tokens_used.
! 	(c_lex_one_token): Add argument raw.  Handle lexing raw tokens and
! 	using previously-lexed raw tokens.
! 	(c_parser_peek_nth_token_raw)
! 	(c_parser_check_balanced_raw_token_sequence): New functions.
! 	(c_parser_nth_token_starts_std_attributes): Use
! 	c_parser_check_balanced_raw_token_sequence for Objective-C.
! 
! 2019-11-25  Joseph Myers  <joseph@codesourcery.com>
! 
! 	PR c/91985
! 	* c-decl.c (finish_declspecs): Use int instead of decimal
! 	floating-point types if decimal floating-point not supported.
! 
! 2019-11-25  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-tree.h (struct c_declarator): Use a structure for id member.
! 	* c-decl.c (grokdeclarator): Extract attributes from cdk_id
! 	declarators at the start, not when handling individual declarators
! 	later.  Use u.id.id instead of u.id.
! 	(grokfield): Use u.id.id instead of u.id.
! 	(build_id_declarator): Set u.id.id and u.id.attrs.
! 	(finish_declspecs): Handle postfix attributes in case of typedef
! 	name or typeof used.
! 	* c-parser.c (c_parser_direct_declarator)
! 	(c_parser_direct_declarator_inner): Place declarator for
! 	attributes inside that for function or array, not outside.  Set
! 	u.id.attrs for identifiers.
! 	(c_parser_parameter_declaration): Use u.id.id instead of u.id.
! 	* gimple-parser.c (c_parser_gimple_declaration): Use u.id.id
! 	instead of u.id.
! 
! 2019-11-22  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c/90677
! 	* c-decl.c (identifier_global_tag): Define.
! 
! 2019-11-20  Richard Biener  <rguenther@suse.de>
! 
! 	PR c/92088
! 	* c-decl.c (grokdeclarator): Prevent inlining of nested
! 	function with VLA arguments.
! 
! 2019-11-20  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-decl.c (c_warn_type_attributes): New function.
! 	(groktypename, grokdeclarator, finish_declspecs): Call
! 	c_warn_type_attributes before applying attributes to types.
! 	* c-tree.h (c_warn_type_attributes): Declare.
! 
! 2019-11-19  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-decl.c (c_warn_unused_attributes): Use pedwarn not warning for
! 	standard attributes.
! 	* c-parser.c (c_parser_std_attribute): Take argument for_tm.  Use
! 	pedwarn for unknown standard attributes and return error_mark_node
! 	for them.
! 
! 2019-11-18  Matthew Malcomson  <matthew.malcomson@arm.com>
! 
! 	* c-parser.c (c_parser_parse_rtl_body): Always call
! 	run_rtl_passes, even if startwith pass is not provided.
! 
! 2019-11-15  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-parser.c (c_parser_std_attribute_specifier): Diagnose
! 	duplicate standard attributes.
! 
! 2019-11-15  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-decl.c (std_attribute_table): Add maybe_unused.
! 
! 2019-11-15  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-decl.c (std_attribute_table): Add fallthrough.
! 	* c-parser.c (c_parser_declaration_or_fndef): Diagnose fallthrough
! 	attribute at top level.
! 
! 2019-11-15  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-decl.c (std_attribute_table): New.
! 	(c_init_decl_processing): Register attributes from
! 	std_attribute_table.
! 	* c-parser.c (c_parser_attribute_arguments): Add arguments
! 	require_string and allow_empty_args.  All callers changed.
! 	(c_parser_std_attribute): Set require_string argument for
! 	"deprecated" attribute.
! 
! 2019-11-14  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-parser.c (c_parser_postfix_expression)
! 	(c_parser_check_literal_zero): Handle CPP_UTF8CHAR.
! 	* gimple-parser.c (c_parser_gimple_postfix_expression): Likewise.
! 
! 2019-11-14  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* c-typeck.c (build_conditional_expr): Use truth_type_for instead
! 	of build_same_sized_truth_vector_type.
! 	(build_vec_cmp): Likewise.
! 
! 2019-11-14  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-parser.c (c_parser_omp_context_selector): Don't require score
! 	argument to fit into shwi, just to be INTEGER_CST.  Diagnose
! 	negative score.
! 
! 	* c-parser.c (c_parser_omp_context_selector): Rename
! 	CTX_PROPERTY_IDLIST to CTX_PROPERTY_NAME_LIST, add CTX_PROPERTY_ID.
! 	Use CTX_PROPERTY_ID for atomic_default_mem_order, only allow a single
! 	identifier in that.  For CTX_PROPERTY_NAME_LIST, allow identifiers
! 	and string literals.
! 
! 2019-11-14  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-tree.h (enum c_typespec_kind): Add ctsk_tagref_attrs and
! 	ctsk_tagfirstref_attrs.
! 	(struct c_declspecs): Update description of attrs.  Add
! 	postfix_attrs and non_std_attrs_seen_p.  Increase size of
! 	typespec_kind bit-field.
! 	(c_warn_unused_attributes): New declaration.
! 	(parser_xref_tag): Update prototype.
! 	* c-decl.c (c_warn_unused_attributes): New function.
! 	(shadow_tag_warned): Handle ctsk_tagfirstref_attrs and
! 	ctsk_tagref_attrs.  Handle attribute declarations.
! 	(check_compound_literal_type): Handle ctsk_tagfirstref_attrs.
! 	(grokdeclarator): Handle standard attributes.
! 	(parser_xref_tag): Add arguments have_std_attrs and attrs.  Apply
! 	attributes to incomplete type reference.
! 	(xref_tag): Update call to parser_xref_tag.
! 	(declspecs_add_addrspace, declspecs_add_type)
! 	(declspecs_add_scspec, declspecs_add_attrs): Set
! 	non_std_attrs_seen_p.
! 	(finish_declspecs): Apply postfix standard attributes to type.
! 	* c-parser.c (c_token_starts_declspecs)
! 	(c_token_starts_declaration, c_parser_next_token_starts_declspecs)
! 	(c_parser_next_tokens_start_declaration): Update comments.
! 	(c_parser_consume_token, c_parser_consume_pragma): Handle moving
! 	parser->tokens[2] to parser->tokens[1].
! 	(c_parser_nth_token_starts_std_attributes)
! 	(c_parser_std_attribute_specifier_sequence): New functions.
! 	(c_parser_declaration_or_fndef): Add arguments have_attrs and
! 	attrs.  All callers changed.  Handle standard attributes.
! 	(c_parser_parms_declarator, c_parser_parms_list_declarator)
! 	(c_parser_parameter_declaration): Add argument have_gnu_attrs.
! 	All callers changed.
! 	(c_parser_declspecs): Add arguments start_std_attr_ok and
! 	end_std_attr_ok.  All callers changed.  Handle standard
! 	attributes.
! 	(c_parser_enum_specifier, c_parser_struct_or_union_specifier)
! 	(c_parser_direct_declarator, c_parser_direct_declarator_inner)
! 	(c_parser_compound_statement_nostart, c_parser_all_labels)
! 	(c_parser_label, c_parser_statement, c_parser_for_statement):
! 	Handle standard attributes.
! 	* c-parser.h (c_parser_declspecs): Update prototype.
! 	* gimple-parser.c (c_parser_gimple_declaration): Update call to
! 	c_parser_declspecs.
! 
! 2019-11-12  Martin Liska  <mliska@suse.cz>
! 
! 	* gimple-parser.c: Do not include params.h.
! 
! 2019-11-12  Martin Liska  <mliska@suse.cz>
! 
! 	* gimple-parser.c (c_parser_parse_gimple_body): Replace old parameter syntax
! 	with the new one, include opts.h if needed.  Use SET_OPTION_IF_UNSET
! 	macro.
! 
! 2019-11-12  Maciej W. Rozycki  <macro@codesourcery.com>
! 	    Frederik Harwath  <frederik@codesourcery.com>
! 
! 	gcc/c/
! 	* c-parser.c (OACC_SERIAL_CLAUSE_MASK): New macro.
! 	(c_parser_oacc_kernels_parallel): Rename function to...
! 	(c_parser_oacc_compute): ... this.  Handle PRAGMA_OACC_SERIAL.
! 	(c_parser_omp_construct): Update accordingly.
! 
! 
! 2019-11-11  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-parser.c (c_parser_translation_unit): Diagnose declare target
! 	without corresponding end declare target.
! 
! 2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* c-convert.c (convert): Only handle vector conversions if one of
! 	the types satisfies gnu_vector_type_p or if -flax-vector-conversions
! 	allows it.
! 	* c-typeck.c (build_array_ref): Only allow vector indexing if the
! 	vectors satisfy gnu_vector_type_p.
! 	(build_unary_op): Only allow unary operators to be applied to
! 	vectors if they satisfy gnu_vector_type_p.
! 	(digest_init): Only allow by-element initialization of vectors
! 	if they satisfy gnu_vector_type_p.
! 	(really_start_incremental_init): Likewise.
! 	(push_init_level): Likewise.
! 	(pop_init_level): Likewise.
! 	(process_init_element): Likewise.
! 	(build_binary_op): Only allow binary operators to be applied to
! 	vectors if they satisfy gnu_vector_type_p.
! 
! 2019-11-08  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-decl.c (grokparms): Convert () in a function definition to
! 	(void) for C2x.
! 	(store_parm_decls_oldstyle): Pedwarn for C2x.
! 	(store_parm_decls): Update comment about () not generating a
! 	prototype.
! 
! 2019-11-07  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-parser.c (c_parser_attribute_arguments): New function.
! 	Factored out of c_parser_gnu_attribute.
! 	(c_parser_gnu_attribute): Use c_parser_attribute_arguments.
! 	(c_parser_balanced_token_sequence, c_parser_std_attribute)
! 	(c_parser_std_attribute_specifier): New functions.
! 	(c_parser_transaction_attributes): Use
! 	c_parser_std_attribute_specifier.
! 
! 2019-11-07  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-parser.c (c_parser): Remove lex_untranslated_string.  Add
! 	lex_joined_string and translate_strings_p.
! 	(c_lex_one_token): Pass 0 or C_LEX_STRING_NO_JOIN to
! 	c_lex_with_flags.
! 	(c_parser_string_literal): New function.
! 	(c_parser_static_assert_declaration_no_semi): Use
! 	c_parser_string_literal.  Do not set lex_untranslated_string.
! 	(c_parser_asm_string_literal): Use c_parser_string_literal.
! 	(c_parser_simple_asm_expr): Do not set lex_untranslated_string.
! 	(c_parser_gnu_attributes): Set and restore translate_strings_p
! 	instead of lex_untranslated_string.
! 	(c_parser_asm_statement): Do not set lex_untranslated_string.
! 	(c_parser_asm_operands): Likewise.
! 	(c_parser_has_attribute_expression): Set and restore
! 	translate_strings_p instead of lex_untranslated_string.
! 	(c_parser_postfix_expression): Use c_parser_string_literal.
! 	(pragma_lex): Likewise.
! 	(c_parser_pragma_pch_preprocess): Set lex_joined_string.
! 	(c_parse_file): Set translate_strings_p.
! 	* gimple-parser.c (c_parser_gimple_postfix_expression)
! 	(c_parser_gimple_or_rtl_pass_list): Use c_parser_string_literal.
! 	* c-parser.c (c_parser_string_literal): Declare function.
! 
! 2019-11-02  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-parser.c (c_finish_omp_declare_variant): Use
! 	omp_get_context_selector instead of c_omp_get_context_selector.
! 
! 2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* c-tree.h (c_simulate_enum_decl): Declare.
! 	* c-decl.c (c_simulate_enum_decl): New function.
! 	* c-objc-common.h (LANG_HOOKS_SIMULATE_ENUM_DECL): Define to the above.
! 
! 2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* c-tree.h (c_simulate_builtin_function_decl): Declare.
! 	* c-decl.c (c_simulate_builtin_function_decl): New function.
! 	* c-objc-common.h (LANG_HOOKS_SIMULATE_BUILTIN_FUNCTION_DECL): Define
! 	to the above.
! 
! 2019-10-28  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c/66970
! 	* c-decl.c (names_builtin_p): Define a new function.
! 
! 2019-10-28  Richard Biener  <rguenther@suse.de>
! 
! 	PR c/92249
! 	* gimple-parser.c (c_parser_parse_gimple_body): Make
! 	current_bb the entry block initially to easier recover
! 	from errors.
! 	(c_parser_gimple_compound_statement): Adjust.
! 
! 2019-10-24  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-parser.c (c_finish_omp_declare_variant): Use
! 	omp_context_selector_matches instead of
! 	c_omp_context_selector_matches.
! 	* c-decl.c (c_decl_attributes): Add "omp declare target block"
! 	attribute in between declare target and end declare target
! 	pragmas.
! 
! 2019-10-15  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-parser.c (c_parser_attribute_any_word): Rename to
! 	c_parser_gnu_attribute_any_word.  All callers changed.
! 	(c_parser_attribute): Rename to c_parser_gnu_attribute.  All
! 	callers changed.
! 	(c_parser_attributes): Rename to c_parser_gnu_attributes.  All
! 	callers changed.
! 	(c_parser_declaration_or_fndef, c_parser_declspecs)
! 	(c_parser_enum_specifier, c_parser_struct_or_union_specifier)
! 	(c_parser_struct_declaration, c_parser_declarator)
! 	(c_parser_gnu_attribute, c_parser_compound_statement)
! 	(c_parser_label, c_parser_statement, c_parser_objc_method_decl)
! 	(c_parser_transaction_attributes): Add "gnu-" prefix to names of
! 	attribute-related syntax productions.
! 
! 2019-10-14  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* c-objc-common.c (useful_aka_type_p): Replace with...
! 	(get_aka_type): ...this new function.  Given the original type,
! 	decide which aka type to print (if any).  Only look through typedefs
! 	if user_facing_original_type_p.
! 	(print_type): Update accordingly.
! 
! 2019-10-14  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-parser.c (c_parser_omp_all_clauses): Change bool NESTED_P argument
! 	into int NESTED, if it is 2, diagnose missing commas in between
! 	clauses.
! 	(c_parser_omp_context_selector): Pass 2 as last argument to
! 	c_parser_omp_all_clauses.
! 
! 2019-10-12  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-parser.c (c_parser_omp_context_selector): Improve error recovery.
! 	For simd properties, put them directly into TREE_VALUE.
! 	(c_finish_omp_declare_variant): Call c_omp_mark_declare_variant.
! 	If c_omp_context_selector_matches is 0, don't add attribute, otherwise
! 	add "omp declare variant base" attribute rather than
! 	"omp declare variant".
! 
! 2019-10-11  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-decl.c (declspecs_add_type): Use pedwarn_c11 for DFP types.
! 
! 2019-10-10  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-parser.c (c_parser_omp_all_clauses): Add NESTED_P argument, if
! 	true, terminate processing on closing paren and don't skip to end of
! 	pragma line.
! 	(c_parser_omp_declare_simd): Handle also declare variant.
! 	(omp_construct_selectors, omp_device_selectors,
! 	omp_implementation_selectors, omp_user_selectors): New variables.
! 	(c_parser_omp_context_selector,
! 	c_parser_omp_context_selector_specification,
! 	c_finish_omp_declare_variant): New functions.
! 	(c_finish_omp_declare_simd): Handle both declare simd and
! 	declare variant.
! 	(c_parser_omp_declare): Handle declare variant.
! 
! 2019-10-02  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-parser.c (c_parser_asm_statement): Handle CPP_SCOPE like two
! 	CPP_COLON tokens.
! 
! 2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* c-objc-common.c (useful_aka_type_p): New function.
! 	(print_type): Use it to decide whether an aka type is worth printing.
! 
! 2019-09-27  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c++/88203
  	* c-parser.c (c_parser_predefined_identifier): New function.
***************
*** 65,123 ****
  	in shared and firstprivate clauses, even when they are predetermined
  	shared.
  
! 	2019-08-09  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR c/91401
! 	* c-parser.c (c_parser_omp_clause_dist_schedule): Fix up typos in the
! 	check_no_duplicate_clause call.  Comment it out, instead emit a
! 	warning for duplicate dist_schedule clauses.
  
! 2019-08-31  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline.
! 	2019-08-23  Iain Sandoe  <iain@sandoe.co.uk>
  
  	PR pch/61250
  	* c-parser.c (c_parse_file): Call c_common_no_more_pch ()
  	after determining that the first token is not
  	PRAGMA_GCC_PCH_PREPROCESS.
  
! 2019-08-12  Release Manager
  
! 	* GCC 9.2.0 released.
  
! 2019-08-02  Martin Sebor  <msebor@redhat.com>
  
! 	Backport from mainline
! 	2019-06-05  Martin Sebor  <msebor@redhat.com>
  
! 	PR c/90737
! 	* c-typeck.c (c_finish_return): Only consider functions returning
! 	pointers as candidates for -Wreturn-local-addr.
  
! 2019-08-01  Jakub Jelinek  <jakub@redhat.com>
  
! 	Backported from mainline
! 	2019-07-31  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c/91192
  	* c-parser.c (c_parser_sizeof_expression): Call set_c_expr_source_range
  	even if finish is UNKNOWN_LOCATION, just use start as finish in that
  	case.
  
! 2019-07-20  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	Backport from mainline
! 	2019-07-18  Richard Sandiford  <richard.sandiford@arm.com>
  
  	PR c/53633
  	* c-decl.c (finish_function): Check targetm.warn_func_return
  	before issuing a -Wreturn-type warning.
  
! 2019-05-17  Jakub Jelinek  <jakub@redhat.com>
  
! 	Backported from mainline
! 	2019-04-26  Jakub Jelinek  <jakub@redhat.com>
  
  	PR debug/90197
  	* c-tree.h (c_finish_loop): Add 2 further location_t arguments.
--- 614,912 ----
  	in shared and firstprivate clauses, even when they are predetermined
  	shared.
  
! 2019-09-27  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* c-typeck.c (build_function_call_vec): Take the original function
! 	decl as an optional final parameter.  Pass all built-in calls to
! 	check_builtin_function_arguments.
  
! 2019-09-20  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	PR c/91815
! 	* c-decl.c (pushdecl): In C detect duplicate declarations across scopes
! 	of identifiers in the external scope only for variables and functions.
! 
! 2019-09-04  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
! 
! 	PR c/78736
! 	* c-typeck.c (convert_for_assignment): Handle Wenum-conversion.
! 
! 2019-08-23  Iain Sandoe  <iain@sandoe.co.uk>
  
  	PR pch/61250
  	* c-parser.c (c_parse_file): Call c_common_no_more_pch ()
  	after determining that the first token is not
  	PRAGMA_GCC_PCH_PREPROCESS.
  
! 2019-08-22  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* c-parser.c (c_parser_declaration_or_fndef): Set DECL_ARGUMENTS of a
! 	FUNCTION_DECL to the right value in the presence of nested declarators.
  
! 2019-08-13  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR middle-end/91421
! 	* c-decl.c (merge_decls): Use copy_decl_built_in_function.
  
! 2019-08-13  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	PR middle-end/91421
! 	* c-decl.c (header_for_builtin_fn): Take a FUNCTION_DECL instead
! 	of a built_in_function.
! 	(diagnose_mismatched_decls, implicitly_declare): Update accordingly.
  
! 2019-08-10  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-parser.c (c_parser_omp_clause_name): Parse device_type.
! 	(c_parser_omp_clause_device_type): New function.
! 	(c_parser_omp_all_clauses): Handle PRAGMA_OMP_CLAUSE_DEVICE_TYPE.
! 	(OMP_DECLARE_TARGET_CLAUSE_MASK): Add PRAGMA_OMP_CLAUSE_DEVICE_TYPE.
! 	(c_parser_omp_declare_target): Handle device_type clauses.  Remove
! 	diagnostics for declare target with clauses nested in clause-less
! 	declare target declaration-definition-seq.
! 	* c-typeck.c (c_finish_omp_clauses): Handle OMP_CLAUSE_DEVICE_TYPE.
! 
! 2019-08-09  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-parser.c (check_no_duplicate_clause): Simplify using
! 	omp_find_clause.
! 	(c_parser_omp_clause_if): Fix up printing of target {enter,exit} data
! 	directive name modifiers.
! 	(c_parser_omp_clause_proc_bind): Check for duplicate proc_bind clause.
! 
! 	PR c/91401
! 	* c-parser.c (c_parser_omp_clause_dist_schedule): Fix up typos in the
! 	check_no_duplicate_clause call.  Comment it out, instead emit a
! 	warning for duplicate dist_schedule clauses.
! 
! 2019-08-08  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* c-decl.c (finish_enum): Clear C_TYPE_BEING_DEFINED.
! 
! 2019-08-08  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-typeck.c (c_finish_omp_clauses): For C_ORT_OMP
! 	OMP_CLAUSE_USE_DEVICE_* clauses use oacc_reduction_head bitmap
! 	instead of generic_head to track duplicates.
! 
! 2019-08-07  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-parser.c (c_parser_omp_clause_name): Parse use_device_addr clause.
! 	(c_parser_omp_clause_use_device_addr): New function.
! 	(c_parser_omp_all_clauses): Handle PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR.
! 	(OMP_TARGET_DATA_CLAUSE_MASK): Add PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR.
! 	(c_parser_omp_target_data): Handle PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR
! 	like PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR, adjust diagnostics about no
! 	map or use_device_* clauses.
! 	* c-typeck.c (c_finish_omp_clauses): For OMP_CLAUSE_USE_DEVICE_PTR
! 	in OpenMP, require pointer type rather than pointer or array type.
! 	Handle OMP_CLAUSE_USE_DEVICE_ADDR.
! 
! 2019-07-31  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c/91192
  	* c-parser.c (c_parser_sizeof_expression): Call set_c_expr_source_range
  	even if finish is UNKNOWN_LOCATION, just use start as finish in that
  	case.
  
! 2019-07-25  Martin Liska  <mliska@suse.cz>
! 	    Dominik Infuhr  <dominik.infuehr@theobroma-systems.com>
  
! 	PR c++/23383
! 	* c-decl.c (merge_decls): Merge OPERATOR_DELETE flag.
! 
! 2019-07-25  Martin Liska  <mliska@suse.cz>
! 
! 	* c-decl.c (merge_decls): Use new macros
! 	(e.g. DECL_SET_LAMBDA_FUNCTION and DECL_LAMBDA_FUNCTION_P).
! 
! 2019-07-23  Richard Biener  <rguenther@suse.de>
! 
! 	PR tree-optimization/83518
! 	* gimple-parser.c (c_parser_parse_gimple_body): When we have
! 	a CFG also rebuild cgraph edges.
! 
! 2019-07-20  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-parser.c (c_parser_omp_clause_name): Handle bind clause.
! 	(c_parser_omp_clause_bind): New function.
! 	(c_parser_omp_all_clauses): Handle PRAGMA_OMP_CLAUSE_BIND.
! 	(OMP_LOOP_CLAUSE_MASK): Define.
! 	(c_parser_omp_loop): New function.
! 	(c_parser_omp_parallel, c_parser_omp_teams): Handle parsing of
! 	loop combined with parallel or teams.
! 	(c_parser_omp_construct): Handle PRAGMA_OMP_LOOP.
! 	* c-typeck.c (c_finish_omp_clauses): Handle OMP_CLAUSE_BIND.
! 
! 2019-07-18  Richard Sandiford  <richard.sandiford@arm.com>
  
  	PR c/53633
  	* c-decl.c (finish_function): Check targetm.warn_func_return
  	before issuing a -Wreturn-type warning.
  
! 2019-07-12  Alexandre Oliva  <oliva@adacore.com>
  
! 	* gimple-parser.c (c_parser_gimple_try_stmt): New.
! 	(c_parser_compound_statement): Call it.
! 
! 2019-07-12  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-parser.c (c_parser_omp_clause_name): Handle order clause.
! 	(c_parser_omp_clause_order): New function.
! 	(c_parser_omp_all_clauses): Handle PRAGMA_OMP_CLAUSE_ORDER.
! 	(OMP_SIMD_CLAUSE_MASK, OMP_FOR_CLAUSE_MASK): Add
! 	PRAGMA_OMP_CLAUSE_ORDER.
! 	* c-typeck.c (c_finish_omp_clauses): Handle OMP_CLAUSE_ORDER.
! 
! 2019-07-10  Richard Biener  <rguenther@suse.de>
! 
! 	* gimple-parser.c (c_parser_gimple_postfix_expression): Support
! 	_Literal (int *) &x for address literals.
! 
! 2019-07-09  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c++/61339
! 	* c-decl.c (xref_tag): Change class-key of PODs to struct and others
! 	to class.
! 	(field_decl_cmp): Same.
! 	* c-parser.c (c_parser_struct_or_union_specifier): Same.
! 	* c-tree.h: Same.
! 	* gimple-parser.c (c_parser_gimple_compound_statement): Same.
! 
! 2019-07-09  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c++/61339
! 	* c-decl.c: Change class-key from class to struct and vice versa
! 	to match convention and avoid -Wclass-is-pod and -Wstruct-no-pod.
! 	* gimple-parser.c: Same.
! 
! 2019-07-01  Richard Biener  <rguenther@suse.de>
! 
! 	* gimple-parser.c (c_parser_gimple_postfix_expression): Handle
! 	_Literal (char *) &"foo" for address literals pointing to
! 	STRING_CSTs.
! 
! 2019-06-25  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
! 
! 	* c-parser.c (c_parse_init): Create keyword for "__intN__" type.
! 	* c-decl.c (declspecs_add_type): Don't pedwarn about "__intN" ISO
! 	C incompatibility if alternate "__intN__" form is used.
! 
! 2019-06-24  Martin Sebor  <msebor@redhat.com>
! 
! 	* c-typeck.c (build_binary_op): Hyphenate floating-point.
! 
! 2019-06-10  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-parser.c (c_parser_pragma): Reject PRAGMA_OMP_SCAN.
! 	(c_parser_omp_clause_reduction): Don't sorry_at on inscan reductions.
! 	(c_parser_omp_scan_loop_body): New function.
! 	(c_parser_omp_for_loop): Call c_parser_omp_scan_loop_body if there are
! 	inscan reduction clauses.
! 	* c-typeck.c (c_finish_omp_clauses): Reject mixing inscan with
! 	non-inscan reductions on the same construct, or inscan reductions with
! 	ordered or schedule clauses, or inscan array reductions.
! 
! 2019-06-05  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c/90737
! 	* c-typeck.c (c_finish_return): Only consider functions returning
! 	pointers as candidates for -Wreturn-local-addr.
! 
! 2019-06-05  Martin Sebor  <msebor@redhat.com>
! 
! 	* c-decl.c (start_decl): Adjust quoting and hyphenation
! 	in diagnostics.
! 	(finish_decl): Same.
! 	(finish_enum): Same.
! 	(start_function): Same.
! 	(declspecs_add_type): Same.
! 	* c-parser.c (warn_for_abs): Same.
! 	* c-typeck.c (build_binary_op): Same.
! 
! 2019-05-17  Thomas Schwinge  <thomas@codesourcery.com>
! 
! 	PR c/89433
! 	* c-parser.c (c_finish_oacc_routine): Rework checking if already
! 	marked with an OpenACC 'routine' directive.
! 
! 	PR c/89433
! 	* c-parser.c (c_parser_oacc_routine): Normalize order of clauses.
! 	(c_finish_oacc_routine): Call oacc_verify_routine_clauses.
! 
! 	PR c/89433
! 	* c-parser.c (c_finish_oacc_routine): Refer to OpenACC 'routine'
! 	clauses from "omp declare target" attribute.
! 
! 2019-05-16  Martin Sebor  <msebor@redhat.com>
! 
! 	* c-decl.c (start_decl): Quote keywords, operators, and
! 	types in diagnostics.
! 	(finish_decl): Same.
! 	* c-parser.c (c_parser_asm_statement): Same.
! 	(c_parser_conditional_expression): Same.
! 	(c_parser_transaction_cancel): Same.
! 	* c-typeck.c (c_common_type): Same.
! 	(build_conditional_expr): Same.
! 	(digest_init): Same.
! 	(process_init_element): Same.
! 	(build_binary_op): Same.
! 
! 2019-05-17  Richard Biener  <rguenther@suse.de>
! 
! 	* gimple-parser.c (c_parser_gimple_statement): Handle __VEC_PERM.
! 	(c_parser_gimple_unary_expression): Likewise.
! 	(c_parser_gimple_parentized_ternary_expression): New function.
! 
! 2019-05-16  Richard Biener  <rguenther@suse.de>
! 
! 	* gimple-parser.c (c_parser_gimple_statement): Handle __BIT_INSERT.
! 	(c_parser_gimple_unary_expression): Likewise.
! 
! 2019-05-15  Richard Biener  <rguenther@suse.de>
! 
! 	* gimple-parser.c (c_parser_gimple_postfix_expression): Handle
! 	__BIT_FIELD_REF.
! 
! 2019-05-14  Richard Biener  <rguenther@suse.de>
! 
! 	* gimple-parser.c (c_parser_gimple_statement): Remove
! 	questionable auto-promotion to VIEW_CONVERT_EXPR.
! 	(c_parser_gimple_typespec): Split out from __MEM parsing.
! 	(c_parser_gimple_postfix_expression): Handle __VIEW_CONVERT.
! 	* tree-pretty-print.c (dump_generic_node): Dump VIEW_CONVERT_EXPR
! 	as __VIEW_CONVERT with -gimple.
! 
! 2019-05-09  Martin Liska  <mliska@suse.cz>
! 
! 	* gimple-parser.c (c_parser_gimple_statement): Support __MIN and
! 	__MAX.
! 	(c_parser_gimple_unary_expression): Parse also binary expression
! 	__MIN and __MAX.
! 	(c_parser_gimple_parentized_binary_expression): New function.
! 
! 2019-05-09  Martin Liska  <mliska@suse.cz>
! 
! 	* gimple-parser.c (struct gimple_parser): Add probability.
! 	for gimple_parser_edge.
! 	(gimple_parser::push_edge): Add new argument probability.
! 	(c_parser_gimple_parse_bb_spec): Parse also probability
! 	if present.
! 	(c_parser_parse_gimple_body): Set edge probability.
! 	(c_parser_gimple_compound_statement): Consume token
! 	before calling c_parser_gimple_goto_stmt.
! 	Parse BB counts.
! 	(c_parser_gimple_statement): Pass new argument.
! 	(c_parser_gimple_goto_stmt): Likewise.
! 	(c_parser_gimple_if_stmt): Likewise.
! 	(c_parser_gimple_or_rtl_pass_list): Parse hot_bb_threshold.
! 	* c-parser.c (c_parser_declaration_or_fndef): Pass
! 	hot_bb_threshold argument.
! 	* c-tree.h (struct c_declspecs): Add hot_bb_threshold
! 	field.
! 	(c_parser_gimple_parse_bb_spec_edge_probability): New.
! 
! 2019-04-26  Jakub Jelinek  <jakub@redhat.com>
  
  	PR debug/90197
  	* c-tree.h (c_finish_loop): Add 2 further location_t arguments.
***************
*** 127,140 ****
  	* c-typeck.c (c_finish_loop): Add COND_LOCUS and INCR_LOCUS arguments,
  	emit DEBUG_BEGIN_STMTs if needed.
  
- 2019-05-04  Michael Meissner  <meissner@linux.ibm.com>
- 
- 	* ChangeLog.ibm: Delete unintentional commit on the wrong branch.
- 
- 2019-05-03  Release Manager
- 
- 	* GCC 9.1.0 released.
- 
  2019-04-19  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c/89888
--- 916,921 ----
***************
*** 228,234 ****
  	(c_parser_oacc_simple_clause): Replace parser with loc formal
  	parameter.  Adjust all users.
  
! 2019-02-19  Chung-Lin Tang <cltang@codesourcery.com>
  
  	PR c/87924
  	* c-parser.c (c_parser_oacc_clause_wait): Add representation of wait
--- 1009,1015 ----
  	(c_parser_oacc_simple_clause): Replace parser with loc formal
  	parameter.  Adjust all users.
  
! 2019-02-19  Chung-Lin Tang  <cltang@codesourcery.com>
  
  	PR c/87924
  	* c-parser.c (c_parser_oacc_clause_wait): Add representation of wait
***************
*** 608,614 ****
  
  	PR c/87347
  	* c-parser.c (warn_for_abs): Bail out if TYPE_ARG_TYPES is NULL.  Fix
!         comment.
  
  2018-09-17  David Malcolm  <dmalcolm@redhat.com>
  
--- 1389,1395 ----
  
  	PR c/87347
  	* c-parser.c (warn_for_abs): Bail out if TYPE_ARG_TYPES is NULL.  Fix
! 	comment.
  
  2018-09-17  David Malcolm  <dmalcolm@redhat.com>
  
***************
*** 700,706 ****
  	(build_binary_op): Use it when calling binary_op_error.
  
  2018-08-15  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
! 	
  	* c-decl.c (start_decl): Do not warn if variables is named as main
  	and is a local variable.
  
--- 1481,1487 ----
  	(build_binary_op): Use it when calling binary_op_error.
  
  2018-08-15  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
! 
  	* c-decl.c (start_decl): Do not warn if variables is named as main
  	and is a local variable.
  
***************
*** 741,748 ****
  	type here, instead add "omp declare target implicit" attribute.
  	(finish_decl): Diagnose vars without mappable type here.
  
! 2018-06-20  Chung-Lin Tang <cltang@codesourcery.com>
! 	    Thomas Schwinge <thomas@codesourcery.com>
  	    Cesar Philippidis  <cesar@codesourcery.com>
  
  	* c-parser.c (c_parser_omp_clause_name): Add support for finalize
--- 1522,1529 ----
  	type here, instead add "omp declare target implicit" attribute.
  	(finish_decl): Diagnose vars without mappable type here.
  
! 2018-06-20  Chung-Lin Tang  <cltang@codesourcery.com>
! 	    Thomas Schwinge  <thomas@codesourcery.com>
  	    Cesar Philippidis  <cesar@codesourcery.com>
  
  	* c-parser.c (c_parser_omp_clause_name): Add support for finalize
***************
*** 985,991 ****
  	PR c/82679
  	* c-decl.c (grokdeclarator): Check declspecs insted of atomicp.
  
! 2017-12-12  Alexandre Oliva <aoliva@redhat.com>
  
  	* c-objc-common.h (LANG_HOOKS_EMITS_BEGIN_STMT): Redefine as true.
  	* c-parser.c (add_debug_begin_stmt): New.
--- 1766,1772 ----
  	PR c/82679
  	* c-decl.c (grokdeclarator): Check declspecs insted of atomicp.
  
! 2017-12-12  Alexandre Oliva  <aoliva@redhat.com>
  
  	* c-objc-common.h (LANG_HOOKS_EMITS_BEGIN_STMT): Redefine as true.
  	* c-parser.c (add_debug_begin_stmt): New.
***************
*** 1097,1103 ****
  	* c-typeck.c (c_start_case): Build SWITCH_EXPR using build2 instead
  	of build3.
  
! 2017-11-14 Boris Kolpackov  <boris@codesynthesis.com>
  
  	* Make-lang.in (c.install-plugin): Install backend import library.
  
--- 1878,1884 ----
  	* c-typeck.c (c_start_case): Build SWITCH_EXPR using build2 instead
  	of build3.
  
! 2017-11-14  Boris Kolpackov  <boris@codesynthesis.com>
  
  	* Make-lang.in (c.install-plugin): Install backend import library.
  
***************
*** 1505,1511 ****
  
  	PR c/81417
  	* c-array-notation.c (fix_builtin_array_notation_fn): Update calls to
! 	build_conditional_expr.	
  	* c-parser.c (c_parser_conditional_expression): Create locations for
  	EXP1 and EXP2 from their source ranges.  Pass the locations down to
  	build_conditional_expr.
--- 2286,2292 ----
  
  	PR c/81417
  	* c-array-notation.c (fix_builtin_array_notation_fn): Update calls to
! 	build_conditional_expr.
  	* c-parser.c (c_parser_conditional_expression): Create locations for
  	EXP1 and EXP2 from their source ranges.  Pass the locations down to
  	build_conditional_expr.
***************
*** 1533,1539 ****
  	* c-warn.c (warn_for_multistatement_macros): Prevent bogus
  	warnings.  Avoid walking MACRO_MAP_LOCATIONS.
  
! 2017-07-31  Jan Hubicka <hubicka@ucw.cz>
  	    Martin Liska  <mliska@suse.cz>
  
  	* c-typeck.c (c_finish_goto_label): Build gimple predict
--- 2314,2320 ----
  	* c-warn.c (warn_for_multistatement_macros): Prevent bogus
  	warnings.  Avoid walking MACRO_MAP_LOCATIONS.
  
! 2017-07-31  Jan Hubicka  <hubicka@ucw.cz>
  	    Martin Liska  <mliska@suse.cz>
  
  	* c-typeck.c (c_finish_goto_label): Build gimple predict
***************
*** 1729,1735 ****
  	* c-convert.c (convert): Replace c_save_expr with save_expr.  Don't
  	call c_fully_fold.
  	(convert) <case COMPLEX_TYPE>: Remove special handling of COMPLEX_TYPEs.
! 	* c-decl.c (grokdeclarator): Replace c_save_expr with save_expr. 
  	* c-fold.c (c_fully_fold_internal): Handle SAVE_EXPR.
  	* c-parser.c (c_parser_declaration_or_fndef): Replace c_save_expr with
  	save_expr.
--- 2510,2516 ----
  	* c-convert.c (convert): Replace c_save_expr with save_expr.  Don't
  	call c_fully_fold.
  	(convert) <case COMPLEX_TYPE>: Remove special handling of COMPLEX_TYPEs.
! 	* c-decl.c (grokdeclarator): Replace c_save_expr with save_expr.
  	* c-fold.c (c_fully_fold_internal): Handle SAVE_EXPR.
  	* c-parser.c (c_parser_declaration_or_fndef): Replace c_save_expr with
  	save_expr.
***************
*** 1961,1967 ****
  	set_c_expr_source_range when parsing ssa-name.
  
  2017-02-10  Prasad Ghangal  <prasad.ghangal@gmail.com>
! 	Richard Biener  <rguenther@suse.de>
  
  	* gimple-parser.c (c_parser_gimple_binary_expression): Avoid
  	building IL when arguments are error_mark_node.
--- 2742,2748 ----
  	set_c_expr_source_range when parsing ssa-name.
  
  2017-02-10  Prasad Ghangal  <prasad.ghangal@gmail.com>
! 	    Richard Biener  <rguenther@suse.de>
  
  	* gimple-parser.c (c_parser_gimple_binary_expression): Avoid
  	building IL when arguments are error_mark_node.
***************
*** 3406,3412 ****
  	    Julian Brown  <julian@codesourcery.com>
  	    Nathan Sidwell  <nathan@codesourcery.com>
  
- 	c/
  	* c-parser.c (c_parser_declaration_or_fndef): Add OpenACC
  	routine arg.
  	(c_parser_declaration_or_fndef): Call c_finish_oacc_routine.
--- 4187,4192 ----
***************
*** 4828,4834 ****
  
  	PR c/49706
  	* c-typeck.c (parser_build_binary_op): Warn when logical not is used
! 	on the left hand side operand of a comparison. 
  
  2014-06-05  Marek Polacek  <polacek@redhat.com>
  
--- 5608,5614 ----
  
  	PR c/49706
  	* c-typeck.c (parser_build_binary_op): Warn when logical not is used
! 	on the left hand side operand of a comparison.
  
  2014-06-05  Marek Polacek  <polacek@redhat.com>
  
***************
*** 5646,5652 ****
  	(build_cilk_spawn): New function.
  	(build_cilk_sync): Likewise.
  	* Makefile.in (c-decl.o): Added cilk.h in dependency list.
! 	
  2013-10-27  Tobias Burnus  <burnus@net-b.de>
  
  	PR other/33426
--- 6426,6432 ----
  	(build_cilk_spawn): New function.
  	(build_cilk_sync): Likewise.
  	* Makefile.in (c-decl.o): Added cilk.h in dependency list.
! 
  2013-10-27  Tobias Burnus  <burnus@net-b.de>
  
  	PR other/33426
***************
*** 5931,5937 ****
  
  	* c-array-notation.c (expand_array_notation_exprs): Added
  	ARRAY_NOTATION_REF case.
! 	
  2013-06-07  Balaji V. Iyer  <balaji.v.iyer@intel.com>
  
  	* c-array-notation.c (length_mismatch_in_expr_p): Moved this
--- 6711,6717 ----
  
  	* c-array-notation.c (expand_array_notation_exprs): Added
  	ARRAY_NOTATION_REF case.
! 
  2013-06-07  Balaji V. Iyer  <balaji.v.iyer@intel.com>
  
  	* c-array-notation.c (length_mismatch_in_expr_p): Moved this
***************
*** 5947,5953 ****
  	(replace_invariant_exprs): Initialized additional_tcodes to NULL.
  	(struct inv_list): Moved this to c-family/array-notation-common.c.
  	* c-tree.h (is_cilkplus_builtin_reduce): Remove prototype.
! 	
  2013-06-05  Balaji V. Iyer  <balaji.v.iyer@intel.com>
  
  	* c-typeck.c (convert_arguments): Moved checking of builtin cilkplus
--- 6727,6733 ----
  	(replace_invariant_exprs): Initialized additional_tcodes to NULL.
  	(struct inv_list): Moved this to c-family/array-notation-common.c.
  	* c-tree.h (is_cilkplus_builtin_reduce): Remove prototype.
! 
  2013-06-05  Balaji V. Iyer  <balaji.v.iyer@intel.com>
  
  	* c-typeck.c (convert_arguments): Moved checking of builtin cilkplus
***************
*** 5966,5972 ****
  	to the end of function parsing.
  	* c-array-notation.c (fix_conditional_array_notations_1): Expanded the
  	whole if-statement instead of just the condition.
! 	(expand_array_notation_exprs): Added MODIFY_EXPR case.	
  
  2013-06-03  Balaji V. Iyer  <balaji.v.iyer@intel.com>
  
--- 6746,6752 ----
  	to the end of function parsing.
  	* c-array-notation.c (fix_conditional_array_notations_1): Expanded the
  	whole if-statement instead of just the condition.
! 	(expand_array_notation_exprs): Added MODIFY_EXPR case.
  
  2013-06-03  Balaji V. Iyer  <balaji.v.iyer@intel.com>
  
***************
*** 5974,5980 ****
  	* c-array-notation.c (build_array_notation_expr): Initialized rhs_length
  	array to NULL_TREE if they are unused.  Also added a check for the
  	field to be NULL before its fields are used in future.
! 	
  2013-05-29  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
  
  	PR bootstrap/57450
--- 6754,6760 ----
  	* c-array-notation.c (build_array_notation_expr): Initialized rhs_length
  	array to NULL_TREE if they are unused.  Also added a check for the
  	field to be NULL before its fields are used in future.
! 
  2013-05-29  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
  
  	PR bootstrap/57450
***************
*** 6022,6028 ****
  	(c_parser_array_notation): New function.
  	* c-array-notation.c: New file.
  	* c-tree.h (is_cilkplus_reduce_builtin): Protoize.
! 	
  2013-05-23  Mike Stump  <mikestump@comcast.net>
  
  	* c-typeck.c (convert_for_assignment): Handle references to memory
--- 6802,6808 ----
  	(c_parser_array_notation): New function.
  	* c-array-notation.c: New file.
  	* c-tree.h (is_cilkplus_reduce_builtin): Protoize.
! 
  2013-05-23  Mike Stump  <mikestump@comcast.net>
  
  	* c-typeck.c (convert_for_assignment): Handle references to memory
***************
*** 6241,6247 ****
  	* c-decl.c: Likewise.  Include gt-c-c-decl.h, not gt-c-decl.h.
  	* c-parser.c: Likewise.  Include gt-c-c-parser.h, not gt-c-parser.h.
  
! Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
--- 7021,7027 ----
  	* c-decl.c: Likewise.  Include gt-c-c-decl.h, not gt-c-decl.h.
  	* c-parser.c: Likewise.  Include gt-c-c-parser.h, not gt-c-parser.h.
  
! Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
diff -Nrcpad gcc-9.3.0/gcc/c/Make-lang.in gcc-10.1.0/gcc/c/Make-lang.in
*** gcc-9.3.0/gcc/c/Make-lang.in	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/Make-lang.in	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  # Top level -*- makefile -*- fragment for GNU C - C language.
! # Copyright (C) 1994-2019 Free Software Foundation, Inc.
  
  #This file is part of GCC.
  
--- 1,5 ----
  # Top level -*- makefile -*- fragment for GNU C - C language.
! # Copyright (C) 1994-2020 Free Software Foundation, Inc.
  
  #This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c/c-aux-info.c gcc-10.1.0/gcc/c/c-aux-info.c
*** gcc-9.3.0/gcc/c/c-aux-info.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/c-aux-info.c	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Generate information regarding function declarations and definitions based
     on information stored in GCC's tree structure.  This code implements the
     -aux-info option.
!    Copyright (C) 1989-2019 Free Software Foundation, Inc.
     Contributed by Ron Guilmette (rfg@segfault.us.com).
  
  This file is part of GCC.
--- 1,7 ----
  /* Generate information regarding function declarations and definitions based
     on information stored in GCC's tree structure.  This code implements the
     -aux-info option.
!    Copyright (C) 1989-2020 Free Software Foundation, Inc.
     Contributed by Ron Guilmette (rfg@segfault.us.com).
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/c/c-convert.c gcc-10.1.0/gcc/c/c-convert.c
*** gcc-9.3.0/gcc/c/c-convert.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/c-convert.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Language-level data type conversion for GNU C.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Language-level data type conversion for GNU C.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** convert (tree type, tree expr)
*** 147,154 ****
        goto maybe_fold;
  
      case VECTOR_TYPE:
!       ret = convert_to_vector (type, e);
!       goto maybe_fold;
  
      case RECORD_TYPE:
      case UNION_TYPE:
--- 147,166 ----
        goto maybe_fold;
  
      case VECTOR_TYPE:
!       if (gnu_vector_type_p (type)
! 	  || gnu_vector_type_p (TREE_TYPE (e))
! 	  /* Allow conversions between compatible non-GNU vector types
! 	     when -flax-vector-conversions is passed.  The whole purpose
! 	     of the option is to bend the normal type rules and accept
! 	     nonconforming code.  */
! 	  || (flag_lax_vector_conversions
! 	      && VECTOR_TYPE_P (TREE_TYPE (e))
! 	      && vector_types_convertible_p (type, TREE_TYPE (e), false)))
! 	{
! 	  ret = convert_to_vector (type, e);
! 	  goto maybe_fold;
! 	}
!       break;
  
      case RECORD_TYPE:
      case UNION_TYPE:
diff -Nrcpad gcc-9.3.0/gcc/c/c-decl.c gcc-10.1.0/gcc/c/c-decl.c
*** gcc-9.3.0/gcc/c/c-decl.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/c-decl.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Process declarations and variables for C compiler.
!    Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Process declarations and variables for C compiler.
!    Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** typedef struct c_binding *c_binding_ptr;
*** 574,581 ****
  /* Information that we keep for a struct or union while it is being
     parsed.  */
  
! struct c_struct_parse_info
  {
    /* If warn_cxx_compat, a list of types defined within this
       struct.  */
    auto_vec<tree> struct_types;
--- 574,582 ----
  /* Information that we keep for a struct or union while it is being
     parsed.  */
  
! class c_struct_parse_info
  {
+ public:
    /* If warn_cxx_compat, a list of types defined within this
       struct.  */
    auto_vec<tree> struct_types;
*************** struct c_struct_parse_info
*** 591,597 ****
  
  /* Information for the struct or union currently being parsed, or
     NULL if not parsing a struct or union.  */
! static struct c_struct_parse_info *struct_parse_info;
  
  /* Forward declarations.  */
  static tree lookup_name_in_scope (tree, struct c_scope *);
--- 592,598 ----
  
  /* Information for the struct or union currently being parsed, or
     NULL if not parsing a struct or union.  */
! static class c_struct_parse_info *struct_parse_info;
  
  /* Forward declarations.  */
  static tree lookup_name_in_scope (tree, struct c_scope *);
*************** static tree grokparms (struct c_arg_info
*** 604,610 ****
  static void layout_array_type (tree);
  static void warn_defaults_to (location_t, int, const char *, ...)
      ATTRIBUTE_GCC_DIAG(3,4);
! static const char *header_for_builtin_fn (enum built_in_function);
  
  /* T is a statement.  Add it to the statement-tree.  This is the
     C/ObjC version--C++ has a slightly different version of this
--- 605,611 ----
  static void layout_array_type (tree);
  static void warn_defaults_to (location_t, int, const char *, ...)
      ATTRIBUTE_GCC_DIAG(3,4);
! static const char *header_for_builtin_fn (tree);
  
  /* T is a statement.  Add it to the statement-tree.  This is the
     C/ObjC version--C++ has a slightly different version of this
*************** c_bind (location_t loc, tree decl, bool
*** 1640,1652 ****
  }
  
  
! /* Stores the first FILE*, const struct tm* etc. argument type (whatever it
!    is) seen in a declaration of a file I/O etc. built-in.  Subsequent
!    declarations of such built-ins are expected to refer to it rather than to
!    fileptr_type_node etc. which is just void* (or to any other type).
     Used only by match_builtin_function_types.  */
  
! static GTY(()) tree last_structptr_types[6];
  
  /* Subroutine of compare_decls.  Allow harmless mismatches in return
     and argument types provided that the type modes match.  Set *STRICT
--- 1641,1669 ----
  }
  
  
! /* Stores the first FILE*, const struct tm* etc. argument type (whatever
!    it is) seen in a declaration of a file I/O etc. built-in, corresponding
!    to the builtin_structptr_types array.  Subsequent declarations of such
!    built-ins are expected to refer to it rather than to fileptr_type_node,
!    etc. which is just void* (or to any other type).
     Used only by match_builtin_function_types.  */
  
! static const unsigned builtin_structptr_type_count
!   = sizeof builtin_structptr_types / sizeof builtin_structptr_types[0];
! 
! static GTY(()) tree last_structptr_types[builtin_structptr_type_count];
! 
! /* Returns true if types T1 and T2 representing return types or types
!    of function arguments are close enough to be considered interchangeable
!    in redeclarations of built-in functions.  */
! 
! static bool
! types_close_enough_to_match (tree t1, tree t2)
! {
!   return (TYPE_MODE (t1) == TYPE_MODE (t2)
! 	  && POINTER_TYPE_P (t1) == POINTER_TYPE_P (t2)
! 	  && FUNCTION_POINTER_TYPE_P (t1) == FUNCTION_POINTER_TYPE_P (t2));
! }
  
  /* Subroutine of compare_decls.  Allow harmless mismatches in return
     and argument types provided that the type modes match.  Set *STRICT
*************** static tree
*** 1658,1673 ****
  match_builtin_function_types (tree newtype, tree oldtype,
  			      tree *strict, unsigned *argno)
  {
-   /* Accept the return type of the new declaration if same modes.  */
-   tree oldrettype = TREE_TYPE (oldtype);
-   tree newrettype = TREE_TYPE (newtype);
- 
    *argno = 0;
    *strict = NULL_TREE;
  
!   if (TYPE_MODE (oldrettype) != TYPE_MODE (newrettype))
      return NULL_TREE;
  
    if (!comptypes (TYPE_MAIN_VARIANT (oldrettype),
  		  TYPE_MAIN_VARIANT (newrettype)))
      *strict = oldrettype;
--- 1675,1693 ----
  match_builtin_function_types (tree newtype, tree oldtype,
  			      tree *strict, unsigned *argno)
  {
    *argno = 0;
    *strict = NULL_TREE;
  
!   /* Accept the return type of the new declaration if it has the same
!      mode and if they're both pointers or if neither is.  */
!   tree oldrettype = TREE_TYPE (oldtype);
!   tree newrettype = TREE_TYPE (newtype);
! 
!   if (!types_close_enough_to_match (oldrettype, newrettype))
      return NULL_TREE;
  
+   /* Check that the return types are compatible but don't fail if they
+      are not (e.g., int vs long in ILP32) and just let the caller know.  */
    if (!comptypes (TYPE_MAIN_VARIANT (oldrettype),
  		  TYPE_MAIN_VARIANT (newrettype)))
      *strict = oldrettype;
*************** match_builtin_function_types (tree newty
*** 1676,1685 ****
    tree newargs = TYPE_ARG_TYPES (newtype);
    tree tryargs = newargs;
  
!   gcc_checking_assert ((sizeof (last_structptr_types)
! 			/ sizeof (last_structptr_types[0]))
! 		       == (sizeof (builtin_structptr_types)
! 			   / sizeof (builtin_structptr_types[0])));
    for (unsigned i = 1; oldargs || newargs; ++i)
      {
        if (!oldargs
--- 1696,1708 ----
    tree newargs = TYPE_ARG_TYPES (newtype);
    tree tryargs = newargs;
  
!   const unsigned nlst
!     = sizeof last_structptr_types / sizeof last_structptr_types[0];
!   const unsigned nbst
!     = sizeof builtin_structptr_types / sizeof builtin_structptr_types[0];
! 
!   gcc_checking_assert (nlst == nbst);
! 
    for (unsigned i = 1; oldargs || newargs; ++i)
      {
        if (!oldargs
*************** match_builtin_function_types (tree newty
*** 1691,1712 ****
        tree oldtype = TYPE_MAIN_VARIANT (TREE_VALUE (oldargs));
        tree newtype = TYPE_MAIN_VARIANT (TREE_VALUE (newargs));
  
!       /* Fail for types with incompatible modes/sizes.  */
!       if (TYPE_MODE (TREE_VALUE (oldargs))
! 	  != TYPE_MODE (TREE_VALUE (newargs)))
! 	return NULL_TREE;
! 
!       /* Fail for function and object pointer mismatches.  */
!       if ((FUNCTION_POINTER_TYPE_P (oldtype)
! 	   != FUNCTION_POINTER_TYPE_P (newtype))
! 	  || POINTER_TYPE_P (oldtype) != POINTER_TYPE_P (newtype))
  	return NULL_TREE;
  
!       unsigned j = (sizeof (builtin_structptr_types)
! 		    / sizeof (builtin_structptr_types[0]));
        if (POINTER_TYPE_P (oldtype))
! 	for (j = 0; j < (sizeof (builtin_structptr_types)
! 			 / sizeof (builtin_structptr_types[0])); ++j)
  	  {
  	    if (TREE_VALUE (oldargs) != builtin_structptr_types[j].node)
  	      continue;
--- 1714,1728 ----
        tree oldtype = TYPE_MAIN_VARIANT (TREE_VALUE (oldargs));
        tree newtype = TYPE_MAIN_VARIANT (TREE_VALUE (newargs));
  
!       if (!types_close_enough_to_match (oldtype, newtype))
  	return NULL_TREE;
  
!       unsigned j = nbst;
        if (POINTER_TYPE_P (oldtype))
! 	/* Iterate over well-known struct types like FILE (whose types
! 	   aren't known to us) and compare the pointer to each to
! 	   the pointer argument.  */
! 	for (j = 0; j < nbst; ++j)
  	  {
  	    if (TREE_VALUE (oldargs) != builtin_structptr_types[j].node)
  	      continue;
*************** match_builtin_function_types (tree newty
*** 1726,1738 ****
  	      last_structptr_types[j] = newtype;
  	    break;
  	  }
!       if (j == (sizeof (builtin_structptr_types)
! 		/ sizeof (builtin_structptr_types[0]))
! 	  && !*strict
! 	  && !comptypes (oldtype, newtype))
  	{
! 	  *argno = i;
! 	  *strict = oldtype;
  	}
  
        oldargs = TREE_CHAIN (oldargs);
--- 1742,1767 ----
  	      last_structptr_types[j] = newtype;
  	    break;
  	  }
! 
!       if (j == nbst && !comptypes (oldtype, newtype))
  	{
! 	  if (POINTER_TYPE_P (oldtype))
! 	    {
! 	      /* For incompatible pointers, only reject differences in
! 		 the unqualified variants of the referenced types but
! 		 consider differences in qualifiers as benign (report
! 		 those to caller via *STRICT below).  */
! 	      tree oldref = TYPE_MAIN_VARIANT (TREE_TYPE (oldtype));
! 	      tree newref = TYPE_MAIN_VARIANT (TREE_TYPE (newtype));
! 	      if (!comptypes (oldref, newref))
! 		return NULL_TREE;
! 	    }
! 
! 	  if (!*strict)
! 	    {
! 	      *argno = i;
! 	      *strict = oldtype;
! 	    }
  	}
  
        oldargs = TREE_CHAIN (oldargs);
*************** diagnose_arglist_conflict (tree newdecl,
*** 1780,1794 ****
        if (TREE_CHAIN (t) == NULL_TREE
  	  && TYPE_MAIN_VARIANT (type) != void_type_node)
  	{
! 	  inform (input_location, "a parameter list with an ellipsis can%'t match "
! 		  "an empty parameter name list declaration");
  	  break;
  	}
  
        if (c_type_promotes_to (type) != type)
  	{
! 	  inform (input_location, "an argument type that has a default promotion can%'t match "
! 		  "an empty parameter name list declaration");
  	  break;
  	}
      }
--- 1809,1824 ----
        if (TREE_CHAIN (t) == NULL_TREE
  	  && TYPE_MAIN_VARIANT (type) != void_type_node)
  	{
! 	  inform (input_location, "a parameter list with an ellipsis "
! 		  "cannot match an empty parameter name list declaration");
  	  break;
  	}
  
        if (c_type_promotes_to (type) != type)
  	{
! 	  inform (input_location, "an argument type that has a default "
! 		  "promotion cannot match an empty parameter name list "
! 		  "declaration");
  	  break;
  	}
      }
*************** diagnose_mismatched_decls (tree newdecl,
*** 1951,1964 ****
    if (!comptypes (oldtype, newtype))
      {
        if (TREE_CODE (olddecl) == FUNCTION_DECL
! 	  && fndecl_built_in_p (olddecl) && !C_DECL_DECLARED_BUILTIN (olddecl))
  	{
  	  /* Accept "harmless" mismatches in function types such
! 	     as missing qualifiers or pointer vs same size integer
! 	     mismatches.  This is for the ffs and fprintf builtins.
! 	     However, with -Wextra in effect, diagnose return and
! 	     argument types that are incompatible according to
! 	     language rules.  */
  	  tree mismatch_expect;
  	  unsigned mismatch_argno;
  
--- 1981,1993 ----
    if (!comptypes (oldtype, newtype))
      {
        if (TREE_CODE (olddecl) == FUNCTION_DECL
! 	  && fndecl_built_in_p (olddecl, BUILT_IN_NORMAL)
! 	  && !C_DECL_DECLARED_BUILTIN (olddecl))
  	{
  	  /* Accept "harmless" mismatches in function types such
! 	     as missing qualifiers or int vs long when they're the same
! 	     size.  However, diagnose return and argument types that are
! 	     incompatible according to language rules.  */
  	  tree mismatch_expect;
  	  unsigned mismatch_argno;
  
*************** diagnose_mismatched_decls (tree newdecl,
*** 1973,1980 ****
  	      /* If types don't match for a built-in, throw away the
  		 built-in.  No point in calling locate_old_decl here, it
  		 won't print anything.  */
! 	      const char *header
! 		= header_for_builtin_fn (DECL_FUNCTION_CODE (olddecl));
  	      location_t loc = DECL_SOURCE_LOCATION (newdecl);
  	      if (warning_at (loc, OPT_Wbuiltin_declaration_mismatch,
  			      "conflicting types for built-in function %q+D; "
--- 2002,2008 ----
  	      /* If types don't match for a built-in, throw away the
  		 built-in.  No point in calling locate_old_decl here, it
  		 won't print anything.  */
! 	      const char *header = header_for_builtin_fn (olddecl);
  	      location_t loc = DECL_SOURCE_LOCATION (newdecl);
  	      if (warning_at (loc, OPT_Wbuiltin_declaration_mismatch,
  			      "conflicting types for built-in function %q+D; "
*************** diagnose_mismatched_decls (tree newdecl,
*** 1994,2012 ****
  
  	  if (mismatch_expect && extra_warnings)
  	    {
- 	      /* If types match only loosely, print a warning but accept
- 		 the redeclaration.  */
  	      location_t newloc = DECL_SOURCE_LOCATION (newdecl);
  	      if (mismatch_argno)
! 		warning_at (newloc, OPT_Wbuiltin_declaration_mismatch,
! 			    "mismatch in argument %u type of built-in "
! 			    "function %qD; expected %qT",
! 			    mismatch_argno, newdecl, mismatch_expect);
  	      else
! 		warning_at (newloc, OPT_Wbuiltin_declaration_mismatch,
! 			    "mismatch in return type of built-in "
! 			    "function %qD; expected %qT",
! 			    newdecl, mismatch_expect);
  	    }
  	}
        else if (TREE_CODE (olddecl) == FUNCTION_DECL
--- 2022,2047 ----
  
  	  if (mismatch_expect && extra_warnings)
  	    {
  	      location_t newloc = DECL_SOURCE_LOCATION (newdecl);
+ 	      bool warned = false;
  	      if (mismatch_argno)
! 		warned = warning_at (newloc, OPT_Wbuiltin_declaration_mismatch,
! 				     "mismatch in argument %u type of built-in "
! 				     "function %qD; expected %qT",
! 				     mismatch_argno, newdecl, mismatch_expect);
  	      else
! 		warned = warning_at (newloc, OPT_Wbuiltin_declaration_mismatch,
! 				     "mismatch in return type of built-in "
! 				     "function %qD; expected %qT",
! 				     newdecl, mismatch_expect);
! 	      const char *header = header_for_builtin_fn (olddecl);
! 	      if (warned && header)
! 		{
! 		  rich_location richloc (line_table, newloc);
! 		  maybe_add_include_fixit (&richloc, header, true);
! 		  inform (&richloc,
! 			  "%qD is declared in header %qs", olddecl, header);
! 		}
  	    }
  	}
        else if (TREE_CODE (olddecl) == FUNCTION_DECL
*************** merge_decls (tree newdecl, tree olddecl,
*** 2637,2643 ****
  	    |= DECL_NO_INSTRUMENT_FUNCTION_ENTRY_EXIT (olddecl);
  	  TREE_THIS_VOLATILE (newdecl) |= TREE_THIS_VOLATILE (olddecl);
  	  DECL_IS_MALLOC (newdecl) |= DECL_IS_MALLOC (olddecl);
! 	  DECL_IS_OPERATOR_NEW (newdecl) |= DECL_IS_OPERATOR_NEW (olddecl);
  	  TREE_READONLY (newdecl) |= TREE_READONLY (olddecl);
  	  DECL_PURE_P (newdecl) |= DECL_PURE_P (olddecl);
  	  DECL_IS_NOVOPS (newdecl) |= DECL_IS_NOVOPS (olddecl);
--- 2672,2681 ----
  	    |= DECL_NO_INSTRUMENT_FUNCTION_ENTRY_EXIT (olddecl);
  	  TREE_THIS_VOLATILE (newdecl) |= TREE_THIS_VOLATILE (olddecl);
  	  DECL_IS_MALLOC (newdecl) |= DECL_IS_MALLOC (olddecl);
! 	  if (DECL_IS_OPERATOR_NEW_P (olddecl))
! 	    DECL_SET_IS_OPERATOR_NEW (newdecl, true);
! 	  if (DECL_IS_OPERATOR_DELETE_P (olddecl))
! 	    DECL_SET_IS_OPERATOR_DELETE (newdecl, true);
  	  TREE_READONLY (newdecl) |= TREE_READONLY (olddecl);
  	  DECL_PURE_P (newdecl) |= DECL_PURE_P (olddecl);
  	  DECL_IS_NOVOPS (newdecl) |= DECL_IS_NOVOPS (olddecl);
*************** merge_decls (tree newdecl, tree olddecl,
*** 2731,2738 ****
  	{
  	  /* If redeclaring a builtin function, it stays built in.
  	     But it gets tagged as having been declared.  */
! 	  DECL_BUILT_IN_CLASS (newdecl) = DECL_BUILT_IN_CLASS (olddecl);
! 	  DECL_FUNCTION_CODE (newdecl) = DECL_FUNCTION_CODE (olddecl);
  	  C_DECL_DECLARED_BUILTIN (newdecl) = 1;
  	  if (new_is_prototype)
  	    {
--- 2769,2775 ----
  	{
  	  /* If redeclaring a builtin function, it stays built in.
  	     But it gets tagged as having been declared.  */
! 	  copy_decl_built_in_function (newdecl, olddecl);
  	  C_DECL_DECLARED_BUILTIN (newdecl) = 1;
  	  if (new_is_prototype)
  	    {
*************** pushdecl (tree x)
*** 3126,3133 ****
       detecting duplicate declarations of the same object, no matter
       what scope they are in; this is what we do here.  (C99 6.2.7p2:
       All declarations that refer to the same object or function shall
!      have compatible type; otherwise, the behavior is undefined.)  */
!   if (DECL_EXTERNAL (x) || scope == file_scope)
      {
        tree type = TREE_TYPE (x);
        tree vistype = NULL_TREE;
--- 3163,3173 ----
       detecting duplicate declarations of the same object, no matter
       what scope they are in; this is what we do here.  (C99 6.2.7p2:
       All declarations that refer to the same object or function shall
!      have compatible type; otherwise, the behavior is undefined.)
!      However, in Objective-C, we also want to detect declarations
!      conflicting with those of the basic types.  */
!   if ((DECL_EXTERNAL (x) || scope == file_scope)
!       && (VAR_OR_FUNCTION_DECL_P (x) || c_dialect_objc ()))
      {
        tree type = TREE_TYPE (x);
        tree vistype = NULL_TREE;
*************** pushdecl (tree x)
*** 3272,3278 ****
  	element = TREE_TYPE (element);
        element = TYPE_MAIN_VARIANT (element);
  
!       if (RECORD_OR_UNION_TYPE_P (element)
  	  && (TREE_CODE (x) != TYPE_DECL
  	      || TREE_CODE (TREE_TYPE (x)) == ARRAY_TYPE)
  	  && !COMPLETE_TYPE_P (element))
--- 3312,3319 ----
  	element = TREE_TYPE (element);
        element = TYPE_MAIN_VARIANT (element);
  
!       if ((RECORD_OR_UNION_TYPE_P (element)
! 	   || TREE_CODE (element) == ENUMERAL_TYPE)
  	  && (TREE_CODE (x) != TYPE_DECL
  	      || TREE_CODE (TREE_TYPE (x)) == ARRAY_TYPE)
  	  && !COMPLETE_TYPE_P (element))
*************** implicit_decl_warning (location_t loc, t
*** 3334,3346 ****
      hint.suppress ();
  }
  
! /* This function represents mapping of a function code FCODE
!    to its respective header.  */
  
  static const char *
! header_for_builtin_fn (enum built_in_function fcode)
  {
!   switch (fcode)
      {
      CASE_FLT_FN (BUILT_IN_ACOS):
      CASE_FLT_FN (BUILT_IN_ACOSH):
--- 3375,3391 ----
      hint.suppress ();
  }
  
! /* Return the name of the header file that declares built-in function
!    FNDECL, or null if either we don't know or don't expect to see an
!    explicit declaration.  */
  
  static const char *
! header_for_builtin_fn (tree fndecl)
  {
!   if (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_NORMAL)
!     return NULL;
! 
!   switch (DECL_FUNCTION_CODE (fndecl))
      {
      CASE_FLT_FN (BUILT_IN_ACOS):
      CASE_FLT_FN (BUILT_IN_ACOSH):
*************** implicitly_declare (location_t loc, tree
*** 3590,3597 ****
  					    "declaration of built-in "
  					    "function %qD", decl);
  		  /* See if we can hint which header to include.  */
! 		  const char *header
! 		    = header_for_builtin_fn (DECL_FUNCTION_CODE (decl));
  		  if (header != NULL && warned)
  		    {
  		      rich_location richloc (line_table, loc);
--- 3635,3641 ----
  					    "declaration of built-in "
  					    "function %qD", decl);
  		  /* See if we can hint which header to include.  */
! 		  const char *header = header_for_builtin_fn (decl);
  		  if (header != NULL && warned)
  		    {
  		      rich_location richloc (line_table, loc);
*************** lookup_name_fuzzy (tree name, enum looku
*** 4326,4331 ****
--- 4370,4389 ----
  }
  
  
+ /* Table of supported standard (C2x) attributes.  */
+ const struct attribute_spec std_attribute_table[] =
+ {
+   /* { name, min_len, max_len, decl_req, type_req, fn_type_req,
+        affects_type_identity, handler, exclude } */
+   { "deprecated", 0, 1, false, false, false, false,
+     handle_deprecated_attribute, NULL },
+   { "fallthrough", 0, 0, false, false, false, false,
+     handle_fallthrough_attribute, NULL },
+   { "maybe_unused", 0, 0, false, false, false, false,
+     handle_unused_attribute, NULL },
+   { NULL, 0, 0, false, false, false, false, NULL, NULL }
+ };
+ 
  /* Create the predefined scalar types of C,
     and some nodes representing standard constants (0, 1, (void *) 0).
     Initialize the global scope.
*************** c_init_decl_processing (void)
*** 4339,4344 ****
--- 4397,4404 ----
    /* Initialize reserved words for parser.  */
    c_parse_init ();
  
+   register_scoped_attributes (std_attribute_table, NULL);
+ 
    current_function_decl = NULL_TREE;
  
    gcc_obstack_init (&parser_obstack);
*************** c_builtin_function_ext_scope (tree decl)
*** 4471,4476 ****
--- 4531,4584 ----
  
    return decl;
  }
+ 
+ /* Implement LANG_HOOKS_SIMULATE_BUILTIN_FUNCTION_DECL.  */
+ 
+ tree
+ c_simulate_builtin_function_decl (tree decl)
+ {
+   tree type = TREE_TYPE (decl);
+   C_DECL_BUILTIN_PROTOTYPE (decl) = prototype_p (type);
+   return pushdecl (decl);
+ }
+ 
+ /* Warn about attributes in a context where they are unused
+    (attribute-declarations, except for the "fallthrough" case, and
+    attributes on statements).  */
+ 
+ void
+ c_warn_unused_attributes (tree attrs)
+ {
+   for (tree t = attrs; t != NULL_TREE; t = TREE_CHAIN (t))
+     if (get_attribute_namespace (t) == NULL_TREE)
+       /* The specifications of standard attributes mean this is a
+ 	 constraint violation.  */
+       pedwarn (input_location, OPT_Wattributes, "%qE attribute ignored",
+ 	       get_attribute_name (t));
+     else
+       warning (OPT_Wattributes, "%qE attribute ignored",
+ 	       get_attribute_name (t));
+ }
+ 
+ /* Warn for standard attributes being applied to a type that is not
+    being defined, where that is a constraint violation, and return a
+    list of attributes with them removed.  */
+ 
+ tree
+ c_warn_type_attributes (tree attrs)
+ {
+   tree *attr_ptr = &attrs;
+   while (*attr_ptr)
+     if (get_attribute_namespace (*attr_ptr) == NULL_TREE)
+       {
+ 	pedwarn (input_location, OPT_Wattributes, "%qE attribute ignored",
+ 		 get_attribute_name (*attr_ptr));
+ 	*attr_ptr = TREE_CHAIN (*attr_ptr);
+       }
+     else
+       attr_ptr = &TREE_CHAIN (*attr_ptr);
+   return attrs;
+ }
  
  /* Called when a declaration is seen that contains no names to declare.
     If its type is a reference to a structure, union or enum inherited
*************** shadow_tag_warned (const struct c_declsp
*** 4525,4530 ****
--- 4633,4639 ----
  	    }
  	  else if (declspecs->typespec_kind != ctsk_tagdef
                     && declspecs->typespec_kind != ctsk_tagfirstref
+ 		   && declspecs->typespec_kind != ctsk_tagfirstref_attrs
  		   && declspecs->storage_class != csc_none)
  	    {
  	      if (warned != 1)
*************** shadow_tag_warned (const struct c_declsp
*** 4536,4541 ****
--- 4645,4651 ----
  	    }
  	  else if (declspecs->typespec_kind != ctsk_tagdef
                     && declspecs->typespec_kind != ctsk_tagfirstref
+                    && declspecs->typespec_kind != ctsk_tagfirstref_attrs
  		   && (declspecs->const_p
  		       || declspecs->volatile_p
  		       || declspecs->atomic_p
*************** shadow_tag_warned (const struct c_declsp
*** 4551,4556 ****
--- 4661,4667 ----
  	    }
  	  else if (declspecs->typespec_kind != ctsk_tagdef
                     && declspecs->typespec_kind != ctsk_tagfirstref
+                    && declspecs->typespec_kind != ctsk_tagfirstref_attrs
  		   && declspecs->alignas_p)
  	    {
  	      if (warned != 1)
*************** shadow_tag_warned (const struct c_declsp
*** 4648,4656 ****
        warned = 2;
      }
  
    if (warned != 1)
      {
!       if (!found_tag)
  	pedwarn (input_location, 0, "empty declaration");
      }
  }
--- 4759,4792 ----
        warned = 2;
      }
  
+   if (found_tag
+       && warned == 2
+       && (declspecs->typespec_kind == ctsk_tagref_attrs
+ 	  || declspecs->typespec_kind == ctsk_tagfirstref_attrs))
+     {
+       /* Standard attributes after the "struct" or "union" keyword are
+ 	 only permitted when the contents of the type are defined, or
+ 	 in the form "struct-or-union attribute-specifier-sequence
+ 	 identifier;".  If the ';' was not present, attributes were
+ 	 diagnosed in the parser.  Here, ensure that any other useless
+ 	 elements of the declaration result in a pedwarn, not just a
+ 	 warning.  Forward declarations of enum types are not part of
+ 	 standard C, but handle them the same.  */
+       pedwarn (input_location, 0,
+ 	       "invalid use of attributes in empty declaration");
+       warned = 1;
+     }
+ 
    if (warned != 1)
      {
!       if (declspecs->declspecs_seen_p
! 	  && !declspecs->non_std_attrs_seen_p)
! 	/* An attribute declaration (but not a fallthrough attribute
! 	   declaration, which was handled separately); warn if there
! 	   are any attributes being ignored (but not if the attributes
! 	   were empty).  */
! 	c_warn_unused_attributes (declspecs->attrs);
!       else if (!found_tag)
  	pedwarn (input_location, 0, "empty declaration");
      }
  }
*************** groktypename (struct c_type_name *type_n
*** 4801,4806 ****
--- 4937,4943 ----
  			 DEPRECATED_NORMAL);
  
    /* Apply attributes.  */
+   attrs = c_warn_type_attributes (attrs);
    decl_attributes (&type, attrs, 0);
  
    return type;
*************** c_decl_attributes (tree *node, tree attr
*** 4822,4829 ****
  	attributes = tree_cons (get_identifier ("omp declare target implicit"),
  				NULL_TREE, attributes);
        else
! 	attributes = tree_cons (get_identifier ("omp declare target"),
! 				NULL_TREE, attributes);
      }
  
    /* Look up the current declaration with all the attributes merged
--- 4959,4970 ----
  	attributes = tree_cons (get_identifier ("omp declare target implicit"),
  				NULL_TREE, attributes);
        else
! 	{
! 	  attributes = tree_cons (get_identifier ("omp declare target"),
! 				  NULL_TREE, attributes);
! 	  attributes = tree_cons (get_identifier ("omp declare target block"),
! 				  NULL_TREE, attributes);
! 	}
      }
  
    /* Look up the current declaration with all the attributes merged
*************** start_decl (struct c_declarator *declara
*** 4887,4893 ****
      switch (TREE_CODE (decl))
        {
        case TYPE_DECL:
! 	error ("typedef %qD is initialized (use __typeof__ instead)", decl);
  	initialized = false;
  	break;
  
--- 5028,5034 ----
      switch (TREE_CODE (decl))
        {
        case TYPE_DECL:
! 	error ("typedef %qD is initialized (use %<__typeof__%> instead)", decl);
  	initialized = false;
  	break;
  
*************** start_decl (struct c_declarator *declara
*** 4914,4920 ****
  	  {
  	    /* A complete type is ok if size is fixed.  */
  
! 	    if (TREE_CODE (TYPE_SIZE (TREE_TYPE (decl))) != INTEGER_CST
  		|| C_DECL_VARIABLE_SIZE (decl))
  	      {
  		error ("variable-sized object may not be initialized");
--- 5055,5061 ----
  	  {
  	    /* A complete type is ok if size is fixed.  */
  
! 	    if (!poly_int_tree_p (TYPE_SIZE (TREE_TYPE (decl)))
  		|| C_DECL_VARIABLE_SIZE (decl))
  	      {
  		error ("variable-sized object may not be initialized");
*************** start_decl (struct c_declarator *declara
*** 5012,5019 ****
        && DECL_DECLARED_INLINE_P (decl)
        && DECL_UNINLINABLE (decl)
        && lookup_attribute ("noinline", DECL_ATTRIBUTES (decl)))
!     warning (OPT_Wattributes, "inline function %q+D given attribute noinline",
! 	     decl);
  
    /* C99 6.7.4p3: An inline definition of a function with external
       linkage shall not contain a definition of a modifiable object
--- 5153,5160 ----
        && DECL_DECLARED_INLINE_P (decl)
        && DECL_UNINLINABLE (decl)
        && lookup_attribute ("noinline", DECL_ATTRIBUTES (decl)))
!     warning (OPT_Wattributes, "inline function %q+D given attribute %qs",
! 	     decl, "noinline");
  
    /* C99 6.7.4p3: An inline definition of a function with external
       linkage shall not contain a definition of a modifiable object
*************** finish_decl (tree decl, location_t init_
*** 5197,5202 ****
--- 5338,5352 ----
  
        complete_flexible_array_elts (DECL_INITIAL (decl));
  
+       if (is_global_var (decl))
+ 	{
+ 	  type_context_kind context = (DECL_THREAD_LOCAL_P (decl)
+ 				       ? TCTX_THREAD_STORAGE
+ 				       : TCTX_STATIC_STORAGE);
+ 	  if (!verify_type_context (input_location, context, TREE_TYPE (decl)))
+ 	    TREE_TYPE (decl) = error_mark_node;
+ 	}
+ 
        if (DECL_SIZE (decl) == NULL_TREE && TREE_TYPE (decl) != error_mark_node
  	  && COMPLETE_TYPE_P (TREE_TYPE (decl)))
  	layout_decl (decl, 0);
*************** finish_decl (tree decl, location_t init_
*** 5226,5232 ****
  	  && TREE_STATIC (decl))
  	incomplete_record_decls.safe_push (decl);
  
!       if (is_global_var (decl) && DECL_SIZE (decl) != NULL_TREE)
  	{
  	  if (TREE_CODE (DECL_SIZE (decl)) == INTEGER_CST)
  	    constant_expression_warning (DECL_SIZE (decl));
--- 5376,5384 ----
  	  && TREE_STATIC (decl))
  	incomplete_record_decls.safe_push (decl);
  
!       if (is_global_var (decl)
! 	  && DECL_SIZE (decl) != NULL_TREE
! 	  && TREE_TYPE (decl) != error_mark_node)
  	{
  	  if (TREE_CODE (DECL_SIZE (decl)) == INTEGER_CST)
  	    constant_expression_warning (DECL_SIZE (decl));
*************** finish_decl (tree decl, location_t init_
*** 5282,5288 ****
  	      && VAR_P (decl)
  	      && !C_DECL_REGISTER (decl)
  	      && !TREE_STATIC (decl))
! 	    warning (0, "ignoring asm-specifier for non-static local "
  		     "variable %q+D", decl);
  	  else
  	    set_user_assembler_name (decl, asmspec);
--- 5434,5440 ----
  	      && VAR_P (decl)
  	      && !C_DECL_REGISTER (decl)
  	      && !TREE_STATIC (decl))
! 	    warning (0, "ignoring %<asm%> specifier for non-static local "
  		     "variable %q+D", decl);
  	  else
  	    set_user_assembler_name (decl, asmspec);
*************** finish_decl (tree decl, location_t init_
*** 5398,5404 ****
        type = strip_array_types (type);
        if (TREE_READONLY (decl))
  	warning_at (DECL_SOURCE_LOCATION (decl), OPT_Wc___compat,
! 		    "uninitialized const %qD is invalid in C++", decl);
        else if (RECORD_OR_UNION_TYPE_P (type)
  	       && C_TYPE_FIELDS_READONLY (type))
  	diagnose_uninitialized_cst_member (decl, type);
--- 5550,5556 ----
        type = strip_array_types (type);
        if (TREE_READONLY (decl))
  	warning_at (DECL_SOURCE_LOCATION (decl), OPT_Wc___compat,
! 		    "uninitialized %<const %D%> is invalid in C++", decl);
        else if (RECORD_OR_UNION_TYPE_P (type)
  	       && C_TYPE_FIELDS_READONLY (type))
  	diagnose_uninitialized_cst_member (decl, type);
*************** build_compound_literal (location_t loc,
*** 5546,5551 ****
--- 5698,5707 ----
        return error_mark_node;
      }
  
+   if (TREE_STATIC (decl)
+       && !verify_type_context (loc, TCTX_STATIC_STORAGE, type))
+     return error_mark_node;
+ 
    stmt = build_stmt (DECL_SOURCE_LOCATION (decl), DECL_EXPR, decl);
    complit = build1 (COMPOUND_LITERAL_EXPR, type, stmt);
    TREE_SIDE_EFFECTS (complit) = 1;
*************** check_compound_literal_type (location_t
*** 5581,5587 ****
  {
    if (warn_cxx_compat
        && (type_name->specs->typespec_kind == ctsk_tagdef
!           || type_name->specs->typespec_kind == ctsk_tagfirstref))
      warning_at (loc, OPT_Wc___compat,
  		"defining a type in a compound literal is invalid in C++");
  }
--- 5737,5744 ----
  {
    if (warn_cxx_compat
        && (type_name->specs->typespec_kind == ctsk_tagdef
!           || type_name->specs->typespec_kind == ctsk_tagfirstref
! 	  || type_name->specs->typespec_kind == ctsk_tagfirstref_attrs))
      warning_at (loc, OPT_Wc___compat,
  		"defining a type in a compound literal is invalid in C++");
  }
*************** warn_variable_length_array (tree name, t
*** 5692,5701 ****
        if (name)
  	pedwarn_c90 (input_location, OPT_Wvla,
  		     "ISO C90 forbids array %qE whose size "
! 		     "can%'t be evaluated", name);
        else
  	pedwarn_c90 (input_location, OPT_Wvla, "ISO C90 forbids array "
! 		     "whose size can%'t be evaluated");
      }
    else
      {
--- 5849,5858 ----
        if (name)
  	pedwarn_c90 (input_location, OPT_Wvla,
  		     "ISO C90 forbids array %qE whose size "
! 		     "cannot be evaluated", name);
        else
  	pedwarn_c90 (input_location, OPT_Wvla, "ISO C90 forbids array "
! 		     "whose size cannot be evaluated");
      }
    else
      {
*************** grokdeclarator (const struct c_declarato
*** 5810,5815 ****
--- 5967,5973 ----
    bool array_parm_static = false;
    bool array_parm_vla_unspec_p = false;
    tree returned_attrs = NULL_TREE;
+   tree decl_id_attrs = NULL_TREE;
    bool bitfield = width != NULL;
    tree element_type;
    tree orig_qual_type = NULL;
*************** grokdeclarator (const struct c_declarato
*** 5872,5879 ****
  
  	case cdk_id:
  	  loc = decl->id_loc;
! 	  if (decl->u.id)
! 	    name = decl->u.id;
  	  if (first_non_attr_kind == cdk_attrs)
  	    first_non_attr_kind = decl->kind;
  	  decl = 0;
--- 6030,6038 ----
  
  	case cdk_id:
  	  loc = decl->id_loc;
! 	  if (decl->u.id.id)
! 	    name = decl->u.id.id;
! 	  decl_id_attrs = decl->u.id.attrs;
  	  if (first_non_attr_kind == cdk_attrs)
  	    first_non_attr_kind = decl->kind;
  	  decl = 0;
*************** grokdeclarator (const struct c_declarato
*** 6153,6167 ****
  	    const struct c_declarator *inner_decl;
  	    int attr_flags = 0;
  	    declarator = declarator->declarator;
  	    inner_decl = declarator;
  	    while (inner_decl->kind == cdk_attrs)
  	      inner_decl = inner_decl->declarator;
! 	    if (inner_decl->kind == cdk_id)
! 	      attr_flags |= (int) ATTR_FLAG_DECL_NEXT;
! 	    else if (inner_decl->kind == cdk_function)
! 	      attr_flags |= (int) ATTR_FLAG_FUNCTION_NEXT;
! 	    else if (inner_decl->kind == cdk_array)
! 	      attr_flags |= (int) ATTR_FLAG_ARRAY_NEXT;
  	    returned_attrs = decl_attributes (&type,
  					      chainon (returned_attrs, attrs),
  					      attr_flags);
--- 6312,6339 ----
  	    const struct c_declarator *inner_decl;
  	    int attr_flags = 0;
  	    declarator = declarator->declarator;
+ 	    /* Standard attribute syntax precisely defines what entity
+ 	       an attribute in each position appertains to, so only
+ 	       apply laxity about positioning to GNU attribute syntax.
+ 	       Standard attributes applied to a function or array
+ 	       declarator apply exactly to that type; standard
+ 	       attributes applied to the identifier apply to the
+ 	       declaration rather than to the type, and are specified
+ 	       using a cdk_id declarator rather than using
+ 	       cdk_attrs.  */
  	    inner_decl = declarator;
  	    while (inner_decl->kind == cdk_attrs)
  	      inner_decl = inner_decl->declarator;
! 	    if (!cxx11_attribute_p (attrs))
! 	      {
! 		if (inner_decl->kind == cdk_id)
! 		  attr_flags |= (int) ATTR_FLAG_DECL_NEXT;
! 		else if (inner_decl->kind == cdk_function)
! 		  attr_flags |= (int) ATTR_FLAG_FUNCTION_NEXT;
! 		else if (inner_decl->kind == cdk_array)
! 		  attr_flags |= (int) ATTR_FLAG_ARRAY_NEXT;
! 	      }
! 	    attrs = c_warn_type_attributes (attrs);
  	    returned_attrs = decl_attributes (&type,
  					      chainon (returned_attrs, attrs),
  					      attr_flags);
*************** grokdeclarator (const struct c_declarato
*** 6214,6219 ****
--- 6386,6397 ----
  	    if (type == error_mark_node)
  	      continue;
  
+ 	    if (!verify_type_context (loc, TCTX_ARRAY_ELEMENT, type))
+ 	      {
+ 		type = error_mark_node;
+ 		continue;
+ 	      }
+ 
  	    /* If size was specified, set ITYPE to a range-type for
  	       that size.  Otherwise, ITYPE remains null.  finish_decl
  	       may figure it out from an initial value.  */
*************** grokdeclarator (const struct c_declarato
*** 6238,6243 ****
--- 6416,6422 ----
  		      error_at (loc,
  				"size of unnamed array has non-integer type");
  		    size = integer_one_node;
+ 		    size_int_const = true;
  		  }
  		/* This can happen with enum forward declaration.  */
  		else if (!COMPLETE_TYPE_P (TREE_TYPE (size)))
*************** grokdeclarator (const struct c_declarato
*** 6249,6254 ****
--- 6428,6434 ----
  		      error_at (loc, "size of unnamed array has incomplete "
  				"type");
  		    size = integer_one_node;
+ 		    size_int_const = true;
  		  }
  
  		size = c_fully_fold (size, false, &size_maybe_const);
*************** grokdeclarator (const struct c_declarato
*** 6273,6278 ****
--- 6453,6459 ----
  			else
  			  error_at (loc, "size of unnamed array is negative");
  			size = integer_one_node;
+ 			size_int_const = true;
  		      }
  		    /* Handle a size folded to an integer constant but
  		       not an integer constant expression.  */
*************** grokdeclarator (const struct c_declarato
*** 6728,6733 ****
--- 6909,6915 ----
  	}
      }
    *decl_attrs = chainon (returned_attrs, *decl_attrs);
+   *decl_attrs = chainon (decl_id_attrs, *decl_attrs);
  
    /* Now TYPE has the actual type, apart from any qualifiers in
       TYPE_QUALS.  */
*************** grokdeclarator (const struct c_declarato
*** 6862,6868 ****
  	type = c_build_qualified_type (type, type_quals, orig_qual_type,
  				       orig_qual_indirect);
        decl = build_decl (declarator->id_loc,
! 			 TYPE_DECL, declarator->u.id, type);
        if (declspecs->explicit_signed_p)
  	C_TYPEDEF_EXPLICITLY_SIGNED (decl) = 1;
        if (declspecs->inline_p)
--- 7044,7050 ----
  	type = c_build_qualified_type (type, type_quals, orig_qual_type,
  				       orig_qual_indirect);
        decl = build_decl (declarator->id_loc,
! 			 TYPE_DECL, declarator->u.id.id, type);
        if (declspecs->explicit_signed_p)
  	C_TYPEDEF_EXPLICITLY_SIGNED (decl) = 1;
        if (declspecs->inline_p)
*************** grokdeclarator (const struct c_declarato
*** 6870,6878 ****
        if (declspecs->noreturn_p)
  	pedwarn (loc, 0,"typedef %q+D declared %<_Noreturn%>", decl);
  
!       if (warn_cxx_compat && declarator->u.id != NULL_TREE)
  	{
! 	  struct c_binding *b = I_TAG_BINDING (declarator->u.id);
  
  	  if (b != NULL
  	      && b->decl != NULL_TREE
--- 7052,7060 ----
        if (declspecs->noreturn_p)
  	pedwarn (loc, 0,"typedef %q+D declared %<_Noreturn%>", decl);
  
!       if (warn_cxx_compat && declarator->u.id.id != NULL_TREE)
  	{
! 	  struct c_binding *b = I_TAG_BINDING (declarator->u.id.id);
  
  	  if (b != NULL
  	      && b->decl != NULL_TREE
*************** grokdeclarator (const struct c_declarato
*** 7004,7010 ****
  	  type = c_build_qualified_type (type, type_quals);
  
  	decl = build_decl (declarator->id_loc,
! 			   PARM_DECL, declarator->u.id, type);
  	if (size_varies)
  	  C_DECL_VARIABLE_SIZE (decl) = 1;
  	C_ARRAY_PARAMETER (decl) = array_parameter_p;
--- 7186,7192 ----
  	  type = c_build_qualified_type (type, type_quals);
  
  	decl = build_decl (declarator->id_loc,
! 			   PARM_DECL, declarator->u.id.id, type);
  	if (size_varies)
  	  C_DECL_VARIABLE_SIZE (decl) = 1;
  	C_ARRAY_PARAMETER (decl) = array_parameter_p;
*************** grokdeclarator (const struct c_declarato
*** 7063,7074 ****
  	    if (orig_qual_indirect == 0)
  	      orig_qual_type = NULL_TREE;
  	  }
  	type = c_build_qualified_type (type, type_quals, orig_qual_type,
  				       orig_qual_indirect);
  	decl = build_decl (declarator->id_loc,
! 			   FIELD_DECL, declarator->u.id, type);
  	DECL_NONADDRESSABLE_P (decl) = bitfield;
! 	if (bitfield && !declarator->u.id)
  	  {
  	    TREE_NO_WARNING (decl) = 1;
  	    DECL_PADDING_P (decl) = 1;
--- 7245,7260 ----
  	    if (orig_qual_indirect == 0)
  	      orig_qual_type = NULL_TREE;
  	  }
+ 	if (type != error_mark_node
+ 	    && !verify_type_context (loc, TCTX_FIELD, type))
+ 	  type = error_mark_node;
+ 
  	type = c_build_qualified_type (type, type_quals, orig_qual_type,
  				       orig_qual_indirect);
  	decl = build_decl (declarator->id_loc,
! 			   FIELD_DECL, declarator->u.id.id, type);
  	DECL_NONADDRESSABLE_P (decl) = bitfield;
! 	if (bitfield && !declarator->u.id.id)
  	  {
  	    TREE_NO_WARNING (decl) = 1;
  	    DECL_PADDING_P (decl) = 1;
*************** grokdeclarator (const struct c_declarato
*** 7104,7110 ****
  	  }
  
  	decl = build_decl (declarator->id_loc,
! 			   FUNCTION_DECL, declarator->u.id, type);
  	decl = build_decl_attribute_variant (decl, decl_attr);
  
  	if (type_quals & TYPE_QUAL_ATOMIC)
--- 7290,7296 ----
  	  }
  
  	decl = build_decl (declarator->id_loc,
! 			   FUNCTION_DECL, declarator->u.id.id, type);
  	decl = build_decl_attribute_variant (decl, decl_attr);
  
  	if (type_quals & TYPE_QUAL_ATOMIC)
*************** grokdeclarator (const struct c_declarato
*** 7149,7155 ****
  
  	/* Record presence of `inline' and `_Noreturn', if it is
  	   reasonable.  */
! 	if (flag_hosted && MAIN_NAME_P (declarator->u.id))
  	  {
  	    if (declspecs->inline_p)
  	      pedwarn (loc, 0, "cannot inline function %<main%>");
--- 7335,7341 ----
  
  	/* Record presence of `inline' and `_Noreturn', if it is
  	   reasonable.  */
! 	if (flag_hosted && MAIN_NAME_P (declarator->u.id.id))
  	  {
  	    if (declspecs->inline_p)
  	      pedwarn (loc, 0, "cannot inline function %<main%>");
*************** grokdeclarator (const struct c_declarato
*** 7190,7197 ****
  	   the 'extern' declaration is taken to refer to that decl.) */
  	if (extern_ref && current_scope != file_scope)
  	  {
! 	    tree global_decl  = identifier_global_value (declarator->u.id);
! 	    tree visible_decl = lookup_name (declarator->u.id);
  
  	    if (global_decl
  		&& global_decl != visible_decl
--- 7376,7383 ----
  	   the 'extern' declaration is taken to refer to that decl.) */
  	if (extern_ref && current_scope != file_scope)
  	  {
! 	    tree global_decl  = identifier_global_value (declarator->u.id.id);
! 	    tree visible_decl = lookup_name (declarator->u.id.id);
  
  	    if (global_decl
  		&& global_decl != visible_decl
*************** grokdeclarator (const struct c_declarato
*** 7202,7208 ****
  	  }
  
  	decl = build_decl (declarator->id_loc,
! 			   VAR_DECL, declarator->u.id, type);
  	if (size_varies)
  	  C_DECL_VARIABLE_SIZE (decl) = 1;
  
--- 7388,7394 ----
  	  }
  
  	decl = build_decl (declarator->id_loc,
! 			   VAR_DECL, declarator->u.id.id, type);
  	if (size_varies)
  	  C_DECL_VARIABLE_SIZE (decl) = 1;
  
*************** grokdeclarator (const struct c_declarato
*** 7250,7255 ****
--- 7436,7458 ----
  	      	    "no linkage");
        }
  
+     /* For nested functions disqualify ones taking VLAs by value
+        from inlining since the middle-end cannot deal with this.
+        ???  We should arrange for those to be passed by reference
+        with emitting the copy on the caller side in the frontend.  */
+     if (storage_class == csc_none
+ 	&& TREE_CODE (type) == FUNCTION_TYPE)
+       for (tree al = TYPE_ARG_TYPES (type); al; al = TREE_CHAIN (al))
+ 	{
+ 	  tree arg = TREE_VALUE (al);
+ 	  if (arg != error_mark_node
+ 	      && C_TYPE_VARIABLE_SIZE (arg))
+ 	    {
+ 	      DECL_UNINLINABLE (decl) = 1;
+ 	      break;
+ 	    }
+ 	}
+ 
      /* Record `register' declaration for warnings on &
         and in case doing stupid register allocation.  */
  
*************** grokparms (struct c_arg_info *arg_info,
*** 7362,7367 ****
--- 7565,7577 ----
        tree parm, type, typelt;
        unsigned int parmno;
  
+       /* In C2X, convert () in a function definition to (void).  */
+       if (flag_isoc2x
+ 	  && funcdef_flag
+ 	  && !arg_types
+ 	  && !arg_info->parms)
+ 	arg_types = arg_info->types = void_list_node;
+ 
        /* If there is a parameter of incomplete type in a definition,
  	 this is an error.  In a declaration this is valid, and a
  	 struct or union type may be completed later, before any calls
*************** get_parm_info (bool ellipsis, tree expr)
*** 7625,7635 ****
  
  /* Get the struct, enum or union (CODE says which) with tag NAME.
     Define the tag as a forward-reference with location LOC if it is
!    not defined.  Return a c_typespec structure for the type
!    specifier.  */
  
  struct c_typespec
! parser_xref_tag (location_t loc, enum tree_code code, tree name)
  {
    struct c_typespec ret;
    tree ref;
--- 7835,7848 ----
  
  /* Get the struct, enum or union (CODE says which) with tag NAME.
     Define the tag as a forward-reference with location LOC if it is
!    not defined.  HAVE_STD_ATTRS says whether any standard attributes
!    were present after the struct, union or enum keyword; ATTRS are the
!    standard attributes present there.  Return a c_typespec structure
!    for the type specifier.  */
  
  struct c_typespec
! parser_xref_tag (location_t loc, enum tree_code code, tree name,
! 		 bool have_std_attrs, tree attrs)
  {
    struct c_typespec ret;
    tree ref;
*************** parser_xref_tag (location_t loc, enum tr
*** 7653,7661 ****
       this would not work properly if we return the reference found.
       (For example, with "struct foo" in an outer scope, "union foo;"
       must shadow that tag with a new one of union type.)  */
!   ret.kind = (ref ? ctsk_tagref : ctsk_tagfirstref);
    if (ref && TREE_CODE (ref) == code)
      {
        if (C_TYPE_DEFINED_IN_STRUCT (ref)
  	  && loc != UNKNOWN_LOCATION
  	  && warn_cxx_compat)
--- 7866,7877 ----
       this would not work properly if we return the reference found.
       (For example, with "struct foo" in an outer scope, "union foo;"
       must shadow that tag with a new one of union type.)  */
!   ret.kind = (ref
! 	      ? (have_std_attrs ? ctsk_tagref_attrs : ctsk_tagref)
! 	      : (have_std_attrs ? ctsk_tagfirstref_attrs : ctsk_tagfirstref));
    if (ref && TREE_CODE (ref) == code)
      {
+       decl_attributes (&ref, attrs, (int) ATTR_FLAG_TYPE_IN_PLACE);
        if (C_TYPE_DEFINED_IN_STRUCT (ref)
  	  && loc != UNKNOWN_LOCATION
  	  && warn_cxx_compat)
*************** parser_xref_tag (location_t loc, enum tr
*** 7709,7714 ****
--- 7925,7931 ----
      }
  
    pushtag (loc, name, ref);
+   decl_attributes (&ref, attrs, (int) ATTR_FLAG_TYPE_IN_PLACE);
  
    ret.spec = ref;
    return ret;
*************** parser_xref_tag (location_t loc, enum tr
*** 7721,7727 ****
  tree
  xref_tag (enum tree_code code, tree name)
  {
!   return parser_xref_tag (input_location, code, name).spec;
  }
  
  /* Make sure that the tag NAME is defined *in the current scope*
--- 7938,7944 ----
  tree
  xref_tag (enum tree_code code, tree name)
  {
!   return parser_xref_tag (input_location, code, name, false, NULL_TREE).spec;
  }
  
  /* Make sure that the tag NAME is defined *in the current scope*
*************** xref_tag (enum tree_code code, tree name
*** 7736,7742 ****
  
  tree
  start_struct (location_t loc, enum tree_code code, tree name,
! 	      struct c_struct_parse_info **enclosing_struct_parse_info)
  {
    /* If there is already a tag defined at this scope
       (as a forward reference), just return it.  */
--- 7953,7959 ----
  
  tree
  start_struct (location_t loc, enum tree_code code, tree name,
! 	      class c_struct_parse_info **enclosing_struct_parse_info)
  {
    /* If there is already a tag defined at this scope
       (as a forward reference), just return it.  */
*************** grokfield (location_t loc,
*** 7823,7829 ****
  {
    tree value;
  
!   if (declarator->kind == cdk_id && declarator->u.id == NULL_TREE
        && width == NULL_TREE)
      {
        /* This is an unnamed decl.
--- 8040,8046 ----
  {
    tree value;
  
!   if (declarator->kind == cdk_id && declarator->u.id.id == NULL_TREE
        && width == NULL_TREE)
      {
        /* This is an unnamed decl.
*************** field_decl_cmp (const void *x_p, const v
*** 8141,8146 ****
--- 8358,8383 ----
    return 1;
  }
  
+ /* If this structure or union completes the type of any previous
+    variable declaration, lay it out and output its rtl.  */
+ static void
+ finish_incomplete_vars (tree incomplete_vars, bool toplevel)
+ {
+   for (tree x = incomplete_vars; x; x = TREE_CHAIN (x))
+     {
+       tree decl = TREE_VALUE (x);
+       if (TREE_CODE (TREE_TYPE (decl)) == ARRAY_TYPE)
+ 	layout_array_type (TREE_TYPE (decl));
+       if (TREE_CODE (decl) != TYPE_DECL)
+ 	{
+ 	  relayout_decl (decl);
+ 	  if (c_dialect_objc ())
+ 	    objc_check_decl (decl);
+ 	  rest_of_decl_compilation (decl, toplevel, 0);
+ 	}
+     }
+ }
+ 
  /* Fill in the fields of a RECORD_TYPE or UNION_TYPE node, T.
     LOC is the location of the RECORD_TYPE or UNION_TYPE's definition.
     FIELDLIST is a chain of FIELD_DECL nodes for the fields.
*************** field_decl_cmp (const void *x_p, const v
*** 8151,8157 ****
  
  tree
  finish_struct (location_t loc, tree t, tree fieldlist, tree attributes,
! 	       struct c_struct_parse_info *enclosing_struct_parse_info)
  {
    tree x;
    bool toplevel = file_scope == current_scope;
--- 8388,8394 ----
  
  tree
  finish_struct (location_t loc, tree t, tree fieldlist, tree attributes,
! 	       class c_struct_parse_info *enclosing_struct_parse_info)
  {
    tree x;
    bool toplevel = file_scope == current_scope;
*************** finish_struct (location_t loc, tree t, t
*** 8399,8411 ****
        warning_at (loc, 0, "union cannot be made transparent");
      }
  
-   /* Note: C_TYPE_INCOMPLETE_VARS overloads TYPE_VFIELD which is used
-      in dwarf2out via rest_of_decl_compilation below and means
-      something totally different.  Since we will be clearing
-      C_TYPE_INCOMPLETE_VARS shortly after we iterate through them,
-      clear it ahead of time and avoid problems in dwarf2out.  Ideally,
-      C_TYPE_INCOMPLETE_VARS should use some language specific
-      node.  */
    tree incomplete_vars = C_TYPE_INCOMPLETE_VARS (TYPE_MAIN_VARIANT (t));
    for (x = TYPE_MAIN_VARIANT (t); x; x = TYPE_NEXT_VARIANT (x))
      {
--- 8636,8641 ----
*************** finish_struct (location_t loc, tree t, t
*** 8426,8446 ****
    /* Finish debugging output for this type.  */
    rest_of_type_compilation (t, toplevel);
  
!   /* If this structure or union completes the type of any previous
!      variable declaration, lay it out and output its rtl.  */
!   for (x = incomplete_vars; x; x = TREE_CHAIN (x))
!     {
!       tree decl = TREE_VALUE (x);
!       if (TREE_CODE (TREE_TYPE (decl)) == ARRAY_TYPE)
! 	layout_array_type (TREE_TYPE (decl));
!       if (TREE_CODE (decl) != TYPE_DECL)
! 	{
! 	  layout_decl (decl, 0);
! 	  if (c_dialect_objc ())
! 	    objc_check_decl (decl);
! 	  rest_of_decl_compilation (decl, toplevel, 0);
! 	}
!     }
  
    /* If we're inside a function proper, i.e. not file-scope and not still
       parsing parameters, then arrange for the size of a variable sized type
--- 8656,8662 ----
    /* Finish debugging output for this type.  */
    rest_of_type_compilation (t, toplevel);
  
!   finish_incomplete_vars (incomplete_vars, toplevel);
  
    /* If we're inside a function proper, i.e. not file-scope and not still
       parsing parameters, then arrange for the size of a variable sized type
*************** finish_enum (tree enumtype, tree values,
*** 8643,8649 ****
        if (precision > TYPE_PRECISION (enumtype))
  	{
  	  TYPE_PRECISION (enumtype) = 0;
! 	  error ("specified mode too small for enumeral values");
  	}
        else
  	precision = TYPE_PRECISION (enumtype);
--- 8859,8865 ----
        if (precision > TYPE_PRECISION (enumtype))
  	{
  	  TYPE_PRECISION (enumtype) = 0;
! 	  error ("specified mode too small for enumerated values");
  	}
        else
  	precision = TYPE_PRECISION (enumtype);
*************** finish_enum (tree enumtype, tree values,
*** 8719,8726 ****
--- 8935,8944 ----
    TYPE_LANG_SPECIFIC (enumtype) = lt;
  
    /* Fix up all variant types of this enum type.  */
+   tree incomplete_vars = C_TYPE_INCOMPLETE_VARS (TYPE_MAIN_VARIANT (enumtype));
    for (tem = TYPE_MAIN_VARIANT (enumtype); tem; tem = TYPE_NEXT_VARIANT (tem))
      {
+       C_TYPE_INCOMPLETE_VARS (tem) = NULL_TREE;
        if (tem == enumtype)
  	continue;
        TYPE_VALUES (tem) = TYPE_VALUES (enumtype);
*************** finish_enum (tree enumtype, tree values,
*** 8739,8744 ****
--- 8957,8964 ----
    /* Finish debugging output for this type.  */
    rest_of_type_compilation (enumtype, toplevel);
  
+   finish_incomplete_vars (incomplete_vars, toplevel);
+ 
    /* If this enum is defined inside a struct, add it to
       struct_types.  */
    if (warn_cxx_compat
*************** finish_enum (tree enumtype, tree values,
*** 8746,8751 ****
--- 8966,8973 ----
        && !in_sizeof && !in_typeof && !in_alignof)
      struct_parse_info->struct_types.safe_push (enumtype);
  
+   C_TYPE_BEING_DEFINED (enumtype) = 0;
+ 
    return enumtype;
  }
  
*************** build_enumerator (location_t decl_loc, l
*** 8851,8856 ****
--- 9073,9108 ----
    return tree_cons (decl, value, NULL_TREE);
  }
  
+ /* Implement LANG_HOOKS_SIMULATE_ENUM_DECL.  */
+ 
+ tree
+ c_simulate_enum_decl (location_t loc, const char *name,
+ 		      vec<string_int_pair> values)
+ {
+   location_t saved_loc = input_location;
+   input_location = loc;
+ 
+   struct c_enum_contents the_enum;
+   tree enumtype = start_enum (loc, &the_enum, get_identifier (name));
+ 
+   tree value_chain = NULL_TREE;
+   string_int_pair *value;
+   unsigned int i;
+   FOR_EACH_VEC_ELT (values, i, value)
+     {
+       tree decl = build_enumerator (loc, loc, &the_enum,
+ 				    get_identifier (value->first),
+ 				    build_int_cst (integer_type_node,
+ 						   value->second));
+       TREE_CHAIN (decl) = value_chain;
+       value_chain = decl;
+     }
+ 
+   finish_enum (enumtype, nreverse (value_chain), NULL_TREE);
+ 
+   input_location = saved_loc;
+   return enumtype;
+ }
  
  /* Create the FUNCTION_DECL for a function definition.
     DECLSPECS, DECLARATOR and ATTRIBUTES are the parts of
*************** start_function (struct c_declspecs *decl
*** 8904,8911 ****
        && DECL_UNINLINABLE (decl1)
        && lookup_attribute ("noinline", DECL_ATTRIBUTES (decl1)))
      warning_at (loc, OPT_Wattributes,
! 		"inline function %qD given attribute noinline",
! 		decl1);
  
    /* Handle gnu_inline attribute.  */
    if (declspecs->inline_p
--- 9156,9163 ----
        && DECL_UNINLINABLE (decl1)
        && lookup_attribute ("noinline", DECL_ATTRIBUTES (decl1)))
      warning_at (loc, OPT_Wattributes,
! 		"inline function %qD given attribute %qs",
! 		decl1, "noinline");
  
    /* Handle gnu_inline attribute.  */
    if (declspecs->inline_p
*************** store_parm_decls_oldstyle (tree fndecl,
*** 9175,9182 ****
    hash_set<tree> seen_args;
  
    if (!in_system_header_at (input_location))
!     warning_at (DECL_SOURCE_LOCATION (fndecl),
! 		OPT_Wold_style_definition, "old-style function definition");
  
    /* Match each formal parameter name with its declaration.  Save each
       decl in the appropriate TREE_PURPOSE slot of the parmids chain.  */
--- 9427,9444 ----
    hash_set<tree> seen_args;
  
    if (!in_system_header_at (input_location))
!     {
!       if (flag_isoc2x)
! 	pedwarn (DECL_SOURCE_LOCATION (fndecl),
! 		 OPT_Wold_style_definition, "old-style function definition");
!       else
! 	warning_at (DECL_SOURCE_LOCATION (fndecl),
! 		    OPT_Wold_style_definition,
! 		    "old-style function definition");
!     }
! 
!   if (current_scope->had_vla_unspec)
!     error ("%<[*]%> not allowed in other than function prototype scope");
  
    /* Match each formal parameter name with its declaration.  Save each
       decl in the appropriate TREE_PURPOSE slot of the parmids chain.  */
*************** store_parm_decls (void)
*** 9492,9502 ****
    struct c_arg_info *arg_info = current_function_arg_info;
    current_function_arg_info = 0;
  
!   /* True if this definition is written with a prototype.  Note:
!      despite C99 6.7.5.3p14, we can *not* treat an empty argument
!      list in a function definition as equivalent to (void) -- an
!      empty argument list specifies the function has no parameters,
!      but only (void) sets up a prototype for future calls.  */
    proto = arg_info->types != 0;
  
    if (proto)
--- 9754,9763 ----
    struct c_arg_info *arg_info = current_function_arg_info;
    current_function_arg_info = 0;
  
!   /* True if this definition is written with a prototype.  In C2X, an
!      empty argument list was converted to (void) in grokparms; in
!      older C standard versions, it does not give the function a type
!      with a prototype for future calls.  */
    proto = arg_info->types != 0;
  
    if (proto)
*************** temp_pop_parm_decls (void)
*** 9593,9599 ****
     This is called after parsing the body of the function definition.  */
  
  void
! finish_function (void)
  {
    tree fndecl = current_function_decl;
    
--- 9854,9860 ----
     This is called after parsing the body of the function definition.  */
  
  void
! finish_function (location_t end_loc)
  {
    tree fndecl = current_function_decl;
    
*************** finish_function (void)
*** 9689,9695 ****
  
    /* Store the end of the function, so that we get good line number
       info for the epilogue.  */
!   cfun->function_end_locus = input_location;
  
    /* Finalize the ELF visibility for the function.  */
    c_determine_visibility (fndecl);
--- 9950,9956 ----
  
    /* Store the end of the function, so that we get good line number
       info for the epilogue.  */
!   cfun->function_end_locus = end_loc;
  
    /* Finalize the ELF visibility for the function.  */
    c_determine_visibility (fndecl);
*************** identifier_global_tag (tree t)
*** 9958,9963 ****
--- 10219,10252 ----
    return NULL_TREE;
  }
  
+ /* Returns true if NAME refers to a built-in function or function-like
+    operator.  */
+ 
+ bool
+ names_builtin_p (const char *name)
+ {
+   tree id = get_identifier (name);
+   if (tree decl = identifier_global_value (id))
+     return TREE_CODE (decl) == FUNCTION_DECL && DECL_IS_BUILTIN (decl);
+ 
+   /* Also detect common reserved C words that aren't strictly built-in
+      functions.  */
+   switch (C_RID_CODE (id))
+     {
+     case RID_BUILTIN_CONVERTVECTOR:
+     case RID_BUILTIN_HAS_ATTRIBUTE:
+     case RID_BUILTIN_SHUFFLE:
+     case RID_CHOOSE_EXPR:
+     case RID_OFFSETOF:
+     case RID_TYPES_COMPATIBLE_P:
+       return true;
+     default:
+       break;
+     }
+ 
+   return false;
+ }
+ 
  /* In C, the only C-linkage public declaration is at file scope.  */
  
  tree
*************** build_id_declarator (tree ident)
*** 10043,10049 ****
    struct c_declarator *ret = XOBNEW (&parser_obstack, struct c_declarator);
    ret->kind = cdk_id;
    ret->declarator = 0;
!   ret->u.id = ident;
    /* Default value - may get reset to a more precise location. */
    ret->id_loc = input_location;
    return ret;
--- 10332,10339 ----
    struct c_declarator *ret = XOBNEW (&parser_obstack, struct c_declarator);
    ret->kind = cdk_id;
    ret->declarator = 0;
!   ret->u.id.id = ident;
!   ret->u.id.attrs = NULL_TREE;
    /* Default value - may get reset to a more precise location. */
    ret->id_loc = input_location;
    return ret;
*************** declspecs_add_addrspace (location_t loca
*** 10101,10106 ****
--- 10391,10397 ----
  {
    specs->non_sc_seen_p = true;
    specs->declspecs_seen_p = true;
+   specs->non_std_attrs_seen_p = true;
  
    if (!ADDR_SPACE_GENERIC_P (specs->address_space)
        && specs->address_space != as)
*************** declspecs_add_qual (location_t loc,
*** 10126,10131 ****
--- 10417,10423 ----
    bool dupe = false;
    specs->non_sc_seen_p = true;
    specs->declspecs_seen_p = true;
+   specs->non_std_attrs_seen_p = true;
    gcc_assert (TREE_CODE (qual) == IDENTIFIER_NODE
  	      && C_IS_RESERVED_WORD (qual));
    i = C_RID_CODE (qual);
*************** declspecs_add_type (location_t loc, stru
*** 10184,10189 ****
--- 10476,10482 ----
    tree type = spec.spec;
    specs->non_sc_seen_p = true;
    specs->declspecs_seen_p = true;
+   specs->non_std_attrs_seen_p = true;
    specs->typespec_kind = spec.kind;
    if (TREE_DEPRECATED (type))
      specs->deprecated_p = true;
*************** declspecs_add_type (location_t loc, stru
*** 10621,10627 ****
  	    case RID_INT_N_2:
  	    case RID_INT_N_3:
  	      specs->int_n_idx = i - RID_INT_N_0;
! 	      if (!in_system_header_at (input_location))
  		pedwarn (loc, OPT_Wpedantic,
  			 "ISO C does not support %<__int%d%> types",
  			 int_n_data[specs->int_n_idx].bitsize);
--- 10914,10924 ----
  	    case RID_INT_N_2:
  	    case RID_INT_N_3:
  	      specs->int_n_idx = i - RID_INT_N_0;
! 	      if (!in_system_header_at (input_location)
! 		  /* If the INT_N type ends in "__", and so is of the format
! 		     "__intN__", don't pedwarn.  */
! 		  && (strncmp (IDENTIFIER_POINTER (type)
! 			       + (IDENTIFIER_LENGTH (type) - 2), "__", 2) != 0))
  		pedwarn (loc, OPT_Wpedantic,
  			 "ISO C does not support %<__int%d%> types",
  			 int_n_data[specs->int_n_idx].bitsize);
*************** declspecs_add_type (location_t loc, stru
*** 10925,10934 ****
  	      }
  	      if (!targetm.decimal_float_supported_p ())
  		error_at (loc,
! 			  ("decimal floating point not supported "
  			   "for this target"));
! 	      pedwarn (loc, OPT_Wpedantic,
! 		       "ISO C does not support decimal floating point");
  	      return specs;
  	    case RID_FRACT:
  	    case RID_ACCUM:
--- 11222,11232 ----
  	      }
  	      if (!targetm.decimal_float_supported_p ())
  		error_at (loc,
! 			  ("decimal floating-point not supported "
  			   "for this target"));
! 	      pedwarn_c11 (loc, OPT_Wpedantic,
! 			   "ISO C does not support decimal floating-point "
! 			   "before C2X");
  	      return specs;
  	    case RID_FRACT:
  	    case RID_ACCUM:
*************** declspecs_add_scspec (location_t loc,
*** 11044,11049 ****
--- 11342,11348 ----
    enum c_storage_class n = csc_none;
    bool dupe = false;
    specs->declspecs_seen_p = true;
+   specs->non_std_attrs_seen_p = true;
    gcc_assert (TREE_CODE (scspec) == IDENTIFIER_NODE
  	      && C_IS_RESERVED_WORD (scspec));
    i = C_RID_CODE (scspec);
*************** declspecs_add_attrs (location_t loc, str
*** 11160,11165 ****
--- 11459,11467 ----
    specs->attrs = chainon (attrs, specs->attrs);
    specs->locations[cdw_attributes] = loc;
    specs->declspecs_seen_p = true;
+   /* In the case of standard attributes at the start of the
+      declaration, the caller will reset this.  */
+   specs->non_std_attrs_seen_p = true;
    return specs;
  }
  
*************** declspecs_add_alignas (location_t loc,
*** 11188,11194 ****
     specifiers with any other type specifier to determine the resulting
     type.  This is where ISO C checks on complex types are made, since
     "_Complex long" is a prefix of the valid ISO C type "_Complex long
!    double".  */
  
  struct c_declspecs *
  finish_declspecs (struct c_declspecs *specs)
--- 11490,11496 ----
     specifiers with any other type specifier to determine the resulting
     type.  This is where ISO C checks on complex types are made, since
     "_Complex long" is a prefix of the valid ISO C type "_Complex long
!    double".  Also apply postfix standard attributes to modify the type.  */
  
  struct c_declspecs *
  finish_declspecs (struct c_declspecs *specs)
*************** finish_declspecs (struct c_declspecs *sp
*** 11204,11210 ****
        /* Set a dummy type.  */
        if (TREE_CODE (specs->type) == ERROR_MARK)
          specs->type = integer_type_node;
!       return specs;
      }
  
    /* If none of "void", "_Bool", "char", "int", "float" or "double"
--- 11506,11512 ----
        /* Set a dummy type.  */
        if (TREE_CODE (specs->type) == ERROR_MARK)
          specs->type = integer_type_node;
!       goto handle_postfix_attrs;
      }
  
    /* If none of "void", "_Bool", "char", "int", "float" or "double"
*************** finish_declspecs (struct c_declspecs *sp
*** 11258,11263 ****
--- 11560,11567 ----
  		  && !specs->signed_p && !specs->unsigned_p
  		  && !specs->complex_p);
        /* Type to be filled in later.  */
+       if (specs->postfix_attrs)
+ 	error ("%<__auto_type%> followed by %<[[]]%> attributes");
        break;
      case cts_void:
        gcc_assert (!specs->long_p && !specs->short_p
*************** finish_declspecs (struct c_declspecs *sp
*** 11367,11373 ****
      case cts_dfloat128:
        gcc_assert (!specs->long_p && !specs->long_long_p && !specs->short_p
  		  && !specs->signed_p && !specs->unsigned_p && !specs->complex_p);
!       if (specs->typespec_word == cts_dfloat32)
  	specs->type = dfloat32_type_node;
        else if (specs->typespec_word == cts_dfloat64)
  	specs->type = dfloat64_type_node;
--- 11671,11679 ----
      case cts_dfloat128:
        gcc_assert (!specs->long_p && !specs->long_long_p && !specs->short_p
  		  && !specs->signed_p && !specs->unsigned_p && !specs->complex_p);
!       if (!targetm.decimal_float_supported_p ())
! 	specs->type = integer_type_node;
!       else if (specs->typespec_word == cts_dfloat32)
  	specs->type = dfloat32_type_node;
        else if (specs->typespec_word == cts_dfloat64)
  	specs->type = dfloat64_type_node;
*************** finish_declspecs (struct c_declspecs *sp
*** 11463,11468 ****
--- 11769,11781 ----
      default:
        gcc_unreachable ();
      }
+  handle_postfix_attrs:
+   if (specs->type != NULL)
+     {
+       specs->postfix_attrs = c_warn_type_attributes (specs->postfix_attrs);
+       decl_attributes (&specs->type, specs->postfix_attrs, 0);
+       specs->postfix_attrs = NULL_TREE;
+     }
  
    return specs;
  }
*************** c_write_global_declarations_1 (tree glob
*** 11517,11531 ****
    while (reconsider);
  }
  
- /* Callback to collect a source_ref from a DECL.  */
- 
- static void
- collect_source_ref_cb (tree decl)
- {
-   if (!DECL_IS_BUILTIN (decl))
-     collect_source_ref (LOCATION_FILE (decl_sloc (decl, false)));
- }
- 
  /* Preserve the external declarations scope across a garbage collect.  */
  static GTY(()) tree ext_block;
  
--- 11830,11835 ----
*************** collect_all_refs (const char *source_fil
*** 11543,11552 ****
    collect_ada_nodes (BLOCK_VARS (ext_block), source_file);
  }
  
! /* Iterate over all global declarations and call CALLBACK.  */
  
  static void
! for_each_global_decl (void (*callback) (tree decl))
  {
    tree t;
    tree decls;
--- 11847,11856 ----
    collect_ada_nodes (BLOCK_VARS (ext_block), source_file);
  }
  
! /* Collect source file references at global level.  */
  
  static void
! collect_source_refs (void)
  {
    tree t;
    tree decls;
*************** for_each_global_decl (void (*callback) (
*** 11557,11567 ****
      { 
        decls = DECL_INITIAL (t);
        for (decl = BLOCK_VARS (decls); decl; decl = TREE_CHAIN (decl))
! 	callback (decl);
      }
  
    for (decl = BLOCK_VARS (ext_block); decl; decl = TREE_CHAIN (decl))
!     callback (decl);
  }
  
  /* Perform any final parser cleanups and generate initial debugging
--- 11861,11873 ----
      { 
        decls = DECL_INITIAL (t);
        for (decl = BLOCK_VARS (decls); decl; decl = TREE_CHAIN (decl))
! 	if (!DECL_IS_BUILTIN (decl))
! 	  collect_source_ref (DECL_SOURCE_FILE (decl));
      }
  
    for (decl = BLOCK_VARS (ext_block); decl; decl = TREE_CHAIN (decl))
!     if (!DECL_IS_BUILTIN (decl))
!       collect_source_ref (DECL_SOURCE_FILE (decl));
  }
  
  /* Perform any final parser cleanups and generate initial debugging
*************** c_parse_final_cleanups (void)
*** 11595,11604 ****
    if (flag_dump_ada_spec || flag_dump_ada_spec_slim)
      {
        /* Build a table of files to generate specs for */
!       if (flag_dump_ada_spec_slim)
! 	collect_source_ref (main_input_filename);
!       else
! 	for_each_global_decl (collect_source_ref_cb);
  
        dump_ada_specs (collect_all_refs, NULL);
      }
--- 11901,11909 ----
    if (flag_dump_ada_spec || flag_dump_ada_spec_slim)
      {
        /* Build a table of files to generate specs for */
!       collect_source_ref (main_input_filename);
!       if (!flag_dump_ada_spec_slim)
! 	collect_source_refs ();
  
        dump_ada_specs (collect_all_refs, NULL);
      }
*************** c_check_omp_declare_reduction_r (tree *t
*** 11736,11739 ****
--- 12041,12052 ----
    return NULL_TREE;
  }
  
+ 
+ bool
+ c_check_in_current_scope (tree decl)
+ {
+   struct c_binding *b = I_SYMBOL_BINDING (DECL_NAME (decl));
+   return b != NULL && B_IN_CURRENT_SCOPE (b);
+ }
+ 
  #include "gt-c-c-decl.h"
diff -Nrcpad gcc-9.3.0/gcc/c/c-errors.c gcc-10.1.0/gcc/c/c-errors.c
*** gcc-9.3.0/gcc/c/c-errors.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/c-errors.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Various diagnostic subroutines for the GNU C language.
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
     Contributed by Gabriel Dos Reis <gdr@codesourcery.com>
  
  This file is part of GCC.
--- 1,5 ----
  /* Various diagnostic subroutines for the GNU C language.
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
     Contributed by Gabriel Dos Reis <gdr@codesourcery.com>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/c/c-fold.c gcc-10.1.0/gcc/c/c-fold.c
*** gcc-9.3.0/gcc/c/c-fold.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/c-fold.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Support for fully folding sub-trees of an expression for C compiler.
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Support for fully folding sub-trees of an expression for C compiler.
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** c_fully_fold_internal (tree expr, bool i
*** 346,351 ****
--- 346,352 ----
      case UNGT_EXPR:
      case UNGE_EXPR:
      case UNEQ_EXPR:
+     case MEM_REF:
        /* Binary operations evaluating both arguments (increment and
  	 decrement are binary internally in GCC).  */
        orig_op0 = op0 = TREE_OPERAND (expr, 0);
*************** c_fully_fold_internal (tree expr, bool i
*** 435,440 ****
--- 436,449 ----
  	      || TREE_CODE (TREE_TYPE (orig_op0)) == FIXED_POINT_TYPE)
  	  && TREE_CODE (TREE_TYPE (orig_op1)) == INTEGER_TYPE)
  	warn_for_div_by_zero (loc, op1);
+       if (code == MEM_REF
+ 	  && ret != expr
+ 	  && TREE_CODE (ret) == MEM_REF)
+ 	{
+ 	  TREE_READONLY (ret) = TREE_READONLY (expr);
+ 	  TREE_SIDE_EFFECTS (ret) = TREE_SIDE_EFFECTS (expr);
+ 	  TREE_THIS_VOLATILE (ret) = TREE_THIS_VOLATILE (expr);
+ 	}
        goto out;
  
      case ADDR_EXPR:
diff -Nrcpad gcc-9.3.0/gcc/c/c-lang.c gcc-10.1.0/gcc/c/c-lang.c
*** gcc-9.3.0/gcc/c/c-lang.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/c-lang.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Language-specific hook definitions for C front end.
!    Copyright (C) 1991-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Language-specific hook definitions for C front end.
!    Copyright (C) 1991-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c/c-lang.h gcc-10.1.0/gcc/c/c-lang.h
*** gcc-9.3.0/gcc/c/c-lang.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/c-lang.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for C language specific types.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for C language specific types.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c/c-objc-common.c gcc-10.1.0/gcc/c/c-objc-common.c
*** gcc-9.3.0/gcc/c/c-objc-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/c-objc-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Some code common to C and ObjC front ends.
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Some code common to C and ObjC front ends.
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 28,33 ****
--- 28,35 ----
  #include "langhooks.h"
  #include "c-objc-common.h"
  #include "gcc-rich-location.h"
+ #include "stringpool.h"
+ #include "attribs.h"
  
  static bool c_tree_printer (pretty_printer *, text_info *, const char *,
  			    int, bool, bool, bool, bool *, const char **);
*************** c_objc_common_init (void)
*** 62,67 ****
--- 64,185 ----
    return c_common_init ();
  }
  
+ /* Decide whether it's worth saying that TYPE is also known as some other
+    type.  Return the other type if so, otherwise return TYPE.  */
+ 
+ static tree
+ get_aka_type (tree type)
+ {
+   if (type == error_mark_node)
+     return type;
+ 
+   tree result;
+   if (typedef_variant_p (type))
+     {
+       /* Saying that "foo" is also known as "struct foo" or
+ 	 "struct <anonymous>" is unlikely to be useful, since users of
+ 	 structure-like types would already know that they're structures.
+ 	 The same applies to unions and enums; in general, printing the
+ 	 tag is only useful if it has a different name.  */
+       tree orig_type = DECL_ORIGINAL_TYPE (TYPE_NAME (type));
+       tree_code code = TREE_CODE (orig_type);
+       tree orig_id = TYPE_IDENTIFIER (orig_type);
+       if ((code == RECORD_TYPE || code == UNION_TYPE || code == ENUMERAL_TYPE)
+ 	  && (!orig_id || TYPE_IDENTIFIER (type) == orig_id))
+ 	return type;
+ 
+       if (!user_facing_original_type_p (type))
+ 	return type;
+ 
+       result = get_aka_type (orig_type);
+     }
+   else
+     {
+       tree canonical = TYPE_CANONICAL (type);
+       if (canonical && TREE_CODE (type) != TREE_CODE (canonical))
+ 	return canonical;
+ 
+       /* Recursive calls might choose a middle ground between TYPE
+ 	 (which has no typedefs stripped) and CANONICAL (which has
+ 	 all typedefs stripped).  So try to reuse TYPE or CANONICAL if
+ 	 convenient, but be prepared to create a new type if necessary.  */
+       switch (TREE_CODE (type))
+ 	{
+ 	case POINTER_TYPE:
+ 	case REFERENCE_TYPE:
+ 	  {
+ 	    tree target_type = get_aka_type (TREE_TYPE (type));
+ 
+ 	    if (target_type == TREE_TYPE (type))
+ 	      return type;
+ 
+ 	    if (canonical && target_type == TREE_TYPE (canonical))
+ 	      return canonical;
+ 
+ 	    result = (TREE_CODE (type) == POINTER_TYPE
+ 		      ? build_pointer_type (target_type)
+ 		      : build_reference_type (target_type));
+ 	    break;
+ 	  }
+ 
+ 	case ARRAY_TYPE:
+ 	  {
+ 	    tree element_type = get_aka_type (TREE_TYPE (type));
+ 	    tree index_type = (TYPE_DOMAIN (type)
+ 			       ? get_aka_type (TYPE_DOMAIN (type))
+ 			       : NULL_TREE);
+ 
+ 	    if (element_type == TREE_TYPE (type)
+ 		&& index_type == TYPE_DOMAIN (type))
+ 	      return type;
+ 
+ 	    if (canonical
+ 		&& element_type == TREE_TYPE (canonical)
+ 		&& index_type == TYPE_DOMAIN (canonical))
+ 	      return canonical;
+ 
+ 	    result = build_array_type (element_type, index_type,
+ 				       TYPE_TYPELESS_STORAGE (type));
+ 	    break;
+ 	  }
+ 
+ 	case FUNCTION_TYPE:
+ 	  {
+ 	    tree return_type = get_aka_type (TREE_TYPE (type));
+ 
+ 	    tree args = TYPE_ARG_TYPES (type);
+ 	    if (args == error_mark_node)
+ 	      return type;
+ 
+ 	    auto_vec<tree, 32> arg_types;
+ 	    bool type_ok_p = true;
+ 	    while (args && args != void_list_node)
+ 	      {
+ 		tree arg_type = get_aka_type (TREE_VALUE (args));
+ 		arg_types.safe_push (arg_type);
+ 		type_ok_p &= (arg_type == TREE_VALUE (args));
+ 		args = TREE_CHAIN (args);
+ 	      }
+ 
+ 	    if (type_ok_p && return_type == TREE_TYPE (type))
+ 	      return type;
+ 
+ 	    unsigned int i;
+ 	    tree arg_type;
+ 	    FOR_EACH_VEC_ELT_REVERSE (arg_types, i, arg_type)
+ 	      args = tree_cons (NULL_TREE, arg_type, args);
+ 	    result = build_function_type (return_type, args);
+ 	    break;
+ 	  }
+ 
+ 	default:
+ 	  return canonical ? canonical : type;
+ 	}
+     }
+   return build_type_attribute_qual_variant (result, TYPE_ATTRIBUTES (type),
+ 					    TYPE_QUALS (type));
+ }
+ 
  /* Print T to CPP.  */
  
  static void
*************** print_type (c_pretty_printer *cpp, tree
*** 83,93 ****
       stripped version.  But sometimes the stripped version looks
       exactly the same, so we don't want it after all.  To avoid
       printing it in that case, we play ugly obstack games.  */
!   if (TYPE_CANONICAL (t) && t != TYPE_CANONICAL (t))
      {
        c_pretty_printer cpp2;
        /* Print the stripped version into a temporary printer.  */
!       cpp2.type_id (TYPE_CANONICAL (t));
        struct obstack *ob2 = cpp2.buffer->obstack;
        /* Get the stripped version from the temporary printer.  */
        const char *aka = (char *) obstack_base (ob2);
--- 201,212 ----
       stripped version.  But sometimes the stripped version looks
       exactly the same, so we don't want it after all.  To avoid
       printing it in that case, we play ugly obstack games.  */
!   tree aka_type = get_aka_type (t);
!   if (aka_type != t)
      {
        c_pretty_printer cpp2;
        /* Print the stripped version into a temporary printer.  */
!       cpp2.type_id (aka_type);
        struct obstack *ob2 = cpp2.buffer->obstack;
        /* Get the stripped version from the temporary printer.  */
        const char *aka = (char *) obstack_base (ob2);
*************** print_type (c_pretty_printer *cpp, tree
*** 107,113 ****
        pp_c_whitespace (cpp);
        if (*quoted)
  	pp_begin_quote (cpp, pp_show_color (cpp));
!       cpp->type_id (TYPE_CANONICAL (t));
        if (*quoted)
  	pp_end_quote (cpp, pp_show_color (cpp));
        pp_right_brace (cpp);
--- 226,232 ----
        pp_c_whitespace (cpp);
        if (*quoted)
  	pp_begin_quote (cpp, pp_show_color (cpp));
!       cpp->type_id (aka_type);
        if (*quoted)
  	pp_end_quote (cpp, pp_show_color (cpp));
        pp_right_brace (cpp);
*************** label_text
*** 221,232 ****
  range_label_for_type_mismatch::get_text (unsigned /*range_idx*/) const
  {
    if (m_labelled_type == NULL_TREE)
!     return label_text (NULL, false);
  
    c_pretty_printer cpp;
    bool quoted = false;
    print_type (&cpp, m_labelled_type, &quoted);
!   return label_text (xstrdup (pp_formatted_text (&cpp)), true);
  }
  
  
--- 340,351 ----
  range_label_for_type_mismatch::get_text (unsigned /*range_idx*/) const
  {
    if (m_labelled_type == NULL_TREE)
!     return label_text::borrow (NULL);
  
    c_pretty_printer cpp;
    bool quoted = false;
    print_type (&cpp, m_labelled_type, &quoted);
!   return label_text::take (xstrdup (pp_formatted_text (&cpp)));
  }
  
  
diff -Nrcpad gcc-9.3.0/gcc/c/c-objc-common.h gcc-10.1.0/gcc/c/c-objc-common.h
*** gcc-9.3.0/gcc/c/c-objc-common.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/c-objc-common.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Language hooks common to C and ObjC front ends.
!    Copyright (C) 2004-2019 Free Software Foundation, Inc.
     Contributed by Ziemowit Laski  <zlaski@apple.com>
  
  This file is part of GCC.
--- 1,5 ----
  /* Language hooks common to C and ObjC front ends.
!    Copyright (C) 2004-2020 Free Software Foundation, Inc.
     Contributed by Ziemowit Laski  <zlaski@apple.com>
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 60,65 ****
--- 60,68 ----
  #define LANG_HOOKS_BUILTIN_FUNCTION c_builtin_function
  #undef  LANG_HOOKS_BUILTIN_FUNCTION_EXT_SCOPE
  #define LANG_HOOKS_BUILTIN_FUNCTION_EXT_SCOPE c_builtin_function_ext_scope
+ #undef  LANG_HOOKS_SIMULATE_BUILTIN_FUNCTION_DECL
+ #define LANG_HOOKS_SIMULATE_BUILTIN_FUNCTION_DECL \
+   c_simulate_builtin_function_decl
  #undef LANG_HOOKS_EMITS_BEGIN_STMT
  #define LANG_HOOKS_EMITS_BEGIN_STMT true
  
*************** along with GCC; see the file COPYING3.
*** 72,77 ****
--- 75,82 ----
  #undef LANG_HOOKS_TREE_DUMP_DUMP_TREE_FN
  #define LANG_HOOKS_TREE_DUMP_DUMP_TREE_FN c_dump_tree
  
+ #undef LANG_HOOKS_SIMULATE_ENUM_DECL
+ #define LANG_HOOKS_SIMULATE_ENUM_DECL c_simulate_enum_decl
  #undef LANG_HOOKS_TYPE_FOR_MODE
  #define LANG_HOOKS_TYPE_FOR_MODE c_common_type_for_mode
  #undef LANG_HOOKS_TYPE_FOR_SIZE
diff -Nrcpad gcc-9.3.0/gcc/c/c-parser.c gcc-10.1.0/gcc/c/c-parser.c
*** gcc-9.3.0/gcc/c/c-parser.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/c-parser.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Parser for C and Objective-C.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
     Parser actions based on the old Bison parser; structure somewhat
     influenced by and fragments based on the C++ parser.
--- 1,5 ----
  /* Parser for C and Objective-C.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
     Parser actions based on the old Bison parser; structure somewhat
     influenced by and fragments based on the C++ parser.
*************** c_parse_init (void)
*** 157,162 ****
--- 157,167 ----
        id = get_identifier (name);
        C_SET_RID_CODE (id, RID_FIRST_INT_N + i);
        C_IS_RESERVED_WORD (id) = 1;
+ 
+       sprintf (name, "__int%d__", int_n_data[i].bitsize);
+       id = get_identifier (name);
+       C_SET_RID_CODE (id, RID_FIRST_INT_N + i);
+       C_IS_RESERVED_WORD (id) = 1;
      }
  }
  
*************** struct GTY(()) c_parser {
*** 171,176 ****
--- 176,187 ----
    /* How many look-ahead tokens are available (0 - 4, or
       more if parsing from pre-lexed tokens).  */
    unsigned int tokens_avail;
+   /* Raw look-ahead tokens, used only for checking in Objective-C
+      whether '[[' starts attributes.  */
+   vec<c_token, va_gc> *raw_tokens;
+   /* The number of raw look-ahead tokens that have since been fully
+      lexed.  */
+   unsigned int raw_tokens_used;
    /* True if a syntax error is being recovered from; false otherwise.
       c_parser_error sets this flag.  It should clear this flag when
       enough tokens have been consumed to recover from the error.  */
*************** struct GTY(()) c_parser {
*** 180,187 ****
    BOOL_BITFIELD in_pragma : 1;
    /* True if we're parsing the outermost block of an if statement.  */
    BOOL_BITFIELD in_if_block : 1;
!   /* True if we want to lex an untranslated string.  */
!   BOOL_BITFIELD lex_untranslated_string : 1;
  
    /* Objective-C specific parser/lexer information.  */
  
--- 191,205 ----
    BOOL_BITFIELD in_pragma : 1;
    /* True if we're parsing the outermost block of an if statement.  */
    BOOL_BITFIELD in_if_block : 1;
!   /* True if we want to lex a translated, joined string (for an
!      initial #pragma pch_preprocess).  Otherwise the parser is
!      responsible for concatenating strings and translating to the
!      execution character set as needed.  */
!   BOOL_BITFIELD lex_joined_string : 1;
!   /* True if, when the parser is concatenating string literals, it
!      should translate them to the execution character set (false
!      inside attributes).  */
!   BOOL_BITFIELD translate_strings_p : 1;
  
    /* Objective-C specific parser/lexer information.  */
  
*************** c_parser_set_error (c_parser *parser, bo
*** 239,258 ****
  
  static GTY (()) c_parser *the_parser;
  
! /* Read in and lex a single token, storing it in *TOKEN.  */
  
  static void
! c_lex_one_token (c_parser *parser, c_token *token)
  {
    timevar_push (TV_LEX);
  
!   token->type = c_lex_with_flags (&token->value, &token->location,
! 				  &token->flags,
! 				  (parser->lex_untranslated_string
! 				   ? C_LEX_STRING_NO_TRANSLATE : 0));
!   token->id_kind = C_ID_NONE;
!   token->keyword = RID_MAX;
!   token->pragma_kind = PRAGMA_NONE;
  
    switch (token->type)
      {
--- 257,295 ----
  
  static GTY (()) c_parser *the_parser;
  
! /* Read in and lex a single token, storing it in *TOKEN.  If RAW,
!    context-sensitive postprocessing of the token is not done.  */
  
  static void
! c_lex_one_token (c_parser *parser, c_token *token, bool raw = false)
  {
    timevar_push (TV_LEX);
  
!   if (raw || vec_safe_length (parser->raw_tokens) == 0)
!     {
!       token->type = c_lex_with_flags (&token->value, &token->location,
! 				      &token->flags,
! 				      (parser->lex_joined_string
! 				       ? 0 : C_LEX_STRING_NO_JOIN));
!       token->id_kind = C_ID_NONE;
!       token->keyword = RID_MAX;
!       token->pragma_kind = PRAGMA_NONE;
!     }
!   else
!     {
!       /* Use a token previously lexed as a raw look-ahead token, and
! 	 complete the processing on it.  */
!       *token = (*parser->raw_tokens)[parser->raw_tokens_used];
!       ++parser->raw_tokens_used;
!       if (parser->raw_tokens_used == vec_safe_length (parser->raw_tokens))
! 	{
! 	  vec_free (parser->raw_tokens);
! 	  parser->raw_tokens_used = 0;
! 	}
!     }
! 
!   if (raw)
!     goto out;
  
    switch (token->type)
      {
*************** c_lex_one_token (c_parser *parser, c_tok
*** 422,427 ****
--- 459,465 ----
      default:
        break;
      }
+  out:
    timevar_pop (TV_LEX);
  }
  
*************** c_parser_peek_nth_token (c_parser *parse
*** 472,477 ****
--- 510,541 ----
    return &parser->tokens[n - 1];
  }
  
+ /* Return a pointer to the Nth token from PARSER, reading it in as a
+    raw look-ahead token if necessary.  The N-1th token is already read
+    in.  Raw look-ahead tokens remain available for when the non-raw
+    functions above are called.  */
+ 
+ c_token *
+ c_parser_peek_nth_token_raw (c_parser *parser, unsigned int n)
+ {
+   /* N is 1-based, not zero-based.  */
+   gcc_assert (n > 0);
+ 
+   if (parser->tokens_avail >= n)
+     return &parser->tokens[n - 1];
+   unsigned int raw_len = vec_safe_length (parser->raw_tokens);
+   unsigned int raw_avail
+     = parser->tokens_avail + raw_len - parser->raw_tokens_used;
+   gcc_assert (raw_avail >= n - 1);
+   if (raw_avail >= n)
+     return &(*parser->raw_tokens)[parser->raw_tokens_used
+ 				  + n - 1 - parser->tokens_avail];
+   vec_safe_reserve (parser->raw_tokens, 1);
+   parser->raw_tokens->quick_grow (raw_len + 1);
+   c_lex_one_token (parser, &(*parser->raw_tokens)[raw_len], true);
+   return &(*parser->raw_tokens)[raw_len];
+ }
+ 
  bool
  c_keyword_starts_typename (enum rid keyword)
  {
*************** c_parser_next_token_is_qualifier (c_pars
*** 621,628 ****
    return c_token_is_qualifier (token);
  }
  
! /* Return true if TOKEN can start declaration specifiers, false
!    otherwise.  */
  static bool
  c_token_starts_declspecs (c_token *token)
  {
--- 685,692 ----
    return c_token_is_qualifier (token);
  }
  
! /* Return true if TOKEN can start declaration specifiers (not
!    including standard attributes), false otherwise.  */
  static bool
  c_token_starts_declspecs (c_token *token)
  {
*************** c_token_starts_declspecs (c_token *token
*** 701,708 ****
  }
  
  
! /* Return true if TOKEN can start declaration specifiers or a static
!    assertion, false otherwise.  */
  static bool
  c_token_starts_declaration (c_token *token)
  {
--- 765,773 ----
  }
  
  
! /* Return true if TOKEN can start declaration specifiers (not
!    including standard attributes) or a static assertion, false
!    otherwise.  */
  static bool
  c_token_starts_declaration (c_token *token)
  {
*************** c_token_starts_declaration (c_token *tok
*** 714,720 ****
  }
  
  /* Return true if the next token from PARSER can start declaration
!    specifiers, false otherwise.  */
  bool
  c_parser_next_token_starts_declspecs (c_parser *parser)
  {
--- 779,786 ----
  }
  
  /* Return true if the next token from PARSER can start declaration
!    specifiers (not including standard attributes), false
!    otherwise.  */
  bool
  c_parser_next_token_starts_declspecs (c_parser *parser)
  {
*************** c_parser_next_token_starts_declspecs (c_
*** 736,742 ****
  }
  
  /* Return true if the next tokens from PARSER can start declaration
!    specifiers or a static assertion, false otherwise.  */
  bool
  c_parser_next_tokens_start_declaration (c_parser *parser)
  {
--- 802,809 ----
  }
  
  /* Return true if the next tokens from PARSER can start declaration
!    specifiers (not including standard attributes) or a static
!    assertion, false otherwise.  */
  bool
  c_parser_next_tokens_start_declaration (c_parser *parser)
  {
*************** c_parser_consume_token (c_parser *parser
*** 775,782 ****
    parser->last_token_location = parser->tokens[0].location;
    if (parser->tokens != &parser->tokens_buf[0])
      parser->tokens++;
!   else if (parser->tokens_avail == 2)
!     parser->tokens[0] = parser->tokens[1];
    parser->tokens_avail--;
  }
  
--- 842,857 ----
    parser->last_token_location = parser->tokens[0].location;
    if (parser->tokens != &parser->tokens_buf[0])
      parser->tokens++;
!   else if (parser->tokens_avail >= 2)
!     {
!       parser->tokens[0] = parser->tokens[1];
!       if (parser->tokens_avail >= 3)
!         {
!           parser->tokens[1] = parser->tokens[2];
!           if (parser->tokens_avail >= 4)
!             parser->tokens[2] = parser->tokens[3];
!         }
!     }
    parser->tokens_avail--;
  }
  
*************** c_parser_consume_pragma (c_parser *parse
*** 791,798 ****
    gcc_assert (parser->tokens[0].type == CPP_PRAGMA);
    if (parser->tokens != &parser->tokens_buf[0])
      parser->tokens++;
!   else if (parser->tokens_avail == 2)
!     parser->tokens[0] = parser->tokens[1];
    parser->tokens_avail--;
    parser->in_pragma = true;
  }
--- 866,877 ----
    gcc_assert (parser->tokens[0].type == CPP_PRAGMA);
    if (parser->tokens != &parser->tokens_buf[0])
      parser->tokens++;
!   else if (parser->tokens_avail >= 2)
!     {
!       parser->tokens[0] = parser->tokens[1];
!       if (parser->tokens_avail >= 3)
! 	parser->tokens[1] = parser->tokens[2];
!     }
    parser->tokens_avail--;
    parser->in_pragma = true;
  }
*************** struct oacc_routine_data {
*** 1372,1381 ****
--- 1451,1465 ----
    location_t loc;
  };
  
+ static bool c_parser_nth_token_starts_std_attributes (c_parser *,
+ 						      unsigned int);
+ static tree c_parser_std_attribute_specifier_sequence (c_parser *);
  static void c_parser_external_declaration (c_parser *);
  static void c_parser_asm_definition (c_parser *);
  static void c_parser_declaration_or_fndef (c_parser *, bool, bool, bool,
  					   bool, bool, tree *, vec<c_token>,
+ 					   bool have_attrs = false,
+ 					   tree attrs = NULL,
  					   struct oacc_routine_data * = NULL,
  					   bool * = NULL);
  static void c_parser_static_assert_declaration_no_semi (c_parser *);
*************** static struct c_declarator *c_parser_dir
*** 1390,1409 ****
  static struct c_declarator *c_parser_direct_declarator_inner (c_parser *,
  							      bool,
  							      struct c_declarator *);
! static struct c_arg_info *c_parser_parms_declarator (c_parser *, bool, tree);
  static struct c_arg_info *c_parser_parms_list_declarator (c_parser *, tree,
! 							  tree);
! static struct c_parm *c_parser_parameter_declaration (c_parser *, tree);
  static tree c_parser_simple_asm_expr (c_parser *);
! static tree c_parser_attributes (c_parser *);
  static struct c_expr c_parser_initializer (c_parser *);
  static struct c_expr c_parser_braced_init (c_parser *, tree, bool,
  					   struct obstack *);
  static void c_parser_initelt (c_parser *, struct obstack *);
  static void c_parser_initval (c_parser *, struct c_expr *,
  			      struct obstack *);
! static tree c_parser_compound_statement (c_parser *);
! static void c_parser_compound_statement_nostart (c_parser *);
  static void c_parser_label (c_parser *);
  static void c_parser_statement (c_parser *, bool *, location_t * = NULL);
  static void c_parser_statement_after_labels (c_parser *, bool *,
--- 1474,1494 ----
  static struct c_declarator *c_parser_direct_declarator_inner (c_parser *,
  							      bool,
  							      struct c_declarator *);
! static struct c_arg_info *c_parser_parms_declarator (c_parser *, bool, tree,
! 						     bool);
  static struct c_arg_info *c_parser_parms_list_declarator (c_parser *, tree,
! 							  tree, bool);
! static struct c_parm *c_parser_parameter_declaration (c_parser *, tree, bool);
  static tree c_parser_simple_asm_expr (c_parser *);
! static tree c_parser_gnu_attributes (c_parser *);
  static struct c_expr c_parser_initializer (c_parser *);
  static struct c_expr c_parser_braced_init (c_parser *, tree, bool,
  					   struct obstack *);
  static void c_parser_initelt (c_parser *, struct obstack *);
  static void c_parser_initval (c_parser *, struct c_expr *,
  			      struct obstack *);
! static tree c_parser_compound_statement (c_parser *, location_t * = NULL);
! static location_t c_parser_compound_statement_nostart (c_parser *);
  static void c_parser_label (c_parser *);
  static void c_parser_statement (c_parser *, bool *, location_t * = NULL);
  static void c_parser_statement_after_labels (c_parser *, bool *,
*************** static void c_parser_objc_at_synthesize_
*** 1498,1505 ****
  static void c_parser_objc_at_dynamic_declaration (c_parser *);
  static bool c_parser_objc_diagnose_bad_element_prefix
    (c_parser *, struct c_declspecs *);
! 
! static void c_parser_parse_rtl_body (c_parser *parser, char *start_with_pass);
  
  /* Parse a translation unit (C90 6.7, C99 6.9, C11 6.9).
  
--- 1583,1589 ----
  static void c_parser_objc_at_dynamic_declaration (c_parser *);
  static bool c_parser_objc_diagnose_bad_element_prefix
    (c_parser *, struct c_declspecs *);
! static location_t c_parser_parse_rtl_body (c_parser *, char *);
  
  /* Parse a translation unit (C90 6.7, C99 6.9, C11 6.9).
  
*************** c_parser_translation_unit (c_parser *par
*** 1542,1547 ****
--- 1626,1639 ----
    FOR_EACH_VEC_ELT (incomplete_record_decls, i, decl)
      if (DECL_SIZE (decl) == NULL_TREE && TREE_TYPE (decl) != error_mark_node)
        error ("storage size of %q+D isn%'t known", decl);
+ 
+   if (current_omp_declare_target_attribute)
+     {
+       if (!errorcount)
+         error ("%<#pragma omp declare target%> without corresponding "
+ 	       "%<#pragma omp end declare target%>");
+       current_omp_declare_target_attribute = 0;
+     }
  }
  
  /* Parse an external declaration (C90 6.7, C99 6.9, C11 6.9).
*************** add_debug_begin_stmt (location_t loc)
*** 1686,1696 ****
     declarations are OK (subject to all other constraints); otherwise
     (old-style parameter declarations) they are diagnosed.  If
     START_ATTR_OK is true, the declaration specifiers may start with
!    attributes; otherwise they may not.
     OBJC_FOREACH_OBJECT_DECLARATION can be used to get back the parsed
     declaration when parsing an Objective-C foreach statement.
     FALLTHRU_ATTR_P is used to signal whether this function parsed
!    "__attribute__((fallthrough));".
  
     declaration:
       declaration-specifiers init-declarator-list[opt] ;
--- 1778,1792 ----
     declarations are OK (subject to all other constraints); otherwise
     (old-style parameter declarations) they are diagnosed.  If
     START_ATTR_OK is true, the declaration specifiers may start with
!    attributes (GNU or standard); otherwise they may not.
     OBJC_FOREACH_OBJECT_DECLARATION can be used to get back the parsed
     declaration when parsing an Objective-C foreach statement.
     FALLTHRU_ATTR_P is used to signal whether this function parsed
!    "__attribute__((fallthrough));".  ATTRS are any standard attributes
!    parsed in the caller (in contexts where such attributes had to be
!    parsed to determine whether what follows is a declaration or a
!    statement); HAVE_ATTRS says whether there were any such attributes
!    (even empty).
  
     declaration:
       declaration-specifiers init-declarator-list[opt] ;
*************** add_debug_begin_stmt (location_t loc)
*** 1709,1716 ****
       init-declarator-list , init-declarator
  
     init-declarator:
!      declarator simple-asm-expr[opt] attributes[opt]
!      declarator simple-asm-expr[opt] attributes[opt] = initializer
  
     GNU extensions:
  
--- 1805,1812 ----
       init-declarator-list , init-declarator
  
     init-declarator:
!      declarator simple-asm-expr[opt] gnu-attributes[opt]
!      declarator simple-asm-expr[opt] gnu-attributes[opt] = initializer
  
     GNU extensions:
  
*************** add_debug_begin_stmt (location_t loc)
*** 1721,1731 ****
     attribute ;
  
     Objective-C:
!      attributes objc-class-definition
!      attributes objc-category-definition
!      attributes objc-protocol-definition
  
!    The simple-asm-expr and attributes are GNU extensions.
  
     This function does not handle __extension__; that is handled in its
     callers.  ??? Following the old parser, __extension__ may start
--- 1817,1827 ----
     attribute ;
  
     Objective-C:
!      gnu-attributes objc-class-definition
!      gnu-attributes objc-category-definition
!      gnu-attributes objc-protocol-definition
  
!    The simple-asm-expr and gnu-attributes are GNU extensions.
  
     This function does not handle __extension__; that is handled in its
     callers.  ??? Following the old parser, __extension__ may start
*************** c_parser_declaration_or_fndef (c_parser
*** 1764,1769 ****
--- 1860,1866 ----
  			       bool nested, bool start_attr_ok,
  			       tree *objc_foreach_object_declaration,
  			       vec<c_token> omp_declare_simd_clauses,
+ 			       bool have_attrs, tree attrs,
  			       struct oacc_routine_data *oacc_routine_data,
  			       bool *fallthru_attr_p)
  {
*************** c_parser_declaration_or_fndef (c_parser
*** 1783,1788 ****
--- 1880,1892 ----
      }
    specs = build_null_declspecs ();
  
+   /* Handle any standard attributes parsed in the caller.  */
+   if (have_attrs)
+     {
+       declspecs_add_attrs (here, specs, attrs);
+       specs->non_std_attrs_seen_p = false;
+     }
+ 
    /* Try to detect an unknown type name when we have "A B" or "A *B".  */
    if (c_parser_peek_token (parser)->type == CPP_NAME
        && c_parser_peek_token (parser)->id_kind == C_ID_ID
*************** c_parser_declaration_or_fndef (c_parser
*** 1847,1854 ****
        fndef_ok = !nested;
      }
  
    c_parser_declspecs (parser, specs, true, true, start_attr_ok,
! 		      true, true, cla_nonabstract_decl);
    if (parser->error)
      {
        c_parser_skip_to_end_of_block_or_statement (parser);
--- 1951,1964 ----
        fndef_ok = !nested;
      }
  
+   /* When there are standard attributes at the start of the
+      declaration (to apply to the entity being declared), an
+      init-declarator-list or function definition must be present.  */
+   if (c_parser_nth_token_starts_std_attributes (parser, 1))
+     have_attrs = true;
+ 
    c_parser_declspecs (parser, specs, true, true, start_attr_ok,
! 		      true, true, start_attr_ok, true, cla_nonabstract_decl);
    if (parser->error)
      {
        c_parser_skip_to_end_of_block_or_statement (parser);
*************** c_parser_declaration_or_fndef (c_parser
*** 1872,1882 ****
  	{
  	  if (fallthru_attr_p != NULL)
  	    *fallthru_attr_p = true;
! 	  tree fn = build_call_expr_internal_loc (here, IFN_FALLTHROUGH,
! 						  void_type_node, 0);
! 	  add_stmt (fn);
  	}
!       else if (empty_ok)
  	shadow_tag (specs);
        else
  	{
--- 1982,1999 ----
  	{
  	  if (fallthru_attr_p != NULL)
  	    *fallthru_attr_p = true;
! 	  if (nested)
! 	    {
! 	      tree fn = build_call_expr_internal_loc (here, IFN_FALLTHROUGH,
! 						      void_type_node, 0);
! 	      add_stmt (fn);
! 	    }
! 	  else
! 	    pedwarn (here, OPT_Wattributes,
! 		     "%<fallthrough%> attribute at top level");
  	}
!       else if (empty_ok && !(have_attrs
! 			     && specs->non_std_attrs_seen_p))
  	shadow_tag (specs);
        else
  	{
*************** c_parser_declaration_or_fndef (c_parser
*** 2038,2044 ****
  	    asm_name = c_parser_simple_asm_expr (parser);
  	  if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
  	    {
! 	      postfix_attrs = c_parser_attributes (parser);
  	      if (c_parser_next_token_is (parser, CPP_OPEN_BRACE))
  		{
  		  /* This means there is an attribute specifier after
--- 2155,2161 ----
  	    asm_name = c_parser_simple_asm_expr (parser);
  	  if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
  	    {
! 	      postfix_attrs = c_parser_gnu_attributes (parser);
  	      if (c_parser_next_token_is (parser, CPP_OPEN_BRACE))
  		{
  		  /* This means there is an attribute specifier after
*************** c_parser_declaration_or_fndef (c_parser
*** 2156,2165 ****
  					    all_prefix_attrs));
  	      if (d
  		  && TREE_CODE (d) == FUNCTION_DECL
- 		  && declarator->kind == cdk_function
  		  && DECL_ARGUMENTS (d) == NULL_TREE
  		  && DECL_INITIAL (d) == NULL_TREE)
! 		DECL_ARGUMENTS (d) = declarator->u.arg_info->parms;
  	      if (omp_declare_simd_clauses.exists ())
  		{
  		  tree parms = NULL_TREE;
--- 2273,2313 ----
  					    all_prefix_attrs));
  	      if (d
  		  && TREE_CODE (d) == FUNCTION_DECL
  		  && DECL_ARGUMENTS (d) == NULL_TREE
  		  && DECL_INITIAL (d) == NULL_TREE)
! 		{
! 		  /* Find the innermost declarator that is neither cdk_id
! 		     nor cdk_attrs.  */
! 		  const struct c_declarator *decl = declarator;
! 		  const struct c_declarator *last_non_id_attrs = NULL;
! 
! 		  while (decl)
! 		    switch (decl->kind)
! 		      {
! 		      case cdk_array:
! 		      case cdk_function:
! 		      case cdk_pointer:
! 			last_non_id_attrs = decl;
! 			decl = decl->declarator;
! 			break;
! 
! 		      case cdk_attrs:
! 			decl = decl->declarator;
! 			break;
! 
! 		      case cdk_id:
! 			decl = 0;
! 			break;
! 
! 		      default:
! 			gcc_unreachable ();
! 		      }
! 
! 		  /* If it exists and is cdk_function, use its parameters.  */
! 		  if (last_non_id_attrs
! 		      && last_non_id_attrs->kind == cdk_function)
! 		    DECL_ARGUMENTS (d) = last_non_id_attrs->u.arg_info->parms;
! 		}
  	      if (omp_declare_simd_clauses.exists ())
  		{
  		  tree parms = NULL_TREE;
*************** c_parser_declaration_or_fndef (c_parser
*** 2208,2214 ****
  		}
  	      c_parser_consume_token (parser);
  	      if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
! 		all_prefix_attrs = chainon (c_parser_attributes (parser),
  					    prefix_attrs);
  	      else
  		all_prefix_attrs = prefix_attrs;
--- 2356,2362 ----
  		}
  	      c_parser_consume_token (parser);
  	      if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
! 		all_prefix_attrs = chainon (c_parser_gnu_attributes (parser),
  					    prefix_attrs);
  	      else
  		all_prefix_attrs = prefix_attrs;
*************** c_parser_declaration_or_fndef (c_parser
*** 2321,2334 ****
  				   omp_declare_simd_clauses);
        if (oacc_routine_data)
  	c_finish_oacc_routine (oacc_routine_data, current_function_decl, true);
        DECL_STRUCT_FUNCTION (current_function_decl)->function_start_locus
! 	= c_parser_peek_token (parser)->location;
  
        /* If the definition was marked with __RTL, use the RTL parser now,
  	 consuming the function body.  */
        if (specs->declspec_il == cdil_rtl)
  	{
! 	  c_parser_parse_rtl_body (parser, specs->gimple_or_rtl_pass);
  
  	  /* Normally, store_parm_decls sets next_is_function_body,
  	     anticipating a function body.  We need a push_scope/pop_scope
--- 2469,2484 ----
  				   omp_declare_simd_clauses);
        if (oacc_routine_data)
  	c_finish_oacc_routine (oacc_routine_data, current_function_decl, true);
+       location_t startloc = c_parser_peek_token (parser)->location;
        DECL_STRUCT_FUNCTION (current_function_decl)->function_start_locus
! 	= startloc;
!       location_t endloc = startloc;
  
        /* If the definition was marked with __RTL, use the RTL parser now,
  	 consuming the function body.  */
        if (specs->declspec_il == cdil_rtl)
  	{
! 	  endloc = c_parser_parse_rtl_body (parser, specs->gimple_or_rtl_pass);
  
  	  /* Normally, store_parm_decls sets next_is_function_body,
  	     anticipating a function body.  We need a push_scope/pop_scope
*************** c_parser_declaration_or_fndef (c_parser
*** 2337,2343 ****
  	  push_scope ();
  	  pop_scope ();
  
! 	  finish_function ();
  	  return;
  	}
        /* If the definition was marked with __GIMPLE then parse the
--- 2487,2493 ----
  	  push_scope ();
  	  pop_scope ();
  
! 	  finish_function (endloc);
  	  return;
  	}
        /* If the definition was marked with __GIMPLE then parse the
*************** c_parser_declaration_or_fndef (c_parser
*** 2347,2357 ****
  	  bool saved = in_late_binary_op;
  	  in_late_binary_op = true;
  	  c_parser_parse_gimple_body (parser, specs->gimple_or_rtl_pass,
! 				      specs->declspec_il);
  	  in_late_binary_op = saved;
  	}
        else
! 	fnbody = c_parser_compound_statement (parser);
        tree fndecl = current_function_decl;
        if (nested)
  	{
--- 2497,2508 ----
  	  bool saved = in_late_binary_op;
  	  in_late_binary_op = true;
  	  c_parser_parse_gimple_body (parser, specs->gimple_or_rtl_pass,
! 				      specs->declspec_il,
! 				      specs->entry_bb_count);
  	  in_late_binary_op = saved;
  	}
        else
! 	fnbody = c_parser_compound_statement (parser, &endloc);
        tree fndecl = current_function_decl;
        if (nested)
  	{
*************** c_parser_declaration_or_fndef (c_parser
*** 2362,2368 ****
  	     by initializer_constant_valid_p.  See gcc.dg/nested-fn-2.c.  */
  	  DECL_STATIC_CHAIN (decl) = 1;
  	  add_stmt (fnbody);
! 	  finish_function ();
  	  c_pop_function_context ();
  	  add_stmt (build_stmt (DECL_SOURCE_LOCATION (decl), DECL_EXPR, decl));
  	}
--- 2513,2519 ----
  	     by initializer_constant_valid_p.  See gcc.dg/nested-fn-2.c.  */
  	  DECL_STATIC_CHAIN (decl) = 1;
  	  add_stmt (fnbody);
! 	  finish_function (endloc);
  	  c_pop_function_context ();
  	  add_stmt (build_stmt (DECL_SOURCE_LOCATION (decl), DECL_EXPR, decl));
  	}
*************** c_parser_declaration_or_fndef (c_parser
*** 2370,2376 ****
  	{
  	  if (fnbody)
  	    add_stmt (fnbody);
! 	  finish_function ();
  	}
        /* Get rid of the empty stmt list for GIMPLE/RTL.  */
        if (specs->declspec_il != cdil_none)
--- 2521,2527 ----
  	{
  	  if (fnbody)
  	    add_stmt (fnbody);
! 	  finish_function (endloc);
  	}
        /* Get rid of the empty stmt list for GIMPLE/RTL.  */
        if (specs->declspec_il != cdil_none)
*************** c_parser_static_assert_declaration_no_se
*** 2444,2450 ****
    location_t value_tok_loc = c_parser_peek_token (parser)->location;
    value = c_parser_expr_no_commas (parser, NULL).value;
    value_loc = EXPR_LOC_OR_LOC (value, value_tok_loc);
-   parser->lex_untranslated_string = true;
    if (c_parser_next_token_is (parser, CPP_COMMA))
      {
        c_parser_consume_token (parser);
--- 2595,2600 ----
*************** c_parser_static_assert_declaration_no_se
*** 2455,2467 ****
  	case CPP_STRING32:
  	case CPP_WSTRING:
  	case CPP_UTF8STRING:
! 	  string = c_parser_peek_token (parser)->value;
! 	  c_parser_consume_token (parser);
! 	  parser->lex_untranslated_string = false;
  	  break;
  	default:
  	  c_parser_error (parser, "expected string literal");
- 	  parser->lex_untranslated_string = false;
  	  return;
  	}
      }
--- 2605,2614 ----
  	case CPP_STRING32:
  	case CPP_WSTRING:
  	case CPP_UTF8STRING:
! 	  string = c_parser_string_literal (parser, false, true).value;
  	  break;
  	default:
  	  c_parser_error (parser, "expected string literal");
  	  return;
  	}
      }
*************** c_parser_static_assert_declaration_no_se
*** 2507,2514 ****
     6.7, C11 6.7), adding them to SPECS (which may already include some).
     Storage class specifiers are accepted iff SCSPEC_OK; type
     specifiers are accepted iff TYPESPEC_OK; alignment specifiers are
!    accepted iff ALIGNSPEC_OK; attributes are accepted at the start
!    iff START_ATTR_OK; __auto_type is accepted iff AUTO_TYPE_OK.
  
     declaration-specifiers:
       storage-class-specifier declaration-specifiers[opt]
--- 2654,2668 ----
     6.7, C11 6.7), adding them to SPECS (which may already include some).
     Storage class specifiers are accepted iff SCSPEC_OK; type
     specifiers are accepted iff TYPESPEC_OK; alignment specifiers are
!    accepted iff ALIGNSPEC_OK; gnu-attributes are accepted at the start
!    iff START_ATTR_OK; __auto_type is accepted iff AUTO_TYPE_OK.  In
!    addition to the syntax shown, standard attributes are accepted at
!    the start iff START_STD_ATTR_OK and at the end iff END_STD_ATTR_OK;
!    unlike gnu-attributes, they are not accepted in the middle of the
!    list.  (This combines various different syntax productions in the C
!    standard, and in some cases gnu-attributes and standard attributes
!    at the start may already have been parsed before this function is
!    called.)
  
     declaration-specifiers:
       storage-class-specifier declaration-specifiers[opt]
*************** c_parser_static_assert_declaration_no_se
*** 2576,2582 ****
     GNU extensions:
  
     declaration-specifiers:
!      attributes declaration-specifiers[opt]
  
     type-qualifier:
       address-space
--- 2730,2736 ----
     GNU extensions:
  
     declaration-specifiers:
!      gnu-attributes declaration-specifiers[opt]
  
     type-qualifier:
       address-space
*************** void
*** 2616,2621 ****
--- 2770,2776 ----
  c_parser_declspecs (c_parser *parser, struct c_declspecs *specs,
  		    bool scspec_ok, bool typespec_ok, bool start_attr_ok,
  		    bool alignspec_ok, bool auto_type_ok,
+ 		    bool start_std_attr_ok, bool end_std_attr_ok,
  		    enum c_lookahead_kind la)
  {
    bool attrs_ok = start_attr_ok;
*************** c_parser_declspecs (c_parser *parser, st
*** 2624,2629 ****
--- 2779,2794 ----
    if (!typespec_ok)
      gcc_assert (la == cla_prefer_id);
  
+   if (start_std_attr_ok
+       && c_parser_nth_token_starts_std_attributes (parser, 1))
+     {
+       gcc_assert (!specs->non_std_attrs_seen_p);
+       location_t loc = c_parser_peek_token (parser)->location;
+       tree attrs = c_parser_std_attribute_specifier_sequence (parser);
+       declspecs_add_attrs (loc, specs, attrs);
+       specs->non_std_attrs_seen_p = false;
+     }
+ 
    while (c_parser_next_token_is (parser, CPP_NAME)
  	 || c_parser_next_token_is (parser, CPP_KEYWORD)
  	 || (c_dialect_objc () && c_parser_next_token_is (parser, CPP_LESS)))
*************** c_parser_declspecs (c_parser *parser, st
*** 2869,2875 ****
  	case RID_ATTRIBUTE:
  	  if (!attrs_ok)
  	    goto out;
! 	  attrs = c_parser_attributes (parser);
  	  declspecs_add_attrs (loc, specs, attrs);
  	  break;
  	case RID_ALIGNAS:
--- 3034,3040 ----
  	case RID_ATTRIBUTE:
  	  if (!attrs_ok)
  	    goto out;
! 	  attrs = c_parser_gnu_attributes (parser);
  	  declspecs_add_attrs (loc, specs, attrs);
  	  break;
  	case RID_ALIGNAS:
*************** c_parser_declspecs (c_parser *parser, st
*** 2896,2913 ****
  	  goto out;
  	}
      }
!  out: ;
  }
  
  /* Parse an enum specifier (C90 6.5.2.2, C99 6.7.2.2, C11 6.7.2.2).
  
     enum-specifier:
!      enum attributes[opt] identifier[opt] { enumerator-list } attributes[opt]
!      enum attributes[opt] identifier[opt] { enumerator-list , } attributes[opt]
!      enum attributes[opt] identifier
  
     The form with trailing comma is new in C99.  The forms with
!    attributes are GNU extensions.  In GNU C, we accept any expression
     without commas in the syntax (assignment expressions, not just
     conditional expressions); assignment expressions will be diagnosed
     as non-constant.
--- 3061,3083 ----
  	  goto out;
  	}
      }
!  out:
!   if (end_std_attr_ok
!       && c_parser_nth_token_starts_std_attributes (parser, 1))
!     specs->postfix_attrs = c_parser_std_attribute_specifier_sequence (parser);
  }
  
  /* Parse an enum specifier (C90 6.5.2.2, C99 6.7.2.2, C11 6.7.2.2).
  
     enum-specifier:
!      enum gnu-attributes[opt] identifier[opt] { enumerator-list }
!        gnu-attributes[opt]
!      enum gnu-attributes[opt] identifier[opt] { enumerator-list , }
!        gnu-attributes[opt]
!      enum gnu-attributes[opt] identifier
  
     The form with trailing comma is new in C99.  The forms with
!    gnu-attributes are GNU extensions.  In GNU C, we accept any expression
     without commas in the syntax (assignment expressions, not just
     conditional expressions); assignment expressions will be diagnosed
     as non-constant.
*************** c_parser_declspecs (c_parser *parser, st
*** 2917,2930 ****
       enumerator-list , enumerator
  
     enumerator:
!      enumeration-constant
!      enumeration-constant = constant-expression
  
     GNU Extensions:
  
     enumerator:
!      enumeration-constant attributes[opt]
!      enumeration-constant attributes[opt] = constant-expression
  
  */
  
--- 3087,3102 ----
       enumerator-list , enumerator
  
     enumerator:
!      enumeration-constant attribute-specifier-sequence[opt]
!      enumeration-constant attribute-specifier-sequence[opt]
!        = constant-expression
  
     GNU Extensions:
  
     enumerator:
!      enumeration-constant attribute-specifier-sequence[opt] gnu-attributes[opt]
!      enumeration-constant attribute-specifier-sequence[opt] gnu-attributes[opt]
!        = constant-expression
  
  */
  
*************** static struct c_typespec
*** 2932,2944 ****
  c_parser_enum_specifier (c_parser *parser)
  {
    struct c_typespec ret;
    tree attrs;
    tree ident = NULL_TREE;
    location_t enum_loc;
    location_t ident_loc = UNKNOWN_LOCATION;  /* Quiet warning.  */
    gcc_assert (c_parser_next_token_is_keyword (parser, RID_ENUM));
    c_parser_consume_token (parser);
!   attrs = c_parser_attributes (parser);
    enum_loc = c_parser_peek_token (parser)->location;
    /* Set the location in case we create a decl now.  */
    c_parser_set_source_position_from_token (c_parser_peek_token (parser));
--- 3104,3121 ----
  c_parser_enum_specifier (c_parser *parser)
  {
    struct c_typespec ret;
+   bool have_std_attrs;
+   tree std_attrs = NULL_TREE;
    tree attrs;
    tree ident = NULL_TREE;
    location_t enum_loc;
    location_t ident_loc = UNKNOWN_LOCATION;  /* Quiet warning.  */
    gcc_assert (c_parser_next_token_is_keyword (parser, RID_ENUM));
    c_parser_consume_token (parser);
!   have_std_attrs = c_parser_nth_token_starts_std_attributes (parser, 1);
!   if (have_std_attrs)
!     std_attrs = c_parser_std_attribute_specifier_sequence (parser);
!   attrs = c_parser_gnu_attributes (parser);
    enum_loc = c_parser_peek_token (parser)->location;
    /* Set the location in case we create a decl now.  */
    c_parser_set_source_position_from_token (c_parser_peek_token (parser));
*************** c_parser_enum_specifier (c_parser *parse
*** 2994,3000 ****
  	  decl_loc = value_loc = token->location;
  	  c_parser_consume_token (parser);
  	  /* Parse any specified attributes.  */
! 	  tree enum_attrs = c_parser_attributes (parser);
  	  if (c_parser_next_token_is (parser, CPP_EQ))
  	    {
  	      c_parser_consume_token (parser);
--- 3171,3181 ----
  	  decl_loc = value_loc = token->location;
  	  c_parser_consume_token (parser);
  	  /* Parse any specified attributes.  */
! 	  tree std_attrs = NULL_TREE;
! 	  if (c_parser_nth_token_starts_std_attributes (parser, 1))
! 	    std_attrs = c_parser_std_attribute_specifier_sequence (parser);
! 	  tree enum_attrs = chainon (std_attrs,
! 				     c_parser_gnu_attributes (parser));
  	  if (c_parser_next_token_is (parser, CPP_EQ))
  	    {
  	      c_parser_consume_token (parser);
*************** c_parser_enum_specifier (c_parser *parse
*** 3032,3040 ****
  	      break;
  	    }
  	}
!       postfix_attrs = c_parser_attributes (parser);
        ret.spec = finish_enum (type, nreverse (values),
! 			      chainon (attrs, postfix_attrs));
        ret.kind = ctsk_tagdef;
        ret.expr = NULL_TREE;
        ret.expr_const_operands = true;
--- 3213,3222 ----
  	      break;
  	    }
  	}
!       postfix_attrs = c_parser_gnu_attributes (parser);
        ret.spec = finish_enum (type, nreverse (values),
! 			      chainon (std_attrs,
! 				       chainon (attrs, postfix_attrs)));
        ret.kind = ctsk_tagdef;
        ret.expr = NULL_TREE;
        ret.expr_const_operands = true;
*************** c_parser_enum_specifier (c_parser *parse
*** 3050,3056 ****
        ret.expr_const_operands = true;
        return ret;
      }
!   ret = parser_xref_tag (ident_loc, ENUMERAL_TYPE, ident);
    /* In ISO C, enumerated types can be referred to only if already
       defined.  */
    if (pedantic && !COMPLETE_TYPE_P (ret.spec))
--- 3232,3245 ----
        ret.expr_const_operands = true;
        return ret;
      }
!   /* Attributes may only appear when the members are defined or in
!      certain forward declarations (treat enum forward declarations in
!      GNU C analogously to struct and union forward declarations in
!      standard C).  */
!   if (have_std_attrs && c_parser_next_token_is_not (parser, CPP_SEMICOLON))
!     c_parser_error (parser, "expected %<;%>");
!   ret = parser_xref_tag (ident_loc, ENUMERAL_TYPE, ident, have_std_attrs,
! 			 std_attrs);
    /* In ISO C, enumerated types can be referred to only if already
       defined.  */
    if (pedantic && !COMPLETE_TYPE_P (ret.spec))
*************** c_parser_enum_specifier (c_parser *parse
*** 3065,3073 ****
  /* Parse a struct or union specifier (C90 6.5.2.1, C99 6.7.2.1, C11 6.7.2.1).
  
     struct-or-union-specifier:
!      struct-or-union attributes[opt] identifier[opt]
!        { struct-contents } attributes[opt]
!      struct-or-union attributes[opt] identifier
  
     struct-contents:
       struct-declaration-list
--- 3254,3263 ----
  /* Parse a struct or union specifier (C90 6.5.2.1, C99 6.7.2.1, C11 6.7.2.1).
  
     struct-or-union-specifier:
!      struct-or-union attribute-specifier-sequence[opt] gnu-attributes[opt]
!        identifier[opt] { struct-contents } gnu-attributes[opt]
!      struct-or-union attribute-specifier-sequence[opt] gnu-attributes[opt]
!        identifier
  
     struct-contents:
       struct-declaration-list
*************** static struct c_typespec
*** 3105,3110 ****
--- 3295,3302 ----
  c_parser_struct_or_union_specifier (c_parser *parser)
  {
    struct c_typespec ret;
+   bool have_std_attrs;
+   tree std_attrs = NULL_TREE;
    tree attrs;
    tree ident = NULL_TREE;
    location_t struct_loc;
*************** c_parser_struct_or_union_specifier (c_pa
*** 3123,3129 ****
      }
    struct_loc = c_parser_peek_token (parser)->location;
    c_parser_consume_token (parser);
!   attrs = c_parser_attributes (parser);
  
    /* Set the location in case we create a decl now.  */
    c_parser_set_source_position_from_token (c_parser_peek_token (parser));
--- 3315,3324 ----
      }
    struct_loc = c_parser_peek_token (parser)->location;
    c_parser_consume_token (parser);
!   have_std_attrs = c_parser_nth_token_starts_std_attributes (parser, 1);
!   if (have_std_attrs)
!     std_attrs = c_parser_std_attribute_specifier_sequence (parser);
!   attrs = c_parser_gnu_attributes (parser);
  
    /* Set the location in case we create a decl now.  */
    c_parser_set_source_position_from_token (c_parser_peek_token (parser));
*************** c_parser_struct_or_union_specifier (c_pa
*** 3139,3145 ****
      {
        /* Parse a struct or union definition.  Start the scope of the
  	 tag before parsing components.  */
!       struct c_struct_parse_info *struct_info;
        tree type = start_struct (struct_loc, code, ident, &struct_info);
        tree postfix_attrs;
        /* We chain the components in reverse order, then put them in
--- 3334,3340 ----
      {
        /* Parse a struct or union definition.  Start the scope of the
  	 tag before parsing components.  */
!       class c_struct_parse_info *struct_info;
        tree type = start_struct (struct_loc, code, ident, &struct_info);
        tree postfix_attrs;
        /* We chain the components in reverse order, then put them in
*************** c_parser_struct_or_union_specifier (c_pa
*** 3239,3247 ****
  	         recovered already.  Go on with the next field. */
  	    }
  	}
!       postfix_attrs = c_parser_attributes (parser);
        ret.spec = finish_struct (struct_loc, type, nreverse (contents),
! 				chainon (attrs, postfix_attrs), struct_info);
        ret.kind = ctsk_tagdef;
        ret.expr = NULL_TREE;
        ret.expr_const_operands = true;
--- 3434,3444 ----
  	         recovered already.  Go on with the next field. */
  	    }
  	}
!       postfix_attrs = c_parser_gnu_attributes (parser);
        ret.spec = finish_struct (struct_loc, type, nreverse (contents),
! 				chainon (std_attrs,
! 					 chainon (attrs, postfix_attrs)),
! 				struct_info);
        ret.kind = ctsk_tagdef;
        ret.expr = NULL_TREE;
        ret.expr_const_operands = true;
*************** c_parser_struct_or_union_specifier (c_pa
*** 3257,3263 ****
        ret.expr_const_operands = true;
        return ret;
      }
!   ret = parser_xref_tag (ident_loc, code, ident);
    return ret;
  }
  
--- 3454,3466 ----
        ret.expr_const_operands = true;
        return ret;
      }
!   /* Attributes may only appear when the members are defined or in
!      certain forward declarations.  */
!   if (have_std_attrs && c_parser_next_token_is_not (parser, CPP_SEMICOLON))
!     c_parser_error (parser, "expected %<;%>");
!   /* ??? Existing practice is that GNU attributes are ignored after
!      the struct or union keyword when not defining the members.  */
!   ret = parser_xref_tag (ident_loc, code, ident, have_std_attrs, std_attrs);
    return ret;
  }
  
*************** c_parser_struct_or_union_specifier (c_pa
*** 3265,3286 ****
     *without* the trailing semicolon.
  
     struct-declaration:
!      specifier-qualifier-list struct-declarator-list
       static_assert-declaration-no-semi
  
     specifier-qualifier-list:
       type-specifier specifier-qualifier-list[opt]
       type-qualifier specifier-qualifier-list[opt]
       alignment-specifier specifier-qualifier-list[opt]
!      attributes specifier-qualifier-list[opt]
  
     struct-declarator-list:
       struct-declarator
!      struct-declarator-list , attributes[opt] struct-declarator
  
     struct-declarator:
!      declarator attributes[opt]
!      declarator[opt] : constant-expression attributes[opt]
  
     GNU extensions:
  
--- 3468,3490 ----
     *without* the trailing semicolon.
  
     struct-declaration:
!      attribute-specifier-sequence[opt] specifier-qualifier-list
!        attribute-specifier-sequence[opt] struct-declarator-list
       static_assert-declaration-no-semi
  
     specifier-qualifier-list:
       type-specifier specifier-qualifier-list[opt]
       type-qualifier specifier-qualifier-list[opt]
       alignment-specifier specifier-qualifier-list[opt]
!      gnu-attributes specifier-qualifier-list[opt]
  
     struct-declarator-list:
       struct-declarator
!      struct-declarator-list , gnu-attributes[opt] struct-declarator
  
     struct-declarator:
!      declarator gnu-attributes[opt]
!      declarator[opt] : constant-expression gnu-attributes[opt]
  
     GNU extensions:
  
*************** c_parser_struct_or_union_specifier (c_pa
*** 3289,3295 ****
       specifier-qualifier-list
  
     Unlike the ISO C syntax, semicolons are handled elsewhere.  The use
!    of attributes where shown is a GNU extension.  In GNU C, we accept
     any expression without commas in the syntax (assignment
     expressions, not just conditional expressions); assignment
     expressions will be diagnosed as non-constant.  */
--- 3493,3499 ----
       specifier-qualifier-list
  
     Unlike the ISO C syntax, semicolons are handled elsewhere.  The use
!    of gnu-attributes where shown is a GNU extension.  In GNU C, we accept
     any expression without commas in the syntax (assignment
     expressions, not just conditional expressions); assignment
     expressions will be diagnosed as non-constant.  */
*************** c_parser_struct_declaration (c_parser *p
*** 3325,3331 ****
       of N1731.
       <http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1731.pdf>  */
    c_parser_declspecs (parser, specs, false, true, true,
! 		      true, false, cla_nonabstract_decl);
    if (parser->error)
      return NULL_TREE;
    if (!specs->declspecs_seen_p)
--- 3529,3535 ----
       of N1731.
       <http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1731.pdf>  */
    c_parser_declspecs (parser, specs, false, true, true,
! 		      true, false, true, true, cla_nonabstract_decl);
    if (parser->error)
      return NULL_TREE;
    if (!specs->declspecs_seen_p)
*************** c_parser_struct_declaration (c_parser *p
*** 3409,3415 ****
  	      width = c_parser_expr_no_commas (parser, NULL).value;
  	    }
  	  if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
! 	    postfix_attrs = c_parser_attributes (parser);
  	  d = grokfield (c_parser_peek_token (parser)->location,
  			 declarator, specs, width, &all_prefix_attrs);
  	  decl_attributes (&d, chainon (postfix_attrs,
--- 3613,3619 ----
  	      width = c_parser_expr_no_commas (parser, NULL).value;
  	    }
  	  if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
! 	    postfix_attrs = c_parser_gnu_attributes (parser);
  	  d = grokfield (c_parser_peek_token (parser)->location,
  			 declarator, specs, width, &all_prefix_attrs);
  	  decl_attributes (&d, chainon (postfix_attrs,
*************** c_parser_struct_declaration (c_parser *p
*** 3417,3423 ****
  	  DECL_CHAIN (d) = decls;
  	  decls = d;
  	  if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
! 	    all_prefix_attrs = chainon (c_parser_attributes (parser),
  					prefix_attrs);
  	  else
  	    all_prefix_attrs = prefix_attrs;
--- 3621,3627 ----
  	  DECL_CHAIN (d) = decls;
  	  decls = d;
  	  if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
! 	    all_prefix_attrs = chainon (c_parser_gnu_attributes (parser),
  					prefix_attrs);
  	  else
  	    all_prefix_attrs = prefix_attrs;
*************** c_parser_alignas_specifier (c_parser * p
*** 3563,3569 ****
  
     direct-declarator:
       identifier
!      ( attributes[opt] declarator )
       direct-declarator array-declarator
       direct-declarator ( parameter-type-list )
       direct-declarator ( identifier-list[opt] )
--- 3767,3773 ----
  
     direct-declarator:
       identifier
!      ( gnu-attributes[opt] declarator )
       direct-declarator array-declarator
       direct-declarator ( parameter-type-list )
       direct-declarator ( identifier-list[opt] )
*************** c_parser_alignas_specifier (c_parser * p
*** 3574,3582 ****
  
     type-qualifier-list:
       type-qualifier
!      attributes
       type-qualifier-list type-qualifier
!      type-qualifier-list attributes
  
     array-declarator:
       [ type-qualifier-list[opt] assignment-expression[opt] ]
--- 3778,3786 ----
  
     type-qualifier-list:
       type-qualifier
!      gnu-attributes
       type-qualifier-list type-qualifier
!      type-qualifier-list gnu-attributes
  
     array-declarator:
       [ type-qualifier-list[opt] assignment-expression[opt] ]
*************** c_parser_alignas_specifier (c_parser * p
*** 3593,3600 ****
       parameter-list , parameter-declaration
  
     parameter-declaration:
!      declaration-specifiers declarator attributes[opt]
!      declaration-specifiers abstract-declarator[opt] attributes[opt]
  
     identifier-list:
       identifier
--- 3797,3804 ----
       parameter-list , parameter-declaration
  
     parameter-declaration:
!      declaration-specifiers declarator gnu-attributes[opt]
!      declaration-specifiers abstract-declarator[opt] gnu-attributes[opt]
  
     identifier-list:
       identifier
*************** c_parser_alignas_specifier (c_parser * p
*** 3605,3611 ****
       pointer[opt] direct-abstract-declarator
  
     direct-abstract-declarator:
!      ( attributes[opt] abstract-declarator )
       direct-abstract-declarator[opt] array-declarator
       direct-abstract-declarator[opt] ( parameter-type-list[opt] )
  
--- 3809,3815 ----
       pointer[opt] direct-abstract-declarator
  
     direct-abstract-declarator:
!      ( gnu-attributes[opt] abstract-declarator )
       direct-abstract-declarator[opt] array-declarator
       direct-abstract-declarator[opt] ( parameter-type-list[opt] )
  
*************** c_parser_alignas_specifier (c_parser * p
*** 3623,3629 ****
       parameter-list ;
       parameter-forward-declarations parameter-list ;
  
!    The uses of attributes shown above are GNU extensions.
  
     Some forms of array declarator are not included in C99 in the
     syntax for abstract declarators; these are disallowed elsewhere.
--- 3827,3833 ----
       parameter-list ;
       parameter-forward-declarations parameter-list ;
  
!    The uses of gnu-attributes shown above are GNU extensions.
  
     Some forms of array declarator are not included in C99 in the
     syntax for abstract declarators; these are disallowed elsewhere.
*************** c_parser_declarator (c_parser *parser, b
*** 3643,3649 ****
        struct c_declarator *inner;
        c_parser_consume_token (parser);
        c_parser_declspecs (parser, quals_attrs, false, false, true,
! 			  false, false, cla_prefer_id);
        inner = c_parser_declarator (parser, type_seen_p, kind, seen_id);
        if (inner == NULL)
  	return NULL;
--- 3847,3853 ----
        struct c_declarator *inner;
        c_parser_consume_token (parser);
        c_parser_declspecs (parser, quals_attrs, false, false, true,
! 			  false, false, true, false, cla_prefer_id);
        inner = c_parser_declarator (parser, type_seen_p, kind, seen_id);
        if (inner == NULL)
  	return NULL;
*************** c_parser_direct_declarator (c_parser *pa
*** 3668,3681 ****
       parenthesized declarator.  In an abstract declarator or parameter
       declarator, they could start a parenthesized declarator or a
       parameter list.  To tell which, the open parenthesis and any
!      following attributes must be read.  If a declaration specifier
!      follows, then it is a parameter list; if the specifier is a
!      typedef name, there might be an ambiguity about redeclaring it,
!      which is resolved in the direction of treating it as a typedef
!      name.  If a close parenthesis follows, it is also an empty
!      parameter list, as the syntax does not permit empty abstract
!      declarators.  Otherwise, it is a parenthesized declarator (in
!      which case the analysis may be repeated inside it, recursively).
  
       ??? There is an ambiguity in a parameter declaration "int
       (__attribute__((foo)) x)", where x is not a typedef name: it
--- 3872,3886 ----
       parenthesized declarator.  In an abstract declarator or parameter
       declarator, they could start a parenthesized declarator or a
       parameter list.  To tell which, the open parenthesis and any
!      following gnu-attributes must be read.  If a declaration
!      specifier or standard attributes follow, then it is a parameter
!      list; if the specifier is a typedef name, there might be an
!      ambiguity about redeclaring it, which is resolved in the
!      direction of treating it as a typedef name.  If a close
!      parenthesis follows, it is also an empty parameter list, as the
!      syntax does not permit empty abstract declarators.  Otherwise, it
!      is a parenthesized declarator (in which case the analysis may be
!      repeated inside it, recursively).
  
       ??? There is an ambiguity in a parameter declaration "int
       (__attribute__((foo)) x)", where x is not a typedef name: it
*************** c_parser_direct_declarator (c_parser *pa
*** 3683,3694 ****
       parentheses.  The proper resolution of this ambiguity needs
       documenting.  At present we follow an accident of the old
       parser's implementation, whereby the first parameter must have
!      some declaration specifiers other than just attributes.  Thus as
       a parameter declaration it is treated as a parenthesized
       parameter named x, and as an abstract declarator it is
       rejected.
  
!      ??? Also following the old parser, attributes inside an empty
       parameter list are ignored, making it a list not yielding a
       prototype, rather than giving an error or making it have one
       parameter with implicit type int.
--- 3888,3899 ----
       parentheses.  The proper resolution of this ambiguity needs
       documenting.  At present we follow an accident of the old
       parser's implementation, whereby the first parameter must have
!      some declaration specifiers other than just gnu-attributes.  Thus as
       a parameter declaration it is treated as a parenthesized
       parameter named x, and as an abstract declarator it is
       rejected.
  
!      ??? Also following the old parser, gnu-attributes inside an empty
       parameter list are ignored, making it a list not yielding a
       prototype, rather than giving an error or making it have one
       parameter with implicit type int.
*************** c_parser_direct_declarator (c_parser *pa
*** 3708,3718 ****
        *seen_id = true;
        inner->id_loc = c_parser_peek_token (parser)->location;
        c_parser_consume_token (parser);
        return c_parser_direct_declarator_inner (parser, *seen_id, inner);
      }
  
    if (kind != C_DTR_NORMAL
!       && c_parser_next_token_is (parser, CPP_OPEN_SQUARE))
      {
        struct c_declarator *inner = build_id_declarator (NULL_TREE);
        inner->id_loc = c_parser_peek_token (parser)->location;
--- 3913,3926 ----
        *seen_id = true;
        inner->id_loc = c_parser_peek_token (parser)->location;
        c_parser_consume_token (parser);
+       if (c_parser_nth_token_starts_std_attributes (parser, 1))
+ 	inner->u.id.attrs = c_parser_std_attribute_specifier_sequence (parser);
        return c_parser_direct_declarator_inner (parser, *seen_id, inner);
      }
  
    if (kind != C_DTR_NORMAL
!       && c_parser_next_token_is (parser, CPP_OPEN_SQUARE)
!       && !c_parser_nth_token_starts_std_attributes (parser, 1))
      {
        struct c_declarator *inner = build_id_declarator (NULL_TREE);
        inner->id_loc = c_parser_peek_token (parser)->location;
*************** c_parser_direct_declarator (c_parser *pa
*** 3727,3747 ****
        tree attrs;
        struct c_declarator *inner;
        c_parser_consume_token (parser);
!       attrs = c_parser_attributes (parser);
        if (kind != C_DTR_NORMAL
  	  && (c_parser_next_token_starts_declspecs (parser)
  	      || c_parser_next_token_is (parser, CPP_CLOSE_PAREN)))
  	{
  	  struct c_arg_info *args
  	    = c_parser_parms_declarator (parser, kind == C_DTR_NORMAL,
! 					 attrs);
  	  if (args == NULL)
  	    return NULL;
  	  else
  	    {
! 	      inner
! 		= build_function_declarator (args,
! 					     build_id_declarator (NULL_TREE));
  	      return c_parser_direct_declarator_inner (parser, *seen_id,
  						       inner);
  	    }
--- 3935,3968 ----
        tree attrs;
        struct c_declarator *inner;
        c_parser_consume_token (parser);
!       bool have_gnu_attrs = c_parser_next_token_is_keyword (parser,
! 							    RID_ATTRIBUTE);
!       attrs = c_parser_gnu_attributes (parser);
        if (kind != C_DTR_NORMAL
  	  && (c_parser_next_token_starts_declspecs (parser)
+ 	      || (!have_gnu_attrs
+ 		  && c_parser_nth_token_starts_std_attributes (parser, 1))
  	      || c_parser_next_token_is (parser, CPP_CLOSE_PAREN)))
  	{
  	  struct c_arg_info *args
  	    = c_parser_parms_declarator (parser, kind == C_DTR_NORMAL,
! 					 attrs, have_gnu_attrs);
  	  if (args == NULL)
  	    return NULL;
  	  else
  	    {
! 	      inner = build_id_declarator (NULL_TREE);
! 	      if (!(args->types
! 		    && args->types != error_mark_node
! 		    && TREE_CODE (TREE_VALUE (args->types)) == IDENTIFIER_NODE)
! 		  && c_parser_nth_token_starts_std_attributes (parser, 1))
! 		{
! 		  tree std_attrs
! 		    = c_parser_std_attribute_specifier_sequence (parser);
! 		  if (std_attrs)
! 		    inner = build_attrs_declarator (std_attrs, inner);
! 		}
! 	      inner = build_function_declarator (args, inner);
  	      return c_parser_direct_declarator_inner (parser, *seen_id,
  						       inner);
  	    }
*************** c_parser_direct_declarator_inner (c_pars
*** 3787,3793 ****
  				  struct c_declarator *inner)
  {
    /* Parse a sequence of array declarators and parameter lists.  */
!   if (c_parser_next_token_is (parser, CPP_OPEN_SQUARE))
      {
        location_t brace_loc = c_parser_peek_token (parser)->location;
        struct c_declarator *declarator;
--- 4008,4015 ----
  				  struct c_declarator *inner)
  {
    /* Parse a sequence of array declarators and parameter lists.  */
!   if (c_parser_next_token_is (parser, CPP_OPEN_SQUARE)
!       && !c_parser_nth_token_starts_std_attributes (parser, 1))
      {
        location_t brace_loc = c_parser_peek_token (parser)->location;
        struct c_declarator *declarator;
*************** c_parser_direct_declarator_inner (c_pars
*** 3800,3812 ****
        dimen.original_type = NULL_TREE;
        c_parser_consume_token (parser);
        c_parser_declspecs (parser, quals_attrs, false, false, true,
! 			  false, false, cla_prefer_id);
        static_seen = c_parser_next_token_is_keyword (parser, RID_STATIC);
        if (static_seen)
  	c_parser_consume_token (parser);
        if (static_seen && !quals_attrs->declspecs_seen_p)
  	c_parser_declspecs (parser, quals_attrs, false, false, true,
! 			    false, false, cla_prefer_id);
        if (!quals_attrs->declspecs_seen_p)
  	quals_attrs = NULL;
        /* If "static" is present, there must be an array dimension.
--- 4022,4034 ----
        dimen.original_type = NULL_TREE;
        c_parser_consume_token (parser);
        c_parser_declspecs (parser, quals_attrs, false, false, true,
! 			  false, false, false, false, cla_prefer_id);
        static_seen = c_parser_next_token_is_keyword (parser, RID_STATIC);
        if (static_seen)
  	c_parser_consume_token (parser);
        if (static_seen && !quals_attrs->declspecs_seen_p)
  	c_parser_declspecs (parser, quals_attrs, false, false, true,
! 			    false, false, false, false, cla_prefer_id);
        if (!quals_attrs->declspecs_seen_p)
  	quals_attrs = NULL;
        /* If "static" is present, there must be an array dimension.
*************** c_parser_direct_declarator_inner (c_pars
*** 3858,3863 ****
--- 4080,4092 ----
  					   static_seen, star_seen);
        if (declarator == NULL)
  	return NULL;
+       if (c_parser_nth_token_starts_std_attributes (parser, 1))
+ 	{
+ 	  tree std_attrs
+ 	    = c_parser_std_attribute_specifier_sequence (parser);
+ 	  if (std_attrs)
+ 	    inner = build_attrs_declarator (std_attrs, inner);
+ 	}
        inner = set_array_declarator_inner (declarator, inner);
        return c_parser_direct_declarator_inner (parser, id_present, inner);
      }
*************** c_parser_direct_declarator_inner (c_pars
*** 3866,3877 ****
        tree attrs;
        struct c_arg_info *args;
        c_parser_consume_token (parser);
!       attrs = c_parser_attributes (parser);
!       args = c_parser_parms_declarator (parser, id_present, attrs);
        if (args == NULL)
  	return NULL;
        else
  	{
  	  inner = build_function_declarator (args, inner);
  	  return c_parser_direct_declarator_inner (parser, id_present, inner);
  	}
--- 4095,4119 ----
        tree attrs;
        struct c_arg_info *args;
        c_parser_consume_token (parser);
!       bool have_gnu_attrs = c_parser_next_token_is_keyword (parser,
! 							    RID_ATTRIBUTE);
!       attrs = c_parser_gnu_attributes (parser);
!       args = c_parser_parms_declarator (parser, id_present, attrs,
! 					have_gnu_attrs);
        if (args == NULL)
  	return NULL;
        else
  	{
+ 	  if (!(args->types
+ 		&& args->types != error_mark_node
+ 		&& TREE_CODE (TREE_VALUE (args->types)) == IDENTIFIER_NODE)
+ 	      && c_parser_nth_token_starts_std_attributes (parser, 1))
+ 	    {
+ 	      tree std_attrs
+ 		= c_parser_std_attribute_specifier_sequence (parser);
+ 	      if (std_attrs)
+ 		inner = build_attrs_declarator (std_attrs, inner);
+ 	    }
  	  inner = build_function_declarator (args, inner);
  	  return c_parser_direct_declarator_inner (parser, id_present, inner);
  	}
*************** c_parser_direct_declarator_inner (c_pars
*** 3880,3891 ****
  }
  
  /* Parse a parameter list or identifier list, including the closing
!    parenthesis but not the opening one.  ATTRS are the attributes at
!    the start of the list.  ID_LIST_OK is true if an identifier list is
!    acceptable; such a list must not have attributes at the start.  */
  
  static struct c_arg_info *
! c_parser_parms_declarator (c_parser *parser, bool id_list_ok, tree attrs)
  {
    push_scope ();
    declare_parm_level ();
--- 4122,4137 ----
  }
  
  /* Parse a parameter list or identifier list, including the closing
!    parenthesis but not the opening one.  ATTRS are the gnu-attributes
!    at the start of the list.  ID_LIST_OK is true if an identifier list
!    is acceptable; such a list must not have attributes at the start.
!    HAVE_GNU_ATTRS says whether any gnu-attributes (including empty
!    attributes) were present (in which case standard attributes cannot
!    occur).  */
  
  static struct c_arg_info *
! c_parser_parms_declarator (c_parser *parser, bool id_list_ok, tree attrs,
! 			   bool have_gnu_attrs)
  {
    push_scope ();
    declare_parm_level ();
*************** c_parser_parms_declarator (c_parser *par
*** 3938,3965 ****
      }
    else
      {
!       struct c_arg_info *ret = c_parser_parms_list_declarator (parser, attrs,
! 							       NULL);
        pop_scope ();
        return ret;
      }
  }
  
  /* Parse a parameter list (possibly empty), including the closing
!    parenthesis but not the opening one.  ATTRS are the attributes at
!    the start of the list.  EXPR is NULL or an expression that needs to
!    be evaluated for the side effects of array size expressions in the
!    parameters.  */
  
  static struct c_arg_info *
! c_parser_parms_list_declarator (c_parser *parser, tree attrs, tree expr)
  {
    bool bad_parm = false;
  
    /* ??? Following the old parser, forward parameter declarations may
       use abstract declarators, and if no real parameter declarations
       follow the forward declarations then this is not diagnosed.  Also
!      note as above that attributes are ignored as the only contents of
       the parentheses, or as the only contents after forward
       declarations.  */
    if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
--- 4184,4214 ----
      }
    else
      {
!       struct c_arg_info *ret
! 	= c_parser_parms_list_declarator (parser, attrs, NULL, have_gnu_attrs);
        pop_scope ();
        return ret;
      }
  }
  
  /* Parse a parameter list (possibly empty), including the closing
!    parenthesis but not the opening one.  ATTRS are the gnu-attributes
!    at the start of the list; if HAVE_GNU_ATTRS, there were some such
!    attributes (possibly empty, in which case ATTRS is NULL_TREE),
!    which means standard attributes cannot start the list.  EXPR is
!    NULL or an expression that needs to be evaluated for the side
!    effects of array size expressions in the parameters.  */
  
  static struct c_arg_info *
! c_parser_parms_list_declarator (c_parser *parser, tree attrs, tree expr,
! 				bool have_gnu_attrs)
  {
    bool bad_parm = false;
  
    /* ??? Following the old parser, forward parameter declarations may
       use abstract declarators, and if no real parameter declarations
       follow the forward declarations then this is not diagnosed.  Also
!      note as above that gnu-attributes are ignored as the only contents of
       the parentheses, or as the only contents after forward
       declarations.  */
    if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
*************** c_parser_parms_list_declarator (c_parser
*** 4003,4010 ****
    while (true)
      {
        /* Parse a parameter.  */
!       struct c_parm *parm = c_parser_parameter_declaration (parser, attrs);
        attrs = NULL_TREE;
        if (parm == NULL)
  	bad_parm = true;
        else
--- 4252,4261 ----
    while (true)
      {
        /* Parse a parameter.  */
!       struct c_parm *parm = c_parser_parameter_declaration (parser, attrs,
! 							    have_gnu_attrs);
        attrs = NULL_TREE;
+       have_gnu_attrs = false;
        if (parm == NULL)
  	bad_parm = true;
        else
*************** c_parser_parms_list_declarator (c_parser
*** 4014,4021 ****
  	  tree new_attrs;
  	  c_parser_consume_token (parser);
  	  mark_forward_parm_decls ();
! 	  new_attrs = c_parser_attributes (parser);
! 	  return c_parser_parms_list_declarator (parser, new_attrs, expr);
  	}
        if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
  	{
--- 4265,4275 ----
  	  tree new_attrs;
  	  c_parser_consume_token (parser);
  	  mark_forward_parm_decls ();
! 	  bool new_have_gnu_attrs
! 	    = c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE);
! 	  new_attrs = c_parser_gnu_attributes (parser);
! 	  return c_parser_parms_list_declarator (parser, new_attrs, expr,
! 						 new_have_gnu_attrs);
  	}
        if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
  	{
*************** c_parser_parms_list_declarator (c_parser
*** 4053,4063 ****
      }
  }
  
! /* Parse a parameter declaration.  ATTRS are the attributes at the
!    start of the declaration if it is the first parameter.  */
  
  static struct c_parm *
! c_parser_parameter_declaration (c_parser *parser, tree attrs)
  {
    struct c_declspecs *specs;
    struct c_declarator *declarator;
--- 4307,4320 ----
      }
  }
  
! /* Parse a parameter declaration.  ATTRS are the gnu-attributes at the
!    start of the declaration if it is the first parameter;
!    HAVE_GNU_ATTRS is true if there were any gnu-attributes there (even
!    empty) there.  */
  
  static struct c_parm *
! c_parser_parameter_declaration (c_parser *parser, tree attrs,
! 				bool have_gnu_attrs)
  {
    struct c_declspecs *specs;
    struct c_declarator *declarator;
*************** c_parser_parameter_declaration (c_parser
*** 4069,4075 ****
    while (c_parser_next_token_is (parser, CPP_PRAGMA))
      c_parser_pragma (parser, pragma_param, NULL);
  
!   if (!c_parser_next_token_starts_declspecs (parser))
      {
        c_token *token = c_parser_peek_token (parser);
        if (parser->error)
--- 4326,4333 ----
    while (c_parser_next_token_is (parser, CPP_PRAGMA))
      c_parser_pragma (parser, pragma_param, NULL);
  
!   if (!c_parser_next_token_starts_declspecs (parser)
!       && !c_parser_nth_token_starts_std_attributes (parser, 1))
      {
        c_token *token = c_parser_peek_token (parser);
        if (parser->error)
*************** c_parser_parameter_declaration (c_parser
*** 4111,4117 ****
        attrs = NULL_TREE;
      }
    c_parser_declspecs (parser, specs, true, true, true, true, false,
! 		      cla_nonabstract_decl);
    finish_declspecs (specs);
    pending_xref_error ();
    prefix_attrs = specs->attrs;
--- 4369,4375 ----
        attrs = NULL_TREE;
      }
    c_parser_declspecs (parser, specs, true, true, true, true, false,
! 		      !have_gnu_attrs, true, cla_nonabstract_decl);
    finish_declspecs (specs);
    pending_xref_error ();
    prefix_attrs = specs->attrs;
*************** c_parser_parameter_declaration (c_parser
*** 4125,4131 ****
        return NULL;
      }
    if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
!     postfix_attrs = c_parser_attributes (parser);
  
    /* Generate a location for the parameter, ranging from the start of the
       initial token to the end of the final token.
--- 4383,4389 ----
        return NULL;
      }
    if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
!     postfix_attrs = c_parser_gnu_attributes (parser);
  
    /* Generate a location for the parameter, ranging from the start of the
       initial token to the end of the final token.
*************** c_parser_parameter_declaration (c_parser
*** 4146,4152 ****
    c_declarator *id_declarator = declarator;
    while (id_declarator && id_declarator->kind != cdk_id)
      id_declarator = id_declarator->declarator;
!   location_t caret_loc = (id_declarator->u.id
  			  ? id_declarator->id_loc
  			  : start_loc);
    location_t param_loc = make_location (caret_loc, start_loc, end_loc);
--- 4404,4410 ----
    c_declarator *id_declarator = declarator;
    while (id_declarator && id_declarator->kind != cdk_id)
      id_declarator = id_declarator->declarator;
!   location_t caret_loc = (id_declarator->u.id.id
  			  ? id_declarator->id_loc
  			  : start_loc);
    location_t param_loc = make_location (caret_loc, start_loc, end_loc);
*************** c_parser_parameter_declaration (c_parser
*** 4161,4170 ****
  
     asm-string-literal:
       string-literal
! 
!    ??? At present, following the old parser, the caller needs to have
!    set lex_untranslated_string to 1.  It would be better to follow the
!    C++ parser rather than using this kludge.  */
  
  static tree
  c_parser_asm_string_literal (c_parser *parser)
--- 4419,4425 ----
  
     asm-string-literal:
       string-literal
! */
  
  static tree
  c_parser_asm_string_literal (c_parser *parser)
*************** c_parser_asm_string_literal (c_parser *p
*** 4172,4194 ****
    tree str;
    int save_flag = warn_overlength_strings;
    warn_overlength_strings = 0;
!   if (c_parser_next_token_is (parser, CPP_STRING))
!     {
!       str = c_parser_peek_token (parser)->value;
!       c_parser_consume_token (parser);
!     }
!   else if (c_parser_next_token_is (parser, CPP_WSTRING))
!     {
!       error_at (c_parser_peek_token (parser)->location,
! 		"wide string literal in %<asm%>");
!       str = build_string (1, "");
!       c_parser_consume_token (parser);
!     }
!   else
!     {
!       c_parser_error (parser, "expected string literal");
!       str = NULL_TREE;
!     }
    warn_overlength_strings = save_flag;
    return str;
  }
--- 4427,4433 ----
    tree str;
    int save_flag = warn_overlength_strings;
    warn_overlength_strings = 0;
!   str = c_parser_string_literal (parser, false, false).value;
    warn_overlength_strings = save_flag;
    return str;
  }
*************** c_parser_simple_asm_expr (c_parser *pars
*** 4206,4223 ****
  {
    tree str;
    gcc_assert (c_parser_next_token_is_keyword (parser, RID_ASM));
-   /* ??? Follow the C++ parser rather than using the
-      lex_untranslated_string kludge.  */
-   parser->lex_untranslated_string = true;
    c_parser_consume_token (parser);
    matching_parens parens;
    if (!parens.require_open (parser))
!     {
!       parser->lex_untranslated_string = false;
!       return NULL_TREE;
!     }
    str = c_parser_asm_string_literal (parser);
-   parser->lex_untranslated_string = false;
    if (!parens.require_close (parser))
      {
        c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, NULL);
--- 4445,4455 ----
  {
    tree str;
    gcc_assert (c_parser_next_token_is_keyword (parser, RID_ASM));
    c_parser_consume_token (parser);
    matching_parens parens;
    if (!parens.require_open (parser))
!     return NULL_TREE;
    str = c_parser_asm_string_literal (parser);
    if (!parens.require_close (parser))
      {
        c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, NULL);
*************** c_parser_simple_asm_expr (c_parser *pars
*** 4227,4233 ****
  }
  
  static tree
! c_parser_attribute_any_word (c_parser *parser)
  {
    tree attr_name = NULL_TREE;
  
--- 4459,4465 ----
  }
  
  static tree
! c_parser_gnu_attribute_any_word (c_parser *parser)
  {
    tree attr_name = NULL_TREE;
  
*************** c_parser_attribute_any_word (c_parser *p
*** 4292,4331 ****
    return attr_name;
  }
  
! /* Parse (possibly empty) attributes.  This is a GNU extension.
  
!    attributes:
       empty
!      attributes attribute
  
!    attribute:
!      __attribute__ ( ( attribute-list ) )
  
!    attribute-list:
!      attrib
!      attribute_list , attrib
  
!    attrib:
       empty
       any-word
!      any-word ( identifier )
!      any-word ( identifier , nonempty-expr-list )
!      any-word ( expr-list )
  
!    where the "identifier" must not be declared as a type, and
!    "any-word" may be any identifier (including one declared as a
     type), a reserved word storage class specifier, type specifier or
     type qualifier.  ??? This still leaves out most reserved keywords
!    (following the old parser), shouldn't we include them, and why not
!    allow identifiers declared as types to start the arguments?
     When EXPECT_COMMA is true, expect the attribute to be preceded
     by a comma and fail if it isn't.
     When EMPTY_OK is true, allow and consume any number of consecutive
     commas with no attributes in between.  */
  
  static tree
! c_parser_attribute (c_parser *parser, tree attrs,
! 		    bool expect_comma = false, bool empty_ok = true)
  {
    bool comma_first = c_parser_next_token_is (parser, CPP_COMMA);
    if (!comma_first
--- 4524,4638 ----
    return attr_name;
  }
  
! /* Parse attribute arguments.  This is a common form of syntax
!    covering all currently valid GNU and standard attributes.
  
!    gnu-attribute-arguments:
!      identifier
!      identifier , nonempty-expr-list
!      expr-list
! 
!    where the "identifier" must not be declared as a type.  ??? Why not
!    allow identifiers declared as types to start the arguments?  */
! 
! static tree
! c_parser_attribute_arguments (c_parser *parser, bool takes_identifier,
! 			      bool require_string, bool allow_empty_args)
! {
!   vec<tree, va_gc> *expr_list;
!   tree attr_args;
!   /* Parse the attribute contents.  If they start with an
!      identifier which is followed by a comma or close
!      parenthesis, then the arguments start with that
!      identifier; otherwise they are an expression list.
!      In objective-c the identifier may be a classname.  */
!   if (c_parser_next_token_is (parser, CPP_NAME)
!       && (c_parser_peek_token (parser)->id_kind == C_ID_ID
! 	  || (c_dialect_objc ()
! 	      && c_parser_peek_token (parser)->id_kind
! 	      == C_ID_CLASSNAME))
!       && ((c_parser_peek_2nd_token (parser)->type == CPP_COMMA)
! 	  || (c_parser_peek_2nd_token (parser)->type
! 	      == CPP_CLOSE_PAREN))
!       && (takes_identifier
! 	  || (c_dialect_objc ()
! 	      && c_parser_peek_token (parser)->id_kind
! 	      == C_ID_CLASSNAME)))
!     {
!       tree arg1 = c_parser_peek_token (parser)->value;
!       c_parser_consume_token (parser);
!       if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
! 	attr_args = build_tree_list (NULL_TREE, arg1);
!       else
! 	{
! 	  tree tree_list;
! 	  c_parser_consume_token (parser);
! 	  expr_list = c_parser_expr_list (parser, false, true,
! 					  NULL, NULL, NULL, NULL);
! 	  tree_list = build_tree_list_vec (expr_list);
! 	  attr_args = tree_cons (NULL_TREE, arg1, tree_list);
! 	  release_tree_vector (expr_list);
! 	}
!     }
!   else
!     {
!       if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
! 	{
! 	  if (!allow_empty_args)
! 	    error_at (c_parser_peek_token (parser)->location,
! 		      "parentheses must be omitted if "
! 		      "attribute argument list is empty");
! 	  attr_args = NULL_TREE;
! 	}
!       else if (require_string)
! 	{
! 	  /* The only valid argument for this attribute is a string
! 	     literal.  Handle this specially here to avoid accepting
! 	     string literals with excess parentheses.  */
! 	  tree string = c_parser_string_literal (parser, false, true).value;
! 	  attr_args = build_tree_list (NULL_TREE, string);
! 	}
!       else
! 	{
! 	  expr_list = c_parser_expr_list (parser, false, true,
! 					  NULL, NULL, NULL, NULL);
! 	  attr_args = build_tree_list_vec (expr_list);
! 	  release_tree_vector (expr_list);
! 	}
!     }
!   return attr_args;
! }
! 
! /* Parse (possibly empty) gnu-attributes.  This is a GNU extension.
! 
!    gnu-attributes:
       empty
!      gnu-attributes gnu-attribute
  
!    gnu-attribute:
!      __attribute__ ( ( gnu-attribute-list ) )
  
!    gnu-attribute-list:
!      gnu-attrib
!      gnu-attribute_list , gnu-attrib
  
!    gnu-attrib:
       empty
       any-word
!      any-word ( gnu-attribute-arguments )
  
!    where "any-word" may be any identifier (including one declared as a
     type), a reserved word storage class specifier, type specifier or
     type qualifier.  ??? This still leaves out most reserved keywords
!    (following the old parser), shouldn't we include them?
     When EXPECT_COMMA is true, expect the attribute to be preceded
     by a comma and fail if it isn't.
     When EMPTY_OK is true, allow and consume any number of consecutive
     commas with no attributes in between.  */
  
  static tree
! c_parser_gnu_attribute (c_parser *parser, tree attrs,
! 			bool expect_comma = false, bool empty_ok = true)
  {
    bool comma_first = c_parser_next_token_is (parser, CPP_COMMA);
    if (!comma_first
*************** c_parser_attribute (c_parser *parser, tr
*** 4340,4346 ****
  	return attrs;
      }
  
!   tree attr_name = c_parser_attribute_any_word (parser);
    if (attr_name == NULL_TREE)
      return NULL_TREE;
  
--- 4647,4653 ----
  	return attrs;
      }
  
!   tree attr_name = c_parser_gnu_attribute_any_word (parser);
    if (attr_name == NULL_TREE)
      return NULL_TREE;
  
*************** c_parser_attribute (c_parser *parser, tr
*** 4365,4424 ****
      }
    c_parser_consume_token (parser);
  
!   vec<tree, va_gc> *expr_list;
!   tree attr_args;
!   /* Parse the attribute contents.  If they start with an
!      identifier which is followed by a comma or close
!      parenthesis, then the arguments start with that
!      identifier; otherwise they are an expression list.
!      In objective-c the identifier may be a classname.  */
!   if (c_parser_next_token_is (parser, CPP_NAME)
!       && (c_parser_peek_token (parser)->id_kind == C_ID_ID
! 	  || (c_dialect_objc ()
! 	      && c_parser_peek_token (parser)->id_kind
! 	      == C_ID_CLASSNAME))
!       && ((c_parser_peek_2nd_token (parser)->type == CPP_COMMA)
! 	  || (c_parser_peek_2nd_token (parser)->type
! 	      == CPP_CLOSE_PAREN))
!       && (attribute_takes_identifier_p (attr_name)
! 	  || (c_dialect_objc ()
! 	      && c_parser_peek_token (parser)->id_kind
! 	      == C_ID_CLASSNAME)))
!     {
!       tree arg1 = c_parser_peek_token (parser)->value;
!       c_parser_consume_token (parser);
!       if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
! 	attr_args = build_tree_list (NULL_TREE, arg1);
!       else
! 	{
! 	  tree tree_list;
! 	  c_parser_consume_token (parser);
! 	  expr_list = c_parser_expr_list (parser, false, true,
! 					  NULL, NULL, NULL, NULL);
! 	  tree_list = build_tree_list_vec (expr_list);
! 	  attr_args = tree_cons (NULL_TREE, arg1, tree_list);
! 	  release_tree_vector (expr_list);
! 	}
!     }
!   else
!     {
!       if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
! 	attr_args = NULL_TREE;
!       else
! 	{
! 	  expr_list = c_parser_expr_list (parser, false, true,
! 					  NULL, NULL, NULL, NULL);
! 	  attr_args = build_tree_list_vec (expr_list);
! 	  release_tree_vector (expr_list);
! 	}
!     }
  
    attr = build_tree_list (attr_name, attr_args);
    if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
      c_parser_consume_token (parser);
    else
      {
-       parser->lex_untranslated_string = false;
        c_parser_skip_until_found (parser, CPP_CLOSE_PAREN,
  				 "expected %<)%>");
        return error_mark_node;
--- 4672,4687 ----
      }
    c_parser_consume_token (parser);
  
!   tree attr_args
!     = c_parser_attribute_arguments (parser,
! 				    attribute_takes_identifier_p (attr_name),
! 				    false, true);
  
    attr = build_tree_list (attr_name, attr_args);
    if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
      c_parser_consume_token (parser);
    else
      {
        c_parser_skip_until_found (parser, CPP_CLOSE_PAREN,
  				 "expected %<)%>");
        return error_mark_node;
*************** c_parser_attribute (c_parser *parser, tr
*** 4439,4463 ****
  }
  
  static tree
! c_parser_attributes (c_parser *parser)
  {
    tree attrs = NULL_TREE;
    while (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
      {
!       /* ??? Follow the C++ parser rather than using the
! 	 lex_untranslated_string kludge.  */
!       parser->lex_untranslated_string = true;
        /* Consume the `__attribute__' keyword.  */
        c_parser_consume_token (parser);
        /* Look for the two `(' tokens.  */
        if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>"))
  	{
! 	  parser->lex_untranslated_string = false;
  	  return attrs;
  	}
        if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>"))
  	{
! 	  parser->lex_untranslated_string = false;
  	  c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, NULL);
  	  return attrs;
  	}
--- 4702,4725 ----
  }
  
  static tree
! c_parser_gnu_attributes (c_parser *parser)
  {
    tree attrs = NULL_TREE;
    while (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
      {
!       bool save_translate_strings_p = parser->translate_strings_p;
!       parser->translate_strings_p = false;
        /* Consume the `__attribute__' keyword.  */
        c_parser_consume_token (parser);
        /* Look for the two `(' tokens.  */
        if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>"))
  	{
! 	  parser->translate_strings_p = save_translate_strings_p;
  	  return attrs;
  	}
        if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>"))
  	{
! 	  parser->translate_strings_p = save_translate_strings_p;
  	  c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, NULL);
  	  return attrs;
  	}
*************** c_parser_attributes (c_parser *parser)
*** 4466,4472 ****
        for (bool expect_comma = false; ; expect_comma = true)
  	{
  	  /* Parse a single attribute.  */
! 	  tree attr = c_parser_attribute (parser, attrs, expect_comma);
  	  if (attr == error_mark_node)
  	    return attrs;
  	  if (!attr)
--- 4728,4734 ----
        for (bool expect_comma = false; ; expect_comma = true)
  	{
  	  /* Parse a single attribute.  */
! 	  tree attr = c_parser_gnu_attribute (parser, attrs, expect_comma);
  	  if (attr == error_mark_node)
  	    return attrs;
  	  if (!attr)
*************** c_parser_attributes (c_parser *parser)
*** 4479,4485 ****
  	c_parser_consume_token (parser);
        else
  	{
! 	  parser->lex_untranslated_string = false;
  	  c_parser_skip_until_found (parser, CPP_CLOSE_PAREN,
  				     "expected %<)%>");
  	  return attrs;
--- 4741,4747 ----
  	c_parser_consume_token (parser);
        else
  	{
! 	  parser->translate_strings_p = save_translate_strings_p;
  	  c_parser_skip_until_found (parser, CPP_CLOSE_PAREN,
  				     "expected %<)%>");
  	  return attrs;
*************** c_parser_attributes (c_parser *parser)
*** 4488,4504 ****
  	c_parser_consume_token (parser);
        else
  	{
! 	  parser->lex_untranslated_string = false;
  	  c_parser_skip_until_found (parser, CPP_CLOSE_PAREN,
  				     "expected %<)%>");
  	  return attrs;
  	}
!       parser->lex_untranslated_string = false;
      }
  
    return attrs;
  }
  
  /* Parse a type name (C90 6.5.5, C99 6.7.6, C11 6.7.7).  ALIGNAS_OK
     says whether alignment specifiers are OK (only in cases that might
     be the type name of a compound literal).
--- 4750,5139 ----
  	c_parser_consume_token (parser);
        else
  	{
! 	  parser->translate_strings_p = save_translate_strings_p;
  	  c_parser_skip_until_found (parser, CPP_CLOSE_PAREN,
  				     "expected %<)%>");
  	  return attrs;
  	}
!       parser->translate_strings_p = save_translate_strings_p;
      }
  
    return attrs;
  }
  
+ /* Parse an optional balanced token sequence.
+ 
+    balanced-token-sequence:
+      balanced-token
+      balanced-token-sequence balanced-token
+ 
+    balanced-token:
+      ( balanced-token-sequence[opt] )
+      [ balanced-token-sequence[opt] ]
+      { balanced-token-sequence[opt] }
+      any token other than ()[]{}
+ */
+ 
+ static void
+ c_parser_balanced_token_sequence (c_parser *parser)
+ {
+   while (true)
+     {
+       c_token *token = c_parser_peek_token (parser);
+       switch (token->type)
+ 	{
+ 	case CPP_OPEN_BRACE:
+ 	  {
+ 	    matching_braces braces;
+ 	    braces.consume_open (parser);
+ 	    c_parser_balanced_token_sequence (parser);
+ 	    braces.require_close (parser);
+ 	    break;
+ 	  }
+ 
+ 	case CPP_OPEN_PAREN:
+ 	  {
+ 	    matching_parens parens;
+ 	    parens.consume_open (parser);
+ 	    c_parser_balanced_token_sequence (parser);
+ 	    parens.require_close (parser);
+ 	    break;
+ 	  }
+ 
+ 	case CPP_OPEN_SQUARE:
+ 	  c_parser_consume_token (parser);
+ 	  c_parser_balanced_token_sequence (parser);
+ 	  c_parser_require (parser, CPP_CLOSE_SQUARE, "expected %<]%>");
+ 	  break;
+ 
+ 	case CPP_CLOSE_BRACE:
+ 	case CPP_CLOSE_PAREN:
+ 	case CPP_CLOSE_SQUARE:
+ 	case CPP_EOF:
+ 	  return;
+ 
+ 	default:
+ 	  c_parser_consume_token (parser);
+ 	  break;
+ 	}
+     }
+ }
+ 
+ /* Parse standard (C2X) attributes (including GNU attributes in the
+    gnu:: namespace).
+ 
+    attribute-specifier-sequence:
+      attribute-specifier-sequence[opt] attribute-specifier
+ 
+    attribute-specifier:
+      [ [ attribute-list ] ]
+ 
+    attribute-list:
+      attribute[opt]
+      attribute-list, attribute[opt]
+ 
+    attribute:
+      attribute-token attribute-argument-clause[opt]
+ 
+    attribute-token:
+      standard-attribute
+      attribute-prefixed-token
+ 
+    standard-attribute:
+      identifier
+ 
+    attribute-prefixed-token:
+      attribute-prefix :: identifier
+ 
+    attribute-prefix:
+      identifier
+ 
+    attribute-argument-clause:
+      ( balanced-token-sequence[opt] )
+ 
+    Keywords are accepted as identifiers for this purpose.
+ */
+ 
+ static tree
+ c_parser_std_attribute (c_parser *parser, bool for_tm)
+ {
+   c_token *token = c_parser_peek_token (parser);
+   tree ns, name, attribute;
+ 
+   /* Parse the attribute-token.  */
+   if (token->type != CPP_NAME && token->type != CPP_KEYWORD)
+     {
+       c_parser_error (parser, "expected identifier");
+       return error_mark_node;
+     }
+   name = canonicalize_attr_name (token->value);
+   c_parser_consume_token (parser);
+   if (c_parser_next_token_is (parser, CPP_SCOPE))
+     {
+       ns = name;
+       c_parser_consume_token (parser);
+       token = c_parser_peek_token (parser);
+       if (token->type != CPP_NAME && token->type != CPP_KEYWORD)
+ 	{
+ 	  c_parser_error (parser, "expected identifier");
+ 	  return error_mark_node;
+ 	}
+       name = canonicalize_attr_name (token->value);
+       c_parser_consume_token (parser);
+     }
+   else
+     ns = NULL_TREE;
+   attribute = build_tree_list (build_tree_list (ns, name), NULL_TREE);
+ 
+   /* Parse the arguments, if any.  */
+   const attribute_spec *as = lookup_attribute_spec (TREE_PURPOSE (attribute));
+   if (c_parser_next_token_is_not (parser, CPP_OPEN_PAREN))
+     goto out;
+   {
+     location_t open_loc = c_parser_peek_token (parser)->location;
+     matching_parens parens;
+     parens.consume_open (parser);
+     if ((as && as->max_length == 0)
+ 	/* Special-case the transactional-memory attribute "outer",
+ 	   which is specially handled but not registered as an
+ 	   attribute, to avoid allowing arbitrary balanced token
+ 	   sequences as arguments.  */
+ 	|| is_attribute_p ("outer", name))
+       {
+ 	error_at (open_loc, "%qE attribute does not take any arguments", name);
+ 	parens.skip_until_found_close (parser);
+ 	return error_mark_node;
+       }
+     if (as)
+       {
+ 	bool takes_identifier
+ 	  = (ns != NULL_TREE
+ 	     && strcmp (IDENTIFIER_POINTER (ns), "gnu") == 0
+ 	     && attribute_takes_identifier_p (name));
+ 	bool require_string
+ 	  = (ns == NULL_TREE
+ 	     && strcmp (IDENTIFIER_POINTER (name), "deprecated") == 0);
+ 	TREE_VALUE (attribute)
+ 	  = c_parser_attribute_arguments (parser, takes_identifier,
+ 					  require_string, false);
+       }
+     else
+       c_parser_balanced_token_sequence (parser);
+     parens.require_close (parser);
+   }
+  out:
+   if (ns == NULL_TREE && !for_tm && !as && !is_attribute_p ("nodiscard", name))
+     {
+       /* An attribute with standard syntax and no namespace specified
+ 	 is a constraint violation if it is not one of the known
+ 	 standard attributes (of which nodiscard is the only one
+ 	 without a handler in GCC).  Diagnose it here with a pedwarn
+ 	 and then discard it to prevent a duplicate warning later.  */
+       pedwarn (input_location, OPT_Wattributes, "%qE attribute ignored",
+ 	       name);
+       return error_mark_node;
+     }
+   return attribute;
+ }
+ 
+ static tree
+ c_parser_std_attribute_specifier (c_parser *parser, bool for_tm)
+ {
+   bool seen_deprecated = false;
+   bool seen_fallthrough = false;
+   bool seen_maybe_unused = false;
+   location_t loc = c_parser_peek_token (parser)->location;
+   if (!c_parser_require (parser, CPP_OPEN_SQUARE, "expected %<[%>"))
+     return NULL_TREE;
+   if (!c_parser_require (parser, CPP_OPEN_SQUARE, "expected %<[%>"))
+     {
+       c_parser_skip_until_found (parser, CPP_CLOSE_SQUARE, "expected %<]%>");
+       return NULL_TREE;
+     }
+   if (!for_tm)
+     pedwarn_c11 (loc, OPT_Wpedantic,
+ 		 "ISO C does not support %<[[]]%> attributes before C2X");
+   tree attributes = NULL_TREE;
+   while (true)
+     {
+       c_token *token = c_parser_peek_token (parser);
+       if (token->type == CPP_CLOSE_SQUARE)
+ 	break;
+       if (token->type == CPP_COMMA)
+ 	{
+ 	  c_parser_consume_token (parser);
+ 	  continue;
+ 	}
+       tree attribute = c_parser_std_attribute (parser, for_tm);
+       if (attribute != error_mark_node)
+ 	{
+ 	  bool duplicate = false;
+ 	  tree name = get_attribute_name (attribute);
+ 	  tree ns = get_attribute_namespace (attribute);
+ 	  if (ns == NULL_TREE)
+ 	    {
+ 	      /* Some standard attributes may appear at most once in
+ 		 each attribute list.  Diagnose duplicates and remove
+ 		 them from the list to avoid subsequent diagnostics
+ 		 such as the more general one for multiple
+ 		 "fallthrough" attributes in the same place (including
+ 		 in separate attribute lists in the same attribute
+ 		 specifier sequence, which is not a constraint
+ 		 violation).  */
+ 	      if (is_attribute_p ("deprecated", name))
+ 		{
+ 		  if (seen_deprecated)
+ 		    {
+ 		      error ("attribute %<deprecated%> can appear at most "
+ 			     "once in an attribute-list");
+ 		      duplicate = true;
+ 		    }
+ 		  seen_deprecated = true;
+ 		}
+ 	      else if (is_attribute_p ("fallthrough", name))
+ 		{
+ 		  if (seen_fallthrough)
+ 		    {
+ 		      error ("attribute %<fallthrough%> can appear at most "
+ 			     "once in an attribute-list");
+ 		      duplicate = true;
+ 		    }
+ 		  seen_fallthrough = true;
+ 		}
+ 	      else if (is_attribute_p ("maybe_unused", name))
+ 		{
+ 		  if (seen_maybe_unused)
+ 		    {
+ 		      error ("attribute %<maybe_unused%> can appear at most "
+ 			     "once in an attribute-list");
+ 		      duplicate = true;
+ 		    }
+ 		  seen_maybe_unused = true;
+ 		}
+ 	    }
+ 	  if (!duplicate)
+ 	    {
+ 	      TREE_CHAIN (attribute) = attributes;
+ 	      attributes = attribute;
+ 	    }
+ 	}
+       if (c_parser_next_token_is_not (parser, CPP_COMMA))
+ 	break;
+     }
+   c_parser_skip_until_found (parser, CPP_CLOSE_SQUARE, "expected %<]%>");
+   c_parser_skip_until_found (parser, CPP_CLOSE_SQUARE, "expected %<]%>");
+   return nreverse (attributes);
+ }
+ 
+ /* Look past an optional balanced token sequence of raw look-ahead
+    tokens starting with the *Nth token.  *N is updated to point to the
+    following token.  Return true if such a sequence was found, false
+    if the tokens parsed were not balanced.  */
+ 
+ static bool
+ c_parser_check_balanced_raw_token_sequence (c_parser *parser, unsigned int *n)
+ {
+   while (true)
+     {
+       c_token *token = c_parser_peek_nth_token_raw (parser, *n);
+       switch (token->type)
+ 	{
+ 	case CPP_OPEN_BRACE:
+ 	  {
+ 	    ++*n;
+ 	    if (c_parser_check_balanced_raw_token_sequence (parser, n))
+ 	      {
+ 		token = c_parser_peek_nth_token_raw (parser, *n);
+ 		if (token->type == CPP_CLOSE_BRACE)
+ 		  ++*n;
+ 		else
+ 		  return false;
+ 	      }
+ 	    else
+ 	      return false;
+ 	    break;
+ 	  }
+ 
+ 	case CPP_OPEN_PAREN:
+ 	  {
+ 	    ++*n;
+ 	    if (c_parser_check_balanced_raw_token_sequence (parser, n))
+ 	      {
+ 		token = c_parser_peek_nth_token_raw (parser, *n);
+ 		if (token->type == CPP_CLOSE_PAREN)
+ 		  ++*n;
+ 		else
+ 		  return false;
+ 	      }
+ 	    else
+ 	      return false;
+ 	    break;
+ 	  }
+ 
+ 	case CPP_OPEN_SQUARE:
+ 	  {
+ 	    ++*n;
+ 	    if (c_parser_check_balanced_raw_token_sequence (parser, n))
+ 	      {
+ 		token = c_parser_peek_nth_token_raw (parser, *n);
+ 		if (token->type == CPP_CLOSE_SQUARE)
+ 		  ++*n;
+ 		else
+ 		  return false;
+ 	      }
+ 	    else
+ 	      return false;
+ 	    break;
+ 	  }
+ 
+ 	case CPP_CLOSE_BRACE:
+ 	case CPP_CLOSE_PAREN:
+ 	case CPP_CLOSE_SQUARE:
+ 	case CPP_EOF:
+ 	  return true;
+ 
+ 	default:
+ 	  ++*n;
+ 	  break;
+ 	}
+     }
+ }
+ 
+ /* Return whether standard attributes start with the Nth token.  */
+ 
+ static bool
+ c_parser_nth_token_starts_std_attributes (c_parser *parser, unsigned int n)
+ {
+   if (!(c_parser_peek_nth_token (parser, n)->type == CPP_OPEN_SQUARE
+ 	&& c_parser_peek_nth_token (parser, n + 1)->type == CPP_OPEN_SQUARE))
+     return false;
+   /* In C, '[[' must start attributes.  In Objective-C, we need to
+      check whether '[[' is matched by ']]'.  */
+   if (!c_dialect_objc ())
+     return true;
+   n += 2;
+   if (!c_parser_check_balanced_raw_token_sequence (parser, &n))
+     return false;
+   c_token *token = c_parser_peek_nth_token_raw (parser, n);
+   if (token->type != CPP_CLOSE_SQUARE)
+     return false;
+   token = c_parser_peek_nth_token_raw (parser, n + 1);
+   return token->type == CPP_CLOSE_SQUARE;
+ }
+ 
+ static tree
+ c_parser_std_attribute_specifier_sequence (c_parser *parser)
+ {
+   tree attributes = NULL_TREE;
+   do
+     {
+       tree attrs = c_parser_std_attribute_specifier (parser, false);
+       attributes = chainon (attributes, attrs);
+     }
+   while (c_parser_nth_token_starts_std_attributes (parser, 1));
+   return attributes;
+ }
+ 
  /* Parse a type name (C90 6.5.5, C99 6.7.6, C11 6.7.7).  ALIGNAS_OK
     says whether alignment specifiers are OK (only in cases that might
     be the type name of a compound literal).
*************** c_parser_type_name (c_parser *parser, bo
*** 4515,4521 ****
    struct c_type_name *ret;
    bool dummy = false;
    c_parser_declspecs (parser, specs, false, true, true, alignas_ok, false,
! 		      cla_prefer_type);
    if (!specs->declspecs_seen_p)
      {
        c_parser_error (parser, "expected specifier-qualifier-list");
--- 5150,5156 ----
    struct c_type_name *ret;
    bool dummy = false;
    c_parser_declspecs (parser, specs, false, true, true, alignas_ok, false,
! 		      false, true, cla_prefer_type);
    if (!specs->declspecs_seen_p)
      {
        c_parser_error (parser, "expected specifier-qualifier-list");
*************** c_parser_initval (c_parser *parser, stru
*** 4937,4944 ****
     GNU syntax also permits (not shown above) labels at the end of
     compound statements, which yield an error.  We don't allow labels
     on declarations; this might seem like a natural extension, but
!    there would be a conflict between attributes on the label and
!    prefix attributes on the declaration.  ??? The syntax follows the
     old parser in requiring something after label declarations.
     Although they are erroneous if the labels declared aren't defined,
     is it useful for the syntax to be this way?
--- 5572,5579 ----
     GNU syntax also permits (not shown above) labels at the end of
     compound statements, which yield an error.  We don't allow labels
     on declarations; this might seem like a natural extension, but
!    there would be a conflict between gnu-attributes on the label and
!    prefix gnu-attributes on the declaration.  ??? The syntax follows the
     old parser in requiring something after label declarations.
     Although they are erroneous if the labels declared aren't defined,
     is it useful for the syntax to be this way?
*************** c_parser_initval (c_parser *parser, stru
*** 4965,4971 ****
       cancellation-point-directive  */
  
  static tree
! c_parser_compound_statement (c_parser *parser)
  {
    tree stmt;
    location_t brace_loc;
--- 5600,5606 ----
       cancellation-point-directive  */
  
  static tree
! c_parser_compound_statement (c_parser *parser, location_t *endlocp)
  {
    tree stmt;
    location_t brace_loc;
*************** c_parser_compound_statement (c_parser *p
*** 4979,4985 ****
        return error_mark_node;
      }
    stmt = c_begin_compound_stmt (true);
!   c_parser_compound_statement_nostart (parser);
  
    return c_end_compound_stmt (brace_loc, stmt, true);
  }
--- 5614,5622 ----
        return error_mark_node;
      }
    stmt = c_begin_compound_stmt (true);
!   location_t end_loc = c_parser_compound_statement_nostart (parser);
!   if (endlocp)
!     *endlocp = end_loc;
  
    return c_end_compound_stmt (brace_loc, stmt, true);
  }
*************** c_parser_compound_statement (c_parser *p
*** 4988,4994 ****
     used for parsing both compound statements and statement expressions
     (which follow different paths to handling the opening).  */
  
! static void
  c_parser_compound_statement_nostart (c_parser *parser)
  {
    bool last_stmt = false;
--- 5625,5631 ----
     used for parsing both compound statements and statement expressions
     (which follow different paths to handling the opening).  */
  
! static location_t
  c_parser_compound_statement_nostart (c_parser *parser)
  {
    bool last_stmt = false;
*************** c_parser_compound_statement_nostart (c_p
*** 4997,5005 ****
    location_t label_loc = UNKNOWN_LOCATION;  /* Quiet warning.  */
    if (c_parser_next_token_is (parser, CPP_CLOSE_BRACE))
      {
!       add_debug_begin_stmt (c_parser_peek_token (parser)->location);
        c_parser_consume_token (parser);
!       return;
      }
    mark_valid_location_for_stdc_pragma (true);
    if (c_parser_next_token_is_keyword (parser, RID_LABEL))
--- 5634,5643 ----
    location_t label_loc = UNKNOWN_LOCATION;  /* Quiet warning.  */
    if (c_parser_next_token_is (parser, CPP_CLOSE_BRACE))
      {
!       location_t endloc = c_parser_peek_token (parser)->location;
!       add_debug_begin_stmt (endloc);
        c_parser_consume_token (parser);
!       return endloc;
      }
    mark_valid_location_for_stdc_pragma (true);
    if (c_parser_next_token_is_keyword (parser, RID_LABEL))
*************** c_parser_compound_statement_nostart (c_p
*** 5040,5057 ****
      {
        mark_valid_location_for_stdc_pragma (save_valid_for_pragma);
        c_parser_error (parser, "expected declaration or statement");
        c_parser_consume_token (parser);
!       return;
      }
    while (c_parser_next_token_is_not (parser, CPP_CLOSE_BRACE))
      {
        location_t loc = c_parser_peek_token (parser)->location;
        loc = expansion_point_location_if_in_system_header (loc);
        if (c_parser_next_token_is_keyword (parser, RID_CASE)
  	  || c_parser_next_token_is_keyword (parser, RID_DEFAULT)
  	  || (c_parser_next_token_is (parser, CPP_NAME)
  	      && c_parser_peek_2nd_token (parser)->type == CPP_COLON))
  	{
  	  if (c_parser_next_token_is_keyword (parser, RID_CASE))
  	    label_loc = c_parser_peek_2nd_token (parser)->location;
  	  else
--- 5678,5703 ----
      {
        mark_valid_location_for_stdc_pragma (save_valid_for_pragma);
        c_parser_error (parser, "expected declaration or statement");
+       location_t endloc = c_parser_peek_token (parser)->location;
        c_parser_consume_token (parser);
!       return endloc;
      }
    while (c_parser_next_token_is_not (parser, CPP_CLOSE_BRACE))
      {
        location_t loc = c_parser_peek_token (parser)->location;
        loc = expansion_point_location_if_in_system_header (loc);
+       /* Standard attributes may start a statement or a declaration.  */
+       bool have_std_attrs
+ 	= c_parser_nth_token_starts_std_attributes (parser, 1);
+       tree std_attrs = NULL_TREE;
+       if (have_std_attrs)
+ 	std_attrs = c_parser_std_attribute_specifier_sequence (parser);
        if (c_parser_next_token_is_keyword (parser, RID_CASE)
  	  || c_parser_next_token_is_keyword (parser, RID_DEFAULT)
  	  || (c_parser_next_token_is (parser, CPP_NAME)
  	      && c_parser_peek_2nd_token (parser)->type == CPP_COLON))
  	{
+ 	  c_warn_unused_attributes (std_attrs);
  	  if (c_parser_next_token_is_keyword (parser, RID_CASE))
  	    label_loc = c_parser_peek_2nd_token (parser)->location;
  	  else
*************** c_parser_compound_statement_nostart (c_p
*** 5062,5075 ****
  	  c_parser_label (parser);
  	}
        else if (!last_label
! 	       && c_parser_next_tokens_start_declaration (parser))
  	{
  	  last_label = false;
  	  mark_valid_location_for_stdc_pragma (false);
  	  bool fallthru_attr_p = false;
! 	  c_parser_declaration_or_fndef (parser, true, true, true, true,
! 					 true, NULL, vNULL, NULL,
! 					 &fallthru_attr_p);
  	  if (last_stmt && !fallthru_attr_p)
  	    pedwarn_c90 (loc, OPT_Wdeclaration_after_statement,
  			 "ISO C90 forbids mixed declarations and code");
--- 5708,5724 ----
  	  c_parser_label (parser);
  	}
        else if (!last_label
! 	       && (c_parser_next_tokens_start_declaration (parser)
! 		   || (have_std_attrs
! 		       && c_parser_next_token_is (parser, CPP_SEMICOLON))))
  	{
  	  last_label = false;
  	  mark_valid_location_for_stdc_pragma (false);
  	  bool fallthru_attr_p = false;
! 	  c_parser_declaration_or_fndef (parser, true, !have_std_attrs,
! 					 true, true, true, NULL,
! 					 vNULL, have_std_attrs, std_attrs,
! 					 NULL, &fallthru_attr_p);
  	  if (last_stmt && !fallthru_attr_p)
  	    pedwarn_c90 (loc, OPT_Wdeclaration_after_statement,
  			 "ISO C90 forbids mixed declarations and code");
*************** c_parser_compound_statement_nostart (c_p
*** 5081,5092 ****
  	  /* __extension__ can start a declaration, but is also an
  	     unary operator that can start an expression.  Consume all
  	     but the last of a possible series of __extension__ to
! 	     determine which.  */
  	  while (c_parser_peek_2nd_token (parser)->type == CPP_KEYWORD
  		 && (c_parser_peek_2nd_token (parser)->keyword
  		     == RID_EXTENSION))
  	    c_parser_consume_token (parser);
! 	  if (c_token_starts_declaration (c_parser_peek_2nd_token (parser)))
  	    {
  	      int ext;
  	      ext = disable_extension_diagnostics ();
--- 5730,5746 ----
  	  /* __extension__ can start a declaration, but is also an
  	     unary operator that can start an expression.  Consume all
  	     but the last of a possible series of __extension__ to
! 	     determine which.  If standard attributes have already
! 	     been seen, it must start a statement, not a declaration,
! 	     but standard attributes starting a declaration may appear
! 	     after __extension__.  */
  	  while (c_parser_peek_2nd_token (parser)->type == CPP_KEYWORD
  		 && (c_parser_peek_2nd_token (parser)->keyword
  		     == RID_EXTENSION))
  	    c_parser_consume_token (parser);
! 	  if (!have_std_attrs
! 	      && (c_token_starts_declaration (c_parser_peek_2nd_token (parser))
! 		  || c_parser_nth_token_starts_std_attributes (parser, 2)))
  	    {
  	      int ext;
  	      ext = disable_extension_diagnostics ();
*************** c_parser_compound_statement_nostart (c_p
*** 5108,5113 ****
--- 5762,5769 ----
  	}
        else if (c_parser_next_token_is (parser, CPP_PRAGMA))
  	{
+ 	  if (have_std_attrs)
+ 	    c_parser_error (parser, "expected declaration or statement");
  	  /* External pragmas, and some omp pragmas, are not associated
  	     with regular c code, and so are not to be considered statements
  	     syntactically.  This ensures that the user doesn't put them
*************** c_parser_compound_statement_nostart (c_p
*** 5122,5128 ****
  	{
  	  mark_valid_location_for_stdc_pragma (save_valid_for_pragma);
  	  c_parser_error (parser, "expected declaration or statement");
! 	  return;
  	}
        else if (c_parser_next_token_is_keyword (parser, RID_ELSE))
          {
--- 5778,5784 ----
  	{
  	  mark_valid_location_for_stdc_pragma (save_valid_for_pragma);
  	  c_parser_error (parser, "expected declaration or statement");
! 	  return c_parser_peek_token (parser)->location;
  	}
        else if (c_parser_next_token_is_keyword (parser, RID_ELSE))
          {
*************** c_parser_compound_statement_nostart (c_p
*** 5130,5136 ****
              {
  	      mark_valid_location_for_stdc_pragma (save_valid_for_pragma);
  	      error_at (loc, "expected %<}%> before %<else%>");
!               return;
              }
            else
              {
--- 5786,5792 ----
              {
  	      mark_valid_location_for_stdc_pragma (save_valid_for_pragma);
  	      error_at (loc, "expected %<}%> before %<else%>");
! 	      return c_parser_peek_token (parser)->location;
              }
            else
              {
*************** c_parser_compound_statement_nostart (c_p
*** 5142,5147 ****
--- 5798,5804 ----
        else
  	{
  	statement:
+ 	  c_warn_unused_attributes (std_attrs);
  	  last_label = false;
  	  last_stmt = true;
  	  mark_valid_location_for_stdc_pragma (false);
*************** c_parser_compound_statement_nostart (c_p
*** 5152,5167 ****
      }
    if (last_label)
      error_at (label_loc, "label at end of compound statement");
    c_parser_consume_token (parser);
    /* Restore the value we started with.  */
    mark_valid_location_for_stdc_pragma (save_valid_for_pragma);
  }
  
! /* Parse all consecutive labels. */
  
  static void
  c_parser_all_labels (c_parser *parser)
  {
    while (c_parser_next_token_is_keyword (parser, RID_CASE)
  	 || c_parser_next_token_is_keyword (parser, RID_DEFAULT)
  	 || (c_parser_next_token_is (parser, CPP_NAME)
--- 5809,5837 ----
      }
    if (last_label)
      error_at (label_loc, "label at end of compound statement");
+   location_t endloc = c_parser_peek_token (parser)->location;
    c_parser_consume_token (parser);
    /* Restore the value we started with.  */
    mark_valid_location_for_stdc_pragma (save_valid_for_pragma);
+   return endloc;
  }
  
! /* Parse all consecutive labels, possibly preceded by standard
!    attributes.  In this context, a statement is required, not a
!    declaration, so attributes must be followed by a statement that is
!    not just a semicolon.  */
  
  static void
  c_parser_all_labels (c_parser *parser)
  {
+   if (c_parser_nth_token_starts_std_attributes (parser, 1))
+     {
+       tree std_attrs = c_parser_std_attribute_specifier_sequence (parser);
+       if (c_parser_next_token_is (parser, CPP_SEMICOLON))
+ 	c_parser_error (parser, "expected statement");
+       else
+ 	c_warn_unused_attributes (std_attrs);
+     }
    while (c_parser_next_token_is_keyword (parser, RID_CASE)
  	 || c_parser_next_token_is_keyword (parser, RID_DEFAULT)
  	 || (c_parser_next_token_is (parser, CPP_NAME)
*************** c_parser_all_labels (c_parser *parser)
*** 5172,5178 ****
  /* Parse a label (C90 6.6.1, C99 6.8.1, C11 6.8.1).
  
     label:
!      identifier : attributes[opt]
       case constant-expression :
       default :
  
--- 5842,5848 ----
  /* Parse a label (C90 6.6.1, C99 6.8.1, C11 6.8.1).
  
     label:
!      identifier : gnu-attributes[opt]
       case constant-expression :
       default :
  
*************** c_parser_all_labels (c_parser *parser)
*** 5181,5189 ****
     label:
       case constant-expression ... constant-expression :
  
!    The use of attributes on labels is a GNU extension.  The syntax in
     GNU C accepts any expressions without commas, non-constant
!    expressions being rejected later.  */
  
  static void
  c_parser_label (c_parser *parser)
--- 5851,5863 ----
     label:
       case constant-expression ... constant-expression :
  
!    The use of gnu-attributes on labels is a GNU extension.  The syntax in
     GNU C accepts any expressions without commas, non-constant
!    expressions being rejected later.  Any standard
!    attribute-specifier-sequence before the first label has been parsed
!    in the caller, to distinguish statements from declarations.  Any
!    attribute-specifier-sequence after the label is parsed in this
!    function.  */
  
  static void
  c_parser_label (c_parser *parser)
*************** c_parser_label (c_parser *parser)
*** 5231,5237 ****
        c_parser_consume_token (parser);
        gcc_assert (c_parser_next_token_is (parser, CPP_COLON));
        c_parser_consume_token (parser);
!       attrs = c_parser_attributes (parser);
        tlab = define_label (loc2, name);
        if (tlab)
  	{
--- 5905,5911 ----
        c_parser_consume_token (parser);
        gcc_assert (c_parser_next_token_is (parser, CPP_COLON));
        c_parser_consume_token (parser);
!       attrs = c_parser_gnu_attributes (parser);
        tlab = define_label (loc2, name);
        if (tlab)
  	{
*************** c_parser_label (c_parser *parser)
*** 5246,5256 ****
        else
  	FALLTHROUGH_LABEL_P (CASE_LABEL (label)) = fallthrough_p;
  
        /* Allow '__attribute__((fallthrough));'.  */
!       if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
  	{
  	  location_t loc = c_parser_peek_token (parser)->location;
! 	  tree attrs = c_parser_attributes (parser);
  	  if (attribute_fallthrough_p (attrs))
  	    {
  	      if (c_parser_next_token_is (parser, CPP_SEMICOLON))
--- 5920,5940 ----
        else
  	FALLTHROUGH_LABEL_P (CASE_LABEL (label)) = fallthrough_p;
  
+       /* Standard attributes are only allowed here if they start a
+ 	 statement, not a declaration (including the case of an
+ 	 attribute-declaration with only attributes).  */
+       bool have_std_attrs
+ 	= c_parser_nth_token_starts_std_attributes (parser, 1);
+       tree std_attrs = NULL_TREE;
+       if (have_std_attrs)
+ 	std_attrs = c_parser_std_attribute_specifier_sequence (parser);
+ 
        /* Allow '__attribute__((fallthrough));'.  */
!       if (!have_std_attrs
! 	  && c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
  	{
  	  location_t loc = c_parser_peek_token (parser)->location;
! 	  tree attrs = c_parser_gnu_attributes (parser);
  	  if (attribute_fallthrough_p (attrs))
  	    {
  	      if (c_parser_next_token_is (parser, CPP_SEMICOLON))
*************** c_parser_label (c_parser *parser)
*** 5268,5274 ****
  	    warning_at (loc, OPT_Wattributes, "only attribute %<fallthrough%>"
  			" can be applied to a null statement");
  	}
!       if (c_parser_next_tokens_start_declaration (parser))
  	{
  	  error_at (c_parser_peek_token (parser)->location,
  		    "a label can only be part of a statement and "
--- 5952,5960 ----
  	    warning_at (loc, OPT_Wattributes, "only attribute %<fallthrough%>"
  			" can be applied to a null statement");
  	}
!       if (c_parser_next_tokens_start_declaration (parser)
! 	  || (have_std_attrs
! 	      && c_parser_next_token_is (parser, CPP_SEMICOLON)))
  	{
  	  error_at (c_parser_peek_token (parser)->location,
  		    "a label can only be part of a statement and "
*************** c_parser_label (c_parser *parser)
*** 5277,5284 ****
  					 /*static_assert_ok*/ true,
  					 /*empty_ok*/ true, /*nested*/ true,
  					 /*start_attr_ok*/ true, NULL,
! 					 vNULL);
  	}
      }
  }
  
--- 5963,5973 ----
  					 /*static_assert_ok*/ true,
  					 /*empty_ok*/ true, /*nested*/ true,
  					 /*start_attr_ok*/ true, NULL,
! 					 vNULL, have_std_attrs, std_attrs);
  	}
+       else if (std_attrs)
+ 	/* Nonempty attributes on the following statement are ignored.  */
+ 	c_warn_unused_attributes (std_attrs);
      }
  }
  
*************** c_parser_label (c_parser *parser)
*** 5286,5302 ****
  
     statement:
       labeled-statement
!      compound-statement
       expression-statement
!      selection-statement
!      iteration-statement
!      jump-statement
  
     labeled-statement:
!      label statement
  
     expression-statement:
       expression[opt] ;
  
     selection-statement:
       if-statement
--- 5975,5992 ----
  
     statement:
       labeled-statement
!      attribute-specifier-sequence[opt] compound-statement
       expression-statement
!      attribute-specifier-sequence[opt] selection-statement
!      attribute-specifier-sequence[opt] iteration-statement
!      attribute-specifier-sequence[opt] jump-statement
  
     labeled-statement:
!      attribute-specifier-sequence[opt] label statement
  
     expression-statement:
       expression[opt] ;
+      attribute-specifier-sequence expression ;
  
     selection-statement:
       if-statement
*************** c_parser_label (c_parser *parser)
*** 5316,5335 ****
     GNU extensions:
  
     statement:
!      asm-statement
  
     jump-statement:
       goto * expression ;
  
     expression-statement:
!      attributes ;
  
     Objective-C:
  
     statement:
!      objc-throw-statement
!      objc-try-catch-statement
!      objc-synchronized-statement
  
     objc-throw-statement:
       @throw expression ;
--- 6006,6025 ----
     GNU extensions:
  
     statement:
!      attribute-specifier-sequence[opt] asm-statement
  
     jump-statement:
       goto * expression ;
  
     expression-statement:
!      gnu-attributes ;
  
     Objective-C:
  
     statement:
!      attribute-specifier-sequence[opt] objc-throw-statement
!      attribute-specifier-sequence[opt] objc-try-catch-statement
!      attribute-specifier-sequence[opt] objc-synchronized-statement
  
     objc-throw-statement:
       @throw expression ;
*************** c_parser_label (c_parser *parser)
*** 5338,5344 ****
     OpenACC:
  
     statement:
!      openacc-construct
  
     openacc-construct:
       parallel-construct
--- 6028,6034 ----
     OpenACC:
  
     statement:
!      attribute-specifier-sequence[opt] openacc-construct
  
     openacc-construct:
       parallel-construct
*************** c_parser_label (c_parser *parser)
*** 5361,5367 ****
     OpenMP:
  
     statement:
!      openmp-construct
  
     openmp-construct:
       parallel-construct
--- 6051,6057 ----
     OpenMP:
  
     statement:
!      attribute-specifier-sequence[opt] openmp-construct
  
     openmp-construct:
       parallel-construct
*************** c_parser_label (c_parser *parser)
*** 5420,5427 ****
     Transactional Memory:
  
     statement:
!      transaction-statement
!      transaction-cancel-statement
  
     IF_P is used to track whether there's a (possibly labeled) if statement
     which is not enclosed in braces and has an else clause.  This is used to
--- 6110,6117 ----
     Transactional Memory:
  
     statement:
!      attribute-specifier-sequence[opt] transaction-statement
!      attribute-specifier-sequence[opt] transaction-cancel-statement
  
     IF_P is used to track whether there's a (possibly labeled) if statement
     which is not enclosed in braces and has an else clause.  This is used to
*************** c_parser_statement (c_parser *parser, bo
*** 5437,5443 ****
  }
  
  /* Parse a statement, other than a labeled statement.  CHAIN is a vector
!    of if-else-if conditions.
  
     IF_P is used to track whether there's a (possibly labeled) if statement
     which is not enclosed in braces and has an else clause.  This is used to
--- 6127,6134 ----
  }
  
  /* Parse a statement, other than a labeled statement.  CHAIN is a vector
!    of if-else-if conditions.  All labels and standard attributes have
!    been parsed in the caller.
  
     IF_P is used to track whether there's a (possibly labeled) if statement
     which is not enclosed in braces and has an else clause.  This is used to
*************** c_parser_statement_after_labels (c_parse
*** 5564,5570 ****
  	case RID_ATTRIBUTE:
  	  {
  	    /* Allow '__attribute__((fallthrough));'.  */
! 	    tree attrs = c_parser_attributes (parser);
  	    if (attribute_fallthrough_p (attrs))
  	      {
  		if (c_parser_next_token_is (parser, CPP_SEMICOLON))
--- 6255,6261 ----
  	case RID_ATTRIBUTE:
  	  {
  	    /* Allow '__attribute__((fallthrough));'.  */
! 	    tree attrs = c_parser_gnu_attributes (parser);
  	    if (attribute_fallthrough_p (attrs))
  	      {
  		if (c_parser_next_token_is (parser, CPP_SEMICOLON))
*************** c_parser_switch_statement (c_parser *par
*** 5923,5929 ****
  	  && c_token_starts_typename (c_parser_peek_2nd_token (parser)))
  	explicit_cast_p = true;
        ce = c_parser_expression (parser);
!       ce = convert_lvalue_to_rvalue (switch_cond_loc, ce, true, false);
        expr = ce.value;
        /* ??? expr has no valid location?  */
        parens.skip_until_found_close (parser);
--- 6614,6620 ----
  	  && c_token_starts_typename (c_parser_peek_2nd_token (parser)))
  	explicit_cast_p = true;
        ce = c_parser_expression (parser);
!       ce = convert_lvalue_to_rvalue (switch_cond_loc, ce, true, true);
        expr = ce.value;
        /* ??? expr has no valid location?  */
        parens.skip_until_found_close (parser);
*************** c_parser_for_statement (c_parser *parser
*** 6160,6166 ****
  	  c_parser_consume_token (parser);
  	  c_finish_expr_stmt (loc, NULL_TREE);
  	}
!       else if (c_parser_next_tokens_start_declaration (parser))
  	{
  	  c_parser_declaration_or_fndef (parser, true, true, true, true, true, 
  					 &object_expression, vNULL);
--- 6851,6858 ----
  	  c_parser_consume_token (parser);
  	  c_finish_expr_stmt (loc, NULL_TREE);
  	}
!       else if (c_parser_next_tokens_start_declaration (parser)
! 	       || c_parser_nth_token_starts_std_attributes (parser, 1))
  	{
  	  c_parser_declaration_or_fndef (parser, true, true, true, true, true, 
  					 &object_expression, vNULL);
*************** c_parser_for_statement (c_parser *parser
*** 6187,6193 ****
  		 && (c_parser_peek_2nd_token (parser)->keyword
  		     == RID_EXTENSION))
  	    c_parser_consume_token (parser);
! 	  if (c_token_starts_declaration (c_parser_peek_2nd_token (parser)))
  	    {
  	      int ext;
  	      ext = disable_extension_diagnostics ();
--- 6879,6886 ----
  		 && (c_parser_peek_2nd_token (parser)->keyword
  		     == RID_EXTENSION))
  	    c_parser_consume_token (parser);
! 	  if (c_token_starts_declaration (c_parser_peek_2nd_token (parser))
! 	      || c_parser_nth_token_starts_std_attributes (parser, 2))
  	    {
  	      int ext;
  	      ext = disable_extension_diagnostics ();
*************** c_parser_for_statement (c_parser *parser
*** 6374,6380 ****
  
     The form with asm-goto-operands is valid if and only if the
     asm-qualifier-list contains goto, and is the only allowed form in that case.
!    Duplicate asm-qualifiers are not allowed.  */
  
  static tree
  c_parser_asm_statement (c_parser *parser)
--- 7067,7075 ----
  
     The form with asm-goto-operands is valid if and only if the
     asm-qualifier-list contains goto, and is the only allowed form in that case.
!    Duplicate asm-qualifiers are not allowed.
! 
!    The :: token is considered equivalent to two consecutive : tokens.  */
  
  static tree
  c_parser_asm_statement (c_parser *parser)
*************** c_parser_asm_statement (c_parser *parser
*** 6400,6406 ****
  	case RID_VOLATILE:
  	  if (volatile_loc)
  	    {
! 	      error_at (loc, "duplicate asm qualifier %qE", token->value);
  	      inform (volatile_loc, "first seen here");
  	    }
  	  else
--- 7095,7101 ----
  	case RID_VOLATILE:
  	  if (volatile_loc)
  	    {
! 	      error_at (loc, "duplicate %<asm%> qualifier %qE", token->value);
  	      inform (volatile_loc, "first seen here");
  	    }
  	  else
*************** c_parser_asm_statement (c_parser *parser
*** 6411,6417 ****
  	case RID_INLINE:
  	  if (inline_loc)
  	    {
! 	      error_at (loc, "duplicate asm qualifier %qE", token->value);
  	      inform (inline_loc, "first seen here");
  	    }
  	  else
--- 7106,7112 ----
  	case RID_INLINE:
  	  if (inline_loc)
  	    {
! 	      error_at (loc, "duplicate %<asm%> qualifier %qE", token->value);
  	      inform (inline_loc, "first seen here");
  	    }
  	  else
*************** c_parser_asm_statement (c_parser *parser
*** 6422,6428 ****
  	case RID_GOTO:
  	  if (goto_loc)
  	    {
! 	      error_at (loc, "duplicate asm qualifier %qE", token->value);
  	      inform (goto_loc, "first seen here");
  	    }
  	  else
--- 7117,7123 ----
  	case RID_GOTO:
  	  if (goto_loc)
  	    {
! 	      error_at (loc, "duplicate %<asm%> qualifier %qE", token->value);
  	      inform (goto_loc, "first seen here");
  	    }
  	  else
*************** c_parser_asm_statement (c_parser *parser
*** 6432,6438 ****
  
  	case RID_CONST:
  	case RID_RESTRICT:
! 	  error_at (loc, "%qE is not an asm qualifier", token->value);
  	  c_parser_consume_token (parser);
  	  continue;
  
--- 7127,7133 ----
  
  	case RID_CONST:
  	case RID_RESTRICT:
! 	  error_at (loc, "%qE is not a valid %<asm%> qualifier", token->value);
  	  c_parser_consume_token (parser);
  	  continue;
  
*************** c_parser_asm_statement (c_parser *parser
*** 6446,6454 ****
    bool is_inline = (inline_loc != UNKNOWN_LOCATION);
    bool is_goto = (goto_loc != UNKNOWN_LOCATION);
  
-   /* ??? Follow the C++ parser rather than using the
-      lex_untranslated_string kludge.  */
-   parser->lex_untranslated_string = true;
    ret = NULL;
  
    matching_parens parens;
--- 7141,7146 ----
*************** c_parser_asm_statement (c_parser *parser
*** 6472,6488 ****
    nsections = 3 + is_goto;
    for (section = 0; section < nsections; ++section)
      {
!       if (!c_parser_require (parser, CPP_COLON,
! 			     is_goto
! 			     ? G_("expected %<:%>")
! 			     : G_("expected %<:%> or %<)%>"),
! 			     UNKNOWN_LOCATION, is_goto))
  	goto error_close_paren;
  
        /* Once past any colon, we're no longer a simple asm.  */
        simple = false;
  
        if ((!c_parser_next_token_is (parser, CPP_COLON)
  	   && !c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
  	  || section == 3)
  	switch (section)
--- 7164,7191 ----
    nsections = 3 + is_goto;
    for (section = 0; section < nsections; ++section)
      {
!       if (c_parser_next_token_is (parser, CPP_SCOPE))
! 	{
! 	  ++section;
! 	  if (section == nsections)
! 	    {
! 	      c_parser_error (parser, "expected %<)%>");
! 	      goto error_close_paren;
! 	    }
! 	  c_parser_consume_token (parser);
! 	}
!       else if (!c_parser_require (parser, CPP_COLON,
! 				  is_goto
! 				  ? G_("expected %<:%>")
! 				  : G_("expected %<:%> or %<)%>"),
! 				  UNKNOWN_LOCATION, is_goto))
  	goto error_close_paren;
  
        /* Once past any colon, we're no longer a simple asm.  */
        simple = false;
  
        if ((!c_parser_next_token_is (parser, CPP_COLON)
+ 	   && !c_parser_next_token_is (parser, CPP_SCOPE)
  	   && !c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
  	  || section == 3)
  	switch (section)
*************** c_parser_asm_statement (c_parser *parser
*** 6525,6531 ****
  					clobbers, labels, simple, is_inline));
  
   error:
-   parser->lex_untranslated_string = false;
    return ret;
  
   error_close_paren:
--- 7228,7233 ----
*************** c_parser_asm_operands (c_parser *parser)
*** 6576,6591 ****
        str = c_parser_asm_string_literal (parser);
        if (str == NULL_TREE)
  	return NULL_TREE;
-       parser->lex_untranslated_string = false;
        matching_parens parens;
        if (!parens.require_open (parser))
! 	{
! 	  parser->lex_untranslated_string = true;
! 	  return NULL_TREE;
! 	}
        expr = c_parser_expression (parser);
        mark_exp_read (expr.value);
-       parser->lex_untranslated_string = true;
        if (!parens.require_close (parser))
  	{
  	  c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, NULL);
--- 7278,7288 ----
        str = c_parser_asm_string_literal (parser);
        if (str == NULL_TREE)
  	return NULL_TREE;
        matching_parens parens;
        if (!parens.require_open (parser))
! 	return NULL_TREE;
        expr = c_parser_expression (parser);
        mark_exp_read (expr.value);
        if (!parens.require_close (parser))
  	{
  	  c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, NULL);
*************** c_parser_asm_goto_operands (c_parser *pa
*** 6666,6671 ****
--- 7363,7547 ----
      }
  }
  
+ /* Parse a possibly concatenated sequence of string literals.
+    TRANSLATE says whether to translate them to the execution character
+    set; WIDE_OK says whether any kind of prefixed string literal is
+    permitted in this context.  This code is based on that in
+    lex_string.  */
+ 
+ struct c_expr
+ c_parser_string_literal (c_parser *parser, bool translate, bool wide_ok)
+ {
+   struct c_expr ret;
+   size_t count;
+   struct obstack str_ob;
+   struct obstack loc_ob;
+   cpp_string str, istr, *strs;
+   c_token *tok;
+   location_t loc, last_tok_loc;
+   enum cpp_ttype type;
+   tree value, string_tree;
+ 
+   tok = c_parser_peek_token (parser);
+   loc = tok->location;
+   last_tok_loc = linemap_resolve_location (line_table, loc,
+ 					   LRK_MACRO_DEFINITION_LOCATION,
+ 					   NULL);
+   type = tok->type;
+   switch (type)
+     {
+     case CPP_STRING:
+     case CPP_WSTRING:
+     case CPP_STRING16:
+     case CPP_STRING32:
+     case CPP_UTF8STRING:
+       string_tree = tok->value;
+       break;
+ 
+     default:
+       c_parser_error (parser, "expected string literal");
+       ret.set_error ();
+       ret.value = NULL_TREE;
+       ret.original_code = ERROR_MARK;
+       ret.original_type = NULL_TREE;
+       return ret;
+     }
+ 
+   /* Try to avoid the overhead of creating and destroying an obstack
+      for the common case of just one string.  */
+   switch (c_parser_peek_2nd_token (parser)->type)
+     {
+     default:
+       c_parser_consume_token (parser);
+       str.text = (const unsigned char *) TREE_STRING_POINTER (string_tree);
+       str.len = TREE_STRING_LENGTH (string_tree);
+       count = 1;
+       strs = &str;
+       break;
+ 
+     case CPP_STRING:
+     case CPP_WSTRING:
+     case CPP_STRING16:
+     case CPP_STRING32:
+     case CPP_UTF8STRING:
+       gcc_obstack_init (&str_ob);
+       gcc_obstack_init (&loc_ob);
+       count = 0;
+       do
+ 	{
+ 	  c_parser_consume_token (parser);
+ 	  count++;
+ 	  str.text = (const unsigned char *) TREE_STRING_POINTER (string_tree);
+ 	  str.len = TREE_STRING_LENGTH (string_tree);
+ 	  if (type != tok->type)
+ 	    {
+ 	      if (type == CPP_STRING)
+ 		type = tok->type;
+ 	      else if (tok->type != CPP_STRING)
+ 		error ("unsupported non-standard concatenation "
+ 		       "of string literals");
+ 	    }
+ 	  obstack_grow (&str_ob, &str, sizeof (cpp_string));
+ 	  obstack_grow (&loc_ob, &last_tok_loc, sizeof (location_t));
+ 	  tok = c_parser_peek_token (parser);
+ 	  string_tree = tok->value;
+ 	  last_tok_loc
+ 	    = linemap_resolve_location (line_table, tok->location,
+ 					LRK_MACRO_DEFINITION_LOCATION, NULL);
+ 	}
+       while (tok->type == CPP_STRING
+ 	     || tok->type == CPP_WSTRING
+ 	     || tok->type == CPP_STRING16
+ 	     || tok->type == CPP_STRING32
+ 	     || tok->type == CPP_UTF8STRING);
+       strs = (cpp_string *) obstack_finish (&str_ob);
+     }
+ 
+   if (count > 1 && !in_system_header_at (input_location))
+     warning (OPT_Wtraditional,
+ 	     "traditional C rejects string constant concatenation");
+ 
+   if ((type == CPP_STRING || wide_ok)
+       && ((translate
+ 	  ? cpp_interpret_string : cpp_interpret_string_notranslate)
+ 	  (parse_in, strs, count, &istr, type)))
+     {
+       value = build_string (istr.len, (const char *) istr.text);
+       free (CONST_CAST (unsigned char *, istr.text));
+       if (count > 1)
+ 	{
+ 	  location_t *locs = (location_t *) obstack_finish (&loc_ob);
+ 	  gcc_assert (g_string_concat_db);
+ 	  g_string_concat_db->record_string_concatenation (count, locs);
+ 	}
+     }
+   else
+     {
+       if (type != CPP_STRING && !wide_ok)
+ 	{
+ 	  error_at (loc, "a wide string is invalid in this context");
+ 	  type = CPP_STRING;
+ 	}
+       /* Callers cannot generally handle error_mark_node in this
+ 	 context, so return the empty string instead.  An error has
+ 	 been issued, either above or from cpp_interpret_string.  */
+       switch (type)
+ 	{
+ 	default:
+ 	case CPP_STRING:
+ 	case CPP_UTF8STRING:
+ 	  value = build_string (1, "");
+ 	  break;
+ 	case CPP_STRING16:
+ 	  value = build_string (TYPE_PRECISION (char16_type_node)
+ 				/ TYPE_PRECISION (char_type_node),
+ 				"\0");  /* char16_t is 16 bits */
+ 	  break;
+ 	case CPP_STRING32:
+ 	  value = build_string (TYPE_PRECISION (char32_type_node)
+ 				/ TYPE_PRECISION (char_type_node),
+ 				"\0\0\0");  /* char32_t is 32 bits */
+ 	  break;
+ 	case CPP_WSTRING:
+ 	  value = build_string (TYPE_PRECISION (wchar_type_node)
+ 				/ TYPE_PRECISION (char_type_node),
+ 				"\0\0\0");  /* widest supported wchar_t
+ 					       is 32 bits */
+ 	  break;
+         }
+     }
+ 
+   switch (type)
+     {
+     default:
+     case CPP_STRING:
+     case CPP_UTF8STRING:
+       TREE_TYPE (value) = char_array_type_node;
+       break;
+     case CPP_STRING16:
+       TREE_TYPE (value) = char16_array_type_node;
+       break;
+     case CPP_STRING32:
+       TREE_TYPE (value) = char32_array_type_node;
+       break;
+     case CPP_WSTRING:
+       TREE_TYPE (value) = wchar_array_type_node;
+     }
+   value = fix_string_type (value);
+ 
+   if (count > 1)
+     {
+       obstack_free (&str_ob, 0);
+       obstack_free (&loc_ob, 0);
+     }
+ 
+   ret.value = value;
+   ret.original_code = STRING_CST;
+   ret.original_type = NULL_TREE;
+   set_c_expr_source_range (&ret, get_range_from_loc (line_table, loc));
+   return ret;
+ }
+ 
  /* Parse an expression other than a compound expression; that is, an
     assignment expression (C90 6.3.16, C99 6.5.16, C11 6.5.16).  If
     AFTER is not NULL then it is an Objective-C message expression which
*************** c_parser_conditional_expression (c_parse
*** 6790,6796 ****
  
        location_t middle_loc = c_parser_peek_token (parser)->location;
        pedwarn (middle_loc, OPT_Wpedantic,
! 	       "ISO C forbids omitting the middle term of a ?: expression");
        if (TREE_CODE (cond.value) == EXCESS_PRECISION_EXPR)
  	{
  	  eptype = TREE_TYPE (cond.value);
--- 7666,7672 ----
  
        location_t middle_loc = c_parser_peek_token (parser)->location;
        pedwarn (middle_loc, OPT_Wpedantic,
! 	       "ISO C forbids omitting the middle term of a %<?:%> expression");
        if (TREE_CODE (cond.value) == EXCESS_PRECISION_EXPR)
  	{
  	  eptype = TREE_TYPE (cond.value);
*************** c_parser_has_attribute_expression (c_par
*** 7648,7661 ****
        return result;
      }
  
!   parser->lex_untranslated_string = true;
  
    location_t atloc = c_parser_peek_token (parser)->location;
    /* Parse a single attribute.  Require no leading comma and do not
       allow empty attributes.  */
!   tree attr = c_parser_attribute (parser, NULL_TREE, false, false);
  
!   parser->lex_untranslated_string = false;
  
    if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
      c_parser_consume_token (parser);
--- 8524,8537 ----
        return result;
      }
  
!   bool save_translate_strings_p = parser->translate_strings_p;
  
    location_t atloc = c_parser_peek_token (parser)->location;
    /* Parse a single attribute.  Require no leading comma and do not
       allow empty attributes.  */
!   tree attr = c_parser_gnu_attribute (parser, NULL_TREE, false, false);
  
!   parser->translate_strings_p = save_translate_strings_p;
  
    if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
      c_parser_consume_token (parser);
*************** c_parser_postfix_expression (c_parser *p
*** 8137,8142 ****
--- 9013,9019 ----
      case CPP_CHAR:
      case CPP_CHAR16:
      case CPP_CHAR32:
+     case CPP_UTF8CHAR:
      case CPP_WCHAR:
        expr.value = c_parser_peek_token (parser)->value;
        /* For the purpose of warning when a pointer is compared with
*************** c_parser_postfix_expression (c_parser *p
*** 8150,8159 ****
      case CPP_STRING32:
      case CPP_WSTRING:
      case CPP_UTF8STRING:
!       expr.value = c_parser_peek_token (parser)->value;
!       set_c_expr_source_range (&expr, tok_range);
!       expr.original_code = STRING_CST;
!       c_parser_consume_token (parser);
        break;
      case CPP_OBJC_STRING:
        gcc_assert (c_dialect_objc ());
--- 9027,9034 ----
      case CPP_STRING32:
      case CPP_WSTRING:
      case CPP_UTF8STRING:
!       expr = c_parser_string_literal (parser, parser->translate_strings_p,
! 				      true);
        break;
      case CPP_OBJC_STRING:
        gcc_assert (c_dialect_objc ());
*************** warn_for_abs (location_t loc, tree fndec
*** 9433,9439 ****
  	  if (SCALAR_FLOAT_TYPE_P (atype))
  	    warning_at (loc, OPT_Wabsolute_value,
  			"using integer absolute value function %qD when "
! 			"argument is of floating point type %qT",
  			fndecl, atype);
  	  else if (TREE_CODE (atype) == COMPLEX_TYPE)
  	    warning_at (loc, OPT_Wabsolute_value,
--- 10308,10314 ----
  	  if (SCALAR_FLOAT_TYPE_P (atype))
  	    warning_at (loc, OPT_Wabsolute_value,
  			"using integer absolute value function %qD when "
! 			"argument is of floating-point type %qT",
  			fndecl, atype);
  	  else if (TREE_CODE (atype) == COMPLEX_TYPE)
  	    warning_at (loc, OPT_Wabsolute_value,
*************** warn_for_abs (location_t loc, tree fndec
*** 9456,9471 ****
  	{
  	  if (INTEGRAL_TYPE_P (atype))
  	    warning_at (loc, OPT_Wabsolute_value,
! 			"using floating point absolute value function %qD "
  			"when argument is of integer type %qT", fndecl, atype);
  	  else if (DECIMAL_FLOAT_TYPE_P (atype))
  	    warning_at (loc, OPT_Wabsolute_value,
! 			"using floating point absolute value function %qD "
! 			"when argument is of decimal floating point type %qT",
  			fndecl, atype);
  	  else if (TREE_CODE (atype) == COMPLEX_TYPE)
  	    warning_at (loc, OPT_Wabsolute_value,
! 			"using floating point absolute value function %qD when "
  			"argument is of complex type %qT", fndecl, atype);
  	  else
  	    gcc_unreachable ();
--- 10331,10346 ----
  	{
  	  if (INTEGRAL_TYPE_P (atype))
  	    warning_at (loc, OPT_Wabsolute_value,
! 			"using floating-point absolute value function %qD "
  			"when argument is of integer type %qT", fndecl, atype);
  	  else if (DECIMAL_FLOAT_TYPE_P (atype))
  	    warning_at (loc, OPT_Wabsolute_value,
! 			"using floating-point absolute value function %qD "
! 			"when argument is of decimal floating-point type %qT",
  			fndecl, atype);
  	  else if (TREE_CODE (atype) == COMPLEX_TYPE)
  	    warning_at (loc, OPT_Wabsolute_value,
! 			"using floating-point absolute value function %qD when "
  			"argument is of complex type %qT", fndecl, atype);
  	  else
  	    gcc_unreachable ();
*************** warn_for_abs (location_t loc, tree fndec
*** 9483,9489 ****
  	  else if (SCALAR_FLOAT_TYPE_P (atype))
  	    warning_at (loc, OPT_Wabsolute_value,
  			"using complex absolute value function %qD when "
! 			"argument is of floating point type %qT",
  			fndecl, atype);
  	  else
  	    gcc_unreachable ();
--- 10358,10364 ----
  	  else if (SCALAR_FLOAT_TYPE_P (atype))
  	    warning_at (loc, OPT_Wabsolute_value,
  			"using complex absolute value function %qD when "
! 			"argument is of floating-point type %qT",
  			fndecl, atype);
  	  else
  	    gcc_unreachable ();
*************** warn_for_abs (location_t loc, tree fndec
*** 9499,9515 ****
  	{
  	  if (INTEGRAL_TYPE_P (atype))
  	    warning_at (loc, OPT_Wabsolute_value,
! 			"using decimal floating point absolute value "
  			"function %qD when argument is of integer type %qT",
  			fndecl, atype);
  	  else if (SCALAR_FLOAT_TYPE_P (atype))
  	    warning_at (loc, OPT_Wabsolute_value,
! 			"using decimal floating point absolute value "
! 			"function %qD when argument is of floating point "
  			"type %qT", fndecl, atype);
  	  else if (TREE_CODE (atype) == COMPLEX_TYPE)
  	    warning_at (loc, OPT_Wabsolute_value,
! 			"using decimal floating point absolute value "
  			"function %qD when argument is of complex type %qT",
  			fndecl, atype);
  	  else
--- 10374,10390 ----
  	{
  	  if (INTEGRAL_TYPE_P (atype))
  	    warning_at (loc, OPT_Wabsolute_value,
! 			"using decimal floating-point absolute value "
  			"function %qD when argument is of integer type %qT",
  			fndecl, atype);
  	  else if (SCALAR_FLOAT_TYPE_P (atype))
  	    warning_at (loc, OPT_Wabsolute_value,
! 			"using decimal floating-point absolute value "
! 			"function %qD when argument is of floating-point "
  			"type %qT", fndecl, atype);
  	  else if (TREE_CODE (atype) == COMPLEX_TYPE)
  	    warning_at (loc, OPT_Wabsolute_value,
! 			"using decimal floating-point absolute value "
  			"function %qD when argument is of complex type %qT",
  			fndecl, atype);
  	  else
*************** c_parser_check_literal_zero (c_parser *p
*** 9815,9820 ****
--- 10690,10696 ----
      case CPP_WCHAR:
      case CPP_CHAR16:
      case CPP_CHAR32:
+     case CPP_UTF8CHAR:
        /* If a parameter is literal zero alone, remember it
  	 for -Wmemset-transposed-args warning.  */
        if (integer_zerop (tok->value)
*************** c_parser_objc_maybe_method_attributes (c
*** 10445,10451 ****
      }
  
    if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
!     *attributes = c_parser_attributes (parser);
  
    /* If there were no attributes here, just report any earlier error.  */
    if (*attributes == NULL_TREE || bad)
--- 11321,11327 ----
      }
  
    if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
!     *attributes = c_parser_gnu_attributes (parser);
  
    /* If there were no attributes here, just report any earlier error.  */
    if (*attributes == NULL_TREE || bad)
*************** c_parser_objc_maybe_method_attributes (c
*** 10470,10476 ****
       objc-selector
       ( objc-type-name ) objc-keyword-selector objc-optparmlist
       objc-keyword-selector objc-optparmlist
!      attributes
  
     objc-keyword-selector:
       objc-keyword-decl
--- 11346,11352 ----
       objc-selector
       ( objc-type-name ) objc-keyword-selector objc-optparmlist
       objc-keyword-selector objc-optparmlist
!      gnu-attributes
  
     objc-keyword-selector:
       objc-keyword-decl
*************** c_parser_objc_method_decl (c_parser *par
*** 10535,10541 ****
  	    }
  	  /* New ObjC allows attributes on method parameters.  */
  	  if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
! 	    param_attr = c_parser_attributes (parser);
  	  if (c_parser_next_token_is_not (parser, CPP_NAME))
  	    {
  	      c_parser_error (parser, "expected identifier");
--- 11411,11417 ----
  	    }
  	  /* New ObjC allows attributes on method parameters.  */
  	  if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
! 	    param_attr = c_parser_gnu_attributes (parser);
  	  if (c_parser_next_token_is_not (parser, CPP_NAME))
  	    {
  	      c_parser_error (parser, "expected identifier");
*************** c_parser_objc_method_decl (c_parser *par
*** 10568,10574 ****
  						(parser, attributes) ;
  	      break;
  	    }
! 	  parm = c_parser_parameter_declaration (parser, NULL_TREE);
  	  if (parm == NULL)
  	    break;
  	  parms = chainon (parms,
--- 11444,11450 ----
  						(parser, attributes) ;
  	      break;
  	    }
! 	  parm = c_parser_parameter_declaration (parser, NULL_TREE, false);
  	  if (parm == NULL)
  	    break;
  	  parms = chainon (parms,
*************** c_parser_objc_try_catch_finally_statemen
*** 10733,10739 ****
  	{
  	  /* We have "@catch (NSException *exception)" or something
  	     like that.  Parse the parameter declaration.  */
! 	  parm = c_parser_parameter_declaration (parser, NULL_TREE);
  	  if (parm == NULL)
  	    parameter_declaration = error_mark_node;
  	  else
--- 11609,11615 ----
  	{
  	  /* We have "@catch (NSException *exception)" or something
  	     like that.  Parse the parameter declaration.  */
! 	  parm = c_parser_parameter_declaration (parser, NULL_TREE, false);
  	  if (parm == NULL)
  	    parameter_declaration = error_mark_node;
  	  else
*************** c_parser_objc_selector_arg (c_parser *pa
*** 10906,10920 ****
  {
    tree sel = c_parser_objc_selector (parser);
    tree list = NULL_TREE;
!   if (sel && c_parser_next_token_is_not (parser, CPP_COLON))
      return sel;
    while (true)
      {
!       if (!c_parser_require (parser, CPP_COLON, "expected %<:%>"))
! 	return list;
!       list = chainon (list, build_tree_list (sel, NULL_TREE));
        sel = c_parser_objc_selector (parser);
!       if (!sel && c_parser_next_token_is_not (parser, CPP_COLON))
  	break;
      }
    return list;
--- 11782,11809 ----
  {
    tree sel = c_parser_objc_selector (parser);
    tree list = NULL_TREE;
!   if (sel
!       && c_parser_next_token_is_not (parser, CPP_COLON)
!       && c_parser_next_token_is_not (parser, CPP_SCOPE))
      return sel;
    while (true)
      {
!       if (c_parser_next_token_is (parser, CPP_SCOPE))
! 	{
! 	  c_parser_consume_token (parser);
! 	  list = chainon (list, build_tree_list (sel, NULL_TREE));
! 	  list = chainon (list, build_tree_list (NULL_TREE, NULL_TREE));
! 	}
!       else
! 	{
! 	  if (!c_parser_require (parser, CPP_COLON, "expected %<:%>"))
! 	    return list;
! 	  list = chainon (list, build_tree_list (sel, NULL_TREE));
! 	}
        sel = c_parser_objc_selector (parser);
!       if (!sel
! 	  && c_parser_next_token_is_not (parser, CPP_COLON)
! 	  && c_parser_next_token_is_not (parser, CPP_SCOPE))
  	break;
      }
    return list;
*************** c_parser_pragma (c_parser *parser, enum
*** 11507,11512 ****
--- 12396,12408 ----
        c_parser_omp_end_declare_target (parser);
        return false;
  
+     case PRAGMA_OMP_SCAN:
+       error_at (c_parser_peek_token (parser)->location,
+ 		"%<#pragma omp scan%> may only be used in "
+ 		"a loop construct with %<inscan%> %<reduction%> clause");
+       c_parser_skip_until_found (parser, CPP_PRAGMA_EOL, NULL);
+       return false;
+ 
      case PRAGMA_OMP_SECTION:
        error_at (c_parser_peek_token (parser)->location,
  		"%<#pragma omp section%> may only be used in "
*************** c_parser_pragma (c_parser *parser, enum
*** 11519,11524 ****
--- 12415,12427 ----
        return false;
  
      case PRAGMA_OMP_REQUIRES:
+       if (context != pragma_external)
+ 	{
+ 	  error_at (c_parser_peek_token (parser)->location,
+ 		    "%<#pragma omp requires%> may only be used at file scope");
+ 	  c_parser_skip_until_found (parser, CPP_PRAGMA_EOL, NULL);
+ 	  return false;
+ 	}
        c_parser_omp_requires (parser);
        return false;
  
*************** pragma_lex (tree *value, location_t *loc
*** 11628,11633 ****
--- 12531,12538 ----
  
    if (ret == CPP_PRAGMA_EOL || ret == CPP_EOF)
      ret = CPP_EOF;
+   else if (ret == CPP_STRING)
+     *value = c_parser_string_literal (the_parser, false, false).value;
    else
      {
        if (ret == CPP_KEYWORD)
*************** c_parser_pragma_pch_preprocess (c_parser
*** 11643,11648 ****
--- 12548,12554 ----
  {
    tree name = NULL;
  
+   parser->lex_joined_string = true;
    c_parser_consume_pragma (parser);
    if (c_parser_next_token_is (parser, CPP_STRING))
      {
*************** c_parser_pragma_pch_preprocess (c_parser
*** 11652,11657 ****
--- 12558,12564 ----
    else
      c_parser_error (parser, "expected string literal");
    c_parser_skip_to_pragma_eol (parser);
+   parser->lex_joined_string = false;
  
    if (name)
      c_common_pch_pragma (parse_in, TREE_STRING_POINTER (name));
*************** c_parser_omp_clause_name (c_parser *pars
*** 11688,11693 ****
--- 12595,12606 ----
  	    result = PRAGMA_OMP_CLAUSE_ALIGNED;
  	  else if (!strcmp ("async", p))
  	    result = PRAGMA_OACC_CLAUSE_ASYNC;
+ 	  else if (!strcmp ("attach", p))
+ 	    result = PRAGMA_OACC_CLAUSE_ATTACH;
+ 	  break;
+ 	case 'b':
+ 	  if (!strcmp ("bind", p))
+ 	    result = PRAGMA_OMP_CLAUSE_BIND;
  	  break;
  	case 'c':
  	  if (!strcmp ("collapse", p))
*************** c_parser_omp_clause_name (c_parser *pars
*** 11710,11721 ****
--- 12623,12638 ----
  	    result = PRAGMA_OACC_CLAUSE_DELETE;
  	  else if (!strcmp ("depend", p))
  	    result = PRAGMA_OMP_CLAUSE_DEPEND;
+ 	  else if (!strcmp ("detach", p))
+ 	    result = PRAGMA_OACC_CLAUSE_DETACH;
  	  else if (!strcmp ("device", p))
  	    result = PRAGMA_OMP_CLAUSE_DEVICE;
  	  else if (!strcmp ("deviceptr", p))
  	    result = PRAGMA_OACC_CLAUSE_DEVICEPTR;
  	  else if (!strcmp ("device_resident", p))
  	    result = PRAGMA_OACC_CLAUSE_DEVICE_RESIDENT;
+ 	  else if (!strcmp ("device_type", p))
+ 	    result = PRAGMA_OMP_CLAUSE_DEVICE_TYPE;
  	  else if (!strcmp ("dist_schedule", p))
  	    result = PRAGMA_OMP_CLAUSE_DIST_SCHEDULE;
  	  break;
*************** c_parser_omp_clause_name (c_parser *pars
*** 11768,11774 ****
  	    result = PRAGMA_OMP_CLAUSE_MERGEABLE;
  	  break;
  	case 'n':
! 	  if (!strcmp ("nogroup", p))
  	    result = PRAGMA_OMP_CLAUSE_NOGROUP;
  	  else if (!strcmp ("nontemporal", p))
  	    result = PRAGMA_OMP_CLAUSE_NONTEMPORAL;
--- 12685,12693 ----
  	    result = PRAGMA_OMP_CLAUSE_MERGEABLE;
  	  break;
  	case 'n':
! 	  if (!strcmp ("no_create", p))
! 	    result = PRAGMA_OACC_CLAUSE_NO_CREATE;
! 	  else if (!strcmp ("nogroup", p))
  	    result = PRAGMA_OMP_CLAUSE_NOGROUP;
  	  else if (!strcmp ("nontemporal", p))
  	    result = PRAGMA_OMP_CLAUSE_NONTEMPORAL;
*************** c_parser_omp_clause_name (c_parser *pars
*** 11790,11795 ****
--- 12709,12716 ----
  	case 'o':
  	  if (!strcmp ("ordered", p))
  	    result = PRAGMA_OMP_CLAUSE_ORDERED;
+ 	  else if (!strcmp ("order", p))
+ 	    result = PRAGMA_OMP_CLAUSE_ORDER;
  	  break;
  	case 'p':
  	  if (!strcmp ("parallel", p))
*************** c_parser_omp_clause_name (c_parser *pars
*** 11860,11865 ****
--- 12781,12788 ----
  	    result = PRAGMA_OMP_CLAUSE_UNTIED;
  	  else if (!strcmp ("use_device", p))
  	    result = PRAGMA_OACC_CLAUSE_USE_DEVICE;
+ 	  else if (!strcmp ("use_device_addr", p))
+ 	    result = PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR;
  	  else if (!strcmp ("use_device_ptr", p))
  	    result = PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR;
  	  break;
*************** static void
*** 11890,11904 ****
  check_no_duplicate_clause (tree clauses, enum omp_clause_code code,
  			   const char *name)
  {
!   tree c;
! 
!   for (c = clauses; c ; c = OMP_CLAUSE_CHAIN (c))
!     if (OMP_CLAUSE_CODE (c) == code)
!       {
! 	location_t loc = OMP_CLAUSE_LOCATION (c);
! 	error_at (loc, "too many %qs clauses", name);
! 	break;
!       }
  }
  
  /* OpenACC 2.0
--- 12813,12820 ----
  check_no_duplicate_clause (tree clauses, enum omp_clause_code code,
  			   const char *name)
  {
!   if (tree c = omp_find_clause (clauses, code))
!     error_at (OMP_CLAUSE_LOCATION (c), "too many %qs clauses", name);
  }
  
  /* OpenACC 2.0
*************** c_parser_oacc_wait_list (c_parser *parse
*** 11954,11965 ****
     If KIND is nonzero, CLAUSE_LOC is the location of the clause.
  
     If KIND is zero, create a TREE_LIST with the decl in TREE_PURPOSE;
!    return the list created.  */
  
  static tree
  c_parser_omp_variable_list (c_parser *parser,
  			    location_t clause_loc,
! 			    enum omp_clause_code kind, tree list)
  {
    auto_vec<c_token> tokens;
    unsigned int tokens_avail = 0;
--- 12870,12885 ----
     If KIND is nonzero, CLAUSE_LOC is the location of the clause.
  
     If KIND is zero, create a TREE_LIST with the decl in TREE_PURPOSE;
!    return the list created.
! 
!    The optional ALLOW_DEREF argument is true if list items can use the deref
!    (->) operator.  */
  
  static tree
  c_parser_omp_variable_list (c_parser *parser,
  			    location_t clause_loc,
! 			    enum omp_clause_code kind, tree list,
! 			    bool allow_deref = false)
  {
    auto_vec<c_token> tokens;
    unsigned int tokens_avail = 0;
*************** c_parser_omp_variable_list (c_parser *pa
*** 12086,12094 ****
  	    case OMP_CLAUSE_MAP:
  	    case OMP_CLAUSE_FROM:
  	    case OMP_CLAUSE_TO:
! 	      while (c_parser_next_token_is (parser, CPP_DOT))
  		{
  		  location_t op_loc = c_parser_peek_token (parser)->location;
  		  c_parser_consume_token (parser);
  		  if (!c_parser_next_token_is (parser, CPP_NAME))
  		    {
--- 13006,13018 ----
  	    case OMP_CLAUSE_MAP:
  	    case OMP_CLAUSE_FROM:
  	    case OMP_CLAUSE_TO:
! 	      while (c_parser_next_token_is (parser, CPP_DOT)
! 		     || (allow_deref
! 			 && c_parser_next_token_is (parser, CPP_DEREF)))
  		{
  		  location_t op_loc = c_parser_peek_token (parser)->location;
+ 		  if (c_parser_next_token_is (parser, CPP_DEREF))
+ 		    t = build_simple_mem_ref (t);
  		  c_parser_consume_token (parser);
  		  if (!c_parser_next_token_is (parser, CPP_NAME))
  		    {
*************** c_parser_omp_variable_list (c_parser *pa
*** 12210,12220 ****
  }
  
  /* Similarly, but expect leading and trailing parenthesis.  This is a very
!    common case for OpenACC and OpenMP clauses.  */
  
  static tree
  c_parser_omp_var_list_parens (c_parser *parser, enum omp_clause_code kind,
! 			      tree list)
  {
    /* The clauses location.  */
    location_t loc = c_parser_peek_token (parser)->location;
--- 13134,13145 ----
  }
  
  /* Similarly, but expect leading and trailing parenthesis.  This is a very
!    common case for OpenACC and OpenMP clauses.  The optional ALLOW_DEREF
!    argument is true if list items can use the deref (->) operator.  */
  
  static tree
  c_parser_omp_var_list_parens (c_parser *parser, enum omp_clause_code kind,
! 			      tree list, bool allow_deref = false)
  {
    /* The clauses location.  */
    location_t loc = c_parser_peek_token (parser)->location;
*************** c_parser_omp_var_list_parens (c_parser *
*** 12222,12228 ****
    matching_parens parens;
    if (parens.require_open (parser))
      {
!       list = c_parser_omp_variable_list (parser, loc, kind, list);
        parens.skip_until_found_close (parser);
      }
    return list;
--- 13147,13153 ----
    matching_parens parens;
    if (parens.require_open (parser))
      {
!       list = c_parser_omp_variable_list (parser, loc, kind, list, allow_deref);
        parens.skip_until_found_close (parser);
      }
    return list;
*************** c_parser_omp_var_list_parens (c_parser *
*** 12234,12240 ****
     copyout ( variable-list )
     create ( variable-list )
     delete ( variable-list )
!    present ( variable-list ) */
  
  static tree
  c_parser_oacc_data_clause (c_parser *parser, pragma_omp_clause c_kind,
--- 13159,13170 ----
     copyout ( variable-list )
     create ( variable-list )
     delete ( variable-list )
!    present ( variable-list )
! 
!    OpenACC 2.6:
!    no_create ( variable-list )
!    attach ( variable-list )
!    detach ( variable-list ) */
  
  static tree
  c_parser_oacc_data_clause (c_parser *parser, pragma_omp_clause c_kind,
*************** c_parser_oacc_data_clause (c_parser *par
*** 12243,12248 ****
--- 13173,13181 ----
    enum gomp_map_kind kind;
    switch (c_kind)
      {
+     case PRAGMA_OACC_CLAUSE_ATTACH:
+       kind = GOMP_MAP_ATTACH;
+       break;
      case PRAGMA_OACC_CLAUSE_COPY:
        kind = GOMP_MAP_TOFROM;
        break;
*************** c_parser_oacc_data_clause (c_parser *par
*** 12258,12263 ****
--- 13191,13199 ----
      case PRAGMA_OACC_CLAUSE_DELETE:
        kind = GOMP_MAP_RELEASE;
        break;
+     case PRAGMA_OACC_CLAUSE_DETACH:
+       kind = GOMP_MAP_DETACH;
+       break;
      case PRAGMA_OACC_CLAUSE_DEVICE:
        kind = GOMP_MAP_FORCE_TO;
        break;
*************** c_parser_oacc_data_clause (c_parser *par
*** 12270,12275 ****
--- 13206,13214 ----
      case PRAGMA_OACC_CLAUSE_LINK:
        kind = GOMP_MAP_LINK;
        break;
+     case PRAGMA_OACC_CLAUSE_NO_CREATE:
+       kind = GOMP_MAP_IF_PRESENT;
+       break;
      case PRAGMA_OACC_CLAUSE_PRESENT:
        kind = GOMP_MAP_FORCE_PRESENT;
        break;
*************** c_parser_oacc_data_clause (c_parser *par
*** 12277,12283 ****
        gcc_unreachable ();
      }
    tree nl, c;
!   nl = c_parser_omp_var_list_parens (parser, OMP_CLAUSE_MAP, list);
  
    for (c = nl; c != list; c = OMP_CLAUSE_CHAIN (c))
      OMP_CLAUSE_SET_MAP_KIND (c, kind);
--- 13216,13222 ----
        gcc_unreachable ();
      }
    tree nl, c;
!   nl = c_parser_omp_var_list_parens (parser, OMP_CLAUSE_MAP, list, true);
  
    for (c = nl; c != list; c = OMP_CLAUSE_CHAIN (c))
      OMP_CLAUSE_SET_MAP_KIND (c, kind);
*************** c_parser_omp_clause_if (c_parser *parser
*** 12623,12630 ****
  	      case OMP_TARGET_DATA: p = "target data"; break;
  	      case OMP_TARGET: p = "target"; break;
  	      case OMP_TARGET_UPDATE: p = "target update"; break;
! 	      case OMP_TARGET_ENTER_DATA: p = "enter data"; break;
! 	      case OMP_TARGET_EXIT_DATA: p = "exit data"; break;
  	      default: gcc_unreachable ();
  	      }
  	    error_at (location, "too many %<if%> clauses with %qs modifier",
--- 13562,13569 ----
  	      case OMP_TARGET_DATA: p = "target data"; break;
  	      case OMP_TARGET: p = "target"; break;
  	      case OMP_TARGET_UPDATE: p = "target update"; break;
! 	      case OMP_TARGET_ENTER_DATA: p = "target enter data"; break;
! 	      case OMP_TARGET_EXIT_DATA: p = "target exit data"; break;
  	      default: gcc_unreachable ();
  	      }
  	    error_at (location, "too many %<if%> clauses with %qs modifier",
*************** c_parser_omp_clause_use_device_ptr (c_pa
*** 13130,13135 ****
--- 14069,14084 ----
  				       list);
  }
  
+ /* OpenMP 5.0:
+    use_device_addr ( variable-list ) */
+ 
+ static tree
+ c_parser_omp_clause_use_device_addr (c_parser *parser, tree list)
+ {
+   return c_parser_omp_var_list_parens (parser, OMP_CLAUSE_USE_DEVICE_ADDR,
+ 				       list);
+ }
+ 
  /* OpenMP 4.5:
     is_device_ptr ( variable-list ) */
  
*************** c_parser_oacc_clause_wait (c_parser *par
*** 13483,13488 ****
--- 14432,14514 ----
    return list;
  }
  
+ 
+ /* OpenMP 5.0:
+    order ( concurrent ) */
+ 
+ static tree
+ c_parser_omp_clause_order (c_parser *parser, tree list)
+ {
+   location_t loc = c_parser_peek_token (parser)->location;
+   tree c;
+   const char *p;
+ 
+   matching_parens parens;
+   if (!parens.require_open (parser))
+     return list;
+   if (!c_parser_next_token_is (parser, CPP_NAME))
+     {
+       c_parser_error (parser, "expected %<concurrent%>");
+       goto out_err;
+     }
+   p = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value);
+   if (strcmp (p, "concurrent") != 0)
+     {
+       c_parser_error (parser, "expected %<concurrent%>");
+       goto out_err;
+     }
+   c_parser_consume_token (parser);
+   parens.skip_until_found_close (parser);
+   /* check_no_duplicate_clause (list, OMP_CLAUSE_ORDER, "order"); */
+   c = build_omp_clause (loc, OMP_CLAUSE_ORDER);
+   OMP_CLAUSE_CHAIN (c) = list;
+   return c;
+ 
+  out_err:
+   parens.skip_until_found_close (parser);
+   return list;
+ }
+ 
+ 
+ /* OpenMP 5.0:
+    bind ( teams | parallel | thread ) */
+ 
+ static tree
+ c_parser_omp_clause_bind (c_parser *parser, tree list)
+ {
+   location_t loc = c_parser_peek_token (parser)->location;
+   tree c;
+   const char *p;
+   enum omp_clause_bind_kind kind = OMP_CLAUSE_BIND_THREAD;
+ 
+   matching_parens parens;
+   if (!parens.require_open (parser))
+     return list;
+   if (!c_parser_next_token_is (parser, CPP_NAME))
+     {
+      invalid:
+       c_parser_error (parser,
+ 		      "expected %<teams%>, %<parallel%> or %<thread%>");
+       parens.skip_until_found_close (parser);
+       return list;
+     }
+   p = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value);
+   if (strcmp (p, "teams") == 0)
+     kind = OMP_CLAUSE_BIND_TEAMS;
+   else if (strcmp (p, "parallel") == 0)
+     kind = OMP_CLAUSE_BIND_PARALLEL;
+   else if (strcmp (p, "thread") != 0)
+     goto invalid;
+   c_parser_consume_token (parser);
+   parens.skip_until_found_close (parser);
+   /* check_no_duplicate_clause (list, OMP_CLAUSE_BIND, "bind"); */
+   c = build_omp_clause (loc, OMP_CLAUSE_BIND);
+   OMP_CLAUSE_BIND_KIND (c) = kind;
+   OMP_CLAUSE_CHAIN (c) = list;
+   return c;
+ }
+ 
+ 
  /* OpenMP 2.5:
     ordered
  
*************** c_parser_omp_clause_reduction (c_parser
*** 13586,13596 ****
  	      if (strcmp (p, "task") == 0)
  		task = true;
  	      else if (strcmp (p, "inscan") == 0)
! 		{
! 		  inscan = true;
! 		  sorry ("%<inscan%> modifier on %<reduction%> clause "
! 			 "not supported yet");
! 		}
  	      if (task || inscan)
  		{
  		  c_parser_consume_token (parser);
--- 14612,14618 ----
  	      if (strcmp (p, "task") == 0)
  		task = true;
  	      else if (strcmp (p, "inscan") == 0)
! 		inscan = true;
  	      if (task || inscan)
  		{
  		  c_parser_consume_token (parser);
*************** c_parser_omp_clause_proc_bind (c_parser
*** 14780,14785 ****
--- 15802,15808 ----
    else
      goto invalid_kind;
  
+   check_no_duplicate_clause (list, OMP_CLAUSE_PROC_BIND, "proc_bind");
    c_parser_consume_token (parser);
    parens.skip_until_found_close (parser);
    c = build_omp_clause (clause_loc, OMP_CLAUSE_PROC_BIND);
*************** c_parser_omp_clause_proc_bind (c_parser
*** 14793,14798 ****
--- 15816,15865 ----
    return list;
  }
  
+ /* OpenMP 5.0:
+    device_type ( host | nohost | any )  */
+ 
+ static tree
+ c_parser_omp_clause_device_type (c_parser *parser, tree list)
+ {
+   location_t clause_loc = c_parser_peek_token (parser)->location;
+   enum omp_clause_device_type_kind kind;
+   tree c;
+ 
+   matching_parens parens;
+   if (!parens.require_open (parser))
+     return list;
+ 
+   if (c_parser_next_token_is (parser, CPP_NAME))
+     {
+       const char *p = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value);
+       if (strcmp ("host", p) == 0)
+ 	kind = OMP_CLAUSE_DEVICE_TYPE_HOST;
+       else if (strcmp ("nohost", p) == 0)
+ 	kind = OMP_CLAUSE_DEVICE_TYPE_NOHOST;
+       else if (strcmp ("any", p) == 0)
+ 	kind = OMP_CLAUSE_DEVICE_TYPE_ANY;
+       else
+ 	goto invalid_kind;
+     }
+   else
+     goto invalid_kind;
+ 
+   /* check_no_duplicate_clause (list, OMP_CLAUSE_DEVICE_TYPE,
+ 				"device_type");  */
+   c_parser_consume_token (parser);
+   parens.skip_until_found_close (parser);
+   c = build_omp_clause (clause_loc, OMP_CLAUSE_DEVICE_TYPE);
+   OMP_CLAUSE_DEVICE_TYPE_KIND (c) = kind;
+   OMP_CLAUSE_CHAIN (c) = list;
+   return c;
+ 
+  invalid_kind:
+   c_parser_error (parser, "expected %<host%>, %<nohost%> or %<any%>");
+   parens.skip_until_found_close (parser);
+   return list;
+ }
+ 
  /* OpenMP 4.0:
     to ( variable-list ) */
  
*************** c_parser_oacc_all_clauses (c_parser *par
*** 14864,14869 ****
--- 15931,15940 ----
  						 clauses);
  	  c_name = "auto";
  	  break;
+ 	case PRAGMA_OACC_CLAUSE_ATTACH:
+ 	  clauses = c_parser_oacc_data_clause (parser, c_kind, clauses);
+ 	  c_name = "attach";
+ 	  break;
  	case PRAGMA_OACC_CLAUSE_COLLAPSE:
  	  clauses = c_parser_omp_clause_collapse (parser, clauses);
  	  c_name = "collapse";
*************** c_parser_oacc_all_clauses (c_parser *par
*** 14892,14897 ****
--- 15963,15972 ----
  	  clauses = c_parser_omp_clause_default (parser, clauses, true);
  	  c_name = "default";
  	  break;
+ 	case PRAGMA_OACC_CLAUSE_DETACH:
+ 	  clauses = c_parser_oacc_data_clause (parser, c_kind, clauses);
+ 	  c_name = "detach";
+ 	  break;
  	case PRAGMA_OACC_CLAUSE_DEVICE:
  	  clauses = c_parser_oacc_data_clause (parser, c_kind, clauses);
  	  c_name = "device";
*************** c_parser_oacc_all_clauses (c_parser *par
*** 14940,14945 ****
--- 16015,16024 ----
  	  clauses = c_parser_oacc_data_clause (parser, c_kind, clauses);
  	  c_name = "link";
  	  break;
+ 	case PRAGMA_OACC_CLAUSE_NO_CREATE:
+ 	  clauses = c_parser_oacc_data_clause (parser, c_kind, clauses);
+ 	  c_name = "no_create";
+ 	  break;
  	case PRAGMA_OACC_CLAUSE_NUM_GANGS:
  	  clauses = c_parser_oacc_single_int_clause (parser,
  						     OMP_CLAUSE_NUM_GANGS,
*************** c_parser_oacc_all_clauses (c_parser *par
*** 15025,15035 ****
  }
  
  /* Parse all OpenMP clauses.  The set clauses allowed by the directive
!    is a bitmask in MASK.  Return the list of clauses found.  */
  
  static tree
  c_parser_omp_all_clauses (c_parser *parser, omp_clause_mask mask,
! 			  const char *where, bool finish_p = true)
  {
    tree clauses = NULL;
    bool first = true;
--- 16104,16119 ----
  }
  
  /* Parse all OpenMP clauses.  The set clauses allowed by the directive
!    is a bitmask in MASK.  Return the list of clauses found.
!    FINISH_P set if c_finish_omp_clauses should be called.
!    NESTED non-zero if clauses should be terminated by closing paren instead
!    of end of pragma.  If it is 2, additionally commas are required in between
!    the clauses.  */
  
  static tree
  c_parser_omp_all_clauses (c_parser *parser, omp_clause_mask mask,
! 			  const char *where, bool finish_p = true,
! 			  int nested = 0)
  {
    tree clauses = NULL;
    bool first = true;
*************** c_parser_omp_all_clauses (c_parser *pars
*** 15041,15054 ****
        const char *c_name;
        tree prev = clauses;
  
!       if (!first && c_parser_next_token_is (parser, CPP_COMMA))
! 	c_parser_consume_token (parser);
  
        here = c_parser_peek_token (parser)->location;
        c_kind = c_parser_omp_clause_name (parser);
  
        switch (c_kind)
  	{
  	case PRAGMA_OMP_CLAUSE_COLLAPSE:
  	  clauses = c_parser_omp_clause_collapse (parser, clauses);
  	  c_name = "collapse";
--- 16125,16152 ----
        const char *c_name;
        tree prev = clauses;
  
!       if (nested && c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
! 	break;
! 
!       if (!first)
! 	{
! 	  if (c_parser_next_token_is (parser, CPP_COMMA))
! 	    c_parser_consume_token (parser);
! 	  else if (nested == 2)
! 	    error_at (c_parser_peek_token (parser)->location,
! 		      "clauses in %<simd%> trait should be separated "
! 		      "by %<,%>");
! 	}
  
        here = c_parser_peek_token (parser)->location;
        c_kind = c_parser_omp_clause_name (parser);
  
        switch (c_kind)
  	{
+ 	case PRAGMA_OMP_CLAUSE_BIND:
+ 	  clauses = c_parser_omp_clause_bind (parser, clauses);
+ 	  c_name = "bind";
+ 	  break;
  	case PRAGMA_OMP_CLAUSE_COLLAPSE:
  	  clauses = c_parser_omp_clause_collapse (parser, clauses);
  	  c_name = "collapse";
*************** c_parser_omp_all_clauses (c_parser *pars
*** 15115,15120 ****
--- 16213,16222 ----
  	  clauses = c_parser_omp_clause_num_threads (parser, clauses);
  	  c_name = "num_threads";
  	  break;
+ 	case PRAGMA_OMP_CLAUSE_ORDER:
+ 	  clauses = c_parser_omp_clause_order (parser, clauses);
+ 	  c_name = "order";
+ 	  break;
  	case PRAGMA_OMP_CLAUSE_ORDERED:
  	  clauses = c_parser_omp_clause_ordered (parser, clauses);
  	  c_name = "ordered";
*************** c_parser_omp_all_clauses (c_parser *pars
*** 15252,15257 ****
--- 16354,16363 ----
  	  clauses = c_parser_omp_clause_use_device_ptr (parser, clauses);
  	  c_name = "use_device_ptr";
  	  break;
+ 	case PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR:
+ 	  clauses = c_parser_omp_clause_use_device_addr (parser, clauses);
+ 	  c_name = "use_device_addr";
+ 	  break;
  	case PRAGMA_OMP_CLAUSE_IS_DEVICE_PTR:
  	  clauses = c_parser_omp_clause_is_device_ptr (parser, clauses);
  	  c_name = "is_device_ptr";
*************** c_parser_omp_all_clauses (c_parser *pars
*** 15268,15273 ****
--- 16374,16383 ----
  	  clauses = c_parser_omp_clause_proc_bind (parser, clauses);
  	  c_name = "proc_bind";
  	  break;
+ 	case PRAGMA_OMP_CLAUSE_DEVICE_TYPE:
+ 	  clauses = c_parser_omp_clause_device_type (parser, clauses);
+ 	  c_name = "device_type";
+ 	  break;
  	case PRAGMA_OMP_CLAUSE_SAFELEN:
  	  clauses = c_parser_omp_clause_safelen (parser, clauses);
  	  c_name = "safelen";
*************** c_parser_omp_all_clauses (c_parser *pars
*** 15309,15315 ****
      }
  
   saw_error:
!   c_parser_skip_to_pragma_eol (parser);
  
    if (finish_p)
      {
--- 16419,16426 ----
      }
  
   saw_error:
!   if (!nested)
!     c_parser_skip_to_pragma_eol (parser);
  
    if (finish_p)
      {
*************** c_parser_oacc_cache (location_t loc, c_p
*** 15370,15381 ****
  */
  
  #define OACC_DATA_CLAUSE_MASK						\
! 	( (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPY)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPYIN)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPYOUT)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_CREATE)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_DEVICEPTR)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_IF)			\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_PRESENT))
  
  static tree
--- 16481,16494 ----
  */
  
  #define OACC_DATA_CLAUSE_MASK						\
! 	( (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_ATTACH)		\
! 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPY)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPYIN)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPYOUT)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_CREATE)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_DEVICEPTR)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_IF)			\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_NO_CREATE)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_PRESENT))
  
  static tree
*************** c_parser_oacc_declare (c_parser *parser)
*** 15487,15492 ****
--- 16600,16614 ----
  	  break;
  	}
  
+       if (!c_check_in_current_scope (decl))
+ 	{
+ 	  error_at (loc,
+ 		    "%qD must be a variable declared in the same scope as "
+ 		    "%<#pragma acc declare%>", decl);
+ 	  error = true;
+ 	  continue;
+ 	}
+ 
        if (lookup_attribute ("omp declare target", DECL_ATTRIBUTES (decl))
  	  || lookup_attribute ("omp declare target link",
  			       DECL_ATTRIBUTES (decl)))
*************** c_parser_oacc_declare (c_parser *parser)
*** 15553,15558 ****
--- 16675,16681 ----
  #define OACC_ENTER_DATA_CLAUSE_MASK					\
  	( (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_IF)			\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_ASYNC)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_ATTACH)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPYIN)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_CREATE)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_WAIT) )
*************** c_parser_oacc_declare (c_parser *parser)
*** 15562,15567 ****
--- 16685,16691 ----
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_ASYNC)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPYOUT)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_DELETE) 		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_DETACH) 		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_FINALIZE) 		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_WAIT) )
  
*************** c_parser_oacc_enter_exit_data (c_parser
*** 15617,15623 ****
  */
  
  #define OACC_HOST_DATA_CLAUSE_MASK					\
! 	( (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_USE_DEVICE) )
  
  static tree
  c_parser_oacc_host_data (location_t loc, c_parser *parser, bool *if_p)
--- 16741,16749 ----
  */
  
  #define OACC_HOST_DATA_CLAUSE_MASK					\
! 	( (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_USE_DEVICE)          \
! 	 | (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_IF)                  \
! 	 | (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_IF_PRESENT) )
  
  static tree
  c_parser_oacc_host_data (location_t loc, c_parser *parser, bool *if_p)
*************** c_parser_oacc_loop (location_t loc, c_pa
*** 15691,15701 ****
--- 16817,16833 ----
     # pragma acc parallel oacc-parallel-clause[optseq] new-line
       structured-block
  
+    OpenACC 2.6:
+ 
+    # pragma acc serial oacc-serial-clause[optseq] new-line
+      structured-block
+ 
     LOC is the location of the #pragma token.
  */
  
  #define OACC_KERNELS_CLAUSE_MASK					\
  	( (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_ASYNC)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_ATTACH)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPY)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPYIN)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPYOUT)		\
*************** c_parser_oacc_loop (location_t loc, c_pa
*** 15703,15708 ****
--- 16835,16841 ----
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_DEFAULT)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_DEVICEPTR)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_IF)			\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_NO_CREATE)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_NUM_GANGS)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_NUM_WORKERS)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_PRESENT)		\
*************** c_parser_oacc_loop (location_t loc, c_pa
*** 15711,15716 ****
--- 16844,16850 ----
  
  #define OACC_PARALLEL_CLAUSE_MASK					\
  	( (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_ASYNC)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_ATTACH)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPY)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPYIN)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPYOUT)		\
*************** c_parser_oacc_loop (location_t loc, c_pa
*** 15718,15723 ****
--- 16852,16858 ----
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_DEFAULT)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_DEVICEPTR)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_IF)			\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_NO_CREATE)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_PRIVATE)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_FIRSTPRIVATE)	\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_NUM_GANGS)		\
*************** c_parser_oacc_loop (location_t loc, c_pa
*** 15727,15736 ****
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_VECTOR_LENGTH)	\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_WAIT) )
  
  static tree
! c_parser_oacc_kernels_parallel (location_t loc, c_parser *parser,
! 				enum pragma_kind p_kind, char *p_name,
! 				bool *if_p)
  {
    omp_clause_mask mask;
    enum tree_code code;
--- 16862,16887 ----
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_VECTOR_LENGTH)	\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_WAIT) )
  
+ #define OACC_SERIAL_CLAUSE_MASK					\
+ 	( (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_ASYNC)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_ATTACH)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPY)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPYIN)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_COPYOUT)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_CREATE)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_DEFAULT)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_DEVICEPTR)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_IF)			\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_NO_CREATE)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_PRIVATE)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_FIRSTPRIVATE)	\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_PRESENT)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_REDUCTION)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OACC_CLAUSE_WAIT) )
+ 
  static tree
! c_parser_oacc_compute (location_t loc, c_parser *parser,
! 		       enum pragma_kind p_kind, char *p_name, bool *if_p)
  {
    omp_clause_mask mask;
    enum tree_code code;
*************** c_parser_oacc_kernels_parallel (location
*** 15746,15751 ****
--- 16897,16907 ----
        mask = OACC_PARALLEL_CLAUSE_MASK;
        code = OACC_PARALLEL;
        break;
+     case PRAGMA_OACC_SERIAL:
+       strcat (p_name, " serial");
+       mask = OACC_SERIAL_CLAUSE_MASK;
+       code = OACC_SERIAL;
+       break;
      default:
        gcc_unreachable ();
      }
*************** c_parser_oacc_routine (c_parser *parser,
*** 15796,15802 ****
    oacc_routine_data data;
    data.error_seen = false;
    data.fndecl_seen = false;
-   data.clauses = NULL_TREE;
    data.loc = c_parser_peek_token (parser)->location;
  
    c_parser_consume_pragma (parser);
--- 16952,16957 ----
*************** c_parser_oacc_routine (c_parser *parser,
*** 15832,15837 ****
--- 16987,16995 ----
        data.clauses
  	= c_parser_oacc_all_clauses (parser, OACC_ROUTINE_CLAUSE_MASK,
  				     "#pragma acc routine");
+       /* The clauses are in reverse order; fix that to make later diagnostic
+ 	 emission easier.  */
+       data.clauses = nreverse (data.clauses);
  
        if (TREE_CODE (decl) != FUNCTION_DECL)
  	{
*************** c_parser_oacc_routine (c_parser *parser,
*** 15846,15851 ****
--- 17004,17012 ----
        data.clauses
  	= c_parser_oacc_all_clauses (parser, OACC_ROUTINE_CLAUSE_MASK,
  				     "#pragma acc routine");
+       /* The clauses are in reverse order; fix that to make later diagnostic
+ 	 emission easier.  */
+       data.clauses = nreverse (data.clauses);
  
        /* Emit a helpful diagnostic if there's another pragma following this
  	 one.  Also don't allow a static assertion declaration, as in the
*************** c_parser_oacc_routine (c_parser *parser,
*** 15871,15882 ****
  	  while (c_parser_next_token_is (parser, CPP_KEYWORD)
  		 && c_parser_peek_token (parser)->keyword == RID_EXTENSION);
  	  c_parser_declaration_or_fndef (parser, true, true, true, false, true,
! 					 NULL, vNULL, &data);
  	  restore_extension_diagnostics (ext);
  	}
        else
  	c_parser_declaration_or_fndef (parser, true, true, true, false, true,
! 				       NULL, vNULL, &data);
      }
  }
  
--- 17032,17043 ----
  	  while (c_parser_next_token_is (parser, CPP_KEYWORD)
  		 && c_parser_peek_token (parser)->keyword == RID_EXTENSION);
  	  c_parser_declaration_or_fndef (parser, true, true, true, false, true,
! 					 NULL, vNULL, false, NULL, &data);
  	  restore_extension_diagnostics (ext);
  	}
        else
  	c_parser_declaration_or_fndef (parser, true, true, true, false, true,
! 				       NULL, vNULL, false, NULL, &data);
      }
  }
  
*************** c_finish_oacc_routine (struct oacc_routi
*** 15909,15941 ****
        return;
      }
  
!   if (oacc_get_fn_attrib (fndecl))
      {
-       error_at (data->loc,
- 		"%<#pragma acc routine%> already applied to %qD", fndecl);
        data->error_seen = true;
        return;
      }
! 
!   if (TREE_USED (fndecl) || (!is_defn && DECL_SAVED_TREE (fndecl)))
      {
-       error_at (data->loc,
- 		TREE_USED (fndecl)
- 		? G_("%<#pragma acc routine%> must be applied before use")
- 		: G_("%<#pragma acc routine%> must be applied before "
- 		     "definition"));
-       data->error_seen = true;
-       return;
      }
  
!   /* Process the routine's dimension clauses.  */
!   tree dims = oacc_build_routine_dims (data->clauses);
!   oacc_replace_fn_attrib (fndecl, dims);
  
!   /* Add an "omp declare target" attribute.  */
!   DECL_ATTRIBUTES (fndecl)
!     = tree_cons (get_identifier ("omp declare target"),
! 		 NULL_TREE, DECL_ATTRIBUTES (fndecl));
  
    /* Remember that we've used this "#pragma acc routine".  */
    data->fndecl_seen = true;
--- 17070,17108 ----
        return;
      }
  
!   int compatible
!     = oacc_verify_routine_clauses (fndecl, &data->clauses, data->loc,
! 				   "#pragma acc routine");
!   if (compatible < 0)
      {
        data->error_seen = true;
        return;
      }
!   if (compatible > 0)
      {
      }
+   else
+     {
+       if (TREE_USED (fndecl) || (!is_defn && DECL_SAVED_TREE (fndecl)))
+ 	{
+ 	  error_at (data->loc,
+ 		    TREE_USED (fndecl)
+ 		    ? G_("%<#pragma acc routine%> must be applied before use")
+ 		    : G_("%<#pragma acc routine%> must be applied before"
+ 			 " definition"));
+ 	  data->error_seen = true;
+ 	  return;
+ 	}
  
!       /* Set the routine's level of parallelism.  */
!       tree dims = oacc_build_routine_dims (data->clauses);
!       oacc_replace_fn_attrib (fndecl, dims);
  
!       /* Add an "omp declare target" attribute.  */
!       DECL_ATTRIBUTES (fndecl)
! 	= tree_cons (get_identifier ("omp declare target"),
! 		     data->clauses, DECL_ATTRIBUTES (fndecl));
!     }
  
    /* Remember that we've used this "#pragma acc routine".  */
    data->fndecl_seen = true;
*************** c_parser_omp_flush (c_parser *parser)
*** 16757,16762 ****
--- 17924,17994 ----
    c_finish_omp_flush (loc, mo);
  }
  
+ /* OpenMP 5.0:
+ 
+    scan-loop-body:
+      { structured-block scan-directive structured-block }  */
+ 
+ static void
+ c_parser_omp_scan_loop_body (c_parser *parser, bool open_brace_parsed)
+ {
+   tree substmt;
+   location_t loc;
+   tree clauses = NULL_TREE;
+ 
+   loc = c_parser_peek_token (parser)->location;
+   if (!open_brace_parsed
+       && !c_parser_require (parser, CPP_OPEN_BRACE, "expected %<{%>"))
+     {
+       /* Avoid skipping until the end of the block.  */
+       parser->error = false;
+       return;
+     }
+ 
+   substmt = c_parser_omp_structured_block (parser, NULL);
+   substmt = build2 (OMP_SCAN, void_type_node, substmt, NULL_TREE);
+   SET_EXPR_LOCATION (substmt, loc);
+   add_stmt (substmt);
+ 
+   loc = c_parser_peek_token (parser)->location;
+   if (c_parser_peek_token (parser)->pragma_kind == PRAGMA_OMP_SCAN)
+     {
+       enum omp_clause_code clause = OMP_CLAUSE_ERROR;
+ 
+       c_parser_consume_pragma (parser);
+ 
+       if (c_parser_next_token_is (parser, CPP_NAME))
+ 	{
+ 	  const char *p
+ 	    = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value);
+ 	  if (strcmp (p, "inclusive") == 0)
+ 	    clause = OMP_CLAUSE_INCLUSIVE;
+ 	  else if (strcmp (p, "exclusive") == 0)
+ 	    clause = OMP_CLAUSE_EXCLUSIVE;
+ 	}
+       if (clause != OMP_CLAUSE_ERROR)
+ 	{
+ 	  c_parser_consume_token (parser);
+ 	  clauses = c_parser_omp_var_list_parens (parser, clause, NULL_TREE);
+ 	}
+       else
+ 	c_parser_error (parser, "expected %<inclusive%> or "
+ 				"%<exclusive%> clause");
+       c_parser_skip_to_pragma_eol (parser);
+     }
+   else
+     error ("expected %<#pragma omp scan%>");
+ 
+   clauses = c_finish_omp_clauses (clauses, C_ORT_OMP);
+   substmt = c_parser_omp_structured_block (parser, NULL);
+   substmt = build2 (OMP_SCAN, void_type_node, substmt, clauses);
+   SET_EXPR_LOCATION (substmt, loc);
+   add_stmt (substmt);
+ 
+   c_parser_skip_until_found (parser, CPP_CLOSE_BRACE,
+ 			     "expected %<}%>");
+ }
+ 
  /* Parse the restricted form of loop statements allowed by OpenACC and OpenMP.
     The real trick here is to determine the loop control variable early
     so that we can push a new decl if necessary to make it private.
*************** c_parser_omp_for_loop (location_t loc, c
*** 16775,16780 ****
--- 18007,18013 ----
    int i, collapse = 1, ordered = 0, count, nbraces = 0;
    location_t for_loc;
    bool tiling = false;
+   bool inscan = false;
    vec<tree, va_gc> *for_block = make_tree_vector ();
  
    for (cl = clauses; cl; cl = OMP_CLAUSE_CHAIN (cl))
*************** c_parser_omp_for_loop (location_t loc, c
*** 16791,16796 ****
--- 18024,18033 ----
  	ordered_cl = cl;
  	ordered = tree_to_shwi (OMP_CLAUSE_ORDERED_EXPR (cl));
        }
+     else if (OMP_CLAUSE_CODE (cl) == OMP_CLAUSE_REDUCTION
+ 	     && OMP_CLAUSE_REDUCTION_INSCAN (cl)
+ 	     && (code == OMP_SIMD || code == OMP_FOR))
+       inscan = true;
  
    if (ordered && ordered < collapse)
      {
*************** c_parser_omp_for_loop (location_t loc, c
*** 17011,17017 ****
    c_cont_label = NULL_TREE;
    body = push_stmt_list ();
  
!   if (open_brace_parsed)
      {
        location_t here = c_parser_peek_token (parser)->location;
        stmt = c_begin_compound_stmt (true);
--- 18248,18256 ----
    c_cont_label = NULL_TREE;
    body = push_stmt_list ();
  
!   if (inscan)
!     c_parser_omp_scan_loop_body (parser, open_brace_parsed);
!   else if (open_brace_parsed)
      {
        location_t here = c_parser_peek_token (parser)->location;
        stmt = c_begin_compound_stmt (true);
*************** omp_split_clauses (location_t loc, enum
*** 17143,17148 ****
--- 18382,18427 ----
        cclauses[i] = c_finish_omp_clauses (cclauses[i], C_ORT_OMP);
  }
  
+ /* OpenMP 5.0:
+    #pragma omp loop loop-clause[optseq] new-line
+      for-loop
+ 
+    LOC is the location of the #pragma token.
+ */
+ 
+ #define OMP_LOOP_CLAUSE_MASK					\
+ 	( (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_PRIVATE)	\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_LASTPRIVATE)	\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_REDUCTION)	\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_COLLAPSE)	\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_BIND)		\
+ 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_ORDER))
+ 
+ static tree
+ c_parser_omp_loop (location_t loc, c_parser *parser,
+ 		   char *p_name, omp_clause_mask mask, tree *cclauses,
+ 		   bool *if_p)
+ {
+   tree block, clauses, ret;
+ 
+   strcat (p_name, " loop");
+   mask |= OMP_LOOP_CLAUSE_MASK;
+ 
+   clauses = c_parser_omp_all_clauses (parser, mask, p_name, cclauses == NULL);
+   if (cclauses)
+     {
+       omp_split_clauses (loc, OMP_LOOP, mask, clauses, cclauses);
+       clauses = cclauses[C_OMP_CLAUSE_SPLIT_LOOP];
+     }
+ 
+   block = c_begin_compound_stmt (true);
+   ret = c_parser_omp_for_loop (loc, parser, OMP_LOOP, clauses, cclauses, if_p);
+   block = c_end_compound_stmt (loc, block, true);
+   add_stmt (block);
+ 
+   return ret;
+ }
+ 
  /* OpenMP 4.0:
     #pragma omp simd simd-clause[optseq] new-line
       for-loop
*************** omp_split_clauses (location_t loc, enum
*** 17160,17166 ****
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_REDUCTION)	\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_COLLAPSE)	\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_IF)		\
! 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_NONTEMPORAL))
  
  static tree
  c_parser_omp_simd (location_t loc, c_parser *parser,
--- 18439,18446 ----
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_REDUCTION)	\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_COLLAPSE)	\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_IF)		\
! 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_NONTEMPORAL)	\
! 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_ORDER))
  
  static tree
  c_parser_omp_simd (location_t loc, c_parser *parser,
*************** c_parser_omp_simd (location_t loc, c_par
*** 17216,17222 ****
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_ORDERED)	\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_SCHEDULE)	\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_COLLAPSE)	\
! 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_NOWAIT))
  
  static tree
  c_parser_omp_for (location_t loc, c_parser *parser,
--- 18496,18503 ----
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_ORDERED)	\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_SCHEDULE)	\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_COLLAPSE)	\
! 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_NOWAIT)	\
! 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_ORDER))
  
  static tree
  c_parser_omp_for (location_t loc, c_parser *parser,
*************** c_parser_omp_parallel (location_t loc, c
*** 17606,17615 ****
        c_parser_skip_to_pragma_eol (parser);
        return NULL_TREE;
      }
!   else if (cclauses == NULL && c_parser_next_token_is (parser, CPP_NAME))
      {
        const char *p = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value);
!       if (strcmp (p, "master") == 0)
  	{
  	  tree cclauses_buf[C_OMP_CLAUSE_SPLIT_COUNT];
  	  cclauses = cclauses_buf;
--- 18887,18896 ----
        c_parser_skip_to_pragma_eol (parser);
        return NULL_TREE;
      }
!   else if (c_parser_next_token_is (parser, CPP_NAME))
      {
        const char *p = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value);
!       if (cclauses == NULL && strcmp (p, "master") == 0)
  	{
  	  tree cclauses_buf[C_OMP_CLAUSE_SPLIT_COUNT];
  	  cclauses = cclauses_buf;
*************** c_parser_omp_parallel (location_t loc, c
*** 17624,17632 ****
  	  stmt = c_finish_omp_parallel (loc,
  					cclauses[C_OMP_CLAUSE_SPLIT_PARALLEL],
  					block);
- 	  OMP_PARALLEL_COMBINED (stmt) = 1;
  	  if (ret == NULL)
  	    return ret;
  	  return stmt;
  	}
        else if (!flag_openmp)  /* flag_openmp_simd  */
--- 18905,18935 ----
  	  stmt = c_finish_omp_parallel (loc,
  					cclauses[C_OMP_CLAUSE_SPLIT_PARALLEL],
  					block);
  	  if (ret == NULL)
  	    return ret;
+ 	  OMP_PARALLEL_COMBINED (stmt) = 1;
+ 	  return stmt;
+ 	}
+       else if (strcmp (p, "loop") == 0)
+ 	{
+ 	  tree cclauses_buf[C_OMP_CLAUSE_SPLIT_COUNT];
+ 	  if (cclauses == NULL)
+ 	    cclauses = cclauses_buf;
+ 
+ 	  c_parser_consume_token (parser);
+ 	  if (!flag_openmp)  /* flag_openmp_simd  */
+ 	    return c_parser_omp_loop (loc, parser, p_name, mask, cclauses,
+ 				      if_p);
+ 	  block = c_begin_omp_parallel ();
+ 	  tree ret = c_parser_omp_loop (loc, parser, p_name, mask, cclauses,
+ 					if_p);
+ 	  stmt
+ 	    = c_finish_omp_parallel (loc,
+ 				     cclauses[C_OMP_CLAUSE_SPLIT_PARALLEL],
+ 				     block);
+ 	  if (ret == NULL_TREE)
+ 	    return ret;
+ 	  OMP_PARALLEL_COMBINED (stmt) = 1;
  	  return stmt;
  	}
        else if (!flag_openmp)  /* flag_openmp_simd  */
*************** c_parser_omp_parallel (location_t loc, c
*** 17634,17640 ****
  	  c_parser_skip_to_pragma_eol (parser, false);
  	  return NULL_TREE;
  	}
!       else if (strcmp (p, "sections") == 0)
  	{
  	  tree cclauses_buf[C_OMP_CLAUSE_SPLIT_COUNT];
  	  cclauses = cclauses_buf;
--- 18937,18943 ----
  	  c_parser_skip_to_pragma_eol (parser, false);
  	  return NULL_TREE;
  	}
!       else if (cclauses == NULL && strcmp (p, "sections") == 0)
  	{
  	  tree cclauses_buf[C_OMP_CLAUSE_SPLIT_COUNT];
  	  cclauses = cclauses_buf;
*************** c_parser_omp_teams (location_t loc, c_pa
*** 18014,18019 ****
--- 19317,19346 ----
  	  SET_EXPR_LOCATION (ret, loc);
  	  return add_stmt (ret);
  	}
+       else if (strcmp (p, "loop") == 0)
+ 	{
+ 	  tree cclauses_buf[C_OMP_CLAUSE_SPLIT_COUNT];
+ 	  if (cclauses == NULL)
+ 	    cclauses = cclauses_buf;
+ 
+ 	  c_parser_consume_token (parser);
+ 	  if (!flag_openmp)  /* flag_openmp_simd  */
+ 	    return c_parser_omp_loop (loc, parser, p_name, mask, cclauses,
+ 				      if_p);
+ 	  block = c_begin_omp_parallel ();
+ 	  ret = c_parser_omp_loop (loc, parser, p_name, mask, cclauses, if_p);
+ 	  block = c_end_compound_stmt (loc, block, true);
+ 	  if (ret == NULL)
+ 	    return ret;
+ 	  clauses = cclauses[C_OMP_CLAUSE_SPLIT_TEAMS];
+ 	  ret = make_node (OMP_TEAMS);
+ 	  TREE_TYPE (ret) = void_type_node;
+ 	  OMP_TEAMS_CLAUSES (ret) = clauses;
+ 	  OMP_TEAMS_BODY (ret) = block;
+ 	  OMP_TEAMS_COMBINED (ret) = 1;
+ 	  SET_EXPR_LOCATION (ret, loc);
+ 	  return add_stmt (ret);
+ 	}
      }
    if (!flag_openmp)  /* flag_openmp_simd  */
      {
*************** c_parser_omp_teams (location_t loc, c_pa
*** 18047,18053 ****
  	( (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_DEVICE)	\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_MAP)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_IF)		\
! 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR))
  
  static tree
  c_parser_omp_target_data (location_t loc, c_parser *parser, bool *if_p)
--- 19374,19381 ----
  	( (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_DEVICE)	\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_MAP)		\
  	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_IF)		\
! 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR) \
! 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR))
  
  static tree
  c_parser_omp_target_data (location_t loc, c_parser *parser, bool *if_p)
*************** c_parser_omp_target_data (location_t loc
*** 18082,18088 ****
  	    *pc = OMP_CLAUSE_CHAIN (*pc);
  	    continue;
  	  }
!       else if (OMP_CLAUSE_CODE (*pc) == OMP_CLAUSE_USE_DEVICE_PTR)
  	map_seen = 3;
        pc = &OMP_CLAUSE_CHAIN (*pc);
      }
--- 19410,19417 ----
  	    *pc = OMP_CLAUSE_CHAIN (*pc);
  	    continue;
  	  }
!       else if (OMP_CLAUSE_CODE (*pc) == OMP_CLAUSE_USE_DEVICE_PTR
! 	       || OMP_CLAUSE_CODE (*pc) == OMP_CLAUSE_USE_DEVICE_ADDR)
  	map_seen = 3;
        pc = &OMP_CLAUSE_CHAIN (*pc);
      }
*************** c_parser_omp_target_data (location_t loc
*** 18092,18098 ****
        if (map_seen == 0)
  	error_at (loc,
  		  "%<#pragma omp target data%> must contain at least "
! 		  "one %<map%> or %<use_device_ptr%> clause");
        return NULL_TREE;
      }
  
--- 19421,19428 ----
        if (map_seen == 0)
  	error_at (loc,
  		  "%<#pragma omp target data%> must contain at least "
! 		  "one %<map%>, %<use_device_ptr%> or %<use_device_addr%> "
! 		  "clause");
        return NULL_TREE;
      }
  
*************** check_clauses:
*** 18540,18546 ****
  }
  
  /* OpenMP 4.0:
!    # pragma omp declare simd declare-simd-clauses[optseq] new-line  */
  
  #define OMP_DECLARE_SIMD_CLAUSE_MASK				\
  	( (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_SIMDLEN)	\
--- 19870,19880 ----
  }
  
  /* OpenMP 4.0:
!    # pragma omp declare simd declare-simd-clauses[optseq] new-line
! 
!    OpenMP 5.0:
!    # pragma omp declare variant (identifier) match(context-selector) new-line
!    */
  
  #define OMP_DECLARE_SIMD_CLAUSE_MASK				\
  	( (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_SIMDLEN)	\
*************** check_clauses:
*** 18553,18558 ****
--- 19887,19898 ----
  static void
  c_parser_omp_declare_simd (c_parser *parser, enum pragma_context context)
  {
+   c_token *token = c_parser_peek_token (parser);
+   gcc_assert (token->type == CPP_NAME);
+   tree kind = token->value;
+   gcc_assert (strcmp (IDENTIFIER_POINTER (kind), "simd") == 0
+ 	      || strcmp (IDENTIFIER_POINTER (kind), "variant") == 0);
+ 
    auto_vec<c_token> clauses;
    while (c_parser_next_token_is_not (parser, CPP_PRAGMA_EOL))
      {
*************** c_parser_omp_declare_simd (c_parser *par
*** 18570,18586 ****
  
    while (c_parser_next_token_is (parser, CPP_PRAGMA))
      {
!       if (c_parser_peek_token (parser)->pragma_kind
! 	  != PRAGMA_OMP_DECLARE
  	  || c_parser_peek_2nd_token (parser)->type != CPP_NAME
! 	  || strcmp (IDENTIFIER_POINTER
! 				(c_parser_peek_2nd_token (parser)->value),
! 		     "simd") != 0)
  	{
! 	  c_parser_error (parser,
! 			  "%<#pragma omp declare simd%> must be followed by "
! 			  "function declaration or definition or another "
! 			  "%<#pragma omp declare simd%>");
  	  return;
  	}
        c_parser_consume_pragma (parser);
--- 19910,19923 ----
  
    while (c_parser_next_token_is (parser, CPP_PRAGMA))
      {
!       if (c_parser_peek_token (parser)->pragma_kind != PRAGMA_OMP_DECLARE
  	  || c_parser_peek_2nd_token (parser)->type != CPP_NAME
! 	  || c_parser_peek_2nd_token (parser)->value != kind)
  	{
! 	  error ("%<#pragma omp declare %s%> must be followed by "
! 		 "function declaration or definition or another "
! 		 "%<#pragma omp declare %s%>",
! 		 IDENTIFIER_POINTER (kind), IDENTIFIER_POINTER (kind));
  	  return;
  	}
        c_parser_consume_pragma (parser);
*************** c_parser_omp_declare_simd (c_parser *par
*** 18628,18635 ****
      case pragma_struct:
      case pragma_param:
      case pragma_stmt:
!       c_parser_error (parser, "%<#pragma omp declare simd%> must be followed by "
! 			      "function declaration or definition");
        break;
      case pragma_compound:
        if (c_parser_next_token_is (parser, CPP_KEYWORD)
--- 19965,19973 ----
      case pragma_struct:
      case pragma_param:
      case pragma_stmt:
!       error ("%<#pragma omp declare %s%> must be followed by "
! 	     "function declaration or definition",
! 	     IDENTIFIER_POINTER (kind));
        break;
      case pragma_compound:
        if (c_parser_next_token_is (parser, CPP_KEYWORD)
*************** c_parser_omp_declare_simd (c_parser *par
*** 18655,18692 ****
  					 NULL, clauses);
  	  break;
  	}
!       c_parser_error (parser, "%<#pragma omp declare simd%> must be followed by "
! 			      "function declaration or definition");
        break;
      default:
        gcc_unreachable ();
      }
  }
  
! /* Finalize #pragma omp declare simd clauses after FNDECL has been parsed,
!    and put that into "omp declare simd" attribute.  */
  
  static void
  c_finish_omp_declare_simd (c_parser *parser, tree fndecl, tree parms,
  			   vec<c_token> clauses)
  {
!   /* Normally first token is CPP_NAME "simd".  CPP_EOF there indicates
!      error has been reported and CPP_PRAGMA that c_finish_omp_declare_simd
!      has already processed the tokens.  */
    if (clauses.exists () && clauses[0].type == CPP_EOF)
      return;
    if (fndecl == NULL_TREE || TREE_CODE (fndecl) != FUNCTION_DECL)
      {
!       error ("%<#pragma omp declare simd%> not immediately followed by "
! 	     "a function declaration or definition");
        clauses[0].type = CPP_EOF;
        return;
      }
    if (clauses.exists () && clauses[0].type != CPP_NAME)
      {
        error_at (DECL_SOURCE_LOCATION (fndecl),
! 		"%<#pragma omp declare simd%> not immediately followed by "
! 		"a single function declaration or definition");
        clauses[0].type = CPP_EOF;
        return;
      }
--- 19993,20500 ----
  					 NULL, clauses);
  	  break;
  	}
!       error ("%<#pragma omp declare %s%> must be followed by "
! 	     "function declaration or definition",
! 	     IDENTIFIER_POINTER (kind));
        break;
      default:
        gcc_unreachable ();
      }
  }
  
! static const char *const omp_construct_selectors[] = {
!   "simd", "target", "teams", "parallel", "for", NULL };
! static const char *const omp_device_selectors[] = {
!   "kind", "isa", "arch", NULL };
! static const char *const omp_implementation_selectors[] = {
!   "vendor", "extension", "atomic_default_mem_order", "unified_address",
!   "unified_shared_memory", "dynamic_allocators", "reverse_offload", NULL };
! static const char *const omp_user_selectors[] = {
!   "condition", NULL };
! 
! /* OpenMP 5.0:
! 
!    trait-selector:
!      trait-selector-name[([trait-score:]trait-property[,trait-property[,...]])]
! 
!    trait-score:
!      score(score-expression)  */
! 
! static tree
! c_parser_omp_context_selector (c_parser *parser, tree set, tree parms)
! {
!   tree ret = NULL_TREE;
!   do
!     {
!       tree selector;
!       if (c_parser_next_token_is (parser, CPP_KEYWORD)
! 	  || c_parser_next_token_is (parser, CPP_NAME))
! 	selector = c_parser_peek_token (parser)->value;
!       else
! 	{
! 	  c_parser_error (parser, "expected trait selector name");
! 	  return error_mark_node;
! 	}
! 
!       tree properties = NULL_TREE;
!       const char *const *selectors = NULL;
!       bool allow_score = true;
!       bool allow_user = false;
!       int property_limit = 0;
!       enum { CTX_PROPERTY_NONE, CTX_PROPERTY_USER, CTX_PROPERTY_NAME_LIST,
! 	     CTX_PROPERTY_ID, CTX_PROPERTY_EXPR,
! 	     CTX_PROPERTY_SIMD } property_kind = CTX_PROPERTY_NONE;
!       switch (IDENTIFIER_POINTER (set)[0])
! 	{
! 	case 'c': /* construct */
! 	  selectors = omp_construct_selectors;
! 	  allow_score = false;
! 	  property_limit = 1;
! 	  property_kind = CTX_PROPERTY_SIMD;
! 	  break;
! 	case 'd': /* device */
! 	  selectors = omp_device_selectors;
! 	  allow_score = false;
! 	  allow_user = true;
! 	  property_limit = 3;
! 	  property_kind = CTX_PROPERTY_NAME_LIST;
! 	  break;
! 	case 'i': /* implementation */
! 	  selectors = omp_implementation_selectors;
! 	  allow_user = true;
! 	  property_limit = 3;
! 	  property_kind = CTX_PROPERTY_NAME_LIST;
! 	  break;
! 	case 'u': /* user */
! 	  selectors = omp_user_selectors;
! 	  property_limit = 1;
! 	  property_kind = CTX_PROPERTY_EXPR;
! 	  break;
! 	default:
! 	  gcc_unreachable ();
! 	}
!       for (int i = 0; ; i++)
! 	{
! 	  if (selectors[i] == NULL)
! 	    {
! 	      if (allow_user)
! 		{
! 		  property_kind = CTX_PROPERTY_USER;
! 		  break;
! 		}
! 	      else
! 		{
! 		  error_at (c_parser_peek_token (parser)->location,
! 			    "selector %qs not allowed for context selector "
! 			    "set %qs", IDENTIFIER_POINTER (selector),
! 			    IDENTIFIER_POINTER (set));
! 		  c_parser_consume_token (parser);
! 		  return error_mark_node;
! 		}
! 	    }
! 	  if (i == property_limit)
! 	    property_kind = CTX_PROPERTY_NONE;
! 	  if (strcmp (selectors[i], IDENTIFIER_POINTER (selector)) == 0)
! 	    break;
! 	}
!       if (property_kind == CTX_PROPERTY_NAME_LIST
! 	  && IDENTIFIER_POINTER (set)[0] == 'i'
! 	  && strcmp (IDENTIFIER_POINTER (selector),
! 		     "atomic_default_mem_order") == 0)
! 	property_kind = CTX_PROPERTY_ID;
! 
!       c_parser_consume_token (parser);
! 
!       if (c_parser_next_token_is (parser, CPP_OPEN_PAREN))
! 	{
! 	  if (property_kind == CTX_PROPERTY_NONE)
! 	    {
! 	      error_at (c_parser_peek_token (parser)->location,
! 			"selector %qs does not accept any properties",
! 			IDENTIFIER_POINTER (selector));
! 	      return error_mark_node;
! 	    }
! 
! 	  matching_parens parens;
! 	  parens.require_open (parser);
! 
! 	  c_token *token = c_parser_peek_token (parser);
! 	  if (allow_score
! 	      && c_parser_next_token_is (parser, CPP_NAME)
! 	      && strcmp (IDENTIFIER_POINTER (token->value), "score") == 0
! 	      && c_parser_peek_2nd_token (parser)->type == CPP_OPEN_PAREN)
! 	    {
! 	      c_parser_consume_token (parser);
! 
! 	      matching_parens parens2;
! 	      parens2.require_open (parser);
! 	      tree score = c_parser_expr_no_commas (parser, NULL).value;
! 	      parens2.skip_until_found_close (parser);
! 	      c_parser_require (parser, CPP_COLON, "expected %<:%>");
! 	      if (score != error_mark_node)
! 		{
! 		  mark_exp_read (score);
! 		  score = c_fully_fold (score, false, NULL);
! 		  if (!INTEGRAL_TYPE_P (TREE_TYPE (score))
! 		      || TREE_CODE (score) != INTEGER_CST)
! 		    error_at (token->location, "score argument must be "
! 			      "constant integer expression");
! 		  else if (tree_int_cst_sgn (score) < 0)
! 		    error_at (token->location, "score argument must be "
! 			      "non-negative");
! 		  else
! 		    properties = tree_cons (get_identifier (" score"),
! 					    score, properties);
! 		}
! 	      token = c_parser_peek_token (parser);
! 	    }
! 
! 	  switch (property_kind)
! 	    {
! 	      tree t;
! 	    case CTX_PROPERTY_USER:
! 	      do
! 		{
! 		  t = c_parser_expr_no_commas (parser, NULL).value;
! 		  if (TREE_CODE (t) == STRING_CST)
! 		    properties = tree_cons (NULL_TREE, t, properties);
! 		  else if (t != error_mark_node)
! 		    {
! 		      mark_exp_read (t);
! 		      t = c_fully_fold (t, false, NULL);
! 		      if (!INTEGRAL_TYPE_P (TREE_TYPE (t))
! 			  || !tree_fits_shwi_p (t))
! 			error_at (token->location, "property must be "
! 				  "constant integer expression or string "
! 				  "literal");
! 		      else
! 			properties = tree_cons (NULL_TREE, t, properties);
! 		    }
! 		  else
! 		    return error_mark_node;
! 
! 		  if (c_parser_next_token_is (parser, CPP_COMMA))
! 		    c_parser_consume_token (parser);
! 		  else
! 		    break;
! 		}
! 	      while (1);
! 	      break;
! 	    case CTX_PROPERTY_ID:
! 	      if (c_parser_next_token_is (parser, CPP_KEYWORD)
! 		  || c_parser_next_token_is (parser, CPP_NAME))
! 		{
! 		  tree prop = c_parser_peek_token (parser)->value;
! 		  c_parser_consume_token (parser);
! 		  properties = tree_cons (prop, NULL_TREE, properties);
! 		}
! 	      else
! 		{
! 		  c_parser_error (parser, "expected identifier");
! 		  return error_mark_node;
! 		}
! 	      break;
! 	    case CTX_PROPERTY_NAME_LIST:
! 	      do
! 		{
! 		  tree prop = NULL_TREE, value = NULL_TREE;
! 		  if (c_parser_next_token_is (parser, CPP_KEYWORD)
! 		      || c_parser_next_token_is (parser, CPP_NAME))
! 		    {
! 		      prop = c_parser_peek_token (parser)->value;
! 		      c_parser_consume_token (parser);
! 		    }
! 		  else if (c_parser_next_token_is (parser, CPP_STRING))
! 		    value = c_parser_string_literal (parser, false,
! 						     false).value;
! 		  else
! 		    {
! 		      c_parser_error (parser, "expected identifier or "
! 					      "string literal");
! 		      return error_mark_node;
! 		    }
! 
! 		  properties = tree_cons (prop, value, properties);
! 
! 		  if (c_parser_next_token_is (parser, CPP_COMMA))
! 		    c_parser_consume_token (parser);
! 		  else
! 		    break;
! 		}
! 	      while (1);
! 	      break;
! 	    case CTX_PROPERTY_EXPR:
! 	      t = c_parser_expr_no_commas (parser, NULL).value;
! 	      if (t != error_mark_node)
! 		{
! 		  mark_exp_read (t);
! 		  t = c_fully_fold (t, false, NULL);
! 		  if (!INTEGRAL_TYPE_P (TREE_TYPE (t))
! 		      || !tree_fits_shwi_p (t))
! 		    error_at (token->location, "property must be "
! 			      "constant integer expression");
! 		  else
! 		    properties = tree_cons (NULL_TREE, t, properties);
! 		}
! 	      else
! 		return error_mark_node;
! 	      break;
! 	    case CTX_PROPERTY_SIMD:
! 	      if (parms == NULL_TREE)
! 		{
! 		  error_at (token->location, "properties for %<simd%> "
! 			    "selector may not be specified in "
! 			    "%<metadirective%>");
! 		  return error_mark_node;
! 		}
! 	      tree c;
! 	      c = c_parser_omp_all_clauses (parser,
! 					    OMP_DECLARE_SIMD_CLAUSE_MASK,
! 					    "simd", true, 2);
! 	      c = c_omp_declare_simd_clauses_to_numbers (parms
! 							 == error_mark_node
! 							 ? NULL_TREE : parms,
! 							 c);
! 	      properties = c;
! 	      break;
! 	    default:
! 	      gcc_unreachable ();
! 	    }
! 
! 	  parens.skip_until_found_close (parser);
! 	  properties = nreverse (properties);
! 	}
!       else if (property_kind == CTX_PROPERTY_NAME_LIST
! 	       || property_kind == CTX_PROPERTY_ID
! 	       || property_kind == CTX_PROPERTY_EXPR)
! 	{
! 	  c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>");
! 	  return error_mark_node;
! 	}
! 
!       ret = tree_cons (selector, properties, ret);
! 
!       if (c_parser_next_token_is (parser, CPP_COMMA))
! 	c_parser_consume_token (parser);
!       else
! 	break;
!     }
!   while (1);
! 
!   return nreverse (ret);
! }
! 
! /* OpenMP 5.0:
! 
!    trait-set-selector[,trait-set-selector[,...]]
! 
!    trait-set-selector:
!      trait-set-selector-name = { trait-selector[, trait-selector[, ...]] }
! 
!    trait-set-selector-name:
!      constructor
!      device
!      implementation
!      user  */
! 
! static tree
! c_parser_omp_context_selector_specification (c_parser *parser, tree parms)
! {
!   tree ret = NULL_TREE;
!   do
!     {
!       const char *setp = "";
!       if (c_parser_next_token_is (parser, CPP_NAME))
! 	setp = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value);
!       switch (setp[0])
! 	{
! 	case 'c':
! 	  if (strcmp (setp, "construct") == 0)
! 	    setp = NULL;
! 	  break;
! 	case 'd':
! 	  if (strcmp (setp, "device") == 0)
! 	    setp = NULL;
! 	  break;
! 	case 'i':
! 	  if (strcmp (setp, "implementation") == 0)
! 	    setp = NULL;
! 	  break;
! 	case 'u':
! 	  if (strcmp (setp, "user") == 0)
! 	    setp = NULL;
! 	  break;
! 	default:
! 	  break;
! 	}
!       if (setp)
! 	{
! 	  c_parser_error (parser, "expected %<construct%>, %<device%>, "
! 				  "%<implementation%> or %<user%>");
! 	  return error_mark_node;
! 	}
! 
!       tree set = c_parser_peek_token (parser)->value;
!       c_parser_consume_token (parser);
! 
!       if (!c_parser_require (parser, CPP_EQ, "expected %<=%>"))
! 	return error_mark_node;
! 
!       matching_braces braces;
!       if (!braces.require_open (parser))
! 	return error_mark_node;
! 
!       tree selectors = c_parser_omp_context_selector (parser, set, parms);
!       if (selectors == error_mark_node)
! 	ret = error_mark_node;
!       else if (ret != error_mark_node)
! 	ret = tree_cons (set, selectors, ret);
! 
!       braces.skip_until_found_close (parser);
! 
!       if (c_parser_next_token_is (parser, CPP_COMMA))
! 	c_parser_consume_token (parser);
!       else
! 	break;
!     }
!   while (1);
! 
!   if (ret == error_mark_node)
!     return ret;
!   return nreverse (ret);
! }
! 
! /* Finalize #pragma omp declare variant after FNDECL has been parsed, and put
!    that into "omp declare variant base" attribute.  */
! 
! static void
! c_finish_omp_declare_variant (c_parser *parser, tree fndecl, tree parms)
! {
!   matching_parens parens;
!   if (!parens.require_open (parser))
!     {
!      fail:
!       c_parser_skip_to_pragma_eol (parser, false);
!       return;
!     }
! 
!   if (c_parser_next_token_is_not (parser, CPP_NAME)
!       || c_parser_peek_token (parser)->id_kind != C_ID_ID)
!     {
!       c_parser_error (parser, "expected identifier");
!       goto fail;
!     }
! 
!   c_token *token = c_parser_peek_token (parser);
!   tree variant = lookup_name (token->value);
! 
!   if (variant == NULL_TREE)
!     {
!       undeclared_variable (token->location, token->value);
!       variant = error_mark_node;
!     }
! 
!   c_parser_consume_token (parser);
! 
!   parens.require_close (parser);
! 
!   const char *clause = "";
!   location_t match_loc = c_parser_peek_token (parser)->location;
!   if (c_parser_next_token_is (parser, CPP_NAME))
!     clause = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value);
!   if (strcmp (clause, "match"))
!     {
!       c_parser_error (parser, "expected %<match%>");
!       goto fail;
!     }
! 
!   c_parser_consume_token (parser);
! 
!   if (!parens.require_open (parser))
!     goto fail;
! 
!   if (parms == NULL_TREE)
!     parms = error_mark_node;
! 
!   tree ctx = c_parser_omp_context_selector_specification (parser, parms);
!   if (ctx == error_mark_node)
!     goto fail;
!   ctx = c_omp_check_context_selector (match_loc, ctx);
!   if (ctx != error_mark_node && variant != error_mark_node)
!     {
!       if (TREE_CODE (variant) != FUNCTION_DECL)
! 	{
! 	  error_at (token->location, "variant %qD is not a function", variant);
! 	  variant = error_mark_node;
! 	}
!       else if (omp_get_context_selector (ctx, "construct", "simd") == NULL_TREE
! 	       && !comptypes (TREE_TYPE (fndecl), TREE_TYPE (variant)))
! 	{
! 	  error_at (token->location, "variant %qD and base %qD have "
! 				     "incompatible types", variant, fndecl);
! 	  variant = error_mark_node;
! 	}
!       else if (fndecl_built_in_p (variant)
! 	       && (strncmp (IDENTIFIER_POINTER (DECL_NAME (variant)),
! 			    "__builtin_", strlen ("__builtin_")) == 0
! 		   || strncmp (IDENTIFIER_POINTER (DECL_NAME (variant)),
! 			       "__sync_", strlen ("__sync_")) == 0
! 		   || strncmp (IDENTIFIER_POINTER (DECL_NAME (variant)),
! 			       "__atomic_", strlen ("__atomic_")) == 0))
! 	{
! 	  error_at (token->location, "variant %qD is a built-in", variant);
! 	  variant = error_mark_node;
! 	}
!       if (variant != error_mark_node)
! 	{
! 	  C_DECL_USED (variant) = 1;
! 	  tree construct = omp_get_context_selector (ctx, "construct", NULL);
! 	  c_omp_mark_declare_variant (match_loc, variant, construct);
! 	  if (omp_context_selector_matches (ctx))
! 	    {
! 	      tree attr
! 		= tree_cons (get_identifier ("omp declare variant base"),
! 			     build_tree_list (variant, ctx),
! 			     DECL_ATTRIBUTES (fndecl));
! 	      DECL_ATTRIBUTES (fndecl) = attr;
! 	    }
! 	}
!     }
! 
!   parens.require_close (parser);
!   c_parser_skip_to_pragma_eol (parser);
! }
! 
! /* Finalize #pragma omp declare simd or #pragma omp declare variant
!    clauses after FNDECL has been parsed, and put that into "omp declare simd"
!    or "omp declare variant base" attribute.  */
  
  static void
  c_finish_omp_declare_simd (c_parser *parser, tree fndecl, tree parms,
  			   vec<c_token> clauses)
  {
!   /* Normally first token is CPP_NAME "simd" or "variant".  CPP_EOF there
!      indicates error has been reported and CPP_PRAGMA that
!      c_finish_omp_declare_simd has already processed the tokens.  */
    if (clauses.exists () && clauses[0].type == CPP_EOF)
      return;
+   const char *kind = "simd";
+   if (clauses.exists ()
+       && (clauses[0].type == CPP_NAME || clauses[0].type == CPP_PRAGMA))
+     kind = IDENTIFIER_POINTER (clauses[0].value);
+   gcc_assert (strcmp (kind, "simd") == 0 || strcmp (kind, "variant") == 0);
    if (fndecl == NULL_TREE || TREE_CODE (fndecl) != FUNCTION_DECL)
      {
!       error ("%<#pragma omp declare %s%> not immediately followed by "
! 	     "a function declaration or definition", kind);
        clauses[0].type = CPP_EOF;
        return;
      }
    if (clauses.exists () && clauses[0].type != CPP_NAME)
      {
        error_at (DECL_SOURCE_LOCATION (fndecl),
! 		"%<#pragma omp declare %s%> not immediately followed by "
! 		"a single function declaration or definition", kind);
        clauses[0].type = CPP_EOF;
        return;
      }
*************** c_finish_omp_declare_simd (c_parser *par
*** 18696,18702 ****
  
    unsigned int tokens_avail = parser->tokens_avail;
    gcc_assert (parser->tokens == &parser->tokens_buf[0]);
-   
  
    parser->tokens = clauses.address ();
    parser->tokens_avail = clauses.length ();
--- 20504,20509 ----
*************** c_finish_omp_declare_simd (c_parser *par
*** 18706,18724 ****
      {
        c_token *token = c_parser_peek_token (parser);
        gcc_assert (token->type == CPP_NAME
! 		  && strcmp (IDENTIFIER_POINTER (token->value), "simd") == 0);
        c_parser_consume_token (parser);
        parser->in_pragma = true;
  
!       tree c = NULL_TREE;
!       c = c_parser_omp_all_clauses (parser, OMP_DECLARE_SIMD_CLAUSE_MASK,
! 				      "#pragma omp declare simd");
!       c = c_omp_declare_simd_clauses_to_numbers (parms, c);
!       if (c != NULL_TREE)
! 	c = tree_cons (NULL_TREE, c, NULL_TREE);
!       c = build_tree_list (get_identifier ("omp declare simd"), c);
!       TREE_CHAIN (c) = DECL_ATTRIBUTES (fndecl);
!       DECL_ATTRIBUTES (fndecl) = c;
      }
  
    parser->tokens = &parser->tokens_buf[0];
--- 20513,20539 ----
      {
        c_token *token = c_parser_peek_token (parser);
        gcc_assert (token->type == CPP_NAME
! 		  && strcmp (IDENTIFIER_POINTER (token->value), kind) == 0);
        c_parser_consume_token (parser);
        parser->in_pragma = true;
  
!       if (strcmp (kind, "simd") == 0)
! 	{
! 	  tree c;
! 	  c = c_parser_omp_all_clauses (parser, OMP_DECLARE_SIMD_CLAUSE_MASK,
! 					"#pragma omp declare simd");
! 	  c = c_omp_declare_simd_clauses_to_numbers (parms, c);
! 	  if (c != NULL_TREE)
! 	    c = tree_cons (NULL_TREE, c, NULL_TREE);
! 	  c = build_tree_list (get_identifier ("omp declare simd"), c);
! 	  TREE_CHAIN (c) = DECL_ATTRIBUTES (fndecl);
! 	  DECL_ATTRIBUTES (fndecl) = c;
! 	}
!       else
! 	{
! 	  gcc_assert (strcmp (kind, "variant") == 0);
! 	  c_finish_omp_declare_variant (parser, fndecl, parms);
! 	}
      }
  
    parser->tokens = &parser->tokens_buf[0];
*************** c_finish_omp_declare_simd (c_parser *par
*** 18740,18752 ****
  
  #define OMP_DECLARE_TARGET_CLAUSE_MASK				\
  	( (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_TO)		\
! 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_LINK))
  
  static void
  c_parser_omp_declare_target (c_parser *parser)
  {
-   location_t loc = c_parser_peek_token (parser)->location;
    tree clauses = NULL_TREE;
    if (c_parser_next_token_is (parser, CPP_NAME))
      clauses = c_parser_omp_all_clauses (parser, OMP_DECLARE_TARGET_CLAUSE_MASK,
  					"#pragma omp declare target");
--- 20555,20569 ----
  
  #define OMP_DECLARE_TARGET_CLAUSE_MASK				\
  	( (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_TO)		\
! 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_LINK)		\
! 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_DEVICE_TYPE))
  
  static void
  c_parser_omp_declare_target (c_parser *parser)
  {
    tree clauses = NULL_TREE;
+   int device_type = 0;
+   bool only_device_type = true;
    if (c_parser_next_token_is (parser, CPP_NAME))
      clauses = c_parser_omp_all_clauses (parser, OMP_DECLARE_TARGET_CLAUSE_MASK,
  					"#pragma omp declare target");
*************** c_parser_omp_declare_target (c_parser *p
*** 18763,18778 ****
        current_omp_declare_target_attribute++;
        return;
      }
!   if (current_omp_declare_target_attribute)
!     error_at (loc, "%<#pragma omp declare target%> with clauses in between "
! 		   "%<#pragma omp declare target%> without clauses and "
! 		   "%<#pragma omp end declare target%>");
    for (tree c = clauses; c; c = OMP_CLAUSE_CHAIN (c))
      {
        tree t = OMP_CLAUSE_DECL (c), id;
        tree at1 = lookup_attribute ("omp declare target", DECL_ATTRIBUTES (t));
        tree at2 = lookup_attribute ("omp declare target link",
  				   DECL_ATTRIBUTES (t));
        if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_LINK)
  	{
  	  id = get_identifier ("omp declare target link");
--- 20580,20597 ----
        current_omp_declare_target_attribute++;
        return;
      }
!   for (tree c = clauses; c; c = OMP_CLAUSE_CHAIN (c))
!     if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_DEVICE_TYPE)
!       device_type |= OMP_CLAUSE_DEVICE_TYPE_KIND (c);
    for (tree c = clauses; c; c = OMP_CLAUSE_CHAIN (c))
      {
+       if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_DEVICE_TYPE)
+ 	continue;
        tree t = OMP_CLAUSE_DECL (c), id;
        tree at1 = lookup_attribute ("omp declare target", DECL_ATTRIBUTES (t));
        tree at2 = lookup_attribute ("omp declare target link",
  				   DECL_ATTRIBUTES (t));
+       only_device_type = false;
        if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_LINK)
  	{
  	  id = get_identifier ("omp declare target link");
*************** c_parser_omp_declare_target (c_parser *p
*** 18805,18811 ****
--- 20624,20657 ----
  		}
  	    }
  	}
+       if (TREE_CODE (t) != FUNCTION_DECL)
+ 	continue;
+       if ((device_type & OMP_CLAUSE_DEVICE_TYPE_HOST) != 0)
+ 	{
+ 	  tree at3 = lookup_attribute ("omp declare target host",
+ 				       DECL_ATTRIBUTES (t));
+ 	  if (at3 == NULL_TREE)
+ 	    {
+ 	      id = get_identifier ("omp declare target host");
+ 	      DECL_ATTRIBUTES (t)
+ 		= tree_cons (id, NULL_TREE, DECL_ATTRIBUTES (t));
+ 	    }
+ 	}
+       if ((device_type & OMP_CLAUSE_DEVICE_TYPE_NOHOST) != 0)
+ 	{
+ 	  tree at3 = lookup_attribute ("omp declare target nohost",
+ 				       DECL_ATTRIBUTES (t));
+ 	  if (at3 == NULL_TREE)
+ 	    {
+ 	      id = get_identifier ("omp declare target nohost");
+ 	      DECL_ATTRIBUTES (t)
+ 		= tree_cons (id, NULL_TREE, DECL_ATTRIBUTES (t));
+ 	    }
+ 	}
      }
+   if (device_type && only_device_type)
+     warning_at (OMP_CLAUSE_LOCATION (clauses), 0,
+ 		"directive with only %<device_type%> clauses ignored");
  }
  
  static void
*************** c_parser_omp_declare_reduction (c_parser
*** 19202,19208 ****
     #pragma omp declare simd declare-simd-clauses[optseq] new-line
     #pragma omp declare reduction (reduction-id : typename-list : expression) \
        initializer-clause[opt] new-line
!    #pragma omp declare target new-line  */
  
  static void
  c_parser_omp_declare (c_parser *parser, enum pragma_context context)
--- 21048,21057 ----
     #pragma omp declare simd declare-simd-clauses[optseq] new-line
     #pragma omp declare reduction (reduction-id : typename-list : expression) \
        initializer-clause[opt] new-line
!    #pragma omp declare target new-line
! 
!    OpenMP 5.0
!    #pragma omp declare variant (identifier) match (context-selector)  */
  
  static void
  c_parser_omp_declare (c_parser *parser, enum pragma_context context)
*************** c_parser_omp_declare (c_parser *parser,
*** 19235,19244 ****
  	  c_parser_omp_declare_target (parser);
  	  return;
  	}
      }
  
!   c_parser_error (parser, "expected %<simd%> or %<reduction%> "
! 			  "or %<target%>");
    c_parser_skip_to_pragma_eol (parser);
  }
  
--- 21084,21100 ----
  	  c_parser_omp_declare_target (parser);
  	  return;
  	}
+       if (strcmp (p, "variant") == 0)
+ 	{
+ 	  /* c_parser_consume_token (parser); done in
+ 	     c_parser_omp_declare_simd.  */
+ 	  c_parser_omp_declare_simd (parser, context);
+ 	  return;
+ 	}
      }
  
!   c_parser_error (parser, "expected %<simd%>, %<reduction%>, "
! 			  "%<target%> or %<variant%>");
    c_parser_skip_to_pragma_eol (parser);
  }
  
*************** c_parser_omp_construct (c_parser *parser
*** 19537,19545 ****
        break;
      case PRAGMA_OACC_KERNELS:
      case PRAGMA_OACC_PARALLEL:
        strcpy (p_name, "#pragma acc");
!       stmt = c_parser_oacc_kernels_parallel (loc, parser, p_kind, p_name,
! 					     if_p);
        break;
      case PRAGMA_OACC_LOOP:
        strcpy (p_name, "#pragma acc");
--- 21393,21401 ----
        break;
      case PRAGMA_OACC_KERNELS:
      case PRAGMA_OACC_PARALLEL:
+     case PRAGMA_OACC_SERIAL:
        strcpy (p_name, "#pragma acc");
!       stmt = c_parser_oacc_compute (loc, parser, p_kind, p_name, if_p);
        break;
      case PRAGMA_OACC_LOOP:
        strcpy (p_name, "#pragma acc");
*************** c_parser_omp_construct (c_parser *parser
*** 19563,19568 ****
--- 21419,21428 ----
        strcpy (p_name, "#pragma omp");
        stmt = c_parser_omp_for (loc, parser, p_name, mask, NULL, if_p);
        break;
+     case PRAGMA_OMP_LOOP:
+       strcpy (p_name, "#pragma omp");
+       stmt = c_parser_omp_loop (loc, parser, p_name, mask, NULL, if_p);
+       break;
      case PRAGMA_OMP_MASTER:
        strcpy (p_name, "#pragma omp");
        stmt = c_parser_omp_master (loc, parser, p_name, mask, NULL, if_p);
*************** c_parser_omp_threadprivate (c_parser *pa
*** 19662,19701 ****
  /* Parse a transaction attribute (GCC Extension).
  
     transaction-attribute:
!      attributes
!      [ [ any-word ] ]
! 
!    The transactional memory language description is written for C++,
!    and uses the C++0x attribute syntax.  For compatibility, allow the
!    bracket style for transactions in C as well.  */
  
  static tree
  c_parser_transaction_attributes (c_parser *parser)
  {
-   tree attr_name, attr = NULL;
- 
    if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
!     return c_parser_attributes (parser);
  
    if (!c_parser_next_token_is (parser, CPP_OPEN_SQUARE))
      return NULL_TREE;
!   c_parser_consume_token (parser);
!   if (!c_parser_require (parser, CPP_OPEN_SQUARE, "expected %<[%>"))
!     goto error1;
! 
!   attr_name = c_parser_attribute_any_word (parser);
!   if (attr_name)
!     {
!       c_parser_consume_token (parser);
!       attr = build_tree_list (attr_name, NULL_TREE);
!     }
!   else
!     c_parser_error (parser, "expected identifier");
! 
!   c_parser_skip_until_found (parser, CPP_CLOSE_SQUARE, "expected %<]%>");
!  error1:
!   c_parser_skip_until_found (parser, CPP_CLOSE_SQUARE, "expected %<]%>");
!   return attr;
  }
  
  /* Parse a __transaction_atomic or __transaction_relaxed statement
--- 21522,21540 ----
  /* Parse a transaction attribute (GCC Extension).
  
     transaction-attribute:
!      gnu-attributes
!      attribute-specifier
! */
  
  static tree
  c_parser_transaction_attributes (c_parser *parser)
  {
    if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE))
!     return c_parser_gnu_attributes (parser);
  
    if (!c_parser_next_token_is (parser, CPP_OPEN_SQUARE))
      return NULL_TREE;
!   return c_parser_std_attribute_specifier (parser, true);
  }
  
  /* Parse a __transaction_atomic or __transaction_relaxed statement
*************** c_parser_transaction_cancel (c_parser *p
*** 19856,19863 ****
  	  && !is_tm_may_cancel_outer (current_function_decl))
  	{
  	  error_at (loc, "outer %<__transaction_cancel%> not "
! 		    "within outer %<__transaction_atomic%>");
! 	  error_at (loc, "  or a %<transaction_may_cancel_outer%> function");
  	  goto ret_error;
  	}
      }
--- 21695,21702 ----
  	  && !is_tm_may_cancel_outer (current_function_decl))
  	{
  	  error_at (loc, "outer %<__transaction_cancel%> not "
! 		    "within outer %<__transaction_atomic%> or "
! 		    "a %<transaction_may_cancel_outer%> function");
  	  goto ret_error;
  	}
      }
*************** c_parse_file (void)
*** 19885,19890 ****
--- 21724,21730 ----
    c_parser tparser;
  
    memset (&tparser, 0, sizeof tparser);
+   tparser.translate_strings_p = true;
    tparser.tokens = &tparser.tokens_buf[0];
    the_parser = &tparser;
  
*************** c_parse_file (void)
*** 19920,19932 ****
  
     Take ownership of START_WITH_PASS, if non-NULL.  */
  
! void
  c_parser_parse_rtl_body (c_parser *parser, char *start_with_pass)
  {
    if (!c_parser_require (parser, CPP_OPEN_BRACE, "expected %<{%>"))
      {
        free (start_with_pass);
!       return;
      }
  
    location_t start_loc = c_parser_peek_token (parser)->location;
--- 21760,21772 ----
  
     Take ownership of START_WITH_PASS, if non-NULL.  */
  
! location_t
  c_parser_parse_rtl_body (c_parser *parser, char *start_with_pass)
  {
    if (!c_parser_require (parser, CPP_OPEN_BRACE, "expected %<{%>"))
      {
        free (start_with_pass);
!       return c_parser_peek_token (parser)->location;
      }
  
    location_t start_loc = c_parser_peek_token (parser)->location;
*************** c_parser_parse_rtl_body (c_parser *parse
*** 19948,19954 ****
  	case CPP_EOF:
  	  error_at (start_loc, "no closing brace");
  	  free (start_with_pass);
! 	  return;
  	default:
  	  break;
  	}
--- 21788,21794 ----
  	case CPP_EOF:
  	  error_at (start_loc, "no closing brace");
  	  free (start_with_pass);
! 	  return c_parser_peek_token (parser)->location;
  	default:
  	  break;
  	}
*************** c_parser_parse_rtl_body (c_parser *parse
*** 19966,19979 ****
    if (!read_rtl_function_body_from_file_range (start_loc, end_loc))
      {
        free (start_with_pass);
!       return;
      }
  
!  /*  If a pass name was provided for START_WITH_PASS, run the backend
!      accordingly now, on the cfun created above, transferring
!      ownership of START_WITH_PASS.  */
!   if (start_with_pass)
!     run_rtl_passes (start_with_pass);
  }
  
  #include "gt-c-c-parser.h"
--- 21806,21818 ----
    if (!read_rtl_function_body_from_file_range (start_loc, end_loc))
      {
        free (start_with_pass);
!       return end_loc;
      }
  
!  /*  Run the backend on the cfun created above, transferring ownership of
!      START_WITH_PASS.  */
!   run_rtl_passes (start_with_pass);
!   return end_loc;
  }
  
  #include "gt-c-c-parser.h"
diff -Nrcpad gcc-9.3.0/gcc/c/c-parser.h gcc-10.1.0/gcc/c/c-parser.h
*** gcc-9.3.0/gcc/c/c-parser.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/c-parser.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Declarations for the parser for C and Objective-C.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
     Parser actions based on the old Bison parser; structure somewhat
     influenced by and fragments based on the C++ parser.
--- 1,5 ----
  /* Declarations for the parser for C and Objective-C.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
     Parser actions based on the old Bison parser; structure somewhat
     influenced by and fragments based on the C++ parser.
*************** c_parser_next_token_is_keyword (c_parser
*** 185,195 ****
    return c_parser_peek_token (parser)->keyword == keyword;
  }
  
  extern struct c_declarator *
  c_parser_declarator (c_parser *parser, bool type_seen_p, c_dtr_syn kind,
  		     bool *seen_id);
  extern void c_parser_declspecs (c_parser *, struct c_declspecs *, bool, bool,
! 				bool, bool, bool, enum c_lookahead_kind);
  extern struct c_type_name *c_parser_type_name (c_parser *, bool = false);
  
  #endif
--- 185,197 ----
    return c_parser_peek_token (parser)->keyword == keyword;
  }
  
+ struct c_expr c_parser_string_literal (c_parser *, bool, bool);
  extern struct c_declarator *
  c_parser_declarator (c_parser *parser, bool type_seen_p, c_dtr_syn kind,
  		     bool *seen_id);
  extern void c_parser_declspecs (c_parser *, struct c_declspecs *, bool, bool,
! 				bool, bool, bool, bool, bool,
! 				enum c_lookahead_kind);
  extern struct c_type_name *c_parser_type_name (c_parser *, bool = false);
  
  #endif
diff -Nrcpad gcc-9.3.0/gcc/c/c-tree.h gcc-10.1.0/gcc/c/c-tree.h
*** gcc-9.3.0/gcc/c/c-tree.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/c-tree.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for C parsing and type checking.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for C parsing and type checking.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 38,46 ****
     nonzero if the definition of the type has already started.  */
  #define C_TYPE_BEING_DEFINED(TYPE) TYPE_LANG_FLAG_0 (TYPE)
  
! /* In an incomplete RECORD_TYPE or UNION_TYPE, a list of variable
!    declarations whose type would be completed by completing that type.  */
! #define C_TYPE_INCOMPLETE_VARS(TYPE) TYPE_VFIELD (TYPE)
  
  /* In an IDENTIFIER_NODE, nonzero if this identifier is actually a
     keyword.  C_RID_CODE (node) is then the RID_* value of the keyword.  */
--- 38,49 ----
     nonzero if the definition of the type has already started.  */
  #define C_TYPE_BEING_DEFINED(TYPE) TYPE_LANG_FLAG_0 (TYPE)
  
! /* In an incomplete RECORD_TYPE, UNION_TYPE or ENUMERAL_TYPE, a list of
!    variable declarations whose type would be completed by completing
!    that type.  */
! #define C_TYPE_INCOMPLETE_VARS(TYPE) \
!   TYPE_LANG_SLOT_1 (TREE_CHECK4 (TYPE, RECORD_TYPE, UNION_TYPE, \
! 				 QUAL_UNION_TYPE, ENUMERAL_TYPE))
  
  /* In an IDENTIFIER_NODE, nonzero if this identifier is actually a
     keyword.  C_RID_CODE (node) is then the RID_* value of the keyword.  */
*************** along with GCC; see the file COPYING3.
*** 55,63 ****
     This is used for -Wc++-compat. */
  #define C_TYPE_DEFINED_IN_STRUCT(TYPE) TYPE_LANG_FLAG_2 (TYPE)
  
- /* Record whether an "incomplete type" error was given for the type.  */
- #define C_TYPE_ERROR_REPORTED(TYPE) TYPE_LANG_FLAG_3 (TYPE)
- 
  /* Record whether a typedef for type `int' was actually `signed int'.  */
  #define C_TYPEDEF_EXPLICITLY_SIGNED(EXP) DECL_LANG_FLAG_1 (EXP)
  
--- 58,63 ----
*************** along with GCC; see the file COPYING3.
*** 111,117 ****
  /* For FUNCTION_TYPE, a hidden list of types of arguments.  The same as
     TYPE_ARG_TYPES for functions with prototypes, but created for functions
     without prototypes.  */
! #define TYPE_ACTUAL_ARG_TYPES(NODE) TYPE_LANG_SLOT_1 (NODE)
  
  /* For a CONSTRUCTOR, whether some initializer contains a
     subexpression meaning it is not a constant expression.  */
--- 111,118 ----
  /* For FUNCTION_TYPE, a hidden list of types of arguments.  The same as
     TYPE_ARG_TYPES for functions with prototypes, but created for functions
     without prototypes.  */
! #define TYPE_ACTUAL_ARG_TYPES(NODE) \
!   TYPE_LANG_SLOT_1 (FUNCTION_TYPE_CHECK (NODE))
  
  /* For a CONSTRUCTOR, whether some initializer contains a
     subexpression meaning it is not a constant expression.  */
*************** enum c_typespec_kind {
*** 186,194 ****
--- 187,199 ----
       kind of tag, in which case this is only valid if shadowing that
       tag in an inner scope.  */
    ctsk_tagref,
+   /* Likewise, with standard attributes present in the reference.  */
+   ctsk_tagref_attrs,
    /* A reference to a tag, not previously declared in a visible
       scope.  */
    ctsk_tagfirstref,
+   /* Likewise, with standard attributes present in the reference.  */
+   ctsk_tagfirstref_attrs,
    /* A definition of a tag such as "struct foo { int a; }".  */
    ctsk_tagdef,
    /* A typedef name.  */
*************** struct c_declspecs {
*** 311,322 ****
    tree expr;
    /* The attributes from a typedef decl.  */
    tree decl_attr;
!   /* When parsing, the attributes.  Outside the parser, this will be
!      NULL; attributes (possibly from multiple lists) will be passed
!      separately.  */
    tree attrs;
    /* The pass to start compiling a __GIMPLE or __RTL function with.  */
    char *gimple_or_rtl_pass;
    /* The base-2 log of the greatest alignment required by an _Alignas
       specifier, in bytes, or -1 if no such specifiers with nonzero
       alignment.  */
--- 316,334 ----
    tree expr;
    /* The attributes from a typedef decl.  */
    tree decl_attr;
!   /* When parsing, the GNU attributes and prefix standard attributes.
!      Outside the parser, this will be NULL; attributes (possibly from
!      multiple lists) will be passed separately.  */
    tree attrs;
+   /* When parsing, postfix standard attributes (which appertain to the
+      type specified by the preceding declaration specifiers, unlike
+      prefix standard attributes which appertain to the declaration or
+      declarations as a whole).  */
+   tree postfix_attrs;
    /* The pass to start compiling a __GIMPLE or __RTL function with.  */
    char *gimple_or_rtl_pass;
+   /* ENTRY BB count.  */
+   profile_count entry_bb_count;
    /* The base-2 log of the greatest alignment required by an _Alignas
       specifier, in bytes, or -1 if no such specifiers with nonzero
       alignment.  */
*************** struct c_declspecs {
*** 333,345 ****
    ENUM_BITFIELD (c_typespec_keyword) typespec_word : 8;
    /* The kind of type specifier if one has been seen, ctsk_none
       otherwise.  */
!   ENUM_BITFIELD (c_typespec_kind) typespec_kind : 3;
    ENUM_BITFIELD (c_declspec_il) declspec_il : 3;
    /* Whether any expressions in typeof specifiers may appear in
       constant expressions.  */
    BOOL_BITFIELD expr_const_operands : 1;
    /* Whether any declaration specifiers have been seen at all.  */
    BOOL_BITFIELD declspecs_seen_p : 1;
    /* Whether something other than a storage class specifier or
       attribute has been seen.  This is used to warn for the
       obsolescent usage of storage class specifiers other than at the
--- 345,361 ----
    ENUM_BITFIELD (c_typespec_keyword) typespec_word : 8;
    /* The kind of type specifier if one has been seen, ctsk_none
       otherwise.  */
!   ENUM_BITFIELD (c_typespec_kind) typespec_kind : 4;
    ENUM_BITFIELD (c_declspec_il) declspec_il : 3;
    /* Whether any expressions in typeof specifiers may appear in
       constant expressions.  */
    BOOL_BITFIELD expr_const_operands : 1;
    /* Whether any declaration specifiers have been seen at all.  */
    BOOL_BITFIELD declspecs_seen_p : 1;
+   /* Whether any declaration specifiers other than standard attributes
+      have been seen at all.  If only standard attributes have been
+      seen, this is an attribute-declaration.  */
+   BOOL_BITFIELD non_std_attrs_seen_p : 1;
    /* Whether something other than a storage class specifier or
       attribute has been seen.  This is used to warn for the
       obsolescent usage of storage class specifiers other than at the
*************** struct c_declarator {
*** 445,453 ****
    /* Except for cdk_id, the contained declarator.  For cdk_id, NULL.  */
    struct c_declarator *declarator;
    union {
!     /* For identifiers, an IDENTIFIER_NODE or NULL_TREE if an abstract
!        declarator.  */
!     tree id;
      /* For functions.  */
      struct c_arg_info *arg_info;
      /* For arrays.  */
--- 461,475 ----
    /* Except for cdk_id, the contained declarator.  For cdk_id, NULL.  */
    struct c_declarator *declarator;
    union {
!     /* For identifiers.  */
!     struct {
!       /* An IDENTIFIER_NODE, or NULL_TREE if an abstract
! 	 declarator.  */
!       tree id;
!       /* Any attributes (which apply to the declaration rather than to
! 	 the type described by the outer declarators).  */
!       tree attrs;
!     } id;
      /* For functions.  */
      struct c_arg_info *arg_info;
      /* For arrays.  */
*************** extern void gen_aux_info_record (tree, i
*** 523,529 ****
  
  /* in c-decl.c */
  struct c_spot_bindings;
! struct c_struct_parse_info;
  extern struct obstack parser_obstack;
  extern tree c_break_label;
  extern tree c_cont_label;
--- 545,551 ----
  
  /* in c-decl.c */
  struct c_spot_bindings;
! class c_struct_parse_info;
  extern struct obstack parser_obstack;
  extern tree c_break_label;
  extern tree c_cont_label;
*************** extern bool c_check_switch_jump_warnings
*** 558,566 ****
  					  location_t, location_t);
  extern void finish_decl (tree, location_t, tree, tree, tree);
  extern tree finish_enum (tree, tree, tree);
! extern void finish_function (void);
  extern tree finish_struct (location_t, tree, tree, tree,
! 			   struct c_struct_parse_info *);
  extern struct c_arg_info *build_arg_info (void);
  extern struct c_arg_info *get_parm_info (bool, tree);
  extern tree grokfield (location_t, struct c_declarator *,
--- 580,590 ----
  					  location_t, location_t);
  extern void finish_decl (tree, location_t, tree, tree, tree);
  extern tree finish_enum (tree, tree, tree);
! extern void finish_function (location_t = input_location);
  extern tree finish_struct (location_t, tree, tree, tree,
! 			   class c_struct_parse_info *);
! extern tree c_simulate_enum_decl (location_t, const char *,
! 				  vec<string_int_pair>);
  extern struct c_arg_info *build_arg_info (void);
  extern struct c_arg_info *get_parm_info (bool, tree);
  extern tree grokfield (location_t, struct c_declarator *,
*************** extern struct c_declarator *set_array_de
*** 577,582 ****
--- 601,609 ----
  							struct c_declarator *);
  extern tree c_builtin_function (tree);
  extern tree c_builtin_function_ext_scope (tree);
+ extern tree c_simulate_builtin_function_decl (tree);
+ extern void c_warn_unused_attributes (tree);
+ extern tree c_warn_type_attributes (tree);
  extern void shadow_tag (const struct c_declspecs *);
  extern void shadow_tag_warned (const struct c_declspecs *, int);
  extern tree start_enum (location_t, struct c_enum_contents *, tree);
*************** extern bool start_function (struct c_dec
*** 584,596 ****
  extern tree start_decl (struct c_declarator *, struct c_declspecs *, bool,
  			tree);
  extern tree start_struct (location_t, enum tree_code, tree,
! 			  struct c_struct_parse_info **);
  extern void store_parm_decls (void);
  extern void store_parm_decls_from (struct c_arg_info *);
  extern void temp_store_parm_decls (tree, tree);
  extern void temp_pop_parm_decls (void);
  extern tree xref_tag (enum tree_code, tree);
! extern struct c_typespec parser_xref_tag (location_t, enum tree_code, tree);
  extern struct c_parm *build_c_parm (struct c_declspecs *, tree,
  				    struct c_declarator *, location_t);
  extern struct c_declarator *build_attrs_declarator (tree,
--- 611,624 ----
  extern tree start_decl (struct c_declarator *, struct c_declspecs *, bool,
  			tree);
  extern tree start_struct (location_t, enum tree_code, tree,
! 			  class c_struct_parse_info **);
  extern void store_parm_decls (void);
  extern void store_parm_decls_from (struct c_arg_info *);
  extern void temp_store_parm_decls (tree, tree);
  extern void temp_pop_parm_decls (void);
  extern tree xref_tag (enum tree_code, tree);
! extern struct c_typespec parser_xref_tag (location_t, enum tree_code, tree,
! 					  bool, tree);
  extern struct c_parm *build_c_parm (struct c_declspecs *, tree,
  				    struct c_declarator *, location_t);
  extern struct c_declarator *build_attrs_declarator (tree,
*************** extern tree c_omp_reduction_id (enum tre
*** 765,770 ****
--- 793,799 ----
  extern tree c_omp_reduction_decl (tree);
  extern tree c_omp_reduction_lookup (tree, tree);
  extern tree c_check_omp_declare_reduction_r (tree *, int *, void *);
+ extern bool c_check_in_current_scope (tree);
  extern void c_pushtag (location_t, tree, tree);
  extern void c_bind (location_t, tree, bool);
  extern bool tag_exists_p (enum tree_code, tree);
diff -Nrcpad gcc-9.3.0/gcc/c/c-typeck.c gcc-10.1.0/gcc/c/c-typeck.c
*** gcc-9.3.0/gcc/c/c-typeck.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/c-typeck.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Build expressions with type checking for C compiler.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Build expressions with type checking for C compiler.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** c_vla_type_p (const_tree t)
*** 353,359 ****
      return true;
    return false;
  }
! 
  /* Return the composite type of two compatible types.
  
     We assume that comptypes has already been done and returned
--- 353,380 ----
      return true;
    return false;
  }
! 
! /* If NTYPE is a type of a non-variadic function with a prototype
!    and OTYPE is a type of a function without a prototype and ATTRS
!    contains attribute format, diagnosess and removes it from ATTRS.
!    Returns the result of build_type_attribute_variant of NTYPE and
!    the (possibly) modified ATTRS.  */
! 
! static tree
! build_functype_attribute_variant (tree ntype, tree otype, tree attrs)
! {
!   if (!prototype_p (otype)
!       && prototype_p (ntype)
!       && lookup_attribute ("format", attrs))
!     {
!       warning_at (input_location, OPT_Wattributes,
! 		  "%qs attribute cannot be applied to a function that "
! 		  "does not take variable arguments", "format");
!       attrs = remove_attribute ("format", attrs);
!     }
!   return build_type_attribute_variant (ntype, attrs);
! 
! }
  /* Return the composite type of two compatible types.
  
     We assume that comptypes has already been done and returned
*************** composite_type (tree t1, tree t2)
*** 504,512 ****
  
  	/* Save space: see if the result is identical to one of the args.  */
  	if (valtype == TREE_TYPE (t1) && !TYPE_ARG_TYPES (t2))
! 	  return build_type_attribute_variant (t1, attributes);
  	if (valtype == TREE_TYPE (t2) && !TYPE_ARG_TYPES (t1))
! 	  return build_type_attribute_variant (t2, attributes);
  
  	/* Simple way if one arg fails to specify argument types.  */
  	if (TYPE_ARG_TYPES (t1) == NULL_TREE)
--- 525,533 ----
  
  	/* Save space: see if the result is identical to one of the args.  */
  	if (valtype == TREE_TYPE (t1) && !TYPE_ARG_TYPES (t2))
! 	  return build_functype_attribute_variant (t1, t2, attributes);
  	if (valtype == TREE_TYPE (t2) && !TYPE_ARG_TYPES (t1))
! 	  return build_functype_attribute_variant (t2, t1, attributes);
  
  	/* Simple way if one arg fails to specify argument types.  */
  	if (TYPE_ARG_TYPES (t1) == NULL_TREE)
*************** c_common_type (tree t1, tree t2)
*** 743,759 ****
      {
        if (code1 == VECTOR_TYPE || code2 == VECTOR_TYPE)
  	{
! 	  error ("can%'t mix operands of decimal float and vector types");
  	  return error_mark_node;
  	}
        if (code1 == COMPLEX_TYPE || code2 == COMPLEX_TYPE)
  	{
! 	  error ("can%'t mix operands of decimal float and complex types");
  	  return error_mark_node;
  	}
        if (code1 == REAL_TYPE && code2 == REAL_TYPE)
  	{
! 	  error ("can%'t mix operands of decimal float and other float types");
  	  return error_mark_node;
  	}
      }
--- 764,781 ----
      {
        if (code1 == VECTOR_TYPE || code2 == VECTOR_TYPE)
  	{
! 	  error ("cannot mix operands of decimal floating and vector types");
  	  return error_mark_node;
  	}
        if (code1 == COMPLEX_TYPE || code2 == COMPLEX_TYPE)
  	{
! 	  error ("cannot mix operands of decimal floating and complex types");
  	  return error_mark_node;
  	}
        if (code1 == REAL_TYPE && code2 == REAL_TYPE)
  	{
! 	  error ("cannot mix operands of decimal floating "
! 		 "and other floating types");
  	  return error_mark_node;
  	}
      }
*************** convert_lvalue_to_rvalue (location_t loc
*** 2053,2058 ****
--- 2075,2082 ----
      mark_exp_read (exp.value);
    if (convert_p)
      exp = default_function_array_conversion (loc, exp);
+   if (!VOID_TYPE_P (TREE_TYPE (exp.value)))
+     exp.value = require_complete_type (loc, exp.value);
    if (really_atomic_lvalue (exp.value))
      {
        vec<tree, va_gc> *params;
*************** build_indirect_ref (location_t loc, tree
*** 2549,2564 ****
  
  	  ref = build1 (INDIRECT_REF, t, pointer);
  
- 	  if (!COMPLETE_OR_VOID_TYPE_P (t) && TREE_CODE (t) != ARRAY_TYPE)
- 	    {
- 	      if (!C_TYPE_ERROR_REPORTED (TREE_TYPE (ptr)))
- 		{
- 		  error_at (loc, "dereferencing pointer to incomplete type "
- 			    "%qT", t);
- 		  C_TYPE_ERROR_REPORTED (TREE_TYPE (ptr)) = 1;
- 		}
- 	      return error_mark_node;
- 	    }
  	  if (VOID_TYPE_P (t) && c_inhibit_evaluation_warnings == 0)
  	    warning_at (loc, 0, "dereferencing %<void *%> pointer");
  
--- 2573,2578 ----
*************** build_array_ref (location_t loc, tree ar
*** 2609,2615 ****
    if (TREE_CODE (TREE_TYPE (array)) != ARRAY_TYPE
        && TREE_CODE (TREE_TYPE (array)) != POINTER_TYPE
        /* Allow vector[index] but not index[vector].  */
!       && !VECTOR_TYPE_P (TREE_TYPE (array)))
      {
        if (TREE_CODE (TREE_TYPE (index)) != ARRAY_TYPE
  	  && TREE_CODE (TREE_TYPE (index)) != POINTER_TYPE)
--- 2623,2629 ----
    if (TREE_CODE (TREE_TYPE (array)) != ARRAY_TYPE
        && TREE_CODE (TREE_TYPE (array)) != POINTER_TYPE
        /* Allow vector[index] but not index[vector].  */
!       && !gnu_vector_type_p (TREE_TYPE (array)))
      {
        if (TREE_CODE (TREE_TYPE (index)) != ARRAY_TYPE
  	  && TREE_CODE (TREE_TYPE (index)) != POINTER_TYPE)
*************** inform_declaration (tree decl)
*** 3002,3007 ****
--- 3016,3023 ----
  }
  
  /* Build a function call to function FUNCTION with parameters PARAMS.
+    If FUNCTION is the result of resolving an overloaded target built-in,
+    ORIG_FUNDECL is the original function decl, otherwise it is null.
     ORIGTYPES, if not NULL, is a vector of types; each element is
     either NULL or the original type of the corresponding element in
     PARAMS.  The original type may differ from TREE_TYPE of the
*************** inform_declaration (tree decl)
*** 3012,3018 ****
  tree
  build_function_call_vec (location_t loc, vec<location_t> arg_loc,
  			 tree function, vec<tree, va_gc> *params,
! 			 vec<tree, va_gc> *origtypes)
  {
    tree fntype, fundecl = NULL_TREE;
    tree name = NULL_TREE, result;
--- 3028,3034 ----
  tree
  build_function_call_vec (location_t loc, vec<location_t> arg_loc,
  			 tree function, vec<tree, va_gc> *params,
! 			 vec<tree, va_gc> *origtypes, tree orig_fundecl)
  {
    tree fntype, fundecl = NULL_TREE;
    tree name = NULL_TREE, result;
*************** build_function_call_vec (location_t loc,
*** 3032,3037 ****
--- 3048,3055 ----
        if (flag_tm)
  	tm_malloc_replacement (function);
        fundecl = function;
+       if (!orig_fundecl)
+ 	orig_fundecl = fundecl;
        /* Atomic functions have type checking/casting already done.  They are 
  	 often rewritten and don't match the original parameter list.  */
        if (name && !strncmp (IDENTIFIER_POINTER (name), "__atomic_", 9))
*************** build_function_call_vec (location_t loc,
*** 3109,3117 ****
    argarray = vec_safe_address (params);
  
    /* Check that arguments to builtin functions match the expectations.  */
!   if (fundecl && fndecl_built_in_p (fundecl, BUILT_IN_NORMAL)
!       && !check_builtin_function_arguments (loc, arg_loc, fundecl, nargs,
! 					    argarray))
      return error_mark_node;
  
    /* Check that the arguments to the function are valid.  */
--- 3127,3136 ----
    argarray = vec_safe_address (params);
  
    /* Check that arguments to builtin functions match the expectations.  */
!   if (fundecl
!       && fndecl_built_in_p (fundecl)
!       && !check_builtin_function_arguments (loc, arg_loc, fundecl,
! 					    orig_fundecl, nargs, argarray))
      return error_mark_node;
  
    /* Check that the arguments to the function are valid.  */
*************** pointer_diff (location_t loc, tree op0,
*** 3886,3891 ****
--- 3905,3911 ----
    addr_space_t as0 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (op0)));
    addr_space_t as1 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (op1)));
    tree target_type = TREE_TYPE (TREE_TYPE (op0));
+   tree orig_op0 = op0;
    tree orig_op1 = op1;
  
    /* If the operands point into different address spaces, we need to
*************** pointer_diff (location_t loc, tree op0,
*** 3956,3961 ****
--- 3976,3985 ----
    /* This generates an error if op1 is pointer to incomplete type.  */
    if (!COMPLETE_OR_VOID_TYPE_P (TREE_TYPE (TREE_TYPE (orig_op1))))
      error_at (loc, "arithmetic on pointer to an incomplete type");
+   else if (verify_type_context (loc, TCTX_POINTER_ARITH,
+ 				TREE_TYPE (TREE_TYPE (orig_op0))))
+     verify_type_context (loc, TCTX_POINTER_ARITH,
+ 			 TREE_TYPE (TREE_TYPE (orig_op1)));
  
    op1 = c_size_in_bytes (target_type);
  
*************** build_unary_op (location_t location, enu
*** 4354,4360 ****
  	 associativity, but won't generate any code.  */
        if (!(typecode == INTEGER_TYPE || typecode == REAL_TYPE
  	    || typecode == FIXED_POINT_TYPE || typecode == COMPLEX_TYPE
! 	    || typecode == VECTOR_TYPE))
  	{
  	  error_at (location, "wrong type argument to unary plus");
  	  return error_mark_node;
--- 4378,4384 ----
  	 associativity, but won't generate any code.  */
        if (!(typecode == INTEGER_TYPE || typecode == REAL_TYPE
  	    || typecode == FIXED_POINT_TYPE || typecode == COMPLEX_TYPE
! 	    || gnu_vector_type_p (TREE_TYPE (arg))))
  	{
  	  error_at (location, "wrong type argument to unary plus");
  	  return error_mark_node;
*************** build_unary_op (location_t location, enu
*** 4367,4373 ****
      case NEGATE_EXPR:
        if (!(typecode == INTEGER_TYPE || typecode == REAL_TYPE
  	    || typecode == FIXED_POINT_TYPE || typecode == COMPLEX_TYPE
! 	    || typecode == VECTOR_TYPE))
  	{
  	  error_at (location, "wrong type argument to unary minus");
  	  return error_mark_node;
--- 4391,4397 ----
      case NEGATE_EXPR:
        if (!(typecode == INTEGER_TYPE || typecode == REAL_TYPE
  	    || typecode == FIXED_POINT_TYPE || typecode == COMPLEX_TYPE
! 	    || gnu_vector_type_p (TREE_TYPE (arg))))
  	{
  	  error_at (location, "wrong type argument to unary minus");
  	  return error_mark_node;
*************** build_unary_op (location_t location, enu
*** 4379,4385 ****
      case BIT_NOT_EXPR:
        /* ~ works on integer types and non float vectors. */
        if (typecode == INTEGER_TYPE
! 	  || (typecode == VECTOR_TYPE
  	      && !VECTOR_FLOAT_TYPE_P (TREE_TYPE (arg))))
  	{
  	  tree e = arg;
--- 4403,4409 ----
      case BIT_NOT_EXPR:
        /* ~ works on integer types and non float vectors. */
        if (typecode == INTEGER_TYPE
! 	  || (gnu_vector_type_p (TREE_TYPE (arg))
  	      && !VECTOR_FLOAT_TYPE_P (TREE_TYPE (arg))))
  	{
  	  tree e = arg;
*************** build_unary_op (location_t location, enu
*** 4565,4571 ****
  
        if (typecode != POINTER_TYPE && typecode != FIXED_POINT_TYPE
  	  && typecode != INTEGER_TYPE && typecode != REAL_TYPE
! 	  && typecode != COMPLEX_TYPE && typecode != VECTOR_TYPE)
  	{
  	  if (code == PREINCREMENT_EXPR || code == POSTINCREMENT_EXPR)
  	    error_at (location, "wrong type argument to increment");
--- 4589,4596 ----
  
        if (typecode != POINTER_TYPE && typecode != FIXED_POINT_TYPE
  	  && typecode != INTEGER_TYPE && typecode != REAL_TYPE
! 	  && typecode != COMPLEX_TYPE
! 	  && !gnu_vector_type_p (TREE_TYPE (arg)))
  	{
  	  if (code == PREINCREMENT_EXPR || code == POSTINCREMENT_EXPR)
  	    error_at (location, "wrong type argument to increment");
*************** build_unary_op (location_t location, enu
*** 4607,4612 ****
--- 4632,4640 ----
  		  pedwarn (location, OPT_Wpointer_arith,
  			   "wrong type argument to decrement");
  	      }
+ 	    else
+ 	      verify_type_context (location, TCTX_POINTER_ARITH,
+ 				   TREE_TYPE (argtype));
  
  	    inc = c_size_in_bytes (TREE_TYPE (argtype));
  	    inc = convert_to_ptrofftype_loc (location, inc);
*************** build_conditional_expr (location_t colon
*** 5253,5265 ****
  			/* OK */;
  		      else if (unsigned_op2)
  			warning_at (op1_loc, OPT_Wsign_compare,
! 				    "operand of ?: changes signedness from "
  				    "%qT to %qT due to unsignedness of other "
  				    "operand", TREE_TYPE (orig_op1),
  				    TREE_TYPE (orig_op2));
  		      else
  			warning_at (op2_loc, OPT_Wsign_compare,
! 				    "operand of ?: changes signedness from "
  				    "%qT to %qT due to unsignedness of other "
  				    "operand", TREE_TYPE (orig_op2),
  				    TREE_TYPE (orig_op1));
--- 5281,5293 ----
  			/* OK */;
  		      else if (unsigned_op2)
  			warning_at (op1_loc, OPT_Wsign_compare,
! 				    "operand of %<?:%> changes signedness from "
  				    "%qT to %qT due to unsignedness of other "
  				    "operand", TREE_TYPE (orig_op1),
  				    TREE_TYPE (orig_op2));
  		      else
  			warning_at (op2_loc, OPT_Wsign_compare,
! 				    "operand of %<?:%> changes signedness from "
  				    "%qT to %qT due to unsignedness of other "
  				    "operand", TREE_TYPE (orig_op2),
  				    TREE_TYPE (orig_op1));
*************** build_conditional_expr (location_t colon
*** 5424,5430 ****
        tree elem_type = TREE_TYPE (vectype);
        tree zero = build_int_cst (elem_type, 0);
        tree zero_vec = build_vector_from_val (vectype, zero);
!       tree cmp_type = build_same_sized_truth_vector_type (vectype);
        ifexp = build2 (NE_EXPR, cmp_type, ifexp, zero_vec);
      }
  
--- 5452,5458 ----
        tree elem_type = TREE_TYPE (vectype);
        tree zero = build_int_cst (elem_type, 0);
        tree zero_vec = build_vector_from_val (vectype, zero);
!       tree cmp_type = truth_type_for (vectype);
        ifexp = build2 (NE_EXPR, cmp_type, ifexp, zero_vec);
      }
  
*************** convert_for_assignment (location_t locat
*** 6737,6742 ****
--- 6765,6785 ----
  	  }
      }
  
+   if (warn_enum_conversion)
+     {
+       tree checktype = origtype != NULL_TREE ? origtype : rhstype;
+       if (checktype != error_mark_node
+ 	  && TREE_CODE (checktype) == ENUMERAL_TYPE
+ 	  && TREE_CODE (type) == ENUMERAL_TYPE
+ 	  && TYPE_MAIN_VARIANT (checktype) != TYPE_MAIN_VARIANT (type))
+        {
+ 	  gcc_rich_location loc (location);
+ 	  warning_at (&loc, OPT_Wenum_conversion,
+ 		      "implicit conversion from %qT to %qT",
+ 		      checktype, type);
+        }
+     }
+ 
    if (TYPE_MAIN_VARIANT (type) == TYPE_MAIN_VARIANT (rhstype))
      {
        warn_for_address_or_pointer_of_packed_member (type, orig_rhs);
*************** digest_init (location_t init_loc, tree t
*** 7776,7788 ****
  		 that is counted in the length of the constant.  */
  	      if (compare_tree_int (TYPE_SIZE_UNIT (type), len - unit) < 0)
  		pedwarn_init (init_loc, 0,
! 			      ("initializer-string for array of chars "
! 			       "is too long"));
  	      else if (warn_cxx_compat
  		       && compare_tree_int (TYPE_SIZE_UNIT (type), len) < 0)
  		warning_at (init_loc, OPT_Wc___compat,
! 			    ("initializer-string for array chars "
! 			     "is too long for C++"));
  	      if (compare_tree_int (TYPE_SIZE_UNIT (type), len) < 0)
  		{
  		  unsigned HOST_WIDE_INT size
--- 7819,7831 ----
  		 that is counted in the length of the constant.  */
  	      if (compare_tree_int (TYPE_SIZE_UNIT (type), len - unit) < 0)
  		pedwarn_init (init_loc, 0,
! 			      ("initializer-string for array of %qT "
! 			       "is too long"), typ1);
  	      else if (warn_cxx_compat
  		       && compare_tree_int (TYPE_SIZE_UNIT (type), len) < 0)
  		warning_at (init_loc, OPT_Wc___compat,
! 			    ("initializer-string for array of %qT "
! 			     "is too long for C++"), typ1);
  	      if (compare_tree_int (TYPE_SIZE_UNIT (type), len) < 0)
  		{
  		  unsigned HOST_WIDE_INT size
*************** digest_init (location_t init_loc, tree t
*** 7849,7855 ****
  		     TYPE_MAIN_VARIANT (type))
  	  || (code == ARRAY_TYPE
  	      && comptypes (TREE_TYPE (inside_init), type))
! 	  || (code == VECTOR_TYPE
  	      && comptypes (TREE_TYPE (inside_init), type))
  	  || (code == POINTER_TYPE
  	      && TREE_CODE (TREE_TYPE (inside_init)) == ARRAY_TYPE
--- 7892,7898 ----
  		     TYPE_MAIN_VARIANT (type))
  	  || (code == ARRAY_TYPE
  	      && comptypes (TREE_TYPE (inside_init), type))
! 	  || (gnu_vector_type_p (type)
  	      && comptypes (TREE_TYPE (inside_init), type))
  	  || (code == POINTER_TYPE
  	      && TREE_CODE (TREE_TYPE (inside_init)) == ARRAY_TYPE
*************** really_start_incremental_init (tree type
*** 8347,8353 ****
  
        constructor_unfilled_index = constructor_index;
      }
!   else if (VECTOR_TYPE_P (constructor_type))
      {
        /* Vectors are like simple fixed-size arrays.  */
        constructor_max_index =
--- 8390,8396 ----
  
        constructor_unfilled_index = constructor_index;
      }
!   else if (gnu_vector_type_p (constructor_type))
      {
        /* Vectors are like simple fixed-size arrays.  */
        constructor_max_index =
*************** push_init_level (location_t loc, int imp
*** 8521,8527 ****
        constructor_unfilled_fields = constructor_fields;
        constructor_bit_index = bitsize_zero_node;
      }
!   else if (VECTOR_TYPE_P (constructor_type))
      {
        /* Vectors are like simple fixed-size arrays.  */
        constructor_max_index =
--- 8564,8570 ----
        constructor_unfilled_fields = constructor_fields;
        constructor_bit_index = bitsize_zero_node;
      }
!   else if (gnu_vector_type_p (constructor_type))
      {
        /* Vectors are like simple fixed-size arrays.  */
        constructor_max_index =
*************** pop_init_level (location_t loc, int impl
*** 8710,8722 ****
      ;
    else if (!RECORD_OR_UNION_TYPE_P (constructor_type)
  	   && TREE_CODE (constructor_type) != ARRAY_TYPE
! 	   && !VECTOR_TYPE_P (constructor_type))
      {
        /* A nonincremental scalar initializer--just return
  	 the element, after verifying there is just one.  */
        if (vec_safe_is_empty (constructor_elements))
  	{
! 	  if (!constructor_erroneous)
  	    error_init (loc, "empty scalar initializer");
  	  ret.value = error_mark_node;
  	}
--- 8753,8765 ----
      ;
    else if (!RECORD_OR_UNION_TYPE_P (constructor_type)
  	   && TREE_CODE (constructor_type) != ARRAY_TYPE
! 	   && !gnu_vector_type_p (constructor_type))
      {
        /* A nonincremental scalar initializer--just return
  	 the element, after verifying there is just one.  */
        if (vec_safe_is_empty (constructor_elements))
  	{
! 	  if (!constructor_erroneous && constructor_type != error_mark_node)
  	    error_init (loc, "empty scalar initializer");
  	  ret.value = error_mark_node;
  	}
*************** set_designator (location_t loc, bool arr
*** 8793,8800 ****
    enum tree_code subcode;
  
    /* Don't die if an entire brace-pair level is superfluous
!      in the containing level.  */
!   if (constructor_type == NULL_TREE)
      return true;
  
    /* If there were errors in this designator list already, bail out
--- 8836,8843 ----
    enum tree_code subcode;
  
    /* Don't die if an entire brace-pair level is superfluous
!      in the containing level, or for an erroneous type.  */
!   if (constructor_type == NULL_TREE || constructor_type == error_mark_node)
      return true;
  
    /* If there were errors in this designator list already, bail out
*************** set_designator (location_t loc, bool arr
*** 8802,8807 ****
--- 8845,8856 ----
    if (designator_erroneous)
      return true;
  
+   /* Likewise for an initializer for a variable-size type.  Those are
+      diagnosed in digest_init.  */
+   if (COMPLETE_TYPE_P (constructor_type)
+       && TREE_CODE (TYPE_SIZE (constructor_type)) != INTEGER_CST)
+     return true;
+ 
    if (!designator_depth)
      {
        gcc_assert (!constructor_range_stack);
*************** process_init_element (location_t loc, st
*** 9900,9906 ****
        && integer_zerop (constructor_unfilled_index))
      {
        if (constructor_stack->replacement_value.value)
! 	error_init (loc, "excess elements in char array initializer");
        constructor_stack->replacement_value = value;
        return;
      }
--- 9949,9955 ----
        && integer_zerop (constructor_unfilled_index))
      {
        if (constructor_stack->replacement_value.value)
! 	error_init (loc, "excess elements in %<char%> array initializer");
        constructor_stack->replacement_value = value;
        return;
      }
*************** process_init_element (location_t loc, st
*** 9912,9919 ****
      }
  
    /* Ignore elements of a brace group if it is entirely superfluous
!      and has already been diagnosed.  */
!   if (constructor_type == NULL_TREE)
      return;
  
    if (!implicit && warn_designated_init && !was_designated
--- 9961,9974 ----
      }
  
    /* Ignore elements of a brace group if it is entirely superfluous
!      and has already been diagnosed, or if the type is erroneous.  */
!   if (constructor_type == NULL_TREE || constructor_type == error_mark_node)
!     return;
! 
!   /* Ignore elements of an initializer for a variable-size type.
!      Those are diagnosed in digest_init.  */
!   if (COMPLETE_TYPE_P (constructor_type)
!       && !poly_int_tree_p (TYPE_SIZE (constructor_type)))
      return;
  
    if (!implicit && warn_designated_init && !was_designated
*************** process_init_element (location_t loc, st
*** 9936,9942 ****
  					      last_init_list_comma),
  			      true, braced_init_obstack);
        else if ((TREE_CODE (constructor_type) == ARRAY_TYPE
! 		|| VECTOR_TYPE_P (constructor_type))
  	       && constructor_max_index
  	       && tree_int_cst_lt (constructor_max_index,
  				   constructor_index))
--- 9991,9997 ----
  					      last_init_list_comma),
  			      true, braced_init_obstack);
        else if ((TREE_CODE (constructor_type) == ARRAY_TYPE
! 		|| gnu_vector_type_p (constructor_type))
  	       && constructor_max_index
  	       && tree_int_cst_lt (constructor_max_index,
  				   constructor_index))
*************** process_init_element (location_t loc, st
*** 10037,10043 ****
  		   && value.value != error_mark_node
  		   && TYPE_MAIN_VARIANT (TREE_TYPE (value.value)) != fieldtype
  		   && (fieldcode == RECORD_TYPE || fieldcode == ARRAY_TYPE
! 		       || fieldcode == UNION_TYPE || fieldcode == VECTOR_TYPE))
  	    {
  	      push_init_level (loc, 1, braced_init_obstack);
  	      continue;
--- 10092,10099 ----
  		   && value.value != error_mark_node
  		   && TYPE_MAIN_VARIANT (TREE_TYPE (value.value)) != fieldtype
  		   && (fieldcode == RECORD_TYPE || fieldcode == ARRAY_TYPE
! 		       || fieldcode == UNION_TYPE
! 		       || gnu_vector_type_p (fieldtype)))
  	    {
  	      push_init_level (loc, 1, braced_init_obstack);
  	      continue;
*************** process_init_element (location_t loc, st
*** 10128,10134 ****
  		   && value.value != error_mark_node
  		   && TYPE_MAIN_VARIANT (TREE_TYPE (value.value)) != fieldtype
  		   && (fieldcode == RECORD_TYPE || fieldcode == ARRAY_TYPE
! 		       || fieldcode == UNION_TYPE || fieldcode == VECTOR_TYPE))
  	    {
  	      push_init_level (loc, 1, braced_init_obstack);
  	      continue;
--- 10184,10191 ----
  		   && value.value != error_mark_node
  		   && TYPE_MAIN_VARIANT (TREE_TYPE (value.value)) != fieldtype
  		   && (fieldcode == RECORD_TYPE || fieldcode == ARRAY_TYPE
! 		       || fieldcode == UNION_TYPE
! 		       || gnu_vector_type_p (fieldtype)))
  	    {
  	      push_init_level (loc, 1, braced_init_obstack);
  	      continue;
*************** process_init_element (location_t loc, st
*** 10170,10176 ****
  		   && value.value != error_mark_node
  		   && TYPE_MAIN_VARIANT (TREE_TYPE (value.value)) != elttype
  		   && (eltcode == RECORD_TYPE || eltcode == ARRAY_TYPE
! 		       || eltcode == UNION_TYPE || eltcode == VECTOR_TYPE))
  	    {
  	      push_init_level (loc, 1, braced_init_obstack);
  	      continue;
--- 10227,10234 ----
  		   && value.value != error_mark_node
  		   && TYPE_MAIN_VARIANT (TREE_TYPE (value.value)) != elttype
  		   && (eltcode == RECORD_TYPE || eltcode == ARRAY_TYPE
! 		       || eltcode == UNION_TYPE
! 		       || gnu_vector_type_p (elttype)))
  	    {
  	      push_init_level (loc, 1, braced_init_obstack);
  	      continue;
*************** process_init_element (location_t loc, st
*** 10206,10212 ****
  	       constructor_unfilled_index.  */
  	    constructor_unfilled_index = constructor_index;
  	}
!       else if (VECTOR_TYPE_P (constructor_type))
  	{
  	  tree elttype = TYPE_MAIN_VARIANT (TREE_TYPE (constructor_type));
  
--- 10264,10270 ----
  	       constructor_unfilled_index.  */
  	    constructor_unfilled_index = constructor_index;
  	}
!       else if (gnu_vector_type_p (constructor_type))
  	{
  	  tree elttype = TYPE_MAIN_VARIANT (TREE_TYPE (constructor_type));
  
*************** build_vec_cmp (tree_code code, tree type
*** 11327,11333 ****
  {
    tree zero_vec = build_zero_cst (type);
    tree minus_one_vec = build_minus_one_cst (type);
!   tree cmp_type = build_same_sized_truth_vector_type (type);
    tree cmp = build2 (code, cmp_type, arg0, arg1);
    return build3 (VEC_COND_EXPR, type, cmp, minus_one_vec, zero_vec);
  }
--- 11385,11391 ----
  {
    tree zero_vec = build_zero_cst (type);
    tree minus_one_vec = build_minus_one_cst (type);
!   tree cmp_type = truth_type_for (type);
    tree cmp = build2 (code, cmp_type, arg0, arg1);
    return build3 (VEC_COND_EXPR, type, cmp, minus_one_vec, zero_vec);
  }
*************** build_binary_op (location_t location, en
*** 11550,11556 ****
  
    /* In case when one of the operands of the binary operation is
       a vector and another is a scalar -- convert scalar to vector.  */
!   if ((code0 == VECTOR_TYPE) != (code1 == VECTOR_TYPE))
      {
        enum stv_conv convert_flag = scalar_to_vector (location, code, op0, op1,
  						     true);
--- 11608,11615 ----
  
    /* In case when one of the operands of the binary operation is
       a vector and another is a scalar -- convert scalar to vector.  */
!   if ((gnu_vector_type_p (type0) && code1 != VECTOR_TYPE)
!       || (gnu_vector_type_p (type1) && code0 != VECTOR_TYPE))
      {
        enum stv_conv convert_flag = scalar_to_vector (location, code, op0, op1,
  						     true);
*************** build_binary_op (location_t location, en
*** 11645,11654 ****
  
        if ((code0 == INTEGER_TYPE || code0 == REAL_TYPE
  	   || code0 == FIXED_POINT_TYPE
! 	   || code0 == COMPLEX_TYPE || code0 == VECTOR_TYPE)
  	  && (code1 == INTEGER_TYPE || code1 == REAL_TYPE
  	      || code1 == FIXED_POINT_TYPE
! 	      || code1 == COMPLEX_TYPE || code1 == VECTOR_TYPE))
  	{
  	  enum tree_code tcode0 = code0, tcode1 = code1;
  
--- 11704,11715 ----
  
        if ((code0 == INTEGER_TYPE || code0 == REAL_TYPE
  	   || code0 == FIXED_POINT_TYPE
! 	   || code0 == COMPLEX_TYPE
! 	   || gnu_vector_type_p (type0))
  	  && (code1 == INTEGER_TYPE || code1 == REAL_TYPE
  	      || code1 == FIXED_POINT_TYPE
! 	      || code1 == COMPLEX_TYPE
! 	      || gnu_vector_type_p (type1)))
  	{
  	  enum tree_code tcode0 = code0, tcode1 = code1;
  
*************** build_binary_op (location_t location, en
*** 11679,11686 ****
        if (code0 == INTEGER_TYPE && code1 == INTEGER_TYPE)
  	shorten = -1;
        /* Allow vector types which are not floating point types.   */
!       else if (code0 == VECTOR_TYPE
! 	       && code1 == VECTOR_TYPE
  	       && !VECTOR_FLOAT_TYPE_P (type0)
  	       && !VECTOR_FLOAT_TYPE_P (type1))
  	common = 1;
--- 11740,11747 ----
        if (code0 == INTEGER_TYPE && code1 == INTEGER_TYPE)
  	shorten = -1;
        /* Allow vector types which are not floating point types.   */
!       else if (gnu_vector_type_p (type0)
! 	       && gnu_vector_type_p (type1)
  	       && !VECTOR_FLOAT_TYPE_P (type0)
  	       && !VECTOR_FLOAT_TYPE_P (type1))
  	common = 1;
*************** build_binary_op (location_t location, en
*** 11691,11697 ****
        doing_div_or_mod = true;
        warn_for_div_by_zero (location, op1);
  
!       if (code0 == VECTOR_TYPE && code1 == VECTOR_TYPE
  	  && TREE_CODE (TREE_TYPE (type0)) == INTEGER_TYPE
  	  && TREE_CODE (TREE_TYPE (type1)) == INTEGER_TYPE)
  	common = 1;
--- 11752,11759 ----
        doing_div_or_mod = true;
        warn_for_div_by_zero (location, op1);
  
!       if (gnu_vector_type_p (type0)
! 	  && gnu_vector_type_p (type1)
  	  && TREE_CODE (TREE_TYPE (type0)) == INTEGER_TYPE
  	  && TREE_CODE (TREE_TYPE (type1)) == INTEGER_TYPE)
  	common = 1;
*************** build_binary_op (location_t location, en
*** 11770,11776 ****
  	 Also set SHORT_SHIFT if shifting rightward.  */
  
      case RSHIFT_EXPR:
!       if (code0 == VECTOR_TYPE && code1 == VECTOR_TYPE
  	  && TREE_CODE (TREE_TYPE (type0)) == INTEGER_TYPE
  	  && TREE_CODE (TREE_TYPE (type1)) == INTEGER_TYPE
  	  && known_eq (TYPE_VECTOR_SUBPARTS (type0),
--- 11832,11839 ----
  	 Also set SHORT_SHIFT if shifting rightward.  */
  
      case RSHIFT_EXPR:
!       if (gnu_vector_type_p (type0)
! 	  && gnu_vector_type_p (type1)
  	  && TREE_CODE (TREE_TYPE (type0)) == INTEGER_TYPE
  	  && TREE_CODE (TREE_TYPE (type1)) == INTEGER_TYPE
  	  && known_eq (TYPE_VECTOR_SUBPARTS (type0),
*************** build_binary_op (location_t location, en
*** 11780,11786 ****
  	  converted = 1;
  	}
        else if ((code0 == INTEGER_TYPE || code0 == FIXED_POINT_TYPE
! 		|| (code0 == VECTOR_TYPE
  		    && TREE_CODE (TREE_TYPE (type0)) == INTEGER_TYPE))
  	       && code1 == INTEGER_TYPE)
  	{
--- 11843,11849 ----
  	  converted = 1;
  	}
        else if ((code0 == INTEGER_TYPE || code0 == FIXED_POINT_TYPE
! 		|| (gnu_vector_type_p (type0)
  		    && TREE_CODE (TREE_TYPE (type0)) == INTEGER_TYPE))
  	       && code1 == INTEGER_TYPE)
  	{
*************** build_binary_op (location_t location, en
*** 11829,11835 ****
        break;
  
      case LSHIFT_EXPR:
!       if (code0 == VECTOR_TYPE && code1 == VECTOR_TYPE
  	  && TREE_CODE (TREE_TYPE (type0)) == INTEGER_TYPE
  	  && TREE_CODE (TREE_TYPE (type1)) == INTEGER_TYPE
  	  && known_eq (TYPE_VECTOR_SUBPARTS (type0),
--- 11892,11899 ----
        break;
  
      case LSHIFT_EXPR:
!       if (gnu_vector_type_p (type0)
! 	  && gnu_vector_type_p (type1)
  	  && TREE_CODE (TREE_TYPE (type0)) == INTEGER_TYPE
  	  && TREE_CODE (TREE_TYPE (type1)) == INTEGER_TYPE
  	  && known_eq (TYPE_VECTOR_SUBPARTS (type0),
*************** build_binary_op (location_t location, en
*** 11839,11845 ****
  	  converted = 1;
  	}
        else if ((code0 == INTEGER_TYPE || code0 == FIXED_POINT_TYPE
! 		|| (code0 == VECTOR_TYPE
  		    && TREE_CODE (TREE_TYPE (type0)) == INTEGER_TYPE))
  	       && code1 == INTEGER_TYPE)
  	{
--- 11903,11909 ----
  	  converted = 1;
  	}
        else if ((code0 == INTEGER_TYPE || code0 == FIXED_POINT_TYPE
! 		|| (gnu_vector_type_p (type0)
  		    && TREE_CODE (TREE_TYPE (type0)) == INTEGER_TYPE))
  	       && code1 == INTEGER_TYPE)
  	{
*************** build_binary_op (location_t location, en
*** 11898,11904 ****
  
      case EQ_EXPR:
      case NE_EXPR:
!       if (code0 == VECTOR_TYPE && code1 == VECTOR_TYPE)
          {
            tree intt;
  	  if (!vector_types_compatible_elements_p (type0, type1))
--- 11962,11968 ----
  
      case EQ_EXPR:
      case NE_EXPR:
!       if (gnu_vector_type_p (type0) && gnu_vector_type_p (type1))
          {
            tree intt;
  	  if (!vector_types_compatible_elements_p (type0, type1))
*************** build_binary_op (location_t location, en
*** 11950,11956 ****
        if (FLOAT_TYPE_P (type0) || FLOAT_TYPE_P (type1))
  	warning_at (location,
  		    OPT_Wfloat_equal,
! 		    "comparing floating point with == or != is unsafe");
        /* Result of comparison is always int,
  	 but don't convert the args to int!  */
        build_type = integer_type_node;
--- 12014,12020 ----
        if (FLOAT_TYPE_P (type0) || FLOAT_TYPE_P (type1))
  	warning_at (location,
  		    OPT_Wfloat_equal,
! 		    "comparing floating-point with %<==%> or %<!=%> is unsafe");
        /* Result of comparison is always int,
  	 but don't convert the args to int!  */
        build_type = integer_type_node;
*************** build_binary_op (location_t location, en
*** 12066,12072 ****
      case GE_EXPR:
      case LT_EXPR:
      case GT_EXPR:
!       if (code0 == VECTOR_TYPE && code1 == VECTOR_TYPE)
          {
            tree intt;
  	  if (!vector_types_compatible_elements_p (type0, type1))
--- 12130,12136 ----
      case GE_EXPR:
      case LT_EXPR:
      case GT_EXPR:
!       if (gnu_vector_type_p (type0) && gnu_vector_type_p (type1))
          {
            tree intt;
  	  if (!vector_types_compatible_elements_p (type0, type1))
*************** build_binary_op (location_t location, en
*** 12213,12219 ****
    if (code0 == ERROR_MARK || code1 == ERROR_MARK)
      return error_mark_node;
  
!   if (code0 == VECTOR_TYPE && code1 == VECTOR_TYPE
        && (!tree_int_cst_equal (TYPE_SIZE (type0), TYPE_SIZE (type1))
  	  || !vector_types_compatible_elements_p (type0, type1)))
      {
--- 12277,12284 ----
    if (code0 == ERROR_MARK || code1 == ERROR_MARK)
      return error_mark_node;
  
!   if (gnu_vector_type_p (type0)
!       && gnu_vector_type_p (type1)
        && (!tree_int_cst_equal (TYPE_SIZE (type0), TYPE_SIZE (type1))
  	  || !vector_types_compatible_elements_p (type0, type1)))
      {
*************** build_binary_op (location_t location, en
*** 12228,12237 ****
      }
  
    if ((code0 == INTEGER_TYPE || code0 == REAL_TYPE || code0 == COMPLEX_TYPE
!        || code0 == FIXED_POINT_TYPE || code0 == VECTOR_TYPE)
        &&
        (code1 == INTEGER_TYPE || code1 == REAL_TYPE || code1 == COMPLEX_TYPE
!        || code1 == FIXED_POINT_TYPE || code1 == VECTOR_TYPE))
      {
        bool first_complex = (code0 == COMPLEX_TYPE);
        bool second_complex = (code1 == COMPLEX_TYPE);
--- 12293,12304 ----
      }
  
    if ((code0 == INTEGER_TYPE || code0 == REAL_TYPE || code0 == COMPLEX_TYPE
!        || code0 == FIXED_POINT_TYPE
!        || gnu_vector_type_p (type0))
        &&
        (code1 == INTEGER_TYPE || code1 == REAL_TYPE || code1 == COMPLEX_TYPE
!        || code1 == FIXED_POINT_TYPE
!        || gnu_vector_type_p (type1)))
      {
        bool first_complex = (code0 == COMPLEX_TYPE);
        bool second_complex = (code1 == COMPLEX_TYPE);
*************** handle_omp_array_sections_1 (tree c, tre
*** 12875,12881 ****
  	  return error_mark_node;
  	}
        if (TREE_CODE (t) == COMPONENT_REF
- 	  && ort == C_ORT_OMP
  	  && (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_MAP
  	      || OMP_CLAUSE_CODE (c) == OMP_CLAUSE_TO
  	      || OMP_CLAUSE_CODE (c) == OMP_CLAUSE_FROM))
--- 12942,12947 ----
*************** handle_omp_array_sections_1 (tree c, tre
*** 12896,12901 ****
--- 12962,12976 ----
  		  return error_mark_node;
  		}
  	      t = TREE_OPERAND (t, 0);
+ 	      if (ort == C_ORT_ACC && TREE_CODE (t) == MEM_REF)
+ 		{
+ 		  if (maybe_ne (mem_ref_offset (t), 0))
+ 		    error_at (OMP_CLAUSE_LOCATION (c),
+ 			      "cannot dereference %qE in %qs clause", t,
+ 			      omp_clause_code_name[OMP_CLAUSE_CODE (c)]);
+ 		  else
+ 		    t = TREE_OPERAND (t, 0);
+ 		}
  	    }
  	}
        if (!VAR_P (t) && TREE_CODE (t) != PARM_DECL)
*************** handle_omp_array_sections_1 (tree c, tre
*** 12981,12987 ****
      length = fold_convert (sizetype, length);
    if (low_bound == NULL_TREE)
      low_bound = integer_zero_node;
! 
    if (length != NULL_TREE)
      {
        if (!integer_nonzerop (length))
--- 13056,13073 ----
      length = fold_convert (sizetype, length);
    if (low_bound == NULL_TREE)
      low_bound = integer_zero_node;
!   if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_MAP
!       && (OMP_CLAUSE_MAP_KIND (c) == GOMP_MAP_ATTACH
! 	  || OMP_CLAUSE_MAP_KIND (c) == GOMP_MAP_DETACH))
!     {
!       if (length != integer_one_node)
! 	{
! 	  error_at (OMP_CLAUSE_LOCATION (c),
! 		    "expected single pointer in %qs clause",
! 		    c_omp_map_clause_name (c, ort == C_ORT_ACC));
! 	  return error_mark_node;
! 	}
!     }
    if (length != NULL_TREE)
      {
        if (!integer_nonzerop (length))
*************** handle_omp_array_sections (tree c, enum
*** 13400,13405 ****
--- 13486,13492 ----
  	switch (OMP_CLAUSE_MAP_KIND (c))
  	  {
  	  case GOMP_MAP_ALLOC:
+ 	  case GOMP_MAP_IF_PRESENT:
  	  case GOMP_MAP_TO:
  	  case GOMP_MAP_FROM:
  	  case GOMP_MAP_TOFROM:
*************** handle_omp_array_sections (tree c, enum
*** 13421,13427 ****
        if (ort != C_ORT_OMP && ort != C_ORT_ACC)
  	OMP_CLAUSE_SET_MAP_KIND (c2, GOMP_MAP_POINTER);
        else if (TREE_CODE (t) == COMPONENT_REF)
! 	OMP_CLAUSE_SET_MAP_KIND (c2, GOMP_MAP_ALWAYS_POINTER);
        else
  	OMP_CLAUSE_SET_MAP_KIND (c2, GOMP_MAP_FIRSTPRIVATE_POINTER);
        if (OMP_CLAUSE_MAP_KIND (c2) != GOMP_MAP_FIRSTPRIVATE_POINTER
--- 13508,13518 ----
        if (ort != C_ORT_OMP && ort != C_ORT_ACC)
  	OMP_CLAUSE_SET_MAP_KIND (c2, GOMP_MAP_POINTER);
        else if (TREE_CODE (t) == COMPONENT_REF)
! 	{
! 	  gomp_map_kind k = (ort == C_ORT_ACC) ? GOMP_MAP_ATTACH_DETACH
! 					       : GOMP_MAP_ALWAYS_POINTER;
! 	  OMP_CLAUSE_SET_MAP_KIND (c2, k);
! 	}
        else
  	OMP_CLAUSE_SET_MAP_KIND (c2, GOMP_MAP_FIRSTPRIVATE_POINTER);
        if (OMP_CLAUSE_MAP_KIND (c2) != GOMP_MAP_FIRSTPRIVATE_POINTER
*************** c_omp_finish_iterators (tree iter)
*** 13658,13663 ****
--- 13749,13783 ----
    return ret;
  }
  
+ /* Ensure that pointers are used in OpenACC attach and detach clauses.
+    Return true if an error has been detected.  */
+ 
+ static bool
+ c_oacc_check_attachments (tree c)
+ {
+   if (OMP_CLAUSE_CODE (c) != OMP_CLAUSE_MAP)
+     return false;
+ 
+   /* OpenACC attach / detach clauses must be pointers.  */
+   if (OMP_CLAUSE_MAP_KIND (c) == GOMP_MAP_ATTACH
+       || OMP_CLAUSE_MAP_KIND (c) == GOMP_MAP_DETACH)
+     {
+       tree t = OMP_CLAUSE_DECL (c);
+ 
+       while (TREE_CODE (t) == TREE_LIST)
+ 	t = TREE_CHAIN (t);
+ 
+       if (TREE_CODE (TREE_TYPE (t)) != POINTER_TYPE)
+ 	{
+ 	  error_at (OMP_CLAUSE_LOCATION (c), "expected pointer in %qs clause",
+ 		    c_omp_map_clause_name (c, true));
+ 	  return true;
+ 	}
+     }
+ 
+   return false;
+ }
+ 
  /* For all elements of CLAUSES, validate them against their constraints.
     Remove any elements from the list that are invalid.  */
  
*************** c_finish_omp_clauses (tree clauses, enum
*** 13672,13684 ****
    bool copyprivate_seen = false;
    bool linear_variable_step_check = false;
    tree *nowait_clause = NULL;
!   bool ordered_seen = false;
    tree schedule_clause = NULL_TREE;
    bool oacc_async = false;
    tree last_iterators = NULL_TREE;
    bool last_iterators_remove = false;
    tree *nogroup_seen = NULL;
!   bool reduction_seen = false;
  
    bitmap_obstack_initialize (NULL);
    bitmap_initialize (&generic_head, &bitmap_default_obstack);
--- 13792,13807 ----
    bool copyprivate_seen = false;
    bool linear_variable_step_check = false;
    tree *nowait_clause = NULL;
!   tree ordered_clause = NULL_TREE;
    tree schedule_clause = NULL_TREE;
    bool oacc_async = false;
    tree last_iterators = NULL_TREE;
    bool last_iterators_remove = false;
    tree *nogroup_seen = NULL;
!   tree *order_clause = NULL;
!   /* 1 if normal/task reduction has been seen, -1 if inscan reduction
!      has been seen, -2 if mixed inscan/normal reduction diagnosed.  */
!   int reduction_seen = 0;
  
    bitmap_obstack_initialize (NULL);
    bitmap_initialize (&generic_head, &bitmap_default_obstack);
*************** c_finish_omp_clauses (tree clauses, enum
*** 13688,13694 ****
    /* If ort == C_ORT_OMP_DECLARE_SIMD used as uniform_head instead.  */
    bitmap_initialize (&map_head, &bitmap_default_obstack);
    bitmap_initialize (&map_field_head, &bitmap_default_obstack);
!   /* If ort == C_ORT_OMP used as nontemporal_head instead.  */
    bitmap_initialize (&oacc_reduction_head, &bitmap_default_obstack);
  
    if (ort & C_ORT_ACC)
--- 13811,13818 ----
    /* If ort == C_ORT_OMP_DECLARE_SIMD used as uniform_head instead.  */
    bitmap_initialize (&map_head, &bitmap_default_obstack);
    bitmap_initialize (&map_field_head, &bitmap_default_obstack);
!   /* If ort == C_ORT_OMP used as nontemporal_head or use_device_xxx_head
!      instead.  */
    bitmap_initialize (&oacc_reduction_head, &bitmap_default_obstack);
  
    if (ort & C_ORT_ACC)
*************** c_finish_omp_clauses (tree clauses, enum
*** 13717,13723 ****
  	  goto check_dup_generic;
  
  	case OMP_CLAUSE_REDUCTION:
! 	  reduction_seen = true;
  	  /* FALLTHRU */
  	case OMP_CLAUSE_IN_REDUCTION:
  	case OMP_CLAUSE_TASK_REDUCTION:
--- 13841,13857 ----
  	  goto check_dup_generic;
  
  	case OMP_CLAUSE_REDUCTION:
! 	  if (reduction_seen == 0)
! 	    reduction_seen = OMP_CLAUSE_REDUCTION_INSCAN (c) ? -1 : 1;
! 	  else if (reduction_seen != -2
! 		   && reduction_seen != (OMP_CLAUSE_REDUCTION_INSCAN (c)
! 					 ? -1 : 1))
! 	    {
! 	      error_at (OMP_CLAUSE_LOCATION (c),
! 			"%<inscan%> and non-%<inscan%> %<reduction%> clauses "
! 			"on the same construct");
! 	      reduction_seen = -2;
! 	    }
  	  /* FALLTHRU */
  	case OMP_CLAUSE_IN_REDUCTION:
  	case OMP_CLAUSE_TASK_REDUCTION:
*************** c_finish_omp_clauses (tree clauses, enum
*** 13732,13737 ****
--- 13866,13880 ----
  		}
  
  	      t = OMP_CLAUSE_DECL (c);
+ 	      if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_REDUCTION
+ 		  && OMP_CLAUSE_REDUCTION_INSCAN (c))
+ 		{
+ 		  error_at (OMP_CLAUSE_LOCATION (c),
+ 			    "%<inscan%> %<reduction%> clause with array "
+ 			    "section");
+ 		  remove = true;
+ 		  break;
+ 		}
  	    }
  	  t = require_complete_type (OMP_CLAUSE_LOCATION (c), t);
  	  if (t == error_mark_node)
*************** c_finish_omp_clauses (tree clauses, enum
*** 14061,14073 ****
  			omp_clause_code_name[OMP_CLAUSE_CODE (c)]);
  	      remove = true;
  	    }
! 	  else if (ort == C_ORT_ACC
! 		   && OMP_CLAUSE_CODE (c) == OMP_CLAUSE_REDUCTION)
  	    {
  	      if (bitmap_bit_p (&oacc_reduction_head, DECL_UID (t)))
  		{
  		  error_at (OMP_CLAUSE_LOCATION (c),
! 			    "%qD appears more than once in reduction clauses",
  			    t);
  		  remove = true;
  		}
--- 14204,14222 ----
  			omp_clause_code_name[OMP_CLAUSE_CODE (c)]);
  	      remove = true;
  	    }
! 	  else if ((ort == C_ORT_ACC
! 		    && OMP_CLAUSE_CODE (c) == OMP_CLAUSE_REDUCTION)
! 		   || (ort == C_ORT_OMP
! 		       && (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_USE_DEVICE_PTR
! 			   || (OMP_CLAUSE_CODE (c)
! 			       == OMP_CLAUSE_USE_DEVICE_ADDR))))
  	    {
  	      if (bitmap_bit_p (&oacc_reduction_head, DECL_UID (t)))
  		{
  		  error_at (OMP_CLAUSE_LOCATION (c),
! 			    ort == C_ORT_ACC
! 			    ? "%qD appears more than once in reduction clauses"
! 			    : "%qD appears more than once in data clauses",
  			    t);
  		  remove = true;
  		}
*************** c_finish_omp_clauses (tree clauses, enum
*** 14382,14387 ****
--- 14531,14538 ----
  			}
  		    }
  		}
+ 	      if (c_oacc_check_attachments (c))
+ 		remove = true;
  	      break;
  	    }
  	  if (t == error_mark_node)
*************** c_finish_omp_clauses (tree clauses, enum
*** 14389,14396 ****
  	      remove = true;
  	      break;
  	    }
  	  if (TREE_CODE (t) == COMPONENT_REF
- 	      && (ort & C_ORT_OMP)
  	      && OMP_CLAUSE_CODE (c) != OMP_CLAUSE__CACHE_)
  	    {
  	      if (DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
--- 14540,14552 ----
  	      remove = true;
  	      break;
  	    }
+ 	  /* OpenACC attach / detach clauses must be pointers.  */
+ 	  if (c_oacc_check_attachments (c))
+ 	    {
+ 	      remove = true;
+ 	      break;
+ 	    }
  	  if (TREE_CODE (t) == COMPONENT_REF
  	      && OMP_CLAUSE_CODE (c) != OMP_CLAUSE__CACHE_)
  	    {
  	      if (DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
*************** c_finish_omp_clauses (tree clauses, enum
*** 14425,14430 ****
--- 14581,14595 ----
  		      break;
  		    }
  		  t = TREE_OPERAND (t, 0);
+ 		  if (ort == C_ORT_ACC && TREE_CODE (t) == MEM_REF)
+ 		    {
+ 		      if (maybe_ne (mem_ref_offset (t), 0))
+ 			error_at (OMP_CLAUSE_LOCATION (c),
+ 				  "cannot dereference %qE in %qs clause", t,
+ 				  omp_clause_code_name[OMP_CLAUSE_CODE (c)]);
+ 		      else
+ 			t = TREE_OPERAND (t, 0);
+ 		    }
  		}
  	      if (remove)
  		break;
*************** c_finish_omp_clauses (tree clauses, enum
*** 14598,14613 ****
  	case OMP_CLAUSE_IS_DEVICE_PTR:
  	case OMP_CLAUSE_USE_DEVICE_PTR:
  	  t = OMP_CLAUSE_DECL (c);
! 	  if (TREE_CODE (TREE_TYPE (t)) != POINTER_TYPE
! 	      && TREE_CODE (TREE_TYPE (t)) != ARRAY_TYPE)
  	    {
! 	      error_at (OMP_CLAUSE_LOCATION (c),
! 			"%qs variable is neither a pointer nor an array",
! 			omp_clause_code_name[OMP_CLAUSE_CODE (c)]);
! 	      remove = true;
  	    }
  	  goto check_dup_generic;
  
  	case OMP_CLAUSE_NOWAIT:
  	  if (copyprivate_seen)
  	    {
--- 14763,14794 ----
  	case OMP_CLAUSE_IS_DEVICE_PTR:
  	case OMP_CLAUSE_USE_DEVICE_PTR:
  	  t = OMP_CLAUSE_DECL (c);
! 	  if (TREE_CODE (TREE_TYPE (t)) != POINTER_TYPE)
  	    {
! 	      if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_USE_DEVICE_PTR
! 		  && ort == C_ORT_OMP)
! 		{
! 		  error_at (OMP_CLAUSE_LOCATION (c),
! 			    "%qs variable is not a pointer",
! 			    omp_clause_code_name[OMP_CLAUSE_CODE (c)]);
! 		  remove = true;
! 		}
! 	      else if (TREE_CODE (TREE_TYPE (t)) != ARRAY_TYPE)
! 		{
! 		  error_at (OMP_CLAUSE_LOCATION (c),
! 			    "%qs variable is neither a pointer nor an array",
! 			    omp_clause_code_name[OMP_CLAUSE_CODE (c)]);
! 		  remove = true;
! 		}
  	    }
  	  goto check_dup_generic;
  
+ 	case OMP_CLAUSE_USE_DEVICE_ADDR:
+ 	  t = OMP_CLAUSE_DECL (c);
+ 	  if (VAR_P (t) || TREE_CODE (t) == PARM_DECL)
+ 	    c_mark_addressable (t);
+ 	  goto check_dup_generic;
+ 
  	case OMP_CLAUSE_NOWAIT:
  	  if (copyprivate_seen)
  	    {
*************** c_finish_omp_clauses (tree clauses, enum
*** 14621,14626 ****
--- 14802,14826 ----
  	  pc = &OMP_CLAUSE_CHAIN (c);
  	  continue;
  
+ 	case OMP_CLAUSE_ORDER:
+ 	  if (ordered_clause)
+ 	    {
+ 	      error_at (OMP_CLAUSE_LOCATION (c),
+ 			"%<order%> clause must not be used together "
+ 			"with %<ordered%>");
+ 	      remove = true;
+ 	      break;
+ 	    }
+ 	  else if (order_clause)
+ 	    {
+ 	      /* Silently remove duplicates.  */
+ 	      remove = true;
+ 	      break;
+ 	    }
+ 	  order_clause = pc;
+ 	  pc = &OMP_CLAUSE_CHAIN (c);
+ 	  continue;
+ 
  	case OMP_CLAUSE_IF:
  	case OMP_CLAUSE_NUM_THREADS:
  	case OMP_CLAUSE_NUM_TEAMS:
*************** c_finish_omp_clauses (tree clauses, enum
*** 14637,14642 ****
--- 14837,14843 ----
  	case OMP_CLAUSE_SECTIONS:
  	case OMP_CLAUSE_TASKGROUP:
  	case OMP_CLAUSE_PROC_BIND:
+ 	case OMP_CLAUSE_DEVICE_TYPE:
  	case OMP_CLAUSE_PRIORITY:
  	case OMP_CLAUSE_GRAINSIZE:
  	case OMP_CLAUSE_NUM_TASKS:
*************** c_finish_omp_clauses (tree clauses, enum
*** 14644,14649 ****
--- 14845,14851 ----
  	case OMP_CLAUSE_SIMD:
  	case OMP_CLAUSE_HINT:
  	case OMP_CLAUSE_DEFAULTMAP:
+ 	case OMP_CLAUSE_BIND:
  	case OMP_CLAUSE_NUM_GANGS:
  	case OMP_CLAUSE_NUM_WORKERS:
  	case OMP_CLAUSE_VECTOR_LENGTH:
*************** c_finish_omp_clauses (tree clauses, enum
*** 14672,14678 ****
  	  continue;
  
  	case OMP_CLAUSE_ORDERED:
! 	  ordered_seen = true;
  	  pc = &OMP_CLAUSE_CHAIN (c);
  	  continue;
  
--- 14874,14888 ----
  	  continue;
  
  	case OMP_CLAUSE_ORDERED:
! 	  ordered_clause = c;
! 	  if (order_clause)
! 	    {
! 	      error_at (OMP_CLAUSE_LOCATION (*order_clause),
! 			"%<order%> clause must not be used together "
! 			"with %<ordered%>");
! 	      *order_clause = OMP_CLAUSE_CHAIN (*order_clause);
! 	      order_clause = NULL;
! 	    }
  	  pc = &OMP_CLAUSE_CHAIN (c);
  	  continue;
  
*************** c_finish_omp_clauses (tree clauses, enum
*** 14699,14704 ****
--- 14909,14928 ----
  	  pc = &OMP_CLAUSE_CHAIN (c);
  	  continue;
  
+ 	case OMP_CLAUSE_INCLUSIVE:
+ 	case OMP_CLAUSE_EXCLUSIVE:
+ 	  need_complete = true;
+ 	  need_implicitly_determined = true;
+ 	  t = OMP_CLAUSE_DECL (c);
+ 	  if (!VAR_P (t) && TREE_CODE (t) != PARM_DECL)
+ 	    {
+ 	      error_at (OMP_CLAUSE_LOCATION (c),
+ 			"%qE is not a variable in clause %qs", t,
+ 			omp_clause_code_name[OMP_CLAUSE_CODE (c)]);
+ 	      remove = true;
+ 	    }
+ 	  break;
+ 
  	default:
  	  gcc_unreachable ();
  	}
*************** c_finish_omp_clauses (tree clauses, enum
*** 14778,14784 ****
  	= OMP_CLAUSE_SAFELEN_EXPR (safelen);
      }
  
!   if (ordered_seen
        && schedule_clause
        && (OMP_CLAUSE_SCHEDULE_KIND (schedule_clause)
  	  & OMP_CLAUSE_SCHEDULE_NONMONOTONIC))
--- 15002,15008 ----
  	= OMP_CLAUSE_SAFELEN_EXPR (safelen);
      }
  
!   if (ordered_clause
        && schedule_clause
        && (OMP_CLAUSE_SCHEDULE_KIND (schedule_clause)
  	  & OMP_CLAUSE_SCHEDULE_NONMONOTONIC))
*************** c_finish_omp_clauses (tree clauses, enum
*** 14792,14798 ****
  	   & ~OMP_CLAUSE_SCHEDULE_NONMONOTONIC);
      }
  
!   if (linear_variable_step_check)
      for (pc = &clauses, c = clauses; c ; c = *pc)
        {
  	bool remove = false;
--- 15016,15038 ----
  	   & ~OMP_CLAUSE_SCHEDULE_NONMONOTONIC);
      }
  
!   if (reduction_seen < 0 && ordered_clause)
!     {
!       error_at (OMP_CLAUSE_LOCATION (ordered_clause),
! 		"%qs clause specified together with %<inscan%> "
! 		"%<reduction%> clause", "ordered");
!       reduction_seen = -2;
!     }
! 
!   if (reduction_seen < 0 && schedule_clause)
!     {
!       error_at (OMP_CLAUSE_LOCATION (schedule_clause),
! 		"%qs clause specified together with %<inscan%> "
! 		"%<reduction%> clause", "schedule");
!       reduction_seen = -2;
!     }
! 
!   if (linear_variable_step_check || reduction_seen == -2)
      for (pc = &clauses, c = clauses; c ; c = *pc)
        {
  	bool remove = false;
*************** c_finish_omp_clauses (tree clauses, enum
*** 14807,14812 ****
--- 15047,15054 ----
  		      OMP_CLAUSE_LINEAR_STEP (c));
  	    remove = true;
  	  }
+ 	else if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_REDUCTION)
+ 	  OMP_CLAUSE_REDUCTION_INSCAN (c) = 0;
  
  	if (remove)
  	  *pc = OMP_CLAUSE_CHAIN (c);
*************** c_build_qualified_type (tree type, int t
*** 14965,14971 ****
  		   : build_qualified_type (type, type_quals));
    /* A variant type does not inherit the list of incomplete vars from the
       type main variant.  */
!   if (RECORD_OR_UNION_TYPE_P (var_type)
        && TYPE_MAIN_VARIANT (var_type) != var_type)
      C_TYPE_INCOMPLETE_VARS (var_type) = 0;
    return var_type;
--- 15207,15214 ----
  		   : build_qualified_type (type, type_quals));
    /* A variant type does not inherit the list of incomplete vars from the
       type main variant.  */
!   if ((RECORD_OR_UNION_TYPE_P (var_type)
!        || TREE_CODE (var_type) == ENUMERAL_TYPE)
        && TYPE_MAIN_VARIANT (var_type) != var_type)
      C_TYPE_INCOMPLETE_VARS (var_type) = 0;
    return var_type;
diff -Nrcpad gcc-9.3.0/gcc/c/config-lang.in gcc-10.1.0/gcc/c/config-lang.in
*** gcc-9.3.0/gcc/c/config-lang.in	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/config-lang.in	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  # Top level configure fragment for GNU C - C language.
! # Copyright (C) 1994-2019 Free Software Foundation, Inc.
  
  #This file is part of GCC.
  
--- 1,5 ----
  # Top level configure fragment for GNU C - C language.
! # Copyright (C) 1994-2020 Free Software Foundation, Inc.
  
  #This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c/gccspec.c gcc-10.1.0/gcc/c/gccspec.c
*** gcc-9.3.0/gcc/c/gccspec.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/gccspec.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Specific flags and argument handling of the C front-end.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Specific flags and argument handling of the C front-end.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c/gimple-parser.c gcc-10.1.0/gcc/c/gimple-parser.c
*** gcc-9.3.0/gcc/c/gimple-parser.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/gimple-parser.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Parser for GIMPLE.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Parser for GIMPLE.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 67,74 ****
  
  /* GIMPLE parser state.  */
  
! struct gimple_parser
  {
    gimple_parser (c_parser *p) : parser (p), edges(), current_bb(NULL) {}
    /* c_parser is not visible here, use composition and fake inheritance
       via a conversion operator.  */
--- 67,75 ----
  
  /* GIMPLE parser state.  */
  
! class gimple_parser
  {
+ public:
    gimple_parser (c_parser *p) : parser (p), edges(), current_bb(NULL) {}
    /* c_parser is not visible here, use composition and fake inheritance
       via a conversion operator.  */
*************** struct gimple_parser
*** 76,100 ****
    c_parser *parser;
  
    /* CFG build state.  */
!   struct gimple_parser_edge
    {
      int src;
      int dest;
      int flags;
    };
    auto_vec<gimple_parser_edge> edges;
    basic_block current_bb;
  
!   void push_edge (int, int, int);
  };
  
  void
! gimple_parser::push_edge (int src, int dest, int flags)
  {
    gimple_parser_edge e;
    e.src = src;
    e.dest = dest;
    e.flags = flags;
    edges.safe_push (e);
  }
  
--- 77,105 ----
    c_parser *parser;
  
    /* CFG build state.  */
!   class gimple_parser_edge
    {
+   public:
      int src;
      int dest;
      int flags;
+     profile_probability probability;
    };
    auto_vec<gimple_parser_edge> edges;
    basic_block current_bb;
  
!   void push_edge (int, int, int, profile_probability);
  };
  
  void
! gimple_parser::push_edge (int src, int dest, int flags,
! 			  profile_probability prob)
  {
    gimple_parser_edge e;
    e.src = src;
    e.dest = dest;
    e.flags = flags;
+   e.probability = prob;
    edges.safe_push (e);
  }
  
*************** static struct c_expr c_parser_gimple_pos
*** 111,116 ****
--- 116,122 ----
  static void c_parser_gimple_declaration (gimple_parser &);
  static void c_parser_gimple_goto_stmt (gimple_parser &, location_t,
  				       tree, gimple_seq *);
+ static void c_parser_gimple_try_stmt (gimple_parser &, gimple_seq *);
  static void c_parser_gimple_if_stmt (gimple_parser &, gimple_seq *);
  static void c_parser_gimple_switch_stmt (gimple_parser &, gimple_seq *);
  static void c_parser_gimple_return_stmt (gimple_parser &, gimple_seq *);
*************** static void c_parser_gimple_expr_list (g
*** 120,126 ****
  
  
  /* See if VAL is an identifier matching __BB<num> and return <num>
!    in *INDEX.  Return true if so.  */
  
  static bool
  c_parser_gimple_parse_bb_spec (tree val, int *index)
--- 126,132 ----
  
  
  /* See if VAL is an identifier matching __BB<num> and return <num>
!    in *INDEX.  */
  
  static bool
  c_parser_gimple_parse_bb_spec (tree val, int *index)
*************** c_parser_gimple_parse_bb_spec (tree val,
*** 134,144 ****
    return *index > 0;
  }
  
  /* Parse the body of a function declaration marked with "__GIMPLE".  */
  
  void
  c_parser_parse_gimple_body (c_parser *cparser, char *gimple_pass,
! 			    enum c_declspec_il cdil)
  {
    gimple_parser parser (cparser);
    gimple_seq seq = NULL;
--- 140,217 ----
    return *index > 0;
  }
  
+ /* See if VAL is an identifier matching __BB<num> and return <num>
+    in *INDEX.  Return true if so and parse also FREQUENCY of
+    the edge.  */
+ 
+ 
+ static bool
+ c_parser_gimple_parse_bb_spec_edge_probability (tree val,
+ 						gimple_parser &parser,
+ 						int *index,
+ 						profile_probability
+ 						*probability)
+ {
+   bool return_p = c_parser_gimple_parse_bb_spec (val, index);
+   if (return_p)
+     {
+       *probability = profile_probability::uninitialized ();
+       /* Parse frequency if provided.  */
+       if (c_parser_next_token_is (parser, CPP_OPEN_PAREN))
+ 	{
+ 	  tree f;
+ 	  c_parser_consume_token (parser);
+ 	  if (!c_parser_next_token_is (parser, CPP_NAME))
+ 	    {
+ 	      c_parser_error (parser, "expected frequency quality");
+ 	      return false;
+ 	    }
+ 
+ 	  profile_quality quality;
+ 	  const char *v
+ 	    = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value);
+ 	  if (!parse_profile_quality (v, &quality))
+ 	    {
+ 	      c_parser_error (parser, "unknown profile quality");
+ 	      return false;
+ 	    }
+ 
+ 	  c_parser_consume_token (parser);
+ 	  if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>"))
+ 	    return false;
+ 
+ 	  if (!c_parser_next_token_is (parser, CPP_NUMBER)
+ 	      || (TREE_CODE (f = c_parser_peek_token (parser)->value)
+ 		  != INTEGER_CST))
+ 	    {
+ 	      c_parser_error (parser, "expected frequency value");
+ 	      return false;
+ 	    }
+ 
+ 	  unsigned int value = TREE_INT_CST_LOW (f);
+ 	  *probability = profile_probability (value, quality);
+ 
+ 	  c_parser_consume_token (parser);
+ 	  if (!c_parser_require (parser, CPP_CLOSE_PAREN, "expected %<)%>"))
+ 	    return false;
+ 
+ 	  if (!c_parser_require (parser, CPP_CLOSE_PAREN, "expected %<)%>"))
+ 	    return false;
+ 	}
+ 
+       return true;
+     }
+ 
+   return false;
+ 
+ }
+ 
  /* Parse the body of a function declaration marked with "__GIMPLE".  */
  
  void
  c_parser_parse_gimple_body (c_parser *cparser, char *gimple_pass,
! 			    enum c_declspec_il cdil,
! 			    profile_count entry_bb_count)
  {
    gimple_parser parser (cparser);
    gimple_seq seq = NULL;
*************** c_parser_parse_gimple_body (c_parser *cp
*** 162,167 ****
--- 235,241 ----
        /* We have at least cdil_gimple_cfg.  */
        gimple_register_cfg_hooks ();
        init_empty_tree_cfg ();
+       parser.current_bb = ENTRY_BLOCK_PTR_FOR_FN (cfun);
        /* Initialize the bare loop structure - we are going to only
           mark headers and leave the rest to fixup.  */
        set_loops_for_fn (cfun, ggc_cleared_alloc<struct loops> ());
*************** c_parser_parse_gimple_body (c_parser *cp
*** 209,217 ****
  	  add_local_decl (cfun, var);
        /* We have a CFG.  Build the edges.  */
        for (unsigned i = 0; i < parser.edges.length (); ++i)
! 	make_edge (BASIC_BLOCK_FOR_FN (cfun, parser.edges[i].src),
! 		   BASIC_BLOCK_FOR_FN (cfun, parser.edges[i].dest),
! 		   parser.edges[i].flags);
        /* Add edges for case labels.  */
        basic_block bb;
        FOR_EACH_BB_FN (bb, cfun)
--- 283,294 ----
  	  add_local_decl (cfun, var);
        /* We have a CFG.  Build the edges.  */
        for (unsigned i = 0; i < parser.edges.length (); ++i)
! 	{
! 	  edge e = make_edge (BASIC_BLOCK_FOR_FN (cfun, parser.edges[i].src),
! 			      BASIC_BLOCK_FOR_FN (cfun, parser.edges[i].dest),
! 			      parser.edges[i].flags);
! 	  e->probability = parser.edges[i].probability;
! 	}
        /* Add edges for case labels.  */
        basic_block bb;
        FOR_EACH_BB_FN (bb, cfun)
*************** c_parser_parse_gimple_body (c_parser *cp
*** 251,257 ****
  		      add_phi_arg (phi, gimple_call_arg (stmt, i + 1), e,
  				   UNKNOWN_LOCATION);
  		  }
! 		gsi_remove (&gsi, false);
  	      }
  	  /* Fill SSA name gaps, putting them on the freelist.  */
  	  for (unsigned i = 1; i < num_ssa_names; ++i)
--- 328,334 ----
  		      add_phi_arg (phi, gimple_call_arg (stmt, i + 1), e,
  				   UNKNOWN_LOCATION);
  		  }
! 		gsi_remove (&gsi, true);
  	      }
  	  /* Fill SSA name gaps, putting them on the freelist.  */
  	  for (unsigned i = 1; i < num_ssa_names; ++i)
*************** c_parser_parse_gimple_body (c_parser *cp
*** 274,279 ****
--- 351,365 ----
        fix_loop_structure (NULL);
      }
  
+   if (cfun->curr_properties & PROP_cfg)
+     {
+       ENTRY_BLOCK_PTR_FOR_FN (cfun)->count = entry_bb_count;
+       gcov_type t = param_gimple_fe_computed_hot_bb_threshold;
+       set_hot_bb_threshold (t);
+       update_max_bb_count ();
+       cgraph_node::get_create (cfun->decl);
+       cgraph_edge::rebuild_edges ();
+     }
    dump_function (TDI_gimple, current_function_decl);
  }
  
*************** c_parser_gimple_compound_statement (gimp
*** 325,330 ****
--- 411,419 ----
  	case CPP_KEYWORD:
  	  switch (c_parser_peek_token (parser)->keyword)
  	    {
+ 	    case RID_AT_TRY:
+ 	      c_parser_gimple_try_stmt (parser, seq);
+ 	      break;
  	    case RID_IF:
  	      c_parser_gimple_if_stmt (parser, seq);
  	      break;
*************** c_parser_gimple_compound_statement (gimp
*** 337,347 ****
  		c_parser_consume_token (parser);
  		if (c_parser_next_token_is (parser, CPP_NAME))
  		  {
! 		    c_parser_gimple_goto_stmt (parser, loc,
! 					       c_parser_peek_token
! 					       (parser)->value,
! 					       seq);
  		    c_parser_consume_token (parser);
  		    if (! c_parser_require (parser, CPP_SEMICOLON,
  					    "expected %<;%>"))
  		      return return_p;
--- 426,434 ----
  		c_parser_consume_token (parser);
  		if (c_parser_next_token_is (parser, CPP_NAME))
  		  {
! 		    tree label = c_parser_peek_token (parser)->value;
  		    c_parser_consume_token (parser);
+ 		    c_parser_gimple_goto_stmt (parser, loc, label, seq);
  		    if (! c_parser_require (parser, CPP_SEMICOLON,
  					    "expected %<;%>"))
  		      return return_p;
*************** c_parser_gimple_compound_statement (gimp
*** 355,361 ****
  				      "expected %<;%>"))
  		return return_p;
  	      if (cfun->curr_properties & PROP_cfg)
! 		parser.push_edge (parser.current_bb->index, EXIT_BLOCK, 0);
  	      break;
  	    default:
  	      goto expr_stmt;
--- 442,449 ----
  				      "expected %<;%>"))
  		return return_p;
  	      if (cfun->curr_properties & PROP_cfg)
! 		parser.push_edge (parser.current_bb->index, EXIT_BLOCK, 0,
! 				  profile_probability::uninitialized ());
  	      break;
  	    default:
  	      goto expr_stmt;
*************** c_parser_gimple_compound_statement (gimp
*** 367,372 ****
--- 455,468 ----
  	      c_parser_gimple_label (parser, seq);
  	      break;
  	    }
+ 	  if (c_parser_next_token_is (parser, CPP_NAME)
+ 	      && c_parser_peek_token (parser)->id_kind == C_ID_ID
+ 	      && strcmp (IDENTIFIER_POINTER (c_parser_peek_token (parser)->value),
+ 			 "try") == 0)
+ 	    {
+ 	      c_parser_gimple_try_stmt (parser, seq);
+ 	      break;
+ 	    }
  	  /* Basic block specification.
  	     __BB (index, ...)  */
  	  if ((cfun->curr_properties & PROP_cfg)
*************** c_parser_gimple_compound_statement (gimp
*** 397,402 ****
--- 493,499 ----
  		  return return_p;
  		}
  	      int is_loop_header_of = -1;
+ 	      profile_count bb_count = profile_count::uninitialized ();
  	      c_parser_consume_token (parser);
  	      while (c_parser_next_token_is (parser, CPP_COMMA))
  		{
*************** c_parser_gimple_compound_statement (gimp
*** 430,439 ****
  					      "expected %<)%>"))
  			return return_p;
  		    }
  		  else
  		    {
! 		      c_parser_error (parser, "unknown block specifier");
! 		      return return_p;
  		    }
  		}
  	      if (! c_parser_require (parser, CPP_CLOSE_PAREN,
--- 527,565 ----
  					      "expected %<)%>"))
  			return return_p;
  		    }
+ 		  /* Parse profile: quality(value) */
  		  else
  		    {
! 		      tree q;
! 		      profile_quality quality;
! 		      tree v = c_parser_peek_token (parser)->value;
! 		      if (!parse_profile_quality (IDENTIFIER_POINTER (v),
! 						  &quality))
! 			{
! 			  c_parser_error (parser, "unknown block specifier");
! 			  return false;
! 			}
! 
! 		      c_parser_consume_token (parser);
! 		      if (!c_parser_require (parser, CPP_OPEN_PAREN,
! 					     "expected %<(%>"))
! 			return false;
! 
! 		      if (!c_parser_next_token_is (parser, CPP_NUMBER)
! 			  || (TREE_CODE (q = c_parser_peek_token (parser)->value)
! 			      != INTEGER_CST))
! 			{
! 			  c_parser_error (parser, "expected count value");
! 			  return false;
! 			}
! 
! 		      bb_count
! 			= profile_count::from_gcov_type (TREE_INT_CST_LOW (q),
! 							 quality);
! 		      c_parser_consume_token (parser);
! 		      if (! c_parser_require (parser, CPP_CLOSE_PAREN,
! 					      "expected %<)%>"))
! 			return return_p;
  		    }
  		}
  	      if (! c_parser_require (parser, CPP_CLOSE_PAREN,
*************** c_parser_gimple_compound_statement (gimp
*** 469,479 ****
  	      if (last_basic_block_for_fn (cfun) <= index)
  		last_basic_block_for_fn (cfun) = index + 1;
  	      n_basic_blocks_for_fn (cfun)++;
! 	      if (!parser.current_bb)
! 		parser.push_edge (ENTRY_BLOCK, bb->index, EDGE_FALLTHRU);
  
  	      /* We leave the proper setting to fixup.  */
! 	      struct loop *loop_father = loops_for_fn (cfun)->tree_root;
  	      /* If the new block is a loop header, allocate a loop
  		 struct.  Fixup will take care of proper placement within
  		 the loop tree.  */
--- 595,606 ----
  	      if (last_basic_block_for_fn (cfun) <= index)
  		last_basic_block_for_fn (cfun) = index + 1;
  	      n_basic_blocks_for_fn (cfun)++;
! 	      if (parser.current_bb->index == ENTRY_BLOCK)
! 		parser.push_edge (ENTRY_BLOCK, bb->index, EDGE_FALLTHRU,
! 				  profile_probability::always ());
  
  	      /* We leave the proper setting to fixup.  */
! 	      class loop *loop_father = loops_for_fn (cfun)->tree_root;
  	      /* If the new block is a loop header, allocate a loop
  		 struct.  Fixup will take care of proper placement within
  		 the loop tree.  */
*************** c_parser_gimple_compound_statement (gimp
*** 486,492 ****
  		    }
  		  else
  		    {
! 		      struct loop *loop = alloc_loop ();
  		      loop->num = is_loop_header_of;
  		      loop->header = bb;
  		      vec_safe_grow_cleared (loops_for_fn (cfun)->larray,
--- 613,619 ----
  		    }
  		  else
  		    {
! 		      class loop *loop = alloc_loop ();
  		      loop->num = is_loop_header_of;
  		      loop->header = bb;
  		      vec_safe_grow_cleared (loops_for_fn (cfun)->larray,
*************** c_parser_gimple_compound_statement (gimp
*** 498,503 ****
--- 625,631 ----
  		  loop_father = get_loop (cfun, is_loop_header_of);
  		}
  	      bb->loop_father = loop_father;
+ 	      bb->count = bb_count;
  
  	      /* Stmts now go to the new block.  */
  	      parser.current_bb = bb;
*************** c_parser_gimple_statement (gimple_parser
*** 613,626 ****
  	  && rhs.value != error_mark_node)
  	{
  	  enum tree_code code = NOP_EXPR;
! 	  if (VECTOR_TYPE_P (TREE_TYPE (lhs.value)))
! 	    {
! 	      code = VIEW_CONVERT_EXPR;
! 	      rhs.value = build1 (VIEW_CONVERT_EXPR,
! 				  TREE_TYPE (lhs.value), rhs.value);
! 	    }
! 	  else if (FLOAT_TYPE_P (TREE_TYPE (lhs.value))
! 		   && ! FLOAT_TYPE_P (TREE_TYPE (rhs.value)))
  	    code = FLOAT_EXPR;
  	  else if (! FLOAT_TYPE_P (TREE_TYPE (lhs.value))
  		   && FLOAT_TYPE_P (TREE_TYPE (rhs.value)))
--- 741,748 ----
  	  && rhs.value != error_mark_node)
  	{
  	  enum tree_code code = NOP_EXPR;
! 	  if (FLOAT_TYPE_P (TREE_TYPE (lhs.value))
! 	      && ! FLOAT_TYPE_P (TREE_TYPE (rhs.value)))
  	    code = FLOAT_EXPR;
  	  else if (! FLOAT_TYPE_P (TREE_TYPE (lhs.value))
  		   && FLOAT_TYPE_P (TREE_TYPE (rhs.value)))
*************** c_parser_gimple_statement (gimple_parser
*** 639,645 ****
        {
  	tree id = c_parser_peek_token (parser)->value;
  	if (strcmp (IDENTIFIER_POINTER (id), "__ABS") == 0
! 	    || strcmp (IDENTIFIER_POINTER (id), "__ABSU") == 0)
  	  goto build_unary_expr;
  	break;
        }
--- 761,771 ----
        {
  	tree id = c_parser_peek_token (parser)->value;
  	if (strcmp (IDENTIFIER_POINTER (id), "__ABS") == 0
! 	    || strcmp (IDENTIFIER_POINTER (id), "__ABSU") == 0
! 	    || strcmp (IDENTIFIER_POINTER (id), "__MIN") == 0
! 	    || strcmp (IDENTIFIER_POINTER (id), "__MAX") == 0
! 	    || strcmp (IDENTIFIER_POINTER (id), "__BIT_INSERT") == 0
! 	    || strcmp (IDENTIFIER_POINTER (id), "__VEC_PERM") == 0)
  	  goto build_unary_expr;
  	break;
        }
*************** c_parser_gimple_binary_expression (gimpl
*** 878,883 ****
--- 1004,1067 ----
    return ret;
  }
  
+ /* Parse a gimple parentized binary expression.  */
+ 
+ static c_expr
+ c_parser_gimple_parentized_binary_expression (gimple_parser &parser,
+ 					      location_t op_loc,
+ 					      tree_code code)
+ {
+   struct c_expr ret;
+   ret.set_error ();
+ 
+   c_parser_consume_token (parser);
+   if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>"))
+     return ret;
+   c_expr op1 = c_parser_gimple_postfix_expression (parser);
+   if (!c_parser_require (parser, CPP_COMMA, "expected %<,%>"))
+     return ret;
+   c_expr op2 = c_parser_gimple_postfix_expression (parser);
+   if (!c_parser_require (parser, CPP_CLOSE_PAREN, "expected %<)%>"))
+     return ret;
+ 
+   if (op1.value != error_mark_node && op2.value != error_mark_node)
+     ret.value = build2_loc (op_loc,
+ 			    code, TREE_TYPE (op1.value), op1.value, op2.value);
+   return ret;
+ }
+ 
+ /* Parse a gimple parentized binary expression.  */
+ 
+ static c_expr
+ c_parser_gimple_parentized_ternary_expression (gimple_parser &parser,
+ 					       location_t op_loc,
+ 					       tree_code code)
+ {
+   struct c_expr ret;
+   ret.set_error ();
+ 
+   c_parser_consume_token (parser);
+   if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>"))
+     return ret;
+   c_expr op1 = c_parser_gimple_postfix_expression (parser);
+   if (!c_parser_require (parser, CPP_COMMA, "expected %<,%>"))
+     return ret;
+   c_expr op2 = c_parser_gimple_postfix_expression (parser);
+   if (!c_parser_require (parser, CPP_COMMA, "expected %<)%>"))
+     return ret;
+   c_expr op3 = c_parser_gimple_postfix_expression (parser);
+   if (!c_parser_require (parser, CPP_CLOSE_PAREN, "expected %<)%>"))
+     return ret;
+ 
+   if (op1.value != error_mark_node
+       && op2.value != error_mark_node
+       && op3.value != error_mark_node)
+     ret.value = build3_loc (op_loc,
+ 			    code, TREE_TYPE (op1.value),
+ 			    op1.value, op2.value, op3.value);
+   return ret;
+ }
+ 
  /* Parse gimple unary expression.
  
     gimple-unary-expression:
*************** c_parser_gimple_unary_expression (gimple
*** 967,972 ****
--- 1151,1198 ----
  	      op = c_parser_gimple_postfix_expression (parser);
  	      return parser_build_unary_op (op_loc, ABSU_EXPR, op);
  	    }
+ 	  else if (strcmp (IDENTIFIER_POINTER (id), "__MIN") == 0)
+ 	    return c_parser_gimple_parentized_binary_expression (parser,
+ 								 op_loc,
+ 								 MIN_EXPR);
+ 	  else if (strcmp (IDENTIFIER_POINTER (id), "__MAX") == 0)
+ 	    return c_parser_gimple_parentized_binary_expression (parser,
+ 								 op_loc,
+ 								 MAX_EXPR);
+ 	  else if (strcmp (IDENTIFIER_POINTER (id), "__VEC_PERM") == 0)
+ 	    return c_parser_gimple_parentized_ternary_expression
+ 			(parser, op_loc, VEC_PERM_EXPR);
+ 	  else if (strcmp (IDENTIFIER_POINTER (id), "__BIT_INSERT") == 0)
+ 	    {
+ 	      /* __BIT_INSERT '(' postfix-expression, postfix-expression,
+ 			          integer ')'  */
+ 	      location_t loc = c_parser_peek_token (parser)->location;
+ 	      c_parser_consume_token (parser);
+ 	      if (c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>"))
+ 		{
+ 		  c_expr op0 = c_parser_gimple_postfix_expression (parser);
+ 		  c_parser_skip_until_found (parser, CPP_COMMA,
+ 					     "expected %<,%>");
+ 		  c_expr op1 = c_parser_gimple_postfix_expression (parser);
+ 		  c_parser_skip_until_found (parser, CPP_COMMA,
+ 					     "expected %<,%>");
+ 		  c_expr op2 = c_parser_gimple_postfix_expression (parser);
+ 		  if (TREE_CODE (op2.value) != INTEGER_CST
+ 		      || !int_fits_type_p (op2.value, bitsizetype))
+ 		    c_parser_error (parser, "expected constant offset");
+ 		  c_parser_skip_until_found (parser, CPP_CLOSE_PAREN,
+ 					     "expected %<)%>");
+ 		  if (op0.value != error_mark_node
+ 		      && op1.value != error_mark_node
+ 		      && TREE_CODE (op2.value) == INTEGER_CST)
+ 		    ret.value = build3_loc (loc, BIT_INSERT_EXPR,
+ 					    TREE_TYPE (op0.value),
+ 					    op0.value, op1.value,
+ 					    fold_convert (bitsizetype,
+ 							  op2.value));
+ 		}
+ 	      return ret;
+ 	    }
  	  else
  	    return c_parser_gimple_postfix_expression (parser);
  	}
*************** c_parser_gimple_call_internal (gimple_pa
*** 1100,1105 ****
--- 1326,1361 ----
    return expr;
  }
  
+ /* Parse '<' type [',' alignment] '>' and return a type on success
+    and NULL_TREE on error.  */
+ 
+ static tree
+ c_parser_gimple_typespec (gimple_parser &parser)
+ {
+   struct c_type_name *type_name = NULL;
+   tree alignment = NULL_TREE;
+   if (c_parser_require (parser, CPP_LESS, "expected %<<%>"))
+     {
+       type_name = c_parser_type_name (parser);
+       /* Optional alignment.  */
+       if (c_parser_next_token_is (parser, CPP_COMMA))
+ 	{
+ 	  c_parser_consume_token (parser);
+ 	  alignment
+ 	      = c_parser_gimple_postfix_expression (parser).value;
+ 	}
+       c_parser_skip_until_found (parser,
+ 				 CPP_GREATER, "expected %<>%>");
+     }
+   if (!type_name)
+     return NULL_TREE;
+   tree tem;
+   tree type = groktypename (type_name, &tem, NULL);
+   if (alignment)
+     type = build_aligned_type (type, tree_to_uhwi (alignment));
+   return type;
+ }
+ 
  /* Parse gimple postfix expression.
  
     gimple-postfix-expression:
*************** c_parser_gimple_postfix_expression (gimp
*** 1140,1145 ****
--- 1396,1402 ----
      case CPP_CHAR:
      case CPP_CHAR16:
      case CPP_CHAR32:
+     case CPP_UTF8CHAR:
      case CPP_WCHAR:
        expr.value = c_parser_peek_token (parser)->value;
        set_c_expr_source_range (&expr, tok_range);
*************** c_parser_gimple_postfix_expression (gimp
*** 1150,1159 ****
      case CPP_STRING32:
      case CPP_WSTRING:
      case CPP_UTF8STRING:
!       expr.value = c_parser_peek_token (parser)->value;
!       set_c_expr_source_range (&expr, tok_range);
!       expr.original_code = STRING_CST;
!       c_parser_consume_token (parser);
        break;
      case CPP_DOT:
        expr = c_parser_gimple_call_internal (parser);
--- 1407,1413 ----
      case CPP_STRING32:
      case CPP_WSTRING:
      case CPP_UTF8STRING:
!       expr = c_parser_string_literal (parser, false, true);
        break;
      case CPP_DOT:
        expr = c_parser_gimple_call_internal (parser);
*************** c_parser_gimple_postfix_expression (gimp
*** 1169,1189 ****
  		           [ '+' number ] ')'  */
  	      location_t loc = c_parser_peek_token (parser)->location;
  	      c_parser_consume_token (parser);
! 	      struct c_type_name *type_name = NULL;
! 	      tree alignment = NULL_TREE;
! 	      if (c_parser_require (parser, CPP_LESS, "expected %<<%>"))
! 	        {
! 		  type_name = c_parser_type_name (parser);
! 		  /* Optional alignment.  */
! 		  if (c_parser_next_token_is (parser, CPP_COMMA))
! 		    {
! 		      c_parser_consume_token (parser);
! 		      alignment
! 			= c_parser_gimple_postfix_expression (parser).value;
! 		    }
! 		  c_parser_skip_until_found (parser,
! 					     CPP_GREATER, "expected %<>%>");
! 		}
  	      struct c_expr ptr;
  	      ptr.value = error_mark_node;
  	      tree alias_off = NULL_TREE;
--- 1423,1429 ----
  		           [ '+' number ] ')'  */
  	      location_t loc = c_parser_peek_token (parser)->location;
  	      c_parser_consume_token (parser);
! 	      tree type = c_parser_gimple_typespec (parser);
  	      struct c_expr ptr;
  	      ptr.value = error_mark_node;
  	      tree alias_off = NULL_TREE;
*************** c_parser_gimple_postfix_expression (gimp
*** 1231,1249 ****
  		  c_parser_skip_until_found (parser, CPP_CLOSE_PAREN,
  					     "expected %<)%>");
  		}
! 	      if (! type_name || c_parser_error (parser))
  		{
  		  c_parser_set_error (parser, false);
  		  return expr;
  		}
- 	      tree tem = NULL_TREE;
- 	      tree type = groktypename (type_name, &tem, NULL);
- 	      if (alignment)
- 		type = build_aligned_type (type, tree_to_uhwi (alignment));
  	      expr.value = build2_loc (loc, MEM_REF,
  				       type, ptr.value, alias_off);
  	      break;
  	    }
  	  else if (strcmp (IDENTIFIER_POINTER (id), "_Literal") == 0)
  	    {
  	      /* _Literal '(' type-name ')' ( [ '-' ] constant | constructor ) */
--- 1471,1540 ----
  		  c_parser_skip_until_found (parser, CPP_CLOSE_PAREN,
  					     "expected %<)%>");
  		}
! 	      if (! type || c_parser_error (parser))
  		{
  		  c_parser_set_error (parser, false);
  		  return expr;
  		}
  	      expr.value = build2_loc (loc, MEM_REF,
  				       type, ptr.value, alias_off);
  	      break;
  	    }
+ 	  else if (strcmp (IDENTIFIER_POINTER (id), "__VIEW_CONVERT") == 0)
+ 	    {
+ 	      /* __VIEW_CONVERT '<' type-name [ ',' number ] '>'
+ 	                        '(' postfix-expression ')'  */
+ 	      location_t loc = c_parser_peek_token (parser)->location;
+ 	      c_parser_consume_token (parser);
+ 	      tree type = c_parser_gimple_typespec (parser);
+ 	      if (c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>"))
+ 		{
+ 		  c_expr op = c_parser_gimple_postfix_expression (parser);
+ 		  c_parser_skip_until_found (parser, CPP_CLOSE_PAREN,
+ 					     "expected %<)%>");
+ 		  if (type && op.value != error_mark_node)
+ 		    expr.value = build1_loc (loc, VIEW_CONVERT_EXPR,
+ 					     type, op.value);
+ 		}
+ 	      break;
+ 	    }
+ 	  else if (strcmp (IDENTIFIER_POINTER (id), "__BIT_FIELD_REF") == 0)
+ 	    {
+ 	      /* __BIT_FIELD_REF '<' type-name [ ',' number ] '>'
+ 	                        '(' postfix-expression, integer, integer ')'  */
+ 	      location_t loc = c_parser_peek_token (parser)->location;
+ 	      c_parser_consume_token (parser);
+ 	      tree type = c_parser_gimple_typespec (parser);
+ 	      if (c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>"))
+ 		{
+ 		  c_expr op0 = c_parser_gimple_postfix_expression (parser);
+ 		  c_parser_skip_until_found (parser, CPP_COMMA,
+ 					     "expected %<,%>");
+ 		  c_expr op1 = c_parser_gimple_postfix_expression (parser);
+ 		  if (TREE_CODE (op1.value) != INTEGER_CST
+ 		      || !int_fits_type_p (op1.value, bitsizetype))
+ 		    c_parser_error (parser, "expected constant size");
+ 		  c_parser_skip_until_found (parser, CPP_COMMA,
+ 					     "expected %<,%>");
+ 		  c_expr op2 = c_parser_gimple_postfix_expression (parser);
+ 		  if (TREE_CODE (op2.value) != INTEGER_CST
+ 		      || !int_fits_type_p (op2.value, bitsizetype))
+ 		    c_parser_error (parser, "expected constant offset");
+ 		  c_parser_skip_until_found (parser, CPP_CLOSE_PAREN,
+ 					     "expected %<)%>");
+ 		  if (type
+ 		      && op0.value != error_mark_node
+ 		      && TREE_CODE (op1.value) == INTEGER_CST
+ 		      && TREE_CODE (op2.value) == INTEGER_CST)
+ 		    expr.value = build3_loc (loc, BIT_FIELD_REF, type,
+ 					     op0.value,
+ 					     fold_convert (bitsizetype,
+ 							   op1.value),
+ 					     fold_convert (bitsizetype,
+ 							   op2.value));
+ 		}
+ 	      break;
+ 	    }
  	  else if (strcmp (IDENTIFIER_POINTER (id), "_Literal") == 0)
  	    {
  	      /* _Literal '(' type-name ')' ( [ '-' ] constant | constructor ) */
*************** c_parser_gimple_postfix_expression (gimp
*** 1320,1336 ****
  		}
  	      else
  		{
! 		  bool neg_p;
  		  if ((neg_p = c_parser_next_token_is (parser, CPP_MINUS)))
  		    c_parser_consume_token (parser);
  		  tree val = c_parser_gimple_postfix_expression (parser).value;
  		  if (! val
  		      || val == error_mark_node
! 		      || ! CONSTANT_CLASS_P (val))
  		    {
  		      c_parser_error (parser, "invalid _Literal");
  		      return expr;
  		    }
  		  if (neg_p)
  		    {
  		      val = const_unop (NEGATE_EXPR, TREE_TYPE (val), val);
--- 1611,1634 ----
  		}
  	      else
  		{
! 		  bool neg_p, addr_p;
  		  if ((neg_p = c_parser_next_token_is (parser, CPP_MINUS)))
  		    c_parser_consume_token (parser);
+ 		  if ((addr_p = c_parser_next_token_is (parser, CPP_AND)))
+ 		    c_parser_consume_token (parser);
  		  tree val = c_parser_gimple_postfix_expression (parser).value;
  		  if (! val
  		      || val == error_mark_node
! 		      || (!CONSTANT_CLASS_P (val)
! 			  && !(addr_p
! 			       && (TREE_CODE (val) == STRING_CST
! 				   || DECL_P (val)))))
  		    {
  		      c_parser_error (parser, "invalid _Literal");
  		      return expr;
  		    }
+ 		  if (addr_p)
+ 		    val = build1 (ADDR_EXPR, type, val);
  		  if (neg_p)
  		    {
  		      val = const_unop (NEGATE_EXPR, TREE_TYPE (val), val);
*************** c_parser_gimple_or_rtl_pass_list (c_pars
*** 1609,1616 ****
--- 1907,1916 ----
      return;
    c_parser_consume_token (parser);
  
+   specs->entry_bb_count = profile_count::uninitialized ();
    while (c_parser_next_token_is (parser, CPP_NAME))
      {
+       profile_quality quality;
        const char *op = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value);
        c_parser_consume_token (parser);
        if (! strcmp (op, "startwith"))
*************** c_parser_gimple_or_rtl_pass_list (c_pars
*** 1624,1634 ****
  	      return;
  	    }
  	  pass = xstrdup (TREE_STRING_POINTER
! 				(c_parser_peek_token (parser)->value));
! 	  c_parser_consume_token (parser);
  	  if (! c_parser_require (parser, CPP_CLOSE_PAREN, "expected %<(%>"))
  	    return;
  	}
        else if (specs->declspec_il != cdil_gimple)
  	/* Allow only one IL specifier and none on RTL.  */
  	;
--- 1924,1954 ----
  	      return;
  	    }
  	  pass = xstrdup (TREE_STRING_POINTER
! 			  (c_parser_string_literal (parser, false,
! 						    false).value));
  	  if (! c_parser_require (parser, CPP_CLOSE_PAREN, "expected %<(%>"))
  	    return;
  	}
+       else if (parse_profile_quality (op, &quality))
+ 	{
+ 	  tree q;
+ 	  if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>"))
+ 	    return;
+ 
+ 	  if (!c_parser_next_token_is (parser, CPP_NUMBER)
+ 	      || (TREE_CODE (q = c_parser_peek_token (parser)->value)
+ 		  != INTEGER_CST))
+ 	    {
+ 	      c_parser_error (parser, "expected count value");
+ 	      return;
+ 	    }
+ 
+ 	  specs->entry_bb_count
+ 	    = profile_count::from_gcov_type (TREE_INT_CST_LOW (q), quality);
+ 	  c_parser_consume_token (parser);
+ 	  if (!c_parser_require (parser, CPP_CLOSE_PAREN, "expected %<)%>"))
+ 	    return;
+ 	}
        else if (specs->declspec_il != cdil_gimple)
  	/* Allow only one IL specifier and none on RTL.  */
  	;
*************** c_parser_gimple_declaration (gimple_pars
*** 1696,1702 ****
    struct c_declarator *declarator;
    struct c_declspecs *specs = build_null_declspecs ();
    c_parser_declspecs (parser, specs, true, true, true,
! 		      true, true, cla_nonabstract_decl);
    finish_declspecs (specs);
  
    /* Provide better error recovery.  Note that a type name here is usually
--- 2016,2022 ----
    struct c_declarator *declarator;
    struct c_declspecs *specs = build_null_declspecs ();
    c_parser_declspecs (parser, specs, true, true, true,
! 		      true, true, true, true, cla_nonabstract_decl);
    finish_declspecs (specs);
  
    /* Provide better error recovery.  Note that a type name here is usually
*************** c_parser_gimple_declaration (gimple_pars
*** 1721,1733 ****
        unsigned version, ver_offset;
        if (declarator->kind == cdk_id
  	  && is_gimple_reg_type (specs->type)
! 	  && c_parser_parse_ssa_name_id (declarator->u.id,
  					 &version, &ver_offset)
  	  /* The following restricts it to unnamed anonymous SSA names
  	     which fails parsing of named ones in dumps (we could
  	     decide to not dump their name for -gimple).  */
  	  && ver_offset == 0)
! 	c_parser_parse_ssa_name (parser, declarator->u.id, specs->type,
  				 version, ver_offset);
        else
  	{
--- 2041,2053 ----
        unsigned version, ver_offset;
        if (declarator->kind == cdk_id
  	  && is_gimple_reg_type (specs->type)
! 	  && c_parser_parse_ssa_name_id (declarator->u.id.id,
  					 &version, &ver_offset)
  	  /* The following restricts it to unnamed anonymous SSA names
  	     which fails parsing of named ones in dumps (we could
  	     decide to not dump their name for -gimple).  */
  	  && ver_offset == 0)
! 	c_parser_parse_ssa_name (parser, declarator->u.id.id, specs->type,
  				 version, ver_offset);
        else
  	{
*************** c_parser_gimple_goto_stmt (gimple_parser
*** 1757,1766 ****
    if (cfun->curr_properties & PROP_cfg)
      {
        int dest_index;
!       if (c_parser_gimple_parse_bb_spec (label, &dest_index))
  	{
  	  parser.push_edge (parser.current_bb->index, dest_index,
! 			    EDGE_FALLTHRU);
  	  return;
  	}
      }
--- 2077,2088 ----
    if (cfun->curr_properties & PROP_cfg)
      {
        int dest_index;
!       profile_probability prob;
!       if (c_parser_gimple_parse_bb_spec_edge_probability (label, parser,
! 							  &dest_index, &prob))
  	{
  	  parser.push_edge (parser.current_bb->index, dest_index,
! 			    EDGE_FALLTHRU, prob);
  	  return;
  	}
      }
*************** c_parser_gimple_paren_condition (gimple_
*** 1783,1788 ****
--- 2105,2159 ----
    return cond;
  }
  
+ /* Parse gimple try statement.
+ 
+    try-statement:
+      try { ... } finally { ... }
+      try { ... } finally { ... } else { ... }
+ 
+    This could support try/catch as well, but it's not implemented yet.
+  */
+ 
+ static void
+ c_parser_gimple_try_stmt (gimple_parser &parser, gimple_seq *seq)
+ {
+   gimple_seq tryseq = NULL;
+   c_parser_consume_token (parser);
+   c_parser_gimple_compound_statement (parser, &tryseq);
+ 
+   if ((c_parser_next_token_is (parser, CPP_KEYWORD)
+        && c_parser_peek_token (parser)->keyword == RID_AT_FINALLY)
+       || (c_parser_next_token_is (parser, CPP_NAME)
+ 	  && c_parser_peek_token (parser)->id_kind == C_ID_ID
+ 	  && strcmp (IDENTIFIER_POINTER (c_parser_peek_token (parser)->value),
+ 		     "finally") == 0))
+     {
+       gimple_seq finseq = NULL;
+       c_parser_consume_token (parser);
+       c_parser_gimple_compound_statement (parser, &finseq);
+ 
+       if (c_parser_next_token_is (parser, CPP_KEYWORD)
+ 	  && c_parser_peek_token (parser)->keyword == RID_ELSE)
+ 	{
+ 	  gimple_seq elsseq = NULL;
+ 	  c_parser_consume_token (parser);
+ 	  c_parser_gimple_compound_statement (parser, &elsseq);
+ 
+ 	  geh_else *stmt = gimple_build_eh_else (finseq, elsseq);
+ 	  finseq = NULL;
+ 	  gimple_seq_add_stmt_without_update (&finseq, stmt);
+ 	}
+ 
+       gtry *stmt = gimple_build_try (tryseq, finseq, GIMPLE_TRY_FINALLY);
+       gimple_seq_add_stmt_without_update (seq, stmt);
+     }
+   else if (c_parser_next_token_is (parser, CPP_KEYWORD)
+       && c_parser_peek_token (parser)->keyword == RID_AT_CATCH)
+     c_parser_error (parser, "%<catch%> is not supported");
+   else
+     c_parser_error (parser, "expected %<finally%> or %<catch%>");
+ }
+ 
  /* Parse gimple if-else statement.
  
     if-statement:
*************** c_parser_gimple_if_stmt (gimple_parser &
*** 1811,1820 ****
        label = c_parser_peek_token (parser)->value;
        c_parser_consume_token (parser);
        int dest_index;
        if ((cfun->curr_properties & PROP_cfg)
! 	  && c_parser_gimple_parse_bb_spec (label, &dest_index))
  	parser.push_edge (parser.current_bb->index, dest_index,
! 			  EDGE_TRUE_VALUE);
        else
  	t_label = lookup_label_for_goto (loc, label);
        if (! c_parser_require (parser, CPP_SEMICOLON, "expected %<;%>"))
--- 2182,2193 ----
        label = c_parser_peek_token (parser)->value;
        c_parser_consume_token (parser);
        int dest_index;
+       profile_probability prob;
        if ((cfun->curr_properties & PROP_cfg)
! 	  && c_parser_gimple_parse_bb_spec_edge_probability (label, parser,
! 							     &dest_index, &prob))
  	parser.push_edge (parser.current_bb->index, dest_index,
! 			  EDGE_TRUE_VALUE, prob);
        else
  	t_label = lookup_label_for_goto (loc, label);
        if (! c_parser_require (parser, CPP_SEMICOLON, "expected %<;%>"))
*************** c_parser_gimple_if_stmt (gimple_parser &
*** 1844,1857 ****
  	  return;
  	}
        label = c_parser_peek_token (parser)->value;
        int dest_index;
        if ((cfun->curr_properties & PROP_cfg)
! 	  && c_parser_gimple_parse_bb_spec (label, &dest_index))
  	parser.push_edge (parser.current_bb->index, dest_index,
! 			  EDGE_FALSE_VALUE);
        else
  	f_label = lookup_label_for_goto (loc, label);
-       c_parser_consume_token (parser);
        if (! c_parser_require (parser, CPP_SEMICOLON, "expected %<;%>"))
  	return;
      }
--- 2217,2232 ----
  	  return;
  	}
        label = c_parser_peek_token (parser)->value;
+       c_parser_consume_token (parser);
        int dest_index;
+       profile_probability prob;
        if ((cfun->curr_properties & PROP_cfg)
! 	  && c_parser_gimple_parse_bb_spec_edge_probability (label, parser,
! 							     &dest_index, &prob))
  	parser.push_edge (parser.current_bb->index, dest_index,
! 			  EDGE_FALSE_VALUE, prob);
        else
  	f_label = lookup_label_for_goto (loc, label);
        if (! c_parser_require (parser, CPP_SEMICOLON, "expected %<;%>"))
  	return;
      }
diff -Nrcpad gcc-9.3.0/gcc/c/gimple-parser.h gcc-10.1.0/gcc/c/gimple-parser.h
*** gcc-9.3.0/gcc/c/gimple-parser.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c/gimple-parser.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Declarations for the parser for GIMPLE.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Declarations for the parser for GIMPLE.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 22,28 ****
  
  /* Gimple parsing functions.  */
  extern void c_parser_parse_gimple_body (c_parser *, char *,
! 					enum c_declspec_il);
  extern void c_parser_gimple_or_rtl_pass_list (c_parser *, c_declspecs *);
  
  #endif
--- 22,29 ----
  
  /* Gimple parsing functions.  */
  extern void c_parser_parse_gimple_body (c_parser *, char *,
! 					enum c_declspec_il,
! 					profile_count);
  extern void c_parser_gimple_or_rtl_pass_list (c_parser *, c_declspecs *);
  
  #endif
diff -Nrcpad gcc-9.3.0/gcc/c-family/ChangeLog gcc-10.1.0/gcc/c-family/ChangeLog
*** gcc-9.3.0/gcc/c-family/ChangeLog	Thu Mar 12 11:08:03 2020
--- gcc-10.1.0/gcc/c-family/ChangeLog	Thu May  7 10:50:32 2020
***************
*** 1,22 ****
! 2020-03-12  Release Manager
  
! 	* GCC 9.3.0 released.
  
  2020-01-29  Jason Merrill  <jason@redhat.com>
  
  	PR c++/89357
  	* c-attribs.c (check_cxx_fundamental_alignment_constraints): Remove.
  
! 2019-12-20  Jakub Jelinek  <jakub@redhat.com>
  
! 	Backported from mainline
! 	2019-11-26  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c++/61414
  	* c-attribs.c (handle_mode_attribute): Add mode attribute to
  	ENUMERAL_TYPEs.
  
! 	2019-11-22  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c/90677
  	* c-common.h (identifier_global_tag): Declare.
--- 1,315 ----
! 2020-05-07  Release Manager
  
! 	* GCC 10.1.0 released.
! 
! 2020-04-29  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-format.c (PP_FORMAT_CHAR_TABLE): Add %{ and %}.
! 
! 2020-04-27  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c/94755
! 	* c-common.c (resolve_overloaded_builtin): Return error_mark_node for
! 	fncode == BUILT_IN_NONE before initialization of first_param.
! 
! 2020-04-23  Marek Polacek  <polacek@redhat.com>
! 
! 	PR c++/94733
! 	* c-attribs.c (find_tm_attribute): Use get_attribute_name instead of
! 	TREE_PURPOSE.
! 
! 2020-04-14  Patrick Palka  <ppalka@redhat.com>
! 
! 	PR c++/85278
! 	* c-pretty-print.c (pp_c_pointer) <case REFERENCE_TYPE>: Print a double
! 	ampersand if it's an rvalue reference type.
! 
! 2020-04-13  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c/92326
! 	* c-pretty-print.c (c_pretty_printer::direct_abstract_declarator): Avoid
! 	printing array bound for flexible array members.
! 
! 2020-04-13  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	* c-cppbuiltin.c (c_cpp_builtins): Update coroutines builtin
! 	define, per n4861.
! 
! 2020-04-02  Richard Biener  <rguenther@suse.de>
! 
! 	PR c/94392
! 	* c-opts.c (c_common_post_options): Enable -ffinite-loops
! 	for -O2 and C++11 or newer.
! 
! 2020-03-28  Patrick Palka  <ppalka@redhat.com>
! 
! 	* c.opt: Add -fconcepts-diagnostics-depth.
! 
! 2020-03-27  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c++/94346
! 	* c-attribs.c (handle_copy_attribute): Avoid passing expressions
! 	to decl_attributes.  Make handling of different kinds of entities
! 	more robust.
! 
! 2020-03-27  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c++/94098
! 	* c-attribs.c (handle_access_attribute): Avoid setting TYPE_ATTRIBUTES
! 	here.
! 
! 2020-03-23  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c++/91993
! 	* c-warn.c (warnings_for_convert_and_check): For expr and/or
! 	result being COMPOUND_EXPRs, skip to ultimate rhs.
! 
! 2020-03-20  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	PR middle-end/94072
! 	* c-common.c (c_common_type_for_mode): Before using a registered
! 	built-in type, check that the vectorness of the type matches
! 	the vectorness of the mode.
! 
! 2020-03-17  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-common.c (resolve_overloaded_builtin): Fix up duplicated word
! 	issue in a diagnostic message.
! 
! 2020-03-15  Lewis Hyatt  <lhyatt@gmail.com>
! 
! 	* c.opt: Avoid redundancy in the help text.
! 
! 2020-03-02  Marek Polacek  <polacek@redhat.com>
! 
! 	PR c++/93958 - add missing -std=gnu++20.
! 	* c.opt: Add -std=gnu++20.
! 
! 2020-03-01  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c++/92721
! 	* c-attribs.c (append_access_attrs): Correctly handle attribute.
! 	(handle_access_attribute): Same.
! 
! 2020-02-25  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c/93858
! 	* c-pragma.c (handle_pragma_diagnostic): Add missing ? after
! 	"did you mean" hint in diagnostics.
! 
! 2020-02-15  Jason Merrill  <jason@redhat.com>
! 
! 	* c.opt: Add -std=c++20.
! 
! 2020-02-14  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* c-ada-spec.c: Include bitmap.h.
! 	(dump_ada_double_name): Rename into...
! 	(dump_anonymous_type_name): ...this.  Always use the TYPE_UID.
! 	(dump_ada_array_type): Adjust to above renaming.  Robustify.
! 	(dump_nested_types_1): New function copied from...  Add dumped_types
! 	parameter and pass it down to dump_nested_type.
! 	(dump_nested_types): ...this.  Remove parent parameter.  Just call
! 	dump_nested_types_1 on an automatic bitmap.
! 	(dump_nested_type): Add dumped_types parameter.
! 	<ARRAY_TYPE>: Do not dump it if already present in dumped_types.
! 	Adjust recursive calls and adjust to above renaming.
! 	(dump_ada_declaration): Adjust call to dump_nested_types.
! 	Tidy up and adjust to above renaming.
! 	(dump_ada_specs): Initialize and release bitmap obstack.
! 
! 2020-02-10  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c/93640
! 	* c-attribs.c (handle_access_attribute): Correct off-by-one mistakes.
! 
! 2020-02-10  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR other/93641
! 	* c-format.c (check_plain): Fix up last argument of strncasecmp.
! 	Remove useless extra test.
! 
! 2020-02-03  Julian Brown  <julian@codesourcery.com>
! 	    Tobias Burnus  <tobias@codesourcery.com>
! 
! 	* c-cppbuiltin.c (c_cpp_builtins): Update _OPENACC define to 201711.
  
  2020-01-29  Jason Merrill  <jason@redhat.com>
  
  	PR c++/89357
  	* c-attribs.c (check_cxx_fundamental_alignment_constraints): Remove.
  
! 2020-01-23  Jason Merrill  <jason@redhat.com>
  
! 	* c-warn.c (conversion_warning): Change -Wsign-conversion handling.
! 
! 2020-01-23  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c/84919
! 	* c-common.c (check_function_arguments): Avoid overlap checking
! 	of sprintf functions.
! 
! 2020-01-22  Jason Merrill  <jason@redhat.com>
! 
! 	PR testsuite/93391 - PR 40752 test fails with unsigned plain char.
! 	PR c++/40752
! 	* c-warn.c (conversion_warning): Check operands only after checking
! 	the whole expression.  Don't check second operand of + for sign.
! 
! 2020-01-21  Jason Merrill  <jason@redhat.com>
! 	    Manuel López-Ibáñez  <manu@gcc.gnu.org>
! 
! 	PR c++/40752 - useless -Wconversion with short +=.
! 	* c.opt (-Warith-conversion): New.
! 	* c-warn.c (conversion_warning): Recurse for operands of
! 	operators.  Only warn about the whole expression with
! 	-Warith-conversion.
! 
! 2020-01-21  Jason Merrill  <jason@redhat.com>
! 
! 	* c-common.c (unsafe_conversion_p): Don't warn, return UNSAFE_SIGN.
! 	* c-warn.c (conversion_warning): Warn about UNSAFE_SIGN.
! 
! 2020-01-20  Nathan Sidwell  <nathan@acm.org>
! 
! 	PR preprocessor/80005
! 	* c-cppbuiltins.c (c_cpp_builtins): Don't define __has_include{,_next}.
! 
! 2020-01-18  Iain Sandoe  <iain@sandoe.co.uk>
! 
! 	* c-common.c (co_await, co_yield, co_return): New.
! 	* c-common.h (RID_CO_AWAIT, RID_CO_YIELD,
! 	RID_CO_RETURN): New enumeration values.
! 	(D_CXX_COROUTINES): Bit to identify coroutines are active.
! 	(D_CXX_COROUTINES_FLAGS): Guard for coroutine keywords.
! 	* c-cppbuiltin.c (__cpp_coroutines): New cpp define.
! 	* c.opt (fcoroutines): New command-line switch.
! 
! 2020-01-10  David Malcolm  <dmalcolm@redhat.com>
! 
! 	* c-format.c (local_event_ptr_node): New.
! 	(PP_FORMAT_CHAR_TABLE): Add entry for "%@".
! 	(init_dynamic_diag_info): Initialize local_event_ptr_node.
! 	* c-format.h (T_EVENT_PTR): New define.
! 
! 2020-01-10  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c/93132
! 	* c-attribs.c (append_access_attrs): Validate against the translated
! 	access string rather than the human-readable representation.
! 
! 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
! 
! 	Update copyright years.
! 
! 2019-12-20  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* c-ada-spec.h (decl_sloc): Delete.
! 	* c-ada-spec.c (decl_sloc): Make static.
! 
! 2019-12-19  Julian Brown  <julian@codesourcery.com>
! 
! 	* c-common.h (c_omp_map_clause_name): Add prototype.
! 	* c-omp.c (c_omp_map_clause_name): New function.
! 	* c-pragma.h (pragma_omp_clause): Add PRAGMA_OACC_CLAUSE_ATTACH and
! 	PRAGMA_OACC_CLAUSE_DETACH.
! 
! 2019-12-19  Julian Brown  <julian@codesourcery.com>
! 	    Maciej W. Rozycki  <macro@codesourcery.com>
! 	    Tobias Burnus  <tobias@codesourcery.com>
! 	    Thomas Schwinge  <thomas@codesourcery.com>
! 
! 	* c-pragma.h (pragma_omp_clause): Add
! 	PRAGMA_OACC_CLAUSE_NO_CREATE.
! 
! 2019-12-17  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c++/61339
! 	* c.opt (-Wmismatched-tags, -Wredundant-tags): New options.
! 
! 2019-12-11  David Malcolm  <dmalcolm@redhat.com>
! 
! 	* c-pretty-print.c (c_pretty_printer::clone): New vfunc
! 	implementation.
! 	* c-pretty-print.h (c_pretty_printer::clone): New vfunc decl.
! 
! 2019-12-09  David Malcolm  <dmalcolm@redhat.com>
! 
! 	* c-format.c (range_label_for_format_type_mismatch::get_text):
! 	Replace label_text ctor called with true with label_text::take.
! 
! 2019-12-09  David Malcolm  <dmalcolm@redhat.com>
! 
! 	* c-format.c (selftest::test_type_mismatch_range_labels): Remove
! 	initial newline from expected outputs.
! 	* c-opts.c (c_diagnostic_finalizer): Add pp_newline call before
! 	call to diagnostic_show_locus.
! 
! 2019-12-06  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-cppbuiltin.c (c_cpp_builtins): Don't define __cpp_consteval for
! 	now.
! 
! 2019-12-05  Marek Polacek  <polacek@redhat.com>
! 	    Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c++/91353 - P1331R2: Allow trivial default init in constexpr contexts.
! 	* c-cppbuiltin.c (c_cpp_builtins): Adjust the value of __cpp_constexpr.
! 
! 2019-12-05  Marek Polacek  <polacek@redhat.com>
! 
! 	PR c++/92271 - make __is_same alias for __is_same_as.
! 	* c-common.c: Add __is_same, an alias for __is_same_as.
! 
! 2019-12-03  Marek Polacek  <polacek@redhat.com>
! 
! 	PR c++/91363 - P0960R3: Parenthesized initialization of aggregates.
! 	* c-cppbuiltin.c (c_cpp_builtins): Predefine
! 	__cpp_aggregate_paren_init=201902 for -std=c++2a.
! 
! 2019-11-30  Jan Hubicka  <hubicka@ucw.cz>
! 
! 	* c-attribs.c (handle_symver_attribute): New function
! 	(c_common_attributes): Add symver.
! 
! 2019-11-30  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* c-common.c (pointer_int_sum): Use verify_type_context to check
! 	whether the target allows pointer arithmetic for the types involved.
! 	(c_sizeof_or_alignof_type, c_alignof_expr): Use verify_type_context
! 	to check whether the target allows sizeof and alignof operations
! 	for the types involved.
! 
! 2019-11-27  Jason Merrill  <jason@redhat.com>
! 
! 	* c-cppbuiltin.c (c_cpp_builtins): Update __cpp_deduction_guides.
! 
! 2019-11-26  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c++/61414
  	* c-attribs.c (handle_mode_attribute): Add mode attribute to
  	ENUMERAL_TYPEs.
  
! 2019-11-25  Joseph Myers  <joseph@codesourcery.com>
! 
! 	PR c/91985
! 	* c-common.c (c_common_type_for_mode): Handle decimal
! 	floating-point types being NULL_TREE.
! 	* c-format.c (get_format_for_type_1): Handle specified types being
! 	NULL_TREE.
! 	* c-lex.c (interpret_float): Give an error for decimal
! 	floating-point constants when decimal floating-point not
! 	supported.
! 
! 2019-11-23  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR middle-end/83859
! 	* c-attribs.c (append_access_attrs): Avoid buffer overflow.  Avoid
! 	memory leak.  Use XNEWVEC macro.  Use auto_diagnostic_group to
! 	group warning with inform together.
! 	(handle_access_attribute): Formatting fix.
! 
! 2019-11-22  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c/90677
  	* c-common.h (identifier_global_tag): Declare.
***************
*** 26,31 ****
--- 319,384 ----
  	(init_dynamic_diag_info): Adjust get_pointer_to_named_type callers
  	to call get_named_type instead.  Formatting fixes.
  
+ 	Implement P1902R1, Missing feature-test macros 2017-2019.
+ 	* c-cppbuiltin.c (c_cpp_builtins): Bump __cpp_init_captures
+ 	and __cpp_generic_lambdas for -std=c++2a.  Define
+ 	__cpp_designated_initializers, __cpp_constexpr_in_decltype and
+ 	__cpp_consteval for -std=c++2a.  Remove a FIXME comment about
+ 	__cpp_concepts for -std=c++2a.
+ 
+ 2019-11-22  Martin Sebor  <msebor@redhat.com>
+ 
+ 	PR middle-end/83859
+ 	* c-attribs.c (handle_access_attribute): New function.
+ 	(c_common_attribute_table): Add new attribute.
+ 	(get_argument_type): New function.
+ 	(append_access_attrs): New function.
+ 	(get_nonnull_operand): Rename...
+ 	(get_attribute_operand): ...to this.
+ 	* c-common.c (get_nonnull_operand): Rename...
+ 	(get_attribute_operand): ...to this.
+ 
+ 2019-11-21  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* c-attribs.c (handle_fallthrough_attribute): Use pedwarn instead
+ 	of warning.
+ 
+ 2019-11-19  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* c-common.c (attribute_fallthrough_p): In C, use pedwarn not
+ 	warning for standard attributes mixed with fallthrough attributes.
+ 
+ 2019-11-15  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* c-attribs.c (handle_fallthrough_attribute): Remove static.
+ 	* c-common.h (handle_fallthrough_attribute): Declare.
+ 
+ 2019-11-15  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* c-attribs.c (handle_deprecated_attribute): Remove static.
+ 	* c-common.h (handle_deprecated_attribute): Declare.
+ 
+ 2019-11-14  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* c-lex.c (lex_charconst): Make CPP_UTF8CHAR constants unsigned
+ 	char for C.
+ 
+ 2019-11-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* c-omp.c (c_omp_check_context_selector): Add nvidia to the list of
+ 	valid vendors.
+ 
+ 	* c-omp.c (c_omp_check_context_selector): Handle name lists
+ 	containing string literals.  Don't diagnose atomic_default_mem_order
+ 	with multiple props.
+ 
+ 2019-11-13  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	* c-cppbuiltin.c (builtin_define_float_constants): Also define
+ 	NORM_MAX constants.  Update call to get_max_float.
+ 	(LAZY_HEX_FP_VALUES_CNT): Update value to include NORM_MAX
+ 	constants.
+ 
  2019-11-13  Eric Botcazou  <ebotcazou@adacore.com>
  
  	* c-ada-spec.c (get_underlying_decl): Do not look through typedefs.
***************
*** 33,48 ****
  	(dump_nested_type) <ARRAY_TYPE>: Do not generate a nested declaration
  	of the component type if it is declared in another file.
  
! 2019-10-21  Jakub Jelinek  <jakub@redhat.com>
  
! 	Backported from mainline
! 	2019-10-01  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c++/91925
  	* c-warn.c (check_alignment_of_packed_member): Ignore FIELD_DECLs
  	with NULL DECL_FIELD_OFFSET.
  
! 	2019-09-27  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c++/88203
  	* c-common.h (c_omp_predefined_variable): Declare.
--- 386,593 ----
  	(dump_nested_type) <ARRAY_TYPE>: Do not generate a nested declaration
  	of the component type if it is declared in another file.
  
! 2019-11-12  Martin Liska  <mliska@suse.cz>
  
! 	* c-opts.c (c_common_post_options):
! 	Use SET_OPTION_IF_UNSET.
! 
! 2019-11-12  Maciej W. Rozycki  <macro@codesourcery.com>
! 	    Frederik Harwath  <frederik@codesourcery.com>
! 
! 	gcc/c-family/
! 	* c-pragma.h (pragma_kind): Add PRAGMA_OACC_SERIAL enumeration
! 	constant.
! 	* c-pragma.c (oacc_pragmas): Add "serial" entry.
! 
! 2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* c-common.h (gnu_vector_type_p): New function.
! 	* c-common.c (c_build_vec_perm_expr): Require __builtin_shuffle
! 	vectors to satisfy gnu_vector_type_p.
! 	(c_build_vec_convert): Likewise __builtin_convertvector.
! 	(convert_vector_to_array_for_subscript): Likewise when applying
! 	implicit vector to array conversion.
! 	(scalar_to_vector): Likewise when converting vector-scalar
! 	operations to vector-vector operations.
! 
! 2019-11-08  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c.opt (Wold-style-definition): Initialize to -1.
! 	* c-opts.c (c_common_post_options): Set warn_old_style_definition
! 	to flag_isoc2x if not set explicitly.
! 
! 2019-11-07  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-attribs.c (parse_tm_stmt_attr): Handle scoped attributes.
! 
! 2019-11-05  Jason Merrill  <jason@redhat.com>
! 
! 	* c-opts.c (c_common_post_options): -fconcepts-ts implies
! 	-fconcepts.
! 
! 2019-11-04  Kamlesh Kumar  <kamleshbhalui@gmail.com>
! 
! 	* c-opts.c (c_common_post_options): Update
! 	latest_abi_version.
! 
! 2019-11-02  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-common.h (c_omp_get_context_selector): Remove.
! 	* c-omp.c (c_omp_get_context_selector): Moved to omp-general.c
! 	and renamed to omp_get_context_selector.
! 
! 	* c-omp.c (c_omp_mark_declare_variant): Use
! 	omp_context_selector_set_compare.
! 
! 	PR c++/88335 - Implement P1073R3: Immediate functions
! 	* c-common.h (enum rid): Add RID_CONSTEVAL.
! 	* c-common.c (c_common_reswords): Add consteval.
! 
! 2019-11-01  Martin Sebor  <msebor@redhat.com>
! 
! 	PR middle-end/91679
! 	PR middle-end/91647
! 	PR middle-end/91463
! 	PR middle-end/92312
! 	* c-pretty-print.c (direct_abstract_declarator): Print
! 	bound in zero-length arrays.
! 	* c.opt (-Wzero-length-bounds): New option.
! 
! 2019-10-30  Nathan Sidwell  <nathan@acm.org>
! 
! 	* c-cppbuiltin.c (c_cpp_builtins): Add 'L' suffix to feature
! 	macros.
! 
! 2019-10-28  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c/66970
! 	* c-common.c (c_common_nodes_and_builtins): Call c_define_builtins
! 	even when only preprocessing.
! 	* c-common.h (names_builtin_p): Declare new function.
! 	* c-lex.c (init_c_lex): Set has_builtin.
! 	(c_common_has_builtin): Define a new function.
! 	* c-ppoutput.c (init_pp_output): Set has_builtin.
! 
! 2019-10-24  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-common.h (c_omp_context_selector_matches): Remove.
! 	* c-omp.c (c_omp_context_selector_matches): Remove.
! 	* c-attribs.c (c_common_attribute_table): Add
! 	"omp declare target {host,nohost,block}" attributes.
! 
! 2019-10-17  JeanHeyd Meneide  <phdofthehouse@gmail.com>
! 
! 	* c-lex.c (c_common_has_attribute): Update nodiscard value.
! 
! 2019-10-14  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* c-common.h (user_facing_original_type_p): Declare.
! 	* c-common.c: Include c-spellcheck.h.
! 	(user_facing_original_type_p): New function.
! 
! 2019-10-12  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-common.h (c_omp_mark_declare_variant,
! 	c_omp_context_selector_matches): Declare.
! 	* c-omp.c: Include attribs.h, gimplify.h, cgraph.h, symbol-summary.h
! 	and hsa-common.h.
! 	(c_omp_get_context_selector): Support second argument NULL.
! 	(c_omp_mark_declare_variant, c_omp_context_selector_matches): New
! 	functions.
! 	* c-attribs.c (c_common_attribute_table): Remove "omp declare variant"
! 	attribute, add "omp declare variant base" and
! 	"omp declare variant variant" attributes.
! 
! 2019-10-11  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c.opt (Wc11-c2x-compat): Add CPP(cpp_warn_c11_c2x_compat)
! 	CppReason(CPP_W_C11_C2X_COMPAT).
! 
! 2019-10-11  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-common.c (c_common_reswords): Do not use D_EXT for _Decimal32,
! 	_Decimal64 and _Decimal128.
! 
! 2019-10-10  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-cppbuiltin.c (c_cpp_builtins): Do not define macros for DFP
! 	types if DFP not supported.
! 
! 2019-10-10  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-common.h (c_omp_check_context_selector,
! 	c_omp_get_context_selector): Declare.
! 	* c-omp.c (c_omp_declare_simd_clauses_to_numbers): Fix spelling
! 	in diagnostic message.
! 	(c_omp_check_context_selector, c_omp_get_context_selector): New
! 	functions.
! 	* c-attribs.c (c_common_attribute_table): Add "omp declare variant"
! 	attribute.
! 	(handle_omp_declare_variant_attribute): New function.
! 
! 2019-10-09  Martin Sebor  <msebor@redhat.com>
! 
! 	PR tree-optimization/90879
! 	* c.opt (-Wstring-compare): New option.
! 
! 2019-10-08  Andrew Sutton  <asutton@lock3software.com>
! 	    Jason Merrill  <jason@redhat.com>
! 
! 	Update the concepts implementation to conform to the C++20
! 	specification, improve compile times, and generally clean up
! 	the implementation.
! 
! 	* c-cppbuiltin.c (c_cpp_builtins): Use new feature test values for
! 	concepts when -std=c++2a. Bump __cpp_concepts to 201907.
! 	* c.opt: Add -Wconcepts-ts.
! 	* c-opts.c (c_common_post_options): Warn when -fconcepts is used
! 	with -std=c++2a. Disable warning for -fconcepts in C++20 mode.
! 	(set_std_cxx2a): Enable concepts by default.
! 
! 2019-10-08  Joseph Myers  <joseph@codesourcery.com>
! 
! 	* c-opts.c (c_common_post_options): Set
! 	-fno-fp-int-builtin-inexact for C2X.
! 
! 2019-10-05  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c++/91369 - Implement P0784R7: constexpr new
! 	* c-cppbuiltin.c (c_cpp_builtins): Predefine
! 	__cpp_constexpr_dynamic_alloc=201907 for -std=c++2a.
! 
! 2019-10-04  Joseph Myers  <joseph@codesourcery.com>
! 
! 	PR c/82752
! 	* c-format.c (C_STD_VER): Handle C2x.
! 	(C_STD_NAME): Likewise.
! 	(strftime_flag_specs): Add 'O' modifier with 'p' flag.
! 	(time_char_table): Use separate entry for 'B' and 'b', with 'O'
! 	modifier allowed and 'p' flag.
! 	* c-format.h (enum format_std_version): Add STD_C2X.
! 	(struct format_char_info): Mention 'p' in comment on flags2.
! 
! 2019-10-01  David Malcolm  <dmalcolm@redhat.com>
! 
! 	* c-opts.c (c_diagnostic_finalizer): Temporarily clear prefix when
! 	calling diagnostic_show_locus, rather than destroying it afterwards.
! 
! 2019-10-01  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c++/91925
  	* c-warn.c (check_alignment_of_packed_member): Ignore FIELD_DECLs
  	with NULL DECL_FIELD_OFFSET.
  
! 2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* c-pretty-print.c (pp_c_specifier_qualifier_list): If a vector type
! 	has a type name, use it in preference to the __vector syntax.
! 
! 2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* c-pretty-print.c (pp_c_parameter_type_list): Avoid printing
! 	two spaces between a comma and "...".
! 
! 2019-09-27  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c++/88203
  	* c-common.h (c_omp_predefined_variable): Declare.
***************
*** 50,118 ****
  	(c_omp_predetermined_sharing): Return OMP_CLAUSE_DEFAULT_SHARED
  	for predefined variables.
  
! 2019-09-02  Martin Liska  <mliska@suse.cz>
  
! 	Backport from mainline
! 	2019-09-02  Martin Liska  <mliska@suse.cz>
  
  	PR c++/91155
  	* c-common.c (fname_as_string): Use cxx_printable_name for
  	__PRETTY_FUNCTION__ same as was used before r265711.
  
! 2019-08-31  Iain Sandoe  <iain@sandoe.co.uk>
  
! 	Backport from mainline
! 	2019-08-23  Iain Sandoe  <iain@sandoe.co.uk>
  
  	PR pch/61250
  	* c-lex.c (c_lex_with_flags):  Don't call
  	c_common_no_more_pch () from here.
  
! 2019-08-12  Release Manager
  
! 	* GCC 9.2.0 released.
  
! 2019-07-15  Martin Liska  <mliska@suse.cz>
  
! 	PR c++/91125
! 	* c-opts.c (c_common_handle_option): Warn the -frepo
! 	will be removed in the future.
  
! 2019-07-14  Jakub Jelinek  <jakub@redhat.com>
  
! 	Backported from mainline
! 	2019-07-13  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c/91149
  	* c-omp.c (c_omp_split_clauses): Fix a pasto in
  	OMP_CLAUSE_REDUCTION_TASK handling.
  
! 2019-06-29  Jakub Jelinek  <jakub@redhat.com>
  
! 	Backported from mainline
! 	2019-06-25  Jakub Jelinek  <jakub@redhat.com>
  
  	PR sanitizer/90954
  	* c-omp.c (c_finish_omp_atomic): Allow tree_invariant_p in addition
  	to SAVE_EXPR in first operand of a COMPOUND_EXPR.
  
! 2019-06-06  Richard Biener  <rguenther@suse.de>
  
! 	Backport from mainline
! 	2019-05-15  Richard Biener  <rguenther@suse.de>
  
  	PR c/90474
  	* c-common.c (c_common_mark_addressable_vec): Also mark
  	a COMPOUND_LITERAL_EXPR_DECL addressable similar to
  	c_mark_addressable.
  
! 2019-05-23  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* c-ada-spec.c (compare_node): Compare the DECL_UIDs as a last resort.
  
! 2019-05-03  Release Manager
  
! 	* GCC 9.1.0 released.
  
  2019-04-19  Jakub Jelinek  <jakub@redhat.com>
  
--- 595,988 ----
  	(c_omp_predetermined_sharing): Return OMP_CLAUSE_DEFAULT_SHARED
  	for predefined variables.
  
! 2019-09-27  Richard Sandiford  <richard.sandiford@arm.com>
  
! 	* c-common.h (build_function_call_vec): Take the original
! 	function decl as an optional final parameter.
! 	(check_builtin_function_arguments): Take the original function decl.
! 	* c-common.c (check_builtin_function_arguments): Likewise.
! 	Handle all built-in functions, not just BUILT_IN_NORMAL ones.
! 	Use targetm.check_builtin_call to check BUILT_IN_MD functions.
! 
! 2019-09-15  Jason Merrill  <jason@redhat.com>
! 
! 	* c-warn.c (warn_logical_operator): Strip location wrappers.  Don't
! 	fold_for_warn in "|| mask" warning.
! 
! 2019-09-10  Martin Liska  <mliska@suse.cz>
! 
! 	* c.opt: Use newly added WarnRemoved.
! 
! 2019-09-09  Martin Liska  <mliska@suse.cz>
! 
! 	* c.opt: Update comment of removed
! 	options that are preserved only for backward
! 	compatibility.
! 
! 2019-09-06  Martin Liska  <mliska@suse.cz>
! 
! 	PR c++/91125
! 	* c-common.c: Remove definition of flag_use_repository.
! 	* c-common.h: Likewise.
! 	* c-opts.c (c_common_handle_option):
! 	Do not handle OPT_frepo option.
! 	* c.opt: Mark the option with Deprecated.
! 
! 2019-09-04  Marek Polacek  <polacek@redhat.com>
! 
! 	* c.opt (fdeduce-init-list): Ignored.
! 
! 2019-09-04  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
! 
! 	PR c/78736
! 	* c.opt (Wenum-conversion): New option.
! 
! 2019-09-03  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
! 
! 	* c-attribs.c (handle_section_attribute): Call the
! 	handle_generic_attribute target hook after performing target
! 	independent processing.
! 	(handle_noinit_attribute): Likewise.
! 
! 2019-09-03  Ian Lance Taylor  <iant@golang.org>
! 
! 	* c-cppbuiltin.c (builtin_define_with_hex_fp_value): Always expand
! 	when using -fgo-dump-spec.
! 
! 2019-09-02  Martin Liska  <mliska@suse.cz>
  
  	PR c++/91155
  	* c-common.c (fname_as_string): Use cxx_printable_name for
  	__PRETTY_FUNCTION__ same as was used before r265711.
  
! 2019-08-28  Marek Polacek  <polacek@redhat.com>
  
! 	Implement P1152R4: Deprecating some uses of volatile.
! 	PR c++/91361
! 	* c-opts.c (c_common_post_options): Enable -Wvolatile by
! 	default for C++2a, unless -Wno-deprecated.
! 	* c.opt (Wvolatile): New warning.
! 
! 2019-08-28  Marek Polacek  <polacek@redhat.com>
! 
! 	PR c++/91360 - Implement C++20 P1143R2: constinit.
! 	* c-common.c (c_common_reswords): Add constinit and __constinit.
! 	(keyword_is_decl_specifier): Handle RID_CONSTINIT.
! 	* c-common.h (enum rid): Add RID_CONSTINIT, RID_FIRST_CXX20, and
! 	RID_LAST_CXX20.
! 	(D_CXX20): Define.
! 	* c-cppbuiltin.c (c_cpp_builtins): Define __cpp_constinit.
! 	* c-format.c (cxx_keywords): Add "constinit".
! 	* c.opt (Wc++2a-compat, Wc++20-compat): New options.
! 
! 2019-08-27  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c++/91415
! 	* c-common.c (verify_tree): For LSHIFT_EXPR, RSHIFT_EXPR,
! 	COMPONENT_REF and ARRAY_REF in cxx_dialect >= cxx17 mode handle it
! 	like COMPOUND_EXPR rather than normal expression.
! 
! 2019-08-23  Iain Sandoe  <iain@sandoe.co.uk>
  
  	PR pch/61250
  	* c-lex.c (c_lex_with_flags):  Don't call
  	c_common_no_more_pch () from here.
  
! 2019-08-23  Jakub Jelinek  <jakub@redhat.com>
  
! 	PR middle-end/91283
! 	* c-common.c (c_ts18661_flt_eval_method): Use flag_excess_precision
! 	instead of flag_excess_precision_cmdline.
! 	* c-cppbuiltin.c (c_cpp_flt_eval_method_iec_559): Likewise.
! 	* c-opts.c (c_common_post_options): Likewise.
  
! 2019-08-22  Martin Sebor  <msebor@redhat.com>
  
! 	PR middle-end/91490
! 	* c-common.c (braced_list_to_string): Add argument and overload.
! 	Handle flexible length arrays and unions.
  
! 2019-08-21  Eric Botcazou  <ebotcazou@adacore.com>
  
! 	* c-ada-spec.c (dump_ada_function_declaration): Be prepared for broken
! 	function declarations where arguments are missing.  Rename variables.
! 
! 2019-08-15  Richard Biener  <rguenther@suse.de>
! 
! 	* c-common.c (c_stddef_cpp_builtins): When the GIMPLE FE is
! 	enabled, define __SIZETYPE__.
! 
! 2019-08-14  Christophe Lyon  <christophe.lyon@linaro.org>
! 
! 	* c-attribs.c (c_common_attribute_table): Add "noinit" entry. Add
! 	exclusion with "section" attribute.
! 	(attr_noinit_exclusions): New table.
! 	(handle_noinit_attribute): New function.
! 
! 2019-08-13  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	PR middle-end/91421
! 	* c-common.c (resolve_overloaded_builtin): Use
! 	copy_decl_built_in_function.
! 
! 2019-08-13  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c/80619
! 	* c-format.c (printf_length_specs): Set FMT_LEN_w for "w".
! 	(asm_fprintf_length_spec): Same.
! 	* c-format.h (format_lengths): Add FMT_LEN_w.
! 
! 2019-08-10  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-pragma.h (enum pragma_omp_clause): Add
! 	PRAGMA_OMP_CLAUSE_DEVICE_TYPE.
! 
! 2019-08-07  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-pragma.h (enum pragma_omp_clause): Add
! 	PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR.  Set PRAGMA_OACC_CLAUSE_USE_DEVICE
! 	equal to PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR instead of being a separate
! 	enumeration value.
! 
! 2019-08-05  Marek Polacek  <polacek@redhat.com>
! 
! 	PR c++/91338 - Implement P1161R3: Deprecate a[b,c].
! 	* c-opts.c (c_common_post_options): Enable -Wcomma-subscript by
! 	default for C++2a, unless -Wno-deprecated.
! 	* c.opt (Wcomma-subscript): New warning.
! 
! 2019-07-20  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-pragma.h (enum pragma_kind): Add PRAGMA_OMP_LOOP.
! 	(enum pragma_omp_clause): Add PRAGMA_OMP_CLAUSE_BIND.
! 	* c-pragma.c (omp_pragmas_simd): Add PRAGMA_OMP_LOOP entry.
! 	* c-common.h (enum c_omp_clause_split): Add C_OMP_CLAUSE_SPLIT_LOOP.
! 	* c-omp.c (c_omp_split_clauses): Add support for 4 new combined
! 	constructs with the loop construct.
! 
! 2019-07-13  Jakub Jelinek  <jakub@redhat.com>
  
  	PR c/91149
  	* c-omp.c (c_omp_split_clauses): Fix a pasto in
  	OMP_CLAUSE_REDUCTION_TASK handling.
  
! 2019-07-12  Jakub Jelinek  <jakub@redhat.com>
  
! 	* c-pragma.h (enum pragma_omp_clause): Add PRAGMA_OMP_CLAUSE_ORDER.
! 	* c-omp.c (c_omp_split_clauses): Handle splitting of OMP_CLAUSE_ORDER.
! 
! 2019-07-09  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c++/61339
! 	* c-opts.c (handle_deferred_opts): Change class-key of PODs to struct
! 	and others to class.
! 	* c-pretty-print.h: Same.
! 
! 2019-07-09  Martin Sebor  <msebor@redhat.com>
! 
! 	PR c++/61339
! 	* c-format.c (check_argument_type): Change class-key from class to
! 	struct and vice versa to match convention and avoid -Wclass-is-pod
! 	and -Wstruct-no-pod.
! 	* c-pretty-print.h: Same.
! 
! 2019-07-03  Martin Liska  <mliska@suse.cz>
! 
! 	* c-common.c (try_to_locate_new_include_insertion_point): Remove
! 	dead assignemts.
! 
! 2019-07-03  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-omp.c (c_omp_split_clauses): Put OMP_CLAUSE_REDUCTION_INSCAN
! 	clauses on OMP_FOR rather than OMP_PARALLEL when OMP_FOR is combined
! 	with OMP_PARALLEL.
! 
! 2019-07-02  qing zhao  <qing.zhao@oracle.com>
! 
! 	PR preprocessor/90581
! 	* c-opts.c (c_common_handle_option): Handle -fmax-include-depth.
! 	* c.opt: Add new option -fmax-include-depth.
! 
! 2019-06-26  Jason Merrill  <jason@redhat.com>
! 
! 	PR c++/55442 - memory-hog with highly recursive constexpr.
! 	* c.opt (fconstexpr-loop-limit): New.
! 
! 2019-06-25  Jakub Jelinek  <jakub@redhat.com>
  
  	PR sanitizer/90954
  	* c-omp.c (c_finish_omp_atomic): Allow tree_invariant_p in addition
  	to SAVE_EXPR in first operand of a COMPOUND_EXPR.
  
! 2019-06-25  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
  
! 	* c-common.c (c_common_nodes_and_builtins): Define
! 	alternate "__intN__" name for "__intN" types.
! 
! 2019-06-24  Jan Hubicka  <jh@suse.cz>
! 
! 	* c-common.c (braced_lists_to_strings): Check that
! 	type is array or integer prior checking string flag.
! 
! 2019-06-21  Matthew Beliveau  <mbelivea@redhat.com>
! 
! 	PR c++/90875 - added -Wswitch-outside-range option
! 	* c.opt (Wswitch-outside-range): Added new option.
! 	* c-warn.c (c_do_switch_warnings): Use OPT_Wswitch-outside-range.
! 
! 2019-06-21  Marek Polacek  <polacek@redhat.com>
! 
! 	PR c++/90953 - ICE with -Wmissing-format-attribute.
! 	* c-common.c (check_function_arguments_recurse): Use
! 	get_attribute_name.
! 	(check_missing_format_attribute): Likewise.
! 
! 2019-06-19  Marek Polacek  <polacek@redhat.com>
! 
! 	PR c++/60364 - noreturn after first decl not diagnosed.
! 	* c-attribs.c (handle_noreturn_attribute): No longer static.
! 	* c-common.h (handle_noreturn_attribute, attr_noreturn_exclusions):
! 	Declare.
! 	* c-format.c (check_function_format): Use get_attribute_name.
! 
! 2019-06-19  Martin Sebor  <msebor@redhat.com>
! 
! 	PR translation/90156
! 	* c-format.c (function_format_info::format_type): Adjust type.
! 	(function_format_info::is_raw): New member.
! 	(decode_format_type): Adjust signature.  Handle "raw" diag attributes.
! 	(decode_format_attr): Adjust call to decode_format_type.
! 	Avoid a redundant call to convert_format_name_to_system_name.
! 	Avoid abbreviating the word "arguments" in a diagnostic.
! 	(format_warning_substr): New function.
! 	(avoid_dollar_number): Quote dollar sign in a diagnostic.
! 	(finish_dollar_format_checking): Same.
! 	(check_format_info): Same.
! 	(struct baltoks_t): New.
! 	(c_opers, c_keywords, cxx_keywords, badwords, contrs): New arrays.
! 	(maybe_diag_unbalanced_tokens, check_tokens, check_plain): New
! 	functions.
! 	(check_format_info_main): Call check_plain.  Use baltoks_t.  Call
! 	maybe_diag_unbalanced_tokens.
! 	(handle_format_attribute): Spell out the word "arguments" in
! 	a diagnostic.
! 
! 2019-06-11  Matthew Beliveau  <mbelivea@redhat.com>
! 
! 	PR c++/90449 - add -Winaccessible-base option.
! 	* c.opt (Winaccessible-base): New option.
! 
! 2019-06-10  Jakub Jelinek  <jakub@redhat.com>
! 
! 	* c-pragma.h (enum pragma_kind): Add PRAGMA_OMP_SCAN.
! 	* c-pragma.c (omp_pragmas_simd): Add #pragma omp scan.
! 	* c-omp.c (c_omp_split_clauses): Diagnose inscan reductions on
! 	combined/composite constructs where it is not allowed.  Copy over
! 	OMP_CLAUSE_REDUCTION_INSCAN.
! 
! 2019-06-05  Martin Sebor  <msebor@redhat.com>
! 
! 	* c-attribs.c (handle_mode_attribute): Adjust quoting and hyphenation.
! 	(handle_alias_ifunc_attribute): Same.
! 	(handle_copy_attribute): Same.
! 	(handle_weakref_attribute): Same.
! 	(handle_nonnull_attribute): Same.
! 	* c-warn.c (warn_for_sign_compare): Same.
! 	(warn_for_restrict): Same.
! 	* c.opt: Same.
! 
! 2019-06-05  Martin Sebor  <msebor@redhat.com>
! 
! 	* c-pragma.c (handle_pragma_weak): Adjust quoting in a diagnostic.
! 	* c.opt (-Wformat-diag): Remove a spurious period.
! 
! 2019-05-29  Jakub Jelinek  <jakub@redhat.com>
! 
! 	PR c/90628
! 	* c-common.c (check_builtin_function_arguments)
! 	<case BUILTIN_*_OVERFLOW>: Diagnose pointer to const qualified integer
! 	as last argument.
! 
! 2019-05-23  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* c-ada-spec.c (compare_node): Compare the DECL_UIDs as a last resort.
! 
! 2019-05-22  Martin Liska  <mliska@suse.cz>
! 
! 	PR lto/90500
! 	* c-attribs.c (handle_copy_attribute): Do not copy
! 	target_clones attribute.
! 
! 2019-05-21  Eric Botcazou  <ebotcazou@adacore.com>
! 
! 	* c-ada-spec.h (enum cpp_operation): Add IS_ASSIGNMENT_OPERATOR.
! 	* c-ada-spec.c (print_assignment_operator): New function.
! 	(dump_ada_declaration) <FUNCTION_DECL>: Call it do dump explicit copy
! 	assignment operators declared as methods and filter out the others.
! 
! 2019-05-17  Thomas Schwinge  <thomas@codesourcery.com>
! 
! 	PR c/89433
! 	* c-attribs.c (c_common_attribute_table): Set min_len to -1 for
! 	"omp declare target".
! 
! 2019-05-16  Martin Sebor  <msebor@redhat.com>
! 
! 	* c-attribs.c (handle_no_sanitize_attribute): Quote identifiers,
! 	keywords, operators, and types in diagnostics.
! 	(handle_scalar_storage_order_attribute): Same.
! 	(handle_mode_attribute): Same.
! 	(handle_visibility_attribute): Same.
! 	(handle_assume_aligned_attribute): Same.
! 	(handle_no_split_stack_attribute): Same.
! 	* c-common.c (shorten_compare): Same.
! 	(c_common_truthvalue_conversion): Same.
! 	(cb_get_source_date_epoch): Same.
! 	* c-lex.c (cb_def_pragma): Quote keywords, operators, and types
! 	in diagnostics.
! 	(interpret_float): Same.
! 	* c-omp.c (c_finish_omp_for): Same.
! 	* c-opts.c (c_common_post_options): Same.
! 	* c-pch.c (c_common_pch_pragma): Same.
! 	* c-pragma.c (pop_alignment): Same.
! 	(handle_pragma_pack): Same.
! 	(apply_pragma_weak): Same.
! 	(handle_pragma_weak): Same.
! 	(handle_pragma_scalar_storage_order): Same.
! 	(handle_pragma_redefine_extname): Same.
! 	(add_to_renaming_pragma_list): Same.
! 	(maybe_apply_renaming_pragma): Same.
! 	(push_visibility): Same.
! 	(handle_pragma_visibility): Same.
! 	(handle_pragma_optimize): Same.
! 	(handle_pragma_message): Same.
! 	* c-warn.c (warn_for_omitted_condop): Same.
! 	(lvalue_error): Same.
! 
! 2019-05-15  Richard Biener  <rguenther@suse.de>
  
  	PR c/90474
  	* c-common.c (c_common_mark_addressable_vec): Also mark
  	a COMPOUND_LITERAL_EXPR_DECL addressable similar to
  	c_mark_addressable.
  
! 2019-05-06  Nathan Sidwell  <nathan@acm.org>
  
! 	* c-opts.c (handle_defered_opts): Rename struct deps to struc mkdeps.
  
! 2019-04-30  Nathan Sidwell  <nathan@acm.org>
  
! 	* c-common.c (c_common_init_ts): Use MARK_TS_EXP.  Mark SIZEOF_EXPR.
! 
! 2019-04-30  Martin Liska  <mliska@suse.cz>
! 
! 	* c-pragma.c (handle_pragma_diagnostic): Provide hints
! 	for unknown options.
! 
! 2019-04-26  Richard Sandiford  <richard.sandiford@arm.com>
! 
! 	* c-warn.c (strict_aliasing_warning): Apply COMPLETE_TYPE_P to
! 	the pointer target rather than the pointer itself.
  
  2019-04-19  Jakub Jelinek  <jakub@redhat.com>
  
***************
*** 158,164 ****
  
  2019-04-05  Marek Polacek  <polacek@redhat.com>
  
! 	PR c++/89973 - -Waddress-of-packed-member ICE with invalid conversion. 
  	* c-warn.c (check_address_or_pointer_of_packed_member): Check the type
  	of RHS.
  
--- 1028,1034 ----
  
  2019-04-05  Marek Polacek  <polacek@redhat.com>
  
! 	PR c++/89973 - -Waddress-of-packed-member ICE with invalid conversion.
  	* c-warn.c (check_address_or_pointer_of_packed_member): Check the type
  	of RHS.
  
***************
*** 930,936 ****
  2018-08-01  Martin Sebor  <msebor@redhat.com>
  
  	PR tree-optimization/86650
! 	* c-family/c-format.c (gcc_tdiag_char_table): Update comment for "%G".
  	(gcc_cdiag_char_table, gcc_cxxdiag_char_table): Same.
   	(init_dynamic_diag_info): Update from "gcall *" to "gimple *".
   	* c-format.h (T89_G): Update to be "gimple *" rather than
--- 1800,1806 ----
  2018-08-01  Martin Sebor  <msebor@redhat.com>
  
  	PR tree-optimization/86650
! 	* c-format.c (gcc_tdiag_char_table): Update comment for "%G".
  	(gcc_cdiag_char_table, gcc_cxxdiag_char_table): Same.
   	(init_dynamic_diag_info): Update from "gcall *" to "gimple *".
   	* c-format.h (T89_G): Update to be "gimple *" rather than
***************
*** 969,975 ****
  2018-07-20  Martin Sebor  <msebor@redhat.com>
  
  	PR middle-end/82063
! 	* gcc/c-family/c.opt (-Warray-bounds): Remove redundant -Wall.
  
  2018-07-20  Martin Sebor  <msebor@redhat.com>
  
--- 1839,1845 ----
  2018-07-20  Martin Sebor  <msebor@redhat.com>
  
  	PR middle-end/82063
! 	* c.opt (-Warray-bounds): Remove redundant -Wall.
  
  2018-07-20  Martin Sebor  <msebor@redhat.com>
  
***************
*** 1049,1056 ****
  
  	* cppspec.c: Include opt-suggestions.h.
  
! 2018-06-20  Chung-Lin Tang <cltang@codesourcery.com>
! 	    Thomas Schwinge <thomas@codesourcery.com>
  	    Cesar Philippidis  <cesar@codesourcery.com>
  
  	* c-pragma.h (enum pragma_omp_clause): Add
--- 1919,1926 ----
  
  	* cppspec.c: Include opt-suggestions.h.
  
! 2018-06-20  Chung-Lin Tang  <cltang@codesourcery.com>
! 	    Thomas Schwinge  <thomas@codesourcery.com>
  	    Cesar Philippidis  <cesar@codesourcery.com>
  
  	* c-pragma.h (enum pragma_omp_clause): Add
***************
*** 1139,1145 ****
  
  	PR c/55976
  	* c-opts.c (c_common_post_options): Set default for warn_return_type
! 	for C++/C++ with ObjC extensions only. For C, makes it possible to 
  	differentiate between default (no option), -Wreturn-type, and
  	-Wno-return-type.
  
--- 2009,2015 ----
  
  	PR c/55976
  	* c-opts.c (c_common_post_options): Set default for warn_return_type
! 	for C++/C++ with ObjC extensions only. For C, makes it possible to
  	differentiate between default (no option), -Wreturn-type, and
  	-Wno-return-type.
  
***************
*** 1281,1292 ****
  2018-03-12  Martin Sebor  <msebor@redhat.com>
  
  	PR tree-optimization/83456
! 	* gcc/c-family/c-common.c (check_function_restrict): Return bool.
  	Restore checking of bounded built-in functions.
  	(check_function_arguments): Also return the result
  	of warn_for_restrict.
! 	* gcc/c-family/c-common.c (check_function_restrict): Return bool.
! 	* gcc/c-family/c-warn.c (warn_for_restrict): Return bool.
  
  2018-03-02  Marek Polacek  <polacek@redhat.com>
  
--- 2151,2162 ----
  2018-03-12  Martin Sebor  <msebor@redhat.com>
  
  	PR tree-optimization/83456
! 	* c-common.c (check_function_restrict): Return bool.
  	Restore checking of bounded built-in functions.
  	(check_function_arguments): Also return the result
  	of warn_for_restrict.
! 	* c-common.c (check_function_restrict): Return bool.
! 	* c-warn.c (warn_for_restrict): Return bool.
  
  2018-03-02  Marek Polacek  <polacek@redhat.com>
  
***************
*** 1497,1503 ****
  	* c-pragma.c (init_pragma): Register pragma GCC unroll.
  	* c-pragma.h (enum pragma_kind): Add PRAGMA_UNROLL.
  
! 2017-12-22  Alexandre Oliva <aoliva@redhat.com>
  
  	PR debug/83527
  	PR debug/83419
--- 2367,2373 ----
  	* c-pragma.c (init_pragma): Register pragma GCC unroll.
  	* c-pragma.h (enum pragma_kind): Add PRAGMA_UNROLL.
  
! 2017-12-22  Alexandre Oliva  <aoliva@redhat.com>
  
  	PR debug/83527
  	PR debug/83419
***************
*** 1551,1557 ****
  	Adjust the size of buf1 and buf2, add a new buf to avoid
  	format-overflow warning.
  
! 2017-12-12  Alexandre Oliva <aoliva@redhat.com>
  
  	* c-semantics.c (pop_stmt_list): Move begin stmt marker into
  	subsequent statement list.
--- 2421,2427 ----
  	Adjust the size of buf1 and buf2, add a new buf to avoid
  	format-overflow warning.
  
! 2017-12-12  Alexandre Oliva  <aoliva@redhat.com>
  
  	* c-semantics.c (pop_stmt_list): Move begin stmt marker into
  	subsequent statement list.
***************
*** 1855,1861 ****
  	rather than DECL_INITIAL.
  	(common_handle_aligned_attribute): Likewise.
  
! 2017-09-20  Alexandre Oliva <aoliva@redhat.com>
  
  	* c.opt (gen-decls): Add RejectNegative.
  
--- 2725,2731 ----
  	rather than DECL_INITIAL.
  	(common_handle_aligned_attribute): Likewise.
  
! 2017-09-20  Alexandre Oliva  <aoliva@redhat.com>
  
  	* c.opt (gen-decls): Add RejectNegative.
  
***************
*** 1917,1923 ****
  	* c-warn.c (warn_tautological_bitwise_comparison): New function.
  	(warn_tautological_cmp): Call it.
  
! 2017-09-01  Boris Kolpackov <boris@codesynthesis.com>
  
  	* c-opts.c (c_common_finish): Write dependency information even if
  	there are errors.
--- 2787,2793 ----
  	* c-warn.c (warn_tautological_bitwise_comparison): New function.
  	(warn_tautological_cmp): Call it.
  
! 2017-09-01  Boris Kolpackov  <boris@codesynthesis.com>
  
  	* c-opts.c (c_common_finish): Write dependency information even if
  	there are errors.
***************
*** 2008,2014 ****
  	* c-format.c (struct format_check_context): Add field "arglocs".
  	(check_function_format): Add param "arglocs"; pass it to
  	check_format_info.
! 	(check_format_info):  Add param "arglocs"; use it to initialize
  	new field of format_ctx.
  	(check_format_arg): Pass format_ctx->arglocs to new param of
  	check_format_info_main.
--- 2878,2884 ----
  	* c-format.c (struct format_check_context): Add field "arglocs".
  	(check_function_format): Add param "arglocs"; pass it to
  	check_format_info.
! 	(check_format_info): Add param "arglocs"; use it to initialize
  	new field of format_ctx.
  	(check_format_arg): Pass format_ctx->arglocs to new param of
  	check_format_info_main.
***************
*** 2676,2682 ****
  	PR middle-end/77708
  	* c.opt (-Wformat-truncation): New option.
  
! 2017-01-06  Alexandre Oliva <aoliva@redhat.com>
  
  	* c-pretty-print.c (pp_c_tree_decl_identifier): Convert 16-bit
  	value to unsigned short to fit in 4 hex digits without
--- 3546,3552 ----
  	PR middle-end/77708
  	* c.opt (-Wformat-truncation): New option.
  
! 2017-01-06  Alexandre Oliva  <aoliva@redhat.com>
  
  	* c-pretty-print.c (pp_c_tree_decl_identifier): Convert 16-bit
  	value to unsigned short to fit in 4 hex digits without
***************
*** 3287,3293 ****
  	(format_warning_va): Move to substring-locations.c.
  	(format_warning_at_substring): Likewise.
  
! 2016-09-06 Martin Sebor  <msebor@redhat.com>
  
  	PR c/77336
  	* c-format.c (check_function_format): Avoid issuing warnings for
--- 4157,4163 ----
  	(format_warning_va): Move to substring-locations.c.
  	(format_warning_at_substring): Likewise.
  
! 2016-09-06  Martin Sebor  <msebor@redhat.com>
  
  	PR c/77336
  	* c-format.c (check_function_format): Avoid issuing warnings for
***************
*** 5757,5763 ****
  	Commentary and rearrangement of tests.
  	* g++.dg/cpp1y/feat-cxx14.C: Enable aggregate NSDMI test.
  	Commentary and rearrangement of tests.
! 	* g++.dg/cpp1y/feat-cxx98-neg.C: Ditto
  	* g++.dg/cpp1y/feat-cxx98.C: Commentary.
  
  2014-10-29  Richard Sandiford  <richard.sandiford@arm.com>
--- 6627,6633 ----
  	Commentary and rearrangement of tests.
  	* g++.dg/cpp1y/feat-cxx14.C: Enable aggregate NSDMI test.
  	Commentary and rearrangement of tests.
! 	* g++.dg/cpp1y/feat-cxx98-neg.C: Ditto.
  	* g++.dg/cpp1y/feat-cxx98.C: Commentary.
  
  2014-10-29  Richard Sandiford  <richard.sandiford@arm.com>
***************
*** 6147,6153 ****
  
  2014-08-03  Marek Polacek  <polacek@redhat.com>
  
! 	* c-common.c (check_case_value):  Add location_t parameter.  Use it.
  	(c_add_case_label): Pass loc to check_case_value.
  
  2014-08-02  Trevor Saunders  <tsaunders@mozilla.com>
--- 7017,7023 ----
  
  2014-08-03  Marek Polacek  <polacek@redhat.com>
  
! 	* c-common.c (check_case_value): Add location_t parameter.  Use it.
  	(c_add_case_label): Pass loc to check_case_value.
  
  2014-08-02  Trevor Saunders  <tsaunders@mozilla.com>
***************
*** 6504,6510 ****
  	* c-common.h (registered_builtin_types): Declare.
  
  2014-04-14  Richard Biener  <rguenther@suse.de>
! 	Marc Glisse  <marc.glisse@inria.fr>
  
  	PR c/60819
  	* c-common.c (convert_vector_to_pointer_for_subscript): Properly
--- 7374,7380 ----
  	* c-common.h (registered_builtin_types): Declare.
  
  2014-04-14  Richard Biener  <rguenther@suse.de>
! 	    Marc Glisse  <marc.glisse@inria.fr>
  
  	PR c/60819
  	* c-common.c (convert_vector_to_pointer_for_subscript): Properly
***************
*** 6764,6770 ****
  	* c-common.c (c_common_attribute_table): Added "cilk simd function"
  	attribute.
  	* c-pragma.h (enum pragma_cilk_clause): Remove.
! 	(enum pragma_omp_clause):  Added the following fields:
  	PRAGMA_CILK_CLAUSE_NOMASK, PRAGMA_CILK_CLAUSE_MASK,
  	PRAGMA_CILK_CLAUSE_VECTORLENGTH, PRAGMA_CILK_CLAUSE_NONE,
  	PRAGMA_CILK_CLAUSE_LINEAR, PRAGMA_CILK_CLAUSE_PRIVATE,
--- 7634,7640 ----
  	* c-common.c (c_common_attribute_table): Added "cilk simd function"
  	attribute.
  	* c-pragma.h (enum pragma_cilk_clause): Remove.
! 	(enum pragma_omp_clause): Added the following fields:
  	PRAGMA_CILK_CLAUSE_NOMASK, PRAGMA_CILK_CLAUSE_MASK,
  	PRAGMA_CILK_CLAUSE_VECTORLENGTH, PRAGMA_CILK_CLAUSE_NONE,
  	PRAGMA_CILK_CLAUSE_LINEAR, PRAGMA_CILK_CLAUSE_PRIVATE,
***************
*** 6838,6845 ****
  2013-11-22  Andrew MacLeod  <amacleod@redhat.com>
  
  	* c-common.c: Add required include files from gimple.h.
! 	* c-gimplify.c: Likewise
! 	* cilk.c: Likewise
  
  2013-11-22  David Malcolm  <dmalcolm@redhat.com>
  
--- 7708,7715 ----
  2013-11-22  Andrew MacLeod  <amacleod@redhat.com>
  
  	* c-common.c: Add required include files from gimple.h.
! 	* c-gimplify.c: Likewise.
! 	* cilk.c: Likewise.
  
  2013-11-22  David Malcolm  <dmalcolm@redhat.com>
  
***************
*** 7349,7355 ****
  	(pp_c_direct_abstract_declarator): Likewise.
  	* c-pretty-print.c (c_pretty_printer::abstract_declarator): Rename
  	from pp_c_abstract_declarator.  Adjust.
! 	(c_pretty_printer::direct_abstract_declarator):  Rename from
  	pp_c_direct_abstract_declarator.  Adjust.
  	(c_pretty_printer::function_specifier): Rename from
  	pp_c_function_specifier.  Adjust.
--- 8219,8225 ----
  	(pp_c_direct_abstract_declarator): Likewise.
  	* c-pretty-print.c (c_pretty_printer::abstract_declarator): Rename
  	from pp_c_abstract_declarator.  Adjust.
! 	(c_pretty_printer::direct_abstract_declarator): Rename from
  	pp_c_direct_abstract_declarator.  Adjust.
  	(c_pretty_printer::function_specifier): Rename from
  	pp_c_function_specifier.  Adjust.
***************
*** 7831,7845 ****
  	* c-opts.c (c_common_handle_option): Do not handle Wformat here.
  	* c-format.c (set_Wformat): Delete.
  	(decode_format_attr): Replace OPT_Wformat with OPT_Wformat_.
! 	(maybe_read_dollar_number):  Likewise.
! 	(avoid_dollar_number):  Likewise.
! 	(finish_dollar_format_checking):  Likewise.
! 	(check_format_info):  Likewise.
! 	(check_format_info_main):  Likewise.
! 	(check_format_types):  Likewise.
! 	(format_type_warning):  Likewise.
! 	* c-common.c (int):  Likewise.
! 	(check_function_sentinel):  Likewise.
  	* c-common.h (warn_format,set_Wformat): Do not declare here.
  
  2012-11-07  Manuel López-Ibáñez  <manu@gcc.gnu.org>
--- 8701,8715 ----
  	* c-opts.c (c_common_handle_option): Do not handle Wformat here.
  	* c-format.c (set_Wformat): Delete.
  	(decode_format_attr): Replace OPT_Wformat with OPT_Wformat_.
! 	(maybe_read_dollar_number): Likewise.
! 	(avoid_dollar_number): Likewise.
! 	(finish_dollar_format_checking): Likewise.
! 	(check_format_info): Likewise.
! 	(check_format_info_main): Likewise.
! 	(check_format_types): Likewise.
! 	(format_type_warning): Likewise.
! 	* c-common.c (int): Likewise.
! 	(check_function_sentinel): Likewise.
  	* c-common.h (warn_format,set_Wformat): Do not declare here.
  
  2012-11-07  Manuel López-Ibáñez  <manu@gcc.gnu.org>
***************
*** 8187,8193 ****
  2012-05-16  Dodji Seketeli  <dodji@redhat.com>
  
  	PR preprocessor/7263
! 	* c-lex.c (c_lex_with_flags):  Pass a virtual location to the call
  	to cpp_classify_number.  For diagnostics, use the precise location
  	instead of the global input_location.
  
--- 9057,9063 ----
  2012-05-16  Dodji Seketeli  <dodji@redhat.com>
  
  	PR preprocessor/7263
! 	* c-lex.c (c_lex_with_flags): Pass a virtual location to the call
  	to cpp_classify_number.  For diagnostics, use the precise location
  	instead of the global input_location.
  
***************
*** 8263,8269 ****
  2012-04-30  Dodji Seketeli  <dodji@redhat.com>
  
  	Add -Wvarargs option
! 	* c.opt (Wvarargs):  Define new option.
  
  2012-04-30  Manuel López-Ibáñez  <manu@gcc.gnu.org>
  
--- 9133,9139 ----
  2012-04-30  Dodji Seketeli  <dodji@redhat.com>
  
  	Add -Wvarargs option
! 	* c.opt (Wvarargs): Define new option.
  
  2012-04-30  Manuel López-Ibáñez  <manu@gcc.gnu.org>
  
***************
*** 8463,8469 ****
  2011-11-08  Richard Guenther  <rguenther@suse.de>
  
  	PR middle-end/51010
! 	c-family/
  
  2011-11-07  Richard Henderson  <rth@redhat.com>
  	    Aldy Hernandez  <aldyh@redhat.com>
--- 9333,9339 ----
  2011-11-08  Richard Guenther  <rguenther@suse.de>
  
  	PR middle-end/51010
! 	* c-pretty-print.c (pp_c_expression): Handle SSA_NAMEs.
  
  2011-11-07  Richard Henderson  <rth@redhat.com>
  	    Aldy Hernandez  <aldyh@redhat.com>
***************
*** 9399,9405 ****
  	first_target_format_type: New variable.
  	(handle_format_attribute): Set up first_target_format_type, pass the
  	expected format arg string type to check_format_string().
! 	* c-common.h (FMT_FLAG_PARSE_ARG_CONVERT_EXTERNAL):  New flag.
  	* stub-objc.c (objc_string_ref_type_p): New.
  	(objc_check_format_arg): New.
  
--- 10269,10275 ----
  	first_target_format_type: New variable.
  	(handle_format_attribute): Set up first_target_format_type, pass the
  	expected format arg string type to check_format_string().
! 	* c-common.h (FMT_FLAG_PARSE_ARG_CONVERT_EXTERNAL): New flag.
  	* stub-objc.c (objc_string_ref_type_p): New.
  	(objc_check_format_arg): New.
  
***************
*** 9544,9550 ****
  
  	Merge from 'apple/trunk' branch on FSF servers.
  
! 	2006-03-27 Fariborz Jahanian  <fjahanian@apple.com>
  
  	Radar 4133425
  	* c-common.h (objc_diagnose_private_ivar): New decl.
--- 10414,10420 ----
  
  	Merge from 'apple/trunk' branch on FSF servers.
  
! 	2006-03-27  Fariborz Jahanian  <fjahanian@apple.com>
  
  	Radar 4133425
  	* c-common.h (objc_diagnose_private_ivar): New decl.
***************
*** 9586,9592 ****
  2010-10-13  Iain Sandoe  <iains@gcc.gnu.org>
  
  	merge from FSF apple 'trunk' branch.
! 	2006-04-26 Fariborz Jahanian  <fjahanian@apple.com>
  
  	Radar 3803157 (method attributes)
  	* c-common.c (handle_deprecated_attribute): Recognize
--- 10456,10462 ----
  2010-10-13  Iain Sandoe  <iains@gcc.gnu.org>
  
  	merge from FSF apple 'trunk' branch.
! 	2006-04-26  Fariborz Jahanian  <fjahanian@apple.com>
  
  	Radar 3803157 (method attributes)
  	* c-common.c (handle_deprecated_attribute): Recognize
***************
*** 10116,10122 ****
  	* c-common.c: Include gt-c-family-c-common.h.
  	* c-pragma.c: Include gt-c-family-c-pragma.h.
  
! Copyright (C) 2010-2019 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
--- 10986,10992 ----
  	* c-common.c: Include gt-c-family-c-common.h.
  	* c-pragma.c: Include gt-c-family-c-pragma.h.
  
! Copyright (C) 2010-2020 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-ada-spec.c gcc-10.1.0/gcc/c-family/c-ada-spec.c
*** gcc-9.3.0/gcc/c-family/c-ada-spec.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-ada-spec.c	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Print GENERIC declaration (functions, variables, types) trees coming from
     the C and C++ front-ends as well as macros in Ada syntax.
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
     Adapted from tree-pretty-print.c by Arnaud Charlet  <charlet@adacore.com>
  
  This file is part of GCC.
--- 1,6 ----
  /* Print GENERIC declaration (functions, variables, types) trees coming from
     the C and C++ front-ends as well as macros in Ada syntax.
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
     Adapted from tree-pretty-print.c by Arnaud Charlet  <charlet@adacore.com>
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 31,36 ****
--- 31,37 ----
  #include "diagnostic.h"
  #include "stringpool.h"
  #include "attribs.h"
+ #include "bitmap.h"
  
  /* Local functions, macros and variables.  */
  static int  dump_ada_node (pretty_printer *, tree, tree, int, bool, bool);
*************** static const char *current_source_file;
*** 630,636 ****
  
  /* Return sloc of DECL, using sloc of last field if LAST is true.  */
  
! location_t
  decl_sloc (const_tree decl, bool last)
  {
    tree field;
--- 631,637 ----
  
  /* Return sloc of DECL, using sloc of last field if LAST is true.  */
  
! static location_t
  decl_sloc (const_tree decl, bool last)
  {
    tree field;
*************** dump_ada_decl_name (pretty_printer *buff
*** 1475,1504 ****
      }
  }
  
! /* Dump in BUFFER a name based on both T1 and T2 followed by a suffix.  */
  
  static void
! dump_ada_double_name (pretty_printer *buffer, tree t1, tree t2)
  {
!   if (DECL_NAME (t1))
!     pp_ada_tree_identifier (buffer, DECL_NAME (t1), t1, false);
!   else
!     {
!       pp_string (buffer, "anon");
!       pp_scalar (buffer, "%d", TYPE_UID (TREE_TYPE (t1)));
!     }
! 
!   pp_underscore (buffer);
! 
!   if (DECL_NAME (t2))
!     pp_ada_tree_identifier (buffer, DECL_NAME (t2), t2, false);
    else
      {
        pp_string (buffer, "anon");
!       pp_scalar (buffer, "%d", TYPE_UID (TREE_TYPE (t2)));
      }
  
!   switch (TREE_CODE (TREE_TYPE (t2)))
      {
      case ARRAY_TYPE:
        pp_string (buffer, "_array");
--- 1476,1496 ----
      }
  }
  
! /* Dump in BUFFER a name for the type T, which is a _TYPE without TYPE_NAME.
!    PARENT is the parent node of T.  */
  
  static void
! dump_anonymous_type_name (pretty_printer *buffer, tree t, tree parent)
  {
!   if (DECL_NAME (parent))
!     pp_ada_tree_identifier (buffer, DECL_NAME (parent), parent, false);
    else
      {
        pp_string (buffer, "anon");
!       pp_scalar (buffer, "%d", TYPE_UID (TREE_TYPE (parent)));
      }
  
!   switch (TREE_CODE (t))
      {
      case ARRAY_TYPE:
        pp_string (buffer, "_array");
*************** dump_ada_double_name (pretty_printer *bu
*** 1516,1521 ****
--- 1508,1515 ----
        pp_string (buffer, "_unknown");
        break;
      }
+ 
+   pp_scalar (buffer, "%d", TYPE_UID (t));
  }
  
  /* Dump in BUFFER aspect Import on a given node T.  SPC is the current
*************** dump_ada_function_declaration (pretty_pr
*** 1591,1604 ****
  			       bool is_method, bool is_constructor,
  			       bool is_destructor, int spc)
  {
!   tree arg;
!   const tree node = TREE_TYPE (func);
    char buf[17];
!   int num = 0, num_args = 0, have_args = true, have_ellipsis = false;
  
    /* Compute number of arguments.  */
-   arg = TYPE_ARG_TYPES (node);
- 
    if (arg)
      {
        while (TREE_CHAIN (arg) && arg != error_mark_node)
--- 1585,1597 ----
  			       bool is_method, bool is_constructor,
  			       bool is_destructor, int spc)
  {
!   tree type = TREE_TYPE (func);
!   tree arg = TYPE_ARG_TYPES (type);
!   tree t;
    char buf[17];
!   int num, num_args = 0, have_args = true, have_ellipsis = false;
  
    /* Compute number of arguments.  */
    if (arg)
      {
        while (TREE_CHAIN (arg) && arg != error_mark_node)
*************** dump_ada_function_declaration (pretty_pr
*** 1629,1653 ****
        pp_left_paren (buffer);
      }
  
    if (TREE_CODE (func) == FUNCTION_DECL)
!     arg = DECL_ARGUMENTS (func);
    else
      arg = NULL_TREE;
  
!   if (arg == NULL_TREE)
      {
        have_args = false;
!       arg = TYPE_ARG_TYPES (node);
! 
!       if (arg && TREE_CODE (TREE_VALUE (arg)) == VOID_TYPE)
! 	arg = NULL_TREE;
      }
  
    if (is_constructor)
      arg = TREE_CHAIN (arg);
  
!   /* Print the argument names (if available) & types.  */
! 
    for (num = 1; num <= num_args; num++)
      {
        if (have_args)
--- 1622,1650 ----
        pp_left_paren (buffer);
      }
  
+   /* For a function, see if we have the corresponding arguments.  */
    if (TREE_CODE (func) == FUNCTION_DECL)
!     {
!       arg = DECL_ARGUMENTS (func);
!       for (t = arg, num = 0; t; t = DECL_CHAIN (t))
! 	num++;
!       if (num < num_args)
! 	arg = NULL_TREE;
!     }
    else
      arg = NULL_TREE;
  
!   /* Otherwise, only print the types.  */
!   if (!arg)
      {
        have_args = false;
!       arg = TYPE_ARG_TYPES (type);
      }
  
    if (is_constructor)
      arg = TREE_CHAIN (arg);
  
!   /* Print the argument names (if available) and types.  */
    for (num = 1; num <= num_args; num++)
      {
        if (have_args)
*************** dump_ada_function_declaration (pretty_pr
*** 1665,1677 ****
  	      pp_string (buffer, buf);
  	    }
  
! 	  dump_ada_node (buffer, TREE_TYPE (arg), node, spc, false, true);
  	}
        else
  	{
  	  sprintf (buf, "arg%d : ", num);
  	  pp_string (buffer, buf);
! 	  dump_ada_node (buffer, TREE_VALUE (arg), node, spc, false, true);
  	}
  
        /* If the type is a pointer to a tagged type, we need to differentiate
--- 1662,1674 ----
  	      pp_string (buffer, buf);
  	    }
  
! 	  dump_ada_node (buffer, TREE_TYPE (arg), type, spc, false, true);
  	}
        else
  	{
  	  sprintf (buf, "arg%d : ", num);
  	  pp_string (buffer, buf);
! 	  dump_ada_node (buffer, TREE_VALUE (arg), type, spc, false, true);
  	}
  
        /* If the type is a pointer to a tagged type, we need to differentiate
*************** dump_ada_function_declaration (pretty_pr
*** 1709,1719 ****
    if (num_args > 0)
      pp_right_paren (buffer);
  
!   if (is_constructor || !VOID_TYPE_P (TREE_TYPE (node)))
      {
        pp_string (buffer, " return ");
!       tree type = is_constructor ? DECL_CONTEXT (func) : TREE_TYPE (node);
!       dump_ada_node (buffer, type, type, spc, false, true);
      }
  }
  
--- 1706,1716 ----
    if (num_args > 0)
      pp_right_paren (buffer);
  
!   if (is_constructor || !VOID_TYPE_P (TREE_TYPE (type)))
      {
        pp_string (buffer, " return ");
!       tree rtype = is_constructor ? DECL_CONTEXT (func) : TREE_TYPE (type);
!       dump_ada_node (buffer, rtype, rtype, spc, false, true);
      }
  }
  
*************** dump_ada_array_type (pretty_printer *buf
*** 1813,1822 ****
    /* Print the dimensions.  */
    dump_ada_array_domains (buffer, node, spc);
  
!   /* Print array's type.  */
    if (!char_array)
      {
-       /* Retrieve the element type.  */
        tree tmp = node;
        while (TREE_CODE (tmp) == ARRAY_TYPE)
  	tmp = TREE_TYPE (tmp);
--- 1810,1818 ----
    /* Print the dimensions.  */
    dump_ada_array_domains (buffer, node, spc);
  
!   /* Print the component type.  */
    if (!char_array)
      {
        tree tmp = node;
        while (TREE_CODE (tmp) == ARRAY_TYPE)
  	tmp = TREE_TYPE (tmp);
*************** dump_ada_array_type (pretty_printer *buf
*** 1826,1835 ****
        if (TREE_CODE (tmp) != POINTER_TYPE)
  	pp_string (buffer, "aliased ");
  
!       if (TYPE_NAME (tmp) || !RECORD_OR_UNION_TYPE_P (tmp))
  	dump_ada_node (buffer, tmp, node, spc, false, true);
!       else
! 	dump_ada_double_name (buffer, type, get_underlying_decl (tmp));
      }
  }
  
--- 1822,1833 ----
        if (TREE_CODE (tmp) != POINTER_TYPE)
  	pp_string (buffer, "aliased ");
  
!       if (TYPE_NAME (tmp)
! 	  || (!RECORD_OR_UNION_TYPE_P (tmp)
! 	      && TREE_CODE (tmp) != ENUMERAL_TYPE))
  	dump_ada_node (buffer, tmp, node, spc, false, true);
!       else if (type)
! 	dump_anonymous_type_name (buffer, tmp, type);
      }
  }
  
*************** dump_forward_type (pretty_printer *buffe
*** 2466,2475 ****
    TREE_VISITED (decl) = 1;
  }
  
! static void dump_nested_type (pretty_printer *, tree, tree, tree, int);
  
! /* Dump in BUFFER anonymous types nested inside T's definition.
!    PARENT is the parent node of T.  SPC is the indentation level.
  
     In C anonymous nested tagged types have no name whereas in C++ they have
     one.  In C their TYPE_DECL is at top level whereas in C++ it is nested.
--- 2464,2474 ----
    TREE_VISITED (decl) = 1;
  }
  
! static void dump_nested_type (pretty_printer *, tree, tree, tree, bitmap, int);
  
! /* Dump in BUFFER anonymous types nested inside T's definition.  PARENT is the
!    parent node of T.  DUMPED_TYPES is the bitmap of already dumped types.  SPC
!    is the indentation level.
  
     In C anonymous nested tagged types have no name whereas in C++ they have
     one.  In C their TYPE_DECL is at top level whereas in C++ it is nested.
*************** static void dump_nested_type (pretty_pri
*** 2481,2493 ****
     pass on the nested TYPE_DECLs and a second pass on the unnamed types.  */
  
  static void
! dump_nested_types (pretty_printer *buffer, tree t, tree parent, int spc)
  {
    tree type, field;
  
    /* Find possible anonymous pointers/arrays/structs/unions recursively.  */
    type = TREE_TYPE (t);
!   if (type == NULL_TREE)
      return;
  
    for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
--- 2480,2493 ----
     pass on the nested TYPE_DECLs and a second pass on the unnamed types.  */
  
  static void
! dump_nested_types_1 (pretty_printer *buffer, tree t, tree parent,
! 		     bitmap dumped_types, int spc)
  {
    tree type, field;
  
    /* Find possible anonymous pointers/arrays/structs/unions recursively.  */
    type = TREE_TYPE (t);
!   if (!type)
      return;
  
    for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
*************** dump_nested_types (pretty_printer *buffe
*** 2495,2513 ****
  	&& DECL_NAME (field) != DECL_NAME (t)
  	&& !DECL_ORIGINAL_TYPE (field)
  	&& TYPE_NAME (TREE_TYPE (field)) != TYPE_NAME (type))
!       dump_nested_type (buffer, field, t, parent, spc);
  
    for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
      if (TREE_CODE (field) == FIELD_DECL && !TYPE_NAME (TREE_TYPE (field)))
!       dump_nested_type (buffer, field, t, parent, spc);
  }
  
! /* Dump in BUFFER the anonymous type of FIELD inside T.
!    PARENT is the parent node of T.  SPC is the indentation level.  */
  
  static void
  dump_nested_type (pretty_printer *buffer, tree field, tree t, tree parent,
! 		  int spc)
  {
    tree field_type = TREE_TYPE (field);
    tree decl, tmp;
--- 2495,2525 ----
  	&& DECL_NAME (field) != DECL_NAME (t)
  	&& !DECL_ORIGINAL_TYPE (field)
  	&& TYPE_NAME (TREE_TYPE (field)) != TYPE_NAME (type))
!       dump_nested_type (buffer, field, t, parent, dumped_types, spc);
  
    for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
      if (TREE_CODE (field) == FIELD_DECL && !TYPE_NAME (TREE_TYPE (field)))
!       dump_nested_type (buffer, field, t, parent, dumped_types, spc);
  }
  
! /* Likewise, but to be invoked only at top level.  We dump each anonymous type
!    nested inside T's definition exactly once, even if it is referenced several
!    times in it (typically an array type), with a name prefixed by that of T.  */
! 
! static void
! dump_nested_types (pretty_printer *buffer, tree t, int spc)
! {
!   auto_bitmap dumped_types;
!   dump_nested_types_1 (buffer, t, t, dumped_types, spc);
! }
! 
! /* Dump in BUFFER the anonymous type of FIELD inside T.  PARENT is the parent
!    node of T.  DUMPED_TYPES is the bitmap of already dumped types.  SPC is the
!    indentation level.  */
  
  static void
  dump_nested_type (pretty_printer *buffer, tree field, tree t, tree parent,
! 		  bitmap dumped_types, int spc)
  {
    tree field_type = TREE_TYPE (field);
    tree decl, tmp;
*************** dump_nested_type (pretty_printer *buffer
*** 2520,2525 ****
--- 2532,2542 ----
        break;
  
      case ARRAY_TYPE:
+       /* Anonymous array types are shared.  */
+       if (!bitmap_set_bit (dumped_types, TYPE_UID (field_type)))
+ 	return;
+ 
+       /* Recurse on the element type if need be.  */
        tmp = TREE_TYPE (field_type);
        while (TREE_CODE (tmp) == ARRAY_TYPE)
  	tmp = TREE_TYPE (tmp);
*************** dump_nested_type (pretty_printer *buffer
*** 2530,2536 ****
  	  && !TREE_VISITED (decl))
  	{
  	  /* Generate full declaration.  */
! 	  dump_nested_type (buffer, decl, t, parent, spc);
  	  TREE_VISITED (decl) = 1;
  	}
        else if (!decl && TREE_CODE (tmp) == POINTER_TYPE)
--- 2547,2553 ----
  	  && !TREE_VISITED (decl))
  	{
  	  /* Generate full declaration.  */
! 	  dump_nested_type (buffer, decl, t, parent, dumped_types, spc);
  	  TREE_VISITED (decl) = 1;
  	}
        else if (!decl && TREE_CODE (tmp) == POINTER_TYPE)
*************** dump_nested_type (pretty_printer *buffer
*** 2542,2548 ****
        else
  	pp_string (buffer, "type ");
  
!       dump_ada_double_name (buffer, parent, field);
        pp_string (buffer, " is ");
        dump_ada_array_type (buffer, field_type, parent, spc);
        pp_semicolon (buffer);
--- 2559,2565 ----
        else
  	pp_string (buffer, "type ");
  
!       dump_anonymous_type_name (buffer, field_type, parent);
        pp_string (buffer, " is ");
        dump_ada_array_type (buffer, field_type, parent, spc);
        pp_semicolon (buffer);
*************** dump_nested_type (pretty_printer *buffer
*** 2558,2564 ****
        if (TYPE_NAME (field_type))
  	dump_ada_node (buffer, field_type, NULL_TREE, spc, false, true);
        else
! 	dump_ada_double_name (buffer, parent, field);
        pp_string (buffer, " is ");
        dump_ada_enum_type (buffer, field_type, spc);
        pp_semicolon (buffer);
--- 2575,2581 ----
        if (TYPE_NAME (field_type))
  	dump_ada_node (buffer, field_type, NULL_TREE, spc, false, true);
        else
! 	dump_anonymous_type_name (buffer, field_type, parent);
        pp_string (buffer, " is ");
        dump_ada_enum_type (buffer, field_type, spc);
        pp_semicolon (buffer);
*************** dump_nested_type (pretty_printer *buffer
*** 2567,2580 ****
  
      case RECORD_TYPE:
      case UNION_TYPE:
!       dump_nested_types (buffer, field, t, spc);
  
        pp_string (buffer, "type ");
  
        if (TYPE_NAME (field_type))
  	dump_ada_node (buffer, field_type, NULL_TREE, spc, false, true);
        else
! 	dump_ada_double_name (buffer, parent, field);
  
        if (TREE_CODE (field_type) == UNION_TYPE)
  	pp_string (buffer, " (discr : unsigned := 0)");
--- 2584,2597 ----
  
      case RECORD_TYPE:
      case UNION_TYPE:
!       dump_nested_types_1 (buffer, field, parent, dumped_types, spc);
  
        pp_string (buffer, "type ");
  
        if (TYPE_NAME (field_type))
  	dump_ada_node (buffer, field_type, NULL_TREE, spc, false, true);
        else
! 	dump_anonymous_type_name (buffer, field_type, parent);
  
        if (TREE_CODE (field_type) == UNION_TYPE)
  	pp_string (buffer, " (discr : unsigned := 0)");
*************** print_destructor (pretty_printer *buffer
*** 2691,2696 ****
--- 2708,2724 ----
    pp_ada_tree_identifier (buffer, decl_name, t, false);
  }
  
+ /* Dump in BUFFER assignment operator spec corresponding to T.  */
+ 
+ static void
+ print_assignment_operator (pretty_printer *buffer, tree t, tree type)
+ {
+   tree decl_name = DECL_NAME (TYPE_NAME (type));
+ 
+   pp_string (buffer, "Assign_");
+   pp_ada_tree_identifier (buffer, decl_name, t, false);
+ }
+ 
  /* Return the name of type T.  */
  
  static const char *
*************** dump_ada_declaration (pretty_printer *bu
*** 2829,2835 ****
  	      pp_string (buffer, "subtype ");
  	    else
  	      {
! 		dump_nested_types (buffer, t, t, spc);
  
                  if (separate_class_package (t))
  		  {
--- 2857,2863 ----
  	      pp_string (buffer, "subtype ");
  	    else
  	      {
! 		dump_nested_types (buffer, t, spc);
  
                  if (separate_class_package (t))
  		  {
*************** dump_ada_declaration (pretty_printer *bu
*** 2906,2913 ****
  	}
        else
  	{
- 	  tree tmp = TYPE_NAME (TREE_TYPE (t));
- 
  	  if (spc == INDENT_INCR || TREE_STATIC (t))
  	    is_var = true;
  
--- 2934,2939 ----
*************** dump_ada_declaration (pretty_printer *bu
*** 2916,2925 ****
  	  if (TREE_CODE (TREE_TYPE (TREE_TYPE (t))) != POINTER_TYPE)
  	    pp_string (buffer, "aliased ");
  
! 	  if (tmp)
! 	    dump_ada_node (buffer, tmp, type, spc, false, true);
  	  else if (type)
! 	    dump_ada_double_name (buffer, type, t);
  	  else
  	    dump_ada_array_type (buffer, TREE_TYPE (t), type, spc);
  	}
--- 2942,2951 ----
  	  if (TREE_CODE (TREE_TYPE (TREE_TYPE (t))) != POINTER_TYPE)
  	    pp_string (buffer, "aliased ");
  
! 	  if (TYPE_NAME (TREE_TYPE (t)))
! 	    dump_ada_node (buffer, TREE_TYPE (t), type, spc, false, true);
  	  else if (type)
! 	    dump_anonymous_type_name (buffer, TREE_TYPE (t), type);
  	  else
  	    dump_ada_array_type (buffer, TREE_TYPE (t), type, spc);
  	}
*************** dump_ada_declaration (pretty_printer *bu
*** 2930,2935 ****
--- 2956,2962 ----
        bool is_method = TREE_CODE (TREE_TYPE (t)) == METHOD_TYPE;
        tree decl_name = DECL_NAME (t);
        bool is_abstract = false;
+       bool is_assignment_operator = false;
        bool is_constructor = false;
        bool is_destructor = false;
        bool is_copy_constructor = false;
*************** dump_ada_declaration (pretty_printer *bu
*** 2941,2946 ****
--- 2968,2974 ----
        if (cpp_check)
  	{
  	  is_abstract = cpp_check (t, IS_ABSTRACT);
+ 	  is_assignment_operator = cpp_check (t, IS_ASSIGNMENT_OPERATOR);
  	  is_constructor = cpp_check (t, IS_CONSTRUCTOR);
  	  is_destructor = cpp_check (t, IS_DESTRUCTOR);
  	  is_copy_constructor = cpp_check (t, IS_COPY_CONSTRUCTOR);
*************** dump_ada_declaration (pretty_printer *bu
*** 2965,2970 ****
--- 2993,3005 ----
  	    return 0;
  	}
  
+       else if (is_assignment_operator)
+ 	{
+ 	  /* ??? Skip implicit or non-method assignment operators for now.  */
+ 	  if (DECL_ARTIFICIAL (t) || !is_method)
+ 	    return 0;
+ 	}
+ 
        /* If this function has an entry in the vtable, we cannot omit it.  */
        else if (!DECL_VINDEX (t) && *IDENTIFIER_POINTER (decl_name) == '_')
  	{
*************** dump_ada_declaration (pretty_printer *bu
*** 2987,2992 ****
--- 3022,3029 ----
  	print_constructor (buffer, t, type);
        else if (is_destructor)
  	print_destructor (buffer, t, type);
+       else if (is_assignment_operator)
+ 	print_assignment_operator (buffer, t, type);
        else
  	dump_ada_decl_name (buffer, t, false);
  
*************** dump_ada_declaration (pretty_printer *bu
*** 3127,3159 ****
  
  	  pp_string (buffer, " : ");
  
! 	  if (RECORD_OR_UNION_TYPE_P (TREE_TYPE (t))
! 	      || TREE_CODE (TREE_TYPE (t)) == ENUMERAL_TYPE)
! 	    {
! 	      if (TYPE_NAME (TREE_TYPE (t))
! 		  || TREE_CODE (TREE_TYPE (t)) != ENUMERAL_TYPE)
! 		pp_string (buffer, "aliased ");
! 
! 	      if (TREE_READONLY (t) && TREE_CODE (t) != FIELD_DECL)
! 		pp_string (buffer, "constant ");
! 
! 	      if (TYPE_NAME (TREE_TYPE (t)))
! 		dump_ada_node (buffer, TREE_TYPE (t), t, spc, false, true);
! 	      else if (type)
! 		dump_ada_double_name (buffer, type, t);
! 	    }
! 	  else
! 	    {
! 	      if (TREE_CODE (TREE_TYPE (t)) != POINTER_TYPE
! 		  && (TYPE_NAME (TREE_TYPE (t))
! 		      || TREE_CODE (TREE_TYPE (t)) != INTEGER_TYPE))
! 		pp_string (buffer, "aliased ");
  
! 	      if (TREE_READONLY (t) && TREE_CODE (t) != FIELD_DECL)
! 		pp_string (buffer, "constant ");
  
! 	      dump_ada_node (buffer, TREE_TYPE (t), t, spc, false, true);
! 	    }
  	}
      }
  
--- 3164,3184 ----
  
  	  pp_string (buffer, " : ");
  
! 	  if (TREE_CODE (TREE_TYPE (t)) != POINTER_TYPE
! 	      && (TYPE_NAME (TREE_TYPE (t))
! 		  || (TREE_CODE (TREE_TYPE (t)) != INTEGER_TYPE
! 		      && TREE_CODE (TREE_TYPE (t)) != ENUMERAL_TYPE)))
! 	    pp_string (buffer, "aliased ");
  
! 	  if (TREE_READONLY (t) && TREE_CODE (t) != FIELD_DECL)
! 	    pp_string (buffer, "constant ");
  
! 	  if (TYPE_NAME (TREE_TYPE (t))
! 	      || (!RECORD_OR_UNION_TYPE_P (TREE_TYPE (t))
! 		  && TREE_CODE (TREE_TYPE (t)) != ENUMERAL_TYPE))
! 	    dump_ada_node (buffer, TREE_TYPE (t), t, spc, false, true);
! 	  else if (type)
! 	    dump_anonymous_type_name (buffer, TREE_TYPE (t), type);
  	}
      }
  
*************** void
*** 3449,3454 ****
--- 3474,3481 ----
  dump_ada_specs (void (*collect_all_refs)(const char *),
  		int (*check)(tree, cpp_operation))
  {
+   bitmap_obstack_initialize (NULL);
+ 
    /* Iterate over the list of files to dump specs for.  */
    for (int i = 0; i < source_refs_used; i++)
      dump_ads (source_refs[i], collect_all_refs, check);
*************** dump_ada_specs (void (*collect_all_refs)
*** 3456,3459 ****
--- 3483,3488 ----
    /* Free various tables.  */
    free (source_refs);
    delete overloaded_names;
+ 
+   bitmap_obstack_release (NULL);
  }
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-ada-spec.h gcc-10.1.0/gcc/c-family/c-ada-spec.h
*** gcc-9.3.0/gcc/c-family/c-ada-spec.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-ada-spec.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Interface for -fdump-ada-spec capability.
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Interface for -fdump-ada-spec capability.
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 27,32 ****
--- 27,33 ----
  enum cpp_operation {
    HAS_DEPENDENT_TEMPLATE_ARGS,
    IS_ABSTRACT,
+   IS_ASSIGNMENT_OPERATOR,
    IS_CONSTRUCTOR,
    IS_DESTRUCTOR,
    IS_COPY_CONSTRUCTOR,
*************** enum cpp_operation {
*** 35,41 ****
    IS_TRIVIAL
  };
  
- extern location_t decl_sloc (const_tree, bool);
  extern void collect_ada_nodes (tree, const char *);
  extern void collect_source_ref (const char *);
  extern void dump_ada_specs (void (*)(const char *),
--- 36,41 ----
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-attribs.c gcc-10.1.0/gcc/c-family/c-attribs.c
*** gcc-9.3.0/gcc/c-family/c-attribs.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-attribs.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* C-family attributes handling.
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* C-family attributes handling.
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 49,55 ****
  static tree handle_packed_attribute (tree *, tree, tree, int, bool *);
  static tree handle_nocommon_attribute (tree *, tree, tree, int, bool *);
  static tree handle_common_attribute (tree *, tree, tree, int, bool *);
- static tree handle_noreturn_attribute (tree *, tree, tree, int, bool *);
  static tree handle_hot_attribute (tree *, tree, tree, int, bool *);
  static tree handle_cold_attribute (tree *, tree, tree, int, bool *);
  static tree handle_no_sanitize_attribute (tree *, tree, tree, int, bool *);
--- 49,54 ----
*************** static tree handle_stack_protect_attribu
*** 67,72 ****
--- 66,72 ----
  static tree handle_noinline_attribute (tree *, tree, tree, int, bool *);
  static tree handle_noclone_attribute (tree *, tree, tree, int, bool *);
  static tree handle_nocf_check_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_symver_attribute (tree *, tree, tree, int, bool *);
  static tree handle_noicf_attribute (tree *, tree, tree, int, bool *);
  static tree handle_noipa_attribute (tree *, tree, tree, int, bool *);
  static tree handle_leaf_attribute (tree *, tree, tree, int, bool *);
*************** static tree handle_section_attribute (tr
*** 93,98 ****
--- 93,99 ----
  static tree handle_aligned_attribute (tree *, tree, tree, int, bool *);
  static tree handle_warn_if_not_aligned_attribute (tree *, tree, tree,
  						  int, bool *);
+ static tree handle_noinit_attribute (tree *, tree, tree, int, bool *);
  static tree handle_weak_attribute (tree *, tree, tree, int, bool *) ;
  static tree handle_noplt_attribute (tree *, tree, tree, int, bool *) ;
  static tree handle_alias_ifunc_attribute (bool, tree *, tree, tree, bool *);
*************** static tree handle_pure_attribute (tree
*** 115,122 ****
  static tree handle_tm_attribute (tree *, tree, tree, int, bool *);
  static tree handle_tm_wrap_attribute (tree *, tree, tree, int, bool *);
  static tree handle_novops_attribute (tree *, tree, tree, int, bool *);
- static tree handle_deprecated_attribute (tree *, tree, tree, int,
- 					 bool *);
  static tree handle_vector_size_attribute (tree *, tree, tree, int,
  					  bool *);
  static tree handle_nonnull_attribute (tree *, tree, tree, int, bool *);
--- 116,121 ----
*************** static tree handle_nothrow_attribute (tr
*** 125,130 ****
--- 124,131 ----
  static tree handle_cleanup_attribute (tree *, tree, tree, int, bool *);
  static tree handle_warn_unused_result_attribute (tree *, tree, tree, int,
  						 bool *);
+ static tree handle_access_attribute (tree *, tree, tree, int, bool *);
+ 
  static tree handle_sentinel_attribute (tree *, tree, tree, int, bool *);
  static tree handle_type_generic_attribute (tree *, tree, tree, int, bool *);
  static tree handle_alloc_size_attribute (tree *, tree, tree, int, bool *);
*************** static tree handle_warn_unused_attribute
*** 140,150 ****
  static tree handle_returns_nonnull_attribute (tree *, tree, tree, int, bool *);
  static tree handle_omp_declare_simd_attribute (tree *, tree, tree, int,
  					       bool *);
  static tree handle_simd_attribute (tree *, tree, tree, int, bool *);
  static tree handle_omp_declare_target_attribute (tree *, tree, tree, int,
  						 bool *);
  static tree handle_designated_init_attribute (tree *, tree, tree, int, bool *);
- static tree handle_fallthrough_attribute (tree *, tree, tree, int, bool *);
  static tree handle_patchable_function_entry_attribute (tree *, tree, tree,
  						       int, bool *);
  static tree handle_copy_attribute (tree *, tree, tree, int, bool *);
--- 141,152 ----
  static tree handle_returns_nonnull_attribute (tree *, tree, tree, int, bool *);
  static tree handle_omp_declare_simd_attribute (tree *, tree, tree, int,
  					       bool *);
+ static tree handle_omp_declare_variant_attribute (tree *, tree, tree, int,
+ 						  bool *);
  static tree handle_simd_attribute (tree *, tree, tree, int, bool *);
  static tree handle_omp_declare_target_attribute (tree *, tree, tree, int,
  						 bool *);
  static tree handle_designated_init_attribute (tree *, tree, tree, int, bool *);
  static tree handle_patchable_function_entry_attribute (tree *, tree, tree,
  						       int, bool *);
  static tree handle_copy_attribute (tree *, tree, tree, int, bool *);
*************** static const struct attribute_spec::excl
*** 190,196 ****
    ATTR_EXCL (NULL, false, false, false),
  };
  
! static const struct attribute_spec::exclusions attr_noreturn_exclusions[] =
  {
    ATTR_EXCL ("alloc_align", true, true, true),
    ATTR_EXCL ("alloc_size", true, true, true),
--- 192,198 ----
    ATTR_EXCL (NULL, false, false, false),
  };
  
! extern const struct attribute_spec::exclusions attr_noreturn_exclusions[] =
  {
    ATTR_EXCL ("alloc_align", true, true, true),
    ATTR_EXCL ("alloc_size", true, true, true),
*************** static const struct attribute_spec::excl
*** 236,241 ****
--- 238,250 ----
    ATTR_EXCL (NULL, false, false, false)
  };
  
+ static const struct attribute_spec::exclusions attr_noinit_exclusions[] =
+ {
+   ATTR_EXCL ("noinit", true, true, true),
+   ATTR_EXCL ("section", true, true, true),
+   ATTR_EXCL (NULL, false, false, false),
+ };
+ 
  /* Table of machine-independent attributes common to all C-like languages.
  
     Current list of processed common attributes: nonnull.  */
*************** const struct attribute_spec c_common_att
*** 308,314 ****
    { "mode",                   1, 1, false,  true, false, false,
  			      handle_mode_attribute, NULL },
    { "section",                1, 1, true,  false, false, false,
! 			      handle_section_attribute, NULL },
    { "aligned",                0, 1, false, false, false, false,
  			      handle_aligned_attribute,
  	                      attr_aligned_exclusions },
--- 317,323 ----
    { "mode",                   1, 1, false,  true, false, false,
  			      handle_mode_attribute, NULL },
    { "section",                1, 1, true,  false, false, false,
! 			      handle_section_attribute, attr_noinit_exclusions },
    { "aligned",                0, 1, false, false, false, false,
  			      handle_aligned_attribute,
  	                      attr_aligned_exclusions },
*************** const struct attribute_spec c_common_att
*** 435,448 ****
  			      handle_returns_nonnull_attribute, NULL },
    { "omp declare simd",       0, -1, true,  false, false, false,
  			      handle_omp_declare_simd_attribute, NULL },
    { "simd",		      0, 1, true,  false, false, false,
  			      handle_simd_attribute, NULL },
!   { "omp declare target",     0, 0, true, false, false, false,
  			      handle_omp_declare_target_attribute, NULL },
    { "omp declare target link", 0, 0, true, false, false, false,
  			      handle_omp_declare_target_attribute, NULL },
    { "omp declare target implicit", 0, 0, true, false, false, false,
  			      handle_omp_declare_target_attribute, NULL },
    { "alloc_align",	      1, 1, false, true, true, false,
  			      handle_alloc_align_attribute,
  	                      attr_alloc_exclusions },
--- 444,467 ----
  			      handle_returns_nonnull_attribute, NULL },
    { "omp declare simd",       0, -1, true,  false, false, false,
  			      handle_omp_declare_simd_attribute, NULL },
+   { "omp declare variant base", 0, -1, true,  false, false, false,
+ 			      handle_omp_declare_variant_attribute, NULL },
+   { "omp declare variant variant", 0, -1, true,  false, false, false,
+ 			      handle_omp_declare_variant_attribute, NULL },
    { "simd",		      0, 1, true,  false, false, false,
  			      handle_simd_attribute, NULL },
!   { "omp declare target",     0, -1, true, false, false, false,
  			      handle_omp_declare_target_attribute, NULL },
    { "omp declare target link", 0, 0, true, false, false, false,
  			      handle_omp_declare_target_attribute, NULL },
    { "omp declare target implicit", 0, 0, true, false, false, false,
  			      handle_omp_declare_target_attribute, NULL },
+   { "omp declare target host", 0, 0, true, false, false, false,
+ 			      handle_omp_declare_target_attribute, NULL },
+   { "omp declare target nohost", 0, 0, true, false, false, false,
+ 			      handle_omp_declare_target_attribute, NULL },
+   { "omp declare target block", 0, 0, true, false, false, false,
+ 			      handle_omp_declare_target_attribute, NULL },
    { "alloc_align",	      1, 1, false, true, true, false,
  			      handle_alloc_align_attribute,
  	                      attr_alloc_exclusions },
*************** const struct attribute_spec c_common_att
*** 457,464 ****
--- 476,489 ----
  			      NULL },
    { "nocf_check",	      0, 0, false, true, true, true,
  			      handle_nocf_check_attribute, NULL },
+   { "symver",		      1, -1, true, false, false, false,
+ 			      handle_symver_attribute, NULL},
    { "copy",                   1, 1, false, false, false, false,
  			      handle_copy_attribute, NULL },
+   { "noinit",		      0, 0, true,  false, false, false,
+ 			      handle_noinit_attribute, attr_noinit_exclusions },
+   { "access",		      1, 3, false, true, true, false,
+ 			      handle_access_attribute, NULL },
    { NULL,                     0, 0, false, false, false, false, NULL, NULL }
  };
  
*************** attribute_takes_identifier_p (const_tree
*** 490,496 ****
      return true;
    else if (!strcmp ("mode", spec->name)
  	   || !strcmp ("format", spec->name)
! 	   || !strcmp ("cleanup", spec->name))
      return true;
    else
      return targetm.attribute_takes_identifier_p (attr_id);
--- 515,522 ----
      return true;
    else if (!strcmp ("mode", spec->name)
  	   || !strcmp ("format", spec->name)
! 	   || !strcmp ("cleanup", spec->name)
! 	   || !strcmp ("access", spec->name))
      return true;
    else
      return targetm.attribute_takes_identifier_p (attr_id);
*************** handle_common_attribute (tree *node, tre
*** 779,785 ****
  /* Handle a "noreturn" attribute; arguments as in
     struct attribute_spec.handler.  */
  
! static tree
  handle_noreturn_attribute (tree *node, tree name, tree ARG_UNUSED (args),
  			   int ARG_UNUSED (flags), bool *no_add_attrs)
  {
--- 805,811 ----
  /* Handle a "noreturn" attribute; arguments as in
     struct attribute_spec.handler.  */
  
! tree
  handle_noreturn_attribute (tree *node, tree name, tree ARG_UNUSED (args),
  			   int ARG_UNUSED (flags), bool *no_add_attrs)
  {
*************** handle_no_sanitize_attribute (tree *node
*** 891,897 ****
        tree id = TREE_VALUE (args);
        if (TREE_CODE (id) != STRING_CST)
  	{
! 	  error ("no_sanitize argument not a string");
  	  return NULL_TREE;
  	}
  
--- 917,923 ----
        tree id = TREE_VALUE (args);
        if (TREE_CODE (id) != STRING_CST)
  	{
! 	  error ("%qE argument not a string", name);
  	  return NULL_TREE;
  	}
  
*************** handle_scalar_storage_order_attribute (t
*** 1418,1425 ****
  
    if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
      {
!       error ("scalar_storage_order is not supported because endianness "
! 	    "is not uniform");
        return NULL_TREE;
      }
  
--- 1444,1451 ----
  
    if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
      {
!       error ("%qE attribute is not supported because endianness is not uniform",
! 	     name);
        return NULL_TREE;
      }
  
*************** handle_scalar_storage_order_attribute (t
*** 1435,1442 ****
  	reverse = BYTES_BIG_ENDIAN;
        else
  	{
! 	  error ("scalar_storage_order argument must be one of \"big-endian\""
! 		 " or \"little-endian\"");
  	  return NULL_TREE;
  	}
  
--- 1461,1468 ----
  	reverse = BYTES_BIG_ENDIAN;
        else
  	{
! 	  error ("attribute %qE argument must be one of %qs or %qs",
! 		 name, "big-endian", "little-endian");
  	  return NULL_TREE;
  	}
  
*************** handle_mode_attribute (tree *node, tree
*** 1759,1767 ****
  	case MODE_VECTOR_ACCUM:
  	case MODE_VECTOR_UACCUM:
  	  warning (OPT_Wattributes, "specifying vector types with "
! 		   "__attribute__ ((mode)) is deprecated");
! 	  warning (OPT_Wattributes,
! 		   "use __attribute__ ((vector_size)) instead");
  	  valid_mode = vector_mode_valid_p (mode);
  	  break;
  
--- 1785,1793 ----
  	case MODE_VECTOR_ACCUM:
  	case MODE_VECTOR_UACCUM:
  	  warning (OPT_Wattributes, "specifying vector types with "
! 		   "%<__attribute__ ((mode))%> is deprecated");
! 	  inform (input_location,
! 		  "use %<__attribute__ ((vector_size))%> instead");
  	  valid_mode = vector_mode_valid_p (mode);
  	  break;
  
*************** handle_mode_attribute (tree *node, tree
*** 1821,1827 ****
  	     this mode for this type.  */
  	  if (TREE_CODE (typefm) != INTEGER_TYPE)
  	    {
! 	      error ("cannot use mode %qs for enumeral types", p);
  	      return NULL_TREE;
  	    }
  
--- 1847,1853 ----
  	     this mode for this type.  */
  	  if (TREE_CODE (typefm) != INTEGER_TYPE)
  	    {
! 	      error ("cannot use mode %qs for enumerated types", p);
  	      return NULL_TREE;
  	    }
  
*************** handle_section_attribute (tree *node, tr
*** 1867,1872 ****
--- 1893,1899 ----
  			  int ARG_UNUSED (flags), bool *no_add_attrs)
  {
    tree decl = *node;
+   tree res = NULL_TREE;
  
    if (!targetm_common.have_named_sections)
      {
*************** handle_section_attribute (tree *node, tr
*** 1914,1925 ****
        goto fail;
      }
  
!   set_decl_section_name (decl, TREE_STRING_POINTER (TREE_VALUE (args)));
!   return NULL_TREE;
  
  fail:
    *no_add_attrs = true;
!   return NULL_TREE;
  }
  
  /* Common codes shared by handle_warn_if_not_aligned_attribute and
--- 1941,1960 ----
        goto fail;
      }
  
!   res = targetm.handle_generic_attribute (node, name, args, flags,
! 					  no_add_attrs);
! 
!   /* If the back end confirms the attribute can be added then continue onto
!      final processing.  */
!   if (!(*no_add_attrs))
!     {
!       set_decl_section_name (decl, TREE_STRING_POINTER (TREE_VALUE (args)));
!       return res;
!     }
  
  fail:
    *no_add_attrs = true;
!   return res;
  }
  
  /* Common codes shared by handle_warn_if_not_aligned_attribute and
*************** handle_weak_attribute (tree *node, tree
*** 2166,2171 ****
--- 2201,2264 ----
    return NULL_TREE;
  }
  
+ /* Handle a "noinit" attribute; arguments as in struct
+    attribute_spec.handler.  Check whether the attribute is allowed
+    here and add the attribute to the variable decl tree or otherwise
+    issue a diagnostic.  This function checks NODE is of the expected
+    type and issues diagnostics otherwise using NAME.  If it is not of
+    the expected type *NO_ADD_ATTRS will be set to true.  */
+ 
+ static tree
+ handle_noinit_attribute (tree * node,
+ 		  tree   name,
+ 		  tree   args,
+ 		  int    flags ATTRIBUTE_UNUSED,
+ 		  bool *no_add_attrs)
+ {
+   const char *message = NULL;
+   tree res = NULL_TREE;
+ 
+   gcc_assert (DECL_P (*node));
+   gcc_assert (args == NULL);
+ 
+   if (TREE_CODE (*node) != VAR_DECL)
+     message = G_("%qE attribute only applies to variables");
+ 
+   /* Check that it's possible for the variable to have a section.  */
+   else if ((TREE_STATIC (*node) || DECL_EXTERNAL (*node) || in_lto_p)
+ 	   && DECL_SECTION_NAME (*node))
+     message = G_("%qE attribute cannot be applied to variables "
+ 		 "with specific sections");
+ 
+   else if (!targetm.have_switchable_bss_sections)
+     message = G_("%qE attribute is specific to ELF targets");
+ 
+   if (message)
+     {
+       warning (OPT_Wattributes, message, name);
+       *no_add_attrs = true;
+     }
+   else
+     {
+       res = targetm.handle_generic_attribute (node, name, args, flags,
+ 					      no_add_attrs);
+       /* If the back end confirms the attribute can be added then continue onto
+ 	 final processing.  */
+       if (!(*no_add_attrs))
+ 	{
+ 	  /* If this var is thought to be common, then change this.  Common
+ 	     variables are assigned to sections before the backend has a
+ 	     chance to process them.  Do this only if the attribute is
+ 	     valid.  */
+ 	  if (DECL_COMMON (*node))
+ 	    DECL_COMMON (*node) = 0;
+ 	}
+     }
+ 
+   return res;
+ }
+ 
+ 
  /* Handle a "noplt" attribute; arguments as in
     struct attribute_spec.handler.  */
  
*************** handle_noplt_attribute (tree *node, tree
*** 2185,2190 ****
--- 2278,2339 ----
    return NULL_TREE;
  }
  
+ /* Handle a "symver" attribute.  */
+ 
+ static tree
+ handle_symver_attribute (tree *node, tree ARG_UNUSED (name), tree args,
+ 			 int ARG_UNUSED (flags), bool *no_add_attrs)
+ {
+   tree symver;
+   const char *symver_str;
+ 
+   if (TREE_CODE (*node) != FUNCTION_DECL && TREE_CODE (*node) != VAR_DECL)
+     {
+       warning (OPT_Wattributes,
+ 	       "%<symver%> attribute only applies to functions and variables");
+       *no_add_attrs = true;
+       return NULL_TREE;
+     }
+ 
+   if (!decl_in_symtab_p (*node))
+     {
+       warning (OPT_Wattributes,
+ 	       "%<symver%> attribute is only applicable to symbols");
+       *no_add_attrs = true;
+       return NULL_TREE;
+     }
+ 
+   for (; args; args = TREE_CHAIN (args))
+     {
+       symver = TREE_VALUE (args);
+       if (TREE_CODE (symver) != STRING_CST)
+ 	{
+ 	  error ("%<symver%> attribute argument not a string constant");
+ 	  *no_add_attrs = true;
+ 	  return NULL_TREE;
+ 	}
+ 
+       symver_str = TREE_STRING_POINTER (symver);
+ 
+       int ats = 0;
+       for (int n = 0; (int)n < TREE_STRING_LENGTH (symver); n++)
+ 	if (symver_str[n] == '@')
+ 	  ats++;
+ 
+       if (ats != 1 && ats != 2)
+ 	{
+ 	  error ("symver attribute argument must have format %<name@nodename%>");
+ 	  error ("%<symver%> attribute argument %qs must contain one or two "
+ 		 "%<@%>", symver_str);
+ 	  *no_add_attrs = true;
+ 	  return NULL_TREE;
+ 	}
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ 
  /* Handle an "alias" or "ifunc" attribute; arguments as in
     struct attribute_spec.handler, except that IS_ALIAS tells us
     whether this is an alias as opposed to ifunc attribute.  */
*************** handle_alias_ifunc_attribute (bool is_al
*** 2267,2278 ****
      {
        struct symtab_node *n = symtab_node::get (decl);
        if (n && n->refuse_visibility_changes)
! 	{
! 	  if (is_alias)
! 	    error ("%+qD declared alias after being used", decl);
! 	  else
! 	    error ("%+qD declared ifunc after being used", decl);
! 	}
      }
  
  
--- 2416,2423 ----
      {
        struct symtab_node *n = symtab_node::get (decl);
        if (n && n->refuse_visibility_changes)
! 	error ("%+qD declared %qs after being used",
! 	       decl, is_alias ? "alias" : "ifunc");
      }
  
  
*************** handle_copy_attribute (tree *node, tree
*** 2381,2397 ****
        && !FUNCTION_POINTER_TYPE_P (TREE_TYPE (ref)))
      ref = TREE_TYPE (ref);
  
    if (DECL_P (decl))
      {
        if ((VAR_P (decl)
  	   && (TREE_CODE (ref) == FUNCTION_DECL
  	       || (EXPR_P (ref)
! 		   && POINTER_TYPE_P (TREE_TYPE (ref))
! 		   && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (ref))))))
  	  || (TREE_CODE (decl) == FUNCTION_DECL
  	      && (VAR_P (ref)
  		  || (EXPR_P (ref)
! 		      && !FUNC_OR_METHOD_TYPE_P (TREE_TYPE (ref))))))
  	{
  	  /* It makes no sense to try to copy function attributes
  	     to a variable, or variable attributes to a function.  */
--- 2526,2546 ----
        && !FUNCTION_POINTER_TYPE_P (TREE_TYPE (ref)))
      ref = TREE_TYPE (ref);
  
+   tree reftype = TYPE_P (ref) ? ref : TREE_TYPE (ref);
+ 
    if (DECL_P (decl))
      {
        if ((VAR_P (decl)
  	   && (TREE_CODE (ref) == FUNCTION_DECL
  	       || (EXPR_P (ref)
! 		   && POINTER_TYPE_P (reftype)
! 		   && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (reftype)))))
  	  || (TREE_CODE (decl) == FUNCTION_DECL
  	      && (VAR_P (ref)
  		  || (EXPR_P (ref)
! 		      && !FUNC_OR_METHOD_TYPE_P (reftype)
! 		      && (!POINTER_TYPE_P (reftype)
! 			  || !FUNC_OR_METHOD_TYPE_P (TREE_TYPE (reftype)))))))
  	{
  	  /* It makes no sense to try to copy function attributes
  	     to a variable, or variable attributes to a function.  */
*************** handle_copy_attribute (tree *node, tree
*** 2427,2433 ****
  	      || is_attribute_p ("noinline", atname)
  	      || is_attribute_p ("visibility", atname)
  	      || is_attribute_p ("weak", atname)
! 	      || is_attribute_p ("weakref", atname))
  	    continue;
  
  	  /* Attribute leaf only applies to extern functions.
--- 2576,2583 ----
  	      || is_attribute_p ("noinline", atname)
  	      || is_attribute_p ("visibility", atname)
  	      || is_attribute_p ("weak", atname)
! 	      || is_attribute_p ("weakref", atname)
! 	      || is_attribute_p ("target_clones", atname))
  	    continue;
  
  	  /* Attribute leaf only applies to extern functions.
*************** handle_copy_attribute (tree *node, tree
*** 2440,2446 ****
  	  /* Create a copy of just the one attribute ar AT, including
  	     its argumentsm and add it to DECL.  */
  	  tree attr = tree_cons (atname, copy_list (atargs), NULL_TREE);
! 	  decl_attributes (node, attr, flags, ref);
  	}
  
        /* Proceed to copy type attributes below.  */
--- 2590,2596 ----
  	  /* Create a copy of just the one attribute ar AT, including
  	     its argumentsm and add it to DECL.  */
  	  tree attr = tree_cons (atname, copy_list (atargs), NULL_TREE);
! 	  decl_attributes (node, attr, flags,  EXPR_P (ref) ? NULL_TREE : ref);
  	}
  
        /* Proceed to copy type attributes below.  */
*************** handle_copy_attribute (tree *node, tree
*** 2460,2474 ****
  
    /* Similarly, a function declared with attribute noreturn has it
       attached on to it, but a C11 _Noreturn function does not.  */
-   tree reftype = ref;
    if (DECL_P (ref)
        && TREE_THIS_VOLATILE (ref)
!       && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (reftype)))
      TREE_THIS_VOLATILE (decl) = true;
  
-   if (DECL_P (ref) || EXPR_P (ref))
-     reftype = TREE_TYPE (ref);
- 
    if (POINTER_TYPE_P (reftype))
      reftype = TREE_TYPE (reftype);
  
--- 2610,2620 ----
  
    /* Similarly, a function declared with attribute noreturn has it
       attached on to it, but a C11 _Noreturn function does not.  */
    if (DECL_P (ref)
        && TREE_THIS_VOLATILE (ref)
!       && FUNC_OR_METHOD_TYPE_P (reftype))
      TREE_THIS_VOLATILE (decl) = true;
  
    if (POINTER_TYPE_P (reftype))
      reftype = TREE_TYPE (reftype);
  
*************** handle_copy_attribute (tree *node, tree
*** 2477,2485 ****
  
    tree attrs = TYPE_ATTRIBUTES (reftype);
  
!   /* Copy type attributes from REF to DECL.  */
    for (tree at = attrs; at; at = TREE_CHAIN (at))
!     decl_attributes (node, at, flags, ref);
  
    return NULL_TREE;
  }
--- 2623,2632 ----
  
    tree attrs = TYPE_ATTRIBUTES (reftype);
  
!   /* Copy type attributes from REF to DECL.  Pass in REF if it's a DECL
!      or a type but not if it's an expression.  */
    for (tree at = attrs; at; at = TREE_CHAIN (at))
!     decl_attributes (node, at, flags, EXPR_P (ref) ? NULL_TREE : ref);
  
    return NULL_TREE;
  }
*************** handle_copy_attribute (tree *node, tree
*** 2488,2494 ****
     attribute_spec.handler.  */
  
  static tree
! handle_weakref_attribute (tree *node, tree ARG_UNUSED (name), tree args,
  			  int flags, bool *no_add_attrs)
  {
    tree attr = NULL_TREE;
--- 2635,2641 ----
     attribute_spec.handler.  */
  
  static tree
! handle_weakref_attribute (tree *node, tree name, tree args,
  			  int flags, bool *no_add_attrs)
  {
    tree attr = NULL_TREE;
*************** handle_weakref_attribute (tree *node, tr
*** 2507,2513 ****
  
    if (lookup_attribute ("ifunc", DECL_ATTRIBUTES (*node)))
      {
!       error ("indirect function %q+D cannot be declared weakref", *node);
        *no_add_attrs = true;
        return NULL_TREE;
      }
--- 2654,2661 ----
  
    if (lookup_attribute ("ifunc", DECL_ATTRIBUTES (*node)))
      {
!       error ("indirect function %q+D cannot be declared %qE",
! 	     *node, name);
        *no_add_attrs = true;
        return NULL_TREE;
      }
*************** handle_weakref_attribute (tree *node, tr
*** 2529,2535 ****
      {
        if (lookup_attribute ("alias", DECL_ATTRIBUTES (*node)))
  	error_at (DECL_SOURCE_LOCATION (*node),
! 		  "weakref attribute must appear before alias attribute");
  
        /* Can't call declare_weak because it wants this to be TREE_PUBLIC,
  	 and that isn't supported; and because it wants to add it to
--- 2677,2684 ----
      {
        if (lookup_attribute ("alias", DECL_ATTRIBUTES (*node)))
  	error_at (DECL_SOURCE_LOCATION (*node),
! 		  "%qE attribute must appear before %qs attribute",
! 		  name, "alias");
  
        /* Can't call declare_weak because it wants this to be TREE_PUBLIC,
  	 and that isn't supported; and because it wants to add it to
*************** handle_weakref_attribute (tree *node, tr
*** 2541,2547 ****
      {
        struct symtab_node *n = symtab_node::get (*node);
        if (n && n->refuse_visibility_changes)
! 	error ("%+qD declared weakref after being used", *node);
      }
  
    return NULL_TREE;
--- 2690,2696 ----
      {
        struct symtab_node *n = symtab_node::get (*node);
        if (n && n->refuse_visibility_changes)
! 	error ("%+qD declared %qE after being used", *node, name);
      }
  
    return NULL_TREE;
*************** handle_visibility_attribute (tree *node,
*** 2612,2618 ****
      vis = VISIBILITY_PROTECTED;
    else
      {
!       error ("visibility argument must be one of \"default\", \"hidden\", \"protected\" or \"internal\"");
        vis = VISIBILITY_DEFAULT;
      }
  
--- 2761,2768 ----
      vis = VISIBILITY_PROTECTED;
    else
      {
!       error ("attribute %qE argument must be one of %qs, %qs, %qs, or %qs",
! 	     name, "default", "hidden", "protected", "internal");
        vis = VISIBILITY_DEFAULT;
      }
  
*************** handle_assume_aligned_attribute (tree *n
*** 2876,2883 ****
  	  /* The misalignment specified by the second argument
  	     must be non-negative and less than the alignment.  */
  	  warning (OPT_Wattributes,
! 		   "%qE attribute argument %E is not in the range [0, %E)",
! 		   name, val, align);
  	  *no_add_attrs = true;
  	  return NULL_TREE;
  	}
--- 3026,3033 ----
  	  /* The misalignment specified by the second argument
  	     must be non-negative and less than the alignment.  */
  	  warning (OPT_Wattributes,
! 		   "%qE attribute argument %E is not in the range [0, %wu]",
! 		   name, val, tree_to_uhwi (align) - 1);
  	  *no_add_attrs = true;
  	  return NULL_TREE;
  	}
*************** handle_omp_declare_simd_attribute (tree
*** 2929,2934 ****
--- 3079,3093 ----
    return NULL_TREE;
  }
  
+ /* Handle an "omp declare variant {base,variant}" attribute; arguments as in
+    struct attribute_spec.handler.  */
+ 
+ static tree
+ handle_omp_declare_variant_attribute (tree *, tree, tree, int, bool *)
+ {
+   return NULL_TREE;
+ }
+ 
  /* Handle a "simd" attribute.  */
  
  static tree
*************** handle_no_limit_stack_attribute (tree *n
*** 3024,3030 ****
    else if (DECL_INITIAL (decl))
      {
        error_at (DECL_SOURCE_LOCATION (decl),
! 		"can%'t set %qE attribute after definition", name);
        *no_add_attrs = true;
      }
    else
--- 3183,3189 ----
    else if (DECL_INITIAL (decl))
      {
        error_at (DECL_SOURCE_LOCATION (decl),
! 		"cannot set %qE attribute after definition", name);
        *no_add_attrs = true;
      }
    else
*************** parse_tm_stmt_attr (tree attrs, int allo
*** 3071,3080 ****
  
    for ( ; attrs ; attrs = TREE_CHAIN (attrs))
      {
!       tree a = TREE_PURPOSE (attrs);
        int m = 0;
  
!       if (is_attribute_p ("outer", a))
  	m = TM_STMT_ATTR_OUTER;
  
        if ((m & allowed) == 0)
--- 3230,3241 ----
  
    for ( ; attrs ; attrs = TREE_CHAIN (attrs))
      {
!       tree a = get_attribute_name (attrs);
!       tree ns = get_attribute_namespace (attrs);
        int m = 0;
  
!       if (is_attribute_p ("outer", a)
! 	  && (ns == NULL_TREE || strcmp (IDENTIFIER_POINTER (ns), "gnu") == 0))
  	m = TM_STMT_ATTR_OUTER;
  
        if ((m & allowed) == 0)
*************** find_tm_attribute (tree list)
*** 3153,3159 ****
  {
    for (; list ; list = TREE_CHAIN (list))
      {
!       tree name = TREE_PURPOSE (list);
        if (tm_attr_to_mask (name) != 0)
  	return name;
      }
--- 3314,3320 ----
  {
    for (; list ; list = TREE_CHAIN (list))
      {
!       tree name = get_attribute_name (list);
        if (tm_attr_to_mask (name) != 0)
  	return name;
      }
*************** handle_novops_attribute (tree *node, tre
*** 3310,3316 ****
  /* Handle a "deprecated" attribute; arguments as in
     struct attribute_spec.handler.  */
  
! static tree
  handle_deprecated_attribute (tree *node, tree name,
  			     tree args, int flags,
  			     bool *no_add_attrs)
--- 3471,3477 ----
  /* Handle a "deprecated" attribute; arguments as in
     struct attribute_spec.handler.  */
  
! tree
  handle_deprecated_attribute (tree *node, tree name,
  			     tree args, int flags,
  			     bool *no_add_attrs)
*************** handle_nonnull_attribute (tree *node, tr
*** 3564,3570 ****
  	  && (!TYPE_ATTRIBUTES (type)
  	      || !lookup_attribute ("type generic", TYPE_ATTRIBUTES (type))))
  	{
! 	  error ("nonnull attribute without arguments on a non-prototype");
  	  *no_add_attrs = true;
  	}
        return NULL_TREE;
--- 3725,3732 ----
  	  && (!TYPE_ATTRIBUTES (type)
  	      || !lookup_attribute ("type generic", TYPE_ATTRIBUTES (type))))
  	{
! 	  error ("%qE attribute without arguments on a non-prototype",
! 		 name);
  	  *no_add_attrs = true;
  	}
        return NULL_TREE;
*************** handle_nonstring_attribute (tree *node,
*** 3639,3644 ****
--- 3801,4209 ----
    return NULL_TREE;
  }
  
+ /* Given a function type FUNCTYPE, returns the type of the parameter
+    ARGNO or null if ARGNO exceeds the number of parameters.  On failure
+    set *NARGS to the number of function parameters.  */
+ 
+ static tree
+ get_argument_type (tree functype, unsigned argno, unsigned *nargs)
+ {
+   function_args_iterator iter;
+   function_args_iter_init (&iter, functype);
+ 
+   unsigned count = 0;
+ 
+   for ( ; iter.next; ++count, function_args_iter_next (&iter))
+     {
+       if (count + 1 == argno)
+ 	{
+ 	  tree argtype = function_args_iter_cond (&iter);
+ 	  if (VOID_TYPE_P (argtype))
+ 	    break;
+ 	  return argtype;
+ 	}
+     }
+ 
+   *nargs = count;
+   return NULL_TREE;
+ }
+ 
+ /* Appends ATTRSTR to the access string in ATTRS if one is there
+    or creates a new one and returns the concatenated access string.  */
+ 
+ static tree
+ append_access_attrs (tree t, tree attrs, const char *attrstr,
+ 		     char code, HOST_WIDE_INT idxs[2])
+ {
+   char attrspec[80];
+   int n1 = sprintf (attrspec, "%c%u", code, (unsigned) idxs[0] - 1);
+   int n2 = 0;
+   if (idxs[1])
+     n2 = sprintf (attrspec + n1 + 1, "%u", (unsigned) idxs[1] - 1);
+ 
+   size_t newlen = n1 + n2 + !!n2;
+   char *newspec = attrspec;
+ 
+   if (tree acs = lookup_attribute ("access", attrs))
+     {
+       /* The TREE_VALUE of an attribute is a TREE_LIST whose TREE_VALUE
+ 	 is the attribute argument's value.  */
+       acs = TREE_VALUE (acs);
+       gcc_assert (TREE_CODE (acs) == TREE_LIST);
+       acs = TREE_VALUE (acs);
+       gcc_assert (TREE_CODE (acs) == STRING_CST);
+ 
+       /* Check to make sure ATTRSPEC doesn't conflict with another
+ 	 access attribute specified in ATTRS by searching the access
+ 	 string in ATTRS for the position string formatted above into
+ 	 ATTRSPEC, and if it's found, that the two match.  */
+ 
+       const char *posstr = attrspec + 1;
+       const char *str = TREE_STRING_POINTER (acs);
+       const char *pos = str;
+       for ( ; ; pos += n1)
+ 	{
+ 	  pos = strstr (pos, posstr);
+ 	  if (!pos)
+ 	    break;
+ 
+ 	  if (ISDIGIT (pos[-1]) || ISDIGIT (pos[n1 -1]))
+ 	    continue;
+ 
+ 	  /* Found a matching positional argument.  */
+ 	  if (*attrspec != pos[-1])
+ 	    {
+ 	      /* Mismatch in access mode.  */
+ 	      auto_diagnostic_group d;
+ 	      if (warning (OPT_Wattributes,
+ 			   "attribute %qs mismatch with mode %qs",
+ 			   attrstr,
+ 			   (pos[-1] == 'r'
+ 			    ? "read_only"
+ 			    : (pos[-1] == 'w' ? "write_only" : "read_write")))
+ 		  && DECL_P (t))
+ 		inform (DECL_SOURCE_LOCATION (t),
+ 			"previous declaration here");
+ 	      return NULL_TREE;
+ 	    }
+ 
+ 	  if ((n2 && pos[n1 - 1] != ','))
+ 	    {
+ 	      /* Mismatch in the presence of the size argument.  */
+ 	      auto_diagnostic_group d;
+ 	      if (warning (OPT_Wattributes,
+ 			   "attribute %qs positional argument 2 conflicts "
+ 			   "with previous designation",
+ 			   attrstr)
+ 		  && DECL_P (t))
+ 		inform (DECL_SOURCE_LOCATION (t),
+ 			"previous declaration here");
+ 	      return NULL_TREE;
+ 	    }
+ 
+ 	  if (!n2 && pos[n1 - 1] == ',')
+ 	    {
+ 	      /* Mismatch in the presence of the size argument.  */
+ 	      auto_diagnostic_group d;
+ 	      if (warning (OPT_Wattributes,
+ 			   "attribute %qs missing positional argument 2 "
+ 			   "provided in previous designation",
+ 			   attrstr)
+ 		  && DECL_P (t))
+ 		inform (DECL_SOURCE_LOCATION (t),
+ 			"previous declaration here");
+ 	      return NULL_TREE;
+ 	    }
+ 
+ 	  if (n2 && strncmp (attrspec + n1 + 1, pos + n1, n2))
+ 	    {
+ 	      /* Mismatch in the value of the size argument.  */
+ 	      auto_diagnostic_group d;
+ 	      if (warning (OPT_Wattributes,
+ 			   "attribute %qs mismatched positional argument "
+ 			   "values %i and %i",
+ 			   attrstr, atoi (attrspec + n1 + 1) + 1,
+ 			   atoi (pos + n1) + 1)
+ 		  && DECL_P (t))
+ 		inform (DECL_SOURCE_LOCATION (t),
+ 			"previous declaration here");
+ 	      return NULL_TREE;
+ 	    }
+ 
+ 	  /* Avoid adding the same attribute specification.  */
+ 	  return NULL_TREE;
+ 	}
+ 
+       /* Connect the two substrings formatted above into a single one.  */
+       if (idxs[1])
+ 	attrspec[n1] = ',';
+ 
+       size_t len = strlen (str);
+       newspec = XNEWVEC (char, newlen + len + 1);
+       strcpy (newspec, str);
+       strcpy (newspec + len, attrspec);
+       newlen += len;
+     }
+   else if (idxs[1])
+     /* Connect the two substrings formatted above into a single one.  */
+     attrspec[n1] = ',';
+ 
+   tree ret = build_string (newlen + 1, newspec);
+   if (newspec != attrspec)
+     XDELETEVEC (newspec);
+   return ret;
+ }
+ 
+ /* Handle the access attribute (read_only, write_only, and read_write).  */
+ 
+ static tree
+ handle_access_attribute (tree *node, tree name, tree args,
+ 			 int ARG_UNUSED (flags), bool *no_add_attrs)
+ {
+   tree type = *node;
+   tree attrs = TYPE_ATTRIBUTES (type);
+ 
+   *no_add_attrs = true;
+ 
+   /* Verify a full prototype is provided so that the argument types
+      can be validated.  Avoid diagnosing type-generic built-ins since
+      those have no prototype.  */
+   if (!args
+       && !prototype_p (type)
+       && (!attrs || !lookup_attribute ("type generic", attrs)))
+     {
+       error ("attribute %qE without arguments on a non-prototype", name);
+       return NULL_TREE;
+     }
+ 
+   tree access_mode = TREE_VALUE (args);
+   if (TREE_CODE (access_mode) == STRING_CST)
+     {
+       /* This must be a recursive call to handle the condensed internal
+ 	 form of the attribute (see below).  Since all validation has
+ 	 been done simply return here, accepting the attribute as is.  */
+       *no_add_attrs = false;
+       return NULL_TREE;
+     }
+ 
+   /* Set to true when the access mode has the form of a function call
+      as in 'attribute (read_only (1, 2))'.  That's an easy mistake to
+      make and so worth a special diagnostic.  */
+   bool funcall = false;
+   if (TREE_CODE (access_mode) == CALL_EXPR)
+     {
+       access_mode = CALL_EXPR_FN (access_mode);
+       if (TREE_CODE (access_mode) != ADDR_EXPR)
+ 	{
+ 	  error ("attribute %qE invalid mode", name);
+ 	  return NULL_TREE;
+ 	}
+       access_mode = TREE_OPERAND (access_mode, 0);
+       access_mode = DECL_NAME (access_mode);
+       funcall = true;
+     }
+ 
+   const char* const access_str = IDENTIFIER_POINTER (access_mode);
+   const char *ps = access_str;
+   if (ps[0] == '_' && ps[1] == '_')
+     {
+       size_t len = strlen (ps);
+       if (ps[len - 1] == '_' && ps[len - 2] == '_')
+ 	ps += 2;
+     }
+ 
+   const bool read_only = strncmp (ps, "read_only", 9) == 0;
+   const bool write_only = strncmp (ps, "write_only", 10) == 0;
+   if (!read_only && !write_only && strncmp (ps, "read_write", 10))
+     {
+       error ("attribute %qE invalid mode %qs; expected one of "
+ 	     "%qs, %qs, or %qs", name, access_str,
+ 	     "read_only", "read_write", "write_only");
+       return NULL_TREE;
+     }
+ 
+   if (funcall)
+     {
+       error ("attribute %qE unexpected %<(%> after mode %qs; expected "
+ 	     "a positional argument or %<)%>",
+ 	     name, access_str);
+       return NULL_TREE;
+     }
+ 
+   args = TREE_CHAIN (args);
+   if (!args)
+     {
+       /* The first positional argument is required.  It may be worth
+ 	 dropping the requirement at some point and having read_only
+ 	 apply to all const-qualified pointers and read_write or
+ 	 write_only to the rest.  */
+       error ("attribute %<%E(%s)%> missing an argument",
+ 	     name, access_str);
+       return NULL_TREE;
+     }
+ 
+   /* One or more positional arguments have been specified.  Validate
+      them.  */
+   tree idxnodes[2] = { NULL_TREE, NULL_TREE };
+   tree argtypes[2] = { NULL_TREE, NULL_TREE };
+   /* 1-based attribute positional arguments or zero if not specified.
+      Invalid negative or excessive values are also stored but used
+      only in diagnostics.  */
+   HOST_WIDE_INT idxs[2] = { 0, 0 };
+ 
+   /* Number of function formal arguments (used in diagnostics).  */
+   unsigned nfuncargs = 0;
+   /* Number of (optional) attribute positional arguments.  */
+   unsigned nattrargs = 0;
+ 
+   for (unsigned i = 0; i != 2; ++i, args = TREE_CHAIN (args), ++nattrargs)
+     {
+       if (!args)
+ 	break;
+ 
+       idxnodes[i] = TREE_VALUE (args);
+ 
+       if (TREE_CODE (idxnodes[i]) != IDENTIFIER_NODE
+ 	  && TREE_CODE (idxnodes[i]) != FUNCTION_DECL)
+ 	idxnodes[i] = default_conversion (idxnodes[i]);
+ 
+       if (tree_fits_shwi_p (idxnodes[i]))
+ 	{
+ 	  idxs[i] = tree_to_shwi (idxnodes[i]);
+ 	  argtypes[i] = get_argument_type (type, idxs[i], &nfuncargs);
+ 	}
+     }
+ 
+   if ((nattrargs == 1 && !idxs[0])
+       || (nattrargs == 2 && (!idxs[0] || !idxs[1])))
+     {
+       if (idxnodes[1])
+ 	error ("attribute %<%E(%s, %E, %E)%> invalid positional argument %i",
+ 	       name, access_str, idxnodes[0], idxnodes[1], idxs[0] ? 2 : 1);
+       else
+ 	error ("attribute %<%E(%s, %E)%> invalid positional argument %i",
+ 	       name, access_str, idxnodes[0], idxs[0] ? 2 : 1);
+       return NULL_TREE;
+     }
+ 
+   /* Format the attribute specification to include in diagnostics.  */
+   char attrstr[80];
+   if (idxnodes[1])
+     snprintf (attrstr, sizeof attrstr, "%s(%s, %lli, %lli)",
+ 	      IDENTIFIER_POINTER (name), access_str,
+ 	      (long long) idxs[0], (long long) idxs[1]);
+   else if (idxnodes[0])
+     snprintf (attrstr, sizeof attrstr, "%s(%s, %lli)",
+ 	      IDENTIFIER_POINTER (name), access_str,
+ 	      (long long) idxs[0]);
+   else
+     snprintf (attrstr, sizeof attrstr, "%s(%s)",
+ 	      IDENTIFIER_POINTER (name), access_str);
+ 
+   /* Verify the positional argument values are in range.  */
+   if (!argtypes[0] || (idxnodes[1] && !argtypes[1]))
+     {
+       if (idxnodes[0])
+ 	{
+ 	  if (idxs[0] < 0 || idxs[1] < 0)
+ 	    error ("attribute %qs positional argument %i invalid value %wi",
+ 		   attrstr, idxs[0] < 0 ? 1 : 2,
+ 		   idxs[0] < 0 ? idxs[0] : idxs[1]);
+ 	  else
+ 	    error ("attribute %qs positional argument %i value %wi exceeds "
+ 		   "number of function arguments %u",
+ 		   attrstr, idxs[0] ? 1 : 2,
+ 		   idxs[0] ? idxs[0] : idxs[1],
+ 		   nfuncargs);
+ 	}
+       else
+ 	error ("attribute %qs invalid positional argument", attrstr);
+ 
+       return NULL_TREE;
+     }
+ 
+   if (!POINTER_TYPE_P (argtypes[0]))
+     {
+       /* The first argument must have a pointer or reference type.  */
+       error ("attribute %qs positional argument 1 references "
+ 	     "non-pointer argument type %qT",
+ 	     attrstr, argtypes[0]);
+       return NULL_TREE;
+     }
+ 
+   {
+     /* Pointers to functions are not allowed.  */
+     tree ptrtype = TREE_TYPE (argtypes[0]);
+     if (FUNC_OR_METHOD_TYPE_P (ptrtype))
+       {
+ 	error ("attribute %qs positional argument 1 references "
+ 	       "argument of function type %qT",
+ 	       attrstr, ptrtype);
+ 	return NULL_TREE;
+       }
+   }
+ 
+   if (!read_only)
+     {
+       /* A read_write and write_only modes must reference non-const
+ 	 arguments.  */
+       if (TYPE_READONLY (TREE_TYPE (argtypes[0])))
+ 	{
+ 	  error ("attribute %qs positional argument 1 references "
+ 		 "%qs-qualified argument type %qT",
+ 		 attrstr, "const", argtypes[0]);
+ 	  return NULL_TREE;
+ 	}
+     }
+   else if (!TYPE_READONLY (TREE_TYPE (argtypes[0])))
+     {
+       /* A read_only mode should ideally reference const-qualified
+ 	 arguments but it's not diagnosed error if one doesn't.
+ 	 This makes it possible to annotate legacy, const-incorrect
+ 	 APIs.  It might be worth a diagnostic along the lines of
+ 	 -Wsuggest-const.  */
+       ;
+     }
+ 
+   if (argtypes[1] && !INTEGRAL_TYPE_P (argtypes[1]))
+     {
+       error ("attribute %qs positional argument 2 references "
+ 	     "non-integer argument type %qT",
+ 	     attrstr, argtypes[1]);
+       return NULL_TREE;
+     }
+ 
+   /* Verify that the new attribute doesn't conflict with any existing
+      attributes specified on previous declarations of the same type
+      and if not, concatenate the two.  */
+   const char code = read_only ? 'r' : write_only ? 'w' : 'x';
+   tree new_attrs = append_access_attrs (node[0], attrs, attrstr, code, idxs);
+   if (!new_attrs)
+     return NULL_TREE;
+ 
+   /* Replace any existing access attribute specification with
+      the concatenation above.  */
+   new_attrs = tree_cons (NULL_TREE, new_attrs, NULL_TREE);
+   new_attrs = tree_cons (name, new_attrs, attrs);
+ 
+   if (node[1])
+     {
+       /* Repeat for the previously declared type.  */
+       attrs = TYPE_ATTRIBUTES (TREE_TYPE (node[1]));
+       tree attrs1 = append_access_attrs (node[1], attrs, attrstr, code, idxs);
+       if (!attrs1)
+ 	return NULL_TREE;
+ 
+       attrs1 = tree_cons (NULL_TREE, attrs1, NULL_TREE);
+       new_attrs = tree_cons (name, attrs1, attrs);
+     }
+ 
+   /* Recursively call self to "replace" the documented/external form
+      of the attribute with the condensend internal form.  */
+   decl_attributes (node, new_attrs, flags);
+   return NULL_TREE;
+ }
+ 
  /* Handle a "nothrow" attribute; arguments as in
     struct attribute_spec.handler.  */
  
*************** handle_no_split_stack_attribute (tree *n
*** 3915,3921 ****
    else if (DECL_INITIAL (decl))
      {
        error_at (DECL_SOURCE_LOCATION (decl),
! 		"can%'t set %qE attribute after definition", name);
        *no_add_attrs = true;
      }
  
--- 4480,4486 ----
    else if (DECL_INITIAL (decl))
      {
        error_at (DECL_SOURCE_LOCATION (decl),
! 		"cannot set %qE attribute after definition", name);
        *no_add_attrs = true;
      }
  
*************** handle_no_split_stack_attribute (tree *n
*** 3926,3938 ****
     struct attribute_spec.handler.  */
  
  static tree
! handle_returns_nonnull_attribute (tree *node, tree, tree, int,
  				  bool *no_add_attrs)
  {
    // Even without a prototype we still have a return type we can check.
    if (TREE_CODE (TREE_TYPE (*node)) != POINTER_TYPE)
      {
!       error ("returns_nonnull attribute on a function not returning a pointer");
        *no_add_attrs = true;
      }
    return NULL_TREE;
--- 4491,4503 ----
     struct attribute_spec.handler.  */
  
  static tree
! handle_returns_nonnull_attribute (tree *node, tree name, tree, int,
  				  bool *no_add_attrs)
  {
    // Even without a prototype we still have a return type we can check.
    if (TREE_CODE (TREE_TYPE (*node)) != POINTER_TYPE)
      {
!       error ("%qE attribute on a function not returning a pointer", name);
        *no_add_attrs = true;
      }
    return NULL_TREE;
*************** handle_designated_init_attribute (tree *
*** 3957,3967 ****
  /* Handle a "fallthrough" attribute; arguments as in struct
     attribute_spec.handler.  */
  
! static tree
  handle_fallthrough_attribute (tree *, tree name, tree, int,
  			      bool *no_add_attrs)
  {
!   warning (OPT_Wattributes, "%qE attribute ignored", name);
    *no_add_attrs = true;
    return NULL_TREE;
  }
--- 4522,4532 ----
  /* Handle a "fallthrough" attribute; arguments as in struct
     attribute_spec.handler.  */
  
! tree
  handle_fallthrough_attribute (tree *, tree name, tree, int,
  			      bool *no_add_attrs)
  {
!   pedwarn (input_location, OPT_Wattributes, "%qE attribute ignored", name);
    *no_add_attrs = true;
    return NULL_TREE;
  }
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-common.c gcc-10.1.0/gcc/c-family/c-common.c
*** gcc-9.3.0/gcc/c-family/c-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines shared by all languages that are variants of C.
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Subroutines shared by all languages that are variants of C.
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 48,53 ****
--- 48,54 ----
  #include "gimplify.h"
  #include "substring-locations.h"
  #include "spellcheck.h"
+ #include "c-spellcheck.h"
  #include "selftest.h"
  
  cpp_reader *parse_in;		/* Declared in c-pragma.h.  */
*************** const char *constant_string_class_name;
*** 249,259 ****
  
  int warn_abi_version = -1;
  
- /* Nonzero means generate separate instantiation control files and
-    juggle them at link time.  */
- 
- int flag_use_repository;
- 
  /* The C++ dialect being used.  Default set in c_common_post_options.  */
  
  enum cxx_dialect cxx_dialect = cxx_unset;
--- 250,255 ----
*************** static bool nonnull_check_p (tree, unsig
*** 326,333 ****
     C --std=c89: D_C99 | D_CXXONLY | D_OBJC | D_CXX_OBJC
     C --std=c99: D_CXXONLY | D_OBJC
     ObjC is like C except that D_OBJC and D_CXX_OBJC are not set
!    C++ --std=c++98: D_CONLY | D_CXX11 | D_OBJC
!    C++ --std=c++11: D_CONLY | D_OBJC
     ObjC++ is like C++ except that D_OBJC is not set
  
     If -fno-asm is used, D_ASM is added to the mask.  If
--- 322,330 ----
     C --std=c89: D_C99 | D_CXXONLY | D_OBJC | D_CXX_OBJC
     C --std=c99: D_CXXONLY | D_OBJC
     ObjC is like C except that D_OBJC and D_CXX_OBJC are not set
!    C++ --std=c++98: D_CONLY | D_CXX11 | D_CXX20 | D_OBJC
!    C++ --std=c++11: D_CONLY | D_CXX20 | D_OBJC
!    C++ --std=c++2a: D_CONLY | D_OBJC
     ObjC++ is like C++ except that D_OBJC is not set
  
     If -fno-asm is used, D_ASM is added to the mask.  If
*************** const struct c_common_resword c_common_r
*** 355,363 ****
    { "_Float32x",        RID_FLOAT32X,  D_CONLY },
    { "_Float64x",        RID_FLOAT64X,  D_CONLY },
    { "_Float128x",       RID_FLOAT128X, D_CONLY },
!   { "_Decimal32",       RID_DFLOAT32,  D_CONLY | D_EXT },
!   { "_Decimal64",       RID_DFLOAT64,  D_CONLY | D_EXT },
!   { "_Decimal128",      RID_DFLOAT128, D_CONLY | D_EXT },
    { "_Fract",           RID_FRACT,     D_CONLY | D_EXT },
    { "_Accum",           RID_ACCUM,     D_CONLY | D_EXT },
    { "_Sat",             RID_SAT,       D_CONLY | D_EXT },
--- 352,360 ----
    { "_Float32x",        RID_FLOAT32X,  D_CONLY },
    { "_Float64x",        RID_FLOAT64X,  D_CONLY },
    { "_Float128x",       RID_FLOAT128X, D_CONLY },
!   { "_Decimal32",       RID_DFLOAT32,  D_CONLY },
!   { "_Decimal64",       RID_DFLOAT64,  D_CONLY },
!   { "_Decimal128",      RID_DFLOAT128, D_CONLY },
    { "_Fract",           RID_FRACT,     D_CONLY | D_EXT },
    { "_Accum",           RID_ACCUM,     D_CONLY | D_EXT },
    { "_Sat",             RID_SAT,       D_CONLY | D_EXT },
*************** const struct c_common_resword c_common_r
*** 392,397 ****
--- 389,395 ----
    { "__complex__",	RID_COMPLEX,	0 },
    { "__const",		RID_CONST,	0 },
    { "__const__",	RID_CONST,	0 },
+   { "__constinit",	RID_CONSTINIT,	D_CXXONLY },
    { "__decltype",       RID_DECLTYPE,   D_CXXONLY },
    { "__direct_bases",   RID_DIRECT_BASES, D_CXXONLY },
    { "__extension__",	RID_EXTENSION,	0 },
*************** const struct c_common_resword c_common_r
*** 420,425 ****
--- 418,424 ----
    { "__is_literal_type", RID_IS_LITERAL_TYPE, D_CXXONLY },
    { "__is_pod",		RID_IS_POD,	D_CXXONLY },
    { "__is_polymorphic",	RID_IS_POLYMORPHIC, D_CXXONLY },
+   { "__is_same",     RID_IS_SAME_AS, D_CXXONLY },
    { "__is_same_as",     RID_IS_SAME_AS, D_CXXONLY },
    { "__is_standard_layout", RID_IS_STD_LAYOUT, D_CXXONLY },
    { "__is_trivial",     RID_IS_TRIVIAL, D_CXXONLY },
*************** const struct c_common_resword c_common_r
*** 461,467 ****
--- 460,468 ----
    { "char32_t",		RID_CHAR32,	D_CXXONLY | D_CXX11 | D_CXXWARN },
    { "class",		RID_CLASS,	D_CXX_OBJC | D_CXXWARN },
    { "const",		RID_CONST,	0 },
+   { "consteval",	RID_CONSTEVAL,	D_CXXONLY | D_CXX20 | D_CXXWARN },
    { "constexpr",	RID_CONSTEXPR,	D_CXXONLY | D_CXX11 | D_CXXWARN },
+   { "constinit",	RID_CONSTINIT,	D_CXXONLY | D_CXX20 | D_CXXWARN },
    { "const_cast",	RID_CONSTCAST,	D_CXXONLY | D_CXXWARN },
    { "continue",		RID_CONTINUE,	0 },
    { "decltype",         RID_DECLTYPE,   D_CXXONLY | D_CXX11 | D_CXXWARN },
*************** const struct c_common_resword c_common_r
*** 536,541 ****
--- 537,547 ----
    { "concept",		RID_CONCEPT,	D_CXX_CONCEPTS_FLAGS | D_CXXWARN },
    { "requires", 	RID_REQUIRES,	D_CXX_CONCEPTS_FLAGS | D_CXXWARN },
  
+   /* Coroutines-related keywords */
+   { "co_await",		RID_CO_AWAIT,	D_CXX_COROUTINES_FLAGS | D_CXXWARN },
+   { "co_yield",		RID_CO_YIELD,	D_CXX_COROUTINES_FLAGS | D_CXXWARN },
+   { "co_return", 	RID_CO_RETURN,	D_CXX_COROUTINES_FLAGS | D_CXXWARN },
+ 
    /* These Objective-C keywords are recognized only immediately after
       an '@'.  */
    { "compatibility_alias", RID_AT_ALIAS,	D_OBJC },
*************** c_build_vec_perm_expr (location_t loc, t
*** 1011,1017 ****
        || mask == error_mark_node)
      return error_mark_node;
  
!   if (!VECTOR_INTEGER_TYPE_P (TREE_TYPE (mask)))
      {
        if (complain)
  	error_at (loc, "%<__builtin_shuffle%> last argument must "
--- 1017,1024 ----
        || mask == error_mark_node)
      return error_mark_node;
  
!   if (!gnu_vector_type_p (TREE_TYPE (mask))
!       || !VECTOR_INTEGER_TYPE_P (TREE_TYPE (mask)))
      {
        if (complain)
  	error_at (loc, "%<__builtin_shuffle%> last argument must "
*************** c_build_vec_perm_expr (location_t loc, t
*** 1019,1026 ****
        return error_mark_node;
      }
  
!   if (!VECTOR_TYPE_P (TREE_TYPE (v0))
!       || !VECTOR_TYPE_P (TREE_TYPE (v1)))
      {
        if (complain)
  	error_at (loc, "%<__builtin_shuffle%> arguments must be vectors");
--- 1026,1033 ----
        return error_mark_node;
      }
  
!   if (!gnu_vector_type_p (TREE_TYPE (v0))
!       || !gnu_vector_type_p (TREE_TYPE (v1)))
      {
        if (complain)
  	error_at (loc, "%<__builtin_shuffle%> arguments must be vectors");
*************** c_build_vec_convert (location_t loc1, tr
*** 1095,1102 ****
    if (error_operand_p (expr))
      return error_mark_node;
  
!   if (!VECTOR_INTEGER_TYPE_P (TREE_TYPE (expr))
!       && !VECTOR_FLOAT_TYPE_P (TREE_TYPE (expr)))
      {
        if (complain)
  	error_at (loc1, "%<__builtin_convertvector%> first argument must "
--- 1102,1110 ----
    if (error_operand_p (expr))
      return error_mark_node;
  
!   if (!gnu_vector_type_p (TREE_TYPE (expr))
!       || (!VECTOR_INTEGER_TYPE_P (TREE_TYPE (expr))
! 	  && !VECTOR_FLOAT_TYPE_P (TREE_TYPE (expr))))
      {
        if (complain)
  	error_at (loc1, "%<__builtin_convertvector%> first argument must "
*************** c_build_vec_convert (location_t loc1, tr
*** 1104,1110 ****
        return error_mark_node;
      }
  
!   if (!VECTOR_INTEGER_TYPE_P (type) && !VECTOR_FLOAT_TYPE_P (type))
      {
        if (complain)
  	error_at (loc2, "%<__builtin_convertvector%> second argument must "
--- 1112,1119 ----
        return error_mark_node;
      }
  
!   if (!gnu_vector_type_p (type)
!       || (!VECTOR_INTEGER_TYPE_P (type) && !VECTOR_FLOAT_TYPE_P (type)))
      {
        if (complain)
  	error_at (loc2, "%<__builtin_convertvector%> second argument must "
*************** int_safely_convertible_to_real_p (const_
*** 1303,1311 ****
  	* EXPR is not a constant of integer type which cannot be
  	  exactly converted to real type.
  
!    Function allows conversions between types of different signedness and
!    can return SAFE_CONVERSION (zero) in that case.  Function can produce
!    signedness warnings if PRODUCE_WARNS is true.
  
     RESULT, when non-null is the result of the conversion.  When constant
     it is included in the text of diagnostics.
--- 1312,1320 ----
  	* EXPR is not a constant of integer type which cannot be
  	  exactly converted to real type.
  
!    Function allows conversions between types of different signedness if
!    CHECK_SIGN is false and can return SAFE_CONVERSION (zero) in that
!    case.  Function can return UNSAFE_SIGN if CHECK_SIGN is true.
  
     RESULT, when non-null is the result of the conversion.  When constant
     it is included in the text of diagnostics.
*************** int_safely_convertible_to_real_p (const_
*** 1315,1331 ****
     to TYPE.  */
  
  enum conversion_safety
! unsafe_conversion_p (location_t loc, tree type, tree expr, tree result,
! 		     bool produce_warns)
  {
    enum conversion_safety give_warning = SAFE_CONVERSION; /* is 0 or false */
    tree expr_type = TREE_TYPE (expr);
  
-   bool cstresult = (result
- 		    && TREE_CODE_CLASS (TREE_CODE (result)) == tcc_constant);
- 
-     loc = expansion_point_location_if_in_system_header (loc);
- 
    expr = fold_for_warn (expr);
  
    if (TREE_CODE (expr) == REAL_CST || TREE_CODE (expr) == INTEGER_CST)
--- 1324,1334 ----
     to TYPE.  */
  
  enum conversion_safety
! unsafe_conversion_p (tree type, tree expr, tree result, bool check_sign)
  {
    enum conversion_safety give_warning = SAFE_CONVERSION; /* is 0 or false */
    tree expr_type = TREE_TYPE (expr);
  
    expr = fold_for_warn (expr);
  
    if (TREE_CODE (expr) == REAL_CST || TREE_CODE (expr) == INTEGER_CST)
*************** unsafe_conversion_p (location_t loc, tre
*** 1351,1382 ****
  	  if (TYPE_UNSIGNED (type) && !TYPE_UNSIGNED (expr_type)
  	      && tree_int_cst_sgn (expr) < 0)
  	    {
! 	      if (produce_warns)
! 		{
! 		  if (cstresult)
! 		    warning_at (loc, OPT_Wsign_conversion,
! 				"unsigned conversion from %qT to %qT "
! 				"changes value from %qE to %qE",
! 				expr_type, type, expr, result);
! 		  else
! 		    warning_at (loc, OPT_Wsign_conversion,
! 				"unsigned conversion from %qT to %qT "
! 				"changes the value of %qE",
! 				expr_type, type, expr);
! 		}
  	    }
  	  else if (!TYPE_UNSIGNED (type) && TYPE_UNSIGNED (expr_type))
  	    {
! 	      if (cstresult)
! 		warning_at (loc, OPT_Wsign_conversion,
! 			    "signed conversion from %qT to %qT changes "
! 			    "value from %qE to %qE",
! 			    expr_type, type, expr, result);
! 	      else
! 		warning_at (loc, OPT_Wsign_conversion,
! 			    "signed conversion from %qT to %qT changes "
! 			    "the value of %qE",
! 			    expr_type, type, expr);
  	    }
  	  else
  	    give_warning = UNSAFE_OTHER;
--- 1354,1366 ----
  	  if (TYPE_UNSIGNED (type) && !TYPE_UNSIGNED (expr_type)
  	      && tree_int_cst_sgn (expr) < 0)
  	    {
! 	      if (check_sign)
! 		give_warning = UNSAFE_SIGN;
  	    }
  	  else if (!TYPE_UNSIGNED (type) && TYPE_UNSIGNED (expr_type))
  	    {
! 	      if (check_sign)
! 		give_warning = UNSAFE_SIGN;
  	    }
  	  else
  	    give_warning = UNSAFE_OTHER;
*************** unsafe_conversion_p (location_t loc, tre
*** 1415,1422 ****
  	   with different type of EXPR, but it is still safe, because when EXPR
  	   is a constant, it's type is not used in text of generated warnings
  	   (otherwise they could sound misleading).  */
! 	return unsafe_conversion_p (loc, type, TREE_REALPART (expr), result,
! 				    produce_warns);
        /* Conversion from complex constant with non-zero imaginary part.  */
        else
  	{
--- 1399,1406 ----
  	   with different type of EXPR, but it is still safe, because when EXPR
  	   is a constant, it's type is not used in text of generated warnings
  	   (otherwise they could sound misleading).  */
! 	return unsafe_conversion_p (type, TREE_REALPART (expr), result,
! 				    check_sign);
        /* Conversion from complex constant with non-zero imaginary part.  */
        else
  	{
*************** unsafe_conversion_p (location_t loc, tre
*** 1424,1444 ****
  	     Perform checks for both real and imaginary parts.  */
  	  if (TREE_CODE (type) == COMPLEX_TYPE)
  	    {
- 	      /* Unfortunately, produce_warns must be false in two subsequent
- 		 calls of unsafe_conversion_p, because otherwise we could
- 		 produce strange "double" warnings, if both real and imaginary
- 		 parts have conversion problems related to signedness.
- 
- 		 For example:
- 		 int32_t _Complex a = 0x80000000 + 0x80000000i;
- 
- 		 Possible solution: add a separate function for checking
- 		 constants and combine result of two calls appropriately.  */
  	      enum conversion_safety re_safety =
! 		  unsafe_conversion_p (loc, type, TREE_REALPART (expr),
! 				       result, false);
  	      enum conversion_safety im_safety =
! 		unsafe_conversion_p (loc, type, imag_part, result, false);
  
  	      /* Merge the results into appropriate single warning.  */
  
--- 1408,1418 ----
  	     Perform checks for both real and imaginary parts.  */
  	  if (TREE_CODE (type) == COMPLEX_TYPE)
  	    {
  	      enum conversion_safety re_safety =
! 		unsafe_conversion_p (type, TREE_REALPART (expr),
! 				     result, check_sign);
  	      enum conversion_safety im_safety =
! 		unsafe_conversion_p (type, imag_part, result, check_sign);
  
  	      /* Merge the results into appropriate single warning.  */
  
*************** unsafe_conversion_p (location_t loc, tre
*** 1521,1535 ****
  	  /* When they are the same width but different signedness,
  	     then the value may change.  */
  	  else if (((TYPE_PRECISION (type) == TYPE_PRECISION (expr_type)
! 		    && TYPE_UNSIGNED (expr_type) != TYPE_UNSIGNED (type))
! 		   /* Even when converted to a bigger type, if the type is
! 		      unsigned but expr is signed, then negative values
! 		      will be changed.  */
  		    || (TYPE_UNSIGNED (type) && !TYPE_UNSIGNED (expr_type)))
! 		   && produce_warns)
! 	    warning_at (loc, OPT_Wsign_conversion, "conversion to %qT from %qT "
! 			"may change the sign of the result",
! 			type, expr_type);
  	}
  
        /* Warn for integer types converted to real types if and only if
--- 1495,1507 ----
  	  /* When they are the same width but different signedness,
  	     then the value may change.  */
  	  else if (((TYPE_PRECISION (type) == TYPE_PRECISION (expr_type)
! 		     && TYPE_UNSIGNED (expr_type) != TYPE_UNSIGNED (type))
! 		    /* Even when converted to a bigger type, if the type is
! 		       unsigned but expr is signed, then negative values
! 		       will be changed.  */
  		    || (TYPE_UNSIGNED (type) && !TYPE_UNSIGNED (expr_type)))
! 		   && check_sign)
! 	    give_warning = UNSAFE_SIGN;
  	}
  
        /* Warn for integer types converted to real types if and only if
*************** unsafe_conversion_p (location_t loc, tre
*** 1585,1597 ****
  	      /* Check for different signedness, see case for real-domain
  		 integers (above) for a more detailed comment.  */
  	      else if (((TYPE_PRECISION (to_type) == TYPE_PRECISION (from_type)
! 		    && TYPE_UNSIGNED (to_type) != TYPE_UNSIGNED (from_type))
! 		    || (TYPE_UNSIGNED (to_type) && !TYPE_UNSIGNED (from_type)))
! 		    && produce_warns)
! 		warning_at (loc, OPT_Wsign_conversion,
! 			"conversion to %qT from %qT "
! 			"may change the sign of the result",
! 			type, expr_type);
  	    }
  	  else if (TREE_CODE (from_type) == INTEGER_TYPE
  		   && TREE_CODE (to_type) == REAL_TYPE
--- 1557,1566 ----
  	      /* Check for different signedness, see case for real-domain
  		 integers (above) for a more detailed comment.  */
  	      else if (((TYPE_PRECISION (to_type) == TYPE_PRECISION (from_type)
! 			 && TYPE_UNSIGNED (to_type) != TYPE_UNSIGNED (from_type))
! 			|| (TYPE_UNSIGNED (to_type) && !TYPE_UNSIGNED (from_type)))
! 		       && check_sign)
! 		give_warning = UNSAFE_SIGN;
  	    }
  	  else if (TREE_CODE (from_type) == INTEGER_TYPE
  		   && TREE_CODE (to_type) == REAL_TYPE
*************** verify_tree (tree x, struct tlist **pbef
*** 1889,1894 ****
--- 1858,1864 ----
      case COMPOUND_EXPR:
      case TRUTH_ANDIF_EXPR:
      case TRUTH_ORIF_EXPR:
+     sequenced_binary:
        tmp_before = tmp_nosp = tmp_list2 = tmp_list3 = 0;
        verify_tree (TREE_OPERAND (x, 0), &tmp_before, &tmp_nosp, NULL_TREE);
        warn_for_collisions (tmp_nosp);
*************** verify_tree (tree x, struct tlist **pbef
*** 2031,2038 ****
  	  x = TREE_OPERAND (x, 0);
  	  goto restart;
  	}
!       gcc_fallthrough ();
      default:
        /* For other expressions, simply recurse on their operands.
  	 Manual tail recursion for unary expressions.
  	 Other non-expressions need not be processed.  */
--- 2001,2018 ----
  	  x = TREE_OPERAND (x, 0);
  	  goto restart;
  	}
!       goto do_default;
! 
!     case LSHIFT_EXPR:
!     case RSHIFT_EXPR:
!     case COMPONENT_REF:
!     case ARRAY_REF:
!       if (cxx_dialect >= cxx17)
! 	goto sequenced_binary;
!       goto do_default;
! 
      default:
+     do_default:
        /* For other expressions, simply recurse on their operands.
  	 Manual tail recursion for unary expressions.
  	 Other non-expressions need not be processed.  */
*************** c_common_type_for_mode (machine_mode mod
*** 2307,2317 ****
  	return build_vector_type_for_mode (inner_type, mode);
      }
  
!   if (mode == TYPE_MODE (dfloat32_type_node))
      return dfloat32_type_node;
!   if (mode == TYPE_MODE (dfloat64_type_node))
      return dfloat64_type_node;
!   if (mode == TYPE_MODE (dfloat128_type_node))
      return dfloat128_type_node;
  
    if (ALL_SCALAR_FIXED_POINT_MODE_P (mode))
--- 2287,2300 ----
  	return build_vector_type_for_mode (inner_type, mode);
      }
  
!   if (dfloat32_type_node != NULL_TREE
!       && mode == TYPE_MODE (dfloat32_type_node))
      return dfloat32_type_node;
!   if (dfloat64_type_node != NULL_TREE
!       && mode == TYPE_MODE (dfloat64_type_node))
      return dfloat64_type_node;
!   if (dfloat128_type_node != NULL_TREE
!       && mode == TYPE_MODE (dfloat128_type_node))
      return dfloat128_type_node;
  
    if (ALL_SCALAR_FIXED_POINT_MODE_P (mode))
*************** c_common_type_for_mode (machine_mode mod
*** 2404,2413 ****
      }
  
    for (t = registered_builtin_types; t; t = TREE_CHAIN (t))
!     if (TYPE_MODE (TREE_VALUE (t)) == mode
! 	&& !!unsignedp == !!TYPE_UNSIGNED (TREE_VALUE (t)))
!       return TREE_VALUE (t);
! 
    return NULL_TREE;
  }
  
--- 2387,2399 ----
      }
  
    for (t = registered_builtin_types; t; t = TREE_CHAIN (t))
!     {
!       tree type = TREE_VALUE (t);
!       if (TYPE_MODE (type) == mode
! 	  && VECTOR_TYPE_P (type) == VECTOR_MODE_P (mode)
! 	  && !!unsignedp == !!TYPE_UNSIGNED (type))
! 	return type;
!     }
    return NULL_TREE;
  }
  
*************** shorten_compare (location_t loc, tree *o
*** 3063,3076 ****
  	    case GE_EXPR:
  	      if (warn)
  		warning_at (loc, OPT_Wtype_limits,
! 			    "comparison of unsigned expression >= 0 is always true");
  	      value = truthvalue_true_node;
  	      break;
  
  	    case LT_EXPR:
  	      if (warn)
  		warning_at (loc, OPT_Wtype_limits,
! 			    "comparison of unsigned expression < 0 is always false");
  	      value = truthvalue_false_node;
  	      break;
  
--- 3049,3064 ----
  	    case GE_EXPR:
  	      if (warn)
  		warning_at (loc, OPT_Wtype_limits,
! 			    "comparison of unsigned expression in %<>= 0%> "
! 			    "is always true");
  	      value = truthvalue_true_node;
  	      break;
  
  	    case LT_EXPR:
  	      if (warn)
  		warning_at (loc, OPT_Wtype_limits,
! 			    "comparison of unsigned expression in %<< 0%> "
! 			    "is always false");
  	      value = truthvalue_false_node;
  	      break;
  
*************** pointer_int_sum (location_t loc, enum tr
*** 3127,3132 ****
--- 3115,3123 ----
  	return error_mark_node;
        size_exp = integer_one_node;
      }
+   else if (!verify_type_context (loc, TCTX_POINTER_ARITH,
+ 				 TREE_TYPE (result_type)))
+     size_exp = integer_one_node;
    else
      size_exp = size_in_bytes_loc (loc, TREE_TYPE (result_type));
  
*************** c_common_truthvalue_conversion (location
*** 3379,3385 ****
        if (TREE_CODE (TREE_TYPE (expr)) == INTEGER_TYPE
  	  && !TYPE_UNSIGNED (TREE_TYPE (expr)))
  	warning_at (EXPR_LOCATION (expr), OPT_Wint_in_bool_context,
! 		    "%<<<%> in boolean context, did you mean %<<%> ?");
        break;
  
      case COND_EXPR:
--- 3370,3376 ----
        if (TREE_CODE (TREE_TYPE (expr)) == INTEGER_TYPE
  	  && !TYPE_UNSIGNED (TREE_TYPE (expr)))
  	warning_at (EXPR_LOCATION (expr), OPT_Wint_in_bool_context,
! 		    "%<<<%> in boolean context, did you mean %<<%>?");
        break;
  
      case COND_EXPR:
*************** c_common_truthvalue_conversion (location
*** 3395,3401 ****
  	      && (!integer_onep (val1)
  		  || !integer_onep (val2)))
  	    warning_at (EXPR_LOCATION (expr), OPT_Wint_in_bool_context,
! 			"?: using integer constants in boolean context, "
  			"the expression will always evaluate to %<true%>");
  	  else if ((TREE_CODE (val1) == INTEGER_CST
  		    && !integer_zerop (val1)
--- 3386,3392 ----
  	      && (!integer_onep (val1)
  		  || !integer_onep (val2)))
  	    warning_at (EXPR_LOCATION (expr), OPT_Wint_in_bool_context,
! 			"%<?:%> using integer constants in boolean context, "
  			"the expression will always evaluate to %<true%>");
  	  else if ((TREE_CODE (val1) == INTEGER_CST
  		    && !integer_zerop (val1)
*************** c_common_truthvalue_conversion (location
*** 3404,3410 ****
  		       && !integer_zerop (val2)
  		       && !integer_onep (val2)))
  	    warning_at (EXPR_LOCATION (expr), OPT_Wint_in_bool_context,
! 			"?: using integer constants in boolean context");
  	}
        /* Distribute the conversion into the arms of a COND_EXPR.  */
        if (c_dialect_cxx ())
--- 3395,3401 ----
  		       && !integer_zerop (val2)
  		       && !integer_onep (val2)))
  	    warning_at (EXPR_LOCATION (expr), OPT_Wint_in_bool_context,
! 			"%<?:%> using integer constants in boolean context");
  	}
        /* Distribute the conversion into the arms of a COND_EXPR.  */
        if (c_dialect_cxx ())
*************** c_sizeof_or_alignof_type (location_t loc
*** 3672,3677 ****
--- 3663,3675 ----
  		  "incomplete element type", op_name, type);
        return error_mark_node;
      }
+   else if (!verify_type_context (loc, is_sizeof ? TCTX_SIZEOF : TCTX_ALIGNOF,
+ 				 type, !complain))
+     {
+       if (!complain)
+ 	return error_mark_node;
+       value = size_one_node;
+     }
    else
      {
        if (is_sizeof)
*************** c_alignof_expr (location_t loc, tree exp
*** 3704,3710 ****
  {
    tree t;
  
!   if (VAR_OR_FUNCTION_DECL_P (expr))
      t = size_int (DECL_ALIGN_UNIT (expr));
  
    else if (TREE_CODE (expr) == COMPONENT_REF
--- 3702,3711 ----
  {
    tree t;
  
!   if (!verify_type_context (loc, TCTX_ALIGNOF, TREE_TYPE (expr)))
!     t = size_one_node;
! 
!   else if (VAR_OR_FUNCTION_DECL_P (expr))
      t = size_int (DECL_ALIGN_UNIT (expr));
  
    else if (TREE_CODE (expr) == COMPONENT_REF
*************** c_common_nodes_and_builtins (void)
*** 4022,4029 ****
--- 4023,4036 ----
        sprintf (name, "__int%d", int_n_data[i].bitsize);
        record_builtin_type ((enum rid)(RID_FIRST_INT_N + i), name,
  			   int_n_trees[i].signed_type);
+       sprintf (name, "__int%d__", int_n_data[i].bitsize);
+       record_builtin_type ((enum rid)(RID_FIRST_INT_N + i), name,
+ 			   int_n_trees[i].signed_type);
+ 
        sprintf (name, "__int%d unsigned", int_n_data[i].bitsize);
        record_builtin_type (RID_MAX, name, int_n_trees[i].unsigned_type);
+       sprintf (name, "__int%d__ unsigned", int_n_data[i].bitsize);
+       record_builtin_type (RID_MAX, name, int_n_trees[i].unsigned_type);
      }
  
    if (c_dialect_cxx ())
*************** c_common_nodes_and_builtins (void)
*** 4450,4457 ****
        va_list_ref_type_node = build_reference_type (va_list_type_node);
      }
  
!   if (!flag_preprocess_only)
!     c_define_builtins (va_list_ref_type_node, va_list_arg_type_node);
  
    main_identifier_node = get_identifier ("main");
  
--- 4457,4463 ----
        va_list_ref_type_node = build_reference_type (va_list_type_node);
      }
  
!   c_define_builtins (va_list_ref_type_node, va_list_arg_type_node);
  
    main_identifier_node = get_identifier ("main");
  
*************** c_stddef_cpp_builtins(void)
*** 5140,5145 ****
--- 5146,5155 ----
      builtin_define_with_value ("__INTPTR_TYPE__", INTPTR_TYPE, 0);
    if (UINTPTR_TYPE)
      builtin_define_with_value ("__UINTPTR_TYPE__", UINTPTR_TYPE, 0);
+   /* GIMPLE FE testcases need access to the GCC internal 'sizetype'.
+      Expose it as __SIZETYPE__.  */
+   if (flag_gimple)
+     builtin_define_with_value ("__SIZETYPE__", SIZETYPE, 0);
  }
  
  static void
*************** nonnull_check_p (tree args, unsigned HOS
*** 5458,5464 ****
  
    for (; args; args = TREE_CHAIN (args))
      {
!       bool found = get_nonnull_operand (TREE_VALUE (args), &arg_num);
  
        gcc_assert (found);
  
--- 5468,5474 ----
  
    for (; args; args = TREE_CHAIN (args))
      {
!       bool found = get_attribute_operand (TREE_VALUE (args), &arg_num);
  
        gcc_assert (found);
  
*************** check_nonnull_arg (void *ctx, tree param
*** 5493,5503 ****
      }
  }
  
! /* Helper for nonnull attribute handling; fetch the operand number
!    from the attribute argument list.  */
  
  bool
! get_nonnull_operand (tree arg_num_expr, unsigned HOST_WIDE_INT *valp)
  {
    /* Verify the arg number is a small constant.  */
    if (tree_fits_uhwi_p (arg_num_expr))
--- 5503,5513 ----
      }
  }
  
! /* Helper for attribute handling; fetch the operand number from
!    the attribute argument list.  */
  
  bool
! get_attribute_operand (tree arg_num_expr, unsigned HOST_WIDE_INT *valp)
  {
    /* Verify the arg number is a small constant.  */
    if (tree_fits_uhwi_p (arg_num_expr))
*************** attribute_fallthrough_p (tree attr)
*** 5677,5683 ****
      {
        tree name = get_attribute_name (t);
        if (!is_attribute_p ("fallthrough", name))
! 	warning (OPT_Wattributes, "%qE attribute ignored", name);
      }
    return true;
  }
--- 5687,5701 ----
      {
        tree name = get_attribute_name (t);
        if (!is_attribute_p ("fallthrough", name))
! 	{
! 	  if (!c_dialect_cxx () && get_attribute_namespace (t) == NULL_TREE)
! 	    /* The specifications of standard attributes in C mean
! 	       this is a constraint violation.  */
! 	    pedwarn (input_location, OPT_Wattributes, "%qE attribute ignored",
! 		     get_attribute_name (t));
! 	  else
! 	    warning (OPT_Wattributes, "%qE attribute ignored", name);
! 	}
      }
    return true;
  }
*************** check_function_arguments (location_t loc
*** 5714,5721 ****
    if (warn_format)
      check_function_sentinel (fntype, nargs, argarray);
  
!   if (warn_restrict)
!     warned_p |= check_function_restrict (fndecl, fntype, nargs, argarray);
    return warned_p;
  }
  
--- 5732,5757 ----
    if (warn_format)
      check_function_sentinel (fntype, nargs, argarray);
  
!   if (fndecl && fndecl_built_in_p (fndecl, BUILT_IN_NORMAL))
!     {
!       switch (DECL_FUNCTION_CODE (fndecl))
! 	{
! 	case BUILT_IN_SPRINTF:
! 	case BUILT_IN_SPRINTF_CHK:
! 	case BUILT_IN_SNPRINTF:
! 	case BUILT_IN_SNPRINTF_CHK:
! 	  /* Let the sprintf pass handle these.  */
! 	  return warned_p;
! 
! 	default:
! 	  break;
! 	}
!     }
! 
!   /* check_function_restrict sets the DECL_READ_P for arguments
!      so it must be called unconditionally.  */
!   warned_p |= check_function_restrict (fndecl, fntype, nargs, argarray);
! 
    return warned_p;
  }
  
*************** check_function_arguments_recurse (void (
*** 5751,5757 ****
        for (attrs = TYPE_ATTRIBUTES (type);
  	   attrs;
  	   attrs = TREE_CHAIN (attrs))
! 	if (is_attribute_p ("format_arg", TREE_PURPOSE (attrs)))
  	  {
  	    tree inner_arg;
  	    tree format_num_expr;
--- 5787,5793 ----
        for (attrs = TYPE_ATTRIBUTES (type);
  	   attrs;
  	   attrs = TREE_CHAIN (attrs))
! 	if (is_attribute_p ("format_arg", get_attribute_name (attrs)))
  	  {
  	    tree inner_arg;
  	    tree format_num_expr;
*************** builtin_function_validate_nargs (locatio
*** 5835,5849 ****
  /* Verifies the NARGS arguments ARGS to the builtin function FNDECL.
     Returns false if there was an error, otherwise true.  LOC is the
     location of the function; ARG_LOC is a vector of locations of the
!    arguments.  */
  
  bool
  check_builtin_function_arguments (location_t loc, vec<location_t> arg_loc,
! 				  tree fndecl, int nargs, tree *args)
  {
!   if (!fndecl_built_in_p (fndecl, BUILT_IN_NORMAL))
      return true;
  
    switch (DECL_FUNCTION_CODE (fndecl))
      {
      case BUILT_IN_ALLOCA_WITH_ALIGN_AND_MAX:
--- 5871,5897 ----
  /* Verifies the NARGS arguments ARGS to the builtin function FNDECL.
     Returns false if there was an error, otherwise true.  LOC is the
     location of the function; ARG_LOC is a vector of locations of the
!    arguments.  If FNDECL is the result of resolving an overloaded
!    target built-in, ORIG_FNDECL is the original function decl,
!    otherwise it is null.  */
  
  bool
  check_builtin_function_arguments (location_t loc, vec<location_t> arg_loc,
! 				  tree fndecl, tree orig_fndecl,
! 				  int nargs, tree *args)
  {
!   if (!fndecl_built_in_p (fndecl))
!     return true;
! 
!   if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_MD)
!     return (!targetm.check_builtin_call
! 	    || targetm.check_builtin_call (loc, arg_loc, fndecl,
! 					   orig_fndecl, nargs, args));
! 
!   if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_FRONTEND)
      return true;
  
+   gcc_assert (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_NORMAL);
    switch (DECL_FUNCTION_CODE (fndecl))
      {
      case BUILT_IN_ALLOCA_WITH_ALIGN_AND_MAX:
*************** check_builtin_function_arguments (locati
*** 5993,5998 ****
--- 6041,6053 ----
  			"has pointer to boolean type", fndecl);
  	      return false;
  	    }
+ 	  else if (TYPE_READONLY (TREE_TYPE (TREE_TYPE (args[2]))))
+ 	    {
+ 	      error_at (ARG_LOCATION (2), "argument 3 in call to function %qE "
+ 			"has pointer to %<const%> type (%qT)", fndecl,
+ 			TREE_TYPE (args[2]));
+ 	      return false;
+ 	    }
  	  return true;
  	}
        return false;
*************** tree
*** 7317,7324 ****
  resolve_overloaded_builtin (location_t loc, tree function,
  			    vec<tree, va_gc> *params)
  {
-   enum built_in_function orig_code = DECL_FUNCTION_CODE (function);
- 
    /* Is function one of the _FETCH_OP_ or _OP_FETCH_ built-ins?
       Those are not valid to call with a pointer to _Bool (or C++ bool)
       and so must be rejected.  */
--- 7372,7377 ----
*************** resolve_overloaded_builtin (location_t l
*** 7340,7345 ****
--- 7393,7399 ----
      }
  
    /* Handle BUILT_IN_NORMAL here.  */
+   enum built_in_function orig_code = DECL_FUNCTION_CODE (function);
    switch (orig_code)
      {
      case BUILT_IN_SPECULATION_SAFE_VALUE_N:
*************** resolve_overloaded_builtin (location_t l
*** 7348,7356 ****
  	enum built_in_function fncode
  	  = speculation_safe_value_resolve_call (function, params);;
  
  	first_param = (*params)[0];
! 	if (fncode == BUILT_IN_NONE
! 	    || !speculation_safe_value_resolve_params (loc, function, params))
  	  return error_mark_node;
  
  	if (targetm.have_speculation_safe_value (true))
--- 7402,7412 ----
  	enum built_in_function fncode
  	  = speculation_safe_value_resolve_call (function, params);;
  
+ 	if (fncode == BUILT_IN_NONE)
+ 	  return error_mark_node;
+ 
  	first_param = (*params)[0];
! 	if (!speculation_safe_value_resolve_params (loc, function, params))
  	  return error_mark_node;
  
  	if (targetm.have_speculation_safe_value (true))
*************** resolve_overloaded_builtin (location_t l
*** 7376,7382 ****
  	      warning_at (input_location, 0,
  			  "this target does not define a speculation barrier; "
  			  "your program will still execute correctly, "
! 			  "but incorrect speculation may not be be "
  			  "restricted");
  
  	    /* If the optional second argument is present, handle any side
--- 7432,7438 ----
  	      warning_at (input_location, 0,
  			  "this target does not define a speculation barrier; "
  			  "your program will still execute correctly, "
! 			  "but incorrect speculation may not be "
  			  "restricted");
  
  	    /* If the optional second argument is present, handle any side
*************** check_missing_format_attribute (tree lty
*** 7592,7604 ****
    tree ra;
  
    for (ra = TYPE_ATTRIBUTES (ttr); ra; ra = TREE_CHAIN (ra))
!     if (is_attribute_p ("format", TREE_PURPOSE (ra)))
        break;
    if (ra)
      {
        tree la;
        for (la = TYPE_ATTRIBUTES (ttl); la; la = TREE_CHAIN (la))
! 	if (is_attribute_p ("format", TREE_PURPOSE (la)))
  	  break;
        return !la;
      }
--- 7648,7660 ----
    tree ra;
  
    for (ra = TYPE_ATTRIBUTES (ttr); ra; ra = TREE_CHAIN (ra))
!     if (is_attribute_p ("format", get_attribute_name (ra)))
        break;
    if (ra)
      {
        tree la;
        for (la = TYPE_ATTRIBUTES (ttl); la; la = TREE_CHAIN (la))
! 	if (is_attribute_p ("format", get_attribute_name (la)))
  	  break;
        return !la;
      }
*************** set_underlying_type (tree x)
*** 7674,7679 ****
--- 7730,7781 ----
      }
  }
  
+ /* Return true if it is worth exposing the DECL_ORIGINAL_TYPE of TYPE to
+    the user in diagnostics, false if it would be better to use TYPE itself.
+    TYPE is known to satisfy typedef_variant_p.  */
+ 
+ bool
+ user_facing_original_type_p (const_tree type)
+ {
+   gcc_assert (typedef_variant_p (type));
+   tree decl = TYPE_NAME (type);
+ 
+   /* Look through any typedef in "user" code.  */
+   if (!DECL_IN_SYSTEM_HEADER (decl) && !DECL_IS_BUILTIN (decl))
+     return true;
+ 
+   /* If the original type is also named and is in the user namespace,
+      assume it too is a user-facing type.  */
+   tree orig_type = DECL_ORIGINAL_TYPE (decl);
+   if (tree orig_id = TYPE_IDENTIFIER (orig_type))
+     if (!name_reserved_for_implementation_p (IDENTIFIER_POINTER (orig_id)))
+       return true;
+ 
+   switch (TREE_CODE (orig_type))
+     {
+     /* Don't look through to an anonymous vector type, since the syntax
+        we use for them in diagnostics isn't real C or C++ syntax.
+        And if ORIG_TYPE is named but in the implementation namespace,
+        TYPE is likely to be more meaningful to the user.  */
+     case VECTOR_TYPE:
+       return false;
+ 
+     /* Don't expose anonymous tag types that are presumably meant to be
+        known by their typedef name.  Also don't expose tags that are in
+        the implementation namespace, such as:
+ 
+          typedef struct __foo foo;  */
+     case RECORD_TYPE:
+     case UNION_TYPE:
+     case ENUMERAL_TYPE:
+       return false;
+ 
+     /* Look through to anything else.  */
+     default:
+       return true;
+     }
+ }
+ 
  /* Record the types used by the current global variable declaration
     being parsed, so that we can decide later to emit their debug info.
     Those types are in types_used_by_cur_var_decl, and we are going to
*************** keyword_is_decl_specifier (enum rid keyw
*** 7898,7903 ****
--- 8000,8006 ----
      case RID_TYPEDEF:
      case RID_FRIEND:
      case RID_CONSTEXPR:
+     case RID_CONSTINIT:
        return true;
      default:
        return false;
*************** keyword_is_decl_specifier (enum rid keyw
*** 7909,7916 ****
  void
  c_common_init_ts (void)
  {
!   MARK_TS_TYPED (C_MAYBE_CONST_EXPR);
!   MARK_TS_TYPED (EXCESS_PRECISION_EXPR);
  }
  
  /* Build a user-defined numeric literal out of an integer constant type VALUE
--- 8012,8020 ----
  void
  c_common_init_ts (void)
  {
!   MARK_TS_EXP (SIZEOF_EXPR);
!   MARK_TS_EXP (C_MAYBE_CONST_EXPR);
!   MARK_TS_EXP (EXCESS_PRECISION_EXPR);
  }
  
  /* Build a user-defined numeric literal out of an integer constant type VALUE
*************** convert_vector_to_array_for_subscript (l
*** 7936,7942 ****
  				       tree *vecp, tree index)
  {
    bool ret = false;
!   if (VECTOR_TYPE_P (TREE_TYPE (*vecp)))
      {
        tree type = TREE_TYPE (*vecp);
  
--- 8040,8046 ----
  				       tree *vecp, tree index)
  {
    bool ret = false;
!   if (gnu_vector_type_p (TREE_TYPE (*vecp)))
      {
        tree type = TREE_TYPE (*vecp);
  
*************** scalar_to_vector (location_t loc, enum t
*** 7972,7978 ****
    bool integer_only_op = false;
    enum stv_conv ret = stv_firstarg;
  
!   gcc_assert (VECTOR_TYPE_P (type0) || VECTOR_TYPE_P (type1));
    switch (code)
      {
        /* Most GENERIC binary expressions require homogeneous arguments.
--- 8076,8082 ----
    bool integer_only_op = false;
    enum stv_conv ret = stv_firstarg;
  
!   gcc_assert (gnu_vector_type_p (type0) || gnu_vector_type_p (type1));
    switch (code)
      {
        /* Most GENERIC binary expressions require homogeneous arguments.
*************** scalar_to_vector (location_t loc, enum t
*** 7984,7990 ****
  	if (TREE_CODE (type0) == INTEGER_TYPE
  	    && TREE_CODE (TREE_TYPE (type1)) == INTEGER_TYPE)
  	  {
! 	    if (unsafe_conversion_p (loc, TREE_TYPE (type1), op0,
  				     NULL_TREE, false))
  	      {
  		if (complain)
--- 8088,8094 ----
  	if (TREE_CODE (type0) == INTEGER_TYPE
  	    && TREE_CODE (TREE_TYPE (type1)) == INTEGER_TYPE)
  	  {
! 	    if (unsafe_conversion_p (TREE_TYPE (type1), op0,
  				     NULL_TREE, false))
  	      {
  		if (complain)
*************** scalar_to_vector (location_t loc, enum t
*** 8023,8029 ****
        case LT_EXPR:
        case GT_EXPR:
        /* What about UNLT_EXPR?  */
! 	if (VECTOR_TYPE_P (type0))
  	  {
  	    ret = stv_secondarg;
  	    std::swap (type0, type1);
--- 8127,8133 ----
        case LT_EXPR:
        case GT_EXPR:
        /* What about UNLT_EXPR?  */
! 	if (gnu_vector_type_p (type0))
  	  {
  	    ret = stv_secondarg;
  	    std::swap (type0, type1);
*************** scalar_to_vector (location_t loc, enum t
*** 8033,8039 ****
  	if (TREE_CODE (type0) == INTEGER_TYPE
  	    && TREE_CODE (TREE_TYPE (type1)) == INTEGER_TYPE)
  	  {
! 	    if (unsafe_conversion_p (loc, TREE_TYPE (type1), op0,
  				     NULL_TREE, false))
  	      {
  		if (complain)
--- 8137,8143 ----
  	if (TREE_CODE (type0) == INTEGER_TYPE
  	    && TREE_CODE (TREE_TYPE (type1)) == INTEGER_TYPE)
  	  {
! 	    if (unsafe_conversion_p (TREE_TYPE (type1), op0,
  				     NULL_TREE, false))
  	      {
  		if (complain)
*************** scalar_to_vector (location_t loc, enum t
*** 8049,8055 ****
  		     || TREE_CODE (type0) == INTEGER_TYPE)
  		 && SCALAR_FLOAT_TYPE_P (TREE_TYPE (type1)))
  	  {
! 	    if (unsafe_conversion_p (loc, TREE_TYPE (type1), op0,
  				     NULL_TREE, false))
  	      {
  		if (complain)
--- 8153,8159 ----
  		     || TREE_CODE (type0) == INTEGER_TYPE)
  		 && SCALAR_FLOAT_TYPE_P (TREE_TYPE (type1)))
  	  {
! 	    if (unsafe_conversion_p (TREE_TYPE (type1), op0,
  				     NULL_TREE, false))
  	      {
  		if (complain)
*************** cb_get_source_date_epoch (cpp_reader *pf
*** 8258,8266 ****
    if (errno != 0 || endptr == source_date_epoch || *endptr != '\0'
        || epoch < 0 || epoch > MAX_SOURCE_DATE_EPOCH)
      {
!       error_at (input_location, "environment variable SOURCE_DATE_EPOCH must "
  	        "expand to a non-negative integer less than or equal to %wd",
! 		MAX_SOURCE_DATE_EPOCH);
        return (time_t) -1;
      }
  
--- 8362,8370 ----
    if (errno != 0 || endptr == source_date_epoch || *endptr != '\0'
        || epoch < 0 || epoch > MAX_SOURCE_DATE_EPOCH)
      {
!       error_at (input_location, "environment variable %qs must "
  	        "expand to a non-negative integer less than or equal to %wd",
! 		"SOURCE_DATE_EPOCH", MAX_SOURCE_DATE_EPOCH);
        return (time_t) -1;
      }
  
*************** c_ts18661_flt_eval_method (void)
*** 8326,8332 ****
      = targetm.c.excess_precision (EXCESS_PRECISION_TYPE_IMPLICIT);
  
    enum excess_precision_type flag_type
!     = (flag_excess_precision_cmdline == EXCESS_PRECISION_STANDARD
         ? EXCESS_PRECISION_TYPE_STANDARD
         : EXCESS_PRECISION_TYPE_FAST);
  
--- 8430,8436 ----
      = targetm.c.excess_precision (EXCESS_PRECISION_TYPE_IMPLICIT);
  
    enum excess_precision_type flag_type
!     = (flag_excess_precision == EXCESS_PRECISION_STANDARD
         ? EXCESS_PRECISION_TYPE_STANDARD
         : EXCESS_PRECISION_TYPE_FAST);
  
*************** try_to_locate_new_include_insertion_poin
*** 8585,8592 ****
  
    /*  Get ordinary map containing LOC (or its expansion).  */
    const line_map_ordinary *ord_map_for_loc = NULL;
!   loc = linemap_resolve_location (line_table, loc, LRK_MACRO_EXPANSION_POINT,
! 				  &ord_map_for_loc);
    gcc_assert (ord_map_for_loc);
  
    for (unsigned int i = 0; i < LINEMAPS_ORDINARY_USED (line_table); i++)
--- 8689,8696 ----
  
    /*  Get ordinary map containing LOC (or its expansion).  */
    const line_map_ordinary *ord_map_for_loc = NULL;
!   linemap_resolve_location (line_table, loc, LRK_MACRO_EXPANSION_POINT,
! 			    &ord_map_for_loc);
    gcc_assert (ord_map_for_loc);
  
    for (unsigned int i = 0; i < LINEMAPS_ORDINARY_USED (line_table); i++)
*************** maybe_add_include_fixit (rich_location *
*** 8728,8736 ****
     the converted string on success or the original ctor on failure.  */
  
  static tree
! braced_list_to_string (tree type, tree ctor)
  {
!   if (!tree_fits_uhwi_p (TYPE_SIZE_UNIT (type)))
      return ctor;
  
    /* If the array has an explicit bound, use it to constrain the size
--- 8832,8843 ----
     the converted string on success or the original ctor on failure.  */
  
  static tree
! braced_list_to_string (tree type, tree ctor, bool member)
  {
!   /* Ignore non-members with unknown size like arrays with unspecified
!      bound.  */
!   tree typesize = TYPE_SIZE_UNIT (type);
!   if (!member && !tree_fits_uhwi_p (typesize))
      return ctor;
  
    /* If the array has an explicit bound, use it to constrain the size
*************** braced_list_to_string (tree type, tree c
*** 8738,8747 ****
       as long as implied by the index of the last zero specified via
       a designator, as in:
         const char a[] = { [7] = 0 };  */
!   unsigned HOST_WIDE_INT maxelts = tree_to_uhwi (TYPE_SIZE_UNIT (type));
!   maxelts /= tree_to_uhwi (TYPE_SIZE_UNIT (TREE_TYPE (type)));
  
!   /* Avoid converting initializers for zero-length arrays.  */
    if (!maxelts)
      return ctor;
  
--- 8845,8861 ----
       as long as implied by the index of the last zero specified via
       a designator, as in:
         const char a[] = { [7] = 0 };  */
!   unsigned HOST_WIDE_INT maxelts;
!   if (typesize)
!     {
!       maxelts = tree_to_uhwi (typesize);
!       maxelts /= tree_to_uhwi (TYPE_SIZE_UNIT (TREE_TYPE (type)));
!     }
!   else
!     maxelts = HOST_WIDE_INT_M1U;
  
!   /* Avoid converting initializers for zero-length arrays (but do
!      create them for flexible array members).  */
    if (!maxelts)
      return ctor;
  
*************** braced_list_to_string (tree type, tree c
*** 8799,8805 ****
      }
  
    /* Append a nul string termination.  */
!   if (str.length () < maxelts)
      str.safe_push (0);
  
    /* Build a STRING_CST with the same type as the array.  */
--- 8913,8919 ----
      }
  
    /* Append a nul string termination.  */
!   if (maxelts != HOST_WIDE_INT_M1U && str.length () < maxelts)
      str.safe_push (0);
  
    /* Build a STRING_CST with the same type as the array.  */
*************** braced_list_to_string (tree type, tree c
*** 8808,8821 ****
    return res;
  }
  
! /* Attempt to convert a CTOR containing braced array initializer lists
!    for array TYPE into one containing STRING_CSTs, for convenience and
!    efficiency.  Recurse for arrays of arrays and member initializers.
!    Return the converted CTOR or STRING_CST on success or the original
!    CTOR otherwise.  */
  
! tree
! braced_lists_to_strings (tree type, tree ctor)
  {
    if (TREE_CODE (ctor) != CONSTRUCTOR)
      return ctor;
--- 8922,8933 ----
    return res;
  }
  
! /* Implementation of the two-argument braced_lists_to_string withe
!    the same arguments plus MEMBER which is set for struct members
!    to allow initializers for flexible member arrays.  */
  
! static tree
! braced_lists_to_strings (tree type, tree ctor, bool member)
  {
    if (TREE_CODE (ctor) != CONSTRUCTOR)
      return ctor;
*************** braced_lists_to_strings (tree type, tree
*** 8837,8854 ****
    else
      return ctor;
  
!   if (TYPE_STRING_FLAG (ttp))
!     return braced_list_to_string (type, ctor);
  
    code = TREE_CODE (ttp);
!   if (code == ARRAY_TYPE || code == RECORD_TYPE)
      {
        /* Handle array of arrays or struct member initializers.  */
        tree val;
        unsigned HOST_WIDE_INT idx;
        FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (ctor), idx, val)
  	{
! 	  val = braced_lists_to_strings (ttp, val);
  	  CONSTRUCTOR_ELT (ctor, idx)->value = val;
  	}
      }
--- 8949,8969 ----
    else
      return ctor;
  
!   if ((TREE_CODE (ttp) == ARRAY_TYPE || TREE_CODE (ttp) == INTEGER_TYPE)
!       && TYPE_STRING_FLAG (ttp))
!     return braced_list_to_string (type, ctor, member);
  
    code = TREE_CODE (ttp);
!   if (code == ARRAY_TYPE || RECORD_OR_UNION_TYPE_P (ttp))
      {
+       bool rec = RECORD_OR_UNION_TYPE_P (ttp);
+ 
        /* Handle array of arrays or struct member initializers.  */
        tree val;
        unsigned HOST_WIDE_INT idx;
        FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (ctor), idx, val)
  	{
! 	  val = braced_lists_to_strings (ttp, val, rec);
  	  CONSTRUCTOR_ELT (ctor, idx)->value = val;
  	}
      }
*************** braced_lists_to_strings (tree type, tree
*** 8856,8859 ****
--- 8971,8986 ----
    return ctor;
  }
  
+ /* Attempt to convert a CTOR containing braced array initializer lists
+    for array TYPE into one containing STRING_CSTs, for convenience and
+    efficiency.  Recurse for arrays of arrays and member initializers.
+    Return the converted CTOR or STRING_CST on success or the original
+    CTOR otherwise.  */
+ 
+ tree
+ braced_lists_to_strings (tree type, tree ctor)
+ {
+   return braced_lists_to_strings (type, ctor, false);
+ }
+ 
  #include "gt-c-family-c-common.h"
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-common.def gcc-10.1.0/gcc/c-family/c-common.def
*** gcc-9.3.0/gcc/c-family/c-common.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-common.def	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* This file contains the definitions and documentation for the
     additional tree codes used in the GNU C compiler (see tree.def
     for the standard codes).
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
     Written by Benjamin Chelf <chelf@codesourcery.com>
  
  This file is part of GCC.
--- 1,7 ----
  /* This file contains the definitions and documentation for the
     additional tree codes used in the GNU C compiler (see tree.def
     for the standard codes).
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
     Written by Benjamin Chelf <chelf@codesourcery.com>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-common.h gcc-10.1.0/gcc/c-family/c-common.h
*** gcc-9.3.0/gcc/c-family/c-common.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-common.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for c-common.c.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for c-common.c.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** enum rid
*** 180,191 ****
--- 180,197 ----
    /* C++11 */
    RID_CONSTEXPR, RID_DECLTYPE, RID_NOEXCEPT, RID_NULLPTR, RID_STATIC_ASSERT,
  
+   /* C++20 */
+   RID_CONSTINIT, RID_CONSTEVAL,
+ 
    /* char8_t */
    RID_CHAR8,
  
    /* C++ concepts */
    RID_CONCEPT, RID_REQUIRES,
  
+   /* C++ coroutines */
+   RID_CO_AWAIT, RID_CO_YIELD, RID_CO_RETURN,
+ 
    /* C++ transactional memory.  */
    RID_ATOMIC_NOEXCEPT, RID_ATOMIC_CANCEL, RID_SYNCHRONIZED,
  
*************** enum rid
*** 250,255 ****
--- 256,263 ----
  
    RID_FIRST_CXX11 = RID_CONSTEXPR,
    RID_LAST_CXX11 = RID_STATIC_ASSERT,
+   RID_FIRST_CXX20 = RID_CONSTINIT,
+   RID_LAST_CXX20 = RID_CONSTINIT,
    RID_FIRST_AT = RID_AT_ENCODE,
    RID_LAST_AT = RID_AT_IMPLEMENTATION,
    RID_FIRST_PQ = RID_IN,
*************** extern machine_mode c_default_pointer_mo
*** 427,435 ****
--- 435,446 ----
  #define D_CXX_CONCEPTS  0x0400	/* In C++, only with concepts.  */
  #define D_TRANSMEM	0X0800	/* C++ transactional memory TS.  */
  #define D_CXX_CHAR8_T	0X1000	/* In C++, only with -fchar8_t.  */
+ #define D_CXX20		0x2000  /* In C++, C++20 only.  */
+ #define D_CXX_COROUTINES 0x4000  /* In C++, only with coroutines.  */
  
  #define D_CXX_CONCEPTS_FLAGS D_CXXONLY | D_CXX_CONCEPTS
  #define D_CXX_CHAR8_T_FLAGS D_CXXONLY | D_CXX_CHAR8_T
+ #define D_CXX_COROUTINES_FLAGS (D_CXXONLY | D_CXX_COROUTINES)
  
  /* The reserved keyword table.  */
  extern const struct c_common_resword c_common_reswords[];
*************** extern int warn_abi_version;
*** 695,705 ****
     != (warn_abi_version == 0			\
         || warn_abi_version >= (N)))
  
- /* Nonzero means generate separate instantiation control files and
-    juggle them at link time.  */
- 
- extern int flag_use_repository;
- 
  /* The supported C++ dialects.  */
  
  enum cxx_dialect {
--- 706,711 ----
*************** extern bool done_lexing;
*** 756,761 ****
--- 762,777 ----
  #define C_TYPE_OBJECT_OR_INCOMPLETE_P(type) \
    (!C_TYPE_FUNCTION_P (type))
  
+ /* Return true if TYPE is a vector type that should be subject to the GNU
+    vector extensions (as opposed to a vector type that is used only for
+    the purposes of defining target-specific built-in functions).  */
+ 
+ inline bool
+ gnu_vector_type_p (const_tree type)
+ {
+   return TREE_CODE (type) == VECTOR_TYPE && !TYPE_INDIVISIBLE_P (type);
+ }
+ 
  struct visibility_flags
  {
    unsigned inpragma : 1;	/* True when in #pragma GCC visibility.  */
*************** enum conversion_safety {
*** 768,775 ****
    SAFE_CONVERSION = 0,
    /* Another type of conversion with problems.  */
    UNSAFE_OTHER,
!   /* Conversion between signed and unsigned integers
!      which are all warned about immediately, so this is unused.  */
    UNSAFE_SIGN,
    /* Conversions that reduce the precision of reals including conversions
       from reals to integers.  */
--- 784,790 ----
    SAFE_CONVERSION = 0,
    /* Another type of conversion with problems.  */
    UNSAFE_OTHER,
!   /* Conversion between signed and unsigned integers.  */
    UNSAFE_SIGN,
    /* Conversions that reduce the precision of reals including conversions
       from reals to integers.  */
*************** extern bool in_late_binary_op;
*** 801,806 ****
--- 816,822 ----
  extern const char *c_addr_space_name (addr_space_t as);
  extern tree identifier_global_value (tree);
  extern tree identifier_global_tag (tree);
+ extern bool names_builtin_p (const char *);
  extern tree c_linkage_bindings (tree);
  extern void record_builtin_type (enum rid, const char *, tree);
  extern tree build_void_list_node (void);
*************** extern void check_function_arguments_rec
*** 818,824 ****
  					      void *, tree,
  					      unsigned HOST_WIDE_INT);
  extern bool check_builtin_function_arguments (location_t, vec<location_t>,
! 					      tree, int, tree *);
  extern void check_function_format (const_tree, tree, int, tree *,
  				   vec<location_t> *);
  extern bool attribute_fallthrough_p (tree);
--- 834,840 ----
  					      void *, tree,
  					      unsigned HOST_WIDE_INT);
  extern bool check_builtin_function_arguments (location_t, vec<location_t>,
! 					      tree, tree, int, tree *);
  extern void check_function_format (const_tree, tree, int, tree *,
  				   vec<location_t> *);
  extern bool attribute_fallthrough_p (tree);
*************** extern tree c_common_signed_type (tree);
*** 837,844 ****
  extern tree c_common_signed_or_unsigned_type (int, tree);
  extern void c_common_init_ts (void);
  extern tree c_build_bitfield_integer_type (unsigned HOST_WIDE_INT, int);
! extern enum conversion_safety unsafe_conversion_p (location_t, tree, tree, tree,
! 						   bool);
  extern bool decl_with_nonnull_addr_p (const_tree);
  extern tree c_fully_fold (tree, bool, bool *, bool = false);
  extern tree c_wrap_maybe_const (tree, bool);
--- 853,859 ----
  extern tree c_common_signed_or_unsigned_type (int, tree);
  extern void c_common_init_ts (void);
  extern tree c_build_bitfield_integer_type (unsigned HOST_WIDE_INT, int);
! extern enum conversion_safety unsafe_conversion_p (tree, tree, tree, bool);
  extern bool decl_with_nonnull_addr_p (const_tree);
  extern tree c_fully_fold (tree, bool, bool *, bool = false);
  extern tree c_wrap_maybe_const (tree, bool);
*************** extern bool pointer_to_zero_sized_aggr_p
*** 869,875 ****
  extern bool bool_promoted_to_int_p (tree);
  extern tree fold_for_warn (tree);
  extern tree c_common_get_narrower (tree, int *);
! extern bool get_nonnull_operand (tree, unsigned HOST_WIDE_INT *);
  
  #define c_sizeof(LOC, T)  c_sizeof_or_alignof_type (LOC, T, true, false, 1)
  #define c_alignof(LOC, T) c_sizeof_or_alignof_type (LOC, T, false, false, 1)
--- 884,890 ----
  extern bool bool_promoted_to_int_p (tree);
  extern tree fold_for_warn (tree);
  extern tree c_common_get_narrower (tree, int *);
! extern bool get_attribute_operand (tree, unsigned HOST_WIDE_INT *);
  
  #define c_sizeof(LOC, T)  c_sizeof_or_alignof_type (LOC, T, true, false, 1)
  #define c_alignof(LOC, T) c_sizeof_or_alignof_type (LOC, T, false, false, 1)
*************** extern bool c_switch_covers_all_cases_p
*** 995,1001 ****
  extern tree build_function_call (location_t, tree, tree);
  
  extern tree build_function_call_vec (location_t, vec<location_t>, tree,
! 				     vec<tree, va_gc> *, vec<tree, va_gc> *);
  
  extern tree resolve_overloaded_builtin (location_t, tree, vec<tree, va_gc> *);
  
--- 1010,1017 ----
  extern tree build_function_call (location_t, tree, tree);
  
  extern tree build_function_call_vec (location_t, vec<location_t>, tree,
! 				     vec<tree, va_gc> *, vec<tree, va_gc> *,
! 				     tree = NULL_TREE);
  
  extern tree resolve_overloaded_builtin (location_t, tree, vec<tree, va_gc> *);
  
*************** extern bool c_cpp_diagnostic (cpp_reader
*** 1021,1026 ****
--- 1037,1043 ----
  			      const char *, va_list *)
       ATTRIBUTE_GCC_DIAG(5,0);
  extern int c_common_has_attribute (cpp_reader *);
+ extern int c_common_has_builtin (cpp_reader *);
  
  extern bool parse_optimize_options (tree, bool);
  
*************** extern tree builtin_type_for_size (int,
*** 1062,1067 ****
--- 1079,1085 ----
  extern void c_common_mark_addressable_vec (tree);
  
  extern void set_underlying_type (tree);
+ extern bool user_facing_original_type_p (const_tree);
  extern void record_types_used_by_current_var_decl (tree);
  extern vec<tree, va_gc> *make_tree_vector (void);
  extern void release_tree_vector (vec<tree, va_gc> *);
*************** enum c_omp_clause_split
*** 1149,1155 ****
    C_OMP_CLAUSE_SPLIT_SIMD,
    C_OMP_CLAUSE_SPLIT_COUNT,
    C_OMP_CLAUSE_SPLIT_SECTIONS = C_OMP_CLAUSE_SPLIT_FOR,
!   C_OMP_CLAUSE_SPLIT_TASKLOOP = C_OMP_CLAUSE_SPLIT_FOR
  };
  
  enum c_omp_region_type
--- 1167,1174 ----
    C_OMP_CLAUSE_SPLIT_SIMD,
    C_OMP_CLAUSE_SPLIT_COUNT,
    C_OMP_CLAUSE_SPLIT_SECTIONS = C_OMP_CLAUSE_SPLIT_FOR,
!   C_OMP_CLAUSE_SPLIT_TASKLOOP = C_OMP_CLAUSE_SPLIT_FOR,
!   C_OMP_CLAUSE_SPLIT_LOOP = C_OMP_CLAUSE_SPLIT_FOR
  };
  
  enum c_omp_region_type
*************** extern tree c_omp_declare_simd_clauses_t
*** 1187,1192 ****
--- 1206,1214 ----
  extern void c_omp_declare_simd_clauses_to_decls (tree, tree);
  extern bool c_omp_predefined_variable (tree);
  extern enum omp_clause_default_kind c_omp_predetermined_sharing (tree);
+ extern tree c_omp_check_context_selector (location_t, tree);
+ extern void c_omp_mark_declare_variant (location_t, tree, tree);
+ extern const char *c_omp_map_clause_name (tree, bool);
  
  /* Return next tree in the chain for chain_next walking of tree nodes.  */
  static inline tree
*************** extern void warn_for_multistatement_macr
*** 1340,1351 ****
--- 1362,1377 ----
  
  /* In c-attribs.c.  */
  extern bool attribute_takes_identifier_p (const_tree);
+ extern tree handle_deprecated_attribute (tree *, tree, tree, int, bool *);
  extern tree handle_unused_attribute (tree *, tree, tree, int, bool *);
+ extern tree handle_fallthrough_attribute (tree *, tree, tree, int, bool *);
  extern int parse_tm_stmt_attr (tree, int);
  extern int tm_attr_to_mask (tree);
  extern tree tm_mask_to_attr (int);
  extern tree find_tm_attribute (tree);
  extern const struct attribute_spec::exclusions attr_cold_hot_exclusions[];
+ extern const struct attribute_spec::exclusions attr_noreturn_exclusions[];
+ extern tree handle_noreturn_attribute (tree *, tree, tree, int, bool *);
  
  /* In c-format.c.  */
  extern bool valid_format_string_type_p (tree);
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-cppbuiltin.c gcc-10.1.0/gcc/c-family/c-cppbuiltin.c
*** gcc-9.3.0/gcc/c-family/c-cppbuiltin.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-cppbuiltin.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Define builtin-in macros for the C family front ends.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Define builtin-in macros for the C family front ends.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** builtin_define_float_constants (const ch
*** 259,269 ****
    /* Since, for the supported formats, B is always a power of 2, we
       construct the following numbers directly as a hexadecimal
       constants.  */
!   get_max_float (fmt, buf, sizeof (buf));
  
    sprintf (name, "__%s_MAX__", name_prefix);
    builtin_define_with_hex_fp_value (name, type, decimal_dig, buf, fp_suffix, fp_cast);
  
    /* The minimum normalized positive floating-point number,
       b**(emin-1).  */
    sprintf (name, "__%s_MIN__", name_prefix);
--- 259,274 ----
    /* Since, for the supported formats, B is always a power of 2, we
       construct the following numbers directly as a hexadecimal
       constants.  */
!   get_max_float (fmt, buf, sizeof (buf), false);
  
    sprintf (name, "__%s_MAX__", name_prefix);
    builtin_define_with_hex_fp_value (name, type, decimal_dig, buf, fp_suffix, fp_cast);
  
+   get_max_float (fmt, buf, sizeof (buf), true);
+ 
+   sprintf (name, "__%s_NORM_MAX__", name_prefix);
+   builtin_define_with_hex_fp_value (name, type, decimal_dig, buf, fp_suffix, fp_cast);
+ 
    /* The minimum normalized positive floating-point number,
       b**(emin-1).  */
    sprintf (name, "__%s_MIN__", name_prefix);
*************** static bool
*** 746,752 ****
  c_cpp_flt_eval_method_iec_559 (void)
  {
    enum excess_precision_type front_end_ept
!     = (flag_excess_precision_cmdline == EXCESS_PRECISION_STANDARD
         ? EXCESS_PRECISION_TYPE_STANDARD
         : EXCESS_PRECISION_TYPE_FAST);
  
--- 751,757 ----
  c_cpp_flt_eval_method_iec_559 (void)
  {
    enum excess_precision_type front_end_ept
!     = (flag_excess_precision == EXCESS_PRECISION_STANDARD
         ? EXCESS_PRECISION_TYPE_STANDARD
         : EXCESS_PRECISION_TYPE_FAST);
  
*************** c_cpp_builtins (cpp_reader *pfile)
*** 871,882 ****
    /* For stddef.h.  They require macros defined in c-common.c.  */
    c_stddef_cpp_builtins ();
  
-   /* Set include test macros for all C/C++ (not for just C++11 etc.)
-      The builtins __has_include__ and __has_include_next__ are defined
-      in libcpp.  */
-   cpp_define (pfile, "__has_include(STR)=__has_include__(STR)");
-   cpp_define (pfile, "__has_include_next(STR)=__has_include_next__(STR)");
- 
    if (c_dialect_cxx ())
      {
        if (flag_weak && SUPPORTS_ONE_ONLY)
--- 876,881 ----
*************** c_cpp_builtins (cpp_reader *pfile)
*** 890,896 ****
        if (flag_rtti)
  	{
  	  cpp_define (pfile, "__GXX_RTTI");
! 	  cpp_define (pfile, "__cpp_rtti=199711");
  	}
  
        if (cxx_dialect >= cxx11)
--- 889,895 ----
        if (flag_rtti)
  	{
  	  cpp_define (pfile, "__GXX_RTTI");
! 	  cpp_define (pfile, "__cpp_rtti=199711L");
  	}
  
        if (cxx_dialect >= cxx11)
*************** c_cpp_builtins (cpp_reader *pfile)
*** 899,909 ****
        /* Binary literals have been allowed in g++ before C++11
  	 and were standardized for C++14.  */
        if (!pedantic || cxx_dialect > cxx11)
! 	cpp_define (pfile, "__cpp_binary_literals=201304");
  
        /* Similarly for hexadecimal floating point literals and C++17.  */
        if (!pedantic || cpp_get_options (parse_in)->extended_numbers)
! 	cpp_define (pfile, "__cpp_hex_float=201603");
  
        /* Arrays of runtime bound were removed from C++14, but we still
  	 support GNU VLAs.  Let's define this macro to a low number
--- 898,908 ----
        /* Binary literals have been allowed in g++ before C++11
  	 and were standardized for C++14.  */
        if (!pedantic || cxx_dialect > cxx11)
! 	cpp_define (pfile, "__cpp_binary_literals=201304L");
  
        /* Similarly for hexadecimal floating point literals and C++17.  */
        if (!pedantic || cpp_get_options (parse_in)->extended_numbers)
! 	cpp_define (pfile, "__cpp_hex_float=201603L");
  
        /* Arrays of runtime bound were removed from C++14, but we still
  	 support GNU VLAs.  Let's define this macro to a low number
*************** c_cpp_builtins (cpp_reader *pfile)
*** 911,1014 ****
  	 complain about use of VLAs.  */
        if (c_dialect_cxx ()
  	  && (pedantic ? warn_vla == 0 : warn_vla <= 0))
! 	cpp_define (pfile, "__cpp_runtime_arrays=198712");
  
        if (cxx_dialect >= cxx11)
  	{
  	  /* Set feature test macros for C++11.  */
  	  if (cxx_dialect <= cxx14)
! 	    cpp_define (pfile, "__cpp_unicode_characters=200704");
! 	  cpp_define (pfile, "__cpp_raw_strings=200710");
! 	  cpp_define (pfile, "__cpp_unicode_literals=200710");
! 	  cpp_define (pfile, "__cpp_user_defined_literals=200809");
! 	  cpp_define (pfile, "__cpp_lambdas=200907");
  	  if (cxx_dialect == cxx11)
! 	    cpp_define (pfile, "__cpp_constexpr=200704");
  	  if (cxx_dialect <= cxx14)
! 	    cpp_define (pfile, "__cpp_range_based_for=200907");
  	  if (cxx_dialect <= cxx14)
! 	    cpp_define (pfile, "__cpp_static_assert=200410");
! 	  cpp_define (pfile, "__cpp_decltype=200707");
! 	  cpp_define (pfile, "__cpp_attributes=200809");
! 	  cpp_define (pfile, "__cpp_rvalue_reference=200610");
! 	  cpp_define (pfile, "__cpp_rvalue_references=200610");
! 	  cpp_define (pfile, "__cpp_variadic_templates=200704");
! 	  cpp_define (pfile, "__cpp_initializer_lists=200806");
! 	  cpp_define (pfile, "__cpp_delegating_constructors=200604");
! 	  cpp_define (pfile, "__cpp_nsdmi=200809");
  	  if (!flag_new_inheriting_ctors)
! 	    cpp_define (pfile, "__cpp_inheriting_constructors=200802");
  	  else
! 	    cpp_define (pfile, "__cpp_inheriting_constructors=201511");
! 	  cpp_define (pfile, "__cpp_ref_qualifiers=200710");
! 	  cpp_define (pfile, "__cpp_alias_templates=200704");
  	}
        if (cxx_dialect > cxx11)
  	{
  	  /* Set feature test macros for C++14.  */
! 	  cpp_define (pfile, "__cpp_return_type_deduction=201304");
! 	  cpp_define (pfile, "__cpp_init_captures=201304");
! 	  cpp_define (pfile, "__cpp_generic_lambdas=201304");
  	  if (cxx_dialect <= cxx14)
! 	    cpp_define (pfile, "__cpp_constexpr=201304");
! 	  cpp_define (pfile, "__cpp_decltype_auto=201304");
! 	  cpp_define (pfile, "__cpp_aggregate_nsdmi=201304");
! 	  cpp_define (pfile, "__cpp_variable_templates=201304");
! 	  cpp_define (pfile, "__cpp_digit_separators=201309");
  	}
        if (cxx_dialect > cxx14)
  	{
  	  /* Set feature test macros for C++17.  */
! 	  cpp_define (pfile, "__cpp_unicode_characters=201411");
! 	  cpp_define (pfile, "__cpp_static_assert=201411");
! 	  cpp_define (pfile, "__cpp_namespace_attributes=201411");
! 	  cpp_define (pfile, "__cpp_enumerator_attributes=201411");
! 	  cpp_define (pfile, "__cpp_nested_namespace_definitions=201411");
! 	  cpp_define (pfile, "__cpp_fold_expressions=201603");
! 	  cpp_define (pfile, "__cpp_nontype_template_args=201411");
! 	  cpp_define (pfile, "__cpp_range_based_for=201603");
! 	  cpp_define (pfile, "__cpp_constexpr=201603");
! 	  cpp_define (pfile, "__cpp_if_constexpr=201606");
! 	  cpp_define (pfile, "__cpp_capture_star_this=201603");
! 	  cpp_define (pfile, "__cpp_inline_variables=201606");
! 	  cpp_define (pfile, "__cpp_aggregate_bases=201603");
! 	  cpp_define (pfile, "__cpp_deduction_guides=201703");
! 	  cpp_define (pfile, "__cpp_noexcept_function_type=201510");
  	  /* Old macro, superseded by
  	     __cpp_nontype_template_parameter_auto.  */
! 	  cpp_define (pfile, "__cpp_template_auto=201606");
! 	  cpp_define (pfile, "__cpp_structured_bindings=201606");
! 	  cpp_define (pfile, "__cpp_variadic_using=201611");
! 	  cpp_define (pfile, "__cpp_guaranteed_copy_elision=201606");
! 	  cpp_define (pfile, "__cpp_nontype_template_parameter_auto=201606");
  	}
        if (cxx_dialect > cxx17)
  	{
  	  /* Set feature test macros for C++2a.  */
! 	  cpp_define (pfile, "__cpp_conditional_explicit=201806");
! 	  cpp_define (pfile, "__cpp_nontype_template_parameter_class=201806");
! 	  cpp_define (pfile, "__cpp_impl_destroying_delete=201806");
  	}
        if (flag_concepts)
! 	cpp_define (pfile, "__cpp_concepts=201507");
        if (flag_tm)
  	/* Use a value smaller than the 201505 specified in
  	   the TS, since we don't yet support atomic_cancel.  */
! 	cpp_define (pfile, "__cpp_transactional_memory=201500");
        if (flag_sized_deallocation)
! 	cpp_define (pfile, "__cpp_sized_deallocation=201309");
        if (aligned_new_threshold)
  	{
! 	  cpp_define (pfile, "__cpp_aligned_new=201606");
  	  cpp_define_formatted (pfile, "__STDCPP_DEFAULT_NEW_ALIGNMENT__=%d",
  				aligned_new_threshold);
  	}
        if (flag_new_ttp)
! 	cpp_define (pfile, "__cpp_template_template_args=201611");
        if (flag_threadsafe_statics)
! 	cpp_define (pfile, "__cpp_threadsafe_static_init=200806");
        if (flag_char8_t)
!         cpp_define (pfile, "__cpp_char8_t=201811");
      }
    /* Note that we define this for C as well, so that we know if
       __attribute__((cleanup)) will interface with EH.  */
--- 910,1036 ----
  	 complain about use of VLAs.  */
        if (c_dialect_cxx ()
  	  && (pedantic ? warn_vla == 0 : warn_vla <= 0))
! 	cpp_define (pfile, "__cpp_runtime_arrays=198712L");
  
        if (cxx_dialect >= cxx11)
  	{
  	  /* Set feature test macros for C++11.  */
  	  if (cxx_dialect <= cxx14)
! 	    cpp_define (pfile, "__cpp_unicode_characters=200704L");
! 	  cpp_define (pfile, "__cpp_raw_strings=200710L");
! 	  cpp_define (pfile, "__cpp_unicode_literals=200710L");
! 	  cpp_define (pfile, "__cpp_user_defined_literals=200809L");
! 	  cpp_define (pfile, "__cpp_lambdas=200907L");
  	  if (cxx_dialect == cxx11)
! 	    cpp_define (pfile, "__cpp_constexpr=200704L");
  	  if (cxx_dialect <= cxx14)
! 	    cpp_define (pfile, "__cpp_range_based_for=200907L");
  	  if (cxx_dialect <= cxx14)
! 	    cpp_define (pfile, "__cpp_static_assert=200410L");
! 	  cpp_define (pfile, "__cpp_decltype=200707L");
! 	  cpp_define (pfile, "__cpp_attributes=200809L");
! 	  cpp_define (pfile, "__cpp_rvalue_reference=200610L");
! 	  cpp_define (pfile, "__cpp_rvalue_references=200610L");
! 	  cpp_define (pfile, "__cpp_variadic_templates=200704L");
! 	  cpp_define (pfile, "__cpp_initializer_lists=200806L");
! 	  cpp_define (pfile, "__cpp_delegating_constructors=200604L");
! 	  cpp_define (pfile, "__cpp_nsdmi=200809L");
  	  if (!flag_new_inheriting_ctors)
! 	    cpp_define (pfile, "__cpp_inheriting_constructors=200802L");
  	  else
! 	    cpp_define (pfile, "__cpp_inheriting_constructors=201511L");
! 	  cpp_define (pfile, "__cpp_ref_qualifiers=200710L");
! 	  cpp_define (pfile, "__cpp_alias_templates=200704L");
  	}
        if (cxx_dialect > cxx11)
  	{
  	  /* Set feature test macros for C++14.  */
! 	  cpp_define (pfile, "__cpp_return_type_deduction=201304L");
! 	  if (cxx_dialect <= cxx17)
! 	    {
! 	      cpp_define (pfile, "__cpp_init_captures=201304L");
! 	      cpp_define (pfile, "__cpp_generic_lambdas=201304L");
! 	    }
  	  if (cxx_dialect <= cxx14)
! 	    cpp_define (pfile, "__cpp_constexpr=201304L");
! 	  cpp_define (pfile, "__cpp_decltype_auto=201304L");
! 	  cpp_define (pfile, "__cpp_aggregate_nsdmi=201304L");
! 	  cpp_define (pfile, "__cpp_variable_templates=201304L");
! 	  cpp_define (pfile, "__cpp_digit_separators=201309L");
  	}
        if (cxx_dialect > cxx14)
  	{
  	  /* Set feature test macros for C++17.  */
! 	  cpp_define (pfile, "__cpp_unicode_characters=201411L");
! 	  cpp_define (pfile, "__cpp_static_assert=201411L");
! 	  cpp_define (pfile, "__cpp_namespace_attributes=201411L");
! 	  cpp_define (pfile, "__cpp_enumerator_attributes=201411L");
! 	  cpp_define (pfile, "__cpp_nested_namespace_definitions=201411L");
! 	  cpp_define (pfile, "__cpp_fold_expressions=201603L");
! 	  cpp_define (pfile, "__cpp_nontype_template_args=201411L");
! 	  cpp_define (pfile, "__cpp_range_based_for=201603L");
! 	  if (cxx_dialect <= cxx17)
! 	    cpp_define (pfile, "__cpp_constexpr=201603L");
! 	  cpp_define (pfile, "__cpp_if_constexpr=201606L");
! 	  cpp_define (pfile, "__cpp_capture_star_this=201603L");
! 	  cpp_define (pfile, "__cpp_inline_variables=201606L");
! 	  cpp_define (pfile, "__cpp_aggregate_bases=201603L");
! 	  if (cxx_dialect <= cxx17)
! 	    cpp_define (pfile, "__cpp_deduction_guides=201703L");
! 	  cpp_define (pfile, "__cpp_noexcept_function_type=201510L");
  	  /* Old macro, superseded by
  	     __cpp_nontype_template_parameter_auto.  */
! 	  cpp_define (pfile, "__cpp_template_auto=201606L");
! 	  cpp_define (pfile, "__cpp_structured_bindings=201606L");
! 	  cpp_define (pfile, "__cpp_variadic_using=201611L");
! 	  cpp_define (pfile, "__cpp_guaranteed_copy_elision=201606L");
! 	  cpp_define (pfile, "__cpp_nontype_template_parameter_auto=201606L");
  	}
        if (cxx_dialect > cxx17)
  	{
  	  /* Set feature test macros for C++2a.  */
! 	  cpp_define (pfile, "__cpp_init_captures=201803L");
! 	  cpp_define (pfile, "__cpp_generic_lambdas=201707L");
! 	  cpp_define (pfile, "__cpp_designated_initializers=201707L");
! 	  cpp_define (pfile, "__cpp_constexpr=201907L");
! 	  cpp_define (pfile, "__cpp_constexpr_in_decltype=201711L");
! 	  cpp_define (pfile, "__cpp_conditional_explicit=201806L");
! 	  /* cpp_define (pfile, "__cpp_consteval=201811L"); */
! 	  cpp_define (pfile, "__cpp_constinit=201907L");
! 	  cpp_define (pfile, "__cpp_deduction_guides=201907L");
! 	  cpp_define (pfile, "__cpp_nontype_template_parameter_class=201806L");
! 	  cpp_define (pfile, "__cpp_impl_destroying_delete=201806L");
! 	  cpp_define (pfile, "__cpp_constexpr_dynamic_alloc=201907L");
! 	  cpp_define (pfile, "__cpp_impl_three_way_comparison=201907L");
! 	  cpp_define (pfile, "__cpp_aggregate_paren_init=201902L");
  	}
        if (flag_concepts)
!         {
!           if (cxx_dialect >= cxx2a)
!             cpp_define (pfile, "__cpp_concepts=201907L");
!           else
!             cpp_define (pfile, "__cpp_concepts=201507L");
!         }
!       if (flag_coroutines)
! 	cpp_define (pfile, "__cpp_impl_coroutine=201902L"); /* n4861, DIS */
        if (flag_tm)
  	/* Use a value smaller than the 201505 specified in
  	   the TS, since we don't yet support atomic_cancel.  */
! 	cpp_define (pfile, "__cpp_transactional_memory=201500L");
        if (flag_sized_deallocation)
! 	cpp_define (pfile, "__cpp_sized_deallocation=201309L");
        if (aligned_new_threshold)
  	{
! 	  cpp_define (pfile, "__cpp_aligned_new=201606L");
  	  cpp_define_formatted (pfile, "__STDCPP_DEFAULT_NEW_ALIGNMENT__=%d",
  				aligned_new_threshold);
  	}
        if (flag_new_ttp)
! 	cpp_define (pfile, "__cpp_template_template_args=201611L");
        if (flag_threadsafe_statics)
! 	cpp_define (pfile, "__cpp_threadsafe_static_init=200806L");
        if (flag_char8_t)
!         cpp_define (pfile, "__cpp_char8_t=201811L");
      }
    /* Note that we define this for C as well, so that we know if
       __attribute__((cleanup)) will interface with EH.  */
*************** c_cpp_builtins (cpp_reader *pfile)
*** 1016,1022 ****
      {
        cpp_define (pfile, "__EXCEPTIONS");
        if (c_dialect_cxx ())
! 	cpp_define (pfile, "__cpp_exceptions=199711");
      }
  
    /* Represents the C++ ABI version, always defined so it can be used while
--- 1038,1044 ----
      {
        cpp_define (pfile, "__EXCEPTIONS");
        if (c_dialect_cxx ())
! 	cpp_define (pfile, "__cpp_exceptions=199711L");
      }
  
    /* Represents the C++ ABI version, always defined so it can be used while
*************** c_cpp_builtins (cpp_reader *pfile)
*** 1143,1152 ****
  				      csuffix, FLOATN_NX_TYPE_NODE (i));
      }
  
!   /* For decfloat.h.  */
!   builtin_define_decimal_float_constants ("DEC32", "DF", dfloat32_type_node);
!   builtin_define_decimal_float_constants ("DEC64", "DD", dfloat64_type_node);
!   builtin_define_decimal_float_constants ("DEC128", "DL", dfloat128_type_node);
  
    /* For fixed-point fibt, ibit, max, min, and epsilon.  */
    if (targetm.fixed_point_supported_p ())
--- 1165,1180 ----
  				      csuffix, FLOATN_NX_TYPE_NODE (i));
      }
  
!   /* For float.h.  */
!   if (targetm.decimal_float_supported_p ())
!     {
!       builtin_define_decimal_float_constants ("DEC32", "DF",
! 					      dfloat32_type_node);
!       builtin_define_decimal_float_constants ("DEC64", "DD",
! 					      dfloat64_type_node);
!       builtin_define_decimal_float_constants ("DEC128", "DL",
! 					      dfloat128_type_node);
!     }
  
    /* For fixed-point fibt, ibit, max, min, and epsilon.  */
    if (targetm.fixed_point_supported_p ())
*************** c_cpp_builtins (cpp_reader *pfile)
*** 1407,1413 ****
      cpp_define (pfile, "__SSP__=1");
  
    if (flag_openacc)
!     cpp_define (pfile, "_OPENACC=201306");
  
    if (flag_openmp)
      cpp_define (pfile, "_OPENMP=201511");
--- 1435,1441 ----
      cpp_define (pfile, "__SSP__=1");
  
    if (flag_openacc)
!     cpp_define (pfile, "_OPENACC=201711");
  
    if (flag_openmp)
      cpp_define (pfile, "_OPENMP=201511");
*************** struct GTY(()) lazy_hex_fp_value_struct
*** 1592,1601 ****
  };
  /* Number of the expensive to compute macros we should evaluate lazily.
     Each builtin_define_float_constants invocation calls
!    builtin_define_with_hex_fp_value 4 times and builtin_define_float_constants
     is called for FLT, DBL, LDBL and up to NUM_FLOATN_NX_TYPES times for
     FLTNN*.  */ 
! #define LAZY_HEX_FP_VALUES_CNT (4 * (3 + NUM_FLOATN_NX_TYPES))
  static GTY(()) struct lazy_hex_fp_value_struct
    lazy_hex_fp_values[LAZY_HEX_FP_VALUES_CNT];
  static GTY(()) unsigned lazy_hex_fp_value_count;
--- 1620,1629 ----
  };
  /* Number of the expensive to compute macros we should evaluate lazily.
     Each builtin_define_float_constants invocation calls
!    builtin_define_with_hex_fp_value 5 times and builtin_define_float_constants
     is called for FLT, DBL, LDBL and up to NUM_FLOATN_NX_TYPES times for
     FLTNN*.  */ 
! #define LAZY_HEX_FP_VALUES_CNT (5 * (3 + NUM_FLOATN_NX_TYPES))
  static GTY(()) struct lazy_hex_fp_value_struct
    lazy_hex_fp_values[LAZY_HEX_FP_VALUES_CNT];
  static GTY(()) unsigned lazy_hex_fp_value_count;
*************** builtin_define_with_hex_fp_value (const
*** 1643,1648 ****
--- 1671,1677 ----
    /* This is very expensive, so if possible expand them lazily.  */
    if (lazy_hex_fp_value_count < LAZY_HEX_FP_VALUES_CNT
        && flag_dump_macros == 0
+       && flag_dump_go_spec == NULL
        && !cpp_get_options (parse_in)->traditional)
      {
        if (lazy_hex_fp_value_count == 0)
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-dump.c gcc-10.1.0/gcc/c-family/c-dump.c
*** gcc-9.3.0/gcc/c-family/c-dump.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-dump.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Tree-dumping functionality for C-family languages.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
     Written by Mark Mitchell <mark@codesourcery.com>
  
  This file is part of GCC.
--- 1,5 ----
  /* Tree-dumping functionality for C-family languages.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
     Written by Mark Mitchell <mark@codesourcery.com>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-format.c gcc-10.1.0/gcc/c-family/c-format.c
*** gcc-9.3.0/gcc/c-family/c-format.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-format.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Check calls to formatted I/O functions (-Wformat).
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Check calls to formatted I/O functions (-Wformat).
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** enum format_type { printf_format_type, a
*** 52,71 ****
  
  struct function_format_info
  {
!   int format_type;			/* type of format (printf, scanf, etc.) */
    unsigned HOST_WIDE_INT format_num;	/* number of format argument */
    unsigned HOST_WIDE_INT first_arg_num;	/* number of first arg (zero for varargs) */
  };
  
  /* Initialized in init_dynamic_diag_info.  */
  static GTY(()) tree local_tree_type_node;
  static GTY(()) tree local_gimple_ptr_node;
  static GTY(()) tree local_cgraph_node_ptr_node;
  static GTY(()) tree locus;
  
  static bool decode_format_attr (const_tree, tree, tree, function_format_info *,
  				bool);
! static int decode_format_type (const char *);
  
  static bool check_format_string (const_tree argument,
  				 unsigned HOST_WIDE_INT format_num,
--- 52,78 ----
  
  struct function_format_info
  {
!   enum format_type format_type;		/* type of format (printf, scanf, etc.) */
!   /* IS_RAW is relevant only for GCC diagnostic format functions.
!      It is set for "raw" formatting functions like pp_printf that
!      are not intended to produce complete diagnostics according to
!      GCC guidelines, and clear for others like error and warning
!      whose format string is checked for proper quoting and spelling.  */
!   bool is_raw;
    unsigned HOST_WIDE_INT format_num;	/* number of format argument */
    unsigned HOST_WIDE_INT first_arg_num;	/* number of first arg (zero for varargs) */
  };
  
  /* Initialized in init_dynamic_diag_info.  */
  static GTY(()) tree local_tree_type_node;
+ static GTY(()) tree local_event_ptr_node;
  static GTY(()) tree local_gimple_ptr_node;
  static GTY(()) tree local_cgraph_node_ptr_node;
  static GTY(()) tree locus;
  
  static bool decode_format_attr (const_tree, tree, tree, function_format_info *,
  				bool);
! static format_type decode_format_type (const char *, bool * = NULL);
  
  static bool check_format_string (const_tree argument,
  				 unsigned HOST_WIDE_INT format_num,
*************** format_warning_at_char (location_t fmt_s
*** 111,116 ****
--- 118,149 ----
    return warned;
  }
  
+ 
+ /* Emit a warning as per format_warning_va, but construct the substring_loc
+    for the substring at offset (POS1, POS2 - 1) within a string constant
+    FORMAT_STRING_CST at FMT_STRING_LOC.  */
+ 
+ ATTRIBUTE_GCC_DIAG (6,7)
+ static bool
+ format_warning_substr (location_t fmt_string_loc, tree format_string_cst,
+ 		       int pos1, int pos2, int opt, const char *gmsgid, ...)
+ {
+   va_list ap;
+   va_start (ap, gmsgid);
+   tree string_type = TREE_TYPE (format_string_cst);
+ 
+   pos2 -= 1;
+ 
+   substring_loc fmt_loc (fmt_string_loc, string_type, pos1, pos1, pos2);
+   format_string_diagnostic_t diag (fmt_loc, NULL, UNKNOWN_LOCATION, NULL,
+ 				   NULL);
+   bool warned = diag.emit_warning_va (opt, gmsgid, &ap);
+   va_end (ap);
+ 
+   return warned;
+ }
+ 
+ 
  /* Check that we have a pointer to a string suitable for use as a format.
     The default is to check for a char type.
     For objective-c dialects, this is extended to include references to string
*************** decode_format_attr (const_tree fntype, t
*** 320,329 ****
      {
        const char *p = IDENTIFIER_POINTER (format_type_id);
  
!       p = convert_format_name_to_system_name (p);
  
-       info->format_type = decode_format_type (p);
-       
        if (!c_dialect_objc ()
  	   && info->format_type == gcc_objc_string_format_type)
  	{
--- 353,360 ----
      {
        const char *p = IDENTIFIER_POINTER (format_type_id);
  
!       info->format_type = decode_format_type (p, &info->is_raw);
  
        if (!c_dialect_objc ()
  	   && info->format_type == gcc_objc_string_format_type)
  	{
*************** decode_format_attr (const_tree fntype, t
*** 359,365 ****
    if (info->first_arg_num != 0 && info->first_arg_num <= info->format_num)
      {
        gcc_assert (!validated_p);
!       error ("format string argument follows the args to be formatted");
        return false;
      }
  
--- 390,396 ----
    if (info->first_arg_num != 0 && info->first_arg_num <= info->format_num)
      {
        gcc_assert (!validated_p);
!       error ("format string argument follows the arguments to be formatted");
        return false;
      }
  
*************** decode_format_attr (const_tree fntype, t
*** 374,382 ****
  /* The C standard version we are checking formats against when pedantic.  */
  #define C_STD_VER		((int) (c_dialect_cxx ()		   \
  				 ? CPLUSPLUS_STD_VER			   \
! 				 : (flag_isoc99				   \
! 				    ? STD_C99				   \
! 				    : (flag_isoc94 ? STD_C94 : STD_C89))))
  /* The name to give to the standard version we are warning about when
     pedantic.  FEATURE_VER is the version in which the feature warned out
     appeared, which is higher than C_STD_VER.  */
--- 405,415 ----
  /* The C standard version we are checking formats against when pedantic.  */
  #define C_STD_VER		((int) (c_dialect_cxx ()		   \
  				 ? CPLUSPLUS_STD_VER			   \
! 				 : (flag_isoc2x				   \
! 				    ? STD_C2X				   \
! 				    : (flag_isoc99			   \
! 				       ? STD_C99			   \
! 				       : (flag_isoc94 ? STD_C94 : STD_C89)))))
  /* The name to give to the standard version we are warning about when
     pedantic.  FEATURE_VER is the version in which the feature warned out
     appeared, which is higher than C_STD_VER.  */
*************** decode_format_attr (const_tree fntype, t
*** 385,391 ****
  				    : "ISO C++11")		\
  				 : ((FEATURE_VER) == STD_EXT	\
  				    ? "ISO C"			\
! 				    : "ISO C90"))
  /* Adjust a C standard version, which may be STD_C9L, to account for
     -Wno-long-long.  Returns other standard versions unchanged.  */
  #define ADJ_STD(VER)		((int) ((VER) == STD_C9L		      \
--- 418,426 ----
  				    : "ISO C++11")		\
  				 : ((FEATURE_VER) == STD_EXT	\
  				    ? "ISO C"			\
! 				    : ((FEATURE_VER) == STD_C2X	\
! 				       ? "ISO C17"		\
! 				       : "ISO C90")))
  /* Adjust a C standard version, which may be STD_C9L, to account for
     -Wno-long-long.  Returns other standard versions unchanged.  */
  #define ADJ_STD(VER)		((int) ((VER) == STD_C9L		      \
*************** static const format_length_info printf_l
*** 467,473 ****
  static const format_length_info asm_fprintf_length_specs[] =
  {
    { "l", FMT_LEN_l, STD_C89, "ll", FMT_LEN_ll, STD_C89, 0 },
!   { "w", FMT_LEN_none, STD_C89, NO_FMT, 0 },
    { NO_FMT, NO_FMT, 0 }
  };
  
--- 502,508 ----
  static const format_length_info asm_fprintf_length_specs[] =
  {
    { "l", FMT_LEN_l, STD_C89, "ll", FMT_LEN_ll, STD_C89, 0 },
!   { "w", FMT_LEN_w, STD_C89, NO_FMT, 0 },
    { NO_FMT, NO_FMT, 0 }
  };
  
*************** static const format_length_info asm_fpri
*** 475,481 ****
  static const format_length_info gcc_diag_length_specs[] =
  {
    { "l", FMT_LEN_l, STD_C89, "ll", FMT_LEN_ll, STD_C89, 0 },
!   { "w", FMT_LEN_none, STD_C89, NO_FMT, 0 },
    { NO_FMT, NO_FMT, 0 }
  };
  
--- 510,516 ----
  static const format_length_info gcc_diag_length_specs[] =
  {
    { "l", FMT_LEN_l, STD_C89, "ll", FMT_LEN_ll, STD_C89, 0 },
!   { "w", FMT_LEN_w, STD_C89, NO_FMT, 0 },
    { NO_FMT, NO_FMT, 0 }
  };
  
*************** static const format_flag_spec strftime_f
*** 623,628 ****
--- 658,664 ----
    { 'E', 0,   0, 0, N_("'E' modifier"), N_("the 'E' strftime modifier"),      STD_C99 },
    { 'O', 0,   0, 0, N_("'O' modifier"), N_("the 'O' strftime modifier"),      STD_C99 },
    { 'O', 'o', 0, 0, NULL,               N_("the 'O' modifier"),               STD_EXT },
+   { 'O', 'p', 0, 0, NULL,               N_("the 'O' modifier"),               STD_C2X },
    { 0, 0, 0, 0, NULL, NULL, STD_C89 }
  };
  
*************** static const format_char_info print_char
*** 674,680 ****
    { "n",   1, STD_C89, { T89_I,   T99_SC,  T89_S,   T89_L,   T9L_LL,  BADLEN,  T99_SST, T99_PD,  T99_IM,  BADLEN,  BADLEN,  BADLEN }, "",          "W",  NULL },
    /* C99 conversion specifiers.  */
    { "F",   0, STD_C99, { T99_D,   BADLEN,  BADLEN,  T99_D,   BADLEN,  T99_LD,  BADLEN,  BADLEN,  BADLEN,  TEX_D32, TEX_D64, TEX_D128 }, "-wp0 +#'I", "",   NULL },
!   { "aA",  0, STD_C99, { T99_D,   BADLEN,  BADLEN,  T99_D,   BADLEN,  T99_LD,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN }, "-wp0 +#",   "",   NULL },
    /* X/Open conversion specifiers.  */
    { "C",   0, STD_EXT, { TEX_WI,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN }, "-w",        "",   NULL },
    { "S",   1, STD_EXT, { TEX_W,   BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN }, "-wp",       "R",  NULL },
--- 710,716 ----
    { "n",   1, STD_C89, { T89_I,   T99_SC,  T89_S,   T89_L,   T9L_LL,  BADLEN,  T99_SST, T99_PD,  T99_IM,  BADLEN,  BADLEN,  BADLEN }, "",          "W",  NULL },
    /* C99 conversion specifiers.  */
    { "F",   0, STD_C99, { T99_D,   BADLEN,  BADLEN,  T99_D,   BADLEN,  T99_LD,  BADLEN,  BADLEN,  BADLEN,  TEX_D32, TEX_D64, TEX_D128 }, "-wp0 +#'I", "",   NULL },
!   { "aA",  0, STD_C99, { T99_D,   BADLEN,  BADLEN,  T99_D,   BADLEN,  T99_LD,  BADLEN,  BADLEN,  BADLEN,  TEX_D32, TEX_D64,  TEX_D128 }, "-wp0 +#",   "",   NULL },
    /* X/Open conversion specifiers.  */
    { "C",   0, STD_EXT, { TEX_WI,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN }, "-w",        "",   NULL },
    { "S",   1, STD_EXT, { TEX_W,   BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN }, "-wp",       "R",  NULL },
*************** static const format_char_info asm_fprint
*** 717,725 ****
--- 753,764 ----
    { "s",   1, STD_C89, { T89_C,   BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN  }, "pq", "cR", NULL }, \
    { "p",   1, STD_C89, { T89_V,   BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN  }, "q",  "c",  NULL }, \
    { "r",   1, STD_C89, { T89_C,   BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN  }, "",    "//cR",   NULL }, \
+   { "@",   1, STD_C89, { T_EVENT_PTR,   BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN  }, "", "\"",   NULL }, \
    { "<",   0, STD_C89, NOARGUMENTS, "",      "<",   NULL }, \
    { ">",   0, STD_C89, NOARGUMENTS, "",      ">",   NULL }, \
    { "'" ,  0, STD_C89, NOARGUMENTS, "",      "",    NULL }, \
+   { "{",   1, STD_C89, { T89_C,   BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN  }, "",   "cR", NULL }, \
+   { "}",   0, STD_C89, NOARGUMENTS, "",      "",    NULL }, \
    { "R",   0, STD_C89, NOARGUMENTS, "",     "\\",   NULL }, \
    { "m",   0, STD_C89, NOARGUMENTS, "q",     "",   NULL }, \
    { "Z",   1, STD_C89, { T89_I,   BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN  }, "",    "", &gcc_diag_char_table[0] }
*************** static const format_char_info scan_char_
*** 847,853 ****
    { "n",     1, STD_C89, { T89_I,   T99_SC,  T89_S,   T89_L,   T9L_LL,  BADLEN,  T99_SST, T99_PD,  T99_IM,  BADLEN,  BADLEN,  BADLEN }, "",     "W",   NULL },
    /* C99 conversion specifiers.  */
    { "F",   1, STD_C99, { T99_F,   BADLEN,  BADLEN,  T99_D,   BADLEN,  T99_LD,  BADLEN,  BADLEN,  BADLEN,  TEX_D32, TEX_D64, TEX_D128 }, "*w'",  "W",   NULL },
!   { "aA",   1, STD_C99, { T99_F,   BADLEN,  BADLEN,  T99_D,   BADLEN,  T99_LD,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN }, "*w'",  "W",   NULL },
    /* X/Open conversion specifiers.  */
    { "C",     1, STD_EXT, { TEX_W,   BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN }, "*mw",   "W",   NULL },
    { "S",     1, STD_EXT, { TEX_W,   BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN }, "*amw",  "W",   NULL },
--- 886,892 ----
    { "n",     1, STD_C89, { T89_I,   T99_SC,  T89_S,   T89_L,   T9L_LL,  BADLEN,  T99_SST, T99_PD,  T99_IM,  BADLEN,  BADLEN,  BADLEN }, "",     "W",   NULL },
    /* C99 conversion specifiers.  */
    { "F",   1, STD_C99, { T99_F,   BADLEN,  BADLEN,  T99_D,   BADLEN,  T99_LD,  BADLEN,  BADLEN,  BADLEN,  TEX_D32, TEX_D64, TEX_D128 }, "*w'",  "W",   NULL },
!   { "aA",   1, STD_C99, { T99_F,   BADLEN,  BADLEN,  T99_D,   BADLEN,  T99_LD,  BADLEN,  BADLEN,  BADLEN,  TEX_D32,  TEX_D64,  TEX_D128 }, "*w'",  "W",   NULL },
    /* X/Open conversion specifiers.  */
    { "C",     1, STD_EXT, { TEX_W,   BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN }, "*mw",   "W",   NULL },
    { "S",     1, STD_EXT, { TEX_W,   BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN,  BADLEN }, "*amw",  "W",   NULL },
*************** static const format_char_info scan_char_
*** 857,863 ****
  static const format_char_info time_char_table[] =
  {
    /* C89 conversion specifiers.  */
!   { "ABZab",		0, STD_C89, NOLENGTHS, "^#",     "",   NULL },
    { "cx",		0, STD_C89, NOLENGTHS, "E",      "3",  NULL },
    { "HIMSUWdmw",	0, STD_C89, NOLENGTHS, "-_0Ow",  "",   NULL },
    { "j",		0, STD_C89, NOLENGTHS, "-_0Ow",  "o",  NULL },
--- 896,903 ----
  static const format_char_info time_char_table[] =
  {
    /* C89 conversion specifiers.  */
!   { "AZa",		0, STD_C89, NOLENGTHS, "^#",     "",   NULL },
!   { "Bb",		0, STD_C89, NOLENGTHS, "O^#",    "p",  NULL },
    { "cx",		0, STD_C89, NOLENGTHS, "E",      "3",  NULL },
    { "HIMSUWdmw",	0, STD_C89, NOLENGTHS, "-_0Ow",  "",   NULL },
    { "j",		0, STD_C89, NOLENGTHS, "-_0Ow",  "o",  NULL },
*************** static void format_type_warning (const s
*** 1067,1093 ****
  				 char conversion_char);
  
  /* Decode a format type from a string, returning the type, or
!    format_type_error if not valid, in which case the caller should print an
!    error message.  */
! static int
! decode_format_type (const char *s)
  {
!   int i;
!   int slen;
  
    s = convert_format_name_to_system_name (s);
!   slen = strlen (s);
!   for (i = 0; i < n_format_types; i++)
      {
!       int alen;
        if (!strcmp (s, format_types[i].name))
! 	return i;
!       alen = strlen (format_types[i].name);
        if (slen == alen + 4 && s[0] == '_' && s[1] == '_'
  	  && s[slen - 1] == '_' && s[slen - 2] == '_'
  	  && !strncmp (s + 2, format_types[i].name, alen))
! 	return i;
      }
    return format_type_error;
  }
  
--- 1107,1161 ----
  				 char conversion_char);
  
  /* Decode a format type from a string, returning the type, or
!    format_type_error if not valid, in which case the caller should
!    print an error message.  On success, when IS_RAW is non-null, set
!    *IS_RAW when the format type corresponds to a GCC "raw" diagnostic
!    formatting function and clear it otherwise.  */
! static format_type
! decode_format_type (const char *s, bool *is_raw /* = NULL */)
  {
!   bool is_raw_buf;
! 
!   if (!is_raw)
!     is_raw = &is_raw_buf;
! 
!   *is_raw = false;
  
    s = convert_format_name_to_system_name (s);
! 
!   size_t slen = strlen (s);
!   for (int i = 0; i < n_format_types; i++)
      {
!       /* Check for a match with no underscores.  */
        if (!strcmp (s, format_types[i].name))
! 	return static_cast<format_type> (i);
! 
!       /* Check for leading and trailing underscores.  */
!       size_t alen = strlen (format_types[i].name);
        if (slen == alen + 4 && s[0] == '_' && s[1] == '_'
  	  && s[slen - 1] == '_' && s[slen - 2] == '_'
  	  && !strncmp (s + 2, format_types[i].name, alen))
! 	return static_cast<format_type>(i);
! 
!       /* Check for the "_raw" suffix and no leading underscores.  */
!       if (slen == alen + 4
! 	  && !strncmp (s, format_types[i].name, alen)
! 	  && !strcmp (s + alen, "_raw"))
! 	{
! 	  *is_raw = true;
! 	  return static_cast<format_type>(i);
! 	}
! 
!       /* Check for the "_raw__" suffix and leading underscores.  */
!       if (slen == alen + 8 && s[0] == '_' && s[1] == '_'
! 	  && !strncmp (s + 2, format_types[i].name, alen)
! 	  && !strcmp (s + 2 + alen, "_raw__"))
! 	{
! 	  *is_raw = true;
! 	  return static_cast<format_type>(i);
! 	}
      }
+ 
    return format_type_error;
  }
  
*************** check_function_format (const_tree fntype
*** 1110,1116 ****
    /* See if this function has any format attributes.  */
    for (a = attrs; a; a = TREE_CHAIN (a))
      {
!       if (is_attribute_p ("format", TREE_PURPOSE (a)))
  	{
  	  /* Yup; check it.  */
  	  function_format_info info;
--- 1178,1184 ----
    /* See if this function has any format attributes.  */
    for (a = attrs; a; a = TREE_CHAIN (a))
      {
!       if (is_attribute_p ("format", get_attribute_name (a)))
  	{
  	  /* Yup; check it.  */
  	  function_format_info info;
*************** avoid_dollar_number (const char *format)
*** 1350,1356 ****
      format++;
    if (*format == '$')
      {
!       warning (OPT_Wformat_, "$ operand number used after format without operand number");
        return true;
      }
    return false;
--- 1418,1425 ----
      format++;
    if (*format == '$')
      {
!       warning (OPT_Wformat_,
! 	       "%<$%>operand number used after format without operand number");
        return true;
      }
    return false;
*************** finish_dollar_format_checking (format_ch
*** 1381,1387 ****
  	    found_pointer_gap = true;
  	  else
  	    warning_at (res->format_string_loc, OPT_Wformat_,
! 			"format argument %d unused before used argument %d in $-style format",
  			i + 1, dollar_max_arg_used);
  	}
      }
--- 1450,1457 ----
  	    found_pointer_gap = true;
  	  else
  	    warning_at (res->format_string_loc, OPT_Wformat_,
! 			"format argument %d unused before used argument %d "
! 			"in %<$%>-style format",
  			i + 1, dollar_max_arg_used);
  	}
      }
*************** check_format_info (function_format_info
*** 1525,1531 ****
      }
    if (res.number_dollar_extra_args > 0 && res.number_non_literal == 0
        && res.number_other == 0)
!     warning_at (loc, OPT_Wformat_extra_args, "unused arguments in $-style format");
    if (res.number_empty > 0 && res.number_non_literal == 0
        && res.number_other == 0)
      warning_at (loc, OPT_Wformat_zero_length, "zero-length %s format string",
--- 1595,1602 ----
      }
    if (res.number_dollar_extra_args > 0 && res.number_non_literal == 0
        && res.number_other == 0)
!     warning_at (loc, OPT_Wformat_extra_args,
! 		"unused arguments in %<$%>-style format");
    if (res.number_empty > 0 && res.number_non_literal == 0
        && res.number_other == 0)
      warning_at (loc, OPT_Wformat_zero_length, "zero-length %s format string",
*************** class flag_chars_t
*** 1778,1785 ****
  /* Support struct for argument_parser and check_format_info_main.
     Encapsulates any length modifier applied to the current argument.  */
  
! struct length_modifier
  {
    length_modifier ()
    : chars (NULL), val (FMT_LEN_none), std (STD_C89),
      scalar_identity_flag (0)
--- 1849,1857 ----
  /* Support struct for argument_parser and check_format_info_main.
     Encapsulates any length modifier applied to the current argument.  */
  
! class length_modifier
  {
+ public:
    length_modifier ()
    : chars (NULL), val (FMT_LEN_none), std (STD_C89),
      scalar_identity_flag (0)
*************** check_argument_type (const format_char_i
*** 2789,2794 ****
--- 2861,3768 ----
    return true;
  }
  
+ /* Describes "paired tokens" within the format string that are
+    expected to be balanced.  */
+ 
+ class baltoks_t
+ {
+ public:
+   baltoks_t (): singlequote (), doublequote () { }
+ 
+   typedef auto_vec<const char *> balanced_tokens_t;
+   /* Vectors of pointers to opening brackets ('['), curly brackets ('{'),
+      quoting directives (like GCC "%<"), parentheses, and angle brackets
+      ('<').  Used to detect unbalanced tokens.  */
+   balanced_tokens_t brackets;
+   balanced_tokens_t curly;
+   balanced_tokens_t quotdirs;
+   balanced_tokens_t parens;
+   balanced_tokens_t pointy;
+   /* Pointer to the last opening quote.  */
+   const char *singlequote;
+   const char *doublequote;
+ };
+ 
+ /* Describes a keyword, operator, or other name.  */
+ 
+ struct token_t
+ {
+   const char *name;   /* Keyword/operator name.  */
+   unsigned char len;  /* Its length.  */
+   const char *alt;    /* Alternate spelling.  */
+ };
+ 
+ /* Helper for initializing global token_t arrays below.  */
+ #define NAME(name) { name, sizeof name - 1, NULL }
+ 
+ /* C/C++ operators that are expected to be quoted within the format
+    string.  */
+ 
+ static const token_t c_opers[] =
+   {
+    NAME ("!="), NAME ("%="),  NAME ("&&"),  NAME ("&="), NAME ("*="),
+    NAME ("++"), NAME ("+="),  NAME ("--"),  NAME ("-="), NAME ("->"),
+    NAME ("/="), NAME ("<<"),  NAME ("<<="), NAME ("<="), NAME ("=="),
+    NAME (">="), NAME (">>="), NAME (">>"),  NAME ("?:"),  NAME ("^="),
+    NAME ("|="), NAME ("||")
+   };
+ 
+ static const token_t cxx_opers[] =
+   {
+    NAME ("->*"), NAME (".*"),  NAME ("::"),  NAME ("<=>")
+   };
+ 
+ /* Common C/C++ keywords that are expected to be quoted within the format
+    string.  Keywords like auto, inline, or volatile are exccluded because
+    they are sometimes used in common terms like /auto variables/, /inline
+    function/, or /volatile access/ where they should not be quoted.  */
+ 
+ static const token_t c_keywords[] =
+   {
+ #undef NAME
+ #define NAME(name, alt)  { name, sizeof name - 1, alt }
+ 
+    NAME ("alignas", NULL),
+    NAME ("alignof", NULL),
+    NAME ("asm", NULL),
+    NAME ("bool", NULL),
+    NAME ("char", NULL),
+    NAME ("const %", NULL),
+    NAME ("const-qualified", "%<const%>-qualified"),
+    NAME ("float", NULL),
+    NAME ("ifunc", NULL),
+    NAME ("int", NULL),
+    NAME ("long double", NULL),
+    NAME ("long int", NULL),
+    NAME ("long long", NULL),
+    NAME ("malloc", NULL),
+    NAME ("noclone", NULL),
+    NAME ("noinline", NULL),
+    NAME ("nonnull", NULL),
+    NAME ("noreturn", NULL),
+    NAME ("nothrow", NULL),
+    NAME ("offsetof", NULL),
+    NAME ("readonly", "read-only"),
+    NAME ("readwrite", "read-write"),
+    NAME ("restrict %", NULL),
+    NAME ("restrict-qualified", "%<restrict%>-qualified"),
+    NAME ("short int", NULL),
+    NAME ("signed char", NULL),
+    NAME ("signed int", NULL),
+    NAME ("signed long", NULL),
+    NAME ("signed short", NULL),
+    NAME ("sizeof", NULL),
+    NAME ("typeof", NULL),
+    NAME ("unsigned char", NULL),
+    NAME ("unsigned int", NULL),
+    NAME ("unsigned long", NULL),
+    NAME ("unsigned short", NULL),
+    NAME ("volatile %", NULL),
+    NAME ("volatile-qualified", "%<volatile%>-qualified"),
+    NAME ("weakref", NULL),
+   };
+ 
+ static const token_t cxx_keywords[] =
+   {
+    /* C++ only keywords and operators.  */
+    NAME ("catch", NULL),
+    NAME ("constexpr if", NULL),
+    NAME ("constexpr", NULL),
+    NAME ("constinit", NULL),
+    NAME ("consteval", NULL),
+    NAME ("decltype", NULL),
+    NAME ("nullptr", NULL),
+    NAME ("operator delete", NULL),
+    NAME ("operator new", NULL),
+    NAME ("typeid", NULL),
+    NAME ("typeinfo", NULL)
+   };
+ 
+ /* Blacklisted words such as misspellings that should be avoided in favor
+    of the specified alternatives.  */
+ static const struct
+ {
+   const char *name;   /* Bad word.  */
+   unsigned char len;  /* Its length.  */
+   const char *alt;    /* Preferred alternative.  */
+ } badwords[] =
+   {
+    NAME ("arg", "argument"),
+    NAME ("bitfield", "bit-field"),
+    NAME ("builtin function", "built-in function"),
+    NAME ("can not", "cannot"),
+    NAME ("commandline option", "command-line option"),
+    NAME ("commandline", "command line"),
+    NAME ("command line option", "command-line option"),
+    NAME ("decl", "declaration"),
+    NAME ("enumeral", "enumerated"),
+    NAME ("floating point", "floating-point"),
+    NAME ("non-zero", "nonzero"),
+    NAME ("reg", "register"),
+    NAME ("stmt", "statement"),
+   };
+ 
+ /* Common contractions that should be avoided in favor of the specified
+    alternatives.  */
+ 
+ static const struct
+ {
+   const char *name;   /* Contraction.  */
+   unsigned char len;  /* Its length.  */
+   const char *alt;    /* Preferred alternative.  */
+ } contrs[] =
+   {
+    NAME ("can't", "cannot"),
+    NAME ("didn't", "did not"),
+    /* These are commonly abused.  Avoid diagnosing them for now.
+       NAME ("isn't", "is not"),
+       NAME ("don't", "is not"),
+    */
+    NAME ("mustn't", "must not"),
+    NAME ("needn't", "need not"),
+    NAME ("should't", "should not"),
+    NAME ("that's", "that is"),
+    NAME ("there's", "there is"),
+    NAME ("they're", "they are"),
+    NAME ("what's", "what is"),
+    NAME ("won't", "will not")
+   };
+ 
+ /* Check for unquoted TOKENS.  FORMAT_STRING_LOC is the location of
+    the format string, FORMAT_STRING_CST the format string itself (as
+    a tree), ORIG_FORMAT_CHARS and FORMAT_CHARS are pointers to
+    the beginning of the format string and the character currently
+    being processed, and BALTOKS describes paired "tokens" within
+    the format string that are expected to be balanced.
+    Returns a pointer to the last processed character or null when
+    nothing was done.  */
+ 
+ static const char*
+ check_tokens (const token_t *tokens, unsigned ntoks,
+ 	      location_t format_string_loc, tree format_string_cst,
+ 	      const char *orig_format_chars, const char *format_chars,
+ 	      baltoks_t &baltoks)
+ {
+   /* For brevity.  */
+   const int opt = OPT_Wformat_diag;
+   /* Zero-based starting position of a problem sequence.  */
+   int fmtchrpos = format_chars - orig_format_chars;
+ 
+   /* For identifier-like "words," set to the word length.  */
+   unsigned wlen = 0;
+   /* Set for an operator, clear for an identifier/word.  */
+   bool is_oper = false;
+   bool underscore = false;
+ 
+   if (format_chars[0] == '_' || ISALPHA (format_chars[0]))
+     {
+       while (format_chars[wlen] == '_' || ISALNUM (format_chars[wlen]))
+ 	{
+ 	  underscore |= format_chars[wlen] == '_';
+ 	  ++wlen;
+ 	}
+     }
+   else
+     is_oper = true;
+ 
+   for (unsigned i = 0; i != ntoks; ++i)
+     {
+       unsigned toklen = tokens[i].len;
+ 
+       if (toklen < wlen
+ 	  || strncmp (format_chars, tokens[i].name, toklen))
+ 	continue;
+ 
+       if (toklen == 2
+ 	  && format_chars - orig_format_chars > 0
+ 	  && (TOUPPER (format_chars[-1]) == 'C'
+ 	      || TOUPPER (format_chars[-1]) == 'G'))
+ 	return format_chars + toklen - 1;   /* Reference to C++ or G++.  */
+ 
+       if (ISPUNCT (format_chars[toklen - 1]))
+ 	{
+ 	  if (format_chars[toklen - 1] == format_chars[toklen])
+ 	    return NULL;   /* Operator followed by another punctuator.  */
+ 	}
+       else if (ISALNUM (format_chars[toklen]))
+ 	return NULL;   /* Keyword prefix for a longer word.  */
+ 
+       if (toklen == 2
+ 	  && format_chars[0] == '-'
+ 	  && format_chars[1] == '-'
+ 	  && ISALNUM (format_chars[2]))
+ 	return NULL;   /* Probably option like --help.  */
+ 
+       /* Allow this ugly warning for the time being.  */
+       if (toklen == 2
+ 	  && format_chars - orig_format_chars > 6
+ 	  && !strncmp (format_chars - 7, " count >= width of ", 19))
+ 	return format_chars + 10;
+ 
+       /* The token is a type if it ends in an alphabetic character.  */
+       bool is_type = (ISALPHA (tokens[i].name[toklen - 1])
+ 		      && strchr (tokens[i].name, ' '));
+ 
+       /* Backtrack to the last alphabetic character (for tokens whose
+ 	 names end in '%').  */
+       if (!is_oper)
+ 	while (!ISALPHA (tokens[i].name[toklen - 1]))
+ 	  --toklen;
+ 
+       if (format_warning_substr (format_string_loc, format_string_cst,
+ 				 fmtchrpos, fmtchrpos + toklen, opt,
+ 				 (is_type
+ 				  ? G_("unquoted type name %<%.*s%> in format")
+ 				  : (is_oper
+ 				     ? G_("unquoted operator %<%.*s%> in format")
+ 				     : G_("unquoted keyword %<%.*s%> in format"))),
+ 				 toklen, format_chars)
+ 	  && tokens[i].alt)
+ 	inform (format_string_loc, "use %qs instead", tokens[i].alt);
+ 
+       return format_chars + toklen - 1;
+     }
+ 
+   /* Diagnose unquoted __attribute__.  Consider any parenthesized
+      argument to the attribute to avoid redundant warnings for
+      the double parentheses that might follow.  */
+   if (!strncmp (format_chars, "__attribute", sizeof "__attribute" - 1))
+     {
+       unsigned nchars = sizeof "__attribute" - 1;
+       while ('_' == format_chars[nchars])
+ 	++nchars;
+ 
+       for (int i = nchars; format_chars[i]; ++i)
+ 	if (' ' != format_chars[i])
+ 	  {
+ 	    nchars = i;
+ 	    break;
+ 	  }
+ 
+       if (format_chars[nchars] == '(')
+ 	{
+ 	  baltoks.parens.safe_push (format_chars + nchars);
+ 
+ 	  ++nchars;
+ 	  bool close = false;
+ 	  if (format_chars[nchars] == '(')
+ 	    {
+ 	      baltoks.parens.safe_push (format_chars + nchars);
+ 	      close = true;
+ 	      ++nchars;
+ 	    }
+ 	  for (int i = nchars; format_chars[i]; ++i)
+ 	    if (')' == format_chars[i])
+ 	      {
+ 		if (baltoks.parens.length () > 0)
+ 		  baltoks.parens.pop ();
+ 		nchars = i + 1;
+ 		break;
+ 	      }
+ 
+ 	  if (close && format_chars[nchars] == ')')
+ 	    {
+ 	      if (baltoks.parens.length () > 0)
+ 		baltoks.parens.pop ();
+ 	      ++nchars;
+ 	    }
+ 	}
+ 
+       format_warning_substr (format_string_loc, format_string_cst,
+ 			     fmtchrpos, fmtchrpos + nchars, opt,
+ 			      "unquoted attribute in format");
+       return format_chars + nchars - 1;
+     }
+ 
+   /* Diagnose unquoted built-ins.  */
+   if (format_chars[0] == '_'
+       && format_chars[1] == '_'
+       && (!strncmp (format_chars + 2, "atomic", sizeof "atomic" - 1)
+ 	  || !strncmp (format_chars + 2, "builtin", sizeof "builtin" - 1)
+ 	  || !strncmp (format_chars + 2, "sync", sizeof "sync" - 1)))
+     {
+       format_warning_substr (format_string_loc, format_string_cst,
+ 			     fmtchrpos, fmtchrpos + wlen, opt,
+ 			     "unquoted name of built-in function %<%.*s%> "
+ 			     "in format",
+ 			     wlen, format_chars);
+       return format_chars + wlen - 1;
+     }
+ 
+   /* Diagnose unquoted substrings of alphanumeric characters containing
+      underscores.  They most likely refer to identifiers and should be
+      quoted.  */
+   if (underscore)
+     format_warning_substr (format_string_loc, format_string_cst,
+ 			   format_chars - orig_format_chars,
+ 			   format_chars + wlen - orig_format_chars,
+ 			   opt,
+ 			   "unquoted identifier or keyword %<%.*s%> in format",
+ 			   wlen, format_chars);
+   else
+     {
+       /* Diagnose some common missspellings.  */
+       for (unsigned i = 0; i != sizeof badwords / sizeof *badwords; ++i)
+ 	{
+ 	  unsigned badwlen = strspn (badwords[i].name, " -");
+ 	  if (wlen >= badwlen
+ 	      && (wlen <= badwords[i].len
+ 		  || (wlen == badwords[i].len + 1U
+ 		      && TOUPPER (format_chars[wlen - 1]) == 'S'))
+ 	      && !strncasecmp (format_chars, badwords[i].name, badwords[i].len))
+ 	    {
+ 	      /* Handle singular as well as plural forms of all bad words
+ 		 even though the latter don't necessarily make sense for
+ 		 all of the former (like "can nots").  */
+ 	      badwlen = badwords[i].len;
+ 	      const char *plural = "";
+ 	      if (TOUPPER (format_chars[badwlen]) == 'S')
+ 		{
+ 		  ++badwlen;
+ 		  plural = "s";
+ 		}
+ 
+ 	      format_warning_substr (format_string_loc, format_string_cst,
+ 				     fmtchrpos, fmtchrpos + badwords[i].len,
+ 				     opt,
+ 				     "misspelled term %<%.*s%> in format; "
+ 				     "use %<%s%s%> instead",
+ 				     badwlen, format_chars,
+ 				     badwords[i].alt, plural);
+ 
+ 	      return format_chars + badwords[i].len - 1;
+ 	    }
+ 	}
+ 
+       /* Skip C++/G++.  */
+       if (!strncasecmp (format_chars, "c++", 3)
+ 	  || !strncasecmp (format_chars, "g++", 3))
+ 	return format_chars + 2;
+     }
+ 
+   return wlen ? format_chars + wlen - 1 : NULL;
+ }
+ 
+ /* Check plain text in a format string of a GCC diagnostic function
+    for common quoting, punctuation, and spelling mistakes, and issue
+    -Wformat-diag warnings if they are found.   FORMAT_STRING_LOC is
+    the location of the format string, FORMAT_STRING_CST the format
+    string itself (as a tree), ORIG_FORMAT_CHARS and FORMAT_CHARS are
+    pointers to the beginning of the format string and the character
+    currently being processed, and BALTOKS describes paired "tokens"
+    within the format string that are expected to be balanced.
+    Returns a pointer to the last processed character.  */
+ 
+ static const char*
+ check_plain (location_t format_string_loc, tree format_string_cst,
+ 	     const char *orig_format_chars, const char *format_chars,
+ 	     baltoks_t &baltoks)
+ {
+   /* For brevity.  */
+   const int opt = OPT_Wformat_diag;
+   /* Zero-based starting position of a problem sequence.  */
+   int fmtchrpos = format_chars - orig_format_chars;
+ 
+   if (*format_chars == '%')
+     {
+       /* Diagnose %<%s%> and suggest using %qs instead.  */
+       if (!strncmp (format_chars, "%<%s%>", 6))
+ 	format_warning_substr (format_string_loc, format_string_cst,
+ 			       fmtchrpos, fmtchrpos + 6, opt,
+ 			       "quoted %qs directive in format; "
+ 			       "use %qs instead", "%s", "%qs");
+       else if (format_chars - orig_format_chars > 2
+ 	       && !strncasecmp (format_chars - 3, "can%'t", 6))
+ 	format_warning_substr (format_string_loc,
+ 			       format_string_cst,
+ 			       fmtchrpos - 3, fmtchrpos + 3, opt,
+ 			       "contraction %<%.*s%> in format; "
+ 			       "use %qs instead",
+ 			       6, format_chars - 3, "cannot");
+ 
+       return format_chars;
+     }
+ 
+   if (baltoks.quotdirs.length ())
+     {
+       /* Skip over all plain text within a quoting directive until
+ 	 the next directive.  */
+       while (*format_chars && '%' != *format_chars)
+ 	++format_chars;
+ 
+       return format_chars;
+     }
+ 
+   /* The length of the problem sequence.  */
+   int nchars = 0;
+ 
+   /* Diagnose any whitespace characters other than <space> but only
+      leading, trailing, and two or more consecutive <space>s.  Do
+      this before diagnosing control characters because whitespace
+      is a subset of controls.  */
+   const char *other_than_space = NULL;
+   while (ISSPACE (format_chars[nchars]))
+     {
+       if (format_chars[nchars] != ' ' && !other_than_space)
+ 	other_than_space = format_chars + nchars;
+       ++nchars;
+     }
+ 
+   if (nchars)
+     {
+       /* This is the most common problem: go the extra mile to describe
+ 	 the problem in as much helpful detail as possible.  */
+       if (other_than_space)
+ 	{
+ 	  format_warning_substr (format_string_loc, format_string_cst,
+ 				 fmtchrpos, fmtchrpos + nchars, opt,
+ 				 "unquoted whitespace character %qc in format",
+ 				 *other_than_space);
+ 	  return format_chars + nchars - 1;
+ 	}
+ 
+       if (fmtchrpos == 0)
+ 	/* Accept strings of leading spaces with no warning.  */
+ 	return format_chars + nchars - 1;
+ 
+       if (!format_chars[nchars])
+ 	{
+ 	  format_warning_substr (format_string_loc, format_string_cst,
+ 				 fmtchrpos, fmtchrpos + nchars, opt,
+ 				 "spurious trailing space in format");
+ 	  return format_chars + nchars - 1;
+ 	}
+ 
+       if (nchars > 1)
+ 	{
+ 	  if (nchars == 2
+ 	      && orig_format_chars < format_chars
+ 	      && format_chars[-1] == '.'
+ 	      && format_chars[0] == ' '
+ 	      && format_chars[1] == ' ')
+ 	    {
+ 	      /* A period followed by two spaces.  */
+ 	      if (ISUPPER (*orig_format_chars))
+ 		{
+ 		  /* If the part before the period is a capitalized
+ 		     sentence check to make sure that what follows
+ 		     is also capitalized.  */
+ 		  if (ISLOWER (format_chars[2]))
+ 		    format_warning_substr (format_string_loc, format_string_cst,
+ 					   fmtchrpos, fmtchrpos + nchars, opt,
+ 					   "inconsistent capitalization in "
+ 					   "format");
+ 		}
+ 	    }
+ 	  else
+ 	    format_warning_substr (format_string_loc, format_string_cst,
+ 				   fmtchrpos, fmtchrpos + nchars, opt,
+ 				   "unquoted sequence of %i consecutive "
+ 				   "space characters in format", nchars);
+ 	  return format_chars + nchars - 1;
+ 	}
+ 
+       format_chars += nchars;
+       nchars = 0;
+     }
+ 
+   fmtchrpos = format_chars - orig_format_chars;
+ 
+   /* Diagnose any unquoted control characters other than the terminating
+      NUL.  */
+   while (format_chars[nchars] && ISCNTRL (format_chars[nchars]))
+     ++nchars;
+ 
+   if (nchars > 1)
+     {
+       format_warning_substr (format_string_loc, format_string_cst,
+ 			     fmtchrpos, fmtchrpos + nchars, opt,
+ 			     "unquoted control characters in format");
+       return format_chars + nchars - 1;
+     }
+   if (nchars)
+     {
+       format_warning_substr (format_string_loc, format_string_cst,
+ 			     fmtchrpos, fmtchrpos + nchars, opt,
+ 			     "unquoted control character %qc in format",
+ 			     *format_chars);
+       return format_chars + nchars - 1;
+     }
+ 
+   if (ISPUNCT (format_chars[0]))
+     {
+       size_t nelts = sizeof c_opers / sizeof *c_opers;
+       if (const char *ret = check_tokens (c_opers, nelts,
+ 					  format_string_loc, format_string_cst,
+ 					  orig_format_chars, format_chars,
+ 					  baltoks))
+ 	return ret;
+ 
+       nelts = c_dialect_cxx () ? sizeof cxx_opers / sizeof *cxx_opers : 0;
+       if (const char *ret = check_tokens (cxx_opers, nelts,
+ 					  format_string_loc, format_string_cst,
+ 					  orig_format_chars, format_chars,
+ 					  baltoks))
+ 	return ret;
+     }
+ 
+   if (ISALPHA (format_chars[0]))
+     {
+       size_t nelts = sizeof c_keywords / sizeof *c_keywords;
+       if (const char *ret = check_tokens (c_keywords, nelts,
+ 					  format_string_loc, format_string_cst,
+ 					  orig_format_chars, format_chars,
+ 					  baltoks))
+ 	return ret;
+ 
+       nelts = c_dialect_cxx () ? sizeof cxx_keywords / sizeof *cxx_keywords : 0;
+       if (const char *ret = check_tokens (cxx_keywords, nelts,
+ 					  format_string_loc, format_string_cst,
+ 					  orig_format_chars, format_chars,
+ 					  baltoks))
+ 	return ret;
+     }
+ 
+   nchars = 0;
+ 
+   /* Diagnose unquoted options.  */
+   if  ((format_chars == orig_format_chars
+ 	|| format_chars[-1] == ' ')
+        && format_chars[0] == '-'
+        && ((format_chars[1] == '-'
+ 	    && ISALPHA (format_chars[2]))
+ 	   || ISALPHA (format_chars[1])))
+     {
+       nchars = 1;
+       while (ISALNUM (format_chars[nchars])
+ 	     || '_' == format_chars[nchars]
+ 	     || '-' == format_chars[nchars]
+ 	     || '+' == format_chars[nchars])
+ 	++nchars;
+ 
+       format_warning_substr (format_string_loc, format_string_cst,
+ 			     fmtchrpos, fmtchrpos + nchars, opt,
+ 			     "unquoted option name %<%.*s%> in format",
+ 			     nchars, format_chars);
+       return format_chars + nchars - 1;
+     }
+ 
+   /* Diagnose leading, trailing, and two or more consecutive punctuation
+      characters.  */
+   const char *unbalanced = NULL;
+   while ('%' != format_chars[nchars]
+ 	 && ISPUNCT (format_chars[nchars])
+ 	 && !unbalanced)
+     {
+       switch (format_chars[nchars])
+ 	{
+ 	case '[':
+ 	  baltoks.brackets.safe_push (format_chars + nchars);
+ 	  break;
+ 	case '{':
+ 	  baltoks.curly.safe_push (format_chars + nchars);
+ 	  break;
+ 	case '(':
+ 	  baltoks.parens.safe_push (format_chars + nchars);
+ 	  break;
+ 	case '<':
+ 	  baltoks.pointy.safe_push (format_chars + nchars);
+ 	  break;
+ 
+ 	case ']':
+ 	  if (baltoks.brackets.length () > 0)
+ 	    baltoks.brackets.pop ();
+ 	  else
+ 	    unbalanced = format_chars + nchars;
+ 	  break;
+ 	case '}':
+ 	  if (baltoks.curly.length () > 0)
+ 	    baltoks.curly.pop ();
+ 	  else
+ 	    unbalanced = format_chars + nchars;
+ 	  break;
+ 	case ')':
+ 	  if (baltoks.parens.length () > 0)
+ 	    baltoks.parens.pop ();
+ 	  else
+ 	    unbalanced = format_chars + nchars;
+ 	  break;
+ 	case '>':
+ 	  if (baltoks.pointy.length () > 0)
+ 	    baltoks.pointy.pop ();
+ 	  else
+ 	    unbalanced = format_chars + nchars;
+ 	  break;
+ 	}
+ 
+       ++nchars;
+     }
+ 
+   if (unbalanced)
+     {
+       format_warning_substr (format_string_loc, format_string_cst,
+ 			     fmtchrpos, fmtchrpos + nchars, opt,
+ 			     "unbalanced punctuation character %qc in format",
+ 			     *unbalanced);
+       return format_chars + nchars - 1;
+     }
+ 
+   if (nchars)
+     {
+       /* Consider any identifier that follows the pound ('#') sign
+ 	 a preprocessing directive.  */
+       if (nchars == 1
+ 	  && format_chars[0] == '#'
+ 	  && ISALPHA (format_chars[1]))
+ 	{
+ 	  while (ISALNUM (format_chars[nchars])
+ 		 || format_chars[nchars] == '_')
+ 	    ++nchars;
+ 
+ 	  format_warning_substr (format_string_loc, format_string_cst,
+ 				 fmtchrpos, fmtchrpos + nchars, opt,
+ 				 "unquoted preprocessing directive %<%.*s%> "
+ 				 "in format", nchars, format_chars);
+ 	  return format_chars + nchars - 1;
+ 	}
+ 
+       /* Diagnose a bare single quote.  */
+       if (nchars == 1
+ 	  && format_chars[0] == '\''
+ 	  && format_chars - orig_format_chars
+ 	  && ISALPHA (format_chars[-1])
+ 	  && ISALPHA (format_chars[1]))
+ 	{
+ 	  /* Diagnose a subset of contractions that are best avoided.  */
+ 	  for (unsigned i = 0; i != sizeof contrs / sizeof *contrs; ++i)
+ 	    {
+ 	      const char *apos = strchr (contrs[i].name, '\'');
+ 	      gcc_assert (apos != NULL);
+ 	      int off = apos - contrs[i].name;
+ 
+ 	      if (format_chars - orig_format_chars >= off
+ 		  && !strncmp (format_chars - off,
+ 			       contrs[i].name, contrs[i].len))
+ 		{
+ 		  format_warning_substr (format_string_loc,
+ 					 format_string_cst,
+ 					 fmtchrpos, fmtchrpos + nchars, opt,
+ 					 "contraction %<%.*s%> in format; "
+ 					 "use %qs instead",
+ 					 contrs[i].len, contrs[i].name,
+ 					 contrs[i].alt);
+ 		  return format_chars + nchars - 1;
+ 		}
+ 	    }
+ 
+ 	  if (format_warning_substr (format_string_loc, format_string_cst,
+ 				     fmtchrpos, fmtchrpos + nchars, opt,
+ 				     "bare apostrophe %<'%> in format"))
+ 	    inform (format_string_loc,
+ 		    "if avoiding the apostrophe is not feasible, enclose "
+ 		    "it in a pair of %qs and %qs directives instead",
+ 		    "%<", "%>");
+ 	  return format_chars + nchars - 1;
+ 	}
+ 
+       /* Diagnose a backtick (grave accent).  */
+       if (nchars == 1
+ 	  && format_chars[0] == '`')
+ 	{
+ 	  if (format_warning_substr (format_string_loc, format_string_cst,
+ 				     fmtchrpos, fmtchrpos + nchars, opt,
+ 				     "grave accent %<`%> in format"))
+ 	    inform (format_string_loc,
+ 		    "use the apostrophe directive %qs instead", "%'");
+ 	  return format_chars + nchars - 1;
+ 	}
+ 
+       /* Diagnose a punctuation character after a space.  */
+       if (nchars == 1
+ 	  && format_chars - orig_format_chars
+ 	  && format_chars[-1] == ' '
+ 	  && strspn (format_chars, "!?:;.,") == 1)
+ 	{
+ 	  format_warning_substr (format_string_loc, format_string_cst,
+ 				 fmtchrpos - 1, fmtchrpos, opt,
+ 				 "space followed by punctuation character "
+ 				 "%<%c%>", format_chars[0]);
+ 	  return format_chars;
+ 	}
+ 
+       if (nchars == 1)
+ 	{
+ 	  if (!strncmp (format_chars, "\"%s\"", 4))
+ 	    {
+ 	      if (format_warning_substr (format_string_loc, format_string_cst,
+ 					 fmtchrpos, fmtchrpos + 4, opt,
+ 					 "quoted %qs directive in format",
+ 					 "%s"))
+ 		inform (format_string_loc, "if using %qs is not feasible, "
+ 			"use %qs instead", "%qs", "\"%-s\"");
+ 	    }
+ 
+ 	  if (format_chars[0] == '"')
+ 	    {
+ 	      baltoks.doublequote = baltoks.doublequote ? NULL : format_chars;
+ 	      return format_chars + nchars - 1;
+ 	    }
+ 	  if (format_chars[0] == '\'')
+ 	    {
+ 	      baltoks.singlequote = baltoks.singlequote ? NULL : format_chars;
+ 	      return format_chars + nchars - 1;
+ 	    }
+ 	}
+ 
+       if (fmtchrpos == 0)
+ 	{
+ 	  if (nchars == 1
+ 	      && format_chars[0] == '(')
+ 	    ;   /* Text beginning in an open parenthesis.  */
+ 	  else if (nchars == 3
+ 	      && !strncmp (format_chars, "...", 3)
+ 	      && format_chars[3])
+ 	    ;   /* Text beginning in an ellipsis.  */
+ 	  else
+ 	    {
+ 	      format_warning_substr (format_string_loc, format_string_cst,
+ 				     fmtchrpos, fmtchrpos + nchars, opt,
+ 				     "spurious leading punctuation sequence "
+ 				     "%<%.*s%> in format",
+ 				     nchars, format_chars);
+ 	      return format_chars + nchars - 1;
+ 	    }
+ 	}
+       else if (!format_chars[nchars])
+ 	{
+ 	  if (nchars == 1
+ 	      && (format_chars[nchars - 1] == ':'
+ 		  || format_chars[nchars - 1] == ')'))
+ 	    ;   /* Text ending in a colon or a closing parenthesis.  */
+ 	  else if (nchars == 1
+ 		   && ((ISUPPER (*orig_format_chars)
+ 			&& format_chars[nchars - 1] == '.')
+ 		       || strspn (format_chars + nchars - 1, "?])") == 1))
+ 		  ;   /* Capitalized sentence terminated by a single period,
+ 			 or text ending in a question mark, closing bracket,
+ 			 or parenthesis.  */
+ 	  else if (nchars == 2
+ 		   && format_chars[0] == '?'
+ 		   && format_chars[1] == ')')
+ 	    ;   /* A question mark after a closing parenthetical note.  */
+ 	  else if (nchars == 2
+ 		   && format_chars[0] == ')'
+ 		   && (format_chars[1] == '?'
+ 		       || format_chars[1] == ';'
+ 		       || format_chars[1] == ':'
+ 		       || (ISUPPER (*orig_format_chars)
+ 			   && format_chars[1] == '.')))
+ 	    ;   /* Closing parenthetical note followed by a question mark,
+ 		   semicolon, or colon at the end of the string, or by
+ 		   a period at the end of a capitalized sentence.  */
+ 	  else if (nchars == 3
+ 		   && format_chars - orig_format_chars > 0
+ 		   && !strncmp (format_chars, "...", 3))
+ 	    ;   /* Text ending in the ellipsis.  */
+ 	  else
+ 	    format_warning_substr (format_string_loc, format_string_cst,
+ 				   fmtchrpos, fmtchrpos + nchars, opt,
+ 				   "spurious trailing punctuation sequence "
+ 				   "%<%.*s%> in format",
+ 				   nchars, format_chars);
+ 
+ 	  return format_chars + nchars - 1;
+ 	}
+       else if (nchars == 2
+ 	       && format_chars[0] == ')'
+ 	       && (format_chars[1] == ':'
+ 		   || format_chars[1] == ';'
+ 		   || format_chars[1] == ',')
+ 	       && format_chars[2] == ' ')
+ 	;   /* Closing parenthetical note followed by a colon, semicolon
+ 	       or a comma followed by a space in the middle of the string.  */
+       else if (nchars > 1)
+ 	format_warning_substr (format_string_loc, format_string_cst,
+ 			       fmtchrpos, fmtchrpos + nchars, opt,
+ 			       "unquoted sequence of %i consecutive "
+ 			       "punctuation characters %q.*s in format",
+ 			       nchars, nchars, format_chars);
+       return format_chars + nchars - 1;
+     }
+ 
+   nchars = 0;
+ 
+   /* Finally, diagnose any unquoted non-graph, non-punctuation characters
+      other than the terminating NUL.  */
+   while (format_chars[nchars]
+ 	 && '%' != format_chars[nchars]
+ 	 && !ISPUNCT (format_chars[nchars])
+ 	 && !ISGRAPH (format_chars[nchars]))
+     ++nchars;
+ 
+   if (nchars > 1)
+     {
+       format_warning_substr (format_string_loc, format_string_cst,
+ 			     fmtchrpos, fmtchrpos + nchars, opt,
+ 			     "unquoted non-graph characters in format");
+       return format_chars + nchars - 1;
+     }
+   if (nchars)
+     {
+       format_warning_substr (format_string_loc, format_string_cst,
+ 			     fmtchrpos, fmtchrpos + nchars, opt,
+ 			     "unquoted non-graph character %qc in format",
+ 			     *format_chars);
+       return format_chars + nchars - 1;
+     }
+ 
+   return format_chars;
+ }
+ 
+ /* Diagnose unbalanced tokens described by BALTOKS in format string
+    ORIG_FORMAT_CHARS and the corresponding FORMAT_STRING_CST.  */
+ 
+ static void
+ maybe_diag_unbalanced_tokens (location_t format_string_loc,
+ 			      const char *orig_format_chars,
+ 			      tree format_string_cst,
+ 			      baltoks_t &baltoks)
+ {
+   const char *unbalanced = NULL;
+ 
+   if (baltoks.brackets.length ())
+     unbalanced = baltoks.brackets.pop ();
+   else if (baltoks.curly.length ())
+     unbalanced = baltoks.curly.pop ();
+   else if (baltoks.parens.length ())
+     unbalanced = baltoks.parens.pop ();
+   else if (baltoks.pointy.length ())
+     unbalanced = baltoks.pointy.pop ();
+ 
+   if (unbalanced)
+     format_warning_at_char (format_string_loc, format_string_cst,
+ 			    unbalanced - orig_format_chars + 1,
+ 			    OPT_Wformat_diag,
+ 			    "unbalanced punctuation character %<%c%> in format",
+ 			    *unbalanced);
+ 
+   if (baltoks.quotdirs.length ())
+     format_warning_at_char (format_string_loc, format_string_cst,
+ 			    baltoks.quotdirs.pop () - orig_format_chars,
+ 			    OPT_Wformat_,
+ 			    "unterminated quoting directive");
+ 
+   const char *quote
+     = baltoks.singlequote ? baltoks.singlequote : baltoks.doublequote;
+ 
+   if (quote)
+     format_warning_at_char (format_string_loc, format_string_cst,
+   			    quote - orig_format_chars + 1,
+ 			    OPT_Wformat_diag,
+   			    "unterminated quote character %<%c%> in format",
+   			    *quote);
+ }
+ 
  /* Do the main part of checking a call to a format function.  FORMAT_CHARS
     is the NUL-terminated format string (which at this point may contain
     internal NUL characters); FORMAT_LENGTH is its length (excluding the
*************** check_format_info_main (format_check_res
*** 2816,2823 ****
       and it didn't use $; 1 if $ formats are in use.  */
    int has_operand_number = -1;
  
!   /* Vector of pointers to opening quoting directives (like GCC "%<").  */
!   auto_vec<const char*> quotdirs;
  
    /* Pointers to the most recent color directives (like GCC's "%r or %R").
       A starting color directive much be terminated before the end of
--- 3790,3799 ----
       and it didn't use $; 1 if $ formats are in use.  */
    int has_operand_number = -1;
  
!   /* Vectors of pointers to opening quoting directives (like GCC "%<"),
!      opening braces, brackets, and parentheses.  Used to detect unbalanced
!      tokens.  */
!   baltoks_t baltoks;
  
    /* Pointers to the most recent color directives (like GCC's "%r or %R").
       A starting color directive much be terminated before the end of
*************** check_format_info_main (format_check_res
*** 2828,2837 ****
  
    init_dollar_format_checking (info->first_arg_num, first_fillin_param);
  
    while (*format_chars != 0)
      {
!       if (*format_chars++ != '%')
  	continue;
        if (*format_chars == 0)
  	{
  	  format_warning_at_char (format_string_loc, format_string_cst,
--- 3804,3829 ----
  
    init_dollar_format_checking (info->first_arg_num, first_fillin_param);
  
+   /* In GCC diagnostic functions check plain directives (substrings within
+      the format string that don't start with %) for quoting and punctuations
+      problems.  */
+   bool ck_plain = (!info->is_raw
+ 		   && (info->format_type == gcc_diag_format_type
+ 		       || info->format_type == gcc_tdiag_format_type
+ 		       || info->format_type == gcc_cdiag_format_type
+ 		       || info->format_type == gcc_cxxdiag_format_type));
+ 
    while (*format_chars != 0)
      {
!       if (ck_plain)
! 	format_chars = check_plain (format_string_loc,
! 				    format_string_cst,
! 				    orig_format_chars, format_chars,
! 				    baltoks);
! 
!       if (*format_chars == 0 || *format_chars++ != '%')
  	continue;
+ 
        if (*format_chars == 0)
  	{
  	  format_warning_at_char (format_string_loc, format_string_cst,
*************** check_format_info_main (format_check_res
*** 2846,2851 ****
--- 3838,3845 ----
  	  continue;
  	}
  
+       /* ARGUMENT_PARSER ctor takes FORMAT_CHARS by reference and calls
+ 	 to ARG_PARSER members may modify the variable.  */
        flag_chars_t flag_chars;
        argument_parser arg_parser (info, format_chars, format_string_cst,
  				  orig_format_chars, format_string_loc,
*************** check_format_info_main (format_check_res
*** 2908,2914 ****
        flag_chars.validate (fki, fci, flag_specs, format_chars,
  			   format_string_cst,
  			   format_string_loc, orig_format_chars, format_char,
! 			   quotdirs.length () > 0);
  
        const int alloc_flag = flag_chars.get_alloc_flag (fki);
        const bool suppressed = flag_chars.assignment_suppression_p (fki);
--- 3902,3908 ----
        flag_chars.validate (fki, fci, flag_specs, format_chars,
  			   format_string_cst,
  			   format_string_loc, orig_format_chars, format_char,
! 			   baltoks.quotdirs.length () > 0);
  
        const int alloc_flag = flag_chars.get_alloc_flag (fki);
        const bool suppressed = flag_chars.assignment_suppression_p (fki);
*************** check_format_info_main (format_check_res
*** 2920,2936 ****
  
        if (quot_begin_p && !quot_end_p)
  	{
! 	  if (quotdirs.length ())
  	    format_warning_at_char (format_string_loc, format_string_cst,
  				    format_chars - orig_format_chars,
  				    OPT_Wformat_,
  				    "nested quoting directive");
! 	  quotdirs.safe_push (format_chars);
  	}
        else if (!quot_begin_p && quot_end_p)
  	{
! 	  if (quotdirs.length ())
! 	    quotdirs.pop ();
  	  else
  	    format_warning_at_char (format_string_loc, format_string_cst,
  				    format_chars - orig_format_chars,
--- 3914,3930 ----
  
        if (quot_begin_p && !quot_end_p)
  	{
! 	  if (baltoks.quotdirs.length ())
  	    format_warning_at_char (format_string_loc, format_string_cst,
  				    format_chars - orig_format_chars,
  				    OPT_Wformat_,
  				    "nested quoting directive");
! 	  baltoks.quotdirs.safe_push (format_chars);
  	}
        else if (!quot_begin_p && quot_end_p)
  	{
! 	  if (baltoks.quotdirs.length ())
! 	    baltoks.quotdirs.pop ();
  	  else
  	    format_warning_at_char (format_string_loc, format_string_cst,
  				    format_chars - orig_format_chars,
*************** check_format_info_main (format_check_res
*** 2962,2968 ****
  
        /* Diagnose directives that shouldn't appear in a quoted sequence.
  	 (They are denoted by a double quote in FLAGS2.)  */
!       if (quotdirs.length ())
  	{
  	  if (strchr (fci->flags2, '"'))
  	    format_warning_at_char (format_string_loc, format_string_cst,
--- 3956,3962 ----
  
        /* Diagnose directives that shouldn't appear in a quoted sequence.
  	 (They are denoted by a double quote in FLAGS2.)  */
!       if (baltoks.quotdirs.length ())
  	{
  	  if (strchr (fci->flags2, '"'))
  	    format_warning_at_char (format_string_loc, format_string_cst,
*************** check_format_info_main (format_check_res
*** 3018,3027 ****
    if (has_operand_number > 0)
      finish_dollar_format_checking (res, fki->flags & (int) FMT_FLAG_DOLLAR_GAP_POINTER_OK);
  
!   if (quotdirs.length ())
!     format_warning_at_char (format_string_loc, format_string_cst,
! 			    quotdirs.pop () - orig_format_chars,
! 			    OPT_Wformat_, "unterminated quoting directive");
    if (color_begin && !color_end)
      format_warning_at_char (format_string_loc, format_string_cst,
  			    color_begin - orig_format_chars,
--- 4012,4020 ----
    if (has_operand_number > 0)
      finish_dollar_format_checking (res, fki->flags & (int) FMT_FLAG_DOLLAR_GAP_POINTER_OK);
  
!   maybe_diag_unbalanced_tokens (format_string_loc, orig_format_chars,
! 				format_string_cst, baltoks);
! 
    if (color_begin && !color_end)
      format_warning_at_char (format_string_loc, format_string_cst,
  			    color_begin - orig_format_chars,
*************** get_format_for_type_1 (const format_kind
*** 3400,3406 ****
        for (int i = 0; i < FMT_LEN_MAX; i++)
  	{
  	  const format_type_detail *ftd = &spec->types[i];
! 	  if (!ftd->type)
  	    continue;
  	  if (matching_type_p (*ftd->type, effective_arg_type))
  	    {
--- 4393,4399 ----
        for (int i = 0; i < FMT_LEN_MAX; i++)
  	{
  	  const format_type_detail *ftd = &spec->types[i];
! 	  if (!ftd->type || *ftd->type == NULL_TREE)
  	    continue;
  	  if (matching_type_p (*ftd->type, effective_arg_type))
  	    {
*************** class range_label_for_format_type_mismat
*** 3639,3645 ****
  
      char *result = concat (text.m_buffer, p, NULL);
      text.maybe_free ();
!     return label_text (result, true);
    }
  
   private:
--- 4632,4638 ----
  
      char *result = concat (text.m_buffer, p, NULL);
      text.maybe_free ();
!     return label_text::take (result);
    }
  
   private:
*************** init_dynamic_diag_info (void)
*** 3998,4003 ****
--- 4991,5001 ----
        || local_cgraph_node_ptr_node == void_type_node)
      local_cgraph_node_ptr_node = get_named_type ("cgraph_node");
  
+   /* Similar to the above but for diagnostic_event_id_t*.  */
+   if (!local_event_ptr_node
+       || local_event_ptr_node == void_type_node)
+     local_event_ptr_node = get_named_type ("diagnostic_event_id_t");
+ 
    static tree hwi;
  
    if (!hwi)
*************** handle_format_attribute (tree *node, tre
*** 4201,4207 ****
  	  if (arg_num != info.first_arg_num)
  	    {
  	      if (!(flags & (int) ATTR_FLAG_BUILT_IN))
! 		error ("args to be formatted is not %<...%>");
  	      *no_add_attrs = true;
  	      return NULL_TREE;
  	    }
--- 5199,5205 ----
  	  if (arg_num != info.first_arg_num)
  	    {
  	      if (!(flags & (int) ATTR_FLAG_BUILT_IN))
! 		error ("argument to be formatted is not %<...%>");
  	      *no_add_attrs = true;
  	      return NULL_TREE;
  	    }
*************** test_type_mismatch_range_labels ()
*** 4402,4417 ****
    diagnostic_show_locus (&dc, &richloc, DK_ERROR);
    if (c_dialect_cxx ())
      /* "char*", without a space.  */
!     ASSERT_STREQ ("\n"
! 		  "   printf (\"msg: %i\\n\", msg);\n"
  		  "                 ~^     ~~~\n"
  		  "                  |     |\n"
  		  "                  char* int\n",
  		  pp_formatted_text (dc.printer));
    else
      /* "char *", with a space.  */
!     ASSERT_STREQ ("\n"
! 		  "   printf (\"msg: %i\\n\", msg);\n"
  		  "                 ~^     ~~~\n"
  		  "                  |     |\n"
  		  "                  |     int\n"
--- 5400,5413 ----
    diagnostic_show_locus (&dc, &richloc, DK_ERROR);
    if (c_dialect_cxx ())
      /* "char*", without a space.  */
!     ASSERT_STREQ ("   printf (\"msg: %i\\n\", msg);\n"
  		  "                 ~^     ~~~\n"
  		  "                  |     |\n"
  		  "                  char* int\n",
  		  pp_formatted_text (dc.printer));
    else
      /* "char *", with a space.  */
!     ASSERT_STREQ ("   printf (\"msg: %i\\n\", msg);\n"
  		  "                 ~^     ~~~\n"
  		  "                  |     |\n"
  		  "                  |     int\n"
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-format.h gcc-10.1.0/gcc/c-family/c-format.h
*** gcc-9.3.0/gcc/c-family/c-format.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-format.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Check calls to formatted I/O functions (-Wformat).
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Check calls to formatted I/O functions (-Wformat).
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** enum format_lengths
*** 36,41 ****
--- 36,42 ----
    FMT_LEN_H,
    FMT_LEN_D,
    FMT_LEN_DD,
+   FMT_LEN_w,   /* GCC's HOST_WIDE_INT.  */
    FMT_LEN_MAX
  };
  
*************** enum format_std_version
*** 47,52 ****
--- 48,54 ----
    STD_C94,
    STD_C9L, /* C99, but treat as C89 if -Wno-long-long.  */
    STD_C99,
+   STD_C2X,
    STD_EXT
  };
  
*************** struct format_char_info
*** 148,153 ****
--- 150,156 ----
       two digit year formats, "3" for strftime formats giving two digit
       years in some locales, "4" for "2" which becomes "3" with an "E" modifier,
       "o" if use of strftime "O" is a GNU extension beyond C99,
+      "p" if use of strftime "O" is a C2x feature,
       "W" if the argument is a pointer which is dereferenced and written into,
       "R" if the argument is a pointer which is dereferenced and read from,
       "i" for printf integer formats where the '0' flag is ignored with
*************** struct format_kind_info
*** 300,305 ****
--- 303,309 ----
  #define T_V	&void_type_node
  #define T89_G   { STD_C89, NULL, &local_gimple_ptr_node }
  #define T_CGRAPH_NODE   { STD_C89, NULL, &local_cgraph_node_ptr_node }
+ #define T_EVENT_PTR    { STD_C89, NULL, &local_event_ptr_node }
  #define T89_T   { STD_C89, NULL, &local_tree_type_node }
  #define T89_V	{ STD_C89, NULL, T_V }
  #define T_W	&wchar_type_node
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-gimplify.c gcc-10.1.0/gcc/c-family/c-gimplify.c
*** gcc-9.3.0/gcc/c-family/c-gimplify.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-gimplify.c	Thu May  7 10:49:59 2020
***************
*** 2,8 ****
     by the C-based front ends.  The structure of gimplified, or
     language-independent, trees is dictated by the grammar described in this
     file.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
     Lowering of expressions contributed by Sebastian Pop <s.pop@laposte.net>
     Re-written to support lowering of whole function trees, documentation
     and miscellaneous cleanups by Diego Novillo <dnovillo@redhat.com>
--- 2,8 ----
     by the C-based front ends.  The structure of gimplified, or
     language-independent, trees is dictated by the grammar described in this
     file.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
     Lowering of expressions contributed by Sebastian Pop <s.pop@laposte.net>
     Re-written to support lowering of whole function trees, documentation
     and miscellaneous cleanups by Diego Novillo <dnovillo@redhat.com>
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-indentation.c gcc-10.1.0/gcc/c-family/c-indentation.c
*** gcc-9.3.0/gcc/c-family/c-indentation.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-indentation.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Implementation of -Wmisleading-indentation
!    Copyright (C) 2015-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Implementation of -Wmisleading-indentation
!    Copyright (C) 2015-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-indentation.h gcc-10.1.0/gcc/c-family/c-indentation.h
*** gcc-9.3.0/gcc/c-family/c-indentation.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-indentation.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for c-indentation.c.
!    Copyright (C) 2015-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for c-indentation.c.
!    Copyright (C) 2015-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-lex.c gcc-10.1.0/gcc/c-family/c-lex.c
*** gcc-9.3.0/gcc/c-family/c-lex.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-lex.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Mainly the interface between cpplib and the C front ends.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Mainly the interface between cpplib and the C front ends.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** init_c_lex (void)
*** 81,86 ****
--- 81,87 ----
    cb->valid_pch = c_common_valid_pch;
    cb->read_pch = c_common_read_pch;
    cb->has_attribute = c_common_has_attribute;
+   cb->has_builtin = c_common_has_builtin;
    cb->get_source_date_epoch = cb_get_source_date_epoch;
    cb->get_suggestion = cb_get_suggestion;
    cb->remap_filename = remap_macro_filename;
*************** cb_def_pragma (cpp_reader *pfile, locati
*** 258,264 ****
  	    name = cpp_token_as_text (pfile, s);
  	}
  
!       warning_at (fe_loc, OPT_Wunknown_pragmas, "ignoring #pragma %s %s",
  		  space, name);
      }
  }
--- 259,265 ----
  	    name = cpp_token_as_text (pfile, s);
  	}
  
!       warning_at (fe_loc, OPT_Wunknown_pragmas, "ignoring %<#pragma %s %s%>",
  		  space, name);
      }
  }
*************** c_common_has_attribute (cpp_reader *pfil
*** 353,365 ****
  	      else if (is_attribute_p ("deprecated", attr_name))
  		result = 201309;
  	      else if (is_attribute_p ("maybe_unused", attr_name)
- 		       || is_attribute_p ("nodiscard", attr_name)
  		       || is_attribute_p ("fallthrough", attr_name))
  		result = 201603;
  	      else if (is_attribute_p ("no_unique_address", attr_name)
  		       || is_attribute_p ("likely", attr_name)
  		       || is_attribute_p ("unlikely", attr_name))
  		result = 201803;
  	      if (result)
  		attr_name = NULL_TREE;
  	    }
--- 354,367 ----
  	      else if (is_attribute_p ("deprecated", attr_name))
  		result = 201309;
  	      else if (is_attribute_p ("maybe_unused", attr_name)
  		       || is_attribute_p ("fallthrough", attr_name))
  		result = 201603;
  	      else if (is_attribute_p ("no_unique_address", attr_name)
  		       || is_attribute_p ("likely", attr_name)
  		       || is_attribute_p ("unlikely", attr_name))
  		result = 201803;
+ 	      else if (is_attribute_p ("nodiscard", attr_name))
+ 		result = 201907;
  	      if (result)
  		attr_name = NULL_TREE;
  	    }
*************** c_common_has_attribute (cpp_reader *pfil
*** 385,390 ****
--- 387,444 ----
  
    return result;
  }
+ 
+ /* Callback for has_builtin.  */
+ 
+ int
+ c_common_has_builtin (cpp_reader *pfile)
+ {
+   const cpp_token *token = get_token_no_padding (pfile);
+   if (token->type != CPP_OPEN_PAREN)
+     {
+       cpp_error (pfile, CPP_DL_ERROR,
+ 		 "missing '(' after \"__has_builtin\"");
+       return 0;
+     }
+ 
+   const char *name = "";
+   token = get_token_no_padding (pfile);
+   if (token->type == CPP_NAME)
+     {
+       name = (const char *) cpp_token_as_text (pfile, token);
+       token = get_token_no_padding (pfile);
+       if (token->type != CPP_CLOSE_PAREN)
+ 	{
+ 	  cpp_error (pfile, CPP_DL_ERROR,
+ 		     "expected ')' after \"%s\"", name);
+ 	  name = "";
+ 	}
+     }
+   else
+     {
+       cpp_error (pfile, CPP_DL_ERROR,
+ 		 "macro \"__has_builtin\" requires an identifier");
+       if (token->type == CPP_CLOSE_PAREN)
+ 	return 0;
+     }
+ 
+   /* Consume tokens up to the closing parenthesis, including any nested
+      pairs of parentheses, to avoid confusing redundant errors.  */
+   for (unsigned nparen = 1; ; token = get_token_no_padding (pfile))
+     {
+       if (token->type == CPP_OPEN_PAREN)
+ 	++nparen;
+       else if (token->type == CPP_CLOSE_PAREN)
+ 	--nparen;
+       else if (token->type == CPP_EOF)
+ 	break;
+       if (!nparen)
+ 	break;
+     }
+ 
+   return names_builtin_p (name);
+ }
+ 
  
  /* Read a token and return its type.  Fill *VALUE with its value, if
     applicable.  Fill *CPP_FLAGS with the token's flags, if it is
*************** interpret_float (const cpp_token *token,
*** 811,817 ****
        if (((flags & CPP_N_HEX) == 0) && ((flags & CPP_N_IMAGINARY) == 0))
  	{
  	  warning (OPT_Wunsuffixed_float_constants,
! 		   "unsuffixed float constant");
  	  if (float_const_decimal64_p ())
  	    flags |= CPP_N_DFLOAT;
  	}
--- 865,871 ----
        if (((flags & CPP_N_HEX) == 0) && ((flags & CPP_N_IMAGINARY) == 0))
  	{
  	  warning (OPT_Wunsuffixed_float_constants,
! 		   "unsuffixed floating constant");
  	  if (float_const_decimal64_p ())
  	    flags |= CPP_N_DFLOAT;
  	}
*************** interpret_float (const cpp_token *token,
*** 823,829 ****
  
    /* Decode type based on width and properties. */
    if (flags & CPP_N_DFLOAT)
!     if ((flags & CPP_N_WIDTH) == CPP_N_LARGE)
        type = dfloat128_type_node;
      else if ((flags & CPP_N_WIDTH) == CPP_N_SMALL)
        type = dfloat32_type_node;
--- 877,888 ----
  
    /* Decode type based on width and properties. */
    if (flags & CPP_N_DFLOAT)
!     if (!targetm.decimal_float_supported_p ())
!       {
! 	error ("decimal floating-point not supported for this target");
! 	return error_mark_node;
!       }
!     else if ((flags & CPP_N_WIDTH) == CPP_N_LARGE)
        type = dfloat128_type_node;
      else if ((flags & CPP_N_WIDTH) == CPP_N_SMALL)
        type = dfloat32_type_node;
*************** lex_charconst (const cpp_token *token)
*** 1322,1328 ****
      type = char16_type_node;
    else if (token->type == CPP_UTF8CHAR)
      {
!       if (flag_char8_t)
          type = char8_type_node;
        else
          type = char_type_node;
--- 1381,1389 ----
      type = char16_type_node;
    else if (token->type == CPP_UTF8CHAR)
      {
!       if (!c_dialect_cxx ())
! 	type = unsigned_char_type_node;
!       else if (flag_char8_t)
          type = char8_type_node;
        else
          type = char_type_node;
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-objc.h gcc-10.1.0/gcc/c-family/c-objc.h
*** gcc-9.3.0/gcc/c-family/c-objc.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-objc.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of Objective-C front-end entry points used for C and C++.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions of Objective-C front-end entry points used for C and C++.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-omp.c gcc-10.1.0/gcc/c-family/c-omp.c
*** gcc-9.3.0/gcc/c-family/c-omp.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-omp.c	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* This file contains routines to construct OpenACC and OpenMP constructs,
     called from parsing in the C and C++ front ends.
  
!    Copyright (C) 2005-2019 Free Software Foundation, Inc.
     Contributed by Richard Henderson <rth@redhat.com>,
  		  Diego Novillo <dnovillo@redhat.com>.
  
--- 1,7 ----
  /* This file contains routines to construct OpenACC and OpenMP constructs,
     called from parsing in the C and C++ front ends.
  
!    Copyright (C) 2005-2020 Free Software Foundation, Inc.
     Contributed by Richard Henderson <rth@redhat.com>,
  		  Diego Novillo <dnovillo@redhat.com>.
  
*************** along with GCC; see the file COPYING3.
*** 32,37 ****
--- 32,39 ----
  #include "omp-general.h"
  #include "gomp-constants.h"
  #include "memmodel.h"
+ #include "attribs.h"
+ #include "gimplify.h"
  
  
  /* Complete a #pragma oacc wait construct.  LOC is the location of
*************** c_finish_omp_for (location_t locus, enum
*** 974,980 ****
  				{
  				  error_at (elocus,
  					    "increment is not constant 1 or "
! 					    "-1 for != condition");
  				  fail = true;
  				}
  			    }
--- 976,982 ----
  				{
  				  error_at (elocus,
  					    "increment is not constant 1 or "
! 					    "-1 for %<!=%> condition");
  				  fail = true;
  				}
  			    }
*************** c_finish_omp_for (location_t locus, enum
*** 992,998 ****
  			{
  			  error_at (elocus,
  				    "increment is not constant 1 or -1 for"
! 				    " != condition");
  			  fail = true;
  			}
  		    }
--- 994,1000 ----
  			{
  			  error_at (elocus,
  				    "increment is not constant 1 or -1 for"
! 				    " %<!=%> condition");
  			  fail = true;
  			}
  		    }
*************** c_oacc_split_loop_clauses (tree clauses,
*** 1263,1269 ****
  }
  
  /* This function attempts to split or duplicate clauses for OpenMP
!    combined/composite constructs.  Right now there are 26 different
     constructs.  CODE is the innermost construct in the combined construct,
     and MASK allows to determine which constructs are combined together,
     as every construct has at least one clause that no other construct
--- 1265,1271 ----
  }
  
  /* This function attempts to split or duplicate clauses for OpenMP
!    combined/composite constructs.  Right now there are 30 different
     constructs.  CODE is the innermost construct in the combined construct,
     and MASK allows to determine which constructs are combined together,
     as every construct has at least one clause that no other construct
*************** c_oacc_split_loop_clauses (tree clauses,
*** 1278,1283 ****
--- 1280,1286 ----
     #pragma omp master taskloop simd
     #pragma omp parallel for
     #pragma omp parallel for simd
+    #pragma omp parallel loop
     #pragma omp parallel master
     #pragma omp parallel master taskloop
     #pragma omp parallel master taskloop simd
*************** c_oacc_split_loop_clauses (tree clauses,
*** 1285,1301 ****
     #pragma omp target parallel
     #pragma omp target parallel for
     #pragma omp target parallel for simd
     #pragma omp target teams
     #pragma omp target teams distribute
     #pragma omp target teams distribute parallel for
     #pragma omp target teams distribute parallel for simd
     #pragma omp target teams distribute simd
     #pragma omp target simd
     #pragma omp taskloop simd
     #pragma omp teams distribute
     #pragma omp teams distribute parallel for
     #pragma omp teams distribute parallel for simd
!    #pragma omp teams distribute simd  */
  
  void
  c_omp_split_clauses (location_t loc, enum tree_code code,
--- 1288,1307 ----
     #pragma omp target parallel
     #pragma omp target parallel for
     #pragma omp target parallel for simd
+    #pragma omp target parallel loop
     #pragma omp target teams
     #pragma omp target teams distribute
     #pragma omp target teams distribute parallel for
     #pragma omp target teams distribute parallel for simd
     #pragma omp target teams distribute simd
+    #pragma omp target teams loop
     #pragma omp target simd
     #pragma omp taskloop simd
     #pragma omp teams distribute
     #pragma omp teams distribute parallel for
     #pragma omp teams distribute parallel for simd
!    #pragma omp teams distribute simd
!    #pragma omp teams loop  */
  
  void
  c_omp_split_clauses (location_t loc, enum tree_code code,
*************** c_omp_split_clauses (location_t loc, enu
*** 1375,1381 ****
  	case OMP_CLAUSE_PRIORITY:
  	  s = C_OMP_CLAUSE_SPLIT_TASKLOOP;
  	  break;
! 	/* Duplicate this to all of taskloop, distribute, for and simd.  */
  	case OMP_CLAUSE_COLLAPSE:
  	  if (code == OMP_SIMD)
  	    {
--- 1381,1391 ----
  	case OMP_CLAUSE_PRIORITY:
  	  s = C_OMP_CLAUSE_SPLIT_TASKLOOP;
  	  break;
! 	case OMP_CLAUSE_BIND:
! 	  s = C_OMP_CLAUSE_SPLIT_LOOP;
! 	  break;
! 	/* Duplicate this to all of taskloop, distribute, for, simd and
! 	   loop.  */
  	case OMP_CLAUSE_COLLAPSE:
  	  if (code == OMP_SIMD)
  	    {
*************** c_omp_split_clauses (location_t loc, enu
*** 1418,1423 ****
--- 1428,1435 ----
  	  else if ((mask & (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_NOGROUP))
  		   != 0)
  	    s = C_OMP_CLAUSE_SPLIT_TASKLOOP;
+ 	  else if (code == OMP_LOOP)
+ 	    s = C_OMP_CLAUSE_SPLIT_LOOP;
  	  else
  	    s = C_OMP_CLAUSE_SPLIT_DISTRIBUTE;
  	  break;
*************** c_omp_split_clauses (location_t loc, enu
*** 1435,1446 ****
  	    case OMP_TEAMS: s = C_OMP_CLAUSE_SPLIT_TEAMS; break;
  	    case OMP_MASTER: s = C_OMP_CLAUSE_SPLIT_PARALLEL; break;
  	    case OMP_TASKLOOP: s = C_OMP_CLAUSE_SPLIT_TASKLOOP; break;
  	    default: gcc_unreachable ();
  	    }
  	  break;
  	/* Firstprivate clause is supported on all constructs but
! 	   simd and master.  Put it on the outermost of those and duplicate on
! 	   teams and parallel.  */
  	case OMP_CLAUSE_FIRSTPRIVATE:
  	  if ((mask & (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_MAP))
  	      != 0)
--- 1447,1459 ----
  	    case OMP_TEAMS: s = C_OMP_CLAUSE_SPLIT_TEAMS; break;
  	    case OMP_MASTER: s = C_OMP_CLAUSE_SPLIT_PARALLEL; break;
  	    case OMP_TASKLOOP: s = C_OMP_CLAUSE_SPLIT_TASKLOOP; break;
+ 	    case OMP_LOOP: s = C_OMP_CLAUSE_SPLIT_LOOP; break;
  	    default: gcc_unreachable ();
  	    }
  	  break;
  	/* Firstprivate clause is supported on all constructs but
! 	   simd, master and loop.  Put it on the outermost of those and
! 	   duplicate on teams and parallel.  */
  	case OMP_CLAUSE_FIRSTPRIVATE:
  	  if ((mask & (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_MAP))
  	      != 0)
*************** c_omp_split_clauses (location_t loc, enu
*** 1486,1492 ****
  		s = C_OMP_CLAUSE_SPLIT_TASKLOOP;
  	      else
  		/* This must be
! 		   #pragma omp parallel{, for{, simd}, sections}
  		   or
  		   #pragma omp target parallel.  */
  		s = C_OMP_CLAUSE_SPLIT_PARALLEL;
--- 1499,1505 ----
  		s = C_OMP_CLAUSE_SPLIT_TASKLOOP;
  	      else
  		/* This must be
! 		   #pragma omp parallel{, for{, simd}, sections,loop}
  		   or
  		   #pragma omp target parallel.  */
  		s = C_OMP_CLAUSE_SPLIT_PARALLEL;
*************** c_omp_split_clauses (location_t loc, enu
*** 1495,1504 ****
  		   != 0)
  	    {
  	      /* This must be one of
! 		 #pragma omp {,target }teams distribute
  		 #pragma omp target teams
  		 #pragma omp {,target }teams distribute simd.  */
  	      gcc_assert (code == OMP_DISTRIBUTE
  			  || code == OMP_TEAMS
  			  || code == OMP_SIMD);
  	      s = C_OMP_CLAUSE_SPLIT_TEAMS;
--- 1508,1518 ----
  		   != 0)
  	    {
  	      /* This must be one of
! 		 #pragma omp {,target }teams {distribute,loop}
  		 #pragma omp target teams
  		 #pragma omp {,target }teams distribute simd.  */
  	      gcc_assert (code == OMP_DISTRIBUTE
+ 			  || code == OMP_LOOP
  			  || code == OMP_TEAMS
  			  || code == OMP_SIMD);
  	      s = C_OMP_CLAUSE_SPLIT_TEAMS;
*************** c_omp_split_clauses (location_t loc, enu
*** 1526,1534 ****
  	      s = C_OMP_CLAUSE_SPLIT_FOR;
  	    }
  	  break;
! 	/* Lastprivate is allowed on distribute, for, sections, taskloop and
! 	   simd.  In parallel {for{, simd},sections} we actually want to put
! 	   it on parallel rather than for or sections.  */
  	case OMP_CLAUSE_LASTPRIVATE:
  	  if (code == OMP_DISTRIBUTE)
  	    {
--- 1540,1548 ----
  	      s = C_OMP_CLAUSE_SPLIT_FOR;
  	    }
  	  break;
! 	/* Lastprivate is allowed on distribute, for, sections, taskloop, loop
! 	   and simd.  In parallel {for{, simd},sections} we actually want to
! 	   put it on parallel rather than for or sections.  */
  	case OMP_CLAUSE_LASTPRIVATE:
  	  if (code == OMP_DISTRIBUTE)
  	    {
*************** c_omp_split_clauses (location_t loc, enu
*** 1560,1565 ****
--- 1574,1584 ----
  	      s = C_OMP_CLAUSE_SPLIT_TASKLOOP;
  	      break;
  	    }
+ 	  if (code == OMP_LOOP)
+ 	    {
+ 	      s = C_OMP_CLAUSE_SPLIT_LOOP;
+ 	      break;
+ 	    }
  	  gcc_assert (code == OMP_SIMD);
  	  if ((mask & (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_SCHEDULE)) != 0)
  	    {
*************** c_omp_split_clauses (location_t loc, enu
*** 1632,1649 ****
  	    }
  	  s = C_OMP_CLAUSE_SPLIT_PARALLEL;
  	  break;
! 	/* Reduction is allowed on simd, for, parallel, sections, taskloop
! 	   and teams.  Duplicate it on all of them, but omit on for or
! 	   sections if parallel is present.  If taskloop is combined with
  	   parallel, omit it on parallel.  */
  	case OMP_CLAUSE_REDUCTION:
  	  if (OMP_CLAUSE_REDUCTION_TASK (clauses))
  	    {
! 	      if (code == OMP_SIMD /* || code == OMP_LOOP */)
  		{
  		  error_at (OMP_CLAUSE_LOCATION (clauses),
  			    "invalid %<task%> reduction modifier on construct "
! 			    "combined with %<simd%>" /* or %<loop%> */);
  		  OMP_CLAUSE_REDUCTION_TASK (clauses) = 0;
  		}
  	      else if (code != OMP_SECTIONS
--- 1651,1689 ----
  	    }
  	  s = C_OMP_CLAUSE_SPLIT_PARALLEL;
  	  break;
! 	/* order clauses are allowed on for, simd and loop.  */
! 	case OMP_CLAUSE_ORDER:
! 	  if ((mask & (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_SCHEDULE)) != 0)
! 	    {
! 	      if (code == OMP_SIMD)
! 		{
! 		  c = build_omp_clause (OMP_CLAUSE_LOCATION (clauses),
! 					OMP_CLAUSE_ORDER);
! 		  OMP_CLAUSE_CHAIN (c) = cclauses[C_OMP_CLAUSE_SPLIT_FOR];
! 		  cclauses[C_OMP_CLAUSE_SPLIT_FOR] = c;
! 		  s = C_OMP_CLAUSE_SPLIT_SIMD;
! 		}
! 	      else
! 		s = C_OMP_CLAUSE_SPLIT_FOR;
! 	    }
! 	  else if (code == OMP_LOOP)
! 	    s = C_OMP_CLAUSE_SPLIT_LOOP;
! 	  else
! 	    s = C_OMP_CLAUSE_SPLIT_SIMD;
! 	  break;
! 	/* Reduction is allowed on simd, for, parallel, sections, taskloop,
! 	   teams and loop.  Duplicate it on all of them, but omit on for or
! 	   sections if parallel is present (unless inscan, in that case
! 	   omit on parallel).  If taskloop or loop is combined with
  	   parallel, omit it on parallel.  */
  	case OMP_CLAUSE_REDUCTION:
  	  if (OMP_CLAUSE_REDUCTION_TASK (clauses))
  	    {
! 	      if (code == OMP_SIMD || code == OMP_LOOP)
  		{
  		  error_at (OMP_CLAUSE_LOCATION (clauses),
  			    "invalid %<task%> reduction modifier on construct "
! 			    "combined with %<simd%> or %<loop%>");
  		  OMP_CLAUSE_REDUCTION_TASK (clauses) = 0;
  		}
  	      else if (code != OMP_SECTIONS
*************** c_omp_split_clauses (location_t loc, enu
*** 1659,1664 ****
--- 1699,1716 ----
  		  OMP_CLAUSE_REDUCTION_TASK (clauses) = 0;
  		}
  	    }
+ 	  if (OMP_CLAUSE_REDUCTION_INSCAN (clauses)
+ 	      && ((mask & ((OMP_CLAUSE_MASK_1
+ 			    << PRAGMA_OMP_CLAUSE_DIST_SCHEDULE)
+ 			   | (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_MAP)))
+ 		  != 0))
+ 	    {
+ 	      error_at (OMP_CLAUSE_LOCATION (clauses),
+ 			"%<inscan%> %<reduction%> clause on construct other "
+ 			"than %<for%>, %<simd%>, %<for simd%>, "
+ 			"%<parallel for%>, %<parallel for simd%>");
+ 	      OMP_CLAUSE_REDUCTION_INSCAN (clauses) = 0;
+ 	    }
  	  if ((mask & (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_SCHEDULE)) != 0)
  	    {
  	      if (code == OMP_SIMD)
*************** c_omp_split_clauses (location_t loc, enu
*** 1672,1677 ****
--- 1724,1731 ----
  		    = OMP_CLAUSE_REDUCTION_PLACEHOLDER (clauses);
  		  OMP_CLAUSE_REDUCTION_DECL_PLACEHOLDER (c)
  		    = OMP_CLAUSE_REDUCTION_DECL_PLACEHOLDER (clauses);
+ 		  OMP_CLAUSE_REDUCTION_INSCAN (c)
+ 		    = OMP_CLAUSE_REDUCTION_INSCAN (clauses);
  		  OMP_CLAUSE_CHAIN (c) = cclauses[C_OMP_CLAUSE_SPLIT_SIMD];
  		  cclauses[C_OMP_CLAUSE_SPLIT_SIMD] = c;
  		}
*************** c_omp_split_clauses (location_t loc, enu
*** 1687,1698 ****
  		    = OMP_CLAUSE_REDUCTION_PLACEHOLDER (clauses);
  		  OMP_CLAUSE_REDUCTION_DECL_PLACEHOLDER (c)
  		    = OMP_CLAUSE_REDUCTION_DECL_PLACEHOLDER (clauses);
  		  OMP_CLAUSE_CHAIN (c) = cclauses[C_OMP_CLAUSE_SPLIT_TEAMS];
  		  cclauses[C_OMP_CLAUSE_SPLIT_TEAMS] = c;
  		  s = C_OMP_CLAUSE_SPLIT_PARALLEL;
  		}
  	      else if ((mask & (OMP_CLAUSE_MASK_1
! 				<< PRAGMA_OMP_CLAUSE_NUM_THREADS)) != 0)
  		s = C_OMP_CLAUSE_SPLIT_PARALLEL;
  	      else
  		s = C_OMP_CLAUSE_SPLIT_FOR;
--- 1741,1755 ----
  		    = OMP_CLAUSE_REDUCTION_PLACEHOLDER (clauses);
  		  OMP_CLAUSE_REDUCTION_DECL_PLACEHOLDER (c)
  		    = OMP_CLAUSE_REDUCTION_DECL_PLACEHOLDER (clauses);
+ 		  OMP_CLAUSE_REDUCTION_INSCAN (c)
+ 		    = OMP_CLAUSE_REDUCTION_INSCAN (clauses);
  		  OMP_CLAUSE_CHAIN (c) = cclauses[C_OMP_CLAUSE_SPLIT_TEAMS];
  		  cclauses[C_OMP_CLAUSE_SPLIT_TEAMS] = c;
  		  s = C_OMP_CLAUSE_SPLIT_PARALLEL;
  		}
  	      else if ((mask & (OMP_CLAUSE_MASK_1
! 				<< PRAGMA_OMP_CLAUSE_NUM_THREADS)) != 0
! 		       && !OMP_CLAUSE_REDUCTION_INSCAN (clauses))
  		s = C_OMP_CLAUSE_SPLIT_PARALLEL;
  	      else
  		s = C_OMP_CLAUSE_SPLIT_FOR;
*************** c_omp_split_clauses (location_t loc, enu
*** 1703,1708 ****
--- 1760,1767 ----
  	    s = C_OMP_CLAUSE_SPLIT_PARALLEL;
  	  else if (code == OMP_TASKLOOP)
  	    s = C_OMP_CLAUSE_SPLIT_TASKLOOP;
+ 	  else if (code == OMP_LOOP)
+ 	    s = C_OMP_CLAUSE_SPLIT_LOOP;
  	  else if (code == OMP_SIMD)
  	    {
  	      if ((mask & (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_NOGROUP))
*************** c_omp_split_clauses (location_t loc, enu
*** 1717,1722 ****
--- 1776,1783 ----
  		    = OMP_CLAUSE_REDUCTION_PLACEHOLDER (clauses);
  		  OMP_CLAUSE_REDUCTION_DECL_PLACEHOLDER (c)
  		    = OMP_CLAUSE_REDUCTION_DECL_PLACEHOLDER (clauses);
+ 		  OMP_CLAUSE_REDUCTION_INSCAN (c)
+ 		    = OMP_CLAUSE_REDUCTION_INSCAN (clauses);
  		  OMP_CLAUSE_CHAIN (c) = cclauses[C_OMP_CLAUSE_SPLIT_TASKLOOP];
  		  cclauses[C_OMP_CLAUSE_SPLIT_TASKLOOP] = c;
  		}
*************** c_omp_split_clauses (location_t loc, enu
*** 1892,1898 ****
      gcc_assert (cclauses[C_OMP_CLAUSE_SPLIT_PARALLEL] == NULL_TREE);
    if ((mask & ((OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_SCHEDULE)
  	       | (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_NOGROUP))) == 0
!       && code != OMP_SECTIONS)
      gcc_assert (cclauses[C_OMP_CLAUSE_SPLIT_FOR] == NULL_TREE);
    if (code != OMP_SIMD)
      gcc_assert (cclauses[C_OMP_CLAUSE_SPLIT_SIMD] == NULL_TREE);
--- 1953,1960 ----
      gcc_assert (cclauses[C_OMP_CLAUSE_SPLIT_PARALLEL] == NULL_TREE);
    if ((mask & ((OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_SCHEDULE)
  	       | (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_NOGROUP))) == 0
!       && code != OMP_SECTIONS
!       && code != OMP_LOOP)
      gcc_assert (cclauses[C_OMP_CLAUSE_SPLIT_FOR] == NULL_TREE);
    if (code != OMP_SIMD)
      gcc_assert (cclauses[C_OMP_CLAUSE_SPLIT_SIMD] == NULL_TREE);
*************** c_omp_declare_simd_clauses_to_numbers (t
*** 1951,1957 ****
  	  if (arg == NULL_TREE)
  	    {
  	      error_at (OMP_CLAUSE_LOCATION (c),
! 			"%qD is not an function argument", decl);
  	      continue;
  	    }
  	  OMP_CLAUSE_DECL (c) = build_int_cst (integer_type_node, idx);
--- 2013,2019 ----
  	  if (arg == NULL_TREE)
  	    {
  	      error_at (OMP_CLAUSE_LOCATION (c),
! 			"%qD is not a function argument", decl);
  	      continue;
  	    }
  	  OMP_CLAUSE_DECL (c) = build_int_cst (integer_type_node, idx);
*************** c_omp_declare_simd_clauses_to_numbers (t
*** 1966,1972 ****
  	      if (arg == NULL_TREE)
  		{
  		  error_at (OMP_CLAUSE_LOCATION (c),
! 			    "%qD is not an function argument", decl);
  		  continue;
  		}
  	      OMP_CLAUSE_LINEAR_STEP (c)
--- 2028,2034 ----
  	      if (arg == NULL_TREE)
  		{
  		  error_at (OMP_CLAUSE_LOCATION (c),
! 			    "%qD is not a function argument", decl);
  		  continue;
  		}
  	      OMP_CLAUSE_LINEAR_STEP (c)
*************** c_omp_predetermined_sharing (tree decl)
*** 2060,2062 ****
--- 2122,2294 ----
  
    return OMP_CLAUSE_DEFAULT_UNSPECIFIED;
  }
+ 
+ /* Diagnose errors in an OpenMP context selector, return CTX if
+    it is correct or error_mark_node otherwise.  */
+ 
+ tree
+ c_omp_check_context_selector (location_t loc, tree ctx)
+ {
+   /* Each trait-set-selector-name can only be specified once.
+      There are just 4 set names.  */
+   for (tree t1 = ctx; t1; t1 = TREE_CHAIN (t1))
+     for (tree t2 = TREE_CHAIN (t1); t2; t2 = TREE_CHAIN (t2))
+       if (TREE_PURPOSE (t1) == TREE_PURPOSE (t2))
+ 	{
+ 	  error_at (loc, "selector set %qs specified more than once",
+ 	  	    IDENTIFIER_POINTER (TREE_PURPOSE (t1)));
+ 	  return error_mark_node;
+ 	}
+   for (tree t = ctx; t; t = TREE_CHAIN (t))
+     {
+       /* Each trait-selector-name can only be specified once.  */
+       if (list_length (TREE_VALUE (t)) < 5)
+ 	{
+ 	  for (tree t1 = TREE_VALUE (t); t1; t1 = TREE_CHAIN (t1))
+ 	    for (tree t2 = TREE_CHAIN (t1); t2; t2 = TREE_CHAIN (t2))
+ 	      if (TREE_PURPOSE (t1) == TREE_PURPOSE (t2))
+ 		{
+ 		  error_at (loc,
+ 			    "selector %qs specified more than once in set %qs",
+ 			    IDENTIFIER_POINTER (TREE_PURPOSE (t1)),
+ 			    IDENTIFIER_POINTER (TREE_PURPOSE (t)));
+ 		  return error_mark_node;
+ 		}
+ 	}
+       else
+ 	{
+ 	  hash_set<tree> pset;
+ 	  for (tree t1 = TREE_VALUE (t); t1; t1 = TREE_CHAIN (t1))
+ 	    if (pset.add (TREE_PURPOSE (t1)))
+ 	      {
+ 		error_at (loc,
+ 			  "selector %qs specified more than once in set %qs",
+ 			  IDENTIFIER_POINTER (TREE_PURPOSE (t1)),
+ 			  IDENTIFIER_POINTER (TREE_PURPOSE (t)));
+ 		return error_mark_node;
+ 	      }
+ 	}
+ 
+       static const char *const kind[] = {
+ 	"host", "nohost", "cpu", "gpu", "fpga", "any", NULL };
+       static const char *const vendor[] = {
+ 	"amd", "arm", "bsc", "cray", "fujitsu", "gnu", "ibm", "intel",
+ 	"llvm", "nvidia", "pgi", "ti", "unknown", NULL };
+       static const char *const extension[] = { NULL };
+       static const char *const atomic_default_mem_order[] = {
+ 	"seq_cst", "relaxed", "acq_rel", NULL };
+       struct known_properties { const char *set; const char *selector;
+ 				const char *const *props; };
+       known_properties props[] = {
+ 	{ "device", "kind", kind },
+ 	{ "implementation", "vendor", vendor },
+ 	{ "implementation", "extension", extension },
+ 	{ "implementation", "atomic_default_mem_order",
+ 	  atomic_default_mem_order } };
+       for (tree t1 = TREE_VALUE (t); t1; t1 = TREE_CHAIN (t1))
+ 	for (unsigned i = 0; i < ARRAY_SIZE (props); i++)
+ 	  if (!strcmp (IDENTIFIER_POINTER (TREE_PURPOSE (t1)),
+ 					   props[i].selector)
+ 	      && !strcmp (IDENTIFIER_POINTER (TREE_PURPOSE (t)),
+ 					      props[i].set))
+ 	    for (tree t2 = TREE_VALUE (t1); t2; t2 = TREE_CHAIN (t2))
+ 	      for (unsigned j = 0; ; j++)
+ 		{
+ 		  if (props[i].props[j] == NULL)
+ 		    {
+ 		      if (TREE_PURPOSE (t2)
+ 			  && !strcmp (IDENTIFIER_POINTER (TREE_PURPOSE (t2)),
+ 				      " score"))
+ 			break;
+ 		      if (props[i].props == atomic_default_mem_order)
+ 			{
+ 			  error_at (loc,
+ 				    "incorrect property %qs of %qs selector",
+ 				    IDENTIFIER_POINTER (TREE_PURPOSE (t2)),
+ 				    "atomic_default_mem_order");
+ 			  return error_mark_node;
+ 			}
+ 		      else if (TREE_PURPOSE (t2))
+ 			warning_at (loc, 0,
+ 				    "unknown property %qs of %qs selector",
+ 				    IDENTIFIER_POINTER (TREE_PURPOSE (t2)),
+ 				    props[i].selector);
+ 		      else
+ 			warning_at (loc, 0,
+ 				    "unknown property %qE of %qs selector",
+ 				    TREE_VALUE (t2), props[i].selector);
+ 		      break;
+ 		    }
+ 		  else if (TREE_PURPOSE (t2) == NULL_TREE)
+ 		    {
+ 		      const char *str = TREE_STRING_POINTER (TREE_VALUE (t2));
+ 		      if (!strcmp (str, props[i].props[j])
+ 			  && ((size_t) TREE_STRING_LENGTH (TREE_VALUE (t2))
+ 			      == strlen (str) + 1))
+ 			break;
+ 		    }
+ 		  else if (!strcmp (IDENTIFIER_POINTER (TREE_PURPOSE (t2)),
+ 				    props[i].props[j]))
+ 		    break;
+ 		}
+     }
+   return ctx;
+ }
+ 
+ /* Register VARIANT as variant of some base function marked with
+    #pragma omp declare variant.  CONSTRUCT is corresponding construct
+    selector set.  */
+ 
+ void
+ c_omp_mark_declare_variant (location_t loc, tree variant, tree construct)
+ {
+   tree attr = lookup_attribute ("omp declare variant variant",
+ 				DECL_ATTRIBUTES (variant));
+   if (attr == NULL_TREE)
+     {
+       attr = tree_cons (get_identifier ("omp declare variant variant"),
+ 			unshare_expr (construct),
+ 			DECL_ATTRIBUTES (variant));
+       DECL_ATTRIBUTES (variant) = attr;
+       return;
+     }
+   if ((TREE_VALUE (attr) != NULL_TREE) != (construct != NULL_TREE)
+       || (construct != NULL_TREE
+ 	  && omp_context_selector_set_compare ("construct", TREE_VALUE (attr),
+ 					       construct)))
+     error_at (loc, "%qD used as a variant with incompatible %<construct%> "
+ 		   "selector sets", variant);
+ }
+ 
+ /* For OpenACC, the OMP_CLAUSE_MAP_KIND of an OMP_CLAUSE_MAP is used internally
+    to distinguish clauses as seen by the user.  Return the "friendly" clause
+    name for error messages etc., where possible.  See also
+    c/c-parser.c:c_parser_oacc_data_clause and
+    cp/parser.c:cp_parser_oacc_data_clause.  */
+ 
+ const char *
+ c_omp_map_clause_name (tree clause, bool oacc)
+ {
+   if (oacc && OMP_CLAUSE_CODE (clause) == OMP_CLAUSE_MAP)
+     switch (OMP_CLAUSE_MAP_KIND (clause))
+     {
+     case GOMP_MAP_FORCE_ALLOC:
+     case GOMP_MAP_ALLOC: return "create";
+     case GOMP_MAP_FORCE_TO:
+     case GOMP_MAP_TO: return "copyin";
+     case GOMP_MAP_FORCE_FROM:
+     case GOMP_MAP_FROM: return "copyout";
+     case GOMP_MAP_FORCE_TOFROM:
+     case GOMP_MAP_TOFROM: return "copy";
+     case GOMP_MAP_RELEASE: return "delete";
+     case GOMP_MAP_FORCE_PRESENT: return "present";
+     case GOMP_MAP_ATTACH: return "attach";
+     case GOMP_MAP_FORCE_DETACH:
+     case GOMP_MAP_DETACH: return "detach";
+     case GOMP_MAP_DEVICE_RESIDENT: return "device_resident";
+     case GOMP_MAP_LINK: return "link";
+     case GOMP_MAP_FORCE_DEVICEPTR: return "deviceptr";
+     default: break;
+     }
+   return omp_clause_code_name[OMP_CLAUSE_CODE (clause)];
+ }
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-opts.c gcc-10.1.0/gcc/c-family/c-opts.c
*** gcc-9.3.0/gcc/c-family/c-opts.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-opts.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* C/ObjC/C++ command line option handling.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
     Contributed by Neil Booth.
  
  This file is part of GCC.
--- 1,5 ----
  /* C/ObjC/C++ command line option handling.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
     Contributed by Neil Booth.
  
  This file is part of GCC.
*************** c_diagnostic_finalizer (diagnostic_conte
*** 168,178 ****
  			diagnostic_info *diagnostic,
  			diagnostic_t)
  {
    diagnostic_show_locus (context, diagnostic->richloc, diagnostic->kind);
    /* By default print macro expansion contexts in the diagnostic
       finalizer -- for tokens resulting from macro expansion.  */
    virt_loc_aware_diagnostic_finalizer (context, diagnostic);
!   pp_destroy_prefix (context->printer);
    pp_flush (context->printer);
  }
  
--- 168,181 ----
  			diagnostic_info *diagnostic,
  			diagnostic_t)
  {
+   char *saved_prefix = pp_take_prefix (context->printer);
+   pp_set_prefix (context->printer, NULL);
+   pp_newline (context->printer);
    diagnostic_show_locus (context, diagnostic->richloc, diagnostic->kind);
    /* By default print macro expansion contexts in the diagnostic
       finalizer -- for tokens resulting from macro expansion.  */
    virt_loc_aware_diagnostic_finalizer (context, diagnostic);
!   pp_set_prefix (context->printer, saved_prefix);
    pp_flush (context->printer);
  }
  
*************** c_common_handle_option (size_t scode, co
*** 460,465 ****
--- 463,472 ----
        cpp_opts->extended_identifiers = value;
        break;
  
+     case OPT_fmax_include_depth_:
+ 	cpp_opts->max_include_depth = value;
+       break;
+ 
      case OPT_foperator_names:
        cpp_opts->operator_names = value;
        break;
*************** c_common_handle_option (size_t scode, co
*** 497,512 ****
  	cpp_opts->track_macro_expansion = 2;
        break;
  
-     case OPT_frepo:
-       flag_use_repository = value;
-       if (value)
- 	{
- 	  flag_implicit_templates = 0;
- 	  warning (OPT_Wdeprecated, "%<-frepo%> is deprecated and will "
- 		   "be removed in a future release");
- 	}
-       break;
- 
      case OPT_ftabstop_:
        /* It is documented that we silently ignore silly values.  */
        if (value >= 1 && value <= 100)
--- 504,509 ----
*************** c_common_post_options (const char **pfil
*** 800,813 ****
       support.  */
    if (c_dialect_cxx ())
      {
!       if (flag_excess_precision_cmdline == EXCESS_PRECISION_STANDARD)
  	sorry ("%<-fexcess-precision=standard%> for C++");
!       flag_excess_precision_cmdline = EXCESS_PRECISION_FAST;
      }
!   else if (flag_excess_precision_cmdline == EXCESS_PRECISION_DEFAULT)
!     flag_excess_precision_cmdline = (flag_iso
! 				     ? EXCESS_PRECISION_STANDARD
! 				     : EXCESS_PRECISION_FAST);
  
    /* ISO C restricts floating-point expression contraction to within
       source-language expressions (-ffp-contract=on, currently an alias
--- 797,809 ----
       support.  */
    if (c_dialect_cxx ())
      {
!       if (flag_excess_precision == EXCESS_PRECISION_STANDARD)
  	sorry ("%<-fexcess-precision=standard%> for C++");
!       flag_excess_precision = EXCESS_PRECISION_FAST;
      }
!   else if (flag_excess_precision == EXCESS_PRECISION_DEFAULT)
!     flag_excess_precision = (flag_iso ? EXCESS_PRECISION_STANDARD
! 				      : EXCESS_PRECISION_FAST);
  
    /* ISO C restricts floating-point expression contraction to within
       source-language expressions (-ffp-contract=on, currently an alias
*************** c_common_post_options (const char **pfil
*** 831,836 ****
--- 827,838 ----
    else
      flag_permitted_flt_eval_methods = PERMITTED_FLT_EVAL_METHODS_C11;
  
+   /* C2X Annex F does not permit certain built-in functions to raise
+      "inexact".  */
+   if (flag_isoc2x)
+     SET_OPTION_IF_UNSET (&global_options, &global_options_set,
+ 			 flag_fp_int_builtin_inexact, 0);
+ 
    /* By default we use C99 inline semantics in GNU99 or C99 mode.  C99
       inline semantics are not supported in GNU89 or C89 mode.  */
    if (flag_gnu89_inline == -1)
*************** c_common_post_options (const char **pfil
*** 846,854 ****
  
    /* If -ffreestanding, -fno-hosted or -fno-builtin then disable
       pattern recognition.  */
!   if (!global_options_set.x_flag_tree_loop_distribute_patterns
!       && flag_no_builtin)
!     flag_tree_loop_distribute_patterns = 0;
  
    /* -Woverlength-strings is off by default, but is enabled by -Wpedantic.
       It is never enabled in C++, as the minimum limit is not normative
--- 848,856 ----
  
    /* If -ffreestanding, -fno-hosted or -fno-builtin then disable
       pattern recognition.  */
!   if (flag_no_builtin)
!     SET_OPTION_IF_UNSET (&global_options, &global_options_set,
! 			 flag_tree_loop_distribute_patterns, 0);
  
    /* -Woverlength-strings is off by default, but is enabled by -Wpedantic.
       It is never enabled in C++, as the minimum limit is not normative
*************** c_common_post_options (const char **pfil
*** 903,908 ****
--- 905,914 ----
    if (warn_implicit_int == -1)
      warn_implicit_int = flag_isoc99;
  
+   /* -Wold-style-definition is enabled by default for C2X.  */
+   if (warn_old_style_definition == -1)
+     warn_old_style_definition = flag_isoc2x;
+ 
    /* -Wshift-overflow is enabled by default in C99 and C++11 modes.  */
    if (warn_shift_overflow == -1)
      warn_shift_overflow = cxx_dialect >= cxx11 || flag_isoc99;
*************** c_common_post_options (const char **pfil
*** 913,920 ****
  				 && (cxx_dialect >= cxx11 || flag_isoc99));
  
    /* -Wregister is enabled by default in C++17.  */
!   if (!global_options_set.x_warn_register)
!     warn_register = cxx_dialect >= cxx17;
  
    /* Declone C++ 'structors if -Os.  */
    if (flag_declone_ctor_dtor == -1)
--- 919,935 ----
  				 && (cxx_dialect >= cxx11 || flag_isoc99));
  
    /* -Wregister is enabled by default in C++17.  */
!   SET_OPTION_IF_UNSET (&global_options, &global_options_set, warn_register,
! 		       cxx_dialect >= cxx17);
! 
!   /* -Wcomma-subscript is enabled by default in C++20.  */
!   SET_OPTION_IF_UNSET (&global_options, &global_options_set,
! 		       warn_comma_subscript,
! 		       cxx_dialect >= cxx2a && warn_deprecated);
! 
!   /* -Wvolatile is enabled by default in C++20.  */
!   SET_OPTION_IF_UNSET (&global_options, &global_options_set, warn_volatile,
! 		       cxx_dialect >= cxx2a && warn_deprecated);
  
    /* Declone C++ 'structors if -Os.  */
    if (flag_declone_ctor_dtor == -1)
*************** c_common_post_options (const char **pfil
*** 928,934 ****
  
    /* Change flag_abi_version to be the actual current ABI level, for the
       benefit of c_cpp_builtins, and to make comparison simpler.  */
!   const int latest_abi_version = 13;
    /* Generate compatibility aliases for ABI v11 (7.1) by default.  */
    const int abi_compat_default = 11;
  
--- 943,949 ----
  
    /* Change flag_abi_version to be the actual current ABI level, for the
       benefit of c_cpp_builtins, and to make comparison simpler.  */
!   const int latest_abi_version = 14;
    /* Generate compatibility aliases for ABI v11 (7.1) by default.  */
    const int abi_compat_default = 11;
  
*************** c_common_post_options (const char **pfil
*** 966,977 ****
    /* By default, enable the new inheriting constructor semantics along with ABI
       11.  New and old should coexist fine, but it is a change in what
       artificial symbols are generated.  */
!   if (!global_options_set.x_flag_new_inheriting_ctors)
!     flag_new_inheriting_ctors = abi_version_at_least (11);
  
    /* For GCC 7, only enable DR150 resolution by default if -std=c++17.  */
!   if (!global_options_set.x_flag_new_ttp)
!     flag_new_ttp = (cxx_dialect >= cxx17);
  
    if (cxx_dialect >= cxx11)
      {
--- 981,997 ----
    /* By default, enable the new inheriting constructor semantics along with ABI
       11.  New and old should coexist fine, but it is a change in what
       artificial symbols are generated.  */
!   SET_OPTION_IF_UNSET (&global_options, &global_options_set,
! 		       flag_new_inheriting_ctors,
! 		       abi_version_at_least (11));
  
    /* For GCC 7, only enable DR150 resolution by default if -std=c++17.  */
!   SET_OPTION_IF_UNSET (&global_options, &global_options_set, flag_new_ttp,
! 		       cxx_dialect >= cxx17);
! 
!   /* C++11 guarantees forward progress.  */
!   SET_OPTION_IF_UNSET (&global_options, &global_options_set, flag_finite_loops,
! 		       optimize >= 2 && cxx_dialect >= cxx11);
  
    if (cxx_dialect >= cxx11)
      {
*************** c_common_post_options (const char **pfil
*** 1025,1033 ****
    if (warn_return_type == -1 && c_dialect_cxx ())
      warn_return_type = 1;
  
    if (num_in_fnames > 1)
!     error ("too many filenames given.  Type %s --help for usage",
! 	   progname);
  
    if (flag_preprocess_only)
      {
--- 1045,1063 ----
    if (warn_return_type == -1 && c_dialect_cxx ())
      warn_return_type = 1;
  
+   /* C++2a is the final version of concepts. We still use -fconcepts
+      to know when concepts are enabled. Note that -fconcepts-ts can
+      be used to include additional features, although modified to
+      work with the standard.  */
+   if (cxx_dialect >= cxx2a || flag_concepts_ts)
+     flag_concepts = 1;
+   else if (flag_concepts)
+     /* For -std=c++17 -fconcepts, imply -fconcepts-ts.  */
+     flag_concepts_ts = 1;
+ 
    if (num_in_fnames > 1)
!     error ("too many filenames given; type %<%s %s%> for usage",
! 	   progname, "--help");
  
    if (flag_preprocess_only)
      {
*************** c_common_post_options (const char **pfil
*** 1061,1067 ****
  	     debug formats we warn here and refuse to load any PCH files.  */
  	  if (write_symbols != NO_DEBUG && write_symbols != DWARF2_DEBUG)
  	    warning (OPT_Wdeprecated,
! 		     "the \"%s\" debug format cannot be used with "
  		     "pre-compiled headers", debug_type_names[write_symbols]);
  	}
        else if (write_symbols != NO_DEBUG && write_symbols != DWARF2_DEBUG)
--- 1091,1097 ----
  	     debug formats we warn here and refuse to load any PCH files.  */
  	  if (write_symbols != NO_DEBUG && write_symbols != DWARF2_DEBUG)
  	    warning (OPT_Wdeprecated,
! 		     "the %qs debug format cannot be used with "
  		     "pre-compiled headers", debug_type_names[write_symbols]);
  	}
        else if (write_symbols != NO_DEBUG && write_symbols != DWARF2_DEBUG)
*************** check_deps_environment_vars (void)
*** 1281,1298 ****
  static void
  handle_deferred_opts (void)
  {
-   size_t i;
-   struct deps *deps;
- 
    /* Avoid allocating the deps buffer if we don't need it.
       (This flag may be true without there having been -MT or -MQ
       options, but we'll still need the deps buffer.)  */
    if (!deps_seen)
      return;
  
!   deps = cpp_get_deps (parse_in);
  
!   for (i = 0; i < deferred_count; i++)
      {
        struct deferred_opt *opt = &deferred_opts[i];
  
--- 1311,1325 ----
  static void
  handle_deferred_opts (void)
  {
    /* Avoid allocating the deps buffer if we don't need it.
       (This flag may be true without there having been -MT or -MQ
       options, but we'll still need the deps buffer.)  */
    if (!deps_seen)
      return;
  
!   mkdeps *deps = cpp_get_deps (parse_in);
  
!   for (size_t i = 0; i < deferred_count; i++)
      {
        struct deferred_opt *opt = &deferred_opts[i];
  
*************** set_std_cxx2a (int iso)
*** 1707,1712 ****
--- 1734,1740 ----
    flag_isoc94 = 1;
    flag_isoc99 = 1;
    flag_isoc11 = 1;
+   /* C++2a includes concepts. */
    cxx_dialect = cxx2a;
    lang_hooks.name = "GNU C++17"; /* Pretend C++17 until standardization.  */
  }
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-pch.c gcc-10.1.0/gcc/c-family/c-pch.c
*** gcc-9.3.0/gcc/c-family/c-pch.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-pch.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Precompiled header implementation for the C languages.
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Precompiled header implementation for the C languages.
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** pch_init (void)
*** 103,109 ****
  
    f = fopen (pch_file, "w+b");
    if (f == NULL)
!     fatal_error (input_location, "can%'t create precompiled header %s: %m",
  		 pch_file);
    pch_outfile = f;
  
--- 103,109 ----
  
    f = fopen (pch_file, "w+b");
    if (f == NULL)
!     fatal_error (input_location, "cannot create precompiled header %s: %m",
  		 pch_file);
    pch_outfile = f;
  
*************** pch_init (void)
*** 124,130 ****
        || fwrite (executable_checksum, 16, 1, f) != 1
        || fwrite (&v, sizeof (v), 1, f) != 1
        || fwrite (target_validity, v.target_data_length, 1, f) != 1)
!     fatal_error (input_location, "can%'t write to %s: %m", pch_file);
  
    /* Let the debugging format deal with the PCHness.  */
    (*debug_hooks->handle_pch) (0);
--- 124,130 ----
        || fwrite (executable_checksum, 16, 1, f) != 1
        || fwrite (&v, sizeof (v), 1, f) != 1
        || fwrite (target_validity, v.target_data_length, 1, f) != 1)
!     fatal_error (input_location, "cannot write to %s: %m", pch_file);
  
    /* Let the debugging format deal with the PCHness.  */
    (*debug_hooks->handle_pch) (0);
*************** c_common_write_pch (void)
*** 182,188 ****
  
    if (fseek (pch_outfile, 0, SEEK_SET) != 0
        || fwrite (get_ident (), IDENT_LENGTH, 1, pch_outfile) != 1)
!     fatal_error (input_location, "can%'t write %s: %m", pch_file);
  
    fclose (pch_outfile);
  
--- 182,188 ----
  
    if (fseek (pch_outfile, 0, SEEK_SET) != 0
        || fwrite (get_ident (), IDENT_LENGTH, 1, pch_outfile) != 1)
!     fatal_error (input_location, "cannot write %s: %m", pch_file);
  
    fclose (pch_outfile);
  
*************** c_common_valid_pch (cpp_reader *pfile, c
*** 208,214 ****
  
    sizeread = read (fd, ident, IDENT_LENGTH + 16);
    if (sizeread == -1)
!     fatal_error (input_location, "can%'t read %s: %m", name);
    else if (sizeread != IDENT_LENGTH + 16)
      {
        if (cpp_get_options (pfile)->warn_invalid_pch)
--- 208,214 ----
  
    sizeread = read (fd, ident, IDENT_LENGTH + 16);
    if (sizeread == -1)
!     fatal_error (input_location, "cannot read %s: %m", name);
    else if (sizeread != IDENT_LENGTH + 16)
      {
        if (cpp_get_options (pfile)->warn_invalid_pch)
*************** c_common_valid_pch (cpp_reader *pfile, c
*** 249,255 ****
       executable, so it ought to be long enough that we can read a
       c_pch_validity structure.  */
    if (read (fd, &v, sizeof (v)) != sizeof (v))
!     fatal_error (input_location, "can%'t read %s: %m", name);
  
    /* The allowable debug info combinations are that either the PCH file
       was built with the same as is being used now, or the PCH file was
--- 249,255 ----
       executable, so it ought to be long enough that we can read a
       c_pch_validity structure.  */
    if (read (fd, &v, sizeof (v)) != sizeof (v))
!     fatal_error (input_location, "cannot read %s: %m", name);
  
    /* The allowable debug info combinations are that either the PCH file
       was built with the same as is being used now, or the PCH file was
*************** c_common_valid_pch (cpp_reader *pfile, c
*** 300,306 ****
  
      if ((size_t) read (fd, this_file_data, v.target_data_length)
  	!= v.target_data_length)
!       fatal_error (input_location, "can%'t read %s: %m", name);
      msg = targetm.pch_valid_p (this_file_data, v.target_data_length);
      free (this_file_data);
      if (msg != NULL)
--- 300,306 ----
  
      if ((size_t) read (fd, this_file_data, v.target_data_length)
  	!= v.target_data_length)
!       fatal_error (input_location, "cannot read %s: %m", name);
      msg = targetm.pch_valid_p (this_file_data, v.target_data_length);
      free (this_file_data);
      if (msg != NULL)
*************** c_common_pch_pragma (cpp_reader *pfile,
*** 406,414 ****
  
    if (!cpp_get_options (pfile)->preprocessed)
      {
!       error ("pch_preprocess pragma should only be used "
  	     "with %<-fpreprocessed%>");
!       inform (input_location, "use #include instead");
        return;
      }
  
--- 406,414 ----
  
    if (!cpp_get_options (pfile)->preprocessed)
      {
!       error ("%<pch_preprocess%> pragma should only be used "
  	     "with %<-fpreprocessed%>");
!       inform (input_location, "use %<#include%> instead");
        return;
      }
  
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-ppoutput.c gcc-10.1.0/gcc/c-family/c-ppoutput.c
*** gcc-9.3.0/gcc/c-family/c-ppoutput.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-ppoutput.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Preprocess only, using cpplib.
!    Copyright (C) 1995-2019 Free Software Foundation, Inc.
     Written by Per Bothner, 1994-95.
  
     This program is free software; you can redistribute it and/or modify it
--- 1,5 ----
  /* Preprocess only, using cpplib.
!    Copyright (C) 1995-2020 Free Software Foundation, Inc.
     Written by Per Bothner, 1994-95.
  
     This program is free software; you can redistribute it and/or modify it
*************** init_pp_output (FILE *out_stream)
*** 151,156 ****
--- 151,157 ----
      }
  
    cb->has_attribute = c_common_has_attribute;
+   cb->has_builtin = c_common_has_builtin;
    cb->get_source_date_epoch = cb_get_source_date_epoch;
    cb->remap_filename = remap_macro_filename;
  
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-pragma.c gcc-10.1.0/gcc/c-family/c-pragma.c
*** gcc-9.3.0/gcc/c-family/c-pragma.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-pragma.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Handle #pragma, system V.4 style.  Supports #pragma weak and #pragma pack.
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Handle #pragma, system V.4 style.  Supports #pragma weak and #pragma pack.
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 33,38 ****
--- 33,39 ----
  #include "c-pragma.h"
  #include "opts.h"
  #include "plugin.h"
+ #include "opt-suggestions.h"
  
  #define GCC_BAD(gmsgid) \
    do { warning (OPT_Wpragmas, gmsgid); return; } while (0)
*************** pop_alignment (tree id)
*** 90,96 ****
    align_stack * entry;
  
    if (alignment_stack == NULL)
!     GCC_BAD ("#pragma pack (pop) encountered without matching #pragma pack (push)");
  
    /* If we got an identifier, strip away everything above the target
       entry so that the next step will restore the state just below it.  */
--- 91,98 ----
    align_stack * entry;
  
    if (alignment_stack == NULL)
!     GCC_BAD ("%<#pragma pack (pop)%> encountered without matching "
! 	     "%<#pragma pack (push)%>");
  
    /* If we got an identifier, strip away everything above the target
       entry so that the next step will restore the state just below it.  */
*************** pop_alignment (tree id)
*** 103,110 ****
  	    break;
  	  }
        if (entry == NULL)
! 	warning (OPT_Wpragmas, "\
! #pragma pack(pop, %E) encountered without matching #pragma pack(push, %E)"
  		 , id, id);
      }
  
--- 105,113 ----
  	    break;
  	  }
        if (entry == NULL)
! 	warning (OPT_Wpragmas,
! 		 "%<#pragma pack(pop, %E)%> encountered without matching "
! 		 "%<#pragma pack(push, %E)%>"
  		 , id, id);
      }
  
*************** handle_pragma_pack (cpp_reader * ARG_UNU
*** 196,202 ****
      warning (OPT_Wpragmas, "junk at end of %<#pragma pack%>");
  
    if (flag_pack_struct)
!     GCC_BAD ("#pragma pack has no effect with %<-fpack-struct%> - ignored");
  
    if (action != pop)
      switch (align)
--- 199,205 ----
      warning (OPT_Wpragmas, "junk at end of %<#pragma pack%>");
  
    if (flag_pack_struct)
!     GCC_BAD ("%<#pragma pack%> has no effect with %<-fpack-struct%> - ignored");
  
    if (action != pop)
      switch (align)
*************** apply_pragma_weak (tree decl, tree value
*** 256,262 ****
        && !DECL_WEAK (decl) /* Don't complain about a redundant #pragma.  */
        && DECL_ASSEMBLER_NAME_SET_P (decl)
        && TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl)))
!     warning (OPT_Wpragmas, "applying #pragma weak %q+D after first use "
  	     "results in unspecified behavior", decl);
  
    declare_weak (decl);
--- 259,265 ----
        && !DECL_WEAK (decl) /* Don't complain about a redundant #pragma.  */
        && DECL_ASSEMBLER_NAME_SET_P (decl)
        && TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl)))
!     warning (OPT_Wpragmas, "applying %<#pragma weak %+D%> after first use "
  	     "results in unspecified behavior", decl);
  
    declare_weak (decl);
*************** handle_pragma_weak (cpp_reader * ARG_UNU
*** 353,364 ****
    value = 0;
  
    if (pragma_lex (&name) != CPP_NAME)
!     GCC_BAD ("malformed #pragma weak, ignored");
    t = pragma_lex (&x);
    if (t == CPP_EQ)
      {
        if (pragma_lex (&value) != CPP_NAME)
! 	GCC_BAD ("malformed #pragma weak, ignored");
        t = pragma_lex (&x);
      }
    if (t != CPP_EOF)
--- 356,367 ----
    value = 0;
  
    if (pragma_lex (&name) != CPP_NAME)
!     GCC_BAD ("malformed %<#pragma weak%>, ignored");
    t = pragma_lex (&x);
    if (t == CPP_EQ)
      {
        if (pragma_lex (&value) != CPP_NAME)
! 	GCC_BAD ("malformed %<#pragma weak%>, ignored");
        t = pragma_lex (&x);
      }
    if (t != CPP_EOF)
*************** handle_pragma_scalar_storage_order (cpp_
*** 416,422 ****
  
    if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
      {
!       error ("scalar_storage_order is not supported because endianness "
  	     "is not uniform");
        return;
      }
--- 419,425 ----
  
    if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
      {
!       error ("%<scalar_storage_order%> is not supported because endianness "
  	     "is not uniform");
        return;
      }
*************** handle_pragma_redefine_extname (cpp_read
*** 494,502 ****
    bool found;
  
    if (pragma_lex (&oldname) != CPP_NAME)
!     GCC_BAD ("malformed #pragma redefine_extname, ignored");
    if (pragma_lex (&newname) != CPP_NAME)
!     GCC_BAD ("malformed #pragma redefine_extname, ignored");
    t = pragma_lex (&x);
    if (t != CPP_EOF)
      warning (OPT_Wpragmas, "junk at end of %<#pragma redefine_extname%>");
--- 497,505 ----
    bool found;
  
    if (pragma_lex (&oldname) != CPP_NAME)
!     GCC_BAD ("malformed %<#pragma redefine_extname%>, ignored");
    if (pragma_lex (&newname) != CPP_NAME)
!     GCC_BAD ("malformed %<#pragma redefine_extname%>, ignored");
    t = pragma_lex (&x);
    if (t != CPP_EOF)
      warning (OPT_Wpragmas, "junk at end of %<#pragma redefine_extname%>");
*************** handle_pragma_redefine_extname (cpp_read
*** 527,534 ****
  	      name = targetm.strip_name_encoding (name);
  
  	      if (!id_equal (newname, name))
! 		warning (OPT_Wpragmas, "#pragma redefine_extname ignored due to "
! 			 "conflict with previous rename");
  	    }
  	  else
  	    symtab->change_decl_assembler_name (decl, newname);
--- 530,537 ----
  	      name = targetm.strip_name_encoding (name);
  
  	      if (!id_equal (newname, name))
! 		warning (OPT_Wpragmas, "%<#pragma redefine_extname%> "
! 			 "ignored due to conflict with previous rename");
  	    }
  	  else
  	    symtab->change_decl_assembler_name (decl, newname);
*************** add_to_renaming_pragma_list (tree oldnam
*** 555,562 ****
      if (oldname == p->oldname)
        {
  	if (p->newname != newname)
! 	  warning (OPT_Wpragmas, "#pragma redefine_extname ignored due to "
! 		   "conflict with previous #pragma redefine_extname");
  	return;
        }
  
--- 558,565 ----
      if (oldname == p->oldname)
        {
  	if (p->newname != newname)
! 	  warning (OPT_Wpragmas, "%<#pragma redefine_extname%> ignored due to "
! 		   "conflict with previous %<#pragma redefine_extname%>");
  	return;
        }
  
*************** maybe_apply_renaming_pragma (tree decl,
*** 591,597 ****
        oldname = targetm.strip_name_encoding (oldname);
  
        if (asmname && strcmp (TREE_STRING_POINTER (asmname), oldname))
! 	  warning (OPT_Wpragmas, "asm declaration ignored due to "
  		   "conflict with previous rename");
  
        /* Take any pending redefine_extname off the list.  */
--- 594,600 ----
        oldname = targetm.strip_name_encoding (oldname);
  
        if (asmname && strcmp (TREE_STRING_POINTER (asmname), oldname))
! 	  warning (OPT_Wpragmas, "%<asm%> declaration ignored due to "
  		   "conflict with previous rename");
  
        /* Take any pending redefine_extname off the list.  */
*************** maybe_apply_renaming_pragma (tree decl,
*** 600,607 ****
  	  {
  	    /* Only warn if there is a conflict.  */
  	    if (!id_equal (p->newname, oldname))
! 	      warning (OPT_Wpragmas, "#pragma redefine_extname ignored due to "
! 		       "conflict with previous rename");
  
  	    pending_redefine_extname->unordered_remove (ix);
  	    break;
--- 603,610 ----
  	  {
  	    /* Only warn if there is a conflict.  */
  	    if (!id_equal (p->newname, oldname))
! 	      warning (OPT_Wpragmas, "%<#pragma redefine_extname%> ignored "
! 		       "due to conflict with previous rename");
  
  	    pending_redefine_extname->unordered_remove (ix);
  	    break;
*************** maybe_apply_renaming_pragma (tree decl,
*** 622,629 ****
  	  {
  	    if (strcmp (TREE_STRING_POINTER (asmname),
  			IDENTIFIER_POINTER (newname)) != 0)
! 	      warning (OPT_Wpragmas, "#pragma redefine_extname ignored due to "
! 		       "conflict with __asm__ declaration");
  	    return asmname;
  	  }
  
--- 625,632 ----
  	  {
  	    if (strcmp (TREE_STRING_POINTER (asmname),
  			IDENTIFIER_POINTER (newname)) != 0)
! 	      warning (OPT_Wpragmas, "%<#pragma redefine_extname%> ignored "
! 		       "due to conflict with %<asm%> declaration");
  	    return asmname;
  	  }
  
*************** push_visibility (const char *str, int ki
*** 683,689 ****
    else if (!strcmp (str, "protected"))
      default_visibility = VISIBILITY_PROTECTED;
    else
!     GCC_BAD ("#pragma GCC visibility push() must specify default, internal, hidden or protected");
    visibility_options.inpragma = 1;
  }
  
--- 686,693 ----
    else if (!strcmp (str, "protected"))
      default_visibility = VISIBILITY_PROTECTED;
    else
!     GCC_BAD ("%<#pragma GCC visibility push()%> must specify %<default%>, "
! 	     "%<internal%>, %<hidden%> or %<protected%>");
    visibility_options.inpragma = 1;
  }
  
*************** handle_pragma_visibility (cpp_reader *du
*** 725,731 ****
  	action = pop;
      }
    if (bad == action)
!     GCC_BAD ("#pragma GCC visibility must be followed by push or pop");
    else
      {
        if (pop == action)
--- 729,736 ----
  	action = pop;
      }
    if (bad == action)
!     GCC_BAD ("%<#pragma GCC visibility%> must be followed by %<push%> "
! 	     "or %<pop%>");
    else
      {
        if (pop == action)
*************** handle_pragma_visibility (cpp_reader *du
*** 739,745 ****
  	    GCC_BAD ("missing %<(%> after %<#pragma GCC visibility push%> - ignored");
  	  token = pragma_lex (&x);
  	  if (token != CPP_NAME)
! 	    GCC_BAD ("malformed #pragma GCC visibility push");
  	  else
  	    push_visibility (IDENTIFIER_POINTER (x), 0);
  	  if (pragma_lex (&x) != CPP_CLOSE_PAREN)
--- 744,750 ----
  	    GCC_BAD ("missing %<(%> after %<#pragma GCC visibility push%> - ignored");
  	  token = pragma_lex (&x);
  	  if (token != CPP_NAME)
! 	    GCC_BAD ("malformed %<#pragma GCC visibility push%>");
  	  else
  	    push_visibility (IDENTIFIER_POINTER (x), 0);
  	  if (pragma_lex (&x) != CPP_CLOSE_PAREN)
*************** handle_pragma_diagnostic(cpp_reader *ARG
*** 804,811 ****
    unsigned int option_index = find_opt (option_string + 1, lang_mask);
    if (option_index == OPT_SPECIAL_unknown)
      {
!       warning_at (loc, OPT_Wpragmas,
! 		  "unknown option after %<#pragma GCC diagnostic%> kind");
        return;
      }
    else if (!(cl_options[option_index].flags & CL_WARNING))
--- 809,824 ----
    unsigned int option_index = find_opt (option_string + 1, lang_mask);
    if (option_index == OPT_SPECIAL_unknown)
      {
!       option_proposer op;
!       const char *hint = op.suggest_option (option_string + 1);
!       if (hint)
! 	warning_at (loc, OPT_Wpragmas,
! 		    "unknown option after %<#pragma GCC diagnostic%> kind;"
! 		    " did you mean %<-%s%>?", hint);
!       else
! 	warning_at (loc, OPT_Wpragmas,
! 		    "unknown option after %<#pragma GCC diagnostic%> kind");
! 
        return;
      }
    else if (!(cl_options[option_index].flags & CL_WARNING))
*************** handle_pragma_target(cpp_reader *ARG_UNU
*** 851,857 ****
  
    if (cfun)
      {
!       error ("#pragma GCC option is not allowed inside functions");
        return;
      }
  
--- 864,870 ----
  
    if (cfun)
      {
!       error ("%<#pragma GCC option%> is not allowed inside functions");
        return;
      }
  
*************** handle_pragma_target(cpp_reader *ARG_UNU
*** 897,903 ****
  
        if (token != CPP_EOF)
  	{
! 	  error ("#pragma GCC target string... is badly formed");
  	  return;
  	}
  
--- 910,916 ----
  
        if (token != CPP_EOF)
  	{
! 	  error ("%<#pragma GCC target%> string is badly formed");
  	  return;
  	}
  
*************** handle_pragma_optimize (cpp_reader *ARG_
*** 920,926 ****
  
    if (cfun)
      {
!       error ("#pragma GCC optimize is not allowed inside functions");
        return;
      }
  
--- 933,939 ----
  
    if (cfun)
      {
!       error ("%<#pragma GCC optimize%> is not allowed inside functions");
        return;
      }
  
*************** handle_pragma_optimize (cpp_reader *ARG_
*** 965,971 ****
  
        if (token != CPP_EOF)
  	{
! 	  error ("#pragma GCC optimize string... is badly formed");
  	  return;
  	}
  
--- 978,984 ----
  
        if (token != CPP_EOF)
  	{
! 	  error ("%<#pragma GCC optimize%> string is badly formed");
  	  return;
  	}
  
*************** handle_pragma_message (cpp_reader *ARG_U
*** 1138,1144 ****
      warning (OPT_Wpragmas, "junk at end of %<#pragma message%>");
  
    if (TREE_STRING_LENGTH (message) > 1)
!     inform (input_location, "#pragma message: %s", TREE_STRING_POINTER (message));
  }
  
  /* Mark whether the current location is valid for a STDC pragma.  */
--- 1151,1158 ----
      warning (OPT_Wpragmas, "junk at end of %<#pragma message%>");
  
    if (TREE_STRING_LENGTH (message) > 1)
!     inform (input_location, "%<#pragma message: %s%>",
! 	    TREE_STRING_POINTER (message));
  }
  
  /* Mark whether the current location is valid for a STDC pragma.  */
*************** static const struct omp_pragma_def oacc_
*** 1277,1282 ****
--- 1291,1297 ----
    { "loop", PRAGMA_OACC_LOOP },
    { "parallel", PRAGMA_OACC_PARALLEL },
    { "routine", PRAGMA_OACC_ROUTINE },
+   { "serial", PRAGMA_OACC_SERIAL },
    { "update", PRAGMA_OACC_UPDATE },
    { "wait", PRAGMA_OACC_WAIT }
  };
*************** static const struct omp_pragma_def omp_p
*** 1304,1311 ****
--- 1319,1328 ----
    { "declare", PRAGMA_OMP_DECLARE },
    { "distribute", PRAGMA_OMP_DISTRIBUTE },
    { "for", PRAGMA_OMP_FOR },
+   { "loop", PRAGMA_OMP_LOOP },
    { "ordered", PRAGMA_OMP_ORDERED },
    { "parallel", PRAGMA_OMP_PARALLEL },
+   { "scan", PRAGMA_OMP_SCAN },
    { "simd", PRAGMA_OMP_SIMD },
    { "target", PRAGMA_OMP_TARGET },
    { "taskloop", PRAGMA_OMP_TASKLOOP },
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-pragma.h gcc-10.1.0/gcc/c-family/c-pragma.h
*** gcc-9.3.0/gcc/c-family/c-pragma.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-pragma.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Pragma related interfaces.
!    Copyright (C) 1995-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Pragma related interfaces.
!    Copyright (C) 1995-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** enum pragma_kind {
*** 38,43 ****
--- 38,44 ----
    PRAGMA_OACC_LOOP,
    PRAGMA_OACC_PARALLEL,
    PRAGMA_OACC_ROUTINE,
+   PRAGMA_OACC_SERIAL,
    PRAGMA_OACC_UPDATE,
    PRAGMA_OACC_WAIT,
  
*************** enum pragma_kind {
*** 52,61 ****
--- 53,64 ----
    PRAGMA_OMP_END_DECLARE_TARGET,
    PRAGMA_OMP_FLUSH,
    PRAGMA_OMP_FOR,
+   PRAGMA_OMP_LOOP,
    PRAGMA_OMP_MASTER,
    PRAGMA_OMP_ORDERED,
    PRAGMA_OMP_PARALLEL,
    PRAGMA_OMP_REQUIRES,
+   PRAGMA_OMP_SCAN,
    PRAGMA_OMP_SECTION,
    PRAGMA_OMP_SECTIONS,
    PRAGMA_OMP_SIMD,
*************** enum pragma_omp_clause {
*** 83,88 ****
--- 86,92 ----
    PRAGMA_OMP_CLAUSE_NONE = 0,
  
    PRAGMA_OMP_CLAUSE_ALIGNED,
+   PRAGMA_OMP_CLAUSE_BIND,
    PRAGMA_OMP_CLAUSE_COLLAPSE,
    PRAGMA_OMP_CLAUSE_COPYIN,
    PRAGMA_OMP_CLAUSE_COPYPRIVATE,
*************** enum pragma_omp_clause {
*** 90,95 ****
--- 94,100 ----
    PRAGMA_OMP_CLAUSE_DEFAULTMAP,
    PRAGMA_OMP_CLAUSE_DEPEND,
    PRAGMA_OMP_CLAUSE_DEVICE,
+   PRAGMA_OMP_CLAUSE_DEVICE_TYPE,
    PRAGMA_OMP_CLAUSE_DIST_SCHEDULE,
    PRAGMA_OMP_CLAUSE_FINAL,
    PRAGMA_OMP_CLAUSE_FIRSTPRIVATE,
*************** enum pragma_omp_clause {
*** 113,118 ****
--- 118,124 ----
    PRAGMA_OMP_CLAUSE_NUM_TASKS,
    PRAGMA_OMP_CLAUSE_NUM_TEAMS,
    PRAGMA_OMP_CLAUSE_NUM_THREADS,
+   PRAGMA_OMP_CLAUSE_ORDER,
    PRAGMA_OMP_CLAUSE_ORDERED,
    PRAGMA_OMP_CLAUSE_PARALLEL,
    PRAGMA_OMP_CLAUSE_PRIORITY,
*************** enum pragma_omp_clause {
*** 133,159 ****
    PRAGMA_OMP_CLAUSE_UNIFORM,
    PRAGMA_OMP_CLAUSE_UNTIED,
    PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR,
  
    /* Clauses for OpenACC.  */
    PRAGMA_OACC_CLAUSE_ASYNC,
    PRAGMA_OACC_CLAUSE_AUTO,
    PRAGMA_OACC_CLAUSE_COPY,
    PRAGMA_OACC_CLAUSE_COPYOUT,
    PRAGMA_OACC_CLAUSE_CREATE,
    PRAGMA_OACC_CLAUSE_DELETE,
    PRAGMA_OACC_CLAUSE_DEVICEPTR,
    PRAGMA_OACC_CLAUSE_DEVICE_RESIDENT,
    PRAGMA_OACC_CLAUSE_FINALIZE,
    PRAGMA_OACC_CLAUSE_GANG,
    PRAGMA_OACC_CLAUSE_HOST,
    PRAGMA_OACC_CLAUSE_INDEPENDENT,
    PRAGMA_OACC_CLAUSE_NUM_GANGS,
    PRAGMA_OACC_CLAUSE_NUM_WORKERS,
    PRAGMA_OACC_CLAUSE_PRESENT,
    PRAGMA_OACC_CLAUSE_SELF,
    PRAGMA_OACC_CLAUSE_SEQ,
    PRAGMA_OACC_CLAUSE_TILE,
-   PRAGMA_OACC_CLAUSE_USE_DEVICE,
    PRAGMA_OACC_CLAUSE_VECTOR,
    PRAGMA_OACC_CLAUSE_VECTOR_LENGTH,
    PRAGMA_OACC_CLAUSE_WAIT,
--- 139,168 ----
    PRAGMA_OMP_CLAUSE_UNIFORM,
    PRAGMA_OMP_CLAUSE_UNTIED,
    PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR,
+   PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR,
  
    /* Clauses for OpenACC.  */
    PRAGMA_OACC_CLAUSE_ASYNC,
+   PRAGMA_OACC_CLAUSE_ATTACH,
    PRAGMA_OACC_CLAUSE_AUTO,
    PRAGMA_OACC_CLAUSE_COPY,
    PRAGMA_OACC_CLAUSE_COPYOUT,
    PRAGMA_OACC_CLAUSE_CREATE,
    PRAGMA_OACC_CLAUSE_DELETE,
+   PRAGMA_OACC_CLAUSE_DETACH,
    PRAGMA_OACC_CLAUSE_DEVICEPTR,
    PRAGMA_OACC_CLAUSE_DEVICE_RESIDENT,
    PRAGMA_OACC_CLAUSE_FINALIZE,
    PRAGMA_OACC_CLAUSE_GANG,
    PRAGMA_OACC_CLAUSE_HOST,
    PRAGMA_OACC_CLAUSE_INDEPENDENT,
+   PRAGMA_OACC_CLAUSE_NO_CREATE,
    PRAGMA_OACC_CLAUSE_NUM_GANGS,
    PRAGMA_OACC_CLAUSE_NUM_WORKERS,
    PRAGMA_OACC_CLAUSE_PRESENT,
    PRAGMA_OACC_CLAUSE_SELF,
    PRAGMA_OACC_CLAUSE_SEQ,
    PRAGMA_OACC_CLAUSE_TILE,
    PRAGMA_OACC_CLAUSE_VECTOR,
    PRAGMA_OACC_CLAUSE_VECTOR_LENGTH,
    PRAGMA_OACC_CLAUSE_WAIT,
*************** enum pragma_omp_clause {
*** 167,173 ****
    PRAGMA_OACC_CLAUSE_IF = PRAGMA_OMP_CLAUSE_IF,
    PRAGMA_OACC_CLAUSE_PRIVATE = PRAGMA_OMP_CLAUSE_PRIVATE,
    PRAGMA_OACC_CLAUSE_REDUCTION = PRAGMA_OMP_CLAUSE_REDUCTION,
!   PRAGMA_OACC_CLAUSE_LINK = PRAGMA_OMP_CLAUSE_LINK
  };
  
  extern struct cpp_reader* parse_in;
--- 176,183 ----
    PRAGMA_OACC_CLAUSE_IF = PRAGMA_OMP_CLAUSE_IF,
    PRAGMA_OACC_CLAUSE_PRIVATE = PRAGMA_OMP_CLAUSE_PRIVATE,
    PRAGMA_OACC_CLAUSE_REDUCTION = PRAGMA_OMP_CLAUSE_REDUCTION,
!   PRAGMA_OACC_CLAUSE_LINK = PRAGMA_OMP_CLAUSE_LINK,
!   PRAGMA_OACC_CLAUSE_USE_DEVICE = PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR
  };
  
  extern struct cpp_reader* parse_in;
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-pretty-print.c gcc-10.1.0/gcc/c-family/c-pretty-print.c
*** gcc-9.3.0/gcc/c-family/c-pretty-print.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-pretty-print.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines common to both C and C++ pretty-printers.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
     Contributed by Gabriel Dos Reis <gdr@integrable-solutions.net>
  
  This file is part of GCC.
--- 1,5 ----
  /* Subroutines common to both C and C++ pretty-printers.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
     Contributed by Gabriel Dos Reis <gdr@integrable-solutions.net>
  
  This file is part of GCC.
*************** pp_c_pointer (c_pretty_printer *pp, tree
*** 278,284 ****
        if (TREE_CODE (t) == POINTER_TYPE)
  	pp_c_star (pp);
        else
! 	pp_c_ampersand (pp);
        pp_c_type_qualifier_list (pp, t);
        break;
  
--- 278,288 ----
        if (TREE_CODE (t) == POINTER_TYPE)
  	pp_c_star (pp);
        else
! 	{
! 	  pp_c_ampersand (pp);
! 	  if (TYPE_REF_IS_RVALUE (t))
! 	    pp_c_ampersand (pp);
! 	}
        pp_c_type_qualifier_list (pp, t);
        break;
  
*************** pp_c_specifier_qualifier_list (c_pretty_
*** 470,475 ****
--- 474,489 ----
  			     ? "_Complex" : "__complex__"));
        else if (code == VECTOR_TYPE)
  	{
+ 	  /* The syntax we print for vector types isn't real C or C++ syntax,
+ 	     so it's better to print the type name if we have one.  */
+ 	  tree name = TYPE_NAME (t);
+ 	  if (!(pp->flags & pp_c_flag_gnu_v3)
+ 	      && name
+ 	      && TREE_CODE (name) == TYPE_DECL)
+ 	    {
+ 	      pp->id_expression (name);
+ 	      break;
+ 	    }
  	  pp_c_ws_string (pp, "__vector");
  	  pp_c_left_paren (pp);
  	  pp_wide_integer (pp, TYPE_VECTOR_SUBPARTS (t));
*************** pp_c_parameter_type_list (c_pretty_print
*** 525,531 ****
        if (!first && !parms)
  	{
  	  pp_separate_with (pp, ',');
! 	  pp_c_ws_string (pp, "...");
  	}
      }
    pp_c_right_paren (pp);
--- 539,545 ----
        if (!first && !parms)
  	{
  	  pp_separate_with (pp, ',');
! 	  pp_string (pp, "...");
  	}
      }
    pp_c_right_paren (pp);
*************** c_pretty_printer::direct_abstract_declar
*** 571,586 ****
  
      case ARRAY_TYPE:
        pp_c_left_bracket (this);
!       if (TYPE_DOMAIN (t) && TYPE_MAX_VALUE (TYPE_DOMAIN (t)))
  	{
! 	  tree maxval = TYPE_MAX_VALUE (TYPE_DOMAIN (t));
! 	  tree type = TREE_TYPE (maxval);
  
! 	  if (tree_fits_shwi_p (maxval))
! 	    pp_wide_integer (this, tree_to_shwi (maxval) + 1);
! 	  else
! 	    expression (fold_build2 (PLUS_EXPR, type, maxval,
!                                      build_int_cst (type, 1)));
  	}
        pp_c_right_bracket (this);
        direct_abstract_declarator (TREE_TYPE (t));
--- 585,606 ----
  
      case ARRAY_TYPE:
        pp_c_left_bracket (this);
!       if (tree dom = TYPE_DOMAIN (t))
  	{
! 	  if (tree maxval = TYPE_MAX_VALUE (dom))
! 	    {
! 	      tree type = TREE_TYPE (maxval);
  
! 	      if (tree_fits_shwi_p (maxval))
! 		pp_wide_integer (this, tree_to_shwi (maxval) + 1);
! 	      else
! 		expression (fold_build2 (PLUS_EXPR, type, maxval,
! 					 build_int_cst (type, 1)));
! 	    }
! 	  else if (TYPE_SIZE (t))
! 	    /* Print zero for zero-length arrays but not for flexible
! 	       array members whose TYPE_SIZE is null.  */
! 	    pp_string (this, "0");
  	}
        pp_c_right_bracket (this);
        direct_abstract_declarator (TREE_TYPE (t));
*************** c_pretty_printer::c_pretty_printer ()
*** 2358,2363 ****
--- 2378,2390 ----
    parameter_list            = pp_c_parameter_type_list;
  }
  
+ /* c_pretty_printer's implementation of pretty_printer::clone vfunc.  */
+ 
+ pretty_printer *
+ c_pretty_printer::clone () const
+ {
+   return new c_pretty_printer (*this);
+ }
  
  /* Print the tree T in full, on file FILE.  */
  
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-pretty-print.h gcc-10.1.0/gcc/c-family/c-pretty-print.h
*** gcc-9.3.0/gcc/c-family/c-pretty-print.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-pretty-print.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Various declarations for the C and C++ pretty-printers.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
     Contributed by Gabriel Dos Reis <gdr@integrable-solutions.net>
  
  This file is part of GCC.
--- 1,5 ----
  /* Various declarations for the C and C++ pretty-printers.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
     Contributed by Gabriel Dos Reis <gdr@integrable-solutions.net>
  
  This file is part of GCC.
*************** enum pp_c_pretty_print_flags
*** 36,42 ****
  
  /* The data type used to bundle information necessary for pretty-printing
     a C or C++ entity.  */
! struct c_pretty_printer;
  
  /* The type of a C pretty-printer 'member' function.  */
  typedef void (*c_pretty_print_fn) (c_pretty_printer *, tree);
--- 36,42 ----
  
  /* The data type used to bundle information necessary for pretty-printing
     a C or C++ entity.  */
! class c_pretty_printer;
  
  /* The type of a C pretty-printer 'member' function.  */
  typedef void (*c_pretty_print_fn) (c_pretty_printer *, tree);
*************** typedef void (*c_pretty_print_fn) (c_pre
*** 47,55 ****
     facilities provided here.  A derived pretty-printer can override
     any function listed in the vtable below.  See cp/cxx-pretty-print.h
     and cp/cxx-pretty-print.c for an example of derivation.  */
! struct c_pretty_printer : pretty_printer
  {
    c_pretty_printer ();
  
    // Format string, possibly translated.
    void translate_string (const char *);
--- 47,57 ----
     facilities provided here.  A derived pretty-printer can override
     any function listed in the vtable below.  See cp/cxx-pretty-print.h
     and cp/cxx-pretty-print.c for an example of derivation.  */
! class c_pretty_printer : public pretty_printer
  {
+ public:
    c_pretty_printer ();
+   pretty_printer *clone () const OVERRIDE;
  
    // Format string, possibly translated.
    void translate_string (const char *);
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-semantics.c gcc-10.1.0/gcc/c-family/c-semantics.c
*** gcc-9.3.0/gcc/c-family/c-semantics.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-semantics.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* This file contains subroutine used by the C front-end to construct GENERIC.
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
     Written by Benjamin Chelf (chelf@codesourcery.com).
  
  This file is part of GCC.
--- 1,5 ----
  /* This file contains subroutine used by the C front-end to construct GENERIC.
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
     Written by Benjamin Chelf (chelf@codesourcery.com).
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-spellcheck.cc gcc-10.1.0/gcc/c-family/c-spellcheck.cc
*** gcc-9.3.0/gcc/c-family/c-spellcheck.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-spellcheck.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Find near-matches for macros.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Find near-matches for macros.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-spellcheck.h gcc-10.1.0/gcc/c-family/c-spellcheck.h
*** gcc-9.3.0/gcc/c-family/c-spellcheck.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-spellcheck.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Find near-matches for macros.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Find near-matches for macros.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-target-def.h gcc-10.1.0/gcc/c-family/c-target-def.h
*** gcc-9.3.0/gcc/c-family/c-target-def.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-target-def.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Default initializers for C-family target hooks.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
     This program is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
--- 1,5 ----
  /* Default initializers for C-family target hooks.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
     This program is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-target.def gcc-10.1.0/gcc/c-family/c-target.def
*** gcc-9.3.0/gcc/c-family/c-target.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-target.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target hook definitions for C-family front ends.
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
  
     This program is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
--- 1,5 ----
  /* Target hook definitions for C-family front ends.
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
  
     This program is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-target.h gcc-10.1.0/gcc/c-family/c-target.h
*** gcc-9.3.0/gcc/c-family/c-target.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-target.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Data structure definitions for target-specific C-family behavior.
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
  
     This program is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
--- 1,5 ----
  /* Data structure definitions for target-specific C-family behavior.
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
  
     This program is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-ubsan.c gcc-10.1.0/gcc/c-family/c-ubsan.c
*** gcc-9.3.0/gcc/c-family/c-ubsan.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-ubsan.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* UndefinedBehaviorSanitizer, undefined behavior detector.
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
     Contributed by Marek Polacek <polacek@redhat.com>
  
  This file is part of GCC.
--- 1,5 ----
  /* UndefinedBehaviorSanitizer, undefined behavior detector.
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
     Contributed by Marek Polacek <polacek@redhat.com>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-ubsan.h gcc-10.1.0/gcc/c-family/c-ubsan.h
*** gcc-9.3.0/gcc/c-family/c-ubsan.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-ubsan.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* UndefinedBehaviorSanitizer, undefined behavior detector.
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
     Contributed by Marek Polacek <polacek@redhat.com>
  
  This file is part of GCC.
--- 1,5 ----
  /* UndefinedBehaviorSanitizer, undefined behavior detector.
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
     Contributed by Marek Polacek <polacek@redhat.com>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/c-family/c-warn.c gcc-10.1.0/gcc/c-family/c-warn.c
*** gcc-9.3.0/gcc/c-family/c-warn.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c-warn.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Diagnostic routines shared by all languages that are variants of C.
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Diagnostic routines shared by all languages that are variants of C.
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 34,39 ****
--- 34,40 ----
  #include "gcc-rich-location.h"
  #include "gimplify.h"
  #include "c-family/c-indentation.h"
+ #include "c-family/c-spellcheck.h"
  #include "calls.h"
  #include "stor-layout.h"
  
*************** warn_logical_operator (location_t locati
*** 207,238 ****
       programmer. That is, an expression such as op && MASK
       where op should not be any boolean expression, nor a
       constant, and mask seems to be a non-boolean integer constant.  */
    if (TREE_CODE (op_right) == CONST_DECL)
      /* An enumerator counts as a constant.  */
      op_right = DECL_INITIAL (op_right);
    if (!truth_value_p (code_left)
        && INTEGRAL_TYPE_P (TREE_TYPE (op_left))
!       && !CONSTANT_CLASS_P (op_left)
!       && !TREE_NO_WARNING (op_left))
      {
!       tree folded_op_right = fold_for_warn (op_right);
!       if (TREE_CODE (folded_op_right) == INTEGER_CST
! 	  && !integer_zerop (folded_op_right)
! 	  && !integer_onep (folded_op_right))
! 	{
! 	  bool warned;
! 	  if (or_op)
! 	    warned
! 	      = warning_at (location, OPT_Wlogical_op,
! 			    "logical %<or%> applied to non-boolean constant");
! 	  else
! 	    warned
! 	      = warning_at (location, OPT_Wlogical_op,
! 			    "logical %<and%> applied to non-boolean constant");
! 	  if (warned)
! 	    TREE_NO_WARNING (op_left) = true;
! 	  return;
! 	}
      }
  
    /* We do not warn for constants because they are typical of macro
--- 208,239 ----
       programmer. That is, an expression such as op && MASK
       where op should not be any boolean expression, nor a
       constant, and mask seems to be a non-boolean integer constant.  */
+   STRIP_ANY_LOCATION_WRAPPER (op_right);
    if (TREE_CODE (op_right) == CONST_DECL)
      /* An enumerator counts as a constant.  */
      op_right = DECL_INITIAL (op_right);
+   tree stripped_op_left = tree_strip_any_location_wrapper (op_left);
    if (!truth_value_p (code_left)
        && INTEGRAL_TYPE_P (TREE_TYPE (op_left))
!       && !CONSTANT_CLASS_P (stripped_op_left)
!       && TREE_CODE (stripped_op_left) != CONST_DECL
!       && !TREE_NO_WARNING (op_left)
!       && TREE_CODE (op_right) == INTEGER_CST
!       && !integer_zerop (op_right)
!       && !integer_onep (op_right))
      {
!       bool warned;
!       if (or_op)
! 	warned
! 	  = warning_at (location, OPT_Wlogical_op,
! 			"logical %<or%> applied to non-boolean constant");
!       else
! 	warned
! 	  = warning_at (location, OPT_Wlogical_op,
! 			"logical %<and%> applied to non-boolean constant");
!       if (warned)
! 	TREE_NO_WARNING (op_left) = true;
!       return;
      }
  
    /* We do not warn for constants because they are typical of macro
*************** strict_aliasing_warning (location_t loc,
*** 746,752 ****
  	 are not revealed at higher levels.  */
        alias_set_type set1 = get_alias_set (TREE_TYPE (otype));
        alias_set_type set2 = get_alias_set (TREE_TYPE (type));
!       if (!COMPLETE_TYPE_P (type)
  	  || !alias_sets_must_conflict_p (set1, set2))
  	{
  	  warning_at (loc, OPT_Wstrict_aliasing,
--- 747,753 ----
  	 are not revealed at higher levels.  */
        alias_set_type set1 = get_alias_set (TREE_TYPE (otype));
        alias_set_type set2 = get_alias_set (TREE_TYPE (type));
!       if (!COMPLETE_TYPE_P (TREE_TYPE (type))
  	  || !alias_sets_must_conflict_p (set1, set2))
  	{
  	  warning_at (loc, OPT_Wstrict_aliasing,
*************** check_main_parameter_types (tree decl)
*** 1154,1170 ****
  	     "%q+D declared as variadic function", decl);
  }
  
! /* Warns if the conversion of EXPR to TYPE may alter a value.
     This is a helper function for warnings_for_convert_and_check.  */
  
! static void
  conversion_warning (location_t loc, tree type, tree expr, tree result)
  {
    tree expr_type = TREE_TYPE (expr);
    enum conversion_safety conversion_kind;
  
    if (!warn_conversion && !warn_sign_conversion && !warn_float_conversion)
!     return;
  
    /* This may happen, because for LHS op= RHS we preevaluate
       RHS and create C_MAYBE_CONST_EXPR <SAVE_EXPR <RHS>>, which
--- 1155,1172 ----
  	     "%q+D declared as variadic function", decl);
  }
  
! /* Warns and returns true if the conversion of EXPR to TYPE may alter a value.
     This is a helper function for warnings_for_convert_and_check.  */
  
! static bool
  conversion_warning (location_t loc, tree type, tree expr, tree result)
  {
    tree expr_type = TREE_TYPE (expr);
    enum conversion_safety conversion_kind;
+   int arith_ops = 0;
  
    if (!warn_conversion && !warn_sign_conversion && !warn_float_conversion)
!     return false;
  
    /* This may happen, because for LHS op= RHS we preevaluate
       RHS and create C_MAYBE_CONST_EXPR <SAVE_EXPR <RHS>>, which
*************** conversion_warning (location_t loc, tree
*** 1194,1206 ****
        if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
  	warning_at (loc, OPT_Wconversion,
  		    "conversion to %qT from boolean expression", type);
!       return;
  
      case REAL_CST:
      case INTEGER_CST:
      case COMPLEX_CST:
        {
! 	conversion_kind = unsafe_conversion_p (loc, type, expr, result, true);
  	int warnopt;
  	if (conversion_kind == UNSAFE_REAL)
  	  warnopt = OPT_Wfloat_conversion;
--- 1196,1208 ----
        if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
  	warning_at (loc, OPT_Wconversion,
  		    "conversion to %qT from boolean expression", type);
!       return true;
  
      case REAL_CST:
      case INTEGER_CST:
      case COMPLEX_CST:
        {
! 	conversion_kind = unsafe_conversion_p (type, expr, result, true);
  	int warnopt;
  	if (conversion_kind == UNSAFE_REAL)
  	  warnopt = OPT_Wfloat_conversion;
*************** conversion_warning (location_t loc, tree
*** 1209,1215 ****
  	else
  	  break;
  
! 	if (TREE_CODE_CLASS (TREE_CODE (result)) == tcc_constant)
  	  warning_at (loc, warnopt,
  		      "conversion from %qT to %qT changes value from %qE to %qE",
  		      expr_type, type, expr, result);
--- 1211,1249 ----
  	else
  	  break;
  
! 	if (conversion_kind == UNSAFE_SIGN)
! 	  {
! 	    bool cstresult
! 	      = (result
! 		 && TREE_CODE_CLASS (TREE_CODE (result)) == tcc_constant);
! 	    if (TYPE_UNSIGNED (type))
! 	      {
! 		if (cstresult)
! 		  warning_at (loc, OPT_Wsign_conversion,
! 			      "unsigned conversion from %qT to %qT "
! 			      "changes value from %qE to %qE",
! 			      expr_type, type, expr, result);
! 		else
! 		  warning_at (loc, OPT_Wsign_conversion,
! 			      "unsigned conversion from %qT to %qT "
! 			      "changes the value of %qE",
! 			      expr_type, type, expr);
! 	      }
! 	    else
! 	      {
! 		if (cstresult)
! 		  warning_at (loc, OPT_Wsign_conversion,
! 			      "signed conversion from %qT to %qT changes "
! 			      "value from %qE to %qE",
! 			      expr_type, type, expr, result);
! 		else
! 		  warning_at (loc, OPT_Wsign_conversion,
! 			      "signed conversion from %qT to %qT changes "
! 			      "the value of %qE",
! 			      expr_type, type, expr);
! 	      }
! 	  }
! 	else if (TREE_CODE_CLASS (TREE_CODE (result)) == tcc_constant)
  	  warning_at (loc, warnopt,
  		      "conversion from %qT to %qT changes value from %qE to %qE",
  		      expr_type, type, expr, result);
*************** conversion_warning (location_t loc, tree
*** 1217,1256 ****
  	  warning_at (loc, warnopt,
  		      "conversion from %qT to %qT changes the value of %qE",
  		      expr_type, type, expr);
! 	break;
        }
      case COND_EXPR:
! 	  {
  	/* In case of COND_EXPR, we do not care about the type of
  	   COND_EXPR, only about the conversion of each operand.  */
  	tree op1 = TREE_OPERAND (expr, 1);
  	tree op2 = TREE_OPERAND (expr, 2);
  
! 	conversion_warning (loc, type, op1, result);
! 	conversion_warning (loc, type, op2, result);
! 	return;
        }
  
!     default: /* 'expr' is not a constant.  */
!       conversion_kind = unsafe_conversion_p (loc, type, expr, result, true);
!       if (conversion_kind == UNSAFE_IMAGINARY)
! 	warning_at (loc, OPT_Wconversion,
! 		    "conversion from %qT to %qT discards imaginary component",
! 		    expr_type, type);
!       else
! 	{
! 	  int warnopt;
! 	  if (conversion_kind == UNSAFE_REAL)
! 	    warnopt = OPT_Wfloat_conversion;
! 	  else if (conversion_kind)
! 	    warnopt = OPT_Wconversion;
! 	  else
! 	    break;
  	  warning_at (loc, warnopt,
  		      "conversion from %qT to %qT may change value",
  		      expr_type, type);
! 	}
      }
  }
  
  /* Produce warnings after a conversion. RESULT is the result of
--- 1251,1352 ----
  	  warning_at (loc, warnopt,
  		      "conversion from %qT to %qT changes the value of %qE",
  		      expr_type, type, expr);
! 	return true;
        }
+ 
+     case PLUS_EXPR:
+     case MINUS_EXPR:
+     case MULT_EXPR:
+     case MAX_EXPR:
+     case MIN_EXPR:
+     case TRUNC_MOD_EXPR:
+     case FLOOR_MOD_EXPR:
+     case TRUNC_DIV_EXPR:
+     case FLOOR_DIV_EXPR:
+     case CEIL_DIV_EXPR:
+     case EXACT_DIV_EXPR:
+     case RDIV_EXPR:
+       arith_ops = 2;
+       goto default_;
+ 
+     case PREDECREMENT_EXPR:
+     case PREINCREMENT_EXPR:
+     case POSTDECREMENT_EXPR:
+     case POSTINCREMENT_EXPR:
+     case LSHIFT_EXPR:
+     case RSHIFT_EXPR:
+     case FIX_TRUNC_EXPR:
+     case NON_LVALUE_EXPR:
+     case NEGATE_EXPR:
+     case BIT_NOT_EXPR:
+       arith_ops = 1;
+       goto default_;
+ 
      case COND_EXPR:
!       {
  	/* In case of COND_EXPR, we do not care about the type of
  	   COND_EXPR, only about the conversion of each operand.  */
  	tree op1 = TREE_OPERAND (expr, 1);
  	tree op2 = TREE_OPERAND (expr, 2);
  
! 	return (conversion_warning (loc, type, op1, result)
! 		|| conversion_warning (loc, type, op2, result));
        }
  
!     default_:
!     default:
!       conversion_kind = unsafe_conversion_p (type, expr, result, true);
!       {
! 	int warnopt;
! 	if (conversion_kind == UNSAFE_REAL)
! 	  warnopt = OPT_Wfloat_conversion;
! 	else if (conversion_kind == UNSAFE_SIGN)
! 	  warnopt = OPT_Wsign_conversion;
! 	else if (conversion_kind)
! 	  warnopt = OPT_Wconversion;
! 	else
! 	  break;
! 
! 	if (arith_ops
! 	    && global_dc->option_enabled (warnopt,
! 					  global_dc->lang_mask,
! 					  global_dc->option_state))
! 	  {
! 	    for (int i = 0; i < arith_ops; ++i)
! 	      {
! 		tree op = TREE_OPERAND (expr, i);
! 		/* Avoid -Wsign-conversion for (unsigned)(x + (-1)).  */
! 		if (TREE_CODE (expr) == PLUS_EXPR && i == 1
! 		    && INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type)
! 		    && TREE_CODE (op) == INTEGER_CST
! 		    && tree_int_cst_sgn (op) < 0)
! 		  op = fold_build1 (NEGATE_EXPR, TREE_TYPE (op), op);
! 		tree opr = convert (type, op);
! 		if (unsafe_conversion_p (type, op, opr, true))
! 		  goto op_unsafe;
! 	      }
! 	    /* The operands seem safe, we might still want to warn if
! 	       -Warith-conversion.  */
! 	    warnopt = OPT_Warith_conversion;
! 	  op_unsafe:;
! 	  }
! 
! 	if (conversion_kind == UNSAFE_SIGN)
! 	  warning_at (loc, warnopt, "conversion to %qT from %qT "
! 		      "may change the sign of the result",
! 		      type, expr_type);
! 	else if (conversion_kind == UNSAFE_IMAGINARY)
! 	  warning_at (loc, warnopt,
! 		      "conversion from %qT to %qT discards imaginary component",
! 		      expr_type, type);
! 	else
  	  warning_at (loc, warnopt,
  		      "conversion from %qT to %qT may change value",
  		      expr_type, type);
! 	return true;
!       }
      }
+   return false;
  }
  
  /* Produce warnings after a conversion. RESULT is the result of
*************** warnings_for_convert_and_check (location
*** 1263,1268 ****
--- 1359,1369 ----
  {
    loc = expansion_point_location_if_in_system_header (loc);
  
+   while (TREE_CODE (expr) == COMPOUND_EXPR)
+     expr = TREE_OPERAND (expr, 1);
+   while (TREE_CODE (result) == COMPOUND_EXPR)
+     result = TREE_OPERAND (result, 1);
+ 
    bool cst = TREE_CODE_CLASS (TREE_CODE (result)) == tcc_constant;
  
    tree exprtype = TREE_TYPE (expr);
*************** c_do_switch_warnings (splay_tree cases,
*** 1460,1467 ****
  				       min_value) >= 0)
  	    {
  	      location_t loc = EXPR_LOCATION ((tree) node->value);
! 	      warning_at (loc, 0, "lower value in case label range"
! 				  " less than minimum value for type");
  	      CASE_LOW ((tree) node->value) = convert (TREE_TYPE (cond),
  						       min_value);
  	      node->key = (splay_tree_key) CASE_LOW ((tree) node->value);
--- 1561,1569 ----
  				       min_value) >= 0)
  	    {
  	      location_t loc = EXPR_LOCATION ((tree) node->value);
! 	      warning_at (loc, OPT_Wswitch_outside_range,
! 			  "lower value in case label range less than minimum"
! 			  " value for type");
  	      CASE_LOW ((tree) node->value) = convert (TREE_TYPE (cond),
  						       min_value);
  	      node->key = (splay_tree_key) CASE_LOW ((tree) node->value);
*************** c_do_switch_warnings (splay_tree cases,
*** 1474,1481 ****
  	      if (node == NULL || !node->key)
  		break;
  	      location_t loc = EXPR_LOCATION ((tree) node->value);
! 	      warning_at (loc, 0, "case label value is less than minimum "
! 				  "value for type");
  	      splay_tree_remove (cases, node->key);
  	    }
  	  while (1);
--- 1576,1583 ----
  	      if (node == NULL || !node->key)
  		break;
  	      location_t loc = EXPR_LOCATION ((tree) node->value);
! 	      warning_at (loc, OPT_Wswitch_outside_range, "case label value is"
! 			  " less than minimum value for type");
  	      splay_tree_remove (cases, node->key);
  	    }
  	  while (1);
*************** c_do_switch_warnings (splay_tree cases,
*** 1491,1498 ****
  				   max_value) > 0)
  	{
  	  location_t loc = EXPR_LOCATION ((tree) node->value);
! 	  warning_at (loc, 0, "upper value in case label range"
! 			      " exceeds maximum value for type");
  	  CASE_HIGH ((tree) node->value)
  	    = convert (TREE_TYPE (cond), max_value);
  	  outside_range_p = true;
--- 1593,1600 ----
  				   max_value) > 0)
  	{
  	  location_t loc = EXPR_LOCATION ((tree) node->value);
! 	  warning_at (loc, OPT_Wswitch_outside_range, "upper value in case"
! 		      " label range exceeds maximum value for type");
  	  CASE_HIGH ((tree) node->value)
  	    = convert (TREE_TYPE (cond), max_value);
  	  outside_range_p = true;
*************** c_do_switch_warnings (splay_tree cases,
*** 1503,1509 ****
  	     != NULL)
  	{
  	  location_t loc = EXPR_LOCATION ((tree) node->value);
! 	  warning_at (loc, 0,
  		      "case label value exceeds maximum value for type");
  	  splay_tree_remove (cases, node->key);
  	  outside_range_p = true;
--- 1605,1611 ----
  	     != NULL)
  	{
  	  location_t loc = EXPR_LOCATION ((tree) node->value);
! 	  warning_at (loc, OPT_Wswitch_outside_range,
  		      "case label value exceeds maximum value for type");
  	  splay_tree_remove (cases, node->key);
  	  outside_range_p = true;
*************** c_do_switch_warnings (splay_tree cases,
*** 1627,1632 ****
--- 1729,1743 ----
        if (cond && tree_int_cst_compare (cond, value))
  	continue;
  
+       /* If the enumerator is defined in a system header and uses a reserved
+ 	 name, then we continue to avoid throwing a warning.  */
+       location_t loc = DECL_SOURCE_LOCATION
+ 	    (TYPE_STUB_DECL (TYPE_MAIN_VARIANT (type)));
+       if (in_system_header_at (loc)
+ 	  && name_reserved_for_implementation_p
+ 	      (IDENTIFIER_POINTER (TREE_PURPOSE (chain))))
+ 	continue;
+ 
        /* If there is a default_node, the only relevant option is
  	 Wswitch-enum.  Otherwise, if both are enabled then we prefer
  	 to warn using -Wswitch because -Wswitch is enabled by -Wall
*************** warn_for_omitted_condop (location_t loca
*** 1663,1669 ****
        || (TREE_TYPE (cond) != NULL_TREE
  	  && TREE_CODE (TREE_TYPE (cond)) == BOOLEAN_TYPE))
        warning_at (location, OPT_Wparentheses,
! 		"the omitted middle operand in ?: will always be %<true%>, "
  		"suggest explicit middle operand");
  }
  
--- 1774,1780 ----
        || (TREE_TYPE (cond) != NULL_TREE
  	  && TREE_CODE (TREE_TYPE (cond)) == BOOLEAN_TYPE))
        warning_at (location, OPT_Wparentheses,
! 		"the omitted middle operand in %<?:%> will always be %<true%>, "
  		"suggest explicit middle operand");
  }
  
*************** lvalue_error (location_t loc, enum lvalu
*** 1762,1768 ****
        error_at (loc, "lvalue required as unary %<&%> operand");
        break;
      case lv_asm:
!       error_at (loc, "lvalue required in asm statement");
        break;
      default:
        gcc_unreachable ();
--- 1873,1879 ----
        error_at (loc, "lvalue required as unary %<&%> operand");
        break;
      case lv_asm:
!       error_at (loc, "lvalue required in %<asm%> statement");
        break;
      default:
        gcc_unreachable ();
*************** warn_for_sign_compare (location_t locati
*** 2232,2241 ****
  		{
  		  if (constant == 0)
  		    warning_at (location, OPT_Wsign_compare,
! 				"promoted ~unsigned is always non-zero");
  		  else
  		    warning_at (location, OPT_Wsign_compare,
! 				"comparison of promoted ~unsigned with constant");
  		}
  	    }
  	}
--- 2343,2354 ----
  		{
  		  if (constant == 0)
  		    warning_at (location, OPT_Wsign_compare,
! 				"promoted bitwise complement of an unsigned "
! 				"value is always nonzero");
  		  else
  		    warning_at (location, OPT_Wsign_compare,
! 				"comparison of promoted bitwise complement "
! 				"of an unsigned value with constant");
  		}
  	    }
  	}
*************** warn_for_sign_compare (location_t locati
*** 2245,2251 ****
  	       && (TYPE_PRECISION (TREE_TYPE (op1))
  		   < TYPE_PRECISION (result_type)))
  	warning_at (location, OPT_Wsign_compare,
! 		    "comparison of promoted ~unsigned with unsigned");
      }
  }
  
--- 2358,2365 ----
  	       && (TYPE_PRECISION (TREE_TYPE (op1))
  		   < TYPE_PRECISION (result_type)))
  	warning_at (location, OPT_Wsign_compare,
! 		    "comparison of promoted bitwise complement "
! 		    "of an unsigned value with unsigned");
      }
  }
  
*************** warn_for_restrict (unsigned param_pos, t
*** 2597,2607 ****
      }
  
    return warning_n (&richloc, OPT_Wrestrict, arg_positions.length (),
! 		    "passing argument %i to restrict-qualified parameter"
  		    " aliases with argument %Z",
! 		    "passing argument %i to restrict-qualified parameter"
  		    " aliases with arguments %Z",
! 		    param_pos + 1, arg_positions.address (),
  		    arg_positions.length ());
  }
  
--- 2711,2721 ----
      }
  
    return warning_n (&richloc, OPT_Wrestrict, arg_positions.length (),
! 		    "passing argument %i to %qs-qualified parameter"
  		    " aliases with argument %Z",
! 		    "passing argument %i to %qs-qualified parameter"
  		    " aliases with arguments %Z",
! 		    param_pos + 1, "restrict", arg_positions.address (),
  		    arg_positions.length ());
  }
  
diff -Nrcpad gcc-9.3.0/gcc/c-family/c.opt gcc-10.1.0/gcc/c-family/c.opt
*** gcc-9.3.0/gcc/c-family/c.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/c.opt	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ; Options for the C, ObjC, C++ and ObjC++ front ends.
! ; Copyright (C) 2003-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,5 ----
  ; Options for the C, ObjC, C++ and ObjC++ front ends.
! ; Copyright (C) 2003-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
*************** Warn on any use of alloca.
*** 309,324 ****
  
  Walloc-size-larger-than=
  C ObjC C++ LTO ObjC++ Var(warn_alloc_size_limit) Joined Host_Wide_Int ByteSize Warning Init(HOST_WIDE_INT_MAX)
! -Walloc-size-larger-than=<bytes> Warn for calls to allocation functions that
  attempt to allocate objects larger than the specified number of bytes.
  
  Wno-alloc-size-larger-than
  C ObjC C++ LTO ObjC++ Alias(Walloc-size-larger-than=,18446744073709551615EiB,none) Warning
! -Wno-alloc-size-larger-than Disable Walloc-size-larger-than= warning.  Equivalent to Walloc-size-larger-than=<SIZE_MAX> or larger.
  
  Walloc-zero
  C ObjC C++ ObjC++ Var(warn_alloc_zero) Warning
! -Walloc-zero Warn for calls to allocation functions that specify zero bytes.
  
  Walloca-larger-than=
  C ObjC C++ LTO ObjC++ Var(warn_alloca_limit) Warning Joined Host_Wide_Int ByteSize Init(HOST_WIDE_INT_MAX)
--- 309,324 ----
  
  Walloc-size-larger-than=
  C ObjC C++ LTO ObjC++ Var(warn_alloc_size_limit) Joined Host_Wide_Int ByteSize Warning Init(HOST_WIDE_INT_MAX)
! -Walloc-size-larger-than=<bytes>	Warn for calls to allocation functions that
  attempt to allocate objects larger than the specified number of bytes.
  
  Wno-alloc-size-larger-than
  C ObjC C++ LTO ObjC++ Alias(Walloc-size-larger-than=,18446744073709551615EiB,none) Warning
! Disable Walloc-size-larger-than= warning.  Equivalent to Walloc-size-larger-than=<SIZE_MAX> or larger.
  
  Walloc-zero
  C ObjC C++ ObjC++ Var(warn_alloc_zero) Warning
! Warn for calls to allocation functions that specify zero bytes.
  
  Walloca-larger-than=
  C ObjC C++ LTO ObjC++ Var(warn_alloca_limit) Warning Joined Host_Wide_Int ByteSize Init(HOST_WIDE_INT_MAX)
*************** alloca, and on bounded uses of alloca wh
*** 328,334 ****
  
  Wno-alloca-larger-than
  C ObjC C++ LTO ObjC++ Alias(Walloca-larger-than=,18446744073709551615EiB,none) Warning
! -Wno-alloca-larger-than Disable Walloca-larger-than= warning.  Equivalent to Walloca-larger-than=<SIZE_MAX> or larger.
  
  Warray-bounds
  LangEnabledBy(C ObjC C++ LTO ObjC++)
--- 328,334 ----
  
  Wno-alloca-larger-than
  C ObjC C++ LTO ObjC++ Alias(Walloca-larger-than=,18446744073709551615EiB,none) Warning
! Disable Walloca-larger-than= warning.  Equivalent to Walloca-larger-than=<SIZE_MAX> or larger.
  
  Warray-bounds
  LangEnabledBy(C ObjC C++ LTO ObjC++)
*************** Warray-bounds=
*** 338,343 ****
--- 338,347 ----
  LangEnabledBy(C ObjC C++ LTO ObjC++,Wall,1,0)
  ; in common.opt
  
+ Wzero-length-bounds
+ C ObjC C++ ObjC++ Var(warn_zero_length_bounds) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall)
+ Warn about accesses to interior zero-length array members.
+ 
  Wassign-intercept
  ObjC ObjC++ Var(warn_assign_intercept) Warning
  Warn whenever an Objective-C assignment is being intercepted by the garbage collector.
*************** C ObjC C++ ObjC++ CPP(warn_builtin_macro
*** 367,373 ****
  Warn when a built-in preprocessor macro is undefined or redefined.
  
  Wc11-c2x-compat
! C ObjC Var(warn_c11_c2x_compat) Init(-1) Warning
  Warn about features not present in ISO C11, but present in ISO C2X.
  
  Wc90-c99-compat
--- 371,377 ----
  Warn when a built-in preprocessor macro is undefined or redefined.
  
  Wc11-c2x-compat
! C ObjC CPP(cpp_warn_c11_c2x_compat) CppReason(CPP_W_C11_C2X_COMPAT) Var(warn_c11_c2x_compat) Init(-1) Warning
  Warn about features not present in ISO C11, but present in ISO C2X.
  
  Wc90-c99-compat
*************** Wc++17-compat
*** 400,405 ****
--- 404,416 ----
  C++ ObjC++ Var(warn_cxx17_compat) Warning LangEnabledBy(C++ ObjC++,Wall)
  Warn about C++ constructs whose meaning differs between ISO C++ 2014 and ISO C++ 2017.
  
+ Wc++2a-compat
+ C++ ObjC++ Warning Alias(Wc++20-compat) Undocumented
+ 
+ Wc++20-compat
+ C++ ObjC++ Var(warn_cxx20_compat) Warning LangEnabledBy(C++ ObjC++,Wall)
+ Warn about C++ constructs whose meaning differs between ISO C++ 2017 and ISO C++ 2020.
+ 
  Wcast-function-type
  C ObjC C++ ObjC++ Var(warn_cast_function_type) Warning EnabledBy(Wextra)
  Warn about casts between incompatible function types.
*************** C ObjC C++ ObjC++ Var(warn_char_subscrip
*** 421,433 ****
  Warn about subscripts whose type is \"char\".
  
  Wchkp
! C ObjC C++ ObjC++ Warning Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  Wclobbered
  C ObjC C++ ObjC++ Var(warn_clobbered) Warning EnabledBy(Wextra)
  Warn about variables that might be changed by \"longjmp\" or \"vfork\".
  
  Wcomment
  C ObjC C++ ObjC++ CPP(warn_comments) CppReason(CPP_W_COMMENTS) Var(cpp_warn_comment) Init(0) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall)
  Warn about possibly nested block comments, and C++ comments spanning more than one physical line.
--- 432,448 ----
  Warn about subscripts whose type is \"char\".
  
  Wchkp
! C ObjC C++ ObjC++ Warning WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  Wclobbered
  C ObjC C++ ObjC++ Var(warn_clobbered) Warning EnabledBy(Wextra)
  Warn about variables that might be changed by \"longjmp\" or \"vfork\".
  
+ Wcomma-subscript
+ C++ ObjC++ Var(warn_comma_subscript) Warning
+ Warn about uses of a comma operator within a subscripting expression.
+ 
  Wcomment
  C ObjC C++ ObjC++ CPP(warn_comments) CppReason(CPP_W_COMMENTS) Var(cpp_warn_comment) Init(0) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall)
  Warn about possibly nested block comments, and C++ comments spanning more than one physical line.
*************** Wenum-compare
*** 530,535 ****
--- 545,554 ----
  C ObjC C++ ObjC++ Var(warn_enum_compare) Init(-1) Warning LangEnabledBy(C ObjC,Wall || Wc++-compat)
  Warn about comparison of different enum types.
  
+ Wenum-conversion
+ C ObjC Var(warn_enum_conversion) Init(0) Warning LangEnabledBy(C ObjC,Wextra)
+ Warn about implicit conversion of enum types.
+ 
  Werror
  C ObjC C++ ObjC++
  ; Documented in common.opt
*************** Wformat-contains-nul
*** 562,567 ****
--- 581,590 ----
  C ObjC C++ ObjC++ Var(warn_format_contains_nul) Warning LangEnabledBy(C ObjC C++ ObjC++,Wformat=, warn_format >= 1, 0)
  Warn about format strings that contain NUL bytes.
  
+ Wformat-diag
+ C ObjC C++ ObjC++ Var(warn_format_diag) Warning LangEnabledBy(C ObjC C++ ObjC++,Wformat=, warn_format >= 1, 0)
+ Warn about GCC format strings with strings unsuitable for diagnostics.
+ 
  Wformat-extra-args
  C ObjC C++ ObjC++ Var(warn_format_extra_args) Warning LangEnabledBy(C ObjC C++ ObjC++,Wformat=, warn_format >= 1, 0)
  Warn if passing too many arguments to a function for its format string.
*************** Wignored-attributes
*** 621,626 ****
--- 644,653 ----
  C C++ Var(warn_ignored_attributes) Init(1) Warning
  Warn whenever attributes are ignored.
  
+ Winaccessible-base
+ C++ ObjC++ Var(warn_inaccessible_base) Init(1) Warning
+ Warn when a base is inaccessible in derived due to ambiguity.
+ 
  Wincompatible-pointer-types
  C ObjC Var(warn_incompatible_pointer_types) Init(1) Warning
  Warn when there is a conversion between pointers that have incompatible types.
*************** Wmisleading-indentation
*** 728,733 ****
--- 755,764 ----
  C C++ Common Var(warn_misleading_indentation) Warning LangEnabledBy(C C++,Wall)
  Warn when the indentation of the code does not reflect the block structure.
  
+ Wmismatched-tags
+ C++ ObjC++ Var(warn_mismatched_tags) Warning
+ Warn when a class is redeclared or referenced using a mismatched class-key.
+ 
  Wmissing-braces
  C ObjC C++ ObjC++ Var(warn_missing_braces) Warning LangEnabledBy(C ObjC,Wall)
  Warn about possibly missing braces around initializers.
*************** Wpacked-not-aligned
*** 756,761 ****
--- 787,796 ----
  C ObjC C++ ObjC++ Var(warn_packed_not_aligned) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall)
  Warn when fields in a struct with the packed attribute are misaligned.
  
+ Wredundant-tags
+ C++ ObjC++ Var(warn_redundant_tags) Warning
+ Warn when a class or enumerated type is referenced using a redundant class-key.
+ 
  Wsized-deallocation
  C++ ObjC++ Var(warn_sized_deallocation) Warning EnabledBy(Wextra)
  Warn about missing sized deallocation functions.
*************** Wsizeof-array-argument
*** 772,777 ****
--- 807,818 ----
  C ObjC C++ ObjC++ Var(warn_sizeof_array_argument) Warning Init(1)
  Warn when sizeof is applied on a parameter declared as an array.
  
+ Wstring-compare
+ C ObjC C++ LTO ObjC++ Warning Var(warn_string_compare) Warning LangEnabledBy(C ObjC C++ ObjC++, Wextra)
+ Warn about calls to strcmp and strncmp used in equality expressions that
+ are necessarily true or false due to the length of one and size of the other
+ argument.
+ 
  Wstringop-overflow
  C ObjC C++ LTO ObjC++ Warning Alias(Wstringop-overflow=, 2, 0)
  Warn about buffer overflow in string manipulation functions like memcpy
*************** Wswitch-bool
*** 811,816 ****
--- 852,861 ----
  C ObjC C++ ObjC++ Var(warn_switch_bool) Warning Init(1)
  Warn about switches with boolean controlling expression.
  
+ Wswitch-outside-range
+ C ObjC C++ ObjC++ Var(warn_switch_outside_range) Warning Init(1)
+ Warn about switch values that are outside of the switch's type range.
+ 
  Wtemplates
  C++ ObjC++ Var(warn_templates) Warning
  Warn on primary template declaration.
*************** C ObjC Var(warn_missing_prototypes) Warn
*** 837,843 ****
  Warn about global functions without prototypes.
  
  Wmudflap
! C ObjC C++ ObjC++ Deprecated
  
  Wmultichar
  C ObjC C++ ObjC++ CPP(warn_multichar) CppReason(CPP_W_MULTICHAR) Var(cpp_warn_multichar) Init(0) Warning
--- 882,888 ----
  Warn about global functions without prototypes.
  
  Wmudflap
! C ObjC C++ ObjC++ WarnRemoved
  
  Wmultichar
  C ObjC C++ ObjC++ CPP(warn_multichar) CppReason(CPP_W_MULTICHAR) Var(cpp_warn_multichar) Init(0) Warning
*************** C ObjC Var(warn_old_style_declaration) W
*** 923,929 ****
  Warn for obsolescent usage in a declaration.
  
  Wold-style-definition
! C ObjC Var(warn_old_style_definition) Warning
  Warn if an old-style parameter definition is used.
  
  Wopenmp-simd
--- 968,974 ----
  Warn for obsolescent usage in a declaration.
  
  Wold-style-definition
! C ObjC Var(warn_old_style_definition) Init(-1) Warning
  Warn if an old-style parameter definition is used.
  
  Wopenmp-simd
*************** Wshift-negative-value
*** 1062,1067 ****
--- 1107,1116 ----
  C ObjC C++ ObjC++ Var(warn_shift_negative_value) Init(-1) Warning
  Warn if left shifting a negative value.
  
+ Warith-conversion
+ C ObjC C++ ObjC++ Var(warn_arith_conv) Warning
+ Warn if conversion of the result of arithmetic might change the value even though converting the operands cannot.
+ 
  Wsign-compare
  C ObjC C++ ObjC++ Var(warn_sign_compare) Warning LangEnabledBy(C++ ObjC++,Wall)
  Warn about signed-unsigned comparisons.
*************** larger than <number> bytes.
*** 1203,1209 ****
  
  Wno-vla-larger-than
  C ObjC C++ LTO ObjC++ Alias(Wvla-larger-than=,18446744073709551615EiB,none) Warning
! -Wno-vla-larger-than Disable Wvla-larger-than= warning.  Equivalent to Wvla-larger-than=<SIZE_MAX> or larger.
  
  Wvolatile-register-var
  C ObjC C++ ObjC++ Var(warn_volatile_register_var) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall)
--- 1252,1262 ----
  
  Wno-vla-larger-than
  C ObjC C++ LTO ObjC++ Alias(Wvla-larger-than=,18446744073709551615EiB,none) Warning
! Disable Wvla-larger-than= warning.  Equivalent to Wvla-larger-than=<SIZE_MAX> or larger.
! 
! Wvolatile
! C++ ObjC++ Var(warn_volatile) Warning
! Warn about deprecated uses of volatile qualifier.
  
  Wvolatile-register-var
  C ObjC C++ ObjC++ Var(warn_volatile_register_var) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall)
*************** Enforce class member access control sema
*** 1260,1266 ****
  
  fada-spec-parent=
  C ObjC C++ ObjC++ RejectNegative Joined Var(ada_specs_parent)
! -fada-spec-parent=unit  Dump Ada specs as child units of given parent.
  
  faligned-new
  C++ ObjC++ Alias(faligned-new=,1,0)
--- 1313,1319 ----
  
  fada-spec-parent=
  C ObjC C++ ObjC++ RejectNegative Joined Var(ada_specs_parent)
! -fada-spec-parent=unit	Dump Ada specs as child units of given parent.
  
  faligned-new
  C++ ObjC++ Alias(faligned-new=,1,0)
*************** Support C++17 allocation of over-aligned
*** 1268,1284 ****
  
  faligned-new=
  C++ ObjC++ Joined RejectNegative Var(aligned_new_threshold) UInteger Init(-1)
! -faligned-new=<N> Use C++17 over-aligned type allocation for alignments greater than N.
  
  fall-virtual
! C++ ObjC++ Deprecated
  
  fallow-parameterless-variadic-functions
  C ObjC Var(flag_allow_parameterless_variadic_functions)
  Allow variadic functions without named parameter.
  
  falt-external-templates
! C++ ObjC++ Deprecated
  No longer supported.
  
  fasm
--- 1321,1337 ----
  
  faligned-new=
  C++ ObjC++ Joined RejectNegative Var(aligned_new_threshold) UInteger Init(-1)
! -faligned-new=<N>	Use C++17 over-aligned type allocation for alignments greater than N.
  
  fall-virtual
! C++ ObjC++ WarnRemoved
  
  fallow-parameterless-variadic-functions
  C ObjC Var(flag_allow_parameterless_variadic_functions)
  Allow variadic functions without named parameter.
  
  falt-external-templates
! C++ ObjC++ WarnRemoved
  No longer supported.
  
  fasm
*************** Enable the char8_t fundamental type and
*** 1306,1401 ****
  and character literals.
  
  fcheck-pointer-bounds
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-check-incomplete-type
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-zero-input-bounds-for-main
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-first-field-has-own-bounds
! C ObjC C++ ObjC++ LTO Deprecated RejectNegative
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-narrow-bounds
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-narrow-to-innermost-array
! C ObjC C++ ObjC++ LTO Deprecated RejectNegative
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-flexible-struct-trailing-arrays
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-optimize
! C ObjC C++ ObjC++ LTO Deprecated
  
  fchkp-use-fast-string-functions
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-use-nochk-string-functions
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-use-static-bounds
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-use-static-const-bounds
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-treat-zero-dynamic-size-as-infinite
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-check-read
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-check-write
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-store-bounds
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-instrument-calls
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-instrument-marked-only
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fchkp-use-wrappers
! C ObjC C++ ObjC++ LTO Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  static-libmpx
! Driver Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  static-libmpxwrappers
! Driver Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  fcilkplus
  C ObjC C++ ObjC++ LTO Undocumented Ignore
! Deprecated in GCC 8.  This switch has no effect.
  
  fconcepts
  C++ ObjC++ Var(flag_concepts)
  Enable support for C++ concepts.
  
  fcond-mismatch
  C ObjC C++ ObjC++
  Allow the arguments of the '?' operator to have different types.
--- 1359,1462 ----
  and character literals.
  
  fcheck-pointer-bounds
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-check-incomplete-type
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-zero-input-bounds-for-main
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-first-field-has-own-bounds
! C ObjC C++ ObjC++ LTO WarnRemoved RejectNegative
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-narrow-bounds
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-narrow-to-innermost-array
! C ObjC C++ ObjC++ LTO WarnRemoved RejectNegative
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-flexible-struct-trailing-arrays
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-optimize
! C ObjC C++ ObjC++ LTO WarnRemoved
  
  fchkp-use-fast-string-functions
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-use-nochk-string-functions
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-use-static-bounds
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-use-static-const-bounds
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-treat-zero-dynamic-size-as-infinite
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-check-read
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-check-write
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-store-bounds
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-instrument-calls
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-instrument-marked-only
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fchkp-use-wrappers
! C ObjC C++ ObjC++ LTO WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  static-libmpx
! Driver WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  static-libmpxwrappers
! Driver WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  fcilkplus
  C ObjC C++ ObjC++ LTO Undocumented Ignore
! Removed in GCC 8.  This switch has no effect.
  
  fconcepts
  C++ ObjC++ Var(flag_concepts)
  Enable support for C++ concepts.
  
+ fconcepts-ts
+ C++ ObjC++ Var(flag_concepts_ts) Init(0)
+ Enable certain features present in the Concepts TS.
+ 
+ fconcepts-diagnostics-depth=
+ C++ ObjC++ Joined RejectNegative UInteger Var(concepts_diagnostics_max_depth) Init(1)
+ Specify maximum error replay depth during recursive diagnosis of a constraint satisfaction failure.
+ 
  fcond-mismatch
  C ObjC C++ ObjC++
  Allow the arguments of the '?' operator to have different types.
*************** fconstexpr-depth=
*** 1412,1417 ****
--- 1473,1482 ----
  C++ ObjC++ Joined RejectNegative UInteger Var(max_constexpr_depth) Init(512)
  -fconstexpr-depth=<number>	Specify maximum constexpr recursion depth.
  
+ fconstexpr-cache-depth=
+ C++ ObjC++ Joined RejectNegative UInteger Var(constexpr_cache_depth) Init(8)
+ -fconstexpr-cache-depth=<number>	Specify maximum constexpr recursion cache depth.
+ 
  fconstexpr-loop-limit=
  C++ ObjC++ Joined RejectNegative UInteger Var(constexpr_loop_limit) Init(262144)
  -fconstexpr-loop-limit=<number>	Specify maximum constexpr loop iteration count.
*************** fconstexpr-ops-limit=
*** 1420,1432 ****
  C++ ObjC++ Joined RejectNegative Host_Wide_Int Var(constexpr_ops_limit) Init(33554432)
  -fconstexpr-ops-limit=<number>	Specify maximum number of constexpr operations during a single constexpr evaluation.
  
  fdebug-cpp
  C ObjC C++ ObjC++
  Emit debug annotations during preprocessing.
  
  fdeduce-init-list
! C++ ObjC++ Var(flag_deduce_init_list) Init(0)
! -fdeduce-init-list	enable deduction of std::initializer_list for a template type parameter from a brace-enclosed initializer-list.
  
  fdeclone-ctor-dtor
  C++ ObjC++ Var(flag_declone_ctor_dtor) Init(-1)
--- 1485,1501 ----
  C++ ObjC++ Joined RejectNegative Host_Wide_Int Var(constexpr_ops_limit) Init(33554432)
  -fconstexpr-ops-limit=<number>	Specify maximum number of constexpr operations during a single constexpr evaluation.
  
+ fcoroutines
+ C++ LTO Var(flag_coroutines)
+ Enable C++ coroutines (experimental).
+ 
  fdebug-cpp
  C ObjC C++ ObjC++
  Emit debug annotations during preprocessing.
  
  fdeduce-init-list
! C++ ObjC++ Ignore
! Does nothing.  Preserved for backward compatibility.
  
  fdeclone-ctor-dtor
  C++ ObjC++ Var(flag_declone_ctor_dtor) Init(-1)
*************** Permit '$' as an identifier character.
*** 1450,1456 ****
  
  fmacro-prefix-map=
  C ObjC C++ ObjC++ Joined RejectNegative
! -fmacro-prefix-map=<old>=<new> Map one directory name to another in __FILE__, __BASE_FILE__, and __builtin_FILE().
  
  fdump-ada-spec
  C ObjC C++ ObjC++ RejectNegative Var(flag_dump_ada_spec)
--- 1519,1525 ----
  
  fmacro-prefix-map=
  C ObjC C++ ObjC++ Joined RejectNegative
! -fmacro-prefix-map=<old>=<new>	Map one directory name to another in __FILE__, __BASE_FILE__, and __builtin_FILE().
  
  fdump-ada-spec
  C ObjC C++ ObjC++ RejectNegative Var(flag_dump_ada_spec)
*************** C++ ObjC++ Var(flag_elide_constructors)
*** 1465,1478 ****
  
  felide-type
  C++ ObjC++ Var(flag_elide_type) Init(1)
! -fno-elide-type Do not elide common elements in template comparisons.
  
  fenforce-eh-specs
  C++ ObjC++ Var(flag_enforce_eh_specs) Init(1)
  Generate code to check exception specifications.
  
  fenum-int-equiv
! C++ ObjC++ Deprecated
  
  fexec-charset=
  C ObjC C++ ObjC++ Joined RejectNegative
--- 1534,1547 ----
  
  felide-type
  C++ ObjC++ Var(flag_elide_type) Init(1)
! Do not elide common elements in template comparisons.
  
  fenforce-eh-specs
  C++ ObjC++ Var(flag_enforce_eh_specs) Init(1)
  Generate code to check exception specifications.
  
  fenum-int-equiv
! C++ ObjC++ WarnRemoved
  
  fexec-charset=
  C ObjC C++ ObjC++ Joined RejectNegative
*************** C++ ObjC++ Var(flag_extern_tls_init) Ini
*** 1491,1500 ****
  Support dynamic initialization of thread-local variables in a different translation unit.
  
  fexternal-templates
! C++ ObjC++ Deprecated
  
  ffor-scope
! C++ ObjC++ Deprecated
  
  ffreestanding
  C ObjC C++ ObjC++
--- 1560,1569 ----
  Support dynamic initialization of thread-local variables in a different translation unit.
  
  fexternal-templates
! C++ ObjC++ WarnRemoved
  
  ffor-scope
! C++ ObjC++ WarnRemoved
  
  ffreestanding
  C ObjC C++ ObjC++
*************** C ObjC Var(flag_gnu89_inline) Init(-1)
*** 1513,1532 ****
  Use traditional GNU semantics for inline functions.
  
  fguiding-decls
! C++ ObjC++ Deprecated
  
  fhandle-exceptions
  C++ ObjC++ Optimization Alias(fexceptions) Warn({%<-fhandle-exceptions%> has been renamed %<-fexceptions%> (and is now on by default)})
  
  fhonor-std
! C++ ObjC++ Deprecated
  
  fhosted
  C ObjC
  Assume normal C execution environment.
  
  fhuge-objects
! C++ ObjC++ Deprecated
  No longer supported.
  
  fimplement-inlines
--- 1582,1601 ----
  Use traditional GNU semantics for inline functions.
  
  fguiding-decls
! C++ ObjC++ WarnRemoved
  
  fhandle-exceptions
  C++ ObjC++ Optimization Alias(fexceptions) Warn({%<-fhandle-exceptions%> has been renamed %<-fexceptions%> (and is now on by default)})
  
  fhonor-std
! C++ ObjC++ WarnRemoved
  
  fhosted
  C ObjC
  Assume normal C execution environment.
  
  fhuge-objects
! C++ ObjC++ WarnRemoved
  No longer supported.
  
  fimplement-inlines
*************** C++ ObjC++ Var(flag_new_inheriting_ctors
*** 1546,1582 ****
  Implement C++17 inheriting constructor semantics.
  
  ffriend-injection
! C++ ObjC++ Deprecated
  
  fkeep-inline-dllexport
  C C++ ObjC ObjC++ Var(flag_keep_inline_dllexport) Init(1) Report Condition(TARGET_DLLIMPORT_DECL_ATTRIBUTES)
  Don't emit dllexported inline functions unless needed.
  
  flabels-ok
! C++ ObjC++ Deprecated
  
  flax-vector-conversions
  C ObjC C++ ObjC++ Var(flag_lax_vector_conversions)
  Allow implicit conversions between vectors with differing numbers of subparts and/or differing element types.
  
  fms-extensions
  C ObjC C++ ObjC++ Var(flag_ms_extensions)
  Don't warn about uses of Microsoft extensions.
  
  fmudflap
! C ObjC C++ ObjC++ Deprecated
  
  fmudflapth
! C ObjC C++ ObjC++ Deprecated
  
  fmudflapir
! C ObjC C++ ObjC++ Deprecated
  
  fname-mangling-version-
! C++ ObjC++ Joined Deprecated
  
  fnew-abi
! C++ ObjC++ Deprecated
  
  fnew-ttp-matching
  C++ ObjC++ Var(flag_new_ttp)
--- 1615,1655 ----
  Implement C++17 inheriting constructor semantics.
  
  ffriend-injection
! C++ ObjC++ WarnRemoved
  
  fkeep-inline-dllexport
  C C++ ObjC ObjC++ Var(flag_keep_inline_dllexport) Init(1) Report Condition(TARGET_DLLIMPORT_DECL_ATTRIBUTES)
  Don't emit dllexported inline functions unless needed.
  
  flabels-ok
! C++ ObjC++ WarnRemoved
  
  flax-vector-conversions
  C ObjC C++ ObjC++ Var(flag_lax_vector_conversions)
  Allow implicit conversions between vectors with differing numbers of subparts and/or differing element types.
  
+ fmax-include-depth=
+ C ObjC C++ ObjC++ Joined RejectNegative UInteger
+ fmax-include-depth=<number> Set the maximum depth of the nested #include.
+ 
  fms-extensions
  C ObjC C++ ObjC++ Var(flag_ms_extensions)
  Don't warn about uses of Microsoft extensions.
  
  fmudflap
! C ObjC C++ ObjC++ WarnRemoved
  
  fmudflapth
! C ObjC C++ ObjC++ WarnRemoved
  
  fmudflapir
! C ObjC C++ ObjC++ WarnRemoved
  
  fname-mangling-version-
! C++ ObjC++ Joined WarnRemoved
  
  fnew-abi
! C++ ObjC++ WarnRemoved
  
  fnew-ttp-matching
  C++ ObjC++ Var(flag_new_ttp)
*************** fnonansi-builtins
*** 1617,1623 ****
  C++ ObjC++ Var(flag_no_nonansi_builtin, 0)
  
  fnonnull-objects
! C++ ObjC++ Deprecated
  
  fnothrow-opt
  C++ ObjC++ Optimization Var(flag_nothrow_opt)
--- 1690,1696 ----
  C++ ObjC++ Var(flag_no_nonansi_builtin, 0)
  
  fnonnull-objects
! C++ ObjC++ WarnRemoved
  
  fnothrow-opt
  C++ ObjC++ Optimization Var(flag_nothrow_opt)
*************** C ObjC C++ ObjC++ JoinedOrMissing Reject
*** 1709,1719 ****
  
  ftrack-macro-expansion=
  C ObjC C++ ObjC++ JoinedOrMissing RejectNegative UInteger
! -ftrack-macro-expansion=<0|1|2>  Track locations of tokens coming from macro expansion and display them in error messages.
  
  fpretty-templates
  C++ ObjC++ Var(flag_pretty_templates) Init(1)
! -fno-pretty-templates Do not pretty-print template specializations as the template signature followed by the arguments.
  
  fprintf-return-value
  C ObjC C++ ObjC++ LTO Optimization Var(flag_printf_return_value) Init(1)
--- 1782,1792 ----
  
  ftrack-macro-expansion=
  C ObjC C++ ObjC++ JoinedOrMissing RejectNegative UInteger
! -ftrack-macro-expansion=<0|1|2>	Track locations of tokens coming from macro expansion and display them in error messages.
  
  fpretty-templates
  C++ ObjC++ Var(flag_pretty_templates) Init(1)
! Do not pretty-print template specializations as the template signature followed by the arguments.
  
  fprintf-return-value
  C ObjC C++ ObjC++ LTO Optimization Var(flag_printf_return_value) Init(1)
*************** ObjC ObjC++ LTO Var(flag_replace_objc_cl
*** 1724,1731 ****
  Used in Fix-and-Continue mode to indicate that object files may be swapped in at runtime.
  
  frepo
! C++ ObjC++
! Enable automatic template instantiation.
  
  frtti
  C++ ObjC++ Optimization Var(flag_rtti) Init(1)
--- 1797,1804 ----
  Used in Fix-and-Continue mode to indicate that object files may be swapped in at runtime.
  
  frepo
! C++ ObjC++ WarnRemoved
! Removed in GCC 10.  This switch has no effect.
  
  frtti
  C++ ObjC++ Optimization Var(flag_rtti) Init(1)
*************** C++ ObjC++ Var(flag_sized_deallocation)
*** 1752,1758 ****
  Enable C++14 sized deallocation support.
  
  fsquangle
! C++ ObjC++ Deprecated
  
  fsso-struct=
  C ObjC Joined RejectNegative Enum(sso_struct) Var(default_sso) Init(SSO_NATIVE)
--- 1825,1831 ----
  Enable C++14 sized deallocation support.
  
  fsquangle
! C++ ObjC++ WarnRemoved
  
  fsso-struct=
  C ObjC Joined RejectNegative Enum(sso_struct) Var(default_sso) Init(SSO_NATIVE)
*************** C++ ObjC++ Optimization Var(flag_strict_
*** 1779,1785 ****
  Assume that values of enumeration type are always within the minimum range of that type.
  
  fstrict-prototype
! C++ ObjC++ Deprecated
  
  fstrong-eval-order
  C++ ObjC++ Common Alias(fstrong-eval-order=, all, none)
--- 1852,1858 ----
  Assume that values of enumeration type are always within the minimum range of that type.
  
  fstrict-prototype
! C++ ObjC++ WarnRemoved
  
  fstrong-eval-order
  C++ ObjC++ Common Alias(fstrong-eval-order=, all, none)
*************** C++ ObjC++ Joined RejectNegative UIntege
*** 1819,1825 ****
  -ftemplate-depth=<number>	Specify maximum template instantiation depth.
  
  fthis-is-variable
! C++ ObjC++ Deprecated
  
  fthreadsafe-statics
  C++ ObjC++ Optimization Var(flag_threadsafe_statics) Init(1)
--- 1892,1898 ----
  -ftemplate-depth=<number>	Specify maximum template instantiation depth.
  
  fthis-is-variable
! C++ ObjC++ WarnRemoved
  
  fthreadsafe-statics
  C++ ObjC++ Optimization Var(flag_threadsafe_statics) Init(1)
*************** C++ ObjC++ Var(flag_visibility_ms_compat
*** 1850,1860 ****
  Changes visibility to match Microsoft Visual Studio by default.
  
  fvtable-gc
! C++ ObjC++ Deprecated
  No longer supported.
  
  fvtable-thunks
! C++ ObjC++ Deprecated
  No longer supported.
  
  fweak
--- 1923,1933 ----
  Changes visibility to match Microsoft Visual Studio by default.
  
  fvtable-gc
! C++ ObjC++ WarnRemoved
  No longer supported.
  
  fvtable-thunks
! C++ ObjC++ WarnRemoved 
  No longer supported.
  
  fweak
*************** C ObjC C++ ObjC++ Var(flag_working_direc
*** 1870,1876 ****
  Generate a #line directive pointing at the current working directory.
  
  fxref
! C++ ObjC++ Deprecated
  No longer supported.
  
  fzero-link
--- 1943,1949 ----
  Generate a #line directive pointing at the current working directory.
  
  fxref
! C++ ObjC++ WarnRemoved
  No longer supported.
  
  fzero-link
*************** Conform to the ISO 2017 C++ standard.
*** 2002,2008 ****
  
  std=c++2a
  C++ ObjC++
! Conform to the ISO 2020(?) C++ draft standard (experimental and incomplete support).
  
  std=c11
  C ObjC
--- 2075,2085 ----
  
  std=c++2a
  C++ ObjC++
! Conform to the ISO 2020 C++ draft standard (experimental and incomplete support).
! 
! std=c++20
! C++ ObjC++ Alias(std=c++2a)
! Conform to the ISO 2020 C++ draft standard (experimental and incomplete support).
  
  std=c11
  C ObjC
*************** Conform to the ISO 2017 C++ standard wit
*** 2076,2082 ****
  
  std=gnu++2a
  C++ ObjC++
! Conform to the ISO 2020(?) C++ draft standard with GNU extensions (experimental and incomplete support).
  
  std=gnu11
  C ObjC
--- 2153,2163 ----
  
  std=gnu++2a
  C++ ObjC++
! Conform to the ISO 2020 C++ draft standard with GNU extensions (experimental and incomplete support).
! 
! std=gnu++20
! C++ ObjC++ Alias(std=gnu++2a)
! Conform to the ISO 2020 C++ draft standard with GNU extensions (experimental and incomplete support).
  
  std=gnu11
  C ObjC
diff -Nrcpad gcc-9.3.0/gcc/c-family/cppspec.c gcc-10.1.0/gcc/c-family/cppspec.c
*** gcc-9.3.0/gcc/c-family/cppspec.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/cppspec.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Specific flags and argument handling of the C preprocessor.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Specific flags and argument handling of the C preprocessor.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c-family/known-headers.cc gcc-10.1.0/gcc/c-family/known-headers.cc
*** gcc-9.3.0/gcc/c-family/known-headers.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/known-headers.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Support for suggestions about missing #include directives.
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Support for suggestions about missing #include directives.
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c-family/known-headers.h gcc-10.1.0/gcc/c-family/known-headers.h
*** gcc-9.3.0/gcc/c-family/known-headers.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/known-headers.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Support for suggestions about missing #include directives.
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Support for suggestions about missing #include directives.
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c-family/name-hint.h gcc-10.1.0/gcc/c-family/name-hint.h
*** gcc-9.3.0/gcc/c-family/name-hint.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/name-hint.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Support for offering suggestions for handling unrecognized names.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Support for offering suggestions for handling unrecognized names.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/c-family/stub-objc.c gcc-10.1.0/gcc/c-family/stub-objc.c
*** gcc-9.3.0/gcc/c-family/stub-objc.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/c-family/stub-objc.c	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Stub functions for Objective-C and Objective-C++ routines
     that are called from within the C and C++ front-ends,
     respectively.
!    Copyright (C) 1991-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,7 ----
  /* Stub functions for Objective-C and Objective-C++ routines
     that are called from within the C and C++ front-ends,
     respectively.
!    Copyright (C) 1991-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/caller-save.c gcc-10.1.0/gcc/caller-save.c
*** gcc-9.3.0/gcc/caller-save.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/caller-save.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Save and restore call-clobbered registers which are live across a call.
!    Copyright (C) 1989-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Save and restore call-clobbered registers which are live across a call.
!    Copyright (C) 1989-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 37,42 ****
--- 37,43 ----
  #include "dumpfile.h"
  #include "rtl-iter.h"
  #include "target.h"
+ #include "function-abi.h"
  
  #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
  
*************** static void mark_set_regs (rtx, const_rt
*** 88,98 ****
  static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg);
  static refmarker_fn mark_reg_as_referenced;
  static refmarker_fn replace_reg_with_saved_mem;
! static int insert_save (struct insn_chain *, int, HARD_REG_SET *,
  			machine_mode *);
! static int insert_restore (struct insn_chain *, int, int, int,
  			   machine_mode *);
! static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
  					   rtx);
  static void add_stored_regs (rtx, const_rtx, void *);
  
--- 89,99 ----
  static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg);
  static refmarker_fn mark_reg_as_referenced;
  static refmarker_fn replace_reg_with_saved_mem;
! static int insert_save (class insn_chain *, int, HARD_REG_SET *,
  			machine_mode *);
! static int insert_restore (class insn_chain *, int, int, int,
  			   machine_mode *);
! static class insn_chain *insert_one_insn (class insn_chain *, int, int,
  					   rtx);
  static void add_stored_regs (rtx, const_rtx, void *);
  
*************** init_caller_save (void)
*** 192,220 ****
  
    caller_save_initialized_p = true;
  
-   CLEAR_HARD_REG_SET (no_caller_save_reg_set);
    /* First find all the registers that we need to deal with and all
       the modes that they can have.  If we can't find a mode to use,
       we can't have the register live over calls.  */
  
    for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
!     {
!       if (call_used_regs[i]
!           && !TEST_HARD_REG_BIT (call_fixed_reg_set, i))
! 	{
! 	  for (j = 1; j <= MOVE_MAX_WORDS; j++)
! 	    {
! 	      regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
! 								   VOIDmode);
! 	      if (regno_save_mode[i][j] == VOIDmode && j == 1)
! 		{
! 		  SET_HARD_REG_BIT (call_fixed_reg_set, i);
! 		}
! 	    }
! 	}
!       else
! 	regno_save_mode[i][1] = VOIDmode;
!     }
  
    /* The following code tries to approximate the conditions under which
       we can easily save and restore a register without scratch registers or
--- 193,209 ----
  
    caller_save_initialized_p = true;
  
    /* First find all the registers that we need to deal with and all
       the modes that they can have.  If we can't find a mode to use,
       we can't have the register live over calls.  */
  
    for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
!     for (j = 1; j <= MOVE_MAX_WORDS; j++)
!       {
! 	regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j, VOIDmode);
! 	if (regno_save_mode[i][j] == VOIDmode && j == 1)
! 	  CLEAR_HARD_REG_BIT (savable_regs, i);
!       }
  
    /* The following code tries to approximate the conditions under which
       we can easily save and restore a register without scratch registers or
*************** init_caller_save (void)
*** 275,285 ****
  	{
  	  regno_save_mode[i][j] = VOIDmode;
  	  if (j == 1)
! 	    {
! 	      SET_HARD_REG_BIT (call_fixed_reg_set, i);
! 	      if (call_used_regs[i])
! 		SET_HARD_REG_BIT (no_caller_save_reg_set, i);
! 	    }
  	}
  }
  
--- 264,270 ----
  	{
  	  regno_save_mode[i][j] = VOIDmode;
  	  if (j == 1)
! 	    CLEAR_HARD_REG_BIT (savable_regs, i);
  	}
  }
  
*************** setup_save_areas (void)
*** 419,425 ****
    HARD_REG_SET hard_regs_used;
    struct saved_hard_reg *saved_reg;
    rtx_insn *insn;
!   struct insn_chain *chain, *next;
    unsigned int regno;
    HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;
    reg_set_iterator rsi;
--- 404,410 ----
    HARD_REG_SET hard_regs_used;
    struct saved_hard_reg *saved_reg;
    rtx_insn *insn;
!   class insn_chain *chain, *next;
    unsigned int regno;
    HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;
    reg_set_iterator rsi;
*************** setup_save_areas (void)
*** 442,448 ****
        freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));
        REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
  			       &chain->live_throughout);
!       get_call_reg_set_usage (insn, &used_regs, call_used_reg_set);
  
        /* Record all registers set in this call insn.  These don't
  	 need to be saved.  N.B. the call insn might set a subreg
--- 427,433 ----
        freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));
        REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
  			       &chain->live_throughout);
!       used_regs = insn_callee_abi (insn).full_reg_clobbers ();
  
        /* Record all registers set in this call insn.  These don't
  	 need to be saved.  N.B. the call insn might set a subreg
*************** setup_save_areas (void)
*** 450,463 ****
  	 live during the call, but the subreg that is set
  	 isn't.  */
        CLEAR_HARD_REG_SET (this_insn_sets);
!       note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
        /* Sibcalls are considered to set the return value.  */
        if (SIBLING_CALL_P (insn) && crtl->return_rtx)
  	mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
  
!       AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
!       AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
!       AND_HARD_REG_SET (hard_regs_to_save, used_regs);
        for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
  	if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
  	  {
--- 435,447 ----
  	 live during the call, but the subreg that is set
  	 isn't.  */
        CLEAR_HARD_REG_SET (this_insn_sets);
!       note_stores (insn, mark_set_regs, &this_insn_sets);
        /* Sibcalls are considered to set the return value.  */
        if (SIBLING_CALL_P (insn) && crtl->return_rtx)
  	mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
  
!       used_regs &= ~(fixed_reg_set | this_insn_sets);
!       hard_regs_to_save &= used_regs & savable_regs;
        for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
  	if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
  	  {
*************** setup_save_areas (void)
*** 526,532 ****
  
  	  REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
  				   &chain->live_throughout);
! 	  get_call_reg_set_usage (insn, &used_regs, call_used_reg_set);
  
  	  /* Record all registers set in this call insn.  These don't
  	     need to be saved.  N.B. the call insn might set a subreg
--- 510,516 ----
  
  	  REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
  				   &chain->live_throughout);
! 	  used_regs = insn_callee_abi (insn).full_reg_clobbers ();
  
  	  /* Record all registers set in this call insn.  These don't
  	     need to be saved.  N.B. the call insn might set a subreg
*************** setup_save_areas (void)
*** 534,548 ****
  	     live during the call, but the subreg that is set
  	     isn't.  */
  	  CLEAR_HARD_REG_SET (this_insn_sets);
! 	  note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
  	  /* Sibcalls are considered to set the return value,
  	     compare df-scan.c:df_get_call_refs.  */
  	  if (SIBLING_CALL_P (insn) && crtl->return_rtx)
  	    mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
  
! 	  AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
! 	  AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
! 	  AND_HARD_REG_SET (hard_regs_to_save, used_regs);
  	  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
  	    if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
  	      {
--- 518,531 ----
  	     live during the call, but the subreg that is set
  	     isn't.  */
  	  CLEAR_HARD_REG_SET (this_insn_sets);
! 	  note_stores (insn, mark_set_regs, &this_insn_sets);
  	  /* Sibcalls are considered to set the return value,
  	     compare df-scan.c:df_get_call_refs.  */
  	  if (SIBLING_CALL_P (insn) && crtl->return_rtx)
  	    mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
  
! 	  used_regs &= ~(fixed_reg_set | this_insn_sets);
! 	  hard_regs_to_save &= used_regs & savable_regs;
  	  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
  	    if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
  	      {
*************** setup_save_areas (void)
*** 744,750 ****
  void
  save_call_clobbered_regs (void)
  {
!   struct insn_chain *chain, *next, *last = NULL;
    machine_mode save_mode [FIRST_PSEUDO_REGISTER];
  
    /* Computed in mark_set_regs, holds all registers set by the current
--- 727,733 ----
  void
  save_call_clobbered_regs (void)
  {
!   class insn_chain *chain, *next, *last = NULL;
    machine_mode save_mode [FIRST_PSEUDO_REGISTER];
  
    /* Computed in mark_set_regs, holds all registers set by the current
*************** save_call_clobbered_regs (void)
*** 775,787 ****
  
  	      if (code == JUMP_INSN)
  		/* Restore all registers if this is a JUMP_INSN.  */
! 		COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
  	      else
  		{
  		  CLEAR_HARD_REG_SET (referenced_regs);
  		  mark_referenced_regs (&PATTERN (insn),
  					mark_reg_as_referenced, NULL);
! 		  AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
  		}
  
  	      for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
--- 758,770 ----
  
  	      if (code == JUMP_INSN)
  		/* Restore all registers if this is a JUMP_INSN.  */
! 		referenced_regs = hard_regs_saved;
  	      else
  		{
  		  CLEAR_HARD_REG_SET (referenced_regs);
  		  mark_referenced_regs (&PATTERN (insn),
  					mark_reg_as_referenced, NULL);
! 		  referenced_regs &= hard_regs_saved;
  		}
  
  	      for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
*************** save_call_clobbered_regs (void)
*** 795,802 ****
  		 be live across the call, while the other is set
  		 afterwards.  */
  	      CLEAR_HARD_REG_SET (this_insn_sets);
! 	      note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
! 	      AND_COMPL_HARD_REG_SET (hard_regs_saved, this_insn_sets);
  	    }
  
  	  if (code == CALL_INSN
--- 778,785 ----
  		 be live across the call, while the other is set
  		 afterwards.  */
  	      CLEAR_HARD_REG_SET (this_insn_sets);
! 	      note_stores (insn, mark_set_regs, &this_insn_sets);
! 	      hard_regs_saved &= ~this_insn_sets;
  	    }
  
  	  if (code == CALL_INSN
*************** save_call_clobbered_regs (void)
*** 805,811 ****
  	    {
  	      unsigned regno;
  	      HARD_REG_SET hard_regs_to_save;
- 	      HARD_REG_SET call_def_reg_set;
  	      reg_set_iterator rsi;
  	      rtx cheap;
  
--- 788,793 ----
*************** save_call_clobbered_regs (void)
*** 849,863 ****
  		 multi-hard-reg pseudo; then the pseudo is considered live
  		 during the call, but the subreg that is set isn't.  */
  	      CLEAR_HARD_REG_SET (this_insn_sets);
! 	      note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
  
  	      /* Compute which hard regs must be saved before this call.  */
! 	      AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
! 	      AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
! 	      AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
! 	      get_call_reg_set_usage (insn, &call_def_reg_set,
! 				      call_used_reg_set);
! 	      AND_HARD_REG_SET (hard_regs_to_save, call_def_reg_set);
  
  	      for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
  		if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
--- 831,845 ----
  		 multi-hard-reg pseudo; then the pseudo is considered live
  		 during the call, but the subreg that is set isn't.  */
  	      CLEAR_HARD_REG_SET (this_insn_sets);
! 	      note_stores (insn, mark_set_regs, &this_insn_sets);
  
  	      /* Compute which hard regs must be saved before this call.  */
! 	      function_abi callee_abi = insn_callee_abi (insn);
! 	      hard_regs_to_save &= ~(fixed_reg_set
! 				     | this_insn_sets
! 				     | hard_regs_saved);
! 	      hard_regs_to_save &= savable_regs;
! 	      hard_regs_to_save &= callee_abi.full_reg_clobbers ();
  
  	      for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
  		if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
*************** save_call_clobbered_regs (void)
*** 872,878 ****
  	      
  	      if (cheap
  		  && HARD_REGISTER_P (cheap)
! 		  && TEST_HARD_REG_BIT (call_used_reg_set, REGNO (cheap)))
  		{
  		  rtx dest, newpat;
  		  rtx pat = PATTERN (insn);
--- 854,861 ----
  	      
  	      if (cheap
  		  && HARD_REGISTER_P (cheap)
! 		  && callee_abi.clobbers_reg_p (GET_MODE (cheap),
! 						REGNO (cheap)))
  		{
  		  rtx dest, newpat;
  		  rtx pat = PATTERN (insn);
*************** replace_reg_with_saved_mem (rtx *loc,
*** 1174,1187 ****
     Return the extra number of registers saved.  */
  
  static int
! insert_restore (struct insn_chain *chain, int before_p, int regno,
  		int maxrestore, machine_mode *save_mode)
  {
    int i, k;
    rtx pat = NULL_RTX;
    int code;
    unsigned int numregs = 0;
!   struct insn_chain *new_chain;
    rtx mem;
  
    /* A common failure mode if register status is not correct in the
--- 1157,1170 ----
     Return the extra number of registers saved.  */
  
  static int
! insert_restore (class insn_chain *chain, int before_p, int regno,
  		int maxrestore, machine_mode *save_mode)
  {
    int i, k;
    rtx pat = NULL_RTX;
    int code;
    unsigned int numregs = 0;
!   class insn_chain *new_chain;
    rtx mem;
  
    /* A common failure mode if register status is not correct in the
*************** insert_restore (struct insn_chain *chain
*** 1253,1259 ****
  /* Like insert_restore above, but save registers instead.  */
  
  static int
! insert_save (struct insn_chain *chain, int regno,
  	     HARD_REG_SET *to_save, machine_mode *save_mode)
  {
    int i;
--- 1236,1242 ----
  /* Like insert_restore above, but save registers instead.  */
  
  static int
! insert_save (class insn_chain *chain, int regno,
  	     HARD_REG_SET *to_save, machine_mode *save_mode)
  {
    int i;
*************** insert_save (struct insn_chain *chain, i
*** 1261,1267 ****
    rtx pat = NULL_RTX;
    int code;
    unsigned int numregs = 0;
!   struct insn_chain *new_chain;
    rtx mem;
  
    /* A common failure mode if register status is not correct in the
--- 1244,1250 ----
    rtx pat = NULL_RTX;
    int code;
    unsigned int numregs = 0;
!   class insn_chain *new_chain;
    rtx mem;
  
    /* A common failure mode if register status is not correct in the
*************** add_used_regs (rtx *loc, void *data)
*** 1351,1361 ****
  }
  
  /* Emit a new caller-save insn and set the code.  */
! static struct insn_chain *
! insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
  {
    rtx_insn *insn = chain->insn;
!   struct insn_chain *new_chain;
  
    /* If INSN references CC0, put our insns in front of the insn that sets
       CC0.  This is always safe, since the only way we could be passed an
--- 1334,1344 ----
  }
  
  /* Emit a new caller-save insn and set the code.  */
! static class insn_chain *
! insert_one_insn (class insn_chain *chain, int before_p, int code, rtx pat)
  {
    rtx_insn *insn = chain->insn;
!   class insn_chain *new_chain;
  
    /* If INSN references CC0, put our insns in front of the insn that sets
       CC0.  This is always safe, since the only way we could be passed an
*************** insert_one_insn (struct insn_chain *chai
*** 1414,1421 ****
        /* Registers that are set in CHAIN->INSN live in the new insn.
  	 (Unless there is a REG_UNUSED note for them, but we don't
  	  look for them here.) */
!       note_stores (PATTERN (chain->insn), add_stored_regs,
! 		   &new_chain->live_throughout);
        CLEAR_REG_SET (&new_chain->dead_or_set);
        if (chain->insn == BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
  	BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
--- 1397,1403 ----
        /* Registers that are set in CHAIN->INSN live in the new insn.
  	 (Unless there is a REG_UNUSED note for them, but we don't
  	  look for them here.) */
!       note_stores (chain->insn, add_stored_regs, &new_chain->live_throughout);
        CLEAR_REG_SET (&new_chain->dead_or_set);
        if (chain->insn == BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
  	BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
diff -Nrcpad gcc-9.3.0/gcc/calls.c gcc-10.1.0/gcc/calls.c
*** gcc-9.3.0/gcc/calls.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/calls.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Convert function calls to rtl insns, for GNU C compiler.
!    Copyright (C) 1989-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Convert function calls to rtl insns, for GNU C compiler.
!    Copyright (C) 1989-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 52,57 ****
--- 52,59 ----
  #include "tree-ssa-strlen.h"
  #include "intl.h"
  #include "stringpool.h"
+ #include "hash-map.h"
+ #include "hash-traits.h"
  #include "attribs.h"
  #include "builtins.h"
  #include "gimple-fold.h"
*************** prepare_call_address (tree fndecl_or_typ
*** 346,352 ****
     It is zero if this call doesn't want a structure value.
  
     NEXT_ARG_REG is the rtx that results from executing
!      targetm.calls.function_arg (&args_so_far, VOIDmode, void_type_node, true)
     just after all the args have had their registers assigned.
     This could be whatever you like, but normally it is the first
     arg-register beyond those used for args in this call,
--- 348,355 ----
     It is zero if this call doesn't want a structure value.
  
     NEXT_ARG_REG is the rtx that results from executing
!      targetm.calls.function_arg (&args_so_far,
! 				 function_arg_info::end_marker ());
     just after all the args have had their registers assigned.
     This could be whatever you like, but normally it is the first
     arg-register beyond those used for args in this call,
*************** special_function_p (const_tree fndecl, i
*** 583,600 ****
  {
    tree name_decl = DECL_NAME (fndecl);
  
!   if (fndecl && name_decl
!       && IDENTIFIER_LENGTH (name_decl) <= 11
!       /* Exclude functions not at the file scope, or not `extern',
! 	 since they are not the magic functions we would otherwise
! 	 think they are.
! 	 FIXME: this should be handled with attributes, not with this
! 	 hacky imitation of DECL_ASSEMBLER_NAME.  It's (also) wrong
! 	 because you can declare fork() inside a function if you
! 	 wish.  */
!       && (DECL_CONTEXT (fndecl) == NULL_TREE
! 	  || TREE_CODE (DECL_CONTEXT (fndecl)) == TRANSLATION_UNIT_DECL)
!       && TREE_PUBLIC (fndecl))
      {
        const char *name = IDENTIFIER_POINTER (name_decl);
        const char *tname = name;
--- 586,593 ----
  {
    tree name_decl = DECL_NAME (fndecl);
  
!   if (maybe_special_function_p (fndecl)
!       && IDENTIFIER_LENGTH (name_decl) <= 11)
      {
        const char *name = IDENTIFIER_POINTER (name_decl);
        const char *tname = name;
*************** call_expr_flags (const_tree t)
*** 897,909 ****
    return flags;
  }
  
! /* Return true if TYPE should be passed by invisible reference.  */
  
  bool
! pass_by_reference (CUMULATIVE_ARGS *ca, machine_mode mode,
! 		   tree type, bool named_arg)
  {
!   if (type)
      {
        /* If this type contains non-trivial constructors, then it is
  	 forbidden for the middle-end to create any new copies.  */
--- 890,901 ----
    return flags;
  }
  
! /* Return true if ARG should be passed by invisible reference.  */
  
  bool
! pass_by_reference (CUMULATIVE_ARGS *ca, function_arg_info arg)
  {
!   if (tree type = arg.type)
      {
        /* If this type contains non-trivial constructors, then it is
  	 forbidden for the middle-end to create any new copies.  */
*************** pass_by_reference (CUMULATIVE_ARGS *ca,
*** 911,943 ****
  	return true;
  
        /* GCC post 3.4 passes *all* variable sized types by reference.  */
!       if (!TYPE_SIZE (type) || TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
  	return true;
  
        /* If a record type should be passed the same as its first (and only)
  	 member, use the type and mode of that member.  */
        if (TREE_CODE (type) == RECORD_TYPE && TYPE_TRANSPARENT_AGGR (type))
  	{
! 	  type = TREE_TYPE (first_field (type));
! 	  mode = TYPE_MODE (type);
  	}
      }
  
!   return targetm.calls.pass_by_reference (pack_cumulative_args (ca), mode,
! 					  type, named_arg);
  }
  
! /* Return true if TYPE, which is passed by reference, should be callee
     copied instead of caller copied.  */
  
  bool
! reference_callee_copied (CUMULATIVE_ARGS *ca, machine_mode mode,
! 			 tree type, bool named_arg)
  {
!   if (type && TREE_ADDRESSABLE (type))
      return false;
!   return targetm.calls.callee_copies (pack_cumulative_args (ca), mode, type,
! 				      named_arg);
  }
  
  
--- 903,958 ----
  	return true;
  
        /* GCC post 3.4 passes *all* variable sized types by reference.  */
!       if (!TYPE_SIZE (type) || !poly_int_tree_p (TYPE_SIZE (type)))
  	return true;
  
        /* If a record type should be passed the same as its first (and only)
  	 member, use the type and mode of that member.  */
        if (TREE_CODE (type) == RECORD_TYPE && TYPE_TRANSPARENT_AGGR (type))
  	{
! 	  arg.type = TREE_TYPE (first_field (type));
! 	  arg.mode = TYPE_MODE (arg.type);
  	}
      }
  
!   return targetm.calls.pass_by_reference (pack_cumulative_args (ca), arg);
  }
  
! /* Return true if TYPE should be passed by reference when passed to
!    the "..." arguments of a function.  */
! 
! bool
! pass_va_arg_by_reference (tree type)
! {
!   return pass_by_reference (NULL, function_arg_info (type, /*named=*/false));
! }
! 
! /* Decide whether ARG, which occurs in the state described by CA,
!    should be passed by reference.  Return true if so and update
!    ARG accordingly.  */
! 
! bool
! apply_pass_by_reference_rules (CUMULATIVE_ARGS *ca, function_arg_info &arg)
! {
!   if (pass_by_reference (ca, arg))
!     {
!       arg.type = build_pointer_type (arg.type);
!       arg.mode = TYPE_MODE (arg.type);
!       arg.pass_by_reference = true;
!       return true;
!     }
!   return false;
! }
! 
! /* Return true if ARG, which is passed by reference, should be callee
     copied instead of caller copied.  */
  
  bool
! reference_callee_copied (CUMULATIVE_ARGS *ca, const function_arg_info &arg)
  {
!   if (arg.type && TREE_ADDRESSABLE (arg.type))
      return false;
!   return targetm.calls.callee_copies (pack_cumulative_args (ca), arg);
  }
  
  
*************** alloc_max_size (void)
*** 1235,1240 ****
--- 1250,1258 ----
  bool
  get_size_range (tree exp, tree range[2], bool allow_zero /* = false */)
  {
+   if (!exp)
+     return false;
+ 
    if (tree_fits_uhwi_p (exp))
      {
        /* EXP is a constant.  */
*************** maybe_warn_alloc_args_overflow (tree fn,
*** 1350,1356 ****
    location_t loc = EXPR_LOCATION (exp);
  
    tree fntype = fn ? TREE_TYPE (fn) : TREE_TYPE (TREE_TYPE (exp));
-   built_in_function fncode = fn ? DECL_FUNCTION_CODE (fn) : BUILT_IN_NONE;
    bool warned = false;
  
    /* Validate each argument individually.  */
--- 1368,1373 ----
*************** maybe_warn_alloc_args_overflow (tree fn,
*** 1376,1386 ****
  		 friends.
  		 Also avoid issuing the warning for calls to function named
  		 "alloca".  */
! 	      if ((fncode == BUILT_IN_ALLOCA
! 		   && IDENTIFIER_LENGTH (DECL_NAME (fn)) != 6)
! 		  || (fncode != BUILT_IN_ALLOCA
! 		      && !lookup_attribute ("returns_nonnull",
! 					    TYPE_ATTRIBUTES (fntype))))
  		warned = warning_at (loc, OPT_Walloc_zero,
  				     "%Kargument %i value is zero",
  				     exp, idx[i] + 1);
--- 1393,1402 ----
  		 friends.
  		 Also avoid issuing the warning for calls to function named
  		 "alloca".  */
! 	      if (fn && fndecl_built_in_p (fn, BUILT_IN_ALLOCA)
! 		  ? IDENTIFIER_LENGTH (DECL_NAME (fn)) != 6
! 		  : !lookup_attribute ("returns_nonnull",
! 				       TYPE_ATTRIBUTES (fntype)))
  		warned = warning_at (loc, OPT_Walloc_zero,
  				     "%Kargument %i value is zero",
  				     exp, idx[i] + 1);
*************** maybe_warn_alloc_args_overflow (tree fn,
*** 1395,1401 ****
  		  && fn
  		  && !args[1]
  		  && lang_GNU_CXX ()
! 		  && DECL_IS_OPERATOR_NEW (fn)
  		  && integer_all_onesp (args[i]))
  		continue;
  
--- 1411,1417 ----
  		  && fn
  		  && !args[1]
  		  && lang_GNU_CXX ()
! 		  && DECL_IS_OPERATOR_NEW_P (fn)
  		  && integer_all_onesp (args[i]))
  		continue;
  
*************** maybe_warn_nonstring_arg (tree fndecl, t
*** 1593,1598 ****
--- 1609,1618 ----
  	    if (!get_attr_nonstring_decl (arg))
  	      {
  		c_strlen_data lendata = { };
+ 		/* Set MAXBOUND to an arbitrary non-null non-integer
+ 		   node as a request to have it set to the length of
+ 		   the longest string in a PHI.  */
+ 		lendata.maxbound = arg;
  		get_range_strlen (arg, &lendata, /* eltsize = */ 1);
  		maxlen = lendata.maxbound;
  	      }
*************** maybe_warn_nonstring_arg (tree fndecl, t
*** 1618,1623 ****
--- 1638,1647 ----
  	if (!get_attr_nonstring_decl (arg))
  	  {
  	    c_strlen_data lendata = { };
+ 	    /* Set MAXBOUND to an arbitrary non-null non-integer
+ 	       node as a request to have it set to the length of
+ 	       the longest string in a PHI.  */
+ 	    lendata.maxbound = arg;
  	    get_range_strlen (arg, &lendata, /* eltsize = */ 1);
  	    maxlen = lendata.maxbound;
  	  }
*************** maybe_complain_about_tail_call (tree cal
*** 1841,1846 ****
--- 1865,2174 ----
    error_at (EXPR_LOCATION (call_expr), "cannot tail-call: %s", reason);
  }
  
+ /* Used to define rdwr_map below.  */
+ struct rdwr_access_hash: int_hash<int, -1> { };
+ 
+ /* A mapping between argument number corresponding to attribute access
+    mode (read_only, write_only, or read_write) and operands.  */
+ typedef hash_map<rdwr_access_hash, attr_access> rdwr_map;
+ 
+ /* Initialize a mapping for a call to function FNDECL declared with
+    attribute access.  Each attribute positional operand inserts one
+    entry into the mapping with the operand number as the key.  */
+ 
+ static void
+ init_attr_rdwr_indices (rdwr_map *rwm, tree fntype)
+ {
+   if (!fntype)
+     return;
+ 
+   for (tree access = TYPE_ATTRIBUTES (fntype);
+        (access = lookup_attribute ("access", access));
+        access = TREE_CHAIN (access))
+     {
+       /* The TREE_VALUE of an attribute is a TREE_LIST whose TREE_VALUE
+ 	 is the attribute argument's value.  */
+       tree mode = TREE_VALUE (access);
+       gcc_assert (TREE_CODE (mode) == TREE_LIST);
+       mode = TREE_VALUE (mode);
+       gcc_assert (TREE_CODE (mode) == STRING_CST);
+ 
+       const char *modestr = TREE_STRING_POINTER (mode);
+       for (const char *m = modestr; *m; )
+ 	{
+ 	  attr_access acc = { };
+ 
+ 	  switch (*m)
+ 	    {
+ 	    case 'r': acc.mode = acc.read_only; break;
+ 	    case 'w': acc.mode = acc.write_only; break;
+ 	    default: acc.mode = acc.read_write; break;
+ 	    }
+ 
+ 	  char *end;
+ 	  acc.ptrarg = strtoul (++m, &end, 10);
+ 	  m = end;
+ 	  if (*m == ',')
+ 	    {
+ 	      acc.sizarg = strtoul (++m, &end, 10);
+ 	      m = end;
+ 	    }
+ 	  else
+ 	    acc.sizarg = UINT_MAX;
+ 
+ 	  acc.ptr = NULL_TREE;
+ 	  acc.size = NULL_TREE;
+ 
+ 	  /* Unconditionally add an entry for the required pointer
+ 	     operand of the attribute, and one for the optional size
+ 	     operand when it's specified.  */
+ 	  rwm->put (acc.ptrarg, acc);
+ 	  if (acc.sizarg != UINT_MAX)
+ 	    rwm->put (acc.sizarg, acc);
+ 	}
+     }
+ }
+ 
+ /* Returns the type of the argument ARGNO to function with type FNTYPE
+    or null when the typoe cannot be determined or no such argument exists.  */
+ 
+ static tree
+ fntype_argno_type (tree fntype, unsigned argno)
+ {
+   if (!prototype_p (fntype))
+     return NULL_TREE;
+ 
+   tree argtype;
+   function_args_iterator it;
+   FOREACH_FUNCTION_ARGS (fntype, argtype, it)
+     if (argno-- == 0)
+       return argtype;
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Helper to append the "rdwr" attribute specification described
+    by ACCESS to the array ATTRSTR with size STRSIZE.  Used in
+    diagnostics.  */
+ 
+ static inline void
+ append_attrname (const std::pair<int, attr_access> &access,
+ 		 char *attrstr, size_t strsize)
+ {
+   /* Append the relevant attribute to the string.  This (deliberately)
+      appends the attribute pointer operand even when none was specified.  */
+   size_t len = strlen (attrstr);
+ 
+   const char *atname
+     = (access.second.mode == attr_access::read_only
+        ? "read_only"
+        : (access.second.mode == attr_access::write_only
+ 	  ? "write_only" : "read_write"));
+ 
+   const char *sep = len ? ", " : "";
+ 
+   if (access.second.sizarg == UINT_MAX)
+     snprintf (attrstr + len, strsize - len,
+ 	      "%s%s (%i)", sep, atname,
+ 	      access.second.ptrarg + 1);
+   else
+     snprintf (attrstr + len, strsize - len,
+ 	      "%s%s (%i, %i)", sep, atname,
+ 	      access.second.ptrarg + 1, access.second.sizarg + 1);
+ }
+ 
+ /* Iterate over attribute access read-only, read-write, and write-only
+    arguments and diagnose past-the-end accesses and related problems
+    in the function call EXP.  */
+ 
+ static void
+ maybe_warn_rdwr_sizes (rdwr_map *rwm, tree exp)
+ {
+   tree fndecl = NULL_TREE;
+   tree fntype = NULL_TREE;
+   if (tree fnaddr = CALL_EXPR_FN (exp))
+     {
+       if (TREE_CODE (fnaddr) == ADDR_EXPR)
+ 	{
+ 	  fndecl = TREE_OPERAND (fnaddr, 0);
+ 	  fntype = TREE_TYPE (fndecl);
+ 	}
+       else
+ 	fntype = TREE_TYPE (TREE_TYPE (fnaddr));
+     }
+ 
+   if (!fntype)
+     return;
+ 
+   /* A string describing the attributes that the warnings issued by this
+      function apply to.  Used to print one informational note per function
+      call, rather than one per warning.  That reduces clutter.  */
+   char attrstr[80];
+   attrstr[0] = 0;
+ 
+   for (rdwr_map::iterator it = rwm->begin (); it != rwm->end (); ++it)
+     {
+       std::pair<int, attr_access> access = *it;
+ 
+       /* Get the function call arguments corresponding to the attribute's
+ 	 positional arguments.  When both arguments have been specified
+ 	 there will be two entries in *RWM, one for each.  They are
+ 	 cross-referenced by their respective argument numbers in
+ 	 ACCESS.PTRARG and ACCESS.SIZARG.  */
+       const int ptridx = access.second.ptrarg;
+       const int sizidx = access.second.sizarg;
+ 
+       gcc_assert (ptridx != -1);
+       gcc_assert (access.first == ptridx || access.first == sizidx);
+ 
+       /* The pointer is set to null for the entry corresponding to
+ 	 the size argument.  Skip it.  It's handled when the entry
+ 	 corresponding to the pointer argument comes up.  */
+       if (!access.second.ptr)
+ 	continue;
+ 
+       tree argtype = fntype_argno_type (fntype, ptridx);
+       argtype = TREE_TYPE (argtype);
+ 
+       tree size;
+       if (sizidx == -1)
+ 	{
+ 	  /* If only the pointer attribute operand was specified
+ 	     and not size, set SIZE to the size of one element of
+ 	     the pointed to type to detect smaller objects (null
+ 	     pointers are diagnosed in this case only if
+ 	     the pointer is also declared with attribute nonnull.  */
+ 	  size = size_one_node;
+ 	}
+       else
+ 	size = rwm->get (sizidx)->size;
+ 
+       tree ptr = access.second.ptr;
+       tree sizrng[2] = { size_zero_node, build_all_ones_cst (sizetype) };
+       if (get_size_range (size, sizrng, true)
+ 	  && tree_int_cst_sgn (sizrng[0]) < 0
+ 	  && tree_int_cst_sgn (sizrng[1]) < 0)
+ 	{
+ 	  /* Warn about negative sizes.  */
+ 	  bool warned = false;
+ 	  location_t loc = EXPR_LOCATION (exp);
+ 	  if (tree_int_cst_equal (sizrng[0], sizrng[1]))
+ 	    warned = warning_at (loc, OPT_Wstringop_overflow_,
+ 				 "%Kargument %i value %E is negative",
+ 				 exp, sizidx + 1, size);
+ 	  else
+ 	    warned = warning_at (loc, OPT_Wstringop_overflow_,
+ 				 "%Kargument %i range [%E, %E] is negative",
+ 				 exp, sizidx + 1, sizrng[0], sizrng[1]);
+ 	  if (warned)
+ 	    {
+ 	      append_attrname (access, attrstr, sizeof attrstr);
+ 	      /* Avoid warning again for the same attribute.  */
+ 	      continue;
+ 	    }
+ 	}
+ 
+       if (tree_int_cst_sgn (sizrng[0]) >= 0)
+ 	{
+ 	  if (COMPLETE_TYPE_P (argtype))
+ 	    {
+ 	      /* Multiple SIZE by the size of the type the pointer
+ 		 argument points to.  If it's incomplete the size
+ 		 is used as is.  */
+ 	      size = NULL_TREE;
+ 	      if (tree argsize = TYPE_SIZE_UNIT (argtype))
+ 		if (TREE_CODE (argsize) == INTEGER_CST)
+ 		  {
+ 		    const int prec = TYPE_PRECISION (sizetype);
+ 		    wide_int minsize = wi::to_wide (sizrng[0], prec);
+ 		    minsize *= wi::to_wide (argsize, prec);
+ 		    size = wide_int_to_tree (sizetype, minsize);
+ 		  }
+ 	    }
+ 	}
+       else
+ 	size = NULL_TREE;
+ 
+       if (sizidx >= 0
+ 	  && integer_zerop (ptr)
+ 	  && tree_int_cst_sgn (sizrng[0]) > 0)
+ 	{
+ 	  /* Warn about null pointers with positive sizes.  This is
+ 	     different from also declaring the pointer argument with
+ 	     attribute nonnull when the function accepts null pointers
+ 	     only when the corresponding size is zero.  */
+ 	  bool warned = false;
+ 	  location_t loc = EXPR_LOCATION (exp);
+ 	  if (tree_int_cst_equal (sizrng[0], sizrng[1]))
+ 	    warned = warning_at (loc, OPT_Wnonnull,
+ 				 "%Kargument %i is null but the corresponding "
+ 				 "size argument %i value is %E",
+ 				 exp, ptridx + 1, sizidx + 1, size);
+ 	  else
+ 	    warned = warning_at (loc, OPT_Wnonnull,
+ 				 "%Kargument %i is null but the corresponding "
+ 				 "size argument %i range is [%E, %E]",
+ 				 exp, ptridx + 1, sizidx + 1,
+ 				 sizrng[0], sizrng[1]);
+ 	  if (warned)
+ 	    {
+ 	      append_attrname (access, attrstr, sizeof attrstr);
+ 	      /* Avoid warning again for the same attribute.  */
+ 	      continue;
+ 	    }
+ 	}
+ 
+       tree objsize = compute_objsize (ptr, 0);
+ 
+       tree srcsize;
+       if (access.second.mode == attr_access::write_only)
+ 	{
+ 	  /* For a write-only argument there is no source.  */
+ 	  srcsize = NULL_TREE;
+ 	}
+       else
+ 	{
+ 	  /* For read-only and read-write attributes also set the source
+ 	     size.  */
+ 	  srcsize = objsize;
+ 	  if (access.second.mode == attr_access::read_only)
+ 	    {
+ 	      /* For a read-only attribute there is no destination so
+ 		 clear OBJSIZE.  This emits "reading N bytes" kind of
+ 		 diagnostics instead of the "writing N bytes" kind.  */
+ 	      objsize = NULL_TREE;
+ 	    }
+ 	}
+ 
+       /* Clear the no-warning bit in case it was set in a prior
+ 	 iteration so that accesses via different arguments are
+ 	 diagnosed.  */
+       TREE_NO_WARNING (exp) = false;
+       check_access (exp, NULL_TREE, NULL_TREE, size, /*maxread=*/ NULL_TREE,
+ 		    srcsize, objsize);
+ 
+       if (TREE_NO_WARNING (exp))
+ 	/* If check_access issued a warning above, append the relevant
+ 	   attribute to the string.  */
+ 	append_attrname (access, attrstr, sizeof attrstr);
+     }
+ 
+   if (!*attrstr)
+     return;
+ 
+   if (fndecl)
+     inform (DECL_SOURCE_LOCATION (fndecl),
+ 	    "in a call to function %qD declared with attribute %qs",
+ 	    fndecl, attrstr);
+   else
+     inform (EXPR_LOCATION (fndecl),
+ 	    "in a call with type %qT and attribute %qs",
+ 	    fntype, attrstr);
+ 
+   /* Set the bit in case if was cleared and not set above.  */
+   TREE_NO_WARNING (exp) = true;
+ }
+ 
  /* Fill in ARGS_SIZE and ARGS array based on the parameters found in
     CALL_EXPR EXP.
  
*************** initialize_argument_information (int num
*** 1957,1968 ****
    /* Array for up to the two attribute alloc_size arguments.  */
    tree alloc_args[] = { NULL_TREE, NULL_TREE };
  
    /* I counts args in order (to be) pushed; ARGPOS counts in order written.  */
    for (argpos = 0; argpos < num_actuals; i--, argpos++)
      {
        tree type = TREE_TYPE (args[i].tree_value);
        int unsignedp;
-       machine_mode mode;
  
        /* Replace erroneous argument with constant zero.  */
        if (type == error_mark_node || !COMPLETE_TYPE_P (type))
--- 2285,2300 ----
    /* Array for up to the two attribute alloc_size arguments.  */
    tree alloc_args[] = { NULL_TREE, NULL_TREE };
  
+   /* Map of attribute read_only, write_only, or read_write specifications
+      for function arguments.  */
+   rdwr_map rdwr_idx;
+   init_attr_rdwr_indices (&rdwr_idx, fntype);
+ 
    /* I counts args in order (to be) pushed; ARGPOS counts in order written.  */
    for (argpos = 0; argpos < num_actuals; i--, argpos++)
      {
        tree type = TREE_TYPE (args[i].tree_value);
        int unsignedp;
  
        /* Replace erroneous argument with constant zero.  */
        if (type == error_mark_node || !COMPLETE_TYPE_P (type))
*************** initialize_argument_information (int num
*** 1989,2003 ****
  	 with those made by function.c.  */
  
        /* See if this argument should be passed by invisible reference.  */
!       if (pass_by_reference (args_so_far_pnt, TYPE_MODE (type),
! 			     type, argpos < n_named_args))
  	{
  	  bool callee_copies;
  	  tree base = NULL_TREE;
  
! 	  callee_copies
! 	    = reference_callee_copied (args_so_far_pnt, TYPE_MODE (type),
! 				       type, argpos < n_named_args);
  
  	  /* If we're compiling a thunk, pass through invisible references
  	     instead of making a copy.  */
--- 2321,2333 ----
  	 with those made by function.c.  */
  
        /* See if this argument should be passed by invisible reference.  */
!       function_arg_info arg (type, argpos < n_named_args);
!       if (pass_by_reference (args_so_far_pnt, arg))
  	{
  	  bool callee_copies;
  	  tree base = NULL_TREE;
  
! 	  callee_copies = reference_callee_copied (args_so_far_pnt, arg);
  
  	  /* If we're compiling a thunk, pass through invisible references
  	     instead of making a copy.  */
*************** initialize_argument_information (int num
*** 2107,2125 ****
  					      "argument must be passed"
  					      " by copying");
  	    }
  	}
  
        unsignedp = TYPE_UNSIGNED (type);
!       mode = promote_function_mode (type, TYPE_MODE (type), &unsignedp,
! 				    fndecl ? TREE_TYPE (fndecl) : fntype, 0);
  
        args[i].unsignedp = unsignedp;
!       args[i].mode = mode;
  
        targetm.calls.warn_parameter_passing_abi (args_so_far, type);
  
!       args[i].reg = targetm.calls.function_arg (args_so_far, mode, type,
! 						argpos < n_named_args);
  
        if (args[i].reg && CONST_INT_P (args[i].reg))
  	args[i].reg = NULL;
--- 2437,2457 ----
  					      "argument must be passed"
  					      " by copying");
  	    }
+ 	  arg.pass_by_reference = true;
  	}
  
        unsignedp = TYPE_UNSIGNED (type);
!       arg.type = type;
!       arg.mode
! 	= promote_function_mode (type, TYPE_MODE (type), &unsignedp,
! 				 fndecl ? TREE_TYPE (fndecl) : fntype, 0);
  
        args[i].unsignedp = unsignedp;
!       args[i].mode = arg.mode;
  
        targetm.calls.warn_parameter_passing_abi (args_so_far, type);
  
!       args[i].reg = targetm.calls.function_arg (args_so_far, arg);
  
        if (args[i].reg && CONST_INT_P (args[i].reg))
  	args[i].reg = NULL;
*************** initialize_argument_information (int num
*** 2129,2145 ****
  	 arguments have to go into the incoming registers.  */
        if (targetm.calls.function_incoming_arg != targetm.calls.function_arg)
  	args[i].tail_call_reg
! 	  = targetm.calls.function_incoming_arg (args_so_far, mode, type,
! 						 argpos < n_named_args);
        else
  	args[i].tail_call_reg = args[i].reg;
  
        if (args[i].reg)
! 	args[i].partial
! 	  = targetm.calls.arg_partial_bytes (args_so_far, mode, type,
! 					     argpos < n_named_args);
  
!       args[i].pass_on_stack = targetm.calls.must_pass_in_stack (mode, type);
  
        /* If FUNCTION_ARG returned a (parallel [(expr_list (nil) ...) ...]),
  	 it means that we are to pass this arg in the register(s) designated
--- 2461,2474 ----
  	 arguments have to go into the incoming registers.  */
        if (targetm.calls.function_incoming_arg != targetm.calls.function_arg)
  	args[i].tail_call_reg
! 	  = targetm.calls.function_incoming_arg (args_so_far, arg);
        else
  	args[i].tail_call_reg = args[i].reg;
  
        if (args[i].reg)
! 	args[i].partial = targetm.calls.arg_partial_bytes (args_so_far, arg);
  
!       args[i].pass_on_stack = targetm.calls.must_pass_in_stack (arg);
  
        /* If FUNCTION_ARG returned a (parallel [(expr_list (nil) ...) ...]),
  	 it means that we are to pass this arg in the register(s) designated
*************** initialize_argument_information (int num
*** 2161,2167 ****
        if (args[i].reg == 0 || args[i].partial != 0
  	       || reg_parm_stack_space > 0
  	       || args[i].pass_on_stack)
! 	locate_and_pad_parm (mode, type,
  #ifdef STACK_PARMS_IN_REG_PARM_AREA
  			     1,
  #else
--- 2490,2496 ----
        if (args[i].reg == 0 || args[i].partial != 0
  	       || reg_parm_stack_space > 0
  	       || args[i].pass_on_stack)
! 	locate_and_pad_parm (arg.mode, type,
  #ifdef STACK_PARMS_IN_REG_PARM_AREA
  			     1,
  #else
*************** initialize_argument_information (int num
*** 2175,2181 ****
  	/* The argument is passed entirely in registers.  See at which
  	   end it should be padded.  */
  	args[i].locate.where_pad =
! 	  BLOCK_REG_PADDING (mode, type,
  			     int_size_in_bytes (type) <= UNITS_PER_WORD);
  #endif
  
--- 2504,2510 ----
  	/* The argument is passed entirely in registers.  See at which
  	   end it should be padded.  */
  	args[i].locate.where_pad =
! 	  BLOCK_REG_PADDING (arg.mode, type,
  			     int_size_in_bytes (type) <= UNITS_PER_WORD);
  #endif
  
*************** initialize_argument_information (int num
*** 2188,2195 ****
        /* Increment ARGS_SO_FAR, which has info about which arg-registers
  	 have been used, etc.  */
  
!       targetm.calls.function_arg_advance (args_so_far, TYPE_MODE (type),
! 					  type, argpos < n_named_args);
  
        /* Store argument values for functions decorated with attribute
  	 alloc_size.  */
--- 2517,2528 ----
        /* Increment ARGS_SO_FAR, which has info about which arg-registers
  	 have been used, etc.  */
  
!       /* ??? Traditionally we've passed TYPE_MODE here, instead of the
! 	 promoted_mode used for function_arg above.  However, the
! 	 corresponding handling of incoming arguments in function.c
! 	 does pass the promoted mode.  */
!       arg.mode = TYPE_MODE (type);
!       targetm.calls.function_arg_advance (args_so_far, arg);
  
        /* Store argument values for functions decorated with attribute
  	 alloc_size.  */
*************** initialize_argument_information (int num
*** 2197,2202 ****
--- 2530,2551 ----
  	alloc_args[0] = args[i].tree_value;
        else if (argpos == alloc_idx[1])
  	alloc_args[1] = args[i].tree_value;
+ 
+       /* Save the actual argument that corresponds to the access attribute
+ 	 operand for later processing.  */
+       if (attr_access *access = rdwr_idx.get (argpos))
+ 	{
+ 	  if (POINTER_TYPE_P (type))
+ 	    {
+ 	      access->ptr = args[i].tree_value;
+ 	      gcc_assert (access->size == NULL_TREE);
+ 	    }
+ 	  else
+ 	    {
+ 	      access->size = args[i].tree_value;
+ 	      gcc_assert (access->ptr == NULL_TREE);
+ 	    }
+ 	}
      }
  
    if (alloc_args[0])
*************** initialize_argument_information (int num
*** 2209,2214 ****
--- 2558,2566 ----
    /* Detect passing non-string arguments to functions expecting
       nul-terminated strings.  */
    maybe_warn_nonstring_arg (fndecl, exp);
+ 
+   /* Check read_only, write_only, and read_write arguments.  */
+   maybe_warn_rdwr_sizes (&rdwr_idx, exp);
  }
  
  /* Update ARGS_SIZE to contain the total size for the argument block.
*************** can_implement_as_sibling_call_p (tree ex
*** 3227,3232 ****
--- 3579,3597 ----
    return true;
  }
  
+ /* Update stack alignment when the parameter is passed in the stack
+    since the outgoing parameter requires extra alignment on the calling
+    function side. */
+ 
+ static void
+ update_stack_alignment_for_call (struct locate_and_pad_arg_data *locate)
+ {
+   if (crtl->stack_alignment_needed < locate->boundary)
+     crtl->stack_alignment_needed = locate->boundary;
+   if (crtl->preferred_stack_boundary < locate->boundary)
+     crtl->preferred_stack_boundary = locate->boundary;
+ }
+ 
  /* Generate all the code for a CALL_EXPR exp
     and return an rtx for its value.
     Store the value in TARGET (specified as an rtx) if convenient.
*************** expand_call (tree exp, rtx target, int i
*** 3704,3709 ****
--- 4069,4080 ----
    /* Ensure current function's preferred stack boundary is at least
       what we need.  Stack alignment may also increase preferred stack
       boundary.  */
+   for (i = 0; i < num_actuals; i++)
+     if (reg_parm_stack_space > 0
+ 	|| args[i].reg == 0
+ 	|| args[i].partial != 0
+ 	|| args[i].pass_on_stack)
+       update_stack_alignment_for_call (&args[i].locate);
    if (crtl->preferred_stack_boundary < preferred_stack_boundary)
      crtl->preferred_stack_boundary = preferred_stack_boundary;
    else
*************** expand_call (tree exp, rtx target, int i
*** 3711,3716 ****
--- 4082,4090 ----
  
    preferred_unit_stack_boundary = preferred_stack_boundary / BITS_PER_UNIT;
  
+   if (flag_callgraph_info)
+     record_final_call (fndecl, EXPR_LOCATION (exp));
+ 
    /* We want to make two insn chains; one for a sibling call, the other
       for a normal call.  We will select one of the two chains after
       initial RTL generation is complete.  */
*************** expand_call (tree exp, rtx target, int i
*** 4222,4235 ****
        /* Set up next argument register.  For sibling calls on machines
  	 with register windows this should be the incoming register.  */
        if (pass == 0)
! 	next_arg_reg = targetm.calls.function_incoming_arg (args_so_far,
! 							    VOIDmode,
! 							    void_type_node,
! 							    true);
        else
! 	next_arg_reg = targetm.calls.function_arg (args_so_far,
! 						   VOIDmode, void_type_node,
! 						   true);
  
        if (pass == 1 && (return_flags & ERF_RETURNS_ARG))
  	{
--- 4596,4606 ----
        /* Set up next argument register.  For sibling calls on machines
  	 with register windows this should be the incoming register.  */
        if (pass == 0)
! 	next_arg_reg = targetm.calls.function_incoming_arg
! 	  (args_so_far, function_arg_info::end_marker ());
        else
! 	next_arg_reg = targetm.calls.function_arg
! 	  (args_so_far, function_arg_info::end_marker ());
  
        if (pass == 1 && (return_flags & ERF_RETURNS_ARG))
  	{
*************** emit_library_call_value_1 (int retval, r
*** 4846,4855 ****
        argvec[count].mode = Pmode;
        argvec[count].partial = 0;
  
!       argvec[count].reg = targetm.calls.function_arg (args_so_far,
! 						      Pmode, NULL_TREE, true);
!       gcc_assert (targetm.calls.arg_partial_bytes (args_so_far, Pmode,
! 						   NULL_TREE, 1) == 0);
  
        locate_and_pad_parm (Pmode, NULL_TREE,
  #ifdef STACK_PARMS_IN_REG_PARM_AREA
--- 5217,5225 ----
        argvec[count].mode = Pmode;
        argvec[count].partial = 0;
  
!       function_arg_info ptr_arg (Pmode, /*named=*/true);
!       argvec[count].reg = targetm.calls.function_arg (args_so_far, ptr_arg);
!       gcc_assert (targetm.calls.arg_partial_bytes (args_so_far, ptr_arg) == 0);
  
        locate_and_pad_parm (Pmode, NULL_TREE,
  #ifdef STACK_PARMS_IN_REG_PARM_AREA
*************** emit_library_call_value_1 (int retval, r
*** 4864,4870 ****
  	  || reg_parm_stack_space > 0)
  	args_size.constant += argvec[count].locate.size.constant;
  
!       targetm.calls.function_arg_advance (args_so_far, Pmode, (tree) 0, true);
  
        count++;
      }
--- 5234,5240 ----
  	  || reg_parm_stack_space > 0)
  	args_size.constant += argvec[count].locate.size.constant;
  
!       targetm.calls.function_arg_advance (args_so_far, ptr_arg);
  
        count++;
      }
*************** emit_library_call_value_1 (int retval, r
*** 4872,4895 ****
    for (unsigned int i = 0; count < nargs; i++, count++)
      {
        rtx val = args[i].first;
!       machine_mode mode = args[i].second;
        int unsigned_p = 0;
  
        /* We cannot convert the arg value to the mode the library wants here;
  	 must do it earlier where we know the signedness of the arg.  */
!       gcc_assert (mode != BLKmode
! 		  && (GET_MODE (val) == mode || GET_MODE (val) == VOIDmode));
  
        /* Make sure it is a reasonable operand for a move or push insn.  */
        if (!REG_P (val) && !MEM_P (val)
! 	  && !(CONSTANT_P (val) && targetm.legitimate_constant_p (mode, val)))
  	val = force_operand (val, NULL_RTX);
  
!       if (pass_by_reference (&args_so_far_v, mode, NULL_TREE, 1))
  	{
  	  rtx slot;
! 	  int must_copy
! 	    = !reference_callee_copied (&args_so_far_v, mode, NULL_TREE, 1);
  
  	  /* If this was a CONST function, it is now PURE since it now
  	     reads memory.  */
--- 5242,5266 ----
    for (unsigned int i = 0; count < nargs; i++, count++)
      {
        rtx val = args[i].first;
!       function_arg_info arg (args[i].second, /*named=*/true);
        int unsigned_p = 0;
  
        /* We cannot convert the arg value to the mode the library wants here;
  	 must do it earlier where we know the signedness of the arg.  */
!       gcc_assert (arg.mode != BLKmode
! 		  && (GET_MODE (val) == arg.mode
! 		      || GET_MODE (val) == VOIDmode));
  
        /* Make sure it is a reasonable operand for a move or push insn.  */
        if (!REG_P (val) && !MEM_P (val)
! 	  && !(CONSTANT_P (val)
! 	       && targetm.legitimate_constant_p (arg.mode, val)))
  	val = force_operand (val, NULL_RTX);
  
!       if (pass_by_reference (&args_so_far_v, arg))
  	{
  	  rtx slot;
! 	  int must_copy = !reference_callee_copied (&args_so_far_v, arg);
  
  	  /* If this was a CONST function, it is now PURE since it now
  	     reads memory.  */
*************** emit_library_call_value_1 (int retval, r
*** 4908,4914 ****
  	    }
  	  else
  	    {
! 	      slot = assign_temp (lang_hooks.types.type_for_mode (mode, 0),
  				  1, 1);
  	      emit_move_insn (slot, val);
  	    }
--- 5279,5285 ----
  	    }
  	  else
  	    {
! 	      slot = assign_temp (lang_hooks.types.type_for_mode (arg.mode, 0),
  				  1, 1);
  	      emit_move_insn (slot, val);
  	    }
*************** emit_library_call_value_1 (int retval, r
*** 4922,4945 ****
  							      slot),
  					     call_fusage);
  
! 	  mode = Pmode;
  	  val = force_operand (XEXP (slot, 0), NULL_RTX);
  	}
  
!       mode = promote_function_mode (NULL_TREE, mode, &unsigned_p, NULL_TREE, 0);
!       argvec[count].mode = mode;
!       argvec[count].value = convert_modes (mode, GET_MODE (val), val, unsigned_p);
!       argvec[count].reg = targetm.calls.function_arg (args_so_far, mode,
! 						      NULL_TREE, true);
  
        argvec[count].partial
! 	= targetm.calls.arg_partial_bytes (args_so_far, mode, NULL_TREE, 1);
  
        if (argvec[count].reg == 0
  	  || argvec[count].partial != 0
  	  || reg_parm_stack_space > 0)
  	{
! 	  locate_and_pad_parm (mode, NULL_TREE,
  #ifdef STACK_PARMS_IN_REG_PARM_AREA
  			       1,
  #else
--- 5293,5318 ----
  							      slot),
  					     call_fusage);
  
! 	  arg.mode = Pmode;
! 	  arg.pass_by_reference = true;
  	  val = force_operand (XEXP (slot, 0), NULL_RTX);
  	}
  
!       arg.mode = promote_function_mode (NULL_TREE, arg.mode, &unsigned_p,
! 					NULL_TREE, 0);
!       argvec[count].mode = arg.mode;
!       argvec[count].value = convert_modes (arg.mode, GET_MODE (val), val,
! 					   unsigned_p);
!       argvec[count].reg = targetm.calls.function_arg (args_so_far, arg);
  
        argvec[count].partial
! 	= targetm.calls.arg_partial_bytes (args_so_far, arg);
  
        if (argvec[count].reg == 0
  	  || argvec[count].partial != 0
  	  || reg_parm_stack_space > 0)
  	{
! 	  locate_and_pad_parm (arg.mode, NULL_TREE,
  #ifdef STACK_PARMS_IN_REG_PARM_AREA
  			       1,
  #else
*************** emit_library_call_value_1 (int retval, r
*** 4955,4967 ****
  	/* The argument is passed entirely in registers.  See at which
  	   end it should be padded.  */
  	argvec[count].locate.where_pad =
! 	  BLOCK_REG_PADDING (mode, NULL_TREE,
! 			     known_le (GET_MODE_SIZE (mode), UNITS_PER_WORD));
  #endif
  
!       targetm.calls.function_arg_advance (args_so_far, mode, (tree) 0, true);
      }
  
    /* If this machine requires an external definition for library
       functions, write one out.  */
    assemble_external_libcall (fun);
--- 5328,5347 ----
  	/* The argument is passed entirely in registers.  See at which
  	   end it should be padded.  */
  	argvec[count].locate.where_pad =
! 	  BLOCK_REG_PADDING (arg.mode, NULL_TREE,
! 			     known_le (GET_MODE_SIZE (arg.mode),
! 				       UNITS_PER_WORD));
  #endif
  
!       targetm.calls.function_arg_advance (args_so_far, arg);
      }
  
+   for (int i = 0; i < nargs; i++)
+     if (reg_parm_stack_space > 0
+ 	|| argvec[i].reg == 0
+ 	|| argvec[i].partial != 0)
+       update_stack_alignment_for_call (&argvec[i].locate);
+ 
    /* If this machine requires an external definition for library
       functions, write one out.  */
    assemble_external_libcall (fun);
*************** emit_library_call_value_1 (int retval, r
*** 5289,5294 ****
--- 5669,5677 ----
  
    before_call = get_last_insn ();
  
+   if (flag_callgraph_info)
+     record_final_call (SYMBOL_REF_DECL (orgfun), UNKNOWN_LOCATION);
+ 
    /* We pass the old value of inhibit_defer_pop + 1 to emit_call_1, which
       will set inhibit_defer_pop to that value.  */
    /* The return type is needed to decide how many bytes the function pops.
*************** emit_library_call_value_1 (int retval, r
*** 5302,5308 ****
  	       original_args_size.constant, args_size.constant,
  	       struct_value_size,
  	       targetm.calls.function_arg (args_so_far,
! 					   VOIDmode, void_type_node, true),
  	       valreg,
  	       old_inhibit_defer_pop + 1, call_fusage, flags, args_so_far);
  
--- 5685,5691 ----
  	       original_args_size.constant, args_size.constant,
  	       struct_value_size,
  	       targetm.calls.function_arg (args_so_far,
! 					   function_arg_info::end_marker ()),
  	       valreg,
  	       old_inhibit_defer_pop + 1, call_fusage, flags, args_so_far);
  
*************** store_one_arg (struct arg_data *arg, rtx
*** 5815,5836 ****
    return sibcall_failure;
  }
  
! /* Nonzero if we do not know how to pass TYPE solely in registers.  */
  
  bool
! must_pass_in_stack_var_size (machine_mode mode ATTRIBUTE_UNUSED,
! 			     const_tree type)
  {
!   if (!type)
      return false;
  
    /* If the type has variable size...  */
!   if (TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
      return true;
  
    /* If the type is marked as addressable (it is required
       to be constructed into the stack)...  */
!   if (TREE_ADDRESSABLE (type))
      return true;
  
    return false;
--- 6198,6218 ----
    return sibcall_failure;
  }
  
! /* Nonzero if we do not know how to pass ARG solely in registers.  */
  
  bool
! must_pass_in_stack_var_size (const function_arg_info &arg)
  {
!   if (!arg.type)
      return false;
  
    /* If the type has variable size...  */
!   if (!poly_int_tree_p (TYPE_SIZE (arg.type)))
      return true;
  
    /* If the type is marked as addressable (it is required
       to be constructed into the stack)...  */
!   if (TREE_ADDRESSABLE (arg.type))
      return true;
  
    return false;
*************** must_pass_in_stack_var_size (machine_mod
*** 5841,5873 ****
  /* ??? Should be able to merge these two by examining BLOCK_REG_PADDING.  */
  
  bool
! must_pass_in_stack_var_size_or_pad (machine_mode mode, const_tree type)
  {
!   if (!type)
      return false;
  
    /* If the type has variable size...  */
!   if (TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
      return true;
  
    /* If the type is marked as addressable (it is required
       to be constructed into the stack)...  */
!   if (TREE_ADDRESSABLE (type))
      return true;
  
!   if (TYPE_EMPTY_P (type))
      return false;
  
    /* If the padding and mode of the type is such that a copy into
       a register would put it into the wrong part of the register.  */
!   if (mode == BLKmode
!       && int_size_in_bytes (type) % (PARM_BOUNDARY / BITS_PER_UNIT)
!       && (targetm.calls.function_arg_padding (mode, type)
  	  == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD)))
      return true;
  
    return false;
  }
  
  /* Tell the garbage collector about GTY markers in this source file.  */
  #include "gt-calls.h"
--- 6223,6280 ----
  /* ??? Should be able to merge these two by examining BLOCK_REG_PADDING.  */
  
  bool
! must_pass_in_stack_var_size_or_pad (const function_arg_info &arg)
  {
!   if (!arg.type)
      return false;
  
    /* If the type has variable size...  */
!   if (TREE_CODE (TYPE_SIZE (arg.type)) != INTEGER_CST)
      return true;
  
    /* If the type is marked as addressable (it is required
       to be constructed into the stack)...  */
!   if (TREE_ADDRESSABLE (arg.type))
      return true;
  
!   if (TYPE_EMPTY_P (arg.type))
      return false;
  
    /* If the padding and mode of the type is such that a copy into
       a register would put it into the wrong part of the register.  */
!   if (arg.mode == BLKmode
!       && int_size_in_bytes (arg.type) % (PARM_BOUNDARY / BITS_PER_UNIT)
!       && (targetm.calls.function_arg_padding (arg.mode, arg.type)
  	  == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD)))
      return true;
  
    return false;
  }
  
+ /* Return true if TYPE must be passed on the stack when passed to
+    the "..." arguments of a function.  */
+ 
+ bool
+ must_pass_va_arg_in_stack (tree type)
+ {
+   function_arg_info arg (type, /*named=*/false);
+   return targetm.calls.must_pass_in_stack (arg);
+ }
+ 
+ /* Return true if FIELD is the C++17 empty base field that should
+    be ignored for ABI calling convention decisions in order to
+    maintain ABI compatibility between C++14 and earlier, which doesn't
+    add this FIELD to classes with empty bases, and C++17 and later
+    which does.  */
+ 
+ bool
+ cxx17_empty_base_field_p (const_tree field)
+ {
+   return (DECL_FIELD_ABI_IGNORED (field)
+ 	  && DECL_ARTIFICIAL (field)
+ 	  && RECORD_OR_UNION_TYPE_P (TREE_TYPE (field))
+ 	  && !lookup_attribute ("no_unique_address", DECL_ATTRIBUTES (field)));
+ }
+ 
  /* Tell the garbage collector about GTY markers in this source file.  */
  #include "gt-calls.h"
diff -Nrcpad gcc-9.3.0/gcc/calls.h gcc-10.1.0/gcc/calls.h
*** gcc-9.3.0/gcc/calls.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/calls.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Declarations and data types for RTL call insn generation.
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Declarations and data types for RTL call insn generation.
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 20,46 ****
  #ifndef GCC_CALLS_H
  #define GCC_CALLS_H
  
  extern int flags_from_decl_or_type (const_tree);
  extern int call_expr_flags (const_tree);
  extern int setjmp_call_p (const_tree);
  extern bool gimple_maybe_alloca_call_p (const gimple *);
  extern bool gimple_alloca_call_p (const gimple *);
  extern bool alloca_call_p (const_tree);
! extern bool must_pass_in_stack_var_size (machine_mode, const_tree);
! extern bool must_pass_in_stack_var_size_or_pad (machine_mode, const_tree);
  extern rtx prepare_call_address (tree, rtx, rtx, rtx *, int, int);
  extern bool shift_return_value (machine_mode, bool, rtx);
  extern rtx expand_call (tree, rtx, int);
  extern void fixup_tail_calls (void);
  
! extern bool pass_by_reference (CUMULATIVE_ARGS *, machine_mode,
! 			       tree, bool);
! extern bool reference_callee_copied (CUMULATIVE_ARGS *, machine_mode,
! 				     tree, bool);
  extern void maybe_warn_alloc_args_overflow (tree, tree, tree[2], int[2]);
  extern tree get_attr_nonstring_decl (tree, tree * = NULL);
  extern void maybe_warn_nonstring_arg (tree, tree);
  extern bool get_size_range (tree, tree[2], bool = false);
  extern rtx rtx_for_static_chain (const_tree, bool);
  
  #endif // GCC_CALLS_H
--- 20,140 ----
  #ifndef GCC_CALLS_H
  #define GCC_CALLS_H
  
+ /* Describes a function argument.
+ 
+    Each argument conceptually has a gimple-level type.  Usually this type
+    is available directly as a tree via the TYPE field, but when calling
+    libgcc support functions it might instead be inferred from a mode,
+    in which case the type isn't available directly.
+ 
+    This gimple-level type might go through promotion before being passed to
+    the target function.  Depending on the context, the MODE field is either
+    the mode of the gimple-level type (whether explicitly given or not)
+    or the mode after promotion has been performed.  */
+ class function_arg_info
+ {
+ public:
+   function_arg_info ()
+     : type (NULL_TREE), mode (VOIDmode), named (false),
+       pass_by_reference (false)
+   {}
+ 
+   /* Initialize an argument of mode MODE, either before or after promotion.  */
+   function_arg_info (machine_mode mode, bool named)
+     : type (NULL_TREE), mode (mode), named (named), pass_by_reference (false)
+   {}
+ 
+   /* Initialize an unpromoted argument of type TYPE.  */
+   function_arg_info (tree type, bool named)
+     : type (type), mode (TYPE_MODE (type)), named (named),
+       pass_by_reference (false)
+   {}
+ 
+   /* Initialize an argument with explicit properties.  */
+   function_arg_info (tree type, machine_mode mode, bool named)
+     : type (type), mode (mode), named (named), pass_by_reference (false)
+   {}
+ 
+   /* Return true if the gimple-level type is an aggregate.  */
+   bool aggregate_type_p () const { return type && AGGREGATE_TYPE_P (type); }
+ 
+   /* Return the size of the gimple-level type, or -1 if the size is
+      variable or otherwise not representable as a poly_int64.
+ 
+      Use this function when MODE is the mode of the type before promotion,
+      or in any context if the target never promotes function arguments.  */
+   poly_int64 type_size_in_bytes () const
+   {
+     if (type)
+       return int_size_in_bytes (type);
+     return GET_MODE_SIZE (mode);
+   }
+ 
+   /* Return the size of the argument after promotion, or -1 if the size
+      is variable or otherwise not representable as a poly_int64.
+ 
+      Use this function when MODE is the mode of the type after promotion.  */
+   poly_int64 promoted_size_in_bytes () const
+   {
+     if (mode == BLKmode)
+       return int_size_in_bytes (type);
+     return GET_MODE_SIZE (mode);
+   }
+ 
+   /* True if the argument represents the end of the argument list,
+      as returned by end_marker ().  */
+   bool end_marker_p () const { return mode == VOIDmode; }
+ 
+   /* Return a function_arg_info that represents the end of the
+      argument list.  */
+   static function_arg_info end_marker ()
+   {
+     return function_arg_info (void_type_node, /*named=*/true);
+   }
+ 
+   /* The type of the argument, or null if not known (which is true for
+      libgcc support functions).  */
+   tree type;
+ 
+   /* The mode of the argument.  Depending on context, this might be
+      the mode of the argument type or the mode after promotion.  */
+   machine_mode mode;
+ 
+   /* True if the argument is treated as a named argument, false if it is
+      treated as an unnamed variadic argument (i.e. one passed through
+      "...").  See also TARGET_STRICT_ARGUMENT_NAMING.  */
+   unsigned int named : 1;
+ 
+   /* True if we have decided to pass the argument by reference, in which case
+      the function_arg_info describes a pointer to the original argument.  */
+   unsigned int pass_by_reference : 1;
+ };
+ 
  extern int flags_from_decl_or_type (const_tree);
  extern int call_expr_flags (const_tree);
  extern int setjmp_call_p (const_tree);
  extern bool gimple_maybe_alloca_call_p (const gimple *);
  extern bool gimple_alloca_call_p (const gimple *);
  extern bool alloca_call_p (const_tree);
! extern bool must_pass_in_stack_var_size (const function_arg_info &);
! extern bool must_pass_in_stack_var_size_or_pad (const function_arg_info &);
! extern bool must_pass_va_arg_in_stack (tree);
  extern rtx prepare_call_address (tree, rtx, rtx, rtx *, int, int);
  extern bool shift_return_value (machine_mode, bool, rtx);
  extern rtx expand_call (tree, rtx, int);
  extern void fixup_tail_calls (void);
  
! extern bool pass_by_reference (CUMULATIVE_ARGS *, function_arg_info);
! extern bool pass_va_arg_by_reference (tree);
! extern bool apply_pass_by_reference_rules (CUMULATIVE_ARGS *,
! 					   function_arg_info &);
! extern bool reference_callee_copied (CUMULATIVE_ARGS *,
! 				     const function_arg_info &);
  extern void maybe_warn_alloc_args_overflow (tree, tree, tree[2], int[2]);
  extern tree get_attr_nonstring_decl (tree, tree * = NULL);
  extern void maybe_warn_nonstring_arg (tree, tree);
  extern bool get_size_range (tree, tree[2], bool = false);
  extern rtx rtx_for_static_chain (const_tree, bool);
+ extern bool cxx17_empty_base_field_p (const_tree);
  
  #endif // GCC_CALLS_H
diff -Nrcpad gcc-9.3.0/gcc/ccmp.c gcc-10.1.0/gcc/ccmp.c
*** gcc-9.3.0/gcc/ccmp.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ccmp.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Conditional compare related functions
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Conditional compare related functions
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** expand_ccmp_next (tree op, tree_code cod
*** 187,198 ****
  static rtx
  expand_ccmp_expr_1 (gimple *g, rtx_insn **prep_seq, rtx_insn **gen_seq)
  {
!   tree exp = gimple_assign_rhs_to_tree (g);
!   tree_code code = TREE_CODE (exp);
    basic_block bb = gimple_bb (g);
  
!   tree op0 = TREE_OPERAND (exp, 0);
!   tree op1 = TREE_OPERAND (exp, 1);
    gimple *gs0 = get_gimple_for_ssa_name (op0);
    gimple *gs1 = get_gimple_for_ssa_name (op1);
    rtx tmp;
--- 187,197 ----
  static rtx
  expand_ccmp_expr_1 (gimple *g, rtx_insn **prep_seq, rtx_insn **gen_seq)
  {
!   tree_code code = gimple_assign_rhs_code (g);
    basic_block bb = gimple_bb (g);
  
!   tree op0 = gimple_assign_rhs1 (g);
!   tree op1 = gimple_assign_rhs2 (g);
    gimple *gs0 = get_gimple_for_ssa_name (op0);
    gimple *gs1 = get_gimple_for_ssa_name (op1);
    rtx tmp;
diff -Nrcpad gcc-9.3.0/gcc/ccmp.h gcc-10.1.0/gcc/ccmp.h
*** gcc-9.3.0/gcc/ccmp.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/ccmp.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Conditional comapre related functions.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Conditional comapre related functions.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/cfg-flags.def gcc-10.1.0/gcc/cfg-flags.def
*** gcc-9.3.0/gcc/cfg-flags.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfg-flags.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Flags on basic blocks and edges.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Flags on basic blocks and edges.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/cfg.c gcc-10.1.0/gcc/cfg.c
*** gcc-9.3.0/gcc/cfg.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfg.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Control flow graph manipulation code for GNU compiler.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Control flow graph manipulation code for GNU compiler.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** dump_edge_info (FILE *file, edge e, dump
*** 546,554 ****
  DEBUG_FUNCTION void
  debug (edge_def &ref)
  {
!   /* FIXME (crowl): Is this desireable?  */
!   dump_edge_info (stderr, &ref, TDF_NONE, false);
!   dump_edge_info (stderr, &ref, TDF_NONE, true);
  }
  
  DEBUG_FUNCTION void
--- 546,555 ----
  DEBUG_FUNCTION void
  debug (edge_def &ref)
  {
!   fprintf (stderr, "<edge (%d -> %d)>\n",
! 	   ref.src->index, ref.dest->index);
!   dump_edge_info (stderr, &ref, TDF_DETAILS, false);
!   fprintf (stderr, "\n");
  }
  
  DEBUG_FUNCTION void
*************** get_bb_copy (basic_block bb)
*** 1144,1150 ****
     initialized so passes not needing this don't need to care.  */
  
  void
! set_loop_copy (struct loop *loop, struct loop *copy)
  {
    if (!copy)
      copy_original_table_clear (loop_copy, loop->num);
--- 1145,1151 ----
     initialized so passes not needing this don't need to care.  */
  
  void
! set_loop_copy (class loop *loop, class loop *copy)
  {
    if (!copy)
      copy_original_table_clear (loop_copy, loop->num);
*************** set_loop_copy (struct loop *loop, struct
*** 1154,1161 ****
  
  /* Get the copy of LOOP.  */
  
! struct loop *
! get_loop_copy (struct loop *loop)
  {
    struct htab_bb_copy_original_entry *entry;
    struct htab_bb_copy_original_entry key;
--- 1155,1162 ----
  
  /* Get the copy of LOOP.  */
  
! class loop *
! get_loop_copy (class loop *loop)
  {
    struct htab_bb_copy_original_entry *entry;
    struct htab_bb_copy_original_entry key;
diff -Nrcpad gcc-9.3.0/gcc/cfg.h gcc-10.1.0/gcc/cfg.h
*** gcc-9.3.0/gcc/cfg.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfg.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Control flow graph manipulation code header file.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Control flow graph manipulation code header file.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** extern void set_bb_original (basic_block
*** 122,129 ****
  extern basic_block get_bb_original (basic_block);
  extern void set_bb_copy (basic_block, basic_block);
  extern basic_block get_bb_copy (basic_block);
! void set_loop_copy (struct loop *, struct loop *);
! struct loop *get_loop_copy (struct loop *);
  
  /* Generic RAII class to allocate a bit from storage of integer type T.
     The allocated bit is accessible as mask with the single bit set
--- 122,129 ----
  extern basic_block get_bb_original (basic_block);
  extern void set_bb_copy (basic_block, basic_block);
  extern basic_block get_bb_copy (basic_block);
! void set_loop_copy (class loop *, class loop *);
! class loop *get_loop_copy (class loop *);
  
  /* Generic RAII class to allocate a bit from storage of integer type T.
     The allocated bit is accessible as mask with the single bit set
diff -Nrcpad gcc-9.3.0/gcc/cfganal.c gcc-10.1.0/gcc/cfganal.c
*** gcc-9.3.0/gcc/cfganal.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfganal.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Control flow graph analysis code for GNU compiler.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Control flow graph analysis code for GNU compiler.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** pre_and_rev_post_order_compute_fn (struc
*** 967,977 ****
    else
      rev_post_order_num -= NUM_FIXED_BLOCKS;
  
!   /* Allocate bitmap to track nodes that have been visited.  */
!   auto_sbitmap visited (last_basic_block_for_fn (fn));
! 
!   /* None of the nodes in the CFG have been visited yet.  */
!   bitmap_clear (visited);
  
    /* Push the first edge on to the stack.  */
    stack.quick_push (ei_start (ENTRY_BLOCK_PTR_FOR_FN (fn)->succs));
--- 967,974 ----
    else
      rev_post_order_num -= NUM_FIXED_BLOCKS;
  
!   /* BB flag to track nodes that have been visited.  */
!   auto_bb_flag visited (fn);
  
    /* Push the first edge on to the stack.  */
    stack.quick_push (ei_start (ENTRY_BLOCK_PTR_FOR_FN (fn)->succs));
*************** pre_and_rev_post_order_compute_fn (struc
*** 988,997 ****
  
        /* Check if the edge destination has been visited yet.  */
        if (dest != EXIT_BLOCK_PTR_FOR_FN (fn)
! 	  && ! bitmap_bit_p (visited, dest->index))
  	{
  	  /* Mark that we have visited the destination.  */
! 	  bitmap_set_bit (visited, dest->index);
  
  	  if (pre_order)
  	    pre_order[pre_order_num] = dest->index;
--- 985,994 ----
  
        /* Check if the edge destination has been visited yet.  */
        if (dest != EXIT_BLOCK_PTR_FOR_FN (fn)
! 	  && ! (dest->flags & visited))
  	{
  	  /* Mark that we have visited the destination.  */
! 	  dest->flags |= visited;
  
  	  if (pre_order)
  	    pre_order[pre_order_num] = dest->index;
*************** pre_and_rev_post_order_compute_fn (struc
*** 1032,1037 ****
--- 1029,1040 ----
  	rev_post_order[rev_post_order_num--] = ENTRY_BLOCK;
      }
  
+   /* Clear the temporarily allocated flag.  */
+   if (!rev_post_order)
+     rev_post_order = pre_order;
+   for (int i = 0; i < pre_order_num; ++i)
+     BASIC_BLOCK_FOR_FN (fn, rev_post_order[i])->flags &= ~visited;
+ 
    return pre_order_num;
  }
  
*************** dfs_enumerate_from (basic_block bb, int
*** 1326,1335 ****
     of the dominance frontiers, no more, no less.
  */
  
! 
! static void
! compute_dominance_frontiers_1 (bitmap_head *frontiers)
  {
    edge p;
    edge_iterator ei;
    basic_block b;
--- 1329,1339 ----
     of the dominance frontiers, no more, no less.
  */
  
! void
! compute_dominance_frontiers (bitmap_head *frontiers)
  {
+   timevar_push (TV_DOM_FRONTIERS);
+ 
    edge p;
    edge_iterator ei;
    basic_block b;
*************** compute_dominance_frontiers_1 (bitmap_he
*** 1337,1370 ****
      {
        if (EDGE_COUNT (b->preds) >= 2)
  	{
  	  FOR_EACH_EDGE (p, ei, b->preds)
  	    {
  	      basic_block runner = p->src;
- 	      basic_block domsb;
  	      if (runner == ENTRY_BLOCK_PTR_FOR_FN (cfun))
  		continue;
  
- 	      domsb = get_immediate_dominator (CDI_DOMINATORS, b);
  	      while (runner != domsb)
  		{
! 		  if (!bitmap_set_bit (&frontiers[runner->index],
! 				       b->index))
  		    break;
! 		  runner = get_immediate_dominator (CDI_DOMINATORS,
! 						    runner);
  		}
  	    }
  	}
      }
- }
- 
- 
- void
- compute_dominance_frontiers (bitmap_head *frontiers)
- {
-   timevar_push (TV_DOM_FRONTIERS);
- 
-   compute_dominance_frontiers_1 (frontiers);
  
    timevar_pop (TV_DOM_FRONTIERS);
  }
--- 1341,1362 ----
      {
        if (EDGE_COUNT (b->preds) >= 2)
  	{
+ 	  basic_block domsb = get_immediate_dominator (CDI_DOMINATORS, b);
  	  FOR_EACH_EDGE (p, ei, b->preds)
  	    {
  	      basic_block runner = p->src;
  	      if (runner == ENTRY_BLOCK_PTR_FOR_FN (cfun))
  		continue;
  
  	      while (runner != domsb)
  		{
! 		  if (!bitmap_set_bit (&frontiers[runner->index], b->index))
  		    break;
! 		  runner = get_immediate_dominator (CDI_DOMINATORS, runner);
  		}
  	    }
  	}
      }
  
    timevar_pop (TV_DOM_FRONTIERS);
  }
*************** compute_idf (bitmap def_blocks, bitmap_h
*** 1385,1409 ****
    unsigned bb_index, i;
    bitmap phi_insertion_points;
  
-   /* Each block can appear at most twice on the work-stack.  */
-   auto_vec<int> work_stack (2 * n_basic_blocks_for_fn (cfun));
    phi_insertion_points = BITMAP_ALLOC (NULL);
  
!   /* Seed the work list with all the blocks in DEF_BLOCKS.  We use
!      vec::quick_push here for speed.  This is safe because we know that
!      the number of definition blocks is no greater than the number of
!      basic blocks, which is the initial capacity of WORK_STACK.  */
!   EXECUTE_IF_SET_IN_BITMAP (def_blocks, 0, bb_index, bi)
!     work_stack.quick_push (bb_index);
  
!   /* Pop a block off the worklist, add every block that appears in
       the original block's DF that we have not already processed to
!      the worklist.  Iterate until the worklist is empty.   Blocks
!      which are added to the worklist are potential sites for
       PHI nodes.  */
!   while (work_stack.length () > 0)
      {
!       bb_index = work_stack.pop ();
  
        /* Since the registration of NEW -> OLD name mappings is done
  	 separately from the call to update_ssa, when updating the SSA
--- 1377,1402 ----
    unsigned bb_index, i;
    bitmap phi_insertion_points;
  
    phi_insertion_points = BITMAP_ALLOC (NULL);
  
!   /* Seed the work set with all the blocks in DEF_BLOCKS.  */
!   auto_bitmap work_set;
!   bitmap_copy (work_set, def_blocks);
!   bitmap_tree_view (work_set);
  
!   /* Pop a block off the workset, add every block that appears in
       the original block's DF that we have not already processed to
!      the workset.  Iterate until the workset is empty.   Blocks
!      which are added to the workset are potential sites for
       PHI nodes.  */
!   while (!bitmap_empty_p (work_set))
      {
!       /* The dominance frontier of a block is blocks after it so iterating
!          on earlier blocks first is better.
! 	 ???  Basic blocks are by no means guaranteed to be ordered in
! 	 optimal order for this iteration.  */
!       bb_index = bitmap_first_set_bit (work_set);
!       bitmap_clear_bit (work_set, bb_index);
  
        /* Since the registration of NEW -> OLD name mappings is done
  	 separately from the call to update_ssa, when updating the SSA
*************** compute_idf (bitmap def_blocks, bitmap_h
*** 1416,1422 ****
        EXECUTE_IF_AND_COMPL_IN_BITMAP (&dfs[bb_index], phi_insertion_points,
  	                              0, i, bi)
  	{
! 	  work_stack.quick_push (i);
  	  bitmap_set_bit (phi_insertion_points, i);
  	}
      }
--- 1409,1415 ----
        EXECUTE_IF_AND_COMPL_IN_BITMAP (&dfs[bb_index], phi_insertion_points,
  	                              0, i, bi)
  	{
! 	  bitmap_set_bit (work_set, i);
  	  bitmap_set_bit (phi_insertion_points, i);
  	}
      }
diff -Nrcpad gcc-9.3.0/gcc/cfganal.h gcc-10.1.0/gcc/cfganal.h
*** gcc-9.3.0/gcc/cfganal.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfganal.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Control flow graph analysis header file.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Control flow graph analysis header file.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** extern int rev_post_order_and_mark_dfs_b
*** 72,79 ****
  extern int dfs_enumerate_from (basic_block, int,
  			       bool (*)(const_basic_block, const void *),
  			       basic_block *, int, const void *);
! extern void compute_dominance_frontiers (struct bitmap_head *);
! extern bitmap compute_idf (bitmap, struct bitmap_head *);
  extern void bitmap_intersection_of_succs (sbitmap, sbitmap *, basic_block);
  extern void bitmap_intersection_of_preds (sbitmap, sbitmap *, basic_block);
  extern void bitmap_union_of_succs (sbitmap, sbitmap *, basic_block);
--- 72,79 ----
  extern int dfs_enumerate_from (basic_block, int,
  			       bool (*)(const_basic_block, const void *),
  			       basic_block *, int, const void *);
! extern void compute_dominance_frontiers (class bitmap_head *);
! extern bitmap compute_idf (bitmap, class bitmap_head *);
  extern void bitmap_intersection_of_succs (sbitmap, sbitmap *, basic_block);
  extern void bitmap_intersection_of_preds (sbitmap, sbitmap *, basic_block);
  extern void bitmap_union_of_succs (sbitmap, sbitmap *, basic_block);
diff -Nrcpad gcc-9.3.0/gcc/cfgbuild.c gcc-10.1.0/gcc/cfgbuild.c
*** gcc-9.3.0/gcc/cfgbuild.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfgbuild.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Control flow graph building code for GNU compiler.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Control flow graph building code for GNU compiler.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/cfgbuild.h gcc-10.1.0/gcc/cfgbuild.h
*** gcc-9.3.0/gcc/cfgbuild.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfgbuild.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Control flow graph building header file.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Control flow graph building header file.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/cfgcleanup.c gcc-10.1.0/gcc/cfgcleanup.c
*** gcc-9.3.0/gcc/cfgcleanup.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfgcleanup.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Control flow optimization code for GNU compiler.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Control flow optimization code for GNU compiler.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 43,49 ****
  #include "insn-config.h"
  #include "emit-rtl.h"
  #include "cselib.h"
- #include "params.h"
  #include "tree-pass.h"
  #include "cfgloop.h"
  #include "cfgrtl.h"
--- 43,48 ----
*************** along with GCC; see the file COPYING3.
*** 54,59 ****
--- 53,59 ----
  #include "dbgcnt.h"
  #include "rtl-iter.h"
  #include "regs.h"
+ #include "function-abi.h"
  
  #define FORWARDER_BLOCK_P(BB) ((BB)->flags & BB_FORWARDER_BLOCK)
  
*************** old_insns_match_p (int mode ATTRIBUTE_UN
*** 1230,1241 ****
  	    }
  	}
  
!       HARD_REG_SET i1_used, i2_used;
! 
!       get_call_reg_set_usage (i1, &i1_used, call_used_reg_set);
!       get_call_reg_set_usage (i2, &i2_used, call_used_reg_set);
! 
!       if (!hard_reg_set_equal_p (i1_used, i2_used))
          return dir_none;
      }
  
--- 1230,1236 ----
  	    }
  	}
  
!       if (insn_callee_abi (i1) != insn_callee_abi (i2))
          return dir_none;
      }
  
*************** old_insns_match_p (int mode ATTRIBUTE_UN
*** 1269,1275 ****
  	if (REG_NOTE_KIND (note) == REG_DEAD && STACK_REG_P (XEXP (note, 0)))
  	  SET_HARD_REG_BIT (i2_regset, REGNO (XEXP (note, 0)));
  
!       if (!hard_reg_set_equal_p (i1_regset, i2_regset))
  	return dir_none;
      }
  #endif
--- 1264,1270 ----
  	if (REG_NOTE_KIND (note) == REG_DEAD && STACK_REG_P (XEXP (note, 0)))
  	  SET_HARD_REG_BIT (i2_regset, REGNO (XEXP (note, 0)));
  
!       if (i1_regset != i2_regset)
  	return dir_none;
      }
  #endif
*************** try_crossjump_to_edge (int mode, edge e1
*** 2026,2032 ****
       of matching instructions or the 'from' block was totally matched
       (such that its predecessors will hopefully be redirected and the
       block removed).  */
!   if ((nmatch < PARAM_VALUE (PARAM_MIN_CROSSJUMP_INSNS))
        && (newpos1 != BB_HEAD (src1)))
      return false;
  
--- 2021,2027 ----
       of matching instructions or the 'from' block was totally matched
       (such that its predecessors will hopefully be redirected and the
       block removed).  */
!   if ((nmatch < param_min_crossjump_insns)
        && (newpos1 != BB_HEAD (src1)))
      return false;
  
*************** try_crossjump_bb (int mode, basic_block
*** 2219,2225 ****
       a block that falls through into BB, as that adds no branches to the
       program.  We'll try that combination first.  */
    fallthru = NULL;
!   max = PARAM_VALUE (PARAM_MAX_CROSSJUMP_EDGES);
  
    if (EDGE_COUNT (bb->preds) > max)
      return false;
--- 2214,2220 ----
       a block that falls through into BB, as that adds no branches to the
       program.  We'll try that combination first.  */
    fallthru = NULL;
!   max = param_max_crossjump_edges;
  
    if (EDGE_COUNT (bb->preds) > max)
      return false;
*************** cleanup_cfg (int mode)
*** 3197,3203 ****
  	      && !delete_trivially_dead_insns (get_insns (), max_reg_num ()))
  	    break;
  	  if ((mode & CLEANUP_CROSSJUMP) && crossjumps_occurred)
! 	    run_fast_dce ();
  	}
        else
  	break;
--- 3192,3201 ----
  	      && !delete_trivially_dead_insns (get_insns (), max_reg_num ()))
  	    break;
  	  if ((mode & CLEANUP_CROSSJUMP) && crossjumps_occurred)
! 	    {
! 	      run_fast_dce ();
! 	      mode &= ~CLEANUP_FORCE_FAST_DCE;
! 	    }
  	}
        else
  	break;
*************** cleanup_cfg (int mode)
*** 3206,3211 ****
--- 3204,3212 ----
    if (mode & CLEANUP_CROSSJUMP)
      remove_fake_exit_edges ();
  
+   if (mode & CLEANUP_FORCE_FAST_DCE)
+     run_fast_dce ();
+ 
    /* Don't call delete_dead_jumptables in cfglayout mode, because
       that function assumes that jump tables are in the insns stream.
       But we also don't _have_ to delete dead jumptables in cfglayout
diff -Nrcpad gcc-9.3.0/gcc/cfgcleanup.h gcc-10.1.0/gcc/cfgcleanup.h
*** gcc-9.3.0/gcc/cfgcleanup.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfgcleanup.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Control flow optimization header file.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Control flow optimization header file.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/cfgexpand.c gcc-10.1.0/gcc/cfgexpand.c
*** gcc-9.3.0/gcc/cfgexpand.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfgexpand.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* A pass for lowering trees to RTL.
!    Copyright (C) 2004-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* A pass for lowering trees to RTL.
!    Copyright (C) 2004-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 61,67 ****
  #include "gimple-pretty-print.h"
  #include "toplev.h"
  #include "debug.h"
- #include "params.h"
  #include "tree-inline.h"
  #include "value-prof.h"
  #include "tree-ssa-live.h"
--- 61,66 ----
*************** tree
*** 104,141 ****
  gimple_assign_rhs_to_tree (gimple *stmt)
  {
    tree t;
!   enum gimple_rhs_class grhs_class;
! 
!   grhs_class = get_gimple_rhs_class (gimple_expr_code (stmt));
! 
!   if (grhs_class == GIMPLE_TERNARY_RHS)
!     t = build3 (gimple_assign_rhs_code (stmt),
! 		TREE_TYPE (gimple_assign_lhs (stmt)),
! 		gimple_assign_rhs1 (stmt),
! 		gimple_assign_rhs2 (stmt),
! 		gimple_assign_rhs3 (stmt));
!   else if (grhs_class == GIMPLE_BINARY_RHS)
!     t = build2 (gimple_assign_rhs_code (stmt),
! 		TREE_TYPE (gimple_assign_lhs (stmt)),
! 		gimple_assign_rhs1 (stmt),
! 		gimple_assign_rhs2 (stmt));
!   else if (grhs_class == GIMPLE_UNARY_RHS)
!     t = build1 (gimple_assign_rhs_code (stmt),
! 		TREE_TYPE (gimple_assign_lhs (stmt)),
! 		gimple_assign_rhs1 (stmt));
!   else if (grhs_class == GIMPLE_SINGLE_RHS)
      {
!       t = gimple_assign_rhs1 (stmt);
!       /* Avoid modifying this tree in place below.  */
!       if ((gimple_has_location (stmt) && CAN_HAVE_LOCATION_P (t)
! 	   && gimple_location (stmt) != EXPR_LOCATION (t))
! 	  || (gimple_block (stmt)
! 	      && currently_expanding_to_rtl
! 	      && EXPR_P (t)))
! 	t = copy_node (t);
      }
-   else
-     gcc_unreachable ();
  
    if (gimple_has_location (stmt) && CAN_HAVE_LOCATION_P (t))
      SET_EXPR_LOCATION (t, gimple_location (stmt));
--- 103,140 ----
  gimple_assign_rhs_to_tree (gimple *stmt)
  {
    tree t;
!   switch (get_gimple_rhs_class (gimple_expr_code (stmt)))
      {
!     case GIMPLE_TERNARY_RHS:
!       t = build3 (gimple_assign_rhs_code (stmt),
! 		  TREE_TYPE (gimple_assign_lhs (stmt)),
! 		  gimple_assign_rhs1 (stmt), gimple_assign_rhs2 (stmt),
! 		  gimple_assign_rhs3 (stmt));
!       break;
!     case GIMPLE_BINARY_RHS:
!       t = build2 (gimple_assign_rhs_code (stmt),
! 		  TREE_TYPE (gimple_assign_lhs (stmt)),
! 		  gimple_assign_rhs1 (stmt), gimple_assign_rhs2 (stmt));
!       break;
!     case GIMPLE_UNARY_RHS:
!       t = build1 (gimple_assign_rhs_code (stmt),
! 		  TREE_TYPE (gimple_assign_lhs (stmt)),
! 		  gimple_assign_rhs1 (stmt));
!       break;
!     case GIMPLE_SINGLE_RHS:
!       {
! 	t = gimple_assign_rhs1 (stmt);
! 	/* Avoid modifying this tree in place below.  */
! 	if ((gimple_has_location (stmt) && CAN_HAVE_LOCATION_P (t)
! 	     && gimple_location (stmt) != EXPR_LOCATION (t))
! 	    || (gimple_block (stmt) && currently_expanding_to_rtl
! 		&& EXPR_P (t)))
! 	  t = copy_node (t);
! 	break;
!       }
!     default:
!       gcc_unreachable ();
      }
  
    if (gimple_has_location (stmt) && CAN_HAVE_LOCATION_P (t))
      SET_EXPR_LOCATION (t, gimple_location (stmt));
*************** set_rtl (tree t, rtx x)
*** 305,312 ****
  
  /* This structure holds data relevant to one variable that will be
     placed in a stack slot.  */
! struct stack_var
  {
    /* The Variable.  */
    tree decl;
  
--- 304,312 ----
  
  /* This structure holds data relevant to one variable that will be
     placed in a stack slot.  */
! class stack_var
  {
+ public:
    /* The Variable.  */
    tree decl;
  
*************** struct stack_var
*** 331,337 ****
  #define EOC  ((size_t)-1)
  
  /* We have an array of such objects while deciding allocation.  */
! static struct stack_var *stack_vars;
  static size_t stack_vars_alloc;
  static size_t stack_vars_num;
  static hash_map<tree, size_t> *decl_to_stack_part;
--- 331,337 ----
  #define EOC  ((size_t)-1)
  
  /* We have an array of such objects while deciding allocation.  */
! static class stack_var *stack_vars;
  static size_t stack_vars_alloc;
  static size_t stack_vars_num;
  static hash_map<tree, size_t> *decl_to_stack_part;
*************** static bool has_short_buffer;
*** 361,367 ****
     we can't do with expected alignment of the stack boundary.  */
  
  static unsigned int
! align_local_variable (tree decl)
  {
    unsigned int align;
  
--- 361,367 ----
     we can't do with expected alignment of the stack boundary.  */
  
  static unsigned int
! align_local_variable (tree decl, bool really_expand)
  {
    unsigned int align;
  
*************** align_local_variable (tree decl)
*** 370,376 ****
    else
      {
        align = LOCAL_DECL_ALIGNMENT (decl);
!       SET_DECL_ALIGN (decl, align);
      }
    return align / BITS_PER_UNIT;
  }
--- 370,381 ----
    else
      {
        align = LOCAL_DECL_ALIGNMENT (decl);
!       /* Don't change DECL_ALIGN when called from estimated_stack_frame_size.
! 	 That is done before IPA and could bump alignment based on host
! 	 backend even for offloaded code which wants different
! 	 LOCAL_DECL_ALIGNMENT.  */
!       if (really_expand)
! 	SET_DECL_ALIGN (decl, align);
      }
    return align / BITS_PER_UNIT;
  }
*************** alloc_stack_frame_space (poly_int64 size
*** 418,426 ****
  /* Accumulate DECL into STACK_VARS.  */
  
  static void
! add_stack_var (tree decl)
  {
!   struct stack_var *v;
  
    if (stack_vars_num >= stack_vars_alloc)
      {
--- 423,431 ----
  /* Accumulate DECL into STACK_VARS.  */
  
  static void
! add_stack_var (tree decl, bool really_expand)
  {
!   class stack_var *v;
  
    if (stack_vars_num >= stack_vars_alloc)
      {
*************** add_stack_var (tree decl)
*** 429,435 ****
        else
  	stack_vars_alloc = 32;
        stack_vars
! 	= XRESIZEVEC (struct stack_var, stack_vars, stack_vars_alloc);
      }
    if (!decl_to_stack_part)
      decl_to_stack_part = new hash_map<tree, size_t>;
--- 434,440 ----
        else
  	stack_vars_alloc = 32;
        stack_vars
! 	= XRESIZEVEC (class stack_var, stack_vars, stack_vars_alloc);
      }
    if (!decl_to_stack_part)
      decl_to_stack_part = new hash_map<tree, size_t>;
*************** add_stack_var (tree decl)
*** 446,452 ****
       variables that are simultaneously live.  */
    if (known_eq (v->size, 0U))
      v->size = 1;
!   v->alignb = align_local_variable (decl);
    /* An alignment of zero can mightily confuse us later.  */
    gcc_assert (v->alignb != 0);
  
--- 451,457 ----
       variables that are simultaneously live.  */
    if (known_eq (v->size, 0U))
      v->size = 1;
!   v->alignb = align_local_variable (decl, really_expand);
    /* An alignment of zero can mightily confuse us later.  */
    gcc_assert (v->alignb != 0);
  
*************** add_stack_var (tree decl)
*** 468,475 ****
  static void
  add_stack_var_conflict (size_t x, size_t y)
  {
!   struct stack_var *a = &stack_vars[x];
!   struct stack_var *b = &stack_vars[y];
    if (x == y)
      return;
    if (!a->conflicts)
--- 473,480 ----
  static void
  add_stack_var_conflict (size_t x, size_t y)
  {
!   class stack_var *a = &stack_vars[x];
!   class stack_var *b = &stack_vars[y];
    if (x == y)
      return;
    if (!a->conflicts)
*************** add_stack_var_conflict (size_t x, size_t
*** 485,492 ****
  static bool
  stack_var_conflict_p (size_t x, size_t y)
  {
!   struct stack_var *a = &stack_vars[x];
!   struct stack_var *b = &stack_vars[y];
    if (x == y)
      return false;
    /* Partitions containing an SSA name result from gimple registers
--- 490,497 ----
  static bool
  stack_var_conflict_p (size_t x, size_t y)
  {
!   class stack_var *a = &stack_vars[x];
!   class stack_var *b = &stack_vars[y];
    if (x == y)
      return false;
    /* Partitions containing an SSA name result from gimple registers
*************** add_scope_conflicts_1 (basic_block bb, b
*** 601,607 ****
  	      unsigned i;
  	      EXECUTE_IF_SET_IN_BITMAP (work, 0, i, bi)
  		{
! 		  struct stack_var *a = &stack_vars[i];
  		  if (!a->conflicts)
  		    a->conflicts = BITMAP_ALLOC (&stack_var_bitmap_obstack);
  		  bitmap_ior_into (a->conflicts, work);
--- 606,612 ----
  	      unsigned i;
  	      EXECUTE_IF_SET_IN_BITMAP (work, 0, i, bi)
  		{
! 		  class stack_var *a = &stack_vars[i];
  		  if (!a->conflicts)
  		    a->conflicts = BITMAP_ALLOC (&stack_var_bitmap_obstack);
  		  bitmap_ior_into (a->conflicts, work);
*************** update_alias_info_with_stack_vars (void)
*** 847,853 ****
  static void
  union_stack_vars (size_t a, size_t b)
  {
!   struct stack_var *vb = &stack_vars[b];
    bitmap_iterator bi;
    unsigned u;
  
--- 852,858 ----
  static void
  union_stack_vars (size_t a, size_t b)
  {
!   class stack_var *vb = &stack_vars[b];
    bitmap_iterator bi;
    unsigned u;
  
*************** union_stack_vars (size_t a, size_t b)
*** 857,862 ****
--- 862,870 ----
    stack_vars[b].representative = a;
    stack_vars[a].next = b;
  
+   /* Make sure A is big enough to hold B.  */
+   stack_vars[a].size = upper_bound (stack_vars[a].size, stack_vars[b].size);
+ 
    /* Update the required alignment of partition A to account for B.  */
    if (stack_vars[a].alignb < stack_vars[b].alignb)
      stack_vars[a].alignb = stack_vars[b].alignb;
*************** expand_one_stack_var_at (tree decl, rtx
*** 1016,1023 ****
    set_rtl (decl, x);
  }
  
! struct stack_vars_data
  {
    /* Vector of offset pairs, always end of some padding followed
       by start of the padding that needs Address Sanitizer protection.
       The vector is in reversed, highest offset pairs come first.  */
--- 1024,1032 ----
    set_rtl (decl, x);
  }
  
! class stack_vars_data
  {
+ public:
    /* Vector of offset pairs, always end of some padding followed
       by start of the padding that needs Address Sanitizer protection.
       The vector is in reversed, highest offset pairs come first.  */
*************** struct stack_vars_data
*** 1038,1044 ****
     with that location.  */
  
  static void
! expand_stack_vars (bool (*pred) (size_t), struct stack_vars_data *data)
  {
    size_t si, i, j, n = stack_vars_num;
    poly_uint64 large_size = 0, large_alloc = 0;
--- 1047,1053 ----
     with that location.  */
  
  static void
! expand_stack_vars (bool (*pred) (size_t), class stack_vars_data *data)
  {
    size_t si, i, j, n = stack_vars_num;
    poly_uint64 large_size = 0, large_alloc = 0;
*************** expand_one_stack_var_1 (tree var)
*** 1323,1329 ****
    else
      {
        size = tree_to_poly_uint64 (DECL_SIZE_UNIT (var));
!       byte_align = align_local_variable (var);
      }
  
    /* We handle highly aligned variables in expand_stack_vars.  */
--- 1332,1338 ----
    else
      {
        size = tree_to_poly_uint64 (DECL_SIZE_UNIT (var));
!       byte_align = align_local_variable (var, true);
      }
  
    /* We handle highly aligned variables in expand_stack_vars.  */
*************** expand_one_ssa_partition (tree var)
*** 1413,1419 ****
    if (!use_register_for_decl (var))
      {
        if (defer_stack_allocation (var, true))
! 	add_stack_var (var);
        else
  	expand_one_stack_var_1 (var);
        return;
--- 1422,1428 ----
    if (!use_register_for_decl (var))
      {
        if (defer_stack_allocation (var, true))
! 	add_stack_var (var, true);
        else
  	expand_one_stack_var_1 (var);
        return;
*************** defer_stack_allocation (tree var, bool t
*** 1541,1547 ****
    bool smallish
      = (poly_int_tree_p (size_unit, &size)
         && (estimated_poly_value (size)
! 	   < PARAM_VALUE (PARAM_MIN_SIZE_FOR_STACK_SHARING)));
  
    /* If stack protection is enabled, *all* stack variables must be deferred,
       so that we can re-order the strings to the top of the frame.
--- 1550,1556 ----
    bool smallish
      = (poly_int_tree_p (size_unit, &size)
         && (estimated_poly_value (size)
! 	   < param_min_size_for_stack_sharing));
  
    /* If stack protection is enabled, *all* stack variables must be deferred,
       so that we can re-order the strings to the top of the frame.
*************** expand_one_var (tree var, bool toplevel,
*** 1695,1708 ****
  	}
      }
    else if (defer_stack_allocation (var, toplevel))
!     add_stack_var (origvar);
    else
      {
        if (really_expand)
          {
            if (lookup_attribute ("naked",
                                  DECL_ATTRIBUTES (current_function_decl)))
!             error ("cannot allocate stack for variable %q+D, naked function.",
                     var);
  
            expand_one_stack_var (origvar);
--- 1704,1717 ----
  	}
      }
    else if (defer_stack_allocation (var, toplevel))
!     add_stack_var (origvar, really_expand);
    else
      {
        if (really_expand)
          {
            if (lookup_attribute ("naked",
                                  DECL_ATTRIBUTES (current_function_decl)))
! 	    error ("cannot allocate stack for variable %q+D, naked function",
                     var);
  
            expand_one_stack_var (origvar);
*************** stack_protect_classify_type (tree type)
*** 1781,1787 ****
  	  || t == signed_char_type_node
  	  || t == unsigned_char_type_node)
  	{
! 	  unsigned HOST_WIDE_INT max = PARAM_VALUE (PARAM_SSP_BUFFER_SIZE);
  	  unsigned HOST_WIDE_INT len;
  
  	  if (!TYPE_SIZE_UNIT (type)
--- 1790,1796 ----
  	  || t == signed_char_type_node
  	  || t == unsigned_char_type_node)
  	{
! 	  unsigned HOST_WIDE_INT max = param_ssp_buffer_size;
  	  unsigned HOST_WIDE_INT len;
  
  	  if (!TYPE_SIZE_UNIT (type)
*************** asan_decl_phase_3 (size_t i)
*** 1882,1898 ****
  }
  
  /* Ensure that variables in different stack protection phases conflict
!    so that they are not merged and share the same stack slot.  */
  
! static void
  add_stack_protection_conflicts (void)
  {
    size_t i, j, n = stack_vars_num;
    unsigned char *phase;
  
    phase = XNEWVEC (unsigned char, n);
    for (i = 0; i < n; ++i)
!     phase[i] = stack_protect_decl_phase (stack_vars[i].decl);
  
    for (i = 0; i < n; ++i)
      {
--- 1891,1913 ----
  }
  
  /* Ensure that variables in different stack protection phases conflict
!    so that they are not merged and share the same stack slot.
!    Return true if there are any address taken variables.  */
  
! static bool
  add_stack_protection_conflicts (void)
  {
    size_t i, j, n = stack_vars_num;
    unsigned char *phase;
+   bool ret = false;
  
    phase = XNEWVEC (unsigned char, n);
    for (i = 0; i < n; ++i)
!     {
!       phase[i] = stack_protect_decl_phase (stack_vars[i].decl);
!       if (TREE_ADDRESSABLE (stack_vars[i].decl))
! 	ret = true;
!     }
  
    for (i = 0; i < n; ++i)
      {
*************** add_stack_protection_conflicts (void)
*** 1903,1908 ****
--- 1918,1924 ----
      }
  
    XDELETEVEC (phase);
+   return ret;
  }
  
  /* Create a decl for the guard at the top of the stack frame.  */
*************** estimated_stack_frame_size (struct cgrap
*** 1987,2036 ****
    return estimated_poly_value (size);
  }
  
- /* Helper routine to check if a record or union contains an array field. */
- 
- static int
- record_or_union_type_has_array_p (const_tree tree_type)
- {
-   tree fields = TYPE_FIELDS (tree_type);
-   tree f;
- 
-   for (f = fields; f; f = DECL_CHAIN (f))
-     if (TREE_CODE (f) == FIELD_DECL)
-       {
- 	tree field_type = TREE_TYPE (f);
- 	if (RECORD_OR_UNION_TYPE_P (field_type)
- 	    && record_or_union_type_has_array_p (field_type))
- 	  return 1;
- 	if (TREE_CODE (field_type) == ARRAY_TYPE)
- 	  return 1;
-       }
-   return 0;
- }
- 
- /* Check if the current function has local referenced variables that
-    have their addresses taken, contain an array, or are arrays.  */
- 
- static bool
- stack_protect_decl_p ()
- {
-   unsigned i;
-   tree var;
- 
-   FOR_EACH_LOCAL_DECL (cfun, i, var)
-     if (!is_global_var (var))
-       {
- 	tree var_type = TREE_TYPE (var);
- 	if (VAR_P (var)
- 	    && (TREE_CODE (var_type) == ARRAY_TYPE
- 		|| TREE_ADDRESSABLE (var)
- 		|| (RECORD_OR_UNION_TYPE_P (var_type)
- 		    && record_or_union_type_has_array_p (var_type))))
- 	  return true;
-       }
-   return false;
- }
- 
  /* Check if the current function has calls that use a return slot.  */
  
  static bool
--- 2003,2008 ----
*************** expand_used_vars (void)
*** 2097,2104 ****
      }
  
    if (flag_stack_protect == SPCT_FLAG_STRONG)
!       gen_stack_protect_signal
! 	= stack_protect_decl_p () || stack_protect_return_slot_p ();
  
    /* At this point all variables on the local_decls with TREE_USED
       set are not associated with any block scope.  Lay them out.  */
--- 2069,2075 ----
      }
  
    if (flag_stack_protect == SPCT_FLAG_STRONG)
!     gen_stack_protect_signal = stack_protect_return_slot_p ();
  
    /* At this point all variables on the local_decls with TREE_USED
       set are not associated with any block scope.  Lay them out.  */
*************** expand_used_vars (void)
*** 2174,2179 ****
--- 2145,2152 ----
  
    if (stack_vars_num > 0)
      {
+       bool has_addressable_vars = false;
+ 
        add_scope_conflicts ();
  
        /* If stack protection is enabled, we don't share space between
*************** expand_used_vars (void)
*** 2183,2189 ****
  	      || (flag_stack_protect == SPCT_FLAG_EXPLICIT
  		  && lookup_attribute ("stack_protect",
  				       DECL_ATTRIBUTES (current_function_decl)))))
! 	add_stack_protection_conflicts ();
  
        /* Now that we have collected all stack variables, and have computed a
  	 minimal interference graph, attempt to save some stack space.  */
--- 2156,2165 ----
  	      || (flag_stack_protect == SPCT_FLAG_EXPLICIT
  		  && lookup_attribute ("stack_protect",
  				       DECL_ATTRIBUTES (current_function_decl)))))
! 	has_addressable_vars = add_stack_protection_conflicts ();
! 
!       if (flag_stack_protect == SPCT_FLAG_STRONG && has_addressable_vars)
! 	gen_stack_protect_signal = true;
  
        /* Now that we have collected all stack variables, and have computed a
  	 minimal interference graph, attempt to save some stack space.  */
*************** expand_used_vars (void)
*** 2200,2213 ****
  
      case SPCT_FLAG_STRONG:
        if (gen_stack_protect_signal
! 	  || cfun->calls_alloca || has_protected_decls
  	  || lookup_attribute ("stack_protect",
  			       DECL_ATTRIBUTES (current_function_decl)))
  	create_stack_guard ();
        break;
  
      case SPCT_FLAG_DEFAULT:
!       if (cfun->calls_alloca || has_protected_decls
  	  || lookup_attribute ("stack_protect",
  			       DECL_ATTRIBUTES (current_function_decl)))
  	create_stack_guard ();
--- 2176,2191 ----
  
      case SPCT_FLAG_STRONG:
        if (gen_stack_protect_signal
! 	  || cfun->calls_alloca
! 	  || has_protected_decls
  	  || lookup_attribute ("stack_protect",
  			       DECL_ATTRIBUTES (current_function_decl)))
  	create_stack_guard ();
        break;
  
      case SPCT_FLAG_DEFAULT:
!       if (cfun->calls_alloca
! 	  || has_protected_decls
  	  || lookup_attribute ("stack_protect",
  			       DECL_ATTRIBUTES (current_function_decl)))
  	create_stack_guard ();
*************** expand_used_vars (void)
*** 2218,2231 ****
  			    DECL_ATTRIBUTES (current_function_decl)))
  	create_stack_guard ();
        break;
      default:
!       ;
      }
  
    /* Assign rtl to each variable based on these partitions.  */
    if (stack_vars_num > 0)
      {
!       struct stack_vars_data data;
  
        data.asan_base = NULL_RTX;
        data.asan_alignb = 0;
--- 2196,2210 ----
  			    DECL_ATTRIBUTES (current_function_decl)))
  	create_stack_guard ();
        break;
+ 
      default:
!       break;
      }
  
    /* Assign rtl to each variable based on these partitions.  */
    if (stack_vars_num > 0)
      {
!       class stack_vars_data data;
  
        data.asan_base = NULL_RTX;
        data.asan_alignb = 0;
*************** tree_conflicts_with_clobbers_p (tree t,
*** 2840,2846 ****
  
    if (overlap)
      {
!       error ("asm-specifier for variable %qE conflicts with asm clobber list",
  	     DECL_NAME (overlap));
  
        /* Reset registerness to stop multiple errors emitted for a single
--- 2819,2826 ----
  
    if (overlap)
      {
!       error ("%<asm%> specifier for variable %qE conflicts with "
! 	     "%<asm%> clobber list",
  	     DECL_NAME (overlap));
  
        /* Reset registerness to stop multiple errors emitted for a single
*************** asm_clobber_reg_is_valid (int regno, int
*** 2874,2879 ****
--- 2854,2868 ----
        error ("PIC register clobbered by %qs in %<asm%>", regname);
        is_valid = false;
      }
+   else if (!in_hard_reg_set_p
+ 	   (accessible_reg_set, reg_raw_mode[regno], regno))
+     {
+       /* ??? Diagnose during gimplification?  */
+       error ("the register %qs cannot be clobbered in %<asm%>"
+ 	     " for the current target", regname);
+       is_valid = false;
+     }
+ 
    /* Clobbering the stack pointer register is deprecated.  GCC expects
       the value of the stack pointer after an asm statement to be the same
       as it was before, so no asm can validly clobber the stack pointer in
*************** expand_asm_stmt (gasm *stmt)
*** 3029,3035 ****
  	      }
  	}
      }
-   unsigned nclobbers = clobber_rvec.length();
  
    /* First pass over inputs and outputs checks validity and sets
       mark_addressable if needed.  */
--- 3018,3023 ----
*************** expand_asm_stmt (gasm *stmt)
*** 3253,3259 ****
  	  if (allows_reg && TYPE_MODE (type) != BLKmode)
  	    op = force_reg (TYPE_MODE (type), op);
  	  else if (!allows_mem)
! 	    warning (0, "asm operand %d probably doesn%'t match constraints",
  		     i + noutputs);
  	  else if (MEM_P (op))
  	    {
--- 3241,3248 ----
  	  if (allows_reg && TYPE_MODE (type) != BLKmode)
  	    op = force_reg (TYPE_MODE (type), op);
  	  else if (!allows_mem)
! 	    warning (0, "%<asm%> operand %d probably does not match "
! 		     "constraints",
  		     i + noutputs);
  	  else if (MEM_P (op))
  	    {
*************** expand_asm_stmt (gasm *stmt)
*** 3301,3307 ****
    gcc_assert (constraints.length() == noutputs + ninputs);
  
    /* But it certainly can adjust the clobbers.  */
!   nclobbers = clobber_rvec.length();
  
    /* Third pass checks for easy conflicts.  */
    /* ??? Why are we doing this on trees instead of rtx.  */
--- 3290,3296 ----
    gcc_assert (constraints.length() == noutputs + ninputs);
  
    /* But it certainly can adjust the clobbers.  */
!   unsigned nclobbers = clobber_rvec.length ();
  
    /* Third pass checks for easy conflicts.  */
    /* ??? Why are we doing this on trees instead of rtx.  */
*************** expand_asm_stmt (gasm *stmt)
*** 3436,3446 ****
  		 tripping over the under-construction body.  */
  	      for (unsigned k = 0; k < noutputs; ++k)
  		if (reg_overlap_mentioned_p (clobbered_reg, output_rvec[k]))
! 		  internal_error ("asm clobber conflict with output operand");
  
  	      for (unsigned k = 0; k < ninputs - ninout; ++k)
  		if (reg_overlap_mentioned_p (clobbered_reg, input_rvec[k]))
! 		  internal_error ("asm clobber conflict with input operand");
  	    }
  
  	  XVECEXP (body, 0, i++) = gen_rtx_CLOBBER (VOIDmode, clobbered_reg);
--- 3425,3437 ----
  		 tripping over the under-construction body.  */
  	      for (unsigned k = 0; k < noutputs; ++k)
  		if (reg_overlap_mentioned_p (clobbered_reg, output_rvec[k]))
! 		  internal_error ("%<asm%> clobber conflict with "
! 				  "output operand");
  
  	      for (unsigned k = 0; k < ninputs - ninout; ++k)
  		if (reg_overlap_mentioned_p (clobbered_reg, input_rvec[k]))
! 		  internal_error ("%<asm%> clobber conflict with "
! 				  "input operand");
  	    }
  
  	  XVECEXP (body, 0, i++) = gen_rtx_CLOBBER (VOIDmode, clobbered_reg);
*************** expand_gimple_stmt_1 (gimple *stmt)
*** 3695,3700 ****
--- 3686,3697 ----
        {
  	op0 = gimple_return_retval (as_a <greturn *> (stmt));
  
+ 	/* If a return doesn't have a location, it very likely represents
+ 	   multiple user returns so we cannot let it inherit the location
+ 	   of the last statement of the previous basic block in RTL.  */
+ 	if (!gimple_has_location (stmt))
+ 	  set_curr_insn_location (cfun->function_end_locus);
+ 
  	if (op0 && op0 != error_mark_node)
  	  {
  	    tree result = DECL_RESULT (current_function_decl);
*************** expand_gimple_stmt (gimple *stmt)
*** 3866,3872 ****
  	      /* If we want exceptions for non-call insns, any
  		 may_trap_p instruction may throw.  */
  	      && GET_CODE (PATTERN (insn)) != CLOBBER
- 	      && GET_CODE (PATTERN (insn)) != CLOBBER_HIGH
  	      && GET_CODE (PATTERN (insn)) != USE
  	      && insn_could_throw_p (insn))
  	    make_reg_eh_region_note (insn, 0, lp_nr);
--- 3863,3868 ----
*************** expand_debug_expr (tree exp)
*** 5167,5172 ****
--- 5163,5169 ----
      case VEC_PERM_EXPR:
      case VEC_DUPLICATE_EXPR:
      case VEC_SERIES_EXPR:
+     case SAD_EXPR:
        return NULL;
  
      /* Misc codes.  */
*************** construct_init_block (void)
*** 5979,5989 ****
      {
        first_block = e->dest;
        redirect_edge_succ (e, init_block);
!       e = make_single_succ_edge (init_block, first_block, flags);
      }
    else
!     e = make_single_succ_edge (init_block, EXIT_BLOCK_PTR_FOR_FN (cfun),
! 			       EDGE_FALLTHRU);
  
    update_bb_for_insn (init_block);
    return init_block;
--- 5976,5986 ----
      {
        first_block = e->dest;
        redirect_edge_succ (e, init_block);
!       make_single_succ_edge (init_block, first_block, flags);
      }
    else
!     make_single_succ_edge (init_block, EXIT_BLOCK_PTR_FOR_FN (cfun),
! 			   EDGE_FALLTHRU);
  
    update_bb_for_insn (init_block);
    return init_block;
*************** discover_nonconstant_array_refs_r (tree
*** 6110,6115 ****
--- 6107,6127 ----
  
        *walk_subtrees = 0;
      }
+   /* References of size POLY_INT_CST to a fixed-size object must go
+      through memory.  It's more efficient to force that here than
+      to create temporary slots on the fly.  */
+   else if ((TREE_CODE (t) == MEM_REF || TREE_CODE (t) == TARGET_MEM_REF)
+ 	   && TYPE_SIZE (TREE_TYPE (t))
+ 	   && POLY_INT_CST_P (TYPE_SIZE (TREE_TYPE (t))))
+     {
+       tree base = get_base_address (t);
+       if (base
+ 	  && DECL_P (base)
+ 	  && DECL_MODE (base) != BLKmode
+ 	  && GET_MODE_SIZE (DECL_MODE (base)).is_constant ())
+ 	TREE_ADDRESSABLE (base) = 1;
+       *walk_subtrees = 0;
+     }
  
    return NULL_TREE;
  }
*************** discover_nonconstant_array_refs (void)
*** 6130,6136 ****
        {
  	gimple *stmt = gsi_stmt (gsi);
  	if (!is_gimple_debug (stmt))
! 	  walk_gimple_op (stmt, discover_nonconstant_array_refs_r, NULL);
        }
  }
  
--- 6142,6165 ----
        {
  	gimple *stmt = gsi_stmt (gsi);
  	if (!is_gimple_debug (stmt))
! 	  {
! 	    walk_gimple_op (stmt, discover_nonconstant_array_refs_r, NULL);
! 	    gcall *call = dyn_cast <gcall *> (stmt);
! 	    if (call && gimple_call_internal_p (call))
! 	      switch (gimple_call_internal_fn (call))
! 		{
! 		case IFN_LOAD_LANES:
! 		  /* The source must be a MEM.  */
! 		  mark_addressable (gimple_call_arg (call, 0));
! 		  break;
! 		case IFN_STORE_LANES:
! 		  /* The destination must be a MEM.  */
! 		  mark_addressable (gimple_call_lhs (call));
! 		  break;
! 		default:
! 		  break;
! 		}
! 	  }
        }
  }
  
*************** pass_expand::execute (function *fun)
*** 6328,6333 ****
--- 6357,6365 ----
  	    avoid_deep_ter_for_debug (gsi_stmt (gsi), 0);
      }
  
+   /* Mark arrays indexed with non-constant indices with TREE_ADDRESSABLE.  */
+   discover_nonconstant_array_refs ();
+ 
    /* Make sure all values used by the optimization passes have sane
       defaults.  */
    reg_renumber = 0;
*************** pass_expand::execute (function *fun)
*** 6362,6370 ****
       Also, final expects a note to appear there.  */
    emit_note (NOTE_INSN_DELETED);
  
-   /* Mark arrays indexed with non-constant indices with TREE_ADDRESSABLE.  */
-   discover_nonconstant_array_refs ();
- 
    targetm.expand_to_rtl_hook ();
    crtl->init_stack_alignment ();
    fun->cfg->max_jumptable_ents = 0;
--- 6394,6399 ----
*************** pass_expand::execute (function *fun)
*** 6394,6400 ****
  	warning (OPT_Wstack_protector,
  		 "stack protector not protecting function: "
  		 "all local arrays are less than %d bytes long",
! 		 (int) PARAM_VALUE (PARAM_SSP_BUFFER_SIZE));
      }
  
    /* Set up parameters and prepare for return, for the function.  */
--- 6423,6429 ----
  	warning (OPT_Wstack_protector,
  		 "stack protector not protecting function: "
  		 "all local arrays are less than %d bytes long",
! 		 (int) param_ssp_buffer_size);
      }
  
    /* Set up parameters and prepare for return, for the function.  */
*************** pass_expand::execute (function *fun)
*** 6504,6510 ****
  
    /* If the function has too many markers, drop them while expanding.  */
    if (cfun->debug_marker_count
!       >= PARAM_VALUE (PARAM_MAX_DEBUG_MARKER_COUNT))
      cfun->debug_nonbind_markers = false;
  
    lab_rtx_for_bb = new hash_map<basic_block, rtx_code_label *>;
--- 6533,6539 ----
  
    /* If the function has too many markers, drop them while expanding.  */
    if (cfun->debug_marker_count
!       >= param_max_debug_marker_count)
      cfun->debug_nonbind_markers = false;
  
    lab_rtx_for_bb = new hash_map<basic_block, rtx_code_label *>;
*************** pass_expand::execute (function *fun)
*** 6559,6595 ****
       split edges which edge insertions might do.  */
    rebuild_jump_labels (get_insns ());
  
!   FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR_FOR_FN (fun),
! 		  EXIT_BLOCK_PTR_FOR_FN (fun), next_bb)
      {
!       edge e;
!       edge_iterator ei;
!       for (ei = ei_start (bb->succs); (e = ei_safe_edge (ei)); )
  	{
! 	  if (e->insns.r)
! 	    {
! 	      rebuild_jump_labels_chain (e->insns.r);
! 	      /* Put insns after parm birth, but before
! 		 NOTE_INSNS_FUNCTION_BEG.  */
! 	      if (e->src == ENTRY_BLOCK_PTR_FOR_FN (fun)
! 		  && single_succ_p (ENTRY_BLOCK_PTR_FOR_FN (fun)))
! 		{
! 		  rtx_insn *insns = e->insns.r;
! 		  e->insns.r = NULL;
! 		  if (NOTE_P (parm_birth_insn)
! 		      && NOTE_KIND (parm_birth_insn) == NOTE_INSN_FUNCTION_BEG)
! 		    emit_insn_before_noloc (insns, parm_birth_insn, e->dest);
! 		  else
! 		    emit_insn_after_noloc (insns, parm_birth_insn, e->dest);
! 		}
! 	      else
! 		commit_one_edge_insertion (e);
! 	    }
  	  else
! 	    ei_next (&ei);
  	}
      }
  
    /* We're done expanding trees to RTL.  */
    currently_expanding_to_rtl = 0;
  
--- 6588,6614 ----
       split edges which edge insertions might do.  */
    rebuild_jump_labels (get_insns ());
  
!   /* If we have a single successor to the entry block, put the pending insns
!      after parm birth, but before NOTE_INSNS_FUNCTION_BEG.  */
!   if (single_succ_p (ENTRY_BLOCK_PTR_FOR_FN (fun)))
      {
!       edge e = single_succ_edge (ENTRY_BLOCK_PTR_FOR_FN (fun));
!       if (e->insns.r)
  	{
! 	  rtx_insn *insns = e->insns.r;
! 	  e->insns.r = NULL;
! 	  rebuild_jump_labels_chain (insns);
! 	  if (NOTE_P (parm_birth_insn)
! 	      && NOTE_KIND (parm_birth_insn) == NOTE_INSN_FUNCTION_BEG)
! 	    emit_insn_before_noloc (insns, parm_birth_insn, e->dest);
  	  else
! 	    emit_insn_after_noloc (insns, parm_birth_insn, e->dest);
  	}
      }
  
+   /* Otherwise, as well as for other edges, take the usual way.  */
+   commit_edge_insertions ();
+ 
    /* We're done expanding trees to RTL.  */
    currently_expanding_to_rtl = 0;
  
*************** pass_expand::execute (function *fun)
*** 6637,6643 ****
    if (crtl->tail_call_emit)
      fixup_tail_calls ();
  
!   /* BB subdivision may have created basic blocks that are are only reachable
       from unlikely bbs but not marked as such in the profile.  */
    if (optimize)
      propagate_unlikely_bbs_forward ();
--- 6656,6662 ----
    if (crtl->tail_call_emit)
      fixup_tail_calls ();
  
!   /* BB subdivision may have created basic blocks that are only reachable
       from unlikely bbs but not marked as such in the profile.  */
    if (optimize)
      propagate_unlikely_bbs_forward ();
diff -Nrcpad gcc-9.3.0/gcc/cfgexpand.h gcc-10.1.0/gcc/cfgexpand.h
*** gcc-9.3.0/gcc/cfgexpand.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfgexpand.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Header file for lowering trees to RTL.
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Header file for lowering trees to RTL.
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/cfghooks.c gcc-10.1.0/gcc/cfghooks.c
*** gcc-9.3.0/gcc/cfghooks.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfghooks.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Hooks for cfg representation specific functions.
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
     Contributed by Sebastian Pop <s.pop@laposte.net>
  
  This file is part of GCC.
--- 1,5 ----
  /* Hooks for cfg representation specific functions.
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
     Contributed by Sebastian Pop <s.pop@laposte.net>
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 32,37 ****
--- 32,43 ----
  #include "tree-ssa.h"
  #include "cfgloop.h"
  
+ /* Disable warnings about missing quoting in GCC diagnostics.  */
+ #if __GNUC__ >= 10
+ #  pragma GCC diagnostic push
+ #  pragma GCC diagnostic ignored "-Wformat-diag"
+ #endif
+ 
  /* A pointer to one of the hooks containers.  */
  static struct cfg_hooks *cfg_hooks;
  
*************** verify_flow_info (void)
*** 147,153 ****
  	  err = 1;
  	}
        /* FIXME: Graphite and SLJL and target code still tends to produce
! 	 edges with no probablity.  */
        if (profile_status_for_fn (cfun) >= PROFILE_GUESSED
            && !bb->count.initialized_p () && !flag_graphite && 0)
  	{
--- 153,159 ----
  	  err = 1;
  	}
        /* FIXME: Graphite and SLJL and target code still tends to produce
! 	 edges with no probability.  */
        if (profile_status_for_fn (cfun) >= PROFILE_GUESSED
            && !bb->count.initialized_p () && !flag_graphite && 0)
  	{
*************** verify_flow_info (void)
*** 164,170 ****
  	      err = 1;
  	    }
  	  /* FIXME: Graphite and SLJL and target code still tends to produce
! 	     edges with no probablity.  */
  	  if (profile_status_for_fn (cfun) >= PROFILE_GUESSED
  	      && !e->probability.initialized_p () && !flag_graphite && 0)
  	    {
--- 170,176 ----
  	      err = 1;
  	    }
  	  /* FIXME: Graphite and SLJL and target code still tends to produce
! 	     edges with no probability.  */
  	  if (profile_status_for_fn (cfun) >= PROFILE_GUESSED
  	      && !e->probability.initialized_p () && !flag_graphite && 0)
  	    {
*************** verify_flow_info (void)
*** 253,260 ****
  	err = 1;
        }
  
-   last_bb_seen = ENTRY_BLOCK_PTR_FOR_FN (cfun);
- 
    /* Clean up.  */
    free (last_visited);
    free (edge_checksum);
--- 259,264 ----
*************** redirect_edge_and_branch_force (edge e,
*** 492,498 ****
      {
        if (ret != NULL)
  	{
! 	  struct loop *loop
  	    = find_common_loop (single_pred (ret)->loop_father,
  				single_succ (ret)->loop_father);
  	  add_bb_to_loop (ret, loop);
--- 496,502 ----
      {
        if (ret != NULL)
  	{
! 	  class loop *loop
  	    = find_common_loop (single_pred (ret)->loop_father,
  				single_succ (ret)->loop_father);
  	  add_bb_to_loop (ret, loop);
*************** delete_basic_block (basic_block bb)
*** 600,606 ****
  
    if (current_loops != NULL)
      {
!       struct loop *loop = bb->loop_father;
  
        /* If we remove the header or the latch of a loop, mark the loop for
  	 removal.  */
--- 604,610 ----
  
    if (current_loops != NULL)
      {
!       class loop *loop = bb->loop_father;
  
        /* If we remove the header or the latch of a loop, mark the loop for
  	 removal.  */
*************** split_edge (edge e)
*** 636,642 ****
    profile_count count = e->count ();
    edge f;
    bool irr = (e->flags & EDGE_IRREDUCIBLE_LOOP) != 0;
!   struct loop *loop;
    basic_block src = e->src, dest = e->dest;
  
    if (!cfg_hooks->split_edge)
--- 640,646 ----
    profile_count count = e->count ();
    edge f;
    bool irr = (e->flags & EDGE_IRREDUCIBLE_LOOP) != 0;
!   class loop *loop;
    basic_block src = e->src, dest = e->dest;
  
    if (!cfg_hooks->split_edge)
*************** make_forwarder_block (basic_block bb, bo
*** 866,872 ****
    edge e, fallthru;
    edge_iterator ei;
    basic_block dummy, jump;
!   struct loop *loop, *ploop, *cloop;
  
    if (!cfg_hooks->make_forwarder_block)
      internal_error ("%s does not support make_forwarder_block",
--- 870,876 ----
    edge e, fallthru;
    edge_iterator ei;
    basic_block dummy, jump;
!   class loop *loop, *ploop, *cloop;
  
    if (!cfg_hooks->make_forwarder_block)
      internal_error ("%s does not support make_forwarder_block",
*************** force_nonfallthru (edge e)
*** 1031,1037 ****
  	{
  	  basic_block pred = single_pred (ret);
  	  basic_block succ = single_succ (ret);
! 	  struct loop *loop
  	    = find_common_loop (pred->loop_father, succ->loop_father);
  	  rescan_loop_exit (e, false, true);
  	  add_bb_to_loop (ret, loop);
--- 1035,1041 ----
  	{
  	  basic_block pred = single_pred (ret);
  	  basic_block succ = single_succ (ret);
! 	  class loop *loop
  	    = find_common_loop (pred->loop_father, succ->loop_father);
  	  rescan_loop_exit (e, false, true);
  	  add_bb_to_loop (ret, loop);
*************** duplicate_block (basic_block bb, edge e,
*** 1114,1121 ****
       of BB if the loop is not being copied.  */
    if (current_loops != NULL)
      {
!       struct loop *cloop = bb->loop_father;
!       struct loop *copy = get_loop_copy (cloop);
        /* If we copied the loop header block but not the loop
  	 we have created a loop with multiple entries.  Ditch the loop,
  	 add the new block to the outer loop and arrange for a fixup.  */
--- 1118,1125 ----
       of BB if the loop is not being copied.  */
    if (current_loops != NULL)
      {
!       class loop *cloop = bb->loop_father;
!       class loop *copy = get_loop_copy (cloop);
        /* If we copied the loop header block but not the loop
  	 we have created a loop with multiple entries.  Ditch the loop,
  	 add the new block to the outer loop and arrange for a fixup.  */
*************** lv_flush_pending_stmts (edge e)
*** 1224,1230 ****
     a need to call the tree_duplicate_loop_to_header_edge rather
     than duplicate_loop_to_header_edge when we are in tree mode.  */
  bool
! cfg_hook_duplicate_loop_to_header_edge (struct loop *loop, edge e,
  					unsigned int ndupl,
  					sbitmap wont_exit, edge orig,
  					vec<edge> *to_remove,
--- 1228,1234 ----
     a need to call the tree_duplicate_loop_to_header_edge rather
     than duplicate_loop_to_header_edge when we are in tree mode.  */
  bool
! cfg_hook_duplicate_loop_to_header_edge (class loop *loop, edge e,
  					unsigned int ndupl,
  					sbitmap wont_exit, edge orig,
  					vec<edge> *to_remove,
*************** end:
*** 1332,1338 ****
  void
  copy_bbs (basic_block *bbs, unsigned n, basic_block *new_bbs,
  	  edge *edges, unsigned num_edges, edge *new_edges,
! 	  struct loop *base, basic_block after, bool update_dominance)
  {
    unsigned i, j;
    basic_block bb, new_bb, dom_bb;
--- 1336,1342 ----
  void
  copy_bbs (basic_block *bbs, unsigned n, basic_block *new_bbs,
  	  edge *edges, unsigned num_edges, edge *new_edges,
! 	  class loop *base, basic_block after, bool update_dominance)
  {
    unsigned i, j;
    basic_block bb, new_bb, dom_bb;
*************** profile_record_account_profile (profile_
*** 1491,1493 ****
--- 1495,1501 ----
        cfg_hooks->account_profile_record (bb, record);
     }
  }
+ 
+ #if __GNUC__ >= 10
+ #  pragma GCC diagnostic pop
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/cfghooks.h gcc-10.1.0/gcc/cfghooks.h
*** gcc-9.3.0/gcc/cfghooks.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfghooks.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Hooks for cfg representation specific functions.
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
     Contributed by Sebastian Pop <s.pop@laposte.net>
  
  This file is part of GCC.
--- 1,5 ----
  /* Hooks for cfg representation specific functions.
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
     Contributed by Sebastian Pop <s.pop@laposte.net>
  
  This file is part of GCC.
*************** typedef int_hash <unsigned short, 0> dep
*** 58,65 ****
  
  /* Optional data for duplicate_block.   */
  
! struct copy_bb_data
  {
    copy_bb_data() : dependence_map (NULL) {}
    ~copy_bb_data () { delete dependence_map; }
  
--- 58,66 ----
  
  /* Optional data for duplicate_block.   */
  
! class copy_bb_data
  {
+ public:
    copy_bb_data() : dependence_map (NULL) {}
    ~copy_bb_data () { delete dependence_map; }
  
*************** struct cfg_hooks
*** 165,171 ****
  
    /* A hook for duplicating loop in CFG, currently this is used
       in loop versioning.  */
!   bool (*cfg_hook_duplicate_loop_to_header_edge) (struct loop *, edge,
  						  unsigned, sbitmap,
  						  edge, vec<edge> *,
  						  int);
--- 166,172 ----
  
    /* A hook for duplicating loop in CFG, currently this is used
       in loop versioning.  */
!   bool (*cfg_hook_duplicate_loop_to_header_edge) (class loop *, edge,
  						  unsigned, sbitmap,
  						  edge, vec<edge> *,
  						  int);
*************** extern bool block_ends_with_condjump_p (
*** 249,255 ****
  extern int flow_call_edges_add (sbitmap);
  extern void execute_on_growing_pred (edge);
  extern void execute_on_shrinking_pred (edge);
! extern bool cfg_hook_duplicate_loop_to_header_edge (struct loop *loop, edge,
  						    unsigned int ndupl,
  						    sbitmap wont_exit,
  						    edge orig,
--- 250,256 ----
  extern int flow_call_edges_add (sbitmap);
  extern void execute_on_growing_pred (edge);
  extern void execute_on_shrinking_pred (edge);
! extern bool cfg_hook_duplicate_loop_to_header_edge (class loop *loop, edge,
  						    unsigned int ndupl,
  						    sbitmap wont_exit,
  						    edge orig,
*************** extern void lv_add_condition_to_bb (basi
*** 265,271 ****
  
  extern bool can_copy_bbs_p (basic_block *, unsigned);
  extern void copy_bbs (basic_block *, unsigned, basic_block *,
! 		      edge *, unsigned, edge *, struct loop *,
  		      basic_block, bool);
  
  void profile_record_check_consistency (profile_record *);
--- 266,272 ----
  
  extern bool can_copy_bbs_p (basic_block *, unsigned);
  extern void copy_bbs (basic_block *, unsigned, basic_block *,
! 		      edge *, unsigned, edge *, class loop *,
  		      basic_block, bool);
  
  void profile_record_check_consistency (profile_record *);
diff -Nrcpad gcc-9.3.0/gcc/cfgloop.c gcc-10.1.0/gcc/cfgloop.c
*** gcc-9.3.0/gcc/cfgloop.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfgloop.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Natural loop discovery code for GNU compiler.
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Natural loop discovery code for GNU compiler.
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** flow_loops_cfg_dump (FILE *file)
*** 59,65 ****
  /* Return nonzero if the nodes of LOOP are a subset of OUTER.  */
  
  bool
! flow_loop_nested_p (const struct loop *outer, const struct loop *loop)
  {
    unsigned odepth = loop_depth (outer);
  
--- 59,65 ----
  /* Return nonzero if the nodes of LOOP are a subset of OUTER.  */
  
  bool
! flow_loop_nested_p (const class loop *outer, const class loop *loop)
  {
    unsigned odepth = loop_depth (outer);
  
*************** flow_loop_nested_p (const struct loop *o
*** 70,77 ****
  /* Returns the loop such that LOOP is nested DEPTH (indexed from zero)
     loops within LOOP.  */
  
! struct loop *
! superloop_at_depth (struct loop *loop, unsigned depth)
  {
    unsigned ldepth = loop_depth (loop);
  
--- 70,77 ----
  /* Returns the loop such that LOOP is nested DEPTH (indexed from zero)
     loops within LOOP.  */
  
! class loop *
! superloop_at_depth (class loop *loop, unsigned depth)
  {
    unsigned ldepth = loop_depth (loop);
  
*************** superloop_at_depth (struct loop *loop, u
*** 86,92 ****
  /* Returns the list of the latch edges of LOOP.  */
  
  static vec<edge> 
! get_loop_latch_edges (const struct loop *loop)
  {
    edge_iterator ei;
    edge e;
--- 86,92 ----
  /* Returns the list of the latch edges of LOOP.  */
  
  static vec<edge> 
! get_loop_latch_edges (const class loop *loop)
  {
    edge_iterator ei;
    edge e;
*************** get_loop_latch_edges (const struct loop
*** 105,112 ****
     using auxiliary dump callback function LOOP_DUMP_AUX if non null.  */
  
  void
! flow_loop_dump (const struct loop *loop, FILE *file,
! 		void (*loop_dump_aux) (const struct loop *, FILE *, int),
  		int verbose)
  {
    basic_block *bbs;
--- 105,112 ----
     using auxiliary dump callback function LOOP_DUMP_AUX if non null.  */
  
  void
! flow_loop_dump (const class loop *loop, FILE *file,
! 		void (*loop_dump_aux) (const class loop *, FILE *, int),
  		int verbose)
  {
    basic_block *bbs;
*************** flow_loop_dump (const struct loop *loop,
*** 160,168 ****
     using auxiliary dump callback function LOOP_DUMP_AUX if non null.  */
  
  void
! flow_loops_dump (FILE *file, void (*loop_dump_aux) (const struct loop *, FILE *, int), int verbose)
  {
!   struct loop *loop;
  
    if (!current_loops || ! file)
      return;
--- 160,168 ----
     using auxiliary dump callback function LOOP_DUMP_AUX if non null.  */
  
  void
! flow_loops_dump (FILE *file, void (*loop_dump_aux) (const class loop *, FILE *, int), int verbose)
  {
!   class loop *loop;
  
    if (!current_loops || ! file)
      return;
*************** flow_loops_dump (FILE *file, void (*loop
*** 181,187 ****
  /* Free data allocated for LOOP.  */
  
  void
! flow_loop_free (struct loop *loop)
  {
    struct loop_exit *exit, *next;
  
--- 181,187 ----
  /* Free data allocated for LOOP.  */
  
  void
! flow_loop_free (class loop *loop)
  {
    struct loop_exit *exit, *next;
  
*************** flow_loops_free (struct loops *loops)
*** 229,235 ****
     Return the number of nodes within the loop.  */
  
  int
! flow_loop_nodes_find (basic_block header, struct loop *loop)
  {
    vec<basic_block> stack = vNULL;
    int num_nodes = 1;
--- 229,235 ----
     Return the number of nodes within the loop.  */
  
  int
! flow_loop_nodes_find (basic_block header, class loop *loop)
  {
    vec<basic_block> stack = vNULL;
    int num_nodes = 1;
*************** flow_loop_nodes_find (basic_block header
*** 278,284 ****
     superloop is FATHER.  */
  
  static void
! establish_preds (struct loop *loop, struct loop *father)
  {
    loop_p ploop;
    unsigned depth = loop_depth (father) + 1;
--- 278,284 ----
     superloop is FATHER.  */
  
  static void
! establish_preds (class loop *loop, class loop *father)
  {
    loop_p ploop;
    unsigned depth = loop_depth (father) + 1;
*************** establish_preds (struct loop *loop, stru
*** 302,309 ****
     of FATHERs siblings.  */
  
  void
! flow_loop_tree_node_add (struct loop *father, struct loop *loop,
! 			 struct loop *after)
  {
    if (after)
      {
--- 302,309 ----
     of FATHERs siblings.  */
  
  void
! flow_loop_tree_node_add (class loop *father, class loop *loop,
! 			 class loop *after)
  {
    if (after)
      {
*************** flow_loop_tree_node_add (struct loop *fa
*** 322,330 ****
  /* Remove LOOP from the loop hierarchy tree.  */
  
  void
! flow_loop_tree_node_remove (struct loop *loop)
  {
!   struct loop *prev, *father;
  
    father = loop_outer (loop);
  
--- 322,330 ----
  /* Remove LOOP from the loop hierarchy tree.  */
  
  void
! flow_loop_tree_node_remove (class loop *loop)
  {
!   class loop *prev, *father;
  
    father = loop_outer (loop);
  
*************** flow_loop_tree_node_remove (struct loop
*** 343,352 ****
  
  /* Allocates and returns new loop structure.  */
  
! struct loop *
  alloc_loop (void)
  {
!   struct loop *loop = ggc_cleared_alloc<struct loop> ();
  
    loop->exits = ggc_cleared_alloc<loop_exit> ();
    loop->exits->next = loop->exits->prev = loop->exits;
--- 343,352 ----
  
  /* Allocates and returns new loop structure.  */
  
! class loop *
  alloc_loop (void)
  {
!   class loop *loop = ggc_cleared_alloc<class loop> ();
  
    loop->exits = ggc_cleared_alloc<loop_exit> ();
    loop->exits->next = loop->exits->prev = loop->exits;
*************** void
*** 365,371 ****
  init_loops_structure (struct function *fn,
  		      struct loops *loops, unsigned num_loops)
  {
!   struct loop *root;
  
    memset (loops, 0, sizeof *loops);
    vec_alloc (loops->larray, num_loops);
--- 365,371 ----
  init_loops_structure (struct function *fn,
  		      struct loops *loops, unsigned num_loops)
  {
!   class loop *root;
  
    memset (loops, 0, sizeof *loops);
    vec_alloc (loops->larray, num_loops);
*************** flow_loops_find (struct loops *loops)
*** 460,466 ****
        basic_block header = BASIC_BLOCK_FOR_FN (cfun, rc_order[b]);
        if (bb_loop_header_p (header))
  	{
! 	  struct loop *loop;
  
  	  /* The current active loop tree has valid loop-fathers for
  	     header blocks.  */
--- 460,466 ----
        basic_block header = BASIC_BLOCK_FOR_FN (cfun, rc_order[b]);
        if (bb_loop_header_p (header))
  	{
! 	  class loop *loop;
  
  	  /* The current active loop tree has valid loop-fathers for
  	     header blocks.  */
*************** flow_loops_find (struct loops *loops)
*** 503,509 ****
       and assign basic-block ownership.  */
    for (i = 0; i < larray.length (); ++i)
      {
!       struct loop *loop = larray[i];
        basic_block header = loop->header;
        edge_iterator ei;
        edge e;
--- 503,509 ----
       and assign basic-block ownership.  */
    for (i = 0; i < larray.length (); ++i)
      {
!       class loop *loop = larray[i];
        basic_block header = loop->header;
        edge_iterator ei;
        edge e;
*************** static int *sort_sibling_loops_cmp_rpo;
*** 539,546 ****
  static int
  sort_sibling_loops_cmp (const void *la_, const void *lb_)
  {
!   const struct loop *la = *(const struct loop * const *)la_;
!   const struct loop *lb = *(const struct loop * const *)lb_;
    return (sort_sibling_loops_cmp_rpo[la->header->index]
  	  - sort_sibling_loops_cmp_rpo[lb->header->index]);
  }
--- 539,546 ----
  static int
  sort_sibling_loops_cmp (const void *la_, const void *lb_)
  {
!   const class loop *la = *(const class loop * const *)la_;
!   const class loop *lb = *(const class loop * const *)lb_;
    return (sort_sibling_loops_cmp_rpo[la->header->index]
  	  - sort_sibling_loops_cmp_rpo[lb->header->index]);
  }
*************** find_subloop_latch_edge_by_profile (vec<
*** 643,649 ****
     another edge.  */
  
  static edge
! find_subloop_latch_edge_by_ivs (struct loop *loop ATTRIBUTE_UNUSED, vec<edge> latches)
  {
    edge e, latch = latches[0];
    unsigned i;
--- 643,649 ----
     another edge.  */
  
  static edge
! find_subloop_latch_edge_by_ivs (class loop *loop ATTRIBUTE_UNUSED, vec<edge> latches)
  {
    edge e, latch = latches[0];
    unsigned i;
*************** find_subloop_latch_edge_by_ivs (struct l
*** 695,701 ****
     returns NULL.  */
  
  static edge
! find_subloop_latch_edge (struct loop *loop)
  {
    vec<edge> latches = get_loop_latch_edges (loop);
    edge latch = NULL;
--- 695,701 ----
     returns NULL.  */
  
  static edge
! find_subloop_latch_edge (class loop *loop)
  {
    vec<edge> latches = get_loop_latch_edges (loop);
    edge latch = NULL;
*************** mfb_redirect_edges_in_set (edge e)
*** 729,739 ****
  /* Creates a subloop of LOOP with latch edge LATCH.  */
  
  static void
! form_subloop (struct loop *loop, edge latch)
  {
    edge_iterator ei;
    edge e, new_entry;
!   struct loop *new_loop;
  
    mfb_reis_set = new hash_set<edge>;
    FOR_EACH_EDGE (e, ei, loop->header->preds)
--- 729,739 ----
  /* Creates a subloop of LOOP with latch edge LATCH.  */
  
  static void
! form_subloop (class loop *loop, edge latch)
  {
    edge_iterator ei;
    edge e, new_entry;
!   class loop *new_loop;
  
    mfb_reis_set = new hash_set<edge>;
    FOR_EACH_EDGE (e, ei, loop->header->preds)
*************** form_subloop (struct loop *loop, edge la
*** 759,765 ****
     a new latch of LOOP.  */
  
  static void
! merge_latch_edges (struct loop *loop)
  {
    vec<edge> latches = get_loop_latch_edges (loop);
    edge latch, e;
--- 759,765 ----
     a new latch of LOOP.  */
  
  static void
! merge_latch_edges (class loop *loop)
  {
    vec<edge> latches = get_loop_latch_edges (loop);
    edge latch, e;
*************** merge_latch_edges (struct loop *loop)
*** 792,798 ****
     loops with single latch edge.  */
  
  static void
! disambiguate_multiple_latches (struct loop *loop)
  {
    edge e;
  
--- 792,798 ----
     loops with single latch edge.  */
  
  static void
! disambiguate_multiple_latches (class loop *loop)
  {
    edge e;
  
*************** disambiguate_multiple_latches (struct lo
*** 836,842 ****
  void
  disambiguate_loops_with_multiple_latches (void)
  {
!   struct loop *loop;
  
    FOR_EACH_LOOP (loop, 0)
      {
--- 836,842 ----
  void
  disambiguate_loops_with_multiple_latches (void)
  {
!   class loop *loop;
  
    FOR_EACH_LOOP (loop, 0)
      {
*************** disambiguate_loops_with_multiple_latches
*** 847,855 ****
  
  /* Return nonzero if basic block BB belongs to LOOP.  */
  bool
! flow_bb_inside_loop_p (const struct loop *loop, const_basic_block bb)
  {
!   struct loop *source_loop;
  
    if (bb == ENTRY_BLOCK_PTR_FOR_FN (cfun)
        || bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
--- 847,855 ----
  
  /* Return nonzero if basic block BB belongs to LOOP.  */
  bool
! flow_bb_inside_loop_p (const class loop *loop, const_basic_block bb)
  {
!   class loop *source_loop;
  
    if (bb == ENTRY_BLOCK_PTR_FOR_FN (cfun)
        || bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
*************** flow_bb_inside_loop_p (const struct loop
*** 863,869 ****
  static bool
  glb_enum_p (const_basic_block bb, const void *glb_loop)
  {
!   const struct loop *const loop = (const struct loop *) glb_loop;
    return (bb != loop->header
  	  && dominated_by_p (CDI_DOMINATORS, bb, loop->header));
  }
--- 863,869 ----
  static bool
  glb_enum_p (const_basic_block bb, const void *glb_loop)
  {
!   const class loop *const loop = (const class loop *) glb_loop;
    return (bb != loop->header
  	  && dominated_by_p (CDI_DOMINATORS, bb, loop->header));
  }
*************** glb_enum_p (const_basic_block bb, const
*** 876,882 ****
     returned.  */
  
  unsigned
! get_loop_body_with_size (const struct loop *loop, basic_block *body,
  			 unsigned max_size)
  {
    return dfs_enumerate_from (loop->header, 1, glb_enum_p,
--- 876,882 ----
     returned.  */
  
  unsigned
! get_loop_body_with_size (const class loop *loop, basic_block *body,
  			 unsigned max_size)
  {
    return dfs_enumerate_from (loop->header, 1, glb_enum_p,
*************** get_loop_body_with_size (const struct lo
*** 888,894 ****
     header != latch, latch is the 1-st block.  */
  
  basic_block *
! get_loop_body (const struct loop *loop)
  {
    basic_block *body, bb;
    unsigned tv = 0;
--- 888,894 ----
     header != latch, latch is the 1-st block.  */
  
  basic_block *
! get_loop_body (const class loop *loop)
  {
    basic_block *body, bb;
    unsigned tv = 0;
*************** get_loop_body (const struct loop *loop)
*** 918,924 ****
     array TOVISIT from index *TV.  */
  
  static void
! fill_sons_in_loop (const struct loop *loop, basic_block bb,
  		   basic_block *tovisit, int *tv)
  {
    basic_block son, postpone = NULL;
--- 918,924 ----
     array TOVISIT from index *TV.  */
  
  static void
! fill_sons_in_loop (const class loop *loop, basic_block bb,
  		   basic_block *tovisit, int *tv)
  {
    basic_block son, postpone = NULL;
*************** fill_sons_in_loop (const struct loop *lo
*** 948,954 ****
     the latch, then only blocks dominated by s are be after it.  */
  
  basic_block *
! get_loop_body_in_dom_order (const struct loop *loop)
  {
    basic_block *tovisit;
    int tv;
--- 948,954 ----
     the latch, then only blocks dominated by s are be after it.  */
  
  basic_block *
! get_loop_body_in_dom_order (const class loop *loop)
  {
    basic_block *tovisit;
    int tv;
*************** get_loop_body_in_dom_order (const struct
*** 970,976 ****
  /* Gets body of a LOOP sorted via provided BB_COMPARATOR.  */
  
  basic_block *
! get_loop_body_in_custom_order (const struct loop *loop,
  			       int (*bb_comparator) (const void *, const void *))
  {
    basic_block *bbs = get_loop_body (loop);
--- 970,976 ----
  /* Gets body of a LOOP sorted via provided BB_COMPARATOR.  */
  
  basic_block *
! get_loop_body_in_custom_order (const class loop *loop,
  			       int (*bb_comparator) (const void *, const void *))
  {
    basic_block *bbs = get_loop_body (loop);
*************** get_loop_body_in_custom_order (const str
*** 980,989 ****
    return bbs;
  }
  
  /* Get body of a LOOP in breadth first sort order.  */
  
  basic_block *
! get_loop_body_in_bfs_order (const struct loop *loop)
  {
    basic_block *blocks;
    basic_block bb;
--- 980,1002 ----
    return bbs;
  }
  
+ /* Same as above, but use gcc_sort_r instead of qsort.  */
+ 
+ basic_block *
+ get_loop_body_in_custom_order (const class loop *loop, void *data,
+ 			       int (*bb_comparator) (const void *, const void *, void *))
+ {
+   basic_block *bbs = get_loop_body (loop);
+ 
+   gcc_sort_r (bbs, loop->num_nodes, sizeof (basic_block), bb_comparator, data);
+ 
+   return bbs;
+ }
+ 
  /* Get body of a LOOP in breadth first sort order.  */
  
  basic_block *
! get_loop_body_in_bfs_order (const class loop *loop)
  {
    basic_block *blocks;
    basic_block bb;
*************** void
*** 1069,1075 ****
  rescan_loop_exit (edge e, bool new_edge, bool removed)
  {
    struct loop_exit *exits = NULL, *exit;
!   struct loop *aloop, *cloop;
  
    if (!loops_state_satisfies_p (LOOPS_HAVE_RECORDED_EXITS))
      return;
--- 1082,1088 ----
  rescan_loop_exit (edge e, bool new_edge, bool removed)
  {
    struct loop_exit *exits = NULL, *exit;
!   class loop *aloop, *cloop;
  
    if (!loops_state_satisfies_p (LOOPS_HAVE_RECORDED_EXITS))
      return;
*************** release_recorded_exits (function *fn)
*** 1190,1201 ****
  /* Returns the list of the exit edges of a LOOP.  */
  
  vec<edge> 
! get_loop_exit_edges (const struct loop *loop)
  {
    vec<edge> edges = vNULL;
    edge e;
    unsigned i;
-   basic_block *body;
    edge_iterator ei;
    struct loop_exit *exit;
  
--- 1203,1213 ----
  /* Returns the list of the exit edges of a LOOP.  */
  
  vec<edge> 
! get_loop_exit_edges (const class loop *loop, basic_block *body)
  {
    vec<edge> edges = vNULL;
    edge e;
    unsigned i;
    edge_iterator ei;
    struct loop_exit *exit;
  
*************** get_loop_exit_edges (const struct loop *
*** 1210,1223 ****
      }
    else
      {
!       body = get_loop_body (loop);
        for (i = 0; i < loop->num_nodes; i++)
  	FOR_EACH_EDGE (e, ei, body[i]->succs)
  	  {
  	    if (!flow_bb_inside_loop_p (loop, e->dest))
  	      edges.safe_push (e);
  	  }
!       free (body);
      }
  
    return edges;
--- 1222,1241 ----
      }
    else
      {
!       bool body_from_caller = true;
!       if (!body)
! 	{
! 	  body = get_loop_body (loop);
! 	  body_from_caller = false;
! 	}
        for (i = 0; i < loop->num_nodes; i++)
  	FOR_EACH_EDGE (e, ei, body[i]->succs)
  	  {
  	    if (!flow_bb_inside_loop_p (loop, e->dest))
  	      edges.safe_push (e);
  	  }
!       if (!body_from_caller)
! 	free (body);
      }
  
    return edges;
*************** get_loop_exit_edges (const struct loop *
*** 1226,1232 ****
  /* Counts the number of conditional branches inside LOOP.  */
  
  unsigned
! num_loop_branches (const struct loop *loop)
  {
    unsigned i, n;
    basic_block * body;
--- 1244,1250 ----
  /* Counts the number of conditional branches inside LOOP.  */
  
  unsigned
! num_loop_branches (const class loop *loop)
  {
    unsigned i, n;
    basic_block * body;
*************** num_loop_branches (const struct loop *lo
*** 1245,1251 ****
  
  /* Adds basic block BB to LOOP.  */
  void
! add_bb_to_loop (basic_block bb, struct loop *loop)
  {
    unsigned i;
    loop_p ploop;
--- 1263,1269 ----
  
  /* Adds basic block BB to LOOP.  */
  void
! add_bb_to_loop (basic_block bb, class loop *loop)
  {
    unsigned i;
    loop_p ploop;
*************** void
*** 1273,1279 ****
  remove_bb_from_loops (basic_block bb)
  {
    unsigned i;
!   struct loop *loop = bb->loop_father;
    loop_p ploop;
    edge_iterator ei;
    edge e;
--- 1291,1297 ----
  remove_bb_from_loops (basic_block bb)
  {
    unsigned i;
!   class loop *loop = bb->loop_father;
    loop_p ploop;
    edge_iterator ei;
    edge e;
*************** remove_bb_from_loops (basic_block bb)
*** 1295,1302 ****
  }
  
  /* Finds nearest common ancestor in loop tree for given loops.  */
! struct loop *
! find_common_loop (struct loop *loop_s, struct loop *loop_d)
  {
    unsigned sdepth, ddepth;
  
--- 1313,1320 ----
  }
  
  /* Finds nearest common ancestor in loop tree for given loops.  */
! class loop *
! find_common_loop (class loop *loop_s, class loop *loop_d)
  {
    unsigned sdepth, ddepth;
  
*************** find_common_loop (struct loop *loop_s, s
*** 1322,1328 ****
  /* Removes LOOP from structures and frees its data.  */
  
  void
! delete_loop (struct loop *loop)
  {
    /* Remove the loop from structure.  */
    flow_loop_tree_node_remove (loop);
--- 1340,1346 ----
  /* Removes LOOP from structures and frees its data.  */
  
  void
! delete_loop (class loop *loop)
  {
    /* Remove the loop from structure.  */
    flow_loop_tree_node_remove (loop);
*************** delete_loop (struct loop *loop)
*** 1337,1347 ****
  /* Cancels the LOOP; it must be innermost one.  */
  
  static void
! cancel_loop (struct loop *loop)
  {
    basic_block *bbs;
    unsigned i;
!   struct loop *outer = loop_outer (loop);
  
    gcc_assert (!loop->inner);
  
--- 1355,1365 ----
  /* Cancels the LOOP; it must be innermost one.  */
  
  static void
! cancel_loop (class loop *loop)
  {
    basic_block *bbs;
    unsigned i;
!   class loop *outer = loop_outer (loop);
  
    gcc_assert (!loop->inner);
  
*************** cancel_loop (struct loop *loop)
*** 1356,1368 ****
  
  /* Cancels LOOP and all its subloops.  */
  void
! cancel_loop_tree (struct loop *loop)
  {
    while (loop->inner)
      cancel_loop_tree (loop->inner);
    cancel_loop (loop);
  }
  
  /* Checks that information about loops is correct
       -- sizes of loops are all right
       -- results of get_loop_body really belong to the loop
--- 1374,1395 ----
  
  /* Cancels LOOP and all its subloops.  */
  void
! cancel_loop_tree (class loop *loop)
  {
    while (loop->inner)
      cancel_loop_tree (loop->inner);
    cancel_loop (loop);
  }
  
+ /* Disable warnings about missing quoting in GCC diagnostics for
+    the verification errors.  Their format strings don't follow GCC
+    diagnostic conventions and the calls are ultimately followed by
+    a deliberate ICE triggered by a failed assertion.  */
+ #if __GNUC__ >= 10
+ #  pragma GCC diagnostic push
+ #  pragma GCC diagnostic ignored "-Wformat-diag"
+ #endif
+ 
  /* Checks that information about loops is correct
       -- sizes of loops are all right
       -- results of get_loop_body really belong to the loop
*************** verify_loop_structure (void)
*** 1376,1382 ****
  {
    unsigned *sizes, i, j;
    basic_block bb, *bbs;
!   struct loop *loop;
    int err = 0;
    edge e;
    unsigned num = number_of_loops (cfun);
--- 1403,1409 ----
  {
    unsigned *sizes, i, j;
    basic_block bb, *bbs;
!   class loop *loop;
    int err = 0;
    edge e;
    unsigned num = number_of_loops (cfun);
*************** verify_loop_structure (void)
*** 1677,1683 ****
  
  	      if (eloops != 0)
  		{
! 		  error ("wrong list of exited loops for edge  %d->%d",
  			 e->src->index, e->dest->index);
  		  err = 1;
  		}
--- 1704,1710 ----
  
  	      if (eloops != 0)
  		{
! 		  error ("wrong list of exited loops for edge %d->%d",
  			 e->src->index, e->dest->index);
  		  err = 1;
  		}
*************** verify_loop_structure (void)
*** 1712,1727 ****
      free_dominance_info (CDI_DOMINATORS);
  }
  
  /* Returns latch edge of LOOP.  */
  edge
! loop_latch_edge (const struct loop *loop)
  {
    return find_edge (loop->latch, loop->header);
  }
  
  /* Returns preheader edge of LOOP.  */
  edge
! loop_preheader_edge (const struct loop *loop)
  {
    edge e;
    edge_iterator ei;
--- 1739,1758 ----
      free_dominance_info (CDI_DOMINATORS);
  }
  
+ #if __GNUC__ >= 10
+ #  pragma GCC diagnostic pop
+ #endif
+ 
  /* Returns latch edge of LOOP.  */
  edge
! loop_latch_edge (const class loop *loop)
  {
    return find_edge (loop->latch, loop->header);
  }
  
  /* Returns preheader edge of LOOP.  */
  edge
! loop_preheader_edge (const class loop *loop)
  {
    edge e;
    edge_iterator ei;
*************** loop_preheader_edge (const struct loop *
*** 1745,1751 ****
  /* Returns true if E is an exit of LOOP.  */
  
  bool
! loop_exit_edge_p (const struct loop *loop, const_edge e)
  {
    return (flow_bb_inside_loop_p (loop, e->src)
  	  && !flow_bb_inside_loop_p (loop, e->dest));
--- 1776,1782 ----
  /* Returns true if E is an exit of LOOP.  */
  
  bool
! loop_exit_edge_p (const class loop *loop, const_edge e)
  {
    return (flow_bb_inside_loop_p (loop, e->src)
  	  && !flow_bb_inside_loop_p (loop, e->dest));
*************** loop_exit_edge_p (const struct loop *loo
*** 1756,1762 ****
     is returned always.  */
  
  edge
! single_exit (const struct loop *loop)
  {
    struct loop_exit *exit = loop->exits->next;
  
--- 1787,1793 ----
     is returned always.  */
  
  edge
! single_exit (const class loop *loop)
  {
    struct loop_exit *exit = loop->exits->next;
  
*************** single_exit (const struct loop *loop)
*** 1772,1778 ****
  /* Returns true when BB has an incoming edge exiting LOOP.  */
  
  bool
! loop_exits_to_bb_p (struct loop *loop, basic_block bb)
  {
    edge e;
    edge_iterator ei;
--- 1803,1809 ----
  /* Returns true when BB has an incoming edge exiting LOOP.  */
  
  bool
! loop_exits_to_bb_p (class loop *loop, basic_block bb)
  {
    edge e;
    edge_iterator ei;
*************** loop_exits_to_bb_p (struct loop *loop, b
*** 1787,1793 ****
  /* Returns true when BB has an outgoing edge exiting LOOP.  */
  
  bool
! loop_exits_from_bb_p (struct loop *loop, basic_block bb)
  {
    edge e;
    edge_iterator ei;
--- 1818,1824 ----
  /* Returns true when BB has an outgoing edge exiting LOOP.  */
  
  bool
! loop_exits_from_bb_p (class loop *loop, basic_block bb)
  {
    edge e;
    edge_iterator ei;
*************** loop_exits_from_bb_p (struct loop *loop,
*** 1802,1811 ****
  /* Return location corresponding to the loop control condition if possible.  */
  
  dump_user_location_t
! get_loop_location (struct loop *loop)
  {
    rtx_insn *insn = NULL;
!   struct niter_desc *desc = NULL;
    edge exit;
  
    /* For a for or while loop, we would like to return the location
--- 1833,1842 ----
  /* Return location corresponding to the loop control condition if possible.  */
  
  dump_user_location_t
! get_loop_location (class loop *loop)
  {
    rtx_insn *insn = NULL;
!   class niter_desc *desc = NULL;
    edge exit;
  
    /* For a for or while loop, we would like to return the location
*************** get_loop_location (struct loop *loop)
*** 1856,1862 ****
     I_BOUND times.  */
  
  void
! record_niter_bound (struct loop *loop, const widest_int &i_bound,
  		    bool realistic, bool upper)
  {
    /* Update the bounds only when there is no previous estimation, or when the
--- 1887,1893 ----
     I_BOUND times.  */
  
  void
! record_niter_bound (class loop *loop, const widest_int &i_bound,
  		    bool realistic, bool upper)
  {
    /* Update the bounds only when there is no previous estimation, or when the
*************** record_niter_bound (struct loop *loop, c
*** 1907,1913 ****
     on the number of iterations of LOOP could not be derived, returns -1.  */
  
  HOST_WIDE_INT
! get_estimated_loop_iterations_int (struct loop *loop)
  {
    widest_int nit;
    HOST_WIDE_INT hwi_nit;
--- 1938,1944 ----
     on the number of iterations of LOOP could not be derived, returns -1.  */
  
  HOST_WIDE_INT
! get_estimated_loop_iterations_int (class loop *loop)
  {
    widest_int nit;
    HOST_WIDE_INT hwi_nit;
*************** get_estimated_loop_iterations_int (struc
*** 1927,1933 ****
     the number of execution of the latch by one.  */
  
  HOST_WIDE_INT
! max_stmt_executions_int (struct loop *loop)
  {
    HOST_WIDE_INT nit = get_max_loop_iterations_int (loop);
    HOST_WIDE_INT snit;
--- 1958,1964 ----
     the number of execution of the latch by one.  */
  
  HOST_WIDE_INT
! max_stmt_executions_int (class loop *loop)
  {
    HOST_WIDE_INT nit = get_max_loop_iterations_int (loop);
    HOST_WIDE_INT snit;
*************** max_stmt_executions_int (struct loop *lo
*** 1946,1952 ****
     the number of execution of the latch by one.  */
  
  HOST_WIDE_INT
! likely_max_stmt_executions_int (struct loop *loop)
  {
    HOST_WIDE_INT nit = get_likely_max_loop_iterations_int (loop);
    HOST_WIDE_INT snit;
--- 1977,1983 ----
     the number of execution of the latch by one.  */
  
  HOST_WIDE_INT
! likely_max_stmt_executions_int (class loop *loop)
  {
    HOST_WIDE_INT nit = get_likely_max_loop_iterations_int (loop);
    HOST_WIDE_INT snit;
*************** likely_max_stmt_executions_int (struct l
*** 1965,1971 ****
     returns true.  */
  
  bool
! get_estimated_loop_iterations (struct loop *loop, widest_int *nit)
  {
    /* Even if the bound is not recorded, possibly we can derrive one from
       profile.  */
--- 1996,2002 ----
     returns true.  */
  
  bool
! get_estimated_loop_iterations (class loop *loop, widest_int *nit)
  {
    /* Even if the bound is not recorded, possibly we can derrive one from
       profile.  */
*************** get_estimated_loop_iterations (struct lo
*** 1989,1995 ****
     false, otherwise returns true.  */
  
  bool
! get_max_loop_iterations (const struct loop *loop, widest_int *nit)
  {
    if (!loop->any_upper_bound)
      return false;
--- 2020,2026 ----
     false, otherwise returns true.  */
  
  bool
! get_max_loop_iterations (const class loop *loop, widest_int *nit)
  {
    if (!loop->any_upper_bound)
      return false;
*************** get_max_loop_iterations (const struct lo
*** 2003,2009 ****
     on the number of iterations of LOOP could not be derived, returns -1.  */
  
  HOST_WIDE_INT
! get_max_loop_iterations_int (const struct loop *loop)
  {
    widest_int nit;
    HOST_WIDE_INT hwi_nit;
--- 2034,2040 ----
     on the number of iterations of LOOP could not be derived, returns -1.  */
  
  HOST_WIDE_INT
! get_max_loop_iterations_int (const class loop *loop)
  {
    widest_int nit;
    HOST_WIDE_INT hwi_nit;
*************** get_max_loop_iterations_int (const struc
*** 2023,2029 ****
     false, otherwise returns true.  */
  
  bool
! get_likely_max_loop_iterations (struct loop *loop, widest_int *nit)
  {
    if (!loop->any_likely_upper_bound)
      return false;
--- 2054,2060 ----
     false, otherwise returns true.  */
  
  bool
! get_likely_max_loop_iterations (class loop *loop, widest_int *nit)
  {
    if (!loop->any_likely_upper_bound)
      return false;
*************** get_likely_max_loop_iterations (struct l
*** 2037,2043 ****
     on the number of iterations of LOOP could not be derived, returns -1.  */
  
  HOST_WIDE_INT
! get_likely_max_loop_iterations_int (struct loop *loop)
  {
    widest_int nit;
    HOST_WIDE_INT hwi_nit;
--- 2068,2074 ----
     on the number of iterations of LOOP could not be derived, returns -1.  */
  
  HOST_WIDE_INT
! get_likely_max_loop_iterations_int (class loop *loop)
  {
    widest_int nit;
    HOST_WIDE_INT hwi_nit;
diff -Nrcpad gcc-9.3.0/gcc/cfgloop.h gcc-10.1.0/gcc/cfgloop.h
*** gcc-9.3.0/gcc/cfgloop.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfgloop.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Natural loop functions
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Natural loop functions
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** enum iv_extend_code
*** 46,52 ****
  
  /* The structure describing a bound on number of iterations of a loop.  */
  
! struct GTY ((chain_next ("%h.next"))) nb_iter_bound {
    /* The statement STMT is executed at most ...  */
    gimple *stmt;
  
--- 46,53 ----
  
  /* The structure describing a bound on number of iterations of a loop.  */
  
! class GTY ((chain_next ("%h.next"))) nb_iter_bound {
! public:
    /* The statement STMT is executed at most ...  */
    gimple *stmt;
  
*************** struct GTY ((chain_next ("%h.next"))) nb
*** 65,71 ****
    bool is_exit;
  
    /* The next bound in the list.  */
!   struct nb_iter_bound *next;
  };
  
  /* Description of the loop exit.  */
--- 66,72 ----
    bool is_exit;
  
    /* The next bound in the list.  */
!   class nb_iter_bound *next;
  };
  
  /* Description of the loop exit.  */
*************** struct loop_exit_hasher : ggc_ptr_hash<l
*** 91,97 ****
    static void remove (loop_exit *);
  };
  
! typedef struct loop *loop_p;
  
  /* An integer estimation of the number of iterations.  Estimate_state
     describes what is the state of the estimation.  */
--- 92,98 ----
    static void remove (loop_exit *);
  };
  
! typedef class loop *loop_p;
  
  /* An integer estimation of the number of iterations.  Estimate_state
     describes what is the state of the estimation.  */
*************** struct GTY ((chain_next ("%h.next"))) co
*** 113,119 ****
  };
  
  /* Structure to hold information for each natural loop.  */
! struct GTY ((chain_next ("%h.next"))) loop {
    /* Index into loops array.  Note indices will never be reused after loop
       is destroyed.  */
    int num;
--- 114,121 ----
  };
  
  /* Structure to hold information for each natural loop.  */
! class GTY ((chain_next ("%h.next"))) loop {
! public:
    /* Index into loops array.  Note indices will never be reused after loop
       is destroyed.  */
    int num;
*************** struct GTY ((chain_next ("%h.next"))) lo
*** 140,149 ****
    vec<loop_p, va_gc> *superloops;
  
    /* The first inner (child) loop or NULL if innermost loop.  */
!   struct loop *inner;
  
    /* Link to the next (sibling) loop.  */
!   struct loop *next;
  
    /* Auxiliary info specific to a pass.  */
    PTR GTY ((skip (""))) aux;
--- 142,151 ----
    vec<loop_p, va_gc> *superloops;
  
    /* The first inner (child) loop or NULL if innermost loop.  */
!   class loop *inner;
  
    /* Link to the next (sibling) loop.  */
!   class loop *next;
  
    /* Auxiliary info specific to a pass.  */
    PTR GTY ((skip (""))) aux;
*************** struct GTY ((chain_next ("%h.next"))) lo
*** 174,179 ****
--- 176,184 ----
       of the loop can be safely evaluated concurrently.  */
    int safelen;
  
+   /* Preferred vectorization factor for the loop if non-zero.  */
+   int simdlen;
+ 
    /* Constraints are generally set by consumers and affect certain
       semantics of niter analyzer APIs.  Currently the APIs affected are
       number_of_iterations_exit* functions and their callers.  One typical
*************** struct GTY ((chain_next ("%h.next"))) lo
*** 221,226 ****
--- 226,235 ----
    /* True if the loop is part of an oacc kernels region.  */
    unsigned in_oacc_kernels_region : 1;
  
+   /* True if the loop is known to be finite.  This is a localized
+      flag_finite_loops or similar pragmas state.  */
+   unsigned finite_p : 1;
+ 
    /* The number of times to unroll the loop.  0 means no information given,
       just do what we always do.  A value of 1 means do not unroll the loop.
       A value of USHRT_MAX means unroll with no specific unrolling factor.
*************** struct GTY ((chain_next ("%h.next"))) lo
*** 247,253 ****
    int orig_loop_num;
  
    /* Upper bound on number of iterations of a loop.  */
!   struct nb_iter_bound *bounds;
  
    /* Non-overflow control ivs of a loop.  */
    struct control_iv *control_ivs;
--- 256,262 ----
    int orig_loop_num;
  
    /* Upper bound on number of iterations of a loop.  */
!   class nb_iter_bound *bounds;
  
    /* Non-overflow control ivs of a loop.  */
    struct control_iv *control_ivs;
*************** struct GTY ((chain_next ("%h.next"))) lo
*** 256,262 ****
    struct loop_exit *exits;
  
    /* Number of iteration analysis data for RTL.  */
!   struct niter_desc *simple_loop_desc;
  
    /* For sanity checking during loop fixup we record here the former
       loop header for loops marked for removal.  Note that this prevents
--- 265,271 ----
    struct loop_exit *exits;
  
    /* Number of iteration analysis data for RTL.  */
!   class niter_desc *simple_loop_desc;
  
    /* For sanity checking during loop fixup we record here the former
       loop header for loops marked for removal.  Note that this prevents
*************** struct GTY ((chain_next ("%h.next"))) lo
*** 272,292 ****
  
  /* Set C to the LOOP constraint.  */
  static inline void
! loop_constraint_set (struct loop *loop, unsigned c)
  {
    loop->constraints |= c;
  }
  
  /* Clear C from the LOOP constraint.  */
  static inline void
! loop_constraint_clear (struct loop *loop, unsigned c)
  {
    loop->constraints &= ~c;
  }
  
  /* Check if C is set in the LOOP constraint.  */
  static inline bool
! loop_constraint_set_p (struct loop *loop, unsigned c)
  {
    return (loop->constraints & c) == c;
  }
--- 281,301 ----
  
  /* Set C to the LOOP constraint.  */
  static inline void
! loop_constraint_set (class loop *loop, unsigned c)
  {
    loop->constraints |= c;
  }
  
  /* Clear C from the LOOP constraint.  */
  static inline void
! loop_constraint_clear (class loop *loop, unsigned c)
  {
    loop->constraints &= ~c;
  }
  
  /* Check if C is set in the LOOP constraint.  */
  static inline bool
! loop_constraint_set_p (class loop *loop, unsigned c)
  {
    return (loop->constraints & c) == c;
  }
*************** struct GTY (()) loops {
*** 322,328 ****
    hash_table<loop_exit_hasher> *GTY(()) exits;
  
    /* Pointer to root of loop hierarchy tree.  */
!   struct loop *tree_root;
  };
  
  /* Loop recognition.  */
--- 331,337 ----
    hash_table<loop_exit_hasher> *GTY(()) exits;
  
    /* Pointer to root of loop hierarchy tree.  */
!   class loop *tree_root;
  };
  
  /* Loop recognition.  */
*************** extern struct loops *flow_loops_find (st
*** 332,343 ****
  extern void disambiguate_loops_with_multiple_latches (void);
  extern void flow_loops_free (struct loops *);
  extern void flow_loops_dump (FILE *,
! 			     void (*)(const struct loop *, FILE *, int), int);
! extern void flow_loop_dump (const struct loop *, FILE *,
! 			    void (*)(const struct loop *, FILE *, int), int);
! struct loop *alloc_loop (void);
! extern void flow_loop_free (struct loop *);
! int flow_loop_nodes_find (basic_block, struct loop *);
  unsigned fix_loop_structure (bitmap changed_bbs);
  bool mark_irreducible_loops (void);
  void release_recorded_exits (function *);
--- 341,352 ----
  extern void disambiguate_loops_with_multiple_latches (void);
  extern void flow_loops_free (struct loops *);
  extern void flow_loops_dump (FILE *,
! 			     void (*)(const class loop *, FILE *, int), int);
! extern void flow_loop_dump (const class loop *, FILE *,
! 			    void (*)(const class loop *, FILE *, int), int);
! class loop *alloc_loop (void);
! extern void flow_loop_free (class loop *);
! int flow_loop_nodes_find (basic_block, class loop *);
  unsigned fix_loop_structure (bitmap changed_bbs);
  bool mark_irreducible_loops (void);
  void release_recorded_exits (function *);
*************** void rescan_loop_exit (edge, bool, bool)
*** 346,399 ****
  void sort_sibling_loops (function *);
  
  /* Loop data structure manipulation/querying.  */
! extern void flow_loop_tree_node_add (struct loop *, struct loop *,
! 				     struct loop * = NULL);
! extern void flow_loop_tree_node_remove (struct loop *);
! extern bool flow_loop_nested_p	(const struct loop *, const struct loop *);
! extern bool flow_bb_inside_loop_p (const struct loop *, const_basic_block);
! extern struct loop * find_common_loop (struct loop *, struct loop *);
! struct loop *superloop_at_depth (struct loop *, unsigned);
  struct eni_weights;
! extern int num_loop_insns (const struct loop *);
! extern int average_num_loop_insns (const struct loop *);
! extern unsigned get_loop_level (const struct loop *);
! extern bool loop_exit_edge_p (const struct loop *, const_edge);
! extern bool loop_exits_to_bb_p (struct loop *, basic_block);
! extern bool loop_exits_from_bb_p (struct loop *, basic_block);
  extern void mark_loop_exit_edges (void);
! extern dump_user_location_t get_loop_location (struct loop *loop);
  
  /* Loops & cfg manipulation.  */
! extern basic_block *get_loop_body (const struct loop *);
! extern unsigned get_loop_body_with_size (const struct loop *, basic_block *,
  					 unsigned);
! extern basic_block *get_loop_body_in_dom_order (const struct loop *);
! extern basic_block *get_loop_body_in_bfs_order (const struct loop *);
! extern basic_block *get_loop_body_in_custom_order (const struct loop *,
  			       int (*) (const void *, const void *));
  
! extern vec<edge> get_loop_exit_edges (const struct loop *);
! extern edge single_exit (const struct loop *);
! extern edge single_likely_exit (struct loop *loop);
! extern unsigned num_loop_branches (const struct loop *);
  
! extern edge loop_preheader_edge (const struct loop *);
! extern edge loop_latch_edge (const struct loop *);
  
! extern void add_bb_to_loop (basic_block, struct loop *);
  extern void remove_bb_from_loops (basic_block);
  
! extern void cancel_loop_tree (struct loop *);
! extern void delete_loop (struct loop *);
  
  
  extern void verify_loop_structure (void);
  
  /* Loop analysis.  */
! extern bool just_once_each_iteration_p (const struct loop *, const_basic_block);
! gcov_type expected_loop_iterations_unbounded (const struct loop *,
  					      bool *read_profile_p = NULL, bool by_profile_only = false);
! extern unsigned expected_loop_iterations (struct loop *);
  extern rtx doloop_condition_get (rtx_insn *);
  
  void mark_loop_for_removal (loop_p);
--- 355,410 ----
  void sort_sibling_loops (function *);
  
  /* Loop data structure manipulation/querying.  */
! extern void flow_loop_tree_node_add (class loop *, class loop *,
! 				     class loop * = NULL);
! extern void flow_loop_tree_node_remove (class loop *);
! extern bool flow_loop_nested_p	(const class loop *, const class loop *);
! extern bool flow_bb_inside_loop_p (const class loop *, const_basic_block);
! extern class loop * find_common_loop (class loop *, class loop *);
! class loop *superloop_at_depth (class loop *, unsigned);
  struct eni_weights;
! extern int num_loop_insns (const class loop *);
! extern int average_num_loop_insns (const class loop *);
! extern unsigned get_loop_level (const class loop *);
! extern bool loop_exit_edge_p (const class loop *, const_edge);
! extern bool loop_exits_to_bb_p (class loop *, basic_block);
! extern bool loop_exits_from_bb_p (class loop *, basic_block);
  extern void mark_loop_exit_edges (void);
! extern dump_user_location_t get_loop_location (class loop *loop);
  
  /* Loops & cfg manipulation.  */
! extern basic_block *get_loop_body (const class loop *);
! extern unsigned get_loop_body_with_size (const class loop *, basic_block *,
  					 unsigned);
! extern basic_block *get_loop_body_in_dom_order (const class loop *);
! extern basic_block *get_loop_body_in_bfs_order (const class loop *);
! extern basic_block *get_loop_body_in_custom_order (const class loop *,
  			       int (*) (const void *, const void *));
+ extern basic_block *get_loop_body_in_custom_order (const class loop *, void *,
+ 			       int (*) (const void *, const void *, void *));
  
! extern vec<edge> get_loop_exit_edges (const class loop *, basic_block * = NULL);
! extern edge single_exit (const class loop *);
! extern edge single_likely_exit (class loop *loop, vec<edge>);
! extern unsigned num_loop_branches (const class loop *);
  
! extern edge loop_preheader_edge (const class loop *);
! extern edge loop_latch_edge (const class loop *);
  
! extern void add_bb_to_loop (basic_block, class loop *);
  extern void remove_bb_from_loops (basic_block);
  
! extern void cancel_loop_tree (class loop *);
! extern void delete_loop (class loop *);
  
  
  extern void verify_loop_structure (void);
  
  /* Loop analysis.  */
! extern bool just_once_each_iteration_p (const class loop *, const_basic_block);
! gcov_type expected_loop_iterations_unbounded (const class loop *,
  					      bool *read_profile_p = NULL, bool by_profile_only = false);
! extern unsigned expected_loop_iterations (class loop *);
  extern rtx doloop_condition_get (rtx_insn *);
  
  void mark_loop_for_removal (loop_p);
*************** void mark_loop_for_removal (loop_p);
*** 419,426 ****
     computation is done, which would enable it to be different from the
     outer one?  */
  
! struct rtx_iv
  {
    /* Its base and step (mode of base and step is supposed to be extend_mode,
       see the description above).  */
    rtx base, step;
--- 430,438 ----
     computation is done, which would enable it to be different from the
     outer one?  */
  
! class rtx_iv
  {
+ public:
    /* Its base and step (mode of base and step is supposed to be extend_mode,
       see the description above).  */
    rtx base, step;
*************** struct rtx_iv
*** 445,452 ****
  /* The description of an exit from the loop and of the number of iterations
     till we take the exit.  */
  
! struct GTY(()) niter_desc
  {
    /* The edge out of the loop.  */
    edge out_edge;
  
--- 457,465 ----
  /* The description of an exit from the loop and of the number of iterations
     till we take the exit.  */
  
! class GTY(()) niter_desc
  {
+ public:
    /* The edge out of the loop.  */
    edge out_edge;
  
*************** struct GTY(()) niter_desc
*** 483,503 ****
    rtx niter_expr;
  };
  
! extern void iv_analysis_loop_init (struct loop *);
! extern bool iv_analyze (rtx_insn *, scalar_int_mode, rtx, struct rtx_iv *);
! extern bool iv_analyze_result (rtx_insn *, rtx, struct rtx_iv *);
  extern bool iv_analyze_expr (rtx_insn *, scalar_int_mode, rtx,
! 			     struct rtx_iv *);
! extern rtx get_iv_value (struct rtx_iv *, rtx);
  extern bool biv_p (rtx_insn *, scalar_int_mode, rtx);
- extern void find_simple_exit (struct loop *, struct niter_desc *);
  extern void iv_analysis_done (void);
  
! extern struct niter_desc *get_simple_loop_desc (struct loop *loop);
! extern void free_simple_loop_desc (struct loop *loop);
  
! static inline struct niter_desc *
! simple_loop_desc (struct loop *loop)
  {
    return loop->simple_loop_desc;
  }
--- 496,515 ----
    rtx niter_expr;
  };
  
! extern void iv_analysis_loop_init (class loop *);
! extern bool iv_analyze (rtx_insn *, scalar_int_mode, rtx, class rtx_iv *);
! extern bool iv_analyze_result (rtx_insn *, rtx, class rtx_iv *);
  extern bool iv_analyze_expr (rtx_insn *, scalar_int_mode, rtx,
! 			     class rtx_iv *);
! extern rtx get_iv_value (class rtx_iv *, rtx);
  extern bool biv_p (rtx_insn *, scalar_int_mode, rtx);
  extern void iv_analysis_done (void);
  
! extern class niter_desc *get_simple_loop_desc (class loop *loop);
! extern void free_simple_loop_desc (class loop *loop);
  
! static inline class niter_desc *
! simple_loop_desc (class loop *loop)
  {
    return loop->simple_loop_desc;
  }
*************** simple_loop_desc (struct loop *loop)
*** 506,512 ****
  
  /* Returns the loop with index NUM from FNs loop tree.  */
  
! static inline struct loop *
  get_loop (struct function *fn, unsigned num)
  {
    return (*loops_for_fn (fn)->larray)[num];
--- 518,524 ----
  
  /* Returns the loop with index NUM from FNs loop tree.  */
  
! static inline class loop *
  get_loop (struct function *fn, unsigned num)
  {
    return (*loops_for_fn (fn)->larray)[num];
*************** get_loop (struct function *fn, unsigned
*** 515,521 ****
  /* Returns the number of superloops of LOOP.  */
  
  static inline unsigned
! loop_depth (const struct loop *loop)
  {
    return vec_safe_length (loop->superloops);
  }
--- 527,533 ----
  /* Returns the number of superloops of LOOP.  */
  
  static inline unsigned
! loop_depth (const class loop *loop)
  {
    return vec_safe_length (loop->superloops);
  }
*************** loop_depth (const struct loop *loop)
*** 523,530 ****
  /* Returns the immediate superloop of LOOP, or NULL if LOOP is the outermost
     loop.  */
  
! static inline struct loop *
! loop_outer (const struct loop *loop)
  {
    unsigned n = vec_safe_length (loop->superloops);
  
--- 535,542 ----
  /* Returns the immediate superloop of LOOP, or NULL if LOOP is the outermost
     loop.  */
  
! static inline class loop *
! loop_outer (const class loop *loop)
  {
    unsigned n = vec_safe_length (loop->superloops);
  
*************** loop_outer (const struct loop *loop)
*** 537,543 ****
  /* Returns true if LOOP has at least one exit edge.  */
  
  static inline bool
! loop_has_exit_edges (const struct loop *loop)
  {
    return loop->exits->next->e != NULL;
  }
--- 549,555 ----
  /* Returns true if LOOP has at least one exit edge.  */
  
  static inline bool
! loop_has_exit_edges (const class loop *loop)
  {
    return loop->exits->next->e != NULL;
  }
*************** enum li_flags
*** 648,657 ****
  
  /* The iterator for loops.  */
  
! struct loop_iterator
  {
    loop_iterator (function *fn, loop_p *loop, unsigned flags);
-   ~loop_iterator ();
  
    inline loop_p next ();
  
--- 660,669 ----
  
  /* The iterator for loops.  */
  
! class loop_iterator
  {
+ public:
    loop_iterator (function *fn, loop_p *loop, unsigned flags);
  
    inline loop_p next ();
  
*************** struct loop_iterator
*** 659,665 ****
    function *fn;
  
    /* The list of loops to visit.  */
!   vec<int> to_visit;
  
    /* The index of the actual loop.  */
    unsigned idx;
--- 671,677 ----
    function *fn;
  
    /* The list of loops to visit.  */
!   auto_vec<int, 16> to_visit;
  
    /* The index of the actual loop.  */
    unsigned idx;
*************** loop_iterator::next ()
*** 684,690 ****
  inline
  loop_iterator::loop_iterator (function *fn, loop_p *loop, unsigned flags)
  {
!   struct loop *aloop;
    unsigned i;
    int mn;
  
--- 696,702 ----
  inline
  loop_iterator::loop_iterator (function *fn, loop_p *loop, unsigned flags)
  {
!   class loop *aloop;
    unsigned i;
    int mn;
  
*************** loop_iterator::loop_iterator (function *
*** 692,703 ****
    this->fn = fn;
    if (!loops_for_fn (fn))
      {
-       this->to_visit.create (0);
        *loop = NULL;
        return;
      }
  
!   this->to_visit.create (number_of_loops (fn));
    mn = (flags & LI_INCLUDE_ROOT) ? 0 : 1;
  
    if (flags & LI_ONLY_INNERMOST)
--- 704,714 ----
    this->fn = fn;
    if (!loops_for_fn (fn))
      {
        *loop = NULL;
        return;
      }
  
!   this->to_visit.reserve_exact (number_of_loops (fn));
    mn = (flags & LI_INCLUDE_ROOT) ? 0 : 1;
  
    if (flags & LI_ONLY_INNERMOST)
*************** loop_iterator::loop_iterator (function *
*** 759,770 ****
    *loop = this->next ();
  }
  
- inline
- loop_iterator::~loop_iterator ()
- {
-   this->to_visit.release ();
- }
- 
  #define FOR_EACH_LOOP(LOOP, FLAGS) \
    for (loop_iterator li(cfun, &(LOOP), FLAGS); \
         (LOOP); \
--- 770,775 ----
*************** enum
*** 835,845 ****
  
  extern void doloop_optimize_loops (void);
  extern void move_loop_invariants (void);
! extern vec<basic_block> get_loop_hot_path (const struct loop *loop);
  
  /* Returns the outermost loop of the loop nest that contains LOOP.*/
! static inline struct loop *
! loop_outermost (struct loop *loop)
  {
    unsigned n = vec_safe_length (loop->superloops);
  
--- 840,850 ----
  
  extern void doloop_optimize_loops (void);
  extern void move_loop_invariants (void);
! extern vec<basic_block> get_loop_hot_path (const class loop *loop);
  
  /* Returns the outermost loop of the loop nest that contains LOOP.*/
! static inline class loop *
! loop_outermost (class loop *loop)
  {
    unsigned n = vec_safe_length (loop->superloops);
  
*************** loop_outermost (struct loop *loop)
*** 849,861 ****
    return (*loop->superloops)[1];
  }
  
! extern void record_niter_bound (struct loop *, const widest_int &, bool, bool);
! extern HOST_WIDE_INT get_estimated_loop_iterations_int (struct loop *);
! extern HOST_WIDE_INT get_max_loop_iterations_int (const struct loop *);
! extern HOST_WIDE_INT get_likely_max_loop_iterations_int (struct loop *);
! extern bool get_estimated_loop_iterations (struct loop *loop, widest_int *nit);
! extern bool get_max_loop_iterations (const struct loop *loop, widest_int *nit);
! extern bool get_likely_max_loop_iterations (struct loop *loop, widest_int *nit);
  extern int bb_loop_depth (const_basic_block);
  
  /* Converts VAL to widest_int.  */
--- 854,866 ----
    return (*loop->superloops)[1];
  }
  
! extern void record_niter_bound (class loop *, const widest_int &, bool, bool);
! extern HOST_WIDE_INT get_estimated_loop_iterations_int (class loop *);
! extern HOST_WIDE_INT get_max_loop_iterations_int (const class loop *);
! extern HOST_WIDE_INT get_likely_max_loop_iterations_int (class loop *);
! extern bool get_estimated_loop_iterations (class loop *loop, widest_int *nit);
! extern bool get_max_loop_iterations (const class loop *loop, widest_int *nit);
! extern bool get_likely_max_loop_iterations (class loop *loop, widest_int *nit);
  extern int bb_loop_depth (const_basic_block);
  
  /* Converts VAL to widest_int.  */
diff -Nrcpad gcc-9.3.0/gcc/cfgloopanal.c gcc-10.1.0/gcc/cfgloopanal.c
*** gcc-9.3.0/gcc/cfgloopanal.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfgloopanal.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Natural loop analysis code for GNU compiler.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Natural loop analysis code for GNU compiler.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 30,37 ****
  #include "explow.h"
  #include "expr.h"
  #include "graphds.h"
- #include "params.h"
  #include "sreal.h"
  
  struct target_cfgloop default_target_cfgloop;
  #if SWITCHABLE_TARGET
--- 30,38 ----
  #include "explow.h"
  #include "expr.h"
  #include "graphds.h"
  #include "sreal.h"
+ #include "regs.h"
+ #include "function-abi.h"
  
  struct target_cfgloop default_target_cfgloop;
  #if SWITCHABLE_TARGET
*************** struct target_cfgloop *this_target_cfglo
*** 41,47 ****
  /* Checks whether BB is executed exactly once in each LOOP iteration.  */
  
  bool
! just_once_each_iteration_p (const struct loop *loop, const_basic_block bb)
  {
    /* It must be executed at least once each iteration.  */
    if (!dominated_by_p (CDI_DOMINATORS, loop->latch, bb))
--- 42,48 ----
  /* Checks whether BB is executed exactly once in each LOOP iteration.  */
  
  bool
! just_once_each_iteration_p (const class loop *loop, const_basic_block bb)
  {
    /* It must be executed at least once each iteration.  */
    if (!dominated_by_p (CDI_DOMINATORS, loop->latch, bb))
*************** mark_irreducible_loops (void)
*** 81,87 ****
    unsigned depth;
    struct graph *g;
    int num = number_of_loops (cfun);
!   struct loop *cloop;
    bool irred_loop_found = false;
    int i;
  
--- 82,88 ----
    unsigned depth;
    struct graph *g;
    int num = number_of_loops (cfun);
!   class loop *cloop;
    bool irred_loop_found = false;
    int i;
  
*************** mark_irreducible_loops (void)
*** 173,179 ****
  
  /* Counts number of insns inside LOOP.  */
  int
! num_loop_insns (const struct loop *loop)
  {
    basic_block *bbs, bb;
    unsigned i, ninsns = 0;
--- 174,180 ----
  
  /* Counts number of insns inside LOOP.  */
  int
! num_loop_insns (const class loop *loop)
  {
    basic_block *bbs, bb;
    unsigned i, ninsns = 0;
*************** num_loop_insns (const struct loop *loop)
*** 197,203 ****
  
  /* Counts number of insns executed on average per iteration LOOP.  */
  int
! average_num_loop_insns (const struct loop *loop)
  {
    basic_block *bbs, bb;
    unsigned i, binsns;
--- 198,204 ----
  
  /* Counts number of insns executed on average per iteration LOOP.  */
  int
! average_num_loop_insns (const class loop *loop)
  {
    basic_block *bbs, bb;
    unsigned i, binsns;
*************** average_num_loop_insns (const struct loo
*** 218,224 ****
        ninsns += (sreal)binsns * bb->count.to_sreal_scale (loop->header->count);
        /* Avoid overflows.   */
        if (ninsns > 1000000)
! 	return 100000;
      }
    free (bbs);
  
--- 219,228 ----
        ninsns += (sreal)binsns * bb->count.to_sreal_scale (loop->header->count);
        /* Avoid overflows.   */
        if (ninsns > 1000000)
! 	{
! 	  free (bbs);
! 	  return 1000000;
! 	}
      }
    free (bbs);
  
*************** average_num_loop_insns (const struct loo
*** 238,244 ****
     return -1 in those scenarios.  */
  
  gcov_type
! expected_loop_iterations_unbounded (const struct loop *loop,
  				    bool *read_profile_p,
  				    bool by_profile_only)
  {
--- 242,248 ----
     return -1 in those scenarios.  */
  
  gcov_type
! expected_loop_iterations_unbounded (const class loop *loop,
  				    bool *read_profile_p,
  				    bool by_profile_only)
  {
*************** expected_loop_iterations_unbounded (cons
*** 254,260 ****
      {
        if (by_profile_only)
  	return -1;
!       expected = PARAM_VALUE (PARAM_AVG_LOOP_NITER);
      }
    else if (loop->latch && (loop->latch->count.initialized_p ()
  			   || loop->header->count.initialized_p ()))
--- 258,264 ----
      {
        if (by_profile_only)
  	return -1;
!       expected = param_avg_loop_niter;
      }
    else if (loop->latch && (loop->latch->count.initialized_p ()
  			   || loop->header->count.initialized_p ()))
*************** expected_loop_iterations_unbounded (cons
*** 272,278 ****
  	{
            if (by_profile_only)
  	    return -1;
! 	  expected = PARAM_VALUE (PARAM_AVG_LOOP_NITER);
  	}
        else if (!count_in.nonzero_p ())
  	{
--- 276,282 ----
  	{
            if (by_profile_only)
  	    return -1;
! 	  expected = param_avg_loop_niter;
  	}
        else if (!count_in.nonzero_p ())
  	{
*************** expected_loop_iterations_unbounded (cons
*** 293,299 ****
      {
        if (by_profile_only)
  	return -1;
!       expected = PARAM_VALUE (PARAM_AVG_LOOP_NITER);
      }
  
    if (!by_profile_only)
--- 297,303 ----
      {
        if (by_profile_only)
  	return -1;
!       expected = param_avg_loop_niter;
      }
  
    if (!by_profile_only)
*************** expected_loop_iterations_unbounded (cons
*** 310,316 ****
     by REG_BR_PROB_BASE.  */
  
  unsigned
! expected_loop_iterations (struct loop *loop)
  {
    gcov_type expected = expected_loop_iterations_unbounded (loop);
    return (expected > REG_BR_PROB_BASE ? REG_BR_PROB_BASE : expected);
--- 314,320 ----
     by REG_BR_PROB_BASE.  */
  
  unsigned
! expected_loop_iterations (class loop *loop)
  {
    gcov_type expected = expected_loop_iterations_unbounded (loop);
    return (expected > REG_BR_PROB_BASE ? REG_BR_PROB_BASE : expected);
*************** expected_loop_iterations (struct loop *l
*** 319,327 ****
  /* Returns the maximum level of nesting of subloops of LOOP.  */
  
  unsigned
! get_loop_level (const struct loop *loop)
  {
!   const struct loop *ploop;
    unsigned mx = 0, l;
  
    for (ploop = loop->inner; ploop; ploop = ploop->next)
--- 323,331 ----
  /* Returns the maximum level of nesting of subloops of LOOP.  */
  
  unsigned
! get_loop_level (const class loop *loop)
  {
!   const class loop *ploop;
    unsigned mx = 0, l;
  
    for (ploop = loop->inner; ploop; ploop = ploop->next)
*************** init_set_costs (void)
*** 353,359 ****
  	&& !fixed_regs[i])
        {
  	target_avail_regs++;
! 	if (call_used_regs[i])
  	  target_clobbered_regs++;
        }
  
--- 357,366 ----
  	&& !fixed_regs[i])
        {
  	target_avail_regs++;
! 	/* ??? This is only a rough heuristic.  It doesn't cope well
! 	   with alternative ABIs, but that's an optimization rather than
! 	   correctness issue.  */
! 	if (default_function_abi.clobbers_full_reg_p (i))
  	  target_clobbered_regs++;
        }
  
*************** estimate_reg_pressure_cost (unsigned n_n
*** 422,428 ****
  
    if (optimize && (flag_ira_region == IRA_REGION_ALL
  		   || flag_ira_region == IRA_REGION_MIXED)
!       && number_of_loops (cfun) <= (unsigned) IRA_MAX_LOOPS_NUM)
      /* IRA regional allocation deals with high register pressure
         better.  So decrease the cost (to do more accurate the cost
         calculation for IRA, we need to know how many registers lives
--- 429,435 ----
  
    if (optimize && (flag_ira_region == IRA_REGION_ALL
  		   || flag_ira_region == IRA_REGION_MIXED)
!       && number_of_loops (cfun) <= (unsigned) param_ira_max_loops_num)
      /* IRA regional allocation deals with high register pressure
         better.  So decrease the cost (to do more accurate the cost
         calculation for IRA, we need to know how many registers lives
*************** mark_loop_exit_edges (void)
*** 463,478 ****
     to noreturn call.  */
  
  edge
! single_likely_exit (struct loop *loop)
  {
    edge found = single_exit (loop);
-   vec<edge> exits;
    unsigned i;
    edge ex;
  
    if (found)
      return found;
-   exits = get_loop_exit_edges (loop);
    FOR_EACH_VEC_ELT (exits, i, ex)
      {
        if (probably_never_executed_edge_p (cfun, ex)
--- 470,483 ----
     to noreturn call.  */
  
  edge
! single_likely_exit (class loop *loop, vec<edge> exits)
  {
    edge found = single_exit (loop);
    unsigned i;
    edge ex;
  
    if (found)
      return found;
    FOR_EACH_VEC_ELT (exits, i, ex)
      {
        if (probably_never_executed_edge_p (cfun, ex)
*************** single_likely_exit (struct loop *loop)
*** 485,496 ****
        if (!found)
  	found = ex;
        else
! 	{
! 	  exits.release ();
! 	  return NULL;
! 	}
      }
-   exits.release ();
    return found;
  }
  
--- 490,497 ----
        if (!found)
  	found = ex;
        else
! 	return NULL;
      }
    return found;
  }
  
*************** single_likely_exit (struct loop *loop)
*** 500,506 ****
     header != latch, latch is the 1-st block.  */
  
  vec<basic_block>
! get_loop_hot_path (const struct loop *loop)
  {
    basic_block bb = loop->header;
    vec<basic_block> path = vNULL;
--- 501,507 ----
     header != latch, latch is the 1-st block.  */
  
  vec<basic_block>
! get_loop_hot_path (const class loop *loop)
  {
    basic_block bb = loop->header;
    vec<basic_block> path = vNULL;
diff -Nrcpad gcc-9.3.0/gcc/cfgloopmanip.c gcc-10.1.0/gcc/cfgloopmanip.c
*** gcc-9.3.0/gcc/cfgloopmanip.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfgloopmanip.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Loop manipulation code for GNU compiler.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Loop manipulation code for GNU compiler.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 32,44 ****
  #include "tree-ssa-loop-manip.h"
  #include "dumpfile.h"
  
! static void copy_loops_to (struct loop **, int,
! 			   struct loop *);
  static void loop_redirect_edge (edge, basic_block);
  static void remove_bbs (basic_block *, int);
  static bool rpe_enum_p (const_basic_block, const void *);
  static int find_path (edge, basic_block **);
! static void fix_loop_placements (struct loop *, bool *);
  static bool fix_bb_placement (basic_block);
  static void fix_bb_placements (basic_block, bool *, bitmap);
  
--- 32,44 ----
  #include "tree-ssa-loop-manip.h"
  #include "dumpfile.h"
  
! static void copy_loops_to (class loop **, int,
! 			   class loop *);
  static void loop_redirect_edge (edge, basic_block);
  static void remove_bbs (basic_block *, int);
  static bool rpe_enum_p (const_basic_block, const void *);
  static int find_path (edge, basic_block **);
! static void fix_loop_placements (class loop *, bool *);
  static bool fix_bb_placement (basic_block);
  static void fix_bb_placements (basic_block, bool *, bitmap);
  
*************** fix_bb_placement (basic_block bb)
*** 89,95 ****
  {
    edge e;
    edge_iterator ei;
!   struct loop *loop = current_loops->tree_root, *act;
  
    FOR_EACH_EDGE (e, ei, bb->succs)
      {
--- 89,95 ----
  {
    edge e;
    edge_iterator ei;
!   class loop *loop = current_loops->tree_root, *act;
  
    FOR_EACH_EDGE (e, ei, bb->succs)
      {
*************** fix_bb_placement (basic_block bb)
*** 122,133 ****
     invalidate the information about irreducible regions.  */
  
  static bool
! fix_loop_placement (struct loop *loop, bool *irred_invalidated)
  {
    unsigned i;
    edge e;
    vec<edge> exits = get_loop_exit_edges (loop);
!   struct loop *father = current_loops->tree_root, *act;
    bool ret = false;
  
    FOR_EACH_VEC_ELT (exits, i, e)
--- 122,133 ----
     invalidate the information about irreducible regions.  */
  
  static bool
! fix_loop_placement (class loop *loop, bool *irred_invalidated)
  {
    unsigned i;
    edge e;
    vec<edge> exits = get_loop_exit_edges (loop);
!   class loop *father = current_loops->tree_root, *act;
    bool ret = false;
  
    FOR_EACH_VEC_ELT (exits, i, e)
*************** fix_bb_placements (basic_block from,
*** 182,188 ****
  		   bitmap loop_closed_ssa_invalidated)
  {
    basic_block *queue, *qtop, *qbeg, *qend;
!   struct loop *base_loop, *target_loop;
    edge e;
  
    /* We pass through blocks back-reachable from FROM, testing whether some
--- 182,188 ----
  		   bitmap loop_closed_ssa_invalidated)
  {
    basic_block *queue, *qtop, *qbeg, *qend;
!   class loop *base_loop, *target_loop;
    edge e;
  
    /* We pass through blocks back-reachable from FROM, testing whether some
*************** fix_bb_placements (basic_block from,
*** 255,261 ****
        FOR_EACH_EDGE (e, ei, from->preds)
  	{
  	  basic_block pred = e->src;
! 	  struct loop *nca;
  
  	  if (e->flags & EDGE_IRREDUCIBLE_LOOP)
  	    *irred_invalidated = true;
--- 255,261 ----
        FOR_EACH_EDGE (e, ei, from->preds)
  	{
  	  basic_block pred = e->src;
! 	  class loop *nca;
  
  	  if (e->flags & EDGE_IRREDUCIBLE_LOOP)
  	    *irred_invalidated = true;
*************** remove_path (edge e, bool *irred_invalid
*** 307,313 ****
    int i, nrem, n_bord_bbs;
    bool local_irred_invalidated = false;
    edge_iterator ei;
!   struct loop *l, *f;
  
    if (! irred_invalidated)
      irred_invalidated = &local_irred_invalidated;
--- 307,313 ----
    int i, nrem, n_bord_bbs;
    bool local_irred_invalidated = false;
    edge_iterator ei;
!   class loop *l, *f;
  
    if (! irred_invalidated)
      irred_invalidated = &local_irred_invalidated;
*************** remove_path (edge e, bool *irred_invalid
*** 364,370 ****
  
    for (i = 0; i < nrem; i++)
      {
-       bb = rem_bbs[i];
        FOR_EACH_EDGE (ae, ei, rem_bbs[i]->succs)
  	if (ae->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)
  	    && !bitmap_bit_p (seen, ae->dest->index))
--- 364,369 ----
*************** remove_path (edge e, bool *irred_invalid
*** 428,434 ****
  /* Creates place for a new LOOP in loops structure of FN.  */
  
  void
! place_new_loop (struct function *fn, struct loop *loop)
  {
    loop->num = number_of_loops (fn);
    vec_safe_push (loops_for_fn (fn)->larray, loop);
--- 427,433 ----
  /* Creates place for a new LOOP in loops structure of FN.  */
  
  void
! place_new_loop (struct function *fn, class loop *loop)
  {
    loop->num = number_of_loops (fn);
    vec_safe_push (loops_for_fn (fn)->larray, loop);
*************** place_new_loop (struct function *fn, str
*** 439,449 ****
     outer.  */
  
  void
! add_loop (struct loop *loop, struct loop *outer)
  {
    basic_block *bbs;
    int i, n;
!   struct loop *subloop;
    edge e;
    edge_iterator ei;
  
--- 438,448 ----
     outer.  */
  
  void
! add_loop (class loop *loop, class loop *outer)
  {
    basic_block *bbs;
    int i, n;
!   class loop *subloop;
    edge e;
    edge_iterator ei;
  
*************** add_loop (struct loop *loop, struct loop
*** 491,497 ****
  /* Scale profile of loop by P.  */
  
  void
! scale_loop_frequencies (struct loop *loop, profile_probability p)
  {
    basic_block *bbs;
  
--- 490,496 ----
  /* Scale profile of loop by P.  */
  
  void
! scale_loop_frequencies (class loop *loop, profile_probability p)
  {
    basic_block *bbs;
  
*************** scale_loop_frequencies (struct loop *loo
*** 509,515 ****
     they need to be scaled synchronously.  */
  
  void
! scale_loop_profile (struct loop *loop, profile_probability p,
  		    gcov_type iteration_bound)
  {
    edge e, preheader_e;
--- 508,514 ----
     they need to be scaled synchronously.  */
  
  void
! scale_loop_profile (class loop *loop, profile_probability p,
  		    gcov_type iteration_bound)
  {
    edge e, preheader_e;
*************** scale_loop_profile (struct loop *loop, p
*** 619,625 ****
  /* Recompute dominance information for basic blocks outside LOOP.  */
  
  static void
! update_dominators_in_loop (struct loop *loop)
  {
    vec<basic_block> dom_bbs = vNULL;
    basic_block *body;
--- 618,624 ----
  /* Recompute dominance information for basic blocks outside LOOP.  */
  
  static void
! update_dominators_in_loop (class loop *loop)
  {
    vec<basic_block> dom_bbs = vNULL;
    basic_block *body;
*************** create_empty_if_region_on_edge (edge ent
*** 764,780 ****
     should be used only when the UPPER_BOUND expression is a loop
     invariant.  */
  
! struct loop *
  create_empty_loop_on_edge (edge entry_edge,
  			   tree initial_value,
  			   tree stride, tree upper_bound,
  			   tree iv,
  			   tree *iv_before,
  			   tree *iv_after,
! 			   struct loop *outer)
  {
    basic_block loop_header, loop_latch, succ_bb, pred_bb;
!   struct loop *loop;
    gimple_stmt_iterator gsi;
    gimple_seq stmts;
    gcond *cond_expr;
--- 763,779 ----
     should be used only when the UPPER_BOUND expression is a loop
     invariant.  */
  
! class loop *
  create_empty_loop_on_edge (edge entry_edge,
  			   tree initial_value,
  			   tree stride, tree upper_bound,
  			   tree iv,
  			   tree *iv_before,
  			   tree *iv_after,
! 			   class loop *outer)
  {
    basic_block loop_header, loop_latch, succ_bb, pred_bb;
!   class loop *loop;
    gimple_stmt_iterator gsi;
    gimple_seq stmts;
    gcond *cond_expr;
*************** create_empty_loop_on_edge (edge entry_ed
*** 858,864 ****
     Returns the newly created loop.  Frequencies and counts in the new loop
     are scaled by FALSE_SCALE and in the old one by TRUE_SCALE.  */
  
! struct loop *
  loopify (edge latch_edge, edge header_edge,
  	 basic_block switch_bb, edge true_edge, edge false_edge,
  	 bool redirect_all_edges, profile_probability true_scale,
--- 857,863 ----
     Returns the newly created loop.  Frequencies and counts in the new loop
     are scaled by FALSE_SCALE and in the old one by TRUE_SCALE.  */
  
! class loop *
  loopify (edge latch_edge, edge header_edge,
  	 basic_block switch_bb, edge true_edge, edge false_edge,
  	 bool redirect_all_edges, profile_probability true_scale,
*************** loopify (edge latch_edge, edge header_ed
*** 866,873 ****
  {
    basic_block succ_bb = latch_edge->dest;
    basic_block pred_bb = header_edge->src;
!   struct loop *loop = alloc_loop ();
!   struct loop *outer = loop_outer (succ_bb->loop_father);
    profile_count cnt;
  
    loop->header = header_edge->dest;
--- 865,872 ----
  {
    basic_block succ_bb = latch_edge->dest;
    basic_block pred_bb = header_edge->src;
!   class loop *loop = alloc_loop ();
!   class loop *outer = loop_outer (succ_bb->loop_father);
    profile_count cnt;
  
    loop->header = header_edge->dest;
*************** loopify (edge latch_edge, edge header_ed
*** 924,934 ****
     basic blocks that had non-trivial update on their loop_father.*/
  
  void
! unloop (struct loop *loop, bool *irred_invalidated,
  	bitmap loop_closed_ssa_invalidated)
  {
    basic_block *body;
!   struct loop *ploop;
    unsigned i, n;
    basic_block latch = loop->latch;
    bool dummy = false;
--- 923,933 ----
     basic blocks that had non-trivial update on their loop_father.*/
  
  void
! unloop (class loop *loop, bool *irred_invalidated,
  	bitmap loop_closed_ssa_invalidated)
  {
    basic_block *body;
!   class loop *ploop;
    unsigned i, n;
    basic_block latch = loop->latch;
    bool dummy = false;
*************** unloop (struct loop *loop, bool *irred_i
*** 979,987 ****
     invalidate the information about irreducible regions.  */
  
  static void
! fix_loop_placements (struct loop *loop, bool *irred_invalidated)
  {
!   struct loop *outer;
  
    while (loop_outer (loop))
      {
--- 978,986 ----
     invalidate the information about irreducible regions.  */
  
  static void
! fix_loop_placements (class loop *loop, bool *irred_invalidated)
  {
!   class loop *outer;
  
    while (loop_outer (loop))
      {
*************** fix_loop_placements (struct loop *loop,
*** 1004,1010 ****
     the loop into its duplicate.  */
  
  void
! copy_loop_info (struct loop *loop, struct loop *target)
  {
    gcc_checking_assert (!target->any_upper_bound && !target->any_estimate);
    target->any_upper_bound = loop->any_upper_bound;
--- 1003,1009 ----
     the loop into its duplicate.  */
  
  void
! copy_loop_info (class loop *loop, class loop *target)
  {
    gcc_checking_assert (!target->any_upper_bound && !target->any_estimate);
    target->any_upper_bound = loop->any_upper_bound;
*************** copy_loop_info (struct loop *loop, struc
*** 1016,1021 ****
--- 1015,1021 ----
    target->nb_iterations_estimate = loop->nb_iterations_estimate;
    target->estimate_state = loop->estimate_state;
    target->safelen = loop->safelen;
+   target->simdlen = loop->simdlen;
    target->constraints = loop->constraints;
    target->can_be_parallel = loop->can_be_parallel;
    target->warned_aggressive_loop_optimizations
*************** copy_loop_info (struct loop *loop, struc
*** 1023,1028 ****
--- 1023,1029 ----
    target->dont_vectorize = loop->dont_vectorize;
    target->force_vectorize = loop->force_vectorize;
    target->in_oacc_kernels_region = loop->in_oacc_kernels_region;
+   target->finite_p = loop->finite_p;
    target->unroll = loop->unroll;
    target->owned_clique = loop->owned_clique;
  }
*************** copy_loop_info (struct loop *loop, struc
*** 1031,1040 ****
     created loop into loops structure.  If AFTER is non-null
     the new loop is added at AFTER->next, otherwise in front of TARGETs
     sibling list.  */
! struct loop *
! duplicate_loop (struct loop *loop, struct loop *target, struct loop *after)
  {
!   struct loop *cloop;
    cloop = alloc_loop ();
    place_new_loop (cfun, cloop);
   
--- 1032,1041 ----
     created loop into loops structure.  If AFTER is non-null
     the new loop is added at AFTER->next, otherwise in front of TARGETs
     sibling list.  */
! class loop *
! duplicate_loop (class loop *loop, class loop *target, class loop *after)
  {
!   class loop *cloop;
    cloop = alloc_loop ();
    place_new_loop (cfun, cloop);
   
*************** duplicate_loop (struct loop *loop, struc
*** 1053,1061 ****
     newly created loops into loop tree at the end of TARGETs sibling
     list in the original order.  */
  void
! duplicate_subloops (struct loop *loop, struct loop *target)
  {
!   struct loop *aloop, *cloop, *tail;
  
    for (tail = target->inner; tail && tail->next; tail = tail->next)
      ;
--- 1054,1062 ----
     newly created loops into loop tree at the end of TARGETs sibling
     list in the original order.  */
  void
! duplicate_subloops (class loop *loop, class loop *target)
  {
!   class loop *aloop, *cloop, *tail;
  
    for (tail = target->inner; tail && tail->next; tail = tail->next)
      ;
*************** duplicate_subloops (struct loop *loop, s
*** 1072,1080 ****
     into TARGET loop, placing newly created loops into loop tree adding
     them to TARGETs sibling list at the end in order.  */
  static void
! copy_loops_to (struct loop **copied_loops, int n, struct loop *target)
  {
!   struct loop *aloop, *tail;
    int i;
  
    for (tail = target->inner; tail && tail->next; tail = tail->next)
--- 1073,1081 ----
     into TARGET loop, placing newly created loops into loop tree adding
     them to TARGETs sibling list at the end in order.  */
  static void
! copy_loops_to (class loop **copied_loops, int n, class loop *target)
  {
!   class loop *aloop, *tail;
    int i;
  
    for (tail = target->inner; tail && tail->next; tail = tail->next)
*************** loop_redirect_edge (edge e, basic_block
*** 1100,1106 ****
  
  /* Check whether LOOP's body can be duplicated.  */
  bool
! can_duplicate_loop_p (const struct loop *loop)
  {
    int ret;
    basic_block *bbs = get_loop_body (loop);
--- 1101,1107 ----
  
  /* Check whether LOOP's body can be duplicated.  */
  bool
! can_duplicate_loop_p (const class loop *loop)
  {
    int ret;
    basic_block *bbs = get_loop_body (loop);
*************** can_duplicate_loop_p (const struct loop
*** 1124,1136 ****
     impossible.  */
  
  bool
! duplicate_loop_to_header_edge (struct loop *loop, edge e,
  			       unsigned int ndupl, sbitmap wont_exit,
  			       edge orig, vec<edge> *to_remove,
  			       int flags)
  {
!   struct loop *target, *aloop;
!   struct loop **orig_loops;
    unsigned n_orig_loops;
    basic_block header = loop->header, latch = loop->latch;
    basic_block *new_bbs, *bbs, *first_active;
--- 1125,1137 ----
     impossible.  */
  
  bool
! duplicate_loop_to_header_edge (class loop *loop, edge e,
  			       unsigned int ndupl, sbitmap wont_exit,
  			       edge orig, vec<edge> *to_remove,
  			       int flags)
  {
!   class loop *target, *aloop;
!   class loop **orig_loops;
    unsigned n_orig_loops;
    basic_block header = loop->header, latch = loop->latch;
    basic_block *new_bbs, *bbs, *first_active;
*************** duplicate_loop_to_header_edge (struct lo
*** 1276,1282 ****
    n_orig_loops = 0;
    for (aloop = loop->inner; aloop; aloop = aloop->next)
      n_orig_loops++;
!   orig_loops = XNEWVEC (struct loop *, n_orig_loops);
    for (aloop = loop->inner, i = 0; aloop; aloop = aloop->next, i++)
      orig_loops[i] = aloop;
  
--- 1277,1283 ----
    n_orig_loops = 0;
    for (aloop = loop->inner; aloop; aloop = aloop->next)
      n_orig_loops++;
!   orig_loops = XNEWVEC (class loop *, n_orig_loops);
    for (aloop = loop->inner, i = 0; aloop; aloop = aloop->next, i++)
      orig_loops[i] = aloop;
  
*************** mfb_keep_just (edge e)
*** 1453,1459 ****
  /* True when a candidate preheader BLOCK has predecessors from LOOP.  */
  
  static bool
! has_preds_from_loop (basic_block block, struct loop *loop)
  {
    edge e;
    edge_iterator ei;
--- 1454,1460 ----
  /* True when a candidate preheader BLOCK has predecessors from LOOP.  */
  
  static bool
! has_preds_from_loop (basic_block block, class loop *loop)
  {
    edge e;
    edge_iterator ei;
*************** has_preds_from_loop (basic_block block,
*** 1473,1479 ****
     The function also updates dominators.  */
  
  basic_block
! create_preheader (struct loop *loop, int flags)
  {
    edge e;
    basic_block dummy;
--- 1474,1480 ----
     The function also updates dominators.  */
  
  basic_block
! create_preheader (class loop *loop, int flags)
  {
    edge e;
    basic_block dummy;
*************** create_preheader (struct loop *loop, int
*** 1573,1579 ****
  void
  create_preheaders (int flags)
  {
!   struct loop *loop;
  
    if (!current_loops)
      return;
--- 1574,1580 ----
  void
  create_preheaders (int flags)
  {
!   class loop *loop;
  
    if (!current_loops)
      return;
*************** create_preheaders (int flags)
*** 1588,1594 ****
  void
  force_single_succ_latches (void)
  {
!   struct loop *loop;
    edge e;
  
    FOR_EACH_LOOP (loop, 0)
--- 1589,1595 ----
  void
  force_single_succ_latches (void)
  {
!   class loop *loop;
    edge e;
  
    FOR_EACH_LOOP (loop, 0)
*************** lv_adjust_loop_entry_edge (basic_block f
*** 1677,1684 ****
     If PLACE_AFTER is true, we place the new loop after LOOP in the
     instruction stream, otherwise it is placed before LOOP.  */
  
! struct loop *
! loop_version (struct loop *loop,
  	      void *cond_expr, basic_block *condition_bb,
  	      profile_probability then_prob, profile_probability else_prob,
  	      profile_probability then_scale, profile_probability else_scale,
--- 1678,1685 ----
     If PLACE_AFTER is true, we place the new loop after LOOP in the
     instruction stream, otherwise it is placed before LOOP.  */
  
! class loop *
! loop_version (class loop *loop,
  	      void *cond_expr, basic_block *condition_bb,
  	      profile_probability then_prob, profile_probability else_prob,
  	      profile_probability then_scale, profile_probability else_scale,
*************** loop_version (struct loop *loop,
*** 1687,1693 ****
    basic_block first_head, second_head;
    edge entry, latch_edge, true_edge, false_edge;
    int irred_flag;
!   struct loop *nloop;
    basic_block cond_bb;
  
    /* Record entry and latch edges for the loop */
--- 1688,1694 ----
    basic_block first_head, second_head;
    edge entry, latch_edge, true_edge, false_edge;
    int irred_flag;
!   class loop *nloop;
    basic_block cond_bb;
  
    /* Record entry and latch edges for the loop */
diff -Nrcpad gcc-9.3.0/gcc/cfgloopmanip.h gcc-10.1.0/gcc/cfgloopmanip.h
*** gcc-9.3.0/gcc/cfgloopmanip.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfgloopmanip.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Loop manipulation header.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Loop manipulation header.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** enum
*** 35,64 ****
  extern edge mfb_kj_edge;
  
  extern bool remove_path (edge, bool * = NULL, bitmap = NULL);
! extern void place_new_loop (struct function *, struct loop *);
! extern void add_loop (struct loop *, struct loop *);
! extern void scale_loop_frequencies (struct loop *, profile_probability);
! extern void scale_loop_profile (struct loop *, profile_probability, gcov_type);
  extern edge create_empty_if_region_on_edge (edge, tree);
! extern struct loop *create_empty_loop_on_edge (edge, tree, tree, tree, tree,
! 					       tree *, tree *, struct loop *);
! extern struct loop *loopify (edge, edge,
  			     basic_block, edge, edge, bool,
  			     profile_probability, profile_probability);
! extern void unloop (struct loop *, bool *, bitmap);
! extern void copy_loop_info (struct loop *loop, struct loop *target);
! extern struct loop * duplicate_loop (struct loop *, struct loop *,
! 				     struct loop * = NULL);
! extern void duplicate_subloops (struct loop *, struct loop *);
! extern bool can_duplicate_loop_p (const struct loop *loop);
! extern bool duplicate_loop_to_header_edge (struct loop *, edge,
  					   unsigned, sbitmap, edge,
   					   vec<edge> *, int);
  extern bool mfb_keep_just (edge);
! basic_block create_preheader (struct loop *, int);
  extern void create_preheaders (int);
  extern void force_single_succ_latches (void);
! struct loop * loop_version (struct loop *, void *,
  			    basic_block *,
  			    profile_probability, profile_probability,
  			    profile_probability, profile_probability, bool);
--- 35,64 ----
  extern edge mfb_kj_edge;
  
  extern bool remove_path (edge, bool * = NULL, bitmap = NULL);
! extern void place_new_loop (struct function *, class loop *);
! extern void add_loop (class loop *, class loop *);
! extern void scale_loop_frequencies (class loop *, profile_probability);
! extern void scale_loop_profile (class loop *, profile_probability, gcov_type);
  extern edge create_empty_if_region_on_edge (edge, tree);
! extern class loop *create_empty_loop_on_edge (edge, tree, tree, tree, tree,
! 					       tree *, tree *, class loop *);
! extern class loop *loopify (edge, edge,
  			     basic_block, edge, edge, bool,
  			     profile_probability, profile_probability);
! extern void unloop (class loop *, bool *, bitmap);
! extern void copy_loop_info (class loop *loop, class loop *target);
! extern class loop * duplicate_loop (class loop *, class loop *,
! 				     class loop * = NULL);
! extern void duplicate_subloops (class loop *, class loop *);
! extern bool can_duplicate_loop_p (const class loop *loop);
! extern bool duplicate_loop_to_header_edge (class loop *, edge,
  					   unsigned, sbitmap, edge,
   					   vec<edge> *, int);
  extern bool mfb_keep_just (edge);
! basic_block create_preheader (class loop *, int);
  extern void create_preheaders (int);
  extern void force_single_succ_latches (void);
! class loop * loop_version (class loop *, void *,
  			    basic_block *,
  			    profile_probability, profile_probability,
  			    profile_probability, profile_probability, bool);
diff -Nrcpad gcc-9.3.0/gcc/cfgrtl.c gcc-10.1.0/gcc/cfgrtl.c
*** gcc-9.3.0/gcc/cfgrtl.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfgrtl.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Control flow graph manipulation code for GNU compiler.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Control flow graph manipulation code for GNU compiler.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 62,67 ****
--- 62,73 ----
  #include "tree-pass.h"
  #include "print-rtl.h"
  
+ /* Disable warnings about missing quoting in GCC diagnostics.  */
+ #if __GNUC__ >= 10
+ #  pragma GCC diagnostic push
+ #  pragma GCC diagnostic ignored "-Wformat-diag"
+ #endif
+ 
  /* Holds the interesting leading and trailing notes for the function.
     Only applicable if the CFG is in cfglayout mode.  */
  static GTY(()) rtx_insn *cfg_layout_function_footer;
*************** delete_insn_and_edges (rtx_insn *insn)
*** 224,233 ****
  {
    bool purge = false;
  
!   if (INSN_P (insn)
!       && BLOCK_FOR_INSN (insn)
!       && BB_END (BLOCK_FOR_INSN (insn)) == insn)
!     purge = true;
    delete_insn (insn);
    if (purge)
      return purge_dead_edges (BLOCK_FOR_INSN (insn));
--- 230,249 ----
  {
    bool purge = false;
  
!   if (INSN_P (insn) && BLOCK_FOR_INSN (insn))
!     {
!       basic_block bb = BLOCK_FOR_INSN (insn);
!       if (BB_END (bb) == insn)
! 	purge = true;
!       else if (DEBUG_INSN_P (BB_END (bb)))
! 	for (rtx_insn *dinsn = NEXT_INSN (insn);
! 	     DEBUG_INSN_P (dinsn); dinsn = NEXT_INSN (dinsn))
! 	  if (BB_END (bb) == dinsn)
! 	    {
! 	      purge = true;
! 	      break;
! 	    }
!     }
    delete_insn (insn);
    if (purge)
      return purge_dead_edges (BLOCK_FOR_INSN (insn));
*************** update_bb_for_insn (basic_block bb)
*** 543,549 ****
  }
  
  
! /* Like active_insn_p, except keep the return value clobber around
     even after reload.  */
  
  static bool
--- 559,565 ----
  }
  
  
! /* Like active_insn_p, except keep the return value use or clobber around
     even after reload.  */
  
  static bool
*************** flow_active_insn_p (const rtx_insn *insn
*** 556,563 ****
       programs that fail to return a value.  Its effect is to
       keep the return value from being live across the entire
       function.  If we allow it to be skipped, we introduce the
!      possibility for register lifetime confusion.  */
!   if (GET_CODE (PATTERN (insn)) == CLOBBER
        && REG_P (XEXP (PATTERN (insn), 0))
        && REG_FUNCTION_VALUE_P (XEXP (PATTERN (insn), 0)))
      return true;
--- 572,583 ----
       programs that fail to return a value.  Its effect is to
       keep the return value from being live across the entire
       function.  If we allow it to be skipped, we introduce the
!      possibility for register lifetime confusion.
!      Similarly, keep a USE of the function return value, otherwise
!      the USE is dropped and we could fail to thread jump if USE
!      appears on some paths and not on others, see PR90257.  */
!   if ((GET_CODE (PATTERN (insn)) == CLOBBER
!        || GET_CODE (PATTERN (insn)) == USE)
        && REG_P (XEXP (PATTERN (insn), 0))
        && REG_FUNCTION_VALUE_P (XEXP (PATTERN (insn), 0)))
      return true;
*************** patch_jump_insn (rtx_insn *insn, rtx_ins
*** 1204,1213 ****
  	  }
  
        /* Handle casesi dispatch insns.  */
!       if ((tmp = single_set (insn)) != NULL
! 	  && SET_DEST (tmp) == pc_rtx
! 	  && GET_CODE (SET_SRC (tmp)) == IF_THEN_ELSE
! 	  && GET_CODE (XEXP (SET_SRC (tmp), 2)) == LABEL_REF
  	  && label_ref_label (XEXP (SET_SRC (tmp), 2)) == old_label)
  	{
  	  XEXP (SET_SRC (tmp), 2) = gen_rtx_LABEL_REF (Pmode,
--- 1224,1230 ----
  	  }
  
        /* Handle casesi dispatch insns.  */
!       if ((tmp = tablejump_casesi_pattern (insn)) != NULL_RTX
  	  && label_ref_label (XEXP (SET_SRC (tmp), 2)) == old_label)
  	{
  	  XEXP (SET_SRC (tmp), 2) = gen_rtx_LABEL_REF (Pmode,
*************** commit_edge_insertions (void)
*** 2095,2101 ****
       which will be done by fixup_partitions.  */
    fixup_partitions ();
  
!   checking_verify_flow_info ();
  
    FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR_FOR_FN (cfun),
  		  EXIT_BLOCK_PTR_FOR_FN (cfun), next_bb)
--- 2112,2119 ----
       which will be done by fixup_partitions.  */
    fixup_partitions ();
  
!   if (!currently_expanding_to_rtl)
!     checking_verify_flow_info ();
  
    FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR_FOR_FN (cfun),
  		  EXIT_BLOCK_PTR_FOR_FN (cfun), next_bb)
*************** commit_edge_insertions (void)
*** 2105,2111 ****
  
        FOR_EACH_EDGE (e, ei, bb->succs)
  	if (e->insns.r)
! 	  commit_one_edge_insertion (e);
      }
  }
  
--- 2123,2133 ----
  
        FOR_EACH_EDGE (e, ei, bb->succs)
  	if (e->insns.r)
! 	  {
! 	    if (currently_expanding_to_rtl)
! 	      rebuild_jump_labels_chain (e->insns.r);
! 	    commit_one_edge_insertion (e);
! 	  }
      }
  }
  
*************** print_rtl_with_bb (FILE *outf, const rtx
*** 2183,2189 ****
        if (df)
  	df_dump_start (outf);
  
!       if (flags & TDF_BLOCKS)
  	{
  	  FOR_EACH_BB_REVERSE_FN (bb, cfun)
  	    {
--- 2205,2211 ----
        if (df)
  	df_dump_start (outf);
  
!       if (cfun->curr_properties & PROP_cfg)
  	{
  	  FOR_EACH_BB_REVERSE_FN (bb, cfun)
  	    {
*************** print_rtl_with_bb (FILE *outf, const rtx
*** 2191,2206 ****
  
  	      start[INSN_UID (BB_HEAD (bb))] = bb;
  	      end[INSN_UID (BB_END (bb))] = bb;
! 	      for (x = BB_HEAD (bb); x != NULL_RTX; x = NEXT_INSN (x))
  		{
! 		  enum bb_state state = IN_MULTIPLE_BB;
  
! 		  if (in_bb_p[INSN_UID (x)] == NOT_IN_BB)
! 		    state = IN_ONE_BB;
! 		  in_bb_p[INSN_UID (x)] = state;
  
! 		  if (x == BB_END (bb))
! 		    break;
  		}
  	    }
  	}
--- 2213,2231 ----
  
  	      start[INSN_UID (BB_HEAD (bb))] = bb;
  	      end[INSN_UID (BB_END (bb))] = bb;
! 	      if (flags & TDF_BLOCKS)
  		{
! 		  for (x = BB_HEAD (bb); x != NULL_RTX; x = NEXT_INSN (x))
! 		    {
! 		      enum bb_state state = IN_MULTIPLE_BB;
  
! 		      if (in_bb_p[INSN_UID (x)] == NOT_IN_BB)
! 			state = IN_ONE_BB;
! 		      in_bb_p[INSN_UID (x)] = state;
  
! 		      if (x == BB_END (bb))
! 			break;
! 		    }
  		}
  	    }
  	}
*************** print_rtl_with_bb (FILE *outf, const rtx
*** 2234,2249 ****
  	  if (flags & TDF_DETAILS)
  	    df_dump_insn_bottom (tmp_rtx, outf);
  
! 	  if (flags & TDF_BLOCKS)
  	    {
! 	      bb = end[INSN_UID (tmp_rtx)];
! 	      if (bb != NULL)
  		{
  		  dump_bb_info (outf, bb, 0, dump_flags, false, true);
  		  if (df && (flags & TDF_DETAILS))
  		    df_dump_bottom (bb, outf);
  		  putc ('\n', outf);
  		}
  	    }
  	}
  
--- 2259,2294 ----
  	  if (flags & TDF_DETAILS)
  	    df_dump_insn_bottom (tmp_rtx, outf);
  
! 	  bb = end[INSN_UID (tmp_rtx)];
! 	  if (bb != NULL)
  	    {
! 	      if (flags & TDF_BLOCKS)
  		{
  		  dump_bb_info (outf, bb, 0, dump_flags, false, true);
  		  if (df && (flags & TDF_DETAILS))
  		    df_dump_bottom (bb, outf);
  		  putc ('\n', outf);
  		}
+ 	      /* Emit a hint if the fallthrough target of current basic block
+ 	         isn't the one placed right next.  */
+ 	      else if (EDGE_COUNT (bb->succs) > 0)
+ 		{
+ 		  gcc_assert (BB_END (bb) == tmp_rtx);
+ 		  const rtx_insn *ninsn = NEXT_INSN (tmp_rtx);
+ 		  /* Bypass intervening deleted-insn notes and debug insns.  */
+ 		  while (ninsn
+ 			 && !NONDEBUG_INSN_P (ninsn)
+ 			 && !start[INSN_UID (ninsn)])
+ 		    ninsn = NEXT_INSN (ninsn);
+ 		  edge e = find_fallthru_edge (bb->succs);
+ 		  if (e && ninsn)
+ 		    {
+ 		      basic_block dest = e->dest;
+ 		      if (start[INSN_UID (ninsn)] != dest)
+ 			fprintf (outf, "%s      ; pc falls through to BB %d\n",
+ 				 print_rtx_head, dest->index);
+ 		    }
+ 		}
  	    }
  	}
  
*************** static vec<basic_block>
*** 2340,2346 ****
  find_partition_fixes (bool flag_only)
  {
    basic_block bb;
-   vec<basic_block> bbs_in_cold_partition = vNULL;
    vec<basic_block> bbs_to_fix = vNULL;
    hash_set<basic_block> set;
  
--- 2385,2390 ----
*************** find_partition_fixes (bool flag_only)
*** 2359,2365 ****
  	else
  	  BB_SET_PARTITION (bb, BB_COLD_PARTITION);
  	bbs_to_fix.safe_push (bb);
- 	bbs_in_cold_partition.safe_push (bb);
        }
  
    return bbs_to_fix;
--- 2403,2408 ----
*************** rtl_verify_bb_layout (void)
*** 2958,2964 ****
    basic_block last_bb_seen = ENTRY_BLOCK_PTR_FOR_FN (cfun), curr_bb = NULL;
  
    num_bb_notes = 0;
-   last_bb_seen = ENTRY_BLOCK_PTR_FOR_FN (cfun);
  
    for (x = rtx_first; x; x = NEXT_INSN (x))
      {
--- 3001,3006 ----
*************** relink_block_chain (bool stay_in_cfglayo
*** 3666,3678 ****
  	{
  	  fprintf (dump_file, " %i ", index);
  	  if (get_bb_original (bb))
! 	    fprintf (dump_file, "duplicate of %i ",
  		     get_bb_original (bb)->index);
  	  else if (forwarder_block_p (bb)
  		   && !LABEL_P (BB_HEAD (bb)))
! 	    fprintf (dump_file, "compensation ");
  	  else
! 	    fprintf (dump_file, "bb %i ", bb->index);
  	}
      }
  
--- 3708,3720 ----
  	{
  	  fprintf (dump_file, " %i ", index);
  	  if (get_bb_original (bb))
! 	    fprintf (dump_file, "duplicate of %i\n",
  		     get_bb_original (bb)->index);
  	  else if (forwarder_block_p (bb)
  		   && !LABEL_P (BB_HEAD (bb)))
! 	    fprintf (dump_file, "compensation\n");
  	  else
! 	    fprintf (dump_file, "bb %i\n", bb->index);
  	}
      }
  
*************** struct cfg_hooks cfg_layout_rtl_cfg_hook
*** 5187,5189 ****
--- 5229,5235 ----
  };
  
  #include "gt-cfgrtl.h"
+ 
+ #if __GNUC__ >= 10
+ #  pragma GCC diagnostic pop
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/cfgrtl.h gcc-10.1.0/gcc/cfgrtl.h
*** gcc-9.3.0/gcc/cfgrtl.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cfgrtl.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Define control flow data structures for the CFG.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Define control flow data structures for the CFG.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/cgraph.c gcc-10.1.0/gcc/cgraph.c
*** gcc-9.3.0/gcc/cgraph.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cgraph.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Callgraph handling code.
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
     Contributed by Jan Hubicka
  
  This file is part of GCC.
--- 1,5 ----
  /* Callgraph handling code.
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
     Contributed by Jan Hubicka
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 57,68 ****
  #include "gimple-pretty-print.h"
  #include "tree-dfa.h"
  #include "profile.h"
- #include "params.h"
  #include "context.h"
  #include "gimplify.h"
  #include "stringpool.h"
  #include "attribs.h"
  #include "selftest.h"
  
  /* FIXME: Only for PROP_loops, but cgraph shouldn't have to know about this.  */
  #include "tree-pass.h"
--- 57,69 ----
  #include "gimple-pretty-print.h"
  #include "tree-dfa.h"
  #include "profile.h"
  #include "context.h"
  #include "gimplify.h"
  #include "stringpool.h"
  #include "attribs.h"
  #include "selftest.h"
+ #include "tree-into-ssa.h"
+ #include "ipa-inline.h"
  
  /* FIXME: Only for PROP_loops, but cgraph shouldn't have to know about this.  */
  #include "tree-pass.h"
*************** delete_function_version (cgraph_function
*** 197,202 ****
--- 198,206 ----
    if (decl_v == NULL)
      return;
  
+   if (version_info_node == decl_v)
+     version_info_node = NULL;
+ 
    if (decl_v->prev != NULL)
      decl_v->prev->next = decl_v->next;
  
*************** symbol_table::initialize (void)
*** 280,293 ****
  cgraph_node *
  symbol_table::create_empty (void)
  {
-   cgraph_node *node = allocate_cgraph_symbol ();
- 
-   node->type = SYMTAB_FUNCTION;
-   node->frequency = NODE_FREQUENCY_NORMAL;
-   node->count_materialization_scale = REG_BR_PROB_BASE;
    cgraph_count++;
! 
!   return node;
  }
  
  /* Register HOOK to be called with DATA on each removed edge.  */
--- 284,291 ----
  cgraph_node *
  symbol_table::create_empty (void)
  {
    cgraph_count++;
!   return new (ggc_alloc<cgraph_node> ()) cgraph_node (cgraph_max_uid++);
  }
  
  /* Register HOOK to be called with DATA on each removed edge.  */
*************** cgraph_node::create (tree decl)
*** 507,514 ****
  
    node->decl = decl;
  
-   node->count = profile_count::uninitialized ();
- 
    if ((flag_openacc || flag_openmp)
        && lookup_attribute ("omp declare target", DECL_ATTRIBUTES (decl)))
      {
--- 505,510 ----
*************** cgraph_node::get_create (tree decl)
*** 539,545 ****
  {
    cgraph_node *first_clone = cgraph_node::get (decl);
  
!   if (first_clone && !first_clone->global.inlined_to)
      return first_clone;
  
    cgraph_node *node = cgraph_node::create (decl);
--- 535,541 ----
  {
    cgraph_node *first_clone = cgraph_node::get (decl);
  
!   if (first_clone && !first_clone->inlined_to)
      return first_clone;
  
    cgraph_node *node = cgraph_node::create (decl);
*************** cgraph_node::get_create (tree decl)
*** 547,552 ****
--- 543,549 ----
      {
        first_clone->clone_of = node;
        node->clones = first_clone;
+       node->order = first_clone->order;
        symtab->symtab_prevail_in_asm_name_hash (node);
        node->decl->decl_with_vis.symtab_node = node;
        if (dump_file)
*************** cgraph_node::get_create (tree decl)
*** 561,567 ****
  }
  
  /* Mark ALIAS as an alias to DECL.  DECL_NODE is cgraph node representing
!    the function body is associated with (not necessarily cgraph_node (DECL).  */
  
  cgraph_node *
  cgraph_node::create_alias (tree alias, tree target)
--- 558,565 ----
  }
  
  /* Mark ALIAS as an alias to DECL.  DECL_NODE is cgraph node representing
!    the function body is associated with
!    (not necessarily cgraph_node (DECL)).  */
  
  cgraph_node *
  cgraph_node::create_alias (tree alias, tree target)
*************** cgraph_node::get_for_asmname (tree asmna
*** 659,665 ****
         node = node->next_sharing_asm_name)
      {
        cgraph_node *cn = dyn_cast <cgraph_node *> (node);
!       if (cn && !cn->global.inlined_to)
  	return cn;
      }
    return NULL;
--- 657,663 ----
         node = node->next_sharing_asm_name)
      {
        cgraph_node *cn = dyn_cast <cgraph_node *> (node);
!       if (cn && !cn->inlined_to)
  	return cn;
      }
    return NULL;
*************** cgraph_add_edge_to_call_site_hash (cgrap
*** 717,723 ****
    if (*slot)
      {
        gcc_assert (((cgraph_edge *)*slot)->speculative);
!       if (e->callee)
  	*slot = e;
        return;
      }
--- 715,723 ----
    if (*slot)
      {
        gcc_assert (((cgraph_edge *)*slot)->speculative);
!       if (e->callee && (!e->prev_callee
! 			|| !e->prev_callee->speculative
! 			|| e->prev_callee->call_stmt != e->call_stmt))
  	*slot = e;
        return;
      }
*************** cgraph_node::get_edge (gimple *call_stmt
*** 771,811 ****
  }
  
  
! /* Change field call_stmt of edge to NEW_STMT.
!    If UPDATE_SPECULATIVE and E is any component of speculative
!    edge, then update all components.  */
  
! void
! cgraph_edge::set_call_stmt (gcall *new_stmt, bool update_speculative)
  {
    tree decl;
  
    /* Speculative edges has three component, update all of them
       when asked to.  */
!   if (update_speculative && speculative)
      {
!       cgraph_edge *direct, *indirect;
        ipa_ref *ref;
  
!       speculative_call_info (direct, indirect, ref);
!       direct->set_call_stmt (new_stmt, false);
!       indirect->set_call_stmt (new_stmt, false);
!       ref->stmt = new_stmt;
!       return;
!     }
  
!   /* Only direct speculative edges go to call_site_hash.  */
!   if (caller->call_site_hash
!       && (!speculative || !indirect_unknown_callee))
!     {
!       caller->call_site_hash->remove_elt_with_hash
! 	(call_stmt, cgraph_edge_hasher::hash (call_stmt));
      }
  
!   cgraph_edge *e = this;
  
!   call_stmt = new_stmt;
!   if (indirect_unknown_callee
        && (decl = gimple_call_fndecl (new_stmt)))
      {
        /* Constant propagation (and possibly also inlining?) can turn an
--- 771,830 ----
  }
  
  
! /* Change field call_stmt of edge E to NEW_STMT.  If UPDATE_SPECULATIVE and E
!    is any component of speculative edge, then update all components.
!    Speculations can be resolved in the process and EDGE can be removed and
!    deallocated.  Return the edge that now represents the call.  */
  
! cgraph_edge *
! cgraph_edge::set_call_stmt (cgraph_edge *e, gcall *new_stmt,
! 			    bool update_speculative)
  {
    tree decl;
  
    /* Speculative edges has three component, update all of them
       when asked to.  */
!   if (update_speculative && e->speculative)
      {
!       cgraph_edge *direct, *indirect, *next;
        ipa_ref *ref;
+       bool e_indirect = e->indirect_unknown_callee;
+       int n = 0;
  
!       direct = e->first_speculative_call_target ();
!       indirect = e->speculative_call_indirect_edge ();
  
!       gcall *old_stmt = direct->call_stmt;
!       for (cgraph_edge *d = direct; d; d = next)
! 	{
! 	  next = d->next_speculative_call_target ();
! 	  cgraph_edge *d2 = set_call_stmt (d, new_stmt, false);
! 	  gcc_assert (d2 == d);
! 	  n++;
! 	}
!       gcc_checking_assert (indirect->num_speculative_call_targets_p () == n);
!       for (unsigned int i = 0; e->caller->iterate_reference (i, ref); i++)
! 	if (ref->speculative && ref->stmt == old_stmt)
! 	  {
! 	    ref->stmt = new_stmt;
! 	    n--;
! 	  }
! 
!       indirect = set_call_stmt (indirect, new_stmt, false);
!       return e_indirect ? indirect : direct;
      }
  
!   /* Only direct speculative edges go to call_site_hash.  */
!   if (e->caller->call_site_hash
!       && (!e->speculative || !e->indirect_unknown_callee)
!       /* It is possible that edge was previously speculative.  In this case
! 	 we have different value in call stmt hash which needs preserving.  */
!       && e->caller->get_edge (e->call_stmt) == e)
!     e->caller->call_site_hash->remove_elt_with_hash
!       (e->call_stmt, cgraph_edge_hasher::hash (e->call_stmt));
  
!   e->call_stmt = new_stmt;
!   if (e->indirect_unknown_callee
        && (decl = gimple_call_fndecl (new_stmt)))
      {
        /* Constant propagation (and possibly also inlining?) can turn an
*************** cgraph_edge::set_call_stmt (gcall *new_s
*** 813,835 ****
        cgraph_node *new_callee = cgraph_node::get (decl);
  
        gcc_checking_assert (new_callee);
!       e = make_direct (new_callee);
      }
  
    function *fun = DECL_STRUCT_FUNCTION (e->caller->decl);
    e->can_throw_external = stmt_can_throw_external (fun, new_stmt);
!   if (e->caller->call_site_hash)
      cgraph_add_edge_to_call_site_hash (e);
  }
  
  /* Allocate a cgraph_edge structure and fill it with data according to the
     parameters of which only CALLEE can be NULL (when creating an indirect call
!    edge).  */
  
  cgraph_edge *
  symbol_table::create_edge (cgraph_node *caller, cgraph_node *callee,
  			   gcall *call_stmt, profile_count count,
! 			   bool indir_unknown_callee)
  {
    cgraph_edge *edge;
  
--- 832,863 ----
        cgraph_node *new_callee = cgraph_node::get (decl);
  
        gcc_checking_assert (new_callee);
!       e = make_direct (e, new_callee);
      }
  
    function *fun = DECL_STRUCT_FUNCTION (e->caller->decl);
    e->can_throw_external = stmt_can_throw_external (fun, new_stmt);
!   /* Update call stite hash.  For speculative calls we only record the first
!      direct edge.  */
!   if (e->caller->call_site_hash
!       && (!e->speculative
! 	  || (e->callee
! 	      && (!e->prev_callee || !e->prev_callee->speculative
! 		  || e->prev_callee->call_stmt != e->call_stmt))
! 	  || (e->speculative && !e->callee)))
      cgraph_add_edge_to_call_site_hash (e);
+   return e;
  }
  
  /* Allocate a cgraph_edge structure and fill it with data according to the
     parameters of which only CALLEE can be NULL (when creating an indirect call
!    edge).  CLONING_P should be set if properties that are copied from an
!    original edge should not be calculated.  */
  
  cgraph_edge *
  symbol_table::create_edge (cgraph_node *caller, cgraph_node *callee,
  			   gcall *call_stmt, profile_count count,
! 			   bool indir_unknown_callee, bool cloning_p)
  {
    cgraph_edge *edge;
  
*************** symbol_table::create_edge (cgraph_node *
*** 846,862 ****
        gcc_assert (is_gimple_call (call_stmt));
      }
  
!   if (free_edges)
!     {
!       edge = free_edges;
!       free_edges = NEXT_FREE_EDGE (edge);
!     }
!   else
!     {
!       edge = ggc_alloc<cgraph_edge> ();
!       edge->m_summary_id = -1;
!     }
! 
    edges_count++;
  
    gcc_assert (++edges_max_uid != 0);
--- 874,881 ----
        gcc_assert (is_gimple_call (call_stmt));
      }
  
!   edge = ggc_alloc<cgraph_edge> ();
!   edge->m_summary_id = -1;
    edges_count++;
  
    gcc_assert (++edges_max_uid != 0);
*************** symbol_table::create_edge (cgraph_node *
*** 869,899 ****
    edge->prev_callee = NULL;
    edge->next_callee = NULL;
    edge->lto_stmt_uid = 0;
  
    edge->count = count;
- 
    edge->call_stmt = call_stmt;
-   edge->can_throw_external
-     = call_stmt ? stmt_can_throw_external (DECL_STRUCT_FUNCTION (caller->decl),
- 					   call_stmt) : false;
-   if (call_stmt
-       && callee && callee->decl
-       && !gimple_check_call_matching_types (call_stmt, callee->decl,
- 					    false))
-     {
-       edge->inline_failed = CIF_MISMATCHED_ARGUMENTS;
-       edge->call_stmt_cannot_inline_p = true;
-     }
-   else
-     {
-       edge->inline_failed = CIF_FUNCTION_NOT_CONSIDERED;
-       edge->call_stmt_cannot_inline_p = false;
-     }
- 
    edge->indirect_info = NULL;
    edge->indirect_inlining_edge = 0;
    edge->speculative = false;
    edge->indirect_unknown_callee = indir_unknown_callee;
    if (opt_for_fn (edge->caller->decl, flag_devirtualize)
        && call_stmt && DECL_STRUCT_FUNCTION (caller->decl))
      edge->in_polymorphic_cdtor
--- 888,913 ----
    edge->prev_callee = NULL;
    edge->next_callee = NULL;
    edge->lto_stmt_uid = 0;
+   edge->speculative_id = 0;
  
    edge->count = count;
    edge->call_stmt = call_stmt;
    edge->indirect_info = NULL;
    edge->indirect_inlining_edge = 0;
    edge->speculative = false;
    edge->indirect_unknown_callee = indir_unknown_callee;
+   if (call_stmt && caller->call_site_hash)
+     cgraph_add_edge_to_call_site_hash (edge);
+ 
+   if (cloning_p)
+     return edge;
+ 
+   edge->can_throw_external
+     = call_stmt ? stmt_can_throw_external (DECL_STRUCT_FUNCTION (caller->decl),
+ 					   call_stmt) : false;
+   edge->inline_failed = CIF_FUNCTION_NOT_CONSIDERED;
+   edge->call_stmt_cannot_inline_p = false;
+ 
    if (opt_for_fn (edge->caller->decl, flag_devirtualize)
        && call_stmt && DECL_STRUCT_FUNCTION (caller->decl))
      edge->in_polymorphic_cdtor
*************** symbol_table::create_edge (cgraph_node *
*** 901,922 ****
  				      caller->decl);
    else
      edge->in_polymorphic_cdtor = caller->thunk.thunk_p;
!   if (call_stmt && caller->call_site_hash)
!     cgraph_add_edge_to_call_site_hash (edge);
  
    return edge;
  }
  
! /* Create edge from a given function to CALLEE in the cgraph.  */
  
  cgraph_edge *
  cgraph_node::create_edge (cgraph_node *callee,
! 			  gcall *call_stmt, profile_count count)
  {
    cgraph_edge *edge = symtab->create_edge (this, callee, call_stmt, count,
! 					   false);
  
!   initialize_inline_failed (edge);
  
    edge->next_caller = callee->callers;
    if (callee->callers)
--- 915,941 ----
  				      caller->decl);
    else
      edge->in_polymorphic_cdtor = caller->thunk.thunk_p;
! 
!   if (callee && symtab->state != LTO_STREAMING
!       && edge->callee->comdat_local_p ())
!     edge->caller->calls_comdat_local = true;
  
    return edge;
  }
  
! /* Create edge from a given function to CALLEE in the cgraph.  CLONING_P should
!    be set if properties that are copied from an original edge should not be
!    calculated.  */
  
  cgraph_edge *
  cgraph_node::create_edge (cgraph_node *callee,
! 			  gcall *call_stmt, profile_count count, bool cloning_p)
  {
    cgraph_edge *edge = symtab->create_edge (this, callee, call_stmt, count,
! 					   false, cloning_p);
  
!   if (!cloning_p)
!     initialize_inline_failed (edge);
  
    edge->next_caller = callee->callers;
    if (callee->callers)
*************** cgraph_allocate_init_indirect_info (void
*** 944,968 ****
  
  /* Create an indirect edge with a yet-undetermined callee where the call
     statement destination is a formal parameter of the caller with index
!    PARAM_INDEX. */
  
  cgraph_edge *
  cgraph_node::create_indirect_edge (gcall *call_stmt, int ecf_flags,
  				   profile_count count,
! 				   bool compute_indirect_info)
  {
!   cgraph_edge *edge = symtab->create_edge (this, NULL, call_stmt,
! 							    count, true);
    tree target;
  
!   initialize_inline_failed (edge);
  
    edge->indirect_info = cgraph_allocate_init_indirect_info ();
    edge->indirect_info->ecf_flags = ecf_flags;
    edge->indirect_info->vptr_changed = true;
  
    /* Record polymorphic call info.  */
!   if (compute_indirect_info
        && call_stmt
        && (target = gimple_call_fn (call_stmt))
        && virtual_method_call_p (target))
--- 963,990 ----
  
  /* Create an indirect edge with a yet-undetermined callee where the call
     statement destination is a formal parameter of the caller with index
!    PARAM_INDEX. CLONING_P should be set if properties that are copied from an
!    original edge should not be calculated and indirect_info structure should
!    not be calculated.  */
  
  cgraph_edge *
  cgraph_node::create_indirect_edge (gcall *call_stmt, int ecf_flags,
  				   profile_count count,
! 				   bool cloning_p)
  {
!   cgraph_edge *edge = symtab->create_edge (this, NULL, call_stmt, count, true,
! 					   cloning_p);
    tree target;
  
!   if (!cloning_p)
!     initialize_inline_failed (edge);
  
    edge->indirect_info = cgraph_allocate_init_indirect_info ();
    edge->indirect_info->ecf_flags = ecf_flags;
    edge->indirect_info->vptr_changed = true;
  
    /* Record polymorphic call info.  */
!   if (!cloning_p
        && call_stmt
        && (target = gimple_call_fn (call_stmt))
        && virtual_method_call_p (target))
*************** cgraph_edge::remove_caller (void)
*** 1003,1009 ****
        else
  	caller->callees = next_callee;
      }
!   if (caller->call_site_hash)
      caller->call_site_hash->remove_elt_with_hash
  	(call_stmt, cgraph_edge_hasher::hash (call_stmt));
  }
--- 1025,1032 ----
        else
  	caller->callees = next_callee;
      }
!   if (caller->call_site_hash
!       && this == caller->get_edge (call_stmt))
      caller->call_site_hash->remove_elt_with_hash
  	(call_stmt, cgraph_edge_hasher::hash (call_stmt));
  }
*************** cgraph_edge::remove_caller (void)
*** 1013,1047 ****
  void
  symbol_table::free_edge (cgraph_edge *e)
  {
    if (e->indirect_info)
      ggc_free (e->indirect_info);
! 
!   /* Clear out the edge so we do not dangle pointers.  */
!   int summary_id = e->m_summary_id;
!   memset (e, 0, sizeof (*e));
!   e->m_summary_id = summary_id;
!   NEXT_FREE_EDGE (e) = free_edges;
!   free_edges = e;
!   edges_count--;
  }
  
  /* Remove the edge in the cgraph.  */
  
  void
! cgraph_edge::remove (void)
  {
    /* Call all edge removal hooks.  */
!   symtab->call_edge_removal_hooks (this);
  
!   if (!indirect_unknown_callee)
      /* Remove from callers list of the callee.  */
!     remove_callee ();
  
    /* Remove from callees list of the callers.  */
!   remove_caller ();
  
    /* Put the edge onto the free list.  */
!   symtab->free_edge (this);
  }
  
  /* Turn edge into speculative call calling N2. Update
--- 1036,1067 ----
  void
  symbol_table::free_edge (cgraph_edge *e)
  {
+   edges_count--;
+   if (e->m_summary_id != -1)
+     edge_released_summary_ids.safe_push (e->m_summary_id);
+ 
    if (e->indirect_info)
      ggc_free (e->indirect_info);
!   ggc_free (e);
  }
  
  /* Remove the edge in the cgraph.  */
  
  void
! cgraph_edge::remove (cgraph_edge *edge)
  {
    /* Call all edge removal hooks.  */
!   symtab->call_edge_removal_hooks (edge);
  
!   if (!edge->indirect_unknown_callee)
      /* Remove from callers list of the callee.  */
!     edge->remove_callee ();
  
    /* Remove from callees list of the callers.  */
!   edge->remove_caller ();
  
    /* Put the edge onto the free list.  */
!   symtab->free_edge (edge);
  }
  
  /* Turn edge into speculative call calling N2. Update
*************** cgraph_edge::remove (void)
*** 1057,1069 ****
       call call_dest
  
     At this time the function just creates the direct call,
!    the referencd representing the if conditional and attaches
!    them all to the orginal indirect call statement.  
  
     Return direct edge created.  */
  
  cgraph_edge *
! cgraph_edge::make_speculative (cgraph_node *n2, profile_count direct_count)
  {
    cgraph_node *n = caller;
    ipa_ref *ref = NULL;
--- 1077,1093 ----
       call call_dest
  
     At this time the function just creates the direct call,
!    the reference representing the if conditional and attaches
!    them all to the original indirect call statement.  
! 
!    speculative_id is used to link direct calls with their corresponding
!    IPA_REF_ADDR references when representing speculative calls.
  
     Return direct edge created.  */
  
  cgraph_edge *
! cgraph_edge::make_speculative (cgraph_node *n2, profile_count direct_count,
! 			       unsigned int speculative_id)
  {
    cgraph_node *n = caller;
    ipa_ref *ref = NULL;
*************** cgraph_edge::make_speculative (cgraph_no
*** 1081,1170 ****
    else
      e2->can_throw_external = can_throw_external;
    e2->lto_stmt_uid = lto_stmt_uid;
    e2->in_polymorphic_cdtor = in_polymorphic_cdtor;
    count -= e2->count;
    symtab->call_edge_duplication_hooks (this, e2);
    ref = n->create_reference (n2, IPA_REF_ADDR, call_stmt);
    ref->lto_stmt_uid = lto_stmt_uid;
    ref->speculative = speculative;
    n2->mark_address_taken ();
    return e2;
  }
  
! /* Speculative call consist of three components:
!    1) an indirect edge representing the original call
!    2) an direct edge representing the new call
!    3) ADDR_EXPR reference representing the speculative check.
!    All three components are attached to single statement (the indirect
!    call) and if one of them exists, all of them must exist.
  
!    Given speculative call edge, return all three components.
!  */
  
! void
! cgraph_edge::speculative_call_info (cgraph_edge *&direct,
! 				    cgraph_edge *&indirect,
! 				    ipa_ref *&reference)
  {
-   ipa_ref *ref;
-   int i;
-   cgraph_edge *e2;
    cgraph_edge *e = this;
  
!   if (!e->indirect_unknown_callee)
!     for (e2 = e->caller->indirect_calls;
! 	 e2->call_stmt != e->call_stmt || e2->lto_stmt_uid != e->lto_stmt_uid;
! 	 e2 = e2->next_callee)
!       ;
!   else
      {
!       e2 = e;
!       /* We can take advantage of the call stmt hash.  */
!       if (e2->call_stmt)
  	{
! 	  e = e->caller->get_edge (e2->call_stmt);
! 	  gcc_assert (e->speculative && !e->indirect_unknown_callee);
  	}
-       else
- 	for (e = e->caller->callees; 
- 	     e2->call_stmt != e->call_stmt
- 	     || e2->lto_stmt_uid != e->lto_stmt_uid;
- 	     e = e->next_callee)
- 	  ;
      }
!   gcc_assert (e->speculative && e2->speculative);
!   direct = e;
!   indirect = e2;
  
!   reference = NULL;
!   for (i = 0; e->caller->iterate_reference (i, ref); i++)
!     if (ref->speculative
! 	&& ((ref->stmt && ref->stmt == e->call_stmt)
! 	    || (!ref->stmt && ref->lto_stmt_uid == e->lto_stmt_uid)))
!       {
! 	reference = ref;
! 	break;
!       }
  
!   /* Speculative edge always consist of all three components - direct edge,
!      indirect and reference.  */
!   
!   gcc_assert (e && e2 && ref);
! }
  
! /* Speculative call edge turned out to be direct call to CALLE_DECL.
!    Remove the speculative call sequence and return edge representing the call.
!    It is up to caller to redirect the call as appropriate. */
  
  cgraph_edge *
! cgraph_edge::resolve_speculation (tree callee_decl)
  {
-   cgraph_edge *edge = this;
    cgraph_edge *e2;
    ipa_ref *ref;
  
!   gcc_assert (edge->speculative);
!   edge->speculative_call_info (e2, edge, ref);
    if (!callee_decl
        || !ref->referred->semantically_equivalent_p
  	   (symtab_node::get (callee_decl)))
--- 1105,1206 ----
    else
      e2->can_throw_external = can_throw_external;
    e2->lto_stmt_uid = lto_stmt_uid;
+   e2->speculative_id = speculative_id;
    e2->in_polymorphic_cdtor = in_polymorphic_cdtor;
+   indirect_info->num_speculative_call_targets++;
    count -= e2->count;
    symtab->call_edge_duplication_hooks (this, e2);
    ref = n->create_reference (n2, IPA_REF_ADDR, call_stmt);
    ref->lto_stmt_uid = lto_stmt_uid;
+   ref->speculative_id = speculative_id;
    ref->speculative = speculative;
    n2->mark_address_taken ();
    return e2;
  }
  
! /* Speculative call consists of an indirect edge and one or more
!    direct edge+ref pairs.
  
!    Given an edge which is part of speculative call, return the first
!    direct call edge in the speculative call sequence.  */
  
! cgraph_edge *
! cgraph_edge::first_speculative_call_target ()
  {
    cgraph_edge *e = this;
  
!   gcc_checking_assert (e->speculative);
!   if (e->callee)
      {
!       while (e->prev_callee && e->prev_callee->speculative
! 	     && e->prev_callee->call_stmt == e->call_stmt
! 	     && e->prev_callee->lto_stmt_uid == e->lto_stmt_uid)
! 	e = e->prev_callee;
!       return e;
!     }
!   /* Call stmt site hash always points to the first target of the
!      speculative call sequence.  */
!   if (e->call_stmt)
!     return e->caller->get_edge (e->call_stmt);
!   for (cgraph_edge *e2 = e->caller->callees; true; e2 = e2->next_callee)
!     if (e2->speculative
! 	&& e->call_stmt == e2->call_stmt
! 	&& e->lto_stmt_uid == e2->lto_stmt_uid)
!       return e2;
! }
! 
! /* We always maintain first direct edge in the call site hash, if one
!    exists.  E is going to be removed.  See if it is first one and update
!    hash accordingly.  INDIRECT is the indirect edge of speculative call.
!    We assume that INDIRECT->num_speculative_call_targets_p () is already
!    updated for removal of E.  */
! static void
! update_call_stmt_hash_for_removing_direct_edge (cgraph_edge *e,
! 						cgraph_edge *indirect)
! {
!   if (e->caller->call_site_hash)
!     {
!       if (e->caller->get_edge (e->call_stmt) != e)
! 	;
!       else if (!indirect->num_speculative_call_targets_p ())
! 	cgraph_update_edge_in_call_site_hash (indirect);
!       else
  	{
! 	  gcc_checking_assert (e->next_callee && e->next_callee->speculative
! 			       && e->next_callee->call_stmt == e->call_stmt);
! 	  cgraph_update_edge_in_call_site_hash (e->next_callee);
  	}
      }
! }
  
! /* Speculative call EDGE turned out to be direct call to CALLEE_DECL.  Remove
!    the speculative call sequence and return edge representing the call, the
!    original EDGE can be removed and deallocated.  Return the edge that now
!    represents the call.
  
!    For "speculative" indirect call that contains multiple "speculative"
!    targets (i.e. edge->indirect_info->num_speculative_call_targets > 1),
!    decrease the count and only remove current direct edge.
  
!    If no speculative direct call left to the speculative indirect call, remove
!    the speculative of both the indirect call and corresponding direct edge.
! 
!    It is up to caller to iteratively resolve each "speculative" direct call and
!    redirect the call as appropriate.  */
  
  cgraph_edge *
! cgraph_edge::resolve_speculation (cgraph_edge *edge, tree callee_decl)
  {
    cgraph_edge *e2;
    ipa_ref *ref;
  
!   gcc_assert (edge->speculative && (!callee_decl || edge->callee));
!   if (!edge->callee)
!     e2 = edge->first_speculative_call_target ();
!   else
!     e2 = edge;
!   ref = e2->speculative_call_target_ref ();
!   edge = edge->speculative_call_indirect_edge ();
    if (!callee_decl
        || !ref->referred->semantically_equivalent_p
  	   (symtab_node::get (callee_decl)))
*************** cgraph_edge::resolve_speculation (tree c
*** 1195,1315 ****
          fprintf (dump_file, "Speculative call turned into direct call.\n");
        edge = e2;
        e2 = tmp;
!       /* FIXME:  If EDGE is inlined, we should scale up the frequencies and counts
!          in the functions inlined through it.  */
      }
    edge->count += e2->count;
!   edge->speculative = false;
    e2->speculative = false;
    ref->remove_reference ();
    if (e2->indirect_unknown_callee || e2->inline_failed)
!     e2->remove ();
    else
      e2->callee->remove_symbol_and_inline_clones ();
-   if (edge->caller->call_site_hash)
-     cgraph_update_edge_in_call_site_hash (edge);
    return edge;
  }
  
  /* Make an indirect edge with an unknown callee an ordinary edge leading to
!    CALLEE.  DELTA is an integer constant that is to be added to the this
!    pointer (first parameter) to compensate for skipping a thunk adjustment.  */
  
  cgraph_edge *
! cgraph_edge::make_direct (cgraph_node *callee)
  {
!   cgraph_edge *edge = this;
!   gcc_assert (indirect_unknown_callee);
  
    /* If we are redirecting speculative call, make it non-speculative.  */
!   if (indirect_unknown_callee && speculative)
      {
!       edge = edge->resolve_speculation (callee->decl);
  
!       /* On successful speculation just return the pre existing direct edge.  */
!       if (!indirect_unknown_callee)
!         return edge;
      }
  
!   indirect_unknown_callee = 0;
!   ggc_free (indirect_info);
!   indirect_info = NULL;
  
    /* Get the edge out of the indirect edge list. */
!   if (prev_callee)
!     prev_callee->next_callee = next_callee;
!   if (next_callee)
!     next_callee->prev_callee = prev_callee;
!   if (!prev_callee)
!     caller->indirect_calls = next_callee;
  
    /* Put it into the normal callee list */
!   prev_callee = NULL;
!   next_callee = caller->callees;
!   if (caller->callees)
!     caller->callees->prev_callee = edge;
!   caller->callees = edge;
  
    /* Insert to callers list of the new callee.  */
    edge->set_callee (callee);
  
-   if (call_stmt
-       && !gimple_check_call_matching_types (call_stmt, callee->decl, false))
-     {
-       call_stmt_cannot_inline_p = true;
-       inline_failed = CIF_MISMATCHED_ARGUMENTS;
-     }
- 
    /* We need to re-determine the inlining status of the edge.  */
    initialize_inline_failed (edge);
    return edge;
  }
  
  /* If necessary, change the function declaration in the call statement
!    associated with E so that it corresponds to the edge callee.  */
  
  gimple *
! cgraph_edge::redirect_call_stmt_to_callee (void)
  {
-   cgraph_edge *e = this;
- 
    tree decl = gimple_call_fndecl (e->call_stmt);
    gcall *new_stmt;
    gimple_stmt_iterator gsi;
  
    if (e->speculative)
      {
-       cgraph_edge *e2;
-       gcall *new_stmt;
-       ipa_ref *ref;
- 
-       e->speculative_call_info (e, e2, ref);
        /* If there already is an direct call (i.e. as a result of inliner's
  	 substitution), forget about speculating.  */
        if (decl)
! 	e = e->resolve_speculation (decl);
!       /* If types do not match, speculation was likely wrong. 
!          The direct edge was possibly redirected to the clone with a different
! 	 signature.  We did not update the call statement yet, so compare it 
! 	 with the reference that still points to the proper type.  */
!       else if (!gimple_check_call_matching_types (e->call_stmt,
! 						  ref->referred->decl,
! 						  true))
! 	{
! 	  if (dump_file)
! 	    fprintf (dump_file, "Not expanding speculative call of %s -> %s\n"
! 		     "Type mismatch.\n",
! 		     e->caller->dump_name (),
! 		     e->callee->dump_name ());
! 	  e = e->resolve_speculation ();
! 	  /* We are producing the final function body and will throw away the
! 	     callgraph edges really soon.  Reset the counts/frequencies to
! 	     keep verifier happy in the case of roundoff errors.  */
! 	  e->count = gimple_bb (e->call_stmt)->count;
! 	}
!       /* Expand speculation into GIMPLE code.  */
        else
  	{
  	  if (dump_file)
  	    {
  	      fprintf (dump_file,
--- 1231,1418 ----
          fprintf (dump_file, "Speculative call turned into direct call.\n");
        edge = e2;
        e2 = tmp;
!       /* FIXME:  If EDGE is inlined, we should scale up the frequencies
! 	 and counts in the functions inlined through it.  */
      }
    edge->count += e2->count;
!   if (edge->num_speculative_call_targets_p ())
!     {
!       /* The indirect edge has multiple speculative targets, don't remove
! 	 speculative until all related direct edges are resolved.  */
!       edge->indirect_info->num_speculative_call_targets--;
!       if (!edge->indirect_info->num_speculative_call_targets)
! 	edge->speculative = false;
!     }
!   else
!     edge->speculative = false;
    e2->speculative = false;
+   update_call_stmt_hash_for_removing_direct_edge (e2, edge);
    ref->remove_reference ();
    if (e2->indirect_unknown_callee || e2->inline_failed)
!     remove (e2);
    else
      e2->callee->remove_symbol_and_inline_clones ();
    return edge;
  }
  
+ /* Return edge corresponding to speculative call to a given target.
+    NULL if speculative call does not have one.  */
+ 
+ cgraph_edge *
+ cgraph_edge::speculative_call_for_target (cgraph_node *target)
+ {
+   for (cgraph_edge *direct = first_speculative_call_target ();
+        direct;
+        direct = direct->next_speculative_call_target ())
+     if (direct->speculative_call_target_ref ()
+ 	->referred->semantically_equivalent_p (target))
+       return direct;
+   return NULL;
+ }
+ 
  /* Make an indirect edge with an unknown callee an ordinary edge leading to
!    CALLEE.  Speculations can be resolved in the process and EDGE can be removed
!    and deallocated.  Return the edge that now represents the call.  */
  
  cgraph_edge *
! cgraph_edge::make_direct (cgraph_edge *edge, cgraph_node *callee)
  {
!   gcc_assert (edge->indirect_unknown_callee);
  
    /* If we are redirecting speculative call, make it non-speculative.  */
!   if (edge->speculative)
      {
!       cgraph_edge *found = NULL;
!       cgraph_edge *direct, *next;
  
!       edge = edge->speculative_call_indirect_edge ();
! 
!       /* Look all speculative targets and remove all but one corresponding
! 	 to callee (if it exists).  */
!       for (direct = edge->first_speculative_call_target ();
! 	   direct;
! 	   direct = next)
! 	{
! 	  next = direct->next_speculative_call_target ();
! 
! 	  /* Compare ref not direct->callee.  Direct edge is possibly
! 	     inlined or redirected.  */
! 	  if (!direct->speculative_call_target_ref ()
! 	       ->referred->semantically_equivalent_p (callee))
! 	    edge = direct->resolve_speculation (direct, NULL);
! 	  else
! 	    {
! 	      gcc_checking_assert (!found);
! 	      found = direct;
! 	    }
! 	}
! 
!       /* On successful speculation just remove the indirect edge and
! 	 return the pre existing direct edge.
! 	 It is important to not remove it and redirect because the direct
! 	 edge may be inlined or redirected.  */
!       if (found)
! 	{
! 	  cgraph_edge *e2 = resolve_speculation (found, callee->decl);
! 	  gcc_checking_assert (!found->speculative && e2 == found);
! 	  return found;
! 	}
!       gcc_checking_assert (!edge->speculative);
      }
  
!   edge->indirect_unknown_callee = 0;
!   ggc_free (edge->indirect_info);
!   edge->indirect_info = NULL;
  
    /* Get the edge out of the indirect edge list. */
!   if (edge->prev_callee)
!     edge->prev_callee->next_callee = edge->next_callee;
!   if (edge->next_callee)
!     edge->next_callee->prev_callee = edge->prev_callee;
!   if (!edge->prev_callee)
!     edge->caller->indirect_calls = edge->next_callee;
  
    /* Put it into the normal callee list */
!   edge->prev_callee = NULL;
!   edge->next_callee = edge->caller->callees;
!   if (edge->caller->callees)
!     edge->caller->callees->prev_callee = edge;
!   edge->caller->callees = edge;
  
    /* Insert to callers list of the new callee.  */
    edge->set_callee (callee);
  
    /* We need to re-determine the inlining status of the edge.  */
    initialize_inline_failed (edge);
    return edge;
  }
  
+ /* Redirect callee of the edge to N.  The function does not update underlying
+    call expression.  */
+ 
+ void
+ cgraph_edge::redirect_callee (cgraph_node *n)
+ {
+   bool loc = callee->comdat_local_p ();
+   /* Remove from callers list of the current callee.  */
+   remove_callee ();
+ 
+   /* Insert to callers list of the new callee.  */
+   set_callee (n);
+ 
+   if (!inline_failed)
+     return;
+   if (!loc && n->comdat_local_p ())
+     {
+       cgraph_node *to = caller->inlined_to ? caller->inlined_to : caller;
+       to->calls_comdat_local = true;
+     }
+   else if (loc && !n->comdat_local_p ())
+     {
+       cgraph_node *to = caller->inlined_to ? caller->inlined_to : caller;
+       gcc_checking_assert (to->calls_comdat_local);
+       to->calls_comdat_local = to->check_calls_comdat_local_p ();
+     }
+ }
+ 
  /* If necessary, change the function declaration in the call statement
!    associated with E so that it corresponds to the edge callee.  Speculations
!    can be resolved in the process and EDGE can be removed and deallocated.
! 
!    The edge could be one of speculative direct call generated from speculative
!    indirect call.  In this circumstance, decrease the speculative targets
!    count (i.e. num_speculative_call_targets) and redirect call stmt to the
!    corresponding i-th target.  If no speculative direct call left to the
!    speculative indirect call, remove "speculative" of the indirect call and
!    also redirect stmt to it's final direct target.
! 
!    It is up to caller to iteratively transform each "speculative"
!    direct call as appropriate.  */
  
  gimple *
! cgraph_edge::redirect_call_stmt_to_callee (cgraph_edge *e)
  {
    tree decl = gimple_call_fndecl (e->call_stmt);
    gcall *new_stmt;
    gimple_stmt_iterator gsi;
  
    if (e->speculative)
      {
        /* If there already is an direct call (i.e. as a result of inliner's
  	 substitution), forget about speculating.  */
        if (decl)
! 	e = make_direct (e->speculative_call_indirect_edge (),
! 			 cgraph_node::get (decl));
        else
  	{
+ 	  /* Be sure we redirect all speculative targets before poking
+ 	     abou tindirect edge.  */
+ 	  gcc_checking_assert (e->callee);
+ 	  cgraph_edge *indirect = e->speculative_call_indirect_edge ();
+ 	  gcall *new_stmt;
+ 	  ipa_ref *ref;
+ 
+ 	  /* Expand speculation into GIMPLE code.  */
  	  if (dump_file)
  	    {
  	      fprintf (dump_file,
*************** cgraph_edge::redirect_call_stmt_to_calle
*** 1319,1346 ****
  	      e->count.dump (dump_file);
  	      fprintf (dump_file, "\n");
  	    }
- 	  gcc_assert (e2->speculative);
  	  push_cfun (DECL_STRUCT_FUNCTION (e->caller->decl));
  
! 	  profile_probability prob = e->count.probability_in (e->count
! 							      + e2->count);
  	  if (!prob.initialized_p ())
  	    prob = profile_probability::even ();
  	  new_stmt = gimple_ic (e->call_stmt,
  				dyn_cast<cgraph_node *> (ref->referred),
  				prob);
  	  e->speculative = false;
! 	  e->caller->set_call_stmt_including_clones (e->call_stmt, new_stmt,
! 						     false);
  	  e->count = gimple_bb (e->call_stmt)->count;
! 	  e2->speculative = false;
! 	  e2->count = gimple_bb (e2->call_stmt)->count;
  	  ref->speculative = false;
  	  ref->stmt = NULL;
- 	  /* Indirect edges are not both in the call site hash.
- 	     get it updated.  */
- 	  if (e->caller->call_site_hash)
- 	    cgraph_update_edge_in_call_site_hash (e2);
  	  pop_cfun ();
  	  /* Continue redirecting E to proper target.  */
  	}
--- 1422,1466 ----
  	      e->count.dump (dump_file);
  	      fprintf (dump_file, "\n");
  	    }
  	  push_cfun (DECL_STRUCT_FUNCTION (e->caller->decl));
  
! 	  profile_count all = indirect->count;
! 	  for (cgraph_edge *e2 = e->first_speculative_call_target ();
! 	       e2;
! 	       e2 = e2->next_speculative_call_target ())
! 	    all = all + e2->count;
! 	  profile_probability prob = e->count.probability_in (all);
  	  if (!prob.initialized_p ())
  	    prob = profile_probability::even ();
+ 	  ref = e->speculative_call_target_ref ();
  	  new_stmt = gimple_ic (e->call_stmt,
  				dyn_cast<cgraph_node *> (ref->referred),
  				prob);
  	  e->speculative = false;
! 	  if (indirect->num_speculative_call_targets_p ())
! 	    {
! 	      /* The indirect edge has multiple speculative targets, don't
! 		 remove speculative until all related direct edges are
! 		 redirected.  */
! 	      indirect->indirect_info->num_speculative_call_targets--;
! 	      if (!indirect->indirect_info->num_speculative_call_targets)
! 		indirect->speculative = false;
! 	    }
! 	  else
! 	    indirect->speculative = false;
! 	  /* Indirect edges are not both in the call site hash.
! 	     get it updated.  */
! 	  update_call_stmt_hash_for_removing_direct_edge (e, indirect);
! 	  cgraph_edge::set_call_stmt (e, new_stmt, false);
  	  e->count = gimple_bb (e->call_stmt)->count;
! 
! 	  /* Once we are done with expanding the sequence, update also indirect
! 	     call probability.  Until then the basic block accounts for the
! 	     sum of indirect edge and all non-expanded speculations.  */
! 	  if (!indirect->speculative)
! 	    indirect->count = gimple_bb (indirect->call_stmt)->count;
  	  ref->speculative = false;
  	  ref->stmt = NULL;
  	  pop_cfun ();
  	  /* Continue redirecting E to proper target.  */
  	}
*************** cgraph_edge::redirect_call_stmt_to_calle
*** 1351,1360 ****
        || decl == e->callee->decl)
      return e->call_stmt;
  
    if (flag_checking && decl)
      {
        cgraph_node *node = cgraph_node::get (decl);
!       gcc_assert (!node || !node->clone.combined_args_to_skip);
      }
  
    if (symtab->dump_file)
--- 1471,1490 ----
        || decl == e->callee->decl)
      return e->call_stmt;
  
+   if (decl && ipa_saved_clone_sources)
+     {
+       tree *p = ipa_saved_clone_sources->get (e->callee);
+       if (p && decl == *p)
+ 	{
+ 	  gimple_call_set_fndecl (e->call_stmt, e->callee->decl);
+ 	  return e->call_stmt;
+ 	}
+     }
+ 
    if (flag_checking && decl)
      {
        cgraph_node *node = cgraph_node::get (decl);
!       gcc_assert (!node || !node->clone.param_adjustments);
      }
  
    if (symtab->dump_file)
*************** cgraph_edge::redirect_call_stmt_to_calle
*** 1362,1386 ****
        fprintf (symtab->dump_file, "updating call of %s -> %s: ",
  	       e->caller->dump_name (), e->callee->dump_name ());
        print_gimple_stmt (symtab->dump_file, e->call_stmt, 0, dump_flags);
!       if (e->callee->clone.combined_args_to_skip)
  	{
! 	  fprintf (symtab->dump_file, " combined args to skip: ");
! 	  dump_bitmap (symtab->dump_file,
! 		       e->callee->clone.combined_args_to_skip);
  	}
      }
  
!   if (e->callee->clone.combined_args_to_skip)
      {
!       int lp_nr;
  
-       new_stmt = e->call_stmt;
-       if (e->callee->clone.combined_args_to_skip)
- 	new_stmt
- 	  = gimple_call_copy_skip_args (new_stmt,
- 					e->callee->clone.combined_args_to_skip);
        tree old_fntype = gimple_call_fntype (e->call_stmt);
!       gimple_call_set_fndecl (new_stmt, e->callee->decl);
        cgraph_node *origin = e->callee;
        while (origin->clone_of)
  	origin = origin->clone_of;
--- 1492,1527 ----
        fprintf (symtab->dump_file, "updating call of %s -> %s: ",
  	       e->caller->dump_name (), e->callee->dump_name ());
        print_gimple_stmt (symtab->dump_file, e->call_stmt, 0, dump_flags);
!       if (e->callee->clone.param_adjustments)
! 	e->callee->clone.param_adjustments->dump (symtab->dump_file);
!       unsigned performed_len
! 	= vec_safe_length (e->caller->clone.performed_splits);
!       if (performed_len > 0)
! 	fprintf (symtab->dump_file, "Performed splits records:\n");
!       for (unsigned i = 0; i < performed_len; i++)
  	{
! 	  ipa_param_performed_split *sm
! 	    = &(*e->caller->clone.performed_splits)[i];
! 	  print_node_brief (symtab->dump_file, "  dummy_decl: ", sm->dummy_decl,
! 			    TDF_UID);
! 	  fprintf (symtab->dump_file, ", unit_offset: %u\n", sm->unit_offset);
  	}
      }
  
!   if (ipa_param_adjustments *padjs = e->callee->clone.param_adjustments)
      {
!       /* We need to defer cleaning EH info on the new statement to
!          fixup-cfg.  We may not have dominator information at this point
! 	 and thus would end up with unreachable blocks and have no way
! 	 to communicate that we need to run CFG cleanup then.  */
!       int lp_nr = lookup_stmt_eh_lp (e->call_stmt);
!       if (lp_nr != 0)
! 	remove_stmt_from_eh_lp (e->call_stmt);
  
        tree old_fntype = gimple_call_fntype (e->call_stmt);
!       new_stmt = padjs->modify_call (e->call_stmt,
! 				     e->caller->clone.performed_splits,
! 				     e->callee->decl, false);
        cgraph_node *origin = e->callee;
        while (origin->clone_of)
  	origin = origin->clone_of;
*************** cgraph_edge::redirect_call_stmt_to_calle
*** 1391,1482 ****
  	gimple_call_set_fntype (new_stmt, TREE_TYPE (e->callee->decl));
        else
  	{
! 	  bitmap skip = e->callee->clone.combined_args_to_skip;
! 	  tree t = cgraph_build_function_type_skip_args (old_fntype, skip,
! 							 false);
! 	  gimple_call_set_fntype (new_stmt, t);
! 	}
! 
!       if (gimple_vdef (new_stmt)
! 	  && TREE_CODE (gimple_vdef (new_stmt)) == SSA_NAME)
! 	SSA_NAME_DEF_STMT (gimple_vdef (new_stmt)) = new_stmt;
! 
!       gsi = gsi_for_stmt (e->call_stmt);
! 
!       /* For optimized away parameters, add on the caller side
! 	 before the call
! 	 DEBUG D#X => parm_Y(D)
! 	 stmts and associate D#X with parm in decl_debug_args_lookup
! 	 vector to say for debug info that if parameter parm had been passed,
! 	 it would have value parm_Y(D).  */
!       if (e->callee->clone.combined_args_to_skip && MAY_HAVE_DEBUG_BIND_STMTS)
! 	{
! 	  vec<tree, va_gc> **debug_args
! 	    = decl_debug_args_lookup (e->callee->decl);
! 	  tree old_decl = gimple_call_fndecl (e->call_stmt);
! 	  if (debug_args && old_decl)
! 	    {
! 	      tree parm;
! 	      unsigned i = 0, num;
! 	      unsigned len = vec_safe_length (*debug_args);
! 	      unsigned nargs = gimple_call_num_args (e->call_stmt);
! 	      for (parm = DECL_ARGUMENTS (old_decl), num = 0;
! 		   parm && num < nargs;
! 		   parm = DECL_CHAIN (parm), num++)
! 		if (bitmap_bit_p (e->callee->clone.combined_args_to_skip, num)
! 		    && is_gimple_reg (parm))
! 		  {
! 		    unsigned last = i;
! 
! 		    while (i < len && (**debug_args)[i] != DECL_ORIGIN (parm))
! 		      i += 2;
! 		    if (i >= len)
! 		      {
! 			i = 0;
! 			while (i < last
! 			       && (**debug_args)[i] != DECL_ORIGIN (parm))
! 			  i += 2;
! 			if (i >= last)
! 			  continue;
! 		      }
! 		    tree ddecl = (**debug_args)[i + 1];
! 		    tree arg = gimple_call_arg (e->call_stmt, num);
! 		    if (!useless_type_conversion_p (TREE_TYPE (ddecl),
! 						    TREE_TYPE (arg)))
! 		      {
! 			tree rhs1;
! 			if (!fold_convertible_p (TREE_TYPE (ddecl), arg))
! 			  continue;
! 			if (TREE_CODE (arg) == SSA_NAME
! 			    && gimple_assign_cast_p (SSA_NAME_DEF_STMT (arg))
! 			    && (rhs1
! 				= gimple_assign_rhs1 (SSA_NAME_DEF_STMT (arg)))
! 			    && useless_type_conversion_p (TREE_TYPE (ddecl),
! 							  TREE_TYPE (rhs1)))
! 			  arg = rhs1;
! 			else
! 			  arg = fold_convert (TREE_TYPE (ddecl), arg);
! 		      }
! 
! 		    gimple *def_temp
! 		      = gimple_build_debug_bind (ddecl, unshare_expr (arg),
! 						 e->call_stmt);
! 		    gsi_insert_before (&gsi, def_temp, GSI_SAME_STMT);
! 		  }
! 	    }
  	}
  
-       gsi_replace (&gsi, new_stmt, false);
-       /* We need to defer cleaning EH info on the new statement to
-          fixup-cfg.  We may not have dominator information at this point
- 	 and thus would end up with unreachable blocks and have no way
- 	 to communicate that we need to run CFG cleanup then.  */
-       lp_nr = lookup_stmt_eh_lp (e->call_stmt);
        if (lp_nr != 0)
! 	{
! 	  remove_stmt_from_eh_lp (e->call_stmt);
! 	  add_stmt_to_eh_lp (new_stmt, lp_nr);
! 	}
      }
    else
      {
--- 1532,1543 ----
  	gimple_call_set_fntype (new_stmt, TREE_TYPE (e->callee->decl));
        else
  	{
! 	  tree new_fntype = padjs->build_new_function_type (old_fntype, true);
! 	  gimple_call_set_fntype (new_stmt, new_fntype);
  	}
  
        if (lp_nr != 0)
! 	add_stmt_to_eh_lp (new_stmt, lp_nr);
      }
    else
      {
*************** cgraph_update_edges_for_call_stmt_node (
*** 1567,1574 ****
  	  if (new_stmt && is_gimple_call (new_stmt) && e->callee
  	      && fndecl_built_in_p (e->callee->decl, BUILT_IN_UNREACHABLE))
  	    {
!               node->get_edge (old_stmt)->set_call_stmt
! 		 (as_a <gcall *> (new_stmt));
  	      return;
  	    }
  	  /* See if the edge is already there and has the correct callee.  It
--- 1628,1635 ----
  	  if (new_stmt && is_gimple_call (new_stmt) && e->callee
  	      && fndecl_built_in_p (e->callee->decl, BUILT_IN_UNREACHABLE))
  	    {
! 	      cgraph_edge::set_call_stmt (node->get_edge (old_stmt),
! 					  as_a <gcall *> (new_stmt));
  	      return;
  	    }
  	  /* See if the edge is already there and has the correct callee.  It
*************** cgraph_update_edges_for_call_stmt_node (
*** 1582,1588 ****
  		  if (callee->decl == new_call
  		      || callee->former_clone_of == new_call)
  		    {
! 		      e->set_call_stmt (as_a <gcall *> (new_stmt));
  		      return;
  		    }
  		  callee = callee->clone_of;
--- 1643,1649 ----
  		  if (callee->decl == new_call
  		      || callee->former_clone_of == new_call)
  		    {
! 		      cgraph_edge::set_call_stmt (e, as_a <gcall *> (new_stmt));
  		      return;
  		    }
  		  callee = callee->clone_of;
*************** cgraph_update_edges_for_call_stmt_node (
*** 1594,1600 ****
  	     attached to edge is invalid.  */
  	  count = e->count;
   	  if (e->indirect_unknown_callee || e->inline_failed)
! 	    e->remove ();
  	  else
  	    e->callee->remove_symbol_and_inline_clones ();
  	}
--- 1655,1661 ----
  	     attached to edge is invalid.  */
  	  count = e->count;
   	  if (e->indirect_unknown_callee || e->inline_failed)
! 	    cgraph_edge::remove (e);
  	  else
  	    e->callee->remove_symbol_and_inline_clones ();
  	}
*************** cgraph_update_edges_for_call_stmt_node (
*** 1614,1620 ****
      }
    /* We only updated the call stmt; update pointer in cgraph edge..  */
    else if (old_stmt != new_stmt)
!     node->get_edge (old_stmt)->set_call_stmt (as_a <gcall *> (new_stmt));
  }
  
  /* Update or remove the corresponding cgraph edge if a GIMPLE_CALL
--- 1675,1682 ----
      }
    /* We only updated the call stmt; update pointer in cgraph edge..  */
    else if (old_stmt != new_stmt)
!     cgraph_edge::set_call_stmt (node->get_edge (old_stmt),
! 				as_a <gcall *> (new_stmt));
  }
  
  /* Update or remove the corresponding cgraph edge if a GIMPLE_CALL
*************** cgraph_node::remove_callees (void)
*** 1656,1661 ****
--- 1718,1725 ----
  {
    cgraph_edge *e, *f;
  
+   calls_comdat_local = false;
+ 
    /* It is sufficient to remove the edges from the lists of callers of
       the callees.  The callee list of the node can be zapped with one
       assignment.  */
*************** cgraph_node::remove (void)
*** 1795,1801 ****
       */
    force_output = false;
    forced_by_abi = false;
!   cgraph_node *next = nested;
    for (cgraph_node *n = nested; n; n = next)
    {
      next = n->next_nested;
--- 1859,1865 ----
       */
    force_output = false;
    forced_by_abi = false;
!   cgraph_node *next;
    for (cgraph_node *n = nested; n; n = next)
    {
      next = n->next_nested;
*************** cgraph_node::remove (void)
*** 1857,1863 ****
      {
        cgraph_node *n = cgraph_node::get (decl);
        if (!n
! 	  || (!n->clones && !n->clone_of && !n->global.inlined_to
  	      && ((symtab->global_info_ready || in_lto_p)
  		  && (TREE_ASM_WRITTEN (n->decl)
  		      || DECL_EXTERNAL (n->decl)
--- 1921,1927 ----
      {
        cgraph_node *n = cgraph_node::get (decl);
        if (!n
! 	  || (!n->clones && !n->clone_of && !n->inlined_to
  	      && ((symtab->global_info_ready || in_lto_p)
  		  && (TREE_ASM_WRITTEN (n->decl)
  		      || DECL_EXTERNAL (n->decl)
*************** cgraph_node::mark_address_taken (void)
*** 1888,1894 ****
  {
    /* Indirect inlining can figure out that all uses of the address are
       inlined.  */
!   if (global.inlined_to)
      {
        gcc_assert (cfun->after_inlining);
        gcc_assert (callers->indirect_inlining_edge);
--- 1952,1958 ----
  {
    /* Indirect inlining can figure out that all uses of the address are
       inlined.  */
!   if (inlined_to)
      {
        gcc_assert (cfun->after_inlining);
        gcc_assert (callers->indirect_inlining_edge);
*************** cgraph_node::mark_address_taken (void)
*** 1905,1926 ****
    node->address_taken = 1;
  }
  
! /* Return local info for the compiled function.  */
  
! cgraph_local_info *
! cgraph_node::local_info (tree decl)
  {
    gcc_assert (TREE_CODE (decl) == FUNCTION_DECL);
    cgraph_node *node = get (decl);
    if (!node)
      return NULL;
!   return &node->ultimate_alias_target ()->local;
  }
  
! /* Return local info for the compiled function.  */
  
  cgraph_rtl_info *
! cgraph_node::rtl_info (tree decl)
  {
    gcc_assert (TREE_CODE (decl) == FUNCTION_DECL);
    cgraph_node *node = get (decl);
--- 1969,1990 ----
    node->address_taken = 1;
  }
  
! /* Return local info node for the compiled function.  */
  
! cgraph_node *
! cgraph_node::local_info_node (tree decl)
  {
    gcc_assert (TREE_CODE (decl) == FUNCTION_DECL);
    cgraph_node *node = get (decl);
    if (!node)
      return NULL;
!   return node->ultimate_alias_target ();
  }
  
! /* Return RTL info for the compiled function.  */
  
  cgraph_rtl_info *
! cgraph_node::rtl_info (const_tree decl)
  {
    gcc_assert (TREE_CODE (decl) == FUNCTION_DECL);
    cgraph_node *node = get (decl);
*************** cgraph_node::rtl_info (tree decl)
*** 1935,1941 ****
      return NULL;
    /* Allocate if it doesn't exist.  */
    if (node->rtl == NULL)
!     node->rtl = ggc_cleared_alloc<cgraph_rtl_info> ();
    return node->rtl;
  }
  
--- 1999,2008 ----
      return NULL;
    /* Allocate if it doesn't exist.  */
    if (node->rtl == NULL)
!     {
!       node->rtl = ggc_cleared_alloc<cgraph_rtl_info> ();
!       SET_HARD_REG_SET (node->rtl->function_used_regs);
!     }
    return node->rtl;
  }
  
*************** cgraph_node::dump (FILE *f)
*** 2012,2021 ****
  
    dump_base (f);
  
!   if (global.inlined_to)
      fprintf (f, "  Function %s is inline copy in %s\n",
  	     dump_name (),
! 	     global.inlined_to->dump_name ());
    if (clone_of)
      fprintf (f, "  Clone of %s\n", clone_of->dump_asm_name ());
    if (symtab->function_flags_ready)
--- 2079,2088 ----
  
    dump_base (f);
  
!   if (inlined_to)
      fprintf (f, "  Function %s is inline copy in %s\n",
  	     dump_name (),
! 	     inlined_to->dump_name ());
    if (clone_of)
      fprintf (f, "  Clone of %s\n", clone_of->dump_asm_name ());
    if (symtab->function_flags_ready)
*************** cgraph_node::dump (FILE *f)
*** 2025,2030 ****
--- 2092,2100 ----
    if (profile_id)
      fprintf (f, "  Profile id: %i\n",
  	     profile_id);
+   if (unit_id)
+     fprintf (f, "  Unit id: %i\n",
+ 	     unit_id);
    cgraph_function_version_info *vi = function_version ();
    if (vi != NULL)
      {
*************** cgraph_node::dump (FILE *f)
*** 2052,2067 ****
        count.dump (f);
      }
    if (tp_first_run > 0)
!     fprintf (f, " first_run:%i", tp_first_run);
    if (origin)
!     fprintf (f, " nested in:%s", origin->asm_name ());
    if (gimple_has_body_p (decl))
      fprintf (f, " body");
    if (process)
      fprintf (f, " process");
!   if (local.local)
      fprintf (f, " local");
!   if (local.redefined_extern_inline)
      fprintf (f, " redefined_extern_inline");
    if (only_called_at_startup)
      fprintf (f, " only_called_at_startup");
--- 2122,2137 ----
        count.dump (f);
      }
    if (tp_first_run > 0)
!     fprintf (f, " first_run:%" PRId64, (int64_t) tp_first_run);
    if (origin)
!     fprintf (f, " nested in:%s", origin->dump_asm_name ());
    if (gimple_has_body_p (decl))
      fprintf (f, " body");
    if (process)
      fprintf (f, " process");
!   if (local)
      fprintf (f, " local");
!   if (redefined_extern_inline)
      fprintf (f, " redefined_extern_inline");
    if (only_called_at_startup)
      fprintf (f, " only_called_at_startup");
*************** cgraph_node::dump (FILE *f)
*** 2075,2080 ****
--- 2145,2152 ----
      fprintf (f, " icf_merged");
    if (merged_comdat)
      fprintf (f, " merged_comdat");
+   if (merged_extern_inline)
+     fprintf (f, " merged_extern_inline");
    if (split_part)
      fprintf (f, " split_part");
    if (indirect_call_target)
*************** cgraph_node::dump (FILE *f)
*** 2095,2100 ****
--- 2167,2178 ----
      fprintf (f, " optimize_size");
    if (parallelized_function)
      fprintf (f, " parallelized_function");
+   if (DECL_IS_OPERATOR_NEW_P (decl))
+     fprintf (f, " %soperator_new",
+ 	     DECL_IS_REPLACEABLE_OPERATOR (decl) ? "replaceable_" : "");
+   if (DECL_IS_OPERATOR_DELETE_P (decl))
+     fprintf (f, " %soperator_delete",
+ 	     DECL_IS_REPLACEABLE_OPERATOR (decl) ? "replaceable_" : "");
  
    fprintf (f, "\n");
  
*************** cgraph_node::dump (FILE *f)
*** 2135,2141 ****
    profile_count sum = profile_count::zero ();
    for (edge = callers; edge; edge = edge->next_caller)
      {
!       fprintf (f, "%s ", edge->caller->dump_name ());
        edge->dump_edge_flags (f);
        if (edge->count.initialized_p ())
  	sum += edge->count.ipa ();
--- 2213,2219 ----
    profile_count sum = profile_count::zero ();
    for (edge = callers; edge; edge = edge->next_caller)
      {
!       fprintf (f, "%s ", edge->caller->dump_asm_name ());
        edge->dump_edge_flags (f);
        if (edge->count.initialized_p ())
  	sum += edge->count.ipa ();
*************** cgraph_node::dump (FILE *f)
*** 2144,2150 ****
    fprintf (f, "\n  Calls: ");
    for (edge = callees; edge; edge = edge->next_callee)
      {
!       fprintf (f, "%s ", edge->callee->dump_name ());
        edge->dump_edge_flags (f);
      }
    fprintf (f, "\n");
--- 2222,2228 ----
    fprintf (f, "\n  Calls: ");
    for (edge = callees; edge; edge = edge->next_callee)
      {
!       fprintf (f, "%s ", edge->callee->dump_asm_name ());
        edge->dump_edge_flags (f);
      }
    fprintf (f, "\n");
*************** cgraph_node::dump (FILE *f)
*** 2159,2165 ****
  	if (dyn_cast <cgraph_node *> (ref->referring)->count.initialized_p ())
  	  sum += dyn_cast <cgraph_node *> (ref->referring)->count.ipa ();
    
!       if (global.inlined_to
  	  || (symtab->state < EXPANSION
  	      && ultimate_alias_target () == this && only_called_directly_p ()))
  	ok = !count.ipa ().differs_from_p (sum);
--- 2237,2243 ----
  	if (dyn_cast <cgraph_node *> (ref->referring)->count.initialized_p ())
  	  sum += dyn_cast <cgraph_node *> (ref->referring)->count.ipa ();
    
!       if (inlined_to
  	  || (symtab->state < EXPANSION
  	      && ultimate_alias_target () == this && only_called_directly_p ()))
  	ok = !count.ipa ().differs_from_p (sum);
*************** cgraph_node::dump (FILE *f)
*** 2201,2212 ****
--- 2279,2308 ----
  	  if (edge->indirect_info->vptr_changed)
  	    fprintf (f, " (vptr maybe changed)");
  	}
+       fprintf (f, " Num speculative call targets: %i",
+ 	       edge->indirect_info->num_speculative_call_targets);
        fprintf (f, "\n");
        if (edge->indirect_info->polymorphic)
  	edge->indirect_info->context.dump (f);
      }
  }
  
+ /* Dump call graph node to file F in graphviz format.  */
+ 
+ void
+ cgraph_node::dump_graphviz (FILE *f)
+ {
+   cgraph_edge *edge;
+ 
+   for (edge = callees; edge; edge = edge->next_callee)
+     {
+       cgraph_node *callee = edge->callee;
+ 
+       fprintf (f, "\t\"%s\" -> \"%s\"\n", dump_name (), callee->dump_name ());
+     }
+ }
+ 
+ 
  /* Dump call graph node NODE to stderr.  */
  
  DEBUG_FUNCTION void
*************** cgraph_node::get_availability (symtab_no
*** 2259,2272 ****
      {
        cgraph_node *cref = dyn_cast <cgraph_node *> (ref);
        if (cref)
! 	ref = cref->global.inlined_to;
      }
    enum availability avail;
    if (!analyzed)
      avail = AVAIL_NOT_AVAILABLE;
!   else if (local.local)
      avail = AVAIL_LOCAL;
!   else if (global.inlined_to)
      avail = AVAIL_AVAILABLE;
    else if (transparent_alias)
      ultimate_alias_target (&avail, ref);
--- 2355,2368 ----
      {
        cgraph_node *cref = dyn_cast <cgraph_node *> (ref);
        if (cref)
! 	ref = cref->inlined_to;
      }
    enum availability avail;
    if (!analyzed)
      avail = AVAIL_NOT_AVAILABLE;
!   else if (local)
      avail = AVAIL_LOCAL;
!   else if (inlined_to)
      avail = AVAIL_AVAILABLE;
    else if (transparent_alias)
      ultimate_alias_target (&avail, ref);
*************** static bool
*** 2308,2313 ****
--- 2404,2413 ----
  cgraph_node_cannot_be_local_p_1 (cgraph_node *node, void *)
  {
    return !(!node->force_output
+ 	   && !node->ifunc_resolver
+ 	   /* Limitation of gas requires us to output targets of symver aliases
+ 	      as global symbols.  This is binutils PR 25295.  */
+ 	   && !node->symver
  	   && ((DECL_COMDAT (node->decl)
  		&& !node->forced_by_abi
  		&& !node->used_from_object_file_p ()
*************** cgraph_node::make_local (cgraph_node *no
*** 2387,2393 ****
        node->set_comdat_group (NULL);
        node->externally_visible = false;
        node->forced_by_abi = false;
!       node->local.local = true;
        node->set_section (NULL);
        node->unique_name = ((node->resolution == LDPR_PREVAILING_DEF_IRONLY
  			   || node->resolution == LDPR_PREVAILING_DEF_IRONLY_EXP)
--- 2487,2493 ----
        node->set_comdat_group (NULL);
        node->externally_visible = false;
        node->forced_by_abi = false;
!       node->local = true;
        node->set_section (NULL);
        node->unique_name = ((node->resolution == LDPR_PREVAILING_DEF_IRONLY
  			   || node->resolution == LDPR_PREVAILING_DEF_IRONLY_EXP)
*************** set_nothrow_flag_1 (cgraph_node *node, b
*** 2417,2423 ****
    if (nothrow && !TREE_NOTHROW (node->decl))
      {
        /* With non-call exceptions we can't say for sure if other function body
! 	 was not possibly optimized to stil throw.  */
        if (!non_call || node->binds_to_current_def_p ())
  	{
  	  TREE_NOTHROW (node->decl) = true;
--- 2517,2523 ----
    if (nothrow && !TREE_NOTHROW (node->decl))
      {
        /* With non-call exceptions we can't say for sure if other function body
! 	 was not possibly optimized to still throw.  */
        if (!non_call || node->binds_to_current_def_p ())
  	{
  	  TREE_NOTHROW (node->decl) = true;
*************** set_const_flag_1 (cgraph_node *node, boo
*** 2625,2631 ****
     If SET_CONST if false, clear the flag.
  
     When setting the flag be careful about possible interposition and
!    do not set the flag for functions that can be interposet and set pure
     flag for functions that can bind to other definition. 
  
     Return true if any change was done. */
--- 2725,2731 ----
     If SET_CONST if false, clear the flag.
  
     When setting the flag be careful about possible interposition and
!    do not set the flag for functions that can be interposed and set pure
     flag for functions that can bind to other definition. 
  
     Return true if any change was done. */
*************** bool
*** 2717,2724 ****
  cgraph_node::set_pure_flag (bool pure, bool looping)
  {
    struct set_pure_flag_info info = {pure, looping, false};
-   if (!pure)
-     looping = false;
    call_for_symbol_thunks_and_aliases (set_pure_flag_1, &info, !pure, true);
    return info.changed;
  }
--- 2817,2822 ----
*************** cgraph_edge::cannot_lead_to_return_p (vo
*** 2760,2766 ****
      return callee->cannot_return_p ();
  }
  
! /* Return true if the call can be hot.  */
  
  bool
  cgraph_edge::maybe_hot_p (void)
--- 2858,2864 ----
      return callee->cannot_return_p ();
  }
  
! /* Return true if the edge may be considered hot.  */
  
  bool
  cgraph_edge::maybe_hot_p (void)
*************** cgraph_edge::maybe_hot_p (void)
*** 2779,2793 ****
      return false;
    if (caller->frequency == NODE_FREQUENCY_HOT)
      return true;
!   /* If profile is now known yet, be conservative.
!      FIXME: this predicate is used by early inliner and can do better there.  */
!   if (symtab->state < IPA_SSA)
      return true;
!   if (caller->frequency == NODE_FREQUENCY_EXECUTED_ONCE
!       && sreal_frequency () * 2 < 3)
      return false;
!   if (PARAM_VALUE (HOT_BB_FREQUENCY_FRACTION) == 0
!       || sreal_frequency () * PARAM_VALUE (HOT_BB_FREQUENCY_FRACTION) <= 1)
      return false;
    return true;
  }
--- 2877,2894 ----
      return false;
    if (caller->frequency == NODE_FREQUENCY_HOT)
      return true;
!   if (!count.initialized_p ())
      return true;
!   cgraph_node *where = caller->inlined_to ? caller->inlined_to : caller;
!   if (!where->count.initialized_p ())
      return false;
!   if (caller->frequency == NODE_FREQUENCY_EXECUTED_ONCE)
!     {
!       if (count.apply_scale (2, 1) < where->count.apply_scale (3, 1))
! 	return false;
!     }
!   else if (count.apply_scale (param_hot_bb_frequency_fraction , 1)
! 	   < where->count)
      return false;
    return true;
  }
*************** cgraph_node::can_remove_if_no_direct_cal
*** 2822,2828 ****
    if (will_inline && address_taken)
      return false;
  
!   /* Otheriwse check if we can remove the symbol itself and then verify
       that only uses of the comdat groups are direct call to THIS
       or its aliases.   */
    if (!can_remove_if_no_direct_calls_and_refs_p ())
--- 2923,2929 ----
    if (will_inline && address_taken)
      return false;
  
!   /* Otherwise check if we can remove the symbol itself and then verify
       that only uses of the comdat groups are direct call to THIS
       or its aliases.   */
    if (!can_remove_if_no_direct_calls_and_refs_p ())
*************** bool
*** 2878,2884 ****
  cgraph_node::will_be_removed_from_program_if_no_direct_calls_p
  	 (bool will_inline)
  {
!   gcc_assert (!global.inlined_to);
    if (DECL_EXTERNAL (decl))
      return true;
  
--- 2979,2985 ----
  cgraph_node::will_be_removed_from_program_if_no_direct_calls_p
  	 (bool will_inline)
  {
!   gcc_assert (!inlined_to);
    if (DECL_EXTERNAL (decl))
      return true;
  
*************** clone_of_p (cgraph_node *node, cgraph_no
*** 3003,3017 ****
  	return false;
        /* In case of instrumented expanded thunks, which can have multiple calls
  	 in them, we do not know how to continue and just have to be
! 	 optimistic.  */
!       if (node->callees->next_callee)
  	return true;
        node = node->callees->callee->ultimate_alias_target ();
  
!       if (!node2->clone.args_to_skip
! 	  || !bitmap_bit_p (node2->clone.args_to_skip, 0))
  	return false;
!       if (node2->former_clone_of == node->decl)
  	return true;
  
        cgraph_node *n2 = node2;
--- 3104,3120 ----
  	return false;
        /* In case of instrumented expanded thunks, which can have multiple calls
  	 in them, we do not know how to continue and just have to be
! 	 optimistic.  The same applies if all calls have already been inlined
! 	 into the thunk.  */
!       if (!node->callees || node->callees->next_callee)
  	return true;
        node = node->callees->callee->ultimate_alias_target ();
  
!       if (!node2->clone.param_adjustments
! 	  || node2->clone.param_adjustments->first_param_intact_p ())
  	return false;
!       if (node2->former_clone_of == node->decl
! 	  || node2->former_clone_of == node->former_clone_of)
  	return true;
  
        cgraph_node *n2 = node2;
*************** cgraph_edge::verify_corresponds_to_fndec
*** 3065,3071 ****
  {
    cgraph_node *node;
  
!   if (!decl || callee->global.inlined_to)
      return false;
    if (symtab->state == LTO_STREAMING)
      return false;
--- 3168,3174 ----
  {
    cgraph_node *node;
  
!   if (!decl || callee->inlined_to)
      return false;
    if (symtab->state == LTO_STREAMING)
      return false;
*************** cgraph_edge::verify_corresponds_to_fndec
*** 3098,3103 ****
--- 3201,3356 ----
      return false;
  }
  
+ /* Disable warnings about missing quoting in GCC diagnostics for
+    the verification errors.  Their format strings don't follow GCC
+    diagnostic conventions and the calls are ultimately followed by
+    one to internal_error.  */
+ #if __GNUC__ >= 10
+ #  pragma GCC diagnostic push
+ #  pragma GCC diagnostic ignored "-Wformat-diag"
+ #endif
+ 
+ /* Verify consistency of speculative call in NODE corresponding to STMT
+    and LTO_STMT_UID.  If INDIRECT is set, assume that it is the indirect
+    edge of call sequence. Return true if error is found.
+ 
+    This function is called to every component of indirect call (direct edges,
+    indirect edge and refs).  To save duplicated work, do full testing only
+    in that case.  */
+ static bool
+ verify_speculative_call (struct cgraph_node *node, gimple *stmt,
+ 			 unsigned int lto_stmt_uid,
+ 			 struct cgraph_edge *indirect)
+ {
+   if (indirect == NULL)
+     {
+       for (indirect = node->indirect_calls; indirect;
+ 	   indirect = indirect->next_callee)
+ 	if (indirect->call_stmt == stmt
+ 	    && indirect->lto_stmt_uid == lto_stmt_uid)
+ 	  break;
+       if (!indirect)
+ 	{
+ 	  error ("missing indirect call in speculative call sequence");
+ 	  return true;
+ 	}
+       if (!indirect->speculative)
+ 	{
+ 	  error ("indirect call in speculative call sequence has no "
+ 		 "speculative flag");
+ 	  return true;
+ 	}
+       return false;
+     }
+ 
+   /* Maximal number of targets.  We probably will never want to have more than
+      this.  */
+   const unsigned int num = 256;
+   cgraph_edge *direct_calls[num];
+   ipa_ref *refs[num];
+ 
+   for (unsigned int i = 0; i < num; i++)
+     {
+       direct_calls[i] = NULL;
+       refs[i] = NULL;
+     }
+ 
+   cgraph_edge *first_call = NULL;
+   cgraph_edge *prev_call = NULL;
+ 
+   for (cgraph_edge *direct = node->callees; direct;
+        direct = direct->next_callee)
+     if (direct->call_stmt == stmt && direct->lto_stmt_uid == lto_stmt_uid)
+       {
+ 	if (!first_call)
+ 	  first_call = direct;
+ 	if (prev_call && direct != prev_call->next_callee)
+ 	  {
+ 	    error ("speculative edges are not adjacent");
+ 	    return true;
+ 	  }
+ 	prev_call = direct;
+ 	if (!direct->speculative)
+ 	  {
+ 	    error ("direct call to %s in speculative call sequence has no "
+ 		   "speculative flag", direct->callee->dump_name ());
+ 	    return true;
+ 	  }
+ 	if (direct->speculative_id >= num)
+ 	  {
+ 	    error ("direct call to %s in speculative call sequence has "
+ 		   "speculative_id %i out of range",
+ 		   direct->callee->dump_name (), direct->speculative_id);
+ 	    return true;
+ 	  }
+ 	if (direct_calls[direct->speculative_id])
+ 	  {
+ 	    error ("duplicate direct call to %s in speculative call sequence "
+ 		   "with speculative_id %i",
+ 		   direct->callee->dump_name (), direct->speculative_id);
+ 	    return true;
+ 	  }
+ 	direct_calls[direct->speculative_id] = direct;
+       }
+ 
+   if (first_call->call_stmt
+       && first_call != node->get_edge (first_call->call_stmt))
+     {
+       error ("call stmt hash does not point to first direct edge of "
+ 	     "speculative call sequence");
+       return true;
+     }
+ 
+   ipa_ref *ref;
+   for (int i = 0; node->iterate_reference (i, ref); i++)
+     if (ref->speculative
+ 	&& ref->stmt == stmt && ref->lto_stmt_uid == lto_stmt_uid)
+       {
+ 	if (ref->speculative_id >= num)
+ 	  {
+ 	    error ("direct call to %s in speculative call sequence has "
+ 		   "speculative_id %i out of range",
+ 		   ref->referred->dump_name (), ref->speculative_id);
+ 	    return true;
+ 	  }
+ 	if (refs[ref->speculative_id])
+ 	  {
+ 	    error ("duplicate reference %s in speculative call sequence "
+ 		   "with speculative_id %i",
+ 		   ref->referred->dump_name (), ref->speculative_id);
+ 	    return true;
+ 	  }
+ 	refs[ref->speculative_id] = ref;
+       }
+ 
+   int num_targets = 0;
+   for (unsigned int i = 0 ; i < num ; i++)
+     {
+       if (refs[i] && !direct_calls[i])
+ 	{
+ 	  error ("missing direct call for speculation %i", i);
+ 	  return true;
+ 	}
+       if (!refs[i] && direct_calls[i])
+ 	{
+ 	  error ("missing ref for speculation %i", i);
+ 	  return true;
+ 	}
+       if (refs[i] != NULL)
+ 	num_targets++;
+     }
+ 
+   if (num_targets != indirect->num_speculative_call_targets_p ())
+     {
+       error ("number of speculative targets %i mismatched with "
+ 	     "num_speculative_call_targets %i",
+ 	     num_targets,
+ 	     indirect->num_speculative_call_targets_p ());
+       return true;
+     }
+   return false;
+ }
+ 
  /* Verify cgraph nodes of given cgraph node.  */
  DEBUG_FUNCTION void
  cgraph_node::verify_node (void)
*************** cgraph_node::verify_node (void)
*** 3107,3112 ****
--- 3360,3367 ----
    basic_block this_block;
    gimple_stmt_iterator gsi;
    bool error_found = false;
+   int i;
+   ipa_ref *ref = NULL;
  
    if (seen_error ())
      return;
*************** cgraph_node::verify_node (void)
*** 3126,3156 ****
        error ("cgraph count invalid");
        error_found = true;
      }
!   if (global.inlined_to && same_comdat_group)
      {
        error ("inline clone in same comdat group list");
        error_found = true;
      }
!   if (!definition && !in_other_partition && local.local)
      {
        error ("local symbols must be defined");
        error_found = true;
      }
!   if (global.inlined_to && externally_visible)
      {
        error ("externally visible inline clone");
        error_found = true;
      }
!   if (global.inlined_to && address_taken)
      {
        error ("inline clone with address taken");
        error_found = true;
      }
!   if (global.inlined_to && force_output)
      {
        error ("inline clone is forced to output");
        error_found = true;
      }
    for (e = indirect_calls; e; e = e->next_callee)
      {
        if (e->aux)
--- 3381,3443 ----
        error ("cgraph count invalid");
        error_found = true;
      }
!   if (inlined_to && same_comdat_group)
      {
        error ("inline clone in same comdat group list");
        error_found = true;
      }
!   if (inlined_to && !count.compatible_p (inlined_to->count))
!     {
!       error ("inline clone count is not compatible");
!       count.debug ();
!       inlined_to->count.debug ();
!       error_found = true;
!     }
!   if (tp_first_run < 0)
!     {
!       error ("tp_first_run must be non-negative");
!       error_found = true;
!     }
!   if (!definition && !in_other_partition && local)
      {
        error ("local symbols must be defined");
        error_found = true;
      }
!   if (inlined_to && externally_visible)
      {
        error ("externally visible inline clone");
        error_found = true;
      }
!   if (inlined_to && address_taken)
      {
        error ("inline clone with address taken");
        error_found = true;
      }
!   if (inlined_to && force_output)
      {
        error ("inline clone is forced to output");
        error_found = true;
      }
+   if (symtab->state != LTO_STREAMING)
+     {
+       if (calls_comdat_local && !same_comdat_group)
+ 	{
+ 	  error ("calls_comdat_local is set outside of a comdat group");
+ 	  error_found = true;
+ 	}
+       if (!inlined_to && calls_comdat_local != check_calls_comdat_local_p ())
+ 	{
+ 	  error ("invalid calls_comdat_local flag");
+ 	  error_found = true;
+ 	}
+     }
+   if (DECL_IS_MALLOC (decl)
+       && !POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (decl))))
+     {
+       error ("malloc attribute should be used for a function that "
+ 	     "returns a pointer");
+       error_found = true;
+     }
    for (e = indirect_calls; e; e = e->next_callee)
      {
        if (e->aux)
*************** cgraph_node::verify_node (void)
*** 3159,3164 ****
--- 3446,3458 ----
  		 identifier_to_locale (e->caller->name ()));
  	  error_found = true;
  	}
+       if (!e->count.compatible_p (count))
+ 	{
+ 	  error ("edge count is not compatible with function count");
+ 	  e->count.debug ();
+ 	  count.debug ();
+ 	  error_found = true;
+ 	}
        if (!e->indirect_unknown_callee
  	  || !e->indirect_info)
  	{
*************** cgraph_node::verify_node (void)
*** 3168,3173 ****
--- 3462,3472 ----
  	  cgraph_debug_gimple_stmt (this_cfun, e->call_stmt);
  	  error_found = true;
  	}
+       if (e->call_stmt && e->lto_stmt_uid)
+ 	{
+ 	  error ("edge has both call_stmt and lto_stmt_uid set");
+ 	  error_found = true;
+ 	}
      }
    bool check_comdat = comdat_local_p ();
    for (e = callers; e; e = e->next_caller)
*************** cgraph_node::verify_node (void)
*** 3183,3191 ****
  	}
        if (!e->inline_failed)
  	{
! 	  if (global.inlined_to
! 	      != (e->caller->global.inlined_to
! 		  ? e->caller->global.inlined_to : e->caller))
  	    {
  	      error ("inlined_to pointer is wrong");
  	      error_found = true;
--- 3482,3490 ----
  	}
        if (!e->inline_failed)
  	{
! 	  if (inlined_to
! 	      != (e->caller->inlined_to
! 		  ? e->caller->inlined_to : e->caller))
  	    {
  	      error ("inlined_to pointer is wrong");
  	      error_found = true;
*************** cgraph_node::verify_node (void)
*** 3197,3203 ****
  	    }
  	}
        else
! 	if (global.inlined_to)
  	  {
  	    error ("inlined_to pointer set for noninline callers");
  	    error_found = true;
--- 3496,3502 ----
  	    }
  	}
        else
! 	if (inlined_to)
  	  {
  	    error ("inlined_to pointer set for noninline callers");
  	    error_found = true;
*************** cgraph_node::verify_node (void)
*** 3207,3214 ****
      {
        if (e->verify_count ())
  	error_found = true;
        if (gimple_has_body_p (e->caller->decl)
! 	  && !e->caller->global.inlined_to
  	  && !e->speculative
  	  /* Optimized out calls are redirected to __builtin_unreachable.  */
  	  && (e->count.nonzero_p ()
--- 3506,3520 ----
      {
        if (e->verify_count ())
  	error_found = true;
+       if (!e->count.compatible_p (count))
+ 	{
+ 	  error ("edge count is not compatible with function count");
+ 	  e->count.debug ();
+ 	  count.debug ();
+ 	  error_found = true;
+ 	}
        if (gimple_has_body_p (e->caller->decl)
! 	  && !e->caller->inlined_to
  	  && !e->speculative
  	  /* Optimized out calls are redirected to __builtin_unreachable.  */
  	  && (e->count.nonzero_p ()
*************** cgraph_node::verify_node (void)
*** 3227,3239 ****
  	  fprintf (stderr, "\n");
  	  error_found = true;
  	}
      }
    for (e = indirect_calls; e; e = e->next_callee)
      {
        if (e->verify_count ())
  	error_found = true;
        if (gimple_has_body_p (e->caller->decl)
! 	  && !e->caller->global.inlined_to
  	  && !e->speculative
  	  && e->count.ipa_p ()
  	  && count
--- 3533,3554 ----
  	  fprintf (stderr, "\n");
  	  error_found = true;
  	}
+       if (e->call_stmt && e->lto_stmt_uid)
+ 	{
+ 	  error ("edge has both call_stmt and lto_stmt_uid set");
+ 	  error_found = true;
+ 	}
+       if (e->speculative
+ 	  && verify_speculative_call (e->caller, e->call_stmt, e->lto_stmt_uid,
+ 				      NULL))
+ 	error_found = true;
      }
    for (e = indirect_calls; e; e = e->next_callee)
      {
        if (e->verify_count ())
  	error_found = true;
        if (gimple_has_body_p (e->caller->decl)
! 	  && !e->caller->inlined_to
  	  && !e->speculative
  	  && e->count.ipa_p ()
  	  && count
*************** cgraph_node::verify_node (void)
*** 3249,3261 ****
  	  fprintf (stderr, "\n");
  	  error_found = true;
  	}
      }
!   if (!callers && global.inlined_to)
      {
        error ("inlined_to pointer is set but no predecessors found");
        error_found = true;
      }
!   if (global.inlined_to == this)
      {
        error ("inlined_to pointer refers to itself");
        error_found = true;
--- 3564,3593 ----
  	  fprintf (stderr, "\n");
  	  error_found = true;
  	}
+       if (e->speculative
+ 	  && verify_speculative_call (e->caller, e->call_stmt, e->lto_stmt_uid,
+ 				      e))
+ 	error_found = true;
      }
!   for (i = 0; iterate_reference (i, ref); i++)
!     {
!       if (ref->stmt && ref->lto_stmt_uid)
! 	{
! 	  error ("reference has both stmt and lto_stmt_uid set");
! 	  error_found = true;
! 	}
!       if (ref->speculative
! 	  && verify_speculative_call (this, ref->stmt,
! 				      ref->lto_stmt_uid, NULL))
! 	error_found = true;
!     }
! 
!   if (!callers && inlined_to)
      {
        error ("inlined_to pointer is set but no predecessors found");
        error_found = true;
      }
!   if (inlined_to == this)
      {
        error ("inlined_to pointer refers to itself");
        error_found = true;
*************** cgraph_node::verify_node (void)
*** 3344,3350 ****
  	  error ("More than one edge out of thunk node");
            error_found = true;
  	}
!       if (gimple_has_body_p (decl) && !global.inlined_to)
          {
  	  error ("Thunk is not supposed to have body");
            error_found = true;
--- 3676,3682 ----
  	  error ("More than one edge out of thunk node");
            error_found = true;
  	}
!       if (gimple_has_body_p (decl) && !inlined_to)
          {
  	  error ("Thunk is not supposed to have body");
            error_found = true;
*************** cgraph_node::verify_node (void)
*** 3352,3365 ****
      }
    else if (analyzed && gimple_has_body_p (decl)
  	   && !TREE_ASM_WRITTEN (decl)
! 	   && (!DECL_EXTERNAL (decl) || global.inlined_to)
  	   && !flag_wpa)
      {
        if (this_cfun->cfg)
  	{
  	  hash_set<gimple *> stmts;
- 	  int i;
- 	  ipa_ref *ref = NULL;
  
  	  /* Reach the trees by walking over the CFG, and note the
  	     enclosing basic-blocks in the call edges.  */
--- 3684,3695 ----
      }
    else if (analyzed && gimple_has_body_p (decl)
  	   && !TREE_ASM_WRITTEN (decl)
! 	   && (!DECL_EXTERNAL (decl) || inlined_to)
  	   && !flag_wpa)
      {
        if (this_cfun->cfg)
  	{
  	  hash_set<gimple *> stmts;
  
  	  /* Reach the trees by walking over the CFG, and note the
  	     enclosing basic-blocks in the call edges.  */
*************** cgraph_node::verify_node (void)
*** 3430,3436 ****
  
        for (e = callees; e; e = e->next_callee)
  	{
! 	  if (!e->aux)
  	    {
  	      error ("edge %s->%s has no corresponding call_stmt",
  		     identifier_to_locale (e->caller->name ()),
--- 3760,3766 ----
  
        for (e = callees; e; e = e->next_callee)
  	{
! 	  if (!e->aux && !e->speculative)
  	    {
  	      error ("edge %s->%s has no corresponding call_stmt",
  		     identifier_to_locale (e->caller->name ()),
*************** cgraph_node::verify_cgraph_nodes (void)
*** 3497,3502 ****
--- 3827,3836 ----
      node->verify ();
  }
  
+ #if __GNUC__ >= 10
+ #  pragma GCC diagnostic pop
+ #endif
+ 
  /* Walk the alias chain to return the function cgraph_node is alias of.
     Walk through thunks, too.
     When AVAILABILITY is non-NULL, get minimal availability in the chain.
*************** cgraph_node::function_symbol (enum avail
*** 3511,3526 ****
  
    while (node->thunk.thunk_p)
      {
        ref = node;
        node = node->callees->callee;
!       if (availability)
! 	{
! 	  enum availability a;
! 	  a = node->get_availability (ref);
! 	  if (a < *availability)
! 	    *availability = a;
! 	}
!       node = node->ultimate_alias_target (availability, ref);
      }
    return node;
  }
--- 3845,3857 ----
  
    while (node->thunk.thunk_p)
      {
+       enum availability a;
+ 
        ref = node;
        node = node->callees->callee;
!       node = node->ultimate_alias_target (availability ? &a : NULL, ref);
!       if (availability && a < *availability)
! 	*availability = a;
      }
    return node;
  }
*************** cgraph_node::function_or_virtual_thunk_s
*** 3541,3556 ****
  
    while (node->thunk.thunk_p && !node->thunk.virtual_offset_p)
      {
        ref = node;
        node = node->callees->callee;
!       if (availability)
! 	{
! 	  enum availability a;
! 	  a = node->get_availability (ref);
! 	  if (a < *availability)
! 	    *availability = a;
! 	}
!       node = node->ultimate_alias_target (availability, ref);
      }
    return node;
  }
--- 3872,3884 ----
  
    while (node->thunk.thunk_p && !node->thunk.virtual_offset_p)
      {
+       enum availability a;
+ 
        ref = node;
        node = node->callees->callee;
!       node = node->ultimate_alias_target (availability ? &a : NULL, ref);
!       if (availability && a < *availability)
! 	*availability = a;
      }
    return node;
  }
*************** cgraph_node::get_untransformed_body (voi
*** 3583,3594 ****
    struct lto_in_decl_state *decl_state
  	 = lto_get_function_in_decl_state (file_data, decl);
  
    data = lto_get_section_data (file_data, LTO_section_function_body,
! 			       name, &len, decl_state->compressed);
    if (!data)
!     fatal_error (input_location, "%s: section %s is missing",
! 		 file_data->file_name,
! 		 name);
  
    gcc_assert (DECL_STRUCT_FUNCTION (decl) == NULL);
  
--- 3911,3927 ----
    struct lto_in_decl_state *decl_state
  	 = lto_get_function_in_decl_state (file_data, decl);
  
+   cgraph_node *origin = this;
+   while (origin->clone_of)
+     origin = origin->clone_of;
+ 
+   int stream_order = origin->order - file_data->order_base;
    data = lto_get_section_data (file_data, LTO_section_function_body,
! 			       name, stream_order, &len,
! 			       decl_state->compressed);
    if (!data)
!     fatal_error (input_location, "%s: section %s.%d is missing",
! 		 file_data->file_name, name, stream_order);
  
    gcc_assert (DECL_STRUCT_FUNCTION (decl) == NULL);
  
*************** cgraph_node::get_body (void)
*** 3623,3629 ****
       early.
       TODO: Materializing clones here will likely lead to smaller LTRANS
       footprint. */
!   gcc_assert (!global.inlined_to && !clone_of);
    if (ipa_transforms_to_apply.exists ())
      {
        opt_pass *saved_current_pass = current_pass;
--- 3956,3962 ----
       early.
       TODO: Materializing clones here will likely lead to smaller LTRANS
       footprint. */
!   gcc_assert (!inlined_to && !clone_of);
    if (ipa_transforms_to_apply.exists ())
      {
        opt_pass *saved_current_pass = current_pass;
*************** cgraph_node::get_body (void)
*** 3634,3639 ****
--- 3967,3974 ----
        set_dump_file (NULL);
  
        push_cfun (DECL_STRUCT_FUNCTION (decl));
+ 
+       update_ssa (TODO_update_ssa_only_virtuals);
        execute_all_ipa_transforms (true);
        cgraph_edge::rebuild_edges ();
        free_dominance_info (CDI_DOMINATORS);
*************** cgraph_node::get_body (void)
*** 3652,3660 ****
  /* Return the DECL_STRUCT_FUNCTION of the function.  */
  
  struct function *
! cgraph_node::get_fun (void)
  {
!   cgraph_node *node = this;
    struct function *fun = DECL_STRUCT_FUNCTION (node->decl);
  
    while (!fun && node->clone_of)
--- 3987,3995 ----
  /* Return the DECL_STRUCT_FUNCTION of the function.  */
  
  struct function *
! cgraph_node::get_fun () const
  {
!   const cgraph_node *node = this;
    struct function *fun = DECL_STRUCT_FUNCTION (node->decl);
  
    while (!fun && node->clone_of)
*************** cgraph_node::get_fun (void)
*** 3666,3767 ****
    return fun;
  }
  
- /* Verify if the type of the argument matches that of the function
-    declaration.  If we cannot verify this or there is a mismatch,
-    return false.  */
- 
- static bool
- gimple_check_call_args (gimple *stmt, tree fndecl, bool args_count_match)
- {
-   tree parms, p;
-   unsigned int i, nargs;
- 
-   /* Calls to internal functions always match their signature.  */
-   if (gimple_call_internal_p (stmt))
-     return true;
- 
-   nargs = gimple_call_num_args (stmt);
- 
-   /* Get argument types for verification.  */
-   if (fndecl)
-     parms = TYPE_ARG_TYPES (TREE_TYPE (fndecl));
-   else
-     parms = TYPE_ARG_TYPES (gimple_call_fntype (stmt));
- 
-   /* Verify if the type of the argument matches that of the function
-      declaration.  If we cannot verify this or there is a mismatch,
-      return false.  */
-   if (fndecl && DECL_ARGUMENTS (fndecl))
-     {
-       for (i = 0, p = DECL_ARGUMENTS (fndecl);
- 	   i < nargs;
- 	   i++, p = DECL_CHAIN (p))
- 	{
- 	  tree arg;
- 	  /* We cannot distinguish a varargs function from the case
- 	     of excess parameters, still deferring the inlining decision
- 	     to the callee is possible.  */
- 	  if (!p)
- 	    break;
- 	  arg = gimple_call_arg (stmt, i);
- 	  if (p == error_mark_node
- 	      || DECL_ARG_TYPE (p) == error_mark_node
- 	      || arg == error_mark_node
- 	      || (!types_compatible_p (DECL_ARG_TYPE (p), TREE_TYPE (arg))
- 		  && !fold_convertible_p (DECL_ARG_TYPE (p), arg)))
-             return false;
- 	}
-       if (args_count_match && p)
- 	return false;
-     }
-   else if (parms)
-     {
-       for (i = 0, p = parms; i < nargs; i++, p = TREE_CHAIN (p))
- 	{
- 	  tree arg;
- 	  /* If this is a varargs function defer inlining decision
- 	     to callee.  */
- 	  if (!p)
- 	    break;
- 	  arg = gimple_call_arg (stmt, i);
- 	  if (TREE_VALUE (p) == error_mark_node
- 	      || arg == error_mark_node
- 	      || TREE_CODE (TREE_VALUE (p)) == VOID_TYPE
- 	      || (!types_compatible_p (TREE_VALUE (p), TREE_TYPE (arg))
- 		  && !fold_convertible_p (TREE_VALUE (p), arg)))
-             return false;
- 	}
-     }
-   else
-     {
-       if (nargs != 0)
-         return false;
-     }
-   return true;
- }
- 
- /* Verify if the type of the argument and lhs of CALL_STMT matches
-    that of the function declaration CALLEE. If ARGS_COUNT_MATCH is
-    true, the arg count needs to be the same.
-    If we cannot verify this or there is a mismatch, return false.  */
- 
- bool
- gimple_check_call_matching_types (gimple *call_stmt, tree callee,
- 				  bool args_count_match)
- {
-   tree lhs;
- 
-   if ((DECL_RESULT (callee)
-        && !DECL_BY_REFERENCE (DECL_RESULT (callee))
-        && (lhs = gimple_call_lhs (call_stmt)) != NULL_TREE
-        && !useless_type_conversion_p (TREE_TYPE (DECL_RESULT (callee)),
-                                       TREE_TYPE (lhs))
-        && !fold_convertible_p (TREE_TYPE (DECL_RESULT (callee)), lhs))
-       || !gimple_check_call_args (call_stmt, callee, args_count_match))
-     return false;
-   return true;
- }
- 
  /* Reset all state within cgraph.c so that we can rerun the compiler
     within the same process.  For use by toplev::finalize.  */
  
--- 4001,4006 ----
*************** cgraph_c_finalize (void)
*** 3776,3782 ****
    version_info_node = NULL;
  }
  
! /* A wroker for call_for_symbol_and_aliases.  */
  
  bool
  cgraph_node::call_for_symbol_and_aliases_1 (bool (*callback) (cgraph_node *,
--- 4015,4021 ----
    version_info_node = NULL;
  }
  
! /* A worker for call_for_symbol_and_aliases.  */
  
  bool
  cgraph_node::call_for_symbol_and_aliases_1 (bool (*callback) (cgraph_node *,
*************** cgraph_node::has_thunk_p (cgraph_node *n
*** 3813,3820 ****
  sreal
  cgraph_edge::sreal_frequency ()
  {
!   return count.to_sreal_scale (caller->global.inlined_to
! 			       ? caller->global.inlined_to->count
  			       : caller->count);
  }
  
--- 4052,4059 ----
  sreal
  cgraph_edge::sreal_frequency ()
  {
!   return count.to_sreal_scale (caller->inlined_to
! 			       ? caller->inlined_to->count
  			       : caller->count);
  }
  
*************** cgraph_edge::possibly_call_in_translatio
*** 3831,3843 ****
    if (flag_incremental_link == INCREMENTAL_LINK_LTO)
      return true;
  
!   /* We may be smarter here and avoid stremaing in indirect calls we can't
!      track, but that would require arranging stremaing the indirect call
       summary first.  */
    if (!callee)
      return true;
  
!   /* If calle is local to the original translation unit, it will be defined.  */
    if (!TREE_PUBLIC (callee->decl) && !DECL_EXTERNAL (callee->decl))
      return true;
  
--- 4070,4083 ----
    if (flag_incremental_link == INCREMENTAL_LINK_LTO)
      return true;
  
!   /* We may be smarter here and avoid streaming in indirect calls we can't
!      track, but that would require arranging streaming the indirect call
       summary first.  */
    if (!callee)
      return true;
  
!   /* If callee is local to the original translation unit, it will be
!      defined.  */
    if (!TREE_PUBLIC (callee->decl) && !DECL_EXTERNAL (callee->decl))
      return true;
  
*************** cgraph_edge::possibly_call_in_translatio
*** 3850,3856 ****
    if (node->previous_sharing_asm_name)
      node = symtab_node::get_for_asmname (DECL_ASSEMBLER_NAME (callee->decl));
    gcc_assert (TREE_PUBLIC (node->decl));
!   return node->get_availability () >= AVAIL_AVAILABLE;
  }
  
  /* A stashed copy of "symtab" for use by selftest::symbol_table_test.
--- 4090,4117 ----
    if (node->previous_sharing_asm_name)
      node = symtab_node::get_for_asmname (DECL_ASSEMBLER_NAME (callee->decl));
    gcc_assert (TREE_PUBLIC (node->decl));
!   return node->get_availability () >= AVAIL_INTERPOSABLE;
! }
! 
! /* Return num_speculative_targets of this edge.  */
! 
! int
! cgraph_edge::num_speculative_call_targets_p (void)
! {
!   return indirect_info ? indirect_info->num_speculative_call_targets : 0;
! }
! 
! /* Check if function calls comdat local.  This is used to recompute
!    calls_comdat_local flag after function transformations.  */
! bool
! cgraph_node::check_calls_comdat_local_p ()
! {
!   for (cgraph_edge *e = callees; e; e = e->next_callee)
!     if (e->inline_failed
! 	? e->callee->comdat_local_p ()
! 	: e->callee->check_calls_comdat_local_p ())
!       return true;
!   return false;
  }
  
  /* A stashed copy of "symtab" for use by selftest::symbol_table_test.
*************** symbol_table_test::symbol_table_test ()
*** 3872,3878 ****
  {
    gcc_assert (saved_symtab == NULL);
    saved_symtab = symtab;
!   symtab = new (ggc_cleared_alloc <symbol_table> ()) symbol_table ();
  }
  
  /* Destructor.  Restore the old value of symtab.  */
--- 4133,4139 ----
  {
    gcc_assert (saved_symtab == NULL);
    saved_symtab = symtab;
!   symtab = new (ggc_alloc<symbol_table> ()) symbol_table ();
  }
  
  /* Destructor.  Restore the old value of symtab.  */
diff -Nrcpad gcc-9.3.0/gcc/cgraph.h gcc-10.1.0/gcc/cgraph.h
*** gcc-9.3.0/gcc/cgraph.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cgraph.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Callgraph handling code.
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
     Contributed by Jan Hubicka
  
  This file is part of GCC.
--- 1,5 ----
  /* Callgraph handling code.
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
     Contributed by Jan Hubicka
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 24,29 ****
--- 24,30 ----
  #include "profile-count.h"
  #include "ipa-ref.h"
  #include "plugin-api.h"
+ #include "ipa-param-manipulation.h"
  
  extern void debuginfo_early_init (void);
  extern void debuginfo_init (void);
*************** enum availability
*** 80,87 ****
       program.  */
    AVAIL_AVAILABLE,
    /* Function body/variable initializer is known and all it's uses are
!      explicitly visible within current unit (ie it's address is never taken and
!      it is not exported to other units). Currently used only for functions.  */
    AVAIL_LOCAL
  };
  
--- 81,89 ----
       program.  */
    AVAIL_AVAILABLE,
    /* Function body/variable initializer is known and all it's uses are
!      explicitly visible within current unit (i.e. it's address is never taken
!      and it is not exported to other units). Currently used only for
!      functions.  */
    AVAIL_LOCAL
  };
  
*************** enum symbol_partitioning_class
*** 91,97 ****
     /* External declarations are ignored by partitioning algorithms and they are
        added into the boundary later via compute_ltrans_boundary.  */
     SYMBOL_EXTERNAL,
!    /* Partitioned symbols are pur into one of partitions.  */
     SYMBOL_PARTITION,
     /* Duplicated symbols (such as comdat or constant pool references) are
        copied into every node needing them via add_symbol_to_partition.  */
--- 93,99 ----
     /* External declarations are ignored by partitioning algorithms and they are
        added into the boundary later via compute_ltrans_boundary.  */
     SYMBOL_EXTERNAL,
!    /* Partitioned symbols are put into one of partitions.  */
     SYMBOL_PARTITION,
     /* Duplicated symbols (such as comdat or constant pool references) are
        copied into every node needing them via add_symbol_to_partition.  */
*************** enum symbol_partitioning_class
*** 100,112 ****
  
  /* Base of all entries in the symbol table.
     The symtab_node is inherited by cgraph and varpol nodes.  */
! class GTY((desc ("%h.type"), tag ("SYMTAB_SYMBOL"),
! 	   chain_next ("%h.next"), chain_prev ("%h.previous")))
    symtab_node
  {
  public:
    friend class symbol_table;
  
    /* Return name.  */
    const char *name () const;
  
--- 102,131 ----
  
  /* Base of all entries in the symbol table.
     The symtab_node is inherited by cgraph and varpol nodes.  */
! struct GTY((desc ("%h.type"), tag ("SYMTAB_SYMBOL"),
! 	    chain_next ("%h.next"), chain_prev ("%h.previous")))
    symtab_node
  {
  public:
    friend class symbol_table;
  
+   /* Constructor.  */
+   explicit symtab_node (symtab_type t)
+     : type (t), resolution (LDPR_UNKNOWN), definition (false), alias (false),
+       transparent_alias (false), weakref (false), cpp_implicit_alias (false),
+       symver (false), analyzed (false), writeonly (false),
+       refuse_visibility_changes (false), externally_visible (false),
+       no_reorder (false), force_output (false), forced_by_abi (false),
+       unique_name (false), implicit_section (false), body_removed (false),
+       used_from_other_partition (false), in_other_partition (false),
+       address_taken (false), in_init_priority_hash (false),
+       need_lto_streaming (false), offloadable (false), ifunc_resolver (false),
+       order (false), next_sharing_asm_name (NULL),
+       previous_sharing_asm_name (NULL), same_comdat_group (NULL), ref_list (),
+       alias_target (NULL), lto_file_data (NULL), aux (NULL),
+       x_comdat_group (NULL_TREE), x_section (NULL)
+   {}
+ 
    /* Return name.  */
    const char *name () const;
  
*************** public:
*** 119,124 ****
--- 138,149 ----
    /* Return dump name with assembler name.  */
    const char *dump_asm_name () const;
  
+   /* Return visibility name.  */
+   const char *get_visibility_string () const;
+ 
+   /* Return type_name name.  */
+   const char *get_symtab_type_string () const;
+ 
    /* Add node into symbol table.  This function is not used directly, but via
       cgraph/varpool node creation routines.  */
    void register_symbol (void);
*************** public:
*** 129,134 ****
--- 154,162 ----
    /* Dump symtab node to F.  */
    void dump (FILE *f);
  
+   /* Dump symtab callgraph in graphviz format.  */
+   void dump_graphviz (FILE *f);
+ 
    /* Dump symtab node to stderr.  */
    void DEBUG_FUNCTION debug (void);
  
*************** public:
*** 136,148 ****
    void DEBUG_FUNCTION verify (void);
  
    /* Return ipa reference from this symtab_node to
!      REFERED_NODE or REFERED_VARPOOL_NODE. USE_TYPE specify type
       of the use and STMT the statement (if it exists).  */
    ipa_ref *create_reference (symtab_node *referred_node,
  			     enum ipa_ref_use use_type);
  
    /* Return ipa reference from this symtab_node to
!      REFERED_NODE or REFERED_VARPOOL_NODE. USE_TYPE specify type
       of the use and STMT the statement (if it exists).  */
    ipa_ref *create_reference (symtab_node *referred_node,
  			     enum ipa_ref_use use_type, gimple *stmt);
--- 164,176 ----
    void DEBUG_FUNCTION verify (void);
  
    /* Return ipa reference from this symtab_node to
!      REFERRED_NODE or REFERRED_VARPOOL_NODE. USE_TYPE specify type
       of the use and STMT the statement (if it exists).  */
    ipa_ref *create_reference (symtab_node *referred_node,
  			     enum ipa_ref_use use_type);
  
    /* Return ipa reference from this symtab_node to
!      REFERRED_NODE or REFERRED_VARPOOL_NODE. USE_TYPE specify type
       of the use and STMT the statement (if it exists).  */
    ipa_ref *create_reference (symtab_node *referred_node,
  			     enum ipa_ref_use use_type, gimple *stmt);
*************** public:
*** 361,367 ****
       Assume that symbol is used (so there is no need to take into account
       garbage collecting linkers)
  
!      This can happen for comdats, commons and weaks when they are previaled
       by other definition at static linking time.  */
    inline bool
    can_be_discarded_p (void)
--- 389,395 ----
       Assume that symbol is used (so there is no need to take into account
       garbage collecting linkers)
  
!      This can happen for comdats, commons and weaks when they are prevailed
       by other definition at static linking time.  */
    inline bool
    can_be_discarded_p (void)
*************** public:
*** 396,402 ****
  
       If MEMORY_ACCESSED is true, assume that both memory pointer to THIS
       and S2 is going to be accessed.  This eliminates the situations when
!      either THIS or S2 is NULL and is seful for comparing bases when deciding
       about memory aliasing.  */
    int equal_address_to (symtab_node *s2, bool memory_accessed = false);
  
--- 424,430 ----
  
       If MEMORY_ACCESSED is true, assume that both memory pointer to THIS
       and S2 is going to be accessed.  This eliminates the situations when
!      either THIS or S2 is NULL and is useful for comparing bases when deciding
       about memory aliasing.  */
    int equal_address_to (symtab_node *s2, bool memory_accessed = false);
  
*************** public:
*** 453,459 ****
       set via finalize_function or finalize_decl  */
    unsigned definition : 1;
    /* True when symbol is an alias.
!      Set by ssemble_alias.  */
    unsigned alias : 1;
    /* When true the alias is translated into its target symbol either by GCC
       or assembler (it also may just be a duplicate declaration of the same
--- 481,487 ----
       set via finalize_function or finalize_decl  */
    unsigned definition : 1;
    /* True when symbol is an alias.
!      Set by assemble_alias.  */
    unsigned alias : 1;
    /* When true the alias is translated into its target symbol either by GCC
       or assembler (it also may just be a duplicate declaration of the same
*************** public:
*** 467,473 ****
  	 by varasm.c. For those DECL_ASSEMBLER_NAME have
  	 IDENTIFIER_TRANSPARENT_ALIAS set and thus also their assembler
  	 name must be unique.
! 	 Weakrefs belong to this cateogry when we target assembler without
  	 .weakref directive.
         - weakrefs that are renamed by assembler via .weakref directive.
  	 In this case the alias may or may not be definition (depending if
--- 495,501 ----
  	 by varasm.c. For those DECL_ASSEMBLER_NAME have
  	 IDENTIFIER_TRANSPARENT_ALIAS set and thus also their assembler
  	 name must be unique.
! 	 Weakrefs belong to this category when we target assembler without
  	 .weakref directive.
         - weakrefs that are renamed by assembler via .weakref directive.
  	 In this case the alias may or may not be definition (depending if
*************** public:
*** 486,491 ****
--- 514,521 ----
       and their visibility needs to be copied from their "masters" at
       the end of parsing.  */
    unsigned cpp_implicit_alias : 1;
+   /* The alias is a symbol version.  */
+   unsigned symver : 1;
    /* Set once the definition was analyzed.  The list of references and
       other properties are built during analysis.  */
    unsigned analyzed : 1;
*************** symtab_node::checking_verify_symtab_node
*** 638,645 ****
  }
  
  /* Walk all aliases for NODE.  */
! #define FOR_EACH_ALIAS(node, alias) \
!   for (unsigned x_i = 0; node->iterate_direct_aliases (x_i, alias); x_i++)
  
  /* This is the information that is put into the cgraph local structure
     to recover a function.  */
--- 668,677 ----
  }
  
  /* Walk all aliases for NODE.  */
! #define FOR_EACH_ALIAS(NODE, ALIAS)				\
!   for (unsigned ALIAS##_iter_ = 0;				\
!        (NODE)->iterate_direct_aliases (ALIAS##_iter_, ALIAS);	\
!        ALIAS##_iter_++)
  
  /* This is the information that is put into the cgraph local structure
     to recover a function.  */
*************** struct GTY(()) cgraph_thunk_info {
*** 695,753 ****
    bool thunk_p;
  };
  
- /* Information about the function collected locally.
-    Available after function is analyzed.  */
- 
- struct GTY(()) cgraph_local_info {
-   /* Set when function is visible in current compilation unit only and
-      its address is never taken.  */
-   unsigned local : 1;
- 
-   /* False when there is something makes versioning impossible.  */
-   unsigned versionable : 1;
- 
-   /* False when function calling convention and signature cannot be changed.
-      This is the case when __builtin_apply_args is used.  */
-   unsigned can_change_signature : 1;
- 
-   /* True when the function has been originally extern inline, but it is
-      redefined now.  */
-   unsigned redefined_extern_inline : 1;
- 
-   /* True if the function may enter serial irrevocable mode.  */
-   unsigned tm_may_enter_irr : 1;
- };
- 
- /* Information about the function that needs to be computed globally
-    once compilation is finished.  Available only with -funit-at-a-time.  */
- 
- struct GTY(()) cgraph_global_info {
-   /* For inline clones this points to the function they will be
-      inlined into.  */
-   cgraph_node *inlined_to;
- };
- 
  /* Represent which DECL tree (or reference to such tree)
     will be replaced by another tree while versioning.  */
  struct GTY(()) ipa_replace_map
  {
-   /* The tree that will be replaced.  */
-   tree old_tree;
    /* The new (replacing) tree.  */
    tree new_tree;
    /* Parameter number to replace, when old_tree is NULL.  */
    int parm_num;
-   /* True when a substitution should be done, false otherwise.  */
-   bool replace_p;
-   /* True when we replace a reference to old_tree.  */
-   bool ref_p;
  };
  
  struct GTY(()) cgraph_clone_info
  {
    vec<ipa_replace_map *, va_gc> *tree_map;
!   bitmap args_to_skip;
!   bitmap combined_args_to_skip;
  };
  
  enum cgraph_simd_clone_arg_type
--- 727,761 ----
    bool thunk_p;
  };
  
  /* Represent which DECL tree (or reference to such tree)
     will be replaced by another tree while versioning.  */
  struct GTY(()) ipa_replace_map
  {
    /* The new (replacing) tree.  */
    tree new_tree;
    /* Parameter number to replace, when old_tree is NULL.  */
    int parm_num;
  };
  
  struct GTY(()) cgraph_clone_info
  {
+   /* Constants discovered by IPA-CP, i.e. which parameter should be replaced
+      with what.  */
    vec<ipa_replace_map *, va_gc> *tree_map;
!   /* Parameter modification that IPA-SRA decided to perform.  */
!   ipa_param_adjustments *param_adjustments;
!   /* Lists of dummy-decl and offset pairs representing split formal parameters
!      in the caller.  Offsets of all new replacements are enumerated, those
!      coming from the same original parameter have the same dummy decl stored
!      along with them.
! 
!      Dummy decls sit in call statement arguments followed by new parameter
!      decls (or their SSA names) in between (caller) clone materialization and
!      call redirection.  Redirection then recognizes the dummy variable and
!      together with the stored offsets can reconstruct what exactly the new
!      parameter decls represent and can leave in place only those that the
!      callee expects.  */
!   vec<ipa_param_performed_split, va_gc> *performed_splits;
  };
  
  enum cgraph_simd_clone_arg_type
*************** struct cgraph_edge_hasher : ggc_ptr_hash
*** 906,915 ****
  /* The cgraph data structure.
     Each function decl has assigned cgraph_node listing callees and callers.  */
  
! struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node : public symtab_node {
! public:
    friend class symbol_table;
  
    /* Remove the node from cgraph and all inline clones inlined into it.
       Skip however removal of FORBIDDEN_NODE and return true if it needs to be
       removed.  This allows to call the function from outer loop walking clone
--- 914,945 ----
  /* The cgraph data structure.
     Each function decl has assigned cgraph_node listing callees and callers.  */
  
! struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node : public symtab_node
! {
    friend class symbol_table;
  
+   /* Constructor.  */
+   explicit cgraph_node (int uid)
+     : symtab_node (SYMTAB_FUNCTION), callees (NULL), callers (NULL),
+       indirect_calls (NULL), origin (NULL), nested (NULL), next_nested (NULL),
+       next_sibling_clone (NULL), prev_sibling_clone (NULL), clones (NULL),
+       clone_of (NULL), call_site_hash (NULL), former_clone_of (NULL),
+       simdclone (NULL), simd_clones (NULL), ipa_transforms_to_apply (vNULL),
+       inlined_to (NULL), rtl (NULL), clone (), thunk (),
+       count (profile_count::uninitialized ()),
+       count_materialization_scale (REG_BR_PROB_BASE), profile_id (0),
+       unit_id (0), tp_first_run (0), used_as_abstract_origin (false),
+       lowered (false), process (false), frequency (NODE_FREQUENCY_NORMAL),
+       only_called_at_startup (false), only_called_at_exit (false),
+       tm_clone (false), dispatcher_function (false), calls_comdat_local (false),
+       icf_merged (false), nonfreeing_fn (false), merged_comdat (false),
+       merged_extern_inline (false), parallelized_function (false),
+       split_part (false), indirect_call_target (false), local (false),
+       versionable (false), can_change_signature (false),
+       redefined_extern_inline (false), tm_may_enter_irr (false),
+       ipcp_clone (false), m_uid (uid), m_summary_id (-1)
+   {}
+ 
    /* Remove the node from cgraph and all inline clones inlined into it.
       Skip however removal of FORBIDDEN_NODE and return true if it needs to be
       removed.  This allows to call the function from outer loop walking clone
*************** public:
*** 954,965 ****
       When UPDATE_ORIGINAL is true, the counts are subtracted from the original
       function's profile to reflect the fact that part of execution is handled
       by node.
!      When CALL_DUPLICATOIN_HOOK is true, the ipa passes are acknowledged about
       the new clone. Otherwise the caller is responsible for doing so later.
  
       If the new node is being inlined into another one, NEW_INLINED_TO should be
       the outline function the new one is (even indirectly) inlined to.
!      All hooks will see this in node's global.inlined_to, when invoked.
       Can be NULL if the node is not inlined.  SUFFIX is string that is appended
       to the original name.  */
    cgraph_node *create_clone (tree decl, profile_count count,
--- 984,995 ----
       When UPDATE_ORIGINAL is true, the counts are subtracted from the original
       function's profile to reflect the fact that part of execution is handled
       by node.
!      When CALL_DUPLICATION_HOOK is true, the ipa passes are acknowledged about
       the new clone. Otherwise the caller is responsible for doing so later.
  
       If the new node is being inlined into another one, NEW_INLINED_TO should be
       the outline function the new one is (even indirectly) inlined to.
!      All hooks will see this in node's inlined_to, when invoked.
       Can be NULL if the node is not inlined.  SUFFIX is string that is appended
       to the original name.  */
    cgraph_node *create_clone (tree decl, profile_count count,
*************** public:
*** 967,981 ****
  			     vec<cgraph_edge *> redirect_callers,
  			     bool call_duplication_hook,
  			     cgraph_node *new_inlined_to,
! 			     bitmap args_to_skip, const char *suffix = NULL);
  
    /* Create callgraph node clone with new declaration.  The actual body will be
       copied later at compilation stage.  The name of the new clone will be
       constructed from the name of the original node, SUFFIX and NUM_SUFFIX.  */
    cgraph_node *create_virtual_clone (vec<cgraph_edge *> redirect_callers,
  				     vec<ipa_replace_map *, va_gc> *tree_map,
! 				     bitmap args_to_skip, const char * suffix,
! 				     unsigned num_suffix);
  
    /* cgraph node being removed from symbol table; see if its entry can be
     replaced by other inline clone.  */
--- 997,1016 ----
  			     vec<cgraph_edge *> redirect_callers,
  			     bool call_duplication_hook,
  			     cgraph_node *new_inlined_to,
! 			     ipa_param_adjustments *param_adjustments,
! 			     const char *suffix = NULL);
  
    /* Create callgraph node clone with new declaration.  The actual body will be
       copied later at compilation stage.  The name of the new clone will be
       constructed from the name of the original node, SUFFIX and NUM_SUFFIX.  */
    cgraph_node *create_virtual_clone (vec<cgraph_edge *> redirect_callers,
  				     vec<ipa_replace_map *, va_gc> *tree_map,
! 				     ipa_param_adjustments *param_adjustments,
! 				     const char * suffix, unsigned num_suffix);
! 
!   /* Remove the node from the tree of virtual and inline clones and make it a
!      standalone node - not a clone any more.  */
!   void remove_from_clone_tree ();
  
    /* cgraph node being removed from symbol table; see if its entry can be
     replaced by other inline clone.  */
*************** public:
*** 1024,1032 ****
       Return the new version's cgraph node.  */
    cgraph_node *create_version_clone_with_body
      (vec<cgraph_edge *> redirect_callers,
!      vec<ipa_replace_map *, va_gc> *tree_map, bitmap args_to_skip,
!      bool skip_return, bitmap bbs_to_copy, basic_block new_entry_block,
!      const char *clone_name, tree target_attributes = NULL_TREE);
  
    /* Insert a new cgraph_function_version_info node into cgraph_fnver_htab
       corresponding to cgraph_node.  */
--- 1059,1068 ----
       Return the new version's cgraph node.  */
    cgraph_node *create_version_clone_with_body
      (vec<cgraph_edge *> redirect_callers,
!      vec<ipa_replace_map *, va_gc> *tree_map,
!      ipa_param_adjustments *param_adjustments,
!      bitmap bbs_to_copy, basic_block new_entry_block, const char *clone_name,
!      tree target_attributes = NULL_TREE);
  
    /* Insert a new cgraph_function_version_info node into cgraph_fnver_htab
       corresponding to cgraph_node.  */
*************** public:
*** 1100,1105 ****
--- 1136,1144 ----
    /* Dump call graph node to file F.  */
    void dump (FILE *f);
  
+   /* Dump call graph node to file F.  */
+   void dump_graphviz (FILE *f);
+ 
    /* Dump call graph node to stderr.  */
    void DEBUG_FUNCTION debug (void);
  
*************** public:
*** 1119,1125 ****
    void release_body (bool keep_arguments = false);
  
    /* Return the DECL_STRUCT_FUNCTION of the function.  */
!   struct function *get_fun (void);
  
    /* cgraph_node is no longer nested function; update cgraph accordingly.  */
    void unnest (void);
--- 1158,1164 ----
    void release_body (bool keep_arguments = false);
  
    /* Return the DECL_STRUCT_FUNCTION of the function.  */
!   struct function *get_fun () const;
  
    /* cgraph_node is no longer nested function; update cgraph accordingly.  */
    void unnest (void);
*************** public:
*** 1130,1136 ****
    /* Likewise indicate that a node is having address taken.  */
    void mark_address_taken (void);
  
!   /* Set fialization priority to PRIORITY.  */
    void set_fini_priority (priority_type priority);
  
    /* Return the finalization priority.  */
--- 1169,1175 ----
    /* Likewise indicate that a node is having address taken.  */
    void mark_address_taken (void);
  
!   /* Set finalization priority to PRIORITY.  */
    void set_fini_priority (priority_type priority);
  
    /* Return the finalization priority.  */
*************** public:
*** 1138,1151 ****
  
    /* Create edge from a given function to CALLEE in the cgraph.  */
    cgraph_edge *create_edge (cgraph_node *callee,
! 			    gcall *call_stmt, profile_count count);
  
    /* Create an indirect edge with a yet-undetermined callee where the call
       statement destination is a formal parameter of the caller with index
       PARAM_INDEX. */
    cgraph_edge *create_indirect_edge (gcall *call_stmt, int ecf_flags,
  				     profile_count count,
! 				     bool compute_indirect_info = true);
  
    /* Like cgraph_create_edge walk the clone tree and update all clones sharing
     same function body.  If clones already have edge for OLD_STMT; only
--- 1177,1191 ----
  
    /* Create edge from a given function to CALLEE in the cgraph.  */
    cgraph_edge *create_edge (cgraph_node *callee,
! 			    gcall *call_stmt, profile_count count,
! 			    bool cloning_p = false);
  
    /* Create an indirect edge with a yet-undetermined callee where the call
       statement destination is a formal parameter of the caller with index
       PARAM_INDEX. */
    cgraph_edge *create_indirect_edge (gcall *call_stmt, int ecf_flags,
  				     profile_count count,
! 				     bool cloning_p = false);
  
    /* Like cgraph_create_edge walk the clone tree and update all clones sharing
     same function body.  If clones already have edge for OLD_STMT; only
*************** public:
*** 1185,1191 ****
      If SET_CONST if false, clear the flag.
  
      When setting the flag be careful about possible interposition and
!     do not set the flag for functions that can be interposet and set pure
      flag for functions that can bind to other definition. 
  
      Return true if any change was done. */
--- 1225,1231 ----
      If SET_CONST if false, clear the flag.
  
      When setting the flag be careful about possible interposition and
!     do not set the flag for functions that can be interposed and set pure
      flag for functions that can bind to other definition. 
  
      Return true if any change was done. */
*************** public:
*** 1286,1291 ****
--- 1326,1335 ----
    /* Return true if this node represents a former, i.e. an expanded, thunk.  */
    inline bool former_thunk_p (void);
  
+   /* Check if function calls comdat local.  This is used to recompute
+      calls_comdat_local flag after function transformations.  */
+   bool check_calls_comdat_local_p ();
+ 
    /* Return true if function should be optimized for size.  */
    bool optimize_for_size_p (void);
  
*************** public:
*** 1353,1362 ****
    static cgraph_node * get_create (tree);
  
    /* Return local info for the compiled function.  */
!   static cgraph_local_info *local_info (tree decl);
  
!   /* Return local info for the compiled function.  */
!   static struct cgraph_rtl_info *rtl_info (tree);
  
    /* Return the cgraph node that has ASMNAME for its DECL_ASSEMBLER_NAME.
       Return NULL if there's no such node.  */
--- 1397,1406 ----
    static cgraph_node * get_create (tree);
  
    /* Return local info for the compiled function.  */
!   static cgraph_node *local_info_node (tree decl);
  
!   /* Return RTL info for the compiled function.  */
!   static struct cgraph_rtl_info *rtl_info (const_tree);
  
    /* Return the cgraph node that has ASMNAME for its DECL_ASSEMBLER_NAME.
       Return NULL if there's no such node.  */
*************** public:
*** 1419,1426 ****
       per-function in order to allow IPA passes to introduce new functions.  */
    vec<ipa_opt_pass> GTY((skip)) ipa_transforms_to_apply;
  
!   cgraph_local_info local;
!   cgraph_global_info global;
    struct cgraph_rtl_info *rtl;
    cgraph_clone_info clone;
    cgraph_thunk_info thunk;
--- 1463,1472 ----
       per-function in order to allow IPA passes to introduce new functions.  */
    vec<ipa_opt_pass> GTY((skip)) ipa_transforms_to_apply;
  
!   /* For inline clones this points to the function they will be
!      inlined into.  */
!   cgraph_node *inlined_to;
! 
    struct cgraph_rtl_info *rtl;
    cgraph_clone_info clone;
    cgraph_thunk_info thunk;
*************** public:
*** 1432,1437 ****
--- 1478,1485 ----
    int count_materialization_scale;
    /* ID assigned by the profiling.  */
    unsigned int profile_id;
+   /* ID of the translation unit.  */
+   int unit_id;
    /* Time profiler: first run of function.  */
    int tp_first_run;
  
*************** public:
*** 1468,1479 ****
--- 1516,1544 ----
    unsigned nonfreeing_fn : 1;
    /* True if there was multiple COMDAT bodies merged by lto-symtab.  */
    unsigned merged_comdat : 1;
+   /* True if this def was merged with extern inlines.  */
+   unsigned merged_extern_inline : 1;
    /* True if function was created to be executed in parallel.  */
    unsigned parallelized_function : 1;
    /* True if function is part split out by ipa-split.  */
    unsigned split_part : 1;
    /* True if the function appears as possible target of indirect call.  */
    unsigned indirect_call_target : 1;
+   /* Set when function is visible in current compilation unit only and
+      its address is never taken.  */
+   unsigned local : 1;
+   /* False when there is something makes versioning impossible.  */
+   unsigned versionable : 1;
+   /* False when function calling convention and signature cannot be changed.
+      This is the case when __builtin_apply_args is used.  */
+   unsigned can_change_signature : 1;
+   /* True when the function has been originally extern inline, but it is
+      redefined now.  */
+   unsigned redefined_extern_inline : 1;
+   /* True if the function may enter serial irrevocable mode.  */
+   unsigned tm_may_enter_irr : 1;
+   /* True if this was a clone created by ipa-cp.  */
+   unsigned ipcp_clone : 1;
  
  private:
    /* Unique id of the node.  */
*************** struct cgraph_node_set_def
*** 1499,1505 ****
  typedef cgraph_node_set_def *cgraph_node_set;
  typedef struct varpool_node_set_def *varpool_node_set;
  
! class varpool_node;
  
  /* A varpool node set is a collection of varpool nodes.  A varpool node
     can appear in multiple sets.  */
--- 1564,1570 ----
  typedef cgraph_node_set_def *cgraph_node_set;
  typedef struct varpool_node_set_def *varpool_node_set;
  
! struct varpool_node;
  
  /* A varpool node set is a collection of varpool nodes.  A varpool node
     can appear in multiple sets.  */
*************** public:
*** 1555,1561 ****
    ipa_polymorphic_call_context (cgraph_edge *e);
    /* Build polymorphic call context for IP invariant CST.
       If specified, OTR_TYPE specify the type of polymorphic call
!      that takes CST+OFFSET as a prameter.  */
    ipa_polymorphic_call_context (tree cst, tree otr_type = NULL,
  				HOST_WIDE_INT offset = 0);
    /* Build context for pointer REF contained in FNDECL at statement STMT.
--- 1620,1626 ----
    ipa_polymorphic_call_context (cgraph_edge *e);
    /* Build polymorphic call context for IP invariant CST.
       If specified, OTR_TYPE specify the type of polymorphic call
!      that takes CST+OFFSET as a parameter.  */
    ipa_polymorphic_call_context (tree cst, tree otr_type = NULL,
  				HOST_WIDE_INT offset = 0);
    /* Build context for pointer REF contained in FNDECL at statement STMT.
*************** public:
*** 1571,1577 ****
    /* Make context non-speculative.  */
    void clear_speculation ();
  
!   /* Produce context specifying all derrived types of OTR_TYPE.  If OTR_TYPE is
       NULL, the context is set to dummy "I know nothing" setting.  */
    void clear_outer_type (tree otr_type = NULL);
  
--- 1636,1642 ----
    /* Make context non-speculative.  */
    void clear_speculation ();
  
!   /* Produce context specifying all derived types of OTR_TYPE.  If OTR_TYPE is
       NULL, the context is set to dummy "I know nothing" setting.  */
    void clear_outer_type (tree otr_type = NULL);
  
*************** public:
*** 1594,1601 ****
    /* Use when we cannot track dynamic type change.  This speculatively assume
       type change is not happening.  */
    void possible_dynamic_type_change (bool, tree otr_type = NULL);
!   /* Assume that both THIS and a given context is valid and strenghten THIS
!      if possible.  Return true if any strenghtening was made.
       If actual type the context is being used in is known, OTR_TYPE should be
       set accordingly. This improves quality of combined result.  */
    bool combine_with (ipa_polymorphic_call_context, tree otr_type = NULL);
--- 1659,1666 ----
    /* Use when we cannot track dynamic type change.  This speculatively assume
       type change is not happening.  */
    void possible_dynamic_type_change (bool, tree otr_type = NULL);
!   /* Assume that both THIS and a given context is valid and strengthen THIS
!      if possible.  Return true if any strengthening was made.
       If actual type the context is being used in is known, OTR_TYPE should be
       set accordingly. This improves quality of combined result.  */
    bool combine_with (ipa_polymorphic_call_context, tree otr_type = NULL);
*************** public:
*** 1613,1619 ****
  
    /* LTO streaming.  */
    void stream_out (struct output_block *) const;
!   void stream_in (struct lto_input_block *, struct data_in *data_in);
  
  private:
    bool combine_speculation_with (tree, HOST_WIDE_INT, bool, tree);
--- 1678,1684 ----
  
    /* LTO streaming.  */
    void stream_out (struct output_block *) const;
!   void stream_in (class lto_input_block *, class data_in *data_in);
  
  private:
    bool combine_speculation_with (tree, HOST_WIDE_INT, bool, tree);
*************** private:
*** 1626,1633 ****
  
  /* Structure containing additional information about an indirect call.  */
  
! struct GTY(()) cgraph_indirect_call_info
  {
    /* When agg_content is set, an offset where the call pointer is located
       within the aggregate.  */
    HOST_WIDE_INT offset;
--- 1691,1699 ----
  
  /* Structure containing additional information about an indirect call.  */
  
! class GTY(()) cgraph_indirect_call_info
  {
+ public:
    /* When agg_content is set, an offset where the call pointer is located
       within the aggregate.  */
    HOST_WIDE_INT offset;
*************** struct GTY(()) cgraph_indirect_call_info
*** 1641,1650 ****
    int param_index;
    /* ECF flags determined from the caller.  */
    int ecf_flags;
!   /* Profile_id of common target obtrained from profile.  */
!   int common_target_id;
!   /* Probability that call will land in function with COMMON_TARGET_ID.  */
!   int common_target_probability;
  
    /* Set when the call is a virtual call with the parameter being the
       associated object pointer rather than a simple direct call.  */
--- 1707,1715 ----
    int param_index;
    /* ECF flags determined from the caller.  */
    int ecf_flags;
! 
!   /* Number of speculative call targets, it's less than GCOV_TOPN_VALUES.  */
!   unsigned num_speculative_call_targets : 16;
  
    /* Set when the call is a virtual call with the parameter being the
       associated object pointer rather than a simple direct call.  */
*************** struct GTY(()) cgraph_indirect_call_info
*** 1667,1684 ****
    unsigned vptr_changed : 1;
  };
  
! struct GTY((chain_next ("%h.next_caller"), chain_prev ("%h.prev_caller"),
! 	    for_user)) cgraph_edge {
!   friend class cgraph_node;
    friend class symbol_table;
  
!   /* Remove the edge in the cgraph.  */
!   void remove (void);
  
!   /* Change field call_stmt of edge to NEW_STMT.
!      If UPDATE_SPECULATIVE and E is any component of speculative
!      edge, then update all components.  */
!   void set_call_stmt (gcall *new_stmt, bool update_speculative = true);
  
    /* Redirect callee of the edge to N.  The function does not update underlying
       call expression.  */
--- 1732,1753 ----
    unsigned vptr_changed : 1;
  };
  
! class GTY((chain_next ("%h.next_caller"), chain_prev ("%h.prev_caller"),
! 	   for_user)) cgraph_edge
! {
! public:
!   friend struct cgraph_node;
    friend class symbol_table;
  
!   /* Remove EDGE from the cgraph.  */
!   static void remove (cgraph_edge *edge);
  
!   /* Change field call_stmt of edge E to NEW_STMT.  If UPDATE_SPECULATIVE and E
!      is any component of speculative edge, then update all components.
!      Speculations can be resolved in the process and EDGE can be removed and
!      deallocated.  Return the edge that now represents the call.  */
!   static cgraph_edge *set_call_stmt (cgraph_edge *e, gcall *new_stmt,
! 				     bool update_speculative = true);
  
    /* Redirect callee of the edge to N.  The function does not update underlying
       call expression.  */
*************** struct GTY((chain_next ("%h.next_caller"
*** 1691,1718 ****
    void redirect_callee_duplicating_thunks (cgraph_node *n);
  
    /* Make an indirect edge with an unknown callee an ordinary edge leading to
!      CALLEE.  DELTA is an integer constant that is to be added to the this
!      pointer (first parameter) to compensate for skipping
!      a thunk adjustment.  */
!   cgraph_edge *make_direct (cgraph_node *callee);
  
    /* Turn edge into speculative call calling N2. Update
       the profile so the direct call is taken COUNT times
!      with FREQUENCY.  */
!   cgraph_edge *make_speculative (cgraph_node *n2, profile_count direct_count);
  
!    /* Given speculative call edge, return all three components.  */
!   void speculative_call_info (cgraph_edge *&direct, cgraph_edge *&indirect,
! 			      ipa_ref *&reference);
  
!   /* Speculative call edge turned out to be direct call to CALLE_DECL.
!      Remove the speculative call sequence and return edge representing the call.
!      It is up to caller to redirect the call as appropriate. */
!   cgraph_edge *resolve_speculation (tree callee_decl = NULL);
  
    /* If necessary, change the function declaration in the call statement
!      associated with the edge so that it corresponds to the edge callee.  */
!   gimple *redirect_call_stmt_to_callee (void);
  
    /* Create clone of edge in the node N represented
       by CALL_EXPR the callgraph.  */
--- 1760,1889 ----
    void redirect_callee_duplicating_thunks (cgraph_node *n);
  
    /* Make an indirect edge with an unknown callee an ordinary edge leading to
!      CALLEE.  Speculations can be resolved in the process and EDGE can be
!      removed and deallocated.  Return the edge that now represents the
!      call.  */
!   static cgraph_edge *make_direct (cgraph_edge *edge, cgraph_node *callee);
  
    /* Turn edge into speculative call calling N2. Update
       the profile so the direct call is taken COUNT times
!      with FREQUENCY.  speculative_id is used to link direct calls with their
!      corresponding IPA_REF_ADDR references when representing speculative calls.
!    */
!   cgraph_edge *make_speculative (cgraph_node *n2, profile_count direct_count,
! 				 unsigned int speculative_id = 0);
  
!   /* Speculative call consists of an indirect edge and one or more
!      direct edge+ref pairs.  Speculative will expand to the following sequence:
  
!      if (call_dest == target1)		// reference to target1
! 	target1 ();			// direct call to target1
!      else if (call_dest == target2)	// reference to targt2
! 	target2 ();			// direct call to target2
!      else
! 	call_dest ();			// indirect call
! 
!      Before the expansion we will have indirect call and the direct call+ref
!      pairs all linked to single statement.
! 
!      Note that ref may point to different symbol than the corresponding call
!      becuase the speculated edge may have been optimized (redirected to
!      a clone) or inlined.
! 
!      Given an edge which is part of speculative call, return the first
!      direct call edge in the speculative call sequence.
! 
!      In the example above called on any cgraph edge in the sequence it will
!      return direct call to target1.  */
!   cgraph_edge *first_speculative_call_target ();
! 
!   /* Return next speculative call target or NULL if there is none.
!      All targets are required to form an interval in the callee list.
! 
!      In example above, if called on call to target1 it will return call to
!      target2.  */
!   cgraph_edge *next_speculative_call_target ()
!   {
!     cgraph_edge *e = this;
!     gcc_checking_assert (speculative && callee);
! 
!     if (e->next_callee && e->next_callee->speculative
! 	&& e->next_callee->call_stmt == e->call_stmt
! 	&& e->next_callee->lto_stmt_uid == e->lto_stmt_uid)
!       return e->next_callee;
!     return NULL;
!   }
! 
!   /* When called on any edge in the speculative call return the (unique)
!      indirect call edge in the speculative call sequence.  */
!   cgraph_edge *speculative_call_indirect_edge ()
!   {
!     gcc_checking_assert (speculative);
!     if (!callee)
!       return this;
!     for (cgraph_edge *e2 = caller->indirect_calls;
! 	 true; e2 = e2->next_callee)
!       if (e2->speculative
! 	  && call_stmt == e2->call_stmt
! 	  && lto_stmt_uid == e2->lto_stmt_uid)
! 	return e2;
!   }
! 
!   /* When called on any edge in speculative call and when given any target
!      of ref which is speculated to it returns the corresponding direct call.
! 
!      In example above if called on function target2 it will return call to
!      target2.  */
!   cgraph_edge *speculative_call_for_target (cgraph_node *);
! 
!   /* Return REF corresponding to direct call in the specualtive call
!      sequence.  */
!   ipa_ref *speculative_call_target_ref ()
!   {
!     ipa_ref *ref;
! 
!     gcc_checking_assert (speculative);
!     for (unsigned int i = 0; caller->iterate_reference (i, ref); i++)
!       if (ref->speculative && ref->speculative_id == speculative_id
! 	  && ref->stmt == (gimple *)call_stmt
! 	  && ref->lto_stmt_uid == lto_stmt_uid)
! 	return ref;
!     gcc_unreachable ();
!   }
! 
!   /* Speculative call edge turned out to be direct call to CALLEE_DECL.  Remove
!      the speculative call sequence and return edge representing the call, the
!      original EDGE can be removed and deallocated.  It is up to caller to
!      redirect the call as appropriate.  Return the edge that now represents the
!      call.
! 
!      For "speculative" indirect call that contains multiple "speculative"
!      targets (i.e. edge->indirect_info->num_speculative_call_targets > 1),
!      decrease the count and only remove current direct edge.
! 
!      If no speculative direct call left to the speculative indirect call, remove
!      the speculative of both the indirect call and corresponding direct edge.
! 
!      It is up to caller to iteratively resolve each "speculative" direct call
!      and redirect the call as appropriate.  */
!   static cgraph_edge *resolve_speculation (cgraph_edge *edge,
! 					   tree callee_decl = NULL);
  
    /* If necessary, change the function declaration in the call statement
!      associated with edge E so that it corresponds to the edge callee.
!      Speculations can be resolved in the process and EDGE can be removed and
!      deallocated.
! 
!      The edge could be one of speculative direct call generated from speculative
!      indirect call.  In this circumstance, decrease the speculative targets
!      count (i.e. num_speculative_call_targets) and redirect call stmt to the
!      corresponding i-th target.  If no speculative direct call left to the
!      speculative indirect call, remove "speculative" of the indirect call and
!      also redirect stmt to it's final direct target.
! 
!      It is up to caller to iteratively transform each "speculative"
!      direct call as appropriate.  */
!   static gimple *redirect_call_stmt_to_callee (cgraph_edge *e);
  
    /* Create clone of edge in the node N represented
       by CALL_EXPR the callgraph.  */
*************** struct GTY((chain_next ("%h.next_caller"
*** 1731,1737 ****
    /* Return true when the edge represents a direct recursion.  */
    bool recursive_p (void);
  
!   /* Return true if the call can be hot.  */
    bool maybe_hot_p (void);
  
    /* Get unique identifier of the edge.  */
--- 1902,1908 ----
    /* Return true when the edge represents a direct recursion.  */
    bool recursive_p (void);
  
!   /* Return true if the edge may be considered hot.  */
    bool maybe_hot_p (void);
  
    /* Get unique identifier of the edge.  */
*************** struct GTY((chain_next ("%h.next_caller"
*** 1758,1763 ****
--- 1929,1937 ----
       be internal to the current translation unit.  */
    bool possibly_call_in_translation_unit_p (void);
  
+   /* Return num_speculative_targets of this edge.  */
+   int num_speculative_call_targets_p (void);
+ 
    /* Expected number of executions: calculated in profile.c.  */
    profile_count count;
    cgraph_node *caller;
*************** struct GTY((chain_next ("%h.next_caller"
*** 1777,1782 ****
--- 1951,1959 ----
    /* The stmt_uid of call_stmt.  This is used by LTO to recover the call_stmt
       when the function is serialized in.  */
    unsigned int lto_stmt_uid;
+   /* speculative id is used to link direct calls with their corresponding
+      IPA_REF_ADDR references when representing speculative calls.  */
+   unsigned int speculative_id : 16;
    /* Whether this edge was made direct by indirect inlining.  */
    unsigned int indirect_inlining_edge : 1;
    /* Whether this edge describes an indirect call with an undetermined
*************** struct GTY((chain_next ("%h.next_caller"
*** 1800,1809 ****
       to a same call statement:
       1) a direct call (to expected_fn)
       2) an indirect call (to call_target)
!      3) a IPA_REF_ADDR refrence to expected_fn.
  
       Optimizers may later redirect direct call to clone, so 1) and 3)
!      do not need to necesarily agree with destination.  */
    unsigned int speculative : 1;
    /* Set to true when caller is a constructor or destructor of polymorphic
       type.  */
--- 1977,1986 ----
       to a same call statement:
       1) a direct call (to expected_fn)
       2) an indirect call (to call_target)
!      3) a IPA_REF_ADDR reference to expected_fn.
  
       Optimizers may later redirect direct call to clone, so 1) and 3)
!      do not need to necessarily agree with destination.  */
    unsigned int speculative : 1;
    /* Set to true when caller is a constructor or destructor of polymorphic
       type.  */
*************** private:
*** 1850,1857 ****
  /* The varpool data structure.
     Each static variable decl has assigned varpool_node.  */
  
! class GTY((tag ("SYMTAB_VARIABLE"))) varpool_node : public symtab_node {
! public:
    /* Dump given varpool node to F.  */
    void dump (FILE *f);
  
--- 2027,2040 ----
  /* The varpool data structure.
     Each static variable decl has assigned varpool_node.  */
  
! struct GTY((tag ("SYMTAB_VARIABLE"))) varpool_node : public symtab_node
! {
!   /* Constructor.  */
!   explicit varpool_node ()
!     : symtab_node (SYMTAB_VARIABLE), output (0), dynamically_initialized (0),
!       tls_model (TLS_MODEL_NONE), used_by_single_function (0)
!   {}
! 
    /* Dump given varpool node to F.  */
    void dump (FILE *f);
  
*************** public:
*** 1896,1902 ****
       sections can be resolved.  */
    void finalize_named_section_flags (void);
  
!   /* Call calback on varpool symbol and aliases associated to varpool symbol.
       When INCLUDE_OVERWRITABLE is false, overwritable aliases and thunks are
       skipped. */
    bool call_for_symbol_and_aliases (bool (*callback) (varpool_node *, void *),
--- 2079,2085 ----
       sections can be resolved.  */
    void finalize_named_section_flags (void);
  
!   /* Call callback on varpool symbol and aliases associated to varpool symbol.
       When INCLUDE_OVERWRITABLE is false, overwritable aliases and thunks are
       skipped. */
    bool call_for_symbol_and_aliases (bool (*callback) (varpool_node *, void *),
*************** public:
*** 1964,1970 ****
    ENUM_BITFIELD(tls_model) tls_model : 3;
  
    /* Set if the variable is known to be used by single function only.
!      This is computed by ipa_signle_use pass and used by late optimizations
       in places where optimization would be valid for local static variable
       if we did not do any inter-procedural code movement.  */
    unsigned used_by_single_function : 1;
--- 2147,2153 ----
    ENUM_BITFIELD(tls_model) tls_model : 3;
  
    /* Set if the variable is known to be used by single function only.
!      This is computed by ipa_single_use pass and used by late optimizations
       in places where optimization would be valid for local static variable
       if we did not do any inter-procedural code movement.  */
    unsigned used_by_single_function : 1;
*************** is_a_helper <cgraph_node *>::test (symta
*** 2002,2008 ****
    return p && p->type == SYMTAB_FUNCTION;
  }
  
! /* Report whether or not THIS symtab node is a vriable, aka varpool_node.  */
  
  template <>
  template <>
--- 2185,2191 ----
    return p && p->type == SYMTAB_FUNCTION;
  }
  
! /* Report whether or not THIS symtab node is a variable, aka varpool_node.  */
  
  template <>
  template <>
*************** is_a_helper <varpool_node *>::test (symt
*** 2012,2023 ****
    return p && p->type == SYMTAB_VARIABLE;
  }
  
- /* Macros to access the next item in the list of free cgraph nodes and
-    edges. */
- #define NEXT_FREE_NODE(NODE) dyn_cast<cgraph_node *> ((NODE)->next)
- #define SET_NEXT_FREE_NODE(NODE,NODE2) ((NODE))->next = NODE2
- #define NEXT_FREE_EDGE(EDGE) (EDGE)->prev_caller
- 
  typedef void (*cgraph_edge_hook)(cgraph_edge *, void *);
  typedef void (*cgraph_node_hook)(cgraph_node *, void *);
  typedef void (*varpool_node_hook)(varpool_node *, void *);
--- 2195,2200 ----
*************** struct asmname_hasher : ggc_ptr_hash <sy
*** 2068,2079 ****
  class GTY((tag ("SYMTAB"))) symbol_table
  {
  public:
!   friend class symtab_node;
!   friend class cgraph_node;
!   friend class cgraph_edge;
  
!   symbol_table (): cgraph_max_uid (1), cgraph_max_summary_id (0),
!   edges_max_uid (1), edges_max_summary_id (0)
    {
    }
  
--- 2245,2267 ----
  class GTY((tag ("SYMTAB"))) symbol_table
  {
  public:
!   friend struct symtab_node;
!   friend struct cgraph_node;
!   friend struct cgraph_edge;
  
!   symbol_table (): 
!   cgraph_count (0), cgraph_max_uid (1), cgraph_max_summary_id (0),
!   edges_count (0), edges_max_uid (1), edges_max_summary_id (0),
!   cgraph_released_summary_ids (), edge_released_summary_ids (),
!   nodes (NULL), asmnodes (NULL), asm_last_node (NULL),
!   order (0), max_unit (0), global_info_ready (false), state (PARSING),
!   function_flags_ready (false), cpp_implicit_aliases_done (false),
!   section_hash (NULL), assembler_name_hash (NULL), init_priority_hash (NULL),
!   dump_file (NULL), ipa_clones_dump_file (NULL), cloned_nodes (),
!   m_first_edge_removal_hook (NULL), m_first_cgraph_removal_hook (NULL),
!   m_first_edge_duplicated_hook (NULL), m_first_cgraph_duplicated_hook (NULL),
!   m_first_cgraph_insertion_hook (NULL), m_first_varpool_insertion_hook (NULL),
!   m_first_varpool_removal_hook (NULL)
    {
    }
  
*************** public:
*** 2088,2096 ****
  
    /* C++ frontend produce same body aliases all over the place, even before PCH
       gets streamed out. It relies on us linking the aliases with their function
!      in order to do the fixups, but ipa-ref is not PCH safe.  Consequentely we
!      first produce aliases without links, but once C++ FE is sure he won't sream
!      PCH we build the links via this function.  */
    void process_same_body_aliases (void);
  
    /* Perform simple optimizations based on callgraph.  */
--- 2276,2284 ----
  
    /* C++ frontend produce same body aliases all over the place, even before PCH
       gets streamed out. It relies on us linking the aliases with their function
!      in order to do the fixups, but ipa-ref is not PCH safe.  Consequently we
!      first produce aliases without links, but once C++ FE is sure it won't
!      stream PCH we build the links via this function.  */
    void process_same_body_aliases (void);
  
    /* Perform simple optimizations based on callgraph.  */
*************** public:
*** 2264,2270 ****
    /* Arrange node to be first in its entry of assembler_name_hash.  */
    void symtab_prevail_in_asm_name_hash (symtab_node *node);
  
!   /* Initalize asm name hash unless.  */
    void symtab_initialize_asm_name_hash (void);
  
    /* Set the DECL_ASSEMBLER_NAME and update symtab hashtables.  */
--- 2452,2458 ----
    /* Arrange node to be first in its entry of assembler_name_hash.  */
    void symtab_prevail_in_asm_name_hash (symtab_node *node);
  
!   /* Initialize asm name hash unless.  */
    void symtab_initialize_asm_name_hash (void);
  
    /* Set the DECL_ASSEMBLER_NAME and update symtab hashtables.  */
*************** public:
*** 2273,2292 ****
    /* Dump symbol table to F.  */
    void dump (FILE *f);
  
    /* Dump symbol table to stderr.  */
    void DEBUG_FUNCTION debug (void);
  
    /* Assign a new summary ID for the callgraph NODE.  */
    inline int assign_summary_id (cgraph_node *node)
    {
!     node->m_summary_id = cgraph_max_summary_id++;
      return node->m_summary_id;
    }
  
    /* Assign a new summary ID for the callgraph EDGE.  */
    inline int assign_summary_id (cgraph_edge *edge)
    {
!     edge->m_summary_id = edges_max_summary_id++;
      return edge->m_summary_id;
    }
  
--- 2461,2491 ----
    /* Dump symbol table to F.  */
    void dump (FILE *f);
  
+   /* Dump symbol table to F in graphviz format.  */
+   void dump_graphviz (FILE *f);
+ 
    /* Dump symbol table to stderr.  */
    void DEBUG_FUNCTION debug (void);
  
    /* Assign a new summary ID for the callgraph NODE.  */
    inline int assign_summary_id (cgraph_node *node)
    {
!     if (!cgraph_released_summary_ids.is_empty ())
!       node->m_summary_id = cgraph_released_summary_ids.pop ();
!     else
!       node->m_summary_id = cgraph_max_summary_id++;
! 
      return node->m_summary_id;
    }
  
    /* Assign a new summary ID for the callgraph EDGE.  */
    inline int assign_summary_id (cgraph_edge *edge)
    {
!     if (!edge_released_summary_ids.is_empty ())
!       edge->m_summary_id = edge_released_summary_ids.pop ();
!     else
!       edge->m_summary_id = edges_max_summary_id++;
! 
      return edge->m_summary_id;
    }
  
*************** public:
*** 2302,2321 ****
    int edges_max_uid;
    int edges_max_summary_id;
  
    symtab_node* GTY(()) nodes;
    asm_node* GTY(()) asmnodes;
    asm_node* GTY(()) asm_last_node;
-   cgraph_node* GTY(()) free_nodes;
- 
-   /* Head of a linked list of unused (freed) call graph edges.
-      Do not GTY((delete)) this list so UIDs gets reliably recycled.  */
-   cgraph_edge * GTY(()) free_edges;
  
    /* The order index of the next symtab node to be created.  This is
       used so that we can sort the cgraph nodes in order by when we saw
       them, to support -fno-toplevel-reorder.  */
    int order;
  
    /* Set when whole unit has been analyzed so we can access global info.  */
    bool global_info_ready;
    /* What state callgraph is in right now.  */
--- 2501,2527 ----
    int edges_max_uid;
    int edges_max_summary_id;
  
+   /* Vector of released summary IDS for cgraph nodes.  */
+   vec<int> GTY ((skip)) cgraph_released_summary_ids;
+ 
+   /* Vector of released summary IDS for cgraph nodes.  */
+   vec<int> GTY ((skip)) edge_released_summary_ids;
+ 
+   /* Return symbol used to separate symbol name from suffix.  */
+   static char symbol_suffix_separator ();
+ 
    symtab_node* GTY(()) nodes;
    asm_node* GTY(()) asmnodes;
    asm_node* GTY(()) asm_last_node;
  
    /* The order index of the next symtab node to be created.  This is
       used so that we can sort the cgraph nodes in order by when we saw
       them, to support -fno-toplevel-reorder.  */
    int order;
  
+   /* Maximal unit ID used.  */
+   int max_unit;
+ 
    /* Set when whole unit has been analyzed so we can access global info.  */
    bool global_info_ready;
    /* What state callgraph is in right now.  */
*************** public:
*** 2325,2331 ****
  
    bool cpp_implicit_aliases_done;
  
!   /* Hash table used to hold sectoons.  */
    hash_table<section_name_hasher> *GTY(()) section_hash;
  
    /* Hash table used to convert assembler names into nodes.  */
--- 2531,2537 ----
  
    bool cpp_implicit_aliases_done;
  
!   /* Hash table used to hold sections.  */
    hash_table<section_name_hasher> *GTY(()) section_hash;
  
    /* Hash table used to convert assembler names into nodes.  */
*************** public:
*** 2336,2358 ****
  
    FILE* GTY ((skip)) dump_file;
  
-   /* Return symbol used to separate symbol name from suffix.  */
-   static char symbol_suffix_separator ();
- 
    FILE* GTY ((skip)) ipa_clones_dump_file;
  
    hash_set <const cgraph_node *> GTY ((skip)) cloned_nodes;
  
  private:
-   /* Allocate new callgraph node.  */
-   inline cgraph_node * allocate_cgraph_symbol (void);
- 
    /* Allocate a cgraph_edge structure and fill it with data according to the
!      parameters of which only CALLEE can be NULL (when creating an indirect call
!      edge).  */
    cgraph_edge *create_edge (cgraph_node *caller, cgraph_node *callee,
  			    gcall *call_stmt, profile_count count,
! 			    bool indir_unknown_callee);
  
    /* Put the edge onto the free list.  */
    void free_edge (cgraph_edge *e);
--- 2542,2559 ----
  
    FILE* GTY ((skip)) dump_file;
  
    FILE* GTY ((skip)) ipa_clones_dump_file;
  
    hash_set <const cgraph_node *> GTY ((skip)) cloned_nodes;
  
  private:
    /* Allocate a cgraph_edge structure and fill it with data according to the
!      parameters of which only CALLEE can be NULL (when creating an indirect
!      call edge).  CLONING_P should be set if properties that are copied from an
!      original edge should not be calculated.  */
    cgraph_edge *create_edge (cgraph_node *caller, cgraph_node *callee,
  			    gcall *call_stmt, profile_count count,
! 			    bool indir_unknown_callee, bool cloning_p);
  
    /* Put the edge onto the free list.  */
    void free_edge (cgraph_edge *e);
*************** private:
*** 2373,2379 ****
  
    /* List of hooks triggered when an edge is removed.  */
    cgraph_edge_hook_list * GTY((skip)) m_first_edge_removal_hook;
!   /* List of hooks triggem_red when a cgraph node is removed.  */
    cgraph_node_hook_list * GTY((skip)) m_first_cgraph_removal_hook;
    /* List of hooks triggered when an edge is duplicated.  */
    cgraph_2edge_hook_list * GTY((skip)) m_first_edge_duplicated_hook;
--- 2574,2580 ----
  
    /* List of hooks triggered when an edge is removed.  */
    cgraph_edge_hook_list * GTY((skip)) m_first_edge_removal_hook;
!   /* List of hooks trigger_red when a cgraph node is removed.  */
    cgraph_node_hook_list * GTY((skip)) m_first_cgraph_removal_hook;
    /* List of hooks triggered when an edge is duplicated.  */
    cgraph_2edge_hook_list * GTY((skip)) m_first_edge_duplicated_hook;
*************** bool cgraph_function_possibly_inlined_p
*** 2415,2424 ****
  const char* cgraph_inline_failed_string (cgraph_inline_failed_t);
  cgraph_inline_failed_type_t cgraph_inline_failed_type (cgraph_inline_failed_t);
  
- extern bool gimple_check_call_matching_types (gimple *, tree, bool);
- 
  /* In cgraphunit.c  */
  void cgraphunit_c_finalize (void);
  
  /*  Initialize datastructures so DECL is a function in lowered gimple form.
      IN_SSA is true if the gimple is in SSA.  */
--- 2616,2624 ----
  const char* cgraph_inline_failed_string (cgraph_inline_failed_t);
  cgraph_inline_failed_type_t cgraph_inline_failed_type (cgraph_inline_failed_t);
  
  /* In cgraphunit.c  */
  void cgraphunit_c_finalize (void);
+ int tp_first_run_node_cmp (const void *pa, const void *pb);
  
  /*  Initialize datastructures so DECL is a function in lowered gimple form.
      IN_SSA is true if the gimple is in SSA.  */
*************** tree clone_function_name (tree decl, con
*** 2437,2450 ****
  tree clone_function_name (tree decl, const char *suffix);
  
  void tree_function_versioning (tree, tree, vec<ipa_replace_map *, va_gc> *,
! 			       bool, bitmap, bool, bitmap, basic_block);
  
  void dump_callgraph_transformation (const cgraph_node *original,
  				    const cgraph_node *clone,
  				    const char *suffix);
- tree cgraph_build_function_type_skip_args (tree orig_type, bitmap args_to_skip,
- 					   bool skip_return);
- 
  /* In cgraphbuild.c  */
  int compute_call_stmt_bb_frequency (tree, basic_block bb);
  void record_references_in_initializer (tree, bool);
--- 2637,2648 ----
  tree clone_function_name (tree decl, const char *suffix);
  
  void tree_function_versioning (tree, tree, vec<ipa_replace_map *, va_gc> *,
! 			       ipa_param_adjustments *,
! 			       bool, bitmap, basic_block);
  
  void dump_callgraph_transformation (const cgraph_node *original,
  				    const cgraph_node *clone,
  				    const char *suffix);
  /* In cgraphbuild.c  */
  int compute_call_stmt_bb_frequency (tree, basic_block bb);
  void record_references_in_initializer (tree, bool);
*************** symtab_node::real_symbol_p (void)
*** 2474,2486 ****
    if (!is_a <cgraph_node *> (this))
      return true;
    cnode = dyn_cast <cgraph_node *> (this);
!   if (cnode->global.inlined_to)
      return false;
    return true;
  }
  
  /* Return true if DECL should have entry in symbol table if used.
!    Those are functions and static & external veriables*/
  
  static inline bool
  decl_in_symtab_p (const_tree decl)
--- 2672,2684 ----
    if (!is_a <cgraph_node *> (this))
      return true;
    cnode = dyn_cast <cgraph_node *> (this);
!   if (cnode->inlined_to)
      return false;
    return true;
  }
  
  /* Return true if DECL should have entry in symbol table if used.
!    Those are functions and static & external variables.  */
  
  static inline bool
  decl_in_symtab_p (const_tree decl)
*************** symtab_node::in_same_comdat_group_p (sym
*** 2497,2509 ****
  
    if (cgraph_node *cn = dyn_cast <cgraph_node *> (target))
      {
!       if (cn->global.inlined_to)
! 	source = cn->global.inlined_to;
      }
    if (cgraph_node *cn = dyn_cast <cgraph_node *> (target))
      {
!       if (cn->global.inlined_to)
! 	target = cn->global.inlined_to;
      }
  
    return source->get_comdat_group () == target->get_comdat_group ();
--- 2695,2707 ----
  
    if (cgraph_node *cn = dyn_cast <cgraph_node *> (target))
      {
!       if (cn->inlined_to)
! 	source = cn->inlined_to;
      }
    if (cgraph_node *cn = dyn_cast <cgraph_node *> (target))
      {
!       if (cn->inlined_to)
! 	target = cn->inlined_to;
      }
  
    return source->get_comdat_group () == target->get_comdat_group ();
*************** inline void
*** 2669,2708 ****
  symbol_table::release_symbol (cgraph_node *node)
  {
    cgraph_count--;
! 
!   /* Clear out the node to NULL all pointers and add the node to the free
!      list.  */
!   int summary_id = node->m_summary_id;
!   memset (node, 0, sizeof (*node));
!   node->type = SYMTAB_FUNCTION;
!   node->m_summary_id = summary_id;
!   SET_NEXT_FREE_NODE (node, free_nodes);
!   free_nodes = node;
! }
! 
! /* Allocate new callgraph node.  */
! 
! inline cgraph_node *
! symbol_table::allocate_cgraph_symbol (void)
! {
!   cgraph_node *node;
! 
!   if (free_nodes)
!     {
!       node = free_nodes;
!       free_nodes = NEXT_FREE_NODE (node);
!     }
!   else
!     {
!       node = ggc_cleared_alloc<cgraph_node> ();
!       node->m_summary_id = -1;
!     }
! 
!   node->m_uid = cgraph_max_uid++;
!   return node;
  }
  
- 
  /* Return first static symbol with definition.  */
  inline symtab_node *
  symbol_table::first_symbol (void)
--- 2867,2877 ----
  symbol_table::release_symbol (cgraph_node *node)
  {
    cgraph_count--;
!   if (node->m_summary_id != -1)
!     cgraph_released_summary_ids.safe_push (node->m_summary_id);
!   ggc_free (node);
  }
  
  /* Return first static symbol with definition.  */
  inline symtab_node *
  symbol_table::first_symbol (void)
*************** struct GTY((for_user)) constant_descript
*** 2964,2970 ****
  inline bool
  cgraph_node::only_called_directly_or_aliased_p (void)
  {
!   gcc_assert (!global.inlined_to);
    return (!force_output && !address_taken
  	  && !ifunc_resolver
  	  && !used_from_other_partition
--- 3133,3139 ----
  inline bool
  cgraph_node::only_called_directly_or_aliased_p (void)
  {
!   gcc_assert (!inlined_to);
    return (!force_output && !address_taken
  	  && !ifunc_resolver
  	  && !used_from_other_partition
*************** cgraph_node::only_called_directly_or_ali
*** 2981,2987 ****
  inline bool
  cgraph_node::can_remove_if_no_direct_calls_and_refs_p (void)
  {
!   gcc_checking_assert (!global.inlined_to);
    /* Extern inlines can always go, we will use the external definition.  */
    if (DECL_EXTERNAL (decl))
      return true;
--- 3150,3156 ----
  inline bool
  cgraph_node::can_remove_if_no_direct_calls_and_refs_p (void)
  {
!   gcc_checking_assert (!inlined_to);
    /* Extern inlines can always go, we will use the external definition.  */
    if (DECL_EXTERNAL (decl))
      return true;
*************** cgraph_node::can_remove_if_no_direct_cal
*** 2993,2999 ****
      return false;
    /* Only COMDAT functions can be removed if externally visible.  */
    if (externally_visible
!       && (!DECL_COMDAT (decl)
  	  || forced_by_abi
  	  || used_from_object_file_p ()))
      return false;
--- 3162,3168 ----
      return false;
    /* Only COMDAT functions can be removed if externally visible.  */
    if (externally_visible
!       && ((!DECL_COMDAT (decl) || ifunc_resolver)
  	  || forced_by_abi
  	  || used_from_object_file_p ()))
      return false;
*************** cgraph_edge::set_callee (cgraph_node *n)
*** 3133,3159 ****
    callee = n;
  }
  
- /* Redirect callee of the edge to N.  The function does not update underlying
-    call expression.  */
- 
- inline void
- cgraph_edge::redirect_callee (cgraph_node *n)
- {
-   /* Remove from callers list of the current callee.  */
-   remove_callee ();
- 
-   /* Insert to callers list of the new callee.  */
-   set_callee (n);
- }
- 
  /* Return true when the edge represents a direct recursion.  */
  
  inline bool
  cgraph_edge::recursive_p (void)
  {
    cgraph_node *c = callee->ultimate_alias_target ();
!   if (caller->global.inlined_to)
!     return caller->global.inlined_to->decl == c->decl;
    else
      return caller->decl == c->decl;
  }
--- 3302,3315 ----
    callee = n;
  }
  
  /* Return true when the edge represents a direct recursion.  */
  
  inline bool
  cgraph_edge::recursive_p (void)
  {
    cgraph_node *c = callee->ultimate_alias_target ();
!   if (caller->inlined_to)
!     return caller->inlined_to->decl == c->decl;
    else
      return caller->decl == c->decl;
  }
*************** cgraph_edge::binds_to_current_def_p ()
*** 3190,3197 ****
  inline int
  cgraph_edge::frequency ()
  {
!   return count.to_cgraph_frequency (caller->global.inlined_to
! 				    ? caller->global.inlined_to->count
  				    : caller->count);
  }
  
--- 3346,3353 ----
  inline int
  cgraph_edge::frequency ()
  {
!   return count.to_cgraph_frequency (caller->inlined_to
! 				    ? caller->inlined_to->count
  				    : caller->count);
  }
  
*************** inline void
*** 3213,3219 ****
  cgraph_node::mark_force_output (void)
  {
    force_output = 1;
!   gcc_checking_assert (!global.inlined_to);
  }
  
  /* Return true if function should be optimized for size.  */
--- 3369,3375 ----
  cgraph_node::mark_force_output (void)
  {
    force_output = 1;
!   gcc_checking_assert (!inlined_to);
  }
  
  /* Return true if function should be optimized for size.  */
*************** symtab_node::get_availability (symtab_no
*** 3252,3258 ****
      return dyn_cast <varpool_node *> (this)->get_availability (ref);
  }
  
! /* Call calback on symtab node and aliases associated to this node.
     When INCLUDE_OVERWRITABLE is false, overwritable symbols are skipped. */
  
  inline bool
--- 3408,3414 ----
      return dyn_cast <varpool_node *> (this)->get_availability (ref);
  }
  
! /* Call callback on symtab node and aliases associated to this node.
     When INCLUDE_OVERWRITABLE is false, overwritable symbols are skipped. */
  
  inline bool
*************** cgraph_node::call_for_symbol_and_aliases
*** 3293,3299 ****
    return false;
  }
  
! /* Call calback on varpool symbol and aliases associated to varpool symbol.
     When INCLUDE_OVERWRITABLE is false, overwritable symbols are
     skipped. */
  
--- 3449,3455 ----
    return false;
  }
  
! /* Call callback on varpool symbol and aliases associated to varpool symbol.
     When INCLUDE_OVERWRITABLE is false, overwritable symbols are
     skipped. */
  
*************** varpool_node::call_for_symbol_and_aliase
*** 3314,3320 ****
    return false;
  }
  
! /* Return true if refernece may be used in address compare.  */
  
  inline bool
  ipa_ref::address_matters_p ()
--- 3470,3476 ----
    return false;
  }
  
! /* Return true if reference may be used in address compare.  */
  
  inline bool
  ipa_ref::address_matters_p ()
*************** ipa_polymorphic_call_context::clear_spec
*** 3357,3363 ****
    speculative_maybe_derived_type = false;
  }
  
! /* Produce context specifying all derrived types of OTR_TYPE.  If OTR_TYPE is
     NULL, the context is set to dummy "I know nothing" setting.  */
  
  inline void
--- 3513,3519 ----
    speculative_maybe_derived_type = false;
  }
  
! /* Produce context specifying all derived types of OTR_TYPE.  If OTR_TYPE is
     NULL, the context is set to dummy "I know nothing" setting.  */
  
  inline void
diff -Nrcpad gcc-9.3.0/gcc/cgraphbuild.c gcc-10.1.0/gcc/cgraphbuild.c
*** gcc-9.3.0/gcc/cgraphbuild.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cgraphbuild.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Callgraph construction.
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
     Contributed by Jan Hubicka
  
  This file is part of GCC.
--- 1,5 ----
  /* Callgraph construction.
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
     Contributed by Jan Hubicka
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 36,42 ****
  struct record_reference_ctx
  {
    bool only_vars;
!   class varpool_node *varpool_node;
  };
  
  /* Walk tree and record all calls and references to functions/variables.
--- 36,42 ----
  struct record_reference_ctx
  {
    bool only_vars;
!   struct varpool_node *varpool_node;
  };
  
  /* Walk tree and record all calls and references to functions/variables.
*************** cgraph_edge::rebuild_edges (void)
*** 428,434 ****
  	node->record_stmt_references (gsi_stmt (gsi));
      }
    record_eh_tables (node, cfun);
!   gcc_assert (!node->global.inlined_to);
    return 0;
  }
  
--- 428,434 ----
  	node->record_stmt_references (gsi_stmt (gsi));
      }
    record_eh_tables (node, cfun);
!   gcc_assert (!node->inlined_to);
    return 0;
  }
  
diff -Nrcpad gcc-9.3.0/gcc/cgraphclones.c gcc-10.1.0/gcc/cgraphclones.c
*** gcc-9.3.0/gcc/cgraphclones.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cgraphclones.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Callgraph clones
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
     Contributed by Jan Hubicka
  
  This file is part of GCC.
--- 1,5 ----
  /* Callgraph clones
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
     Contributed by Jan Hubicka
  
  This file is part of GCC.
*************** You should have received a copy of the G
*** 18,24 ****
  along with GCC; see the file COPYING3.  If not see
  <http://www.gnu.org/licenses/>.  */
  
! /* This module provide facilities for clonning functions. I.e. creating
     new functions based on existing functions with simple modifications,
     such as replacement of parameters.
  
--- 18,24 ----
  along with GCC; see the file COPYING3.  If not see
  <http://www.gnu.org/licenses/>.  */
  
! /* This module provide facilities for cloning functions.  I.e. creating
     new functions based on existing functions with simple modifications,
     such as replacement of parameters.
  
*************** along with GCC; see the file COPYING3.
*** 80,85 ****
--- 80,90 ----
  #include "tree-inline.h"
  #include "dumpfile.h"
  #include "gimple-pretty-print.h"
+ #include "alloc-pool.h"
+ #include "symbol-summary.h"
+ #include "tree-vrp.h"
+ #include "ipa-prop.h"
+ #include "ipa-fnsummary.h"
  
  /* Create clone of edge in the node N represented by CALL_EXPR
     the callgraph.  */
*************** cgraph_edge::clone (cgraph_node *n, gcal
*** 104,122 ****
  	{
  	  cgraph_node *callee = cgraph_node::get (decl);
  	  gcc_checking_assert (callee);
! 	  new_edge = n->create_edge (callee, call_stmt, prof_count);
  	}
        else
  	{
  	  new_edge = n->create_indirect_edge (call_stmt,
  					      indirect_info->ecf_flags,
! 					      prof_count, false);
  	  *new_edge->indirect_info = *indirect_info;
  	}
      }
    else
      {
!       new_edge = n->create_edge (callee, call_stmt, prof_count);
        if (indirect_info)
  	{
  	  new_edge->indirect_info
--- 109,127 ----
  	{
  	  cgraph_node *callee = cgraph_node::get (decl);
  	  gcc_checking_assert (callee);
! 	  new_edge = n->create_edge (callee, call_stmt, prof_count, true);
  	}
        else
  	{
  	  new_edge = n->create_indirect_edge (call_stmt,
  					      indirect_info->ecf_flags,
! 					      prof_count, true);
  	  *new_edge->indirect_info = *indirect_info;
  	}
      }
    else
      {
!       new_edge = n->create_edge (callee, call_stmt, prof_count, true);
        if (indirect_info)
  	{
  	  new_edge->indirect_info
*************** cgraph_edge::clone (cgraph_node *n, gcal
*** 127,133 ****
  
    new_edge->inline_failed = inline_failed;
    new_edge->indirect_inlining_edge = indirect_inlining_edge;
!   new_edge->lto_stmt_uid = stmt_uid;
    /* Clone flags that depend on call_stmt availability manually.  */
    new_edge->can_throw_external = can_throw_external;
    new_edge->call_stmt_cannot_inline_p = call_stmt_cannot_inline_p;
--- 132,140 ----
  
    new_edge->inline_failed = inline_failed;
    new_edge->indirect_inlining_edge = indirect_inlining_edge;
!   if (!call_stmt)
!     new_edge->lto_stmt_uid = stmt_uid;
!   new_edge->speculative_id = speculative_id;
    /* Clone flags that depend on call_stmt availability manually.  */
    new_edge->can_throw_external = can_throw_external;
    new_edge->call_stmt_cannot_inline_p = call_stmt_cannot_inline_p;
*************** cgraph_edge::clone (cgraph_node *n, gcal
*** 136,240 ****
  
    /* Update IPA profile.  Local profiles need no updating in original.  */
    if (update_original)
!     count = count.combine_with_ipa_count (count.ipa () 
! 					  - new_edge->count.ipa ());
    symtab->call_edge_duplication_hooks (this, new_edge);
    return new_edge;
  }
  
- /* Build variant of function type ORIG_TYPE skipping ARGS_TO_SKIP and the
-    return value if SKIP_RETURN is true.  */
- 
- tree
- cgraph_build_function_type_skip_args (tree orig_type, bitmap args_to_skip,
- 				      bool skip_return)
- {
-   tree new_type = NULL;
-   tree args, new_args = NULL;
-   tree new_reversed;
-   int i = 0;
- 
-   for (args = TYPE_ARG_TYPES (orig_type); args && args != void_list_node;
-        args = TREE_CHAIN (args), i++)
-     if (!args_to_skip || !bitmap_bit_p (args_to_skip, i))
-       new_args = tree_cons (NULL_TREE, TREE_VALUE (args), new_args);
- 
-   new_reversed = nreverse (new_args);
-   if (args)
-     {
-       if (new_reversed)
-         TREE_CHAIN (new_args) = void_list_node;
-       else
- 	new_reversed = void_list_node;
-     }
- 
-   /* Use copy_node to preserve as much as possible from original type
-      (debug info, attribute lists etc.)
-      Exception is METHOD_TYPEs must have THIS argument.
-      When we are asked to remove it, we need to build new FUNCTION_TYPE
-      instead.  */
-   if (TREE_CODE (orig_type) != METHOD_TYPE
-       || !args_to_skip
-       || !bitmap_bit_p (args_to_skip, 0))
-     {
-       new_type = build_distinct_type_copy (orig_type);
-       TYPE_ARG_TYPES (new_type) = new_reversed;
-     }
-   else
-     {
-       new_type
-         = build_distinct_type_copy (build_function_type (TREE_TYPE (orig_type),
- 							 new_reversed));
-       TYPE_CONTEXT (new_type) = TYPE_CONTEXT (orig_type);
-     }
- 
-   if (skip_return)
-     TREE_TYPE (new_type) = void_type_node;
- 
-   return new_type;
- }
- 
- /* Build variant of function decl ORIG_DECL skipping ARGS_TO_SKIP and the
-    return value if SKIP_RETURN is true.
- 
-    Arguments from DECL_ARGUMENTS list can't be removed now, since they are
-    linked by TREE_CHAIN directly.  The caller is responsible for eliminating
-    them when they are being duplicated (i.e. copy_arguments_for_versioning).  */
- 
- static tree
- build_function_decl_skip_args (tree orig_decl, bitmap args_to_skip,
- 			       bool skip_return)
- {
-   tree new_decl = copy_node (orig_decl);
-   tree new_type;
- 
-   new_type = TREE_TYPE (orig_decl);
-   if (prototype_p (new_type)
-       || (skip_return && !VOID_TYPE_P (TREE_TYPE (new_type))))
-     new_type
-       = cgraph_build_function_type_skip_args (new_type, args_to_skip,
- 					      skip_return);
-   TREE_TYPE (new_decl) = new_type;
- 
-   /* For declarations setting DECL_VINDEX (i.e. methods)
-      we expect first argument to be THIS pointer.   */
-   if (args_to_skip && bitmap_bit_p (args_to_skip, 0))
-     DECL_VINDEX (new_decl) = NULL_TREE;
- 
-   /* When signature changes, we need to clear builtin info.  */
-   if (fndecl_built_in_p (new_decl)
-       && args_to_skip
-       && !bitmap_empty_p (args_to_skip))
-     {
-       DECL_BUILT_IN_CLASS (new_decl) = NOT_BUILT_IN;
-       DECL_FUNCTION_CODE (new_decl) = (enum built_in_function) 0;
-     }
-   /* The FE might have information and assumptions about the other
-      arguments.  */
-   DECL_LANG_SPECIFIC (new_decl) = NULL;
-   return new_decl;
- }
- 
  /* Set flags of NEW_NODE and its decl.  NEW_NODE is a newly created private
     clone or its thunk.  */
  
--- 143,155 ----
  
    /* Update IPA profile.  Local profiles need no updating in original.  */
    if (update_original)
!     count = count.combine_with_ipa_count_within (count.ipa () 
! 						 - new_edge->count.ipa (),
! 						 caller->count);
    symtab->call_edge_duplication_hooks (this, new_edge);
    return new_edge;
  }
  
  /* Set flags of NEW_NODE and its decl.  NEW_NODE is a newly created private
     clone or its thunk.  */
  
*************** set_new_clone_decl_and_node_flags (cgrap
*** 248,256 ****
    DECL_VIRTUAL_P (new_node->decl) = 0;
    DECL_STATIC_CONSTRUCTOR (new_node->decl) = 0;
    DECL_STATIC_DESTRUCTOR (new_node->decl) = 0;
  
    new_node->externally_visible = 0;
!   new_node->local.local = 1;
    new_node->lowered = true;
  }
  
--- 163,174 ----
    DECL_VIRTUAL_P (new_node->decl) = 0;
    DECL_STATIC_CONSTRUCTOR (new_node->decl) = 0;
    DECL_STATIC_DESTRUCTOR (new_node->decl) = 0;
+   DECL_SET_IS_OPERATOR_NEW (new_node->decl, 0);
+   DECL_SET_IS_OPERATOR_DELETE (new_node->decl, 0);
+   DECL_IS_REPLACEABLE_OPERATOR (new_node->decl) = 0;
  
    new_node->externally_visible = 0;
!   new_node->local = 1;
    new_node->lowered = true;
  }
  
*************** duplicate_thunk_for_node (cgraph_node *t
*** 282,316 ****
        return cs->caller;
  
    tree new_decl;
!   if (!node->clone.args_to_skip)
!     new_decl = copy_node (thunk->decl);
!   else
      {
        /* We do not need to duplicate this_adjusting thunks if we have removed
  	 this.  */
        if (thunk->thunk.this_adjusting
! 	  && bitmap_bit_p (node->clone.args_to_skip, 0))
  	return node;
  
!       new_decl = build_function_decl_skip_args (thunk->decl,
! 						node->clone.args_to_skip,
! 						false);
!     }
! 
!   tree *link = &DECL_ARGUMENTS (new_decl);
!   int i = 0;
!   for (tree pd = DECL_ARGUMENTS (thunk->decl); pd; pd = DECL_CHAIN (pd), i++)
!     {
!       if (!node->clone.args_to_skip
! 	  || !bitmap_bit_p (node->clone.args_to_skip, i))
! 	{
! 	  tree nd = copy_node (pd);
! 	  DECL_CONTEXT (nd) = new_decl;
! 	  *link = nd;
! 	  link = &DECL_CHAIN (nd);
! 	}
      }
!   *link = NULL_TREE;
  
    gcc_checking_assert (!DECL_STRUCT_FUNCTION (new_decl));
    gcc_checking_assert (!DECL_INITIAL (new_decl));
--- 200,220 ----
        return cs->caller;
  
    tree new_decl;
!   if (node->clone.param_adjustments)
      {
        /* We do not need to duplicate this_adjusting thunks if we have removed
  	 this.  */
        if (thunk->thunk.this_adjusting
! 	  && !node->clone.param_adjustments->first_param_intact_p ())
  	return node;
  
!       new_decl = copy_node (thunk->decl);
!       ipa_param_body_adjustments body_adj (node->clone.param_adjustments,
! 					   new_decl);
!       body_adj.modify_formal_parameters ();
      }
!   else
!     new_decl = copy_node (thunk->decl);
  
    gcc_checking_assert (!DECL_STRUCT_FUNCTION (new_decl));
    gcc_checking_assert (!DECL_INITIAL (new_decl));
*************** duplicate_thunk_for_node (cgraph_node *t
*** 328,339 ****
    new_thunk = cgraph_node::create (new_decl);
    set_new_clone_decl_and_node_flags (new_thunk);
    new_thunk->definition = true;
!   new_thunk->local.can_change_signature = node->local.can_change_signature;
    new_thunk->thunk = thunk->thunk;
    new_thunk->unique_name = in_lto_p;
    new_thunk->former_clone_of = thunk->decl;
!   new_thunk->clone.args_to_skip = node->clone.args_to_skip;
!   new_thunk->clone.combined_args_to_skip = node->clone.combined_args_to_skip;
  
    cgraph_edge *e = new_thunk->create_edge (node, NULL, new_thunk->count);
    symtab->call_edge_duplication_hooks (thunk->callees, e);
--- 232,245 ----
    new_thunk = cgraph_node::create (new_decl);
    set_new_clone_decl_and_node_flags (new_thunk);
    new_thunk->definition = true;
!   new_thunk->can_change_signature = node->can_change_signature;
    new_thunk->thunk = thunk->thunk;
    new_thunk->unique_name = in_lto_p;
    new_thunk->former_clone_of = thunk->decl;
!   new_thunk->clone.param_adjustments = node->clone.param_adjustments;
!   new_thunk->unit_id = thunk->unit_id;
!   new_thunk->merged_comdat = thunk->merged_comdat;
!   new_thunk->merged_extern_inline = thunk->merged_extern_inline;
  
    cgraph_edge *e = new_thunk->create_edge (node, NULL, new_thunk->count);
    symtab->call_edge_duplication_hooks (thunk->callees, e);
*************** cgraph_node::expand_all_artificial_thunk
*** 373,378 ****
--- 279,286 ----
  	  {
  	    thunk->thunk.thunk_p = false;
  	    thunk->analyze ();
+ 	    ipa_analyze_node (thunk);
+ 	    inline_analyze_function (thunk);
  	  }
  	thunk->expand_all_artificial_thunks ();
        }
*************** dump_callgraph_transformation (const cgr
*** 402,407 ****
--- 310,331 ----
      }
  }
  
+ /* Turn profile of N to local profile.   */
+ 
+ static void
+ localize_profile (cgraph_node *n)
+ {
+   n->count = n->count.guessed_local ();
+   for (cgraph_edge *e = n->callees; e; e=e->next_callee)
+     {
+       e->count = e->count.guessed_local ();
+       if (!e->inline_failed)
+ 	localize_profile (e->callee);
+     }
+   for (cgraph_edge *e = n->indirect_calls; e; e=e->next_callee)
+     e->count = e->count.guessed_local ();
+ }
+ 
  /* Create node representing clone of N executed COUNT times.  Decrease
     the execution counts from original node too.
     The new clone will have decl set to DECL that may or may not be the same
*************** dump_callgraph_transformation (const cgr
*** 410,422 ****
     When UPDATE_ORIGINAL is true, the counts are subtracted from the original
     function's profile to reflect the fact that part of execution is handled
     by node.  
!    When CALL_DUPLICATOIN_HOOK is true, the ipa passes are acknowledged about
     the new clone. Otherwise the caller is responsible for doing so later.
  
     If the new node is being inlined into another one, NEW_INLINED_TO should be
     the outline function the new one is (even indirectly) inlined to.  All hooks
!    will see this in node's global.inlined_to, when invoked.  Can be NULL if the
!    node is not inlined.  */
  
  cgraph_node *
  cgraph_node::create_clone (tree new_decl, profile_count prof_count,
--- 334,350 ----
     When UPDATE_ORIGINAL is true, the counts are subtracted from the original
     function's profile to reflect the fact that part of execution is handled
     by node.  
!    When CALL_DUPLICATION_HOOK is true, the ipa passes are acknowledged about
     the new clone. Otherwise the caller is responsible for doing so later.
  
     If the new node is being inlined into another one, NEW_INLINED_TO should be
     the outline function the new one is (even indirectly) inlined to.  All hooks
!    will see this in node's inlined_to, when invoked.  Can be NULL if the
!    node is not inlined.
! 
!    If PARAM_ADJUSTMENTS is non-NULL, the parameter manipulation information
!    will be overwritten by the new structure.  Otherwise the new node will
!    share parameter manipulation information with the original node.  */
  
  cgraph_node *
  cgraph_node::create_clone (tree new_decl, profile_count prof_count,
*************** cgraph_node::create_clone (tree new_decl
*** 424,435 ****
  			   vec<cgraph_edge *> redirect_callers,
  			   bool call_duplication_hook,
  			   cgraph_node *new_inlined_to,
! 			   bitmap args_to_skip, const char *suffix)
  {
    cgraph_node *new_node = symtab->create_empty ();
    cgraph_edge *e;
    unsigned i;
    profile_count old_count = count;
  
    if (new_inlined_to)
      dump_callgraph_transformation (this, new_inlined_to, "inlining to");
--- 352,365 ----
  			   vec<cgraph_edge *> redirect_callers,
  			   bool call_duplication_hook,
  			   cgraph_node *new_inlined_to,
! 			   ipa_param_adjustments *param_adjustments,
! 			   const char *suffix)
  {
    cgraph_node *new_node = symtab->create_empty ();
    cgraph_edge *e;
    unsigned i;
    profile_count old_count = count;
+   bool nonzero = count.ipa ().nonzero_p ();
  
    if (new_inlined_to)
      dump_callgraph_transformation (this, new_inlined_to, "inlining to");
*************** cgraph_node::create_clone (tree new_decl
*** 442,448 ****
  
    /* Update IPA profile.  Local profiles need no updating in original.  */
    if (update_original)
!     count = count.combine_with_ipa_count (count.ipa () - prof_count.ipa ());
    new_node->decl = new_decl;
    new_node->register_symbol ();
    new_node->origin = origin;
--- 372,385 ----
  
    /* Update IPA profile.  Local profiles need no updating in original.  */
    if (update_original)
!     {
!       if (inlined_to)
!         count = count.combine_with_ipa_count_within (count.ipa ()
! 						     - prof_count.ipa (),
! 						     inlined_to->count);
!       else
!         count = count.combine_with_ipa_count (count.ipa () - prof_count.ipa ());
!     }
    new_node->decl = new_decl;
    new_node->register_symbol ();
    new_node->origin = origin;
*************** cgraph_node::create_clone (tree new_decl
*** 454,492 ****
      }
    new_node->analyzed = analyzed;
    new_node->definition = definition;
!   new_node->local = local;
    new_node->externally_visible = false;
    new_node->no_reorder = no_reorder;
!   new_node->local.local = true;
!   new_node->global = global;
!   new_node->global.inlined_to = new_inlined_to;
    new_node->rtl = rtl;
    new_node->frequency = frequency;
    new_node->tp_first_run = tp_first_run;
    new_node->tm_clone = tm_clone;
    new_node->icf_merged = icf_merged;
-   new_node->merged_comdat = merged_comdat;
    new_node->thunk = thunk;
  
    new_node->clone.tree_map = NULL;
!   new_node->clone.args_to_skip = args_to_skip;
    new_node->split_part = split_part;
-   if (!args_to_skip)
-     new_node->clone.combined_args_to_skip = clone.combined_args_to_skip;
-   else if (clone.combined_args_to_skip)
-     {
-       new_node->clone.combined_args_to_skip = BITMAP_GGC_ALLOC ();
-       bitmap_ior (new_node->clone.combined_args_to_skip,
- 		  clone.combined_args_to_skip, args_to_skip);
-     }
-   else
-     new_node->clone.combined_args_to_skip = args_to_skip;
  
    FOR_EACH_VEC_ELT (redirect_callers, i, e)
      {
        /* Redirect calls to the old version node to point to its new
  	 version.  The only exception is when the edge was proved to
! 	 be unreachable during the clonning procedure.  */
        if (!e->callee
  	  || !fndecl_built_in_p (e->callee->decl, BUILT_IN_UNREACHABLE))
          e->redirect_callee_duplicating_thunks (new_node);
--- 391,427 ----
      }
    new_node->analyzed = analyzed;
    new_node->definition = definition;
!   new_node->versionable = versionable;
!   new_node->can_change_signature = can_change_signature;
!   new_node->redefined_extern_inline = redefined_extern_inline;
!   new_node->tm_may_enter_irr = tm_may_enter_irr;
    new_node->externally_visible = false;
    new_node->no_reorder = no_reorder;
!   new_node->local = true;
!   new_node->inlined_to = new_inlined_to;
    new_node->rtl = rtl;
    new_node->frequency = frequency;
    new_node->tp_first_run = tp_first_run;
    new_node->tm_clone = tm_clone;
    new_node->icf_merged = icf_merged;
    new_node->thunk = thunk;
+   new_node->unit_id = unit_id;
+   new_node->merged_comdat = merged_comdat;
+   new_node->merged_extern_inline = merged_extern_inline;
  
+   if (param_adjustments)
+     new_node->clone.param_adjustments = param_adjustments;
+   else
+     new_node->clone.param_adjustments = clone.param_adjustments;
    new_node->clone.tree_map = NULL;
!   new_node->clone.performed_splits = vec_safe_copy (clone.performed_splits);
    new_node->split_part = split_part;
  
    FOR_EACH_VEC_ELT (redirect_callers, i, e)
      {
        /* Redirect calls to the old version node to point to its new
  	 version.  The only exception is when the edge was proved to
! 	 be unreachable during the cloning procedure.  */
        if (!e->callee
  	  || !fndecl_built_in_p (e->callee->decl, BUILT_IN_UNREACHABLE))
          e->redirect_callee_duplicating_thunks (new_node);
*************** cgraph_node::create_clone (tree new_decl
*** 510,515 ****
--- 445,460 ----
  
    if (call_duplication_hook)
      symtab->call_cgraph_duplication_hooks (this, new_node);
+   /* With partial train run we do not want to assume that original's
+      count is zero whenever we redurect all executed edges to clone.
+      Simply drop profile to local one in this case.  */
+   if (update_original
+       && opt_for_fn (decl, flag_profile_partial_training)
+       && nonzero
+       && count.ipa_p ()
+       && !count.ipa ().nonzero_p ()
+       && !inlined_to)
+     localize_profile (this);
  
    if (!new_inlined_to)
      dump_callgraph_transformation (this, new_node, suffix);
*************** clone_function_name (tree decl, const ch
*** 622,629 ****
  cgraph_node *
  cgraph_node::create_virtual_clone (vec<cgraph_edge *> redirect_callers,
  				   vec<ipa_replace_map *, va_gc> *tree_map,
! 				   bitmap args_to_skip, const char * suffix,
! 				   unsigned num_suffix)
  {
    tree old_decl = decl;
    cgraph_node *new_node = NULL;
--- 567,574 ----
  cgraph_node *
  cgraph_node::create_virtual_clone (vec<cgraph_edge *> redirect_callers,
  				   vec<ipa_replace_map *, va_gc> *tree_map,
! 				   ipa_param_adjustments *param_adjustments,
! 				   const char * suffix, unsigned num_suffix)
  {
    tree old_decl = decl;
    cgraph_node *new_node = NULL;
*************** cgraph_node::create_virtual_clone (vec<c
*** 632,645 ****
    ipa_replace_map *map;
    char *name;
  
!   gcc_checking_assert (local.versionable);
!   gcc_assert (local.can_change_signature || !args_to_skip);
  
    /* Make a new FUNCTION_DECL tree node */
!   if (!args_to_skip)
      new_decl = copy_node (old_decl);
    else
!     new_decl = build_function_decl_skip_args (old_decl, args_to_skip, false);
  
    /* These pointers represent function body and will be populated only when clone
       is materialized.  */
--- 577,593 ----
    ipa_replace_map *map;
    char *name;
  
!   gcc_checking_assert (versionable);
!   /* TODO: It would be nice if we could recognize that param_adjustments do not
!      actually perform any changes, but at the moment let's require it simply
!      does not exist.  */
!   gcc_assert (can_change_signature || !param_adjustments);
  
    /* Make a new FUNCTION_DECL tree node */
!   if (!param_adjustments)
      new_decl = copy_node (old_decl);
    else
!     new_decl = param_adjustments->adjust_decl (old_decl);
  
    /* These pointers represent function body and will be populated only when clone
       is materialized.  */
*************** cgraph_node::create_virtual_clone (vec<c
*** 663,669 ****
    SET_DECL_RTL (new_decl, NULL);
  
    new_node = create_clone (new_decl, count, false,
! 			   redirect_callers, false, NULL, args_to_skip, suffix);
  
    /* Update the properties.
       Make clone visible only within this translation unit.  Make sure
--- 611,618 ----
    SET_DECL_RTL (new_decl, NULL);
  
    new_node = create_clone (new_decl, count, false,
! 			   redirect_callers, false, NULL, param_adjustments,
! 			   suffix);
  
    /* Update the properties.
       Make clone visible only within this translation unit.  Make sure
*************** cgraph_node::create_virtual_clone (vec<c
*** 671,676 ****
--- 620,626 ----
       ??? We cannot use COMDAT linkage because there is no
       ABI support for this.  */
    set_new_clone_decl_and_node_flags (new_node);
+   new_node->ipcp_clone = ipcp_clone;
    new_node->clone.tree_map = tree_map;
    if (!implicit_section)
      new_node->set_section (get_section ());
*************** cgraph_node::find_replacement (void)
*** 773,778 ****
--- 723,733 ----
  	  n->clone_of = next_inline_clone;
  	  n = n->next_sibling_clone;
  	}
+ 
+       /* Update order in order to be able to find a LTO section
+ 	 with function body.  */
+       replacement->order = order;
+ 
        return replacement;
      }
    else
*************** cgraph_node::set_call_stmt_including_clo
*** 791,800 ****
  					     bool update_speculative)
  {
    cgraph_node *node;
!   cgraph_edge *edge = get_edge (old_stmt);
  
!   if (edge)
!     edge->set_call_stmt (new_stmt, update_speculative);
  
    node = clones;
    if (node)
--- 746,755 ----
  					     bool update_speculative)
  {
    cgraph_node *node;
!   cgraph_edge *master_edge = get_edge (old_stmt);
  
!   if (master_edge)
!     cgraph_edge::set_call_stmt (master_edge, new_stmt, update_speculative);
  
    node = clones;
    if (node)
*************** cgraph_node::set_call_stmt_including_clo
*** 803,822 ****
  	cgraph_edge *edge = node->get_edge (old_stmt);
  	if (edge)
  	  {
! 	    edge->set_call_stmt (new_stmt, update_speculative);
  	    /* If UPDATE_SPECULATIVE is false, it means that we are turning
  	       speculative call into a real code sequence.  Update the
  	       callgraph edges.  */
  	    if (edge->speculative && !update_speculative)
  	      {
! 		cgraph_edge *direct, *indirect;
! 		ipa_ref *ref;
  
! 		gcc_assert (!edge->indirect_unknown_callee);
! 		edge->speculative_call_info (direct, indirect, ref);
! 		direct->speculative = false;
  		indirect->speculative = false;
- 		ref->speculative = false;
  	      }
  	  }
  	if (node->clones)
--- 758,782 ----
  	cgraph_edge *edge = node->get_edge (old_stmt);
  	if (edge)
  	  {
! 	    edge = cgraph_edge::set_call_stmt (edge, new_stmt,
! 					       update_speculative);
  	    /* If UPDATE_SPECULATIVE is false, it means that we are turning
  	       speculative call into a real code sequence.  Update the
  	       callgraph edges.  */
  	    if (edge->speculative && !update_speculative)
  	      {
! 		cgraph_edge *indirect = edge->speculative_call_indirect_edge ();
  
! 		for (cgraph_edge *next, *direct
! 			= edge->first_speculative_call_target ();
! 		     direct;
! 		     direct = next)
! 		  {
! 		    next = direct->next_speculative_call_target ();
! 		    direct->speculative_call_target_ref ()->speculative = false;
! 		    direct->speculative = false;
! 		  }
  		indirect->speculative = false;
  	      }
  	  }
  	if (node->clones)
*************** cgraph_node::create_edge_including_clone
*** 847,857 ****
  					   cgraph_inline_failed_t reason)
  {
    cgraph_node *node;
-   cgraph_edge *edge;
  
    if (!get_edge (stmt))
      {
!       edge = create_edge (callee, stmt, count);
        edge->inline_failed = reason;
      }
  
--- 807,816 ----
  					   cgraph_inline_failed_t reason)
  {
    cgraph_node *node;
  
    if (!get_edge (stmt))
      {
!       cgraph_edge *edge = create_edge (callee, stmt, count);
        edge->inline_failed = reason;
      }
  
*************** cgraph_node::create_edge_including_clone
*** 868,874 ****
  	     call in the clone or we are processing clones of unreachable
  	     master where edges has been removed.  */
  	  if (edge)
! 	    edge->set_call_stmt (stmt);
  	  else if (! node->get_edge (stmt))
  	    {
  	      edge = node->create_edge (callee, stmt, count);
--- 827,833 ----
  	     call in the clone or we are processing clones of unreachable
  	     master where edges has been removed.  */
  	  if (edge)
! 	    edge = cgraph_edge::set_call_stmt (edge, stmt);
  	  else if (! node->get_edge (stmt))
  	    {
  	      edge = node->create_edge (callee, stmt, count);
*************** cgraph_node::remove_symbol_and_inline_cl
*** 902,908 ****
  
    if (this == forbidden_node)
      {
!       callers->remove ();
        return true;
      }
    for (e = callees; e; e = next)
--- 861,867 ----
  
    if (this == forbidden_node)
      {
!       cgraph_edge::remove (callers);
        return true;
      }
    for (e = callees; e; e = next)
*************** cgraph_node::create_version_clone (tree
*** 964,973 ****
     new_version->local = local;
     new_version->externally_visible = false;
     new_version->no_reorder = no_reorder;
!    new_version->local.local = new_version->definition;
!    new_version->global = global;
     new_version->rtl = rtl;
     new_version->count = count;
  
     for (e = callees; e; e=e->next_callee)
       if (!bbs_to_copy
--- 923,935 ----
     new_version->local = local;
     new_version->externally_visible = false;
     new_version->no_reorder = no_reorder;
!    new_version->local = new_version->definition;
!    new_version->inlined_to = inlined_to;
     new_version->rtl = rtl;
     new_version->count = count;
+    new_version->unit_id = unit_id;
+    new_version->merged_comdat = merged_comdat;
+    new_version->merged_extern_inline = merged_extern_inline;
  
     for (e = callees; e; e=e->next_callee)
       if (!bbs_to_copy
*************** cgraph_node::create_version_clone (tree
*** 988,995 ****
         e->redirect_callee (new_version);
       }
  
-    symtab->call_cgraph_duplication_hooks (this, new_version);
- 
     dump_callgraph_transformation (this, new_version, suffix);
  
     return new_version;
--- 950,955 ----
*************** cgraph_node::create_version_clone (tree
*** 1022,1030 ****
  cgraph_node *
  cgraph_node::create_version_clone_with_body
    (vec<cgraph_edge *> redirect_callers,
!    vec<ipa_replace_map *, va_gc> *tree_map, bitmap args_to_skip,
!    bool skip_return, bitmap bbs_to_copy, basic_block new_entry_block,
!    const char *suffix, tree target_attributes)
  {
    tree old_decl = decl;
    cgraph_node *new_version_node = NULL;
--- 982,991 ----
  cgraph_node *
  cgraph_node::create_version_clone_with_body
    (vec<cgraph_edge *> redirect_callers,
!    vec<ipa_replace_map *, va_gc> *tree_map,
!    ipa_param_adjustments *param_adjustments,
!    bitmap bbs_to_copy, basic_block new_entry_block, const char *suffix,
!    tree target_attributes)
  {
    tree old_decl = decl;
    cgraph_node *new_version_node = NULL;
*************** cgraph_node::create_version_clone_with_b
*** 1033,1046 ****
    if (!tree_versionable_function_p (old_decl))
      return NULL;
  
!   gcc_assert (local.can_change_signature || !args_to_skip);
  
    /* Make a new FUNCTION_DECL tree node for the new version. */
!   if (!args_to_skip && !skip_return)
!     new_decl = copy_node (old_decl);
    else
!     new_decl
!       = build_function_decl_skip_args (old_decl, args_to_skip, skip_return);
  
    /* Generate a new name for the new version. */
    DECL_NAME (new_decl) = clone_function_name_numbered (old_decl, suffix);
--- 994,1009 ----
    if (!tree_versionable_function_p (old_decl))
      return NULL;
  
!   /* TODO: Restore an assert that we do not change signature if
!      can_change_signature is false.  We cannot just check that
!      param_adjustments is NULL because unfortunately ipa-split removes return
!      values from such functions.  */
  
    /* Make a new FUNCTION_DECL tree node for the new version. */
!   if (param_adjustments)
!     new_decl = param_adjustments->adjust_decl (old_decl);
    else
!     new_decl = copy_node (old_decl);
  
    /* Generate a new name for the new version. */
    DECL_NAME (new_decl) = clone_function_name_numbered (old_decl, suffix);
*************** cgraph_node::create_version_clone_with_b
*** 1056,1062 ****
        location_t saved_loc = input_location;
        tree v = TREE_VALUE (target_attributes);
        input_location = DECL_SOURCE_LOCATION (new_decl);
!       bool r = targetm.target_option.valid_attribute_p (new_decl, NULL, v, 0);
        input_location = saved_loc;
        if (!r)
  	return NULL;
--- 1019,1025 ----
        location_t saved_loc = input_location;
        tree v = TREE_VALUE (target_attributes);
        input_location = DECL_SOURCE_LOCATION (new_decl);
!       bool r = targetm.target_option.valid_attribute_p (new_decl, NULL, v, 1);
        input_location = saved_loc;
        if (!r)
  	return NULL;
*************** cgraph_node::create_version_clone_with_b
*** 1065,1070 ****
--- 1028,1036 ----
    /* When the old decl was a con-/destructor make sure the clone isn't.  */
    DECL_STATIC_CONSTRUCTOR (new_decl) = 0;
    DECL_STATIC_DESTRUCTOR (new_decl) = 0;
+   DECL_SET_IS_OPERATOR_NEW (new_decl, 0);
+   DECL_SET_IS_OPERATOR_DELETE (new_decl, 0);
+   DECL_IS_REPLACEABLE_OPERATOR (new_decl) = 0;
  
    /* Create the new version's call-graph node.
       and update the edges of the new node. */
*************** cgraph_node::create_version_clone_with_b
*** 1075,1082 ****
      new_version_node->ipa_transforms_to_apply
        = ipa_transforms_to_apply.copy ();
    /* Copy the OLD_VERSION_NODE function tree to the new version.  */
!   tree_function_versioning (old_decl, new_decl, tree_map, false, args_to_skip,
! 			    skip_return, bbs_to_copy, new_entry_block);
  
    /* Update the new version's properties.
       Make The new version visible only within this translation unit.  Make sure
--- 1041,1048 ----
      new_version_node->ipa_transforms_to_apply
        = ipa_transforms_to_apply.copy ();
    /* Copy the OLD_VERSION_NODE function tree to the new version.  */
!   tree_function_versioning (old_decl, new_decl, tree_map, param_adjustments,
! 			    false, bbs_to_copy, new_entry_block);
  
    /* Update the new version's properties.
       Make The new version visible only within this translation unit.  Make sure
*************** cgraph_node::create_version_clone_with_b
*** 1086,1092 ****
    new_version_node->make_decl_local ();
    DECL_VIRTUAL_P (new_version_node->decl) = 0;
    new_version_node->externally_visible = 0;
!   new_version_node->local.local = 1;
    new_version_node->lowered = true;
    if (!implicit_section)
      new_version_node->set_section (get_section ());
--- 1052,1058 ----
    new_version_node->make_decl_local ();
    DECL_VIRTUAL_P (new_version_node->decl) = 0;
    new_version_node->externally_visible = 0;
!   new_version_node->local = 1;
    new_version_node->lowered = true;
    if (!implicit_section)
      new_version_node->set_section (get_section ());
*************** cgraph_node::create_version_clone_with_b
*** 1105,1110 ****
--- 1071,1092 ----
    return new_version_node;
  }
  
+ /* Remove the node from the tree of virtual and inline clones and make it a
+    standalone node - not a clone any more.  */
+ 
+ void cgraph_node::remove_from_clone_tree ()
+ {
+   if (next_sibling_clone)
+     next_sibling_clone->prev_sibling_clone = prev_sibling_clone;
+   if (prev_sibling_clone)
+     prev_sibling_clone->next_sibling_clone = next_sibling_clone;
+   else
+     clone_of->clones = next_sibling_clone;
+   next_sibling_clone = NULL;
+   prev_sibling_clone = NULL;
+   clone_of = NULL;
+ }
+ 
  /* Given virtual clone, turn it into actual clone.  */
  
  static void
*************** cgraph_materialize_clone (cgraph_node *n
*** 1116,1124 ****
      node->former_clone_of = node->clone_of->former_clone_of;
    /* Copy the OLD_VERSION_NODE function tree to the new version.  */
    tree_function_versioning (node->clone_of->decl, node->decl,
!   			    node->clone.tree_map, true,
! 			    node->clone.args_to_skip, false,
! 			    NULL, NULL);
    if (symtab->dump_file)
      {
        dump_function_to_file (node->clone_of->decl, symtab->dump_file,
--- 1098,1105 ----
      node->former_clone_of = node->clone_of->former_clone_of;
    /* Copy the OLD_VERSION_NODE function tree to the new version.  */
    tree_function_versioning (node->clone_of->decl, node->decl,
! 			    node->clone.tree_map, node->clone.param_adjustments,
! 			    true, NULL, NULL);
    if (symtab->dump_file)
      {
        dump_function_to_file (node->clone_of->decl, symtab->dump_file,
*************** cgraph_materialize_clone (cgraph_node *n
*** 1126,1147 ****
        dump_function_to_file (node->decl, symtab->dump_file, dump_flags);
      }
  
    /* Function is no longer clone.  */
!   if (node->next_sibling_clone)
!     node->next_sibling_clone->prev_sibling_clone = node->prev_sibling_clone;
!   if (node->prev_sibling_clone)
!     node->prev_sibling_clone->next_sibling_clone = node->next_sibling_clone;
!   else
!     node->clone_of->clones = node->next_sibling_clone;
!   node->next_sibling_clone = NULL;
!   node->prev_sibling_clone = NULL;
!   if (!node->clone_of->analyzed && !node->clone_of->clones)
      {
!       node->clone_of->release_body ();
!       node->clone_of->remove_callees ();
!       node->clone_of->remove_all_references ();
      }
-   node->clone_of = NULL;
    bitmap_obstack_release (NULL);
  }
  
--- 1107,1121 ----
        dump_function_to_file (node->decl, symtab->dump_file, dump_flags);
      }
  
+   cgraph_node *clone_of = node->clone_of;
    /* Function is no longer clone.  */
!   node->remove_from_clone_tree ();
!   if (!clone_of->analyzed && !clone_of->clones)
      {
!       clone_of->release_body ();
!       clone_of->remove_callees ();
!       clone_of->remove_all_references ();
      }
    bitmap_obstack_release (NULL);
  }
  
*************** symbol_table::materialize_all_clones (vo
*** 1181,1188 ****
  		  if (symtab->dump_file)
  		    {
  		      fprintf (symtab->dump_file, "cloning %s to %s\n",
! 			       xstrdup_for_dump (node->clone_of->name ()),
! 			       xstrdup_for_dump (node->name ()));
  		      if (node->clone.tree_map)
  		        {
  			  unsigned int i;
--- 1155,1162 ----
  		  if (symtab->dump_file)
  		    {
  		      fprintf (symtab->dump_file, "cloning %s to %s\n",
! 			       node->clone_of->dump_name (),
! 			       node->dump_name ());
  		      if (node->clone.tree_map)
  		        {
  			  unsigned int i;
*************** symbol_table::materialize_all_clones (vo
*** 1193,1220 ****
  			    {
  			      ipa_replace_map *replace_info;
  			      replace_info = (*node->clone.tree_map)[i];
! 			      print_generic_expr (symtab->dump_file,
! 						  replace_info->old_tree);
! 			      fprintf (symtab->dump_file, " -> ");
  			      print_generic_expr (symtab->dump_file,
  						  replace_info->new_tree);
- 			      fprintf (symtab->dump_file, "%s%s;",
- 			      	       replace_info->replace_p ? "(replace)":"",
- 				       replace_info->ref_p ? "(ref)":"");
  			    }
  			  fprintf (symtab->dump_file, "\n");
  			}
! 		      if (node->clone.args_to_skip)
! 			{
! 			  fprintf (symtab->dump_file, "   args_to_skip: ");
! 			  dump_bitmap (symtab->dump_file,
! 				       node->clone.args_to_skip);
! 			}
! 		      if (node->clone.args_to_skip)
! 			{
! 			  fprintf (symtab->dump_file, "   combined_args_to_skip:");
! 			  dump_bitmap (symtab->dump_file, node->clone.combined_args_to_skip);
! 			}
  		    }
  		  cgraph_materialize_clone (node);
  		  stabilized = false;
--- 1167,1181 ----
  			    {
  			      ipa_replace_map *replace_info;
  			      replace_info = (*node->clone.tree_map)[i];
! 			      fprintf (symtab->dump_file, "%i -> ",
! 				       (*node->clone.tree_map)[i]->parm_num);
  			      print_generic_expr (symtab->dump_file,
  						  replace_info->new_tree);
  			    }
  			  fprintf (symtab->dump_file, "\n");
  			}
! 		      if (node->clone.param_adjustments)
! 			node->clone.param_adjustments->dump (symtab->dump_file);
  		    }
  		  cgraph_materialize_clone (node);
  		  stabilized = false;
diff -Nrcpad gcc-9.3.0/gcc/cgraphunit.c gcc-10.1.0/gcc/cgraphunit.c
*** gcc-9.3.0/gcc/cgraphunit.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cgraphunit.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Driver of optimization process
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
     Contributed by Jan Hubicka
  
  This file is part of GCC.
--- 1,5 ----
  /* Driver of optimization process
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
     Contributed by Jan Hubicka
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 75,81 ****
  	   a) early optimizations. These are local passes executed in
  	      the topological order on the callgraph.
  
! 	      The purpose of early optimiations is to optimize away simple
  	      things that may otherwise confuse IP analysis. Very simple
  	      propagation across the callgraph is done i.e. to discover
  	      functions without side effects and simple inlining is performed.
--- 75,81 ----
  	   a) early optimizations. These are local passes executed in
  	      the topological order on the callgraph.
  
! 	      The purpose of early optimizations is to optimize away simple
  	      things that may otherwise confuse IP analysis. Very simple
  	      propagation across the callgraph is done i.e. to discover
  	      functions without side effects and simple inlining is performed.
*************** along with GCC; see the file COPYING3.
*** 83,89 ****
  	   b) early small interprocedural passes.
  
  	      Those are interprocedural passes executed only at compilation
! 	      time.  These include, for example, transational memory lowering,
  	      unreachable code removal and other simple transformations.
  
  	   c) IP analysis stage.  All interprocedural passes do their
--- 83,89 ----
  	   b) early small interprocedural passes.
  
  	      Those are interprocedural passes executed only at compilation
! 	      time.  These include, for example, transactional memory lowering,
  	      unreachable code removal and other simple transformations.
  
  	   c) IP analysis stage.  All interprocedural passes do their
*************** along with GCC; see the file COPYING3.
*** 107,113 ****
  	      IP propagation. This is done based on the earlier analysis
  	      without having function bodies at hand.
  	   f) Ltrans streaming.  When doing WHOPR LTO, the program
! 	      is partitioned and streamed into multple object files.
  
         Compile time and/or parallel linktime stage (ltrans)
  
--- 107,113 ----
  	      IP propagation. This is done based on the earlier analysis
  	      without having function bodies at hand.
  	   f) Ltrans streaming.  When doing WHOPR LTO, the program
! 	      is partitioned and streamed into multiple object files.
  
         Compile time and/or parallel linktime stage (ltrans)
  
*************** along with GCC; see the file COPYING3.
*** 118,124 ****
  	 2) Virtual clone materialization
  	    (cgraph_materialize_clone)
  
! 	    IP passes can produce copies of existing functoins (such
  	    as versioned clones or inline clones) without actually
  	    manipulating their bodies by creating virtual clones in
  	    the callgraph. At this time the virtual clones are
--- 118,124 ----
  	 2) Virtual clone materialization
  	    (cgraph_materialize_clone)
  
! 	    IP passes can produce copies of existing functions (such
  	    as versioned clones or inline clones) without actually
  	    manipulating their bodies by creating virtual clones in
  	    the callgraph. At this time the virtual clones are
*************** along with GCC; see the file COPYING3.
*** 205,210 ****
--- 205,211 ----
  #include "lto-section-names.h"
  #include "stringpool.h"
  #include "attribs.h"
+ #include "ipa-inline.h"
  
  /* Queue of cgraph nodes scheduled to be added into cgraph.  This is a
     secondary queue used during optimization to accommodate passes that
*************** symtab_node::needed_p (void)
*** 274,280 ****
  /* Head and terminator of the queue of nodes to be processed while building
     callgraph.  */
  
! static symtab_node symtab_terminator;
  static symtab_node *queued_nodes = &symtab_terminator;
  
  /* Add NODE to queue starting at QUEUED_NODES. 
--- 275,281 ----
  /* Head and terminator of the queue of nodes to be processed while building
     callgraph.  */
  
! static symtab_node symtab_terminator (SYMTAB_SYMBOL);
  static symtab_node *queued_nodes = &symtab_terminator;
  
  /* Add NODE to queue starting at QUEUED_NODES. 
*************** symbol_table::process_new_functions (voi
*** 336,346 ****
  	    {
  	      bool summaried_computed = ipa_fn_summaries != NULL;
  	      g->get_passes ()->execute_early_local_passes ();
! 	      /* Early passes compure inline parameters to do inlining
  		 and splitting.  This is redundant for functions added late.
  		 Just throw away whatever it did.  */
  	      if (!summaried_computed)
! 		ipa_free_fn_summary ();
  	    }
  	  else if (ipa_fn_summaries != NULL)
  	    compute_fn_summary (node, true);
--- 337,350 ----
  	    {
  	      bool summaried_computed = ipa_fn_summaries != NULL;
  	      g->get_passes ()->execute_early_local_passes ();
! 	      /* Early passes compute inline parameters to do inlining
  		 and splitting.  This is redundant for functions added late.
  		 Just throw away whatever it did.  */
  	      if (!summaried_computed)
! 		{
! 		  ipa_free_fn_summary ();
! 		  ipa_free_size_summary ();
! 		}
  	    }
  	  else if (ipa_fn_summaries != NULL)
  	    compute_fn_summary (node, true);
*************** cgraph_node::reset (void)
*** 388,395 ****
    gcc_assert (!process);
  
    /* Reset our data structures so we can analyze the function again.  */
!   memset (&local, 0, sizeof (local));
!   memset (&global, 0, sizeof (global));
    memset (&rtl, 0, sizeof (rtl));
    analyzed = false;
    definition = false;
--- 392,398 ----
    gcc_assert (!process);
  
    /* Reset our data structures so we can analyze the function again.  */
!   inlined_to = NULL;
    memset (&rtl, 0, sizeof (rtl));
    analyzed = false;
    definition = false;
*************** cgraph_node::finalize_function (tree dec
*** 442,448 ****
        gcc_assert (!DECL_CONTEXT (decl)
  		  || TREE_CODE (DECL_CONTEXT (decl)) !=	FUNCTION_DECL);
        node->reset ();
!       node->local.redefined_extern_inline = true;
      }
  
    /* Set definition first before calling notice_global_symbol so that
--- 445,451 ----
        gcc_assert (!DECL_CONTEXT (decl)
  		  || TREE_CODE (DECL_CONTEXT (decl)) !=	FUNCTION_DECL);
        node->reset ();
!       node->redefined_extern_inline = true;
      }
  
    /* Set definition first before calling notice_global_symbol so that
*************** cgraph_node::add_new_function (tree fnde
*** 550,556 ****
  	/* Bring the function into finalized state and enqueue for later
  	   analyzing and compilation.  */
  	node = cgraph_node::get_create (fndecl);
! 	node->local.local = false;
  	node->definition = true;
  	node->force_output = true;
  	if (TREE_PUBLIC (fndecl))
--- 553,559 ----
  	/* Bring the function into finalized state and enqueue for later
  	   analyzing and compilation.  */
  	node = cgraph_node::get_create (fndecl);
! 	node->local = false;
  	node->definition = true;
  	node->force_output = true;
  	if (TREE_PUBLIC (fndecl))
*************** cgraph_node::analyze (void)
*** 692,699 ****
  
  /* C++ frontend produce same body aliases all over the place, even before PCH
     gets streamed out. It relies on us linking the aliases with their function
!    in order to do the fixups, but ipa-ref is not PCH safe.  Consequentely we
!    first produce aliases without links, but once C++ FE is sure he won't sream
     PCH we build the links via this function.  */
  
  void
--- 695,702 ----
  
  /* C++ frontend produce same body aliases all over the place, even before PCH
     gets streamed out. It relies on us linking the aliases with their function
!    in order to do the fixups, but ipa-ref is not PCH safe.  Consequently we
!    first produce aliases without links, but once C++ FE is sure he won't stream
     PCH we build the links via this function.  */
  
  void
*************** symbol_table::process_same_body_aliases
*** 709,714 ****
--- 712,800 ----
    cpp_implicit_aliases_done = true;
  }
  
+ /* Process a symver attribute.  */
+ 
+ static void
+ process_symver_attribute (symtab_node *n)
+ {
+   tree value = lookup_attribute ("symver", DECL_ATTRIBUTES (n->decl));
+ 
+   if (!value)
+     return;
+   if (lookup_attribute ("symver", TREE_CHAIN (value)))
+     {
+       error_at (DECL_SOURCE_LOCATION (n->decl),
+ 		"multiple versions for one symbol");
+       return;
+     }
+   tree symver = get_identifier_with_length
+ 		  (TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (value))),
+ 		   TREE_STRING_LENGTH (TREE_VALUE (TREE_VALUE (value))));
+   symtab_node *def = symtab_node::get_for_asmname (symver);
+ 
+   if (def)
+     {
+       error_at (DECL_SOURCE_LOCATION (n->decl),
+ 		"duplicate definition of a symbol version");
+       inform (DECL_SOURCE_LOCATION (def->decl),
+ 	      "same version was previously defined here");
+       return;
+     }
+   if (!n->definition)
+     {
+       error_at (DECL_SOURCE_LOCATION (n->decl),
+ 		"symbol needs to be defined to have a version");
+       return;
+     }
+   if (DECL_COMMON (n->decl))
+     {
+       error_at (DECL_SOURCE_LOCATION (n->decl),
+ 		"common symbol cannot be versioned");
+       return;
+     }
+   if (DECL_COMDAT (n->decl))
+     {
+       error_at (DECL_SOURCE_LOCATION (n->decl),
+ 		"comdat symbol cannot be versioned");
+       return;
+     }
+   if (n->weakref)
+     {
+       error_at (DECL_SOURCE_LOCATION (n->decl),
+ 		"weakref cannot be versioned");
+       return;
+     }
+   if (!TREE_PUBLIC (n->decl))
+     {
+       error_at (DECL_SOURCE_LOCATION (n->decl),
+ 		"versioned symbol must be public");
+       return;
+     }
+   if (DECL_VISIBILITY (n->decl) != VISIBILITY_DEFAULT)
+     {
+       error_at (DECL_SOURCE_LOCATION (n->decl),
+ 		"versioned symbol must have default visibility");
+       return;
+     }
+ 
+   /* Create new symbol table entry representing the version.  */
+   tree new_decl = copy_node (n->decl);
+ 
+   DECL_INITIAL (new_decl) = NULL_TREE;
+   if (TREE_CODE (new_decl) == FUNCTION_DECL)
+     DECL_STRUCT_FUNCTION (new_decl) = NULL;
+   SET_DECL_ASSEMBLER_NAME (new_decl, symver);
+   TREE_PUBLIC (new_decl) = 1;
+   DECL_ATTRIBUTES (new_decl) = NULL;
+ 
+   symtab_node *symver_node = symtab_node::get_create (new_decl);
+   symver_node->alias = true;
+   symver_node->definition = true;
+   symver_node->symver = true;
+   symver_node->create_reference (n, IPA_REF_ALIAS, NULL);
+   symver_node->analyzed = true;
+ }
+ 
  /* Process attributes common for vars and functions.  */
  
  static void
*************** process_common_attributes (symtab_node *
*** 728,733 ****
--- 814,820 ----
  
    if (lookup_attribute ("no_reorder", DECL_ATTRIBUTES (decl)))
      node->no_reorder = 1;
+   process_symver_attribute (node);
  }
  
  /* Look for externally_visible and used attributes and mark cgraph nodes
*************** process_function_and_variable_attributes
*** 765,770 ****
--- 852,864 ----
         node = symtab->next_function (node))
      {
        tree decl = node->decl;
+ 
+       if (node->alias
+ 	  && lookup_attribute ("flatten", DECL_ATTRIBUTES (decl)))
+ 	{
+ 	  warning_at (DECL_SOURCE_LOCATION (node->decl), OPT_Wattributes,
+ 		      "%<flatten%> attribute is ignored on aliases");
+ 	}
        if (DECL_PRESERVE_P (decl))
  	node->mark_force_output ();
        else if (lookup_attribute ("externally_visible", DECL_ATTRIBUTES (decl)))
*************** process_function_and_variable_attributes
*** 775,788 ****
  			" attribute have effect only on public objects");
  	}
        if (lookup_attribute ("weakref", DECL_ATTRIBUTES (decl))
! 	  && (node->definition && !node->alias))
  	{
! 	  warning_at (DECL_SOURCE_LOCATION (node->decl), OPT_Wattributes,
  		      "%<weakref%> attribute ignored"
  		      " because function is defined");
  	  DECL_WEAK (decl) = 0;
  	  DECL_ATTRIBUTES (decl) = remove_attribute ("weakref",
  						     DECL_ATTRIBUTES (decl));
  	}
        else if (lookup_attribute ("alias", DECL_ATTRIBUTES (decl))
  	  && node->definition
--- 869,891 ----
  			" attribute have effect only on public objects");
  	}
        if (lookup_attribute ("weakref", DECL_ATTRIBUTES (decl))
! 	  && node->definition
! 	  && (!node->alias || DECL_INITIAL (decl) != error_mark_node))
  	{
! 	  /* NODE->DEFINITION && NODE->ALIAS is nonzero for valid weakref
! 	     function declarations; DECL_INITIAL is non-null for invalid
! 	     weakref functions that are also defined.  */
! 	  warning_at (DECL_SOURCE_LOCATION (decl), OPT_Wattributes,
  		      "%<weakref%> attribute ignored"
  		      " because function is defined");
  	  DECL_WEAK (decl) = 0;
  	  DECL_ATTRIBUTES (decl) = remove_attribute ("weakref",
  						     DECL_ATTRIBUTES (decl));
+ 	  DECL_ATTRIBUTES (decl) = remove_attribute ("alias",
+ 						     DECL_ATTRIBUTES (decl));
+ 	  node->alias = false;
+ 	  node->weakref = false;
+ 	  node->transparent_alias = false;
  	}
        else if (lookup_attribute ("alias", DECL_ATTRIBUTES (decl))
  	  && node->definition
*************** process_function_and_variable_attributes
*** 796,803 ****
  	  /* redefining extern inline function makes it DECL_UNINLINABLE.  */
  	  && !DECL_UNINLINABLE (decl))
  	warning_at (DECL_SOURCE_LOCATION (decl), OPT_Wattributes,
! 		    "always_inline function might not be inlinable");
!      
        process_common_attributes (node, decl);
      }
    for (vnode = symtab->first_variable (); vnode != first_var;
--- 899,906 ----
  	  /* redefining extern inline function makes it DECL_UNINLINABLE.  */
  	  && !DECL_UNINLINABLE (decl))
  	warning_at (DECL_SOURCE_LOCATION (decl), OPT_Wattributes,
! 		    "%<always_inline%> function might not be inlinable");
! 
        process_common_attributes (node, decl);
      }
    for (vnode = symtab->first_variable (); vnode != first_var;
*************** varpool_node::finalize_decl (tree decl)
*** 852,858 ****
      node->no_reorder = true;
    if (TREE_THIS_VOLATILE (decl) || DECL_PRESERVE_P (decl)
        /* Traditionally we do not eliminate static variables when not
! 	 optimizing and when not doing toplevel reoder.  */
        || (node->no_reorder && !DECL_COMDAT (node->decl)
  	  && !DECL_ARTIFICIAL (node->decl)))
      node->force_output = true;
--- 955,961 ----
      node->no_reorder = true;
    if (TREE_THIS_VOLATILE (decl) || DECL_PRESERVE_P (decl)
        /* Traditionally we do not eliminate static variables when not
! 	 optimizing and when not doing toplevel reorder.  */
        || (node->no_reorder && !DECL_COMDAT (node->decl)
  	  && !DECL_ARTIFICIAL (node->decl)))
      node->force_output = true;
*************** varpool_node::finalize_decl (tree decl)
*** 873,879 ****
  /* EDGE is an polymorphic call.  Mark all possible targets as reachable
     and if there is only one target, perform trivial devirtualization. 
     REACHABLE_CALL_TARGETS collects target lists we already walked to
!    avoid udplicate work.  */
  
  static void
  walk_polymorphic_call_targets (hash_set<void *> *reachable_call_targets,
--- 976,982 ----
  /* EDGE is an polymorphic call.  Mark all possible targets as reachable
     and if there is only one target, perform trivial devirtualization. 
     REACHABLE_CALL_TARGETS collects target lists we already walked to
!    avoid duplicate work.  */
  
  static void
  walk_polymorphic_call_targets (hash_set<void *> *reachable_call_targets,
*************** walk_polymorphic_call_targets (hash_set<
*** 934,952 ****
              {
  	      dump_printf_loc (MSG_OPTIMIZED_LOCATIONS, edge->call_stmt,
  			       "devirtualizing call in %s to %s\n",
! 			       edge->caller->name (), target->name ());
  	    }
  
! 	  edge->make_direct (target);
! 	  edge->redirect_call_stmt_to_callee ();
  
  	  if (symtab->dump_file)
  	    {
! 	      fprintf (symtab->dump_file,
! 		       "Devirtualized as: ");
! 	      print_gimple_stmt (symtab->dump_file,
! 				 edge->call_stmt, 0,
! 				 TDF_SLIM);
  	    }
  	}
      }
--- 1037,1053 ----
              {
  	      dump_printf_loc (MSG_OPTIMIZED_LOCATIONS, edge->call_stmt,
  			       "devirtualizing call in %s to %s\n",
! 			       edge->caller->dump_name (),
! 			       target->dump_name ());
  	    }
  
! 	  edge = cgraph_edge::make_direct (edge, target);
! 	  gimple *new_call = cgraph_edge::redirect_call_stmt_to_callee (edge);
  
  	  if (symtab->dump_file)
  	    {
! 	      fprintf (symtab->dump_file, "Devirtualized as: ");
! 	      print_gimple_stmt (symtab->dump_file, new_call, 0, TDF_SLIM);
  	    }
  	}
      }
*************** check_global_declaration (symtab_node *s
*** 967,981 ****
        && DECL_INITIAL (decl) == 0
        && DECL_EXTERNAL (decl)
        && ! DECL_ARTIFICIAL (decl)
!       && ! TREE_NO_WARNING (decl)
!       && ! TREE_PUBLIC (decl)
!       && (warn_unused_function
! 	  || snode->referred_to_p (/*include_self=*/false)))
      {
!       if (snode->referred_to_p (/*include_self=*/false))
  	pedwarn (input_location, 0, "%q+F used but never defined", decl);
        else
! 	warning (OPT_Wunused_function, "%q+F declared %<static%> but never defined", decl);
        /* This symbol is effectively an "extern" declaration now.  */
        TREE_PUBLIC (decl) = 1;
      }
--- 1068,1082 ----
        && DECL_INITIAL (decl) == 0
        && DECL_EXTERNAL (decl)
        && ! DECL_ARTIFICIAL (decl)
!       && ! TREE_PUBLIC (decl))
      {
!       if (TREE_NO_WARNING (decl))
! 	;
!       else if (snode->referred_to_p (/*include_self=*/false))
  	pedwarn (input_location, 0, "%q+F used but never defined", decl);
        else
! 	warning (OPT_Wunused_function, "%q+F declared %<static%> but never "
! 				       "defined", decl);
        /* This symbol is effectively an "extern" declaration now.  */
        TREE_PUBLIC (decl) = 1;
      }
*************** analyze_functions (bool first_time)
*** 1081,1087 ****
  		fprintf (symtab->dump_file, "Trivially needed symbols:");
  	      changed = true;
  	      if (symtab->dump_file)
! 		fprintf (symtab->dump_file, " %s", node->asm_name ());
  	      if (!changed && symtab->dump_file)
  		fprintf (symtab->dump_file, "\n");
  	    }
--- 1182,1188 ----
  		fprintf (symtab->dump_file, "Trivially needed symbols:");
  	      changed = true;
  	      if (symtab->dump_file)
! 		fprintf (symtab->dump_file, " %s", node->dump_asm_name ());
  	      if (!changed && symtab->dump_file)
  		fprintf (symtab->dump_file, "\n");
  	    }
*************** analyze_functions (bool first_time)
*** 1118,1124 ****
  		  && !cnode->dispatcher_function)
  		{
  		  cnode->reset ();
! 		  cnode->local.redefined_extern_inline = true;
  		  continue;
  		}
  
--- 1219,1225 ----
  		  && !cnode->dispatcher_function)
  		{
  		  cnode->reset ();
! 		  cnode->redefined_extern_inline = true;
  		  continue;
  		}
  
*************** analyze_functions (bool first_time)
*** 1133,1139 ****
  			|| opt_for_fn (edge->callee->decl, optimize)
  			/* Weakrefs needs to be preserved.  */
  			|| edge->callee->alias
! 			/* always_inline functions are inlined aven at -O0.  */
  		        || lookup_attribute
  				 ("always_inline",
  			          DECL_ATTRIBUTES (edge->callee->decl))
--- 1234,1240 ----
  			|| opt_for_fn (edge->callee->decl, optimize)
  			/* Weakrefs needs to be preserved.  */
  			|| edge->callee->alias
! 			/* always_inline functions are inlined even at -O0.  */
  		        || lookup_attribute
  				 ("always_inline",
  			          DECL_ATTRIBUTES (edge->callee->decl))
*************** analyze_functions (bool first_time)
*** 1227,1233 ****
      {
        next = node->next;
        /* For symbols declared locally we clear TREE_READONLY when emitting
! 	 the construtor (if one is needed).  For external declarations we can
  	 not safely assume that the type is readonly because we may be called
  	 during its construction.  */
        if (TREE_CODE (node->decl) == VAR_DECL
--- 1328,1334 ----
      {
        next = node->next;
        /* For symbols declared locally we clear TREE_READONLY when emitting
! 	 the constructor (if one is needed).  For external declarations we can
  	 not safely assume that the type is readonly because we may be called
  	 during its construction.  */
        if (TREE_CODE (node->decl) == VAR_DECL
*************** analyze_functions (bool first_time)
*** 1238,1244 ****
        if (!node->aux && !node->referred_to_p ())
  	{
  	  if (symtab->dump_file)
! 	    fprintf (symtab->dump_file, " %s", node->name ());
  
  	  /* See if the debugger can use anything before the DECL
  	     passes away.  Perhaps it can notice a DECL that is now a
--- 1339,1345 ----
        if (!node->aux && !node->referred_to_p ())
  	{
  	  if (symtab->dump_file)
! 	    fprintf (symtab->dump_file, " %s", node->dump_name ());
  
  	  /* See if the debugger can use anything before the DECL
  	     passes away.  Perhaps it can notice a DECL that is now a
*************** mark_functions_to_output (void)
*** 1504,1510 ****
        if (node->analyzed
  	  && !node->thunk.thunk_p
  	  && !node->alias
! 	  && !node->global.inlined_to
  	  && !TREE_ASM_WRITTEN (decl)
  	  && !DECL_EXTERNAL (decl))
  	{
--- 1605,1611 ----
        if (node->analyzed
  	  && !node->thunk.thunk_p
  	  && !node->alias
! 	  && !node->inlined_to
  	  && !TREE_ASM_WRITTEN (decl)
  	  && !DECL_EXTERNAL (decl))
  	{
*************** mark_functions_to_output (void)
*** 1529,1535 ****
  	{
  	  /* We should've reclaimed all functions that are not needed.  */
  	  if (flag_checking
! 	      && !node->global.inlined_to
  	      && gimple_has_body_p (decl)
  	      /* FIXME: in ltrans unit when offline copy is outside partition but inline copies
  		 are inside partition, we can end up not removing the body since we no longer
--- 1630,1636 ----
  	{
  	  /* We should've reclaimed all functions that are not needed.  */
  	  if (flag_checking
! 	      && !node->inlined_to
  	      && gimple_has_body_p (decl)
  	      /* FIXME: in ltrans unit when offline copy is outside partition but inline copies
  		 are inside partition, we can end up not removing the body since we no longer
*************** mark_functions_to_output (void)
*** 1542,1548 ****
  	      node->debug ();
  	      internal_error ("failed to reclaim unneeded function");
  	    }
! 	  gcc_assert (node->global.inlined_to
  		      || !gimple_has_body_p (decl)
  		      || node->in_other_partition
  		      || node->clones
--- 1643,1649 ----
  	      node->debug ();
  	      internal_error ("failed to reclaim unneeded function");
  	    }
! 	  gcc_assert (node->inlined_to
  		      || !gimple_has_body_p (decl)
  		      || node->in_other_partition
  		      || node->clones
*************** mark_functions_to_output (void)
*** 1557,1563 ****
        if (node->same_comdat_group && !node->process)
  	{
  	  tree decl = node->decl;
! 	  if (!node->global.inlined_to
  	      && gimple_has_body_p (decl)
  	      /* FIXME: in an ltrans unit when the offline copy is outside a
  		 partition but inline copies are inside a partition, we can
--- 1658,1664 ----
        if (node->same_comdat_group && !node->process)
  	{
  	  tree decl = node->decl;
! 	  if (!node->inlined_to
  	      && gimple_has_body_p (decl)
  	      /* FIXME: in an ltrans unit when the offline copy is outside a
  		 partition but inline copies are inside a partition, we can
*************** cgraph_node::expand_thunk (bool output_a
*** 1790,1796 ****
        && targetm.asm_out.can_output_mi_thunk (thunk_fndecl, fixed_offset,
  					      virtual_value, alias))
      {
-       const char *fnname;
        tree fn_block;
        tree restype = TREE_TYPE (TREE_TYPE (thunk_fndecl));
  
--- 1891,1896 ----
*************** cgraph_node::expand_thunk (bool output_a
*** 1814,1820 ****
  	= build_decl (DECL_SOURCE_LOCATION (thunk_fndecl),
  		      RESULT_DECL, 0, restype);
        DECL_CONTEXT (DECL_RESULT (thunk_fndecl)) = thunk_fndecl;
-       fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunk_fndecl));
  
        /* The back end expects DECL_INITIAL to contain a BLOCK, so we
  	 create one.  */
--- 1914,1919 ----
*************** cgraph_node::expand_thunk (bool output_a
*** 1828,1839 ****
        insn_locations_init ();
        set_curr_insn_location (DECL_SOURCE_LOCATION (thunk_fndecl));
        prologue_location = curr_insn_location ();
-       assemble_start_function (thunk_fndecl, fnname);
  
        targetm.asm_out.output_mi_thunk (asm_out_file, thunk_fndecl,
  				       fixed_offset, virtual_value, alias);
  
-       assemble_end_function (thunk_fndecl, fnname);
        insn_locations_finalize ();
        init_insn_lengths ();
        free_after_compilation (cfun);
--- 1927,1936 ----
*************** cgraph_node::expand_thunk (bool output_a
*** 1864,1870 ****
        greturn *ret;
        bool alias_is_noreturn = TREE_THIS_VOLATILE (alias);
  
!       /* We may be called from expand_thunk that releses body except for
  	 DECL_ARGUMENTS.  In this case force_gimple_thunk is true.  */
        if (in_lto_p && !force_gimple_thunk)
  	get_untransformed_body ();
--- 1961,1967 ----
        greturn *ret;
        bool alias_is_noreturn = TREE_THIS_VOLATILE (alias);
  
!       /* We may be called from expand_thunk that releases body except for
  	 DECL_ARGUMENTS.  In this case force_gimple_thunk is true.  */
        if (in_lto_p && !force_gimple_thunk)
  	get_untransformed_body ();
*************** cgraph_node::expand_thunk (bool output_a
*** 1997,2003 ****
  	  gimple_call_set_chain (call, decl);
  	}
  
!       /* Return slot optimization is always possible and in fact requred to
           return values with DECL_BY_REFERENCE.  */
        if (aggregate_value_p (resdecl, TREE_TYPE (thunk_fndecl))
  	  && (!is_gimple_reg_type (TREE_TYPE (resdecl))
--- 2094,2100 ----
  	  gimple_call_set_chain (call, decl);
  	}
  
!       /* Return slot optimization is always possible and in fact required to
           return values with DECL_BY_REFERENCE.  */
        if (aggregate_value_p (resdecl, TREE_TYPE (thunk_fndecl))
  	  && (!is_gimple_reg_type (TREE_TYPE (resdecl))
*************** cgraph_node::assemble_thunks_and_aliases
*** 2118,2124 ****
  
    for (e = callers; e;)
      if (e->caller->thunk.thunk_p
! 	&& !e->caller->global.inlined_to)
        {
  	cgraph_node *thunk = e->caller;
  
--- 2215,2221 ----
  
    for (e = callers; e;)
      if (e->caller->thunk.thunk_p
! 	&& !e->caller->inlined_to)
        {
  	cgraph_node *thunk = e->caller;
  
*************** cgraph_node::assemble_thunks_and_aliases
*** 2139,2146 ****
  	  /* Force assemble_alias to really output the alias this time instead
  	     of buffering it in same alias pairs.  */
  	  TREE_ASM_WRITTEN (decl) = 1;
! 	  do_assemble_alias (alias->decl,
! 			     DECL_ASSEMBLER_NAME (decl));
  	  alias->assemble_thunks_and_aliases ();
  	  TREE_ASM_WRITTEN (decl) = saved_written;
  	}
--- 2236,2247 ----
  	  /* Force assemble_alias to really output the alias this time instead
  	     of buffering it in same alias pairs.  */
  	  TREE_ASM_WRITTEN (decl) = 1;
! 	  if (alias->symver)
! 	    do_assemble_symver (alias->decl,
! 				DECL_ASSEMBLER_NAME (decl));
! 	  else
! 	    do_assemble_alias (alias->decl,
! 			       DECL_ASSEMBLER_NAME (decl));
  	  alias->assemble_thunks_and_aliases ();
  	  TREE_ASM_WRITTEN (decl) = saved_written;
  	}
*************** cgraph_node::expand (void)
*** 2155,2161 ****
    location_t saved_loc;
  
    /* We ought to not compile any inline clones.  */
!   gcc_assert (!global.inlined_to);
  
    /* __RTL functions are compiled as soon as they are parsed, so don't
       do it again.  */
--- 2256,2262 ----
    location_t saved_loc;
  
    /* We ought to not compile any inline clones.  */
!   gcc_assert (!inlined_to);
  
    /* __RTL functions are compiled as soon as they are parsed, so don't
       do it again.  */
*************** cgraph_node::expand (void)
*** 2188,2193 ****
--- 2289,2295 ----
  
    bitmap_obstack_initialize (&reg_obstack); /* FIXME, only at RTL generation*/
  
+   update_ssa (TODO_update_ssa_only_virtuals);
    execute_all_ipa_transforms (false);
  
    /* Perform all tree transforms and optimizations.  */
*************** cgraph_node::expand (void)
*** 2254,2265 ****
    if (cfun)
      pop_cfun ();
  
!   /* It would make a lot more sense to output thunks before function body to get more
!      forward and lest backwarding jumps.  This however would need solving problem
!      with comdats. See PR48668.  Also aliases must come after function itself to
!      make one pass assemblers, like one on AIX, happy.  See PR 50689.
!      FIXME: Perhaps thunks should be move before function IFF they are not in comdat
!      groups.  */
    assemble_thunks_and_aliases ();
    release_body ();
    /* Eliminate all call edges.  This is important so the GIMPLE_CALL no longer
--- 2356,2368 ----
    if (cfun)
      pop_cfun ();
  
!   /* It would make a lot more sense to output thunks before function body to
!      get more forward and fewer backward jumps.  This however would need
!      solving problem with comdats.  See PR48668.  Also aliases must come after
!      function itself to make one pass assemblers, like one on AIX, happy.
!      See PR 50689.
!      FIXME: Perhaps thunks should be move before function IFF they are not in
!      comdat groups.  */
    assemble_thunks_and_aliases ();
    release_body ();
    /* Eliminate all call edges.  This is important so the GIMPLE_CALL no longer
*************** cgraph_node::expand (void)
*** 2268,2289 ****
    remove_all_references ();
  }
  
! /* Node comparer that is responsible for the order that corresponds
     to time when a function was launched for the first time.  */
  
! static int
! node_cmp (const void *pa, const void *pb)
  {
    const cgraph_node *a = *(const cgraph_node * const *) pa;
    const cgraph_node *b = *(const cgraph_node * const *) pb;
  
    /* Functions with time profile must be before these without profile.  */
!   if (!a->tp_first_run || !b->tp_first_run)
!     return a->tp_first_run - b->tp_first_run;
  
!   return a->tp_first_run != b->tp_first_run
! 	 ? b->tp_first_run - a->tp_first_run
! 	 : b->order - a->order;
  }
  
  /* Expand all functions that must be output.
--- 2371,2402 ----
    remove_all_references ();
  }
  
! /* Node comparator that is responsible for the order that corresponds
     to time when a function was launched for the first time.  */
  
! int
! tp_first_run_node_cmp (const void *pa, const void *pb)
  {
    const cgraph_node *a = *(const cgraph_node * const *) pa;
    const cgraph_node *b = *(const cgraph_node * const *) pb;
+   unsigned int tp_first_run_a = a->tp_first_run;
+   unsigned int tp_first_run_b = b->tp_first_run;
+ 
+   if (!opt_for_fn (a->decl, flag_profile_reorder_functions)
+       || a->no_reorder)
+     tp_first_run_a = 0;
+   if (!opt_for_fn (b->decl, flag_profile_reorder_functions)
+       || b->no_reorder)
+     tp_first_run_b = 0;
+ 
+   if (tp_first_run_a == tp_first_run_b)
+     return a->order - b->order;
  
    /* Functions with time profile must be before these without profile.  */
!   tp_first_run_a = (tp_first_run_a - 1) & INT_MAX;
!   tp_first_run_b = (tp_first_run_b - 1) & INT_MAX;
  
!   return tp_first_run_a - tp_first_run_b;
  }
  
  /* Expand all functions that must be output.
*************** expand_all_functions (void)
*** 2302,2309 ****
    cgraph_node *node;
    cgraph_node **order = XCNEWVEC (cgraph_node *,
  					 symtab->cgraph_count);
    unsigned int expanded_func_count = 0, profiled_func_count = 0;
!   int order_pos, new_order_pos = 0;
    int i;
  
    order_pos = ipa_reverse_postorder (order);
--- 2415,2424 ----
    cgraph_node *node;
    cgraph_node **order = XCNEWVEC (cgraph_node *,
  					 symtab->cgraph_count);
+   cgraph_node **tp_first_run_order = XCNEWVEC (cgraph_node *,
+ 					 symtab->cgraph_count);
    unsigned int expanded_func_count = 0, profiled_func_count = 0;
!   int order_pos, tp_first_run_order_pos = 0, new_order_pos = 0;
    int i;
  
    order_pos = ipa_reverse_postorder (order);
*************** expand_all_functions (void)
*** 2313,2353 ****
       optimization.  So we must be sure to not reference them.  */
    for (i = 0; i < order_pos; i++)
      if (order[i]->process)
!       order[new_order_pos++] = order[i];
! 
!   if (flag_profile_reorder_functions)
!     qsort (order, new_order_pos, sizeof (cgraph_node *), node_cmp);
  
!   for (i = new_order_pos - 1; i >= 0; i--)
      {
!       node = order[i];
  
        if (node->process)
  	{
  	  expanded_func_count++;
! 	  if(node->tp_first_run)
! 	    profiled_func_count++;
  
  	  if (symtab->dump_file)
  	    fprintf (symtab->dump_file,
  		     "Time profile order in expand_all_functions:%s:%d\n",
! 		     node->asm_name (), node->tp_first_run);
  	  node->process = 0;
  	  node->expand ();
  	}
      }
  
!     if (dump_file)
!       fprintf (dump_file, "Expanded functions with time profile (%s):%u/%u\n",
!                main_input_filename, profiled_func_count, expanded_func_count);
  
!   if (symtab->dump_file && flag_profile_reorder_functions)
      fprintf (symtab->dump_file, "Expanded functions with time profile:%u/%u\n",
               profiled_func_count, expanded_func_count);
  
    symtab->process_new_functions ();
    free_gimplify_stack ();
! 
    free (order);
  }
  
--- 2428,2489 ----
       optimization.  So we must be sure to not reference them.  */
    for (i = 0; i < order_pos; i++)
      if (order[i]->process)
!       {
! 	if (order[i]->tp_first_run
! 	    && opt_for_fn (order[i]->decl, flag_profile_reorder_functions))
! 	  tp_first_run_order[tp_first_run_order_pos++] = order[i];
! 	else
!           order[new_order_pos++] = order[i];
!       }
  
!   /* First output functions with time profile in specified order.  */
!   qsort (tp_first_run_order, tp_first_run_order_pos,
! 	 sizeof (cgraph_node *), tp_first_run_node_cmp);
!   for (i = 0; i < tp_first_run_order_pos; i++)
      {
!       node = tp_first_run_order[i];
  
        if (node->process)
  	{
  	  expanded_func_count++;
! 	  profiled_func_count++;
  
  	  if (symtab->dump_file)
  	    fprintf (symtab->dump_file,
  		     "Time profile order in expand_all_functions:%s:%d\n",
! 		     node->dump_asm_name (), node->tp_first_run);
  	  node->process = 0;
  	  node->expand ();
  	}
      }
  
!   /* Output functions in RPO so callees get optimized before callers.  This
!      makes ipa-ra and other propagators to work.
!      FIXME: This is far from optimal code layout.  */
!   for (i = new_order_pos - 1; i >= 0; i--)
!     {
!       node = order[i];
  
!       if (node->process)
! 	{
! 	  expanded_func_count++;
! 	  node->process = 0;
! 	  node->expand ();
! 	}
!     }
! 
!   if (dump_file)
!     fprintf (dump_file, "Expanded functions with time profile (%s):%u/%u\n",
! 	     main_input_filename, profiled_func_count, expanded_func_count);
! 
!   if (symtab->dump_file && tp_first_run_order_pos)
      fprintf (symtab->dump_file, "Expanded functions with time profile:%u/%u\n",
               profiled_func_count, expanded_func_count);
  
    symtab->process_new_functions ();
    free_gimplify_stack ();
!   delete ipa_saved_clone_sources;
!   ipa_saved_clone_sources = NULL;
    free (order);
  }
  
*************** symbol_table::compile (void)
*** 2603,2612 ****
  
    timevar_push (TV_CGRAPHOPT);
    if (pre_ipa_mem_report)
!     {
!       fprintf (stderr, "Memory consumption before IPA\n");
!       dump_memory_report (false);
!     }
    if (!quiet_flag)
      fprintf (stderr, "Performing interprocedural optimizations\n");
    state = IPA;
--- 2739,2745 ----
  
    timevar_push (TV_CGRAPHOPT);
    if (pre_ipa_mem_report)
!     dump_memory_report ("Memory consumption before IPA");
    if (!quiet_flag)
      fprintf (stderr, "Performing interprocedural optimizations\n");
    state = IPA;
*************** symbol_table::compile (void)
*** 2617,2624 ****
  
    /* Don't run the IPA passes if there was any error or sorry messages.  */
    if (!seen_error ())
      ipa_passes ();
! 
    /* Do nothing else if any IPA pass found errors or if we are just streaming LTO.  */
    if (seen_error ()
        || ((!in_lto_p || flag_incremental_link == INCREMENTAL_LINK_LTO)
--- 2750,2760 ----
  
    /* Don't run the IPA passes if there was any error or sorry messages.  */
    if (!seen_error ())
+   {
+     timevar_start (TV_CGRAPH_IPA_PASSES);
      ipa_passes ();
!     timevar_stop (TV_CGRAPH_IPA_PASSES);
!   }
    /* Do nothing else if any IPA pass found errors or if we are just streaming LTO.  */
    if (seen_error ()
        || ((!in_lto_p || flag_incremental_link == INCREMENTAL_LINK_LTO)
*************** symbol_table::compile (void)
*** 2635,2644 ****
        symtab->dump (dump_file);
      }
    if (post_ipa_mem_report)
!     {
!       fprintf (stderr, "Memory consumption after IPA\n");
!       dump_memory_report (false);
!     }
    timevar_pop (TV_CGRAPHOPT);
  
    /* Output everything.  */
--- 2771,2777 ----
        symtab->dump (dump_file);
      }
    if (post_ipa_mem_report)
!     dump_memory_report ("Memory consumption after IPA");
    timevar_pop (TV_CGRAPHOPT);
  
    /* Output everything.  */
*************** symbol_table::compile (void)
*** 2655,2668 ****
  
    /* When weakref support is missing, we automatically translate all
       references to NODE to references to its ultimate alias target.
!      The renaming mechanizm uses flag IDENTIFIER_TRANSPARENT_ALIAS and
       TREE_CHAIN.
  
       Set up this mapping before we output any assembler but once we are sure
       that all symbol renaming is done.
  
!      FIXME: All this uglyness can go away if we just do renaming at gimple
!      level by physically rewritting the IL.  At the moment we can only redirect
       calls, so we need infrastructure for renaming references as well.  */
  #ifndef ASM_OUTPUT_WEAKREF
    symtab_node *node;
--- 2788,2801 ----
  
    /* When weakref support is missing, we automatically translate all
       references to NODE to references to its ultimate alias target.
!      The renaming mechanism uses flag IDENTIFIER_TRANSPARENT_ALIAS and
       TREE_CHAIN.
  
       Set up this mapping before we output any assembler but once we are sure
       that all symbol renaming is done.
  
!      FIXME: All this ugliness can go away if we just do renaming at gimple
!      level by physically rewriting the IL.  At the moment we can only redirect
       calls, so we need infrastructure for renaming references as well.  */
  #ifndef ASM_OUTPUT_WEAKREF
    symtab_node *node;
*************** symbol_table::compile (void)
*** 2684,2690 ****
--- 2817,2827 ----
    /* Output first asm statements and anything ordered. The process
       flag is cleared for these nodes, so we skip them later.  */
    output_in_order ();
+ 
+   timevar_start (TV_CGRAPH_FUNC_EXPANSION);
    expand_all_functions ();
+   timevar_stop (TV_CGRAPH_FUNC_EXPANSION);
+ 
    output_variables ();
  
    process_new_functions ();
*************** symbol_table::compile (void)
*** 2707,2713 ****
        bool error_found = false;
  
        FOR_EACH_DEFINED_FUNCTION (node)
! 	if (node->global.inlined_to
  	    || gimple_has_body_p (node->decl))
  	  {
  	    error_found = true;
--- 2844,2850 ----
        bool error_found = false;
  
        FOR_EACH_DEFINED_FUNCTION (node)
! 	if (node->inlined_to
  	    || gimple_has_body_p (node->decl))
  	  {
  	    error_found = true;
diff -Nrcpad gcc-9.3.0/gcc/cif-code.def gcc-10.1.0/gcc/cif-code.def
*** gcc-9.3.0/gcc/cif-code.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/cif-code.def	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* This file contains the definitions of the cgraph_inline_failed_t
     enums used in GCC.
  
!    Copyright (C) 2008-2019 Free Software Foundation, Inc.
     Contributed by Doug Kwan <dougkwan@google.com>
  
  This file is part of GCC.
--- 1,7 ----
  /* This file contains the definitions of the cgraph_inline_failed_t
     enums used in GCC.
  
!    Copyright (C) 2008-2020 Free Software Foundation, Inc.
     Contributed by Doug Kwan <dougkwan@google.com>
  
  This file is part of GCC.
*************** DEFCIFCODE(RECURSIVE_INLINING, CIF_FINAL
*** 83,97 ****
  DEFCIFCODE(UNLIKELY_CALL, CIF_FINAL_NORMAL,
  	   N_("call is unlikely and code size would grow"))
  
  /* Function is not declared as inline.  */
  DEFCIFCODE(NOT_DECLARED_INLINED, CIF_FINAL_NORMAL,
  	   N_("function not declared inline and code size would grow"))
  
  /* Caller and callee disagree on the arguments.  */
- DEFCIFCODE(MISMATCHED_ARGUMENTS, CIF_FINAL_ERROR,
- 	   N_("mismatched arguments"))
- 
- /* Caller and callee disagree on the arguments.  */
  DEFCIFCODE(LTO_MISMATCHED_DECLARATIONS, CIF_FINAL_ERROR,
  	   N_("mismatched declarations during linktime optimization"))
  
--- 83,97 ----
  DEFCIFCODE(UNLIKELY_CALL, CIF_FINAL_NORMAL,
  	   N_("call is unlikely and code size would grow"))
  
+ /* Call is considered never executed.  */
+ DEFCIFCODE(NEVER_CALL, CIF_FINAL_NORMAL,
+ 	   N_("call is considered never executed and code size would grow"))
+ 
  /* Function is not declared as inline.  */
  DEFCIFCODE(NOT_DECLARED_INLINED, CIF_FINAL_NORMAL,
  	   N_("function not declared inline and code size would grow"))
  
  /* Caller and callee disagree on the arguments.  */
  DEFCIFCODE(LTO_MISMATCHED_DECLARATIONS, CIF_FINAL_ERROR,
  	   N_("mismatched declarations during linktime optimization"))
  
diff -Nrcpad gcc-9.3.0/gcc/collect-utils.c gcc-10.1.0/gcc/collect-utils.c
*** gcc-9.3.0/gcc/collect-utils.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/collect-utils.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Utility functions used by tools like collect2 and lto-wrapper.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Utility functions used by tools like collect2 and lto-wrapper.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** collect_wait (const char *prog, struct p
*** 65,71 ****
    int status;
  
    if (!pex_get_status (pex, 1, &status))
!     fatal_error (input_location, "can%'t get program status: %m");
    pex_free (pex);
  
    if (response_file && !save_temps)
--- 65,71 ----
    int status;
  
    if (!pex_get_status (pex, 1, &status))
!     fatal_error (input_location, "cannot get program status: %m");
    pex_free (pex);
  
    if (response_file && !save_temps)
*************** collect_execute (const char *prog, char
*** 180,186 ****
  
    pex = pex_init (0, "collect2", NULL);
    if (pex == NULL)
!     fatal_error (input_location, "pex_init failed: %m");
  
    errmsg = pex_run (pex, flags, argv[0], argv, outname,
  		    errname, &err);
--- 180,186 ----
  
    pex = pex_init (0, "collect2", NULL);
    if (pex == NULL)
!     fatal_error (input_location, "%<pex_init%> failed: %m");
  
    errmsg = pex_run (pex, flags, argv[0], argv, outname,
  		    errname, &err);
diff -Nrcpad gcc-9.3.0/gcc/collect-utils.h gcc-10.1.0/gcc/collect-utils.h
*** gcc-9.3.0/gcc/collect-utils.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/collect-utils.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Utility functions used by tools like collect2 and lto-wrapper.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Utility functions used by tools like collect2 and lto-wrapper.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/collect2-aix.c gcc-10.1.0/gcc/collect2-aix.c
*** gcc-9.3.0/gcc/collect2-aix.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/collect2-aix.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* AIX cross support for collect2.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* AIX cross support for collect2.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/collect2-aix.h gcc-10.1.0/gcc/collect2-aix.h
*** gcc-9.3.0/gcc/collect2-aix.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/collect2-aix.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* AIX cross support for collect2.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* AIX cross support for collect2.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/collect2.c gcc-10.1.0/gcc/collect2.c
*** gcc-9.3.0/gcc/collect2.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/collect2.c	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Collect static initialization info into data structures that can be
     traversed by C++ initialization and finalization routines.
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
     Contributed by Chris Smith (csmith@convex.com).
     Heavily modified by Michael Meissner (meissner@cygnus.com),
     Per Bothner (bothner@cygnus.com), and John Gilmore (gnu@cygnus.com).
--- 1,6 ----
  /* Collect static initialization info into data structures that can be
     traversed by C++ initialization and finalization routines.
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
     Contributed by Chris Smith (csmith@convex.com).
     Heavily modified by Michael Meissner (meissner@cygnus.com),
     Per Bothner (bothner@cygnus.com), and John Gilmore (gnu@cygnus.com).
*************** bool helpflag;			/* true if --help */
*** 205,218 ****
  static int shared_obj;			/* true if -shared */
  static int static_obj;			/* true if -static */
  
! static char *c_file;		/* <xxx>.c for constructor/destructor list.  */
! static char *o_file;		/* <xxx>.o for constructor/destructor list.  */
  #ifdef COLLECT_EXPORT_LIST
  static const char *export_file;		/* <xxx>.x for AIX export list.  */
  #endif
  static char **lto_o_files;		/* Output files for LTO.  */
- const char *ldout;			/* File for ld stdout.  */
- const char *lderrout;			/* File for ld stderr.  */
  static const char *output_file;		/* Output file for ld.  */
  static const char *nm_file_name;	/* pathname of nm */
  #ifdef LDD_SUFFIX
--- 205,216 ----
  static int shared_obj;			/* true if -shared */
  static int static_obj;			/* true if -static */
  
! static const char *c_file;		/* <xxx>.c for constructor/destructor list.  */
! static const char *o_file;		/* <xxx>.o for constructor/destructor list.  */
  #ifdef COLLECT_EXPORT_LIST
  static const char *export_file;		/* <xxx>.x for AIX export list.  */
  #endif
  static char **lto_o_files;		/* Output files for LTO.  */
  static const char *output_file;		/* Output file for ld.  */
  static const char *nm_file_name;	/* pathname of nm */
  #ifdef LDD_SUFFIX
*************** tool_cleanup (bool from_signal)
*** 401,420 ****
  
    if (lto_o_files)
      maybe_unlink_list (lto_o_files);
- 
-   if (ldout != 0 && ldout[0])
-     {
-       if (!from_signal)
- 	dump_ld_file (ldout, stdout);
-       maybe_unlink (ldout);
-     }
- 
-   if (lderrout != 0 && lderrout[0])
-     {
-       if (!from_signal)
- 	dump_ld_file (lderrout, stderr);
-       maybe_unlink (lderrout);
-     }
  }
  
  static void
--- 399,404 ----
*************** extract_string (const char **pp)
*** 480,556 ****
    return XOBFINISH (&temporary_obstack, char *);
  }
  
- void
- dump_ld_file (const char *name, FILE *to)
- {
-   FILE *stream = fopen (name, "r");
- 
-   if (stream == 0)
-     return;
-   while (1)
-     {
-       int c;
-       while (c = getc (stream),
- 	     c != EOF && (ISIDNUM (c) || c == '$' || c == '.'))
- 	obstack_1grow (&temporary_obstack, c);
-       if (obstack_object_size (&temporary_obstack) > 0)
- 	{
- 	  const char *word, *p;
- 	  char *result;
- 	  obstack_1grow (&temporary_obstack, '\0');
- 	  word = XOBFINISH (&temporary_obstack, const char *);
- 
- 	  if (*word == '.')
- 	    ++word, putc ('.', to);
- 	  p = word;
- 	  if (!strncmp (p, USER_LABEL_PREFIX, strlen (USER_LABEL_PREFIX)))
- 	    p += strlen (USER_LABEL_PREFIX);
- 
- #ifdef HAVE_LD_DEMANGLE
- 	  result = 0;
- #else
- 	  if (no_demangle)
- 	    result = 0;
- 	  else
- 	    result = cplus_demangle (p, DMGL_PARAMS | DMGL_ANSI | DMGL_VERBOSE);
- #endif
- 
- 	  if (result)
- 	    {
- 	      int diff;
- 	      fputs (result, to);
- 
- 	      diff = strlen (word) - strlen (result);
- 	      while (diff > 0 && c == ' ')
- 		--diff, putc (' ', to);
- 	      if (diff < 0 && c == ' ')
- 		{
- 		  while (diff < 0 && c == ' ')
- 		    ++diff, c = getc (stream);
- 		  if (!ISSPACE (c))
- 		    {
- 		      /* Make sure we output at least one space, or
- 			 the demangled symbol name will run into
- 			 whatever text follows.  */
- 		      putc (' ', to);
- 		    }
- 		}
- 
- 	      free (result);
- 	    }
- 	  else
- 	    fputs (word, to);
- 
- 	  fflush (to);
- 	  obstack_free (&temporary_obstack, temporary_firstobj);
- 	}
-       if (c == EOF)
- 	break;
-       putc (c, to);
-     }
-   fclose (stream);
- }
- 
  /* Return the kind of symbol denoted by name S.  */
  
  static symkind
--- 464,469 ----
*************** static const char *const target_machine
*** 620,626 ****
  
     Return 0 if not found, otherwise return its name, allocated with malloc.  */
  
! #if defined (OBJECT_FORMAT_NONE) || defined (OBJECT_FORMAT_COFF)
  
  /* Add an entry for the object file NAME to object file list LIST.
     New entries are added at the end of the list. The original pointer
--- 533,539 ----
  
     Return 0 if not found, otherwise return its name, allocated with malloc.  */
  
! #ifdef OBJECT_FORMAT_NONE
  
  /* Add an entry for the object file NAME to object file list LIST.
     New entries are added at the end of the list. The original pointer
*************** add_lto_object (struct lto_object_list *
*** 640,646 ****
  
    list->last = n;
  }
! #endif
  
  
  /* Perform a link-time recompilation and relink if any of the object
--- 553,559 ----
  
    list->last = n;
  }
! #endif /* OBJECT_FORMAT_NONE */
  
  
  /* Perform a link-time recompilation and relink if any of the object
*************** maybe_run_lto_and_relink (char **lto_ld_
*** 705,711 ****
        size_t num_files;
  
        if (!lto_wrapper)
! 	fatal_error (input_location, "COLLECT_LTO_WRAPPER must be set");
  
        num_lto_c_args++;
  
--- 618,625 ----
        size_t num_files;
  
        if (!lto_wrapper)
! 	fatal_error (input_location, "environment variable "
! 		     "%<COLLECT_LTO_WRAPPER%> must be set");
  
        num_lto_c_args++;
  
*************** maybe_run_lto_and_relink (char **lto_ld_
*** 831,836 ****
--- 745,774 ----
    else
      post_ld_pass (false); /* No LTO objects were found, no temp file.  */
  }
+ /* Entry point for linker invoation.  Called from main in collect2.c.
+    LD_ARGV is an array of arguments for the linker.  */
+ 
+ static void
+ do_link (char **ld_argv)
+ {
+   struct pex_obj *pex;
+   const char *prog = "ld";
+   pex = collect_execute (prog, ld_argv, NULL, NULL,
+ 			 PEX_LAST | PEX_SEARCH,
+ 			 HAVE_GNU_LD && at_file_supplied);
+   int ret = collect_wait (prog, pex);
+   if (ret)
+     {
+       error ("ld returned %d exit status", ret);
+       exit (ret);
+     }
+   else
+     {
+       /* We have just successfully produced an output file, so assume that we
+ 	 may unlink it if need be for now on.  */
+       may_unlink_output_file = true;
+     }
+ }
  
  /* Main program.  */
  
*************** main (int argc, char **argv)
*** 1244,1270 ****
    /* Make temp file names.  */
    if (save_temps)
      {
!       c_file = (char *) xmalloc (strlen (output_file)
! 				  + sizeof (".cdtor.c") + 1);
!       strcpy (c_file, output_file);
!       strcat (c_file, ".cdtor.c");
!       o_file = (char *) xmalloc (strlen (output_file)
! 				  + sizeof (".cdtor.o") + 1);
!       strcpy (o_file, output_file);
!       strcat (o_file, ".cdtor.o");
      }
    else
      {
        c_file = make_temp_file (".cdtor.c");
        o_file = make_temp_file (".cdtor.o");
-     }
  #ifdef COLLECT_EXPORT_LIST
!   export_file = make_temp_file (".x");
  #endif
-   if (!debug)
-     {
-       ldout = make_temp_file (".ld");
-       lderrout = make_temp_file (".le");
      }
    /* Build the command line to compile the ctor/dtor list.  */
    *c_ptr++ = c_file_name;
--- 1182,1200 ----
    /* Make temp file names.  */
    if (save_temps)
      {
!       c_file = concat (output_file, ".cdtor.c", NULL);
!       o_file = concat (output_file, ".cdtor.o", NULL);
! #ifdef COLLECT_EXPORT_LIST
!       export_file = concat (output_file, ".x", NULL);
! #endif
      }
    else
      {
        c_file = make_temp_file (".cdtor.c");
        o_file = make_temp_file (".cdtor.o");
  #ifdef COLLECT_EXPORT_LIST
!       export_file = make_temp_file (".x");
  #endif
      }
    /* Build the command line to compile the ctor/dtor list.  */
    *c_ptr++ = c_file_name;
*************** main (int argc, char **argv)
*** 1403,1409 ****
  
  		  stream = fopen (list_filename, "r");
  		  if (stream == NULL)
! 		    fatal_error (input_location, "can%'t open %s: %m",
  				 list_filename);
  
  		  while (fgets (buf, sizeof buf, stream) != NULL)
--- 1333,1339 ----
  
  		  stream = fopen (list_filename, "r");
  		  if (stream == NULL)
! 		    fatal_error (input_location, "cannot open %s: %m",
  				 list_filename);
  
  		  while (fgets (buf, sizeof buf, stream) != NULL)
*************** main (int argc, char **argv)
*** 1710,1716 ****
         functions from precise cross reference insertions by the compiler.  */
  
      if (early_exit || ld1_filter != SCAN_NOTHING)
!       do_tlink (ld1_argv, object_lst);
  
      if (early_exit)
        {
--- 1640,1646 ----
         functions from precise cross reference insertions by the compiler.  */
  
      if (early_exit || ld1_filter != SCAN_NOTHING)
!       do_link (ld1_argv);
  
      if (early_exit)
        {
*************** main (int argc, char **argv)
*** 1768,1777 ****
  #endif
        )
      {
!       /* Do tlink without additional code generation now if we didn't
  	 do it earlier for scanning purposes.  */
        if (ld1_filter == SCAN_NOTHING)
! 	do_tlink (ld1_argv, object_lst);
  
        if (lto_mode)
          maybe_run_lto_and_relink (ld1_argv, object_lst, object, false);
--- 1698,1707 ----
  #endif
        )
      {
!       /* Do link without additional code generation now if we didn't
  	 do it earlier for scanning purposes.  */
        if (ld1_filter == SCAN_NOTHING)
! 	do_link (ld1_argv);
  
        if (lto_mode)
          maybe_run_lto_and_relink (ld1_argv, object_lst, object, false);
*************** main (int argc, char **argv)
*** 1793,1801 ****
        maybe_unlink (export_file);
  #endif
        post_ld_pass (/*temp_file*/false);
- 
-       maybe_unlink (c_file);
-       maybe_unlink (o_file);
        return 0;
      }
  
--- 1723,1728 ----
*************** main (int argc, char **argv)
*** 1874,1886 ****
  
    fork_execute ("gcc",  c_argv, at_file_supplied);
  #ifdef COLLECT_EXPORT_LIST
!   /* On AIX we must call tlink because of possible templates resolution.  */
!   do_tlink (ld2_argv, object_lst);
  
    if (lto_mode)
      maybe_run_lto_and_relink (ld2_argv, object_lst, object, false);
  #else
!   /* Otherwise, simply call ld because tlink is already done.  */
    if (lto_mode)
      maybe_run_lto_and_relink (ld2_argv, object_lst, object, true);
    else
--- 1801,1813 ----
  
    fork_execute ("gcc",  c_argv, at_file_supplied);
  #ifdef COLLECT_EXPORT_LIST
!   /* On AIX we must call link because of possible templates resolution.  */
!   do_link (ld2_argv);
  
    if (lto_mode)
      maybe_run_lto_and_relink (ld2_argv, object_lst, object, false);
  #else
!   /* Otherwise, simply call ld because link is already done.  */
    if (lto_mode)
      maybe_run_lto_and_relink (ld2_argv, object_lst, object, true);
    else
*************** main (int argc, char **argv)
*** 1894,1906 ****
    scan_prog_file (output_file, PASS_SECOND, SCAN_ALL);
  #endif
  
-   maybe_unlink (c_file);
-   maybe_unlink (o_file);
- 
- #ifdef COLLECT_EXPORT_LIST
-   maybe_unlink (export_file);
- #endif
- 
    return 0;
  }
  
--- 1821,1826 ----
*************** is_lto_object_file (const char *prog_nam
*** 2389,2395 ****
      return true;
  
    if (errmsg)
!     fatal_error (0, "%s: %s\n", errmsg, xstrerror (err));
    return false;
  }
  
--- 2309,2315 ----
      return true;
  
    if (errmsg)
!     fatal_error (0, "%s: %s", errmsg, xstrerror (err));
    return false;
  }
  
*************** scan_prog_file (const char *prog_name, s
*** 2455,2461 ****
  
    pex = pex_init (PEX_USE_PIPES, "collect2", NULL);
    if (pex == NULL)
!     fatal_error (input_location, "pex_init failed: %m");
  
    errmsg = pex_run (pex, 0, nm_file_name, real_nm_argv, NULL, HOST_BIT_BUCKET,
  		    &err);
--- 2375,2381 ----
  
    pex = pex_init (PEX_USE_PIPES, "collect2", NULL);
    if (pex == NULL)
!     fatal_error (input_location, "%<pex_init%> failed: %m");
  
    errmsg = pex_run (pex, 0, nm_file_name, real_nm_argv, NULL, HOST_BIT_BUCKET,
  		    &err);
*************** scan_prog_file (const char *prog_name, s
*** 2477,2483 ****
  
    inf = pex_read_output (pex, 0);
    if (inf == NULL)
!     fatal_error (input_location, "can%'t open nm output: %m");
  
    if (debug)
      fprintf (stderr, "\nnm output with constructors/destructors.\n");
--- 2397,2403 ----
  
    inf = pex_read_output (pex, 0);
    if (inf == NULL)
!     fatal_error (input_location, "cannot open nm output: %m");
  
    if (debug)
      fprintf (stderr, "\nnm output with constructors/destructors.\n");
*************** scan_libraries (const char *prog_name)
*** 2646,2652 ****
  
    inf = pex_read_output (pex, 0);
    if (inf == NULL)
!     fatal_error (input_location, "can%'t open ldd output: %m");
  
    if (debug)
      notice ("\nldd output with constructors/destructors.\n");
--- 2566,2572 ----
  
    inf = pex_read_output (pex, 0);
    if (inf == NULL)
!     fatal_error (input_location, "cannot open ldd output: %m");
  
    if (debug)
      notice ("\nldd output with constructors/destructors.\n");
*************** scan_prog_file (const char *prog_name, s
*** 2805,2814 ****
    LDFILE *ldptr = NULL;
    int sym_index, sym_count;
    int is_shared = 0;
-   int found_lto = 0;
  
!   if (which_pass != PASS_FIRST && which_pass != PASS_OBJ
!       && which_pass != PASS_LTOINFO)
      return;
  
  #ifdef COLLECT_EXPORT_LIST
--- 2725,2732 ----
    LDFILE *ldptr = NULL;
    int sym_index, sym_count;
    int is_shared = 0;
  
!   if (which_pass != PASS_FIRST && which_pass != PASS_OBJ)
      return;
  
  #ifdef COLLECT_EXPORT_LIST
*************** scan_prog_file (const char *prog_name, s
*** 2821,2827 ****
       eliminate scan_libraries() function.  */
    do
      {
-       found_lto = 0;
  #endif
        /* Some platforms (e.g. OSF4) declare ldopen as taking a
  	 non-const char * filename parameter, even though it will not
--- 2739,2744 ----
*************** scan_prog_file (const char *prog_name, s
*** 2864,2882 ****
  			++name;
  #endif
  
-                       if (which_pass == PASS_LTOINFO)
-                         {
- 			  if (found_lto)
- 			    continue;
- 			  if (strncmp (name, "__gnu_lto_v1", 12) == 0)
- 			    {
- 			      add_lto_object (&lto_objects, prog_name);
- 			      found_lto = 1;
- 			      break;
- 			    }
- 			  continue;
- 			}
- 
  		      switch (is_ctor_dtor (name))
  			{
  #if TARGET_AIX_VERSION
--- 2781,2786 ----
diff -Nrcpad gcc-9.3.0/gcc/collect2.h gcc-10.1.0/gcc/collect2.h
*** gcc-9.3.0/gcc/collect2.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/collect2.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
! /* Header file for collect/tlink routines.
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
! /* Header file for collect routines.
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 20,38 ****
  #ifndef GCC_COLLECT2_H
  #define GCC_COLLECT2_H
  
- extern void do_tlink (char **, char **);
- 
  extern struct pex_obj *collect_execute (const char *, char **, const char *,
  					const char *, int flags);
  
  extern int collect_wait (const char *, struct pex_obj *);
  
- extern void dump_ld_file (const char *, FILE *);
- 
  extern int file_exists (const char *);
  
- extern const char *ldout;
- extern const char *lderrout;
  extern const char *c_file_name;
  extern struct obstack temporary_obstack;
  extern char *temporary_firstobj;
--- 20,32 ----
diff -Nrcpad gcc-9.3.0/gcc/color-macros.h gcc-10.1.0/gcc/color-macros.h
*** gcc-9.3.0/gcc/color-macros.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/color-macros.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Terminal color manipulation macros.
!    Copyright (C) 2005-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Terminal color manipulation macros.
!    Copyright (C) 2005-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/combine-stack-adj.c gcc-10.1.0/gcc/combine-stack-adj.c
*** gcc-9.3.0/gcc/combine-stack-adj.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/combine-stack-adj.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Combine stack adjustments.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Combine stack adjustments.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** single_set_for_csa (rtx_insn *insn)
*** 133,139 ****
  	  && SET_SRC (this_rtx) == SET_DEST (this_rtx))
  	;
        else if (GET_CODE (this_rtx) != CLOBBER
- 	       && GET_CODE (this_rtx) != CLOBBER_HIGH
  	       && GET_CODE (this_rtx) != USE)
  	return NULL_RTX;
      }
--- 133,138 ----
diff -Nrcpad gcc-9.3.0/gcc/combine.c gcc-10.1.0/gcc/combine.c
*** gcc-9.3.0/gcc/combine.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/combine.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Optimize by combining instructions for GNU compiler.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Optimize by combining instructions for GNU compiler.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 100,110 ****
  #include "insn-attr.h"
  #include "rtlhooks-def.h"
  #include "expr.h"
- #include "params.h"
  #include "tree-pass.h"
  #include "valtrack.h"
  #include "rtl-iter.h"
  #include "print-rtl.h"
  
  /* Number of attempts to combine instructions in this function.  */
  
--- 100,110 ----
  #include "insn-attr.h"
  #include "rtlhooks-def.h"
  #include "expr.h"
  #include "tree-pass.h"
  #include "valtrack.h"
  #include "rtl-iter.h"
  #include "print-rtl.h"
+ #include "function-abi.h"
  
  /* Number of attempts to combine instructions in this function.  */
  
*************** find_single_use_1 (rtx dest, rtx *loc)
*** 571,577 ****
      case SYMBOL_REF:
      CASE_CONST_ANY:
      case CLOBBER:
-     case CLOBBER_HIGH:
        return 0;
  
      case SET:
--- 571,576 ----
*************** combine_instructions (rtx_insn *f, unsig
*** 1224,1231 ****
              subst_low_luid = DF_INSN_LUID (insn);
              subst_insn = insn;
  
! 	    note_stores (PATTERN (insn), set_nonzero_bits_and_sign_copies,
! 		         insn);
  	    record_dead_and_set_regs (insn);
  
  	    if (AUTO_INC_DEC)
--- 1223,1229 ----
              subst_low_luid = DF_INSN_LUID (insn);
              subst_insn = insn;
  
! 	    note_stores (insn, set_nonzero_bits_and_sign_copies, insn);
  	    record_dead_and_set_regs (insn);
  
  	    if (AUTO_INC_DEC)
*************** combine_instructions (rtx_insn *f, unsig
*** 1235,1242 ****
  						    insn);
  
  	    /* Record the current insn_cost of this instruction.  */
! 	    if (NONJUMP_INSN_P (insn))
! 	      INSN_COST (insn) = insn_cost (insn, optimize_this_for_speed_p);
  	    if (dump_file)
  	      {
  		fprintf (dump_file, "insn_cost %d for ", INSN_COST (insn));
--- 1233,1239 ----
  						    insn);
  
  	    /* Record the current insn_cost of this instruction.  */
! 	    INSN_COST (insn) = insn_cost (insn, optimize_this_for_speed_p);
  	    if (dump_file)
  	      {
  		fprintf (dump_file, "insn_cost %d for ", INSN_COST (insn));
*************** combine_instructions (rtx_insn *f, unsig
*** 1252,1258 ****
    init_reg_last ();
    setup_incoming_promotions (first);
    last_bb = ENTRY_BLOCK_PTR_FOR_FN (cfun);
!   int max_combine = PARAM_VALUE (PARAM_MAX_COMBINE_INSNS);
  
    FOR_EACH_BB_FN (this_basic_block, cfun)
      {
--- 1249,1255 ----
    init_reg_last ();
    setup_incoming_promotions (first);
    last_bb = ENTRY_BLOCK_PTR_FOR_FN (cfun);
!   int max_combine = param_max_combine_insns;
  
    FOR_EACH_BB_FN (this_basic_block, cfun)
      {
*************** setup_incoming_promotions (rtx_insn *fir
*** 1601,1607 ****
           function lie within the current compilation unit.  (This does
  	 take into account the exporting of a function via taking its
  	 address, and so forth.)  */
!       strictly_local = cgraph_node::local_info (current_function_decl)->local;
  
        /* The mode and signedness of the argument before any promotions happen
           (equal to the mode of the pseudo holding it at that stage).  */
--- 1598,1605 ----
           function lie within the current compilation unit.  (This does
  	 take into account the exporting of a function via taking its
  	 address, and so forth.)  */
!       strictly_local
! 	= cgraph_node::local_info_node (current_function_decl)->local;
  
        /* The mode and signedness of the argument before any promotions happen
           (equal to the mode of the pseudo holding it at that stage).  */
*************** set_nonzero_bits_and_sign_copies (rtx x,
*** 1763,1771 ****
  	  return;
  	}
  
-       /* Should not happen as we only using pseduo registers.  */
-       gcc_assert (GET_CODE (set) != CLOBBER_HIGH);
- 
        /* If this register is being initialized using itself, and the
  	 register is uninitialized in this basic block, and there are
  	 no LOG_LINKS which set the register, then part of the
--- 1761,1766 ----
*************** can_combine_p (rtx_insn *insn, rtx_insn
*** 1924,1930 ****
  
  	      /* We can ignore CLOBBERs.  */
  	    case CLOBBER:
- 	    case CLOBBER_HIGH:
  	      break;
  
  	    case SET:
--- 1919,1924 ----
*************** can_combine_p (rtx_insn *insn, rtx_insn
*** 2116,2122 ****
    is_volatile_p = volatile_refs_p (PATTERN (insn))
      ? volatile_refs_p
      : volatile_insn_p;
!     
    for (p = NEXT_INSN (insn); p != i3; p = NEXT_INSN (p))
      if (INSN_P (p) && p != succ && p != succ2 && is_volatile_p (PATTERN (p)))
        return 0;
--- 2110,2116 ----
    is_volatile_p = volatile_refs_p (PATTERN (insn))
      ? volatile_refs_p
      : volatile_insn_p;
! 
    for (p = NEXT_INSN (insn); p != i3; p = NEXT_INSN (p))
      if (INSN_P (p) && p != succ && p != succ2 && is_volatile_p (PATTERN (p)))
        return 0;
*************** can_combine_p (rtx_insn *insn, rtx_insn
*** 2124,2136 ****
    /* If INSN contains an autoincrement or autodecrement, make sure that
       register is not used between there and I3, and not already used in
       I3 either.  Neither must it be used in PRED or SUCC, if they exist.
!      Also insist that I3 not be a jump; if it were one
!      and the incremented register were spilled, we would lose.  */
  
    if (AUTO_INC_DEC)
      for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
        if (REG_NOTE_KIND (link) == REG_INC
! 	  && (JUMP_P (i3)
  	      || reg_used_between_p (XEXP (link, 0), insn, i3)
  	      || (pred != NULL_RTX
  		  && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (pred)))
--- 2118,2131 ----
    /* If INSN contains an autoincrement or autodecrement, make sure that
       register is not used between there and I3, and not already used in
       I3 either.  Neither must it be used in PRED or SUCC, if they exist.
!      Also insist that I3 not be a jump if using LRA; if it were one
!      and the incremented register were spilled, we would lose.
!      Reload handles this correctly.  */
  
    if (AUTO_INC_DEC)
      for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
        if (REG_NOTE_KIND (link) == REG_INC
! 	  && ((JUMP_P (i3) && targetm.lra_p ())
  	      || reg_used_between_p (XEXP (link, 0), insn, i3)
  	      || (pred != NULL_RTX
  		  && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (pred)))
*************** likely_spilled_retval_p (rtx_insn *insn)
*** 2439,2445 ****
    info.mask = mask;
    for (p = PREV_INSN (use); info.mask && p != insn; p = PREV_INSN (p))
      if (INSN_P (p))
!       note_stores (PATTERN (p), likely_spilled_retval_1, &info);
    mask = info.mask;
  
    /* Check if any of the (probably) live return value registers is
--- 2434,2440 ----
    info.mask = mask;
    for (p = PREV_INSN (use); info.mask && p != insn; p = PREV_INSN (p))
      if (INSN_P (p))
!       note_stores (p, likely_spilled_retval_1, &info);
    mask = info.mask;
  
    /* Check if any of the (probably) live return value registers is
*************** is_parallel_of_n_reg_sets (rtx pat, int
*** 2595,2602 ****
  	if (XEXP (XVECEXP (pat, 0, i), 0) == const0_rtx)
  	  return false;
  	break;
-       case CLOBBER_HIGH:
- 	break;
        default:
  	return false;
        }
--- 2590,2595 ----
*************** try_combine (rtx_insn *i3, rtx_insn *i2,
*** 2897,2904 ****
        for (i = 0; ok && i < XVECLEN (p2, 0); i++)
  	{
  	  if ((GET_CODE (XVECEXP (p2, 0, i)) == SET
! 	       || GET_CODE (XVECEXP (p2, 0, i)) == CLOBBER
! 	       || GET_CODE (XVECEXP (p2, 0, i)) == CLOBBER_HIGH)
  	      && reg_overlap_mentioned_p (SET_DEST (PATTERN (i3)),
  					  SET_DEST (XVECEXP (p2, 0, i))))
  	    ok = false;
--- 2890,2896 ----
        for (i = 0; ok && i < XVECLEN (p2, 0); i++)
  	{
  	  if ((GET_CODE (XVECEXP (p2, 0, i)) == SET
! 	       || GET_CODE (XVECEXP (p2, 0, i)) == CLOBBER)
  	      && reg_overlap_mentioned_p (SET_DEST (PATTERN (i3)),
  					  SET_DEST (XVECEXP (p2, 0, i))))
  	    ok = false;
*************** try_combine (rtx_insn *i3, rtx_insn *i2,
*** 4359,4383 ****
        if (GET_CODE (x) == PARALLEL)
  	x = XVECEXP (newi2pat, 0, 0);
  
!       /* It can only be a SET of a REG or of a SUBREG of a REG.  */
!       unsigned int regno = reg_or_subregno (SET_DEST (x));
! 
!       bool done = false;
!       for (rtx_insn *insn = NEXT_INSN (i3);
! 	   !done
! 	   && insn
! 	   && NONDEBUG_INSN_P (insn)
! 	   && BLOCK_FOR_INSN (insn) == this_basic_block;
! 	   insn = NEXT_INSN (insn))
  	{
! 	  struct insn_link *link;
! 	  FOR_EACH_LOG_LINK (link, insn)
! 	    if (link->insn == i3 && link->regno == regno)
! 	      {
! 		link->insn = i2;
! 		done = true;
! 		break;
! 	      }
  	}
      }
  
--- 4351,4379 ----
        if (GET_CODE (x) == PARALLEL)
  	x = XVECEXP (newi2pat, 0, 0);
  
!       if (REG_P (SET_DEST (x))
! 	  || (GET_CODE (SET_DEST (x)) == SUBREG
! 	      && REG_P (SUBREG_REG (SET_DEST (x)))))
  	{
! 	  unsigned int regno = reg_or_subregno (SET_DEST (x));
! 
! 	  bool done = false;
! 	  for (rtx_insn *insn = NEXT_INSN (i3);
! 	       !done
! 	       && insn
! 	       && NONDEBUG_INSN_P (insn)
! 	       && BLOCK_FOR_INSN (insn) == this_basic_block;
! 	       insn = NEXT_INSN (insn))
! 	    {
! 	      struct insn_link *link;
! 	      FOR_EACH_LOG_LINK (link, insn)
! 		if (link->insn == i3 && link->regno == regno)
! 		  {
! 		    link->insn = i2;
! 		    done = true;
! 		    break;
! 		  }
! 	    }
  	}
      }
  
*************** try_combine (rtx_insn *i3, rtx_insn *i2,
*** 4741,4748 ****
         been made to this insn.  The order is important, because newi2pat
         can affect nonzero_bits of newpat.  */
      if (newi2pat)
!       note_stores (newi2pat, set_nonzero_bits_and_sign_copies, NULL);
!     note_stores (newpat, set_nonzero_bits_and_sign_copies, NULL);
    }
  
    if (undobuf.other_insn != NULL_RTX)
--- 4737,4744 ----
         been made to this insn.  The order is important, because newi2pat
         can affect nonzero_bits of newpat.  */
      if (newi2pat)
!       note_pattern_stores (newi2pat, set_nonzero_bits_and_sign_copies, NULL);
!     note_pattern_stores (newpat, set_nonzero_bits_and_sign_copies, NULL);
    }
  
    if (undobuf.other_insn != NULL_RTX)
*************** subst (rtx x, rtx from, rtx to, int in_d
*** 5687,5692 ****
--- 5683,5689 ----
  		}
  	      else if (CONST_SCALAR_INT_P (new_rtx)
  		       && (GET_CODE (x) == ZERO_EXTEND
+ 			   || GET_CODE (x) == SIGN_EXTEND
  			   || GET_CODE (x) == FLOAT
  			   || GET_CODE (x) == UNSIGNED_FLOAT))
  		{
*************** combine_simplify_rtx (rtx x, machine_mod
*** 5908,5921 ****
  								 mode, VOIDmode,
  								 cond, cop1),
  					mode);
- 	      else
- 		return gen_rtx_IF_THEN_ELSE (mode,
- 					     simplify_gen_relational (cond_code,
- 								      mode,
- 								      VOIDmode,
- 								      cond,
- 								      cop1),
- 					     true_rtx, false_rtx);
  
  	      code = GET_CODE (x);
  	      op0_mode = VOIDmode;
--- 5905,5910 ----
*************** simplify_if_then_else (rtx x)
*** 6599,6605 ****
  	  || reg_mentioned_p (true_rtx, false_rtx)
  	  || rtx_equal_p (false_rtx, XEXP (cond, 0))))
      {
-       true_code = reversed_comparison_code (cond, NULL);
        SUBST (XEXP (x, 0), reversed_comparison (cond, GET_MODE (cond)));
        SUBST (XEXP (x, 1), false_rtx);
        SUBST (XEXP (x, 2), true_rtx);
--- 6588,6593 ----
*************** simplify_if_then_else (rtx x)
*** 6655,6661 ****
  
    /* Look for MIN or MAX.  */
  
!   if ((! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
        && comparison_p
        && rtx_equal_p (XEXP (cond, 0), true_rtx)
        && rtx_equal_p (XEXP (cond, 1), false_rtx)
--- 6643,6652 ----
  
    /* Look for MIN or MAX.  */
  
!   if ((! FLOAT_MODE_P (mode)
!        || (flag_unsafe_math_optimizations
! 	   && !HONOR_NANS (mode)
! 	   && !HONOR_SIGNED_ZEROS (mode)))
        && comparison_p
        && rtx_equal_p (XEXP (cond, 0), true_rtx)
        && rtx_equal_p (XEXP (cond, 1), false_rtx)
*************** make_extraction (machine_mode mode, rtx
*** 7837,7843 ****
       For memory, assume that the desired extraction_mode and pos_mode
       are the same as for a register operation, since at present we don't
       have named patterns for aligned memory structures.  */
!   struct extraction_insn insn;
    unsigned int inner_size;
    if (GET_MODE_BITSIZE (inner_mode).is_constant (&inner_size)
        && get_best_reg_extraction_insn (&insn, pattern, inner_size, mode))
--- 7828,7834 ----
       For memory, assume that the desired extraction_mode and pos_mode
       are the same as for a register operation, since at present we don't
       have named patterns for aligned memory structures.  */
!   class extraction_insn insn;
    unsigned int inner_size;
    if (GET_MODE_BITSIZE (inner_mode).is_constant (&inner_size)
        && get_best_reg_extraction_insn (&insn, pattern, inner_size, mode))
*************** gen_lowpart_for_combine (machine_mode om
*** 11827,11833 ****
  
    /* If X is a comparison operator, rewrite it in a new mode.  This
       probably won't match, but may allow further simplifications.  */
!   else if (COMPARISON_P (x))
      return gen_rtx_fmt_ee (GET_CODE (x), omode, XEXP (x, 0), XEXP (x, 1));
  
    /* If we couldn't simplify X any other way, just enclose it in a
--- 11818,11826 ----
  
    /* If X is a comparison operator, rewrite it in a new mode.  This
       probably won't match, but may allow further simplifications.  */
!   else if (COMPARISON_P (x)
! 	   && SCALAR_INT_MODE_P (imode)
! 	   && SCALAR_INT_MODE_P (omode))
      return gen_rtx_fmt_ee (GET_CODE (x), omode, XEXP (x, 0), XEXP (x, 1));
  
    /* If we couldn't simplify X any other way, just enclose it in a
*************** record_value_for_reg (rtx reg, rtx_insn
*** 13297,13303 ****
  	    {
  	      /* If there are two or more occurrences of REG in VALUE,
  		 prevent the value from growing too much.  */
! 	      if (count_rtxs (tem) > MAX_LAST_VALUE_RTL)
  		tem = gen_rtx_CLOBBER (GET_MODE (tem), const0_rtx);
  	    }
  
--- 13290,13296 ----
  	    {
  	      /* If there are two or more occurrences of REG in VALUE,
  		 prevent the value from growing too much.  */
! 	      if (count_rtxs (tem) > param_max_last_value_rtl)
  		tem = gen_rtx_CLOBBER (GET_MODE (tem), const0_rtx);
  	    }
  
*************** record_dead_and_set_regs_1 (rtx dest, co
*** 13418,13432 ****
  			      ? SET_SRC (setter)
  			      : gen_lowpart (GET_MODE (dest),
  					     SET_SRC (setter)));
-       else if (GET_CODE (setter) == CLOBBER_HIGH)
- 	{
- 	  reg_stat_type *rsp = &reg_stat[REGNO (dest)];
- 	  if (rsp->last_set_value
- 	      && reg_is_clobbered_by_clobber_high
- 		   (REGNO (dest), GET_MODE (rsp->last_set_value),
- 		    XEXP (setter, 0)))
- 	    record_value_for_reg (dest, NULL, NULL_RTX);
- 	}
        else
  	record_value_for_reg (dest, record_dead_insn, NULL_RTX);
      }
--- 13411,13416 ----
*************** record_dead_and_set_regs (rtx_insn *insn
*** 13474,13484 ****
  
    if (CALL_P (insn))
      {
        hard_reg_set_iterator hrsi;
!       EXECUTE_IF_SET_IN_HARD_REG_SET (regs_invalidated_by_call, 0, i, hrsi)
  	{
  	  reg_stat_type *rsp;
  
  	  rsp = &reg_stat[i];
  	  rsp->last_set_invalid = 1;
  	  rsp->last_set = insn;
--- 13458,13478 ----
  
    if (CALL_P (insn))
      {
+       HARD_REG_SET callee_clobbers
+ 	= insn_callee_abi (insn).full_and_partial_reg_clobbers ();
        hard_reg_set_iterator hrsi;
!       EXECUTE_IF_SET_IN_HARD_REG_SET (callee_clobbers, 0, i, hrsi)
  	{
  	  reg_stat_type *rsp;
  
+ 	  /* ??? We could try to preserve some information from the last
+ 	     set of register I if the call doesn't actually clobber
+ 	     (reg:last_set_mode I), which might be true for ABIs with
+ 	     partial clobbers.  However, it would be difficult to
+ 	     update last_set_nonzero_bits and last_sign_bit_copies
+ 	     to account for the part of I that actually was clobbered.
+ 	     It wouldn't help much anyway, since we rarely see this
+ 	     situation before RA.  */
  	  rsp = &reg_stat[i];
  	  rsp->last_set_invalid = 1;
  	  rsp->last_set = insn;
*************** record_dead_and_set_regs (rtx_insn *insn
*** 13496,13505 ****
  	 the return value register is set at this LUID.  We could
  	 still replace a register with the return value from the
  	 wrong subroutine call!  */
!       note_stores (PATTERN (insn), record_dead_and_set_regs_1, NULL_RTX);
      }
    else
!     note_stores (PATTERN (insn), record_dead_and_set_regs_1, insn);
  }
  
  /* If a SUBREG has the promoted bit set, it is in fact a property of the
--- 13490,13499 ----
  	 the return value register is set at this LUID.  We could
  	 still replace a register with the return value from the
  	 wrong subroutine call!  */
!       note_stores (insn, record_dead_and_set_regs_1, NULL_RTX);
      }
    else
!     note_stores (insn, record_dead_and_set_regs_1, insn);
  }
  
  /* If a SUBREG has the promoted bit set, it is in fact a property of the
*************** reg_dead_at_p_1 (rtx dest, const_rtx x,
*** 13862,13871 ****
    if (!REG_P (dest))
      return;
  
-   if (GET_CODE (x) == CLOBBER_HIGH
-       && !reg_is_clobbered_by_clobber_high (reg_dead_reg, XEXP (x, 0)))
-     return;
- 
    regno = REGNO (dest);
    endregno = END_REGNO (dest);
    if (reg_dead_endregno > regno && reg_dead_regno < endregno)
--- 13856,13861 ----
*************** reg_dead_at_p (rtx reg, rtx_insn *insn)
*** 13913,13919 ****
  	  if (find_regno_note (insn, REG_UNUSED, reg_dead_regno))
  	    return 1;
  
! 	  note_stores (PATTERN (insn), reg_dead_at_p_1, NULL);
  	  if (reg_dead_flag)
  	    return reg_dead_flag == 1 ? 1 : 0;
  
--- 13903,13909 ----
  	  if (find_regno_note (insn, REG_UNUSED, reg_dead_regno))
  	    return 1;
  
! 	  note_stores (insn, reg_dead_at_p_1, NULL);
  	  if (reg_dead_flag)
  	    return reg_dead_flag == 1 ? 1 : 0;
  
diff -Nrcpad gcc-9.3.0/gcc/common/common-target-def.h gcc-10.1.0/gcc/common/common-target-def.h
*** gcc-9.3.0/gcc/common/common-target-def.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/common-target-def.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Default initializers for common target hooks.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
     This program is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
--- 1,5 ----
  /* Default initializers for common target hooks.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
     This program is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
diff -Nrcpad gcc-9.3.0/gcc/common/common-target.def gcc-10.1.0/gcc/common/common-target.def
*** gcc-9.3.0/gcc/common/common-target.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/common-target.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target hook definitions for common hooks.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
     This program is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
--- 1,5 ----
  /* Target hook definitions for common hooks.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
     This program is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
*************** DEFHOOKPOD
*** 49,68 ****
   "",
   const struct default_options *, empty_optimization_table)
  
- DEFHOOK
- (option_default_params,
- "Set target-dependent default values for @option{--param} settings, using\
-  calls to @code{set_default_param_value}.",
-  void, (void),
-  hook_void_void)
- 
- DEFHOOK
- (option_validate_param,
- "Validate target-dependent value for @option{--param} settings, using\
-  calls to @code{set_param_value}.",
-  bool, (int, int),
-  default_option_validate_param)
- 
  /* The initial value of target_flags.  */
  DEFHOOKPOD
  (default_target_flags,
--- 49,54 ----
diff -Nrcpad gcc-9.3.0/gcc/common/common-target.h gcc-10.1.0/gcc/common/common-target.h
*** gcc-9.3.0/gcc/common/common-target.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/common-target.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Data structure definitions for common hooks.
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
  
     This program is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
--- 1,5 ----
  /* Data structure definitions for common hooks.
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
  
     This program is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
diff -Nrcpad gcc-9.3.0/gcc/common/common-targhooks.c gcc-10.1.0/gcc/common/common-targhooks.c
*** gcc-9.3.0/gcc/common/common-targhooks.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/common-targhooks.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Default common target hook functions.
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Default common target hook functions.
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** default_get_valid_option_values (int, co
*** 86,100 ****
    return vec<const char *> ();
  }
  
- /* Default version of TARGET_OPTION_VALIDATE_PARAM.  */
- 
- bool
- default_option_validate_param (const int value ATTRIBUTE_UNUSED,
- 			       const int param ATTRIBUTE_UNUSED)
- {
-   return true;
- }
- 
  const struct default_options empty_optimization_table[] =
    {
      { OPT_LEVELS_NONE, 0, NULL, 0 }
--- 86,91 ----
diff -Nrcpad gcc-9.3.0/gcc/common/common-targhooks.h gcc-10.1.0/gcc/common/common-targhooks.h
*** gcc-9.3.0/gcc/common/common-targhooks.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/common-targhooks.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Default common target hook functions.
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Default common target hook functions.
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** extern bool default_target_handle_option
*** 30,37 ****
  					  location_t);
  extern vec<const char *> default_get_valid_option_values (int, const char *);
  
- extern bool default_option_validate_param (const int, const int);
- 
  extern const struct default_options empty_optimization_table[];
  
  #endif
--- 30,35 ----
diff -Nrcpad gcc-9.3.0/gcc/common/config/aarch64/aarch64-common.c gcc-10.1.0/gcc/common/config/aarch64/aarch64-common.c
*** gcc-9.3.0/gcc/common/config/aarch64/aarch64-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/aarch64/aarch64-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for AArch64.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Common hooks for AArch64.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 30,36 ****
  #include "opts.h"
  #include "flags.h"
  #include "diagnostic.h"
- #include "params.h"
  
  #ifdef  TARGET_BIG_ENDIAN_DEFAULT
  #undef  TARGET_DEFAULT_TARGET_FLAGS
--- 30,35 ----
***************
*** 42,51 ****
  
  #undef	TARGET_OPTION_OPTIMIZATION_TABLE
  #define TARGET_OPTION_OPTIMIZATION_TABLE aarch_option_optimization_table
- #undef TARGET_OPTION_DEFAULT_PARAMS
- #define TARGET_OPTION_DEFAULT_PARAMS aarch64_option_default_params
- #undef TARGET_OPTION_VALIDATE_PARAM
- #define TARGET_OPTION_VALIDATE_PARAM aarch64_option_validate_param
  #undef TARGET_OPTION_INIT_STRUCT
  #define TARGET_OPTION_INIT_STRUCT aarch64_option_init_struct
  
--- 41,46 ----
*************** static const struct default_options aarc
*** 64,115 ****
      { OPT_LEVELS_ALL, OPT_fasynchronous_unwind_tables, NULL, 1 },
      { OPT_LEVELS_ALL, OPT_funwind_tables, NULL, 1},
  #endif
      { OPT_LEVELS_NONE, 0, NULL, 0 }
    };
  
- /* Implement target validation TARGET_OPTION_DEFAULT_PARAM.  */
- 
- static bool
- aarch64_option_validate_param (const int value, const int param)
- {
-   /* Check that both parameters are the same.  */
-   if (param == (int) PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE)
-     {
-       if (value != 12 && value != 16)
- 	{
- 	  error ("only values 12 (4 KB) and 16 (64 KB) are supported for guard "
- 		 "size.  Given value %d (%llu KB) is out of range",
- 		 value, (1ULL << value) / 1024ULL);
- 	  return false;
- 	}
-     }
- 
-   return true;
- }
- 
- /* Implement TARGET_OPTION_DEFAULT_PARAMS.  */
- 
- static void
- aarch64_option_default_params (void)
- {
-   /* We assume the guard page is 64k.  */
-   int index = (int) PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE;
-   set_default_param_value (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE,
- 			   DEFAULT_STK_CLASH_GUARD_SIZE == 0
- 			     ? 16 : DEFAULT_STK_CLASH_GUARD_SIZE);
- 
-   int guard_size
-     = default_param_value (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE);
- 
-   /* Set the interval parameter to be the same as the guard size.  This way the
-      mid-end code does the right thing for us.  */
-   set_default_param_value (PARAM_STACK_CLASH_PROTECTION_PROBE_INTERVAL,
- 			   guard_size);
- 
-   /* Validate the options.  */
-   aarch64_option_validate_param (guard_size, index);
- }
- 
  /* Implement TARGET_HANDLE_OPTION.
     This function handles the target specific options for CPU/target selection.
  
--- 59,70 ----
      { OPT_LEVELS_ALL, OPT_fasynchronous_unwind_tables, NULL, 1 },
      { OPT_LEVELS_ALL, OPT_funwind_tables, NULL, 1},
  #endif
+     { OPT_LEVELS_ALL, OPT__param_stack_clash_protection_guard_size_, NULL,
+       DEFAULT_STK_CLASH_GUARD_SIZE == 0 ? 16 : DEFAULT_STK_CLASH_GUARD_SIZE },
+ 
      { OPT_LEVELS_NONE, 0, NULL, 0 }
    };
  
  /* Implement TARGET_HANDLE_OPTION.
     This function handles the target specific options for CPU/target selection.
  
*************** aarch64_handle_option (struct gcc_option
*** 170,178 ****
  struct aarch64_option_extension
  {
    const char *const name;
!   const unsigned long flag_canonical;
!   const unsigned long flags_on;
!   const unsigned long flags_off;
    const bool is_synthetic;
  };
  
--- 125,133 ----
  struct aarch64_option_extension
  {
    const char *const name;
!   const uint64_t flag_canonical;
!   const uint64_t flags_on;
!   const uint64_t flags_off;
    const bool is_synthetic;
  };
  
*************** struct processor_name_to_arch
*** 201,214 ****
  {
    const std::string processor_name;
    const enum aarch64_arch arch;
!   const unsigned long flags;
  };
  
  struct arch_to_arch_name
  {
    const enum aarch64_arch arch;
    const std::string arch_name;
!   const unsigned long flags;
  };
  
  /* Map processor names to the architecture revision they implement and
--- 156,169 ----
  {
    const std::string processor_name;
    const enum aarch64_arch arch;
!   const uint64_t flags;
  };
  
  struct arch_to_arch_name
  {
    const enum aarch64_arch arch;
    const std::string arch_name;
!   const uint64_t flags;
  };
  
  /* Map processor names to the architecture revision they implement and
*************** static const struct arch_to_arch_name al
*** 238,244 ****
     a copy of the string is created and stored to INVALID_EXTENSION.  */
  
  enum aarch64_parse_opt_result
! aarch64_parse_extension (const char *str, unsigned long *isa_flags,
  			 std::string *invalid_extension)
  {
    /* The extension string is parsed left to right.  */
--- 193,199 ----
     a copy of the string is created and stored to INVALID_EXTENSION.  */
  
  enum aarch64_parse_opt_result
! aarch64_parse_extension (const char *str, uint64_t *isa_flags,
  			 std::string *invalid_extension)
  {
    /* The extension string is parsed left to right.  */
*************** int opt_ext_cmp (const void* a, const vo
*** 326,343 ****
       turns on as a dependency.  As an example +dotprod turns on FL_DOTPROD and
       FL_SIMD.  As such the set of bits represented by this option is
       {FL_DOTPROD, FL_SIMD}. */
!   unsigned long total_flags_a = opt_a->flag_canonical & opt_a->flags_on;
!   unsigned long total_flags_b = opt_b->flag_canonical & opt_b->flags_on;
    int popcnt_a = popcount_hwi ((HOST_WIDE_INT)total_flags_a);
    int popcnt_b = popcount_hwi ((HOST_WIDE_INT)total_flags_b);
    int order = popcnt_b - popcnt_a;
  
    /* If they have the same amount of bits set, give it a more
       deterministic ordering by using the value of the bits themselves.  */
!   if (order == 0)
!     return total_flags_b - total_flags_a;
  
!   return order;
  }
  
  /* Implement TARGET_OPTION_INIT_STRUCT.  */
--- 281,301 ----
       turns on as a dependency.  As an example +dotprod turns on FL_DOTPROD and
       FL_SIMD.  As such the set of bits represented by this option is
       {FL_DOTPROD, FL_SIMD}. */
!   uint64_t total_flags_a = opt_a->flag_canonical & opt_a->flags_on;
!   uint64_t total_flags_b = opt_b->flag_canonical & opt_b->flags_on;
    int popcnt_a = popcount_hwi ((HOST_WIDE_INT)total_flags_a);
    int popcnt_b = popcount_hwi ((HOST_WIDE_INT)total_flags_b);
    int order = popcnt_b - popcnt_a;
  
    /* If they have the same amount of bits set, give it a more
       deterministic ordering by using the value of the bits themselves.  */
!   if (order != 0)
!     return order;
  
!   if (total_flags_a != total_flags_b)
!     return total_flags_a < total_flags_b ? 1 : -1;
! 
!   return 0;
  }
  
  /* Implement TARGET_OPTION_INIT_STRUCT.  */
*************** aarch64_option_init_struct (struct gcc_o
*** 373,381 ****
  */
  
  static bool
! aarch64_contains_opt (unsigned long isa_flag_bits, opt_ext *opt)
  {
!   unsigned long flags_check
      = opt->is_synthetic ? opt->flags_on : opt->flag_canonical;
  
    return (isa_flag_bits & flags_check) == flags_check;
--- 331,339 ----
  */
  
  static bool
! aarch64_contains_opt (uint64_t isa_flag_bits, opt_ext *opt)
  {
!   uint64_t flags_check
      = opt->is_synthetic ? opt->flags_on : opt->flag_canonical;
  
    return (isa_flag_bits & flags_check) == flags_check;
*************** aarch64_contains_opt (unsigned long isa_
*** 388,400 ****
     that all the "+" flags come before the "+no" flags.  */
  
  std::string
! aarch64_get_extension_string_for_isa_flags (unsigned long isa_flags,
! 					    unsigned long default_arch_flags)
  {
    const struct aarch64_option_extension *opt = NULL;
    std::string outstr = "";
  
!   unsigned long isa_flag_bits = isa_flags;
  
    /* Pass one: Minimize the search space by reducing the set of options
       to the smallest set that still turns on the same features as before in
--- 346,358 ----
     that all the "+" flags come before the "+no" flags.  */
  
  std::string
! aarch64_get_extension_string_for_isa_flags (uint64_t isa_flags,
! 					    uint64_t default_arch_flags)
  {
    const struct aarch64_option_extension *opt = NULL;
    std::string outstr = "";
  
!   uint64_t isa_flag_bits = isa_flags;
  
    /* Pass one: Minimize the search space by reducing the set of options
       to the smallest set that still turns on the same features as before in
*************** aarch64_get_extension_string_for_isa_fla
*** 433,439 ****
  	/* We remove all the dependent bits, to prevent them from being turned
  	   on twice.  This only works because we assume that all there are
  	   individual options to set all bits standalone.  */
! 	isa_flag_bits &= ~opt->flags_on;
  	isa_flag_bits |= opt->flag_canonical;
        }
      }
--- 391,412 ----
  	/* We remove all the dependent bits, to prevent them from being turned
  	   on twice.  This only works because we assume that all there are
  	   individual options to set all bits standalone.  */
! 
! 	/* PR target/94396.
! 
! 	   For flags which would already imply a bit that's on by default (e.g
! 	   fp16fml which implies +fp,+fp16) we must emit the flags that are not
! 	   on by default.  i.e. in Armv8.4-a +fp16fml is default if +fp16.  So
! 	   if a user passes armv8.4-a+fp16 (or +fp16fml) then we need to emit
! 	   +fp16.  But if +fp16fml is used in an architecture where it is
! 	   completely optional we only have to emit the canonical flag.  */
! 	uint64_t toggle_bits = opt->flags_on & default_arch_flags;
! 	/* Now check to see if the canonical flag is on by default.  If it
! 	   is not then enabling it will enable all bits in flags_on.  */
! 	if ((opt->flag_canonical & default_arch_flags) == 0)
! 	  toggle_bits = opt->flags_on;
! 
! 	isa_flag_bits &= ~toggle_bits;
  	isa_flag_bits |= opt->flag_canonical;
        }
      }
*************** aarch64_rewrite_selected_cpu (const char
*** 538,544 ****
        || a_to_an->arch == aarch64_no_arch)
      fatal_error (input_location, "unknown value %qs for %<-mcpu%>", name);
  
!   unsigned long extensions = p_to_a->flags;
    aarch64_parse_extension (extension_str.c_str (), &extensions, NULL);
  
    std::string outstr = a_to_an->arch_name
--- 511,517 ----
        || a_to_an->arch == aarch64_no_arch)
      fatal_error (input_location, "unknown value %qs for %<-mcpu%>", name);
  
!   uint64_t extensions = p_to_a->flags;
    aarch64_parse_extension (extension_str.c_str (), &extensions, NULL);
  
    std::string outstr = a_to_an->arch_name
diff -Nrcpad gcc-9.3.0/gcc/common/config/alpha/alpha-common.c gcc-10.1.0/gcc/common/config/alpha/alpha-common.c
*** gcc-9.3.0/gcc/common/config/alpha/alpha-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/alpha/alpha-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for DEC Alpha.
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for DEC Alpha.
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/arc/arc-common.c gcc-10.1.0/gcc/common/config/arc/arc-common.c
*** gcc-9.3.0/gcc/common/config/arc/arc-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/arc/arc-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Synopsys DesignWare ARC
!    Copyright (C) 1994-2019 Free Software Foundation, Inc.
     Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
  		on behalf of Synopsys Inc.
  		Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com>
--- 1,5 ----
  /* Common hooks for Synopsys DesignWare ARC
!    Copyright (C) 1994-2020 Free Software Foundation, Inc.
     Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
  		on behalf of Synopsys Inc.
  		Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com>
*************** static const struct default_options arc_
*** 56,65 ****
      { OPT_LEVELS_SIZE, OPT_fbranch_count_reg, NULL, 0},
      { OPT_LEVELS_SIZE, OPT_fdelayed_branch, NULL, 0 },
      { OPT_LEVELS_SIZE, OPT_fsection_anchors, NULL, 1 },
-     { OPT_LEVELS_SIZE, OPT_mq_class, NULL, 1 },
      { OPT_LEVELS_SIZE, OPT_mcase_vector_pcrel, NULL, 1 },
      { OPT_LEVELS_SIZE, OPT_msize_level_, NULL, 3 },
      { OPT_LEVELS_SIZE, OPT_mmillicode, NULL, 1 },
      { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
      { OPT_LEVELS_3_PLUS_SPEED_ONLY, OPT_msize_level_, NULL, 0 },
      { OPT_LEVELS_3_PLUS_SPEED_ONLY, OPT_malign_call, NULL, 1 },
--- 56,65 ----
      { OPT_LEVELS_SIZE, OPT_fbranch_count_reg, NULL, 0},
      { OPT_LEVELS_SIZE, OPT_fdelayed_branch, NULL, 0 },
      { OPT_LEVELS_SIZE, OPT_fsection_anchors, NULL, 1 },
      { OPT_LEVELS_SIZE, OPT_mcase_vector_pcrel, NULL, 1 },
      { OPT_LEVELS_SIZE, OPT_msize_level_, NULL, 3 },
      { OPT_LEVELS_SIZE, OPT_mmillicode, NULL, 1 },
+     { OPT_LEVELS_SIZE, OPT_fif_conversion, NULL, 0 },
      { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
      { OPT_LEVELS_3_PLUS_SPEED_ONLY, OPT_msize_level_, NULL, 0 },
      { OPT_LEVELS_3_PLUS_SPEED_ONLY, OPT_malign_call, NULL, 1 },
diff -Nrcpad gcc-9.3.0/gcc/common/config/arm/arm-common.c gcc-10.1.0/gcc/common/config/arm/arm-common.c
*** gcc-9.3.0/gcc/common/config/arm/arm-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/arm/arm-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for ARM.
!    Copyright (C) 1991-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for ARM.
!    Copyright (C) 1991-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** arm_asm_auto_mfpu (int argc, const char
*** 1009,1015 ****
  	    }
  	}
  
!       gcc_assert (i != TARGET_FPU_auto);
      }
  
    auto_fpu = (char *) xmalloc (strlen (fpuname) + sizeof ("-mfpu="));
--- 1009,1016 ----
  	    }
  	}
  
!       gcc_assert (i != TARGET_FPU_auto
! 		  || bitmap_bit_p (target_isa, isa_bit_vfp_base));
      }
  
    auto_fpu = (char *) xmalloc (strlen (fpuname) + sizeof ("-mfpu="));
diff -Nrcpad gcc-9.3.0/gcc/common/config/avr/avr-common.c gcc-10.1.0/gcc/common/config/avr/avr-common.c
*** gcc-9.3.0/gcc/common/config/avr/avr-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/avr/avr-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for ATMEL AVR.
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for ATMEL AVR.
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
***************
*** 23,28 ****
--- 23,30 ----
  #include "tm.h"
  #include "common/common-target.h"
  #include "common/common-target-def.h"
+ #include "opts.h"
+ #include "diagnostic.h"
  
  /* Implement TARGET_OPTION_OPTIMIZATION_TABLE.  */
  static const struct default_options avr_option_optimization_table[] =
*************** static const struct default_options avr_
*** 38,46 ****
--- 40,148 ----
      { OPT_LEVELS_ALL, OPT_fcaller_saves, NULL, 0 },
      { OPT_LEVELS_1_PLUS_NOT_DEBUG, OPT_mgas_isr_prologues, NULL, 1 },
      { OPT_LEVELS_1_PLUS, OPT_mmain_is_OS_task, NULL, 1 },
+     // Stick to the "old" placement of the subreg lowering pass.
+     { OPT_LEVELS_1_PLUS, OPT_fsplit_wide_types_early, NULL, 1 },
+     /* Allow optimizer to introduce store data races. This used to be the
+        default -- it was changed because bigger targets did not see any
+        performance decrease. For the AVR though, disallowing data races
+        introduces additional code in LIM and increases reg pressure.  */
+     { OPT_LEVELS_ALL, OPT_fallow_store_data_races, NULL, 1 },
+ 
+ #if defined (WITH_DOUBLE64)
+     { OPT_LEVELS_ALL, OPT_mdouble_, NULL, 64 },
+ #elif defined (WITH_DOUBLE32)
+     { OPT_LEVELS_ALL, OPT_mdouble_, NULL, 32 },
+ #else
+ #error "align this with config.gcc"
+ #endif
+ 
+ #if defined (WITH_LONG_DOUBLE64)
+     { OPT_LEVELS_ALL, OPT_mlong_double_, NULL, 64 },
+ #elif defined (WITH_LONG_DOUBLE32)
+     { OPT_LEVELS_ALL, OPT_mlong_double_, NULL, 32 },
+ #else
+ #error "align this with config.gcc"
+ #endif
+ 
      { OPT_LEVELS_NONE, 0, NULL, 0 }
    };
  
+ 
+ /* Implement `TARGET_HANDLE_OPTION'.  */
+ 
+ /* This is the same logic that driver-avr.c:avr_double_lib() applies
+    during DRIVER_SELF_SPECS, but this time we complain about -mdouble=
+    and -mlong-double= that are not provided by --with-double= resp.
+    --with-long-double=  */
+ 
+ static bool
+ avr_handle_option (struct gcc_options *opts, struct gcc_options*,
+                    const struct cl_decoded_option *decoded, location_t loc)
+ {
+   int value = decoded->value;
+ 
+   switch (decoded->opt_index)
+     {
+     case OPT_mdouble_:
+       if (value == 64)
+         {
+ #if !defined (HAVE_DOUBLE64)
+           error_at (loc, "option %<-mdouble=64%> is only available if "
+                     "configured %<--with-double={64|64,32|32,64}%>");
+ #endif
+           opts->x_avr_long_double = 64;
+         }
+       else if (value == 32)
+         {
+ #if !defined (HAVE_DOUBLE32)
+           error_at (loc, "option %<-mdouble=32%> is only available if "
+                     "configured %<--with-double={32|32,64|64,32}%>");
+ #endif
+         }
+       else
+         gcc_unreachable();
+ 
+ #if defined (HAVE_LONG_DOUBLE_IS_DOUBLE)
+       opts->x_avr_long_double = value;
+ #endif
+       break; // -mdouble=
+ 
+     case OPT_mlong_double_:
+       if (value == 64)
+         {
+ #if !defined (HAVE_LONG_DOUBLE64)
+           error_at (loc, "option %<-mlong-double=64%> is only available if "
+                     "configured %<--with-long-double={64|64,32|32,64}%>, "
+                     "or %<--with-long-double=double%> together with "
+                     "%<--with-double={64|64,32|32,64}%>");
+ #endif
+         }
+       else if (value == 32)
+         {
+ #if !defined (HAVE_LONG_DOUBLE32)
+           error_at (loc, "option %<-mlong-double=32%> is only available if "
+                     "configured %<--with-long-double={32|32,64|64,32}%>, "
+                     "or %<--with-long-double=double%> together with "
+                     "%<--with-double={32|32,64|64,32}%>");
+ #endif
+           opts->x_avr_double = 32;
+         }
+       else
+         gcc_unreachable();
+ 
+ #if defined (HAVE_LONG_DOUBLE_IS_DOUBLE)
+       opts->x_avr_double = value;
+ #endif
+       break; // -mlong-double=
+     }
+ 
+   return true;
+ }
+ 
+ 
+ #undef TARGET_HANDLE_OPTION
+ #define TARGET_HANDLE_OPTION avr_handle_option
+ 
  #undef TARGET_OPTION_OPTIMIZATION_TABLE
  #define TARGET_OPTION_OPTIMIZATION_TABLE avr_option_optimization_table
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/bfin/bfin-common.c gcc-10.1.0/gcc/common/config/bfin/bfin-common.c
*** gcc-9.3.0/gcc/common/config/bfin/bfin-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/bfin/bfin-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Blackfin.
!    Copyright (C) 2005-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Blackfin.
!    Copyright (C) 2005-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/bpf/bpf-common.c gcc-10.1.0/gcc/common/config/bpf/bpf-common.c
*** gcc-9.3.0/gcc/common/config/bpf/bpf-common.c	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/common/config/bpf/bpf-common.c	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,42 ----
+ /* Common hooks for eBPF.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tm.h"
+ #include "common/common-target.h"
+ #include "common/common-target-def.h"
+ #include "config/bpf/bpf-protos.h"
+ 
+ #undef TARGET_DEFAULT_TARGET_FLAGS
+ #define TARGET_DEFAULT_TARGET_FLAGS 0
+ 
+ /* Implement TARGET_OPTION_OPTIMIZATION_TABLE.  */
+ static const struct default_options bpf_option_optimization_table[] =
+   {
+     /* Enable -funroll-all-loops by default.  */
+     { OPT_LEVELS_ALL, OPT_funroll_all_loops, NULL, 1 },
+     { OPT_LEVELS_NONE, 0, NULL, 0 }
+   };
+ 
+ #undef TARGET_OPTION_OPTIMIZATION_TABLE
+ #define TARGET_OPTION_OPTIMIZATION_TABLE bpf_option_optimization_table
+ 
+ struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
diff -Nrcpad gcc-9.3.0/gcc/common/config/c6x/c6x-common.c gcc-10.1.0/gcc/common/config/c6x/c6x-common.c
*** gcc-9.3.0/gcc/common/config/c6x/c6x-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/c6x/c6x-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* TI C6X common hooks.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* TI C6X common hooks.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/cr16/cr16-common.c gcc-10.1.0/gcc/common/config/cr16/cr16-common.c
*** gcc-9.3.0/gcc/common/config/cr16/cr16-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/cr16/cr16-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for CR16.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for CR16.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/cris/cris-common.c gcc-10.1.0/gcc/common/config/cris/cris-common.c
*** gcc-9.3.0/gcc/common/config/cris/cris-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/cris/cris-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for CRIS.
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for CRIS.
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/csky/csky-common.c gcc-10.1.0/gcc/common/config/csky/csky-common.c
*** gcc-9.3.0/gcc/common/config/csky/csky-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/csky/csky-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for CSKY.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
--- 1,5 ----
  /* Common hooks for CSKY.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/common/config/default-common.c gcc-10.1.0/gcc/common/config/default-common.c
*** gcc-9.3.0/gcc/common/config/default-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/default-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Default common target hooks initializer.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Default common target hooks initializer.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/epiphany/epiphany-common.c gcc-10.1.0/gcc/common/config/epiphany/epiphany-common.c
*** gcc-9.3.0/gcc/common/config/epiphany/epiphany-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/epiphany/epiphany-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Adapteva Epiphany
!    Copyright (C) 1994-2019 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Common hooks for Adapteva Epiphany
!    Copyright (C) 1994-2020 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/common/config/fr30/fr30-common.c gcc-10.1.0/gcc/common/config/fr30/fr30-common.c
*** gcc-9.3.0/gcc/common/config/fr30/fr30-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/fr30/fr30-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for FR30.
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for FR30.
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/frv/frv-common.c gcc-10.1.0/gcc/common/config/frv/frv-common.c
*** gcc-9.3.0/gcc/common/config/frv/frv-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/frv/frv-common.c	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 1997-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 1997-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/gcn/gcn-common.c gcc-10.1.0/gcc/common/config/gcn/gcn-common.c
*** gcc-9.3.0/gcc/common/config/gcn/gcn-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/gcn/gcn-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for GCN
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
--- 1,5 ----
  /* Common hooks for GCN
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
***************
*** 23,29 ****
  #include "common/common-target-def.h"
  #include "opts.h"
  #include "flags.h"
- #include "params.h"
  
  /* Set default optimization options.  */
  static const struct default_options gcn_option_optimization_table[] =
--- 23,28 ----
*************** static const struct default_options gcn_
*** 35,38 ****
--- 34,46 ----
  #undef  TARGET_OPTION_OPTIMIZATION_TABLE
  #define TARGET_OPTION_OPTIMIZATION_TABLE gcn_option_optimization_table
  
+ static enum unwind_info_type
+ gcn_except_unwind_info (struct gcc_options *opts ATTRIBUTE_UNUSED)
+ {
+   return UI_NONE;
+ }
+ 
+ #undef  TARGET_EXCEPT_UNWIND_INFO
+ #define TARGET_EXCEPT_UNWIND_INFO gcn_except_unwind_info
+ 
  struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
diff -Nrcpad gcc-9.3.0/gcc/common/config/h8300/h8300-common.c gcc-10.1.0/gcc/common/config/h8300/h8300-common.c
*** gcc-9.3.0/gcc/common/config/h8300/h8300-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/h8300/h8300-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Renesas H8/300.
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Renesas H8/300.
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/i386/i386-common.c gcc-10.1.0/gcc/common/config/i386/i386-common.c
*** gcc-9.3.0/gcc/common/config/i386/i386-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/i386/i386-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* IA-32 common hooks.
!    Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* IA-32 common hooks.
!    Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 78,85 ****
    (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512F_SET)
  #define OPTION_MASK_ISA_AVX512VBMI_SET \
    (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512BW_SET)
! #define OPTION_MASK_ISA_AVX5124FMAPS_SET OPTION_MASK_ISA_AVX5124FMAPS
! #define OPTION_MASK_ISA_AVX5124VNNIW_SET OPTION_MASK_ISA_AVX5124VNNIW
  #define OPTION_MASK_ISA_AVX512VBMI2_SET \
    (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512F_SET)
  #define OPTION_MASK_ISA_AVX512VNNI_SET \
--- 78,85 ----
    (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512F_SET)
  #define OPTION_MASK_ISA_AVX512VBMI_SET \
    (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512BW_SET)
! #define OPTION_MASK_ISA2_AVX5124FMAPS_SET OPTION_MASK_ISA2_AVX5124FMAPS
! #define OPTION_MASK_ISA2_AVX5124VNNIW_SET OPTION_MASK_ISA2_AVX5124VNNIW
  #define OPTION_MASK_ISA_AVX512VBMI2_SET \
    (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512F_SET)
  #define OPTION_MASK_ISA_AVX512VNNI_SET \
*************** along with GCC; see the file COPYING3.
*** 88,93 ****
--- 88,94 ----
    (OPTION_MASK_ISA_AVX512VPOPCNTDQ | OPTION_MASK_ISA_AVX512F_SET)
  #define OPTION_MASK_ISA_AVX512BITALG_SET \
    (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512F_SET)
+ #define OPTION_MASK_ISA2_AVX512BF16_SET OPTION_MASK_ISA2_AVX512BF16
  #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
  #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
  #define OPTION_MASK_ISA_RDSEED_SET OPTION_MASK_ISA_RDSEED
*************** along with GCC; see the file COPYING3.
*** 99,104 ****
--- 100,106 ----
  #define OPTION_MASK_ISA_XSAVEC_SET \
    (OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_XSAVE_SET)
  #define OPTION_MASK_ISA_CLWB_SET OPTION_MASK_ISA_CLWB
+ #define OPTION_MASK_ISA2_AVX512VP2INTERSECT_SET OPTION_MASK_ISA2_AVX512VP2INTERSECT
  
  /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
     as -msse4.2.  */
*************** along with GCC; see the file COPYING3.
*** 125,160 ****
  #define OPTION_MASK_ISA_ABM_SET \
    (OPTION_MASK_ISA_ABM | OPTION_MASK_ISA_POPCNT)
  
! #define OPTION_MASK_ISA_PCONFIG_SET OPTION_MASK_ISA_PCONFIG
! #define OPTION_MASK_ISA_WBNOINVD_SET OPTION_MASK_ISA_WBNOINVD
! #define OPTION_MASK_ISA_SGX_SET OPTION_MASK_ISA_SGX
  #define OPTION_MASK_ISA_BMI_SET OPTION_MASK_ISA_BMI
  #define OPTION_MASK_ISA_BMI2_SET OPTION_MASK_ISA_BMI2
  #define OPTION_MASK_ISA_LZCNT_SET OPTION_MASK_ISA_LZCNT
  #define OPTION_MASK_ISA_TBM_SET OPTION_MASK_ISA_TBM
  #define OPTION_MASK_ISA_POPCNT_SET OPTION_MASK_ISA_POPCNT
! #define OPTION_MASK_ISA_CX16_SET OPTION_MASK_ISA_CX16
  #define OPTION_MASK_ISA_SAHF_SET OPTION_MASK_ISA_SAHF
! #define OPTION_MASK_ISA_MOVBE_SET OPTION_MASK_ISA_MOVBE
  #define OPTION_MASK_ISA_CRC32_SET OPTION_MASK_ISA_CRC32
  
  #define OPTION_MASK_ISA_FSGSBASE_SET OPTION_MASK_ISA_FSGSBASE
  #define OPTION_MASK_ISA_RDRND_SET OPTION_MASK_ISA_RDRND
! #define OPTION_MASK_ISA_PTWRITE_SET OPTION_MASK_ISA_PTWRITE
  #define OPTION_MASK_ISA_F16C_SET \
    (OPTION_MASK_ISA_F16C | OPTION_MASK_ISA_AVX_SET)
! #define OPTION_MASK_ISA_MWAITX_SET OPTION_MASK_ISA_MWAITX
! #define OPTION_MASK_ISA_CLZERO_SET OPTION_MASK_ISA_CLZERO
  #define OPTION_MASK_ISA_PKU_SET OPTION_MASK_ISA_PKU
! #define OPTION_MASK_ISA_RDPID_SET OPTION_MASK_ISA_RDPID
  #define OPTION_MASK_ISA_GFNI_SET OPTION_MASK_ISA_GFNI
  #define OPTION_MASK_ISA_SHSTK_SET OPTION_MASK_ISA_SHSTK
! #define OPTION_MASK_ISA_VAES_SET OPTION_MASK_ISA_VAES
  #define OPTION_MASK_ISA_VPCLMULQDQ_SET OPTION_MASK_ISA_VPCLMULQDQ
  #define OPTION_MASK_ISA_MOVDIRI_SET OPTION_MASK_ISA_MOVDIRI
! #define OPTION_MASK_ISA_MOVDIR64B_SET OPTION_MASK_ISA_MOVDIR64B
! #define OPTION_MASK_ISA_WAITPKG_SET OPTION_MASK_ISA_WAITPKG
! #define OPTION_MASK_ISA_CLDEMOTE_SET OPTION_MASK_ISA_CLDEMOTE
  
  /* Define a set of ISAs which aren't available when a given ISA is
     disabled.  MMX and SSE ISAs are handled separately.  */
--- 127,163 ----
  #define OPTION_MASK_ISA_ABM_SET \
    (OPTION_MASK_ISA_ABM | OPTION_MASK_ISA_POPCNT)
  
! #define OPTION_MASK_ISA2_PCONFIG_SET OPTION_MASK_ISA2_PCONFIG
! #define OPTION_MASK_ISA2_WBNOINVD_SET OPTION_MASK_ISA2_WBNOINVD
! #define OPTION_MASK_ISA2_SGX_SET OPTION_MASK_ISA2_SGX
  #define OPTION_MASK_ISA_BMI_SET OPTION_MASK_ISA_BMI
  #define OPTION_MASK_ISA_BMI2_SET OPTION_MASK_ISA_BMI2
  #define OPTION_MASK_ISA_LZCNT_SET OPTION_MASK_ISA_LZCNT
  #define OPTION_MASK_ISA_TBM_SET OPTION_MASK_ISA_TBM
  #define OPTION_MASK_ISA_POPCNT_SET OPTION_MASK_ISA_POPCNT
! #define OPTION_MASK_ISA2_CX16_SET OPTION_MASK_ISA2_CX16
  #define OPTION_MASK_ISA_SAHF_SET OPTION_MASK_ISA_SAHF
! #define OPTION_MASK_ISA2_MOVBE_SET OPTION_MASK_ISA2_MOVBE
  #define OPTION_MASK_ISA_CRC32_SET OPTION_MASK_ISA_CRC32
  
  #define OPTION_MASK_ISA_FSGSBASE_SET OPTION_MASK_ISA_FSGSBASE
  #define OPTION_MASK_ISA_RDRND_SET OPTION_MASK_ISA_RDRND
! #define OPTION_MASK_ISA2_PTWRITE_SET OPTION_MASK_ISA2_PTWRITE
  #define OPTION_MASK_ISA_F16C_SET \
    (OPTION_MASK_ISA_F16C | OPTION_MASK_ISA_AVX_SET)
! #define OPTION_MASK_ISA2_MWAITX_SET OPTION_MASK_ISA2_MWAITX
! #define OPTION_MASK_ISA2_CLZERO_SET OPTION_MASK_ISA2_CLZERO
  #define OPTION_MASK_ISA_PKU_SET OPTION_MASK_ISA_PKU
! #define OPTION_MASK_ISA2_RDPID_SET OPTION_MASK_ISA2_RDPID
  #define OPTION_MASK_ISA_GFNI_SET OPTION_MASK_ISA_GFNI
  #define OPTION_MASK_ISA_SHSTK_SET OPTION_MASK_ISA_SHSTK
! #define OPTION_MASK_ISA2_VAES_SET OPTION_MASK_ISA2_VAES
  #define OPTION_MASK_ISA_VPCLMULQDQ_SET OPTION_MASK_ISA_VPCLMULQDQ
  #define OPTION_MASK_ISA_MOVDIRI_SET OPTION_MASK_ISA_MOVDIRI
! #define OPTION_MASK_ISA2_MOVDIR64B_SET OPTION_MASK_ISA2_MOVDIR64B
! #define OPTION_MASK_ISA2_WAITPKG_SET OPTION_MASK_ISA2_WAITPKG
! #define OPTION_MASK_ISA2_CLDEMOTE_SET OPTION_MASK_ISA2_CLDEMOTE
! #define OPTION_MASK_ISA2_ENQCMD_SET OPTION_MASK_ISA2_ENQCMD
  
  /* Define a set of ISAs which aren't available when a given ISA is
     disabled.  MMX and SSE ISAs are handled separately.  */
*************** along with GCC; see the file COPYING3.
*** 209,220 ****
  #define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL
  #define OPTION_MASK_ISA_AVX512IFMA_UNSET OPTION_MASK_ISA_AVX512IFMA
  #define OPTION_MASK_ISA_AVX512VBMI_UNSET OPTION_MASK_ISA_AVX512VBMI
! #define OPTION_MASK_ISA_AVX5124FMAPS_UNSET OPTION_MASK_ISA_AVX5124FMAPS
! #define OPTION_MASK_ISA_AVX5124VNNIW_UNSET OPTION_MASK_ISA_AVX5124VNNIW
  #define OPTION_MASK_ISA_AVX512VBMI2_UNSET OPTION_MASK_ISA_AVX512VBMI2
  #define OPTION_MASK_ISA_AVX512VNNI_UNSET OPTION_MASK_ISA_AVX512VNNI
  #define OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET OPTION_MASK_ISA_AVX512VPOPCNTDQ
  #define OPTION_MASK_ISA_AVX512BITALG_UNSET OPTION_MASK_ISA_AVX512BITALG
  #define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM
  #define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW
  #define OPTION_MASK_ISA_RDSEED_UNSET OPTION_MASK_ISA_RDSEED
--- 212,224 ----
  #define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL
  #define OPTION_MASK_ISA_AVX512IFMA_UNSET OPTION_MASK_ISA_AVX512IFMA
  #define OPTION_MASK_ISA_AVX512VBMI_UNSET OPTION_MASK_ISA_AVX512VBMI
! #define OPTION_MASK_ISA2_AVX5124FMAPS_UNSET OPTION_MASK_ISA2_AVX5124FMAPS
! #define OPTION_MASK_ISA2_AVX5124VNNIW_UNSET OPTION_MASK_ISA2_AVX5124VNNIW
  #define OPTION_MASK_ISA_AVX512VBMI2_UNSET OPTION_MASK_ISA_AVX512VBMI2
  #define OPTION_MASK_ISA_AVX512VNNI_UNSET OPTION_MASK_ISA_AVX512VNNI
  #define OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET OPTION_MASK_ISA_AVX512VPOPCNTDQ
  #define OPTION_MASK_ISA_AVX512BITALG_UNSET OPTION_MASK_ISA_AVX512BITALG
+ #define OPTION_MASK_ISA2_AVX512BF16_UNSET OPTION_MASK_ISA2_AVX512BF16
  #define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM
  #define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW
  #define OPTION_MASK_ISA_RDSEED_UNSET OPTION_MASK_ISA_RDSEED
*************** along with GCC; see the file COPYING3.
*** 224,241 ****
  #define OPTION_MASK_ISA_XSAVEC_UNSET OPTION_MASK_ISA_XSAVEC
  #define OPTION_MASK_ISA_XSAVES_UNSET OPTION_MASK_ISA_XSAVES
  #define OPTION_MASK_ISA_CLWB_UNSET OPTION_MASK_ISA_CLWB
! #define OPTION_MASK_ISA_MWAITX_UNSET OPTION_MASK_ISA_MWAITX
! #define OPTION_MASK_ISA_CLZERO_UNSET OPTION_MASK_ISA_CLZERO
  #define OPTION_MASK_ISA_PKU_UNSET OPTION_MASK_ISA_PKU
! #define OPTION_MASK_ISA_RDPID_UNSET OPTION_MASK_ISA_RDPID
  #define OPTION_MASK_ISA_GFNI_UNSET OPTION_MASK_ISA_GFNI
  #define OPTION_MASK_ISA_SHSTK_UNSET OPTION_MASK_ISA_SHSTK
! #define OPTION_MASK_ISA_VAES_UNSET OPTION_MASK_ISA_VAES
  #define OPTION_MASK_ISA_VPCLMULQDQ_UNSET OPTION_MASK_ISA_VPCLMULQDQ
  #define OPTION_MASK_ISA_MOVDIRI_UNSET OPTION_MASK_ISA_MOVDIRI
! #define OPTION_MASK_ISA_MOVDIR64B_UNSET OPTION_MASK_ISA_MOVDIR64B
! #define OPTION_MASK_ISA_WAITPKG_UNSET OPTION_MASK_ISA_WAITPKG
! #define OPTION_MASK_ISA_CLDEMOTE_UNSET OPTION_MASK_ISA_CLDEMOTE
  
  /* SSE4 includes both SSE4.1 and SSE4.2.  -mno-sse4 should the same
     as -mno-sse4.1. */
--- 228,247 ----
  #define OPTION_MASK_ISA_XSAVEC_UNSET OPTION_MASK_ISA_XSAVEC
  #define OPTION_MASK_ISA_XSAVES_UNSET OPTION_MASK_ISA_XSAVES
  #define OPTION_MASK_ISA_CLWB_UNSET OPTION_MASK_ISA_CLWB
! #define OPTION_MASK_ISA2_MWAITX_UNSET OPTION_MASK_ISA2_MWAITX
! #define OPTION_MASK_ISA2_CLZERO_UNSET OPTION_MASK_ISA2_CLZERO
  #define OPTION_MASK_ISA_PKU_UNSET OPTION_MASK_ISA_PKU
! #define OPTION_MASK_ISA2_RDPID_UNSET OPTION_MASK_ISA2_RDPID
  #define OPTION_MASK_ISA_GFNI_UNSET OPTION_MASK_ISA_GFNI
  #define OPTION_MASK_ISA_SHSTK_UNSET OPTION_MASK_ISA_SHSTK
! #define OPTION_MASK_ISA2_VAES_UNSET OPTION_MASK_ISA2_VAES
  #define OPTION_MASK_ISA_VPCLMULQDQ_UNSET OPTION_MASK_ISA_VPCLMULQDQ
  #define OPTION_MASK_ISA_MOVDIRI_UNSET OPTION_MASK_ISA_MOVDIRI
! #define OPTION_MASK_ISA2_MOVDIR64B_UNSET OPTION_MASK_ISA2_MOVDIR64B
! #define OPTION_MASK_ISA2_WAITPKG_UNSET OPTION_MASK_ISA2_WAITPKG
! #define OPTION_MASK_ISA2_CLDEMOTE_UNSET OPTION_MASK_ISA2_CLDEMOTE
! #define OPTION_MASK_ISA2_ENQCMD_UNSET OPTION_MASK_ISA2_ENQCMD
! #define OPTION_MASK_ISA2_AVX512VP2INTERSECT_UNSET OPTION_MASK_ISA2_AVX512VP2INTERSECT
  
  /* SSE4 includes both SSE4.1 and SSE4.2.  -mno-sse4 should the same
     as -mno-sse4.1. */
*************** along with GCC; see the file COPYING3.
*** 253,274 ****
  #define OPTION_MASK_ISA_SHA_UNSET OPTION_MASK_ISA_SHA
  #define OPTION_MASK_ISA_PCLMUL_UNSET OPTION_MASK_ISA_PCLMUL
  #define OPTION_MASK_ISA_ABM_UNSET OPTION_MASK_ISA_ABM
! #define OPTION_MASK_ISA_PCONFIG_UNSET OPTION_MASK_ISA_PCONFIG
! #define OPTION_MASK_ISA_WBNOINVD_UNSET OPTION_MASK_ISA_WBNOINVD
! #define OPTION_MASK_ISA_SGX_UNSET OPTION_MASK_ISA_SGX
  #define OPTION_MASK_ISA_BMI_UNSET OPTION_MASK_ISA_BMI
  #define OPTION_MASK_ISA_BMI2_UNSET OPTION_MASK_ISA_BMI2
  #define OPTION_MASK_ISA_LZCNT_UNSET OPTION_MASK_ISA_LZCNT
  #define OPTION_MASK_ISA_TBM_UNSET OPTION_MASK_ISA_TBM
  #define OPTION_MASK_ISA_POPCNT_UNSET OPTION_MASK_ISA_POPCNT
! #define OPTION_MASK_ISA_CX16_UNSET OPTION_MASK_ISA_CX16
  #define OPTION_MASK_ISA_SAHF_UNSET OPTION_MASK_ISA_SAHF
! #define OPTION_MASK_ISA_MOVBE_UNSET OPTION_MASK_ISA_MOVBE
  #define OPTION_MASK_ISA_CRC32_UNSET OPTION_MASK_ISA_CRC32
  
  #define OPTION_MASK_ISA_FSGSBASE_UNSET OPTION_MASK_ISA_FSGSBASE
  #define OPTION_MASK_ISA_RDRND_UNSET OPTION_MASK_ISA_RDRND
! #define OPTION_MASK_ISA_PTWRITE_UNSET OPTION_MASK_ISA_PTWRITE
  #define OPTION_MASK_ISA_F16C_UNSET OPTION_MASK_ISA_F16C
  
  #define OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET \
--- 259,280 ----
  #define OPTION_MASK_ISA_SHA_UNSET OPTION_MASK_ISA_SHA
  #define OPTION_MASK_ISA_PCLMUL_UNSET OPTION_MASK_ISA_PCLMUL
  #define OPTION_MASK_ISA_ABM_UNSET OPTION_MASK_ISA_ABM
! #define OPTION_MASK_ISA2_PCONFIG_UNSET OPTION_MASK_ISA2_PCONFIG
! #define OPTION_MASK_ISA2_WBNOINVD_UNSET OPTION_MASK_ISA2_WBNOINVD
! #define OPTION_MASK_ISA2_SGX_UNSET OPTION_MASK_ISA2_SGX
  #define OPTION_MASK_ISA_BMI_UNSET OPTION_MASK_ISA_BMI
  #define OPTION_MASK_ISA_BMI2_UNSET OPTION_MASK_ISA_BMI2
  #define OPTION_MASK_ISA_LZCNT_UNSET OPTION_MASK_ISA_LZCNT
  #define OPTION_MASK_ISA_TBM_UNSET OPTION_MASK_ISA_TBM
  #define OPTION_MASK_ISA_POPCNT_UNSET OPTION_MASK_ISA_POPCNT
! #define OPTION_MASK_ISA2_CX16_UNSET OPTION_MASK_ISA2_CX16
  #define OPTION_MASK_ISA_SAHF_UNSET OPTION_MASK_ISA_SAHF
! #define OPTION_MASK_ISA2_MOVBE_UNSET OPTION_MASK_ISA2_MOVBE
  #define OPTION_MASK_ISA_CRC32_UNSET OPTION_MASK_ISA_CRC32
  
  #define OPTION_MASK_ISA_FSGSBASE_UNSET OPTION_MASK_ISA_FSGSBASE
  #define OPTION_MASK_ISA_RDRND_UNSET OPTION_MASK_ISA_RDRND
! #define OPTION_MASK_ISA2_PTWRITE_UNSET OPTION_MASK_ISA2_PTWRITE
  #define OPTION_MASK_ISA_F16C_UNSET OPTION_MASK_ISA_F16C
  
  #define OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET \
*************** along with GCC; see the file COPYING3.
*** 276,285 ****
     | OPTION_MASK_ISA_SSE_UNSET)
  
  #define OPTION_MASK_ISA2_AVX512F_UNSET \
!   (OPTION_MASK_ISA_AVX5124FMAPS_UNSET | OPTION_MASK_ISA_AVX5124VNNIW_UNSET)
  #define OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET \
    (OPTION_MASK_ISA2_AVX512F_UNSET)
  
  /* Set 1 << value as value of -malign-FLAG option.  */
  
  static void
--- 282,296 ----
     | OPTION_MASK_ISA_SSE_UNSET)
  
  #define OPTION_MASK_ISA2_AVX512F_UNSET \
!   (OPTION_MASK_ISA2_AVX512BF16_UNSET \
!    | OPTION_MASK_ISA2_AVX5124FMAPS_UNSET \
!    | OPTION_MASK_ISA2_AVX5124VNNIW_UNSET \
!    | OPTION_MASK_ISA2_AVX512VP2INTERSECT_UNSET)
  #define OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET \
    (OPTION_MASK_ISA2_AVX512F_UNSET)
  
+ #define OPTION_MASK_ISA2_AVX512BW_UNSET OPTION_MASK_ISA2_AVX512BF16_UNSET
+ 
  /* Set 1 << value as value of -malign-FLAG option.  */
  
  static void
*************** ix86_handle_option (struct gcc_options *
*** 539,551 ****
      case OPT_mrdpid:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_RDPID_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_RDPID_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_RDPID_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_RDPID_UNSET;
  	}
        return true;
  
--- 550,562 ----
      case OPT_mrdpid:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_RDPID_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_RDPID_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_RDPID_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_RDPID_UNSET;
  	}
        return true;
  
*************** ix86_handle_option (struct gcc_options *
*** 578,590 ****
      case OPT_mvaes:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_VAES_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_VAES_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_VAES_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_VAES_UNSET;
  	}
        return true;
  
--- 589,601 ----
      case OPT_mvaes:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_VAES_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_VAES_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_VAES_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_VAES_UNSET;
  	}
        return true;
  
*************** ix86_handle_option (struct gcc_options *
*** 617,685 ****
      case OPT_mmovdir64b:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_MOVDIR64B_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_MOVDIR64B_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_MOVDIR64B_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_MOVDIR64B_UNSET;
  	}
  	return true;
  
      case OPT_mcldemote:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_CLDEMOTE_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_CLDEMOTE_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_CLDEMOTE_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_CLDEMOTE_UNSET;
  	}
        return true;
  
      case OPT_mwaitpkg:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_WAITPKG_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_WAITPKG_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_WAITPKG_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_WAITPKG_UNSET;
  	}
        return true;
  
      case OPT_mavx5124fmaps:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX5124FMAPS_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX5124FMAPS_SET;
  	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F_SET;
  	  opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_AVX5124FMAPS_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX5124FMAPS_UNSET;
  	}
        return true;
  
      case OPT_mavx5124vnniw:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX5124VNNIW_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX5124VNNIW_SET;
  	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F_SET;
  	  opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_AVX5124VNNIW_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX5124VNNIW_UNSET;
  	}
        return true;
  
--- 628,709 ----
      case OPT_mmovdir64b:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_MOVDIR64B_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_MOVDIR64B_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_MOVDIR64B_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_MOVDIR64B_UNSET;
  	}
  	return true;
  
      case OPT_mcldemote:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_CLDEMOTE_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_CLDEMOTE_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_CLDEMOTE_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_CLDEMOTE_UNSET;
  	}
        return true;
  
      case OPT_mwaitpkg:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_WAITPKG_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_WAITPKG_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_WAITPKG_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_WAITPKG_UNSET;
! 	}
!       return true;
! 
!     case OPT_menqcmd:
!       if (value)
! 	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_ENQCMD_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_ENQCMD_SET;
! 	}
!       else
! 	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_ENQCMD_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_ENQCMD_UNSET;
  	}
        return true;
  
      case OPT_mavx5124fmaps:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX5124FMAPS_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX5124FMAPS_SET;
  	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F_SET;
  	  opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX5124FMAPS_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX5124FMAPS_UNSET;
  	}
        return true;
  
      case OPT_mavx5124vnniw:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX5124VNNIW_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX5124VNNIW_SET;
  	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F_SET;
  	  opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX5124VNNIW_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX5124VNNIW_UNSET;
  	}
        return true;
  
*************** ix86_handle_option (struct gcc_options *
*** 738,779 ****
  	}
        return true;
  
      case OPT_msgx:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_SGX_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_SGX_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_SGX_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_SGX_UNSET;
  	}
        return true;
  
      case OPT_mpconfig:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_PCONFIG_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_PCONFIG_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_PCONFIG_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_PCONFIG_UNSET;
  	}
        return true;
  
      case OPT_mwbnoinvd:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_WBNOINVD_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_WBNOINVD_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_WBNOINVD_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_WBNOINVD_UNSET;
  	}
        return true;
  
--- 762,818 ----
  	}
        return true;
  
+     case OPT_mavx512bf16:
+       if (value)
+ 	{
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX512BF16_SET;
+ 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX512BF16_SET;
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BW_SET;
+ 	  opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512BW_SET;
+ 	}
+       else
+ 	{
+ 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX512BF16_UNSET;
+ 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX512BF16_UNSET;
+ 	}
+       return true;
+ 
      case OPT_msgx:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_SGX_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_SGX_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_SGX_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_SGX_UNSET;
  	}
        return true;
  
      case OPT_mpconfig:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_PCONFIG_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_PCONFIG_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_PCONFIG_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_PCONFIG_UNSET;
  	}
        return true;
  
      case OPT_mwbnoinvd:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_WBNOINVD_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_WBNOINVD_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_WBNOINVD_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_WBNOINVD_UNSET;
  	}
        return true;
  
*************** ix86_handle_option (struct gcc_options *
*** 800,805 ****
--- 839,846 ----
  	{
  	  opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512BW_UNSET;
  	  opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512BW_UNSET;
+ 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX512BW_UNSET;
+ 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX512BW_UNSET;
  	}
        return true;
  
*************** ix86_handle_option (struct gcc_options *
*** 842,847 ****
--- 883,905 ----
  	}
        return true;
  
+     case OPT_mavx512vp2intersect:
+       if (value)
+ 	{
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX512VP2INTERSECT_SET;
+ 	  opts->x_ix86_isa_flags2_explicit |=
+ 	    OPTION_MASK_ISA2_AVX512VP2INTERSECT_SET;
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F_SET;
+ 	  opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_SET;
+ 	}
+       else
+ 	{
+ 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX512VP2INTERSECT_UNSET;
+ 	  opts->x_ix86_isa_flags2_explicit |=
+ 	    OPTION_MASK_ISA2_AVX512VP2INTERSECT_UNSET;
+ 	}
+       return true;
+ 
      case OPT_mfma:
        if (value)
  	{
*************** ix86_handle_option (struct gcc_options *
*** 1026,1051 ****
      case OPT_mcx16:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_CX16_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_CX16_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_CX16_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_CX16_UNSET;
  	}
        return true;
  
      case OPT_mmovbe:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_MOVBE_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_MOVBE_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_MOVBE_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_MOVBE_UNSET;
  	}
        return true;
  
--- 1084,1109 ----
      case OPT_mcx16:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_CX16_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_CX16_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_CX16_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_CX16_UNSET;
  	}
        return true;
  
      case OPT_mmovbe:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_MOVBE_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_MOVBE_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_MOVBE_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_MOVBE_UNSET;
  	}
        return true;
  
*************** ix86_handle_option (struct gcc_options *
*** 1130,1142 ****
      case OPT_mptwrite:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_PTWRITE_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_PTWRITE_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_PTWRITE_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_PTWRITE_UNSET;
  	}
        return true;
  
--- 1188,1200 ----
      case OPT_mptwrite:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_PTWRITE_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_PTWRITE_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_PTWRITE_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_PTWRITE_UNSET;
  	}
        return true;
  
*************** ix86_handle_option (struct gcc_options *
*** 1299,1324 ****
      case OPT_mmwaitx:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_MWAITX_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_MWAITX_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_MWAITX_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_MWAITX_UNSET;
  	}
        return true;
  
      case OPT_mclzero:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_CLZERO_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_CLZERO_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_CLZERO_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_CLZERO_UNSET;
  	}
        return true;
  
--- 1357,1382 ----
      case OPT_mmwaitx:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_MWAITX_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_MWAITX_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_MWAITX_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_MWAITX_UNSET;
  	}
        return true;
  
      case OPT_mclzero:
        if (value)
  	{
! 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_CLZERO_SET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_CLZERO_SET;
  	}
        else
  	{
! 	  opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_CLZERO_UNSET;
! 	  opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_CLZERO_UNSET;
  	}
        return true;
  
*************** const char *const processor_names[] =
*** 1508,1513 ****
--- 1566,1573 ----
    "icelake-client",
    "icelake-server",
    "cascadelake",
+   "tigerlake",
+   "cooperlake",
    "intel",
    "geode",
    "k6",
*************** const pta processor_alias_table[] =
*** 1557,1563 ****
    {"pentium-m", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
      PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_FXSR},
    {"pentium4", PROCESSOR_PENTIUM4, CPU_NONE,
!     PTA_MMX |PTA_SSE | PTA_SSE2 | PTA_FXSR},
    {"pentium4m", PROCESSOR_PENTIUM4, CPU_NONE,
      PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_FXSR},
    {"prescott", PROCESSOR_NOCONA, CPU_NONE,
--- 1617,1623 ----
    {"pentium-m", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
      PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_FXSR},
    {"pentium4", PROCESSOR_PENTIUM4, CPU_NONE,
!     PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_FXSR},
    {"pentium4m", PROCESSOR_PENTIUM4, CPU_NONE,
      PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_FXSR},
    {"prescott", PROCESSOR_NOCONA, CPU_NONE,
*************** const pta processor_alias_table[] =
*** 1590,1595 ****
--- 1650,1657 ----
      PTA_ICELAKE_SERVER},
    {"cascadelake", PROCESSOR_CASCADELAKE, CPU_HASWELL,
      PTA_CASCADELAKE},
+   {"tigerlake", PROCESSOR_TIGERLAKE, CPU_HASWELL, PTA_TIGERLAKE},
+   {"cooperlake", PROCESSOR_COOPERLAKE, CPU_HASWELL, PTA_COOPERLAKE},
    {"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL},
    {"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL},
    {"silvermont", PROCESSOR_SILVERMONT, CPU_SLM, PTA_SILVERMONT},
*************** const pta processor_alias_table[] =
*** 1713,1724 ****
        | PTA_SHA | PTA_LZCNT | PTA_POPCNT | PTA_CLWB | PTA_RDPID
        | PTA_WBNOINVD},
    {"btver1", PROCESSOR_BTVER1, CPU_GENERIC,
!     PTA_64BIT | PTA_MMX |  PTA_SSE  | PTA_SSE2 | PTA_SSE3
!       | PTA_SSSE3 | PTA_SSE4A |PTA_ABM | PTA_CX16 | PTA_PRFCHW
        | PTA_FXSR | PTA_XSAVE},
    {"btver2", PROCESSOR_BTVER2, CPU_BTVER2,
!     PTA_64BIT | PTA_MMX |  PTA_SSE  | PTA_SSE2 | PTA_SSE3
!       | PTA_SSSE3 | PTA_SSE4A |PTA_ABM | PTA_CX16 | PTA_SSE4_1
        | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX
        | PTA_BMI | PTA_F16C | PTA_MOVBE | PTA_PRFCHW
        | PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT},
--- 1775,1786 ----
        | PTA_SHA | PTA_LZCNT | PTA_POPCNT | PTA_CLWB | PTA_RDPID
        | PTA_WBNOINVD},
    {"btver1", PROCESSOR_BTVER1, CPU_GENERIC,
!     PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
!       | PTA_SSSE3 | PTA_SSE4A | PTA_ABM | PTA_CX16 | PTA_PRFCHW
        | PTA_FXSR | PTA_XSAVE},
    {"btver2", PROCESSOR_BTVER2, CPU_BTVER2,
!     PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
!       | PTA_SSSE3 | PTA_SSE4A | PTA_ABM | PTA_CX16 | PTA_SSE4_1
        | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX
        | PTA_BMI | PTA_F16C | PTA_MOVBE | PTA_PRFCHW
        | PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT},
diff -Nrcpad gcc-9.3.0/gcc/common/config/ia64/ia64-common.c gcc-10.1.0/gcc/common/config/ia64/ia64-common.c
*** gcc-9.3.0/gcc/common/config/ia64/ia64-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/ia64/ia64-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for IA64.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for IA64.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 28,34 ****
  #include "common/common-target-def.h"
  #include "opts.h"
  #include "flags.h"
- #include "params.h"
  
  /* Implement overriding of the optimization options.  */
  static const struct default_options ia64_option_optimization_table[] =
--- 28,33 ----
*************** static const struct default_options ia64
*** 36,41 ****
--- 35,48 ----
  #ifdef SUBTARGET_OPTIMIZATION_OPTIONS
      SUBTARGET_OPTIMIZATION_OPTIONS,
  #endif
+ 
+     /* Let the scheduler form additional regions.  */
+     { OPT_LEVELS_ALL, OPT__param_max_sched_extend_regions_iters_, NULL, 2 },
+       /* Set the default values for cache-related parameters.  */
+     { OPT_LEVELS_ALL, OPT__param_simultaneous_prefetches_, NULL, 6 },
+     { OPT_LEVELS_ALL, OPT__param_l1_cache_line_size_ , NULL, 32},
+     { OPT_LEVELS_ALL, OPT__param_sched_mem_true_dep_cost_, NULL, 4 },
+ 
      { OPT_LEVELS_NONE, 0, NULL, 0 }
    };
  
*************** ia64_except_unwind_info (struct gcc_opti
*** 82,106 ****
    return UI_TARGET;
  }
  
- /* Implement TARGET_OPTION_DEFAULT_PARAMS.  */
- 
- static void
- ia64_option_default_params (void)
- {
-   /* Let the scheduler form additional regions.  */
-   set_default_param_value (PARAM_MAX_SCHED_EXTEND_REGIONS_ITERS, 2);
- 
-   /* Set the default values for cache-related parameters.  */
-   set_default_param_value (PARAM_SIMULTANEOUS_PREFETCHES, 6);
-   set_default_param_value (PARAM_L1_CACHE_LINE_SIZE, 32);
- 
-   set_default_param_value (PARAM_SCHED_MEM_TRUE_DEP_COST, 4);
- }
- 
  #undef TARGET_OPTION_OPTIMIZATION_TABLE
  #define TARGET_OPTION_OPTIMIZATION_TABLE ia64_option_optimization_table
- #undef TARGET_OPTION_DEFAULT_PARAMS
- #define TARGET_OPTION_DEFAULT_PARAMS ia64_option_default_params
  
  #undef TARGET_EXCEPT_UNWIND_INFO
  #define TARGET_EXCEPT_UNWIND_INFO  ia64_except_unwind_info
--- 89,96 ----
diff -Nrcpad gcc-9.3.0/gcc/common/config/iq2000/iq2000-common.c gcc-10.1.0/gcc/common/config/iq2000/iq2000-common.c
*** gcc-9.3.0/gcc/common/config/iq2000/iq2000-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/iq2000/iq2000-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Vitesse IQ2000.
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Vitesse IQ2000.
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/lm32/lm32-common.c gcc-10.1.0/gcc/common/config/lm32/lm32-common.c
*** gcc-9.3.0/gcc/common/config/lm32/lm32-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/lm32/lm32-common.c	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Common hooks for Lattice Mico32.
  
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,6 ----
  /* Common hooks for Lattice Mico32.
  
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/m32r/m32r-common.c gcc-10.1.0/gcc/common/config/m32r/m32r-common.c
*** gcc-9.3.0/gcc/common/config/m32r/m32r-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/m32r/m32r-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Renesas M32R.
!    Copyright (C) 1996-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Renesas M32R.
!    Copyright (C) 1996-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/m68k/m68k-common.c gcc-10.1.0/gcc/common/config/m68k/m68k-common.c
*** gcc-9.3.0/gcc/common/config/m68k/m68k-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/m68k/m68k-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Motorola 68000 family.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Motorola 68000 family.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/mcore/mcore-common.c gcc-10.1.0/gcc/common/config/mcore/mcore-common.c
*** gcc-9.3.0/gcc/common/config/mcore/mcore-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/mcore/mcore-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Motorola MCore.
!    Copyright (C) 1993-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Motorola MCore.
!    Copyright (C) 1993-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/microblaze/microblaze-common.c gcc-10.1.0/gcc/common/config/microblaze/microblaze-common.c
*** gcc-9.3.0/gcc/common/config/microblaze/microblaze-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/microblaze/microblaze-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Xilinx MicroBlaze.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Xilinx MicroBlaze.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/mips/mips-common.c gcc-10.1.0/gcc/common/config/mips/mips-common.c
*** gcc-9.3.0/gcc/common/config/mips/mips-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/mips/mips-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for MIPS.
!    Copyright (C) 1989-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for MIPS.
!    Copyright (C) 1989-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/mmix/mmix-common.c gcc-10.1.0/gcc/common/config/mmix/mmix-common.c
*** gcc-9.3.0/gcc/common/config/mmix/mmix-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/mmix/mmix-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for MMIX.
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for MMIX.
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/mn10300/mn10300-common.c gcc-10.1.0/gcc/common/config/mn10300/mn10300-common.c
*** gcc-9.3.0/gcc/common/config/mn10300/mn10300-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/mn10300/mn10300-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Matsushita MN10300 series.
!    Copyright (C) 1996-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Matsushita MN10300 series.
!    Copyright (C) 1996-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/msp430/msp430-common.c gcc-10.1.0/gcc/common/config/msp430/msp430-common.c
*** gcc-9.3.0/gcc/common/config/msp430/msp430-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/msp430/msp430-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Texas Instruments MSP430.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Texas Instruments MSP430.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/nds32/nds32-common.c gcc-10.1.0/gcc/common/config/nds32/nds32-common.c
*** gcc-9.3.0/gcc/common/config/nds32/nds32-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/nds32/nds32-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks of Andes NDS32 cpu for GNU compiler
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by Andes Technology Corporation.
  
     This file is part of GCC.
--- 1,5 ----
  /* Common hooks of Andes NDS32 cpu for GNU compiler
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by Andes Technology Corporation.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/common/config/nios2/nios2-common.c gcc-10.1.0/gcc/common/config/nios2/nios2-common.c
*** gcc-9.3.0/gcc/common/config/nios2/nios2-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/nios2/nios2-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Altera Nios II.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Altera Nios II.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/nvptx/nvptx-common.c gcc-10.1.0/gcc/common/config/nvptx/nvptx-common.c
*** gcc-9.3.0/gcc/common/config/nvptx/nvptx-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/nvptx/nvptx-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* NVPTX common hooks.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
  This file is part of GCC.
--- 1,5 ----
  /* NVPTX common hooks.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/common/config/or1k/or1k-common.c gcc-10.1.0/gcc/common/config/or1k/or1k-common.c
*** gcc-9.3.0/gcc/common/config/or1k/or1k-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/or1k/or1k-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for OpenRISC
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for OpenRISC
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/pa/pa-common.c gcc-10.1.0/gcc/common/config/pa/pa-common.c
*** gcc-9.3.0/gcc/common/config/pa/pa-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/pa/pa-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* HPPA common hooks.
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* HPPA common hooks.
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/pdp11/pdp11-common.c gcc-10.1.0/gcc/common/config/pdp11/pdp11-common.c
*** gcc-9.3.0/gcc/common/config/pdp11/pdp11-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/pdp11/pdp11-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for pdp11.
!    Copyright (C) 1994-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for pdp11.
!    Copyright (C) 1994-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/powerpcspe/powerpcspe-common.c gcc-10.1.0/gcc/common/config/powerpcspe/powerpcspe-common.c
*** gcc-9.3.0/gcc/common/config/powerpcspe/powerpcspe-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/powerpcspe/powerpcspe-common.c	Thu Jan  1 00:00:00 1970
***************
*** 1,332 ****
- /* Common hooks for IBM RS/6000.
-    Copyright (C) 1991-2019 Free Software Foundation, Inc.
- 
-    This file is part of GCC.
- 
-    GCC is free software; you can redistribute it and/or modify it
-    under the terms of the GNU General Public License as published
-    by the Free Software Foundation; either version 3, or (at your
-    option) any later version.
- 
-    GCC is distributed in the hope that it will be useful, but WITHOUT
-    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-    License for more details.
- 
-    You should have received a copy of the GNU General Public License
-    along with GCC; see the file COPYING3.  If not see
-    <http://www.gnu.org/licenses/>.  */
- 
- #include "config.h"
- #include "system.h"
- #include "coretypes.h"
- #include "diagnostic-core.h"
- #include "tm.h"
- #include "common/common-target.h"
- #include "common/common-target-def.h"
- #include "opts.h"
- #include "flags.h"
- #include "params.h"
- 
- /* Implement TARGET_OPTION_OPTIMIZATION_TABLE.  */
- static const struct default_options rs6000_option_optimization_table[] =
-   {
-     /* Enable -fsched-pressure for first pass instruction scheduling.  */
-     { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
-     { OPT_LEVELS_NONE, 0, NULL, 0 }
-   };
- 
- /* Implement TARGET_OPTION_INIT_STRUCT.  */
- 
- static void
- rs6000_option_init_struct (struct gcc_options *opts)
- {
-   if (DEFAULT_ABI == ABI_DARWIN)
-     /* The Darwin libraries never set errno, so we might as well
-        avoid calling them when that's the only reason we would.  */
-     opts->x_flag_errno_math = 0;
- 
-   /* Enable section anchors by default.  */
-   if (!TARGET_MACHO)
-     opts->x_flag_section_anchors = 1;
- }
- 
- /* Implement TARGET_OPTION_DEFAULT_PARAMS.  */
- 
- static void
- rs6000_option_default_params (void)
- {
-   /* Double growth factor to counter reduced min jump length.  */
-   set_default_param_value (PARAM_MAX_GROW_COPY_BB_INSNS, 16);
- }
- 
- /* If not otherwise specified by a target, make 'long double' equivalent to
-    'double'.  */
- 
- #ifndef RS6000_DEFAULT_LONG_DOUBLE_SIZE
- #define RS6000_DEFAULT_LONG_DOUBLE_SIZE 64
- #endif
- 
- /* Implement TARGET_HANDLE_OPTION.  */
- 
- static bool
- rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
- 		      const struct cl_decoded_option *decoded,
- 		      location_t loc)
- {
-   enum fpu_type_t fpu_type = FPU_NONE;
-   char *p, *q;
-   size_t code = decoded->opt_index;
-   const char *arg = decoded->arg;
-   int value = decoded->value;
- 
-   switch (code)
-     {
-     case OPT_mfull_toc:
-       opts->x_rs6000_isa_flags &= ~OPTION_MASK_MINIMAL_TOC;
-       opts->x_TARGET_NO_FP_IN_TOC = 0;
-       opts->x_TARGET_NO_SUM_IN_TOC = 0;
-       opts_set->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
- #ifdef TARGET_USES_SYSV4_OPT
-       /* Note, V.4 no longer uses a normal TOC, so make -mfull-toc, be
- 	 just the same as -mminimal-toc.  */
-       opts->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
-       opts_set->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
- #endif
-       break;
- 
- #ifdef TARGET_USES_SYSV4_OPT
-     case OPT_mtoc:
-       /* Make -mtoc behave like -mminimal-toc.  */
-       opts->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
-       opts_set->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
-       break;
- #endif
- 
- #ifdef TARGET_USES_AIX64_OPT
-     case OPT_maix64:
- #else
-     case OPT_m64:
- #endif
-       opts->x_rs6000_isa_flags |= OPTION_MASK_POWERPC64;
-       opts->x_rs6000_isa_flags |= (~opts_set->x_rs6000_isa_flags
- 				   & OPTION_MASK_PPC_GFXOPT);
-       opts_set->x_rs6000_isa_flags |= OPTION_MASK_POWERPC64;
-       break;
- 
- #ifdef TARGET_USES_AIX64_OPT
-     case OPT_maix32:
- #else
-     case OPT_m32:
- #endif
-       opts->x_rs6000_isa_flags &= ~OPTION_MASK_POWERPC64;
-       opts_set->x_rs6000_isa_flags |= OPTION_MASK_POWERPC64;
-       break;
- 
-     case OPT_mminimal_toc:
-       if (value == 1)
- 	{
- 	  opts->x_TARGET_NO_FP_IN_TOC = 0;
- 	  opts->x_TARGET_NO_SUM_IN_TOC = 0;
- 	}
-       break;
- 
-     case OPT_mpowerpc_gpopt:
-     case OPT_mpowerpc_gfxopt:
-       break;
- 
-     case OPT_mdebug_:
-       p = ASTRDUP (arg);
-       opts->x_rs6000_debug = 0;
- 
-       while ((q = strtok (p, ",")) != NULL)
- 	{
- 	  unsigned mask = 0;
- 	  bool invert;
- 
- 	  p = NULL;
- 	  if (*q == '!')
- 	    {
- 	      invert = true;
- 	      q++;
- 	    }
- 	  else
- 	    invert = false;
- 
- 	  if (! strcmp (q, "all"))
- 	    mask = MASK_DEBUG_ALL;
- 	  else if (! strcmp (q, "stack"))
- 	    mask = MASK_DEBUG_STACK;
- 	  else if (! strcmp (q, "arg"))
- 	    mask = MASK_DEBUG_ARG;
- 	  else if (! strcmp (q, "reg"))
- 	    mask = MASK_DEBUG_REG;
- 	  else if (! strcmp (q, "addr"))
- 	    mask = MASK_DEBUG_ADDR;
- 	  else if (! strcmp (q, "cost"))
- 	    mask = MASK_DEBUG_COST;
- 	  else if (! strcmp (q, "target"))
- 	    mask = MASK_DEBUG_TARGET;
- 	  else if (! strcmp (q, "builtin"))
- 	    mask = MASK_DEBUG_BUILTIN;
- 	  else
- 	    error_at (loc, "unknown %<-mdebug-%s%> switch", q);
- 
- 	  if (invert)
- 	    opts->x_rs6000_debug &= ~mask;
- 	  else	
- 	    opts->x_rs6000_debug |= mask;
- 	}
-       break;
- 
- #ifdef TARGET_USES_SYSV4_OPT
-     case OPT_mrelocatable:
-       if (value == 1)
- 	{
- 	  opts->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
- 	  opts_set->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
- 	  opts->x_TARGET_NO_FP_IN_TOC = 1;
- 	}
-       break;
- 
-     case OPT_mrelocatable_lib:
-       if (value == 1)
- 	{
- 	  opts->x_rs6000_isa_flags |= (OPTION_MASK_RELOCATABLE
- 				       | OPTION_MASK_MINIMAL_TOC);
- 	  opts_set->x_rs6000_isa_flags |= (OPTION_MASK_RELOCATABLE
- 					   | OPTION_MASK_MINIMAL_TOC);
- 	  opts->x_TARGET_NO_FP_IN_TOC = 1;
- 	}
-       else
- 	{
- 	  opts->x_rs6000_isa_flags &= ~OPTION_MASK_RELOCATABLE;
- 	  opts_set->x_rs6000_isa_flags |= OPTION_MASK_RELOCATABLE;
- 	}
-       break;
- #endif
- 
-     case OPT_mabi_altivec:
-       /* Enabling the AltiVec ABI turns off the SPE ABI.  */
-       opts->x_rs6000_spe_abi = 0;
-       break;
- 
-     case OPT_mabi_spe:
-       opts->x_rs6000_altivec_abi = 0;
-       break;
- 
-     case OPT_mlong_double_:
-       if (value != 64 && value != 128)
- 	{
- 	  error_at (loc, "unknown switch %<-mlong-double-%s%>", arg);
- 	  opts->x_rs6000_long_double_type_size
- 	    = RS6000_DEFAULT_LONG_DOUBLE_SIZE;
- 	  return false;
- 	}
-       break;
- 
-     case OPT_msingle_float:
-       if (!TARGET_SINGLE_FPU) 
- 	warning_at (loc, 0,
- 		    "%<-msingle-float%> option equivalent to %<-mhard-float%>");
-       /* -msingle-float implies -mno-double-float and TARGET_HARD_FLOAT. */
-       opts->x_rs6000_double_float = 0;
-       opts->x_rs6000_isa_flags &= ~OPTION_MASK_SOFT_FLOAT;
-       opts_set->x_rs6000_isa_flags |= OPTION_MASK_SOFT_FLOAT;
-       break;
- 
-     case OPT_mdouble_float:
-       /* -mdouble-float implies -msingle-float and TARGET_HARD_FLOAT. */
-       opts->x_rs6000_single_float = 1;
-       opts->x_rs6000_isa_flags &= ~OPTION_MASK_SOFT_FLOAT;
-       opts_set->x_rs6000_isa_flags |= OPTION_MASK_SOFT_FLOAT;
-       break;
- 
-     case OPT_msimple_fpu:
-       if (!TARGET_SINGLE_FPU) 
- 	warning_at (loc, 0, "%<-msimple-fpu%> option ignored");
-       break;
- 
-     case OPT_mhard_float:
-       /* -mhard_float implies -msingle-float and -mdouble-float. */
-       opts->x_rs6000_single_float = opts->x_rs6000_double_float = 1;
-       break;
- 
-     case OPT_msoft_float:
-       /* -msoft_float implies -mnosingle-float and -mnodouble-float. */
-       opts->x_rs6000_single_float = opts->x_rs6000_double_float = 0;
-       break;
- 
-     case OPT_mfpu_:
-       fpu_type = (enum fpu_type_t) value;
-       if (fpu_type != FPU_NONE)
- 	{
- 	  /* If -mfpu is not none, then turn off SOFT_FLOAT, turn on
- 	     HARD_FLOAT. */
- 	  opts->x_rs6000_isa_flags &= ~OPTION_MASK_SOFT_FLOAT;
- 	  opts_set->x_rs6000_isa_flags |= OPTION_MASK_SOFT_FLOAT;
- 	  opts->x_rs6000_xilinx_fpu = 1;
- 	  if (fpu_type == FPU_SF_LITE || fpu_type == FPU_SF_FULL) 
- 	    opts->x_rs6000_single_float = 1;
- 	  if (fpu_type == FPU_DF_LITE || fpu_type == FPU_DF_FULL) 
- 	    opts->x_rs6000_single_float = opts->x_rs6000_double_float = 1;
- 	  if (fpu_type == FPU_SF_LITE || fpu_type == FPU_DF_LITE) 
- 	    opts->x_rs6000_simple_fpu = 1;
- 	}
-       else
- 	{
- 	  /* -mfpu=none is equivalent to -msoft-float.  */
- 	  opts->x_rs6000_isa_flags |= OPTION_MASK_SOFT_FLOAT;
- 	  opts_set->x_rs6000_isa_flags |= OPTION_MASK_SOFT_FLOAT;
- 	  opts->x_rs6000_single_float = opts->x_rs6000_double_float = 0;
- 	}
-       break;
- 
-     case OPT_mrecip:
-       opts->x_rs6000_recip_name = (value) ? "default" : "none";
-       break;
-     }
-   return true;
- }
- 
- /* -fsplit-stack uses a field in the TCB, available with glibc-2.19.
-    We also allow 2.18 because alignment padding guarantees that the
-    space is available there too.  */
- 
- static bool
- rs6000_supports_split_stack (bool report,
- 			     struct gcc_options *opts ATTRIBUTE_UNUSED)
- {
- #ifndef TARGET_GLIBC_MAJOR
- #define TARGET_GLIBC_MAJOR 0
- #endif
- #ifndef TARGET_GLIBC_MINOR
- #define TARGET_GLIBC_MINOR 0
- #endif
-   /* Note: Can't test DEFAULT_ABI here, it isn't set until later.  */
-   if (TARGET_GLIBC_MAJOR * 1000 + TARGET_GLIBC_MINOR >= 2018
-       && TARGET_64BIT
-       && TARGET_ELF)
-     return true;
- 
-   if (report)
-     error ("%<-fsplit-stack%> currently only supported on PowerPC64 GNU/Linux with glibc-2.18 or later");
-   return false;
- }
- 
- #undef TARGET_HANDLE_OPTION
- #define TARGET_HANDLE_OPTION rs6000_handle_option
- 
- #undef TARGET_OPTION_INIT_STRUCT
- #define TARGET_OPTION_INIT_STRUCT rs6000_option_init_struct
- 
- #undef TARGET_OPTION_DEFAULT_PARAMS
- #define TARGET_OPTION_DEFAULT_PARAMS rs6000_option_default_params
- 
- #undef TARGET_OPTION_OPTIMIZATION_TABLE
- #define TARGET_OPTION_OPTIMIZATION_TABLE rs6000_option_optimization_table
- 
- #undef TARGET_SUPPORTS_SPLIT_STACK
- #define TARGET_SUPPORTS_SPLIT_STACK rs6000_supports_split_stack
- 
- struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
--- 0 ----
diff -Nrcpad gcc-9.3.0/gcc/common/config/pru/pru-common.c gcc-10.1.0/gcc/common/config/pru/pru-common.c
*** gcc-9.3.0/gcc/common/config/pru/pru-common.c	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/common/config/pru/pru-common.c	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,36 ----
+ /* Common hooks for TI PRU
+    Copyright (C) 2014-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "diagnostic-core.h"
+ #include "tm.h"
+ #include "common/common-target.h"
+ #include "common/common-target-def.h"
+ #include "opts.h"
+ #include "flags.h"
+ 
+ #undef TARGET_DEFAULT_TARGET_FLAGS
+ #define TARGET_DEFAULT_TARGET_FLAGS		(MASK_OPT_LOOP)
+ 
+ #undef TARGET_EXCEPT_UNWIND_INFO
+ #define TARGET_EXCEPT_UNWIND_INFO sjlj_except_unwind_info
+ 
+ struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
diff -Nrcpad gcc-9.3.0/gcc/common/config/riscv/riscv-common.c gcc-10.1.0/gcc/common/config/riscv/riscv-common.c
*** gcc-9.3.0/gcc/common/config/riscv/riscv-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/riscv/riscv-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for RISC-V.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for RISC-V.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** riscv_subset_list::parse (const char *ar
*** 513,518 ****
--- 513,525 ----
    if (p == NULL)
      goto fail;
  
+   if (*p != '\0')
+     {
+       error_at (loc, "%<-march=%s%>: unexpected ISA string at end: %qs",
+                arch, p);
+       goto fail;
+     }
+ 
    return subset_list;
  
  fail:
diff -Nrcpad gcc-9.3.0/gcc/common/config/rs6000/rs6000-common.c gcc-10.1.0/gcc/common/config/rs6000/rs6000-common.c
*** gcc-9.3.0/gcc/common/config/rs6000/rs6000-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/rs6000/rs6000-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for IBM RS/6000.
!    Copyright (C) 1991-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for IBM RS/6000.
!    Copyright (C) 1991-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
***************
*** 26,38 ****
  #include "common/common-target-def.h"
  #include "opts.h"
  #include "flags.h"
- #include "params.h"
  
  /* Implement TARGET_OPTION_OPTIMIZATION_TABLE.  */
  static const struct default_options rs6000_option_optimization_table[] =
    {
      /* Enable -fsched-pressure for first pass instruction scheduling.  */
      { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
      { OPT_LEVELS_NONE, 0, NULL, 0 }
    };
  
--- 26,50 ----
  #include "common/common-target-def.h"
  #include "opts.h"
  #include "flags.h"
  
  /* Implement TARGET_OPTION_OPTIMIZATION_TABLE.  */
  static const struct default_options rs6000_option_optimization_table[] =
    {
+     /* Split multi-word types early.  */
+     { OPT_LEVELS_ALL, OPT_fsplit_wide_types_early, NULL, 1 },
      /* Enable -fsched-pressure for first pass instruction scheduling.  */
      { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
+     /* Enable -munroll-only-small-loops with -funroll-loops to unroll small
+        loops at -O2 and above by default.  */
+     { OPT_LEVELS_2_PLUS_SPEED_ONLY, OPT_funroll_loops, NULL, 1 },
+     { OPT_LEVELS_2_PLUS_SPEED_ONLY, OPT_munroll_only_small_loops, NULL, 1 },
+ 
+     /* -frename-registers leads to non-optimal codegen and performance
+        on rs6000, turn it off by default.  */
+     { OPT_LEVELS_ALL, OPT_frename_registers, NULL, 0 },
+ 
+     /* Double growth factor to counter reduced min jump length.  */
+     { OPT_LEVELS_ALL, OPT__param_max_grow_copy_bb_insns_, NULL, 16 },
      { OPT_LEVELS_NONE, 0, NULL, 0 }
    };
  
*************** rs6000_option_init_struct (struct gcc_op
*** 60,74 ****
  #endif
  }
  
- /* Implement TARGET_OPTION_DEFAULT_PARAMS.  */
- 
- static void
- rs6000_option_default_params (void)
- {
-   /* Double growth factor to counter reduced min jump length.  */
-   set_default_param_value (PARAM_MAX_GROW_COPY_BB_INSNS, 16);
- }
- 
  /* If not otherwise specified by a target, make 'long double' equivalent to
     'double'.  */
  
--- 72,77 ----
*************** rs6000_supports_split_stack (bool report
*** 262,270 ****
  #undef TARGET_OPTION_INIT_STRUCT
  #define TARGET_OPTION_INIT_STRUCT rs6000_option_init_struct
  
- #undef TARGET_OPTION_DEFAULT_PARAMS
- #define TARGET_OPTION_DEFAULT_PARAMS rs6000_option_default_params
- 
  #undef TARGET_OPTION_OPTIMIZATION_TABLE
  #define TARGET_OPTION_OPTIMIZATION_TABLE rs6000_option_optimization_table
  
--- 265,270 ----
diff -Nrcpad gcc-9.3.0/gcc/common/config/rx/rx-common.c gcc-10.1.0/gcc/common/config/rx/rx-common.c
*** gcc-9.3.0/gcc/common/config/rx/rx-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/rx/rx-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Renesas RX.
!    Copyright (C) 2008-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Renesas RX.
!    Copyright (C) 2008-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/s390/s390-common.c gcc-10.1.0/gcc/common/config/s390/s390-common.c
*** gcc-9.3.0/gcc/common/config/s390/s390-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/s390/s390-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for IBM S/390 and zSeries.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for IBM S/390 and zSeries.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/sh/sh-common.c gcc-10.1.0/gcc/common/config/sh/sh-common.c
*** gcc-9.3.0/gcc/common/config/sh/sh-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/sh/sh-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Renesas / SuperH SH.
!    Copyright (C) 1993-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Renesas / SuperH SH.
!    Copyright (C) 1993-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 25,37 ****
  #include "common/common-target-def.h"
  #include "opts.h"
  #include "flags.h"
- #include "params.h"
  
  /* Set default optimization options.  */
  static const struct default_options sh_option_optimization_table[] =
    {
      { OPT_LEVELS_SIZE, OPT_mdiv_, SH_DIV_STR_FOR_SIZE, 1 },
      { OPT_LEVELS_0_ONLY, OPT_mdiv_, "", 1 },
      { OPT_LEVELS_NONE, 0, NULL, 0 }
    };
  
--- 25,37 ----
  #include "common/common-target-def.h"
  #include "opts.h"
  #include "flags.h"
  
  /* Set default optimization options.  */
  static const struct default_options sh_option_optimization_table[] =
    {
      { OPT_LEVELS_SIZE, OPT_mdiv_, SH_DIV_STR_FOR_SIZE, 1 },
      { OPT_LEVELS_0_ONLY, OPT_mdiv_, "", 1 },
+     { OPT_LEVELS_ALL, OPT__param_simultaneous_prefetches_, NULL, 2 },
      { OPT_LEVELS_NONE, 0, NULL, 0 }
    };
  
*************** sh_handle_option (struct gcc_options *op
*** 145,161 ****
      }
  }
  
- /* Implement TARGET_OPTION_DEFAULT_PARAMS.  */
- static void
- sh_option_default_params (void)
- {
-   set_default_param_value (PARAM_SIMULTANEOUS_PREFETCHES, 2);
- }
- 
  #undef TARGET_OPTION_OPTIMIZATION_TABLE
  #define TARGET_OPTION_OPTIMIZATION_TABLE sh_option_optimization_table
- #undef TARGET_OPTION_DEFAULT_PARAMS
- #define TARGET_OPTION_DEFAULT_PARAMS sh_option_default_params
  #undef TARGET_DEFAULT_TARGET_FLAGS
  #define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
  #undef TARGET_HANDLE_OPTION
--- 145,152 ----
diff -Nrcpad gcc-9.3.0/gcc/common/config/sparc/sparc-common.c gcc-10.1.0/gcc/common/config/sparc/sparc-common.c
*** gcc-9.3.0/gcc/common/config/sparc/sparc-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/sparc/sparc-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for SPARC.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for SPARC.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/spu/spu-common.c gcc-10.1.0/gcc/common/config/spu/spu-common.c
*** gcc-9.3.0/gcc/common/config/spu/spu-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/spu/spu-common.c	Thu Jan  1 00:00:00 1970
***************
*** 1,56 ****
- /* Common hooks for SPU.
-    Copyright (C) 2006-2019 Free Software Foundation, Inc.
- 
-    This file is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License as published by the Free
-    Software Foundation; either version 3 of the License, or (at your option) 
-    any later version.
- 
-    This file is distributed in the hope that it will be useful, but WITHOUT
-    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-    for more details.
- 
-    You should have received a copy of the GNU General Public License
-    along with GCC; see the file COPYING3.  If not see
-    <http://www.gnu.org/licenses/>.  */
- 
- #include "config.h"
- #include "system.h"
- #include "coretypes.h"
- #include "tm.h"
- #include "common/common-target.h"
- #include "common/common-target-def.h"
- #include "opts.h"
- #include "flags.h"
- #include "params.h"
- 
- static void
- spu_option_init_struct (struct gcc_options *opts)
- {
-   /* With so many registers this is better on by default. */
-   opts->x_flag_rename_registers = 1;
- }
- 
- /* Implement TARGET_OPTION_DEFAULT_PARAMS.  */
- static void
- spu_option_default_params (void)
- {
-   /* Override some of the default param values.  With so many registers
-      larger values are better for these params.  */
-   set_default_param_value (PARAM_MAX_PENDING_LIST_LENGTH, 128);
- }
- 
- #undef TARGET_DEFAULT_TARGET_FLAGS
- #define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT)
- 
- #undef TARGET_OPTION_INIT_STRUCT
- #define TARGET_OPTION_INIT_STRUCT spu_option_init_struct
- 
- #undef TARGET_OPTION_DEFAULT_PARAMS
- #define TARGET_OPTION_DEFAULT_PARAMS spu_option_default_params
- 
- #undef TARGET_EXCEPT_UNWIND_INFO
- #define TARGET_EXCEPT_UNWIND_INFO  sjlj_except_unwind_info
- 
- struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
--- 0 ----
diff -Nrcpad gcc-9.3.0/gcc/common/config/tilegx/tilegx-common.c gcc-10.1.0/gcc/common/config/tilegx/tilegx-common.c
*** gcc-9.3.0/gcc/common/config/tilegx/tilegx-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/tilegx/tilegx-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for TILE-Gx.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by Walter Lee (walt@tilera.com)
  
     This file is part of GCC.
--- 1,5 ----
  /* Common hooks for TILE-Gx.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by Walter Lee (walt@tilera.com)
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/common/config/tilepro/tilepro-common.c gcc-10.1.0/gcc/common/config/tilepro/tilepro-common.c
*** gcc-9.3.0/gcc/common/config/tilepro/tilepro-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/tilepro/tilepro-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for TILEPro.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by Walter Lee (walt@tilera.com)
  
     This file is part of GCC.
--- 1,5 ----
  /* Common hooks for TILEPro.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by Walter Lee (walt@tilera.com)
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/common/config/v850/v850-common.c gcc-10.1.0/gcc/common/config/v850/v850-common.c
*** gcc-9.3.0/gcc/common/config/v850/v850-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/v850/v850-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for NEC V850 series.
!    Copyright (C) 1996-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for NEC V850 series.
!    Copyright (C) 1996-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/vax/vax-common.c gcc-10.1.0/gcc/common/config/vax/vax-common.c
*** gcc-9.3.0/gcc/common/config/vax/vax-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/vax/vax-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for VAX.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for VAX.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/visium/visium-common.c gcc-10.1.0/gcc/common/config/visium/visium-common.c
*** gcc-9.3.0/gcc/common/config/visium/visium-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/visium/visium-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Visium.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
     Contributed by C.Nettleton,J.P.Parkes and P.Garbett.
  
  This file is part of GCC.
--- 1,5 ----
  /* Common hooks for Visium.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
     Contributed by C.Nettleton,J.P.Parkes and P.Garbett.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/common/config/xstormy16/xstormy16-common.c gcc-10.1.0/gcc/common/config/xstormy16/xstormy16-common.c
*** gcc-9.3.0/gcc/common/config/xstormy16/xstormy16-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/xstormy16/xstormy16-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Xstormy16.
!    Copyright (C) 1997-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Xstormy16.
!    Copyright (C) 1997-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common/config/xtensa/xtensa-common.c gcc-10.1.0/gcc/common/config/xtensa/xtensa-common.c
*** gcc-9.3.0/gcc/common/config/xtensa/xtensa-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common/config/xtensa/xtensa-common.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common hooks for Tensilica's Xtensa architecture.
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Common hooks for Tensilica's Xtensa architecture.
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/common.md gcc-10.1.0/gcc/common.md
*** gcc-9.3.0/gcc/common.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Common GCC machine description file, shared by all targets.
! ;; Copyright (C) 2014-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Common GCC machine description file, shared by all targets.
! ;; Copyright (C) 2014-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/common.opt gcc-10.1.0/gcc/common.opt
*** gcc-9.3.0/gcc/common.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/common.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the language- and target-independent parts of the compiler.
  
! ; Copyright (C) 2003-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for the language- and target-independent parts of the compiler.
  
! ; Copyright (C) 2003-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
*************** int flag_complex_method = 1
*** 63,71 ****
  Variable
  bool flag_warn_unused_result = false
  
- Variable
- int *param_values
- 
  ; Nonzero if we should write GIMPLE bytecode for link-time optimization.
  Variable
  int flag_generate_lto
--- 63,68 ----
*************** Common Driver Alias(-target-help)
*** 437,449 ****
  fversion
  Common Driver Alias(-version)
  
- -param
- Common Separate
- --param <param>=<value>	Set parameter <param> to value.  See below for a complete list of parameters.
- 
- -param=
- Common Joined Alias(-param)
- 
  -sysroot
  Driver Separate Alias(-sysroot=)
  
--- 434,439 ----
*************** Wframe-larger-than=
*** 611,616 ****
--- 601,610 ----
  Common RejectNegative Joined Host_Wide_Int ByteSize Warning Var(warn_frame_larger_than_size) Init(HOST_WIDE_INT_MAX)
  -Wframe-larger-than=<byte-size>	Warn if a function's stack frame requires in excess of <byte-size>.
  
+ Wno-frame-larger-than
+ Common Alias(Wframe-larger-than=,18446744073709551615EiB,none) Warning
+ Disable -Wframe-larger-than= warning.  Equivalent to -Wframe-larger-than=<SIZE_MAX> or larger.
+ 
  Wfree-nonheap-object
  Common Var(warn_free_nonheap_object) Init(1) Warning
  Warn when attempting to free a non-heap object.
*************** Common Var(warn_implicit_fallthrough) Re
*** 627,633 ****
  Warn when a switch case falls through.
  
  Winline
! Common Var(warn_inline) Warning
  Warn when an inlined function cannot be inlined.
  
  Winvalid-memory-model
--- 621,627 ----
  Warn when a switch case falls through.
  
  Winline
! Common Var(warn_inline) Warning Optimization
  Warn when an inlined function cannot be inlined.
  
  Winvalid-memory-model
*************** Wlarger-than=
*** 641,646 ****
--- 635,644 ----
  Common RejectNegative Joined Host_Wide_Int ByteSize Warning Var(warn_larger_than_size) Init(HOST_WIDE_INT_MAX)
  -Wlarger-than=<byte-size>	Warn if an object's size exceeds <byte-size>.
  
+ Wno-larger-than
+ Common Alias(Wlarger-than=,18446744073709551615EiB,none) Warning
+ Disable -Wlarger-than= warning.  Equivalent to -Wlarger-than=<SIZE_MAX> or larger.
+ 
  Wnonnull-compare
  Var(warn_nonnull_compare) Warning
  Warn if comparing pointer parameter with nonnull attribute with NULL.
*************** Wstack-usage=
*** 714,719 ****
--- 712,721 ----
  Common Joined RejectNegative Host_Wide_Int ByteSize Var(warn_stack_usage) Warning Init(HOST_WIDE_INT_MAX)
  -Wstack-usage=<byte-size>	Warn if stack usage might exceed <byte-size>.
  
+ Wno-stack-usage
+ Common Alias(Wstack-usage=,18446744073709551615EiB,none) Warning
+ Disable Wstack-usage= warning.  Equivalent to Wstack-usage=<SIZE_MAX> or larger.
+ 
  Wstrict-aliasing
  Common Warning
  Warn about code which might break strict aliasing rules.
*************** Driver Undocumented
*** 951,956 ****
--- 953,960 ----
  ; 13: Fixes the accidental change in 12 to the calling convention for classes
  ;     with deleted copy constructor and trivial move constructor.
  ;     Default in G++ 8.2.
+ ; 14: Corrects the mangling of nullptr expression.
+ ;     Default in G++ 10.
  ;
  ; Additional positive integers will be assigned as new versions of
  ; the ABI become the default version of the ABI.
*************** Align the start of loops.
*** 993,998 ****
--- 997,1010 ----
  falign-loops=
  Common RejectNegative Joined Var(str_align_loops) Optimization
  
+ fallow-store-data-races
+ Common Report Var(flag_store_data_races) Optimization
+ Allow the compiler to introduce new data races on stores.
+ 
+ fanalyzer
+ Common Var(flag_analyzer)
+ Enable static analysis pass.
+ 
  fargument-alias
  Common Ignore
  Does nothing. Preserved for backward compatibility.
*************** Common Report Var(flag_branch_probabilit
*** 1076,1091 ****
  Use profiling information for branch probabilities.
  
  fbranch-target-load-optimize
! Common Report Var(flag_branch_target_load_optimize) Optimization
! Perform branch target load optimization before prologue / epilogue threading.
  
  fbranch-target-load-optimize2
! Common Report Var(flag_branch_target_load_optimize2) Optimization
! Perform branch target load optimization after prologue / epilogue threading.
  
  fbtr-bb-exclusive
! Common Report Var(flag_btr_bb_exclusive) Optimization
! Restrict target load migration not to re-use registers in any basic block.
  
  fcall-saved-
  Common Joined RejectNegative Var(common_deferred_options) Defer
--- 1088,1111 ----
  Use profiling information for branch probabilities.
  
  fbranch-target-load-optimize
! Common Ignore
! Does nothing.  Preserved for backward compatibility.
  
  fbranch-target-load-optimize2
! Common Ignore
! Does nothing.  Preserved for backward compatibility.
  
  fbtr-bb-exclusive
! Common Ignore
! Does nothing.  Preserved for backward compatibility.
! 
! fcallgraph-info
! Common Report RejectNegative Var(flag_callgraph_info) Init(NO_CALLGRAPH_INFO);
! Output callgraph information on a per-file basis.
! 
! fcallgraph-info=
! Common Report RejectNegative Joined
! Output callgraph information on a per-file basis with decorations.
  
  fcall-saved-
  Common Joined RejectNegative Var(common_deferred_options) Defer
*************** Common Report Var(flag_combine_stack_adj
*** 1127,1134 ****
  Looks for opportunities to reduce stack adjustments and stack references.
  
  fcommon
! Common Report Var(flag_no_common,0)
! Do not put uninitialized globals in the common section.
  
  fcompare-debug
  Driver
--- 1147,1154 ----
  Looks for opportunities to reduce stack adjustments and stack references.
  
  fcommon
! Common Report Var(flag_no_common,0) Init(1)
! Put uninitialized globals in the common section.
  
  fcompare-debug
  Driver
*************** List all available debugging counters wi
*** 1184,1198 ****
  
  fdbg-cnt=
  Common RejectNegative Joined Var(common_deferred_options) Defer
! -fdbg-cnt=<counter>[:<lower_limit>]:<upper_limit>[,<counter>:...]	Set the debug counter limit.
  
  fdebug-prefix-map=
  Common Joined RejectNegative Var(common_deferred_options) Defer
! -fdebug-prefix-map=<old>=<new> Map one directory name to another in debug information.
  
  ffile-prefix-map=
  Common Joined RejectNegative Var(common_deferred_options) Defer
! -ffile-prefix-map=<old>=<new> Map one directory name to another in compilation result.
  
  fdebug-types-section
  Common Report Var(flag_debug_types_section) Init(0)
--- 1204,1218 ----
  
  fdbg-cnt=
  Common RejectNegative Joined Var(common_deferred_options) Defer
! -fdbg-cnt=<counter>[:<lower_limit1>-]<upper_limit1>[:<lower_limit2>-<upper_limit2>:...][,<counter>:...]	Set the debug counter limit.
  
  fdebug-prefix-map=
  Common Joined RejectNegative Var(common_deferred_options) Defer
! -fdebug-prefix-map=<old>=<new>	Map one directory name to another in debug information.
  
  ffile-prefix-map=
  Common Joined RejectNegative Var(common_deferred_options) Defer
! -ffile-prefix-map=<old>=<new>	Map one directory name to another in compilation result.
  
  fdebug-types-section
  Common Report Var(flag_debug_types_section) Init(0)
*************** Enum(diagnostic_color_rule) String(alway
*** 1281,1289 ****
  EnumValue
  Enum(diagnostic_color_rule) String(auto) Value(DIAGNOSTICS_COLOR_AUTO)
  
  fdiagnostics-format=
  Common Joined RejectNegative Enum(diagnostics_output_format)
! -fdiagnostics-format=[text|json] Select output format.
  
  ; Required for these enum values.
  SourceInclude
--- 1301,1329 ----
  EnumValue
  Enum(diagnostic_color_rule) String(auto) Value(DIAGNOSTICS_COLOR_AUTO)
  
+ fdiagnostics-urls=
+ Driver Common Joined RejectNegative Var(flag_diagnostics_show_urls) Enum(diagnostic_url_rule) Init(DIAGNOSTICS_URL_AUTO)
+ -fdiagnostics-urls=[never|always|auto]	Embed URLs in diagnostics.
+ 
+ ; Required for these enum values.
+ SourceInclude
+ diagnostic-url.h
+ 
+ Enum
+ Name(diagnostic_url_rule) Type(int)
+ 
+ EnumValue
+ Enum(diagnostic_url_rule) String(never) Value(DIAGNOSTICS_URL_NO)
+ 
+ EnumValue
+ Enum(diagnostic_url_rule) String(always) Value(DIAGNOSTICS_URL_YES)
+ 
+ EnumValue
+ Enum(diagnostic_url_rule) String(auto) Value(DIAGNOSTICS_URL_AUTO)
+ 
  fdiagnostics-format=
  Common Joined RejectNegative Enum(diagnostics_output_format)
! -fdiagnostics-format=[text|json]	Select output format.
  
  ; Required for these enum values.
  SourceInclude
*************** fdiagnostics-show-option
*** 1310,1326 ****
  Common Var(flag_diagnostics_show_option) Init(1)
  Amend appropriate diagnostic messages with the command line option that controls them.
  
  fdiagnostics-minimum-margin-width=
  Common Joined UInteger Var(diagnostics_minimum_margin_width) Init(6)
  Set minimum width of left margin of source code when showing source.
  
  fdisable-
  Common Joined RejectNegative Var(common_deferred_options) Defer
! -fdisable-[tree|rtl|ipa]-<pass>=range1+range2 disables an optimization pass.
  
  fenable-
  Common Joined RejectNegative Var(common_deferred_options) Defer
! -fenable-[tree|rtl|ipa]-<pass>=range1+range2 enables an optimization pass.
  
  fdump-
  Common Joined RejectNegative Var(common_deferred_options) Defer
--- 1350,1390 ----
  Common Var(flag_diagnostics_show_option) Init(1)
  Amend appropriate diagnostic messages with the command line option that controls them.
  
+ fdiagnostics-show-cwe
+ Common Var(flag_diagnostics_show_cwe) Init(1)
+ Print CWE identifiers for diagnostic messages, where available.
+ 
+ fdiagnostics-path-format=
+ Common Joined RejectNegative Var(flag_diagnostics_path_format) Enum(diagnostic_path_format) Init(DPF_INLINE_EVENTS)
+ Specify how to print any control-flow path associated with a diagnostic.
+ 
+ Enum
+ Name(diagnostic_path_format) Type(int)
+ 
+ EnumValue
+ Enum(diagnostic_path_format) String(none) Value(DPF_NONE)
+ 
+ EnumValue
+ Enum(diagnostic_path_format) String(separate-events) Value(DPF_SEPARATE_EVENTS)
+ 
+ EnumValue
+ Enum(diagnostic_path_format) String(inline-events) Value(DPF_INLINE_EVENTS)
+ 
+ fdiagnostics-show-path-depths
+ Common Var(flag_diagnostics_show_path_depths) Init(0)
+ Show stack depths of events in paths.
+ 
  fdiagnostics-minimum-margin-width=
  Common Joined UInteger Var(diagnostics_minimum_margin_width) Init(6)
  Set minimum width of left margin of source code when showing source.
  
  fdisable-
  Common Joined RejectNegative Var(common_deferred_options) Defer
! -fdisable-[tree|rtl|ipa]-<pass>=range1+range2	Disable an optimization pass.
  
  fenable-
  Common Joined RejectNegative Var(common_deferred_options) Defer
! -fenable-[tree|rtl|ipa]-<pass>=range1+range2	Enable an optimization pass.
  
  fdump-
  Common Joined RejectNegative Var(common_deferred_options) Defer
*************** Common Report Var(flag_ipa_sra) Init(0)
*** 1379,1385 ****
  Perform interprocedural reduction of aggregates.
  
  feliminate-unused-debug-symbols
! Common Report Var(flag_debug_only_used_symbols)
  Perform unused symbol elimination in debug info.
  
  feliminate-unused-debug-types
--- 1443,1449 ----
  Perform interprocedural reduction of aggregates.
  
  feliminate-unused-debug-symbols
! Common Report Var(flag_debug_only_used_symbols) Init(1)
  Perform unused symbol elimination in debug info.
  
  feliminate-unused-debug-types
*************** Common Report Var(flag_expensive_optimiz
*** 1399,1405 ****
  Perform a number of minor, expensive optimizations.
  
  fexcess-precision=
! Common Joined RejectNegative Enum(excess_precision) Var(flag_excess_precision_cmdline) Init(EXCESS_PRECISION_DEFAULT) SetByCombined
  -fexcess-precision=[fast|standard]	Specify handling of excess floating-point precision.
  
  Enum
--- 1463,1469 ----
  Perform a number of minor, expensive optimizations.
  
  fexcess-precision=
! Common Joined RejectNegative Enum(excess_precision) Var(flag_excess_precision) Init(EXCESS_PRECISION_DEFAULT) Optimization SetByCombined
  -fexcess-precision=[fast|standard]	Specify handling of excess floating-point precision.
  
  Enum
*************** ffinite-math-only
*** 1437,1442 ****
--- 1501,1510 ----
  Common Report Var(flag_finite_math_only) Optimization SetByCombined
  Assume no NaNs or infinities are generated.
  
+ ffinite-loops
+ Common Report Var(flag_finite_loops) Optimization Init(0)
+ Assume that loops with an exit will terminate and not loop indefinitely.
+ 
  ffixed-
  Common Joined RejectNegative Var(common_deferred_options) Defer
  -ffixed-<register>	Mark <register> as being unavailable to the compiler.
*************** Instrument function entry and exit with
*** 1699,1709 ****
  
  finstrument-functions-exclude-function-list=
  Common RejectNegative Joined
! -finstrument-functions-exclude-function-list=name,...  Do not instrument listed functions.
  
  finstrument-functions-exclude-file-list=
  Common RejectNegative Joined
! -finstrument-functions-exclude-file-list=filename,...  Do not instrument functions listed in files.
  
  fipa-cp
  Common Report Var(flag_ipa_cp) Optimization
--- 1767,1777 ----
  
  finstrument-functions-exclude-function-list=
  Common RejectNegative Joined
! -finstrument-functions-exclude-function-list=name,...	Do not instrument listed functions.
  
  finstrument-functions-exclude-file-list=
  Common RejectNegative Joined
! -finstrument-functions-exclude-file-list=filename,...	Do not instrument functions listed in files.
  
  fipa-cp
  Common Report Var(flag_ipa_cp) Optimization
*************** Specify the algorithm to partition symbo
*** 1884,1895 ****
  
  ; The initial value of -1 comes from Z_DEFAULT_COMPRESSION in zlib.h.
  flto-compression-level=
! Common Joined RejectNegative UInteger Var(flag_lto_compression_level) Init(-1) IntegerRange(0, 9)
! -flto-compression-level=<number>	Use zlib compression level <number> for IL.
  
  flto-odr-type-merging
! Common Report Var(flag_lto_odr_type_mering) Init(1)
! Merge C++ types using One Definition Rule.
  
  flto-report
  Common Report Var(flag_lto_report) Init(0)
--- 1952,1963 ----
  
  ; The initial value of -1 comes from Z_DEFAULT_COMPRESSION in zlib.h.
  flto-compression-level=
! Common Joined RejectNegative UInteger Var(flag_lto_compression_level) Init(-1) IntegerRange(0, 19)
! -flto-compression-level=<number>	Use zlib/zstd compression level <number> for IL.
  
  flto-odr-type-merging
! Common Ignore
! Does nothing.  Preserved for backward compatibility.
  
  flto-report
  Common Report Var(flag_lto_report) Init(0)
*************** Common Var(flag_dce) Init(1) Optimizatio
*** 1951,1957 ****
  Use the RTL dead code elimination pass.
  
  fdse
! Common Var(flag_dse) Init(1) Optimization
  Use the RTL dead store elimination pass.
  
  freschedule-modulo-scheduled-loops
--- 2019,2025 ----
  Use the RTL dead code elimination pass.
  
  fdse
! Common Var(flag_dse) Init(0) Optimization
  Use the RTL dead store elimination pass.
  
  freschedule-modulo-scheduled-loops
*************** Support synchronous non-call exceptions.
*** 1964,1974 ****
  
  foffload=
  Common Driver Joined MissingArgError(options or targets missing after %qs)
! -foffload=<targets>=<options>  Specify offloading targets and options for them.
  
  foffload-abi=
  Common Joined RejectNegative Enum(offload_abi) Var(flag_offload_abi) Init(OFFLOAD_ABI_UNSET)
! -foffload-abi=[lp64|ilp32]     Set the ABI to use in an offload compiler.
  
  Enum
  Name(offload_abi) Type(enum offload_abi) UnknownError(unknown offload ABI %qs)
--- 2032,2042 ----
  
  foffload=
  Common Driver Joined MissingArgError(options or targets missing after %qs)
! -foffload=<targets>=<options>	Specify offloading targets and options for them.
  
  foffload-abi=
  Common Joined RejectNegative Enum(offload_abi) Var(flag_offload_abi) Init(OFFLOAD_ABI_UNSET)
! -foffload-abi=[lp64|ilp32]	Set the ABI to use in an offload compiler.
  
  Enum
  Name(offload_abi) Type(enum offload_abi) UnknownError(unknown offload ABI %qs)
*************** Common Joined RejectNegative Var(profile
*** 2092,2097 ****
--- 2160,2169 ----
  Set the top-level directory for storing the profile data.
  The default is 'pwd'.
  
+ fprofile-note=
+ Common Joined RejectNegative Var(profile_note_location)
+ Select the name for storing the profile note file.
+ 
  fprofile-correction
  Common Report Var(flag_profile_correction)
  Enable correction of flow inconsistent profile data input.
*************** Common Joined RejectNegative Var(flag_pr
*** 2109,2114 ****
--- 2181,2202 ----
  Instrument only functions from files where names do not match all the regular expressions (separated by a semi-colon).
  
  Enum
+ Name(profile_reproducibility) Type(enum profile_reproducibility) UnknownError(unknown profile reproducibility method %qs)
+ 
+ EnumValue
+ Enum(profile_reproducibility) String(serial) Value(PROFILE_REPRODUCIBILITY_SERIAL)
+ 
+ EnumValue
+ Enum(profile_reproducibility) String(parallel-runs) Value(PROFILE_REPRODUCIBILITY_PARALLEL_RUNS)
+ 
+ EnumValue
+ Enum(profile_reproducibility) String(multithreaded) Value(PROFILE_REPRODUCIBILITY_MULTITHREADED)
+ 
+ fprofile-reproducible
+ Common Joined RejectNegative Var(flag_profile_reproducible) Enum(profile_reproducibility) Init(PROFILE_REPRODUCIBILITY_SERIAL)
+ -fprofile-reproducible=[serial|parallel-runs|multithreaded]	Control level of reproducibility of profile gathered by -fprofile-generate.
+ 
+ Enum
  Name(profile_update) Type(enum profile_update) UnknownError(unknown profile update method %qs)
  
  EnumValue
*************** Enum(profile_update) String(atomic) Valu
*** 2120,2125 ****
--- 2208,2217 ----
  EnumValue
  Enum(profile_update) String(prefer-atomic) Value(PROFILE_UPDATE_PREFER_ATOMIC)
  
+ fprofile-prefix-path=
+ Common Joined RejectNegative Var(profile_prefix_path)
+ Remove prefix from absolute path before manging name for -fprofile-generate= and -fprofile-use=.
+ 
  fprofile-generate
  Common
  Enable common options for generating profile info for profile feedback directed optimizations.
*************** fprofile-generate=
*** 2128,2133 ****
--- 2220,2229 ----
  Common Joined RejectNegative
  Enable common options for generating profile info for profile feedback directed optimizations, and set -fprofile-dir=.
  
+ fprofile-partial-training
+ Common Report Var(flag_profile_partial_training) Optimization
+ Do not assume that functions never executed during the train run are cold.
+ 
  fprofile-use
  Common Var(flag_profile_use)
  Enable common options for performing profile feedback directed optimizations.
*************** Common Report Var(profile_report)
*** 2145,2151 ****
  Report on consistency of profile.
  
  fprofile-reorder-functions
! Common Report Var(flag_profile_reorder_functions)
  Enable function reordering that improves code placement.
  
  fpatchable-function-entry=
--- 2241,2247 ----
  Report on consistency of profile.
  
  fprofile-reorder-functions
! Common Report Var(flag_profile_reorder_functions) Optimization
  Enable function reordering that improves code placement.
  
  fpatchable-function-entry=
*************** Enum(live_patching_level) String(inline-
*** 2203,2208 ****
--- 2299,2308 ----
  EnumValue
  Enum(live_patching_level) String(inline-clone) Value(LIVE_PATCHING_INLINE_CLONE)
  
+ fallocation-dce
+ Common Report Var(flag_allocation_dce) Init(1) Optimization
+ Tell DCE to remove unused C++ allocations.
+ 
  flive-range-shrinkage
  Common Report Var(flag_live_range_shrinkage) Init(0) Optimization
  Relief of register pressure through live range shrinkage.
*************** Common Ignore
*** 2382,2388 ****
  Does nothing.  Preserved for backward compatibility.
  
  free
! Common Report Var(flag_ree) Init(0)
  Turn on Redundant Extensions Elimination pass.
  
  fshow-column
--- 2482,2488 ----
  Does nothing.  Preserved for backward compatibility.
  
  free
! Common Report Var(flag_ree) Init(0) Optimization
  Turn on Redundant Extensions Elimination pass.
  
  fshow-column
*************** fsplit-wide-types
*** 2422,2427 ****
--- 2522,2531 ----
  Common Report Var(flag_split_wide_types) Optimization
  Split wide types into independent registers.
  
+ fsplit-wide-types-early
+ Common Report Var(flag_split_wide_types_early) Optimization
+ Split wide types into independent registers earlier.
+ 
  fssa-backprop
  Common Report Var(flag_ssa_backprop) Init(1) Optimization
  Enable backward propagation of use properties at the SSA level.
*************** EnumValue
*** 2542,2548 ****
  Enum(tls_model) String(local-exec) Value(TLS_MODEL_LOCAL_EXEC)
  
  ftoplevel-reorder
! Common Report Var(flag_toplevel_reorder) Init(2)
  Reorder top level functions, variables, and asms.
  
  ftracer
--- 2646,2652 ----
  Enum(tls_model) String(local-exec) Value(TLS_MODEL_LOCAL_EXEC)
  
  ftoplevel-reorder
! Common Report Var(flag_toplevel_reorder) Init(2) Optimization
  Reorder top level functions, variables, and asms.
  
  ftracer
*************** Common Driver Var(dwarf2out_as_locview_s
*** 2976,2994 ****
  Assume assembler support for view in (DWARF2+) .loc directives.
  
  gcoff
! Common Driver Deprecated
  Does nothing.  Preserved for backward compatibility.
  
  gcoff1
! Common Driver Deprecated
  Does nothing.  Preserved for backward compatibility.
  
  gcoff2
! Common Driver Deprecated
  Does nothing.  Preserved for backward compatibility.
  
  gcoff3
! Common Driver Deprecated
  Does nothing.  Preserved for backward compatibility.
  
  gcolumn-info
--- 3080,3098 ----
  Assume assembler support for view in (DWARF2+) .loc directives.
  
  gcoff
! Common Driver WarnRemoved
  Does nothing.  Preserved for backward compatibility.
  
  gcoff1
! Common Driver WarnRemoved
  Does nothing.  Preserved for backward compatibility.
  
  gcoff2
! Common Driver WarnRemoved
  Does nothing.  Preserved for backward compatibility.
  
  gcoff3
! Common Driver WarnRemoved
  Does nothing.  Preserved for backward compatibility.
  
  gcolumn-info
diff -Nrcpad gcc-9.3.0/gcc/compare-elim.c gcc-10.1.0/gcc/compare-elim.c
*** gcc-9.3.0/gcc/compare-elim.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/compare-elim.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Post-reload compare elimination.
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Post-reload compare elimination.
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/conditions.h gcc-10.1.0/gcc/conditions.h
*** gcc-9.3.0/gcc/conditions.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/conditions.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for condition code handling in final.c and output routines.
!    Copyright (C) 1987-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for condition code handling in final.c and output routines.
!    Copyright (C) 1987-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-arches.def gcc-10.1.0/gcc/config/aarch64/aarch64-arches.def
*** gcc-9.3.0/gcc/config/aarch64/aarch64-arches.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-arches.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,4 ----
! /* Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
*************** AARCH64_ARCH("armv8.2-a",     generic,
*** 36,40 ****
--- 36,41 ----
  AARCH64_ARCH("armv8.3-a",     generic,	     8_3A,	8,  AARCH64_FL_FOR_ARCH8_3)
  AARCH64_ARCH("armv8.4-a",     generic,	     8_4A,	8,  AARCH64_FL_FOR_ARCH8_4)
  AARCH64_ARCH("armv8.5-a",     generic,	     8_5A,	8,  AARCH64_FL_FOR_ARCH8_5)
+ AARCH64_ARCH("armv8.6-a",     generic,	     8_6A,	8,  AARCH64_FL_FOR_ARCH8_6)
  
  #undef AARCH64_ARCH
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-bti-insert.c gcc-10.1.0/gcc/config/aarch64/aarch64-bti-insert.c
*** gcc-9.3.0/gcc/config/aarch64/aarch64-bti-insert.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-bti-insert.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Branch Target Identification for AArch64 architecture.
!    Copyright (C) 2019 Free Software Foundation, Inc.
     Contributed by Arm Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Branch Target Identification for AArch64 architecture.
!    Copyright (C) 2019-2020 Free Software Foundation, Inc.
     Contributed by Arm Ltd.
  
     This file is part of GCC.
*************** aarch64_pac_insn_p (rtx x)
*** 106,112 ****
  	  int unspec_val = XINT (sub, 1);
  	  switch (unspec_val)
  	    {
! 	    case UNSPEC_PACISP:
  	      return true;
  
  	    default:
--- 106,114 ----
  	  int unspec_val = XINT (sub, 1);
  	  switch (unspec_val)
  	    {
! 	    case UNSPEC_PACIASP:
!             /* fall-through.  */
!             case UNSPEC_PACIBSP:
  	      return true;
  
  	    default:
*************** rest_of_insert_bti (void)
*** 130,151 ****
    rtx_insn *insn;
    basic_block bb;
  
-   /* Since a Branch Target Exception can only be triggered by an indirect call,
-      we exempt function that are only called directly.  We also exempt
-      functions that are already protected by Return Address Signing (PACIASP/
-      PACIBSP).  For all other cases insert a BTI C at the beginning of the
-      function.  */
-   if (!cgraph_node::get (cfun->decl)->only_called_directly_p ())
-     {
-       bb = ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb;
-       insn = BB_HEAD (bb);
-       if (!aarch64_pac_insn_p (get_first_nonnote_insn ()))
- 	{
- 	  bti_insn = gen_bti_c ();
- 	  emit_insn_before (bti_insn, insn);
- 	}
-     }
- 
    bb = 0;
    FOR_EACH_BB_FN (bb, cfun)
      {
--- 132,137 ----
*************** rest_of_insert_bti (void)
*** 153,166 ****
  	   insn = NEXT_INSN (insn))
  	{
  	  /* If a label is marked to be preserved or can be a non-local goto
! 	     target, it must be protected with a BTI J.  The same applies to
! 	     NOTE_INSN_DELETED_LABEL since they are basically labels that might
! 	     be referenced via variables or constant pool.  */
! 	  if ((LABEL_P (insn)
  	       && (LABEL_PRESERVE_P (insn)
  		   || bb->flags & BB_NON_LOCAL_GOTO_TARGET))
- 	      || (NOTE_P (insn)
- 		  && NOTE_KIND (insn) == NOTE_INSN_DELETED_LABEL))
  	    {
  	      bti_insn = gen_bti_j ();
  	      emit_insn_after (bti_insn, insn);
--- 139,148 ----
  	   insn = NEXT_INSN (insn))
  	{
  	  /* If a label is marked to be preserved or can be a non-local goto
! 	     target, it must be protected with a BTI J.  */
! 	  if (LABEL_P (insn)
  	       && (LABEL_PRESERVE_P (insn)
  		   || bb->flags & BB_NON_LOCAL_GOTO_TARGET))
  	    {
  	      bti_insn = gen_bti_j ();
  	      emit_insn_after (bti_insn, insn);
*************** rest_of_insert_bti (void)
*** 201,206 ****
--- 183,204 ----
  	}
      }
  
+   /* Since a Branch Target Exception can only be triggered by an indirect call,
+      we exempt function that are only called directly.  We also exempt
+      functions that are already protected by Return Address Signing (PACIASP/
+      PACIBSP).  For all other cases insert a BTI C at the beginning of the
+      function.  */
+   if (!cgraph_node::get (cfun->decl)->only_called_directly_p ())
+     {
+       bb = ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb;
+       insn = BB_HEAD (bb);
+       if (!aarch64_pac_insn_p (get_first_nonnote_insn ()))
+ 	{
+ 	  bti_insn = gen_bti_c ();
+ 	  emit_insn_before (bti_insn, insn);
+ 	}
+     }
+ 
    timevar_pop (TV_MACH_DEP);
    return 0;
  }
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-builtins.c gcc-10.1.0/gcc/config/aarch64/aarch64-builtins.c
*** gcc-9.3.0/gcc/config/aarch64/aarch64-builtins.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-builtins.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Builtins' description for AArch64 SIMD architecture.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Builtins' description for AArch64 SIMD architecture.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 68,73 ****
--- 68,76 ----
  #define hi_UP    E_HImode
  #define hf_UP    E_HFmode
  #define qi_UP    E_QImode
+ #define bf_UP    E_BFmode
+ #define v4bf_UP  E_V4BFmode
+ #define v8bf_UP  E_V8BFmode
  #define UP(X) X##_UP
  
  #define SIMD_MAX_BUILTIN_ARGS 5
*************** enum aarch64_type_qualifiers
*** 107,112 ****
--- 110,118 ----
    /* Lane indices selected in pairs. - must be in range, and flipped for
       bigendian.  */
    qualifier_lane_pair_index = 0x800,
+   /* Lane indices selected in quadtuplets. - must be in range, and flipped for
+      bigendian.  */
+   qualifier_lane_quadtup_index = 0x1000,
  };
  
  typedef struct
*************** aarch64_types_ternopu_qualifiers[SIMD_MA
*** 169,178 ****
--- 175,193 ----
        qualifier_unsigned, qualifier_unsigned };
  #define TYPES_TERNOPU (aarch64_types_ternopu_qualifiers)
  static enum aarch64_type_qualifiers
+ aarch64_types_ternopu_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned,
+       qualifier_unsigned, qualifier_lane_index };
+ #define TYPES_TERNOPU_LANE (aarch64_types_ternopu_lane_qualifiers)
+ static enum aarch64_type_qualifiers
  aarch64_types_ternopu_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
    = { qualifier_unsigned, qualifier_unsigned,
        qualifier_unsigned, qualifier_immediate };
  #define TYPES_TERNOPUI (aarch64_types_ternopu_imm_qualifiers)
+ static enum aarch64_type_qualifiers
+ aarch64_types_ternop_ssus_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_unsigned, qualifier_none };
+ #define TYPES_TERNOP_SSUS (aarch64_types_ternop_ssus_qualifiers)
  
  
  static enum aarch64_type_qualifiers
*************** aarch64_types_quadopu_lane_qualifiers[SI
*** 192,197 ****
--- 207,225 ----
  #define TYPES_QUADOPU_LANE (aarch64_types_quadopu_lane_qualifiers)
  
  static enum aarch64_type_qualifiers
+ aarch64_types_quadopssus_lane_quadtup_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_unsigned,
+       qualifier_none, qualifier_lane_quadtup_index };
+ #define TYPES_QUADOPSSUS_LANE_QUADTUP \
+ 	(aarch64_types_quadopssus_lane_quadtup_qualifiers)
+ static enum aarch64_type_qualifiers
+ aarch64_types_quadopsssu_lane_quadtup_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_none,
+       qualifier_unsigned, qualifier_lane_quadtup_index };
+ #define TYPES_QUADOPSSSU_LANE_QUADTUP \
+ 	(aarch64_types_quadopsssu_lane_quadtup_qualifiers)
+ 
+ static enum aarch64_type_qualifiers
  aarch64_types_quadopu_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
    = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned,
        qualifier_unsigned, qualifier_immediate };
*************** aarch64_types_storestruct_lane_qualifier
*** 347,352 ****
--- 375,386 ----
  #define VAR14(T, X, MAP, A, B, C, D, E, F, G, H, I, J, K, L, M, N) \
    VAR13 (T, X, MAP, A, B, C, D, E, F, G, H, I, J, K, L, M) \
    VAR1 (T, X, MAP, N)
+ #define VAR15(T, X, MAP, A, B, C, D, E, F, G, H, I, J, K, L, M, N, O) \
+   VAR14 (T, X, MAP, A, B, C, D, E, F, G, H, I, J, K, L, M, N) \
+   VAR1 (T, X, MAP, O)
+ #define VAR16(T, X, MAP, A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P) \
+   VAR15 (T, X, MAP, A, B, C, D, E, F, G, H, I, J, K, L, M, N, O) \
+   VAR1 (T, X, MAP, P)
  
  #include "aarch64-builtin-iterators.h"
  
*************** enum aarch64_builtins
*** 432,441 ****
--- 466,496 ----
    /* ARMv8.3-A Pointer Authentication Builtins.  */
    AARCH64_PAUTH_BUILTIN_AUTIA1716,
    AARCH64_PAUTH_BUILTIN_PACIA1716,
+   AARCH64_PAUTH_BUILTIN_AUTIB1716,
+   AARCH64_PAUTH_BUILTIN_PACIB1716,
    AARCH64_PAUTH_BUILTIN_XPACLRI,
    /* Special cased Armv8.3-A Complex FMA by Lane quad Builtins.  */
    AARCH64_SIMD_FCMLA_LANEQ_BUILTIN_BASE,
    AARCH64_SIMD_FCMLA_LANEQ_BUILTINS
+   /* Builtin for Arm8.3-a Javascript conversion instruction.  */
+   AARCH64_JSCVT,
+   /* TME builtins.  */
+   AARCH64_TME_BUILTIN_TSTART,
+   AARCH64_TME_BUILTIN_TCOMMIT,
+   AARCH64_TME_BUILTIN_TTEST,
+   AARCH64_TME_BUILTIN_TCANCEL,
+   /* Armv8.5-a RNG instruction builtins.  */
+   AARCH64_BUILTIN_RNG_RNDR,
+   AARCH64_BUILTIN_RNG_RNDRRS,
+   /* MEMTAG builtins.  */
+   AARCH64_MEMTAG_BUILTIN_START,
+   AARCH64_MEMTAG_BUILTIN_IRG,
+   AARCH64_MEMTAG_BUILTIN_GMI,
+   AARCH64_MEMTAG_BUILTIN_SUBP,
+   AARCH64_MEMTAG_BUILTIN_INC_TAG,
+   AARCH64_MEMTAG_BUILTIN_SET_TAG,
+   AARCH64_MEMTAG_BUILTIN_GET_TAG,
+   AARCH64_MEMTAG_BUILTIN_END,
    AARCH64_BUILTIN_MAX
  };
  
*************** const char *aarch64_scalar_builtin_types
*** 490,495 ****
--- 545,551 ----
    "__builtin_aarch64_simd_oi",
    "__builtin_aarch64_simd_ci",
    "__builtin_aarch64_simd_xi",
+   "__builtin_aarch64_simd_bf",
    NULL
  };
  
*************** static tree aarch64_simd_intXI_type_node
*** 547,552 ****
--- 603,623 ----
  tree aarch64_fp16_type_node = NULL_TREE;
  tree aarch64_fp16_ptr_type_node = NULL_TREE;
  
+ /* Back-end node type for brain float (bfloat) types.  */
+ tree aarch64_bf16_type_node = NULL_TREE;
+ tree aarch64_bf16_ptr_type_node = NULL_TREE;
+ 
+ /* Wrapper around add_builtin_function.  NAME is the name of the built-in
+    function, TYPE is the function type, and CODE is the function subcode
+    (relative to AARCH64_BUILTIN_GENERAL).  */
+ static tree
+ aarch64_general_add_builtin (const char *name, tree type, unsigned int code)
+ {
+   code = (code << AARCH64_BUILTIN_SHIFT) | AARCH64_BUILTIN_GENERAL;
+   return add_builtin_function (name, type, code, BUILT_IN_MD,
+ 			       NULL, NULL_TREE);
+ }
+ 
  static const char *
  aarch64_mangle_builtin_scalar_type (const_tree type)
  {
*************** aarch64_mangle_builtin_vector_type (cons
*** 585,591 ****
  }
  
  const char *
! aarch64_mangle_builtin_type (const_tree type)
  {
    const char *mangle;
    /* Walk through all the AArch64 builtins types tables to filter out the
--- 656,662 ----
  }
  
  const char *
! aarch64_general_mangle_builtin_type (const_tree type)
  {
    const char *mangle;
    /* Walk through all the AArch64 builtins types tables to filter out the
*************** aarch64_simd_builtin_std_type (machine_m
*** 627,632 ****
--- 698,705 ----
        return float_type_node;
      case E_DFmode:
        return double_type_node;
+     case E_BFmode:
+       return aarch64_bf16_type_node;
      default:
        gcc_unreachable ();
      }
*************** aarch64_init_simd_builtin_types (void)
*** 718,723 ****
--- 791,800 ----
    aarch64_simd_types[Float64x1_t].eltype = double_type_node;
    aarch64_simd_types[Float64x2_t].eltype = double_type_node;
  
+   /* Init Bfloat vector types with underlying __bf16 type.  */
+   aarch64_simd_types[Bfloat16x4_t].eltype = aarch64_bf16_type_node;
+   aarch64_simd_types[Bfloat16x8_t].eltype = aarch64_bf16_type_node;
+ 
    for (i = 0; i < nelts; i++)
      {
        tree eltype = aarch64_simd_types[i].eltype;
*************** aarch64_init_simd_builtin_scalar_types (
*** 782,787 ****
--- 859,866 ----
  					     "__builtin_aarch64_simd_poly128");
    (*lang_hooks.types.register_builtin_type) (intTI_type_node,
  					     "__builtin_aarch64_simd_ti");
+   (*lang_hooks.types.register_builtin_type) (aarch64_bf16_type_node,
+ 					     "__builtin_aarch64_simd_bf");
    /* Unsigned integer types for various mode sizes.  */
    (*lang_hooks.types.register_builtin_type) (unsigned_intQI_type_node,
  					     "__builtin_aarch64_simd_uqi");
*************** aarch64_init_fcmla_laneq_builtins (void)
*** 816,823 ****
  	= aarch64_simd_builtin_std_type (SImode, qualifier_lane_pair_index);
        tree ftype = build_function_type_list (argtype, argtype, argtype,
  					     quadtype, lanetype, NULL_TREE);
!       tree fndecl = add_builtin_function (d->name, ftype, d->fcode,
! 					  BUILT_IN_MD, NULL, NULL_TREE);
  
        aarch64_builtin_decls[d->fcode] = fndecl;
      }
--- 895,901 ----
  	= aarch64_simd_builtin_std_type (SImode, qualifier_lane_pair_index);
        tree ftype = build_function_type_list (argtype, argtype, argtype,
  					     quadtype, lanetype, NULL_TREE);
!       tree fndecl = aarch64_general_add_builtin (d->name, ftype, d->fcode);
  
        aarch64_builtin_decls[d->fcode] = fndecl;
      }
*************** aarch64_init_simd_builtins (void)
*** 846,855 ****
  						  size_type_node,
  						  intSI_type_node,
  						  NULL);
!   aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_LANE_CHECK] =
!       add_builtin_function ("__builtin_aarch64_im_lane_boundsi", lane_check_fpr,
! 			    AARCH64_SIMD_BUILTIN_LANE_CHECK, BUILT_IN_MD,
! 			    NULL, NULL_TREE);
  
    for (i = 0; i < ARRAY_SIZE (aarch64_simd_builtin_data); i++, fcode++)
      {
--- 924,933 ----
  						  size_type_node,
  						  intSI_type_node,
  						  NULL);
!   aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_LANE_CHECK]
!     = aarch64_general_add_builtin ("__builtin_aarch64_im_lane_boundsi",
! 				   lane_check_fpr,
! 				   AARCH64_SIMD_BUILTIN_LANE_CHECK);
  
    for (i = 0; i < ARRAY_SIZE (aarch64_simd_builtin_data); i++, fcode++)
      {
*************** aarch64_init_simd_builtins (void)
*** 947,954 ****
  	snprintf (namebuf, sizeof (namebuf), "__builtin_aarch64_%s",
  		  d->name);
  
!       fndecl = add_builtin_function (namebuf, ftype, fcode, BUILT_IN_MD,
! 				     NULL, NULL_TREE);
        aarch64_builtin_decls[fcode] = fndecl;
      }
  
--- 1025,1031 ----
  	snprintf (namebuf, sizeof (namebuf), "__builtin_aarch64_%s",
  		  d->name);
  
!       fndecl = aarch64_general_add_builtin (namebuf, ftype, fcode);
        aarch64_builtin_decls[fcode] = fndecl;
      }
  
*************** aarch64_init_crc32_builtins ()
*** 968,975 ****
        tree argtype = aarch64_simd_builtin_std_type (d->mode,
  						    qualifier_unsigned);
        tree ftype = build_function_type_list (usi_type, usi_type, argtype, NULL_TREE);
!       tree fndecl = add_builtin_function (d->name, ftype, d->fcode,
!                                           BUILT_IN_MD, NULL, NULL_TREE);
  
        aarch64_builtin_decls[d->fcode] = fndecl;
      }
--- 1045,1051 ----
        tree argtype = aarch64_simd_builtin_std_type (d->mode,
  						    qualifier_unsigned);
        tree ftype = build_function_type_list (usi_type, usi_type, argtype, NULL_TREE);
!       tree fndecl = aarch64_general_add_builtin (d->name, ftype, d->fcode);
  
        aarch64_builtin_decls[d->fcode] = fndecl;
      }
*************** aarch64_init_builtin_rsqrt (void)
*** 1009,1016 ****
    for (; bdd < bdd_end; bdd++)
    {
      ftype = build_function_type_list (bdd->type_node, bdd->type_node, NULL_TREE);
!     fndecl = add_builtin_function (bdd->builtin_name,
!       ftype, bdd->function_code, BUILT_IN_MD, NULL, NULL_TREE);
      aarch64_builtin_decls[bdd->function_code] = fndecl;
    }
  }
--- 1085,1092 ----
    for (; bdd < bdd_end; bdd++)
    {
      ftype = build_function_type_list (bdd->type_node, bdd->type_node, NULL_TREE);
!     fndecl = aarch64_general_add_builtin (bdd->builtin_name,
! 					  ftype, bdd->function_code);
      aarch64_builtin_decls[bdd->function_code] = fndecl;
    }
  }
*************** aarch64_init_fp16_types (void)
*** 1030,1035 ****
--- 1106,1124 ----
    aarch64_fp16_ptr_type_node = build_pointer_type (aarch64_fp16_type_node);
  }
  
+ /* Initialize the backend REAL_TYPE type supporting bfloat types.  */
+ static void
+ aarch64_init_bf16_types (void)
+ {
+   aarch64_bf16_type_node = make_node (REAL_TYPE);
+   TYPE_PRECISION (aarch64_bf16_type_node) = 16;
+   SET_TYPE_MODE (aarch64_bf16_type_node, BFmode);
+   layout_type (aarch64_bf16_type_node);
+ 
+   lang_hooks.types.register_builtin_type (aarch64_bf16_type_node, "__bf16");
+   aarch64_bf16_ptr_type_node = build_pointer_type (aarch64_bf16_type_node);
+ }
+ 
  /* Pointer authentication builtins that will become NOP on legacy platform.
     Currently, these builtins are for internal use only (libgcc EH unwinder).  */
  
*************** aarch64_init_pauth_hint_builtins (void)
*** 1044,1064 ****
      = build_function_type_list (ptr_type_node, ptr_type_node, NULL_TREE);
  
    aarch64_builtin_decls[AARCH64_PAUTH_BUILTIN_AUTIA1716]
!     = add_builtin_function ("__builtin_aarch64_autia1716", ftype_pointer_auth,
! 			    AARCH64_PAUTH_BUILTIN_AUTIA1716, BUILT_IN_MD, NULL,
! 			    NULL_TREE);
    aarch64_builtin_decls[AARCH64_PAUTH_BUILTIN_PACIA1716]
!     = add_builtin_function ("__builtin_aarch64_pacia1716", ftype_pointer_auth,
! 			    AARCH64_PAUTH_BUILTIN_PACIA1716, BUILT_IN_MD, NULL,
! 			    NULL_TREE);
    aarch64_builtin_decls[AARCH64_PAUTH_BUILTIN_XPACLRI]
!     = add_builtin_function ("__builtin_aarch64_xpaclri", ftype_pointer_strip,
! 			    AARCH64_PAUTH_BUILTIN_XPACLRI, BUILT_IN_MD, NULL,
! 			    NULL_TREE);
  }
  
  void
! aarch64_init_builtins (void)
  {
    tree ftype_set_fpr
      = build_function_type_list (void_type_node, unsigned_type_node, NULL);
--- 1133,1254 ----
      = build_function_type_list (ptr_type_node, ptr_type_node, NULL_TREE);
  
    aarch64_builtin_decls[AARCH64_PAUTH_BUILTIN_AUTIA1716]
!     = aarch64_general_add_builtin ("__builtin_aarch64_autia1716",
! 				   ftype_pointer_auth,
! 				   AARCH64_PAUTH_BUILTIN_AUTIA1716);
    aarch64_builtin_decls[AARCH64_PAUTH_BUILTIN_PACIA1716]
!     = aarch64_general_add_builtin ("__builtin_aarch64_pacia1716",
! 				   ftype_pointer_auth,
! 				   AARCH64_PAUTH_BUILTIN_PACIA1716);
!   aarch64_builtin_decls[AARCH64_PAUTH_BUILTIN_AUTIB1716]
!     = aarch64_general_add_builtin ("__builtin_aarch64_autib1716",
! 				   ftype_pointer_auth,
! 				   AARCH64_PAUTH_BUILTIN_AUTIB1716);
!   aarch64_builtin_decls[AARCH64_PAUTH_BUILTIN_PACIB1716]
!     = aarch64_general_add_builtin ("__builtin_aarch64_pacib1716",
! 				   ftype_pointer_auth,
! 				   AARCH64_PAUTH_BUILTIN_PACIB1716);
    aarch64_builtin_decls[AARCH64_PAUTH_BUILTIN_XPACLRI]
!     = aarch64_general_add_builtin ("__builtin_aarch64_xpaclri",
! 				   ftype_pointer_strip,
! 				   AARCH64_PAUTH_BUILTIN_XPACLRI);
! }
! 
! /* Initialize the transactional memory extension (TME) builtins.  */
! static void
! aarch64_init_tme_builtins (void)
! {
!   tree ftype_uint64_void
!     = build_function_type_list (uint64_type_node, NULL);
!   tree ftype_void_void
!     = build_function_type_list (void_type_node, NULL);
!   tree ftype_void_uint64
!     = build_function_type_list (void_type_node, uint64_type_node, NULL);
! 
!   aarch64_builtin_decls[AARCH64_TME_BUILTIN_TSTART]
!     = aarch64_general_add_builtin ("__builtin_aarch64_tstart",
! 				   ftype_uint64_void,
! 				   AARCH64_TME_BUILTIN_TSTART);
!   aarch64_builtin_decls[AARCH64_TME_BUILTIN_TTEST]
!     = aarch64_general_add_builtin ("__builtin_aarch64_ttest",
! 				   ftype_uint64_void,
! 				   AARCH64_TME_BUILTIN_TTEST);
!   aarch64_builtin_decls[AARCH64_TME_BUILTIN_TCOMMIT]
!     = aarch64_general_add_builtin ("__builtin_aarch64_tcommit",
! 				   ftype_void_void,
! 				   AARCH64_TME_BUILTIN_TCOMMIT);
!   aarch64_builtin_decls[AARCH64_TME_BUILTIN_TCANCEL]
!     = aarch64_general_add_builtin ("__builtin_aarch64_tcancel",
! 				   ftype_void_uint64,
! 				   AARCH64_TME_BUILTIN_TCANCEL);
! }
! 
! /* Add builtins for Random Number instructions.  */
! 
! static void
! aarch64_init_rng_builtins (void)
! {
!   tree unsigned_ptr_type = build_pointer_type (unsigned_intDI_type_node);
!   tree ftype
!     = build_function_type_list (integer_type_node, unsigned_ptr_type, NULL);
!   aarch64_builtin_decls[AARCH64_BUILTIN_RNG_RNDR]
!     = aarch64_general_add_builtin ("__builtin_aarch64_rndr", ftype,
! 				   AARCH64_BUILTIN_RNG_RNDR);
!   aarch64_builtin_decls[AARCH64_BUILTIN_RNG_RNDRRS]
!     = aarch64_general_add_builtin ("__builtin_aarch64_rndrrs", ftype,
! 				   AARCH64_BUILTIN_RNG_RNDRRS);
! }
! 
! /* Initialize the memory tagging extension (MTE) builtins.  */
! struct
! {
!   tree ftype;
!   enum insn_code icode;
! } aarch64_memtag_builtin_data[AARCH64_MEMTAG_BUILTIN_END -
! 			      AARCH64_MEMTAG_BUILTIN_START - 1];
! 
! static void
! aarch64_init_memtag_builtins (void)
! {
!   tree fntype = NULL;
! 
! #define AARCH64_INIT_MEMTAG_BUILTINS_DECL(F, N, I, T) \
!   aarch64_builtin_decls[AARCH64_MEMTAG_BUILTIN_##F] \
!     = aarch64_general_add_builtin ("__builtin_aarch64_memtag_"#N, \
! 				   T, AARCH64_MEMTAG_BUILTIN_##F); \
!   aarch64_memtag_builtin_data[AARCH64_MEMTAG_BUILTIN_##F - \
! 			      AARCH64_MEMTAG_BUILTIN_START - 1] = \
! 				{T, CODE_FOR_##I};
! 
!   fntype = build_function_type_list (ptr_type_node, ptr_type_node,
! 				     uint64_type_node, NULL);
!   AARCH64_INIT_MEMTAG_BUILTINS_DECL (IRG, irg, irg, fntype);
! 
!   fntype = build_function_type_list (uint64_type_node, ptr_type_node,
! 				     uint64_type_node, NULL);
!   AARCH64_INIT_MEMTAG_BUILTINS_DECL (GMI, gmi, gmi, fntype);
! 
!   fntype = build_function_type_list (ptrdiff_type_node, ptr_type_node,
! 				     ptr_type_node, NULL);
!   AARCH64_INIT_MEMTAG_BUILTINS_DECL (SUBP, subp, subp, fntype);
! 
!   fntype = build_function_type_list (ptr_type_node, ptr_type_node,
! 				     unsigned_type_node, NULL);
!   AARCH64_INIT_MEMTAG_BUILTINS_DECL (INC_TAG, inc_tag, addg, fntype);
! 
!   fntype = build_function_type_list (void_type_node, ptr_type_node, NULL);
!   AARCH64_INIT_MEMTAG_BUILTINS_DECL (SET_TAG, set_tag, stg, fntype);
! 
!   fntype = build_function_type_list (ptr_type_node, ptr_type_node, NULL);
!   AARCH64_INIT_MEMTAG_BUILTINS_DECL (GET_TAG, get_tag, ldg, fntype);
! 
! #undef AARCH64_INIT_MEMTAG_BUILTINS_DECL
  }
  
+ /* Initialize all builtins in the AARCH64_BUILTIN_GENERAL group.  */
+ 
  void
! aarch64_general_init_builtins (void)
  {
    tree ftype_set_fpr
      = build_function_type_list (void_type_node, unsigned_type_node, NULL);
*************** aarch64_init_builtins (void)
*** 1066,1090 ****
      = build_function_type_list (unsigned_type_node, NULL);
  
    aarch64_builtin_decls[AARCH64_BUILTIN_GET_FPCR]
!     = add_builtin_function ("__builtin_aarch64_get_fpcr", ftype_get_fpr,
! 			    AARCH64_BUILTIN_GET_FPCR, BUILT_IN_MD, NULL, NULL_TREE);
    aarch64_builtin_decls[AARCH64_BUILTIN_SET_FPCR]
!     = add_builtin_function ("__builtin_aarch64_set_fpcr", ftype_set_fpr,
! 			    AARCH64_BUILTIN_SET_FPCR, BUILT_IN_MD, NULL, NULL_TREE);
    aarch64_builtin_decls[AARCH64_BUILTIN_GET_FPSR]
!     = add_builtin_function ("__builtin_aarch64_get_fpsr", ftype_get_fpr,
! 			    AARCH64_BUILTIN_GET_FPSR, BUILT_IN_MD, NULL, NULL_TREE);
    aarch64_builtin_decls[AARCH64_BUILTIN_SET_FPSR]
!     = add_builtin_function ("__builtin_aarch64_set_fpsr", ftype_set_fpr,
! 			    AARCH64_BUILTIN_SET_FPSR, BUILT_IN_MD, NULL, NULL_TREE);
  
    aarch64_init_fp16_types ();
  
    if (TARGET_SIMD)
      aarch64_init_simd_builtins ();
  
    aarch64_init_crc32_builtins ();
    aarch64_init_builtin_rsqrt ();
  
    /* Initialize pointer authentication builtins which are backed by instructions
       in NOP encoding space.
--- 1256,1293 ----
      = build_function_type_list (unsigned_type_node, NULL);
  
    aarch64_builtin_decls[AARCH64_BUILTIN_GET_FPCR]
!     = aarch64_general_add_builtin ("__builtin_aarch64_get_fpcr",
! 				   ftype_get_fpr,
! 				   AARCH64_BUILTIN_GET_FPCR);
    aarch64_builtin_decls[AARCH64_BUILTIN_SET_FPCR]
!     = aarch64_general_add_builtin ("__builtin_aarch64_set_fpcr",
! 				   ftype_set_fpr,
! 				   AARCH64_BUILTIN_SET_FPCR);
    aarch64_builtin_decls[AARCH64_BUILTIN_GET_FPSR]
!     = aarch64_general_add_builtin ("__builtin_aarch64_get_fpsr",
! 				   ftype_get_fpr,
! 				   AARCH64_BUILTIN_GET_FPSR);
    aarch64_builtin_decls[AARCH64_BUILTIN_SET_FPSR]
!     = aarch64_general_add_builtin ("__builtin_aarch64_set_fpsr",
! 				   ftype_set_fpr,
! 				   AARCH64_BUILTIN_SET_FPSR);
  
    aarch64_init_fp16_types ();
  
+   aarch64_init_bf16_types ();
+ 
    if (TARGET_SIMD)
      aarch64_init_simd_builtins ();
  
    aarch64_init_crc32_builtins ();
    aarch64_init_builtin_rsqrt ();
+   aarch64_init_rng_builtins ();
+ 
+   tree ftype_jcvt
+     = build_function_type_list (intSI_type_node, double_type_node, NULL);
+   aarch64_builtin_decls[AARCH64_JSCVT]
+     = aarch64_general_add_builtin ("__builtin_aarch64_jcvtzs", ftype_jcvt,
+ 				   AARCH64_JSCVT);
  
    /* Initialize pointer authentication builtins which are backed by instructions
       in NOP encoding space.
*************** aarch64_init_builtins (void)
*** 1094,1103 ****
       register them.  */
    if (!TARGET_ILP32)
      aarch64_init_pauth_hint_builtins ();
  }
  
  tree
! aarch64_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED)
  {
    if (code >= AARCH64_BUILTIN_MAX)
      return error_mark_node;
--- 1297,1313 ----
       register them.  */
    if (!TARGET_ILP32)
      aarch64_init_pauth_hint_builtins ();
+ 
+   if (TARGET_TME)
+     aarch64_init_tme_builtins ();
+ 
+   if (TARGET_MEMTAG)
+     aarch64_init_memtag_builtins ();
  }
  
+ /* Implement TARGET_BUILTIN_DECL for the AARCH64_BUILTIN_GENERAL group.  */
  tree
! aarch64_general_builtin_decl (unsigned code, bool)
  {
    if (code >= AARCH64_BUILTIN_MAX)
      return error_mark_node;
*************** typedef enum
*** 1112,1117 ****
--- 1322,1328 ----
    SIMD_ARG_LANE_INDEX,
    SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX,
    SIMD_ARG_LANE_PAIR_INDEX,
+   SIMD_ARG_LANE_QUADTUP_INDEX,
    SIMD_ARG_STOP
  } builtin_simd_arg;
  
*************** aarch64_simd_expand_args (rtx target, in
*** 1201,1209 ****
  		  op[opc] = gen_int_mode (ENDIAN_LANE_N (nunits / 2, lane),
  					  SImode);
  		}
! 	      /* Fall through - if the lane index isn't a constant then
! 		 the next case will error.  */
! 	      /* FALLTHRU */
  	    case SIMD_ARG_CONSTANT:
  constant_arg:
  	      if (!(*insn_data[icode].operand[opc].predicate)
--- 1412,1436 ----
  		  op[opc] = gen_int_mode (ENDIAN_LANE_N (nunits / 2, lane),
  					  SImode);
  		}
! 	      /* If the lane index isn't a constant then error out.  */
! 	      goto constant_arg;
! 	    case SIMD_ARG_LANE_QUADTUP_INDEX:
! 	      /* Must be a previous operand into which this is an index and
! 		 index is restricted to nunits / 4.  */
! 	      gcc_assert (opc > 0);
! 	      if (CONST_INT_P (op[opc]))
! 		{
! 		  machine_mode vmode = insn_data[icode].operand[opc - 1].mode;
! 		  unsigned int nunits
! 		    = GET_MODE_NUNITS (vmode).to_constant ();
! 		  aarch64_simd_lane_bounds (op[opc], 0, nunits / 4, exp);
! 		  /* Keep to GCC-vector-extension lane indices in the RTL.  */
! 		  int lane = INTVAL (op[opc]);
! 		  op[opc] = gen_int_mode (ENDIAN_LANE_N (nunits / 4, lane),
! 					  SImode);
! 		}
! 	      /* If the lane index isn't a constant then error out.  */
! 	      goto constant_arg;
  	    case SIMD_ARG_CONSTANT:
  constant_arg:
  	      if (!(*insn_data[icode].operand[opc].predicate)
*************** aarch64_simd_expand_builtin (int fcode,
*** 1316,1321 ****
--- 1543,1550 ----
  	args[k] = SIMD_ARG_LANE_INDEX;
        else if (d->qualifiers[qualifiers_k] & qualifier_lane_pair_index)
  	args[k] = SIMD_ARG_LANE_PAIR_INDEX;
+       else if (d->qualifiers[qualifiers_k] & qualifier_lane_quadtup_index)
+ 	args[k] = SIMD_ARG_LANE_QUADTUP_INDEX;
        else if (d->qualifiers[qualifiers_k] & qualifier_struct_load_store_lane_index)
  	args[k] = SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX;
        else if (d->qualifiers[qualifiers_k] & qualifier_immediate)
*************** aarch64_expand_fcmla_builtin (tree exp,
*** 1497,1513 ****
    return target;
  }
  
! /* Expand an expression EXP that calls a built-in function,
!    with result going to TARGET if that's convenient.  */
  rtx
! aarch64_expand_builtin (tree exp,
! 		     rtx target,
! 		     rtx subtarget ATTRIBUTE_UNUSED,
! 		     machine_mode mode ATTRIBUTE_UNUSED,
! 		     int ignore ATTRIBUTE_UNUSED)
  {
-   tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
-   int fcode = DECL_FUNCTION_CODE (fndecl);
    int icode;
    rtx pat, op0;
    tree arg0;
--- 1726,1888 ----
    return target;
  }
  
! /* Function to expand an expression EXP which calls one of the Transactional
!    Memory Extension (TME) builtins FCODE with the result going to TARGET.  */
! static rtx
! aarch64_expand_builtin_tme (int fcode, tree exp, rtx target)
! {
!   switch (fcode)
!     {
!     case AARCH64_TME_BUILTIN_TSTART:
!       target = gen_reg_rtx (DImode);
!       emit_insn (GEN_FCN (CODE_FOR_tstart) (target));
!       break;
! 
!     case AARCH64_TME_BUILTIN_TTEST:
!       target = gen_reg_rtx (DImode);
!       emit_insn (GEN_FCN (CODE_FOR_ttest) (target));
!       break;
! 
!     case AARCH64_TME_BUILTIN_TCOMMIT:
!       emit_insn (GEN_FCN (CODE_FOR_tcommit) ());
!       break;
! 
!     case AARCH64_TME_BUILTIN_TCANCEL:
!       {
! 	tree arg0 = CALL_EXPR_ARG (exp, 0);
! 	rtx op0 = expand_normal (arg0);
! 	if (CONST_INT_P (op0) && UINTVAL (op0) <= 65536)
! 	  emit_insn (GEN_FCN (CODE_FOR_tcancel) (op0));
! 	else
! 	  {
! 	    error ("%Kargument must be a 16-bit constant immediate", exp);
! 	    return const0_rtx;
! 	  }
!       }
!       break;
! 
!     default :
!       gcc_unreachable ();
!     }
!     return target;
! }
! 
! /* Expand a random number builtin EXP with code FCODE, putting the result
!    int TARGET.  If IGNORE is true the return value is ignored.  */
! 
  rtx
! aarch64_expand_rng_builtin (tree exp, rtx target, int fcode, int ignore)
! {
!   rtx pat;
!   enum insn_code icode;
!   if (fcode == AARCH64_BUILTIN_RNG_RNDR)
!     icode = CODE_FOR_aarch64_rndr;
!   else if (fcode == AARCH64_BUILTIN_RNG_RNDRRS)
!     icode = CODE_FOR_aarch64_rndrrs;
!   else
!     gcc_unreachable ();
! 
!   rtx rand = gen_reg_rtx (DImode);
!   pat = GEN_FCN (icode) (rand);
!   if (!pat)
!     return NULL_RTX;
! 
!   tree arg0 = CALL_EXPR_ARG (exp, 0);
!   rtx res_addr = expand_normal (arg0);
!   res_addr = convert_memory_address (Pmode, res_addr);
!   rtx res_mem = gen_rtx_MEM (DImode, res_addr);
!   emit_insn (pat);
!   emit_move_insn (res_mem, rand);
!   /* If the status result is unused don't generate the CSET code.  */
!   if (ignore)
!     return target;
! 
!   rtx cc_reg = gen_rtx_REG (CC_Zmode, CC_REGNUM);
!   rtx cmp_rtx = gen_rtx_fmt_ee (NE, SImode, cc_reg, const0_rtx);
!   emit_insn (gen_aarch64_cstoresi (target, cmp_rtx, cc_reg));
!   return target;
! }
! 
! /* Expand an expression EXP that calls a MEMTAG built-in FCODE
!    with result going to TARGET.  */
! static rtx
! aarch64_expand_builtin_memtag (int fcode, tree exp, rtx target)
! {
!   if (TARGET_ILP32)
!     {
!       error ("Memory Tagging Extension does not support %<-mabi=ilp32%>");
!       return const0_rtx;
!     }
! 
!   rtx pat = NULL;
!   enum insn_code icode = aarch64_memtag_builtin_data[fcode -
! 			   AARCH64_MEMTAG_BUILTIN_START - 1].icode;
! 
!   rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
!   machine_mode mode0 = GET_MODE (op0);
!   op0 = force_reg (mode0 == VOIDmode ? DImode : mode0, op0);
!   op0 = convert_to_mode (DImode, op0, true);
! 
!   switch (fcode)
!     {
!       case AARCH64_MEMTAG_BUILTIN_IRG:
!       case AARCH64_MEMTAG_BUILTIN_GMI:
!       case AARCH64_MEMTAG_BUILTIN_SUBP:
!       case AARCH64_MEMTAG_BUILTIN_INC_TAG:
! 	{
! 	  if (! target
! 	      || GET_MODE (target) != DImode
! 	      || ! (*insn_data[icode].operand[0].predicate) (target, DImode))
! 	    target = gen_reg_rtx (DImode);
! 
! 	  if (fcode == AARCH64_MEMTAG_BUILTIN_INC_TAG)
! 	    {
! 	      rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
! 
! 	      if ((*insn_data[icode].operand[3].predicate) (op1, QImode))
! 		{
! 		  pat = GEN_FCN (icode) (target, op0, const0_rtx, op1);
! 		  break;
! 		}
! 	      error ("%Kargument %d must be a constant immediate "
! 		     "in range [0,15]", exp, 2);
! 	      return const0_rtx;
! 	    }
! 	  else
! 	    {
! 	      rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
! 	      machine_mode mode1 = GET_MODE (op1);
! 	      op1 = force_reg (mode1 == VOIDmode ? DImode : mode1, op1);
! 	      op1 = convert_to_mode (DImode, op1, true);
! 	      pat = GEN_FCN (icode) (target, op0, op1);
! 	    }
! 	  break;
! 	}
!       case AARCH64_MEMTAG_BUILTIN_GET_TAG:
! 	target = op0;
! 	pat = GEN_FCN (icode) (target, op0, const0_rtx);
! 	break;
!       case AARCH64_MEMTAG_BUILTIN_SET_TAG:
! 	pat = GEN_FCN (icode) (op0, op0, const0_rtx);
! 	break;
!       default:
! 	gcc_unreachable();
!     }
! 
!   if (!pat)
!     return NULL_RTX;
! 
!   emit_insn (pat);
!   return target;
! }
! 
! /* Expand an expression EXP that calls built-in function FCODE,
!    with result going to TARGET if that's convenient.  IGNORE is true
!    if the result of the builtin is ignored.  */
! rtx
! aarch64_general_expand_builtin (unsigned int fcode, tree exp, rtx target,
! 				int ignore)
  {
    int icode;
    rtx pat, op0;
    tree arg0;
*************** aarch64_expand_builtin (tree exp,
*** 1540,1545 ****
--- 1915,1922 ----
  
      case AARCH64_PAUTH_BUILTIN_AUTIA1716:
      case AARCH64_PAUTH_BUILTIN_PACIA1716:
+     case AARCH64_PAUTH_BUILTIN_AUTIB1716:
+     case AARCH64_PAUTH_BUILTIN_PACIB1716:
      case AARCH64_PAUTH_BUILTIN_XPACLRI:
        arg0 = CALL_EXPR_ARG (exp, 0);
        op0 = force_reg (Pmode, expand_normal (arg0));
*************** aarch64_expand_builtin (tree exp,
*** 1563,1570 ****
  	{
  	  tree arg1 = CALL_EXPR_ARG (exp, 1);
  	  rtx op1 = force_reg (Pmode, expand_normal (arg1));
! 	  icode = (fcode == AARCH64_PAUTH_BUILTIN_PACIA1716
! 		   ? CODE_FOR_paci1716 : CODE_FOR_auti1716);
  
  	  rtx x16_reg = gen_rtx_REG (Pmode, R16_REGNUM);
  	  rtx x17_reg = gen_rtx_REG (Pmode, R17_REGNUM);
--- 1940,1963 ----
  	{
  	  tree arg1 = CALL_EXPR_ARG (exp, 1);
  	  rtx op1 = force_reg (Pmode, expand_normal (arg1));
! 	  switch (fcode)
! 	    {
! 	    case AARCH64_PAUTH_BUILTIN_AUTIA1716:
! 	      icode = CODE_FOR_autia1716;
! 	      break;
! 	    case AARCH64_PAUTH_BUILTIN_AUTIB1716:
! 	      icode = CODE_FOR_autib1716;
! 	      break;
! 	    case AARCH64_PAUTH_BUILTIN_PACIA1716:
! 	      icode = CODE_FOR_pacia1716;
! 	      break;
! 	    case AARCH64_PAUTH_BUILTIN_PACIB1716:
! 	      icode = CODE_FOR_pacib1716;
! 	      break;
! 	    default:
! 	      icode = 0;
! 	      gcc_unreachable ();
! 	    }
  
  	  rtx x16_reg = gen_rtx_REG (Pmode, R16_REGNUM);
  	  rtx x17_reg = gen_rtx_REG (Pmode, R17_REGNUM);
*************** aarch64_expand_builtin (tree exp,
*** 1576,1581 ****
--- 1969,1984 ----
  
        return target;
  
+     case AARCH64_JSCVT:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op0 = force_reg (DFmode, expand_normal (arg0));
+       if (!target)
+ 	target = gen_reg_rtx (SImode);
+       else
+ 	target = force_reg (SImode, target);
+       emit_insn (GEN_FCN (CODE_FOR_aarch64_fjcvtzs) (target, op0));
+       return target;
+ 
      case AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V2SF:
      case AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V2SF:
      case AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V2SF:
*************** aarch64_expand_builtin (tree exp,
*** 1585,1590 ****
--- 1988,1996 ----
      case AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V4HF:
      case AARCH64_SIMD_BUILTIN_FCMLA_LANEQ270_V4HF:
        return aarch64_expand_fcmla_builtin (exp, target, fcode);
+     case AARCH64_BUILTIN_RNG_RNDR:
+     case AARCH64_BUILTIN_RNG_RNDRRS:
+       return aarch64_expand_rng_builtin (exp, target, fcode, ignore);
      }
  
    if (fcode >= AARCH64_SIMD_BUILTIN_BASE && fcode <= AARCH64_SIMD_BUILTIN_MAX)
*************** aarch64_expand_builtin (tree exp,
*** 1599,1604 ****
--- 2005,2020 ----
        || fcode == AARCH64_BUILTIN_RSQRT_V4SF)
      return aarch64_expand_builtin_rsqrt (fcode, exp, target);
  
+   if (fcode == AARCH64_TME_BUILTIN_TSTART
+       || fcode == AARCH64_TME_BUILTIN_TCOMMIT
+       || fcode == AARCH64_TME_BUILTIN_TTEST
+       || fcode == AARCH64_TME_BUILTIN_TCANCEL)
+     return aarch64_expand_builtin_tme (fcode, exp, target);
+ 
+   if (fcode >= AARCH64_MEMTAG_BUILTIN_START
+       && fcode <= AARCH64_MEMTAG_BUILTIN_END)
+     return aarch64_expand_builtin_memtag (fcode, exp, target);
+ 
    gcc_unreachable ();
  }
  
*************** aarch64_builtin_vectorized_function (uns
*** 1607,1623 ****
  				     tree type_in)
  {
    machine_mode in_mode, out_mode;
-   unsigned HOST_WIDE_INT in_n, out_n;
  
    if (TREE_CODE (type_out) != VECTOR_TYPE
        || TREE_CODE (type_in) != VECTOR_TYPE)
      return NULL_TREE;
  
!   out_mode = TYPE_MODE (TREE_TYPE (type_out));
!   in_mode = TYPE_MODE (TREE_TYPE (type_in));
!   if (!TYPE_VECTOR_SUBPARTS (type_out).is_constant (&out_n)
!       || !TYPE_VECTOR_SUBPARTS (type_in).is_constant (&in_n))
!     return NULL_TREE;
  
  #undef AARCH64_CHECK_BUILTIN_MODE
  #define AARCH64_CHECK_BUILTIN_MODE(C, N) 1
--- 2023,2035 ----
  				     tree type_in)
  {
    machine_mode in_mode, out_mode;
  
    if (TREE_CODE (type_out) != VECTOR_TYPE
        || TREE_CODE (type_in) != VECTOR_TYPE)
      return NULL_TREE;
  
!   out_mode = TYPE_MODE (type_out);
!   in_mode = TYPE_MODE (type_in);
  
  #undef AARCH64_CHECK_BUILTIN_MODE
  #define AARCH64_CHECK_BUILTIN_MODE(C, N) 1
*************** aarch64_builtin_vectorized_function (uns
*** 1633,1640 ****
      {
  #undef AARCH64_CHECK_BUILTIN_MODE
  #define AARCH64_CHECK_BUILTIN_MODE(C, N) \
!   (out_mode == N##Fmode && out_n == C \
!    && in_mode == N##Fmode && in_n == C)
      CASE_CFN_FLOOR:
        return AARCH64_FIND_FRINT_VARIANT (floor);
      CASE_CFN_CEIL:
--- 2045,2051 ----
      {
  #undef AARCH64_CHECK_BUILTIN_MODE
  #define AARCH64_CHECK_BUILTIN_MODE(C, N) \
!   (out_mode == V##C##N##Fmode && in_mode == V##C##N##Fmode)
      CASE_CFN_FLOOR:
        return AARCH64_FIND_FRINT_VARIANT (floor);
      CASE_CFN_CEIL:
*************** aarch64_builtin_vectorized_function (uns
*** 1649,1656 ****
        return AARCH64_FIND_FRINT_VARIANT (sqrt);
  #undef AARCH64_CHECK_BUILTIN_MODE
  #define AARCH64_CHECK_BUILTIN_MODE(C, N) \
!   (out_mode == SImode && out_n == C \
!    && in_mode == N##Imode && in_n == C)
      CASE_CFN_CLZ:
        {
  	if (AARCH64_CHECK_BUILTIN_MODE (4, S))
--- 2060,2066 ----
        return AARCH64_FIND_FRINT_VARIANT (sqrt);
  #undef AARCH64_CHECK_BUILTIN_MODE
  #define AARCH64_CHECK_BUILTIN_MODE(C, N) \
!   (out_mode == V##C##SImode && in_mode == V##C##N##Imode)
      CASE_CFN_CLZ:
        {
  	if (AARCH64_CHECK_BUILTIN_MODE (4, S))
*************** aarch64_builtin_vectorized_function (uns
*** 1667,1674 ****
        }
  #undef AARCH64_CHECK_BUILTIN_MODE
  #define AARCH64_CHECK_BUILTIN_MODE(C, N) \
!   (out_mode == N##Imode && out_n == C \
!    && in_mode == N##Fmode && in_n == C)
      CASE_CFN_IFLOOR:
      CASE_CFN_LFLOOR:
      CASE_CFN_LLFLOOR:
--- 2077,2083 ----
        }
  #undef AARCH64_CHECK_BUILTIN_MODE
  #define AARCH64_CHECK_BUILTIN_MODE(C, N) \
!   (out_mode == V##C##N##Imode && in_mode == V##C##N##Fmode)
      CASE_CFN_IFLOOR:
      CASE_CFN_LFLOOR:
      CASE_CFN_LLFLOOR:
*************** aarch64_builtin_vectorized_function (uns
*** 1717,1745 ****
  
  	return aarch64_builtin_decls[builtin];
        }
-     case CFN_BUILT_IN_BSWAP16:
- #undef AARCH64_CHECK_BUILTIN_MODE
- #define AARCH64_CHECK_BUILTIN_MODE(C, N) \
-   (out_mode == N##Imode && out_n == C \
-    && in_mode == N##Imode && in_n == C)
-       if (AARCH64_CHECK_BUILTIN_MODE (4, H))
- 	return aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_UNOPU_bswapv4hi];
-       else if (AARCH64_CHECK_BUILTIN_MODE (8, H))
- 	return aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_UNOPU_bswapv8hi];
-       else
- 	return NULL_TREE;
-     case CFN_BUILT_IN_BSWAP32:
-       if (AARCH64_CHECK_BUILTIN_MODE (2, S))
- 	return aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_UNOPU_bswapv2si];
-       else if (AARCH64_CHECK_BUILTIN_MODE (4, S))
- 	return aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_UNOPU_bswapv4si];
-       else
- 	return NULL_TREE;
-     case CFN_BUILT_IN_BSWAP64:
-       if (AARCH64_CHECK_BUILTIN_MODE (2, D))
- 	return aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_UNOPU_bswapv2di];
-       else
- 	return NULL_TREE;
      default:
        return NULL_TREE;
      }
--- 2126,2131 ----
*************** aarch64_builtin_vectorized_function (uns
*** 1750,1756 ****
  /* Return builtin for reciprocal square root.  */
  
  tree
! aarch64_builtin_rsqrt (unsigned int fn)
  {
    if (fn == AARCH64_SIMD_BUILTIN_UNOP_sqrtv2df)
      return aarch64_builtin_decls[AARCH64_BUILTIN_RSQRT_V2DF];
--- 2136,2142 ----
  /* Return builtin for reciprocal square root.  */
  
  tree
! aarch64_general_builtin_rsqrt (unsigned int fn)
  {
    if (fn == AARCH64_SIMD_BUILTIN_UNOP_sqrtv2df)
      return aarch64_builtin_decls[AARCH64_BUILTIN_RSQRT_V2DF];
*************** aarch64_builtin_rsqrt (unsigned int fn)
*** 1765,1777 ****
  #define VAR1(T, N, MAP, A) \
    case AARCH64_SIMD_BUILTIN_##T##_##N##A:
  
  tree
! aarch64_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *args,
! 		      bool ignore ATTRIBUTE_UNUSED)
  {
-   int fcode = DECL_FUNCTION_CODE (fndecl);
-   tree type = TREE_TYPE (TREE_TYPE (fndecl));
- 
    switch (fcode)
      {
        BUILTIN_VDQF (UNOP, abs, 2)
--- 2151,2164 ----
  #define VAR1(T, N, MAP, A) \
    case AARCH64_SIMD_BUILTIN_##T##_##N##A:
  
+ /* Try to fold a call to the built-in function with subcode FCODE.  The
+    function is passed the N_ARGS arguments in ARGS and it returns a value
+    of type TYPE.  Return the new expression on success and NULL_TREE on
+    failure.  */
  tree
! aarch64_general_fold_builtin (unsigned int fcode, tree type,
! 			      unsigned int n_args ATTRIBUTE_UNUSED, tree *args)
  {
    switch (fcode)
      {
        BUILTIN_VDQF (UNOP, abs, 2)
*************** aarch64_fold_builtin (tree fndecl, int n
*** 1787,1895 ****
    return NULL_TREE;
  }
  
! bool
! aarch64_gimple_fold_builtin (gimple_stmt_iterator *gsi)
  {
-   bool changed = false;
-   gimple *stmt = gsi_stmt (*gsi);
-   tree call = gimple_call_fn (stmt);
-   tree fndecl;
    gimple *new_stmt = NULL;
  
!   if (call)
      {
!       fndecl = gimple_call_fndecl (stmt);
!       if (fndecl)
  	{
! 	  int fcode = DECL_FUNCTION_CODE (fndecl);
! 	  unsigned nargs = gimple_call_num_args (stmt);
! 	  tree *args = (nargs > 0
! 			? gimple_call_arg_ptr (stmt, 0)
! 			: &error_mark_node);
! 
! 	  /* We use gimple's IFN_REDUC_(PLUS|MIN|MAX)s for float, signed int
! 	     and unsigned int; it will distinguish according to the types of
! 	     the arguments to the __builtin.  */
! 	  switch (fcode)
  	    {
! 	      BUILTIN_VALL (UNOP, reduc_plus_scal_, 10)
! 	        new_stmt = gimple_build_call_internal (IFN_REDUC_PLUS,
! 						       1, args[0]);
! 		gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt));
! 		break;
! 	      BUILTIN_VDQIF (UNOP, reduc_smax_scal_, 10)
! 	      BUILTIN_VDQ_BHSI (UNOPU, reduc_umax_scal_, 10)
! 	        new_stmt = gimple_build_call_internal (IFN_REDUC_MAX,
! 						       1, args[0]);
! 		gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt));
! 		break;
! 	      BUILTIN_VDQIF (UNOP, reduc_smin_scal_, 10)
! 	      BUILTIN_VDQ_BHSI (UNOPU, reduc_umin_scal_, 10)
! 	        new_stmt = gimple_build_call_internal (IFN_REDUC_MIN,
! 						       1, args[0]);
! 		gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt));
! 		break;
! 	      BUILTIN_GPF (BINOP, fmulx, 0)
  		{
! 		  gcc_assert (nargs == 2);
! 		  bool a0_cst_p = TREE_CODE (args[0]) == REAL_CST;
! 		  bool a1_cst_p = TREE_CODE (args[1]) == REAL_CST;
! 		  if (a0_cst_p || a1_cst_p)
! 		    {
! 		      if (a0_cst_p && a1_cst_p)
! 			{
! 			  tree t0 = TREE_TYPE (args[0]);
! 			  real_value a0 = (TREE_REAL_CST (args[0]));
! 			  real_value a1 = (TREE_REAL_CST (args[1]));
! 			  if (real_equal (&a1, &dconst0))
! 			    std::swap (a0, a1);
! 			  /* According to real_equal (), +0 equals -0.  */
! 			  if (real_equal (&a0, &dconst0) && real_isinf (&a1))
! 			    {
! 			      real_value res = dconst2;
! 			      res.sign = a0.sign ^ a1.sign;
! 			      new_stmt =
! 				gimple_build_assign (gimple_call_lhs (stmt),
! 						     REAL_CST,
! 						     build_real (t0, res));
! 			    }
! 			  else
! 			    new_stmt =
! 			      gimple_build_assign (gimple_call_lhs (stmt),
! 						   MULT_EXPR,
! 						   args[0], args[1]);
! 			}
! 		      else /* a0_cst_p ^ a1_cst_p.  */
! 			{
! 			  real_value const_part = a0_cst_p
! 			    ? TREE_REAL_CST (args[0]) : TREE_REAL_CST (args[1]);
! 			  if (!real_equal (&const_part, &dconst0)
! 			      && !real_isinf (&const_part))
! 			    new_stmt =
! 			      gimple_build_assign (gimple_call_lhs (stmt),
! 						   MULT_EXPR, args[0], args[1]);
! 			}
! 		    }
! 		  if (new_stmt)
  		    {
! 		      gimple_set_vuse (new_stmt, gimple_vuse (stmt));
! 		      gimple_set_vdef (new_stmt, gimple_vdef (stmt));
  		    }
! 		  break;
  		}
! 	    default:
! 	      break;
  	    }
  	}
      }
! 
!   if (new_stmt)
!     {
!       gsi_replace (gsi, new_stmt, true);
!       changed = true;
!     }
! 
!   return changed;
  }
  
  void
--- 2174,2263 ----
    return NULL_TREE;
  }
  
! /* Try to fold STMT, given that it's a call to the built-in function with
!    subcode FCODE.  Return the new statement on success and null on
!    failure.  */
! gimple *
! aarch64_general_gimple_fold_builtin (unsigned int fcode, gcall *stmt)
  {
    gimple *new_stmt = NULL;
+   unsigned nargs = gimple_call_num_args (stmt);
+   tree *args = (nargs > 0
+ 		? gimple_call_arg_ptr (stmt, 0)
+ 		: &error_mark_node);
  
!   /* We use gimple's IFN_REDUC_(PLUS|MIN|MAX)s for float, signed int
!      and unsigned int; it will distinguish according to the types of
!      the arguments to the __builtin.  */
!   switch (fcode)
      {
!       BUILTIN_VALL (UNOP, reduc_plus_scal_, 10)
! 	new_stmt = gimple_build_call_internal (IFN_REDUC_PLUS,
! 					       1, args[0]);
! 	gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt));
! 	break;
!       BUILTIN_VDQIF (UNOP, reduc_smax_scal_, 10)
!       BUILTIN_VDQ_BHSI (UNOPU, reduc_umax_scal_, 10)
! 	new_stmt = gimple_build_call_internal (IFN_REDUC_MAX,
! 					       1, args[0]);
! 	gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt));
! 	break;
!       BUILTIN_VDQIF (UNOP, reduc_smin_scal_, 10)
!       BUILTIN_VDQ_BHSI (UNOPU, reduc_umin_scal_, 10)
! 	new_stmt = gimple_build_call_internal (IFN_REDUC_MIN,
! 					       1, args[0]);
! 	gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt));
! 	break;
!       BUILTIN_GPF (BINOP, fmulx, 0)
  	{
! 	  gcc_assert (nargs == 2);
! 	  bool a0_cst_p = TREE_CODE (args[0]) == REAL_CST;
! 	  bool a1_cst_p = TREE_CODE (args[1]) == REAL_CST;
! 	  if (a0_cst_p || a1_cst_p)
  	    {
! 	      if (a0_cst_p && a1_cst_p)
  		{
! 		  tree t0 = TREE_TYPE (args[0]);
! 		  real_value a0 = (TREE_REAL_CST (args[0]));
! 		  real_value a1 = (TREE_REAL_CST (args[1]));
! 		  if (real_equal (&a1, &dconst0))
! 		    std::swap (a0, a1);
! 		  /* According to real_equal (), +0 equals -0.  */
! 		  if (real_equal (&a0, &dconst0) && real_isinf (&a1))
  		    {
! 		      real_value res = dconst2;
! 		      res.sign = a0.sign ^ a1.sign;
! 		      new_stmt = gimple_build_assign (gimple_call_lhs (stmt),
! 						      REAL_CST,
! 						      build_real (t0, res));
  		    }
! 		  else
! 		    new_stmt = gimple_build_assign (gimple_call_lhs (stmt),
! 						    MULT_EXPR,
! 						    args[0], args[1]);
  		}
! 	      else /* a0_cst_p ^ a1_cst_p.  */
! 		{
! 		  real_value const_part = a0_cst_p
! 		    ? TREE_REAL_CST (args[0]) : TREE_REAL_CST (args[1]);
! 		  if (!real_equal (&const_part, &dconst0)
! 		      && !real_isinf (&const_part))
! 		    new_stmt = gimple_build_assign (gimple_call_lhs (stmt),
! 						    MULT_EXPR, args[0],
! 						    args[1]);
! 		}
! 	    }
! 	  if (new_stmt)
! 	    {
! 	      gimple_set_vuse (new_stmt, gimple_vuse (stmt));
! 	      gimple_set_vdef (new_stmt, gimple_vdef (stmt));
  	    }
+ 	  break;
  	}
+     default:
+       break;
      }
!   return new_stmt;
  }
  
  void
*************** aarch64_atomic_assign_expand_fenv (tree
*** 1945,1954 ****
    mask_sr = build_int_cst (unsigned_type_node,
  			   ~(AARCH64_FE_ALL_EXCEPT));
  
!   ld_fenv_cr = build2 (MODIFY_EXPR, unsigned_type_node,
! 		       fenv_cr, build_call_expr (get_fpcr, 0));
!   ld_fenv_sr = build2 (MODIFY_EXPR, unsigned_type_node,
! 		       fenv_sr, build_call_expr (get_fpsr, 0));
  
    masked_fenv_cr = build2 (BIT_AND_EXPR, unsigned_type_node, fenv_cr, mask_cr);
    masked_fenv_sr = build2 (BIT_AND_EXPR, unsigned_type_node, fenv_sr, mask_sr);
--- 2313,2324 ----
    mask_sr = build_int_cst (unsigned_type_node,
  			   ~(AARCH64_FE_ALL_EXCEPT));
  
!   ld_fenv_cr = build4 (TARGET_EXPR, unsigned_type_node,
! 		       fenv_cr, build_call_expr (get_fpcr, 0),
! 		       NULL_TREE, NULL_TREE);
!   ld_fenv_sr = build4 (TARGET_EXPR, unsigned_type_node,
! 		       fenv_sr, build_call_expr (get_fpsr, 0),
! 		       NULL_TREE, NULL_TREE);
  
    masked_fenv_cr = build2 (BIT_AND_EXPR, unsigned_type_node, fenv_cr, mask_cr);
    masked_fenv_sr = build2 (BIT_AND_EXPR, unsigned_type_node, fenv_sr, mask_sr);
*************** aarch64_atomic_assign_expand_fenv (tree
*** 1980,1987 ****
         __atomic_feraiseexcept (new_fenv_var);  */
  
    new_fenv_var = create_tmp_var_raw (unsigned_type_node);
!   reload_fenv = build2 (MODIFY_EXPR, unsigned_type_node,
! 			new_fenv_var, build_call_expr (get_fpsr, 0));
    restore_fnenv = build_call_expr (set_fpsr, 1, fenv_sr);
    atomic_feraiseexcept = builtin_decl_implicit (BUILT_IN_ATOMIC_FERAISEEXCEPT);
    update_call = build_call_expr (atomic_feraiseexcept, 1,
--- 2350,2358 ----
         __atomic_feraiseexcept (new_fenv_var);  */
  
    new_fenv_var = create_tmp_var_raw (unsigned_type_node);
!   reload_fenv = build4 (TARGET_EXPR, unsigned_type_node,
! 			new_fenv_var, build_call_expr (get_fpsr, 0),
! 			NULL_TREE, NULL_TREE);
    restore_fnenv = build_call_expr (set_fpsr, 1, fenv_sr);
    atomic_feraiseexcept = builtin_decl_implicit (BUILT_IN_ATOMIC_FERAISEEXCEPT);
    update_call = build_call_expr (atomic_feraiseexcept, 1,
*************** aarch64_atomic_assign_expand_fenv (tree
*** 1991,1996 ****
--- 2362,2467 ----
  			    reload_fenv, restore_fnenv), update_call);
  }
  
+ /* Resolve overloaded MEMTAG build-in functions.  */
+ #define AARCH64_BUILTIN_SUBCODE(F) \
+   (DECL_MD_FUNCTION_CODE (F) >> AARCH64_BUILTIN_SHIFT)
+ 
+ static tree
+ aarch64_resolve_overloaded_memtag (location_t loc,
+ 				   tree fndecl, void *pass_params)
+ {
+   vec<tree, va_gc> *params = static_cast<vec<tree, va_gc> *> (pass_params);
+   unsigned param_num = params ? params->length() : 0;
+   unsigned int fcode = AARCH64_BUILTIN_SUBCODE (fndecl);
+   tree inittype = aarch64_memtag_builtin_data[
+ 		    fcode - AARCH64_MEMTAG_BUILTIN_START - 1].ftype;
+   unsigned arg_num = list_length (TYPE_ARG_TYPES (inittype)) - 1;
+ 
+   if (param_num != arg_num)
+     {
+       TREE_TYPE (fndecl) = inittype;
+       return NULL_TREE;
+     }
+   tree retype = NULL;
+ 
+   if (fcode == AARCH64_MEMTAG_BUILTIN_SUBP)
+     {
+       tree t0 = TREE_TYPE ((*params)[0]);
+       tree t1 = TREE_TYPE ((*params)[1]);
+ 
+       if (t0 == error_mark_node || TREE_CODE (t0) != POINTER_TYPE)
+ 	t0 = ptr_type_node;
+       if (t1 == error_mark_node || TREE_CODE (t1) != POINTER_TYPE)
+ 	t1 = ptr_type_node;
+ 
+       if (TYPE_MODE (t0) != DImode)
+ 	warning_at (loc, 1, "expected 64-bit address but argument 1 is %d-bit",
+ 	    (int)tree_to_shwi (DECL_SIZE ((*params)[0])));
+ 
+       if (TYPE_MODE (t1) != DImode)
+ 	warning_at (loc, 1, "expected 64-bit address but argument 2 is %d-bit",
+ 	    (int)tree_to_shwi (DECL_SIZE ((*params)[1])));
+ 
+       retype = build_function_type_list (ptrdiff_type_node, t0, t1, NULL);
+     }
+   else
+     {
+       tree t0 = TREE_TYPE ((*params)[0]);
+ 
+       if (t0 == error_mark_node || TREE_CODE (t0) != POINTER_TYPE)
+ 	{
+ 	  TREE_TYPE (fndecl) = inittype;
+ 	  return NULL_TREE;
+ 	}
+ 
+       if (TYPE_MODE (t0) != DImode)
+ 	warning_at (loc, 1, "expected 64-bit address but argument 1 is %d-bit",
+ 	    (int)tree_to_shwi (DECL_SIZE ((*params)[0])));
+ 
+       switch (fcode)
+ 	{
+ 	case AARCH64_MEMTAG_BUILTIN_IRG:
+ 	  retype = build_function_type_list (t0, t0, uint64_type_node, NULL);
+ 	  break;
+ 	case AARCH64_MEMTAG_BUILTIN_GMI:
+ 	  retype = build_function_type_list (uint64_type_node, t0,
+ 	      uint64_type_node, NULL);
+ 	  break;
+ 	case AARCH64_MEMTAG_BUILTIN_INC_TAG:
+ 	  retype = build_function_type_list (t0, t0, unsigned_type_node, NULL);
+ 	  break;
+ 	case AARCH64_MEMTAG_BUILTIN_SET_TAG:
+ 	  retype = build_function_type_list (void_type_node, t0, NULL);
+ 	  break;
+ 	case AARCH64_MEMTAG_BUILTIN_GET_TAG:
+ 	  retype = build_function_type_list (t0, t0, NULL);
+ 	  break;
+ 	default:
+ 	  return NULL_TREE;
+ 	}
+     }
+ 
+   if (!retype || retype == error_mark_node)
+     TREE_TYPE (fndecl) = inittype;
+   else
+     TREE_TYPE (fndecl) = retype;
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Called at aarch64_resolve_overloaded_builtin in aarch64-c.c.  */
+ tree
+ aarch64_resolve_overloaded_builtin_general (location_t loc, tree function,
+ 					    void *pass_params)
+ {
+   unsigned int fcode = AARCH64_BUILTIN_SUBCODE (function);
+ 
+   if (fcode >= AARCH64_MEMTAG_BUILTIN_START
+       && fcode <= AARCH64_MEMTAG_BUILTIN_END)
+     return aarch64_resolve_overloaded_memtag(loc, function, pass_params);
+ 
+   return NULL_TREE;
+ }
  
  #undef AARCH64_CHECK_BUILTIN_MODE
  #undef AARCH64_FIND_FRINT_VARIANT
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-c.c gcc-10.1.0/gcc/config/aarch64/aarch64-c.c
*** gcc-9.3.0/gcc/config/aarch64/aarch64-c.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-c.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target-specific code for C family languages.
!    Copyright (C) 2015-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Target-specific code for C family languages.
!    Copyright (C) 2015-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** aarch64_define_unconditional_macros (cpp
*** 69,74 ****
--- 69,76 ----
    builtin_define ("__ARM_FEATURE_UNALIGNED");
    builtin_define ("__ARM_PCS_AAPCS64");
    builtin_define_with_int_value ("__ARM_SIZEOF_WCHAR_T", WCHAR_TYPE_SIZE / 8);
+ 
+   builtin_define ("__GCC_ASM_FLAG_OUTPUTS__");
  }
  
  /* Undefine/redefine macros that depend on the current backend state and may
*************** aarch64_update_cpp_builtins (cpp_reader
*** 110,115 ****
--- 112,118 ----
    aarch64_def_or_undef (TARGET_CRC32, "__ARM_FEATURE_CRC32", pfile);
    aarch64_def_or_undef (TARGET_DOTPROD, "__ARM_FEATURE_DOTPROD", pfile);
    aarch64_def_or_undef (TARGET_COMPLEX, "__ARM_FEATURE_COMPLEX", pfile);
+   aarch64_def_or_undef (TARGET_JSCVT, "__ARM_FEATURE_JCVT", pfile);
  
    cpp_undef (pfile, "__AARCH64_CMODEL_TINY__");
    cpp_undef (pfile, "__AARCH64_CMODEL_SMALL__");
*************** aarch64_update_cpp_builtins (cpp_reader
*** 146,151 ****
--- 149,168 ----
  	bits = 0;
        builtin_define_with_int_value ("__ARM_FEATURE_SVE_BITS", bits);
      }
+   aarch64_def_or_undef (TARGET_SVE, "__ARM_FEATURE_SVE_VECTOR_OPERATIONS",
+ 			pfile);
+   aarch64_def_or_undef (TARGET_SVE_I8MM,
+ 			"__ARM_FEATURE_SVE_MATMUL_INT8", pfile);
+   aarch64_def_or_undef (TARGET_SVE_F32MM,
+ 			"__ARM_FEATURE_SVE_MATMUL_FP32", pfile);
+   aarch64_def_or_undef (TARGET_SVE_F64MM,
+ 			"__ARM_FEATURE_SVE_MATMUL_FP64", pfile);
+   aarch64_def_or_undef (TARGET_SVE2, "__ARM_FEATURE_SVE2", pfile);
+   aarch64_def_or_undef (TARGET_SVE2_AES, "__ARM_FEATURE_SVE2_AES", pfile);
+   aarch64_def_or_undef (TARGET_SVE2_BITPERM,
+ 			"__ARM_FEATURE_SVE2_BITPERM", pfile);
+   aarch64_def_or_undef (TARGET_SVE2_SHA3, "__ARM_FEATURE_SVE2_SHA3", pfile);
+   aarch64_def_or_undef (TARGET_SVE2_SM4, "__ARM_FEATURE_SVE2_SM4", pfile);
  
    aarch64_def_or_undef (TARGET_LSE, "__ARM_FEATURE_ATOMICS", pfile);
    aarch64_def_or_undef (TARGET_AES, "__ARM_FEATURE_AES", pfile);
*************** aarch64_update_cpp_builtins (cpp_reader
*** 156,161 ****
--- 173,189 ----
    aarch64_def_or_undef (TARGET_SM4, "__ARM_FEATURE_SM4", pfile);
    aarch64_def_or_undef (TARGET_F16FML, "__ARM_FEATURE_FP16_FML", pfile);
  
+   aarch64_def_or_undef (TARGET_FRINT, "__ARM_FEATURE_FRINT", pfile);
+   aarch64_def_or_undef (TARGET_TME, "__ARM_FEATURE_TME", pfile);
+   aarch64_def_or_undef (TARGET_RNG, "__ARM_FEATURE_RNG", pfile);
+   aarch64_def_or_undef (TARGET_MEMTAG, "__ARM_FEATURE_MEMORY_TAGGING", pfile);
+ 
+   aarch64_def_or_undef (TARGET_I8MM, "__ARM_FEATURE_MATMUL_INT8", pfile);
+   aarch64_def_or_undef (TARGET_BF16_SIMD,
+ 			"__ARM_FEATURE_BF16_VECTOR_ARITHMETIC", pfile);
+   aarch64_def_or_undef (TARGET_BF16_FP,
+ 			"__ARM_FEATURE_BF16_SCALAR_ARITHMETIC", pfile);
+ 
    /* Not for ACLE, but required to keep "float.h" correct if we switch
       target between implementations that do or do not support ARMv8.2-A
       16-bit floating-point extensions.  */
*************** aarch64_pragma_target_parse (tree args,
*** 237,242 ****
--- 265,337 ----
    return true;
  }
  
+ /* Implement "#pragma GCC aarch64".  */
+ static void
+ aarch64_pragma_aarch64 (cpp_reader *)
+ {
+   tree x;
+   if (pragma_lex (&x) != CPP_STRING)
+     {
+       error ("%<#pragma GCC aarch64%> requires a string parameter");
+       return;
+     }
+ 
+   const char *name = TREE_STRING_POINTER (x);
+   if (strcmp (name, "arm_sve.h") == 0)
+     aarch64_sve::handle_arm_sve_h ();
+   else
+     error ("unknown %<#pragma GCC aarch64%> option %qs", name);
+ }
+ 
+ /* Implement TARGET_RESOLVE_OVERLOADED_BUILTIN.  */
+ static tree
+ aarch64_resolve_overloaded_builtin (unsigned int uncast_location,
+ 				    tree fndecl, void *uncast_arglist)
+ {
+   vec<tree, va_gc> empty = {};
+   location_t location = (location_t) uncast_location;
+   vec<tree, va_gc> *arglist = (uncast_arglist
+ 			       ? (vec<tree, va_gc> *) uncast_arglist
+ 			       : &empty);
+   unsigned int code = DECL_MD_FUNCTION_CODE (fndecl);
+   unsigned int subcode = code >> AARCH64_BUILTIN_SHIFT;
+   tree new_fndecl;
+   switch (code & AARCH64_BUILTIN_CLASS)
+     {
+     case AARCH64_BUILTIN_GENERAL:
+       return aarch64_resolve_overloaded_builtin_general (location, fndecl,
+ 							 uncast_arglist);
+     case AARCH64_BUILTIN_SVE:
+       new_fndecl = aarch64_sve::resolve_overloaded_builtin (location, subcode,
+ 							    arglist);
+       break;
+     }
+   if (new_fndecl == NULL_TREE || new_fndecl == error_mark_node)
+     return new_fndecl;
+   return build_function_call_vec (location, vNULL, new_fndecl, arglist,
+ 				  NULL, fndecl);
+ }
+ 
+ /* Implement TARGET_CHECK_BUILTIN_CALL.  */
+ static bool
+ aarch64_check_builtin_call (location_t loc, vec<location_t> arg_loc,
+ 			    tree fndecl, tree orig_fndecl,
+ 			    unsigned int nargs, tree *args)
+ {
+   unsigned int code = DECL_MD_FUNCTION_CODE (fndecl);
+   unsigned int subcode = code >> AARCH64_BUILTIN_SHIFT;
+   switch (code & AARCH64_BUILTIN_CLASS)
+     {
+     case AARCH64_BUILTIN_GENERAL:
+       return true;
+ 
+     case AARCH64_BUILTIN_SVE:
+       return aarch64_sve::check_builtin_call (loc, arg_loc, subcode,
+ 					      orig_fndecl, nargs, args);
+     }
+   gcc_unreachable ();
+ }
+ 
  /* Implement REGISTER_TARGET_PRAGMAS.  */
  
  void
*************** aarch64_register_pragmas (void)
*** 244,247 ****
--- 339,347 ----
  {
    /* Update pragma hook to allow parsing #pragma GCC target.  */
    targetm.target_option.pragma_parse = aarch64_pragma_target_parse;
+ 
+   targetm.resolve_overloaded_builtin = aarch64_resolve_overloaded_builtin;
+   targetm.check_builtin_call = aarch64_check_builtin_call;
+ 
+   c_register_pragma ("GCC", "aarch64", aarch64_pragma_aarch64);
  }
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-cores.def gcc-10.1.0/gcc/config/aarch64/aarch64-cores.def
*** gcc-9.3.0/gcc/config/aarch64/aarch64-cores.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-cores.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,4 ----
! /* Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 46,51 ****
--- 46,52 ----
  /* ARMv8-A Architecture Processors.  */
  
  /* ARM ('A') cores. */
+ AARCH64_CORE("cortex-a34",  cortexa34, cortexa53, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa35, 0x41, 0xd02, -1)
  AARCH64_CORE("cortex-a35",  cortexa35, cortexa53, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa35, 0x41, 0xd04, -1)
  AARCH64_CORE("cortex-a53",  cortexa53, cortexa53, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53, 0x41, 0xd03, -1)
  AARCH64_CORE("cortex-a57",  cortexa57, cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, 0x41, 0xd07, -1)
*************** AARCH64_CORE("thunderx2t99",  thunderx2t
*** 99,112 ****
  /* ARM ('A') cores. */
  AARCH64_CORE("cortex-a55",  cortexa55, cortexa53, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD, cortexa53, 0x41, 0xd05, -1)
  AARCH64_CORE("cortex-a75",  cortexa75, cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD, cortexa73, 0x41, 0xd0a, -1)
! AARCH64_CORE("cortex-a76",  cortexa76, cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD, cortexa72, 0x41, 0xd0b, -1)
  AARCH64_CORE("ares",  ares, cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD | AARCH64_FL_PROFILE, neoversen1, 0x41, 0xd0c, -1)
  AARCH64_CORE("neoverse-n1",  neoversen1, cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD | AARCH64_FL_PROFILE, neoversen1, 0x41, 0xd0c, -1)
! AARCH64_CORE("neoverse-e1",  neoversee1, cortexa53, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD | AARCH64_FL_SSBS, cortexa53, 0x41, 0xd4a, -1)
  
  /* HiSilicon ('H') cores. */
  AARCH64_CORE("tsv110",  tsv110, tsv110, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_CRYPTO | AARCH64_FL_F16 | AARCH64_FL_AES | AARCH64_FL_SHA2, tsv110,   0x48, 0xd01, -1)
  
  /* ARMv8.4-A Architecture Processors.  */
  
  /* Qualcomm ('Q') cores. */
--- 100,132 ----
  /* ARM ('A') cores. */
  AARCH64_CORE("cortex-a55",  cortexa55, cortexa53, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD, cortexa53, 0x41, 0xd05, -1)
  AARCH64_CORE("cortex-a75",  cortexa75, cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD, cortexa73, 0x41, 0xd0a, -1)
! AARCH64_CORE("cortex-a76",  cortexa76, cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD, neoversen1, 0x41, 0xd0b, -1)
! AARCH64_CORE("cortex-a76ae",  cortexa76ae, cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD | AARCH64_FL_SSBS, neoversen1, 0x41, 0xd0e, -1)
! AARCH64_CORE("cortex-a77",  cortexa77, cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD | AARCH64_FL_SSBS, neoversen1, 0x41, 0xd0d, -1)
! AARCH64_CORE("cortex-a65",  cortexa65, cortexa53, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD | AARCH64_FL_SSBS, cortexa73, 0x41, 0xd06, -1)
! AARCH64_CORE("cortex-a65ae",  cortexa65ae, cortexa53, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD | AARCH64_FL_SSBS, cortexa73, 0x41, 0xd43, -1)
  AARCH64_CORE("ares",  ares, cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD | AARCH64_FL_PROFILE, neoversen1, 0x41, 0xd0c, -1)
  AARCH64_CORE("neoverse-n1",  neoversen1, cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD | AARCH64_FL_PROFILE, neoversen1, 0x41, 0xd0c, -1)
! AARCH64_CORE("neoverse-e1",  neoversee1, cortexa53, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD | AARCH64_FL_SSBS, cortexa73, 0x41, 0xd4a, -1)
! 
! /* Cavium ('C') cores. */
! AARCH64_CORE("octeontx2",      octeontx2,      cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_CRYPTO | AARCH64_FL_PROFILE, cortexa57, 0x43, 0x0b0, -1)
! AARCH64_CORE("octeontx2t98",   octeontx2t98,   cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_CRYPTO | AARCH64_FL_PROFILE, cortexa57, 0x43, 0x0b1, -1)
! AARCH64_CORE("octeontx2t96",   octeontx2t96,   cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_CRYPTO | AARCH64_FL_PROFILE, cortexa57, 0x43, 0x0b2, -1)
! /* Note OcteonTX2 T93 is an alias to OcteonTX2 T96. */
! AARCH64_CORE("octeontx2t93",   octeontx2t93,   cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_CRYPTO | AARCH64_FL_PROFILE, cortexa57, 0x43, 0x0b2, -1)
! AARCH64_CORE("octeontx2f95",   octeontx2f95,   cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_CRYPTO | AARCH64_FL_PROFILE, cortexa57, 0x43, 0x0b3, -1)
! AARCH64_CORE("octeontx2f95n",  octeontx2f95n,  cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_CRYPTO | AARCH64_FL_PROFILE, cortexa57, 0x43, 0x0b4, -1)
! AARCH64_CORE("octeontx2f95mm", octeontx2f95mm, cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_CRYPTO | AARCH64_FL_PROFILE, cortexa57, 0x43, 0x0b5, -1)
  
  /* HiSilicon ('H') cores. */
  AARCH64_CORE("tsv110",  tsv110, tsv110, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_CRYPTO | AARCH64_FL_F16 | AARCH64_FL_AES | AARCH64_FL_SHA2, tsv110,   0x48, 0xd01, -1)
  
+ /* ARMv8.3-A Architecture Processors.  */
+ 
+ /* Marvell cores (TX3). */
+ AARCH64_CORE("thunderx3t110",  thunderx3t110,  thunderx3t110, 8_3A,  AARCH64_FL_FOR_ARCH8_3 | AARCH64_FL_CRYPTO | AARCH64_FL_RCPC | AARCH64_FL_SM4 | AARCH64_FL_SHA3 | AARCH64_FL_F16FML | AARCH64_FL_RCPC8_4, thunderx3t110, 0x43, 0x0b8, 0x0a)
+ 
  /* ARMv8.4-A Architecture Processors.  */
  
  /* Qualcomm ('Q') cores. */
*************** AARCH64_CORE("cortex-a73.cortex-a53",  c
*** 122,127 ****
  /* ARM DynamIQ big.LITTLE configurations.  */
  
  AARCH64_CORE("cortex-a75.cortex-a55",  cortexa75cortexa55, cortexa53, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD, cortexa73, 0x41, AARCH64_BIG_LITTLE (0xd0a, 0xd05), -1)
! AARCH64_CORE("cortex-a76.cortex-a55",  cortexa76cortexa55, cortexa53, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD, cortexa72, 0x41, AARCH64_BIG_LITTLE (0xd0b, 0xd05), -1)
  
  #undef AARCH64_CORE
--- 142,147 ----
  /* ARM DynamIQ big.LITTLE configurations.  */
  
  AARCH64_CORE("cortex-a75.cortex-a55",  cortexa75cortexa55, cortexa53, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD, cortexa73, 0x41, AARCH64_BIG_LITTLE (0xd0a, 0xd05), -1)
! AARCH64_CORE("cortex-a76.cortex-a55",  cortexa76cortexa55, cortexa53, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD, neoversen1, 0x41, AARCH64_BIG_LITTLE (0xd0b, 0xd05), -1)
  
  #undef AARCH64_CORE
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-cost-tables.h gcc-10.1.0/gcc/config/aarch64/aarch64-cost-tables.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-cost-tables.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-cost-tables.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* RTX cost tables for AArch64.
  
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,6 ----
  /* RTX cost tables for AArch64.
  
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** const struct cpu_cost_table thunderx2t99
*** 235,240 ****
--- 235,343 ----
  {
    /* ALU */
    {
+     0,			/* Arith.  */
+     0,			/* Logical.  */
+     0,			/* Shift.  */
+     0,			/* Shift_reg.  */
+     COSTS_N_INSNS (1),	/* Arith_shift.  */
+     COSTS_N_INSNS (1),	/* Arith_shift_reg.  */
+     COSTS_N_INSNS (1),	/* Log_shift.  */
+     COSTS_N_INSNS (1),	/* Log_shift_reg.  */
+     0,			/* Extend.  */
+     COSTS_N_INSNS (1),	/* Extend_arith.  */
+     0,			/* Bfi.  */
+     0,			/* Bfx.  */
+     COSTS_N_INSNS (3),	/* Clz.  */
+     0,			/* Rev.  */
+     0,			/* Non_exec.  */
+     true		/* Non_exec_costs_exec.  */
+   },
+   {
+     /* MULT SImode */
+     {
+       COSTS_N_INSNS (4),	/* Simple.  */
+       COSTS_N_INSNS (4),	/* Flag_setting.  */
+       COSTS_N_INSNS (4),	/* Extend.  */
+       COSTS_N_INSNS (5),	/* Add.  */
+       COSTS_N_INSNS (5),	/* Extend_add.  */
+       COSTS_N_INSNS (18)	/* Idiv.  */
+     },
+     /* MULT DImode */
+     {
+       COSTS_N_INSNS (4),       /* Simple.  */
+       0,                       /* Flag_setting.  */
+       COSTS_N_INSNS (4),       /* Extend.  */
+       COSTS_N_INSNS (5),       /* Add.  */
+       COSTS_N_INSNS (5),       /* Extend_add.  */
+       COSTS_N_INSNS (26)       /* Idiv.  */
+     }
+   },
+   /* LD/ST */
+   {
+     COSTS_N_INSNS (4),	/* Load.  */
+     COSTS_N_INSNS (4),	/* Load_sign_extend.  */
+     COSTS_N_INSNS (5),	/* Ldrd.  */
+     COSTS_N_INSNS (4),	/* Ldm_1st.  */
+     1,			/* Ldm_regs_per_insn_1st.  */
+     1,			/* Ldm_regs_per_insn_subsequent.  */
+     COSTS_N_INSNS (4),	/* Loadf.  */
+     COSTS_N_INSNS (4),	/* Loadd.  */
+     COSTS_N_INSNS (4),	/* Load_unaligned.  */
+     0,			/* Store.  */
+     0,			/* Strd.  */
+     0,			/* Stm_1st.  */
+     1,			/* Stm_regs_per_insn_1st.  */
+     1,			/* Stm_regs_per_insn_subsequent.  */
+     0,			/* Storef.  */
+     0,			/* Stored.  */
+     0,			/* Store_unaligned.  */
+     COSTS_N_INSNS (1),	/* Loadv.  */
+     COSTS_N_INSNS (1)	/* Storev.  */
+   },
+   {
+     /* FP SFmode */
+     {
+       COSTS_N_INSNS (4),	/* Div.  */
+       COSTS_N_INSNS (1),	/* Mult.  */
+       COSTS_N_INSNS (1),	/* Mult_addsub. */
+       COSTS_N_INSNS (1),	/* Fma.  */
+       COSTS_N_INSNS (1),	/* Addsub.  */
+       COSTS_N_INSNS (1),	/* Fpconst. */
+       COSTS_N_INSNS (1),	/* Neg.  */
+       COSTS_N_INSNS (1),	/* Compare.  */
+       COSTS_N_INSNS (2),	/* Widen.  */
+       COSTS_N_INSNS (2),	/* Narrow.  */
+       COSTS_N_INSNS (2),	/* Toint.  */
+       COSTS_N_INSNS (2),	/* Fromint.  */
+       COSTS_N_INSNS (2) 	/* Roundint.  */
+     },
+     /* FP DFmode */
+     {
+       COSTS_N_INSNS (6),	/* Div.  */
+       COSTS_N_INSNS (1),	/* Mult.  */
+       COSTS_N_INSNS (1),	/* Mult_addsub.  */
+       COSTS_N_INSNS (1),	/* Fma.  */
+       COSTS_N_INSNS (1),	/* Addsub.  */
+       COSTS_N_INSNS (1),	/* Fpconst.  */
+       COSTS_N_INSNS (1),	/* Neg.  */
+       COSTS_N_INSNS (1),	/* Compare.  */
+       COSTS_N_INSNS (2),	/* Widen.  */
+       COSTS_N_INSNS (2),	/* Narrow.  */
+       COSTS_N_INSNS (2),	/* Toint.  */
+       COSTS_N_INSNS (2),	/* Fromint.  */
+       COSTS_N_INSNS (2) 	/* Roundint.  */
+     }
+   },
+   /* Vector */
+   {
+     COSTS_N_INSNS (1)	/* Alu.  */
+   }
+ };
+ 
+ const struct cpu_cost_table thunderx3t110_extra_costs = 
+ {
+   /* ALU */
+   {
      0,			/* Arith.  */
      0,			/* Logical.  */
      0,			/* Shift.  */
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-d.c gcc-10.1.0/gcc/config/aarch64/aarch64-d.c
*** gcc-9.3.0/gcc/config/aarch64/aarch64-d.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-d.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines for the D front end on the AArch64 architecture.
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
  GCC is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
--- 1,5 ----
  /* Subroutines for the D front end on the AArch64 architecture.
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
  GCC is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-elf-raw.h gcc-10.1.0/gcc/config/aarch64/aarch64-elf-raw.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-elf-raw.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-elf-raw.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 27,48 ****
    " crtend%O%s crtn%O%s " \
    "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}"
  
- #if TARGET_FIX_ERR_A53_835769_DEFAULT
- #define CA53_ERR_835769_SPEC \
-   " %{!mno-fix-cortex-a53-835769:--fix-cortex-a53-835769}"
- #else
- #define CA53_ERR_835769_SPEC \
-   " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
- #endif
- 
- #if TARGET_FIX_ERR_A53_843419_DEFAULT
- #define CA53_ERR_843419_SPEC \
-   " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
- #else
- #define CA53_ERR_843419_SPEC \
-   " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
- #endif
- 
  #ifndef LINK_SPEC
  #define LINK_SPEC "%{h*}			\
     %{static:-Bstatic}				\
--- 27,32 ----
***************
*** 51,58 ****
     %{!static:%{rdynamic:-export-dynamic}}	\
     %{mbig-endian:-EB} %{mlittle-endian:-EL} -X	\
    -maarch64elf%{mabi=ilp32*:32}%{mbig-endian:b}" \
!   CA53_ERR_835769_SPEC \
!   CA53_ERR_843419_SPEC
  #endif
  
  #endif /* GCC_AARCH64_ELF_RAW_H */
--- 35,41 ----
     %{!static:%{rdynamic:-export-dynamic}}	\
     %{mbig-endian:-EB} %{mlittle-endian:-EL} -X	\
    -maarch64elf%{mabi=ilp32*:32}%{mbig-endian:b}" \
!   AARCH64_ERRATA_LINK_SPEC
  #endif
  
  #endif /* GCC_AARCH64_ELF_RAW_H */
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-elf.h gcc-10.1.0/gcc/config/aarch64/aarch64-elf.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-elf.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-errata.h gcc-10.1.0/gcc/config/aarch64/aarch64-errata.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-errata.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-errata.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,44 ----
+ /* Machine description for AArch64 architecture.
+    Copyright (C) 2009-2020 Free Software Foundation, Inc.
+    Contributed by ARM Ltd.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_AARCH64_ERRATA_H
+ #define GCC_AARCH64_ERRATA_H
+ 
+ #if TARGET_FIX_ERR_A53_835769_DEFAULT
+ #define CA53_ERR_835769_SPEC \
+   " %{!mno-fix-cortex-a53-835769:--fix-cortex-a53-835769}"
+ #else
+ #define CA53_ERR_835769_SPEC \
+   " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
+ #endif
+ 
+ #if TARGET_FIX_ERR_A53_843419_DEFAULT
+ #define CA53_ERR_843419_SPEC \
+   " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
+ #else
+ #define CA53_ERR_843419_SPEC \
+   " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
+ #endif
+ 
+ #define AARCH64_ERRATA_LINK_SPEC		\
+   CA53_ERR_835769_SPEC				\
+   CA53_ERR_843419_SPEC
+ 
+ #endif /*  GCC_AARCH64_ERRATA_H */
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-freebsd.h gcc-10.1.0/gcc/config/aarch64/aarch64-freebsd.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-freebsd.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-freebsd.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for AArch64 running FreeBSD
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for AArch64 running FreeBSD
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
***************
*** 46,71 ****
      -X" SUBTARGET_EXTRA_LINK_SPEC "                             \
      %{mbig-endian:-EB} %{mlittle-endian:-EL}"
  
- #if TARGET_FIX_ERR_A53_835769_DEFAULT
- #define CA53_ERR_835769_SPEC \
-   " %{!mno-fix-cortex-a53-835769:--fix-cortex-a53-835769}"
- #else
- #define CA53_ERR_835769_SPEC \
-   " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
- #endif
- 
- #ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
- #define CA53_ERR_843419_SPEC \
-   " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
- #else
- #define CA53_ERR_843419_SPEC \
-   " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
- #endif
- 
  #undef  LINK_SPEC
! #define LINK_SPEC FBSD_TARGET_LINK_SPEC	\
!                   CA53_ERR_835769_SPEC	\
!                   CA53_ERR_843419_SPEC
  
  #define GNU_USER_TARGET_MATHFILE_SPEC \
    "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}"
--- 46,53 ----
      -X" SUBTARGET_EXTRA_LINK_SPEC "                             \
      %{mbig-endian:-EB} %{mlittle-endian:-EL}"
  
  #undef  LINK_SPEC
! #define LINK_SPEC FBSD_TARGET_LINK_SPEC AARCH64_ERRATA_LINK_SPEC
  
  #define GNU_USER_TARGET_MATHFILE_SPEC \
    "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}"
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-fusion-pairs.def gcc-10.1.0/gcc/config/aarch64/aarch64-fusion-pairs.def
*** gcc-9.3.0/gcc/config/aarch64/aarch64-fusion-pairs.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-fusion-pairs.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2015-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,4 ----
! /* Copyright (C) 2015-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
*************** AARCH64_FUSION_PAIR ("adrp+ldr", ADRP_LD
*** 35,39 ****
--- 35,40 ----
  AARCH64_FUSION_PAIR ("cmp+branch", CMP_BRANCH)
  AARCH64_FUSION_PAIR ("aes+aesmc", AES_AESMC)
  AARCH64_FUSION_PAIR ("alu+branch", ALU_BRANCH)
+ AARCH64_FUSION_PAIR ("alu+cbz", ALU_CBZ)
  
  #undef AARCH64_FUSION_PAIR
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-ldpstp.md gcc-10.1.0/gcc/config/aarch64/aarch64-ldpstp.md
*** gcc-9.3.0/gcc/config/aarch64/aarch64-ldpstp.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-ldpstp.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; AArch64 ldp/stp peephole optimizations.
! ;; Copyright (C) 2014-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; AArch64 ldp/stp peephole optimizations.
! ;; Copyright (C) 2014-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-linux.h gcc-10.1.0/gcc/config/aarch64/aarch64-linux.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-linux.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-linux.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 46,70 ****
     %{mbig-endian:-EB} %{mlittle-endian:-EL}     \
     -maarch64linux%{mabi=ilp32:32}%{mbig-endian:b}"
  
- #if TARGET_FIX_ERR_A53_835769_DEFAULT
- #define CA53_ERR_835769_SPEC \
-   " %{!mno-fix-cortex-a53-835769:--fix-cortex-a53-835769}"
- #else
- #define CA53_ERR_835769_SPEC \
-   " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
- #endif
  
! #if TARGET_FIX_ERR_A53_843419_DEFAULT
! #define CA53_ERR_843419_SPEC \
!   " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
! #else
! #define CA53_ERR_843419_SPEC \
!   " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
! #endif
! 
! #define LINK_SPEC LINUX_TARGET_LINK_SPEC \
!                   CA53_ERR_835769_SPEC \
!                   CA53_ERR_843419_SPEC
  
  #define GNU_USER_TARGET_MATHFILE_SPEC \
    "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}"
--- 46,53 ----
     %{mbig-endian:-EB} %{mlittle-endian:-EL}     \
     -maarch64linux%{mabi=ilp32:32}%{mbig-endian:b}"
  
  
! #define LINK_SPEC LINUX_TARGET_LINK_SPEC AARCH64_ERRATA_LINK_SPEC
  
  #define GNU_USER_TARGET_MATHFILE_SPEC \
    "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}"
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-modes.def gcc-10.1.0/gcc/config/aarch64/aarch64-modes.def
*** gcc-9.3.0/gcc/config/aarch64/aarch64-modes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-modes.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 33,38 ****
--- 33,40 ----
  CC_MODE (CCFP);
  CC_MODE (CCFPE);
  CC_MODE (CC_SWP);
+ CC_MODE (CC_NZC);   /* Only N, Z and C bits of condition flags are valid.
+ 		       (Used with SVE predicate tests.)  */
  CC_MODE (CC_NZ);    /* Only N and Z bits of condition flags are valid.  */
  CC_MODE (CC_Z);     /* Only Z bit of condition flags is valid.  */
  CC_MODE (CC_C);     /* C represents unsigned overflow of a simple addition.  */
*************** ADJUST_ALIGNMENT (VNx8BI, 2);
*** 60,65 ****
--- 62,71 ----
  ADJUST_ALIGNMENT (VNx4BI, 2);
  ADJUST_ALIGNMENT (VNx2BI, 2);
  
+ /* Bfloat16 modes.  */
+ FLOAT_MODE (BF, 2, 0);
+ ADJUST_FLOAT_FORMAT (BF, &arm_bfloat_half_format);
+ 
  VECTOR_MODES (INT, 8);        /*       V8QI V4HI V2SI.  */
  VECTOR_MODES (INT, 16);       /* V16QI V8HI V4SI V2DI.  */
  VECTOR_MODES (FLOAT, 8);      /*                 V2SF.  */
*************** INT_MODE (XI, 64);
*** 80,92 ****
     strictly necessary to set the alignment here, since the default would
     be clamped to BIGGEST_ALIGNMENT anyhow, but it seems clearer.  */
  #define SVE_MODES(NVECS, VB, VH, VS, VD) \
!   VECTOR_MODES_WITH_PREFIX (VNx, INT, 16 * NVECS); \
!   VECTOR_MODES_WITH_PREFIX (VNx, FLOAT, 16 * NVECS); \
    \
    ADJUST_NUNITS (VB##QI, aarch64_sve_vg * NVECS * 8); \
    ADJUST_NUNITS (VH##HI, aarch64_sve_vg * NVECS * 4); \
    ADJUST_NUNITS (VS##SI, aarch64_sve_vg * NVECS * 2); \
    ADJUST_NUNITS (VD##DI, aarch64_sve_vg * NVECS); \
    ADJUST_NUNITS (VH##HF, aarch64_sve_vg * NVECS * 4); \
    ADJUST_NUNITS (VS##SF, aarch64_sve_vg * NVECS * 2); \
    ADJUST_NUNITS (VD##DF, aarch64_sve_vg * NVECS); \
--- 86,99 ----
     strictly necessary to set the alignment here, since the default would
     be clamped to BIGGEST_ALIGNMENT anyhow, but it seems clearer.  */
  #define SVE_MODES(NVECS, VB, VH, VS, VD) \
!   VECTOR_MODES_WITH_PREFIX (VNx, INT, 16 * NVECS, 0); \
!   VECTOR_MODES_WITH_PREFIX (VNx, FLOAT, 16 * NVECS, 0); \
    \
    ADJUST_NUNITS (VB##QI, aarch64_sve_vg * NVECS * 8); \
    ADJUST_NUNITS (VH##HI, aarch64_sve_vg * NVECS * 4); \
    ADJUST_NUNITS (VS##SI, aarch64_sve_vg * NVECS * 2); \
    ADJUST_NUNITS (VD##DI, aarch64_sve_vg * NVECS); \
+   ADJUST_NUNITS (VH##BF, aarch64_sve_vg * NVECS * 4); \
    ADJUST_NUNITS (VH##HF, aarch64_sve_vg * NVECS * 4); \
    ADJUST_NUNITS (VS##SF, aarch64_sve_vg * NVECS * 2); \
    ADJUST_NUNITS (VD##DF, aarch64_sve_vg * NVECS); \
*************** INT_MODE (XI, 64);
*** 95,100 ****
--- 102,108 ----
    ADJUST_ALIGNMENT (VH##HI, 16); \
    ADJUST_ALIGNMENT (VS##SI, 16); \
    ADJUST_ALIGNMENT (VD##DI, 16); \
+   ADJUST_ALIGNMENT (VH##BF, 16); \
    ADJUST_ALIGNMENT (VH##HF, 16); \
    ADJUST_ALIGNMENT (VS##SF, 16); \
    ADJUST_ALIGNMENT (VD##DF, 16);
*************** SVE_MODES (2, VNx32, VNx16, VNx8, VNx4)
*** 106,111 ****
--- 114,161 ----
  SVE_MODES (3, VNx48, VNx24, VNx12, VNx6)
  SVE_MODES (4, VNx64, VNx32, VNx16, VNx8)
  
+ /* Partial SVE vectors:
+ 
+       VNx2QI VNx4QI VNx8QI
+       VNx2HI VNx4HI
+       VNx2SI
+ 
+    In memory they occupy contiguous locations, in the same way as fixed-length
+    vectors.  E.g. VNx8QImode is half the size of VNx16QImode.
+ 
+    Passing 1 as the final argument ensures that the modes come after all
+    other modes in the GET_MODE_WIDER chain, so that we never pick them
+    in preference to a full vector mode.  */
+ VECTOR_MODES_WITH_PREFIX (VNx, INT, 2, 1);
+ VECTOR_MODES_WITH_PREFIX (VNx, INT, 4, 1);
+ VECTOR_MODES_WITH_PREFIX (VNx, INT, 8, 1);
+ VECTOR_MODES_WITH_PREFIX (VNx, FLOAT, 4, 1);
+ VECTOR_MODES_WITH_PREFIX (VNx, FLOAT, 8, 1);
+ 
+ ADJUST_NUNITS (VNx2QI, aarch64_sve_vg);
+ ADJUST_NUNITS (VNx2HI, aarch64_sve_vg);
+ ADJUST_NUNITS (VNx2SI, aarch64_sve_vg);
+ ADJUST_NUNITS (VNx2HF, aarch64_sve_vg);
+ ADJUST_NUNITS (VNx2SF, aarch64_sve_vg);
+ 
+ ADJUST_NUNITS (VNx4QI, aarch64_sve_vg * 2);
+ ADJUST_NUNITS (VNx4HI, aarch64_sve_vg * 2);
+ ADJUST_NUNITS (VNx4HF, aarch64_sve_vg * 2);
+ 
+ ADJUST_NUNITS (VNx8QI, aarch64_sve_vg * 4);
+ 
+ ADJUST_ALIGNMENT (VNx2QI, 1);
+ ADJUST_ALIGNMENT (VNx4QI, 1);
+ ADJUST_ALIGNMENT (VNx8QI, 1);
+ 
+ ADJUST_ALIGNMENT (VNx2HI, 2);
+ ADJUST_ALIGNMENT (VNx4HI, 2);
+ ADJUST_ALIGNMENT (VNx2HF, 2);
+ ADJUST_ALIGNMENT (VNx4HF, 2);
+ 
+ ADJUST_ALIGNMENT (VNx2SI, 4);
+ ADJUST_ALIGNMENT (VNx2SF, 4);
+ 
  /* Quad float: 128-bit floating mode for long doubles.  */
  FLOAT_MODE (TF, 16, ieee_quad_format);
  
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-netbsd.h gcc-10.1.0/gcc/config/aarch64/aarch64-netbsd.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-netbsd.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-netbsd.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,63 ----
+ /* Definitions for AArch64 running NetBSD
+    Copyright (C) 2016-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_AARCH64_NETBSD_H
+ #define GCC_AARCH64_NETBSD_H
+ 
+ #define TARGET_LINKER_BIG_EMULATION "aarch64nbsdb"
+ #define TARGET_LINKER_LITTLE_EMULATION "aarch64nbsd"
+ 
+ #if TARGET_BIG_ENDIAN_DEFAULT
+ #define TARGET_LINKER_EMULATION  TARGET_LINKER_BIG_EMULATION
+ #else
+ #define TARGET_LINKER_EMULATION  TARGET_LINKER_LITTLE_EMULATION
+ #endif
+ 
+ #undef  SUBTARGET_EXTRA_LINK_SPEC
+ #define SUBTARGET_EXTRA_LINK_SPEC " -m" TARGET_LINKER_EMULATION
+ 
+ #define NETBSD_ENTRY_POINT "__start"
+ 
+ #define NETBSD_TARGET_LINK_SPEC  "%{h*} "				\
+   "-X %{mbig-endian:-EB -m " TARGET_LINKER_BIG_EMULATION "} "		\
+   "%{mlittle-endian:-EL -m " TARGET_LINKER_LITTLE_EMULATION "} "	\
+   "%(netbsd_link_spec)"
+ 
+ #undef  LINK_SPEC
+ #define LINK_SPEC NETBSD_LINK_SPEC_ELF		\
+ 		  NETBSD_TARGET_LINK_SPEC	\
+ 		  AARCH64_ERRATA_LINK_SPEC
+ 
+ #undef TARGET_OS_CPP_BUILTINS
+ #define TARGET_OS_CPP_BUILTINS()		\
+   do						\
+     {						\
+       NETBSD_OS_CPP_BUILTINS_ELF();		\
+     }						\
+   while (0)
+ 
+ #undef SUBTARGET_CPP_SPEC
+ #define SUBTARGET_CPP_SPEC NETBSD_CPP_SPEC
+ 
+ #undef EXTRA_SPECS
+ #define EXTRA_SPECS \
+   { "asm_cpu_spec",             ASM_CPU_SPEC }, \
+   NETBSD_SUBTARGET_EXTRA_SPECS
+ 
+ #endif  /* GCC_AARCH64_NETBSD_H */
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-option-extensions.def gcc-10.1.0/gcc/config/aarch64/aarch64-option-extensions.def
*** gcc-9.3.0/gcc/config/aarch64/aarch64-option-extensions.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-option-extensions.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,4 ----
! /* Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 45,73 ****
       entries: aes, pmull, sha1, sha2 being present).  In that case this field
       should contain a space (" ") separated list of the strings in 'Features'
       that are required.  Their order is not important.  An empty string means
!      do not detect this feature during auto detection.  */
  
! /* NOTE: This file is being parsed by config.gcc and so the
!    AARCH64_OPT_EXTENSION must adhere to a strict format:
!    1) No space between the AARCH64_OPT_EXTENSION and the opening (.
!    2) No space between the opening ( and the extension name.
!    3) No space after the extension name before the ,.
!    4) Spaces are only allowed after a , and around |.
!    5) Everything must be on one line.  */
  
  /* Enabling "fp" just enables "fp".
     Disabling "fp" also disables "simd", "crypto", "fp16", "aes", "sha2",
!    "sha3", sm3/sm4 and "sve".  */
! AARCH64_OPT_EXTENSION("fp", AARCH64_FL_FP, 0, AARCH64_FL_SIMD | AARCH64_FL_CRYPTO | AARCH64_FL_F16 | AARCH64_FL_AES | AARCH64_FL_SHA2 | AARCH64_FL_SHA3 | AARCH64_FL_SM4 | AARCH64_FL_SVE, false, "fp")
  
  /* Enabling "simd" also enables "fp".
     Disabling "simd" also disables "crypto", "dotprod", "aes", "sha2", "sha3",
!    "sm3/sm4" and "sve".  */
! AARCH64_OPT_EXTENSION("simd", AARCH64_FL_SIMD, AARCH64_FL_FP, AARCH64_FL_CRYPTO | AARCH64_FL_DOTPROD | AARCH64_FL_AES | AARCH64_FL_SHA2 | AARCH64_FL_SHA3 | AARCH64_FL_SM4 | AARCH64_FL_SVE, false, "asimd")
  
  /* Enabling "crypto" also enables "fp", "simd", "aes" and "sha2".
!    Disabling "crypto" disables "crypto", "aes", "sha2", "sha3" and "sm3/sm4".  */
! AARCH64_OPT_EXTENSION("crypto", AARCH64_FL_CRYPTO, AARCH64_FL_FP | AARCH64_FL_SIMD | AARCH64_FL_AES | AARCH64_FL_SHA2, AARCH64_FL_AES | AARCH64_FL_SHA2 |AARCH64_FL_SHA3 | AARCH64_FL_SM4, true, "aes pmull sha1 sha2")
  
  /* Enabling or disabling "crc" only changes "crc".  */
  AARCH64_OPT_EXTENSION("crc", AARCH64_FL_CRC, 0, 0, false, "crc32")
--- 45,90 ----
       entries: aes, pmull, sha1, sha2 being present).  In that case this field
       should contain a space (" ") separated list of the strings in 'Features'
       that are required.  Their order is not important.  An empty string means
!      do not detect this feature during auto detection.
  
!      NOTE: Any changes to the AARCH64_OPT_EXTENSION macro need to be mirrored in
!      config.gcc.  */
  
  /* Enabling "fp" just enables "fp".
     Disabling "fp" also disables "simd", "crypto", "fp16", "aes", "sha2",
!    "sha3", sm3/sm4, "sve", "sve2", "sve2-aes", "sve2-sha3", "sve2-sm4",
!    "sve2-bitperm", "i8mm", "f32mm", "f64mm", and "bf16".  */
! AARCH64_OPT_EXTENSION("fp", AARCH64_FL_FP, 0, AARCH64_FL_SIMD | \
! 		      AARCH64_FL_CRYPTO | AARCH64_FL_F16 | AARCH64_FL_AES | \
! 		      AARCH64_FL_SHA2 | AARCH64_FL_SHA3 | AARCH64_FL_SM4 | \
! 		      AARCH64_FL_SVE | AARCH64_FL_SVE2 | AARCH64_FL_SVE2_AES | \
! 		      AARCH64_FL_SVE2_SHA3 | AARCH64_FL_SVE2_SM4 | \
! 		      AARCH64_FL_SVE2_BITPERM | AARCH64_FL_I8MM | \
! 		      AARCH64_FL_F32MM | AARCH64_FL_F64MM | AARCH64_FL_BF16,
! 		       false, "fp")
  
  /* Enabling "simd" also enables "fp".
     Disabling "simd" also disables "crypto", "dotprod", "aes", "sha2", "sha3",
!    "sm3/sm4", "sve", "sve2", "sve2-aes", "sve2-sha3", "sve2-sm4",
!    "sve2-bitperm", "i8mm", "f32mm" and "f64mm".  */
! AARCH64_OPT_EXTENSION("simd", AARCH64_FL_SIMD, AARCH64_FL_FP, \
! 		      AARCH64_FL_CRYPTO | AARCH64_FL_DOTPROD | \
! 		      AARCH64_FL_AES | AARCH64_FL_SHA2 | AARCH64_FL_SHA3 | \
! 		      AARCH64_FL_SM4 | AARCH64_FL_SVE | AARCH64_FL_SVE2 | \
! 		      AARCH64_FL_SVE2_AES | AARCH64_FL_SVE2_SHA3 | \
! 		      AARCH64_FL_SVE2_SM4 | AARCH64_FL_SVE2_BITPERM | \
! 		      AARCH64_FL_I8MM | AARCH64_FL_F32MM | AARCH64_FL_F64MM, \
! 		      false, "asimd")
  
  /* Enabling "crypto" also enables "fp", "simd", "aes" and "sha2".
!    Disabling "crypto" disables "crypto", "aes", "sha2", "sha3" and "sm3/sm4",
!    "sve2-aes", "sve2-sha3", "sve2-sm4".  */
! AARCH64_OPT_EXTENSION("crypto", AARCH64_FL_CRYPTO, AARCH64_FL_FP | \
! 		      AARCH64_FL_SIMD | AARCH64_FL_AES | AARCH64_FL_SHA2, \
! 		      AARCH64_FL_AES | AARCH64_FL_SHA2 | AARCH64_FL_SHA3 | \
! 		      AARCH64_FL_SM4 | AARCH64_FL_SVE2_AES | \
! 		      AARCH64_FL_SVE2_SHA3 | AARCH64_FL_SVE2_SM4, true, \
! 		      "aes pmull sha1 sha2")
  
  /* Enabling or disabling "crc" only changes "crc".  */
  AARCH64_OPT_EXTENSION("crc", AARCH64_FL_CRC, 0, 0, false, "crc32")
*************** AARCH64_OPT_EXTENSION("crc", AARCH64_FL_
*** 76,118 ****
  AARCH64_OPT_EXTENSION("lse", AARCH64_FL_LSE, 0, 0, false, "atomics")
  
  /* Enabling "fp16" also enables "fp".
!    Disabling "fp16" disables "fp16", "fp16fml" and "sve".  */
! AARCH64_OPT_EXTENSION("fp16", AARCH64_FL_F16, AARCH64_FL_FP, AARCH64_FL_F16FML | AARCH64_FL_SVE, false, "fphp asimdhp")
  
  /* Enabling or disabling "rcpc" only changes "rcpc".  */
  AARCH64_OPT_EXTENSION("rcpc", AARCH64_FL_RCPC, 0, 0, false, "lrcpc")
  
  /* Enabling "rdma" also enables "fp", "simd".
     Disabling "rdma" just disables "rdma".  */
! AARCH64_OPT_EXTENSION("rdma", AARCH64_FL_RDMA, AARCH64_FL_FP | AARCH64_FL_SIMD, 0, false, "asimdrdm")
  
  /* Enabling "dotprod" also enables "simd".
     Disabling "dotprod" only disables "dotprod".  */
! AARCH64_OPT_EXTENSION("dotprod", AARCH64_FL_DOTPROD, AARCH64_FL_SIMD, 0, false, "asimddp")
  
  /* Enabling "aes" also enables "simd".
!    Disabling "aes" just disables "aes".  */
! AARCH64_OPT_EXTENSION("aes", AARCH64_FL_AES, AARCH64_FL_SIMD, 0, false, "aes")
  
  /* Enabling "sha2" also enables "simd".
     Disabling "sha2" just disables "sha2".  */
! AARCH64_OPT_EXTENSION("sha2", AARCH64_FL_SHA2, AARCH64_FL_SIMD, 0, false, "sha1 sha2")
  
  /* Enabling "sha3" enables "simd" and "sha2".
!    Disabling "sha3" just disables "sha3".  */
! AARCH64_OPT_EXTENSION("sha3", AARCH64_FL_SHA3, AARCH64_FL_SIMD | AARCH64_FL_SHA2, 0, false, "sha3 sha512")
  
  /* Enabling "sm4" also enables "simd".
!    Disabling "sm4" just disables "sm4".  */
! AARCH64_OPT_EXTENSION("sm4", AARCH64_FL_SM4, AARCH64_FL_SIMD, 0, false, "sm3 sm4")
  
  /* Enabling "fp16fml" also enables "fp" and "fp16".
     Disabling "fp16fml" just disables "fp16fml".  */
! AARCH64_OPT_EXTENSION("fp16fml", AARCH64_FL_F16FML, AARCH64_FL_FP | AARCH64_FL_F16, 0, false, "asimdfhm")
  
  /* Enabling "sve" also enables "fp16", "fp" and "simd".
!    Disabling "sve" just disables "sve".  */
! AARCH64_OPT_EXTENSION("sve", AARCH64_FL_SVE, AARCH64_FL_FP | AARCH64_FL_SIMD | AARCH64_FL_F16, 0, false, "sve")
  
  /* Enabling/Disabling "profile" does not enable/disable any other feature.  */
  AARCH64_OPT_EXTENSION("profile", AARCH64_FL_PROFILE, 0, 0, false, "")
--- 93,155 ----
  AARCH64_OPT_EXTENSION("lse", AARCH64_FL_LSE, 0, 0, false, "atomics")
  
  /* Enabling "fp16" also enables "fp".
!    Disabling "fp16" disables "fp16", "fp16fml", "sve", "sve2",
!    "sve2-aes", "sve2-sha3", "sve2-sm4", "sve2-bitperm", "f32mm" and
!     "f64mm".  */
! AARCH64_OPT_EXTENSION("fp16", AARCH64_FL_F16, AARCH64_FL_FP, \
! 		      AARCH64_FL_F16FML | AARCH64_FL_SVE | AARCH64_FL_F32MM | \
! 		      AARCH64_FL_F64MM | AARCH64_FL_SVE2 | \
! 		      AARCH64_FL_SVE2_AES | AARCH64_FL_SVE2_SHA3 | \
! 		      AARCH64_FL_SVE2_SM4 | AARCH64_FL_SVE2_BITPERM, false, \
! 		      "fphp asimdhp")
  
  /* Enabling or disabling "rcpc" only changes "rcpc".  */
  AARCH64_OPT_EXTENSION("rcpc", AARCH64_FL_RCPC, 0, 0, false, "lrcpc")
  
  /* Enabling "rdma" also enables "fp", "simd".
     Disabling "rdma" just disables "rdma".  */
! AARCH64_OPT_EXTENSION("rdma", AARCH64_FL_RDMA, \
! 		      AARCH64_FL_FP | AARCH64_FL_SIMD, 0, false, "asimdrdm")
  
  /* Enabling "dotprod" also enables "simd".
     Disabling "dotprod" only disables "dotprod".  */
! AARCH64_OPT_EXTENSION("dotprod", AARCH64_FL_DOTPROD, AARCH64_FL_SIMD, 0, \
! 		      false, "asimddp")
  
  /* Enabling "aes" also enables "simd".
!    Disabling "aes" disables "aes" and "sve2-aes'.  */
! AARCH64_OPT_EXTENSION("aes", AARCH64_FL_AES, AARCH64_FL_SIMD, \
! 		      AARCH64_FL_SVE2_AES, false, "aes")
  
  /* Enabling "sha2" also enables "simd".
     Disabling "sha2" just disables "sha2".  */
! AARCH64_OPT_EXTENSION("sha2", AARCH64_FL_SHA2, AARCH64_FL_SIMD, 0, false, \
! 		      "sha1 sha2")
  
  /* Enabling "sha3" enables "simd" and "sha2".
!    Disabling "sha3" disables "sha3" and "sve2-sha3".  */
! AARCH64_OPT_EXTENSION("sha3", AARCH64_FL_SHA3, AARCH64_FL_SIMD | \
! 		      AARCH64_FL_SHA2, AARCH64_FL_SVE2_SHA3, false, \
! 		      "sha3 sha512")
  
  /* Enabling "sm4" also enables "simd".
!    Disabling "sm4" disables "sm4" and "sve2-sm4".  */
! AARCH64_OPT_EXTENSION("sm4", AARCH64_FL_SM4, AARCH64_FL_SIMD, \
! 		      AARCH64_FL_SVE2_SM4, false, "sm3 sm4")
  
  /* Enabling "fp16fml" also enables "fp" and "fp16".
     Disabling "fp16fml" just disables "fp16fml".  */
! AARCH64_OPT_EXTENSION("fp16fml", AARCH64_FL_F16FML, \
! 		      AARCH64_FL_FP | AARCH64_FL_F16, 0, false, "asimdfhm")
  
  /* Enabling "sve" also enables "fp16", "fp" and "simd".
!    Disabling "sve" disables "sve", "f32mm", "f64mm", "sve2", "sve2-aes",
!    "sve2-sha3", "sve2-sm4" and "sve2-bitperm".  */
! AARCH64_OPT_EXTENSION("sve", AARCH64_FL_SVE, AARCH64_FL_FP | AARCH64_FL_SIMD | \
! 		      AARCH64_FL_F16, AARCH64_FL_F32MM | AARCH64_FL_F64MM | \
! 		      AARCH64_FL_SVE2 | AARCH64_FL_SVE2_AES | \
! 		      AARCH64_FL_SVE2_SHA3 | AARCH64_FL_SVE2_SM4 | \
! 		      AARCH64_FL_SVE2_BITPERM, false, "sve")
  
  /* Enabling/Disabling "profile" does not enable/disable any other feature.  */
  AARCH64_OPT_EXTENSION("profile", AARCH64_FL_PROFILE, 0, 0, false, "")
*************** AARCH64_OPT_EXTENSION("rng", AARCH64_FL_
*** 124,135 ****
  AARCH64_OPT_EXTENSION("memtag", AARCH64_FL_MEMTAG, 0, 0, false, "")
  
  /* Enabling/Disabling "sb" only changes "sb".  */
! AARCH64_OPT_EXTENSION("sb", AARCH64_FL_SB, 0, 0, false, "")
  
  /* Enabling/Disabling "ssbs" only changes "ssbs".  */
! AARCH64_OPT_EXTENSION("ssbs", AARCH64_FL_SSBS, 0, 0, false, "")
  
  /* Enabling/Disabling "predres" only changes "predres".  */
  AARCH64_OPT_EXTENSION("predres", AARCH64_FL_PREDRES, 0, 0, false, "")
  
  #undef AARCH64_OPT_EXTENSION
--- 161,229 ----
  AARCH64_OPT_EXTENSION("memtag", AARCH64_FL_MEMTAG, 0, 0, false, "")
  
  /* Enabling/Disabling "sb" only changes "sb".  */
! AARCH64_OPT_EXTENSION("sb", AARCH64_FL_SB, 0, 0, false, "sb")
  
  /* Enabling/Disabling "ssbs" only changes "ssbs".  */
! AARCH64_OPT_EXTENSION("ssbs", AARCH64_FL_SSBS, 0, 0, false, "ssbs")
  
  /* Enabling/Disabling "predres" only changes "predres".  */
  AARCH64_OPT_EXTENSION("predres", AARCH64_FL_PREDRES, 0, 0, false, "")
  
+ /* Enabling "sve2" also enables "sve", "fp16", "fp", and "simd".
+    Disabling "sve2" disables "sve2", "sve2-aes", "sve2-sha3", "sve2-sm4", and
+    "sve2-bitperm".  */
+ AARCH64_OPT_EXTENSION("sve2", AARCH64_FL_SVE2, AARCH64_FL_SVE | \
+ 		      AARCH64_FL_FP | AARCH64_FL_SIMD | AARCH64_FL_F16, \
+ 		      AARCH64_FL_SVE2_AES | AARCH64_FL_SVE2_SHA3 | \
+ 		      AARCH64_FL_SVE2_SM4 | AARCH64_FL_SVE2_BITPERM, false, "sve2")
+ 
+ /* Enabling "sve2-sm4" also enables "sm4", "simd", "fp16", "fp", "sve", and
+    "sve2". Disabling "sve2-sm4" just disables "sve2-sm4".  */
+ AARCH64_OPT_EXTENSION("sve2-sm4", AARCH64_FL_SVE2_SM4, AARCH64_FL_SM4 | \
+ 		      AARCH64_FL_SIMD | AARCH64_FL_F16 | AARCH64_FL_FP | \
+ 		      AARCH64_FL_SVE | AARCH64_FL_SVE2, 0, false, "svesm4")
+ 
+ /* Enabling "sve2-aes" also enables "aes", "simd", "fp16", "fp", "sve", and
+    "sve2". Disabling "sve2-aes" just disables "sve2-aes".  */
+ AARCH64_OPT_EXTENSION("sve2-aes", AARCH64_FL_SVE2_AES, AARCH64_FL_AES | \
+ 		      AARCH64_FL_SIMD | AARCH64_FL_F16 | AARCH64_FL_FP | \
+ 		      AARCH64_FL_SVE | AARCH64_FL_SVE2, 0, false, "sveaes")
+ 
+ /* Enabling "sve2-sha3" also enables "sha3", "simd", "fp16", "fp", "sve", and
+    "sve2". Disabling "sve2-sha3" just disables "sve2-sha3".  */
+ AARCH64_OPT_EXTENSION("sve2-sha3", AARCH64_FL_SVE2_SHA3, AARCH64_FL_SHA3 | \
+ 		      AARCH64_FL_SIMD | AARCH64_FL_F16 | AARCH64_FL_FP | \
+ 		      AARCH64_FL_SVE | AARCH64_FL_SVE2, 0, false, "svesha3")
+ 
+ /* Enabling "sve2-bitperm" also enables "simd", "fp16", "fp", "sve", and
+    "sve2".  Disabling "sve2-bitperm" just disables "sve2-bitperm".  */
+ AARCH64_OPT_EXTENSION("sve2-bitperm", AARCH64_FL_SVE2_BITPERM, AARCH64_FL_SIMD | \
+ 		      AARCH64_FL_F16 | AARCH64_FL_FP | AARCH64_FL_SVE | \
+ 		      AARCH64_FL_SVE2, 0, false, "svebitperm")
+ 
+ /* Enabling or disabling "tme" only changes "tme".  */
+ AARCH64_OPT_EXTENSION("tme", AARCH64_FL_TME, 0, 0, false, "")
+ 
+ /* Enabling "i8mm" also enables "simd" and "fp".
+    Disabling "i8mm" only disables "i8mm".  */
+ AARCH64_OPT_EXTENSION("i8mm", AARCH64_FL_I8MM, \
+ 		      AARCH64_FL_SIMD | AARCH64_FL_FP, 0, false, "i8mm")
+ 
+ /* Enabling "f32mm" also enables "sve", "fp16", "fp", and "simd".
+    Disabling "f32mm" only disables "f32mm".  */
+ AARCH64_OPT_EXTENSION("f32mm", AARCH64_FL_F32MM, \
+ 		      AARCH64_FL_SVE | AARCH64_FL_F16 | AARCH64_FL_FP | \
+ 		      AARCH64_FL_SIMD, 0, false, "f32mm")
+ 
+ /* Enabling "f64mm" also enables "sve", "fp16", "fp", and "simd".
+    Disabling "f64mm" only disables "f64mm".  */
+ AARCH64_OPT_EXTENSION("f64mm", AARCH64_FL_F64MM, \
+ 		      AARCH64_FL_SVE | AARCH64_FL_F16 | AARCH64_FL_FP | \
+ 		      AARCH64_FL_SIMD, 0, false, "f64mm")
+ 
+ /* Enabling "bf16" also enables "simd" and "fp".
+    Disabling "bf16" only disables "bf16".  */
+ AARCH64_OPT_EXTENSION("bf16", AARCH64_FL_BF16, \
+ 		      AARCH64_FL_SIMD | AARCH64_FL_FP, 0, false, "bf16")
+ 
  #undef AARCH64_OPT_EXTENSION
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-opts.h gcc-10.1.0/gcc/config/aarch64/aarch64-opts.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-opts.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-opts.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,4 ----
! /* Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-passes.def gcc-10.1.0/gcc/config/aarch64/aarch64-passes.def
*** gcc-9.3.0/gcc/config/aarch64/aarch64-passes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-passes.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* AArch64-specific passes declarations.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* AArch64-specific passes declarations.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-protos.h gcc-10.1.0/gcc/config/aarch64/aarch64-protos.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
*************** struct cpu_branch_cost
*** 212,231 ****
  /* Control approximate alternatives to certain FP operators.  */
  #define AARCH64_APPROX_MODE(MODE) \
    ((MIN_MODE_FLOAT <= (MODE) && (MODE) <= MAX_MODE_FLOAT) \
!    ? (1 << ((MODE) - MIN_MODE_FLOAT)) \
     : (MIN_MODE_VECTOR_FLOAT <= (MODE) && (MODE) <= MAX_MODE_VECTOR_FLOAT) \
!      ? (1 << ((MODE) - MIN_MODE_VECTOR_FLOAT \
! 	      + MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) \
       : (0))
! #define AARCH64_APPROX_NONE (0)
! #define AARCH64_APPROX_ALL (-1)
  
  /* Allowed modes for approximations.  */
  struct cpu_approx_modes
  {
!   const unsigned int division;		/* Division.  */
!   const unsigned int sqrt;		/* Square root.  */
!   const unsigned int recip_sqrt;	/* Reciprocal square root.  */
  };
  
  /* Cache prefetch settings for prefetch-loop-arrays.  */
--- 212,231 ----
  /* Control approximate alternatives to certain FP operators.  */
  #define AARCH64_APPROX_MODE(MODE) \
    ((MIN_MODE_FLOAT <= (MODE) && (MODE) <= MAX_MODE_FLOAT) \
!    ? ((uint64_t) 1 << ((MODE) - MIN_MODE_FLOAT)) \
     : (MIN_MODE_VECTOR_FLOAT <= (MODE) && (MODE) <= MAX_MODE_VECTOR_FLOAT) \
!      ? ((uint64_t) 1 << ((MODE) - MIN_MODE_VECTOR_FLOAT \
! 			 + MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) \
       : (0))
! #define AARCH64_APPROX_NONE ((uint64_t) 0)
! #define AARCH64_APPROX_ALL (~(uint64_t) 0)
  
  /* Allowed modes for approximations.  */
  struct cpu_approx_modes
  {
!   const uint64_t division;	/* Division.  */
!   const uint64_t sqrt;		/* Square root.  */
!   const uint64_t recip_sqrt;	/* Reciprocal square root.  */
  };
  
  /* Cache prefetch settings for prefetch-loop-arrays.  */
*************** enum simd_immediate_check {
*** 396,403 ****
--- 396,476 ----
    AARCH64_CHECK_MOV  = AARCH64_CHECK_ORR | AARCH64_CHECK_BIC
  };
  
+ /* The key type that -msign-return-address should use.  */
+ enum aarch64_key_type {
+   AARCH64_KEY_A,
+   AARCH64_KEY_B
+ };
+ 
+ extern enum aarch64_key_type aarch64_ra_sign_key;
+ 
  extern struct tune_params aarch64_tune_params;
  
+ /* The available SVE predicate patterns, known in the ACLE as "svpattern".  */
+ #define AARCH64_FOR_SVPATTERN(T) \
+   T (POW2, pow2, 0) \
+   T (VL1, vl1, 1) \
+   T (VL2, vl2, 2) \
+   T (VL3, vl3, 3) \
+   T (VL4, vl4, 4) \
+   T (VL5, vl5, 5) \
+   T (VL6, vl6, 6) \
+   T (VL7, vl7, 7) \
+   T (VL8, vl8, 8) \
+   T (VL16, vl16, 9) \
+   T (VL32, vl32, 10) \
+   T (VL64, vl64, 11) \
+   T (VL128, vl128, 12) \
+   T (VL256, vl256, 13) \
+   T (MUL4, mul4, 29) \
+   T (MUL3, mul3, 30) \
+   T (ALL, all, 31)
+ 
+ /* The available SVE prefetch operations, known in the ACLE as "svprfop".  */
+ #define AARCH64_FOR_SVPRFOP(T) \
+   T (PLDL1KEEP, pldl1keep, 0) \
+   T (PLDL1STRM, pldl1strm, 1) \
+   T (PLDL2KEEP, pldl2keep, 2) \
+   T (PLDL2STRM, pldl2strm, 3) \
+   T (PLDL3KEEP, pldl3keep, 4) \
+   T (PLDL3STRM, pldl3strm, 5) \
+   T (PSTL1KEEP, pstl1keep, 8) \
+   T (PSTL1STRM, pstl1strm, 9) \
+   T (PSTL2KEEP, pstl2keep, 10) \
+   T (PSTL2STRM, pstl2strm, 11) \
+   T (PSTL3KEEP, pstl3keep, 12) \
+   T (PSTL3STRM, pstl3strm, 13)
+ 
+ #define AARCH64_SVENUM(UPPER, LOWER, VALUE) AARCH64_SV_##UPPER = VALUE,
+ enum aarch64_svpattern {
+   AARCH64_FOR_SVPATTERN (AARCH64_SVENUM)
+   AARCH64_NUM_SVPATTERNS
+ };
+ 
+ enum aarch64_svprfop {
+   AARCH64_FOR_SVPRFOP (AARCH64_SVENUM)
+   AARCH64_NUM_SVPRFOPS
+ };
+ #undef AARCH64_SVENUM
+ 
+ /* It's convenient to divide the built-in function codes into groups,
+    rather than having everything in a single enum.  This type enumerates
+    those groups.  */
+ enum aarch64_builtin_class
+ {
+   AARCH64_BUILTIN_GENERAL,
+   AARCH64_BUILTIN_SVE
+ };
+ 
+ /* Built-in function codes are structured so that the low
+    AARCH64_BUILTIN_SHIFT bits contain the aarch64_builtin_class
+    and the upper bits contain a group-specific subcode.  */
+ const unsigned int AARCH64_BUILTIN_SHIFT = 1;
+ 
+ /* Mask that selects the aarch64_builtin_class part of a function code.  */
+ const unsigned int AARCH64_BUILTIN_CLASS = (1 << AARCH64_BUILTIN_SHIFT) - 1;
+ 
+ void aarch64_post_cfi_startproc (void);
  poly_int64 aarch64_initial_elimination_offset (unsigned, unsigned);
  int aarch64_get_condition_code (rtx);
  bool aarch64_address_valid_for_prefetch_p (rtx, bool);
*************** unsigned HOST_WIDE_INT aarch64_and_split
*** 407,412 ****
--- 480,487 ----
  bool aarch64_and_bitmask_imm (unsigned HOST_WIDE_INT val_in, machine_mode mode);
  int aarch64_branch_cost (bool, bool);
  enum aarch64_symbol_type aarch64_classify_symbolic_expression (rtx);
+ opt_machine_mode aarch64_vq_mode (scalar_mode);
+ opt_machine_mode aarch64_full_sve_mode (scalar_mode);
  bool aarch64_can_const_movi_rtx_p (rtx x, machine_mode mode);
  bool aarch64_const_vec_all_same_int_p (rtx, HOST_WIDE_INT);
  bool aarch64_const_vec_all_same_in_range_p (rtx, HOST_WIDE_INT,
*************** bool aarch64_const_vec_all_same_in_range
*** 414,427 ****
  bool aarch64_constant_address_p (rtx);
  bool aarch64_emit_approx_div (rtx, rtx, rtx);
  bool aarch64_emit_approx_sqrt (rtx, rtx, bool);
! void aarch64_expand_call (rtx, rtx, bool);
! bool aarch64_expand_movmem (rtx *);
  bool aarch64_float_const_zero_rtx_p (rtx);
  bool aarch64_float_const_rtx_p (rtx);
  bool aarch64_function_arg_regno_p (unsigned);
  bool aarch64_fusion_enabled_p (enum aarch64_fusion_pairs);
! bool aarch64_gen_movmemqi (rtx *);
! bool aarch64_gimple_fold_builtin (gimple_stmt_iterator *);
  bool aarch64_is_extend_from_extract (scalar_int_mode, rtx, rtx);
  bool aarch64_is_long_call_p (rtx);
  bool aarch64_is_noplt_call_p (rtx);
--- 489,501 ----
  bool aarch64_constant_address_p (rtx);
  bool aarch64_emit_approx_div (rtx, rtx, rtx);
  bool aarch64_emit_approx_sqrt (rtx, rtx, bool);
! void aarch64_expand_call (rtx, rtx, rtx, bool);
! bool aarch64_expand_cpymem (rtx *);
  bool aarch64_float_const_zero_rtx_p (rtx);
  bool aarch64_float_const_rtx_p (rtx);
  bool aarch64_function_arg_regno_p (unsigned);
  bool aarch64_fusion_enabled_p (enum aarch64_fusion_pairs);
! bool aarch64_gen_cpymemqi (rtx *);
  bool aarch64_is_extend_from_extract (scalar_int_mode, rtx, rtx);
  bool aarch64_is_long_call_p (rtx);
  bool aarch64_is_noplt_call_p (rtx);
*************** bool aarch64_masks_and_shift_for_bfi_p (
*** 436,459 ****
  					unsigned HOST_WIDE_INT);
  bool aarch64_zero_extend_const_eq (machine_mode, rtx, machine_mode, rtx);
  bool aarch64_move_imm (HOST_WIDE_INT, machine_mode);
  opt_machine_mode aarch64_sve_pred_mode (unsigned int);
  bool aarch64_sve_cnt_immediate_p (rtx);
  bool aarch64_sve_addvl_addpl_immediate_p (rtx);
! bool aarch64_sve_inc_dec_immediate_p (rtx);
  int aarch64_add_offset_temporaries (rtx);
  void aarch64_split_add_offset (scalar_int_mode, rtx, rtx, rtx, rtx, rtx);
  bool aarch64_mov_operand_p (rtx, machine_mode);
  rtx aarch64_reverse_mask (machine_mode, unsigned int);
  bool aarch64_offset_7bit_signed_scaled_p (machine_mode, poly_int64);
  bool aarch64_offset_9bit_signed_unscaled_p (machine_mode, poly_int64);
  char *aarch64_output_sve_cnt_immediate (const char *, const char *, rtx);
! char *aarch64_output_sve_addvl_addpl (rtx, rtx, rtx);
! char *aarch64_output_sve_inc_dec_immediate (const char *, rtx);
  char *aarch64_output_scalar_simd_mov_immediate (rtx, scalar_int_mode);
  char *aarch64_output_simd_mov_immediate (rtx, unsigned,
  			enum simd_immediate_check w = AARCH64_CHECK_MOV);
  char *aarch64_output_sve_mov_immediate (rtx);
! char *aarch64_output_ptrue (machine_mode, char);
  bool aarch64_pad_reg_upward (machine_mode, const_tree, bool);
  bool aarch64_regno_ok_for_base_p (int, bool);
  bool aarch64_regno_ok_for_index_p (int, bool);
--- 510,542 ----
  					unsigned HOST_WIDE_INT);
  bool aarch64_zero_extend_const_eq (machine_mode, rtx, machine_mode, rtx);
  bool aarch64_move_imm (HOST_WIDE_INT, machine_mode);
+ machine_mode aarch64_sve_int_mode (machine_mode);
  opt_machine_mode aarch64_sve_pred_mode (unsigned int);
+ machine_mode aarch64_sve_pred_mode (machine_mode);
+ opt_machine_mode aarch64_sve_data_mode (scalar_mode, poly_uint64);
+ bool aarch64_sve_mode_p (machine_mode);
+ HOST_WIDE_INT aarch64_fold_sve_cnt_pat (aarch64_svpattern, unsigned int);
  bool aarch64_sve_cnt_immediate_p (rtx);
+ bool aarch64_sve_scalar_inc_dec_immediate_p (rtx);
  bool aarch64_sve_addvl_addpl_immediate_p (rtx);
! bool aarch64_sve_vector_inc_dec_immediate_p (rtx);
  int aarch64_add_offset_temporaries (rtx);
  void aarch64_split_add_offset (scalar_int_mode, rtx, rtx, rtx, rtx, rtx);
  bool aarch64_mov_operand_p (rtx, machine_mode);
  rtx aarch64_reverse_mask (machine_mode, unsigned int);
  bool aarch64_offset_7bit_signed_scaled_p (machine_mode, poly_int64);
  bool aarch64_offset_9bit_signed_unscaled_p (machine_mode, poly_int64);
+ char *aarch64_output_sve_prefetch (const char *, rtx, const char *);
  char *aarch64_output_sve_cnt_immediate (const char *, const char *, rtx);
! char *aarch64_output_sve_cnt_pat_immediate (const char *, const char *, rtx *);
! char *aarch64_output_sve_scalar_inc_dec (rtx);
! char *aarch64_output_sve_addvl_addpl (rtx);
! char *aarch64_output_sve_vector_inc_dec (const char *, rtx);
  char *aarch64_output_scalar_simd_mov_immediate (rtx, scalar_int_mode);
  char *aarch64_output_simd_mov_immediate (rtx, unsigned,
  			enum simd_immediate_check w = AARCH64_CHECK_MOV);
  char *aarch64_output_sve_mov_immediate (rtx);
! char *aarch64_output_sve_ptrues (rtx);
  bool aarch64_pad_reg_upward (machine_mode, const_tree, bool);
  bool aarch64_regno_ok_for_base_p (int, bool);
  bool aarch64_regno_ok_for_index_p (int, bool);
*************** bool aarch64_simd_check_vect_par_cnst_ha
*** 462,472 ****
  					    bool high);
  bool aarch64_simd_scalar_immediate_valid_for_move (rtx, scalar_int_mode);
  bool aarch64_simd_shift_imm_p (rtx, machine_mode, bool);
  bool aarch64_simd_valid_immediate (rtx, struct simd_immediate_info *,
  			enum simd_immediate_check w = AARCH64_CHECK_MOV);
  rtx aarch64_check_zero_based_sve_index_immediate (rtx);
  bool aarch64_sve_index_immediate_p (rtx);
! bool aarch64_sve_arith_immediate_p (rtx, bool);
  bool aarch64_sve_bitmask_immediate_p (rtx);
  bool aarch64_sve_dup_immediate_p (rtx);
  bool aarch64_sve_cmp_immediate_p (rtx, bool);
--- 545,557 ----
  					    bool high);
  bool aarch64_simd_scalar_immediate_valid_for_move (rtx, scalar_int_mode);
  bool aarch64_simd_shift_imm_p (rtx, machine_mode, bool);
+ bool aarch64_sve_ptrue_svpattern_p (rtx, struct simd_immediate_info *);
  bool aarch64_simd_valid_immediate (rtx, struct simd_immediate_info *,
  			enum simd_immediate_check w = AARCH64_CHECK_MOV);
  rtx aarch64_check_zero_based_sve_index_immediate (rtx);
  bool aarch64_sve_index_immediate_p (rtx);
! bool aarch64_sve_arith_immediate_p (machine_mode, rtx, bool);
! bool aarch64_sve_sqadd_sqsub_immediate_p (machine_mode, rtx, bool);
  bool aarch64_sve_bitmask_immediate_p (rtx);
  bool aarch64_sve_dup_immediate_p (rtx);
  bool aarch64_sve_cmp_immediate_p (rtx, bool);
*************** bool aarch64_sve_float_mul_immediate_p (
*** 475,490 ****
  bool aarch64_split_dimode_const_store (rtx, rtx);
  bool aarch64_symbolic_address_p (rtx);
  bool aarch64_uimm12_shift (HOST_WIDE_INT);
  bool aarch64_use_return_insn_p (void);
- bool aarch64_use_simple_return_insn_p (void);
- const char *aarch64_mangle_builtin_type (const_tree);
  const char *aarch64_output_casesi (rtx *);
  
  enum aarch64_symbol_type aarch64_classify_symbol (rtx, HOST_WIDE_INT);
  enum aarch64_symbol_type aarch64_classify_tls_symbol (rtx);
  enum reg_class aarch64_regno_regclass (unsigned);
  int aarch64_asm_preferred_eh_data_format (int, int);
  int aarch64_fpconst_pow_of_2 (rtx);
  machine_mode aarch64_hard_regno_caller_save_mode (unsigned, unsigned,
  						       machine_mode);
  int aarch64_uxt_size (int, HOST_WIDE_INT);
--- 560,576 ----
  bool aarch64_split_dimode_const_store (rtx, rtx);
  bool aarch64_symbolic_address_p (rtx);
  bool aarch64_uimm12_shift (HOST_WIDE_INT);
+ int aarch64_movk_shift (const wide_int_ref &, const wide_int_ref &);
  bool aarch64_use_return_insn_p (void);
  const char *aarch64_output_casesi (rtx *);
  
+ unsigned int aarch64_tlsdesc_abi_id ();
  enum aarch64_symbol_type aarch64_classify_symbol (rtx, HOST_WIDE_INT);
  enum aarch64_symbol_type aarch64_classify_tls_symbol (rtx);
  enum reg_class aarch64_regno_regclass (unsigned);
  int aarch64_asm_preferred_eh_data_format (int, int);
  int aarch64_fpconst_pow_of_2 (rtx);
+ int aarch64_fpconst_pow2_recip (rtx);
  machine_mode aarch64_hard_regno_caller_save_mode (unsigned, unsigned,
  						       machine_mode);
  int aarch64_uxt_size (int, HOST_WIDE_INT);
*************** rtx aarch64_return_addr (int, rtx);
*** 496,506 ****
  rtx aarch64_simd_gen_const_vector_dup (machine_mode, HOST_WIDE_INT);
  bool aarch64_simd_mem_operand_p (rtx);
  bool aarch64_sve_ld1r_operand_p (rtx);
  bool aarch64_sve_ldr_operand_p (rtx);
  bool aarch64_sve_struct_memory_operand_p (rtx);
  rtx aarch64_simd_vect_par_cnst_half (machine_mode, int, bool);
  rtx aarch64_tls_get_addr (void);
- tree aarch64_fold_builtin (tree, int, tree *, bool);
  unsigned aarch64_dbx_register_number (unsigned);
  unsigned aarch64_trampoline_size (void);
  void aarch64_asm_output_labelref (FILE *, const char *);
--- 582,598 ----
  rtx aarch64_simd_gen_const_vector_dup (machine_mode, HOST_WIDE_INT);
  bool aarch64_simd_mem_operand_p (rtx);
  bool aarch64_sve_ld1r_operand_p (rtx);
+ bool aarch64_sve_ld1rq_operand_p (rtx);
+ bool aarch64_sve_ld1ro_operand_p (rtx, scalar_mode);
+ bool aarch64_sve_ldff1_operand_p (rtx);
+ bool aarch64_sve_ldnf1_operand_p (rtx);
  bool aarch64_sve_ldr_operand_p (rtx);
+ bool aarch64_sve_prefetch_operand_p (rtx, machine_mode);
  bool aarch64_sve_struct_memory_operand_p (rtx);
  rtx aarch64_simd_vect_par_cnst_half (machine_mode, int, bool);
+ rtx aarch64_gen_stepped_int_parallel (unsigned int, int, int);
+ bool aarch64_stepped_int_parallel_p (rtx, int);
  rtx aarch64_tls_get_addr (void);
  unsigned aarch64_dbx_register_number (unsigned);
  unsigned aarch64_trampoline_size (void);
  void aarch64_asm_output_labelref (FILE *, const char *);
*************** const char * aarch64_output_probe_stack_
*** 510,524 ****
  const char * aarch64_output_probe_sve_stack_clash (rtx, rtx, rtx, rtx);
  void aarch64_err_no_fpadvsimd (machine_mode);
  void aarch64_expand_epilogue (bool);
! void aarch64_expand_mov_immediate (rtx, rtx, rtx (*) (rtx, rtx) = 0);
  void aarch64_emit_sve_pred_move (rtx, rtx, rtx);
  void aarch64_expand_sve_mem_move (rtx, rtx, machine_mode);
  bool aarch64_maybe_expand_sve_subreg_move (rtx, rtx);
  void aarch64_split_sve_subreg_move (rtx, rtx, rtx);
  void aarch64_expand_prologue (void);
  void aarch64_expand_vector_init (rtx, rtx);
  void aarch64_init_cumulative_args (CUMULATIVE_ARGS *, const_tree, rtx,
! 				   const_tree, unsigned);
  void aarch64_init_expanders (void);
  void aarch64_init_simd_builtins (void);
  void aarch64_emit_call_insn (rtx);
--- 602,626 ----
  const char * aarch64_output_probe_sve_stack_clash (rtx, rtx, rtx, rtx);
  void aarch64_err_no_fpadvsimd (machine_mode);
  void aarch64_expand_epilogue (bool);
! rtx aarch64_ptrue_all (unsigned int);
! opt_machine_mode aarch64_ptrue_all_mode (rtx);
! rtx aarch64_convert_sve_data_to_pred (rtx, machine_mode, rtx);
! rtx aarch64_expand_sve_dupq (rtx, machine_mode, rtx);
! void aarch64_expand_mov_immediate (rtx, rtx);
! rtx aarch64_ptrue_reg (machine_mode);
! rtx aarch64_pfalse_reg (machine_mode);
! bool aarch64_sve_pred_dominates_p (rtx *, rtx);
! bool aarch64_sve_same_pred_for_ptest_p (rtx *, rtx *);
  void aarch64_emit_sve_pred_move (rtx, rtx, rtx);
  void aarch64_expand_sve_mem_move (rtx, rtx, machine_mode);
  bool aarch64_maybe_expand_sve_subreg_move (rtx, rtx);
+ rtx aarch64_replace_reg_mode (rtx, machine_mode);
  void aarch64_split_sve_subreg_move (rtx, rtx, rtx);
  void aarch64_expand_prologue (void);
  void aarch64_expand_vector_init (rtx, rtx);
+ void aarch64_sve_expand_vector_init (rtx, rtx);
  void aarch64_init_cumulative_args (CUMULATIVE_ARGS *, const_tree, rtx,
! 				   const_tree, unsigned, bool = false);
  void aarch64_init_expanders (void);
  void aarch64_init_simd_builtins (void);
  void aarch64_emit_call_insn (rtx);
*************** bool aarch64_gen_adjusted_ldpstp (rtx *,
*** 584,605 ****
  void aarch64_expand_sve_vec_cmp_int (rtx, rtx_code, rtx, rtx);
  bool aarch64_expand_sve_vec_cmp_float (rtx, rtx_code, rtx, rtx, bool);
  void aarch64_expand_sve_vcond (machine_mode, machine_mode, rtx *);
- #endif /* RTX_CODE */
  
! void aarch64_init_builtins (void);
  
  bool aarch64_process_target_attr (tree);
  void aarch64_override_options_internal (struct gcc_options *);
  
! rtx aarch64_expand_builtin (tree exp,
! 			    rtx target,
! 			    rtx subtarget ATTRIBUTE_UNUSED,
! 			    machine_mode mode ATTRIBUTE_UNUSED,
! 			    int ignore ATTRIBUTE_UNUSED);
! tree aarch64_builtin_decl (unsigned, bool ATTRIBUTE_UNUSED);
! tree aarch64_builtin_rsqrt (unsigned int);
  tree aarch64_builtin_vectorized_function (unsigned int, tree, tree);
  
  extern void aarch64_split_combinev16qi (rtx operands[3]);
  extern void aarch64_expand_vec_perm (rtx, rtx, rtx, rtx, unsigned int);
  extern void aarch64_expand_sve_vec_perm (rtx, rtx, rtx, rtx);
--- 686,727 ----
  void aarch64_expand_sve_vec_cmp_int (rtx, rtx_code, rtx, rtx);
  bool aarch64_expand_sve_vec_cmp_float (rtx, rtx_code, rtx, rtx, bool);
  void aarch64_expand_sve_vcond (machine_mode, machine_mode, rtx *);
  
! bool aarch64_prepare_sve_int_fma (rtx *, rtx_code);
! bool aarch64_prepare_sve_cond_int_fma (rtx *, rtx_code);
! #endif /* RTX_CODE */
  
  bool aarch64_process_target_attr (tree);
  void aarch64_override_options_internal (struct gcc_options *);
  
! const char *aarch64_general_mangle_builtin_type (const_tree);
! void aarch64_general_init_builtins (void);
! tree aarch64_general_fold_builtin (unsigned int, tree, unsigned int, tree *);
! gimple *aarch64_general_gimple_fold_builtin (unsigned int, gcall *);
! rtx aarch64_general_expand_builtin (unsigned int, tree, rtx, int);
! tree aarch64_general_builtin_decl (unsigned, bool);
! tree aarch64_general_builtin_rsqrt (unsigned int);
  tree aarch64_builtin_vectorized_function (unsigned int, tree, tree);
  
+ namespace aarch64_sve {
+   void init_builtins ();
+   void handle_arm_sve_h ();
+   tree builtin_decl (unsigned, bool);
+   bool builtin_type_p (const_tree);
+   bool builtin_type_p (const_tree, unsigned int *, unsigned int *);
+   const char *mangle_builtin_type (const_tree);
+   tree resolve_overloaded_builtin (location_t, unsigned int,
+ 				   vec<tree, va_gc> *);
+   bool check_builtin_call (location_t, vec<location_t>, unsigned int,
+ 			   tree, unsigned int, tree *);
+   gimple *gimple_fold_builtin (unsigned int, gimple_stmt_iterator *, gcall *);
+   rtx expand_builtin (unsigned int, tree, rtx);
+   tree handle_arm_sve_vector_bits_attribute (tree *, tree, tree, int, bool *);
+ #ifdef GCC_TARGET_H
+   bool verify_type_context (location_t, type_context_kind, const_tree, bool);
+ #endif
+ }
+ 
  extern void aarch64_split_combinev16qi (rtx operands[3]);
  extern void aarch64_expand_vec_perm (rtx, rtx, rtx, rtx, unsigned int);
  extern void aarch64_expand_sve_vec_perm (rtx, rtx, rtx, rtx);
*************** bool aarch64_handle_option (struct gcc_o
*** 626,636 ****
  			     const struct cl_decoded_option *, location_t);
  const char *aarch64_rewrite_selected_cpu (const char *name);
  enum aarch64_parse_opt_result aarch64_parse_extension (const char *,
! 						       unsigned long *,
  						       std::string *);
  void aarch64_get_all_extension_candidates (auto_vec<const char *> *candidates);
! std::string aarch64_get_extension_string_for_isa_flags (unsigned long,
! 							unsigned long);
  
  /* Defined in aarch64-d.c  */
  extern void aarch64_d_target_versions (void);
--- 748,757 ----
  			     const struct cl_decoded_option *, location_t);
  const char *aarch64_rewrite_selected_cpu (const char *name);
  enum aarch64_parse_opt_result aarch64_parse_extension (const char *,
! 						       uint64_t *,
  						       std::string *);
  void aarch64_get_all_extension_candidates (auto_vec<const char *> *candidates);
! std::string aarch64_get_extension_string_for_isa_flags (uint64_t, uint64_t);
  
  /* Defined in aarch64-d.c  */
  extern void aarch64_d_target_versions (void);
*************** poly_uint64 aarch64_regmode_natural_size
*** 644,647 ****
--- 765,783 ----
  
  bool aarch64_high_bits_all_ones_p (HOST_WIDE_INT);
  
+ struct atomic_ool_names
+ {
+     const char *str[5][4];
+ };
+ 
+ rtx aarch64_atomic_ool_func(machine_mode mode, rtx model_rtx,
+ 			    const atomic_ool_names *names);
+ extern const atomic_ool_names aarch64_ool_swp_names;
+ extern const atomic_ool_names aarch64_ool_ldadd_names;
+ extern const atomic_ool_names aarch64_ool_ldset_names;
+ extern const atomic_ool_names aarch64_ool_ldclr_names;
+ extern const atomic_ool_names aarch64_ool_ldeor_names;
+ 
+ tree aarch64_resolve_overloaded_builtin_general (location_t, tree, void *);
+ 
  #endif /* GCC_AARCH64_PROTOS_H */
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-simd-builtin-types.def gcc-10.1.0/gcc/config/aarch64/aarch64-simd-builtin-types.def
*** gcc-9.3.0/gcc/config/aarch64/aarch64-simd-builtin-types.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-simd-builtin-types.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Builtin AdvSIMD types.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Builtin AdvSIMD types.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 50,52 ****
--- 50,54 ----
    ENTRY (Float32x4_t, V4SF, none, 13)
    ENTRY (Float64x1_t, V1DF, none, 13)
    ENTRY (Float64x2_t, V2DF, none, 13)
+   ENTRY (Bfloat16x4_t, V4BF, none, 14)
+   ENTRY (Bfloat16x8_t, V8BF, none, 14)
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-simd-builtins.def gcc-10.1.0/gcc/config/aarch64/aarch64-simd-builtins.def
*** gcc-9.3.0/gcc/config/aarch64/aarch64-simd-builtins.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-simd-builtins.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 185,190 ****
--- 185,205 ----
    BUILTIN_VQ_HSI (TERNOP, sqdmlal2_n, 0)
    BUILTIN_VQ_HSI (TERNOP, sqdmlsl2_n, 0)
  
+   BUILTIN_VD_BHSI (BINOP, intrinsic_vec_smult_lo_, 0)
+   BUILTIN_VD_BHSI (BINOPU, intrinsic_vec_umult_lo_, 0)
+ 
+   BUILTIN_VQW (BINOP, vec_widen_smult_hi_, 10)
+   BUILTIN_VQW (BINOPU, vec_widen_umult_hi_, 10)
+ 
+   BUILTIN_VD_HSI (TERNOP_LANE, vec_smult_lane_, 0)
+   BUILTIN_VD_HSI (QUADOP_LANE, vec_smlal_lane_, 0)
+   BUILTIN_VD_HSI (TERNOP_LANE, vec_smult_laneq_, 0)
+   BUILTIN_VD_HSI (QUADOP_LANE, vec_smlal_laneq_, 0)
+   BUILTIN_VD_HSI (TERNOPU_LANE, vec_umult_lane_, 0)
+   BUILTIN_VD_HSI (QUADOPU_LANE, vec_umlal_lane_, 0)
+   BUILTIN_VD_HSI (TERNOPU_LANE, vec_umult_laneq_, 0)
+   BUILTIN_VD_HSI (QUADOPU_LANE, vec_umlal_laneq_, 0)
+ 
    BUILTIN_VSD_HSI (BINOP, sqdmull, 0)
    BUILTIN_VSD_HSI (TERNOP_LANE, sqdmull_lane, 0)
    BUILTIN_VSD_HSI (TERNOP_LANE, sqdmull_laneq, 0)
***************
*** 212,221 ****
--- 227,241 ----
    /* Implemented by aarch64_<sur><dotprod>{_lane}{q}<dot_mode>.  */
    BUILTIN_VB (TERNOP, sdot, 0)
    BUILTIN_VB (TERNOPU, udot, 0)
+   BUILTIN_VB (TERNOP_SSUS, usdot, 0)
    BUILTIN_VB (QUADOP_LANE, sdot_lane, 0)
    BUILTIN_VB (QUADOPU_LANE, udot_lane, 0)
    BUILTIN_VB (QUADOP_LANE, sdot_laneq, 0)
    BUILTIN_VB (QUADOPU_LANE, udot_laneq, 0)
+   BUILTIN_VB (QUADOPSSUS_LANE_QUADTUP, usdot_lane, 0)
+   BUILTIN_VB (QUADOPSSUS_LANE_QUADTUP, usdot_laneq, 0)
+   BUILTIN_VB (QUADOPSSSU_LANE_QUADTUP, sudot_lane, 0)
+   BUILTIN_VB (QUADOPSSSU_LANE_QUADTUP, sudot_laneq, 0)
  
    /* Implemented by aarch64_fcadd<rot><mode>.   */
    BUILTIN_VHSDF (BINOP, fcadd90, 0)
***************
*** 424,430 ****
    BUILTIN_VB (UNOP, rbit, 0)
  
    /* Implemented by
!      aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>.  */
    BUILTIN_VALL (BINOP, zip1, 0)
    BUILTIN_VALL (BINOP, zip2, 0)
    BUILTIN_VALL (BINOP, uzp1, 0)
--- 444,450 ----
    BUILTIN_VB (UNOP, rbit, 0)
  
    /* Implemented by
!      aarch64_<PERMUTE:perm_insn><mode>.  */
    BUILTIN_VALL (BINOP, zip1, 0)
    BUILTIN_VALL (BINOP, zip2, 0)
    BUILTIN_VALL (BINOP, uzp1, 0)
***************
*** 465,476 ****
--- 485,502 ----
    /* Implemented by aarch64_ld1x3<VALLDIF:mode>.  */
    BUILTIN_VALLDIF (LOADSTRUCT, ld1x3, 0)
  
+   /* Implemented by aarch64_ld1x4<VALLDIF:mode>.  */
+   BUILTIN_VALLDIF (LOADSTRUCT, ld1x4, 0)
+ 
    /* Implemented by aarch64_st1x2<VALLDIF:mode>.  */
    BUILTIN_VALLDIF (STORESTRUCT, st1x2, 0)
  
    /* Implemented by aarch64_st1x3<VALLDIF:mode>.  */
    BUILTIN_VALLDIF (STORESTRUCT, st1x3, 0)
  
+   /* Implemented by aarch64_st1x4<VALLDIF:mode>.  */
+   BUILTIN_VALLDIF (STORESTRUCT, st1x4, 0)
+ 
    /* Implemented by fma<mode>4.  */
    BUILTIN_VHSDF (TERNOP, fma, 4)
    VAR1 (TERNOP, fma, 4, hf)
***************
*** 670,672 ****
--- 696,731 ----
    /* Implemented by aarch64_fml<f16mac1>lq_laneq_highv4sf.  */
    VAR1 (QUADOP_LANE, fmlalq_laneq_high, 0, v4sf)
    VAR1 (QUADOP_LANE, fmlslq_laneq_high, 0, v4sf)
+ 
+   /* Implemented by aarch64_<frintnzs_op><mode>.  */
+   BUILTIN_VSFDF (UNOP, frint32z, 0)
+   BUILTIN_VSFDF (UNOP, frint32x, 0)
+   BUILTIN_VSFDF (UNOP, frint64z, 0)
+   BUILTIN_VSFDF (UNOP, frint64x, 0)
+ 
+   /* Implemented by aarch64_bfdot{_lane}{q}<mode>.  */
+   VAR2 (TERNOP, bfdot, 0, v2sf, v4sf)
+   VAR2 (QUADOP_LANE_PAIR, bfdot_lane, 0, v2sf, v4sf)
+   VAR2 (QUADOP_LANE_PAIR, bfdot_laneq, 0, v2sf, v4sf)
+ 
+   /* Implemented by aarch64_bfmmlaqv4sf  */
+   VAR1 (TERNOP, bfmmlaq, 0, v4sf)
+ 
+   /* Implemented by aarch64_bfmlal<bt>{_lane{q}}v4sf  */
+   VAR1 (TERNOP, bfmlalb, 0, v4sf)
+   VAR1 (TERNOP, bfmlalt, 0, v4sf)
+   VAR1 (QUADOP_LANE, bfmlalb_lane, 0, v4sf)
+   VAR1 (QUADOP_LANE, bfmlalt_lane, 0, v4sf)
+   VAR1 (QUADOP_LANE, bfmlalb_lane_q, 0, v4sf)
+   VAR1 (QUADOP_LANE, bfmlalt_lane_q, 0, v4sf)
+ 
+   /* Implemented by aarch64_simd_<sur>mmlav16qi.  */
+   VAR1 (TERNOP, simd_smmla, 0, v16qi)
+   VAR1 (TERNOPU, simd_ummla, 0, v16qi)
+   VAR1 (TERNOP_SSUS, simd_usmmla, 0, v16qi)
+ 
+   /* Implemented by aarch64_bfcvtn{q}{2}<mode>  */
+   VAR1 (UNOP, bfcvtn, 0, v4bf)
+   VAR1 (UNOP, bfcvtn_q, 0, v8bf)
+   VAR1 (BINOP, bfcvtn2, 0, v8bf)
+   VAR1 (UNOP, bfcvt, 0, bf)
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-simd.md gcc-10.1.0/gcc/config/aarch64/aarch64-simd.md
*** gcc-9.3.0/gcc/config/aarch64/aarch64-simd.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-simd.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description for AArch64 AdvSIMD architecture.
! ;; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Machine description for AArch64 AdvSIMD architecture.
! ;; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
***************
*** 19,26 ****
  ;; <http://www.gnu.org/licenses/>.
  
  (define_expand "mov<mode>"
!   [(set (match_operand:VALL_F16 0 "nonimmediate_operand" "")
! 	(match_operand:VALL_F16 1 "general_operand" ""))]
    "TARGET_SIMD"
    "
    /* Force the operand into a register if it is not an
--- 19,26 ----
  ;; <http://www.gnu.org/licenses/>.
  
  (define_expand "mov<mode>"
!   [(set (match_operand:VALL_F16MOV 0 "nonimmediate_operand")
! 	(match_operand:VALL_F16MOV 1 "general_operand"))]
    "TARGET_SIMD"
    "
    /* Force the operand into a register if it is not an
***************
*** 39,47 ****
  )
  
  (define_expand "movmisalign<mode>"
!   [(set (match_operand:VALL 0 "nonimmediate_operand" "")
!         (match_operand:VALL 1 "general_operand" ""))]
!   "TARGET_SIMD"
  {
    /* This pattern is not permitted to fail during expansion: if both arguments
       are non-registers (e.g. memory := constant, which can be created by the
--- 39,47 ----
  )
  
  (define_expand "movmisalign<mode>"
!   [(set (match_operand:VALL 0 "nonimmediate_operand")
!         (match_operand:VALL 1 "general_operand"))]
!   "TARGET_SIMD && !STRICT_ALIGNMENT"
  {
    /* This pattern is not permitted to fail during expansion: if both arguments
       are non-registers (e.g. memory := constant, which can be created by the
***************
*** 101,110 ****
    [(set_attr "type" "neon_dup<q>")]
  )
  
! (define_insn "*aarch64_simd_mov<VD:mode>"
!   [(set (match_operand:VD 0 "nonimmediate_operand"
  		"=w, m,  m,  w, ?r, ?w, ?r, w")
! 	(match_operand:VD 1 "general_operand"
  		"m,  Dz, w,  w,  w,  r,  r, Dn"))]
    "TARGET_SIMD
     && (register_operand (operands[0], <MODE>mode)
--- 101,110 ----
    [(set_attr "type" "neon_dup<q>")]
  )
  
! (define_insn "*aarch64_simd_mov<VDMOV:mode>"
!   [(set (match_operand:VDMOV 0 "nonimmediate_operand"
  		"=w, m,  m,  w, ?r, ?w, ?r, w")
! 	(match_operand:VDMOV 1 "general_operand"
  		"m,  Dz, w,  w,  w,  r,  r, Dn"))]
    "TARGET_SIMD
     && (register_operand (operands[0], <MODE>mode)
***************
*** 129,138 ****
  		     mov_reg, neon_move<q>")]
  )
  
! (define_insn "*aarch64_simd_mov<VQ:mode>"
!   [(set (match_operand:VQ 0 "nonimmediate_operand"
  		"=w, Umn,  m,  w, ?r, ?w, ?r, w")
! 	(match_operand:VQ 1 "general_operand"
  		"m,  Dz, w,  w,  w,  r,  r, Dn"))]
    "TARGET_SIMD
     && (register_operand (operands[0], <MODE>mode)
--- 129,138 ----
  		     mov_reg, neon_move<q>")]
  )
  
! (define_insn "*aarch64_simd_mov<VQMOV:mode>"
!   [(set (match_operand:VQMOV 0 "nonimmediate_operand"
  		"=w, Umn,  m,  w, ?r, ?w, ?r, w")
! 	(match_operand:VQMOV 1 "general_operand"
  		"m,  Dz, w,  w,  w,  r,  r, Dn"))]
    "TARGET_SIMD
     && (register_operand (operands[0], <MODE>mode)
***************
*** 234,241 ****
  
  
  (define_split
!   [(set (match_operand:VQ 0 "register_operand" "")
!       (match_operand:VQ 1 "register_operand" ""))]
    "TARGET_SIMD && reload_completed
     && GP_REGNUM_P (REGNO (operands[0]))
     && GP_REGNUM_P (REGNO (operands[1]))"
--- 234,241 ----
  
  
  (define_split
!   [(set (match_operand:VQMOV 0 "register_operand" "")
!       (match_operand:VQMOV 1 "register_operand" ""))]
    "TARGET_SIMD && reload_completed
     && GP_REGNUM_P (REGNO (operands[0]))
     && GP_REGNUM_P (REGNO (operands[1]))"
***************
*** 246,253 ****
  })
  
  (define_split
!   [(set (match_operand:VQ 0 "register_operand" "")
!         (match_operand:VQ 1 "register_operand" ""))]
    "TARGET_SIMD && reload_completed
     && ((FP_REGNUM_P (REGNO (operands[0])) && GP_REGNUM_P (REGNO (operands[1])))
         || (GP_REGNUM_P (REGNO (operands[0])) && FP_REGNUM_P (REGNO (operands[1]))))"
--- 246,253 ----
  })
  
  (define_split
!   [(set (match_operand:VQMOV 0 "register_operand" "")
!         (match_operand:VQMOV 1 "register_operand" ""))]
    "TARGET_SIMD && reload_completed
     && ((FP_REGNUM_P (REGNO (operands[0])) && GP_REGNUM_P (REGNO (operands[1])))
         || (GP_REGNUM_P (REGNO (operands[0])) && FP_REGNUM_P (REGNO (operands[1]))))"
***************
*** 258,265 ****
  })
  
  (define_expand "@aarch64_split_simd_mov<mode>"
!   [(set (match_operand:VQ 0)
!         (match_operand:VQ 1))]
    "TARGET_SIMD"
    {
      rtx dst = operands[0];
--- 258,265 ----
  })
  
  (define_expand "@aarch64_split_simd_mov<mode>"
!   [(set (match_operand:VQMOV 0)
!         (match_operand:VQMOV 1))]
    "TARGET_SIMD"
    {
      rtx dst = operands[0];
***************
*** 282,318 ****
          rtx dst_high_part = gen_highpart (<VHALF>mode, dst);
  	rtx lo = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
  	rtx hi = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
! 
!         emit_insn
!           (gen_aarch64_simd_mov_from_<mode>low (dst_low_part, src, lo));
!         emit_insn
!           (gen_aarch64_simd_mov_from_<mode>high (dst_high_part, src, hi));
        }
      DONE;
    }
  )
  
! (define_insn "aarch64_simd_mov_from_<mode>low"
!   [(set (match_operand:<VHALF> 0 "register_operand" "=r")
          (vec_select:<VHALF>
!           (match_operand:VQ 1 "register_operand" "w")
!           (match_operand:VQ 2 "vect_par_cnst_lo_half" "")))]
!   "TARGET_SIMD && reload_completed"
!   "umov\t%0, %1.d[0]"
!   [(set_attr "type" "neon_to_gp<q>")
!    (set_attr "length" "4")
!   ])
  
  (define_insn "aarch64_simd_mov_from_<mode>high"
!   [(set (match_operand:<VHALF> 0 "register_operand" "=r")
          (vec_select:<VHALF>
!           (match_operand:VQ 1 "register_operand" "w")
!           (match_operand:VQ 2 "vect_par_cnst_hi_half" "")))]
!   "TARGET_SIMD && reload_completed"
!   "umov\t%0, %1.d[1]"
!   [(set_attr "type" "neon_to_gp<q>")
!    (set_attr "length" "4")
!   ])
  
  (define_insn "orn<mode>3"
   [(set (match_operand:VDQ_I 0 "register_operand" "=w")
--- 282,332 ----
          rtx dst_high_part = gen_highpart (<VHALF>mode, dst);
  	rtx lo = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
  	rtx hi = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
!         emit_insn (gen_aarch64_get_half<mode> (dst_low_part, src, lo));
!         emit_insn (gen_aarch64_get_half<mode> (dst_high_part, src, hi));
        }
      DONE;
    }
  )
  
! (define_expand "aarch64_get_half<mode>"
!   [(set (match_operand:<VHALF> 0 "register_operand")
          (vec_select:<VHALF>
!           (match_operand:VQMOV 1 "register_operand")
!           (match_operand 2 "ascending_int_parallel")))]
!   "TARGET_SIMD"
! )
! 
! (define_insn_and_split "aarch64_simd_mov_from_<mode>low"
!   [(set (match_operand:<VHALF> 0 "register_operand" "=w,?r")
!         (vec_select:<VHALF>
!           (match_operand:VQMOV_NO2E 1 "register_operand" "w,w")
!           (match_operand:VQMOV_NO2E 2 "vect_par_cnst_lo_half" "")))]
!   "TARGET_SIMD"
!   "@
!    #
!    umov\t%0, %1.d[0]"
!   "&& reload_completed && aarch64_simd_register (operands[0], <VHALF>mode)"
!   [(set (match_dup 0) (match_dup 1))]
!   {
!     operands[1] = aarch64_replace_reg_mode (operands[1], <VHALF>mode);
!   }
!   [(set_attr "type" "mov_reg,neon_to_gp<q>")
!    (set_attr "length" "4")]
! )
  
  (define_insn "aarch64_simd_mov_from_<mode>high"
!   [(set (match_operand:<VHALF> 0 "register_operand" "=w,?r")
          (vec_select:<VHALF>
!           (match_operand:VQMOV_NO2E 1 "register_operand" "w,w")
!           (match_operand:VQMOV_NO2E 2 "vect_par_cnst_hi_half" "")))]
!   "TARGET_SIMD"
!   "@
!    dup\\t%d0, %1.d[1]
!    umov\t%0, %1.d[1]"
!   [(set_attr "type" "neon_dup<q>,neon_to_gp<q>")
!    (set_attr "length" "4")]
! )
  
  (define_insn "orn<mode>3"
   [(set (match_operand:VDQ_I 0 "register_operand" "=w")
***************
*** 506,511 ****
--- 520,539 ----
    [(set_attr "type" "neon_dot<q>")]
  )
  
+ ;; These instructions map to the __builtins for the armv8.6a I8MM usdot
+ ;; (vector) Dot Product operation.
+ (define_insn "aarch64_usdot<vsi2qi>"
+   [(set (match_operand:VS 0 "register_operand" "=w")
+ 	(plus:VS
+ 	  (unspec:VS [(match_operand:<VSI2QI> 2 "register_operand" "w")
+ 		      (match_operand:<VSI2QI> 3 "register_operand" "w")]
+ 	  UNSPEC_USDOT)
+ 	  (match_operand:VS 1 "register_operand" "0")))]
+   "TARGET_I8MM"
+   "usdot\\t%0.<Vtype>, %2.<Vdottype>, %3.<Vdottype>"
+   [(set_attr "type" "neon_dot<q>")]
+ )
+ 
  ;; These expands map to the Dot Product optab the vectorizer checks for.
  ;; The auto-vectorizer expects a dot product builtin that also does an
  ;; accumulation into the provided register.
***************
*** 573,578 ****
--- 601,626 ----
    [(set_attr "type" "neon_dot<q>")]
  )
  
+ ;; These instructions map to the __builtins for the armv8.6a I8MM usdot, sudot
+ ;; (by element) Dot Product operations.
+ (define_insn "aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>"
+   [(set (match_operand:VS 0 "register_operand" "=w")
+ 	(plus:VS
+ 	  (unspec:VS [(match_operand:<VS:VSI2QI> 2 "register_operand" "w")
+ 		      (match_operand:VB 3 "register_operand" "w")
+ 		      (match_operand:SI 4 "immediate_operand" "i")]
+ 	  DOTPROD_I8MM)
+ 	  (match_operand:VS 1 "register_operand" "0")))]
+   "TARGET_I8MM"
+   {
+     int nunits = GET_MODE_NUNITS (<VB:MODE>mode).to_constant ();
+     int lane = INTVAL (operands[4]);
+     operands[4] = gen_int_mode (ENDIAN_LANE_N (nunits / 4, lane), SImode);
+     return "<DOTPROD_I8MM:sur>dot\\t%0.<VS:Vtype>, %2.<VS:Vdottype>, %3.4b[%4]";
+   }
+   [(set_attr "type" "neon_dot<VS:q>")]
+ )
+ 
  (define_expand "copysign<mode>3"
    [(match_operand:VHSDF 0 "register_operand")
     (match_operand:VHSDF 1 "register_operand")
***************
*** 652,659 ****
    [(set_attr "type" "neon_fp_rsqrts_<stype><q>")])
  
  (define_expand "rsqrt<mode>2"
!   [(set (match_operand:VALLF 0 "register_operand" "=w")
! 	(unspec:VALLF [(match_operand:VALLF 1 "register_operand" "w")]
  		     UNSPEC_RSQRT))]
    "TARGET_SIMD"
  {
--- 700,707 ----
    [(set_attr "type" "neon_fp_rsqrts_<stype><q>")])
  
  (define_expand "rsqrt<mode>2"
!   [(set (match_operand:VALLF 0 "register_operand")
! 	(unspec:VALLF [(match_operand:VALLF 1 "register_operand")]
  		     UNSPEC_RSQRT))]
    "TARGET_SIMD"
  {
***************
*** 710,724 ****
  ;; So (ABS:QI (minus:QI 64 -128)) == (ABS:QI (192 or -64 signed)) == 64.
  ;; Whereas SABD would return 192 (-64 signed) on the above example.
  ;; Use MINUS ([us]max (op1, op2), [us]min (op1, op2)) instead.
! (define_insn "*aarch64_<su>abd<mode>_3"
    [(set (match_operand:VDQ_BHSI 0 "register_operand" "=w")
  	(minus:VDQ_BHSI
  	  (USMAX:VDQ_BHSI
  	    (match_operand:VDQ_BHSI 1 "register_operand" "w")
  	    (match_operand:VDQ_BHSI 2 "register_operand" "w"))
! 	  (match_operator 3 "aarch64_<max_opp>"
! 	    [(match_dup 1)
! 	     (match_dup 2)])))]
    "TARGET_SIMD"
    "<su>abd\t%0.<Vtype>, %1.<Vtype>, %2.<Vtype>"
    [(set_attr "type" "neon_abd<q>")]
--- 758,772 ----
  ;; So (ABS:QI (minus:QI 64 -128)) == (ABS:QI (192 or -64 signed)) == 64.
  ;; Whereas SABD would return 192 (-64 signed) on the above example.
  ;; Use MINUS ([us]max (op1, op2), [us]min (op1, op2)) instead.
! (define_insn "aarch64_<su>abd<mode>_3"
    [(set (match_operand:VDQ_BHSI 0 "register_operand" "=w")
  	(minus:VDQ_BHSI
  	  (USMAX:VDQ_BHSI
  	    (match_operand:VDQ_BHSI 1 "register_operand" "w")
  	    (match_operand:VDQ_BHSI 2 "register_operand" "w"))
! 	  (<max_opp>:VDQ_BHSI
! 	    (match_dup 1)
! 	    (match_dup 2))))]
    "TARGET_SIMD"
    "<su>abd\t%0.<Vtype>, %1.<Vtype>, %2.<Vtype>"
    [(set_attr "type" "neon_abd<q>")]
***************
*** 764,770 ****
  ;; UABAL	tmp.8h, op1.16b, op2.16b
  ;; UADALP	op3.4s, tmp.8h
  ;; MOV		op0, op3 // should be eliminated in later passes.
! ;; The signed version just uses the signed variants of the above instructions.
  
  (define_expand "<sur>sadv16qi"
    [(use (match_operand:V4SI 0 "register_operand"))
--- 812,827 ----
  ;; UABAL	tmp.8h, op1.16b, op2.16b
  ;; UADALP	op3.4s, tmp.8h
  ;; MOV		op0, op3 // should be eliminated in later passes.
! ;;
! ;; For TARGET_DOTPROD we do:
! ;; MOV	tmp1.16b, #1 // Can be CSE'd and hoisted out of loops.
! ;; UABD	tmp2.16b, op1.16b, op2.16b
! ;; UDOT	op3.4s, tmp2.16b, tmp1.16b
! ;; MOV	op0, op3 // RA will tie the operands of UDOT appropriately.
! ;;
! ;; The signed version just uses the signed variants of the above instructions
! ;; but for TARGET_DOTPROD still emits a UDOT as the absolute difference is
! ;; unsigned.
  
  (define_expand "<sur>sadv16qi"
    [(use (match_operand:V4SI 0 "register_operand"))
***************
*** 773,778 ****
--- 830,844 ----
     (use (match_operand:V4SI 3 "register_operand"))]
    "TARGET_SIMD"
    {
+     if (TARGET_DOTPROD)
+       {
+ 	rtx ones = force_reg (V16QImode, CONST1_RTX (V16QImode));
+ 	rtx abd = gen_reg_rtx (V16QImode);
+ 	emit_insn (gen_aarch64_<sur>abdv16qi_3 (abd, operands[1], operands[2]));
+ 	emit_insn (gen_aarch64_udotv16qi (operands[0], operands[3],
+ 					  abd, ones));
+ 	DONE;
+       }
      rtx reduc = gen_reg_rtx (V8HImode);
      emit_insn (gen_aarch64_<sur>abdl2v16qi_3 (reduc, operands[1],
  					       operands[2]));
***************
*** 935,940 ****
--- 1001,1021 ----
    [(set_attr "type" "neon_ins<q>")]
  )
  
+ (define_expand "signbit<mode>2"
+   [(use (match_operand:<V_INT_EQUIV> 0 "register_operand"))
+    (use (match_operand:VDQSF 1 "register_operand"))]
+   "TARGET_SIMD"
+ {
+   int shift_amount = GET_MODE_UNIT_BITSIZE (<V_INT_EQUIV>mode) - 1;
+   rtx shift_vector = aarch64_simd_gen_const_vector_dup (<V_INT_EQUIV>mode,
+                                                         shift_amount);
+   operands[1] = lowpart_subreg (<V_INT_EQUIV>mode, operands[1], <MODE>mode);
+ 
+   emit_insn (gen_aarch64_simd_lshr<v_int_equiv> (operands[0], operands[1],
+                                                  shift_vector));
+   DONE;
+ })
+ 
  (define_insn "aarch64_simd_lshr<mode>"
   [(set (match_operand:VDQ_I 0 "register_operand" "=w")
         (lshiftrt:VDQ_I (match_operand:VDQ_I 1 "register_operand" "w")
***************
*** 953,958 ****
--- 1034,1051 ----
    [(set_attr "type" "neon_shift_imm<q>")]
  )
  
+ (define_insn "*aarch64_simd_sra<mode>"
+  [(set (match_operand:VDQ_I 0 "register_operand" "=w")
+ 	(plus:VDQ_I
+ 	   (SHIFTRT:VDQ_I
+ 		(match_operand:VDQ_I 1 "register_operand" "w")
+ 		(match_operand:VDQ_I 2 "aarch64_simd_rshift_imm" "Dr"))
+ 	   (match_operand:VDQ_I 3 "register_operand" "0")))]
+   "TARGET_SIMD"
+   "<sra_op>sra\t%0.<Vtype>, %1.<Vtype>, %2"
+   [(set_attr "type" "neon_shift_acc<q>")]
+ )
+ 
  (define_insn "aarch64_simd_imm_shl<mode>"
   [(set (match_operand:VDQ_I 0 "register_operand" "=w")
         (ashift:VDQ_I (match_operand:VDQ_I 1 "register_operand" "w")
***************
*** 992,1000 ****
  )
  
  (define_expand "ashl<mode>3"
!   [(match_operand:VDQ_I 0 "register_operand" "")
!    (match_operand:VDQ_I 1 "register_operand" "")
!    (match_operand:SI  2 "general_operand" "")]
   "TARGET_SIMD"
  {
    int bit_width = GET_MODE_UNIT_SIZE (<MODE>mode) * BITS_PER_UNIT;
--- 1085,1093 ----
  )
  
  (define_expand "ashl<mode>3"
!   [(match_operand:VDQ_I 0 "register_operand")
!    (match_operand:VDQ_I 1 "register_operand")
!    (match_operand:SI  2 "general_operand")]
   "TARGET_SIMD"
  {
    int bit_width = GET_MODE_UNIT_SIZE (<MODE>mode) * BITS_PER_UNIT;
***************
*** 1012,1047 ****
  						     tmp));
            DONE;
          }
-       else
-         {
-           operands[2] = force_reg (SImode, operands[2]);
-         }
-     }
-   else if (MEM_P (operands[2]))
-     {
-       operands[2] = force_reg (SImode, operands[2]);
      }
  
!   if (REG_P (operands[2]))
!     {
!       rtx tmp = gen_reg_rtx (<MODE>mode);
!       emit_insn (gen_aarch64_simd_dup<mode> (tmp,
! 					     convert_to_mode (<VEL>mode,
! 							      operands[2],
! 							      0)));
!       emit_insn (gen_aarch64_simd_reg_sshl<mode> (operands[0], operands[1],
! 						  tmp));
!       DONE;
!     }
!   else
!     FAIL;
! }
! )
  
  (define_expand "lshr<mode>3"
!   [(match_operand:VDQ_I 0 "register_operand" "")
!    (match_operand:VDQ_I 1 "register_operand" "")
!    (match_operand:SI  2 "general_operand" "")]
   "TARGET_SIMD"
  {
    int bit_width = GET_MODE_UNIT_SIZE (<MODE>mode) * BITS_PER_UNIT;
--- 1105,1126 ----
  						     tmp));
            DONE;
          }
      }
  
!   operands[2] = force_reg (SImode, operands[2]);
! 
!   rtx tmp = gen_reg_rtx (<MODE>mode);
!   emit_insn (gen_aarch64_simd_dup<mode> (tmp, convert_to_mode (<VEL>mode,
! 							       operands[2],
! 							       0)));
!   emit_insn (gen_aarch64_simd_reg_sshl<mode> (operands[0], operands[1], tmp));
!   DONE;
! })
  
  (define_expand "lshr<mode>3"
!   [(match_operand:VDQ_I 0 "register_operand")
!    (match_operand:VDQ_I 1 "register_operand")
!    (match_operand:SI  2 "general_operand")]
   "TARGET_SIMD"
  {
    int bit_width = GET_MODE_UNIT_SIZE (<MODE>mode) * BITS_PER_UNIT;
***************
*** 1059,1094 ****
  						  tmp));
  	  DONE;
  	}
-       else
-         operands[2] = force_reg (SImode, operands[2]);
-     }
-   else if (MEM_P (operands[2]))
-     {
-       operands[2] = force_reg (SImode, operands[2]);
      }
  
!   if (REG_P (operands[2]))
!     {
!       rtx tmp = gen_reg_rtx (SImode);
!       rtx tmp1 = gen_reg_rtx (<MODE>mode);
!       emit_insn (gen_negsi2 (tmp, operands[2]));
!       emit_insn (gen_aarch64_simd_dup<mode> (tmp1,
! 					     convert_to_mode (<VEL>mode,
! 							      tmp, 0)));
!       emit_insn (gen_aarch64_simd_reg_shl<mode>_unsigned (operands[0],
! 							  operands[1],
! 							  tmp1));
!       DONE;
!     }
!   else
!     FAIL;
! }
! )
  
  (define_expand "ashr<mode>3"
!   [(match_operand:VDQ_I 0 "register_operand" "")
!    (match_operand:VDQ_I 1 "register_operand" "")
!    (match_operand:SI  2 "general_operand" "")]
   "TARGET_SIMD"
  {
    int bit_width = GET_MODE_UNIT_SIZE (<MODE>mode) * BITS_PER_UNIT;
--- 1138,1161 ----
  						  tmp));
  	  DONE;
  	}
      }
  
!   operands[2] = force_reg (SImode, operands[2]);
! 
!   rtx tmp = gen_reg_rtx (SImode);
!   rtx tmp1 = gen_reg_rtx (<MODE>mode);
!   emit_insn (gen_negsi2 (tmp, operands[2]));
!   emit_insn (gen_aarch64_simd_dup<mode> (tmp1,
! 					 convert_to_mode (<VEL>mode, tmp, 0)));
!   emit_insn (gen_aarch64_simd_reg_shl<mode>_unsigned (operands[0], operands[1],
! 						      tmp1));
!   DONE;
! })
  
  (define_expand "ashr<mode>3"
!   [(match_operand:VDQ_I 0 "register_operand")
!    (match_operand:VDQ_I 1 "register_operand")
!    (match_operand:SI  2 "general_operand")]
   "TARGET_SIMD"
  {
    int bit_width = GET_MODE_UNIT_SIZE (<MODE>mode) * BITS_PER_UNIT;
***************
*** 1106,1141 ****
  						  tmp));
            DONE;
  	}
-       else
-         operands[2] = force_reg (SImode, operands[2]);
-     }
-   else if (MEM_P (operands[2]))
-     {
-       operands[2] = force_reg (SImode, operands[2]);
      }
  
!   if (REG_P (operands[2]))
!     {
!       rtx tmp = gen_reg_rtx (SImode);
!       rtx tmp1 = gen_reg_rtx (<MODE>mode);
!       emit_insn (gen_negsi2 (tmp, operands[2]));
!       emit_insn (gen_aarch64_simd_dup<mode> (tmp1,
! 					     convert_to_mode (<VEL>mode,
! 							      tmp, 0)));
!       emit_insn (gen_aarch64_simd_reg_shl<mode>_signed (operands[0],
! 							operands[1],
! 							tmp1));
!       DONE;
!     }
!   else
!     FAIL;
! }
! )
  
  (define_expand "vashl<mode>3"
!  [(match_operand:VDQ_I 0 "register_operand" "")
!   (match_operand:VDQ_I 1 "register_operand" "")
!   (match_operand:VDQ_I 2 "register_operand" "")]
   "TARGET_SIMD"
  {
    emit_insn (gen_aarch64_simd_reg_sshl<mode> (operands[0], operands[1],
--- 1173,1196 ----
  						  tmp));
            DONE;
  	}
      }
  
!   operands[2] = force_reg (SImode, operands[2]);
! 
!   rtx tmp = gen_reg_rtx (SImode);
!   rtx tmp1 = gen_reg_rtx (<MODE>mode);
!   emit_insn (gen_negsi2 (tmp, operands[2]));
!   emit_insn (gen_aarch64_simd_dup<mode> (tmp1, convert_to_mode (<VEL>mode,
! 								tmp, 0)));
!   emit_insn (gen_aarch64_simd_reg_shl<mode>_signed (operands[0], operands[1],
! 						    tmp1));
!   DONE;
! })
  
  (define_expand "vashl<mode>3"
!  [(match_operand:VDQ_I 0 "register_operand")
!   (match_operand:VDQ_I 1 "register_operand")
!   (match_operand:VDQ_I 2 "register_operand")]
   "TARGET_SIMD"
  {
    emit_insn (gen_aarch64_simd_reg_sshl<mode> (operands[0], operands[1],
***************
*** 1147,1155 ****
  ;; Negating individual lanes most certainly offsets the
  ;; gain from vectorization.
  (define_expand "vashr<mode>3"
!  [(match_operand:VDQ_BHSI 0 "register_operand" "")
!   (match_operand:VDQ_BHSI 1 "register_operand" "")
!   (match_operand:VDQ_BHSI 2 "register_operand" "")]
   "TARGET_SIMD"
  {
    rtx neg = gen_reg_rtx (<MODE>mode);
--- 1202,1210 ----
  ;; Negating individual lanes most certainly offsets the
  ;; gain from vectorization.
  (define_expand "vashr<mode>3"
!  [(match_operand:VDQ_BHSI 0 "register_operand")
!   (match_operand:VDQ_BHSI 1 "register_operand")
!   (match_operand:VDQ_BHSI 2 "register_operand")]
   "TARGET_SIMD"
  {
    rtx neg = gen_reg_rtx (<MODE>mode);
***************
*** 1161,1169 ****
  
  ;; DI vector shift
  (define_expand "aarch64_ashr_simddi"
!   [(match_operand:DI 0 "register_operand" "=w")
!    (match_operand:DI 1 "register_operand" "w")
!    (match_operand:SI 2 "aarch64_shift_imm64_di" "")]
    "TARGET_SIMD"
    {
      /* An arithmetic shift right by 64 fills the result with copies of the sign
--- 1216,1224 ----
  
  ;; DI vector shift
  (define_expand "aarch64_ashr_simddi"
!   [(match_operand:DI 0 "register_operand")
!    (match_operand:DI 1 "register_operand")
!    (match_operand:SI 2 "aarch64_shift_imm64_di")]
    "TARGET_SIMD"
    {
      /* An arithmetic shift right by 64 fills the result with copies of the sign
***************
*** 1177,1185 ****
  )
  
  (define_expand "vlshr<mode>3"
!  [(match_operand:VDQ_BHSI 0 "register_operand" "")
!   (match_operand:VDQ_BHSI 1 "register_operand" "")
!   (match_operand:VDQ_BHSI 2 "register_operand" "")]
   "TARGET_SIMD"
  {
    rtx neg = gen_reg_rtx (<MODE>mode);
--- 1232,1240 ----
  )
  
  (define_expand "vlshr<mode>3"
!  [(match_operand:VDQ_BHSI 0 "register_operand")
!   (match_operand:VDQ_BHSI 1 "register_operand")
!   (match_operand:VDQ_BHSI 2 "register_operand")]
   "TARGET_SIMD"
  {
    rtx neg = gen_reg_rtx (<MODE>mode);
***************
*** 1190,1198 ****
  })
  
  (define_expand "aarch64_lshr_simddi"
!   [(match_operand:DI 0 "register_operand" "=w")
!    (match_operand:DI 1 "register_operand" "w")
!    (match_operand:SI 2 "aarch64_shift_imm64_di" "")]
    "TARGET_SIMD"
    {
      if (INTVAL (operands[2]) == 64)
--- 1245,1253 ----
  })
  
  (define_expand "aarch64_lshr_simddi"
!   [(match_operand:DI 0 "register_operand")
!    (match_operand:DI 1 "register_operand")
!    (match_operand:SI 2 "aarch64_shift_imm64_di")]
    "TARGET_SIMD"
    {
      if (INTVAL (operands[2]) == 64)
***************
*** 1220,1228 ****
  )
  
  (define_expand "vec_set<mode>"
!   [(match_operand:VALL_F16 0 "register_operand" "+w")
!    (match_operand:<VEL> 1 "register_operand" "w")
!    (match_operand:SI 2 "immediate_operand" "")]
    "TARGET_SIMD"
    {
      HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
--- 1275,1283 ----
  )
  
  (define_expand "vec_set<mode>"
!   [(match_operand:VALL_F16 0 "register_operand")
!    (match_operand:<VEL> 1 "register_operand")
!    (match_operand:SI 2 "immediate_operand")]
    "TARGET_SIMD"
    {
      HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
***************
*** 1257,1263 ****
   "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<MODE>mode, INTVAL (operands[2]));
!     return "mla\t%0.<Vtype>, %3.<Vtype>, %1.<Vtype>[%2]";
    }
    [(set_attr "type" "neon_mla_<Vetype>_scalar<q>")]
  )
--- 1312,1318 ----
   "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<MODE>mode, INTVAL (operands[2]));
!     return "mla\t%0.<Vtype>, %3.<Vtype>, %1.<Vetype>[%2]";
    }
    [(set_attr "type" "neon_mla_<Vetype>_scalar<q>")]
  )
***************
*** 1275,1281 ****
   "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<VSWAP_WIDTH>mode, INTVAL (operands[2]));
!     return "mla\t%0.<Vtype>, %3.<Vtype>, %1.<Vtype>[%2]";
    }
    [(set_attr "type" "neon_mla_<Vetype>_scalar<q>")]
  )
--- 1330,1336 ----
   "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<VSWAP_WIDTH>mode, INTVAL (operands[2]));
!     return "mla\t%0.<Vtype>, %3.<Vtype>, %1.<Vetype>[%2]";
    }
    [(set_attr "type" "neon_mla_<Vetype>_scalar<q>")]
  )
***************
*** 1315,1321 ****
   "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<MODE>mode, INTVAL (operands[2]));
!     return "mls\t%0.<Vtype>, %3.<Vtype>, %1.<Vtype>[%2]";
    }
    [(set_attr "type" "neon_mla_<Vetype>_scalar<q>")]
  )
--- 1370,1376 ----
   "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<MODE>mode, INTVAL (operands[2]));
!     return "mls\t%0.<Vtype>, %3.<Vtype>, %1.<Vetype>[%2]";
    }
    [(set_attr "type" "neon_mla_<Vetype>_scalar<q>")]
  )
***************
*** 1333,1339 ****
   "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<VSWAP_WIDTH>mode, INTVAL (operands[2]));
!     return "mls\t%0.<Vtype>, %3.<Vtype>, %1.<Vtype>[%2]";
    }
    [(set_attr "type" "neon_mla_<Vetype>_scalar<q>")]
  )
--- 1388,1394 ----
   "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<VSWAP_WIDTH>mode, INTVAL (operands[2]));
!     return "mls\t%0.<Vtype>, %3.<Vtype>, %1.<Vetype>[%2]";
    }
    [(set_attr "type" "neon_mla_<Vetype>_scalar<q>")]
  )
***************
*** 1361,1369 ****
  )
  
  (define_expand "<su><maxmin>v2di3"
!  [(set (match_operand:V2DI 0 "register_operand" "")
!        (MAXMIN:V2DI (match_operand:V2DI 1 "register_operand" "")
!                     (match_operand:V2DI 2 "register_operand" "")))]
   "TARGET_SIMD"
  {
    enum rtx_code cmp_operator;
--- 1416,1424 ----
  )
  
  (define_expand "<su><maxmin>v2di3"
!  [(set (match_operand:V2DI 0 "register_operand")
!        (MAXMIN:V2DI (match_operand:V2DI 1 "register_operand")
!                     (match_operand:V2DI 2 "register_operand")))]
   "TARGET_SIMD"
  {
    enum rtx_code cmp_operator;
***************
*** 1426,1433 ****
  ;; On big-endian this is { zeroes, operand }
  
  (define_insn "move_lo_quad_internal_<mode>"
!   [(set (match_operand:VQ_NO2E 0 "register_operand" "=w,w,w")
! 	(vec_concat:VQ_NO2E
  	  (match_operand:<VHALF> 1 "register_operand" "w,r,r")
  	  (vec_duplicate:<VHALF> (const_int 0))))]
    "TARGET_SIMD && !BYTES_BIG_ENDIAN"
--- 1481,1488 ----
  ;; On big-endian this is { zeroes, operand }
  
  (define_insn "move_lo_quad_internal_<mode>"
!   [(set (match_operand:VQMOV_NO2E 0 "register_operand" "=w,w,w")
! 	(vec_concat:VQMOV_NO2E
  	  (match_operand:<VHALF> 1 "register_operand" "w,r,r")
  	  (vec_duplicate:<VHALF> (const_int 0))))]
    "TARGET_SIMD && !BYTES_BIG_ENDIAN"
***************
*** 1456,1463 ****
  )
  
  (define_insn "move_lo_quad_internal_be_<mode>"
!   [(set (match_operand:VQ_NO2E 0 "register_operand" "=w,w,w")
! 	(vec_concat:VQ_NO2E
  	  (vec_duplicate:<VHALF> (const_int 0))
  	  (match_operand:<VHALF> 1 "register_operand" "w,r,r")))]
    "TARGET_SIMD && BYTES_BIG_ENDIAN"
--- 1511,1518 ----
  )
  
  (define_insn "move_lo_quad_internal_be_<mode>"
!   [(set (match_operand:VQMOV_NO2E 0 "register_operand" "=w,w,w")
! 	(vec_concat:VQMOV_NO2E
  	  (vec_duplicate:<VHALF> (const_int 0))
  	  (match_operand:<VHALF> 1 "register_operand" "w,r,r")))]
    "TARGET_SIMD && BYTES_BIG_ENDIAN"
***************
*** 1486,1493 ****
  )
  
  (define_expand "move_lo_quad_<mode>"
!   [(match_operand:VQ 0 "register_operand")
!    (match_operand:VQ 1 "register_operand")]
    "TARGET_SIMD"
  {
    if (BYTES_BIG_ENDIAN)
--- 1541,1548 ----
  )
  
  (define_expand "move_lo_quad_<mode>"
!   [(match_operand:VQMOV 0 "register_operand")
!    (match_operand:VQMOV 1 "register_operand")]
    "TARGET_SIMD"
  {
    if (BYTES_BIG_ENDIAN)
***************
*** 1504,1514 ****
  ;; For big-endian this is { operand1, operand2 }
  
  (define_insn "aarch64_simd_move_hi_quad_<mode>"
!   [(set (match_operand:VQ 0 "register_operand" "+w,w")
!         (vec_concat:VQ
            (vec_select:<VHALF>
                  (match_dup 0)
!                 (match_operand:VQ 2 "vect_par_cnst_lo_half" ""))
  	  (match_operand:<VHALF> 1 "register_operand" "w,r")))]
    "TARGET_SIMD && !BYTES_BIG_ENDIAN"
    "@
--- 1559,1569 ----
  ;; For big-endian this is { operand1, operand2 }
  
  (define_insn "aarch64_simd_move_hi_quad_<mode>"
!   [(set (match_operand:VQMOV 0 "register_operand" "+w,w")
!         (vec_concat:VQMOV
            (vec_select:<VHALF>
                  (match_dup 0)
!                 (match_operand:VQMOV 2 "vect_par_cnst_lo_half" ""))
  	  (match_operand:<VHALF> 1 "register_operand" "w,r")))]
    "TARGET_SIMD && !BYTES_BIG_ENDIAN"
    "@
***************
*** 1518,1529 ****
  )
  
  (define_insn "aarch64_simd_move_hi_quad_be_<mode>"
!   [(set (match_operand:VQ 0 "register_operand" "+w,w")
!         (vec_concat:VQ
  	  (match_operand:<VHALF> 1 "register_operand" "w,r")
            (vec_select:<VHALF>
                  (match_dup 0)
!                 (match_operand:VQ 2 "vect_par_cnst_lo_half" ""))))]
    "TARGET_SIMD && BYTES_BIG_ENDIAN"
    "@
     ins\\t%0.d[1], %1.d[0]
--- 1573,1584 ----
  )
  
  (define_insn "aarch64_simd_move_hi_quad_be_<mode>"
!   [(set (match_operand:VQMOV 0 "register_operand" "+w,w")
!         (vec_concat:VQMOV
  	  (match_operand:<VHALF> 1 "register_operand" "w,r")
            (vec_select:<VHALF>
                  (match_dup 0)
!                 (match_operand:VQMOV 2 "vect_par_cnst_lo_half" ""))))]
    "TARGET_SIMD && BYTES_BIG_ENDIAN"
    "@
     ins\\t%0.d[1], %1.d[0]
***************
*** 1532,1539 ****
  )
  
  (define_expand "move_hi_quad_<mode>"
!  [(match_operand:VQ 0 "register_operand" "")
!   (match_operand:<VHALF> 1 "register_operand" "")]
   "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
--- 1587,1594 ----
  )
  
  (define_expand "move_hi_quad_<mode>"
!  [(match_operand:VQMOV 0 "register_operand")
!   (match_operand:<VHALF> 1 "register_operand")]
   "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
***************
*** 1558,1566 ****
  )
  
  (define_expand "vec_pack_trunc_<mode>"
!  [(match_operand:<VNARROWD> 0 "register_operand" "")
!   (match_operand:VDN 1 "register_operand" "")
!   (match_operand:VDN 2 "register_operand" "")]
   "TARGET_SIMD"
  {
    rtx tempreg = gen_reg_rtx (<VDBL>mode);
--- 1613,1621 ----
  )
  
  (define_expand "vec_pack_trunc_<mode>"
!  [(match_operand:<VNARROWD> 0 "register_operand")
!   (match_operand:VDN 1 "register_operand")
!   (match_operand:VDN 2 "register_operand")]
   "TARGET_SIMD"
  {
    rtx tempreg = gen_reg_rtx (<VDBL>mode);
***************
*** 1616,1622 ****
  )
  
  (define_expand "vec_unpack<su>_hi_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "")
     (ANY_EXTEND:<VWIDE> (match_operand:VQW 1 "register_operand"))]
    "TARGET_SIMD"
    {
--- 1671,1677 ----
  )
  
  (define_expand "vec_unpack<su>_hi_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
     (ANY_EXTEND:<VWIDE> (match_operand:VQW 1 "register_operand"))]
    "TARGET_SIMD"
    {
***************
*** 1628,1635 ****
  )
  
  (define_expand "vec_unpack<su>_lo_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "")
!    (ANY_EXTEND:<VWIDE> (match_operand:VQW 1 "register_operand" ""))]
    "TARGET_SIMD"
    {
      rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
--- 1683,1690 ----
  )
  
  (define_expand "vec_unpack<su>_lo_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (ANY_EXTEND:<VWIDE> (match_operand:VQW 1 "register_operand"))]
    "TARGET_SIMD"
    {
      rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
***************
*** 1746,1755 ****
    [(set_attr "type" "neon_mul_<Vetype>_long")]
  )
  
  (define_expand "vec_widen_<su>mult_lo_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "")
!    (ANY_EXTEND:<VWIDE> (match_operand:VQW 1 "register_operand" ""))
!    (ANY_EXTEND:<VWIDE> (match_operand:VQW 2 "register_operand" ""))]
   "TARGET_SIMD"
   {
     rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
--- 1801,1821 ----
    [(set_attr "type" "neon_mul_<Vetype>_long")]
  )
  
+ (define_insn "aarch64_intrinsic_vec_<su>mult_lo_<mode>"
+   [(set (match_operand:<VWIDE> 0 "register_operand" "=w")
+ 	(mult:<VWIDE> (ANY_EXTEND:<VWIDE>
+ 			 (match_operand:VD_BHSI 1 "register_operand" "w"))
+ 		      (ANY_EXTEND:<VWIDE>
+ 			 (match_operand:VD_BHSI 2 "register_operand" "w"))))]
+   "TARGET_SIMD"
+   "<su>mull\\t%0.<Vwtype>, %1.<Vtype>, %2.<Vtype>"
+   [(set_attr "type" "neon_mul_<Vetype>_long")]
+ )
+ 
  (define_expand "vec_widen_<su>mult_lo_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (ANY_EXTEND:<VWIDE> (match_operand:VQW 1 "register_operand"))
!    (ANY_EXTEND:<VWIDE> (match_operand:VQW 2 "register_operand"))]
   "TARGET_SIMD"
   {
     rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
***************
*** 1774,1782 ****
  )
  
  (define_expand "vec_widen_<su>mult_hi_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "")
!    (ANY_EXTEND:<VWIDE> (match_operand:VQW 1 "register_operand" ""))
!    (ANY_EXTEND:<VWIDE> (match_operand:VQW 2 "register_operand" ""))]
   "TARGET_SIMD"
   {
     rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 1840,1848 ----
  )
  
  (define_expand "vec_widen_<su>mult_hi_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (ANY_EXTEND:<VWIDE> (match_operand:VQW 1 "register_operand"))
!    (ANY_EXTEND:<VWIDE> (match_operand:VQW 2 "register_operand"))]
   "TARGET_SIMD"
   {
     rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 1788,1793 ****
--- 1854,1899 ----
   }
  )
  
+ ;; vmull_lane_s16 intrinsics
+ (define_insn "aarch64_vec_<su>mult_lane<Qlane>"
+   [(set (match_operand:<VWIDE> 0 "register_operand" "=w")
+ 	(mult:<VWIDE>
+ 	  (ANY_EXTEND:<VWIDE>
+ 	    (match_operand:<VCOND> 1 "register_operand" "w"))
+ 	  (ANY_EXTEND:<VWIDE>
+ 	    (vec_duplicate:<VCOND>
+ 	      (vec_select:<VEL>
+ 		(match_operand:VDQHS 2 "register_operand" "<vwx>")
+ 		(parallel [(match_operand:SI 3 "immediate_operand" "i")]))))))]
+   "TARGET_SIMD"
+   {
+     operands[3] = aarch64_endian_lane_rtx (<MODE>mode, INTVAL (operands[3]));
+     return "<su>mull\\t%0.<Vwtype>, %1.<Vcondtype>, %2.<Vetype>[%3]";
+   }
+   [(set_attr "type" "neon_mul_<Vetype>_scalar_long")]
+ )
+ 
+ ;; vmlal_lane_s16 intrinsics
+ (define_insn "aarch64_vec_<su>mlal_lane<Qlane>"
+   [(set (match_operand:<VWIDE> 0 "register_operand" "=w")
+ 	(plus:<VWIDE>
+ 	  (mult:<VWIDE>
+ 	    (ANY_EXTEND:<VWIDE>
+ 	      (match_operand:<VCOND> 2 "register_operand" "w"))
+ 	    (ANY_EXTEND:<VWIDE>
+ 	      (vec_duplicate:<VCOND>
+ 		(vec_select:<VEL>
+ 		  (match_operand:VDQHS 3 "register_operand" "<vwx>")
+ 		  (parallel [(match_operand:SI 4 "immediate_operand" "i")])))))
+ 	  (match_operand:<VWIDE> 1 "register_operand" "0")))]
+   "TARGET_SIMD"
+   {
+     operands[4] = aarch64_endian_lane_rtx (<MODE>mode, INTVAL (operands[4]));
+     return "<su>mlal\\t%0.<Vwtype>, %2.<Vcondtype>, %3.<Vetype>[%4]";
+   }
+   [(set_attr "type" "neon_mla_<Vetype>_scalar_long")]
+ )
+ 
  ;; FP vector operations.
  ;; AArch64 AdvSIMD supports single-precision (32-bit) and 
  ;; double-precision (64-bit) floating-point data types and arithmetic as
***************
*** 1841,1849 ****
  )
  
  (define_expand "div<mode>3"
!  [(set (match_operand:VHSDF 0 "register_operand" "=w")
!        (div:VHSDF (match_operand:VHSDF 1 "register_operand" "w")
! 		  (match_operand:VHSDF 2 "register_operand" "w")))]
   "TARGET_SIMD"
  {
    if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
--- 1947,1955 ----
  )
  
  (define_expand "div<mode>3"
!  [(set (match_operand:VHSDF 0 "register_operand")
!        (div:VHSDF (match_operand:VHSDF 1 "register_operand")
! 		  (match_operand:VHSDF 2 "register_operand")))]
   "TARGET_SIMD"
  {
    if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
***************
*** 1899,1905 ****
    "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<MODE>mode, INTVAL (operands[2]));
!     return "fmla\\t%0.<Vtype>, %3.<Vtype>, %1.<Vtype>[%2]";
    }
    [(set_attr "type" "neon_fp_mla_<Vetype>_scalar<q>")]
  )
--- 2005,2011 ----
    "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<MODE>mode, INTVAL (operands[2]));
!     return "fmla\\t%0.<Vtype>, %3.<Vtype>, %1.<Vetype>[%2]";
    }
    [(set_attr "type" "neon_fp_mla_<Vetype>_scalar<q>")]
  )
***************
*** 1916,1922 ****
    "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<VSWAP_WIDTH>mode, INTVAL (operands[2]));
!     return "fmla\\t%0.<Vtype>, %3.<Vtype>, %1.<Vtype>[%2]";
    }
    [(set_attr "type" "neon_fp_mla_<Vetype>_scalar<q>")]
  )
--- 2022,2028 ----
    "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<VSWAP_WIDTH>mode, INTVAL (operands[2]));
!     return "fmla\\t%0.<Vtype>, %3.<Vtype>, %1.<Vetype>[%2]";
    }
    [(set_attr "type" "neon_fp_mla_<Vetype>_scalar<q>")]
  )
***************
*** 1944,1950 ****
    "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (V2DFmode, INTVAL (operands[2]));
!     return "fmla\\t%0.2d, %3.2d, %1.2d[%2]";
    }
    [(set_attr "type" "neon_fp_mla_d_scalar_q")]
  )
--- 2050,2056 ----
    "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (V2DFmode, INTVAL (operands[2]));
!     return "fmla\\t%0.2d, %3.2d, %1.d[%2]";
    }
    [(set_attr "type" "neon_fp_mla_d_scalar_q")]
  )
***************
*** 1973,1979 ****
    "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<MODE>mode, INTVAL (operands[2]));
!     return "fmls\\t%0.<Vtype>, %3.<Vtype>, %1.<Vtype>[%2]";
    }
    [(set_attr "type" "neon_fp_mla_<Vetype>_scalar<q>")]
  )
--- 2079,2085 ----
    "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<MODE>mode, INTVAL (operands[2]));
!     return "fmls\\t%0.<Vtype>, %3.<Vtype>, %1.<Vetype>[%2]";
    }
    [(set_attr "type" "neon_fp_mla_<Vetype>_scalar<q>")]
  )
***************
*** 1991,1997 ****
    "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<VSWAP_WIDTH>mode, INTVAL (operands[2]));
!     return "fmls\\t%0.<Vtype>, %3.<Vtype>, %1.<Vtype>[%2]";
    }
    [(set_attr "type" "neon_fp_mla_<Vetype>_scalar<q>")]
  )
--- 2097,2103 ----
    "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (<VSWAP_WIDTH>mode, INTVAL (operands[2]));
!     return "fmls\\t%0.<Vtype>, %3.<Vtype>, %1.<Vetype>[%2]";
    }
    [(set_attr "type" "neon_fp_mla_<Vetype>_scalar<q>")]
  )
***************
*** 2021,2027 ****
    "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (V2DFmode, INTVAL (operands[2]));
!     return "fmls\\t%0.2d, %3.2d, %1.2d[%2]";
    }
    [(set_attr "type" "neon_fp_mla_d_scalar_q")]
  )
--- 2127,2133 ----
    "TARGET_SIMD"
    {
      operands[2] = aarch64_endian_lane_rtx (V2DFmode, INTVAL (operands[2]));
!     return "fmls\\t%0.2d, %3.2d, %1.d[%2]";
    }
    [(set_attr "type" "neon_fp_mla_d_scalar_q")]
  )
***************
*** 2178,2185 ****
  ;; other big-endian patterns their behavior is as required.
  
  (define_expand "vec_unpacks_lo_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "")
!    (match_operand:VQ_HSF 1 "register_operand" "")]
    "TARGET_SIMD"
    {
      rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
--- 2284,2291 ----
  ;; other big-endian patterns their behavior is as required.
  
  (define_expand "vec_unpacks_lo_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:VQ_HSF 1 "register_operand")]
    "TARGET_SIMD"
    {
      rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
***************
*** 2201,2208 ****
  )
  
  (define_expand "vec_unpacks_hi_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "")
!    (match_operand:VQ_HSF 1 "register_operand" "")]
    "TARGET_SIMD"
    {
      rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 2307,2314 ----
  )
  
  (define_expand "vec_unpacks_hi_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:VQ_HSF 1 "register_operand")]
    "TARGET_SIMD"
    {
      rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 2254,2262 ****
  )
  
  (define_expand "aarch64_float_truncate_hi_<Vdbl>"
!   [(match_operand:<VDBL> 0 "register_operand" "=w")
!    (match_operand:VDF 1 "register_operand" "0")
!    (match_operand:<VWIDE> 2 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx (*gen) (rtx, rtx, rtx) = BYTES_BIG_ENDIAN
--- 2360,2368 ----
  )
  
  (define_expand "aarch64_float_truncate_hi_<Vdbl>"
!   [(match_operand:<VDBL> 0 "register_operand")
!    (match_operand:VDF 1 "register_operand")
!    (match_operand:<VWIDE> 2 "register_operand")]
    "TARGET_SIMD"
  {
    rtx (*gen) (rtx, rtx, rtx) = BYTES_BIG_ENDIAN
***************
*** 2349,2356 ****
  ;; 'across lanes' add.
  
  (define_expand "reduc_plus_scal_<mode>"
!   [(match_operand:<VEL> 0 "register_operand" "=w")
!    (unspec:VDQ_I [(match_operand:VDQ_I 1 "register_operand" "w")]
  	       UNSPEC_ADDV)]
    "TARGET_SIMD"
    {
--- 2455,2462 ----
  ;; 'across lanes' add.
  
  (define_expand "reduc_plus_scal_<mode>"
!   [(match_operand:<VEL> 0 "register_operand")
!    (unspec:VDQ_I [(match_operand:VDQ_I 1 "register_operand")]
  	       UNSPEC_ADDV)]
    "TARGET_SIMD"
    {
***************
*** 2381,2386 ****
--- 2487,2503 ----
    [(set_attr "type" "neon_reduc_add<q>")]
  )
  
+ ;; ADDV with result zero-extended to SI/DImode (for popcount).
+ (define_insn "aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>"
+  [(set (match_operand:GPI 0 "register_operand" "=w")
+        (zero_extend:GPI
+ 	(unspec:<VDQV_E:VEL> [(match_operand:VDQV_E 1 "register_operand" "w")]
+ 			     UNSPEC_ADDV)))]
+  "TARGET_SIMD"
+  "add<VDQV_E:vp>\\t%<VDQV_E:Vetype>0, %1.<VDQV_E:Vtype>"
+   [(set_attr "type" "neon_reduc_add<VDQV_E:q>")]
+ )
+ 
  (define_insn "aarch64_reduc_plus_internalv2si"
   [(set (match_operand:V2SI 0 "register_operand" "=w")
         (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")]
***************
*** 3102,3131 ****
  (define_insn "*aarch64_get_lane_extend<GPI:mode><VDQQH:mode>"
    [(set (match_operand:GPI 0 "register_operand" "=r")
  	(sign_extend:GPI
! 	  (vec_select:<VEL>
  	    (match_operand:VDQQH 1 "register_operand" "w")
  	    (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))]
    "TARGET_SIMD"
    {
!     operands[2] = aarch64_endian_lane_rtx (<MODE>mode, INTVAL (operands[2]));
      return "smov\\t%<GPI:w>0, %1.<VDQQH:Vetype>[%2]";
    }
!   [(set_attr "type" "neon_to_gp<q>")]
! )
! 
! (define_insn "*aarch64_get_lane_zero_extend<GPI:mode><VDQQH:mode>"
!   [(set (match_operand:GPI 0 "register_operand" "=r")
! 	(zero_extend:GPI
! 	  (vec_select:<VEL>
! 	    (match_operand:VDQQH 1 "register_operand" "w")
! 	    (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))]
!   "TARGET_SIMD"
!   {
!     operands[2] = aarch64_endian_lane_rtx (<VDQQH:MODE>mode,
! 					   INTVAL (operands[2]));
!     return "umov\\t%w0, %1.<Vetype>[%2]";
!   }
!   [(set_attr "type" "neon_to_gp<q>")]
  )
  
  ;; Lane extraction of a value, neither sign nor zero extension
--- 3219,3249 ----
  (define_insn "*aarch64_get_lane_extend<GPI:mode><VDQQH:mode>"
    [(set (match_operand:GPI 0 "register_operand" "=r")
  	(sign_extend:GPI
! 	  (vec_select:<VDQQH:VEL>
  	    (match_operand:VDQQH 1 "register_operand" "w")
  	    (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))]
    "TARGET_SIMD"
    {
!     operands[2] = aarch64_endian_lane_rtx (<VDQQH:MODE>mode,
! 					   INTVAL (operands[2]));
      return "smov\\t%<GPI:w>0, %1.<VDQQH:Vetype>[%2]";
    }
!   [(set_attr "type" "neon_to_gp<VDQQH:q>")]
! )
! 
! (define_insn "*aarch64_get_lane_zero_extend<GPI:mode><VDQQH:mode>"
!   [(set (match_operand:GPI 0 "register_operand" "=r")
! 	(zero_extend:GPI
! 	  (vec_select:<VDQQH:VEL>
! 	    (match_operand:VDQQH 1 "register_operand" "w")
! 	    (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))]
!   "TARGET_SIMD"
!   {
!     operands[2] = aarch64_endian_lane_rtx (<VDQQH:MODE>mode,
! 					   INTVAL (operands[2]));
!     return "umov\\t%w0, %1.<VDQQH:Vetype>[%2]";
!   }
!   [(set_attr "type" "neon_to_gp<VDQQH:q>")]
  )
  
  ;; Lane extraction of a value, neither sign nor zero extension
***************
*** 3183,3189 ****
  ;; In this insn, operand 1 should be low, and operand 2 the high part of the
  ;; dest vector.
  
! (define_insn "*aarch64_combinez<mode>"
    [(set (match_operand:<VDBL> 0 "register_operand" "=w,w,w")
  	(vec_concat:<VDBL>
  	  (match_operand:VDC 1 "general_operand" "w,?r,m")
--- 3301,3307 ----
  ;; In this insn, operand 1 should be low, and operand 2 the high part of the
  ;; dest vector.
  
! (define_insn "@aarch64_combinez<mode>"
    [(set (match_operand:<VDBL> 0 "register_operand" "=w,w,w")
  	(vec_concat:<VDBL>
  	  (match_operand:VDC 1 "general_operand" "w,?r,m")
***************
*** 3197,3203 ****
     (set_attr "arch" "simd,fp,simd")]
  )
  
! (define_insn "*aarch64_combinez_be<mode>"
    [(set (match_operand:<VDBL> 0 "register_operand" "=w,w,w")
          (vec_concat:<VDBL>
  	  (match_operand:VDC 2 "aarch64_simd_or_scalar_imm_zero")
--- 3315,3321 ----
     (set_attr "arch" "simd,fp,simd")]
  )
  
! (define_insn "@aarch64_combinez_be<mode>"
    [(set (match_operand:<VDBL> 0 "register_operand" "=w,w,w")
          (vec_concat:<VDBL>
  	  (match_operand:VDC 2 "aarch64_simd_or_scalar_imm_zero")
***************
*** 3266,3274 ****
  
  
  (define_expand "aarch64_saddl2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:VQW 1 "register_operand" "w")
!    (match_operand:VQW 2 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 3384,3392 ----
  
  
  (define_expand "aarch64_saddl2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:VQW 1 "register_operand")
!    (match_operand:VQW 2 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 3278,3286 ****
  })
  
  (define_expand "aarch64_uaddl2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:VQW 1 "register_operand" "w")
!    (match_operand:VQW 2 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 3396,3404 ----
  })
  
  (define_expand "aarch64_uaddl2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:VQW 1 "register_operand")
!    (match_operand:VQW 2 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 3290,3298 ****
  })
  
  (define_expand "aarch64_ssubl2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:VQW 1 "register_operand" "w")
!    (match_operand:VQW 2 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 3408,3416 ----
  })
  
  (define_expand "aarch64_ssubl2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:VQW 1 "register_operand")
!    (match_operand:VQW 2 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 3302,3310 ****
  })
  
  (define_expand "aarch64_usubl2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:VQW 1 "register_operand" "w")
!    (match_operand:VQW 2 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 3420,3428 ----
  })
  
  (define_expand "aarch64_usubl2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:VQW 1 "register_operand")
!    (match_operand:VQW 2 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 3327,3336 ****
  ;; <su><addsub>w<q>.
  
  (define_expand "widen_ssum<mode>3"
!   [(set (match_operand:<VDBLW> 0 "register_operand" "")
  	(plus:<VDBLW> (sign_extend:<VDBLW> 
! 		        (match_operand:VQW 1 "register_operand" ""))
! 		      (match_operand:<VDBLW> 2 "register_operand" "")))]
    "TARGET_SIMD"
    {
      rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
--- 3445,3454 ----
  ;; <su><addsub>w<q>.
  
  (define_expand "widen_ssum<mode>3"
!   [(set (match_operand:<VDBLW> 0 "register_operand")
  	(plus:<VDBLW> (sign_extend:<VDBLW> 
! 		        (match_operand:VQW 1 "register_operand"))
! 		      (match_operand:<VDBLW> 2 "register_operand")))]
    "TARGET_SIMD"
    {
      rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
***************
*** 3344,3353 ****
  )
  
  (define_expand "widen_ssum<mode>3"
!   [(set (match_operand:<VWIDE> 0 "register_operand" "")
  	(plus:<VWIDE> (sign_extend:<VWIDE>
! 		        (match_operand:VD_BHSI 1 "register_operand" ""))
! 		      (match_operand:<VWIDE> 2 "register_operand" "")))]
    "TARGET_SIMD"
  {
    emit_insn (gen_aarch64_saddw<mode> (operands[0], operands[2], operands[1]));
--- 3462,3471 ----
  )
  
  (define_expand "widen_ssum<mode>3"
!   [(set (match_operand:<VWIDE> 0 "register_operand")
  	(plus:<VWIDE> (sign_extend:<VWIDE>
! 		        (match_operand:VD_BHSI 1 "register_operand"))
! 		      (match_operand:<VWIDE> 2 "register_operand")))]
    "TARGET_SIMD"
  {
    emit_insn (gen_aarch64_saddw<mode> (operands[0], operands[2], operands[1]));
***************
*** 3355,3364 ****
  })
  
  (define_expand "widen_usum<mode>3"
!   [(set (match_operand:<VDBLW> 0 "register_operand" "")
  	(plus:<VDBLW> (zero_extend:<VDBLW> 
! 		        (match_operand:VQW 1 "register_operand" ""))
! 		      (match_operand:<VDBLW> 2 "register_operand" "")))]
    "TARGET_SIMD"
    {
      rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
--- 3473,3482 ----
  })
  
  (define_expand "widen_usum<mode>3"
!   [(set (match_operand:<VDBLW> 0 "register_operand")
  	(plus:<VDBLW> (zero_extend:<VDBLW> 
! 		        (match_operand:VQW 1 "register_operand"))
! 		      (match_operand:<VDBLW> 2 "register_operand")))]
    "TARGET_SIMD"
    {
      rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, false);
***************
*** 3372,3381 ****
  )
  
  (define_expand "widen_usum<mode>3"
!   [(set (match_operand:<VWIDE> 0 "register_operand" "")
  	(plus:<VWIDE> (zero_extend:<VWIDE>
! 		        (match_operand:VD_BHSI 1 "register_operand" ""))
! 		      (match_operand:<VWIDE> 2 "register_operand" "")))]
    "TARGET_SIMD"
  {
    emit_insn (gen_aarch64_uaddw<mode> (operands[0], operands[2], operands[1]));
--- 3490,3499 ----
  )
  
  (define_expand "widen_usum<mode>3"
!   [(set (match_operand:<VWIDE> 0 "register_operand")
  	(plus:<VWIDE> (zero_extend:<VWIDE>
! 		        (match_operand:VD_BHSI 1 "register_operand"))
! 		      (match_operand:<VWIDE> 2 "register_operand")))]
    "TARGET_SIMD"
  {
    emit_insn (gen_aarch64_uaddw<mode> (operands[0], operands[2], operands[1]));
***************
*** 3453,3461 ****
  )
  
  (define_expand "aarch64_saddw2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:<VWIDE> 1 "register_operand" "w")
!    (match_operand:VQW 2 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 3571,3579 ----
  )
  
  (define_expand "aarch64_saddw2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:<VWIDE> 1 "register_operand")
!    (match_operand:VQW 2 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 3465,3473 ****
  })
  
  (define_expand "aarch64_uaddw2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:<VWIDE> 1 "register_operand" "w")
!    (match_operand:VQW 2 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 3583,3591 ----
  })
  
  (define_expand "aarch64_uaddw2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:<VWIDE> 1 "register_operand")
!    (match_operand:VQW 2 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 3478,3486 ****
  
  
  (define_expand "aarch64_ssubw2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:<VWIDE> 1 "register_operand" "w")
!    (match_operand:VQW 2 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 3596,3604 ----
  
  
  (define_expand "aarch64_ssubw2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:<VWIDE> 1 "register_operand")
!    (match_operand:VQW 2 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 3490,3498 ****
  })
  
  (define_expand "aarch64_usubw2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:<VWIDE> 1 "register_operand" "w")
!    (match_operand:VQW 2 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 3608,3616 ----
  })
  
  (define_expand "aarch64_usubw2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:<VWIDE> 1 "register_operand")
!    (match_operand:VQW 2 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 3650,3662 ****
  )
  ;; <su>q<addsub>
  
! (define_insn "aarch64_<su_optab><optab><mode>"
    [(set (match_operand:VSDQ_I 0 "register_operand" "=w")
  	(BINQOPS:VSDQ_I (match_operand:VSDQ_I 1 "register_operand" "w")
! 			  (match_operand:VSDQ_I 2 "register_operand" "w")))]
    "TARGET_SIMD"
!   "<su_optab><optab>\\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>"
!   [(set_attr "type" "neon_<optab><q>")]
  )
  
  ;; suqadd and usqadd
--- 3768,3780 ----
  )
  ;; <su>q<addsub>
  
! (define_insn "aarch64_<su_optab>q<addsub><mode>"
    [(set (match_operand:VSDQ_I 0 "register_operand" "=w")
  	(BINQOPS:VSDQ_I (match_operand:VSDQ_I 1 "register_operand" "w")
! 			(match_operand:VSDQ_I 2 "register_operand" "w")))]
    "TARGET_SIMD"
!   "<su_optab>q<addsub>\\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>"
!   [(set_attr "type" "neon_q<addsub><q>")]
  )
  
  ;; suqadd and usqadd
***************
*** 4025,4034 ****
  )
  
  (define_expand "aarch64_sqdmlal2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:<VWIDE> 1 "register_operand" "w")
!    (match_operand:VQ_HSI 2 "register_operand" "w")
!    (match_operand:VQ_HSI 3 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 4143,4152 ----
  )
  
  (define_expand "aarch64_sqdmlal2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:<VWIDE> 1 "register_operand")
!    (match_operand:VQ_HSI 2 "register_operand")
!    (match_operand:VQ_HSI 3 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 4038,4047 ****
  })
  
  (define_expand "aarch64_sqdmlsl2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:<VWIDE> 1 "register_operand" "w")
!    (match_operand:VQ_HSI 2 "register_operand" "w")
!    (match_operand:VQ_HSI 3 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 4156,4165 ----
  })
  
  (define_expand "aarch64_sqdmlsl2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:<VWIDE> 1 "register_operand")
!    (match_operand:VQ_HSI 2 "register_operand")
!    (match_operand:VQ_HSI 3 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 4105,4115 ****
  )
  
  (define_expand "aarch64_sqdmlal2_lane<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:<VWIDE> 1 "register_operand" "w")
!    (match_operand:VQ_HSI 2 "register_operand" "w")
!    (match_operand:<VCOND> 3 "register_operand" "<vwx>")
!    (match_operand:SI 4 "immediate_operand" "i")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 4223,4233 ----
  )
  
  (define_expand "aarch64_sqdmlal2_lane<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:<VWIDE> 1 "register_operand")
!    (match_operand:VQ_HSI 2 "register_operand")
!    (match_operand:<VCOND> 3 "register_operand")
!    (match_operand:SI 4 "immediate_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 4120,4130 ****
  })
  
  (define_expand "aarch64_sqdmlal2_laneq<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:<VWIDE> 1 "register_operand" "w")
!    (match_operand:VQ_HSI 2 "register_operand" "w")
!    (match_operand:<VCONQ> 3 "register_operand" "<vwx>")
!    (match_operand:SI 4 "immediate_operand" "i")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 4238,4248 ----
  })
  
  (define_expand "aarch64_sqdmlal2_laneq<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:<VWIDE> 1 "register_operand")
!    (match_operand:VQ_HSI 2 "register_operand")
!    (match_operand:<VCONQ> 3 "register_operand")
!    (match_operand:SI 4 "immediate_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 4135,4145 ****
  })
  
  (define_expand "aarch64_sqdmlsl2_lane<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:<VWIDE> 1 "register_operand" "w")
!    (match_operand:VQ_HSI 2 "register_operand" "w")
!    (match_operand:<VCOND> 3 "register_operand" "<vwx>")
!    (match_operand:SI 4 "immediate_operand" "i")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 4253,4263 ----
  })
  
  (define_expand "aarch64_sqdmlsl2_lane<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:<VWIDE> 1 "register_operand")
!    (match_operand:VQ_HSI 2 "register_operand")
!    (match_operand:<VCOND> 3 "register_operand")
!    (match_operand:SI 4 "immediate_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 4150,4160 ****
  })
  
  (define_expand "aarch64_sqdmlsl2_laneq<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:<VWIDE> 1 "register_operand" "w")
!    (match_operand:VQ_HSI 2 "register_operand" "w")
!    (match_operand:<VCONQ> 3 "register_operand" "<vwx>")
!    (match_operand:SI 4 "immediate_operand" "i")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 4268,4278 ----
  })
  
  (define_expand "aarch64_sqdmlsl2_laneq<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:<VWIDE> 1 "register_operand")
!    (match_operand:VQ_HSI 2 "register_operand")
!    (match_operand:<VCONQ> 3 "register_operand")
!    (match_operand:SI 4 "immediate_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 4184,4193 ****
  )
  
  (define_expand "aarch64_sqdmlal2_n<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:<VWIDE> 1 "register_operand" "w")
!    (match_operand:VQ_HSI 2 "register_operand" "w")
!    (match_operand:<VEL> 3 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 4302,4311 ----
  )
  
  (define_expand "aarch64_sqdmlal2_n<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:<VWIDE> 1 "register_operand")
!    (match_operand:VQ_HSI 2 "register_operand")
!    (match_operand:<VEL> 3 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 4198,4207 ****
  })
  
  (define_expand "aarch64_sqdmlsl2_n<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:<VWIDE> 1 "register_operand" "w")
!    (match_operand:VQ_HSI 2 "register_operand" "w")
!    (match_operand:<VEL> 3 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 4316,4325 ----
  })
  
  (define_expand "aarch64_sqdmlsl2_n<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:<VWIDE> 1 "register_operand")
!    (match_operand:VQ_HSI 2 "register_operand")
!    (match_operand:<VEL> 3 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 4353,4361 ****
  )
  
  (define_expand "aarch64_sqdmull2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:VQ_HSI 1 "register_operand" "w")
!    (match_operand:VQ_HSI 2 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 4471,4479 ----
  )
  
  (define_expand "aarch64_sqdmull2<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:VQ_HSI 1 "register_operand")
!    (match_operand:VQ_HSI 2 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 4413,4422 ****
  )
  
  (define_expand "aarch64_sqdmull2_lane<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:VQ_HSI 1 "register_operand" "w")
!    (match_operand:<VCOND> 2 "register_operand" "<vwx>")
!    (match_operand:SI 3 "immediate_operand" "i")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 4531,4540 ----
  )
  
  (define_expand "aarch64_sqdmull2_lane<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:VQ_HSI 1 "register_operand")
!    (match_operand:<VCOND> 2 "register_operand")
!    (match_operand:SI 3 "immediate_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 4427,4436 ****
  })
  
  (define_expand "aarch64_sqdmull2_laneq<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:VQ_HSI 1 "register_operand" "w")
!    (match_operand:<VCONQ> 2 "register_operand" "<vwx>")
!    (match_operand:SI 3 "immediate_operand" "i")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 4545,4554 ----
  })
  
  (define_expand "aarch64_sqdmull2_laneq<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:VQ_HSI 1 "register_operand")
!    (match_operand:<VCONQ> 2 "register_operand")
!    (match_operand:SI 3 "immediate_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 4461,4469 ****
  )
  
  (define_expand "aarch64_sqdmull2_n<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand" "=w")
!    (match_operand:VQ_HSI 1 "register_operand" "w")
!    (match_operand:<VEL> 2 "register_operand" "w")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
--- 4579,4587 ----
  )
  
  (define_expand "aarch64_sqdmull2_n<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (match_operand:VQ_HSI 1 "register_operand")
!    (match_operand:<VEL> 2 "register_operand")]
    "TARGET_SIMD"
  {
    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, <nunits>, true);
***************
*** 4865,4872 ****
  ;; sqrt
  
  (define_expand "sqrt<mode>2"
!   [(set (match_operand:VHSDF 0 "register_operand" "=w")
! 	(sqrt:VHSDF (match_operand:VHSDF 1 "register_operand" "w")))]
    "TARGET_SIMD"
  {
    if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
--- 4983,4990 ----
  ;; sqrt
  
  (define_expand "sqrt<mode>2"
!   [(set (match_operand:VHSDF 0 "register_operand")
! 	(sqrt:VHSDF (match_operand:VHSDF 1 "register_operand")))]
    "TARGET_SIMD"
  {
    if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
***************
*** 4919,4926 ****
  )
  
  (define_expand "vec_load_lanesoi<mode>"
!   [(set (match_operand:OI 0 "register_operand" "=w")
! 	(unspec:OI [(match_operand:OI 1 "aarch64_simd_struct_operand" "Utv")
  		    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
  		   UNSPEC_LD2))]
    "TARGET_SIMD"
--- 5037,5044 ----
  )
  
  (define_expand "vec_load_lanesoi<mode>"
!   [(set (match_operand:OI 0 "register_operand")
! 	(unspec:OI [(match_operand:OI 1 "aarch64_simd_struct_operand")
  		    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
  		   UNSPEC_LD2))]
    "TARGET_SIMD"
***************
*** 4963,4970 ****
  )
  
  (define_expand "vec_store_lanesoi<mode>"
!   [(set (match_operand:OI 0 "aarch64_simd_struct_operand" "=Utv")
! 	(unspec:OI [(match_operand:OI 1 "register_operand" "w")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_ST2))]
    "TARGET_SIMD"
--- 5081,5088 ----
  )
  
  (define_expand "vec_store_lanesoi<mode>"
!   [(set (match_operand:OI 0 "aarch64_simd_struct_operand")
! 	(unspec:OI [(match_operand:OI 1 "register_operand")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_ST2))]
    "TARGET_SIMD"
***************
*** 5017,5024 ****
  )
  
  (define_expand "vec_load_lanesci<mode>"
!   [(set (match_operand:CI 0 "register_operand" "=w")
! 	(unspec:CI [(match_operand:CI 1 "aarch64_simd_struct_operand" "Utv")
  		    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
  		   UNSPEC_LD3))]
    "TARGET_SIMD"
--- 5135,5142 ----
  )
  
  (define_expand "vec_load_lanesci<mode>"
!   [(set (match_operand:CI 0 "register_operand")
! 	(unspec:CI [(match_operand:CI 1 "aarch64_simd_struct_operand")
  		    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
  		   UNSPEC_LD3))]
    "TARGET_SIMD"
***************
*** 5061,5068 ****
  )
  
  (define_expand "vec_store_lanesci<mode>"
!   [(set (match_operand:CI 0 "aarch64_simd_struct_operand" "=Utv")
! 	(unspec:CI [(match_operand:CI 1 "register_operand" "w")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_ST3))]
    "TARGET_SIMD"
--- 5179,5186 ----
  )
  
  (define_expand "vec_store_lanesci<mode>"
!   [(set (match_operand:CI 0 "aarch64_simd_struct_operand")
! 	(unspec:CI [(match_operand:CI 1 "register_operand")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_ST3))]
    "TARGET_SIMD"
***************
*** 5115,5122 ****
  )
  
  (define_expand "vec_load_lanesxi<mode>"
!   [(set (match_operand:XI 0 "register_operand" "=w")
! 	(unspec:XI [(match_operand:XI 1 "aarch64_simd_struct_operand" "Utv")
  		    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
  		   UNSPEC_LD4))]
    "TARGET_SIMD"
--- 5233,5240 ----
  )
  
  (define_expand "vec_load_lanesxi<mode>"
!   [(set (match_operand:XI 0 "register_operand")
! 	(unspec:XI [(match_operand:XI 1 "aarch64_simd_struct_operand")
  		    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
  		   UNSPEC_LD4))]
    "TARGET_SIMD"
***************
*** 5159,5166 ****
  )
  
  (define_expand "vec_store_lanesxi<mode>"
!   [(set (match_operand:XI 0 "aarch64_simd_struct_operand" "=Utv")
! 	(unspec:XI [(match_operand:XI 1 "register_operand" "w")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_ST4))]
    "TARGET_SIMD"
--- 5277,5284 ----
  )
  
  (define_expand "vec_store_lanesxi<mode>"
!   [(set (match_operand:XI 0 "aarch64_simd_struct_operand")
! 	(unspec:XI [(match_operand:XI 1 "register_operand")
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_ST4))]
    "TARGET_SIMD"
***************
*** 5205,5212 ****
  ;; Reload patterns for AdvSIMD register list operands.
  
  (define_expand "mov<mode>"
!   [(set (match_operand:VSTRUCT 0 "nonimmediate_operand" "")
! 	(match_operand:VSTRUCT 1 "general_operand" ""))]
    "TARGET_SIMD"
  {
    if (can_create_pseudo_p ())
--- 5323,5330 ----
  ;; Reload patterns for AdvSIMD register list operands.
  
  (define_expand "mov<mode>"
!   [(set (match_operand:VSTRUCT 0 "nonimmediate_operand")
! 	(match_operand:VSTRUCT 1 "general_operand"))]
    "TARGET_SIMD"
  {
    if (can_create_pseudo_p ())
***************
*** 5218,5225 ****
  
  
  (define_expand "aarch64_ld1x3<VALLDIF:mode>"
!   [(match_operand:CI 0 "register_operand" "=w")
!    (match_operand:DI 1 "register_operand" "r")
     (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
--- 5336,5343 ----
  
  
  (define_expand "aarch64_ld1x3<VALLDIF:mode>"
!   [(match_operand:CI 0 "register_operand")
!    (match_operand:DI 1 "register_operand")
     (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
***************
*** 5238,5246 ****
    [(set_attr "type" "neon_load1_3reg<q>")]
  )
  
  (define_expand "aarch64_st1x2<VALLDIF:mode>"
!   [(match_operand:DI 0 "register_operand" "")
!    (match_operand:OI 1 "register_operand" "")
     (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
--- 5356,5386 ----
    [(set_attr "type" "neon_load1_3reg<q>")]
  )
  
+ (define_expand "aarch64_ld1x4<VALLDIF:mode>"
+   [(match_operand:XI 0 "register_operand" "=w")
+    (match_operand:DI 1 "register_operand" "r")
+    (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_SIMD"
+ {
+   rtx mem = gen_rtx_MEM (XImode, operands[1]);
+   emit_insn (gen_aarch64_ld1_x4_<VALLDIF:mode> (operands[0], mem));
+   DONE;
+ })
+ 
+ (define_insn "aarch64_ld1_x4_<mode>"
+   [(set (match_operand:XI 0 "register_operand" "=w")
+ 	(unspec:XI
+ 	  [(match_operand:XI 1 "aarch64_simd_struct_operand" "Utv")
+ 	   (unspec:VALLDIF [(const_int 4)] UNSPEC_VSTRUCTDUMMY)]
+ 	UNSPEC_LD1))]
+   "TARGET_SIMD"
+   "ld1\\t{%S0.<Vtype> - %V0.<Vtype>}, %1"
+   [(set_attr "type" "neon_load1_4reg<q>")]
+ )
+ 
  (define_expand "aarch64_st1x2<VALLDIF:mode>"
!   [(match_operand:DI 0 "register_operand")
!    (match_operand:OI 1 "register_operand")
     (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
***************
*** 5260,5267 ****
  )
  
  (define_expand "aarch64_st1x3<VALLDIF:mode>"
!   [(match_operand:DI 0 "register_operand" "")
!    (match_operand:CI 1 "register_operand" "")
     (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
--- 5400,5407 ----
  )
  
  (define_expand "aarch64_st1x3<VALLDIF:mode>"
!   [(match_operand:DI 0 "register_operand")
!    (match_operand:CI 1 "register_operand")
     (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
***************
*** 5280,5285 ****
--- 5420,5447 ----
    [(set_attr "type" "neon_store1_3reg<q>")]
  )
  
+ (define_expand "aarch64_st1x4<VALLDIF:mode>"
+   [(match_operand:DI 0 "register_operand" "")
+    (match_operand:XI 1 "register_operand" "")
+    (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_SIMD"
+ {
+   rtx mem = gen_rtx_MEM (XImode, operands[0]);
+   emit_insn (gen_aarch64_st1_x4_<VALLDIF:mode> (mem, operands[1]));
+   DONE;
+ })
+ 
+ (define_insn "aarch64_st1_x4_<mode>"
+   [(set (match_operand:XI 0 "aarch64_simd_struct_operand" "=Utv")
+ 	(unspec:XI
+ 	   [(match_operand:XI 1 "register_operand" "w")
+ 	   (unspec:VALLDIF [(const_int 4)] UNSPEC_VSTRUCTDUMMY)]
+ 	UNSPEC_ST1))]
+   "TARGET_SIMD"
+   "st1\\t{%S1.<Vtype> - %V1.<Vtype>}, %0"
+   [(set_attr "type" "neon_store1_4reg<q>")]
+ )
+ 
  (define_insn "*aarch64_mov<mode>"
    [(set (match_operand:VSTRUCT 0 "aarch64_simd_nonimmediate_operand" "=w,Utv,w")
  	(match_operand:VSTRUCT 1 "aarch64_simd_general_operand" " w,w,Utv"))]
***************
*** 5413,5420 ****
  })
  
  (define_expand "aarch64_ld<VSTRUCT:nregs>r<VALLDIF:mode>"
!   [(match_operand:VSTRUCT 0 "register_operand" "=w")
!    (match_operand:DI 1 "register_operand" "w")
     (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
--- 5575,5582 ----
  })
  
  (define_expand "aarch64_ld<VSTRUCT:nregs>r<VALLDIF:mode>"
!   [(match_operand:VSTRUCT 0 "register_operand")
!    (match_operand:DI 1 "register_operand")
     (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
***************
*** 5488,5495 ****
  )
  
  (define_expand "aarch64_ld<VSTRUCT:nregs><VDC:mode>"
!  [(match_operand:VSTRUCT 0 "register_operand" "=w")
!   (match_operand:DI 1 "register_operand" "r")
    (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
--- 5650,5657 ----
  )
  
  (define_expand "aarch64_ld<VSTRUCT:nregs><VDC:mode>"
!  [(match_operand:VSTRUCT 0 "register_operand")
!   (match_operand:DI 1 "register_operand")
    (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
***************
*** 5516,5523 ****
  })
  
  (define_expand "aarch64_ld<VSTRUCT:nregs><VQ:mode>"
!  [(match_operand:VSTRUCT 0 "register_operand" "=w")
!   (match_operand:DI 1 "register_operand" "r")
    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
--- 5678,5685 ----
  })
  
  (define_expand "aarch64_ld<VSTRUCT:nregs><VQ:mode>"
!  [(match_operand:VSTRUCT 0 "register_operand")
!   (match_operand:DI 1 "register_operand")
    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
***************
*** 5529,5536 ****
  })
  
  (define_expand "aarch64_ld1x2<VQ:mode>"
!  [(match_operand:OI 0 "register_operand" "=w")
!   (match_operand:DI 1 "register_operand" "r")
    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
--- 5691,5698 ----
  })
  
  (define_expand "aarch64_ld1x2<VQ:mode>"
!  [(match_operand:OI 0 "register_operand")
!   (match_operand:DI 1 "register_operand")
    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
***************
*** 5542,5549 ****
  })
  
  (define_expand "aarch64_ld1x2<VDC:mode>"
!  [(match_operand:OI 0 "register_operand" "=w")
!   (match_operand:DI 1 "register_operand" "r")
    (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
--- 5704,5711 ----
  })
  
  (define_expand "aarch64_ld1x2<VDC:mode>"
!  [(match_operand:OI 0 "register_operand")
!   (match_operand:DI 1 "register_operand")
    (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
***************
*** 5556,5565 ****
  
  
  (define_expand "aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>"
!   [(match_operand:VSTRUCT 0 "register_operand" "=w")
! 	(match_operand:DI 1 "register_operand" "w")
! 	(match_operand:VSTRUCT 2 "register_operand" "0")
! 	(match_operand:SI 3 "immediate_operand" "i")
  	(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
--- 5718,5727 ----
  
  
  (define_expand "aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>"
!   [(match_operand:VSTRUCT 0 "register_operand")
! 	(match_operand:DI 1 "register_operand")
! 	(match_operand:VSTRUCT 2 "register_operand")
! 	(match_operand:SI 3 "immediate_operand")
  	(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
***************
*** 5579,5587 ****
  ;; D-register list.
  
  (define_expand "aarch64_get_dreg<VSTRUCT:mode><VDC:mode>"
!  [(match_operand:VDC 0 "register_operand" "=w")
!   (match_operand:VSTRUCT 1 "register_operand" "w")
!   (match_operand:SI 2 "immediate_operand" "i")]
    "TARGET_SIMD"
  {
    int part = INTVAL (operands[2]);
--- 5741,5749 ----
  ;; D-register list.
  
  (define_expand "aarch64_get_dreg<VSTRUCT:mode><VDC:mode>"
!  [(match_operand:VDC 0 "register_operand")
!   (match_operand:VSTRUCT 1 "register_operand")
!   (match_operand:SI 2 "immediate_operand")]
    "TARGET_SIMD"
  {
    int part = INTVAL (operands[2]);
***************
*** 5596,5604 ****
  ;; Q-register list.
  
  (define_expand "aarch64_get_qreg<VSTRUCT:mode><VQ:mode>"
!  [(match_operand:VQ 0 "register_operand" "=w")
!   (match_operand:VSTRUCT 1 "register_operand" "w")
!   (match_operand:SI 2 "immediate_operand" "i")]
    "TARGET_SIMD"
  {
    int part = INTVAL (operands[2]);
--- 5758,5766 ----
  ;; Q-register list.
  
  (define_expand "aarch64_get_qreg<VSTRUCT:mode><VQ:mode>"
!  [(match_operand:VQ 0 "register_operand")
!   (match_operand:VSTRUCT 1 "register_operand")
!   (match_operand:SI 2 "immediate_operand")]
    "TARGET_SIMD"
  {
    int part = INTVAL (operands[2]);
***************
*** 5735,5747 ****
  ;; This instruction's pattern is generated directly by
  ;; aarch64_expand_vec_perm_const, so any changes to the pattern would
  ;; need corresponding changes there.
! (define_insn "aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>"
    [(set (match_operand:VALL_F16 0 "register_operand" "=w")
  	(unspec:VALL_F16 [(match_operand:VALL_F16 1 "register_operand" "w")
  			  (match_operand:VALL_F16 2 "register_operand" "w")]
  	 PERMUTE))]
    "TARGET_SIMD"
!   "<PERMUTE:perm_insn><PERMUTE:perm_hilo>\\t%0.<Vtype>, %1.<Vtype>, %2.<Vtype>"
    [(set_attr "type" "neon_permute<q>")]
  )
  
--- 5897,5909 ----
  ;; This instruction's pattern is generated directly by
  ;; aarch64_expand_vec_perm_const, so any changes to the pattern would
  ;; need corresponding changes there.
! (define_insn "aarch64_<PERMUTE:perm_insn><mode>"
    [(set (match_operand:VALL_F16 0 "register_operand" "=w")
  	(unspec:VALL_F16 [(match_operand:VALL_F16 1 "register_operand" "w")
  			  (match_operand:VALL_F16 2 "register_operand" "w")]
  	 PERMUTE))]
    "TARGET_SIMD"
!   "<PERMUTE:perm_insn>\\t%0.<Vtype>, %1.<Vtype>, %2.<Vtype>"
    [(set_attr "type" "neon_permute<q>")]
  )
  
***************
*** 5837,5844 ****
  )
  
  (define_expand "aarch64_st<VSTRUCT:nregs><VDC:mode>"
!  [(match_operand:DI 0 "register_operand" "r")
!   (match_operand:VSTRUCT 1 "register_operand" "w")
    (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
--- 5999,6006 ----
  )
  
  (define_expand "aarch64_st<VSTRUCT:nregs><VDC:mode>"
!  [(match_operand:DI 0 "register_operand")
!   (match_operand:VSTRUCT 1 "register_operand")
    (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
***************
*** 5850,5857 ****
  })
  
  (define_expand "aarch64_st<VSTRUCT:nregs><VQ:mode>"
!  [(match_operand:DI 0 "register_operand" "r")
!   (match_operand:VSTRUCT 1 "register_operand" "w")
    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
--- 6012,6019 ----
  })
  
  (define_expand "aarch64_st<VSTRUCT:nregs><VQ:mode>"
!  [(match_operand:DI 0 "register_operand")
!   (match_operand:VSTRUCT 1 "register_operand")
    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_SIMD"
  {
***************
*** 5863,5870 ****
  })
  
  (define_expand "aarch64_st<VSTRUCT:nregs>_lane<VALLDIF:mode>"
!  [(match_operand:DI 0 "register_operand" "r")
!   (match_operand:VSTRUCT 1 "register_operand" "w")
    (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
    (match_operand:SI 2 "immediate_operand")]
    "TARGET_SIMD"
--- 6025,6032 ----
  })
  
  (define_expand "aarch64_st<VSTRUCT:nregs>_lane<VALLDIF:mode>"
!  [(match_operand:DI 0 "register_operand")
!   (match_operand:VSTRUCT 1 "register_operand")
    (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
    (match_operand:SI 2 "immediate_operand")]
    "TARGET_SIMD"
***************
*** 5900,5909 ****
  ;; extend them in arm_neon.h and insert the resulting Q-regs.
  
  (define_expand "aarch64_set_qreg<VSTRUCT:mode><VQ:mode>"
!  [(match_operand:VSTRUCT 0 "register_operand" "+w")
!   (match_operand:VSTRUCT 1 "register_operand" "0")
!   (match_operand:VQ 2 "register_operand" "w")
!   (match_operand:SI 3 "immediate_operand" "i")]
    "TARGET_SIMD"
  {
    int part = INTVAL (operands[3]);
--- 6062,6071 ----
  ;; extend them in arm_neon.h and insert the resulting Q-regs.
  
  (define_expand "aarch64_set_qreg<VSTRUCT:mode><VQ:mode>"
!  [(match_operand:VSTRUCT 0 "register_operand")
!   (match_operand:VSTRUCT 1 "register_operand")
!   (match_operand:VQ 2 "register_operand")
!   (match_operand:SI 3 "immediate_operand")]
    "TARGET_SIMD"
  {
    int part = INTVAL (operands[3]);
***************
*** 5918,5924 ****
  ;; Standard pattern name vec_init<mode><Vel>.
  
  (define_expand "vec_init<mode><Vel>"
!   [(match_operand:VALL_F16 0 "register_operand" "")
     (match_operand 1 "" "")]
    "TARGET_SIMD"
  {
--- 6080,6095 ----
  ;; Standard pattern name vec_init<mode><Vel>.
  
  (define_expand "vec_init<mode><Vel>"
!   [(match_operand:VALL_F16 0 "register_operand")
!    (match_operand 1 "" "")]
!   "TARGET_SIMD"
! {
!   aarch64_expand_vector_init (operands[0], operands[1]);
!   DONE;
! })
! 
! (define_expand "vec_init<mode><Vhalf>"
!   [(match_operand:VQ_NO2E 0 "register_operand")
     (match_operand 1 "" "")]
    "TARGET_SIMD"
  {
***************
*** 5997,6005 ****
  ;; Standard pattern name vec_extract<mode><Vel>.
  
  (define_expand "vec_extract<mode><Vel>"
!   [(match_operand:<VEL> 0 "aarch64_simd_nonimmediate_operand" "")
!    (match_operand:VALL_F16 1 "register_operand" "")
!    (match_operand:SI 2 "immediate_operand" "")]
    "TARGET_SIMD"
  {
      emit_insn
--- 6168,6176 ----
  ;; Standard pattern name vec_extract<mode><Vel>.
  
  (define_expand "vec_extract<mode><Vel>"
!   [(match_operand:<VEL> 0 "aarch64_simd_nonimmediate_operand")
!    (match_operand:VALL_F16 1 "register_operand")
!    (match_operand:SI 2 "immediate_operand")]
    "TARGET_SIMD"
  {
      emit_insn
***************
*** 6007,6066 ****
      DONE;
  })
  
  ;; aes
  
  (define_insn "aarch64_crypto_aes<aes_op>v16qi"
    [(set (match_operand:V16QI 0 "register_operand" "=w")
! 	(unspec:V16QI [(match_operand:V16QI 1 "register_operand" "%0")
! 		       (match_operand:V16QI 2 "register_operand" "w")]
           CRYPTO_AES))]
    "TARGET_SIMD && TARGET_AES"
    "aes<aes_op>\\t%0.16b, %2.16b"
    [(set_attr "type" "crypto_aese")]
  )
  
- (define_insn "*aarch64_crypto_aes<aes_op>v16qi_xor_combine"
-   [(set (match_operand:V16QI 0 "register_operand" "=w")
- 	(unspec:V16QI [(xor:V16QI
- 			(match_operand:V16QI 1 "register_operand" "%0")
- 			(match_operand:V16QI 2 "register_operand" "w"))
- 		       (match_operand:V16QI 3 "aarch64_simd_imm_zero" "")]
- 		       CRYPTO_AES))]
-   "TARGET_SIMD && TARGET_AES"
-   "aes<aes_op>\\t%0.16b, %2.16b"
-   [(set_attr "type" "crypto_aese")]
- )
- 
- (define_insn "*aarch64_crypto_aes<aes_op>v16qi_xor_combine"
-   [(set (match_operand:V16QI 0 "register_operand" "=w")
- 	(unspec:V16QI [(match_operand:V16QI 3 "aarch64_simd_imm_zero" "")
- 	(xor:V16QI (match_operand:V16QI 1 "register_operand" "%0")
- 		   (match_operand:V16QI 2 "register_operand" "w"))]
- 	CRYPTO_AES))]
-   "TARGET_SIMD && TARGET_AES"
-   "aes<aes_op>\\t%0.16b, %2.16b"
-   [(set_attr "type" "crypto_aese")]
- )
- 
- ;; When AES/AESMC fusion is enabled we want the register allocation to
- ;; look like:
- ;;    AESE Vn, _
- ;;    AESMC Vn, Vn
- ;; So prefer to tie operand 1 to operand 0 when fusing.
- 
  (define_insn "aarch64_crypto_aes<aesmc_op>v16qi"
!   [(set (match_operand:V16QI 0 "register_operand" "=w,w")
! 	(unspec:V16QI [(match_operand:V16QI 1 "register_operand" "0,w")]
  	 CRYPTO_AESMC))]
    "TARGET_SIMD && TARGET_AES"
    "aes<aesmc_op>\\t%0.16b, %1.16b"
!   [(set_attr "type" "crypto_aesmc")
!    (set_attr_alternative "enabled"
!      [(if_then_else (match_test
! 		       "aarch64_fusion_enabled_p (AARCH64_FUSE_AES_AESMC)")
! 		     (const_string "yes" )
! 		     (const_string "no"))
!       (const_string "yes")])]
  )
  
  ;; When AESE/AESMC fusion is enabled we really want to keep the two together
--- 6178,6233 ----
      DONE;
  })
  
+ ;; Extract a 64-bit vector from one half of a 128-bit vector.
+ (define_expand "vec_extract<mode><Vhalf>"
+   [(match_operand:<VHALF> 0 "register_operand")
+    (match_operand:VQMOV_NO2E 1 "register_operand")
+    (match_operand 2 "immediate_operand")]
+   "TARGET_SIMD"
+ {
+   int start = INTVAL (operands[2]);
+   if (start != 0 && start != <nunits> / 2)
+     FAIL;
+   rtx sel = aarch64_gen_stepped_int_parallel (<nunits> / 2, start, 1);
+   emit_insn (gen_aarch64_get_half<mode> (operands[0], operands[1], sel));
+   DONE;
+ })
+ 
+ ;; Extract a single-element 64-bit vector from one half of a 128-bit vector.
+ (define_expand "vec_extractv2dfv1df"
+   [(match_operand:V1DF 0 "register_operand")
+    (match_operand:V2DF 1 "register_operand")
+    (match_operand 2 "immediate_operand")]
+   "TARGET_SIMD"
+ {
+   /* V1DF is rarely used by other patterns, so it should be better to hide
+      it in a subreg destination of a normal DF op.  */
+   rtx scalar0 = gen_lowpart (DFmode, operands[0]);
+   emit_insn (gen_vec_extractv2dfdf (scalar0, operands[1], operands[2]));
+   DONE;
+ })
+ 
  ;; aes
  
  (define_insn "aarch64_crypto_aes<aes_op>v16qi"
    [(set (match_operand:V16QI 0 "register_operand" "=w")
! 	(unspec:V16QI
! 		[(xor:V16QI
! 		 (match_operand:V16QI 1 "register_operand" "%0")
! 		 (match_operand:V16QI 2 "register_operand" "w"))]
           CRYPTO_AES))]
    "TARGET_SIMD && TARGET_AES"
    "aes<aes_op>\\t%0.16b, %2.16b"
    [(set_attr "type" "crypto_aese")]
  )
  
  (define_insn "aarch64_crypto_aes<aesmc_op>v16qi"
!   [(set (match_operand:V16QI 0 "register_operand" "=w")
! 	(unspec:V16QI [(match_operand:V16QI 1 "register_operand" "w")]
  	 CRYPTO_AESMC))]
    "TARGET_SIMD && TARGET_AES"
    "aes<aesmc_op>\\t%0.16b, %1.16b"
!   [(set_attr "type" "crypto_aesmc")]
  )
  
  ;; When AESE/AESMC fusion is enabled we really want to keep the two together
***************
*** 6069,6080 ****
  ;;  Mash the two together during combine.
  
  (define_insn "*aarch64_crypto_aese_fused"
!   [(set (match_operand:V16QI 0 "register_operand" "=&w")
  	(unspec:V16QI
  	  [(unspec:V16QI
! 	    [(match_operand:V16QI 1 "register_operand" "0")
! 	     (match_operand:V16QI 2 "register_operand" "w")] UNSPEC_AESE)
! 	  ] UNSPEC_AESMC))]
    "TARGET_SIMD && TARGET_AES
     && aarch64_fusion_enabled_p (AARCH64_FUSE_AES_AESMC)"
    "aese\\t%0.16b, %2.16b\;aesmc\\t%0.16b, %0.16b"
--- 6236,6249 ----
  ;;  Mash the two together during combine.
  
  (define_insn "*aarch64_crypto_aese_fused"
!   [(set (match_operand:V16QI 0 "register_operand" "=w")
  	(unspec:V16QI
  	  [(unspec:V16QI
! 	   [(xor:V16QI
! 		(match_operand:V16QI 1 "register_operand" "%0")
! 		(match_operand:V16QI 2 "register_operand" "w"))]
! 	     UNSPEC_AESE)]
! 	UNSPEC_AESMC))]
    "TARGET_SIMD && TARGET_AES
     && aarch64_fusion_enabled_p (AARCH64_FUSE_AES_AESMC)"
    "aese\\t%0.16b, %2.16b\;aesmc\\t%0.16b, %0.16b"
***************
*** 6088,6099 ****
  ;;  Mash the two together during combine.
  
  (define_insn "*aarch64_crypto_aesd_fused"
!   [(set (match_operand:V16QI 0 "register_operand" "=&w")
  	(unspec:V16QI
  	  [(unspec:V16QI
! 	    [(match_operand:V16QI 1 "register_operand" "0")
! 	     (match_operand:V16QI 2 "register_operand" "w")] UNSPEC_AESD)
! 	  ] UNSPEC_AESIMC))]
    "TARGET_SIMD && TARGET_AES
     && aarch64_fusion_enabled_p (AARCH64_FUSE_AES_AESMC)"
    "aesd\\t%0.16b, %2.16b\;aesimc\\t%0.16b, %0.16b"
--- 6257,6270 ----
  ;;  Mash the two together during combine.
  
  (define_insn "*aarch64_crypto_aesd_fused"
!   [(set (match_operand:V16QI 0 "register_operand" "=w")
  	(unspec:V16QI
  	  [(unspec:V16QI
! 		    [(xor:V16QI
! 			(match_operand:V16QI 1 "register_operand" "%0")
! 			(match_operand:V16QI 2 "register_operand" "w"))]
! 		UNSPEC_AESD)]
! 	  UNSPEC_AESIMC))]
    "TARGET_SIMD && TARGET_AES
     && aarch64_fusion_enabled_p (AARCH64_FUSE_AES_AESMC)"
    "aesd\\t%0.16b, %2.16b\;aesimc\\t%0.16b, %0.16b"
***************
*** 6345,6355 ****
  ;; fp16fml
  
  (define_expand "aarch64_fml<f16mac1>l<f16quad>_low<mode>"
!   [(set (match_operand:VDQSF 0 "register_operand" "=w")
  	(unspec:VDQSF
! 	 [(match_operand:VDQSF 1 "register_operand" "0")
! 	  (match_operand:<VFMLA_W> 2 "register_operand" "w")
! 	  (match_operand:<VFMLA_W> 3 "register_operand" "w")]
  	 VFMLA16_LOW))]
    "TARGET_F16FML"
  {
--- 6516,6526 ----
  ;; fp16fml
  
  (define_expand "aarch64_fml<f16mac1>l<f16quad>_low<mode>"
!   [(set (match_operand:VDQSF 0 "register_operand")
  	(unspec:VDQSF
! 	 [(match_operand:VDQSF 1 "register_operand")
! 	  (match_operand:<VFMLA_W> 2 "register_operand")
! 	  (match_operand:<VFMLA_W> 3 "register_operand")]
  	 VFMLA16_LOW))]
    "TARGET_F16FML"
  {
***************
*** 6368,6378 ****
  })
  
  (define_expand "aarch64_fml<f16mac1>l<f16quad>_high<mode>"
!   [(set (match_operand:VDQSF 0 "register_operand" "=w")
  	(unspec:VDQSF
! 	 [(match_operand:VDQSF 1 "register_operand" "0")
! 	  (match_operand:<VFMLA_W> 2 "register_operand" "w")
! 	  (match_operand:<VFMLA_W> 3 "register_operand" "w")]
  	 VFMLA16_HIGH))]
    "TARGET_F16FML"
  {
--- 6539,6549 ----
  })
  
  (define_expand "aarch64_fml<f16mac1>l<f16quad>_high<mode>"
!   [(set (match_operand:VDQSF 0 "register_operand")
  	(unspec:VDQSF
! 	 [(match_operand:VDQSF 1 "register_operand")
! 	  (match_operand:<VFMLA_W> 2 "register_operand")
! 	  (match_operand:<VFMLA_W> 3 "register_operand")]
  	 VFMLA16_HIGH))]
    "TARGET_F16FML"
  {
***************
*** 6458,6468 ****
  )
  
  (define_expand "aarch64_fml<f16mac1>l_lane_lowv2sf"
!   [(set (match_operand:V2SF 0 "register_operand" "")
! 	(unspec:V2SF [(match_operand:V2SF 1 "register_operand" "")
! 			   (match_operand:V4HF 2 "register_operand" "")
! 			   (match_operand:V4HF 3 "register_operand" "")
! 			   (match_operand:SI 4 "aarch64_imm2" "")]
  	 VFMLA16_LOW))]
    "TARGET_F16FML"
  {
--- 6629,6639 ----
  )
  
  (define_expand "aarch64_fml<f16mac1>l_lane_lowv2sf"
!   [(set (match_operand:V2SF 0 "register_operand")
! 	(unspec:V2SF [(match_operand:V2SF 1 "register_operand")
! 			   (match_operand:V4HF 2 "register_operand")
! 			   (match_operand:V4HF 3 "register_operand")
! 			   (match_operand:SI 4 "aarch64_imm2")]
  	 VFMLA16_LOW))]
    "TARGET_F16FML"
  {
***************
*** 6479,6489 ****
  )
  
  (define_expand "aarch64_fml<f16mac1>l_lane_highv2sf"
!   [(set (match_operand:V2SF 0 "register_operand" "")
! 	(unspec:V2SF [(match_operand:V2SF 1 "register_operand" "")
! 			   (match_operand:V4HF 2 "register_operand" "")
! 			   (match_operand:V4HF 3 "register_operand" "")
! 			   (match_operand:SI 4 "aarch64_imm2" "")]
  	 VFMLA16_HIGH))]
    "TARGET_F16FML"
  {
--- 6650,6660 ----
  )
  
  (define_expand "aarch64_fml<f16mac1>l_lane_highv2sf"
!   [(set (match_operand:V2SF 0 "register_operand")
! 	(unspec:V2SF [(match_operand:V2SF 1 "register_operand")
! 			   (match_operand:V4HF 2 "register_operand")
! 			   (match_operand:V4HF 3 "register_operand")
! 			   (match_operand:SI 4 "aarch64_imm2")]
  	 VFMLA16_HIGH))]
    "TARGET_F16FML"
  {
***************
*** 6573,6583 ****
  )
  
  (define_expand "aarch64_fml<f16mac1>lq_laneq_lowv4sf"
!   [(set (match_operand:V4SF 0 "register_operand" "")
! 	(unspec:V4SF [(match_operand:V4SF 1 "register_operand" "")
! 			   (match_operand:V8HF 2 "register_operand" "")
! 			   (match_operand:V8HF 3 "register_operand" "")
! 			   (match_operand:SI 4 "aarch64_lane_imm3" "")]
  	 VFMLA16_LOW))]
    "TARGET_F16FML"
  {
--- 6744,6754 ----
  )
  
  (define_expand "aarch64_fml<f16mac1>lq_laneq_lowv4sf"
!   [(set (match_operand:V4SF 0 "register_operand")
! 	(unspec:V4SF [(match_operand:V4SF 1 "register_operand")
! 			   (match_operand:V8HF 2 "register_operand")
! 			   (match_operand:V8HF 3 "register_operand")
! 			   (match_operand:SI 4 "aarch64_lane_imm3")]
  	 VFMLA16_LOW))]
    "TARGET_F16FML"
  {
***************
*** 6593,6603 ****
  })
  
  (define_expand "aarch64_fml<f16mac1>lq_laneq_highv4sf"
!   [(set (match_operand:V4SF 0 "register_operand" "")
! 	(unspec:V4SF [(match_operand:V4SF 1 "register_operand" "")
! 			   (match_operand:V8HF 2 "register_operand" "")
! 			   (match_operand:V8HF 3 "register_operand" "")
! 			   (match_operand:SI 4 "aarch64_lane_imm3" "")]
  	 VFMLA16_HIGH))]
    "TARGET_F16FML"
  {
--- 6764,6774 ----
  })
  
  (define_expand "aarch64_fml<f16mac1>lq_laneq_highv4sf"
!   [(set (match_operand:V4SF 0 "register_operand")
! 	(unspec:V4SF [(match_operand:V4SF 1 "register_operand")
! 			   (match_operand:V8HF 2 "register_operand")
! 			   (match_operand:V8HF 3 "register_operand")
! 			   (match_operand:SI 4 "aarch64_lane_imm3")]
  	 VFMLA16_HIGH))]
    "TARGET_F16FML"
  {
***************
*** 6687,6697 ****
  )
  
  (define_expand "aarch64_fml<f16mac1>l_laneq_lowv2sf"
!   [(set (match_operand:V2SF 0 "register_operand" "")
! 	(unspec:V2SF [(match_operand:V2SF 1 "register_operand" "")
! 		      (match_operand:V4HF 2 "register_operand" "")
! 		      (match_operand:V8HF 3 "register_operand" "")
! 		      (match_operand:SI 4 "aarch64_lane_imm3" "")]
  	 VFMLA16_LOW))]
    "TARGET_F16FML"
  {
--- 6858,6868 ----
  )
  
  (define_expand "aarch64_fml<f16mac1>l_laneq_lowv2sf"
!   [(set (match_operand:V2SF 0 "register_operand")
! 	(unspec:V2SF [(match_operand:V2SF 1 "register_operand")
! 		      (match_operand:V4HF 2 "register_operand")
! 		      (match_operand:V8HF 3 "register_operand")
! 		      (match_operand:SI 4 "aarch64_lane_imm3")]
  	 VFMLA16_LOW))]
    "TARGET_F16FML"
  {
***************
*** 6708,6718 ****
  })
  
  (define_expand "aarch64_fml<f16mac1>l_laneq_highv2sf"
!   [(set (match_operand:V2SF 0 "register_operand" "")
! 	(unspec:V2SF [(match_operand:V2SF 1 "register_operand" "")
! 		      (match_operand:V4HF 2 "register_operand" "")
! 		      (match_operand:V8HF 3 "register_operand" "")
! 		      (match_operand:SI 4 "aarch64_lane_imm3" "")]
  	 VFMLA16_HIGH))]
    "TARGET_F16FML"
  {
--- 6879,6889 ----
  })
  
  (define_expand "aarch64_fml<f16mac1>l_laneq_highv2sf"
!   [(set (match_operand:V2SF 0 "register_operand")
! 	(unspec:V2SF [(match_operand:V2SF 1 "register_operand")
! 		      (match_operand:V4HF 2 "register_operand")
! 		      (match_operand:V8HF 3 "register_operand")
! 		      (match_operand:SI 4 "aarch64_lane_imm3")]
  	 VFMLA16_HIGH))]
    "TARGET_F16FML"
  {
***************
*** 6803,6813 ****
  )
  
  (define_expand "aarch64_fml<f16mac1>lq_lane_lowv4sf"
!   [(set (match_operand:V4SF 0 "register_operand" "")
! 	(unspec:V4SF [(match_operand:V4SF 1 "register_operand" "")
! 		      (match_operand:V8HF 2 "register_operand" "")
! 		      (match_operand:V4HF 3 "register_operand" "")
! 		      (match_operand:SI 4 "aarch64_imm2" "")]
  	 VFMLA16_LOW))]
    "TARGET_F16FML"
  {
--- 6974,6984 ----
  )
  
  (define_expand "aarch64_fml<f16mac1>lq_lane_lowv4sf"
!   [(set (match_operand:V4SF 0 "register_operand")
! 	(unspec:V4SF [(match_operand:V4SF 1 "register_operand")
! 		      (match_operand:V8HF 2 "register_operand")
! 		      (match_operand:V4HF 3 "register_operand")
! 		      (match_operand:SI 4 "aarch64_imm2")]
  	 VFMLA16_LOW))]
    "TARGET_F16FML"
  {
***************
*** 6823,6833 ****
  })
  
  (define_expand "aarch64_fml<f16mac1>lq_lane_highv4sf"
!   [(set (match_operand:V4SF 0 "register_operand" "")
! 	(unspec:V4SF [(match_operand:V4SF 1 "register_operand" "")
! 		      (match_operand:V8HF 2 "register_operand" "")
! 		      (match_operand:V4HF 3 "register_operand" "")
! 		      (match_operand:SI 4 "aarch64_imm2" "")]
  	 VFMLA16_HIGH))]
    "TARGET_F16FML"
  {
--- 6994,7004 ----
  })
  
  (define_expand "aarch64_fml<f16mac1>lq_lane_highv4sf"
!   [(set (match_operand:V4SF 0 "register_operand")
! 	(unspec:V4SF [(match_operand:V4SF 1 "register_operand")
! 		      (match_operand:V8HF 2 "register_operand")
! 		      (match_operand:V4HF 3 "register_operand")
! 		      (match_operand:SI 4 "aarch64_imm2")]
  	 VFMLA16_HIGH))]
    "TARGET_F16FML"
  {
***************
*** 6937,6939 ****
--- 7108,7240 ----
    "pmull2\\t%0.1q, %1.2d, %2.2d"
    [(set_attr "type" "crypto_pmull")]
  )
+ 
+ ;; Sign- or zero-extend a 64-bit integer vector to a 128-bit vector.
+ (define_insn "<optab><Vnarrowq><mode>2"
+   [(set (match_operand:VQN 0 "register_operand" "=w")
+ 	(ANY_EXTEND:VQN (match_operand:<VNARROWQ> 1 "register_operand" "w")))]
+   "TARGET_SIMD"
+   "<su>xtl\t%0.<Vtype>, %1.<Vntype>"
+   [(set_attr "type" "neon_shift_imm_long")]
+ )
+ 
+ ;; Truncate a 128-bit integer vector to a 64-bit vector.
+ (define_insn "trunc<mode><Vnarrowq>2"
+   [(set (match_operand:<VNARROWQ> 0 "register_operand" "=w")
+ 	(truncate:<VNARROWQ> (match_operand:VQN 1 "register_operand" "w")))]
+   "TARGET_SIMD"
+   "xtn\t%0.<Vntype>, %1.<Vtype>"
+   [(set_attr "type" "neon_shift_imm_narrow_q")]
+ )
+ 
+ (define_insn "aarch64_bfdot<mode>"
+   [(set (match_operand:VDQSF 0 "register_operand" "=w")
+ 	(plus:VDQSF
+ 	  (unspec:VDQSF
+ 	   [(match_operand:<VBFMLA_W> 2 "register_operand" "w")
+ 	    (match_operand:<VBFMLA_W> 3 "register_operand" "w")]
+ 	    UNSPEC_BFDOT)
+ 	  (match_operand:VDQSF 1 "register_operand" "0")))]
+   "TARGET_BF16_SIMD"
+   "bfdot\t%0.<Vtype>, %2.<Vbfdottype>, %3.<Vbfdottype>"
+   [(set_attr "type" "neon_dot<q>")]
+ )
+ 
+ (define_insn "aarch64_bfdot_lane<VBF:isquadop><VDQSF:mode>"
+   [(set (match_operand:VDQSF 0 "register_operand" "=w")
+ 	(plus:VDQSF
+ 	  (unspec:VDQSF
+ 	   [(match_operand:<VDQSF:VBFMLA_W> 2 "register_operand" "w")
+ 	    (match_operand:VBF 3 "register_operand" "w")
+ 	    (match_operand:SI 4 "const_int_operand" "n")]
+ 	    UNSPEC_BFDOT)
+ 	  (match_operand:VDQSF 1 "register_operand" "0")))]
+   "TARGET_BF16_SIMD"
+ {
+   int nunits = GET_MODE_NUNITS (<VBF:MODE>mode).to_constant ();
+   int lane = INTVAL (operands[4]);
+   operands[4] = gen_int_mode (ENDIAN_LANE_N (nunits / 2, lane), SImode);
+   return "bfdot\t%0.<VDQSF:Vtype>, %2.<VDQSF:Vbfdottype>, %3.2h[%4]";
+ }
+   [(set_attr "type" "neon_dot<VDQSF:q>")]
+ )
+ 
+ ;; bfmmla
+ (define_insn "aarch64_bfmmlaqv4sf"
+   [(set (match_operand:V4SF 0 "register_operand" "=w")
+         (plus:V4SF (match_operand:V4SF 1 "register_operand" "0")
+                    (unspec:V4SF [(match_operand:V8BF 2 "register_operand" "w")
+                                  (match_operand:V8BF 3 "register_operand" "w")]
+                     UNSPEC_BFMMLA)))]
+   "TARGET_BF16_SIMD"
+   "bfmmla\\t%0.4s, %2.8h, %3.8h"
+   [(set_attr "type" "neon_fp_mla_s_q")]
+ )
+ 
+ ;; bfmlal<bt>
+ (define_insn "aarch64_bfmlal<bt>v4sf"
+   [(set (match_operand:V4SF 0 "register_operand" "=w")
+         (plus: V4SF (match_operand:V4SF 1 "register_operand" "0")
+                     (unspec:V4SF [(match_operand:V8BF 2 "register_operand" "w")
+                                   (match_operand:V8BF 3 "register_operand" "w")]
+                      BF_MLA)))]
+   "TARGET_BF16_SIMD"
+   "bfmlal<bt>\\t%0.4s, %2.8h, %3.8h"
+   [(set_attr "type" "neon_fp_mla_s_q")]
+ )
+ 
+ (define_insn "aarch64_bfmlal<bt>_lane<q>v4sf"
+   [(set (match_operand:V4SF 0 "register_operand" "=w")
+         (plus: V4SF (match_operand:V4SF 1 "register_operand" "0")
+                     (unspec:V4SF [(match_operand:V8BF 2 "register_operand" "w")
+                                   (match_operand:VBF 3 "register_operand" "w")
+                                   (match_operand:SI 4 "const_int_operand" "n")]
+                      BF_MLA)))]
+   "TARGET_BF16_SIMD"
+ {
+   operands[4] = aarch64_endian_lane_rtx (<MODE>mode, INTVAL (operands[4]));
+   return "bfmlal<bt>\\t%0.4s, %2.8h, %3.h[%4]";
+ }
+   [(set_attr "type" "neon_fp_mla_s_scalar_q")]
+ )
+ 
+ ;; 8-bit integer matrix multiply-accumulate
+ (define_insn "aarch64_simd_<sur>mmlav16qi"
+   [(set (match_operand:V4SI 0 "register_operand" "=w")
+ 	(plus:V4SI
+ 	 (unspec:V4SI [(match_operand:V16QI 2 "register_operand" "w")
+ 		       (match_operand:V16QI 3 "register_operand" "w")] MATMUL)
+ 	 (match_operand:V4SI 1 "register_operand" "0")))]
+   "TARGET_I8MM"
+   "<sur>mmla\\t%0.4s, %2.16b, %3.16b"
+   [(set_attr "type" "neon_mla_s_q")]
+ )
+ 
+ ;; bfcvtn
+ (define_insn "aarch64_bfcvtn<q><mode>"
+   [(set (match_operand:V4SF_TO_BF 0 "register_operand" "=w")
+         (unspec:V4SF_TO_BF [(match_operand:V4SF 1 "register_operand" "w")]
+                             UNSPEC_BFCVTN))]
+   "TARGET_BF16_SIMD"
+   "bfcvtn\\t%0.4h, %1.4s"
+   [(set_attr "type" "neon_fp_cvt_narrow_s_q")]
+ )
+ 
+ (define_insn "aarch64_bfcvtn2v8bf"
+   [(set (match_operand:V8BF 0 "register_operand" "=w")
+         (unspec:V8BF [(match_operand:V8BF 1 "register_operand" "0")
+                       (match_operand:V4SF 2 "register_operand" "w")]
+                       UNSPEC_BFCVTN2))]
+   "TARGET_BF16_SIMD"
+   "bfcvtn2\\t%0.8h, %2.4s"
+   [(set_attr "type" "neon_fp_cvt_narrow_s_q")]
+ )
+ 
+ (define_insn "aarch64_bfcvtbf"
+   [(set (match_operand:BF 0 "register_operand" "=w")
+         (unspec:BF [(match_operand:SF 1 "register_operand" "w")]
+                     UNSPEC_BFCVT))]
+   "TARGET_BF16_FP"
+   "bfcvt\\t%h0, %s1"
+   [(set_attr "type" "f_cvt")]
+ )
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-speculation.cc gcc-10.1.0/gcc/config/aarch64/aarch64-speculation.cc
*** gcc-9.3.0/gcc/config/aarch64/aarch64-speculation.cc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-speculation.cc	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Speculation tracking and mitigation (e.g. CVE 2017-5753) for AArch64.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Speculation tracking and mitigation (e.g. CVE 2017-5753) for AArch64.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
*************** aarch64_do_track_speculation ()
*** 215,234 ****
  			  && REG_P (XEXP (cond, 0))
  			  && REGNO (XEXP (cond, 0)) == CC_REGNUM
  			  && XEXP (cond, 1) == const0_rtx);
! 	      enum rtx_code inv_cond_code
! 		= reversed_comparison_code (cond, insn);
! 	      /* We should be able to reverse all conditions.  */
! 	      gcc_assert (inv_cond_code != UNKNOWN);
! 	      rtx inv_cond = gen_rtx_fmt_ee (inv_cond_code, GET_MODE (cond),
! 					     copy_rtx (XEXP (cond, 0)),
! 					     copy_rtx (XEXP (cond, 1)));
  	      if (inverted)
! 		std::swap (cond, inv_cond);
  
! 	      insert_insn_on_edge (gen_speculation_tracker (cond),
! 				   BRANCH_EDGE (bb));
! 	      insert_insn_on_edge (gen_speculation_tracker (inv_cond),
! 				   FALLTHRU_EDGE (bb));
  	      needs_tracking = true;
  	    }
  	  else if (GET_CODE (PATTERN (insn)) == RETURN)
--- 215,227 ----
  			  && REG_P (XEXP (cond, 0))
  			  && REGNO (XEXP (cond, 0)) == CC_REGNUM
  			  && XEXP (cond, 1) == const0_rtx);
! 	      rtx branch_tracker = gen_speculation_tracker (copy_rtx (cond));
! 	      rtx fallthru_tracker = gen_speculation_tracker_rev (cond);
  	      if (inverted)
! 		std::swap (branch_tracker, fallthru_tracker);
  
! 	      insert_insn_on_edge (branch_tracker, BRANCH_EDGE (bb));
! 	      insert_insn_on_edge (fallthru_tracker, FALLTHRU_EDGE (bb));
  	      needs_tracking = true;
  	    }
  	  else if (GET_CODE (PATTERN (insn)) == RETURN)
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-base.cc gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-base.cc
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-base.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-base.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,2820 ----
+ /* ACLE support for AArch64 SVE (__ARM_FEATURE_SVE intrinsics)
+    Copyright (C) 2018-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tm.h"
+ #include "tree.h"
+ #include "rtl.h"
+ #include "tm_p.h"
+ #include "memmodel.h"
+ #include "insn-codes.h"
+ #include "optabs.h"
+ #include "recog.h"
+ #include "expr.h"
+ #include "basic-block.h"
+ #include "function.h"
+ #include "fold-const.h"
+ #include "gimple.h"
+ #include "gimple-iterator.h"
+ #include "gimplify.h"
+ #include "explow.h"
+ #include "emit-rtl.h"
+ #include "tree-vector-builder.h"
+ #include "rtx-vector-builder.h"
+ #include "vec-perm-indices.h"
+ #include "aarch64-sve-builtins.h"
+ #include "aarch64-sve-builtins-shapes.h"
+ #include "aarch64-sve-builtins-base.h"
+ #include "aarch64-sve-builtins-functions.h"
+ 
+ using namespace aarch64_sve;
+ 
+ namespace {
+ 
+ /* Return the UNSPEC_CMLA* unspec for rotation amount ROT.  */
+ static int
+ unspec_cmla (int rot)
+ {
+   switch (rot)
+     {
+     case 0: return UNSPEC_CMLA;
+     case 90: return UNSPEC_CMLA90;
+     case 180: return UNSPEC_CMLA180;
+     case 270: return UNSPEC_CMLA270;
+     default: gcc_unreachable ();
+     }
+ }
+ 
+ /* Return the UNSPEC_FCMLA* unspec for rotation amount ROT.  */
+ static int
+ unspec_fcmla (int rot)
+ {
+   switch (rot)
+     {
+     case 0: return UNSPEC_FCMLA;
+     case 90: return UNSPEC_FCMLA90;
+     case 180: return UNSPEC_FCMLA180;
+     case 270: return UNSPEC_FCMLA270;
+     default: gcc_unreachable ();
+     }
+ }
+ 
+ /* Return the UNSPEC_COND_FCMLA* unspec for rotation amount ROT.  */
+ static int
+ unspec_cond_fcmla (int rot)
+ {
+   switch (rot)
+     {
+     case 0: return UNSPEC_COND_FCMLA;
+     case 90: return UNSPEC_COND_FCMLA90;
+     case 180: return UNSPEC_COND_FCMLA180;
+     case 270: return UNSPEC_COND_FCMLA270;
+     default: gcc_unreachable ();
+     }
+ }
+ 
+ /* Expand a call to svmad, or svmla after reordering its operands.
+    Make _m forms merge with argument MERGE_ARGNO.  */
+ static rtx
+ expand_mad (function_expander &e,
+ 	    unsigned int merge_argno = DEFAULT_MERGE_ARGNO)
+ {
+   if (e.pred == PRED_x)
+     {
+       insn_code icode;
+       if (e.type_suffix (0).integer_p)
+ 	icode = code_for_aarch64_pred_fma (e.vector_mode (0));
+       else
+ 	icode = code_for_aarch64_pred (UNSPEC_COND_FMLA, e.vector_mode (0));
+       return e.use_pred_x_insn (icode);
+     }
+ 
+   insn_code icode = e.direct_optab_handler (cond_fma_optab);
+   return e.use_cond_insn (icode, merge_argno);
+ }
+ 
+ /* Expand a call to svmla_lane or svmls_lane using floating-point unspec
+    UNSPEC.  */
+ static rtx
+ expand_mla_mls_lane (function_expander &e, int unspec)
+ {
+   /* Put the operands in the normal (fma ...) order, with the accumulator
+      last.  This fits naturally since that's also the unprinted operand
+      in the asm output.  */
+   e.rotate_inputs_left (0, 4);
+   insn_code icode = code_for_aarch64_lane (unspec, e.vector_mode (0));
+   return e.use_exact_insn (icode);
+ }
+ 
+ /* Expand a call to svmsb, or svmls after reordering its operands.
+    Make _m forms merge with argument MERGE_ARGNO.  */
+ static rtx
+ expand_msb (function_expander &e,
+ 	    unsigned int merge_argno = DEFAULT_MERGE_ARGNO)
+ {
+   if (e.pred == PRED_x)
+     {
+       insn_code icode;
+       if (e.type_suffix (0).integer_p)
+ 	icode = code_for_aarch64_pred_fnma (e.vector_mode (0));
+       else
+ 	icode = code_for_aarch64_pred (UNSPEC_COND_FMLS, e.vector_mode (0));
+       return e.use_pred_x_insn (icode);
+     }
+ 
+   insn_code icode = e.direct_optab_handler (cond_fnma_optab);
+   return e.use_cond_insn (icode, merge_argno);
+ }
+ 
+ class svabd_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* The integer operations are represented as the subtraction of the
+        minimum from the maximum, with the signedness of the instruction
+        keyed off the signedness of the maximum operation.  */
+     rtx_code max_code = e.type_suffix (0).unsigned_p ? UMAX : SMAX;
+     insn_code icode;
+     if (e.pred == PRED_x)
+       {
+ 	if (e.type_suffix (0).integer_p)
+ 	  icode = code_for_aarch64_pred_abd (max_code, e.vector_mode (0));
+ 	else
+ 	  icode = code_for_aarch64_pred_abd (e.vector_mode (0));
+ 	return e.use_pred_x_insn (icode);
+       }
+ 
+     if (e.type_suffix (0).integer_p)
+       icode = code_for_aarch64_cond_abd (max_code, e.vector_mode (0));
+     else
+       icode = code_for_aarch64_cond_abd (e.vector_mode (0));
+     return e.use_cond_insn (icode);
+   }
+ };
+ 
+ /* Implements svacge, svacgt, svacle and svaclt.  */
+ class svac_impl : public function_base
+ {
+ public:
+   CONSTEXPR svac_impl (int unspec) : m_unspec (unspec) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.add_ptrue_hint (0, e.gp_mode (0));
+     insn_code icode = code_for_aarch64_pred_fac (m_unspec, e.vector_mode (0));
+     return e.use_exact_insn (icode);
+   }
+ 
+   /* The unspec code for the underlying comparison.  */
+   int m_unspec;
+ };
+ 
+ class svadda_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Put the predicate last, as required by mask_fold_left_plus_optab.  */
+     e.rotate_inputs_left (0, 3);
+     machine_mode mode = e.vector_mode (0);
+     insn_code icode = direct_optab_handler (mask_fold_left_plus_optab, mode);
+     return e.use_exact_insn (icode);
+   }
+ };
+ 
+ /* Implements svadr[bhwd].  */
+ class svadr_bhwd_impl : public function_base
+ {
+ public:
+   CONSTEXPR svadr_bhwd_impl (unsigned int shift) : m_shift (shift) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = GET_MODE (e.args[0]);
+     if (m_shift == 0)
+       return e.use_exact_insn (code_for_aarch64_adr (mode));
+ 
+     /* Turn the access size into an extra shift argument.  */
+     rtx shift = gen_int_mode (m_shift, GET_MODE_INNER (mode));
+     e.args.quick_push (expand_vector_broadcast (mode, shift));
+     return e.use_exact_insn (code_for_aarch64_adr_shift (mode));
+   }
+ 
+   /* How many bits left to shift the vector displacement.  */
+   unsigned int m_shift;
+ };
+ 
+ class svbic_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Convert svbic of a constant into svand of its inverse.  */
+     if (CONST_INT_P (e.args[2]))
+       {
+ 	machine_mode mode = GET_MODE_INNER (e.vector_mode (0));
+ 	e.args[2] = simplify_unary_operation (NOT, mode, e.args[2], mode);
+ 	return e.map_to_rtx_codes (AND, AND, -1);
+       }
+ 
+     if (e.type_suffix_ids[0] == TYPE_SUFFIX_b)
+       {
+ 	gcc_assert (e.pred == PRED_z);
+ 	return e.use_exact_insn (CODE_FOR_aarch64_pred_bicvnx16bi_z);
+       }
+ 
+     if (e.pred == PRED_x)
+       return e.use_unpred_insn (code_for_aarch64_bic (e.vector_mode (0)));
+ 
+     return e.use_cond_insn (code_for_cond_bic (e.vector_mode (0)));
+   }
+ };
+ 
+ /* Implements svbrkn, svbrkpa and svbrkpb.  */
+ class svbrk_binary_impl : public function_base
+ {
+ public:
+   CONSTEXPR svbrk_binary_impl (int unspec) : m_unspec (unspec) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return e.use_exact_insn (code_for_aarch64_brk (m_unspec));
+   }
+ 
+   /* The unspec code associated with the operation.  */
+   int m_unspec;
+ };
+ 
+ /* Implements svbrka and svbrkb.  */
+ class svbrk_unary_impl : public function_base
+ {
+ public:
+   CONSTEXPR svbrk_unary_impl (int unspec) : m_unspec (unspec) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return e.use_cond_insn (code_for_aarch64_brk (m_unspec));
+   }
+ 
+   /* The unspec code associated with the operation.  */
+   int m_unspec;
+ };
+ 
+ class svcadd_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Convert the rotation amount into a specific unspec.  */
+     int rot = INTVAL (e.args.pop ());
+     if (rot == 90)
+       return e.map_to_unspecs (UNSPEC_CADD90, UNSPEC_CADD90,
+ 			       UNSPEC_COND_FCADD90);
+     if (rot == 270)
+       return e.map_to_unspecs (UNSPEC_CADD270, UNSPEC_CADD270,
+ 			       UNSPEC_COND_FCADD270);
+     gcc_unreachable ();
+   }
+ };
+ 
+ /* Implements svclasta and svclastb.  */
+ class svclast_impl : public quiet<function_base>
+ {
+ public:
+   CONSTEXPR svclast_impl (int unspec) : m_unspec (unspec) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Match the fold_extract_optab order.  */
+     std::swap (e.args[0], e.args[1]);
+     machine_mode mode = e.vector_mode (0);
+     insn_code icode;
+     if (e.mode_suffix_id == MODE_n)
+       icode = code_for_fold_extract (m_unspec, mode);
+     else
+       icode = code_for_aarch64_fold_extract_vector (m_unspec, mode);
+     return e.use_exact_insn (icode);
+   }
+ 
+   /* The unspec code associated with the operation.  */
+   int m_unspec;
+ };
+ 
+ class svcmla_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Convert the rotation amount into a specific unspec.  */
+     int rot = INTVAL (e.args.pop ());
+     if (e.type_suffix (0).float_p)
+       {
+ 	/* Make the operand order the same as the one used by the fma optabs,
+ 	   with the accumulator last.  */
+ 	e.rotate_inputs_left (1, 4);
+ 	return e.map_to_unspecs (-1, -1, unspec_cond_fcmla (rot), 3);
+       }
+     else
+       {
+ 	int cmla = unspec_cmla (rot);
+ 	return e.map_to_unspecs (cmla, cmla, -1);
+       }
+   }
+ };
+ 
+ class svcmla_lane_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Convert the rotation amount into a specific unspec.  */
+     int rot = INTVAL (e.args.pop ());
+     machine_mode mode = e.vector_mode (0);
+     if (e.type_suffix (0).float_p)
+       {
+ 	/* Make the operand order the same as the one used by the fma optabs,
+ 	   with the accumulator last.  */
+ 	e.rotate_inputs_left (0, 4);
+ 	insn_code icode = code_for_aarch64_lane (unspec_fcmla (rot), mode);
+ 	return e.use_exact_insn (icode);
+       }
+     else
+       {
+ 	insn_code icode = code_for_aarch64_lane (unspec_cmla (rot), mode);
+ 	return e.use_exact_insn (icode);
+       }
+   }
+ };
+ 
+ /* Implements svcmp<cc> (except svcmpuo, which is handled separately).  */
+ class svcmp_impl : public function_base
+ {
+ public:
+   CONSTEXPR svcmp_impl (tree_code code, int unspec_for_fp)
+     : m_code (code), m_unspec_for_fp (unspec_for_fp) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     tree pg = gimple_call_arg (f.call, 0);
+     tree rhs1 = gimple_call_arg (f.call, 1);
+     tree rhs2 = gimple_call_arg (f.call, 2);
+ 
+     /* Convert a ptrue-predicated integer comparison into the corresponding
+        gimple-level operation.  */
+     if (integer_all_onesp (pg)
+ 	&& f.type_suffix (0).element_bytes == 1
+ 	&& f.type_suffix (0).integer_p)
+       {
+ 	gimple_seq stmts = NULL;
+ 	rhs2 = f.force_vector (stmts, TREE_TYPE (rhs1), rhs2);
+ 	gsi_insert_seq_before (f.gsi, stmts, GSI_SAME_STMT);
+ 	return gimple_build_assign (f.lhs, m_code, rhs1, rhs2);
+       }
+ 
+     return NULL;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = e.vector_mode (0);
+ 
+     /* Comparisons are UNSPEC_PRED_Z operations and so need a hint
+        operand.  */
+     e.add_ptrue_hint (0, e.gp_mode (0));
+ 
+     if (e.type_suffix (0).integer_p)
+       {
+ 	bool unsigned_p = e.type_suffix (0).unsigned_p;
+ 	rtx_code code = get_rtx_code (m_code, unsigned_p);
+ 	return e.use_exact_insn (code_for_aarch64_pred_cmp (code, mode));
+       }
+ 
+     insn_code icode = code_for_aarch64_pred_fcm (m_unspec_for_fp, mode);
+     return e.use_exact_insn (icode);
+   }
+ 
+   /* The tree code associated with the comparison.  */
+   tree_code m_code;
+ 
+   /* The unspec code to use for floating-point comparisons.  */
+   int m_unspec_for_fp;
+ };
+ 
+ /* Implements svcmp<cc>_wide.  */
+ class svcmp_wide_impl : public function_base
+ {
+ public:
+   CONSTEXPR svcmp_wide_impl (tree_code code, int unspec_for_sint,
+ 			     int unspec_for_uint)
+     : m_code (code), m_unspec_for_sint (unspec_for_sint),
+       m_unspec_for_uint (unspec_for_uint) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = e.vector_mode (0);
+     bool unsigned_p = e.type_suffix (0).unsigned_p;
+     rtx_code code = get_rtx_code (m_code, unsigned_p);
+ 
+     /* Comparisons are UNSPEC_PRED_Z operations and so need a hint
+        operand.  */
+     e.add_ptrue_hint (0, e.gp_mode (0));
+ 
+     /* If the argument is a constant that the unwidened comparisons
+        can handle directly, use them instead.  */
+     insn_code icode = code_for_aarch64_pred_cmp (code, mode);
+     rtx op2 = unwrap_const_vec_duplicate (e.args[3]);
+     if (CONSTANT_P (op2)
+ 	&& insn_data[icode].operand[4].predicate (op2, DImode))
+       {
+ 	e.args[3] = op2;
+ 	return e.use_exact_insn (icode);
+       }
+ 
+     int unspec = (unsigned_p ? m_unspec_for_uint : m_unspec_for_sint);
+     return e.use_exact_insn (code_for_aarch64_pred_cmp_wide (unspec, mode));
+   }
+ 
+   /* The tree code associated with the comparison.  */
+   tree_code m_code;
+ 
+   /* The unspec codes for signed and unsigned wide comparisons
+      respectively.  */
+   int m_unspec_for_sint;
+   int m_unspec_for_uint;
+ };
+ 
+ class svcmpuo_impl : public quiet<function_base>
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.add_ptrue_hint (0, e.gp_mode (0));
+     return e.use_exact_insn (code_for_aarch64_pred_fcmuo (e.vector_mode (0)));
+   }
+ };
+ 
+ class svcnot_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = e.vector_mode (0);
+     if (e.pred == PRED_x)
+       {
+ 	/* The pattern for CNOT includes an UNSPEC_PRED_Z, so needs
+ 	   a ptrue hint.  */
+ 	e.add_ptrue_hint (0, e.gp_mode (0));
+ 	return e.use_pred_x_insn (code_for_aarch64_pred_cnot (mode));
+       }
+ 
+     return e.use_cond_insn (code_for_cond_cnot (mode), 0);
+   }
+ };
+ 
+ /* Implements svcnt[bhwd], which count the number of elements
+    in a particular vector mode.  */
+ class svcnt_bhwd_impl : public function_base
+ {
+ public:
+   CONSTEXPR svcnt_bhwd_impl (machine_mode ref_mode) : m_ref_mode (ref_mode) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     tree count = build_int_cstu (TREE_TYPE (f.lhs),
+ 				 GET_MODE_NUNITS (m_ref_mode));
+     return gimple_build_assign (f.lhs, count);
+   }
+ 
+   rtx
+   expand (function_expander &) const OVERRIDE
+   {
+     return gen_int_mode (GET_MODE_NUNITS (m_ref_mode), DImode);
+   }
+ 
+   /* The mode of the vector associated with the [bhwd] suffix.  */
+   machine_mode m_ref_mode;
+ };
+ 
+ /* Implements svcnt[bhwd]_pat.  */
+ class svcnt_bhwd_pat_impl : public svcnt_bhwd_impl
+ {
+ public:
+   CONSTEXPR svcnt_bhwd_pat_impl (machine_mode ref_mode)
+     : svcnt_bhwd_impl (ref_mode) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     tree pattern_arg = gimple_call_arg (f.call, 0);
+     aarch64_svpattern pattern = (aarch64_svpattern) tree_to_shwi (pattern_arg);
+ 
+     if (pattern == AARCH64_SV_ALL)
+       /* svcvnt[bwhd]_pat (SV_ALL) == svcnt[bwhd] ().  */
+       return svcnt_bhwd_impl::fold (f);
+ 
+     /* See whether we can count the number of elements in the pattern
+        at compile time.  */
+     unsigned int elements_per_vq = 128 / GET_MODE_UNIT_BITSIZE (m_ref_mode);
+     HOST_WIDE_INT value = aarch64_fold_sve_cnt_pat (pattern, elements_per_vq);
+     if (value >= 0)
+       {
+ 	tree count = build_int_cstu (TREE_TYPE (f.lhs), value);
+ 	return gimple_build_assign (f.lhs, count);
+       }
+ 
+     return NULL;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     unsigned int elements_per_vq = 128 / GET_MODE_UNIT_BITSIZE (m_ref_mode);
+     e.args.quick_push (gen_int_mode (elements_per_vq, DImode));
+     e.args.quick_push (const1_rtx);
+     return e.use_exact_insn (CODE_FOR_aarch64_sve_cnt_pat);
+   }
+ };
+ 
+ class svcntp_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = e.vector_mode (0);
+     e.add_ptrue_hint (0, mode);
+     return e.use_exact_insn (code_for_aarch64_pred_cntp (mode));
+   }
+ };
+ 
+ /* Implements svcreate2, svcreate3 and svcreate4.  */
+ class svcreate_impl : public quiet<multi_vector_function>
+ {
+ public:
+   CONSTEXPR svcreate_impl (unsigned int vectors_per_tuple)
+     : quiet<multi_vector_function> (vectors_per_tuple) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     unsigned int nargs = gimple_call_num_args (f.call);
+     tree lhs_type = TREE_TYPE (f.lhs);
+ 
+     /* Replace the call with a clobber of the result (to prevent it from
+        becoming upwards exposed) followed by stores into each individual
+        vector of tuple.
+ 
+        The fold routines expect the replacement statement to have the
+        same lhs as the original call, so return the clobber statement
+        rather than the final vector store.  */
+     gassign *clobber = gimple_build_assign (f.lhs, build_clobber (lhs_type));
+ 
+     for (unsigned int i = nargs; i-- > 0; )
+       {
+ 	tree rhs_vector = gimple_call_arg (f.call, i);
+ 	tree field = tuple_type_field (TREE_TYPE (f.lhs));
+ 	tree lhs_array = build3 (COMPONENT_REF, TREE_TYPE (field),
+ 				 unshare_expr (f.lhs), field, NULL_TREE);
+ 	tree lhs_vector = build4 (ARRAY_REF, TREE_TYPE (rhs_vector),
+ 				  lhs_array, size_int (i),
+ 				  NULL_TREE, NULL_TREE);
+ 	gassign *assign = gimple_build_assign (lhs_vector, rhs_vector);
+ 	gsi_insert_after (f.gsi, assign, GSI_SAME_STMT);
+       }
+     return clobber;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     rtx lhs_tuple = e.get_nonoverlapping_reg_target ();
+ 
+     /* Record that LHS_TUPLE is dead before the first store.  */
+     emit_clobber (lhs_tuple);
+     for (unsigned int i = 0; i < e.args.length (); ++i)
+       {
+ 	/* Use an lvalue subreg to refer to vector I in LHS_TUPLE.  */
+ 	rtx lhs_vector = simplify_gen_subreg (GET_MODE (e.args[i]),
+ 					      lhs_tuple, GET_MODE (lhs_tuple),
+ 					      i * BYTES_PER_SVE_VECTOR);
+ 	emit_move_insn (lhs_vector, e.args[i]);
+       }
+     return lhs_tuple;
+   }
+ };
+ 
+ class svcvt_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode0 = e.vector_mode (0);
+     machine_mode mode1 = e.vector_mode (1);
+     insn_code icode;
+     /* All this complication comes from the need to select four things
+        simultaneously:
+ 
+        (1) the kind of conversion (int<-float, float<-int, float<-float)
+        (2) signed vs. unsigned integers, where relevant
+        (3) the predication mode, which must be the wider of the predication
+ 	   modes for MODE0 and MODE1
+        (4) the predication type (m, x or z)
+ 
+        The only supported int<->float conversions for which the integer is
+        narrower than the float are SI<->DF.  It's therefore more convenient
+        to handle (3) by defining two patterns for int<->float conversions:
+        one in which the integer is at least as wide as the float and so
+        determines the predication mode, and another single SI<->DF pattern
+        in which the float's mode determines the predication mode (which is
+        always VNx2BI in that case).
+ 
+        The names of the patterns follow the optab convention of giving
+        the source mode before the destination mode.  */
+     if (e.type_suffix (1).integer_p)
+       {
+ 	int unspec = (e.type_suffix (1).unsigned_p
+ 		      ? UNSPEC_COND_UCVTF
+ 		      : UNSPEC_COND_SCVTF);
+ 	if (e.type_suffix (0).element_bytes <= e.type_suffix (1).element_bytes)
+ 	  icode = (e.pred == PRED_x
+ 		   ? code_for_aarch64_sve_nonextend (unspec, mode1, mode0)
+ 		   : code_for_cond_nonextend (unspec, mode1, mode0));
+ 	else
+ 	  icode = (e.pred == PRED_x
+ 		   ? code_for_aarch64_sve_extend (unspec, mode1, mode0)
+ 		   : code_for_cond_extend (unspec, mode1, mode0));
+       }
+     else
+       {
+ 	int unspec = (!e.type_suffix (0).integer_p ? UNSPEC_COND_FCVT
+ 		      : e.type_suffix (0).unsigned_p ? UNSPEC_COND_FCVTZU
+ 		      : UNSPEC_COND_FCVTZS);
+ 	if (e.type_suffix (0).element_bytes >= e.type_suffix (1).element_bytes)
+ 	  icode = (e.pred == PRED_x
+ 		   ? code_for_aarch64_sve_nontrunc (unspec, mode1, mode0)
+ 		   : code_for_cond_nontrunc (unspec, mode1, mode0));
+ 	else
+ 	  icode = (e.pred == PRED_x
+ 		   ? code_for_aarch64_sve_trunc (unspec, mode1, mode0)
+ 		   : code_for_cond_trunc (unspec, mode1, mode0));
+       }
+ 
+     if (e.pred == PRED_x)
+       return e.use_pred_x_insn (icode);
+     return e.use_cond_insn (icode);
+   }
+ };
+ 
+ class svdot_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* In the optab, the multiplication operands come before the accumulator
+        operand.  The optab is keyed off the multiplication mode.  */
+     e.rotate_inputs_left (0, 3);
+     insn_code icode
+       = e.direct_optab_handler_for_sign (sdot_prod_optab, udot_prod_optab,
+ 					 0, GET_MODE (e.args[0]));
+     return e.use_unpred_insn (icode);
+   }
+ };
+ 
+ class svdotprod_lane_impl : public unspec_based_function_base
+ {
+ public:
+   CONSTEXPR svdotprod_lane_impl (int unspec_for_sint,
+ 				 int unspec_for_uint,
+ 				 int unspec_for_float)
+     : unspec_based_function_base (unspec_for_sint,
+ 				  unspec_for_uint,
+ 				  unspec_for_float) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Use the same ordering as the dot_prod_optab, with the
+        accumulator last.  */
+     e.rotate_inputs_left (0, 4);
+     int unspec = unspec_for (e);
+     machine_mode mode = e.vector_mode (0);
+     return e.use_exact_insn (code_for_aarch64_dot_prod_lane (unspec, mode));
+   }
+ };
+ 
+ class svdup_impl : public quiet<function_base>
+ {
+ public:
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     tree vec_type = TREE_TYPE (f.lhs);
+     tree rhs = gimple_call_arg (f.call, f.pred == PRED_none ? 0 : 1);
+ 
+     if (f.pred == PRED_none || f.pred == PRED_x)
+       {
+ 	if (CONSTANT_CLASS_P (rhs))
+ 	  {
+ 	    if (f.type_suffix (0).bool_p)
+ 	      return (tree_to_shwi (rhs)
+ 		      ? f.fold_to_ptrue ()
+ 		      : f.fold_to_pfalse ());
+ 
+ 	    tree rhs_vector = build_vector_from_val (vec_type, rhs);
+ 	    return gimple_build_assign (f.lhs, rhs_vector);
+ 	  }
+ 
+ 	/* Avoid folding _b to a VEC_DUPLICATE_EXPR, since to do that we
+ 	   would need to introduce an extra and unwanted conversion to
+ 	   the truth vector element type.  */
+ 	if (!f.type_suffix (0).bool_p)
+ 	  return gimple_build_assign (f.lhs, VEC_DUPLICATE_EXPR, rhs);
+       }
+ 
+     /* svdup_z (pg, x) == VEC_COND_EXPR <pg, VEC_DUPLICATE_EXPR <x>, 0>.  */
+     if (f.pred == PRED_z)
+       {
+ 	gimple_seq stmts = NULL;
+ 	tree pred = f.convert_pred (stmts, vec_type, 0);
+ 	rhs = f.force_vector (stmts, vec_type, rhs);
+ 	gsi_insert_seq_before (f.gsi, stmts, GSI_SAME_STMT);
+ 	return gimple_build_assign (f.lhs, VEC_COND_EXPR, pred, rhs,
+ 				    build_zero_cst (vec_type));
+       }
+ 
+     return NULL;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     if (e.pred == PRED_none || e.pred == PRED_x)
+       /* There's no benefit to using predicated instructions for _x here.  */
+       return e.use_unpred_insn (e.direct_optab_handler (vec_duplicate_optab));
+ 
+     /* Model predicated svdups as a SEL in which the "true" value is
+        the duplicate of the function argument and the "false" value
+        is the value of inactive lanes.  */
+     insn_code icode;
+     machine_mode mode = e.vector_mode (0);
+     if (valid_for_const_vector_p (GET_MODE_INNER (mode), e.args.last ()))
+       /* Duplicate the constant to fill a vector.  The pattern optimizes
+ 	 various cases involving constant operands, falling back to SEL
+ 	 if necessary.  */
+       icode = code_for_vcond_mask (mode, mode);
+     else
+       /* Use the pattern for selecting between a duplicated scalar
+ 	 variable and a vector fallback.  */
+       icode = code_for_aarch64_sel_dup (mode);
+     return e.use_vcond_mask_insn (icode);
+   }
+ };
+ 
+ class svdup_lane_impl : public quiet<function_base>
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* The native DUP lane has an index range of 64 bytes.  */
+     machine_mode mode = e.vector_mode (0);
+     if (CONST_INT_P (e.args[1])
+ 	&& IN_RANGE (INTVAL (e.args[1]) * GET_MODE_UNIT_SIZE (mode), 0, 63))
+       return e.use_exact_insn (code_for_aarch64_sve_dup_lane (mode));
+ 
+     /* Treat svdup_lane as if it were svtbl_n.  */
+     return e.use_exact_insn (code_for_aarch64_sve_tbl (e.vector_mode (0)));
+   }
+ };
+ 
+ class svdupq_impl : public quiet<function_base>
+ {
+ public:
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     tree vec_type = TREE_TYPE (f.lhs);
+     unsigned int nargs = gimple_call_num_args (f.call);
+     /* For predicates, pad out each argument so that we have one element
+        per bit.  */
+     unsigned int factor = (f.type_suffix (0).bool_p
+ 			   ? f.type_suffix (0).element_bytes : 1);
+     tree_vector_builder builder (vec_type, nargs * factor, 1);
+     for (unsigned int i = 0; i < nargs; ++i)
+       {
+ 	tree elt = gimple_call_arg (f.call, i);
+ 	if (!CONSTANT_CLASS_P (elt))
+ 	  return NULL;
+ 	builder.quick_push (elt);
+ 	for (unsigned int j = 1; j < factor; ++j)
+ 	  builder.quick_push (build_zero_cst (TREE_TYPE (vec_type)));
+       }
+     return gimple_build_assign (f.lhs, builder.build ());
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = e.vector_mode (0);
+     unsigned int elements_per_vq = e.args.length ();
+     if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL)
+       {
+ 	/* Construct a vector of integers so that we can compare them against
+ 	   zero below.  Zero vs. nonzero is the only distinction that
+ 	   matters.  */
+ 	mode = aarch64_sve_int_mode (mode);
+ 	for (unsigned int i = 0; i < elements_per_vq; ++i)
+ 	  e.args[i] = simplify_gen_unary (ZERO_EXTEND, GET_MODE_INNER (mode),
+ 					  e.args[i], QImode);
+       }
+ 
+     /* Get the 128-bit Advanced SIMD vector for this data size.  */
+     scalar_mode element_mode = GET_MODE_INNER (mode);
+     machine_mode vq_mode = aarch64_vq_mode (element_mode).require ();
+     gcc_assert (known_eq (elements_per_vq, GET_MODE_NUNITS (vq_mode)));
+ 
+     /* Put the arguments into a 128-bit Advanced SIMD vector.  We want
+        argument N to go into architectural lane N, whereas Advanced SIMD
+        vectors are loaded memory lsb to register lsb.  We therefore need
+        to reverse the elements for big-endian targets.  */
+     rtx vq_reg = gen_reg_rtx (vq_mode);
+     rtvec vec = rtvec_alloc (elements_per_vq);
+     for (unsigned int i = 0; i < elements_per_vq; ++i)
+       {
+ 	unsigned int argno = BYTES_BIG_ENDIAN ? elements_per_vq - i - 1 : i;
+ 	RTVEC_ELT (vec, i) = e.args[argno];
+       }
+     aarch64_expand_vector_init (vq_reg, gen_rtx_PARALLEL (vq_mode, vec));
+ 
+     /* If the result is a boolean, compare the data vector against zero.  */
+     if (mode != e.vector_mode (0))
+       {
+ 	rtx data_dupq = aarch64_expand_sve_dupq (NULL, mode, vq_reg);
+ 	return aarch64_convert_sve_data_to_pred (e.possible_target,
+ 						 e.vector_mode (0), data_dupq);
+       }
+ 
+     return aarch64_expand_sve_dupq (e.possible_target, mode, vq_reg);
+   }
+ };
+ 
+ class svdupq_lane_impl : public quiet<function_base>
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = e.vector_mode (0);
+     rtx index = e.args[1];
+     if (CONST_INT_P (index) && IN_RANGE (INTVAL (index), 0, 3))
+       {
+ 	/* Use the .Q form of DUP, which is the native instruction for
+ 	   this function.  */
+ 	insn_code icode = code_for_aarch64_sve_dupq_lane (mode);
+ 	unsigned int num_indices = e.elements_per_vq (0);
+ 	rtx indices = aarch64_gen_stepped_int_parallel
+ 	  (num_indices, INTVAL (index) * num_indices, 1);
+ 
+ 	e.add_output_operand (icode);
+ 	e.add_input_operand (icode, e.args[0]);
+ 	e.add_fixed_operand (indices);
+ 	return e.generate_insn (icode);
+       }
+ 
+     /* Build a .D TBL index for the pairs of doublewords that we want to
+        duplicate.  */
+     if (CONST_INT_P (index))
+       {
+ 	/* The index vector is a constant.  */
+ 	rtx_vector_builder builder (VNx2DImode, 2, 1);
+ 	builder.quick_push (gen_int_mode (INTVAL (index) * 2, DImode));
+ 	builder.quick_push (gen_int_mode (INTVAL (index) * 2 + 1, DImode));
+ 	index = builder.build ();
+       }
+     else
+       {
+ 	/* Duplicate INDEX * 2 to fill a DImode vector.  The ACLE spec
+ 	   explicitly allows the top of the index to be dropped.  */
+ 	index = force_reg (DImode, simplify_gen_binary (ASHIFT, DImode,
+ 							index, const1_rtx));
+ 	index = expand_vector_broadcast (VNx2DImode, index);
+ 
+ 	/* Get an alternating 0, 1 predicate.  */
+ 	rtx_vector_builder builder (VNx2BImode, 2, 1);
+ 	builder.quick_push (const0_rtx);
+ 	builder.quick_push (constm1_rtx);
+ 	rtx pg = force_reg (VNx2BImode, builder.build ());
+ 
+ 	/* Add one to the odd elements of the index.  */
+ 	rtx one = force_reg (VNx2DImode, CONST1_RTX (VNx2DImode));
+ 	rtx target = gen_reg_rtx (VNx2DImode);
+ 	emit_insn (gen_cond_addvnx2di (target, pg, index, one, index));
+ 	index = target;
+       }
+ 
+     e.args[0] = gen_lowpart (VNx2DImode, e.args[0]);
+     e.args[1] = index;
+     return e.use_exact_insn (CODE_FOR_aarch64_sve_tblvnx2di);
+   }
+ };
+ 
+ /* Implements svextb, svexth and svextw.  */
+ class svext_bhw_impl : public function_base
+ {
+ public:
+   CONSTEXPR svext_bhw_impl (scalar_int_mode from_mode)
+     : m_from_mode (from_mode) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     if (e.type_suffix (0).unsigned_p)
+       {
+ 	/* Convert to an AND.  The widest we go is 0xffffffff, which fits
+ 	   in a CONST_INT.  */
+ 	e.args.quick_push (GEN_INT (GET_MODE_MASK (m_from_mode)));
+ 	if (e.pred == PRED_m)
+ 	  /* We now have arguments "(inactive, pg, op, mask)".  Convert this
+ 	     to "(pg, op, mask, inactive)" so that the order matches svand_m
+ 	     with an extra argument on the end.  Take the inactive elements
+ 	     from this extra argument.  */
+ 	  e.rotate_inputs_left (0, 4);
+ 	return e.map_to_rtx_codes (AND, AND, -1, 3);
+       }
+ 
+     machine_mode wide_mode = e.vector_mode (0);
+     poly_uint64 nunits = GET_MODE_NUNITS (wide_mode);
+     machine_mode narrow_mode
+       = aarch64_sve_data_mode (m_from_mode, nunits).require ();
+     if (e.pred == PRED_x)
+       {
+ 	insn_code icode = code_for_aarch64_pred_sxt (wide_mode, narrow_mode);
+ 	return e.use_pred_x_insn (icode);
+       }
+ 
+     insn_code icode = code_for_aarch64_cond_sxt (wide_mode, narrow_mode);
+     return e.use_cond_insn (icode);
+   }
+ 
+   /* The element mode that we're extending from.  */
+   scalar_int_mode m_from_mode;
+ };
+ 
+ /* Implements svget2, svget3 and svget4.  */
+ class svget_impl : public quiet<multi_vector_function>
+ {
+ public:
+   CONSTEXPR svget_impl (unsigned int vectors_per_tuple)
+     : quiet<multi_vector_function> (vectors_per_tuple) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     /* Fold into a normal gimple component access.  */
+     tree rhs_tuple = gimple_call_arg (f.call, 0);
+     tree index = gimple_call_arg (f.call, 1);
+     tree field = tuple_type_field (TREE_TYPE (rhs_tuple));
+     tree rhs_array = build3 (COMPONENT_REF, TREE_TYPE (field),
+ 			     rhs_tuple, field, NULL_TREE);
+     tree rhs_vector = build4 (ARRAY_REF, TREE_TYPE (f.lhs),
+ 			      rhs_array, index, NULL_TREE, NULL_TREE);
+     return gimple_build_assign (f.lhs, rhs_vector);
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Fold the access into a subreg rvalue.  */
+     return simplify_gen_subreg (e.vector_mode (0), e.args[0],
+ 				GET_MODE (e.args[0]),
+ 				INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
+   }
+ };
+ 
+ class svindex_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return e.use_exact_insn (e.direct_optab_handler (vec_series_optab));
+   }
+ };
+ 
+ class svinsr_impl : public quiet<function_base>
+ {
+ public:
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     gcall *new_call = gimple_build_call_internal (IFN_VEC_SHL_INSERT, 2,
+ 						  gimple_call_arg (f.call, 0),
+ 						  gimple_call_arg (f.call, 1));
+     gimple_call_set_lhs (new_call, f.lhs);
+     return new_call;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     insn_code icode = direct_optab_handler (vec_shl_insert_optab,
+ 					    e.vector_mode (0));
+     return e.use_exact_insn (icode);
+   }
+ };
+ 
+ /* Implements svlasta and svlastb.  */
+ class svlast_impl : public quiet<function_base>
+ {
+ public:
+   CONSTEXPR svlast_impl (int unspec) : m_unspec (unspec) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return e.use_exact_insn (code_for_extract (m_unspec, e.vector_mode (0)));
+   }
+ 
+   /* The unspec code associated with the operation.  */
+   int m_unspec;
+ };
+ 
+ class svld1_impl : public full_width_access
+ {
+ public:
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_READ_MEMORY;
+   }
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     tree vectype = f.vector_type (0);
+ 
+     /* Get the predicate and base pointer.  */
+     gimple_seq stmts = NULL;
+     tree pred = f.convert_pred (stmts, vectype, 0);
+     tree base = f.fold_contiguous_base (stmts, vectype);
+     gsi_insert_seq_before (f.gsi, stmts, GSI_SAME_STMT);
+ 
+     tree cookie = f.load_store_cookie (TREE_TYPE (vectype));
+     gcall *new_call = gimple_build_call_internal (IFN_MASK_LOAD, 3,
+ 						  base, cookie, pred);
+     gimple_call_set_lhs (new_call, f.lhs);
+     return new_call;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     insn_code icode = convert_optab_handler (maskload_optab,
+ 					     e.vector_mode (0), e.gp_mode (0));
+     return e.use_contiguous_load_insn (icode);
+   }
+ };
+ 
+ /* Implements extending contiguous forms of svld1.  */
+ class svld1_extend_impl : public extending_load
+ {
+ public:
+   CONSTEXPR svld1_extend_impl (type_suffix_index memory_type)
+     : extending_load (memory_type) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     insn_code icode = code_for_aarch64_load (extend_rtx_code (),
+ 					     e.vector_mode (0),
+ 					     e.memory_vector_mode ());
+     return e.use_contiguous_load_insn (icode);
+   }
+ };
+ 
+ class svld1_gather_impl : public full_width_access
+ {
+ public:
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_READ_MEMORY;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.prepare_gather_address_operands (1);
+     /* Put the predicate last, as required by mask_gather_load_optab.  */
+     e.rotate_inputs_left (0, 5);
+     machine_mode mem_mode = e.memory_vector_mode ();
+     machine_mode int_mode = aarch64_sve_int_mode (mem_mode);
+     insn_code icode = convert_optab_handler (mask_gather_load_optab,
+ 					     mem_mode, int_mode);
+     return e.use_exact_insn (icode);
+   }
+ };
+ 
+ /* Implements extending forms of svld1_gather.  */
+ class svld1_gather_extend_impl : public extending_load
+ {
+ public:
+   CONSTEXPR svld1_gather_extend_impl (type_suffix_index memory_type)
+     : extending_load (memory_type) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.prepare_gather_address_operands (1);
+     /* Put the predicate last, since the extending gathers use the same
+        operand order as mask_gather_load_optab.  */
+     e.rotate_inputs_left (0, 5);
+     /* Add a constant predicate for the extension rtx.  */
+     e.args.quick_push (CONSTM1_RTX (VNx16BImode));
+     insn_code icode = code_for_aarch64_gather_load (extend_rtx_code (),
+ 						    e.vector_mode (0),
+ 						    e.memory_vector_mode ());
+     return e.use_exact_insn (icode);
+   }
+ };
+ 
+ class load_replicate : public function_base
+ {
+ public:
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_READ_MEMORY;
+   }
+ 
+   tree
+   memory_scalar_type (const function_instance &fi) const OVERRIDE
+   {
+     return fi.scalar_type (0);
+   }
+ };
+ 
+ class svld1rq_impl : public load_replicate
+ {
+ public:
+   machine_mode
+   memory_vector_mode (const function_instance &fi) const OVERRIDE
+   {
+     return aarch64_vq_mode (GET_MODE_INNER (fi.vector_mode (0))).require ();
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     insn_code icode = code_for_aarch64_sve_ld1rq (e.vector_mode (0));
+     return e.use_contiguous_load_insn (icode);
+   }
+ };
+ 
+ class svld1ro_impl : public load_replicate
+ {
+ public:
+   machine_mode
+   memory_vector_mode (const function_instance &) const OVERRIDE
+   {
+     return OImode;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     insn_code icode = code_for_aarch64_sve_ld1ro (e.vector_mode (0));
+     return e.use_contiguous_load_insn (icode);
+   }
+ };
+ 
+ /* Implements svld2, svld3 and svld4.  */
+ class svld234_impl : public full_width_access
+ {
+ public:
+   CONSTEXPR svld234_impl (unsigned int vectors_per_tuple)
+     : full_width_access (vectors_per_tuple) {}
+ 
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_READ_MEMORY;
+   }
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     tree tuple_type = TREE_TYPE (f.lhs);
+     tree vectype = f.vector_type (0);
+ 
+     /* Get the predicate and base pointer.  */
+     gimple_seq stmts = NULL;
+     tree pred = f.convert_pred (stmts, vectype, 0);
+     tree base = f.fold_contiguous_base (stmts, vectype);
+     gsi_insert_seq_before (f.gsi, stmts, GSI_SAME_STMT);
+ 
+     /* Emit two statements: a clobber of the lhs, so that it isn't
+        upwards exposed, and then the load itself.
+ 
+        The fold routines expect the replacement statement to have the
+        same lhs as the original call, so return the clobber statement
+        rather than the load.  */
+     gimple *clobber = gimple_build_assign (f.lhs, build_clobber (tuple_type));
+ 
+     /* View the loaded data as an array of vectors.  */
+     tree field = tuple_type_field (tuple_type);
+     tree lhs_array = build1 (VIEW_CONVERT_EXPR, TREE_TYPE (field),
+ 			     unshare_expr (f.lhs));
+ 
+     /* Emit the load itself.  */
+     tree cookie = f.load_store_cookie (TREE_TYPE (vectype));
+     gcall *new_call = gimple_build_call_internal (IFN_MASK_LOAD_LANES, 3,
+ 						  base, cookie, pred);
+     gimple_call_set_lhs (new_call, lhs_array);
+     gsi_insert_after (f.gsi, new_call, GSI_SAME_STMT);
+ 
+     return clobber;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode tuple_mode = TYPE_MODE (TREE_TYPE (e.call_expr));
+     insn_code icode = convert_optab_handler (vec_mask_load_lanes_optab,
+ 					     tuple_mode, e.vector_mode (0));
+     return e.use_contiguous_load_insn (icode);
+   }
+ };
+ 
+ class svldff1_gather_impl : public full_width_access
+ {
+ public:
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_READ_MEMORY | CP_READ_FFR | CP_WRITE_FFR;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* See the block comment in aarch64-sve.md for details about the
+        FFR handling.  */
+     emit_insn (gen_aarch64_update_ffr_for_load ());
+ 
+     e.prepare_gather_address_operands (1);
+     /* Put the predicate last, since ldff1_gather uses the same operand
+        order as mask_gather_load_optab.  */
+     e.rotate_inputs_left (0, 5);
+     machine_mode mem_mode = e.memory_vector_mode ();
+     return e.use_exact_insn (code_for_aarch64_ldff1_gather (mem_mode));
+   }
+ };
+ 
+ /* Implements extending forms of svldff1_gather.  */
+ class svldff1_gather_extend : public extending_load
+ {
+ public:
+   CONSTEXPR svldff1_gather_extend (type_suffix_index memory_type)
+     : extending_load (memory_type) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* See the block comment in aarch64-sve.md for details about the
+        FFR handling.  */
+     emit_insn (gen_aarch64_update_ffr_for_load ());
+ 
+     e.prepare_gather_address_operands (1);
+     /* Put the predicate last, since ldff1_gather uses the same operand
+        order as mask_gather_load_optab.  */
+     e.rotate_inputs_left (0, 5);
+     /* Add a constant predicate for the extension rtx.  */
+     e.args.quick_push (CONSTM1_RTX (VNx16BImode));
+     insn_code icode = code_for_aarch64_ldff1_gather (extend_rtx_code (),
+ 						     e.vector_mode (0),
+ 						     e.memory_vector_mode ());
+     return e.use_exact_insn (icode);
+   }
+ };
+ 
+ class svldnt1_impl : public full_width_access
+ {
+ public:
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_READ_MEMORY;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     insn_code icode = code_for_aarch64_ldnt1 (e.vector_mode (0));
+     return e.use_contiguous_load_insn (icode);
+   }
+ };
+ 
+ /* Implements svldff1 and svldnf1.  */
+ class svldxf1_impl : public full_width_access
+ {
+ public:
+   CONSTEXPR svldxf1_impl (int unspec) : m_unspec (unspec) {}
+ 
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_READ_MEMORY | CP_READ_FFR | CP_WRITE_FFR;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* See the block comment in aarch64-sve.md for details about the
+        FFR handling.  */
+     emit_insn (gen_aarch64_update_ffr_for_load ());
+ 
+     machine_mode mode = e.vector_mode (0);
+     return e.use_contiguous_load_insn (code_for_aarch64_ldf1 (m_unspec, mode));
+   }
+ 
+   /* The unspec associated with the load.  */
+   int m_unspec;
+ };
+ 
+ /* Implements extending contiguous forms of svldff1 and svldnf1.  */
+ class svldxf1_extend_impl : public extending_load
+ {
+ public:
+   CONSTEXPR svldxf1_extend_impl (type_suffix_index memory_type, int unspec)
+     : extending_load (memory_type), m_unspec (unspec) {}
+ 
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_READ_MEMORY | CP_READ_FFR | CP_WRITE_FFR;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* See the block comment in aarch64-sve.md for details about the
+        FFR handling.  */
+     emit_insn (gen_aarch64_update_ffr_for_load ());
+ 
+     insn_code icode = code_for_aarch64_ldf1 (m_unspec, extend_rtx_code (),
+ 					     e.vector_mode (0),
+ 					     e.memory_vector_mode ());
+     return e.use_contiguous_load_insn (icode);
+   }
+ 
+   /* The unspec associated with the load.  */
+   int m_unspec;
+ };
+ 
+ class svlen_impl : public quiet<function_base>
+ {
+ public:
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     /* The argument only exists for its type.  */
+     tree rhs_type = TREE_TYPE (gimple_call_arg (f.call, 0));
+     tree count = build_int_cstu (TREE_TYPE (f.lhs),
+ 				 TYPE_VECTOR_SUBPARTS (rhs_type));
+     return gimple_build_assign (f.lhs, count);
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* The argument only exists for its type.  */
+     return gen_int_mode (GET_MODE_NUNITS (e.vector_mode (0)), DImode);
+   }
+ };
+ 
+ class svmad_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return expand_mad (e);
+   }
+ };
+ 
+ class svmla_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Put the accumulator at the end (argument 3), but keep it as the
+        merge input for _m functions.  */
+     e.rotate_inputs_left (1, 4);
+     return expand_mad (e, 3);
+   }
+ };
+ 
+ class svmla_lane_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     if (e.type_suffix (0).integer_p)
+       {
+ 	machine_mode mode = e.vector_mode (0);
+ 	return e.use_exact_insn (code_for_aarch64_sve_add_mul_lane (mode));
+       }
+     return expand_mla_mls_lane (e, UNSPEC_FMLA);
+   }
+ };
+ 
+ class svmls_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Put the accumulator at the end (argument 3), but keep it as the
+        merge input for _m functions.  */
+     e.rotate_inputs_left (1, 4);
+     return expand_msb (e, 3);
+   }
+ };
+ 
+ class svmov_impl : public function_base
+ {
+ public:
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     return gimple_build_assign (f.lhs, BIT_AND_EXPR,
+ 				gimple_call_arg (f.call, 0),
+ 				gimple_call_arg (f.call, 1));
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* The canonical form for the assembler alias "MOV Pa.B, Pb/Z, Pc.B"
+        is "AND Pa.B, Pb/Z, Pc.B, Pc.B".  */
+     gcc_assert (e.pred == PRED_z);
+     e.args.quick_push (e.args[1]);
+     return e.use_exact_insn (CODE_FOR_aarch64_pred_andvnx16bi_z);
+   }
+ };
+ 
+ class svmls_lane_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     if (e.type_suffix (0).integer_p)
+       {
+ 	machine_mode mode = e.vector_mode (0);
+ 	return e.use_exact_insn (code_for_aarch64_sve_sub_mul_lane (mode));
+       }
+     return expand_mla_mls_lane (e, UNSPEC_FMLS);
+   }
+ };
+ 
+ class svmmla_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     insn_code icode;
+     if (e.type_suffix (0).integer_p)
+       {
+ 	if (e.type_suffix (0).unsigned_p)
+ 	  icode = code_for_aarch64_sve_add (UNSPEC_UMATMUL, e.vector_mode (0));
+ 	else
+ 	  icode = code_for_aarch64_sve_add (UNSPEC_SMATMUL, e.vector_mode (0));
+       }
+     else
+       icode = code_for_aarch64_sve (UNSPEC_FMMLA, e.vector_mode (0));
+     return e.use_exact_insn (icode);
+   }
+ };
+ 
+ class svmsb_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return expand_msb (e);
+   }
+ };
+ 
+ class svnand_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     gcc_assert (e.pred == PRED_z);
+     return e.use_exact_insn (CODE_FOR_aarch64_pred_nandvnx16bi_z);
+   }
+ };
+ 
+ class svnor_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     gcc_assert (e.pred == PRED_z);
+     return e.use_exact_insn (CODE_FOR_aarch64_pred_norvnx16bi_z);
+   }
+ };
+ 
+ class svnot_impl : public rtx_code_function
+ {
+ public:
+   CONSTEXPR svnot_impl () : rtx_code_function (NOT, NOT, -1) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     if (e.type_suffix_ids[0] == TYPE_SUFFIX_b)
+       {
+ 	/* The canonical form for the assembler alias "NOT Pa.B, Pb/Z, Pc.B"
+ 	   is "EOR Pa.B, Pb/Z, Pb.B, Pc.B".  */
+ 	gcc_assert (e.pred == PRED_z);
+ 	e.args.quick_insert (1, e.args[0]);
+ 	return e.use_exact_insn (CODE_FOR_aarch64_pred_xorvnx16bi_z);
+       }
+     return rtx_code_function::expand (e);
+   }
+ };
+ 
+ class svorn_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     gcc_assert (e.pred == PRED_z);
+     return e.use_exact_insn (CODE_FOR_aarch64_pred_ornvnx16bi_z);
+   }
+ };
+ 
+ class svpfalse_impl : public function_base
+ {
+ public:
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     return f.fold_to_pfalse ();
+   }
+ 
+   rtx
+   expand (function_expander &) const OVERRIDE
+   {
+     return CONST0_RTX (VNx16BImode);
+   }
+ };
+ 
+ /* Implements svpfirst and svpnext, which share the same .md patterns.  */
+ class svpfirst_svpnext_impl : public function_base
+ {
+ public:
+   CONSTEXPR svpfirst_svpnext_impl (int unspec) : m_unspec (unspec) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = e.vector_mode (0);
+     e.add_ptrue_hint (0, mode);
+     return e.use_exact_insn (code_for_aarch64_sve (m_unspec, mode));
+   }
+ 
+   /* The unspec associated with the operation.  */
+   int m_unspec;
+ };
+ 
+ /* Implements contiguous forms of svprf[bhwd].  */
+ class svprf_bhwd_impl : public function_base
+ {
+ public:
+   CONSTEXPR svprf_bhwd_impl (machine_mode mode) : m_mode (mode) {}
+ 
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_PREFETCH_MEMORY;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.prepare_prefetch_operands ();
+     insn_code icode = code_for_aarch64_sve_prefetch (m_mode);
+     return e.use_contiguous_prefetch_insn (icode);
+   }
+ 
+   /* The mode that we'd use to hold one vector of prefetched data.  */
+   machine_mode m_mode;
+ };
+ 
+ /* Implements svprf[bhwd]_gather.  */
+ class svprf_bhwd_gather_impl : public function_base
+ {
+ public:
+   CONSTEXPR svprf_bhwd_gather_impl (machine_mode mode) : m_mode (mode) {}
+ 
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_PREFETCH_MEMORY;
+   }
+ 
+   machine_mode
+   memory_vector_mode (const function_instance &) const OVERRIDE
+   {
+     return m_mode;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.prepare_prefetch_operands ();
+     e.prepare_gather_address_operands (1);
+ 
+     /* Insert a zero operand to identify the mode of the memory being
+        accessed.  This goes between the gather operands and prefetch
+        operands created above.  */
+     e.args.quick_insert (5, CONST0_RTX (m_mode));
+ 
+     machine_mode reg_mode = GET_MODE (e.args[2]);
+     insn_code icode = code_for_aarch64_sve_gather_prefetch (m_mode, reg_mode);
+     return e.use_exact_insn (icode);
+   }
+ 
+   /* The mode that we'd use to hold one vector of prefetched data.  */
+   machine_mode m_mode;
+ };
+ 
+ /* Implements svptest_any, svptest_first and svptest_last.  */
+ class svptest_impl : public function_base
+ {
+ public:
+   CONSTEXPR svptest_impl (rtx_code compare) : m_compare (compare) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* See whether GP is an exact ptrue for some predicate mode;
+        i.e. whether converting the GP to that mode will not drop
+        set bits and will leave all significant bits set.  */
+     machine_mode wide_mode;
+     int hint;
+     if (aarch64_ptrue_all_mode (e.args[0]).exists (&wide_mode))
+       hint = SVE_KNOWN_PTRUE;
+     else
+       {
+ 	hint = SVE_MAYBE_NOT_PTRUE;
+ 	wide_mode = VNx16BImode;
+       }
+ 
+     /* Generate the PTEST itself.  */
+     rtx pg = force_reg (VNx16BImode, e.args[0]);
+     rtx wide_pg = gen_lowpart (wide_mode, pg);
+     rtx hint_rtx = gen_int_mode (hint, DImode);
+     rtx op = force_reg (wide_mode, gen_lowpart (wide_mode, e.args[1]));
+     emit_insn (gen_aarch64_ptestvnx16bi (pg, wide_pg, hint_rtx, op));
+ 
+     /* Get the location of the boolean result.  We can provide SImode and
+        DImode values directly; rely on generic code to convert others.  */
+     rtx target = e.possible_target;
+     if (!target
+ 	|| !REG_P (target)
+ 	|| (GET_MODE (target) != SImode && GET_MODE (target) != DImode))
+       target = gen_reg_rtx (DImode);
+ 
+     /* Generate a CSET to convert the CC result of the PTEST to a boolean.  */
+     rtx cc_reg = gen_rtx_REG (CC_NZCmode, CC_REGNUM);
+     rtx compare = gen_rtx_fmt_ee (m_compare, GET_MODE (target),
+ 				  cc_reg, const0_rtx);
+     emit_insn (gen_rtx_SET (target, compare));
+     return target;
+   }
+ 
+   /* The comparison code associated with ptest condition.  */
+   rtx_code m_compare;
+ };
+ 
+ class svptrue_impl : public function_base
+ {
+ public:
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     return f.fold_to_ptrue ();
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return aarch64_ptrue_all (e.type_suffix (0).element_bytes);
+   }
+ };
+ 
+ class svptrue_pat_impl : public function_base
+ {
+ public:
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     tree pattern_arg = gimple_call_arg (f.call, 0);
+     aarch64_svpattern pattern = (aarch64_svpattern) tree_to_shwi (pattern_arg);
+ 
+     if (pattern == AARCH64_SV_ALL)
+       /* svptrue_pat_bN (SV_ALL) == svptrue_bN ().  */
+       return f.fold_to_ptrue ();
+ 
+     /* See whether we can count the number of elements in the pattern
+        at compile time.  If so, construct a predicate with that number
+        of 1s followed by all 0s.  */
+     int nelts_per_vq = f.elements_per_vq (0);
+     HOST_WIDE_INT value = aarch64_fold_sve_cnt_pat (pattern, nelts_per_vq);
+     if (value >= 0)
+       return f.fold_to_vl_pred (value);
+ 
+     return NULL;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* In rtl, the predicate is represented as the constant:
+ 
+          (const:V16BI (unspec:V16BI [(const_int PATTERN)
+ 				     (const_vector:VnnBI [zeros])]
+ 				    UNSPEC_PTRUE))
+ 
+        where nn determines the element size.  */
+     rtvec vec = gen_rtvec (2, e.args[0], CONST0_RTX (e.vector_mode (0)));
+     return gen_rtx_CONST (VNx16BImode,
+ 			  gen_rtx_UNSPEC (VNx16BImode, vec, UNSPEC_PTRUE));
+   }
+ };
+ 
+ /* Implements svqdec[bhwd]{,_pat} and svqinc[bhwd]{,_pat}.  */
+ class svqdec_svqinc_bhwd_impl : public function_base
+ {
+ public:
+   CONSTEXPR svqdec_svqinc_bhwd_impl (rtx_code code_for_sint,
+ 				     rtx_code code_for_uint,
+ 				     scalar_int_mode elem_mode)
+     : m_code_for_sint (code_for_sint),
+       m_code_for_uint (code_for_uint),
+       m_elem_mode (elem_mode)
+   {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Treat non-_pat functions in the same way as _pat functions with
+        an SV_ALL argument.  */
+     if (e.args.length () == 2)
+       e.args.quick_insert (1, gen_int_mode (AARCH64_SV_ALL, DImode));
+ 
+     /* Insert the number of elements per 128-bit block as a fake argument,
+        between the pattern and the multiplier.  Arguments 1, 2 and 3 then
+        correspond exactly with the 3 UNSPEC_SVE_CNT_PAT operands; see
+        aarch64_sve_cnt_pat for details.  */
+     unsigned int elements_per_vq = 128 / GET_MODE_BITSIZE (m_elem_mode);
+     e.args.quick_insert (2, gen_int_mode (elements_per_vq, DImode));
+ 
+     rtx_code code = (e.type_suffix (0).unsigned_p
+ 		     ? m_code_for_uint
+ 		     : m_code_for_sint);
+ 
+     /* Choose between operating on integer scalars or integer vectors.  */
+     machine_mode mode = e.vector_mode (0);
+     if (e.mode_suffix_id == MODE_n)
+       mode = GET_MODE_INNER (mode);
+     return e.use_exact_insn (code_for_aarch64_sve_pat (code, mode));
+   }
+ 
+   /* The saturating addition or subtraction codes to use for signed and
+      unsigned values respectively.  */
+   rtx_code m_code_for_sint;
+   rtx_code m_code_for_uint;
+ 
+   /* The integer mode associated with the [bhwd] suffix.  */
+   scalar_int_mode m_elem_mode;
+ };
+ 
+ /* Implements svqdec[bhwd]{,_pat}.  */
+ class svqdec_bhwd_impl : public svqdec_svqinc_bhwd_impl
+ {
+ public:
+   CONSTEXPR svqdec_bhwd_impl (scalar_int_mode elem_mode)
+     : svqdec_svqinc_bhwd_impl (SS_MINUS, US_MINUS, elem_mode) {}
+ };
+ 
+ /* Implements svqinc[bhwd]{,_pat}.  */
+ class svqinc_bhwd_impl : public svqdec_svqinc_bhwd_impl
+ {
+ public:
+   CONSTEXPR svqinc_bhwd_impl (scalar_int_mode elem_mode)
+     : svqdec_svqinc_bhwd_impl (SS_PLUS, US_PLUS, elem_mode) {}
+ };
+ 
+ /* Implements svqdecp and svqincp.  */
+ class svqdecp_svqincp_impl : public function_base
+ {
+ public:
+   CONSTEXPR svqdecp_svqincp_impl (rtx_code code_for_sint,
+ 				  rtx_code code_for_uint)
+     : m_code_for_sint (code_for_sint),
+       m_code_for_uint (code_for_uint)
+   {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     rtx_code code = (e.type_suffix (0).unsigned_p
+ 		     ? m_code_for_uint
+ 		     : m_code_for_sint);
+     insn_code icode;
+     if (e.mode_suffix_id == MODE_n)
+       {
+ 	/* Increment or decrement a scalar (whose mode is given by the first
+ 	   type suffix) by the number of active elements in a predicate
+ 	   (whose mode is given by the second type suffix).  */
+ 	machine_mode mode = GET_MODE_INNER (e.vector_mode (0));
+ 	icode = code_for_aarch64_sve_cntp (code, mode, e.vector_mode (1));
+       }
+     else
+       /* Increment a vector by the number of active elements in a predicate,
+ 	 with the vector mode determining the predicate mode.  */
+       icode = code_for_aarch64_sve_cntp (code, e.vector_mode (0));
+     return e.use_exact_insn (icode);
+   }
+ 
+   /* The saturating addition or subtraction codes to use for signed and
+      unsigned values respectively.  */
+   rtx_code m_code_for_sint;
+   rtx_code m_code_for_uint;
+ };
+ 
+ class svrdffr_impl : public function_base
+ {
+ public:
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_READ_FFR;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* See the block comment in aarch64-sve.md for details about the
+        FFR handling.  */
+     emit_insn (gen_aarch64_copy_ffr_to_ffrt ());
+     rtx result = e.use_exact_insn (e.pred == PRED_z
+ 				   ? CODE_FOR_aarch64_rdffr_z
+ 				   : CODE_FOR_aarch64_rdffr);
+     emit_insn (gen_aarch64_update_ffrt ());
+     return result;
+   }
+ };
+ 
+ class svreinterpret_impl : public quiet<function_base>
+ {
+ public:
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     /* Punt to rtl if the effect of the reinterpret on registers does not
+        conform to GCC's endianness model.  */
+     if (!targetm.can_change_mode_class (f.vector_mode (0),
+ 					f.vector_mode (1), FP_REGS))
+       return NULL;
+ 
+     /* Otherwise svreinterpret corresponds directly to a VIEW_CONVERT_EXPR
+        reinterpretation.  */
+     tree rhs = build1 (VIEW_CONVERT_EXPR, TREE_TYPE (f.lhs),
+ 		       gimple_call_arg (f.call, 0));
+     return gimple_build_assign (f.lhs, VIEW_CONVERT_EXPR, rhs);
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = e.vector_mode (0);
+     return e.use_exact_insn (code_for_aarch64_sve_reinterpret (mode));
+   }
+ };
+ 
+ class svrev_impl : public permute
+ {
+ public:
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     /* Punt for now on _b16 and wider; we'd need more complex evpc logic
+        to rerecognize the result.  */
+     if (f.type_suffix (0).bool_p && f.type_suffix (0).element_bits > 8)
+       return NULL;
+ 
+     /* Permute as { nelts - 1, nelts - 2, nelts - 3, ... }.  */
+     poly_int64 nelts = TYPE_VECTOR_SUBPARTS (TREE_TYPE (f.lhs));
+     vec_perm_builder builder (nelts, 1, 3);
+     for (int i = 0; i < 3; ++i)
+       builder.quick_push (nelts - i - 1);
+     return fold_permute (f, builder);
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return e.use_exact_insn (code_for_aarch64_sve_rev (e.vector_mode (0)));
+   }
+ };
+ 
+ class svsel_impl : public quiet<function_base>
+ {
+ public:
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     /* svsel corresponds exactly to VEC_COND_EXPR.  */
+     gimple_seq stmts = NULL;
+     tree pred = f.convert_pred (stmts, f.vector_type (0), 0);
+     gsi_insert_seq_before (f.gsi, stmts, GSI_SAME_STMT);
+     return gimple_build_assign (f.lhs, VEC_COND_EXPR, pred,
+ 				gimple_call_arg (f.call, 1),
+ 				gimple_call_arg (f.call, 2));
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* svsel (cond, truev, falsev) is vcond_mask (truev, falsev, cond).  */
+     e.rotate_inputs_left (0, 3);
+     insn_code icode = convert_optab_handler (vcond_mask_optab,
+ 					     e.vector_mode (0),
+ 					     e.gp_mode (0));
+     return e.use_exact_insn (icode);
+   }
+ };
+ 
+ /* Implements svset2, svset3 and svset4.  */
+ class svset_impl : public quiet<multi_vector_function>
+ {
+ public:
+   CONSTEXPR svset_impl (unsigned int vectors_per_tuple)
+     : quiet<multi_vector_function> (vectors_per_tuple) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     tree rhs_tuple = gimple_call_arg (f.call, 0);
+     tree index = gimple_call_arg (f.call, 1);
+     tree rhs_vector = gimple_call_arg (f.call, 2);
+ 
+     /* Replace the call with two statements: a copy of the full tuple
+        to the call result, followed by an update of the individual vector.
+ 
+        The fold routines expect the replacement statement to have the
+        same lhs as the original call, so return the copy statement
+        rather than the field update.  */
+     gassign *copy = gimple_build_assign (unshare_expr (f.lhs), rhs_tuple);
+ 
+     /* Get a reference to the individual vector.  */
+     tree field = tuple_type_field (TREE_TYPE (f.lhs));
+     tree lhs_array = build3 (COMPONENT_REF, TREE_TYPE (field),
+ 			     f.lhs, field, NULL_TREE);
+     tree lhs_vector = build4 (ARRAY_REF, TREE_TYPE (rhs_vector),
+ 			      lhs_array, index, NULL_TREE, NULL_TREE);
+     gassign *update = gimple_build_assign (lhs_vector, rhs_vector);
+     gsi_insert_after (f.gsi, update, GSI_SAME_STMT);
+ 
+     return copy;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     rtx rhs_tuple = e.args[0];
+     unsigned int index = INTVAL (e.args[1]);
+     rtx rhs_vector = e.args[2];
+ 
+     /* First copy the full tuple to the target register.  */
+     rtx lhs_tuple = e.get_nonoverlapping_reg_target ();
+     emit_move_insn (lhs_tuple, rhs_tuple);
+ 
+     /* ...then update the individual vector.  */
+     rtx lhs_vector = simplify_gen_subreg (GET_MODE (rhs_vector),
+ 					  lhs_tuple, GET_MODE (lhs_tuple),
+ 					  index * BYTES_PER_SVE_VECTOR);
+     emit_move_insn (lhs_vector, rhs_vector);
+     return lhs_vector;
+   }
+ };
+ 
+ class svsetffr_impl : public function_base
+ {
+ public:
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_WRITE_FFR;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.args.quick_push (CONSTM1_RTX (VNx16BImode));
+     return e.use_exact_insn (CODE_FOR_aarch64_wrffr);
+   }
+ };
+ 
+ class svst1_impl : public full_width_access
+ {
+ public:
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_WRITE_MEMORY;
+   }
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     tree vectype = f.vector_type (0);
+ 
+     /* Get the predicate and base pointer.  */
+     gimple_seq stmts = NULL;
+     tree pred = f.convert_pred (stmts, vectype, 0);
+     tree base = f.fold_contiguous_base (stmts, vectype);
+     gsi_insert_seq_before (f.gsi, stmts, GSI_SAME_STMT);
+ 
+     tree cookie = f.load_store_cookie (TREE_TYPE (vectype));
+     tree rhs = gimple_call_arg (f.call, gimple_call_num_args (f.call) - 1);
+     return gimple_build_call_internal (IFN_MASK_STORE, 4,
+ 				       base, cookie, pred, rhs);
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     insn_code icode = convert_optab_handler (maskstore_optab,
+ 					     e.vector_mode (0), e.gp_mode (0));
+     return e.use_contiguous_store_insn (icode);
+   }
+ };
+ 
+ class svst1_scatter_impl : public full_width_access
+ {
+ public:
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_WRITE_MEMORY;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.prepare_gather_address_operands (1);
+     /* Put the predicate last, as required by mask_scatter_store_optab.  */
+     e.rotate_inputs_left (0, 6);
+     machine_mode mem_mode = e.memory_vector_mode ();
+     machine_mode int_mode = aarch64_sve_int_mode (mem_mode);
+     insn_code icode = convert_optab_handler (mask_scatter_store_optab,
+ 					     mem_mode, int_mode);
+     return e.use_exact_insn (icode);
+   }
+ };
+ 
+ /* Implements truncating forms of svst1_scatter.  */
+ class svst1_scatter_truncate_impl : public truncating_store
+ {
+ public:
+   CONSTEXPR svst1_scatter_truncate_impl (scalar_int_mode to_mode)
+     : truncating_store (to_mode) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.prepare_gather_address_operands (1);
+     /* Put the predicate last, since the truncating scatters use the same
+        operand order as mask_scatter_store_optab.  */
+     e.rotate_inputs_left (0, 6);
+     insn_code icode = code_for_aarch64_scatter_store_trunc
+       (e.memory_vector_mode (), e.vector_mode (0));
+     return e.use_exact_insn (icode);
+   }
+ };
+ 
+ /* Implements truncating contiguous forms of svst1.  */
+ class svst1_truncate_impl : public truncating_store
+ {
+ public:
+   CONSTEXPR svst1_truncate_impl (scalar_int_mode to_mode)
+     : truncating_store (to_mode) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     insn_code icode = code_for_aarch64_store_trunc (e.memory_vector_mode (),
+ 						    e.vector_mode (0));
+     return e.use_contiguous_store_insn (icode);
+   }
+ };
+ 
+ /* Implements svst2, svst3 and svst4.  */
+ class svst234_impl : public full_width_access
+ {
+ public:
+   CONSTEXPR svst234_impl (unsigned int vectors_per_tuple)
+     : full_width_access (vectors_per_tuple) {}
+ 
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_WRITE_MEMORY;
+   }
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     tree vectype = f.vector_type (0);
+ 
+     /* Get the predicate and base pointer.  */
+     gimple_seq stmts = NULL;
+     tree pred = f.convert_pred (stmts, vectype, 0);
+     tree base = f.fold_contiguous_base (stmts, vectype);
+     gsi_insert_seq_before (f.gsi, stmts, GSI_SAME_STMT);
+ 
+     /* View the stored data as an array of vectors.  */
+     unsigned int num_args = gimple_call_num_args (f.call);
+     tree rhs_tuple = gimple_call_arg (f.call, num_args - 1);
+     tree field = tuple_type_field (TREE_TYPE (rhs_tuple));
+     tree rhs_array = build1 (VIEW_CONVERT_EXPR, TREE_TYPE (field), rhs_tuple);
+ 
+     tree cookie = f.load_store_cookie (TREE_TYPE (vectype));
+     return gimple_build_call_internal (IFN_MASK_STORE_LANES, 4,
+ 				       base, cookie, pred, rhs_array);
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode tuple_mode = GET_MODE (e.args.last ());
+     insn_code icode = convert_optab_handler (vec_mask_store_lanes_optab,
+ 					     tuple_mode, e.vector_mode (0));
+     return e.use_contiguous_store_insn (icode);
+   }
+ };
+ 
+ class svstnt1_impl : public full_width_access
+ {
+ public:
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_WRITE_MEMORY;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     insn_code icode = code_for_aarch64_stnt1 (e.vector_mode (0));
+     return e.use_contiguous_store_insn (icode);
+   }
+ };
+ 
+ class svsub_impl : public rtx_code_function
+ {
+ public:
+   CONSTEXPR svsub_impl ()
+     : rtx_code_function (MINUS, MINUS, UNSPEC_COND_FSUB) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Canonicalize subtractions of constants to additions.  */
+     machine_mode mode = e.vector_mode (0);
+     if (e.try_negating_argument (2, mode))
+       return e.map_to_rtx_codes (PLUS, PLUS, UNSPEC_COND_FADD);
+ 
+     return rtx_code_function::expand (e);
+   }
+ };
+ 
+ class svtbl_impl : public permute
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return e.use_exact_insn (code_for_aarch64_sve_tbl (e.vector_mode (0)));
+   }
+ };
+ 
+ /* Implements svtrn1 and svtrn2.  */
+ class svtrn_impl : public binary_permute
+ {
+ public:
+   CONSTEXPR svtrn_impl (int base)
+     : binary_permute (base ? UNSPEC_TRN2 : UNSPEC_TRN1), m_base (base) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     /* svtrn1: { 0, nelts, 2, nelts + 2, 4, nelts + 4, ... }
+        svtrn2: as for svtrn1, but with 1 added to each index.  */
+     poly_uint64 nelts = TYPE_VECTOR_SUBPARTS (TREE_TYPE (f.lhs));
+     vec_perm_builder builder (nelts, 2, 3);
+     for (unsigned int i = 0; i < 3; ++i)
+       {
+ 	builder.quick_push (m_base + i * 2);
+ 	builder.quick_push (m_base + i * 2 + nelts);
+       }
+     return fold_permute (f, builder);
+   }
+ 
+   /* 0 for svtrn1, 1 for svtrn2.  */
+   unsigned int m_base;
+ };
+ 
+ /* Base class for svundef{,2,3,4}.  */
+ class svundef_impl : public quiet<multi_vector_function>
+ {
+ public:
+   CONSTEXPR svundef_impl (unsigned int vectors_per_tuple)
+     : quiet<multi_vector_function> (vectors_per_tuple) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     /* Don't fold svundef at the gimple level.  There's no exact
+        correspondence for SSA_NAMEs, and we explicitly don't want
+        to generate a specific value (like an all-zeros vector).  */
+     if (vectors_per_tuple () == 1)
+       return NULL;
+     return gimple_build_assign (f.lhs, build_clobber (TREE_TYPE (f.lhs)));
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     rtx target = e.get_reg_target ();
+     emit_clobber (copy_rtx (target));
+     return target;
+   }
+ };
+ 
+ /* Implements svunpklo and svunpkhi.  */
+ class svunpk_impl : public quiet<function_base>
+ {
+ public:
+   CONSTEXPR svunpk_impl (bool high_p) : m_high_p (high_p) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     /* Don't fold the predicate ops, since every bit of the svbool_t
+        result is significant.  */
+     if (f.type_suffix_ids[0] == TYPE_SUFFIX_b)
+       return NULL;
+ 
+     /* The first half in memory is VEC_UNPACK_LO_EXPR for little-endian
+        and VEC_UNPACK_HI_EXPR for big-endian.  */
+     bool high_p = BYTES_BIG_ENDIAN ? !m_high_p : m_high_p;
+     tree_code code = high_p ? VEC_UNPACK_HI_EXPR : VEC_UNPACK_LO_EXPR;
+     return gimple_build_assign (f.lhs, code, gimple_call_arg (f.call, 0));
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = GET_MODE (e.args[0]);
+     unsigned int unpacku = m_high_p ? UNSPEC_UNPACKUHI : UNSPEC_UNPACKULO;
+     unsigned int unpacks = m_high_p ? UNSPEC_UNPACKSHI : UNSPEC_UNPACKSLO;
+     insn_code icode;
+     if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL)
+       icode = code_for_aarch64_sve_punpk (unpacku, mode);
+     else
+       {
+ 	int unspec = e.type_suffix (0).unsigned_p ? unpacku : unpacks;
+ 	icode = code_for_aarch64_sve_unpk (unspec, unspec, mode);
+       }
+     return e.use_exact_insn (icode);
+   }
+ 
+   /* True for svunpkhi, false for svunpklo.  */
+   bool m_high_p;
+ };
+ 
+ /* Also implements svsudot.  */
+ class svusdot_impl : public function_base
+ {
+ public:
+   CONSTEXPR svusdot_impl (bool su) : m_su (su) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* The implementation of the ACLE function svsudot (for the non-lane
+        version) is through the USDOT instruction but with the second and third
+        inputs swapped.  */
+     if (m_su)
+       e.rotate_inputs_left (1, 2);
+     /* The ACLE function has the same order requirements as for svdot.
+        While there's no requirement for the RTL pattern to have the same sort
+        of order as that for <sur>dot_prod, it's easier to read.
+        Hence we do the same rotation on arguments as svdot_impl does.  */
+     e.rotate_inputs_left (0, 3);
+     machine_mode mode = e.vector_mode (0);
+     insn_code icode = code_for_aarch64_dot_prod (UNSPEC_USDOT, mode);
+     return e.use_exact_insn (icode);
+   }
+ 
+ private:
+   bool m_su;
+ };
+ 
+ /* Implements svuzp1 and svuzp2.  */
+ class svuzp_impl : public binary_permute
+ {
+ public:
+   CONSTEXPR svuzp_impl (unsigned int base)
+     : binary_permute (base ? UNSPEC_UZP2 : UNSPEC_UZP1), m_base (base) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     /* svuzp1: { 0, 2, 4, 6, ... }
+        svuzp2: { 1, 3, 5, 7, ... }.  */
+     poly_uint64 nelts = TYPE_VECTOR_SUBPARTS (TREE_TYPE (f.lhs));
+     vec_perm_builder builder (nelts, 1, 3);
+     for (unsigned int i = 0; i < 3; ++i)
+       builder.quick_push (m_base + i * 2);
+     return fold_permute (f, builder);
+   }
+ 
+   /* 0 for svuzp1, 1 for svuzp2.  */
+   unsigned int m_base;
+ };
+ 
+ /* A function_base for svwhilele and svwhilelt functions.  */
+ class svwhilelx_impl : public while_comparison
+ {
+ public:
+   CONSTEXPR svwhilelx_impl (int unspec_for_sint, int unspec_for_uint, bool eq_p)
+     : while_comparison (unspec_for_sint, unspec_for_uint), m_eq_p (eq_p)
+   {}
+ 
+   /* Try to fold a call by treating its arguments as constants of type T.  */
+   template<typename T>
+   gimple *
+   fold_type (gimple_folder &f) const
+   {
+     /* Only handle cases in which both operands are constant.  */
+     T arg0, arg1;
+     if (!poly_int_tree_p (gimple_call_arg (f.call, 0), &arg0)
+ 	|| !poly_int_tree_p (gimple_call_arg (f.call, 1), &arg1))
+       return NULL;
+ 
+     /* Check whether the result is known to be all-false.  */
+     if (m_eq_p ? known_gt (arg0, arg1) : known_ge (arg0, arg1))
+       return f.fold_to_pfalse ();
+ 
+     /* Punt if we can't tell at compile time whether the result
+        is all-false.  */
+     if (m_eq_p ? maybe_gt (arg0, arg1) : maybe_ge (arg0, arg1))
+       return NULL;
+ 
+     /* At this point we know the result has at least one set element.  */
+     poly_uint64 diff = arg1 - arg0;
+     poly_uint64 nelts = GET_MODE_NUNITS (f.vector_mode (0));
+ 
+     /* Canonicalize the svwhilele form to the svwhilelt form.  Subtract
+        from NELTS rather than adding to DIFF, to prevent overflow.  */
+     if (m_eq_p)
+       nelts -= 1;
+ 
+     /* Check whether the result is known to be all-true.  */
+     if (known_ge (diff, nelts))
+       return f.fold_to_ptrue ();
+ 
+     /* Punt if DIFF might not be the actual number of set elements
+        in the result.  Conditional equality is fine.  */
+     if (maybe_gt (diff, nelts))
+       return NULL;
+ 
+     /* At this point we know that the predicate will have DIFF set elements
+        for svwhilelt and DIFF + 1 set elements for svwhilele (which stops
+        after rather than before ARG1 is reached).  See if we can create
+        the predicate at compile time.  */
+     unsigned HOST_WIDE_INT vl;
+     if (diff.is_constant (&vl))
+       /* Overflow is no longer possible after the checks above.  */
+       return f.fold_to_vl_pred (m_eq_p ? vl + 1 : vl);
+ 
+     return NULL;
+   }
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     if (f.type_suffix (1).unsigned_p)
+       return fold_type<poly_uint64> (f);
+     else
+       return fold_type<poly_int64> (f);
+   }
+ 
+   /* True svwhilele, false for svwhilelt.  */
+   bool m_eq_p;
+ };
+ 
+ class svwrffr_impl : public function_base
+ {
+ public:
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_WRITE_FFR;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return e.use_exact_insn (CODE_FOR_aarch64_wrffr);
+   }
+ };
+ 
+ /* Implements svzip1 and svzip2.  */
+ class svzip_impl : public binary_permute
+ {
+ public:
+   CONSTEXPR svzip_impl (unsigned int base)
+     : binary_permute (base ? UNSPEC_ZIP2 : UNSPEC_ZIP1), m_base (base) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     /* svzip1: { 0, nelts, 1, nelts + 1, 2, nelts + 2, ... }
+        svzip2: as for svzip1, but with nelts / 2 added to each index.  */
+     poly_uint64 nelts = TYPE_VECTOR_SUBPARTS (TREE_TYPE (f.lhs));
+     poly_uint64 base = m_base * exact_div (nelts, 2);
+     vec_perm_builder builder (nelts, 2, 3);
+     for (unsigned int i = 0; i < 3; ++i)
+       {
+ 	builder.quick_push (base + i);
+ 	builder.quick_push (base + i + nelts);
+       }
+     return fold_permute (f, builder);
+   }
+ 
+   /* 0 for svzip1, 1 for svzip2.  */
+   unsigned int m_base;
+ };
+ 
+ } /* end anonymous namespace */
+ 
+ namespace aarch64_sve {
+ 
+ FUNCTION (svabd, svabd_impl,)
+ FUNCTION (svabs, quiet<rtx_code_function>, (ABS, ABS, UNSPEC_COND_FABS))
+ FUNCTION (svacge, svac_impl, (UNSPEC_COND_FCMGE))
+ FUNCTION (svacgt, svac_impl, (UNSPEC_COND_FCMGT))
+ FUNCTION (svacle, svac_impl, (UNSPEC_COND_FCMLE))
+ FUNCTION (svaclt, svac_impl, (UNSPEC_COND_FCMLT))
+ FUNCTION (svadd, rtx_code_function, (PLUS, PLUS, UNSPEC_COND_FADD))
+ FUNCTION (svadda, svadda_impl,)
+ FUNCTION (svaddv, reduction, (UNSPEC_SADDV, UNSPEC_UADDV, UNSPEC_FADDV))
+ FUNCTION (svadrb, svadr_bhwd_impl, (0))
+ FUNCTION (svadrd, svadr_bhwd_impl, (3))
+ FUNCTION (svadrh, svadr_bhwd_impl, (1))
+ FUNCTION (svadrw, svadr_bhwd_impl, (2))
+ FUNCTION (svand, rtx_code_function, (AND, AND))
+ FUNCTION (svandv, reduction, (UNSPEC_ANDV))
+ FUNCTION (svasr, rtx_code_function, (ASHIFTRT, ASHIFTRT))
+ FUNCTION (svasr_wide, shift_wide, (ASHIFTRT, UNSPEC_ASHIFTRT_WIDE))
+ FUNCTION (svasrd, unspec_based_function, (UNSPEC_ASRD, -1, -1))
+ FUNCTION (svbfdot, fixed_insn_function, (CODE_FOR_aarch64_sve_bfdotvnx4sf))
+ FUNCTION (svbfdot_lane, fixed_insn_function,
+ 	  (CODE_FOR_aarch64_sve_bfdot_lanevnx4sf))
+ FUNCTION (svbfmlalb, fixed_insn_function, (CODE_FOR_aarch64_sve_bfmlalbvnx4sf))
+ FUNCTION (svbfmlalb_lane, fixed_insn_function,
+ 	  (CODE_FOR_aarch64_sve_bfmlalb_lanevnx4sf))
+ FUNCTION (svbfmlalt, fixed_insn_function, (CODE_FOR_aarch64_sve_bfmlaltvnx4sf))
+ FUNCTION (svbfmlalt_lane, fixed_insn_function,
+ 	  (CODE_FOR_aarch64_sve_bfmlalt_lanevnx4sf))
+ FUNCTION (svbfmmla, fixed_insn_function, (CODE_FOR_aarch64_sve_bfmmlavnx4sf))
+ FUNCTION (svbic, svbic_impl,)
+ FUNCTION (svbrka, svbrk_unary_impl, (UNSPEC_BRKA))
+ FUNCTION (svbrkb, svbrk_unary_impl, (UNSPEC_BRKB))
+ FUNCTION (svbrkn, svbrk_binary_impl, (UNSPEC_BRKN))
+ FUNCTION (svbrkpa, svbrk_binary_impl, (UNSPEC_BRKPA))
+ FUNCTION (svbrkpb, svbrk_binary_impl, (UNSPEC_BRKPB))
+ FUNCTION (svcadd, svcadd_impl,)
+ FUNCTION (svclasta, svclast_impl, (UNSPEC_CLASTA))
+ FUNCTION (svclastb, svclast_impl, (UNSPEC_CLASTB))
+ FUNCTION (svcls, unary_count, (CLRSB))
+ FUNCTION (svclz, unary_count, (CLZ))
+ FUNCTION (svcmla, svcmla_impl,)
+ FUNCTION (svcmla_lane, svcmla_lane_impl,)
+ FUNCTION (svcmpeq, svcmp_impl, (EQ_EXPR, UNSPEC_COND_FCMEQ))
+ FUNCTION (svcmpeq_wide, svcmp_wide_impl, (EQ_EXPR, UNSPEC_COND_CMPEQ_WIDE,
+ 					  UNSPEC_COND_CMPEQ_WIDE))
+ FUNCTION (svcmpge, svcmp_impl, (GE_EXPR, UNSPEC_COND_FCMGE))
+ FUNCTION (svcmpge_wide, svcmp_wide_impl, (GE_EXPR, UNSPEC_COND_CMPGE_WIDE,
+ 					  UNSPEC_COND_CMPHS_WIDE))
+ FUNCTION (svcmpgt, svcmp_impl, (GT_EXPR, UNSPEC_COND_FCMGT))
+ FUNCTION (svcmpgt_wide, svcmp_wide_impl, (GT_EXPR, UNSPEC_COND_CMPGT_WIDE,
+ 					  UNSPEC_COND_CMPHI_WIDE))
+ FUNCTION (svcmple, svcmp_impl, (LE_EXPR, UNSPEC_COND_FCMLE))
+ FUNCTION (svcmple_wide, svcmp_wide_impl, (LE_EXPR, UNSPEC_COND_CMPLE_WIDE,
+ 					  UNSPEC_COND_CMPLS_WIDE))
+ FUNCTION (svcmplt, svcmp_impl, (LT_EXPR, UNSPEC_COND_FCMLT))
+ FUNCTION (svcmplt_wide, svcmp_wide_impl, (LT_EXPR, UNSPEC_COND_CMPLT_WIDE,
+ 					  UNSPEC_COND_CMPLO_WIDE))
+ FUNCTION (svcmpne, svcmp_impl, (NE_EXPR, UNSPEC_COND_FCMNE))
+ FUNCTION (svcmpne_wide, svcmp_wide_impl, (NE_EXPR, UNSPEC_COND_CMPNE_WIDE,
+ 					  UNSPEC_COND_CMPNE_WIDE))
+ FUNCTION (svcmpuo, svcmpuo_impl,)
+ FUNCTION (svcnot, svcnot_impl,)
+ FUNCTION (svcnt, unary_count, (POPCOUNT))
+ FUNCTION (svcntb, svcnt_bhwd_impl, (VNx16QImode))
+ FUNCTION (svcntb_pat, svcnt_bhwd_pat_impl, (VNx16QImode))
+ FUNCTION (svcntd, svcnt_bhwd_impl, (VNx2DImode))
+ FUNCTION (svcntd_pat, svcnt_bhwd_pat_impl, (VNx2DImode))
+ FUNCTION (svcnth, svcnt_bhwd_impl, (VNx8HImode))
+ FUNCTION (svcnth_pat, svcnt_bhwd_pat_impl, (VNx8HImode))
+ FUNCTION (svcntp, svcntp_impl,)
+ FUNCTION (svcntw, svcnt_bhwd_impl, (VNx4SImode))
+ FUNCTION (svcntw_pat, svcnt_bhwd_pat_impl, (VNx4SImode))
+ FUNCTION (svcompact, QUIET_CODE_FOR_MODE0 (aarch64_sve_compact),)
+ FUNCTION (svcreate2, svcreate_impl, (2))
+ FUNCTION (svcreate3, svcreate_impl, (3))
+ FUNCTION (svcreate4, svcreate_impl, (4))
+ FUNCTION (svcvt, svcvt_impl,)
+ FUNCTION (svcvtnt, CODE_FOR_MODE0 (aarch64_sve_cvtnt),)
+ FUNCTION (svdiv, rtx_code_function, (DIV, UDIV, UNSPEC_COND_FDIV))
+ FUNCTION (svdivr, rtx_code_function_rotated, (DIV, UDIV, UNSPEC_COND_FDIV))
+ FUNCTION (svdot, svdot_impl,)
+ FUNCTION (svdot_lane, svdotprod_lane_impl, (UNSPEC_SDOT, UNSPEC_UDOT, -1))
+ FUNCTION (svdup, svdup_impl,)
+ FUNCTION (svdup_lane, svdup_lane_impl,)
+ FUNCTION (svdupq, svdupq_impl,)
+ FUNCTION (svdupq_lane, svdupq_lane_impl,)
+ FUNCTION (sveor, rtx_code_function, (XOR, XOR, -1))
+ FUNCTION (sveorv, reduction, (UNSPEC_XORV))
+ FUNCTION (svexpa, unspec_based_function, (-1, -1, UNSPEC_FEXPA))
+ FUNCTION (svext, QUIET_CODE_FOR_MODE0 (aarch64_sve_ext),)
+ FUNCTION (svextb, svext_bhw_impl, (QImode))
+ FUNCTION (svexth, svext_bhw_impl, (HImode))
+ FUNCTION (svextw, svext_bhw_impl, (SImode))
+ FUNCTION (svget2, svget_impl, (2))
+ FUNCTION (svget3, svget_impl, (3))
+ FUNCTION (svget4, svget_impl, (4))
+ FUNCTION (svindex, svindex_impl,)
+ FUNCTION (svinsr, svinsr_impl,)
+ FUNCTION (svlasta, svlast_impl, (UNSPEC_LASTA))
+ FUNCTION (svlastb, svlast_impl, (UNSPEC_LASTB))
+ FUNCTION (svld1, svld1_impl,)
+ FUNCTION (svld1_gather, svld1_gather_impl,)
+ FUNCTION (svld1ro, svld1ro_impl,)
+ FUNCTION (svld1rq, svld1rq_impl,)
+ FUNCTION (svld1sb, svld1_extend_impl, (TYPE_SUFFIX_s8))
+ FUNCTION (svld1sb_gather, svld1_gather_extend_impl, (TYPE_SUFFIX_s8))
+ FUNCTION (svld1sh, svld1_extend_impl, (TYPE_SUFFIX_s16))
+ FUNCTION (svld1sh_gather, svld1_gather_extend_impl, (TYPE_SUFFIX_s16))
+ FUNCTION (svld1sw, svld1_extend_impl, (TYPE_SUFFIX_s32))
+ FUNCTION (svld1sw_gather, svld1_gather_extend_impl, (TYPE_SUFFIX_s32))
+ FUNCTION (svld1ub, svld1_extend_impl, (TYPE_SUFFIX_u8))
+ FUNCTION (svld1ub_gather, svld1_gather_extend_impl, (TYPE_SUFFIX_u8))
+ FUNCTION (svld1uh, svld1_extend_impl, (TYPE_SUFFIX_u16))
+ FUNCTION (svld1uh_gather, svld1_gather_extend_impl, (TYPE_SUFFIX_u16))
+ FUNCTION (svld1uw, svld1_extend_impl, (TYPE_SUFFIX_u32))
+ FUNCTION (svld1uw_gather, svld1_gather_extend_impl, (TYPE_SUFFIX_u32))
+ FUNCTION (svld2, svld234_impl, (2))
+ FUNCTION (svld3, svld234_impl, (3))
+ FUNCTION (svld4, svld234_impl, (4))
+ FUNCTION (svldff1, svldxf1_impl, (UNSPEC_LDFF1))
+ FUNCTION (svldff1_gather, svldff1_gather_impl,)
+ FUNCTION (svldff1sb, svldxf1_extend_impl, (TYPE_SUFFIX_s8, UNSPEC_LDFF1))
+ FUNCTION (svldff1sb_gather, svldff1_gather_extend, (TYPE_SUFFIX_s8))
+ FUNCTION (svldff1sh, svldxf1_extend_impl, (TYPE_SUFFIX_s16, UNSPEC_LDFF1))
+ FUNCTION (svldff1sh_gather, svldff1_gather_extend, (TYPE_SUFFIX_s16))
+ FUNCTION (svldff1sw, svldxf1_extend_impl, (TYPE_SUFFIX_s32, UNSPEC_LDFF1))
+ FUNCTION (svldff1sw_gather, svldff1_gather_extend, (TYPE_SUFFIX_s32))
+ FUNCTION (svldff1ub, svldxf1_extend_impl, (TYPE_SUFFIX_u8, UNSPEC_LDFF1))
+ FUNCTION (svldff1ub_gather, svldff1_gather_extend, (TYPE_SUFFIX_u8))
+ FUNCTION (svldff1uh, svldxf1_extend_impl, (TYPE_SUFFIX_u16, UNSPEC_LDFF1))
+ FUNCTION (svldff1uh_gather, svldff1_gather_extend, (TYPE_SUFFIX_u16))
+ FUNCTION (svldff1uw, svldxf1_extend_impl, (TYPE_SUFFIX_u32, UNSPEC_LDFF1))
+ FUNCTION (svldff1uw_gather, svldff1_gather_extend, (TYPE_SUFFIX_u32))
+ FUNCTION (svldnf1, svldxf1_impl, (UNSPEC_LDNF1))
+ FUNCTION (svldnf1sb, svldxf1_extend_impl, (TYPE_SUFFIX_s8, UNSPEC_LDNF1))
+ FUNCTION (svldnf1sh, svldxf1_extend_impl, (TYPE_SUFFIX_s16, UNSPEC_LDNF1))
+ FUNCTION (svldnf1sw, svldxf1_extend_impl, (TYPE_SUFFIX_s32, UNSPEC_LDNF1))
+ FUNCTION (svldnf1ub, svldxf1_extend_impl, (TYPE_SUFFIX_u8, UNSPEC_LDNF1))
+ FUNCTION (svldnf1uh, svldxf1_extend_impl, (TYPE_SUFFIX_u16, UNSPEC_LDNF1))
+ FUNCTION (svldnf1uw, svldxf1_extend_impl, (TYPE_SUFFIX_u32, UNSPEC_LDNF1))
+ FUNCTION (svldnt1, svldnt1_impl,)
+ FUNCTION (svlen, svlen_impl,)
+ FUNCTION (svlsl, rtx_code_function, (ASHIFT, ASHIFT))
+ FUNCTION (svlsl_wide, shift_wide, (ASHIFT, UNSPEC_ASHIFT_WIDE))
+ FUNCTION (svlsr, rtx_code_function, (LSHIFTRT, LSHIFTRT))
+ FUNCTION (svlsr_wide, shift_wide, (LSHIFTRT, UNSPEC_LSHIFTRT_WIDE))
+ FUNCTION (svmad, svmad_impl,)
+ FUNCTION (svmax, rtx_code_function, (SMAX, UMAX, UNSPEC_COND_FMAX))
+ FUNCTION (svmaxnm, unspec_based_function, (-1, -1, UNSPEC_COND_FMAXNM))
+ FUNCTION (svmaxnmv, reduction, (UNSPEC_FMAXNMV))
+ FUNCTION (svmaxv, reduction, (UNSPEC_SMAXV, UNSPEC_UMAXV, UNSPEC_FMAXV))
+ FUNCTION (svmin, rtx_code_function, (SMIN, UMIN, UNSPEC_COND_FMIN))
+ FUNCTION (svminnm, unspec_based_function, (-1, -1, UNSPEC_COND_FMINNM))
+ FUNCTION (svminnmv, reduction, (UNSPEC_FMINNMV))
+ FUNCTION (svminv, reduction, (UNSPEC_SMINV, UNSPEC_UMINV, UNSPEC_FMINV))
+ FUNCTION (svmla, svmla_impl,)
+ FUNCTION (svmla_lane, svmla_lane_impl,)
+ FUNCTION (svmls, svmls_impl,)
+ FUNCTION (svmls_lane, svmls_lane_impl,)
+ FUNCTION (svmmla, svmmla_impl,)
+ FUNCTION (svmov, svmov_impl,)
+ FUNCTION (svmsb, svmsb_impl,)
+ FUNCTION (svmul, rtx_code_function, (MULT, MULT, UNSPEC_COND_FMUL))
+ FUNCTION (svmul_lane, CODE_FOR_MODE0 (aarch64_mul_lane),)
+ FUNCTION (svmulh, unspec_based_function, (UNSPEC_SMUL_HIGHPART,
+ 					  UNSPEC_UMUL_HIGHPART, -1))
+ FUNCTION (svmulx, unspec_based_function, (-1, -1, UNSPEC_COND_FMULX))
+ FUNCTION (svnand, svnand_impl,)
+ FUNCTION (svneg, quiet<rtx_code_function>, (NEG, NEG, UNSPEC_COND_FNEG))
+ FUNCTION (svnmad, unspec_based_function, (-1, -1, UNSPEC_COND_FNMLA))
+ FUNCTION (svnmla, unspec_based_function_rotated, (-1, -1, UNSPEC_COND_FNMLA))
+ FUNCTION (svnmls, unspec_based_function_rotated, (-1, -1, UNSPEC_COND_FNMLS))
+ FUNCTION (svnmsb, unspec_based_function, (-1, -1, UNSPEC_COND_FNMLS))
+ FUNCTION (svnor, svnor_impl,)
+ FUNCTION (svnot, svnot_impl,)
+ FUNCTION (svorn, svorn_impl,)
+ FUNCTION (svorr, rtx_code_function, (IOR, IOR))
+ FUNCTION (svorv, reduction, (UNSPEC_IORV))
+ FUNCTION (svpfalse, svpfalse_impl,)
+ FUNCTION (svpfirst, svpfirst_svpnext_impl, (UNSPEC_PFIRST))
+ FUNCTION (svpnext, svpfirst_svpnext_impl, (UNSPEC_PNEXT))
+ FUNCTION (svprfb, svprf_bhwd_impl, (VNx16QImode))
+ FUNCTION (svprfb_gather, svprf_bhwd_gather_impl, (VNx16QImode))
+ FUNCTION (svprfd, svprf_bhwd_impl, (VNx2DImode))
+ FUNCTION (svprfd_gather, svprf_bhwd_gather_impl, (VNx2DImode))
+ FUNCTION (svprfh, svprf_bhwd_impl, (VNx8HImode))
+ FUNCTION (svprfh_gather, svprf_bhwd_gather_impl, (VNx8HImode))
+ FUNCTION (svprfw, svprf_bhwd_impl, (VNx4SImode))
+ FUNCTION (svprfw_gather, svprf_bhwd_gather_impl, (VNx4SImode))
+ FUNCTION (svptest_any, svptest_impl, (NE))
+ FUNCTION (svptest_first, svptest_impl, (LT))
+ FUNCTION (svptest_last, svptest_impl, (LTU))
+ FUNCTION (svptrue, svptrue_impl,)
+ FUNCTION (svptrue_pat, svptrue_pat_impl,)
+ FUNCTION (svqadd, rtx_code_function, (SS_PLUS, US_PLUS, -1))
+ FUNCTION (svqdecb, svqdec_bhwd_impl, (QImode))
+ FUNCTION (svqdecb_pat, svqdec_bhwd_impl, (QImode))
+ FUNCTION (svqdecd, svqdec_bhwd_impl, (DImode))
+ FUNCTION (svqdecd_pat, svqdec_bhwd_impl, (DImode))
+ FUNCTION (svqdech, svqdec_bhwd_impl, (HImode))
+ FUNCTION (svqdech_pat, svqdec_bhwd_impl, (HImode))
+ FUNCTION (svqdecp, svqdecp_svqincp_impl, (SS_MINUS, US_MINUS))
+ FUNCTION (svqdecw, svqdec_bhwd_impl, (SImode))
+ FUNCTION (svqdecw_pat, svqdec_bhwd_impl, (SImode))
+ FUNCTION (svqincb, svqinc_bhwd_impl, (QImode))
+ FUNCTION (svqincb_pat, svqinc_bhwd_impl, (QImode))
+ FUNCTION (svqincd, svqinc_bhwd_impl, (DImode))
+ FUNCTION (svqincd_pat, svqinc_bhwd_impl, (DImode))
+ FUNCTION (svqinch, svqinc_bhwd_impl, (HImode))
+ FUNCTION (svqinch_pat, svqinc_bhwd_impl, (HImode))
+ FUNCTION (svqincp, svqdecp_svqincp_impl, (SS_PLUS, US_PLUS))
+ FUNCTION (svqincw, svqinc_bhwd_impl, (SImode))
+ FUNCTION (svqincw_pat, svqinc_bhwd_impl, (SImode))
+ FUNCTION (svqsub, rtx_code_function, (SS_MINUS, US_MINUS, -1))
+ FUNCTION (svrbit, unspec_based_function, (UNSPEC_RBIT, UNSPEC_RBIT, -1))
+ FUNCTION (svrdffr, svrdffr_impl,)
+ FUNCTION (svrecpe, unspec_based_function, (-1, UNSPEC_URECPE, UNSPEC_FRECPE))
+ FUNCTION (svrecps, unspec_based_function, (-1, -1, UNSPEC_FRECPS))
+ FUNCTION (svrecpx, unspec_based_function, (-1, -1, UNSPEC_COND_FRECPX))
+ FUNCTION (svreinterpret, svreinterpret_impl,)
+ FUNCTION (svrev, svrev_impl,)
+ FUNCTION (svrevb, unspec_based_function, (UNSPEC_REVB, UNSPEC_REVB, -1))
+ FUNCTION (svrevh, unspec_based_function, (UNSPEC_REVH, UNSPEC_REVH, -1))
+ FUNCTION (svrevw, unspec_based_function, (UNSPEC_REVW, UNSPEC_REVW, -1))
+ FUNCTION (svrinta, unspec_based_function, (-1, -1, UNSPEC_COND_FRINTA))
+ FUNCTION (svrinti, unspec_based_function, (-1, -1, UNSPEC_COND_FRINTI))
+ FUNCTION (svrintm, unspec_based_function, (-1, -1, UNSPEC_COND_FRINTM))
+ FUNCTION (svrintn, unspec_based_function, (-1, -1, UNSPEC_COND_FRINTN))
+ FUNCTION (svrintp, unspec_based_function, (-1, -1, UNSPEC_COND_FRINTP))
+ FUNCTION (svrintx, unspec_based_function, (-1, -1, UNSPEC_COND_FRINTX))
+ FUNCTION (svrintz, unspec_based_function, (-1, -1, UNSPEC_COND_FRINTZ))
+ FUNCTION (svrsqrte, unspec_based_function, (-1, UNSPEC_RSQRTE, UNSPEC_RSQRTE))
+ FUNCTION (svrsqrts, unspec_based_function, (-1, -1, UNSPEC_RSQRTS))
+ FUNCTION (svscale, unspec_based_function, (-1, -1, UNSPEC_COND_FSCALE))
+ FUNCTION (svsel, svsel_impl,)
+ FUNCTION (svset2, svset_impl, (2))
+ FUNCTION (svset3, svset_impl, (3))
+ FUNCTION (svset4, svset_impl, (4))
+ FUNCTION (svsetffr, svsetffr_impl,)
+ FUNCTION (svsplice, QUIET_CODE_FOR_MODE0 (aarch64_sve_splice),)
+ FUNCTION (svsqrt, rtx_code_function, (SQRT, SQRT, UNSPEC_COND_FSQRT))
+ FUNCTION (svst1, svst1_impl,)
+ FUNCTION (svst1_scatter, svst1_scatter_impl,)
+ FUNCTION (svst1b, svst1_truncate_impl, (QImode))
+ FUNCTION (svst1b_scatter, svst1_scatter_truncate_impl, (QImode))
+ FUNCTION (svst1h, svst1_truncate_impl, (HImode))
+ FUNCTION (svst1h_scatter, svst1_scatter_truncate_impl, (HImode))
+ FUNCTION (svst1w, svst1_truncate_impl, (SImode))
+ FUNCTION (svst1w_scatter, svst1_scatter_truncate_impl, (SImode))
+ FUNCTION (svst2, svst234_impl, (2))
+ FUNCTION (svst3, svst234_impl, (3))
+ FUNCTION (svst4, svst234_impl, (4))
+ FUNCTION (svstnt1, svstnt1_impl,)
+ FUNCTION (svsub, svsub_impl,)
+ FUNCTION (svsubr, rtx_code_function_rotated, (MINUS, MINUS, UNSPEC_COND_FSUB))
+ FUNCTION (svsudot, svusdot_impl, (true))
+ FUNCTION (svsudot_lane, svdotprod_lane_impl, (UNSPEC_SUDOT, -1, -1))
+ FUNCTION (svtbl, svtbl_impl,)
+ FUNCTION (svtmad, CODE_FOR_MODE0 (aarch64_sve_tmad),)
+ FUNCTION (svtrn1, svtrn_impl, (0))
+ FUNCTION (svtrn1q, unspec_based_function, (UNSPEC_TRN1Q, UNSPEC_TRN1Q,
+ 					   UNSPEC_TRN1Q))
+ FUNCTION (svtrn2, svtrn_impl, (1))
+ FUNCTION (svtrn2q, unspec_based_function, (UNSPEC_TRN2Q, UNSPEC_TRN2Q,
+ 					   UNSPEC_TRN2Q))
+ FUNCTION (svtsmul, unspec_based_function, (-1, -1, UNSPEC_FTSMUL))
+ FUNCTION (svtssel, unspec_based_function, (-1, -1, UNSPEC_FTSSEL))
+ FUNCTION (svundef, svundef_impl, (1))
+ FUNCTION (svundef2, svundef_impl, (2))
+ FUNCTION (svundef3, svundef_impl, (3))
+ FUNCTION (svundef4, svundef_impl, (4))
+ FUNCTION (svunpkhi, svunpk_impl, (true))
+ FUNCTION (svunpklo, svunpk_impl, (false))
+ FUNCTION (svusdot, svusdot_impl, (false))
+ FUNCTION (svusdot_lane, svdotprod_lane_impl, (UNSPEC_USDOT, -1, -1))
+ FUNCTION (svusmmla, unspec_based_add_function, (UNSPEC_USMATMUL, -1, -1))
+ FUNCTION (svuzp1, svuzp_impl, (0))
+ FUNCTION (svuzp1q, unspec_based_function, (UNSPEC_UZP1Q, UNSPEC_UZP1Q,
+ 					   UNSPEC_UZP1Q))
+ FUNCTION (svuzp2, svuzp_impl, (1))
+ FUNCTION (svuzp2q, unspec_based_function, (UNSPEC_UZP2Q, UNSPEC_UZP2Q,
+ 					   UNSPEC_UZP2Q))
+ FUNCTION (svwhilele, svwhilelx_impl, (UNSPEC_WHILELE, UNSPEC_WHILELS, true))
+ FUNCTION (svwhilelt, svwhilelx_impl, (UNSPEC_WHILELT, UNSPEC_WHILELO, false))
+ FUNCTION (svwrffr, svwrffr_impl,)
+ FUNCTION (svzip1, svzip_impl, (0))
+ FUNCTION (svzip1q, unspec_based_function, (UNSPEC_ZIP1Q, UNSPEC_ZIP1Q,
+ 					   UNSPEC_ZIP1Q))
+ FUNCTION (svzip2, svzip_impl, (1))
+ FUNCTION (svzip2q, unspec_based_function, (UNSPEC_ZIP2Q, UNSPEC_ZIP2Q,
+ 					   UNSPEC_ZIP2Q))
+ 
+ } /* end namespace aarch64_sve */
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-base.def gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-base.def
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-base.def	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-base.def	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,355 ----
+ /* ACLE support for AArch64 SVE (__ARM_FEATURE_SVE intrinsics)
+    Copyright (C) 2018-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #define REQUIRED_EXTENSIONS 0
+ DEF_SVE_FUNCTION (svabd, binary_opt_n, all_arith, mxz)
+ DEF_SVE_FUNCTION (svabs, unary, all_float_and_signed, mxz)
+ DEF_SVE_FUNCTION (svacge, compare_opt_n, all_float, implicit)
+ DEF_SVE_FUNCTION (svacgt, compare_opt_n, all_float, implicit)
+ DEF_SVE_FUNCTION (svacle, compare_opt_n, all_float, implicit)
+ DEF_SVE_FUNCTION (svaclt, compare_opt_n, all_float, implicit)
+ DEF_SVE_FUNCTION (svadd, binary_opt_n, all_arith, mxz)
+ DEF_SVE_FUNCTION (svadda, fold_left, all_float, implicit)
+ DEF_SVE_FUNCTION (svaddv, reduction_wide, all_arith, implicit)
+ DEF_SVE_FUNCTION (svadrb, adr_offset, none, none)
+ DEF_SVE_FUNCTION (svadrd, adr_index, none, none)
+ DEF_SVE_FUNCTION (svadrh, adr_index, none, none)
+ DEF_SVE_FUNCTION (svadrw, adr_index, none, none)
+ DEF_SVE_FUNCTION (svand, binary_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svand, binary_opt_n, b, z)
+ DEF_SVE_FUNCTION (svandv, reduction, all_integer, implicit)
+ DEF_SVE_FUNCTION (svasr, binary_uint_opt_n, all_signed, mxz)
+ DEF_SVE_FUNCTION (svasr_wide, binary_uint64_opt_n, bhs_signed, mxz)
+ DEF_SVE_FUNCTION (svasrd, shift_right_imm, all_signed, mxz)
+ DEF_SVE_FUNCTION (svbic, binary_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svbic, binary_opt_n, b, z)
+ DEF_SVE_FUNCTION (svbrka, unary, b, mz)
+ DEF_SVE_FUNCTION (svbrkb, unary, b, mz)
+ DEF_SVE_FUNCTION (svbrkn, binary, b, z)
+ DEF_SVE_FUNCTION (svbrkpa, binary, b, z)
+ DEF_SVE_FUNCTION (svbrkpb, binary, b, z)
+ DEF_SVE_FUNCTION (svcadd, binary_rotate, all_float, mxz)
+ DEF_SVE_FUNCTION (svclasta, clast, all_data, implicit)
+ DEF_SVE_FUNCTION (svclastb, clast, all_data, implicit)
+ DEF_SVE_FUNCTION (svcls, unary_to_uint, all_signed, mxz)
+ DEF_SVE_FUNCTION (svclz, unary_to_uint, all_integer, mxz)
+ DEF_SVE_FUNCTION (svcmla, ternary_rotate, all_float, mxz)
+ DEF_SVE_FUNCTION (svcmla_lane, ternary_lane_rotate, hs_float, none)
+ DEF_SVE_FUNCTION (svcmpeq, compare_opt_n, all_arith, implicit)
+ DEF_SVE_FUNCTION (svcmpeq_wide, compare_wide_opt_n, bhs_signed, implicit)
+ DEF_SVE_FUNCTION (svcmpge, compare_opt_n, all_arith, implicit)
+ DEF_SVE_FUNCTION (svcmpge_wide, compare_wide_opt_n, bhs_integer, implicit)
+ DEF_SVE_FUNCTION (svcmpgt, compare_opt_n, all_arith, implicit)
+ DEF_SVE_FUNCTION (svcmpgt_wide, compare_wide_opt_n, bhs_integer, implicit)
+ DEF_SVE_FUNCTION (svcmple, compare_opt_n, all_arith, implicit)
+ DEF_SVE_FUNCTION (svcmple_wide, compare_wide_opt_n, bhs_integer, implicit)
+ DEF_SVE_FUNCTION (svcmplt, compare_opt_n, all_arith, implicit)
+ DEF_SVE_FUNCTION (svcmplt_wide, compare_wide_opt_n, bhs_integer, implicit)
+ DEF_SVE_FUNCTION (svcmpne, compare_opt_n, all_arith, implicit)
+ DEF_SVE_FUNCTION (svcmpne_wide, compare_wide_opt_n, bhs_signed, implicit)
+ DEF_SVE_FUNCTION (svcmpuo, compare_opt_n, all_float, implicit)
+ DEF_SVE_FUNCTION (svcnot, unary, all_integer, mxz)
+ DEF_SVE_FUNCTION (svcnt, unary_to_uint, all_data, mxz)
+ DEF_SVE_FUNCTION (svcntb, count_inherent, none, none)
+ DEF_SVE_FUNCTION (svcntb_pat, count_pat, none, none)
+ DEF_SVE_FUNCTION (svcntd, count_inherent, none, none)
+ DEF_SVE_FUNCTION (svcntd_pat, count_pat, none, none)
+ DEF_SVE_FUNCTION (svcnth, count_inherent, none, none)
+ DEF_SVE_FUNCTION (svcnth_pat, count_pat, none, none)
+ DEF_SVE_FUNCTION (svcntp, count_pred, all_pred, implicit)
+ DEF_SVE_FUNCTION (svcntw, count_inherent, none, none)
+ DEF_SVE_FUNCTION (svcntw_pat, count_pat, none, none)
+ DEF_SVE_FUNCTION (svcompact, unary, sd_data, implicit)
+ DEF_SVE_FUNCTION (svcreate2, create, all_data, none)
+ DEF_SVE_FUNCTION (svcreate3, create, all_data, none)
+ DEF_SVE_FUNCTION (svcreate4, create, all_data, none)
+ DEF_SVE_FUNCTION (svcvt, unary_convert, cvt, mxz)
+ DEF_SVE_FUNCTION (svdiv, binary_opt_n, all_float_and_sd_integer, mxz)
+ DEF_SVE_FUNCTION (svdivr, binary_opt_n, all_float_and_sd_integer, mxz)
+ DEF_SVE_FUNCTION (svdot, ternary_qq_opt_n, sd_integer, none)
+ DEF_SVE_FUNCTION (svdot_lane, ternary_qq_lane, sd_integer, none)
+ DEF_SVE_FUNCTION (svdup, unary_n, all_data, mxz_or_none)
+ DEF_SVE_FUNCTION (svdup, unary_n, all_pred, none)
+ DEF_SVE_FUNCTION (svdup_lane, binary_uint_n, all_data, none)
+ DEF_SVE_FUNCTION (svdupq, dupq, all_data, none)
+ DEF_SVE_FUNCTION (svdupq, dupq, all_pred, none)
+ DEF_SVE_FUNCTION (svdupq_lane, binary_uint64_n, all_data, none)
+ DEF_SVE_FUNCTION (sveor, binary_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (sveor, binary_opt_n, b, z)
+ DEF_SVE_FUNCTION (sveorv, reduction, all_integer, implicit)
+ DEF_SVE_FUNCTION (svexpa, unary_uint, all_float, none)
+ DEF_SVE_FUNCTION (svext, ext, all_data, none)
+ DEF_SVE_FUNCTION (svextb, unary, hsd_integer, mxz)
+ DEF_SVE_FUNCTION (svexth, unary, sd_integer, mxz)
+ DEF_SVE_FUNCTION (svextw, unary, d_integer, mxz)
+ DEF_SVE_FUNCTION (svget2, get, all_data, none)
+ DEF_SVE_FUNCTION (svget3, get, all_data, none)
+ DEF_SVE_FUNCTION (svget4, get, all_data, none)
+ DEF_SVE_FUNCTION (svindex, binary_scalar, all_integer, none)
+ DEF_SVE_FUNCTION (svinsr, binary_n, all_data, none)
+ DEF_SVE_FUNCTION (svlasta, reduction, all_data, implicit)
+ DEF_SVE_FUNCTION (svlastb, reduction, all_data, implicit)
+ DEF_SVE_FUNCTION (svld1, load, all_data, implicit)
+ DEF_SVE_FUNCTION (svld1_gather, load_gather_sv, sd_data, implicit)
+ DEF_SVE_FUNCTION (svld1_gather, load_gather_vs, sd_data, implicit)
+ DEF_SVE_FUNCTION (svld1rq, load_replicate, all_data, implicit)
+ DEF_SVE_FUNCTION (svld1sb, load_ext, hsd_integer, implicit)
+ DEF_SVE_FUNCTION (svld1sb_gather, load_ext_gather_offset, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svld1sh, load_ext, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svld1sh_gather, load_ext_gather_offset, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svld1sh_gather, load_ext_gather_index, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svld1sw, load_ext, d_integer, implicit)
+ DEF_SVE_FUNCTION (svld1sw_gather, load_ext_gather_offset, d_integer, implicit)
+ DEF_SVE_FUNCTION (svld1sw_gather, load_ext_gather_index, d_integer, implicit)
+ DEF_SVE_FUNCTION (svld1ub, load_ext, hsd_integer, implicit)
+ DEF_SVE_FUNCTION (svld1ub_gather, load_ext_gather_offset, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svld1uh, load_ext, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svld1uh_gather, load_ext_gather_offset, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svld1uh_gather, load_ext_gather_index, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svld1uw, load_ext, d_integer, implicit)
+ DEF_SVE_FUNCTION (svld1uw_gather, load_ext_gather_offset, d_integer, implicit)
+ DEF_SVE_FUNCTION (svld1uw_gather, load_ext_gather_index, d_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1, load, all_data, implicit)
+ DEF_SVE_FUNCTION (svldff1_gather, load_gather_sv, sd_data, implicit)
+ DEF_SVE_FUNCTION (svldff1_gather, load_gather_vs, sd_data, implicit)
+ DEF_SVE_FUNCTION (svldff1sb, load_ext, hsd_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1sb_gather, load_ext_gather_offset, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1sh, load_ext, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1sh_gather, load_ext_gather_offset, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1sh_gather, load_ext_gather_index, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1sw, load_ext, d_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1sw_gather, load_ext_gather_offset, d_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1sw_gather, load_ext_gather_index, d_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1ub, load_ext, hsd_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1ub_gather, load_ext_gather_offset, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1uh, load_ext, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1uh_gather, load_ext_gather_offset, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1uh_gather, load_ext_gather_index, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1uw, load_ext, d_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1uw_gather, load_ext_gather_offset, d_integer, implicit)
+ DEF_SVE_FUNCTION (svldff1uw_gather, load_ext_gather_index, d_integer, implicit)
+ DEF_SVE_FUNCTION (svldnf1, load, all_data, implicit)
+ DEF_SVE_FUNCTION (svldnf1sb, load_ext, hsd_integer, implicit)
+ DEF_SVE_FUNCTION (svldnf1sh, load_ext, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldnf1sw, load_ext, d_integer, implicit)
+ DEF_SVE_FUNCTION (svldnf1ub, load_ext, hsd_integer, implicit)
+ DEF_SVE_FUNCTION (svldnf1uh, load_ext, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldnf1uw, load_ext, d_integer, implicit)
+ DEF_SVE_FUNCTION (svldnt1, load, all_data, implicit)
+ DEF_SVE_FUNCTION (svld2, load, all_data, implicit)
+ DEF_SVE_FUNCTION (svld3, load, all_data, implicit)
+ DEF_SVE_FUNCTION (svld4, load, all_data, implicit)
+ DEF_SVE_FUNCTION (svlen, count_vector, all_data, none)
+ DEF_SVE_FUNCTION (svlsl, binary_uint_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svlsl_wide, binary_uint64_opt_n, bhs_integer, mxz)
+ DEF_SVE_FUNCTION (svlsr, binary_uint_opt_n, all_unsigned, mxz)
+ DEF_SVE_FUNCTION (svlsr_wide, binary_uint64_opt_n, bhs_unsigned, mxz)
+ DEF_SVE_FUNCTION (svmad, ternary_opt_n, all_arith, mxz)
+ DEF_SVE_FUNCTION (svmax, binary_opt_n, all_arith, mxz)
+ DEF_SVE_FUNCTION (svmaxnm, binary_opt_n, all_float, mxz)
+ DEF_SVE_FUNCTION (svmaxnmv, reduction, all_float, implicit)
+ DEF_SVE_FUNCTION (svmaxv, reduction, all_arith, implicit)
+ DEF_SVE_FUNCTION (svmin, binary_opt_n, all_arith, mxz)
+ DEF_SVE_FUNCTION (svminnm, binary_opt_n, all_float, mxz)
+ DEF_SVE_FUNCTION (svminnmv, reduction, all_float, implicit)
+ DEF_SVE_FUNCTION (svminv, reduction, all_arith, implicit)
+ DEF_SVE_FUNCTION (svmla, ternary_opt_n, all_arith, mxz)
+ DEF_SVE_FUNCTION (svmla_lane, ternary_lane, all_float, none)
+ DEF_SVE_FUNCTION (svmls, ternary_opt_n, all_arith, mxz)
+ DEF_SVE_FUNCTION (svmls_lane, ternary_lane, all_float, none)
+ DEF_SVE_FUNCTION (svmmla, mmla, none, none)
+ DEF_SVE_FUNCTION (svmov, unary, b, z)
+ DEF_SVE_FUNCTION (svmsb, ternary_opt_n, all_arith, mxz)
+ DEF_SVE_FUNCTION (svmul, binary_opt_n, all_arith, mxz)
+ DEF_SVE_FUNCTION (svmul_lane, binary_lane, all_float, none)
+ DEF_SVE_FUNCTION (svmulh, binary_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svmulx, binary_opt_n, all_float, mxz)
+ DEF_SVE_FUNCTION (svnand, binary_opt_n, b, z)
+ DEF_SVE_FUNCTION (svneg, unary, all_float_and_signed, mxz)
+ DEF_SVE_FUNCTION (svnmad, ternary_opt_n, all_float, mxz)
+ DEF_SVE_FUNCTION (svnmla, ternary_opt_n, all_float, mxz)
+ DEF_SVE_FUNCTION (svnmls, ternary_opt_n, all_float, mxz)
+ DEF_SVE_FUNCTION (svnmsb, ternary_opt_n, all_float, mxz)
+ DEF_SVE_FUNCTION (svnor, binary_opt_n, b, z)
+ DEF_SVE_FUNCTION (svnot, unary, all_integer, mxz)
+ DEF_SVE_FUNCTION (svnot, unary, b, z)
+ DEF_SVE_FUNCTION (svorn, binary_opt_n, b, z)
+ DEF_SVE_FUNCTION (svorr, binary_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svorr, binary_opt_n, b, z)
+ DEF_SVE_FUNCTION (svorv, reduction, all_integer, implicit)
+ DEF_SVE_FUNCTION (svpfalse, inherent_b, b, none)
+ DEF_SVE_FUNCTION (svpfirst, unary, b, implicit)
+ DEF_SVE_FUNCTION (svpnext, unary_pred, all_pred, implicit)
+ DEF_SVE_FUNCTION (svprfb, prefetch, none, implicit)
+ DEF_SVE_FUNCTION (svprfb_gather, prefetch_gather_offset, none, implicit)
+ DEF_SVE_FUNCTION (svprfd, prefetch, none, implicit)
+ DEF_SVE_FUNCTION (svprfd_gather, prefetch_gather_index, none, implicit)
+ DEF_SVE_FUNCTION (svprfh, prefetch, none, implicit)
+ DEF_SVE_FUNCTION (svprfh_gather, prefetch_gather_index, none, implicit)
+ DEF_SVE_FUNCTION (svprfw, prefetch, none, implicit)
+ DEF_SVE_FUNCTION (svprfw_gather, prefetch_gather_index, none, implicit)
+ DEF_SVE_FUNCTION (svptest_any, ptest, none, implicit)
+ DEF_SVE_FUNCTION (svptest_first, ptest, none, implicit)
+ DEF_SVE_FUNCTION (svptest_last, ptest, none, implicit)
+ DEF_SVE_FUNCTION (svptrue, inherent, all_pred, none)
+ DEF_SVE_FUNCTION (svptrue_pat, pattern_pred, all_pred, none)
+ DEF_SVE_FUNCTION (svqadd, binary_opt_n, all_integer, none)
+ DEF_SVE_FUNCTION (svqdecb, inc_dec, sd_integer, none)
+ DEF_SVE_FUNCTION (svqdecb_pat, inc_dec_pat, sd_integer, none)
+ DEF_SVE_FUNCTION (svqdecd, inc_dec, d_integer, none)
+ DEF_SVE_FUNCTION (svqdecd, inc_dec, sd_integer, none)
+ DEF_SVE_FUNCTION (svqdecd_pat, inc_dec_pat, d_integer, none)
+ DEF_SVE_FUNCTION (svqdecd_pat, inc_dec_pat, sd_integer, none)
+ DEF_SVE_FUNCTION (svqdech, inc_dec, h_integer, none)
+ DEF_SVE_FUNCTION (svqdech, inc_dec, sd_integer, none)
+ DEF_SVE_FUNCTION (svqdech_pat, inc_dec_pat, h_integer, none)
+ DEF_SVE_FUNCTION (svqdech_pat, inc_dec_pat, sd_integer, none)
+ DEF_SVE_FUNCTION (svqdecp, inc_dec_pred, hsd_integer, none)
+ DEF_SVE_FUNCTION (svqdecp, inc_dec_pred_scalar, inc_dec_n, none)
+ DEF_SVE_FUNCTION (svqdecw, inc_dec, s_integer, none)
+ DEF_SVE_FUNCTION (svqdecw, inc_dec, sd_integer, none)
+ DEF_SVE_FUNCTION (svqdecw_pat, inc_dec_pat, s_integer, none)
+ DEF_SVE_FUNCTION (svqdecw_pat, inc_dec_pat, sd_integer, none)
+ DEF_SVE_FUNCTION (svqincb, inc_dec, sd_integer, none)
+ DEF_SVE_FUNCTION (svqincb_pat, inc_dec_pat, sd_integer, none)
+ DEF_SVE_FUNCTION (svqincd, inc_dec, d_integer, none)
+ DEF_SVE_FUNCTION (svqincd, inc_dec, sd_integer, none)
+ DEF_SVE_FUNCTION (svqincd_pat, inc_dec_pat, d_integer, none)
+ DEF_SVE_FUNCTION (svqincd_pat, inc_dec_pat, sd_integer, none)
+ DEF_SVE_FUNCTION (svqinch, inc_dec, h_integer, none)
+ DEF_SVE_FUNCTION (svqinch, inc_dec, sd_integer, none)
+ DEF_SVE_FUNCTION (svqinch_pat, inc_dec_pat, h_integer, none)
+ DEF_SVE_FUNCTION (svqinch_pat, inc_dec_pat, sd_integer, none)
+ DEF_SVE_FUNCTION (svqincp, inc_dec_pred, hsd_integer, none)
+ DEF_SVE_FUNCTION (svqincp, inc_dec_pred_scalar, inc_dec_n, none)
+ DEF_SVE_FUNCTION (svqincw, inc_dec, s_integer, none)
+ DEF_SVE_FUNCTION (svqincw, inc_dec, sd_integer, none)
+ DEF_SVE_FUNCTION (svqincw_pat, inc_dec_pat, s_integer, none)
+ DEF_SVE_FUNCTION (svqincw_pat, inc_dec_pat, sd_integer, none)
+ DEF_SVE_FUNCTION (svqsub, binary_opt_n, all_integer, none)
+ DEF_SVE_FUNCTION (svrbit, unary, all_integer, mxz)
+ DEF_SVE_FUNCTION (svrdffr, rdffr, none, z_or_none)
+ DEF_SVE_FUNCTION (svrecpe, unary, all_float, none)
+ DEF_SVE_FUNCTION (svrecps, binary, all_float, none)
+ DEF_SVE_FUNCTION (svrecpx, unary, all_float, mxz)
+ DEF_SVE_FUNCTION (svreinterpret, unary_convert, reinterpret, none)
+ DEF_SVE_FUNCTION (svrev, unary, all_data, none)
+ DEF_SVE_FUNCTION (svrev, unary_pred, all_pred, none)
+ DEF_SVE_FUNCTION (svrevb, unary, hsd_integer, mxz)
+ DEF_SVE_FUNCTION (svrevh, unary, sd_integer, mxz)
+ DEF_SVE_FUNCTION (svrevw, unary, d_integer, mxz)
+ DEF_SVE_FUNCTION (svrinta, unary, all_float, mxz)
+ DEF_SVE_FUNCTION (svrinti, unary, all_float, mxz)
+ DEF_SVE_FUNCTION (svrintm, unary, all_float, mxz)
+ DEF_SVE_FUNCTION (svrintn, unary, all_float, mxz)
+ DEF_SVE_FUNCTION (svrintp, unary, all_float, mxz)
+ DEF_SVE_FUNCTION (svrintx, unary, all_float, mxz)
+ DEF_SVE_FUNCTION (svrintz, unary, all_float, mxz)
+ DEF_SVE_FUNCTION (svrsqrte, unary, all_float, none)
+ DEF_SVE_FUNCTION (svrsqrts, binary, all_float, none)
+ DEF_SVE_FUNCTION (svscale, binary_int_opt_n, all_float, mxz)
+ DEF_SVE_FUNCTION (svsel, binary, all_data, implicit)
+ DEF_SVE_FUNCTION (svsel, binary, b, implicit)
+ DEF_SVE_FUNCTION (svset2, set, all_data, none)
+ DEF_SVE_FUNCTION (svset3, set, all_data, none)
+ DEF_SVE_FUNCTION (svset4, set, all_data, none)
+ DEF_SVE_FUNCTION (svsetffr, setffr, none, none)
+ DEF_SVE_FUNCTION (svsplice, binary, all_data, implicit)
+ DEF_SVE_FUNCTION (svsqrt, unary, all_float, mxz)
+ DEF_SVE_FUNCTION (svst1, store, all_data, implicit)
+ DEF_SVE_FUNCTION (svst1_scatter, store_scatter_index, sd_data, implicit)
+ DEF_SVE_FUNCTION (svst1_scatter, store_scatter_offset, sd_data, implicit)
+ DEF_SVE_FUNCTION (svst1b, store, hsd_integer, implicit)
+ DEF_SVE_FUNCTION (svst1b_scatter, store_scatter_offset, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svst1h, store, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svst1h_scatter, store_scatter_index, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svst1h_scatter, store_scatter_offset, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svst1w, store, d_integer, implicit)
+ DEF_SVE_FUNCTION (svst1w_scatter, store_scatter_index, d_integer, implicit)
+ DEF_SVE_FUNCTION (svst1w_scatter, store_scatter_offset, d_integer, implicit)
+ DEF_SVE_FUNCTION (svst2, store, all_data, implicit)
+ DEF_SVE_FUNCTION (svst3, store, all_data, implicit)
+ DEF_SVE_FUNCTION (svst4, store, all_data, implicit)
+ DEF_SVE_FUNCTION (svstnt1, store, all_data, implicit)
+ DEF_SVE_FUNCTION (svsub, binary_opt_n, all_arith, mxz)
+ DEF_SVE_FUNCTION (svsubr, binary_opt_n, all_arith, mxz)
+ DEF_SVE_FUNCTION (svtbl, binary_uint, all_data, none)
+ DEF_SVE_FUNCTION (svtmad, tmad, all_float, none)
+ DEF_SVE_FUNCTION (svtrn1, binary, all_data, none)
+ DEF_SVE_FUNCTION (svtrn1, binary_pred, all_pred, none)
+ DEF_SVE_FUNCTION (svtrn2, binary, all_data, none)
+ DEF_SVE_FUNCTION (svtrn2, binary_pred, all_pred, none)
+ DEF_SVE_FUNCTION (svtsmul, binary_uint, all_float, none)
+ DEF_SVE_FUNCTION (svtssel, binary_uint, all_float, none)
+ DEF_SVE_FUNCTION (svundef, inherent, all_data, none)
+ DEF_SVE_FUNCTION (svundef2, inherent, all_data, none)
+ DEF_SVE_FUNCTION (svundef3, inherent, all_data, none)
+ DEF_SVE_FUNCTION (svundef4, inherent, all_data, none)
+ DEF_SVE_FUNCTION (svunpkhi, unary_widen, hsd_integer, none)
+ DEF_SVE_FUNCTION (svunpkhi, unary_widen, b, none)
+ DEF_SVE_FUNCTION (svunpklo, unary_widen, hsd_integer, none)
+ DEF_SVE_FUNCTION (svunpklo, unary_widen, b, none)
+ DEF_SVE_FUNCTION (svuzp1, binary, all_data, none)
+ DEF_SVE_FUNCTION (svuzp1, binary_pred, all_pred, none)
+ DEF_SVE_FUNCTION (svuzp2, binary, all_data, none)
+ DEF_SVE_FUNCTION (svuzp2, binary_pred, all_pred, none)
+ DEF_SVE_FUNCTION (svwhilele, compare_scalar, while, none)
+ DEF_SVE_FUNCTION (svwhilelt, compare_scalar, while, none)
+ DEF_SVE_FUNCTION (svwrffr, setffr, none, implicit)
+ DEF_SVE_FUNCTION (svzip1, binary, all_data, none)
+ DEF_SVE_FUNCTION (svzip1, binary_pred, all_pred, none)
+ DEF_SVE_FUNCTION (svzip2, binary, all_data, none)
+ DEF_SVE_FUNCTION (svzip2, binary_pred, all_pred, none)
+ #undef REQUIRED_EXTENSIONS
+ 
+ #define REQUIRED_EXTENSIONS AARCH64_FL_BF16
+ DEF_SVE_FUNCTION (svbfdot, ternary_bfloat_opt_n, s_float, none)
+ DEF_SVE_FUNCTION (svbfdot_lane, ternary_bfloat_lanex2, s_float, none)
+ DEF_SVE_FUNCTION (svbfmlalb, ternary_bfloat_opt_n, s_float, none)
+ DEF_SVE_FUNCTION (svbfmlalb_lane, ternary_bfloat_lane, s_float, none)
+ DEF_SVE_FUNCTION (svbfmlalt, ternary_bfloat_opt_n, s_float, none)
+ DEF_SVE_FUNCTION (svbfmlalt_lane, ternary_bfloat_lane, s_float, none)
+ DEF_SVE_FUNCTION (svbfmmla, ternary_bfloat, s_float, none)
+ DEF_SVE_FUNCTION (svcvt, unary_convert, cvt_bfloat, mxz)
+ DEF_SVE_FUNCTION (svcvtnt, unary_convert_narrowt, cvt_bfloat, mx)
+ #undef REQUIRED_EXTENSIONS
+ 
+ #define REQUIRED_EXTENSIONS AARCH64_FL_I8MM
+ DEF_SVE_FUNCTION (svmmla, mmla, s_integer, none)
+ DEF_SVE_FUNCTION (svusmmla, ternary_uintq_intq, s_signed, none)
+ DEF_SVE_FUNCTION (svsudot, ternary_intq_uintq_opt_n, s_signed, none)
+ DEF_SVE_FUNCTION (svsudot_lane, ternary_intq_uintq_lane, s_signed, none)
+ DEF_SVE_FUNCTION (svusdot, ternary_uintq_intq_opt_n, s_signed, none)
+ DEF_SVE_FUNCTION (svusdot_lane, ternary_uintq_intq_lane, s_signed, none)
+ #undef REQUIRED_EXTENSIONS
+ 
+ #define REQUIRED_EXTENSIONS AARCH64_FL_F32MM
+ DEF_SVE_FUNCTION (svmmla, mmla, s_float, none)
+ #undef REQUIRED_EXTENSIONS
+ 
+ #define REQUIRED_EXTENSIONS AARCH64_FL_F64MM
+ DEF_SVE_FUNCTION (svld1ro, load_replicate, all_data, implicit)
+ DEF_SVE_FUNCTION (svmmla, mmla, d_float, none)
+ DEF_SVE_FUNCTION (svtrn1q, binary, all_data, none)
+ DEF_SVE_FUNCTION (svtrn2q, binary, all_data, none)
+ DEF_SVE_FUNCTION (svuzp1q, binary, all_data, none)
+ DEF_SVE_FUNCTION (svuzp2q, binary, all_data, none)
+ DEF_SVE_FUNCTION (svzip1q, binary, all_data, none)
+ DEF_SVE_FUNCTION (svzip2q, binary, all_data, none)
+ #undef REQUIRED_EXTENSIONS
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-base.h gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-base.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-base.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-base.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,304 ----
+ /* ACLE support for AArch64 SVE (__ARM_FEATURE_SVE intrinsics)
+    Copyright (C) 2018-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_AARCH64_SVE_BUILTINS_BASE_H
+ #define GCC_AARCH64_SVE_BUILTINS_BASE_H
+ 
+ namespace aarch64_sve
+ {
+   namespace functions
+   {
+     extern const function_base *const svabd;
+     extern const function_base *const svabs;
+     extern const function_base *const svacge;
+     extern const function_base *const svacgt;
+     extern const function_base *const svacle;
+     extern const function_base *const svaclt;
+     extern const function_base *const svadd;
+     extern const function_base *const svadda;
+     extern const function_base *const svaddv;
+     extern const function_base *const svadrb;
+     extern const function_base *const svadrd;
+     extern const function_base *const svadrh;
+     extern const function_base *const svadrw;
+     extern const function_base *const svand;
+     extern const function_base *const svandv;
+     extern const function_base *const svasr;
+     extern const function_base *const svasr_wide;
+     extern const function_base *const svasrd;
+     extern const function_base *const svbfdot;
+     extern const function_base *const svbfdot_lane;
+     extern const function_base *const svbfmlalb;
+     extern const function_base *const svbfmlalb_lane;
+     extern const function_base *const svbfmlalt;
+     extern const function_base *const svbfmlalt_lane;
+     extern const function_base *const svbfmmla;
+     extern const function_base *const svbic;
+     extern const function_base *const svbrka;
+     extern const function_base *const svbrkb;
+     extern const function_base *const svbrkn;
+     extern const function_base *const svbrkpa;
+     extern const function_base *const svbrkpb;
+     extern const function_base *const svcadd;
+     extern const function_base *const svclasta;
+     extern const function_base *const svclastb;
+     extern const function_base *const svcls;
+     extern const function_base *const svclz;
+     extern const function_base *const svcmla;
+     extern const function_base *const svcmla_lane;
+     extern const function_base *const svcmpeq;
+     extern const function_base *const svcmpeq_wide;
+     extern const function_base *const svcmpge;
+     extern const function_base *const svcmpge_wide;
+     extern const function_base *const svcmpgt;
+     extern const function_base *const svcmpgt_wide;
+     extern const function_base *const svcmple;
+     extern const function_base *const svcmple_wide;
+     extern const function_base *const svcmplt;
+     extern const function_base *const svcmplt_wide;
+     extern const function_base *const svcmpne;
+     extern const function_base *const svcmpne_wide;
+     extern const function_base *const svcmpuo;
+     extern const function_base *const svcnot;
+     extern const function_base *const svcnt;
+     extern const function_base *const svcntb;
+     extern const function_base *const svcntb_pat;
+     extern const function_base *const svcntd;
+     extern const function_base *const svcntd_pat;
+     extern const function_base *const svcnth;
+     extern const function_base *const svcnth_pat;
+     extern const function_base *const svcntp;
+     extern const function_base *const svcntw;
+     extern const function_base *const svcntw_pat;
+     extern const function_base *const svcompact;
+     extern const function_base *const svcreate2;
+     extern const function_base *const svcreate3;
+     extern const function_base *const svcreate4;
+     extern const function_base *const svcvt;
+     extern const function_base *const svcvtnt;
+     extern const function_base *const svdiv;
+     extern const function_base *const svdivr;
+     extern const function_base *const svdot;
+     extern const function_base *const svdot_lane;
+     extern const function_base *const svdup;
+     extern const function_base *const svdup_lane;
+     extern const function_base *const svdupq;
+     extern const function_base *const svdupq_lane;
+     extern const function_base *const sveor;
+     extern const function_base *const sveorv;
+     extern const function_base *const svexpa;
+     extern const function_base *const svext;
+     extern const function_base *const svextb;
+     extern const function_base *const svexth;
+     extern const function_base *const svextw;
+     extern const function_base *const svget2;
+     extern const function_base *const svget3;
+     extern const function_base *const svget4;
+     extern const function_base *const svindex;
+     extern const function_base *const svinsr;
+     extern const function_base *const svlasta;
+     extern const function_base *const svlastb;
+     extern const function_base *const svld1;
+     extern const function_base *const svld1_gather;
+     extern const function_base *const svld1ro;
+     extern const function_base *const svld1rq;
+     extern const function_base *const svld1sb;
+     extern const function_base *const svld1sb_gather;
+     extern const function_base *const svld1sh;
+     extern const function_base *const svld1sh_gather;
+     extern const function_base *const svld1sw;
+     extern const function_base *const svld1sw_gather;
+     extern const function_base *const svld1ub;
+     extern const function_base *const svld1ub_gather;
+     extern const function_base *const svld1uh;
+     extern const function_base *const svld1uh_gather;
+     extern const function_base *const svld1uw;
+     extern const function_base *const svld1uw_gather;
+     extern const function_base *const svld2;
+     extern const function_base *const svld3;
+     extern const function_base *const svld4;
+     extern const function_base *const svldff1;
+     extern const function_base *const svldff1_gather;
+     extern const function_base *const svldff1sb;
+     extern const function_base *const svldff1sb_gather;
+     extern const function_base *const svldff1sh;
+     extern const function_base *const svldff1sh_gather;
+     extern const function_base *const svldff1sw;
+     extern const function_base *const svldff1sw_gather;
+     extern const function_base *const svldff1ub;
+     extern const function_base *const svldff1ub_gather;
+     extern const function_base *const svldff1uh;
+     extern const function_base *const svldff1uh_gather;
+     extern const function_base *const svldff1uw;
+     extern const function_base *const svldff1uw_gather;
+     extern const function_base *const svldnf1;
+     extern const function_base *const svldnf1sb;
+     extern const function_base *const svldnf1sh;
+     extern const function_base *const svldnf1sw;
+     extern const function_base *const svldnf1ub;
+     extern const function_base *const svldnf1uh;
+     extern const function_base *const svldnf1uw;
+     extern const function_base *const svldnt1;
+     extern const function_base *const svlen;
+     extern const function_base *const svlsl;
+     extern const function_base *const svlsl_wide;
+     extern const function_base *const svlsr;
+     extern const function_base *const svlsr_wide;
+     extern const function_base *const svmad;
+     extern const function_base *const svmax;
+     extern const function_base *const svmaxnm;
+     extern const function_base *const svmaxnmv;
+     extern const function_base *const svmaxv;
+     extern const function_base *const svmin;
+     extern const function_base *const svminnm;
+     extern const function_base *const svminnmv;
+     extern const function_base *const svminv;
+     extern const function_base *const svmla;
+     extern const function_base *const svmla_lane;
+     extern const function_base *const svmls;
+     extern const function_base *const svmls_lane;
+     extern const function_base *const svmmla;
+     extern const function_base *const svmov;
+     extern const function_base *const svmsb;
+     extern const function_base *const svmul;
+     extern const function_base *const svmul_lane;
+     extern const function_base *const svmulh;
+     extern const function_base *const svmulx;
+     extern const function_base *const svnand;
+     extern const function_base *const svneg;
+     extern const function_base *const svnmad;
+     extern const function_base *const svnmla;
+     extern const function_base *const svnmls;
+     extern const function_base *const svnmsb;
+     extern const function_base *const svnor;
+     extern const function_base *const svnot;
+     extern const function_base *const svorn;
+     extern const function_base *const svorr;
+     extern const function_base *const svorv;
+     extern const function_base *const svpfalse;
+     extern const function_base *const svpfirst;
+     extern const function_base *const svpnext;
+     extern const function_base *const svprfb;
+     extern const function_base *const svprfb_gather;
+     extern const function_base *const svprfd;
+     extern const function_base *const svprfd_gather;
+     extern const function_base *const svprfh;
+     extern const function_base *const svprfh_gather;
+     extern const function_base *const svprfw;
+     extern const function_base *const svprfw_gather;
+     extern const function_base *const svptest_any;
+     extern const function_base *const svptest_first;
+     extern const function_base *const svptest_last;
+     extern const function_base *const svptrue;
+     extern const function_base *const svptrue_pat;
+     extern const function_base *const svqadd;
+     extern const function_base *const svqdecb;
+     extern const function_base *const svqdecb_pat;
+     extern const function_base *const svqdecd;
+     extern const function_base *const svqdecd_pat;
+     extern const function_base *const svqdech;
+     extern const function_base *const svqdech_pat;
+     extern const function_base *const svqdecp;
+     extern const function_base *const svqdecw;
+     extern const function_base *const svqdecw_pat;
+     extern const function_base *const svqincb;
+     extern const function_base *const svqincb_pat;
+     extern const function_base *const svqincd;
+     extern const function_base *const svqincd_pat;
+     extern const function_base *const svqinch;
+     extern const function_base *const svqinch_pat;
+     extern const function_base *const svqincp;
+     extern const function_base *const svqincw;
+     extern const function_base *const svqincw_pat;
+     extern const function_base *const svqsub;
+     extern const function_base *const svrbit;
+     extern const function_base *const svrdffr;
+     extern const function_base *const svrecpe;
+     extern const function_base *const svrecps;
+     extern const function_base *const svrecpx;
+     extern const function_base *const svreinterpret;
+     extern const function_base *const svrev;
+     extern const function_base *const svrevb;
+     extern const function_base *const svrevh;
+     extern const function_base *const svrevw;
+     extern const function_base *const svrinta;
+     extern const function_base *const svrinti;
+     extern const function_base *const svrintm;
+     extern const function_base *const svrintn;
+     extern const function_base *const svrintp;
+     extern const function_base *const svrintx;
+     extern const function_base *const svrintz;
+     extern const function_base *const svrsqrte;
+     extern const function_base *const svrsqrts;
+     extern const function_base *const svscale;
+     extern const function_base *const svsel;
+     extern const function_base *const svset2;
+     extern const function_base *const svset3;
+     extern const function_base *const svset4;
+     extern const function_base *const svsetffr;
+     extern const function_base *const svsplice;
+     extern const function_base *const svsqrt;
+     extern const function_base *const svst1;
+     extern const function_base *const svst1_scatter;
+     extern const function_base *const svst1b;
+     extern const function_base *const svst1b_scatter;
+     extern const function_base *const svst1h;
+     extern const function_base *const svst1h_scatter;
+     extern const function_base *const svst1w;
+     extern const function_base *const svst1w_scatter;
+     extern const function_base *const svst2;
+     extern const function_base *const svst3;
+     extern const function_base *const svst4;
+     extern const function_base *const svstnt1;
+     extern const function_base *const svsub;
+     extern const function_base *const svsubr;
+     extern const function_base *const svsudot;
+     extern const function_base *const svsudot_lane;
+     extern const function_base *const svtbl;
+     extern const function_base *const svtmad;
+     extern const function_base *const svtrn1;
+     extern const function_base *const svtrn1q;
+     extern const function_base *const svtrn2;
+     extern const function_base *const svtrn2q;
+     extern const function_base *const svtsmul;
+     extern const function_base *const svtssel;
+     extern const function_base *const svundef;
+     extern const function_base *const svundef2;
+     extern const function_base *const svundef3;
+     extern const function_base *const svundef4;
+     extern const function_base *const svunpkhi;
+     extern const function_base *const svunpklo;
+     extern const function_base *const svusdot;
+     extern const function_base *const svusdot_lane;
+     extern const function_base *const svusmmla;
+     extern const function_base *const svuzp1;
+     extern const function_base *const svuzp1q;
+     extern const function_base *const svuzp2;
+     extern const function_base *const svuzp2q;
+     extern const function_base *const svwhilele;
+     extern const function_base *const svwhilelt;
+     extern const function_base *const svwrffr;
+     extern const function_base *const svzip1;
+     extern const function_base *const svzip1q;
+     extern const function_base *const svzip2;
+     extern const function_base *const svzip2q;
+   }
+ }
+ 
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-functions.h gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-functions.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-functions.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-functions.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,665 ----
+ /* ACLE support for AArch64 SVE (function_base classes)
+    Copyright (C) 2018-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_AARCH64_SVE_BUILTINS_FUNCTIONS_H
+ #define GCC_AARCH64_SVE_BUILTINS_FUNCTIONS_H
+ 
+ namespace aarch64_sve {
+ 
+ /* Wrap T, which is derived from function_base, and indicate that the
+    function never has side effects.  It is only necessary to use this
+    wrapper on functions that might have floating-point suffixes, since
+    otherwise we assume by default that the function has no side effects.  */
+ template<typename T>
+ class quiet : public T
+ {
+ public:
+   CONSTEXPR quiet () : T () {}
+ 
+   /* Unfortunately we can't use parameter packs yet.  */
+   template<typename T1>
+   CONSTEXPR quiet (const T1 &t1) : T (t1) {}
+ 
+   template<typename T1, typename T2>
+   CONSTEXPR quiet (const T1 &t1, const T2 &t2) : T (t1, t2) {}
+ 
+   template<typename T1, typename T2, typename T3>
+   CONSTEXPR quiet (const T1 &t1, const T2 &t2, const T3 &t3)
+     : T (t1, t2, t3) {}
+ 
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return 0;
+   }
+ };
+ 
+ /* A function_base that sometimes or always operates on tuples of
+    vectors.  */
+ class multi_vector_function : public function_base
+ {
+ public:
+   CONSTEXPR multi_vector_function (unsigned int vectors_per_tuple)
+     : m_vectors_per_tuple (vectors_per_tuple) {}
+ 
+   unsigned int
+   vectors_per_tuple () const OVERRIDE
+   {
+     return m_vectors_per_tuple;
+   }
+ 
+   /* The number of vectors in a tuple, or 1 if the function only operates
+      on single vectors.  */
+   unsigned int m_vectors_per_tuple;
+ };
+ 
+ /* A function_base that loads or stores contiguous memory elements
+    without extending or truncating them.  */
+ class full_width_access : public multi_vector_function
+ {
+ public:
+   CONSTEXPR full_width_access (unsigned int vectors_per_tuple = 1)
+     : multi_vector_function (vectors_per_tuple) {}
+ 
+   tree
+   memory_scalar_type (const function_instance &fi) const OVERRIDE
+   {
+     return fi.scalar_type (0);
+   }
+ 
+   machine_mode
+   memory_vector_mode (const function_instance &fi) const OVERRIDE
+   {
+     machine_mode mode = fi.vector_mode (0);
+     if (m_vectors_per_tuple != 1)
+       mode = targetm.array_mode (mode, m_vectors_per_tuple).require ();
+     return mode;
+   }
+ };
+ 
+ /* A function_base that loads elements from memory and extends them
+    to a wider element.  The memory element type is a fixed part of
+    the function base name.  */
+ class extending_load : public function_base
+ {
+ public:
+   CONSTEXPR extending_load (type_suffix_index memory_type)
+     : m_memory_type (memory_type) {}
+ 
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_READ_MEMORY;
+   }
+ 
+   tree
+   memory_scalar_type (const function_instance &) const OVERRIDE
+   {
+     return scalar_types[type_suffixes[m_memory_type].vector_type];
+   }
+ 
+   machine_mode
+   memory_vector_mode (const function_instance &fi) const OVERRIDE
+   {
+     machine_mode mem_mode = type_suffixes[m_memory_type].vector_mode;
+     machine_mode reg_mode = fi.vector_mode (0);
+     return aarch64_sve_data_mode (GET_MODE_INNER (mem_mode),
+ 				  GET_MODE_NUNITS (reg_mode)).require ();
+   }
+ 
+   /* Return the rtx code associated with the kind of extension that
+      the load performs.  */
+   rtx_code
+   extend_rtx_code () const
+   {
+     return (type_suffixes[m_memory_type].unsigned_p
+ 	    ? ZERO_EXTEND : SIGN_EXTEND);
+   }
+ 
+   /* The type of the memory elements.  This is part of the function base
+      name rather than a true type suffix.  */
+   type_suffix_index m_memory_type;
+ };
+ 
+ /* A function_base that truncates vector elements and stores them to memory.
+    The memory element width is a fixed part of the function base name.  */
+ class truncating_store : public function_base
+ {
+ public:
+   CONSTEXPR truncating_store (scalar_int_mode to_mode) : m_to_mode (to_mode) {}
+ 
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_WRITE_MEMORY;
+   }
+ 
+   tree
+   memory_scalar_type (const function_instance &fi) const OVERRIDE
+   {
+     /* In truncating stores, the signedness of the memory element is defined
+        to be the same as the signedness of the vector element.  The signedness
+        doesn't make any difference to the behavior of the function.  */
+     type_class_index tclass = fi.type_suffix (0).tclass;
+     unsigned int element_bits = GET_MODE_BITSIZE (m_to_mode);
+     type_suffix_index suffix = find_type_suffix (tclass, element_bits);
+     return scalar_types[type_suffixes[suffix].vector_type];
+   }
+ 
+   machine_mode
+   memory_vector_mode (const function_instance &fi) const OVERRIDE
+   {
+     poly_uint64 nunits = GET_MODE_NUNITS (fi.vector_mode (0));
+     return aarch64_sve_data_mode (m_to_mode, nunits).require ();
+   }
+ 
+   /* The mode of a single memory element.  */
+   scalar_int_mode m_to_mode;
+ };
+ 
+ /* An incomplete function_base for functions that have an associated rtx code.
+    It simply records information about the mapping for derived classes
+    to use.  */
+ class rtx_code_function_base : public function_base
+ {
+ public:
+   CONSTEXPR rtx_code_function_base (rtx_code code_for_sint,
+ 				    rtx_code code_for_uint,
+ 				    int unspec_for_fp = -1)
+     : m_code_for_sint (code_for_sint), m_code_for_uint (code_for_uint),
+       m_unspec_for_fp (unspec_for_fp) {}
+ 
+   /* The rtx code to use for signed and unsigned integers respectively.
+      Can be UNKNOWN for functions that don't have integer forms.  */
+   rtx_code m_code_for_sint;
+   rtx_code m_code_for_uint;
+ 
+   /* The UNSPEC_COND_* to use for floating-point operations.  Can be -1
+      for functions that only operate on integers.  */
+   int m_unspec_for_fp;
+ };
+ 
+ /* A function_base for functions that have an associated rtx code.
+    It supports all forms of predication except PRED_implicit.  */
+ class rtx_code_function : public rtx_code_function_base
+ {
+ public:
+   CONSTEXPR rtx_code_function (rtx_code code_for_sint, rtx_code code_for_uint,
+ 			       int unspec_for_fp = -1)
+     : rtx_code_function_base (code_for_sint, code_for_uint, unspec_for_fp) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return e.map_to_rtx_codes (m_code_for_sint, m_code_for_uint,
+ 			       m_unspec_for_fp);
+   }
+ };
+ 
+ /* Like rtx_code_function, but for functions that take what is normally
+    the final argument first.  One use of this class is to handle binary
+    reversed operations; another is to handle MLA-style operations that
+    are normally expressed in GCC as MAD-style operations.  */
+ class rtx_code_function_rotated : public rtx_code_function_base
+ {
+ public:
+   CONSTEXPR rtx_code_function_rotated (rtx_code code_for_sint,
+ 				       rtx_code code_for_uint,
+ 				       int unspec_for_fp = -1)
+     : rtx_code_function_base (code_for_sint, code_for_uint, unspec_for_fp) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Rotate the inputs into their normal order, but continue to make _m
+        functions merge with what was originally the first vector argument.  */
+     unsigned int nargs = e.args.length ();
+     e.rotate_inputs_left (e.pred != PRED_none ? 1 : 0, nargs);
+     return e.map_to_rtx_codes (m_code_for_sint, m_code_for_uint,
+ 			       m_unspec_for_fp, nargs - 1);
+   }
+ };
+ 
+ /* An incomplete function_base for functions that have an associated
+    unspec code, with separate codes for signed integers, unsigned
+    integers and floating-point values.  The class simply records
+    information about the mapping for derived classes to use.  */
+ class unspec_based_function_base : public function_base
+ {
+ public:
+   CONSTEXPR unspec_based_function_base (int unspec_for_sint,
+ 					int unspec_for_uint,
+ 					int unspec_for_fp)
+     : m_unspec_for_sint (unspec_for_sint),
+       m_unspec_for_uint (unspec_for_uint),
+       m_unspec_for_fp (unspec_for_fp)
+   {}
+ 
+   /* Return the unspec code to use for INSTANCE, based on type suffix 0.  */
+   int
+   unspec_for (const function_instance &instance) const
+   {
+     return (!instance.type_suffix (0).integer_p ? m_unspec_for_fp
+ 	    : instance.type_suffix (0).unsigned_p ? m_unspec_for_uint
+ 	    : m_unspec_for_sint);
+   }
+ 
+   /* The unspec code associated with signed-integer, unsigned-integer
+      and floating-point operations respectively.  */
+   int m_unspec_for_sint;
+   int m_unspec_for_uint;
+   int m_unspec_for_fp;
+ };
+ 
+ /* A function_base for functions that have an associated unspec code.
+    It supports all forms of predication except PRED_implicit.  */
+ class unspec_based_function : public unspec_based_function_base
+ {
+ public:
+   CONSTEXPR unspec_based_function (int unspec_for_sint, int unspec_for_uint,
+ 				   int unspec_for_fp)
+     : unspec_based_function_base (unspec_for_sint, unspec_for_uint,
+ 				  unspec_for_fp)
+   {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return e.map_to_unspecs (m_unspec_for_sint, m_unspec_for_uint,
+ 			     m_unspec_for_fp);
+   }
+ };
+ 
+ /* Like unspec_based_function, but for functions that take what is normally
+    the final argument first.  One use of this class is to handle binary
+    reversed operations; another is to handle MLA-style operations that
+    are normally expressed in GCC as MAD-style operations.  */
+ class unspec_based_function_rotated : public unspec_based_function_base
+ {
+ public:
+   CONSTEXPR unspec_based_function_rotated (int unspec_for_sint,
+ 					   int unspec_for_uint,
+ 					   int unspec_for_fp)
+     : unspec_based_function_base (unspec_for_sint, unspec_for_uint,
+ 				  unspec_for_fp)
+   {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Rotate the inputs into their normal order, but continue to make _m
+        functions merge with what was originally the first vector argument.  */
+     unsigned int nargs = e.args.length ();
+     e.rotate_inputs_left (e.pred != PRED_none ? 1 : 0, nargs);
+     return e.map_to_unspecs (m_unspec_for_sint, m_unspec_for_uint,
+ 			     m_unspec_for_fp, nargs - 1);
+   }
+ };
+ 
+ /* Like unspec_based_function, but map the function directly to
+    CODE (UNSPEC, M) instead of using the generic predication-based
+    expansion. where M is the vector mode associated with type suffix 0.
+    This is useful if the unspec doesn't describe the full operation or
+    if the usual predication rules don't apply for some reason.  */
+ template<insn_code (*CODE) (int, machine_mode)>
+ class unspec_based_function_exact_insn : public unspec_based_function_base
+ {
+ public:
+   CONSTEXPR unspec_based_function_exact_insn (int unspec_for_sint,
+ 					      int unspec_for_uint,
+ 					      int unspec_for_fp)
+     : unspec_based_function_base (unspec_for_sint, unspec_for_uint,
+ 				  unspec_for_fp)
+   {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return e.use_exact_insn (CODE (unspec_for (e), e.vector_mode (0)));
+   }
+ };
+ 
+ /* A function that performs an unspec and then adds it to another value.  */
+ typedef unspec_based_function_exact_insn<code_for_aarch64_sve_add>
+   unspec_based_add_function;
+ typedef unspec_based_function_exact_insn<code_for_aarch64_sve_add_lane>
+   unspec_based_add_lane_function;
+ 
+ /* Generic unspec-based _lane function.  */
+ typedef unspec_based_function_exact_insn<code_for_aarch64_sve_lane>
+   unspec_based_lane_function;
+ 
+ /* A functon that uses aarch64_pred* patterns regardless of the
+    predication type.  */
+ typedef unspec_based_function_exact_insn<code_for_aarch64_pred>
+   unspec_based_pred_function;
+ 
+ /* Like unspec_based_add_function and unspec_based_add_lane_function,
+    but using saturating addition.  */
+ typedef unspec_based_function_exact_insn<code_for_aarch64_sve_qadd>
+   unspec_based_qadd_function;
+ typedef unspec_based_function_exact_insn<code_for_aarch64_sve_qadd_lane>
+   unspec_based_qadd_lane_function;
+ 
+ /* Like unspec_based_sub_function and unspec_based_sub_lane_function,
+    but using saturating subtraction.  */
+ typedef unspec_based_function_exact_insn<code_for_aarch64_sve_qsub>
+   unspec_based_qsub_function;
+ typedef unspec_based_function_exact_insn<code_for_aarch64_sve_qsub_lane>
+   unspec_based_qsub_lane_function;
+ 
+ /* A function that performs an unspec and then subtracts it from
+    another value.  */
+ typedef unspec_based_function_exact_insn<code_for_aarch64_sve_sub>
+   unspec_based_sub_function;
+ typedef unspec_based_function_exact_insn<code_for_aarch64_sve_sub_lane>
+   unspec_based_sub_lane_function;
+ 
+ /* A function that acts like unspec_based_function_exact_insn<INT_CODE>
+    when operating on integers, but that expands to an (fma ...)-style
+    aarch64_sve* operation when applied to floats.  */
+ template<insn_code (*INT_CODE) (int, machine_mode)>
+ class unspec_based_fused_function : public unspec_based_function_base
+ {
+ public:
+   CONSTEXPR unspec_based_fused_function (int unspec_for_sint,
+ 					 int unspec_for_uint,
+ 					 int unspec_for_fp)
+     : unspec_based_function_base (unspec_for_sint, unspec_for_uint,
+ 				  unspec_for_fp)
+   {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     int unspec = unspec_for (e);
+     insn_code icode;
+     if (e.type_suffix (0).float_p)
+       {
+ 	/* Put the operands in the normal (fma ...) order, with the accumulator
+ 	   last.  This fits naturally since that's also the unprinted operand
+ 	   in the asm output.  */
+ 	e.rotate_inputs_left (0, e.pred != PRED_none ? 4 : 3);
+ 	icode = code_for_aarch64_sve (unspec, e.vector_mode (0));
+       }
+     else
+       icode = INT_CODE (unspec, e.vector_mode (0));
+     return e.use_exact_insn (icode);
+   }
+ };
+ typedef unspec_based_fused_function<code_for_aarch64_sve_add>
+   unspec_based_mla_function;
+ typedef unspec_based_fused_function<code_for_aarch64_sve_sub>
+   unspec_based_mls_function;
+ 
+ /* Like unspec_based_fused_function, but for _lane functions.  */
+ template<insn_code (*INT_CODE) (int, machine_mode)>
+ class unspec_based_fused_lane_function : public unspec_based_function_base
+ {
+ public:
+   CONSTEXPR unspec_based_fused_lane_function (int unspec_for_sint,
+ 					      int unspec_for_uint,
+ 					      int unspec_for_fp)
+     : unspec_based_function_base (unspec_for_sint, unspec_for_uint,
+ 				  unspec_for_fp)
+   {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     int unspec = unspec_for (e);
+     insn_code icode;
+     if (e.type_suffix (0).float_p)
+       {
+ 	/* Put the operands in the normal (fma ...) order, with the accumulator
+ 	   last.  This fits naturally since that's also the unprinted operand
+ 	   in the asm output.  */
+ 	e.rotate_inputs_left (0, e.pred != PRED_none ? 5 : 4);
+ 	icode = code_for_aarch64_lane (unspec, e.vector_mode (0));
+       }
+     else
+       icode = INT_CODE (unspec, e.vector_mode (0));
+     return e.use_exact_insn (icode);
+   }
+ };
+ typedef unspec_based_fused_lane_function<code_for_aarch64_sve_add_lane>
+   unspec_based_mla_lane_function;
+ typedef unspec_based_fused_lane_function<code_for_aarch64_sve_sub_lane>
+   unspec_based_mls_lane_function;
+ 
+ /* A function_base that uses CODE_FOR_MODE (M) to get the associated
+    instruction code, where M is the vector mode associated with type
+    suffix N.  */
+ template<insn_code (*CODE_FOR_MODE) (machine_mode), unsigned int N>
+ class code_for_mode_function : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return e.use_exact_insn (CODE_FOR_MODE (e.vector_mode (N)));
+   }
+ };
+ 
+ /* A function that uses code_for_<PATTERN> (M), where M is the vector
+    mode associated with the first type suffix.  */
+ #define CODE_FOR_MODE0(PATTERN) code_for_mode_function<code_for_##PATTERN, 0>
+ 
+ /* Likewise for the second type suffix.  */
+ #define CODE_FOR_MODE1(PATTERN) code_for_mode_function<code_for_##PATTERN, 1>
+ 
+ /* Like CODE_FOR_MODE0, but the function doesn't raise exceptions when
+    operating on floating-point data.  */
+ #define QUIET_CODE_FOR_MODE0(PATTERN) \
+   quiet< code_for_mode_function<code_for_##PATTERN, 0> >
+ 
+ /* A function_base for functions that always expand to a fixed insn pattern,
+    regardless of what the suffixes are.  */
+ class fixed_insn_function : public function_base
+ {
+ public:
+   CONSTEXPR fixed_insn_function (insn_code code) : m_code (code) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return e.use_exact_insn (m_code);
+   }
+ 
+   /* The instruction to use.  */
+   insn_code m_code;
+ };
+ 
+ /* A function_base for functions that permute their arguments.  */
+ class permute : public quiet<function_base>
+ {
+ public:
+   /* Fold a unary or binary permute with the permute vector given by
+      BUILDER.  */
+   gimple *
+   fold_permute (const gimple_folder &f, const vec_perm_builder &builder) const
+   {
+     /* Punt for now on _b16 and wider; we'd need more complex evpc logic
+        to rerecognize the result.  */
+     if (f.type_suffix (0).bool_p && f.type_suffix (0).element_bits > 8)
+       return NULL;
+ 
+     unsigned int nargs = gimple_call_num_args (f.call);
+     poly_uint64 nelts = TYPE_VECTOR_SUBPARTS (TREE_TYPE (f.lhs));
+     vec_perm_indices indices (builder, nargs, nelts);
+     tree perm_type = build_vector_type (ssizetype, nelts);
+     return gimple_build_assign (f.lhs, VEC_PERM_EXPR,
+ 				gimple_call_arg (f.call, 0),
+ 				gimple_call_arg (f.call, nargs - 1),
+ 				vec_perm_indices_to_tree (perm_type, indices));
+   }
+ };
+ 
+ /* A function_base for functions that permute two vectors using a fixed
+    choice of indices.  */
+ class binary_permute : public permute
+ {
+ public:
+   CONSTEXPR binary_permute (int unspec) : m_unspec (unspec) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     insn_code icode = code_for_aarch64_sve (m_unspec, e.vector_mode (0));
+     return e.use_exact_insn (icode);
+   }
+ 
+   /* The unspec code associated with the operation.  */
+   int m_unspec;
+ };
+ 
+ /* A function_base for functions that reduce a vector to a scalar.  */
+ class reduction : public function_base
+ {
+ public:
+   CONSTEXPR reduction (int unspec)
+     : m_unspec_for_sint (unspec),
+       m_unspec_for_uint (unspec),
+       m_unspec_for_fp (unspec)
+   {}
+ 
+   CONSTEXPR reduction (int unspec_for_sint, int unspec_for_uint,
+ 		       int unspec_for_fp)
+     : m_unspec_for_sint (unspec_for_sint),
+       m_unspec_for_uint (unspec_for_uint),
+       m_unspec_for_fp (unspec_for_fp)
+   {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = e.vector_mode (0);
+     int unspec = (!e.type_suffix (0).integer_p ? m_unspec_for_fp
+ 		  : e.type_suffix (0).unsigned_p ? m_unspec_for_uint
+ 		  : m_unspec_for_sint);
+     /* There's no distinction between SADDV and UADDV for 64-bit elements;
+        the signed versions only exist for narrower elements.  */
+     if (GET_MODE_UNIT_BITSIZE (mode) == 64 && unspec == UNSPEC_SADDV)
+       unspec = UNSPEC_UADDV;
+     return e.use_exact_insn (code_for_aarch64_pred_reduc (unspec, mode));
+   }
+ 
+   /* The unspec code associated with signed-integer, unsigned-integer
+      and floating-point operations respectively.  */
+   int m_unspec_for_sint;
+   int m_unspec_for_uint;
+   int m_unspec_for_fp;
+ };
+ 
+ /* A function_base for functions that shift narrower-than-64-bit values
+    by 64-bit amounts.  */
+ class shift_wide : public function_base
+ {
+ public:
+   CONSTEXPR shift_wide (rtx_code code, int wide_unspec)
+     : m_code (code), m_wide_unspec (wide_unspec) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = e.vector_mode (0);
+     machine_mode elem_mode = GET_MODE_INNER (mode);
+ 
+     /* If the argument is a constant that the normal shifts can handle
+        directly, use them instead.  */
+     rtx shift = unwrap_const_vec_duplicate (e.args.last ());
+     if (aarch64_simd_shift_imm_p (shift, elem_mode, m_code == ASHIFT))
+       {
+ 	e.args.last () = shift;
+ 	return e.map_to_rtx_codes (m_code, m_code, -1);
+       }
+ 
+     if (e.pred == PRED_x)
+       return e.use_unpred_insn (code_for_aarch64_sve (m_wide_unspec, mode));
+ 
+     return e.use_cond_insn (code_for_cond (m_wide_unspec, mode));
+   }
+ 
+   /* The rtx code associated with a "normal" shift.  */
+   rtx_code m_code;
+ 
+   /* The unspec code associated with the wide shift.  */
+   int m_wide_unspec;
+ };
+ 
+ /* A function_base for unary functions that count bits.  */
+ class unary_count : public quiet<function_base>
+ {
+ public:
+   CONSTEXPR unary_count (rtx_code code) : m_code (code) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* The md patterns treat the operand as an integer.  */
+     machine_mode mode = aarch64_sve_int_mode (e.vector_mode (0));
+     e.args.last () = gen_lowpart (mode, e.args.last ());
+ 
+     if (e.pred == PRED_x)
+       return e.use_pred_x_insn (code_for_aarch64_pred (m_code, mode));
+ 
+     return e.use_cond_insn (code_for_cond (m_code, mode));
+   }
+ 
+   /* The rtx code associated with the operation.  */
+   rtx_code m_code;
+ };
+ 
+ /* A function_base for svwhile* functions.  */
+ class while_comparison : public function_base
+ {
+ public:
+   CONSTEXPR while_comparison (int unspec_for_sint, int unspec_for_uint)
+     : m_unspec_for_sint (unspec_for_sint),
+       m_unspec_for_uint (unspec_for_uint)
+   {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Suffix 0 determines the predicate mode, suffix 1 determines the
+        scalar mode and signedness.  */
+     int unspec = (e.type_suffix (1).unsigned_p
+ 		  ? m_unspec_for_uint
+ 		  : m_unspec_for_sint);
+     machine_mode pred_mode = e.vector_mode (0);
+     scalar_mode reg_mode = GET_MODE_INNER (e.vector_mode (1));
+     return e.use_exact_insn (code_for_while (unspec, reg_mode, pred_mode));
+   }
+ 
+   /* The unspec codes associated with signed and unsigned operations
+      respectively.  */
+   int m_unspec_for_sint;
+   int m_unspec_for_uint;
+ };
+ 
+ }
+ 
+ /* Declare the global function base NAME, creating it from an instance
+    of class CLASS with constructor arguments ARGS.  */
+ #define FUNCTION(NAME, CLASS, ARGS) \
+   namespace { static CONSTEXPR const CLASS NAME##_obj ARGS; } \
+   namespace functions { const function_base *const NAME = &NAME##_obj; }
+ 
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,3451 ----
+ /* ACLE support for AArch64 SVE (function shapes)
+    Copyright (C) 2018-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tm.h"
+ #include "tree.h"
+ #include "rtl.h"
+ #include "tm_p.h"
+ #include "memmodel.h"
+ #include "insn-codes.h"
+ #include "optabs.h"
+ #include "aarch64-sve-builtins.h"
+ #include "aarch64-sve-builtins-shapes.h"
+ 
+ /* In the comments below, _t0 represents the first type suffix and _t1
+    represents the second.  Square brackets enclose characters that are
+    present in only the full name, not the overloaded name.  Governing
+    predicate arguments and predicate suffixes are not shown, since they
+    depend on the predication type, which is a separate piece of
+    information from the shape.
+ 
+    Non-overloaded functions may have additional suffixes beyond the
+    ones shown, if those suffixes don't affect the types in the type
+    signature.  E.g. the predicate form of svtrn1 has a _b<bits> suffix,
+    but this does not affect the prototype, which is always
+    "svbool_t(svbool_t, svbool_t)".  */
+ 
+ namespace aarch64_sve {
+ 
+ /* Return a representation of "const T *".  */
+ static tree
+ build_const_pointer (tree t)
+ {
+   return build_pointer_type (build_qualified_type (t, TYPE_QUAL_CONST));
+ }
+ 
+ /* If INSTANCE has a governing predicate, add it to the list of argument
+    types in ARGUMENT_TYPES.  RETURN_TYPE is the type returned by the
+    function.  */
+ static void
+ apply_predication (const function_instance &instance, tree return_type,
+ 		   vec<tree> &argument_types)
+ {
+   if (instance.pred != PRED_none)
+     {
+       argument_types.quick_insert (0, get_svbool_t ());
+       /* For unary merge operations, the first argument is a vector with
+ 	 the same type as the result.  For unary_convert_narrowt it also
+ 	 provides the "bottom" half of active elements, and is present
+ 	 for all types of predication.  */
+       if ((argument_types.length () == 2 && instance.pred == PRED_m)
+ 	  || instance.shape == shapes::unary_convert_narrowt)
+ 	argument_types.quick_insert (0, return_type);
+     }
+ }
+ 
+ /* Parse and move past an element type in FORMAT and return it as a type
+    suffix.  The format is:
+ 
+    [01]    - the element type in type suffix 0 or 1 of INSTANCE
+    f<bits> - a floating-point type with the given number of bits
+    f[01]   - a floating-point type with the same width as type suffix 0 or 1
+    B       - bfloat16_t
+    h<elt>  - a half-sized version of <elt>
+    p       - a predicate (represented as TYPE_SUFFIX_b)
+    q<elt>  - a quarter-sized version of <elt>
+    s<bits> - a signed type with the given number of bits
+    s[01]   - a signed type with the same width as type suffix 0 or 1
+    u<bits> - an unsigned type with the given number of bits
+    u[01]   - an unsigned type with the same width as type suffix 0 or 1
+    w<elt>  - a 64-bit version of <elt> if <elt> is integral, otherwise <elt>
+ 
+    where <elt> is another element type.  */
+ static type_suffix_index
+ parse_element_type (const function_instance &instance, const char *&format)
+ {
+   int ch = *format++;
+ 
+   if (ch == 'f' || ch == 's' || ch == 'u')
+     {
+       type_class_index tclass = (ch == 'f' ? TYPE_float
+ 				 : ch == 's' ? TYPE_signed
+ 				 : TYPE_unsigned);
+       char *end;
+       unsigned int bits = strtol (format, &end, 10);
+       format = end;
+       if (bits == 0 || bits == 1)
+ 	bits = instance.type_suffix (bits).element_bits;
+       return find_type_suffix (tclass, bits);
+     }
+ 
+   if (ch == 'w')
+     {
+       type_suffix_index suffix = parse_element_type (instance, format);
+       if (type_suffixes[suffix].integer_p)
+ 	return find_type_suffix (type_suffixes[suffix].tclass, 64);
+       return suffix;
+     }
+ 
+   if (ch == 'p')
+     return TYPE_SUFFIX_b;
+ 
+   if (ch == 'B')
+     return TYPE_SUFFIX_bf16;
+ 
+   if (ch == 'q')
+     {
+       type_suffix_index suffix = parse_element_type (instance, format);
+       return find_type_suffix (type_suffixes[suffix].tclass,
+ 			       type_suffixes[suffix].element_bits / 4);
+     }
+ 
+   if (ch == 'h')
+     {
+       type_suffix_index suffix = parse_element_type (instance, format);
+       /* Widening and narrowing doesn't change the type for predicates;
+ 	 everything's still an svbool_t.  */
+       if (suffix == TYPE_SUFFIX_b)
+ 	return suffix;
+       return find_type_suffix (type_suffixes[suffix].tclass,
+ 			       type_suffixes[suffix].element_bits / 2);
+     }
+ 
+   if (ch == '0' || ch == '1')
+     return instance.type_suffix_ids[ch - '0'];
+ 
+   gcc_unreachable ();
+ }
+ 
+ /* Read and return a type from FORMAT for function INSTANCE.  Advance
+    FORMAT beyond the type string.  The format is:
+ 
+    _       - void
+    al      - array pointer for loads
+    ap      - array pointer for prefetches
+    as      - array pointer for stores
+    b       - base vector type (from a _<m0>base suffix)
+    d       - displacement vector type (from a _<m1>index or _<m1>offset suffix)
+    e<name> - an enum with the given name
+    s<elt>  - a scalar type with the given element suffix
+    t<elt>  - a vector or tuple type with given element suffix [*1]
+    v<elt>  - a vector with the given element suffix
+ 
+    where <elt> has the format described above parse_element_type
+ 
+    [*1] the vectors_per_tuple function indicates whether the type should
+         be a tuple, and if so, how many vectors it should contain.  */
+ static tree
+ parse_type (const function_instance &instance, const char *&format)
+ {
+   int ch = *format++;
+ 
+   if (ch == '_')
+     return void_type_node;
+ 
+   if (ch == 'a')
+     {
+       ch = *format++;
+       if (ch == 'l')
+ 	return build_const_pointer (instance.memory_scalar_type ());
+       if (ch == 'p')
+ 	return const_ptr_type_node;
+       if (ch == 's')
+ 	return build_pointer_type (instance.memory_scalar_type ());
+       gcc_unreachable ();
+     }
+ 
+   if (ch == 'b')
+     return instance.base_vector_type ();
+ 
+   if (ch == 'd')
+     return instance.displacement_vector_type ();
+ 
+   if (ch == 'e')
+     {
+       if (strncmp (format, "pattern", 7) == 0)
+ 	{
+ 	  format += 7;
+ 	  return acle_svpattern;
+ 	}
+       if (strncmp (format, "prfop", 5) == 0)
+ 	{
+ 	  format += 5;
+ 	  return acle_svprfop;
+ 	}
+       gcc_unreachable ();
+     }
+ 
+   if (ch == 's')
+     {
+       type_suffix_index suffix = parse_element_type (instance, format);
+       return scalar_types[type_suffixes[suffix].vector_type];
+     }
+ 
+   if (ch == 't')
+     {
+       type_suffix_index suffix = parse_element_type (instance, format);
+       vector_type_index vector_type = type_suffixes[suffix].vector_type;
+       unsigned int num_vectors = instance.vectors_per_tuple ();
+       return acle_vector_types[num_vectors - 1][vector_type];
+     }
+ 
+   if (ch == 'v')
+     {
+       type_suffix_index suffix = parse_element_type (instance, format);
+       return acle_vector_types[0][type_suffixes[suffix].vector_type];
+     }
+ 
+   gcc_unreachable ();
+ }
+ 
+ /* Read and move past any argument count at FORMAT for the function
+    signature of INSTANCE.  The counts are:
+ 
+    *q: one argument per element in a 128-bit quadword (as for svdupq)
+    *t: one argument per vector in a tuple (as for svcreate)
+ 
+    Otherwise the count is 1.  */
+ static unsigned int
+ parse_count (const function_instance &instance, const char *&format)
+ {
+   if (format[0] == '*' && format[1] == 'q')
+     {
+       format += 2;
+       return instance.elements_per_vq (0);
+     }
+   if (format[0] == '*' && format[1] == 't')
+     {
+       format += 2;
+       return instance.vectors_per_tuple ();
+     }
+   return 1;
+ }
+ 
+ /* Read a type signature for INSTANCE from FORMAT.  Add the argument types
+    to ARGUMENT_TYPES and return the return type.
+ 
+    The format is a comma-separated list of types (as for parse_type),
+    with the first type being the return type and the rest being the
+    argument types.  Each argument type can be followed by an optional
+    count (as for parse_count).  */
+ static tree
+ parse_signature (const function_instance &instance, const char *format,
+ 		 vec<tree> &argument_types)
+ {
+   tree return_type = parse_type (instance, format);
+   while (format[0] == ',')
+     {
+       format += 1;
+       tree argument_type = parse_type (instance, format);
+       unsigned int count = parse_count (instance, format);
+       for (unsigned int i = 0; i < count; ++i)
+ 	argument_types.quick_push (argument_type);
+     }
+   gcc_assert (format[0] == 0);
+   return return_type;
+ }
+ 
+ /* Add one function instance for GROUP, using mode suffix MODE_SUFFIX_ID,
+    the type suffixes at index TI and the predication suffix at index PI.
+    The other arguments are as for build_all.  */
+ static void
+ build_one (function_builder &b, const char *signature,
+ 	   const function_group_info &group, mode_suffix_index mode_suffix_id,
+ 	   unsigned int ti, unsigned int pi, bool force_direct_overloads)
+ {
+   /* Byte forms of svdupq take 16 arguments.  */
+   auto_vec<tree, 16> argument_types;
+   function_instance instance (group.base_name, *group.base, *group.shape,
+ 			      mode_suffix_id, group.types[ti],
+ 			      group.preds[pi]);
+   tree return_type = parse_signature (instance, signature, argument_types);
+   apply_predication (instance, return_type, argument_types);
+   b.add_unique_function (instance, return_type, argument_types,
+ 			 group.required_extensions, force_direct_overloads);
+ }
+ 
+ /* GROUP describes some sort of gather or scatter operation.  There are
+    two cases:
+ 
+    - If the function has any type suffixes (as for loads and stores), the
+      first function type suffix specifies either a 32-bit or a 64-bit type,
+      which in turn selects either MODE32 or MODE64 as the addressing mode.
+      Add a function instance for every type and predicate combination
+      in GROUP for which the associated addressing mode is not MODE_none.
+ 
+    - If the function has no type suffixes (as for prefetches), add one
+      MODE32 form and one MODE64 form for each predication type.
+ 
+    The other arguments are as for build_all.  */
+ static void
+ build_32_64 (function_builder &b, const char *signature,
+ 	     const function_group_info &group, mode_suffix_index mode32,
+ 	     mode_suffix_index mode64, bool force_direct_overloads = false)
+ {
+   for (unsigned int pi = 0; group.preds[pi] != NUM_PREDS; ++pi)
+     if (group.types[0][0] == NUM_TYPE_SUFFIXES)
+       {
+ 	gcc_assert (mode32 != MODE_none && mode64 != MODE_none);
+ 	build_one (b, signature, group, mode32, 0, pi,
+ 		   force_direct_overloads);
+ 	build_one (b, signature, group, mode64, 0, pi,
+ 		   force_direct_overloads);
+       }
+     else
+       for (unsigned int ti = 0; group.types[ti][0] != NUM_TYPE_SUFFIXES; ++ti)
+ 	{
+ 	  unsigned int bits = type_suffixes[group.types[ti][0]].element_bits;
+ 	  gcc_assert (bits == 32 || bits == 64);
+ 	  mode_suffix_index mode = bits == 32 ? mode32 : mode64;
+ 	  if (mode != MODE_none)
+ 	    build_one (b, signature, group, mode, ti, pi,
+ 		       force_direct_overloads);
+ 	}
+ }
+ 
+ /* For every type and predicate combination in GROUP, add one function
+    that takes a scalar (pointer) base and a signed vector array index,
+    and another that instead takes an unsigned vector array index.
+    The vector array index has the same element size as the first
+    function type suffix.  SIGNATURE is as for build_all.  */
+ static void
+ build_sv_index (function_builder &b, const char *signature,
+ 		const function_group_info &group)
+ {
+   build_32_64 (b, signature, group, MODE_s32index, MODE_s64index);
+   build_32_64 (b, signature, group, MODE_u32index, MODE_u64index);
+ }
+ 
+ /* Like build_sv_index, but only handle 64-bit types.  */
+ static void
+ build_sv_index64 (function_builder &b, const char *signature,
+ 		  const function_group_info &group)
+ {
+   build_32_64 (b, signature, group, MODE_none, MODE_s64index);
+   build_32_64 (b, signature, group, MODE_none, MODE_u64index);
+ }
+ 
+ /* Like build_sv_index, but taking vector byte offsets instead of vector
+    array indices.  */
+ static void
+ build_sv_offset (function_builder &b, const char *signature,
+ 		 const function_group_info &group)
+ {
+   build_32_64 (b, signature, group, MODE_s32offset, MODE_s64offset);
+   build_32_64 (b, signature, group, MODE_u32offset, MODE_u64offset);
+ }
+ 
+ /* Like build_sv_offset, but exclude offsets that must be interpreted
+    as signed (i.e. s32offset).  */
+ static void
+ build_sv_uint_offset (function_builder &b, const char *signature,
+ 		      const function_group_info &group)
+ {
+   build_32_64 (b, signature, group, MODE_none, MODE_s64offset);
+   build_32_64 (b, signature, group, MODE_u32offset, MODE_u64offset);
+ }
+ 
+ /* For every type and predicate combination in GROUP, add a function
+    that takes a vector base address and no displacement.  The vector
+    base has the same element size as the first type suffix.
+ 
+    The other arguments are as for build_all.  */
+ static void
+ build_v_base (function_builder &b, const char *signature,
+ 	      const function_group_info &group,
+ 	      bool force_direct_overloads = false)
+ {
+   build_32_64 (b, signature, group, MODE_u32base, MODE_u64base,
+ 	       force_direct_overloads);
+ }
+ 
+ /* Like build_v_base, but for functions that also take a scalar array
+    index.  */
+ static void
+ build_vs_index (function_builder &b, const char *signature,
+ 		const function_group_info &group,
+ 		bool force_direct_overloads = false)
+ {
+   build_32_64 (b, signature, group, MODE_u32base_index, MODE_u64base_index,
+ 	       force_direct_overloads);
+ }
+ 
+ /* Like build_v_base, but for functions that also take a scalar byte
+    offset.  */
+ static void
+ build_vs_offset (function_builder &b, const char *signature,
+ 		 const function_group_info &group,
+ 		 bool force_direct_overloads = false)
+ {
+   build_32_64 (b, signature, group, MODE_u32base_offset, MODE_u64base_offset,
+ 	       force_direct_overloads);
+ }
+ 
+ /* Add a function instance for every type and predicate combination
+    in GROUP.  Take the function base name from GROUP and the mode suffix
+    from MODE_SUFFIX_ID.  Use SIGNATURE to construct the function signature
+    without a governing predicate, then use apply_predication to add in the
+    predicate.  FORCE_DIRECT_OVERLOADS is true if there is a one-to-one
+    mapping between "short" and "full" names, and if standard overload
+    resolution therefore isn't necessary.  */
+ static void
+ build_all (function_builder &b, const char *signature,
+ 	   const function_group_info &group, mode_suffix_index mode_suffix_id,
+ 	   bool force_direct_overloads = false)
+ {
+   for (unsigned int pi = 0; group.preds[pi] != NUM_PREDS; ++pi)
+     for (unsigned int ti = 0;
+ 	 ti == 0 || group.types[ti][0] != NUM_TYPE_SUFFIXES; ++ti)
+       build_one (b, signature, group, mode_suffix_id, ti, pi,
+ 		 force_direct_overloads);
+ }
+ 
+ /* TYPE is the largest type suffix associated with the arguments of R,
+    but the result is twice as wide.  Return the associated type suffix
+    if it exists, otherwise report an appropriate error and return
+    NUM_TYPE_SUFFIXES.  */
+ static type_suffix_index
+ long_type_suffix (function_resolver &r, type_suffix_index type)
+ {
+   unsigned int element_bits = type_suffixes[type].element_bits;
+   if (type_suffixes[type].integer_p && element_bits < 64)
+     return find_type_suffix (type_suffixes[type].tclass, element_bits * 2);
+ 
+   r.report_no_such_form (type);
+   return NUM_TYPE_SUFFIXES;
+ }
+ 
+ /* Declare the function shape NAME, pointing it to an instance
+    of class <NAME>_def.  */
+ #define SHAPE(NAME) \
+   static CONSTEXPR const NAME##_def NAME##_obj; \
+   namespace shapes { const function_shape *const NAME = &NAME##_obj; }
+ 
+ /* Base class for functions that are not overloaded.  */
+ struct nonoverloaded_base : public function_shape
+ {
+   bool
+   explicit_type_suffix_p (unsigned int) const OVERRIDE
+   {
+     return true;
+   }
+ 
+   tree
+   resolve (function_resolver &) const OVERRIDE
+   {
+     gcc_unreachable ();
+   }
+ };
+ 
+ /* Base class for overloaded functions.  Bit N of EXPLICIT_MASK is true
+    if type suffix N appears in the overloaded name.  */
+ template<unsigned int EXPLICIT_MASK>
+ struct overloaded_base : public function_shape
+ {
+   bool
+   explicit_type_suffix_p (unsigned int i) const OVERRIDE
+   {
+     return (EXPLICIT_MASK >> i) & 1;
+   }
+ };
+ 
+ /* Base class for adr_index and adr_offset.  */
+ struct adr_base : public overloaded_base<0>
+ {
+   /* The function takes two arguments: a vector base and a vector displacement
+      (either an index or an offset).  Resolve based on them both.  */
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     mode_suffix_index mode;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (mode = r.resolve_adr_address (0)) == MODE_none)
+       return error_mark_node;
+ 
+     return r.resolve_to (mode);
+   };
+ };
+ 
+ /* Base class for narrowing bottom binary functions that take an
+    immediate second operand.  The result is half the size of input
+    and has class CLASS.  */
+ template<type_class_index CLASS = function_resolver::SAME_TYPE_CLASS>
+ struct binary_imm_narrowb_base : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_n);
+     STATIC_ASSERT (CLASS == function_resolver::SAME_TYPE_CLASS
+ 		   || CLASS == TYPE_unsigned);
+     if (CLASS == TYPE_unsigned)
+       build_all (b, "vhu0,v0,su64", group, MODE_n);
+     else
+       build_all (b, "vh0,v0,su64", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (1, 1);
+   }
+ };
+ 
+ /* The top equivalent of binary_imm_narrowb_base.  It takes three arguments,
+    with the first being the values of the even elements, which are typically
+    the result of the narrowb operation.  */
+ template<type_class_index CLASS = function_resolver::SAME_TYPE_CLASS>
+ struct binary_imm_narrowt_base : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_n);
+     STATIC_ASSERT (CLASS == function_resolver::SAME_TYPE_CLASS
+ 		   || CLASS == TYPE_unsigned);
+     if (CLASS == TYPE_unsigned)
+       build_all (b, "vhu0,vhu0,v0,su64", group, MODE_n);
+     else
+       build_all (b, "vh0,vh0,v0,su64", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (3, i, nargs)
+ 	|| (type = r.infer_vector_type (i + 1)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_derived_vector_type (i, i + 1, type, CLASS, r.HALF_SIZE)
+ 	|| !r.require_integer_immediate (i + 2))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ 
+ /* Base class for long (i.e. narrow op narrow -> wide) binary functions
+    that take an immediate second operand.  The type suffix specifies
+    the wider type.  */
+ struct binary_imm_long_base : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_n);
+     build_all (b, "v0,vh0,su64", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type, result_type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_integer_immediate (i + 1)
+ 	|| (result_type = long_type_suffix (r, type)) == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     if (tree res = r.lookup_form (r.mode_suffix_id, result_type))
+       return res;
+ 
+     return r.report_no_such_form (type);
+   }
+ };
+ 
+ /* Base class for inc_dec and inc_dec_pat.  */
+ struct inc_dec_base : public overloaded_base<0>
+ {
+   CONSTEXPR inc_dec_base (bool pat_p) : m_pat_p (pat_p) {}
+ 
+   /* Resolve based on the first argument only, which must be either a
+      scalar or a vector.  If it's a scalar, it must be a 32-bit or
+      64-bit integer.  */
+   tree
+   resolve (function_resolver &r) const
+   {
+     unsigned int i, nargs;
+     if (!r.check_gp_argument (m_pat_p ? 3 : 2, i, nargs)
+ 	|| !r.require_vector_or_scalar_type (i))
+       return error_mark_node;
+ 
+     mode_suffix_index mode;
+     type_suffix_index type;
+     if (r.scalar_argument_p (i))
+       {
+ 	mode = MODE_n;
+ 	type = r.infer_integer_scalar_type (i);
+       }
+     else
+       {
+ 	mode = MODE_none;
+ 	type = r.infer_vector_type (i);
+       }
+     if (type == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     for (++i; i < nargs; ++i)
+       if (!r.require_integer_immediate (i))
+ 	return error_mark_node;
+ 
+     return r.resolve_to (mode, type);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     return c.require_immediate_range (m_pat_p ? 2 : 1, 1, 16);
+   }
+ 
+   bool m_pat_p;
+ };
+ 
+ /* Base class for load and load_replicate.  */
+ struct load_contiguous_base : public overloaded_base<0>
+ {
+   /* Resolve a call based purely on a pointer argument.  The other arguments
+      are a governing predicate and (for MODE_vnum) a vnum offset.  */
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     bool vnum_p = r.mode_suffix_id == MODE_vnum;
+     gcc_assert (r.mode_suffix_id == MODE_none || vnum_p);
+ 
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (vnum_p ? 2 : 1, i, nargs)
+ 	|| (type = r.infer_pointer_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| (vnum_p && !r.require_scalar_type (i + 1, "int64_t")))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ 
+ /* Base class for gather loads that take a scalar base and a vector
+    displacement (either an offset or an index).  */
+ struct load_gather_sv_base : public overloaded_base<0>
+ {
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     mode_suffix_index mode;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_pointer_type (i, true)) == NUM_TYPE_SUFFIXES
+ 	|| (mode = r.resolve_sv_displacement (i + 1, type, true),
+ 	    mode == MODE_none))
+       return error_mark_node;
+ 
+     return r.resolve_to (mode, type);
+   }
+ };
+ 
+ /* Base class for load_ext_gather_index and load_ext_gather_offset,
+    which differ only in the units of the displacement.  */
+ struct load_ext_gather_base : public overloaded_base<1>
+ {
+   /* Resolve a gather load that takes one of:
+ 
+      - a scalar pointer base and a vector displacement
+      - a vector base with no displacement or
+      - a vector base and a scalar displacement
+ 
+      The function has an explicit type suffix that determines the type
+      of the loaded data.  */
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     /* No resolution is needed for a vector base with no displacement;
+        there's a one-to-one mapping between short and long names.  */
+     gcc_assert (r.displacement_units () != UNITS_none);
+ 
+     type_suffix_index type = r.type_suffix_ids[0];
+ 
+     unsigned int i, nargs;
+     mode_suffix_index mode;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (mode = r.resolve_gather_address (i, type, true)) == MODE_none)
+       return error_mark_node;
+ 
+     return r.resolve_to (mode, type);
+   }
+ };
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:quarter>_t,
+ 		       sv<t0:quarter>_t)  (for integer t0)
+    sv<t0>_t svmmla[_t0](sv<t0>_t, sv<t0>_t, sv<t0>_t)  (for floating-point t0)
+ 
+    The functions act like the equivalent of "ternary_qq" for integer elements
+    and normal vector-only ternary functions for floating-point elements.  */
+ struct mmla_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     /* svmmla is distributed over several extensions.  Allow the common
+        denominator to define the overloaded svmmla function without
+        defining any specific versions.  */
+     if (group.types[0][0] != NUM_TYPE_SUFFIXES)
+       {
+ 	if (type_suffixes[group.types[0][0]].float_p)
+ 	  build_all (b, "v0,v0,v0,v0", group, MODE_none);
+ 	else
+ 	  build_all (b, "v0,v0,vq0,vq0", group, MODE_none);
+       }
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (3, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     /* Make sure that the function exists now, since not all forms
+        follow a set pattern after this point.  */
+     tree res = r.resolve_to (r.mode_suffix_id, type);
+     if (res == error_mark_node)
+       return res;
+ 
+     bool float_p = type_suffixes[type].float_p;
+     unsigned int modifier = float_p ? r.SAME_SIZE : r.QUARTER_SIZE;
+     if (!r.require_derived_vector_type (i + 1, i, type, r.SAME_TYPE_CLASS,
+ 					modifier)
+ 	|| !r.require_derived_vector_type (i + 2, i, type, r.SAME_TYPE_CLASS,
+ 					   modifier))
+       return error_mark_node;
+ 
+     return res;
+   }
+ };
+ SHAPE (mmla)
+ 
+ /* Base class for prefetch_gather_index and prefetch_gather_offset,
+    which differ only in the units of the displacement.  */
+ struct prefetch_gather_base : public overloaded_base<0>
+ {
+   /* Resolve a gather prefetch that takes one of:
+ 
+      - a scalar pointer base (const void *) and a vector displacement
+      - a vector base with no displacement or
+      - a vector base and a scalar displacement
+ 
+      The prefetch operation is the final argument.  This is purely a
+      mode-based resolution; there are no type suffixes.  */
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     bool has_displacement_p = r.displacement_units () != UNITS_none;
+ 
+     unsigned int i, nargs;
+     mode_suffix_index mode;
+     if (!r.check_gp_argument (has_displacement_p ? 3 : 2, i, nargs)
+ 	|| (mode = r.resolve_gather_address (i, NUM_TYPE_SUFFIXES,
+ 					     false)) == MODE_none
+ 	|| !r.require_integer_immediate (nargs - 1))
+       return error_mark_node;
+ 
+     return r.resolve_to (mode);
+   }
+ };
+ 
+ /* Wraps BASE to provide a narrowing shift right function.  Argument N
+    is an immediate shift amount in the range [1, sizeof(<t0>_t) * 4].  */
+ template<typename BASE, unsigned int N>
+ struct shift_right_imm_narrow_wrapper : public BASE
+ {
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     unsigned int bits = c.type_suffix (0).element_bits / 2;
+     return c.require_immediate_range (N, 1, bits);
+   }
+ };
+ 
+ /* Base class for store_scatter_index and store_scatter_offset,
+    which differ only in the units of the displacement.  */
+ struct store_scatter_base : public overloaded_base<0>
+ {
+   /* Resolve a scatter store that takes one of:
+ 
+      - a scalar pointer base and a vector displacement
+      - a vector base with no displacement or
+      - a vector base and a scalar displacement
+ 
+      The stored data is the final argument, and it determines the
+      type suffix.  */
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     bool has_displacement_p = r.displacement_units () != UNITS_none;
+ 
+     unsigned int i, nargs;
+     mode_suffix_index mode;
+     type_suffix_index type;
+     if (!r.check_gp_argument (has_displacement_p ? 3 : 2, i, nargs)
+ 	|| (type = r.infer_sd_vector_type (nargs - 1)) == NUM_TYPE_SUFFIXES
+ 	|| (mode = r.resolve_gather_address (i, type, false)) == MODE_none)
+       return error_mark_node;
+ 
+     return r.resolve_to (mode, type);
+   }
+ };
+ 
+ /* Base class for ternary operations in which the final argument is an
+    immediate shift amount.  The derived class should check the range.  */
+ struct ternary_shift_imm_base : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_n);
+     build_all (b, "v0,v0,v0,su64", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (2, 1);
+   }
+ };
+ 
+ /* Base class for ternary operations in which the first argument has the
+    same element type as the result, and in which the second and third
+    arguments have an element type that is derived the first.
+ 
+    MODIFIER is the number of element bits in the second and third
+    arguments, or a function_resolver modifier that says how this
+    precision is derived from the first argument's elements.
+ 
+    TYPE_CLASS2 and TYPE_CLASS3 are the type classes of the second and
+    third arguments, or function_resolver::SAME_TYPE_CLASS if the type
+    class is the same as the first argument.  */
+ template<unsigned int MODIFIER,
+ 	 type_class_index TYPE_CLASS2 = function_resolver::SAME_TYPE_CLASS,
+ 	 type_class_index TYPE_CLASS3 = function_resolver::SAME_TYPE_CLASS>
+ struct ternary_resize2_opt_n_base : public overloaded_base<0>
+ {
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (3, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_derived_vector_type (i + 1, i, type, TYPE_CLASS2,
+ 					   MODIFIER))
+       return error_mark_node;
+ 
+     return r.finish_opt_n_resolution (i + 2, i, type, TYPE_CLASS3, MODIFIER);
+   }
+ };
+ 
+ /* Like ternary_resize2_opt_n_base, but for functions that don't take
+    a final scalar argument.  */
+ template<unsigned int MODIFIER,
+ 	 type_class_index TYPE_CLASS2 = function_resolver::SAME_TYPE_CLASS,
+ 	 type_class_index TYPE_CLASS3 = function_resolver::SAME_TYPE_CLASS>
+ struct ternary_resize2_base : public overloaded_base<0>
+ {
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (3, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_derived_vector_type (i + 1, i, type, TYPE_CLASS2,
+ 					   MODIFIER)
+ 	|| !r.require_derived_vector_type (i + 2, i, type, TYPE_CLASS3,
+ 					   MODIFIER))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ 
+ /* Like ternary_resize2_opt_n_base, but for functions that take a final
+    lane argument.  */
+ template<unsigned int MODIFIER,
+ 	 type_class_index TYPE_CLASS2 = function_resolver::SAME_TYPE_CLASS,
+ 	 type_class_index TYPE_CLASS3 = function_resolver::SAME_TYPE_CLASS>
+ struct ternary_resize2_lane_base : public overloaded_base<0>
+ {
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (4, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_derived_vector_type (i + 1, i, type, TYPE_CLASS2,
+ 					   MODIFIER)
+ 	|| !r.require_derived_vector_type (i + 2, i, type, TYPE_CLASS3,
+ 					   MODIFIER)
+ 	|| !r.require_integer_immediate (i + 3))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ 
+ /* A specialization of ternary_resize2_lane_base for bfloat16 elements,
+    indexed in groups of N elements.  */
+ template<unsigned int N>
+ struct ternary_bfloat_lane_base
+   : public ternary_resize2_lane_base<16, TYPE_bfloat, TYPE_bfloat>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vB,vB,su64", group, MODE_none);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     return c.require_immediate_lane_index (3, N);
+   }
+ };
+ 
+ /* A specialization of ternary_resize2_lane_base for quarter-sized
+    elements.  */
+ template<type_class_index TYPE_CLASS2 = function_resolver::SAME_TYPE_CLASS,
+ 	 type_class_index TYPE_CLASS3 = function_resolver::SAME_TYPE_CLASS>
+ struct ternary_qq_lane_base
+   : public ternary_resize2_lane_base<function_resolver::QUARTER_SIZE,
+ 				     TYPE_CLASS2, TYPE_CLASS3>
+ {
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     return c.require_immediate_lane_index (3, 4);
+   }
+ };
+ 
+ /* Base class for narrowing bottom unary functions.  The result is half
+    the size of input and has class CLASS.  */
+ template<type_class_index CLASS = function_resolver::SAME_TYPE_CLASS>
+ struct unary_narrowb_base : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     STATIC_ASSERT (CLASS == function_resolver::SAME_TYPE_CLASS
+ 		   || CLASS == TYPE_unsigned);
+     if (CLASS == TYPE_unsigned)
+       build_all (b, "vhu0,v0", group, MODE_none);
+     else
+       build_all (b, "vh0,v0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_unary (CLASS, r.HALF_SIZE);
+   }
+ };
+ 
+ /* The top equivalent of unary_imm_narrowb_base.  All forms take the values
+    of the even elements as an extra argument, before any governing predicate.
+    These even elements are typically the result of the narrowb operation.  */
+ template<type_class_index CLASS = function_resolver::SAME_TYPE_CLASS>
+ struct unary_narrowt_base : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     STATIC_ASSERT (CLASS == function_resolver::SAME_TYPE_CLASS
+ 		   || CLASS == TYPE_unsigned);
+     if (CLASS == TYPE_unsigned)
+       build_all (b, "vhu0,vhu0,v0", group, MODE_none);
+     else
+       build_all (b, "vh0,vh0,v0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i + 1)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_derived_vector_type (i, i + 1, type, CLASS, r.HALF_SIZE))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ 
+ /* sv<m0>_t svfoo[_m0base]_[m1]index(sv<m0>_t, sv<m1>_t)
+ 
+    for all valid combinations of vector base type <m0> and vector
+    displacement type <m1>.  */
+ struct adr_index_def : public adr_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_index);
+     build_all (b, "b,b,d", group, MODE_u32base_s32index);
+     build_all (b, "b,b,d", group, MODE_u32base_u32index);
+     build_all (b, "b,b,d", group, MODE_u64base_s64index);
+     build_all (b, "b,b,d", group, MODE_u64base_u64index);
+   }
+ };
+ SHAPE (adr_index)
+ 
+ /* sv<m0>_t svfoo[_m0base]_[m1]offset(sv<m0>_t, sv<m1>_t).
+ 
+    for all valid combinations of vector base type <m0> and vector
+    displacement type <m1>.  */
+ struct adr_offset_def : public adr_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_offset);
+     build_all (b, "b,b,d", group, MODE_u32base_s32offset);
+     build_all (b, "b,b,d", group, MODE_u32base_u32offset);
+     build_all (b, "b,b,d", group, MODE_u64base_s64offset);
+     build_all (b, "b,b,d", group, MODE_u64base_u64offset);
+   }
+ };
+ SHAPE (adr_offset)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0>_t)
+ 
+    i.e. a binary operation with uniform types, but with no scalar form.  */
+ struct binary_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,v0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (2);
+   }
+ };
+ SHAPE (binary)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:int>_t)
+    sv<t0>_t svfoo[_n_t0](sv<t0>_t, <t0:int>_t).
+ 
+    i.e. a version of the standard binary shape binary_opt_n in which
+    the final argument is always a signed integer.  */
+ struct binary_int_opt_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vs0", group, MODE_none);
+     build_all (b, "v0,v0,ss0", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     return r.finish_opt_n_resolution (i + 1, i, type, TYPE_signed);
+   }
+ };
+ SHAPE (binary_int_opt_n)
+ 
+ /* sv<t0>_t svfoo_<t0>(sv<t0>_t, sv<t0>_t, uint64_t)
+ 
+    where the final argument is an integer constant expression in the
+    range [0, 16 / sizeof (<t0>_t) - 1].  */
+ struct binary_lane_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,v0,su64", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (2, 1);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     return c.require_immediate_lane_index (2);
+   }
+ };
+ SHAPE (binary_lane)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0:half>_t, sv<t0:half>_t, uint64_t).
+ 
+    where the final argument is an integer constant expression in the
+    range [0, 32 / sizeof (<t0>_t) - 1].  */
+ struct binary_long_lane_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,vh0,vh0,su64", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type, result_type;
+     if (!r.check_gp_argument (3, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_matching_vector_type (i + 1, type)
+ 	|| !r.require_integer_immediate (i + 2)
+ 	|| (result_type = long_type_suffix (r, type)) == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     if (tree res = r.lookup_form (r.mode_suffix_id, result_type))
+       return res;
+ 
+     return r.report_no_such_form (type);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     return c.require_immediate_lane_index (2);
+   }
+ };
+ SHAPE (binary_long_lane)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0:half>_t, sv<t0:half>_t)
+    sv<t0>_t svfoo[_n_t0](sv<t0:half>_t, <t0:half>_t).  */
+ struct binary_long_opt_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,vh0,vh0", group, MODE_none);
+     build_all (b, "v0,vh0,sh0", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type, result_type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| (result_type = long_type_suffix (r, type)) == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     return r.finish_opt_n_resolution (i + 1, i, type, r.SAME_TYPE_CLASS,
+ 				      r.SAME_SIZE, result_type);
+   }
+ };
+ SHAPE (binary_long_opt_n)
+ 
+ /* sv<t0>_t svfoo[_n_t0](sv<t0>_t, <t0>_t).
+ 
+    i.e. a binary operation in which the final argument is always a scalar
+    rather than a vector.  */
+ struct binary_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_n);
+     build_all (b, "v0,v0,s0", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_derived_scalar_type (i + 1, r.SAME_TYPE_CLASS))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ SHAPE (binary_n)
+ 
+ /* sv<t0:half>_t svfoo[_t0](sv<t0>_t, sv<t0>_t)
+    sv<t0:half>_t svfoo[_n_t0](sv<t0>_t, <t0>_t)
+ 
+    i.e. a version of binary_opt_n in which the output elements are half the
+    width of the input elements.  */
+ struct binary_narrowb_opt_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "vh0,v0,v0", group, MODE_none);
+     build_all (b, "vh0,v0,s0", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform_opt_n (2);
+   }
+ };
+ SHAPE (binary_narrowb_opt_n)
+ 
+ /* sv<t0:half>_t svfoo[_t0](sv<t0:half>_t, sv<t0>_t, sv<t0>_t)
+    sv<t0:half>_t svfoo[_n_t0](sv<t0:half>_t, sv<t0>_t, <t0>_t)
+ 
+    This is the "top" counterpart to binary_narrowb_opt_n.  */
+ struct binary_narrowt_opt_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "vh0,vh0,v0,v0", group, MODE_none);
+     build_all (b, "vh0,vh0,v0,s0", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (3, i, nargs)
+ 	|| (type = r.infer_vector_type (i + 1)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_derived_vector_type (i, i + 1, type, r.SAME_TYPE_CLASS,
+ 					   r.HALF_SIZE))
+       return error_mark_node;
+ 
+     return r.finish_opt_n_resolution (i + 2, i + 1, type);
+   }
+ };
+ SHAPE (binary_narrowt_opt_n)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0>_t)
+    sv<t0>_t svfoo[_n_t0](sv<t0>_t, <t0>_t)
+ 
+    i.e. the standard shape for binary operations that operate on
+    uniform types.  */
+ struct binary_opt_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,v0", group, MODE_none);
+     /* _b functions do not have an _n form, but are classified as
+        binary_opt_n so that they can be overloaded with vector
+        functions.  */
+     if (group.types[0][0] == TYPE_SUFFIX_b)
+       gcc_assert (group.types[0][1] == NUM_TYPE_SUFFIXES);
+     else
+       build_all (b, "v0,v0,s0", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform_opt_n (2);
+   }
+ };
+ SHAPE (binary_opt_n)
+ 
+ /* svbool_t svfoo(svbool_t, svbool_t).  */
+ struct binary_pred_def : public nonoverloaded_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     build_all (b, "v0,v0,v0", group, MODE_none);
+   }
+ };
+ SHAPE (binary_pred)
+ 
+ /* sv<t0>_t svfoo[_<t0>](sv<t0>_t, sv<t0>_t, uint64_t)
+ 
+    where the final argument must be 90 or 270.  */
+ struct binary_rotate_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,v0,su64", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (2, 1);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     return c.require_immediate_either_or (2, 90, 270);
+   }
+ };
+ SHAPE (binary_rotate)
+ 
+ /* sv<t0>_t svfoo_t0(<t0>_t, <t0>_t)
+ 
+    i.e. a binary function that takes two scalars and returns a vector.
+    An explicit type suffix is required.  */
+ struct binary_scalar_def : public nonoverloaded_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     build_all (b, "v0,s0,s0", group, MODE_none);
+   }
+ };
+ SHAPE (binary_scalar)
+ 
+ /* sv<t0:uint>_t svfoo[_t0](sv<t0>_t, sv<t0>_t).
+ 
+    i.e. a version of "binary" that returns unsigned integers.  */
+ struct binary_to_uint_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "vu0,v0,v0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (2);
+   }
+ };
+ SHAPE (binary_to_uint)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:uint>_t)
+ 
+    i.e. a version of "binary" in which the final argument is always an
+    unsigned integer.  */
+ struct binary_uint_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vu0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_derived_vector_type (i + 1, i, type, TYPE_unsigned))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ SHAPE (binary_uint)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, <t0:uint>_t)
+ 
+    i.e. a version of binary_n in which the final argument is always an
+    unsigned integer.  */
+ struct binary_uint_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,su0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_derived_scalar_type (i + 1, TYPE_unsigned))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ SHAPE (binary_uint_n)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:uint>_t)
+    sv<t0>_t svfoo[_n_t0](sv<t0>_t, <t0:uint>_t)
+ 
+    i.e. a version of the standard binary shape binary_opt_n in which
+    the final argument is always an unsigned integer.  */
+ struct binary_uint_opt_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vu0", group, MODE_none);
+     build_all (b, "v0,v0,su0", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     return r.finish_opt_n_resolution (i + 1, i, type, TYPE_unsigned);
+   }
+ };
+ SHAPE (binary_uint_opt_n)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, uint64_t).
+ 
+    i.e. a version of binary_n in which the final argument is always
+    a 64-bit unsigned integer.  */
+ struct binary_uint64_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,su64", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_scalar_type (i + 1, "uint64_t"))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ SHAPE (binary_uint64_n)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, svuint64_t)
+    sv<t0>_t svfoo[_n_t0](sv<t0>_t, uint64_t)
+ 
+    i.e. a version of the standard binary shape binary_opt_n in which
+    the final argument is always a uint64_t.  */
+ struct binary_uint64_opt_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vu64", group, MODE_none);
+     build_all (b, "v0,v0,su64", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     return r.finish_opt_n_resolution (i + 1, i, type, TYPE_unsigned, 64);
+   }
+ };
+ SHAPE (binary_uint64_opt_n)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:half>_t).  */
+ struct binary_wide_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vh0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_derived_vector_type (i + 1, i, type, r.SAME_TYPE_CLASS,
+ 					   r.HALF_SIZE))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ SHAPE (binary_wide)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:half>_t)
+    sv<t0>_t svfoo[_n_t0](sv<t0>_t, <t0:half>_t).  */
+ struct binary_wide_opt_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vh0", group, MODE_none);
+     build_all (b, "v0,v0,sh0", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     return r.finish_opt_n_resolution (i + 1, i, type, r.SAME_TYPE_CLASS,
+ 				      r.HALF_SIZE);
+   }
+ };
+ SHAPE (binary_wide_opt_n)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0>_t)
+    <t0>_t svfoo[_n_t0](<t0>_t, sv<t0>_t).  */
+ struct clast_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,v0", group, MODE_none);
+     build_all (b, "s0,s0,v0", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| !r.require_vector_or_scalar_type (i))
+       return error_mark_node;
+ 
+     if (r.scalar_argument_p (i))
+       {
+ 	type_suffix_index type;
+ 	if (!r.require_derived_scalar_type (i, r.SAME_TYPE_CLASS)
+ 	    || (type = r.infer_vector_type (i + 1)) == NUM_TYPE_SUFFIXES)
+ 	  return error_mark_node;
+ 	return r.resolve_to (MODE_n, type);
+       }
+     else
+       {
+ 	type_suffix_index type;
+ 	if ((type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	    || !r.require_matching_vector_type (i + 1, type))
+ 	  return error_mark_node;
+ 	return r.resolve_to (MODE_none, type);
+       }
+   }
+ };
+ SHAPE (clast)
+ 
+ /* svbool_t svfoo[_t0](sv<t0>_t, sv<t0>_t).  */
+ struct compare_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "vp,v0,v0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (2);
+   }
+ };
+ SHAPE (compare)
+ 
+ /* svbool_t svfoo[_t0](sv<t0>_t, sv<t0>_t)
+    svbool_t svfoo[_n_t0](sv<t0>_t, <t0>_t)
+ 
+    i.e. a comparison between two vectors, or between a vector and a scalar.  */
+ struct compare_opt_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "vp,v0,v0", group, MODE_none);
+     build_all (b, "vp,v0,s0", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform_opt_n (2);
+   }
+ };
+ SHAPE (compare_opt_n)
+ 
+ /* svbool_t svfoo[_t0](const <t0>_t *, const <t0>_t *).  */
+ struct compare_ptr_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "vp,al,al", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_pointer_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_matching_pointer_type (i + 1, i, type))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ SHAPE (compare_ptr)
+ 
+ /* svbool_t svfoo_t0[_t1](<t1>_t, <t1>_t)
+ 
+    where _t0 is a _b<bits> suffix that describes the predicate result.
+    There is no direct relationship between the element sizes of _t0
+    and _t1.  */
+ struct compare_scalar_def : public overloaded_base<1>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "vp,s1,s1", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_integer_scalar_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_matching_integer_scalar_type (i + 1, i, type))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, r.type_suffix_ids[0], type);
+   }
+ };
+ SHAPE (compare_scalar)
+ 
+ /* svbool_t svfoo[_t0](sv<t0>_t, svint64_t)  (for signed t0)
+    svbool_t svfoo[_n_t0](sv<t0>_t, int64_t)  (for signed t0)
+    svbool_t svfoo[_t0](sv<t0>_t, svuint64_t)  (for unsigned t0)
+    svbool_t svfoo[_n_t0](sv<t0>_t, uint64_t)  (for unsigned t0)
+ 
+    i.e. a comparison in which the second argument is 64 bits.  */
+ struct compare_wide_opt_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "vp,v0,vw0", group, MODE_none);
+     build_all (b, "vp,v0,sw0", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     return r.finish_opt_n_resolution (i + 1, i, type, r.SAME_TYPE_CLASS, 64);
+   }
+ };
+ SHAPE (compare_wide_opt_n)
+ 
+ /* uint64_t svfoo().  */
+ struct count_inherent_def : public nonoverloaded_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     build_all (b, "su64", group, MODE_none);
+   }
+ };
+ SHAPE (count_inherent)
+ 
+ /* uint64_t svfoo(enum svpattern).  */
+ struct count_pat_def : public nonoverloaded_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     build_all (b, "su64,epattern", group, MODE_none);
+   }
+ };
+ SHAPE (count_pat)
+ 
+ /* uint64_t svfoo(svbool_t).  */
+ struct count_pred_def : public nonoverloaded_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     build_all (b, "su64,vp", group, MODE_none);
+   }
+ };
+ SHAPE (count_pred)
+ 
+ /* uint64_t svfoo[_t0](sv<t0>_t).  */
+ struct count_vector_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "su64,v0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (1);
+   }
+ };
+ SHAPE (count_vector)
+ 
+ /* sv<t0>xN_t svfoo[_t0](sv<t0>_t, ..., sv<t0>_t)
+ 
+    where there are N arguments in total.  */
+ struct create_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "t0,v0*t", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (r.vectors_per_tuple ());
+   }
+ };
+ SHAPE (create)
+ 
+ /* sv<t0>_t svfoo[_n]_t0(<t0>_t, ..., <t0>_t)
+ 
+    where there are enough arguments to fill 128 bits of data (or to
+    control 128 bits of data in the case of predicates).  */
+ struct dupq_def : public overloaded_base<1>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     /* The "_n" suffix is optional; the full name has it, but the short
+        name doesn't.  */
+     build_all (b, "v0,s0*q", group, MODE_n, true);
+   }
+ 
+   tree
+   resolve (function_resolver &) const OVERRIDE
+   {
+     /* The short forms just make "_n" implicit, so no resolution is needed.  */
+     gcc_unreachable ();
+   }
+ };
+ SHAPE (dupq)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0>_t, uint64_t)
+ 
+    where the final argument is an integer constant expression that when
+    multiplied by the number of bytes in t0 is in the range [0, 255].  */
+ struct ext_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,v0,su64", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (2, 1);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     unsigned int bytes = c.type_suffix (0).element_bytes;
+     return c.require_immediate_range (2, 0, 256 / bytes - 1);
+   }
+ };
+ SHAPE (ext)
+ 
+ /* <t0>_t svfoo[_t0](<t0>_t, sv<t0>_t).  */
+ struct fold_left_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "s0,s0,v0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| !r.require_derived_scalar_type (i, r.SAME_TYPE_CLASS)
+ 	|| (type = r.infer_vector_type (i + 1)) == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ SHAPE (fold_left)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>xN_t, uint64_t)
+ 
+    where the final argument is an integer constant expression in
+    the range [0, N - 1].  */
+ struct get_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,t0,su64", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_tuple_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_integer_immediate (i + 1))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     unsigned int nvectors = c.vectors_per_tuple ();
+     return c.require_immediate_range (1, 0, nvectors - 1);
+   }
+ };
+ SHAPE (get)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, uint64_t)
+    <t0>_t svfoo[_n_t0](<t0>_t, uint64_t)
+ 
+    where the t0 in the vector form is a signed or unsigned integer
+    whose size is tied to the [bhwd] suffix of "svfoo".  */
+ struct inc_dec_def : public inc_dec_base
+ {
+   CONSTEXPR inc_dec_def () : inc_dec_base (false) {}
+ 
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     /* These functions are unusual in that the type suffixes for
+        the scalar and vector forms are not related.  The vector
+        form always has exactly two potential suffixes while the
+        scalar form always has four.  */
+     if (group.types[2][0] == NUM_TYPE_SUFFIXES)
+       build_all (b, "v0,v0,su64", group, MODE_none);
+     else
+       build_all (b, "s0,s0,su64", group, MODE_n);
+   }
+ };
+ SHAPE (inc_dec)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, enum svpattern, uint64_t)
+    <t0>_t svfoo[_n_t0](<t0>_t, enum svpattern, uint64_t)
+ 
+    where the t0 in the vector form is a signed or unsigned integer
+    whose size is tied to the [bhwd] suffix of "svfoo".  */
+ struct inc_dec_pat_def : public inc_dec_base
+ {
+   CONSTEXPR inc_dec_pat_def () : inc_dec_base (true) {}
+ 
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     /* These functions are unusual in that the type suffixes for
+        the scalar and vector forms are not related.  The vector
+        form always has exactly two potential suffixes while the
+        scalar form always has four.  */
+     if (group.types[2][0] == NUM_TYPE_SUFFIXES)
+       build_all (b, "v0,v0,epattern,su64", group, MODE_none);
+     else
+       build_all (b, "s0,s0,epattern,su64", group, MODE_n);
+   }
+ };
+ SHAPE (inc_dec_pat)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, svbool_t).  */
+ struct inc_dec_pred_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vp", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_vector_type (i + 1, VECTOR_TYPE_svbool_t))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ SHAPE (inc_dec_pred)
+ 
+ /* <t0>_t svfoo[_n_t0]_t1(<t0>_t, svbool_t)
+ 
+    where _t1 is a _b<bits> suffix that describes the svbool_t argument.  */
+ struct inc_dec_pred_scalar_def : public overloaded_base<2>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_n);
+     build_all (b, "s0,s0,vp", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_integer_scalar_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_vector_type (i + 1, VECTOR_TYPE_svbool_t))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type, r.type_suffix_ids[1]);
+   }
+ };
+ SHAPE (inc_dec_pred_scalar)
+ 
+ /* sv<t0>[xN]_t svfoo_t0().  */
+ struct inherent_def : public nonoverloaded_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     build_all (b, "t0", group, MODE_none);
+   }
+ };
+ SHAPE (inherent)
+ 
+ /* svbool_t svfoo[_b]().  */
+ struct inherent_b_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     /* The "_b" suffix is optional; the full name has it, but the short
+        name doesn't.  */
+     build_all (b, "v0", group, MODE_none, true);
+   }
+ 
+   tree
+   resolve (function_resolver &) const OVERRIDE
+   {
+     /* The short forms just make "_b" implicit, so no resolution is needed.  */
+     gcc_unreachable ();
+   }
+ };
+ SHAPE (inherent_b)
+ 
+ /* sv<t0>[xN]_t svfoo[_t0](const <t0>_t *)
+    sv<t0>[xN]_t svfoo_vnum[_t0](const <t0>_t *, int64_t).  */
+ struct load_def : public load_contiguous_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     b.add_overloaded_functions (group, MODE_vnum);
+     build_all (b, "t0,al", group, MODE_none);
+     build_all (b, "t0,al,ss64", group, MODE_vnum);
+   }
+ };
+ SHAPE (load)
+ 
+ /* sv<t0>_t svfoo_t0(const <X>_t *)
+    sv<t0>_t svfoo_vnum_t0(const <X>_t *, int64_t)
+ 
+    where <X> is determined by the function base name.  */
+ struct load_ext_def : public nonoverloaded_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     build_all (b, "t0,al", group, MODE_none);
+     build_all (b, "t0,al,ss64", group, MODE_vnum);
+   }
+ };
+ SHAPE (load_ext)
+ 
+ /* sv<t0>_t svfoo_[s32]index_t0(const <X>_t *, svint32_t)
+    sv<t0>_t svfoo_[s64]index_t0(const <X>_t *, svint64_t)
+    sv<t0>_t svfoo_[u32]index_t0(const <X>_t *, svuint32_t)
+    sv<t0>_t svfoo_[u64]index_t0(const <X>_t *, svuint64_t)
+ 
+    sv<t0>_t svfoo[_u32base]_index_t0(svuint32_t, int64_t)
+    sv<t0>_t svfoo[_u64base]_index_t0(svuint64_t, int64_t)
+ 
+    where <X> is determined by the function base name.  */
+ struct load_ext_gather_index_def : public load_ext_gather_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_index);
+     build_sv_index (b, "t0,al,d", group);
+     build_vs_index (b, "t0,b,ss64", group);
+   }
+ };
+ SHAPE (load_ext_gather_index)
+ 
+ /* sv<t0>_t svfoo_[s64]index_t0(const <X>_t *, svint64_t)
+    sv<t0>_t svfoo_[u64]index_t0(const <X>_t *, svuint64_t)
+ 
+    sv<t0>_t svfoo[_u32base]_index_t0(svuint32_t, int64_t)
+    sv<t0>_t svfoo[_u64base]_index_t0(svuint64_t, int64_t)
+ 
+    where <X> is determined by the function base name.  This is
+    load_ext_gather_index that doesn't support 32-bit vector indices.  */
+ struct load_ext_gather_index_restricted_def : public load_ext_gather_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_index);
+     build_sv_index64 (b, "t0,al,d", group);
+     build_vs_index (b, "t0,b,ss64", group);
+   }
+ };
+ SHAPE (load_ext_gather_index_restricted)
+ 
+ /* sv<t0>_t svfoo_[s32]offset_t0(const <X>_t *, svint32_t)
+    sv<t0>_t svfoo_[s64]offset_t0(const <X>_t *, svint64_t)
+    sv<t0>_t svfoo_[u32]offset_t0(const <X>_t *, svuint32_t)
+    sv<t0>_t svfoo_[u64]offset_t0(const <X>_t *, svuint64_t)
+ 
+    sv<t0>_t svfoo[_u32base]_t0(svuint32_t)
+    sv<t0>_t svfoo[_u64base]_t0(svuint64_t)
+ 
+    sv<t0>_t svfoo[_u32base]_offset_t0(svuint32_t, int64_t)
+    sv<t0>_t svfoo[_u64base]_offset_t0(svuint64_t, int64_t)
+ 
+    where <X> is determined by the function base name.  */
+ struct load_ext_gather_offset_def : public load_ext_gather_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_offset);
+     build_sv_offset (b, "t0,al,d", group);
+     build_v_base (b, "t0,b", group, true);
+     build_vs_offset (b, "t0,b,ss64", group);
+   }
+ };
+ SHAPE (load_ext_gather_offset)
+ 
+ /* sv<t0>_t svfoo_[s64]offset_t0(const <X>_t *, svint64_t)
+    sv<t0>_t svfoo_[u32]offset_t0(const <X>_t *, svuint32_t)
+    sv<t0>_t svfoo_[u64]offset_t0(const <X>_t *, svuint64_t)
+ 
+    sv<t0>_t svfoo[_u32base]_t0(svuint32_t)
+    sv<t0>_t svfoo[_u64base]_t0(svuint64_t)
+ 
+    sv<t0>_t svfoo[_u32base]_offset_t0(svuint32_t, int64_t)
+    sv<t0>_t svfoo[_u64base]_offset_t0(svuint64_t, int64_t)
+ 
+    where <X> is determined by the function base name.  This is
+    load_ext_gather_offset without the s32 vector offset form.  */
+ struct load_ext_gather_offset_restricted_def : public load_ext_gather_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_offset);
+     build_sv_uint_offset (b, "t0,al,d", group);
+     build_v_base (b, "t0,b", group, true);
+     build_vs_offset (b, "t0,b,ss64", group);
+   }
+ };
+ SHAPE (load_ext_gather_offset_restricted)
+ 
+ /* sv<t0>_t svfoo_[s32]index[_t0](const <t0>_t *, svint32_t)
+    sv<t0>_t svfoo_[s64]index[_t0](const <t0>_t *, svint64_t)
+    sv<t0>_t svfoo_[u32]index[_t0](const <t0>_t *, svuint32_t)
+    sv<t0>_t svfoo_[u64]index[_t0](const <t0>_t *, svuint64_t)
+ 
+    sv<t0>_t svfoo_[s32]offset[_t0](const <t0>_t *, svint32_t)
+    sv<t0>_t svfoo_[s64]offset[_t0](const <t0>_t *, svint64_t)
+    sv<t0>_t svfoo_[u32]offset[_t0](const <t0>_t *, svuint32_t)
+    sv<t0>_t svfoo_[u64]offset[_t0](const <t0>_t *, svuint64_t).  */
+ struct load_gather_sv_def : public load_gather_sv_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_index);
+     b.add_overloaded_functions (group, MODE_offset);
+     build_sv_index (b, "t0,al,d", group);
+     build_sv_offset (b, "t0,al,d", group);
+   }
+ };
+ SHAPE (load_gather_sv)
+ 
+ /* sv<t0>_t svfoo_[u32]index[_t0](const <t0>_t *, svuint32_t)
+    sv<t0>_t svfoo_[u64]index[_t0](const <t0>_t *, svuint64_t)
+ 
+    sv<t0>_t svfoo_[s64]offset[_t0](const <t0>_t *, svint64_t)
+    sv<t0>_t svfoo_[u32]offset[_t0](const <t0>_t *, svuint32_t)
+    sv<t0>_t svfoo_[u64]offset[_t0](const <t0>_t *, svuint64_t)
+ 
+    This is load_gather_sv without the 32-bit vector index forms and
+    without the s32 vector offset form.  */
+ struct load_gather_sv_restricted_def : public load_gather_sv_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_index);
+     b.add_overloaded_functions (group, MODE_offset);
+     build_sv_index64 (b, "t0,al,d", group);
+     build_sv_uint_offset (b, "t0,al,d", group);
+   }
+ };
+ SHAPE (load_gather_sv_restricted)
+ 
+ /* sv<t0>_t svfoo[_u32base]_t0(svuint32_t)
+    sv<t0>_t svfoo[_u64base]_t0(svuint64_t)
+ 
+    sv<t0>_t svfoo[_u32base]_index_t0(svuint32_t, int64_t)
+    sv<t0>_t svfoo[_u64base]_index_t0(svuint64_t, int64_t)
+ 
+    sv<t0>_t svfoo[_u32base]_offset_t0(svuint32_t, int64_t)
+    sv<t0>_t svfoo[_u64base]_offset_t0(svuint64_t, int64_t).  */
+ struct load_gather_vs_def : public overloaded_base<1>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     /* The base vector mode is optional; the full name has it but the
+        short name doesn't.  There is no ambiguity with SHAPE_load_gather_sv
+        because the latter uses an implicit type suffix.  */
+     build_v_base (b, "t0,b", group, true);
+     build_vs_index (b, "t0,b,ss64", group, true);
+     build_vs_offset (b, "t0,b,ss64", group, true);
+   }
+ 
+   tree
+   resolve (function_resolver &) const OVERRIDE
+   {
+     /* The short name just makes the base vector mode implicit;
+        no resolution is needed.  */
+     gcc_unreachable ();
+   }
+ };
+ SHAPE (load_gather_vs)
+ 
+ /* sv<t0>_t svfoo[_t0](const <t0>_t *)
+ 
+    The only difference from "load" is that this shape has no vnum form.  */
+ struct load_replicate_def : public load_contiguous_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "t0,al", group, MODE_none);
+   }
+ };
+ SHAPE (load_replicate)
+ 
+ /* svbool_t svfoo(enum svpattern).  */
+ struct pattern_pred_def : public nonoverloaded_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     build_all (b, "vp,epattern", group, MODE_none);
+   }
+ };
+ SHAPE (pattern_pred)
+ 
+ /* void svfoo(const void *, svprfop)
+    void svfoo_vnum(const void *, int64_t, svprfop).  */
+ struct prefetch_def : public nonoverloaded_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     build_all (b, "_,ap,eprfop", group, MODE_none);
+     build_all (b, "_,ap,ss64,eprfop", group, MODE_vnum);
+   }
+ };
+ SHAPE (prefetch)
+ 
+ /* void svfoo_[s32]index(const void *, svint32_t, svprfop)
+    void svfoo_[s64]index(const void *, svint64_t, svprfop)
+    void svfoo_[u32]index(const void *, svuint32_t, svprfop)
+    void svfoo_[u64]index(const void *, svuint64_t, svprfop)
+ 
+    void svfoo[_u32base](svuint32_t, svprfop)
+    void svfoo[_u64base](svuint64_t, svprfop)
+ 
+    void svfoo[_u32base]_index(svuint32_t, int64_t, svprfop)
+    void svfoo[_u64base]_index(svuint64_t, int64_t, svprfop).  */
+ struct prefetch_gather_index_def : public prefetch_gather_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     b.add_overloaded_functions (group, MODE_index);
+     build_sv_index (b, "_,ap,d,eprfop", group);
+     build_v_base (b, "_,b,eprfop", group);
+     build_vs_index (b, "_,b,ss64,eprfop", group);
+   }
+ };
+ SHAPE (prefetch_gather_index)
+ 
+ /* void svfoo_[s32]offset(const void *, svint32_t, svprfop)
+    void svfoo_[s64]offset(const void *, svint64_t, svprfop)
+    void svfoo_[u32]offset(const void *, svuint32_t, svprfop)
+    void svfoo_[u64]offset(const void *, svuint64_t, svprfop)
+ 
+    void svfoo[_u32base](svuint32_t, svprfop)
+    void svfoo[_u64base](svuint64_t, svprfop)
+ 
+    void svfoo[_u32base]_offset(svuint32_t, int64_t, svprfop)
+    void svfoo[_u64base]_offset(svuint64_t, int64_t, svprfop).  */
+ struct prefetch_gather_offset_def : public prefetch_gather_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     b.add_overloaded_functions (group, MODE_offset);
+     build_sv_offset (b, "_,ap,d,eprfop", group);
+     build_v_base (b, "_,b,eprfop", group);
+     build_vs_offset (b, "_,b,ss64,eprfop", group);
+   }
+ };
+ SHAPE (prefetch_gather_offset)
+ 
+ /* bool svfoo(svbool_t).  */
+ struct ptest_def : public nonoverloaded_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     build_all (b, "sp,vp", group, MODE_none);
+   }
+ };
+ SHAPE (ptest)
+ 
+ /* svbool_t svfoo().  */
+ struct rdffr_def : public nonoverloaded_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     build_all (b, "vp", group, MODE_none);
+   }
+ };
+ SHAPE (rdffr)
+ 
+ /* <t0>_t svfoo[_t0](sv<t0>_t).  */
+ struct reduction_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "s0,v0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (1);
+   }
+ };
+ SHAPE (reduction)
+ 
+ /* int64_t svfoo[_t0](sv<t0>_t)  (for signed t0)
+    uint64_t svfoo[_t0](sv<t0>_t)  (for unsigned t0)
+    <t0>_t svfoo[_t0](sv<t0>_t)  (for floating-point t0)
+ 
+    i.e. a version of "reduction" in which the return type for integers
+    always has 64 bits.  */
+ struct reduction_wide_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "sw0,v0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (1);
+   }
+ };
+ SHAPE (reduction_wide)
+ 
+ /* sv<t0>xN_t svfoo[_t0](sv<t0>xN_t, uint64_t, sv<t0>_t)
+ 
+    where the second argument is an integer constant expression in the
+    range [0, N - 1].  */
+ struct set_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "t0,t0,su64,v0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (3, i, nargs)
+ 	|| (type = r.infer_tuple_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_integer_immediate (i + 1)
+ 	|| !r.require_derived_vector_type (i + 2, i, type))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     unsigned int nvectors = c.vectors_per_tuple ();
+     return c.require_immediate_range (1, 0, nvectors - 1);
+   }
+ };
+ SHAPE (set)
+ 
+ /* void svfoo().  */
+ struct setffr_def : public nonoverloaded_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     build_all (b, "_", group, MODE_none);
+   }
+ };
+ SHAPE (setffr)
+ 
+ /* sv<t0>_t svfoo[_n_t0])(sv<t0>_t, uint64_t)
+ 
+    where the final argument must be an integer constant expression in the
+    range [0, sizeof (<t0>_t) * 8 - 1].  */
+ struct shift_left_imm_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_n);
+     build_all (b, "v0,v0,su64", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (1, 1);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     unsigned int bits = c.type_suffix (0).element_bits;
+     return c.require_immediate_range (1, 0, bits - 1);
+   }
+ };
+ SHAPE (shift_left_imm)
+ 
+ /* sv<t0>_t svfoo[_n_t0])(sv<t0:half>_t, uint64_t)
+ 
+    where the final argument must be an integer constant expression in the
+    range [0, sizeof (<t0>_t) * 4 - 1].  */
+ struct shift_left_imm_long_def : public binary_imm_long_base
+ {
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     unsigned int bits = c.type_suffix (0).element_bits / 2;
+     return c.require_immediate_range (1, 0, bits - 1);
+   }
+ };
+ SHAPE (shift_left_imm_long)
+ 
+ /* sv<t0:uint>_t svfoo[_n_t0])(sv<t0>_t, uint64_t)
+ 
+    where the final argument must be an integer constant expression in the
+    range [0, sizeof (<t0>_t) * 8 - 1].  */
+ struct shift_left_imm_to_uint_def : public shift_left_imm_def
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_n);
+     build_all (b, "vu0,v0,su64", group, MODE_n);
+   }
+ };
+ SHAPE (shift_left_imm_to_uint)
+ 
+ /* sv<t0>_t svfoo[_n_t0])(sv<t0>_t, uint64_t)
+ 
+    where the final argument must be an integer constant expression in the
+    range [1, sizeof (<t0>_t) * 8].  */
+ struct shift_right_imm_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_n);
+     build_all (b, "v0,v0,su64", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (1, 1);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     unsigned int bits = c.type_suffix (0).element_bits;
+     return c.require_immediate_range (1, 1, bits);
+   }
+ };
+ SHAPE (shift_right_imm)
+ 
+ /* sv<t0:half>_t svfoo[_n_t0])(sv<t0>_t, uint64_t)
+ 
+    where the final argument must be an integer constant expression in the
+    range [1, sizeof (<t0>_t) * 4].  */
+ typedef shift_right_imm_narrow_wrapper<binary_imm_narrowb_base<>, 1>
+   shift_right_imm_narrowb_def;
+ SHAPE (shift_right_imm_narrowb)
+ 
+ /* sv<t0:half>_t svfoo[_n_t0])(sv<t0:half>_t, sv<t0>_t, uint64_t)
+ 
+    where the final argument must be an integer constant expression in the
+    range [1, sizeof (<t0>_t) * 4].  */
+ typedef shift_right_imm_narrow_wrapper<binary_imm_narrowt_base<>, 2>
+   shift_right_imm_narrowt_def;
+ SHAPE (shift_right_imm_narrowt)
+ 
+ /* sv<t0:uint:half>_t svfoo[_n_t0])(sv<t0>_t, uint64_t)
+ 
+    where the final argument must be an integer constant expression in the
+    range [1, sizeof (<t0>_t) * 4].  */
+ typedef binary_imm_narrowb_base<TYPE_unsigned>
+   binary_imm_narrowb_base_unsigned;
+ typedef shift_right_imm_narrow_wrapper<binary_imm_narrowb_base_unsigned, 1>
+   shift_right_imm_narrowb_to_uint_def;
+ SHAPE (shift_right_imm_narrowb_to_uint)
+ 
+ /* sv<t0:uint:half>_t svfoo[_n_t0])(sv<t0:uint:half>_t, sv<t0>_t, uint64_t)
+ 
+    where the final argument must be an integer constant expression in the
+    range [1, sizeof (<t0>_t) * 4].  */
+ typedef binary_imm_narrowt_base<TYPE_unsigned>
+   binary_imm_narrowt_base_unsigned;
+ typedef shift_right_imm_narrow_wrapper<binary_imm_narrowt_base_unsigned, 2>
+   shift_right_imm_narrowt_to_uint_def;
+ SHAPE (shift_right_imm_narrowt_to_uint)
+ 
+ /* void svfoo[_t0](<X>_t *, sv<t0>[xN]_t)
+    void svfoo_vnum[_t0](<X>_t *, int64_t, sv<t0>[xN]_t)
+ 
+    where <X> might be tied to <t0> (for non-truncating stores) or might
+    depend on the function base name (for truncating stores).  */
+ struct store_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     b.add_overloaded_functions (group, MODE_vnum);
+     build_all (b, "_,as,t0", group, MODE_none);
+     build_all (b, "_,as,ss64,t0", group, MODE_vnum);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     bool vnum_p = r.mode_suffix_id == MODE_vnum;
+     gcc_assert (r.mode_suffix_id == MODE_none || vnum_p);
+ 
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (vnum_p ? 3 : 2, i, nargs)
+ 	|| !r.require_pointer_type (i)
+ 	|| (vnum_p && !r.require_scalar_type (i + 1, "int64_t"))
+ 	|| ((type = r.infer_tuple_type (nargs - 1)) == NUM_TYPE_SUFFIXES))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ SHAPE (store)
+ 
+ /* void svfoo_[s32]index[_t0](<X>_t *, svint32_t, sv<t0>_t)
+    void svfoo_[s64]index[_t0](<X>_t *, svint64_t, sv<t0>_t)
+    void svfoo_[u32]index[_t0](<X>_t *, svuint32_t, sv<t0>_t)
+    void svfoo_[u64]index[_t0](<X>_t *, svuint64_t, sv<t0>_t)
+ 
+    void svfoo[_u32base]_index[_t0](svuint32_t, int64_t, sv<t0>_t)
+    void svfoo[_u64base]_index[_t0](svuint64_t, int64_t, sv<t0>_t)
+ 
+    where <X> might be tied to <t0> (for non-truncating stores) or might
+    depend on the function base name (for truncating stores).  */
+ struct store_scatter_index_def : public store_scatter_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_index);
+     build_sv_index (b, "_,as,d,t0", group);
+     build_vs_index (b, "_,b,ss64,t0", group);
+   }
+ };
+ SHAPE (store_scatter_index)
+ 
+ /* void svfoo_[s64]index[_t0](<X>_t *, svint64_t, sv<t0>_t)
+    void svfoo_[u64]index[_t0](<X>_t *, svuint64_t, sv<t0>_t)
+ 
+    void svfoo[_u32base]_index[_t0](svuint32_t, int64_t, sv<t0>_t)
+    void svfoo[_u64base]_index[_t0](svuint64_t, int64_t, sv<t0>_t)
+ 
+    i.e. a version of store_scatter_index that doesn't support 32-bit
+    vector indices.  */
+ struct store_scatter_index_restricted_def : public store_scatter_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_index);
+     build_sv_index64 (b, "_,as,d,t0", group);
+     build_vs_index (b, "_,b,ss64,t0", group);
+   }
+ };
+ SHAPE (store_scatter_index_restricted)
+ 
+ /* void svfoo_[s32]offset[_t0](<X>_t *, svint32_t, sv<t0>_t)
+    void svfoo_[s64]offset[_t0](<X>_t *, svint64_t, sv<t0>_t)
+    void svfoo_[u32]offset[_t0](<X>_t *, svuint32_t, sv<t0>_t)
+    void svfoo_[u64]offset[_t0](<X>_t *, svuint64_t, sv<t0>_t)
+ 
+    void svfoo[_u32base_t0](svuint32_t, sv<t0>_t)
+    void svfoo[_u64base_t0](svuint64_t, sv<t0>_t)
+ 
+    void svfoo[_u32base]_offset[_t0](svuint32_t, int64_t, sv<t0>_t)
+    void svfoo[_u64base]_offset[_t0](svuint64_t, int64_t, sv<t0>_t)
+ 
+    where <X> might be tied to <t0> (for non-truncating stores) or might
+    depend on the function base name (for truncating stores).  */
+ struct store_scatter_offset_def : public store_scatter_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     b.add_overloaded_functions (group, MODE_offset);
+     build_sv_offset (b, "_,as,d,t0", group);
+     build_v_base (b, "_,b,t0", group);
+     build_vs_offset (b, "_,b,ss64,t0", group);
+   }
+ };
+ SHAPE (store_scatter_offset)
+ 
+ /* void svfoo_[s64]offset[_t0](<X>_t *, svint64_t, sv<t0>_t)
+    void svfoo_[u32]offset[_t0](<X>_t *, svuint32_t, sv<t0>_t)
+    void svfoo_[u64]offset[_t0](<X>_t *, svuint64_t, sv<t0>_t)
+ 
+    void svfoo[_u32base_t0](svuint32_t, sv<t0>_t)
+    void svfoo[_u64base_t0](svuint64_t, sv<t0>_t)
+ 
+    void svfoo[_u32base]_offset[_t0](svuint32_t, int64_t, sv<t0>_t)
+    void svfoo[_u64base]_offset[_t0](svuint64_t, int64_t, sv<t0>_t)
+ 
+    i.e. a version of store_scatter_offset that doesn't support svint32_t
+    offsets.  */
+ struct store_scatter_offset_restricted_def : public store_scatter_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     b.add_overloaded_functions (group, MODE_offset);
+     build_sv_uint_offset (b, "_,as,d,t0", group);
+     build_v_base (b, "_,b,t0", group);
+     build_vs_offset (b, "_,b,ss64,t0", group);
+   }
+ };
+ SHAPE (store_scatter_offset_restricted)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>xN_t, sv<t0:uint>_t).  */
+ struct tbl_tuple_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,t0,vu0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (2, i, nargs)
+ 	|| (type = r.infer_tuple_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_derived_vector_type (i + 1, i, type, TYPE_unsigned))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ SHAPE (tbl_tuple)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, svbfloatt16_t, svbfloat16_t).  */
+ struct ternary_bfloat_def
+   : public ternary_resize2_base<16, TYPE_bfloat, TYPE_bfloat>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vB,vB", group, MODE_none);
+   }
+ };
+ SHAPE (ternary_bfloat)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, svbfloat16_t, svbfloat16_t, uint64_t)
+ 
+    where the final argument is an integer constant expression in the range
+    [0, 7].  */
+ typedef ternary_bfloat_lane_base<1> ternary_bfloat_lane_def;
+ SHAPE (ternary_bfloat_lane)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, svbfloat16_t, svbfloat16_t, uint64_t)
+ 
+    where the final argument is an integer constant expression in the range
+    [0, 3].  */
+ typedef ternary_bfloat_lane_base<2> ternary_bfloat_lanex2_def;
+ SHAPE (ternary_bfloat_lanex2)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, svbfloatt16_t, svbfloat16_t)
+    sv<t0>_t svfoo[_n_t0](sv<t0>_t, svbfloat16_t, bfloat16_t).  */
+ struct ternary_bfloat_opt_n_def
+   : public ternary_resize2_opt_n_base<16, TYPE_bfloat, TYPE_bfloat>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vB,vB", group, MODE_none);
+     build_all (b, "v0,v0,vB,sB", group, MODE_n);
+   }
+ };
+ SHAPE (ternary_bfloat_opt_n)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:int:quarter>_t, sv<t0:uint:quarter>_t,
+ 		       uint64_t)
+ 
+    where the final argument is an integer constant expression in the range
+    [0, 16 / sizeof (<t0>_t) - 1].  */
+ struct ternary_intq_uintq_lane_def
+   : public ternary_qq_lane_base<TYPE_signed, TYPE_unsigned>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vqs0,vqu0,su64", group, MODE_none);
+   }
+ };
+ SHAPE (ternary_intq_uintq_lane)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:int:quarter>_t, sv<t0:uint:quarter>_t)
+    sv<t0>_t svfoo[_n_t0](sv<t0>_t, sv<t0:int:quarter>_t,
+ 			 <t0:uint:quarter>_t).  */
+ struct ternary_intq_uintq_opt_n_def
+   : public ternary_resize2_opt_n_base<function_resolver::QUARTER_SIZE,
+ 				      TYPE_signed, TYPE_unsigned>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vqs0,vqu0", group, MODE_none);
+     build_all (b, "v0,v0,vqs0,squ0", group, MODE_n);
+   }
+ };
+ SHAPE (ternary_intq_uintq_opt_n)
+ 
+ /* svbool_t svfoo[_<t0>](sv<t0>_t, sv<t0>_t, sv<t0>_t, uint64_t)
+ 
+    where the final argument is an integer constant expression in the
+    range [0, 16 / sizeof (<t0>_t) - 1].  */
+ struct ternary_lane_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,v0,v0,su64", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (3, 1);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     return c.require_immediate_lane_index (3);
+   }
+ };
+ SHAPE (ternary_lane)
+ 
+ /* svbool_t svfoo[_<t0>](sv<t0>_t, sv<t0>_t, sv<t0>_t, uint64_t, uint64_t)
+ 
+    where the penultimate argument is an integer constant expression in
+    the range [0, 8 / sizeof (<t0>_t) - 1] and where the final argument
+    is an integer constant expression in {0, 90, 180, 270}.  */
+ struct ternary_lane_rotate_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,v0,v0,su64,su64", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (3, 2);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     return (c.require_immediate_lane_index (3, 2)
+ 	    && c.require_immediate_one_of (4, 0, 90, 180, 270));
+   }
+ };
+ SHAPE (ternary_lane_rotate)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:half>_t, sv<t0:half>_t, uint64_t)
+ 
+    where the final argument is an integer constant expression in the range
+    [0, 32 / sizeof (<t0>_t) - 1].  */
+ struct ternary_long_lane_def
+   : public ternary_resize2_lane_base<function_resolver::HALF_SIZE>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vh0,vh0,su64", group, MODE_none);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     return c.require_immediate_lane_index (3);
+   }
+ };
+ SHAPE (ternary_long_lane)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:half>_t, sv<t0:half>_t)
+    sv<t0>_t svfoo[_n_t0](sv<t0>_t, sv<t0:half>_t, <t0:half>_t)
+ 
+    i.e. a version of the standard ternary shape ternary_opt_n in which
+    the element type of the last two arguments is the half-sized
+    equivalent of <t0>.  */
+ struct ternary_long_opt_n_def
+   : public ternary_resize2_opt_n_base<function_resolver::HALF_SIZE>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vh0,vh0", group, MODE_none);
+     build_all (b, "v0,v0,vh0,sh0", group, MODE_n);
+   }
+ };
+ SHAPE (ternary_long_opt_n)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0>_t, sv<t0>_t)
+    sv<t0>_t svfoo[_n_t0](sv<t0>_t, sv<t0>_t, <t0>_t)
+ 
+    i.e. the standard shape for ternary operations that operate on
+    uniform types.  */
+ struct ternary_opt_n_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,v0,v0", group, MODE_none);
+     build_all (b, "v0,v0,v0,s0", group, MODE_n);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform_opt_n (3);
+   }
+ };
+ SHAPE (ternary_opt_n)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:quarter>_t, sv<t0:quarter>_t, uint64_t)
+ 
+    where the final argument is an integer constant expression in the range
+    [0, 16 / sizeof (<t0>_t) - 1].  */
+ struct ternary_qq_lane_def : public ternary_qq_lane_base<>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vq0,vq0,su64", group, MODE_none);
+   }
+ };
+ SHAPE (ternary_qq_lane)
+ 
+ /* svbool_t svfoo[_<t0>](sv<t0>_t, sv<t0:quarter>_t, sv<t0:quarter>_t,
+ 			 uint64_t)
+ 
+    where the final argument is an integer constant expression in
+    {0, 90, 180, 270}.  */
+ struct ternary_qq_lane_rotate_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vq0,vq0,su64,su64", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (5, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_derived_vector_type (i + 1, i, type, r.SAME_TYPE_CLASS,
+ 					   r.QUARTER_SIZE)
+ 	|| !r.require_derived_vector_type (i + 2, i, type, r.SAME_TYPE_CLASS,
+ 					   r.QUARTER_SIZE)
+ 	|| !r.require_integer_immediate (i + 3)
+ 	|| !r.require_integer_immediate (i + 4))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     return (c.require_immediate_lane_index (3, 4)
+ 	    && c.require_immediate_one_of (4, 0, 90, 180, 270));
+   }
+ };
+ SHAPE (ternary_qq_lane_rotate)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:quarter>_t, sv<t0:quarter>_t)
+    sv<t0>_t svfoo[_n_t0](sv<t0>_t, sv<t0:quarter>_t, <t0:quarter>_t)
+ 
+    i.e. a version of the standard ternary shape ternary_opt_n in which
+    the element type of the last two arguments is the quarter-sized
+    equivalent of <t0>.  */
+ struct ternary_qq_opt_n_def
+   : public ternary_resize2_opt_n_base<function_resolver::QUARTER_SIZE>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vq0,vq0", group, MODE_none);
+     build_all (b, "v0,v0,vq0,sq0", group, MODE_n);
+   }
+ };
+ SHAPE (ternary_qq_opt_n)
+ 
+ /* svbool_t svfoo[_<t0>](sv<t0>_t, sv<t0:quarter>_t, sv<t0:quarter>_t,
+ 			 uint64_t)
+ 
+    where the final argument is an integer constant expression in
+    {0, 90, 180, 270}.  */
+ struct ternary_qq_rotate_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vq0,vq0,su64", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (4, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_derived_vector_type (i + 1, i, type, r.SAME_TYPE_CLASS,
+ 					   r.QUARTER_SIZE)
+ 	|| !r.require_derived_vector_type (i + 2, i, type, r.SAME_TYPE_CLASS,
+ 					   r.QUARTER_SIZE)
+ 	|| !r.require_integer_immediate (i + 3))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     return c.require_immediate_one_of (3, 0, 90, 180, 270);
+   }
+ };
+ SHAPE (ternary_qq_rotate)
+ 
+ /* svbool_t svfoo[_<t0>](sv<t0>_t, sv<t0>_t, sv<t0>_t, uint64_t)
+ 
+    where the final argument is an integer constant expression in
+    {0, 90, 180, 270}.  */
+ struct ternary_rotate_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,v0,v0,su64", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (3, 1);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     return c.require_immediate_one_of (3, 0, 90, 180, 270);
+   }
+ };
+ SHAPE (ternary_rotate)
+ 
+ /* sv<t0>_t svfoo[_n_t0])(sv<t0>_t, sv<t0>_t, uint64_t)
+ 
+    where the final argument must be an integer constant expression in the
+    range [0, sizeof (<t0>_t) * 8 - 1].  */
+ struct ternary_shift_left_imm_def : public ternary_shift_imm_base
+ {
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     unsigned int bits = c.type_suffix (0).element_bits;
+     return c.require_immediate_range (2, 0, bits - 1);
+   }
+ };
+ SHAPE (ternary_shift_left_imm)
+ 
+ /* sv<t0>_t svfoo[_n_t0])(sv<t0>_t, sv<t0>_t, uint64_t)
+ 
+    where the final argument must be an integer constant expression in the
+    range [1, sizeof (<t0>_t) * 8].  */
+ struct ternary_shift_right_imm_def : public ternary_shift_imm_base
+ {
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     unsigned int bits = c.type_suffix (0).element_bits;
+     return c.require_immediate_range (2, 1, bits);
+   }
+ };
+ SHAPE (ternary_shift_right_imm)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0>_t, sv<t0:uint>_t).  */
+ struct ternary_uint_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,v0,vu0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (3, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| !r.require_matching_vector_type (i + 1, type)
+ 	|| !r.require_derived_vector_type (i + 2, i, type, TYPE_unsigned))
+       return error_mark_node;
+ 
+     return r.resolve_to (r.mode_suffix_id, type);
+   }
+ };
+ SHAPE (ternary_uint)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, svu<t0:uint:quarter>_t,
+ 		       sv<t0:int:quarter>_t).  */
+ struct ternary_uintq_intq_def
+   : public ternary_resize2_base<function_resolver::QUARTER_SIZE,
+ 				TYPE_unsigned, TYPE_signed>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vqu0,vqs0", group, MODE_none);
+   }
+ };
+ SHAPE (ternary_uintq_intq)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:uint:quarter>_t, sv<t0:int:quarter>_t,
+ 		       uint64_t)
+ 
+    where the final argument is an integer constant expression in the range
+    [0, 16 / sizeof (<t0>_t) - 1].  */
+ struct ternary_uintq_intq_lane_def
+   : public ternary_qq_lane_base<TYPE_unsigned, TYPE_signed>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vqu0,vqs0,su64", group, MODE_none);
+   }
+ };
+ SHAPE (ternary_uintq_intq_lane)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t, sv<t0:uint:quarter>_t, sv<t0:int:quarter>_t)
+    sv<t0>_t svfoo[_n_t0](sv<t0>_t, sv<t0:uint:quarter>_t,
+ 			 <t0:int:quarter>_t).  */
+ struct ternary_uintq_intq_opt_n_def
+   : public ternary_resize2_opt_n_base<function_resolver::QUARTER_SIZE,
+ 				      TYPE_unsigned, TYPE_signed>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,vqu0,vqs0", group, MODE_none);
+     build_all (b, "v0,v0,vqu0,sqs0", group, MODE_n);
+   }
+ };
+ SHAPE (ternary_uintq_intq_opt_n)
+ 
+ /* svbool_t svfoo[_<t0>](sv<t0>_t, sv<t0>_t, uint64_t)
+ 
+    where the final argument is an integer constant expression in the
+    range [0, 7].  */
+ struct tmad_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0,v0,su64", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_uniform (2, 1);
+   }
+ 
+   bool
+   check (function_checker &c) const OVERRIDE
+   {
+     return c.require_immediate_range (2, 0, 7);
+   }
+ };
+ SHAPE (tmad)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0>_t)
+ 
+    i.e. the standard shape for unary operations that operate on
+    uniform types.  */
+ struct unary_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_unary ();
+   }
+ };
+ SHAPE (unary)
+ 
+ /* sv<t0>_t svfoo_t0[_t1](sv<t1>_t)
+ 
+    where the target type <t0> must be specified explicitly but the source
+    type <t1> can be inferred.  */
+ struct unary_convert_def : public overloaded_base<1>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v1", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_unary (r.type_suffix (0).tclass,
+ 			    r.type_suffix (0).element_bits);
+   }
+ };
+ SHAPE (unary_convert)
+ 
+ /* sv<t0>_t svfoo_t0[_t1](sv<t0>_t, sv<t1>_t)
+ 
+    This is a version of unary_convert in which the even-indexed
+    elements are passed in as a first parameter, before any governing
+    predicate.  */
+ struct unary_convert_narrowt_def : public overloaded_base<1>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,v1", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_unary (r.type_suffix (0).tclass,
+ 			    r.type_suffix (0).element_bits, true);
+   }
+ };
+ SHAPE (unary_convert_narrowt)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0:half>_t).  */
+ struct unary_long_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,vh0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type, result_type;
+     if (!r.check_gp_argument (1, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES
+ 	|| (result_type = long_type_suffix (r, type)) == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     if (tree res = r.lookup_form (r.mode_suffix_id, result_type))
+       return res;
+ 
+     return r.report_no_such_form (type);
+   }
+ };
+ SHAPE (unary_long)
+ 
+ /* sv<t0>_t svfoo[_n]_t0(<t0>_t).  */
+ struct unary_n_def : public overloaded_base<1>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     /* The "_n" suffix is optional; the full name has it, but the short
+        name doesn't.  */
+     build_all (b, "v0,s0", group, MODE_n, true);
+   }
+ 
+   tree
+   resolve (function_resolver &) const OVERRIDE
+   {
+     /* The short forms just make "_n" implicit, so no resolution is needed.  */
+     gcc_unreachable ();
+   }
+ };
+ SHAPE (unary_n)
+ 
+ /* sv<t0:half>_t svfoo[_t0](sv<t0>_t).  */
+ typedef unary_narrowb_base<> unary_narrowb_def;
+ SHAPE (unary_narrowb)
+ 
+ /* sv<t0:half>_t svfoo[_t0](sv<t0:half>_t, sv<t0>_t).  */
+ typedef unary_narrowt_base<> unary_narrowt_def;
+ SHAPE (unary_narrowt)
+ 
+ /* sv<t0:uint:half>_t svfoo[_t0](sv<t0>_t).  */
+ typedef unary_narrowb_base<TYPE_unsigned> unary_narrowb_to_uint_def;
+ SHAPE (unary_narrowb_to_uint)
+ 
+ /* sv<t0:uint:half>_t svfoo[_t0](sv<t0:uint:half>_t, sv<t0>_t).  */
+ typedef unary_narrowt_base<TYPE_unsigned> unary_narrowt_to_uint_def;
+ SHAPE (unary_narrowt_to_uint)
+ 
+ /* svbool_t svfoo(svbool_t).  */
+ struct unary_pred_def : public nonoverloaded_base
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     build_all (b, "v0,v0", group, MODE_none);
+   }
+ };
+ SHAPE (unary_pred)
+ 
+ /* sv<t0:int>_t svfoo[_t0](sv<t0>_t)
+ 
+    i.e. a version of "unary" in which the returned vector contains
+    signed integers.  */
+ struct unary_to_int_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "vs0,v0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_unary (TYPE_signed);
+   }
+ };
+ SHAPE (unary_to_int)
+ 
+ /* sv<t0:uint>_t svfoo[_t0](sv<t0>_t)
+ 
+    i.e. a version of "unary" in which the returned vector contains
+    unsigned integers.  */
+ struct unary_to_uint_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "vu0,v0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     return r.resolve_unary (TYPE_unsigned);
+   }
+ };
+ SHAPE (unary_to_uint)
+ 
+ /* sv<t0>_t svfoo[_t0](sv<t0:uint>_t)
+ 
+    where <t0> always belongs a certain type class, and where <t0:uint>
+    therefore uniquely determines <t0>.  */
+ struct unary_uint_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,vu0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (1, i, nargs)
+ 	|| (type = r.infer_unsigned_vector_type (i)) == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     /* Search for a valid suffix with the same number of bits as TYPE.  */
+     unsigned int element_bits = type_suffixes[type].element_bits;
+     if (type_suffixes[type].unsigned_p)
+       for (unsigned int j = 0; j < NUM_TYPE_SUFFIXES; ++j)
+ 	if (type_suffixes[j].element_bits == element_bits)
+ 	  if (tree res = r.lookup_form (r.mode_suffix_id,
+ 					type_suffix_index (j)))
+ 	    return res;
+ 
+     return r.report_no_such_form (type);
+   }
+ };
+ SHAPE (unary_uint)
+ 
+ /* sv<t0>_t svfoo[_<t0>](sv<t0:half>_t)
+ 
+    i.e. a version of "unary" in which the source elements are half the
+    size of the destination elements, but have the same type class.  */
+ struct unary_widen_def : public overloaded_base<0>
+ {
+   void
+   build (function_builder &b, const function_group_info &group) const OVERRIDE
+   {
+     b.add_overloaded_functions (group, MODE_none);
+     build_all (b, "v0,vh0", group, MODE_none);
+   }
+ 
+   tree
+   resolve (function_resolver &r) const OVERRIDE
+   {
+     unsigned int i, nargs;
+     type_suffix_index type;
+     if (!r.check_gp_argument (1, i, nargs)
+ 	|| (type = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES)
+       return error_mark_node;
+ 
+     /* There is only a single form for predicates.  */
+     if (type == TYPE_SUFFIX_b)
+       return r.resolve_to (r.mode_suffix_id, type);
+ 
+     if (type_suffixes[type].integer_p
+ 	&& type_suffixes[type].element_bits < 64)
+       {
+ 	type_suffix_index wide_suffix
+ 	  = find_type_suffix (type_suffixes[type].tclass,
+ 			      type_suffixes[type].element_bits * 2);
+ 	if (tree res = r.lookup_form (r.mode_suffix_id, wide_suffix))
+ 	  return res;
+       }
+ 
+     return r.report_no_such_form (type);
+   }
+ };
+ SHAPE (unary_widen)
+ 
+ }
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-shapes.h gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-shapes.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-shapes.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-shapes.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,191 ----
+ /* ACLE support for AArch64 SVE (function shapes)
+    Copyright (C) 2018-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_AARCH64_SVE_BUILTINS_SHAPES_H
+ #define GCC_AARCH64_SVE_BUILTINS_SHAPES_H
+ 
+ namespace aarch64_sve
+ {
+   /* The naming convention is:
+ 
+      - to use the name of the function if the rules are very specific to
+        a particular function (e.g. svext, for which the range of the
+        final immediate value is in no way generic).
+ 
+      - to use names like "unary" etc. if the rules are somewhat generic,
+        especially if there are no ranges involved.
+ 
+      When using generic names, the handling of the final vector argument
+      can be modified as follows:
+ 
+      - an "_n" suffix changes the argument from a vector to a scalar.
+ 
+      - an "_opt_n" suffix says that there are two forms of each function:
+        one in which the argument is the usual vector, and one in which it
+        is replaced by a scalar.
+ 
+      - "_int" and "_uint" replace the argument's element type with a
+        signed or unsigned integer of the same width.  The suffixes above
+        then indicate whether this final argument is or might be a scalar.
+ 
+      - "_int64" and "_uint64" similarly replace the argument's element type
+        with int64_t or uint64_t.
+ 
+      - "_wide" replaces the argument's element type with a 64-bit integer
+        of the same signedness.  This only makes sense for integer elements.
+ 
+      - "_lane" indicates that the argument is indexed by a constant lane
+        number, provided as an immediately-following argument of type uint64_t.
+ 
+      Also:
+ 
+      - "inherent" means that the function takes no arguments.
+ 
+      - "_rotate" means that the final argument is a rotation amount
+        (0, 90, 180 or 270).
+ 
+      - "_scalar" indicates that all data arguments are scalars rather
+        than vectors.
+ 
+      - in gather/scatter addresses, "sv" stands for "scalar base,
+        vector displacement" while "vs" stands for "vector base,
+        scalar displacement".
+ 
+      - "_pred" indicates that the function takes an svbool_t argument
+        that does not act as a governing predicate..  */
+   namespace shapes
+   {
+     extern const function_shape *const adr_index;
+     extern const function_shape *const adr_offset;
+     extern const function_shape *const binary;
+     extern const function_shape *const binary_int_opt_n;
+     extern const function_shape *const binary_lane;
+     extern const function_shape *const binary_long_lane;
+     extern const function_shape *const binary_long_opt_n;
+     extern const function_shape *const binary_n;
+     extern const function_shape *const binary_narrowb_opt_n;
+     extern const function_shape *const binary_narrowt_opt_n;
+     extern const function_shape *const binary_opt_n;
+     extern const function_shape *const binary_pred;
+     extern const function_shape *const binary_rotate;
+     extern const function_shape *const binary_scalar;
+     extern const function_shape *const binary_to_uint;
+     extern const function_shape *const binary_uint;
+     extern const function_shape *const binary_uint_n;
+     extern const function_shape *const binary_uint_opt_n;
+     extern const function_shape *const binary_uint64_n;
+     extern const function_shape *const binary_uint64_opt_n;
+     extern const function_shape *const binary_wide;
+     extern const function_shape *const binary_wide_opt_n;
+     extern const function_shape *const clast;
+     extern const function_shape *const compare;
+     extern const function_shape *const compare_opt_n;
+     extern const function_shape *const compare_ptr;
+     extern const function_shape *const compare_scalar;
+     extern const function_shape *const compare_wide_opt_n;
+     extern const function_shape *const count_inherent;
+     extern const function_shape *const count_pat;
+     extern const function_shape *const count_pred;
+     extern const function_shape *const count_vector;
+     extern const function_shape *const create;
+     extern const function_shape *const dupq;
+     extern const function_shape *const ext;
+     extern const function_shape *const fold_left;
+     extern const function_shape *const get;
+     extern const function_shape *const inc_dec;
+     extern const function_shape *const inc_dec_pat;
+     extern const function_shape *const inc_dec_pred;
+     extern const function_shape *const inc_dec_pred_scalar;
+     extern const function_shape *const inherent;
+     extern const function_shape *const inherent_b;
+     extern const function_shape *const load;
+     extern const function_shape *const load_ext;
+     extern const function_shape *const load_ext_gather_index;
+     extern const function_shape *const load_ext_gather_index_restricted;
+     extern const function_shape *const load_ext_gather_offset;
+     extern const function_shape *const load_ext_gather_offset_restricted;
+     extern const function_shape *const load_gather_sv;
+     extern const function_shape *const load_gather_sv_restricted;
+     extern const function_shape *const load_gather_vs;
+     extern const function_shape *const load_replicate;
+     extern const function_shape *const mmla;
+     extern const function_shape *const pattern_pred;
+     extern const function_shape *const prefetch;
+     extern const function_shape *const prefetch_gather_index;
+     extern const function_shape *const prefetch_gather_offset;
+     extern const function_shape *const ptest;
+     extern const function_shape *const rdffr;
+     extern const function_shape *const reduction;
+     extern const function_shape *const reduction_wide;
+     extern const function_shape *const set;
+     extern const function_shape *const setffr;
+     extern const function_shape *const shift_left_imm_long;
+     extern const function_shape *const shift_left_imm_to_uint;
+     extern const function_shape *const shift_right_imm;
+     extern const function_shape *const shift_right_imm_narrowb;
+     extern const function_shape *const shift_right_imm_narrowt;
+     extern const function_shape *const shift_right_imm_narrowb_to_uint;
+     extern const function_shape *const shift_right_imm_narrowt_to_uint;
+     extern const function_shape *const store;
+     extern const function_shape *const store_scatter_index;
+     extern const function_shape *const store_scatter_index_restricted;
+     extern const function_shape *const store_scatter_offset;
+     extern const function_shape *const store_scatter_offset_restricted;
+     extern const function_shape *const tbl_tuple;
+     extern const function_shape *const ternary_bfloat;
+     extern const function_shape *const ternary_bfloat_lane;
+     extern const function_shape *const ternary_bfloat_lanex2;
+     extern const function_shape *const ternary_bfloat_opt_n;
+     extern const function_shape *const ternary_intq_uintq_lane;
+     extern const function_shape *const ternary_intq_uintq_opt_n;
+     extern const function_shape *const ternary_lane;
+     extern const function_shape *const ternary_lane_rotate;
+     extern const function_shape *const ternary_long_lane;
+     extern const function_shape *const ternary_long_opt_n;
+     extern const function_shape *const ternary_opt_n;
+     extern const function_shape *const ternary_qq_lane;
+     extern const function_shape *const ternary_qq_lane_rotate;
+     extern const function_shape *const ternary_qq_opt_n;
+     extern const function_shape *const ternary_qq_rotate;
+     extern const function_shape *const ternary_rotate;
+     extern const function_shape *const ternary_shift_left_imm;
+     extern const function_shape *const ternary_shift_right_imm;
+     extern const function_shape *const ternary_uint;
+     extern const function_shape *const ternary_uintq_intq;
+     extern const function_shape *const ternary_uintq_intq_lane;
+     extern const function_shape *const ternary_uintq_intq_opt_n;
+     extern const function_shape *const tmad;
+     extern const function_shape *const unary;
+     extern const function_shape *const unary_convert;
+     extern const function_shape *const unary_convert_narrowt;
+     extern const function_shape *const unary_long;
+     extern const function_shape *const unary_n;
+     extern const function_shape *const unary_narrowb;
+     extern const function_shape *const unary_narrowt;
+     extern const function_shape *const unary_narrowb_to_uint;
+     extern const function_shape *const unary_narrowt_to_uint;
+     extern const function_shape *const unary_pred;
+     extern const function_shape *const unary_to_int;
+     extern const function_shape *const unary_to_uint;
+     extern const function_shape *const unary_uint;
+     extern const function_shape *const unary_widen;
+   }
+ }
+ 
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,655 ----
+ /* ACLE support for AArch64 SVE (__ARM_FEATURE_SVE2 intrinsics)
+    Copyright (C) 2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tm.h"
+ #include "tree.h"
+ #include "rtl.h"
+ #include "tm_p.h"
+ #include "memmodel.h"
+ #include "insn-codes.h"
+ #include "optabs.h"
+ #include "recog.h"
+ #include "expr.h"
+ #include "basic-block.h"
+ #include "function.h"
+ #include "fold-const.h"
+ #include "gimple.h"
+ #include "gimple-iterator.h"
+ #include "gimplify.h"
+ #include "explow.h"
+ #include "emit-rtl.h"
+ #include "tree-vector-builder.h"
+ #include "rtx-vector-builder.h"
+ #include "vec-perm-indices.h"
+ #include "aarch64-sve-builtins.h"
+ #include "aarch64-sve-builtins-shapes.h"
+ #include "aarch64-sve-builtins-base.h"
+ #include "aarch64-sve-builtins-sve2.h"
+ #include "aarch64-sve-builtins-functions.h"
+ 
+ using namespace aarch64_sve;
+ 
+ namespace {
+ 
+ /* Return the UNSPEC_CDOT* unspec for rotation amount ROT.  */
+ static int
+ unspec_cdot (int rot)
+ {
+   switch (rot)
+     {
+     case 0: return UNSPEC_CDOT;
+     case 90: return UNSPEC_CDOT90;
+     case 180: return UNSPEC_CDOT180;
+     case 270: return UNSPEC_CDOT270;
+     default: gcc_unreachable ();
+     }
+ }
+ 
+ /* Return the UNSPEC_SQRDCMLAH* unspec for rotation amount ROT.  */
+ static int
+ unspec_sqrdcmlah (int rot)
+ {
+   switch (rot)
+     {
+     case 0: return UNSPEC_SQRDCMLAH;
+     case 90: return UNSPEC_SQRDCMLAH90;
+     case 180: return UNSPEC_SQRDCMLAH180;
+     case 270: return UNSPEC_SQRDCMLAH270;
+     default: gcc_unreachable ();
+     }
+ }
+ 
+ class svaba_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     rtx_code max_code = e.type_suffix (0).unsigned_p ? UMAX : SMAX;
+     machine_mode mode = e.vector_mode (0);
+     return e.use_exact_insn (code_for_aarch64_sve2_aba (max_code, mode));
+   }
+ };
+ 
+ class svcdot_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Convert the rotation amount into a specific unspec.  */
+     int rot = INTVAL (e.args.pop ());
+     return e.use_exact_insn (code_for_aarch64_sve (unspec_cdot (rot),
+ 						   e.vector_mode (0)));
+   }
+ };
+ 
+ class svcdot_lane_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Convert the rotation amount into a specific unspec.  */
+     int rot = INTVAL (e.args.pop ());
+     return e.use_exact_insn (code_for_aarch64_lane (unspec_cdot (rot),
+ 						    e.vector_mode (0)));
+   }
+ };
+ 
+ class svldnt1_gather_impl : public full_width_access
+ {
+ public:
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_READ_MEMORY;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.prepare_gather_address_operands (1, false);
+     machine_mode mem_mode = e.memory_vector_mode ();
+     return e.use_exact_insn (code_for_aarch64_gather_ldnt (mem_mode));
+   }
+ };
+ 
+ /* Implements extending forms of svldnt1_gather.  */
+ class svldnt1_gather_extend_impl : public extending_load
+ {
+ public:
+   CONSTEXPR svldnt1_gather_extend_impl (type_suffix_index memory_type)
+     : extending_load (memory_type) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.prepare_gather_address_operands (1, false);
+     /* Add a constant predicate for the extension rtx.  */
+     e.args.quick_push (CONSTM1_RTX (VNx16BImode));
+     insn_code icode = code_for_aarch64_gather_ldnt (extend_rtx_code (),
+ 						    e.vector_mode (0),
+ 						    e.memory_vector_mode ());
+     return e.use_exact_insn (icode);
+   }
+ };
+ 
+ /* Implements both svmatch and svnmatch; the unspec parameter decides
+    between them.  */
+ class svmatch_svnmatch_impl : public function_base
+ {
+ public:
+   CONSTEXPR svmatch_svnmatch_impl (int unspec) : m_unspec (unspec) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* These are UNSPEC_PRED_Z operations and so need a hint operand.  */
+     e.add_ptrue_hint (0, e.gp_mode (0));
+     return e.use_exact_insn (code_for_aarch64_pred (m_unspec,
+ 						    e.vector_mode (0)));
+   }
+ 
+   int m_unspec;
+ };
+ 
+ /* Implements both svmovlb and svmovlt; the unspec parameters decide
+    between them.  */
+ class svmovl_lb_impl : public unspec_based_function_base
+ {
+ public:
+   CONSTEXPR svmovl_lb_impl (int unspec_for_sint, int unspec_for_uint,
+ 			    int unspec_for_fp)
+     : unspec_based_function_base (unspec_for_sint, unspec_for_uint,
+ 				  unspec_for_fp)
+   {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.args.quick_push (const0_rtx);
+     return e.map_to_unspecs (m_unspec_for_sint, m_unspec_for_uint,
+ 			     m_unspec_for_fp);
+   }
+ };
+ 
+ class svqcadd_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Convert the rotation amount into a specific unspec.  */
+     int rot = INTVAL (e.args.pop ());
+     if (rot == 90)
+       return e.map_to_unspecs (UNSPEC_SQCADD90, -1, -1);
+     if (rot == 270)
+       return e.map_to_unspecs (UNSPEC_SQCADD270, -1, -1);
+     gcc_unreachable ();
+   }
+ };
+ 
+ class svqrdcmlah_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Convert the rotation amount into a specific unspec.  */
+     int rot = INTVAL (e.args.pop ());
+     return e.use_exact_insn (code_for_aarch64_sve (unspec_sqrdcmlah (rot),
+ 						   e.vector_mode (0)));
+   }
+ };
+ 
+ class svqrdcmlah_lane_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     /* Convert the rotation amount into a specific unspec.  */
+     int rot = INTVAL (e.args.pop ());
+     return e.use_exact_insn (code_for_aarch64_lane (unspec_sqrdcmlah (rot),
+ 						    e.vector_mode (0)));
+   }
+ };
+ 
+ class svqrshl_impl : public unspec_based_function
+ {
+ public:
+   CONSTEXPR svqrshl_impl ()
+     : unspec_based_function (UNSPEC_SQRSHL, UNSPEC_UQRSHL, -1) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     if (tree amount = uniform_integer_cst_p (gimple_call_arg (f.call, 2)))
+       {
+ 	if (wi::to_widest (amount) >= 0)
+ 	  {
+ 	    /* The rounding has no effect, and [SU]QSHL has immediate forms
+ 	       that we can use for sensible shift amounts.  */
+ 	    function_instance instance ("svqshl", functions::svqshl,
+ 					shapes::binary_int_opt_n, MODE_n,
+ 					f.type_suffix_ids, f.pred);
+ 	    return f.redirect_call (instance);
+ 	  }
+ 	else
+ 	  {
+ 	    /* The saturation has no effect, and [SU]RSHL has immediate forms
+ 	       that we can use for sensible shift amounts.  */
+ 	    function_instance instance ("svrshl", functions::svrshl,
+ 					shapes::binary_int_opt_n, MODE_n,
+ 					f.type_suffix_ids, f.pred);
+ 	    return f.redirect_call (instance);
+ 	  }
+       }
+     return NULL;
+   }
+ };
+ 
+ class svqshl_impl : public unspec_based_function
+ {
+ public:
+   CONSTEXPR svqshl_impl ()
+     : unspec_based_function (UNSPEC_SQSHL, UNSPEC_UQSHL, -1) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     if (tree amount = uniform_integer_cst_p (gimple_call_arg (f.call, 2)))
+       {
+ 	int element_bits = f.type_suffix (0).element_bits;
+ 	if (wi::to_widest (amount) >= -element_bits
+ 	    && wi::to_widest (amount) < 0)
+ 	  {
+ 	    /* The saturation has no effect for right shifts, so we can
+ 	       use the immediate form of ASR or LSR.  */
+ 	    amount = wide_int_to_tree (TREE_TYPE (amount),
+ 				       -wi::to_wide (amount));
+ 	    function_instance instance ("svasr", functions::svasr,
+ 					shapes::binary_uint_opt_n, MODE_n,
+ 					f.type_suffix_ids, f.pred);
+ 	    if (f.type_suffix (0).unsigned_p)
+ 	      {
+ 		instance.base_name = "svlsr";
+ 		instance.base = functions::svlsr;
+ 	      }
+ 	    gcall *call = as_a <gcall *> (f.redirect_call (instance));
+ 	    gimple_call_set_arg (call, 2, amount);
+ 	    return call;
+ 	  }
+       }
+     return NULL;
+   }
+ };
+ 
+ class svrshl_impl : public unspec_based_function
+ {
+ public:
+   CONSTEXPR svrshl_impl ()
+     : unspec_based_function (UNSPEC_SRSHL, UNSPEC_URSHL, -1) {}
+ 
+   gimple *
+   fold (gimple_folder &f) const OVERRIDE
+   {
+     if (tree amount = uniform_integer_cst_p (gimple_call_arg (f.call, 2)))
+       {
+ 	if (wi::to_widest (amount) >= 0)
+ 	  {
+ 	    /* The rounding has no effect, and LSL has immediate forms
+ 	       that we can use for sensible shift amounts.  */
+ 	    function_instance instance ("svlsl", functions::svlsl,
+ 					shapes::binary_uint_opt_n, MODE_n,
+ 					f.type_suffix_ids, f.pred);
+ 	    gcall *call = as_a <gcall *> (f.redirect_call (instance));
+ 	    gimple_call_set_arg (call, 2, amount);
+ 	    return call;
+ 	  }
+ 	int element_bits = f.type_suffix (0).element_bits;
+ 	if (wi::to_widest (amount) >= -element_bits)
+ 	  {
+ 	    /* The shift amount is in range of [SU]RSHR.  */
+ 	    amount = wide_int_to_tree (TREE_TYPE (amount),
+ 				       -wi::to_wide (amount));
+ 	    function_instance instance ("svrshr", functions::svrshr,
+ 					shapes::shift_right_imm, MODE_n,
+ 					f.type_suffix_ids, f.pred);
+ 	    gcall *call = as_a <gcall *> (f.redirect_call (instance));
+ 	    gimple_call_set_arg (call, 2, amount);
+ 	    return call;
+ 	  }
+       }
+     return NULL;
+   }
+ };
+ 
+ class svsqadd_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = e.vector_mode (0);
+     if (e.pred == PRED_x
+ 	&& aarch64_sve_sqadd_sqsub_immediate_p (mode, e.args[2], false))
+       return e.map_to_rtx_codes (UNKNOWN, US_PLUS, -1);
+     return e.map_to_unspecs (-1, UNSPEC_USQADD, -1);
+   }
+ };
+ 
+ class svsra_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     rtx_code shift_code = e.type_suffix (0).unsigned_p ? LSHIFTRT : ASHIFTRT;
+     machine_mode mode = e.vector_mode (0);
+     return e.use_exact_insn (code_for_aarch64_sve_add (shift_code, mode));
+   }
+ };
+ 
+ class svstnt1_scatter_impl : public full_width_access
+ {
+ public:
+   unsigned int
+   call_properties (const function_instance &) const OVERRIDE
+   {
+     return CP_WRITE_MEMORY;
+   }
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.prepare_gather_address_operands (1, false);
+     machine_mode mem_mode = e.memory_vector_mode ();
+     return e.use_exact_insn (code_for_aarch64_scatter_stnt (mem_mode));
+   }
+ };
+ 
+ /* Implements truncating forms of svstnt1_scatter.  */
+ class svstnt1_scatter_truncate_impl : public truncating_store
+ {
+ public:
+   CONSTEXPR svstnt1_scatter_truncate_impl (scalar_int_mode to_mode)
+     : truncating_store (to_mode) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     e.prepare_gather_address_operands (1, false);
+     insn_code icode = code_for_aarch64_scatter_stnt (e.vector_mode (0),
+ 						     e.memory_vector_mode ());
+     return e.use_exact_insn (icode);
+   }
+ };
+ 
+ class svtbl2_impl : public quiet<multi_vector_function>
+ {
+ public:
+   CONSTEXPR svtbl2_impl () : quiet<multi_vector_function> (2) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     return e.use_exact_insn (code_for_aarch64_sve2_tbl2 (e.vector_mode (0)));
+   }
+ };
+ 
+ class svuqadd_impl : public function_base
+ {
+ public:
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     machine_mode mode = e.vector_mode (0);
+     if (e.pred == PRED_x
+ 	&& aarch64_sve_arith_immediate_p (mode, e.args[2], false))
+       return e.use_unpred_insn (code_for_aarch64_sve_suqadd_const (mode));
+     return e.map_to_unspecs (UNSPEC_SUQADD, -1, -1);
+   }
+ };
+ 
+ /* Implements both svwhilerw and svwhilewr; the unspec parameter decides
+    between them.  */
+ class svwhilerw_svwhilewr_impl : public full_width_access
+ {
+ public:
+   CONSTEXPR svwhilerw_svwhilewr_impl (int unspec) : m_unspec (unspec) {}
+ 
+   rtx
+   expand (function_expander &e) const OVERRIDE
+   {
+     for (unsigned int i = 0; i < 2; ++i)
+       e.args[i] = e.convert_to_pmode (e.args[i]);
+     return e.use_exact_insn (code_for_while (m_unspec, Pmode, e.gp_mode (0)));
+   }
+ 
+   int m_unspec;
+ };
+ 
+ } /* end anonymous namespace */
+ 
+ namespace aarch64_sve {
+ 
+ FUNCTION (svaba, svaba_impl,)
+ FUNCTION (svabalb, unspec_based_add_function, (UNSPEC_SABDLB,
+ 					       UNSPEC_UABDLB, -1))
+ FUNCTION (svabalt, unspec_based_add_function, (UNSPEC_SABDLT,
+ 					       UNSPEC_UABDLT, -1))
+ FUNCTION (svadclb, unspec_based_function, (-1, UNSPEC_ADCLB, -1))
+ FUNCTION (svadclt, unspec_based_function, (-1, UNSPEC_ADCLT, -1))
+ FUNCTION (svaddhnb, unspec_based_function, (UNSPEC_ADDHNB, UNSPEC_ADDHNB, -1))
+ FUNCTION (svaddhnt, unspec_based_function, (UNSPEC_ADDHNT, UNSPEC_ADDHNT, -1))
+ FUNCTION (svabdlb, unspec_based_function, (UNSPEC_SABDLB, UNSPEC_UABDLB, -1))
+ FUNCTION (svabdlt, unspec_based_function, (UNSPEC_SABDLT, UNSPEC_UABDLT, -1))
+ FUNCTION (svadalp, unspec_based_function, (UNSPEC_SADALP, UNSPEC_UADALP, -1))
+ FUNCTION (svaddlb, unspec_based_function, (UNSPEC_SADDLB, UNSPEC_UADDLB, -1))
+ FUNCTION (svaddlbt, unspec_based_function, (UNSPEC_SADDLBT, -1, -1))
+ FUNCTION (svaddlt, unspec_based_function, (UNSPEC_SADDLT, UNSPEC_UADDLT, -1))
+ FUNCTION (svaddwb, unspec_based_function, (UNSPEC_SADDWB, UNSPEC_UADDWB, -1))
+ FUNCTION (svaddwt, unspec_based_function, (UNSPEC_SADDWT, UNSPEC_UADDWT, -1))
+ FUNCTION (svaddp, unspec_based_pred_function, (UNSPEC_ADDP, UNSPEC_ADDP,
+ 					       UNSPEC_FADDP))
+ FUNCTION (svaesd, fixed_insn_function, (CODE_FOR_aarch64_sve2_aesd))
+ FUNCTION (svaese, fixed_insn_function, (CODE_FOR_aarch64_sve2_aese))
+ FUNCTION (svaesimc, fixed_insn_function, (CODE_FOR_aarch64_sve2_aesimc))
+ FUNCTION (svaesmc, fixed_insn_function, (CODE_FOR_aarch64_sve2_aesmc))
+ FUNCTION (svbcax, CODE_FOR_MODE0 (aarch64_sve2_bcax),)
+ FUNCTION (svbdep, unspec_based_function, (UNSPEC_BDEP, UNSPEC_BDEP, -1))
+ FUNCTION (svbext, unspec_based_function, (UNSPEC_BEXT, UNSPEC_BEXT, -1))
+ FUNCTION (svbgrp, unspec_based_function, (UNSPEC_BGRP, UNSPEC_BGRP, -1))
+ FUNCTION (svbsl, CODE_FOR_MODE0 (aarch64_sve2_bsl),)
+ FUNCTION (svbsl1n, CODE_FOR_MODE0 (aarch64_sve2_bsl1n),)
+ FUNCTION (svbsl2n, CODE_FOR_MODE0 (aarch64_sve2_bsl2n),)
+ FUNCTION (svcdot, svcdot_impl,)
+ FUNCTION (svcdot_lane, svcdot_lane_impl,)
+ FUNCTION (svcvtlt, unspec_based_function, (-1, -1, UNSPEC_COND_FCVTLT))
+ FUNCTION (svcvtx, unspec_based_function, (-1, -1, UNSPEC_COND_FCVTX))
+ FUNCTION (svcvtxnt, CODE_FOR_MODE1 (aarch64_sve2_cvtxnt),)
+ FUNCTION (sveor3, CODE_FOR_MODE0 (aarch64_sve2_eor3),)
+ FUNCTION (sveorbt, unspec_based_function, (UNSPEC_EORBT, UNSPEC_EORBT, -1))
+ FUNCTION (sveortb, unspec_based_function, (UNSPEC_EORTB, UNSPEC_EORTB, -1))
+ FUNCTION (svhadd, unspec_based_function, (UNSPEC_SHADD, UNSPEC_UHADD, -1))
+ FUNCTION (svhsub, unspec_based_function, (UNSPEC_SHSUB, UNSPEC_UHSUB, -1))
+ FUNCTION (svhistcnt, CODE_FOR_MODE0 (aarch64_sve2_histcnt),)
+ FUNCTION (svhistseg, CODE_FOR_MODE0 (aarch64_sve2_histseg),)
+ FUNCTION (svhsubr, unspec_based_function_rotated, (UNSPEC_SHSUB,
+ 						   UNSPEC_UHSUB, -1))
+ FUNCTION (svldnt1_gather, svldnt1_gather_impl,)
+ FUNCTION (svldnt1sb_gather, svldnt1_gather_extend_impl, (TYPE_SUFFIX_s8))
+ FUNCTION (svldnt1sh_gather, svldnt1_gather_extend_impl, (TYPE_SUFFIX_s16))
+ FUNCTION (svldnt1sw_gather, svldnt1_gather_extend_impl, (TYPE_SUFFIX_s32))
+ FUNCTION (svldnt1ub_gather, svldnt1_gather_extend_impl, (TYPE_SUFFIX_u8))
+ FUNCTION (svldnt1uh_gather, svldnt1_gather_extend_impl, (TYPE_SUFFIX_u16))
+ FUNCTION (svldnt1uw_gather, svldnt1_gather_extend_impl, (TYPE_SUFFIX_u32))
+ FUNCTION (svlogb, unspec_based_function, (-1, -1, UNSPEC_COND_FLOGB))
+ FUNCTION (svmatch, svmatch_svnmatch_impl, (UNSPEC_MATCH))
+ FUNCTION (svmaxp, unspec_based_pred_function, (UNSPEC_SMAXP, UNSPEC_UMAXP,
+ 					       UNSPEC_FMAXP))
+ FUNCTION (svmaxnmp, unspec_based_pred_function, (-1, -1, UNSPEC_FMAXNMP))
+ FUNCTION (svminp, unspec_based_pred_function, (UNSPEC_SMINP, UNSPEC_UMINP,
+ 					       UNSPEC_FMINP))
+ FUNCTION (svminnmp, unspec_based_pred_function, (-1, -1, UNSPEC_FMINNMP))
+ FUNCTION (svmlalb, unspec_based_mla_function, (UNSPEC_SMULLB,
+ 					       UNSPEC_UMULLB, UNSPEC_FMLALB))
+ FUNCTION (svmlalb_lane, unspec_based_mla_lane_function, (UNSPEC_SMULLB,
+ 							 UNSPEC_UMULLB,
+ 							 UNSPEC_FMLALB))
+ FUNCTION (svmlalt, unspec_based_mla_function, (UNSPEC_SMULLT,
+ 					       UNSPEC_UMULLT, UNSPEC_FMLALT))
+ FUNCTION (svmlalt_lane, unspec_based_mla_lane_function, (UNSPEC_SMULLT,
+ 							 UNSPEC_UMULLT,
+ 							 UNSPEC_FMLALT))
+ FUNCTION (svmlslb, unspec_based_mls_function, (UNSPEC_SMULLB,
+ 					       UNSPEC_UMULLB, UNSPEC_FMLSLB))
+ FUNCTION (svmlslb_lane, unspec_based_mls_lane_function, (UNSPEC_SMULLB,
+ 							 UNSPEC_UMULLB,
+ 							 UNSPEC_FMLSLB))
+ FUNCTION (svmlslt, unspec_based_mls_function, (UNSPEC_SMULLT,
+ 					       UNSPEC_UMULLT, UNSPEC_FMLSLT))
+ FUNCTION (svmlslt_lane, unspec_based_mls_lane_function, (UNSPEC_SMULLT,
+ 							 UNSPEC_UMULLT,
+ 							 UNSPEC_FMLSLT))
+ FUNCTION (svmovlb, svmovl_lb_impl, (UNSPEC_SSHLLB, UNSPEC_USHLLB, -1))
+ FUNCTION (svmovlt, svmovl_lb_impl, (UNSPEC_SSHLLT, UNSPEC_USHLLT, -1))
+ FUNCTION (svmullb, unspec_based_function, (UNSPEC_SMULLB, UNSPEC_UMULLB, -1))
+ FUNCTION (svmullb_lane, unspec_based_lane_function, (UNSPEC_SMULLB,
+ 						     UNSPEC_UMULLB, -1))
+ FUNCTION (svmullt, unspec_based_function, (UNSPEC_SMULLT, UNSPEC_UMULLT, -1))
+ FUNCTION (svmullt_lane, unspec_based_lane_function, (UNSPEC_SMULLT,
+ 						     UNSPEC_UMULLT, -1))
+ FUNCTION (svnbsl, CODE_FOR_MODE0 (aarch64_sve2_nbsl),)
+ FUNCTION (svnmatch, svmatch_svnmatch_impl, (UNSPEC_NMATCH))
+ FUNCTION (svpmul, CODE_FOR_MODE0 (aarch64_sve2_pmul),)
+ FUNCTION (svpmullb, unspec_based_function, (-1, UNSPEC_PMULLB, -1))
+ FUNCTION (svpmullb_pair, unspec_based_function, (-1, UNSPEC_PMULLB_PAIR, -1))
+ FUNCTION (svpmullt, unspec_based_function, (-1, UNSPEC_PMULLT, -1))
+ FUNCTION (svpmullt_pair, unspec_based_function, (-1, UNSPEC_PMULLT_PAIR, -1))
+ FUNCTION (svqabs, rtx_code_function, (SS_ABS, UNKNOWN, UNKNOWN))
+ FUNCTION (svqcadd, svqcadd_impl,)
+ FUNCTION (svqdmlalb, unspec_based_qadd_function, (UNSPEC_SQDMULLB, -1, -1))
+ FUNCTION (svqdmlalb_lane, unspec_based_qadd_lane_function, (UNSPEC_SQDMULLB,
+ 							    -1, -1))
+ FUNCTION (svqdmlalbt, unspec_based_qadd_function, (UNSPEC_SQDMULLBT, -1, -1))
+ FUNCTION (svqdmlalt, unspec_based_qadd_function, (UNSPEC_SQDMULLT, -1, -1))
+ FUNCTION (svqdmlalt_lane, unspec_based_qadd_lane_function, (UNSPEC_SQDMULLT,
+ 							    -1, -1))
+ FUNCTION (svqdmlslb, unspec_based_qsub_function, (UNSPEC_SQDMULLB, -1, -1))
+ FUNCTION (svqdmlslb_lane, unspec_based_qsub_lane_function, (UNSPEC_SQDMULLB,
+ 							    -1, -1))
+ FUNCTION (svqdmlslbt, unspec_based_qsub_function, (UNSPEC_SQDMULLBT, -1, -1))
+ FUNCTION (svqdmlslt, unspec_based_qsub_function, (UNSPEC_SQDMULLT, -1, -1))
+ FUNCTION (svqdmlslt_lane, unspec_based_qsub_lane_function, (UNSPEC_SQDMULLT,
+ 							    -1, -1))
+ FUNCTION (svqdmulh, unspec_based_function, (UNSPEC_SQDMULH, -1, -1))
+ FUNCTION (svqdmulh_lane, unspec_based_lane_function, (UNSPEC_SQDMULH, -1, -1))
+ FUNCTION (svqdmullb, unspec_based_function, (UNSPEC_SQDMULLB, -1, -1))
+ FUNCTION (svqdmullb_lane, unspec_based_lane_function, (UNSPEC_SQDMULLB,
+ 						       -1, -1))
+ FUNCTION (svqdmullt, unspec_based_function, (UNSPEC_SQDMULLT, -1, -1))
+ FUNCTION (svqdmullt_lane, unspec_based_lane_function, (UNSPEC_SQDMULLT,
+ 						       -1, -1))
+ FUNCTION (svqneg, rtx_code_function, (SS_NEG, UNKNOWN, UNKNOWN))
+ FUNCTION (svqrdcmlah, svqrdcmlah_impl,)
+ FUNCTION (svqrdcmlah_lane, svqrdcmlah_lane_impl,)
+ FUNCTION (svqrdmulh, unspec_based_function, (UNSPEC_SQRDMULH, -1, -1))
+ FUNCTION (svqrdmulh_lane, unspec_based_lane_function, (UNSPEC_SQRDMULH,
+ 						       -1, -1))
+ FUNCTION (svqrdmlah, unspec_based_function, (UNSPEC_SQRDMLAH, -1, -1))
+ FUNCTION (svqrdmlah_lane, unspec_based_lane_function, (UNSPEC_SQRDMLAH,
+ 						       -1, -1))
+ FUNCTION (svqrdmlsh, unspec_based_function, (UNSPEC_SQRDMLSH, -1, -1))
+ FUNCTION (svqrdmlsh_lane, unspec_based_lane_function, (UNSPEC_SQRDMLSH,
+ 						       -1, -1))
+ FUNCTION (svqrshl, svqrshl_impl,)
+ FUNCTION (svqrshrnb, unspec_based_function, (UNSPEC_SQRSHRNB,
+ 					     UNSPEC_UQRSHRNB, -1))
+ FUNCTION (svqrshrnt, unspec_based_function, (UNSPEC_SQRSHRNT,
+ 					     UNSPEC_UQRSHRNT, -1))
+ FUNCTION (svqrshrunb, unspec_based_function, (UNSPEC_SQRSHRUNB, -1, -1))
+ FUNCTION (svqrshrunt, unspec_based_function, (UNSPEC_SQRSHRUNT, -1, -1))
+ FUNCTION (svqshl, svqshl_impl,)
+ FUNCTION (svqshlu, unspec_based_function, (UNSPEC_SQSHLU, -1, -1))
+ FUNCTION (svqshrnb, unspec_based_function, (UNSPEC_SQSHRNB,
+ 					    UNSPEC_UQSHRNB, -1))
+ FUNCTION (svqshrnt, unspec_based_function, (UNSPEC_SQSHRNT,
+ 					    UNSPEC_UQSHRNT, -1))
+ FUNCTION (svqshrunb, unspec_based_function, (UNSPEC_SQSHRUNB, -1, -1))
+ FUNCTION (svqshrunt, unspec_based_function, (UNSPEC_SQSHRUNT, -1, -1))
+ FUNCTION (svqsubr, rtx_code_function_rotated, (SS_MINUS, US_MINUS, -1))
+ FUNCTION (svqxtnb, unspec_based_function, (UNSPEC_SQXTNB, UNSPEC_UQXTNB, -1))
+ FUNCTION (svqxtnt, unspec_based_function, (UNSPEC_SQXTNT, UNSPEC_UQXTNT, -1))
+ FUNCTION (svqxtunb, unspec_based_function, (UNSPEC_SQXTUNB, -1, -1))
+ FUNCTION (svqxtunt, unspec_based_function, (UNSPEC_SQXTUNT, -1, -1))
+ FUNCTION (svraddhnb, unspec_based_function, (UNSPEC_RADDHNB,
+ 					     UNSPEC_RADDHNB, -1))
+ FUNCTION (svraddhnt, unspec_based_function, (UNSPEC_RADDHNT,
+ 					     UNSPEC_RADDHNT, -1))
+ FUNCTION (svrax1, fixed_insn_function, (CODE_FOR_aarch64_sve2_rax1))
+ FUNCTION (svrhadd, unspec_based_function, (UNSPEC_SRHADD, UNSPEC_URHADD, -1))
+ FUNCTION (svrshl, svrshl_impl,)
+ FUNCTION (svrshr, unspec_based_function, (UNSPEC_SRSHR, UNSPEC_URSHR, -1))
+ FUNCTION (svrshrnb, unspec_based_function, (UNSPEC_RSHRNB, UNSPEC_RSHRNB, -1))
+ FUNCTION (svrshrnt, unspec_based_function, (UNSPEC_RSHRNT, UNSPEC_RSHRNT, -1))
+ FUNCTION (svrsra, unspec_based_add_function, (UNSPEC_SRSHR, UNSPEC_URSHR, -1))
+ FUNCTION (svrsubhnb, unspec_based_function, (UNSPEC_RSUBHNB,
+ 					     UNSPEC_RSUBHNB, -1))
+ FUNCTION (svrsubhnt, unspec_based_function, (UNSPEC_RSUBHNT,
+ 					     UNSPEC_RSUBHNT, -1))
+ FUNCTION (svsbclb, unspec_based_function, (-1, UNSPEC_SBCLB, -1))
+ FUNCTION (svsbclt, unspec_based_function, (-1, UNSPEC_SBCLT, -1))
+ FUNCTION (svshllb, unspec_based_function, (UNSPEC_SSHLLB, UNSPEC_USHLLB, -1))
+ FUNCTION (svshllt, unspec_based_function, (UNSPEC_SSHLLT, UNSPEC_USHLLT, -1))
+ FUNCTION (svshrnb, unspec_based_function, (UNSPEC_SHRNB, UNSPEC_SHRNB, -1))
+ FUNCTION (svshrnt, unspec_based_function, (UNSPEC_SHRNT, UNSPEC_SHRNT, -1))
+ FUNCTION (svsli, unspec_based_function, (UNSPEC_SLI, UNSPEC_SLI, -1))
+ FUNCTION (svsm4e, fixed_insn_function, (CODE_FOR_aarch64_sve2_sm4e))
+ FUNCTION (svsm4ekey, fixed_insn_function, (CODE_FOR_aarch64_sve2_sm4ekey))
+ FUNCTION (svsqadd, svsqadd_impl,)
+ FUNCTION (svsra, svsra_impl,)
+ FUNCTION (svsri, unspec_based_function, (UNSPEC_SRI, UNSPEC_SRI, -1))
+ FUNCTION (svstnt1_scatter, svstnt1_scatter_impl,)
+ FUNCTION (svstnt1b_scatter, svstnt1_scatter_truncate_impl, (QImode))
+ FUNCTION (svstnt1h_scatter, svstnt1_scatter_truncate_impl, (HImode))
+ FUNCTION (svstnt1w_scatter, svstnt1_scatter_truncate_impl, (SImode))
+ FUNCTION (svsubhnb, unspec_based_function, (UNSPEC_SUBHNB, UNSPEC_SUBHNB, -1))
+ FUNCTION (svsubhnt, unspec_based_function, (UNSPEC_SUBHNT, UNSPEC_SUBHNT, -1))
+ FUNCTION (svsublb, unspec_based_function, (UNSPEC_SSUBLB, UNSPEC_USUBLB, -1))
+ FUNCTION (svsublbt, unspec_based_function, (UNSPEC_SSUBLBT, -1, -1))
+ FUNCTION (svsublt, unspec_based_function, (UNSPEC_SSUBLT, UNSPEC_USUBLT, -1))
+ FUNCTION (svsubltb, unspec_based_function, (UNSPEC_SSUBLTB, -1, -1))
+ FUNCTION (svsubwb, unspec_based_function, (UNSPEC_SSUBWB, UNSPEC_USUBWB, -1))
+ FUNCTION (svsubwt, unspec_based_function, (UNSPEC_SSUBWT, UNSPEC_USUBWT, -1))
+ FUNCTION (svtbl2, svtbl2_impl,)
+ FUNCTION (svtbx, CODE_FOR_MODE0 (aarch64_sve2_tbx),)
+ FUNCTION (svuqadd, svuqadd_impl,)
+ FUNCTION (svwhilege, while_comparison, (UNSPEC_WHILEGE, UNSPEC_WHILEHS))
+ FUNCTION (svwhilegt, while_comparison, (UNSPEC_WHILEGT, UNSPEC_WHILEHI))
+ FUNCTION (svwhilerw, svwhilerw_svwhilewr_impl, (UNSPEC_WHILERW))
+ FUNCTION (svwhilewr, svwhilerw_svwhilewr_impl, (UNSPEC_WHILEWR))
+ FUNCTION (svxar, CODE_FOR_MODE0 (aarch64_sve2_xar),)
+ 
+ } /* end namespace aarch64_sve */
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-sve2.def gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-sve2.def
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-sve2.def	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-sve2.def	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,214 ----
+ /* ACLE support for AArch64 SVE (__ARM_FEATURE_SVE intrinsics)
+    Copyright (C) 2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #define REQUIRED_EXTENSIONS AARCH64_FL_SVE2
+ DEF_SVE_FUNCTION (svaba, ternary_opt_n, all_integer, none)
+ DEF_SVE_FUNCTION (svabalb, ternary_long_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svabalt, ternary_long_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svadalp, binary_wide, hsd_integer, mxz)
+ DEF_SVE_FUNCTION (svadclb, ternary_opt_n, sd_unsigned, none)
+ DEF_SVE_FUNCTION (svadclt, ternary_opt_n, sd_unsigned, none)
+ DEF_SVE_FUNCTION (svaddhnb, binary_narrowb_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svaddhnt, binary_narrowt_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svabdlb, binary_long_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svabdlt, binary_long_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svaddlb, binary_long_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svaddlbt, binary_long_opt_n, hsd_signed, none)
+ DEF_SVE_FUNCTION (svaddlt, binary_long_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svaddp, binary, all_arith, mx)
+ DEF_SVE_FUNCTION (svaddwb, binary_wide_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svaddwt, binary_wide_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svbcax, ternary_opt_n, all_integer, none)
+ DEF_SVE_FUNCTION (svbsl, ternary_opt_n, all_integer, none)
+ DEF_SVE_FUNCTION (svbsl1n, ternary_opt_n, all_integer, none)
+ DEF_SVE_FUNCTION (svbsl2n, ternary_opt_n, all_integer, none)
+ DEF_SVE_FUNCTION (svcadd, binary_rotate, all_integer, none)
+ DEF_SVE_FUNCTION (svcdot, ternary_qq_rotate, sd_signed, none)
+ DEF_SVE_FUNCTION (svcdot_lane, ternary_qq_lane_rotate, sd_signed, none)
+ DEF_SVE_FUNCTION (svcmla, ternary_rotate, all_integer, none)
+ DEF_SVE_FUNCTION (svcmla_lane, ternary_lane_rotate, hs_integer, none)
+ DEF_SVE_FUNCTION (svcvtlt, unary_convert, cvt_long, mx)
+ DEF_SVE_FUNCTION (svcvtnt, unary_convert_narrowt, cvt_narrow, mx)
+ DEF_SVE_FUNCTION (svcvtx, unary_convert, cvt_narrow_s, mxz)
+ DEF_SVE_FUNCTION (svcvtxnt, unary_convert_narrowt, cvt_narrow_s, mx)
+ DEF_SVE_FUNCTION (sveor3, ternary_opt_n, all_integer, none)
+ DEF_SVE_FUNCTION (sveorbt, ternary_opt_n, all_integer, none)
+ DEF_SVE_FUNCTION (sveortb, ternary_opt_n, all_integer, none)
+ DEF_SVE_FUNCTION (svhadd, binary_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svhistcnt, binary_to_uint, sd_integer, z)
+ DEF_SVE_FUNCTION (svhistseg, binary_to_uint, b_integer, none)
+ DEF_SVE_FUNCTION (svhsub, binary_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svhsubr, binary_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svldnt1_gather, load_gather_sv_restricted, sd_data, implicit)
+ DEF_SVE_FUNCTION (svldnt1_gather, load_gather_vs, sd_data, implicit)
+ DEF_SVE_FUNCTION (svldnt1sb_gather, load_ext_gather_offset_restricted, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldnt1sh_gather, load_ext_gather_offset_restricted, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldnt1sh_gather, load_ext_gather_index_restricted, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldnt1sw_gather, load_ext_gather_offset_restricted, d_integer, implicit)
+ DEF_SVE_FUNCTION (svldnt1sw_gather, load_ext_gather_index_restricted, d_integer, implicit)
+ DEF_SVE_FUNCTION (svldnt1ub_gather, load_ext_gather_offset_restricted, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldnt1uh_gather, load_ext_gather_offset_restricted, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldnt1uh_gather, load_ext_gather_index_restricted, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svldnt1uw_gather, load_ext_gather_offset_restricted, d_integer, implicit)
+ DEF_SVE_FUNCTION (svldnt1uw_gather, load_ext_gather_index_restricted, d_integer, implicit)
+ DEF_SVE_FUNCTION (svlogb, unary_to_int, all_float, mxz)
+ DEF_SVE_FUNCTION (svmatch, compare, bh_integer, implicit)
+ DEF_SVE_FUNCTION (svmaxp, binary, all_arith, mx)
+ DEF_SVE_FUNCTION (svmaxnmp, binary, all_float, mx)
+ DEF_SVE_FUNCTION (svmla_lane, ternary_lane, hsd_integer, none)
+ DEF_SVE_FUNCTION (svmlalb, ternary_long_opt_n, s_float_hsd_integer, none)
+ DEF_SVE_FUNCTION (svmlalb_lane, ternary_long_lane, s_float_sd_integer, none)
+ DEF_SVE_FUNCTION (svmlalt, ternary_long_opt_n, s_float_hsd_integer, none)
+ DEF_SVE_FUNCTION (svmlalt_lane, ternary_long_lane, s_float_sd_integer, none)
+ DEF_SVE_FUNCTION (svmls_lane, ternary_lane, hsd_integer, none)
+ DEF_SVE_FUNCTION (svmlslb, ternary_long_opt_n, s_float_hsd_integer, none)
+ DEF_SVE_FUNCTION (svmlslb_lane, ternary_long_lane, s_float_sd_integer, none)
+ DEF_SVE_FUNCTION (svmlslt, ternary_long_opt_n, s_float_hsd_integer, none)
+ DEF_SVE_FUNCTION (svmlslt_lane, ternary_long_lane, s_float_sd_integer, none)
+ DEF_SVE_FUNCTION (svminp, binary, all_arith, mx)
+ DEF_SVE_FUNCTION (svminnmp, binary, all_float, mx)
+ DEF_SVE_FUNCTION (svmovlb, unary_long, hsd_integer, none)
+ DEF_SVE_FUNCTION (svmovlt, unary_long, hsd_integer, none)
+ DEF_SVE_FUNCTION (svmul_lane, binary_lane, hsd_integer, none)
+ DEF_SVE_FUNCTION (svmullb, binary_long_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svmullb_lane, binary_long_lane, sd_integer, none)
+ DEF_SVE_FUNCTION (svmullt, binary_long_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svmullt_lane, binary_long_lane, sd_integer, none)
+ DEF_SVE_FUNCTION (svnbsl, ternary_opt_n, all_integer, none)
+ DEF_SVE_FUNCTION (svnmatch, compare, bh_integer, implicit)
+ DEF_SVE_FUNCTION (svpmul, binary_opt_n, b_unsigned, none)
+ DEF_SVE_FUNCTION (svpmullb, binary_long_opt_n, hd_unsigned, none)
+ DEF_SVE_FUNCTION (svpmullb_pair, binary_opt_n, bs_unsigned, none)
+ DEF_SVE_FUNCTION (svpmullt, binary_long_opt_n, hd_unsigned, none)
+ DEF_SVE_FUNCTION (svpmullt_pair, binary_opt_n, bs_unsigned, none)
+ DEF_SVE_FUNCTION (svqabs, unary, all_signed, mxz)
+ DEF_SVE_FUNCTION (svqadd, binary_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svqcadd, binary_rotate, all_signed, none)
+ DEF_SVE_FUNCTION (svqdmlalb, ternary_long_opt_n, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqdmlalb_lane, ternary_long_lane, sd_signed, none)
+ DEF_SVE_FUNCTION (svqdmlalbt, ternary_long_opt_n, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqdmlalt, ternary_long_opt_n, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqdmlalt_lane, ternary_long_lane, sd_signed, none)
+ DEF_SVE_FUNCTION (svqdmlslb, ternary_long_opt_n, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqdmlslb_lane, ternary_long_lane, sd_signed, none)
+ DEF_SVE_FUNCTION (svqdmlslbt, ternary_long_opt_n, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqdmlslt, ternary_long_opt_n, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqdmlslt_lane, ternary_long_lane, sd_signed, none)
+ DEF_SVE_FUNCTION (svqdmulh, binary_opt_n, all_signed, none)
+ DEF_SVE_FUNCTION (svqdmulh_lane, binary_lane, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqdmullb, binary_long_opt_n, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqdmullb_lane, binary_long_lane, sd_signed, none)
+ DEF_SVE_FUNCTION (svqdmullt, binary_long_opt_n, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqdmullt_lane, binary_long_lane, sd_signed, none)
+ DEF_SVE_FUNCTION (svqneg, unary, all_signed, mxz)
+ DEF_SVE_FUNCTION (svqrdmulh, binary_opt_n, all_signed, none)
+ DEF_SVE_FUNCTION (svqrdmulh_lane, binary_lane, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqrdmlah, ternary_opt_n, all_signed, none)
+ DEF_SVE_FUNCTION (svqrdmlah_lane, ternary_lane, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqrdmlsh, ternary_opt_n, all_signed, none)
+ DEF_SVE_FUNCTION (svqrdmlsh_lane, ternary_lane, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqrdcmlah, ternary_rotate, all_signed, none)
+ DEF_SVE_FUNCTION (svqrdcmlah_lane, ternary_lane_rotate, hs_signed, none)
+ DEF_SVE_FUNCTION (svqrshrnb, shift_right_imm_narrowb, hsd_integer, none)
+ DEF_SVE_FUNCTION (svqrshrnt, shift_right_imm_narrowt, hsd_integer, none)
+ DEF_SVE_FUNCTION (svqrshrunb, shift_right_imm_narrowb_to_uint, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqrshrunt, shift_right_imm_narrowt_to_uint, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqshl, binary_int_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svqshlu, shift_left_imm_to_uint, all_signed, mxz)
+ DEF_SVE_FUNCTION (svqshrnb, shift_right_imm_narrowb, hsd_integer, none)
+ DEF_SVE_FUNCTION (svqshrnt, shift_right_imm_narrowt, hsd_integer, none)
+ DEF_SVE_FUNCTION (svqshrunb, shift_right_imm_narrowb_to_uint, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqshrunt, shift_right_imm_narrowt_to_uint, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqrshl, binary_int_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svqsub, binary_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svqsubr, binary_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svqxtnb, unary_narrowb, hsd_integer, none)
+ DEF_SVE_FUNCTION (svqxtnt, unary_narrowt, hsd_integer, none)
+ DEF_SVE_FUNCTION (svqxtunb, unary_narrowb_to_uint, hsd_signed, none)
+ DEF_SVE_FUNCTION (svqxtunt, unary_narrowt_to_uint, hsd_signed, none)
+ DEF_SVE_FUNCTION (svraddhnb, binary_narrowb_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svraddhnt, binary_narrowt_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svrecpe, unary, s_unsigned, mxz)
+ DEF_SVE_FUNCTION (svrhadd, binary_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svrsqrte, unary, s_unsigned, mxz)
+ DEF_SVE_FUNCTION (svrshl, binary_int_opt_n, all_integer, mxz)
+ DEF_SVE_FUNCTION (svrshr, shift_right_imm, all_integer, mxz)
+ DEF_SVE_FUNCTION (svrshrnb, shift_right_imm_narrowb, hsd_integer, none)
+ DEF_SVE_FUNCTION (svrshrnt, shift_right_imm_narrowt, hsd_integer, none)
+ DEF_SVE_FUNCTION (svrsra, ternary_shift_right_imm, all_integer, none)
+ DEF_SVE_FUNCTION (svrsubhnb, binary_narrowb_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svrsubhnt, binary_narrowt_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svsbclb, ternary_opt_n, sd_unsigned, none)
+ DEF_SVE_FUNCTION (svsbclt, ternary_opt_n, sd_unsigned, none)
+ DEF_SVE_FUNCTION (svshllb, shift_left_imm_long, hsd_integer, none)
+ DEF_SVE_FUNCTION (svshllt, shift_left_imm_long, hsd_integer, none)
+ DEF_SVE_FUNCTION (svshrnb, shift_right_imm_narrowb, hsd_integer, none)
+ DEF_SVE_FUNCTION (svshrnt, shift_right_imm_narrowt, hsd_integer, none)
+ DEF_SVE_FUNCTION (svsli, ternary_shift_left_imm, all_integer, none)
+ DEF_SVE_FUNCTION (svsqadd, binary_int_opt_n, all_unsigned, mxz)
+ DEF_SVE_FUNCTION (svsra, ternary_shift_right_imm, all_integer, none)
+ DEF_SVE_FUNCTION (svsri, ternary_shift_right_imm, all_integer, none)
+ DEF_SVE_FUNCTION (svstnt1_scatter, store_scatter_index_restricted, sd_data, implicit)
+ DEF_SVE_FUNCTION (svstnt1_scatter, store_scatter_offset_restricted, sd_data, implicit)
+ DEF_SVE_FUNCTION (svstnt1b_scatter, store_scatter_offset_restricted, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svstnt1h_scatter, store_scatter_index_restricted, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svstnt1h_scatter, store_scatter_offset_restricted, sd_integer, implicit)
+ DEF_SVE_FUNCTION (svstnt1w_scatter, store_scatter_index_restricted, d_integer, implicit)
+ DEF_SVE_FUNCTION (svstnt1w_scatter, store_scatter_offset_restricted, d_integer, implicit)
+ DEF_SVE_FUNCTION (svsubhnb, binary_narrowb_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svsubhnt, binary_narrowt_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svsublb, binary_long_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svsublbt, binary_long_opt_n, hsd_signed, none)
+ DEF_SVE_FUNCTION (svsublt, binary_long_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svsubltb, binary_long_opt_n, hsd_signed, none)
+ DEF_SVE_FUNCTION (svsubwb, binary_wide_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svsubwt, binary_wide_opt_n, hsd_integer, none)
+ DEF_SVE_FUNCTION (svtbl2, tbl_tuple, all_data, none)
+ DEF_SVE_FUNCTION (svtbx, ternary_uint, all_data, none)
+ DEF_SVE_FUNCTION (svuqadd, binary_uint_opt_n, all_signed, mxz)
+ DEF_SVE_FUNCTION (svwhilege, compare_scalar, while, none)
+ DEF_SVE_FUNCTION (svwhilegt, compare_scalar, while, none)
+ DEF_SVE_FUNCTION (svwhilerw, compare_ptr, all_data, none)
+ DEF_SVE_FUNCTION (svwhilewr, compare_ptr, all_data, none)
+ DEF_SVE_FUNCTION (svxar, ternary_shift_right_imm, all_integer, none)
+ #undef REQUIRED_EXTENSIONS
+ 
+ #define REQUIRED_EXTENSIONS (AARCH64_FL_SVE2 | AARCH64_FL_SVE2_AES)
+ DEF_SVE_FUNCTION (svaesd, binary, b_unsigned, none)
+ DEF_SVE_FUNCTION (svaese, binary, b_unsigned, none)
+ DEF_SVE_FUNCTION (svaesmc, unary, b_unsigned, none)
+ DEF_SVE_FUNCTION (svaesimc, unary, b_unsigned, none)
+ DEF_SVE_FUNCTION (svpmullb_pair, binary_opt_n, d_unsigned, none)
+ DEF_SVE_FUNCTION (svpmullt_pair, binary_opt_n, d_unsigned, none)
+ #undef REQUIRED_EXTENSIONS
+ 
+ #define REQUIRED_EXTENSIONS (AARCH64_FL_SVE2 | AARCH64_FL_SVE2_BITPERM)
+ DEF_SVE_FUNCTION (svbdep, binary_opt_n, all_unsigned, none)
+ DEF_SVE_FUNCTION (svbext, binary_opt_n, all_unsigned, none)
+ DEF_SVE_FUNCTION (svbgrp, binary_opt_n, all_unsigned, none)
+ #undef REQUIRED_EXTENSIONS
+ 
+ #define REQUIRED_EXTENSIONS (AARCH64_FL_SVE2 | AARCH64_FL_SVE2_SHA3)
+ DEF_SVE_FUNCTION (svrax1, binary, d_integer, none)
+ #undef REQUIRED_EXTENSIONS
+ 
+ #define REQUIRED_EXTENSIONS (AARCH64_FL_SVE2 | AARCH64_FL_SVE2_SM4)
+ DEF_SVE_FUNCTION (svsm4e, binary, s_unsigned, none)
+ DEF_SVE_FUNCTION (svsm4ekey, binary, s_unsigned, none)
+ #undef REQUIRED_EXTENSIONS
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-sve2.h gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-sve2.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins-sve2.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins-sve2.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,190 ----
+ /* ACLE support for AArch64 SVE (__ARM_FEATURE_SVE intrinsics)
+    Copyright (C) 2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_AARCH64_SVE_BUILTINS_SVE2_H
+ #define GCC_AARCH64_SVE_BUILTINS_SVE2_H
+ 
+ namespace aarch64_sve
+ {
+   namespace functions
+   {
+     extern const function_base *const svaba;
+     extern const function_base *const svabalb;
+     extern const function_base *const svabalt;
+     extern const function_base *const svabdlb;
+     extern const function_base *const svabdlt;
+     extern const function_base *const svadalp;
+     extern const function_base *const svadclb;
+     extern const function_base *const svadclt;
+     extern const function_base *const svaddhnb;
+     extern const function_base *const svaddhnt;
+     extern const function_base *const svaddlb;
+     extern const function_base *const svaddlbt;
+     extern const function_base *const svaddlt;
+     extern const function_base *const svaddp;
+     extern const function_base *const svaddwb;
+     extern const function_base *const svaddwt;
+     extern const function_base *const svaesd;
+     extern const function_base *const svaese;
+     extern const function_base *const svaesimc;
+     extern const function_base *const svaesmc;
+     extern const function_base *const svbcax;
+     extern const function_base *const svbdep;
+     extern const function_base *const svbext;
+     extern const function_base *const svbgrp;
+     extern const function_base *const svbsl;
+     extern const function_base *const svbsl1n;
+     extern const function_base *const svbsl2n;
+     extern const function_base *const svcdot;
+     extern const function_base *const svcdot_lane;
+     extern const function_base *const svcvtlt;
+     extern const function_base *const svcvtx;
+     extern const function_base *const svcvtxnt;
+     extern const function_base *const sveor3;
+     extern const function_base *const sveorbt;
+     extern const function_base *const sveortb;
+     extern const function_base *const svhadd;
+     extern const function_base *const svhistcnt;
+     extern const function_base *const svhistseg;
+     extern const function_base *const svhsub;
+     extern const function_base *const svhsubr;
+     extern const function_base *const svldnt1_gather;
+     extern const function_base *const svldnt1sb_gather;
+     extern const function_base *const svldnt1sh_gather;
+     extern const function_base *const svldnt1sw_gather;
+     extern const function_base *const svldnt1ub_gather;
+     extern const function_base *const svldnt1uh_gather;
+     extern const function_base *const svldnt1uw_gather;
+     extern const function_base *const svlogb;
+     extern const function_base *const svmatch;
+     extern const function_base *const svmaxp;
+     extern const function_base *const svmaxnmp;
+     extern const function_base *const svmlalb;
+     extern const function_base *const svmlalb_lane;
+     extern const function_base *const svmlalt;
+     extern const function_base *const svmlalt_lane;
+     extern const function_base *const svmlslb;
+     extern const function_base *const svmlslb_lane;
+     extern const function_base *const svmlslt;
+     extern const function_base *const svmlslt_lane;
+     extern const function_base *const svminp;
+     extern const function_base *const svminnmp;
+     extern const function_base *const svmovlb;
+     extern const function_base *const svmovlt;
+     extern const function_base *const svmullb;
+     extern const function_base *const svmullb_lane;
+     extern const function_base *const svmullt;
+     extern const function_base *const svmullt_lane;
+     extern const function_base *const svnbsl;
+     extern const function_base *const svnmatch;
+     extern const function_base *const svpmul;
+     extern const function_base *const svpmullb;
+     extern const function_base *const svpmullb_pair;
+     extern const function_base *const svpmullt;
+     extern const function_base *const svpmullt_pair;
+     extern const function_base *const svqabs;
+     extern const function_base *const svqcadd;
+     extern const function_base *const svqdmlalb;
+     extern const function_base *const svqdmlalb_lane;
+     extern const function_base *const svqdmlalbt;
+     extern const function_base *const svqdmlalt;
+     extern const function_base *const svqdmlalt_lane;
+     extern const function_base *const svqdmlslb;
+     extern const function_base *const svqdmlslb_lane;
+     extern const function_base *const svqdmlslbt;
+     extern const function_base *const svqdmlslt;
+     extern const function_base *const svqdmlslt_lane;
+     extern const function_base *const svqdmulh;
+     extern const function_base *const svqdmulh_lane;
+     extern const function_base *const svqdmullb;
+     extern const function_base *const svqdmullb_lane;
+     extern const function_base *const svqdmullt;
+     extern const function_base *const svqdmullt_lane;
+     extern const function_base *const svqneg;
+     extern const function_base *const svqrdcmlah;
+     extern const function_base *const svqrdcmlah_lane;
+     extern const function_base *const svqrdmulh;
+     extern const function_base *const svqrdmulh_lane;
+     extern const function_base *const svqrdmlah;
+     extern const function_base *const svqrdmlah_lane;
+     extern const function_base *const svqrdmlsh;
+     extern const function_base *const svqrdmlsh_lane;
+     extern const function_base *const svqrshl;
+     extern const function_base *const svqrshrnb;
+     extern const function_base *const svqrshrnt;
+     extern const function_base *const svqrshrunb;
+     extern const function_base *const svqrshrunt;
+     extern const function_base *const svqshl;
+     extern const function_base *const svqshlu;
+     extern const function_base *const svqshrnb;
+     extern const function_base *const svqshrnt;
+     extern const function_base *const svqshrunb;
+     extern const function_base *const svqshrunt;
+     extern const function_base *const svqsubr;
+     extern const function_base *const svqxtnb;
+     extern const function_base *const svqxtnt;
+     extern const function_base *const svqxtunb;
+     extern const function_base *const svqxtunt;
+     extern const function_base *const svraddhnb;
+     extern const function_base *const svraddhnt;
+     extern const function_base *const svrax1;
+     extern const function_base *const svrhadd;
+     extern const function_base *const svrshl;
+     extern const function_base *const svrshr;
+     extern const function_base *const svrshrnb;
+     extern const function_base *const svrshrnt;
+     extern const function_base *const svrsra;
+     extern const function_base *const svrsubhnb;
+     extern const function_base *const svrsubhnt;
+     extern const function_base *const svsbclb;
+     extern const function_base *const svsbclt;
+     extern const function_base *const svshllb;
+     extern const function_base *const svshllt;
+     extern const function_base *const svshrnb;
+     extern const function_base *const svshrnt;
+     extern const function_base *const svsli;
+     extern const function_base *const svsm4e;
+     extern const function_base *const svsm4ekey;
+     extern const function_base *const svsqadd;
+     extern const function_base *const svsra;
+     extern const function_base *const svsri;
+     extern const function_base *const svstnt1_scatter;
+     extern const function_base *const svstnt1b_scatter;
+     extern const function_base *const svstnt1h_scatter;
+     extern const function_base *const svstnt1w_scatter;
+     extern const function_base *const svsubhnb;
+     extern const function_base *const svsubhnt;
+     extern const function_base *const svsublb;
+     extern const function_base *const svsublbt;
+     extern const function_base *const svsublt;
+     extern const function_base *const svsubltb;
+     extern const function_base *const svsubwb;
+     extern const function_base *const svsubwt;
+     extern const function_base *const svtbl2;
+     extern const function_base *const svtbx;
+     extern const function_base *const svuqadd;
+     extern const function_base *const svwhilege;
+     extern const function_base *const svwhilegt;
+     extern const function_base *const svwhilerw;
+     extern const function_base *const svwhilewr;
+     extern const function_base *const svxar;
+   }
+ }
+ 
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins.cc gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins.cc
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins.cc	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins.cc	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,3788 ----
+ /* ACLE support for AArch64 SVE
+    Copyright (C) 2018-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #define IN_TARGET_CODE 1
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tm.h"
+ #include "tree.h"
+ #include "rtl.h"
+ #include "tm_p.h"
+ #include "memmodel.h"
+ #include "insn-codes.h"
+ #include "optabs.h"
+ #include "recog.h"
+ #include "diagnostic.h"
+ #include "expr.h"
+ #include "basic-block.h"
+ #include "function.h"
+ #include "fold-const.h"
+ #include "gimple.h"
+ #include "gimple-iterator.h"
+ #include "gimplify.h"
+ #include "explow.h"
+ #include "emit-rtl.h"
+ #include "tree-vector-builder.h"
+ #include "stor-layout.h"
+ #include "regs.h"
+ #include "alias.h"
+ #include "gimple-fold.h"
+ #include "langhooks.h"
+ #include "stringpool.h"
+ #include "attribs.h"
+ #include "aarch64-sve-builtins.h"
+ #include "aarch64-sve-builtins-base.h"
+ #include "aarch64-sve-builtins-sve2.h"
+ #include "aarch64-sve-builtins-shapes.h"
+ 
+ namespace aarch64_sve {
+ 
+ /* Static information about each single-predicate or single-vector
+    ABI and ACLE type.  */
+ struct vector_type_info
+ {
+   /* The name of the type as declared by arm_sve.h.  */
+   const char *acle_name;
+ 
+   /* The name of the type specified in AAPCS64.  The type is always
+      available under this name, even when arm_sve.h isn't included.  */
+   const char *abi_name;
+ 
+   /* The C++ mangling of ABI_NAME.  */
+   const char *mangled_name;
+ };
+ 
+ /* Describes a function decl.  */
+ class GTY(()) registered_function
+ {
+ public:
+   /* The ACLE function that the decl represents.  */
+   function_instance instance GTY ((skip));
+ 
+   /* The decl itself.  */
+   tree decl;
+ 
+   /* The architecture extensions that the function requires, as a set of
+      AARCH64_FL_* flags.  */
+   uint64_t required_extensions;
+ 
+   /* True if the decl represents an overloaded function that needs to be
+      resolved by function_resolver.  */
+   bool overloaded_p;
+ };
+ 
+ /* Hash traits for registered_function.  */
+ struct registered_function_hasher : nofree_ptr_hash <registered_function>
+ {
+   typedef function_instance compare_type;
+ 
+   static hashval_t hash (value_type);
+   static bool equal (value_type, const compare_type &);
+ };
+ 
+ /* Information about each single-predicate or single-vector type.  */
+ static CONSTEXPR const vector_type_info vector_types[] = {
+ #define DEF_SVE_TYPE(ACLE_NAME, NCHARS, ABI_NAME, SCALAR_TYPE) \
+   { #ACLE_NAME, #ABI_NAME, #NCHARS #ABI_NAME },
+ #include "aarch64-sve-builtins.def"
+ };
+ 
+ /* The function name suffix associated with each predication type.  */
+ static const char *const pred_suffixes[NUM_PREDS + 1] = {
+   "",
+   "",
+   "_m",
+   "_x",
+   "_z",
+   ""
+ };
+ 
+ /* Static information about each mode_suffix_index.  */
+ CONSTEXPR const mode_suffix_info mode_suffixes[] = {
+ #define VECTOR_TYPE_none NUM_VECTOR_TYPES
+ #define DEF_SVE_MODE(NAME, BASE, DISPLACEMENT, UNITS) \
+   { "_" #NAME, VECTOR_TYPE_##BASE, VECTOR_TYPE_##DISPLACEMENT, UNITS_##UNITS },
+ #include "aarch64-sve-builtins.def"
+ #undef VECTOR_TYPE_none
+   { "", NUM_VECTOR_TYPES, NUM_VECTOR_TYPES, UNITS_none }
+ };
+ 
+ /* Static information about each type_suffix_index.  */
+ CONSTEXPR const type_suffix_info type_suffixes[NUM_TYPE_SUFFIXES + 1] = {
+ #define DEF_SVE_TYPE_SUFFIX(NAME, ACLE_TYPE, CLASS, BITS, MODE) \
+   { "_" #NAME, \
+     VECTOR_TYPE_##ACLE_TYPE, \
+     TYPE_##CLASS, \
+     BITS, \
+     BITS / BITS_PER_UNIT, \
+     TYPE_##CLASS == TYPE_signed || TYPE_##CLASS == TYPE_unsigned, \
+     TYPE_##CLASS == TYPE_unsigned, \
+     TYPE_##CLASS == TYPE_float, \
+     TYPE_##CLASS == TYPE_bool, \
+     0, \
+     MODE },
+ #include "aarch64-sve-builtins.def"
+   { "", NUM_VECTOR_TYPES, TYPE_bool, 0, 0, false, false, false, false,
+     0, VOIDmode }
+ };
+ 
+ /* Define a TYPES_<combination> macro for each combination of type
+    suffixes that an ACLE function can have, where <combination> is the
+    name used in DEF_SVE_FUNCTION entries.
+ 
+    Use S (T) for single type suffix T and D (T1, T2) for a pair of type
+    suffixes T1 and T2.  Use commas to separate the suffixes.
+ 
+    Although the order shouldn't matter, the convention is to sort the
+    suffixes lexicographically after dividing suffixes into a type
+    class ("b", "f", etc.) and a numerical bit count.  */
+ 
+ /* _b8 _b16 _b32 _b64.  */
+ #define TYPES_all_pred(S, D) \
+   S (b8), S (b16), S (b32), S (b64)
+ 
+ /* _f16 _f32 _f64.  */
+ #define TYPES_all_float(S, D) \
+   S (f16), S (f32), S (f64)
+ 
+ /* _s8 _s16 _s32 _s64.  */
+ #define TYPES_all_signed(S, D) \
+   S (s8), S (s16), S (s32), S (s64)
+ 
+ /*     _f16 _f32 _f64
+    _s8 _s16 _s32 _s64.  */
+ #define TYPES_all_float_and_signed(S, D) \
+   TYPES_all_float (S, D), TYPES_all_signed (S, D)
+ 
+ /* _u8 _u16 _u32 _u64.  */
+ #define TYPES_all_unsigned(S, D) \
+   S (u8), S (u16), S (u32), S (u64)
+ 
+ /* _s8 _s16 _s32 _s64
+    _u8 _u16 _u32 _u64.  */
+ #define TYPES_all_integer(S, D) \
+   TYPES_all_signed (S, D), TYPES_all_unsigned (S, D)
+ 
+ /*     _f16 _f32 _f64
+    _s8 _s16 _s32 _s64
+    _u8 _u16 _u32 _u64.  */
+ #define TYPES_all_arith(S, D) \
+   TYPES_all_float (S, D), TYPES_all_integer (S, D)
+ 
+ /*     _bf16
+ 	_f16 _f32 _f64
+    _s8  _s16 _s32 _s64
+    _u8  _u16 _u32 _u64.  */
+ #define TYPES_all_data(S, D) \
+   S (bf16), TYPES_all_arith (S, D)
+ 
+ /* _b only.  */
+ #define TYPES_b(S, D) \
+   S (b)
+ 
+ /* _u8.  */
+ #define TYPES_b_unsigned(S, D) \
+   S (u8)
+ 
+ /* _s8
+    _u8.  */
+ #define TYPES_b_integer(S, D) \
+   S (s8), TYPES_b_unsigned (S, D)
+ 
+ /* _s8 _s16
+    _u8 _u16.  */
+ #define TYPES_bh_integer(S, D) \
+   S (s8), S (s16), S (u8), S (u16)
+ 
+ /* _u8 _u32.  */
+ #define TYPES_bs_unsigned(S, D) \
+   S (u8), S (u32)
+ 
+ /* _s8 _s16 _s32.  */
+ #define TYPES_bhs_signed(S, D) \
+   S (s8), S (s16), S (s32)
+ 
+ /* _u8 _u16 _u32.  */
+ #define TYPES_bhs_unsigned(S, D) \
+   S (u8), S (u16), S (u32)
+ 
+ /* _s8 _s16 _s32
+    _u8 _u16 _u32.  */
+ #define TYPES_bhs_integer(S, D) \
+   TYPES_bhs_signed (S, D), TYPES_bhs_unsigned (S, D)
+ 
+ /* _s16
+    _u16.  */
+ #define TYPES_h_integer(S, D) \
+   S (s16), S (u16)
+ 
+ /* _s16 _s32.  */
+ #define TYPES_hs_signed(S, D) \
+   S (s16), S (s32)
+ 
+ /* _s16 _s32
+    _u16 _u32.  */
+ #define TYPES_hs_integer(S, D) \
+   TYPES_hs_signed (S, D), S (u16), S (u32)
+ 
+ /* _f16 _f32.  */
+ #define TYPES_hs_float(S, D) \
+   S (f16), S (f32)
+ 
+ /* _u16 _u64.  */
+ #define TYPES_hd_unsigned(S, D) \
+   S (u16), S (u64)
+ 
+ /* _s16 _s32 _s64.  */
+ #define TYPES_hsd_signed(S, D) \
+   S (s16), S (s32), S (s64)
+ 
+ /* _s16 _s32 _s64
+    _u16 _u32 _u64.  */
+ #define TYPES_hsd_integer(S, D) \
+   TYPES_hsd_signed (S, D), S (u16), S (u32), S (u64)
+ 
+ /* _f32.  */
+ #define TYPES_s_float(S, D) \
+   S (f32)
+ 
+ /*      _f32
+    _s16 _s32 _s64
+    _u16 _u32 _u64.  */
+ #define TYPES_s_float_hsd_integer(S, D) \
+   TYPES_s_float (S, D), TYPES_hsd_integer (S, D)
+ 
+ /* _f32
+    _s32 _s64
+    _u32 _u64.  */
+ #define TYPES_s_float_sd_integer(S, D) \
+   TYPES_s_float (S, D), TYPES_sd_integer (S, D)
+ 
+ /* _s32.  */
+ #define TYPES_s_signed(S, D) \
+   S (s32)
+ 
+ /* _u32.  */
+ #define TYPES_s_unsigned(S, D) \
+   S (u32)
+ 
+ /* _s32 _u32.  */
+ #define TYPES_s_integer(S, D) \
+   TYPES_s_signed (S, D), TYPES_s_unsigned (S, D)
+ 
+ /* _s32 _s64.  */
+ #define TYPES_sd_signed(S, D) \
+   S (s32), S (s64)
+ 
+ /* _u32 _u64.  */
+ #define TYPES_sd_unsigned(S, D) \
+   S (u32), S (u64)
+ 
+ /* _s32 _s64
+    _u32 _u64.  */
+ #define TYPES_sd_integer(S, D) \
+   TYPES_sd_signed (S, D), TYPES_sd_unsigned (S, D)
+ 
+ /* _f32 _f64
+    _s32 _s64
+    _u32 _u64.  */
+ #define TYPES_sd_data(S, D) \
+   S (f32), S (f64), TYPES_sd_integer (S, D)
+ 
+ /* _f16 _f32 _f64
+ 	_s32 _s64
+ 	_u32 _u64.  */
+ #define TYPES_all_float_and_sd_integer(S, D) \
+   TYPES_all_float (S, D), TYPES_sd_integer (S, D)
+ 
+ /* _f64.  */
+ #define TYPES_d_float(S, D) \
+   S (f64)
+ 
+ /* _u64.  */
+ #define TYPES_d_unsigned(S, D) \
+   S (u64)
+ 
+ /* _s64
+    _u64.  */
+ #define TYPES_d_integer(S, D) \
+   S (s64), TYPES_d_unsigned (S, D)
+ 
+ /* _f64
+    _s64
+    _u64.  */
+ #define TYPES_d_data(S, D) \
+   TYPES_d_float (S, D), TYPES_d_integer (S, D)
+ 
+ /* All the type combinations allowed by svcvt.  */
+ #define TYPES_cvt(S, D) \
+   D (f16, f32), D (f16, f64), \
+   D (f16, s16), D (f16, s32), D (f16, s64), \
+   D (f16, u16), D (f16, u32), D (f16, u64), \
+   \
+   D (f32, f16), D (f32, f64), \
+   D (f32, s32), D (f32, s64), \
+   D (f32, u32), D (f32, u64), \
+   \
+   D (f64, f16), D (f64, f32), \
+   D (f64, s32), D (f64, s64), \
+   D (f64, u32), D (f64, u64), \
+   \
+   D (s16, f16), \
+   D (s32, f16), D (s32, f32), D (s32, f64), \
+   D (s64, f16), D (s64, f32), D (s64, f64), \
+   \
+   D (u16, f16), \
+   D (u32, f16), D (u32, f32), D (u32, f64), \
+   D (u64, f16), D (u64, f32), D (u64, f64)
+ 
+ /* _bf16_f32.  */
+ #define TYPES_cvt_bfloat(S, D) \
+   D (bf16, f32)
+ 
+ /* _f32_f16
+    _f64_f32.  */
+ #define TYPES_cvt_long(S, D) \
+   D (f32, f16), D (f64, f32)
+ 
+ /* _f16_f32.  */
+ #define TYPES_cvt_narrow_s(S, D) \
+   D (f32, f64)
+ 
+ /* _f16_f32
+    _f32_f64.  */
+ #define TYPES_cvt_narrow(S, D) \
+   D (f16, f32), TYPES_cvt_narrow_s (S, D)
+ 
+ /* { _s32 _s64 } x { _b8 _b16 _b32 _b64 }
+    { _u32 _u64 }.  */
+ #define TYPES_inc_dec_n1(D, A) \
+   D (A, b8), D (A, b16), D (A, b32), D (A, b64)
+ #define TYPES_inc_dec_n(S, D) \
+   TYPES_inc_dec_n1 (D, s32), \
+   TYPES_inc_dec_n1 (D, s64), \
+   TYPES_inc_dec_n1 (D, u32), \
+   TYPES_inc_dec_n1 (D, u64)
+ 
+ /* {     _bf16           }   {     _bf16           }
+    {      _f16 _f32 _f64 }   {      _f16 _f32 _f64 }
+    { _s8  _s16 _s32 _s64 } x { _s8  _s16 _s32 _s64 }
+    { _u8  _u16 _u32 _u64 }   { _u8  _u16 _u32 _u64 }.  */
+ #define TYPES_reinterpret1(D, A) \
+   D (A, bf16), \
+   D (A, f16), D (A, f32), D (A, f64), \
+   D (A, s8), D (A, s16), D (A, s32), D (A, s64), \
+   D (A, u8), D (A, u16), D (A, u32), D (A, u64)
+ #define TYPES_reinterpret(S, D) \
+   TYPES_reinterpret1 (D, bf16), \
+   TYPES_reinterpret1 (D, f16), \
+   TYPES_reinterpret1 (D, f32), \
+   TYPES_reinterpret1 (D, f64), \
+   TYPES_reinterpret1 (D, s8), \
+   TYPES_reinterpret1 (D, s16), \
+   TYPES_reinterpret1 (D, s32), \
+   TYPES_reinterpret1 (D, s64), \
+   TYPES_reinterpret1 (D, u8), \
+   TYPES_reinterpret1 (D, u16), \
+   TYPES_reinterpret1 (D, u32), \
+   TYPES_reinterpret1 (D, u64)
+ 
+ /* { _b8 _b16 _b32 _b64 } x { _s32 _s64 }
+ 			    { _u32 _u64 } */
+ #define TYPES_while1(D, bn) \
+   D (bn, s32), D (bn, s64), D (bn, u32), D (bn, u64)
+ #define TYPES_while(S, D) \
+   TYPES_while1 (D, b8), \
+   TYPES_while1 (D, b16), \
+   TYPES_while1 (D, b32), \
+   TYPES_while1 (D, b64)
+ 
+ /* Describe a pair of type suffixes in which only the first is used.  */
+ #define DEF_VECTOR_TYPE(X) { TYPE_SUFFIX_ ## X, NUM_TYPE_SUFFIXES }
+ 
+ /* Describe a pair of type suffixes in which both are used.  */
+ #define DEF_DOUBLE_TYPE(X, Y) { TYPE_SUFFIX_ ## X, TYPE_SUFFIX_ ## Y }
+ 
+ /* Create an array that can be used in aarch64-sve-builtins.def to
+    select the type suffixes in TYPES_<NAME>.  */
+ #define DEF_SVE_TYPES_ARRAY(NAME) \
+   static const type_suffix_pair types_##NAME[] = { \
+     TYPES_##NAME (DEF_VECTOR_TYPE, DEF_DOUBLE_TYPE), \
+     { NUM_TYPE_SUFFIXES, NUM_TYPE_SUFFIXES } \
+   }
+ 
+ /* For functions that don't take any type suffixes.  */
+ static const type_suffix_pair types_none[] = {
+   { NUM_TYPE_SUFFIXES, NUM_TYPE_SUFFIXES },
+   { NUM_TYPE_SUFFIXES, NUM_TYPE_SUFFIXES }
+ };
+ 
+ /* Create an array for each TYPES_<combination> macro above.  */
+ DEF_SVE_TYPES_ARRAY (all_pred);
+ DEF_SVE_TYPES_ARRAY (all_float);
+ DEF_SVE_TYPES_ARRAY (all_signed);
+ DEF_SVE_TYPES_ARRAY (all_float_and_signed);
+ DEF_SVE_TYPES_ARRAY (all_unsigned);
+ DEF_SVE_TYPES_ARRAY (all_integer);
+ DEF_SVE_TYPES_ARRAY (all_arith);
+ DEF_SVE_TYPES_ARRAY (all_data);
+ DEF_SVE_TYPES_ARRAY (b);
+ DEF_SVE_TYPES_ARRAY (b_unsigned);
+ DEF_SVE_TYPES_ARRAY (b_integer);
+ DEF_SVE_TYPES_ARRAY (bh_integer);
+ DEF_SVE_TYPES_ARRAY (bs_unsigned);
+ DEF_SVE_TYPES_ARRAY (bhs_signed);
+ DEF_SVE_TYPES_ARRAY (bhs_unsigned);
+ DEF_SVE_TYPES_ARRAY (bhs_integer);
+ DEF_SVE_TYPES_ARRAY (h_integer);
+ DEF_SVE_TYPES_ARRAY (hs_signed);
+ DEF_SVE_TYPES_ARRAY (hs_integer);
+ DEF_SVE_TYPES_ARRAY (hs_float);
+ DEF_SVE_TYPES_ARRAY (hd_unsigned);
+ DEF_SVE_TYPES_ARRAY (hsd_signed);
+ DEF_SVE_TYPES_ARRAY (hsd_integer);
+ DEF_SVE_TYPES_ARRAY (s_float);
+ DEF_SVE_TYPES_ARRAY (s_float_hsd_integer);
+ DEF_SVE_TYPES_ARRAY (s_float_sd_integer);
+ DEF_SVE_TYPES_ARRAY (s_signed);
+ DEF_SVE_TYPES_ARRAY (s_unsigned);
+ DEF_SVE_TYPES_ARRAY (s_integer);
+ DEF_SVE_TYPES_ARRAY (sd_signed);
+ DEF_SVE_TYPES_ARRAY (sd_unsigned);
+ DEF_SVE_TYPES_ARRAY (sd_integer);
+ DEF_SVE_TYPES_ARRAY (sd_data);
+ DEF_SVE_TYPES_ARRAY (all_float_and_sd_integer);
+ DEF_SVE_TYPES_ARRAY (d_float);
+ DEF_SVE_TYPES_ARRAY (d_unsigned);
+ DEF_SVE_TYPES_ARRAY (d_integer);
+ DEF_SVE_TYPES_ARRAY (d_data);
+ DEF_SVE_TYPES_ARRAY (cvt);
+ DEF_SVE_TYPES_ARRAY (cvt_bfloat);
+ DEF_SVE_TYPES_ARRAY (cvt_long);
+ DEF_SVE_TYPES_ARRAY (cvt_narrow_s);
+ DEF_SVE_TYPES_ARRAY (cvt_narrow);
+ DEF_SVE_TYPES_ARRAY (inc_dec_n);
+ DEF_SVE_TYPES_ARRAY (reinterpret);
+ DEF_SVE_TYPES_ARRAY (while);
+ 
+ /* Used by functions that have no governing predicate.  */
+ static const predication_index preds_none[] = { PRED_none, NUM_PREDS };
+ 
+ /* Used by functions that have a governing predicate but do not have an
+    explicit suffix.  */
+ static const predication_index preds_implicit[] = { PRED_implicit, NUM_PREDS };
+ 
+ /* Used by functions that allow merging and "don't care" predication,
+    but are not suitable for predicated MOVPRFX.  */
+ static const predication_index preds_mx[] = {
+   PRED_m, PRED_x, NUM_PREDS
+ };
+ 
+ /* Used by functions that allow merging, zeroing and "don't care"
+    predication.  */
+ static const predication_index preds_mxz[] = {
+   PRED_m, PRED_x, PRED_z, NUM_PREDS
+ };
+ 
+ /* Used by functions that have the mxz predicated forms above, and in addition
+    have an unpredicated form.  */
+ static const predication_index preds_mxz_or_none[] = {
+   PRED_m, PRED_x, PRED_z, PRED_none, NUM_PREDS
+ };
+ 
+ /* Used by functions that allow merging and zeroing predication but have
+    no "_x" form.  */
+ static const predication_index preds_mz[] = { PRED_m, PRED_z, NUM_PREDS };
+ 
+ /* Used by functions that have an unpredicated form and a _z predicated
+    form.  */
+ static const predication_index preds_z_or_none[] = {
+   PRED_z, PRED_none, NUM_PREDS
+ };
+ 
+ /* Used by (mostly predicate) functions that only support "_z" predication.  */
+ static const predication_index preds_z[] = { PRED_z, NUM_PREDS };
+ 
+ /* A list of all SVE ACLE functions.  */
+ static CONSTEXPR const function_group_info function_groups[] = {
+ #define DEF_SVE_FUNCTION(NAME, SHAPE, TYPES, PREDS) \
+   { #NAME, &functions::NAME, &shapes::SHAPE, types_##TYPES, preds_##PREDS, \
+     REQUIRED_EXTENSIONS | AARCH64_FL_SVE },
+ #include "aarch64-sve-builtins.def"
+ };
+ 
+ /* The scalar type associated with each vector type.  */
+ GTY(()) tree scalar_types[NUM_VECTOR_TYPES];
+ 
+ /* The single-predicate and single-vector types, with their built-in
+    "__SV..._t" name.  Allow an index of NUM_VECTOR_TYPES, which always
+    yields a null tree.  */
+ static GTY(()) tree abi_vector_types[NUM_VECTOR_TYPES + 1];
+ 
+ /* Same, but with the arm_sve.h "sv..._t" name.  */
+ GTY(()) tree acle_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1];
+ 
+ /* The svpattern enum type.  */
+ GTY(()) tree acle_svpattern;
+ 
+ /* The svprfop enum type.  */
+ GTY(()) tree acle_svprfop;
+ 
+ /* The list of all registered function decls, indexed by code.  */
+ static GTY(()) vec<registered_function *, va_gc> *registered_functions;
+ 
+ /* All registered function decls, hashed on the function_instance
+    that they implement.  This is used for looking up implementations of
+    overloaded functions.  */
+ static hash_table<registered_function_hasher> *function_table;
+ 
+ /* True if we've already complained about attempts to use functions
+    when the required extension is disabled.  */
+ static bool reported_missing_extension_p;
+ 
+ /* True if we've already complained about attempts to use functions
+    which require registers that are missing.  */
+ static bool reported_missing_registers_p;
+ 
+ /* Record that TYPE is an ABI-defined SVE type that contains NUM_ZR SVE vectors
+    and NUM_PR SVE predicates.  MANGLED_NAME, if nonnull, is the ABI-defined
+    mangling of the type.  */
+ static void
+ add_sve_type_attribute (tree type, unsigned int num_zr, unsigned int num_pr,
+ 			const char *mangled_name)
+ {
+   tree mangled_name_tree
+     = (mangled_name ? get_identifier (mangled_name) : NULL_TREE);
+ 
+   tree value = tree_cons (NULL_TREE, mangled_name_tree, NULL_TREE);
+   value = tree_cons (NULL_TREE, size_int (num_pr), value);
+   value = tree_cons (NULL_TREE, size_int (num_zr), value);
+   TYPE_ATTRIBUTES (type) = tree_cons (get_identifier ("SVE type"), value,
+ 				      TYPE_ATTRIBUTES (type));
+ }
+ 
+ /* If TYPE is an ABI-defined SVE type, return its attribute descriptor,
+    otherwise return null.  */
+ static tree
+ lookup_sve_type_attribute (const_tree type)
+ {
+   if (type == error_mark_node)
+     return NULL_TREE;
+   return lookup_attribute ("SVE type", TYPE_ATTRIBUTES (type));
+ }
+ 
+ /* Force TYPE to be a sizeless type.  */
+ static void
+ make_type_sizeless (tree type)
+ {
+   TYPE_ATTRIBUTES (type) = tree_cons (get_identifier ("SVE sizeless type"),
+ 				      NULL_TREE, TYPE_ATTRIBUTES (type));
+ }
+ 
+ /* Return true if TYPE is a sizeless type.  */
+ static bool
+ sizeless_type_p (const_tree type)
+ {
+   if (type == error_mark_node)
+     return NULL_TREE;
+   return lookup_attribute ("SVE sizeless type", TYPE_ATTRIBUTES (type));
+ }
+ 
+ /* Return true if CANDIDATE is equivalent to MODEL_TYPE for overloading
+    purposes.  */
+ static bool
+ matches_type_p (const_tree model_type, const_tree candidate)
+ {
+   if (VECTOR_TYPE_P (model_type))
+     {
+       if (!VECTOR_TYPE_P (candidate)
+ 	  || maybe_ne (TYPE_VECTOR_SUBPARTS (model_type),
+ 		       TYPE_VECTOR_SUBPARTS (candidate))
+ 	  || TYPE_MODE (model_type) != TYPE_MODE (candidate))
+ 	return false;
+ 
+       model_type = TREE_TYPE (model_type);
+       candidate = TREE_TYPE (candidate);
+     }
+   return (candidate != error_mark_node
+ 	  && TYPE_MAIN_VARIANT (model_type) == TYPE_MAIN_VARIANT (candidate));
+ }
+ 
+ /* If TYPE is a valid SVE element type, return the corresponding type
+    suffix, otherwise return NUM_TYPE_SUFFIXES.  */
+ static type_suffix_index
+ find_type_suffix_for_scalar_type (const_tree type)
+ {
+   /* A linear search should be OK here, since the code isn't hot and
+      the number of types is only small.  */
+   for (unsigned int suffix_i = 0; suffix_i < NUM_TYPE_SUFFIXES; ++suffix_i)
+     if (!type_suffixes[suffix_i].bool_p)
+       {
+ 	vector_type_index vector_i = type_suffixes[suffix_i].vector_type;
+ 	if (matches_type_p (scalar_types[vector_i], type))
+ 	  return type_suffix_index (suffix_i);
+       }
+   return NUM_TYPE_SUFFIXES;
+ }
+ 
+ /* Report an error against LOCATION that the user has tried to use
+    function FNDECL when extension EXTENSION is disabled.  */
+ static void
+ report_missing_extension (location_t location, tree fndecl,
+ 			  const char *extension)
+ {
+   /* Avoid reporting a slew of messages for a single oversight.  */
+   if (reported_missing_extension_p)
+     return;
+ 
+   error_at (location, "ACLE function %qD requires ISA extension %qs",
+ 	    fndecl, extension);
+   inform (location, "you can enable %qs using the command-line"
+ 	  " option %<-march%>, or by using the %<target%>"
+ 	  " attribute or pragma", extension);
+   reported_missing_extension_p = true;
+ }
+ 
+ /* Check whether the registers required by SVE function fndecl are available.
+    Report an error against LOCATION and return false if not.  */
+ static bool
+ check_required_registers (location_t location, tree fndecl)
+ {
+   /* Avoid reporting a slew of messages for a single oversight.  */
+   if (reported_missing_registers_p)
+     return false;
+ 
+   if (TARGET_GENERAL_REGS_ONLY)
+     {
+       /* SVE registers are not usable when -mgeneral-regs-only option
+ 	 is specified.  */
+       error_at (location,
+ 		"ACLE function %qD is incompatible with the use of %qs",
+ 		fndecl, "-mgeneral-regs-only");
+       reported_missing_registers_p = true;
+       return false;
+     }
+ 
+   return true;
+ }
+ 
+ /* Check whether all the AARCH64_FL_* values in REQUIRED_EXTENSIONS are
+    enabled, given that those extensions are required for function FNDECL.
+    Report an error against LOCATION if not.  */
+ static bool
+ check_required_extensions (location_t location, tree fndecl,
+ 			   uint64_t required_extensions)
+ {
+   uint64_t missing_extensions = required_extensions & ~aarch64_isa_flags;
+   if (missing_extensions == 0)
+     return check_required_registers (location, fndecl);
+ 
+   static const struct { uint64_t flag; const char *name; } extensions[] = {
+ #define AARCH64_OPT_EXTENSION(EXT_NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, \
+ 			      SYNTHETIC, FEATURE_STRING) \
+     { FLAG_CANONICAL, EXT_NAME },
+ #include "aarch64-option-extensions.def"
+   };
+ 
+   for (unsigned int i = 0; i < ARRAY_SIZE (extensions); ++i)
+     if (missing_extensions & extensions[i].flag)
+       {
+ 	report_missing_extension (location, fndecl, extensions[i].name);
+ 	return false;
+       }
+   gcc_unreachable ();
+ }
+ 
+ /* Report that LOCATION has a call to FNDECL in which argument ARGNO
+    was not an integer constant expression.  ARGNO counts from zero.  */
+ static void
+ report_non_ice (location_t location, tree fndecl, unsigned int argno)
+ {
+   error_at (location, "argument %d of %qE must be an integer constant"
+ 	    " expression", argno + 1, fndecl);
+ }
+ 
+ /* Report that LOCATION has a call to FNDECL in which argument ARGNO has
+    the value ACTUAL, whereas the function requires a value in the range
+    [MIN, MAX].  ARGNO counts from zero.  */
+ static void
+ report_out_of_range (location_t location, tree fndecl, unsigned int argno,
+ 		     HOST_WIDE_INT actual, HOST_WIDE_INT min,
+ 		     HOST_WIDE_INT max)
+ {
+   error_at (location, "passing %wd to argument %d of %qE, which expects"
+ 	    " a value in the range [%wd, %wd]", actual, argno + 1, fndecl,
+ 	    min, max);
+ }
+ 
+ /* Report that LOCATION has a call to FNDECL in which argument ARGNO has
+    the value ACTUAL, whereas the function requires either VALUE0 or
+    VALUE1.  ARGNO counts from zero.  */
+ static void
+ report_neither_nor (location_t location, tree fndecl, unsigned int argno,
+ 		    HOST_WIDE_INT actual, HOST_WIDE_INT value0,
+ 		    HOST_WIDE_INT value1)
+ {
+   error_at (location, "passing %wd to argument %d of %qE, which expects"
+ 	    " either %wd or %wd", actual, argno + 1, fndecl, value0, value1);
+ }
+ 
+ /* Report that LOCATION has a call to FNDECL in which argument ARGNO has
+    the value ACTUAL, whereas the function requires one of VALUE0..3.
+    ARGNO counts from zero.  */
+ static void
+ report_not_one_of (location_t location, tree fndecl, unsigned int argno,
+ 		   HOST_WIDE_INT actual, HOST_WIDE_INT value0,
+ 		   HOST_WIDE_INT value1, HOST_WIDE_INT value2,
+ 		   HOST_WIDE_INT value3)
+ {
+   error_at (location, "passing %wd to argument %d of %qE, which expects"
+ 	    " %wd, %wd, %wd or %wd", actual, argno + 1, fndecl, value0, value1,
+ 	    value2, value3);
+ }
+ 
+ /* Report that LOCATION has a call to FNDECL in which argument ARGNO has
+    the value ACTUAL, whereas the function requires a valid value of
+    enum type ENUMTYPE.  ARGNO counts from zero.  */
+ static void
+ report_not_enum (location_t location, tree fndecl, unsigned int argno,
+ 		 HOST_WIDE_INT actual, tree enumtype)
+ {
+   error_at (location, "passing %wd to argument %d of %qE, which expects"
+ 	    " a valid %qT value", actual, argno + 1, fndecl, enumtype);
+ }
+ 
+ /* Return a hash code for a function_instance.  */
+ hashval_t
+ function_instance::hash () const
+ {
+   inchash::hash h;
+   /* BASE uniquely determines BASE_NAME, so we don't need to hash both.  */
+   h.add_ptr (base);
+   h.add_ptr (shape);
+   h.add_int (mode_suffix_id);
+   h.add_int (type_suffix_ids[0]);
+   h.add_int (type_suffix_ids[1]);
+   h.add_int (pred);
+   return h.end ();
+ }
+ 
+ /* Return a set of CP_* flags that describe what the function could do,
+    taking the command-line flags into account.  */
+ unsigned int
+ function_instance::call_properties () const
+ {
+   unsigned int flags = base->call_properties (*this);
+ 
+   /* -fno-trapping-math means that we can assume any FP exceptions
+      are not user-visible.  */
+   if (!flag_trapping_math)
+     flags &= ~CP_RAISE_FP_EXCEPTIONS;
+ 
+   return flags;
+ }
+ 
+ /* Return true if calls to the function could read some form of
+    global state.  */
+ bool
+ function_instance::reads_global_state_p () const
+ {
+   unsigned int flags = call_properties ();
+ 
+   /* Preserve any dependence on rounding mode, flush to zero mode, etc.
+      There is currently no way of turning this off; in particular,
+      -fno-rounding-math (which is the default) means that we should make
+      the usual assumptions about rounding mode, which for intrinsics means
+      acting as the instructions do.  */
+   if (flags & CP_READ_FPCR)
+     return true;
+ 
+   /* Handle direct reads of global state.  */
+   return flags & (CP_READ_MEMORY | CP_READ_FFR);
+ }
+ 
+ /* Return true if calls to the function could modify some form of
+    global state.  */
+ bool
+ function_instance::modifies_global_state_p () const
+ {
+   unsigned int flags = call_properties ();
+ 
+   /* Preserve any exception state written back to the FPCR,
+      unless -fno-trapping-math says this is unnecessary.  */
+   if (flags & CP_RAISE_FP_EXCEPTIONS)
+     return true;
+ 
+   /* Treat prefetches as modifying global state, since that's the
+      only means we have of keeping them in their correct position.  */
+   if (flags & CP_PREFETCH_MEMORY)
+     return true;
+ 
+   /* Handle direct modifications of global state.  */
+   return flags & (CP_WRITE_MEMORY | CP_WRITE_FFR);
+ }
+ 
+ /* Return true if calls to the function could raise a signal.  */
+ bool
+ function_instance::could_trap_p () const
+ {
+   unsigned int flags = call_properties ();
+ 
+   /* Handle functions that could raise SIGFPE.  */
+   if (flags & CP_RAISE_FP_EXCEPTIONS)
+     return true;
+ 
+   /* Handle functions that could raise SIGBUS or SIGSEGV.  */
+   if (flags & (CP_READ_MEMORY | CP_WRITE_MEMORY))
+     return true;
+ 
+   return false;
+ }
+ 
+ inline hashval_t
+ registered_function_hasher::hash (value_type value)
+ {
+   return value->instance.hash ();
+ }
+ 
+ inline bool
+ registered_function_hasher::equal (value_type value, const compare_type &key)
+ {
+   return value->instance == key;
+ }
+ 
+ sve_switcher::sve_switcher ()
+   : m_old_isa_flags (aarch64_isa_flags)
+ {
+   /* Changing the ISA flags and have_regs_of_mode should be enough here.
+      We shouldn't need to pay the compile-time cost of a full target
+      switch.  */
+   aarch64_isa_flags = (AARCH64_FL_FP | AARCH64_FL_SIMD | AARCH64_FL_F16
+ 		       | AARCH64_FL_SVE);
+ 
+   m_old_general_regs_only = TARGET_GENERAL_REGS_ONLY;
+   global_options.x_target_flags &= ~MASK_GENERAL_REGS_ONLY;
+ 
+   memcpy (m_old_have_regs_of_mode, have_regs_of_mode,
+ 	  sizeof (have_regs_of_mode));
+   for (int i = 0; i < NUM_MACHINE_MODES; ++i)
+     if (aarch64_sve_mode_p ((machine_mode) i))
+       have_regs_of_mode[i] = true;
+ }
+ 
+ sve_switcher::~sve_switcher ()
+ {
+   memcpy (have_regs_of_mode, m_old_have_regs_of_mode,
+ 	  sizeof (have_regs_of_mode));
+   if (m_old_general_regs_only)
+     global_options.x_target_flags |= MASK_GENERAL_REGS_ONLY;
+   aarch64_isa_flags = m_old_isa_flags;
+ }
+ 
+ function_builder::function_builder ()
+ {
+   m_overload_type = build_function_type (void_type_node, void_list_node);
+   m_direct_overloads = lang_GNU_CXX ();
+   gcc_obstack_init (&m_string_obstack);
+ }
+ 
+ function_builder::~function_builder ()
+ {
+   obstack_free (&m_string_obstack, NULL);
+ }
+ 
+ /* Add NAME to the end of the function name being built.  */
+ void
+ function_builder::append_name (const char *name)
+ {
+   obstack_grow (&m_string_obstack, name, strlen (name));
+ }
+ 
+ /* Zero-terminate and complete the function name being built.  */
+ char *
+ function_builder::finish_name ()
+ {
+   obstack_1grow (&m_string_obstack, 0);
+   return (char *) obstack_finish (&m_string_obstack);
+ }
+ 
+ /* Return the overloaded or full function name for INSTANCE; OVERLOADED_P
+    selects which.  Allocate the string on m_string_obstack; the caller
+    must use obstack_free to free it after use.  */
+ char *
+ function_builder::get_name (const function_instance &instance,
+ 			    bool overloaded_p)
+ {
+   append_name (instance.base_name);
+   if (overloaded_p)
+     switch (instance.displacement_units ())
+       {
+       case UNITS_none:
+ 	break;
+ 
+       case UNITS_bytes:
+ 	append_name ("_offset");
+ 	break;
+ 
+       case UNITS_elements:
+ 	append_name ("_index");
+ 	break;
+ 
+       case UNITS_vectors:
+ 	append_name ("_vnum");
+ 	break;
+       }
+   else
+     append_name (instance.mode_suffix ().string);
+   for (unsigned int i = 0; i < 2; ++i)
+     if (!overloaded_p || instance.shape->explicit_type_suffix_p (i))
+       append_name (instance.type_suffix (i).string);
+   append_name (pred_suffixes[instance.pred]);
+   return finish_name ();
+ }
+ 
+ /* Add attribute NAME to ATTRS.  */
+ static tree
+ add_attribute (const char *name, tree attrs)
+ {
+   return tree_cons (get_identifier (name), NULL_TREE, attrs);
+ }
+ 
+ /* Return the appropriate function attributes for INSTANCE.  */
+ tree
+ function_builder::get_attributes (const function_instance &instance)
+ {
+   tree attrs = NULL_TREE;
+ 
+   if (!instance.modifies_global_state_p ())
+     {
+       if (instance.reads_global_state_p ())
+ 	attrs = add_attribute ("pure", attrs);
+       else
+ 	attrs = add_attribute ("const", attrs);
+     }
+ 
+   if (!flag_non_call_exceptions || !instance.could_trap_p ())
+     attrs = add_attribute ("nothrow", attrs);
+ 
+   return add_attribute ("leaf", attrs);
+ }
+ 
+ /* Add a function called NAME with type FNTYPE and attributes ATTRS.
+    INSTANCE describes what the function does and OVERLOADED_P indicates
+    whether it is overloaded.  REQUIRED_EXTENSIONS are the set of
+    architecture extensions that the function requires.  */
+ registered_function &
+ function_builder::add_function (const function_instance &instance,
+ 				const char *name, tree fntype, tree attrs,
+ 				uint64_t required_extensions,
+ 				bool overloaded_p)
+ {
+   unsigned int code = vec_safe_length (registered_functions);
+   code = (code << AARCH64_BUILTIN_SHIFT) | AARCH64_BUILTIN_SVE;
+   tree decl = simulate_builtin_function_decl (input_location, name, fntype,
+ 					      code, NULL, attrs);
+ 
+   registered_function &rfn = *ggc_alloc <registered_function> ();
+   rfn.instance = instance;
+   rfn.decl = decl;
+   rfn.required_extensions = required_extensions;
+   rfn.overloaded_p = overloaded_p;
+   vec_safe_push (registered_functions, &rfn);
+ 
+   return rfn;
+ }
+ 
+ /* Add a built-in function for INSTANCE, with the argument types given
+    by ARGUMENT_TYPES and the return type given by RETURN_TYPE.
+    REQUIRED_EXTENSIONS are the set of architecture extensions that the
+    function requires.  FORCE_DIRECT_OVERLOADS is true if there is a
+    one-to-one mapping between "short" and "full" names, and if standard
+    overload resolution therefore isn't necessary.  */
+ void
+ function_builder::add_unique_function (const function_instance &instance,
+ 				       tree return_type,
+ 				       vec<tree> &argument_types,
+ 				       uint64_t required_extensions,
+ 				       bool force_direct_overloads)
+ {
+   /* Add the function under its full (unique) name.  */
+   char *name = get_name (instance, false);
+   tree fntype = build_function_type_array (return_type,
+ 					   argument_types.length (),
+ 					   argument_types.address ());
+   tree attrs = get_attributes (instance);
+   registered_function &rfn = add_function (instance, name, fntype, attrs,
+ 					   required_extensions, false);
+ 
+   /* Enter the function into the hash table.  */
+   hashval_t hash = instance.hash ();
+   registered_function **rfn_slot
+     = function_table->find_slot_with_hash (instance, hash, INSERT);
+   gcc_assert (!*rfn_slot);
+   *rfn_slot = &rfn;
+ 
+   /* Also add the function under its overloaded alias, if we want
+      a separate decl for each instance of an overloaded function.  */
+   if (m_direct_overloads || force_direct_overloads)
+     {
+       char *overload_name = get_name (instance, true);
+       if (strcmp (name, overload_name) != 0)
+ 	{
+ 	  /* Attribute lists shouldn't be shared.  */
+ 	  tree attrs = get_attributes (instance);
+ 	  add_function (instance, overload_name, fntype, attrs,
+ 			required_extensions, false);
+ 	}
+     }
+ 
+   obstack_free (&m_string_obstack, name);
+ }
+ 
+ /* Add one function decl for INSTANCE, to be used with manual overload
+    resolution.  REQUIRED_EXTENSIONS are the set of architecture extensions
+    that the function requires.
+ 
+    For simplicity, deal with duplicate attempts to add the same function,
+    including cases in which the new function requires more features than
+    the original one did.  In that case we'll check whether the required
+    features are available as part of resolving the function to the
+    relevant unique function.  */
+ void
+ function_builder::add_overloaded_function (const function_instance &instance,
+ 					   uint64_t required_extensions)
+ {
+   char *name = get_name (instance, true);
+   if (registered_function **map_value = m_overload_names.get (name))
+     gcc_assert ((*map_value)->instance == instance
+ 		&& ((*map_value)->required_extensions
+ 		    & ~required_extensions) == 0);
+   else
+     {
+       registered_function &rfn
+ 	= add_function (instance, name, m_overload_type, NULL_TREE,
+ 			required_extensions, true);
+       const char *permanent_name = IDENTIFIER_POINTER (DECL_NAME (rfn.decl));
+       m_overload_names.put (permanent_name, &rfn);
+     }
+   obstack_free (&m_string_obstack, name);
+ }
+ 
+ /* If we are using manual overload resolution, add one function decl
+    for each overloaded function in GROUP.  Take the function base name
+    from GROUP and the mode from MODE.  */
+ void
+ function_builder::add_overloaded_functions (const function_group_info &group,
+ 					    mode_suffix_index mode)
+ {
+   if (m_direct_overloads)
+     return;
+ 
+   unsigned int explicit_type0 = (*group.shape)->explicit_type_suffix_p (0);
+   unsigned int explicit_type1 = (*group.shape)->explicit_type_suffix_p (1);
+   for (unsigned int pi = 0; group.preds[pi] != NUM_PREDS; ++pi)
+     {
+       if (!explicit_type0 && !explicit_type1)
+ 	{
+ 	  /* Deal with the common case in which there is one overloaded
+ 	     function for all type combinations.  */
+ 	  function_instance instance (group.base_name, *group.base,
+ 				      *group.shape, mode, types_none[0],
+ 				      group.preds[pi]);
+ 	  add_overloaded_function (instance, group.required_extensions);
+ 	}
+       else
+ 	for (unsigned int ti = 0; group.types[ti][0] != NUM_TYPE_SUFFIXES;
+ 	     ++ti)
+ 	  {
+ 	    /* Stub out the types that are determined by overload
+ 	       resolution.  */
+ 	    type_suffix_pair types = {
+ 	      explicit_type0 ? group.types[ti][0] : NUM_TYPE_SUFFIXES,
+ 	      explicit_type1 ? group.types[ti][1] : NUM_TYPE_SUFFIXES
+ 	    };
+ 	    function_instance instance (group.base_name, *group.base,
+ 					*group.shape, mode, types,
+ 					group.preds[pi]);
+ 	    add_overloaded_function (instance, group.required_extensions);
+ 	  }
+     }
+ }
+ 
+ /* Register all the functions in GROUP.  */
+ void
+ function_builder::register_function_group (const function_group_info &group)
+ {
+   (*group.shape)->build (*this, group);
+ }
+ 
+ function_call_info::function_call_info (location_t location_in,
+ 					const function_instance &instance_in,
+ 					tree fndecl_in)
+   : function_instance (instance_in), location (location_in), fndecl (fndecl_in)
+ {
+ }
+ 
+ function_resolver::function_resolver (location_t location,
+ 				      const function_instance &instance,
+ 				      tree fndecl, vec<tree, va_gc> &arglist)
+   : function_call_info (location, instance, fndecl), m_arglist (arglist)
+ {
+ }
+ 
+ /* Return the vector type associated with type suffix TYPE.  */
+ tree
+ function_resolver::get_vector_type (type_suffix_index type)
+ {
+   return acle_vector_types[0][type_suffixes[type].vector_type];
+ }
+ 
+ /* Return the <stdint.h> name associated with TYPE.  Using the <stdint.h>
+    name should be more user-friendly than the underlying canonical type,
+    since it makes the signedness and bitwidth explicit.  */
+ const char *
+ function_resolver::get_scalar_type_name (type_suffix_index type)
+ {
+   return vector_types[type_suffixes[type].vector_type].acle_name + 2;
+ }
+ 
+ /* Return the type of argument I, or error_mark_node if it isn't
+    well-formed.  */
+ tree
+ function_resolver::get_argument_type (unsigned int i)
+ {
+   tree arg = m_arglist[i];
+   return arg == error_mark_node ? arg : TREE_TYPE (arg);
+ }
+ 
+ /* Return true if argument I is some form of scalar value.  */
+ bool
+ function_resolver::scalar_argument_p (unsigned int i)
+ {
+   tree type = get_argument_type (i);
+   return (INTEGRAL_TYPE_P (type)
+ 	  /* Allow pointer types, leaving the frontend to warn where
+ 	     necessary.  */
+ 	  || POINTER_TYPE_P (type)
+ 	  || SCALAR_FLOAT_TYPE_P (type));
+ }
+ 
+ /* Report that the function has no form that takes type suffix TYPE.
+    Return error_mark_node.  */
+ tree
+ function_resolver::report_no_such_form (type_suffix_index type)
+ {
+   error_at (location, "%qE has no form that takes %qT arguments",
+ 	    fndecl, get_vector_type (type));
+   return error_mark_node;
+ }
+ 
+ /* Silently check whether there is an instance of the function with the
+    mode suffix given by MODE and the type suffixes given by TYPE0 and TYPE1.
+    Return its function decl if so, otherwise return null.  */
+ tree
+ function_resolver::lookup_form (mode_suffix_index mode,
+ 				type_suffix_index type0,
+ 				type_suffix_index type1)
+ {
+   type_suffix_pair types = { type0, type1 };
+   function_instance instance (base_name, base, shape, mode, types, pred);
+   registered_function *rfn
+     = function_table->find_with_hash (instance, instance.hash ());
+   return rfn ? rfn->decl : NULL_TREE;
+ }
+ 
+ /* Resolve the function to one with the mode suffix given by MODE and the
+    type suffixes given by TYPE0 and TYPE1.  Return its function decl on
+    success, otherwise report an error and return error_mark_node.  */
+ tree
+ function_resolver::resolve_to (mode_suffix_index mode,
+ 			       type_suffix_index type0,
+ 			       type_suffix_index type1)
+ {
+   tree res = lookup_form (mode, type0, type1);
+   if (!res)
+     {
+       if (type1 == NUM_TYPE_SUFFIXES)
+ 	return report_no_such_form (type0);
+       if (type0 == type_suffix_ids[0])
+ 	return report_no_such_form (type1);
+       /* To be filled in when we have other cases.  */
+       gcc_unreachable ();
+     }
+   return res;
+ }
+ 
+ /* Require argument ARGNO to be a 32-bit or 64-bit scalar integer type.
+    Return the associated type suffix on success, otherwise report an
+    error and return NUM_TYPE_SUFFIXES.  */
+ type_suffix_index
+ function_resolver::infer_integer_scalar_type (unsigned int argno)
+ {
+   tree actual = get_argument_type (argno);
+   if (actual == error_mark_node)
+     return NUM_TYPE_SUFFIXES;
+ 
+   /* Allow enums and booleans to decay to integers, for compatibility
+      with C++ overloading rules.  */
+   if (INTEGRAL_TYPE_P (actual))
+     {
+       bool uns_p = TYPE_UNSIGNED (actual);
+       /* Honor the usual integer promotions, so that resolution works
+ 	 in the same way as for C++.  */
+       if (TYPE_PRECISION (actual) < 32)
+ 	return TYPE_SUFFIX_s32;
+       if (TYPE_PRECISION (actual) == 32)
+ 	return uns_p ? TYPE_SUFFIX_u32 : TYPE_SUFFIX_s32;
+       if (TYPE_PRECISION (actual) == 64)
+ 	return uns_p ? TYPE_SUFFIX_u64 : TYPE_SUFFIX_s64;
+     }
+ 
+   error_at (location, "passing %qT to argument %d of %qE, which expects"
+ 	    " a 32-bit or 64-bit integer type", actual, argno + 1, fndecl);
+   return NUM_TYPE_SUFFIXES;
+ }
+ 
+ /* Require argument ARGNO to be a pointer to a scalar type that has a
+    corresponding type suffix.  Return that type suffix on success,
+    otherwise report an error and return NUM_TYPE_SUFFIXES.
+    GATHER_SCATTER_P is true if the function is a gather/scatter
+    operation, and so requires a pointer to 32-bit or 64-bit data.  */
+ type_suffix_index
+ function_resolver::infer_pointer_type (unsigned int argno,
+ 				       bool gather_scatter_p)
+ {
+   tree actual = get_argument_type (argno);
+   if (actual == error_mark_node)
+     return NUM_TYPE_SUFFIXES;
+ 
+   if (TREE_CODE (actual) != POINTER_TYPE)
+     {
+       error_at (location, "passing %qT to argument %d of %qE, which"
+ 		" expects a pointer type", actual, argno + 1, fndecl);
+       if (VECTOR_TYPE_P (actual) && gather_scatter_p)
+ 	inform (location, "an explicit type suffix is needed"
+ 		" when using a vector of base addresses");
+       return NUM_TYPE_SUFFIXES;
+     }
+ 
+   tree target = TREE_TYPE (actual);
+   type_suffix_index type = find_type_suffix_for_scalar_type (target);
+   if (type == NUM_TYPE_SUFFIXES)
+     {
+       error_at (location, "passing %qT to argument %d of %qE, but %qT is not"
+ 		" a valid SVE element type", actual, argno + 1, fndecl,
+ 		build_qualified_type (target, 0));
+       return NUM_TYPE_SUFFIXES;
+     }
+   unsigned int bits = type_suffixes[type].element_bits;
+   if (gather_scatter_p && bits != 32 && bits != 64)
+     {
+       error_at (location, "passing %qT to argument %d of %qE, which"
+ 		" expects a pointer to 32-bit or 64-bit elements",
+ 		actual, argno + 1, fndecl);
+       return NUM_TYPE_SUFFIXES;
+     }
+ 
+   return type;
+ }
+ 
+ /* Require argument ARGNO to be a single vector or a tuple of NUM_VECTORS
+    vectors; NUM_VECTORS is 1 for the former.  Return the associated type
+    suffix on success, using TYPE_SUFFIX_b for predicates.  Report an error
+    and return NUM_TYPE_SUFFIXES on failure.  */
+ type_suffix_index
+ function_resolver::infer_vector_or_tuple_type (unsigned int argno,
+ 					       unsigned int num_vectors)
+ {
+   tree actual = get_argument_type (argno);
+   if (actual == error_mark_node)
+     return NUM_TYPE_SUFFIXES;
+ 
+   /* A linear search should be OK here, since the code isn't hot and
+      the number of types is only small.  */
+   for (unsigned int size_i = 0; size_i < MAX_TUPLE_SIZE; ++size_i)
+     for (unsigned int suffix_i = 0; suffix_i < NUM_TYPE_SUFFIXES; ++suffix_i)
+       {
+ 	vector_type_index type_i = type_suffixes[suffix_i].vector_type;
+ 	tree type = acle_vector_types[size_i][type_i];
+ 	if (type && matches_type_p (type, actual))
+ 	  {
+ 	    if (size_i + 1 == num_vectors)
+ 	      return type_suffix_index (suffix_i);
+ 
+ 	    if (num_vectors == 1)
+ 	      error_at (location, "passing %qT to argument %d of %qE, which"
+ 			" expects a single SVE vector rather than a tuple",
+ 			actual, argno + 1, fndecl);
+ 	    else if (size_i == 0 && type_i != VECTOR_TYPE_svbool_t)
+ 	      error_at (location, "passing single vector %qT to argument %d"
+ 			" of %qE, which expects a tuple of %d vectors",
+ 			actual, argno + 1, fndecl, num_vectors);
+ 	    else
+ 	      error_at (location, "passing %qT to argument %d of %qE, which"
+ 			" expects a tuple of %d vectors", actual, argno + 1,
+ 			fndecl, num_vectors);
+ 	    return NUM_TYPE_SUFFIXES;
+ 	  }
+       }
+ 
+   if (num_vectors == 1)
+     error_at (location, "passing %qT to argument %d of %qE, which"
+ 	      " expects an SVE vector type", actual, argno + 1, fndecl);
+   else
+     error_at (location, "passing %qT to argument %d of %qE, which"
+ 	      " expects an SVE tuple type", actual, argno + 1, fndecl);
+   return NUM_TYPE_SUFFIXES;
+ }
+ 
+ /* Require argument ARGNO to have some form of vector type.  Return the
+    associated type suffix on success, using TYPE_SUFFIX_b for predicates.
+    Report an error and return NUM_TYPE_SUFFIXES on failure.  */
+ type_suffix_index
+ function_resolver::infer_vector_type (unsigned int argno)
+ {
+   return infer_vector_or_tuple_type (argno, 1);
+ }
+ 
+ /* Like infer_vector_type, but also require the type to be integral.  */
+ type_suffix_index
+ function_resolver::infer_integer_vector_type (unsigned int argno)
+ {
+   type_suffix_index type = infer_vector_type (argno);
+   if (type == NUM_TYPE_SUFFIXES)
+     return type;
+ 
+   if (!type_suffixes[type].integer_p)
+     {
+       error_at (location, "passing %qT to argument %d of %qE, which"
+ 		" expects a vector of integers", get_argument_type (argno),
+ 		argno + 1, fndecl);
+       return NUM_TYPE_SUFFIXES;
+     }
+ 
+   return type;
+ }
+ 
+ /* Like infer_vector_type, but also require the type to be an unsigned
+    integer.  */
+ type_suffix_index
+ function_resolver::infer_unsigned_vector_type (unsigned int argno)
+ {
+   type_suffix_index type = infer_vector_type (argno);
+   if (type == NUM_TYPE_SUFFIXES)
+     return type;
+ 
+   if (!type_suffixes[type].unsigned_p)
+     {
+       error_at (location, "passing %qT to argument %d of %qE, which"
+ 		" expects a vector of unsigned integers",
+ 		get_argument_type (argno), argno + 1, fndecl);
+       return NUM_TYPE_SUFFIXES;
+     }
+ 
+   return type;
+ }
+ 
+ /* Like infer_vector_type, but also require the element size to be
+    32 or 64 bits.  */
+ type_suffix_index
+ function_resolver::infer_sd_vector_type (unsigned int argno)
+ {
+   type_suffix_index type = infer_vector_type (argno);
+   if (type == NUM_TYPE_SUFFIXES)
+     return type;
+ 
+   unsigned int bits = type_suffixes[type].element_bits;
+   if (bits != 32 && bits != 64)
+     {
+       error_at (location, "passing %qT to argument %d of %qE, which"
+ 		" expects a vector of 32-bit or 64-bit elements",
+ 		get_argument_type (argno), argno + 1, fndecl);
+       return NUM_TYPE_SUFFIXES;
+     }
+ 
+   return type;
+ }
+ 
+ /* If the function operates on tuples of vectors, require argument ARGNO to be
+    a tuple with the appropriate number of vectors, otherwise require it to be
+    a single vector.  Return the associated type suffix on success, using
+    TYPE_SUFFIX_b for predicates.  Report an error and return NUM_TYPE_SUFFIXES
+    on failure.  */
+ type_suffix_index
+ function_resolver::infer_tuple_type (unsigned int argno)
+ {
+   return infer_vector_or_tuple_type (argno, vectors_per_tuple ());
+ }
+ 
+ /* Require argument ARGNO to be a vector or scalar argument.  Return true
+    if it is, otherwise report an appropriate error.  */
+ bool
+ function_resolver::require_vector_or_scalar_type (unsigned int argno)
+ {
+   tree actual = get_argument_type (argno);
+   if (actual == error_mark_node)
+     return false;
+ 
+   if (!scalar_argument_p (argno) && !VECTOR_TYPE_P (actual))
+     {
+       error_at (location, "passing %qT to argument %d of %qE, which"
+ 		" expects a vector or scalar type", actual, argno + 1, fndecl);
+       return false;
+     }
+ 
+   return true;
+ }
+ 
+ /* Require argument ARGNO to have vector type TYPE, in cases where this
+    requirement holds for all uses of the function.  Return true if the
+    argument has the right form, otherwise report an appropriate error.  */
+ bool
+ function_resolver::require_vector_type (unsigned int argno,
+ 					vector_type_index type)
+ {
+   tree expected = acle_vector_types[0][type];
+   tree actual = get_argument_type (argno);
+   if (!matches_type_p (expected, actual))
+     {
+       error_at (location, "passing %qT to argument %d of %qE, which"
+ 		" expects %qT", actual, argno + 1, fndecl, expected);
+       return false;
+     }
+   return true;
+ }
+ 
+ /* Like require_vector_type, but TYPE is inferred from previous arguments
+    rather than being a fixed part of the function signature.  This changes
+    the nature of the error messages.  */
+ bool
+ function_resolver::require_matching_vector_type (unsigned int argno,
+ 						 type_suffix_index type)
+ {
+   type_suffix_index new_type = infer_vector_type (argno);
+   if (new_type == NUM_TYPE_SUFFIXES)
+     return false;
+ 
+   if (type != new_type)
+     {
+       error_at (location, "passing %qT to argument %d of %qE, but"
+ 		" previous arguments had type %qT",
+ 		get_vector_type (new_type), argno + 1, fndecl,
+ 		get_vector_type (type));
+       return false;
+     }
+   return true;
+ }
+ 
+ /* Require argument ARGNO to be a vector type with the following properties:
+ 
+    - the type class must be the same as FIRST_TYPE's if EXPECTED_TCLASS
+      is SAME_TYPE_CLASS, otherwise it must be EXPECTED_TCLASS itself.
+ 
+    - the element size must be:
+ 
+      - the same as FIRST_TYPE's if EXPECTED_BITS == SAME_SIZE
+      - half of FIRST_TYPE's if EXPECTED_BITS == HALF_SIZE
+      - a quarter of FIRST_TYPE's if EXPECTED_BITS == QUARTER_SIZE
+      - EXPECTED_BITS itself otherwise
+ 
+    Return true if the argument has the required type, otherwise report
+    an appropriate error.
+ 
+    FIRST_ARGNO is the first argument that is known to have type FIRST_TYPE.
+    Usually it comes before ARGNO, but sometimes it is more natural to resolve
+    arguments out of order.
+ 
+    If the required properties depend on FIRST_TYPE then both FIRST_ARGNO and
+    ARGNO contribute to the resolution process.  If the required properties
+    are fixed, only FIRST_ARGNO contributes to the resolution process.
+ 
+    This function is a bit of a Swiss army knife.  The complication comes
+    from trying to give good error messages when FIRST_ARGNO and ARGNO are
+    inconsistent, since either of them might be wrong.  */
+ bool function_resolver::
+ require_derived_vector_type (unsigned int argno,
+ 			     unsigned int first_argno,
+ 			     type_suffix_index first_type,
+ 			     type_class_index expected_tclass,
+ 			     unsigned int expected_bits)
+ {
+   /* If the type needs to match FIRST_ARGNO exactly, use the preferred
+      error message for that case.  The VECTOR_TYPE_P test excludes tuple
+      types, which we handle below instead.  */
+   bool both_vectors_p = VECTOR_TYPE_P (get_argument_type (first_argno));
+   if (both_vectors_p
+       && expected_tclass == SAME_TYPE_CLASS
+       && expected_bits == SAME_SIZE)
+     {
+       /* There's no need to resolve this case out of order.  */
+       gcc_assert (argno > first_argno);
+       return require_matching_vector_type (argno, first_type);
+     }
+ 
+   /* Use FIRST_TYPE to get the expected type class and element size.  */
+   type_class_index orig_expected_tclass = expected_tclass;
+   if (expected_tclass == NUM_TYPE_CLASSES)
+     expected_tclass = type_suffixes[first_type].tclass;
+ 
+   unsigned int orig_expected_bits = expected_bits;
+   if (expected_bits == SAME_SIZE)
+     expected_bits = type_suffixes[first_type].element_bits;
+   else if (expected_bits == HALF_SIZE)
+     expected_bits = type_suffixes[first_type].element_bits / 2;
+   else if (expected_bits == QUARTER_SIZE)
+     expected_bits = type_suffixes[first_type].element_bits / 4;
+ 
+   /* If the expected type doesn't depend on FIRST_TYPE at all,
+      just check for the fixed choice of vector type.  */
+   if (expected_tclass == orig_expected_tclass
+       && expected_bits == orig_expected_bits)
+     {
+       const type_suffix_info &expected_suffix
+ 	= type_suffixes[find_type_suffix (expected_tclass, expected_bits)];
+       return require_vector_type (argno, expected_suffix.vector_type);
+     }
+ 
+   /* Require the argument to be some form of SVE vector type,
+      without being specific about the type of vector we want.  */
+   type_suffix_index actual_type = infer_vector_type (argno);
+   if (actual_type == NUM_TYPE_SUFFIXES)
+     return false;
+ 
+   /* Exit now if we got the right type.  */
+   bool tclass_ok_p = (type_suffixes[actual_type].tclass == expected_tclass);
+   bool size_ok_p = (type_suffixes[actual_type].element_bits == expected_bits);
+   if (tclass_ok_p && size_ok_p)
+     return true;
+ 
+   /* First look for cases in which the actual type contravenes a fixed
+      size requirement, without having to refer to FIRST_TYPE.  */
+   if (!size_ok_p && expected_bits == orig_expected_bits)
+     {
+       error_at (location, "passing %qT to argument %d of %qE, which"
+ 		" expects a vector of %d-bit elements",
+ 		get_vector_type (actual_type), argno + 1, fndecl,
+ 		expected_bits);
+       return false;
+     }
+ 
+   /* Likewise for a fixed type class requirement.  This is only ever
+      needed for signed and unsigned types, so don't create unnecessary
+      translation work for other type classes.  */
+   if (!tclass_ok_p && orig_expected_tclass == TYPE_signed)
+     {
+       error_at (location, "passing %qT to argument %d of %qE, which"
+ 		" expects a vector of signed integers",
+ 		get_vector_type (actual_type), argno + 1, fndecl);
+       return false;
+     }
+   if (!tclass_ok_p && orig_expected_tclass == TYPE_unsigned)
+     {
+       error_at (location, "passing %qT to argument %d of %qE, which"
+ 		" expects a vector of unsigned integers",
+ 		get_vector_type (actual_type), argno + 1, fndecl);
+       return false;
+     }
+ 
+   /* Make sure that FIRST_TYPE itself is sensible before using it
+      as a basis for an error message.  */
+   if (resolve_to (mode_suffix_id, first_type) == error_mark_node)
+     return false;
+ 
+   /* If the arguments have consistent type classes, but a link between
+      the sizes has been broken, try to describe the error in those terms.  */
+   if (both_vectors_p && tclass_ok_p && orig_expected_bits == SAME_SIZE)
+     {
+       if (argno < first_argno)
+ 	{
+ 	  std::swap (argno, first_argno);
+ 	  std::swap (actual_type, first_type);
+ 	}
+       error_at (location, "arguments %d and %d of %qE must have the"
+ 		" same element size, but the values passed here have type"
+ 		" %qT and %qT respectively", first_argno + 1, argno + 1,
+ 		fndecl, get_vector_type (first_type),
+ 		get_vector_type (actual_type));
+       return false;
+     }
+ 
+   /* Likewise in reverse: look for cases in which the sizes are consistent
+      but a link between the type classes has been broken.  */
+   if (both_vectors_p
+       && size_ok_p
+       && orig_expected_tclass == SAME_TYPE_CLASS
+       && type_suffixes[first_type].integer_p
+       && type_suffixes[actual_type].integer_p)
+     {
+       if (argno < first_argno)
+ 	{
+ 	  std::swap (argno, first_argno);
+ 	  std::swap (actual_type, first_type);
+ 	}
+       error_at (location, "arguments %d and %d of %qE must have the"
+ 		" same signedness, but the values passed here have type"
+ 		" %qT and %qT respectively", first_argno + 1, argno + 1,
+ 		fndecl, get_vector_type (first_type),
+ 		get_vector_type (actual_type));
+       return false;
+     }
+ 
+   /* The two arguments are wildly inconsistent.  */
+   type_suffix_index expected_type
+     = find_type_suffix (expected_tclass, expected_bits);
+   error_at (location, "passing %qT instead of the expected %qT to argument"
+ 	    " %d of %qE, after passing %qT to argument %d",
+ 	    get_vector_type (actual_type), get_vector_type (expected_type),
+ 	    argno + 1, fndecl, get_argument_type (first_argno),
+ 	    first_argno + 1);
+   return false;
+ }
+ 
+ /* Require argument ARGNO to match argument FIRST_ARGNO, which was inferred
+    to be a pointer to a scalar element of type TYPE.  */
+ bool
+ function_resolver::require_matching_pointer_type (unsigned int argno,
+ 						  unsigned int first_argno,
+ 						  type_suffix_index type)
+ {
+   type_suffix_index new_type = infer_pointer_type (argno);
+   if (new_type == NUM_TYPE_SUFFIXES)
+     return false;
+ 
+   if (type != new_type)
+     {
+       error_at (location, "passing %qT to argument %d of %qE, but"
+ 		" argument %d had type %qT", get_argument_type (argno),
+ 		argno + 1, fndecl, first_argno + 1,
+ 		get_argument_type (first_argno));
+       return false;
+     }
+   return true;
+ }
+ 
+ /* Require argument ARGNO to be a (possibly variable) scalar, using EXPECTED
+    as the name of its expected type.  Return true if the argument has the
+    right form, otherwise report an appropriate error.  */
+ bool
+ function_resolver::require_scalar_type (unsigned int argno,
+ 					const char *expected)
+ {
+   if (!scalar_argument_p (argno))
+     {
+       error_at (location, "passing %qT to argument %d of %qE, which"
+ 		" expects %qs", get_argument_type (argno), argno + 1,
+ 		fndecl, expected);
+       return false;
+     }
+   return true;
+ }
+ 
+ /* Require argument ARGNO to be some form of pointer, without being specific
+    about its target type.  Return true if the argument has the right form,
+    otherwise report an appropriate error.  */
+ bool
+ function_resolver::require_pointer_type (unsigned int argno)
+ {
+   if (!scalar_argument_p (argno))
+     {
+       error_at (location, "passing %qT to argument %d of %qE, which"
+ 		" expects a scalar pointer", get_argument_type (argno),
+ 		argno + 1, fndecl);
+       return false;
+     }
+   return true;
+ }
+ 
+ /* Argument FIRST_ARGNO is a scalar with type EXPECTED_TYPE, and argument
+    ARGNO should be consistent with it.  Return true if it is, otherwise
+    report an appropriate error.  */
+ bool function_resolver::
+ require_matching_integer_scalar_type (unsigned int argno,
+ 				      unsigned int first_argno,
+ 				      type_suffix_index expected_type)
+ {
+   type_suffix_index actual_type = infer_integer_scalar_type (argno);
+   if (actual_type == NUM_TYPE_SUFFIXES)
+     return false;
+ 
+   if (actual_type == expected_type)
+     return true;
+ 
+   error_at (location, "call to %qE is ambiguous; argument %d has type"
+ 	    " %qs but argument %d has type %qs", fndecl,
+ 	    first_argno + 1, get_scalar_type_name (expected_type),
+ 	    argno + 1, get_scalar_type_name (actual_type));
+   return false;
+ }
+ 
+ /* Require argument ARGNO to be a (possibly variable) scalar, expecting it
+    to have the following properties:
+ 
+    - the type class must be the same as for type suffix 0 if EXPECTED_TCLASS
+      is SAME_TYPE_CLASS, otherwise it must be EXPECTED_TCLASS itself.
+ 
+    - the element size must be the same as for type suffix 0 if EXPECTED_BITS
+      is SAME_TYPE_SIZE, otherwise it must be EXPECTED_BITS itself.
+ 
+    Return true if the argument is valid, otherwise report an appropriate error.
+ 
+    Note that we don't check whether the scalar type actually has the required
+    properties, since that's subject to implicit promotions and conversions.
+    Instead we just use the expected properties to tune the error message.  */
+ bool function_resolver::
+ require_derived_scalar_type (unsigned int argno,
+ 			     type_class_index expected_tclass,
+ 			     unsigned int expected_bits)
+ {
+   gcc_assert (expected_tclass == SAME_TYPE_CLASS
+ 	      || expected_tclass == TYPE_signed
+ 	      || expected_tclass == TYPE_unsigned);
+ 
+   /* If the expected type doesn't depend on the type suffix at all,
+      just check for the fixed choice of scalar type.  */
+   if (expected_tclass != SAME_TYPE_CLASS && expected_bits != SAME_SIZE)
+     {
+       type_suffix_index expected_type
+ 	= find_type_suffix (expected_tclass, expected_bits);
+       return require_scalar_type (argno, get_scalar_type_name (expected_type));
+     }
+ 
+   if (scalar_argument_p (argno))
+     return true;
+ 
+   if (expected_tclass == SAME_TYPE_CLASS)
+     /* It doesn't really matter whether the element is expected to be
+        the same size as type suffix 0.  */
+     error_at (location, "passing %qT to argument %d of %qE, which"
+ 	      " expects a scalar element", get_argument_type (argno),
+ 	      argno + 1, fndecl);
+   else
+     /* It doesn't seem useful to distinguish between signed and unsigned
+        scalars here.  */
+     error_at (location, "passing %qT to argument %d of %qE, which"
+ 	      " expects a scalar integer", get_argument_type (argno),
+ 	      argno + 1, fndecl);
+   return false;
+ }
+ 
+ /* Require argument ARGNO to be suitable for an integer constant expression.
+    Return true if it is, otherwise report an appropriate error.
+ 
+    function_checker checks whether the argument is actually constant and
+    has a suitable range.  The reason for distinguishing immediate arguments
+    here is because it provides more consistent error messages than
+    require_scalar_type would.  */
+ bool
+ function_resolver::require_integer_immediate (unsigned int argno)
+ {
+   if (!scalar_argument_p (argno))
+     {
+       report_non_ice (location, fndecl, argno);
+       return false;
+     }
+   return true;
+ }
+ 
+ /* Require argument ARGNO to be a vector base in a gather-style address.
+    Return its type on success, otherwise return NUM_VECTOR_TYPES.  */
+ vector_type_index
+ function_resolver::infer_vector_base_type (unsigned int argno)
+ {
+   type_suffix_index type = infer_vector_type (argno);
+   if (type == NUM_TYPE_SUFFIXES)
+     return NUM_VECTOR_TYPES;
+ 
+   if (type == TYPE_SUFFIX_u32 || type == TYPE_SUFFIX_u64)
+     return type_suffixes[type].vector_type;
+ 
+   error_at (location, "passing %qT to argument %d of %qE, which"
+ 	    " expects %qs or %qs", get_argument_type (argno),
+ 	    argno + 1, fndecl, "svuint32_t", "svuint64_t");
+   return NUM_VECTOR_TYPES;
+ }
+ 
+ /* Require argument ARGNO to be a vector displacement in a gather-style
+    address.  Return its type on success, otherwise return NUM_VECTOR_TYPES.  */
+ vector_type_index
+ function_resolver::infer_vector_displacement_type (unsigned int argno)
+ {
+   type_suffix_index type = infer_integer_vector_type (argno);
+   if (type == NUM_TYPE_SUFFIXES)
+     return NUM_VECTOR_TYPES;
+ 
+   if (type_suffixes[type].integer_p
+       && (type_suffixes[type].element_bits == 32
+ 	  || type_suffixes[type].element_bits == 64))
+     return type_suffixes[type].vector_type;
+ 
+   error_at (location, "passing %qT to argument %d of %qE, which"
+ 	    " expects a vector of 32-bit or 64-bit integers",
+ 	    get_argument_type (argno), argno + 1, fndecl);
+   return NUM_VECTOR_TYPES;
+ }
+ 
+ /* Require argument ARGNO to be a vector displacement in a gather-style
+    address.  There are three possible uses:
+ 
+    - for loading into elements of type TYPE (when LOAD_P is true)
+    - for storing from elements of type TYPE (when LOAD_P is false)
+    - for prefetching data (when TYPE is NUM_TYPE_SUFFIXES)
+ 
+    The overloaded function's mode suffix determines the units of the
+    displacement (bytes for "_offset", elements for "_index").
+ 
+    Return the associated mode on success, otherwise report an error
+    and return MODE_none.  */
+ mode_suffix_index
+ function_resolver::resolve_sv_displacement (unsigned int argno,
+ 					    type_suffix_index type,
+ 					    bool load_p)
+ {
+   if (type == NUM_TYPE_SUFFIXES)
+     {
+       /* For prefetches, the base is a void pointer and the displacement
+ 	 can be any valid offset or index type.  */
+       vector_type_index displacement_vector_type
+ 	= infer_vector_displacement_type (argno);
+       if (displacement_vector_type == NUM_VECTOR_TYPES)
+ 	return MODE_none;
+ 
+       mode_suffix_index mode = find_mode_suffix (NUM_VECTOR_TYPES,
+ 						 displacement_vector_type,
+ 						 displacement_units ());
+       gcc_assert (mode != MODE_none);
+       return mode;
+     }
+ 
+   unsigned int required_bits = type_suffixes[type].element_bits;
+   if (required_bits == 32
+       && displacement_units () == UNITS_elements
+       && !lookup_form (MODE_s32index, type)
+       && !lookup_form (MODE_u32index, type))
+     {
+       if (lookup_form (MODE_u32base_index, type))
+ 	{
+ 	  if (type_suffix_ids[0] == NUM_TYPE_SUFFIXES)
+ 	    {
+ 	      gcc_assert (!load_p);
+ 	      error_at (location, "when storing %qT, %qE requires a vector"
+ 			" base and a scalar index", get_vector_type (type),
+ 			fndecl);
+ 	    }
+ 	  else
+ 	    error_at (location, "%qE requires a vector base and a scalar"
+ 		      " index", fndecl);
+ 	}
+       else
+ 	error_at (location, "%qE does not support 32-bit vector type %qT",
+ 		  fndecl, get_vector_type (type));
+       return MODE_none;
+     }
+ 
+   /* Check for some form of vector type, without naming any in particular
+      as being expected.  */
+   type_suffix_index displacement_type = infer_vector_type (argno);
+   if (displacement_type == NUM_TYPE_SUFFIXES)
+     return MODE_none;
+ 
+   /* If the displacement type is consistent with the data vector type,
+      try to find the associated mode suffix.  This will fall through
+      for non-integral displacement types.  */
+   if (type_suffixes[displacement_type].element_bits == required_bits)
+     {
+       vector_type_index displacement_vector_type
+ 	= type_suffixes[displacement_type].vector_type;
+       mode_suffix_index mode = find_mode_suffix (NUM_VECTOR_TYPES,
+ 						 displacement_vector_type,
+ 						 displacement_units ());
+       if (mode != MODE_none)
+ 	{
+ 	  if (mode == MODE_s32offset
+ 	      && !lookup_form (mode, type)
+ 	      && lookup_form (MODE_u32offset, type))
+ 	    {
+ 	      if (type_suffix_ids[0] == NUM_TYPE_SUFFIXES)
+ 		error_at (location, "%qE does not support 32-bit sign-extended"
+ 			  " offsets", fndecl);
+ 	      else
+ 		error_at (location, "%qE does not support sign-extended"
+ 			  " offsets", fndecl);
+ 	      return MODE_none;
+ 	    }
+ 	  return mode;
+ 	}
+     }
+ 
+   if (type_suffix_ids[0] == NUM_TYPE_SUFFIXES)
+     {
+       /* TYPE has been inferred rather than specified by the user,
+ 	 so mention it in the error messages.  */
+       if (load_p)
+ 	error_at (location, "passing %qT to argument %d of %qE, which when"
+ 		  " loading %qT expects a vector of %d-bit integers",
+ 		  get_argument_type (argno), argno + 1, fndecl,
+ 		  get_vector_type (type), required_bits);
+       else
+ 	error_at (location, "passing %qT to argument %d of %qE, which when"
+ 		  " storing %qT expects a vector of %d-bit integers",
+ 		  get_argument_type (argno), argno + 1, fndecl,
+ 		  get_vector_type (type), required_bits);
+     }
+   else
+     /* TYPE is part of the function name.  */
+     error_at (location, "passing %qT to argument %d of %qE, which"
+ 	      " expects a vector of %d-bit integers",
+ 	      get_argument_type (argno), argno + 1, fndecl, required_bits);
+   return MODE_none;
+ }
+ 
+ /* Require the arguments starting at ARGNO to form a gather-style address.
+    There are three possible uses:
+ 
+    - for loading into elements of type TYPE (when LOAD_P is true)
+    - for storing from elements of type TYPE (when LOAD_P is false)
+    - for prefetching data (when TYPE is NUM_TYPE_SUFFIXES)
+ 
+    The three possible addresses are:
+ 
+    - a vector base with no displacement
+    - a vector base and a scalar displacement
+    - a scalar (pointer) base and a vector displacement
+ 
+    The overloaded function's mode suffix determines whether there is
+    a displacement, and if so, what units it uses:
+ 
+    - MODE_none: no displacement
+    - MODE_offset: the displacement is measured in bytes
+    - MODE_index: the displacement is measured in elements
+ 
+    Return the mode of the non-overloaded function on success, otherwise
+    report an error and return MODE_none.  */
+ mode_suffix_index
+ function_resolver::resolve_gather_address (unsigned int argno,
+ 					   type_suffix_index type,
+ 					   bool load_p)
+ {
+   tree actual = get_argument_type (argno);
+   if (actual == error_mark_node)
+     return MODE_none;
+ 
+   if (displacement_units () != UNITS_none)
+     {
+       /* Some form of displacement is needed.  First handle a scalar
+ 	 pointer base and a vector displacement.  */
+       if (scalar_argument_p (argno))
+ 	/* Don't check the pointer type here, since there's only one valid
+ 	   choice.  Leave that to the frontend.  */
+ 	return resolve_sv_displacement (argno + 1, type, load_p);
+ 
+       if (!VECTOR_TYPE_P (actual))
+ 	{
+ 	  error_at (location, "passing %qT to argument %d of %qE,"
+ 		    " which expects a vector or pointer base address",
+ 		    actual, argno + 1, fndecl);
+ 	  return MODE_none;
+ 	}
+     }
+ 
+   /* Check for the correct choice of vector base type.  */
+   vector_type_index base_vector_type;
+   if (type == NUM_TYPE_SUFFIXES)
+     {
+       /* Since prefetches have no type suffix, there is a free choice
+ 	 between 32-bit and 64-bit base addresses.  */
+       base_vector_type = infer_vector_base_type (argno);
+       if (base_vector_type == NUM_VECTOR_TYPES)
+ 	return MODE_none;
+     }
+   else
+     {
+       /* Check for some form of vector type, without saying which type
+ 	 we expect.  */
+       type_suffix_index base_type = infer_vector_type (argno);
+       if (base_type == NUM_TYPE_SUFFIXES)
+ 	return MODE_none;
+ 
+       /* Check whether the type is the right one.  */
+       unsigned int required_bits = type_suffixes[type].element_bits;
+       gcc_assert (required_bits == 32 || required_bits == 64);
+       type_suffix_index required_type = (required_bits == 32
+ 					 ? TYPE_SUFFIX_u32
+ 					 : TYPE_SUFFIX_u64);
+       if (required_type != base_type)
+ 	{
+ 	  error_at (location, "passing %qT to argument %d of %qE,"
+ 		    " which expects %qT", actual, argno + 1, fndecl,
+ 		    get_vector_type (required_type));
+ 	  return MODE_none;
+ 	}
+       base_vector_type = type_suffixes[base_type].vector_type;
+     }
+ 
+   /* Check the scalar displacement, if any.  */
+   if (displacement_units () != UNITS_none
+       && !require_scalar_type (argno + 1, "int64_t"))
+     return MODE_none;
+ 
+   /* Find the appropriate mode suffix.  The checks above should have
+      weeded out all erroneous cases.  */
+   for (unsigned int mode_i = 0; mode_i < ARRAY_SIZE (mode_suffixes); ++mode_i)
+     {
+       const mode_suffix_info &mode = mode_suffixes[mode_i];
+       if (mode.base_vector_type == base_vector_type
+ 	  && mode.displacement_vector_type == NUM_VECTOR_TYPES
+ 	  && mode.displacement_units == displacement_units ())
+ 	return mode_suffix_index (mode_i);
+     }
+ 
+   gcc_unreachable ();
+ }
+ 
+ /* Require arguments ARGNO and ARGNO + 1 to form an ADR-style address,
+    i.e. one with a vector of base addresses and a vector of displacements.
+    The overloaded function's mode suffix determines the units of the
+    displacement (bytes for "_offset", elements for "_index").
+ 
+    Return the associated mode suffix on success, otherwise report
+    an error and return MODE_none.  */
+ mode_suffix_index
+ function_resolver::resolve_adr_address (unsigned int argno)
+ {
+   vector_type_index base_type = infer_vector_base_type (argno);
+   if (base_type == NUM_VECTOR_TYPES)
+     return MODE_none;
+ 
+   vector_type_index displacement_type
+     = infer_vector_displacement_type (argno + 1);
+   if (displacement_type == NUM_VECTOR_TYPES)
+     return MODE_none;
+ 
+   mode_suffix_index mode = find_mode_suffix (base_type, displacement_type,
+ 					     displacement_units ());
+   if (mode == MODE_none)
+     {
+       if (mode_suffix_id == MODE_offset)
+ 	error_at (location, "cannot combine a base of type %qT with"
+ 		  " an offset of type %qT",
+ 		  get_argument_type (argno), get_argument_type (argno + 1));
+       else
+ 	error_at (location, "cannot combine a base of type %qT with"
+ 		  " an index of type %qT",
+ 		  get_argument_type (argno), get_argument_type (argno + 1));
+     }
+   return mode;
+ }
+ 
+ /* Require the function to have exactly EXPECTED arguments.  Return true
+    if it does, otherwise report an appropriate error.  */
+ bool
+ function_resolver::check_num_arguments (unsigned int expected)
+ {
+   if (m_arglist.length () < expected)
+     error_at (location, "too few arguments to function %qE", fndecl);
+   else if (m_arglist.length () > expected)
+     error_at (location, "too many arguments to function %qE", fndecl);
+   return m_arglist.length () == expected;
+ }
+ 
+ /* If the function is predicated, check that the first argument is a
+    suitable governing predicate.  Also check that there are NOPS further
+    arguments after any governing predicate, but don't check what they are.
+ 
+    Return true on success, otherwise report a suitable error.
+    When returning true:
+ 
+    - set I to the number of the first unchecked argument.
+    - set NARGS to the total number of arguments.  */
+ bool
+ function_resolver::check_gp_argument (unsigned int nops,
+ 				      unsigned int &i, unsigned int &nargs)
+ {
+   i = 0;
+   if (pred != PRED_none)
+     {
+       /* Unary merge operations should use resolve_unary instead.  */
+       gcc_assert (nops != 1 || pred != PRED_m);
+       nargs = nops + 1;
+       if (!check_num_arguments (nargs)
+ 	  || !require_vector_type (i, VECTOR_TYPE_svbool_t))
+ 	return false;
+       i += 1;
+     }
+   else
+     {
+       nargs = nops;
+       if (!check_num_arguments (nargs))
+ 	return false;
+     }
+ 
+   return true;
+ }
+ 
+ /* Finish resolving a function whose final argument can be a vector
+    or a scalar, with the function having an implicit "_n" suffix
+    in the latter case.  This "_n" form might only exist for certain
+    type suffixes.
+ 
+    ARGNO is the index of the final argument.  The inferred type suffix
+    was obtained from argument FIRST_ARGNO, which has type FIRST_TYPE.
+    EXPECTED_TCLASS and EXPECTED_BITS describe the expected properties
+    of the final vector or scalar argument, in the same way as for
+    require_derived_vector_type.  INFERRED_TYPE is the inferred type
+    suffix itself, or NUM_TYPE_SUFFIXES if it's the same as FIRST_TYPE.
+ 
+    Return the function decl of the resolved function on success,
+    otherwise report a suitable error and return error_mark_node.  */
+ tree function_resolver::
+ finish_opt_n_resolution (unsigned int argno, unsigned int first_argno,
+ 			 type_suffix_index first_type,
+ 			 type_class_index expected_tclass,
+ 			 unsigned int expected_bits,
+ 			 type_suffix_index inferred_type)
+ {
+   if (inferred_type == NUM_TYPE_SUFFIXES)
+     inferred_type = first_type;
+   tree scalar_form = lookup_form (MODE_n, inferred_type);
+ 
+   /* Allow the final argument to be scalar, if an _n form exists.  */
+   if (scalar_argument_p (argno))
+     {
+       if (scalar_form)
+ 	return scalar_form;
+ 
+       /* Check the vector form normally.  If that succeeds, raise an
+ 	 error about having no corresponding _n form.  */
+       tree res = resolve_to (mode_suffix_id, inferred_type);
+       if (res != error_mark_node)
+ 	error_at (location, "passing %qT to argument %d of %qE, but its"
+ 		  " %qT form does not accept scalars",
+ 		  get_argument_type (argno), argno + 1, fndecl,
+ 		  get_vector_type (first_type));
+       return error_mark_node;
+     }
+ 
+   /* If an _n form does exist, provide a more accurate message than
+      require_derived_vector_type would for arguments that are neither
+      vectors nor scalars.  */
+   if (scalar_form && !require_vector_or_scalar_type (argno))
+     return error_mark_node;
+ 
+   /* Check for the correct vector type.  */
+   if (!require_derived_vector_type (argno, first_argno, first_type,
+ 				    expected_tclass, expected_bits))
+     return error_mark_node;
+ 
+   return resolve_to (mode_suffix_id, inferred_type);
+ }
+ 
+ /* Resolve a (possibly predicated) unary function.  If the function uses
+    merge predication or if TREAT_AS_MERGE_P is true, there is an extra
+    vector argument before the governing predicate that specifies the
+    values of inactive elements.  This argument has the following
+    properties:
+ 
+    - the type class must be the same as for active elements if MERGE_TCLASS
+      is SAME_TYPE_CLASS, otherwise it must be MERGE_TCLASS itself.
+ 
+    - the element size must be the same as for active elements if MERGE_BITS
+      is SAME_TYPE_SIZE, otherwise it must be MERGE_BITS itself.
+ 
+    Return the function decl of the resolved function on success,
+    otherwise report a suitable error and return error_mark_node.  */
+ tree
+ function_resolver::resolve_unary (type_class_index merge_tclass,
+ 				  unsigned int merge_bits,
+ 				  bool treat_as_merge_p)
+ {
+   type_suffix_index type;
+   if (pred == PRED_m || treat_as_merge_p)
+     {
+       if (!check_num_arguments (3))
+ 	return error_mark_node;
+       if (merge_tclass == SAME_TYPE_CLASS && merge_bits == SAME_SIZE)
+ 	{
+ 	  /* The inactive elements are the same as the active elements,
+ 	     so we can use normal left-to-right resolution.  */
+ 	  if ((type = infer_vector_type (0)) == NUM_TYPE_SUFFIXES
+ 	      || !require_vector_type (1, VECTOR_TYPE_svbool_t)
+ 	      || !require_matching_vector_type (2, type))
+ 	    return error_mark_node;
+ 	}
+       else
+ 	{
+ 	  /* The inactive element type is a function of the active one,
+ 	     so resolve the active one first.  */
+ 	  if (!require_vector_type (1, VECTOR_TYPE_svbool_t)
+ 	      || (type = infer_vector_type (2)) == NUM_TYPE_SUFFIXES
+ 	      || !require_derived_vector_type (0, 2, type, merge_tclass,
+ 					       merge_bits))
+ 	    return error_mark_node;
+ 	}
+     }
+   else
+     {
+       /* We just need to check the predicate (if any) and the single
+ 	 vector argument.  */
+       unsigned int i, nargs;
+       if (!check_gp_argument (1, i, nargs)
+ 	  || (type = infer_vector_type (i)) == NUM_TYPE_SUFFIXES)
+ 	return error_mark_node;
+     }
+ 
+   /* Handle convert-like functions in which the first type suffix is
+      explicit.  */
+   if (type_suffix_ids[0] != NUM_TYPE_SUFFIXES)
+     return resolve_to (mode_suffix_id, type_suffix_ids[0], type);
+ 
+   return resolve_to (mode_suffix_id, type);
+ }
+ 
+ /* Resolve a (possibly predicated) function that takes NOPS like-typed
+    vector arguments followed by NIMM integer immediates.  Return the
+    function decl of the resolved function on success, otherwise report
+    a suitable error and return error_mark_node.  */
+ tree
+ function_resolver::resolve_uniform (unsigned int nops, unsigned int nimm)
+ {
+   unsigned int i, nargs;
+   type_suffix_index type;
+   if (!check_gp_argument (nops + nimm, i, nargs)
+       || (type = infer_vector_type (i)) == NUM_TYPE_SUFFIXES)
+     return error_mark_node;
+ 
+   i += 1;
+   for (; i < nargs - nimm; ++i)
+     if (!require_matching_vector_type (i, type))
+       return error_mark_node;
+ 
+   for (; i < nargs; ++i)
+     if (!require_integer_immediate (i))
+       return error_mark_node;
+ 
+   return resolve_to (mode_suffix_id, type);
+ }
+ 
+ /* Resolve a (possibly predicated) function that offers a choice between
+    taking:
+ 
+    - NOPS like-typed vector arguments or
+    - NOPS - 1 like-typed vector arguments followed by a scalar argument
+ 
+    Return the function decl of the resolved function on success,
+    otherwise report a suitable error and return error_mark_node.  */
+ tree
+ function_resolver::resolve_uniform_opt_n (unsigned int nops)
+ {
+   unsigned int i, nargs;
+   type_suffix_index type;
+   if (!check_gp_argument (nops, i, nargs)
+       || (type = infer_vector_type (i)) == NUM_TYPE_SUFFIXES)
+     return error_mark_node;
+ 
+   unsigned int first_arg = i++;
+   for (; i < nargs - 1; ++i)
+     if (!require_matching_vector_type (i, type))
+       return error_mark_node;
+ 
+   return finish_opt_n_resolution (i, first_arg, type);
+ }
+ 
+ /* If the call is erroneous, report an appropriate error and return
+    error_mark_node.  Otherwise, if the function is overloaded, return
+    the decl of the non-overloaded function.  Return NULL_TREE otherwise,
+    indicating that the call should be processed in the normal way.  */
+ tree
+ function_resolver::resolve ()
+ {
+   return shape->resolve (*this);
+ }
+ 
+ function_checker::function_checker (location_t location,
+ 				    const function_instance &instance,
+ 				    tree fndecl, tree fntype,
+ 				    unsigned int nargs, tree *args)
+   : function_call_info (location, instance, fndecl),
+     m_fntype (fntype), m_nargs (nargs), m_args (args),
+     /* We don't have to worry about unary _m operations here, since they
+        never have arguments that need checking.  */
+     m_base_arg (pred != PRED_none ? 1 : 0)
+ {
+ }
+ 
+ /* Return true if argument ARGNO exists. which it might not for
+    erroneous calls.  It is safe to wave through checks if this
+    function returns false.  */
+ bool
+ function_checker::argument_exists_p (unsigned int argno)
+ {
+   gcc_assert (argno < (unsigned int) type_num_arguments (m_fntype));
+   return argno < m_nargs;
+ }
+ 
+ /* Check that argument ARGNO is an integer constant expression and
+    store its value in VALUE_OUT if so.  The caller should first
+    check that argument ARGNO exists.  */
+ bool
+ function_checker::require_immediate (unsigned int argno,
+ 				     HOST_WIDE_INT &value_out)
+ {
+   gcc_assert (argno < m_nargs);
+   tree arg = m_args[argno];
+ 
+   /* The type and range are unsigned, so read the argument as an
+      unsigned rather than signed HWI.  */
+   if (!tree_fits_uhwi_p (arg))
+     {
+       report_non_ice (location, fndecl, argno);
+       return false;
+     }
+ 
+   /* ...but treat VALUE_OUT as signed for error reporting, since printing
+      -1 is more user-friendly than the maximum uint64_t value.  */
+   value_out = tree_to_uhwi (arg);
+   return true;
+ }
+ 
+ /* Check that argument REL_ARGNO is an integer constant expression that
+    has the value VALUE0 or VALUE1.  REL_ARGNO counts from the end of the
+    predication arguments.  */
+ bool
+ function_checker::require_immediate_either_or (unsigned int rel_argno,
+ 					       HOST_WIDE_INT value0,
+ 					       HOST_WIDE_INT value1)
+ {
+   unsigned int argno = m_base_arg + rel_argno;
+   if (!argument_exists_p (argno))
+     return true;
+ 
+   HOST_WIDE_INT actual;
+   if (!require_immediate (argno, actual))
+     return false;
+ 
+   if (actual != value0 && actual != value1)
+     {
+       report_neither_nor (location, fndecl, argno, actual, 90, 270);
+       return false;
+     }
+ 
+   return true;
+ }
+ 
+ /* Check that argument REL_ARGNO is an integer constant expression that has
+    a valid value for enumeration type TYPE.  REL_ARGNO counts from the end
+    of the predication arguments.  */
+ bool
+ function_checker::require_immediate_enum (unsigned int rel_argno, tree type)
+ {
+   unsigned int argno = m_base_arg + rel_argno;
+   if (!argument_exists_p (argno))
+     return true;
+ 
+   HOST_WIDE_INT actual;
+   if (!require_immediate (argno, actual))
+     return false;
+ 
+   for (tree entry = TYPE_VALUES (type); entry; entry = TREE_CHAIN (entry))
+     {
+       /* The value is an INTEGER_CST for C and a CONST_DECL wrapper
+ 	 around an INTEGER_CST for C++.  */
+       tree value = TREE_VALUE (entry);
+       if (TREE_CODE (value) == CONST_DECL)
+ 	value = DECL_INITIAL (value);
+       if (wi::to_widest (value) == actual)
+ 	return true;
+     }
+ 
+   report_not_enum (location, fndecl, argno, actual, type);
+   return false;
+ }
+ 
+ /* Check that argument REL_ARGNO is suitable for indexing argument
+    REL_ARGNO - 1, in groups of GROUP_SIZE elements.  REL_ARGNO counts
+    from the end of the predication arguments.  */
+ bool
+ function_checker::require_immediate_lane_index (unsigned int rel_argno,
+ 						unsigned int group_size)
+ {
+   unsigned int argno = m_base_arg + rel_argno;
+   if (!argument_exists_p (argno))
+     return true;
+ 
+   /* Get the type of the previous argument.  tree_argument_type wants a
+      1-based number, whereas ARGNO is 0-based.  */
+   machine_mode mode = TYPE_MODE (type_argument_type (m_fntype, argno));
+   gcc_assert (VECTOR_MODE_P (mode));
+   unsigned int nlanes = 128 / (group_size * GET_MODE_UNIT_BITSIZE (mode));
+   return require_immediate_range (rel_argno, 0, nlanes - 1);
+ }
+ 
+ /* Check that argument REL_ARGNO is an integer constant expression that
+    has one of the given values.  */
+ bool
+ function_checker::require_immediate_one_of (unsigned int rel_argno,
+ 					    HOST_WIDE_INT value0,
+ 					    HOST_WIDE_INT value1,
+ 					    HOST_WIDE_INT value2,
+ 					    HOST_WIDE_INT value3)
+ {
+   unsigned int argno = m_base_arg + rel_argno;
+   if (!argument_exists_p (argno))
+     return true;
+ 
+   HOST_WIDE_INT actual;
+   if (!require_immediate (argno, actual))
+     return false;
+ 
+   if (actual != value0
+       && actual != value1
+       && actual != value2
+       && actual != value3)
+     {
+       report_not_one_of (location, fndecl, argno, actual,
+ 			 value0, value1, value2, value3);
+       return false;
+     }
+ 
+   return true;
+ }
+ 
+ /* Check that argument REL_ARGNO is an integer constant expression in the
+    range [MIN, MAX].  REL_ARGNO counts from the end of the predication
+    arguments.  */
+ bool
+ function_checker::require_immediate_range (unsigned int rel_argno,
+ 					   HOST_WIDE_INT min,
+ 					   HOST_WIDE_INT max)
+ {
+   unsigned int argno = m_base_arg + rel_argno;
+   if (!argument_exists_p (argno))
+     return true;
+ 
+   /* Required because of the tree_to_uhwi -> HOST_WIDE_INT conversion
+      in require_immediate.  */
+   gcc_assert (min >= 0 && min <= max);
+   HOST_WIDE_INT actual;
+   if (!require_immediate (argno, actual))
+     return false;
+ 
+   if (!IN_RANGE (actual, min, max))
+     {
+       report_out_of_range (location, fndecl, argno, actual, min, max);
+       return false;
+     }
+ 
+   return true;
+ }
+ 
+ /* Perform semantic checks on the call.  Return true if the call is valid,
+    otherwise report a suitable error.  */
+ bool
+ function_checker::check ()
+ {
+   function_args_iterator iter;
+   tree type;
+   unsigned int i = 0;
+   FOREACH_FUNCTION_ARGS (m_fntype, type, iter)
+     {
+       if (type == void_type_node || i >= m_nargs)
+ 	break;
+ 
+       if (i >= m_base_arg
+ 	  && TREE_CODE (type) == ENUMERAL_TYPE
+ 	  && !require_immediate_enum (i - m_base_arg, type))
+ 	return false;
+ 
+       i += 1;
+     }
+ 
+   return shape->check (*this);
+ }
+ 
+ gimple_folder::gimple_folder (const function_instance &instance, tree fndecl,
+ 			      gimple_stmt_iterator *gsi_in, gcall *call_in)
+   : function_call_info (gimple_location (call_in), instance, fndecl),
+     gsi (gsi_in), call (call_in), lhs (gimple_call_lhs (call_in))
+ {
+ }
+ 
+ /* VALUE might be a vector of type VECTYPE or a single scalar element.
+    Duplicate it into a vector of type VECTYPE in the latter case, adding any
+    new statements to STMTS.  */
+ tree
+ gimple_folder::force_vector (gimple_seq &stmts, tree vectype, tree value)
+ {
+   if (!VECTOR_TYPE_P (TREE_TYPE (value)))
+     value = gimple_build_vector_from_val (&stmts, vectype, value);
+   return value;
+ }
+ 
+ /* Convert predicate argument ARGNO so that it has the type appropriate for
+    an operation on VECTYPE.  Add any new statements to STMTS.  */
+ tree
+ gimple_folder::convert_pred (gimple_seq &stmts, tree vectype,
+ 			     unsigned int argno)
+ {
+   tree pred = gimple_call_arg (call, argno);
+   if (known_eq (TYPE_VECTOR_SUBPARTS (TREE_TYPE (pred)),
+ 		TYPE_VECTOR_SUBPARTS (vectype)))
+     return pred;
+ 
+   return gimple_build (&stmts, VIEW_CONVERT_EXPR,
+ 		       truth_type_for (vectype), pred);
+ }
+ 
+ /* Return a pointer to the address in a contiguous load or store,
+    given that each memory vector has type VECTYPE.  Add any new
+    statements to STMTS.  */
+ tree
+ gimple_folder::fold_contiguous_base (gimple_seq &stmts, tree vectype)
+ {
+   tree base = gimple_call_arg (call, 1);
+   if (mode_suffix_id == MODE_vnum)
+     {
+       tree offset = gimple_call_arg (call, 2);
+       offset = gimple_convert (&stmts, sizetype, offset);
+       offset = gimple_build (&stmts, MULT_EXPR, sizetype, offset,
+ 			     TYPE_SIZE_UNIT (vectype));
+       base = gimple_build (&stmts, POINTER_PLUS_EXPR, TREE_TYPE (base),
+ 			   base, offset);
+     }
+   return base;
+ }
+ 
+ /* Return the alignment and TBAA argument to an internal load or store
+    function like IFN_MASK_LOAD or IFN_MASK_STORE, given that it accesses
+    memory elements of type TYPE.  */
+ tree
+ gimple_folder::load_store_cookie (tree type)
+ {
+   return build_int_cst (build_pointer_type (type), TYPE_ALIGN_UNIT (type));
+ }
+ 
+ /* Fold the call to a call to INSTANCE, with the same arguments.  */
+ gimple *
+ gimple_folder::redirect_call (const function_instance &instance)
+ {
+   registered_function *rfn
+     = function_table->find_with_hash (instance, instance.hash ());
+   if (!rfn)
+     return NULL;
+ 
+   gimple_call_set_fndecl (call, rfn->decl);
+   return call;
+ }
+ 
+ /* Fold the call to a PTRUE, taking the element size from type suffix 0.  */
+ gimple *
+ gimple_folder::fold_to_ptrue ()
+ {
+   tree svbool_type = TREE_TYPE (lhs);
+   tree bool_type = TREE_TYPE (svbool_type);
+   unsigned int element_bytes = type_suffix (0).element_bytes;
+ 
+   /* The return type is svbool_t for all type suffixes, thus for b8 we
+      want { 1, 1, 1, 1, ... }, for b16 we want { 1, 0, 1, 0, ... }, etc.  */
+   tree_vector_builder builder (svbool_type, element_bytes, 1);
+   builder.quick_push (build_all_ones_cst (bool_type));
+   for (unsigned int i = 1; i < element_bytes; ++i)
+     builder.quick_push (build_zero_cst (bool_type));
+   return gimple_build_assign (lhs, builder.build ());
+ }
+ 
+ /* Fold the call to a PFALSE.  */
+ gimple *
+ gimple_folder::fold_to_pfalse ()
+ {
+   return gimple_build_assign (lhs, build_zero_cst (TREE_TYPE (lhs)));
+ }
+ 
+ /* Fold an operation to a constant predicate in which the first VL
+    elements are set and the rest are clear.  Take the element size
+    from type suffix 0.  */
+ gimple *
+ gimple_folder::fold_to_vl_pred (unsigned int vl)
+ {
+   tree vectype = TREE_TYPE (lhs);
+   tree element_type = TREE_TYPE (vectype);
+   tree minus_one = build_all_ones_cst (element_type);
+   tree zero = build_zero_cst (element_type);
+   unsigned int element_bytes = type_suffix (0).element_bytes;
+ 
+   /* Construct COUNT elements that contain the ptrue followed by
+      a repeating sequence of COUNT elements.  */
+   unsigned int count = constant_lower_bound (TYPE_VECTOR_SUBPARTS (vectype));
+   gcc_assert (vl * element_bytes <= count);
+   tree_vector_builder builder (vectype, count, 2);
+   for (unsigned int i = 0; i < count * 2; ++i)
+     {
+       bool bit = (i & (element_bytes - 1)) == 0 && i < vl * element_bytes;
+       builder.quick_push (bit ? minus_one : zero);
+     }
+   return gimple_build_assign (lhs, builder.build ());
+ }
+ 
+ /* Try to fold the call.  Return the new statement on success and null
+    on failure.  */
+ gimple *
+ gimple_folder::fold ()
+ {
+   /* Don't fold anything when SVE is disabled; emit an error during
+      expansion instead.  */
+   if (!TARGET_SVE)
+     return NULL;
+ 
+   /* Punt if the function has a return type and no result location is
+      provided.  The attributes should allow target-independent code to
+      remove the calls if appropriate.  */
+   if (!lhs && TREE_TYPE (gimple_call_fntype (call)) != void_type_node)
+     return NULL;
+ 
+   return base->fold (*this);
+ }
+ 
+ function_expander::function_expander (const function_instance &instance,
+ 				      tree fndecl, tree call_expr_in,
+ 				      rtx possible_target_in)
+   : function_call_info (EXPR_LOCATION (call_expr_in), instance, fndecl),
+     call_expr (call_expr_in), possible_target (possible_target_in)
+ {
+ }
+ 
+ /* Return the handler of direct optab OP for type suffix SUFFIX_I.  */
+ insn_code
+ function_expander::direct_optab_handler (optab op, unsigned int suffix_i)
+ {
+   return ::direct_optab_handler (op, vector_mode (suffix_i));
+ }
+ 
+ /* Choose between signed and unsigned direct optabs SIGNED_OP and
+    UNSIGNED_OP based on the signedness of type suffix SUFFIX_I, then
+    pick the appropriate optab handler for the mode.  Use MODE as the
+    mode if given, otherwise use the mode of type suffix SUFFIX_I.  */
+ insn_code
+ function_expander::direct_optab_handler_for_sign (optab signed_op,
+ 						  optab unsigned_op,
+ 						  unsigned int suffix_i,
+ 						  machine_mode mode)
+ {
+   if (mode == VOIDmode)
+     mode = vector_mode (suffix_i);
+   optab op = type_suffix (suffix_i).unsigned_p ? unsigned_op : signed_op;
+   return ::direct_optab_handler (op, mode);
+ }
+ 
+ /* Return true if X overlaps any input.  */
+ bool
+ function_expander::overlaps_input_p (rtx x)
+ {
+   for (unsigned int i = 0; i < args.length (); ++i)
+     if (reg_overlap_mentioned_p (x, args[i]))
+       return true;
+   return false;
+ }
+ 
+ /* Convert ptr_mode value X to Pmode.  */
+ rtx
+ function_expander::convert_to_pmode (rtx x)
+ {
+   if (ptr_mode == SImode)
+     x = simplify_gen_unary (ZERO_EXTEND, DImode, x, SImode);
+   return x;
+ }
+ 
+ /* Return the base address for a contiguous load or store function.
+    MEM_MODE is the mode of the addressed memory.  */
+ rtx
+ function_expander::get_contiguous_base (machine_mode mem_mode)
+ {
+   rtx base = convert_to_pmode (args[1]);
+   if (mode_suffix_id == MODE_vnum)
+     {
+       /* Use the size of the memory mode for extending loads and truncating
+ 	 stores.  Use the size of a full vector for non-extending loads
+ 	 and non-truncating stores (including svld[234] and svst[234]).  */
+       poly_int64 size = ordered_min (GET_MODE_SIZE (mem_mode),
+ 				     BYTES_PER_SVE_VECTOR);
+       rtx offset = gen_int_mode (size, Pmode);
+       offset = simplify_gen_binary (MULT, Pmode, args[2], offset);
+       base = simplify_gen_binary (PLUS, Pmode, base, offset);
+     }
+   return base;
+ }
+ 
+ /* For a function that does the equivalent of:
+ 
+      OUTPUT = COND ? FN (INPUTS) : FALLBACK;
+ 
+    return the value of FALLBACK.
+ 
+    MODE is the mode of OUTPUT.  NOPS is the number of operands in INPUTS.
+    MERGE_ARGNO is the argument that provides FALLBACK for _m functions,
+    or DEFAULT_MERGE_ARGNO if we should apply the usual rules.
+ 
+    ARGNO is the caller's index into args.  If the returned value is
+    argument 0 (as for unary _m operations), increment ARGNO past the
+    returned argument.  */
+ rtx
+ function_expander::get_fallback_value (machine_mode mode, unsigned int nops,
+ 				       unsigned int merge_argno,
+ 				       unsigned int &argno)
+ {
+   if (pred == PRED_z)
+     return CONST0_RTX (mode);
+ 
+   gcc_assert (pred == PRED_m || pred == PRED_x);
+   if (merge_argno == DEFAULT_MERGE_ARGNO)
+     merge_argno = nops == 1 && pred == PRED_m ? 0 : 1;
+ 
+   if (merge_argno == 0)
+     return args[argno++];
+ 
+   return args[merge_argno];
+ }
+ 
+ /* Return a REG rtx that can be used for the result of the function,
+    using the preferred target if suitable.  */
+ rtx
+ function_expander::get_reg_target ()
+ {
+   machine_mode target_mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (fndecl)));
+   if (!possible_target || GET_MODE (possible_target) != target_mode)
+     possible_target = gen_reg_rtx (target_mode);
+   return possible_target;
+ }
+ 
+ /* As for get_reg_target, but make sure that the returned REG does not
+    overlap any inputs.  */
+ rtx
+ function_expander::get_nonoverlapping_reg_target ()
+ {
+   if (possible_target && overlaps_input_p (possible_target))
+     possible_target = NULL_RTX;
+   return get_reg_target ();
+ }
+ 
+ /* Add an output operand to the instruction we're building, which has
+    code ICODE.  Bind the output to the preferred target rtx if possible.  */
+ void
+ function_expander::add_output_operand (insn_code icode)
+ {
+   unsigned int opno = m_ops.length ();
+   machine_mode mode = insn_data[icode].operand[opno].mode;
+   m_ops.safe_grow (opno + 1);
+   create_output_operand (&m_ops.last (), possible_target, mode);
+ }
+ 
+ /* Add an input operand to the instruction we're building, which has
+    code ICODE.  Calculate the value of the operand as follows:
+ 
+    - If the operand is a vector and X is not, broadcast X to fill a
+      vector of the appropriate mode.
+ 
+    - Otherwise, if the operand is a predicate, coerce X to have the
+      mode that the instruction expects.  In this case X is known to be
+      VNx16BImode (the mode of svbool_t).
+ 
+    - Otherwise use X directly.  The expand machinery checks that X has
+      the right mode for the instruction.  */
+ void
+ function_expander::add_input_operand (insn_code icode, rtx x)
+ {
+   unsigned int opno = m_ops.length ();
+   const insn_operand_data &operand = insn_data[icode].operand[opno];
+   machine_mode mode = operand.mode;
+   if (mode == VOIDmode)
+     {
+       /* The only allowable use of VOIDmode is the wildcard
+ 	 aarch64_any_register_operand, which is used to avoid
+ 	 combinatorial explosion in the reinterpret patterns.  */
+       gcc_assert (operand.predicate == aarch64_any_register_operand);
+       mode = GET_MODE (x);
+     }
+   else if (!VECTOR_MODE_P (GET_MODE (x)) && VECTOR_MODE_P (mode))
+     x = expand_vector_broadcast (mode, x);
+   else if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL)
+     {
+       gcc_assert (GET_MODE (x) == VNx16BImode);
+       x = gen_lowpart (mode, x);
+     }
+   m_ops.safe_grow (m_ops.length () + 1);
+   create_input_operand (&m_ops.last (), x, mode);
+ }
+ 
+ /* Add an integer operand with value X to the instruction.  */
+ void
+ function_expander::add_integer_operand (HOST_WIDE_INT x)
+ {
+   m_ops.safe_grow (m_ops.length () + 1);
+   create_integer_operand (&m_ops.last (), x);
+ }
+ 
+ /* Add a memory operand with mode MODE and address ADDR.  */
+ void
+ function_expander::add_mem_operand (machine_mode mode, rtx addr)
+ {
+   /* Exception for OImode for the ld1ro intrinsics.
+      They act on 256 bit octaword data, and it's just easier to use a scalar
+      mode to represent that than add a new vector mode solely for the purpose
+      of this intrinsic.  */
+   gcc_assert (VECTOR_MODE_P (mode) || mode == OImode);
+   rtx mem = gen_rtx_MEM (mode, memory_address (mode, addr));
+   /* The memory is only guaranteed to be element-aligned.  */
+   set_mem_align (mem, GET_MODE_ALIGNMENT (GET_MODE_INNER (mode)));
+   add_fixed_operand (mem);
+ }
+ 
+ /* Add an address operand with value X.  The static operand data says
+    what mode and form the address must have.  */
+ void
+ function_expander::add_address_operand (rtx x)
+ {
+   m_ops.safe_grow (m_ops.length () + 1);
+   create_address_operand (&m_ops.last (), x);
+ }
+ 
+ /* Add an operand that must be X.  The only way of legitimizing an
+    invalid X is to reload the address of a MEM.  */
+ void
+ function_expander::add_fixed_operand (rtx x)
+ {
+   m_ops.safe_grow (m_ops.length () + 1);
+   create_fixed_operand (&m_ops.last (), x);
+ }
+ 
+ /* Generate instruction ICODE, given that its operands have already
+    been added to M_OPS.  Return the value of the first operand.  */
+ rtx
+ function_expander::generate_insn (insn_code icode)
+ {
+   expand_insn (icode, m_ops.length (), m_ops.address ());
+   return function_returns_void_p () ? const0_rtx : m_ops[0].value;
+ }
+ 
+ /* Convert the arguments to a gather/scatter function into the
+    associated md operands.  Argument ARGNO is the scalar or vector base and
+    argument ARGNO + 1 is the scalar or vector displacement (if applicable).
+    The md pattern expects:
+ 
+    - a scalar base
+    - a vector displacement
+ 
+    If SCALED_P is true, it also expects:
+ 
+    - a const_int that is 1 if the displacement is zero-extended from 32 bits
+    - a scaling multiplier (1 for bytes, 2 for .h indices, etc.).
+ 
+    If SCALED_P is false, the displacement is implicitly zero-extended
+    and the scaling multiplier is implicitly 1.  */
+ void
+ function_expander::prepare_gather_address_operands (unsigned int argno,
+ 						    bool scaled_p)
+ {
+   machine_mode mem_mode = memory_vector_mode ();
+   tree vector_type = base_vector_type ();
+   units_index units = displacement_units ();
+   int shift_idx = -1;
+   if (units == UNITS_none)
+     {
+       /* Vector base, no displacement.  Convert to an integer zero base
+ 	 and a vector byte offset.  */
+       args.quick_insert (argno, const0_rtx);
+       units = UNITS_bytes;
+     }
+   else if (vector_type)
+     {
+       /* Vector base, scalar displacement.  Convert to a scalar base and
+ 	 a vector byte offset.  */
+       std::swap (args[argno], args[argno + 1]);
+       if (units == UNITS_elements)
+ 	shift_idx = argno;
+     }
+   else
+     {
+       /* Scalar base, vector displacement.  This is the order that the md
+ 	 pattern wants.  */
+       args[argno] = convert_to_pmode (args[argno]);
+       vector_type = displacement_vector_type ();
+       if (units == UNITS_elements && !scaled_p)
+ 	shift_idx = argno + 1;
+     }
+   tree scalar_displacement_type = TREE_TYPE (vector_type);
+ 
+   if (shift_idx >= 0)
+     {
+       machine_mode arg_mode = GET_MODE (args[shift_idx]);
+       if (arg_mode == VOIDmode)
+ 	arg_mode = DImode;
+       unsigned int elt_bytes = GET_MODE_UNIT_SIZE (mem_mode);
+       rtx shift = gen_int_mode (exact_log2 (elt_bytes), DImode);
+       args[shift_idx] = simplify_gen_binary (ASHIFT, arg_mode,
+ 					     args[shift_idx], shift);
+       units = UNITS_bytes;
+     }
+ 
+   bool uxtw_p = (TYPE_PRECISION (scalar_displacement_type) == 64
+ 		 || TYPE_UNSIGNED (scalar_displacement_type));
+   unsigned int scale = (units == UNITS_bytes
+ 			? 1 : GET_MODE_UNIT_SIZE (mem_mode));
+ 
+   if (scaled_p)
+     {
+       args.quick_insert (argno + 2, GEN_INT (uxtw_p));
+       args.quick_insert (argno + 3, GEN_INT (scale));
+     }
+   else
+     gcc_assert (uxtw_p && scale == 1);
+ }
+ 
+ /* The final argument is an immediate svprfop value.  Add two fake arguments
+    to represent the rw and locality operands of a PREFETCH rtx.  */
+ void
+ function_expander::prepare_prefetch_operands ()
+ {
+   unsigned int prfop = INTVAL (args.last ());
+   /* Bit 3 of the prfop selects stores over loads.  */
+   args.quick_push (GEN_INT ((prfop & 8) != 0));
+   /* Bits 1 and 2 specify the locality; 0-based for svprfop but
+      1-based for PREFETCH.  */
+   args.quick_push (GEN_INT (((prfop >> 1) & 3) + 1));
+ }
+ 
+ /* Add a dummy argument to indicate whether predicate argument ARGNO
+    is all-true when interpreted in mode PRED_MODE.  The hint goes
+    immediately after ARGNO.  */
+ void
+ function_expander::add_ptrue_hint (unsigned int argno, machine_mode pred_mode)
+ {
+   rtx pred = gen_lowpart (pred_mode, args[argno]);
+   int hint = (pred == CONSTM1_RTX (pred_mode)
+ 	      ? SVE_KNOWN_PTRUE : SVE_MAYBE_NOT_PTRUE);
+   args.quick_insert (argno + 1, gen_int_mode (hint, SImode));
+ }
+ 
+ /* Rotate inputs args[START:END] one position to the left, so that
+    args[START] becomes args[END - 1].  */
+ void
+ function_expander::rotate_inputs_left (unsigned int start, unsigned int end)
+ {
+   rtx new_last = args[start];
+   for (unsigned int i = start; i < end - 1; ++i)
+     args[i] = args[i + 1];
+   args[end - 1] = new_last;
+ }
+ 
+ /* Return true if the negation of argument ARGNO can be folded away,
+    replacing it with the negated value if so.  MODE is the associated
+    vector mode, but the argument could be a single element.  The main
+    case this handles is constant arguments.  */
+ bool
+ function_expander::try_negating_argument (unsigned int argno,
+ 					  machine_mode mode)
+ {
+   rtx x = args[argno];
+   if (!VECTOR_MODE_P (GET_MODE (x)))
+     mode = GET_MODE_INNER (mode);
+ 
+   x = simplify_unary_operation (NEG, mode, x, mode);
+   if (!x)
+     return false;
+ 
+   args[argno] = x;
+   return true;
+ }
+ 
+ /* Implement the call using instruction ICODE, with a 1:1 mapping between
+    arguments and input operands.  */
+ rtx
+ function_expander::use_exact_insn (insn_code icode)
+ {
+   unsigned int nops = insn_data[icode].n_operands;
+   if (!function_returns_void_p ())
+     {
+       add_output_operand (icode);
+       nops -= 1;
+     }
+   for (unsigned int i = 0; i < nops; ++i)
+     add_input_operand (icode, args[i]);
+   return generate_insn (icode);
+ }
+ 
+ /* Implement the call using instruction ICODE, which does not use a
+    governing predicate.  We must therefore drop the GP from an _x call.  */
+ rtx
+ function_expander::use_unpred_insn (insn_code icode)
+ {
+   /* We can't drop the predicate for _z and _m.  */
+   gcc_assert (pred == PRED_x || pred == PRED_none);
+   /* Discount the output operand.  */
+   unsigned int nops = insn_data[icode].n_operands - 1;
+   /* Drop the predicate argument in the case of _x predication.  */
+   unsigned int bias = (pred == PRED_x ? 1 : 0);
+   unsigned int i = 0;
+ 
+   add_output_operand (icode);
+   for (; i < nops; ++i)
+     add_input_operand (icode, args[i + bias]);
+ 
+   return generate_insn (icode);
+ }
+ 
+ /* Implement the call using instruction ICODE, which is a predicated
+    operation that returns arbitrary values for inactive lanes.  */
+ rtx
+ function_expander::use_pred_x_insn (insn_code icode)
+ {
+   /* At present we never need to handle PRED_none, which would involve
+      creating a new predicate rather than using one supplied by the user.  */
+   gcc_assert (pred == PRED_x);
+   /* Discount the output operand.  */
+   unsigned int nops = args.length () - 1;
+ 
+   bool has_float_operand_p = FLOAT_MODE_P (insn_data[icode].operand[0].mode);
+ 
+   /* Add the normal operands.  */
+   add_output_operand (icode);
+   add_input_operand (icode, args[0]);
+   for (unsigned int i = 0; i < nops; ++i)
+     {
+       add_input_operand (icode, args[i + 1]);
+       if (FLOAT_MODE_P (GET_MODE (args[i + 1])))
+ 	has_float_operand_p = true;
+     }
+ 
+   if (has_float_operand_p)
+     {
+       /* Add a flag that indicates whether unpredicated instructions
+ 	 are allowed.  */
+       rtx pred = m_ops[1].value;
+       if (flag_trapping_math && pred != CONST1_RTX (GET_MODE (pred)))
+ 	add_integer_operand (SVE_STRICT_GP);
+       else
+ 	add_integer_operand (SVE_RELAXED_GP);
+     }
+ 
+   return generate_insn (icode);
+ }
+ 
+ /* Implement the call using instruction ICODE, which does the equivalent of:
+ 
+      OUTPUT = COND ? FN (INPUTS) : FALLBACK;
+ 
+    The instruction operands are in the order above: OUTPUT, COND, INPUTS
+    and FALLBACK.  MERGE_ARGNO is the argument that provides FALLBACK for _m
+    functions, or DEFAULT_MERGE_ARGNO if we should apply the usual rules.  */
+ rtx
+ function_expander::use_cond_insn (insn_code icode, unsigned int merge_argno)
+ {
+   /* At present we never need to handle PRED_none, which would involve
+      creating a new predicate rather than using one supplied by the user.  */
+   gcc_assert (pred != PRED_none);
+   /* Discount the output, predicate and fallback value.  */
+   unsigned int nops = insn_data[icode].n_operands - 3;
+   machine_mode mode = insn_data[icode].operand[0].mode;
+ 
+   unsigned int opno = 0;
+   rtx fallback_arg = get_fallback_value (mode, nops, merge_argno, opno);
+   rtx pred = args[opno++];
+ 
+   add_output_operand (icode);
+   add_input_operand (icode, pred);
+   for (unsigned int i = 0; i < nops; ++i)
+     add_input_operand (icode, args[opno + i]);
+   add_input_operand (icode, fallback_arg);
+   return generate_insn (icode);
+ }
+ 
+ /* Implement the call using instruction ICODE, which is a select-like
+    operation with the following operands:
+ 
+    0: output
+    1: true value
+    2: false value
+    3: predicate
+ 
+    MERGE_ARGNO is the argument that provides the "false" value for _m
+    functions, or DEFAULT_MERGE_ARGNO if we should apply the usual rules.  */
+ rtx
+ function_expander::use_vcond_mask_insn (insn_code icode,
+ 					unsigned int merge_argno)
+ {
+   machine_mode mode = vector_mode (0);
+ 
+   unsigned int opno = 0;
+   rtx false_arg = get_fallback_value (mode, 1, merge_argno, opno);
+   rtx pred_arg = args[opno++];
+   rtx true_arg = args[opno++];
+ 
+   add_output_operand (icode);
+   add_input_operand (icode, true_arg);
+   add_input_operand (icode, false_arg);
+   add_input_operand (icode, pred_arg);
+   return generate_insn (icode);
+ }
+ 
+ /* Implement the call using instruction ICODE, which loads memory operand 1
+    into register operand 0 under the control of predicate operand 2.
+    Extending loads have a further predicate (operand 3) that nominally
+    controls the extension.  */
+ rtx
+ function_expander::use_contiguous_load_insn (insn_code icode)
+ {
+   machine_mode mem_mode = memory_vector_mode ();
+ 
+   add_output_operand (icode);
+   add_mem_operand (mem_mode, get_contiguous_base (mem_mode));
+   add_input_operand (icode, args[0]);
+   if (GET_MODE_UNIT_BITSIZE (mem_mode) < type_suffix (0).element_bits)
+     add_input_operand (icode, CONSTM1_RTX (VNx16BImode));
+   return generate_insn (icode);
+ }
+ 
+ /* Implement the call using instruction ICODE, which prefetches from
+    address operand 1 under the control of predicate operand 0.
+    Operands 2, 3 and 4 respectively specify the svprfop value,
+    the PREFETCH rw flag and the PREFETCH locality.  */
+ rtx
+ function_expander::use_contiguous_prefetch_insn (insn_code icode)
+ {
+   add_input_operand (icode, args[0]);
+   add_address_operand (get_contiguous_base (VNx16QImode));
+   for (unsigned int i = args.length () - 3; i < args.length (); ++i)
+     add_input_operand (icode, args[i]);
+   return generate_insn (icode);
+ }
+ 
+ /* Implement the call using instruction ICODE, which stores register operand 1
+    into memory operand 0 under the control of predicate operand 2.  */
+ rtx
+ function_expander::use_contiguous_store_insn (insn_code icode)
+ {
+   machine_mode mem_mode = memory_vector_mode ();
+ 
+   add_mem_operand (mem_mode, get_contiguous_base (mem_mode));
+   add_input_operand (icode, args.last ());
+   add_input_operand (icode, args[0]);
+   return generate_insn (icode);
+ }
+ 
+ /* Implement the call using one of the following strategies, chosen in order:
+ 
+    (1) "aarch64_pred_<optab><mode>_z" for PRED_z predicate functions
+ 
+    (2) "aarch64_pred_<optab><mode>" for PRED_x functions
+ 
+    (3) a normal unpredicated optab for PRED_none and PRED_x functions,
+        dropping the predicate in the latter case
+ 
+    (4) an unpredicated "aarch64_sve_<code_optab><mode>" for PRED_none and
+        PRED_x functions, again dropping the predicate for PRED_x
+ 
+    (5) "cond_<optab><mode>" otherwise
+ 
+    where <optab> corresponds to:
+ 
+    - CODE_FOR_SINT for signed integers
+    - CODE_FOR_UINT for unsigned integers
+    - UNSPEC_FOR_FP for floating-point values
+ 
+    and where <code_optab> is like <optab>, but uses CODE_FOR_SINT instead
+    of UNSPEC_FOR_FP for floating-point values.
+ 
+    MERGE_ARGNO is the argument that provides the values of inactive lanes for
+    _m functions, or DEFAULT_MERGE_ARGNO if we should apply the usual rules.  */
+ rtx
+ function_expander::map_to_rtx_codes (rtx_code code_for_sint,
+ 				     rtx_code code_for_uint,
+ 				     int unspec_for_fp,
+ 				     unsigned int merge_argno)
+ {
+   machine_mode mode = vector_mode (0);
+   rtx_code code = (type_suffix (0).unsigned_p ? code_for_uint : code_for_sint);
+   insn_code icode;
+ 
+   /* Handle predicate logic operations, which always use _z predication.  */
+   if (type_suffix (0).tclass == TYPE_bool)
+     {
+       gcc_assert (pred == PRED_z && code_for_uint == code_for_sint);
+       return use_exact_insn (code_for_aarch64_pred_z (code, mode));
+     }
+ 
+   /* First try using UNSPEC_PRED_X patterns for _x predication,
+      if available.  */
+   if (pred == PRED_x)
+     {
+       if (type_suffix (0).integer_p)
+ 	icode = maybe_code_for_aarch64_pred (code, mode);
+       else
+ 	icode = maybe_code_for_aarch64_pred (unspec_for_fp, mode);
+       if (icode != CODE_FOR_nothing)
+ 	return use_pred_x_insn (icode);
+     }
+ 
+   /* Otherwise expand PRED_none and PRED_x operations without a predicate.
+      Floating-point operations conventionally use the signed rtx code.  */
+   if (pred == PRED_none || pred == PRED_x)
+     {
+       icode = direct_optab_handler (code_to_optab (code), 0);
+       if (icode == CODE_FOR_nothing)
+ 	icode = code_for_aarch64_sve (code, mode);
+       return use_unpred_insn (icode);
+     }
+ 
+   /* Don't use cond_*_optabs here, since not all codes have one yet.  */
+   if (type_suffix (0).integer_p)
+     icode = code_for_cond (code, mode);
+   else
+     icode = code_for_cond (unspec_for_fp, mode);
+   return use_cond_insn (icode, merge_argno);
+ }
+ 
+ /* Implement the call using one of the following strategies, chosen in order:
+ 
+    (1) "aarch64_pred_<optab><mode>" for PRED_x functions; this is a
+        predicated pattern
+ 
+    (2) "aarch64_sve_<optab><mode>" for PRED_none and PRED_x functions;
+        this is an unpredicated pattern
+ 
+    (3) "cond_<optab><mode>" otherwise
+ 
+    where <optab> corresponds to:
+ 
+    - UNSPEC_FOR_SINT for signed integers
+    - UNSPEC_FOR_UINT for unsigned integers
+    - UNSPEC_FOR_FP for floating-point values
+ 
+    MERGE_ARGNO is the argument that provides the values of inactive lanes for
+    _m functions, or DEFAULT_MERGE_ARGNO if we should apply the usual rules.  */
+ rtx
+ function_expander::map_to_unspecs (int unspec_for_sint, int unspec_for_uint,
+ 				   int unspec_for_fp, unsigned int merge_argno)
+ {
+   machine_mode mode = vector_mode (0);
+   int unspec = (!type_suffix (0).integer_p ? unspec_for_fp
+ 		: type_suffix (0).unsigned_p ? unspec_for_uint
+ 		: unspec_for_sint);
+ 
+   if (pred == PRED_x)
+     {
+       insn_code icode = maybe_code_for_aarch64_pred (unspec, mode);
+       if (icode != CODE_FOR_nothing)
+ 	return use_pred_x_insn (icode);
+     }
+ 
+   if (pred == PRED_none || pred == PRED_x)
+     {
+       insn_code icode = maybe_code_for_aarch64_sve (unspec, mode);
+       if (icode != CODE_FOR_nothing)
+ 	return use_unpred_insn (icode);
+     }
+ 
+   insn_code icode = code_for_cond (unspec, vector_mode (0));
+   return use_cond_insn (icode, merge_argno);
+ }
+ 
+ /* Expand the call and return its lhs.  */
+ rtx
+ function_expander::expand ()
+ {
+   unsigned int nargs = call_expr_nargs (call_expr);
+   args.reserve (nargs);
+   for (unsigned int i = 0; i < nargs; ++i)
+     args.quick_push (expand_normal (CALL_EXPR_ARG (call_expr, i)));
+ 
+   return base->expand (*this);
+ }
+ 
+ /* Register the built-in SVE ABI types, such as __SVBool_t.  */
+ static void
+ register_builtin_types ()
+ {
+ #define DEF_SVE_TYPE(ACLE_NAME, NCHARS, ABI_NAME, SCALAR_TYPE) \
+   scalar_types[VECTOR_TYPE_ ## ACLE_NAME] = SCALAR_TYPE;
+ #include "aarch64-sve-builtins.def"
+ 
+   for (unsigned int i = 0; i < NUM_VECTOR_TYPES; ++i)
+     {
+       tree eltype = scalar_types[i];
+       tree vectype;
+       unsigned int num_zr = 0, num_pr = 0;
+       if (eltype == boolean_type_node)
+ 	{
+ 	  vectype = build_truth_vector_type_for_mode (BYTES_PER_SVE_VECTOR,
+ 						      VNx16BImode);
+ 	  gcc_assert (TYPE_MODE (vectype) == VNx16BImode
+ 		      && TYPE_MODE (vectype) == TYPE_MODE_RAW (vectype)
+ 		      && TYPE_ALIGN (vectype) == 16
+ 		      && known_eq (wi::to_poly_offset (TYPE_SIZE (vectype)),
+ 				   BYTES_PER_SVE_VECTOR));
+ 	  num_pr = 1;
+ 	}
+       else
+ 	{
+ 	  scalar_mode elmode = SCALAR_TYPE_MODE (eltype);
+ 	  unsigned int elbytes = GET_MODE_SIZE (elmode);
+ 	  poly_uint64 nunits = exact_div (BYTES_PER_SVE_VECTOR, elbytes);
+ 	  machine_mode mode
+ 	    = aarch64_sve_data_mode (elmode, nunits).require ();
+ 	  vectype = build_vector_type_for_mode (eltype, mode);
+ 	  gcc_assert (VECTOR_MODE_P (TYPE_MODE (vectype))
+ 		      && TYPE_MODE (vectype) == mode
+ 		      && TYPE_MODE_RAW (vectype) == mode
+ 		      && TYPE_ALIGN (vectype) == 128
+ 		      && known_eq (wi::to_poly_offset (TYPE_SIZE (vectype)),
+ 				   BITS_PER_SVE_VECTOR));
+ 	  num_zr = 1;
+ 	}
+       vectype = build_distinct_type_copy (vectype);
+       gcc_assert (vectype == TYPE_MAIN_VARIANT (vectype));
+       SET_TYPE_STRUCTURAL_EQUALITY (vectype);
+       TYPE_ARTIFICIAL (vectype) = 1;
+       TYPE_INDIVISIBLE_P (vectype) = 1;
+       add_sve_type_attribute (vectype, num_zr, num_pr,
+ 			      vector_types[i].mangled_name);
+       make_type_sizeless (vectype);
+       abi_vector_types[i] = vectype;
+       lang_hooks.types.register_builtin_type (vectype,
+ 					      vector_types[i].abi_name);
+     }
+ }
+ 
+ /* Initialize all compiler built-ins related to SVE that should be
+    defined at start-up.  */
+ void
+ init_builtins ()
+ {
+   sve_switcher sve;
+   register_builtin_types ();
+   if (in_lto_p)
+     handle_arm_sve_h ();
+ }
+ 
+ /* Register vector type TYPE under its arm_sve.h name.  */
+ static void
+ register_vector_type (vector_type_index type)
+ {
+   tree vectype = abi_vector_types[type];
+   tree id = get_identifier (vector_types[type].acle_name);
+   tree decl = build_decl (input_location, TYPE_DECL, id, vectype);
+   decl = lang_hooks.decls.pushdecl (decl);
+ 
+   /* Record the new ACLE type if pushdecl succeeded without error.  Use
+      the ABI type otherwise, so that the type we record at least has the
+      right form, even if it doesn't have the right name.  This should give
+      better error recovery behavior than installing error_mark_node or
+      installing an incorrect type.  */
+   if (decl
+       && TREE_CODE (decl) == TYPE_DECL
+       && TYPE_MAIN_VARIANT (TREE_TYPE (decl)) == vectype)
+     vectype = TREE_TYPE (decl);
+   acle_vector_types[0][type] = vectype;
+ }
+ 
+ /* Register the tuple type that contains NUM_VECTORS vectors of type TYPE.  */
+ static void
+ register_tuple_type (unsigned int num_vectors, vector_type_index type)
+ {
+   tree tuple_type = lang_hooks.types.make_type (RECORD_TYPE);
+ 
+   /* The contents of the type are opaque, so we can define them in any
+      way that maps to the correct ABI type.
+ 
+      Here we choose to use the same layout as for arm_neon.h, but with
+      "__val" instead of "val":
+ 
+ 	struct svfooxN_t { svfoo_t __val[N]; };
+ 
+      (It wouldn't be possible to write that directly in C or C++ for
+      sizeless types, but that's not a problem for this function.)
+ 
+      Using arrays simplifies the handling of svget and svset for variable
+      arguments.  */
+   tree vector_type = acle_vector_types[0][type];
+   tree array_type = build_array_type_nelts (vector_type, num_vectors);
+   gcc_assert (VECTOR_MODE_P (TYPE_MODE (array_type))
+ 	      && TYPE_MODE_RAW (array_type) == TYPE_MODE (array_type)
+ 	      && TYPE_ALIGN (array_type) == 128);
+ 
+   tree field = build_decl (input_location, FIELD_DECL,
+ 			   get_identifier ("__val"), array_type);
+   DECL_FIELD_CONTEXT (field) = tuple_type;
+   TYPE_FIELDS (tuple_type) = field;
+   add_sve_type_attribute (tuple_type, num_vectors, 0, NULL);
+   make_type_sizeless (tuple_type);
+   layout_type (tuple_type);
+   gcc_assert (VECTOR_MODE_P (TYPE_MODE (tuple_type))
+ 	      && TYPE_MODE_RAW (tuple_type) == TYPE_MODE (tuple_type)
+ 	      && TYPE_ALIGN (tuple_type) == 128);
+ 
+   /* Work out the structure name.  */
+   char buffer[sizeof ("svbfloat16x4_t")];
+   const char *vector_type_name = vector_types[type].acle_name;
+   snprintf (buffer, sizeof (buffer), "%.*sx%d_t",
+ 	    (int) strlen (vector_type_name) - 2, vector_type_name,
+ 	    num_vectors);
+ 
+   tree decl = build_decl (input_location, TYPE_DECL,
+ 			  get_identifier (buffer), tuple_type);
+   TYPE_NAME (tuple_type) = decl;
+   TYPE_STUB_DECL (tuple_type) = decl;
+   lang_hooks.decls.pushdecl (decl);
+   /* ??? Undo the effect of set_underlying_type for C.  The C frontend
+      doesn't recognize DECL as a built-in because (as intended) the decl has
+      a real location instead of BUILTINS_LOCATION.  The frontend therefore
+      treats the decl like a normal C "typedef struct foo foo;", expecting
+      the type for tag "struct foo" to have a dummy unnamed TYPE_DECL instead
+      of the named one we attached above.  It then sets DECL_ORIGINAL_TYPE
+      on the supposedly unnamed decl, creating a circularity that upsets
+      dwarf2out.
+ 
+      We don't want to follow the normal C model and create "struct foo"
+      tags for tuple types since (a) the types are supposed to be opaque
+      and (b) they couldn't be defined as a real struct anyway.  Treating
+      the TYPE_DECLs as "typedef struct foo foo;" without creating
+      "struct foo" would lead to confusing error messages.  */
+   DECL_ORIGINAL_TYPE (decl) = NULL_TREE;
+ 
+   acle_vector_types[num_vectors - 1][type] = tuple_type;
+ }
+ 
+ /* Register the svpattern enum.  */
+ static void
+ register_svpattern ()
+ {
+   auto_vec<string_int_pair, 32> values;
+ #define PUSH(UPPER, LOWER, VALUE) \
+     values.quick_push (string_int_pair ("SV_" #UPPER, VALUE));
+   AARCH64_FOR_SVPATTERN (PUSH)
+ #undef PUSH
+ 
+   acle_svpattern = lang_hooks.types.simulate_enum_decl (input_location,
+ 							"svpattern", values);
+ }
+ 
+ /* Register the svprfop enum.  */
+ static void
+ register_svprfop ()
+ {
+   auto_vec<string_int_pair, 16> values;
+ #define PUSH(UPPER, LOWER, VALUE) \
+     values.quick_push (string_int_pair ("SV_" #UPPER, VALUE));
+   AARCH64_FOR_SVPRFOP (PUSH)
+ #undef PUSH
+ 
+   acle_svprfop = lang_hooks.types.simulate_enum_decl (input_location,
+ 						      "svprfop", values);
+ }
+ 
+ /* Implement #pragma GCC aarch64 "arm_sve.h".  */
+ void
+ handle_arm_sve_h ()
+ {
+   if (function_table)
+     {
+       error ("duplicate definition of %qs", "arm_sve.h");
+       return;
+     }
+ 
+   sve_switcher sve;
+ 
+   /* Define the vector and tuple types.  */
+   for (unsigned int type_i = 0; type_i < NUM_VECTOR_TYPES; ++type_i)
+     {
+       vector_type_index type = vector_type_index (type_i);
+       register_vector_type (type);
+       if (type != VECTOR_TYPE_svbool_t)
+ 	for (unsigned int count = 2; count <= MAX_TUPLE_SIZE; ++count)
+ 	  register_tuple_type (count, type);
+     }
+ 
+   /* Define the enums.  */
+   register_svpattern ();
+   register_svprfop ();
+ 
+   /* Define the functions.  */
+   function_table = new hash_table<registered_function_hasher> (1023);
+   function_builder builder;
+   for (unsigned int i = 0; i < ARRAY_SIZE (function_groups); ++i)
+     builder.register_function_group (function_groups[i]);
+ }
+ 
+ /* Return the function decl with SVE function subcode CODE, or error_mark_node
+    if no such function exists.  */
+ tree
+ builtin_decl (unsigned int code, bool)
+ {
+   if (code >= vec_safe_length (registered_functions))
+     return error_mark_node;
+   return (*registered_functions)[code]->decl;
+ }
+ 
+ /* If we're implementing manual overloading, check whether the SVE
+    function with subcode CODE is overloaded, and if so attempt to
+    determine the corresponding non-overloaded function.  The call
+    occurs at location LOCATION and has the arguments given by ARGLIST.
+ 
+    If the call is erroneous, report an appropriate error and return
+    error_mark_node.  Otherwise, if the function is overloaded, return
+    the decl of the non-overloaded function.  Return NULL_TREE otherwise,
+    indicating that the call should be processed in the normal way.  */
+ tree
+ resolve_overloaded_builtin (location_t location, unsigned int code,
+ 			    vec<tree, va_gc> *arglist)
+ {
+   if (code >= vec_safe_length (registered_functions))
+     return NULL_TREE;
+ 
+   registered_function &rfn = *(*registered_functions)[code];
+   if (rfn.overloaded_p)
+     return function_resolver (location, rfn.instance, rfn.decl,
+ 			      *arglist).resolve ();
+   return NULL_TREE;
+ }
+ 
+ /* Perform any semantic checks needed for a call to the SVE function
+    with subcode CODE, such as testing for integer constant expressions.
+    The call occurs at location LOCATION and has NARGS arguments,
+    given by ARGS.  FNDECL is the original function decl, before
+    overload resolution.
+ 
+    Return true if the call is valid, otherwise report a suitable error.  */
+ bool
+ check_builtin_call (location_t location, vec<location_t>, unsigned int code,
+ 		    tree fndecl, unsigned int nargs, tree *args)
+ {
+   const registered_function &rfn = *(*registered_functions)[code];
+   if (!check_required_extensions (location, rfn.decl, rfn.required_extensions))
+     return false;
+   return function_checker (location, rfn.instance, fndecl,
+ 			   TREE_TYPE (rfn.decl), nargs, args).check ();
+ }
+ 
+ /* Attempt to fold STMT, given that it's a call to the SVE function
+    with subcode CODE.  Return the new statement on success and null
+    on failure.  Insert any other new statements at GSI.  */
+ gimple *
+ gimple_fold_builtin (unsigned int code, gimple_stmt_iterator *gsi, gcall *stmt)
+ {
+   registered_function &rfn = *(*registered_functions)[code];
+   return gimple_folder (rfn.instance, rfn.decl, gsi, stmt).fold ();
+ }
+ 
+ /* Expand a call to the SVE function with subcode CODE.  EXP is the call
+    expression and TARGET is the preferred location for the result.
+    Return the value of the lhs.  */
+ rtx
+ expand_builtin (unsigned int code, tree exp, rtx target)
+ {
+   registered_function &rfn = *(*registered_functions)[code];
+   if (!check_required_extensions (EXPR_LOCATION (exp), rfn.decl,
+ 				  rfn.required_extensions))
+     return target;
+   return function_expander (rfn.instance, rfn.decl, exp, target).expand ();
+ }
+ 
+ /* If TYPE is a built-in type defined by the SVE ABI, return the mangled name,
+    otherwise return NULL.  */
+ const char *
+ mangle_builtin_type (const_tree type)
+ {
+   /* ??? The C++ frontend normally strips qualifiers and attributes before
+      calling this hook, adding separate mangling for attributes that affect
+      type identity.  Fortunately the type copy will have the same TYPE_NAME
+      as the original, so we can get the attributes from there.  */
+   if (TYPE_NAME (type) && TREE_CODE (TYPE_NAME (type)) == TYPE_DECL)
+     type = TREE_TYPE (TYPE_NAME (type));
+   if (tree attr = lookup_sve_type_attribute (type))
+     if (tree id = TREE_VALUE (chain_index (2, TREE_VALUE (attr))))
+       return IDENTIFIER_POINTER (id);
+   return NULL;
+ }
+ 
+ /* Return true if TYPE is a built-in SVE type defined by the ABI or ACLE.  */
+ bool
+ builtin_type_p (const_tree type)
+ {
+   return lookup_sve_type_attribute (type);
+ }
+ 
+ /* Return true if TYPE is a built-in SVE type defined by the ABI or ACLE.
+    If so, store the number of constituent SVE vectors in *NUM_ZR and the
+    number of constituent SVE predicates in *NUM_PR.  */
+ bool
+ builtin_type_p (const_tree type, unsigned int *num_zr, unsigned int *num_pr)
+ {
+   if (tree attr = lookup_sve_type_attribute (type))
+     {
+       tree num_zr_node = TREE_VALUE (attr);
+       tree num_pr_node = TREE_CHAIN (num_zr_node);
+       *num_zr = tree_to_uhwi (TREE_VALUE (num_zr_node));
+       *num_pr = tree_to_uhwi (TREE_VALUE (num_pr_node));
+       return true;
+     }
+   return false;
+ }
+ 
+ /* An attribute callback for the "arm_sve_vector_bits" attribute.  */
+ tree
+ handle_arm_sve_vector_bits_attribute (tree *node, tree, tree args, int,
+ 				      bool *no_add_attrs)
+ {
+   *no_add_attrs = true;
+ 
+   tree type = *node;
+   if (!VECTOR_TYPE_P (type) || !builtin_type_p (type))
+     {
+       error ("%qs applied to non-SVE type %qT", "arm_sve_vector_bits", type);
+       return NULL_TREE;
+     }
+ 
+   tree size = TREE_VALUE (args);
+   if (TREE_CODE (size) != INTEGER_CST)
+     {
+       error ("%qs requires an integer constant expression",
+ 	     "arm_sve_vector_bits");
+       return NULL_TREE;
+     }
+ 
+   unsigned HOST_WIDE_INT value = tree_to_uhwi (size);
+   if (maybe_ne (value, BITS_PER_SVE_VECTOR))
+     {
+       warning (OPT_Wattributes, "unsupported SVE vector size");
+       return NULL_TREE;
+     }
+ 
+   /* FIXME: The type ought to be a distinct copy in all cases, but
+      currently that makes the C frontend reject conversions between
+      svbool_t and its fixed-length variants.  Using a type variant
+      avoids that but means that we treat some ambiguous combinations
+      as valid.  */
+   if (lang_GNU_C () && VECTOR_BOOLEAN_TYPE_P (type))
+     type = build_variant_type_copy (type);
+   else
+     type = build_distinct_type_copy (type);
+ 
+   /* The new type is a normal sized type; it doesn't have the same
+      restrictions as sizeless types.  */
+   TYPE_ATTRIBUTES (type)
+     = remove_attribute ("SVE sizeless type",
+ 			copy_list (TYPE_ATTRIBUTES (type)));
+ 
+   /* Allow the GNU vector extensions to be applied to vectors.
+      The extensions aren't yet defined for packed predicates,
+      so continue to treat them as abstract entities for now.  */
+   if (!VECTOR_BOOLEAN_TYPE_P (type))
+     TYPE_INDIVISIBLE_P (type) = 0;
+ 
+   *node = type;
+   return NULL_TREE;
+ }
+ 
+ /* Implement TARGET_VERIFY_TYPE_CONTEXT for SVE types.  */
+ bool
+ verify_type_context (location_t loc, type_context_kind context,
+ 		     const_tree type, bool silent_p)
+ {
+   if (!sizeless_type_p (type))
+     return true;
+ 
+   switch (context)
+     {
+     case TCTX_SIZEOF:
+     case TCTX_STATIC_STORAGE:
+       if (!silent_p)
+ 	error_at (loc, "SVE type %qT does not have a fixed size", type);
+       return false;
+ 
+     case TCTX_ALIGNOF:
+       if (!silent_p)
+ 	error_at (loc, "SVE type %qT does not have a defined alignment", type);
+       return false;
+ 
+     case TCTX_THREAD_STORAGE:
+       if (!silent_p)
+ 	error_at (loc, "variables of type %qT cannot have thread-local"
+ 		  " storage duration", type);
+       return false;
+ 
+     case TCTX_POINTER_ARITH:
+       if (!silent_p)
+ 	error_at (loc, "arithmetic on pointer to SVE type %qT", type);
+       return false;
+ 
+     case TCTX_FIELD:
+       if (silent_p)
+ 	;
+       else if (lang_GNU_CXX ())
+ 	error_at (loc, "member variables cannot have SVE type %qT", type);
+       else
+ 	error_at (loc, "fields cannot have SVE type %qT", type);
+       return false;
+ 
+     case TCTX_ARRAY_ELEMENT:
+       if (!silent_p)
+ 	error_at (loc, "array elements cannot have SVE type %qT", type);
+       return false;
+ 
+     case TCTX_ALLOCATION:
+       if (!silent_p)
+ 	error_at (loc, "cannot allocate objects with SVE type %qT", type);
+       return false;
+ 
+     case TCTX_DEALLOCATION:
+       if (!silent_p)
+ 	error_at (loc, "cannot delete objects with SVE type %qT", type);
+       return false;
+ 
+     case TCTX_EXCEPTIONS:
+       if (!silent_p)
+ 	error_at (loc, "cannot throw or catch SVE type %qT", type);
+       return false;
+ 
+     case TCTX_CAPTURE_BY_COPY:
+       if (!silent_p)
+ 	error_at (loc, "capture by copy of SVE type %qT", type);
+       return false;
+     }
+   gcc_unreachable ();
+ }
+ 
+ }
+ 
+ using namespace aarch64_sve;
+ 
+ inline void
+ gt_ggc_mx (function_instance *)
+ {
+ }
+ 
+ inline void
+ gt_pch_nx (function_instance *)
+ {
+ }
+ 
+ inline void
+ gt_pch_nx (function_instance *, void (*) (void *, void *), void *)
+ {
+ }
+ 
+ #include "gt-aarch64-sve-builtins.h"
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins.def gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins.def
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins.def	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins.def	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,104 ----
+ /* Builtin lists for AArch64 SVE
+    Copyright (C) 2018-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef DEF_SVE_MODE
+ #define DEF_SVE_MODE(A, B, C, D)
+ #endif
+ 
+ #ifndef DEF_SVE_TYPE
+ #define DEF_SVE_TYPE(A, B, C, D)
+ #endif
+ 
+ #ifndef DEF_SVE_TYPE_SUFFIX
+ #define DEF_SVE_TYPE_SUFFIX(A, B, C, D, E)
+ #endif
+ 
+ #ifndef DEF_SVE_FUNCTION
+ #define DEF_SVE_FUNCTION(A, B, C, D)
+ #endif
+ 
+ DEF_SVE_MODE (n, none, none, none)
+ DEF_SVE_MODE (index, none, none, elements)
+ DEF_SVE_MODE (offset, none, none, bytes)
+ DEF_SVE_MODE (s32index, none, svint32_t, elements)
+ DEF_SVE_MODE (s32offset, none, svint32_t, bytes)
+ DEF_SVE_MODE (s64index,  none, svint64_t, elements)
+ DEF_SVE_MODE (s64offset, none, svint64_t, bytes)
+ DEF_SVE_MODE (u32base, svuint32_t, none, none)
+ DEF_SVE_MODE (u32base_index, svuint32_t, none, elements)
+ DEF_SVE_MODE (u32base_offset, svuint32_t, none, bytes)
+ DEF_SVE_MODE (u32base_s32index, svuint32_t, svint32_t, elements)
+ DEF_SVE_MODE (u32base_s32offset, svuint32_t, svint32_t, bytes)
+ DEF_SVE_MODE (u32base_u32index, svuint32_t, svuint32_t, elements)
+ DEF_SVE_MODE (u32base_u32offset, svuint32_t, svuint32_t, bytes)
+ DEF_SVE_MODE (u32index, none, svuint32_t, elements)
+ DEF_SVE_MODE (u32offset, none, svuint32_t, bytes)
+ DEF_SVE_MODE (u64base, svuint64_t, none, none)
+ DEF_SVE_MODE (u64base_index, svuint64_t, none, elements)
+ DEF_SVE_MODE (u64base_offset, svuint64_t, none, bytes)
+ DEF_SVE_MODE (u64base_s64index, svuint64_t, svint64_t, elements)
+ DEF_SVE_MODE (u64base_s64offset, svuint64_t, svint64_t, bytes)
+ DEF_SVE_MODE (u64base_u64index, svuint64_t, svuint64_t, elements)
+ DEF_SVE_MODE (u64base_u64offset, svuint64_t, svuint64_t, bytes)
+ DEF_SVE_MODE (u64index, none, svuint64_t, elements)
+ DEF_SVE_MODE (u64offset, none, svuint64_t, bytes)
+ DEF_SVE_MODE (vnum, none, none, vectors)
+ 
+ DEF_SVE_TYPE (svbool_t, 10, __SVBool_t, boolean_type_node)
+ DEF_SVE_TYPE (svbfloat16_t, 14, __SVBfloat16_t, aarch64_bf16_type_node)
+ DEF_SVE_TYPE (svfloat16_t, 13, __SVFloat16_t, aarch64_fp16_type_node)
+ DEF_SVE_TYPE (svfloat32_t, 13, __SVFloat32_t, float_type_node)
+ DEF_SVE_TYPE (svfloat64_t, 13, __SVFloat64_t, double_type_node)
+ DEF_SVE_TYPE (svint8_t, 10, __SVInt8_t, get_typenode_from_name (INT8_TYPE))
+ DEF_SVE_TYPE (svint16_t, 11, __SVInt16_t, get_typenode_from_name (INT16_TYPE))
+ DEF_SVE_TYPE (svint32_t, 11, __SVInt32_t, get_typenode_from_name (INT32_TYPE))
+ DEF_SVE_TYPE (svint64_t, 11, __SVInt64_t, get_typenode_from_name (INT64_TYPE))
+ DEF_SVE_TYPE (svuint8_t, 11, __SVUint8_t, get_typenode_from_name (UINT8_TYPE))
+ DEF_SVE_TYPE (svuint16_t, 12, __SVUint16_t,
+ 	      get_typenode_from_name (UINT16_TYPE))
+ DEF_SVE_TYPE (svuint32_t, 12, __SVUint32_t,
+ 	      get_typenode_from_name (UINT32_TYPE))
+ DEF_SVE_TYPE (svuint64_t, 12, __SVUint64_t,
+ 	      get_typenode_from_name (UINT64_TYPE))
+ 
+ DEF_SVE_TYPE_SUFFIX (b, svbool_t, bool, 8, VNx16BImode)
+ DEF_SVE_TYPE_SUFFIX (b8, svbool_t, bool, 8, VNx16BImode)
+ DEF_SVE_TYPE_SUFFIX (b16, svbool_t, bool, 16, VNx8BImode)
+ DEF_SVE_TYPE_SUFFIX (b32, svbool_t, bool, 32, VNx4BImode)
+ DEF_SVE_TYPE_SUFFIX (b64, svbool_t, bool, 64, VNx2BImode)
+ DEF_SVE_TYPE_SUFFIX (bf16, svbfloat16_t, bfloat, 16, VNx8BFmode)
+ DEF_SVE_TYPE_SUFFIX (f16, svfloat16_t, float, 16, VNx8HFmode)
+ DEF_SVE_TYPE_SUFFIX (f32, svfloat32_t, float, 32, VNx4SFmode)
+ DEF_SVE_TYPE_SUFFIX (f64, svfloat64_t, float, 64, VNx2DFmode)
+ DEF_SVE_TYPE_SUFFIX (s8, svint8_t, signed, 8, VNx16QImode)
+ DEF_SVE_TYPE_SUFFIX (s16, svint16_t, signed, 16, VNx8HImode)
+ DEF_SVE_TYPE_SUFFIX (s32, svint32_t, signed, 32, VNx4SImode)
+ DEF_SVE_TYPE_SUFFIX (s64, svint64_t, signed, 64, VNx2DImode)
+ DEF_SVE_TYPE_SUFFIX (u8, svuint8_t, unsigned, 8, VNx16QImode)
+ DEF_SVE_TYPE_SUFFIX (u16, svuint16_t, unsigned, 16, VNx8HImode)
+ DEF_SVE_TYPE_SUFFIX (u32, svuint32_t, unsigned, 32, VNx4SImode)
+ DEF_SVE_TYPE_SUFFIX (u64, svuint64_t, unsigned, 64, VNx2DImode)
+ 
+ #include "aarch64-sve-builtins-base.def"
+ #include "aarch64-sve-builtins-sve2.def"
+ 
+ #undef DEF_SVE_FUNCTION
+ #undef DEF_SVE_TYPE_SUFFIX
+ #undef DEF_SVE_TYPE
+ #undef DEF_SVE_MODE
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins.h gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve-builtins.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve-builtins.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,880 ----
+ /* ACLE support for AArch64 SVE
+    Copyright (C) 2018-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_AARCH64_SVE_BUILTINS_H
+ #define GCC_AARCH64_SVE_BUILTINS_H
+ 
+ /* The full name of an SVE ACLE function is the concatenation of:
+ 
+    - the base name ("svadd", etc.)
+    - the "mode" suffix ("_n", "_index", etc.)
+    - the type suffixes ("_s32", "_b8", etc.)
+    - the predication suffix ("_x", "_z", etc.)
+ 
+    Each piece of information is individually useful, so we retain this
+    classification throughout:
+ 
+    - function_base represents the base name
+ 
+    - mode_suffix_index represents the mode suffix
+ 
+    - type_suffix_index represents individual type suffixes, while
+      type_suffix_pair represents a pair of them
+ 
+    - prediction_index extends the predication suffix with an additional
+      alternative: PRED_implicit for implicitly-predicated operations
+ 
+    In addition to its unique full name, a function may have a shorter
+    overloaded alias.  This alias removes pieces of the suffixes that
+    can be inferred from the arguments, such as by shortening the mode
+    suffix or dropping some of the type suffixes.  The base name and the
+    predication suffix stay the same.
+ 
+    The function_shape class describes what arguments a given function
+    takes and what its overloaded alias is called.  In broad terms,
+    function_base describes how the underlying instruction behaves while
+    function_shape describes how that instruction has been presented at
+    the language level.
+ 
+    The static list of functions uses function_group to describe a group
+    of related functions.  The function_builder class is responsible for
+    expanding this static description into a list of individual functions
+    and registering the associated built-in functions.  function_instance
+    describes one of these individual functions in terms of the properties
+    described above.
+ 
+    The classes involved in compiling a function call are:
+ 
+    - function_resolver, which resolves an overloaded function call to a
+      specific function_instance and its associated function decl
+ 
+    - function_checker, which checks whether the values of the arguments
+      conform to the ACLE specification
+ 
+    - gimple_folder, which tries to fold a function call at the gimple level
+ 
+    - function_expander, which expands a function call into rtl instructions
+ 
+    function_resolver and function_checker operate at the language level
+    and so are associated with the function_shape.  gimple_folder and
+    function_expander are concerned with the behavior of the function
+    and so are associated with the function_base.
+ 
+    Note that we've specifically chosen not to fold calls in the frontend,
+    since SVE intrinsics will hardly ever fold a useful language-level
+    constant.  */
+ namespace aarch64_sve
+ {
+ /* The maximum number of vectors in an ACLE tuple type.  */
+ const unsigned int MAX_TUPLE_SIZE = 4;
+ 
+ /* Used to represent the default merge argument index for _m functions.
+    The actual index depends on how many arguments the function takes.  */
+ const unsigned int DEFAULT_MERGE_ARGNO = ~0U;
+ 
+ /* Flags that describe what a function might do, in addition to reading
+    its arguments and returning a result.  */
+ const unsigned int CP_READ_FPCR = 1U << 0;
+ const unsigned int CP_RAISE_FP_EXCEPTIONS = 1U << 1;
+ const unsigned int CP_READ_MEMORY = 1U << 2;
+ const unsigned int CP_PREFETCH_MEMORY = 1U << 3;
+ const unsigned int CP_WRITE_MEMORY = 1U << 4;
+ const unsigned int CP_READ_FFR = 1U << 5;
+ const unsigned int CP_WRITE_FFR = 1U << 6;
+ 
+ /* Enumerates the SVE predicate and (data) vector types, together called
+    "vector types" for brevity.  */
+ enum vector_type_index
+ {
+ #define DEF_SVE_TYPE(ACLE_NAME, NCHARS, ABI_NAME, SCALAR_TYPE) \
+   VECTOR_TYPE_ ## ACLE_NAME,
+ #include "aarch64-sve-builtins.def"
+   NUM_VECTOR_TYPES
+ };
+ 
+ /* Classifies the available measurement units for an address displacement.  */
+ enum units_index
+ {
+   UNITS_none,
+   UNITS_bytes,
+   UNITS_elements,
+   UNITS_vectors
+ };
+ 
+ /* Describes the various uses of a governing predicate.  */
+ enum predication_index
+ {
+   /* No governing predicate is present.  */
+   PRED_none,
+ 
+   /* A governing predicate is present but there is no predication suffix
+      associated with it.  This is used when the result is neither a vector
+      nor a predicate, since the distinction between "zeroing" and "merging"
+      doesn't apply in that case.  It is also used when a suffix would be
+      redundant (such as for loads and comparisons, which are inherently
+      zeroing operations).  */
+   PRED_implicit,
+ 
+   /* Merging predication: copy inactive lanes from the first data argument
+      to the vector result.  */
+   PRED_m,
+ 
+   /* "Don't care" predication: set inactive lanes of the vector result
+      to arbitrary values.  */
+   PRED_x,
+ 
+   /* Zero predication: set inactive lanes of the vector result to zero.  */
+   PRED_z,
+ 
+   NUM_PREDS
+ };
+ 
+ /* Classifies element types, based on type suffixes with the bit count
+    removed.  */
+ enum type_class_index
+ {
+   TYPE_bool,
+   TYPE_bfloat,
+   TYPE_float,
+   TYPE_signed,
+   TYPE_unsigned,
+   NUM_TYPE_CLASSES
+ };
+ 
+ /* Classifies an operation into "modes"; for example, to distinguish
+    vector-scalar operations from vector-vector operations, or to
+    distinguish between different addressing modes.  This classification
+    accounts for the function suffixes that occur between the base name
+    and the first type suffix.  */
+ enum mode_suffix_index
+ {
+ #define DEF_SVE_MODE(NAME, BASE, DISPLACEMENT, UNITS) MODE_##NAME,
+ #include "aarch64-sve-builtins.def"
+   MODE_none
+ };
+ 
+ /* Enumerates the possible type suffixes.  Each suffix is associated with
+    a vector type, but for predicates provides extra information about the
+    element size.  */
+ enum type_suffix_index
+ {
+ #define DEF_SVE_TYPE_SUFFIX(NAME, ACLE_TYPE, CLASS, BITS, MODE) \
+   TYPE_SUFFIX_ ## NAME,
+ #include "aarch64-sve-builtins.def"
+   NUM_TYPE_SUFFIXES
+ };
+ 
+ /* Combines two type suffixes.  */
+ typedef enum type_suffix_index type_suffix_pair[2];
+ 
+ class function_base;
+ class function_shape;
+ 
+ /* Static information about a mode suffix.  */
+ struct mode_suffix_info
+ {
+   /* The suffix string itself.  */
+   const char *string;
+ 
+   /* The type of the vector base address, or NUM_VECTOR_TYPES if the
+      mode does not include a vector base address.  */
+   vector_type_index base_vector_type;
+ 
+   /* The type of the vector displacement, or NUM_VECTOR_TYPES if the
+      mode does not include a vector displacement.  (Note that scalar
+      displacements are always int64_t.)  */
+   vector_type_index displacement_vector_type;
+ 
+   /* The units in which the vector or scalar displacement is measured,
+      or UNITS_none if the mode doesn't take a displacement.  */
+   units_index displacement_units;
+ };
+ 
+ /* Static information about a type suffix.  */
+ struct type_suffix_info
+ {
+   /* The suffix string itself.  */
+   const char *string;
+ 
+   /* The associated ACLE vector or predicate type.  */
+   vector_type_index vector_type : 8;
+ 
+   /* What kind of type the suffix represents.  */
+   type_class_index tclass : 8;
+ 
+   /* The number of bits and bytes in an element.  For predicates this
+      measures the associated data elements.  */
+   unsigned int element_bits : 8;
+   unsigned int element_bytes : 8;
+ 
+   /* True if the suffix is for an integer type.  */
+   unsigned int integer_p : 1;
+   /* True if the suffix is for an unsigned type.  */
+   unsigned int unsigned_p : 1;
+   /* True if the suffix is for a floating-point type.  */
+   unsigned int float_p : 1;
+   /* True if the suffix is for a boolean type.  */
+   unsigned int bool_p : 1;
+   unsigned int spare : 12;
+ 
+   /* The associated vector or predicate mode.  */
+   machine_mode vector_mode : 16;
+ };
+ 
+ /* Static information about a set of functions.  */
+ struct function_group_info
+ {
+   /* The base name, as a string.  */
+   const char *base_name;
+ 
+   /* Describes the behavior associated with the function base name.  */
+   const function_base *const *base;
+ 
+   /* The shape of the functions, as described above the class definition.
+      It's possible to have entries with the same base name but different
+      shapes.  */
+   const function_shape *const *shape;
+ 
+   /* A list of the available type suffixes, and of the available predication
+      types.  The function supports every combination of the two.
+ 
+      The list of type suffixes is terminated by two NUM_TYPE_SUFFIXES
+      while the list of predication types is terminated by NUM_PREDS.
+      The list of type suffixes is lexicographically ordered based
+      on the index value.  */
+   const type_suffix_pair *types;
+   const predication_index *preds;
+ 
+   /* The architecture extensions that the functions require, as a set of
+      AARCH64_FL_* flags.  */
+   uint64_t required_extensions;
+ };
+ 
+ /* Describes a single fully-resolved function (i.e. one that has a
+    unique full name).  */
+ class GTY((user)) function_instance
+ {
+ public:
+   function_instance (const char *, const function_base *,
+ 		     const function_shape *, mode_suffix_index,
+ 		     const type_suffix_pair &, predication_index);
+ 
+   bool operator== (const function_instance &) const;
+   bool operator!= (const function_instance &) const;
+   hashval_t hash () const;
+ 
+   unsigned int call_properties () const;
+   bool reads_global_state_p () const;
+   bool modifies_global_state_p () const;
+   bool could_trap_p () const;
+ 
+   unsigned int vectors_per_tuple () const;
+   tree memory_scalar_type () const;
+   machine_mode memory_vector_mode () const;
+ 
+   const mode_suffix_info &mode_suffix () const;
+   tree base_vector_type () const;
+   tree displacement_vector_type () const;
+   units_index displacement_units () const;
+ 
+   const type_suffix_info &type_suffix (unsigned int) const;
+   tree scalar_type (unsigned int) const;
+   tree vector_type (unsigned int) const;
+   tree tuple_type (unsigned int) const;
+   unsigned int elements_per_vq (unsigned int i) const;
+   machine_mode vector_mode (unsigned int) const;
+   machine_mode gp_mode (unsigned int) const;
+ 
+   /* The properties of the function.  (The explicit "enum"s are required
+      for gengtype.)  */
+   const char *base_name;
+   const function_base *base;
+   const function_shape *shape;
+   enum mode_suffix_index mode_suffix_id;
+   type_suffix_pair type_suffix_ids;
+   enum predication_index pred;
+ };
+ 
+ class registered_function;
+ 
+ /* A class for building and registering function decls.  */
+ class function_builder
+ {
+ public:
+   function_builder ();
+   ~function_builder ();
+ 
+   void add_unique_function (const function_instance &, tree,
+ 			    vec<tree> &, uint64_t, bool);
+   void add_overloaded_function (const function_instance &, uint64_t);
+   void add_overloaded_functions (const function_group_info &,
+ 				 mode_suffix_index);
+ 
+   void register_function_group (const function_group_info &);
+ 
+ private:
+   void append_name (const char *);
+   char *finish_name ();
+ 
+   char *get_name (const function_instance &, bool);
+ 
+   tree get_attributes (const function_instance &);
+ 
+   registered_function &add_function (const function_instance &,
+ 				     const char *, tree, tree, uint64_t, bool);
+ 
+   /* The function type to use for functions that are resolved by
+      function_resolver.  */
+   tree m_overload_type;
+ 
+   /* True if we should create a separate decl for each instance of an
+      overloaded function, instead of using function_resolver.  */
+   bool m_direct_overloads;
+ 
+   /* Used for building up function names.  */
+   obstack m_string_obstack;
+ 
+   /* Maps all overloaded function names that we've registered so far
+      to their associated function_instances.  */
+   hash_map<nofree_string_hash, registered_function *> m_overload_names;
+ };
+ 
+ /* A base class for handling calls to built-in functions.  */
+ class function_call_info : public function_instance
+ {
+ public:
+   function_call_info (location_t, const function_instance &, tree);
+ 
+   bool function_returns_void_p ();
+ 
+   /* The location of the call.  */
+   location_t location;
+ 
+   /* The FUNCTION_DECL that is being called.  */
+   tree fndecl;
+ };
+ 
+ /* A class for resolving an overloaded function call.  */
+ class function_resolver : public function_call_info
+ {
+ public:
+   enum { SAME_SIZE = 256, HALF_SIZE, QUARTER_SIZE };
+   static const type_class_index SAME_TYPE_CLASS = NUM_TYPE_CLASSES;
+ 
+   function_resolver (location_t, const function_instance &, tree,
+ 		     vec<tree, va_gc> &);
+ 
+   tree get_vector_type (type_suffix_index);
+   const char *get_scalar_type_name (type_suffix_index);
+   tree get_argument_type (unsigned int);
+   bool scalar_argument_p (unsigned int);
+ 
+   tree report_no_such_form (type_suffix_index);
+   tree lookup_form (mode_suffix_index,
+ 		    type_suffix_index = NUM_TYPE_SUFFIXES,
+ 		    type_suffix_index = NUM_TYPE_SUFFIXES);
+   tree resolve_to (mode_suffix_index,
+ 		   type_suffix_index = NUM_TYPE_SUFFIXES,
+ 		   type_suffix_index = NUM_TYPE_SUFFIXES);
+ 
+   type_suffix_index infer_integer_scalar_type (unsigned int);
+   type_suffix_index infer_pointer_type (unsigned int, bool = false);
+   type_suffix_index infer_vector_or_tuple_type (unsigned int, unsigned int);
+   type_suffix_index infer_vector_type (unsigned int);
+   type_suffix_index infer_integer_vector_type (unsigned int);
+   type_suffix_index infer_unsigned_vector_type (unsigned int);
+   type_suffix_index infer_sd_vector_type (unsigned int);
+   type_suffix_index infer_tuple_type (unsigned int);
+ 
+   bool require_vector_or_scalar_type (unsigned int);
+ 
+   bool require_vector_type (unsigned int, vector_type_index);
+   bool require_matching_vector_type (unsigned int, type_suffix_index);
+   bool require_derived_vector_type (unsigned int, unsigned int,
+ 				    type_suffix_index,
+ 				    type_class_index = SAME_TYPE_CLASS,
+ 				    unsigned int = SAME_SIZE);
+ 
+   bool require_scalar_type (unsigned int, const char *);
+   bool require_pointer_type (unsigned int);
+   bool require_matching_integer_scalar_type (unsigned int, unsigned int,
+ 					     type_suffix_index);
+   bool require_derived_scalar_type (unsigned int, type_class_index,
+ 				    unsigned int = SAME_SIZE);
+   bool require_matching_pointer_type (unsigned int, unsigned int,
+ 				      type_suffix_index);
+   bool require_integer_immediate (unsigned int);
+ 
+   vector_type_index infer_vector_base_type (unsigned int);
+   vector_type_index infer_vector_displacement_type (unsigned int);
+ 
+   mode_suffix_index resolve_sv_displacement (unsigned int,
+ 					     type_suffix_index, bool);
+   mode_suffix_index resolve_gather_address (unsigned int,
+ 					    type_suffix_index, bool);
+   mode_suffix_index resolve_adr_address (unsigned int);
+ 
+   bool check_num_arguments (unsigned int);
+   bool check_gp_argument (unsigned int, unsigned int &, unsigned int &);
+   tree resolve_unary (type_class_index = SAME_TYPE_CLASS,
+ 		      unsigned int = SAME_SIZE, bool = false);
+   tree resolve_uniform (unsigned int, unsigned int = 0);
+   tree resolve_uniform_opt_n (unsigned int);
+   tree finish_opt_n_resolution (unsigned int, unsigned int, type_suffix_index,
+ 				type_class_index = SAME_TYPE_CLASS,
+ 				unsigned int = SAME_SIZE,
+ 				type_suffix_index = NUM_TYPE_SUFFIXES);
+ 
+   tree resolve ();
+ 
+ private:
+   /* The arguments to the overloaded function.  */
+   vec<tree, va_gc> &m_arglist;
+ };
+ 
+ /* A class for checking that the semantic constraints on a function call are
+    satisfied, such as arguments being integer constant expressions with
+    a particular range.  The parent class's FNDECL is the decl that was
+    called in the original source, before overload resolution.  */
+ class function_checker : public function_call_info
+ {
+ public:
+   function_checker (location_t, const function_instance &, tree,
+ 		    tree, unsigned int, tree *);
+ 
+   bool require_immediate_either_or (unsigned int, HOST_WIDE_INT,
+ 				    HOST_WIDE_INT);
+   bool require_immediate_enum (unsigned int, tree);
+   bool require_immediate_lane_index (unsigned int, unsigned int = 1);
+   bool require_immediate_one_of (unsigned int, HOST_WIDE_INT, HOST_WIDE_INT,
+ 				 HOST_WIDE_INT, HOST_WIDE_INT);
+   bool require_immediate_range (unsigned int, HOST_WIDE_INT, HOST_WIDE_INT);
+ 
+   bool check ();
+ 
+ private:
+   bool argument_exists_p (unsigned int);
+ 
+   bool require_immediate (unsigned int, HOST_WIDE_INT &);
+ 
+   /* The type of the resolved function.  */
+   tree m_fntype;
+ 
+   /* The arguments to the function.  */
+   unsigned int m_nargs;
+   tree *m_args;
+ 
+   /* The first argument not associated with the function's predication
+      type.  */
+   unsigned int m_base_arg;
+ };
+ 
+ /* A class for folding a gimple function call.  */
+ class gimple_folder : public function_call_info
+ {
+ public:
+   gimple_folder (const function_instance &, tree,
+ 		 gimple_stmt_iterator *, gcall *);
+ 
+   tree force_vector (gimple_seq &, tree, tree);
+   tree convert_pred (gimple_seq &, tree, unsigned int);
+   tree fold_contiguous_base (gimple_seq &, tree);
+   tree load_store_cookie (tree);
+ 
+   gimple *redirect_call (const function_instance &);
+   gimple *fold_to_pfalse ();
+   gimple *fold_to_ptrue ();
+   gimple *fold_to_vl_pred (unsigned int);
+ 
+   gimple *fold ();
+ 
+   /* Where to insert extra statements that feed the final replacement.  */
+   gimple_stmt_iterator *gsi;
+ 
+   /* The call we're folding.  */
+   gcall *call;
+ 
+   /* The result of the call, or null if none.  */
+   tree lhs;
+ };
+ 
+ /* A class for expanding a function call into RTL.  */
+ class function_expander : public function_call_info
+ {
+ public:
+   function_expander (const function_instance &, tree, tree, rtx);
+   rtx expand ();
+ 
+   insn_code direct_optab_handler (optab, unsigned int = 0);
+   insn_code direct_optab_handler_for_sign (optab, optab, unsigned int = 0,
+ 					   machine_mode = E_VOIDmode);
+ 
+   bool overlaps_input_p (rtx);
+ 
+   rtx convert_to_pmode (rtx);
+   rtx get_contiguous_base (machine_mode);
+   rtx get_fallback_value (machine_mode, unsigned int,
+ 			  unsigned int, unsigned int &);
+   rtx get_reg_target ();
+   rtx get_nonoverlapping_reg_target ();
+ 
+   void add_output_operand (insn_code);
+   void add_input_operand (insn_code, rtx);
+   void add_integer_operand (HOST_WIDE_INT);
+   void add_mem_operand (machine_mode, rtx);
+   void add_address_operand (rtx);
+   void add_fixed_operand (rtx);
+   rtx generate_insn (insn_code);
+ 
+   void prepare_gather_address_operands (unsigned int, bool = true);
+   void prepare_prefetch_operands ();
+   void add_ptrue_hint (unsigned int, machine_mode);
+   void rotate_inputs_left (unsigned int, unsigned int);
+   bool try_negating_argument (unsigned int, machine_mode);
+ 
+   rtx use_exact_insn (insn_code);
+   rtx use_unpred_insn (insn_code);
+   rtx use_pred_x_insn (insn_code);
+   rtx use_cond_insn (insn_code, unsigned int = DEFAULT_MERGE_ARGNO);
+   rtx use_vcond_mask_insn (insn_code, unsigned int = DEFAULT_MERGE_ARGNO);
+   rtx use_contiguous_load_insn (insn_code);
+   rtx use_contiguous_prefetch_insn (insn_code);
+   rtx use_contiguous_store_insn (insn_code);
+ 
+   rtx map_to_rtx_codes (rtx_code, rtx_code, int,
+ 			unsigned int = DEFAULT_MERGE_ARGNO);
+   rtx map_to_unspecs (int, int, int, unsigned int = DEFAULT_MERGE_ARGNO);
+ 
+   /* The function call expression.  */
+   tree call_expr;
+ 
+   /* For functions that return a value, this is the preferred location
+      of that value.  It could be null or could have a different mode
+      from the function return type.  */
+   rtx possible_target;
+ 
+   /* The expanded arguments.  */
+   auto_vec<rtx, 16> args;
+ 
+ private:
+   /* Used to build up the operands to an instruction.  */
+   auto_vec<expand_operand, 8> m_ops;
+ };
+ 
+ /* Provides information about a particular function base name, and handles
+    tasks related to the base name.  */
+ class function_base
+ {
+ public:
+   /* Return a set of CP_* flags that describe what the function might do,
+      in addition to reading its arguments and returning a result.  */
+   virtual unsigned int call_properties (const function_instance &) const;
+ 
+   /* If the function operates on tuples of vectors, return the number
+      of vectors in the tuples, otherwise return 1.  */
+   virtual unsigned int vectors_per_tuple () const { return 1; }
+ 
+   /* If the function addresses memory, return the type of a single
+      scalar memory element.  */
+   virtual tree
+   memory_scalar_type (const function_instance &) const
+   {
+     gcc_unreachable ();
+   }
+ 
+   /* If the function addresses memory, return a vector mode whose
+      GET_MODE_NUNITS is the number of elements addressed and whose
+      GET_MODE_INNER is the mode of a single scalar memory element.  */
+   virtual machine_mode
+   memory_vector_mode (const function_instance &) const
+   {
+     gcc_unreachable ();
+   }
+ 
+   /* Try to fold the given gimple call.  Return the new gimple statement
+      on success, otherwise return null.  */
+   virtual gimple *fold (gimple_folder &) const { return NULL; }
+ 
+   /* Expand the given call into rtl.  Return the result of the function,
+      or an arbitrary value if the function doesn't return a result.  */
+   virtual rtx expand (function_expander &) const = 0;
+ };
+ 
+ /* Classifies functions into "shapes".  The idea is to take all the
+    type signatures for a set of functions, remove the governing predicate
+    (if any), and classify what's left based on:
+ 
+    - the number of arguments
+ 
+    - the process of determining the types in the signature from the mode
+      and type suffixes in the function name (including types that are not
+      affected by the suffixes)
+ 
+    - which arguments must be integer constant expressions, and what range
+      those arguments have
+ 
+    - the process for mapping overloaded names to "full" names.  */
+ class function_shape
+ {
+ public:
+   virtual bool explicit_type_suffix_p (unsigned int) const = 0;
+ 
+   /* Define all functions associated with the given group.  */
+   virtual void build (function_builder &,
+ 		      const function_group_info &) const = 0;
+ 
+   /* Try to resolve the overloaded call.  Return the non-overloaded
+      function decl on success and error_mark_node on failure.  */
+   virtual tree resolve (function_resolver &) const = 0;
+ 
+   /* Check whether the given call is semantically valid.  Return true
+      if it is, otherwise report an error and return false.  */
+   virtual bool check (function_checker &) const { return true; }
+ };
+ 
+ /* RAII class for enabling enough SVE features to define the built-in
+    types and implement the arm_sve.h pragma.  */
+ class sve_switcher
+ {
+ public:
+   sve_switcher ();
+   ~sve_switcher ();
+ 
+ private:
+   unsigned long m_old_isa_flags;
+   bool m_old_general_regs_only;
+   bool m_old_have_regs_of_mode[MAX_MACHINE_MODE];
+ };
+ 
+ extern const type_suffix_info type_suffixes[NUM_TYPE_SUFFIXES + 1];
+ extern const mode_suffix_info mode_suffixes[MODE_none + 1];
+ 
+ extern tree scalar_types[NUM_VECTOR_TYPES];
+ extern tree acle_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1];
+ extern tree acle_svpattern;
+ extern tree acle_svprfop;
+ 
+ /* Return the ACLE type svbool_t.  */
+ inline tree
+ get_svbool_t (void)
+ {
+   return acle_vector_types[0][VECTOR_TYPE_svbool_t];
+ }
+ 
+ /* Try to find a mode with the given mode_suffix_info fields.  Return the
+    mode on success or MODE_none on failure.  */
+ inline mode_suffix_index
+ find_mode_suffix (vector_type_index base_vector_type,
+ 		  vector_type_index displacement_vector_type,
+ 		  units_index displacement_units)
+ {
+   for (unsigned int mode_i = 0; mode_i < ARRAY_SIZE (mode_suffixes); ++mode_i)
+     {
+       const mode_suffix_info &mode = mode_suffixes[mode_i];
+       if (mode.base_vector_type == base_vector_type
+ 	  && mode.displacement_vector_type == displacement_vector_type
+ 	  && mode.displacement_units == displacement_units)
+ 	return mode_suffix_index (mode_i);
+     }
+   return MODE_none;
+ }
+ 
+ /* Return the type suffix associated with ELEMENT_BITS-bit elements of type
+    class TCLASS.  */
+ inline type_suffix_index
+ find_type_suffix (type_class_index tclass, unsigned int element_bits)
+ {
+   for (unsigned int i = 0; i < NUM_TYPE_SUFFIXES; ++i)
+     if (type_suffixes[i].tclass == tclass
+ 	&& type_suffixes[i].element_bits == element_bits)
+       return type_suffix_index (i);
+   gcc_unreachable ();
+ }
+ 
+ /* Return the single field in tuple type TYPE.  */
+ inline tree
+ tuple_type_field (tree type)
+ {
+   for (tree field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field))
+     if (TREE_CODE (field) == FIELD_DECL)
+       return field;
+   gcc_unreachable ();
+ }
+ 
+ inline function_instance::
+ function_instance (const char *base_name_in,
+ 		   const function_base *base_in,
+ 		   const function_shape *shape_in,
+ 		   mode_suffix_index mode_suffix_id_in,
+ 		   const type_suffix_pair &type_suffix_ids_in,
+ 		   predication_index pred_in)
+   : base_name (base_name_in), base (base_in), shape (shape_in),
+     mode_suffix_id (mode_suffix_id_in), pred (pred_in)
+ {
+   memcpy (type_suffix_ids, type_suffix_ids_in, sizeof (type_suffix_ids));
+ }
+ 
+ inline bool
+ function_instance::operator== (const function_instance &other) const
+ {
+   return (base == other.base
+ 	  && shape == other.shape
+ 	  && mode_suffix_id == other.mode_suffix_id
+ 	  && pred == other.pred
+ 	  && type_suffix_ids[0] == other.type_suffix_ids[0]
+ 	  && type_suffix_ids[1] == other.type_suffix_ids[1]);
+ }
+ 
+ inline bool
+ function_instance::operator!= (const function_instance &other) const
+ {
+   return !operator== (other);
+ }
+ 
+ /* If the function operates on tuples of vectors, return the number
+    of vectors in the tuples, otherwise return 1.  */
+ inline unsigned int
+ function_instance::vectors_per_tuple () const
+ {
+   return base->vectors_per_tuple ();
+ }
+ 
+ /* If the function addresses memory, return the type of a single
+    scalar memory element.  */
+ inline tree
+ function_instance::memory_scalar_type () const
+ {
+   return base->memory_scalar_type (*this);
+ }
+ 
+ /* If the function addresses memory, return a vector mode whose
+    GET_MODE_NUNITS is the number of elements addressed and whose
+    GET_MODE_INNER is the mode of a single scalar memory element.  */
+ inline machine_mode
+ function_instance::memory_vector_mode () const
+ {
+   return base->memory_vector_mode (*this);
+ }
+ 
+ /* Return information about the function's mode suffix.  */
+ inline const mode_suffix_info &
+ function_instance::mode_suffix () const
+ {
+   return mode_suffixes[mode_suffix_id];
+ }
+ 
+ /* Return the type of the function's vector base address argument,
+    or null it doesn't have a vector base address.  */
+ inline tree
+ function_instance::base_vector_type () const
+ {
+   return acle_vector_types[0][mode_suffix ().base_vector_type];
+ }
+ 
+ /* Return the type of the function's vector index or offset argument,
+    or null if doesn't have a vector index or offset argument.  */
+ inline tree
+ function_instance::displacement_vector_type () const
+ {
+   return acle_vector_types[0][mode_suffix ().displacement_vector_type];
+ }
+ 
+ /* If the function takes a vector or scalar displacement, return the units
+    in which the displacement is measured, otherwise return UNITS_none.  */
+ inline units_index
+ function_instance::displacement_units () const
+ {
+   return mode_suffix ().displacement_units;
+ }
+ 
+ /* Return information about type suffix I.  */
+ inline const type_suffix_info &
+ function_instance::type_suffix (unsigned int i) const
+ {
+   return type_suffixes[type_suffix_ids[i]];
+ }
+ 
+ /* Return the scalar type associated with type suffix I.  */
+ inline tree
+ function_instance::scalar_type (unsigned int i) const
+ {
+   return scalar_types[type_suffix (i).vector_type];
+ }
+ 
+ /* Return the vector type associated with type suffix I.  */
+ inline tree
+ function_instance::vector_type (unsigned int i) const
+ {
+   return acle_vector_types[0][type_suffix (i).vector_type];
+ }
+ 
+ /* If the function operates on tuples of vectors, return the tuple type
+    associated with type suffix I, otherwise return the vector type associated
+    with type suffix I.  */
+ inline tree
+ function_instance::tuple_type (unsigned int i) const
+ {
+   unsigned int num_vectors = vectors_per_tuple ();
+   return acle_vector_types[num_vectors - 1][type_suffix (i).vector_type];
+ }
+ 
+ /* Return the number of elements of type suffix I that fit within a
+    128-bit block.  */
+ inline unsigned int
+ function_instance::elements_per_vq (unsigned int i) const
+ {
+   return 128 / type_suffix (i).element_bits;
+ }
+ 
+ /* Return the vector or predicate mode associated with type suffix I.  */
+ inline machine_mode
+ function_instance::vector_mode (unsigned int i) const
+ {
+   return type_suffix (i).vector_mode;
+ }
+ 
+ /* Return the mode of the governing predicate to use when operating on
+    type suffix I.  */
+ inline machine_mode
+ function_instance::gp_mode (unsigned int i) const
+ {
+   return aarch64_sve_pred_mode (type_suffix (i).element_bytes).require ();
+ }
+ 
+ /* Return true if the function has no return value.  */
+ inline bool
+ function_call_info::function_returns_void_p ()
+ {
+   return TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node;
+ }
+ 
+ /* Default implementation of function::call_properties, with conservatively
+    correct behavior for floating-point instructions.  */
+ inline unsigned int
+ function_base::call_properties (const function_instance &instance) const
+ {
+   unsigned int flags = 0;
+   if (instance.type_suffix (0).float_p || instance.type_suffix (1).float_p)
+     flags |= CP_READ_FPCR | CP_RAISE_FP_EXCEPTIONS;
+   return flags;
+ }
+ 
+ }
+ 
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve.md gcc-10.1.0/gcc/config/aarch64/aarch64-sve.md
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description for AArch64 SVE.
! ;; Copyright (C) 2009-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Machine description for AArch64 SVE.
! ;; Copyright (C) 2009-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
***************
*** 18,25 ****
  ;; along with GCC; see the file COPYING3.  If not see
  ;; <http://www.gnu.org/licenses/>.
  
! ;; Note on the handling of big-endian SVE
! ;; --------------------------------------
  ;;
  ;; On big-endian systems, Advanced SIMD mov<mode> patterns act in the
  ;; same way as movdi or movti would: the first byte of memory goes
--- 18,188 ----
  ;; along with GCC; see the file COPYING3.  If not see
  ;; <http://www.gnu.org/licenses/>.
  
! ;; The file is organised into the following sections (search for the full
! ;; line):
! ;;
! ;; == General notes
! ;; ---- Note on the handling of big-endian SVE
! ;; ---- Description of UNSPEC_PTEST
! ;; ---- Description of UNSPEC_PRED_Z
! ;; ---- Note on predicated integer arithemtic and UNSPEC_PRED_X
! ;; ---- Note on predicated FP arithmetic patterns and GP "strictness"
! ;; ---- Note on FFR handling
! ;;
! ;; == Moves
! ;; ---- Moves of single vectors
! ;; ---- Moves of multiple vectors
! ;; ---- Moves of predicates
! ;; ---- Moves relating to the FFR
! ;;
! ;; == Loads
! ;; ---- Normal contiguous loads
! ;; ---- Extending contiguous loads
! ;; ---- First-faulting contiguous loads
! ;; ---- First-faulting extending contiguous loads
! ;; ---- Non-temporal contiguous loads
! ;; ---- Normal gather loads
! ;; ---- Extending gather loads
! ;; ---- First-faulting gather loads
! ;; ---- First-faulting extending gather loads
! ;;
! ;; == Prefetches
! ;; ---- Contiguous prefetches
! ;; ---- Gather prefetches
! ;;
! ;; == Stores
! ;; ---- Normal contiguous stores
! ;; ---- Truncating contiguous stores
! ;; ---- Non-temporal contiguous stores
! ;; ---- Normal scatter stores
! ;; ---- Truncating scatter stores
! ;;
! ;; == Vector creation
! ;; ---- [INT,FP] Duplicate element
! ;; ---- [INT,FP] Initialize from individual elements
! ;; ---- [INT] Linear series
! ;; ---- [PRED] Duplicate element
! ;;
! ;; == Vector decomposition
! ;; ---- [INT,FP] Extract index
! ;; ---- [INT,FP] Extract active element
! ;; ---- [PRED] Extract index
! ;;
! ;; == Unary arithmetic
! ;; ---- [INT] General unary arithmetic corresponding to rtx codes
! ;; ---- [INT] General unary arithmetic corresponding to unspecs
! ;; ---- [INT] Sign and zero extension
! ;; ---- [INT] Truncation
! ;; ---- [INT] Logical inverse
! ;; ---- [FP<-INT] General unary arithmetic that maps to unspecs
! ;; ---- [FP] General unary arithmetic corresponding to unspecs
! ;; ---- [FP] Square root
! ;; ---- [FP] Reciprocal square root
! ;; ---- [PRED] Inverse
! 
! ;; == Binary arithmetic
! ;; ---- [INT] General binary arithmetic corresponding to rtx codes
! ;; ---- [INT] Addition
! ;; ---- [INT] Subtraction
! ;; ---- [INT] Take address
! ;; ---- [INT] Absolute difference
! ;; ---- [INT] Saturating addition and subtraction
! ;; ---- [INT] Highpart multiplication
! ;; ---- [INT] Division
! ;; ---- [INT] Binary logical operations
! ;; ---- [INT] Binary logical operations (inverted second input)
! ;; ---- [INT] Shifts (rounding towards -Inf)
! ;; ---- [INT] Shifts (rounding towards 0)
! ;; ---- [FP<-INT] General binary arithmetic corresponding to unspecs
! ;; ---- [FP] General binary arithmetic corresponding to rtx codes
! ;; ---- [FP] General binary arithmetic corresponding to unspecs
! ;; ---- [FP] Addition
! ;; ---- [FP] Complex addition
! ;; ---- [FP] Subtraction
! ;; ---- [FP] Absolute difference
! ;; ---- [FP] Multiplication
! ;; ---- [FP] Division
! ;; ---- [FP] Binary logical operations
! ;; ---- [FP] Sign copying
! ;; ---- [FP] Maximum and minimum
! ;; ---- [PRED] Binary logical operations
! ;; ---- [PRED] Binary logical operations (inverted second input)
! ;; ---- [PRED] Binary logical operations (inverted result)
! ;;
! ;; == Ternary arithmetic
! ;; ---- [INT] MLA and MAD
! ;; ---- [INT] MLS and MSB
! ;; ---- [INT] Dot product
! ;; ---- [INT] Sum of absolute differences
! ;; ---- [INT] Matrix multiply-accumulate
! ;; ---- [FP] General ternary arithmetic corresponding to unspecs
! ;; ---- [FP] Complex multiply-add
! ;; ---- [FP] Trigonometric multiply-add
! ;; ---- [FP] Bfloat16 long ternary arithmetic (SF,BF,BF)
! ;; ---- [FP] Matrix multiply-accumulate
! ;;
! ;; == Comparisons and selects
! ;; ---- [INT,FP] Select based on predicates
! ;; ---- [INT,FP] Compare and select
! ;; ---- [INT] Comparisons
! ;; ---- [INT] While tests
! ;; ---- [FP] Direct comparisons
! ;; ---- [FP] Absolute comparisons
! ;; ---- [PRED] Select
! ;; ---- [PRED] Test bits
! ;;
! ;; == Reductions
! ;; ---- [INT,FP] Conditional reductions
! ;; ---- [INT] Tree reductions
! ;; ---- [FP] Tree reductions
! ;; ---- [FP] Left-to-right reductions
! ;;
! ;; == Permutes
! ;; ---- [INT,FP] General permutes
! ;; ---- [INT,FP] Special-purpose unary permutes
! ;; ---- [INT,FP] Special-purpose binary permutes
! ;; ---- [PRED] Special-purpose unary permutes
! ;; ---- [PRED] Special-purpose binary permutes
! ;;
! ;; == Conversions
! ;; ---- [INT<-INT] Packs
! ;; ---- [INT<-INT] Unpacks
! ;; ---- [INT<-FP] Conversions
! ;; ---- [INT<-FP] Packs
! ;; ---- [INT<-FP] Unpacks
! ;; ---- [FP<-INT] Conversions
! ;; ---- [FP<-INT] Packs
! ;; ---- [FP<-INT] Unpacks
! ;; ---- [FP<-FP] Packs
! ;; ---- [FP<-FP] Packs (bfloat16)
! ;; ---- [FP<-FP] Unpacks
! ;; ---- [PRED<-PRED] Packs
! ;; ---- [PRED<-PRED] Unpacks
! ;;
! ;; == Vector partitioning
! ;; ---- [PRED] Unary partitioning
! ;; ---- [PRED] Binary partitioning
! ;; ---- [PRED] Scalarization
! ;;
! ;; == Counting elements
! ;; ---- [INT] Count elements in a pattern (scalar)
! ;; ---- [INT] Increment by the number of elements in a pattern (scalar)
! ;; ---- [INT] Increment by the number of elements in a pattern (vector)
! ;; ---- [INT] Decrement by the number of elements in a pattern (scalar)
! ;; ---- [INT] Decrement by the number of elements in a pattern (vector)
! ;; ---- [INT] Count elements in a predicate (scalar)
! ;; ---- [INT] Increment by the number of elements in a predicate (scalar)
! ;; ---- [INT] Increment by the number of elements in a predicate (vector)
! ;; ---- [INT] Decrement by the number of elements in a predicate (scalar)
! ;; ---- [INT] Decrement by the number of elements in a predicate (vector)
! 
! ;; =========================================================================
! ;; == General notes
! ;; =========================================================================
! ;;
! ;; -------------------------------------------------------------------------
! ;; ---- Note on the handling of big-endian SVE
! ;; -------------------------------------------------------------------------
  ;;
  ;; On big-endian systems, Advanced SIMD mov<mode> patterns act in the
  ;; same way as movdi or movti would: the first byte of memory goes
***************
*** 59,67 ****
  ;;   the order of the bytes within the elements is different.  We instead
  ;;   access spill slots via LD1 and ST1, using secondary reloads to
  ;;   reserve a predicate register.
  
  
- ;; SVE data moves.
  (define_expand "mov<mode>"
    [(set (match_operand:SVE_ALL 0 "nonimmediate_operand")
  	(match_operand:SVE_ALL 1 "general_operand"))]
--- 222,557 ----
  ;;   the order of the bytes within the elements is different.  We instead
  ;;   access spill slots via LD1 and ST1, using secondary reloads to
  ;;   reserve a predicate register.
+ ;;
+ ;; -------------------------------------------------------------------------
+ ;; ---- Description of UNSPEC_PTEST
+ ;; -------------------------------------------------------------------------
+ ;;
+ ;; SVE provides a PTEST instruction for testing the active lanes of a
+ ;; predicate and setting the flags based on the result.  The associated
+ ;; condition code tests are:
+ ;;
+ ;; - any   (= ne): at least one active bit is set
+ ;; - none  (= eq): all active bits are clear (*)
+ ;; - first (= mi): the first active bit is set
+ ;; - nfrst (= pl): the first active bit is clear (*)
+ ;; - last  (= cc): the last active bit is set
+ ;; - nlast (= cs): the last active bit is clear (*)
+ ;;
+ ;; where the conditions marked (*) are also true when there are no active
+ ;; lanes (i.e. when the governing predicate is a PFALSE).  The flags results
+ ;; of a PTEST use the condition code mode CC_NZC.
+ ;;
+ ;; PTEST is always a .B operation (i.e. it always operates on VNx16BI).
+ ;; This means that for other predicate modes, we need a governing predicate
+ ;; in which all bits are defined.
+ ;;
+ ;; For example, most predicated .H operations ignore the odd bits of the
+ ;; governing predicate, so that an active lane is represented by the
+ ;; bits "1x" and an inactive lane by the bits "0x", where "x" can be
+ ;; any value.  To test a .H predicate, we instead need "10" and "00"
+ ;; respectively, so that the condition only tests the even bits of the
+ ;; predicate.
+ ;;
+ ;; Several instructions set the flags as a side-effect, in the same way
+ ;; that a separate PTEST would.  It's important for code quality that we
+ ;; use these flags results as often as possible, particularly in the case
+ ;; of WHILE* and RDFFR.
+ ;;
+ ;; Also, some of the instructions that set the flags are unpredicated
+ ;; and instead implicitly test all .B, .H, .S or .D elements, as though
+ ;; they were predicated on a PTRUE of that size.  For example, a .S
+ ;; WHILELO sets the flags in the same way as a PTEST with a .S PTRUE
+ ;; would.
+ ;;
+ ;; We therefore need to represent PTEST operations in a way that
+ ;; makes it easy to combine them with both predicated and unpredicated
+ ;; operations, while using a VNx16BI governing predicate for all
+ ;; predicate modes.  We do this using:
+ ;;
+ ;;   (unspec:CC_NZC [gp cast_gp ptrue_flag op] UNSPEC_PTEST)
+ ;;
+ ;; where:
+ ;;
+ ;; - GP is the real VNx16BI governing predicate
+ ;;
+ ;; - CAST_GP is GP cast to the mode of OP.  All bits dropped by casting
+ ;;   GP to CAST_GP are guaranteed to be clear in GP.
+ ;;
+ ;; - PTRUE_FLAG is a CONST_INT (conceptually of mode SI) that has the value
+ ;;   SVE_KNOWN_PTRUE if we know that CAST_GP (rather than GP) is all-true and
+ ;;   SVE_MAYBE_NOT_PTRUE otherwise.
+ ;;
+ ;; - OP is the predicate we want to test, of the same mode as CAST_GP.
+ ;;
+ ;; -------------------------------------------------------------------------
+ ;; ---- Description of UNSPEC_PRED_Z
+ ;; -------------------------------------------------------------------------
+ ;;
+ ;; SVE integer comparisons are predicated and return zero for inactive
+ ;; lanes.  Sometimes we use them with predicates that are all-true and
+ ;; sometimes we use them with general predicates.
+ ;;
+ ;; The integer comparisons also set the flags and so build-in the effect
+ ;; of a PTEST.  We therefore want to be able to combine integer comparison
+ ;; patterns with PTESTs of the result.  One difficulty with doing this is
+ ;; that (as noted above) the PTEST is always a .B operation and so can place
+ ;; stronger requirements on the governing predicate than the comparison does.
+ ;;
+ ;; For example, when applying a separate PTEST to the result of a full-vector
+ ;; .H comparison, the PTEST must be predicated on a .H PTRUE instead of a
+ ;; .B PTRUE.  In constrast, the comparison might be predicated on either
+ ;; a .H PTRUE or a .B PTRUE, since the values of odd-indexed predicate
+ ;; bits don't matter for .H operations.
+ ;;
+ ;; We therefore can't rely on a full-vector comparison using the same
+ ;; predicate register as a following PTEST.  We instead need to remember
+ ;; whether a comparison is known to be a full-vector comparison and use
+ ;; this information in addition to a check for equal predicate registers.
+ ;; At the same time, it's useful to have a common representation for all
+ ;; integer comparisons, so that they can be handled by a single set of
+ ;; patterns.
+ ;;
+ ;; We therefore take a similar approach to UNSPEC_PTEST above and use:
+ ;;
+ ;;   (unspec:<M:VPRED> [gp ptrue_flag (code:M op0 op1)] UNSPEC_PRED_Z)
+ ;;
+ ;; where:
+ ;;
+ ;; - GP is the governing predicate, of mode <M:VPRED>
+ ;;
+ ;; - PTRUE_FLAG is a CONST_INT (conceptually of mode SI) that has the value
+ ;;   SVE_KNOWN_PTRUE if we know that GP is all-true and SVE_MAYBE_NOT_PTRUE
+ ;;   otherwise
+ ;;
+ ;; - CODE is the comparison code
+ ;;
+ ;; - OP0 and OP1 are the values being compared, of mode M
+ ;;
+ ;; The "Z" in UNSPEC_PRED_Z indicates that inactive lanes are zero.
+ ;;
+ ;; -------------------------------------------------------------------------
+ ;; ---- Note on predicated integer arithemtic and UNSPEC_PRED_X
+ ;; -------------------------------------------------------------------------
+ ;;
+ ;; Many SVE integer operations are predicated.  We can generate them
+ ;; from four sources:
+ ;;
+ ;; (1) Using normal unpredicated optabs.  In this case we need to create
+ ;;     an all-true predicate register to act as the governing predicate
+ ;;     for the SVE instruction.  There are no inactive lanes, and thus
+ ;;     the values of inactive lanes don't matter.
+ ;;
+ ;; (2) Using _x ACLE functions.  In this case the function provides a
+ ;;     specific predicate and some lanes might be inactive.  However,
+ ;;     as for (1), the values of the inactive lanes don't matter.
+ ;;     We can make extra lanes active without changing the behavior
+ ;;     (although for code-quality reasons we should avoid doing so
+ ;;     needlessly).
+ ;;
+ ;; (3) Using cond_* optabs that correspond to IFN_COND_* internal functions.
+ ;;     These optabs have a predicate operand that specifies which lanes are
+ ;;     active and another operand that provides the values of inactive lanes.
+ ;;
+ ;; (4) Using _m and _z ACLE functions.  These functions map to the same
+ ;;     patterns as (3), with the _z functions setting inactive lanes to zero
+ ;;     and the _m functions setting the inactive lanes to one of the function
+ ;;     arguments.
+ ;;
+ ;; For (1) and (2) we need a way of attaching the predicate to a normal
+ ;; unpredicated integer operation.  We do this using:
+ ;;
+ ;;   (unspec:M [pred (code:M (op0 op1 ...))] UNSPEC_PRED_X)
+ ;;
+ ;; where (code:M (op0 op1 ...)) is the normal integer operation and PRED
+ ;; is a predicate of mode <M:VPRED>.  PRED might or might not be a PTRUE;
+ ;; it always is for (1), but might not be for (2).
+ ;;
+ ;; The unspec as a whole has the same value as (code:M ...) when PRED is
+ ;; all-true.  It is always semantically valid to replace PRED with a PTRUE,
+ ;; but as noted above, we should only do so if there's a specific benefit.
+ ;;
+ ;; (The "_X" in the unspec is named after the ACLE functions in (2).)
+ ;;
+ ;; For (3) and (4) we can simply use the SVE port's normal representation
+ ;; of a predicate-based select:
+ ;;
+ ;;   (unspec:M [pred (code:M (op0 op1 ...)) inactive] UNSPEC_SEL)
+ ;;
+ ;; where INACTIVE specifies the values of inactive lanes.
+ ;;
+ ;; We can also use the UNSPEC_PRED_X wrapper in the UNSPEC_SEL rather
+ ;; than inserting the integer operation directly.  This is mostly useful
+ ;; if we want the combine pass to merge an integer operation with an explicit
+ ;; vcond_mask (in other words, with a following SEL instruction).  However,
+ ;; it's generally better to merge such operations at the gimple level
+ ;; using (3).
+ ;;
+ ;; -------------------------------------------------------------------------
+ ;; ---- Note on predicated FP arithmetic patterns and GP "strictness"
+ ;; -------------------------------------------------------------------------
+ ;;
+ ;; Most SVE floating-point operations are predicated.  We can generate
+ ;; them from four sources:
+ ;;
+ ;; (1) Using normal unpredicated optabs.  In this case we need to create
+ ;;     an all-true predicate register to act as the governing predicate
+ ;;     for the SVE instruction.  There are no inactive lanes, and thus
+ ;;     the values of inactive lanes don't matter.
+ ;;
+ ;; (2) Using _x ACLE functions.  In this case the function provides a
+ ;;     specific predicate and some lanes might be inactive.  However,
+ ;;     as for (1), the values of the inactive lanes don't matter.
+ ;;
+ ;;     The instruction must have the same exception behavior as the
+ ;;     function call unless things like command-line flags specifically
+ ;;     allow otherwise.  For example, with -ffast-math, it is OK to
+ ;;     raise exceptions for inactive lanes, but normally it isn't.
+ ;;
+ ;; (3) Using cond_* optabs that correspond to IFN_COND_* internal functions.
+ ;;     These optabs have a predicate operand that specifies which lanes are
+ ;;     active and another operand that provides the values of inactive lanes.
+ ;;
+ ;; (4) Using _m and _z ACLE functions.  These functions map to the same
+ ;;     patterns as (3), with the _z functions setting inactive lanes to zero
+ ;;     and the _m functions setting the inactive lanes to one of the function
+ ;;     arguments.
+ ;;
+ ;; So:
+ ;;
+ ;; - In (1), the predicate is known to be all true and the pattern can use
+ ;;   unpredicated operations where available.
+ ;;
+ ;; - In (2), the predicate might or might not be all true.  The pattern can
+ ;;   use unpredicated instructions if the predicate is all-true or if things
+ ;;   like command-line flags allow exceptions for inactive lanes.
+ ;;
+ ;; - (3) and (4) represent a native SVE predicated operation.  Some lanes
+ ;;   might be inactive and inactive lanes of the result must have specific
+ ;;   values.  There is no scope for using unpredicated instructions (and no
+ ;;   reason to want to), so the question about command-line flags doesn't
+ ;;   arise.
+ ;;
+ ;; It would be inaccurate to model (2) as an rtx code like (sqrt ...)
+ ;; in combination with a separate predicate operand, e.g.
+ ;;
+ ;;   (unspec [(match_operand:<VPRED> 1 "register_operand" "Upl")
+ ;;	      (sqrt:SVE_FULL_F 2 "register_operand" "w")]
+ ;;	     ....)
+ ;;
+ ;; because (sqrt ...) can raise an exception for any lane, including
+ ;; inactive ones.  We therefore need to use an unspec instead.
+ ;;
+ ;; Also, (2) requires some way of distinguishing the case in which the
+ ;; predicate might have inactive lanes and cannot be changed from the
+ ;; case in which the predicate has no inactive lanes or can be changed.
+ ;; This information is also useful when matching combined FP patterns
+ ;; in which the predicates might not be equal.
+ ;;
+ ;; We therefore model FP operations as an unspec of the form:
+ ;;
+ ;;   (unspec [pred strictness op0 op1 ...] UNSPEC_COND_<MNEMONIC>)
+ ;;
+ ;; where:
+ ;;
+ ;; - PRED is the governing predicate.
+ ;;
+ ;; - STRICTNESS is a CONST_INT that conceptually has mode SI.  It has the
+ ;;   value SVE_STRICT_GP if PRED might have inactive lanes and if those
+ ;;   lanes must remain inactive.  It has the value SVE_RELAXED_GP otherwise.
+ ;;
+ ;; - OP0 OP1 ... are the normal input operands to the operation.
+ ;;
+ ;; - MNEMONIC is the mnemonic of the associated SVE instruction.
+ ;;
+ ;; -------------------------------------------------------------------------
+ ;; ---- Note on FFR handling
+ ;; -------------------------------------------------------------------------
+ ;;
+ ;; Logically we want to divide FFR-related instructions into regions
+ ;; that contain exactly one of:
+ ;;
+ ;; - a single write to the FFR
+ ;; - any number of reads from the FFR (but only one read is likely)
+ ;; - any number of LDFF1 and LDNF1 instructions
+ ;;
+ ;; However, LDFF1 and LDNF1 instructions should otherwise behave like
+ ;; normal loads as far as possible.  This means that they should be
+ ;; schedulable within a region in the same way that LD1 would be,
+ ;; and they should be deleted as dead if the result is unused.  The loads
+ ;; should therefore not write to the FFR, since that would both serialize
+ ;; the loads with respect to each other and keep the loads live for any
+ ;; later RDFFR.
+ ;;
+ ;; We get around this by using a fake "FFR token" (FFRT) to help describe
+ ;; the dependencies.  Writing to the FFRT starts a new "FFRT region",
+ ;; while using the FFRT keeps the instruction within its region.
+ ;; Specifically:
+ ;;
+ ;; - Writes start a new FFRT region as well as setting the FFR:
+ ;;
+ ;;       W1: parallel (FFRT = <new value>, FFR = <actual FFR value>)
+ ;;
+ ;; - Loads use an LD1-like instruction that also uses the FFRT, so that the
+ ;;   loads stay within the same FFRT region:
+ ;;
+ ;;       L1: load data while using the FFRT
+ ;;
+ ;;   In addition, any FFRT region that includes a load also has at least one
+ ;;   instance of:
+ ;;
+ ;;       L2: FFR = update(FFR, FFRT)  [type == no_insn]
+ ;;
+ ;;   to make it clear that the region both reads from and writes to the FFR.
+ ;;
+ ;; - Reads do the following:
+ ;;
+ ;;       R1: FFRT = FFR               [type == no_insn]
+ ;;       R2: read from the FFRT
+ ;;       R3: FFRT = update(FFRT)      [type == no_insn]
+ ;;
+ ;;   R1 and R3 both create new FFRT regions, so that previous LDFF1s and
+ ;;   LDNF1s cannot move forwards across R1 and later LDFF1s and LDNF1s
+ ;;   cannot move backwards across R3.
+ ;;
+ ;; This way, writes are only kept alive by later loads or reads,
+ ;; and write/read pairs fold normally.  For two consecutive reads,
+ ;; the first R3 is made dead by the second R1, which in turn becomes
+ ;; redundant with the first R1.  We then have:
+ ;;
+ ;;     first R1: FFRT = FFR
+ ;;     first read from the FFRT
+ ;;     second read from the FFRT
+ ;;     second R3: FFRT = update(FFRT)
+ ;;
+ ;; i.e. the two FFRT regions collapse into a single one with two
+ ;; independent reads.
+ ;;
+ ;; The model still prevents some valid optimizations though.  For example,
+ ;; if all loads in an FFRT region are deleted as dead, nothing would remove
+ ;; the L2 instructions.
  
+ ;; =========================================================================
+ ;; == Moves
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- Moves of single vectors
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - MOV  (including aliases)
+ ;; - LD1B (contiguous form)
+ ;; - LD1D (    "    "     )
+ ;; - LD1H (    "    "     )
+ ;; - LD1W (    "    "     )
+ ;; - LDR
+ ;; - ST1B (contiguous form)
+ ;; - ST1D (    "    "     )
+ ;; - ST1H (    "    "     )
+ ;; - ST1W (    "    "     )
+ ;; - STR
+ ;; -------------------------------------------------------------------------
  
  (define_expand "mov<mode>"
    [(set (match_operand:SVE_ALL 0 "nonimmediate_operand")
  	(match_operand:SVE_ALL 1 "general_operand"))]
***************
*** 72,78 ****
         head of the file) and increases the addressing choices for
         little-endian.  */
      if ((MEM_P (operands[0]) || MEM_P (operands[1]))
!         && can_create_pseudo_p ())
        {
  	aarch64_expand_sve_mem_move (operands[0], operands[1], <VPRED>mode);
  	DONE;
--- 562,568 ----
         head of the file) and increases the addressing choices for
         little-endian.  */
      if ((MEM_P (operands[0]) || MEM_P (operands[1]))
! 	&& can_create_pseudo_p ())
        {
  	aarch64_expand_sve_mem_move (operands[0], operands[1], <VPRED>mode);
  	DONE;
***************
*** 80,126 ****
  
      if (CONSTANT_P (operands[1]))
        {
! 	aarch64_expand_mov_immediate (operands[0], operands[1],
! 				      gen_vec_duplicate<mode>);
  	DONE;
        }
  
      /* Optimize subregs on big-endian targets: we can use REV[BHW]
         instead of going through memory.  */
      if (BYTES_BIG_ENDIAN
!         && aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
        DONE;
    }
  )
  
! ;; A pattern for optimizing SUBREGs that have a reinterpreting effect
! ;; on big-endian targets; see aarch64_maybe_expand_sve_subreg_move
! ;; for details.  We use a special predicate for operand 2 to reduce
! ;; the number of patterns.
! (define_insn_and_split "*aarch64_sve_mov<mode>_subreg_be"
!   [(set (match_operand:SVE_ALL 0 "aarch64_sve_nonimmediate_operand" "=w")
! 	(unspec:SVE_ALL
!           [(match_operand:VNx16BI 1 "register_operand" "Upl")
! 	   (match_operand 2 "aarch64_any_register_operand" "w")]
! 	  UNSPEC_REV_SUBREG))]
!   "TARGET_SVE && BYTES_BIG_ENDIAN"
!   "#"
!   "&& reload_completed"
!   [(const_int 0)]
    {
!     aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
      DONE;
    }
  )
  
! ;; Unpredicated moves (little-endian).  Only allow memory operations
! ;; during and after RA; before RA we want the predicated load and
! ;; store patterns to be used instead.
! (define_insn "*aarch64_sve_mov<mode>_le"
!   [(set (match_operand:SVE_ALL 0 "aarch64_sve_nonimmediate_operand" "=w, Utr, w, w")
! 	(match_operand:SVE_ALL 1 "aarch64_sve_general_operand" "Utr, w, w, Dn"))]
    "TARGET_SVE
!    && !BYTES_BIG_ENDIAN
     && ((lra_in_progress || reload_completed)
         || (register_operand (operands[0], <MODE>mode)
  	   && nonmemory_operand (operands[1], <MODE>mode)))"
--- 570,607 ----
  
      if (CONSTANT_P (operands[1]))
        {
! 	aarch64_expand_mov_immediate (operands[0], operands[1]);
  	DONE;
        }
  
      /* Optimize subregs on big-endian targets: we can use REV[BHW]
         instead of going through memory.  */
      if (BYTES_BIG_ENDIAN
! 	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
        DONE;
    }
  )
  
! (define_expand "movmisalign<mode>"
!   [(set (match_operand:SVE_ALL 0 "nonimmediate_operand")
! 	(match_operand:SVE_ALL 1 "general_operand"))]
!   "TARGET_SVE"
    {
!     /* Equivalent to a normal move for our purpooses.  */
!     emit_move_insn (operands[0], operands[1]);
      DONE;
    }
  )
  
! ;; Unpredicated moves that can use LDR and STR, i.e. full vectors for which
! ;; little-endian ordering is acceptable.  Only allow memory operations during
! ;; and after RA; before RA we want the predicated load and store patterns to
! ;; be used instead.
! (define_insn "*aarch64_sve_mov<mode>_ldr_str"
!   [(set (match_operand:SVE_FULL 0 "aarch64_sve_nonimmediate_operand" "=w, Utr, w, w")
! 	(match_operand:SVE_FULL 1 "aarch64_sve_general_operand" "Utr, w, w, Dn"))]
    "TARGET_SVE
!    && (<MODE>mode == VNx16QImode || !BYTES_BIG_ENDIAN)
     && ((lra_in_progress || reload_completed)
         || (register_operand (operands[0], <MODE>mode)
  	   && nonmemory_operand (operands[1], <MODE>mode)))"
***************
*** 131,164 ****
     * return aarch64_output_sve_mov_immediate (operands[1]);"
  )
  
! ;; Unpredicated moves (big-endian).  Memory accesses require secondary
! ;; reloads.
! (define_insn "*aarch64_sve_mov<mode>_be"
    [(set (match_operand:SVE_ALL 0 "register_operand" "=w, w")
  	(match_operand:SVE_ALL 1 "aarch64_nonmemory_operand" "w, Dn"))]
!   "TARGET_SVE && BYTES_BIG_ENDIAN"
    "@
     mov\t%0.d, %1.d
     * return aarch64_output_sve_mov_immediate (operands[1]);"
  )
  
! ;; Handle big-endian memory reloads.  We use byte PTRUE for all modes
! ;; to try to encourage reuse.
! (define_expand "aarch64_sve_reload_be"
    [(parallel
       [(set (match_operand 0)
!            (match_operand 1))
        (clobber (match_operand:VNx16BI 2 "register_operand" "=Upl"))])]
!   "TARGET_SVE && BYTES_BIG_ENDIAN"
    {
      /* Create a PTRUE.  */
      emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
  
      /* Refer to the PTRUE in the appropriate mode for this move.  */
      machine_mode mode = GET_MODE (operands[0]);
!     machine_mode pred_mode
!       = aarch64_sve_pred_mode (GET_MODE_UNIT_SIZE (mode)).require ();
!     rtx pred = gen_lowpart (pred_mode, operands[2]);
  
      /* Emit a predicated load or store.  */
      aarch64_emit_sve_pred_move (operands[0], pred, operands[1]);
--- 612,648 ----
     * return aarch64_output_sve_mov_immediate (operands[1]);"
  )
  
! ;; Unpredicated moves that cannot use LDR and STR, i.e. partial vectors
! ;; or vectors for which little-endian ordering isn't acceptable.  Memory
! ;; accesses require secondary reloads.
! (define_insn "*aarch64_sve_mov<mode>_no_ldr_str"
    [(set (match_operand:SVE_ALL 0 "register_operand" "=w, w")
  	(match_operand:SVE_ALL 1 "aarch64_nonmemory_operand" "w, Dn"))]
!   "TARGET_SVE
!    && <MODE>mode != VNx16QImode
!    && (BYTES_BIG_ENDIAN
!        || maybe_ne (BYTES_PER_SVE_VECTOR, GET_MODE_SIZE (<MODE>mode)))"
    "@
     mov\t%0.d, %1.d
     * return aarch64_output_sve_mov_immediate (operands[1]);"
  )
  
! ;; Handle memory reloads for modes that can't use LDR and STR.  We use
! ;; byte PTRUE for all modes to try to encourage reuse.  This pattern
! ;; needs constraints because it is returned by TARGET_SECONDARY_RELOAD.
! (define_expand "aarch64_sve_reload_mem"
    [(parallel
       [(set (match_operand 0)
! 	   (match_operand 1))
        (clobber (match_operand:VNx16BI 2 "register_operand" "=Upl"))])]
!   "TARGET_SVE"
    {
      /* Create a PTRUE.  */
      emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
  
      /* Refer to the PTRUE in the appropriate mode for this move.  */
      machine_mode mode = GET_MODE (operands[0]);
!     rtx pred = gen_lowpart (aarch64_sve_pred_mode (mode), operands[2]);
  
      /* Emit a predicated load or store.  */
      aarch64_emit_sve_pred_move (operands[0], pred, operands[1]);
***************
*** 166,339 ****
    }
  )
  
! ;; A predicated load or store for which the predicate is known to be
! ;; all-true.  Note that this pattern is generated directly by
! ;; aarch64_emit_sve_pred_move, so changes to this pattern will
! ;; need changes there as well.
  (define_insn_and_split "@aarch64_pred_mov<mode>"
    [(set (match_operand:SVE_ALL 0 "nonimmediate_operand" "=w, w, m")
  	(unspec:SVE_ALL
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
  	   (match_operand:SVE_ALL 2 "nonimmediate_operand" "w, m, w")]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE
     && (register_operand (operands[0], <MODE>mode)
         || register_operand (operands[2], <MODE>mode))"
    "@
     #
!    ld1<Vesize>\t%0.<Vetype>, %1/z, %2
!    st1<Vesize>\t%2.<Vetype>, %1, %0"
    "&& register_operand (operands[0], <MODE>mode)
     && register_operand (operands[2], <MODE>mode)"
    [(set (match_dup 0) (match_dup 2))]
  )
  
! (define_expand "movmisalign<mode>"
!   [(set (match_operand:SVE_ALL 0 "nonimmediate_operand")
! 	(match_operand:SVE_ALL 1 "general_operand"))]
!   "TARGET_SVE"
    {
!     /* Equivalent to a normal move for our purpooses.  */
!     emit_move_insn (operands[0], operands[1]);
      DONE;
    }
  )
  
! (define_insn "maskload<mode><vpred>"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w")
  	(unspec:SVE_ALL
! 	  [(match_operand:<VPRED> 2 "register_operand" "Upl")
! 	   (match_operand:SVE_ALL 1 "memory_operand" "m")]
! 	  UNSPEC_LD1_SVE))]
!   "TARGET_SVE"
!   "ld1<Vesize>\t%0.<Vetype>, %2/z, %1"
! )
! 
! (define_insn "maskstore<mode><vpred>"
!   [(set (match_operand:SVE_ALL 0 "memory_operand" "+m")
! 	(unspec:SVE_ALL [(match_operand:<VPRED> 2 "register_operand" "Upl")
! 			 (match_operand:SVE_ALL 1 "register_operand" "w")
! 			 (match_dup 0)]
! 			UNSPEC_ST1_SVE))]
!   "TARGET_SVE"
!   "st1<Vesize>\t%1.<Vetype>, %2, %0"
! )
! 
! ;; Unpredicated gather loads.
! (define_expand "gather_load<mode>"
!   [(set (match_operand:SVE_SD 0 "register_operand")
! 	(unspec:SVE_SD
! 	  [(match_dup 5)
! 	   (match_operand:DI 1 "aarch64_reg_or_zero")
! 	   (match_operand:<V_INT_EQUIV> 2 "register_operand")
! 	   (match_operand:DI 3 "const_int_operand")
! 	   (match_operand:DI 4 "aarch64_gather_scale_operand_<Vesize>")
! 	   (mem:BLK (scratch))]
! 	  UNSPEC_LD1_GATHER))]
    "TARGET_SVE"
    {
!     operands[5] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Predicated gather loads for 32-bit elements.  Operand 3 is true for
! ;; unsigned extension and false for signed extension.
! (define_insn "mask_gather_load<mode>"
!   [(set (match_operand:SVE_S 0 "register_operand" "=w, w, w, w, w")
! 	(unspec:SVE_S
! 	  [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl")
! 	   (match_operand:DI 1 "aarch64_reg_or_zero" "Z, rk, rk, rk, rk")
! 	   (match_operand:<V_INT_EQUIV> 2 "register_operand" "w, w, w, w, w")
! 	   (match_operand:DI 3 "const_int_operand" "i, Z, Ui1, Z, Ui1")
! 	   (match_operand:DI 4 "aarch64_gather_scale_operand_w" "Ui1, Ui1, Ui1, i, i")
! 	   (mem:BLK (scratch))]
! 	  UNSPEC_LD1_GATHER))]
!   "TARGET_SVE"
!   "@
!    ld1w\t%0.s, %5/z, [%2.s]
!    ld1w\t%0.s, %5/z, [%1, %2.s, sxtw]
!    ld1w\t%0.s, %5/z, [%1, %2.s, uxtw]
!    ld1w\t%0.s, %5/z, [%1, %2.s, sxtw %p4]
!    ld1w\t%0.s, %5/z, [%1, %2.s, uxtw %p4]"
! )
! 
! ;; Predicated gather loads for 64-bit elements.  The value of operand 3
! ;; doesn't matter in this case.
! (define_insn "mask_gather_load<mode>"
!   [(set (match_operand:SVE_D 0 "register_operand" "=w, w, w")
! 	(unspec:SVE_D
! 	  [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl")
! 	   (match_operand:DI 1 "aarch64_reg_or_zero" "Z, rk, rk")
! 	   (match_operand:<V_INT_EQUIV> 2 "register_operand" "w, w, w")
! 	   (match_operand:DI 3 "const_int_operand")
! 	   (match_operand:DI 4 "aarch64_gather_scale_operand_d" "Ui1, Ui1, i")
! 	   (mem:BLK (scratch))]
! 	  UNSPEC_LD1_GATHER))]
!   "TARGET_SVE"
!   "@
!    ld1d\t%0.d, %5/z, [%2.d]
!    ld1d\t%0.d, %5/z, [%1, %2.d]
!    ld1d\t%0.d, %5/z, [%1, %2.d, lsl %p4]"
! )
! 
! ;; Unpredicated scatter store.
! (define_expand "scatter_store<mode>"
!   [(set (mem:BLK (scratch))
! 	(unspec:BLK
! 	  [(match_dup 5)
! 	   (match_operand:DI 0 "aarch64_reg_or_zero")
! 	   (match_operand:<V_INT_EQUIV> 1 "register_operand")
! 	   (match_operand:DI 2 "const_int_operand")
! 	   (match_operand:DI 3 "aarch64_gather_scale_operand_<Vesize>")
! 	   (match_operand:SVE_SD 4 "register_operand")]
! 	  UNSPEC_ST1_SCATTER))]
    "TARGET_SVE"
    {
!     operands[5] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Predicated scatter stores for 32-bit elements.  Operand 2 is true for
! ;; unsigned extension and false for signed extension.
! (define_insn "mask_scatter_store<mode>"
!   [(set (mem:BLK (scratch))
! 	(unspec:BLK
! 	  [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl, Upl, Upl")
! 	   (match_operand:DI 0 "aarch64_reg_or_zero" "Z, rk, rk, rk, rk")
! 	   (match_operand:<V_INT_EQUIV> 1 "register_operand" "w, w, w, w, w")
! 	   (match_operand:DI 2 "const_int_operand" "i, Z, Ui1, Z, Ui1")
! 	   (match_operand:DI 3 "aarch64_gather_scale_operand_w" "Ui1, Ui1, Ui1, i, i")
! 	   (match_operand:SVE_S 4 "register_operand" "w, w, w, w, w")]
! 	  UNSPEC_ST1_SCATTER))]
!   "TARGET_SVE"
!   "@
!    st1w\t%4.s, %5, [%1.s]
!    st1w\t%4.s, %5, [%0, %1.s, sxtw]
!    st1w\t%4.s, %5, [%0, %1.s, uxtw]
!    st1w\t%4.s, %5, [%0, %1.s, sxtw %p3]
!    st1w\t%4.s, %5, [%0, %1.s, uxtw %p3]"
! )
! 
! ;; Predicated scatter stores for 64-bit elements.  The value of operand 2
! ;; doesn't matter in this case.
! (define_insn "mask_scatter_store<mode>"
!   [(set (mem:BLK (scratch))
! 	(unspec:BLK
! 	  [(match_operand:<VPRED> 5 "register_operand" "Upl, Upl, Upl")
! 	   (match_operand:DI 0 "aarch64_reg_or_zero" "Z, rk, rk")
! 	   (match_operand:<V_INT_EQUIV> 1 "register_operand" "w, w, w")
! 	   (match_operand:DI 2 "const_int_operand")
! 	   (match_operand:DI 3 "aarch64_gather_scale_operand_d" "Ui1, Ui1, i")
! 	   (match_operand:SVE_D 4 "register_operand" "w, w, w")]
! 	  UNSPEC_ST1_SCATTER))]
!   "TARGET_SVE"
!   "@
!    st1d\t%4.d, %5, [%1.d]
!    st1d\t%4.d, %5, [%0, %1.d]
!    st1d\t%4.d, %5, [%0, %1.d, lsl %p3]"
! )
  
- ;; SVE structure moves.
  (define_expand "mov<mode>"
    [(set (match_operand:SVE_STRUCT 0 "nonimmediate_operand")
  	(match_operand:SVE_STRUCT 1 "general_operand"))]
--- 650,738 ----
    }
  )
  
! ;; A predicated move in which the predicate is known to be all-true.
! ;; Note that this pattern is generated directly by aarch64_emit_sve_pred_move,
! ;; so changes to this pattern will need changes there as well.
  (define_insn_and_split "@aarch64_pred_mov<mode>"
    [(set (match_operand:SVE_ALL 0 "nonimmediate_operand" "=w, w, m")
  	(unspec:SVE_ALL
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
  	   (match_operand:SVE_ALL 2 "nonimmediate_operand" "w, m, w")]
! 	  UNSPEC_PRED_X))]
    "TARGET_SVE
     && (register_operand (operands[0], <MODE>mode)
         || register_operand (operands[2], <MODE>mode))"
    "@
     #
!    ld1<Vesize>\t%0.<Vctype>, %1/z, %2
!    st1<Vesize>\t%2.<Vctype>, %1, %0"
    "&& register_operand (operands[0], <MODE>mode)
     && register_operand (operands[2], <MODE>mode)"
    [(set (match_dup 0) (match_dup 2))]
  )
  
! ;; A pattern for optimizing SUBREGs that have a reinterpreting effect
! ;; on big-endian targets; see aarch64_maybe_expand_sve_subreg_move
! ;; for details.  We use a special predicate for operand 2 to reduce
! ;; the number of patterns.
! (define_insn_and_split "*aarch64_sve_mov<mode>_subreg_be"
!   [(set (match_operand:SVE_ALL 0 "aarch64_sve_nonimmediate_operand" "=w")
! 	(unspec:SVE_ALL
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upl")
! 	   (match_operand 2 "aarch64_any_register_operand" "w")]
! 	  UNSPEC_REV_SUBREG))]
!   "TARGET_SVE && BYTES_BIG_ENDIAN"
!   "#"
!   "&& reload_completed"
!   [(const_int 0)]
    {
!     aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
      DONE;
    }
  )
  
! ;; Reinterpret operand 1 in operand 0's mode, without changing its contents.
! ;; This is equivalent to a subreg on little-endian targets but not for
! ;; big-endian; see the comment at the head of the file for details.
! (define_expand "@aarch64_sve_reinterpret<mode>"
!   [(set (match_operand:SVE_ALL 0 "register_operand")
  	(unspec:SVE_ALL
! 	  [(match_operand 1 "aarch64_any_register_operand")]
! 	  UNSPEC_REINTERPRET))]
    "TARGET_SVE"
    {
!     machine_mode src_mode = GET_MODE (operands[1]);
!     if (targetm.can_change_mode_class (<MODE>mode, src_mode, FP_REGS))
!       {
! 	emit_move_insn (operands[0], gen_lowpart (<MODE>mode, operands[1]));
! 	DONE;
!       }
    }
  )
  
! ;; A pattern for handling type punning on big-endian targets.  We use a
! ;; special predicate for operand 1 to reduce the number of patterns.
! (define_insn_and_split "*aarch64_sve_reinterpret<mode>"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w")
! 	(unspec:SVE_ALL
! 	  [(match_operand 1 "aarch64_any_register_operand" "w")]
! 	  UNSPEC_REINTERPRET))]
    "TARGET_SVE"
+   "#"
+   "&& reload_completed"
+   [(set (match_dup 0) (match_dup 1))]
    {
!     operands[1] = aarch64_replace_reg_mode (operands[1], <MODE>mode);
    }
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- Moves of multiple vectors
! ;; -------------------------------------------------------------------------
! ;; All patterns in this section are synthetic and split to real
! ;; instructions after reload.
! ;; -------------------------------------------------------------------------
  
  (define_expand "mov<mode>"
    [(set (match_operand:SVE_STRUCT 0 "nonimmediate_operand")
  	(match_operand:SVE_STRUCT 1 "general_operand"))]
***************
*** 368,374 ****
  
  ;; Unpredicated structure moves (big-endian).  Memory accesses require
  ;; secondary reloads.
! (define_insn "*aarch64_sve_mov<mode>_le"
    [(set (match_operand:SVE_STRUCT 0 "register_operand" "=w, w")
  	(match_operand:SVE_STRUCT 1 "aarch64_nonmemory_operand" "w, Dn"))]
    "TARGET_SVE && BYTES_BIG_ENDIAN"
--- 767,773 ----
  
  ;; Unpredicated structure moves (big-endian).  Memory accesses require
  ;; secondary reloads.
! (define_insn "*aarch64_sve_mov<mode>_be"
    [(set (match_operand:SVE_STRUCT 0 "register_operand" "=w, w")
  	(match_operand:SVE_STRUCT 1 "aarch64_nonmemory_operand" "w, Dn"))]
    "TARGET_SVE && BYTES_BIG_ENDIAN"
***************
*** 409,415 ****
  	(unspec:SVE_STRUCT
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
  	   (match_operand:SVE_STRUCT 2 "aarch64_sve_struct_nonimmediate_operand" "w, Utx, w")]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE
     && (register_operand (operands[0], <MODE>mode)
         || register_operand (operands[2], <MODE>mode))"
--- 808,814 ----
  	(unspec:SVE_STRUCT
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
  	   (match_operand:SVE_STRUCT 2 "aarch64_sve_struct_nonimmediate_operand" "w, Utx, w")]
! 	  UNSPEC_PRED_X))]
    "TARGET_SVE
     && (register_operand (operands[0], <MODE>mode)
         || register_operand (operands[2], <MODE>mode))"
***************
*** 432,437 ****
--- 831,848 ----
    [(set_attr "length" "<insn_length>")]
  )
  
+ ;; -------------------------------------------------------------------------
+ ;; ---- Moves of predicates
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - MOV
+ ;; - LDR
+ ;; - PFALSE
+ ;; - PTRUE
+ ;; - PTRUES
+ ;; - STR
+ ;; -------------------------------------------------------------------------
+ 
  (define_expand "mov<mode>"
    [(set (match_operand:PRED_ALL 0 "nonimmediate_operand")
  	(match_operand:PRED_ALL 1 "general_operand"))]
***************
*** 439,450 ****
    {
      if (GET_CODE (operands[0]) == MEM)
        operands[1] = force_reg (<MODE>mode, operands[1]);
    }
  )
  
  (define_insn "*aarch64_sve_mov<mode>"
!   [(set (match_operand:PRED_ALL 0 "nonimmediate_operand" "=Upa, m, Upa, Upa, Upa")
! 	(match_operand:PRED_ALL 1 "general_operand" "Upa, Upa, m, Dz, Dm"))]
    "TARGET_SVE
     && (register_operand (operands[0], <MODE>mode)
         || register_operand (operands[1], <MODE>mode))"
--- 850,867 ----
    {
      if (GET_CODE (operands[0]) == MEM)
        operands[1] = force_reg (<MODE>mode, operands[1]);
+ 
+     if (CONSTANT_P (operands[1]))
+       {
+ 	aarch64_expand_mov_immediate (operands[0], operands[1]);
+ 	DONE;
+       }
    }
  )
  
  (define_insn "*aarch64_sve_mov<mode>"
!   [(set (match_operand:PRED_ALL 0 "nonimmediate_operand" "=Upa, m, Upa, Upa")
! 	(match_operand:PRED_ALL 1 "aarch64_mov_operand" "Upa, Upa, m, Dn"))]
    "TARGET_SVE
     && (register_operand (operands[0], <MODE>mode)
         || register_operand (operands[1], <MODE>mode))"
***************
*** 452,484 ****
     mov\t%0.b, %1.b
     str\t%1, %0
     ldr\t%0, %1
!    pfalse\t%0.b
!    * return aarch64_output_ptrue (<MODE>mode, '<Vetype>');"
  )
  
! ;; Handle extractions from a predicate by converting to an integer vector
! ;; and extracting from there.
! (define_expand "vec_extract<vpred><Vel>"
!   [(match_operand:<VEL> 0 "register_operand")
!    (match_operand:<VPRED> 1 "register_operand")
!    (match_operand:SI 2 "nonmemory_operand")
!    ;; Dummy operand to which we can attach the iterator.
!    (reg:SVE_I V0_REGNUM)]
    "TARGET_SVE"
    {
!     rtx tmp = gen_reg_rtx (<MODE>mode);
!     emit_insn (gen_aarch64_sve_dup<mode>_const (tmp, operands[1],
! 						CONST1_RTX (<MODE>mode),
! 						CONST0_RTX (<MODE>mode)));
!     emit_insn (gen_vec_extract<mode><Vel> (operands[0], tmp, operands[2]));
      DONE;
    }
  )
  
  (define_expand "vec_extract<mode><Vel>"
    [(set (match_operand:<VEL> 0 "register_operand")
  	(vec_select:<VEL>
! 	  (match_operand:SVE_ALL 1 "register_operand")
  	  (parallel [(match_operand:SI 2 "nonmemory_operand")])))]
    "TARGET_SVE"
    {
--- 869,2633 ----
     mov\t%0.b, %1.b
     str\t%1, %0
     ldr\t%0, %1
!    * return aarch64_output_sve_mov_immediate (operands[1]);"
  )
  
! ;; Match PTRUES Pn.B when both the predicate and flags are useful.
! (define_insn_and_rewrite "*aarch64_sve_ptruevnx16bi_cc"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand 2)
! 	   (match_operand 3)
! 	   (const_int SVE_KNOWN_PTRUE)
! 	   (match_operator:VNx16BI 1 "aarch64_sve_ptrue_svpattern_immediate"
! 	     [(unspec:VNx16BI
! 		[(match_operand:SI 4 "const_int_operand")
! 		 (match_operand:VNx16BI 5 "aarch64_simd_imm_zero")]
! 		UNSPEC_PTRUE)])]
! 	  UNSPEC_PTEST))
!    (set (match_operand:VNx16BI 0 "register_operand" "=Upa")
! 	(match_dup 1))]
    "TARGET_SVE"
    {
!     return aarch64_output_sve_ptrues (operands[1]);
!   }
!   "&& (!CONSTANT_P (operands[2]) || !CONSTANT_P (operands[3]))"
!   {
!     operands[2] = operands[3] = CONSTM1_RTX (VNx16BImode);
!   }
! )
! 
! ;; Match PTRUES Pn.[HSD] when both the predicate and flags are useful.
! (define_insn_and_rewrite "*aarch64_sve_ptrue<mode>_cc"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand 2)
! 	   (match_operand 3)
! 	   (const_int SVE_KNOWN_PTRUE)
! 	   (subreg:PRED_HSD
! 	     (match_operator:VNx16BI 1 "aarch64_sve_ptrue_svpattern_immediate"
! 	       [(unspec:VNx16BI
! 		  [(match_operand:SI 4 "const_int_operand")
! 		   (match_operand:PRED_HSD 5 "aarch64_simd_imm_zero")]
! 		  UNSPEC_PTRUE)]) 0)]
! 	  UNSPEC_PTEST))
!    (set (match_operand:VNx16BI 0 "register_operand" "=Upa")
! 	(match_dup 1))]
!   "TARGET_SVE"
!   {
!     return aarch64_output_sve_ptrues (operands[1]);
!   }
!   "&& (!CONSTANT_P (operands[2]) || !CONSTANT_P (operands[3]))"
!   {
!     operands[2] = CONSTM1_RTX (VNx16BImode);
!     operands[3] = CONSTM1_RTX (<MODE>mode);
!   }
! )
! 
! ;; Match PTRUES Pn.B when only the flags result is useful (which is
! ;; a way of testing VL).
! (define_insn_and_rewrite "*aarch64_sve_ptruevnx16bi_ptest"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand 2)
! 	   (match_operand 3)
! 	   (const_int SVE_KNOWN_PTRUE)
! 	   (match_operator:VNx16BI 1 "aarch64_sve_ptrue_svpattern_immediate"
! 	     [(unspec:VNx16BI
! 		[(match_operand:SI 4 "const_int_operand")
! 		 (match_operand:VNx16BI 5 "aarch64_simd_imm_zero")]
! 		UNSPEC_PTRUE)])]
! 	  UNSPEC_PTEST))
!    (clobber (match_scratch:VNx16BI 0 "=Upa"))]
!   "TARGET_SVE"
!   {
!     return aarch64_output_sve_ptrues (operands[1]);
!   }
!   "&& (!CONSTANT_P (operands[2]) || !CONSTANT_P (operands[3]))"
!   {
!     operands[2] = operands[3] = CONSTM1_RTX (VNx16BImode);
!   }
! )
! 
! ;; Match PTRUES Pn.[HWD] when only the flags result is useful (which is
! ;; a way of testing VL).
! (define_insn_and_rewrite "*aarch64_sve_ptrue<mode>_ptest"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand 2)
! 	   (match_operand 3)
! 	   (const_int SVE_KNOWN_PTRUE)
! 	   (subreg:PRED_HSD
! 	     (match_operator:VNx16BI 1 "aarch64_sve_ptrue_svpattern_immediate"
! 	       [(unspec:VNx16BI
! 		  [(match_operand:SI 4 "const_int_operand")
! 		   (match_operand:PRED_HSD 5 "aarch64_simd_imm_zero")]
! 		  UNSPEC_PTRUE)]) 0)]
! 	  UNSPEC_PTEST))
!    (clobber (match_scratch:VNx16BI 0 "=Upa"))]
!   "TARGET_SVE"
!   {
!     return aarch64_output_sve_ptrues (operands[1]);
!   }
!   "&& (!CONSTANT_P (operands[2]) || !CONSTANT_P (operands[3]))"
!   {
!     operands[2] = CONSTM1_RTX (VNx16BImode);
!     operands[3] = CONSTM1_RTX (<MODE>mode);
!   }
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- Moves relating to the FFR
! ;; -------------------------------------------------------------------------
! ;; RDFFR
! ;; RDFFRS
! ;; SETFFR
! ;; WRFFR
! ;; -------------------------------------------------------------------------
! 
! ;; [W1 in the block comment above about FFR handling]
! ;;
! ;; Write to the FFR and start a new FFRT scheduling region.
! (define_insn "aarch64_wrffr"
!   [(set (reg:VNx16BI FFR_REGNUM)
! 	(match_operand:VNx16BI 0 "aarch64_simd_reg_or_minus_one" "Dm, Upa"))
!    (set (reg:VNx16BI FFRT_REGNUM)
! 	(unspec:VNx16BI [(match_dup 0)] UNSPEC_WRFFR))]
!   "TARGET_SVE"
!   "@
!    setffr
!    wrffr\t%0.b"
! )
! 
! ;; [L2 in the block comment above about FFR handling]
! ;;
! ;; Introduce a read from and write to the FFR in the current FFRT region,
! ;; so that the FFR value is live on entry to the region and so that the FFR
! ;; value visibly changes within the region.  This is used (possibly multiple
! ;; times) in an FFRT region that includes LDFF1 or LDNF1 instructions.
! (define_insn "aarch64_update_ffr_for_load"
!   [(set (reg:VNx16BI FFR_REGNUM)
! 	(unspec:VNx16BI [(reg:VNx16BI FFRT_REGNUM)
! 			 (reg:VNx16BI FFR_REGNUM)] UNSPEC_UPDATE_FFR))]
!   "TARGET_SVE"
!   ""
!   [(set_attr "type" "no_insn")]
! )
! 
! ;; [R1 in the block comment above about FFR handling]
! ;;
! ;; Notionally copy the FFR to the FFRT, so that the current FFR value
! ;; can be read from there by the RDFFR instructions below.  This acts
! ;; as a scheduling barrier for earlier LDFF1 and LDNF1 instructions and
! ;; creates a natural dependency with earlier writes.
! (define_insn "aarch64_copy_ffr_to_ffrt"
!   [(set (reg:VNx16BI FFRT_REGNUM)
! 	(reg:VNx16BI FFR_REGNUM))]
!   "TARGET_SVE"
!   ""
!   [(set_attr "type" "no_insn")]
! )
! 
! ;; [R2 in the block comment above about FFR handling]
! ;;
! ;; Read the FFR via the FFRT.
! (define_insn "aarch64_rdffr"
!   [(set (match_operand:VNx16BI 0 "register_operand" "=Upa")
! 	(reg:VNx16BI FFRT_REGNUM))]
!   "TARGET_SVE"
!   "rdffr\t%0.b"
! )
! 
! ;; Likewise with zero predication.
! (define_insn "aarch64_rdffr_z"
!   [(set (match_operand:VNx16BI 0 "register_operand" "=Upa")
! 	(and:VNx16BI
! 	  (reg:VNx16BI FFRT_REGNUM)
! 	  (match_operand:VNx16BI 1 "register_operand" "Upa")))]
!   "TARGET_SVE"
!   "rdffr\t%0.b, %1/z"
! )
! 
! ;; Read the FFR to test for a fault, without using the predicate result.
! (define_insn "*aarch64_rdffr_z_ptest"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
! 	   (match_dup 1)
! 	   (match_operand:SI 2 "aarch64_sve_ptrue_flag")
! 	   (and:VNx16BI
! 	     (reg:VNx16BI FFRT_REGNUM)
! 	     (match_dup 1))]
! 	  UNSPEC_PTEST))
!    (clobber (match_scratch:VNx16BI 0 "=Upa"))]
!   "TARGET_SVE"
!   "rdffrs\t%0.b, %1/z"
! )
! 
! ;; Same for unpredicated RDFFR when tested with a known PTRUE.
! (define_insn "*aarch64_rdffr_ptest"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
! 	   (match_dup 1)
! 	   (const_int SVE_KNOWN_PTRUE)
! 	   (reg:VNx16BI FFRT_REGNUM)]
! 	  UNSPEC_PTEST))
!    (clobber (match_scratch:VNx16BI 0 "=Upa"))]
!   "TARGET_SVE"
!   "rdffrs\t%0.b, %1/z"
! )
! 
! ;; Read the FFR with zero predication and test the result.
! (define_insn "*aarch64_rdffr_z_cc"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
! 	   (match_dup 1)
! 	   (match_operand:SI 2 "aarch64_sve_ptrue_flag")
! 	   (and:VNx16BI
! 	     (reg:VNx16BI FFRT_REGNUM)
! 	     (match_dup 1))]
! 	  UNSPEC_PTEST))
!    (set (match_operand:VNx16BI 0 "register_operand" "=Upa")
! 	(and:VNx16BI
! 	  (reg:VNx16BI FFRT_REGNUM)
! 	  (match_dup 1)))]
!   "TARGET_SVE"
!   "rdffrs\t%0.b, %1/z"
! )
! 
! ;; Same for unpredicated RDFFR when tested with a known PTRUE.
! (define_insn "*aarch64_rdffr_cc"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
! 	   (match_dup 1)
! 	   (const_int SVE_KNOWN_PTRUE)
! 	   (reg:VNx16BI FFRT_REGNUM)]
! 	  UNSPEC_PTEST))
!    (set (match_operand:VNx16BI 0 "register_operand" "=Upa")
! 	(reg:VNx16BI FFRT_REGNUM))]
!   "TARGET_SVE"
!   "rdffrs\t%0.b, %1/z"
! )
! 
! ;; [R3 in the block comment above about FFR handling]
! ;;
! ;; Arbitrarily update the FFRT after a read from the FFR.  This acts as
! ;; a scheduling barrier for later LDFF1 and LDNF1 instructions.
! (define_insn "aarch64_update_ffrt"
!   [(set (reg:VNx16BI FFRT_REGNUM)
! 	(unspec:VNx16BI [(reg:VNx16BI FFRT_REGNUM)] UNSPEC_UPDATE_FFRT))]
!   "TARGET_SVE"
!   ""
!   [(set_attr "type" "no_insn")]
! )
! 
! ;; =========================================================================
! ;; == Loads
! ;; =========================================================================
! 
! ;; -------------------------------------------------------------------------
! ;; ---- Normal contiguous loads
! ;; -------------------------------------------------------------------------
! ;; Includes contiguous forms of:
! ;; - LD1B
! ;; - LD1D
! ;; - LD1H
! ;; - LD1W
! ;; - LD2B
! ;; - LD2D
! ;; - LD2H
! ;; - LD2W
! ;; - LD3B
! ;; - LD3D
! ;; - LD3H
! ;; - LD3W
! ;; - LD4B
! ;; - LD4D
! ;; - LD4H
! ;; - LD4W
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated LD1.
! (define_insn "maskload<mode><vpred>"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w")
! 	(unspec:SVE_ALL
! 	  [(match_operand:<VPRED> 2 "register_operand" "Upl")
! 	   (match_operand:SVE_ALL 1 "memory_operand" "m")]
! 	  UNSPEC_LD1_SVE))]
!   "TARGET_SVE"
!   "ld1<Vesize>\t%0.<Vctype>, %2/z, %1"
! )
! 
! ;; Unpredicated LD[234].
! (define_expand "vec_load_lanes<mode><vsingle>"
!   [(set (match_operand:SVE_STRUCT 0 "register_operand")
! 	(unspec:SVE_STRUCT
! 	  [(match_dup 2)
! 	   (match_operand:SVE_STRUCT 1 "memory_operand")]
! 	  UNSPEC_LDN))]
!   "TARGET_SVE"
!   {
!     operands[2] = aarch64_ptrue_reg (<VPRED>mode);
!   }
! )
! 
! ;; Predicated LD[234].
! (define_insn "vec_mask_load_lanes<mode><vsingle>"
!   [(set (match_operand:SVE_STRUCT 0 "register_operand" "=w")
! 	(unspec:SVE_STRUCT
! 	  [(match_operand:<VPRED> 2 "register_operand" "Upl")
! 	   (match_operand:SVE_STRUCT 1 "memory_operand" "m")]
! 	  UNSPEC_LDN))]
!   "TARGET_SVE"
!   "ld<vector_count><Vesize>\t%0, %2/z, %1"
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- Extending contiguous loads
! ;; -------------------------------------------------------------------------
! ;; Includes contiguous forms of:
! ;; LD1B
! ;; LD1H
! ;; LD1SB
! ;; LD1SH
! ;; LD1SW
! ;; LD1W
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated load and extend, with 8 elements per 128-bit block.
! (define_insn_and_rewrite "@aarch64_load_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PARTIAL_I:mode>"
!   [(set (match_operand:SVE_HSDI 0 "register_operand" "=w")
! 	(unspec:SVE_HSDI
! 	  [(match_operand:<SVE_HSDI:VPRED> 3 "general_operand" "UplDnm")
! 	   (ANY_EXTEND:SVE_HSDI
! 	     (unspec:SVE_PARTIAL_I
! 	       [(match_operand:<SVE_PARTIAL_I:VPRED> 2 "register_operand" "Upl")
! 		(match_operand:SVE_PARTIAL_I 1 "memory_operand" "m")]
! 	       UNSPEC_LD1_SVE))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE && (~<SVE_HSDI:narrower_mask> & <SVE_PARTIAL_I:self_mask>) == 0"
!   "ld1<ANY_EXTEND:s><SVE_PARTIAL_I:Vesize>\t%0.<SVE_HSDI:Vctype>, %2/z, %1"
!   "&& !CONSTANT_P (operands[3])"
!   {
!     operands[3] = CONSTM1_RTX (<SVE_HSDI:VPRED>mode);
!   }
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- First-faulting contiguous loads
! ;; -------------------------------------------------------------------------
! ;; Includes contiguous forms of:
! ;; - LDFF1B
! ;; - LDFF1D
! ;; - LDFF1H
! ;; - LDFF1W
! ;; - LDNF1B
! ;; - LDNF1D
! ;; - LDNF1H
! ;; - LDNF1W
! ;; -------------------------------------------------------------------------
! 
! ;; Contiguous non-extending first-faulting or non-faulting loads.
! (define_insn "@aarch64_ld<fn>f1<mode>"
!   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
! 	(unspec:SVE_FULL
! 	  [(match_operand:<VPRED> 2 "register_operand" "Upl")
! 	   (match_operand:SVE_FULL 1 "aarch64_sve_ld<fn>f1_operand" "Ut<fn>")
! 	   (reg:VNx16BI FFRT_REGNUM)]
! 	  SVE_LDFF1_LDNF1))]
!   "TARGET_SVE"
!   "ld<fn>f1<Vesize>\t%0.<Vetype>, %2/z, %1"
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- First-faulting extending contiguous loads
! ;; -------------------------------------------------------------------------
! ;; Includes contiguous forms of:
! ;; - LDFF1B
! ;; - LDFF1H
! ;; - LDFF1SB
! ;; - LDFF1SH
! ;; - LDFF1SW
! ;; - LDFF1W
! ;; - LDNF1B
! ;; - LDNF1H
! ;; - LDNF1SB
! ;; - LDNF1SH
! ;; - LDNF1SW
! ;; - LDNF1W
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated first-faulting or non-faulting load and extend.
! (define_insn_and_rewrite "@aarch64_ld<fn>f1_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PARTIAL_I:mode>"
!   [(set (match_operand:SVE_HSDI 0 "register_operand" "=w")
! 	(unspec:SVE_HSDI
! 	  [(match_operand:<SVE_HSDI:VPRED> 3 "general_operand" "UplDnm")
! 	   (ANY_EXTEND:SVE_HSDI
! 	     (unspec:SVE_PARTIAL_I
! 	       [(match_operand:<SVE_PARTIAL_I:VPRED> 2 "register_operand" "Upl")
! 		(match_operand:SVE_PARTIAL_I 1 "aarch64_sve_ld<fn>f1_operand" "Ut<fn>")
! 		(reg:VNx16BI FFRT_REGNUM)]
! 	       SVE_LDFF1_LDNF1))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE && (~<SVE_HSDI:narrower_mask> & <SVE_PARTIAL_I:self_mask>) == 0"
!   "ld<fn>f1<ANY_EXTEND:s><SVE_PARTIAL_I:Vesize>\t%0.<SVE_HSDI:Vctype>, %2/z, %1"
!   "&& !CONSTANT_P (operands[3])"
!   {
!     operands[3] = CONSTM1_RTX (<SVE_HSDI:VPRED>mode);
!   }
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- Non-temporal contiguous loads
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - LDNT1B
! ;; - LDNT1D
! ;; - LDNT1H
! ;; - LDNT1W
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated contiguous non-temporal load.
! (define_insn "@aarch64_ldnt1<mode>"
!   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
! 	(unspec:SVE_FULL
! 	  [(match_operand:<VPRED> 2 "register_operand" "Upl")
! 	   (match_operand:SVE_FULL 1 "memory_operand" "m")]
! 	  UNSPEC_LDNT1_SVE))]
!   "TARGET_SVE"
!   "ldnt1<Vesize>\t%0.<Vetype>, %2/z, %1"
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- Normal gather loads
! ;; -------------------------------------------------------------------------
! ;; Includes gather forms of:
! ;; - LD1D
! ;; - LD1W
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated gather loads.
! (define_expand "gather_load<mode><v_int_container>"
!   [(set (match_operand:SVE_24 0 "register_operand")
! 	(unspec:SVE_24
! 	  [(match_dup 5)
! 	   (match_operand:DI 1 "aarch64_sve_gather_offset_<Vesize>")
! 	   (match_operand:<V_INT_CONTAINER> 2 "register_operand")
! 	   (match_operand:DI 3 "const_int_operand")
! 	   (match_operand:DI 4 "aarch64_gather_scale_operand_<Vesize>")
! 	   (mem:BLK (scratch))]
! 	  UNSPEC_LD1_GATHER))]
!   "TARGET_SVE"
!   {
!     operands[5] = aarch64_ptrue_reg (<VPRED>mode);
!   }
! )
! 
! ;; Predicated gather loads for 32-bit elements.  Operand 3 is true for
! ;; unsigned extension and false for signed extension.
! (define_insn "mask_gather_load<mode><v_int_container>"
!   [(set (match_operand:SVE_4 0 "register_operand" "=w, w, w, w, w, w")
! 	(unspec:SVE_4
! 	  [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
! 	   (match_operand:DI 1 "aarch64_sve_gather_offset_<Vesize>" "Z, vgw, rk, rk, rk, rk")
! 	   (match_operand:VNx4SI 2 "register_operand" "w, w, w, w, w, w")
! 	   (match_operand:DI 3 "const_int_operand" "Ui1, Ui1, Z, Ui1, Z, Ui1")
! 	   (match_operand:DI 4 "aarch64_gather_scale_operand_<Vesize>" "Ui1, Ui1, Ui1, Ui1, i, i")
! 	   (mem:BLK (scratch))]
! 	  UNSPEC_LD1_GATHER))]
!   "TARGET_SVE"
!   "@
!    ld1<Vesize>\t%0.s, %5/z, [%2.s]
!    ld1<Vesize>\t%0.s, %5/z, [%2.s, #%1]
!    ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw]
!    ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw]
!    ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw %p4]
!    ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw %p4]"
! )
! 
! ;; Predicated gather loads for 64-bit elements.  The value of operand 3
! ;; doesn't matter in this case.
! (define_insn "mask_gather_load<mode><v_int_container>"
!   [(set (match_operand:SVE_2 0 "register_operand" "=w, w, w, w")
! 	(unspec:SVE_2
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl, Upl, Upl")
! 	   (match_operand:DI 1 "aarch64_sve_gather_offset_<Vesize>" "Z, vgd, rk, rk")
! 	   (match_operand:VNx2DI 2 "register_operand" "w, w, w, w")
! 	   (match_operand:DI 3 "const_int_operand")
! 	   (match_operand:DI 4 "aarch64_gather_scale_operand_<Vesize>" "Ui1, Ui1, Ui1, i")
! 	   (mem:BLK (scratch))]
! 	  UNSPEC_LD1_GATHER))]
!   "TARGET_SVE"
!   "@
!    ld1<Vesize>\t%0.d, %5/z, [%2.d]
!    ld1<Vesize>\t%0.d, %5/z, [%2.d, #%1]
!    ld1<Vesize>\t%0.d, %5/z, [%1, %2.d]
!    ld1<Vesize>\t%0.d, %5/z, [%1, %2.d, lsl %p4]"
! )
! 
! ;; Likewise, but with the offset being extended from 32 bits.
! (define_insn_and_rewrite "*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked"
!   [(set (match_operand:SVE_2 0 "register_operand" "=w, w")
! 	(unspec:SVE_2
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 	   (match_operand:DI 1 "register_operand" "rk, rk")
! 	   (unspec:VNx2DI
! 	     [(match_operand 6)
! 	      (ANY_EXTEND:VNx2DI
! 		(match_operand:VNx2SI 2 "register_operand" "w, w"))]
! 	     UNSPEC_PRED_X)
! 	   (match_operand:DI 3 "const_int_operand")
! 	   (match_operand:DI 4 "aarch64_gather_scale_operand_<Vesize>" "Ui1, i")
! 	   (mem:BLK (scratch))]
! 	  UNSPEC_LD1_GATHER))]
!   "TARGET_SVE"
!   "@
!    ld1<Vesize>\t%0.d, %5/z, [%1, %2.d, <su>xtw]
!    ld1<Vesize>\t%0.d, %5/z, [%1, %2.d, <su>xtw %p4]"
!   "&& !CONSTANT_P (operands[6])"
!   {
!     operands[6] = CONSTM1_RTX (VNx2BImode);
!   }
! )
! 
! ;; Likewise, but with the offset being truncated to 32 bits and then
! ;; sign-extended.
! (define_insn_and_rewrite "*mask_gather_load<mode><v_int_container>_sxtw"
!   [(set (match_operand:SVE_2 0 "register_operand" "=w, w")
! 	(unspec:SVE_2
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 	   (match_operand:DI 1 "register_operand" "rk, rk")
! 	   (unspec:VNx2DI
! 	     [(match_operand 6)
! 	      (sign_extend:VNx2DI
! 		(truncate:VNx2SI
! 		  (match_operand:VNx2DI 2 "register_operand" "w, w")))]
! 	     UNSPEC_PRED_X)
! 	   (match_operand:DI 3 "const_int_operand")
! 	   (match_operand:DI 4 "aarch64_gather_scale_operand_<Vesize>" "Ui1, i")
! 	   (mem:BLK (scratch))]
! 	  UNSPEC_LD1_GATHER))]
!   "TARGET_SVE"
!   "@
!    ld1<Vesize>\t%0.d, %5/z, [%1, %2.d, sxtw]
!    ld1<Vesize>\t%0.d, %5/z, [%1, %2.d, sxtw %p4]"
!   "&& !CONSTANT_P (operands[6])"
!   {
!     operands[6] = CONSTM1_RTX (VNx2BImode);
!   }
! )
! 
! ;; Likewise, but with the offset being truncated to 32 bits and then
! ;; zero-extended.
! (define_insn "*mask_gather_load<mode><v_int_container>_uxtw"
!   [(set (match_operand:SVE_2 0 "register_operand" "=w, w")
! 	(unspec:SVE_2
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 	   (match_operand:DI 1 "register_operand" "rk, rk")
! 	   (and:VNx2DI
! 	     (match_operand:VNx2DI 2 "register_operand" "w, w")
! 	     (match_operand:VNx2DI 6 "aarch64_sve_uxtw_immediate"))
! 	   (match_operand:DI 3 "const_int_operand")
! 	   (match_operand:DI 4 "aarch64_gather_scale_operand_<Vesize>" "Ui1, i")
! 	   (mem:BLK (scratch))]
! 	  UNSPEC_LD1_GATHER))]
!   "TARGET_SVE"
!   "@
!    ld1<Vesize>\t%0.d, %5/z, [%1, %2.d, uxtw]
!    ld1<Vesize>\t%0.d, %5/z, [%1, %2.d, uxtw %p4]"
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- Extending gather loads
! ;; -------------------------------------------------------------------------
! ;; Includes gather forms of:
! ;; - LD1B
! ;; - LD1H
! ;; - LD1SB
! ;; - LD1SH
! ;; - LD1SW
! ;; - LD1W
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated extending gather loads for 32-bit elements.  Operand 3 is
! ;; true for unsigned extension and false for signed extension.
! (define_insn_and_rewrite "@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>"
!   [(set (match_operand:SVE_4HSI 0 "register_operand" "=w, w, w, w, w, w")
! 	(unspec:SVE_4HSI
! 	  [(match_operand:VNx4BI 6 "general_operand" "UplDnm, UplDnm, UplDnm, UplDnm, UplDnm, UplDnm")
! 	   (ANY_EXTEND:SVE_4HSI
! 	     (unspec:SVE_4BHI
! 	       [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
! 		(match_operand:DI 1 "aarch64_sve_gather_offset_<SVE_4BHI:Vesize>" "Z, vg<SVE_4BHI:Vesize>, rk, rk, rk, rk")
! 		(match_operand:VNx4SI 2 "register_operand" "w, w, w, w, w, w")
! 		(match_operand:DI 3 "const_int_operand" "Ui1, Ui1, Z, Ui1, Z, Ui1")
! 		(match_operand:DI 4 "aarch64_gather_scale_operand_<SVE_4BHI:Vesize>" "Ui1, Ui1, Ui1, Ui1, i, i")
! 		(mem:BLK (scratch))]
! 	       UNSPEC_LD1_GATHER))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE && (~<SVE_4HSI:narrower_mask> & <SVE_4BHI:self_mask>) == 0"
!   "@
!    ld1<ANY_EXTEND:s><SVE_4BHI:Vesize>\t%0.s, %5/z, [%2.s]
!    ld1<ANY_EXTEND:s><SVE_4BHI:Vesize>\t%0.s, %5/z, [%2.s, #%1]
!    ld1<ANY_EXTEND:s><SVE_4BHI:Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw]
!    ld1<ANY_EXTEND:s><SVE_4BHI:Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw]
!    ld1<ANY_EXTEND:s><SVE_4BHI:Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw %p4]
!    ld1<ANY_EXTEND:s><SVE_4BHI:Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw %p4]"
!   "&& !CONSTANT_P (operands[6])"
!   {
!     operands[6] = CONSTM1_RTX (VNx4BImode);
!   }
! )
! 
! ;; Predicated extending gather loads for 64-bit elements.  The value of
! ;; operand 3 doesn't matter in this case.
! (define_insn_and_rewrite "@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>"
!   [(set (match_operand:SVE_2HSDI 0 "register_operand" "=w, w, w, w")
! 	(unspec:SVE_2HSDI
! 	  [(match_operand:VNx2BI 6 "general_operand" "UplDnm, UplDnm, UplDnm, UplDnm")
! 	   (ANY_EXTEND:SVE_2HSDI
! 	     (unspec:SVE_2BHSI
! 	       [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl, Upl, Upl")
! 		(match_operand:DI 1 "aarch64_sve_gather_offset_<SVE_2BHSI:Vesize>" "Z, vg<SVE_2BHSI:Vesize>, rk, rk")
! 		(match_operand:VNx2DI 2 "register_operand" "w, w, w, w")
! 		(match_operand:DI 3 "const_int_operand")
! 		(match_operand:DI 4 "aarch64_gather_scale_operand_<SVE_2BHSI:Vesize>" "Ui1, Ui1, Ui1, i")
! 		(mem:BLK (scratch))]
! 	       UNSPEC_LD1_GATHER))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE && (~<SVE_2HSDI:narrower_mask> & <SVE_2BHSI:self_mask>) == 0"
!   "@
!    ld1<ANY_EXTEND:s><SVE_2BHSI:Vesize>\t%0.d, %5/z, [%2.d]
!    ld1<ANY_EXTEND:s><SVE_2BHSI:Vesize>\t%0.d, %5/z, [%2.d, #%1]
!    ld1<ANY_EXTEND:s><SVE_2BHSI:Vesize>\t%0.d, %5/z, [%1, %2.d]
!    ld1<ANY_EXTEND:s><SVE_2BHSI:Vesize>\t%0.d, %5/z, [%1, %2.d, lsl %p4]"
!   "&& !CONSTANT_P (operands[6])"
!   {
!     operands[6] = CONSTM1_RTX (VNx2BImode);
!   }
! )
! 
! ;; Likewise, but with the offset being extended from 32 bits.
! (define_insn_and_rewrite "*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked"
!   [(set (match_operand:SVE_2HSDI 0 "register_operand" "=w, w")
! 	(unspec:SVE_2HSDI
! 	  [(match_operand 6)
! 	   (ANY_EXTEND:SVE_2HSDI
! 	     (unspec:SVE_2BHSI
! 	       [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 		(match_operand:DI 1 "aarch64_reg_or_zero" "rk, rk")
! 		(unspec:VNx2DI
! 		  [(match_operand 7)
! 		   (ANY_EXTEND2:VNx2DI
! 		     (match_operand:VNx2SI 2 "register_operand" "w, w"))]
! 		  UNSPEC_PRED_X)
! 		(match_operand:DI 3 "const_int_operand")
! 		(match_operand:DI 4 "aarch64_gather_scale_operand_<SVE_2BHSI:Vesize>" "Ui1, i")
! 		(mem:BLK (scratch))]
! 	       UNSPEC_LD1_GATHER))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE && (~<SVE_2HSDI:narrower_mask> & <SVE_2BHSI:self_mask>) == 0"
!   "@
!    ld1<ANY_EXTEND:s><SVE_2BHSI:Vesize>\t%0.d, %5/z, [%1, %2.d, <ANY_EXTEND2:su>xtw]
!    ld1<ANY_EXTEND:s><SVE_2BHSI:Vesize>\t%0.d, %5/z, [%1, %2.d, <ANY_EXTEND2:su>xtw %p4]"
!   "&& (!CONSTANT_P (operands[6]) || !CONSTANT_P (operands[7]))"
!   {
!     operands[6] = CONSTM1_RTX (VNx2BImode);
!     operands[7] = CONSTM1_RTX (VNx2BImode);
!   }
! )
! 
! ;; Likewise, but with the offset being truncated to 32 bits and then
! ;; sign-extended.
! (define_insn_and_rewrite "*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>_sxtw"
!   [(set (match_operand:SVE_2HSDI 0 "register_operand" "=w, w")
! 	(unspec:SVE_2HSDI
! 	  [(match_operand 6)
! 	   (ANY_EXTEND:SVE_2HSDI
! 	     (unspec:SVE_2BHSI
! 	       [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 		(match_operand:DI 1 "aarch64_reg_or_zero" "rk, rk")
! 		(unspec:VNx2DI
! 		  [(match_operand 7)
! 		   (sign_extend:VNx2DI
! 		     (truncate:VNx2SI
! 		       (match_operand:VNx2DI 2 "register_operand" "w, w")))]
! 		  UNSPEC_PRED_X)
! 		(match_operand:DI 3 "const_int_operand")
! 		(match_operand:DI 4 "aarch64_gather_scale_operand_<SVE_2BHSI:Vesize>" "Ui1, i")
! 		(mem:BLK (scratch))]
! 	       UNSPEC_LD1_GATHER))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE && (~<SVE_2HSDI:narrower_mask> & <SVE_2BHSI:self_mask>) == 0"
!   "@
!    ld1<ANY_EXTEND:s><SVE_2BHSI:Vesize>\t%0.d, %5/z, [%1, %2.d, sxtw]
!    ld1<ANY_EXTEND:s><SVE_2BHSI:Vesize>\t%0.d, %5/z, [%1, %2.d, sxtw %p4]"
!   "&& (!CONSTANT_P (operands[6]) || !CONSTANT_P (operands[7]))"
!   {
!     operands[6] = CONSTM1_RTX (VNx2BImode);
!     operands[7] = CONSTM1_RTX (VNx2BImode);
!   }
! )
! 
! ;; Likewise, but with the offset being truncated to 32 bits and then
! ;; zero-extended.
! (define_insn_and_rewrite "*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>_uxtw"
!   [(set (match_operand:SVE_2HSDI 0 "register_operand" "=w, w")
! 	(unspec:SVE_2HSDI
! 	  [(match_operand 7)
! 	   (ANY_EXTEND:SVE_2HSDI
! 	     (unspec:SVE_2BHSI
! 	       [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 		(match_operand:DI 1 "aarch64_reg_or_zero" "rk, rk")
! 		(and:VNx2DI
! 		  (match_operand:VNx2DI 2 "register_operand" "w, w")
! 		  (match_operand:VNx2DI 6 "aarch64_sve_uxtw_immediate"))
! 		(match_operand:DI 3 "const_int_operand")
! 		(match_operand:DI 4 "aarch64_gather_scale_operand_<SVE_2BHSI:Vesize>" "Ui1, i")
! 		(mem:BLK (scratch))]
! 	       UNSPEC_LD1_GATHER))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE && (~<SVE_2HSDI:narrower_mask> & <SVE_2BHSI:self_mask>) == 0"
!   "@
!    ld1<ANY_EXTEND:s><SVE_2BHSI:Vesize>\t%0.d, %5/z, [%1, %2.d, uxtw]
!    ld1<ANY_EXTEND:s><SVE_2BHSI:Vesize>\t%0.d, %5/z, [%1, %2.d, uxtw %p4]"
!   "&& !CONSTANT_P (operands[7])"
!   {
!     operands[7] = CONSTM1_RTX (VNx2BImode);
!   }
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- First-faulting gather loads
! ;; -------------------------------------------------------------------------
! ;; Includes gather forms of:
! ;; - LDFF1D
! ;; - LDFF1W
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated first-faulting gather loads for 32-bit elements.  Operand
! ;; 3 is true for unsigned extension and false for signed extension.
! (define_insn "@aarch64_ldff1_gather<mode>"
!   [(set (match_operand:SVE_FULL_S 0 "register_operand" "=w, w, w, w, w, w")
! 	(unspec:SVE_FULL_S
! 	  [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
! 	   (match_operand:DI 1 "aarch64_sve_gather_offset_w" "Z, vgw, rk, rk, rk, rk")
! 	   (match_operand:VNx4SI 2 "register_operand" "w, w, w, w, w, w")
! 	   (match_operand:DI 3 "const_int_operand" "i, i, Z, Ui1, Z, Ui1")
! 	   (match_operand:DI 4 "aarch64_gather_scale_operand_w" "Ui1, Ui1, Ui1, Ui1, i, i")
! 	   (mem:BLK (scratch))
! 	   (reg:VNx16BI FFRT_REGNUM)]
! 	  UNSPEC_LDFF1_GATHER))]
!   "TARGET_SVE"
!   "@
!    ldff1w\t%0.s, %5/z, [%2.s]
!    ldff1w\t%0.s, %5/z, [%2.s, #%1]
!    ldff1w\t%0.s, %5/z, [%1, %2.s, sxtw]
!    ldff1w\t%0.s, %5/z, [%1, %2.s, uxtw]
!    ldff1w\t%0.s, %5/z, [%1, %2.s, sxtw %p4]
!    ldff1w\t%0.s, %5/z, [%1, %2.s, uxtw %p4]"
! )
! 
! ;; Predicated first-faulting gather loads for 64-bit elements.  The value
! ;; of operand 3 doesn't matter in this case.
! (define_insn "@aarch64_ldff1_gather<mode>"
!   [(set (match_operand:SVE_FULL_D 0 "register_operand" "=w, w, w, w")
! 	(unspec:SVE_FULL_D
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl, Upl, Upl")
! 	   (match_operand:DI 1 "aarch64_sve_gather_offset_d" "Z, vgd, rk, rk")
! 	   (match_operand:VNx2DI 2 "register_operand" "w, w, w, w")
! 	   (match_operand:DI 3 "const_int_operand")
! 	   (match_operand:DI 4 "aarch64_gather_scale_operand_d" "Ui1, Ui1, Ui1, i")
! 	   (mem:BLK (scratch))
! 	   (reg:VNx16BI FFRT_REGNUM)]
! 	  UNSPEC_LDFF1_GATHER))]
!   "TARGET_SVE"
!   "@
!    ldff1d\t%0.d, %5/z, [%2.d]
!    ldff1d\t%0.d, %5/z, [%2.d, #%1]
!    ldff1d\t%0.d, %5/z, [%1, %2.d]
!    ldff1d\t%0.d, %5/z, [%1, %2.d, lsl %p4]"
! )
! 
! ;; Likewise, but with the offset being sign-extended from 32 bits.
! (define_insn_and_rewrite "*aarch64_ldff1_gather<mode>_sxtw"
!   [(set (match_operand:SVE_FULL_D 0 "register_operand" "=w, w")
! 	(unspec:SVE_FULL_D
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 	   (match_operand:DI 1 "register_operand" "rk, rk")
! 	   (unspec:VNx2DI
! 	     [(match_operand 6)
! 	      (sign_extend:VNx2DI
! 		(truncate:VNx2SI
! 		  (match_operand:VNx2DI 2 "register_operand" "w, w")))]
! 	     UNSPEC_PRED_X)
! 	   (match_operand:DI 3 "const_int_operand")
! 	   (match_operand:DI 4 "aarch64_gather_scale_operand_d" "Ui1, i")
! 	   (mem:BLK (scratch))
! 	   (reg:VNx16BI FFRT_REGNUM)]
! 	  UNSPEC_LDFF1_GATHER))]
!   "TARGET_SVE"
!   "@
!    ldff1d\t%0.d, %5/z, [%1, %2.d, sxtw]
!    ldff1d\t%0.d, %5/z, [%1, %2.d, sxtw %p4]"
!   "&& !CONSTANT_P (operands[6])"
!   {
!     operands[6] = CONSTM1_RTX (VNx2BImode);
!   }
! )
! 
! ;; Likewise, but with the offset being zero-extended from 32 bits.
! (define_insn "*aarch64_ldff1_gather<mode>_uxtw"
!   [(set (match_operand:SVE_FULL_D 0 "register_operand" "=w, w")
! 	(unspec:SVE_FULL_D
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 	   (match_operand:DI 1 "register_operand" "rk, rk")
! 	   (and:VNx2DI
! 	     (match_operand:VNx2DI 2 "register_operand" "w, w")
! 	     (match_operand:VNx2DI 6 "aarch64_sve_uxtw_immediate"))
! 	   (match_operand:DI 3 "const_int_operand")
! 	   (match_operand:DI 4 "aarch64_gather_scale_operand_d" "Ui1, i")
! 	   (mem:BLK (scratch))
! 	   (reg:VNx16BI FFRT_REGNUM)]
! 	  UNSPEC_LDFF1_GATHER))]
!   "TARGET_SVE"
!   "@
!    ldff1d\t%0.d, %5/z, [%1, %2.d, uxtw]
!    ldff1d\t%0.d, %5/z, [%1, %2.d, uxtw %p4]"
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- First-faulting extending gather loads
! ;; -------------------------------------------------------------------------
! ;; Includes gather forms of:
! ;; - LDFF1B
! ;; - LDFF1H
! ;; - LDFF1SB
! ;; - LDFF1SH
! ;; - LDFF1SW
! ;; - LDFF1W
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated extending first-faulting gather loads for 32-bit elements.
! ;; Operand 3 is true for unsigned extension and false for signed extension.
! (define_insn_and_rewrite "@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>"
!   [(set (match_operand:VNx4_WIDE 0 "register_operand" "=w, w, w, w, w, w")
! 	(unspec:VNx4_WIDE
! 	  [(match_operand:VNx4BI 6 "general_operand" "UplDnm, UplDnm, UplDnm, UplDnm, UplDnm, UplDnm")
! 	   (ANY_EXTEND:VNx4_WIDE
! 	     (unspec:VNx4_NARROW
! 	       [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
! 		(match_operand:DI 1 "aarch64_sve_gather_offset_<VNx4_NARROW:Vesize>" "Z, vg<VNx4_NARROW:Vesize>, rk, rk, rk, rk")
! 		(match_operand:VNx4_WIDE 2 "register_operand" "w, w, w, w, w, w")
! 		(match_operand:DI 3 "const_int_operand" "i, i, Z, Ui1, Z, Ui1")
! 		(match_operand:DI 4 "aarch64_gather_scale_operand_<VNx4_NARROW:Vesize>" "Ui1, Ui1, Ui1, Ui1, i, i")
! 		(mem:BLK (scratch))
! 		(reg:VNx16BI FFRT_REGNUM)]
! 	       UNSPEC_LDFF1_GATHER))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE"
!   "@
!    ldff1<ANY_EXTEND:s><VNx4_NARROW:Vesize>\t%0.s, %5/z, [%2.s]
!    ldff1<ANY_EXTEND:s><VNx4_NARROW:Vesize>\t%0.s, %5/z, [%2.s, #%1]
!    ldff1<ANY_EXTEND:s><VNx4_NARROW:Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw]
!    ldff1<ANY_EXTEND:s><VNx4_NARROW:Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw]
!    ldff1<ANY_EXTEND:s><VNx4_NARROW:Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw %p4]
!    ldff1<ANY_EXTEND:s><VNx4_NARROW:Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw %p4]"
!   "&& !CONSTANT_P (operands[6])"
!   {
!     operands[6] = CONSTM1_RTX (VNx4BImode);
!   }
! )
! 
! ;; Predicated extending first-faulting gather loads for 64-bit elements.
! ;; The value of operand 3 doesn't matter in this case.
! (define_insn_and_rewrite "@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>"
!   [(set (match_operand:VNx2_WIDE 0 "register_operand" "=w, w, w, w")
! 	(unspec:VNx2_WIDE
! 	  [(match_operand:VNx2BI 6 "general_operand" "UplDnm, UplDnm, UplDnm, UplDnm")
! 	   (ANY_EXTEND:VNx2_WIDE
! 	     (unspec:VNx2_NARROW
! 	       [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl, Upl, Upl")
! 		(match_operand:DI 1 "aarch64_sve_gather_offset_<VNx2_NARROW:Vesize>" "Z, vg<VNx2_NARROW:Vesize>, rk, rk")
! 		(match_operand:VNx2_WIDE 2 "register_operand" "w, w, w, w")
! 		(match_operand:DI 3 "const_int_operand")
! 		(match_operand:DI 4 "aarch64_gather_scale_operand_<VNx2_NARROW:Vesize>" "Ui1, Ui1, Ui1, i")
! 		(mem:BLK (scratch))
! 		(reg:VNx16BI FFRT_REGNUM)]
! 	       UNSPEC_LDFF1_GATHER))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE"
!   "@
!    ldff1<ANY_EXTEND:s><VNx2_NARROW:Vesize>\t%0.d, %5/z, [%2.d]
!    ldff1<ANY_EXTEND:s><VNx2_NARROW:Vesize>\t%0.d, %5/z, [%2.d, #%1]
!    ldff1<ANY_EXTEND:s><VNx2_NARROW:Vesize>\t%0.d, %5/z, [%1, %2.d]
!    ldff1<ANY_EXTEND:s><VNx2_NARROW:Vesize>\t%0.d, %5/z, [%1, %2.d, lsl %p4]"
!   "&& !CONSTANT_P (operands[6])"
!   {
!     operands[6] = CONSTM1_RTX (VNx2BImode);
!   }
! )
! 
! ;; Likewise, but with the offset being sign-extended from 32 bits.
! (define_insn_and_rewrite "*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_sxtw"
!   [(set (match_operand:VNx2_WIDE 0 "register_operand" "=w, w")
! 	(unspec:VNx2_WIDE
! 	  [(match_operand 6)
! 	   (ANY_EXTEND:VNx2_WIDE
! 	     (unspec:VNx2_NARROW
! 	       [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 		(match_operand:DI 1 "aarch64_reg_or_zero" "rk, rk")
! 		(unspec:VNx2DI
! 		  [(match_operand 7)
! 		   (sign_extend:VNx2DI
! 		     (truncate:VNx2SI
! 		       (match_operand:VNx2DI 2 "register_operand" "w, w")))]
! 		  UNSPEC_PRED_X)
! 		(match_operand:DI 3 "const_int_operand")
! 		(match_operand:DI 4 "aarch64_gather_scale_operand_<VNx2_NARROW:Vesize>" "Ui1, i")
! 		(mem:BLK (scratch))
! 		(reg:VNx16BI FFRT_REGNUM)]
! 	       UNSPEC_LDFF1_GATHER))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE"
!   "@
!    ldff1<ANY_EXTEND:s><VNx2_NARROW:Vesize>\t%0.d, %5/z, [%1, %2.d, sxtw]
!    ldff1<ANY_EXTEND:s><VNx2_NARROW:Vesize>\t%0.d, %5/z, [%1, %2.d, sxtw %p4]"
!   "&& (!CONSTANT_P (operands[6]) || !CONSTANT_P (operands[7]))"
!   {
!     operands[6] = CONSTM1_RTX (VNx2BImode);
!     operands[7] = CONSTM1_RTX (VNx2BImode);
!   }
! )
! 
! ;; Likewise, but with the offset being zero-extended from 32 bits.
! (define_insn_and_rewrite "*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_uxtw"
!   [(set (match_operand:VNx2_WIDE 0 "register_operand" "=w, w")
! 	(unspec:VNx2_WIDE
! 	  [(match_operand 7)
! 	   (ANY_EXTEND:VNx2_WIDE
! 	     (unspec:VNx2_NARROW
! 	       [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 		(match_operand:DI 1 "aarch64_reg_or_zero" "rk, rk")
! 		(and:VNx2DI
! 		  (match_operand:VNx2DI 2 "register_operand" "w, w")
! 		  (match_operand:VNx2DI 6 "aarch64_sve_uxtw_immediate"))
! 		(match_operand:DI 3 "const_int_operand")
! 		(match_operand:DI 4 "aarch64_gather_scale_operand_<VNx2_NARROW:Vesize>" "Ui1, i")
! 		(mem:BLK (scratch))
! 		(reg:VNx16BI FFRT_REGNUM)]
! 	       UNSPEC_LDFF1_GATHER))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE"
!   "@
!    ldff1<ANY_EXTEND:s><VNx2_NARROW:Vesize>\t%0.d, %5/z, [%1, %2.d, uxtw]
!    ldff1<ANY_EXTEND:s><VNx2_NARROW:Vesize>\t%0.d, %5/z, [%1, %2.d, uxtw %p4]"
!   "&& !CONSTANT_P (operands[7])"
!   {
!     operands[7] = CONSTM1_RTX (VNx2BImode);
!   }
! )
! 
! ;; =========================================================================
! ;; == Prefetches
! ;; =========================================================================
! 
! ;; -------------------------------------------------------------------------
! ;; ---- Contiguous prefetches
! ;; -------------------------------------------------------------------------
! ;; Includes contiguous forms of:
! ;; - PRFB
! ;; - PRFD
! ;; - PRFH
! ;; - PRFW
! ;; -------------------------------------------------------------------------
! 
! ;; Contiguous predicated prefetches.  Operand 2 gives the real prefetch
! ;; operation (as an svprfop), with operands 3 and 4 providing distilled
! ;; information.
! (define_insn "@aarch64_sve_prefetch<mode>"
!   [(prefetch (unspec:DI
! 	       [(match_operand:<VPRED> 0 "register_operand" "Upl")
! 		(match_operand:SVE_FULL_I 1 "aarch64_sve_prefetch_operand" "UP<Vesize>")
! 		(match_operand:DI 2 "const_int_operand")]
! 	       UNSPEC_SVE_PREFETCH)
! 	     (match_operand:DI 3 "const_int_operand")
! 	     (match_operand:DI 4 "const_int_operand"))]
!   "TARGET_SVE"
!   {
!     operands[1] = gen_rtx_MEM (<MODE>mode, operands[1]);
!     return aarch64_output_sve_prefetch ("prf<Vesize>", operands[2], "%0, %1");
!   }
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- Gather prefetches
! ;; -------------------------------------------------------------------------
! ;; Includes gather forms of:
! ;; - PRFB
! ;; - PRFD
! ;; - PRFH
! ;; - PRFW
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated gather prefetches for 32-bit bases and offsets.  The operands
! ;; are:
! ;; 0: the governing predicate
! ;; 1: the scalar component of the address
! ;; 2: the vector component of the address
! ;; 3: 1 for zero extension, 0 for sign extension
! ;; 4: the scale multiplier
! ;; 5: a vector zero that identifies the mode of data being accessed
! ;; 6: the prefetch operator (an svprfop)
! ;; 7: the normal RTL prefetch rw flag
! ;; 8: the normal RTL prefetch locality value
! (define_insn "@aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx4SI_ONLY:mode>"
!   [(prefetch (unspec:DI
! 	       [(match_operand:VNx4BI 0 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
! 		(match_operand:DI 1 "aarch64_sve_gather_offset_<SVE_FULL_I:Vesize>" "Z, vg<SVE_FULL_I:Vesize>, rk, rk, rk, rk")
! 		(match_operand:VNx4SI_ONLY 2 "register_operand" "w, w, w, w, w, w")
! 		(match_operand:DI 3 "const_int_operand" "i, i, Z, Ui1, Z, Ui1")
! 		(match_operand:DI 4 "aarch64_gather_scale_operand_<SVE_FULL_I:Vesize>" "Ui1, Ui1, Ui1, Ui1, i, i")
! 		(match_operand:SVE_FULL_I 5 "aarch64_simd_imm_zero")
! 		(match_operand:DI 6 "const_int_operand")]
! 	       UNSPEC_SVE_PREFETCH_GATHER)
! 	     (match_operand:DI 7 "const_int_operand")
! 	     (match_operand:DI 8 "const_int_operand"))]
!   "TARGET_SVE"
!   {
!     static const char *const insns[][2] = {
!       "prf<SVE_FULL_I:Vesize>", "%0, [%2.s]",
!       "prf<SVE_FULL_I:Vesize>", "%0, [%2.s, #%1]",
!       "prfb", "%0, [%1, %2.s, sxtw]",
!       "prfb", "%0, [%1, %2.s, uxtw]",
!       "prf<SVE_FULL_I:Vesize>", "%0, [%1, %2.s, sxtw %p4]",
!       "prf<SVE_FULL_I:Vesize>", "%0, [%1, %2.s, uxtw %p4]"
!     };
!     const char *const *parts = insns[which_alternative];
!     return aarch64_output_sve_prefetch (parts[0], operands[6], parts[1]);
!   }
! )
! 
! ;; Predicated gather prefetches for 64-bit elements.  The value of operand 3
! ;; doesn't matter in this case.
! (define_insn "@aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>"
!   [(prefetch (unspec:DI
! 	       [(match_operand:VNx2BI 0 "register_operand" "Upl, Upl, Upl, Upl")
! 		(match_operand:DI 1 "aarch64_sve_gather_offset_<SVE_FULL_I:Vesize>" "Z, vg<SVE_FULL_I:Vesize>, rk, rk")
! 		(match_operand:VNx2DI_ONLY 2 "register_operand" "w, w, w, w")
! 		(match_operand:DI 3 "const_int_operand")
! 		(match_operand:DI 4 "aarch64_gather_scale_operand_<SVE_FULL_I:Vesize>" "Ui1, Ui1, Ui1, i")
! 		(match_operand:SVE_FULL_I 5 "aarch64_simd_imm_zero")
! 		(match_operand:DI 6 "const_int_operand")]
! 	       UNSPEC_SVE_PREFETCH_GATHER)
! 	     (match_operand:DI 7 "const_int_operand")
! 	     (match_operand:DI 8 "const_int_operand"))]
!   "TARGET_SVE"
!   {
!     static const char *const insns[][2] = {
!       "prf<SVE_FULL_I:Vesize>", "%0, [%2.d]",
!       "prf<SVE_FULL_I:Vesize>", "%0, [%2.d, #%1]",
!       "prfb", "%0, [%1, %2.d]",
!       "prf<SVE_FULL_I:Vesize>", "%0, [%1, %2.d, lsl %p4]"
!     };
!     const char *const *parts = insns[which_alternative];
!     return aarch64_output_sve_prefetch (parts[0], operands[6], parts[1]);
!   }
! )
! 
! ;; Likewise, but with the offset being sign-extended from 32 bits.
! (define_insn_and_rewrite "*aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>_sxtw"
!   [(prefetch (unspec:DI
! 	       [(match_operand:VNx2BI 0 "register_operand" "Upl, Upl")
! 		(match_operand:DI 1 "register_operand" "rk, rk")
! 		(unspec:VNx2DI_ONLY
! 		  [(match_operand 9)
! 		   (sign_extend:VNx2DI
! 		     (truncate:VNx2SI
! 		       (match_operand:VNx2DI 2 "register_operand" "w, w")))]
! 		  UNSPEC_PRED_X)
! 		(match_operand:DI 3 "const_int_operand")
! 		(match_operand:DI 4 "aarch64_gather_scale_operand_<SVE_FULL_I:Vesize>" "Ui1, i")
! 		(match_operand:SVE_FULL_I 5 "aarch64_simd_imm_zero")
! 		(match_operand:DI 6 "const_int_operand")]
! 	       UNSPEC_SVE_PREFETCH_GATHER)
! 	     (match_operand:DI 7 "const_int_operand")
! 	     (match_operand:DI 8 "const_int_operand"))]
!   "TARGET_SVE"
!   {
!     static const char *const insns[][2] = {
!       "prfb", "%0, [%1, %2.d, sxtw]",
!       "prf<SVE_FULL_I:Vesize>", "%0, [%1, %2.d, sxtw %p4]"
!     };
!     const char *const *parts = insns[which_alternative];
!     return aarch64_output_sve_prefetch (parts[0], operands[6], parts[1]);
!   }
!   "&& !rtx_equal_p (operands[0], operands[9])"
!   {
!     operands[9] = copy_rtx (operands[0]);
!   }
! )
! 
! ;; Likewise, but with the offset being zero-extended from 32 bits.
! (define_insn "*aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>_uxtw"
!   [(prefetch (unspec:DI
! 	       [(match_operand:VNx2BI 0 "register_operand" "Upl, Upl")
! 		(match_operand:DI 1 "register_operand" "rk, rk")
! 		(and:VNx2DI_ONLY
! 		  (match_operand:VNx2DI 2 "register_operand" "w, w")
! 		  (match_operand:VNx2DI 9 "aarch64_sve_uxtw_immediate"))
! 		(match_operand:DI 3 "const_int_operand")
! 		(match_operand:DI 4 "aarch64_gather_scale_operand_<SVE_FULL_I:Vesize>" "Ui1, i")
! 		(match_operand:SVE_FULL_I 5 "aarch64_simd_imm_zero")
! 		(match_operand:DI 6 "const_int_operand")]
! 	       UNSPEC_SVE_PREFETCH_GATHER)
! 	     (match_operand:DI 7 "const_int_operand")
! 	     (match_operand:DI 8 "const_int_operand"))]
!   "TARGET_SVE"
!   {
!     static const char *const insns[][2] = {
!       "prfb", "%0, [%1, %2.d, uxtw]",
!       "prf<SVE_FULL_I:Vesize>", "%0, [%1, %2.d, uxtw %p4]"
!     };
!     const char *const *parts = insns[which_alternative];
!     return aarch64_output_sve_prefetch (parts[0], operands[6], parts[1]);
!   }
! )
! 
! ;; =========================================================================
! ;; == Stores
! ;; =========================================================================
! 
! ;; -------------------------------------------------------------------------
! ;; ---- Normal contiguous stores
! ;; -------------------------------------------------------------------------
! ;; Includes contiguous forms of:
! ;; - ST1B
! ;; - ST1D
! ;; - ST1H
! ;; - ST1W
! ;; - ST2B
! ;; - ST2D
! ;; - ST2H
! ;; - ST2W
! ;; - ST3B
! ;; - ST3D
! ;; - ST3H
! ;; - ST3W
! ;; - ST4B
! ;; - ST4D
! ;; - ST4H
! ;; - ST4W
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated ST1.
! (define_insn "maskstore<mode><vpred>"
!   [(set (match_operand:SVE_ALL 0 "memory_operand" "+m")
! 	(unspec:SVE_ALL
! 	  [(match_operand:<VPRED> 2 "register_operand" "Upl")
! 	   (match_operand:SVE_ALL 1 "register_operand" "w")
! 	   (match_dup 0)]
! 	  UNSPEC_ST1_SVE))]
!   "TARGET_SVE"
!   "st1<Vesize>\t%1.<Vctype>, %2, %0"
! )
! 
! ;; Unpredicated ST[234].  This is always a full update, so the dependence
! ;; on the old value of the memory location (via (match_dup 0)) is redundant.
! ;; There doesn't seem to be any obvious benefit to treating the all-true
! ;; case differently though.  In particular, it's very unlikely that we'll
! ;; only find out during RTL that a store_lanes is dead.
! (define_expand "vec_store_lanes<mode><vsingle>"
!   [(set (match_operand:SVE_STRUCT 0 "memory_operand")
! 	(unspec:SVE_STRUCT
! 	  [(match_dup 2)
! 	   (match_operand:SVE_STRUCT 1 "register_operand")
! 	   (match_dup 0)]
! 	  UNSPEC_STN))]
!   "TARGET_SVE"
!   {
!     operands[2] = aarch64_ptrue_reg (<VPRED>mode);
!   }
! )
! 
! ;; Predicated ST[234].
! (define_insn "vec_mask_store_lanes<mode><vsingle>"
!   [(set (match_operand:SVE_STRUCT 0 "memory_operand" "+m")
! 	(unspec:SVE_STRUCT
! 	  [(match_operand:<VPRED> 2 "register_operand" "Upl")
! 	   (match_operand:SVE_STRUCT 1 "register_operand" "w")
! 	   (match_dup 0)]
! 	  UNSPEC_STN))]
!   "TARGET_SVE"
!   "st<vector_count><Vesize>\t%1, %2, %0"
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- Truncating contiguous stores
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - ST1B
! ;; - ST1H
! ;; - ST1W
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated truncate and store, with 8 elements per 128-bit block.
! (define_insn "@aarch64_store_trunc<VNx8_NARROW:mode><VNx8_WIDE:mode>"
!   [(set (match_operand:VNx8_NARROW 0 "memory_operand" "+m")
! 	(unspec:VNx8_NARROW
! 	  [(match_operand:VNx8BI 2 "register_operand" "Upl")
! 	   (truncate:VNx8_NARROW
! 	     (match_operand:VNx8_WIDE 1 "register_operand" "w"))
! 	   (match_dup 0)]
! 	  UNSPEC_ST1_SVE))]
!   "TARGET_SVE"
!   "st1<VNx8_NARROW:Vesize>\t%1.<VNx8_WIDE:Vetype>, %2, %0"
! )
! 
! ;; Predicated truncate and store, with 4 elements per 128-bit block.
! (define_insn "@aarch64_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>"
!   [(set (match_operand:VNx4_NARROW 0 "memory_operand" "+m")
! 	(unspec:VNx4_NARROW
! 	  [(match_operand:VNx4BI 2 "register_operand" "Upl")
! 	   (truncate:VNx4_NARROW
! 	     (match_operand:VNx4_WIDE 1 "register_operand" "w"))
! 	   (match_dup 0)]
! 	  UNSPEC_ST1_SVE))]
!   "TARGET_SVE"
!   "st1<VNx4_NARROW:Vesize>\t%1.<VNx4_WIDE:Vetype>, %2, %0"
! )
! 
! ;; Predicated truncate and store, with 2 elements per 128-bit block.
! (define_insn "@aarch64_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>"
!   [(set (match_operand:VNx2_NARROW 0 "memory_operand" "+m")
! 	(unspec:VNx2_NARROW
! 	  [(match_operand:VNx2BI 2 "register_operand" "Upl")
! 	   (truncate:VNx2_NARROW
! 	     (match_operand:VNx2_WIDE 1 "register_operand" "w"))
! 	   (match_dup 0)]
! 	  UNSPEC_ST1_SVE))]
!   "TARGET_SVE"
!   "st1<VNx2_NARROW:Vesize>\t%1.<VNx2_WIDE:Vetype>, %2, %0"
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- Non-temporal contiguous stores
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - STNT1B
! ;; - STNT1D
! ;; - STNT1H
! ;; - STNT1W
! ;; -------------------------------------------------------------------------
! 
! (define_insn "@aarch64_stnt1<mode>"
!   [(set (match_operand:SVE_FULL 0 "memory_operand" "+m")
! 	(unspec:SVE_FULL
! 	  [(match_operand:<VPRED> 2 "register_operand" "Upl")
! 	   (match_operand:SVE_FULL 1 "register_operand" "w")
! 	   (match_dup 0)]
! 	  UNSPEC_STNT1_SVE))]
!   "TARGET_SVE"
!   "stnt1<Vesize>\t%1.<Vetype>, %2, %0"
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- Normal scatter stores
! ;; -------------------------------------------------------------------------
! ;; Includes scatter forms of:
! ;; - ST1D
! ;; - ST1W
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated scatter stores.
! (define_expand "scatter_store<mode><v_int_container>"
!   [(set (mem:BLK (scratch))
! 	(unspec:BLK
! 	  [(match_dup 5)
! 	   (match_operand:DI 0 "aarch64_sve_gather_offset_<Vesize>")
! 	   (match_operand:<V_INT_CONTAINER> 1 "register_operand")
! 	   (match_operand:DI 2 "const_int_operand")
! 	   (match_operand:DI 3 "aarch64_gather_scale_operand_<Vesize>")
! 	   (match_operand:SVE_24 4 "register_operand")]
! 	  UNSPEC_ST1_SCATTER))]
!   "TARGET_SVE"
!   {
!     operands[5] = aarch64_ptrue_reg (<VPRED>mode);
!   }
! )
! 
! ;; Predicated scatter stores for 32-bit elements.  Operand 2 is true for
! ;; unsigned extension and false for signed extension.
! (define_insn "mask_scatter_store<mode><v_int_container>"
!   [(set (mem:BLK (scratch))
! 	(unspec:BLK
! 	  [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
! 	   (match_operand:DI 0 "aarch64_sve_gather_offset_<Vesize>" "Z, vgw, rk, rk, rk, rk")
! 	   (match_operand:VNx4SI 1 "register_operand" "w, w, w, w, w, w")
! 	   (match_operand:DI 2 "const_int_operand" "Ui1, Ui1, Z, Ui1, Z, Ui1")
! 	   (match_operand:DI 3 "aarch64_gather_scale_operand_<Vesize>" "Ui1, Ui1, Ui1, Ui1, i, i")
! 	   (match_operand:SVE_4 4 "register_operand" "w, w, w, w, w, w")]
! 	  UNSPEC_ST1_SCATTER))]
!   "TARGET_SVE"
!   "@
!    st1<Vesize>\t%4.s, %5, [%1.s]
!    st1<Vesize>\t%4.s, %5, [%1.s, #%0]
!    st1<Vesize>\t%4.s, %5, [%0, %1.s, sxtw]
!    st1<Vesize>\t%4.s, %5, [%0, %1.s, uxtw]
!    st1<Vesize>\t%4.s, %5, [%0, %1.s, sxtw %p3]
!    st1<Vesize>\t%4.s, %5, [%0, %1.s, uxtw %p3]"
! )
! 
! ;; Predicated scatter stores for 64-bit elements.  The value of operand 2
! ;; doesn't matter in this case.
! (define_insn "mask_scatter_store<mode><v_int_container>"
!   [(set (mem:BLK (scratch))
! 	(unspec:BLK
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl, Upl, Upl")
! 	   (match_operand:DI 0 "aarch64_sve_gather_offset_<Vesize>" "Z, vgd, rk, rk")
! 	   (match_operand:VNx2DI 1 "register_operand" "w, w, w, w")
! 	   (match_operand:DI 2 "const_int_operand")
! 	   (match_operand:DI 3 "aarch64_gather_scale_operand_<Vesize>" "Ui1, Ui1, Ui1, i")
! 	   (match_operand:SVE_2 4 "register_operand" "w, w, w, w")]
! 	  UNSPEC_ST1_SCATTER))]
!   "TARGET_SVE"
!   "@
!    st1<Vesize>\t%4.d, %5, [%1.d]
!    st1<Vesize>\t%4.d, %5, [%1.d, #%0]
!    st1<Vesize>\t%4.d, %5, [%0, %1.d]
!    st1<Vesize>\t%4.d, %5, [%0, %1.d, lsl %p3]"
! )
! 
! ;; Likewise, but with the offset being extended from 32 bits.
! (define_insn_and_rewrite "*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked"
!   [(set (mem:BLK (scratch))
! 	(unspec:BLK
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 	   (match_operand:DI 0 "register_operand" "rk, rk")
! 	   (unspec:VNx2DI
! 	     [(match_operand 6)
! 	      (ANY_EXTEND:VNx2DI
! 		(match_operand:VNx2SI 1 "register_operand" "w, w"))]
! 	     UNSPEC_PRED_X)
! 	   (match_operand:DI 2 "const_int_operand")
! 	   (match_operand:DI 3 "aarch64_gather_scale_operand_<Vesize>" "Ui1, i")
! 	   (match_operand:SVE_2 4 "register_operand" "w, w")]
! 	  UNSPEC_ST1_SCATTER))]
!   "TARGET_SVE"
!   "@
!    st1<Vesize>\t%4.d, %5, [%0, %1.d, <su>xtw]
!    st1<Vesize>\t%4.d, %5, [%0, %1.d, <su>xtw %p3]"
!   "&& !CONSTANT_P (operands[6])"
!   {
!     operands[6] = CONSTM1_RTX (<VPRED>mode);
!   }
! )
! 
! ;; Likewise, but with the offset being truncated to 32 bits and then
! ;; sign-extended.
! (define_insn_and_rewrite "*mask_scatter_store<mode><v_int_container>_sxtw"
!   [(set (mem:BLK (scratch))
! 	(unspec:BLK
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 	   (match_operand:DI 0 "register_operand" "rk, rk")
! 	   (unspec:VNx2DI
! 	     [(match_operand 6)
! 	      (sign_extend:VNx2DI
! 		(truncate:VNx2SI
! 		  (match_operand:VNx2DI 1 "register_operand" "w, w")))]
! 	     UNSPEC_PRED_X)
! 	   (match_operand:DI 2 "const_int_operand")
! 	   (match_operand:DI 3 "aarch64_gather_scale_operand_<Vesize>" "Ui1, i")
! 	   (match_operand:SVE_2 4 "register_operand" "w, w")]
! 	  UNSPEC_ST1_SCATTER))]
!   "TARGET_SVE"
!   "@
!    st1<Vesize>\t%4.d, %5, [%0, %1.d, sxtw]
!    st1<Vesize>\t%4.d, %5, [%0, %1.d, sxtw %p3]"
!   "&& !CONSTANT_P (operands[6])"
!   {
!     operands[6] = CONSTM1_RTX (<VPRED>mode);
!   }
! )
! 
! ;; Likewise, but with the offset being truncated to 32 bits and then
! ;; zero-extended.
! (define_insn "*mask_scatter_store<mode><v_int_container>_uxtw"
!   [(set (mem:BLK (scratch))
! 	(unspec:BLK
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 	   (match_operand:DI 0 "aarch64_reg_or_zero" "rk, rk")
! 	   (and:VNx2DI
! 	     (match_operand:VNx2DI 1 "register_operand" "w, w")
! 	     (match_operand:VNx2DI 6 "aarch64_sve_uxtw_immediate"))
! 	   (match_operand:DI 2 "const_int_operand")
! 	   (match_operand:DI 3 "aarch64_gather_scale_operand_<Vesize>" "Ui1, i")
! 	   (match_operand:SVE_2 4 "register_operand" "w, w")]
! 	  UNSPEC_ST1_SCATTER))]
!   "TARGET_SVE"
!   "@
!    st1<Vesize>\t%4.d, %5, [%0, %1.d, uxtw]
!    st1<Vesize>\t%4.d, %5, [%0, %1.d, uxtw %p3]"
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- Truncating scatter stores
! ;; -------------------------------------------------------------------------
! ;; Includes scatter forms of:
! ;; - ST1B
! ;; - ST1H
! ;; - ST1W
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated truncating scatter stores for 32-bit elements.  Operand 2 is
! ;; true for unsigned extension and false for signed extension.
! (define_insn "@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>"
!   [(set (mem:BLK (scratch))
! 	(unspec:BLK
! 	  [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
! 	   (match_operand:DI 0 "aarch64_sve_gather_offset_<VNx4_NARROW:Vesize>" "Z, vg<VNx4_NARROW:Vesize>, rk, rk, rk, rk")
! 	   (match_operand:VNx4SI 1 "register_operand" "w, w, w, w, w, w")
! 	   (match_operand:DI 2 "const_int_operand" "Ui1, Ui1, Z, Ui1, Z, Ui1")
! 	   (match_operand:DI 3 "aarch64_gather_scale_operand_<VNx4_NARROW:Vesize>" "Ui1, Ui1, Ui1, Ui1, i, i")
! 	   (truncate:VNx4_NARROW
! 	     (match_operand:VNx4_WIDE 4 "register_operand" "w, w, w, w, w, w"))]
! 	  UNSPEC_ST1_SCATTER))]
!   "TARGET_SVE"
!   "@
!    st1<VNx4_NARROW:Vesize>\t%4.s, %5, [%1.s]
!    st1<VNx4_NARROW:Vesize>\t%4.s, %5, [%1.s, #%0]
!    st1<VNx4_NARROW:Vesize>\t%4.s, %5, [%0, %1.s, sxtw]
!    st1<VNx4_NARROW:Vesize>\t%4.s, %5, [%0, %1.s, uxtw]
!    st1<VNx4_NARROW:Vesize>\t%4.s, %5, [%0, %1.s, sxtw %p3]
!    st1<VNx4_NARROW:Vesize>\t%4.s, %5, [%0, %1.s, uxtw %p3]"
! )
! 
! ;; Predicated truncating scatter stores for 64-bit elements.  The value of
! ;; operand 2 doesn't matter in this case.
! (define_insn "@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>"
!   [(set (mem:BLK (scratch))
! 	(unspec:BLK
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl, Upl, Upl")
! 	   (match_operand:DI 0 "aarch64_sve_gather_offset_<VNx2_NARROW:Vesize>" "Z, vg<VNx2_NARROW:Vesize>, rk, rk")
! 	   (match_operand:VNx2DI 1 "register_operand" "w, w, w, w")
! 	   (match_operand:DI 2 "const_int_operand")
! 	   (match_operand:DI 3 "aarch64_gather_scale_operand_<VNx2_NARROW:Vesize>" "Ui1, Ui1, Ui1, i")
! 	   (truncate:VNx2_NARROW
! 	     (match_operand:VNx2_WIDE 4 "register_operand" "w, w, w, w"))]
! 	  UNSPEC_ST1_SCATTER))]
!   "TARGET_SVE"
!   "@
!    st1<VNx2_NARROW:Vesize>\t%4.d, %5, [%1.d]
!    st1<VNx2_NARROW:Vesize>\t%4.d, %5, [%1.d, #%0]
!    st1<VNx2_NARROW:Vesize>\t%4.d, %5, [%0, %1.d]
!    st1<VNx2_NARROW:Vesize>\t%4.d, %5, [%0, %1.d, lsl %p3]"
! )
! 
! ;; Likewise, but with the offset being sign-extended from 32 bits.
! (define_insn_and_rewrite "*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw"
!   [(set (mem:BLK (scratch))
! 	(unspec:BLK
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 	   (match_operand:DI 0 "register_operand" "rk, rk")
! 	   (unspec:VNx2DI
! 	     [(match_operand 6)
! 	      (sign_extend:VNx2DI
! 		(truncate:VNx2SI
! 		  (match_operand:VNx2DI 1 "register_operand" "w, w")))]
! 	     UNSPEC_PRED_X)
! 	   (match_operand:DI 2 "const_int_operand")
! 	   (match_operand:DI 3 "aarch64_gather_scale_operand_<VNx2_NARROW:Vesize>" "Ui1, i")
! 	   (truncate:VNx2_NARROW
! 	     (match_operand:VNx2_WIDE 4 "register_operand" "w, w"))]
! 	  UNSPEC_ST1_SCATTER))]
!   "TARGET_SVE"
!   "@
!    st1<VNx2_NARROW:Vesize>\t%4.d, %5, [%0, %1.d, sxtw]
!    st1<VNx2_NARROW:Vesize>\t%4.d, %5, [%0, %1.d, sxtw %p3]"
!   "&& !rtx_equal_p (operands[5], operands[6])"
!   {
!     operands[6] = copy_rtx (operands[5]);
!   }
! )
! 
! ;; Likewise, but with the offset being zero-extended from 32 bits.
! (define_insn "*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw"
!   [(set (mem:BLK (scratch))
! 	(unspec:BLK
! 	  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl")
! 	   (match_operand:DI 0 "aarch64_reg_or_zero" "rk, rk")
! 	   (and:VNx2DI
! 	     (match_operand:VNx2DI 1 "register_operand" "w, w")
! 	     (match_operand:VNx2DI 6 "aarch64_sve_uxtw_immediate"))
! 	   (match_operand:DI 2 "const_int_operand")
! 	   (match_operand:DI 3 "aarch64_gather_scale_operand_<VNx2_NARROW:Vesize>" "Ui1, i")
! 	   (truncate:VNx2_NARROW
! 	     (match_operand:VNx2_WIDE 4 "register_operand" "w, w"))]
! 	  UNSPEC_ST1_SCATTER))]
!   "TARGET_SVE"
!   "@
!    st1<VNx2_NARROW:Vesize>\t%4.d, %5, [%0, %1.d, uxtw]
!    st1<VNx2_NARROW:Vesize>\t%4.d, %5, [%0, %1.d, uxtw %p3]"
! )
! 
! ;; =========================================================================
! ;; == Vector creation
! ;; =========================================================================
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT,FP] Duplicate element
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - DUP
! ;; - MOV
! ;; - LD1RB
! ;; - LD1RD
! ;; - LD1RH
! ;; - LD1RW
! ;; - LD1ROB (F64MM)
! ;; - LD1ROD (F64MM)
! ;; - LD1ROH (F64MM)
! ;; - LD1ROW (F64MM)
! ;; - LD1RQB
! ;; - LD1RQD
! ;; - LD1RQH
! ;; - LD1RQW
! ;; -------------------------------------------------------------------------
! 
! (define_expand "vec_duplicate<mode>"
!   [(parallel
!     [(set (match_operand:SVE_ALL 0 "register_operand")
! 	  (vec_duplicate:SVE_ALL
! 	    (match_operand:<VEL> 1 "aarch64_sve_dup_operand")))
!      (clobber (scratch:VNx16BI))])]
!   "TARGET_SVE"
!   {
!     if (MEM_P (operands[1]))
!       {
! 	rtx ptrue = aarch64_ptrue_reg (<VPRED>mode);
! 	emit_insn (gen_sve_ld1r<mode> (operands[0], ptrue, operands[1],
! 				       CONST0_RTX (<MODE>mode)));
! 	DONE;
!       }
!   }
! )
! 
! ;; Accept memory operands for the benefit of combine, and also in case
! ;; the scalar input gets spilled to memory during RA.  We want to split
! ;; the load at the first opportunity in order to allow the PTRUE to be
! ;; optimized with surrounding code.
! (define_insn_and_split "*vec_duplicate<mode>_reg"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w, w, w")
! 	(vec_duplicate:SVE_ALL
! 	  (match_operand:<VEL> 1 "aarch64_sve_dup_operand" "r, w, Uty")))
!    (clobber (match_scratch:VNx16BI 2 "=X, X, Upl"))]
!   "TARGET_SVE"
!   "@
!    mov\t%0.<Vetype>, %<vwcore>1
!    mov\t%0.<Vetype>, %<Vetype>1
!    #"
!   "&& MEM_P (operands[1])"
!   [(const_int 0)]
!   {
!     if (GET_CODE (operands[2]) == SCRATCH)
!       operands[2] = gen_reg_rtx (VNx16BImode);
!     emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
!     rtx gp = gen_lowpart (<VPRED>mode, operands[2]);
!     emit_insn (gen_sve_ld1r<mode> (operands[0], gp, operands[1],
! 				   CONST0_RTX (<MODE>mode)));
      DONE;
    }
+   [(set_attr "length" "4,4,8")]
  )
  
+ ;; Duplicate an Advanced SIMD vector to fill an SVE vector (LE version).
+ (define_insn "@aarch64_vec_duplicate_vq<mode>_le"
+   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
+ 	(vec_duplicate:SVE_FULL
+ 	  (match_operand:<V128> 1 "register_operand" "w")))]
+   "TARGET_SVE && !BYTES_BIG_ENDIAN"
+   {
+     operands[1] = gen_rtx_REG (<MODE>mode, REGNO (operands[1]));
+     return "dup\t%0.q, %1.q[0]";
+   }
+ )
+ 
+ ;; Duplicate an Advanced SIMD vector to fill an SVE vector (BE version).
+ ;; The SVE register layout puts memory lane N into (architectural)
+ ;; register lane N, whereas the Advanced SIMD layout puts the memory
+ ;; lsb into the register lsb.  We therefore have to describe this in rtl
+ ;; terms as a reverse of the V128 vector followed by a duplicate.
+ (define_insn "@aarch64_vec_duplicate_vq<mode>_be"
+   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
+ 	(vec_duplicate:SVE_FULL
+ 	  (vec_select:<V128>
+ 	    (match_operand:<V128> 1 "register_operand" "w")
+ 	    (match_operand 2 "descending_int_parallel"))))]
+   "TARGET_SVE
+    && BYTES_BIG_ENDIAN
+    && known_eq (INTVAL (XVECEXP (operands[2], 0, 0)),
+ 		GET_MODE_NUNITS (<V128>mode) - 1)"
+   {
+     operands[1] = gen_rtx_REG (<MODE>mode, REGNO (operands[1]));
+     return "dup\t%0.q, %1.q[0]";
+   }
+ )
+ 
+ ;; This is used for vec_duplicate<mode>s from memory, but can also
+ ;; be used by combine to optimize selects of a vec_duplicate<mode>
+ ;; with zero.
+ (define_insn "sve_ld1r<mode>"
+   [(set (match_operand:SVE_ALL 0 "register_operand" "=w")
+ 	(unspec:SVE_ALL
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
+ 	   (vec_duplicate:SVE_ALL
+ 	     (match_operand:<VEL> 2 "aarch64_sve_ld1r_operand" "Uty"))
+ 	   (match_operand:SVE_ALL 3 "aarch64_simd_imm_zero")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE"
+   "ld1r<Vesize>\t%0.<Vetype>, %1/z, %2"
+ )
+ 
+ ;; Load 128 bits from memory under predicate control and duplicate to
+ ;; fill a vector.
+ (define_insn "@aarch64_sve_ld1rq<mode>"
+   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL
+ 	  [(match_operand:<VPRED> 2 "register_operand" "Upl")
+ 	   (match_operand:<V128> 1 "aarch64_sve_ld1rq_operand" "UtQ")]
+ 	  UNSPEC_LD1RQ))]
+   "TARGET_SVE"
+   {
+     operands[1] = gen_rtx_MEM (<VEL>mode, XEXP (operands[1], 0));
+     return "ld1rq<Vesize>\t%0.<Vetype>, %2/z, %1";
+   }
+ )
+ 
+ (define_insn "@aarch64_sve_ld1ro<mode>"
+   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL
+ 	  [(match_operand:<VPRED> 2 "register_operand" "Upl")
+ 	   (match_operand:OI 1 "aarch64_sve_ld1ro_operand_<Vesize>"
+ 			       "UO<Vesize>")]
+ 	  UNSPEC_LD1RO))]
+   "TARGET_SVE_F64MM"
+   {
+     operands[1] = gen_rtx_MEM (<VEL>mode, XEXP (operands[1], 0));
+     return "ld1ro<Vesize>\t%0.<Vetype>, %2/z, %1";
+   }
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT,FP] Initialize from individual elements
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - INSR
+ ;; -------------------------------------------------------------------------
+ 
+ (define_expand "vec_init<mode><Vel>"
+   [(match_operand:SVE_FULL 0 "register_operand")
+     (match_operand 1 "")]
+   "TARGET_SVE"
+   {
+     aarch64_sve_expand_vector_init (operands[0], operands[1]);
+     DONE;
+   }
+ )
+ 
+ ;; Shift an SVE vector left and insert a scalar into element 0.
+ (define_insn "vec_shl_insert_<mode>"
+   [(set (match_operand:SVE_FULL 0 "register_operand" "=?w, w, ??&w, ?&w")
+ 	(unspec:SVE_FULL
+ 	  [(match_operand:SVE_FULL 1 "register_operand" "0, 0, w, w")
+ 	   (match_operand:<VEL> 2 "aarch64_reg_or_zero" "rZ, w, rZ, w")]
+ 	  UNSPEC_INSR))]
+   "TARGET_SVE"
+   "@
+    insr\t%0.<Vetype>, %<vwcore>2
+    insr\t%0.<Vetype>, %<Vetype>2
+    movprfx\t%0, %1\;insr\t%0.<Vetype>, %<vwcore>2
+    movprfx\t%0, %1\;insr\t%0.<Vetype>, %<Vetype>2"
+   [(set_attr "movprfx" "*,*,yes,yes")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Linear series
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - INDEX
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "vec_series<mode>"
+   [(set (match_operand:SVE_I 0 "register_operand" "=w, w, w")
+ 	(vec_series:SVE_I
+ 	  (match_operand:<VEL> 1 "aarch64_sve_index_operand" "Usi, r, r")
+ 	  (match_operand:<VEL> 2 "aarch64_sve_index_operand" "r, Usi, r")))]
+   "TARGET_SVE"
+   "@
+    index\t%0.<Vctype>, #%1, %<vccore>2
+    index\t%0.<Vctype>, %<vccore>1, #%2
+    index\t%0.<Vctype>, %<vccore>1, %<vccore>2"
+ )
+ 
+ ;; Optimize {x, x, x, x, ...} + {0, n, 2*n, 3*n, ...} if n is in range
+ ;; of an INDEX instruction.
+ (define_insn "*vec_series<mode>_plus"
+   [(set (match_operand:SVE_I 0 "register_operand" "=w")
+ 	(plus:SVE_I
+ 	  (vec_duplicate:SVE_I
+ 	    (match_operand:<VEL> 1 "register_operand" "r"))
+ 	  (match_operand:SVE_I 2 "immediate_operand")))]
+   "TARGET_SVE && aarch64_check_zero_based_sve_index_immediate (operands[2])"
+   {
+     operands[2] = aarch64_check_zero_based_sve_index_immediate (operands[2]);
+     return "index\t%0.<Vctype>, %<vccore>1, #%2";
+   }
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [PRED] Duplicate element
+ ;; -------------------------------------------------------------------------
+ ;; The patterns in this section are synthetic.
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Implement a predicate broadcast by shifting the low bit of the scalar
+ ;; input into the top bit and using a WHILELO.  An alternative would be to
+ ;; duplicate the input and do a compare with zero.
+ (define_expand "vec_duplicate<mode>"
+   [(set (match_operand:PRED_ALL 0 "register_operand")
+ 	(vec_duplicate:PRED_ALL (match_operand:QI 1 "register_operand")))]
+   "TARGET_SVE"
+   {
+     rtx tmp = gen_reg_rtx (DImode);
+     rtx op1 = gen_lowpart (DImode, operands[1]);
+     emit_insn (gen_ashldi3 (tmp, op1, gen_int_mode (63, DImode)));
+     emit_insn (gen_while_ultdi<mode> (operands[0], const0_rtx, tmp));
+     DONE;
+   }
+ )
+ 
+ ;; =========================================================================
+ ;; == Vector decomposition
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT,FP] Extract index
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - DUP    (Advanced SIMD)
+ ;; - DUP    (SVE)
+ ;; - EXT    (SVE)
+ ;; - ST1    (Advanced SIMD)
+ ;; - UMOV   (Advanced SIMD)
+ ;; -------------------------------------------------------------------------
+ 
  (define_expand "vec_extract<mode><Vel>"
    [(set (match_operand:<VEL> 0 "register_operand")
  	(vec_select:<VEL>
! 	  (match_operand:SVE_FULL 1 "register_operand")
  	  (parallel [(match_operand:SI 2 "nonmemory_operand")])))]
    "TARGET_SVE"
    {
***************
*** 488,494 ****
        {
  	/* The last element can be extracted with a LASTB and a false
  	   predicate.  */
! 	rtx sel = force_reg (<VPRED>mode, CONST0_RTX (<VPRED>mode));
  	emit_insn (gen_extract_last_<mode> (operands[0], sel, operands[1]));
  	DONE;
        }
--- 2637,2643 ----
        {
  	/* The last element can be extracted with a LASTB and a false
  	   predicate.  */
! 	rtx sel = aarch64_pfalse_reg (<VPRED>mode);
  	emit_insn (gen_extract_last_<mode> (operands[0], sel, operands[1]));
  	DONE;
        }
***************
*** 520,526 ****
  (define_insn_and_split "*vec_extract<mode><Vel>_0"
    [(set (match_operand:<VEL> 0 "aarch64_simd_nonimmediate_operand" "=r, w, Utv")
  	(vec_select:<VEL>
! 	  (match_operand:SVE_ALL 1 "register_operand" "w, 0, w")
  	  (parallel [(const_int 0)])))]
    "TARGET_SVE"
    {
--- 2669,2675 ----
  (define_insn_and_split "*vec_extract<mode><Vel>_0"
    [(set (match_operand:<VEL> 0 "aarch64_simd_nonimmediate_operand" "=r, w, Utv")
  	(vec_select:<VEL>
! 	  (match_operand:SVE_FULL 1 "register_operand" "w, 0, w")
  	  (parallel [(const_int 0)])))]
    "TARGET_SVE"
    {
***************
*** 554,560 ****
  (define_insn "*vec_extract<mode><Vel>_v128"
    [(set (match_operand:<VEL> 0 "aarch64_simd_nonimmediate_operand" "=r, w, Utv")
  	(vec_select:<VEL>
! 	  (match_operand:SVE_ALL 1 "register_operand" "w, w, w")
  	  (parallel [(match_operand:SI 2 "const_int_operand")])))]
    "TARGET_SVE
     && IN_RANGE (INTVAL (operands[2]) * GET_MODE_SIZE (<VEL>mode), 1, 15)"
--- 2703,2709 ----
  (define_insn "*vec_extract<mode><Vel>_v128"
    [(set (match_operand:<VEL> 0 "aarch64_simd_nonimmediate_operand" "=r, w, Utv")
  	(vec_select:<VEL>
! 	  (match_operand:SVE_FULL 1 "register_operand" "w, w, w")
  	  (parallel [(match_operand:SI 2 "const_int_operand")])))]
    "TARGET_SVE
     && IN_RANGE (INTVAL (operands[2]) * GET_MODE_SIZE (<VEL>mode), 1, 15)"
***************
*** 580,586 ****
  (define_insn "*vec_extract<mode><Vel>_dup"
    [(set (match_operand:<VEL> 0 "register_operand" "=w")
  	(vec_select:<VEL>
! 	  (match_operand:SVE_ALL 1 "register_operand" "w")
  	  (parallel [(match_operand:SI 2 "const_int_operand")])))]
    "TARGET_SVE
     && IN_RANGE (INTVAL (operands[2]) * GET_MODE_SIZE (<VEL>mode), 16, 63)"
--- 2729,2735 ----
  (define_insn "*vec_extract<mode><Vel>_dup"
    [(set (match_operand:<VEL> 0 "register_operand" "=w")
  	(vec_select:<VEL>
! 	  (match_operand:SVE_FULL 1 "register_operand" "w")
  	  (parallel [(match_operand:SI 2 "const_int_operand")])))]
    "TARGET_SVE
     && IN_RANGE (INTVAL (operands[2]) * GET_MODE_SIZE (<VEL>mode), 16, 63)"
***************
*** 593,1037 ****
  ;; Extract an element outside the range of DUP.  This pattern requires the
  ;; source and destination to be the same.
  (define_insn "*vec_extract<mode><Vel>_ext"
!   [(set (match_operand:<VEL> 0 "register_operand" "=w")
  	(vec_select:<VEL>
! 	  (match_operand:SVE_ALL 1 "register_operand" "0")
  	  (parallel [(match_operand:SI 2 "const_int_operand")])))]
    "TARGET_SVE && INTVAL (operands[2]) * GET_MODE_SIZE (<VEL>mode) >= 64"
    {
      operands[0] = gen_rtx_REG (<MODE>mode, REGNO (operands[0]));
      operands[2] = GEN_INT (INTVAL (operands[2]) * GET_MODE_SIZE (<VEL>mode));
!     return "ext\t%0.b, %0.b, %0.b, #%2";
    }
  )
  
  ;; Extract the last active element of operand 1 into operand 0.
  ;; If no elements are active, extract the last inactive element instead.
! (define_insn "extract_last_<mode>"
!   [(set (match_operand:<VEL> 0 "register_operand" "=r, w")
  	(unspec:<VEL>
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (match_operand:SVE_ALL 2 "register_operand" "w, w")]
! 	  UNSPEC_LASTB))]
    "TARGET_SVE"
    "@
!    lastb\t%<vwcore>0, %1, %2.<Vetype>
!    lastb\t%<Vetype>0, %1, %2.<Vetype>"
  )
  
! (define_expand "vec_duplicate<mode>"
!   [(parallel
!     [(set (match_operand:SVE_ALL 0 "register_operand")
! 	  (vec_duplicate:SVE_ALL
! 	    (match_operand:<VEL> 1 "aarch64_sve_dup_operand")))
!      (clobber (scratch:<VPRED>))])]
    "TARGET_SVE"
    {
!     if (MEM_P (operands[1]))
!       {
! 	rtx ptrue = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
! 	emit_insn (gen_sve_ld1r<mode> (operands[0], ptrue, operands[1],
! 				       CONST0_RTX (<MODE>mode)));
! 	DONE;
!       }
    }
  )
  
! ;; Accept memory operands for the benefit of combine, and also in case
! ;; the scalar input gets spilled to memory during RA.  We want to split
! ;; the load at the first opportunity in order to allow the PTRUE to be
! ;; optimized with surrounding code.
! (define_insn_and_split "*vec_duplicate<mode>_reg"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w, w, w")
! 	(vec_duplicate:SVE_ALL
! 	  (match_operand:<VEL> 1 "aarch64_sve_dup_operand" "r, w, Uty")))
!    (clobber (match_scratch:<VPRED> 2 "=X, X, Upl"))]
    "TARGET_SVE"
-   "@
-    mov\t%0.<Vetype>, %<vwcore>1
-    mov\t%0.<Vetype>, %<Vetype>1
-    #"
-   "&& MEM_P (operands[1])"
-   [(const_int 0)]
    {
!     if (GET_CODE (operands[2]) == SCRATCH)
!       operands[2] = gen_reg_rtx (<VPRED>mode);
!     emit_move_insn (operands[2], CONSTM1_RTX (<VPRED>mode));
!     emit_insn (gen_sve_ld1r<mode> (operands[0], operands[2], operands[1],
! 				   CONST0_RTX (<MODE>mode)));
!     DONE;
    }
-   [(set_attr "length" "4,4,8")]
  )
  
! ;; This is used for vec_duplicate<mode>s from memory, but can also
! ;; be used by combine to optimize selects of a a vec_duplicate<mode>
! ;; with zero.
! (define_insn "sve_ld1r<mode>"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w")
! 	(unspec:SVE_ALL
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (vec_duplicate:SVE_ALL
! 	     (match_operand:<VEL> 2 "aarch64_sve_ld1r_operand" "Uty"))
! 	   (match_operand:SVE_ALL 3 "aarch64_simd_imm_zero")]
  	  UNSPEC_SEL))]
    "TARGET_SVE"
-   "ld1r<Vesize>\t%0.<Vetype>, %1/z, %2"
  )
  
! ;; Load 128 bits from memory and duplicate to fill a vector.  Since there
! ;; are so few operations on 128-bit "elements", we don't define a VNx1TI
! ;; and simply use vectors of bytes instead.
! (define_insn "*sve_ld1rq<Vesize>"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w")
! 	(unspec:SVE_ALL
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (match_operand:TI 2 "aarch64_sve_ld1r_operand" "Uty")]
! 	  UNSPEC_LD1RQ))]
    "TARGET_SVE"
!   "ld1rq<Vesize>\t%0.<Vetype>, %1/z, %2"
  )
  
! ;; Implement a predicate broadcast by shifting the low bit of the scalar
! ;; input into the top bit and using a WHILELO.  An alternative would be to
! ;; duplicate the input and do a compare with zero.
! (define_expand "vec_duplicate<mode>"
!   [(set (match_operand:PRED_ALL 0 "register_operand")
! 	(vec_duplicate:PRED_ALL (match_operand 1 "register_operand")))]
    "TARGET_SVE"
    {
!     rtx tmp = gen_reg_rtx (DImode);
!     rtx op1 = gen_lowpart (DImode, operands[1]);
!     emit_insn (gen_ashldi3 (tmp, op1, gen_int_mode (63, DImode)));
!     emit_insn (gen_while_ultdi<mode> (operands[0], const0_rtx, tmp));
!     DONE;
    }
  )
  
! (define_insn "vec_series<mode>"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w, w, w")
! 	(vec_series:SVE_I
! 	  (match_operand:<VEL> 1 "aarch64_sve_index_operand" "Usi, r, r")
! 	  (match_operand:<VEL> 2 "aarch64_sve_index_operand" "r, Usi, r")))]
    "TARGET_SVE"
!   "@
!    index\t%0.<Vetype>, #%1, %<vw>2
!    index\t%0.<Vetype>, %<vw>1, #%2
!    index\t%0.<Vetype>, %<vw>1, %<vw>2"
  )
  
! ;; Optimize {x, x, x, x, ...} + {0, n, 2*n, 3*n, ...} if n is in range
! ;; of an INDEX instruction.
! (define_insn "*vec_series<mode>_plus"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w")
! 	(plus:SVE_I
! 	  (vec_duplicate:SVE_I
! 	    (match_operand:<VEL> 1 "register_operand" "r"))
! 	  (match_operand:SVE_I 2 "immediate_operand")))]
!   "TARGET_SVE && aarch64_check_zero_based_sve_index_immediate (operands[2])"
    {
!     operands[2] = aarch64_check_zero_based_sve_index_immediate (operands[2]);
!     return "index\t%0.<Vetype>, %<vw>1, #%2";
    }
  )
  
! ;; Unpredicated LD[234].
! (define_expand "vec_load_lanes<mode><vsingle>"
!   [(set (match_operand:SVE_STRUCT 0 "register_operand")
! 	(unspec:SVE_STRUCT
! 	  [(match_dup 2)
! 	   (match_operand:SVE_STRUCT 1 "memory_operand")]
! 	  UNSPEC_LDN))]
    "TARGET_SVE"
    {
!     operands[2] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Predicated LD[234].
! (define_insn "vec_mask_load_lanes<mode><vsingle>"
!   [(set (match_operand:SVE_STRUCT 0 "register_operand" "=w")
! 	(unspec:SVE_STRUCT
! 	  [(match_operand:<VPRED> 2 "register_operand" "Upl")
! 	   (match_operand:SVE_STRUCT 1 "memory_operand" "m")]
! 	  UNSPEC_LDN))]
    "TARGET_SVE"
!   "ld<vector_count><Vesize>\t%0, %2/z, %1"
  )
  
! ;; Unpredicated ST[234].  This is always a full update, so the dependence
! ;; on the old value of the memory location (via (match_dup 0)) is redundant.
! ;; There doesn't seem to be any obvious benefit to treating the all-true
! ;; case differently though.  In particular, it's very unlikely that we'll
! ;; only find out during RTL that a store_lanes is dead.
! (define_expand "vec_store_lanes<mode><vsingle>"
!   [(set (match_operand:SVE_STRUCT 0 "memory_operand")
! 	(unspec:SVE_STRUCT
  	  [(match_dup 2)
! 	   (match_operand:SVE_STRUCT 1 "register_operand")
! 	   (match_dup 0)]
! 	  UNSPEC_STN))]
    "TARGET_SVE"
    {
!     operands[2] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Predicated ST[234].
! (define_insn "vec_mask_store_lanes<mode><vsingle>"
!   [(set (match_operand:SVE_STRUCT 0 "memory_operand" "+m")
! 	(unspec:SVE_STRUCT
! 	  [(match_operand:<VPRED> 2 "register_operand" "Upl")
! 	   (match_operand:SVE_STRUCT 1 "register_operand" "w")
! 	   (match_dup 0)]
! 	  UNSPEC_STN))]
    "TARGET_SVE"
!   "st<vector_count><Vesize>\t%1, %2, %0"
  )
  
! (define_expand "vec_perm<mode>"
!   [(match_operand:SVE_ALL 0 "register_operand")
!    (match_operand:SVE_ALL 1 "register_operand")
!    (match_operand:SVE_ALL 2 "register_operand")
!    (match_operand:<V_INT_EQUIV> 3 "aarch64_sve_vec_perm_operand")]
!   "TARGET_SVE && GET_MODE_NUNITS (<MODE>mode).is_constant ()"
    {
!     aarch64_expand_sve_vec_perm (operands[0], operands[1],
! 				 operands[2], operands[3]);
!     DONE;
    }
  )
  
! (define_insn "*aarch64_sve_tbl<mode>"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w")
! 	(unspec:SVE_ALL
! 	  [(match_operand:SVE_ALL 1 "register_operand" "w")
! 	   (match_operand:<V_INT_EQUIV> 2 "register_operand" "w")]
! 	  UNSPEC_TBL))]
    "TARGET_SVE"
-   "tbl\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
  )
  
! (define_insn "*aarch64_sve_<perm_insn><perm_hilo><mode>"
!   [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
! 	(unspec:PRED_ALL [(match_operand:PRED_ALL 1 "register_operand" "Upa")
! 			  (match_operand:PRED_ALL 2 "register_operand" "Upa")]
! 			 PERMUTE))]
    "TARGET_SVE"
-   "<perm_insn><perm_hilo>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
  )
  
! (define_insn "aarch64_sve_<perm_insn><perm_hilo><mode>"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w")
! 	(unspec:SVE_ALL [(match_operand:SVE_ALL 1 "register_operand" "w")
! 			 (match_operand:SVE_ALL 2 "register_operand" "w")]
! 			PERMUTE))]
    "TARGET_SVE"
!   "<perm_insn><perm_hilo>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
  )
  
! (define_insn "*aarch64_sve_rev64<mode>"
!   [(set (match_operand:SVE_BHS 0 "register_operand" "=w")
! 	(unspec:SVE_BHS
! 	  [(match_operand:VNx2BI 1 "register_operand" "Upl")
! 	   (unspec:SVE_BHS [(match_operand:SVE_BHS 2 "register_operand" "w")]
! 			   UNSPEC_REV64)]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "rev<Vesize>\t%0.d, %1/m, %2.d"
  )
  
! (define_insn "*aarch64_sve_rev32<mode>"
!   [(set (match_operand:SVE_BH 0 "register_operand" "=w")
! 	(unspec:SVE_BH
! 	  [(match_operand:VNx4BI 1 "register_operand" "Upl")
! 	   (unspec:SVE_BH [(match_operand:SVE_BH 2 "register_operand" "w")]
! 			  UNSPEC_REV32)]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "rev<Vesize>\t%0.s, %1/m, %2.s"
  )
  
! (define_insn "*aarch64_sve_rev16vnx16qi"
!   [(set (match_operand:VNx16QI 0 "register_operand" "=w")
! 	(unspec:VNx16QI
! 	  [(match_operand:VNx8BI 1 "register_operand" "Upl")
! 	   (unspec:VNx16QI [(match_operand:VNx16QI 2 "register_operand" "w")]
! 			   UNSPEC_REV16)]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "revb\t%0.h, %1/m, %2.h"
  )
  
! (define_insn "*aarch64_sve_rev<mode>"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w")
! 	(unspec:SVE_ALL [(match_operand:SVE_ALL 1 "register_operand" "w")]
! 			UNSPEC_REV))]
    "TARGET_SVE"
!   "rev\t%0.<Vetype>, %1.<Vetype>")
  
! (define_insn "*aarch64_sve_dup_lane<mode>"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w")
! 	(vec_duplicate:SVE_ALL
! 	  (vec_select:<VEL>
! 	    (match_operand:SVE_ALL 1 "register_operand" "w")
! 	    (parallel [(match_operand:SI 2 "const_int_operand")]))))]
!   "TARGET_SVE
!    && IN_RANGE (INTVAL (operands[2]) * GET_MODE_SIZE (<VEL>mode), 0, 63)"
!   "dup\t%0.<Vetype>, %1.<Vetype>[%2]"
  )
  
! ;; Note that the immediate (third) operand is the lane index not
! ;; the byte index.
! (define_insn "*aarch64_sve_ext<mode>"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w")
! 	(unspec:SVE_ALL [(match_operand:SVE_ALL 1 "register_operand" "0")
! 			 (match_operand:SVE_ALL 2 "register_operand" "w")
! 			 (match_operand:SI 3 "const_int_operand")]
! 			UNSPEC_EXT))]
    "TARGET_SVE
!    && IN_RANGE (INTVAL (operands[3]) * GET_MODE_SIZE (<VEL>mode), 0, 255)"
    {
!     operands[3] = GEN_INT (INTVAL (operands[3]) * GET_MODE_SIZE (<VEL>mode));
!     return "ext\\t%0.b, %0.b, %2.b, #%3";
    }
  )
  
  (define_insn "add<mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w, w, w, w")
  	(plus:SVE_I
! 	  (match_operand:SVE_I 1 "register_operand" "%0, 0, 0, w")
! 	  (match_operand:SVE_I 2 "aarch64_sve_add_operand" "vsa, vsn, vsi, w")))]
    "TARGET_SVE"
    "@
     add\t%0.<Vetype>, %0.<Vetype>, #%D2
     sub\t%0.<Vetype>, %0.<Vetype>, #%N2
!    * return aarch64_output_sve_inc_dec_immediate (\"%0.<Vetype>\", operands[2]);
     add\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
  )
  
  (define_insn "sub<mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w, w")
! 	(minus:SVE_I
! 	  (match_operand:SVE_I 1 "aarch64_sve_arith_operand" "w, vsa")
! 	  (match_operand:SVE_I 2 "register_operand" "w, 0")))]
    "TARGET_SVE"
    "@
     sub\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>
!    subr\t%0.<Vetype>, %0.<Vetype>, #%D1"
  )
  
! ;; Unpredicated multiplication.
! (define_expand "mul<mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand")
! 	(unspec:SVE_I
! 	  [(match_dup 3)
! 	   (mult:SVE_I
! 	     (match_operand:SVE_I 1 "register_operand")
! 	     (match_operand:SVE_I 2 "aarch64_sve_mul_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Multiplication predicated with a PTRUE.  We don't actually need the
! ;; predicate for the first alternative, but using Upa or X isn't likely
! ;; to gain much and would make the instruction seem less uniform to the
! ;; register allocator.
! (define_insn_and_split "*mul<mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w, w, ?&w")
! 	(unspec:SVE_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (mult:SVE_I
! 	     (match_operand:SVE_I 2 "register_operand" "%0, 0, w")
! 	     (match_operand:SVE_I 3 "aarch64_sve_mul_operand" "vsm, w, w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    "@
!    #
!    mul\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;mul\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   ; Split the unpredicated form after reload, so that we don't have
!   ; the unnecessary PTRUE.
!   "&& reload_completed
!    && !register_operand (operands[3], <MODE>mode)"
!   [(set (match_dup 0) (mult:SVE_I (match_dup 2) (match_dup 3)))]
!   ""
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Unpredicated multiplications by a constant (post-RA only).
! ;; These are generated by splitting a predicated instruction whose
! ;; predicate is unused.
! (define_insn "*post_ra_mul<mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w")
! 	(mult:SVE_I
! 	  (match_operand:SVE_I 1 "register_operand" "0")
! 	  (match_operand:SVE_I 2 "aarch64_sve_mul_immediate")))]
!   "TARGET_SVE && reload_completed"
!   "mul\t%0.<Vetype>, %0.<Vetype>, #%2"
  )
  
! (define_insn "*madd<mode>"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w, w, ?&w")
! 	(plus:SVE_I
! 	  (unspec:SVE_I
! 	    [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	     (mult:SVE_I (match_operand:SVE_I 2 "register_operand" "%0, w, w")
! 			 (match_operand:SVE_I 3 "register_operand" "w, w, w"))]
! 	    UNSPEC_MERGE_PTRUE)
! 	  (match_operand:SVE_I 4 "register_operand" "w, 0, w")))]
    "TARGET_SVE"
    "@
!    mad\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    mla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %4\;mla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
! (define_insn "*msub<mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w, w, ?&w")
! 	(minus:SVE_I
! 	  (match_operand:SVE_I 4 "register_operand" "w, 0, w")
! 	  (unspec:SVE_I
! 	    [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	     (mult:SVE_I (match_operand:SVE_I 2 "register_operand" "%0, w, w")
! 			 (match_operand:SVE_I 3 "register_operand" "w, w, w"))]
! 	    UNSPEC_MERGE_PTRUE)))]
    "TARGET_SVE"
    "@
!    msb\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    mls\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %4\;mls\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
  ;; Unpredicated highpart multiplication.
  (define_expand "<su>mul<mode>3_highpart"
!   [(set (match_operand:SVE_I 0 "register_operand")
! 	(unspec:SVE_I
  	  [(match_dup 3)
! 	   (unspec:SVE_I [(match_operand:SVE_I 1 "register_operand")
! 			  (match_operand:SVE_I 2 "register_operand")]
! 			 MUL_HIGHPART)]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
  ;; Predicated highpart multiplication.
! (define_insn "*<su>mul<mode>3_highpart"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_I
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_I [(match_operand:SVE_I 2 "register_operand" "%0, w")
! 			  (match_operand:SVE_I 3 "register_operand" "w, w")]
! 			 MUL_HIGHPART)]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    "@
     <su>mulh\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
--- 2742,4026 ----
  ;; Extract an element outside the range of DUP.  This pattern requires the
  ;; source and destination to be the same.
  (define_insn "*vec_extract<mode><Vel>_ext"
!   [(set (match_operand:<VEL> 0 "register_operand" "=w, ?&w")
  	(vec_select:<VEL>
! 	  (match_operand:SVE_FULL 1 "register_operand" "0, w")
  	  (parallel [(match_operand:SI 2 "const_int_operand")])))]
    "TARGET_SVE && INTVAL (operands[2]) * GET_MODE_SIZE (<VEL>mode) >= 64"
    {
      operands[0] = gen_rtx_REG (<MODE>mode, REGNO (operands[0]));
      operands[2] = GEN_INT (INTVAL (operands[2]) * GET_MODE_SIZE (<VEL>mode));
!     return (which_alternative == 0
! 	    ? "ext\t%0.b, %0.b, %0.b, #%2"
! 	    : "movprfx\t%0, %1\;ext\t%0.b, %0.b, %1.b, #%2");
    }
+   [(set_attr "movprfx" "*,yes")]
  )
  
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT,FP] Extract active element
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - LASTA
+ ;; - LASTB
+ ;; -------------------------------------------------------------------------
+ 
  ;; Extract the last active element of operand 1 into operand 0.
  ;; If no elements are active, extract the last inactive element instead.
! (define_insn "@extract_<last_op>_<mode>"
!   [(set (match_operand:<VEL> 0 "register_operand" "=?r, w")
  	(unspec:<VEL>
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (match_operand:SVE_FULL 2 "register_operand" "w, w")]
! 	  LAST))]
    "TARGET_SVE"
    "@
!    last<ab>\t%<vwcore>0, %1, %2.<Vetype>
!    last<ab>\t%<Vetype>0, %1, %2.<Vetype>"
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [PRED] Extract index
! ;; -------------------------------------------------------------------------
! ;; The patterns in this section are synthetic.
! ;; -------------------------------------------------------------------------
! 
! ;; Handle extractions from a predicate by converting to an integer vector
! ;; and extracting from there.
! (define_expand "vec_extract<vpred><Vel>"
!   [(match_operand:<VEL> 0 "register_operand")
!    (match_operand:<VPRED> 1 "register_operand")
!    (match_operand:SI 2 "nonmemory_operand")
!    ;; Dummy operand to which we can attach the iterator.
!    (reg:SVE_FULL_I V0_REGNUM)]
    "TARGET_SVE"
    {
!     rtx tmp = gen_reg_rtx (<MODE>mode);
!     emit_insn (gen_vcond_mask_<mode><vpred> (tmp, operands[1],
! 					     CONST1_RTX (<MODE>mode),
! 					     CONST0_RTX (<MODE>mode)));
!     emit_insn (gen_vec_extract<mode><Vel> (operands[0], tmp, operands[2]));
!     DONE;
    }
  )
  
! ;; =========================================================================
! ;; == Unary arithmetic
! ;; =========================================================================
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] General unary arithmetic corresponding to rtx codes
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - ABS
! ;; - CLS (= clrsb)
! ;; - CLZ
! ;; - CNT (= popcount)
! ;; - NEG
! ;; - NOT
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated integer unary arithmetic.
! (define_expand "<optab><mode>2"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
! 	  [(match_dup 2)
! 	   (SVE_INT_UNARY:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 1 "register_operand"))]
! 	  UNSPEC_PRED_X))]
    "TARGET_SVE"
    {
!     operands[2] = aarch64_ptrue_reg (<VPRED>mode);
    }
  )
  
! ;; Integer unary arithmetic predicated with a PTRUE.
! (define_insn "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_I
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (SVE_INT_UNARY:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "w"))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE"
!   "<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
! )
! 
! ;; Predicated integer unary arithmetic with merging.
! (define_expand "@cond_<optab><mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (SVE_INT_UNARY:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand"))
! 	   (match_operand:SVE_FULL_I 3 "aarch64_simd_reg_or_zero")]
  	  UNSPEC_SEL))]
    "TARGET_SVE"
  )
  
! ;; Predicated integer unary arithmetic, merging with the first input.
! (define_insn "*cond_<optab><mode>_2"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (SVE_INT_UNARY:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "0, w"))
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>
!    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated integer unary arithmetic, merging with an independent value.
! ;;
! ;; The earlyclobber isn't needed for the first alternative, but omitting
! ;; it would only help the case in which operands 2 and 3 are the same,
! ;; which is handled above rather than here.  Marking all the alternatives
! ;; as earlyclobber helps to make the instruction more regular to the
! ;; register allocator.
! (define_insn "*cond_<optab><mode>_any"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=&w, ?&w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (SVE_INT_UNARY:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "w, w, w"))
! 	   (match_operand:SVE_FULL_I 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && !rtx_equal_p (operands[2], operands[3])"
!   "@
!    <sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
!    movprfx\t%0, %3\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
!   [(set_attr "movprfx" "*,yes,yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] General unary arithmetic corresponding to unspecs
! ;; -------------------------------------------------------------------------
! ;; Includes
! ;; - RBIT
! ;; - REVB
! ;; - REVH
! ;; - REVW
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated integer unary operations.
! (define_insn "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_I
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (unspec:SVE_FULL_I
! 	     [(match_operand:SVE_FULL_I 2 "register_operand" "w")]
! 	     SVE_INT_UNARY)]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE && <elem_bits> >= <min_elem_bits>"
!   "<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
! )
! 
! ;; Predicated integer unary operations with merging.
! (define_insn "@cond_<optab><mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_I
! 	     [(match_operand:SVE_FULL_I 2 "register_operand" "w, w, w")]
! 	     SVE_INT_UNARY)
! 	   (match_operand:SVE_FULL_I 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && <elem_bits> >= <min_elem_bits>"
!   "@
!    <sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
!    movprfx\t%0, %3\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
!   [(set_attr "movprfx" "*,yes,yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Sign and zero extension
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - SXTB
! ;; - SXTH
! ;; - SXTW
! ;; - UXTB
! ;; - UXTH
! ;; - UXTW
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated sign and zero extension from a narrower mode.
! (define_expand "<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2"
!   [(set (match_operand:SVE_HSDI 0 "register_operand")
! 	(unspec:SVE_HSDI
! 	  [(match_dup 2)
! 	   (ANY_EXTEND:SVE_HSDI
! 	     (match_operand:SVE_PARTIAL_I 1 "register_operand"))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE && (~<SVE_HSDI:narrower_mask> & <SVE_PARTIAL_I:self_mask>) == 0"
!   {
!     operands[2] = aarch64_ptrue_reg (<SVE_HSDI:VPRED>mode);
!   }
! )
! 
! ;; Predicated sign and zero extension from a narrower mode.
! (define_insn "*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2"
!   [(set (match_operand:SVE_HSDI 0 "register_operand" "=w")
! 	(unspec:SVE_HSDI
! 	  [(match_operand:<SVE_HSDI:VPRED> 1 "register_operand" "Upl")
! 	   (ANY_EXTEND:SVE_HSDI
! 	     (match_operand:SVE_PARTIAL_I 2 "register_operand" "w"))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE && (~<SVE_HSDI:narrower_mask> & <SVE_PARTIAL_I:self_mask>) == 0"
!   "<su>xt<SVE_PARTIAL_I:Vesize>\t%0.<SVE_HSDI:Vetype>, %1/m, %2.<SVE_HSDI:Vetype>"
! )
! 
! ;; Predicated truncate-and-sign-extend operations.
! (define_insn "@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>"
!   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_HSDI
! 	  [(match_operand:<SVE_FULL_HSDI:VPRED> 1 "register_operand" "Upl")
! 	   (sign_extend:SVE_FULL_HSDI
! 	     (truncate:SVE_PARTIAL_I
! 	       (match_operand:SVE_FULL_HSDI 2 "register_operand" "w")))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE
!    && (~<SVE_FULL_HSDI:narrower_mask> & <SVE_PARTIAL_I:self_mask>) == 0"
!   "sxt<SVE_PARTIAL_I:Vesize>\t%0.<SVE_FULL_HSDI:Vetype>, %1/m, %2.<SVE_FULL_HSDI:Vetype>"
! )
! 
! ;; Predicated truncate-and-sign-extend operations with merging.
! (define_insn "@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>"
!   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w, ?&w, ?&w")
! 	(unspec:SVE_FULL_HSDI
! 	  [(match_operand:<SVE_FULL_HSDI:VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (sign_extend:SVE_FULL_HSDI
! 	     (truncate:SVE_PARTIAL_I
! 	       (match_operand:SVE_FULL_HSDI 2 "register_operand" "w, w, w")))
! 	   (match_operand:SVE_FULL_HSDI 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && (~<SVE_FULL_HSDI:narrower_mask> & <SVE_PARTIAL_I:self_mask>) == 0"
!   "@
!    sxt<SVE_PARTIAL_I:Vesize>\t%0.<SVE_FULL_HSDI:Vetype>, %1/m, %2.<SVE_FULL_HSDI:Vetype>
!    movprfx\t%0.<SVE_FULL_HSDI:Vetype>, %1/z, %2.<SVE_FULL_HSDI:Vetype>\;sxt<SVE_PARTIAL_I:Vesize>\t%0.<SVE_FULL_HSDI:Vetype>, %1/m, %2.<SVE_FULL_HSDI:Vetype>
!    movprfx\t%0, %3\;sxt<SVE_PARTIAL_I:Vesize>\t%0.<SVE_FULL_HSDI:Vetype>, %1/m, %2.<SVE_FULL_HSDI:Vetype>"
!   [(set_attr "movprfx" "*,yes,yes")]
! )
! 
! ;; Predicated truncate-and-zero-extend operations, merging with the
! ;; first input.
! ;;
! ;; The canonical form of this operation is an AND of a constant rather
! ;; than (zero_extend (truncate ...)).
! (define_insn "*cond_uxt<mode>_2"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (and:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "0, w")
! 	     (match_operand:SVE_FULL_I 3 "aarch64_sve_uxt_immediate"))
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "@
!    uxt%e3\t%0.<Vetype>, %1/m, %0.<Vetype>
!    movprfx\t%0, %2\;uxt%e3\t%0.<Vetype>, %1/m, %2.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated truncate-and-zero-extend operations, merging with an
! ;; independent value.
! ;;
! ;; The earlyclobber isn't needed for the first alternative, but omitting
! ;; it would only help the case in which operands 2 and 4 are the same,
! ;; which is handled above rather than here.  Marking all the alternatives
! ;; as early-clobber helps to make the instruction more regular to the
! ;; register allocator.
! (define_insn "*cond_uxt<mode>_any"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=&w, ?&w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (and:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "w, w, w")
! 	     (match_operand:SVE_FULL_I 3 "aarch64_sve_uxt_immediate"))
! 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_reg_or_zero" "0, Dz, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && !rtx_equal_p (operands[2], operands[4])"
!   "@
!    uxt%e3\t%0.<Vetype>, %1/m, %2.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;uxt%e3\t%0.<Vetype>, %1/m, %2.<Vetype>
!    movprfx\t%0, %4\;uxt%e3\t%0.<Vetype>, %1/m, %2.<Vetype>"
!   [(set_attr "movprfx" "*,yes,yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Truncation
! ;; -------------------------------------------------------------------------
! ;; The patterns in this section are synthetic.
! ;; -------------------------------------------------------------------------
! 
! ;; Truncate to a partial SVE vector from either a full vector or a
! ;; wider partial vector.  This is a no-op, because we can just ignore
! ;; the unused upper bits of the source.
! (define_insn_and_split "trunc<SVE_HSDI:mode><SVE_PARTIAL_I:mode>2"
!   [(set (match_operand:SVE_PARTIAL_I 0 "register_operand" "=w")
! 	(truncate:SVE_PARTIAL_I
! 	  (match_operand:SVE_HSDI 1 "register_operand" "w")))]
!   "TARGET_SVE && (~<SVE_HSDI:narrower_mask> & <SVE_PARTIAL_I:self_mask>) == 0"
!   "#"
!   "&& reload_completed"
!   [(set (match_dup 0) (match_dup 1))]
!   {
!     operands[1] = aarch64_replace_reg_mode (operands[1],
! 					    <SVE_PARTIAL_I:MODE>mode);
!   }
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Logical inverse
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - CNOT
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated logical inverse.
! (define_expand "@aarch64_pred_cnot<mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
! 	  [(unspec:<VPRED>
! 	     [(match_operand:<VPRED> 1 "register_operand")
! 	      (match_operand:SI 2 "aarch64_sve_ptrue_flag")
! 	      (eq:<VPRED>
! 		(match_operand:SVE_FULL_I 3 "register_operand")
! 		(match_dup 4))]
! 	     UNSPEC_PRED_Z)
! 	   (match_dup 5)
! 	   (match_dup 4)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
    {
!     operands[4] = CONST0_RTX (<MODE>mode);
!     operands[5] = CONST1_RTX (<MODE>mode);
    }
  )
  
! (define_insn "*cnot<mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_I
! 	  [(unspec:<VPRED>
! 	     [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	      (match_operand:SI 5 "aarch64_sve_ptrue_flag")
! 	      (eq:<VPRED>
! 		(match_operand:SVE_FULL_I 2 "register_operand" "w")
! 		(match_operand:SVE_FULL_I 3 "aarch64_simd_imm_zero"))]
! 	     UNSPEC_PRED_Z)
! 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_imm_one")
! 	   (match_dup 3)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "cnot\t%0.<Vetype>, %1/m, %2.<Vetype>"
  )
  
! ;; Predicated logical inverse with merging.
! (define_expand "@cond_cnot<mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (unspec:SVE_FULL_I
! 	     [(unspec:<VPRED>
! 		[(match_dup 4)
! 		 (const_int SVE_KNOWN_PTRUE)
! 		 (eq:<VPRED>
! 		   (match_operand:SVE_FULL_I 2 "register_operand")
! 		   (match_dup 5))]
! 		UNSPEC_PRED_Z)
! 	      (match_dup 6)
! 	      (match_dup 5)]
! 	     UNSPEC_SEL)
! 	   (match_operand:SVE_FULL_I 3 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
    {
!     operands[4] = CONSTM1_RTX (<VPRED>mode);
!     operands[5] = CONST0_RTX (<MODE>mode);
!     operands[6] = CONST1_RTX (<MODE>mode);
    }
  )
  
! ;; Predicated logical inverse, merging with the first input.
! (define_insn_and_rewrite "*cond_cnot<mode>_2"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   ;; Logical inverse of operand 2 (as above).
! 	   (unspec:SVE_FULL_I
! 	     [(unspec:<VPRED>
! 		[(match_operand 5)
! 		 (const_int SVE_KNOWN_PTRUE)
! 		 (eq:<VPRED>
! 		   (match_operand:SVE_FULL_I 2 "register_operand" "0, w")
! 		   (match_operand:SVE_FULL_I 3 "aarch64_simd_imm_zero"))]
! 		UNSPEC_PRED_Z)
! 	      (match_operand:SVE_FULL_I 4 "aarch64_simd_imm_one")
! 	      (match_dup 3)]
! 	     UNSPEC_SEL)
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
+   "@
+    cnot\t%0.<Vetype>, %1/m, %0.<Vetype>
+    movprfx\t%0, %2\;cnot\t%0.<Vetype>, %1/m, %2.<Vetype>"
+   "&& !CONSTANT_P (operands[5])"
    {
!     operands[5] = CONSTM1_RTX (<VPRED>mode);
    }
+   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated logical inverse, merging with an independent value.
! ;;
! ;; The earlyclobber isn't needed for the first alternative, but omitting
! ;; it would only help the case in which operands 2 and 6 are the same,
! ;; which is handled above rather than here.  Marking all the alternatives
! ;; as earlyclobber helps to make the instruction more regular to the
! ;; register allocator.
! (define_insn_and_rewrite "*cond_cnot<mode>_any"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=&w, ?&w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   ;; Logical inverse of operand 2 (as above).
! 	   (unspec:SVE_FULL_I
! 	     [(unspec:<VPRED>
! 		[(match_operand 5)
! 		 (const_int SVE_KNOWN_PTRUE)
! 		 (eq:<VPRED>
! 		   (match_operand:SVE_FULL_I 2 "register_operand" "w, w, w")
! 		   (match_operand:SVE_FULL_I 3 "aarch64_simd_imm_zero"))]
! 		UNSPEC_PRED_Z)
! 	      (match_operand:SVE_FULL_I 4 "aarch64_simd_imm_one")
! 	      (match_dup 3)]
! 	     UNSPEC_SEL)
! 	   (match_operand:SVE_FULL_I 6 "aarch64_simd_reg_or_zero" "0, Dz, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && !rtx_equal_p (operands[2], operands[6])"
!   "@
!    cnot\t%0.<Vetype>, %1/m, %2.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;cnot\t%0.<Vetype>, %1/m, %2.<Vetype>
!    movprfx\t%0, %6\;cnot\t%0.<Vetype>, %1/m, %2.<Vetype>"
!   "&& !CONSTANT_P (operands[5])"
!   {
!     operands[5] = CONSTM1_RTX (<VPRED>mode);
!   }
!   [(set_attr "movprfx" "*,yes,yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP<-INT] General unary arithmetic that maps to unspecs
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FEXPA
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated unary operations that take an integer and return a float.
! (define_insn "@aarch64_sve_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<V_INT_EQUIV> 1 "register_operand" "w")]
! 	  SVE_FP_UNARY_INT))]
    "TARGET_SVE"
!   "<sve_fp_op>\t%0.<Vetype>, %1.<Vetype>"
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] General unary arithmetic corresponding to unspecs
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FABS
! ;; - FNEG
! ;; - FRECPE
! ;; - FRECPX
! ;; - FRINTA
! ;; - FRINTI
! ;; - FRINTM
! ;; - FRINTN
! ;; - FRINTP
! ;; - FRINTX
! ;; - FRINTZ
! ;; - FRSQRTE
! ;; - FSQRT
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated floating-point unary operations.
! (define_insn "@aarch64_sve_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:SVE_FULL_F 1 "register_operand" "w")]
! 	  SVE_FP_UNARY))]
!   "TARGET_SVE"
!   "<sve_fp_op>\t%0.<Vetype>, %1.<Vetype>"
! )
! 
! ;; Unpredicated floating-point unary operations.
! (define_expand "<optab><mode>2"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
  	  [(match_dup 2)
! 	   (const_int SVE_RELAXED_GP)
! 	   (match_operand:SVE_FULL_F 1 "register_operand")]
! 	  SVE_COND_FP_UNARY_OPTAB))]
    "TARGET_SVE"
    {
!     operands[2] = aarch64_ptrue_reg (<VPRED>mode);
    }
  )
  
! ;; Predicated floating-point unary operations.
! (define_insn "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (match_operand:SI 3 "aarch64_sve_gp_strictness")
! 	   (match_operand:SVE_FULL_F 2 "register_operand" "w")]
! 	  SVE_COND_FP_UNARY))]
    "TARGET_SVE"
!   "<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
  )
  
! ;; Predicated floating-point unary arithmetic with merging.
! (define_expand "@cond_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (unspec:SVE_FULL_F
! 	     [(match_dup 1)
! 	      (const_int SVE_STRICT_GP)
! 	      (match_operand:SVE_FULL_F 2 "register_operand")]
! 	     SVE_COND_FP_UNARY)
! 	   (match_operand:SVE_FULL_F 3 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
! )
! 
! ;; Predicated floating-point unary arithmetic, merging with the first input.
! (define_insn_and_rewrite "*cond_<optab><mode>_2"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 3)
! 	      (match_operand:SI 4 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "0, w")]
! 	     SVE_COND_FP_UNARY)
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && aarch64_sve_pred_dominates_p (&operands[3], operands[1])"
!   "@
!    <sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>
!    movprfx\t%0, %2\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
!   "&& !rtx_equal_p (operands[1], operands[3])"
    {
!     operands[3] = copy_rtx (operands[1]);
    }
+   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated floating-point unary arithmetic, merging with an independent
! ;; value.
! ;;
! ;; The earlyclobber isn't needed for the first alternative, but omitting
! ;; it would only help the case in which operands 2 and 3 are the same,
! ;; which is handled above rather than here.  Marking all the alternatives
! ;; as earlyclobber helps to make the instruction more regular to the
! ;; register allocator.
! (define_insn_and_rewrite "*cond_<optab><mode>_any"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=&w, ?&w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 4)
! 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "w, w, w")]
! 	     SVE_COND_FP_UNARY)
! 	   (match_operand:SVE_FULL_F 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[2], operands[3])
!    && aarch64_sve_pred_dominates_p (&operands[4], operands[1])"
!   "@
!    <sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
!    movprfx\t%0, %3\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
!   "&& !rtx_equal_p (operands[1], operands[4])"
!   {
!     operands[4] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes,yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Square root
! ;; -------------------------------------------------------------------------
! 
! (define_expand "sqrt<mode>2"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_dup 2)
! 	   (const_int SVE_RELAXED_GP)
! 	   (match_operand:SVE_FULL_F 1 "register_operand")]
! 	  UNSPEC_COND_FSQRT))]
!   "TARGET_SVE"
! {
!   if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
!     DONE;
!   operands[2] = aarch64_ptrue_reg (<VPRED>mode);
! })
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Reciprocal square root
! ;; -------------------------------------------------------------------------
! 
! (define_expand "rsqrt<mode>2"
!   [(set (match_operand:SVE_FULL_SDF 0 "register_operand")
! 	(unspec:SVE_FULL_SDF
! 	  [(match_operand:SVE_FULL_SDF 1 "register_operand")]
! 	  UNSPEC_RSQRT))]
!   "TARGET_SVE"
! {
!   aarch64_emit_approx_sqrt (operands[0], operands[1], true);
!   DONE;
! })
! 
! (define_expand "@aarch64_rsqrte<mode>"
!   [(set (match_operand:SVE_FULL_SDF 0 "register_operand")
! 	(unspec:SVE_FULL_SDF
! 	  [(match_operand:SVE_FULL_SDF 1 "register_operand")]
! 	  UNSPEC_RSQRTE))]
    "TARGET_SVE"
  )
  
! (define_expand "@aarch64_rsqrts<mode>"
!   [(set (match_operand:SVE_FULL_SDF 0 "register_operand")
! 	(unspec:SVE_FULL_SDF
! 	  [(match_operand:SVE_FULL_SDF 1 "register_operand")
! 	   (match_operand:SVE_FULL_SDF 2 "register_operand")]
! 	  UNSPEC_RSQRTS))]
    "TARGET_SVE"
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [PRED] Inverse
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - NOT
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated predicate inverse.
! (define_expand "one_cmpl<mode>2"
!   [(set (match_operand:PRED_ALL 0 "register_operand")
! 	(and:PRED_ALL
! 	  (not:PRED_ALL (match_operand:PRED_ALL 1 "register_operand"))
! 	  (match_dup 2)))]
    "TARGET_SVE"
!   {
!     operands[2] = aarch64_ptrue_reg (<MODE>mode);
!   }
  )
  
! ;; Predicated predicate inverse.
! (define_insn "*one_cmpl<mode>3"
!   [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
! 	(and:PRED_ALL
! 	  (not:PRED_ALL (match_operand:PRED_ALL 2 "register_operand" "Upa"))
! 	  (match_operand:PRED_ALL 1 "register_operand" "Upa")))]
    "TARGET_SVE"
!   "not\t%0.b, %1/z, %2.b"
  )
  
! ;; =========================================================================
! ;; == Binary arithmetic
! ;; =========================================================================
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] General binary arithmetic corresponding to rtx codes
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - ADD    (merging form only)
! ;; - AND    (merging form only)
! ;; - ASR    (merging form only)
! ;; - EOR    (merging form only)
! ;; - LSL    (merging form only)
! ;; - LSR    (merging form only)
! ;; - MUL
! ;; - ORR    (merging form only)
! ;; - SMAX
! ;; - SMIN
! ;; - SQADD  (SVE2 merging form only)
! ;; - SQSUB  (SVE2 merging form only)
! ;; - SUB    (merging form only)
! ;; - UMAX
! ;; - UMIN
! ;; - UQADD  (SVE2 merging form only)
! ;; - UQSUB  (SVE2 merging form only)
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated integer binary operations that have an immediate form.
! (define_expand "<optab><mode>3"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
! 	  [(match_dup 3)
! 	   (SVE_INT_BINARY_IMM:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 1 "register_operand")
! 	     (match_operand:SVE_FULL_I 2 "aarch64_sve_<sve_imm_con>_operand"))]
! 	  UNSPEC_PRED_X))]
    "TARGET_SVE"
!   {
!     operands[3] = aarch64_ptrue_reg (<VPRED>mode);
!   }
  )
  
! ;; Integer binary operations that have an immediate form, predicated
! ;; with a PTRUE.  We don't actually need the predicate for the first
! ;; and third alternatives, but using Upa or X isn't likely to gain much
! ;; and would make the instruction seem less uniform to the register
! ;; allocator.
! (define_insn_and_split "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, w, ?&w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl")
! 	   (SVE_INT_BINARY_IMM:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "%0, 0, w, w")
! 	     (match_operand:SVE_FULL_I 3 "aarch64_sve_<sve_imm_con>_operand" "<sve_imm_con>, w, <sve_imm_con>, w"))]
! 	  UNSPEC_PRED_X))]
    "TARGET_SVE"
!   "@
!    #
!    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    #
!    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   ; Split the unpredicated form after reload, so that we don't have
!   ; the unnecessary PTRUE.
!   "&& reload_completed
!    && !register_operand (operands[3], <MODE>mode)"
!   [(set (match_dup 0)
! 	(SVE_INT_BINARY_IMM:SVE_FULL_I (match_dup 2) (match_dup 3)))]
!   ""
!   [(set_attr "movprfx" "*,*,yes,yes")]
  )
  
! ;; Unpredicated binary operations with a constant (post-RA only).
! ;; These are generated by splitting a predicated instruction whose
! ;; predicate is unused.
! (define_insn "*post_ra_<optab><mode>3"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(SVE_INT_BINARY_IMM:SVE_FULL_I
! 	  (match_operand:SVE_FULL_I 1 "register_operand" "0, w")
! 	  (match_operand:SVE_FULL_I 2 "aarch64_sve_<sve_imm_con>_immediate")))]
!   "TARGET_SVE && reload_completed"
!   "@
!    <sve_int_op>\t%0.<Vetype>, %0.<Vetype>, #%<sve_imm_prefix>2
!    movprfx\t%0, %1\;<sve_int_op>\t%0.<Vetype>, %0.<Vetype>, #%<sve_imm_prefix>2"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated integer operations with merging.
! (define_expand "@cond_<optab><mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (SVE_INT_BINARY:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand")
! 	     (match_operand:SVE_FULL_I 3 "<sve_pred_int_rhs2_operand>"))
! 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
! )
  
! ;; Predicated integer operations, merging with the first input.
! (define_insn "*cond_<optab><mode>_2"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (SVE_INT_BINARY:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "0, w")
! 	     (match_operand:SVE_FULL_I 3 "register_operand" "w, w"))
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated integer operations, merging with the second input.
! (define_insn "*cond_<optab><mode>_3"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (SVE_INT_BINARY:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "w, w")
! 	     (match_operand:SVE_FULL_I 3 "register_operand" "0, w"))
! 	   (match_dup 3)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    <sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %3\;<sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated integer operations, merging with an independent value.
! (define_insn_and_rewrite "*cond_<optab><mode>_any"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=&w, &w, &w, &w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl")
! 	   (SVE_INT_BINARY:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "0, w, w, w, w")
! 	     (match_operand:SVE_FULL_I 3 "register_operand" "w, 0, w, w, w"))
! 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_reg_or_zero" "Dz, Dz, Dz, 0, w")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE
!    && !rtx_equal_p (operands[2], operands[4])
!    && !rtx_equal_p (operands[3], operands[4])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    #"
!   "&& reload_completed
!    && register_operand (operands[4], <MODE>mode)
!    && !rtx_equal_p (operands[0], operands[4])"
    {
!     emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[2],
! 					     operands[4], operands[1]));
!     operands[4] = operands[2] = operands[0];
    }
+   [(set_attr "movprfx" "yes")]
  )
  
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Addition
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - ADD
+ ;; - DECB
+ ;; - DECD
+ ;; - DECH
+ ;; - DECW
+ ;; - INCB
+ ;; - INCD
+ ;; - INCH
+ ;; - INCW
+ ;; - SUB
+ ;; -------------------------------------------------------------------------
+ 
  (define_insn "add<mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w, w, w, ?w, ?w, w")
  	(plus:SVE_I
! 	  (match_operand:SVE_I 1 "register_operand" "%0, 0, 0, w, w, w")
! 	  (match_operand:SVE_I 2 "aarch64_sve_add_operand" "vsa, vsn, vsi, vsa, vsn, w")))]
    "TARGET_SVE"
    "@
     add\t%0.<Vetype>, %0.<Vetype>, #%D2
     sub\t%0.<Vetype>, %0.<Vetype>, #%N2
!    * return aarch64_output_sve_vector_inc_dec (\"%0.<Vetype>\", operands[2]);
!    movprfx\t%0, %1\;add\t%0.<Vetype>, %0.<Vetype>, #%D2
!    movprfx\t%0, %1\;sub\t%0.<Vetype>, %0.<Vetype>, #%N2
     add\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
+   [(set_attr "movprfx" "*,*,*,yes,yes,*")]
  )
  
+ ;; Merging forms are handled through SVE_INT_BINARY.
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Subtraction
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SUB
+ ;; - SUBR
+ ;; -------------------------------------------------------------------------
+ 
  (define_insn "sub<mode>3"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, w, ?&w")
! 	(minus:SVE_FULL_I
! 	  (match_operand:SVE_FULL_I 1 "aarch64_sve_arith_operand" "w, vsa, vsa")
! 	  (match_operand:SVE_FULL_I 2 "register_operand" "w, 0, w")))]
    "TARGET_SVE"
    "@
     sub\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>
!    subr\t%0.<Vetype>, %0.<Vetype>, #%D1
!    movprfx\t%0, %2\;subr\t%0.<Vetype>, %0.<Vetype>, #%D1"
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Merging forms are handled through SVE_INT_BINARY.
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Take address
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - ADR
! ;; -------------------------------------------------------------------------
! 
! ;; An unshifted and unscaled ADR.  This is functionally equivalent to an ADD,
! ;; but the svadrb intrinsics should preserve the user's choice.
! (define_insn "@aarch64_adr<mode>"
!   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_SDI
! 	  [(match_operand:SVE_FULL_SDI 1 "register_operand" "w")
! 	   (match_operand:SVE_FULL_SDI 2 "register_operand" "w")]
! 	  UNSPEC_ADR))]
    "TARGET_SVE"
+   "adr\t%0.<Vetype>, [%1.<Vetype>, %2.<Vetype>]"
+ )
+ 
+ ;; Same, but with the offset being sign-extended from the low 32 bits.
+ (define_insn_and_rewrite "*aarch64_adr_sxtw"
+   [(set (match_operand:VNx2DI 0 "register_operand" "=w")
+ 	(unspec:VNx2DI
+ 	  [(match_operand:VNx2DI 1 "register_operand" "w")
+ 	   (unspec:VNx2DI
+ 	     [(match_operand 3)
+ 	      (sign_extend:VNx2DI
+ 		(truncate:VNx2SI
+ 		  (match_operand:VNx2DI 2 "register_operand" "w")))]
+ 	     UNSPEC_PRED_X)]
+ 	  UNSPEC_ADR))]
+   "TARGET_SVE"
+   "adr\t%0.d, [%1.d, %2.d, sxtw]"
+   "&& !CONSTANT_P (operands[3])"
    {
!     operands[3] = CONSTM1_RTX (VNx2BImode);
    }
  )
  
! ;; Same, but with the offset being zero-extended from the low 32 bits.
! (define_insn "*aarch64_adr_uxtw_unspec"
!   [(set (match_operand:VNx2DI 0 "register_operand" "=w")
! 	(unspec:VNx2DI
! 	  [(match_operand:VNx2DI 1 "register_operand" "w")
! 	   (and:VNx2DI
! 	     (match_operand:VNx2DI 2 "register_operand" "w")
! 	     (match_operand:VNx2DI 3 "aarch64_sve_uxtw_immediate"))]
! 	  UNSPEC_ADR))]
!   "TARGET_SVE"
!   "adr\t%0.d, [%1.d, %2.d, uxtw]"
! )
! 
! ;; Same, matching as a PLUS rather than unspec.
! (define_insn "*aarch64_adr_uxtw_and"
!   [(set (match_operand:VNx2DI 0 "register_operand" "=w")
! 	(plus:VNx2DI
! 	  (and:VNx2DI
! 	    (match_operand:VNx2DI 2 "register_operand" "w")
! 	    (match_operand:VNx2DI 3 "aarch64_sve_uxtw_immediate"))
! 	  (match_operand:VNx2DI 1 "register_operand" "w")))]
!   "TARGET_SVE"
!   "adr\t%0.d, [%1.d, %2.d, uxtw]"
! )
! 
! ;; ADR with a nonzero shift.
! (define_expand "@aarch64_adr<mode>_shift"
!   [(set (match_operand:SVE_FULL_SDI 0 "register_operand")
! 	(plus:SVE_FULL_SDI
! 	  (unspec:SVE_FULL_SDI
! 	    [(match_dup 4)
! 	     (ashift:SVE_FULL_SDI
! 	       (match_operand:SVE_FULL_SDI 2 "register_operand")
! 	       (match_operand:SVE_FULL_SDI 3 "const_1_to_3_operand"))]
! 	    UNSPEC_PRED_X)
! 	  (match_operand:SVE_FULL_SDI 1 "register_operand")))]
!   "TARGET_SVE"
!   {
!     operands[4] = CONSTM1_RTX (<VPRED>mode);
!   }
! )
! 
! (define_insn_and_rewrite "*aarch64_adr<mode>_shift"
!   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w")
! 	(plus:SVE_FULL_SDI
! 	  (unspec:SVE_FULL_SDI
! 	    [(match_operand 4)
! 	     (ashift:SVE_FULL_SDI
! 	       (match_operand:SVE_FULL_SDI 2 "register_operand" "w")
! 	       (match_operand:SVE_FULL_SDI 3 "const_1_to_3_operand"))]
! 	    UNSPEC_PRED_X)
! 	  (match_operand:SVE_FULL_SDI 1 "register_operand" "w")))]
!   "TARGET_SVE"
!   "adr\t%0.<Vetype>, [%1.<Vetype>, %2.<Vetype>, lsl %3]"
!   "&& !CONSTANT_P (operands[4])"
!   {
!     operands[4] = CONSTM1_RTX (<VPRED>mode);
!   }
! )
! 
! ;; Same, but with the index being sign-extended from the low 32 bits.
! (define_insn_and_rewrite "*aarch64_adr_shift_sxtw"
!   [(set (match_operand:VNx2DI 0 "register_operand" "=w")
! 	(plus:VNx2DI
! 	  (unspec:VNx2DI
! 	    [(match_operand 4)
! 	     (ashift:VNx2DI
! 	       (unspec:VNx2DI
! 		 [(match_operand 5)
! 		  (sign_extend:VNx2DI
! 		    (truncate:VNx2SI
! 		      (match_operand:VNx2DI 2 "register_operand" "w")))]
! 		 UNSPEC_PRED_X)
! 	       (match_operand:VNx2DI 3 "const_1_to_3_operand"))]
! 	    UNSPEC_PRED_X)
! 	  (match_operand:VNx2DI 1 "register_operand" "w")))]
!   "TARGET_SVE"
!   "adr\t%0.d, [%1.d, %2.d, sxtw %3]"
!   "&& (!CONSTANT_P (operands[4]) || !CONSTANT_P (operands[5]))"
!   {
!     operands[5] = operands[4] = CONSTM1_RTX (VNx2BImode);
!   }
! )
! 
! ;; Same, but with the index being zero-extended from the low 32 bits.
! (define_insn_and_rewrite "*aarch64_adr_shift_uxtw"
!   [(set (match_operand:VNx2DI 0 "register_operand" "=w")
! 	(plus:VNx2DI
! 	  (unspec:VNx2DI
! 	    [(match_operand 5)
! 	     (ashift:VNx2DI
! 	       (and:VNx2DI
! 		 (match_operand:VNx2DI 2 "register_operand" "w")
! 		 (match_operand:VNx2DI 4 "aarch64_sve_uxtw_immediate"))
! 	       (match_operand:VNx2DI 3 "const_1_to_3_operand"))]
! 	    UNSPEC_PRED_X)
! 	  (match_operand:VNx2DI 1 "register_operand" "w")))]
!   "TARGET_SVE"
!   "adr\t%0.d, [%1.d, %2.d, uxtw %3]"
!   "&& !CONSTANT_P (operands[5])"
!   {
!     operands[5] = CONSTM1_RTX (VNx2BImode);
!   }
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Absolute difference
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - SABD
! ;; - UABD
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated integer absolute difference.
! (define_expand "<su>abd<mode>_3"
!   [(use (match_operand:SVE_FULL_I 0 "register_operand"))
!    (USMAX:SVE_FULL_I
!      (match_operand:SVE_FULL_I 1 "register_operand")
!      (match_operand:SVE_FULL_I 2 "register_operand"))]
!   "TARGET_SVE"
!   {
!     rtx pred = aarch64_ptrue_reg (<VPRED>mode);
!     emit_insn (gen_aarch64_pred_<su>abd<mode> (operands[0], pred, operands[1],
! 					       operands[2]));
!     DONE;
!   }
! )
! 
! ;; Predicated integer absolute difference.
! (define_insn "@aarch64_pred_<su>abd<mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (minus:SVE_FULL_I
! 	     (USMAX:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 2 "register_operand" "%0, w")
! 	       (match_operand:SVE_FULL_I 3 "register_operand" "w, w"))
! 	     (<max_opp>:SVE_FULL_I
! 	       (match_dup 2)
! 	       (match_dup 3)))]
! 	  UNSPEC_PRED_X))]
    "TARGET_SVE"
    "@
!    <su>abd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<su>abd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! (define_expand "@aarch64_cond_<su>abd<mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (minus:SVE_FULL_I
! 	     (unspec:SVE_FULL_I
! 	       [(match_dup 1)
! 		(USMAX:SVE_FULL_I
! 		  (match_operand:SVE_FULL_I 2 "register_operand")
! 		  (match_operand:SVE_FULL_I 3 "register_operand"))]
! 	       UNSPEC_PRED_X)
! 	     (unspec:SVE_FULL_I
! 	       [(match_dup 1)
! 		(<max_opp>:SVE_FULL_I
! 		  (match_dup 2)
! 		  (match_dup 3))]
! 	       UNSPEC_PRED_X))
! 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
! {
!   if (rtx_equal_p (operands[3], operands[4]))
!     std::swap (operands[2], operands[3]);
! })
! 
! ;; Predicated integer absolute difference, merging with the first input.
! (define_insn_and_rewrite "*aarch64_cond_<su>abd<mode>_2"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (minus:SVE_FULL_I
! 	     (unspec:SVE_FULL_I
! 	       [(match_operand 4)
! 		(USMAX:SVE_FULL_I
! 		  (match_operand:SVE_FULL_I 2 "register_operand" "0, w")
! 		  (match_operand:SVE_FULL_I 3 "register_operand" "w, w"))]
! 	       UNSPEC_PRED_X)
! 	     (unspec:SVE_FULL_I
! 	       [(match_operand 5)
! 		(<max_opp>:SVE_FULL_I
! 		  (match_dup 2)
! 		  (match_dup 3))]
! 	       UNSPEC_PRED_X))
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    <su>abd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<su>abd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   "&& (!CONSTANT_P (operands[4]) || !CONSTANT_P (operands[5]))"
!   {
!     operands[4] = operands[5] = CONSTM1_RTX (<VPRED>mode);
!   }
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated integer absolute difference, merging with an independent value.
! (define_insn_and_rewrite "*aarch64_cond_<su>abd<mode>_any"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=&w, &w, &w, &w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl")
! 	   (minus:SVE_FULL_I
! 	     (unspec:SVE_FULL_I
! 	       [(match_operand 5)
! 		(USMAX:SVE_FULL_I
! 		  (match_operand:SVE_FULL_I 2 "register_operand" "0, w, w, w, w")
! 		  (match_operand:SVE_FULL_I 3 "register_operand" "w, 0, w, w, w"))]
! 	       UNSPEC_PRED_X)
! 	     (unspec:SVE_FULL_I
! 	       [(match_operand 6)
! 		(<max_opp>:SVE_FULL_I
! 		  (match_dup 2)
! 		  (match_dup 3))]
! 	       UNSPEC_PRED_X))
! 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_reg_or_zero" "Dz, Dz, Dz, 0, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[2], operands[4])
!    && !rtx_equal_p (operands[3], operands[4])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<su>abd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<su>abd\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<su>abd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;<su>abd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    #"
!   "&& 1"
!   {
!     if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
!       operands[5] = operands[6] = CONSTM1_RTX (<VPRED>mode);
!     else if (reload_completed
! 	     && register_operand (operands[4], <MODE>mode)
! 	     && !rtx_equal_p (operands[0], operands[4]))
!       {
! 	emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[2],
! 						 operands[4], operands[1]));
! 	operands[4] = operands[2] = operands[0];
!       }
!     else
!       FAIL;
!   }
!   [(set_attr "movprfx" "yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Saturating addition and subtraction
! ;; -------------------------------------------------------------------------
! ;; - SQADD
! ;; - SQSUB
! ;; - UQADD
! ;; - UQSUB
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated saturating signed addition and subtraction.
! (define_insn "@aarch64_sve_<optab><mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, w, ?&w, ?&w, w")
! 	(SBINQOPS:SVE_FULL_I
! 	  (match_operand:SVE_FULL_I 1 "register_operand" "0, 0, w, w, w")
! 	  (match_operand:SVE_FULL_I 2 "aarch64_sve_sqadd_operand" "vsQ, vsS, vsQ, vsS, w")))]
    "TARGET_SVE"
    "@
!    <binqops_op>\t%0.<Vetype>, %0.<Vetype>, #%D2
!    <binqops_op_rev>\t%0.<Vetype>, %0.<Vetype>, #%N2
!    movprfx\t%0, %1\;<binqops_op>\t%0.<Vetype>, %0.<Vetype>, #%D2
!    movprfx\t%0, %1\;<binqops_op_rev>\t%0.<Vetype>, %0.<Vetype>, #%N2
!    <binqops_op>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes,yes,*")]
  )
  
! ;; Unpredicated saturating unsigned addition and subtraction.
! (define_insn "@aarch64_sve_<optab><mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w, w")
! 	(UBINQOPS:SVE_FULL_I
! 	  (match_operand:SVE_FULL_I 1 "register_operand" "0, w, w")
! 	  (match_operand:SVE_FULL_I 2 "aarch64_sve_arith_operand" "vsa, vsa, w")))]
    "TARGET_SVE"
    "@
!    <binqops_op>\t%0.<Vetype>, %0.<Vetype>, #%D2
!    movprfx\t%0, %1\;<binqops_op>\t%0.<Vetype>, %0.<Vetype>, #%D2
!    <binqops_op>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
!   [(set_attr "movprfx" "*,yes,*")]
  )
  
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Highpart multiplication
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SMULH
+ ;; - UMULH
+ ;; -------------------------------------------------------------------------
+ 
  ;; Unpredicated highpart multiplication.
  (define_expand "<su>mul<mode>3_highpart"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
  	  [(match_dup 3)
! 	   (unspec:SVE_FULL_I
! 	     [(match_operand:SVE_FULL_I 1 "register_operand")
! 	      (match_operand:SVE_FULL_I 2 "register_operand")]
! 	     MUL_HIGHPART)]
! 	  UNSPEC_PRED_X))]
    "TARGET_SVE"
    {
!     operands[3] = aarch64_ptrue_reg (<VPRED>mode);
    }
  )
  
  ;; Predicated highpart multiplication.
! (define_insn "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_I
! 	     [(match_operand:SVE_FULL_I 2 "register_operand" "%0, w")
! 	      (match_operand:SVE_FULL_I 3 "register_operand" "w, w")]
! 	     MUL_HIGHPART)]
! 	  UNSPEC_PRED_X))]
    "TARGET_SVE"
    "@
     <su>mulh\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
***************
*** 1039,1068 ****
    [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Unpredicated division.
  (define_expand "<optab><mode>3"
!   [(set (match_operand:SVE_SDI 0 "register_operand")
! 	(unspec:SVE_SDI
  	  [(match_dup 3)
! 	   (SVE_INT_BINARY_SD:SVE_SDI
! 	     (match_operand:SVE_SDI 1 "register_operand")
! 	     (match_operand:SVE_SDI 2 "register_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Division predicated with a PTRUE.
! (define_insn "*<optab><mode>3"
!   [(set (match_operand:SVE_SDI 0 "register_operand" "=w, w, ?&w")
! 	(unspec:SVE_SDI
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (SVE_INT_BINARY_SD:SVE_SDI
! 	     (match_operand:SVE_SDI 2 "register_operand" "0, w, w")
! 	     (match_operand:SVE_SDI 3 "aarch64_sve_mul_operand" "w, 0, w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    "@
     <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
--- 4028,4120 ----
    [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated highpart multiplications with merging.
! (define_expand "@cond_<optab><mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (unspec:SVE_FULL_I
! 	     [(match_operand:SVE_FULL_I 2 "register_operand")
! 	      (match_operand:SVE_FULL_I 3 "register_operand")]
! 	     MUL_HIGHPART)
! 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
! {
!   /* Only target code is aware of these operations, so we don't need
!      to handle the fully-general case.  */
!   gcc_assert (rtx_equal_p (operands[2], operands[4])
! 	      || CONSTANT_P (operands[4]));
! })
! 
! ;; Predicated highpart multiplications, merging with the first input.
! (define_insn "*cond_<optab><mode>_2"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_I
! 	     [(match_operand:SVE_FULL_I 2 "register_operand" "0, w")
! 	      (match_operand:SVE_FULL_I 3 "register_operand" "w, w")]
! 	     MUL_HIGHPART)
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")])
! 
! ;; Predicated highpart multiplications, merging with zero.
! (define_insn "*cond_<optab><mode>_z"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=&w, &w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_I
! 	     [(match_operand:SVE_FULL_I 2 "register_operand" "%0, w")
! 	      (match_operand:SVE_FULL_I 3 "register_operand" "w, w")]
! 	     MUL_HIGHPART)
! 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_imm_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "yes")])
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Division
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - SDIV
! ;; - SDIVR
! ;; - UDIV
! ;; - UDIVR
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated integer division.
  (define_expand "<optab><mode>3"
!   [(set (match_operand:SVE_FULL_SDI 0 "register_operand")
! 	(unspec:SVE_FULL_SDI
  	  [(match_dup 3)
! 	   (SVE_INT_BINARY_SD:SVE_FULL_SDI
! 	     (match_operand:SVE_FULL_SDI 1 "register_operand")
! 	     (match_operand:SVE_FULL_SDI 2 "register_operand"))]
! 	  UNSPEC_PRED_X))]
    "TARGET_SVE"
    {
!     operands[3] = aarch64_ptrue_reg (<VPRED>mode);
    }
  )
  
! ;; Integer division predicated with a PTRUE.
! (define_insn "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w, w, ?&w")
! 	(unspec:SVE_FULL_SDI
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (SVE_INT_BINARY_SD:SVE_FULL_SDI
! 	     (match_operand:SVE_FULL_SDI 2 "register_operand" "0, w, w")
! 	     (match_operand:SVE_FULL_SDI 3 "register_operand" "w, 0, w"))]
! 	  UNSPEC_PRED_X))]
    "TARGET_SVE"
    "@
     <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
***************
*** 1071,1146 ****
    [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Unpredicated NEG, NOT and POPCOUNT.
! (define_expand "<optab><mode>2"
!   [(set (match_operand:SVE_I 0 "register_operand")
! 	(unspec:SVE_I
! 	  [(match_dup 2)
! 	   (SVE_INT_UNARY:SVE_I (match_operand:SVE_I 1 "register_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
-   {
-     operands[2] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
-   }
  )
  
! ;; NEG, NOT and POPCOUNT predicated with a PTRUE.
! (define_insn "*<optab><mode>2"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w")
! 	(unspec:SVE_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (SVE_INT_UNARY:SVE_I
! 	     (match_operand:SVE_I 2 "register_operand" "w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
  )
  
! ;; Vector AND, ORR and XOR.
  (define_insn "<optab><mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w, w")
! 	(LOGICAL:SVE_I
! 	  (match_operand:SVE_I 1 "register_operand" "%0, w")
! 	  (match_operand:SVE_I 2 "aarch64_sve_logical_operand" "vsl, w")))]
    "TARGET_SVE"
    "@
     <logical>\t%0.<Vetype>, %0.<Vetype>, #%C2
     <logical>\t%0.d, %1.d, %2.d"
  )
  
! ;; Vector AND, ORR and XOR on floating-point modes.  We avoid subregs
  ;; by providing this, but we need to use UNSPECs since rtx logical ops
  ;; aren't defined for floating-point modes.
  (define_insn "*<optab><mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w")
! 	(unspec:SVE_F [(match_operand:SVE_F 1 "register_operand" "w")
! 		       (match_operand:SVE_F 2 "register_operand" "w")]
! 		      LOGICALF))]
    "TARGET_SVE"
    "<logicalf_op>\t%0.d, %1.d, %2.d"
  )
  
! ;; REG_EQUAL notes on "not<mode>3" should ensure that we can generate
! ;; this pattern even though the NOT instruction itself is predicated.
! (define_insn "bic<mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w")
! 	(and:SVE_I
! 	  (not:SVE_I (match_operand:SVE_I 1 "register_operand" "w"))
! 	  (match_operand:SVE_I 2 "register_operand" "w")))]
    "TARGET_SVE"
!   "bic\t%0.d, %2.d, %1.d"
  )
  
  ;; Predicate AND.  We can reuse one of the inputs as the GP.
  (define_insn "and<mode>3"
    [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
  	(and:PRED_ALL (match_operand:PRED_ALL 1 "register_operand" "Upa")
  		      (match_operand:PRED_ALL 2 "register_operand" "Upa")))]
    "TARGET_SVE"
!   "and\t%0.b, %1/z, %1.b, %2.b"
  )
  
! ;; Unpredicated predicate ORR and XOR.
  (define_expand "<optab><mode>3"
    [(set (match_operand:PRED_ALL 0 "register_operand")
  	(and:PRED_ALL
--- 4123,5707 ----
    [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Predicated integer division with merging.
! (define_expand "@cond_<optab><mode>"
!   [(set (match_operand:SVE_FULL_SDI 0 "register_operand")
! 	(unspec:SVE_FULL_SDI
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (SVE_INT_BINARY_SD:SVE_FULL_SDI
! 	     (match_operand:SVE_FULL_SDI 2 "register_operand")
! 	     (match_operand:SVE_FULL_SDI 3 "register_operand"))
! 	   (match_operand:SVE_FULL_SDI 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
  )
  
! ;; Predicated integer division, merging with the first input.
! (define_insn "*cond_<optab><mode>_2"
!   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_SDI
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (SVE_INT_BINARY_SD:SVE_FULL_SDI
! 	     (match_operand:SVE_FULL_SDI 2 "register_operand" "0, w")
! 	     (match_operand:SVE_FULL_SDI 3 "register_operand" "w, w"))
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "@
!    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated integer division, merging with the second input.
! (define_insn "*cond_<optab><mode>_3"
!   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_SDI
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (SVE_INT_BINARY_SD:SVE_FULL_SDI
! 	     (match_operand:SVE_FULL_SDI 2 "register_operand" "w, w")
! 	     (match_operand:SVE_FULL_SDI 3 "register_operand" "0, w"))
! 	   (match_dup 3)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    <sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %3\;<sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated integer division, merging with an independent value.
! (define_insn_and_rewrite "*cond_<optab><mode>_any"
!   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=&w, &w, &w, &w, ?&w")
! 	(unspec:SVE_FULL_SDI
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl")
! 	   (SVE_INT_BINARY_SD:SVE_FULL_SDI
! 	     (match_operand:SVE_FULL_SDI 2 "register_operand" "0, w, w, w, w")
! 	     (match_operand:SVE_FULL_SDI 3 "register_operand" "w, 0, w, w, w"))
! 	   (match_operand:SVE_FULL_SDI 4 "aarch64_simd_reg_or_zero" "Dz, Dz, Dz, 0, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[2], operands[4])
!    && !rtx_equal_p (operands[3], operands[4])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    #"
!   "&& reload_completed
!    && register_operand (operands[4], <MODE>mode)
!    && !rtx_equal_p (operands[0], operands[4])"
!   {
!     emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[2],
! 					     operands[4], operands[1]));
!     operands[4] = operands[2] = operands[0];
!   }
!   [(set_attr "movprfx" "yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Binary logical operations
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - AND
! ;; - EOR
! ;; - ORR
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated integer binary logical operations.
  (define_insn "<optab><mode>3"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?w, w")
! 	(LOGICAL:SVE_FULL_I
! 	  (match_operand:SVE_FULL_I 1 "register_operand" "%0, w, w")
! 	  (match_operand:SVE_FULL_I 2 "aarch64_sve_logical_operand" "vsl, vsl, w")))]
    "TARGET_SVE"
    "@
     <logical>\t%0.<Vetype>, %0.<Vetype>, #%C2
+    movprfx\t%0, %1\;<logical>\t%0.<Vetype>, %0.<Vetype>, #%C2
     <logical>\t%0.d, %1.d, %2.d"
+   [(set_attr "movprfx" "*,yes,*")]
  )
  
! ;; Merging forms are handled through SVE_INT_BINARY.
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Binary logical operations (inverted second input)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - BIC
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated BIC.
! (define_expand "@aarch64_bic<mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(and:SVE_FULL_I
! 	  (unspec:SVE_FULL_I
! 	    [(match_dup 3)
! 	     (not:SVE_FULL_I (match_operand:SVE_FULL_I 2 "register_operand"))]
! 	    UNSPEC_PRED_X)
! 	  (match_operand:SVE_FULL_I 1 "register_operand")))]
!   "TARGET_SVE"
!   {
!     operands[3] = CONSTM1_RTX (<VPRED>mode);
!   }
! )
! 
! ;; Predicated BIC.
! (define_insn_and_rewrite "*bic<mode>3"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w")
! 	(and:SVE_FULL_I
! 	  (unspec:SVE_FULL_I
! 	    [(match_operand 3)
! 	     (not:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 2 "register_operand" "w"))]
! 	    UNSPEC_PRED_X)
! 	  (match_operand:SVE_FULL_I 1 "register_operand" "w")))]
!   "TARGET_SVE"
!   "bic\t%0.d, %1.d, %2.d"
!   "&& !CONSTANT_P (operands[3])"
!   {
!     operands[3] = CONSTM1_RTX (<VPRED>mode);
!   }
! )
! 
! ;; Predicated BIC with merging.
! (define_expand "@cond_bic<mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (and:SVE_FULL_I
! 	     (not:SVE_FULL_I (match_operand:SVE_FULL_I 3 "register_operand"))
! 	     (match_operand:SVE_FULL_I 2 "register_operand"))
! 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
! )
! 
! ;; Predicated integer BIC, merging with the first input.
! (define_insn "*cond_bic<mode>_2"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (and:SVE_FULL_I
! 	     (not:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 3 "register_operand" "w, w"))
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "0, w"))
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    bic\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;bic\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated integer BIC, merging with an independent value.
! (define_insn_and_rewrite "*cond_bic<mode>_any"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=&w, &w, &w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl")
! 	   (and:SVE_FULL_I
! 	     (not:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 3 "register_operand" "w, w, w, w"))
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "0, w, w, w"))
! 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_reg_or_zero" "Dz, Dz, 0, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && !rtx_equal_p (operands[2], operands[4])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;bic\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;bic\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;bic\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    #"
!   "&& reload_completed
!    && register_operand (operands[4], <MODE>mode)
!    && !rtx_equal_p (operands[0], operands[4])"
!   {
!     emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[2],
! 					     operands[4], operands[1]));
!     operands[4] = operands[2] = operands[0];
!   }
!   [(set_attr "movprfx" "yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Shifts (rounding towards -Inf)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - ASR
! ;; - ASRR
! ;; - LSL
! ;; - LSLR
! ;; - LSR
! ;; - LSRR
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated shift by a scalar, which expands into one of the vector
! ;; shifts below.
! (define_expand "<ASHIFT:optab><mode>3"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(ASHIFT:SVE_FULL_I
! 	  (match_operand:SVE_FULL_I 1 "register_operand")
! 	  (match_operand:<VEL> 2 "general_operand")))]
!   "TARGET_SVE"
!   {
!     rtx amount;
!     if (CONST_INT_P (operands[2]))
!       {
! 	amount = gen_const_vec_duplicate (<MODE>mode, operands[2]);
! 	if (!aarch64_sve_<lr>shift_operand (operands[2], <MODE>mode))
! 	  amount = force_reg (<MODE>mode, amount);
!       }
!     else
!       {
! 	amount = gen_reg_rtx (<MODE>mode);
! 	emit_insn (gen_vec_duplicate<mode> (amount,
! 					    convert_to_mode (<VEL>mode,
! 							     operands[2], 0)));
!       }
!     emit_insn (gen_v<optab><mode>3 (operands[0], operands[1], amount));
!     DONE;
!   }
! )
! 
! ;; Unpredicated shift by a vector.
! (define_expand "v<optab><mode>3"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
! 	  [(match_dup 3)
! 	   (ASHIFT:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 1 "register_operand")
! 	     (match_operand:SVE_FULL_I 2 "aarch64_sve_<lr>shift_operand"))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE"
!   {
!     operands[3] = aarch64_ptrue_reg (<VPRED>mode);
!   }
! )
! 
! ;; Shift by a vector, predicated with a PTRUE.  We don't actually need
! ;; the predicate for the first alternative, but using Upa or X isn't
! ;; likely to gain much and would make the instruction seem less uniform
! ;; to the register allocator.
! (define_insn_and_split "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, w, w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl")
! 	   (ASHIFT:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "w, 0, w, w")
! 	     (match_operand:SVE_FULL_I 3 "aarch64_sve_<lr>shift_operand" "D<lr>, w, 0, w"))]
! 	  UNSPEC_PRED_X))]
!   "TARGET_SVE"
!   "@
!    #
!    <shift>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    <shift>r\t%0.<Vetype>, %1/m, %3.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %2\;<shift>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   "&& reload_completed
!    && !register_operand (operands[3], <MODE>mode)"
!   [(set (match_dup 0) (ASHIFT:SVE_FULL_I (match_dup 2) (match_dup 3)))]
!   ""
!   [(set_attr "movprfx" "*,*,*,yes")]
! )
! 
! ;; Unpredicated shift operations by a constant (post-RA only).
! ;; These are generated by splitting a predicated instruction whose
! ;; predicate is unused.
! (define_insn "*post_ra_v<optab><mode>3"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w")
! 	(ASHIFT:SVE_FULL_I
! 	  (match_operand:SVE_FULL_I 1 "register_operand" "w")
! 	  (match_operand:SVE_FULL_I 2 "aarch64_simd_<lr>shift_imm")))]
!   "TARGET_SVE && reload_completed"
!   "<shift>\t%0.<Vetype>, %1.<Vetype>, #%2"
! )
! 
! ;; Predicated integer shift, merging with the first input.
! (define_insn "*cond_<optab><mode>_2_const"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (ASHIFT:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "0, w")
! 	     (match_operand:SVE_FULL_I 3 "aarch64_simd_<lr>shift_imm"))
! 	   (match_dup 2)]
! 	 UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    <shift>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    movprfx\t%0, %2\;<shift>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated integer shift, merging with an independent value.
! (define_insn_and_rewrite "*cond_<optab><mode>_any_const"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, &w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (ASHIFT:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand" "w, w, w")
! 	     (match_operand:SVE_FULL_I 3 "aarch64_simd_<lr>shift_imm"))
! 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_reg_or_zero" "Dz, 0, w")]
! 	 UNSPEC_SEL))]
!   "TARGET_SVE && !rtx_equal_p (operands[2], operands[4])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<shift>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;<shift>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    #"
!   "&& reload_completed
!    && register_operand (operands[4], <MODE>mode)
!    && !rtx_equal_p (operands[0], operands[4])"
!   {
!     emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[2],
! 					     operands[4], operands[1]));
!     operands[4] = operands[2] = operands[0];
!   }
!   [(set_attr "movprfx" "yes")]
! )
! 
! ;; Unpredicated shifts of narrow elements by 64-bit amounts.
! (define_insn "@aarch64_sve_<sve_int_op><mode>"
!   [(set (match_operand:SVE_FULL_BHSI 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_BHSI
! 	  [(match_operand:SVE_FULL_BHSI 1 "register_operand" "w")
! 	   (match_operand:VNx2DI 2 "register_operand" "w")]
! 	  SVE_SHIFT_WIDE))]
!   "TARGET_SVE"
!   "<sve_int_op>\t%0.<Vetype>, %1.<Vetype>, %2.d"
! )
! 
! ;; Merging predicated shifts of narrow elements by 64-bit amounts.
! (define_expand "@cond_<sve_int_op><mode>"
!   [(set (match_operand:SVE_FULL_BHSI 0 "register_operand")
! 	(unspec:SVE_FULL_BHSI
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (unspec:SVE_FULL_BHSI
! 	     [(match_operand:SVE_FULL_BHSI 2 "register_operand")
! 	      (match_operand:VNx2DI 3 "register_operand")]
! 	     SVE_SHIFT_WIDE)
! 	   (match_operand:SVE_FULL_BHSI 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
! )
! 
! ;; Predicated shifts of narrow elements by 64-bit amounts, merging with
! ;; the first input.
! (define_insn "*cond_<sve_int_op><mode>_m"
!   [(set (match_operand:SVE_FULL_BHSI 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_BHSI
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_BHSI
! 	     [(match_operand:SVE_FULL_BHSI 2 "register_operand" "0, w")
! 	      (match_operand:VNx2DI 3 "register_operand" "w, w")]
! 	     SVE_SHIFT_WIDE)
! 	   (match_dup 2)]
! 	 UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.d
!    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.d"
!   [(set_attr "movprfx" "*, yes")])
! 
! ;; Predicated shifts of narrow elements by 64-bit amounts, merging with zero.
! (define_insn "*cond_<sve_int_op><mode>_z"
!   [(set (match_operand:SVE_FULL_BHSI 0 "register_operand" "=&w, &w")
! 	(unspec:SVE_FULL_BHSI
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_BHSI
! 	     [(match_operand:SVE_FULL_BHSI 2 "register_operand" "0, w")
! 	      (match_operand:VNx2DI 3 "register_operand" "w, w")]
! 	     SVE_SHIFT_WIDE)
! 	   (match_operand:SVE_FULL_BHSI 4 "aarch64_simd_imm_zero")]
! 	 UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.d
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.d"
!   [(set_attr "movprfx" "yes")])
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Shifts (rounding towards 0)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - ASRD
! ;; - SQSHLU (SVE2)
! ;; - SRSHR (SVE2)
! ;; - URSHR (SVE2)
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated <SVE_INT_OP>.
! (define_expand "sdiv_pow2<mode>3"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
! 	  [(match_dup 3)
! 	   (unspec:SVE_FULL_I
! 	     [(match_operand:SVE_FULL_I 1 "register_operand")
! 	      (match_operand 2 "aarch64_simd_rshift_imm")]
! 	     UNSPEC_ASRD)
! 	   (match_dup 1)]
! 	 UNSPEC_SEL))]
!   "TARGET_SVE"
!   {
!     operands[3] = aarch64_ptrue_reg (<VPRED>mode);
!   }
! )
! 
! ;; Predicated right shift with merging.
! (define_expand "@cond_<sve_int_op><mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (unspec:SVE_FULL_I
! 	     [(match_operand:SVE_FULL_I 2 "register_operand")
! 	      (match_operand:SVE_FULL_I 3 "aarch64_simd_<lr>shift_imm")]
! 	     SVE_INT_SHIFT_IMM)
! 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
! )
! 
! ;; Predicated right shift, merging with the first input.
! (define_insn "*cond_<sve_int_op><mode>_2"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_I
! 	     [(match_operand:SVE_FULL_I 2 "register_operand" "0, w")
! 	      (match_operand:SVE_FULL_I 3 "aarch64_simd_<lr>shift_imm")]
! 	     SVE_INT_SHIFT_IMM)
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3"
!   [(set_attr "movprfx" "*,yes")])
! 
! ;; Predicated right shift, merging with zero.
! (define_insn "*cond_<sve_int_op><mode>_z"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (unspec:SVE_FULL_I
! 	     [(match_operand:SVE_FULL_I 2 "register_operand" "w")
! 	      (match_operand:SVE_FULL_I 3 "aarch64_simd_<lr>shift_imm")]
! 	     SVE_INT_SHIFT_IMM)
! 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_imm_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3"
!   [(set_attr "movprfx" "yes")])
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP<-INT] General binary arithmetic corresponding to unspecs
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FSCALE
! ;; - FTSMUL
! ;; - FTSSEL
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated floating-point binary operations that take an integer as
! ;; their second operand.
! (define_insn "@aarch64_sve_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:SVE_FULL_F 1 "register_operand" "w")
! 	   (match_operand:<V_INT_EQUIV> 2 "register_operand" "w")]
! 	  SVE_FP_BINARY_INT))]
!   "TARGET_SVE"
!   "<sve_fp_op>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
! )
! 
! ;; Predicated floating-point binary operations that take an integer
! ;; as their second operand.
! (define_insn "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (match_operand:SI 4 "aarch64_sve_gp_strictness")
! 	   (match_operand:SVE_FULL_F 2 "register_operand" "0, w")
! 	   (match_operand:<V_INT_EQUIV> 3 "register_operand" "w, w")]
! 	  SVE_COND_FP_BINARY_INT))]
!   "TARGET_SVE"
!   "@
!    <sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated floating-point binary operations with merging, taking an
! ;; integer as their second operand.
! (define_expand "@cond_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (unspec:SVE_FULL_F
! 	     [(match_dup 1)
! 	      (const_int SVE_STRICT_GP)
! 	      (match_operand:SVE_FULL_F 2 "register_operand")
! 	      (match_operand:<V_INT_EQUIV> 3 "register_operand")]
! 	     SVE_COND_FP_BINARY_INT)
! 	   (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
! )
! 
! ;; Predicated floating-point binary operations that take an integer as their
! ;; second operand, with inactive lanes coming from the first operand.
! (define_insn_and_rewrite "*cond_<optab><mode>_2"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 4)
! 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "0, w")
! 	      (match_operand:<V_INT_EQUIV> 3 "register_operand" "w, w")]
! 	     SVE_COND_FP_BINARY_INT)
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && aarch64_sve_pred_dominates_p (&operands[4], operands[1])"
!   "@
!    <sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   "&& !rtx_equal_p (operands[1], operands[4])"
!   {
!     operands[4] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated floating-point binary operations that take an integer as
! ;; their second operand, with the values of inactive lanes being distinct
! ;; from the other inputs.
! (define_insn_and_rewrite "*cond_<optab><mode>_any"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=&w, &w, &w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 5)
! 	      (match_operand:SI 6 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "0, w, w, w")
! 	      (match_operand:<V_INT_EQUIV> 3 "register_operand" "w, w, w, w")]
! 	     SVE_COND_FP_BINARY_INT)
! 	   (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero" "Dz, Dz, 0, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[2], operands[4])
!    && aarch64_sve_pred_dominates_p (&operands[5], operands[1])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    #"
!   "&& 1"
!   {
!     if (reload_completed
!         && register_operand (operands[4], <MODE>mode)
!         && !rtx_equal_p (operands[0], operands[4]))
!       {
! 	emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[2],
! 						 operands[4], operands[1]));
! 	operands[4] = operands[2] = operands[0];
!       }
!     else if (!rtx_equal_p (operands[1], operands[5]))
!       operands[5] = copy_rtx (operands[1]);
!     else
!       FAIL;
!   }
!   [(set_attr "movprfx" "yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] General binary arithmetic corresponding to rtx codes
! ;; -------------------------------------------------------------------------
! ;; Includes post-RA forms of:
! ;; - FADD
! ;; - FMUL
! ;; - FSUB
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated floating-point binary operations (post-RA only).
! ;; These are generated by splitting a predicated instruction whose
! ;; predicate is unused.
! (define_insn "*post_ra_<sve_fp_op><mode>3"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w")
! 	(SVE_UNPRED_FP_BINARY:SVE_FULL_F
! 	  (match_operand:SVE_FULL_F 1 "register_operand" "w")
! 	  (match_operand:SVE_FULL_F 2 "register_operand" "w")))]
!   "TARGET_SVE && reload_completed"
!   "<sve_fp_op>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>")
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] General binary arithmetic corresponding to unspecs
! ;; -------------------------------------------------------------------------
! ;; Includes merging forms of:
! ;; - FADD    (constant forms handled in the "Addition" section)
! ;; - FDIV
! ;; - FDIVR
! ;; - FMAX
! ;; - FMAXNM  (including #0.0 and #1.0)
! ;; - FMIN
! ;; - FMINNM  (including #0.0 and #1.0)
! ;; - FMUL    (including #0.5 and #2.0)
! ;; - FMULX
! ;; - FRECPS
! ;; - FRSQRTS
! ;; - FSUB    (constant forms handled in the "Addition" section)
! ;; - FSUBR   (constant forms handled in the "Subtraction" section)
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated floating-point binary operations.
! (define_insn "@aarch64_sve_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:SVE_FULL_F 1 "register_operand" "w")
! 	   (match_operand:SVE_FULL_F 2 "register_operand" "w")]
! 	  SVE_FP_BINARY))]
!   "TARGET_SVE"
!   "<sve_fp_op>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
! )
! 
! ;; Unpredicated floating-point binary operations that need to be predicated
! ;; for SVE.
! (define_expand "<optab><mode>3"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_dup 3)
! 	   (const_int SVE_RELAXED_GP)
! 	   (match_operand:SVE_FULL_F 1 "<sve_pred_fp_rhs1_operand>")
! 	   (match_operand:SVE_FULL_F 2 "<sve_pred_fp_rhs2_operand>")]
! 	  SVE_COND_FP_BINARY_OPTAB))]
!   "TARGET_SVE"
!   {
!     operands[3] = aarch64_ptrue_reg (<VPRED>mode);
!   }
! )
! 
! ;; Predicated floating-point binary operations that have no immediate forms.
! (define_insn "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (match_operand:SI 4 "aarch64_sve_gp_strictness")
! 	   (match_operand:SVE_FULL_F 2 "register_operand" "0, w, w")
! 	   (match_operand:SVE_FULL_F 3 "register_operand" "w, 0, w")]
! 	  SVE_COND_FP_BINARY_REG))]
!   "TARGET_SVE"
!   "@
!    <sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    <sve_fp_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %2\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes")]
! )
! 
! ;; Predicated floating-point operations with merging.
! (define_expand "@cond_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (unspec:SVE_FULL_F
! 	     [(match_dup 1)
! 	      (const_int SVE_STRICT_GP)
! 	      (match_operand:SVE_FULL_F 2 "<sve_pred_fp_rhs1_operand>")
! 	      (match_operand:SVE_FULL_F 3 "<sve_pred_fp_rhs2_operand>")]
! 	     SVE_COND_FP_BINARY)
! 	   (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
! )
! 
! ;; Predicated floating-point operations, merging with the first input.
! (define_insn_and_rewrite "*cond_<optab><mode>_2"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 4)
! 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "0, w")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "w, w")]
! 	     SVE_COND_FP_BINARY)
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && aarch64_sve_pred_dominates_p (&operands[4], operands[1])"
!   "@
!    <sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   "&& !rtx_equal_p (operands[1], operands[4])"
!   {
!     operands[4] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Same for operations that take a 1-bit constant.
! (define_insn_and_rewrite "*cond_<optab><mode>_2_const"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 4)
! 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "0, w")
! 	      (match_operand:SVE_FULL_F 3 "<sve_pred_fp_rhs2_immediate>")]
! 	     SVE_COND_FP_BINARY_I1)
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && aarch64_sve_pred_dominates_p (&operands[4], operands[1])"
!   "@
!    <sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    movprfx\t%0, %2\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3"
!   "&& !rtx_equal_p (operands[1], operands[4])"
!   {
!     operands[4] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated floating-point operations, merging with the second input.
! (define_insn_and_rewrite "*cond_<optab><mode>_3"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 4)
! 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "w, w")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "0, w")]
! 	     SVE_COND_FP_BINARY)
! 	   (match_dup 3)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && aarch64_sve_pred_dominates_p (&operands[4], operands[1])"
!   "@
!    <sve_fp_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %3\;<sve_fp_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>"
!   "&& !rtx_equal_p (operands[1], operands[4])"
!   {
!     operands[4] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated floating-point operations, merging with an independent value.
! (define_insn_and_rewrite "*cond_<optab><mode>_any"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=&w, &w, &w, &w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 5)
! 	      (match_operand:SI 6 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "0, w, w, w, w")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "w, 0, w, w, w")]
! 	     SVE_COND_FP_BINARY)
! 	   (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero" "Dz, Dz, Dz, 0, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[2], operands[4])
!    && !rtx_equal_p (operands[3], operands[4])
!    && aarch64_sve_pred_dominates_p (&operands[5], operands[1])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_fp_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    #"
!   "&& 1"
!   {
!     if (reload_completed
!         && register_operand (operands[4], <MODE>mode)
!         && !rtx_equal_p (operands[0], operands[4]))
!       {
! 	emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[2],
! 						 operands[4], operands[1]));
! 	operands[4] = operands[2] = operands[0];
!       }
!     else if (!rtx_equal_p (operands[1], operands[5]))
!       operands[5] = copy_rtx (operands[1]);
!     else
!       FAIL;
!   }
!   [(set_attr "movprfx" "yes")]
! )
! 
! ;; Same for operations that take a 1-bit constant.
! (define_insn_and_rewrite "*cond_<optab><mode>_any_const"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, w, ?w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 5)
! 	      (match_operand:SI 6 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "w, w, w")
! 	      (match_operand:SVE_FULL_F 3 "<sve_pred_fp_rhs2_immediate>")]
! 	     SVE_COND_FP_BINARY_I1)
! 	   (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero" "Dz, 0, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[2], operands[4])
!    && aarch64_sve_pred_dominates_p (&operands[5], operands[1])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    #"
!   "&& 1"
!   {
!     if (reload_completed
!         && register_operand (operands[4], <MODE>mode)
!         && !rtx_equal_p (operands[0], operands[4]))
!       {
! 	emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[2],
! 						 operands[4], operands[1]));
! 	operands[4] = operands[2] = operands[0];
!       }
!     else if (!rtx_equal_p (operands[1], operands[5]))
!       operands[5] = copy_rtx (operands[1]);
!     else
!       FAIL;
!   }
!   [(set_attr "movprfx" "yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Addition
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FADD
! ;; - FSUB
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated floating-point addition.
! (define_insn_and_split "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, w, w, w, ?&w, ?&w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl")
! 	   (match_operand:SI 4 "aarch64_sve_gp_strictness" "i, i, Z, Ui1, i, i, Ui1")
! 	   (match_operand:SVE_FULL_F 2 "register_operand" "%0, 0, w, 0, w, w, w")
! 	   (match_operand:SVE_FULL_F 3 "aarch64_sve_float_arith_with_sub_operand" "vsA, vsN, w, w, vsA, vsN, w")]
! 	  SVE_COND_FP_ADD))]
!   "TARGET_SVE"
!   "@
!    fadd\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    fsub\t%0.<Vetype>, %1/m, %0.<Vetype>, #%N3
!    #
!    fadd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;fadd\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    movprfx\t%0, %2\;fsub\t%0.<Vetype>, %1/m, %0.<Vetype>, #%N3
!    movprfx\t%0, %2\;fadd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   ; Split the unpredicated form after reload, so that we don't have
!   ; the unnecessary PTRUE.
!   "&& reload_completed
!    && register_operand (operands[3], <MODE>mode)
!    && INTVAL (operands[4]) == SVE_RELAXED_GP"
!   [(set (match_dup 0) (plus:SVE_FULL_F (match_dup 2) (match_dup 3)))]
!   ""
!   [(set_attr "movprfx" "*,*,*,*,yes,yes,yes")]
! )
! 
! ;; Predicated floating-point addition of a constant, merging with the
! ;; first input.
! (define_insn_and_rewrite "*cond_add<mode>_2_const"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, w, ?w, ?w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 4)
! 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "0, 0, w, w")
! 	      (match_operand:SVE_FULL_F 3 "aarch64_sve_float_arith_with_sub_immediate" "vsA, vsN, vsA, vsN")]
! 	     UNSPEC_COND_FADD)
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && aarch64_sve_pred_dominates_p (&operands[4], operands[1])"
!   "@
!    fadd\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    fsub\t%0.<Vetype>, %1/m, %0.<Vetype>, #%N3
!    movprfx\t%0, %2\;fadd\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    movprfx\t%0, %2\;fsub\t%0.<Vetype>, %1/m, %0.<Vetype>, #%N3"
!   "&& !rtx_equal_p (operands[1], operands[4])"
!   {
!     operands[4] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,*,yes,yes")]
! )
! 
! ;; Predicated floating-point addition of a constant, merging with an
! ;; independent value.
! (define_insn_and_rewrite "*cond_add<mode>_any_const"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, w, w, w, ?w, ?w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 5)
! 	      (match_operand:SI 6 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "w, w, w, w, w, w")
! 	      (match_operand:SVE_FULL_F 3 "aarch64_sve_float_arith_with_sub_immediate" "vsA, vsN, vsA, vsN, vsA, vsN")]
! 	     UNSPEC_COND_FADD)
! 	   (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero" "Dz, Dz, 0, 0, w, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[2], operands[4])
!    && aarch64_sve_pred_dominates_p (&operands[5], operands[1])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;fadd\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;fsub\t%0.<Vetype>, %1/m, %0.<Vetype>, #%N3
!    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;fadd\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;fsub\t%0.<Vetype>, %1/m, %0.<Vetype>, #%N3
!    #
!    #"
!   "&& 1"
!   {
!     if (reload_completed
!         && register_operand (operands[4], <MODE>mode)
!         && !rtx_equal_p (operands[0], operands[4]))
!       {
! 	emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[2],
! 						 operands[4], operands[1]));
! 	operands[4] = operands[2] = operands[0];
!       }
!     else if (!rtx_equal_p (operands[1], operands[5]))
!       operands[5] = copy_rtx (operands[1]);
!     else
!       FAIL;
!   }
!   [(set_attr "movprfx" "yes")]
! )
! 
! ;; Register merging forms are handled through SVE_COND_FP_BINARY.
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Complex addition
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FCADD
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated FCADD.
! (define_insn "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (match_operand:SI 4 "aarch64_sve_gp_strictness")
! 	   (match_operand:SVE_FULL_F 2 "register_operand" "0, w")
! 	   (match_operand:SVE_FULL_F 3 "register_operand" "w, w")]
! 	  SVE_COND_FCADD))]
!   "TARGET_SVE"
!   "@
!    fcadd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>, #<rot>
!    movprfx\t%0, %2\;fcadd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>, #<rot>"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated FCADD with merging.
! (define_expand "@cond_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (unspec:SVE_FULL_F
! 	     [(match_dup 1)
! 	      (const_int SVE_STRICT_GP)
! 	      (match_operand:SVE_FULL_F 2 "register_operand")
! 	      (match_operand:SVE_FULL_F 3 "register_operand")]
! 	     SVE_COND_FCADD)
! 	   (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
! )
! 
! ;; Predicated FCADD, merging with the first input.
! (define_insn_and_rewrite "*cond_<optab><mode>_2"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 4)
! 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "0, w")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "w, w")]
! 	     SVE_COND_FCADD)
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && aarch64_sve_pred_dominates_p (&operands[4], operands[1])"
!   "@
!    fcadd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>, #<rot>
!    movprfx\t%0, %2\;fcadd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>, #<rot>"
!   "&& !rtx_equal_p (operands[1], operands[4])"
!   {
!     operands[4] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated FCADD, merging with an independent value.
! (define_insn_and_rewrite "*cond_<optab><mode>_any"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=&w, &w, &w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 5)
! 	      (match_operand:SI 6 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "w, 0, w, w")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "w, w, w, w")]
! 	     SVE_COND_FCADD)
! 	   (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero" "Dz, Dz, 0, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[2], operands[4])
!    && aarch64_sve_pred_dominates_p (&operands[5], operands[1])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;fcadd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>, #<rot>
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;fcadd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>, #<rot>
!    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;fcadd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>, #<rot>
!    #"
!   "&& 1"
!   {
!     if (reload_completed
!         && register_operand (operands[4], <MODE>mode)
!         && !rtx_equal_p (operands[0], operands[4]))
!       {
! 	emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[2],
! 						 operands[4], operands[1]));
! 	operands[4] = operands[2] = operands[0];
!       }
!     else if (!rtx_equal_p (operands[1], operands[5]))
!       operands[5] = copy_rtx (operands[1]);
!     else
!       FAIL;
!   }
!   [(set_attr "movprfx" "yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Subtraction
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FSUB
! ;; - FSUBR
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated floating-point subtraction.
! (define_insn_and_split "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, w, w, w, ?&w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
! 	   (match_operand:SI 4 "aarch64_sve_gp_strictness" "i, Z, Ui1, Ui1, i, Ui1")
! 	   (match_operand:SVE_FULL_F 2 "aarch64_sve_float_arith_operand" "vsA, w, 0, w, vsA, w")
! 	   (match_operand:SVE_FULL_F 3 "register_operand" "0, w, w, 0, w, w")]
! 	  SVE_COND_FP_SUB))]
!   "TARGET_SVE"
!   "@
!    fsubr\t%0.<Vetype>, %1/m, %0.<Vetype>, #%2
!    #
!    fsub\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    fsubr\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %3\;fsubr\t%0.<Vetype>, %1/m, %0.<Vetype>, #%2
!    movprfx\t%0, %2\;fsub\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   ; Split the unpredicated form after reload, so that we don't have
!   ; the unnecessary PTRUE.
!   "&& reload_completed
!    && register_operand (operands[2], <MODE>mode)
!    && INTVAL (operands[4]) == SVE_RELAXED_GP"
!   [(set (match_dup 0) (minus:SVE_FULL_F (match_dup 2) (match_dup 3)))]
!   ""
!   [(set_attr "movprfx" "*,*,*,*,yes,yes")]
! )
! 
! ;; Predicated floating-point subtraction from a constant, merging with the
! ;; second input.
! (define_insn_and_rewrite "*cond_sub<mode>_3_const"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 4)
! 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "aarch64_sve_float_arith_immediate")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "0, w")]
! 	     UNSPEC_COND_FSUB)
! 	   (match_dup 3)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && aarch64_sve_pred_dominates_p (&operands[4], operands[1])"
!   "@
!    fsubr\t%0.<Vetype>, %1/m, %0.<Vetype>, #%2
!    movprfx\t%0, %3\;fsubr\t%0.<Vetype>, %1/m, %0.<Vetype>, #%2"
!   "&& !rtx_equal_p (operands[1], operands[4])"
!   {
!     operands[4] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated floating-point subtraction from a constant, merging with an
! ;; independent value.
! (define_insn_and_rewrite "*cond_sub<mode>_any_const"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, w, ?w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 5)
! 	      (match_operand:SI 6 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "aarch64_sve_float_arith_immediate")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "w, w, w")]
! 	     UNSPEC_COND_FSUB)
! 	   (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero" "Dz, 0, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[3], operands[4])
!    && aarch64_sve_pred_dominates_p (&operands[5], operands[1])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %3.<Vetype>\;fsubr\t%0.<Vetype>, %1/m, %0.<Vetype>, #%2
!    movprfx\t%0.<Vetype>, %1/m, %3.<Vetype>\;fsubr\t%0.<Vetype>, %1/m, %0.<Vetype>, #%2
!    #"
!   "&& 1"
!   {
!     if (reload_completed
!         && register_operand (operands[4], <MODE>mode)
!         && !rtx_equal_p (operands[0], operands[4]))
!       {
! 	emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[3],
! 						 operands[4], operands[1]));
! 	operands[4] = operands[3] = operands[0];
!       }
!     else if (!rtx_equal_p (operands[1], operands[5]))
!       operands[5] = copy_rtx (operands[1]);
!     else
!       FAIL;
!   }
!   [(set_attr "movprfx" "yes")]
! )
! 
! ;; Register merging forms are handled through SVE_COND_FP_BINARY.
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Absolute difference
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FABD
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated floating-point absolute difference.
! (define_expand "@aarch64_pred_abd<mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (match_operand:SI 4 "aarch64_sve_gp_strictness")
! 	   (unspec:SVE_FULL_F
! 	     [(match_dup 1)
! 	      (match_dup 4)
! 	      (match_operand:SVE_FULL_F 2 "register_operand")
! 	      (match_operand:SVE_FULL_F 3 "register_operand")]
! 	     UNSPEC_COND_FSUB)]
! 	  UNSPEC_COND_FABS))]
!   "TARGET_SVE"
! )
! 
! ;; Predicated floating-point absolute difference.
! (define_insn_and_rewrite "*aarch64_pred_abd<mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (match_operand:SI 4 "aarch64_sve_gp_strictness")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 5)
! 	      (match_operand:SI 6 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "%0, w")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "w, w")]
! 	     UNSPEC_COND_FSUB)]
! 	  UNSPEC_COND_FABS))]
!   "TARGET_SVE && aarch64_sve_pred_dominates_p (&operands[5], operands[1])"
!   "@
!    fabd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;fabd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   "&& !rtx_equal_p (operands[1], operands[5])"
!   {
!     operands[5] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! (define_expand "@aarch64_cond_abd<mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (unspec:SVE_FULL_F
! 	     [(match_dup 1)
! 	      (const_int SVE_STRICT_GP)
! 	      (unspec:SVE_FULL_F
! 		[(match_dup 1)
! 		 (const_int SVE_STRICT_GP)
! 		 (match_operand:SVE_FULL_F 2 "register_operand")
! 		 (match_operand:SVE_FULL_F 3 "register_operand")]
! 		UNSPEC_COND_FSUB)]
! 	     UNSPEC_COND_FABS)
! 	   (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
! {
!   if (rtx_equal_p (operands[3], operands[4]))
!     std::swap (operands[2], operands[3]);
! })
! 
! ;; Predicated floating-point absolute difference, merging with the first
! ;; input.
! (define_insn_and_rewrite "*aarch64_cond_abd<mode>_2"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 4)
! 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
! 	      (unspec:SVE_FULL_F
! 		[(match_operand 6)
! 		 (match_operand:SI 7 "aarch64_sve_gp_strictness")
! 		 (match_operand:SVE_FULL_F 2 "register_operand" "0, w")
! 		 (match_operand:SVE_FULL_F 3 "register_operand" "w, w")]
! 		UNSPEC_COND_FSUB)]
! 	     UNSPEC_COND_FABS)
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && aarch64_sve_pred_dominates_p (&operands[4], operands[1])
!    && aarch64_sve_pred_dominates_p (&operands[6], operands[1])"
!   "@
!    fabd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;fabd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   "&& (!rtx_equal_p (operands[1], operands[4])
!        || !rtx_equal_p (operands[1], operands[6]))"
!   {
!     operands[4] = copy_rtx (operands[1]);
!     operands[6] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated floating-point absolute difference, merging with the second
! ;; input.
! (define_insn_and_rewrite "*aarch64_cond_abd<mode>_3"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 4)
! 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
! 	      (unspec:SVE_FULL_F
! 		[(match_operand 6)
! 		 (match_operand:SI 7 "aarch64_sve_gp_strictness")
! 		 (match_operand:SVE_FULL_F 2 "register_operand" "w, w")
! 		 (match_operand:SVE_FULL_F 3 "register_operand" "0, w")]
! 		UNSPEC_COND_FSUB)]
! 	     UNSPEC_COND_FABS)
! 	   (match_dup 3)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && aarch64_sve_pred_dominates_p (&operands[4], operands[1])
!    && aarch64_sve_pred_dominates_p (&operands[6], operands[1])"
!   "@
!    fabd\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %3\;fabd\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>"
!   "&& (!rtx_equal_p (operands[1], operands[4])
!        || !rtx_equal_p (operands[1], operands[6]))"
!   {
!     operands[4] = copy_rtx (operands[1]);
!     operands[6] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated floating-point absolute difference, merging with an
! ;; independent value.
! (define_insn_and_rewrite "*aarch64_cond_abd<mode>_any"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=&w, &w, &w, &w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 5)
! 	      (match_operand:SI 6 "aarch64_sve_gp_strictness")
! 	      (unspec:SVE_FULL_F
! 		[(match_operand 7)
! 		 (match_operand:SI 8 "aarch64_sve_gp_strictness")
! 		 (match_operand:SVE_FULL_F 2 "register_operand" "0, w, w, w, w")
! 		 (match_operand:SVE_FULL_F 3 "register_operand" "w, 0, w, w, w")]
! 		UNSPEC_COND_FSUB)]
! 	     UNSPEC_COND_FABS)
! 	   (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero" "Dz, Dz, Dz, 0, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[2], operands[4])
!    && !rtx_equal_p (operands[3], operands[4])
!    && aarch64_sve_pred_dominates_p (&operands[5], operands[1])
!    && aarch64_sve_pred_dominates_p (&operands[7], operands[1])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;fabd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;fabd\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;fabd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;fabd\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    #"
!   "&& 1"
!   {
!     if (reload_completed
!         && register_operand (operands[4], <MODE>mode)
!         && !rtx_equal_p (operands[0], operands[4]))
!       {
! 	emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[3],
! 						 operands[4], operands[1]));
! 	operands[4] = operands[3] = operands[0];
!       }
!     else if (!rtx_equal_p (operands[1], operands[5])
! 	     || !rtx_equal_p (operands[1], operands[7]))
!       {
! 	operands[5] = copy_rtx (operands[1]);
! 	operands[7] = copy_rtx (operands[1]);
!       }
!     else
!       FAIL;
!   }
!   [(set_attr "movprfx" "yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Multiplication
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FMUL
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated floating-point multiplication.
! (define_insn_and_split "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, w, w, ?&w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl")
! 	   (match_operand:SI 4 "aarch64_sve_gp_strictness" "i, Z, Ui1, i, Ui1")
! 	   (match_operand:SVE_FULL_F 2 "register_operand" "%0, w, 0, w, w")
! 	   (match_operand:SVE_FULL_F 3 "aarch64_sve_float_mul_operand" "vsM, w, w, vsM, w")]
! 	  SVE_COND_FP_MUL))]
!   "TARGET_SVE"
!   "@
!    fmul\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    #
!    fmul\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;fmul\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    movprfx\t%0, %2\;fmul\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   ; Split the unpredicated form after reload, so that we don't have
!   ; the unnecessary PTRUE.
!   "&& reload_completed
!    && register_operand (operands[3], <MODE>mode)
!    && INTVAL (operands[4]) == SVE_RELAXED_GP"
!   [(set (match_dup 0) (mult:SVE_FULL_F (match_dup 2) (match_dup 3)))]
!   ""
!   [(set_attr "movprfx" "*,*,*,yes,yes")]
! )
! 
! ;; Merging forms are handled through SVE_COND_FP_BINARY and
! ;; SVE_COND_FP_BINARY_I1.
! 
! ;; Unpredicated multiplication by selected lanes.
! (define_insn "@aarch64_mul_lane_<mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w")
! 	(mult:SVE_FULL_F
! 	  (unspec:SVE_FULL_F
! 	    [(match_operand:SVE_FULL_F 2 "register_operand" "<sve_lane_con>")
! 	     (match_operand:SI 3 "const_int_operand")]
! 	    UNSPEC_SVE_LANE_SELECT)
! 	  (match_operand:SVE_FULL_F 1 "register_operand" "w")))]
!   "TARGET_SVE"
!   "fmul\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>[%3]"
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Division
! ;; -------------------------------------------------------------------------
! ;; The patterns in this section are synthetic.
! ;; -------------------------------------------------------------------------
! 
! (define_expand "div<mode>3"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_dup 3)
! 	   (const_int SVE_RELAXED_GP)
! 	   (match_operand:SVE_FULL_F 1 "nonmemory_operand")
! 	   (match_operand:SVE_FULL_F 2 "register_operand")]
! 	  UNSPEC_COND_FDIV))]
!   "TARGET_SVE"
!   {
!     if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
!       DONE;
! 
!     operands[1] = force_reg (<MODE>mode, operands[1]);
!     operands[3] = aarch64_ptrue_reg (<VPRED>mode);
!   }
! )
! 
! (define_expand "@aarch64_frecpe<mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:SVE_FULL_F 1 "register_operand")]
! 	  UNSPEC_FRECPE))]
!   "TARGET_SVE"
! )
! 
! (define_expand "@aarch64_frecps<mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:SVE_FULL_F 1 "register_operand")
! 	   (match_operand:SVE_FULL_F 2 "register_operand")]
! 	  UNSPEC_FRECPS))]
!   "TARGET_SVE"
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Binary logical operations
! ;; -------------------------------------------------------------------------
! ;; Includes
! ;; - AND
! ;; - EOR
! ;; - ORR
! ;; -------------------------------------------------------------------------
! 
! ;; Binary logical operations on floating-point modes.  We avoid subregs
  ;; by providing this, but we need to use UNSPECs since rtx logical ops
  ;; aren't defined for floating-point modes.
  (define_insn "*<optab><mode>3"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:SVE_FULL_F 1 "register_operand" "w")
! 	   (match_operand:SVE_FULL_F 2 "register_operand" "w")]
! 	  LOGICALF))]
    "TARGET_SVE"
    "<logicalf_op>\t%0.d, %1.d, %2.d"
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Sign copying
! ;; -------------------------------------------------------------------------
! ;; The patterns in this section are synthetic.
! ;; -------------------------------------------------------------------------
! 
! (define_expand "copysign<mode>3"
!   [(match_operand:SVE_FULL_F 0 "register_operand")
!    (match_operand:SVE_FULL_F 1 "register_operand")
!    (match_operand:SVE_FULL_F 2 "register_operand")]
    "TARGET_SVE"
!   {
!     rtx sign = gen_reg_rtx (<V_INT_EQUIV>mode);
!     rtx mant = gen_reg_rtx (<V_INT_EQUIV>mode);
!     rtx int_res = gen_reg_rtx (<V_INT_EQUIV>mode);
!     int bits = GET_MODE_UNIT_BITSIZE (<MODE>mode) - 1;
! 
!     rtx arg1 = lowpart_subreg (<V_INT_EQUIV>mode, operands[1], <MODE>mode);
!     rtx arg2 = lowpart_subreg (<V_INT_EQUIV>mode, operands[2], <MODE>mode);
! 
!     emit_insn (gen_and<v_int_equiv>3
! 	       (sign, arg2,
! 		aarch64_simd_gen_const_vector_dup (<V_INT_EQUIV>mode,
! 						   HOST_WIDE_INT_M1U
! 						   << bits)));
!     emit_insn (gen_and<v_int_equiv>3
! 	       (mant, arg1,
! 		aarch64_simd_gen_const_vector_dup (<V_INT_EQUIV>mode,
! 						   ~(HOST_WIDE_INT_M1U
! 						     << bits))));
!     emit_insn (gen_ior<v_int_equiv>3 (int_res, sign, mant));
!     emit_move_insn (operands[0], gen_lowpart (<MODE>mode, int_res));
!     DONE;
!   }
  )
  
+ (define_expand "xorsign<mode>3"
+   [(match_operand:SVE_FULL_F 0 "register_operand")
+    (match_operand:SVE_FULL_F 1 "register_operand")
+    (match_operand:SVE_FULL_F 2 "register_operand")]
+   "TARGET_SVE"
+   {
+     rtx sign = gen_reg_rtx (<V_INT_EQUIV>mode);
+     rtx int_res = gen_reg_rtx (<V_INT_EQUIV>mode);
+     int bits = GET_MODE_UNIT_BITSIZE (<MODE>mode) - 1;
+ 
+     rtx arg1 = lowpart_subreg (<V_INT_EQUIV>mode, operands[1], <MODE>mode);
+     rtx arg2 = lowpart_subreg (<V_INT_EQUIV>mode, operands[2], <MODE>mode);
+ 
+     emit_insn (gen_and<v_int_equiv>3
+ 	       (sign, arg2,
+ 		aarch64_simd_gen_const_vector_dup (<V_INT_EQUIV>mode,
+ 						   HOST_WIDE_INT_M1U
+ 						   << bits)));
+     emit_insn (gen_xor<v_int_equiv>3 (int_res, arg1, sign));
+     emit_move_insn (operands[0], gen_lowpart (<MODE>mode, int_res));
+     DONE;
+   }
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [FP] Maximum and minimum
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - FMAX
+ ;; - FMAXNM
+ ;; - FMIN
+ ;; - FMINNM
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Unpredicated fmax/fmin (the libm functions).  The optabs for the
+ ;; smin/smax rtx codes are handled in the generic section above.
+ (define_expand "<maxmin_uns><mode>3"
+   [(set (match_operand:SVE_FULL_F 0 "register_operand")
+ 	(unspec:SVE_FULL_F
+ 	  [(match_dup 3)
+ 	   (const_int SVE_RELAXED_GP)
+ 	   (match_operand:SVE_FULL_F 1 "register_operand")
+ 	   (match_operand:SVE_FULL_F 2 "aarch64_sve_float_maxmin_operand")]
+ 	  SVE_COND_FP_MAXMIN_PUBLIC))]
+   "TARGET_SVE"
+   {
+     operands[3] = aarch64_ptrue_reg (<VPRED>mode);
+   }
+ )
+ 
+ ;; Predicated floating-point maximum/minimum.
+ (define_insn "@aarch64_pred_<optab><mode>"
+   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, w, ?&w, ?&w")
+ 	(unspec:SVE_FULL_F
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl")
+ 	   (match_operand:SI 4 "aarch64_sve_gp_strictness")
+ 	   (match_operand:SVE_FULL_F 2 "register_operand" "%0, 0, w, w")
+ 	   (match_operand:SVE_FULL_F 3 "aarch64_sve_float_maxmin_operand" "vsB, w, vsB, w")]
+ 	  SVE_COND_FP_MAXMIN))]
+   "TARGET_SVE"
+   "@
+    <sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
+    <sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+    movprfx\t%0, %2\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
+    movprfx\t%0, %2\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
+   [(set_attr "movprfx" "*,*,yes,yes")]
+ )
+ 
+ ;; Merging forms are handled through SVE_COND_FP_BINARY and
+ ;; SVE_COND_FP_BINARY_I1.
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [PRED] Binary logical operations
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - AND
+ ;; - ANDS
+ ;; - EOR
+ ;; - EORS
+ ;; - ORR
+ ;; - ORRS
+ ;; -------------------------------------------------------------------------
+ 
  ;; Predicate AND.  We can reuse one of the inputs as the GP.
+ ;; Doubling the second operand is the preferred implementation
+ ;; of the MOV alias, so we use that instead of %1/z, %1, %2.
  (define_insn "and<mode>3"
    [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
  	(and:PRED_ALL (match_operand:PRED_ALL 1 "register_operand" "Upa")
  		      (match_operand:PRED_ALL 2 "register_operand" "Upa")))]
    "TARGET_SVE"
!   "and\t%0.b, %1/z, %2.b, %2.b"
  )
  
! ;; Unpredicated predicate EOR and ORR.
  (define_expand "<optab><mode>3"
    [(set (match_operand:PRED_ALL 0 "register_operand")
  	(and:PRED_ALL
***************
*** 1150,1161 ****
  	  (match_dup 3)))]
    "TARGET_SVE"
    {
!     operands[3] = force_reg (<MODE>mode, CONSTM1_RTX (<MODE>mode));
    }
  )
  
! ;; Predicated predicate ORR and XOR.
! (define_insn "pred_<optab><mode>3"
    [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
  	(and:PRED_ALL
  	  (LOGICAL:PRED_ALL
--- 5711,5722 ----
  	  (match_dup 3)))]
    "TARGET_SVE"
    {
!     operands[3] = aarch64_ptrue_reg (<MODE>mode);
    }
  )
  
! ;; Predicated predicate AND, EOR and ORR.
! (define_insn "@aarch64_pred_<optab><mode>_z"
    [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
  	(and:PRED_ALL
  	  (LOGICAL:PRED_ALL
***************
*** 1167,1230 ****
  )
  
  ;; Perform a logical operation on operands 2 and 3, using operand 1 as
! ;; the GP (which is known to be a PTRUE).  Store the result in operand 0
! ;; and set the flags in the same way as for PTEST.  The (and ...) in the
! ;; UNSPEC_PTEST_PTRUE is logically redundant, but means that the tested
! ;; value is structurally equivalent to rhs of the second set.
  (define_insn "*<optab><mode>3_cc"
!   [(set (reg:CC CC_REGNUM)
! 	(compare:CC
! 	  (unspec:SI [(match_operand:PRED_ALL 1 "register_operand" "Upa")
! 		      (and:PRED_ALL
! 			(LOGICAL:PRED_ALL
! 			  (match_operand:PRED_ALL 2 "register_operand" "Upa")
! 			  (match_operand:PRED_ALL 3 "register_operand" "Upa"))
! 			(match_dup 1))]
! 		     UNSPEC_PTEST_PTRUE)
! 	  (const_int 0)))
     (set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
  	(and:PRED_ALL (LOGICAL:PRED_ALL (match_dup 2) (match_dup 3))
! 		      (match_dup 1)))]
    "TARGET_SVE"
    "<logical>s\t%0.b, %1/z, %2.b, %3.b"
  )
  
! ;; Unpredicated predicate inverse.
! (define_expand "one_cmpl<mode>2"
!   [(set (match_operand:PRED_ALL 0 "register_operand")
! 	(and:PRED_ALL
! 	  (not:PRED_ALL (match_operand:PRED_ALL 1 "register_operand"))
! 	  (match_dup 2)))]
    "TARGET_SVE"
!   {
!     operands[2] = force_reg (<MODE>mode, CONSTM1_RTX (<MODE>mode));
!   }
  )
  
! ;; Predicated predicate inverse.
! (define_insn "*one_cmpl<mode>3"
!   [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
! 	(and:PRED_ALL
! 	  (not:PRED_ALL (match_operand:PRED_ALL 2 "register_operand" "Upa"))
! 	  (match_operand:PRED_ALL 1 "register_operand" "Upa")))]
!   "TARGET_SVE"
!   "not\t%0.b, %1/z, %2.b"
! )
  
  ;; Predicated predicate BIC and ORN.
! (define_insn "*<nlogical><mode>3"
    [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
  	(and:PRED_ALL
  	  (NLOGICAL:PRED_ALL
! 	    (not:PRED_ALL (match_operand:PRED_ALL 2 "register_operand" "Upa"))
! 	    (match_operand:PRED_ALL 3 "register_operand" "Upa"))
  	  (match_operand:PRED_ALL 1 "register_operand" "Upa")))]
    "TARGET_SVE"
!   "<nlogical>\t%0.b, %1/z, %3.b, %2.b"
  )
  
  ;; Predicated predicate NAND and NOR.
! (define_insn "*<logical_nn><mode>3"
    [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
  	(and:PRED_ALL
  	  (NLOGICAL:PRED_ALL
--- 5728,5844 ----
  )
  
  ;; Perform a logical operation on operands 2 and 3, using operand 1 as
! ;; the GP.  Store the result in operand 0 and set the flags in the same
! ;; way as for PTEST.
  (define_insn "*<optab><mode>3_cc"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
! 	   (match_operand 4)
! 	   (match_operand:SI 5 "aarch64_sve_ptrue_flag")
! 	   (and:PRED_ALL
! 	     (LOGICAL:PRED_ALL
! 	       (match_operand:PRED_ALL 2 "register_operand" "Upa")
! 	       (match_operand:PRED_ALL 3 "register_operand" "Upa"))
! 	     (match_dup 4))]
! 	  UNSPEC_PTEST))
     (set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
  	(and:PRED_ALL (LOGICAL:PRED_ALL (match_dup 2) (match_dup 3))
! 		      (match_dup 4)))]
    "TARGET_SVE"
    "<logical>s\t%0.b, %1/z, %2.b, %3.b"
  )
  
! ;; Same with just the flags result.
! (define_insn "*<optab><mode>3_ptest"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
! 	   (match_operand 4)
! 	   (match_operand:SI 5 "aarch64_sve_ptrue_flag")
! 	   (and:PRED_ALL
! 	     (LOGICAL:PRED_ALL
! 	       (match_operand:PRED_ALL 2 "register_operand" "Upa")
! 	       (match_operand:PRED_ALL 3 "register_operand" "Upa"))
! 	     (match_dup 4))]
! 	  UNSPEC_PTEST))
!    (clobber (match_scratch:VNx16BI 0 "=Upa"))]
    "TARGET_SVE"
!   "<logical>s\t%0.b, %1/z, %2.b, %3.b"
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [PRED] Binary logical operations (inverted second input)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - BIC
! ;; - ORN
! ;; -------------------------------------------------------------------------
  
  ;; Predicated predicate BIC and ORN.
! (define_insn "aarch64_pred_<nlogical><mode>_z"
    [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
  	(and:PRED_ALL
  	  (NLOGICAL:PRED_ALL
! 	    (not:PRED_ALL (match_operand:PRED_ALL 3 "register_operand" "Upa"))
! 	    (match_operand:PRED_ALL 2 "register_operand" "Upa"))
  	  (match_operand:PRED_ALL 1 "register_operand" "Upa")))]
    "TARGET_SVE"
!   "<nlogical>\t%0.b, %1/z, %2.b, %3.b"
  )
  
+ ;; Same, but set the flags as a side-effect.
+ (define_insn "*<nlogical><mode>3_cc"
+   [(set (reg:CC_NZC CC_REGNUM)
+ 	(unspec:CC_NZC
+ 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
+ 	   (match_operand 4)
+ 	   (match_operand:SI 5 "aarch64_sve_ptrue_flag")
+ 	   (and:PRED_ALL
+ 	     (NLOGICAL:PRED_ALL
+ 	       (not:PRED_ALL
+ 		 (match_operand:PRED_ALL 3 "register_operand" "Upa"))
+ 	       (match_operand:PRED_ALL 2 "register_operand" "Upa"))
+ 	     (match_dup 4))]
+ 	  UNSPEC_PTEST))
+    (set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
+ 	(and:PRED_ALL (NLOGICAL:PRED_ALL
+ 			(not:PRED_ALL (match_dup 3))
+ 			(match_dup 2))
+ 		      (match_dup 4)))]
+   "TARGET_SVE"
+   "<nlogical>s\t%0.b, %1/z, %2.b, %3.b"
+ )
+ 
+ ;; Same with just the flags result.
+ (define_insn "*<nlogical><mode>3_ptest"
+   [(set (reg:CC_NZC CC_REGNUM)
+ 	(unspec:CC_NZC
+ 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
+ 	   (match_operand 4)
+ 	   (match_operand:SI 5 "aarch64_sve_ptrue_flag")
+ 	   (and:PRED_ALL
+ 	     (NLOGICAL:PRED_ALL
+ 	       (not:PRED_ALL
+ 		 (match_operand:PRED_ALL 3 "register_operand" "Upa"))
+ 	       (match_operand:PRED_ALL 2 "register_operand" "Upa"))
+ 	     (match_dup 4))]
+ 	  UNSPEC_PTEST))
+    (clobber (match_scratch:VNx16BI 0 "=Upa"))]
+   "TARGET_SVE"
+   "<nlogical>s\t%0.b, %1/z, %2.b, %3.b"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [PRED] Binary logical operations (inverted result)
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - NAND
+ ;; - NOR
+ ;; -------------------------------------------------------------------------
+ 
  ;; Predicated predicate NAND and NOR.
! (define_insn "aarch64_pred_<logical_nn><mode>_z"
    [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
  	(and:PRED_ALL
  	  (NLOGICAL:PRED_ALL
***************
*** 1235,1642 ****
    "<logical_nn>\t%0.b, %1/z, %2.b, %3.b"
  )
  
! ;; Unpredicated LSL, LSR and ASR by a vector.
! (define_expand "v<optab><mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand")
! 	(unspec:SVE_I
! 	  [(match_dup 3)
! 	   (ASHIFT:SVE_I
! 	     (match_operand:SVE_I 1 "register_operand")
! 	     (match_operand:SVE_I 2 "aarch64_sve_<lr>shift_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; LSL, LSR and ASR by a vector, predicated with a PTRUE.  We don't
! ;; actually need the predicate for the first alternative, but using Upa
! ;; or X isn't likely to gain much and would make the instruction seem
! ;; less uniform to the register allocator.
! (define_insn_and_split "*v<optab><mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w, w, ?&w")
! 	(unspec:SVE_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (ASHIFT:SVE_I
! 	     (match_operand:SVE_I 2 "register_operand" "w, 0, w")
! 	     (match_operand:SVE_I 3 "aarch64_sve_<lr>shift_operand" "D<lr>, w, w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    "@
!    #
!    <shift>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<shift>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   "&& reload_completed
!    && !register_operand (operands[3], <MODE>mode)"
!   [(set (match_dup 0) (ASHIFT:SVE_I (match_dup 2) (match_dup 3)))]
!   ""
    [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Unpredicated shift operations by a constant (post-RA only).
! ;; These are generated by splitting a predicated instruction whose
! ;; predicate is unused.
! (define_insn "*post_ra_v<optab><mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w")
! 	(ASHIFT:SVE_I
! 	  (match_operand:SVE_I 1 "register_operand" "w")
! 	  (match_operand:SVE_I 2 "aarch64_simd_<lr>shift_imm")))]
!   "TARGET_SVE && reload_completed"
!   "<shift>\t%0.<Vetype>, %1.<Vetype>, #%2"
  )
  
! ;; LSL, LSR and ASR by a scalar, which expands into one of the vector
! ;; shifts above.
! (define_expand "<ASHIFT:optab><mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand")
! 	(ASHIFT:SVE_I (match_operand:SVE_I 1 "register_operand")
! 		      (match_operand:<VEL> 2 "general_operand")))]
    "TARGET_SVE"
    {
!     rtx amount;
!     if (CONST_INT_P (operands[2]))
!       {
! 	amount = gen_const_vec_duplicate (<MODE>mode, operands[2]);
! 	if (!aarch64_sve_<lr>shift_operand (operands[2], <MODE>mode))
! 	  amount = force_reg (<MODE>mode, amount);
!       }
!     else
!       {
! 	amount = gen_reg_rtx (<MODE>mode);
! 	emit_insn (gen_vec_duplicate<mode> (amount,
! 					    convert_to_mode (<VEL>mode,
! 							     operands[2], 0)));
!       }
!     emit_insn (gen_v<optab><mode>3 (operands[0], operands[1], amount));
!     DONE;
    }
  )
  
! ;; Test all bits of operand 1.  Operand 0 is a GP that is known to hold PTRUE.
! ;;
! ;; Using UNSPEC_PTEST_PTRUE allows combine patterns to assume that the GP
! ;; is a PTRUE even if the optimizers haven't yet been able to propagate
! ;; the constant.  We would use a separate unspec code for PTESTs involving
! ;; GPs that might not be PTRUEs.
! (define_insn "ptest_ptrue<mode>"
!   [(set (reg:CC CC_REGNUM)
! 	(compare:CC
! 	  (unspec:SI [(match_operand:PRED_ALL 0 "register_operand" "Upa")
! 		      (match_operand:PRED_ALL 1 "register_operand" "Upa")]
! 		     UNSPEC_PTEST_PTRUE)
! 	  (const_int 0)))]
    "TARGET_SVE"
!   "ptest\t%0, %1.b"
  )
  
! ;; Set element I of the result if operand1 + J < operand2 for all J in [0, I].
! ;; with the comparison being unsigned.
! (define_insn "while_ult<GPI:mode><PRED_ALL:mode>"
!   [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
! 	(unspec:PRED_ALL [(match_operand:GPI 1 "aarch64_reg_or_zero" "rZ")
! 			  (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ")]
! 			 UNSPEC_WHILE_LO))
!    (clobber (reg:CC CC_REGNUM))]
    "TARGET_SVE"
!   "whilelo\t%0.<PRED_ALL:Vetype>, %<w>1, %<w>2"
  )
  
! ;; WHILELO sets the flags in the same way as a PTEST with a PTRUE GP.
! ;; Handle the case in which both results are useful.  The GP operand
! ;; to the PTEST isn't needed, so we allow it to be anything.
! (define_insn_and_split "while_ult<GPI:mode><PRED_ALL:mode>_cc"
!   [(set (reg:CC CC_REGNUM)
! 	(compare:CC
! 	  (unspec:SI [(match_operand:PRED_ALL 1)
! 		      (unspec:PRED_ALL
! 			[(match_operand:GPI 2 "aarch64_reg_or_zero" "rZ")
! 			 (match_operand:GPI 3 "aarch64_reg_or_zero" "rZ")]
! 			UNSPEC_WHILE_LO)]
! 		     UNSPEC_PTEST_PTRUE)
! 	  (const_int 0)))
!    (set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
! 	(unspec:PRED_ALL [(match_dup 2)
! 			  (match_dup 3)]
! 			 UNSPEC_WHILE_LO))]
    "TARGET_SVE"
-   "whilelo\t%0.<PRED_ALL:Vetype>, %<w>2, %<w>3"
-   ;; Force the compiler to drop the unused predicate operand, so that we
-   ;; don't have an unnecessary PTRUE.
-   "&& !CONSTANT_P (operands[1])"
-   [(const_int 0)]
    {
!     emit_insn (gen_while_ult<GPI:mode><PRED_ALL:mode>_cc
! 	       (operands[0], CONSTM1_RTX (<MODE>mode),
! 		operands[2], operands[3]));
!     DONE;
    }
  )
  
! ;; Integer comparisons predicated with a PTRUE.
! (define_insn "*cmp<cmp_op><mode>"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa, Upa")
! 	(unspec:<VPRED>
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (SVE_INT_CMP:<VPRED>
! 	     (match_operand:SVE_I 2 "register_operand" "w, w")
! 	     (match_operand:SVE_I 3 "aarch64_sve_cmp_<sve_imm_con>_operand" "<sve_imm_con>, w"))]
! 	  UNSPEC_MERGE_PTRUE))
!    (clobber (reg:CC CC_REGNUM))]
    "TARGET_SVE"
    "@
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, #%3
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
  )
  
! ;; Integer comparisons predicated with a PTRUE in which only the flags result
! ;; is interesting.
! (define_insn "*cmp<cmp_op><mode>_ptest"
!   [(set (reg:CC CC_REGNUM)
! 	(compare:CC
! 	  (unspec:SI
! 	    [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	     (unspec:<VPRED>
! 	       [(match_dup 1)
! 		(SVE_INT_CMP:<VPRED>
! 		  (match_operand:SVE_I 2 "register_operand" "w, w")
! 		  (match_operand:SVE_I 3 "aarch64_sve_cmp_<sve_imm_con>_operand" "<sve_imm_con>, w"))]
! 	       UNSPEC_MERGE_PTRUE)]
! 	    UNSPEC_PTEST_PTRUE)
! 	  (const_int 0)))
!    (clobber (match_scratch:<VPRED> 0 "=Upa, Upa"))]
    "TARGET_SVE"
    "@
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, #%3
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
  )
  
! ;; Integer comparisons predicated with a PTRUE in which both the flag and
! ;; predicate results are interesting.
! (define_insn "*cmp<cmp_op><mode>_cc"
!   [(set (reg:CC CC_REGNUM)
! 	(compare:CC
! 	  (unspec:SI
! 	    [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	     (unspec:<VPRED>
! 	       [(match_dup 1)
! 		(SVE_INT_CMP:<VPRED>
! 		  (match_operand:SVE_I 2 "register_operand" "w, w")
! 		  (match_operand:SVE_I 3 "aarch64_sve_cmp_<sve_imm_con>_operand" "<sve_imm_con>, w"))]
! 	       UNSPEC_MERGE_PTRUE)]
! 	    UNSPEC_PTEST_PTRUE)
! 	  (const_int 0)))
!    (set (match_operand:<VPRED> 0 "register_operand" "=Upa, Upa")
! 	(unspec:<VPRED>
! 	  [(match_dup 1)
! 	   (SVE_INT_CMP:<VPRED>
! 	     (match_dup 2)
! 	     (match_dup 3))]
! 	  UNSPEC_MERGE_PTRUE))]
!   "TARGET_SVE"
    "@
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, #%3
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
  )
  
! ;; Predicated integer comparisons, formed by combining a PTRUE-predicated
! ;; comparison with an AND.  Split the instruction into its preferred form
! ;; (below) at the earliest opportunity, in order to get rid of the
! ;; redundant operand 1.
! (define_insn_and_split "*pred_cmp<cmp_op><mode>_combine"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa, Upa")
!        (and:<VPRED>
!          (unspec:<VPRED>
!            [(match_operand:<VPRED> 1)
!             (SVE_INT_CMP:<VPRED>
!               (match_operand:SVE_I 2 "register_operand" "w, w")
!               (match_operand:SVE_I 3 "aarch64_sve_cmp_<sve_imm_con>_operand" "<sve_imm_con>, w"))]
!            UNSPEC_MERGE_PTRUE)
!          (match_operand:<VPRED> 4 "register_operand" "Upl, Upl")))
!    (clobber (reg:CC CC_REGNUM))]
    "TARGET_SVE"
!   "#"
!   "&& 1"
!   [(parallel
!      [(set (match_dup 0)
!           (and:<VPRED>
!             (SVE_INT_CMP:<VPRED>
!               (match_dup 2)
!               (match_dup 3))
!             (match_dup 4)))
!       (clobber (reg:CC CC_REGNUM))])]
  )
  
! ;; Predicated integer comparisons.
! (define_insn "*pred_cmp<cmp_op><mode>"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa, Upa")
! 	(and:<VPRED>
! 	  (SVE_INT_CMP:<VPRED>
! 	    (match_operand:SVE_I 2 "register_operand" "w, w")
! 	    (match_operand:SVE_I 3 "aarch64_sve_cmp_<sve_imm_con>_operand" "<sve_imm_con>, w"))
! 	  (match_operand:<VPRED> 1 "register_operand" "Upl, Upl")))
!    (clobber (reg:CC CC_REGNUM))]
    "TARGET_SVE"
    "@
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, #%3
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
  )
  
! ;; Floating-point comparisons predicated with a PTRUE.
! (define_insn "*fcm<cmp_op><mode>"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa, Upa")
! 	(unspec:<VPRED>
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (SVE_FP_CMP:<VPRED>
! 	     (match_operand:SVE_F 2 "register_operand" "w, w")
! 	     (match_operand:SVE_F 3 "aarch64_simd_reg_or_zero" "Dz, w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    "@
!    fcm<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, #0.0
!    fcm<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
  )
  
! (define_insn "*fcmuo<mode>"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa")
! 	(unspec:<VPRED>
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (unordered:<VPRED>
! 	     (match_operand:SVE_F 2 "register_operand" "w")
! 	     (match_operand:SVE_F 3 "register_operand" "w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "fcmuo\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
  )
  
! ;; Floating-point comparisons predicated on a PTRUE, with the results ANDed
! ;; with another predicate P.  This does not have the same trapping behavior
! ;; as predicating the comparison itself on P, but it's a legitimate fold,
! ;; since we can drop any potentially-trapping operations whose results
! ;; are not needed.
! ;;
! ;; Split the instruction into its preferred form (below) at the earliest
! ;; opportunity, in order to get rid of the redundant operand 1.
! (define_insn_and_split "*fcm<cmp_op><mode>_and_combine"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa, Upa")
! 	(and:<VPRED>
! 	  (unspec:<VPRED>
! 	    [(match_operand:<VPRED> 1)
! 	     (SVE_FP_CMP
! 	       (match_operand:SVE_F 2 "register_operand" "w, w")
! 	       (match_operand:SVE_F 3 "aarch64_simd_reg_or_zero" "Dz, w"))]
! 	    UNSPEC_MERGE_PTRUE)
! 	  (match_operand:<VPRED> 4 "register_operand" "Upl, Upl")))]
    "TARGET_SVE"
!   "#"
!   "&& 1"
!   [(set (match_dup 0)
! 	(and:<VPRED>
! 	  (SVE_FP_CMP:<VPRED>
! 	    (match_dup 2)
! 	    (match_dup 3))
! 	  (match_dup 4)))]
  )
  
! (define_insn_and_split "*fcmuo<mode>_and_combine"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa")
! 	(and:<VPRED>
! 	  (unspec:<VPRED>
! 	    [(match_operand:<VPRED> 1)
! 	     (unordered
! 	       (match_operand:SVE_F 2 "register_operand" "w")
! 	       (match_operand:SVE_F 3 "register_operand" "w"))]
! 	    UNSPEC_MERGE_PTRUE)
! 	  (match_operand:<VPRED> 4 "register_operand" "Upl")))]
    "TARGET_SVE"
!   "#"
    "&& 1"
!   [(set (match_dup 0)
! 	(and:<VPRED>
! 	  (unordered:<VPRED>
! 	    (match_dup 2)
! 	    (match_dup 3))
! 	  (match_dup 4)))]
  )
  
! ;; Unpredicated floating-point comparisons, with the results ANDed
! ;; with another predicate.  This is a valid fold for the same reasons
! ;; as above.
! (define_insn "*fcm<cmp_op><mode>_and"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa, Upa")
! 	(and:<VPRED>
! 	  (SVE_FP_CMP:<VPRED>
! 	    (match_operand:SVE_F 2 "register_operand" "w, w")
! 	    (match_operand:SVE_F 3 "aarch64_simd_reg_or_zero" "Dz, w"))
! 	  (match_operand:<VPRED> 1 "register_operand" "Upl, Upl")))]
    "TARGET_SVE"
    "@
!    fcm<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, #0.0
!    fcm<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
  )
  
! (define_insn "*fcmuo<mode>_and"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa")
! 	(and:<VPRED>
! 	  (unordered:<VPRED>
! 	    (match_operand:SVE_F 2 "register_operand" "w")
! 	    (match_operand:SVE_F 3 "register_operand" "w"))
! 	  (match_operand:<VPRED> 1 "register_operand" "Upl")))]
    "TARGET_SVE"
!   "fcmuo\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
  )
  
! ;; Predicated floating-point comparisons.  We don't need a version
! ;; of this for unordered comparisons.
! (define_insn "*pred_fcm<cmp_op><mode>"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa, Upa")
! 	(unspec:<VPRED>
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (match_operand:SVE_F 2 "register_operand" "w, w")
! 	   (match_operand:SVE_F 3 "aarch64_simd_reg_or_zero" "Dz, w")]
! 	  SVE_COND_FP_CMP))]
    "TARGET_SVE"
    "@
!    fcm<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, #0.0
!    fcm<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
  )
  
  ;; vcond_mask operand order: true, false, mask
  ;; UNSPEC_SEL operand order: mask, true, false (as for VEC_COND_EXPR)
  ;; SEL operand order:        mask, true, false
! (define_insn "vcond_mask_<mode><vpred>"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w")
! 	(unspec:SVE_ALL
! 	  [(match_operand:<VPRED> 3 "register_operand" "Upa")
! 	   (match_operand:SVE_ALL 1 "register_operand" "w")
! 	   (match_operand:SVE_ALL 2 "register_operand" "w")]
  	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "sel\t%0.<Vetype>, %3, %1.<Vetype>, %2.<Vetype>"
  )
  
! ;; Selects between a duplicated immediate and zero.
! (define_insn "aarch64_sve_dup<mode>_const"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w")
! 	(unspec:SVE_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (match_operand:SVE_I 2 "aarch64_sve_dup_immediate")
! 	   (match_operand:SVE_I 3 "aarch64_simd_imm_zero")]
  	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "mov\t%0.<Vetype>, %1/z, #%2"
  )
  
  ;; Integer (signed) vcond.  Don't enforce an immediate range here, since it
  ;; depends on the comparison; leave it to aarch64_expand_sve_vcond instead.
  (define_expand "vcond<mode><v_int_equiv>"
!   [(set (match_operand:SVE_ALL 0 "register_operand")
! 	(if_then_else:SVE_ALL
  	  (match_operator 3 "comparison_operator"
  	    [(match_operand:<V_INT_EQUIV> 4 "register_operand")
  	     (match_operand:<V_INT_EQUIV> 5 "nonmemory_operand")])
! 	  (match_operand:SVE_ALL 1 "register_operand")
! 	  (match_operand:SVE_ALL 2 "register_operand")))]
    "TARGET_SVE"
    {
      aarch64_expand_sve_vcond (<MODE>mode, <V_INT_EQUIV>mode, operands);
--- 5849,6804 ----
    "<logical_nn>\t%0.b, %1/z, %2.b, %3.b"
  )
  
! ;; Same, but set the flags as a side-effect.
! (define_insn "*<logical_nn><mode>3_cc"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
! 	   (match_operand 4)
! 	   (match_operand:SI 5 "aarch64_sve_ptrue_flag")
! 	   (and:PRED_ALL
! 	     (NLOGICAL:PRED_ALL
! 	       (not:PRED_ALL
! 		 (match_operand:PRED_ALL 2 "register_operand" "Upa"))
! 	       (not:PRED_ALL
! 		 (match_operand:PRED_ALL 3 "register_operand" "Upa")))
! 	     (match_dup 4))]
! 	  UNSPEC_PTEST))
!    (set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
! 	(and:PRED_ALL (NLOGICAL:PRED_ALL
! 			(not:PRED_ALL (match_dup 2))
! 			(not:PRED_ALL (match_dup 3)))
! 		      (match_dup 4)))]
!   "TARGET_SVE"
!   "<logical_nn>s\t%0.b, %1/z, %2.b, %3.b"
! )
! 
! ;; Same with just the flags result.
! (define_insn "*<logical_nn><mode>3_ptest"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
! 	   (match_operand 4)
! 	   (match_operand:SI 5 "aarch64_sve_ptrue_flag")
! 	   (and:PRED_ALL
! 	     (NLOGICAL:PRED_ALL
! 	       (not:PRED_ALL
! 		 (match_operand:PRED_ALL 2 "register_operand" "Upa"))
! 	       (not:PRED_ALL
! 		 (match_operand:PRED_ALL 3 "register_operand" "Upa")))
! 	     (match_dup 4))]
! 	  UNSPEC_PTEST))
!    (clobber (match_scratch:VNx16BI 0 "=Upa"))]
!   "TARGET_SVE"
!   "<logical_nn>s\t%0.b, %1/z, %2.b, %3.b"
! )
! 
! ;; =========================================================================
! ;; == Ternary arithmetic
! ;; =========================================================================
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] MLA and MAD
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - MAD
! ;; - MLA
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated integer addition of product.
! (define_expand "fma<mode>4"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(plus:SVE_FULL_I
! 	  (unspec:SVE_FULL_I
! 	    [(match_dup 4)
! 	     (mult:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 1 "register_operand")
! 	       (match_operand:SVE_FULL_I 2 "nonmemory_operand"))]
! 	    UNSPEC_PRED_X)
! 	  (match_operand:SVE_FULL_I 3 "register_operand")))]
    "TARGET_SVE"
    {
!     if (aarch64_prepare_sve_int_fma (operands, PLUS))
!       DONE;
!     operands[4] = aarch64_ptrue_reg (<VPRED>mode);
    }
  )
  
! ;; Predicated integer addition of product.
! (define_insn "@aarch64_pred_fma<mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, w, ?&w")
! 	(plus:SVE_FULL_I
! 	  (unspec:SVE_FULL_I
! 	    [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	     (mult:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 2 "register_operand" "%0, w, w")
! 	       (match_operand:SVE_FULL_I 3 "register_operand" "w, w, w"))]
! 	    UNSPEC_PRED_X)
! 	  (match_operand:SVE_FULL_I 4 "register_operand" "w, 0, w")))]
    "TARGET_SVE"
    "@
!    mad\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    mla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %4\;mla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>"
    [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Predicated integer addition of product with merging.
! (define_expand "cond_fma<mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (plus:SVE_FULL_I
! 	     (mult:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 2 "register_operand")
! 	       (match_operand:SVE_FULL_I 3 "general_operand"))
! 	     (match_operand:SVE_FULL_I 4 "register_operand"))
! 	   (match_operand:SVE_FULL_I 5 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   {
!     if (aarch64_prepare_sve_cond_int_fma (operands, PLUS))
!       DONE;
!     /* Swap the multiplication operands if the fallback value is the
!        second of the two.  */
!     if (rtx_equal_p (operands[3], operands[5]))
!       std::swap (operands[2], operands[3]);
!   }
  )
  
! ;; Predicated integer addition of product, merging with the first input.
! (define_insn "*cond_fma<mode>_2"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (plus:SVE_FULL_I
! 	     (mult:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 2 "register_operand" "0, w")
! 	       (match_operand:SVE_FULL_I 3 "register_operand" "w, w"))
! 	     (match_operand:SVE_FULL_I 4 "register_operand" "w, w"))
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    mad\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    movprfx\t%0, %2\;mad\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated integer addition of product, merging with the third input.
! (define_insn "*cond_fma<mode>_4"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (plus:SVE_FULL_I
! 	     (mult:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 2 "register_operand" "w, w")
! 	       (match_operand:SVE_FULL_I 3 "register_operand" "w, w"))
! 	     (match_operand:SVE_FULL_I 4 "register_operand" "0, w"))
! 	   (match_dup 4)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
+   "@
+    mla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
+    movprfx\t%0, %4\;mla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Predicated integer addition of product, merging with an independent value.
+ (define_insn_and_rewrite "*cond_fma<mode>_any"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=&w, &w, &w, &w, &w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
+ 	   (plus:SVE_FULL_I
+ 	     (mult:SVE_FULL_I
+ 	       (match_operand:SVE_FULL_I 2 "register_operand" "w, w, 0, w, w, w")
+ 	       (match_operand:SVE_FULL_I 3 "register_operand" "w, w, w, 0, w, w"))
+ 	     (match_operand:SVE_FULL_I 4 "register_operand" "w, 0, w, w, w, w"))
+ 	   (match_operand:SVE_FULL_I 5 "aarch64_simd_reg_or_zero" "Dz, Dz, Dz, Dz, 0, w")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE
+    && !rtx_equal_p (operands[2], operands[5])
+    && !rtx_equal_p (operands[3], operands[5])
+    && !rtx_equal_p (operands[4], operands[5])"
+   "@
+    movprfx\t%0.<Vetype>, %1/z, %4.<Vetype>\;mla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
+    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;mla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
+    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;mad\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
+    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;mad\t%0.<Vetype>, %1/m, %2.<Vetype>, %4.<Vetype>
+    movprfx\t%0.<Vetype>, %1/m, %4.<Vetype>\;mla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
+    #"
+   "&& reload_completed
+    && register_operand (operands[5], <MODE>mode)
+    && !rtx_equal_p (operands[0], operands[5])"
    {
!     emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[4],
! 					     operands[5], operands[1]));
!     operands[5] = operands[4] = operands[0];
    }
+   [(set_attr "movprfx" "yes")]
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] MLS and MSB
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - MLS
! ;; - MSB
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated integer subtraction of product.
! (define_expand "fnma<mode>4"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
! 	(minus:SVE_FULL_I
! 	  (match_operand:SVE_FULL_I 3 "register_operand")
! 	  (unspec:SVE_FULL_I
! 	    [(match_dup 4)
! 	     (mult:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 1 "register_operand")
! 	       (match_operand:SVE_FULL_I 2 "general_operand"))]
! 	    UNSPEC_PRED_X)))]
    "TARGET_SVE"
!   {
!     if (aarch64_prepare_sve_int_fma (operands, MINUS))
!       DONE;
!     operands[4] = aarch64_ptrue_reg (<VPRED>mode);
!   }
  )
  
! ;; Predicated integer subtraction of product.
! (define_insn "@aarch64_pred_fnma<mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, w, ?&w")
! 	(minus:SVE_FULL_I
! 	  (match_operand:SVE_FULL_I 4 "register_operand" "w, 0, w")
! 	  (unspec:SVE_FULL_I
! 	    [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	     (mult:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 2 "register_operand" "%0, w, w")
! 	       (match_operand:SVE_FULL_I 3 "register_operand" "w, w, w"))]
! 	    UNSPEC_PRED_X)))]
    "TARGET_SVE"
!   "@
!    msb\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    mls\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %4\;mls\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Predicated integer subtraction of product with merging.
! (define_expand "cond_fnma<mode>"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand")
!    (unspec:SVE_FULL_I
! 	[(match_operand:<VPRED> 1 "register_operand")
! 	 (minus:SVE_FULL_I
! 	   (match_operand:SVE_FULL_I 4 "register_operand")
! 	   (mult:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 2 "register_operand")
! 	     (match_operand:SVE_FULL_I 3 "general_operand")))
! 	 (match_operand:SVE_FULL_I 5 "aarch64_simd_reg_or_zero")]
! 	UNSPEC_SEL))]
    "TARGET_SVE"
    {
!     if (aarch64_prepare_sve_cond_int_fma (operands, MINUS))
!       DONE;
!     /* Swap the multiplication operands if the fallback value is the
!        second of the two.  */
!     if (rtx_equal_p (operands[3], operands[5]))
!       std::swap (operands[2], operands[3]);
    }
  )
  
! ;; Predicated integer subtraction of product, merging with the first input.
! (define_insn "*cond_fnma<mode>_2"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (minus:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 4 "register_operand" "w, w")
! 	     (mult:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 2 "register_operand" "0, w")
! 	       (match_operand:SVE_FULL_I 3 "register_operand" "w, w")))
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
    "@
!    msb\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    movprfx\t%0, %2\;msb\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated integer subtraction of product, merging with the third input.
! (define_insn "*cond_fnma<mode>_4"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (minus:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 4 "register_operand" "0, w")
! 	     (mult:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 2 "register_operand" "w, w")
! 	       (match_operand:SVE_FULL_I 3 "register_operand" "w, w")))
! 	   (match_dup 4)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
    "@
!    mls\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %4\;mls\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated integer subtraction of product, merging with an
! ;; independent value.
! (define_insn_and_rewrite "*cond_fnma<mode>_any"
!   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=&w, &w, &w, &w, &w, ?&w")
! 	(unspec:SVE_FULL_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
! 	   (minus:SVE_FULL_I
! 	     (match_operand:SVE_FULL_I 4 "register_operand" "w, 0, w, w, w, w")
! 	     (mult:SVE_FULL_I
! 	       (match_operand:SVE_FULL_I 2 "register_operand" "w, w, 0, w, w, w")
! 	       (match_operand:SVE_FULL_I 3 "register_operand" "w, w, w, 0, w, w")))
! 	   (match_operand:SVE_FULL_I 5 "aarch64_simd_reg_or_zero" "Dz, Dz, Dz, Dz, 0, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[2], operands[5])
!    && !rtx_equal_p (operands[3], operands[5])
!    && !rtx_equal_p (operands[4], operands[5])"
    "@
!    movprfx\t%0.<Vetype>, %1/z, %4.<Vetype>\;mls\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;mls\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;msb\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;msb\t%0.<Vetype>, %1/m, %2.<Vetype>, %4.<Vetype>
!    movprfx\t%0.<Vetype>, %1/m, %4.<Vetype>\;mls\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    #"
!   "&& reload_completed
!    && register_operand (operands[5], <MODE>mode)
!    && !rtx_equal_p (operands[0], operands[5])"
!   {
!     emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[4],
! 					     operands[5], operands[1]));
!     operands[5] = operands[4] = operands[0];
!   }
!   [(set_attr "movprfx" "yes")]
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Dot product
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - SDOT
! ;; - SUDOT   (I8MM)
! ;; - UDOT
! ;; - USDOT   (I8MM)
! ;; -------------------------------------------------------------------------
! 
! ;; Four-element integer dot-product with accumulation.
! (define_insn "<sur>dot_prod<vsi2qi>"
!   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w, ?&w")
! 	(plus:SVE_FULL_SDI
! 	  (unspec:SVE_FULL_SDI
! 	    [(match_operand:<VSI2QI> 1 "register_operand" "w, w")
! 	     (match_operand:<VSI2QI> 2 "register_operand" "w, w")]
! 	    DOTPROD)
! 	  (match_operand:SVE_FULL_SDI 3 "register_operand" "0, w")))]
    "TARGET_SVE"
!   "@
!    <sur>dot\\t%0.<Vetype>, %1.<Vetype_fourth>, %2.<Vetype_fourth>
!    movprfx\t%0, %3\;<sur>dot\\t%0.<Vetype>, %1.<Vetype_fourth>, %2.<Vetype_fourth>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Four-element integer dot-product by selected lanes with accumulation.
! (define_insn "@aarch64_<sur>dot_prod_lane<vsi2qi>"
!   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w, ?&w")
! 	(plus:SVE_FULL_SDI
! 	  (unspec:SVE_FULL_SDI
! 	    [(match_operand:<VSI2QI> 1 "register_operand" "w, w")
! 	     (unspec:<VSI2QI>
! 	       [(match_operand:<VSI2QI> 2 "register_operand" "<sve_lane_con>, <sve_lane_con>")
! 		(match_operand:SI 3 "const_int_operand")]
! 	       UNSPEC_SVE_LANE_SELECT)]
! 	    DOTPROD)
! 	  (match_operand:SVE_FULL_SDI 4 "register_operand" "0, w")))]
    "TARGET_SVE"
    "@
!    <sur>dot\\t%0.<Vetype>, %1.<Vetype_fourth>, %2.<Vetype_fourth>[%3]
!    movprfx\t%0, %4\;<sur>dot\\t%0.<Vetype>, %1.<Vetype_fourth>, %2.<Vetype_fourth>[%3]"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! (define_insn "@aarch64_<sur>dot_prod<vsi2qi>"
!   [(set (match_operand:VNx4SI_ONLY 0 "register_operand" "=w, ?&w")
!         (plus:VNx4SI_ONLY
! 	  (unspec:VNx4SI_ONLY
! 	    [(match_operand:<VSI2QI> 1 "register_operand" "w, w")
! 	     (match_operand:<VSI2QI> 2 "register_operand" "w, w")]
! 	    DOTPROD_US_ONLY)
! 	  (match_operand:VNx4SI_ONLY 3 "register_operand" "0, w")))]
!   "TARGET_SVE_I8MM"
!   "@
!    <sur>dot\\t%0.s, %1.b, %2.b
!    movprfx\t%0, %3\;<sur>dot\\t%0.s, %1.b, %2.b"
!    [(set_attr "movprfx" "*,yes")]
! )
! 
! (define_insn "@aarch64_<sur>dot_prod_lane<vsi2qi>"
!   [(set (match_operand:VNx4SI_ONLY 0 "register_operand" "=w, ?&w")
! 	(plus:VNx4SI_ONLY
! 	  (unspec:VNx4SI_ONLY
! 	    [(match_operand:<VSI2QI> 1 "register_operand" "w, w")
! 	     (unspec:<VSI2QI>
! 	       [(match_operand:<VSI2QI> 2 "register_operand" "y, y")
! 		(match_operand:SI 3 "const_int_operand")]
! 	       UNSPEC_SVE_LANE_SELECT)]
! 	    DOTPROD_I8MM)
! 	  (match_operand:VNx4SI_ONLY 4 "register_operand" "0, w")))]
!   "TARGET_SVE_I8MM"
!   "@
!    <sur>dot\\t%0.s, %1.b, %2.b[%3]
!    movprfx\t%0, %4\;<sur>dot\\t%0.s, %1.b, %2.b[%3]"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Sum of absolute differences
! ;; -------------------------------------------------------------------------
! ;; The patterns in this section are synthetic.
! ;; -------------------------------------------------------------------------
! 
! ;; Emit a sequence to produce a sum-of-absolute-differences of the inputs in
! ;; operands 1 and 2.  The sequence also has to perform a widening reduction of
! ;; the difference into a vector and accumulate that into operand 3 before
! ;; copying that into the result operand 0.
! ;; Perform that with a sequence of:
! ;; MOV		ones.b, #1
! ;; [SU]ABD	diff.b, p0/m, op1.b, op2.b
! ;; MOVPRFX	op0, op3	// If necessary
! ;; UDOT		op0.s, diff.b, ones.b
! (define_expand "<sur>sad<vsi2qi>"
!   [(use (match_operand:SVE_FULL_SDI 0 "register_operand"))
!    (unspec:<VSI2QI> [(use (match_operand:<VSI2QI> 1 "register_operand"))
! 		    (use (match_operand:<VSI2QI> 2 "register_operand"))] ABAL)
!    (use (match_operand:SVE_FULL_SDI 3 "register_operand"))]
    "TARGET_SVE"
+   {
+     rtx ones = force_reg (<VSI2QI>mode, CONST1_RTX (<VSI2QI>mode));
+     rtx diff = gen_reg_rtx (<VSI2QI>mode);
+     emit_insn (gen_<sur>abd<vsi2qi>_3 (diff, operands[1], operands[2]));
+     emit_insn (gen_udot_prod<vsi2qi> (operands[0], diff, ones, operands[3]));
+     DONE;
+   }
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Matrix multiply-accumulate
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SMMLA (I8MM)
+ ;; - UMMLA (I8MM)
+ ;; - USMMLA (I8MM)
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_add_<optab><vsi2qi>"
+   [(set (match_operand:VNx4SI_ONLY 0 "register_operand" "=w, ?&w")
+ 	(plus:VNx4SI_ONLY
+ 	  (unspec:VNx4SI_ONLY
+ 	    [(match_operand:<VSI2QI> 2 "register_operand" "w, w")
+ 	     (match_operand:<VSI2QI> 3 "register_operand" "w, w")]
+ 	    MATMUL)
+ 	  (match_operand:VNx4SI_ONLY 1 "register_operand" "0, w")))]
+   "TARGET_SVE_I8MM"
    "@
!    <sur>mmla\\t%0.s, %2.b, %3.b
!    movprfx\t%0, %1\;<sur>mmla\\t%0.s, %2.b, %3.b"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] General ternary arithmetic corresponding to unspecs
! ;; -------------------------------------------------------------------------
! ;; Includes merging patterns for:
! ;; - FMAD
! ;; - FMLA
! ;; - FMLS
! ;; - FMSB
! ;; - FNMAD
! ;; - FNMLA
! ;; - FNMLS
! ;; - FNMSB
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated floating-point ternary operations.
! (define_expand "<optab><mode>4"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_dup 4)
! 	   (const_int SVE_RELAXED_GP)
! 	   (match_operand:SVE_FULL_F 1 "register_operand")
! 	   (match_operand:SVE_FULL_F 2 "register_operand")
! 	   (match_operand:SVE_FULL_F 3 "register_operand")]
! 	  SVE_COND_FP_TERNARY))]
    "TARGET_SVE"
!   {
!     operands[4] = aarch64_ptrue_reg (<VPRED>mode);
!   }
  )
  
! ;; Predicated floating-point ternary operations.
! (define_insn "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (match_operand:SI 5 "aarch64_sve_gp_strictness")
! 	   (match_operand:SVE_FULL_F 2 "register_operand" "%w, 0, w")
! 	   (match_operand:SVE_FULL_F 3 "register_operand" "w, w, w")
! 	   (match_operand:SVE_FULL_F 4 "register_operand" "0, w, w")]
! 	  SVE_COND_FP_TERNARY))]
    "TARGET_SVE"
!   "@
!    <sve_fmla_op>\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    <sve_fmad_op>\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    movprfx\t%0, %4\;<sve_fmla_op>\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Predicated floating-point ternary operations with merging.
! (define_expand "@cond_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (unspec:SVE_FULL_F
! 	     [(match_dup 1)
! 	      (const_int SVE_STRICT_GP)
! 	      (match_operand:SVE_FULL_F 2 "register_operand")
! 	      (match_operand:SVE_FULL_F 3 "register_operand")
! 	      (match_operand:SVE_FULL_F 4 "register_operand")]
! 	     SVE_COND_FP_TERNARY)
! 	   (match_operand:SVE_FULL_F 5 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
! {
!   /* Swap the multiplication operands if the fallback value is the
!      second of the two.  */
!   if (rtx_equal_p (operands[3], operands[5]))
!     std::swap (operands[2], operands[3]);
! })
! 
! ;; Predicated floating-point ternary operations, merging with the
! ;; first input.
! (define_insn_and_rewrite "*cond_<optab><mode>_2"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 5)
! 	      (match_operand:SI 6 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "0, w")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "w, w")
! 	      (match_operand:SVE_FULL_F 4 "register_operand" "w, w")]
! 	     SVE_COND_FP_TERNARY)
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && aarch64_sve_pred_dominates_p (&operands[5], operands[1])"
!   "@
!    <sve_fmad_op>\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    movprfx\t%0, %2\;<sve_fmad_op>\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>"
!   "&& !rtx_equal_p (operands[1], operands[5])"
!   {
!     operands[5] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated floating-point ternary operations, merging with the
! ;; third input.
! (define_insn_and_rewrite "*cond_<optab><mode>_4"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 5)
! 	      (match_operand:SI 6 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "w, w")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "w, w")
! 	      (match_operand:SVE_FULL_F 4 "register_operand" "0, w")]
! 	     SVE_COND_FP_TERNARY)
! 	   (match_dup 4)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && aarch64_sve_pred_dominates_p (&operands[5], operands[1])"
!   "@
!    <sve_fmla_op>\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %4\;<sve_fmla_op>\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>"
!   "&& !rtx_equal_p (operands[1], operands[5])"
!   {
!     operands[5] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated floating-point ternary operations, merging with an
! ;; independent value.
! (define_insn_and_rewrite "*cond_<optab><mode>_any"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=&w, &w, &w, &w, &w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 6)
! 	      (match_operand:SI 7 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "w, w, 0, w, w, w")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "w, w, w, 0, w, w")
! 	      (match_operand:SVE_FULL_F 4 "register_operand" "w, 0, w, w, w, w")]
! 	     SVE_COND_FP_TERNARY)
! 	   (match_operand:SVE_FULL_F 5 "aarch64_simd_reg_or_zero" "Dz, Dz, Dz, Dz, 0, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[2], operands[5])
!    && !rtx_equal_p (operands[3], operands[5])
!    && !rtx_equal_p (operands[4], operands[5])
!    && aarch64_sve_pred_dominates_p (&operands[6], operands[1])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %4.<Vetype>\;<sve_fmla_op>\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_fmla_op>\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_fmad_op>\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_fmad_op>\t%0.<Vetype>, %1/m, %2.<Vetype>, %4.<Vetype>
!    movprfx\t%0.<Vetype>, %1/m, %4.<Vetype>\;<sve_fmla_op>\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    #"
    "&& 1"
!   {
!     if (reload_completed
!         && register_operand (operands[5], <MODE>mode)
!         && !rtx_equal_p (operands[0], operands[5]))
!       {
! 	emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[4],
! 						 operands[5], operands[1]));
! 	operands[5] = operands[4] = operands[0];
!       }
!     else if (!rtx_equal_p (operands[1], operands[6]))
!       operands[6] = copy_rtx (operands[1]);
!     else
!       FAIL;
!   }
!   [(set_attr "movprfx" "yes")]
  )
  
! ;; Unpredicated FMLA and FMLS by selected lanes.  It doesn't seem worth using
! ;; (fma ...) since target-independent code won't understand the indexing.
! (define_insn "@aarch64_<optab>_lane_<mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:SVE_FULL_F 1 "register_operand" "w, w")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand:SVE_FULL_F 2 "register_operand" "<sve_lane_con>, <sve_lane_con>")
! 	      (match_operand:SI 3 "const_int_operand")]
! 	     UNSPEC_SVE_LANE_SELECT)
! 	   (match_operand:SVE_FULL_F 4 "register_operand" "0, w")]
! 	  SVE_FP_TERNARY_LANE))]
    "TARGET_SVE"
    "@
!    <sve_fp_op>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>[%3]
!    movprfx\t%0, %4\;<sve_fp_op>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>[%3]"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Complex multiply-add
! ;; -------------------------------------------------------------------------
! ;; Includes merging patterns for:
! ;; - FCMLA
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated FCMLA.
! (define_insn "@aarch64_pred_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (match_operand:SI 5 "aarch64_sve_gp_strictness")
! 	   (match_operand:SVE_FULL_F 2 "register_operand" "w, w")
! 	   (match_operand:SVE_FULL_F 3 "register_operand" "w, w")
! 	   (match_operand:SVE_FULL_F 4 "register_operand" "0, w")]
! 	  SVE_COND_FCMLA))]
    "TARGET_SVE"
!   "@
!    fcmla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>, #<rot>
!    movprfx\t%0, %4\;fcmla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>, #<rot>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated FCMLA with merging.
! (define_expand "@cond_<optab><mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (unspec:SVE_FULL_F
! 	     [(match_dup 1)
! 	      (const_int SVE_STRICT_GP)
! 	      (match_operand:SVE_FULL_F 2 "register_operand")
! 	      (match_operand:SVE_FULL_F 3 "register_operand")
! 	      (match_operand:SVE_FULL_F 4 "register_operand")]
! 	     SVE_COND_FCMLA)
! 	   (match_operand:SVE_FULL_F 5 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
! )
! 
! ;; Predicated FCMLA, merging with the third input.
! (define_insn_and_rewrite "*cond_<optab><mode>_4"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 5)
! 	      (match_operand:SI 6 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "w, w")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "w, w")
! 	      (match_operand:SVE_FULL_F 4 "register_operand" "0, w")]
! 	     SVE_COND_FCMLA)
! 	   (match_dup 4)]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && aarch64_sve_pred_dominates_p (&operands[5], operands[1])"
!   "@
!    fcmla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>, #<rot>
!    movprfx\t%0, %4\;fcmla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>, #<rot>"
!   "&& !rtx_equal_p (operands[1], operands[5])"
!   {
!     operands[5] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; Predicated FCMLA, merging with an independent value.
! (define_insn_and_rewrite "*cond_<optab><mode>_any"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=&w, &w, &w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 6)
! 	      (match_operand:SI 7 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "w, w, w, w")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "w, w, w, w")
! 	      (match_operand:SVE_FULL_F 4 "register_operand" "w, 0, w, w")]
! 	     SVE_COND_FCMLA)
! 	   (match_operand:SVE_FULL_F 5 "aarch64_simd_reg_or_zero" "Dz, Dz, 0, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[4], operands[5])
!    && aarch64_sve_pred_dominates_p (&operands[6], operands[1])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %4.<Vetype>\;fcmla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>, #<rot>
!    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;fcmla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>, #<rot>
!    movprfx\t%0.<Vetype>, %1/m, %4.<Vetype>\;fcmla\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>, #<rot>
!    #"
!   "&& 1"
!   {
!     if (reload_completed
!         && register_operand (operands[5], <MODE>mode)
!         && !rtx_equal_p (operands[0], operands[5]))
!       {
! 	emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[4],
! 						 operands[5], operands[1]));
! 	operands[5] = operands[4] = operands[0];
!       }
!     else if (!rtx_equal_p (operands[1], operands[6]))
!       operands[6] = copy_rtx (operands[1]);
!     else
!       FAIL;
!   }
!   [(set_attr "movprfx" "yes")]
! )
! 
! ;; Unpredicated FCMLA with indexing.
! (define_insn "@aarch64_<optab>_lane_<mode>"
!   [(set (match_operand:SVE_FULL_HSF 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_HSF
! 	  [(match_operand:SVE_FULL_HSF 1 "register_operand" "w, w")
! 	   (unspec:SVE_FULL_HSF
! 	     [(match_operand:SVE_FULL_HSF 2 "register_operand" "<sve_lane_pair_con>, <sve_lane_pair_con>")
! 	      (match_operand:SI 3 "const_int_operand")]
! 	     UNSPEC_SVE_LANE_SELECT)
! 	   (match_operand:SVE_FULL_HSF 4 "register_operand" "0, w")]
! 	  FCMLA))]
    "TARGET_SVE"
    "@
!    fcmla\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>[%3], #<rot>
!    movprfx\t%0, %4\;fcmla\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>[%3], #<rot>"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Trigonometric multiply-add
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FTMAD
! ;; -------------------------------------------------------------------------
! 
! (define_insn "@aarch64_sve_tmad<mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:SVE_FULL_F 1 "register_operand" "0, w")
! 	   (match_operand:SVE_FULL_F 2 "register_operand" "w, w")
! 	   (match_operand:DI 3 "const_int_operand")]
! 	  UNSPEC_FTMAD))]
!   "TARGET_SVE"
!   "@
!    ftmad\t%0.<Vetype>, %0.<Vetype>, %2.<Vetype>, #%3
!    movprfx\t%0, %1\;ftmad\t%0.<Vetype>, %0.<Vetype>, %2.<Vetype>, #%3"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Bfloat16 long ternary arithmetic (SF,BF,BF)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - BFDOT (BF16)
! ;; - BFMLALB (BF16)
! ;; - BFMLALT (BF16)
! ;; - BFMMLA (BF16)
! ;; -------------------------------------------------------------------------
! 
! (define_insn "@aarch64_sve_<sve_fp_op>vnx4sf"
!   [(set (match_operand:VNx4SF 0 "register_operand" "=w, ?&w")
! 	(unspec:VNx4SF
! 	  [(match_operand:VNx4SF 1 "register_operand" "0, w")
! 	   (match_operand:VNx8BF 2 "register_operand" "w, w")
! 	   (match_operand:VNx8BF 3 "register_operand" "w, w")]
! 	  SVE_BFLOAT_TERNARY_LONG))]
!   "TARGET_SVE_BF16"
!   "@
!    <sve_fp_op>\t%0.s, %2.h, %3.h
!    movprfx\t%0, %1\;<sve_fp_op>\t%0.s, %2.h, %3.h"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; The immediate range is enforced before generating the instruction.
! (define_insn "@aarch64_sve_<sve_fp_op>_lanevnx4sf"
!   [(set (match_operand:VNx4SF 0 "register_operand" "=w, ?&w")
! 	(unspec:VNx4SF
! 	  [(match_operand:VNx4SF 1 "register_operand" "0, w")
! 	   (match_operand:VNx8BF 2 "register_operand" "w, w")
! 	   (match_operand:VNx8BF 3 "register_operand" "y, y")
! 	   (match_operand:SI 4 "const_int_operand")]
! 	  SVE_BFLOAT_TERNARY_LONG_LANE))]
!   "TARGET_SVE_BF16"
!   "@
!    <sve_fp_op>\t%0.s, %2.h, %3.h[%4]
!    movprfx\t%0, %1\;<sve_fp_op>\t%0.s, %2.h, %3.h[%4]"
!   [(set_attr "movprfx" "*,yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Matrix multiply-accumulate
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FMMLA (F32MM,F64MM)
! ;; -------------------------------------------------------------------------
! 
! ;; The mode iterator enforces the target requirements.
! (define_insn "@aarch64_sve_<sve_fp_op><mode>"
!   [(set (match_operand:SVE_MATMULF 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_MATMULF
! 	  [(match_operand:SVE_MATMULF 2 "register_operand" "w, w")
! 	   (match_operand:SVE_MATMULF 3 "register_operand" "w, w")
! 	   (match_operand:SVE_MATMULF 1 "register_operand" "0, w")]
! 	  FMMLA))]
!   "TARGET_SVE"
!   "@
!    <sve_fp_op>\\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %1\;<sve_fp_op>\\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
+ ;; =========================================================================
+ ;; == Comparisons and selects
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT,FP] Select based on predicates
+ ;; -------------------------------------------------------------------------
+ ;; Includes merging patterns for:
+ ;; - FMOV
+ ;; - MOV
+ ;; - SEL
+ ;; -------------------------------------------------------------------------
+ 
  ;; vcond_mask operand order: true, false, mask
  ;; UNSPEC_SEL operand order: mask, true, false (as for VEC_COND_EXPR)
  ;; SEL operand order:        mask, true, false
! (define_expand "@vcond_mask_<mode><vpred>"
!   [(set (match_operand:SVE_FULL 0 "register_operand")
! 	(unspec:SVE_FULL
! 	  [(match_operand:<VPRED> 3 "register_operand")
! 	   (match_operand:SVE_FULL 1 "aarch64_sve_reg_or_dup_imm")
! 	   (match_operand:SVE_FULL 2 "aarch64_simd_reg_or_zero")]
  	  UNSPEC_SEL))]
    "TARGET_SVE"
!   {
!     if (register_operand (operands[1], <MODE>mode))
!       operands[2] = force_reg (<MODE>mode, operands[2]);
!   }
  )
  
! ;; Selects between:
! ;; - two registers
! ;; - a duplicated immediate and a register
! ;; - a duplicated immediate and zero
! (define_insn "*vcond_mask_<mode><vpred>"
!   [(set (match_operand:SVE_FULL 0 "register_operand" "=w, w, w, w, ?w, ?&w, ?&w")
! 	(unspec:SVE_FULL
! 	  [(match_operand:<VPRED> 3 "register_operand" "Upa, Upa, Upa, Upa, Upl, Upl, Upl")
! 	   (match_operand:SVE_FULL 1 "aarch64_sve_reg_or_dup_imm" "w, vss, vss, Ufc, Ufc, vss, Ufc")
! 	   (match_operand:SVE_FULL 2 "aarch64_simd_reg_or_zero" "w, 0, Dz, 0, Dz, w, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && (!register_operand (operands[1], <MODE>mode)
!        || register_operand (operands[2], <MODE>mode))"
!   "@
!    sel\t%0.<Vetype>, %3, %1.<Vetype>, %2.<Vetype>
!    mov\t%0.<Vetype>, %3/m, #%I1
!    mov\t%0.<Vetype>, %3/z, #%I1
!    fmov\t%0.<Vetype>, %3/m, #%1
!    movprfx\t%0.<Vetype>, %3/z, %0.<Vetype>\;fmov\t%0.<Vetype>, %3/m, #%1
!    movprfx\t%0, %2\;mov\t%0.<Vetype>, %3/m, #%I1
!    movprfx\t%0, %2\;fmov\t%0.<Vetype>, %3/m, #%1"
!   [(set_attr "movprfx" "*,*,*,*,yes,yes,yes")]
! )
! 
! ;; Optimize selects between a duplicated scalar variable and another vector,
! ;; the latter of which can be a zero constant or a variable.  Treat duplicates
! ;; of GPRs as being more expensive than duplicates of FPRs, since they
! ;; involve a cross-file move.
! (define_insn "@aarch64_sel_dup<mode>"
!   [(set (match_operand:SVE_FULL 0 "register_operand" "=?w, w, ??w, ?&w, ??&w, ?&w")
! 	(unspec:SVE_FULL
! 	  [(match_operand:<VPRED> 3 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
! 	   (vec_duplicate:SVE_FULL
! 	     (match_operand:<VEL> 1 "register_operand" "r, w, r, w, r, w"))
! 	   (match_operand:SVE_FULL 2 "aarch64_simd_reg_or_zero" "0, 0, Dz, Dz, w, w")]
  	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "@
!    mov\t%0.<Vetype>, %3/m, %<vwcore>1
!    mov\t%0.<Vetype>, %3/m, %<Vetype>1
!    movprfx\t%0.<Vetype>, %3/z, %0.<Vetype>\;mov\t%0.<Vetype>, %3/m, %<vwcore>1
!    movprfx\t%0.<Vetype>, %3/z, %0.<Vetype>\;mov\t%0.<Vetype>, %3/m, %<Vetype>1
!    movprfx\t%0, %2\;mov\t%0.<Vetype>, %3/m, %<vwcore>1
!    movprfx\t%0, %2\;mov\t%0.<Vetype>, %3/m, %<Vetype>1"
!   [(set_attr "movprfx" "*,*,yes,yes,yes,yes")]
  )
  
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT,FP] Compare and select
+ ;; -------------------------------------------------------------------------
+ ;; The patterns in this section are synthetic.
+ ;; -------------------------------------------------------------------------
+ 
  ;; Integer (signed) vcond.  Don't enforce an immediate range here, since it
  ;; depends on the comparison; leave it to aarch64_expand_sve_vcond instead.
  (define_expand "vcond<mode><v_int_equiv>"
!   [(set (match_operand:SVE_FULL 0 "register_operand")
! 	(if_then_else:SVE_FULL
  	  (match_operator 3 "comparison_operator"
  	    [(match_operand:<V_INT_EQUIV> 4 "register_operand")
  	     (match_operand:<V_INT_EQUIV> 5 "nonmemory_operand")])
! 	  (match_operand:SVE_FULL 1 "nonmemory_operand")
! 	  (match_operand:SVE_FULL 2 "nonmemory_operand")))]
    "TARGET_SVE"
    {
      aarch64_expand_sve_vcond (<MODE>mode, <V_INT_EQUIV>mode, operands);
***************
*** 1647,1659 ****
  ;; Integer vcondu.  Don't enforce an immediate range here, since it
  ;; depends on the comparison; leave it to aarch64_expand_sve_vcond instead.
  (define_expand "vcondu<mode><v_int_equiv>"
!   [(set (match_operand:SVE_ALL 0 "register_operand")
! 	(if_then_else:SVE_ALL
  	  (match_operator 3 "comparison_operator"
  	    [(match_operand:<V_INT_EQUIV> 4 "register_operand")
  	     (match_operand:<V_INT_EQUIV> 5 "nonmemory_operand")])
! 	  (match_operand:SVE_ALL 1 "register_operand")
! 	  (match_operand:SVE_ALL 2 "register_operand")))]
    "TARGET_SVE"
    {
      aarch64_expand_sve_vcond (<MODE>mode, <V_INT_EQUIV>mode, operands);
--- 6809,6821 ----
  ;; Integer vcondu.  Don't enforce an immediate range here, since it
  ;; depends on the comparison; leave it to aarch64_expand_sve_vcond instead.
  (define_expand "vcondu<mode><v_int_equiv>"
!   [(set (match_operand:SVE_FULL 0 "register_operand")
! 	(if_then_else:SVE_FULL
  	  (match_operator 3 "comparison_operator"
  	    [(match_operand:<V_INT_EQUIV> 4 "register_operand")
  	     (match_operand:<V_INT_EQUIV> 5 "nonmemory_operand")])
! 	  (match_operand:SVE_FULL 1 "nonmemory_operand")
! 	  (match_operand:SVE_FULL 2 "nonmemory_operand")))]
    "TARGET_SVE"
    {
      aarch64_expand_sve_vcond (<MODE>mode, <V_INT_EQUIV>mode, operands);
***************
*** 1661,1677 ****
    }
  )
  
! ;; Floating-point vcond.  All comparisons except FCMUO allow a zero
! ;; operand; aarch64_expand_sve_vcond handles the case of an FCMUO
! ;; with zero.
  (define_expand "vcond<mode><v_fp_equiv>"
!   [(set (match_operand:SVE_SD 0 "register_operand")
! 	(if_then_else:SVE_SD
  	  (match_operator 3 "comparison_operator"
  	    [(match_operand:<V_FP_EQUIV> 4 "register_operand")
  	     (match_operand:<V_FP_EQUIV> 5 "aarch64_simd_reg_or_zero")])
! 	  (match_operand:SVE_SD 1 "register_operand")
! 	  (match_operand:SVE_SD 2 "register_operand")))]
    "TARGET_SVE"
    {
      aarch64_expand_sve_vcond (<MODE>mode, <V_FP_EQUIV>mode, operands);
--- 6823,6838 ----
    }
  )
  
! ;; Floating-point vcond.  All comparisons except FCMUO allow a zero operand;
! ;; aarch64_expand_sve_vcond handles the case of an FCMUO with zero.
  (define_expand "vcond<mode><v_fp_equiv>"
!   [(set (match_operand:SVE_FULL_HSD 0 "register_operand")
! 	(if_then_else:SVE_FULL_HSD
  	  (match_operator 3 "comparison_operator"
  	    [(match_operand:<V_FP_EQUIV> 4 "register_operand")
  	     (match_operand:<V_FP_EQUIV> 5 "aarch64_simd_reg_or_zero")])
! 	  (match_operand:SVE_FULL_HSD 1 "nonmemory_operand")
! 	  (match_operand:SVE_FULL_HSD 2 "nonmemory_operand")))]
    "TARGET_SVE"
    {
      aarch64_expand_sve_vcond (<MODE>mode, <V_FP_EQUIV>mode, operands);
***************
*** 1679,1684 ****
--- 6840,6861 ----
    }
  )
  
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Comparisons
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - CMPEQ
+ ;; - CMPGE
+ ;; - CMPGT
+ ;; - CMPHI
+ ;; - CMPHS
+ ;; - CMPLE
+ ;; - CMPLO
+ ;; - CMPLS
+ ;; - CMPLT
+ ;; - CMPNE
+ ;; -------------------------------------------------------------------------
+ 
  ;; Signed integer comparisons.  Don't enforce an immediate range here, since
  ;; it depends on the comparison; leave it to aarch64_expand_sve_vec_cmp_int
  ;; instead.
***************
*** 1686,1694 ****
    [(parallel
      [(set (match_operand:<VPRED> 0 "register_operand")
  	  (match_operator:<VPRED> 1 "comparison_operator"
! 	    [(match_operand:SVE_I 2 "register_operand")
! 	     (match_operand:SVE_I 3 "nonmemory_operand")]))
!      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_SVE"
    {
      aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
--- 6863,6871 ----
    [(parallel
      [(set (match_operand:<VPRED> 0 "register_operand")
  	  (match_operator:<VPRED> 1 "comparison_operator"
! 	    [(match_operand:SVE_FULL_I 2 "register_operand")
! 	     (match_operand:SVE_FULL_I 3 "nonmemory_operand")]))
!      (clobber (reg:CC_NZC CC_REGNUM))])]
    "TARGET_SVE"
    {
      aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
***************
*** 1704,1712 ****
    [(parallel
      [(set (match_operand:<VPRED> 0 "register_operand")
  	  (match_operator:<VPRED> 1 "comparison_operator"
! 	    [(match_operand:SVE_I 2 "register_operand")
! 	     (match_operand:SVE_I 3 "nonmemory_operand")]))
!      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_SVE"
    {
      aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
--- 6881,6889 ----
    [(parallel
      [(set (match_operand:<VPRED> 0 "register_operand")
  	  (match_operator:<VPRED> 1 "comparison_operator"
! 	    [(match_operand:SVE_FULL_I 2 "register_operand")
! 	     (match_operand:SVE_FULL_I 3 "nonmemory_operand")]))
!      (clobber (reg:CC_NZC CC_REGNUM))])]
    "TARGET_SVE"
    {
      aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
***************
*** 1715,3134 ****
    }
  )
  
! ;; Floating-point comparisons.  All comparisons except FCMUO allow a zero
! ;; operand; aarch64_expand_sve_vec_cmp_float handles the case of an FCMUO
! ;; with zero.
! (define_expand "vec_cmp<mode><vpred>"
!   [(set (match_operand:<VPRED> 0 "register_operand")
! 	(match_operator:<VPRED> 1 "comparison_operator"
! 	  [(match_operand:SVE_F 2 "register_operand")
! 	   (match_operand:SVE_F 3 "aarch64_simd_reg_or_zero")]))]
    "TARGET_SVE"
!   {
!     aarch64_expand_sve_vec_cmp_float (operands[0], GET_CODE (operands[1]),
! 				      operands[2], operands[3], false);
!     DONE;
!   }
  )
  
! ;; Branch based on predicate equality or inequality.
! (define_expand "cbranch<mode>4"
!   [(set (pc)
! 	(if_then_else
! 	  (match_operator 0 "aarch64_equality_operator"
! 	    [(match_operand:PRED_ALL 1 "register_operand")
! 	     (match_operand:PRED_ALL 2 "aarch64_simd_reg_or_zero")])
! 	  (label_ref (match_operand 3 ""))
! 	  (pc)))]
!   ""
    {
!     rtx ptrue = force_reg (<MODE>mode, CONSTM1_RTX (<MODE>mode));
!     rtx pred;
!     if (operands[2] == CONST0_RTX (<MODE>mode))
!       pred = operands[1];
!     else
!       {
! 	pred = gen_reg_rtx (<MODE>mode);
! 	emit_insn (gen_pred_xor<mode>3 (pred, ptrue, operands[1],
! 					operands[2]));
!       }
!     emit_insn (gen_ptest_ptrue<mode> (ptrue, pred));
!     operands[1] = gen_rtx_REG (CCmode, CC_REGNUM);
!     operands[2] = const0_rtx;
    }
  )
  
! ;; Unpredicated integer MIN/MAX.
! (define_expand "<su><maxmin><mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand")
! 	(unspec:SVE_I
! 	  [(match_dup 3)
! 	   (MAXMIN:SVE_I (match_operand:SVE_I 1 "register_operand")
! 			 (match_operand:SVE_I 2 "register_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
!   "TARGET_SVE"
    {
!     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Integer MIN/MAX predicated with a PTRUE.
! (define_insn "*<su><maxmin><mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (MAXMIN:SVE_I (match_operand:SVE_I 2 "register_operand" "%0, w")
! 			 (match_operand:SVE_I 3 "register_operand" "w, w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "@
!    <su><maxmin>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<su><maxmin>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Unpredicated floating-point MIN/MAX.
! (define_expand "<su><maxmin><mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_dup 3)
! 	   (FMAXMIN:SVE_F (match_operand:SVE_F 1 "register_operand")
! 			  (match_operand:SVE_F 2 "register_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   {
!     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
!   }
  )
  
! ;; Floating-point MIN/MAX predicated with a PTRUE.
! (define_insn "*<su><maxmin><mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (FMAXMIN:SVE_F (match_operand:SVE_F 2 "register_operand" "%0, w")
! 			  (match_operand:SVE_F 3 "register_operand" "w, w"))]
! 	  UNSPEC_MERGE_PTRUE))]
!   "TARGET_SVE"
!   "@
!    f<maxmin>nm\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;f<maxmin>nm\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Unpredicated fmin/fmax.
! (define_expand "<maxmin_uns><mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_dup 3)
! 	   (unspec:SVE_F [(match_operand:SVE_F 1 "register_operand")
! 			  (match_operand:SVE_F 2 "register_operand")]
! 			 FMAXMIN_UNS)]
! 	  UNSPEC_MERGE_PTRUE))]
!   "TARGET_SVE"
!   {
!     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
!   }
  )
  
! ;; fmin/fmax predicated with a PTRUE.
! (define_insn "*<maxmin_uns><mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_F [(match_operand:SVE_F 2 "register_operand" "%0, w")
! 			  (match_operand:SVE_F 3 "register_operand" "w, w")]
! 			 FMAXMIN_UNS)]
! 	  UNSPEC_MERGE_PTRUE))]
!   "TARGET_SVE"
!   "@
!    <maxmin_uns_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<maxmin_uns_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
! )
  
! ;; Predicated integer operations with select.
! (define_expand "cond_<optab><mode>"
!   [(set (match_operand:SVE_I 0 "register_operand")
! 	(unspec:SVE_I
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (SVE_INT_BINARY:SVE_I
! 	     (match_operand:SVE_I 2 "register_operand")
! 	     (match_operand:SVE_I 3 "register_operand"))
! 	   (match_operand:SVE_I 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
  )
  
! (define_expand "cond_<optab><mode>"
!   [(set (match_operand:SVE_SDI 0 "register_operand")
! 	(unspec:SVE_SDI
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (SVE_INT_BINARY_SD:SVE_SDI
! 	     (match_operand:SVE_SDI 2 "register_operand")
! 	     (match_operand:SVE_SDI 3 "register_operand"))
! 	   (match_operand:SVE_SDI 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
  )
  
! ;; Predicated integer operations with select matching the output operand.
! (define_insn "*cond_<optab><mode>_0"
!   [(set (match_operand:SVE_I 0 "register_operand" "+w, w, ?&w")
! 	(unspec:SVE_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (SVE_INT_BINARY:SVE_I
! 	     (match_operand:SVE_I 2 "register_operand" "0, w, w")
! 	     (match_operand:SVE_I 3 "register_operand" "w, 0, w"))
! 	   (match_dup 0)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "@
!    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    <sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %1/m, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
! (define_insn "*cond_<optab><mode>_0"
!   [(set (match_operand:SVE_SDI 0 "register_operand" "+w, w, ?&w")
! 	(unspec:SVE_SDI
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (SVE_INT_BINARY_SD:SVE_SDI
! 	     (match_operand:SVE_SDI 2 "register_operand" "0, w, w")
! 	     (match_operand:SVE_SDI 3 "register_operand" "w, 0, w"))
! 	   (match_dup 0)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "@
!    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    <sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %1/m, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Predicated integer operations with select matching the first operand.
! (define_insn "*cond_<optab><mode>_2"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_I
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (SVE_INT_BINARY:SVE_I
! 	     (match_operand:SVE_I 2 "register_operand" "0, w")
! 	     (match_operand:SVE_I 3 "register_operand" "w, w"))
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
    "@
!    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! (define_insn "*cond_<optab><mode>_2"
!   [(set (match_operand:SVE_SDI 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_SDI
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (SVE_INT_BINARY_SD:SVE_SDI
! 	     (match_operand:SVE_SDI 2 "register_operand" "0, w")
! 	     (match_operand:SVE_SDI 3 "register_operand" "w, w"))
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "@
!    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated integer operations with select matching the second operand.
! (define_insn "*cond_<optab><mode>_3"
!   [(set (match_operand:SVE_I 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (SVE_INT_BINARY:SVE_I
! 	     (match_operand:SVE_I 2 "register_operand" "w, w")
! 	     (match_operand:SVE_I 3 "register_operand" "0, w"))
! 	   (match_dup 3)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "@
!    <sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %3\;<sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! (define_insn "*cond_<optab><mode>_3"
!   [(set (match_operand:SVE_SDI 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_SDI
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (SVE_INT_BINARY_SD:SVE_SDI
! 	     (match_operand:SVE_SDI 2 "register_operand" "w, w")
! 	     (match_operand:SVE_SDI 3 "register_operand" "0, w"))
! 	   (match_dup 3)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "@
!    <sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %3\;<sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated integer operations with select matching zero.
! (define_insn "*cond_<optab><mode>_z"
!   [(set (match_operand:SVE_I 0 "register_operand" "=&w")
! 	(unspec:SVE_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (SVE_INT_BINARY:SVE_I
! 	     (match_operand:SVE_I 2 "register_operand" "w")
! 	     (match_operand:SVE_I 3 "register_operand" "w"))
! 	   (match_operand:SVE_I 4 "aarch64_simd_imm_zero")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
-   "movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
-   [(set_attr "movprfx" "yes")]
  )
  
! (define_insn "*cond_<optab><mode>_z"
!   [(set (match_operand:SVE_SDI 0 "register_operand" "=&w")
! 	(unspec:SVE_SDI
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (SVE_INT_BINARY_SD:SVE_SDI
! 	     (match_operand:SVE_SDI 2 "register_operand" "w")
! 	     (match_operand:SVE_SDI 3 "register_operand" "w"))
! 	   (match_operand:SVE_SDI 4 "aarch64_simd_imm_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "yes")]
  )
  
! ;; Synthetic predications with select unmatched.
! (define_insn "*cond_<optab><mode>_any"
!   [(set (match_operand:SVE_I 0 "register_operand" "=&w")
! 	(unspec:SVE_I
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (SVE_INT_BINARY:SVE_I
! 	     (match_operand:SVE_I 2 "register_operand" "w")
! 	     (match_operand:SVE_I 3 "register_operand" "w"))
! 	   (match_operand:SVE_I 4 "register_operand"   "w")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "#"
  )
  
! (define_insn "*cond_<optab><mode>_any"
!   [(set (match_operand:SVE_SDI 0 "register_operand" "=&w")
! 	(unspec:SVE_SDI
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (SVE_INT_BINARY_SD:SVE_I
! 	     (match_operand:SVE_SDI 2 "register_operand" "w")
! 	     (match_operand:SVE_SDI 3 "register_operand" "w"))
! 	   (match_operand:SVE_SDI 4 "register_operand"   "w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "#"
  )
  
! (define_split
!   [(set (match_operand:SVE_I 0 "register_operand")
! 	(unspec:SVE_I
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (match_operator:SVE_I 5 "aarch64_sve_any_binary_operator"
! 	     [(match_operand:SVE_I 2 "register_operand")
! 	      (match_operand:SVE_I 3 "register_operand")])
! 	   (match_operand:SVE_I 4 "register_operand")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && reload_completed
!    && !(rtx_equal_p (operands[0], operands[4])
!         || rtx_equal_p (operands[2], operands[4])
!         || rtx_equal_p (operands[3], operands[4]))"
!   ; Not matchable by any one insn or movprfx insn.  We need a separate select.
!   [(set (match_dup 0)
! 	(unspec:SVE_I [(match_dup 1) (match_dup 2) (match_dup 4)]
!                       UNSPEC_SEL))
!    (set (match_dup 0)
! 	(unspec:SVE_I
! 	  [(match_dup 1)
! 	   (match_op_dup 5 [(match_dup 0) (match_dup 3)])
!            (match_dup 0)]
! 	  UNSPEC_SEL))]
  )
  
  ;; Set operand 0 to the last active element in operand 3, or to tied
  ;; operand 1 if no elements are active.
! (define_insn "fold_extract_last_<mode>"
!   [(set (match_operand:<VEL> 0 "register_operand" "=r, w")
  	(unspec:<VEL>
  	  [(match_operand:<VEL> 1 "register_operand" "0, 0")
  	   (match_operand:<VPRED> 2 "register_operand" "Upl, Upl")
! 	   (match_operand:SVE_ALL 3 "register_operand" "w, w")]
! 	  UNSPEC_CLASTB))]
    "TARGET_SVE"
    "@
!    clastb\t%<vwcore>0, %2, %<vwcore>0, %3.<Vetype>
!    clastb\t%<vw>0, %2, %<vw>0, %3.<Vetype>"
  )
  
  ;; Unpredicated integer add reduction.
  (define_expand "reduc_plus_scal_<mode>"
!   [(set (match_operand:<VEL> 0 "register_operand")
! 	(unspec:<VEL> [(match_dup 2)
! 		       (match_operand:SVE_I 1 "register_operand")]
! 		      UNSPEC_ADDV))]
    "TARGET_SVE"
    {
!     operands[2] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
  ;; Predicated integer add reduction.  The result is always 64-bits.
! (define_insn "*reduc_plus_scal_<mode>"
!   [(set (match_operand:<VEL> 0 "register_operand" "=w")
! 	(unspec:<VEL> [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 		       (match_operand:SVE_I 2 "register_operand" "w")]
! 		      UNSPEC_ADDV))]
!   "TARGET_SVE"
!   "uaddv\t%d0, %1, %2.<Vetype>"
  )
  
! ;; Unpredicated floating-point add reduction.
! (define_expand "reduc_plus_scal_<mode>"
    [(set (match_operand:<VEL> 0 "register_operand")
  	(unspec:<VEL> [(match_dup 2)
! 		       (match_operand:SVE_F 1 "register_operand")]
! 		      UNSPEC_FADDV))]
    "TARGET_SVE"
    {
!     operands[2] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Predicated floating-point add reduction.
! (define_insn "*reduc_plus_scal_<mode>"
    [(set (match_operand:<VEL> 0 "register_operand" "=w")
  	(unspec:<VEL> [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 		       (match_operand:SVE_F 2 "register_operand" "w")]
! 		      UNSPEC_FADDV))]
    "TARGET_SVE"
!   "faddv\t%<Vetype>0, %1, %2.<Vetype>"
  )
  
! ;; Unpredicated integer MIN/MAX reduction.
! (define_expand "reduc_<maxmin_uns>_scal_<mode>"
    [(set (match_operand:<VEL> 0 "register_operand")
  	(unspec:<VEL> [(match_dup 2)
! 		       (match_operand:SVE_I 1 "register_operand")]
! 		      MAXMINV))]
    "TARGET_SVE"
    {
!     operands[2] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Predicated integer MIN/MAX reduction.
! (define_insn "*reduc_<maxmin_uns>_scal_<mode>"
    [(set (match_operand:<VEL> 0 "register_operand" "=w")
  	(unspec:<VEL> [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 		       (match_operand:SVE_I 2 "register_operand" "w")]
! 		      MAXMINV))]
    "TARGET_SVE"
!   "<maxmin_uns_op>v\t%<Vetype>0, %1, %2.<Vetype>"
  )
  
! ;; Unpredicated floating-point MIN/MAX reduction.
! (define_expand "reduc_<maxmin_uns>_scal_<mode>"
    [(set (match_operand:<VEL> 0 "register_operand")
! 	(unspec:<VEL> [(match_dup 2)
! 		       (match_operand:SVE_F 1 "register_operand")]
! 		      FMAXMINV))]
    "TARGET_SVE"
    {
!     operands[2] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Predicated floating-point MIN/MAX reduction.
! (define_insn "*reduc_<maxmin_uns>_scal_<mode>"
    [(set (match_operand:<VEL> 0 "register_operand" "=w")
! 	(unspec:<VEL> [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 		       (match_operand:SVE_F 2 "register_operand" "w")]
! 		      FMAXMINV))]
    "TARGET_SVE"
!   "<maxmin_uns_op>v\t%<Vetype>0, %1, %2.<Vetype>"
  )
  
! (define_expand "reduc_<optab>_scal_<mode>"
!   [(set (match_operand:<VEL> 0 "register_operand")
! 	(unspec:<VEL> [(match_dup 2)
! 		       (match_operand:SVE_I 1 "register_operand")]
! 		      BITWISEV))]
    "TARGET_SVE"
    {
!     operands[2] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! (define_insn "*reduc_<optab>_scal_<mode>"
!   [(set (match_operand:<VEL> 0 "register_operand" "=w")
! 	(unspec:<VEL> [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 		       (match_operand:SVE_I 2 "register_operand" "w")]
! 		      BITWISEV))]
    "TARGET_SVE"
!   "<bit_reduc_op>\t%<Vetype>0, %1, %2.<Vetype>"
  )
  
! ;; Unpredicated in-order FP reductions.
! (define_expand "fold_left_plus_<mode>"
!   [(set (match_operand:<VEL> 0 "register_operand")
! 	(unspec:<VEL> [(match_dup 3)
! 		       (match_operand:<VEL> 1 "register_operand")
! 		       (match_operand:SVE_F 2 "register_operand")]
! 		      UNSPEC_FADDA))]
    "TARGET_SVE"
    {
!     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; In-order FP reductions predicated with PTRUE.
! (define_insn "*fold_left_plus_<mode>"
!   [(set (match_operand:<VEL> 0 "register_operand" "=w")
! 	(unspec:<VEL> [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 		       (match_operand:<VEL> 2 "register_operand" "0")
! 		       (match_operand:SVE_F 3 "register_operand" "w")]
! 		      UNSPEC_FADDA))]
    "TARGET_SVE"
!   "fadda\t%<Vetype>0, %1, %<Vetype>0, %3.<Vetype>"
  )
  
! ;; Predicated form of the above in-order reduction.
! (define_insn "*pred_fold_left_plus_<mode>"
!   [(set (match_operand:<VEL> 0 "register_operand" "=w")
! 	(unspec:<VEL>
! 	  [(match_operand:<VEL> 1 "register_operand" "0")
! 	   (unspec:SVE_F
! 	     [(match_operand:<VPRED> 2 "register_operand" "Upl")
! 	      (match_operand:SVE_F 3 "register_operand" "w")
! 	      (match_operand:SVE_F 4 "aarch64_simd_imm_zero")]
! 	     UNSPEC_SEL)]
! 	  UNSPEC_FADDA))]
    "TARGET_SVE"
!   "fadda\t%<Vetype>0, %2, %<Vetype>0, %3.<Vetype>"
  )
  
! ;; Unpredicated floating-point addition.
! (define_expand "add<mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_dup 3)
! 	   (plus:SVE_F
! 	     (match_operand:SVE_F 1 "register_operand")
! 	     (match_operand:SVE_F 2 "aarch64_sve_float_arith_with_sub_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Floating-point addition predicated with a PTRUE.
! (define_insn_and_split "*add<mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, w, w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (plus:SVE_F
! 	      (match_operand:SVE_F 2 "register_operand" "%0, 0, w")
! 	      (match_operand:SVE_F 3 "aarch64_sve_float_arith_with_sub_operand" "vsA, vsN, w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "@
!    fadd\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    fsub\t%0.<Vetype>, %1/m, %0.<Vetype>, #%N3
!    #"
!   ; Split the unpredicated form after reload, so that we don't have
!   ; the unnecessary PTRUE.
!   "&& reload_completed
!    && register_operand (operands[3], <MODE>mode)"
!   [(set (match_dup 0) (plus:SVE_F (match_dup 2) (match_dup 3)))]
  )
  
! ;; Unpredicated floating-point subtraction.
! (define_expand "sub<mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_dup 3)
! 	   (minus:SVE_F
! 	     (match_operand:SVE_F 1 "aarch64_sve_float_arith_operand")
! 	     (match_operand:SVE_F 2 "register_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Floating-point subtraction predicated with a PTRUE.
! (define_insn_and_split "*sub<mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, w, w, w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl")
! 	   (minus:SVE_F
! 	     (match_operand:SVE_F 2 "aarch64_sve_float_arith_operand" "0, 0, vsA, w")
! 	     (match_operand:SVE_F 3 "aarch64_sve_float_arith_with_sub_operand" "vsA, vsN, 0, w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE
!    && (register_operand (operands[2], <MODE>mode)
!        || register_operand (operands[3], <MODE>mode))"
    "@
!    fsub\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    fadd\t%0.<Vetype>, %1/m, %0.<Vetype>, #%N3
!    fsubr\t%0.<Vetype>, %1/m, %0.<Vetype>, #%2
!    #"
!   ; Split the unpredicated form after reload, so that we don't have
!   ; the unnecessary PTRUE.
!   "&& reload_completed
!    && register_operand (operands[2], <MODE>mode)
!    && register_operand (operands[3], <MODE>mode)"
!   [(set (match_dup 0) (minus:SVE_F (match_dup 2) (match_dup 3)))]
  )
  
! ;; Unpredicated floating-point multiplication.
! (define_expand "mul<mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
  	  [(match_dup 3)
! 	   (mult:SVE_F
! 	     (match_operand:SVE_F 1 "register_operand")
! 	     (match_operand:SVE_F 2 "aarch64_sve_float_mul_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Floating-point multiplication predicated with a PTRUE.
! (define_insn_and_split "*mul<mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (mult:SVE_F
! 	     (match_operand:SVE_F 2 "register_operand" "%0, w")
! 	     (match_operand:SVE_F 3 "aarch64_sve_float_mul_operand" "vsM, w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "@
!    fmul\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
!    #"
!   ; Split the unpredicated form after reload, so that we don't have
!   ; the unnecessary PTRUE.
!   "&& reload_completed
!    && register_operand (operands[3], <MODE>mode)"
!   [(set (match_dup 0) (mult:SVE_F (match_dup 2) (match_dup 3)))]
  )
  
! ;; Unpredicated floating-point binary operations (post-RA only).
! ;; These are generated by splitting a predicated instruction whose
! ;; predicate is unused.
! (define_insn "*post_ra_<sve_fp_op><mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w")
! 	(SVE_UNPRED_FP_BINARY:SVE_F
! 	  (match_operand:SVE_F 1 "register_operand" "w")
! 	  (match_operand:SVE_F 2 "register_operand" "w")))]
!   "TARGET_SVE && reload_completed"
!   "<sve_fp_op>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>")
  
! ;; Unpredicated fma (%0 = (%1 * %2) + %3).
! (define_expand "fma<mode>4"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_dup 4)
! 	   (fma:SVE_F (match_operand:SVE_F 1 "register_operand")
! 		      (match_operand:SVE_F 2 "register_operand")
! 		      (match_operand:SVE_F 3 "register_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[4] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; fma predicated with a PTRUE.
! (define_insn "*fma<mode>4"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, w, ?&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (fma:SVE_F (match_operand:SVE_F 3 "register_operand" "%0, w, w")
! 		      (match_operand:SVE_F 4 "register_operand" "w, w, w")
! 		      (match_operand:SVE_F 2 "register_operand" "w, 0, w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    "@
!    fmad\t%0.<Vetype>, %1/m, %4.<Vetype>, %2.<Vetype>
!    fmla\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    movprfx\t%0, %2\;fmla\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Unpredicated fnma (%0 = (-%1 * %2) + %3).
! (define_expand "fnma<mode>4"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_dup 4)
! 	   (fma:SVE_F (neg:SVE_F
! 			(match_operand:SVE_F 1 "register_operand"))
! 		      (match_operand:SVE_F 2 "register_operand")
! 		      (match_operand:SVE_F 3 "register_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[4] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; fnma predicated with a PTRUE.
! (define_insn "*fnma<mode>4"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, w, ?&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (fma:SVE_F (neg:SVE_F
! 			(match_operand:SVE_F 3 "register_operand" "%0, w, w"))
! 		      (match_operand:SVE_F 4 "register_operand" "w, w, w")
! 		      (match_operand:SVE_F 2 "register_operand" "w, 0, w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    "@
!    fmsb\t%0.<Vetype>, %1/m, %4.<Vetype>, %2.<Vetype>
!    fmls\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    movprfx\t%0, %2\;fmls\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Unpredicated fms (%0 = (%1 * %2) - %3).
! (define_expand "fms<mode>4"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_dup 4)
! 	   (fma:SVE_F (match_operand:SVE_F 1 "register_operand")
! 		      (match_operand:SVE_F 2 "register_operand")
! 		      (neg:SVE_F
! 			(match_operand:SVE_F 3 "register_operand")))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[4] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; fms predicated with a PTRUE.
! (define_insn "*fms<mode>4"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, w, ?&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (fma:SVE_F (match_operand:SVE_F 3 "register_operand" "%0, w, w")
! 		      (match_operand:SVE_F 4 "register_operand" "w, w, w")
! 		      (neg:SVE_F
! 			(match_operand:SVE_F 2 "register_operand" "w, 0, w")))]
! 	  UNSPEC_MERGE_PTRUE))]
!   "TARGET_SVE"
    "@
!    fnmsb\t%0.<Vetype>, %1/m, %4.<Vetype>, %2.<Vetype>
!    fnmls\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    movprfx\t%0, %2\;fnmls\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Unpredicated fnms (%0 = (-%1 * %2) - %3).
! (define_expand "fnms<mode>4"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_dup 4)
! 	   (fma:SVE_F (neg:SVE_F
! 			(match_operand:SVE_F 1 "register_operand"))
! 		      (match_operand:SVE_F 2 "register_operand")
! 		      (neg:SVE_F
! 			(match_operand:SVE_F 3 "register_operand")))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[4] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; fnms predicated with a PTRUE.
! (define_insn "*fnms<mode>4"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, w, ?&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (fma:SVE_F (neg:SVE_F
! 			(match_operand:SVE_F 3 "register_operand" "%0, w, w"))
! 		      (match_operand:SVE_F 4 "register_operand" "w, w, w")
! 		      (neg:SVE_F
! 			(match_operand:SVE_F 2 "register_operand" "w, 0, w")))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    "@
!    fnmad\t%0.<Vetype>, %1/m, %4.<Vetype>, %2.<Vetype>
!    fnmla\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    movprfx\t%0, %2\;fnmla\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Unpredicated floating-point division.
! (define_expand "div<mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_dup 3)
! 	   (div:SVE_F (match_operand:SVE_F 1 "register_operand")
! 		      (match_operand:SVE_F 2 "register_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   {
!     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
!   }
  )
  
! ;; Floating-point division predicated with a PTRUE.
! (define_insn "*div<mode>3"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, w, ?&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (div:SVE_F (match_operand:SVE_F 2 "register_operand" "0, w, w")
! 		      (match_operand:SVE_F 3 "register_operand" "w, 0, w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    "@
!    fdiv\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    fdivr\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %2\;fdiv\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Unpredicated FNEG, FABS and FSQRT.
! (define_expand "<optab><mode>2"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_dup 2)
! 	   (SVE_FP_UNARY:SVE_F (match_operand:SVE_F 1 "register_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   {
!     operands[2] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
!   }
  )
  
! ;; FNEG, FABS and FSQRT predicated with a PTRUE.
! (define_insn "*<optab><mode>2"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (SVE_FP_UNARY:SVE_F (match_operand:SVE_F 2 "register_operand" "w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
  )
  
! ;; Unpredicated FRINTy.
! (define_expand "<frint_pattern><mode>2"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_dup 2)
! 	   (unspec:SVE_F [(match_operand:SVE_F 1 "register_operand")]
! 			 FRINT)]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[2] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; FRINTy predicated with a PTRUE.
! (define_insn "*<frint_pattern><mode>2"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (unspec:SVE_F [(match_operand:SVE_F 2 "register_operand" "w")]
! 			 FRINT)]
! 	  UNSPEC_MERGE_PTRUE))]
!   "TARGET_SVE"
!   "frint<frint_suffix>\t%0.<Vetype>, %1/m, %2.<Vetype>"
  )
  
! ;; Unpredicated conversion of floats to integers of the same size (HF to HI,
! ;; SF to SI or DF to DI).
! (define_expand "<fix_trunc_optab><mode><v_int_equiv>2"
!   [(set (match_operand:<V_INT_EQUIV> 0 "register_operand")
! 	(unspec:<V_INT_EQUIV>
! 	  [(match_dup 2)
! 	   (FIXUORS:<V_INT_EQUIV>
! 	     (match_operand:SVE_F 1 "register_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[2] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Conversion of SF to DI, SI or HI, predicated with a PTRUE.
! (define_insn "*<fix_trunc_optab>v16hsf<mode>2"
!   [(set (match_operand:SVE_HSDI 0 "register_operand" "=w")
! 	(unspec:SVE_HSDI
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (FIXUORS:SVE_HSDI
! 	     (match_operand:VNx8HF 2 "register_operand" "w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "fcvtz<su>\t%0.<Vetype>, %1/m, %2.h"
  )
  
! ;; Conversion of SF to DI or SI, predicated with a PTRUE.
! (define_insn "*<fix_trunc_optab>vnx4sf<mode>2"
!   [(set (match_operand:SVE_SDI 0 "register_operand" "=w")
! 	(unspec:SVE_SDI
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (FIXUORS:SVE_SDI
! 	     (match_operand:VNx4SF 2 "register_operand" "w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "fcvtz<su>\t%0.<Vetype>, %1/m, %2.s"
  )
  
! ;; Conversion of DF to DI or SI, predicated with a PTRUE.
! (define_insn "*<fix_trunc_optab>vnx2df<mode>2"
!   [(set (match_operand:SVE_SDI 0 "register_operand" "=w")
! 	(unspec:SVE_SDI
! 	  [(match_operand:VNx2BI 1 "register_operand" "Upl")
! 	   (FIXUORS:SVE_SDI
! 	     (match_operand:VNx2DF 2 "register_operand" "w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "fcvtz<su>\t%0.<Vetype>, %1/m, %2.d"
  )
  
! ;; Unpredicated conversion of integers to floats of the same size
! ;; (HI to HF, SI to SF or DI to DF).
! (define_expand "<optab><v_int_equiv><mode>2"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_dup 2)
! 	   (FLOATUORS:SVE_F
! 	     (match_operand:<V_INT_EQUIV> 1 "register_operand"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
    {
!     operands[2] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
    }
  )
  
! ;; Conversion of DI, SI or HI to the same number of HFs, predicated
! ;; with a PTRUE.
! (define_insn "*<optab><mode>vnx8hf2"
!   [(set (match_operand:VNx8HF 0 "register_operand" "=w")
! 	(unspec:VNx8HF
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (FLOATUORS:VNx8HF
! 	     (match_operand:SVE_HSDI 2 "register_operand" "w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "<su_optab>cvtf\t%0.h, %1/m, %2.<Vetype>"
  )
  
! ;; Conversion of DI or SI to the same number of SFs, predicated with a PTRUE.
! (define_insn "*<optab><mode>vnx4sf2"
!   [(set (match_operand:VNx4SF 0 "register_operand" "=w")
! 	(unspec:VNx4SF
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (FLOATUORS:VNx4SF
! 	     (match_operand:SVE_SDI 2 "register_operand" "w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
-   "<su_optab>cvtf\t%0.s, %1/m, %2.<Vetype>"
  )
  
! ;; Conversion of DI or SI to DF, predicated with a PTRUE.
! (define_insn "aarch64_sve_<optab><mode>vnx2df2"
!   [(set (match_operand:VNx2DF 0 "register_operand" "=w")
! 	(unspec:VNx2DF
! 	  [(match_operand:VNx2BI 1 "register_operand" "Upl")
! 	   (FLOATUORS:VNx2DF
! 	     (match_operand:SVE_SDI 2 "register_operand" "w"))]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "<su_optab>cvtf\t%0.d, %1/m, %2.<Vetype>"
  )
  
! ;; Conversion of DFs to the same number of SFs, or SFs to the same number
! ;; of HFs.
! (define_insn "*trunc<Vwide><mode>2"
!   [(set (match_operand:SVE_HSF 0 "register_operand" "=w")
! 	(unspec:SVE_HSF
! 	  [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl")
! 	   (unspec:SVE_HSF
! 	     [(match_operand:<VWIDE> 2 "register_operand" "w")]
! 	     UNSPEC_FLOAT_CONVERT)]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "fcvt\t%0.<Vetype>, %1/m, %2.<Vewtype>"
  )
  
! ;; Conversion of SFs to the same number of DFs, or HFs to the same number
! ;; of SFs.
! (define_insn "aarch64_sve_extend<mode><Vwide>2"
!   [(set (match_operand:<VWIDE> 0 "register_operand" "=w")
! 	(unspec:<VWIDE>
! 	  [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl")
! 	   (unspec:<VWIDE>
! 	     [(match_operand:SVE_HSF 2 "register_operand" "w")]
! 	     UNSPEC_FLOAT_CONVERT)]
! 	  UNSPEC_MERGE_PTRUE))]
    "TARGET_SVE"
!   "fcvt\t%0.<Vewtype>, %1/m, %2.<Vetype>"
  )
  
! ;; Unpack the low or high half of a predicate, where "high" refers to
! ;; the low-numbered lanes for big-endian and the high-numbered lanes
! ;; for little-endian.
! (define_expand "vec_unpack<su>_<perm_hilo>_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (unspec:<VWIDE> [(match_operand:PRED_BHS 1 "register_operand")]
! 		   UNPACK)]
    "TARGET_SVE"
    {
!     emit_insn ((<hi_lanes_optab>
! 		? gen_aarch64_sve_punpkhi_<PRED_BHS:mode>
! 		: gen_aarch64_sve_punpklo_<PRED_BHS:mode>)
! 	       (operands[0], operands[1]));
!     DONE;
    }
  )
  
! ;; PUNPKHI and PUNPKLO.
! (define_insn "aarch64_sve_punpk<perm_hilo>_<mode>"
!   [(set (match_operand:<VWIDE> 0 "register_operand" "=Upa")
! 	(unspec:<VWIDE> [(match_operand:PRED_BHS 1 "register_operand" "Upa")]
! 			UNPACK_UNSIGNED))]
    "TARGET_SVE"
!   "punpk<perm_hilo>\t%0.h, %1.b"
  )
  
! ;; Unpack the low or high half of a vector, where "high" refers to
! ;; the low-numbered lanes for big-endian and the high-numbered lanes
! ;; for little-endian.
! (define_expand "vec_unpack<su>_<perm_hilo>_<SVE_BHSI:mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (unspec:<VWIDE> [(match_operand:SVE_BHSI 1 "register_operand")] UNPACK)]
    "TARGET_SVE"
    {
!     emit_insn ((<hi_lanes_optab>
! 		? gen_aarch64_sve_<su>unpkhi_<SVE_BHSI:mode>
! 		: gen_aarch64_sve_<su>unpklo_<SVE_BHSI:mode>)
! 	       (operands[0], operands[1]));
!     DONE;
    }
  )
  
! ;; SUNPKHI, UUNPKHI, SUNPKLO and UUNPKLO.
! (define_insn "aarch64_sve_<su>unpk<perm_hilo>_<SVE_BHSI:mode>"
!   [(set (match_operand:<VWIDE> 0 "register_operand" "=w")
! 	(unspec:<VWIDE> [(match_operand:SVE_BHSI 1 "register_operand" "w")]
! 			UNPACK))]
    "TARGET_SVE"
-   "<su>unpk<perm_hilo>\t%0.<Vewtype>, %1.<Vetype>"
  )
  
! ;; Unpack one half of a VNx4SF to VNx2DF, or one half of a VNx8HF to VNx4SF.
! ;; First unpack the source without conversion, then float-convert the
! ;; unpacked source.
! (define_expand "vec_unpacks_<perm_hilo>_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (unspec:SVE_HSF [(match_operand:SVE_HSF 1 "register_operand")]
! 		   UNPACK_UNSIGNED)]
    "TARGET_SVE"
    {
!     /* Use ZIP to do the unpack, since we don't care about the upper halves
!        and since it has the nice property of not needing any subregs.
!        If using UUNPK* turns out to be preferable, we could model it as
!        a ZIP whose first operand is zero.  */
!     rtx temp = gen_reg_rtx (<MODE>mode);
!     emit_insn ((<hi_lanes_optab>
! 		? gen_aarch64_sve_zip2<mode>
! 		: gen_aarch64_sve_zip1<mode>)
! 		(temp, operands[1], operands[1]));
!     rtx ptrue = force_reg (<VWIDE_PRED>mode, CONSTM1_RTX (<VWIDE_PRED>mode));
!     emit_insn (gen_aarch64_sve_extend<mode><Vwide>2 (operands[0],
! 						     ptrue, temp));
!     DONE;
    }
  )
  
! ;; Unpack one half of a VNx4SI to VNx2DF.  First unpack from VNx4SI
! ;; to VNx2DI, reinterpret the VNx2DI as a VNx4SI, then convert the
! ;; unpacked VNx4SI to VNx2DF.
! (define_expand "vec_unpack<su_optab>_float_<perm_hilo>_vnx4si"
!   [(match_operand:VNx2DF 0 "register_operand")
!    (FLOATUORS:VNx2DF
!      (unspec:VNx2DI [(match_operand:VNx4SI 1 "register_operand")]
! 		    UNPACK_UNSIGNED))]
    "TARGET_SVE"
    {
!     /* Use ZIP to do the unpack, since we don't care about the upper halves
!        and since it has the nice property of not needing any subregs.
!        If using UUNPK* turns out to be preferable, we could model it as
!        a ZIP whose first operand is zero.  */
!     rtx temp = gen_reg_rtx (VNx4SImode);
!     emit_insn ((<hi_lanes_optab>
! 	        ? gen_aarch64_sve_zip2vnx4si
! 	        : gen_aarch64_sve_zip1vnx4si)
! 	       (temp, operands[1], operands[1]));
!     rtx ptrue = force_reg (VNx2BImode, CONSTM1_RTX (VNx2BImode));
!     emit_insn (gen_aarch64_sve_<FLOATUORS:optab>vnx4sivnx2df2 (operands[0],
! 							       ptrue, temp));
!     DONE;
    }
  )
  
! ;; Predicate pack.  Use UZP1 on the narrower type, which discards
! ;; the high part of each wide element.
! (define_insn "vec_pack_trunc_<Vwide>"
!   [(set (match_operand:PRED_BHS 0 "register_operand" "=Upa")
! 	(unspec:PRED_BHS
! 	  [(match_operand:<VWIDE> 1 "register_operand" "Upa")
! 	   (match_operand:<VWIDE> 2 "register_operand" "Upa")]
! 	  UNSPEC_PACK))]
    "TARGET_SVE"
!   "uzp1\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
  )
  
! ;; Integer pack.  Use UZP1 on the narrower type, which discards
! ;; the high part of each wide element.
! (define_insn "vec_pack_trunc_<Vwide>"
!   [(set (match_operand:SVE_BHSI 0 "register_operand" "=w")
! 	(unspec:SVE_BHSI
! 	  [(match_operand:<VWIDE> 1 "register_operand" "w")
! 	   (match_operand:<VWIDE> 2 "register_operand" "w")]
! 	  UNSPEC_PACK))]
    "TARGET_SVE"
!   "uzp1\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
  )
  
! ;; Convert two vectors of DF to SF, or two vectors of SF to HF, and pack
! ;; the results into a single vector.
! (define_expand "vec_pack_trunc_<Vwide>"
!   [(set (match_dup 4)
! 	(unspec:SVE_HSF
! 	  [(match_dup 3)
! 	   (unspec:SVE_HSF [(match_operand:<VWIDE> 1 "register_operand")]
! 			   UNSPEC_FLOAT_CONVERT)]
! 	  UNSPEC_MERGE_PTRUE))
!    (set (match_dup 5)
! 	(unspec:SVE_HSF
! 	  [(match_dup 3)
! 	   (unspec:SVE_HSF [(match_operand:<VWIDE> 2 "register_operand")]
! 			   UNSPEC_FLOAT_CONVERT)]
! 	  UNSPEC_MERGE_PTRUE))
!    (set (match_operand:SVE_HSF 0 "register_operand")
! 	(unspec:SVE_HSF [(match_dup 4) (match_dup 5)] UNSPEC_UZP1))]
    "TARGET_SVE"
    {
!     operands[3] = force_reg (<VWIDE_PRED>mode, CONSTM1_RTX (<VWIDE_PRED>mode));
!     operands[4] = gen_reg_rtx (<MODE>mode);
!     operands[5] = gen_reg_rtx (<MODE>mode);
    }
  )
  
! ;; Convert two vectors of DF to SI and pack the results into a single vector.
! (define_expand "vec_pack_<su>fix_trunc_vnx2df"
!   [(set (match_dup 4)
! 	(unspec:VNx4SI
! 	  [(match_dup 3)
! 	   (FIXUORS:VNx4SI (match_operand:VNx2DF 1 "register_operand"))]
! 	  UNSPEC_MERGE_PTRUE))
!    (set (match_dup 5)
! 	(unspec:VNx4SI
! 	  [(match_dup 3)
! 	   (FIXUORS:VNx4SI (match_operand:VNx2DF 2 "register_operand"))]
! 	  UNSPEC_MERGE_PTRUE))
!    (set (match_operand:VNx4SI 0 "register_operand")
! 	(unspec:VNx4SI [(match_dup 4) (match_dup 5)] UNSPEC_UZP1))]
    "TARGET_SVE"
    {
!     operands[3] = force_reg (VNx2BImode, CONSTM1_RTX (VNx2BImode));
!     operands[4] = gen_reg_rtx (VNx4SImode);
!     operands[5] = gen_reg_rtx (VNx4SImode);
    }
  )
  
! ;; Predicated floating-point operations with select.
! (define_expand "cond_<optab><mode>"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (unspec:SVE_F
! 	     [(match_operand:SVE_F 2 "register_operand")
! 	      (match_operand:SVE_F 3 "register_operand")]
! 	     SVE_COND_FP_BINARY)
! 	   (match_operand:SVE_F 4 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
  )
  
! ;; Predicated floating-point operations with select matching output.
! (define_insn "*cond_<optab><mode>_0"
!   [(set (match_operand:SVE_F 0 "register_operand" "+w, w, ?&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (unspec:SVE_F
! 	     [(match_operand:SVE_F 2 "register_operand" "0, w, w")
! 	      (match_operand:SVE_F 3 "register_operand" "w, 0, w")]
! 	     SVE_COND_FP_BINARY)
! 	   (match_dup 0)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
    "@
!    <sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    <sve_fp_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %1/m, %2\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,*,yes")]
  )
  
! ;; Predicated floating-point operations with select matching first operand.
! (define_insn "*cond_<optab><mode>_2"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_F
! 	     [(match_operand:SVE_F 2 "register_operand" "0, w")
! 	      (match_operand:SVE_F 3 "register_operand" "w, w")]
! 	     SVE_COND_FP_BINARY)
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
    "@
!    <sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
    [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated floating-point operations with select matching second operand.
! (define_insn "*cond_<optab><mode>_3"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_F
! 	     [(match_operand:SVE_F 2 "register_operand" "w, w")
! 	      (match_operand:SVE_F 3 "register_operand" "0, w")]
! 	     SVE_COND_FP_BINARY)
! 	   (match_dup 3)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
    "@
!    <sve_fp_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
!    movprfx\t%0, %3\;<sve_fp_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>"
    [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated floating-point operations with select matching zero.
! (define_insn "*cond_<optab><mode>_z"
!   [(set (match_operand:SVE_F 0 "register_operand" "=&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (unspec:SVE_F
! 	     [(match_operand:SVE_F 2 "register_operand" "w")
! 	      (match_operand:SVE_F 3 "register_operand" "w")]
! 	     SVE_COND_FP_BINARY)
! 	   (match_operand:SVE_F 4 "aarch64_simd_imm_zero")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "yes")]
  )
  
! ;; Synthetic predication of floating-point operations with select unmatched.
! (define_insn_and_split "*cond_<optab><mode>_any"
!   [(set (match_operand:SVE_F 0 "register_operand" "=&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (unspec:SVE_F
! 	     [(match_operand:SVE_F 2 "register_operand" "w")
! 	      (match_operand:SVE_F 3 "register_operand" "w")]
! 	     SVE_COND_FP_BINARY)
! 	   (match_operand:SVE_F 4 "register_operand" "w")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "#"
!   "&& reload_completed
!    && !(rtx_equal_p (operands[0], operands[4])
!         || rtx_equal_p (operands[2], operands[4])
!         || rtx_equal_p (operands[3], operands[4]))"
!   ; Not matchable by any one insn or movprfx insn.  We need a separate select.
!   [(set (match_dup 0)
! 	(unspec:SVE_F [(match_dup 1) (match_dup 2) (match_dup 4)] UNSPEC_SEL))
!    (set (match_dup 0)
! 	(unspec:SVE_F
! 	  [(match_dup 1)
! 	   (unspec:SVE_F [(match_dup 0) (match_dup 3)] SVE_COND_FP_BINARY)
!            (match_dup 0)]
! 	  UNSPEC_SEL))]
  )
  
! ;; Predicated floating-point ternary operations with select.
! (define_expand "cond_<optab><mode>"
!   [(set (match_operand:SVE_F 0 "register_operand")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (unspec:SVE_F
! 	     [(match_operand:SVE_F 2 "register_operand")
! 	      (match_operand:SVE_F 3 "register_operand")
! 	      (match_operand:SVE_F 4 "register_operand")]
! 	     SVE_COND_FP_TERNARY)
! 	   (match_operand:SVE_F 5 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
! {
!   /* Swap the multiplication operands if the fallback value is the
!      second of the two.  */
!   if (rtx_equal_p (operands[3], operands[5]))
!     std::swap (operands[2], operands[3]);
! })
  
! ;; Predicated floating-point ternary operations using the FMAD-like form.
! (define_insn "*cond_<optab><mode>_2"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_F
! 	     [(match_operand:SVE_F 2 "register_operand" "0, w")
! 	      (match_operand:SVE_F 3 "register_operand" "w, w")
! 	      (match_operand:SVE_F 4 "register_operand" "w, w")]
! 	     SVE_COND_FP_TERNARY)
! 	   (match_dup 2)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "@
!    <sve_fmad_op>\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>
!    movprfx\t%0, %2\;<sve_fmad_op>\t%0.<Vetype>, %1/m, %3.<Vetype>, %4.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated floating-point ternary operations using the FMLA-like form.
! (define_insn "*cond_<optab><mode>_4"
!   [(set (match_operand:SVE_F 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (unspec:SVE_F
! 	     [(match_operand:SVE_F 2 "register_operand" "w, w")
! 	      (match_operand:SVE_F 3 "register_operand" "w, w")
! 	      (match_operand:SVE_F 4 "register_operand" "0, w")]
! 	     SVE_COND_FP_TERNARY)
! 	   (match_dup 4)]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
!   "@
!    <sve_fmla_op>\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %4\;<sve_fmla_op>\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Predicated floating-point ternary operations in which the value for
! ;; inactive lanes is distinct from the other inputs.
! (define_insn_and_split "*cond_<optab><mode>_any"
!   [(set (match_operand:SVE_F 0 "register_operand" "=&w, &w, ?&w")
! 	(unspec:SVE_F
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (unspec:SVE_F
! 	     [(match_operand:SVE_F 2 "register_operand" "w, w, w")
! 	      (match_operand:SVE_F 3 "register_operand" "w, w, w")
! 	      (match_operand:SVE_F 4 "register_operand" "w, w, w")]
! 	     SVE_COND_FP_TERNARY)
! 	   (match_operand:SVE_F 5 "aarch64_simd_reg_or_zero" "Dz, 0, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE
!    && !rtx_equal_p (operands[2], operands[5])
!    && !rtx_equal_p (operands[3], operands[5])
!    && !rtx_equal_p (operands[4], operands[5])"
!   "@
!    movprfx\t%0.<Vetype>, %1/z, %4.<Vetype>\;<sve_fmla_op>\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    movprfx\t%0.<Vetype>, %1/m, %4.<Vetype>\;<sve_fmla_op>\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>
!    #"
!   "&& reload_completed
!    && !CONSTANT_P (operands[5])
!    && !rtx_equal_p (operands[0], operands[5])"
!   [(set (match_dup 0)
! 	(unspec:SVE_F [(match_dup 1) (match_dup 4) (match_dup 5)] UNSPEC_SEL))
!    (set (match_dup 0)
! 	(unspec:SVE_F
! 	  [(match_dup 1)
! 	   (unspec:SVE_F [(match_dup 2) (match_dup 3) (match_dup 0)]
! 			 SVE_COND_FP_TERNARY)
!            (match_dup 0)]
! 	  UNSPEC_SEL))]
!   ""
!   [(set_attr "movprfx" "yes")]
  )
  
! ;; Shift an SVE vector left and insert a scalar into element 0.
! (define_insn "vec_shl_insert_<mode>"
!   [(set (match_operand:SVE_ALL 0 "register_operand" "=w, w")
! 	(unspec:SVE_ALL
! 	  [(match_operand:SVE_ALL 1 "register_operand" "0, 0")
! 	   (match_operand:<VEL> 2 "register_operand" "rZ, w")]
! 	  UNSPEC_INSR))]
    "TARGET_SVE"
    "@
!    insr\t%0.<Vetype>, %<vwcore>2
!    insr\t%0.<Vetype>, %<Vetype>2"
  )
  
! (define_expand "copysign<mode>3"
!   [(match_operand:SVE_F 0 "register_operand")
!    (match_operand:SVE_F 1 "register_operand")
!    (match_operand:SVE_F 2 "register_operand")]
    "TARGET_SVE"
    {
!     rtx sign = gen_reg_rtx (<V_INT_EQUIV>mode);
!     rtx mant = gen_reg_rtx (<V_INT_EQUIV>mode);
!     rtx int_res = gen_reg_rtx (<V_INT_EQUIV>mode);
!     int bits = GET_MODE_UNIT_BITSIZE (<MODE>mode) - 1;
! 
!     rtx arg1 = lowpart_subreg (<V_INT_EQUIV>mode, operands[1], <MODE>mode);
!     rtx arg2 = lowpart_subreg (<V_INT_EQUIV>mode, operands[2], <MODE>mode);
! 
!     emit_insn (gen_and<v_int_equiv>3
! 	       (sign, arg2,
! 		aarch64_simd_gen_const_vector_dup (<V_INT_EQUIV>mode,
! 						   HOST_WIDE_INT_M1U
! 						   << bits)));
!     emit_insn (gen_and<v_int_equiv>3
! 	       (mant, arg1,
! 		aarch64_simd_gen_const_vector_dup (<V_INT_EQUIV>mode,
! 						   ~(HOST_WIDE_INT_M1U
! 						     << bits))));
!     emit_insn (gen_ior<v_int_equiv>3 (int_res, sign, mant));
!     emit_move_insn (operands[0], gen_lowpart (<MODE>mode, int_res));
!     DONE;
    }
  )
  
! (define_expand "xorsign<mode>3"
!   [(match_operand:SVE_F 0 "register_operand")
!    (match_operand:SVE_F 1 "register_operand")
!    (match_operand:SVE_F 2 "register_operand")]
    "TARGET_SVE"
    {
!     rtx sign = gen_reg_rtx (<V_INT_EQUIV>mode);
!     rtx int_res = gen_reg_rtx (<V_INT_EQUIV>mode);
!     int bits = GET_MODE_UNIT_BITSIZE (<MODE>mode) - 1;
  
!     rtx arg1 = lowpart_subreg (<V_INT_EQUIV>mode, operands[1], <MODE>mode);
!     rtx arg2 = lowpart_subreg (<V_INT_EQUIV>mode, operands[2], <MODE>mode);
  
!     emit_insn (gen_and<v_int_equiv>3
! 	       (sign, arg2,
! 		aarch64_simd_gen_const_vector_dup (<V_INT_EQUIV>mode,
! 						   HOST_WIDE_INT_M1U
! 						   << bits)));
!     emit_insn (gen_xor<v_int_equiv>3 (int_res, arg1, sign));
!     emit_move_insn (operands[0], gen_lowpart (<MODE>mode, int_res));
!     DONE;
    }
  )
--- 6892,9481 ----
    }
  )
  
! ;; Predicated integer comparisons.
! (define_insn "@aarch64_pred_cmp<cmp_op><mode>"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa, Upa")
! 	(unspec:<VPRED>
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (match_operand:SI 2 "aarch64_sve_ptrue_flag")
! 	   (SVE_INT_CMP:<VPRED>
! 	     (match_operand:SVE_FULL_I 3 "register_operand" "w, w")
! 	     (match_operand:SVE_FULL_I 4 "aarch64_sve_cmp_<sve_imm_con>_operand" "<sve_imm_con>, w"))]
! 	  UNSPEC_PRED_Z))
!    (clobber (reg:CC_NZC CC_REGNUM))]
    "TARGET_SVE"
!   "@
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %3.<Vetype>, #%4
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %3.<Vetype>, %4.<Vetype>"
  )
  
! ;; Predicated integer comparisons in which both the flag and predicate
! ;; results are interesting.
! (define_insn_and_rewrite "*cmp<cmp_op><mode>_cc"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upl, Upl")
! 	   (match_operand 4)
! 	   (match_operand:SI 5 "aarch64_sve_ptrue_flag")
! 	   (unspec:<VPRED>
! 	     [(match_operand 6)
! 	      (match_operand:SI 7 "aarch64_sve_ptrue_flag")
! 	      (SVE_INT_CMP:<VPRED>
! 		(match_operand:SVE_FULL_I 2 "register_operand" "w, w")
! 		(match_operand:SVE_FULL_I 3 "aarch64_sve_cmp_<sve_imm_con>_operand" "<sve_imm_con>, w"))]
! 	     UNSPEC_PRED_Z)]
! 	  UNSPEC_PTEST))
!    (set (match_operand:<VPRED> 0 "register_operand" "=Upa, Upa")
! 	(unspec:<VPRED>
! 	  [(match_dup 6)
! 	   (match_dup 7)
! 	   (SVE_INT_CMP:<VPRED>
! 	     (match_dup 2)
! 	     (match_dup 3))]
! 	  UNSPEC_PRED_Z))]
!   "TARGET_SVE
!    && aarch64_sve_same_pred_for_ptest_p (&operands[4], &operands[6])"
!   "@
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, #%3
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
!   "&& !rtx_equal_p (operands[4], operands[6])"
    {
!     operands[6] = copy_rtx (operands[4]);
!     operands[7] = operands[5];
    }
  )
  
! ;; Predicated integer comparisons in which only the flags result is
! ;; interesting.
! (define_insn_and_rewrite "*cmp<cmp_op><mode>_ptest"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upl, Upl")
! 	   (match_operand 4)
! 	   (match_operand:SI 5 "aarch64_sve_ptrue_flag")
! 	   (unspec:<VPRED>
! 	     [(match_operand 6)
! 	      (match_operand:SI 7 "aarch64_sve_ptrue_flag")
! 	      (SVE_INT_CMP:<VPRED>
! 		(match_operand:SVE_FULL_I 2 "register_operand" "w, w")
! 		(match_operand:SVE_FULL_I 3 "aarch64_sve_cmp_<sve_imm_con>_operand" "<sve_imm_con>, w"))]
! 	     UNSPEC_PRED_Z)]
! 	  UNSPEC_PTEST))
!    (clobber (match_scratch:<VPRED> 0 "=Upa, Upa"))]
!   "TARGET_SVE
!    && aarch64_sve_same_pred_for_ptest_p (&operands[4], &operands[6])"
!   "@
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, #%3
!    cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
!   "&& !rtx_equal_p (operands[4], operands[6])"
    {
!     operands[6] = copy_rtx (operands[4]);
!     operands[7] = operands[5];
    }
  )
  
! ;; Predicated integer comparisons, formed by combining a PTRUE-predicated
! ;; comparison with an AND.  Split the instruction into its preferred form
! ;; at the earliest opportunity, in order to get rid of the redundant
! ;; operand 4.
! (define_insn_and_split "*cmp<cmp_op><mode>_and"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa, Upa")
! 	(and:<VPRED>
! 	  (unspec:<VPRED>
! 	    [(match_operand 4)
! 	     (const_int SVE_KNOWN_PTRUE)
! 	     (SVE_INT_CMP:<VPRED>
! 	       (match_operand:SVE_FULL_I 2 "register_operand" "w, w")
! 	       (match_operand:SVE_FULL_I 3 "aarch64_sve_cmp_<sve_imm_con>_operand" "<sve_imm_con>, w"))]
! 	    UNSPEC_PRED_Z)
! 	  (match_operand:<VPRED> 1 "register_operand" "Upl, Upl")))
!    (clobber (reg:CC_NZC CC_REGNUM))]
    "TARGET_SVE"
!   "#"
!   "&& 1"
!   [(parallel
!      [(set (match_dup 0)
! 	   (unspec:<VPRED>
! 	     [(match_dup 1)
! 	      (const_int SVE_MAYBE_NOT_PTRUE)
! 	      (SVE_INT_CMP:<VPRED>
! 		(match_dup 2)
! 		(match_dup 3))]
! 	     UNSPEC_PRED_Z))
!       (clobber (reg:CC_NZC CC_REGNUM))])]
  )
  
! ;; Predicated integer wide comparisons.
! (define_insn "@aarch64_pred_cmp<cmp_op><mode>_wide"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa")
! 	(unspec:<VPRED>
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upl")
! 	   (match_operand:SI 2 "aarch64_sve_ptrue_flag")
! 	   (unspec:<VPRED>
! 	     [(match_operand:SVE_FULL_BHSI 3 "register_operand" "w")
! 	      (match_operand:VNx2DI 4 "register_operand" "w")]
! 	     SVE_COND_INT_CMP_WIDE)]
! 	  UNSPEC_PRED_Z))
!    (clobber (reg:CC_NZC CC_REGNUM))]
    "TARGET_SVE"
!   "cmp<cmp_op>\t%0.<Vetype>, %1/z, %3.<Vetype>, %4.d"
  )
  
! ;; Predicated integer wide comparisons in which both the flag and
! ;; predicate results are interesting.
! (define_insn "*aarch64_pred_cmp<cmp_op><mode>_wide_cc"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upl")
! 	   (match_operand 4)
! 	   (match_operand:SI 5 "aarch64_sve_ptrue_flag")
! 	   (unspec:<VPRED>
! 	     [(match_operand:VNx16BI 6 "register_operand" "Upl")
! 	      (match_operand:SI 7 "aarch64_sve_ptrue_flag")
! 	      (unspec:<VPRED>
! 		[(match_operand:SVE_FULL_BHSI 2 "register_operand" "w")
! 		 (match_operand:VNx2DI 3 "register_operand" "w")]
! 		SVE_COND_INT_CMP_WIDE)]
! 	     UNSPEC_PRED_Z)]
! 	  UNSPEC_PTEST))
!    (set (match_operand:<VPRED> 0 "register_operand" "=Upa")
! 	(unspec:<VPRED>
! 	  [(match_dup 6)
! 	   (match_dup 7)
! 	   (unspec:<VPRED>
! 	     [(match_dup 2)
! 	      (match_dup 3)]
! 	     SVE_COND_INT_CMP_WIDE)]
! 	  UNSPEC_PRED_Z))]
!   "TARGET_SVE
!    && aarch64_sve_same_pred_for_ptest_p (&operands[4], &operands[6])"
!   "cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.d"
  )
  
! ;; Predicated integer wide comparisons in which only the flags result
! ;; is interesting.
! (define_insn "*aarch64_pred_cmp<cmp_op><mode>_wide_ptest"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upl")
! 	   (match_operand 4)
! 	   (match_operand:SI 5 "aarch64_sve_ptrue_flag")
! 	   (unspec:<VPRED>
! 	     [(match_operand:VNx16BI 6 "register_operand" "Upl")
! 	      (match_operand:SI 7 "aarch64_sve_ptrue_flag")
! 	      (unspec:<VPRED>
! 		[(match_operand:SVE_FULL_BHSI 2 "register_operand" "w")
! 		 (match_operand:VNx2DI 3 "register_operand" "w")]
! 		SVE_COND_INT_CMP_WIDE)]
! 	     UNSPEC_PRED_Z)]
! 	  UNSPEC_PTEST))
!    (clobber (match_scratch:<VPRED> 0 "=Upa"))]
!   "TARGET_SVE
!    && aarch64_sve_same_pred_for_ptest_p (&operands[4], &operands[6])"
!   "cmp<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.d"
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] While tests
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - WHILEGE (SVE2)
! ;; - WHILEGT (SVE2)
! ;; - WHILEHI (SVE2)
! ;; - WHILEHS (SVE2)
! ;; - WHILELE
! ;; - WHILELO
! ;; - WHILELS
! ;; - WHILELT
! ;; - WHILERW (SVE2)
! ;; - WHILEWR (SVE2)
! ;; -------------------------------------------------------------------------
  
! ;; Set element I of the result if (cmp (plus operand1 J) operand2) is
! ;; true for all J in [0, I].
! (define_insn "@while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>"
!   [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
! 	(unspec:PRED_ALL [(match_operand:GPI 1 "aarch64_reg_or_zero" "rZ")
! 			  (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ")]
! 			 SVE_WHILE))
!    (clobber (reg:CC_NZC CC_REGNUM))]
    "TARGET_SVE"
+   "while<cmp_op>\t%0.<PRED_ALL:Vetype>, %<w>1, %<w>2"
  )
  
! ;; The WHILE instructions set the flags in the same way as a PTEST with
! ;; a PTRUE GP.  Handle the case in which both results are useful.  The GP
! ;; operands to the PTEST aren't needed, so we allow them to be anything.
! (define_insn_and_rewrite "*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_cc"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand 3)
! 	   (match_operand 4)
! 	   (const_int SVE_KNOWN_PTRUE)
! 	   (unspec:PRED_ALL
! 	     [(match_operand:GPI 1 "aarch64_reg_or_zero" "rZ")
! 	      (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ")]
! 	     SVE_WHILE)]
! 	  UNSPEC_PTEST))
!    (set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
! 	(unspec:PRED_ALL [(match_dup 1)
! 			  (match_dup 2)]
! 			 SVE_WHILE))]
    "TARGET_SVE"
+   "while<cmp_op>\t%0.<PRED_ALL:Vetype>, %<w>1, %<w>2"
+   ;; Force the compiler to drop the unused predicate operand, so that we
+   ;; don't have an unnecessary PTRUE.
+   "&& (!CONSTANT_P (operands[3]) || !CONSTANT_P (operands[4]))"
+   {
+     operands[3] = CONSTM1_RTX (VNx16BImode);
+     operands[4] = CONSTM1_RTX (<PRED_ALL:MODE>mode);
+   }
  )
  
! ;; Same, but handle the case in which only the flags result is useful.
! (define_insn_and_rewrite "@while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand 3)
! 	   (match_operand 4)
! 	   (const_int SVE_KNOWN_PTRUE)
! 	   (unspec:PRED_ALL
! 	     [(match_operand:GPI 1 "aarch64_reg_or_zero" "rZ")
! 	      (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ")]
! 	     SVE_WHILE)]
! 	  UNSPEC_PTEST))
!    (clobber (match_scratch:PRED_ALL 0 "=Upa"))]
    "TARGET_SVE"
!   "while<cmp_op>\t%0.<PRED_ALL:Vetype>, %<w>1, %<w>2"
!   ;; Force the compiler to drop the unused predicate operand, so that we
!   ;; don't have an unnecessary PTRUE.
!   "&& (!CONSTANT_P (operands[3]) || !CONSTANT_P (operands[4]))"
!   {
!     operands[3] = CONSTM1_RTX (VNx16BImode);
!     operands[4] = CONSTM1_RTX (<PRED_ALL:MODE>mode);
!   }
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Direct comparisons
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FCMEQ
! ;; - FCMGE
! ;; - FCMGT
! ;; - FCMLE
! ;; - FCMLT
! ;; - FCMNE
! ;; - FCMUO
! ;; -------------------------------------------------------------------------
! 
! ;; Floating-point comparisons.  All comparisons except FCMUO allow a zero
! ;; operand; aarch64_expand_sve_vec_cmp_float handles the case of an FCMUO
! ;; with zero.
! (define_expand "vec_cmp<mode><vpred>"
!   [(set (match_operand:<VPRED> 0 "register_operand")
! 	(match_operator:<VPRED> 1 "comparison_operator"
! 	  [(match_operand:SVE_FULL_F 2 "register_operand")
! 	   (match_operand:SVE_FULL_F 3 "aarch64_simd_reg_or_zero")]))]
    "TARGET_SVE"
!   {
!     aarch64_expand_sve_vec_cmp_float (operands[0], GET_CODE (operands[1]),
! 				      operands[2], operands[3], false);
!     DONE;
!   }
  )
  
! ;; Predicated floating-point comparisons.
! (define_insn "@aarch64_pred_fcm<cmp_op><mode>"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa, Upa")
! 	(unspec:<VPRED>
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (match_operand:SI 2 "aarch64_sve_ptrue_flag")
! 	   (match_operand:SVE_FULL_F 3 "register_operand" "w, w")
! 	   (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero" "Dz, w")]
! 	  SVE_COND_FP_CMP_I0))]
    "TARGET_SVE"
    "@
!    fcm<cmp_op>\t%0.<Vetype>, %1/z, %3.<Vetype>, #0.0
!    fcm<cmp_op>\t%0.<Vetype>, %1/z, %3.<Vetype>, %4.<Vetype>"
  )
  
! ;; Same for unordered comparisons.
! (define_insn "@aarch64_pred_fcmuo<mode>"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa")
! 	(unspec:<VPRED>
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (match_operand:SI 2 "aarch64_sve_ptrue_flag")
! 	   (match_operand:SVE_FULL_F 3 "register_operand" "w")
! 	   (match_operand:SVE_FULL_F 4 "register_operand" "w")]
! 	  UNSPEC_COND_FCMUO))]
    "TARGET_SVE"
!   "fcmuo\t%0.<Vetype>, %1/z, %3.<Vetype>, %4.<Vetype>"
  )
  
! ;; Floating-point comparisons predicated on a PTRUE, with the results ANDed
! ;; with another predicate P.  This does not have the same trapping behavior
! ;; as predicating the comparison itself on P, but it's a legitimate fold,
! ;; since we can drop any potentially-trapping operations whose results
! ;; are not needed.
! ;;
! ;; Split the instruction into its preferred form (below) at the earliest
! ;; opportunity, in order to get rid of the redundant operand 1.
! (define_insn_and_split "*fcm<cmp_op><mode>_and_combine"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa, Upa")
! 	(and:<VPRED>
! 	  (unspec:<VPRED>
! 	    [(match_operand:<VPRED> 1)
! 	     (const_int SVE_KNOWN_PTRUE)
! 	     (match_operand:SVE_FULL_F 2 "register_operand" "w, w")
! 	     (match_operand:SVE_FULL_F 3 "aarch64_simd_reg_or_zero" "Dz, w")]
! 	    SVE_COND_FP_CMP_I0)
! 	  (match_operand:<VPRED> 4 "register_operand" "Upl, Upl")))]
    "TARGET_SVE"
!   "#"
!   "&& 1"
!   [(set (match_dup 0)
! 	(unspec:<VPRED>
! 	  [(match_dup 4)
! 	   (const_int SVE_MAYBE_NOT_PTRUE)
! 	   (match_dup 2)
! 	   (match_dup 3)]
! 	  SVE_COND_FP_CMP_I0))]
  )
  
! ;; Same for unordered comparisons.
! (define_insn_and_split "*fcmuo<mode>_and_combine"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa")
! 	(and:<VPRED>
! 	  (unspec:<VPRED>
! 	    [(match_operand:<VPRED> 1)
! 	     (const_int SVE_KNOWN_PTRUE)
! 	     (match_operand:SVE_FULL_F 2 "register_operand" "w")
! 	     (match_operand:SVE_FULL_F 3 "register_operand" "w")]
! 	    UNSPEC_COND_FCMUO)
! 	  (match_operand:<VPRED> 4 "register_operand" "Upl")))]
    "TARGET_SVE"
!   "#"
!   "&& 1"
!   [(set (match_dup 0)
! 	(unspec:<VPRED>
! 	  [(match_dup 4)
! 	   (const_int SVE_MAYBE_NOT_PTRUE)
! 	   (match_dup 2)
! 	   (match_dup 3)]
! 	  UNSPEC_COND_FCMUO))]
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Absolute comparisons
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FACGE
! ;; - FACGT
! ;; - FACLE
! ;; - FACLT
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated floating-point absolute comparisons.
! (define_expand "@aarch64_pred_fac<cmp_op><mode>"
!   [(set (match_operand:<VPRED> 0 "register_operand")
! 	(unspec:<VPRED>
! 	  [(match_operand:<VPRED> 1 "register_operand")
! 	   (match_operand:SI 2 "aarch64_sve_ptrue_flag")
! 	   (unspec:SVE_FULL_F
! 	     [(match_dup 1)
! 	      (match_dup 2)
! 	      (match_operand:SVE_FULL_F 3 "register_operand")]
! 	     UNSPEC_COND_FABS)
! 	   (unspec:SVE_FULL_F
! 	     [(match_dup 1)
! 	      (match_dup 2)
! 	      (match_operand:SVE_FULL_F 4 "register_operand")]
! 	     UNSPEC_COND_FABS)]
! 	  SVE_COND_FP_ABS_CMP))]
    "TARGET_SVE"
  )
  
! (define_insn_and_rewrite "*aarch64_pred_fac<cmp_op><mode>"
!   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa")
! 	(unspec:<VPRED>
  	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 	   (match_operand:SI 4 "aarch64_sve_ptrue_flag")
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 5)
! 	      (match_operand:SI 6 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "w")]
! 	     UNSPEC_COND_FABS)
! 	   (unspec:SVE_FULL_F
! 	     [(match_operand 7)
! 	      (match_operand:SI 8 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 3 "register_operand" "w")]
! 	     UNSPEC_COND_FABS)]
! 	  SVE_COND_FP_ABS_CMP))]
!   "TARGET_SVE
!    && aarch64_sve_pred_dominates_p (&operands[5], operands[1])
!    && aarch64_sve_pred_dominates_p (&operands[7], operands[1])"
!   "fac<cmp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
!   "&& (!rtx_equal_p (operands[1], operands[5])
!        || !rtx_equal_p (operands[1], operands[7]))"
!   {
!     operands[5] = copy_rtx (operands[1]);
!     operands[7] = copy_rtx (operands[1]);
!   }
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [PRED] Select
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - SEL
! ;; -------------------------------------------------------------------------
! 
! (define_insn "@vcond_mask_<mode><mode>"
!   [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
! 	(ior:PRED_ALL
! 	  (and:PRED_ALL
! 	    (match_operand:PRED_ALL 3 "register_operand" "Upa")
! 	    (match_operand:PRED_ALL 1 "register_operand" "Upa"))
! 	  (and:PRED_ALL
! 	    (not (match_dup 3))
! 	    (match_operand:PRED_ALL 2 "register_operand" "Upa"))))]
    "TARGET_SVE"
!   "sel\t%0.b, %3, %1.b, %2.b"
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [PRED] Test bits
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - PTEST
! ;; -------------------------------------------------------------------------
! 
! ;; Branch based on predicate equality or inequality.
! (define_expand "cbranch<mode>4"
!   [(set (pc)
! 	(if_then_else
! 	  (match_operator 0 "aarch64_equality_operator"
! 	    [(match_operand:PRED_ALL 1 "register_operand")
! 	     (match_operand:PRED_ALL 2 "aarch64_simd_reg_or_zero")])
! 	  (label_ref (match_operand 3 ""))
! 	  (pc)))]
!   ""
!   {
!     rtx ptrue = force_reg (VNx16BImode, aarch64_ptrue_all (<data_bytes>));
!     rtx cast_ptrue = gen_lowpart (<MODE>mode, ptrue);
!     rtx ptrue_flag = gen_int_mode (SVE_KNOWN_PTRUE, SImode);
!     rtx pred;
!     if (operands[2] == CONST0_RTX (<MODE>mode))
!       pred = operands[1];
!     else
!       {
! 	pred = gen_reg_rtx (<MODE>mode);
! 	emit_insn (gen_aarch64_pred_xor<mode>_z (pred, cast_ptrue, operands[1],
! 						 operands[2]));
!       }
!     emit_insn (gen_aarch64_ptest<mode> (ptrue, cast_ptrue, ptrue_flag, pred));
!     operands[1] = gen_rtx_REG (CC_NZCmode, CC_REGNUM);
!     operands[2] = const0_rtx;
!   }
  )
  
! ;; See "Description of UNSPEC_PTEST" above for details.
! (define_insn "aarch64_ptest<mode>"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC [(match_operand:VNx16BI 0 "register_operand" "Upa")
! 			(match_operand 1)
! 			(match_operand:SI 2 "aarch64_sve_ptrue_flag")
! 			(match_operand:PRED_ALL 3 "register_operand" "Upa")]
! 		       UNSPEC_PTEST))]
!   "TARGET_SVE"
!   "ptest\t%0, %3.b"
  )
  
+ ;; =========================================================================
+ ;; == Reductions
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT,FP] Conditional reductions
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - CLASTA
+ ;; - CLASTB
+ ;; -------------------------------------------------------------------------
+ 
  ;; Set operand 0 to the last active element in operand 3, or to tied
  ;; operand 1 if no elements are active.
! (define_insn "@fold_extract_<last_op>_<mode>"
!   [(set (match_operand:<VEL> 0 "register_operand" "=?r, w")
  	(unspec:<VEL>
  	  [(match_operand:<VEL> 1 "register_operand" "0, 0")
  	   (match_operand:<VPRED> 2 "register_operand" "Upl, Upl")
! 	   (match_operand:SVE_FULL 3 "register_operand" "w, w")]
! 	  CLAST))]
    "TARGET_SVE"
    "@
!    clast<ab>\t%<vwcore>0, %2, %<vwcore>0, %3.<Vetype>
!    clast<ab>\t%<Vetype>0, %2, %<Vetype>0, %3.<Vetype>"
  )
  
+ (define_insn "@aarch64_fold_extract_vector_<last_op>_<mode>"
+   [(set (match_operand:SVE_FULL 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL
+ 	  [(match_operand:SVE_FULL 1 "register_operand" "0, w")
+ 	   (match_operand:<VPRED> 2 "register_operand" "Upl, Upl")
+ 	   (match_operand:SVE_FULL 3 "register_operand" "w, w")]
+ 	  CLAST))]
+   "TARGET_SVE"
+   "@
+    clast<ab>\t%0.<Vetype>, %2, %0.<Vetype>, %3.<Vetype>
+    movprfx\t%0, %1\;clast<ab>\t%0.<Vetype>, %2, %0.<Vetype>, %3.<Vetype>"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Tree reductions
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - ANDV
+ ;; - EORV
+ ;; - ORV
+ ;; - SADDV
+ ;; - SMAXV
+ ;; - SMINV
+ ;; - UADDV
+ ;; - UMAXV
+ ;; - UMINV
+ ;; -------------------------------------------------------------------------
+ 
  ;; Unpredicated integer add reduction.
  (define_expand "reduc_plus_scal_<mode>"
!   [(match_operand:<VEL> 0 "register_operand")
!    (match_operand:SVE_FULL_I 1 "register_operand")]
    "TARGET_SVE"
    {
!     rtx pred = aarch64_ptrue_reg (<VPRED>mode);
!     rtx tmp = <VEL>mode == DImode ? operands[0] : gen_reg_rtx (DImode);
!     emit_insn (gen_aarch64_pred_reduc_uadd_<mode> (tmp, pred, operands[1]));
!     if (tmp != operands[0])
!       emit_move_insn (operands[0], gen_lowpart (<VEL>mode, tmp));
!     DONE;
    }
  )
  
  ;; Predicated integer add reduction.  The result is always 64-bits.
! (define_insn "@aarch64_pred_reduc_<optab>_<mode>"
!   [(set (match_operand:DI 0 "register_operand" "=w")
! 	(unspec:DI [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 		    (match_operand:SVE_FULL_I 2 "register_operand" "w")]
! 		   SVE_INT_ADDV))]
!   "TARGET_SVE && <max_elem_bits> >= <elem_bits>"
!   "<su>addv\t%d0, %1, %2.<Vetype>"
  )
  
! ;; Unpredicated integer reductions.
! (define_expand "reduc_<optab>_scal_<mode>"
    [(set (match_operand:<VEL> 0 "register_operand")
  	(unspec:<VEL> [(match_dup 2)
! 		       (match_operand:SVE_FULL_I 1 "register_operand")]
! 		      SVE_INT_REDUCTION))]
    "TARGET_SVE"
    {
!     operands[2] = aarch64_ptrue_reg (<VPRED>mode);
    }
  )
  
! ;; Predicated integer reductions.
! (define_insn "@aarch64_pred_reduc_<optab>_<mode>"
    [(set (match_operand:<VEL> 0 "register_operand" "=w")
  	(unspec:<VEL> [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 		       (match_operand:SVE_FULL_I 2 "register_operand" "w")]
! 		      SVE_INT_REDUCTION))]
    "TARGET_SVE"
!   "<sve_int_op>\t%<Vetype>0, %1, %2.<Vetype>"
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Tree reductions
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FADDV
! ;; - FMAXNMV
! ;; - FMAXV
! ;; - FMINNMV
! ;; - FMINV
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated floating-point tree reductions.
! (define_expand "reduc_<optab>_scal_<mode>"
    [(set (match_operand:<VEL> 0 "register_operand")
  	(unspec:<VEL> [(match_dup 2)
! 		       (match_operand:SVE_FULL_F 1 "register_operand")]
! 		      SVE_FP_REDUCTION))]
    "TARGET_SVE"
    {
!     operands[2] = aarch64_ptrue_reg (<VPRED>mode);
    }
  )
  
! ;; Predicated floating-point tree reductions.
! (define_insn "@aarch64_pred_reduc_<optab>_<mode>"
    [(set (match_operand:<VEL> 0 "register_operand" "=w")
  	(unspec:<VEL> [(match_operand:<VPRED> 1 "register_operand" "Upl")
! 		       (match_operand:SVE_FULL_F 2 "register_operand" "w")]
! 		      SVE_FP_REDUCTION))]
    "TARGET_SVE"
!   "<sve_fp_op>\t%<Vetype>0, %1, %2.<Vetype>"
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [FP] Left-to-right reductions
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FADDA
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated in-order FP reductions.
! (define_expand "fold_left_plus_<mode>"
    [(set (match_operand:<VEL> 0 "register_operand")
! 	(unspec:<VEL> [(match_dup 3)
! 		       (match_operand:<VEL> 1 "register_operand")
! 		       (match_operand:SVE_FULL_F 2 "register_operand")]
! 		      UNSPEC_FADDA))]
    "TARGET_SVE"
    {
!     operands[3] = aarch64_ptrue_reg (<VPRED>mode);
    }
  )
  
! ;; Predicated in-order FP reductions.
! (define_insn "mask_fold_left_plus_<mode>"
    [(set (match_operand:<VEL> 0 "register_operand" "=w")
! 	(unspec:<VEL> [(match_operand:<VPRED> 3 "register_operand" "Upl")
! 		       (match_operand:<VEL> 1 "register_operand" "0")
! 		       (match_operand:SVE_FULL_F 2 "register_operand" "w")]
! 		      UNSPEC_FADDA))]
    "TARGET_SVE"
!   "fadda\t%<Vetype>0, %3, %<Vetype>0, %2.<Vetype>"
  )
  
! ;; =========================================================================
! ;; == Permutes
! ;; =========================================================================
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT,FP] General permutes
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - TBL
! ;; -------------------------------------------------------------------------
! 
! (define_expand "vec_perm<mode>"
!   [(match_operand:SVE_FULL 0 "register_operand")
!    (match_operand:SVE_FULL 1 "register_operand")
!    (match_operand:SVE_FULL 2 "register_operand")
!    (match_operand:<V_INT_EQUIV> 3 "aarch64_sve_vec_perm_operand")]
!   "TARGET_SVE && GET_MODE_NUNITS (<MODE>mode).is_constant ()"
!   {
!     aarch64_expand_sve_vec_perm (operands[0], operands[1],
! 				 operands[2], operands[3]);
!     DONE;
!   }
! )
! 
! (define_insn "@aarch64_sve_tbl<mode>"
!   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
! 	(unspec:SVE_FULL
! 	  [(match_operand:SVE_FULL 1 "register_operand" "w")
! 	   (match_operand:<V_INT_EQUIV> 2 "register_operand" "w")]
! 	  UNSPEC_TBL))]
    "TARGET_SVE"
+   "tbl\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT,FP] Special-purpose unary permutes
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - COMPACT
+ ;; - DUP
+ ;; - REV
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Compact active elements and pad with zeros.
+ (define_insn "@aarch64_sve_compact<mode>"
+   [(set (match_operand:SVE_FULL_SD 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_SD
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
+ 	   (match_operand:SVE_FULL_SD 2 "register_operand" "w")]
+ 	  UNSPEC_SVE_COMPACT))]
+   "TARGET_SVE"
+   "compact\t%0.<Vetype>, %1, %2.<Vetype>"
+ )
+ 
+ ;; Duplicate one element of a vector.
+ (define_insn "@aarch64_sve_dup_lane<mode>"
+   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
+ 	(vec_duplicate:SVE_FULL
+ 	  (vec_select:<VEL>
+ 	    (match_operand:SVE_FULL 1 "register_operand" "w")
+ 	    (parallel [(match_operand:SI 2 "const_int_operand")]))))]
+   "TARGET_SVE
+    && IN_RANGE (INTVAL (operands[2]) * GET_MODE_SIZE (<VEL>mode), 0, 63)"
+   "dup\t%0.<Vetype>, %1.<Vetype>[%2]"
+ )
+ 
+ ;; Use DUP.Q to duplicate a 128-bit segment of a register.
+ ;;
+ ;; The vec_select:<V128> sets memory lane number N of the V128 to lane
+ ;; number op2 + N of op1.  (We don't need to distinguish between memory
+ ;; and architectural register lane numbering for op1 or op0, since the
+ ;; two numbering schemes are the same for SVE.)
+ ;;
+ ;; The vec_duplicate:SVE_FULL then copies memory lane number N of the
+ ;; V128 (and thus lane number op2 + N of op1) to lane numbers N + I * STEP
+ ;; of op0.  We therefore get the correct result for both endiannesses.
+ ;;
+ ;; The wrinkle is that for big-endian V128 registers, memory lane numbering
+ ;; is in the opposite order to architectural register lane numbering.
+ ;; Thus if we were to do this operation via a V128 temporary register,
+ ;; the vec_select and vec_duplicate would both involve a reverse operation
+ ;; for big-endian targets.  In this fused pattern the two reverses cancel
+ ;; each other out.
+ (define_insn "@aarch64_sve_dupq_lane<mode>"
+   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
+ 	(vec_duplicate:SVE_FULL
+ 	  (vec_select:<V128>
+ 	    (match_operand:SVE_FULL 1 "register_operand" "w")
+ 	    (match_operand 2 "ascending_int_parallel"))))]
+   "TARGET_SVE
+    && (INTVAL (XVECEXP (operands[2], 0, 0))
+        * GET_MODE_SIZE (<VEL>mode)) % 16 == 0
+    && IN_RANGE (INTVAL (XVECEXP (operands[2], 0, 0))
+ 		* GET_MODE_SIZE (<VEL>mode), 0, 63)"
    {
!     unsigned int byte = (INTVAL (XVECEXP (operands[2], 0, 0))
! 			 * GET_MODE_SIZE (<VEL>mode));
!     operands[2] = gen_int_mode (byte / 16, DImode);
!     return "dup\t%0.q, %1.q[%2]";
    }
  )
  
! ;; Reverse the order of elements within a full vector.
! (define_insn "@aarch64_sve_rev<mode>"
!   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
! 	(unspec:SVE_FULL
! 	  [(match_operand:SVE_FULL 1 "register_operand" "w")]
! 	  UNSPEC_REV))]
    "TARGET_SVE"
!   "rev\t%0.<Vetype>, %1.<Vetype>")
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT,FP] Special-purpose binary permutes
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - SPLICE
! ;; - TRN1
! ;; - TRN2
! ;; - UZP1
! ;; - UZP2
! ;; - ZIP1
! ;; - ZIP2
! ;; -------------------------------------------------------------------------
! 
! ;; Like EXT, but start at the first active element.
! (define_insn "@aarch64_sve_splice<mode>"
!   [(set (match_operand:SVE_FULL 0 "register_operand" "=w, ?&w")
! 	(unspec:SVE_FULL
! 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
! 	   (match_operand:SVE_FULL 2 "register_operand" "0, w")
! 	   (match_operand:SVE_FULL 3 "register_operand" "w, w")]
! 	  UNSPEC_SVE_SPLICE))]
!   "TARGET_SVE"
!   "@
!    splice\t%0.<Vetype>, %1, %0.<Vetype>, %3.<Vetype>
!    movprfx\t%0, %2\;splice\t%0.<Vetype>, %1, %0.<Vetype>, %3.<Vetype>"
!   [(set_attr "movprfx" "*, yes")]
  )
  
! ;; Permutes that take half the elements from one vector and half the
! ;; elements from the other.
! (define_insn "@aarch64_sve_<perm_insn><mode>"
!   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
! 	(unspec:SVE_FULL
! 	  [(match_operand:SVE_FULL 1 "register_operand" "w")
! 	   (match_operand:SVE_FULL 2 "register_operand" "w")]
! 	  PERMUTE))]
    "TARGET_SVE"
+   "<perm_insn>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
+ )
+ 
+ ;; Apply PERMUTE to 128-bit sequences.  The behavior of these patterns
+ ;; doesn't depend on the mode.
+ (define_insn "@aarch64_sve_<optab><mode>"
+   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL
+ 	  [(match_operand:SVE_FULL 1 "register_operand" "w")
+ 	   (match_operand:SVE_FULL 2 "register_operand" "w")]
+ 	  PERMUTEQ))]
+   "TARGET_SVE_F64MM"
+   "<perm_insn>\t%0.q, %1.q, %2.q"
+ )
+ 
+ ;; Concatenate two vectors and extract a subvector.  Note that the
+ ;; immediate (third) operand is the lane index not the byte index.
+ (define_insn "@aarch64_sve_ext<mode>"
+   [(set (match_operand:SVE_FULL 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL
+ 	  [(match_operand:SVE_FULL 1 "register_operand" "0, w")
+ 	   (match_operand:SVE_FULL 2 "register_operand" "w, w")
+ 	   (match_operand:SI 3 "const_int_operand")]
+ 	  UNSPEC_EXT))]
+   "TARGET_SVE
+    && IN_RANGE (INTVAL (operands[3]) * GET_MODE_SIZE (<VEL>mode), 0, 255)"
    {
!     operands[3] = GEN_INT (INTVAL (operands[3]) * GET_MODE_SIZE (<VEL>mode));
!     return (which_alternative == 0
! 	    ? "ext\\t%0.b, %0.b, %2.b, #%3"
! 	    : "movprfx\t%0, %1\;ext\\t%0.b, %0.b, %2.b, #%3");
    }
+   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [PRED] Special-purpose unary permutes
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - REV
! ;; -------------------------------------------------------------------------
! 
! (define_insn "@aarch64_sve_rev<mode>"
!   [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
! 	(unspec:PRED_ALL [(match_operand:PRED_ALL 1 "register_operand" "Upa")]
! 			 UNSPEC_REV))]
    "TARGET_SVE"
!   "rev\t%0.<Vetype>, %1.<Vetype>")
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [PRED] Special-purpose binary permutes
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - TRN1
! ;; - TRN2
! ;; - UZP1
! ;; - UZP2
! ;; - ZIP1
! ;; - ZIP2
! ;; -------------------------------------------------------------------------
! 
! ;; Permutes that take half the elements from one vector and half the
! ;; elements from the other.
! (define_insn "@aarch64_sve_<perm_insn><mode>"
!   [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
! 	(unspec:PRED_ALL [(match_operand:PRED_ALL 1 "register_operand" "Upa")
! 			  (match_operand:PRED_ALL 2 "register_operand" "Upa")]
! 			 PERMUTE))]
!   "TARGET_SVE"
!   "<perm_insn>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
  )
  
! ;; =========================================================================
! ;; == Conversions
! ;; =========================================================================
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT<-INT] Packs
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - UZP1
! ;; -------------------------------------------------------------------------
! 
! ;; Integer pack.  Use UZP1 on the narrower type, which discards
! ;; the high part of each wide element.
! (define_insn "vec_pack_trunc_<Vwide>"
!   [(set (match_operand:SVE_FULL_BHSI 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_BHSI
! 	  [(match_operand:<VWIDE> 1 "register_operand" "w")
! 	   (match_operand:<VWIDE> 2 "register_operand" "w")]
! 	  UNSPEC_PACK))]
    "TARGET_SVE"
!   "uzp1\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT<-INT] Unpacks
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - SUNPKHI
! ;; - SUNPKLO
! ;; - UUNPKHI
! ;; - UUNPKLO
! ;; -------------------------------------------------------------------------
! 
! ;; Unpack the low or high half of a vector, where "high" refers to
! ;; the low-numbered lanes for big-endian and the high-numbered lanes
! ;; for little-endian.
! (define_expand "vec_unpack<su>_<perm_hilo>_<SVE_FULL_BHSI:mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (unspec:<VWIDE>
!      [(match_operand:SVE_FULL_BHSI 1 "register_operand")] UNPACK)]
    "TARGET_SVE"
    {
!     emit_insn ((<hi_lanes_optab>
! 		? gen_aarch64_sve_<su>unpkhi_<SVE_FULL_BHSI:mode>
! 		: gen_aarch64_sve_<su>unpklo_<SVE_FULL_BHSI:mode>)
! 	       (operands[0], operands[1]));
!     DONE;
    }
  )
  
! (define_insn "@aarch64_sve_<su>unpk<perm_hilo>_<SVE_FULL_BHSI:mode>"
!   [(set (match_operand:<VWIDE> 0 "register_operand" "=w")
! 	(unspec:<VWIDE>
! 	  [(match_operand:SVE_FULL_BHSI 1 "register_operand" "w")]
! 	  UNPACK))]
    "TARGET_SVE"
!   "<su>unpk<perm_hilo>\t%0.<Vewtype>, %1.<Vetype>"
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT<-FP] Conversions
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FCVTZS
! ;; - FCVTZU
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated conversion of floats to integers of the same size (HF to HI,
! ;; SF to SI or DF to DI).
! (define_expand "<optab><mode><v_int_equiv>2"
!   [(set (match_operand:<V_INT_EQUIV> 0 "register_operand")
! 	(unspec:<V_INT_EQUIV>
! 	  [(match_dup 2)
! 	   (const_int SVE_RELAXED_GP)
! 	   (match_operand:SVE_FULL_F 1 "register_operand")]
! 	  SVE_COND_FCVTI))]
    "TARGET_SVE"
    {
!     operands[2] = aarch64_ptrue_reg (<VPRED>mode);
    }
  )
  
! ;; Predicated float-to-integer conversion, either to the same width or wider.
! (define_insn "@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>"
!   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_HSDI
! 	  [(match_operand:<SVE_FULL_HSDI:VPRED> 1 "register_operand" "Upl")
! 	   (match_operand:SI 3 "aarch64_sve_gp_strictness")
! 	   (match_operand:SVE_FULL_F 2 "register_operand" "w")]
! 	  SVE_COND_FCVTI))]
!   "TARGET_SVE && <SVE_FULL_HSDI:elem_bits> >= <SVE_FULL_F:elem_bits>"
!   "fcvtz<su>\t%0.<SVE_FULL_HSDI:Vetype>, %1/m, %2.<SVE_FULL_F:Vetype>"
! )
! 
! ;; Predicated narrowing float-to-integer conversion.
! (define_insn "@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>"
!   [(set (match_operand:VNx4SI_ONLY 0 "register_operand" "=w")
! 	(unspec:VNx4SI_ONLY
! 	  [(match_operand:VNx2BI 1 "register_operand" "Upl")
! 	   (match_operand:SI 3 "aarch64_sve_gp_strictness")
! 	   (match_operand:VNx2DF_ONLY 2 "register_operand" "w")]
! 	  SVE_COND_FCVTI))]
!   "TARGET_SVE"
!   "fcvtz<su>\t%0.<VNx4SI_ONLY:Vetype>, %1/m, %2.<VNx2DF_ONLY:Vetype>"
! )
! 
! ;; Predicated float-to-integer conversion with merging, either to the same
! ;; width or wider.
! (define_expand "@cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>"
!   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand")
! 	(unspec:SVE_FULL_HSDI
! 	  [(match_operand:<SVE_FULL_HSDI:VPRED> 1 "register_operand")
! 	   (unspec:SVE_FULL_HSDI
! 	     [(match_dup 1)
! 	      (const_int SVE_STRICT_GP)
! 	      (match_operand:SVE_FULL_F 2 "register_operand")]
! 	     SVE_COND_FCVTI)
! 	   (match_operand:SVE_FULL_HSDI 3 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && <SVE_FULL_HSDI:elem_bits> >= <SVE_FULL_F:elem_bits>"
! )
! 
! ;; The first alternative doesn't need the earlyclobber, but the only case
! ;; it would help is the uninteresting one in which operands 2 and 3 are
! ;; the same register (despite having different modes).  Making all the
! ;; alternatives earlyclobber makes things more consistent for the
! ;; register allocator.
! (define_insn_and_rewrite "*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>"
!   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=&w, &w, ?&w")
! 	(unspec:SVE_FULL_HSDI
! 	  [(match_operand:<SVE_FULL_HSDI:VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_HSDI
! 	     [(match_operand 4)
! 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_F 2 "register_operand" "w, w, w")]
! 	     SVE_COND_FCVTI)
! 	   (match_operand:SVE_FULL_HSDI 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE
!    && <SVE_FULL_HSDI:elem_bits> >= <SVE_FULL_F:elem_bits>
!    && aarch64_sve_pred_dominates_p (&operands[4], operands[1])"
    "@
!    fcvtz<su>\t%0.<SVE_FULL_HSDI:Vetype>, %1/m, %2.<SVE_FULL_F:Vetype>
!    movprfx\t%0.<SVE_FULL_HSDI:Vetype>, %1/z, %2.<SVE_FULL_HSDI:Vetype>\;fcvtz<su>\t%0.<SVE_FULL_HSDI:Vetype>, %1/m, %2.<SVE_FULL_F:Vetype>
!    movprfx\t%0, %3\;fcvtz<su>\t%0.<SVE_FULL_HSDI:Vetype>, %1/m, %2.<SVE_FULL_F:Vetype>"
!   "&& !rtx_equal_p (operands[1], operands[4])"
!   {
!     operands[4] = copy_rtx (operands[1]);
!   }
!   [(set_attr "movprfx" "*,yes,yes")]
  )
  
! ;; Predicated narrowing float-to-integer conversion with merging.
! (define_expand "@cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>"
!   [(set (match_operand:VNx4SI_ONLY 0 "register_operand")
! 	(unspec:VNx4SI_ONLY
! 	  [(match_operand:VNx2BI 1 "register_operand")
! 	   (unspec:VNx4SI_ONLY
! 	     [(match_dup 1)
! 	      (const_int SVE_STRICT_GP)
! 	      (match_operand:VNx2DF_ONLY 2 "register_operand")]
! 	     SVE_COND_FCVTI)
! 	   (match_operand:VNx4SI_ONLY 3 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
! )
! 
! (define_insn "*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>"
!   [(set (match_operand:VNx4SI_ONLY 0 "register_operand" "=&w, &w, ?&w")
! 	(unspec:VNx4SI_ONLY
! 	  [(match_operand:VNx2BI 1 "register_operand" "Upl, Upl, Upl")
! 	   (unspec:VNx4SI_ONLY
! 	     [(match_dup 1)
! 	      (match_operand:SI 4 "aarch64_sve_gp_strictness")
! 	      (match_operand:VNx2DF_ONLY 2 "register_operand" "w, w, w")]
! 	     SVE_COND_FCVTI)
! 	   (match_operand:VNx4SI_ONLY 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
!   "@
!    fcvtz<su>\t%0.<VNx4SI_ONLY:Vetype>, %1/m, %2.<VNx2DF_ONLY:Vetype>
!    movprfx\t%0.<VNx2DF_ONLY:Vetype>, %1/z, %2.<VNx2DF_ONLY:Vetype>\;fcvtz<su>\t%0.<VNx4SI_ONLY:Vetype>, %1/m, %2.<VNx2DF_ONLY:Vetype>
!    movprfx\t%0, %3\;fcvtz<su>\t%0.<VNx4SI_ONLY:Vetype>, %1/m, %2.<VNx2DF_ONLY:Vetype>"
!   [(set_attr "movprfx" "*,yes,yes")]
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT<-FP] Packs
! ;; -------------------------------------------------------------------------
! ;; The patterns in this section are synthetic.
! ;; -------------------------------------------------------------------------
! 
! ;; Convert two vectors of DF to SI and pack the results into a single vector.
! (define_expand "vec_pack_<su>fix_trunc_vnx2df"
!   [(set (match_dup 4)
! 	(unspec:VNx4SI
  	  [(match_dup 3)
! 	   (const_int SVE_RELAXED_GP)
! 	   (match_operand:VNx2DF 1 "register_operand")]
! 	  SVE_COND_FCVTI))
!    (set (match_dup 5)
! 	(unspec:VNx4SI
! 	  [(match_dup 3)
! 	   (const_int SVE_RELAXED_GP)
! 	   (match_operand:VNx2DF 2 "register_operand")]
! 	  SVE_COND_FCVTI))
!    (set (match_operand:VNx4SI 0 "register_operand")
! 	(unspec:VNx4SI [(match_dup 4) (match_dup 5)] UNSPEC_UZP1))]
    "TARGET_SVE"
    {
!     operands[3] = aarch64_ptrue_reg (VNx2BImode);
!     operands[4] = gen_reg_rtx (VNx4SImode);
!     operands[5] = gen_reg_rtx (VNx4SImode);
    }
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT<-FP] Unpacks
! ;; -------------------------------------------------------------------------
! ;; No patterns here yet!
! ;; -------------------------------------------------------------------------
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP<-INT] Conversions
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - SCVTF
! ;; - UCVTF
! ;; -------------------------------------------------------------------------
! 
! ;; Unpredicated conversion of integers to floats of the same size
! ;; (HI to HF, SI to SF or DI to DF).
! (define_expand "<optab><v_int_equiv><mode>2"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand")
! 	(unspec:SVE_FULL_F
! 	  [(match_dup 2)
! 	   (const_int SVE_RELAXED_GP)
! 	   (match_operand:<V_INT_EQUIV> 1 "register_operand")]
! 	  SVE_COND_ICVTF))]
    "TARGET_SVE"
!   {
!     operands[2] = aarch64_ptrue_reg (<VPRED>mode);
!   }
  )
  
! ;; Predicated integer-to-float conversion, either to the same width or
! ;; narrower.
! (define_insn "@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>"
!   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_F
! 	  [(match_operand:<SVE_FULL_HSDI:VPRED> 1 "register_operand" "Upl")
! 	   (match_operand:SI 3 "aarch64_sve_gp_strictness")
! 	   (match_operand:SVE_FULL_HSDI 2 "register_operand" "w")]
! 	  SVE_COND_ICVTF))]
!   "TARGET_SVE && <SVE_FULL_HSDI:elem_bits> >= <SVE_FULL_F:elem_bits>"
!   "<su>cvtf\t%0.<SVE_FULL_F:Vetype>, %1/m, %2.<SVE_FULL_HSDI:Vetype>"
! )
  
! ;; Predicated widening integer-to-float conversion.
! (define_insn "@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>"
!   [(set (match_operand:VNx2DF_ONLY 0 "register_operand" "=w")
! 	(unspec:VNx2DF_ONLY
! 	  [(match_operand:VNx2BI 1 "register_operand" "Upl")
! 	   (match_operand:SI 3 "aarch64_sve_gp_strictness")
! 	   (match_operand:VNx4SI_ONLY 2 "register_operand" "w")]
! 	  SVE_COND_ICVTF))]
    "TARGET_SVE"
+   "<su>cvtf\t%0.<VNx2DF_ONLY:Vetype>, %1/m, %2.<VNx4SI_ONLY:Vetype>"
+ )
+ 
+ ;; Predicated integer-to-float conversion with merging, either to the same
+ ;; width or narrower.
+ (define_expand "@cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>"
+   [(set (match_operand:SVE_FULL_F 0 "register_operand")
+ 	(unspec:SVE_FULL_F
+ 	  [(match_operand:<SVE_FULL_HSDI:VPRED> 1 "register_operand")
+ 	   (unspec:SVE_FULL_F
+ 	     [(match_dup 1)
+ 	      (const_int SVE_STRICT_GP)
+ 	      (match_operand:SVE_FULL_HSDI 2 "register_operand")]
+ 	     SVE_COND_ICVTF)
+ 	   (match_operand:SVE_FULL_F 3 "aarch64_simd_reg_or_zero")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE && <SVE_FULL_HSDI:elem_bits> >= <SVE_FULL_F:elem_bits>"
+ )
+ 
+ ;; The first alternative doesn't need the earlyclobber, but the only case
+ ;; it would help is the uninteresting one in which operands 2 and 3 are
+ ;; the same register (despite having different modes).  Making all the
+ ;; alternatives earlyclobber makes things more consistent for the
+ ;; register allocator.
+ (define_insn_and_rewrite "*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>"
+   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=&w, &w, ?&w")
+ 	(unspec:SVE_FULL_F
+ 	  [(match_operand:<SVE_FULL_HSDI:VPRED> 1 "register_operand" "Upl, Upl, Upl")
+ 	   (unspec:SVE_FULL_F
+ 	     [(match_operand 4)
+ 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
+ 	      (match_operand:SVE_FULL_HSDI 2 "register_operand" "w, w, w")]
+ 	     SVE_COND_ICVTF)
+ 	   (match_operand:SVE_FULL_F 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE
+    && <SVE_FULL_HSDI:elem_bits> >= <SVE_FULL_F:elem_bits>
+    && aarch64_sve_pred_dominates_p (&operands[4], operands[1])"
+   "@
+    <su>cvtf\t%0.<SVE_FULL_F:Vetype>, %1/m, %2.<SVE_FULL_HSDI:Vetype>
+    movprfx\t%0.<SVE_FULL_HSDI:Vetype>, %1/z, %2.<SVE_FULL_HSDI:Vetype>\;<su>cvtf\t%0.<SVE_FULL_F:Vetype>, %1/m, %2.<SVE_FULL_HSDI:Vetype>
+    movprfx\t%0, %3\;<su>cvtf\t%0.<SVE_FULL_F:Vetype>, %1/m, %2.<SVE_FULL_HSDI:Vetype>"
+   "&& !rtx_equal_p (operands[1], operands[4])"
    {
!     operands[4] = copy_rtx (operands[1]);
    }
+   [(set_attr "movprfx" "*,yes,yes")]
  )
  
! ;; Predicated widening integer-to-float conversion with merging.
! (define_expand "@cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>"
!   [(set (match_operand:VNx2DF_ONLY 0 "register_operand")
! 	(unspec:VNx2DF_ONLY
! 	  [(match_operand:VNx2BI 1 "register_operand")
! 	   (unspec:VNx2DF_ONLY
! 	     [(match_dup 1)
! 	      (const_int SVE_STRICT_GP)
! 	      (match_operand:VNx4SI_ONLY 2 "register_operand")]
! 	     SVE_COND_ICVTF)
! 	   (match_operand:VNx2DF_ONLY 3 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE"
! )
! 
! (define_insn "*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>"
!   [(set (match_operand:VNx2DF_ONLY 0 "register_operand" "=w, ?&w, ?&w")
! 	(unspec:VNx2DF_ONLY
! 	  [(match_operand:VNx2BI 1 "register_operand" "Upl, Upl, Upl")
! 	   (unspec:VNx2DF_ONLY
! 	     [(match_dup 1)
! 	      (match_operand:SI 4 "aarch64_sve_gp_strictness")
! 	      (match_operand:VNx4SI_ONLY 2 "register_operand" "w, w, w")]
! 	     SVE_COND_ICVTF)
! 	   (match_operand:VNx2DF_ONLY 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
! 	  UNSPEC_SEL))]
    "TARGET_SVE"
    "@
!    <su>cvtf\t%0.<VNx2DF_ONLY:Vetype>, %1/m, %2.<VNx4SI_ONLY:Vetype>
!    movprfx\t%0.<VNx2DF_ONLY:Vetype>, %1/z, %2.<VNx2DF_ONLY:Vetype>\;<su>cvtf\t%0.<VNx2DF_ONLY:Vetype>, %1/m, %2.<VNx4SI_ONLY:Vetype>
!    movprfx\t%0, %3\;<su>cvtf\t%0.<VNx2DF_ONLY:Vetype>, %1/m, %2.<VNx4SI_ONLY:Vetype>"
!   [(set_attr "movprfx" "*,yes,yes")]
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [FP<-INT] Packs
! ;; -------------------------------------------------------------------------
! ;; No patterns here yet!
! ;; -------------------------------------------------------------------------
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP<-INT] Unpacks
! ;; -------------------------------------------------------------------------
! ;; The patterns in this section are synthetic.
! ;; -------------------------------------------------------------------------
! 
! ;; Unpack one half of a VNx4SI to VNx2DF.  First unpack from VNx4SI
! ;; to VNx2DI, reinterpret the VNx2DI as a VNx4SI, then convert the
! ;; unpacked VNx4SI to VNx2DF.
! (define_expand "vec_unpack<su_optab>_float_<perm_hilo>_vnx4si"
!   [(match_operand:VNx2DF 0 "register_operand")
!    (FLOATUORS:VNx2DF
!      (unspec:VNx2DI [(match_operand:VNx4SI 1 "register_operand")]
! 		    UNPACK_UNSIGNED))]
    "TARGET_SVE"
    {
!     /* Use ZIP to do the unpack, since we don't care about the upper halves
!        and since it has the nice property of not needing any subregs.
!        If using UUNPK* turns out to be preferable, we could model it as
!        a ZIP whose first operand is zero.  */
!     rtx temp = gen_reg_rtx (VNx4SImode);
!     emit_insn ((<hi_lanes_optab>
! 		? gen_aarch64_sve_zip2vnx4si
! 		: gen_aarch64_sve_zip1vnx4si)
! 	       (temp, operands[1], operands[1]));
!     rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
!     rtx strictness = gen_int_mode (SVE_RELAXED_GP, SImode);
!     emit_insn (gen_aarch64_sve_<FLOATUORS:optab>_extendvnx4sivnx2df
! 	       (operands[0], ptrue, temp, strictness));
!     DONE;
    }
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [FP<-FP] Packs
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FCVT
! ;; -------------------------------------------------------------------------
! 
! ;; Convert two vectors of DF to SF, or two vectors of SF to HF, and pack
! ;; the results into a single vector.
! (define_expand "vec_pack_trunc_<Vwide>"
!   [(set (match_dup 4)
! 	(unspec:SVE_FULL_HSF
! 	  [(match_dup 3)
! 	   (const_int SVE_RELAXED_GP)
! 	   (match_operand:<VWIDE> 1 "register_operand")]
! 	  UNSPEC_COND_FCVT))
!    (set (match_dup 5)
! 	(unspec:SVE_FULL_HSF
! 	  [(match_dup 3)
! 	   (const_int SVE_RELAXED_GP)
! 	   (match_operand:<VWIDE> 2 "register_operand")]
! 	  UNSPEC_COND_FCVT))
!    (set (match_operand:SVE_FULL_HSF 0 "register_operand")
! 	(unspec:SVE_FULL_HSF [(match_dup 4) (match_dup 5)] UNSPEC_UZP1))]
    "TARGET_SVE"
+   {
+     operands[3] = aarch64_ptrue_reg (<VWIDE_PRED>mode);
+     operands[4] = gen_reg_rtx (<MODE>mode);
+     operands[5] = gen_reg_rtx (<MODE>mode);
+   }
+ )
+ 
+ ;; Predicated float-to-float truncation.
+ (define_insn "@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>"
+   [(set (match_operand:SVE_FULL_HSF 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_HSF
+ 	  [(match_operand:<SVE_FULL_SDF:VPRED> 1 "register_operand" "Upl")
+ 	   (match_operand:SI 3 "aarch64_sve_gp_strictness")
+ 	   (match_operand:SVE_FULL_SDF 2 "register_operand" "w")]
+ 	  SVE_COND_FCVT))]
+   "TARGET_SVE && <SVE_FULL_SDF:elem_bits> > <SVE_FULL_HSF:elem_bits>"
+   "fcvt\t%0.<SVE_FULL_HSF:Vetype>, %1/m, %2.<SVE_FULL_SDF:Vetype>"
+ )
+ 
+ ;; Predicated float-to-float truncation with merging.
+ (define_expand "@cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>"
+   [(set (match_operand:SVE_FULL_HSF 0 "register_operand")
+ 	(unspec:SVE_FULL_HSF
+ 	  [(match_operand:<SVE_FULL_SDF:VPRED> 1 "register_operand")
+ 	   (unspec:SVE_FULL_HSF
+ 	     [(match_dup 1)
+ 	      (const_int SVE_STRICT_GP)
+ 	      (match_operand:SVE_FULL_SDF 2 "register_operand")]
+ 	     SVE_COND_FCVT)
+ 	   (match_operand:SVE_FULL_HSF 3 "aarch64_simd_reg_or_zero")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE && <SVE_FULL_SDF:elem_bits> > <SVE_FULL_HSF:elem_bits>"
+ )
+ 
+ (define_insn "*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>"
+   [(set (match_operand:SVE_FULL_HSF 0 "register_operand" "=w, ?&w, ?&w")
+ 	(unspec:SVE_FULL_HSF
+ 	  [(match_operand:<SVE_FULL_SDF:VPRED> 1 "register_operand" "Upl, Upl, Upl")
+ 	   (unspec:SVE_FULL_HSF
+ 	     [(match_dup 1)
+ 	      (match_operand:SI 4 "aarch64_sve_gp_strictness")
+ 	      (match_operand:SVE_FULL_SDF 2 "register_operand" "w, w, w")]
+ 	     SVE_COND_FCVT)
+ 	   (match_operand:SVE_FULL_HSF 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE && <SVE_FULL_SDF:elem_bits> > <SVE_FULL_HSF:elem_bits>"
    "@
!    fcvt\t%0.<SVE_FULL_HSF:Vetype>, %1/m, %2.<SVE_FULL_SDF:Vetype>
!    movprfx\t%0.<SVE_FULL_SDF:Vetype>, %1/z, %2.<SVE_FULL_SDF:Vetype>\;fcvt\t%0.<SVE_FULL_HSF:Vetype>, %1/m, %2.<SVE_FULL_SDF:Vetype>
!    movprfx\t%0, %3\;fcvt\t%0.<SVE_FULL_HSF:Vetype>, %1/m, %2.<SVE_FULL_SDF:Vetype>"
!   [(set_attr "movprfx" "*,yes,yes")]
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [FP<-FP] Packs (bfloat16)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - BFCVT (BF16)
! ;; - BFCVTNT (BF16)
! ;; -------------------------------------------------------------------------
! 
! ;; Predicated BFCVT.
! (define_insn "@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>"
!   [(set (match_operand:VNx8BF_ONLY 0 "register_operand" "=w")
! 	(unspec:VNx8BF_ONLY
! 	  [(match_operand:VNx4BI 1 "register_operand" "Upl")
! 	   (match_operand:SI 3 "aarch64_sve_gp_strictness")
! 	   (match_operand:VNx4SF_ONLY 2 "register_operand" "w")]
! 	  SVE_COND_FCVT))]
!   "TARGET_SVE_BF16"
!   "bfcvt\t%0.h, %1/m, %2.s"
! )
! 
! ;; Predicated BFCVT with merging.
! (define_expand "@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>"
!   [(set (match_operand:VNx8BF_ONLY 0 "register_operand")
! 	(unspec:VNx8BF_ONLY
! 	  [(match_operand:VNx4BI 1 "register_operand")
! 	   (unspec:VNx8BF_ONLY
! 	     [(match_dup 1)
! 	      (const_int SVE_STRICT_GP)
! 	      (match_operand:VNx4SF_ONLY 2 "register_operand")]
! 	     SVE_COND_FCVT)
! 	   (match_operand:VNx8BF_ONLY 3 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE_BF16"
! )
! 
! (define_insn "*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>"
!   [(set (match_operand:VNx8BF_ONLY 0 "register_operand" "=w, ?&w, ?&w")
! 	(unspec:VNx8BF_ONLY
! 	  [(match_operand:VNx4BI 1 "register_operand" "Upl, Upl, Upl")
! 	   (unspec:VNx8BF_ONLY
! 	     [(match_dup 1)
! 	      (match_operand:SI 4 "aarch64_sve_gp_strictness")
! 	      (match_operand:VNx4SF_ONLY 2 "register_operand" "w, w, w")]
! 	     SVE_COND_FCVT)
! 	   (match_operand:VNx8BF_ONLY 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE_BF16"
!   "@
!    bfcvt\t%0.h, %1/m, %2.s
!    movprfx\t%0.s, %1/z, %2.s\;bfcvt\t%0.h, %1/m, %2.s
!    movprfx\t%0, %3\;bfcvt\t%0.h, %1/m, %2.s"
!   [(set_attr "movprfx" "*,yes,yes")]
! )
! 
! ;; Predicated BFCVTNT.  This doesn't give a natural aarch64_pred_*/cond_*
! ;; pair because the even elements always have to be supplied for active
! ;; elements, even if the inactive elements don't matter.
! ;;
! ;; This instructions does not take MOVPRFX.
! (define_insn "@aarch64_sve_cvtnt<mode>"
!   [(set (match_operand:VNx8BF_ONLY 0 "register_operand" "=w")
! 	(unspec:VNx8BF_ONLY
! 	  [(match_operand:VNx4BI 2 "register_operand" "Upl")
! 	   (const_int SVE_STRICT_GP)
! 	   (match_operand:VNx8BF_ONLY 1 "register_operand" "0")
! 	   (match_operand:VNx4SF 3 "register_operand" "w")]
! 	  UNSPEC_COND_FCVTNT))]
!   "TARGET_SVE_BF16"
!   "bfcvtnt\t%0.h, %2/m, %3.s"
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [FP<-FP] Unpacks
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - FCVT
! ;; -------------------------------------------------------------------------
! 
! ;; Unpack one half of a VNx4SF to VNx2DF, or one half of a VNx8HF to VNx4SF.
! ;; First unpack the source without conversion, then float-convert the
! ;; unpacked source.
! (define_expand "vec_unpacks_<perm_hilo>_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (unspec:SVE_FULL_HSF
!      [(match_operand:SVE_FULL_HSF 1 "register_operand")]
!      UNPACK_UNSIGNED)]
    "TARGET_SVE"
    {
!     /* Use ZIP to do the unpack, since we don't care about the upper halves
!        and since it has the nice property of not needing any subregs.
!        If using UUNPK* turns out to be preferable, we could model it as
!        a ZIP whose first operand is zero.  */
!     rtx temp = gen_reg_rtx (<MODE>mode);
!     emit_insn ((<hi_lanes_optab>
! 		? gen_aarch64_sve_zip2<mode>
! 		: gen_aarch64_sve_zip1<mode>)
! 		(temp, operands[1], operands[1]));
!     rtx ptrue = aarch64_ptrue_reg (<VWIDE_PRED>mode);
!     rtx strictness = gen_int_mode (SVE_RELAXED_GP, SImode);
!     emit_insn (gen_aarch64_sve_fcvt_nontrunc<mode><Vwide>
! 	       (operands[0], ptrue, temp, strictness));
!     DONE;
    }
  )
  
! ;; Predicated float-to-float extension.
! (define_insn "@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>"
!   [(set (match_operand:SVE_FULL_SDF 0 "register_operand" "=w")
! 	(unspec:SVE_FULL_SDF
! 	  [(match_operand:<SVE_FULL_SDF:VPRED> 1 "register_operand" "Upl")
! 	   (match_operand:SI 3 "aarch64_sve_gp_strictness")
! 	   (match_operand:SVE_FULL_HSF 2 "register_operand" "w")]
! 	  SVE_COND_FCVT))]
!   "TARGET_SVE && <SVE_FULL_SDF:elem_bits> > <SVE_FULL_HSF:elem_bits>"
!   "fcvt\t%0.<SVE_FULL_SDF:Vetype>, %1/m, %2.<SVE_FULL_HSF:Vetype>"
! )
! 
! ;; Predicated float-to-float extension with merging.
! (define_expand "@cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>"
!   [(set (match_operand:SVE_FULL_SDF 0 "register_operand")
! 	(unspec:SVE_FULL_SDF
! 	  [(match_operand:<SVE_FULL_SDF:VPRED> 1 "register_operand")
! 	   (unspec:SVE_FULL_SDF
! 	     [(match_dup 1)
! 	      (const_int SVE_STRICT_GP)
! 	      (match_operand:SVE_FULL_HSF 2 "register_operand")]
! 	     SVE_COND_FCVT)
! 	   (match_operand:SVE_FULL_SDF 3 "aarch64_simd_reg_or_zero")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && <SVE_FULL_SDF:elem_bits> > <SVE_FULL_HSF:elem_bits>"
! )
! 
! (define_insn "*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>"
!   [(set (match_operand:SVE_FULL_SDF 0 "register_operand" "=w, ?&w, ?&w")
! 	(unspec:SVE_FULL_SDF
! 	  [(match_operand:<SVE_FULL_SDF:VPRED> 1 "register_operand" "Upl, Upl, Upl")
! 	   (unspec:SVE_FULL_SDF
! 	     [(match_dup 1)
! 	      (match_operand:SI 4 "aarch64_sve_gp_strictness")
! 	      (match_operand:SVE_FULL_HSF 2 "register_operand" "w, w, w")]
! 	     SVE_COND_FCVT)
! 	   (match_operand:SVE_FULL_SDF 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
! 	  UNSPEC_SEL))]
!   "TARGET_SVE && <SVE_FULL_SDF:elem_bits> > <SVE_FULL_HSF:elem_bits>"
    "@
!    fcvt\t%0.<SVE_FULL_SDF:Vetype>, %1/m, %2.<SVE_FULL_HSF:Vetype>
!    movprfx\t%0.<SVE_FULL_SDF:Vetype>, %1/z, %2.<SVE_FULL_SDF:Vetype>\;fcvt\t%0.<SVE_FULL_SDF:Vetype>, %1/m, %2.<SVE_FULL_HSF:Vetype>
!    movprfx\t%0, %3\;fcvt\t%0.<SVE_FULL_SDF:Vetype>, %1/m, %2.<SVE_FULL_HSF:Vetype>"
!   [(set_attr "movprfx" "*,yes,yes")]
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [PRED<-PRED] Packs
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - UZP1
! ;; -------------------------------------------------------------------------
! 
! ;; Predicate pack.  Use UZP1 on the narrower type, which discards
! ;; the high part of each wide element.
! (define_insn "vec_pack_trunc_<Vwide>"
!   [(set (match_operand:PRED_BHS 0 "register_operand" "=Upa")
! 	(unspec:PRED_BHS
! 	  [(match_operand:<VWIDE> 1 "register_operand" "Upa")
! 	   (match_operand:<VWIDE> 2 "register_operand" "Upa")]
! 	  UNSPEC_PACK))]
!   "TARGET_SVE"
!   "uzp1\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
! )
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [PRED<-PRED] Unpacks
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - PUNPKHI
! ;; - PUNPKLO
! ;; -------------------------------------------------------------------------
! 
! ;; Unpack the low or high half of a predicate, where "high" refers to
! ;; the low-numbered lanes for big-endian and the high-numbered lanes
! ;; for little-endian.
! (define_expand "vec_unpack<su>_<perm_hilo>_<mode>"
!   [(match_operand:<VWIDE> 0 "register_operand")
!    (unspec:<VWIDE> [(match_operand:PRED_BHS 1 "register_operand")]
! 		   UNPACK)]
    "TARGET_SVE"
    {
!     emit_insn ((<hi_lanes_optab>
! 		? gen_aarch64_sve_punpkhi_<PRED_BHS:mode>
! 		: gen_aarch64_sve_punpklo_<PRED_BHS:mode>)
! 	       (operands[0], operands[1]));
!     DONE;
    }
  )
  
! (define_insn "@aarch64_sve_punpk<perm_hilo>_<mode>"
!   [(set (match_operand:<VWIDE> 0 "register_operand" "=Upa")
! 	(unspec:<VWIDE> [(match_operand:PRED_BHS 1 "register_operand" "Upa")]
! 			UNPACK_UNSIGNED))]
!   "TARGET_SVE"
!   "punpk<perm_hilo>\t%0.h, %1.b"
! )
! 
! ;; =========================================================================
! ;; == Vector partitioning
! ;; =========================================================================
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [PRED] Unary partitioning
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - BRKA
! ;; - BRKAS
! ;; - BRKB
! ;; - BRKBS
! ;; -------------------------------------------------------------------------
! 
! ;; Note that unlike most other instructions that have both merging and
! ;; zeroing forms, these instructions don't operate elementwise and so
! ;; don't fit the IFN_COND model.
! (define_insn "@aarch64_brk<brk_op>"
!   [(set (match_operand:VNx16BI 0 "register_operand" "=Upa, Upa")
! 	(unspec:VNx16BI
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa, Upa")
! 	   (match_operand:VNx16BI 2 "register_operand" "Upa, Upa")
! 	   (match_operand:VNx16BI 3 "aarch64_simd_reg_or_zero" "Dz, 0")]
! 	  SVE_BRK_UNARY))]
    "TARGET_SVE"
    "@
!    brk<brk_op>\t%0.b, %1/z, %2.b
!    brk<brk_op>\t%0.b, %1/m, %2.b"
  )
  
! ;; Same, but also producing a flags result.
! (define_insn "*aarch64_brk<brk_op>_cc"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa, Upa")
! 	   (match_dup 1)
! 	   (match_operand:SI 4 "aarch64_sve_ptrue_flag")
! 	   (unspec:VNx16BI
! 	     [(match_dup 1)
! 	      (match_operand:VNx16BI 2 "register_operand" "Upa, Upa")
! 	      (match_operand:VNx16BI 3 "aarch64_simd_reg_or_zero" "Dz, 0")]
! 	     SVE_BRK_UNARY)]
! 	  UNSPEC_PTEST))
!    (set (match_operand:VNx16BI 0 "register_operand" "=Upa, Upa")
! 	(unspec:VNx16BI
! 	  [(match_dup 1)
! 	   (match_dup 2)
! 	   (match_dup 3)]
! 	  SVE_BRK_UNARY))]
    "TARGET_SVE"
!   "@
!    brk<brk_op>s\t%0.b, %1/z, %2.b
!    brk<brk_op>s\t%0.b, %1/m, %2.b"
  )
  
! ;; Same, but with only the flags result being interesting.
! (define_insn "*aarch64_brk<brk_op>_ptest"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa, Upa")
! 	   (match_dup 1)
! 	   (match_operand:SI 4 "aarch64_sve_ptrue_flag")
! 	   (unspec:VNx16BI
! 	     [(match_dup 1)
! 	      (match_operand:VNx16BI 2 "register_operand" "Upa, Upa")
! 	      (match_operand:VNx16BI 3 "aarch64_simd_reg_or_zero" "Dz, 0")]
! 	     SVE_BRK_UNARY)]
! 	  UNSPEC_PTEST))
!    (clobber (match_scratch:VNx16BI 0 "=Upa, Upa"))]
    "TARGET_SVE"
    "@
!    brk<brk_op>s\t%0.b, %1/z, %2.b
!    brk<brk_op>s\t%0.b, %1/m, %2.b"
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [PRED] Binary partitioning
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - BRKN
! ;; - BRKNS
! ;; - BRKPA
! ;; - BRKPAS
! ;; - BRKPB
! ;; - BRKPBS
! ;; -------------------------------------------------------------------------
! 
! ;; Binary BRKs (BRKN, BRKPA, BRKPB).
! (define_insn "@aarch64_brk<brk_op>"
!   [(set (match_operand:VNx16BI 0 "register_operand" "=Upa")
! 	(unspec:VNx16BI
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
! 	   (match_operand:VNx16BI 2 "register_operand" "Upa")
! 	   (match_operand:VNx16BI 3 "register_operand" "<brk_reg_con>")]
! 	  SVE_BRK_BINARY))]
    "TARGET_SVE"
!   "brk<brk_op>\t%0.b, %1/z, %2.b, %<brk_reg_opno>.b"
  )
  
! ;; Same, but also producing a flags result.
! (define_insn "*aarch64_brk<brk_op>_cc"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
! 	   (match_dup 1)
! 	   (match_operand:SI 4 "aarch64_sve_ptrue_flag")
! 	   (unspec:VNx16BI
! 	     [(match_dup 1)
! 	      (match_operand:VNx16BI 2 "register_operand" "Upa")
! 	      (match_operand:VNx16BI 3 "register_operand" "<brk_reg_con>")]
! 	     SVE_BRK_BINARY)]
! 	  UNSPEC_PTEST))
!    (set (match_operand:VNx16BI 0 "register_operand" "=Upa")
! 	(unspec:VNx16BI
! 	  [(match_dup 1)
! 	   (match_dup 2)
! 	   (match_dup 3)]
! 	  SVE_BRK_BINARY))]
    "TARGET_SVE"
!   "brk<brk_op>s\t%0.b, %1/z, %2.b, %<brk_reg_opno>.b"
  )
  
! ;; Same, but with only the flags result being interesting.
! (define_insn "*aarch64_brk<brk_op>_ptest"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
! 	   (match_dup 1)
! 	   (match_operand:SI 4 "aarch64_sve_ptrue_flag")
! 	   (unspec:VNx16BI
! 	     [(match_dup 1)
! 	      (match_operand:VNx16BI 2 "register_operand" "Upa")
! 	      (match_operand:VNx16BI 3 "register_operand" "<brk_reg_con>")]
! 	     SVE_BRK_BINARY)]
! 	  UNSPEC_PTEST))
!    (clobber (match_scratch:VNx16BI 0 "=Upa"))]
    "TARGET_SVE"
+   "brk<brk_op>s\t%0.b, %1/z, %2.b, %<brk_reg_opno>.b"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [PRED] Scalarization
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - PFIRST
+ ;; - PNEXT
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_<sve_pred_op><mode>"
+   [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
+ 	(unspec:PRED_ALL
+ 	  [(match_operand:PRED_ALL 1 "register_operand" "Upa")
+ 	   (match_operand:SI 2 "aarch64_sve_ptrue_flag")
+ 	   (match_operand:PRED_ALL 3 "register_operand" "0")]
+ 	  SVE_PITER))
+    (clobber (reg:CC_NZC CC_REGNUM))]
+   "TARGET_SVE && <max_elem_bits> >= <elem_bits>"
+   "<sve_pred_op>\t%0.<Vetype>, %1, %0.<Vetype>"
+ )
+ 
+ ;; Same, but also producing a flags result.
+ (define_insn_and_rewrite "*aarch64_sve_<sve_pred_op><mode>_cc"
+   [(set (reg:CC_NZC CC_REGNUM)
+ 	(unspec:CC_NZC
+ 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
+ 	   (match_operand 2)
+ 	   (match_operand:SI 3 "aarch64_sve_ptrue_flag")
+ 	   (unspec:PRED_ALL
+ 	     [(match_operand 4)
+ 	      (match_operand:SI 5 "aarch64_sve_ptrue_flag")
+ 	      (match_operand:PRED_ALL 6 "register_operand" "0")]
+ 	     SVE_PITER)]
+ 	  UNSPEC_PTEST))
+    (set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
+ 	(unspec:PRED_ALL
+ 	  [(match_dup 4)
+ 	   (match_dup 5)
+ 	   (match_dup 6)]
+ 	  SVE_PITER))]
+   "TARGET_SVE
+    && <max_elem_bits> >= <elem_bits>
+    && aarch64_sve_same_pred_for_ptest_p (&operands[2], &operands[4])"
+   "<sve_pred_op>\t%0.<Vetype>, %1, %0.<Vetype>"
+   "&& !rtx_equal_p (operands[2], operands[4])"
    {
!     operands[4] = operands[2];
!     operands[5] = operands[3];
    }
  )
  
! ;; Same, but with only the flags result being interesting.
! (define_insn_and_rewrite "*aarch64_sve_<sve_pred_op><mode>_ptest"
!   [(set (reg:CC_NZC CC_REGNUM)
! 	(unspec:CC_NZC
! 	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
! 	   (match_operand 2)
! 	   (match_operand:SI 3 "aarch64_sve_ptrue_flag")
! 	   (unspec:PRED_ALL
! 	     [(match_operand 4)
! 	      (match_operand:SI 5 "aarch64_sve_ptrue_flag")
! 	      (match_operand:PRED_ALL 6 "register_operand" "0")]
! 	     SVE_PITER)]
! 	  UNSPEC_PTEST))
!    (clobber (match_scratch:PRED_ALL 0 "=Upa"))]
!   "TARGET_SVE
!    && <max_elem_bits> >= <elem_bits>
!    && aarch64_sve_same_pred_for_ptest_p (&operands[2], &operands[4])"
!   "<sve_pred_op>\t%0.<Vetype>, %1, %0.<Vetype>"
!   "&& !rtx_equal_p (operands[2], operands[4])"
!   {
!     operands[4] = operands[2];
!     operands[5] = operands[3];
!   }
  )
  
! ;; =========================================================================
! ;; == Counting elements
! ;; =========================================================================
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Count elements in a pattern (scalar)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - CNTB
! ;; - CNTD
! ;; - CNTH
! ;; - CNTW
! ;; -------------------------------------------------------------------------
! 
! ;; Count the number of elements in an svpattern.  Operand 1 is the pattern,
! ;; operand 2 is the number of elements that fit in a 128-bit block, and
! ;; operand 3 is a multiplier in the range [1, 16].
! ;;
! ;; Note that this pattern isn't used for SV_ALL (but would work for that too).
! (define_insn "aarch64_sve_cnt_pat"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(zero_extend:DI
! 	  (unspec:SI [(match_operand:DI 1 "const_int_operand")
! 		      (match_operand:DI 2 "const_int_operand")
! 		      (match_operand:DI 3 "const_int_operand")]
! 		     UNSPEC_SVE_CNT_PAT)))]
    "TARGET_SVE"
    {
!     return aarch64_output_sve_cnt_pat_immediate ("cnt", "%x0", operands + 1);
    }
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Increment by the number of elements in a pattern (scalar)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - INC
! ;; - SQINC
! ;; - UQINC
! ;; -------------------------------------------------------------------------
! 
! ;; Increment a DImode register by the number of elements in an svpattern.
! ;; See aarch64_sve_cnt_pat for the counting behavior.
! (define_insn "@aarch64_sve_<inc_dec><mode>_pat"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(ANY_PLUS:DI (zero_extend:DI
! 		       (unspec:SI [(match_operand:DI 2 "const_int_operand")
! 				   (match_operand:DI 3 "const_int_operand")
! 				   (match_operand:DI 4 "const_int_operand")]
! 				  UNSPEC_SVE_CNT_PAT))
! 		     (match_operand:DI_ONLY 1 "register_operand" "0")))]
    "TARGET_SVE"
!   {
!     return aarch64_output_sve_cnt_pat_immediate ("<inc_dec>", "%x0",
! 						 operands + 2);
!   }
  )
  
! ;; Increment an SImode register by the number of elements in an svpattern
! ;; using modular arithmetic.  See aarch64_sve_cnt_pat for the counting
! ;; behavior.
! (define_insn "*aarch64_sve_incsi_pat"
!   [(set (match_operand:SI 0 "register_operand" "=r")
! 	(plus:SI (unspec:SI [(match_operand:DI 2 "const_int_operand")
! 			     (match_operand:DI 3 "const_int_operand")
! 			     (match_operand:DI 4 "const_int_operand")]
! 			    UNSPEC_SVE_CNT_PAT)
! 		 (match_operand:SI 1 "register_operand" "0")))]
    "TARGET_SVE"
!   {
!     return aarch64_output_sve_cnt_pat_immediate ("inc", "%x0", operands + 2);
!   }
  )
  
! ;; Increment an SImode register by the number of elements in an svpattern
! ;; using saturating arithmetic, extending the result to 64 bits.
! ;;
! ;; See aarch64_sve_cnt_pat for the counting behavior.
! (define_insn "@aarch64_sve_<inc_dec><mode>_pat"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(<paired_extend>:DI
! 	  (SAT_PLUS:SI
! 	    (unspec:SI [(match_operand:DI 2 "const_int_operand")
! 			(match_operand:DI 3 "const_int_operand")
! 			(match_operand:DI 4 "const_int_operand")]
! 		       UNSPEC_SVE_CNT_PAT)
! 	    (match_operand:SI_ONLY 1 "register_operand" "0"))))]
    "TARGET_SVE"
!   {
!     const char *registers = (<CODE> == SS_PLUS ? "%x0, %w0" : "%w0");
!     return aarch64_output_sve_cnt_pat_immediate ("<inc_dec>", registers,
! 						 operands + 2);
!   }
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Increment by the number of elements in a pattern (vector)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - INC
! ;; - SQINC
! ;; - UQINC
! ;; -------------------------------------------------------------------------
! 
! ;; Increment a vector of DIs by the number of elements in an svpattern.
! ;; See aarch64_sve_cnt_pat for the counting behavior.
! (define_insn "@aarch64_sve_<inc_dec><mode>_pat"
!   [(set (match_operand:VNx2DI 0 "register_operand" "=w, ?&w")
! 	(ANY_PLUS:VNx2DI
! 	  (vec_duplicate:VNx2DI
! 	    (zero_extend:DI
! 	      (unspec:SI [(match_operand:DI 2 "const_int_operand")
! 			  (match_operand:DI 3 "const_int_operand")
! 			  (match_operand:DI 4 "const_int_operand")]
! 			 UNSPEC_SVE_CNT_PAT)))
! 	  (match_operand:VNx2DI_ONLY 1 "register_operand" "0, w")))]
    "TARGET_SVE"
    {
!     if (which_alternative == 1)
!       output_asm_insn ("movprfx\t%0, %1", operands);
!     return aarch64_output_sve_cnt_pat_immediate ("<inc_dec>", "%0.<Vetype>",
! 						 operands + 2);
    }
+   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Increment a vector of SIs by the number of elements in an svpattern.
! ;; See aarch64_sve_cnt_pat for the counting behavior.
! (define_insn "@aarch64_sve_<inc_dec><mode>_pat"
!   [(set (match_operand:VNx4SI 0 "register_operand" "=w, ?&w")
! 	(ANY_PLUS:VNx4SI
! 	  (vec_duplicate:VNx4SI
! 	    (unspec:SI [(match_operand:DI 2 "const_int_operand")
! 			(match_operand:DI 3 "const_int_operand")
! 			(match_operand:DI 4 "const_int_operand")]
! 		       UNSPEC_SVE_CNT_PAT))
! 	  (match_operand:VNx4SI_ONLY 1 "register_operand" "0, w")))]
    "TARGET_SVE"
!   {
!     if (which_alternative == 1)
!       output_asm_insn ("movprfx\t%0, %1", operands);
!     return aarch64_output_sve_cnt_pat_immediate ("<inc_dec>", "%0.<Vetype>",
! 						 operands + 2);
!   }
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Increment a vector of HIs by the number of elements in an svpattern.
! ;; See aarch64_sve_cnt_pat for the counting behavior.
! (define_expand "@aarch64_sve_<inc_dec><mode>_pat"
!   [(set (match_operand:VNx8HI 0 "register_operand")
! 	(ANY_PLUS:VNx8HI
! 	  (vec_duplicate:VNx8HI
! 	    (truncate:HI
! 	      (unspec:SI [(match_operand:DI 2 "const_int_operand")
! 			  (match_operand:DI 3 "const_int_operand")
! 			  (match_operand:DI 4 "const_int_operand")]
! 			 UNSPEC_SVE_CNT_PAT)))
! 	  (match_operand:VNx8HI_ONLY 1 "register_operand")))]
    "TARGET_SVE"
  )
  
! (define_insn "*aarch64_sve_<inc_dec><mode>_pat"
!   [(set (match_operand:VNx8HI 0 "register_operand" "=w, ?&w")
! 	(ANY_PLUS:VNx8HI
! 	  (vec_duplicate:VNx8HI
! 	    (match_operator:HI 5 "subreg_lowpart_operator"
! 	      [(unspec:SI [(match_operand:DI 2 "const_int_operand")
! 			   (match_operand:DI 3 "const_int_operand")
! 			   (match_operand:DI 4 "const_int_operand")]
! 			  UNSPEC_SVE_CNT_PAT)]))
! 	  (match_operand:VNx8HI_ONLY 1 "register_operand" "0, w")))]
    "TARGET_SVE"
!   {
!     if (which_alternative == 1)
!       output_asm_insn ("movprfx\t%0, %1", operands);
!     return aarch64_output_sve_cnt_pat_immediate ("<inc_dec>", "%0.<Vetype>",
! 						 operands + 2);
!   }
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Decrement by the number of elements in a pattern (scalar)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - DEC
! ;; - SQDEC
! ;; - UQDEC
! ;; -------------------------------------------------------------------------
! 
! ;; Decrement a DImode register by the number of elements in an svpattern.
! ;; See aarch64_sve_cnt_pat for the counting behavior.
! (define_insn "@aarch64_sve_<inc_dec><mode>_pat"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(ANY_MINUS:DI (match_operand:DI_ONLY 1 "register_operand" "0")
! 		      (zero_extend:DI
! 			(unspec:SI [(match_operand:DI 2 "const_int_operand")
! 				    (match_operand:DI 3 "const_int_operand")
! 				    (match_operand:DI 4 "const_int_operand")]
! 				   UNSPEC_SVE_CNT_PAT))))]
    "TARGET_SVE"
!   {
!     return aarch64_output_sve_cnt_pat_immediate ("<inc_dec>", "%x0",
! 						 operands + 2);
!   }
  )
  
! ;; Decrement an SImode register by the number of elements in an svpattern
! ;; using modular arithmetic.  See aarch64_sve_cnt_pat for the counting
! ;; behavior.
! (define_insn "*aarch64_sve_decsi_pat"
!   [(set (match_operand:SI 0 "register_operand" "=r")
! 	(minus:SI (match_operand:SI 1 "register_operand" "0")
! 		  (unspec:SI [(match_operand:DI 2 "const_int_operand")
! 			      (match_operand:DI 3 "const_int_operand")
! 			      (match_operand:DI 4 "const_int_operand")]
! 			     UNSPEC_SVE_CNT_PAT)))]
    "TARGET_SVE"
!   {
!     return aarch64_output_sve_cnt_pat_immediate ("dec", "%x0", operands + 2);
!   }
  )
  
! ;; Decrement an SImode register by the number of elements in an svpattern
! ;; using saturating arithmetic, extending the result to 64 bits.
! ;;
! ;; See aarch64_sve_cnt_pat for the counting behavior.
! (define_insn "@aarch64_sve_<inc_dec><mode>_pat"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(<paired_extend>:DI
! 	  (SAT_MINUS:SI
! 	    (match_operand:SI_ONLY 1 "register_operand" "0")
! 	    (unspec:SI [(match_operand:DI 2 "const_int_operand")
! 			(match_operand:DI 3 "const_int_operand")
! 			(match_operand:DI 4 "const_int_operand")]
! 		       UNSPEC_SVE_CNT_PAT))))]
    "TARGET_SVE"
    {
!     const char *registers = (<CODE> == SS_MINUS ? "%x0, %w0" : "%w0");
!     return aarch64_output_sve_cnt_pat_immediate ("<inc_dec>", registers,
! 						 operands + 2);
    }
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Decrement by the number of elements in a pattern (vector)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - DEC
! ;; - SQDEC
! ;; - UQDEC
! ;; -------------------------------------------------------------------------
! 
! ;; Decrement a vector of DIs by the number of elements in an svpattern.
! ;; See aarch64_sve_cnt_pat for the counting behavior.
! (define_insn "@aarch64_sve_<inc_dec><mode>_pat"
!   [(set (match_operand:VNx2DI 0 "register_operand" "=w, ?&w")
! 	(ANY_MINUS:VNx2DI
! 	  (match_operand:VNx2DI_ONLY 1 "register_operand" "0, w")
! 	  (vec_duplicate:VNx2DI
! 	    (zero_extend:DI
! 	      (unspec:SI [(match_operand:DI 2 "const_int_operand")
! 			  (match_operand:DI 3 "const_int_operand")
! 			  (match_operand:DI 4 "const_int_operand")]
! 			 UNSPEC_SVE_CNT_PAT)))))]
    "TARGET_SVE"
!   {
!     if (which_alternative == 1)
!       output_asm_insn ("movprfx\t%0, %1", operands);
!     return aarch64_output_sve_cnt_pat_immediate ("<inc_dec>", "%0.<Vetype>",
! 						 operands + 2);
!   }
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Decrement a vector of SIs by the number of elements in an svpattern.
! ;; See aarch64_sve_cnt_pat for the counting behavior.
! (define_insn "@aarch64_sve_<inc_dec><mode>_pat"
!   [(set (match_operand:VNx4SI 0 "register_operand" "=w, ?&w")
! 	(ANY_MINUS:VNx4SI
! 	  (match_operand:VNx4SI_ONLY 1 "register_operand" "0, w")
! 	  (vec_duplicate:VNx4SI
! 	    (unspec:SI [(match_operand:DI 2 "const_int_operand")
! 			(match_operand:DI 3 "const_int_operand")
! 			(match_operand:DI 4 "const_int_operand")]
! 		       UNSPEC_SVE_CNT_PAT))))]
    "TARGET_SVE"
    {
!     if (which_alternative == 1)
!       output_asm_insn ("movprfx\t%0, %1", operands);
!     return aarch64_output_sve_cnt_pat_immediate ("<inc_dec>", "%0.<Vetype>",
! 						 operands + 2);
    }
+   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Decrement a vector of HIs by the number of elements in an svpattern.
! ;; See aarch64_sve_cnt_pat for the counting behavior.
! (define_expand "@aarch64_sve_<inc_dec><mode>_pat"
!   [(set (match_operand:VNx8HI 0 "register_operand")
! 	(ANY_MINUS:VNx8HI
! 	  (match_operand:VNx8HI_ONLY 1 "register_operand")
! 	  (vec_duplicate:VNx8HI
! 	    (truncate:HI
! 	      (unspec:SI [(match_operand:DI 2 "const_int_operand")
! 			  (match_operand:DI 3 "const_int_operand")
! 			  (match_operand:DI 4 "const_int_operand")]
! 			 UNSPEC_SVE_CNT_PAT)))))]
    "TARGET_SVE"
  )
  
! (define_insn "*aarch64_sve_<inc_dec><mode>_pat"
!   [(set (match_operand:VNx8HI 0 "register_operand" "=w, ?&w")
! 	(ANY_MINUS:VNx8HI
! 	  (match_operand:VNx8HI_ONLY 1 "register_operand" "0, w")
! 	  (vec_duplicate:VNx8HI
! 	    (match_operator:HI 5 "subreg_lowpart_operator"
! 	      [(unspec:SI [(match_operand:DI 2 "const_int_operand")
! 			   (match_operand:DI 3 "const_int_operand")
! 			   (match_operand:DI 4 "const_int_operand")]
! 			  UNSPEC_SVE_CNT_PAT)]))))]
    "TARGET_SVE"
    {
!     if (which_alternative == 1)
!       output_asm_insn ("movprfx\t%0, %1", operands);
!     return aarch64_output_sve_cnt_pat_immediate ("<inc_dec>", "%0.<Vetype>",
! 						 operands + 2);
    }
+   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Count elements in a predicate (scalar)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - CNTP
! ;; -------------------------------------------------------------------------
! 
! ;; Count the number of set bits in a predicate.  Operand 3 is true if
! ;; operand 1 is known to be all-true.
! (define_insn "@aarch64_pred_cntp<mode>"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(zero_extend:DI
! 	  (unspec:SI [(match_operand:PRED_ALL 1 "register_operand" "Upl")
! 		      (match_operand:SI 2 "aarch64_sve_ptrue_flag")
! 		      (match_operand:PRED_ALL 3 "register_operand" "Upa")]
! 		     UNSPEC_CNTP)))]
!   "TARGET_SVE"
!   "cntp\t%x0, %1, %3.<Vetype>")
! 
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Increment by the number of elements in a predicate (scalar)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - INCP
! ;; - SQINCP
! ;; - UQINCP
! ;; -------------------------------------------------------------------------
! 
! ;; Increment a DImode register by the number of set bits in a predicate.
! ;; See aarch64_sve_cntp for a description of the operands.
! (define_expand "@aarch64_sve_<inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp"
!   [(set (match_operand:DI 0 "register_operand")
! 	(ANY_PLUS:DI
! 	  (zero_extend:DI
! 	    (unspec:SI [(match_dup 3)
! 			(const_int SVE_KNOWN_PTRUE)
! 			(match_operand:PRED_ALL 2 "register_operand")]
! 		       UNSPEC_CNTP))
! 	  (match_operand:DI_ONLY 1 "register_operand")))]
    "TARGET_SVE"
    {
!     operands[3] = CONSTM1_RTX (<PRED_ALL:MODE>mode);
    }
  )
  
! (define_insn_and_rewrite "*aarch64_sve_<inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(ANY_PLUS:DI
! 	  (zero_extend:DI
! 	    (unspec:SI [(match_operand 3)
! 			(const_int SVE_KNOWN_PTRUE)
! 			(match_operand:PRED_ALL 2 "register_operand" "Upa")]
! 		       UNSPEC_CNTP))
! 	  (match_operand:DI_ONLY 1 "register_operand" "0")))]
    "TARGET_SVE"
!   "<inc_dec>p\t%x0, %2.<PRED_ALL:Vetype>"
!   "&& !CONSTANT_P (operands[3])"
!   {
!     operands[3] = CONSTM1_RTX (<PRED_ALL:MODE>mode);
!   }
  )
  
! ;; Increment an SImode register by the number of set bits in a predicate
! ;; using modular arithmetic.  See aarch64_sve_cntp for a description of
! ;; the operands.
! (define_insn_and_rewrite "*aarch64_incsi<mode>_cntp"
!   [(set (match_operand:SI 0 "register_operand" "=r")
! 	(plus:SI
! 	  (unspec:SI [(match_operand 3)
! 		      (const_int SVE_KNOWN_PTRUE)
! 		      (match_operand:PRED_ALL 2 "register_operand" "Upa")]
! 		     UNSPEC_CNTP)
! 	  (match_operand:SI 1 "register_operand" "0")))]
    "TARGET_SVE"
!   "incp\t%x0, %2.<Vetype>"
!   "&& !CONSTANT_P (operands[3])"
!   {
!     operands[3] = CONSTM1_RTX (<MODE>mode);
!   }
  )
  
! ;; Increment an SImode register by the number of set bits in a predicate
! ;; using saturating arithmetic, extending the result to 64 bits.
! ;;
! ;; See aarch64_sve_cntp for a description of the operands.
! (define_expand "@aarch64_sve_<inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp"
!   [(set (match_operand:DI 0 "register_operand")
! 	(<paired_extend>:DI
! 	  (SAT_PLUS:SI
! 	    (unspec:SI [(match_dup 3)
! 			(const_int SVE_KNOWN_PTRUE)
! 			(match_operand:PRED_ALL 2 "register_operand")]
! 		       UNSPEC_CNTP)
! 	    (match_operand:SI_ONLY 1 "register_operand"))))]
    "TARGET_SVE"
    {
!     operands[3] = CONSTM1_RTX (<PRED_ALL:MODE>mode);
    }
  )
  
! (define_insn_and_rewrite "*aarch64_sve_<inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(<paired_extend>:DI
! 	  (SAT_PLUS:SI
! 	    (unspec:SI [(match_operand 3)
! 			(const_int SVE_KNOWN_PTRUE)
! 			(match_operand:PRED_ALL 2 "register_operand" "Upa")]
! 		       UNSPEC_CNTP)
! 	    (match_operand:SI_ONLY 1 "register_operand" "0"))))]
    "TARGET_SVE"
    {
!     if (<CODE> == SS_PLUS)
!       return "<inc_dec>p\t%x0, %2.<PRED_ALL:Vetype>, %w0";
!     else
!       return "<inc_dec>p\t%w0, %2.<PRED_ALL:Vetype>";
!   }
!   "&& !CONSTANT_P (operands[3])"
!   {
!     operands[3] = CONSTM1_RTX (<PRED_ALL:MODE>mode);
    }
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Increment by the number of elements in a predicate (vector)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - INCP
! ;; - SQINCP
! ;; - UQINCP
! ;; -------------------------------------------------------------------------
! 
! ;; Increment a vector of DIs by the number of set bits in a predicate.
! ;; See aarch64_sve_cntp for a description of the operands.
! (define_expand "@aarch64_sve_<inc_dec><mode>_cntp"
!   [(set (match_operand:VNx2DI 0 "register_operand")
! 	(ANY_PLUS:VNx2DI
! 	  (vec_duplicate:VNx2DI
! 	    (zero_extend:DI
! 	      (unspec:SI
! 		[(match_dup 3)
! 		 (const_int SVE_KNOWN_PTRUE)
! 		 (match_operand:<VPRED> 2 "register_operand")]
! 		UNSPEC_CNTP)))
! 	  (match_operand:VNx2DI_ONLY 1 "register_operand")))]
    "TARGET_SVE"
+   {
+     operands[3] = CONSTM1_RTX (<VPRED>mode);
+   }
  )
  
! (define_insn_and_rewrite "*aarch64_sve_<inc_dec><mode>_cntp"
!   [(set (match_operand:VNx2DI 0 "register_operand" "=w, ?&w")
! 	(ANY_PLUS:VNx2DI
! 	  (vec_duplicate:VNx2DI
! 	    (zero_extend:DI
! 	      (unspec:SI
! 		[(match_operand 3)
! 		 (const_int SVE_KNOWN_PTRUE)
! 		 (match_operand:<VPRED> 2 "register_operand" "Upa, Upa")]
! 		UNSPEC_CNTP)))
! 	  (match_operand:VNx2DI_ONLY 1 "register_operand" "0, w")))]
    "TARGET_SVE"
    "@
!    <inc_dec>p\t%0.d, %2
!    movprfx\t%0, %1\;<inc_dec>p\t%0.d, %2"
!   "&& !CONSTANT_P (operands[3])"
!   {
!     operands[3] = CONSTM1_RTX (<VPRED>mode);
!   }
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Increment a vector of SIs by the number of set bits in a predicate.
! ;; See aarch64_sve_cntp for a description of the operands.
! (define_expand "@aarch64_sve_<inc_dec><mode>_cntp"
!   [(set (match_operand:VNx4SI 0 "register_operand")
! 	(ANY_PLUS:VNx4SI
! 	  (vec_duplicate:VNx4SI
! 	    (unspec:SI
! 	      [(match_dup 3)
! 	       (const_int SVE_KNOWN_PTRUE)
! 	       (match_operand:<VPRED> 2 "register_operand")]
! 	      UNSPEC_CNTP))
! 	  (match_operand:VNx4SI_ONLY 1 "register_operand")))]
!   "TARGET_SVE"
!   {
!     operands[3] = CONSTM1_RTX (<VPRED>mode);
!   }
! )
! 
! (define_insn_and_rewrite "*aarch64_sve_<inc_dec><mode>_cntp"
!   [(set (match_operand:VNx4SI 0 "register_operand" "=w, ?&w")
! 	(ANY_PLUS:VNx4SI
! 	  (vec_duplicate:VNx4SI
! 	    (unspec:SI
! 	      [(match_operand 3)
! 	       (const_int SVE_KNOWN_PTRUE)
! 	       (match_operand:<VPRED> 2 "register_operand" "Upa, Upa")]
! 	      UNSPEC_CNTP))
! 	  (match_operand:VNx4SI_ONLY 1 "register_operand" "0, w")))]
    "TARGET_SVE"
    "@
!    <inc_dec>p\t%0.s, %2
!    movprfx\t%0, %1\;<inc_dec>p\t%0.s, %2"
!   "&& !CONSTANT_P (operands[3])"
!   {
!     operands[3] = CONSTM1_RTX (<VPRED>mode);
!   }
    [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Increment a vector of HIs by the number of set bits in a predicate.
! ;; See aarch64_sve_cntp for a description of the operands.
! (define_expand "@aarch64_sve_<inc_dec><mode>_cntp"
!   [(set (match_operand:VNx8HI 0 "register_operand")
! 	(ANY_PLUS:VNx8HI
! 	  (vec_duplicate:VNx8HI
! 	    (truncate:HI
! 	      (unspec:SI
! 		[(match_dup 3)
! 		 (const_int SVE_KNOWN_PTRUE)
! 		 (match_operand:<VPRED> 2 "register_operand")]
! 		UNSPEC_CNTP)))
! 	  (match_operand:VNx8HI_ONLY 1 "register_operand")))]
!   "TARGET_SVE"
!   {
!     operands[3] = CONSTM1_RTX (<VPRED>mode);
!   }
! )
! 
! (define_insn_and_rewrite "*aarch64_sve_<inc_dec><mode>_cntp"
!   [(set (match_operand:VNx8HI 0 "register_operand" "=w, ?&w")
! 	(ANY_PLUS:VNx8HI
! 	  (vec_duplicate:VNx8HI
! 	    (match_operator:HI 3 "subreg_lowpart_operator"
! 	      [(unspec:SI
! 		 [(match_operand 4)
! 		  (const_int SVE_KNOWN_PTRUE)
! 		  (match_operand:<VPRED> 2 "register_operand" "Upa, Upa")]
! 		 UNSPEC_CNTP)]))
! 	  (match_operand:VNx8HI_ONLY 1 "register_operand" "0, w")))]
    "TARGET_SVE"
    "@
!    <inc_dec>p\t%0.h, %2
!    movprfx\t%0, %1\;<inc_dec>p\t%0.h, %2"
!   "&& !CONSTANT_P (operands[4])"
!   {
!     operands[4] = CONSTM1_RTX (<VPRED>mode);
!   }
    [(set_attr "movprfx" "*,yes")]
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Decrement by the number of elements in a predicate (scalar)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - DECP
! ;; - SQDECP
! ;; - UQDECP
! ;; -------------------------------------------------------------------------
! 
! ;; Decrement a DImode register by the number of set bits in a predicate.
! ;; See aarch64_sve_cntp for a description of the operands.
! (define_expand "@aarch64_sve_<inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp"
!   [(set (match_operand:DI 0 "register_operand")
! 	(ANY_MINUS:DI
! 	  (match_operand:DI_ONLY 1 "register_operand")
! 	  (zero_extend:DI
! 	    (unspec:SI [(match_dup 3)
! 			(const_int SVE_KNOWN_PTRUE)
! 			(match_operand:PRED_ALL 2 "register_operand")]
! 		       UNSPEC_CNTP))))]
    "TARGET_SVE"
!   {
!     operands[3] = CONSTM1_RTX (<PRED_ALL:MODE>mode);
!   }
  )
  
! (define_insn_and_rewrite "*aarch64_sve_<inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(ANY_MINUS:DI
! 	  (match_operand:DI_ONLY 1 "register_operand" "0")
! 	  (zero_extend:DI
! 	    (unspec:SI [(match_operand 3)
! 			(const_int SVE_KNOWN_PTRUE)
! 			(match_operand:PRED_ALL 2 "register_operand" "Upa")]
! 		       UNSPEC_CNTP))))]
    "TARGET_SVE"
!   "<inc_dec>p\t%x0, %2.<PRED_ALL:Vetype>"
!   "&& !CONSTANT_P (operands[3])"
!   {
!     operands[3] = CONSTM1_RTX (<PRED_ALL:MODE>mode);
!   }
  )
  
! ;; Decrement an SImode register by the number of set bits in a predicate
! ;; using modular arithmetic.  See aarch64_sve_cntp for a description of the
! ;; operands.
! (define_insn_and_rewrite "*aarch64_decsi<mode>_cntp"
!   [(set (match_operand:SI 0 "register_operand" "=r")
! 	(minus:SI
! 	  (match_operand:SI 1 "register_operand" "0")
! 	  (unspec:SI [(match_operand 3)
! 		      (const_int SVE_KNOWN_PTRUE)
! 		      (match_operand:PRED_ALL 2 "register_operand" "Upa")]
! 		     UNSPEC_CNTP)))]
    "TARGET_SVE"
!   "decp\t%x0, %2.<Vetype>"
!   "&& !CONSTANT_P (operands[3])"
!   {
!     operands[3] = CONSTM1_RTX (<MODE>mode);
!   }
! )
  
! ;; Decrement an SImode register by the number of set bits in a predicate
! ;; using saturating arithmetic, extending the result to 64 bits.
! ;;
! ;; See aarch64_sve_cntp for a description of the operands.
! (define_expand "@aarch64_sve_<inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp"
!   [(set (match_operand:DI 0 "register_operand")
! 	(<paired_extend>:DI
! 	  (SAT_MINUS:SI
! 	    (match_operand:SI_ONLY 1 "register_operand")
! 	    (unspec:SI [(match_dup 3)
! 			(const_int SVE_KNOWN_PTRUE)
! 			(match_operand:PRED_ALL 2 "register_operand")]
! 		       UNSPEC_CNTP))))]
    "TARGET_SVE"
!   {
!     operands[3] = CONSTM1_RTX (<PRED_ALL:MODE>mode);
!   }
  )
  
! (define_insn_and_rewrite "*aarch64_sve_<inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(<paired_extend>:DI
! 	  (SAT_MINUS:SI
! 	    (match_operand:SI_ONLY 1 "register_operand" "0")
! 	    (unspec:SI [(match_operand 3)
! 			(const_int SVE_KNOWN_PTRUE)
! 			(match_operand:PRED_ALL 2 "register_operand" "Upa")]
! 		       UNSPEC_CNTP))))]
    "TARGET_SVE"
!   {
!     if (<CODE> == SS_MINUS)
!       return "<inc_dec>p\t%x0, %2.<PRED_ALL:Vetype>, %w0";
!     else
!       return "<inc_dec>p\t%w0, %2.<PRED_ALL:Vetype>";
!   }
!   "&& !CONSTANT_P (operands[3])"
!   {
!     operands[3] = CONSTM1_RTX (<PRED_ALL:MODE>mode);
!   }
  )
  
! ;; -------------------------------------------------------------------------
! ;; ---- [INT] Decrement by the number of elements in a predicate (vector)
! ;; -------------------------------------------------------------------------
! ;; Includes:
! ;; - DECP
! ;; - SQDECP
! ;; - UQDECP
! ;; -------------------------------------------------------------------------
! 
! ;; Decrement a vector of DIs by the number of set bits in a predicate.
! ;; See aarch64_sve_cntp for a description of the operands.
! (define_expand "@aarch64_sve_<inc_dec><mode>_cntp"
!   [(set (match_operand:VNx2DI 0 "register_operand")
! 	(ANY_MINUS:VNx2DI
! 	  (match_operand:VNx2DI_ONLY 1 "register_operand")
! 	  (vec_duplicate:VNx2DI
! 	    (zero_extend:DI
! 	      (unspec:SI
! 		[(match_dup 3)
! 		 (const_int SVE_KNOWN_PTRUE)
! 		 (match_operand:<VPRED> 2 "register_operand")]
! 		UNSPEC_CNTP)))))]
!   "TARGET_SVE"
!   {
!     operands[3] = CONSTM1_RTX (<VPRED>mode);
!   }
  )
  
! (define_insn_and_rewrite "*aarch64_sve_<inc_dec><mode>_cntp"
!   [(set (match_operand:VNx2DI 0 "register_operand" "=w, ?&w")
! 	(ANY_MINUS:VNx2DI
! 	  (match_operand:VNx2DI_ONLY 1 "register_operand" "0, w")
! 	  (vec_duplicate:VNx2DI
! 	    (zero_extend:DI
! 	      (unspec:SI
! 		[(match_operand 3)
! 		 (const_int SVE_KNOWN_PTRUE)
! 		 (match_operand:<VPRED> 2 "register_operand" "Upa, Upa")]
! 		UNSPEC_CNTP)))))]
    "TARGET_SVE"
    "@
!    <inc_dec>p\t%0.d, %2
!    movprfx\t%0, %1\;<inc_dec>p\t%0.d, %2"
!   "&& !CONSTANT_P (operands[3])"
!   {
!     operands[3] = CONSTM1_RTX (<VPRED>mode);
!   }
!   [(set_attr "movprfx" "*,yes")]
  )
  
! ;; Decrement a vector of SIs by the number of set bits in a predicate.
! ;; See aarch64_sve_cntp for a description of the operands.
! (define_expand "@aarch64_sve_<inc_dec><mode>_cntp"
!   [(set (match_operand:VNx4SI 0 "register_operand")
! 	(ANY_MINUS:VNx4SI
! 	  (match_operand:VNx4SI_ONLY 1 "register_operand")
! 	  (vec_duplicate:VNx4SI
! 	    (unspec:SI
! 	      [(match_dup 3)
! 	       (const_int SVE_KNOWN_PTRUE)
! 	       (match_operand:<VPRED> 2 "register_operand")]
! 	      UNSPEC_CNTP))))]
    "TARGET_SVE"
    {
!     operands[3] = CONSTM1_RTX (<VPRED>mode);
    }
  )
  
! (define_insn_and_rewrite "*aarch64_sve_<inc_dec><mode>_cntp"
!   [(set (match_operand:VNx4SI 0 "register_operand" "=w, ?&w")
! 	(ANY_MINUS:VNx4SI
! 	  (match_operand:VNx4SI_ONLY 1 "register_operand" "0, w")
! 	  (vec_duplicate:VNx4SI
! 	    (unspec:SI
! 	      [(match_operand 3)
! 	       (const_int SVE_KNOWN_PTRUE)
! 	       (match_operand:<VPRED> 2 "register_operand" "Upa, Upa")]
! 	      UNSPEC_CNTP))))]
    "TARGET_SVE"
+   "@
+    <inc_dec>p\t%0.s, %2
+    movprfx\t%0, %1\;<inc_dec>p\t%0.s, %2"
+   "&& !CONSTANT_P (operands[3])"
    {
!     operands[3] = CONSTM1_RTX (<VPRED>mode);
!   }
!   [(set_attr "movprfx" "*,yes")]
! )
  
! ;; Decrement a vector of HIs by the number of set bits in a predicate.
! ;; See aarch64_sve_cntp for a description of the operands.
! (define_expand "@aarch64_sve_<inc_dec><mode>_cntp"
!   [(set (match_operand:VNx8HI 0 "register_operand")
! 	(ANY_MINUS:VNx8HI
! 	  (match_operand:VNx8HI_ONLY 1 "register_operand")
! 	  (vec_duplicate:VNx8HI
! 	    (truncate:HI
! 	      (unspec:SI
! 		[(match_dup 3)
! 		 (const_int SVE_KNOWN_PTRUE)
! 		 (match_operand:<VPRED> 2 "register_operand")]
! 		UNSPEC_CNTP)))))]
!   "TARGET_SVE"
!   {
!     operands[3] = CONSTM1_RTX (<VPRED>mode);
!   }
! )
  
! (define_insn_and_rewrite "*aarch64_sve_<inc_dec><mode>_cntp"
!   [(set (match_operand:VNx8HI 0 "register_operand" "=w, ?&w")
! 	(ANY_MINUS:VNx8HI
! 	  (match_operand:VNx8HI_ONLY 1 "register_operand" "0, w")
! 	  (vec_duplicate:VNx8HI
! 	    (match_operator:HI 3 "subreg_lowpart_operator"
! 	      [(unspec:SI
! 		 [(match_operand 4)
! 		  (const_int SVE_KNOWN_PTRUE)
! 		  (match_operand:<VPRED> 2 "register_operand" "Upa, Upa")]
! 		 UNSPEC_CNTP)]))))]
!   "TARGET_SVE"
!   "@
!    <inc_dec>p\t%0.h, %2
!    movprfx\t%0, %1\;<inc_dec>p\t%0.h, %2"
!   "&& !CONSTANT_P (operands[4])"
!   {
!     operands[4] = CONSTM1_RTX (<VPRED>mode);
    }
+   [(set_attr "movprfx" "*,yes")]
  )
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-sve2.md gcc-10.1.0/gcc/config/aarch64/aarch64-sve2.md
*** gcc-9.3.0/gcc/config/aarch64/aarch64-sve2.md	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-sve2.md	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,2516 ----
+ ;; Machine description for AArch64 SVE2.
+ ;; Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ ;; Contributed by ARM Ltd.
+ ;;
+ ;; This file is part of GCC.
+ ;;
+ ;; GCC is free software; you can redistribute it and/or modify it
+ ;; under the terms of the GNU General Public License as published by
+ ;; the Free Software Foundation; either version 3, or (at your option)
+ ;; any later version.
+ ;;
+ ;; GCC is distributed in the hope that it will be useful, but
+ ;; WITHOUT ANY WARRANTY; without even the implied warranty of
+ ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ ;; General Public License for more details.
+ ;;
+ ;; You should have received a copy of the GNU General Public License
+ ;; along with GCC; see the file COPYING3.  If not see
+ ;; <http://www.gnu.org/licenses/>.
+ 
+ ;; The file is organised into the following sections (search for the full
+ ;; line):
+ ;;
+ ;; == Moves
+ ;; ---- Non-temporal gather loads
+ ;; ---- Non-temporal scatter stores
+ ;;
+ ;; == Uniform binary arithmnetic
+ ;; ---- [INT] Multiplication
+ ;; ---- [INT] Scaled high-part multiplication
+ ;; ---- [INT] General binary arithmetic that maps to unspecs
+ ;; ---- [INT] Saturating binary arithmetic
+ ;; ---- [INT] Saturating left shifts
+ ;;
+ ;; == Uniform ternary arithmnetic
+ ;; ---- [INT] General ternary arithmetic that maps to unspecs
+ ;; ---- [INT] Multiply-and-accumulate operations
+ ;; ---- [INT] Binary logic operations with rotation
+ ;; ---- [INT] Ternary logic operations
+ ;; ---- [INT] Shift-and-accumulate operations
+ ;; ---- [INT] Shift-and-insert operations
+ ;; ---- [INT] Sum of absolute differences
+ ;;
+ ;; == Extending arithmetic
+ ;; ---- [INT] Wide binary arithmetic
+ ;; ---- [INT] Long binary arithmetic
+ ;; ---- [INT] Long left shifts
+ ;; ---- [INT] Long binary arithmetic with accumulation
+ ;; ---- [FP] Long multiplication with accumulation
+ ;;
+ ;; == Narrowing arithnetic
+ ;; ---- [INT] Narrowing unary arithmetic
+ ;; ---- [INT] Narrowing binary arithmetic
+ ;; ---- [INT] Narrowing right shifts
+ ;;
+ ;; == Pairwise arithmetic
+ ;; ---- [INT] Pairwise arithmetic
+ ;; ---- [FP] Pairwise arithmetic
+ ;; ---- [INT] Pairwise arithmetic with accumulation
+ ;;
+ ;; == Complex arithmetic
+ ;; ---- [INT] Complex binary operations
+ ;; ---- [INT] Complex ternary operations
+ ;; ---- [INT] Complex dot product
+ ;;
+ ;; == Conversions
+ ;; ---- [FP<-FP] Widening conversions
+ ;; ---- [FP<-FP] Narrowing conversions
+ ;;
+ ;; == Other arithmetic
+ ;; ---- [INT] Reciprocal approximation
+ ;; ---- [INT<-FP] Base-2 logarithm
+ ;; ---- [INT] Polynomial multiplication
+ ;;
+ ;; == Permutation
+ ;; ---- [INT,FP] General permutes
+ ;; ---- [INT] Optional bit-permute extensions
+ ;;
+ ;; == General
+ ;; ---- Check for aliases between pointers
+ ;; ---- Histogram processing
+ ;; ---- String matching
+ ;;
+ ;; == Crypotographic extensions
+ ;; ---- Optional AES extensions
+ ;; ---- Optional SHA-3 extensions
+ ;; ---- Optional SM4 extensions
+ 
+ ;; =========================================================================
+ ;; == Moves
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- Non-temporal gather loads
+ ;; -------------------------------------------------------------------------
+ ;; Includes gather forms of:
+ ;; - LDNT1B
+ ;; - LDNT1D
+ ;; - LDNT1H
+ ;; - LDNT1W
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Non-extending loads.
+ (define_insn "@aarch64_gather_ldnt<mode>"
+   [(set (match_operand:SVE_FULL_SD 0 "register_operand" "=w, w")
+ 	(unspec:SVE_FULL_SD
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
+ 	   (match_operand:DI 2 "aarch64_reg_or_zero" "Z, r")
+ 	   (match_operand:<V_INT_EQUIV> 3 "register_operand" "w, w")
+ 	   (mem:BLK (scratch))]
+ 	  UNSPEC_LDNT1_GATHER))]
+   "TARGET_SVE2"
+   "@
+    ldnt1<Vesize>\t%0.<Vetype>, %1/z, [%3.<Vetype>]
+    ldnt1<Vesize>\t%0.<Vetype>, %1/z, [%3.<Vetype>, %2]"
+ )
+ 
+ ;; Extending loads.
+ (define_insn_and_rewrite "@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>"
+   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w, w")
+ 	(unspec:SVE_FULL_SDI
+ 	  [(match_operand:<SVE_FULL_SDI:VPRED> 4 "general_operand" "UplDnm, UplDnm")
+ 	   (ANY_EXTEND:SVE_FULL_SDI
+ 	     (unspec:SVE_PARTIAL_I
+ 	       [(match_operand:<SVE_FULL_SDI:VPRED> 1 "register_operand" "Upl, Upl")
+ 		(match_operand:DI 2 "aarch64_reg_or_zero" "Z, r")
+ 		(match_operand:<SVE_FULL_SDI:V_INT_EQUIV> 3 "register_operand" "w, w")
+ 		(mem:BLK (scratch))]
+ 	       UNSPEC_LDNT1_GATHER))]
+ 	  UNSPEC_PRED_X))]
+   "TARGET_SVE2
+    && (~<SVE_FULL_SDI:narrower_mask> & <SVE_PARTIAL_I:self_mask>) == 0"
+   "@
+    ldnt1<ANY_EXTEND:s><SVE_PARTIAL_I:Vesize>\t%0.<SVE_FULL_SDI:Vetype>, %1/z, [%3.<SVE_FULL_SDI:Vetype>]
+    ldnt1<ANY_EXTEND:s><SVE_PARTIAL_I:Vesize>\t%0.<SVE_FULL_SDI:Vetype>, %1/z, [%3.<SVE_FULL_SDI:Vetype>, %2]"
+   "&& !CONSTANT_P (operands[4])"
+   {
+     operands[4] = CONSTM1_RTX (<SVE_FULL_SDI:VPRED>mode);
+   }
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- Non-temporal scatter stores
+ ;; -------------------------------------------------------------------------
+ ;; Includes scatter forms of:
+ ;; - STNT1B
+ ;; - STNT1D
+ ;; - STNT1H
+ ;; - STNT1W
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Non-truncating stores.
+ (define_insn "@aarch64_scatter_stnt<mode>"
+   [(set (mem:BLK (scratch))
+ 	(unspec:BLK
+ 	  [(match_operand:<VPRED> 0 "register_operand" "Upl, Upl")
+ 	   (match_operand:DI 1 "aarch64_reg_or_zero" "Z, r")
+ 	   (match_operand:<V_INT_EQUIV> 2 "register_operand" "w, w")
+ 	   (match_operand:SVE_FULL_SD 3 "register_operand" "w, w")]
+ 
+ 	  UNSPEC_STNT1_SCATTER))]
+   "TARGET_SVE"
+   "@
+    stnt1<Vesize>\t%3.<Vetype>, %0, [%2.<Vetype>]
+    stnt1<Vesize>\t%3.<Vetype>, %0, [%2.<Vetype>, %1]"
+ )
+ 
+ ;; Truncating stores.
+ (define_insn "@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>"
+   [(set (mem:BLK (scratch))
+ 	(unspec:BLK
+ 	  [(match_operand:<SVE_FULL_SDI:VPRED> 0 "register_operand" "Upl, Upl")
+ 	   (match_operand:DI 1 "aarch64_reg_or_zero" "Z, r")
+ 	   (match_operand:<SVE_FULL_SDI:V_INT_EQUIV> 2 "register_operand" "w, w")
+ 	   (truncate:SVE_PARTIAL_I
+ 	     (match_operand:SVE_FULL_SDI 3 "register_operand" "w, w"))]
+ 	  UNSPEC_STNT1_SCATTER))]
+   "TARGET_SVE2
+    && (~<SVE_FULL_SDI:narrower_mask> & <SVE_PARTIAL_I:self_mask>) == 0"
+   "@
+    stnt1<SVE_PARTIAL_I:Vesize>\t%3.<SVE_FULL_SDI:Vetype>, %0, [%2.<SVE_FULL_SDI:Vetype>]
+    stnt1<SVE_PARTIAL_I:Vesize>\t%3.<SVE_FULL_SDI:Vetype>, %0, [%2.<SVE_FULL_SDI:Vetype>, %1]"
+ )
+ 
+ ;; =========================================================================
+ ;; == Uniform binary arithmnetic
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Multiplication
+ ;; -------------------------------------------------------------------------
+ ;; Includes the lane forms of:
+ ;; - MUL
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_mul_lane_<mode>"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w")
+ 	(mult:SVE_FULL_HSDI
+ 	  (unspec:SVE_FULL_HSDI
+ 	    [(match_operand:SVE_FULL_HSDI 2 "register_operand" "<sve_lane_con>")
+ 	     (match_operand:SI 3 "const_int_operand")]
+ 	    UNSPEC_SVE_LANE_SELECT)
+ 	  (match_operand:SVE_FULL_HSDI 1 "register_operand" "w")))]
+   "TARGET_SVE2"
+   "mul\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>[%3]"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Scaled high-part multiplication
+ ;; -------------------------------------------------------------------------
+ ;; The patterns in this section are synthetic.
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Unpredicated integer multiply-high-with-(round-and-)scale.
+ (define_expand "<su>mulh<r>s<mode>3"
+   [(set (match_operand:SVE_FULL_BHSI 0 "register_operand")
+ 	(unspec:SVE_FULL_BHSI
+ 	  [(match_dup 3)
+ 	   (unspec:SVE_FULL_BHSI
+ 	     [(match_operand:SVE_FULL_BHSI 1 "register_operand")
+ 	      (match_operand:SVE_FULL_BHSI 2 "register_operand")]
+ 	     MULHRS)]
+ 	  UNSPEC_PRED_X))]
+   "TARGET_SVE2"
+   {
+     operands[3] = aarch64_ptrue_reg (<VPRED>mode);
+ 
+     rtx prod_b = gen_reg_rtx (<VWIDE>mode);
+     rtx prod_t = gen_reg_rtx (<VWIDE>mode);
+     emit_insn (gen_aarch64_sve_<su>mullb<Vwide> (prod_b, operands[1],
+ 						 operands[2]));
+     emit_insn (gen_aarch64_sve_<su>mullt<Vwide> (prod_t, operands[1],
+ 						 operands[2]));
+ 
+     rtx shift = GEN_INT (GET_MODE_UNIT_BITSIZE (<MODE>mode) - 1);
+     emit_insn (gen_aarch64_sve_<r>shrnb<Vwide> (operands[0], prod_b, shift));
+     emit_insn (gen_aarch64_sve_<r>shrnt<Vwide> (operands[0], operands[0],
+ 						prod_t, shift));
+ 
+     DONE;
+   }
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] General binary arithmetic that maps to unspecs
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SHADD
+ ;; - SHSUB
+ ;; - SHSUBR
+ ;; - SQRSHL
+ ;; - SQRSHLR
+ ;; - SRHADD
+ ;; - SRSHL
+ ;; - SRSHLR
+ ;; - SUQADD
+ ;; - UHADD
+ ;; - UHSUB
+ ;; - UHSUBR
+ ;; - UQRSHL
+ ;; - UQRSHLR
+ ;; - URHADD
+ ;; - URSHL
+ ;; - URSHLR
+ ;; - USQADD
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Integer average (floor).
+ (define_expand "<u>avg<mode>3_floor"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_dup 3)
+ 	   (unspec:SVE_FULL_I
+ 	     [(match_operand:SVE_FULL_I 1 "register_operand")
+ 	      (match_operand:SVE_FULL_I 2 "register_operand")]
+ 	     HADD)]
+ 	  UNSPEC_PRED_X))]
+   "TARGET_SVE2"
+   {
+     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
+   }
+ )
+ 
+ ;; Integer average (rounding).
+ (define_expand "<u>avg<mode>3_ceil"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_dup 3)
+ 	   (unspec:SVE_FULL_I
+ 	     [(match_operand:SVE_FULL_I 1 "register_operand")
+ 	      (match_operand:SVE_FULL_I 2 "register_operand")]
+ 	     RHADD)]
+ 	  UNSPEC_PRED_X))]
+   "TARGET_SVE2"
+   {
+     operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
+   }
+ )
+ 
+ ;; The immediate form of SQADD acts as an immediate form of SUQADD
+ ;; over its full range.  In contrast to the ss_plus pattern, we do
+ ;; not need to treat byte immediates specially.  E.g.:
+ ;;
+ ;;	SQADD	Z0.B, Z0.B, #128
+ ;;
+ ;; is equivalent to:
+ ;;
+ ;;	MOV	Z1.B, #128
+ ;;	SUQADD	Z0.B, P0/M, Z0.B, Z1.B
+ ;;
+ ;; even though it's not equivalent to:
+ ;;
+ ;;	MOV	Z1.B, #128
+ ;;	SQADD	Z0.B, P0/M, Z0.B, Z1.B	// Saturating subtraction of 128
+ (define_insn "@aarch64_sve_suqadd<mode>_const"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:SVE_FULL_I 1 "register_operand" "0, w")
+ 	   (match_operand:SVE_FULL_I 2 "aarch64_sve_arith_immediate")]
+ 	  UNSPEC_SUQADD))]
+   "TARGET_SVE2"
+   "@
+    sqadd\t%0.<Vetype>, %0.<Vetype>, #%D2
+    movprfx\t%0, %1\;sqadd\t%0.<Vetype>, %0.<Vetype>, #%D2"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; General predicated binary arithmetic.  All operations handled here
+ ;; are commutative or have a reversed form.
+ (define_insn "@aarch64_pred_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
+ 	   (unspec:SVE_FULL_I
+ 	     [(match_operand:SVE_FULL_I 2 "register_operand" "0, w, w")
+ 	      (match_operand:SVE_FULL_I 3 "register_operand" "w, 0, w")]
+ 	     SVE2_COND_INT_BINARY_REV)]
+ 	  UNSPEC_PRED_X))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+    <sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
+    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
+   [(set_attr "movprfx" "*,*,yes")]
+ )
+ 
+ ;; Predicated binary arithmetic with merging.
+ (define_expand "@cond_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:<VPRED> 1 "register_operand")
+ 	   (unspec:SVE_FULL_I
+ 	     [(match_dup 5)
+ 	      (unspec:SVE_FULL_I
+ 		[(match_operand:SVE_FULL_I 2 "register_operand")
+ 		 (match_operand:SVE_FULL_I 3 "register_operand")]
+ 		SVE2_COND_INT_BINARY)]
+ 	     UNSPEC_PRED_X)
+ 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_reg_or_zero")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+   {
+     operands[5] = CONSTM1_RTX (<MODE>mode);
+   }
+ )
+ 
+ ;; Predicated binary arithmetic, merging with the first input.
+ (define_insn_and_rewrite "*cond_<sve_int_op><mode>_2"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
+ 	   (unspec:SVE_FULL_I
+ 	     [(match_operand 4)
+ 	      (unspec:SVE_FULL_I
+ 		[(match_operand:SVE_FULL_I 2 "register_operand" "0, w")
+ 		 (match_operand:SVE_FULL_I 3 "register_operand" "w, w")]
+ 		SVE2_COND_INT_BINARY)]
+ 	     UNSPEC_PRED_X)
+ 	   (match_dup 2)]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
+   "&& !CONSTANT_P (operands[4])"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Predicated binary arithmetic, merging with the second input.
+ (define_insn_and_rewrite "*cond_<sve_int_op><mode>_3"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
+ 	   (unspec:SVE_FULL_I
+ 	     [(match_operand 4)
+ 	      (unspec:SVE_FULL_I
+ 		[(match_operand:SVE_FULL_I 2 "register_operand" "w, w")
+ 		 (match_operand:SVE_FULL_I 3 "register_operand" "0, w")]
+ 		SVE2_COND_INT_BINARY_REV)]
+ 	     UNSPEC_PRED_X)
+ 	   (match_dup 3)]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
+    movprfx\t%0, %3\;<sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>"
+   "&& !CONSTANT_P (operands[4])"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Predicated binary operations, merging with an independent value.
+ (define_insn_and_rewrite "*cond_<sve_int_op><mode>_any"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=&w, &w, &w, &w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl")
+ 	   (unspec:SVE_FULL_I
+ 	     [(match_operand 5)
+ 	      (unspec:SVE_FULL_I
+ 		[(match_operand:SVE_FULL_I 2 "register_operand" "0, w, w, w, w")
+ 		 (match_operand:SVE_FULL_I 3 "register_operand" "w, 0, w, w, w")]
+ 		SVE2_COND_INT_BINARY_REV)]
+ 	     UNSPEC_PRED_X)
+ 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_reg_or_zero" "Dz, Dz, Dz, 0, w")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2
+    && !rtx_equal_p (operands[2], operands[4])
+    && !rtx_equal_p (operands[3], operands[4])"
+   "@
+    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_int_op_rev>\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
+    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+    #"
+   "&& 1"
+   {
+     if (reload_completed
+         && register_operand (operands[4], <MODE>mode)
+         && !rtx_equal_p (operands[0], operands[4]))
+       {
+ 	emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[2],
+ 						 operands[4], operands[1]));
+ 	operands[4] = operands[2] = operands[0];
+       }
+     else if (!CONSTANT_P (operands[5]))
+       operands[5] = CONSTM1_RTX (<VPRED>mode);
+     else
+       FAIL;
+   }
+   [(set_attr "movprfx" "yes")]
+ )
+ 
+ ;; Predicated binary operations with no reverse form, merging with zero.
+ ;; At present we don't generate these patterns via a cond_* optab,
+ ;; so there's no correctness requirement to handle merging with an
+ ;; independent value.
+ (define_insn_and_rewrite "*cond_<sve_int_op><mode>_z"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=&w, &w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
+ 	   (unspec:SVE_FULL_I
+ 	     [(match_operand 5)
+ 	      (unspec:SVE_FULL_I
+ 		[(match_operand:SVE_FULL_I 2 "register_operand" "0, w")
+ 		 (match_operand:SVE_FULL_I 3 "register_operand" "w, w")]
+ 		SVE2_COND_INT_BINARY_NOREV)]
+ 	     UNSPEC_PRED_X)
+ 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_imm_zero")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+   "@
+    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
+   "&& !CONSTANT_P (operands[5])"
+   {
+     operands[5] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "yes")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Saturating binary arithmetic
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SQDMULH
+ ;; - SQRDMULH
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:SVE_FULL_I 1 "register_operand" "w")
+ 	   (match_operand:SVE_FULL_I 2 "register_operand" "w")]
+ 	  SVE2_INT_BINARY))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
+ )
+ 
+ (define_insn "@aarch64_sve_<sve_int_op>_lane_<mode>"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_HSDI
+ 	  [(match_operand:SVE_FULL_HSDI 1 "register_operand" "w")
+ 	   (unspec:SVE_FULL_HSDI
+ 	     [(match_operand:SVE_FULL_HSDI 2 "register_operand" "<sve_lane_con>")
+ 	      (match_operand:SI 3 "const_int_operand")]
+ 	     UNSPEC_SVE_LANE_SELECT)]
+ 	  SVE2_INT_BINARY_LANE))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>[%3]"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Saturating left shifts
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SQSHL
+ ;; - SQSHLR
+ ;; - UQSHL
+ ;; - UQSHLR
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Predicated left shifts.
+ (define_insn "@aarch64_pred_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, w, w, ?&w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl")
+ 	   (unspec:SVE_FULL_I
+ 	     [(match_operand:SVE_FULL_I 2 "register_operand" "0, 0, w, w, w")
+ 	      (match_operand:SVE_FULL_I 3 "aarch64_sve_<lr>shift_operand" "D<lr>, w, 0, D<lr>, w")]
+ 	     SVE2_COND_INT_SHIFT)]
+ 	  UNSPEC_PRED_X))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
+    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+    <sve_int_op>r\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
+    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
+    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
+   [(set_attr "movprfx" "*,*,*,yes,yes")]
+ )
+ 
+ ;; Predicated left shifts with merging.
+ (define_expand "@cond_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:<VPRED> 1 "register_operand")
+ 	   (unspec:SVE_FULL_I
+ 	     [(match_dup 5)
+ 	      (unspec:SVE_FULL_I
+ 		[(match_operand:SVE_FULL_I 2 "register_operand")
+ 		 (match_operand:SVE_FULL_I 3 "aarch64_sve_<lr>shift_operand")]
+ 		SVE2_COND_INT_SHIFT)]
+ 	     UNSPEC_PRED_X)
+ 	   (match_operand:SVE_FULL_I 4 "register_operand")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+   {
+     operands[5] = CONSTM1_RTX (<VPRED>mode);
+   }
+ )
+ 
+ ;; Predicated left shifts, merging with the first input.
+ (define_insn_and_rewrite "*cond_<sve_int_op><mode>_2"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, w, ?&w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl")
+ 	   (unspec:SVE_FULL_I
+ 	     [(match_operand 4)
+ 	      (unspec:SVE_FULL_I
+ 		[(match_operand:SVE_FULL_I 2 "register_operand" "0, 0, w, w")
+ 		 (match_operand:SVE_FULL_I 3 "aarch64_sve_<lr>shift_operand" "D<lr>, w, D<lr>, w")]
+ 		SVE2_COND_INT_SHIFT)]
+ 	     UNSPEC_PRED_X)
+ 	   (match_dup 2)]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
+    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
+    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
+   "&& !CONSTANT_P (operands[4])"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "*,*,yes,yes")]
+ )
+ 
+ ;; Predicated left shifts, merging with the second input.
+ (define_insn_and_rewrite "*cond_<sve_int_op><mode>_3"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
+ 	   (unspec:SVE_FULL_I
+ 	     [(match_operand 4)
+ 	      (unspec:SVE_FULL_I
+ 		[(match_operand:SVE_FULL_I 2 "register_operand" "w, w")
+ 		 (match_operand:SVE_FULL_I 3 "register_operand" "0, w")]
+ 		SVE2_COND_INT_SHIFT)]
+ 	     UNSPEC_PRED_X)
+ 	   (match_dup 3)]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>r\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
+    movprfx\t%0, %3\;<sve_int_op>r\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>"
+   "&& !CONSTANT_P (operands[4])"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Predicated left shifts, merging with an independent value.
+ (define_insn_and_rewrite "*cond_<sve_int_op><mode>_any"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=&w, &w, &w, &w, &w, &w, &w, ?&w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl, Upl")
+ 	   (unspec:SVE_FULL_I
+ 	     [(match_operand 5)
+ 	      (unspec:SVE_FULL_I
+ 		[(match_operand:SVE_FULL_I 2 "register_operand" "0, 0, w, w, w, w, w, w, w")
+ 		 (match_operand:SVE_FULL_I 3 "aarch64_sve_<lr>shift_operand" "D<lr>, w, 0, D<lr>, w, D<lr>, w, D<lr>, w")]
+ 		SVE2_COND_INT_SHIFT)]
+ 	     UNSPEC_PRED_X)
+ 	   (match_operand:SVE_FULL_I 4 "aarch64_simd_reg_or_zero" "Dz, Dz, Dz, Dz, Dz, 0, 0, w, w")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2
+    && !rtx_equal_p (operands[2], operands[4])
+    && (CONSTANT_P (operands[4]) || !rtx_equal_p (operands[3], operands[4]))"
+   "@
+    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
+    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_int_op>r\t%0.<Vetype>, %1/m, %0.<Vetype>, %2.<Vetype>
+    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
+    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, #%3
+    movprfx\t%0.<Vetype>, %1/m, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+   #
+   #"
+   "&& 1"
+   {
+     if (reload_completed
+         && register_operand (operands[4], <MODE>mode)
+         && !rtx_equal_p (operands[0], operands[4]))
+       {
+ 	emit_insn (gen_vcond_mask_<mode><vpred> (operands[0], operands[2],
+ 						 operands[4], operands[1]));
+ 	operands[4] = operands[2] = operands[0];
+       }
+     else if (!CONSTANT_P (operands[5]))
+       operands[5] = CONSTM1_RTX (<VPRED>mode);
+     else
+       FAIL;
+   }
+   [(set_attr "movprfx" "yes")]
+ )
+ 
+ ;; =========================================================================
+ ;; == Uniform ternary arithmnetic
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] General ternary arithmetic that maps to unspecs
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - ADCLB
+ ;; - ADCLT
+ ;; - EORBT
+ ;; - EORTB
+ ;; - SBCLB
+ ;; - SBCLT
+ ;; - SQRDMLAH
+ ;; - SQRDMLSH
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:SVE_FULL_I 2 "register_operand" "w, w")
+ 	   (match_operand:SVE_FULL_I 3 "register_operand" "w, w")
+ 	   (match_operand:SVE_FULL_I 1 "register_operand" "0, w")]
+ 	  SVE2_INT_TERNARY))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>
+    movprfx\t%0, %1\;<sve_int_op>\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ (define_insn "@aarch64_sve_<sve_int_op>_lane_<mode>"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_HSDI
+ 	  [(match_operand:SVE_FULL_HSDI 2 "register_operand" "w, w")
+ 	   (unspec:SVE_FULL_HSDI
+ 	     [(match_operand:SVE_FULL_HSDI 3 "register_operand" "<sve_lane_con>, <sve_lane_con>")
+ 	      (match_operand:SI 4 "const_int_operand")]
+ 	     UNSPEC_SVE_LANE_SELECT)
+ 	   (match_operand:SVE_FULL_HSDI 1 "register_operand" "0, w")]
+ 	  SVE2_INT_TERNARY_LANE))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>[%4]
+    movprfx\t%0, %1\;<sve_int_op>\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>[%4]"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Multiply-and-accumulate operations
+ ;; -------------------------------------------------------------------------
+ ;; Includes the lane forms of:
+ ;; - MLA
+ ;; - MLS
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_add_mul_lane_<mode>"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w, ?&w")
+ 	(plus:SVE_FULL_HSDI
+ 	  (mult:SVE_FULL_HSDI
+ 	    (unspec:SVE_FULL_HSDI
+ 	      [(match_operand:SVE_FULL_HSDI 3 "register_operand" "<sve_lane_con>, <sve_lane_con>")
+ 	       (match_operand:SI 4 "const_int_operand")]
+ 	      UNSPEC_SVE_LANE_SELECT)
+ 	    (match_operand:SVE_FULL_HSDI 2 "register_operand" "w, w"))
+ 	  (match_operand:SVE_FULL_HSDI 1 "register_operand" "0, w")))]
+   "TARGET_SVE2"
+   "@
+    mla\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>[%4]
+    movprfx\t%0, %1\;mla\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>[%4]"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ (define_insn "@aarch64_sve_sub_mul_lane_<mode>"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w, ?&w")
+ 	(minus:SVE_FULL_HSDI
+ 	  (match_operand:SVE_FULL_HSDI 1 "register_operand" "0, w")
+ 	  (mult:SVE_FULL_HSDI
+ 	    (unspec:SVE_FULL_HSDI
+ 	      [(match_operand:SVE_FULL_HSDI 3 "register_operand" "<sve_lane_con>, <sve_lane_con>")
+ 	       (match_operand:SI 4 "const_int_operand")]
+ 	      UNSPEC_SVE_LANE_SELECT)
+ 	    (match_operand:SVE_FULL_HSDI 2 "register_operand" "w, w"))))]
+   "TARGET_SVE2"
+   "@
+    mls\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>[%4]
+    movprfx\t%0, %1\;mls\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>[%4]"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Binary logic operations with rotation
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - XAR
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve2_xar<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(rotatert:SVE_FULL_I
+ 	  (xor:SVE_FULL_I
+ 	    (match_operand:SVE_FULL_I 1 "register_operand" "%0, w")
+ 	    (match_operand:SVE_FULL_I 2 "register_operand" "w, w"))
+ 	  (match_operand:SVE_FULL_I 3 "aarch64_simd_rshift_imm")))]
+   "TARGET_SVE2"
+   "@
+   xar\t%0.<Vetype>, %0.<Vetype>, %2.<Vetype>, #%3
+   movprfx\t%0, %1\;xar\t%0.<Vetype>, %0.<Vetype>, %2.<Vetype>, #%3"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Ternary logic operations
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - BCAX
+ ;; - BSL
+ ;; - BSL1N
+ ;; - BSL2N
+ ;; - EOR3
+ ;; - NBSL
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Unpredicated exclusive OR of AND.
+ (define_insn "@aarch64_sve2_bcax<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(xor:SVE_FULL_I
+ 	  (and:SVE_FULL_I
+ 	    (match_operand:SVE_FULL_I 2 "register_operand" "w, w")
+ 	    (match_operand:SVE_FULL_I 3 "register_operand" "w, w"))
+ 	  (match_operand:SVE_FULL_I 1 "register_operand" "0, w")))]
+   "TARGET_SVE2"
+   "@
+   bcax\t%0.d, %0.d, %2.d, %3.d
+   movprfx\t%0, %1\;bcax\t%0.d, %0.d, %2.d, %3.d"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Unpredicated 3-way exclusive OR.
+ (define_insn "@aarch64_sve2_eor3<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, w, w, ?&w")
+ 	(xor:SVE_FULL_I
+ 	  (xor:SVE_FULL_I
+ 	    (match_operand:SVE_FULL_I 1 "register_operand" "0, w, w, w")
+ 	    (match_operand:SVE_FULL_I 2 "register_operand" "w, 0, w, w"))
+ 	  (match_operand:SVE_FULL_I 3 "register_operand" "w, w, 0, w")))]
+   "TARGET_SVE2"
+   "@
+   eor3\t%0.d, %0.d, %2.d, %3.d
+   eor3\t%0.d, %0.d, %1.d, %3.d
+   eor3\t%0.d, %0.d, %1.d, %2.d
+   movprfx\t%0, %1\;eor3\t%0.d, %0.d, %2.d, %3.d"
+   [(set_attr "movprfx" "*,*,*,yes")]
+ )
+ 
+ ;; Use NBSL for vector NOR.
+ (define_insn_and_rewrite "*aarch64_sve2_nor<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand 3)
+ 	   (and:SVE_FULL_I
+ 	     (not:SVE_FULL_I
+ 	       (match_operand:SVE_FULL_I 1 "register_operand" "%0, w"))
+ 	     (not:SVE_FULL_I
+ 	       (match_operand:SVE_FULL_I 2 "register_operand" "w, w")))]
+ 	  UNSPEC_PRED_X))]
+   "TARGET_SVE2"
+   "@
+   nbsl\t%0.d, %0.d, %2.d, %0.d
+   movprfx\t%0, %1\;nbsl\t%0.d, %0.d, %2.d, %0.d"
+   "&& !CONSTANT_P (operands[3])"
+   {
+     operands[3] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Use NBSL for vector NAND.
+ (define_insn_and_rewrite "*aarch64_sve2_nand<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand 3)
+ 	   (ior:SVE_FULL_I
+ 	     (not:SVE_FULL_I
+ 	       (match_operand:SVE_FULL_I 1 "register_operand" "%0, w"))
+ 	     (not:SVE_FULL_I
+ 	       (match_operand:SVE_FULL_I 2 "register_operand" "w, w")))]
+ 	  UNSPEC_PRED_X))]
+   "TARGET_SVE2"
+   "@
+   nbsl\t%0.d, %0.d, %2.d, %2.d
+   movprfx\t%0, %1\;nbsl\t%0.d, %0.d, %2.d, %2.d"
+   "&& !CONSTANT_P (operands[3])"
+   {
+     operands[3] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Unpredicated bitwise select.
+ ;; (op3 ? bsl_mov : bsl_dup) == (((bsl_mov ^ bsl_dup) & op3) ^ bsl_dup)
+ (define_expand "@aarch64_sve2_bsl<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand")
+ 	(xor:SVE_FULL_I
+ 	  (and:SVE_FULL_I
+ 	    (xor:SVE_FULL_I
+ 	      (match_operand:SVE_FULL_I 1 "register_operand")
+ 	      (match_operand:SVE_FULL_I 2 "register_operand"))
+ 	    (match_operand:SVE_FULL_I 3 "register_operand"))
+ 	  (match_dup 2)))]
+   "TARGET_SVE2"
+ )
+ 
+ (define_insn "*aarch64_sve2_bsl<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(xor:SVE_FULL_I
+ 	  (and:SVE_FULL_I
+ 	    (xor:SVE_FULL_I
+ 	      (match_operand:SVE_FULL_I 1 "register_operand" "<bsl_1st>, w")
+ 	      (match_operand:SVE_FULL_I 2 "register_operand" "<bsl_2nd>, w"))
+ 	    (match_operand:SVE_FULL_I 3 "register_operand" "w, w"))
+ 	  (match_dup BSL_DUP)))]
+   "TARGET_SVE2"
+   "@
+   bsl\t%0.d, %0.d, %<bsl_dup>.d, %3.d
+   movprfx\t%0, %<bsl_mov>\;bsl\t%0.d, %0.d, %<bsl_dup>.d, %3.d"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Unpredicated bitwise inverted select.
+ ;; (~(op3 ? bsl_mov : bsl_dup)) == (~(((bsl_mov ^ bsl_dup) & op3) ^ bsl_dup))
+ (define_expand "@aarch64_sve2_nbsl<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_dup 4)
+ 	   (not:SVE_FULL_I
+ 	     (xor:SVE_FULL_I
+ 	       (and:SVE_FULL_I
+ 		 (xor:SVE_FULL_I
+ 		   (match_operand:SVE_FULL_I 1 "register_operand")
+ 		   (match_operand:SVE_FULL_I 2 "register_operand"))
+ 		 (match_operand:SVE_FULL_I 3 "register_operand"))
+ 	       (match_dup 2)))]
+ 	  UNSPEC_PRED_X))]
+   "TARGET_SVE2"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+ )
+ 
+ (define_insn_and_rewrite "*aarch64_sve2_nbsl<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand 4)
+ 	   (not:SVE_FULL_I
+ 	     (xor:SVE_FULL_I
+ 	       (and:SVE_FULL_I
+ 		 (xor:SVE_FULL_I
+ 		   (match_operand:SVE_FULL_I 1 "register_operand" "<bsl_1st>, w")
+ 		   (match_operand:SVE_FULL_I 2 "register_operand" "<bsl_2nd>, w"))
+ 		 (match_operand:SVE_FULL_I 3 "register_operand" "w, w"))
+ 	       (match_dup BSL_DUP)))]
+ 	  UNSPEC_PRED_X))]
+   "TARGET_SVE2"
+   "@
+   nbsl\t%0.d, %0.d, %<bsl_dup>.d, %3.d
+   movprfx\t%0, %<bsl_mov>\;nbsl\t%0.d, %0.d, %<bsl_dup>.d, %3.d"
+   "&& !CONSTANT_P (operands[4])"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Unpredicated bitwise select with inverted first operand.
+ ;; (op3 ? ~bsl_mov : bsl_dup) == ((~(bsl_mov ^ bsl_dup) & op3) ^ bsl_dup)
+ (define_expand "@aarch64_sve2_bsl1n<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand")
+ 	(xor:SVE_FULL_I
+ 	  (and:SVE_FULL_I
+ 	    (unspec:SVE_FULL_I
+ 	      [(match_dup 4)
+ 	       (not:SVE_FULL_I
+ 		 (xor:SVE_FULL_I
+ 		   (match_operand:SVE_FULL_I 1 "register_operand")
+ 		   (match_operand:SVE_FULL_I 2 "register_operand")))]
+ 	      UNSPEC_PRED_X)
+ 	    (match_operand:SVE_FULL_I 3 "register_operand"))
+ 	  (match_dup 2)))]
+   "TARGET_SVE2"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+ )
+ 
+ (define_insn_and_rewrite "*aarch64_sve2_bsl1n<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(xor:SVE_FULL_I
+ 	  (and:SVE_FULL_I
+ 	    (unspec:SVE_FULL_I
+ 	      [(match_operand 4)
+ 	       (not:SVE_FULL_I
+ 		 (xor:SVE_FULL_I
+ 		   (match_operand:SVE_FULL_I 1 "register_operand" "<bsl_1st>, w")
+ 		   (match_operand:SVE_FULL_I 2 "register_operand" "<bsl_2nd>, w")))]
+ 	      UNSPEC_PRED_X)
+ 	    (match_operand:SVE_FULL_I 3 "register_operand" "w, w"))
+ 	  (match_dup BSL_DUP)))]
+   "TARGET_SVE2"
+   "@
+   bsl1n\t%0.d, %0.d, %<bsl_dup>.d, %3.d
+   movprfx\t%0, %<bsl_mov>\;bsl1n\t%0.d, %0.d, %<bsl_dup>.d, %3.d"
+   "&& !CONSTANT_P (operands[4])"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Unpredicated bitwise select with inverted second operand.
+ ;; (bsl_dup ? bsl_mov : ~op3) == ((bsl_dup & bsl_mov) | (~op3 & ~bsl_dup))
+ (define_expand "@aarch64_sve2_bsl2n<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand")
+ 	(ior:SVE_FULL_I
+ 	  (and:SVE_FULL_I
+ 	    (match_operand:SVE_FULL_I 1 "register_operand")
+ 	    (match_operand:SVE_FULL_I 3 "register_operand"))
+ 	  (unspec:SVE_FULL_I
+ 	    [(match_dup 4)
+ 	     (and:SVE_FULL_I
+ 	       (not:SVE_FULL_I
+ 		 (match_operand:SVE_FULL_I 2 "register_operand"))
+ 	       (not:SVE_FULL_I
+ 		 (match_dup 3)))]
+ 	    UNSPEC_PRED_X)))]
+   "TARGET_SVE2"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+ )
+ 
+ (define_insn_and_rewrite "*aarch64_sve2_bsl2n<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(ior:SVE_FULL_I
+ 	  (and:SVE_FULL_I
+ 	    (match_operand:SVE_FULL_I 1 "register_operand" "<bsl_1st>, w")
+ 	    (match_operand:SVE_FULL_I 2 "register_operand" "<bsl_2nd>, w"))
+ 	  (unspec:SVE_FULL_I
+ 	    [(match_operand 4)
+ 	     (and:SVE_FULL_I
+ 	       (not:SVE_FULL_I
+ 		 (match_operand:SVE_FULL_I 3 "register_operand" "w, w"))
+ 	       (not:SVE_FULL_I
+ 		 (match_dup BSL_DUP)))]
+ 	    UNSPEC_PRED_X)))]
+   "TARGET_SVE2"
+   "@
+   bsl2n\t%0.d, %0.d, %3.d, %<bsl_dup>.d
+   movprfx\t%0, %<bsl_mov>\;bsl2n\t%0.d, %0.d, %3.d, %<bsl_dup>.d"
+   "&& !CONSTANT_P (operands[4])"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Unpredicated bitwise select with inverted second operand, alternative form.
+ ;; (bsl_dup ? bsl_mov : ~op3) == ((bsl_dup & bsl_mov) | (~bsl_dup & ~op3))
+ (define_insn_and_rewrite "*aarch64_sve2_bsl2n<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(ior:SVE_FULL_I
+ 	  (and:SVE_FULL_I
+ 	    (match_operand:SVE_FULL_I 1 "register_operand" "<bsl_1st>, w")
+ 	    (match_operand:SVE_FULL_I 2 "register_operand" "<bsl_2nd>, w"))
+ 	  (unspec:SVE_FULL_I
+ 	    [(match_operand 4)
+ 	     (and:SVE_FULL_I
+ 	       (not:SVE_FULL_I
+ 		 (match_dup BSL_DUP))
+ 	       (not:SVE_FULL_I
+ 		 (match_operand:SVE_FULL_I 3 "register_operand" "w, w")))]
+ 	    UNSPEC_PRED_X)))]
+   "TARGET_SVE2"
+   "@
+   bsl2n\t%0.d, %0.d, %3.d, %<bsl_dup>.d
+   movprfx\t%0, %<bsl_mov>\;bsl2n\t%0.d, %0.d, %3.d, %<bsl_dup>.d"
+   "&& !CONSTANT_P (operands[4])"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Shift-and-accumulate operations
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SRSRA
+ ;; - SSRA
+ ;; - URSRA
+ ;; - USRA
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Provide the natural unpredicated interface for SSRA and USRA.
+ (define_expand "@aarch64_sve_add_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand")
+ 	(plus:SVE_FULL_I
+ 	  (unspec:SVE_FULL_I
+ 	    [(match_dup 4)
+ 	     (SHIFTRT:SVE_FULL_I
+ 	       (match_operand:SVE_FULL_I 2 "register_operand")
+ 	       (match_operand:SVE_FULL_I 3 "aarch64_simd_rshift_imm"))]
+ 	    UNSPEC_PRED_X)
+ 	 (match_operand:SVE_FULL_I 1 "register_operand")))]
+   "TARGET_SVE2"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+ )
+ 
+ ;; Pattern-match SSRA and USRA as a predicated operation whose predicate
+ ;; isn't needed.
+ (define_insn_and_rewrite "*aarch64_sve2_sra<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(plus:SVE_FULL_I
+ 	  (unspec:SVE_FULL_I
+ 	    [(match_operand 4)
+ 	     (SHIFTRT:SVE_FULL_I
+ 	       (match_operand:SVE_FULL_I 2 "register_operand" "w, w")
+ 	       (match_operand:SVE_FULL_I 3 "aarch64_simd_rshift_imm"))]
+ 	    UNSPEC_PRED_X)
+ 	 (match_operand:SVE_FULL_I 1 "register_operand" "0, w")))]
+   "TARGET_SVE2"
+   "@
+    <sra_op>sra\t%0.<Vetype>, %2.<Vetype>, #%3
+    movprfx\t%0, %1\;<sra_op>sra\t%0.<Vetype>, %2.<Vetype>, #%3"
+   "&& !CONSTANT_P (operands[4])"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; SRSRA and URSRA.
+ (define_insn "@aarch64_sve_add_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(plus:SVE_FULL_I
+ 	  (unspec:SVE_FULL_I
+ 	    [(match_operand:SVE_FULL_I 2 "register_operand" "w, w")
+ 	     (match_operand:SVE_FULL_I 3 "aarch64_simd_rshift_imm")]
+ 	    VRSHR_N)
+ 	 (match_operand:SVE_FULL_I 1 "register_operand" "0, w")))]
+   "TARGET_SVE2"
+   "@
+    <sur>sra\t%0.<Vetype>, %2.<Vetype>, #%3
+    movprfx\t%0, %1\;<sur>sra\t%0.<Vetype>, %2.<Vetype>, #%3"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Shift-and-insert operations
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SLI
+ ;; - SRI
+ ;; -------------------------------------------------------------------------
+ 
+ ;; These instructions do not take MOVPRFX.
+ (define_insn "@aarch64_sve_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:SVE_FULL_I 1 "register_operand" "0")
+ 	   (match_operand:SVE_FULL_I 2 "register_operand" "w")
+ 	   (match_operand:SVE_FULL_I 3 "aarch64_simd_<lr>shift_imm")]
+ 	  SVE2_INT_SHIFT_INSERT))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Vetype>, %2.<Vetype>, #%3"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Sum of absolute differences
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SABA
+ ;; - UABA
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Provide the natural unpredicated interface for SABA and UABA.
+ (define_expand "@aarch64_sve2_<su>aba<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(plus:SVE_FULL_I
+ 	  (minus:SVE_FULL_I
+ 	    (unspec:SVE_FULL_I
+ 	      [(match_dup 4)
+ 	       (USMAX:SVE_FULL_I
+ 		 (match_operand:SVE_FULL_I 2 "register_operand" "w, w")
+ 		 (match_operand:SVE_FULL_I 3 "register_operand" "w, w"))]
+ 	      UNSPEC_PRED_X)
+ 	    (unspec:SVE_FULL_I
+ 	      [(match_dup 4)
+ 	       (<max_opp>:SVE_FULL_I
+ 		 (match_dup 2)
+ 		 (match_dup 3))]
+ 	      UNSPEC_PRED_X))
+ 	  (match_operand:SVE_FULL_I 1 "register_operand" "0, w")))]
+   "TARGET_SVE2"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+ )
+ 
+ ;; Pattern-match SABA and UABA as an absolute-difference-and-accumulate
+ ;; operation whose predicates aren't needed.
+ (define_insn "*aarch64_sve2_<su>aba<mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(plus:SVE_FULL_I
+ 	  (minus:SVE_FULL_I
+ 	    (unspec:SVE_FULL_I
+ 	      [(match_operand 4)
+ 	       (USMAX:SVE_FULL_I
+ 		 (match_operand:SVE_FULL_I 2 "register_operand" "w, w")
+ 		 (match_operand:SVE_FULL_I 3 "register_operand" "w, w"))]
+ 	      UNSPEC_PRED_X)
+ 	    (unspec:SVE_FULL_I
+ 	      [(match_operand 5)
+ 	       (<max_opp>:SVE_FULL_I
+ 		 (match_dup 2)
+ 		 (match_dup 3))]
+ 	      UNSPEC_PRED_X))
+ 	  (match_operand:SVE_FULL_I 1 "register_operand" "0, w")))]
+   "TARGET_SVE2"
+   "@
+    <su>aba\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>
+    movprfx\t%0, %1\;<su>aba\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; =========================================================================
+ ;; == Extending arithmetic
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Wide binary arithmetic
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SADDWB
+ ;; - SADDWT
+ ;; - SSUBWB
+ ;; - SSUBWT
+ ;; - UADDWB
+ ;; - UADDWT
+ ;; - USUBWB
+ ;; - USUBWT
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_HSDI
+ 	  [(match_operand:SVE_FULL_HSDI 1 "register_operand" "w")
+ 	   (match_operand:<VNARROW> 2 "register_operand" "w")]
+ 	  SVE2_INT_BINARY_WIDE))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Vetype>, %1.<Vetype>, %2.<Ventype>"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Long binary arithmetic
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SABDLB
+ ;; - SABDLT
+ ;; - SADDLB
+ ;; - SADDLBT
+ ;; - SADDLT
+ ;; - SMULLB
+ ;; - SMULLT
+ ;; - SQDMULLB
+ ;; - SQDMULLT
+ ;; - SSUBLB
+ ;; - SSUBLBT
+ ;; - SSUBLT
+ ;; - SSUBLTB
+ ;; - UABDLB
+ ;; - UABDLT
+ ;; - UADDLB
+ ;; - UADDLT
+ ;; - UMULLB
+ ;; - UMULLT
+ ;; - USUBLB
+ ;; - USUBLT
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_HSDI
+ 	  [(match_operand:<VNARROW> 1 "register_operand" "w")
+ 	   (match_operand:<VNARROW> 2 "register_operand" "w")]
+ 	  SVE2_INT_BINARY_LONG))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Vetype>, %1.<Ventype>, %2.<Ventype>"
+ )
+ 
+ (define_insn "@aarch64_sve_<sve_int_op>_lane_<mode>"
+   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_SDI
+ 	  [(match_operand:<VNARROW> 1 "register_operand" "w")
+ 	   (unspec:<VNARROW>
+ 	     [(match_operand:<VNARROW> 2 "register_operand" "<sve_lane_con>")
+ 	      (match_operand:SI 3 "const_int_operand")]
+ 	     UNSPEC_SVE_LANE_SELECT)]
+ 	  SVE2_INT_BINARY_LONG_LANE))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Vetype>, %1.<Ventype>, %2.<Ventype>[%3]"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Long left shifts
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SSHLLB
+ ;; - SSHLLT
+ ;; - USHLLB
+ ;; - USHLLT
+ ;; -------------------------------------------------------------------------
+ 
+ ;; The immediate range is enforced before generating the instruction.
+ (define_insn "@aarch64_sve_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_HSDI
+ 	  [(match_operand:<VNARROW> 1 "register_operand" "w")
+ 	   (match_operand:DI 2 "const_int_operand")]
+ 	  SVE2_INT_SHIFT_IMM_LONG))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Vetype>, %1.<Ventype>, #%2"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Long binary arithmetic with accumulation
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SABALB
+ ;; - SABALT
+ ;; - SMLALB
+ ;; - SMLALT
+ ;; - SMLSLB
+ ;; - SMLSLT
+ ;; - SQDMLALB
+ ;; - SQDMLALBT
+ ;; - SQDMLALT
+ ;; - SQDMLSLB
+ ;; - SQDMLSLBT
+ ;; - SQDMLSLT
+ ;; - UABALB
+ ;; - UABALT
+ ;; - UMLALB
+ ;; - UMLALT
+ ;; - UMLSLB
+ ;; - UMLSLT
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Non-saturating MLA operations.
+ (define_insn "@aarch64_sve_add_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w, ?&w")
+ 	(plus:SVE_FULL_HSDI
+ 	  (unspec:SVE_FULL_HSDI
+ 	    [(match_operand:<VNARROW> 2 "register_operand" "w, w")
+ 	     (match_operand:<VNARROW> 3 "register_operand" "w, w")]
+ 	    SVE2_INT_ADD_BINARY_LONG)
+ 	  (match_operand:SVE_FULL_HSDI 1 "register_operand" "0, w")))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_add_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>
+    movprfx\t%0, %1\;<sve_int_add_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Non-saturating MLA operations with lane select.
+ (define_insn "@aarch64_sve_add_<sve_int_op>_lane_<mode>"
+   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w, ?&w")
+ 	(plus:SVE_FULL_SDI
+ 	  (unspec:SVE_FULL_SDI
+ 	    [(match_operand:<VNARROW> 2 "register_operand" "w, w")
+ 	     (unspec:<VNARROW>
+ 	       [(match_operand:<VNARROW> 3 "register_operand" "<sve_lane_con>, <sve_lane_con>")
+ 		(match_operand:SI 4 "const_int_operand")]
+ 	       UNSPEC_SVE_LANE_SELECT)]
+ 	    SVE2_INT_ADD_BINARY_LONG_LANE)
+ 	  (match_operand:SVE_FULL_SDI 1 "register_operand" "0, w")))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_add_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>[%4]
+    movprfx\t%0, %1\;<sve_int_add_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>[%4]"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Saturating MLA operations.
+ (define_insn "@aarch64_sve_qadd_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w, ?&w")
+ 	(ss_plus:SVE_FULL_HSDI
+ 	  (unspec:SVE_FULL_HSDI
+ 	    [(match_operand:<VNARROW> 2 "register_operand" "w, w")
+ 	     (match_operand:<VNARROW> 3 "register_operand" "w, w")]
+ 	    SVE2_INT_QADD_BINARY_LONG)
+ 	  (match_operand:SVE_FULL_HSDI 1 "register_operand" "0, w")))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_qadd_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>
+    movprfx\t%0, %1\;<sve_int_qadd_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Saturating MLA operations with lane select.
+ (define_insn "@aarch64_sve_qadd_<sve_int_op>_lane_<mode>"
+   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w, ?&w")
+ 	(ss_plus:SVE_FULL_SDI
+ 	  (unspec:SVE_FULL_SDI
+ 	    [(match_operand:<VNARROW> 2 "register_operand" "w, w")
+ 	     (unspec:<VNARROW>
+ 	       [(match_operand:<VNARROW> 3 "register_operand" "<sve_lane_con>, <sve_lane_con>")
+ 		(match_operand:SI 4 "const_int_operand")]
+ 	       UNSPEC_SVE_LANE_SELECT)]
+ 	    SVE2_INT_QADD_BINARY_LONG_LANE)
+ 	  (match_operand:SVE_FULL_SDI 1 "register_operand" "0, w")))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_qadd_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>[%4]
+    movprfx\t%0, %1\;<sve_int_qadd_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>[%4]"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Non-saturating MLS operations.
+ (define_insn "@aarch64_sve_sub_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w, ?&w")
+ 	(minus:SVE_FULL_HSDI
+ 	  (match_operand:SVE_FULL_HSDI 1 "register_operand" "0, w")
+ 	  (unspec:SVE_FULL_HSDI
+ 	    [(match_operand:<VNARROW> 2 "register_operand" "w, w")
+ 	     (match_operand:<VNARROW> 3 "register_operand" "w, w")]
+ 	    SVE2_INT_SUB_BINARY_LONG)))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_sub_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>
+    movprfx\t%0, %1\;<sve_int_sub_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Non-saturating MLS operations with lane select.
+ (define_insn "@aarch64_sve_sub_<sve_int_op>_lane_<mode>"
+   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w, ?&w")
+ 	(minus:SVE_FULL_SDI
+ 	  (match_operand:SVE_FULL_SDI 1 "register_operand" "0, w")
+ 	  (unspec:SVE_FULL_SDI
+ 	    [(match_operand:<VNARROW> 2 "register_operand" "w, w")
+ 	     (unspec:<VNARROW>
+ 	       [(match_operand:<VNARROW> 3 "register_operand" "<sve_lane_con>, <sve_lane_con>")
+ 		(match_operand:SI 4 "const_int_operand")]
+ 	       UNSPEC_SVE_LANE_SELECT)]
+ 	    SVE2_INT_SUB_BINARY_LONG_LANE)))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_sub_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>[%4]
+    movprfx\t%0, %1\;<sve_int_sub_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>[%4]"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Saturating MLS operations.
+ (define_insn "@aarch64_sve_qsub_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w, ?&w")
+ 	(ss_minus:SVE_FULL_HSDI
+ 	  (match_operand:SVE_FULL_HSDI 1 "register_operand" "0, w")
+ 	  (unspec:SVE_FULL_HSDI
+ 	    [(match_operand:<VNARROW> 2 "register_operand" "w, w")
+ 	     (match_operand:<VNARROW> 3 "register_operand" "w, w")]
+ 	    SVE2_INT_QSUB_BINARY_LONG)))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_qsub_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>
+    movprfx\t%0, %1\;<sve_int_qsub_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Saturating MLS operations with lane select.
+ (define_insn "@aarch64_sve_qsub_<sve_int_op>_lane_<mode>"
+   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w, ?&w")
+ 	(ss_minus:SVE_FULL_SDI
+ 	  (match_operand:SVE_FULL_SDI 1 "register_operand" "0, w")
+ 	  (unspec:SVE_FULL_SDI
+ 	    [(match_operand:<VNARROW> 2 "register_operand" "w, w")
+ 	     (unspec:<VNARROW>
+ 	       [(match_operand:<VNARROW> 3 "register_operand" "<sve_lane_con>, <sve_lane_con>")
+ 		(match_operand:SI 4 "const_int_operand")]
+ 	       UNSPEC_SVE_LANE_SELECT)]
+ 	    SVE2_INT_QSUB_BINARY_LONG_LANE)))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_qsub_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>[%4]
+    movprfx\t%0, %1\;<sve_int_qsub_op>\t%0.<Vetype>, %2.<Ventype>, %3.<Ventype>[%4]"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ ;; -------------------------------------------------------------------------
+ ;; ---- [FP] Long multiplication with accumulation
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - FMLALB
+ ;; - FMLALT
+ ;; - FMLSLB
+ ;; - FMLSLT
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_<sve_fp_op><mode>"
+   [(set (match_operand:VNx4SF_ONLY 0 "register_operand" "=w, ?&w")
+ 	(unspec:VNx4SF_ONLY
+ 	  [(match_operand:<VNARROW> 1 "register_operand" "w, w")
+ 	   (match_operand:<VNARROW> 2 "register_operand" "w, w")
+ 	   (match_operand:VNx4SF_ONLY 3 "register_operand" "0, w")]
+ 	  SVE2_FP_TERNARY_LONG))]
+   "TARGET_SVE2"
+   "@
+    <sve_fp_op>\t%0.<Vetype>, %1.<Ventype>, %2.<Ventype>
+    movprfx\t%0, %3\;<sve_fp_op>\t%0.<Vetype>, %1.<Ventype>, %2.<Ventype>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ (define_insn "@aarch64_<sve_fp_op>_lane_<mode>"
+   [(set (match_operand:VNx4SF_ONLY 0 "register_operand" "=w, ?&w")
+ 	(unspec:VNx4SF_ONLY
+ 	  [(match_operand:<VNARROW> 1 "register_operand" "w, w")
+ 	   (unspec:<VNARROW>
+ 	     [(match_operand:<VNARROW> 2 "register_operand" "<sve_lane_con>, <sve_lane_con>")
+ 	      (match_operand:SI 3 "const_int_operand")]
+ 	     UNSPEC_SVE_LANE_SELECT)
+ 	   (match_operand:VNx4SF_ONLY 4 "register_operand" "0, w")]
+ 	  SVE2_FP_TERNARY_LONG_LANE))]
+   "TARGET_SVE2"
+   "@
+    <sve_fp_op>\t%0.<Vetype>, %1.<Ventype>, %2.<Ventype>[%3]
+    movprfx\t%0, %4\;<sve_fp_op>\t%0.<Vetype>, %1.<Ventype>, %2.<Ventype>[%3]"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; =========================================================================
+ ;; == Narrowing arithnetic
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Narrowing unary arithmetic
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SQXTNB
+ ;; - SQXTNT
+ ;; - SQXTUNB
+ ;; - SQXTUNT
+ ;; - UQXTNB
+ ;; - UQXTNT
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_<sve_int_op><mode>"
+   [(set (match_operand:<VNARROW> 0 "register_operand" "=w")
+ 	(unspec:<VNARROW>
+ 	  [(match_operand:SVE_FULL_HSDI 1 "register_operand" "w")]
+ 	  SVE2_INT_UNARY_NARROWB))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Ventype>, %1.<Vetype>"
+ )
+ 
+ ;; These instructions do not take MOVPRFX.
+ (define_insn "@aarch64_sve_<sve_int_op><mode>"
+   [(set (match_operand:<VNARROW> 0 "register_operand" "=w")
+ 	(unspec:<VNARROW>
+ 	  [(match_operand:<VNARROW> 1 "register_operand" "0")
+ 	   (match_operand:SVE_FULL_HSDI 2 "register_operand" "w")]
+ 	  SVE2_INT_UNARY_NARROWT))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Ventype>, %2.<Vetype>"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Narrowing binary arithmetic
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - ADDHNB
+ ;; - ADDHNT
+ ;; - RADDHNB
+ ;; - RADDHNT
+ ;; - RSUBHNB
+ ;; - RSUBHNT
+ ;; - SUBHNB
+ ;; - SUBHNT
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_<sve_int_op><mode>"
+   [(set (match_operand:<VNARROW> 0 "register_operand" "=w")
+ 	(unspec:<VNARROW>
+ 	  [(match_operand:SVE_FULL_HSDI 1 "register_operand" "w")
+ 	   (match_operand:SVE_FULL_HSDI 2 "register_operand" "w")]
+ 	  SVE2_INT_BINARY_NARROWB))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Ventype>, %1.<Vetype>, %2.<Vetype>"
+ )
+ 
+ ;; These instructions do not take MOVPRFX.
+ (define_insn "@aarch64_sve_<sve_int_op><mode>"
+   [(set (match_operand:<VNARROW> 0 "register_operand" "=w")
+ 	(unspec:<VNARROW>
+ 	  [(match_operand:<VNARROW> 1 "register_operand" "0")
+ 	   (match_operand:SVE_FULL_HSDI 2 "register_operand" "w")
+ 	   (match_operand:SVE_FULL_HSDI 3 "register_operand" "w")]
+ 	  SVE2_INT_BINARY_NARROWT))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Ventype>, %2.<Vetype>, %3.<Vetype>"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Narrowing right shifts
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - RSHRNB
+ ;; - RSHRNT
+ ;; - SHRNB
+ ;; - SHRNT
+ ;; - SQRSHRNB
+ ;; - SQRSHRNT
+ ;; - SQRSHRUNB
+ ;; - SQRSHRUNT
+ ;; - SQSHRNB
+ ;; - SQSHRNT
+ ;; - SQSHRUNB
+ ;; - SQSHRUNT
+ ;; - UQRSHRNB
+ ;; - UQRSHRNT
+ ;; - UQSHRNB
+ ;; - UQSHRNT
+ ;; -------------------------------------------------------------------------
+ 
+ ;; The immediate range is enforced before generating the instruction.
+ (define_insn "@aarch64_sve_<sve_int_op><mode>"
+   [(set (match_operand:<VNARROW> 0 "register_operand" "=w")
+ 	(unspec:<VNARROW>
+ 	  [(match_operand:SVE_FULL_HSDI 1 "register_operand" "w")
+ 	   (match_operand:DI 2 "const_int_operand")]
+ 	  SVE2_INT_SHIFT_IMM_NARROWB))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Ventype>, %1.<Vetype>, #%2"
+ )
+ 
+ ;; The immediate range is enforced before generating the instruction.
+ ;; These instructions do not take MOVPRFX.
+ (define_insn "@aarch64_sve_<sve_int_op><mode>"
+   [(set (match_operand:<VNARROW> 0 "register_operand" "=w")
+ 	(unspec:<VNARROW>
+ 	  [(match_operand:<VNARROW> 1 "register_operand" "0")
+ 	   (match_operand:SVE_FULL_HSDI 2 "register_operand" "w")
+ 	   (match_operand:DI 3 "const_int_operand")]
+ 	  SVE2_INT_SHIFT_IMM_NARROWT))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Ventype>, %2.<Vetype>, #%3"
+ )
+ 
+ ;; =========================================================================
+ ;; == Pairwise arithmetic
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Pairwise arithmetic
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - ADDP
+ ;; - SMAXP
+ ;; - SMINP
+ ;; - UMAXP
+ ;; - UMINP
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_pred_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
+ 	   (match_operand:SVE_FULL_I 2 "register_operand" "0, w")
+ 	   (match_operand:SVE_FULL_I 3 "register_operand" "w, w")]
+ 	  SVE2_INT_BINARY_PAIR))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [FP] Pairwise arithmetic
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - FADDP
+ ;; - FMAXP
+ ;; - FMAXNMP
+ ;; - FMINP
+ ;; - FMINNMP
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_pred_<sve_fp_op><mode>"
+   [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_F
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
+ 	   (match_operand:SVE_FULL_F 2 "register_operand" "0, w")
+ 	   (match_operand:SVE_FULL_F 3 "register_operand" "w, w")]
+ 	  SVE2_FP_BINARY_PAIR))]
+   "TARGET_SVE2"
+   "@
+    <sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
+    movprfx\t%0, %2\;<sve_fp_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Pairwise arithmetic with accumulation
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SADALP
+ ;; - UADALP
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Predicated pairwise absolute difference and accumulate with merging.
+ (define_expand "@cond_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand")
+ 	(unspec:SVE_FULL_HSDI
+ 	  [(match_operand:<VPRED> 1 "register_operand")
+ 	   (unspec:SVE_FULL_HSDI
+ 	     [(match_dup 1)
+ 	      (match_operand:SVE_FULL_HSDI 2 "register_operand")
+ 	      (match_operand:<VNARROW> 3 "register_operand")]
+ 	     SVE2_INT_BINARY_PAIR_LONG)
+ 	   (match_operand:SVE_FULL_HSDI 4 "aarch64_simd_reg_or_zero")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+ {
+   /* Only target code is aware of these operations, so we don't need
+      to handle the fully-general case.  */
+   gcc_assert (rtx_equal_p (operands[2], operands[4])
+ 	      || CONSTANT_P (operands[4]));
+ })
+ 
+ ;; Predicated pairwise absolute difference and accumulate, merging with
+ ;; the first input.
+ (define_insn_and_rewrite "*cond_<sve_int_op><mode>_2"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_HSDI
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
+ 	   (unspec:SVE_FULL_HSDI
+ 	     [(match_operand 4)
+ 	      (match_operand:SVE_FULL_HSDI 2 "register_operand" "0, w")
+ 	      (match_operand:<VNARROW> 3 "register_operand" "w, w")]
+ 	     SVE2_INT_BINARY_PAIR_LONG)
+ 	   (match_dup 2)]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %1/m, %3.<Ventype>
+    movprfx\t%0, %2\;<sve_int_op>\t%0.<Vetype>, %1/m, %3.<Ventype>"
+   "&& !CONSTANT_P (operands[4])"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; Predicated pairwise absolute difference and accumulate, merging with zero.
+ (define_insn_and_rewrite "*cond_<sve_int_op><mode>_z"
+   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=&w, &w")
+ 	(unspec:SVE_FULL_HSDI
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
+ 	   (unspec:SVE_FULL_HSDI
+ 	     [(match_operand 5)
+ 	      (match_operand:SVE_FULL_HSDI 2 "register_operand" "0, w")
+ 	      (match_operand:<VNARROW> 3 "register_operand" "w, w")]
+ 	     SVE2_INT_BINARY_PAIR_LONG)
+ 	   (match_operand:SVE_FULL_HSDI 4 "aarch64_simd_imm_zero")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+   "@
+    movprfx\t%0.<Vetype>, %1/z, %0.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %3.<Ventype>
+    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %3.<Ventype>"
+   "&& !CONSTANT_P (operands[5])"
+   {
+     operands[5] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "yes")]
+ )
+ 
+ ;; =========================================================================
+ ;; == Complex arithmetic
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Complex binary operations
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - CADD
+ ;; - SQCADD
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_<optab><mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:SVE_FULL_I 1 "register_operand" "0, w")
+ 	   (match_operand:SVE_FULL_I 2 "register_operand" "w, w")]
+ 	  SVE2_INT_CADD))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %0.<Vetype>, %2.<Vetype>, #<rot>
+    movprfx\t%0, %1\;<sve_int_op>\t%0.<Vetype>, %0.<Vetype>, %2.<Vetype>, #<rot>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Complex ternary operations
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - CMLA
+ ;; - SQRDCMLA
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_<optab><mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:SVE_FULL_I 1 "register_operand" "0, w")
+ 	   (match_operand:SVE_FULL_I 2 "register_operand" "w, w")
+ 	   (match_operand:SVE_FULL_I 3 "register_operand" "w, w")]
+ 	  SVE2_INT_CMLA))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>, #<rot>
+    movprfx\t%0, %1\;<sve_int_op>\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>, #<rot>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ (define_insn "@aarch64_<optab>_lane_<mode>"
+   [(set (match_operand:SVE_FULL_HSI 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_HSI
+ 	  [(match_operand:SVE_FULL_HSI 1 "register_operand" "0, w")
+ 	   (match_operand:SVE_FULL_HSI 2 "register_operand" "w, w")
+ 	   (unspec:SVE_FULL_HSI
+ 	     [(match_operand:SVE_FULL_HSI 3 "register_operand" "<sve_lane_con>, <sve_lane_con>")
+ 	      (match_operand:SI 4 "const_int_operand")]
+ 	     UNSPEC_SVE_LANE_SELECT)]
+ 	  SVE2_INT_CMLA))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>[%4], #<rot>
+    movprfx\t%0, %1\;<sve_int_op>\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>[%4], #<rot>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Complex dot product
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - CDOT
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_<optab><mode>"
+   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_SDI
+ 	  [(match_operand:SVE_FULL_SDI 1 "register_operand" "0, w")
+ 	   (match_operand:<VSI2QI> 2 "register_operand" "w, w")
+ 	   (match_operand:<VSI2QI> 3 "register_operand" "w, w")]
+ 	  SVE2_INT_CDOT))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %2.<Vetype_fourth>, %3.<Vetype_fourth>, #<rot>
+    movprfx\t%0, %1\;<sve_int_op>\t%0.<Vetype>, %2.<Vetype_fourth>, %3.<Vetype_fourth>, #<rot>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ (define_insn "@aarch64_<optab>_lane_<mode>"
+   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w, ?&w")
+ 	(unspec:SVE_FULL_SDI
+ 	  [(match_operand:SVE_FULL_SDI 1 "register_operand" "0, w")
+ 	   (match_operand:<VSI2QI> 2 "register_operand" "w, w")
+ 	   (unspec:<VSI2QI>
+ 	     [(match_operand:<VSI2QI> 3 "register_operand" "<sve_lane_con>, <sve_lane_con>")
+ 	      (match_operand:SI 4 "const_int_operand")]
+ 	     UNSPEC_SVE_LANE_SELECT)]
+ 	  SVE2_INT_CDOT))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %2.<Vetype_fourth>, %3.<Vetype_fourth>[%4], #<rot>
+    movprfx\t%0, %1\;<sve_int_op>\t%0.<Vetype>, %2.<Vetype_fourth>, %3.<Vetype_fourth>[%4], #<rot>"
+   [(set_attr "movprfx" "*,yes")]
+ )
+ 
+ ;; =========================================================================
+ ;; == Conversions
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [FP<-FP] Widening conversions
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - FCVTLT
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Predicated convert long top.
+ (define_insn "@aarch64_pred_<sve_fp_op><mode>"
+   [(set (match_operand:SVE_FULL_SDF 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_SDF
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
+ 	   (match_operand:SI 3 "aarch64_sve_gp_strictness")
+ 	   (match_operand:<VNARROW> 2 "register_operand" "w")]
+ 	  SVE2_COND_FP_UNARY_LONG))]
+   "TARGET_SVE2"
+   "<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Ventype>"
+ )
+ 
+ ;; Predicated convert long top with merging.
+ (define_expand "@cond_<sve_fp_op><mode>"
+   [(set (match_operand:SVE_FULL_SDF 0 "register_operand")
+ 	(unspec:SVE_FULL_SDF
+ 	  [(match_operand:<VPRED> 1 "register_operand")
+ 	   (unspec:SVE_FULL_SDF
+ 	     [(match_dup 1)
+ 	      (const_int SVE_STRICT_GP)
+ 	      (match_operand:<VNARROW> 2 "register_operand")]
+ 	     SVE2_COND_FP_UNARY_LONG)
+ 	   (match_operand:SVE_FULL_SDF 3 "register_operand")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+ )
+ 
+ ;; These instructions do not take MOVPRFX.
+ (define_insn_and_rewrite "*cond_<sve_fp_op><mode>"
+   [(set (match_operand:SVE_FULL_SDF 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_SDF
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
+ 	   (unspec:SVE_FULL_SDF
+ 	     [(match_operand 4)
+ 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
+ 	      (match_operand:<VNARROW> 2 "register_operand" "w")]
+ 	     SVE2_COND_FP_UNARY_LONG)
+ 	   (match_operand:SVE_FULL_SDF 3 "register_operand" "0")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2 && aarch64_sve_pred_dominates_p (&operands[4], operands[1])"
+   "<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Ventype>"
+   "&& !rtx_equal_p (operands[1], operands[4])"
+   {
+     operands[4] = copy_rtx (operands[1]);
+   }
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [FP<-FP] Narrowing conversions
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - FCVTNT
+ ;; - FCVTX
+ ;; - FCVTXNT
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Predicated FCVTNT.  This doesn't give a natural aarch64_pred_*/cond_*
+ ;; pair because the even elements always have to be supplied for active
+ ;; elements, even if the inactive elements don't matter.
+ ;;
+ ;; These instructions do not take MOVPRFX.
+ (define_insn "@aarch64_sve_cvtnt<mode>"
+   [(set (match_operand:SVE_FULL_HSF 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_HSF
+ 	  [(match_operand:<VWIDE_PRED> 2 "register_operand" "Upl")
+ 	   (const_int SVE_STRICT_GP)
+ 	   (match_operand:SVE_FULL_HSF 1 "register_operand" "0")
+ 	   (match_operand:<VWIDE> 3 "register_operand" "w")]
+ 	  UNSPEC_COND_FCVTNT))]
+   "TARGET_SVE2"
+   "fcvtnt\t%0.<Vetype>, %2/m, %3.<Vewtype>"
+ )
+ 
+ ;; Predicated FCVTX (equivalent to what would be FCVTXNB, except that
+ ;; it supports MOVPRFX).
+ (define_insn "@aarch64_pred_<sve_fp_op><mode>"
+   [(set (match_operand:VNx4SF_ONLY 0 "register_operand" "=w")
+ 	(unspec:VNx4SF_ONLY
+ 	  [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl")
+ 	   (match_operand:SI 3 "aarch64_sve_gp_strictness")
+ 	   (match_operand:<VWIDE> 2 "register_operand" "w")]
+ 	  SVE2_COND_FP_UNARY_NARROWB))]
+   "TARGET_SVE2"
+   "<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vewtype>"
+ )
+ 
+ ;; Predicated FCVTX with merging.
+ (define_expand "@cond_<sve_fp_op><mode>"
+   [(set (match_operand:VNx4SF_ONLY 0 "register_operand")
+ 	(unspec:VNx4SF_ONLY
+ 	  [(match_operand:<VWIDE_PRED> 1 "register_operand")
+ 	   (unspec:VNx4SF_ONLY
+ 	     [(match_dup 1)
+ 	      (const_int SVE_STRICT_GP)
+ 	      (match_operand:<VWIDE> 2 "register_operand")]
+ 	     SVE2_COND_FP_UNARY_NARROWB)
+ 	   (match_operand:VNx4SF_ONLY 3 "aarch64_simd_reg_or_zero")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+ )
+ 
+ (define_insn_and_rewrite "*cond_<sve_fp_op><mode>_any"
+   [(set (match_operand:VNx4SF_ONLY 0 "register_operand" "=&w, &w, &w")
+ 	(unspec:VNx4SF_ONLY
+ 	  [(match_operand:<VWIDE_PRED> 1 "register_operand" "Upl, Upl, Upl")
+ 	   (unspec:VNx4SF_ONLY
+ 	     [(match_operand 4)
+ 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
+ 	      (match_operand:<VWIDE> 2 "register_operand" "w, w, w")]
+ 	     SVE2_COND_FP_UNARY_NARROWB)
+ 	   (match_operand:VNx4SF_ONLY 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2
+    && !rtx_equal_p (operands[2], operands[3])
+    && aarch64_sve_pred_dominates_p (&operands[4], operands[1])"
+   "@
+    <sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vewtype>
+    movprfx\t%0.<Vewtype>, %1/z, %2.<Vewtype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vewtype>
+    movprfx\t%0, %3\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vewtype>"
+   "&& !rtx_equal_p (operands[1], operands[4])"
+   {
+     operands[4] = copy_rtx (operands[1]);
+   }
+   [(set_attr "movprfx" "*,yes,yes")]
+ )
+ 
+ ;; Predicated FCVTXNT.  This doesn't give a natural aarch64_pred_*/cond_*
+ ;; pair because the even elements always have to be supplied for active
+ ;; elements, even if the inactive elements don't matter.
+ ;;
+ ;; These instructions do not take MOVPRFX.
+ (define_insn "@aarch64_sve2_cvtxnt<mode>"
+   [(set (match_operand:<VNARROW> 0 "register_operand" "=w")
+ 	(unspec:<VNARROW>
+ 	  [(match_operand:<VPRED> 2 "register_operand" "Upl")
+ 	   (const_int SVE_STRICT_GP)
+ 	   (match_operand:<VNARROW> 1 "register_operand" "0")
+ 	   (match_operand:VNx2DF_ONLY 3 "register_operand" "w")]
+ 	  UNSPEC_COND_FCVTXNT))]
+   "TARGET_SVE2"
+   "fcvtxnt\t%0.<Ventype>, %2/m, %3.<Vetype>"
+ )
+ 
+ ;; =========================================================================
+ ;; == Other arithmetic
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Reciprocal approximation
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - URECPE
+ ;; - URSQRTE
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Predicated integer unary operations.
+ (define_insn "@aarch64_pred_<sve_int_op><mode>"
+   [(set (match_operand:VNx4SI_ONLY 0 "register_operand" "=w")
+ 	(unspec:VNx4SI_ONLY
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
+ 	   (unspec:VNx4SI_ONLY
+ 	     [(match_operand:VNx4SI_ONLY 2 "register_operand" "w")]
+ 	     SVE2_U32_UNARY)]
+ 	  UNSPEC_PRED_X))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
+ )
+ 
+ ;; Predicated integer unary operations with merging.
+ (define_expand "@cond_<sve_int_op><mode>"
+   [(set (match_operand:VNx4SI_ONLY 0 "register_operand")
+ 	(unspec:VNx4SI_ONLY
+ 	  [(match_operand:<VPRED> 1 "register_operand")
+ 	   (unspec:VNx4SI_ONLY
+ 	     [(match_dup 4)
+ 	      (unspec:VNx4SI_ONLY
+ 		[(match_operand:VNx4SI_ONLY 2 "register_operand")]
+ 		SVE2_U32_UNARY)]
+ 	     UNSPEC_PRED_X)
+ 	   (match_operand:VNx4SI_ONLY 3 "aarch64_simd_reg_or_zero")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+   {
+     operands[4] = CONSTM1_RTX (<MODE>mode);
+   }
+ )
+ 
+ (define_insn_and_rewrite "*cond_<sve_int_op><mode>"
+   [(set (match_operand:VNx4SI_ONLY 0 "register_operand" "=w, ?&w, ?&w")
+ 	(unspec:VNx4SI_ONLY
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
+ 	   (unspec:VNx4SI_ONLY
+ 	     [(match_operand 4)
+ 	      (unspec:VNx4SI_ONLY
+ 		[(match_operand:VNx4SI_ONLY 2 "register_operand" "w, w, w")]
+ 		SVE2_U32_UNARY)]
+ 	     UNSPEC_PRED_X)
+ 	   (match_operand:VNx4SI_ONLY 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+   "@
+    <sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+    movprfx\t%0, %3\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
+   "&& !CONSTANT_P (operands[4])"
+   {
+     operands[4] = CONSTM1_RTX (<VPRED>mode);
+   }
+   [(set_attr "movprfx" "*,yes,yes")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT<-FP] Base-2 logarithm
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - FLOGB
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Predicated FLOGB.
+ (define_insn "@aarch64_pred_<sve_fp_op><mode>"
+   [(set (match_operand:<V_INT_EQUIV> 0 "register_operand" "=w")
+ 	(unspec:<V_INT_EQUIV>
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
+ 	   (match_operand:SI 3 "aarch64_sve_gp_strictness")
+ 	   (match_operand:SVE_FULL_F 2 "register_operand" "w")]
+ 	  SVE2_COND_INT_UNARY_FP))]
+   "TARGET_SVE2"
+   "<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
+ )
+ 
+ ;; Predicated FLOGB with merging.
+ (define_expand "@cond_<sve_fp_op><mode>"
+   [(set (match_operand:<V_INT_EQUIV> 0 "register_operand")
+ 	(unspec:<V_INT_EQUIV>
+ 	  [(match_operand:<VPRED> 1 "register_operand")
+ 	   (unspec:<V_INT_EQUIV>
+ 	     [(match_dup 1)
+ 	      (const_int SVE_STRICT_GP)
+ 	      (match_operand:SVE_FULL_F 2 "register_operand")]
+ 	     SVE2_COND_INT_UNARY_FP)
+ 	   (match_operand:<V_INT_EQUIV> 3 "aarch64_simd_reg_or_zero")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2"
+ )
+ 
+ (define_insn_and_rewrite "*cond_<sve_fp_op><mode>"
+   [(set (match_operand:<V_INT_EQUIV> 0 "register_operand" "=&w, ?&w, ?&w")
+ 	(unspec:<V_INT_EQUIV>
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl, Upl")
+ 	   (unspec:<V_INT_EQUIV>
+ 	     [(match_operand 4)
+ 	      (match_operand:SI 5 "aarch64_sve_gp_strictness")
+ 	      (match_operand:SVE_FULL_F 2 "register_operand" "w, w, w")]
+ 	     SVE2_COND_INT_UNARY_FP)
+ 	   (match_operand:<V_INT_EQUIV> 3 "aarch64_simd_reg_or_zero" "0, Dz, w")]
+ 	  UNSPEC_SEL))]
+   "TARGET_SVE2
+    && !rtx_equal_p (operands[2], operands[3])
+    && aarch64_sve_pred_dominates_p (&operands[4], operands[1])"
+   "@
+    <sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+    movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+    movprfx\t%0, %3\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>"
+   "&& !rtx_equal_p (operands[1], operands[4])"
+   {
+     operands[4] = copy_rtx (operands[1]);
+   }
+   [(set_attr "movprfx" "*,yes,yes")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Polynomial multiplication
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - PMUL
+ ;; - PMULLB
+ ;; - PMULLT
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Uniform PMUL.
+ (define_insn "@aarch64_sve2_pmul<mode>"
+   [(set (match_operand:VNx16QI_ONLY 0 "register_operand" "=w")
+ 	(unspec:VNx16QI_ONLY
+ 	  [(match_operand:VNx16QI_ONLY 1 "register_operand" "w")
+ 	   (match_operand:VNx16QI_ONLY 2 "register_operand" "w")]
+ 	  UNSPEC_PMUL))]
+   "TARGET_SVE2"
+   "pmul\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
+ )
+ 
+ ;; Extending PMUL, with the results modeled as wider vectors.
+ ;; This representation is only possible for .H and .D, not .Q.
+ (define_insn "@aarch64_sve_<optab><mode>"
+   [(set (match_operand:SVE_FULL_HDI 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_HDI
+ 	  [(match_operand:<VNARROW> 1 "register_operand" "w")
+ 	   (match_operand:<VNARROW> 2 "register_operand" "w")]
+ 	  SVE2_PMULL))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Vetype>, %1.<Ventype>, %2.<Ventype>"
+ )
+ 
+ ;; Extending PMUL, with the results modeled as pairs of values.
+ ;; This representation works for .H, .D and .Q, with .Q requiring
+ ;; the AES extension.  (This is enforced by the mode iterator.)
+ (define_insn "@aarch64_sve_<optab><mode>"
+   [(set (match_operand:SVE2_PMULL_PAIR_I 0 "register_operand" "=w")
+ 	(unspec:SVE2_PMULL_PAIR_I
+ 	  [(match_operand:SVE2_PMULL_PAIR_I 1 "register_operand" "w")
+ 	   (match_operand:SVE2_PMULL_PAIR_I 2 "register_operand" "w")]
+ 	  SVE2_PMULL_PAIR))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Vewtype>, %1.<Vetype>, %2.<Vetype>"
+ )
+ 
+ ;; =========================================================================
+ ;; == Permutation
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT,FP] General permutes
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - TBL (vector pair form)
+ ;; - TBX
+ ;; -------------------------------------------------------------------------
+ 
+ ;; TBL on a pair of data vectors.
+ (define_insn "@aarch64_sve2_tbl2<mode>"
+   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL
+ 	  [(match_operand:<VDOUBLE> 1 "register_operand" "w")
+ 	   (match_operand:<V_INT_EQUIV> 2 "register_operand" "w")]
+ 	  UNSPEC_TBL2))]
+   "TARGET_SVE2"
+   "tbl\t%0.<Vetype>, %1, %2.<Vetype>"
+ )
+ 
+ ;; TBX.  These instructions do not take MOVPRFX.
+ (define_insn "@aarch64_sve2_tbx<mode>"
+   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL
+ 	  [(match_operand:SVE_FULL 1 "register_operand" "0")
+ 	   (match_operand:SVE_FULL 2 "register_operand" "w")
+ 	   (match_operand:<V_INT_EQUIV> 3 "register_operand" "w")]
+ 	  UNSPEC_TBX))]
+   "TARGET_SVE2"
+   "tbx\t%0.<Vetype>, %2.<Vetype>, %3.<Vetype>"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- [INT] Optional bit-permute extensions
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - BDEP
+ ;; - BEXT
+ ;; - BGRP
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve_<sve_int_op><mode>"
+   [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_I
+ 	  [(match_operand:SVE_FULL_I 1 "register_operand" "w")
+ 	   (match_operand:SVE_FULL_I 2 "register_operand" "w")]
+ 	  SVE2_INT_BITPERM))]
+   "TARGET_SVE2_BITPERM"
+   "<sve_int_op>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
+ )
+ 
+ ;; =========================================================================
+ ;; == General
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- Check for aliases between pointers
+ ;; -------------------------------------------------------------------------
+ ;; The patterns in this section are synthetic: WHILERW and WHILEWR are
+ ;; defined in aarch64-sve.md instead.
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Use WHILERW and WHILEWR to accelerate alias checks.  This is only
+ ;; possible if the accesses we're checking are exactly the same size
+ ;; as an SVE vector.
+ (define_expand "check_<raw_war>_ptrs<mode>"
+   [(match_operand:GPI 0 "register_operand")
+    (unspec:VNx16BI
+      [(match_operand:GPI 1 "register_operand")
+       (match_operand:GPI 2 "register_operand")
+       (match_operand:GPI 3 "aarch64_bytes_per_sve_vector_operand")
+       (match_operand:GPI 4 "const_int_operand")]
+      SVE2_WHILE_PTR)]
+   "TARGET_SVE2"
+ {
+   /* Use the widest predicate mode we can.  */
+   unsigned int align = INTVAL (operands[4]);
+   if (align > 8)
+     align = 8;
+   machine_mode pred_mode = aarch64_sve_pred_mode (align).require ();
+ 
+   /* Emit a WHILERW or WHILEWR, setting the condition codes based on
+      the result.  */
+   emit_insn (gen_while_ptest
+ 	     (<SVE2_WHILE_PTR:unspec>, <MODE>mode, pred_mode,
+ 	      gen_rtx_SCRATCH (pred_mode), operands[1], operands[2],
+ 	      CONSTM1_RTX (VNx16BImode), CONSTM1_RTX (pred_mode)));
+ 
+   /* Set operand 0 to true if the last bit of the predicate result is set,
+      i.e. if all elements are free of dependencies.  */
+   rtx cc_reg = gen_rtx_REG (CC_NZCmode, CC_REGNUM);
+   rtx cmp = gen_rtx_LTU (<MODE>mode, cc_reg, const0_rtx);
+   emit_insn (gen_aarch64_cstore<mode> (operands[0], cmp, cc_reg));
+   DONE;
+ })
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- Histogram processing
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - HISTCNT
+ ;; - HISTSEG
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "@aarch64_sve2_histcnt<mode>"
+   [(set (match_operand:SVE_FULL_SDI 0 "register_operand" "=w")
+ 	(unspec:SVE_FULL_SDI
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
+ 	   (match_operand:SVE_FULL_SDI 2 "register_operand" "w")
+ 	   (match_operand:SVE_FULL_SDI 3 "register_operand" "w")]
+ 	  UNSPEC_HISTCNT))]
+   "TARGET_SVE2"
+   "histcnt\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
+ )
+ 
+ (define_insn "@aarch64_sve2_histseg<mode>"
+   [(set (match_operand:VNx16QI_ONLY 0 "register_operand" "=w")
+ 	(unspec:VNx16QI_ONLY
+ 	  [(match_operand:VNx16QI_ONLY 1 "register_operand" "w")
+ 	   (match_operand:VNx16QI_ONLY 2 "register_operand" "w")]
+ 	  UNSPEC_HISTSEG))]
+   "TARGET_SVE2"
+   "histseg\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- String matching
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - MATCH
+ ;; - NMATCH
+ ;; -------------------------------------------------------------------------
+ 
+ ;; Predicated string matching.
+ (define_insn "@aarch64_pred_<sve_int_op><mode>"
+   [(set (match_operand:<VPRED> 0 "register_operand" "=Upa")
+ 	(unspec:<VPRED>
+ 	  [(match_operand:<VPRED> 1 "register_operand" "Upl")
+ 	   (match_operand:SI 2 "aarch64_sve_ptrue_flag")
+ 	   (unspec:<VPRED>
+ 	     [(match_operand:SVE_FULL_BHI 3 "register_operand" "w")
+ 	      (match_operand:SVE_FULL_BHI 4 "register_operand" "w")]
+ 	     SVE2_MATCH)]
+ 	  UNSPEC_PRED_Z))
+    (clobber (reg:CC_NZC CC_REGNUM))]
+   "TARGET_SVE2"
+   "<sve_int_op>\t%0.<Vetype>, %1/z, %3.<Vetype>, %4.<Vetype>"
+ )
+ 
+ ;; Predicated string matching in which both the flag and predicate results
+ ;; are interesting.
+ (define_insn_and_rewrite "*aarch64_pred_<sve_int_op><mode>_cc"
+   [(set (reg:CC_NZC CC_REGNUM)
+ 	(unspec:CC_NZC
+ 	  [(match_operand:VNx16BI 1 "register_operand" "Upl")
+ 	   (match_operand 4)
+ 	   (match_operand:SI 5 "aarch64_sve_ptrue_flag")
+ 	   (unspec:<VPRED>
+ 	     [(match_operand 6)
+ 	      (match_operand:SI 7 "aarch64_sve_ptrue_flag")
+ 	      (unspec:<VPRED>
+ 		[(match_operand:SVE_FULL_BHI 2 "register_operand" "w")
+ 		 (match_operand:SVE_FULL_BHI 3 "register_operand" "w")]
+ 		SVE2_MATCH)]
+ 	     UNSPEC_PRED_Z)]
+ 	  UNSPEC_PTEST))
+    (set (match_operand:<VPRED> 0 "register_operand" "=Upa")
+ 	(unspec:<VPRED>
+ 	  [(match_dup 6)
+ 	   (match_dup 7)
+ 	   (unspec:<VPRED>
+ 	     [(match_dup 2)
+ 	      (match_dup 3)]
+ 	     SVE2_MATCH)]
+ 	  UNSPEC_PRED_Z))]
+   "TARGET_SVE2
+    && aarch64_sve_same_pred_for_ptest_p (&operands[4], &operands[6])"
+   "<sve_int_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
+   "&& !rtx_equal_p (operands[4], operands[6])"
+   {
+     operands[6] = copy_rtx (operands[4]);
+     operands[7] = operands[5];
+   }
+ )
+ 
+ ;; Predicated string matching in which only the flags result is interesting.
+ (define_insn_and_rewrite "*aarch64_pred_<sve_int_op><mode>_ptest"
+   [(set (reg:CC_NZC CC_REGNUM)
+ 	(unspec:CC_NZC
+ 	  [(match_operand:VNx16BI 1 "register_operand" "Upl")
+ 	   (match_operand 4)
+ 	   (match_operand:SI 5 "aarch64_sve_ptrue_flag")
+ 	   (unspec:<VPRED>
+ 	     [(match_operand 6)
+ 	      (match_operand:SI 7 "aarch64_sve_ptrue_flag")
+ 	      (unspec:<VPRED>
+ 		[(match_operand:SVE_FULL_BHI 2 "register_operand" "w")
+ 		 (match_operand:SVE_FULL_BHI 3 "register_operand" "w")]
+ 		SVE2_MATCH)]
+ 	     UNSPEC_PRED_Z)]
+ 	  UNSPEC_PTEST))
+    (clobber (match_scratch:<VPRED> 0 "=Upa"))]
+   "TARGET_SVE2
+    && aarch64_sve_same_pred_for_ptest_p (&operands[4], &operands[6])"
+   "<sve_int_op>\t%0.<Vetype>, %1/z, %2.<Vetype>, %3.<Vetype>"
+   "&& !rtx_equal_p (operands[4], operands[6])"
+   {
+     operands[6] = copy_rtx (operands[4]);
+     operands[7] = operands[5];
+   }
+ )
+ 
+ ;; =========================================================================
+ ;; == Crypotographic extensions
+ ;; =========================================================================
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- Optional AES extensions
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - AESD
+ ;; - AESE
+ ;; - AESIMC
+ ;; - AESMC
+ ;; -------------------------------------------------------------------------
+ 
+ ;; AESD and AESE.
+ (define_insn "aarch64_sve2_aes<aes_op>"
+   [(set (match_operand:VNx16QI 0 "register_operand" "=w")
+ 	(unspec:VNx16QI
+ 	  [(xor:VNx16QI
+ 	     (match_operand:VNx16QI 1 "register_operand" "%0")
+ 	     (match_operand:VNx16QI 2 "register_operand" "w"))]
+           CRYPTO_AES))]
+   "TARGET_SVE2_AES"
+   "aes<aes_op>\t%0.b, %0.b, %2.b"
+   [(set_attr "type" "crypto_aese")]
+ )
+ 
+ ;; AESMC and AESIMC.  These instructions do not take MOVPRFX.
+ (define_insn "aarch64_sve2_aes<aesmc_op>"
+   [(set (match_operand:VNx16QI 0 "register_operand" "=w")
+ 	(unspec:VNx16QI
+ 	  [(match_operand:VNx16QI 1 "register_operand" "0")]
+ 	  CRYPTO_AESMC))]
+   "TARGET_SVE2_AES"
+   "aes<aesmc_op>\t%0.b, %0.b"
+   [(set_attr "type" "crypto_aesmc")]
+ )
+ 
+ ;; When AESE/AESMC and AESD/AESIMC fusion is enabled, we really want
+ ;; to keep the two together and enforce the register dependency without
+ ;; scheduling or register allocation messing up the order or introducing
+ ;; moves inbetween.  Mash the two together during combine.
+ 
+ (define_insn "*aarch64_sve2_aese_fused"
+   [(set (match_operand:VNx16QI 0 "register_operand" "=w")
+ 	(unspec:VNx16QI
+ 	  [(unspec:VNx16QI
+ 	     [(xor:VNx16QI
+ 		(match_operand:VNx16QI 1 "register_operand" "%0")
+ 		(match_operand:VNx16QI 2 "register_operand" "w"))]
+ 	     UNSPEC_AESE)]
+ 	  UNSPEC_AESMC))]
+   "TARGET_SVE2_AES && aarch64_fusion_enabled_p (AARCH64_FUSE_AES_AESMC)"
+   "aese\t%0.b, %0.b, %2.b\;aesmc\t%0.b, %0.b"
+   [(set_attr "type" "crypto_aese")
+    (set_attr "length" "8")]
+ )
+ 
+ (define_insn "*aarch64_sve2_aesd_fused"
+   [(set (match_operand:VNx16QI 0 "register_operand" "=w")
+ 	(unspec:VNx16QI
+ 	  [(unspec:VNx16QI
+ 	     [(xor:VNx16QI
+ 		(match_operand:VNx16QI 1 "register_operand" "%0")
+ 		(match_operand:VNx16QI 2 "register_operand" "w"))]
+ 	     UNSPEC_AESD)]
+ 	  UNSPEC_AESIMC))]
+   "TARGET_SVE2_AES && aarch64_fusion_enabled_p (AARCH64_FUSE_AES_AESMC)"
+   "aesd\t%0.b, %0.b, %2.b\;aesimc\t%0.b, %0.b"
+   [(set_attr "type" "crypto_aese")
+    (set_attr "length" "8")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- Optional SHA-3 extensions
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - RAX1
+ ;; -------------------------------------------------------------------------
+ 
+ (define_insn "aarch64_sve2_rax1"
+   [(set (match_operand:VNx2DI 0 "register_operand" "=w")
+ 	(xor:VNx2DI
+ 	  (rotate:VNx2DI
+ 	    (match_operand:VNx2DI 2 "register_operand" "w")
+ 	    (const_int 1))
+ 	  (match_operand:VNx2DI 1 "register_operand" "w")))]
+   "TARGET_SVE2_SHA3"
+   "rax1\t%0.d, %1.d, %2.d"
+   [(set_attr "type" "crypto_sha3")]
+ )
+ 
+ ;; -------------------------------------------------------------------------
+ ;; ---- Optional SM4 extensions
+ ;; -------------------------------------------------------------------------
+ ;; Includes:
+ ;; - SM4E
+ ;; - SM4EKEY
+ ;; -------------------------------------------------------------------------
+ 
+ ;; These instructions do not take MOVPRFX.
+ (define_insn "aarch64_sve2_sm4e"
+   [(set (match_operand:VNx4SI 0 "register_operand" "=w")
+ 	(unspec:VNx4SI
+ 	  [(match_operand:VNx4SI 1 "register_operand" "0")
+ 	   (match_operand:VNx4SI 2 "register_operand" "w")]
+ 	  UNSPEC_SM4E))]
+   "TARGET_SVE2_SM4"
+   "sm4e\t%0.s, %0.s, %2.s"
+   [(set_attr "type" "crypto_sm4")]
+ )
+ 
+ (define_insn "aarch64_sve2_sm4ekey"
+   [(set (match_operand:VNx4SI 0 "register_operand" "=w")
+ 	(unspec:VNx4SI
+ 	  [(match_operand:VNx4SI 1 "register_operand" "w")
+ 	   (match_operand:VNx4SI 2 "register_operand" "w")]
+ 	  UNSPEC_SM4EKEY))]
+   "TARGET_SVE2_SM4"
+   "sm4ekey\t%0.s, %1.s, %2.s"
+   [(set_attr "type" "crypto_sm4")]
+ )
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-tune.md gcc-10.1.0/gcc/config/aarch64/aarch64-tune.md
*** gcc-9.3.0/gcc/config/aarch64/aarch64-tune.md	Thu Mar 12 11:08:30 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-tune.md	Thu May  7 10:50:51 2020
***************
*** 1,5 ****
  ;; -*- buffer-read-only: t -*-
  ;; Generated automatically by gentune.sh from aarch64-cores.def
  (define_attr "tune"
! 	"cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,ares,neoversen1,neoversee1,tsv110,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55"
  	(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
--- 1,5 ----
  ;; -*- buffer-read-only: t -*-
  ;; Generated automatically by gentune.sh from aarch64-cores.def
  (define_attr "tune"
! 	"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa65,cortexa65ae,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,tsv110,thunderx3t110,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55"
  	(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-tuning-flags.def gcc-10.1.0/gcc/config/aarch64/aarch64-tuning-flags.def
*** gcc-9.3.0/gcc/config/aarch64/aarch64-tuning-flags.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64-tuning-flags.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2015-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,4 ----
! /* Copyright (C) 2015-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64-vxworks.h gcc-10.1.0/gcc/config/aarch64/aarch64-vxworks.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64-vxworks.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/aarch64-vxworks.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,71 ----
+ /* Definitions of target machine for GNU compiler.  Vxworks Aarch 64bit
+    version.
+    Copyright (C) 2018-2020 Free Software Foundation, Inc.
+    Contributed by Douglas B Rupp
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3, or (at your option) any later
+ version.
+ 
+ GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #undef SUBTARGET_OVERRIDE_OPTIONS
+ #define SUBTARGET_OVERRIDE_OPTIONS VXWORKS_OVERRIDE_OPTIONS
+ 
+ #undef LINK_SPEC
+ #define LINK_SPEC VXWORKS_LINK_SPEC
+ 
+ #undef LIB_SPEC
+ #define LIB_SPEC VXWORKS_LIB_SPEC
+ 
+ #undef STARTFILE_SPEC
+ #define STARTFILE_SPEC VXWORKS_STARTFILE_SPEC
+ 
+ #undef ENDFILE_SPEC
+ #define ENDFILE_SPEC VXWORKS_ENDFILE_SPEC
+ 
+ #undef CPP_SPEC
+ #define CPP_SPEC VXWORKS_ADDITIONAL_CPP_SPEC
+ 
+ #undef CC1_SPEC
+ #define CC1_SPEC VXWORKS_CC1_SPEC
+ 
+ #undef FUNCTION_PROFILER
+ #define FUNCTION_PROFILER VXWORKS_FUNCTION_PROFILER
+ 
+ #undef TARGET_OS_CPP_BUILTINS
+ #define TARGET_OS_CPP_BUILTINS()	  \
+   do {					  \
+     if (TARGET_BIG_END)                         \
+       builtin_define ("ARMEB");                 \
+     else                                        \
+       builtin_define ("ARMEL");                 \
+     builtin_define ("_VX_CPU=ARMARCH8A"); \
+     VXWORKS_OS_CPP_BUILTINS ();		  \
+   } while (0)
+ 
+ /* Static stack checking is supported.  */
+ #define STACK_CHECK_STATIC_BUILTIN 1
+ 
+ #undef STACK_CHECK_PROTECT
+ #define STACK_CHECK_PROTECT 16384
+ 
+ /* The VxWorks environment on aarch64 is llvm-based only, uses R18 as
+    a TCB pointer.  */
+ 
+ #undef VXWORKS_PERSONALITY
+ #define VXWORKS_PERSONALITY "llvm"
+ 
+ #undef  TARGET_OS_USES_R18
+ #define TARGET_OS_USES_R18 1
+ 
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64.c gcc-10.1.0/gcc/config/aarch64/aarch64.c
*** gcc-9.3.0/gcc/config/aarch64/aarch64.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 55,61 ****
  #include "reload.h"
  #include "langhooks.h"
  #include "opts.h"
- #include "params.h"
  #include "gimplify.h"
  #include "dwarf2.h"
  #include "gimple-iterator.h"
--- 55,60 ----
***************
*** 73,78 ****
--- 72,79 ----
  #include "selftest-rtl.h"
  #include "rtx-vector-builder.h"
  #include "intl.h"
+ #include "expmed.h"
+ #include "function-abi.h"
  
  /* This file should be included last.  */
  #include "target-def.h"
***************
*** 83,89 ****
  /* Information about a legitimate vector immediate operand.  */
  struct simd_immediate_info
  {
!   enum insn_type { MOV, MVN };
    enum modifier_type { LSL, MSL };
  
    simd_immediate_info () {}
--- 84,90 ----
  /* Information about a legitimate vector immediate operand.  */
  struct simd_immediate_info
  {
!   enum insn_type { MOV, MVN, INDEX, PTRUE };
    enum modifier_type { LSL, MSL };
  
    simd_immediate_info () {}
*************** struct simd_immediate_info
*** 92,124 ****
  		       insn_type = MOV, modifier_type = LSL,
  		       unsigned int = 0);
    simd_immediate_info (scalar_mode, rtx, rtx);
  
    /* The mode of the elements.  */
    scalar_mode elt_mode;
  
-   /* The value of each element if all elements are the same, or the
-      first value if the constant is a series.  */
-   rtx value;
- 
-   /* The value of the step if the constant is a series, null otherwise.  */
-   rtx step;
- 
    /* The instruction to use to move the immediate into a vector.  */
    insn_type insn;
  
!   /* The kind of shift modifier to use, and the number of bits to shift.
!      This is (LSL, 0) if no shift is needed.  */
!   modifier_type modifier;
!   unsigned int shift;
  };
  
  /* Construct a floating-point immediate in which each element has mode
     ELT_MODE_IN and value VALUE_IN.  */
  inline simd_immediate_info
  ::simd_immediate_info (scalar_float_mode elt_mode_in, rtx value_in)
!   : elt_mode (elt_mode_in), value (value_in), step (NULL_RTX), insn (MOV),
!     modifier (LSL), shift (0)
! {}
  
  /* Construct an integer immediate in which each element has mode ELT_MODE_IN
     and value VALUE_IN.  The other parameters are as for the structure
--- 93,143 ----
  		       insn_type = MOV, modifier_type = LSL,
  		       unsigned int = 0);
    simd_immediate_info (scalar_mode, rtx, rtx);
+   simd_immediate_info (scalar_int_mode, aarch64_svpattern);
  
    /* The mode of the elements.  */
    scalar_mode elt_mode;
  
    /* The instruction to use to move the immediate into a vector.  */
    insn_type insn;
  
!   union
!   {
!     /* For MOV and MVN.  */
!     struct
!     {
!       /* The value of each element.  */
!       rtx value;
! 
!       /* The kind of shift modifier to use, and the number of bits to shift.
! 	 This is (LSL, 0) if no shift is needed.  */
!       modifier_type modifier;
!       unsigned int shift;
!     } mov;
! 
!     /* For INDEX.  */
!     struct
!     {
!       /* The value of the first element and the step to be added for each
! 	 subsequent element.  */
!       rtx base, step;
!     } index;
! 
!     /* For PTRUE.  */
!     aarch64_svpattern pattern;
!   } u;
  };
  
  /* Construct a floating-point immediate in which each element has mode
     ELT_MODE_IN and value VALUE_IN.  */
  inline simd_immediate_info
  ::simd_immediate_info (scalar_float_mode elt_mode_in, rtx value_in)
!   : elt_mode (elt_mode_in), insn (MOV)
! {
!   u.mov.value = value_in;
!   u.mov.modifier = LSL;
!   u.mov.shift = 0;
! }
  
  /* Construct an integer immediate in which each element has mode ELT_MODE_IN
     and value VALUE_IN.  The other parameters are as for the structure
*************** inline simd_immediate_info
*** 128,144 ****
  		       unsigned HOST_WIDE_INT value_in,
  		       insn_type insn_in, modifier_type modifier_in,
  		       unsigned int shift_in)
!   : elt_mode (elt_mode_in), value (gen_int_mode (value_in, elt_mode_in)),
!     step (NULL_RTX), insn (insn_in), modifier (modifier_in), shift (shift_in)
! {}
  
  /* Construct an integer immediate in which each element has mode ELT_MODE_IN
!    and where element I is equal to VALUE_IN + I * STEP_IN.  */
  inline simd_immediate_info
! ::simd_immediate_info (scalar_mode elt_mode_in, rtx value_in, rtx step_in)
!   : elt_mode (elt_mode_in), value (value_in), step (step_in), insn (MOV),
!     modifier (LSL), shift (0)
! {}
  
  /* The current code model.  */
  enum aarch64_code_model aarch64_cmodel;
--- 147,274 ----
  		       unsigned HOST_WIDE_INT value_in,
  		       insn_type insn_in, modifier_type modifier_in,
  		       unsigned int shift_in)
!   : elt_mode (elt_mode_in), insn (insn_in)
! {
!   u.mov.value = gen_int_mode (value_in, elt_mode_in);
!   u.mov.modifier = modifier_in;
!   u.mov.shift = shift_in;
! }
  
  /* Construct an integer immediate in which each element has mode ELT_MODE_IN
!    and where element I is equal to BASE_IN + I * STEP_IN.  */
  inline simd_immediate_info
! ::simd_immediate_info (scalar_mode elt_mode_in, rtx base_in, rtx step_in)
!   : elt_mode (elt_mode_in), insn (INDEX)
! {
!   u.index.base = base_in;
!   u.index.step = step_in;
! }
! 
! /* Construct a predicate that controls elements of mode ELT_MODE_IN
!    and has PTRUE pattern PATTERN_IN.  */
! inline simd_immediate_info
! ::simd_immediate_info (scalar_int_mode elt_mode_in,
! 		       aarch64_svpattern pattern_in)
!   : elt_mode (elt_mode_in), insn (PTRUE)
! {
!   u.pattern = pattern_in;
! }
! 
! namespace {
! 
! /* Describes types that map to Pure Scalable Types (PSTs) in the AAPCS64.  */
! class pure_scalable_type_info
! {
! public:
!   /* Represents the result of analyzing a type.  All values are nonzero,
!      in the possibly forlorn hope that accidental conversions to bool
!      trigger a warning.  */
!   enum analysis_result
!   {
!     /* The type does not have an ABI identity; i.e. it doesn't contain
!        at least one object whose type is a Fundamental Data Type.  */
!     NO_ABI_IDENTITY = 1,
! 
!     /* The type is definitely a Pure Scalable Type.  */
!     IS_PST,
! 
!     /* The type is definitely not a Pure Scalable Type.  */
!     ISNT_PST,
! 
!     /* It doesn't matter for PCS purposes whether the type is a Pure
!        Scalable Type or not, since the type will be handled the same
!        way regardless.
! 
!        Specifically, this means that if the type is a Pure Scalable Type,
!        there aren't enough argument registers to hold it, and so it will
!        need to be passed or returned in memory.  If the type isn't a
!        Pure Scalable Type, it's too big to be passed or returned in core
!        or SIMD&FP registers, and so again will need to go in memory.  */
!     DOESNT_MATTER
!   };
! 
!   /* Aggregates of 17 bytes or more are normally passed and returned
!      in memory, so aggregates of that size can safely be analyzed as
!      DOESNT_MATTER.  We need to be able to collect enough pieces to
!      represent a PST that is smaller than that.  Since predicates are
!      2 bytes in size for -msve-vector-bits=128, that means we need to be
!      able to store at least 8 pieces.
! 
!      We also need to be able to store enough pieces to represent
!      a single vector in each vector argument register and a single
!      predicate in each predicate argument register.  This means that
!      we need at least 12 pieces.  */
!   static const unsigned int MAX_PIECES = NUM_FP_ARG_REGS + NUM_PR_ARG_REGS;
! #if __cplusplus >= 201103L
!   static_assert (MAX_PIECES >= 8, "Need to store at least 8 predicates");
! #endif
! 
!   /* Describes one piece of a PST.  Each piece is one of:
! 
!      - a single Scalable Vector Type (SVT)
!      - a single Scalable Predicate Type (SPT)
!      - a PST containing 2, 3 or 4 SVTs, with no padding
! 
!      It either represents a single built-in type or a PST formed from
!      multiple homogeneous built-in types.  */
!   struct piece
!   {
!     rtx get_rtx (unsigned int, unsigned int) const;
! 
!     /* The number of vector and predicate registers that the piece
!        occupies.  One of the two is always zero.  */
!     unsigned int num_zr;
!     unsigned int num_pr;
! 
!     /* The mode of the registers described above.  */
!     machine_mode mode;
! 
!     /* If this piece is formed from multiple homogeneous built-in types,
!        this is the mode of the built-in types, otherwise it is MODE.  */
!     machine_mode orig_mode;
! 
!     /* The offset in bytes of the piece from the start of the type.  */
!     poly_uint64_pod offset;
!   };
! 
!   /* Divides types analyzed as IS_PST into individual pieces.  The pieces
!      are in memory order.  */
!   auto_vec<piece, MAX_PIECES> pieces;
! 
!   unsigned int num_zr () const;
!   unsigned int num_pr () const;
! 
!   rtx get_rtx (machine_mode mode, unsigned int, unsigned int) const;
! 
!   analysis_result analyze (const_tree);
!   bool analyze_registers (const_tree);
! 
! private:
!   analysis_result analyze_array (const_tree);
!   analysis_result analyze_record (const_tree);
!   void add_piece (const piece &);
! };
! }
  
  /* The current code model.  */
  enum aarch64_code_model aarch64_cmodel;
*************** poly_uint16 aarch64_sve_vg;
*** 152,161 ****
  #endif
  
  static bool aarch64_composite_type_p (const_tree, machine_mode);
  static bool aarch64_vfp_is_call_or_return_candidate (machine_mode,
  						     const_tree,
  						     machine_mode *, int *,
! 						     bool *);
  static void aarch64_elf_asm_constructor (rtx, int) ATTRIBUTE_UNUSED;
  static void aarch64_elf_asm_destructor (rtx, int) ATTRIBUTE_UNUSED;
  static void aarch64_override_options_after_change (void);
--- 282,292 ----
  #endif
  
  static bool aarch64_composite_type_p (const_tree, machine_mode);
+ static bool aarch64_return_in_memory_1 (const_tree);
  static bool aarch64_vfp_is_call_or_return_candidate (machine_mode,
  						     const_tree,
  						     machine_mode *, int *,
! 						     bool *, bool);
  static void aarch64_elf_asm_constructor (rtx, int) ATTRIBUTE_UNUSED;
  static void aarch64_elf_asm_destructor (rtx, int) ATTRIBUTE_UNUSED;
  static void aarch64_override_options_after_change (void);
*************** unsigned aarch64_architecture_version;
*** 177,183 ****
  enum aarch64_processor aarch64_tune = cortexa53;
  
  /* Mask to specify which instruction scheduling options should be used.  */
! unsigned long aarch64_tune_flags = 0;
  
  /* Global flag for PC relative loads.  */
  bool aarch64_pcrelative_literal_loads;
--- 308,314 ----
  enum aarch64_processor aarch64_tune = cortexa53;
  
  /* Mask to specify which instruction scheduling options should be used.  */
! uint64_t aarch64_tune_flags = 0;
  
  /* Global flag for PC relative loads.  */
  bool aarch64_pcrelative_literal_loads;
*************** static const struct cpu_addrcost_table t
*** 285,290 ****
--- 416,437 ----
    0, /* imm_offset  */
  };
  
+ static const struct cpu_addrcost_table thunderx3t110_addrcost_table =
+ {
+     {
+       1, /* hi  */
+       1, /* si  */
+       1, /* di  */
+       2, /* ti  */
+     },
+   0, /* pre_modify  */
+   0, /* post_modify  */
+   2, /* register_offset  */
+   3, /* register_sextend  */
+   3, /* register_zextend  */
+   0, /* imm_offset  */
+ };
+ 
  static const struct cpu_addrcost_table tsv110_addrcost_table =
  {
      {
*************** static const struct cpu_regmove_cost thu
*** 393,398 ****
--- 540,554 ----
    4  /* FP2FP  */
  };
  
+ static const struct cpu_regmove_cost thunderx3t110_regmove_cost =
+ {
+   1, /* GP2GP  */
+   /* Avoid the use of int<->fp moves for spilling.  */
+   4, /* GP2FP  */
+   5, /* FP2GP  */
+   4  /* FP2FP  */
+ };
+ 
  static const struct cpu_regmove_cost tsv110_regmove_cost =
  {
    1, /* GP2GP  */
*************** static const struct cpu_vector_cost gene
*** 413,419 ****
    1, /* vec_int_stmt_cost  */
    1, /* vec_fp_stmt_cost  */
    2, /* vec_permute_cost  */
!   1, /* vec_to_scalar_cost  */
    1, /* scalar_to_vec_cost  */
    1, /* vec_align_load_cost  */
    1, /* vec_unalign_load_cost  */
--- 569,575 ----
    1, /* vec_int_stmt_cost  */
    1, /* vec_fp_stmt_cost  */
    2, /* vec_permute_cost  */
!   2, /* vec_to_scalar_cost  */
    1, /* scalar_to_vec_cost  */
    1, /* vec_align_load_cost  */
    1, /* vec_unalign_load_cost  */
*************** static const struct cpu_vector_cost thun
*** 550,556 ****
    1, /* scalar_store_cost  */
    5, /* vec_int_stmt_cost  */
    6, /* vec_fp_stmt_cost  */
!   3, /* vec_permute_cost  */
    6, /* vec_to_scalar_cost  */
    5, /* scalar_to_vec_cost  */
    8, /* vec_align_load_cost  */
--- 706,712 ----
    1, /* scalar_store_cost  */
    5, /* vec_int_stmt_cost  */
    6, /* vec_fp_stmt_cost  */
!   10, /* vec_permute_cost  */
    6, /* vec_to_scalar_cost  */
    5, /* scalar_to_vec_cost  */
    8, /* vec_align_load_cost  */
*************** static const struct cpu_vector_cost thun
*** 561,566 ****
--- 717,742 ----
    1  /* cond_not_taken_branch_cost  */
  };
  
+ static const struct cpu_vector_cost thunderx3t110_vector_cost =
+ {
+   1, /* scalar_int_stmt_cost  */
+   5, /* scalar_fp_stmt_cost  */
+   4, /* scalar_load_cost  */
+   1, /* scalar_store_cost  */
+   5, /* vec_int_stmt_cost  */
+   5, /* vec_fp_stmt_cost  */
+   10, /* vec_permute_cost  */
+   5, /* vec_to_scalar_cost  */
+   5, /* scalar_to_vec_cost  */
+   4, /* vec_align_load_cost  */
+   4, /* vec_unalign_load_cost  */
+   4, /* vec_unalign_store_cost  */
+   4, /* vec_store_cost  */
+   2, /* cond_taken_branch_cost  */
+   1  /* cond_not_taken_branch_cost  */
+ };
+ 
+ 
  /* Generic costs for branch instructions.  */
  static const struct cpu_branch_cost generic_branch_cost =
  {
*************** static const cpu_prefetch_tune thunderx2
*** 659,664 ****
--- 835,851 ----
    -1			/* default_opt_level  */
  };
  
+ static const cpu_prefetch_tune thunderx3t110_prefetch_tune =
+ {
+   8,			/* num_slots  */
+   32,			/* l1_cache_size  */
+   64,			/* l1_cache_line_size  */
+   256,			/* l2_cache_size  */
+   true,			/* prefetch_dynamic_strides */
+   -1,			/* minimum_stride */
+   -1			/* default_opt_level  */
+ };
+ 
  static const cpu_prefetch_tune tsv110_prefetch_tune =
  {
    0,                    /* num_slots  */
*************** static const struct tune_params generic_
*** 692,699 ****
    SVE_NOT_IMPLEMENTED, /* sve_width  */
    4, /* memmov_cost  */
    2, /* issue_rate  */
!   (AARCH64_FUSE_AES_AESMC), /* fusible_ops  */
!   "8",	/* function_align.  */
    "4",	/* jump_align.  */
    "8",	/* loop_align.  */
    2,	/* int_reassoc_width.  */
--- 879,886 ----
    SVE_NOT_IMPLEMENTED, /* sve_width  */
    4, /* memmov_cost  */
    2, /* issue_rate  */
!   (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops  */
!   "16:12",	/* function_align.  */
    "4",	/* jump_align.  */
    "8",	/* loop_align.  */
    2,	/* int_reassoc_width.  */
*************** static const struct tune_params thunderx
*** 881,887 ****
    SVE_NOT_IMPLEMENTED, /* sve_width  */
    6, /* memmov_cost  */
    2, /* issue_rate  */
!   AARCH64_FUSE_CMP_BRANCH, /* fusible_ops  */
    "8",	/* function_align.  */
    "8",	/* jump_align.  */
    "8",	/* loop_align.  */
--- 1068,1074 ----
    SVE_NOT_IMPLEMENTED, /* sve_width  */
    6, /* memmov_cost  */
    2, /* issue_rate  */
!   AARCH64_FUSE_ALU_BRANCH, /* fusible_ops  */
    "8",	/* function_align.  */
    "8",	/* jump_align.  */
    "8",	/* loop_align.  */
*************** static const struct tune_params thunderx
*** 907,913 ****
    SVE_NOT_IMPLEMENTED, /* sve_width  */
    6, /* memmov_cost  */
    2, /* issue_rate  */
!   AARCH64_FUSE_CMP_BRANCH, /* fusible_ops  */
    "8",	/* function_align.  */
    "8",	/* jump_align.  */
    "8",	/* loop_align.  */
--- 1094,1100 ----
    SVE_NOT_IMPLEMENTED, /* sve_width  */
    6, /* memmov_cost  */
    2, /* issue_rate  */
!   AARCH64_FUSE_ALU_BRANCH, /* fusible_ops  */
    "8",	/* function_align.  */
    "8",	/* jump_align.  */
    "8",	/* loop_align.  */
*************** static const struct tune_params tsv110_t
*** 934,941 ****
    SVE_NOT_IMPLEMENTED, /* sve_width  */
    4,    /* memmov_cost  */
    4,    /* issue_rate  */
!   (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH
!    | AARCH64_FUSE_ALU_BRANCH), /* fusible_ops  */
    "16", /* function_align.  */
    "4",  /* jump_align.  */
    "8",  /* loop_align.  */
--- 1121,1128 ----
    SVE_NOT_IMPLEMENTED, /* sve_width  */
    4,    /* memmov_cost  */
    4,    /* issue_rate  */
!   (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_ALU_BRANCH
!    | AARCH64_FUSE_ALU_CBZ), /* fusible_ops  */
    "16", /* function_align.  */
    "4",  /* jump_align.  */
    "8",  /* loop_align.  */
*************** static const struct tune_params thunderx
*** 1069,1076 ****
    SVE_NOT_IMPLEMENTED, /* sve_width  */
    4, /* memmov_cost.  */
    4, /* issue_rate.  */
!   (AARCH64_FUSE_CMP_BRANCH | AARCH64_FUSE_AES_AESMC
!    | AARCH64_FUSE_ALU_BRANCH), /* fusible_ops  */
    "16",	/* function_align.  */
    "8",	/* jump_align.  */
    "16",	/* loop_align.  */
--- 1256,1263 ----
    SVE_NOT_IMPLEMENTED, /* sve_width  */
    4, /* memmov_cost.  */
    4, /* issue_rate.  */
!   (AARCH64_FUSE_ALU_BRANCH | AARCH64_FUSE_AES_AESMC
!    | AARCH64_FUSE_ALU_CBZ), /* fusible_ops  */
    "16",	/* function_align.  */
    "8",	/* jump_align.  */
    "16",	/* loop_align.  */
*************** static const struct tune_params thunderx
*** 1085,1090 ****
--- 1272,1304 ----
    &thunderx2t99_prefetch_tune
  };
  
+ static const struct tune_params thunderx3t110_tunings =
+ {
+   &thunderx3t110_extra_costs,
+   &thunderx3t110_addrcost_table,
+   &thunderx3t110_regmove_cost,
+   &thunderx3t110_vector_cost,
+   &generic_branch_cost,
+   &generic_approx_modes,
+   SVE_NOT_IMPLEMENTED, /* sve_width  */
+   4, /* memmov_cost.  */
+   6, /* issue_rate.  */
+   (AARCH64_FUSE_ALU_BRANCH | AARCH64_FUSE_AES_AESMC
+    | AARCH64_FUSE_ALU_CBZ), /* fusible_ops  */
+   "16",	/* function_align.  */
+   "8",	/* jump_align.  */
+   "16",	/* loop_align.  */
+   3,	/* int_reassoc_width.  */
+   2,	/* fp_reassoc_width.  */
+   2,	/* vec_reassoc_width.  */
+   2,	/* min_div_recip_mul_sf.  */
+   2,	/* min_div_recip_mul_df.  */
+   0,	/* max_case_values.  */
+   tune_params::AUTOPREFETCHER_WEAK,	/* autoprefetcher_model.  */
+   (AARCH64_EXTRA_TUNE_NONE),	/* tune_flags.  */
+   &thunderx3t110_prefetch_tune
+ };
+ 
  static const struct tune_params neoversen1_tunings =
  {
    &cortexa57_extra_costs,
*************** static const struct tune_params neoverse
*** 1096,1104 ****
    SVE_NOT_IMPLEMENTED, /* sve_width  */
    4, /* memmov_cost  */
    3, /* issue_rate  */
!   AARCH64_FUSE_AES_AESMC, /* fusible_ops  */
    "32:16",	/* function_align.  */
!   "32:16",	/* jump_align.  */
    "32:16",	/* loop_align.  */
    2,	/* int_reassoc_width.  */
    4,	/* fp_reassoc_width.  */
--- 1310,1318 ----
    SVE_NOT_IMPLEMENTED, /* sve_width  */
    4, /* memmov_cost  */
    3, /* issue_rate  */
!   (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops  */
    "32:16",	/* function_align.  */
!   "4",		/* jump_align.  */
    "32:16",	/* loop_align.  */
    2,	/* int_reassoc_width.  */
    4,	/* fp_reassoc_width.  */
*************** struct processor
*** 1139,1145 ****
    enum aarch64_processor sched_core;
    enum aarch64_arch arch;
    unsigned architecture_version;
!   const unsigned long flags;
    const struct tune_params *const tune;
  };
  
--- 1353,1359 ----
    enum aarch64_processor sched_core;
    enum aarch64_arch arch;
    unsigned architecture_version;
!   const uint64_t flags;
    const struct tune_params *const tune;
  };
  
*************** static const struct processor *selected_
*** 1172,1186 ****
  static const struct processor *selected_cpu;
  static const struct processor *selected_tune;
  
  /* The current tuning set.  */
  struct tune_params aarch64_tune_params = generic_tunings;
  
  /* Table of machine attributes.  */
  static const struct attribute_spec aarch64_attribute_table[] =
  {
    /* { name, min_len, max_len, decl_req, type_req, fn_type_req,
         affects_type_identity, handler, exclude } */
!   { "aarch64_vector_pcs", 0, 0, false, true,  true,  true,  NULL, NULL },
    { NULL,                 0, 0, false, false, false, false, NULL, NULL }
  };
  
--- 1386,1436 ----
  static const struct processor *selected_cpu;
  static const struct processor *selected_tune;
  
+ enum aarch64_key_type aarch64_ra_sign_key = AARCH64_KEY_A;
+ 
  /* The current tuning set.  */
  struct tune_params aarch64_tune_params = generic_tunings;
  
+ /* Check whether an 'aarch64_vector_pcs' attribute is valid.  */
+ 
+ static tree
+ handle_aarch64_vector_pcs_attribute (tree *node, tree name, tree,
+ 				     int, bool *no_add_attrs)
+ {
+   /* Since we set fn_type_req to true, the caller should have checked
+      this for us.  */
+   gcc_assert (FUNC_OR_METHOD_TYPE_P (*node));
+   switch ((arm_pcs) fntype_abi (*node).id ())
+     {
+     case ARM_PCS_AAPCS64:
+     case ARM_PCS_SIMD:
+       return NULL_TREE;
+ 
+     case ARM_PCS_SVE:
+       error ("the %qE attribute cannot be applied to an SVE function type",
+ 	     name);
+       *no_add_attrs = true;
+       return NULL_TREE;
+ 
+     case ARM_PCS_TLSDESC:
+     case ARM_PCS_UNKNOWN:
+       break;
+     }
+   gcc_unreachable ();
+ }
+ 
  /* Table of machine attributes.  */
  static const struct attribute_spec aarch64_attribute_table[] =
  {
    /* { name, min_len, max_len, decl_req, type_req, fn_type_req,
         affects_type_identity, handler, exclude } */
!   { "aarch64_vector_pcs", 0, 0, false, true,  true,  true,
! 			  handle_aarch64_vector_pcs_attribute, NULL },
!   { "arm_sve_vector_bits", 1, 1, false, true,  false, true,
! 			  aarch64_sve::handle_arm_sve_vector_bits_attribute,
! 			  NULL },
!   { "SVE type",		  3, 3, false, true,  false, true,  NULL, NULL },
!   { "SVE sizeless type",  0, 0, false, true,  false, true,  NULL, NULL },
    { NULL,                 0, 0, false, false, false, false, NULL, NULL }
  };
  
*************** static enum aarch64_parse_opt_result
*** 1241,1246 ****
--- 1491,1497 ----
  aarch64_handle_standard_branch_protection (char* str, char* rest)
  {
    aarch64_ra_sign_scope = AARCH64_FUNCTION_NON_LEAF;
+   aarch64_ra_sign_key = AARCH64_KEY_A;
    aarch64_enable_bti = 1;
    if (rest)
      {
*************** aarch64_handle_pac_ret_protection (char*
*** 1255,1260 ****
--- 1506,1512 ----
  				    char* rest ATTRIBUTE_UNUSED)
  {
    aarch64_ra_sign_scope = AARCH64_FUNCTION_NON_LEAF;
+   aarch64_ra_sign_key = AARCH64_KEY_A;
    return AARCH64_PARSE_OK;
  }
  
*************** aarch64_handle_pac_ret_leaf (char* str A
*** 1267,1272 ****
--- 1519,1532 ----
  }
  
  static enum aarch64_parse_opt_result
+ aarch64_handle_pac_ret_b_key (char* str ATTRIBUTE_UNUSED,
+ 			      char* rest ATTRIBUTE_UNUSED)
+ {
+   aarch64_ra_sign_key = AARCH64_KEY_B;
+   return AARCH64_PARSE_OK;
+ }
+ 
+ static enum aarch64_parse_opt_result
  aarch64_handle_bti_protection (char* str ATTRIBUTE_UNUSED,
  				    char* rest ATTRIBUTE_UNUSED)
  {
*************** aarch64_handle_bti_protection (char* str
*** 1276,1281 ****
--- 1536,1542 ----
  
  static const struct aarch64_branch_protect_type aarch64_pac_ret_subtypes[] = {
    { "leaf", aarch64_handle_pac_ret_leaf, NULL, 0 },
+   { "b-key", aarch64_handle_pac_ret_b_key, NULL, 0 },
    { NULL, NULL, NULL, 0 }
  };
  
*************** static const char * const aarch64_condit
*** 1295,1300 ****
--- 1556,1902 ----
    "hi", "ls", "ge", "lt", "gt", "le", "al", "nv"
  };
  
+ /* The preferred condition codes for SVE conditions.  */
+ static const char *const aarch64_sve_condition_codes[] =
+ {
+   "none", "any", "nlast", "last", "first", "nfrst", "vs", "vc",
+   "pmore", "plast", "tcont", "tstop", "gt", "le", "al", "nv"
+ };
+ 
+ /* Return the assembly token for svpattern value VALUE.  */
+ 
+ static const char *
+ svpattern_token (enum aarch64_svpattern pattern)
+ {
+   switch (pattern)
+     {
+ #define CASE(UPPER, LOWER, VALUE) case AARCH64_SV_##UPPER: return #LOWER;
+     AARCH64_FOR_SVPATTERN (CASE)
+ #undef CASE
+     case AARCH64_NUM_SVPATTERNS:
+       break;
+     }
+   gcc_unreachable ();
+ }
+ 
+ /* Return the location of a piece that is known to be passed or returned
+    in registers.  FIRST_ZR is the first unused vector argument register
+    and FIRST_PR is the first unused predicate argument register.  */
+ 
+ rtx
+ pure_scalable_type_info::piece::get_rtx (unsigned int first_zr,
+ 					 unsigned int first_pr) const
+ {
+   gcc_assert (VECTOR_MODE_P (mode)
+ 	      && first_zr + num_zr <= V0_REGNUM + NUM_FP_ARG_REGS
+ 	      && first_pr + num_pr <= P0_REGNUM + NUM_PR_ARG_REGS);
+ 
+   if (num_zr > 0 && num_pr == 0)
+     return gen_rtx_REG (mode, first_zr);
+ 
+   if (num_zr == 0 && num_pr == 1)
+     return gen_rtx_REG (mode, first_pr);
+ 
+   gcc_unreachable ();
+ }
+ 
+ /* Return the total number of vector registers required by the PST.  */
+ 
+ unsigned int
+ pure_scalable_type_info::num_zr () const
+ {
+   unsigned int res = 0;
+   for (unsigned int i = 0; i < pieces.length (); ++i)
+     res += pieces[i].num_zr;
+   return res;
+ }
+ 
+ /* Return the total number of predicate registers required by the PST.  */
+ 
+ unsigned int
+ pure_scalable_type_info::num_pr () const
+ {
+   unsigned int res = 0;
+   for (unsigned int i = 0; i < pieces.length (); ++i)
+     res += pieces[i].num_pr;
+   return res;
+ }
+ 
+ /* Return the location of a PST that is known to be passed or returned
+    in registers.  FIRST_ZR is the first unused vector argument register
+    and FIRST_PR is the first unused predicate argument register.  */
+ 
+ rtx
+ pure_scalable_type_info::get_rtx (machine_mode mode,
+ 				  unsigned int first_zr,
+ 				  unsigned int first_pr) const
+ {
+   /* Try to return a single REG if possible.  This leads to better
+      code generation; it isn't required for correctness.  */
+   if (mode == pieces[0].mode)
+     {
+       gcc_assert (pieces.length () == 1);
+       return pieces[0].get_rtx (first_zr, first_pr);
+     }
+ 
+   /* Build up a PARALLEL that contains the individual pieces.  */
+   rtvec rtxes = rtvec_alloc (pieces.length ());
+   for (unsigned int i = 0; i < pieces.length (); ++i)
+     {
+       rtx reg = pieces[i].get_rtx (first_zr, first_pr);
+       rtx offset = gen_int_mode (pieces[i].offset, Pmode);
+       RTVEC_ELT (rtxes, i) = gen_rtx_EXPR_LIST (VOIDmode, reg, offset);
+       first_zr += pieces[i].num_zr;
+       first_pr += pieces[i].num_pr;
+     }
+   return gen_rtx_PARALLEL (mode, rtxes);
+ }
+ 
+ /* Analyze whether TYPE is a Pure Scalable Type according to the rules
+    in the AAPCS64.  */
+ 
+ pure_scalable_type_info::analysis_result
+ pure_scalable_type_info::analyze (const_tree type)
+ {
+   /* Prevent accidental reuse.  */
+   gcc_assert (pieces.is_empty ());
+ 
+   /* No code will be generated for erroneous types, so we won't establish
+      an ABI mapping.  */
+   if (type == error_mark_node)
+     return NO_ABI_IDENTITY;
+ 
+   /* Zero-sized types disappear in the language->ABI mapping.  */
+   if (TYPE_SIZE (type) && integer_zerop (TYPE_SIZE (type)))
+     return NO_ABI_IDENTITY;
+ 
+   /* Check for SVTs, SPTs, and built-in tuple types that map to PSTs.  */
+   piece p = {};
+   if (aarch64_sve::builtin_type_p (type, &p.num_zr, &p.num_pr))
+     {
+       machine_mode mode = TYPE_MODE_RAW (type);
+       gcc_assert (VECTOR_MODE_P (mode)
+ 		  && (!TARGET_SVE || aarch64_sve_mode_p (mode)));
+ 
+       p.mode = p.orig_mode = mode;
+       add_piece (p);
+       return IS_PST;
+     }
+ 
+   /* Check for user-defined PSTs.  */
+   if (TREE_CODE (type) == ARRAY_TYPE)
+     return analyze_array (type);
+   if (TREE_CODE (type) == RECORD_TYPE)
+     return analyze_record (type);
+ 
+   return ISNT_PST;
+ }
+ 
+ /* Analyze a type that is known not to be passed or returned in memory.
+    Return true if it has an ABI identity and is a Pure Scalable Type.  */
+ 
+ bool
+ pure_scalable_type_info::analyze_registers (const_tree type)
+ {
+   analysis_result result = analyze (type);
+   gcc_assert (result != DOESNT_MATTER);
+   return result == IS_PST;
+ }
+ 
+ /* Subroutine of analyze for handling ARRAY_TYPEs.  */
+ 
+ pure_scalable_type_info::analysis_result
+ pure_scalable_type_info::analyze_array (const_tree type)
+ {
+   /* Analyze the element type.  */
+   pure_scalable_type_info element_info;
+   analysis_result result = element_info.analyze (TREE_TYPE (type));
+   if (result != IS_PST)
+     return result;
+ 
+   /* An array of unknown, flexible or variable length will be passed and
+      returned by reference whatever we do.  */
+   tree nelts_minus_one = array_type_nelts (type);
+   if (!tree_fits_uhwi_p (nelts_minus_one))
+     return DOESNT_MATTER;
+ 
+   /* Likewise if the array is constant-sized but too big to be interesting.
+      The double checks against MAX_PIECES are to protect against overflow.  */
+   unsigned HOST_WIDE_INT count = tree_to_uhwi (nelts_minus_one);
+   if (count > MAX_PIECES)
+     return DOESNT_MATTER;
+   count += 1;
+   if (count * element_info.pieces.length () > MAX_PIECES)
+     return DOESNT_MATTER;
+ 
+   /* The above checks should have weeded out elements of unknown size.  */
+   poly_uint64 element_bytes;
+   if (!poly_int_tree_p (TYPE_SIZE_UNIT (TREE_TYPE (type)), &element_bytes))
+     gcc_unreachable ();
+ 
+   /* Build up the list of individual vectors and predicates.  */
+   gcc_assert (!element_info.pieces.is_empty ());
+   for (unsigned int i = 0; i < count; ++i)
+     for (unsigned int j = 0; j < element_info.pieces.length (); ++j)
+       {
+ 	piece p = element_info.pieces[j];
+ 	p.offset += i * element_bytes;
+ 	add_piece (p);
+       }
+   return IS_PST;
+ }
+ 
+ /* Subroutine of analyze for handling RECORD_TYPEs.  */
+ 
+ pure_scalable_type_info::analysis_result
+ pure_scalable_type_info::analyze_record (const_tree type)
+ {
+   for (tree field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
+     {
+       if (TREE_CODE (field) != FIELD_DECL)
+ 	continue;
+ 
+       /* Zero-sized fields disappear in the language->ABI mapping.  */
+       if (DECL_SIZE (field) && integer_zerop (DECL_SIZE (field)))
+ 	continue;
+ 
+       /* All fields with an ABI identity must be PSTs for the record as
+ 	 a whole to be a PST.  If any individual field is too big to be
+ 	 interesting then the record is too.  */
+       pure_scalable_type_info field_info;
+       analysis_result subresult = field_info.analyze (TREE_TYPE (field));
+       if (subresult == NO_ABI_IDENTITY)
+ 	continue;
+       if (subresult != IS_PST)
+ 	return subresult;
+ 
+       /* Since all previous fields are PSTs, we ought to be able to track
+ 	 the field offset using poly_ints.  */
+       tree bitpos = bit_position (field);
+       gcc_assert (poly_int_tree_p (bitpos));
+ 
+       /* For the same reason, it shouldn't be possible to create a PST field
+ 	 whose offset isn't byte-aligned.  */
+       poly_widest_int wide_bytepos = exact_div (wi::to_poly_widest (bitpos),
+ 						BITS_PER_UNIT);
+ 
+       /* Punt if the record is too big to be interesting.  */
+       poly_uint64 bytepos;
+       if (!wide_bytepos.to_uhwi (&bytepos)
+ 	  || pieces.length () + field_info.pieces.length () > MAX_PIECES)
+ 	return DOESNT_MATTER;
+ 
+       /* Add the individual vectors and predicates in the field to the
+ 	 record's list.  */
+       gcc_assert (!field_info.pieces.is_empty ());
+       for (unsigned int i = 0; i < field_info.pieces.length (); ++i)
+ 	{
+ 	  piece p = field_info.pieces[i];
+ 	  p.offset += bytepos;
+ 	  add_piece (p);
+ 	}
+     }
+   /* Empty structures disappear in the language->ABI mapping.  */
+   return pieces.is_empty () ? NO_ABI_IDENTITY : IS_PST;
+ }
+ 
+ /* Add P to the list of pieces in the type.  */
+ 
+ void
+ pure_scalable_type_info::add_piece (const piece &p)
+ {
+   /* Try to fold the new piece into the previous one to form a
+      single-mode PST.  For example, if we see three consecutive vectors
+      of the same mode, we can represent them using the corresponding
+      3-tuple mode.
+ 
+      This is purely an optimization.  */
+   if (!pieces.is_empty ())
+     {
+       piece &prev = pieces.last ();
+       gcc_assert (VECTOR_MODE_P (p.mode) && VECTOR_MODE_P (prev.mode));
+       unsigned int nelems1, nelems2;
+       if (prev.orig_mode == p.orig_mode
+ 	  && known_eq (prev.offset + GET_MODE_SIZE (prev.mode), p.offset)
+ 	  && constant_multiple_p (GET_MODE_NUNITS (prev.mode),
+ 				  GET_MODE_NUNITS (p.orig_mode), &nelems1)
+ 	  && constant_multiple_p (GET_MODE_NUNITS (p.mode),
+ 				  GET_MODE_NUNITS (p.orig_mode), &nelems2)
+ 	  && targetm.array_mode (p.orig_mode,
+ 				 nelems1 + nelems2).exists (&prev.mode))
+ 	{
+ 	  prev.num_zr += p.num_zr;
+ 	  prev.num_pr += p.num_pr;
+ 	  return;
+ 	}
+     }
+   pieces.quick_push (p);
+ }
+ 
+ /* Return true if at least one possible value of type TYPE includes at
+    least one object of Pure Scalable Type, in the sense of the AAPCS64.
+ 
+    This is a relatively expensive test for some types, so it should
+    generally be made as late as possible.  */
+ 
+ static bool
+ aarch64_some_values_include_pst_objects_p (const_tree type)
+ {
+   if (TYPE_SIZE (type) && integer_zerop (TYPE_SIZE (type)))
+     return false;
+ 
+   if (aarch64_sve::builtin_type_p (type))
+     return true;
+ 
+   if (TREE_CODE (type) == ARRAY_TYPE || TREE_CODE (type) == COMPLEX_TYPE)
+     return aarch64_some_values_include_pst_objects_p (TREE_TYPE (type));
+ 
+   if (RECORD_OR_UNION_TYPE_P (type))
+     for (tree field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
+       if (TREE_CODE (field) == FIELD_DECL
+ 	  && aarch64_some_values_include_pst_objects_p (TREE_TYPE (field)))
+ 	return true;
+ 
+   return false;
+ }
+ 
+ /* Return the descriptor of the SIMD ABI.  */
+ 
+ static const predefined_function_abi &
+ aarch64_simd_abi (void)
+ {
+   predefined_function_abi &simd_abi = function_abis[ARM_PCS_SIMD];
+   if (!simd_abi.initialized_p ())
+     {
+       HARD_REG_SET full_reg_clobbers
+ 	= default_function_abi.full_reg_clobbers ();
+       for (int regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
+ 	if (FP_SIMD_SAVED_REGNUM_P (regno))
+ 	  CLEAR_HARD_REG_BIT (full_reg_clobbers, regno);
+       simd_abi.initialize (ARM_PCS_SIMD, full_reg_clobbers);
+     }
+   return simd_abi;
+ }
+ 
+ /* Return the descriptor of the SVE PCS.  */
+ 
+ static const predefined_function_abi &
+ aarch64_sve_abi (void)
+ {
+   predefined_function_abi &sve_abi = function_abis[ARM_PCS_SVE];
+   if (!sve_abi.initialized_p ())
+     {
+       HARD_REG_SET full_reg_clobbers
+ 	= default_function_abi.full_reg_clobbers ();
+       for (int regno = V8_REGNUM; regno <= V23_REGNUM; ++regno)
+ 	CLEAR_HARD_REG_BIT (full_reg_clobbers, regno);
+       for (int regno = P4_REGNUM; regno <= P15_REGNUM; ++regno)
+ 	CLEAR_HARD_REG_BIT (full_reg_clobbers, regno);
+       sve_abi.initialize (ARM_PCS_SVE, full_reg_clobbers);
+     }
+   return sve_abi;
+ }
+ 
  /* Generate code to enable conditional branches in functions over 1 MiB.  */
  const char *
  aarch64_gen_far_branch (rtx * operands, int pos_label, const char * dest,
*************** aarch64_err_no_fpadvsimd (machine_mode m
*** 1337,1342 ****
--- 1939,1971 ----
  	     " vector types", "+nofp");
  }
  
+ /* Report when we try to do something that requires SVE when SVE is disabled.
+    This is an error of last resort and isn't very high-quality.  It usually
+    involves attempts to measure the vector length in some way.  */
+ static void
+ aarch64_report_sve_required (void)
+ {
+   static bool reported_p = false;
+ 
+   /* Avoid reporting a slew of messages for a single oversight.  */
+   if (reported_p)
+     return;
+ 
+   error ("this operation requires the SVE ISA extension");
+   inform (input_location, "you can enable SVE using the command-line"
+ 	  " option %<-march%>, or by using the %<target%>"
+ 	  " attribute or pragma");
+   reported_p = true;
+ }
+ 
+ /* Return true if REGNO is P0-P15 or one of the special FFR-related
+    registers.  */
+ inline bool
+ pr_or_ffr_regnum_p (unsigned int regno)
+ {
+   return PR_REGNUM_P (regno) || regno == FFR_REGNUM || regno == FFRT_REGNUM;
+ }
+ 
  /* Implement TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS.
     The register allocator chooses POINTER_AND_FP_REGS if FP_REGS and
     GENERAL_REGS have the same cost - even if POINTER_AND_FP_REGS has a much
*************** aarch64_dbx_register_number (unsigned re
*** 1413,1418 ****
--- 2042,2057 ----
     return DWARF_FRAME_REGISTERS;
  }
  
+ /* If X is a CONST_DOUBLE, return its bit representation as a constant
+    integer, otherwise return X unmodified.  */
+ static rtx
+ aarch64_bit_representation (rtx x)
+ {
+   if (CONST_DOUBLE_P (x))
+     x = gen_lowpart (int_mode_for_mode (GET_MODE (x)).require (), x);
+   return x;
+ }
+ 
  /* Return true if MODE is any of the Advanced SIMD structure modes.  */
  static bool
  aarch64_advsimd_struct_mode_p (machine_mode mode)
*************** const unsigned int VEC_SVE_PRED = 4;
*** 1439,1444 ****
--- 2078,2086 ----
  /* Can be used in combination with VEC_ADVSIMD or VEC_SVE_DATA to indicate
     a structure of 2, 3 or 4 vectors.  */
  const unsigned int VEC_STRUCT   = 8;
+ /* Can be used in combination with VEC_SVE_DATA to indicate that the
+    vector has fewer significant bytes than a full SVE vector.  */
+ const unsigned int VEC_PARTIAL  = 16;
  /* Useful combinations of the above.  */
  const unsigned int VEC_ANY_SVE  = VEC_SVE_DATA | VEC_SVE_PRED;
  const unsigned int VEC_ANY_DATA = VEC_ADVSIMD | VEC_SVE_DATA;
*************** aarch64_classify_vector_mode (machine_mo
*** 1454,1487 ****
    if (aarch64_sve_pred_mode_p (mode))
      return VEC_SVE_PRED;
  
!   scalar_mode inner = GET_MODE_INNER (mode);
!   if (VECTOR_MODE_P (mode)
!       && (inner == QImode
! 	  || inner == HImode
! 	  || inner == HFmode
! 	  || inner == SImode
! 	  || inner == SFmode
! 	  || inner == DImode
! 	  || inner == DFmode))
      {
!       if (TARGET_SVE)
! 	{
! 	  if (known_eq (GET_MODE_BITSIZE (mode), BITS_PER_SVE_VECTOR))
! 	    return VEC_SVE_DATA;
! 	  if (known_eq (GET_MODE_BITSIZE (mode), BITS_PER_SVE_VECTOR * 2)
! 	      || known_eq (GET_MODE_BITSIZE (mode), BITS_PER_SVE_VECTOR * 3)
! 	      || known_eq (GET_MODE_BITSIZE (mode), BITS_PER_SVE_VECTOR * 4))
! 	    return VEC_SVE_DATA | VEC_STRUCT;
! 	}
  
!       /* This includes V1DF but not V1DI (which doesn't exist).  */
!       if (TARGET_SIMD
! 	  && (known_eq (GET_MODE_BITSIZE (mode), 64)
! 	      || known_eq (GET_MODE_BITSIZE (mode), 128)))
! 	return VEC_ADVSIMD;
!     }
  
!   return 0;
  }
  
  /* Return true if MODE is any of the data vector modes, including
--- 2096,2184 ----
    if (aarch64_sve_pred_mode_p (mode))
      return VEC_SVE_PRED;
  
!   /* Make the decision based on the mode's enum value rather than its
!      properties, so that we keep the correct classification regardless
!      of -msve-vector-bits.  */
!   switch (mode)
      {
!     /* Partial SVE QI vectors.  */
!     case E_VNx2QImode:
!     case E_VNx4QImode:
!     case E_VNx8QImode:
!     /* Partial SVE HI vectors.  */
!     case E_VNx2HImode:
!     case E_VNx4HImode:
!     /* Partial SVE SI vector.  */
!     case E_VNx2SImode:
!     /* Partial SVE HF vectors.  */
!     case E_VNx2HFmode:
!     case E_VNx4HFmode:
!     /* Partial SVE SF vector.  */
!     case E_VNx2SFmode:
!       return TARGET_SVE ? VEC_SVE_DATA | VEC_PARTIAL : 0;
  
!     case E_VNx16QImode:
!     case E_VNx8HImode:
!     case E_VNx4SImode:
!     case E_VNx2DImode:
!     case E_VNx8BFmode:
!     case E_VNx8HFmode:
!     case E_VNx4SFmode:
!     case E_VNx2DFmode:
!       return TARGET_SVE ? VEC_SVE_DATA : 0;
  
!     /* x2 SVE vectors.  */
!     case E_VNx32QImode:
!     case E_VNx16HImode:
!     case E_VNx8SImode:
!     case E_VNx4DImode:
!     case E_VNx16BFmode:
!     case E_VNx16HFmode:
!     case E_VNx8SFmode:
!     case E_VNx4DFmode:
!     /* x3 SVE vectors.  */
!     case E_VNx48QImode:
!     case E_VNx24HImode:
!     case E_VNx12SImode:
!     case E_VNx6DImode:
!     case E_VNx24BFmode:
!     case E_VNx24HFmode:
!     case E_VNx12SFmode:
!     case E_VNx6DFmode:
!     /* x4 SVE vectors.  */
!     case E_VNx64QImode:
!     case E_VNx32HImode:
!     case E_VNx16SImode:
!     case E_VNx8DImode:
!     case E_VNx32BFmode:
!     case E_VNx32HFmode:
!     case E_VNx16SFmode:
!     case E_VNx8DFmode:
!       return TARGET_SVE ? VEC_SVE_DATA | VEC_STRUCT : 0;
! 
!     /* 64-bit Advanced SIMD vectors.  */
!     case E_V8QImode:
!     case E_V4HImode:
!     case E_V2SImode:
!     /* ...E_V1DImode doesn't exist.  */
!     case E_V4HFmode:
!     case E_V4BFmode:
!     case E_V2SFmode:
!     case E_V1DFmode:
!     /* 128-bit Advanced SIMD vectors.  */
!     case E_V16QImode:
!     case E_V8HImode:
!     case E_V4SImode:
!     case E_V2DImode:
!     case E_V8HFmode:
!     case E_V8BFmode:
!     case E_V4SFmode:
!     case E_V2DFmode:
!       return TARGET_SIMD ? VEC_ADVSIMD : 0;
! 
!     default:
!       return 0;
!     }
  }
  
  /* Return true if MODE is any of the data vector modes, including
*************** aarch64_vector_data_mode_p (machine_mode
*** 1492,1497 ****
--- 2189,2202 ----
    return aarch64_classify_vector_mode (mode) & VEC_ANY_DATA;
  }
  
+ /* Return true if MODE is any form of SVE mode, including predicates,
+    vectors and structures.  */
+ bool
+ aarch64_sve_mode_p (machine_mode mode)
+ {
+   return aarch64_classify_vector_mode (mode) & VEC_ANY_SVE;
+ }
+ 
  /* Return true if MODE is an SVE data vector mode; either a single vector
     or a structure of vectors.  */
  static bool
*************** aarch64_sve_data_mode_p (machine_mode mo
*** 1500,1505 ****
--- 2205,2228 ----
    return aarch64_classify_vector_mode (mode) & VEC_SVE_DATA;
  }
  
+ /* Return the number of defined bytes in one constituent vector of
+    SVE mode MODE, which has vector flags VEC_FLAGS.  */
+ static poly_int64
+ aarch64_vl_bytes (machine_mode mode, unsigned int vec_flags)
+ {
+   if (vec_flags & VEC_PARTIAL)
+     /* A single partial vector.  */
+     return GET_MODE_SIZE (mode);
+ 
+   if (vec_flags & VEC_SVE_DATA)
+     /* A single vector or a tuple.  */
+     return BYTES_PER_SVE_VECTOR;
+ 
+   /* A single predicate.  */
+   gcc_assert (vec_flags & VEC_SVE_PRED);
+   return BYTES_PER_SVE_PRED;
+ }
+ 
  /* Implement target hook TARGET_ARRAY_MODE.  */
  static opt_machine_mode
  aarch64_array_mode (machine_mode mode, unsigned HOST_WIDE_INT nelems)
*************** aarch64_array_mode_supported_p (machine_
*** 1526,1531 ****
--- 2249,2270 ----
    return false;
  }
  
+ /* MODE is some form of SVE vector mode.  For data modes, return the number
+    of vector register bits that each element of MODE occupies, such as 64
+    for both VNx2DImode and VNx2SImode (where each 32-bit value is stored
+    in a 64-bit container).  For predicate modes, return the number of
+    data bits controlled by each significant predicate bit.  */
+ 
+ static unsigned int
+ aarch64_sve_container_bits (machine_mode mode)
+ {
+   unsigned int vec_flags = aarch64_classify_vector_mode (mode);
+   poly_uint64 vector_bits = (vec_flags & (VEC_PARTIAL | VEC_SVE_PRED)
+ 			     ? BITS_PER_SVE_VECTOR
+ 			     : GET_MODE_BITSIZE (mode));
+   return vector_element_size (vector_bits, GET_MODE_NUNITS (mode));
+ }
+ 
  /* Return the SVE predicate mode to use for elements that have
     ELEM_NBYTES bytes, if such a mode exists.  */
  
*************** aarch64_sve_pred_mode (unsigned int elem
*** 1546,1565 ****
    return opt_machine_mode ();
  }
  
  /* Implement TARGET_VECTORIZE_GET_MASK_MODE.  */
  
  static opt_machine_mode
! aarch64_get_mask_mode (poly_uint64 nunits, poly_uint64 nbytes)
  {
!   if (TARGET_SVE && known_eq (nbytes, BYTES_PER_SVE_VECTOR))
      {
!       unsigned int elem_nbytes = vector_element_size (nbytes, nunits);
!       machine_mode pred_mode;
!       if (aarch64_sve_pred_mode (elem_nbytes).exists (&pred_mode))
! 	return pred_mode;
      }
  
!   return default_get_mask_mode (nunits, nbytes);
  }
  
  /* Implement TARGET_PREFERRED_ELSE_VALUE.  For binary operations,
--- 2285,2416 ----
    return opt_machine_mode ();
  }
  
+ /* Return the SVE predicate mode that should be used to control
+    SVE mode MODE.  */
+ 
+ machine_mode
+ aarch64_sve_pred_mode (machine_mode mode)
+ {
+   unsigned int bits = aarch64_sve_container_bits (mode);
+   return aarch64_sve_pred_mode (bits / BITS_PER_UNIT).require ();
+ }
+ 
  /* Implement TARGET_VECTORIZE_GET_MASK_MODE.  */
  
  static opt_machine_mode
! aarch64_get_mask_mode (machine_mode mode)
  {
!   unsigned int vec_flags = aarch64_classify_vector_mode (mode);
!   if (vec_flags & VEC_SVE_DATA)
!     return aarch64_sve_pred_mode (mode);
! 
!   return default_get_mask_mode (mode);
! }
! 
! /* Return the SVE vector mode that has NUNITS elements of mode INNER_MODE.  */
! 
! opt_machine_mode
! aarch64_sve_data_mode (scalar_mode inner_mode, poly_uint64 nunits)
! {
!   enum mode_class mclass = (is_a <scalar_float_mode> (inner_mode)
! 			    ? MODE_VECTOR_FLOAT : MODE_VECTOR_INT);
!   machine_mode mode;
!   FOR_EACH_MODE_IN_CLASS (mode, mclass)
!     if (inner_mode == GET_MODE_INNER (mode)
! 	&& known_eq (nunits, GET_MODE_NUNITS (mode))
! 	&& aarch64_sve_data_mode_p (mode))
!       return mode;
!   return opt_machine_mode ();
! }
! 
! /* Return the integer element mode associated with SVE mode MODE.  */
! 
! static scalar_int_mode
! aarch64_sve_element_int_mode (machine_mode mode)
! {
!   poly_uint64 vector_bits = (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL
! 			     ? BITS_PER_SVE_VECTOR
! 			     : GET_MODE_BITSIZE (mode));
!   unsigned int elt_bits = vector_element_size (vector_bits,
! 					       GET_MODE_NUNITS (mode));
!   return int_mode_for_size (elt_bits, 0).require ();
! }
! 
! /* Return an integer element mode that contains exactly
!    aarch64_sve_container_bits (MODE) bits.  This is wider than
!    aarch64_sve_element_int_mode if MODE is a partial vector,
!    otherwise it's the same.  */
! 
! static scalar_int_mode
! aarch64_sve_container_int_mode (machine_mode mode)
! {
!   return int_mode_for_size (aarch64_sve_container_bits (mode), 0).require ();
! }
! 
! /* Return the integer vector mode associated with SVE mode MODE.
!    Unlike related_int_vector_mode, this can handle the case in which
!    MODE is a predicate (and thus has a different total size).  */
! 
! machine_mode
! aarch64_sve_int_mode (machine_mode mode)
! {
!   scalar_int_mode int_mode = aarch64_sve_element_int_mode (mode);
!   return aarch64_sve_data_mode (int_mode, GET_MODE_NUNITS (mode)).require ();
! }
! 
! /* Implement TARGET_VECTORIZE_RELATED_MODE.  */
! 
! static opt_machine_mode
! aarch64_vectorize_related_mode (machine_mode vector_mode,
! 				scalar_mode element_mode,
! 				poly_uint64 nunits)
! {
!   unsigned int vec_flags = aarch64_classify_vector_mode (vector_mode);
! 
!   /* If we're operating on SVE vectors, try to return an SVE mode.  */
!   poly_uint64 sve_nunits;
!   if ((vec_flags & VEC_SVE_DATA)
!       && multiple_p (BYTES_PER_SVE_VECTOR,
! 		     GET_MODE_SIZE (element_mode), &sve_nunits))
      {
!       machine_mode sve_mode;
!       if (maybe_ne (nunits, 0U))
! 	{
! 	  /* Try to find a full or partial SVE mode with exactly
! 	     NUNITS units.  */
! 	  if (multiple_p (sve_nunits, nunits)
! 	      && aarch64_sve_data_mode (element_mode,
! 					nunits).exists (&sve_mode))
! 	    return sve_mode;
! 	}
!       else
! 	{
! 	  /* Take the preferred number of units from the number of bytes
! 	     that fit in VECTOR_MODE.  We always start by "autodetecting"
! 	     a full vector mode with preferred_simd_mode, so vectors
! 	     chosen here will also be full vector modes.  Then
! 	     autovectorize_vector_modes tries smaller starting modes
! 	     and thus smaller preferred numbers of units.  */
! 	  sve_nunits = ordered_min (sve_nunits, GET_MODE_SIZE (vector_mode));
! 	  if (aarch64_sve_data_mode (element_mode,
! 				     sve_nunits).exists (&sve_mode))
! 	    return sve_mode;
! 	}
      }
  
!   /* Prefer to use 1 128-bit vector instead of 2 64-bit vectors.  */
!   if ((vec_flags & VEC_ADVSIMD)
!       && known_eq (nunits, 0U)
!       && known_eq (GET_MODE_BITSIZE (vector_mode), 64U)
!       && maybe_ge (GET_MODE_BITSIZE (element_mode)
! 		   * GET_MODE_NUNITS (vector_mode), 128U))
!     {
!       machine_mode res = aarch64_simd_container_mode (element_mode, 128);
!       if (VECTOR_MODE_P (res))
! 	return res;
!     }
! 
!   return default_vectorize_related_mode (vector_mode, element_mode, nunits);
  }
  
  /* Implement TARGET_PREFERRED_ELSE_VALUE.  For binary operations,
*************** aarch64_hard_regno_nregs (unsigned regno
*** 1590,1602 ****
      {
      case FP_REGS:
      case FP_LO_REGS:
!       if (aarch64_sve_data_mode_p (mode))
! 	return exact_div (GET_MODE_SIZE (mode),
! 			  BYTES_PER_SVE_VECTOR).to_constant ();
!       return CEIL (lowest_size, UNITS_PER_VREG);
      case PR_REGS:
      case PR_LO_REGS:
      case PR_HI_REGS:
        return 1;
      default:
        return CEIL (lowest_size, UNITS_PER_WORD);
--- 2441,2459 ----
      {
      case FP_REGS:
      case FP_LO_REGS:
!     case FP_LO8_REGS:
!       {
! 	unsigned int vec_flags = aarch64_classify_vector_mode (mode);
! 	if (vec_flags & VEC_SVE_DATA)
! 	  return exact_div (GET_MODE_SIZE (mode),
! 			    aarch64_vl_bytes (mode, vec_flags)).to_constant ();
! 	return CEIL (lowest_size, UNITS_PER_VREG);
!       }
      case PR_REGS:
      case PR_LO_REGS:
      case PR_HI_REGS:
+     case FFR_REGS:
+     case PR_AND_FFR_REGS:
        return 1;
      default:
        return CEIL (lowest_size, UNITS_PER_WORD);
*************** aarch64_hard_regno_mode_ok (unsigned reg
*** 1618,1627 ****
  
    unsigned int vec_flags = aarch64_classify_vector_mode (mode);
    if (vec_flags & VEC_SVE_PRED)
!     return PR_REGNUM_P (regno);
  
!   if (PR_REGNUM_P (regno))
!     return 0;
  
    if (regno == SP_REGNUM)
      /* The purpose of comparing with ptr_mode is to support the
--- 2475,2484 ----
  
    unsigned int vec_flags = aarch64_classify_vector_mode (mode);
    if (vec_flags & VEC_SVE_PRED)
!     return pr_or_ffr_regnum_p (regno);
  
!   if (pr_or_ffr_regnum_p (regno))
!     return false;
  
    if (regno == SP_REGNUM)
      /* The purpose of comparing with ptr_mode is to support the
*************** aarch64_hard_regno_mode_ok (unsigned reg
*** 1634,1642 ****
  
    if (GP_REGNUM_P (regno))
      {
        if (known_le (GET_MODE_SIZE (mode), 8))
  	return true;
!       else if (known_le (GET_MODE_SIZE (mode), 16))
  	return (regno & 1) == 0;
      }
    else if (FP_REGNUM_P (regno))
--- 2491,2501 ----
  
    if (GP_REGNUM_P (regno))
      {
+       if (vec_flags & VEC_ANY_SVE)
+ 	return false;
        if (known_le (GET_MODE_SIZE (mode), 8))
  	return true;
!       if (known_le (GET_MODE_SIZE (mode), 16))
  	return (regno & 1) == 0;
      }
    else if (FP_REGNUM_P (regno))
*************** aarch64_hard_regno_mode_ok (unsigned reg
*** 1650,1725 ****
    return false;
  }
  
! /* Return true if this is a definition of a vectorized simd function.  */
  
  static bool
! aarch64_simd_decl_p (tree fndecl)
  {
!   tree fntype;
  
!   if (fndecl == NULL)
!     return false;
!   fntype = TREE_TYPE (fndecl);
!   if (fntype == NULL)
!     return false;
  
!   /* Functions with the aarch64_vector_pcs attribute use the simd ABI.  */
!   if (lookup_attribute ("aarch64_vector_pcs", TYPE_ATTRIBUTES (fntype)) != NULL)
!     return true;
  
    return false;
  }
  
! /* Return the mode a register save/restore should use.  DImode for integer
!    registers, DFmode for FP registers in non-SIMD functions (they only save
!    the bottom half of a 128 bit register), or TFmode for FP registers in
!    SIMD functions.  */
  
! static machine_mode
! aarch64_reg_save_mode (tree fndecl, unsigned regno)
  {
!   return GP_REGNUM_P (regno)
! 	   ? E_DImode
! 	   : (aarch64_simd_decl_p (fndecl) ? E_TFmode : E_DFmode);
  }
  
! /* Return true if the instruction is a call to a SIMD function, false
!    if it is not a SIMD function or if we do not know anything about
!    the function.  */
  
  static bool
! aarch64_simd_call_p (rtx_insn *insn)
  {
!   rtx symbol;
!   rtx call;
!   tree fndecl;
  
!   gcc_assert (CALL_P (insn));
!   call = get_call_rtx_from (insn);
!   symbol = XEXP (XEXP (call, 0), 0);
!   if (GET_CODE (symbol) != SYMBOL_REF)
!     return false;
!   fndecl = SYMBOL_REF_DECL (symbol);
!   if (!fndecl)
!     return false;
  
!   return aarch64_simd_decl_p (fndecl);
  }
  
! /* Implement TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS.  If INSN calls
!    a function that uses the SIMD ABI, take advantage of the extra
!    call-preserved registers that the ABI provides.  */
  
! void
! aarch64_remove_extra_call_preserved_regs (rtx_insn *insn,
! 					  HARD_REG_SET *return_set)
  {
!   if (aarch64_simd_call_p (insn))
!     {
!       for (int regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
! 	if (FP_SIMD_SAVED_REGNUM_P (regno))
! 	  CLEAR_HARD_REG_BIT (*return_set, regno);
!     }
  }
  
  /* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED.  The callee only saves
--- 2509,2663 ----
    return false;
  }
  
! /* Return true if a function with type FNTYPE returns its value in
!    SVE vector or predicate registers.  */
  
  static bool
! aarch64_returns_value_in_sve_regs_p (const_tree fntype)
  {
!   tree return_type = TREE_TYPE (fntype);
  
!   pure_scalable_type_info pst_info;
!   switch (pst_info.analyze (return_type))
!     {
!     case pure_scalable_type_info::IS_PST:
!       return (pst_info.num_zr () <= NUM_FP_ARG_REGS
! 	      && pst_info.num_pr () <= NUM_PR_ARG_REGS);
  
!     case pure_scalable_type_info::DOESNT_MATTER:
!       gcc_assert (aarch64_return_in_memory_1 (return_type));
!       return false;
  
+     case pure_scalable_type_info::NO_ABI_IDENTITY:
+     case pure_scalable_type_info::ISNT_PST:
+       return false;
+     }
+   gcc_unreachable ();
+ }
+ 
+ /* Return true if a function with type FNTYPE takes arguments in
+    SVE vector or predicate registers.  */
+ 
+ static bool
+ aarch64_takes_arguments_in_sve_regs_p (const_tree fntype)
+ {
+   CUMULATIVE_ARGS args_so_far_v;
+   aarch64_init_cumulative_args (&args_so_far_v, NULL_TREE, NULL_RTX,
+ 				NULL_TREE, 0, true);
+   cumulative_args_t args_so_far = pack_cumulative_args (&args_so_far_v);
+ 
+   for (tree chain = TYPE_ARG_TYPES (fntype);
+        chain && chain != void_list_node;
+        chain = TREE_CHAIN (chain))
+     {
+       tree arg_type = TREE_VALUE (chain);
+       if (arg_type == error_mark_node)
+ 	return false;
+ 
+       function_arg_info arg (arg_type, /*named=*/true);
+       apply_pass_by_reference_rules (&args_so_far_v, arg);
+       pure_scalable_type_info pst_info;
+       if (pst_info.analyze_registers (arg.type))
+ 	{
+ 	  unsigned int end_zr = args_so_far_v.aapcs_nvrn + pst_info.num_zr ();
+ 	  unsigned int end_pr = args_so_far_v.aapcs_nprn + pst_info.num_pr ();
+ 	  gcc_assert (end_zr <= NUM_FP_ARG_REGS && end_pr <= NUM_PR_ARG_REGS);
+ 	  return true;
+ 	}
+ 
+       targetm.calls.function_arg_advance (args_so_far, arg);
+     }
    return false;
  }
  
! /* Implement TARGET_FNTYPE_ABI.  */
  
! static const predefined_function_abi &
! aarch64_fntype_abi (const_tree fntype)
  {
!   if (lookup_attribute ("aarch64_vector_pcs", TYPE_ATTRIBUTES (fntype)))
!     return aarch64_simd_abi ();
! 
!   if (aarch64_returns_value_in_sve_regs_p (fntype)
!       || aarch64_takes_arguments_in_sve_regs_p (fntype))
!     return aarch64_sve_abi ();
! 
!   return default_function_abi;
  }
  
! /* Implement TARGET_COMPATIBLE_VECTOR_TYPES_P.  */
  
  static bool
! aarch64_compatible_vector_types_p (const_tree type1, const_tree type2)
  {
!   return (aarch64_sve::builtin_type_p (type1)
! 	  == aarch64_sve::builtin_type_p (type2));
! }
  
! /* Return true if we should emit CFI for register REGNO.  */
  
! static bool
! aarch64_emit_cfi_for_reg_p (unsigned int regno)
! {
!   return (GP_REGNUM_P (regno)
! 	  || !default_function_abi.clobbers_full_reg_p (regno));
  }
  
! /* Return the mode we should use to save and restore register REGNO.  */
  
! static machine_mode
! aarch64_reg_save_mode (unsigned int regno)
  {
!   if (GP_REGNUM_P (regno))
!     return DImode;
! 
!   if (FP_REGNUM_P (regno))
!     switch (crtl->abi->id ())
!       {
!       case ARM_PCS_AAPCS64:
! 	/* Only the low 64 bits are saved by the base PCS.  */
! 	return DFmode;
! 
!       case ARM_PCS_SIMD:
! 	/* The vector PCS saves the low 128 bits (which is the full
! 	   register on non-SVE targets).  */
! 	return TFmode;
! 
!       case ARM_PCS_SVE:
! 	/* Use vectors of DImode for registers that need frame
! 	   information, so that the first 64 bytes of the save slot
! 	   are always the equivalent of what storing D<n> would give.  */
! 	if (aarch64_emit_cfi_for_reg_p (regno))
! 	  return VNx2DImode;
! 
! 	/* Use vectors of bytes otherwise, so that the layout is
! 	   endian-agnostic, and so that we can use LDR and STR for
! 	   big-endian targets.  */
! 	return VNx16QImode;
! 
!       case ARM_PCS_TLSDESC:
!       case ARM_PCS_UNKNOWN:
! 	break;
!       }
! 
!   if (PR_REGNUM_P (regno))
!     /* Save the full predicate register.  */
!     return VNx16BImode;
! 
!   gcc_unreachable ();
! }
! 
! /* Implement TARGET_INSN_CALLEE_ABI.  */
! 
! const predefined_function_abi &
! aarch64_insn_callee_abi (const rtx_insn *insn)
! {
!   rtx pat = PATTERN (insn);
!   gcc_assert (GET_CODE (pat) == PARALLEL);
!   rtx unspec = XVECEXP (pat, 0, 1);
!   gcc_assert (GET_CODE (unspec) == UNSPEC
! 	      && XINT (unspec, 1) == UNSPEC_CALLEE_ABI);
!   return function_abis[INTVAL (XVECEXP (unspec, 0, 0))];
  }
  
  /* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED.  The callee only saves
*************** aarch64_remove_extra_call_preserved_regs
*** 1727,1751 ****
     clobbers the top 64 bits when restoring the bottom 64 bits.  */
  
  static bool
! aarch64_hard_regno_call_part_clobbered (rtx_insn *insn, unsigned int regno,
  					machine_mode mode)
  {
!   bool simd_p = insn && CALL_P (insn) && aarch64_simd_call_p (insn);
!   return FP_REGNUM_P (regno)
! 	 && maybe_gt (GET_MODE_SIZE (mode), simd_p ? 16 : 8);
! }
! 
! /* Implement TARGET_RETURN_CALL_WITH_MAX_CLOBBERS.  */
! 
! rtx_insn *
! aarch64_return_call_with_max_clobbers (rtx_insn *call_1, rtx_insn *call_2)
! {
!   gcc_assert (CALL_P (call_1) && CALL_P (call_2));
! 
!   if (!aarch64_simd_call_p (call_1) || aarch64_simd_call_p (call_2))
!     return call_1;
!   else
!     return call_2;
  }
  
  /* Implement REGMODE_NATURAL_SIZE.  */
--- 2665,2685 ----
     clobbers the top 64 bits when restoring the bottom 64 bits.  */
  
  static bool
! aarch64_hard_regno_call_part_clobbered (unsigned int abi_id,
! 					unsigned int regno,
  					machine_mode mode)
  {
!   if (FP_REGNUM_P (regno) && abi_id != ARM_PCS_SVE)
!     {
!       poly_int64 per_register_size = GET_MODE_SIZE (mode);
!       unsigned int nregs = hard_regno_nregs (regno, mode);
!       if (nregs > 1)
! 	per_register_size = exact_div (per_register_size, nregs);
!       if (abi_id == ARM_PCS_SIMD || abi_id == ARM_PCS_TLSDESC)
! 	return maybe_gt (per_register_size, 16);
!       return maybe_gt (per_register_size, 8);
!     }
!   return false;
  }
  
  /* Implement REGMODE_NATURAL_SIZE.  */
*************** aarch64_is_noplt_call_p (rtx sym)
*** 1841,1847 ****
  
  /* Return true if the offsets to a zero/sign-extract operation
     represent an expression that matches an extend operation.  The
!    operands represent the paramters from
  
     (extract:MODE (mult (reg) (MULT_IMM)) (EXTRACT_IMM) (const_int 0)).  */
  bool
--- 2775,2781 ----
  
  /* Return true if the offsets to a zero/sign-extract operation
     represent an expression that matches an extend operation.  The
!    operands represent the parameters from
  
     (extract:MODE (mult (reg) (MULT_IMM)) (EXTRACT_IMM) (const_int 0)).  */
  bool
*************** emit_set_insn (rtx x, rtx y)
*** 1879,1888 ****
  rtx
  aarch64_gen_compare_reg (RTX_CODE code, rtx x, rtx y)
  {
!   machine_mode mode = SELECT_CC_MODE (code, x, y);
!   rtx cc_reg = gen_rtx_REG (mode, CC_REGNUM);
  
!   emit_set_insn (cc_reg, gen_rtx_COMPARE (mode, x, y));
    return cc_reg;
  }
  
--- 2813,2845 ----
  rtx
  aarch64_gen_compare_reg (RTX_CODE code, rtx x, rtx y)
  {
!   machine_mode cmp_mode = GET_MODE (x);
!   machine_mode cc_mode;
!   rtx cc_reg;
  
!   if (cmp_mode == TImode)
!     {
!       gcc_assert (code == NE);
! 
!       cc_mode = CCmode;
!       cc_reg = gen_rtx_REG (cc_mode, CC_REGNUM);
! 
!       rtx x_lo = operand_subword (x, 0, 0, TImode);
!       rtx y_lo = operand_subword (y, 0, 0, TImode);
!       emit_set_insn (cc_reg, gen_rtx_COMPARE (cc_mode, x_lo, y_lo));
! 
!       rtx x_hi = operand_subword (x, 1, 0, TImode);
!       rtx y_hi = operand_subword (y, 1, 0, TImode);
!       emit_insn (gen_ccmpccdi (cc_reg, cc_reg, x_hi, y_hi,
! 			       gen_rtx_EQ (cc_mode, cc_reg, const0_rtx),
! 			       GEN_INT (AARCH64_EQ)));
!     }
!   else
!     {
!       cc_mode = SELECT_CC_MODE (code, x, y);
!       cc_reg = gen_rtx_REG (cc_mode, CC_REGNUM);
!       emit_set_insn (cc_reg, gen_rtx_COMPARE (cc_mode, x, y));
!     }
    return cc_reg;
  }
  
*************** aarch64_gen_compare_reg_maybe_ze (RTX_CO
*** 1895,1901 ****
    if (y_mode == E_QImode || y_mode == E_HImode)
      {
        if (CONST_INT_P (y))
! 	y = GEN_INT (INTVAL (y) & GET_MODE_MASK (y_mode));
        else
  	{
  	  rtx t, cc_reg;
--- 2852,2861 ----
    if (y_mode == E_QImode || y_mode == E_HImode)
      {
        if (CONST_INT_P (y))
! 	{
! 	  y = GEN_INT (INTVAL (y) & GET_MODE_MASK (y_mode));
! 	  y_mode = SImode;
! 	}
        else
  	{
  	  rtx t, cc_reg;
*************** aarch64_load_symref_appropriately (rtx d
*** 2135,2145 ****
      case SYMBOL_SMALL_TLSGD:
        {
  	rtx_insn *insns;
! 	machine_mode mode = GET_MODE (dest);
! 	rtx result = gen_rtx_REG (mode, R0_REGNUM);
  
  	start_sequence ();
! 	if (TARGET_ILP32)
  	  aarch64_emit_call_insn (gen_tlsgd_small_si (result, imm));
  	else
  	  aarch64_emit_call_insn (gen_tlsgd_small_di (result, imm));
--- 3095,3110 ----
      case SYMBOL_SMALL_TLSGD:
        {
  	rtx_insn *insns;
! 	/* The return type of __tls_get_addr is the C pointer type
! 	   so use ptr_mode.  */
! 	rtx result = gen_rtx_REG (ptr_mode, R0_REGNUM);
! 	rtx tmp_reg = dest;
! 
! 	if (GET_MODE (dest) != ptr_mode)
! 	  tmp_reg = can_create_pseudo_p () ? gen_reg_rtx (ptr_mode) : result;
  
  	start_sequence ();
! 	if (ptr_mode == SImode)
  	  aarch64_emit_call_insn (gen_tlsgd_small_si (result, imm));
  	else
  	  aarch64_emit_call_insn (gen_tlsgd_small_di (result, imm));
*************** aarch64_load_symref_appropriately (rtx d
*** 2147,2153 ****
  	end_sequence ();
  
  	RTL_CONST_CALL_P (insns) = 1;
! 	emit_libcall_block (insns, dest, result, imm);
  	return;
        }
  
--- 3112,3122 ----
  	end_sequence ();
  
  	RTL_CONST_CALL_P (insns) = 1;
! 	emit_libcall_block (insns, tmp_reg, result, imm);
! 	/* Convert back to the mode of the dest adding a zero_extend
! 	   from SImode (ptr_mode) to DImode (Pmode). */
! 	if (dest != tmp_reg)
! 	  convert_move (dest, tmp_reg, true);
  	return;
        }
  
*************** aarch64_load_symref_appropriately (rtx d
*** 2254,2261 ****
        }
  
      case SYMBOL_TINY_GOT:
!       emit_insn (gen_ldr_got_tiny (dest, imm));
!       return;
  
      case SYMBOL_TINY_TLSIE:
        {
--- 3223,3243 ----
        }
  
      case SYMBOL_TINY_GOT:
!       {
! 	rtx insn;
! 	machine_mode mode = GET_MODE (dest);
! 
! 	if (mode == ptr_mode)
! 	  insn = gen_ldr_got_tiny (mode, dest, imm);
! 	else
! 	  {
! 	    gcc_assert (mode == Pmode);
! 	    insn = gen_ldr_got_tiny_sidi (dest, imm);
! 	  }
! 
! 	emit_insn (insn);
! 	return;
!       }
  
      case SYMBOL_TINY_TLSIE:
        {
*************** aarch64_zero_extend_const_eq (machine_mo
*** 2433,2439 ****
    gcc_assert (r != NULL);
    return rtx_equal_p (x, r);
  }
! 			      
  
  static rtx
  aarch64_force_temporary (machine_mode mode, rtx x, rtx value)
--- 3415,3450 ----
    gcc_assert (r != NULL);
    return rtx_equal_p (x, r);
  }
! 
! /* Return TARGET if it is nonnull and a register of mode MODE.
!    Otherwise, return a fresh register of mode MODE if we can,
!    or TARGET reinterpreted as MODE if we can't.  */
! 
! static rtx
! aarch64_target_reg (rtx target, machine_mode mode)
! {
!   if (target && REG_P (target) && GET_MODE (target) == mode)
!     return target;
!   if (!can_create_pseudo_p ())
!     {
!       gcc_assert (target);
!       return gen_lowpart (mode, target);
!     }
!   return gen_reg_rtx (mode);
! }
! 
! /* Return a register that contains the constant in BUILDER, given that
!    the constant is a legitimate move operand.  Use TARGET as the register
!    if it is nonnull and convenient.  */
! 
! static rtx
! aarch64_emit_set_immediate (rtx target, rtx_vector_builder &builder)
! {
!   rtx src = builder.build ();
!   target = aarch64_target_reg (target, GET_MODE (src));
!   emit_insn (gen_rtx_SET (target, src));
!   return target;
! }
  
  static rtx
  aarch64_force_temporary (machine_mode mode, rtx x, rtx value)
*************** aarch64_force_temporary (machine_mode mo
*** 2448,2453 ****
--- 3459,3805 ----
      }
  }
  
+ /* Return true if predicate value X is a constant in which every element
+    is a CONST_INT.  When returning true, describe X in BUILDER as a VNx16BI
+    value, i.e. as a predicate in which all bits are significant.  */
+ 
+ static bool
+ aarch64_get_sve_pred_bits (rtx_vector_builder &builder, rtx x)
+ {
+   if (GET_CODE (x) != CONST_VECTOR)
+     return false;
+ 
+   unsigned int factor = vector_element_size (GET_MODE_NUNITS (VNx16BImode),
+ 					     GET_MODE_NUNITS (GET_MODE (x)));
+   unsigned int npatterns = CONST_VECTOR_NPATTERNS (x) * factor;
+   unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (x);
+   builder.new_vector (VNx16BImode, npatterns, nelts_per_pattern);
+ 
+   unsigned int nelts = const_vector_encoded_nelts (x);
+   for (unsigned int i = 0; i < nelts; ++i)
+     {
+       rtx elt = CONST_VECTOR_ENCODED_ELT (x, i);
+       if (!CONST_INT_P (elt))
+ 	return false;
+ 
+       builder.quick_push (elt);
+       for (unsigned int j = 1; j < factor; ++j)
+ 	builder.quick_push (const0_rtx);
+     }
+   builder.finalize ();
+   return true;
+ }
+ 
+ /* BUILDER contains a predicate constant of mode VNx16BI.  Return the
+    widest predicate element size it can have (that is, the largest size
+    for which each element would still be 0 or 1).  */
+ 
+ unsigned int
+ aarch64_widest_sve_pred_elt_size (rtx_vector_builder &builder)
+ {
+   /* Start with the most optimistic assumption: that we only need
+      one bit per pattern.  This is what we will use if only the first
+      bit in each pattern is ever set.  */
+   unsigned int mask = GET_MODE_SIZE (DImode);
+   mask |= builder.npatterns ();
+ 
+   /* Look for set bits.  */
+   unsigned int nelts = builder.encoded_nelts ();
+   for (unsigned int i = 1; i < nelts; ++i)
+     if (INTVAL (builder.elt (i)) != 0)
+       {
+ 	if (i & 1)
+ 	  return 1;
+ 	mask |= i;
+       }
+   return mask & -mask;
+ }
+ 
+ /* If VNx16BImode rtx X is a canonical PTRUE for a predicate mode,
+    return that predicate mode, otherwise return opt_machine_mode ().  */
+ 
+ opt_machine_mode
+ aarch64_ptrue_all_mode (rtx x)
+ {
+   gcc_assert (GET_MODE (x) == VNx16BImode);
+   if (GET_CODE (x) != CONST_VECTOR
+       || !CONST_VECTOR_DUPLICATE_P (x)
+       || !CONST_INT_P (CONST_VECTOR_ENCODED_ELT (x, 0))
+       || INTVAL (CONST_VECTOR_ENCODED_ELT (x, 0)) == 0)
+     return opt_machine_mode ();
+ 
+   unsigned int nelts = const_vector_encoded_nelts (x);
+   for (unsigned int i = 1; i < nelts; ++i)
+     if (CONST_VECTOR_ENCODED_ELT (x, i) != const0_rtx)
+       return opt_machine_mode ();
+ 
+   return aarch64_sve_pred_mode (nelts);
+ }
+ 
+ /* BUILDER is a predicate constant of mode VNx16BI.  Consider the value
+    that the constant would have with predicate element size ELT_SIZE
+    (ignoring the upper bits in each element) and return:
+ 
+    * -1 if all bits are set
+    * N if the predicate has N leading set bits followed by all clear bits
+    * 0 if the predicate does not have any of these forms.  */
+ 
+ int
+ aarch64_partial_ptrue_length (rtx_vector_builder &builder,
+ 			      unsigned int elt_size)
+ {
+   /* If nelts_per_pattern is 3, we have set bits followed by clear bits
+      followed by set bits.  */
+   if (builder.nelts_per_pattern () == 3)
+     return 0;
+ 
+   /* Skip over leading set bits.  */
+   unsigned int nelts = builder.encoded_nelts ();
+   unsigned int i = 0;
+   for (; i < nelts; i += elt_size)
+     if (INTVAL (builder.elt (i)) == 0)
+       break;
+   unsigned int vl = i / elt_size;
+ 
+   /* Check for the all-true case.  */
+   if (i == nelts)
+     return -1;
+ 
+   /* If nelts_per_pattern is 1, then either VL is zero, or we have a
+      repeating pattern of set bits followed by clear bits.  */
+   if (builder.nelts_per_pattern () != 2)
+     return 0;
+ 
+   /* We have a "foreground" value and a duplicated "background" value.
+      If the background might repeat and the last set bit belongs to it,
+      we might have set bits followed by clear bits followed by set bits.  */
+   if (i > builder.npatterns () && maybe_ne (nelts, builder.full_nelts ()))
+     return 0;
+ 
+   /* Make sure that the rest are all clear.  */
+   for (; i < nelts; i += elt_size)
+     if (INTVAL (builder.elt (i)) != 0)
+       return 0;
+ 
+   return vl;
+ }
+ 
+ /* See if there is an svpattern that encodes an SVE predicate of mode
+    PRED_MODE in which the first VL bits are set and the rest are clear.
+    Return the pattern if so, otherwise return AARCH64_NUM_SVPATTERNS.
+    A VL of -1 indicates an all-true vector.  */
+ 
+ aarch64_svpattern
+ aarch64_svpattern_for_vl (machine_mode pred_mode, int vl)
+ {
+   if (vl < 0)
+     return AARCH64_SV_ALL;
+ 
+   if (maybe_gt (vl, GET_MODE_NUNITS (pred_mode)))
+     return AARCH64_NUM_SVPATTERNS;
+ 
+   if (vl >= 1 && vl <= 8)
+     return aarch64_svpattern (AARCH64_SV_VL1 + (vl - 1));
+ 
+   if (vl >= 16 && vl <= 256 && pow2p_hwi (vl))
+     return aarch64_svpattern (AARCH64_SV_VL16 + (exact_log2 (vl) - 4));
+ 
+   int max_vl;
+   if (GET_MODE_NUNITS (pred_mode).is_constant (&max_vl))
+     {
+       if (vl == (max_vl / 3) * 3)
+ 	return AARCH64_SV_MUL3;
+       /* These would only trigger for non-power-of-2 lengths.  */
+       if (vl == (max_vl & -4))
+ 	return AARCH64_SV_MUL4;
+       if (vl == (1 << floor_log2 (max_vl)))
+ 	return AARCH64_SV_POW2;
+       if (vl == max_vl)
+ 	return AARCH64_SV_ALL;
+     }
+   return AARCH64_NUM_SVPATTERNS;
+ }
+ 
+ /* Return a VNx16BImode constant in which every sequence of ELT_SIZE
+    bits has the lowest bit set and the upper bits clear.  This is the
+    VNx16BImode equivalent of a PTRUE for controlling elements of
+    ELT_SIZE bytes.  However, because the constant is VNx16BImode,
+    all bits are significant, even the upper zeros.  */
+ 
+ rtx
+ aarch64_ptrue_all (unsigned int elt_size)
+ {
+   rtx_vector_builder builder (VNx16BImode, elt_size, 1);
+   builder.quick_push (const1_rtx);
+   for (unsigned int i = 1; i < elt_size; ++i)
+     builder.quick_push (const0_rtx);
+   return builder.build ();
+ }
+ 
+ /* Return an all-true predicate register of mode MODE.  */
+ 
+ rtx
+ aarch64_ptrue_reg (machine_mode mode)
+ {
+   gcc_assert (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL);
+   rtx reg = force_reg (VNx16BImode, CONSTM1_RTX (VNx16BImode));
+   return gen_lowpart (mode, reg);
+ }
+ 
+ /* Return an all-false predicate register of mode MODE.  */
+ 
+ rtx
+ aarch64_pfalse_reg (machine_mode mode)
+ {
+   gcc_assert (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL);
+   rtx reg = force_reg (VNx16BImode, CONST0_RTX (VNx16BImode));
+   return gen_lowpart (mode, reg);
+ }
+ 
+ /* Return true if predicate PRED1[0] is true whenever predicate PRED2 is
+    true, or alternatively if we know that the operation predicated by
+    PRED1[0] is safe to perform whenever PRED2 is true.  PRED1[1] is a
+    aarch64_sve_gp_strictness operand that describes the operation
+    predicated by PRED1[0].  */
+ 
+ bool
+ aarch64_sve_pred_dominates_p (rtx *pred1, rtx pred2)
+ {
+   machine_mode mode = GET_MODE (pred2);
+   gcc_assert (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL
+ 	      && mode == GET_MODE (pred1[0])
+ 	      && aarch64_sve_gp_strictness (pred1[1], SImode));
+   return (pred1[0] == CONSTM1_RTX (mode)
+ 	  || INTVAL (pred1[1]) == SVE_RELAXED_GP
+ 	  || rtx_equal_p (pred1[0], pred2));
+ }
+ 
+ /* PRED1[0] is a PTEST predicate and PRED1[1] is an aarch64_sve_ptrue_flag
+    for it.  PRED2[0] is the predicate for the instruction whose result
+    is tested by the PTEST and PRED2[1] is again an aarch64_sve_ptrue_flag
+    for it.  Return true if we can prove that the two predicates are
+    equivalent for PTEST purposes; that is, if we can replace PRED2[0]
+    with PRED1[0] without changing behavior.  */
+ 
+ bool
+ aarch64_sve_same_pred_for_ptest_p (rtx *pred1, rtx *pred2)
+ {
+   machine_mode mode = GET_MODE (pred1[0]);
+   gcc_assert (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL
+ 	      && mode == GET_MODE (pred2[0])
+ 	      && aarch64_sve_ptrue_flag (pred1[1], SImode)
+ 	      && aarch64_sve_ptrue_flag (pred2[1], SImode));
+ 
+   bool ptrue1_p = (pred1[0] == CONSTM1_RTX (mode)
+ 		   || INTVAL (pred1[1]) == SVE_KNOWN_PTRUE);
+   bool ptrue2_p = (pred2[0] == CONSTM1_RTX (mode)
+ 		   || INTVAL (pred2[1]) == SVE_KNOWN_PTRUE);
+   return (ptrue1_p && ptrue2_p) || rtx_equal_p (pred1[0], pred2[0]);
+ }
+ 
+ /* Emit a comparison CMP between OP0 and OP1, both of which have mode
+    DATA_MODE, and return the result in a predicate of mode PRED_MODE.
+    Use TARGET as the target register if nonnull and convenient.  */
+ 
+ static rtx
+ aarch64_sve_emit_int_cmp (rtx target, machine_mode pred_mode, rtx_code cmp,
+ 			  machine_mode data_mode, rtx op1, rtx op2)
+ {
+   insn_code icode = code_for_aarch64_pred_cmp (cmp, data_mode);
+   expand_operand ops[5];
+   create_output_operand (&ops[0], target, pred_mode);
+   create_input_operand (&ops[1], CONSTM1_RTX (pred_mode), pred_mode);
+   create_integer_operand (&ops[2], SVE_KNOWN_PTRUE);
+   create_input_operand (&ops[3], op1, data_mode);
+   create_input_operand (&ops[4], op2, data_mode);
+   expand_insn (icode, 5, ops);
+   return ops[0].value;
+ }
+ 
+ /* Use a comparison to convert integer vector SRC into MODE, which is
+    the corresponding SVE predicate mode.  Use TARGET for the result
+    if it's nonnull and convenient.  */
+ 
+ rtx
+ aarch64_convert_sve_data_to_pred (rtx target, machine_mode mode, rtx src)
+ {
+   machine_mode src_mode = GET_MODE (src);
+   return aarch64_sve_emit_int_cmp (target, mode, NE, src_mode,
+ 				   src, CONST0_RTX (src_mode));
+ }
+ 
+ /* Return the assembly token for svprfop value PRFOP.  */
+ 
+ static const char *
+ svprfop_token (enum aarch64_svprfop prfop)
+ {
+   switch (prfop)
+     {
+ #define CASE(UPPER, LOWER, VALUE) case AARCH64_SV_##UPPER: return #LOWER;
+     AARCH64_FOR_SVPRFOP (CASE)
+ #undef CASE
+     case AARCH64_NUM_SVPRFOPS:
+       break;
+     }
+   gcc_unreachable ();
+ }
+ 
+ /* Return the assembly string for an SVE prefetch operation with
+    mnemonic MNEMONIC, given that PRFOP_RTX is the prefetch operation
+    and that SUFFIX is the format for the remaining operands.  */
+ 
+ char *
+ aarch64_output_sve_prefetch (const char *mnemonic, rtx prfop_rtx,
+ 			     const char *suffix)
+ {
+   static char buffer[128];
+   aarch64_svprfop prfop = (aarch64_svprfop) INTVAL (prfop_rtx);
+   unsigned int written = snprintf (buffer, sizeof (buffer), "%s\t%s, %s",
+ 				   mnemonic, svprfop_token (prfop), suffix);
+   gcc_assert (written < sizeof (buffer));
+   return buffer;
+ }
+ 
+ /* Check whether we can calculate the number of elements in PATTERN
+    at compile time, given that there are NELTS_PER_VQ elements per
+    128-bit block.  Return the value if so, otherwise return -1.  */
+ 
+ HOST_WIDE_INT
+ aarch64_fold_sve_cnt_pat (aarch64_svpattern pattern, unsigned int nelts_per_vq)
+ {
+   unsigned int vl, const_vg;
+   if (pattern >= AARCH64_SV_VL1 && pattern <= AARCH64_SV_VL8)
+     vl = 1 + (pattern - AARCH64_SV_VL1);
+   else if (pattern >= AARCH64_SV_VL16 && pattern <= AARCH64_SV_VL256)
+     vl = 16 << (pattern - AARCH64_SV_VL16);
+   else if (aarch64_sve_vg.is_constant (&const_vg))
+     {
+       /* There are two vector granules per quadword.  */
+       unsigned int nelts = (const_vg / 2) * nelts_per_vq;
+       switch (pattern)
+ 	{
+ 	case AARCH64_SV_POW2: return 1 << floor_log2 (nelts);
+ 	case AARCH64_SV_MUL4: return nelts & -4;
+ 	case AARCH64_SV_MUL3: return (nelts / 3) * 3;
+ 	case AARCH64_SV_ALL: return nelts;
+ 	default: gcc_unreachable ();
+ 	}
+     }
+   else
+     return -1;
+ 
+   /* There are two vector granules per quadword.  */
+   poly_uint64 nelts_all = exact_div (aarch64_sve_vg, 2) * nelts_per_vq;
+   if (known_le (vl, nelts_all))
+     return vl;
+ 
+   /* Requesting more elements than are available results in a PFALSE.  */
+   if (known_gt (vl, nelts_all))
+     return 0;
+ 
+   return -1;
+ }
+ 
  /* Return true if we can move VALUE into a register using a single
     CNT[BHWD] instruction.  */
  
*************** aarch64_sve_cnt_immediate_p (rtx x)
*** 2475,2490 ****
     operand (a vector pattern followed by a multiplier in the range [1, 16]).
     PREFIX is the mnemonic without the size suffix and OPERANDS is the
     first part of the operands template (the part that comes before the
!    vector size itself).  FACTOR is the number of quadwords.
!    NELTS_PER_VQ, if nonzero, is the number of elements in each quadword.
!    If it is zero, we can use any element size.  */
  
  static char *
  aarch64_output_sve_cnt_immediate (const char *prefix, const char *operands,
  				  unsigned int factor,
  				  unsigned int nelts_per_vq)
  {
!   static char buffer[sizeof ("sqincd\t%x0, %w0, all, mul #16")];
  
    if (nelts_per_vq == 0)
      /* There is some overlap in the ranges of the four CNT instructions.
--- 3827,3843 ----
     operand (a vector pattern followed by a multiplier in the range [1, 16]).
     PREFIX is the mnemonic without the size suffix and OPERANDS is the
     first part of the operands template (the part that comes before the
!    vector size itself).  PATTERN is the pattern to use.  FACTOR is the
!    number of quadwords.  NELTS_PER_VQ, if nonzero, is the number of elements
!    in each quadword.  If it is zero, we can use any element size.  */
  
  static char *
  aarch64_output_sve_cnt_immediate (const char *prefix, const char *operands,
+ 				  aarch64_svpattern pattern,
  				  unsigned int factor,
  				  unsigned int nelts_per_vq)
  {
!   static char buffer[sizeof ("sqincd\t%x0, %w0, vl256, mul #16")];
  
    if (nelts_per_vq == 0)
      /* There is some overlap in the ranges of the four CNT instructions.
*************** aarch64_output_sve_cnt_immediate (const
*** 2497,2508 ****
  
    factor >>= shift;
    unsigned int written;
!   if (factor == 1)
      written = snprintf (buffer, sizeof (buffer), "%s%c\t%s",
  			prefix, suffix, operands);
    else
!     written = snprintf (buffer, sizeof (buffer), "%s%c\t%s, all, mul #%d",
! 			prefix, suffix, operands, factor);
    gcc_assert (written < sizeof (buffer));
    return buffer;
  }
--- 3850,3865 ----
  
    factor >>= shift;
    unsigned int written;
!   if (pattern == AARCH64_SV_ALL && factor == 1)
      written = snprintf (buffer, sizeof (buffer), "%s%c\t%s",
  			prefix, suffix, operands);
+   else if (factor == 1)
+     written = snprintf (buffer, sizeof (buffer), "%s%c\t%s, %s",
+ 			prefix, suffix, operands, svpattern_token (pattern));
    else
!     written = snprintf (buffer, sizeof (buffer), "%s%c\t%s, %s, mul #%d",
! 			prefix, suffix, operands, svpattern_token (pattern),
! 			factor);
    gcc_assert (written < sizeof (buffer));
    return buffer;
  }
*************** aarch64_output_sve_cnt_immediate (const
*** 2512,2518 ****
     PREFIX is the mnemonic without the size suffix and OPERANDS is the
     first part of the operands template (the part that comes before the
     vector size itself).  X is the value of the vector size operand,
!    as a polynomial integer rtx.  */
  
  char *
  aarch64_output_sve_cnt_immediate (const char *prefix, const char *operands,
--- 3869,3876 ----
     PREFIX is the mnemonic without the size suffix and OPERANDS is the
     first part of the operands template (the part that comes before the
     vector size itself).  X is the value of the vector size operand,
!    as a polynomial integer rtx; we need to convert this into an "all"
!    pattern with a multiplier.  */
  
  char *
  aarch64_output_sve_cnt_immediate (const char *prefix, const char *operands,
*************** aarch64_output_sve_cnt_immediate (const
*** 2520,2529 ****
  {
    poly_int64 value = rtx_to_poly_int64 (x);
    gcc_assert (aarch64_sve_cnt_immediate_p (value));
!   return aarch64_output_sve_cnt_immediate (prefix, operands,
  					   value.coeffs[1], 0);
  }
  
  /* Return true if we can add VALUE to a register using a single ADDVL
     or ADDPL instruction.  */
  
--- 3878,3932 ----
  {
    poly_int64 value = rtx_to_poly_int64 (x);
    gcc_assert (aarch64_sve_cnt_immediate_p (value));
!   return aarch64_output_sve_cnt_immediate (prefix, operands, AARCH64_SV_ALL,
  					   value.coeffs[1], 0);
  }
  
+ /* Return the asm string for an instruction with a CNT-like vector size
+    operand (a vector pattern followed by a multiplier in the range [1, 16]).
+    PREFIX is the mnemonic without the size suffix and OPERANDS is the
+    first part of the operands template (the part that comes before the
+    vector size itself).  CNT_PAT[0..2] are the operands of the
+    UNSPEC_SVE_CNT_PAT; see aarch64_sve_cnt_pat for details.  */
+ 
+ char *
+ aarch64_output_sve_cnt_pat_immediate (const char *prefix,
+ 				      const char *operands, rtx *cnt_pat)
+ {
+   aarch64_svpattern pattern = (aarch64_svpattern) INTVAL (cnt_pat[0]);
+   unsigned int nelts_per_vq = INTVAL (cnt_pat[1]);
+   unsigned int factor = INTVAL (cnt_pat[2]) * nelts_per_vq;
+   return aarch64_output_sve_cnt_immediate (prefix, operands, pattern,
+ 					   factor, nelts_per_vq);
+ }
+ 
+ /* Return true if we can add X using a single SVE INC or DEC instruction.  */
+ 
+ bool
+ aarch64_sve_scalar_inc_dec_immediate_p (rtx x)
+ {
+   poly_int64 value;
+   return (poly_int_rtx_p (x, &value)
+ 	  && (aarch64_sve_cnt_immediate_p (value)
+ 	      || aarch64_sve_cnt_immediate_p (-value)));
+ }
+ 
+ /* Return the asm string for adding SVE INC/DEC immediate OFFSET to
+    operand 0.  */
+ 
+ char *
+ aarch64_output_sve_scalar_inc_dec (rtx offset)
+ {
+   poly_int64 offset_value = rtx_to_poly_int64 (offset);
+   gcc_assert (offset_value.coeffs[0] == offset_value.coeffs[1]);
+   if (offset_value.coeffs[1] > 0)
+     return aarch64_output_sve_cnt_immediate ("inc", "%x0", AARCH64_SV_ALL,
+ 					     offset_value.coeffs[1], 0);
+   else
+     return aarch64_output_sve_cnt_immediate ("dec", "%x0", AARCH64_SV_ALL,
+ 					     -offset_value.coeffs[1], 0);
+ }
+ 
  /* Return true if we can add VALUE to a register using a single ADDVL
     or ADDPL instruction.  */
  
*************** aarch64_sve_addvl_addpl_immediate_p (rtx
*** 2549,2575 ****
  	  && aarch64_sve_addvl_addpl_immediate_p (value));
  }
  
! /* Return the asm string for adding ADDVL or ADDPL immediate X to operand 1
!    and storing the result in operand 0.  */
  
  char *
! aarch64_output_sve_addvl_addpl (rtx dest, rtx base, rtx offset)
  {
    static char buffer[sizeof ("addpl\t%x0, %x1, #-") + 3 * sizeof (int)];
    poly_int64 offset_value = rtx_to_poly_int64 (offset);
    gcc_assert (aarch64_sve_addvl_addpl_immediate_p (offset_value));
  
-   /* Use INC or DEC if possible.  */
-   if (rtx_equal_p (dest, base) && GP_REGNUM_P (REGNO (dest)))
-     {
-       if (aarch64_sve_cnt_immediate_p (offset_value))
- 	return aarch64_output_sve_cnt_immediate ("inc", "%x0",
- 						 offset_value.coeffs[1], 0);
-       if (aarch64_sve_cnt_immediate_p (-offset_value))
- 	return aarch64_output_sve_cnt_immediate ("dec", "%x0",
- 						 -offset_value.coeffs[1], 0);
-     }
- 
    int factor = offset_value.coeffs[1];
    if ((factor & 15) == 0)
      snprintf (buffer, sizeof (buffer), "addvl\t%%x0, %%x1, #%d", factor / 16);
--- 3952,3967 ----
  	  && aarch64_sve_addvl_addpl_immediate_p (value));
  }
  
! /* Return the asm string for adding ADDVL or ADDPL immediate OFFSET
!    to operand 1 and storing the result in operand 0.  */
  
  char *
! aarch64_output_sve_addvl_addpl (rtx offset)
  {
    static char buffer[sizeof ("addpl\t%x0, %x1, #-") + 3 * sizeof (int)];
    poly_int64 offset_value = rtx_to_poly_int64 (offset);
    gcc_assert (aarch64_sve_addvl_addpl_immediate_p (offset_value));
  
    int factor = offset_value.coeffs[1];
    if ((factor & 15) == 0)
      snprintf (buffer, sizeof (buffer), "addvl\t%%x0, %%x1, #%d", factor / 16);
*************** aarch64_output_sve_addvl_addpl (rtx dest
*** 2584,2591 ****
     factor in *FACTOR_OUT (if nonnull).  */
  
  bool
! aarch64_sve_inc_dec_immediate_p (rtx x, int *factor_out,
! 				 unsigned int *nelts_per_vq_out)
  {
    rtx elt;
    poly_int64 value;
--- 3976,3983 ----
     factor in *FACTOR_OUT (if nonnull).  */
  
  bool
! aarch64_sve_vector_inc_dec_immediate_p (rtx x, int *factor_out,
! 					unsigned int *nelts_per_vq_out)
  {
    rtx elt;
    poly_int64 value;
*************** aarch64_sve_inc_dec_immediate_p (rtx x,
*** 2619,2627 ****
     instruction.  */
  
  bool
! aarch64_sve_inc_dec_immediate_p (rtx x)
  {
!   return aarch64_sve_inc_dec_immediate_p (x, NULL, NULL);
  }
  
  /* Return the asm template for an SVE vector INC or DEC instruction.
--- 4011,4019 ----
     instruction.  */
  
  bool
! aarch64_sve_vector_inc_dec_immediate_p (rtx x)
  {
!   return aarch64_sve_vector_inc_dec_immediate_p (x, NULL, NULL);
  }
  
  /* Return the asm template for an SVE vector INC or DEC instruction.
*************** aarch64_sve_inc_dec_immediate_p (rtx x)
*** 2629,2646 ****
     value of the vector count operand itself.  */
  
  char *
! aarch64_output_sve_inc_dec_immediate (const char *operands, rtx x)
  {
    int factor;
    unsigned int nelts_per_vq;
!   if (!aarch64_sve_inc_dec_immediate_p (x, &factor, &nelts_per_vq))
      gcc_unreachable ();
    if (factor < 0)
!     return aarch64_output_sve_cnt_immediate ("dec", operands, -factor,
! 					     nelts_per_vq);
    else
!     return aarch64_output_sve_cnt_immediate ("inc", operands, factor,
! 					     nelts_per_vq);
  }
  
  static int
--- 4021,4038 ----
     value of the vector count operand itself.  */
  
  char *
! aarch64_output_sve_vector_inc_dec (const char *operands, rtx x)
  {
    int factor;
    unsigned int nelts_per_vq;
!   if (!aarch64_sve_vector_inc_dec_immediate_p (x, &factor, &nelts_per_vq))
      gcc_unreachable ();
    if (factor < 0)
!     return aarch64_output_sve_cnt_immediate ("dec", operands, AARCH64_SV_ALL,
! 					     -factor, nelts_per_vq);
    else
!     return aarch64_output_sve_cnt_immediate ("inc", operands, AARCH64_SV_ALL,
! 					     factor, nelts_per_vq);
  }
  
  static int
*************** aarch64_add_offset_1 (scalar_int_mode mo
*** 2818,2824 ****
    gcc_assert (emit_move_imm || temp1 != NULL_RTX);
    gcc_assert (temp1 == NULL_RTX || !reg_overlap_mentioned_p (temp1, src));
  
!   HOST_WIDE_INT moffset = abs_hwi (offset);
    rtx_insn *insn;
  
    if (!moffset)
--- 4210,4216 ----
    gcc_assert (emit_move_imm || temp1 != NULL_RTX);
    gcc_assert (temp1 == NULL_RTX || !reg_overlap_mentioned_p (temp1, src));
  
!   unsigned HOST_WIDE_INT moffset = absu_hwi (offset);
    rtx_insn *insn;
  
    if (!moffset)
*************** aarch64_add_offset_1 (scalar_int_mode mo
*** 2862,2868 ****
    if (emit_move_imm)
      {
        gcc_assert (temp1 != NULL_RTX || can_create_pseudo_p ());
!       temp1 = aarch64_force_temporary (mode, temp1, GEN_INT (moffset));
      }
    insn = emit_insn (offset < 0
  		    ? gen_sub3_insn (dest, src, temp1)
--- 4254,4261 ----
    if (emit_move_imm)
      {
        gcc_assert (temp1 != NULL_RTX || can_create_pseudo_p ());
!       temp1 = aarch64_force_temporary (mode, temp1,
! 				       gen_int_mode (moffset, mode));
      }
    insn = emit_insn (offset < 0
  		    ? gen_sub3_insn (dest, src, temp1)
*************** aarch64_add_offset (scalar_int_mode mode
*** 3023,3042 ****
  	}
        else
  	{
! 	  /* Use CNTD, then multiply it by FACTOR.  */
! 	  val = gen_int_mode (poly_int64 (2, 2), mode);
  	  val = aarch64_force_temporary (mode, temp1, val);
  
! 	  /* Go back to using a negative multiplication factor if we have
! 	     no register from which to subtract.  */
! 	  if (code == MINUS && src == const0_rtx)
  	    {
! 	      factor = -factor;
! 	      code = PLUS;
  	    }
- 	  rtx coeff1 = gen_int_mode (factor, mode);
- 	  coeff1 = aarch64_force_temporary (mode, temp2, coeff1);
- 	  val = gen_rtx_MULT (mode, val, coeff1);
  	}
  
        if (shift > 0)
--- 4416,4451 ----
  	}
        else
  	{
! 	  /* Base the factor on LOW_BIT if we can calculate LOW_BIT
! 	     directly, since that should increase the chances of being
! 	     able to use a shift and add sequence.  If LOW_BIT itself
! 	     is out of range, just use CNTD.  */
! 	  if (low_bit <= 16 * 8)
! 	    factor /= low_bit;
! 	  else
! 	    low_bit = 1;
! 
! 	  val = gen_int_mode (poly_int64 (low_bit * 2, low_bit * 2), mode);
  	  val = aarch64_force_temporary (mode, temp1, val);
  
! 	  if (can_create_pseudo_p ())
  	    {
! 	      rtx coeff1 = gen_int_mode (factor, mode);
! 	      val = expand_mult (mode, val, coeff1, NULL_RTX, false, true);
! 	    }
! 	  else
! 	    {
! 	      /* Go back to using a negative multiplication factor if we have
! 		 no register from which to subtract.  */
! 	      if (code == MINUS && src == const0_rtx)
! 		{
! 		  factor = -factor;
! 		  code = PLUS;
! 		}
! 	      rtx coeff1 = gen_int_mode (factor, mode);
! 	      coeff1 = aarch64_force_temporary (mode, temp2, coeff1);
! 	      val = gen_rtx_MULT (mode, val, coeff1);
  	    }
  	}
  
        if (shift > 0)
*************** aarch64_expand_vec_series (rtx dest, rtx
*** 3143,3223 ****
    emit_set_insn (dest, gen_rtx_VEC_SERIES (mode, base, step));
  }
  
! /* Try to duplicate SRC into SVE register DEST, given that SRC is an
!    integer of mode INT_MODE.  Return true on success.  */
  
! static bool
! aarch64_expand_sve_widened_duplicate (rtx dest, scalar_int_mode src_mode,
! 				      rtx src)
  {
!   /* If the constant is smaller than 128 bits, we can do the move
!      using a vector of SRC_MODEs.  */
!   if (src_mode != TImode)
      {
!       poly_uint64 count = exact_div (GET_MODE_SIZE (GET_MODE (dest)),
! 				     GET_MODE_SIZE (src_mode));
!       machine_mode dup_mode = mode_for_vector (src_mode, count).require ();
!       emit_move_insn (gen_lowpart (dup_mode, dest),
! 		      gen_const_vec_duplicate (dup_mode, src));
!       return true;
      }
  
!   /* Use LD1RQ[BHWD] to load the 128 bits from memory.  */
!   src = force_const_mem (src_mode, src);
    if (!src)
      return false;
  
    /* Make sure that the address is legitimate.  */
!   if (!aarch64_sve_ld1r_operand_p (src))
      {
        rtx addr = force_reg (Pmode, XEXP (src, 0));
        src = replace_equiv_address (src, addr);
      }
  
    machine_mode mode = GET_MODE (dest);
!   unsigned int elem_bytes = GET_MODE_UNIT_SIZE (mode);
!   machine_mode pred_mode = aarch64_sve_pred_mode (elem_bytes).require ();
!   rtx ptrue = force_reg (pred_mode, CONSTM1_RTX (pred_mode));
!   src = gen_rtx_UNSPEC (mode, gen_rtvec (2, ptrue, src), UNSPEC_LD1RQ);
!   emit_insn (gen_rtx_SET (dest, src));
    return true;
  }
  
! /* Expand a move of general CONST_VECTOR SRC into DEST, given that it
!    isn't a simple duplicate or series.  */
  
! static void
! aarch64_expand_sve_const_vector (rtx dest, rtx src)
  {
    machine_mode mode = GET_MODE (src);
    unsigned int npatterns = CONST_VECTOR_NPATTERNS (src);
    unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (src);
!   gcc_assert (npatterns > 1);
  
!   if (nelts_per_pattern == 1)
      {
!       /* The constant is a repeating seqeuence of at least two elements,
! 	 where the repeating elements occupy no more than 128 bits.
! 	 Get an integer representation of the replicated value.  */
!       scalar_int_mode int_mode;
!       if (BYTES_BIG_ENDIAN)
! 	/* For now, always use LD1RQ to load the value on big-endian
! 	   targets, since the handling of smaller integers includes a
! 	   subreg that is semantically an element reverse.  */
! 	int_mode = TImode;
!       else
  	{
! 	  unsigned int int_bits = GET_MODE_UNIT_BITSIZE (mode) * npatterns;
! 	  gcc_assert (int_bits <= 128);
! 	  int_mode = int_mode_for_size (int_bits, 0).require ();
  	}
-       rtx int_value = simplify_gen_subreg (int_mode, src, mode, 0);
-       if (int_value
- 	  && aarch64_expand_sve_widened_duplicate (dest, int_mode, int_value))
- 	return;
      }
  
    /* Expand each pattern individually.  */
    rtx_vector_builder builder;
    auto_vec<rtx, 16> vectors (npatterns);
    for (unsigned int i = 0; i < npatterns; ++i)
--- 4552,4754 ----
    emit_set_insn (dest, gen_rtx_VEC_SERIES (mode, base, step));
  }
  
! /* Duplicate 128-bit Advanced SIMD vector SRC so that it fills an SVE
!    register of mode MODE.  Use TARGET for the result if it's nonnull
!    and convenient.
  
!    The two vector modes must have the same element mode.  The behavior
!    is to duplicate architectural lane N of SRC into architectural lanes
!    N + I * STEP of the result.  On big-endian targets, architectural
!    lane 0 of an Advanced SIMD vector is the last element of the vector
!    in memory layout, so for big-endian targets this operation has the
!    effect of reversing SRC before duplicating it.  Callers need to
!    account for this.  */
! 
! rtx
! aarch64_expand_sve_dupq (rtx target, machine_mode mode, rtx src)
  {
!   machine_mode src_mode = GET_MODE (src);
!   gcc_assert (GET_MODE_INNER (mode) == GET_MODE_INNER (src_mode));
!   insn_code icode = (BYTES_BIG_ENDIAN
! 		     ? code_for_aarch64_vec_duplicate_vq_be (mode)
! 		     : code_for_aarch64_vec_duplicate_vq_le (mode));
! 
!   unsigned int i = 0;
!   expand_operand ops[3];
!   create_output_operand (&ops[i++], target, mode);
!   create_output_operand (&ops[i++], src, src_mode);
!   if (BYTES_BIG_ENDIAN)
      {
!       /* Create a PARALLEL describing the reversal of SRC.  */
!       unsigned int nelts_per_vq = 128 / GET_MODE_UNIT_BITSIZE (mode);
!       rtx sel = aarch64_gen_stepped_int_parallel (nelts_per_vq,
! 						  nelts_per_vq - 1, -1);
!       create_fixed_operand (&ops[i++], sel);
      }
+   expand_insn (icode, i, ops);
+   return ops[0].value;
+ }
  
! /* Try to force 128-bit vector value SRC into memory and use LD1RQ to fetch
!    the memory image into DEST.  Return true on success.  */
! 
! static bool
! aarch64_expand_sve_ld1rq (rtx dest, rtx src)
! {
!   src = force_const_mem (GET_MODE (src), src);
    if (!src)
      return false;
  
    /* Make sure that the address is legitimate.  */
!   if (!aarch64_sve_ld1rq_operand_p (src))
      {
        rtx addr = force_reg (Pmode, XEXP (src, 0));
        src = replace_equiv_address (src, addr);
      }
  
    machine_mode mode = GET_MODE (dest);
!   machine_mode pred_mode = aarch64_sve_pred_mode (mode);
!   rtx ptrue = aarch64_ptrue_reg (pred_mode);
!   emit_insn (gen_aarch64_sve_ld1rq (mode, dest, src, ptrue));
    return true;
  }
  
! /* Return a register containing CONST_VECTOR SRC, given that SRC has an
!    SVE data mode and isn't a legitimate constant.  Use TARGET for the
!    result if convenient.
  
!    The returned register can have whatever mode seems most natural
!    given the contents of SRC.  */
! 
! static rtx
! aarch64_expand_sve_const_vector (rtx target, rtx src)
  {
    machine_mode mode = GET_MODE (src);
    unsigned int npatterns = CONST_VECTOR_NPATTERNS (src);
    unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (src);
!   scalar_mode elt_mode = GET_MODE_INNER (mode);
!   unsigned int elt_bits = GET_MODE_BITSIZE (elt_mode);
!   unsigned int container_bits = aarch64_sve_container_bits (mode);
!   unsigned int encoded_bits = npatterns * nelts_per_pattern * container_bits;
  
!   if (nelts_per_pattern == 1
!       && encoded_bits <= 128
!       && container_bits != elt_bits)
      {
!       /* We have a partial vector mode and a constant whose full-vector
! 	 equivalent would occupy a repeating 128-bit sequence.  Build that
! 	 full-vector equivalent instead, so that we have the option of
! 	 using LD1RQ and Advanced SIMD operations.  */
!       unsigned int repeat = container_bits / elt_bits;
!       machine_mode full_mode = aarch64_full_sve_mode (elt_mode).require ();
!       rtx_vector_builder builder (full_mode, npatterns * repeat, 1);
!       for (unsigned int i = 0; i < npatterns; ++i)
! 	for (unsigned int j = 0; j < repeat; ++j)
! 	  builder.quick_push (CONST_VECTOR_ENCODED_ELT (src, i));
!       target = aarch64_target_reg (target, full_mode);
!       return aarch64_expand_sve_const_vector (target, builder.build ());
!     }
! 
!   if (nelts_per_pattern == 1 && encoded_bits == 128)
!     {
!       /* The constant is a duplicated quadword but can't be narrowed
! 	 beyond a quadword.  Get the memory image of the first quadword
! 	 as a 128-bit vector and try using LD1RQ to load it from memory.
! 
! 	 The effect for both endiannesses is to load memory lane N into
! 	 architectural lanes N + I * STEP of the result.  On big-endian
! 	 targets, the layout of the 128-bit vector in an Advanced SIMD
! 	 register would be different from its layout in an SVE register,
! 	 but this 128-bit vector is a memory value only.  */
!       machine_mode vq_mode = aarch64_vq_mode (elt_mode).require ();
!       rtx vq_value = simplify_gen_subreg (vq_mode, src, mode, 0);
!       if (vq_value && aarch64_expand_sve_ld1rq (target, vq_value))
! 	return target;
!     }
! 
!   if (nelts_per_pattern == 1 && encoded_bits < 128)
!     {
!       /* The vector is a repeating sequence of 64 bits or fewer.
! 	 See if we can load them using an Advanced SIMD move and then
! 	 duplicate it to fill a vector.  This is better than using a GPR
! 	 move because it keeps everything in the same register file.  */
!       machine_mode vq_mode = aarch64_vq_mode (elt_mode).require ();
!       rtx_vector_builder builder (vq_mode, npatterns, 1);
!       for (unsigned int i = 0; i < npatterns; ++i)
  	{
! 	  /* We want memory lane N to go into architectural lane N,
! 	     so reverse for big-endian targets.  The DUP .Q pattern
! 	     has a compensating reverse built-in.  */
! 	  unsigned int srci = BYTES_BIG_ENDIAN ? npatterns - i - 1 : i;
! 	  builder.quick_push (CONST_VECTOR_ENCODED_ELT (src, srci));
! 	}
!       rtx vq_src = builder.build ();
!       if (aarch64_simd_valid_immediate (vq_src, NULL))
! 	{
! 	  vq_src = force_reg (vq_mode, vq_src);
! 	  return aarch64_expand_sve_dupq (target, mode, vq_src);
! 	}
! 
!       /* Get an integer representation of the repeating part of Advanced
! 	 SIMD vector VQ_SRC.  This preserves the endianness of VQ_SRC,
! 	 which for big-endian targets is lane-swapped wrt a normal
! 	 Advanced SIMD vector.  This means that for both endiannesses,
! 	 memory lane N of SVE vector SRC corresponds to architectural
! 	 lane N of a register holding VQ_SRC.  This in turn means that
! 	 memory lane 0 of SVE vector SRC is in the lsb of VQ_SRC (viewed
! 	 as a single 128-bit value) and thus that memory lane 0 of SRC is
! 	 in the lsb of the integer.  Duplicating the integer therefore
! 	 ensures that memory lane N of SRC goes into architectural lane
! 	 N + I * INDEX of the SVE register.  */
!       scalar_mode int_mode = int_mode_for_size (encoded_bits, 0).require ();
!       rtx elt_value = simplify_gen_subreg (int_mode, vq_src, vq_mode, 0);
!       if (elt_value)
! 	{
! 	  /* Pretend that we had a vector of INT_MODE to start with.  */
! 	  elt_mode = int_mode;
! 	  mode = aarch64_full_sve_mode (int_mode).require ();
! 
! 	  /* If the integer can be moved into a general register by a
! 	     single instruction, do that and duplicate the result.  */
! 	  if (CONST_INT_P (elt_value)
! 	      && aarch64_move_imm (INTVAL (elt_value), elt_mode))
! 	    {
! 	      elt_value = force_reg (elt_mode, elt_value);
! 	      return expand_vector_broadcast (mode, elt_value);
! 	    }
! 	}
!       else if (npatterns == 1)
! 	/* We're duplicating a single value, but can't do better than
! 	   force it to memory and load from there.  This handles things
! 	   like symbolic constants.  */
! 	elt_value = CONST_VECTOR_ENCODED_ELT (src, 0);
! 
!       if (elt_value)
! 	{
! 	  /* Load the element from memory if we can, otherwise move it into
! 	     a register and use a DUP.  */
! 	  rtx op = force_const_mem (elt_mode, elt_value);
! 	  if (!op)
! 	    op = force_reg (elt_mode, elt_value);
! 	  return expand_vector_broadcast (mode, op);
  	}
      }
  
+   /* Try using INDEX.  */
+   rtx base, step;
+   if (const_vec_series_p (src, &base, &step))
+     {
+       aarch64_expand_vec_series (target, base, step);
+       return target;
+     }
+ 
+   /* From here on, it's better to force the whole constant to memory
+      if we can.  */
+   if (GET_MODE_NUNITS (mode).is_constant ())
+     return NULL_RTX;
+ 
    /* Expand each pattern individually.  */
+   gcc_assert (npatterns > 1);
    rtx_vector_builder builder;
    auto_vec<rtx, 16> vectors (npatterns);
    for (unsigned int i = 0; i < npatterns; ++i)
*************** aarch64_expand_sve_const_vector (rtx des
*** 3234,3255 ****
        npatterns /= 2;
        for (unsigned int i = 0; i < npatterns; ++i)
  	{
! 	  rtx tmp = (npatterns == 1 ? dest : gen_reg_rtx (mode));
  	  rtvec v = gen_rtvec (2, vectors[i], vectors[i + npatterns]);
  	  emit_set_insn (tmp, gen_rtx_UNSPEC (mode, v, UNSPEC_ZIP1));
  	  vectors[i] = tmp;
  	}
      }
!   gcc_assert (vectors[0] == dest);
  }
  
! /* Set DEST to immediate IMM.  For SVE vector modes, GEN_VEC_DUPLICATE
!    is a pattern that can be used to set DEST to a replicated scalar
!    element.  */
  
  void
! aarch64_expand_mov_immediate (rtx dest, rtx imm,
! 			      rtx (*gen_vec_duplicate) (rtx, rtx))
  {
    machine_mode mode = GET_MODE (dest);
  
--- 4765,5028 ----
        npatterns /= 2;
        for (unsigned int i = 0; i < npatterns; ++i)
  	{
! 	  rtx tmp = (npatterns == 1 ? target : gen_reg_rtx (mode));
  	  rtvec v = gen_rtvec (2, vectors[i], vectors[i + npatterns]);
  	  emit_set_insn (tmp, gen_rtx_UNSPEC (mode, v, UNSPEC_ZIP1));
  	  vectors[i] = tmp;
  	}
      }
!   gcc_assert (vectors[0] == target);
!   return target;
  }
  
! /* Use WHILE to set a predicate register of mode MODE in which the first
!    VL bits are set and the rest are clear.  Use TARGET for the register
!    if it's nonnull and convenient.  */
! 
! static rtx
! aarch64_sve_move_pred_via_while (rtx target, machine_mode mode,
! 				 unsigned int vl)
! {
!   rtx limit = force_reg (DImode, gen_int_mode (vl, DImode));
!   target = aarch64_target_reg (target, mode);
!   emit_insn (gen_while (UNSPEC_WHILELO, DImode, mode,
! 			target, const0_rtx, limit));
!   return target;
! }
! 
! static rtx
! aarch64_expand_sve_const_pred_1 (rtx, rtx_vector_builder &, bool);
! 
! /* BUILDER is a constant predicate in which the index of every set bit
!    is a multiple of ELT_SIZE (which is <= 8).  Try to load the constant
!    by inverting every element at a multiple of ELT_SIZE and EORing the
!    result with an ELT_SIZE PTRUE.
! 
!    Return a register that contains the constant on success, otherwise
!    return null.  Use TARGET as the register if it is nonnull and
!    convenient.  */
! 
! static rtx
! aarch64_expand_sve_const_pred_eor (rtx target, rtx_vector_builder &builder,
! 				   unsigned int elt_size)
! {
!   /* Invert every element at a multiple of ELT_SIZE, keeping the
!      other bits zero.  */
!   rtx_vector_builder inv_builder (VNx16BImode, builder.npatterns (),
! 				  builder.nelts_per_pattern ());
!   for (unsigned int i = 0; i < builder.encoded_nelts (); ++i)
!     if ((i & (elt_size - 1)) == 0 && INTVAL (builder.elt (i)) == 0)
!       inv_builder.quick_push (const1_rtx);
!     else
!       inv_builder.quick_push (const0_rtx);
!   inv_builder.finalize ();
! 
!   /* See if we can load the constant cheaply.  */
!   rtx inv = aarch64_expand_sve_const_pred_1 (NULL_RTX, inv_builder, false);
!   if (!inv)
!     return NULL_RTX;
! 
!   /* EOR the result with an ELT_SIZE PTRUE.  */
!   rtx mask = aarch64_ptrue_all (elt_size);
!   mask = force_reg (VNx16BImode, mask);
!   inv = gen_lowpart (VNx16BImode, inv);
!   target = aarch64_target_reg (target, VNx16BImode);
!   emit_insn (gen_aarch64_pred_z (XOR, VNx16BImode, target, mask, inv, mask));
!   return target;
! }
! 
! /* BUILDER is a constant predicate in which the index of every set bit
!    is a multiple of ELT_SIZE (which is <= 8).  Try to load the constant
!    using a TRN1 of size PERMUTE_SIZE, which is >= ELT_SIZE.  Return the
!    register on success, otherwise return null.  Use TARGET as the register
!    if nonnull and convenient.  */
! 
! static rtx
! aarch64_expand_sve_const_pred_trn (rtx target, rtx_vector_builder &builder,
! 				   unsigned int elt_size,
! 				   unsigned int permute_size)
! {
!   /* We're going to split the constant into two new constants A and B,
!      with element I of BUILDER going into A if (I & PERMUTE_SIZE) == 0
!      and into B otherwise.  E.g. for PERMUTE_SIZE == 4 && ELT_SIZE == 1:
! 
!      A: { 0, 1, 2, 3, _, _, _, _, 8, 9, 10, 11, _, _, _, _ }
!      B: { 4, 5, 6, 7, _, _, _, _, 12, 13, 14, 15, _, _, _, _ }
! 
!      where _ indicates elements that will be discarded by the permute.
! 
!      First calculate the ELT_SIZEs for A and B.  */
!   unsigned int a_elt_size = GET_MODE_SIZE (DImode);
!   unsigned int b_elt_size = GET_MODE_SIZE (DImode);
!   for (unsigned int i = 0; i < builder.encoded_nelts (); i += elt_size)
!     if (INTVAL (builder.elt (i)) != 0)
!       {
! 	if (i & permute_size)
! 	  b_elt_size |= i - permute_size;
! 	else
! 	  a_elt_size |= i;
!       }
!   a_elt_size &= -a_elt_size;
!   b_elt_size &= -b_elt_size;
! 
!   /* Now construct the vectors themselves.  */
!   rtx_vector_builder a_builder (VNx16BImode, builder.npatterns (),
! 				builder.nelts_per_pattern ());
!   rtx_vector_builder b_builder (VNx16BImode, builder.npatterns (),
! 				builder.nelts_per_pattern ());
!   unsigned int nelts = builder.encoded_nelts ();
!   for (unsigned int i = 0; i < nelts; ++i)
!     if (i & (elt_size - 1))
!       {
! 	a_builder.quick_push (const0_rtx);
! 	b_builder.quick_push (const0_rtx);
!       }
!     else if ((i & permute_size) == 0)
!       {
! 	/* The A and B elements are significant.  */
! 	a_builder.quick_push (builder.elt (i));
! 	b_builder.quick_push (builder.elt (i + permute_size));
!       }
!     else
!       {
! 	/* The A and B elements are going to be discarded, so pick whatever
! 	   is likely to give a nice constant.  We are targeting element
! 	   sizes A_ELT_SIZE and B_ELT_SIZE for A and B respectively,
! 	   with the aim of each being a sequence of ones followed by
! 	   a sequence of zeros.  So:
! 
! 	   * if X_ELT_SIZE <= PERMUTE_SIZE, the best approach is to
! 	     duplicate the last X_ELT_SIZE element, to extend the
! 	     current sequence of ones or zeros.
! 
! 	   * if X_ELT_SIZE > PERMUTE_SIZE, the best approach is to add a
! 	     zero, so that the constant really does have X_ELT_SIZE and
! 	     not a smaller size.  */
! 	if (a_elt_size > permute_size)
! 	  a_builder.quick_push (const0_rtx);
! 	else
! 	  a_builder.quick_push (a_builder.elt (i - a_elt_size));
! 	if (b_elt_size > permute_size)
! 	  b_builder.quick_push (const0_rtx);
! 	else
! 	  b_builder.quick_push (b_builder.elt (i - b_elt_size));
!       }
!   a_builder.finalize ();
!   b_builder.finalize ();
! 
!   /* Try loading A into a register.  */
!   rtx_insn *last = get_last_insn ();
!   rtx a = aarch64_expand_sve_const_pred_1 (NULL_RTX, a_builder, false);
!   if (!a)
!     return NULL_RTX;
! 
!   /* Try loading B into a register.  */
!   rtx b = a;
!   if (a_builder != b_builder)
!     {
!       b = aarch64_expand_sve_const_pred_1 (NULL_RTX, b_builder, false);
!       if (!b)
! 	{
! 	  delete_insns_since (last);
! 	  return NULL_RTX;
! 	}
!     }
! 
!   /* Emit the TRN1 itself.  */
!   machine_mode mode = aarch64_sve_pred_mode (permute_size).require ();
!   target = aarch64_target_reg (target, mode);
!   emit_insn (gen_aarch64_sve (UNSPEC_TRN1, mode, target,
! 			      gen_lowpart (mode, a),
! 			      gen_lowpart (mode, b)));
!   return target;
! }
! 
! /* Subroutine of aarch64_expand_sve_const_pred.  Try to load the VNx16BI
!    constant in BUILDER into an SVE predicate register.  Return the register
!    on success, otherwise return null.  Use TARGET for the register if
!    nonnull and convenient.
! 
!    ALLOW_RECURSE_P is true if we can use methods that would call this
!    function recursively.  */
! 
! static rtx
! aarch64_expand_sve_const_pred_1 (rtx target, rtx_vector_builder &builder,
! 				 bool allow_recurse_p)
! {
!   if (builder.encoded_nelts () == 1)
!     /* A PFALSE or a PTRUE .B ALL.  */
!     return aarch64_emit_set_immediate (target, builder);
! 
!   unsigned int elt_size = aarch64_widest_sve_pred_elt_size (builder);
!   if (int vl = aarch64_partial_ptrue_length (builder, elt_size))
!     {
!       /* If we can load the constant using PTRUE, use it as-is.  */
!       machine_mode mode = aarch64_sve_pred_mode (elt_size).require ();
!       if (aarch64_svpattern_for_vl (mode, vl) != AARCH64_NUM_SVPATTERNS)
! 	return aarch64_emit_set_immediate (target, builder);
! 
!       /* Otherwise use WHILE to set the first VL bits.  */
!       return aarch64_sve_move_pred_via_while (target, mode, vl);
!     }
! 
!   if (!allow_recurse_p)
!     return NULL_RTX;
! 
!   /* Try inverting the vector in element size ELT_SIZE and then EORing
!      the result with an ELT_SIZE PTRUE.  */
!   if (INTVAL (builder.elt (0)) == 0)
!     if (rtx res = aarch64_expand_sve_const_pred_eor (target, builder,
! 						     elt_size))
!       return res;
! 
!   /* Try using TRN1 to permute two simpler constants.  */
!   for (unsigned int i = elt_size; i <= 8; i *= 2)
!     if (rtx res = aarch64_expand_sve_const_pred_trn (target, builder,
! 						     elt_size, i))
!       return res;
! 
!   return NULL_RTX;
! }
! 
! /* Return an SVE predicate register that contains the VNx16BImode
!    constant in BUILDER, without going through the move expanders.
! 
!    The returned register can have whatever mode seems most natural
!    given the contents of BUILDER.  Use TARGET for the result if
!    convenient.  */
! 
! static rtx
! aarch64_expand_sve_const_pred (rtx target, rtx_vector_builder &builder)
! {
!   /* Try loading the constant using pure predicate operations.  */
!   if (rtx res = aarch64_expand_sve_const_pred_1 (target, builder, true))
!     return res;
! 
!   /* Try forcing the constant to memory.  */
!   if (builder.full_nelts ().is_constant ())
!     if (rtx mem = force_const_mem (VNx16BImode, builder.build ()))
!       {
! 	target = aarch64_target_reg (target, VNx16BImode);
! 	emit_move_insn (target, mem);
! 	return target;
!       }
! 
!   /* The last resort is to load the constant as an integer and then
!      compare it against zero.  Use -1 for set bits in order to increase
!      the changes of using SVE DUPM or an Advanced SIMD byte mask.  */
!   rtx_vector_builder int_builder (VNx16QImode, builder.npatterns (),
! 				  builder.nelts_per_pattern ());
!   for (unsigned int i = 0; i < builder.encoded_nelts (); ++i)
!     int_builder.quick_push (INTVAL (builder.elt (i))
! 			    ? constm1_rtx : const0_rtx);
!   return aarch64_convert_sve_data_to_pred (target, VNx16BImode,
! 					   int_builder.build ());
! }
! 
! /* Set DEST to immediate IMM.  */
  
  void
! aarch64_expand_mov_immediate (rtx dest, rtx imm)
  {
    machine_mode mode = GET_MODE (dest);
  
*************** aarch64_expand_mov_immediate (rtx dest,
*** 3274,3279 ****
--- 5047,5057 ----
  	 folding it into the relocation.  */
        if (!offset.is_constant (&const_offset))
  	{
+ 	  if (!TARGET_SVE)
+ 	    {
+ 	      aarch64_report_sve_required ();
+ 	      return;
+ 	    }
  	  if (base == const0_rtx && aarch64_sve_cnt_immediate_p (offset))
  	    emit_insn (gen_rtx_SET (dest, imm));
  	  else
*************** aarch64_expand_mov_immediate (rtx dest,
*** 3372,3409 ****
  
    if (!CONST_INT_P (imm))
      {
!       rtx base, step, value;
!       if (GET_CODE (imm) == HIGH
! 	  || aarch64_simd_valid_immediate (imm, NULL))
! 	emit_insn (gen_rtx_SET (dest, imm));
!       else if (const_vec_series_p (imm, &base, &step))
! 	aarch64_expand_vec_series (dest, base, step);
!       else if (const_vec_duplicate_p (imm, &value))
  	{
! 	  /* If the constant is out of range of an SVE vector move,
! 	     load it from memory if we can, otherwise move it into
! 	     a register and use a DUP.  */
! 	  scalar_mode inner_mode = GET_MODE_INNER (mode);
! 	  rtx op = force_const_mem (inner_mode, value);
! 	  if (!op)
! 	    op = force_reg (inner_mode, value);
! 	  else if (!aarch64_sve_ld1r_operand_p (op))
  	    {
! 	      rtx addr = force_reg (Pmode, XEXP (op, 0));
! 	      op = replace_equiv_address (op, addr);
  	    }
- 	  emit_insn (gen_vec_duplicate (dest, op));
  	}
!       else if (GET_CODE (imm) == CONST_VECTOR
! 	       && !GET_MODE_NUNITS (GET_MODE (imm)).is_constant ())
! 	aarch64_expand_sve_const_vector (dest, imm);
!       else
  	{
! 	  rtx mem = force_const_mem (mode, imm);
! 	  gcc_assert (mem);
! 	  emit_move_insn (dest, mem);
  	}
  
        return;
      }
  
--- 5150,5199 ----
  
    if (!CONST_INT_P (imm))
      {
!       if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL)
  	{
! 	  /* Only the low bit of each .H, .S and .D element is defined,
! 	     so we can set the upper bits to whatever we like.  If the
! 	     predicate is all-true in MODE, prefer to set all the undefined
! 	     bits as well, so that we can share a single .B predicate for
! 	     all modes.  */
! 	  if (imm == CONSTM1_RTX (mode))
! 	    imm = CONSTM1_RTX (VNx16BImode);
! 
! 	  /* All methods for constructing predicate modes wider than VNx16BI
! 	     will set the upper bits of each element to zero.  Expose this
! 	     by moving such constants as a VNx16BI, so that all bits are
! 	     significant and so that constants for different modes can be
! 	     shared.  The wider constant will still be available as a
! 	     REG_EQUAL note.  */
! 	  rtx_vector_builder builder;
! 	  if (aarch64_get_sve_pred_bits (builder, imm))
  	    {
! 	      rtx res = aarch64_expand_sve_const_pred (dest, builder);
! 	      if (dest != res)
! 		emit_move_insn (dest, gen_lowpart (mode, res));
! 	      return;
  	    }
  	}
! 
!       if (GET_CODE (imm) == HIGH
! 	  || aarch64_simd_valid_immediate (imm, NULL))
  	{
! 	  emit_insn (gen_rtx_SET (dest, imm));
! 	  return;
  	}
  
+       if (GET_CODE (imm) == CONST_VECTOR && aarch64_sve_data_mode_p (mode))
+ 	if (rtx res = aarch64_expand_sve_const_vector (dest, imm))
+ 	  {
+ 	    if (dest != res)
+ 	      emit_insn (gen_aarch64_sve_reinterpret (mode, dest, res));
+ 	    return;
+ 	  }
+ 
+       rtx mem = force_const_mem (mode, imm);
+       gcc_assert (mem);
+       emit_move_insn (dest, mem);
        return;
      }
  
*************** aarch64_emit_sve_pred_move (rtx dest, rt
*** 3422,3427 ****
--- 5212,5218 ----
    create_output_operand (&ops[0], dest, mode);
    create_input_operand (&ops[1], pred, GET_MODE(pred));
    create_input_operand (&ops[2], src, mode);
+   temporary_volatile_ok v (true);
    expand_insn (code_for_aarch64_pred_mov (mode), 3, ops);
  }
  
*************** void
*** 3438,3444 ****
  aarch64_expand_sve_mem_move (rtx dest, rtx src, machine_mode pred_mode)
  {
    machine_mode mode = GET_MODE (dest);
!   rtx ptrue = force_reg (pred_mode, CONSTM1_RTX (pred_mode));
    if (!register_operand (src, mode)
        && !register_operand (dest, mode))
      {
--- 5229,5235 ----
  aarch64_expand_sve_mem_move (rtx dest, rtx src, machine_mode pred_mode)
  {
    machine_mode mode = GET_MODE (dest);
!   rtx ptrue = aarch64_ptrue_reg (pred_mode);
    if (!register_operand (src, mode)
        && !register_operand (dest, mode))
      {
*************** aarch64_maybe_expand_sve_subreg_move (rt
*** 3502,3508 ****
      return false;
  
    /* Generate *aarch64_sve_mov<mode>_subreg_be.  */
!   rtx ptrue = force_reg (VNx16BImode, CONSTM1_RTX (VNx16BImode));
    rtx unspec = gen_rtx_UNSPEC (GET_MODE (dest), gen_rtvec (2, ptrue, src),
  			       UNSPEC_REV_SUBREG);
    emit_insn (gen_rtx_SET (dest, unspec));
--- 5293,5299 ----
      return false;
  
    /* Generate *aarch64_sve_mov<mode>_subreg_be.  */
!   rtx ptrue = aarch64_ptrue_reg (VNx16BImode);
    rtx unspec = gen_rtx_UNSPEC (GET_MODE (dest), gen_rtvec (2, ptrue, src),
  			       UNSPEC_REV_SUBREG);
    emit_insn (gen_rtx_SET (dest, unspec));
*************** aarch64_maybe_expand_sve_subreg_move (rt
*** 3513,3519 ****
     attributes.  Unlike gen_lowpart, this doesn't care whether the
     mode change is valid.  */
  
! static rtx
  aarch64_replace_reg_mode (rtx x, machine_mode mode)
  {
    if (GET_MODE (x) == mode)
--- 5304,5310 ----
     attributes.  Unlike gen_lowpart, this doesn't care whether the
     mode change is valid.  */
  
! rtx
  aarch64_replace_reg_mode (rtx x, machine_mode mode)
  {
    if (GET_MODE (x) == mode)
*************** aarch64_replace_reg_mode (rtx x, machine
*** 3524,3615 ****
    return x;
  }
  
  /* Split a *aarch64_sve_mov<mode>_subreg_be pattern with the given
     operands.  */
  
  void
  aarch64_split_sve_subreg_move (rtx dest, rtx ptrue, rtx src)
  {
!   /* Decide which REV operation we need.  The mode with narrower elements
!      determines the mode of the operands and the mode with the wider
       elements determines the reverse width.  */
!   machine_mode mode_with_wider_elts = GET_MODE (dest);
!   machine_mode mode_with_narrower_elts = GET_MODE (src);
    if (GET_MODE_UNIT_SIZE (mode_with_wider_elts)
        < GET_MODE_UNIT_SIZE (mode_with_narrower_elts))
      std::swap (mode_with_wider_elts, mode_with_narrower_elts);
  
!   unsigned int wider_bytes = GET_MODE_UNIT_SIZE (mode_with_wider_elts);
!   unsigned int unspec;
!   if (wider_bytes == 8)
!     unspec = UNSPEC_REV64;
!   else if (wider_bytes == 4)
!     unspec = UNSPEC_REV32;
!   else if (wider_bytes == 2)
!     unspec = UNSPEC_REV16;
!   else
!     gcc_unreachable ();
!   machine_mode pred_mode = aarch64_sve_pred_mode (wider_bytes).require ();
! 
!   /* Emit:
! 
!        (set DEST (unspec [PTRUE (unspec [SRC] UNSPEC_REV<nn>)]
! 			 UNSPEC_MERGE_PTRUE))
  
!      with the appropriate modes.  */
    ptrue = gen_lowpart (pred_mode, ptrue);
!   dest = aarch64_replace_reg_mode (dest, mode_with_narrower_elts);
!   src = aarch64_replace_reg_mode (src, mode_with_narrower_elts);
!   src = gen_rtx_UNSPEC (mode_with_narrower_elts, gen_rtvec (1, src), unspec);
!   src = gen_rtx_UNSPEC (mode_with_narrower_elts, gen_rtvec (2, ptrue, src),
! 			UNSPEC_MERGE_PTRUE);
!   emit_insn (gen_rtx_SET (dest, src));
  }
  
  static bool
! aarch64_function_ok_for_sibcall (tree decl ATTRIBUTE_UNUSED,
! 				 tree exp ATTRIBUTE_UNUSED)
  {
!   if (aarch64_simd_decl_p (cfun->decl) != aarch64_simd_decl_p (decl))
      return false;
  
    return true;
  }
  
! /* Implement TARGET_PASS_BY_REFERENCE.  */
  
  static bool
! aarch64_pass_by_reference (cumulative_args_t pcum ATTRIBUTE_UNUSED,
! 			   machine_mode mode,
! 			   const_tree type,
! 			   bool named ATTRIBUTE_UNUSED)
  {
    HOST_WIDE_INT size;
    machine_mode dummymode;
    int nregs;
  
    /* GET_MODE_SIZE (BLKmode) is useless since it is 0.  */
!   if (mode == BLKmode && type)
!     size = int_size_in_bytes (type);
    else
      /* No frontends can create types with variable-sized modes, so we
         shouldn't be asked to pass or return them.  */
!     size = GET_MODE_SIZE (mode).to_constant ();
  
    /* Aggregates are passed by reference based on their size.  */
!   if (type && AGGREGATE_TYPE_P (type))
!     {
!       size = int_size_in_bytes (type);
!     }
  
    /* Variable sized arguments are always returned by reference.  */
    if (size < 0)
      return true;
  
    /* Can this be a candidate to be passed in fp/simd register(s)?  */
!   if (aarch64_vfp_is_call_or_return_candidate (mode, type,
! 					       &dummymode, &nregs,
! 					       NULL))
      return false;
  
    /* Arguments which are variable sized or larger than 2 registers are
--- 5315,5401 ----
    return x;
  }
  
+ /* Return the SVE REV[BHW] unspec for reversing quantites of mode MODE
+    stored in wider integer containers.  */
+ 
+ static unsigned int
+ aarch64_sve_rev_unspec (machine_mode mode)
+ {
+   switch (GET_MODE_UNIT_SIZE (mode))
+     {
+     case 1: return UNSPEC_REVB;
+     case 2: return UNSPEC_REVH;
+     case 4: return UNSPEC_REVW;
+     }
+   gcc_unreachable ();
+ }
+ 
  /* Split a *aarch64_sve_mov<mode>_subreg_be pattern with the given
     operands.  */
  
  void
  aarch64_split_sve_subreg_move (rtx dest, rtx ptrue, rtx src)
  {
!   /* Decide which REV operation we need.  The mode with wider elements
!      determines the mode of the operands and the mode with the narrower
       elements determines the reverse width.  */
!   machine_mode mode_with_wider_elts = aarch64_sve_int_mode (GET_MODE (dest));
!   machine_mode mode_with_narrower_elts = aarch64_sve_int_mode (GET_MODE (src));
    if (GET_MODE_UNIT_SIZE (mode_with_wider_elts)
        < GET_MODE_UNIT_SIZE (mode_with_narrower_elts))
      std::swap (mode_with_wider_elts, mode_with_narrower_elts);
  
!   unsigned int unspec = aarch64_sve_rev_unspec (mode_with_narrower_elts);
!   machine_mode pred_mode = aarch64_sve_pred_mode (mode_with_wider_elts);
  
!   /* Get the operands in the appropriate modes and emit the instruction.  */
    ptrue = gen_lowpart (pred_mode, ptrue);
!   dest = aarch64_replace_reg_mode (dest, mode_with_wider_elts);
!   src = aarch64_replace_reg_mode (src, mode_with_wider_elts);
!   emit_insn (gen_aarch64_pred (unspec, mode_with_wider_elts,
! 			       dest, ptrue, src));
  }
  
  static bool
! aarch64_function_ok_for_sibcall (tree, tree exp)
  {
!   if (crtl->abi->id () != expr_callee_abi (exp).id ())
      return false;
  
    return true;
  }
  
! /* Subroutine of aarch64_pass_by_reference for arguments that are not
!    passed in SVE registers.  */
  
  static bool
! aarch64_pass_by_reference_1 (CUMULATIVE_ARGS *pcum,
! 			     const function_arg_info &arg)
  {
    HOST_WIDE_INT size;
    machine_mode dummymode;
    int nregs;
  
    /* GET_MODE_SIZE (BLKmode) is useless since it is 0.  */
!   if (arg.mode == BLKmode && arg.type)
!     size = int_size_in_bytes (arg.type);
    else
      /* No frontends can create types with variable-sized modes, so we
         shouldn't be asked to pass or return them.  */
!     size = GET_MODE_SIZE (arg.mode).to_constant ();
  
    /* Aggregates are passed by reference based on their size.  */
!   if (arg.aggregate_type_p ())
!     size = int_size_in_bytes (arg.type);
  
    /* Variable sized arguments are always returned by reference.  */
    if (size < 0)
      return true;
  
    /* Can this be a candidate to be passed in fp/simd register(s)?  */
!   if (aarch64_vfp_is_call_or_return_candidate (arg.mode, arg.type,
! 					       &dummymode, &nregs, NULL,
! 					       !pcum || pcum->silent_p))
      return false;
  
    /* Arguments which are variable sized or larger than 2 registers are
*************** aarch64_pass_by_reference (cumulative_ar
*** 3618,3623 ****
--- 5404,5447 ----
    return size > 2 * UNITS_PER_WORD;
  }
  
+ /* Implement TARGET_PASS_BY_REFERENCE.  */
+ 
+ static bool
+ aarch64_pass_by_reference (cumulative_args_t pcum_v,
+ 			   const function_arg_info &arg)
+ {
+   CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
+ 
+   if (!arg.type)
+     return aarch64_pass_by_reference_1 (pcum, arg);
+ 
+   pure_scalable_type_info pst_info;
+   switch (pst_info.analyze (arg.type))
+     {
+     case pure_scalable_type_info::IS_PST:
+       if (pcum && !pcum->silent_p && !TARGET_SVE)
+ 	/* We can't gracefully recover at this point, so make this a
+ 	   fatal error.  */
+ 	fatal_error (input_location, "arguments of type %qT require"
+ 		     " the SVE ISA extension", arg.type);
+ 
+       /* Variadic SVE types are passed by reference.  Normal non-variadic
+ 	 arguments are too if we've run out of registers.  */
+       return (!arg.named
+ 	      || pcum->aapcs_nvrn + pst_info.num_zr () > NUM_FP_ARG_REGS
+ 	      || pcum->aapcs_nprn + pst_info.num_pr () > NUM_PR_ARG_REGS);
+ 
+     case pure_scalable_type_info::DOESNT_MATTER:
+       gcc_assert (aarch64_pass_by_reference_1 (pcum, arg));
+       return true;
+ 
+     case pure_scalable_type_info::NO_ABI_IDENTITY:
+     case pure_scalable_type_info::ISNT_PST:
+       return aarch64_pass_by_reference_1 (pcum, arg);
+     }
+   gcc_unreachable ();
+ }
+ 
  /* Return TRUE if VALTYPE is padded to its least significant bits.  */
  static bool
  aarch64_return_in_msb (const_tree valtype)
*************** aarch64_return_in_msb (const_tree valtyp
*** 3641,3647 ****
       is always passed/returned in the least significant bits of fp/simd
       register(s).  */
    if (aarch64_vfp_is_call_or_return_candidate (TYPE_MODE (valtype), valtype,
! 					       &dummy_mode, &dummy_int, NULL))
      return false;
  
    return true;
--- 5465,5477 ----
       is always passed/returned in the least significant bits of fp/simd
       register(s).  */
    if (aarch64_vfp_is_call_or_return_candidate (TYPE_MODE (valtype), valtype,
! 					       &dummy_mode, &dummy_int, NULL,
! 					       false))
!     return false;
! 
!   /* Likewise pure scalable types for SVE vector and predicate registers.  */
!   pure_scalable_type_info pst_info;
!   if (pst_info.analyze_registers (valtype))
      return false;
  
    return true;
*************** aarch64_function_value (const_tree type,
*** 3656,3668 ****
  {
    machine_mode mode;
    int unsignedp;
-   int count;
-   machine_mode ag_mode;
  
    mode = TYPE_MODE (type);
    if (INTEGRAL_TYPE_P (type))
      mode = promote_function_mode (type, mode, &unsignedp, func, 1);
  
    if (aarch64_return_in_msb (type))
      {
        HOST_WIDE_INT size = int_size_in_bytes (type);
--- 5486,5505 ----
  {
    machine_mode mode;
    int unsignedp;
  
    mode = TYPE_MODE (type);
    if (INTEGRAL_TYPE_P (type))
      mode = promote_function_mode (type, mode, &unsignedp, func, 1);
  
+   pure_scalable_type_info pst_info;
+   if (type && pst_info.analyze_registers (type))
+     return pst_info.get_rtx (mode, V0_REGNUM, P0_REGNUM);
+ 
+   /* Generic vectors that map to full SVE modes with -msve-vector-bits=N
+      are returned in memory, not by value.  */
+   unsigned int vec_flags = aarch64_classify_vector_mode (mode);
+   bool sve_p = (vec_flags & VEC_ANY_SVE);
+ 
    if (aarch64_return_in_msb (type))
      {
        HOST_WIDE_INT size = int_size_in_bytes (type);
*************** aarch64_function_value (const_tree type,
*** 3674,3682 ****
  	}
      }
  
!   if (aarch64_vfp_is_call_or_return_candidate (mode, type,
! 					       &ag_mode, &count, NULL))
      {
        if (!aarch64_composite_type_p (type, mode))
  	{
  	  gcc_assert (count == 1 && mode == ag_mode);
--- 5511,5522 ----
  	}
      }
  
!   int count;
!   machine_mode ag_mode;
!   if (aarch64_vfp_is_call_or_return_candidate (mode, type, &ag_mode, &count,
! 					       NULL, false))
      {
+       gcc_assert (!sve_p);
        if (!aarch64_composite_type_p (type, mode))
  	{
  	  gcc_assert (count == 1 && mode == ag_mode);
*************** aarch64_function_value (const_tree type,
*** 3699,3705 ****
  	}
      }
    else
!     return gen_rtx_REG (mode, R0_REGNUM);
  }
  
  /* Implements TARGET_FUNCTION_VALUE_REGNO_P.
--- 5539,5567 ----
  	}
      }
    else
!     {
!       if (sve_p)
! 	{
! 	  /* Vector types can acquire a partial SVE mode using things like
! 	     __attribute__((vector_size(N))), and this is potentially useful.
! 	     However, the choice of mode doesn't affect the type's ABI
! 	     identity, so we should treat the types as though they had
! 	     the associated integer mode, just like they did before SVE
! 	     was introduced.
! 
! 	     We know that the vector must be 128 bits or smaller,
! 	     otherwise we'd have returned it in memory instead.  */
! 	  gcc_assert (type
! 		      && (aarch64_some_values_include_pst_objects_p (type)
! 			  || (vec_flags & VEC_PARTIAL)));
! 
! 	  scalar_int_mode int_mode = int_mode_for_mode (mode).require ();
! 	  rtx reg = gen_rtx_REG (int_mode, R0_REGNUM);
! 	  rtx pair = gen_rtx_EXPR_LIST (VOIDmode, reg, const0_rtx);
! 	  return gen_rtx_PARALLEL (mode, gen_rtvec (1, pair));
! 	}
!       return gen_rtx_REG (mode, R0_REGNUM);
!     }
  }
  
  /* Implements TARGET_FUNCTION_VALUE_REGNO_P.
*************** aarch64_function_value_regno_p (const un
*** 3723,3739 ****
    return false;
  }
  
! /* Implement TARGET_RETURN_IN_MEMORY.
! 
!    If the type T of the result of a function is such that
!      void func (T arg)
!    would require that arg be passed as a value in a register (or set of
!    registers) according to the parameter passing rules, then the result
!    is returned in the same registers as would be used for such an
!    argument.  */
  
  static bool
! aarch64_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED)
  {
    HOST_WIDE_INT size;
    machine_mode ag_mode;
--- 5585,5595 ----
    return false;
  }
  
! /* Subroutine for aarch64_return_in_memory for types that are not returned
!    in SVE registers.  */
  
  static bool
! aarch64_return_in_memory_1 (const_tree type)
  {
    HOST_WIDE_INT size;
    machine_mode ag_mode;
*************** aarch64_return_in_memory (const_tree typ
*** 3745,3755 ****
      /* Simple scalar types always returned in registers.  */
      return false;
  
!   if (aarch64_vfp_is_call_or_return_candidate (TYPE_MODE (type),
! 					       type,
! 					       &ag_mode,
! 					       &count,
! 					       NULL))
      return false;
  
    /* Types larger than 2 registers returned in memory.  */
--- 5601,5608 ----
      /* Simple scalar types always returned in registers.  */
      return false;
  
!   if (aarch64_vfp_is_call_or_return_candidate (TYPE_MODE (type), type,
! 					       &ag_mode, &count, NULL, false))
      return false;
  
    /* Types larger than 2 registers returned in memory.  */
*************** aarch64_return_in_memory (const_tree typ
*** 3757,3772 ****
    return (size < 0 || size > 2 * UNITS_PER_WORD);
  }
  
  static bool
  aarch64_vfp_is_call_candidate (cumulative_args_t pcum_v, machine_mode mode,
  			       const_tree type, int *nregs)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
!   return aarch64_vfp_is_call_or_return_candidate (mode,
! 						  type,
  						  &pcum->aapcs_vfp_rmode,
! 						  nregs,
! 						  NULL);
  }
  
  /* Given MODE and TYPE of a function argument, return the alignment in
--- 5610,5653 ----
    return (size < 0 || size > 2 * UNITS_PER_WORD);
  }
  
+ /* Implement TARGET_RETURN_IN_MEMORY.
+ 
+    If the type T of the result of a function is such that
+      void func (T arg)
+    would require that arg be passed as a value in a register (or set of
+    registers) according to the parameter passing rules, then the result
+    is returned in the same registers as would be used for such an
+    argument.  */
+ 
+ static bool
+ aarch64_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED)
+ {
+   pure_scalable_type_info pst_info;
+   switch (pst_info.analyze (type))
+     {
+     case pure_scalable_type_info::IS_PST:
+       return (pst_info.num_zr () > NUM_FP_ARG_REGS
+ 	      || pst_info.num_pr () > NUM_PR_ARG_REGS);
+ 
+     case pure_scalable_type_info::DOESNT_MATTER:
+       gcc_assert (aarch64_return_in_memory_1 (type));
+       return true;
+ 
+     case pure_scalable_type_info::NO_ABI_IDENTITY:
+     case pure_scalable_type_info::ISNT_PST:
+       return aarch64_return_in_memory_1 (type);
+     }
+   gcc_unreachable ();
+ }
+ 
  static bool
  aarch64_vfp_is_call_candidate (cumulative_args_t pcum_v, machine_mode mode,
  			       const_tree type, int *nregs)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
!   return aarch64_vfp_is_call_or_return_candidate (mode, type,
  						  &pcum->aapcs_vfp_rmode,
! 						  nregs, NULL, pcum->silent_p);
  }
  
  /* Given MODE and TYPE of a function argument, return the alignment in
*************** aarch64_function_arg_alignment (machine_
*** 3800,3805 ****
--- 5681,5699 ----
    for (tree field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field))
      if (TREE_CODE (field) == FIELD_DECL)
        {
+ 	/* Note that we explicitly consider zero-sized fields here,
+ 	   even though they don't map to AAPCS64 machine types.
+ 	   For example, in:
+ 
+ 	       struct __attribute__((aligned(8))) empty {};
+ 
+ 	       struct s {
+ 		 [[no_unique_address]] empty e;
+ 		 int x;
+ 	       };
+ 
+ 	   "s" contains only one Fundamental Data Type (the int field)
+ 	   but gains 8-byte alignment and size thanks to "e".  */
  	alignment = std::max (alignment, DECL_ALIGN (field));
  	if (DECL_BIT_FIELD_TYPE (field))
  	  bitfield_alignment
*************** aarch64_function_arg_alignment (machine_
*** 3817,3830 ****
  }
  
  /* Layout a function argument according to the AAPCS64 rules.  The rule
!    numbers refer to the rule numbers in the AAPCS64.  */
  
  static void
! aarch64_layout_arg (cumulative_args_t pcum_v, machine_mode mode,
! 		    const_tree type,
! 		    bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
    int ncrn, nvrn, nregs;
    bool allocate_ncrn, allocate_nvrn;
    HOST_WIDE_INT size;
--- 5711,5727 ----
  }
  
  /* Layout a function argument according to the AAPCS64 rules.  The rule
!    numbers refer to the rule numbers in the AAPCS64.  ORIG_MODE is the
!    mode that was originally given to us by the target hook, whereas the
!    mode in ARG might be the result of replacing partial SVE modes with
!    the equivalent integer mode.  */
  
  static void
! aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
+   tree type = arg.type;
+   machine_mode mode = arg.mode;
    int ncrn, nvrn, nregs;
    bool allocate_ncrn, allocate_nvrn;
    HOST_WIDE_INT size;
*************** aarch64_layout_arg (cumulative_args_t pc
*** 3836,3841 ****
--- 5733,5786 ----
  
    pcum->aapcs_arg_processed = true;
  
+   pure_scalable_type_info pst_info;
+   if (type && pst_info.analyze_registers (type))
+     {
+       /* The PCS says that it is invalid to pass an SVE value to an
+ 	 unprototyped function.  There is no ABI-defined location we
+ 	 can return in this case, so we have no real choice but to raise
+ 	 an error immediately, even though this is only a query function.  */
+       if (arg.named && pcum->pcs_variant != ARM_PCS_SVE)
+ 	{
+ 	  gcc_assert (!pcum->silent_p);
+ 	  error ("SVE type %qT cannot be passed to an unprototyped function",
+ 		 arg.type);
+ 	  /* Avoid repeating the message, and avoid tripping the assert
+ 	     below.  */
+ 	  pcum->pcs_variant = ARM_PCS_SVE;
+ 	}
+ 
+       /* We would have converted the argument into pass-by-reference
+ 	 form if it didn't fit in registers.  */
+       pcum->aapcs_nextnvrn = pcum->aapcs_nvrn + pst_info.num_zr ();
+       pcum->aapcs_nextnprn = pcum->aapcs_nprn + pst_info.num_pr ();
+       gcc_assert (arg.named
+ 		  && pcum->pcs_variant == ARM_PCS_SVE
+ 		  && pcum->aapcs_nextnvrn <= NUM_FP_ARG_REGS
+ 		  && pcum->aapcs_nextnprn <= NUM_PR_ARG_REGS);
+       pcum->aapcs_reg = pst_info.get_rtx (mode, V0_REGNUM + pcum->aapcs_nvrn,
+ 					  P0_REGNUM + pcum->aapcs_nprn);
+       return;
+     }
+ 
+   /* Generic vectors that map to full SVE modes with -msve-vector-bits=N
+      are passed by reference, not by value.  */
+   unsigned int vec_flags = aarch64_classify_vector_mode (mode);
+   bool sve_p = (vec_flags & VEC_ANY_SVE);
+   if (sve_p)
+     /* Vector types can acquire a partial SVE mode using things like
+        __attribute__((vector_size(N))), and this is potentially useful.
+        However, the choice of mode doesn't affect the type's ABI
+        identity, so we should treat the types as though they had
+        the associated integer mode, just like they did before SVE
+        was introduced.
+ 
+        We know that the vector must be 128 bits or smaller,
+        otherwise we'd have passed it in memory instead.  */
+     gcc_assert (type
+ 		&& (aarch64_some_values_include_pst_objects_p (type)
+ 		    || (vec_flags & VEC_PARTIAL)));
+ 
    /* Size in bytes, rounded to the nearest multiple of 8 bytes.  */
    if (type)
      size = int_size_in_bytes (type);
*************** aarch64_layout_arg (cumulative_args_t pc
*** 3850,3855 ****
--- 5795,5801 ----
  						 mode,
  						 type,
  						 &nregs);
+   gcc_assert (!sve_p || !allocate_nvrn);
  
    /* allocate_ncrn may be false-positive, but allocate_nvrn is quite reliable.
       The following code thus handles passing by SIMD/FP registers first.  */
*************** aarch64_layout_arg (cumulative_args_t pc
*** 3860,3866 ****
       and homogenous short-vector aggregates (HVA).  */
    if (allocate_nvrn)
      {
!       if (!TARGET_FLOAT)
  	aarch64_err_no_fpadvsimd (mode);
  
        if (nvrn + nregs <= NUM_FP_ARG_REGS)
--- 5806,5812 ----
       and homogenous short-vector aggregates (HVA).  */
    if (allocate_nvrn)
      {
!       if (!pcum->silent_p && !TARGET_FLOAT)
  	aarch64_err_no_fpadvsimd (mode);
  
        if (nvrn + nregs <= NUM_FP_ARG_REGS)
*************** aarch64_layout_arg (cumulative_args_t pc
*** 3925,3934 ****
  	  gcc_assert (ncrn + nregs <= NUM_ARG_REGS);
  	}
  
        /* NREGS can be 0 when e.g. an empty structure is to be passed.
  	 A reg is still generated for it, but the caller should be smart
  	 enough not to use it.  */
!       if (nregs == 0 || nregs == 1 || GET_MODE_CLASS (mode) == MODE_INT)
  	pcum->aapcs_reg = gen_rtx_REG (mode, R0_REGNUM + ncrn);
        else
  	{
--- 5871,5894 ----
  	  gcc_assert (ncrn + nregs <= NUM_ARG_REGS);
  	}
  
+       /* If an argument with an SVE mode needs to be shifted up to the
+ 	 high part of the register, treat it as though it had an integer mode.
+ 	 Using the normal (parallel [...]) would suppress the shifting.  */
+       if (sve_p
+ 	  && BYTES_BIG_ENDIAN
+ 	  && maybe_ne (GET_MODE_SIZE (mode), nregs * UNITS_PER_WORD)
+ 	  && aarch64_pad_reg_upward (mode, type, false))
+ 	{
+ 	  mode = int_mode_for_mode (mode).require ();
+ 	  sve_p = false;
+ 	}
+ 
        /* NREGS can be 0 when e.g. an empty structure is to be passed.
  	 A reg is still generated for it, but the caller should be smart
  	 enough not to use it.  */
!       if (nregs == 0
! 	  || (nregs == 1 && !sve_p)
! 	  || GET_MODE_CLASS (mode) == MODE_INT)
  	pcum->aapcs_reg = gen_rtx_REG (mode, R0_REGNUM + ncrn);
        else
  	{
*************** aarch64_layout_arg (cumulative_args_t pc
*** 3938,3944 ****
  	  par = gen_rtx_PARALLEL (mode, rtvec_alloc (nregs));
  	  for (i = 0; i < nregs; i++)
  	    {
! 	      rtx tmp = gen_rtx_REG (word_mode, R0_REGNUM + ncrn + i);
  	      tmp = gen_rtx_EXPR_LIST (VOIDmode, tmp,
  				       GEN_INT (i * UNITS_PER_WORD));
  	      XVECEXP (par, 0, i) = tmp;
--- 5898,5907 ----
  	  par = gen_rtx_PARALLEL (mode, rtvec_alloc (nregs));
  	  for (i = 0; i < nregs; i++)
  	    {
! 	      scalar_int_mode reg_mode = word_mode;
! 	      if (nregs == 1)
! 		reg_mode = int_mode_for_mode (mode).require ();
! 	      rtx tmp = gen_rtx_REG (reg_mode, R0_REGNUM + ncrn + i);
  	      tmp = gen_rtx_EXPR_LIST (VOIDmode, tmp,
  				       GEN_INT (i * UNITS_PER_WORD));
  	      XVECEXP (par, 0, i) = tmp;
*************** on_stack:
*** 3976,4012 ****
  /* Implement TARGET_FUNCTION_ARG.  */
  
  static rtx
! aarch64_function_arg (cumulative_args_t pcum_v, machine_mode mode,
! 		      const_tree type, bool named)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
!   gcc_assert (pcum->pcs_variant == ARM_PCS_AAPCS64);
  
!   if (mode == VOIDmode)
!     return NULL_RTX;
  
!   aarch64_layout_arg (pcum_v, mode, type, named);
    return pcum->aapcs_reg;
  }
  
  void
  aarch64_init_cumulative_args (CUMULATIVE_ARGS *pcum,
! 			   const_tree fntype ATTRIBUTE_UNUSED,
! 			   rtx libname ATTRIBUTE_UNUSED,
! 			   const_tree fndecl ATTRIBUTE_UNUSED,
! 			   unsigned n_named ATTRIBUTE_UNUSED)
  {
    pcum->aapcs_ncrn = 0;
    pcum->aapcs_nvrn = 0;
    pcum->aapcs_nextncrn = 0;
    pcum->aapcs_nextnvrn = 0;
!   pcum->pcs_variant = ARM_PCS_AAPCS64;
    pcum->aapcs_reg = NULL_RTX;
    pcum->aapcs_arg_processed = false;
    pcum->aapcs_stack_words = 0;
    pcum->aapcs_stack_size = 0;
  
!   if (!TARGET_FLOAT
        && fndecl && TREE_PUBLIC (fndecl)
        && fntype && fntype != error_mark_node)
      {
--- 5939,5984 ----
  /* Implement TARGET_FUNCTION_ARG.  */
  
  static rtx
! aarch64_function_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
!   gcc_assert (pcum->pcs_variant == ARM_PCS_AAPCS64
! 	      || pcum->pcs_variant == ARM_PCS_SIMD
! 	      || pcum->pcs_variant == ARM_PCS_SVE);
  
!   if (arg.end_marker_p ())
!     return gen_int_mode (pcum->pcs_variant, DImode);
  
!   aarch64_layout_arg (pcum_v, arg);
    return pcum->aapcs_reg;
  }
  
  void
  aarch64_init_cumulative_args (CUMULATIVE_ARGS *pcum,
! 			      const_tree fntype,
! 			      rtx libname ATTRIBUTE_UNUSED,
! 			      const_tree fndecl ATTRIBUTE_UNUSED,
! 			      unsigned n_named ATTRIBUTE_UNUSED,
! 			      bool silent_p)
  {
    pcum->aapcs_ncrn = 0;
    pcum->aapcs_nvrn = 0;
+   pcum->aapcs_nprn = 0;
    pcum->aapcs_nextncrn = 0;
    pcum->aapcs_nextnvrn = 0;
!   pcum->aapcs_nextnprn = 0;
!   if (fntype)
!     pcum->pcs_variant = (arm_pcs) fntype_abi (fntype).id ();
!   else
!     pcum->pcs_variant = ARM_PCS_AAPCS64;
    pcum->aapcs_reg = NULL_RTX;
    pcum->aapcs_arg_processed = false;
    pcum->aapcs_stack_words = 0;
    pcum->aapcs_stack_size = 0;
+   pcum->silent_p = silent_p;
  
!   if (!silent_p
!       && !TARGET_FLOAT
        && fndecl && TREE_PUBLIC (fndecl)
        && fntype && fntype != error_mark_node)
      {
*************** aarch64_init_cumulative_args (CUMULATIVE
*** 4014,4040 ****
        machine_mode mode ATTRIBUTE_UNUSED; /* To pass pointer as argument.  */
        int nregs ATTRIBUTE_UNUSED; /* Likewise.  */
        if (aarch64_vfp_is_call_or_return_candidate (TYPE_MODE (type), type,
! 						   &mode, &nregs, NULL))
  	aarch64_err_no_fpadvsimd (TYPE_MODE (type));
      }
!   return;
  }
  
  static void
  aarch64_function_arg_advance (cumulative_args_t pcum_v,
! 			      machine_mode mode,
! 			      const_tree type,
! 			      bool named)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
!   if (pcum->pcs_variant == ARM_PCS_AAPCS64)
      {
!       aarch64_layout_arg (pcum_v, mode, type, named);
        gcc_assert ((pcum->aapcs_reg != NULL_RTX)
  		  != (pcum->aapcs_stack_words != 0));
        pcum->aapcs_arg_processed = false;
        pcum->aapcs_ncrn = pcum->aapcs_nextncrn;
        pcum->aapcs_nvrn = pcum->aapcs_nextnvrn;
        pcum->aapcs_stack_size += pcum->aapcs_stack_words;
        pcum->aapcs_stack_words = 0;
        pcum->aapcs_reg = NULL_RTX;
--- 5986,6026 ----
        machine_mode mode ATTRIBUTE_UNUSED; /* To pass pointer as argument.  */
        int nregs ATTRIBUTE_UNUSED; /* Likewise.  */
        if (aarch64_vfp_is_call_or_return_candidate (TYPE_MODE (type), type,
! 						   &mode, &nregs, NULL, false))
  	aarch64_err_no_fpadvsimd (TYPE_MODE (type));
      }
! 
!   if (!silent_p
!       && !TARGET_SVE
!       && pcum->pcs_variant == ARM_PCS_SVE)
!     {
!       /* We can't gracefully recover at this point, so make this a
! 	 fatal error.  */
!       if (fndecl)
! 	fatal_error (input_location, "%qE requires the SVE ISA extension",
! 		     fndecl);
!       else
! 	fatal_error (input_location, "calls to functions of type %qT require"
! 		     " the SVE ISA extension", fntype);
!     }
  }
  
  static void
  aarch64_function_arg_advance (cumulative_args_t pcum_v,
! 			      const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
!   if (pcum->pcs_variant == ARM_PCS_AAPCS64
!       || pcum->pcs_variant == ARM_PCS_SIMD
!       || pcum->pcs_variant == ARM_PCS_SVE)
      {
!       aarch64_layout_arg (pcum_v, arg);
        gcc_assert ((pcum->aapcs_reg != NULL_RTX)
  		  != (pcum->aapcs_stack_words != 0));
        pcum->aapcs_arg_processed = false;
        pcum->aapcs_ncrn = pcum->aapcs_nextncrn;
        pcum->aapcs_nvrn = pcum->aapcs_nextnvrn;
+       pcum->aapcs_nprn = pcum->aapcs_nextnprn;
        pcum->aapcs_stack_size += pcum->aapcs_stack_words;
        pcum->aapcs_stack_words = 0;
        pcum->aapcs_reg = NULL_RTX;
*************** aarch64_pad_reg_upward (machine_mode mod
*** 4137,4143 ****
  		     bool first ATTRIBUTE_UNUSED)
  {
  
!   /* Small composite types are always padded upward.  */
    if (BYTES_BIG_ENDIAN && aarch64_composite_type_p (type, mode))
      {
        HOST_WIDE_INT size;
--- 6123,6130 ----
  		     bool first ATTRIBUTE_UNUSED)
  {
  
!   /* Aside from pure scalable types, small composite types are always
!      padded upward.  */
    if (BYTES_BIG_ENDIAN && aarch64_composite_type_p (type, mode))
      {
        HOST_WIDE_INT size;
*************** aarch64_pad_reg_upward (machine_mode mod
*** 4148,4154 ****
  	   shouldn't be asked to pass or return them.  */
  	size = GET_MODE_SIZE (mode).to_constant ();
        if (size < 2 * UNITS_PER_WORD)
! 	return true;
      }
  
    /* Otherwise, use the default padding.  */
--- 6135,6146 ----
  	   shouldn't be asked to pass or return them.  */
  	size = GET_MODE_SIZE (mode).to_constant ();
        if (size < 2 * UNITS_PER_WORD)
! 	{
! 	  pure_scalable_type_info pst_info;
! 	  if (pst_info.analyze_registers (type))
! 	    return false;
! 	  return true;
! 	}
      }
  
    /* Otherwise, use the default padding.  */
*************** aarch64_output_probe_stack_range (rtx re
*** 4325,4331 ****
    ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, loop_lab);
  
    HOST_WIDE_INT stack_clash_probe_interval
!     = 1 << PARAM_VALUE (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE);
  
    /* TEST_ADDR = TEST_ADDR + PROBE_INTERVAL.  */
    xops[0] = reg1;
--- 6317,6323 ----
    ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, loop_lab);
  
    HOST_WIDE_INT stack_clash_probe_interval
!     = 1 << param_stack_clash_protection_guard_size;
  
    /* TEST_ADDR = TEST_ADDR + PROBE_INTERVAL.  */
    xops[0] = reg1;
*************** aarch64_needs_frame_chain (void)
*** 4467,4477 ****
  static void
  aarch64_layout_frame (void)
  {
!   HOST_WIDE_INT offset = 0;
    int regno, last_fp_reg = INVALID_REGNUM;
!   bool simd_function = aarch64_simd_decl_p (cfun->decl);
  
!   cfun->machine->frame.emit_frame_chain = aarch64_needs_frame_chain ();
  
    /* Adjust the outgoing arguments size if required.  Keep it in sync with what
       the mid-end is doing.  */
--- 6459,6472 ----
  static void
  aarch64_layout_frame (void)
  {
!   poly_int64 offset = 0;
    int regno, last_fp_reg = INVALID_REGNUM;
!   machine_mode vector_save_mode = aarch64_reg_save_mode (V8_REGNUM);
!   poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode);
!   bool frame_related_fp_reg_p = false;
!   aarch64_frame &frame = cfun->machine->frame;
  
!   frame.emit_frame_chain = aarch64_needs_frame_chain ();
  
    /* Adjust the outgoing arguments size if required.  Keep it in sync with what
       the mid-end is doing.  */
*************** aarch64_layout_frame (void)
*** 4480,4663 ****
  #define SLOT_NOT_REQUIRED (-2)
  #define SLOT_REQUIRED     (-1)
  
!   cfun->machine->frame.wb_candidate1 = INVALID_REGNUM;
!   cfun->machine->frame.wb_candidate2 = INVALID_REGNUM;
! 
!   /* If this is a non-leaf simd function with calls we assume that
!      at least one of those calls is to a non-simd function and thus
!      we must save V8 to V23 in the prologue.  */
! 
!   if (simd_function && !crtl->is_leaf)
!     {
!       for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
! 	if (FP_SIMD_SAVED_REGNUM_P (regno))
!  	  df_set_regs_ever_live (regno, true);
!     }
  
    /* First mark all the registers that really need to be saved...  */
!   for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++)
!     cfun->machine->frame.reg_offset[regno] = SLOT_NOT_REQUIRED;
! 
!   for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
!     cfun->machine->frame.reg_offset[regno] = SLOT_NOT_REQUIRED;
  
    /* ... that includes the eh data registers (if needed)...  */
    if (crtl->calls_eh_return)
      for (regno = 0; EH_RETURN_DATA_REGNO (regno) != INVALID_REGNUM; regno++)
!       cfun->machine->frame.reg_offset[EH_RETURN_DATA_REGNO (regno)]
! 	= SLOT_REQUIRED;
  
    /* ... and any callee saved register that dataflow says is live.  */
    for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++)
      if (df_regs_ever_live_p (regno)
  	&& (regno == R30_REGNUM
! 	    || !call_used_regs[regno]))
!       cfun->machine->frame.reg_offset[regno] = SLOT_REQUIRED;
  
    for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
      if (df_regs_ever_live_p (regno)
! 	&& (!call_used_regs[regno]
! 	    || (simd_function && FP_SIMD_SAVED_REGNUM_P (regno))))
        {
! 	cfun->machine->frame.reg_offset[regno] = SLOT_REQUIRED;
  	last_fp_reg = regno;
        }
  
!   if (cfun->machine->frame.emit_frame_chain)
      {
!       /* FP and LR are placed in the linkage record.  */
!       cfun->machine->frame.reg_offset[R29_REGNUM] = 0;
!       cfun->machine->frame.wb_candidate1 = R29_REGNUM;
!       cfun->machine->frame.reg_offset[R30_REGNUM] = UNITS_PER_WORD;
!       cfun->machine->frame.wb_candidate2 = R30_REGNUM;
!       offset = 2 * UNITS_PER_WORD;
      }
  
    /* With stack-clash, LR must be saved in non-leaf functions.  */
    gcc_assert (crtl->is_leaf
! 	      || (cfun->machine->frame.reg_offset[R30_REGNUM]
! 		  != SLOT_NOT_REQUIRED));
  
-   /* Now assign stack slots for them.  */
    for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++)
!     if (cfun->machine->frame.reg_offset[regno] == SLOT_REQUIRED)
        {
! 	cfun->machine->frame.reg_offset[regno] = offset;
! 	if (cfun->machine->frame.wb_candidate1 == INVALID_REGNUM)
! 	  cfun->machine->frame.wb_candidate1 = regno;
! 	else if (cfun->machine->frame.wb_candidate2 == INVALID_REGNUM)
! 	  cfun->machine->frame.wb_candidate2 = regno;
  	offset += UNITS_PER_WORD;
        }
  
!   HOST_WIDE_INT max_int_offset = offset;
!   offset = ROUND_UP (offset, STACK_BOUNDARY / BITS_PER_UNIT);
!   bool has_align_gap = offset != max_int_offset;
  
    for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
!     if (cfun->machine->frame.reg_offset[regno] == SLOT_REQUIRED)
        {
  	/* If there is an alignment gap between integer and fp callee-saves,
  	   allocate the last fp register to it if possible.  */
  	if (regno == last_fp_reg
  	    && has_align_gap
! 	    && !simd_function
! 	    && (offset & 8) == 0)
  	  {
! 	    cfun->machine->frame.reg_offset[regno] = max_int_offset;
  	    break;
  	  }
  
! 	cfun->machine->frame.reg_offset[regno] = offset;
! 	if (cfun->machine->frame.wb_candidate1 == INVALID_REGNUM)
! 	  cfun->machine->frame.wb_candidate1 = regno;
! 	else if (cfun->machine->frame.wb_candidate2 == INVALID_REGNUM
! 		 && cfun->machine->frame.wb_candidate1 >= V0_REGNUM)
! 	  cfun->machine->frame.wb_candidate2 = regno;
! 	offset += simd_function ? UNITS_PER_VREG : UNITS_PER_WORD;
        }
  
!   offset = ROUND_UP (offset, STACK_BOUNDARY / BITS_PER_UNIT);
  
!   cfun->machine->frame.saved_regs_size = offset;
  
!   HOST_WIDE_INT varargs_and_saved_regs_size
!     = offset + cfun->machine->frame.saved_varargs_size;
  
!   cfun->machine->frame.hard_fp_offset
      = aligned_upper_bound (varargs_and_saved_regs_size
  			   + get_frame_size (),
  			   STACK_BOUNDARY / BITS_PER_UNIT);
  
    /* Both these values are already aligned.  */
    gcc_assert (multiple_p (crtl->outgoing_args_size,
  			  STACK_BOUNDARY / BITS_PER_UNIT));
!   cfun->machine->frame.frame_size
!     = (cfun->machine->frame.hard_fp_offset
!        + crtl->outgoing_args_size);
  
!   cfun->machine->frame.locals_offset = cfun->machine->frame.saved_varargs_size;
  
!   cfun->machine->frame.initial_adjust = 0;
!   cfun->machine->frame.final_adjust = 0;
!   cfun->machine->frame.callee_adjust = 0;
!   cfun->machine->frame.callee_offset = 0;
  
    HOST_WIDE_INT max_push_offset = 0;
!   if (cfun->machine->frame.wb_candidate2 != INVALID_REGNUM)
      max_push_offset = 512;
!   else if (cfun->machine->frame.wb_candidate1 != INVALID_REGNUM)
      max_push_offset = 256;
  
!   HOST_WIDE_INT const_size, const_fp_offset;
!   if (cfun->machine->frame.frame_size.is_constant (&const_size)
        && const_size < max_push_offset
!       && known_eq (crtl->outgoing_args_size, 0))
      {
        /* Simple, small frame with no outgoing arguments:
  	 stp reg1, reg2, [sp, -frame_size]!
  	 stp reg3, reg4, [sp, 16]  */
!       cfun->machine->frame.callee_adjust = const_size;
      }
!   else if (known_lt (crtl->outgoing_args_size
! 		     + cfun->machine->frame.saved_regs_size, 512)
  	   && !(cfun->calls_alloca
! 		&& known_lt (cfun->machine->frame.hard_fp_offset,
! 			     max_push_offset)))
      {
        /* Frame with small outgoing arguments:
  	 sub sp, sp, frame_size
  	 stp reg1, reg2, [sp, outgoing_args_size]
  	 stp reg3, reg4, [sp, outgoing_args_size + 16]  */
!       cfun->machine->frame.initial_adjust = cfun->machine->frame.frame_size;
!       cfun->machine->frame.callee_offset
! 	= cfun->machine->frame.frame_size - cfun->machine->frame.hard_fp_offset;
      }
!   else if (cfun->machine->frame.hard_fp_offset.is_constant (&const_fp_offset)
  	   && const_fp_offset < max_push_offset)
      {
!       /* Frame with large outgoing arguments but a small local area:
  	 stp reg1, reg2, [sp, -hard_fp_offset]!
  	 stp reg3, reg4, [sp, 16]
  	 sub sp, sp, outgoing_args_size  */
!       cfun->machine->frame.callee_adjust = const_fp_offset;
!       cfun->machine->frame.final_adjust
! 	= cfun->machine->frame.frame_size - cfun->machine->frame.callee_adjust;
      }
    else
      {
!       /* Frame with large local area and outgoing arguments using frame pointer:
  	 sub sp, sp, hard_fp_offset
  	 stp x29, x30, [sp, 0]
  	 add x29, sp, 0
  	 stp reg3, reg4, [sp, 16]
  	 sub sp, sp, outgoing_args_size  */
!       cfun->machine->frame.initial_adjust = cfun->machine->frame.hard_fp_offset;
!       cfun->machine->frame.final_adjust
! 	= cfun->machine->frame.frame_size - cfun->machine->frame.initial_adjust;
      }
  
!   cfun->machine->frame.laid_out = true;
  }
  
  /* Return true if the register REGNO is saved on entry to
--- 6475,6755 ----
  #define SLOT_NOT_REQUIRED (-2)
  #define SLOT_REQUIRED     (-1)
  
!   frame.wb_candidate1 = INVALID_REGNUM;
!   frame.wb_candidate2 = INVALID_REGNUM;
!   frame.spare_pred_reg = INVALID_REGNUM;
  
    /* First mark all the registers that really need to be saved...  */
!   for (regno = 0; regno <= LAST_SAVED_REGNUM; regno++)
!     frame.reg_offset[regno] = SLOT_NOT_REQUIRED;
  
    /* ... that includes the eh data registers (if needed)...  */
    if (crtl->calls_eh_return)
      for (regno = 0; EH_RETURN_DATA_REGNO (regno) != INVALID_REGNUM; regno++)
!       frame.reg_offset[EH_RETURN_DATA_REGNO (regno)] = SLOT_REQUIRED;
  
    /* ... and any callee saved register that dataflow says is live.  */
    for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++)
      if (df_regs_ever_live_p (regno)
+ 	&& !fixed_regs[regno]
  	&& (regno == R30_REGNUM
! 	    || !crtl->abi->clobbers_full_reg_p (regno)))
!       frame.reg_offset[regno] = SLOT_REQUIRED;
  
    for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
      if (df_regs_ever_live_p (regno)
! 	&& !fixed_regs[regno]
! 	&& !crtl->abi->clobbers_full_reg_p (regno))
        {
! 	frame.reg_offset[regno] = SLOT_REQUIRED;
  	last_fp_reg = regno;
+ 	if (aarch64_emit_cfi_for_reg_p (regno))
+ 	  frame_related_fp_reg_p = true;
        }
  
!   /* Big-endian SVE frames need a spare predicate register in order
!      to save Z8-Z15.  Decide which register they should use.  Prefer
!      an unused argument register if possible, so that we don't force P4
!      to be saved unnecessarily.  */
!   if (frame_related_fp_reg_p
!       && crtl->abi->id () == ARM_PCS_SVE
!       && BYTES_BIG_ENDIAN)
      {
!       bitmap live1 = df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun));
!       bitmap live2 = df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun));
!       for (regno = P0_REGNUM; regno <= P7_REGNUM; regno++)
! 	if (!bitmap_bit_p (live1, regno) && !bitmap_bit_p (live2, regno))
! 	  break;
!       gcc_assert (regno <= P7_REGNUM);
!       frame.spare_pred_reg = regno;
!       df_set_regs_ever_live (regno, true);
      }
  
+   for (regno = P0_REGNUM; regno <= P15_REGNUM; regno++)
+     if (df_regs_ever_live_p (regno)
+ 	&& !fixed_regs[regno]
+ 	&& !crtl->abi->clobbers_full_reg_p (regno))
+       frame.reg_offset[regno] = SLOT_REQUIRED;
+ 
    /* With stack-clash, LR must be saved in non-leaf functions.  */
    gcc_assert (crtl->is_leaf
! 	      || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED));
! 
!   /* Now assign stack slots for the registers.  Start with the predicate
!      registers, since predicate LDR and STR have a relatively small
!      offset range.  These saves happen below the hard frame pointer.  */
!   for (regno = P0_REGNUM; regno <= P15_REGNUM; regno++)
!     if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
!       {
! 	frame.reg_offset[regno] = offset;
! 	offset += BYTES_PER_SVE_PRED;
!       }
! 
!   if (maybe_ne (offset, 0))
!     {
!       /* If we have any vector registers to save above the predicate registers,
! 	 the offset of the vector register save slots need to be a multiple
! 	 of the vector size.  This lets us use the immediate forms of LDR/STR
! 	 (or LD1/ST1 for big-endian).
! 
! 	 A vector register is 8 times the size of a predicate register,
! 	 and we need to save a maximum of 12 predicate registers, so the
! 	 first vector register will be at either #1, MUL VL or #2, MUL VL.
! 
! 	 If we don't have any vector registers to save, and we know how
! 	 big the predicate save area is, we can just round it up to the
! 	 next 16-byte boundary.  */
!       if (last_fp_reg == (int) INVALID_REGNUM && offset.is_constant ())
! 	offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
!       else
! 	{
! 	  if (known_le (offset, vector_save_size))
! 	    offset = vector_save_size;
! 	  else if (known_le (offset, vector_save_size * 2))
! 	    offset = vector_save_size * 2;
! 	  else
! 	    gcc_unreachable ();
! 	}
!     }
! 
!   /* If we need to save any SVE vector registers, add them next.  */
!   if (last_fp_reg != (int) INVALID_REGNUM && crtl->abi->id () == ARM_PCS_SVE)
!     for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
!       if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
! 	{
! 	  frame.reg_offset[regno] = offset;
! 	  offset += vector_save_size;
! 	}
! 
!   /* OFFSET is now the offset of the hard frame pointer from the bottom
!      of the callee save area.  */
!   bool saves_below_hard_fp_p = maybe_ne (offset, 0);
!   frame.below_hard_fp_saved_regs_size = offset;
!   if (frame.emit_frame_chain)
!     {
!       /* FP and LR are placed in the linkage record.  */
!       frame.reg_offset[R29_REGNUM] = offset;
!       frame.wb_candidate1 = R29_REGNUM;
!       frame.reg_offset[R30_REGNUM] = offset + UNITS_PER_WORD;
!       frame.wb_candidate2 = R30_REGNUM;
!       offset += 2 * UNITS_PER_WORD;
!     }
  
    for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++)
!     if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
        {
! 	frame.reg_offset[regno] = offset;
! 	if (frame.wb_candidate1 == INVALID_REGNUM)
! 	  frame.wb_candidate1 = regno;
! 	else if (frame.wb_candidate2 == INVALID_REGNUM)
! 	  frame.wb_candidate2 = regno;
  	offset += UNITS_PER_WORD;
        }
  
!   poly_int64 max_int_offset = offset;
!   offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
!   bool has_align_gap = maybe_ne (offset, max_int_offset);
  
    for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
!     if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
        {
  	/* If there is an alignment gap between integer and fp callee-saves,
  	   allocate the last fp register to it if possible.  */
  	if (regno == last_fp_reg
  	    && has_align_gap
! 	    && known_eq (vector_save_size, 8)
! 	    && multiple_p (offset, 16))
  	  {
! 	    frame.reg_offset[regno] = max_int_offset;
  	    break;
  	  }
  
! 	frame.reg_offset[regno] = offset;
! 	if (frame.wb_candidate1 == INVALID_REGNUM)
! 	  frame.wb_candidate1 = regno;
! 	else if (frame.wb_candidate2 == INVALID_REGNUM
! 		 && frame.wb_candidate1 >= V0_REGNUM)
! 	  frame.wb_candidate2 = regno;
! 	offset += vector_save_size;
        }
  
!   offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
  
!   frame.saved_regs_size = offset;
  
!   poly_int64 varargs_and_saved_regs_size = offset + frame.saved_varargs_size;
  
!   poly_int64 above_outgoing_args
      = aligned_upper_bound (varargs_and_saved_regs_size
  			   + get_frame_size (),
  			   STACK_BOUNDARY / BITS_PER_UNIT);
  
+   frame.hard_fp_offset
+     = above_outgoing_args - frame.below_hard_fp_saved_regs_size;
+ 
    /* Both these values are already aligned.  */
    gcc_assert (multiple_p (crtl->outgoing_args_size,
  			  STACK_BOUNDARY / BITS_PER_UNIT));
!   frame.frame_size = above_outgoing_args + crtl->outgoing_args_size;
  
!   frame.locals_offset = frame.saved_varargs_size;
  
!   frame.initial_adjust = 0;
!   frame.final_adjust = 0;
!   frame.callee_adjust = 0;
!   frame.sve_callee_adjust = 0;
!   frame.callee_offset = 0;
  
    HOST_WIDE_INT max_push_offset = 0;
!   if (frame.wb_candidate2 != INVALID_REGNUM)
      max_push_offset = 512;
!   else if (frame.wb_candidate1 != INVALID_REGNUM)
      max_push_offset = 256;
  
!   HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset;
!   HOST_WIDE_INT const_saved_regs_size;
!   if (frame.frame_size.is_constant (&const_size)
        && const_size < max_push_offset
!       && known_eq (frame.hard_fp_offset, const_size))
      {
        /* Simple, small frame with no outgoing arguments:
+ 
  	 stp reg1, reg2, [sp, -frame_size]!
  	 stp reg3, reg4, [sp, 16]  */
!       frame.callee_adjust = const_size;
      }
!   else if (crtl->outgoing_args_size.is_constant (&const_outgoing_args_size)
! 	   && frame.saved_regs_size.is_constant (&const_saved_regs_size)
! 	   && const_outgoing_args_size + const_saved_regs_size < 512
! 	   /* We could handle this case even with outgoing args, provided
! 	      that the number of args left us with valid offsets for all
! 	      predicate and vector save slots.  It's such a rare case that
! 	      it hardly seems worth the effort though.  */
! 	   && (!saves_below_hard_fp_p || const_outgoing_args_size == 0)
  	   && !(cfun->calls_alloca
! 		&& frame.hard_fp_offset.is_constant (&const_fp_offset)
! 		&& const_fp_offset < max_push_offset))
      {
        /* Frame with small outgoing arguments:
+ 
  	 sub sp, sp, frame_size
  	 stp reg1, reg2, [sp, outgoing_args_size]
  	 stp reg3, reg4, [sp, outgoing_args_size + 16]  */
!       frame.initial_adjust = frame.frame_size;
!       frame.callee_offset = const_outgoing_args_size;
      }
!   else if (saves_below_hard_fp_p
! 	   && known_eq (frame.saved_regs_size,
! 			frame.below_hard_fp_saved_regs_size))
!     {
!       /* Frame in which all saves are SVE saves:
! 
! 	 sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size
! 	 save SVE registers relative to SP
! 	 sub sp, sp, outgoing_args_size  */
!       frame.initial_adjust = (frame.hard_fp_offset
! 			      + frame.below_hard_fp_saved_regs_size);
!       frame.final_adjust = crtl->outgoing_args_size;
!     }
!   else if (frame.hard_fp_offset.is_constant (&const_fp_offset)
  	   && const_fp_offset < max_push_offset)
      {
!       /* Frame with large outgoing arguments or SVE saves, but with
! 	 a small local area:
! 
  	 stp reg1, reg2, [sp, -hard_fp_offset]!
  	 stp reg3, reg4, [sp, 16]
+ 	 [sub sp, sp, below_hard_fp_saved_regs_size]
+ 	 [save SVE registers relative to SP]
  	 sub sp, sp, outgoing_args_size  */
!       frame.callee_adjust = const_fp_offset;
!       frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size;
!       frame.final_adjust = crtl->outgoing_args_size;
      }
    else
      {
!       /* Frame with large local area and outgoing arguments or SVE saves,
! 	 using frame pointer:
! 
  	 sub sp, sp, hard_fp_offset
  	 stp x29, x30, [sp, 0]
  	 add x29, sp, 0
  	 stp reg3, reg4, [sp, 16]
+ 	 [sub sp, sp, below_hard_fp_saved_regs_size]
+ 	 [save SVE registers relative to SP]
  	 sub sp, sp, outgoing_args_size  */
!       frame.initial_adjust = frame.hard_fp_offset;
!       frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size;
!       frame.final_adjust = crtl->outgoing_args_size;
      }
  
!   /* Make sure the individual adjustments add up to the full frame size.  */
!   gcc_assert (known_eq (frame.initial_adjust
! 			+ frame.callee_adjust
! 			+ frame.sve_callee_adjust
! 			+ frame.final_adjust, frame.frame_size));
! 
!   frame.laid_out = true;
  }
  
  /* Return true if the register REGNO is saved on entry to
*************** aarch64_layout_frame (void)
*** 4666,4672 ****
  static bool
  aarch64_register_saved_on_entry (int regno)
  {
!   return cfun->machine->frame.reg_offset[regno] >= 0;
  }
  
  /* Return the next register up from REGNO up to LIMIT for the callee
--- 6758,6764 ----
  static bool
  aarch64_register_saved_on_entry (int regno)
  {
!   return known_ge (cfun->machine->frame.reg_offset[regno], 0);
  }
  
  /* Return the next register up from REGNO up to LIMIT for the callee
*************** static void
*** 4733,4739 ****
  aarch64_push_regs (unsigned regno1, unsigned regno2, HOST_WIDE_INT adjustment)
  {
    rtx_insn *insn;
!   machine_mode mode = aarch64_reg_save_mode (cfun->decl, regno1);
  
    if (regno2 == INVALID_REGNUM)
      return aarch64_pushwb_single_reg (mode, regno1, adjustment);
--- 6825,6831 ----
  aarch64_push_regs (unsigned regno1, unsigned regno2, HOST_WIDE_INT adjustment)
  {
    rtx_insn *insn;
!   machine_mode mode = aarch64_reg_save_mode (regno1);
  
    if (regno2 == INVALID_REGNUM)
      return aarch64_pushwb_single_reg (mode, regno1, adjustment);
*************** static void
*** 4779,4785 ****
  aarch64_pop_regs (unsigned regno1, unsigned regno2, HOST_WIDE_INT adjustment,
  		  rtx *cfi_ops)
  {
!   machine_mode mode = aarch64_reg_save_mode (cfun->decl, regno1);
    rtx reg1 = gen_rtx_REG (mode, regno1);
  
    *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg1, *cfi_ops);
--- 6871,6877 ----
  aarch64_pop_regs (unsigned regno1, unsigned regno2, HOST_WIDE_INT adjustment,
  		  rtx *cfi_ops)
  {
!   machine_mode mode = aarch64_reg_save_mode (regno1);
    rtx reg1 = gen_rtx_REG (mode, regno1);
  
    *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg1, *cfi_ops);
*************** aarch64_return_address_signing_enabled (
*** 4855,4864 ****
    gcc_assert (cfun->machine->frame.laid_out);
  
    /* If signing scope is AARCH64_FUNCTION_NON_LEAF, we only sign a leaf function
!      if it's LR is pushed onto stack.  */
    return (aarch64_ra_sign_scope == AARCH64_FUNCTION_ALL
  	  || (aarch64_ra_sign_scope == AARCH64_FUNCTION_NON_LEAF
! 	      && cfun->machine->frame.reg_offset[LR_REGNUM] >= 0));
  }
  
  /* Return TRUE if Branch Target Identification Mechanism is enabled.  */
--- 6947,6956 ----
    gcc_assert (cfun->machine->frame.laid_out);
  
    /* If signing scope is AARCH64_FUNCTION_NON_LEAF, we only sign a leaf function
!      if its LR is pushed onto stack.  */
    return (aarch64_ra_sign_scope == AARCH64_FUNCTION_ALL
  	  || (aarch64_ra_sign_scope == AARCH64_FUNCTION_NON_LEAF
! 	      && known_ge (cfun->machine->frame.reg_offset[LR_REGNUM], 0)));
  }
  
  /* Return TRUE if Branch Target Identification Mechanism is enabled.  */
*************** aarch64_bti_enabled (void)
*** 4868,4884 ****
    return (aarch64_enable_bti == 1);
  }
  
  /* Emit code to save the callee-saved registers from register number START
     to LIMIT to the stack at the location starting at offset START_OFFSET,
!    skipping any write-back candidates if SKIP_WB is true.  */
  
  static void
! aarch64_save_callee_saves (machine_mode mode, poly_int64 start_offset,
! 			   unsigned start, unsigned limit, bool skip_wb)
  {
    rtx_insn *insn;
    unsigned regno;
    unsigned regno2;
  
    for (regno = aarch64_next_callee_save (start, limit);
         regno <= limit;
--- 6960,7034 ----
    return (aarch64_enable_bti == 1);
  }
  
+ /* The caller is going to use ST1D or LD1D to save or restore an SVE
+    register in mode MODE at BASE_RTX + OFFSET, where OFFSET is in
+    the range [1, 16] * GET_MODE_SIZE (MODE).  Prepare for this by:
+ 
+      (1) updating BASE_RTX + OFFSET so that it is a legitimate ST1D
+ 	 or LD1D address
+ 
+      (2) setting PRED to a valid predicate register for the ST1D or LD1D,
+ 	 if the variable isn't already nonnull
+ 
+    (1) is needed when OFFSET is in the range [8, 16] * GET_MODE_SIZE (MODE).
+    Handle this case using a temporary base register that is suitable for
+    all offsets in that range.  Use ANCHOR_REG as this base register if it
+    is nonnull, otherwise create a new register and store it in ANCHOR_REG.  */
+ 
+ static inline void
+ aarch64_adjust_sve_callee_save_base (machine_mode mode, rtx &base_rtx,
+ 				     rtx &anchor_reg, poly_int64 &offset,
+ 				     rtx &ptrue)
+ {
+   if (maybe_ge (offset, 8 * GET_MODE_SIZE (mode)))
+     {
+       /* This is the maximum valid offset of the anchor from the base.
+ 	 Lower values would be valid too.  */
+       poly_int64 anchor_offset = 16 * GET_MODE_SIZE (mode);
+       if (!anchor_reg)
+ 	{
+ 	  anchor_reg = gen_rtx_REG (Pmode, STACK_CLASH_SVE_CFA_REGNUM);
+ 	  emit_insn (gen_add3_insn (anchor_reg, base_rtx,
+ 				    gen_int_mode (anchor_offset, Pmode)));
+ 	}
+       base_rtx = anchor_reg;
+       offset -= anchor_offset;
+     }
+   if (!ptrue)
+     {
+       int pred_reg = cfun->machine->frame.spare_pred_reg;
+       emit_move_insn (gen_rtx_REG (VNx16BImode, pred_reg),
+ 		      CONSTM1_RTX (VNx16BImode));
+       ptrue = gen_rtx_REG (VNx2BImode, pred_reg);
+     }
+ }
+ 
+ /* Add a REG_CFA_EXPRESSION note to INSN to say that register REG
+    is saved at BASE + OFFSET.  */
+ 
+ static void
+ aarch64_add_cfa_expression (rtx_insn *insn, rtx reg,
+ 			    rtx base, poly_int64 offset)
+ {
+   rtx mem = gen_frame_mem (GET_MODE (reg),
+ 			   plus_constant (Pmode, base, offset));
+   add_reg_note (insn, REG_CFA_EXPRESSION, gen_rtx_SET (mem, reg));
+ }
+ 
  /* Emit code to save the callee-saved registers from register number START
     to LIMIT to the stack at the location starting at offset START_OFFSET,
!    skipping any write-back candidates if SKIP_WB is true.  HARD_FP_VALID_P
!    is true if the hard frame pointer has been set up.  */
  
  static void
! aarch64_save_callee_saves (poly_int64 start_offset,
! 			   unsigned start, unsigned limit, bool skip_wb,
! 			   bool hard_fp_valid_p)
  {
    rtx_insn *insn;
    unsigned regno;
    unsigned regno2;
+   rtx anchor_reg = NULL_RTX, ptrue = NULL_RTX;
  
    for (regno = aarch64_next_callee_save (start, limit);
         regno <= limit;
*************** aarch64_save_callee_saves (machine_mode
*** 4886,4892 ****
      {
        rtx reg, mem;
        poly_int64 offset;
!       int offset_diff;
  
        if (skip_wb
  	  && (regno == cfun->machine->frame.wb_candidate1
--- 7036,7042 ----
      {
        rtx reg, mem;
        poly_int64 offset;
!       bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno);
  
        if (skip_wb
  	  && (regno == cfun->machine->frame.wb_candidate1
*************** aarch64_save_callee_saves (machine_mode
*** 4894,4920 ****
  	continue;
  
        if (cfun->machine->reg_is_wrapped_separately[regno])
!        continue;
  
        reg = gen_rtx_REG (mode, regno);
        offset = start_offset + cfun->machine->frame.reg_offset[regno];
!       mem = gen_frame_mem (mode, plus_constant (Pmode, stack_pointer_rtx,
! 						offset));
  
!       regno2 = aarch64_next_callee_save (regno + 1, limit);
!       offset_diff = cfun->machine->frame.reg_offset[regno2]
! 		    - cfun->machine->frame.reg_offset[regno];
  
!       if (regno2 <= limit
  	  && !cfun->machine->reg_is_wrapped_separately[regno2]
! 	  && known_eq (GET_MODE_SIZE (mode), offset_diff))
  	{
  	  rtx reg2 = gen_rtx_REG (mode, regno2);
  	  rtx mem2;
  
! 	  offset = start_offset + cfun->machine->frame.reg_offset[regno2];
! 	  mem2 = gen_frame_mem (mode, plus_constant (Pmode, stack_pointer_rtx,
! 						     offset));
  	  insn = emit_insn (aarch64_gen_store_pair (mode, mem, reg, mem2,
  						    reg2));
  
--- 7044,7096 ----
  	continue;
  
        if (cfun->machine->reg_is_wrapped_separately[regno])
! 	continue;
  
+       machine_mode mode = aarch64_reg_save_mode (regno);
        reg = gen_rtx_REG (mode, regno);
        offset = start_offset + cfun->machine->frame.reg_offset[regno];
!       rtx base_rtx = stack_pointer_rtx;
!       poly_int64 sp_offset = offset;
  
!       HOST_WIDE_INT const_offset;
!       if (mode == VNx2DImode && BYTES_BIG_ENDIAN)
! 	aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg,
! 					     offset, ptrue);
!       else if (GP_REGNUM_P (regno)
! 	       && (!offset.is_constant (&const_offset) || const_offset >= 512))
! 	{
! 	  gcc_assert (known_eq (start_offset, 0));
! 	  poly_int64 fp_offset
! 	    = cfun->machine->frame.below_hard_fp_saved_regs_size;
! 	  if (hard_fp_valid_p)
! 	    base_rtx = hard_frame_pointer_rtx;
! 	  else
! 	    {
! 	      if (!anchor_reg)
! 		{
! 		  anchor_reg = gen_rtx_REG (Pmode, STACK_CLASH_SVE_CFA_REGNUM);
! 		  emit_insn (gen_add3_insn (anchor_reg, base_rtx,
! 					    gen_int_mode (fp_offset, Pmode)));
! 		}
! 	      base_rtx = anchor_reg;
! 	    }
! 	  offset -= fp_offset;
! 	}
!       mem = gen_frame_mem (mode, plus_constant (Pmode, base_rtx, offset));
!       bool need_cfa_note_p = (base_rtx != stack_pointer_rtx);
  
!       if (!aarch64_sve_mode_p (mode)
! 	  && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit
  	  && !cfun->machine->reg_is_wrapped_separately[regno2]
! 	  && known_eq (GET_MODE_SIZE (mode),
! 		       cfun->machine->frame.reg_offset[regno2]
! 		       - cfun->machine->frame.reg_offset[regno]))
  	{
  	  rtx reg2 = gen_rtx_REG (mode, regno2);
  	  rtx mem2;
  
! 	  offset += GET_MODE_SIZE (mode);
! 	  mem2 = gen_frame_mem (mode, plus_constant (Pmode, base_rtx, offset));
  	  insn = emit_insn (aarch64_gen_store_pair (mode, mem, reg, mem2,
  						    reg2));
  
*************** aarch64_save_callee_saves (machine_mode
*** 4922,4992 ****
  	     always assumed to be relevant to the frame
  	     calculations; subsequent parts, are only
  	     frame-related if explicitly marked.  */
! 	  RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
  	  regno = regno2;
  	}
        else
  	insn = emit_move_insn (mem, reg);
  
!       RTX_FRAME_RELATED_P (insn) = 1;
      }
  }
  
! /* Emit code to restore the callee registers of mode MODE from register
!    number START up to and including LIMIT.  Restore from the stack offset
!    START_OFFSET, skipping any write-back candidates if SKIP_WB is true.
!    Write the appropriate REG_CFA_RESTORE notes into CFI_OPS.  */
  
  static void
! aarch64_restore_callee_saves (machine_mode mode,
! 			      poly_int64 start_offset, unsigned start,
  			      unsigned limit, bool skip_wb, rtx *cfi_ops)
  {
-   rtx base_rtx = stack_pointer_rtx;
    unsigned regno;
    unsigned regno2;
    poly_int64 offset;
  
    for (regno = aarch64_next_callee_save (start, limit);
         regno <= limit;
         regno = aarch64_next_callee_save (regno + 1, limit))
      {
        if (cfun->machine->reg_is_wrapped_separately[regno])
!        continue;
  
        rtx reg, mem;
-       int offset_diff;
  
        if (skip_wb
  	  && (regno == cfun->machine->frame.wb_candidate1
  	      || regno == cfun->machine->frame.wb_candidate2))
  	continue;
  
        reg = gen_rtx_REG (mode, regno);
        offset = start_offset + cfun->machine->frame.reg_offset[regno];
        mem = gen_frame_mem (mode, plus_constant (Pmode, base_rtx, offset));
  
!       regno2 = aarch64_next_callee_save (regno + 1, limit);
!       offset_diff = cfun->machine->frame.reg_offset[regno2]
! 		    - cfun->machine->frame.reg_offset[regno];
! 
!       if (regno2 <= limit
  	  && !cfun->machine->reg_is_wrapped_separately[regno2]
! 	  && known_eq (GET_MODE_SIZE (mode), offset_diff))
  	{
  	  rtx reg2 = gen_rtx_REG (mode, regno2);
  	  rtx mem2;
  
! 	  offset = start_offset + cfun->machine->frame.reg_offset[regno2];
  	  mem2 = gen_frame_mem (mode, plus_constant (Pmode, base_rtx, offset));
  	  emit_insn (aarch64_gen_load_pair (mode, reg, mem, reg2, mem2));
  
  	  *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg2, *cfi_ops);
  	  regno = regno2;
  	}
        else
  	emit_move_insn (reg, mem);
!       *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg, *cfi_ops);
      }
  }
  
--- 7098,7193 ----
  	     always assumed to be relevant to the frame
  	     calculations; subsequent parts, are only
  	     frame-related if explicitly marked.  */
! 	  if (aarch64_emit_cfi_for_reg_p (regno2))
! 	    {
! 	      if (need_cfa_note_p)
! 		aarch64_add_cfa_expression (insn, reg2, stack_pointer_rtx,
! 					    sp_offset + GET_MODE_SIZE (mode));
! 	      else
! 		RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
! 	    }
! 
  	  regno = regno2;
  	}
+       else if (mode == VNx2DImode && BYTES_BIG_ENDIAN)
+ 	{
+ 	  insn = emit_insn (gen_aarch64_pred_mov (mode, mem, ptrue, reg));
+ 	  need_cfa_note_p = true;
+ 	}
+       else if (aarch64_sve_mode_p (mode))
+ 	insn = emit_insn (gen_rtx_SET (mem, reg));
        else
  	insn = emit_move_insn (mem, reg);
  
!       RTX_FRAME_RELATED_P (insn) = frame_related_p;
!       if (frame_related_p && need_cfa_note_p)
! 	aarch64_add_cfa_expression (insn, reg, stack_pointer_rtx, sp_offset);
      }
  }
  
! /* Emit code to restore the callee registers from register number START
!    up to and including LIMIT.  Restore from the stack offset START_OFFSET,
!    skipping any write-back candidates if SKIP_WB is true.  Write the
!    appropriate REG_CFA_RESTORE notes into CFI_OPS.  */
  
  static void
! aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start,
  			      unsigned limit, bool skip_wb, rtx *cfi_ops)
  {
    unsigned regno;
    unsigned regno2;
    poly_int64 offset;
+   rtx anchor_reg = NULL_RTX, ptrue = NULL_RTX;
  
    for (regno = aarch64_next_callee_save (start, limit);
         regno <= limit;
         regno = aarch64_next_callee_save (regno + 1, limit))
      {
+       bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno);
        if (cfun->machine->reg_is_wrapped_separately[regno])
! 	continue;
  
        rtx reg, mem;
  
        if (skip_wb
  	  && (regno == cfun->machine->frame.wb_candidate1
  	      || regno == cfun->machine->frame.wb_candidate2))
  	continue;
  
+       machine_mode mode = aarch64_reg_save_mode (regno);
        reg = gen_rtx_REG (mode, regno);
        offset = start_offset + cfun->machine->frame.reg_offset[regno];
+       rtx base_rtx = stack_pointer_rtx;
+       if (mode == VNx2DImode && BYTES_BIG_ENDIAN)
+ 	aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg,
+ 					     offset, ptrue);
        mem = gen_frame_mem (mode, plus_constant (Pmode, base_rtx, offset));
  
!       if (!aarch64_sve_mode_p (mode)
! 	  && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit
  	  && !cfun->machine->reg_is_wrapped_separately[regno2]
! 	  && known_eq (GET_MODE_SIZE (mode),
! 		       cfun->machine->frame.reg_offset[regno2]
! 		       - cfun->machine->frame.reg_offset[regno]))
  	{
  	  rtx reg2 = gen_rtx_REG (mode, regno2);
  	  rtx mem2;
  
! 	  offset += GET_MODE_SIZE (mode);
  	  mem2 = gen_frame_mem (mode, plus_constant (Pmode, base_rtx, offset));
  	  emit_insn (aarch64_gen_load_pair (mode, reg, mem, reg2, mem2));
  
  	  *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg2, *cfi_ops);
  	  regno = regno2;
  	}
+       else if (mode == VNx2DImode && BYTES_BIG_ENDIAN)
+ 	emit_insn (gen_aarch64_pred_mov (mode, reg, ptrue, mem));
+       else if (aarch64_sve_mode_p (mode))
+ 	emit_insn (gen_rtx_SET (reg, mem));
        else
  	emit_move_insn (reg, mem);
!       if (frame_related_p)
! 	*cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg, *cfi_ops);
      }
  }
  
*************** aarch64_get_separate_components (void)
*** 5068,5080 ****
    for (unsigned regno = 0; regno <= LAST_SAVED_REGNUM; regno++)
      if (aarch64_register_saved_on_entry (regno))
        {
  	poly_int64 offset = cfun->machine->frame.reg_offset[regno];
! 	if (!frame_pointer_needed)
! 	  offset += cfun->machine->frame.frame_size
! 		    - cfun->machine->frame.hard_fp_offset;
  	/* Check that we can access the stack slot of the register with one
  	   direct load with no adjustments needed.  */
! 	if (offset_12bit_unsigned_scaled_p (DImode, offset))
  	  bitmap_set_bit (components, regno);
        }
  
--- 7269,7303 ----
    for (unsigned regno = 0; regno <= LAST_SAVED_REGNUM; regno++)
      if (aarch64_register_saved_on_entry (regno))
        {
+ 	/* Punt on saves and restores that use ST1D and LD1D.  We could
+ 	   try to be smarter, but it would involve making sure that the
+ 	   spare predicate register itself is safe to use at the save
+ 	   and restore points.  Also, when a frame pointer is being used,
+ 	   the slots are often out of reach of ST1D and LD1D anyway.  */
+ 	machine_mode mode = aarch64_reg_save_mode (regno);
+ 	if (mode == VNx2DImode && BYTES_BIG_ENDIAN)
+ 	  continue;
+ 
  	poly_int64 offset = cfun->machine->frame.reg_offset[regno];
! 
! 	/* If the register is saved in the first SVE save slot, we use
! 	   it as a stack probe for -fstack-clash-protection.  */
! 	if (flag_stack_clash_protection
! 	    && maybe_ne (cfun->machine->frame.below_hard_fp_saved_regs_size, 0)
! 	    && known_eq (offset, 0))
! 	  continue;
! 
! 	/* Get the offset relative to the register we'll use.  */
! 	if (frame_pointer_needed)
! 	  offset -= cfun->machine->frame.below_hard_fp_saved_regs_size;
! 	else
! 	  offset += crtl->outgoing_args_size;
! 
  	/* Check that we can access the stack slot of the register with one
  	   direct load with no adjustments needed.  */
! 	if (aarch64_sve_mode_p (mode)
! 	    ? offset_9bit_signed_scaled_p (mode, offset)
! 	    : offset_12bit_unsigned_scaled_p (mode, offset))
  	  bitmap_set_bit (components, regno);
        }
  
*************** aarch64_get_separate_components (void)
*** 5082,5087 ****
--- 7305,7316 ----
    if (frame_pointer_needed)
      bitmap_clear_bit (components, HARD_FRAME_POINTER_REGNUM);
  
+   /* If the spare predicate register used by big-endian SVE code
+      is call-preserved, it must be saved in the main prologue
+      before any saves that use it.  */
+   if (cfun->machine->frame.spare_pred_reg != INVALID_REGNUM)
+     bitmap_clear_bit (components, cfun->machine->frame.spare_pred_reg);
+ 
    unsigned reg1 = cfun->machine->frame.wb_candidate1;
    unsigned reg2 = cfun->machine->frame.wb_candidate2;
    /* If registers have been chosen to be stored/restored with
*************** aarch64_components_for_bb (basic_block b
*** 5106,5136 ****
    bitmap in = DF_LIVE_IN (bb);
    bitmap gen = &DF_LIVE_BB_INFO (bb)->gen;
    bitmap kill = &DF_LIVE_BB_INFO (bb)->kill;
-   bool simd_function = aarch64_simd_decl_p (cfun->decl);
  
    sbitmap components = sbitmap_alloc (LAST_SAVED_REGNUM + 1);
    bitmap_clear (components);
  
    /* GPRs are used in a bb if they are in the IN, GEN, or KILL sets.  */
    for (unsigned regno = 0; regno <= LAST_SAVED_REGNUM; regno++)
!     if ((!call_used_regs[regno]
! 	|| (simd_function && FP_SIMD_SAVED_REGNUM_P (regno)))
!        && (bitmap_bit_p (in, regno)
! 	   || bitmap_bit_p (gen, regno)
! 	   || bitmap_bit_p (kill, regno)))
        {
- 	unsigned regno2, offset, offset2;
  	bitmap_set_bit (components, regno);
  
  	/* If there is a callee-save at an adjacent offset, add it too
  	   to increase the use of LDP/STP.  */
! 	offset = cfun->machine->frame.reg_offset[regno];
! 	regno2 = ((offset & 8) == 0) ? regno + 1 : regno - 1;
  
  	if (regno2 <= LAST_SAVED_REGNUM)
  	  {
! 	    offset2 = cfun->machine->frame.reg_offset[regno2];
! 	    if ((offset & ~8) == (offset2 & ~8))
  	      bitmap_set_bit (components, regno2);
  	  }
        }
--- 7335,7382 ----
    bitmap in = DF_LIVE_IN (bb);
    bitmap gen = &DF_LIVE_BB_INFO (bb)->gen;
    bitmap kill = &DF_LIVE_BB_INFO (bb)->kill;
  
    sbitmap components = sbitmap_alloc (LAST_SAVED_REGNUM + 1);
    bitmap_clear (components);
  
+   /* Clobbered registers don't generate values in any meaningful sense,
+      since nothing after the clobber can rely on their value.  And we can't
+      say that partially-clobbered registers are unconditionally killed,
+      because whether they're killed or not depends on the mode of the
+      value they're holding.  Thus partially call-clobbered registers
+      appear in neither the kill set nor the gen set.
+ 
+      Check manually for any calls that clobber more of a register than the
+      current function can.  */
+   function_abi_aggregator callee_abis;
+   rtx_insn *insn;
+   FOR_BB_INSNS (bb, insn)
+     if (CALL_P (insn))
+       callee_abis.note_callee_abi (insn_callee_abi (insn));
+   HARD_REG_SET extra_caller_saves = callee_abis.caller_save_regs (*crtl->abi);
+ 
    /* GPRs are used in a bb if they are in the IN, GEN, or KILL sets.  */
    for (unsigned regno = 0; regno <= LAST_SAVED_REGNUM; regno++)
!     if (!fixed_regs[regno]
! 	&& !crtl->abi->clobbers_full_reg_p (regno)
! 	&& (TEST_HARD_REG_BIT (extra_caller_saves, regno)
! 	    || bitmap_bit_p (in, regno)
! 	    || bitmap_bit_p (gen, regno)
! 	    || bitmap_bit_p (kill, regno)))
        {
  	bitmap_set_bit (components, regno);
  
  	/* If there is a callee-save at an adjacent offset, add it too
  	   to increase the use of LDP/STP.  */
! 	poly_int64 offset = cfun->machine->frame.reg_offset[regno];
! 	unsigned regno2 = multiple_p (offset, 16) ? regno + 1 : regno - 1;
  
  	if (regno2 <= LAST_SAVED_REGNUM)
  	  {
! 	    poly_int64 offset2 = cfun->machine->frame.reg_offset[regno2];
! 	    if (regno < regno2
! 		? known_eq (offset + 8, offset2)
! 		: multiple_p (offset2, 16) && known_eq (offset2 + 8, offset))
  	      bitmap_set_bit (components, regno2);
  	  }
        }
*************** aarch64_process_components (sbitmap comp
*** 5185,5200 ****
  
    while (regno != last_regno)
      {
!       /* AAPCS64 section 5.1.2 requires only the low 64 bits to be saved
! 	 so DFmode for the vector registers is enough.  For simd functions
! 	 we want to save the low 128 bits.  */
!       machine_mode mode = aarch64_reg_save_mode (cfun->decl, regno);
        
        rtx reg = gen_rtx_REG (mode, regno);
        poly_int64 offset = cfun->machine->frame.reg_offset[regno];
!       if (!frame_pointer_needed)
! 	offset += cfun->machine->frame.frame_size
! 		  - cfun->machine->frame.hard_fp_offset;
        rtx addr = plus_constant (Pmode, ptr_reg, offset);
        rtx mem = gen_frame_mem (mode, addr);
  
--- 7431,7446 ----
  
    while (regno != last_regno)
      {
!       bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno);
!       machine_mode mode = aarch64_reg_save_mode (regno);
        
        rtx reg = gen_rtx_REG (mode, regno);
        poly_int64 offset = cfun->machine->frame.reg_offset[regno];
!       if (frame_pointer_needed)
! 	offset -= cfun->machine->frame.below_hard_fp_saved_regs_size;
!       else
! 	offset += crtl->outgoing_args_size;
! 
        rtx addr = plus_constant (Pmode, ptr_reg, offset);
        rtx mem = gen_frame_mem (mode, addr);
  
*************** aarch64_process_components (sbitmap comp
*** 5205,5243 ****
        if (regno2 == last_regno)
  	{
  	  insn = emit_insn (set);
! 	  RTX_FRAME_RELATED_P (insn) = 1;
! 	  if (prologue_p)
! 	    add_reg_note (insn, REG_CFA_OFFSET, copy_rtx (set));
! 	  else
! 	    add_reg_note (insn, REG_CFA_RESTORE, reg);
  	  break;
  	}
  
        poly_int64 offset2 = cfun->machine->frame.reg_offset[regno2];
        /* The next register is not of the same class or its offset is not
  	 mergeable with the current one into a pair.  */
!       if (!satisfies_constraint_Ump (mem)
  	  || GP_REGNUM_P (regno) != GP_REGNUM_P (regno2)
! 	  || (aarch64_simd_decl_p (cfun->decl) && FP_REGNUM_P (regno))
  	  || maybe_ne ((offset2 - cfun->machine->frame.reg_offset[regno]),
  		       GET_MODE_SIZE (mode)))
  	{
  	  insn = emit_insn (set);
! 	  RTX_FRAME_RELATED_P (insn) = 1;
! 	  if (prologue_p)
! 	    add_reg_note (insn, REG_CFA_OFFSET, copy_rtx (set));
! 	  else
! 	    add_reg_note (insn, REG_CFA_RESTORE, reg);
  
  	  regno = regno2;
  	  continue;
  	}
  
        /* REGNO2 can be saved/restored in a pair with REGNO.  */
        rtx reg2 = gen_rtx_REG (mode, regno2);
!       if (!frame_pointer_needed)
! 	offset2 += cfun->machine->frame.frame_size
! 		  - cfun->machine->frame.hard_fp_offset;
        rtx addr2 = plus_constant (Pmode, ptr_reg, offset2);
        rtx mem2 = gen_frame_mem (mode, addr2);
        rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2)
--- 7451,7499 ----
        if (regno2 == last_regno)
  	{
  	  insn = emit_insn (set);
! 	  if (frame_related_p)
! 	    {
! 	      RTX_FRAME_RELATED_P (insn) = 1;
! 	      if (prologue_p)
! 		add_reg_note (insn, REG_CFA_OFFSET, copy_rtx (set));
! 	      else
! 		add_reg_note (insn, REG_CFA_RESTORE, reg);
! 	    }
  	  break;
  	}
  
        poly_int64 offset2 = cfun->machine->frame.reg_offset[regno2];
        /* The next register is not of the same class or its offset is not
  	 mergeable with the current one into a pair.  */
!       if (aarch64_sve_mode_p (mode)
! 	  || !satisfies_constraint_Ump (mem)
  	  || GP_REGNUM_P (regno) != GP_REGNUM_P (regno2)
! 	  || (crtl->abi->id () == ARM_PCS_SIMD && FP_REGNUM_P (regno))
  	  || maybe_ne ((offset2 - cfun->machine->frame.reg_offset[regno]),
  		       GET_MODE_SIZE (mode)))
  	{
  	  insn = emit_insn (set);
! 	  if (frame_related_p)
! 	    {
! 	      RTX_FRAME_RELATED_P (insn) = 1;
! 	      if (prologue_p)
! 		add_reg_note (insn, REG_CFA_OFFSET, copy_rtx (set));
! 	      else
! 		add_reg_note (insn, REG_CFA_RESTORE, reg);
! 	    }
  
  	  regno = regno2;
  	  continue;
  	}
  
+       bool frame_related2_p = aarch64_emit_cfi_for_reg_p (regno2);
+ 
        /* REGNO2 can be saved/restored in a pair with REGNO.  */
        rtx reg2 = gen_rtx_REG (mode, regno2);
!       if (frame_pointer_needed)
! 	offset2 -= cfun->machine->frame.below_hard_fp_saved_regs_size;
!       else
! 	offset2 += crtl->outgoing_args_size;
        rtx addr2 = plus_constant (Pmode, ptr_reg, offset2);
        rtx mem2 = gen_frame_mem (mode, addr2);
        rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2)
*************** aarch64_process_components (sbitmap comp
*** 5248,5263 ****
        else
  	insn = emit_insn (aarch64_gen_load_pair (mode, reg, mem, reg2, mem2));
  
!       RTX_FRAME_RELATED_P (insn) = 1;
!       if (prologue_p)
! 	{
! 	  add_reg_note (insn, REG_CFA_OFFSET, set);
! 	  add_reg_note (insn, REG_CFA_OFFSET, set2);
! 	}
!       else
  	{
! 	  add_reg_note (insn, REG_CFA_RESTORE, reg);
! 	  add_reg_note (insn, REG_CFA_RESTORE, reg2);
  	}
  
        regno = aarch64_get_next_set_bit (components, regno2 + 1);
--- 7504,7526 ----
        else
  	insn = emit_insn (aarch64_gen_load_pair (mode, reg, mem, reg2, mem2));
  
!       if (frame_related_p || frame_related2_p)
  	{
! 	  RTX_FRAME_RELATED_P (insn) = 1;
! 	  if (prologue_p)
! 	    {
! 	      if (frame_related_p)
! 		add_reg_note (insn, REG_CFA_OFFSET, set);
! 	      if (frame_related2_p)
! 		add_reg_note (insn, REG_CFA_OFFSET, set2);
! 	    }
! 	  else
! 	    {
! 	      if (frame_related_p)
! 		add_reg_note (insn, REG_CFA_RESTORE, reg);
! 	      if (frame_related2_p)
! 		add_reg_note (insn, REG_CFA_RESTORE, reg2);
! 	    }
  	}
  
        regno = aarch64_get_next_set_bit (components, regno2 + 1);
*************** aarch64_allocate_and_probe_stack_space (
*** 5324,5340 ****
  					bool final_adjustment_p)
  {
    HOST_WIDE_INT guard_size
!     = 1 << PARAM_VALUE (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE);
    HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD;
-   /* When doing the final adjustment for the outgoing argument size we can't
-      assume that LR was saved at position 0.  So subtract it's offset from the
-      ABI safe buffer so that we don't accidentally allow an adjustment that
-      would result in an allocation larger than the ABI buffer without
-      probing.  */
    HOST_WIDE_INT min_probe_threshold
!     = final_adjustment_p
!       ? guard_used_by_caller - cfun->machine->frame.reg_offset[LR_REGNUM]
!       : guard_size - guard_used_by_caller;
  
    poly_int64 frame_size = cfun->machine->frame.frame_size;
  
--- 7587,7619 ----
  					bool final_adjustment_p)
  {
    HOST_WIDE_INT guard_size
!     = 1 << param_stack_clash_protection_guard_size;
    HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD;
    HOST_WIDE_INT min_probe_threshold
!     = (final_adjustment_p
!        ? guard_used_by_caller
!        : guard_size - guard_used_by_caller);
!   /* When doing the final adjustment for the outgoing arguments, take into
!      account any unprobed space there is above the current SP.  There are
!      two cases:
! 
!      - When saving SVE registers below the hard frame pointer, we force
!        the lowest save to take place in the prologue before doing the final
!        adjustment (i.e. we don't allow the save to be shrink-wrapped).
!        This acts as a probe at SP, so there is no unprobed space.
! 
!      - When there are no SVE register saves, we use the store of the link
!        register as a probe.  We can't assume that LR was saved at position 0
!        though, so treat any space below it as unprobed.  */
!   if (final_adjustment_p
!       && known_eq (cfun->machine->frame.below_hard_fp_saved_regs_size, 0))
!     {
!       poly_int64 lr_offset = cfun->machine->frame.reg_offset[LR_REGNUM];
!       if (known_ge (lr_offset, 0))
! 	min_probe_threshold -= lr_offset.to_constant ();
!       else
! 	gcc_assert (!flag_stack_clash_protection || known_eq (poly_size, 0));
!     }
  
    poly_int64 frame_size = cfun->machine->frame.frame_size;
  
*************** aarch64_allocate_and_probe_stack_space (
*** 5344,5356 ****
    if (flag_stack_clash_protection && !final_adjustment_p)
      {
        poly_int64 initial_adjust = cfun->machine->frame.initial_adjust;
        poly_int64 final_adjust = cfun->machine->frame.final_adjust;
  
        if (known_eq (frame_size, 0))
  	{
  	  dump_stack_clash_frame_info (NO_PROBE_NO_FRAME, false);
  	}
!       else if (known_lt (initial_adjust, guard_size - guard_used_by_caller)
  	       && known_lt (final_adjust, guard_used_by_caller))
  	{
  	  dump_stack_clash_frame_info (NO_PROBE_SMALL_FRAME, true);
--- 7623,7637 ----
    if (flag_stack_clash_protection && !final_adjustment_p)
      {
        poly_int64 initial_adjust = cfun->machine->frame.initial_adjust;
+       poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust;
        poly_int64 final_adjust = cfun->machine->frame.final_adjust;
  
        if (known_eq (frame_size, 0))
  	{
  	  dump_stack_clash_frame_info (NO_PROBE_NO_FRAME, false);
  	}
!       else if (known_lt (initial_adjust + sve_callee_adjust,
! 			 guard_size - guard_used_by_caller)
  	       && known_lt (final_adjust, guard_used_by_caller))
  	{
  	  dump_stack_clash_frame_info (NO_PROBE_SMALL_FRAME, true);
*************** aarch64_epilogue_uses (int regno)
*** 5550,5573 ****
      {
        if (regno == LR_REGNUM)
  	return 1;
-       if (aarch64_simd_decl_p (cfun->decl) && FP_SIMD_SAVED_REGNUM_P (regno))
- 	return 1;
      }
    return 0;
  }
  
- /* Add a REG_CFA_EXPRESSION note to INSN to say that register REG
-    is saved at BASE + OFFSET.  */
- 
- static void
- aarch64_add_cfa_expression (rtx_insn *insn, unsigned int reg,
- 			    rtx base, poly_int64 offset)
- {
-   rtx mem = gen_frame_mem (DImode, plus_constant (Pmode, base, offset));
-   add_reg_note (insn, REG_CFA_EXPRESSION,
- 		gen_rtx_SET (mem, regno_reg_rtx[reg]));
- }
- 
  /* AArch64 stack frames generated by this compiler look like:
  
  	+-------------------------------+
--- 7831,7840 ----
*************** aarch64_add_cfa_expression (rtx_insn *in
*** 5589,5596 ****
  	+-------------------------------+  |
  	|  LR'                          |  |
  	+-------------------------------+  |
! 	|  FP'                          | / <- hard_frame_pointer_rtx (aligned)
!         +-------------------------------+
  	|  dynamic allocation           |
  	+-------------------------------+
  	|  padding                      |
--- 7856,7867 ----
  	+-------------------------------+  |
  	|  LR'                          |  |
  	+-------------------------------+  |
! 	|  FP'                          |  |
! 	+-------------------------------+  |<- hard_frame_pointer_rtx (aligned)
! 	|  SVE vector registers         |  | \
! 	+-------------------------------+  |  | below_hard_fp_saved_regs_size
! 	|  SVE predicate registers      | /  /
! 	+-------------------------------+
  	|  dynamic allocation           |
  	+-------------------------------+
  	|  padding                      |
*************** aarch64_add_cfa_expression (rtx_insn *in
*** 5623,5629 ****
     The following registers are reserved during frame layout and should not be
     used for any other purpose:
  
!    - r11: Used by stack clash protection when SVE is enabled.
     - r12(EP0) and r13(EP1): Used as temporaries for stack adjustment.
     - r14 and r15: Used for speculation tracking.
     - r16(IP0), r17(IP1): Used by indirect tailcalls.
--- 7894,7901 ----
     The following registers are reserved during frame layout and should not be
     used for any other purpose:
  
!    - r11: Used by stack clash protection when SVE is enabled, and also
! 	  as an anchor register when saving and restoring registers
     - r12(EP0) and r13(EP1): Used as temporaries for stack adjustment.
     - r14 and r15: Used for speculation tracking.
     - r16(IP0), r17(IP1): Used by indirect tailcalls.
*************** aarch64_expand_prologue (void)
*** 5646,5660 ****
    HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust;
    poly_int64 final_adjust = cfun->machine->frame.final_adjust;
    poly_int64 callee_offset = cfun->machine->frame.callee_offset;
    unsigned reg1 = cfun->machine->frame.wb_candidate1;
    unsigned reg2 = cfun->machine->frame.wb_candidate2;
    bool emit_frame_chain = cfun->machine->frame.emit_frame_chain;
    rtx_insn *insn;
  
    /* Sign return address for functions.  */
    if (aarch64_return_address_signing_enabled ())
      {
!       insn = emit_insn (gen_pacisp ());
        add_reg_note (insn, REG_CFA_TOGGLE_RA_MANGLE, const0_rtx);
        RTX_FRAME_RELATED_P (insn) = 1;
      }
--- 7918,7954 ----
    HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust;
    poly_int64 final_adjust = cfun->machine->frame.final_adjust;
    poly_int64 callee_offset = cfun->machine->frame.callee_offset;
+   poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust;
+   poly_int64 below_hard_fp_saved_regs_size
+     = cfun->machine->frame.below_hard_fp_saved_regs_size;
    unsigned reg1 = cfun->machine->frame.wb_candidate1;
    unsigned reg2 = cfun->machine->frame.wb_candidate2;
    bool emit_frame_chain = cfun->machine->frame.emit_frame_chain;
    rtx_insn *insn;
  
+   if (flag_stack_clash_protection && known_eq (callee_adjust, 0))
+     {
+       /* Fold the SVE allocation into the initial allocation.
+ 	 We don't do this in aarch64_layout_arg to avoid pessimizing
+ 	 the epilogue code.  */
+       initial_adjust += sve_callee_adjust;
+       sve_callee_adjust = 0;
+     }
+ 
    /* Sign return address for functions.  */
    if (aarch64_return_address_signing_enabled ())
      {
!       switch (aarch64_ra_sign_key)
! 	{
! 	  case AARCH64_KEY_A:
! 	    insn = emit_insn (gen_paciasp ());
! 	    break;
! 	  case AARCH64_KEY_B:
! 	    insn = emit_insn (gen_pacibsp ());
! 	    break;
! 	  default:
! 	    gcc_unreachable ();
! 	}
        add_reg_note (insn, REG_CFA_TOGGLE_RA_MANGLE, const0_rtx);
        RTX_FRAME_RELATED_P (insn) = 1;
      }
*************** aarch64_expand_prologue (void)
*** 5693,5710 ****
    if (callee_adjust != 0)
      aarch64_push_regs (reg1, reg2, callee_adjust);
  
    if (emit_frame_chain)
      {
-       poly_int64 reg_offset = callee_adjust;
        if (callee_adjust == 0)
  	{
  	  reg1 = R29_REGNUM;
  	  reg2 = R30_REGNUM;
! 	  reg_offset = callee_offset;
! 	  aarch64_save_callee_saves (DImode, reg_offset, reg1, reg2, false);
  	}
        aarch64_add_offset (Pmode, hard_frame_pointer_rtx,
! 			  stack_pointer_rtx, callee_offset,
  			  tmp1_rtx, tmp0_rtx, frame_pointer_needed);
        if (frame_pointer_needed && !frame_size.is_constant ())
  	{
--- 7987,8013 ----
    if (callee_adjust != 0)
      aarch64_push_regs (reg1, reg2, callee_adjust);
  
+   /* The offset of the frame chain record (if any) from the current SP.  */
+   poly_int64 chain_offset = (initial_adjust + callee_adjust
+ 			     - cfun->machine->frame.hard_fp_offset);
+   gcc_assert (known_ge (chain_offset, 0));
+ 
+   /* The offset of the bottom of the save area from the current SP.  */
+   poly_int64 saved_regs_offset = chain_offset - below_hard_fp_saved_regs_size;
+ 
    if (emit_frame_chain)
      {
        if (callee_adjust == 0)
  	{
  	  reg1 = R29_REGNUM;
  	  reg2 = R30_REGNUM;
! 	  aarch64_save_callee_saves (saved_regs_offset, reg1, reg2,
! 				     false, false);
  	}
+       else
+ 	gcc_assert (known_eq (chain_offset, 0));
        aarch64_add_offset (Pmode, hard_frame_pointer_rtx,
! 			  stack_pointer_rtx, chain_offset,
  			  tmp1_rtx, tmp0_rtx, frame_pointer_needed);
        if (frame_pointer_needed && !frame_size.is_constant ())
  	{
*************** aarch64_expand_prologue (void)
*** 5731,5753 ****
  
  	  /* Change the save slot expressions for the registers that
  	     we've already saved.  */
! 	  reg_offset -= callee_offset;
! 	  aarch64_add_cfa_expression (insn, reg2, hard_frame_pointer_rtx,
! 				      reg_offset + UNITS_PER_WORD);
! 	  aarch64_add_cfa_expression (insn, reg1, hard_frame_pointer_rtx,
! 				      reg_offset);
  	}
        emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx));
      }
  
!   aarch64_save_callee_saves (DImode, callee_offset, R0_REGNUM, R30_REGNUM,
! 			     callee_adjust != 0 || emit_frame_chain);
!   if (aarch64_simd_decl_p (cfun->decl))
!     aarch64_save_callee_saves (TFmode, callee_offset, V0_REGNUM, V31_REGNUM,
! 			       callee_adjust != 0 || emit_frame_chain);
!   else
!     aarch64_save_callee_saves (DFmode, callee_offset, V0_REGNUM, V31_REGNUM,
! 			       callee_adjust != 0 || emit_frame_chain);
  
    /* We may need to probe the final adjustment if it is larger than the guard
       that is assumed by the called.  */
--- 8034,8064 ----
  
  	  /* Change the save slot expressions for the registers that
  	     we've already saved.  */
! 	  aarch64_add_cfa_expression (insn, regno_reg_rtx[reg2],
! 				      hard_frame_pointer_rtx, UNITS_PER_WORD);
! 	  aarch64_add_cfa_expression (insn, regno_reg_rtx[reg1],
! 				      hard_frame_pointer_rtx, 0);
  	}
        emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx));
      }
  
!   aarch64_save_callee_saves (saved_regs_offset, R0_REGNUM, R30_REGNUM,
! 			     callee_adjust != 0 || emit_frame_chain,
! 			     emit_frame_chain);
!   if (maybe_ne (sve_callee_adjust, 0))
!     {
!       gcc_assert (!flag_stack_clash_protection
! 		  || known_eq (initial_adjust, 0));
!       aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx,
! 					      sve_callee_adjust,
! 					      !frame_pointer_needed, false);
!       saved_regs_offset += sve_callee_adjust;
!     }
!   aarch64_save_callee_saves (saved_regs_offset, P0_REGNUM, P15_REGNUM,
! 			     false, emit_frame_chain);
!   aarch64_save_callee_saves (saved_regs_offset, V0_REGNUM, V31_REGNUM,
! 			     callee_adjust != 0 || emit_frame_chain,
! 			     emit_frame_chain);
  
    /* We may need to probe the final adjustment if it is larger than the guard
       that is assumed by the called.  */
*************** aarch64_use_return_insn_p (void)
*** 5773,5791 ****
    return known_eq (cfun->machine->frame.frame_size, 0);
  }
  
- /* Return false for non-leaf SIMD functions in order to avoid
-    shrink-wrapping them.  Doing this will lose the necessary
-    save/restore of FP registers.  */
- 
- bool
- aarch64_use_simple_return_insn_p (void)
- {
-   if (aarch64_simd_decl_p (cfun->decl) && !crtl->is_leaf)
-     return false;
- 
-   return true;
- }
- 
  /* Generate the epilogue instructions for returning from a function.
     This is almost exactly the reverse of the prolog sequence, except
     that we need to insert barriers to avoid scheduling loads that read
--- 8084,8089 ----
*************** aarch64_expand_epilogue (bool for_sibcal
*** 5798,5803 ****
--- 8096,8104 ----
    HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust;
    poly_int64 final_adjust = cfun->machine->frame.final_adjust;
    poly_int64 callee_offset = cfun->machine->frame.callee_offset;
+   poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust;
+   poly_int64 below_hard_fp_saved_regs_size
+     = cfun->machine->frame.below_hard_fp_saved_regs_size;
    unsigned reg1 = cfun->machine->frame.wb_candidate1;
    unsigned reg2 = cfun->machine->frame.wb_candidate2;
    rtx cfi_ops = NULL;
*************** aarch64_expand_epilogue (bool for_sibcal
*** 5808,5825 ****
       for each allocation.  For stack clash we are in a usable state if
       the adjustment is less than GUARD_SIZE - GUARD_USED_BY_CALLER.  */
    HOST_WIDE_INT guard_size
!     = 1 << PARAM_VALUE (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE);
    HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD;
  
!   /* We can re-use the registers when the allocation amount is smaller than
!      guard_size - guard_used_by_caller because we won't be doing any probes
!      then.  In such situations the register should remain live with the correct
       value.  */
    bool can_inherit_p = (initial_adjust.is_constant ()
! 			&& final_adjust.is_constant ())
  			&& (!flag_stack_clash_protection
! 			    || known_lt (initial_adjust,
! 					 guard_size - guard_used_by_caller));
  
    /* We need to add memory barrier to prevent read from deallocated stack.  */
    bool need_barrier_p
--- 8109,8134 ----
       for each allocation.  For stack clash we are in a usable state if
       the adjustment is less than GUARD_SIZE - GUARD_USED_BY_CALLER.  */
    HOST_WIDE_INT guard_size
!     = 1 << param_stack_clash_protection_guard_size;
    HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD;
  
!   /* We can re-use the registers when:
! 
!      (a) the deallocation amount is the same as the corresponding
! 	 allocation amount (which is false if we combine the initial
! 	 and SVE callee save allocations in the prologue); and
! 
!      (b) the allocation amount doesn't need a probe (which is false
! 	 if the amount is guard_size - guard_used_by_caller or greater).
! 
!      In such situations the register should remain live with the correct
       value.  */
    bool can_inherit_p = (initial_adjust.is_constant ()
! 			&& final_adjust.is_constant ()
  			&& (!flag_stack_clash_protection
! 			    || (known_lt (initial_adjust,
! 					  guard_size - guard_used_by_caller)
! 				&& known_eq (sve_callee_adjust, 0))));
  
    /* We need to add memory barrier to prevent read from deallocated stack.  */
    bool need_barrier_p
*************** aarch64_expand_epilogue (bool for_sibcal
*** 5844,5850 ****
      /* If writeback is used when restoring callee-saves, the CFA
         is restored on the instruction doing the writeback.  */
      aarch64_add_offset (Pmode, stack_pointer_rtx,
! 			hard_frame_pointer_rtx, -callee_offset,
  			tmp1_rtx, tmp0_rtx, callee_adjust == 0);
    else
       /* The case where we need to re-use the register here is very rare, so
--- 8153,8160 ----
      /* If writeback is used when restoring callee-saves, the CFA
         is restored on the instruction doing the writeback.  */
      aarch64_add_offset (Pmode, stack_pointer_rtx,
! 			hard_frame_pointer_rtx,
! 			-callee_offset - below_hard_fp_saved_regs_size,
  			tmp1_rtx, tmp0_rtx, callee_adjust == 0);
    else
       /* The case where we need to re-use the register here is very rare, so
*************** aarch64_expand_epilogue (bool for_sibcal
*** 5852,5865 ****
  	immediate doesn't fit.  */
       aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true);
  
!   aarch64_restore_callee_saves (DImode, callee_offset, R0_REGNUM, R30_REGNUM,
  				callee_adjust != 0, &cfi_ops);
-   if (aarch64_simd_decl_p (cfun->decl))
-     aarch64_restore_callee_saves (TFmode, callee_offset, V0_REGNUM, V31_REGNUM,
- 				  callee_adjust != 0, &cfi_ops);
-   else
-     aarch64_restore_callee_saves (DFmode, callee_offset, V0_REGNUM, V31_REGNUM,
- 				  callee_adjust != 0, &cfi_ops);
  
    if (need_barrier_p)
      emit_insn (gen_stack_tie (stack_pointer_rtx, stack_pointer_rtx));
--- 8162,8178 ----
  	immediate doesn't fit.  */
       aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true);
  
!   /* Restore the vector registers before the predicate registers,
!      so that we can use P4 as a temporary for big-endian SVE frames.  */
!   aarch64_restore_callee_saves (callee_offset, V0_REGNUM, V31_REGNUM,
! 				callee_adjust != 0, &cfi_ops);
!   aarch64_restore_callee_saves (callee_offset, P0_REGNUM, P15_REGNUM,
! 				false, &cfi_ops);
!   if (maybe_ne (sve_callee_adjust, 0))
!     aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true);
!   aarch64_restore_callee_saves (callee_offset - sve_callee_adjust,
! 				R0_REGNUM, R30_REGNUM,
  				callee_adjust != 0, &cfi_ops);
  
    if (need_barrier_p)
      emit_insn (gen_stack_tie (stack_pointer_rtx, stack_pointer_rtx));
*************** aarch64_expand_epilogue (bool for_sibcal
*** 5910,5922 ****
    if (aarch64_return_address_signing_enabled ()
        && (for_sibcall || !TARGET_ARMV8_3 || crtl->calls_eh_return))
      {
!       insn = emit_insn (gen_autisp ());
        add_reg_note (insn, REG_CFA_TOGGLE_RA_MANGLE, const0_rtx);
        RTX_FRAME_RELATED_P (insn) = 1;
      }
  
    /* Stack adjustment for exception handler.  */
!   if (crtl->calls_eh_return)
      {
        /* We need to unwind the stack by the offset computed by
  	 EH_RETURN_STACKADJ_RTX.  We have already reset the CFA
--- 8223,8245 ----
    if (aarch64_return_address_signing_enabled ()
        && (for_sibcall || !TARGET_ARMV8_3 || crtl->calls_eh_return))
      {
!       switch (aarch64_ra_sign_key)
! 	{
! 	  case AARCH64_KEY_A:
! 	    insn = emit_insn (gen_autiasp ());
! 	    break;
! 	  case AARCH64_KEY_B:
! 	    insn = emit_insn (gen_autibsp ());
! 	    break;
! 	  default:
! 	    gcc_unreachable ();
! 	}
        add_reg_note (insn, REG_CFA_TOGGLE_RA_MANGLE, const0_rtx);
        RTX_FRAME_RELATED_P (insn) = 1;
      }
  
    /* Stack adjustment for exception handler.  */
!   if (crtl->calls_eh_return && !for_sibcall)
      {
        /* We need to unwind the stack by the offset computed by
  	 EH_RETURN_STACKADJ_RTX.  We have already reset the CFA
*************** aarch64_output_mi_thunk (FILE *file, tre
*** 5982,5987 ****
--- 8305,8311 ----
    int this_regno = R0_REGNUM;
    rtx this_rtx, temp0, temp1, addr, funexp;
    rtx_insn *insn;
+   const char *fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunk));
  
    if (aarch64_bti_enabled ())
      emit_insn (gen_bti_c());
*************** aarch64_output_mi_thunk (FILE *file, tre
*** 6044,6057 ****
      }
    funexp = XEXP (DECL_RTL (function), 0);
    funexp = gen_rtx_MEM (FUNCTION_MODE, funexp);
!   insn = emit_call_insn (gen_sibcall (funexp, const0_rtx, NULL_RTX));
    SIBLING_CALL_P (insn) = 1;
  
    insn = get_insns ();
    shorten_branches (insn);
    final_start_function (insn, file, 1);
    final (insn, file, 1);
    final_end_function ();
  
    /* Stop pretending to be a post-reload pass.  */
    reload_completed = 0;
--- 8368,8385 ----
      }
    funexp = XEXP (DECL_RTL (function), 0);
    funexp = gen_rtx_MEM (FUNCTION_MODE, funexp);
!   rtx callee_abi = gen_int_mode (fndecl_abi (function).id (), DImode);
!   insn = emit_call_insn (gen_sibcall (funexp, const0_rtx, callee_abi));
    SIBLING_CALL_P (insn) = 1;
  
    insn = get_insns ();
    shorten_branches (insn);
+ 
+   assemble_start_function (thunk, fnname);
    final_start_function (insn, file, 1);
    final (insn, file, 1);
    final_end_function ();
+   assemble_end_function (thunk, fnname);
  
    /* Stop pretending to be a post-reload pass.  */
    reload_completed = 0;
*************** aarch64_movw_imm (HOST_WIDE_INT val, sca
*** 6122,6127 ****
--- 8450,8479 ----
  	  || (val & (((HOST_WIDE_INT) 0xffff) << 16)) == val);
  }
  
+ /* Test whether:
+ 
+      X = (X & AND_VAL) | IOR_VAL;
+ 
+    can be implemented using:
+ 
+      MOVK X, #(IOR_VAL >> shift), LSL #shift
+ 
+    Return the shift if so, otherwise return -1.  */
+ int
+ aarch64_movk_shift (const wide_int_ref &and_val,
+ 		    const wide_int_ref &ior_val)
+ {
+   unsigned int precision = and_val.get_precision ();
+   unsigned HOST_WIDE_INT mask = 0xffff;
+   for (unsigned int shift = 0; shift < precision; shift += 16)
+     {
+       if (and_val == ~mask && (ior_val & mask) == ior_val)
+ 	return shift;
+       mask <<= 16;
+     }
+   return -1;
+ }
+ 
  /* VAL is a value with the inner mode of MODE.  Replicate it to fill a
     64-bit (DImode) integer.  */
  
*************** aarch64_classify_address (struct aarch64
*** 6575,6583 ****
  
    HOST_WIDE_INT const_size;
  
    /* On BE, we use load/store pair for all large int mode load/stores.
       TI/TFmode may also use a load/store pair.  */
-   unsigned int vec_flags = aarch64_classify_vector_mode (mode);
    bool advsimd_struct_p = (vec_flags == (VEC_ADVSIMD | VEC_STRUCT));
    bool load_store_pair_p = (type == ADDR_QUERY_LDP_STP
  			    || type == ADDR_QUERY_LDP_STP_N
--- 8927,8941 ----
  
    HOST_WIDE_INT const_size;
  
+   /* Whether a vector mode is partial doesn't affect address legitimacy.
+      Partial vectors like VNx8QImode allow the same indexed addressing
+      mode and MUL VL addressing mode as full vectors like VNx16QImode;
+      in both cases, MUL VL counts multiples of GET_MODE_SIZE.  */
+   unsigned int vec_flags = aarch64_classify_vector_mode (mode);
+   vec_flags &= ~VEC_PARTIAL;
+ 
    /* On BE, we use load/store pair for all large int mode load/stores.
       TI/TFmode may also use a load/store pair.  */
    bool advsimd_struct_p = (vec_flags == (VEC_ADVSIMD | VEC_STRUCT));
    bool load_store_pair_p = (type == ADDR_QUERY_LDP_STP
  			    || type == ADDR_QUERY_LDP_STP_N
*************** aarch64_classify_address (struct aarch64
*** 6595,6601 ****
    bool allow_reg_index_p = (!load_store_pair_p
  			    && (known_lt (GET_MODE_SIZE (mode), 16)
  				|| vec_flags == VEC_ADVSIMD
! 				|| vec_flags == VEC_SVE_DATA));
  
    /* For SVE, only accept [Rn], [Rn, Rm, LSL #shift] and
       [Rn, #offset, MUL VL].  */
--- 8953,8959 ----
    bool allow_reg_index_p = (!load_store_pair_p
  			    && (known_lt (GET_MODE_SIZE (mode), 16)
  				|| vec_flags == VEC_ADVSIMD
! 				|| vec_flags & VEC_SVE_DATA));
  
    /* For SVE, only accept [Rn], [Rn, Rm, LSL #shift] and
       [Rn, #offset, MUL VL].  */
*************** aarch64_fixed_condition_code_regs (unsig
*** 7119,7129 ****
     RESULT is the register in which the result is returned.  It's NULL for
     "call" and "sibcall".
     MEM is the location of the function call.
     SIBCALL indicates whether this function call is normal call or sibling call.
     It will generate different pattern accordingly.  */
  
  void
! aarch64_expand_call (rtx result, rtx mem, bool sibcall)
  {
    rtx call, callee, tmp;
    rtvec vec;
--- 9477,9488 ----
     RESULT is the register in which the result is returned.  It's NULL for
     "call" and "sibcall".
     MEM is the location of the function call.
+    CALLEE_ABI is a const_int that gives the arm_pcs of the callee.
     SIBCALL indicates whether this function call is normal call or sibling call.
     It will generate different pattern accordingly.  */
  
  void
! aarch64_expand_call (rtx result, rtx mem, rtx callee_abi, bool sibcall)
  {
    rtx call, callee, tmp;
    rtvec vec;
*************** aarch64_expand_call (rtx result, rtx mem
*** 7153,7159 ****
    else
      tmp = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, LR_REGNUM));
  
!   vec = gen_rtvec (2, call, tmp);
    call = gen_rtx_PARALLEL (VOIDmode, vec);
  
    aarch64_emit_call_insn (call);
--- 9512,9522 ----
    else
      tmp = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, LR_REGNUM));
  
!   gcc_assert (CONST_INT_P (callee_abi));
!   callee_abi = gen_rtx_UNSPEC (DImode, gen_rtvec (1, callee_abi),
! 			       UNSPEC_CALLEE_ABI);
! 
!   vec = gen_rtvec (3, call, callee_abi, tmp);
    call = gen_rtx_PARALLEL (VOIDmode, vec);
  
    aarch64_emit_call_insn (call);
*************** aarch64_get_condition_code_1 (machine_mo
*** 7349,7354 ****
--- 9712,9732 ----
  	}
        break;
  
+     case E_CC_NZCmode:
+       switch (comp_code)
+ 	{
+ 	case NE: return AARCH64_NE; /* = any */
+ 	case EQ: return AARCH64_EQ; /* = none */
+ 	case GE: return AARCH64_PL; /* = nfrst */
+ 	case LT: return AARCH64_MI; /* = first */
+ 	case GEU: return AARCH64_CS; /* = nlast */
+ 	case GTU: return AARCH64_HI; /* = pmore */
+ 	case LEU: return AARCH64_LS; /* = plast */
+ 	case LTU: return AARCH64_CC; /* = last */
+ 	default: return -1;
+ 	}
+       break;
+ 
      case E_CC_NZmode:
        switch (comp_code)
  	{
*************** aarch64_print_vector_float_operand (FILE
*** 7491,7505 ****
    if (negate)
      r = real_value_negate (&r);
  
!   /* We only handle the SVE single-bit immediates here.  */
    if (real_equal (&r, &dconst0))
      asm_fprintf (f, "0.0");
    else if (real_equal (&r, &dconst1))
      asm_fprintf (f, "1.0");
    else if (real_equal (&r, &dconsthalf))
      asm_fprintf (f, "0.5");
    else
!     return false;
  
    return true;
  }
--- 9869,9892 ----
    if (negate)
      r = real_value_negate (&r);
  
!   /* Handle the SVE single-bit immediates specially, since they have a
!      fixed form in the assembly syntax.  */
    if (real_equal (&r, &dconst0))
      asm_fprintf (f, "0.0");
+   else if (real_equal (&r, &dconst2))
+     asm_fprintf (f, "2.0");
    else if (real_equal (&r, &dconst1))
      asm_fprintf (f, "1.0");
    else if (real_equal (&r, &dconsthalf))
      asm_fprintf (f, "0.5");
    else
!     {
!       const int buf_size = 20;
!       char float_buf[buf_size] = {'\0'};
!       real_to_decimal_for_mode (float_buf, &r, buf_size, buf_size,
! 				1, GET_MODE (elt));
!       asm_fprintf (f, "%s", float_buf);
!     }
  
    return true;
  }
*************** sizetochar (int size)
*** 7527,7533 ****
       'D':		Take the duplicated element in a vector constant
  			and print it as an unsigned integer, in decimal.
       'e':		Print the sign/zero-extend size as a character 8->b,
! 			16->h, 32->w.
       'p':		Prints N such that 2^N == X (X must be power of 2 and
  			const int).
       'P':		Print the number of non-zero bits in X (a const_int).
--- 9914,9926 ----
       'D':		Take the duplicated element in a vector constant
  			and print it as an unsigned integer, in decimal.
       'e':		Print the sign/zero-extend size as a character 8->b,
! 			16->h, 32->w.  Can also be used for masks:
! 			0xff->b, 0xffff->h, 0xffffffff->w.
!      'I':		If the operand is a duplicated vector constant,
! 			replace it with the duplicated scalar.  If the
! 			operand is then a floating-point constant, replace
! 			it with the integer bit representation.  Print the
! 			transformed constant as a signed decimal number.
       'p':		Prints N such that 2^N == X (X must be power of 2 and
  			const int).
       'P':		Print the number of non-zero bits in X (a const_int).
*************** sizetochar (int size)
*** 7541,7547 ****
       'S/T/U/V':		Print a FP/SIMD register name for a register list.
  			The register printed is the FP/SIMD register name
  			of X + 0/1/2/3 for S/T/U/V.
!      'R':		Print a scalar FP/SIMD register name + 1.
       'X':		Print bottom 16 bits of integer constant in hex.
       'w/x':		Print a general register name or the zero register
  			(32-bit or 64-bit).
--- 9934,9940 ----
       'S/T/U/V':		Print a FP/SIMD register name for a register list.
  			The register printed is the FP/SIMD register name
  			of X + 0/1/2/3 for S/T/U/V.
!      'R':		Print a scalar Integer/FP/SIMD register name + 1.
       'X':		Print bottom 16 bits of integer constant in hex.
       'w/x':		Print a general register name or the zero register
  			(32-bit or 64-bit).
*************** aarch64_print_operand (FILE *f, rtx x, i
*** 7593,7619 ****
  
      case 'e':
        {
! 	int n;
! 
! 	if (!CONST_INT_P (x)
! 	    || (n = exact_log2 (INTVAL (x) & ~7)) <= 0)
  	  {
  	    output_operand_lossage ("invalid operand for '%%%c'", code);
  	    return;
  	  }
  
! 	switch (n)
  	  {
- 	  case 3:
- 	    fputc ('b', f);
- 	    break;
- 	  case 4:
- 	    fputc ('h', f);
- 	    break;
- 	  case 5:
- 	    fputc ('w', f);
- 	    break;
- 	  default:
  	    output_operand_lossage ("invalid operand for '%%%c'", code);
  	    return;
  	  }
--- 9986,10007 ----
  
      case 'e':
        {
! 	x = unwrap_const_vec_duplicate (x);
! 	if (!CONST_INT_P (x))
  	  {
  	    output_operand_lossage ("invalid operand for '%%%c'", code);
  	    return;
  	  }
  
! 	HOST_WIDE_INT val = INTVAL (x);
! 	if ((val & ~7) == 8 || val == 0xff)
! 	  fputc ('b', f);
! 	else if ((val & ~7) == 16 || val == 0xffff)
! 	  fputc ('h', f);
! 	else if ((val & ~7) == 32 || val == 0xffffffff)
! 	  fputc ('w', f);
! 	else
  	  {
  	    output_operand_lossage ("invalid operand for '%%%c'", code);
  	    return;
  	  }
*************** aarch64_print_operand (FILE *f, rtx x, i
*** 7660,7665 ****
--- 10048,10066 ----
        asm_fprintf (f, "%s", reg_names [REGNO (x) + 1]);
        break;
  
+     case 'I':
+       {
+ 	x = aarch64_bit_representation (unwrap_const_vec_duplicate (x));
+ 	if (CONST_INT_P (x))
+ 	  asm_fprintf (f, "%wd", INTVAL (x));
+ 	else
+ 	  {
+ 	    output_operand_lossage ("invalid operand for '%%%c'", code);
+ 	    return;
+ 	  }
+ 	break;
+       }
+ 
      case 'M':
      case 'm':
        {
*************** aarch64_print_operand (FILE *f, rtx x, i
*** 7682,7688 ****
          gcc_assert (cond_code >= 0);
  	if (code == 'M')
  	  cond_code = AARCH64_INVERSE_CONDITION_CODE (cond_code);
! 	fputs (aarch64_condition_codes[cond_code], f);
        }
        break;
  
--- 10083,10092 ----
          gcc_assert (cond_code >= 0);
  	if (code == 'M')
  	  cond_code = AARCH64_INVERSE_CONDITION_CODE (cond_code);
! 	if (GET_MODE (XEXP (x, 0)) == CC_NZCmode)
! 	  fputs (aarch64_sve_condition_codes[cond_code], f);
! 	else
! 	  fputs (aarch64_condition_codes[cond_code], f);
        }
        break;
  
*************** aarch64_print_operand (FILE *f, rtx x, i
*** 7733,7744 ****
        break;
  
      case 'R':
!       if (!REG_P (x) || !FP_REGNUM_P (REGNO (x)))
! 	{
! 	  output_operand_lossage ("incompatible floating point / vector register operand for '%%%c'", code);
! 	  return;
! 	}
!       asm_fprintf (f, "q%d", REGNO (x) - V0_REGNUM + 1);
        break;
  
      case 'X':
--- 10137,10149 ----
        break;
  
      case 'R':
!       if (REG_P (x) && FP_REGNUM_P (REGNO (x)))
! 	asm_fprintf (f, "q%d", REGNO (x) - V0_REGNUM + 1);
!       else if (REG_P (x) && GP_REGNUM_P (REGNO (x)))
! 	asm_fprintf (f, "x%d", REGNO (x) - R0_REGNUM + 1);
!       else
! 	output_operand_lossage ("incompatible register operand for '%%%c'",
! 				code);
        break;
  
      case 'X':
*************** aarch64_print_address_internal (FILE *f,
*** 8035,8041 ****
  				aarch64_addr_query_type type)
  {
    struct aarch64_address_info addr;
!   unsigned int size;
  
    /* Check all addresses are Pmode - including ILP32.  */
    if (GET_MODE (x) != Pmode
--- 10440,10446 ----
  				aarch64_addr_query_type type)
  {
    struct aarch64_address_info addr;
!   unsigned int size, vec_flags;
  
    /* Check all addresses are Pmode - including ILP32.  */
    if (GET_MODE (x) != Pmode
*************** aarch64_print_address_internal (FILE *f,
*** 8051,8076 ****
        {
        case ADDRESS_REG_IMM:
  	if (known_eq (addr.const_offset, 0))
- 	  asm_fprintf (f, "[%s]", reg_names [REGNO (addr.base)]);
- 	else if (aarch64_sve_data_mode_p (mode))
  	  {
! 	    HOST_WIDE_INT vnum
! 	      = exact_div (addr.const_offset,
! 			   BYTES_PER_SVE_VECTOR).to_constant ();
! 	    asm_fprintf (f, "[%s, #%wd, mul vl]",
! 			 reg_names[REGNO (addr.base)], vnum);
  	  }
! 	else if (aarch64_sve_pred_mode_p (mode))
  	  {
  	    HOST_WIDE_INT vnum
  	      = exact_div (addr.const_offset,
! 			   BYTES_PER_SVE_PRED).to_constant ();
  	    asm_fprintf (f, "[%s, #%wd, mul vl]",
  			 reg_names[REGNO (addr.base)], vnum);
  	  }
! 	else
! 	  asm_fprintf (f, "[%s, %wd]", reg_names [REGNO (addr.base)],
! 		       INTVAL (addr.offset));
  	return true;
  
        case ADDRESS_REG_REG:
--- 10456,10479 ----
        {
        case ADDRESS_REG_IMM:
  	if (known_eq (addr.const_offset, 0))
  	  {
! 	    asm_fprintf (f, "[%s]", reg_names[REGNO (addr.base)]);
! 	    return true;
  	  }
! 
! 	vec_flags = aarch64_classify_vector_mode (mode);
! 	if (vec_flags & VEC_ANY_SVE)
  	  {
  	    HOST_WIDE_INT vnum
  	      = exact_div (addr.const_offset,
! 			   aarch64_vl_bytes (mode, vec_flags)).to_constant ();
  	    asm_fprintf (f, "[%s, #%wd, mul vl]",
  			 reg_names[REGNO (addr.base)], vnum);
+ 	    return true;
  	  }
! 
! 	asm_fprintf (f, "[%s, %wd]", reg_names[REGNO (addr.base)],
! 		     INTVAL (addr.offset));
  	return true;
  
        case ADDRESS_REG_REG:
*************** aarch64_regno_regclass (unsigned regno)
*** 8201,8211 ****
      return POINTER_REGS;
  
    if (FP_REGNUM_P (regno))
!     return FP_LO_REGNUM_P (regno) ?  FP_LO_REGS : FP_REGS;
  
    if (PR_REGNUM_P (regno))
      return PR_LO_REGNUM_P (regno) ? PR_LO_REGS : PR_HI_REGS;
  
    return NO_REGS;
  }
  
--- 10604,10618 ----
      return POINTER_REGS;
  
    if (FP_REGNUM_P (regno))
!     return (FP_LO8_REGNUM_P (regno) ? FP_LO8_REGS
! 	    : FP_LO_REGNUM_P (regno) ? FP_LO_REGS : FP_REGS);
  
    if (PR_REGNUM_P (regno))
      return PR_LO_REGNUM_P (regno) ? PR_LO_REGS : PR_HI_REGS;
  
+   if (regno == FFR_REGNUM || regno == FFRT_REGNUM)
+     return FFR_REGS;
+ 
    return NO_REGS;
  }
  
*************** aarch64_secondary_reload (bool in_p ATTR
*** 8314,8331 ****
  			  machine_mode mode,
  			  secondary_reload_info *sri)
  {
!   /* Use aarch64_sve_reload_be for SVE reloads that cannot be handled
!      directly by the *aarch64_sve_mov<mode>_be move pattern.  See the
!      comment at the head of aarch64-sve.md for more details about the
!      big-endian handling.  */
!   if (BYTES_BIG_ENDIAN
!       && reg_class_subset_p (rclass, FP_REGS)
        && !((REG_P (x) && HARD_REGISTER_P (x))
  	   || aarch64_simd_valid_immediate (x, NULL))
!       && aarch64_sve_data_mode_p (mode))
      {
!       sri->icode = CODE_FOR_aarch64_sve_reload_be;
!       return NO_REGS;
      }
  
    /* If we have to disable direct literal pool loads and stores because the
--- 10721,10741 ----
  			  machine_mode mode,
  			  secondary_reload_info *sri)
  {
!   /* Use aarch64_sve_reload_mem for SVE memory reloads that cannot use
!      LDR and STR.  See the comment at the head of aarch64-sve.md for
!      more details about the big-endian handling.  */
!   if (reg_class_subset_p (rclass, FP_REGS)
        && !((REG_P (x) && HARD_REGISTER_P (x))
  	   || aarch64_simd_valid_immediate (x, NULL))
!       && mode != VNx16QImode)
      {
!       unsigned int vec_flags = aarch64_classify_vector_mode (mode);
!       if ((vec_flags & VEC_SVE_DATA)
! 	  && ((vec_flags & VEC_PARTIAL) || BYTES_BIG_ENDIAN))
! 	{
! 	  sri->icode = CODE_FOR_aarch64_sve_reload_mem;
! 	  return NO_REGS;
! 	}
      }
  
    /* If we have to disable direct literal pool loads and stores because the
*************** aarch64_class_max_nregs (reg_class_t reg
*** 8481,8487 ****
       can hold MODE, but at the moment we need to handle all modes.
       Just ignore any runtime parts for registers that can't store them.  */
    HOST_WIDE_INT lowest_size = constant_lower_bound (GET_MODE_SIZE (mode));
!   unsigned int nregs;
    switch (regclass)
      {
      case TAILCALL_ADDR_REGS:
--- 10891,10897 ----
       can hold MODE, but at the moment we need to handle all modes.
       Just ignore any runtime parts for registers that can't store them.  */
    HOST_WIDE_INT lowest_size = constant_lower_bound (GET_MODE_SIZE (mode));
!   unsigned int nregs, vec_flags;
    switch (regclass)
      {
      case TAILCALL_ADDR_REGS:
*************** aarch64_class_max_nregs (reg_class_t reg
*** 8491,8507 ****
      case POINTER_AND_FP_REGS:
      case FP_REGS:
      case FP_LO_REGS:
!       if (aarch64_sve_data_mode_p (mode)
  	  && constant_multiple_p (GET_MODE_SIZE (mode),
! 				  BYTES_PER_SVE_VECTOR, &nregs))
  	return nregs;
!       return (aarch64_vector_data_mode_p (mode)
  	      ? CEIL (lowest_size, UNITS_PER_VREG)
  	      : CEIL (lowest_size, UNITS_PER_WORD));
      case STACK_REG:
      case PR_REGS:
      case PR_LO_REGS:
      case PR_HI_REGS:
        return 1;
  
      case NO_REGS:
--- 10901,10921 ----
      case POINTER_AND_FP_REGS:
      case FP_REGS:
      case FP_LO_REGS:
!     case FP_LO8_REGS:
!       vec_flags = aarch64_classify_vector_mode (mode);
!       if ((vec_flags & VEC_SVE_DATA)
  	  && constant_multiple_p (GET_MODE_SIZE (mode),
! 				  aarch64_vl_bytes (mode, vec_flags), &nregs))
  	return nregs;
!       return (vec_flags & VEC_ADVSIMD
  	      ? CEIL (lowest_size, UNITS_PER_VREG)
  	      : CEIL (lowest_size, UNITS_PER_WORD));
      case STACK_REG:
      case PR_REGS:
      case PR_LO_REGS:
      case PR_HI_REGS:
+     case FFR_REGS:
+     case PR_AND_FFR_REGS:
        return 1;
  
      case NO_REGS:
*************** aarch64_if_then_else_costs (rtx op0, rtx
*** 9189,9194 ****
--- 11603,11610 ----
    rtx inner;
    rtx comparator;
    enum rtx_code cmpcode;
+   const struct cpu_cost_table *extra_cost
+     = aarch64_tune_params.insn_extra_cost;
  
    if (COMPARISON_P (op0))
      {
*************** aarch64_if_then_else_costs (rtx op0, rtx
*** 9223,9230 ****
  		    /* CBZ/CBNZ.  */
  		    *cost += rtx_cost (inner, VOIDmode, cmpcode, 0, speed);
  
! 	        return true;
! 	      }
  	    }
  	  else if (cmpcode == LT || cmpcode == GE)
  	    {
--- 11639,11655 ----
  		    /* CBZ/CBNZ.  */
  		    *cost += rtx_cost (inner, VOIDmode, cmpcode, 0, speed);
  
! 		  return true;
! 		}
! 	      if (register_operand (inner, VOIDmode)
! 		  && aarch64_imm24 (comparator, VOIDmode))
! 		{
! 		  /* SUB and SUBS.  */
! 		  *cost += COSTS_N_INSNS (2);
! 		  if (speed)
! 		    *cost += extra_cost->alu.arith * 2;
! 		  return true;
! 		}
  	    }
  	  else if (cmpcode == LT || cmpcode == GE)
  	    {
*************** aarch64_rtx_costs (rtx x, machine_mode m
*** 9637,9642 ****
--- 12062,12074 ----
  
        return false;
  
+     case CTZ:
+       *cost = COSTS_N_INSNS (2);
+ 
+       if (speed)
+ 	*cost += extra_cost->alu.clz + extra_cost->alu.rev;
+       return false;
+ 
      case COMPARE:
        op0 = XEXP (x, 0);
        op1 = XEXP (x, 1);
*************** cost_plus:
*** 9838,9844 ****
  	  }
  
  	if (GET_MODE_CLASS (mode) == MODE_INT
! 	    && ((CONST_INT_P (op1) && aarch64_uimm12_shift (INTVAL (op1)))
  		|| aarch64_sve_addvl_addpl_immediate (op1, mode)))
  	  {
  	    *cost += rtx_cost (op0, mode, PLUS, 0, speed);
--- 12270,12276 ----
  	  }
  
  	if (GET_MODE_CLASS (mode) == MODE_INT
! 	    && (aarch64_plus_immediate (op1, mode)
  		|| aarch64_sve_addvl_addpl_immediate (op1, mode)))
  	  {
  	    *cost += rtx_cost (op0, mode, PLUS, 0, speed);
*************** aarch64_register_move_cost (machine_mode
*** 10682,10687 ****
--- 13114,13127 ----
    if (from == TAILCALL_ADDR_REGS || from == POINTER_REGS)
      from = GENERAL_REGS;
  
+   /* Make RDFFR very expensive.  In particular, if we know that the FFR
+      contains a PTRUE (e.g. after a SETFFR), we must never use RDFFR
+      as a way of obtaining a PTRUE.  */
+   if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL
+       && hard_reg_set_subset_p (reg_class_contents[from_i],
+ 				reg_class_contents[FFR_REGS]))
+     return 80;
+ 
    /* Moving between GPR and stack cost is the same as GP2GP.  */
    if ((from == GENERAL_REGS && to == STACK_REG)
        || (to == GENERAL_REGS && from == STACK_REG))
*************** aarch64_memory_move_cost (machine_mode m
*** 10731,10736 ****
--- 13171,13263 ----
    return aarch64_tune_params.memmov_cost;
  }
  
+ /* Implement TARGET_INIT_BUILTINS.  */
+ static void
+ aarch64_init_builtins ()
+ {
+   aarch64_general_init_builtins ();
+   aarch64_sve::init_builtins ();
+ }
+ 
+ /* Implement TARGET_FOLD_BUILTIN.  */
+ static tree
+ aarch64_fold_builtin (tree fndecl, int nargs, tree *args, bool)
+ {
+   unsigned int code = DECL_MD_FUNCTION_CODE (fndecl);
+   unsigned int subcode = code >> AARCH64_BUILTIN_SHIFT;
+   tree type = TREE_TYPE (TREE_TYPE (fndecl));
+   switch (code & AARCH64_BUILTIN_CLASS)
+     {
+     case AARCH64_BUILTIN_GENERAL:
+       return aarch64_general_fold_builtin (subcode, type, nargs, args);
+ 
+     case AARCH64_BUILTIN_SVE:
+       return NULL_TREE;
+     }
+   gcc_unreachable ();
+ }
+ 
+ /* Implement TARGET_GIMPLE_FOLD_BUILTIN.  */
+ static bool
+ aarch64_gimple_fold_builtin (gimple_stmt_iterator *gsi)
+ {
+   gcall *stmt = as_a <gcall *> (gsi_stmt (*gsi));
+   tree fndecl = gimple_call_fndecl (stmt);
+   unsigned int code = DECL_MD_FUNCTION_CODE (fndecl);
+   unsigned int subcode = code >> AARCH64_BUILTIN_SHIFT;
+   gimple *new_stmt = NULL;
+   switch (code & AARCH64_BUILTIN_CLASS)
+     {
+     case AARCH64_BUILTIN_GENERAL:
+       new_stmt = aarch64_general_gimple_fold_builtin (subcode, stmt);
+       break;
+ 
+     case AARCH64_BUILTIN_SVE:
+       new_stmt = aarch64_sve::gimple_fold_builtin (subcode, gsi, stmt);
+       break;
+     }
+ 
+   if (!new_stmt)
+     return false;
+ 
+   gsi_replace (gsi, new_stmt, true);
+   return true;
+ }
+ 
+ /* Implement TARGET_EXPAND_BUILTIN.  */
+ static rtx
+ aarch64_expand_builtin (tree exp, rtx target, rtx, machine_mode, int ignore)
+ {
+   tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
+   unsigned int code = DECL_MD_FUNCTION_CODE (fndecl);
+   unsigned int subcode = code >> AARCH64_BUILTIN_SHIFT;
+   switch (code & AARCH64_BUILTIN_CLASS)
+     {
+     case AARCH64_BUILTIN_GENERAL:
+       return aarch64_general_expand_builtin (subcode, exp, target, ignore);
+ 
+     case AARCH64_BUILTIN_SVE:
+       return aarch64_sve::expand_builtin (subcode, exp, target);
+     }
+   gcc_unreachable ();
+ }
+ 
+ /* Implement TARGET_BUILTIN_DECL.  */
+ static tree
+ aarch64_builtin_decl (unsigned int code, bool initialize_p)
+ {
+   unsigned int subcode = code >> AARCH64_BUILTIN_SHIFT;
+   switch (code & AARCH64_BUILTIN_CLASS)
+     {
+     case AARCH64_BUILTIN_GENERAL:
+       return aarch64_general_builtin_decl (subcode, initialize_p);
+ 
+     case AARCH64_BUILTIN_SVE:
+       return aarch64_sve::builtin_decl (subcode, initialize_p);
+     }
+   gcc_unreachable ();
+ }
+ 
  /* Return true if it is safe and beneficial to use the approximate rsqrt optabs
     to optimize 1.0/sqrt.  */
  
*************** aarch64_builtin_reciprocal (tree fndecl)
*** 10754,10760 ****
  
    if (!use_rsqrt_p (mode))
      return NULL_TREE;
!   return aarch64_builtin_rsqrt (DECL_FUNCTION_CODE (fndecl));
  }
  
  /* Emit instruction sequence to compute either the approximate square root
--- 13281,13316 ----
  
    if (!use_rsqrt_p (mode))
      return NULL_TREE;
!   unsigned int code = DECL_MD_FUNCTION_CODE (fndecl);
!   unsigned int subcode = code >> AARCH64_BUILTIN_SHIFT;
!   switch (code & AARCH64_BUILTIN_CLASS)
!     {
!     case AARCH64_BUILTIN_GENERAL:
!       return aarch64_general_builtin_rsqrt (subcode);
! 
!     case AARCH64_BUILTIN_SVE:
!       return NULL_TREE;
!     }
!   gcc_unreachable ();
! }
! 
! /* Emit code to perform the floating-point operation:
! 
!      DST = SRC1 * SRC2
! 
!    where all three operands are already known to be registers.
!    If the operation is an SVE one, PTRUE is a suitable all-true
!    predicate.  */
! 
! static void
! aarch64_emit_mult (rtx dst, rtx ptrue, rtx src1, rtx src2)
! {
!   if (ptrue)
!     emit_insn (gen_aarch64_pred (UNSPEC_COND_FMUL, GET_MODE (dst),
! 				 dst, ptrue, src1, src2,
! 				 gen_int_mode (SVE_RELAXED_GP, SImode)));
!   else
!     emit_set_insn (dst, gen_rtx_MULT (GET_MODE (dst), src1, src2));
  }
  
  /* Emit instruction sequence to compute either the approximate square root
*************** aarch64_emit_approx_sqrt (rtx dst, rtx s
*** 10779,10785 ****
  		& AARCH64_APPROX_MODE (mode))))
  	return false;
  
!       if (flag_finite_math_only
  	  || flag_trapping_math
  	  || !flag_unsafe_math_optimizations
  	  || optimize_function_for_size_p (cfun))
--- 13335,13341 ----
  		& AARCH64_APPROX_MODE (mode))))
  	return false;
  
!       if (!flag_finite_math_only
  	  || flag_trapping_math
  	  || !flag_unsafe_math_optimizations
  	  || optimize_function_for_size_p (cfun))
*************** aarch64_emit_approx_sqrt (rtx dst, rtx s
*** 10789,10803 ****
      /* Caller assumes we cannot fail.  */
      gcc_assert (use_rsqrt_p (mode));
  
!   machine_mode mmsk = mode_for_int_vector (mode).require ();
!   rtx xmsk = gen_reg_rtx (mmsk);
    if (!recp)
!     /* When calculating the approximate square root, compare the
!        argument with 0.0 and create a mask.  */
!     emit_insn (gen_rtx_SET (xmsk,
! 			    gen_rtx_NEG (mmsk,
! 					 gen_rtx_EQ (mmsk, src,
! 						     CONST0_RTX (mode)))));
  
    /* Estimate the approximate reciprocal square root.  */
    rtx xdst = gen_reg_rtx (mode);
--- 13345,13377 ----
      /* Caller assumes we cannot fail.  */
      gcc_assert (use_rsqrt_p (mode));
  
!   rtx pg = NULL_RTX;
!   if (aarch64_sve_mode_p (mode))
!     pg = aarch64_ptrue_reg (aarch64_sve_pred_mode (mode));
!   machine_mode mmsk = (VECTOR_MODE_P (mode)
! 		       ? related_int_vector_mode (mode).require ()
! 		       : int_mode_for_mode (mode).require ());
!   rtx xmsk = NULL_RTX;
    if (!recp)
!     {
!       /* When calculating the approximate square root, compare the
! 	 argument with 0.0 and create a mask.  */
!       rtx zero = CONST0_RTX (mode);
!       if (pg)
! 	{
! 	  xmsk = gen_reg_rtx (GET_MODE (pg));
! 	  rtx hint = gen_int_mode (SVE_KNOWN_PTRUE, SImode);
! 	  emit_insn (gen_aarch64_pred_fcm (UNSPEC_COND_FCMNE, mode,
! 					   xmsk, pg, hint, src, zero));
! 	}
!       else
! 	{
! 	  xmsk = gen_reg_rtx (mmsk);
! 	  emit_insn (gen_rtx_SET (xmsk,
! 				  gen_rtx_NEG (mmsk,
! 					       gen_rtx_EQ (mmsk, src, zero))));
! 	}
!     }
  
    /* Estimate the approximate reciprocal square root.  */
    rtx xdst = gen_reg_rtx (mode);
*************** aarch64_emit_approx_sqrt (rtx dst, rtx s
*** 10818,10846 ****
    while (iterations--)
      {
        rtx x2 = gen_reg_rtx (mode);
!       emit_set_insn (x2, gen_rtx_MULT (mode, xdst, xdst));
  
        emit_insn (gen_aarch64_rsqrts (mode, x1, src, x2));
  
        if (iterations > 0)
! 	emit_set_insn (xdst, gen_rtx_MULT (mode, xdst, x1));
      }
  
    if (!recp)
      {
!       /* Qualify the approximate reciprocal square root when the argument is
! 	 0.0 by squashing the intermediary result to 0.0.  */
!       rtx xtmp = gen_reg_rtx (mmsk);
!       emit_set_insn (xtmp, gen_rtx_AND (mmsk, gen_rtx_NOT (mmsk, xmsk),
! 					      gen_rtx_SUBREG (mmsk, xdst, 0)));
!       emit_move_insn (xdst, gen_rtx_SUBREG (mode, xtmp, 0));
  
!       /* Calculate the approximate square root.  */
!       emit_set_insn (xdst, gen_rtx_MULT (mode, xdst, src));
      }
  
    /* Finalize the approximation.  */
!   emit_set_insn (dst, gen_rtx_MULT (mode, xdst, x1));
  
    return true;
  }
--- 13392,13431 ----
    while (iterations--)
      {
        rtx x2 = gen_reg_rtx (mode);
!       aarch64_emit_mult (x2, pg, xdst, xdst);
  
        emit_insn (gen_aarch64_rsqrts (mode, x1, src, x2));
  
        if (iterations > 0)
! 	aarch64_emit_mult (xdst, pg, xdst, x1);
      }
  
    if (!recp)
      {
!       if (pg)
! 	/* Multiply nonzero source values by the corresponding intermediate
! 	   result elements, so that the final calculation is the approximate
! 	   square root rather than its reciprocal.  Select a zero result for
! 	   zero source values, to avoid the Inf * 0 -> NaN that we'd get
! 	   otherwise.  */
! 	emit_insn (gen_cond (UNSPEC_COND_FMUL, mode,
! 			     xdst, xmsk, xdst, src, CONST0_RTX (mode)));
!       else
! 	{
! 	  /* Qualify the approximate reciprocal square root when the
! 	     argument is 0.0 by squashing the intermediary result to 0.0.  */
! 	  rtx xtmp = gen_reg_rtx (mmsk);
! 	  emit_set_insn (xtmp, gen_rtx_AND (mmsk, gen_rtx_NOT (mmsk, xmsk),
! 					    gen_rtx_SUBREG (mmsk, xdst, 0)));
! 	  emit_move_insn (xdst, gen_rtx_SUBREG (mode, xtmp, 0));
  
! 	  /* Calculate the approximate square root.  */
! 	  aarch64_emit_mult (xdst, pg, xdst, src);
! 	}
      }
  
    /* Finalize the approximation.  */
!   aarch64_emit_mult (dst, pg, xdst, x1);
  
    return true;
  }
*************** aarch64_emit_approx_div (rtx quo, rtx nu
*** 10870,10875 ****
--- 13455,13464 ----
    if (!TARGET_SIMD && VECTOR_MODE_P (mode))
      return false;
  
+   rtx pg = NULL_RTX;
+   if (aarch64_sve_mode_p (mode))
+     pg = aarch64_ptrue_reg (aarch64_sve_pred_mode (mode));
+ 
    /* Estimate the approximate reciprocal.  */
    rtx xrcp = gen_reg_rtx (mode);
    emit_insn (gen_aarch64_frecpe (mode, xrcp, den));
*************** aarch64_emit_approx_div (rtx quo, rtx nu
*** 10877,10886 ****
    /* Iterate over the series twice for SF and thrice for DF.  */
    int iterations = (GET_MODE_INNER (mode) == DFmode) ? 3 : 2;
  
!   /* Optionally iterate over the series once less for faster performance,
!      while sacrificing the accuracy.  */
    if (flag_mlow_precision_div)
!     iterations--;
  
    /* Iterate over the series to calculate the approximate reciprocal.  */
    rtx xtmp = gen_reg_rtx (mode);
--- 13466,13477 ----
    /* Iterate over the series twice for SF and thrice for DF.  */
    int iterations = (GET_MODE_INNER (mode) == DFmode) ? 3 : 2;
  
!   /* Optionally iterate over the series less for faster performance,
!      while sacrificing the accuracy.  The default is 2 for DF and 1 for SF.  */
    if (flag_mlow_precision_div)
!     iterations = (GET_MODE_INNER (mode) == DFmode
! 		  ? aarch64_double_recp_precision
! 		  : aarch64_float_recp_precision);
  
    /* Iterate over the series to calculate the approximate reciprocal.  */
    rtx xtmp = gen_reg_rtx (mode);
*************** aarch64_emit_approx_div (rtx quo, rtx nu
*** 10889,10895 ****
        emit_insn (gen_aarch64_frecps (mode, xtmp, xrcp, den));
  
        if (iterations > 0)
! 	emit_set_insn (xrcp, gen_rtx_MULT (mode, xrcp, xtmp));
      }
  
    if (num != CONST1_RTX (mode))
--- 13480,13486 ----
        emit_insn (gen_aarch64_frecps (mode, xtmp, xrcp, den));
  
        if (iterations > 0)
! 	aarch64_emit_mult (xrcp, pg, xrcp, xtmp);
      }
  
    if (num != CONST1_RTX (mode))
*************** aarch64_emit_approx_div (rtx quo, rtx nu
*** 10897,10907 ****
        /* As the approximate reciprocal of DEN is already calculated, only
  	 calculate the approximate division when NUM is not 1.0.  */
        rtx xnum = force_reg (mode, num);
!       emit_set_insn (xrcp, gen_rtx_MULT (mode, xrcp, xnum));
      }
  
    /* Finalize the approximation.  */
!   emit_set_insn (quo, gen_rtx_MULT (mode, xrcp, xtmp));
    return true;
  }
  
--- 13488,13498 ----
        /* As the approximate reciprocal of DEN is already calculated, only
  	 calculate the approximate division when NUM is not 1.0.  */
        rtx xnum = force_reg (mode, num);
!       aarch64_emit_mult (xrcp, pg, xrcp, xnum);
      }
  
    /* Finalize the approximation.  */
!   aarch64_emit_mult (quo, pg, xrcp, xtmp);
    return true;
  }
  
*************** aarch64_sched_issue_rate (void)
*** 10912,10917 ****
--- 13503,13525 ----
    return aarch64_tune_params.issue_rate;
  }
  
+ /* Implement TARGET_SCHED_VARIABLE_ISSUE.  */
+ static int
+ aarch64_sched_variable_issue (FILE *, int, rtx_insn *insn, int more)
+ {
+   if (DEBUG_INSN_P (insn))
+     return more;
+ 
+   rtx_code code = GET_CODE (PATTERN (insn));
+   if (code == USE || code == CLOBBER)
+     return more;
+ 
+   if (get_attr_type (insn) == TYPE_NO_INSN)
+     return more;
+ 
+   return more - 1;
+ }
+ 
  static int
  aarch64_sched_first_cycle_multipass_dfa_lookahead (void)
  {
*************** aarch64_builtin_vectorization_cost (enum
*** 11003,11008 ****
--- 13611,13747 ----
      }
  }
  
+ /* Return true if creating multiple copies of STMT_INFO for Advanced SIMD
+    vectors would produce a series of LDP or STP operations.  KIND is the
+    kind of statement that STMT_INFO represents.  */
+ static bool
+ aarch64_advsimd_ldp_stp_p (enum vect_cost_for_stmt kind,
+ 			   stmt_vec_info stmt_info)
+ {
+   switch (kind)
+     {
+     case vector_load:
+     case vector_store:
+     case unaligned_load:
+     case unaligned_store:
+       break;
+ 
+     default:
+       return false;
+     }
+ 
+   if (aarch64_tune_params.extra_tuning_flags
+       & AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS)
+     return false;
+ 
+   return is_gimple_assign (stmt_info->stmt);
+ }
+ 
+ /* Return true if STMT_INFO extends the result of a load.  */
+ static bool
+ aarch64_extending_load_p (stmt_vec_info stmt_info)
+ {
+   gassign *assign = dyn_cast <gassign *> (stmt_info->stmt);
+   if (!assign || !CONVERT_EXPR_CODE_P (gimple_assign_rhs_code (assign)))
+     return false;
+ 
+   tree rhs = gimple_assign_rhs1 (stmt_info->stmt);
+   tree lhs_type = TREE_TYPE (gimple_assign_lhs (assign));
+   tree rhs_type = TREE_TYPE (rhs);
+   if (!INTEGRAL_TYPE_P (lhs_type)
+       || !INTEGRAL_TYPE_P (rhs_type)
+       || TYPE_PRECISION (lhs_type) <= TYPE_PRECISION (rhs_type))
+     return false;
+ 
+   stmt_vec_info def_stmt_info = stmt_info->vinfo->lookup_def (rhs);
+   return (def_stmt_info
+ 	  && STMT_VINFO_DATA_REF (def_stmt_info)
+ 	  && DR_IS_READ (STMT_VINFO_DATA_REF (def_stmt_info)));
+ }
+ 
+ /* Return true if STMT_INFO is an integer truncation.  */
+ static bool
+ aarch64_integer_truncation_p (stmt_vec_info stmt_info)
+ {
+   gassign *assign = dyn_cast <gassign *> (stmt_info->stmt);
+   if (!assign || !CONVERT_EXPR_CODE_P (gimple_assign_rhs_code (assign)))
+     return false;
+ 
+   tree lhs_type = TREE_TYPE (gimple_assign_lhs (assign));
+   tree rhs_type = TREE_TYPE (gimple_assign_rhs1 (assign));
+   return (INTEGRAL_TYPE_P (lhs_type)
+ 	  && INTEGRAL_TYPE_P (rhs_type)
+ 	  && TYPE_PRECISION (lhs_type) < TYPE_PRECISION (rhs_type));
+ }
+ 
+ /* STMT_COST is the cost calculated by aarch64_builtin_vectorization_cost
+    for STMT_INFO, which has cost kind KIND and which when vectorized would
+    operate on vector type VECTYPE.  Adjust the cost as necessary for SVE
+    targets.  */
+ static unsigned int
+ aarch64_sve_adjust_stmt_cost (vect_cost_for_stmt kind,
+ 			      stmt_vec_info stmt_info, tree vectype,
+ 			      unsigned int stmt_cost)
+ {
+   /* Unlike vec_promote_demote, vector_stmt conversions do not change the
+      vector register size or number of units.  Integer promotions of this
+      type therefore map to SXT[BHW] or UXT[BHW].
+ 
+      Most loads have extending forms that can do the sign or zero extension
+      on the fly.  Optimistically assume that a load followed by an extension
+      will fold to this form during combine, and that the extension therefore
+      comes for free.  */
+   if (kind == vector_stmt && aarch64_extending_load_p (stmt_info))
+     stmt_cost = 0;
+ 
+   /* For similar reasons, vector_stmt integer truncations are a no-op,
+      because we can just ignore the unused upper bits of the source.  */
+   if (kind == vector_stmt && aarch64_integer_truncation_p (stmt_info))
+     stmt_cost = 0;
+ 
+   /* Advanced SIMD can load and store pairs of registers using LDP and STP,
+      but there are no equivalent instructions for SVE.  This means that
+      (all other things being equal) 128-bit SVE needs twice as many load
+      and store instructions as Advanced SIMD in order to process vector pairs.
+ 
+      Also, scalar code can often use LDP and STP to access pairs of values,
+      so it is too simplistic to say that one SVE load or store replaces
+      VF scalar loads and stores.
+ 
+      Ideally we would account for this in the scalar and Advanced SIMD
+      costs by making suitable load/store pairs as cheap as a single
+      load/store.  However, that would be a very invasive change and in
+      practice it tends to stress other parts of the cost model too much.
+      E.g. stores of scalar constants currently count just a store,
+      whereas stores of vector constants count a store and a vec_init.
+      This is an artificial distinction for AArch64, where stores of
+      nonzero scalar constants need the same kind of register invariant
+      as vector stores.
+ 
+      An alternative would be to double the cost of any SVE loads and stores
+      that could be paired in Advanced SIMD (and possibly also paired in
+      scalar code).  But this tends to stress other parts of the cost model
+      in the same way.  It also means that we can fall back to Advanced SIMD
+      even if full-loop predication would have been useful.
+ 
+      Here we go for a more conservative version: double the costs of SVE
+      loads and stores if one iteration of the scalar loop processes enough
+      elements for it to use a whole number of Advanced SIMD LDP or STP
+      instructions.  This makes it very likely that the VF would be 1 for
+      Advanced SIMD, and so no epilogue should be needed.  */
+   if (STMT_VINFO_GROUPED_ACCESS (stmt_info))
+     {
+       stmt_vec_info first = DR_GROUP_FIRST_ELEMENT (stmt_info);
+       unsigned int count = DR_GROUP_SIZE (first) - DR_GROUP_GAP (first);
+       unsigned int elt_bits = GET_MODE_UNIT_BITSIZE (TYPE_MODE (vectype));
+       if (multiple_p (count * elt_bits, 256)
+ 	  && aarch64_advsimd_ldp_stp_p (kind, stmt_info))
+ 	stmt_cost *= 2;
+     }
+ 
+   return stmt_cost;
+ }
+ 
  /* Implement targetm.vectorize.add_stmt_cost.  */
  static unsigned
  aarch64_add_stmt_cost (void *data, int count, enum vect_cost_for_stmt kind,
*************** aarch64_add_stmt_cost (void *data, int c
*** 11018,11023 ****
--- 13757,13766 ----
        int stmt_cost =
  	    aarch64_builtin_vectorization_cost (kind, vectype, misalign);
  
+       if (stmt_info && vectype && aarch64_sve_mode_p (TYPE_MODE (vectype)))
+ 	stmt_cost = aarch64_sve_adjust_stmt_cost (kind, stmt_info, vectype,
+ 						  stmt_cost);
+ 
        /* Statements in an inner loop relative to the loop being
  	 vectorized are weighted more heavily.  The value here is
  	 arbitrary and could potentially be improved with analysis.  */
*************** static void initialize_aarch64_code_mode
*** 11042,11048 ****
  
  static enum aarch64_parse_opt_result
  aarch64_parse_arch (const char *to_parse, const struct processor **res,
! 		    unsigned long *isa_flags, std::string *invalid_extension)
  {
    const char *ext;
    const struct processor *arch;
--- 13785,13791 ----
  
  static enum aarch64_parse_opt_result
  aarch64_parse_arch (const char *to_parse, const struct processor **res,
! 		    uint64_t *isa_flags, std::string *invalid_extension)
  {
    const char *ext;
    const struct processor *arch;
*************** aarch64_parse_arch (const char *to_parse
*** 11065,11071 ****
        if (strlen (arch->name) == len
  	  && strncmp (arch->name, to_parse, len) == 0)
  	{
! 	  unsigned long isa_temp = arch->flags;
  
  	  if (ext != NULL)
  	    {
--- 13808,13814 ----
        if (strlen (arch->name) == len
  	  && strncmp (arch->name, to_parse, len) == 0)
  	{
! 	  uint64_t isa_temp = arch->flags;
  
  	  if (ext != NULL)
  	    {
*************** aarch64_parse_arch (const char *to_parse
*** 11097,11103 ****
  
  static enum aarch64_parse_opt_result
  aarch64_parse_cpu (const char *to_parse, const struct processor **res,
! 		   unsigned long *isa_flags, std::string *invalid_extension)
  {
    const char *ext;
    const struct processor *cpu;
--- 13840,13846 ----
  
  static enum aarch64_parse_opt_result
  aarch64_parse_cpu (const char *to_parse, const struct processor **res,
! 		   uint64_t *isa_flags, std::string *invalid_extension)
  {
    const char *ext;
    const struct processor *cpu;
*************** aarch64_parse_cpu (const char *to_parse,
*** 11119,11125 ****
      {
        if (strlen (cpu->name) == len && strncmp (cpu->name, to_parse, len) == 0)
  	{
! 	  unsigned long isa_temp = cpu->flags;
  
  
  	  if (ext != NULL)
--- 13862,13868 ----
      {
        if (strlen (cpu->name) == len && strncmp (cpu->name, to_parse, len) == 0)
  	{
! 	  uint64_t isa_temp = cpu->flags;
  
  
  	  if (ext != NULL)
*************** aarch64_override_options_internal (struc
*** 11539,11611 ****
  
    /* We don't mind passing in global_options_set here as we don't use
       the *options_set structs anyway.  */
!   maybe_set_param_value (PARAM_SCHED_AUTOPREF_QUEUE_DEPTH,
! 			 queue_depth,
! 			 opts->x_param_values,
! 			 global_options_set.x_param_values);
  
    /* Set up parameters to be used in prefetching algorithm.  Do not
       override the defaults unless we are tuning for a core we have
       researched values for.  */
    if (aarch64_tune_params.prefetch->num_slots > 0)
!     maybe_set_param_value (PARAM_SIMULTANEOUS_PREFETCHES,
! 			   aarch64_tune_params.prefetch->num_slots,
! 			   opts->x_param_values,
! 			   global_options_set.x_param_values);
    if (aarch64_tune_params.prefetch->l1_cache_size >= 0)
!     maybe_set_param_value (PARAM_L1_CACHE_SIZE,
! 			   aarch64_tune_params.prefetch->l1_cache_size,
! 			   opts->x_param_values,
! 			   global_options_set.x_param_values);
    if (aarch64_tune_params.prefetch->l1_cache_line_size >= 0)
!     maybe_set_param_value (PARAM_L1_CACHE_LINE_SIZE,
! 			   aarch64_tune_params.prefetch->l1_cache_line_size,
! 			   opts->x_param_values,
! 			   global_options_set.x_param_values);
    if (aarch64_tune_params.prefetch->l2_cache_size >= 0)
!     maybe_set_param_value (PARAM_L2_CACHE_SIZE,
! 			   aarch64_tune_params.prefetch->l2_cache_size,
! 			   opts->x_param_values,
! 			   global_options_set.x_param_values);
    if (!aarch64_tune_params.prefetch->prefetch_dynamic_strides)
!     maybe_set_param_value (PARAM_PREFETCH_DYNAMIC_STRIDES,
! 			   0,
! 			   opts->x_param_values,
! 			   global_options_set.x_param_values);
    if (aarch64_tune_params.prefetch->minimum_stride >= 0)
!     maybe_set_param_value (PARAM_PREFETCH_MINIMUM_STRIDE,
! 			   aarch64_tune_params.prefetch->minimum_stride,
! 			   opts->x_param_values,
! 			   global_options_set.x_param_values);
  
    /* Use the alternative scheduling-pressure algorithm by default.  */
!   maybe_set_param_value (PARAM_SCHED_PRESSURE_ALGORITHM, SCHED_PRESSURE_MODEL,
! 			 opts->x_param_values,
! 			 global_options_set.x_param_values);
! 
!   /* If the user hasn't changed it via configure then set the default to 64 KB
!      for the backend.  */
!   maybe_set_param_value (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE,
! 			 DEFAULT_STK_CLASH_GUARD_SIZE == 0
! 			   ? 16 : DEFAULT_STK_CLASH_GUARD_SIZE,
! 			 opts->x_param_values,
! 			 global_options_set.x_param_values);
  
    /* Validate the guard size.  */
!   int guard_size = PARAM_VALUE (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE);
  
    /* Enforce that interval is the same size as size so the mid-end does the
       right thing.  */
!   maybe_set_param_value (PARAM_STACK_CLASH_PROTECTION_PROBE_INTERVAL,
! 			 guard_size,
! 			 opts->x_param_values,
! 			 global_options_set.x_param_values);
  
    /* The maybe_set calls won't update the value if the user has explicitly set
       one.  Which means we need to validate that probing interval and guard size
       are equal.  */
    int probe_interval
!     = PARAM_VALUE (PARAM_STACK_CLASH_PROTECTION_PROBE_INTERVAL);
    if (guard_size != probe_interval)
      error ("stack clash guard size %<%d%> must be equal to probing interval "
  	   "%<%d%>", guard_size, probe_interval);
--- 14282,14341 ----
  
    /* We don't mind passing in global_options_set here as we don't use
       the *options_set structs anyway.  */
!   SET_OPTION_IF_UNSET (opts, &global_options_set,
! 		       param_sched_autopref_queue_depth, queue_depth);
  
    /* Set up parameters to be used in prefetching algorithm.  Do not
       override the defaults unless we are tuning for a core we have
       researched values for.  */
    if (aarch64_tune_params.prefetch->num_slots > 0)
!     SET_OPTION_IF_UNSET (opts, &global_options_set,
! 			 param_simultaneous_prefetches,
! 			 aarch64_tune_params.prefetch->num_slots);
    if (aarch64_tune_params.prefetch->l1_cache_size >= 0)
!     SET_OPTION_IF_UNSET (opts, &global_options_set,
! 			 param_l1_cache_size,
! 			 aarch64_tune_params.prefetch->l1_cache_size);
    if (aarch64_tune_params.prefetch->l1_cache_line_size >= 0)
!     SET_OPTION_IF_UNSET (opts, &global_options_set,
! 			 param_l1_cache_line_size,
! 			 aarch64_tune_params.prefetch->l1_cache_line_size);
    if (aarch64_tune_params.prefetch->l2_cache_size >= 0)
!     SET_OPTION_IF_UNSET (opts, &global_options_set,
! 			 param_l2_cache_size,
! 			 aarch64_tune_params.prefetch->l2_cache_size);
    if (!aarch64_tune_params.prefetch->prefetch_dynamic_strides)
!     SET_OPTION_IF_UNSET (opts, &global_options_set,
! 			 param_prefetch_dynamic_strides, 0);
    if (aarch64_tune_params.prefetch->minimum_stride >= 0)
!     SET_OPTION_IF_UNSET (opts, &global_options_set,
! 			 param_prefetch_minimum_stride,
! 			 aarch64_tune_params.prefetch->minimum_stride);
  
    /* Use the alternative scheduling-pressure algorithm by default.  */
!   SET_OPTION_IF_UNSET (opts, &global_options_set,
! 		       param_sched_pressure_algorithm,
! 		       SCHED_PRESSURE_MODEL);
  
    /* Validate the guard size.  */
!   int guard_size = param_stack_clash_protection_guard_size;
! 
!   if (guard_size != 12 && guard_size != 16)
!     error ("only values 12 (4 KB) and 16 (64 KB) are supported for guard "
! 	   "size.  Given value %d (%llu KB) is out of range",
! 	   guard_size, (1ULL << guard_size) / 1024ULL);
  
    /* Enforce that interval is the same size as size so the mid-end does the
       right thing.  */
!   SET_OPTION_IF_UNSET (opts, &global_options_set,
! 		       param_stack_clash_protection_probe_interval,
! 		       guard_size);
  
    /* The maybe_set calls won't update the value if the user has explicitly set
       one.  Which means we need to validate that probing interval and guard size
       are equal.  */
    int probe_interval
!     = param_stack_clash_protection_probe_interval;
    if (guard_size != probe_interval)
      error ("stack clash guard size %<%d%> must be equal to probing interval "
  	   "%<%d%>", guard_size, probe_interval);
*************** aarch64_print_hint_for_extensions (const
*** 11704,11710 ****
  
  static bool
  aarch64_validate_mcpu (const char *str, const struct processor **res,
! 		       unsigned long *isa_flags)
  {
    std::string invalid_extension;
    enum aarch64_parse_opt_result parse_res
--- 14434,14440 ----
  
  static bool
  aarch64_validate_mcpu (const char *str, const struct processor **res,
! 		       uint64_t *isa_flags)
  {
    std::string invalid_extension;
    enum aarch64_parse_opt_result parse_res
*************** aarch64_validate_mbranch_protection (con
*** 11831,11839 ****
    enum aarch64_parse_opt_result res =
      aarch64_parse_branch_protection (const_str, &str);
    if (res == AARCH64_PARSE_INVALID_ARG)
!     error ("invalid arg %<%s%> for %<-mbranch-protection=%>", str);
    else if (res == AARCH64_PARSE_MISSING_ARG)
!     error ("missing arg for %<-mbranch-protection=%>");
    free (str);
    return res == AARCH64_PARSE_OK;
  }
--- 14561,14569 ----
    enum aarch64_parse_opt_result res =
      aarch64_parse_branch_protection (const_str, &str);
    if (res == AARCH64_PARSE_INVALID_ARG)
!     error ("invalid argument %<%s%> for %<-mbranch-protection=%>", str);
    else if (res == AARCH64_PARSE_MISSING_ARG)
!     error ("missing argument for %<-mbranch-protection=%>");
    free (str);
    return res == AARCH64_PARSE_OK;
  }
*************** aarch64_validate_mbranch_protection (con
*** 11845,11851 ****
  
  static bool
  aarch64_validate_march (const char *str, const struct processor **res,
! 			 unsigned long *isa_flags)
  {
    std::string invalid_extension;
    enum aarch64_parse_opt_result parse_res
--- 14575,14581 ----
  
  static bool
  aarch64_validate_march (const char *str, const struct processor **res,
! 			 uint64_t *isa_flags)
  {
    std::string invalid_extension;
    enum aarch64_parse_opt_result parse_res
*************** aarch64_get_arch (enum aarch64_arch arch
*** 11940,11950 ****
  static poly_uint16
  aarch64_convert_sve_vector_bits (aarch64_sve_vector_bits_enum value)
  {
!   /* For now generate vector-length agnostic code for -msve-vector-bits=128.
!      This ensures we can clearly distinguish SVE and Advanced SIMD modes when
!      deciding which .md file patterns to use and when deciding whether
!      something is a legitimate address or constant.  */
!   if (value == SVE_SCALABLE || value == SVE_128)
      return poly_uint16 (2, 2);
    else
      return (int) value / 64;
--- 14670,14686 ----
  static poly_uint16
  aarch64_convert_sve_vector_bits (aarch64_sve_vector_bits_enum value)
  {
!   /* 128-bit SVE and Advanced SIMD modes use different register layouts
!      on big-endian targets, so we would need to forbid subregs that convert
!      from one to the other.  By default a reinterpret sequence would then
!      involve a store to memory in one mode and a load back in the other.
!      Even if we optimize that sequence using reverse instructions,
!      it would still be a significant potential overhead.
! 
!      For now, it seems better to generate length-agnostic code for that
!      case instead.  */
!   if (value == SVE_SCALABLE
!       || (value == SVE_128 && BYTES_BIG_ENDIAN))
      return poly_uint16 (2, 2);
    else
      return (int) value / 64;
*************** aarch64_convert_sve_vector_bits (aarch64
*** 11960,11967 ****
  static void
  aarch64_override_options (void)
  {
!   unsigned long cpu_isa = 0;
!   unsigned long arch_isa = 0;
    aarch64_isa_flags = 0;
  
    bool valid_cpu = true;
--- 14696,14703 ----
  static void
  aarch64_override_options (void)
  {
!   uint64_t cpu_isa = 0;
!   uint64_t arch_isa = 0;
    aarch64_isa_flags = 0;
  
    bool valid_cpu = true;
*************** aarch64_override_options (void)
*** 12021,12028 ****
        if (selected_arch->arch != selected_cpu->arch)
  	{
  	  warning (0, "switch %<-mcpu=%s%> conflicts with %<-march=%s%> switch",
! 		       all_architectures[selected_cpu->arch].name,
! 		       selected_arch->name);
  	}
        aarch64_isa_flags = arch_isa;
        explicit_arch = selected_arch->arch;
--- 14757,14764 ----
        if (selected_arch->arch != selected_cpu->arch)
  	{
  	  warning (0, "switch %<-mcpu=%s%> conflicts with %<-march=%s%> switch",
! 		       aarch64_cpu_string,
! 		       aarch64_arch_string);
  	}
        aarch64_isa_flags = arch_isa;
        explicit_arch = selected_arch->arch;
*************** aarch64_init_expanders (void)
*** 12134,12165 ****
  static void
  initialize_aarch64_code_model (struct gcc_options *opts)
  {
!    if (opts->x_flag_pic)
!      {
!        switch (opts->x_aarch64_cmodel_var)
! 	 {
! 	 case AARCH64_CMODEL_TINY:
! 	   aarch64_cmodel = AARCH64_CMODEL_TINY_PIC;
! 	   break;
! 	 case AARCH64_CMODEL_SMALL:
  #ifdef HAVE_AS_SMALL_PIC_RELOCS
! 	   aarch64_cmodel = (flag_pic == 2
! 			     ? AARCH64_CMODEL_SMALL_PIC
! 			     : AARCH64_CMODEL_SMALL_SPIC);
  #else
! 	   aarch64_cmodel = AARCH64_CMODEL_SMALL_PIC;
  #endif
! 	   break;
! 	 case AARCH64_CMODEL_LARGE:
! 	   sorry ("code model %qs with %<-f%s%>", "large",
! 		  opts->x_flag_pic > 1 ? "PIC" : "pic");
! 	   break;
! 	 default:
! 	   gcc_unreachable ();
! 	 }
!      }
!    else
!      aarch64_cmodel = opts->x_aarch64_cmodel_var;
  }
  
  /* Implement TARGET_OPTION_SAVE.  */
--- 14870,14906 ----
  static void
  initialize_aarch64_code_model (struct gcc_options *opts)
  {
!   aarch64_cmodel = opts->x_aarch64_cmodel_var;
!   switch (opts->x_aarch64_cmodel_var)
!     {
!     case AARCH64_CMODEL_TINY:
!       if (opts->x_flag_pic)
! 	aarch64_cmodel = AARCH64_CMODEL_TINY_PIC;
!       break;
!     case AARCH64_CMODEL_SMALL:
!       if (opts->x_flag_pic)
! 	{
  #ifdef HAVE_AS_SMALL_PIC_RELOCS
! 	  aarch64_cmodel = (flag_pic == 2
! 			    ? AARCH64_CMODEL_SMALL_PIC
! 			    : AARCH64_CMODEL_SMALL_SPIC);
  #else
! 	  aarch64_cmodel = AARCH64_CMODEL_SMALL_PIC;
  #endif
! 	}
!       break;
!     case AARCH64_CMODEL_LARGE:
!       if (opts->x_flag_pic)
! 	sorry ("code model %qs with %<-f%s%>", "large",
! 	       opts->x_flag_pic > 1 ? "PIC" : "pic");
!       if (opts->x_aarch64_abi == AARCH64_ABI_ILP32)
! 	sorry ("code model %qs not supported in ilp32 mode", "large");
!       break;
!     case AARCH64_CMODEL_TINY_PIC:
!     case AARCH64_CMODEL_SMALL_PIC:
!     case AARCH64_CMODEL_SMALL_SPIC:
!       gcc_unreachable ();
!     }
  }
  
  /* Implement TARGET_OPTION_SAVE.  */
*************** aarch64_option_print (FILE *file, int in
*** 12201,12207 ****
  {
    const struct processor *cpu
      = aarch64_get_tune_cpu (ptr->x_explicit_tune_core);
!   unsigned long isa_flags = ptr->x_aarch64_isa_flags;
    const struct processor *arch = aarch64_get_arch (ptr->x_explicit_arch);
    std::string extension
      = aarch64_get_extension_string_for_isa_flags (isa_flags, arch->flags);
--- 14942,14948 ----
  {
    const struct processor *cpu
      = aarch64_get_tune_cpu (ptr->x_explicit_tune_core);
!   uint64_t isa_flags = ptr->x_aarch64_isa_flags;
    const struct processor *arch = aarch64_get_arch (ptr->x_explicit_arch);
    std::string extension
      = aarch64_get_extension_string_for_isa_flags (isa_flags, arch->flags);
*************** aarch64_handle_attr_cpu (const char *str
*** 12389,12395 ****
   static bool
   aarch64_handle_attr_branch_protection (const char* str)
   {
!   char *err_str = (char *) xmalloc (strlen (str));
    enum aarch64_parse_opt_result res = aarch64_parse_branch_protection (str,
  								      &err_str);
    bool success = false;
--- 15130,15136 ----
   static bool
   aarch64_handle_attr_branch_protection (const char* str)
   {
!   char *err_str = (char *) xmalloc (strlen (str) + 1);
    enum aarch64_parse_opt_result res = aarch64_parse_branch_protection (str,
  								      &err_str);
    bool success = false;
*************** static bool
*** 12454,12460 ****
  aarch64_handle_attr_isa_flags (char *str)
  {
    enum aarch64_parse_opt_result parse_res;
!   unsigned long isa_flags = aarch64_isa_flags;
  
    /* We allow "+nothing" in the beginning to clear out all architectural
       features if the user wants to handpick specific features.  */
--- 15195,15201 ----
  aarch64_handle_attr_isa_flags (char *str)
  {
    enum aarch64_parse_opt_result parse_res;
!   uint64_t isa_flags = aarch64_isa_flags;
  
    /* We allow "+nothing" in the beginning to clear out all architectural
       features if the user wants to handpick specific features.  */
*************** aarch64_process_one_target_attr (char *a
*** 12539,12548 ****
    char *str_to_check = (char *) alloca (len + 1);
    strcpy (str_to_check, arg_str);
  
-   /* Skip leading whitespace.  */
-   while (*str_to_check == ' ' || *str_to_check == '\t')
-     str_to_check++;
- 
    /* We have something like __attribute__ ((target ("+fp+nosimd"))).
       It is easier to detect and handle it explicitly here rather than going
       through the machinery for the rest of the target attributes in this
--- 15280,15285 ----
*************** aarch64_can_inline_p (tree caller, tree
*** 12945,12950 ****
--- 15682,15707 ----
    return true;
  }
  
+ /* Return the ID of the TLDESC ABI, initializing the descriptor if hasn't
+    been already.  */
+ 
+ unsigned int
+ aarch64_tlsdesc_abi_id ()
+ {
+   predefined_function_abi &tlsdesc_abi = function_abis[ARM_PCS_TLSDESC];
+   if (!tlsdesc_abi.initialized_p ())
+     {
+       HARD_REG_SET full_reg_clobbers;
+       CLEAR_HARD_REG_SET (full_reg_clobbers);
+       SET_HARD_REG_BIT (full_reg_clobbers, R0_REGNUM);
+       SET_HARD_REG_BIT (full_reg_clobbers, CC_REGNUM);
+       for (int regno = P0_REGNUM; regno <= P15_REGNUM; ++regno)
+ 	SET_HARD_REG_BIT (full_reg_clobbers, regno);
+       tlsdesc_abi.initialize (ARM_PCS_TLSDESC, full_reg_clobbers);
+     }
+   return tlsdesc_abi.id ();
+ }
+ 
  /* Return true if SYMBOL_REF X binds locally.  */
  
  static bool
*************** aarch64_classify_symbol (rtx x, HOST_WID
*** 13050,13075 ****
  	     the offset does not cause overflow of the final address.  But
  	     we have no way of knowing the address of symbol at compile time
  	     so we can't accurately say if the distance between the PC and
! 	     symbol + offset is outside the addressible range of +/-1M in the
! 	     TINY code model.  So we rely on images not being greater than
! 	     1M and cap the offset at 1M and anything beyond 1M will have to
! 	     be loaded using an alternative mechanism.  Furthermore if the
! 	     symbol is a weak reference to something that isn't known to
! 	     resolve to a symbol in this module, then force to memory.  */
! 	  if ((SYMBOL_REF_WEAK (x)
! 	       && !aarch64_symbol_binds_local_p (x))
! 	      || !IN_RANGE (offset, -1048575, 1048575))
  	    return SYMBOL_FORCE_TO_MEM;
  	  return SYMBOL_TINY_ABSOLUTE;
  
  	case AARCH64_CMODEL_SMALL:
  	  /* Same reasoning as the tiny code model, but the offset cap here is
! 	     4G.  */
! 	  if ((SYMBOL_REF_WEAK (x)
! 	       && !aarch64_symbol_binds_local_p (x))
! 	      || !IN_RANGE (offset, HOST_WIDE_INT_C (-4294967263),
! 			    HOST_WIDE_INT_C (4294967264)))
  	    return SYMBOL_FORCE_TO_MEM;
  	  return SYMBOL_SMALL_ABSOLUTE;
  
  	case AARCH64_CMODEL_TINY_PIC:
--- 15807,15837 ----
  	     the offset does not cause overflow of the final address.  But
  	     we have no way of knowing the address of symbol at compile time
  	     so we can't accurately say if the distance between the PC and
! 	     symbol + offset is outside the addressible range of +/-1MB in the
! 	     TINY code model.  So we limit the maximum offset to +/-64KB and
! 	     assume the offset to the symbol is not larger than +/-(1MB - 64KB).
! 	     If offset_within_block_p is true we allow larger offsets.
! 	     Furthermore force to memory if the symbol is a weak reference to
! 	     something that doesn't resolve to a symbol in this module.  */
! 
! 	  if (SYMBOL_REF_WEAK (x) && !aarch64_symbol_binds_local_p (x))
  	    return SYMBOL_FORCE_TO_MEM;
+ 	  if (!(IN_RANGE (offset, -0x10000, 0x10000)
+ 		|| offset_within_block_p (x, offset)))
+ 	    return SYMBOL_FORCE_TO_MEM;
+ 
  	  return SYMBOL_TINY_ABSOLUTE;
  
  	case AARCH64_CMODEL_SMALL:
  	  /* Same reasoning as the tiny code model, but the offset cap here is
! 	     1MB, allowing +/-3.9GB for the offset to the symbol.  */
! 
! 	  if (SYMBOL_REF_WEAK (x) && !aarch64_symbol_binds_local_p (x))
! 	    return SYMBOL_FORCE_TO_MEM;
! 	  if (!(IN_RANGE (offset, -0x100000, 0x100000)
! 		|| offset_within_block_p (x, offset)))
  	    return SYMBOL_FORCE_TO_MEM;
+ 
  	  return SYMBOL_SMALL_ABSOLUTE;
  
  	case AARCH64_CMODEL_TINY_PIC:
*************** aarch64_gimplify_va_arg_expr (tree valis
*** 13378,13384 ****
    HOST_WIDE_INT size, rsize, adjust, align;
    tree t, u, cond1, cond2;
  
!   indirect_p = pass_by_reference (NULL, TYPE_MODE (type), type, false);
    if (indirect_p)
      type = build_pointer_type (type);
  
--- 16140,16146 ----
    HOST_WIDE_INT size, rsize, adjust, align;
    tree t, u, cond1, cond2;
  
!   indirect_p = pass_va_arg_by_reference (type);
    if (indirect_p)
      type = build_pointer_type (type);
  
*************** aarch64_gimplify_va_arg_expr (tree valis
*** 13400,13410 ****
  
    dw_align = false;
    adjust = 0;
!   if (aarch64_vfp_is_call_or_return_candidate (mode,
! 					       type,
! 					       &ag_mode,
! 					       &nregs,
! 					       &is_ha))
      {
        /* No frontends can create types with variable-sized modes, so we
  	 shouldn't be asked to pass or return them.  */
--- 16162,16169 ----
  
    dw_align = false;
    adjust = 0;
!   if (aarch64_vfp_is_call_or_return_candidate (mode, type, &ag_mode, &nregs,
! 					       &is_ha, false))
      {
        /* No frontends can create types with variable-sized modes, so we
  	 shouldn't be asked to pass or return them.  */
*************** aarch64_gimplify_va_arg_expr (tree valis
*** 13572,13577 ****
--- 16331,16340 ----
  	  field_t = aarch64_fp16_type_node;
  	  field_ptr_t = aarch64_fp16_ptr_type_node;
  	  break;
+ 	case E_BFmode:
+ 	  field_t = aarch64_bf16_type_node;
+ 	  field_ptr_t = aarch64_bf16_ptr_type_node;
+ 	  break;
  	case E_V2SImode:
  	case E_V4SImode:
  	    {
*************** aarch64_gimplify_va_arg_expr (tree valis
*** 13623,13631 ****
  /* Implement TARGET_SETUP_INCOMING_VARARGS.  */
  
  static void
! aarch64_setup_incoming_varargs (cumulative_args_t cum_v, machine_mode mode,
! 				tree type, int *pretend_size ATTRIBUTE_UNUSED,
! 				int no_rtl)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    CUMULATIVE_ARGS local_cum;
--- 16386,16394 ----
  /* Implement TARGET_SETUP_INCOMING_VARARGS.  */
  
  static void
! aarch64_setup_incoming_varargs (cumulative_args_t cum_v,
! 				const function_arg_info &arg,
! 				int *pretend_size ATTRIBUTE_UNUSED, int no_rtl)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    CUMULATIVE_ARGS local_cum;
*************** aarch64_setup_incoming_varargs (cumulati
*** 13636,13642 ****
       argument.  Advance a local copy of CUM past the last "real" named
       argument, to find out how many registers are left over.  */
    local_cum = *cum;
!   aarch64_function_arg_advance (pack_cumulative_args(&local_cum), mode, type, true);
  
    /* Found out how many registers we need to save.
       Honor tree-stdvar analysis results.  */
--- 16399,16405 ----
       argument.  Advance a local copy of CUM past the last "real" named
       argument, to find out how many registers are left over.  */
    local_cum = *cum;
!   aarch64_function_arg_advance (pack_cumulative_args(&local_cum), arg);
  
    /* Found out how many registers we need to save.
       Honor tree-stdvar analysis results.  */
*************** aarch64_conditional_register_usage (void
*** 13723,13728 ****
--- 16486,16495 ----
  	call_used_regs[i] = 1;
        }
  
+   /* Only allow the FFR and FFRT to be accessed via special patterns.  */
+   CLEAR_HARD_REG_BIT (operand_reg_set, FFR_REGNUM);
+   CLEAR_HARD_REG_BIT (operand_reg_set, FFRT_REGNUM);
+ 
    /* When tracking speculation, we need a couple of call-clobbered registers
       to track the speculation state.  It would be nice to just use
       IP0 and IP1, but currently there are numerous places that just
*************** aarch64_conditional_register_usage (void
*** 13737,13753 ****
      }
  }
  
  /* Walk down the type tree of TYPE counting consecutive base elements.
     If *MODEP is VOIDmode, then set it to the first valid floating point
     type.  If a non-floating point type is found, or if a floating point
     type that doesn't match a non-VOIDmode *MODEP is found, then return -1,
!    otherwise return the count in the sub-tree.  */
  static int
! aapcs_vfp_sub_candidate (const_tree type, machine_mode *modep)
  {
    machine_mode mode;
    HOST_WIDE_INT size;
  
    switch (TREE_CODE (type))
      {
      case REAL_TYPE:
--- 16504,16576 ----
      }
  }
  
+ /* Implement TARGET_MEMBER_TYPE_FORCES_BLK.  */
+ 
+ bool
+ aarch64_member_type_forces_blk (const_tree field_or_array, machine_mode mode)
+ {
+   /* For records we're passed a FIELD_DECL, for arrays we're passed
+      an ARRAY_TYPE.  In both cases we're interested in the TREE_TYPE.  */
+   const_tree type = TREE_TYPE (field_or_array);
+ 
+   /* Assign BLKmode to anything that contains multiple SVE predicates.
+      For structures, the "multiple" case is indicated by MODE being
+      VOIDmode.  */
+   unsigned int num_zr, num_pr;
+   if (aarch64_sve::builtin_type_p (type, &num_zr, &num_pr) && num_pr != 0)
+     {
+       if (TREE_CODE (field_or_array) == ARRAY_TYPE)
+ 	return !simple_cst_equal (TYPE_SIZE (field_or_array),
+ 				  TYPE_SIZE (type));
+       return mode == VOIDmode;
+     }
+ 
+   return default_member_type_forces_blk (field_or_array, mode);
+ }
+ 
+ /* Bitmasks that indicate whether earlier versions of GCC would have
+    taken a different path through the ABI logic.  This should result in
+    a -Wpsabi warning if the earlier path led to a different ABI decision.
+ 
+    WARN_PSABI_EMPTY_CXX17_BASE
+       Indicates that the type includes an artificial empty C++17 base field
+       that, prior to GCC 10.1, would prevent the type from being treated as
+       a HFA or HVA.  See PR94383 for details.
+ 
+    WARN_PSABI_NO_UNIQUE_ADDRESS
+       Indicates that the type includes an empty [[no_unique_address]] field
+       that, prior to GCC 10.1, would prevent the type from being treated as
+       a HFA or HVA.  */
+ const unsigned int WARN_PSABI_EMPTY_CXX17_BASE = 1U << 0;
+ const unsigned int WARN_PSABI_NO_UNIQUE_ADDRESS = 1U << 1;
+ 
  /* Walk down the type tree of TYPE counting consecutive base elements.
     If *MODEP is VOIDmode, then set it to the first valid floating point
     type.  If a non-floating point type is found, or if a floating point
     type that doesn't match a non-VOIDmode *MODEP is found, then return -1,
!    otherwise return the count in the sub-tree.
! 
!    The WARN_PSABI_FLAGS argument allows the caller to check whether this
!    function has changed its behavior relative to earlier versions of GCC.
!    Normally the argument should be nonnull and point to a zero-initialized
!    variable.  The function then records whether the ABI decision might
!    be affected by a known fix to the ABI logic, setting the associated
!    WARN_PSABI_* bits if so.
! 
!    When the argument is instead a null pointer, the function tries to
!    simulate the behavior of GCC before all such ABI fixes were made.
!    This is useful to check whether the function returns something
!    different after the ABI fixes.  */
  static int
! aapcs_vfp_sub_candidate (const_tree type, machine_mode *modep,
! 			 unsigned int *warn_psabi_flags)
  {
    machine_mode mode;
    HOST_WIDE_INT size;
  
+   if (aarch64_sve::builtin_type_p (type))
+     return -1;
+ 
    switch (TREE_CODE (type))
      {
      case REAL_TYPE:
*************** aapcs_vfp_sub_candidate (const_tree type
*** 13816,13822 ****
  	    || TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
  	  return -1;
  
! 	count = aapcs_vfp_sub_candidate (TREE_TYPE (type), modep);
  	if (count == -1
  	    || !index
  	    || !TYPE_MAX_VALUE (index)
--- 16639,16646 ----
  	    || TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
  	  return -1;
  
! 	count = aapcs_vfp_sub_candidate (TREE_TYPE (type), modep,
! 					 warn_psabi_flags);
  	if (count == -1
  	    || !index
  	    || !TYPE_MAX_VALUE (index)
*************** aapcs_vfp_sub_candidate (const_tree type
*** 13854,13860 ****
  	    if (TREE_CODE (field) != FIELD_DECL)
  	      continue;
  
! 	    sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep);
  	    if (sub_count < 0)
  	      return -1;
  	    count += sub_count;
--- 16678,16707 ----
  	    if (TREE_CODE (field) != FIELD_DECL)
  	      continue;
  
! 	    if (DECL_FIELD_ABI_IGNORED (field))
! 	      {
! 		/* See whether this is something that earlier versions of
! 		   GCC failed to ignore.  */
! 		unsigned int flag;
! 		if (lookup_attribute ("no_unique_address",
! 				      DECL_ATTRIBUTES (field)))
! 		  flag = WARN_PSABI_NO_UNIQUE_ADDRESS;
! 		else if (cxx17_empty_base_field_p (field))
! 		  flag = WARN_PSABI_EMPTY_CXX17_BASE;
! 		else
! 		  /* No compatibility problem.  */
! 		  continue;
! 
! 		/* Simulate the old behavior when WARN_PSABI_FLAGS is null.  */
! 		if (warn_psabi_flags)
! 		  {
! 		    *warn_psabi_flags |= flag;
! 		    continue;
! 		  }
! 	      }
! 
! 	    sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep,
! 						 warn_psabi_flags);
  	    if (sub_count < 0)
  	      return -1;
  	    count += sub_count;
*************** aapcs_vfp_sub_candidate (const_tree type
*** 13887,13893 ****
  	    if (TREE_CODE (field) != FIELD_DECL)
  	      continue;
  
! 	    sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep);
  	    if (sub_count < 0)
  	      return -1;
  	    count = count > sub_count ? count : sub_count;
--- 16734,16741 ----
  	    if (TREE_CODE (field) != FIELD_DECL)
  	      continue;
  
! 	    sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep,
! 						 warn_psabi_flags);
  	    if (sub_count < 0)
  	      return -1;
  	    count = count > sub_count ? count : sub_count;
*************** aarch64_short_vector_p (const_tree type,
*** 13920,13931 ****
    poly_int64 size = -1;
  
    if (type && TREE_CODE (type) == VECTOR_TYPE)
!     size = int_size_in_bytes (type);
    else if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
! 	    || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
!     size = GET_MODE_SIZE (mode);
! 
!   return known_eq (size, 8) || known_eq (size, 16);
  }
  
  /* Return TRUE if the type, as described by TYPE and MODE, is a composite
--- 16768,16795 ----
    poly_int64 size = -1;
  
    if (type && TREE_CODE (type) == VECTOR_TYPE)
!     {
!       if (aarch64_sve::builtin_type_p (type))
! 	return false;
!       size = int_size_in_bytes (type);
!     }
    else if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
! 	   || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
!     {
!       /* Rely only on the type, not the mode, when processing SVE types.  */
!       if (type && aarch64_some_values_include_pst_objects_p (type))
! 	gcc_assert (aarch64_sve_mode_p (mode));
!       else
! 	size = GET_MODE_SIZE (mode);
!     }
!   if (known_eq (size, 8) || known_eq (size, 16))
!     {
!       /* 64-bit and 128-bit vectors should only acquire an SVE mode if
! 	 they are being treated as scalable AAPCS64 types.  */
!       gcc_assert (!aarch64_sve_mode_p (mode));
!       return true;
!     }
!   return false;
  }
  
  /* Return TRUE if the type, as described by TYPE and MODE, is a composite
*************** aarch64_composite_type_p (const_tree typ
*** 13970,13989 ****
     Upon successful return, *COUNT returns the number of needed registers,
     *BASE_MODE returns the mode of the individual register and when IS_HAF
     is not NULL, *IS_HA indicates whether or not the argument is a homogeneous
!    floating-point aggregate or a homogeneous short-vector aggregate.  */
  
  static bool
  aarch64_vfp_is_call_or_return_candidate (machine_mode mode,
  					 const_tree type,
  					 machine_mode *base_mode,
  					 int *count,
! 					 bool *is_ha)
  {
    machine_mode new_mode = VOIDmode;
    bool composite_p = aarch64_composite_type_p (type, mode);
  
-   if (is_ha != NULL) *is_ha = false;
- 
    if ((!composite_p && GET_MODE_CLASS (mode) == MODE_FLOAT)
        || aarch64_short_vector_p (type, mode))
      {
--- 16834,16859 ----
     Upon successful return, *COUNT returns the number of needed registers,
     *BASE_MODE returns the mode of the individual register and when IS_HAF
     is not NULL, *IS_HA indicates whether or not the argument is a homogeneous
!    floating-point aggregate or a homogeneous short-vector aggregate.
! 
!    SILENT_P is true if the function should refrain from reporting any
!    diagnostics.  This should only be used if the caller is certain that
!    any ABI decisions would eventually come through this function with
!    SILENT_P set to false.  */
  
  static bool
  aarch64_vfp_is_call_or_return_candidate (machine_mode mode,
  					 const_tree type,
  					 machine_mode *base_mode,
  					 int *count,
! 					 bool *is_ha,
! 					 bool silent_p)
  {
+   if (is_ha != NULL) *is_ha = false;
+ 
    machine_mode new_mode = VOIDmode;
    bool composite_p = aarch64_composite_type_p (type, mode);
  
    if ((!composite_p && GET_MODE_CLASS (mode) == MODE_FLOAT)
        || aarch64_short_vector_p (type, mode))
      {
*************** aarch64_vfp_is_call_or_return_candidate
*** 13998,14007 ****
      }
    else if (type && composite_p)
      {
!       int ag_count = aapcs_vfp_sub_candidate (type, &new_mode);
! 
        if (ag_count > 0 && ag_count <= HA_MAX_NUM_FLDS)
  	{
  	  if (is_ha != NULL) *is_ha = true;
  	  *count = ag_count;
  	}
--- 16868,16906 ----
      }
    else if (type && composite_p)
      {
!       unsigned int warn_psabi_flags = 0;
!       int ag_count = aapcs_vfp_sub_candidate (type, &new_mode,
! 					      &warn_psabi_flags);
        if (ag_count > 0 && ag_count <= HA_MAX_NUM_FLDS)
  	{
+ 	  static unsigned last_reported_type_uid;
+ 	  unsigned uid = TYPE_UID (TYPE_MAIN_VARIANT (type));
+ 	  int alt;
+ 	  if (!silent_p
+ 	      && warn_psabi
+ 	      && warn_psabi_flags
+ 	      && uid != last_reported_type_uid
+ 	      && ((alt = aapcs_vfp_sub_candidate (type, &new_mode, NULL))
+ 		  != ag_count))
+ 	    {
+ 	      const char *url
+ 		= CHANGES_ROOT_URL "gcc-10/changes.html#empty_base";
+ 	      gcc_assert (alt == -1);
+ 	      last_reported_type_uid = uid;
+ 	      /* Use TYPE_MAIN_VARIANT to strip any redundant const
+ 		 qualification.  */
+ 	      if (warn_psabi_flags & WARN_PSABI_NO_UNIQUE_ADDRESS)
+ 		inform (input_location, "parameter passing for argument of "
+ 			"type %qT with %<[[no_unique_address]]%> members "
+ 			"changed %{in GCC 10.1%}",
+ 			TYPE_MAIN_VARIANT (type), url);
+ 	      else if (warn_psabi_flags & WARN_PSABI_EMPTY_CXX17_BASE)
+ 		inform (input_location, "parameter passing for argument of "
+ 			"type %qT when C++17 is enabled changed to match "
+ 			"C++14 %{in GCC 10.1%}",
+ 			TYPE_MAIN_VARIANT (type), url);
+ 	    }
+ 
  	  if (is_ha != NULL) *is_ha = true;
  	  *count = ag_count;
  	}
*************** aarch64_vfp_is_call_or_return_candidate
*** 14011,14016 ****
--- 16910,16916 ----
    else
      return false;
  
+   gcc_assert (!aarch64_sve_mode_p (new_mode));
    *base_mode = new_mode;
    return true;
  }
*************** aarch64_vector_mode_supported_p (machine
*** 14032,14086 ****
    return vec_flags != 0 && (vec_flags & VEC_STRUCT) == 0;
  }
  
  /* Return appropriate SIMD container
     for MODE within a vector of WIDTH bits.  */
  static machine_mode
  aarch64_simd_container_mode (scalar_mode mode, poly_int64 width)
  {
!   if (TARGET_SVE && known_eq (width, BITS_PER_SVE_VECTOR))
!     switch (mode)
!       {
!       case E_DFmode:
! 	return VNx2DFmode;
!       case E_SFmode:
! 	return VNx4SFmode;
!       case E_HFmode:
! 	return VNx8HFmode;
!       case E_DImode:
! 	return VNx2DImode;
!       case E_SImode:
! 	return VNx4SImode;
!       case E_HImode:
! 	return VNx8HImode;
!       case E_QImode:
! 	return VNx16QImode;
!       default:
! 	return word_mode;
!       }
  
    gcc_assert (known_eq (width, 64) || known_eq (width, 128));
    if (TARGET_SIMD)
      {
        if (known_eq (width, 128))
! 	switch (mode)
! 	  {
! 	  case E_DFmode:
! 	    return V2DFmode;
! 	  case E_SFmode:
! 	    return V4SFmode;
! 	  case E_HFmode:
! 	    return V8HFmode;
! 	  case E_SImode:
! 	    return V4SImode;
! 	  case E_HImode:
! 	    return V8HImode;
! 	  case E_QImode:
! 	    return V16QImode;
! 	  case E_DImode:
! 	    return V2DImode;
! 	  default:
! 	    break;
! 	  }
        else
  	switch (mode)
  	  {
--- 16932,17008 ----
    return vec_flags != 0 && (vec_flags & VEC_STRUCT) == 0;
  }
  
+ /* Return the full-width SVE vector mode for element mode MODE, if one
+    exists.  */
+ opt_machine_mode
+ aarch64_full_sve_mode (scalar_mode mode)
+ {
+   switch (mode)
+     {
+     case E_DFmode:
+       return VNx2DFmode;
+     case E_SFmode:
+       return VNx4SFmode;
+     case E_HFmode:
+       return VNx8HFmode;
+     case E_BFmode:
+       return VNx8BFmode;
+     case E_DImode:
+       return VNx2DImode;
+     case E_SImode:
+       return VNx4SImode;
+     case E_HImode:
+       return VNx8HImode;
+     case E_QImode:
+       return VNx16QImode;
+     default:
+       return opt_machine_mode ();
+     }
+ }
+ 
+ /* Return the 128-bit Advanced SIMD vector mode for element mode MODE,
+    if it exists.  */
+ opt_machine_mode
+ aarch64_vq_mode (scalar_mode mode)
+ {
+   switch (mode)
+     {
+     case E_DFmode:
+       return V2DFmode;
+     case E_SFmode:
+       return V4SFmode;
+     case E_HFmode:
+       return V8HFmode;
+     case E_BFmode:
+       return V8BFmode;
+     case E_SImode:
+       return V4SImode;
+     case E_HImode:
+       return V8HImode;
+     case E_QImode:
+       return V16QImode;
+     case E_DImode:
+       return V2DImode;
+     default:
+       return opt_machine_mode ();
+     }
+ }
+ 
  /* Return appropriate SIMD container
     for MODE within a vector of WIDTH bits.  */
  static machine_mode
  aarch64_simd_container_mode (scalar_mode mode, poly_int64 width)
  {
!   if (TARGET_SVE
!       && maybe_ne (width, 128)
!       && known_eq (width, BITS_PER_SVE_VECTOR))
!     return aarch64_full_sve_mode (mode).else_mode (word_mode);
  
    gcc_assert (known_eq (width, 64) || known_eq (width, 128));
    if (TARGET_SIMD)
      {
        if (known_eq (width, 128))
! 	return aarch64_vq_mode (mode).else_mode (word_mode);
        else
  	switch (mode)
  	  {
*************** aarch64_simd_container_mode (scalar_mode
*** 14088,14093 ****
--- 17010,17017 ----
  	    return V2SFmode;
  	  case E_HFmode:
  	    return V4HFmode;
+ 	  case E_BFmode:
+ 	    return V4BFmode;
  	  case E_SImode:
  	    return V2SImode;
  	  case E_HImode:
*************** aarch64_preferred_simd_mode (scalar_mode
*** 14111,14123 ****
  
  /* Return a list of possible vector sizes for the vectorizer
     to iterate over.  */
! static void
! aarch64_autovectorize_vector_sizes (vector_sizes *sizes)
  {
!   if (TARGET_SVE)
!     sizes->safe_push (BYTES_PER_SVE_VECTOR);
!   sizes->safe_push (16);
!   sizes->safe_push (8);
  }
  
  /* Implement TARGET_MANGLE_TYPE.  */
--- 17035,17119 ----
  
  /* Return a list of possible vector sizes for the vectorizer
     to iterate over.  */
! static unsigned int
! aarch64_autovectorize_vector_modes (vector_modes *modes, bool)
  {
!   static const machine_mode sve_modes[] = {
!     /* Try using full vectors for all element types.  */
!     VNx16QImode,
! 
!     /* Try using 16-bit containers for 8-bit elements and full vectors
!        for wider elements.  */
!     VNx8QImode,
! 
!     /* Try using 32-bit containers for 8-bit and 16-bit elements and
!        full vectors for wider elements.  */
!     VNx4QImode,
! 
!     /* Try using 64-bit containers for all element types.  */
!     VNx2QImode
!   };
! 
!   static const machine_mode advsimd_modes[] = {
!     /* Try using 128-bit vectors for all element types.  */
!     V16QImode,
! 
!     /* Try using 64-bit vectors for 8-bit elements and 128-bit vectors
!        for wider elements.  */
!     V8QImode,
! 
!     /* Try using 64-bit vectors for 16-bit elements and 128-bit vectors
!        for wider elements.
! 
!        TODO: We could support a limited form of V4QImode too, so that
!        we use 32-bit vectors for 8-bit elements.  */
!     V4HImode,
! 
!     /* Try using 64-bit vectors for 32-bit elements and 128-bit vectors
!        for 64-bit elements.
! 
!        TODO: We could similarly support limited forms of V2QImode and V2HImode
!        for this case.  */
!     V2SImode
!   };
! 
!   /* Try using N-byte SVE modes only after trying N-byte Advanced SIMD mode.
!      This is because:
! 
!      - If we can't use N-byte Advanced SIMD vectors then the placement
!        doesn't matter; we'll just continue as though the Advanced SIMD
!        entry didn't exist.
! 
!      - If an SVE main loop with N bytes ends up being cheaper than an
!        Advanced SIMD main loop with N bytes then by default we'll replace
!        the Advanced SIMD version with the SVE one.
! 
!      - If an Advanced SIMD main loop with N bytes ends up being cheaper
!        than an SVE main loop with N bytes then by default we'll try to
!        use the SVE loop to vectorize the epilogue instead.  */
!   unsigned int sve_i = TARGET_SVE ? 0 : ARRAY_SIZE (sve_modes);
!   unsigned int advsimd_i = 0;
!   while (advsimd_i < ARRAY_SIZE (advsimd_modes))
!     {
!       if (sve_i < ARRAY_SIZE (sve_modes)
! 	  && maybe_gt (GET_MODE_NUNITS (sve_modes[sve_i]),
! 		       GET_MODE_NUNITS (advsimd_modes[advsimd_i])))
! 	modes->safe_push (sve_modes[sve_i++]);
!       else
! 	modes->safe_push (advsimd_modes[advsimd_i++]);
!     }
!   while (sve_i < ARRAY_SIZE (sve_modes))
!     modes->safe_push (sve_modes[sve_i++]);
! 
!   unsigned int flags = 0;
!   /* Consider enabling VECT_COMPARE_COSTS for SVE, both so that we
!      can compare SVE against Advanced SIMD and so that we can compare
!      multiple SVE vectorization approaches against each other.  There's
!      not really any point doing this for Advanced SIMD only, since the
!      first mode that works should always be the best.  */
!   if (TARGET_SVE && aarch64_sve_compare_costs)
!     flags |= VECT_COMPARE_COSTS;
!   return flags;
  }
  
  /* Implement TARGET_MANGLE_TYPE.  */
*************** aarch64_mangle_type (const_tree type)
*** 14130,14148 ****
    if (lang_hooks.types_compatible_p (CONST_CAST_TREE (type), va_list_type))
      return "St9__va_list";
  
!   /* Half-precision float.  */
    if (TREE_CODE (type) == REAL_TYPE && TYPE_PRECISION (type) == 16)
!     return "Dh";
  
    /* Mangle AArch64-specific internal types.  TYPE_NAME is non-NULL_TREE for
       builtin types.  */
    if (TYPE_NAME (type) != NULL)
!     return aarch64_mangle_builtin_type (type);
  
    /* Use the default mangling.  */
    return NULL;
  }
  
  /* Find the first rtx_insn before insn that will generate an assembly
     instruction.  */
  
--- 17126,17163 ----
    if (lang_hooks.types_compatible_p (CONST_CAST_TREE (type), va_list_type))
      return "St9__va_list";
  
!   /* Half-precision floating point types.  */
    if (TREE_CODE (type) == REAL_TYPE && TYPE_PRECISION (type) == 16)
!     {
!       if (TYPE_MODE (type) == BFmode)
! 	return "u6__bf16";
!       else
! 	return "Dh";
!     }
  
    /* Mangle AArch64-specific internal types.  TYPE_NAME is non-NULL_TREE for
       builtin types.  */
    if (TYPE_NAME (type) != NULL)
!     {
!       const char *res;
!       if ((res = aarch64_general_mangle_builtin_type (type))
! 	  || (res = aarch64_sve::mangle_builtin_type (type)))
! 	return res;
!     }
  
    /* Use the default mangling.  */
    return NULL;
  }
  
+ /* Implement TARGET_VERIFY_TYPE_CONTEXT.  */
+ 
+ static bool
+ aarch64_verify_type_context (location_t loc, type_context_kind context,
+ 			     const_tree type, bool silent_p)
+ {
+   return aarch64_sve::verify_type_context (loc, context, type, silent_p);
+ }
+ 
  /* Find the first rtx_insn before insn that will generate an assembly
     instruction.  */
  
*************** aarch64_sve_index_immediate_p (rtx base_
*** 14273,14300 ****
  	  && IN_RANGE (INTVAL (base_or_step), -16, 15));
  }
  
! /* Return true if X is a valid immediate for the SVE ADD and SUB
!    instructions.  Negate X first if NEGATE_P is true.  */
  
  bool
! aarch64_sve_arith_immediate_p (rtx x, bool negate_p)
  {
!   rtx elt;
! 
!   if (!const_vec_duplicate_p (x, &elt)
!       || !CONST_INT_P (elt))
      return false;
  
    HOST_WIDE_INT val = INTVAL (elt);
    if (negate_p)
      val = -val;
!   val &= GET_MODE_MASK (GET_MODE_INNER (GET_MODE (x)));
  
    if (val & 0xff)
      return IN_RANGE (val, 0, 0xff);
    return IN_RANGE (val, 0, 0xff00);
  }
  
  /* Return true if X is a valid immediate operand for an SVE logical
     instruction such as AND.  */
  
--- 17288,17330 ----
  	  && IN_RANGE (INTVAL (base_or_step), -16, 15));
  }
  
! /* Return true if X is a valid immediate for the SVE ADD and SUB instructions
!    when applied to mode MODE.  Negate X first if NEGATE_P is true.  */
  
  bool
! aarch64_sve_arith_immediate_p (machine_mode mode, rtx x, bool negate_p)
  {
!   rtx elt = unwrap_const_vec_duplicate (x);
!   if (!CONST_INT_P (elt))
      return false;
  
    HOST_WIDE_INT val = INTVAL (elt);
    if (negate_p)
      val = -val;
!   val &= GET_MODE_MASK (GET_MODE_INNER (mode));
  
    if (val & 0xff)
      return IN_RANGE (val, 0, 0xff);
    return IN_RANGE (val, 0, 0xff00);
  }
  
+ /* Return true if X is a valid immediate for the SVE SQADD and SQSUB
+    instructions when applied to mode MODE.  Negate X first if NEGATE_P
+    is true.  */
+ 
+ bool
+ aarch64_sve_sqadd_sqsub_immediate_p (machine_mode mode, rtx x, bool negate_p)
+ {
+   if (!aarch64_sve_arith_immediate_p (mode, x, negate_p))
+     return false;
+ 
+   /* After the optional negation, the immediate must be nonnegative.
+      E.g. a saturating add of -127 must be done via SQSUB Zn.B, Zn.B, #127
+      instead of SQADD Zn.B, Zn.B, #129.  */
+   rtx elt = unwrap_const_vec_duplicate (x);
+   return negate_p == (INTVAL (elt) < 0);
+ }
+ 
  /* Return true if X is a valid immediate operand for an SVE logical
     instruction such as AND.  */
  
*************** aarch64_sve_bitmask_immediate_p (rtx x)
*** 14315,14327 ****
  bool
  aarch64_sve_dup_immediate_p (rtx x)
  {
!   rtx elt;
! 
!   if (!const_vec_duplicate_p (x, &elt)
!       || !CONST_INT_P (elt))
      return false;
  
!   HOST_WIDE_INT val = INTVAL (elt);
    if (val & 0xff)
      return IN_RANGE (val, -0x80, 0x7f);
    return IN_RANGE (val, -0x8000, 0x7f00);
--- 17345,17355 ----
  bool
  aarch64_sve_dup_immediate_p (rtx x)
  {
!   x = aarch64_bit_representation (unwrap_const_vec_duplicate (x));
!   if (!CONST_INT_P (x))
      return false;
  
!   HOST_WIDE_INT val = INTVAL (x);
    if (val & 0xff)
      return IN_RANGE (val, -0x80, 0x7f);
    return IN_RANGE (val, -0x8000, 0x7f00);
*************** aarch64_sve_dup_immediate_p (rtx x)
*** 14333,14345 ****
  bool
  aarch64_sve_cmp_immediate_p (rtx x, bool signed_p)
  {
!   rtx elt;
! 
!   return (const_vec_duplicate_p (x, &elt)
! 	  && CONST_INT_P (elt)
  	  && (signed_p
! 	      ? IN_RANGE (INTVAL (elt), -16, 15)
! 	      : IN_RANGE (INTVAL (elt), 0, 127)));
  }
  
  /* Return true if X is a valid immediate operand for an SVE FADD or FSUB
--- 17361,17371 ----
  bool
  aarch64_sve_cmp_immediate_p (rtx x, bool signed_p)
  {
!   x = unwrap_const_vec_duplicate (x);
!   return (CONST_INT_P (x)
  	  && (signed_p
! 	      ? IN_RANGE (INTVAL (x), -16, 15)
! 	      : IN_RANGE (INTVAL (x), 0, 127)));
  }
  
  /* Return true if X is a valid immediate operand for an SVE FADD or FSUB
*************** aarch64_sve_float_mul_immediate_p (rtx x
*** 14375,14385 ****
  {
    rtx elt;
  
-   /* GCC will never generate a multiply with an immediate of 2, so there is no
-      point testing for it (even though it is a valid constant).  */
    return (const_vec_duplicate_p (x, &elt)
  	  && GET_CODE (elt) == CONST_DOUBLE
! 	  && real_equal (CONST_DOUBLE_REAL_VALUE (elt), &dconsthalf));
  }
  
  /* Return true if replicating VAL32 is a valid 2-byte or 4-byte immediate
--- 17401,17410 ----
  {
    rtx elt;
  
    return (const_vec_duplicate_p (x, &elt)
  	  && GET_CODE (elt) == CONST_DOUBLE
! 	  && (real_equal (CONST_DOUBLE_REAL_VALUE (elt), &dconsthalf)
! 	      || real_equal (CONST_DOUBLE_REAL_VALUE (elt), &dconst2)));
  }
  
  /* Return true if replicating VAL32 is a valid 2-byte or 4-byte immediate
*************** aarch64_sve_valid_immediate (unsigned HO
*** 14532,14537 ****
--- 17557,17633 ----
    return false;
  }
  
+ /* Return true if X is an UNSPEC_PTRUE constant of the form:
+ 
+        (const (unspec [PATTERN ZERO] UNSPEC_PTRUE))
+ 
+    where PATTERN is the svpattern as a CONST_INT and where ZERO
+    is a zero constant of the required PTRUE mode (which can have
+    fewer elements than X's mode, if zero bits are significant).
+ 
+    If so, and if INFO is nonnull, describe the immediate in INFO.  */
+ bool
+ aarch64_sve_ptrue_svpattern_p (rtx x, struct simd_immediate_info *info)
+ {
+   if (GET_CODE (x) != CONST)
+     return false;
+ 
+   x = XEXP (x, 0);
+   if (GET_CODE (x) != UNSPEC || XINT (x, 1) != UNSPEC_PTRUE)
+     return false;
+ 
+   if (info)
+     {
+       aarch64_svpattern pattern
+ 	= (aarch64_svpattern) INTVAL (XVECEXP (x, 0, 0));
+       machine_mode pred_mode = GET_MODE (XVECEXP (x, 0, 1));
+       scalar_int_mode int_mode = aarch64_sve_element_int_mode (pred_mode);
+       *info = simd_immediate_info (int_mode, pattern);
+     }
+   return true;
+ }
+ 
+ /* Return true if X is a valid SVE predicate.  If INFO is nonnull, use
+    it to describe valid immediates.  */
+ 
+ static bool
+ aarch64_sve_pred_valid_immediate (rtx x, simd_immediate_info *info)
+ {
+   if (aarch64_sve_ptrue_svpattern_p (x, info))
+     return true;
+ 
+   if (x == CONST0_RTX (GET_MODE (x)))
+     {
+       if (info)
+ 	*info = simd_immediate_info (DImode, 0);
+       return true;
+     }
+ 
+   /* Analyze the value as a VNx16BImode.  This should be relatively
+      efficient, since rtx_vector_builder has enough built-in capacity
+      to store all VLA predicate constants without needing the heap.  */
+   rtx_vector_builder builder;
+   if (!aarch64_get_sve_pred_bits (builder, x))
+     return false;
+ 
+   unsigned int elt_size = aarch64_widest_sve_pred_elt_size (builder);
+   if (int vl = aarch64_partial_ptrue_length (builder, elt_size))
+     {
+       machine_mode mode = aarch64_sve_pred_mode (elt_size).require ();
+       aarch64_svpattern pattern = aarch64_svpattern_for_vl (mode, vl);
+       if (pattern != AARCH64_NUM_SVPATTERNS)
+ 	{
+ 	  if (info)
+ 	    {
+ 	      scalar_int_mode int_mode = aarch64_sve_element_int_mode (mode);
+ 	      *info = simd_immediate_info (int_mode, pattern);
+ 	    }
+ 	  return true;
+ 	}
+     }
+   return false;
+ }
+ 
  /* Return true if OP is a valid SIMD immediate for the operation
     described by WHICH.  If INFO is nonnull, use it to describe valid
     immediates.  */
*************** aarch64_simd_valid_immediate (rtx op, si
*** 14544,14549 ****
--- 17640,17648 ----
    if (vec_flags == 0 || vec_flags == (VEC_ADVSIMD | VEC_STRUCT))
      return false;
  
+   if (vec_flags & VEC_SVE_PRED)
+     return aarch64_sve_pred_valid_immediate (op, info);
+ 
    scalar_mode elt_mode = GET_MODE_INNER (mode);
    rtx base, step;
    unsigned int n_elts;
*************** aarch64_simd_valid_immediate (rtx op, si
*** 14559,14565 ****
  	return false;
  
        if (info)
! 	*info = simd_immediate_info (elt_mode, base, step);
        return true;
      }
    else if (GET_CODE (op) == CONST_VECTOR
--- 17658,17671 ----
  	return false;
  
        if (info)
! 	{
! 	  /* Get the corresponding container mode.  E.g. an INDEX on V2SI
! 	     should yield two integer values per 128-bit block, meaning
! 	     that we need to treat it in the same way as V2DI and then
! 	     ignore the upper 32 bits of each element.  */
! 	  elt_mode = aarch64_sve_container_int_mode (mode);
! 	  *info = simd_immediate_info (elt_mode, base, step);
! 	}
        return true;
      }
    else if (GET_CODE (op) == CONST_VECTOR
*************** aarch64_simd_valid_immediate (rtx op, si
*** 14568,14578 ****
    else
      return false;
  
-   /* Handle PFALSE and PTRUE.  */
-   if (vec_flags & VEC_SVE_PRED)
-     return (op == CONST0_RTX (mode)
- 	    || op == CONSTM1_RTX (mode));
- 
    scalar_float_mode elt_float_mode;
    if (n_elts == 1
        && is_a <scalar_float_mode> (elt_mode, &elt_float_mode))
--- 17674,17679 ----
*************** aarch64_simd_valid_immediate (rtx op, si
*** 14587,14598 ****
  	}
      }
  
!   unsigned int elt_size = GET_MODE_SIZE (elt_mode);
    if (elt_size > 8)
      return false;
  
-   scalar_int_mode elt_int_mode = int_mode_for_mode (elt_mode).require ();
- 
    /* Expand the vector constant out into a byte vector, with the least
       significant byte of the register first.  */
    auto_vec<unsigned char, 16> bytes;
--- 17688,17715 ----
  	}
      }
  
!   /* If all elements in an SVE vector have the same value, we have a free
!      choice between using the element mode and using the container mode.
!      Using the element mode means that unused parts of the vector are
!      duplicates of the used elements, while using the container mode means
!      that the unused parts are an extension of the used elements.  Using the
!      element mode is better for (say) VNx4HI 0x101, since 0x01010101 is valid
!      for its container mode VNx4SI while 0x00000101 isn't.
! 
!      If not all elements in an SVE vector have the same value, we need the
!      transition from one element to the next to occur at container boundaries.
!      E.g. a fixed-length VNx4HI containing { 1, 2, 3, 4 } should be treated
!      in the same way as a VNx4SI containing { 1, 2, 3, 4 }.  */
!   scalar_int_mode elt_int_mode;
!   if ((vec_flags & VEC_SVE_DATA) && n_elts > 1)
!     elt_int_mode = aarch64_sve_container_int_mode (mode);
!   else
!     elt_int_mode = int_mode_for_mode (elt_mode).require ();
! 
!   unsigned int elt_size = GET_MODE_SIZE (elt_int_mode);
    if (elt_size > 8)
      return false;
  
    /* Expand the vector constant out into a byte vector, with the least
       significant byte of the register first.  */
    auto_vec<unsigned char, 16> bytes;
*************** aarch64_check_zero_based_sve_index_immed
*** 14656,14666 ****
  bool
  aarch64_simd_shift_imm_p (rtx x, machine_mode mode, bool left)
  {
    int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT;
    if (left)
!     return aarch64_const_vec_all_same_in_range_p (x, 0, bit_width - 1);
    else
!     return aarch64_const_vec_all_same_in_range_p (x, 1, bit_width);
  }
  
  /* Return the bitmask CONST_INT to select the bits required by a zero extract
--- 17773,17786 ----
  bool
  aarch64_simd_shift_imm_p (rtx x, machine_mode mode, bool left)
  {
+   x = unwrap_const_vec_duplicate (x);
+   if (!CONST_INT_P (x))
+     return false;
    int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT;
    if (left)
!     return IN_RANGE (INTVAL (x), 0, bit_width - 1);
    else
!     return IN_RANGE (INTVAL (x), 1, bit_width);
  }
  
  /* Return the bitmask CONST_INT to select the bits required by a zero extract
*************** aarch64_mov_operand_p (rtx x, machine_mo
*** 14688,14699 ****
      return true;
  
    if (VECTOR_MODE_P (GET_MODE (x)))
!     return aarch64_simd_valid_immediate (x, NULL);
  
    if (GET_CODE (x) == SYMBOL_REF && mode == DImode && CONSTANT_ADDRESS_P (x))
      return true;
  
!   if (aarch64_sve_cnt_immediate_p (x))
      return true;
  
    return aarch64_classify_symbolic_expression (x)
--- 17808,17829 ----
      return true;
  
    if (VECTOR_MODE_P (GET_MODE (x)))
!     {
!       /* Require predicate constants to be VNx16BI before RA, so that we
! 	 force everything to have a canonical form.  */
!       if (!lra_in_progress
! 	  && !reload_completed
! 	  && GET_MODE_CLASS (GET_MODE (x)) == MODE_VECTOR_BOOL
! 	  && GET_MODE (x) != VNx16BImode)
! 	return false;
! 
!       return aarch64_simd_valid_immediate (x, NULL);
!     }
  
    if (GET_CODE (x) == SYMBOL_REF && mode == DImode && CONSTANT_ADDRESS_P (x))
      return true;
  
!   if (TARGET_SVE && aarch64_sve_cnt_immediate_p (x))
      return true;
  
    return aarch64_classify_symbolic_expression (x)
*************** aarch64_simd_check_vect_par_cnst_half (r
*** 14796,14801 ****
--- 17926,17961 ----
    return true;
  }
  
+ /* Return a PARALLEL containing NELTS elements, with element I equal
+    to BASE + I * STEP.  */
+ 
+ rtx
+ aarch64_gen_stepped_int_parallel (unsigned int nelts, int base, int step)
+ {
+   rtvec vec = rtvec_alloc (nelts);
+   for (unsigned int i = 0; i < nelts; ++i)
+     RTVEC_ELT (vec, i) = gen_int_mode (base + i * step, DImode);
+   return gen_rtx_PARALLEL (VOIDmode, vec);
+ }
+ 
+ /* Return true if OP is a PARALLEL of CONST_INTs that form a linear
+    series with step STEP.  */
+ 
+ bool
+ aarch64_stepped_int_parallel_p (rtx op, int step)
+ {
+   if (GET_CODE (op) != PARALLEL || !CONST_INT_P (XVECEXP (op, 0, 0)))
+     return false;
+ 
+   unsigned HOST_WIDE_INT base = UINTVAL (XVECEXP (op, 0, 0));
+   for (int i = 1; i < XVECLEN (op, 0); ++i)
+     if (!CONST_INT_P (XVECEXP (op, 0, i))
+ 	|| UINTVAL (XVECEXP (op, 0, i)) != base + i * step)
+       return false;
+ 
+   return true;
+ }
+ 
  /* Bounds-check lanes.  Ensure OPERAND lies between LOW (inclusive) and
     HIGH (exclusive).  */
  void
*************** aarch64_sve_ld1r_operand_p (rtx op)
*** 14848,14853 ****
--- 18008,18079 ----
  	  && offset_6bit_unsigned_scaled_p (mode, addr.const_offset));
  }
  
+ /* Return true if OP is a valid MEM operand for an SVE LD1R{Q,O} instruction
+    where the size of the read data is specified by `mode` and the size of the
+    vector elements are specified by `elem_mode`.   */
+ bool
+ aarch64_sve_ld1rq_ld1ro_operand_p (rtx op, machine_mode mode,
+ 				   scalar_mode elem_mode)
+ {
+   struct aarch64_address_info addr;
+   if (!MEM_P (op)
+       || !aarch64_classify_address (&addr, XEXP (op, 0), elem_mode, false))
+     return false;
+ 
+   if (addr.type == ADDRESS_REG_IMM)
+     return offset_4bit_signed_scaled_p (mode, addr.const_offset);
+ 
+   if (addr.type == ADDRESS_REG_REG)
+     return (1U << addr.shift) == GET_MODE_SIZE (elem_mode);
+ 
+   return false;
+ }
+ 
+ /* Return true if OP is a valid MEM operand for an SVE LD1RQ instruction.  */
+ bool
+ aarch64_sve_ld1rq_operand_p (rtx op)
+ {
+   return aarch64_sve_ld1rq_ld1ro_operand_p (op, TImode,
+ 					    GET_MODE_INNER (GET_MODE (op)));
+ }
+ 
+ /* Return true if OP is a valid MEM operand for an SVE LD1RO instruction for
+    accessing a vector where the element size is specified by `elem_mode`.  */
+ bool
+ aarch64_sve_ld1ro_operand_p (rtx op, scalar_mode elem_mode)
+ {
+   return aarch64_sve_ld1rq_ld1ro_operand_p (op, OImode, elem_mode);
+ }
+ 
+ /* Return true if OP is a valid MEM operand for an SVE LDFF1 instruction.  */
+ bool
+ aarch64_sve_ldff1_operand_p (rtx op)
+ {
+   if (!MEM_P (op))
+     return false;
+ 
+   struct aarch64_address_info addr;
+   if (!aarch64_classify_address (&addr, XEXP (op, 0), GET_MODE (op), false))
+     return false;
+ 
+   if (addr.type == ADDRESS_REG_IMM)
+     return known_eq (addr.const_offset, 0);
+ 
+   return addr.type == ADDRESS_REG_REG;
+ }
+ 
+ /* Return true if OP is a valid MEM operand for an SVE LDNF1 instruction.  */
+ bool
+ aarch64_sve_ldnf1_operand_p (rtx op)
+ {
+   struct aarch64_address_info addr;
+ 
+   return (MEM_P (op)
+ 	  && aarch64_classify_address (&addr, XEXP (op, 0),
+ 				       GET_MODE (op), false)
+ 	  && addr.type == ADDRESS_REG_IMM);
+ }
+ 
  /* Return true if OP is a valid MEM operand for an SVE LDR instruction.
     The conditions for STR are the same.  */
  bool
*************** aarch64_sve_ldr_operand_p (rtx op)
*** 14861,14866 ****
--- 18087,18107 ----
  	  && addr.type == ADDRESS_REG_IMM);
  }
  
+ /* Return true if OP is a valid address for an SVE PRF[BHWD] instruction,
+    addressing memory of mode MODE.  */
+ bool
+ aarch64_sve_prefetch_operand_p (rtx op, machine_mode mode)
+ {
+   struct aarch64_address_info addr;
+   if (!aarch64_classify_address (&addr, op, mode, false))
+     return false;
+ 
+   if (addr.type == ADDRESS_REG_IMM)
+     return known_eq (addr.const_offset, 0);
+ 
+   return addr.type == ADDRESS_REG_REG;
+ }
+ 
  /* Return true if OP is a valid MEM operand for an SVE_STRUCT mode.
     We need to be able to access the individual pieces, so the range
     is different from LD[234] and ST[234].  */
*************** aarch64_simd_attr_length_rglist (machine
*** 14922,14933 ****
  static HOST_WIDE_INT
  aarch64_simd_vector_alignment (const_tree type)
  {
!   if (TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
!     /* ??? Checking the mode isn't ideal, but VECTOR_BOOLEAN_TYPE_P can
!        be set for non-predicate vectors of booleans.  Modes are the most
!        direct way we have of identifying real SVE predicate types.  */
!     return GET_MODE_CLASS (TYPE_MODE (type)) == MODE_VECTOR_BOOL ? 16 : 128;
!   return wi::umin (wi::to_wide (TYPE_SIZE (type)), 128).to_uhwi ();
  }
  
  /* Implement target hook TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT.  */
--- 18163,18176 ----
  static HOST_WIDE_INT
  aarch64_simd_vector_alignment (const_tree type)
  {
!   /* ??? Checking the mode isn't ideal, but VECTOR_BOOLEAN_TYPE_P can
!      be set for non-predicate vectors of booleans.  Modes are the most
!      direct way we have of identifying real SVE predicate types.  */
!   if (GET_MODE_CLASS (TYPE_MODE (type)) == MODE_VECTOR_BOOL)
!     return 16;
!   widest_int min_size
!     = constant_lower_bound (wi::to_poly_widest (TYPE_SIZE (type)));
!   return wi::umin (min_size, 128).to_uhwi ();
  }
  
  /* Implement target hook TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT.  */
*************** aarch64_expand_vector_init (rtx target,
*** 15076,15081 ****
--- 18319,18363 ----
    rtx v0 = XVECEXP (vals, 0, 0);
    bool all_same = true;
  
+   /* This is a special vec_init<M><N> where N is not an element mode but a
+      vector mode with half the elements of M.  We expect to find two entries
+      of mode N in VALS and we must put their concatentation into TARGET.  */
+   if (XVECLEN (vals, 0) == 2 && VECTOR_MODE_P (GET_MODE (XVECEXP (vals, 0, 0))))
+     {
+       gcc_assert (known_eq (GET_MODE_SIZE (mode),
+ 		  2 * GET_MODE_SIZE (GET_MODE (XVECEXP (vals, 0, 0)))));
+       rtx lo = XVECEXP (vals, 0, 0);
+       rtx hi = XVECEXP (vals, 0, 1);
+       machine_mode narrow_mode = GET_MODE (lo);
+       gcc_assert (GET_MODE_INNER (narrow_mode) == inner_mode);
+       gcc_assert (narrow_mode == GET_MODE (hi));
+ 
+       /* When we want to concatenate a half-width vector with zeroes we can
+ 	 use the aarch64_combinez[_be] patterns.  Just make sure that the
+ 	 zeroes are in the right half.  */
+       if (BYTES_BIG_ENDIAN
+ 	  && aarch64_simd_imm_zero (lo, narrow_mode)
+ 	  && general_operand (hi, narrow_mode))
+ 	emit_insn (gen_aarch64_combinez_be (narrow_mode, target, hi, lo));
+       else if (!BYTES_BIG_ENDIAN
+ 	       && aarch64_simd_imm_zero (hi, narrow_mode)
+ 	       && general_operand (lo, narrow_mode))
+ 	emit_insn (gen_aarch64_combinez (narrow_mode, target, lo, hi));
+       else
+ 	{
+ 	  /* Else create the two half-width registers and combine them.  */
+ 	  if (!REG_P (lo))
+ 	    lo = force_reg (GET_MODE (lo), lo);
+ 	  if (!REG_P (hi))
+ 	    hi = force_reg (GET_MODE (hi), hi);
+ 
+ 	  if (BYTES_BIG_ENDIAN)
+ 	    std::swap (lo, hi);
+ 	  emit_insn (gen_aarch64_simd_combine (narrow_mode, target, lo, hi));
+ 	}
+      return;
+    }
+ 
    /* Count the number of variable elements to initialise.  */
    for (int i = 0; i < n_elts; ++i)
      {
*************** aarch64_expand_vector_init (rtx target,
*** 15247,15252 ****
--- 18529,18895 ----
      }
  }
  
+ /* Emit RTL corresponding to:
+    insr TARGET, ELEM.  */
+ 
+ static void
+ emit_insr (rtx target, rtx elem)
+ {
+   machine_mode mode = GET_MODE (target);
+   scalar_mode elem_mode = GET_MODE_INNER (mode);
+   elem = force_reg (elem_mode, elem);
+ 
+   insn_code icode = optab_handler (vec_shl_insert_optab, mode);
+   gcc_assert (icode != CODE_FOR_nothing);
+   emit_insn (GEN_FCN (icode) (target, target, elem));
+ }
+ 
+ /* Subroutine of aarch64_sve_expand_vector_init for handling
+    trailing constants.
+    This function works as follows:
+    (a) Create a new vector consisting of trailing constants.
+    (b) Initialize TARGET with the constant vector using emit_move_insn.
+    (c) Insert remaining elements in TARGET using insr.
+    NELTS is the total number of elements in original vector while
+    while NELTS_REQD is the number of elements that are actually
+    significant.
+ 
+    ??? The heuristic used is to do above only if number of constants
+    is at least half the total number of elements.  May need fine tuning.  */
+ 
+ static bool
+ aarch64_sve_expand_vector_init_handle_trailing_constants
+  (rtx target, const rtx_vector_builder &builder, int nelts, int nelts_reqd)
+ {
+   machine_mode mode = GET_MODE (target);
+   scalar_mode elem_mode = GET_MODE_INNER (mode);
+   int n_trailing_constants = 0;
+ 
+   for (int i = nelts_reqd - 1;
+        i >= 0 && valid_for_const_vector_p (elem_mode, builder.elt (i));
+        i--)
+     n_trailing_constants++;
+ 
+   if (n_trailing_constants >= nelts_reqd / 2)
+     {
+       /* Try to use the natural pattern of BUILDER to extend the trailing
+ 	 constant elements to a full vector.  Replace any variables in the
+ 	 extra elements with zeros.
+ 
+ 	 ??? It would be better if the builders supported "don't care"
+ 	     elements, with the builder filling in whichever elements
+ 	     give the most compact encoding.  */
+       rtx_vector_builder v (mode, nelts, 1);
+       for (int i = 0; i < nelts; i++)
+ 	{
+ 	  rtx x = builder.elt (i + nelts_reqd - n_trailing_constants);
+ 	  if (!valid_for_const_vector_p (elem_mode, x))
+ 	    x = const0_rtx;
+ 	  v.quick_push (x);
+ 	}
+       rtx const_vec = v.build ();
+       emit_move_insn (target, const_vec);
+ 
+       for (int i = nelts_reqd - n_trailing_constants - 1; i >= 0; i--)
+ 	emit_insr (target, builder.elt (i));
+ 
+       return true;
+     }
+ 
+   return false;
+ }
+ 
+ /* Subroutine of aarch64_sve_expand_vector_init.
+    Works as follows:
+    (a) Initialize TARGET by broadcasting element NELTS_REQD - 1 of BUILDER.
+    (b) Skip trailing elements from BUILDER, which are the same as
+        element NELTS_REQD - 1.
+    (c) Insert earlier elements in reverse order in TARGET using insr.  */
+ 
+ static void
+ aarch64_sve_expand_vector_init_insert_elems (rtx target,
+ 					     const rtx_vector_builder &builder,
+ 					     int nelts_reqd)
+ {
+   machine_mode mode = GET_MODE (target);
+   scalar_mode elem_mode = GET_MODE_INNER (mode);
+ 
+   struct expand_operand ops[2];
+   enum insn_code icode = optab_handler (vec_duplicate_optab, mode);
+   gcc_assert (icode != CODE_FOR_nothing);
+ 
+   create_output_operand (&ops[0], target, mode);
+   create_input_operand (&ops[1], builder.elt (nelts_reqd - 1), elem_mode);
+   expand_insn (icode, 2, ops);
+ 
+   int ndups = builder.count_dups (nelts_reqd - 1, -1, -1);
+   for (int i = nelts_reqd - ndups - 1; i >= 0; i--)
+     emit_insr (target, builder.elt (i));
+ }
+ 
+ /* Subroutine of aarch64_sve_expand_vector_init to handle case
+    when all trailing elements of builder are same.
+    This works as follows:
+    (a) Use expand_insn interface to broadcast last vector element in TARGET.
+    (b) Insert remaining elements in TARGET using insr.
+ 
+    ??? The heuristic used is to do above if number of same trailing elements
+    is at least 3/4 of total number of elements, loosely based on
+    heuristic from mostly_zeros_p.  May need fine-tuning.  */
+ 
+ static bool
+ aarch64_sve_expand_vector_init_handle_trailing_same_elem
+  (rtx target, const rtx_vector_builder &builder, int nelts_reqd)
+ {
+   int ndups = builder.count_dups (nelts_reqd - 1, -1, -1);
+   if (ndups >= (3 * nelts_reqd) / 4)
+     {
+       aarch64_sve_expand_vector_init_insert_elems (target, builder,
+ 						   nelts_reqd - ndups + 1);
+       return true;
+     }
+ 
+   return false;
+ }
+ 
+ /* Initialize register TARGET from BUILDER. NELTS is the constant number
+    of elements in BUILDER.
+ 
+    The function tries to initialize TARGET from BUILDER if it fits one
+    of the special cases outlined below.
+ 
+    Failing that, the function divides BUILDER into two sub-vectors:
+    v_even = even elements of BUILDER;
+    v_odd = odd elements of BUILDER;
+ 
+    and recursively calls itself with v_even and v_odd.
+ 
+    if (recursive call succeeded for v_even or v_odd)
+      TARGET = zip (v_even, v_odd)
+ 
+    The function returns true if it managed to build TARGET from BUILDER
+    with one of the special cases, false otherwise.
+ 
+    Example: {a, 1, b, 2, c, 3, d, 4}
+ 
+    The vector gets divided into:
+    v_even = {a, b, c, d}
+    v_odd = {1, 2, 3, 4}
+ 
+    aarch64_sve_expand_vector_init(v_odd) hits case 1 and
+    initialize tmp2 from constant vector v_odd using emit_move_insn.
+ 
+    aarch64_sve_expand_vector_init(v_even) fails since v_even contains
+    4 elements, so we construct tmp1 from v_even using insr:
+    tmp1 = dup(d)
+    insr tmp1, c
+    insr tmp1, b
+    insr tmp1, a
+ 
+    And finally:
+    TARGET = zip (tmp1, tmp2)
+    which sets TARGET to {a, 1, b, 2, c, 3, d, 4}.  */
+ 
+ static bool
+ aarch64_sve_expand_vector_init (rtx target, const rtx_vector_builder &builder,
+ 				int nelts, int nelts_reqd)
+ {
+   machine_mode mode = GET_MODE (target);
+ 
+   /* Case 1: Vector contains trailing constants.  */
+ 
+   if (aarch64_sve_expand_vector_init_handle_trailing_constants
+        (target, builder, nelts, nelts_reqd))
+     return true;
+ 
+   /* Case 2: Vector contains leading constants.  */
+ 
+   rtx_vector_builder rev_builder (mode, nelts_reqd, 1);
+   for (int i = 0; i < nelts_reqd; i++)
+     rev_builder.quick_push (builder.elt (nelts_reqd - i - 1));
+   rev_builder.finalize ();
+ 
+   if (aarch64_sve_expand_vector_init_handle_trailing_constants
+        (target, rev_builder, nelts, nelts_reqd))
+     {
+       emit_insn (gen_aarch64_sve_rev (mode, target, target));
+       return true;
+     }
+ 
+   /* Case 3: Vector contains trailing same element.  */
+ 
+   if (aarch64_sve_expand_vector_init_handle_trailing_same_elem
+        (target, builder, nelts_reqd))
+     return true;
+ 
+   /* Case 4: Vector contains leading same element.  */
+ 
+   if (aarch64_sve_expand_vector_init_handle_trailing_same_elem
+        (target, rev_builder, nelts_reqd) && nelts_reqd == nelts)
+     {
+       emit_insn (gen_aarch64_sve_rev (mode, target, target));
+       return true;
+     }
+ 
+   /* Avoid recursing below 4-elements.
+      ??? The threshold 4 may need fine-tuning.  */
+ 
+   if (nelts_reqd <= 4)
+     return false;
+ 
+   rtx_vector_builder v_even (mode, nelts, 1);
+   rtx_vector_builder v_odd (mode, nelts, 1);
+ 
+   for (int i = 0; i < nelts * 2; i += 2)
+     {
+       v_even.quick_push (builder.elt (i));
+       v_odd.quick_push (builder.elt (i + 1));
+     }
+ 
+   v_even.finalize ();
+   v_odd.finalize ();
+ 
+   rtx tmp1 = gen_reg_rtx (mode);
+   bool did_even_p = aarch64_sve_expand_vector_init (tmp1, v_even,
+ 						    nelts, nelts_reqd / 2);
+ 
+   rtx tmp2 = gen_reg_rtx (mode);
+   bool did_odd_p = aarch64_sve_expand_vector_init (tmp2, v_odd,
+ 						   nelts, nelts_reqd / 2);
+ 
+   if (!did_even_p && !did_odd_p)
+     return false;
+ 
+   /* Initialize v_even and v_odd using INSR if it didn't match any of the
+      special cases and zip v_even, v_odd.  */
+ 
+   if (!did_even_p)
+     aarch64_sve_expand_vector_init_insert_elems (tmp1, v_even, nelts_reqd / 2);
+ 
+   if (!did_odd_p)
+     aarch64_sve_expand_vector_init_insert_elems (tmp2, v_odd, nelts_reqd / 2);
+ 
+   rtvec v = gen_rtvec (2, tmp1, tmp2);
+   emit_set_insn (target, gen_rtx_UNSPEC (mode, v, UNSPEC_ZIP1));
+   return true;
+ }
+ 
+ /* Initialize register TARGET from the elements in PARALLEL rtx VALS.  */
+ 
+ void
+ aarch64_sve_expand_vector_init (rtx target, rtx vals)
+ {
+   machine_mode mode = GET_MODE (target);
+   int nelts = XVECLEN (vals, 0);
+ 
+   rtx_vector_builder v (mode, nelts, 1);
+   for (int i = 0; i < nelts; i++)
+     v.quick_push (XVECEXP (vals, 0, i));
+   v.finalize ();
+ 
+   /* If neither sub-vectors of v could be initialized specially,
+      then use INSR to insert all elements from v into TARGET.
+      ??? This might not be optimal for vectors with large
+      initializers like 16-element or above.
+      For nelts < 4, it probably isn't useful to handle specially.  */
+ 
+   if (nelts < 4
+       || !aarch64_sve_expand_vector_init (target, v, nelts, nelts))
+     aarch64_sve_expand_vector_init_insert_elems (target, v, nelts);
+ }
+ 
+ /* Check whether VALUE is a vector constant in which every element
+    is either a power of 2 or a negated power of 2.  If so, return
+    a constant vector of log2s, and flip CODE between PLUS and MINUS
+    if VALUE contains negated powers of 2.  Return NULL_RTX otherwise.  */
+ 
+ static rtx
+ aarch64_convert_mult_to_shift (rtx value, rtx_code &code)
+ {
+   if (GET_CODE (value) != CONST_VECTOR)
+     return NULL_RTX;
+ 
+   rtx_vector_builder builder;
+   if (!builder.new_unary_operation (GET_MODE (value), value, false))
+     return NULL_RTX;
+ 
+   scalar_mode int_mode = GET_MODE_INNER (GET_MODE (value));
+   /* 1 if the result of the multiplication must be negated,
+      0 if it mustn't, or -1 if we don't yet care.  */
+   int negate = -1;
+   unsigned int encoded_nelts = const_vector_encoded_nelts (value);
+   for (unsigned int i = 0; i < encoded_nelts; ++i)
+     {
+       rtx elt = CONST_VECTOR_ENCODED_ELT (value, i);
+       if (!CONST_SCALAR_INT_P (elt))
+ 	return NULL_RTX;
+       rtx_mode_t val (elt, int_mode);
+       wide_int pow2 = wi::neg (val);
+       if (val != pow2)
+ 	{
+ 	  /* It matters whether we negate or not.  Make that choice,
+ 	     and make sure that it's consistent with previous elements.  */
+ 	  if (negate == !wi::neg_p (val))
+ 	    return NULL_RTX;
+ 	  negate = wi::neg_p (val);
+ 	  if (!negate)
+ 	    pow2 = val;
+ 	}
+       /* POW2 is now the value that we want to be a power of 2.  */
+       int shift = wi::exact_log2 (pow2);
+       if (shift < 0)
+ 	return NULL_RTX;
+       builder.quick_push (gen_int_mode (shift, int_mode));
+     }
+   if (negate == -1)
+     /* PLUS and MINUS are equivalent; canonicalize on PLUS.  */
+     code = PLUS;
+   else if (negate == 1)
+     code = code == PLUS ? MINUS : PLUS;
+   return builder.build ();
+ }
+ 
+ /* Prepare for an integer SVE multiply-add or multiply-subtract pattern;
+    CODE is PLUS for the former and MINUS for the latter.  OPERANDS is the
+    operands array, in the same order as for fma_optab.  Return true if
+    the function emitted all the necessary instructions, false if the caller
+    should generate the pattern normally with the new OPERANDS array.  */
+ 
+ bool
+ aarch64_prepare_sve_int_fma (rtx *operands, rtx_code code)
+ {
+   machine_mode mode = GET_MODE (operands[0]);
+   if (rtx shifts = aarch64_convert_mult_to_shift (operands[2], code))
+     {
+       rtx product = expand_binop (mode, vashl_optab, operands[1], shifts,
+ 				  NULL_RTX, true, OPTAB_DIRECT);
+       force_expand_binop (mode, code == PLUS ? add_optab : sub_optab,
+ 			  operands[3], product, operands[0], true,
+ 			  OPTAB_DIRECT);
+       return true;
+     }
+   operands[2] = force_reg (mode, operands[2]);
+   return false;
+ }
+ 
+ /* Likewise, but for a conditional pattern.  */
+ 
+ bool
+ aarch64_prepare_sve_cond_int_fma (rtx *operands, rtx_code code)
+ {
+   machine_mode mode = GET_MODE (operands[0]);
+   if (rtx shifts = aarch64_convert_mult_to_shift (operands[3], code))
+     {
+       rtx product = expand_binop (mode, vashl_optab, operands[2], shifts,
+ 				  NULL_RTX, true, OPTAB_DIRECT);
+       emit_insn (gen_cond (code, mode, operands[0], operands[1],
+ 			   operands[4], product, operands[5]));
+       return true;
+     }
+   operands[3] = force_reg (mode, operands[3]);
+   return false;
+ }
+ 
  static unsigned HOST_WIDE_INT
  aarch64_shift_truncation_mask (machine_mode mode)
  {
*************** aarch64_asm_preferred_eh_data_format (in
*** 15284,15294 ****
  static void
  aarch64_asm_output_variant_pcs (FILE *stream, const tree decl, const char* name)
  {
!   if (aarch64_simd_decl_p (decl))
      {
!       fprintf (stream, "\t.variant_pcs\t");
!       assemble_name (stream, name);
!       fprintf (stream, "\n");
      }
  }
  
--- 18927,18941 ----
  static void
  aarch64_asm_output_variant_pcs (FILE *stream, const tree decl, const char* name)
  {
!   if (TREE_CODE (decl) == FUNCTION_DECL)
      {
!       arm_pcs pcs = (arm_pcs) fndecl_abi (decl).id ();
!       if (pcs == ARM_PCS_SIMD || pcs == ARM_PCS_SVE)
! 	{
! 	  fprintf (stream, "\t.variant_pcs\t");
! 	  assemble_name (stream, name);
! 	  fprintf (stream, "\n");
! 	}
      }
  }
  
*************** aarch64_declare_function_name (FILE *str
*** 15315,15321 ****
    const struct processor *this_arch
      = aarch64_get_arch (targ_options->x_explicit_arch);
  
!   unsigned long isa_flags = targ_options->x_aarch64_isa_flags;
    std::string extension
      = aarch64_get_extension_string_for_isa_flags (isa_flags,
  						  this_arch->flags);
--- 18962,18968 ----
    const struct processor *this_arch
      = aarch64_get_arch (targ_options->x_explicit_arch);
  
!   uint64_t isa_flags = targ_options->x_aarch64_isa_flags;
    std::string extension
      = aarch64_get_extension_string_for_isa_flags (isa_flags,
  						  this_arch->flags);
*************** aarch64_asm_output_external (FILE *strea
*** 15397,15402 ****
--- 19044,19061 ----
    aarch64_asm_output_variant_pcs (stream, decl, name);
  }
  
+ /* Triggered after a .cfi_startproc directive is emitted into the assembly file.
+    Used to output the .cfi_b_key_frame directive when signing the current
+    function with the B key.  */
+ 
+ void
+ aarch64_post_cfi_startproc (FILE *f, tree ignored ATTRIBUTE_UNUSED)
+ {
+   if (cfun->machine->frame.laid_out && aarch64_return_address_signing_enabled ()
+       && aarch64_ra_sign_key == AARCH64_KEY_B)
+ 	asm_fprintf (f, "\t.cfi_b_key_frame\n");
+ }
+ 
  /* Implements TARGET_ASM_FILE_START.  Output the assembly header.  */
  
  static void
*************** aarch64_start_file (void)
*** 15407,15413 ****
  
    const struct processor *default_arch
      = aarch64_get_arch (default_options->x_explicit_arch);
!   unsigned long default_isa_flags = default_options->x_aarch64_isa_flags;
    std::string extension
      = aarch64_get_extension_string_for_isa_flags (default_isa_flags,
  						  default_arch->flags);
--- 19066,19072 ----
  
    const struct processor *default_arch
      = aarch64_get_arch (default_options->x_explicit_arch);
!   uint64_t default_isa_flags = default_options->x_aarch64_isa_flags;
    std::string extension
      = aarch64_get_extension_string_for_isa_flags (default_isa_flags,
  						  default_arch->flags);
*************** static void
*** 15426,15441 ****
  aarch64_emit_load_exclusive (machine_mode mode, rtx rval,
  			     rtx mem, rtx model_rtx)
  {
!   emit_insn (gen_aarch64_load_exclusive (mode, rval, mem, model_rtx));
  }
  
  /* Emit store exclusive.  */
  
  static void
  aarch64_emit_store_exclusive (machine_mode mode, rtx bval,
! 			      rtx rval, rtx mem, rtx model_rtx)
  {
!   emit_insn (gen_aarch64_store_exclusive (mode, bval, rval, mem, model_rtx));
  }
  
  /* Mark the previous jump instruction as unlikely.  */
--- 19085,19110 ----
  aarch64_emit_load_exclusive (machine_mode mode, rtx rval,
  			     rtx mem, rtx model_rtx)
  {
!   if (mode == TImode)
!     emit_insn (gen_aarch64_load_exclusive_pair (gen_lowpart (DImode, rval),
! 						gen_highpart (DImode, rval),
! 						mem, model_rtx));
!   else
!     emit_insn (gen_aarch64_load_exclusive (mode, rval, mem, model_rtx));
  }
  
  /* Emit store exclusive.  */
  
  static void
  aarch64_emit_store_exclusive (machine_mode mode, rtx bval,
! 			      rtx mem, rtx rval, rtx model_rtx)
  {
!   if (mode == TImode)
!     emit_insn (gen_aarch64_store_exclusive_pair
! 	       (bval, mem, operand_subword (rval, 0, 0, TImode),
! 		operand_subword (rval, 1, 0, TImode), model_rtx));
!   else
!     emit_insn (gen_aarch64_store_exclusive (mode, bval, mem, rval, model_rtx));
  }
  
  /* Mark the previous jump instruction as unlikely.  */
*************** aarch64_emit_unlikely_jump (rtx insn)
*** 15447,15452 ****
--- 19116,19197 ----
    add_reg_br_prob_note (jump, profile_probability::very_unlikely ());
  }
  
+ /* We store the names of the various atomic helpers in a 5x4 array.
+    Return the libcall function given MODE, MODEL and NAMES.  */
+ 
+ rtx
+ aarch64_atomic_ool_func(machine_mode mode, rtx model_rtx,
+ 			const atomic_ool_names *names)
+ {
+   memmodel model = memmodel_base (INTVAL (model_rtx));
+   int mode_idx, model_idx;
+ 
+   switch (mode)
+     {
+     case E_QImode:
+       mode_idx = 0;
+       break;
+     case E_HImode:
+       mode_idx = 1;
+       break;
+     case E_SImode:
+       mode_idx = 2;
+       break;
+     case E_DImode:
+       mode_idx = 3;
+       break;
+     case E_TImode:
+       mode_idx = 4;
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   switch (model)
+     {
+     case MEMMODEL_RELAXED:
+       model_idx = 0;
+       break;
+     case MEMMODEL_CONSUME:
+     case MEMMODEL_ACQUIRE:
+       model_idx = 1;
+       break;
+     case MEMMODEL_RELEASE:
+       model_idx = 2;
+       break;
+     case MEMMODEL_ACQ_REL:
+     case MEMMODEL_SEQ_CST:
+       model_idx = 3;
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   return init_one_libfunc_visibility (names->str[mode_idx][model_idx],
+ 				      VISIBILITY_HIDDEN);
+ }
+ 
+ #define DEF0(B, N) \
+   { "__aarch64_" #B #N "_relax", \
+     "__aarch64_" #B #N "_acq", \
+     "__aarch64_" #B #N "_rel", \
+     "__aarch64_" #B #N "_acq_rel" }
+ 
+ #define DEF4(B)  DEF0(B, 1), DEF0(B, 2), DEF0(B, 4), DEF0(B, 8), \
+ 		 { NULL, NULL, NULL, NULL }
+ #define DEF5(B)  DEF0(B, 1), DEF0(B, 2), DEF0(B, 4), DEF0(B, 8), DEF0(B, 16)
+ 
+ static const atomic_ool_names aarch64_ool_cas_names = { { DEF5(cas) } };
+ const atomic_ool_names aarch64_ool_swp_names = { { DEF4(swp) } };
+ const atomic_ool_names aarch64_ool_ldadd_names = { { DEF4(ldadd) } };
+ const atomic_ool_names aarch64_ool_ldset_names = { { DEF4(ldset) } };
+ const atomic_ool_names aarch64_ool_ldclr_names = { { DEF4(ldclr) } };
+ const atomic_ool_names aarch64_ool_ldeor_names = { { DEF4(ldeor) } };
+ 
+ #undef DEF0
+ #undef DEF4
+ #undef DEF5
+ 
  /* Expand a compare and swap pattern.  */
  
  void
*************** aarch64_expand_compare_and_swap (rtx ope
*** 15493,15498 ****
--- 19238,19254 ----
  						   newval, mod_s));
        cc_reg = aarch64_gen_compare_reg_maybe_ze (NE, rval, oldval, mode);
      }
+   else if (TARGET_OUTLINE_ATOMICS)
+     {
+       /* Oldval must satisfy compare afterward.  */
+       if (!aarch64_plus_operand (oldval, mode))
+ 	oldval = force_reg (mode, oldval);
+       rtx func = aarch64_atomic_ool_func (mode, mod_s, &aarch64_ool_cas_names);
+       rval = emit_library_call_value (func, NULL_RTX, LCT_NORMAL, r_mode,
+ 				      oldval, mode, newval, mode,
+ 				      XEXP (mem, 0), Pmode);
+       cc_reg = aarch64_gen_compare_reg_maybe_ze (NE, rval, oldval, mode);
+     }
    else
      {
        /* The oldval predicate varies by mode.  Test it and force to reg.  */
*************** aarch64_split_compare_and_swap (rtx oper
*** 15538,15550 ****
    /* Split after prolog/epilog to avoid interactions with shrinkwrapping.  */
    gcc_assert (epilogue_completed);
  
!   rtx rval, mem, oldval, newval, scratch;
    machine_mode mode;
    bool is_weak;
    rtx_code_label *label1, *label2;
-   rtx x, cond;
    enum memmodel model;
-   rtx model_rtx;
  
    rval = operands[0];
    mem = operands[1];
--- 19294,19304 ----
    /* Split after prolog/epilog to avoid interactions with shrinkwrapping.  */
    gcc_assert (epilogue_completed);
  
!   rtx rval, mem, oldval, newval, scratch, x, model_rtx;
    machine_mode mode;
    bool is_weak;
    rtx_code_label *label1, *label2;
    enum memmodel model;
  
    rval = operands[0];
    mem = operands[1];
*************** aarch64_split_compare_and_swap (rtx oper
*** 15565,15571 ****
  	CBNZ	scratch, .label1
      .label2:
  	CMP	rval, 0.  */
!   bool strong_zero_p = !is_weak && oldval == const0_rtx;
  
    label1 = NULL;
    if (!is_weak)
--- 19319,19326 ----
  	CBNZ	scratch, .label1
      .label2:
  	CMP	rval, 0.  */
!   bool strong_zero_p = (!is_weak && !aarch64_track_speculation &&
! 			oldval == const0_rtx && mode != TImode);
  
    label1 = NULL;
    if (!is_weak)
*************** aarch64_split_compare_and_swap (rtx oper
*** 15578,15612 ****
    /* The initial load can be relaxed for a __sync operation since a final
       barrier will be emitted to stop code hoisting.  */
    if (is_mm_sync (model))
!     aarch64_emit_load_exclusive (mode, rval, mem,
! 				 GEN_INT (MEMMODEL_RELAXED));
    else
      aarch64_emit_load_exclusive (mode, rval, mem, model_rtx);
  
    if (strong_zero_p)
!     {
!       if (aarch64_track_speculation)
! 	{
! 	  /* Emit an explicit compare instruction, so that we can correctly
! 	     track the condition codes.  */
! 	  rtx cc_reg = aarch64_gen_compare_reg (NE, rval, const0_rtx);
! 	  x = gen_rtx_NE (GET_MODE (cc_reg), cc_reg, const0_rtx);
! 	}
!       else
! 	x = gen_rtx_NE (VOIDmode, rval, const0_rtx);
! 
!       x = gen_rtx_IF_THEN_ELSE (VOIDmode, x,
! 				gen_rtx_LABEL_REF (Pmode, label2), pc_rtx);
!       aarch64_emit_unlikely_jump (gen_rtx_SET (pc_rtx, x));
!     }
    else
      {
!       cond = aarch64_gen_compare_reg_maybe_ze (NE, rval, oldval, mode);
!       x = gen_rtx_NE (VOIDmode, cond, const0_rtx);
!       x = gen_rtx_IF_THEN_ELSE (VOIDmode, x,
! 				gen_rtx_LABEL_REF (Pmode, label2), pc_rtx);
!       aarch64_emit_unlikely_jump (gen_rtx_SET (pc_rtx, x));
      }
  
    aarch64_emit_store_exclusive (mode, scratch, mem, newval, model_rtx);
  
--- 19333,19352 ----
    /* The initial load can be relaxed for a __sync operation since a final
       barrier will be emitted to stop code hoisting.  */
    if (is_mm_sync (model))
!     aarch64_emit_load_exclusive (mode, rval, mem, GEN_INT (MEMMODEL_RELAXED));
    else
      aarch64_emit_load_exclusive (mode, rval, mem, model_rtx);
  
    if (strong_zero_p)
!     x = gen_rtx_NE (VOIDmode, rval, const0_rtx);
    else
      {
!       rtx cc_reg = aarch64_gen_compare_reg_maybe_ze (NE, rval, oldval, mode);
!       x = gen_rtx_NE (VOIDmode, cc_reg, const0_rtx);
      }
+   x = gen_rtx_IF_THEN_ELSE (VOIDmode, x,
+ 			    gen_rtx_LABEL_REF (Pmode, label2), pc_rtx);
+   aarch64_emit_unlikely_jump (gen_rtx_SET (pc_rtx, x));
  
    aarch64_emit_store_exclusive (mode, scratch, mem, newval, model_rtx);
  
*************** aarch64_split_compare_and_swap (rtx oper
*** 15627,15648 ****
        aarch64_emit_unlikely_jump (gen_rtx_SET (pc_rtx, x));
      }
    else
!     {
!       cond = gen_rtx_REG (CCmode, CC_REGNUM);
!       x = gen_rtx_COMPARE (CCmode, scratch, const0_rtx);
!       emit_insn (gen_rtx_SET (cond, x));
!     }
  
    emit_label (label2);
    /* If we used a CBNZ in the exchange loop emit an explicit compare with RVAL
       to set the condition flags.  If this is not used it will be removed by
       later passes.  */
    if (strong_zero_p)
!     {
!       cond = gen_rtx_REG (CCmode, CC_REGNUM);
!       x = gen_rtx_COMPARE (CCmode, rval, const0_rtx);
!       emit_insn (gen_rtx_SET (cond, x));
!     }
    /* Emit any final barrier needed for a __sync operation.  */
    if (is_mm_sync (model))
      aarch64_emit_post_barrier (model);
--- 19367,19382 ----
        aarch64_emit_unlikely_jump (gen_rtx_SET (pc_rtx, x));
      }
    else
!     aarch64_gen_compare_reg (NE, scratch, const0_rtx);
  
    emit_label (label2);
+ 
    /* If we used a CBNZ in the exchange loop emit an explicit compare with RVAL
       to set the condition flags.  If this is not used it will be removed by
       later passes.  */
    if (strong_zero_p)
!     aarch64_gen_compare_reg (NE, rval, const0_rtx);
! 
    /* Emit any final barrier needed for a __sync operation.  */
    if (is_mm_sync (model))
      aarch64_emit_post_barrier (model);
*************** aarch64_float_const_representable_p (rtx
*** 15795,15800 ****
--- 19529,19535 ----
    REAL_VALUE_TYPE r, m;
    bool fail;
  
+   x = unwrap_const_vec_duplicate (x);
    if (!CONST_DOUBLE_P (x))
      return false;
  
*************** aarch64_output_simd_mov_immediate (rtx c
*** 15890,15906 ****
  
    if (GET_MODE_CLASS (info.elt_mode) == MODE_FLOAT)
      {
!       gcc_assert (info.shift == 0 && info.insn == simd_immediate_info::MOV);
        /* For FP zero change it to a CONST_INT 0 and use the integer SIMD
  	 move immediate path.  */
!       if (aarch64_float_const_zero_rtx_p (info.value))
!         info.value = GEN_INT (0);
        else
  	{
  	  const unsigned int buf_size = 20;
  	  char float_buf[buf_size] = {'\0'};
  	  real_to_decimal_for_mode (float_buf,
! 				    CONST_DOUBLE_REAL_VALUE (info.value),
  				    buf_size, buf_size, 1, info.elt_mode);
  
  	  if (lane_count == 1)
--- 19625,19642 ----
  
    if (GET_MODE_CLASS (info.elt_mode) == MODE_FLOAT)
      {
!       gcc_assert (info.insn == simd_immediate_info::MOV
! 		  && info.u.mov.shift == 0);
        /* For FP zero change it to a CONST_INT 0 and use the integer SIMD
  	 move immediate path.  */
!       if (aarch64_float_const_zero_rtx_p (info.u.mov.value))
!         info.u.mov.value = GEN_INT (0);
        else
  	{
  	  const unsigned int buf_size = 20;
  	  char float_buf[buf_size] = {'\0'};
  	  real_to_decimal_for_mode (float_buf,
! 				    CONST_DOUBLE_REAL_VALUE (info.u.mov.value),
  				    buf_size, buf_size, 1, info.elt_mode);
  
  	  if (lane_count == 1)
*************** aarch64_output_simd_mov_immediate (rtx c
*** 15912,15947 ****
  	}
      }
  
!   gcc_assert (CONST_INT_P (info.value));
  
    if (which == AARCH64_CHECK_MOV)
      {
        mnemonic = info.insn == simd_immediate_info::MVN ? "mvni" : "movi";
!       shift_op = info.modifier == simd_immediate_info::MSL ? "msl" : "lsl";
        if (lane_count == 1)
  	snprintf (templ, sizeof (templ), "%s\t%%d0, " HOST_WIDE_INT_PRINT_HEX,
! 		  mnemonic, UINTVAL (info.value));
!       else if (info.shift)
  	snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, "
  		  HOST_WIDE_INT_PRINT_HEX ", %s %d", mnemonic, lane_count,
! 		  element_char, UINTVAL (info.value), shift_op, info.shift);
        else
  	snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, "
  		  HOST_WIDE_INT_PRINT_HEX, mnemonic, lane_count,
! 		  element_char, UINTVAL (info.value));
      }
    else
      {
        /* For AARCH64_CHECK_BIC and AARCH64_CHECK_ORR.  */
        mnemonic = info.insn == simd_immediate_info::MVN ? "bic" : "orr";
!       if (info.shift)
  	snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, #"
  		  HOST_WIDE_INT_PRINT_DEC ", %s #%d", mnemonic, lane_count,
! 		  element_char, UINTVAL (info.value), "lsl", info.shift);
        else
  	snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, #"
  		  HOST_WIDE_INT_PRINT_DEC, mnemonic, lane_count,
! 		  element_char, UINTVAL (info.value));
      }
    return templ;
  }
--- 19648,19686 ----
  	}
      }
  
!   gcc_assert (CONST_INT_P (info.u.mov.value));
  
    if (which == AARCH64_CHECK_MOV)
      {
        mnemonic = info.insn == simd_immediate_info::MVN ? "mvni" : "movi";
!       shift_op = (info.u.mov.modifier == simd_immediate_info::MSL
! 		  ? "msl" : "lsl");
        if (lane_count == 1)
  	snprintf (templ, sizeof (templ), "%s\t%%d0, " HOST_WIDE_INT_PRINT_HEX,
! 		  mnemonic, UINTVAL (info.u.mov.value));
!       else if (info.u.mov.shift)
  	snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, "
  		  HOST_WIDE_INT_PRINT_HEX ", %s %d", mnemonic, lane_count,
! 		  element_char, UINTVAL (info.u.mov.value), shift_op,
! 		  info.u.mov.shift);
        else
  	snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, "
  		  HOST_WIDE_INT_PRINT_HEX, mnemonic, lane_count,
! 		  element_char, UINTVAL (info.u.mov.value));
      }
    else
      {
        /* For AARCH64_CHECK_BIC and AARCH64_CHECK_ORR.  */
        mnemonic = info.insn == simd_immediate_info::MVN ? "bic" : "orr";
!       if (info.u.mov.shift)
  	snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, #"
  		  HOST_WIDE_INT_PRINT_DEC ", %s #%d", mnemonic, lane_count,
! 		  element_char, UINTVAL (info.u.mov.value), "lsl",
! 		  info.u.mov.shift);
        else
  	snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, #"
  		  HOST_WIDE_INT_PRINT_DEC, mnemonic, lane_count,
! 		  element_char, UINTVAL (info.u.mov.value));
      }
    return templ;
  }
*************** aarch64_output_sve_mov_immediate (rtx co
*** 15985,16008 ****
  
    element_char = sizetochar (GET_MODE_BITSIZE (info.elt_mode));
  
!   if (info.step)
      {
        snprintf (templ, sizeof (templ), "index\t%%0.%c, #"
  		HOST_WIDE_INT_PRINT_DEC ", #" HOST_WIDE_INT_PRINT_DEC,
! 		element_char, INTVAL (info.value), INTVAL (info.step));
        return templ;
      }
  
    if (GET_MODE_CLASS (info.elt_mode) == MODE_FLOAT)
      {
!       if (aarch64_float_const_zero_rtx_p (info.value))
! 	info.value = GEN_INT (0);
        else
  	{
  	  const int buf_size = 20;
  	  char float_buf[buf_size] = {};
  	  real_to_decimal_for_mode (float_buf,
! 				    CONST_DOUBLE_REAL_VALUE (info.value),
  				    buf_size, buf_size, 1, info.elt_mode);
  
  	  snprintf (templ, sizeof (templ), "fmov\t%%0.%c, #%s",
--- 19724,19772 ----
  
    element_char = sizetochar (GET_MODE_BITSIZE (info.elt_mode));
  
!   machine_mode vec_mode = GET_MODE (const_vector);
!   if (aarch64_sve_pred_mode_p (vec_mode))
!     {
!       static char buf[sizeof ("ptrue\t%0.N, vlNNNNN")];
!       if (info.insn == simd_immediate_info::MOV)
! 	{
! 	  gcc_assert (info.u.mov.value == const0_rtx);
! 	  snprintf (buf, sizeof (buf), "pfalse\t%%0.b");
! 	}
!       else
! 	{
! 	  gcc_assert (info.insn == simd_immediate_info::PTRUE);
! 	  unsigned int total_bytes;
! 	  if (info.u.pattern == AARCH64_SV_ALL
! 	      && BYTES_PER_SVE_VECTOR.is_constant (&total_bytes))
! 	    snprintf (buf, sizeof (buf), "ptrue\t%%0.%c, vl%d", element_char,
! 		      total_bytes / GET_MODE_SIZE (info.elt_mode));
! 	  else
! 	    snprintf (buf, sizeof (buf), "ptrue\t%%0.%c, %s", element_char,
! 		      svpattern_token (info.u.pattern));
! 	}
!       return buf;
!     }
! 
!   if (info.insn == simd_immediate_info::INDEX)
      {
        snprintf (templ, sizeof (templ), "index\t%%0.%c, #"
  		HOST_WIDE_INT_PRINT_DEC ", #" HOST_WIDE_INT_PRINT_DEC,
! 		element_char, INTVAL (info.u.index.base),
! 		INTVAL (info.u.index.step));
        return templ;
      }
  
    if (GET_MODE_CLASS (info.elt_mode) == MODE_FLOAT)
      {
!       if (aarch64_float_const_zero_rtx_p (info.u.mov.value))
! 	info.u.mov.value = GEN_INT (0);
        else
  	{
  	  const int buf_size = 20;
  	  char float_buf[buf_size] = {};
  	  real_to_decimal_for_mode (float_buf,
! 				    CONST_DOUBLE_REAL_VALUE (info.u.mov.value),
  				    buf_size, buf_size, 1, info.elt_mode);
  
  	  snprintf (templ, sizeof (templ), "fmov\t%%0.%c, #%s",
*************** aarch64_output_sve_mov_immediate (rtx co
*** 16012,16034 ****
      }
  
    snprintf (templ, sizeof (templ), "mov\t%%0.%c, #" HOST_WIDE_INT_PRINT_DEC,
! 	    element_char, INTVAL (info.value));
    return templ;
  }
  
! /* Return the asm format for a PTRUE instruction whose destination has
!    mode MODE.  SUFFIX is the element size suffix.  */
  
  char *
! aarch64_output_ptrue (machine_mode mode, char suffix)
  {
!   unsigned int nunits;
!   static char buf[sizeof ("ptrue\t%0.N, vlNNNNN")];
!   if (GET_MODE_NUNITS (mode).is_constant (&nunits))
!     snprintf (buf, sizeof (buf), "ptrue\t%%0.%c, vl%d", suffix, nunits);
!   else
!     snprintf (buf, sizeof (buf), "ptrue\t%%0.%c, all", suffix);
!   return buf;
  }
  
  /* Split operands into moves from op[1] + op[2] into op[0].  */
--- 19776,19802 ----
      }
  
    snprintf (templ, sizeof (templ), "mov\t%%0.%c, #" HOST_WIDE_INT_PRINT_DEC,
! 	    element_char, INTVAL (info.u.mov.value));
    return templ;
  }
  
! /* Return the asm template for a PTRUES.  CONST_UNSPEC is the
!    aarch64_sve_ptrue_svpattern_immediate that describes the predicate
!    pattern.  */
  
  char *
! aarch64_output_sve_ptrues (rtx const_unspec)
  {
!   static char templ[40];
! 
!   struct simd_immediate_info info;
!   bool is_valid = aarch64_simd_valid_immediate (const_unspec, &info);
!   gcc_assert (is_valid && info.insn == simd_immediate_info::PTRUE);
! 
!   char element_char = sizetochar (GET_MODE_BITSIZE (info.elt_mode));
!   snprintf (templ, sizeof (templ), "ptrues\t%%0.%c, %s", element_char,
! 	    svpattern_token (info.u.pattern));
!   return templ;
  }
  
  /* Split operands into moves from op[1] + op[2] into op[0].  */
*************** aarch64_evpc_rev_local (struct expand_ve
*** 16446,16458 ****
    if (d->testing_p)
      return true;
  
-   rtx src = gen_rtx_UNSPEC (d->vmode, gen_rtvec (1, d->op0), unspec);
    if (d->vec_flags == VEC_SVE_DATA)
      {
!       rtx pred = force_reg (pred_mode, CONSTM1_RTX (pred_mode));
!       src = gen_rtx_UNSPEC (d->vmode, gen_rtvec (2, pred, src),
! 			    UNSPEC_MERGE_PTRUE);
      }
    emit_set_insn (d->target, src);
    return true;
  }
--- 20214,20244 ----
    if (d->testing_p)
      return true;
  
    if (d->vec_flags == VEC_SVE_DATA)
      {
!       machine_mode int_mode = aarch64_sve_int_mode (pred_mode);
!       rtx target = gen_reg_rtx (int_mode);
!       if (BYTES_BIG_ENDIAN)
! 	/* The act of taking a subreg between INT_MODE and d->vmode
! 	   is itself a reversing operation on big-endian targets;
! 	   see the comment at the head of aarch64-sve.md for details.
! 	   First reinterpret OP0 as INT_MODE without using a subreg
! 	   and without changing the contents.  */
! 	emit_insn (gen_aarch64_sve_reinterpret (int_mode, target, d->op0));
!       else
! 	{
! 	  /* For SVE we use REV[BHW] unspecs derived from the element size
! 	     of v->mode and vector modes whose elements have SIZE bytes.
! 	     This ensures that the vector modes match the predicate modes.  */
! 	  int unspec = aarch64_sve_rev_unspec (d->vmode);
! 	  rtx pred = aarch64_ptrue_reg (pred_mode);
! 	  emit_insn (gen_aarch64_pred (unspec, int_mode, target, pred,
! 				       gen_lowpart (int_mode, d->op0)));
! 	}
!       emit_move_insn (d->target, gen_lowpart (d->vmode, target));
!       return true;
      }
+   rtx src = gen_rtx_UNSPEC (d->vmode, gen_rtvec (1, d->op0), unspec);
    emit_set_insn (d->target, src);
    return true;
  }
*************** aarch64_evpc_rev_global (struct expand_v
*** 16465,16471 ****
  {
    poly_uint64 nelt = d->perm.length ();
  
!   if (!d->one_vector_p || d->vec_flags != VEC_SVE_DATA)
      return false;
  
    if (!d->perm.series_p (0, 1, nelt - 1, -1))
--- 20251,20257 ----
  {
    poly_uint64 nelt = d->perm.length ();
  
!   if (!d->one_vector_p || d->vec_flags == VEC_ADVSIMD)
      return false;
  
    if (!d->perm.series_p (0, 1, nelt - 1, -1))
*************** aarch64_evpc_sve_tbl (struct expand_vec_
*** 16569,16575 ****
    if (d->testing_p)
      return true;
  
!   machine_mode sel_mode = mode_for_int_vector (d->vmode).require ();
    rtx sel = vec_perm_indices_to_rtx (sel_mode, d->perm);
    if (d->one_vector_p)
      emit_unspec2 (d->target, UNSPEC_TBL, d->op0, force_reg (sel_mode, sel));
--- 20355,20361 ----
    if (d->testing_p)
      return true;
  
!   machine_mode sel_mode = related_int_vector_mode (d->vmode).require ();
    rtx sel = vec_perm_indices_to_rtx (sel_mode, d->perm);
    if (d->one_vector_p)
      emit_unspec2 (d->target, UNSPEC_TBL, d->op0, force_reg (sel_mode, sel));
*************** aarch64_evpc_sve_tbl (struct expand_vec_
*** 16578,16583 ****
--- 20364,20415 ----
    return true;
  }
  
+ /* Try to implement D using SVE SEL instruction.  */
+ 
+ static bool
+ aarch64_evpc_sel (struct expand_vec_perm_d *d)
+ {
+   machine_mode vmode = d->vmode;
+   int unit_size = GET_MODE_UNIT_SIZE (vmode);
+ 
+   if (d->vec_flags != VEC_SVE_DATA
+       || unit_size > 8)
+     return false;
+ 
+   int n_patterns = d->perm.encoding ().npatterns ();
+   poly_int64 vec_len = d->perm.length ();
+ 
+   for (int i = 0; i < n_patterns; ++i)
+     if (!known_eq (d->perm[i], i)
+ 	&& !known_eq (d->perm[i], vec_len + i))
+       return false;
+ 
+   for (int i = n_patterns; i < n_patterns * 2; i++)
+     if (!d->perm.series_p (i, n_patterns, i, n_patterns)
+ 	&& !d->perm.series_p (i, n_patterns, vec_len + i, n_patterns))
+       return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+   machine_mode pred_mode = aarch64_sve_pred_mode (vmode);
+ 
+   /* Build a predicate that is true when op0 elements should be used.  */
+   rtx_vector_builder builder (pred_mode, n_patterns, 2);
+   for (int i = 0; i < n_patterns * 2; i++)
+     {
+       rtx elem = known_eq (d->perm[i], i) ? CONST1_RTX (BImode)
+ 					  : CONST0_RTX (BImode);
+       builder.quick_push (elem);
+     }
+ 
+   rtx const_vec = builder.build ();
+   rtx pred = force_reg (pred_mode, const_vec);
+   /* TARGET = PRED ? OP0 : OP1.  */
+   emit_insn (gen_vcond_mask (vmode, vmode, d->target, d->op0, d->op1, pred));
+   return true;
+ }
+ 
  static bool
  aarch64_expand_vec_perm_const_1 (struct expand_vec_perm_d *d)
  {
*************** aarch64_expand_vec_perm_const_1 (struct
*** 16610,16615 ****
--- 20442,20449 ----
  	return true;
        else if (aarch64_evpc_trn (d))
  	return true;
+       else if (aarch64_evpc_sel (d))
+ 	return true;
        if (d->vec_flags == VEC_SVE_DATA)
  	return aarch64_evpc_sve_tbl (d);
        else if (d->vec_flags == VEC_ADVSIMD)
*************** aarch64_reverse_mask (machine_mode mode,
*** 16685,16744 ****
    return force_reg (V16QImode, mask);
  }
  
! /* Return true if X is a valid second operand for the SVE instruction
!    that implements integer comparison OP_CODE.  */
! 
! static bool
! aarch64_sve_cmp_operand_p (rtx_code op_code, rtx x)
! {
!   if (register_operand (x, VOIDmode))
!     return true;
! 
!   switch (op_code)
!     {
!     case LTU:
!     case LEU:
!     case GEU:
!     case GTU:
!       return aarch64_sve_cmp_immediate_p (x, false);
!     case LT:
!     case LE:
!     case GE:
!     case GT:
!     case NE:
!     case EQ:
!       return aarch64_sve_cmp_immediate_p (x, true);
!     default:
!       gcc_unreachable ();
!     }
! }
! 
! /* Use predicated SVE instructions to implement the equivalent of:
! 
!      (set TARGET OP)
! 
!    given that PTRUE is an all-true predicate of the appropriate mode.  */
! 
! static void
! aarch64_emit_sve_ptrue_op (rtx target, rtx ptrue, rtx op)
! {
!   rtx unspec = gen_rtx_UNSPEC (GET_MODE (target),
! 			       gen_rtvec (2, ptrue, op),
! 			       UNSPEC_MERGE_PTRUE);
!   rtx_insn *insn = emit_set_insn (target, unspec);
!   set_unique_reg_note (insn, REG_EQUAL, copy_rtx (op));
! }
  
! /* Likewise, but also clobber the condition codes.  */
  
! static void
! aarch64_emit_sve_ptrue_op_cc (rtx target, rtx ptrue, rtx op)
  {
!   rtx unspec = gen_rtx_UNSPEC (GET_MODE (target),
! 			       gen_rtvec (2, ptrue, op),
! 			       UNSPEC_MERGE_PTRUE);
!   rtx_insn *insn = emit_insn (gen_set_clobber_cc (target, unspec));
!   set_unique_reg_note (insn, REG_EQUAL, copy_rtx (op));
  }
  
  /* Return the UNSPEC_COND_* code for comparison CODE.  */
--- 20519,20537 ----
    return force_reg (V16QImode, mask);
  }
  
! /* Expand an SVE integer comparison using the SVE equivalent of:
  
!      (set TARGET (CODE OP0 OP1)).  */
  
! void
! aarch64_expand_sve_vec_cmp_int (rtx target, rtx_code code, rtx op0, rtx op1)
  {
!   machine_mode pred_mode = GET_MODE (target);
!   machine_mode data_mode = GET_MODE (op0);
!   rtx res = aarch64_sve_emit_int_cmp (target, pred_mode, code, data_mode,
! 				      op0, op1);
!   if (!rtx_equal_p (target, res))
!     emit_move_insn (target, res);
  }
  
  /* Return the UNSPEC_COND_* code for comparison CODE.  */
*************** aarch64_unspec_cond_code (rtx_code code)
*** 16749,16765 ****
    switch (code)
      {
      case NE:
!       return UNSPEC_COND_NE;
      case EQ:
!       return UNSPEC_COND_EQ;
      case LT:
!       return UNSPEC_COND_LT;
      case GT:
!       return UNSPEC_COND_GT;
      case LE:
!       return UNSPEC_COND_LE;
      case GE:
!       return UNSPEC_COND_GE;
      default:
        gcc_unreachable ();
      }
--- 20542,20560 ----
    switch (code)
      {
      case NE:
!       return UNSPEC_COND_FCMNE;
      case EQ:
!       return UNSPEC_COND_FCMEQ;
      case LT:
!       return UNSPEC_COND_FCMLT;
      case GT:
!       return UNSPEC_COND_FCMGT;
      case LE:
!       return UNSPEC_COND_FCMLE;
      case GE:
!       return UNSPEC_COND_FCMGE;
!     case UNORDERED:
!       return UNSPEC_COND_FCMUO;
      default:
        gcc_unreachable ();
      }
*************** aarch64_unspec_cond_code (rtx_code code)
*** 16767,16844 ****
  
  /* Emit:
  
!       (set TARGET (unspec [PRED OP0 OP1] UNSPEC_COND_<X>))
  
!    where <X> is the operation associated with comparison CODE.  This form
!    of instruction is used when (and (CODE OP0 OP1) PRED) would have different
!    semantics, such as when PRED might not be all-true and when comparing
!    inactive lanes could have side effects.  */
  
  static void
! aarch64_emit_sve_predicated_cond (rtx target, rtx_code code,
! 				  rtx pred, rtx op0, rtx op1)
  {
    rtx unspec = gen_rtx_UNSPEC (GET_MODE (pred),
! 			       gen_rtvec (3, pred, op0, op1),
  			       aarch64_unspec_cond_code (code));
    emit_set_insn (target, unspec);
  }
  
- /* Expand an SVE integer comparison using the SVE equivalent of:
- 
-      (set TARGET (CODE OP0 OP1)).  */
- 
- void
- aarch64_expand_sve_vec_cmp_int (rtx target, rtx_code code, rtx op0, rtx op1)
- {
-   machine_mode pred_mode = GET_MODE (target);
-   machine_mode data_mode = GET_MODE (op0);
- 
-   if (!aarch64_sve_cmp_operand_p (code, op1))
-     op1 = force_reg (data_mode, op1);
- 
-   rtx ptrue = force_reg (pred_mode, CONSTM1_RTX (pred_mode));
-   rtx cond = gen_rtx_fmt_ee (code, pred_mode, op0, op1);
-   aarch64_emit_sve_ptrue_op_cc (target, ptrue, cond);
- }
- 
  /* Emit the SVE equivalent of:
  
!       (set TMP1 (CODE1 OP0 OP1))
!       (set TMP2 (CODE2 OP0 OP1))
        (set TARGET (ior:PRED_MODE TMP1 TMP2))
  
!    PTRUE is an all-true predicate with the same mode as TARGET.  */
  
  static void
! aarch64_emit_sve_or_conds (rtx target, rtx_code code1, rtx_code code2,
! 			   rtx ptrue, rtx op0, rtx op1)
  {
!   machine_mode pred_mode = GET_MODE (ptrue);
    rtx tmp1 = gen_reg_rtx (pred_mode);
!   aarch64_emit_sve_ptrue_op (tmp1, ptrue,
! 			     gen_rtx_fmt_ee (code1, pred_mode, op0, op1));
    rtx tmp2 = gen_reg_rtx (pred_mode);
!   aarch64_emit_sve_ptrue_op (tmp2, ptrue,
! 			     gen_rtx_fmt_ee (code2, pred_mode, op0, op1));
    aarch64_emit_binop (target, ior_optab, tmp1, tmp2);
  }
  
  /* Emit the SVE equivalent of:
  
!       (set TMP (CODE OP0 OP1))
        (set TARGET (not TMP))
  
!    PTRUE is an all-true predicate with the same mode as TARGET.  */
  
  static void
! aarch64_emit_sve_inverted_cond (rtx target, rtx ptrue, rtx_code code,
! 				rtx op0, rtx op1)
  {
!   machine_mode pred_mode = GET_MODE (ptrue);
    rtx tmp = gen_reg_rtx (pred_mode);
!   aarch64_emit_sve_ptrue_op (tmp, ptrue,
! 			     gen_rtx_fmt_ee (code, pred_mode, op0, op1));
    aarch64_emit_unop (target, one_cmpl_optab, tmp);
  }
  
--- 20562,20619 ----
  
  /* Emit:
  
!       (set TARGET (unspec [PRED KNOWN_PTRUE_P OP0 OP1] UNSPEC_COND_<X>))
  
!    where <X> is the operation associated with comparison CODE.
!    KNOWN_PTRUE_P is true if PRED is known to be a PTRUE.  */
  
  static void
! aarch64_emit_sve_fp_cond (rtx target, rtx_code code, rtx pred,
! 			  bool known_ptrue_p, rtx op0, rtx op1)
  {
+   rtx flag = gen_int_mode (known_ptrue_p, SImode);
    rtx unspec = gen_rtx_UNSPEC (GET_MODE (pred),
! 			       gen_rtvec (4, pred, flag, op0, op1),
  			       aarch64_unspec_cond_code (code));
    emit_set_insn (target, unspec);
  }
  
  /* Emit the SVE equivalent of:
  
!       (set TMP1 (unspec [PRED KNOWN_PTRUE_P OP0 OP1] UNSPEC_COND_<X1>))
!       (set TMP2 (unspec [PRED KNOWN_PTRUE_P OP0 OP1] UNSPEC_COND_<X2>))
        (set TARGET (ior:PRED_MODE TMP1 TMP2))
  
!    where <Xi> is the operation associated with comparison CODEi.
!    KNOWN_PTRUE_P is true if PRED is known to be a PTRUE.  */
  
  static void
! aarch64_emit_sve_or_fp_conds (rtx target, rtx_code code1, rtx_code code2,
! 			      rtx pred, bool known_ptrue_p, rtx op0, rtx op1)
  {
!   machine_mode pred_mode = GET_MODE (pred);
    rtx tmp1 = gen_reg_rtx (pred_mode);
!   aarch64_emit_sve_fp_cond (tmp1, code1, pred, known_ptrue_p, op0, op1);
    rtx tmp2 = gen_reg_rtx (pred_mode);
!   aarch64_emit_sve_fp_cond (tmp2, code2, pred, known_ptrue_p, op0, op1);
    aarch64_emit_binop (target, ior_optab, tmp1, tmp2);
  }
  
  /* Emit the SVE equivalent of:
  
!       (set TMP (unspec [PRED KNOWN_PTRUE_P OP0 OP1] UNSPEC_COND_<X>))
        (set TARGET (not TMP))
  
!    where <X> is the operation associated with comparison CODE.
!    KNOWN_PTRUE_P is true if PRED is known to be a PTRUE.  */
  
  static void
! aarch64_emit_sve_invert_fp_cond (rtx target, rtx_code code, rtx pred,
! 				 bool known_ptrue_p, rtx op0, rtx op1)
  {
!   machine_mode pred_mode = GET_MODE (pred);
    rtx tmp = gen_reg_rtx (pred_mode);
!   aarch64_emit_sve_fp_cond (tmp, code, pred, known_ptrue_p, op0, op1);
    aarch64_emit_unop (target, one_cmpl_optab, tmp);
  }
  
*************** aarch64_expand_sve_vec_cmp_float (rtx ta
*** 16856,16862 ****
    machine_mode pred_mode = GET_MODE (target);
    machine_mode data_mode = GET_MODE (op0);
  
!   rtx ptrue = force_reg (pred_mode, CONSTM1_RTX (pred_mode));
    switch (code)
      {
      case UNORDERED:
--- 20631,20637 ----
    machine_mode pred_mode = GET_MODE (target);
    machine_mode data_mode = GET_MODE (op0);
  
!   rtx ptrue = aarch64_ptrue_reg (pred_mode);
    switch (code)
      {
      case UNORDERED:
*************** aarch64_expand_sve_vec_cmp_float (rtx ta
*** 16871,16884 ****
      case NE:
        {
  	/* There is native support for the comparison.  */
! 	rtx cond = gen_rtx_fmt_ee (code, pred_mode, op0, op1);
! 	aarch64_emit_sve_ptrue_op (target, ptrue, cond);
  	return false;
        }
  
      case LTGT:
        /* This is a trapping operation (LT or GT).  */
!       aarch64_emit_sve_or_conds (target, LT, GT, ptrue, op0, op1);
        return false;
  
      case UNEQ:
--- 20646,20658 ----
      case NE:
        {
  	/* There is native support for the comparison.  */
! 	aarch64_emit_sve_fp_cond (target, code, ptrue, true, op0, op1);
  	return false;
        }
  
      case LTGT:
        /* This is a trapping operation (LT or GT).  */
!       aarch64_emit_sve_or_fp_conds (target, LT, GT, ptrue, true, op0, op1);
        return false;
  
      case UNEQ:
*************** aarch64_expand_sve_vec_cmp_float (rtx ta
*** 16886,16892 ****
  	{
  	  /* This would trap for signaling NaNs.  */
  	  op1 = force_reg (data_mode, op1);
! 	  aarch64_emit_sve_or_conds (target, UNORDERED, EQ, ptrue, op0, op1);
  	  return false;
  	}
        /* fall through */
--- 20660,20667 ----
  	{
  	  /* This would trap for signaling NaNs.  */
  	  op1 = force_reg (data_mode, op1);
! 	  aarch64_emit_sve_or_fp_conds (target, UNORDERED, EQ,
! 					ptrue, true, op0, op1);
  	  return false;
  	}
        /* fall through */
*************** aarch64_expand_sve_vec_cmp_float (rtx ta
*** 16899,16905 ****
  	  /* Work out which elements are ordered.  */
  	  rtx ordered = gen_reg_rtx (pred_mode);
  	  op1 = force_reg (data_mode, op1);
! 	  aarch64_emit_sve_inverted_cond (ordered, ptrue, UNORDERED, op0, op1);
  
  	  /* Test the opposite condition for the ordered elements,
  	     then invert the result.  */
--- 20674,20681 ----
  	  /* Work out which elements are ordered.  */
  	  rtx ordered = gen_reg_rtx (pred_mode);
  	  op1 = force_reg (data_mode, op1);
! 	  aarch64_emit_sve_invert_fp_cond (ordered, UNORDERED,
! 					   ptrue, true, op0, op1);
  
  	  /* Test the opposite condition for the ordered elements,
  	     then invert the result.  */
*************** aarch64_expand_sve_vec_cmp_float (rtx ta
*** 16909,16921 ****
  	    code = reverse_condition_maybe_unordered (code);
  	  if (can_invert_p)
  	    {
! 	      aarch64_emit_sve_predicated_cond (target, code,
! 						ordered, op0, op1);
  	      return true;
  	    }
! 	  rtx tmp = gen_reg_rtx (pred_mode);
! 	  aarch64_emit_sve_predicated_cond (tmp, code, ordered, op0, op1);
! 	  aarch64_emit_unop (target, one_cmpl_optab, tmp);
  	  return false;
  	}
        break;
--- 20685,20696 ----
  	    code = reverse_condition_maybe_unordered (code);
  	  if (can_invert_p)
  	    {
! 	      aarch64_emit_sve_fp_cond (target, code,
! 					ordered, false, op0, op1);
  	      return true;
  	    }
! 	  aarch64_emit_sve_invert_fp_cond (target, code,
! 					   ordered, false, op0, op1);
  	  return false;
  	}
        break;
*************** aarch64_expand_sve_vec_cmp_float (rtx ta
*** 16933,16943 ****
    code = reverse_condition_maybe_unordered (code);
    if (can_invert_p)
      {
!       rtx cond = gen_rtx_fmt_ee (code, pred_mode, op0, op1);
!       aarch64_emit_sve_ptrue_op (target, ptrue, cond);
        return true;
      }
!   aarch64_emit_sve_inverted_cond (target, ptrue, code, op0, op1);
    return false;
  }
  
--- 20708,20717 ----
    code = reverse_condition_maybe_unordered (code);
    if (can_invert_p)
      {
!       aarch64_emit_sve_fp_cond (target, code, ptrue, true, op0, op1);
        return true;
      }
!   aarch64_emit_sve_invert_fp_cond (target, code, ptrue, true, op0, op1);
    return false;
  }
  
*************** void
*** 16949,16957 ****
  aarch64_expand_sve_vcond (machine_mode data_mode, machine_mode cmp_mode,
  			  rtx *ops)
  {
!   machine_mode pred_mode
!     = aarch64_get_mask_mode (GET_MODE_NUNITS (cmp_mode),
! 			     GET_MODE_SIZE (cmp_mode)).require ();
    rtx pred = gen_reg_rtx (pred_mode);
    if (FLOAT_MODE_P (cmp_mode))
      {
--- 20723,20729 ----
  aarch64_expand_sve_vcond (machine_mode data_mode, machine_mode cmp_mode,
  			  rtx *ops)
  {
!   machine_mode pred_mode = aarch64_get_mask_mode (cmp_mode).require ();
    rtx pred = gen_reg_rtx (pred_mode);
    if (FLOAT_MODE_P (cmp_mode))
      {
*************** aarch64_expand_sve_vcond (machine_mode d
*** 16962,16967 ****
--- 20734,20746 ----
    else
      aarch64_expand_sve_vec_cmp_int (pred, GET_CODE (ops[3]), ops[4], ops[5]);
  
+   if (!aarch64_sve_reg_or_dup_imm (ops[1], data_mode))
+     ops[1] = force_reg (data_mode, ops[1]);
+   /* The "false" value can only be zero if the "true" value is a constant.  */
+   if (register_operand (ops[1], data_mode)
+       || !aarch64_simd_reg_or_zero (ops[2], data_mode))
+     ops[2] = force_reg (data_mode, ops[2]);
+ 
    rtvec vec = gen_rtvec (3, pred, ops[1], ops[2]);
    emit_set_insn (ops[0], gen_rtx_UNSPEC (data_mode, vec, UNSPEC_SEL));
  }
*************** aarch64_copy_one_block_and_progress_poin
*** 17039,17049 ****
    *dst = aarch64_progress_pointer (*dst);
  }
  
! /* Expand movmem, as if from a __builtin_memcpy.  Return true if
     we succeed, otherwise return false.  */
  
  bool
! aarch64_expand_movmem (rtx *operands)
  {
    int n, mode_bits;
    rtx dst = operands[0];
--- 20818,20828 ----
    *dst = aarch64_progress_pointer (*dst);
  }
  
! /* Expand cpymem, as if from a __builtin_memcpy.  Return true if
     we succeed, otherwise return false.  */
  
  bool
! aarch64_expand_cpymem (rtx *operands)
  {
    int n, mode_bits;
    rtx dst = operands[0];
*************** aarch64_expand_subvti (rtx op0, rtx low_
*** 17310,17316 ****
  static unsigned HOST_WIDE_INT
  aarch64_asan_shadow_offset (void)
  {
!   return (HOST_WIDE_INT_1 << 36);
  }
  
  static rtx
--- 21089,21098 ----
  static unsigned HOST_WIDE_INT
  aarch64_asan_shadow_offset (void)
  {
!   if (TARGET_ILP32)
!     return (HOST_WIDE_INT_1 << 29);
!   else
!     return (HOST_WIDE_INT_1 << 36);
  }
  
  static rtx
*************** aarch64_gen_ccmp_next (rtx_insn **prep_s
*** 17411,17434 ****
      case E_HImode:
      case E_SImode:
        cmp_mode = SImode;
-       icode = CODE_FOR_ccmpsi;
        break;
  
      case E_DImode:
        cmp_mode = DImode;
-       icode = CODE_FOR_ccmpdi;
        break;
  
      case E_SFmode:
        cmp_mode = SFmode;
        cc_mode = aarch64_select_cc_mode ((rtx_code) cmp_code, op0, op1);
-       icode = cc_mode == CCFPEmode ? CODE_FOR_fccmpesf : CODE_FOR_fccmpsf;
        break;
  
      case E_DFmode:
        cmp_mode = DFmode;
        cc_mode = aarch64_select_cc_mode ((rtx_code) cmp_code, op0, op1);
-       icode = cc_mode == CCFPEmode ? CODE_FOR_fccmpedf : CODE_FOR_fccmpdf;
        break;
  
      default:
--- 21193,21212 ----
*************** aarch64_gen_ccmp_next (rtx_insn **prep_s
*** 17436,17441 ****
--- 21214,21221 ----
        return NULL_RTX;
      }
  
+   icode = code_for_ccmp (cc_mode, cmp_mode);
+ 
    op0 = prepare_operand (icode, op0, 2, op_mode, cmp_mode, unsignedp);
    op1 = prepare_operand (icode, op1, 3, op_mode, cmp_mode, unsignedp);
    if (!op0 || !op1)
*************** aarch64_gen_ccmp_next (rtx_insn **prep_s
*** 17451,17459 ****
  
    if (bit_code != AND)
      {
!       prev = gen_rtx_fmt_ee (REVERSE_CONDITION (GET_CODE (prev),
! 						GET_MODE (XEXP (prev, 0))),
! 			     VOIDmode, XEXP (prev, 0), const0_rtx);
        aarch64_cond = AARCH64_INVERSE_CONDITION_CODE (aarch64_cond);
      }
  
--- 21231,21251 ----
  
    if (bit_code != AND)
      {
!       /* Treat the ccmp patterns as canonical and use them where possible,
! 	 but fall back to ccmp_rev patterns if there's no other option.  */
!       rtx_code prev_code = GET_CODE (prev);
!       machine_mode prev_mode = GET_MODE (XEXP (prev, 0));
!       if ((prev_mode == CCFPmode || prev_mode == CCFPEmode)
! 	  && !(prev_code == EQ
! 	       || prev_code == NE
! 	       || prev_code == ORDERED
! 	       || prev_code == UNORDERED))
! 	icode = code_for_ccmp_rev (cc_mode, cmp_mode);
!       else
! 	{
! 	  rtx_code code = reverse_condition (prev_code);
! 	  prev = gen_rtx_fmt_ee (code, VOIDmode, XEXP (prev, 0), const0_rtx);
! 	}
        aarch64_cond = AARCH64_INVERSE_CONDITION_CODE (aarch64_cond);
      }
  
*************** aarch_macro_fusion_pair_p (rtx_insn *pre
*** 17616,17626 ****
          }
      }
  
!   if (aarch64_fusion_enabled_p (AARCH64_FUSE_AES_AESMC)
!        && aarch_crypto_can_dual_issue (prev, curr))
      return true;
  
!   if (aarch64_fusion_enabled_p (AARCH64_FUSE_CMP_BRANCH)
        && any_condjump_p (curr))
      {
        unsigned int condreg1, condreg2;
--- 21408,21423 ----
          }
      }
  
!   /* Fuse compare (CMP/CMN/TST/BICS) and conditional branch.  */
!   if (aarch64_fusion_enabled_p (AARCH64_FUSE_CMP_BRANCH)
!       && prev_set && curr_set && any_condjump_p (curr)
!       && GET_CODE (SET_SRC (prev_set)) == COMPARE
!       && SCALAR_INT_MODE_P (GET_MODE (XEXP (SET_SRC (prev_set), 0)))
!       && reg_referenced_p (SET_DEST (prev_set), PATTERN (curr)))
      return true;
  
!   /* Fuse flag-setting ALU instructions and conditional branch.  */
!   if (aarch64_fusion_enabled_p (AARCH64_FUSE_ALU_BRANCH)
        && any_condjump_p (curr))
      {
        unsigned int condreg1, condreg2;
*************** aarch_macro_fusion_pair_p (rtx_insn *pre
*** 17644,17652 ****
  	}
      }
  
    if (prev_set
        && curr_set
!       && aarch64_fusion_enabled_p (AARCH64_FUSE_ALU_BRANCH)
        && any_condjump_p (curr))
      {
        /* We're trying to match:
--- 21441,21450 ----
  	}
      }
  
+   /* Fuse ALU instructions and CBZ/CBNZ.  */
    if (prev_set
        && curr_set
!       && aarch64_fusion_enabled_p (AARCH64_FUSE_ALU_CBZ)
        && any_condjump_p (curr))
      {
        /* We're trying to match:
*************** aarch64_gen_adjusted_ldpstp (rtx *operan
*** 18258,18264 ****
      {
        base_off = 0x1000 - 1;
        /* We must still make sure that the base offset is aligned with respect
! 	 to the address.  But it may may not be made any bigger.  */
        base_off -= (((base_off % msize) - (off_val_1 % msize)) + msize) % msize;
      }
  
--- 22056,22062 ----
      {
        base_off = 0x1000 - 1;
        /* We must still make sure that the base offset is aligned with respect
! 	 to the address.  But it may not be made any bigger.  */
        base_off -= (((base_off % msize) - (off_val_1 % msize)) + msize) % msize;
      }
  
*************** aarch64_fpconst_pow_of_2 (rtx x)
*** 18403,18408 ****
--- 22201,22229 ----
    return exact_log2 (real_to_integer (r));
  }
  
+ /* If X is a positive CONST_DOUBLE with a value that is the reciprocal of a
+    power of 2 (i.e 1/2^n) return the number of float bits. e.g. for x==(1/2^n)
+    return n. Otherwise return -1.  */
+ 
+ int
+ aarch64_fpconst_pow2_recip (rtx x)
+ {
+   REAL_VALUE_TYPE r0;
+ 
+   if (!CONST_DOUBLE_P (x))
+     return -1;
+ 
+   r0 = *CONST_DOUBLE_REAL_VALUE (x);
+   if (exact_real_inverse (DFmode, &r0)
+       && !REAL_VALUE_NEGATIVE (r0))
+     {
+ 	int ret = exact_log2 (real_to_integer (&r0));
+ 	if (ret >= 1 && ret <= 32)
+ 	    return ret;
+     }
+   return -1;
+ }
+ 
  /* If X is a vector of equal CONST_DOUBLE values and that value is
     Y, return the aarch64_fpconst_pow_of_2 of Y.  Otherwise return -1.  */
  
*************** static bool
*** 18591,18601 ****
  aarch64_can_change_mode_class (machine_mode from,
  			       machine_mode to, reg_class_t)
  {
!   if (BYTES_BIG_ENDIAN)
      {
!       bool from_sve_p = aarch64_sve_data_mode_p (from);
!       bool to_sve_p = aarch64_sve_data_mode_p (to);
  
        /* Don't allow changes between SVE data modes and non-SVE modes.
  	 See the comment at the head of aarch64-sve.md for details.  */
        if (from_sve_p != to_sve_p)
--- 22412,22463 ----
  aarch64_can_change_mode_class (machine_mode from,
  			       machine_mode to, reg_class_t)
  {
!   unsigned int from_flags = aarch64_classify_vector_mode (from);
!   unsigned int to_flags = aarch64_classify_vector_mode (to);
! 
!   bool from_sve_p = (from_flags & VEC_ANY_SVE);
!   bool to_sve_p = (to_flags & VEC_ANY_SVE);
! 
!   bool from_partial_sve_p = from_sve_p && (from_flags & VEC_PARTIAL);
!   bool to_partial_sve_p = to_sve_p && (to_flags & VEC_PARTIAL);
! 
!   bool from_pred_p = (from_flags & VEC_SVE_PRED);
!   bool to_pred_p = (to_flags & VEC_SVE_PRED);
! 
!   /* Don't allow changes between predicate modes and other modes.
!      Only predicate registers can hold predicate modes and only
!      non-predicate registers can hold non-predicate modes, so any
!      attempt to mix them would require a round trip through memory.  */
!   if (from_pred_p != to_pred_p)
!     return false;
! 
!   /* Don't allow changes between partial SVE modes and other modes.
!      The contents of partial SVE modes are distributed evenly across
!      the register, whereas GCC expects them to be clustered together.  */
!   if (from_partial_sve_p != to_partial_sve_p)
!     return false;
! 
!   /* Similarly reject changes between partial SVE modes that have
!      different patterns of significant and insignificant bits.  */
!   if (from_partial_sve_p
!       && (aarch64_sve_container_bits (from) != aarch64_sve_container_bits (to)
! 	  || GET_MODE_UNIT_SIZE (from) != GET_MODE_UNIT_SIZE (to)))
!     return false;
! 
!   if (maybe_ne (BITS_PER_SVE_VECTOR, 128u))
      {
!       /* Don't allow changes between SVE modes and other modes that might
! 	 be bigger than 128 bits.  In particular, OImode, CImode and XImode
! 	 divide into 128-bit quantities while SVE modes divide into
! 	 BITS_PER_SVE_VECTOR quantities.  */
!       if (from_sve_p && !to_sve_p && maybe_gt (GET_MODE_BITSIZE (to), 128))
! 	return false;
!       if (to_sve_p && !from_sve_p && maybe_gt (GET_MODE_BITSIZE (from), 128))
! 	return false;
!     }
  
+   if (BYTES_BIG_ENDIAN)
+     {
        /* Don't allow changes between SVE data modes and non-SVE modes.
  	 See the comment at the head of aarch64-sve.md for details.  */
        if (from_sve_p != to_sve_p)
*************** aarch64_select_early_remat_modes (sbitma
*** 18623,18634 ****
    /* SVE values are not normally live across a call, so it should be
       worth doing early rematerialization even in VL-specific mode.  */
    for (int i = 0; i < NUM_MACHINE_MODES; ++i)
!     {
!       machine_mode mode = (machine_mode) i;
!       unsigned int vec_flags = aarch64_classify_vector_mode (mode);
!       if (vec_flags & VEC_ANY_SVE)
! 	bitmap_set_bit (modes, i);
!     }
  }
  
  /* Override the default target speculation_safe_value.  */
--- 22485,22492 ----
    /* SVE values are not normally live across a call, so it should be
       worth doing early rematerialization even in VL-specific mode.  */
    for (int i = 0; i < NUM_MACHINE_MODES; ++i)
!     if (aarch64_sve_mode_p ((machine_mode) i))
!       bitmap_set_bit (modes, i);
  }
  
  /* Override the default target speculation_safe_value.  */
*************** aarch64_stack_protect_guard (void)
*** 18848,18853 ****
--- 22706,22768 ----
    return NULL_TREE;
  }
  
+ /* Return the diagnostic message string if conversion from FROMTYPE to
+    TOTYPE is not allowed, NULL otherwise.  */
+ 
+ static const char *
+ aarch64_invalid_conversion (const_tree fromtype, const_tree totype)
+ {
+   if (element_mode (fromtype) != element_mode (totype))
+     {
+       /* Do no allow conversions to/from BFmode scalar types.  */
+       if (TYPE_MODE (fromtype) == BFmode)
+ 	return N_("invalid conversion from type %<bfloat16_t%>");
+       if (TYPE_MODE (totype) == BFmode)
+ 	return N_("invalid conversion to type %<bfloat16_t%>");
+     }
+ 
+   /* Conversion allowed.  */
+   return NULL;
+ }
+ 
+ /* Return the diagnostic message string if the unary operation OP is
+    not permitted on TYPE, NULL otherwise.  */
+ 
+ static const char *
+ aarch64_invalid_unary_op (int op, const_tree type)
+ {
+   /* Reject all single-operand operations on BFmode except for &.  */
+   if (element_mode (type) == BFmode && op != ADDR_EXPR)
+     return N_("operation not permitted on type %<bfloat16_t%>");
+ 
+   /* Operation allowed.  */
+   return NULL;
+ }
+ 
+ /* Return the diagnostic message string if the binary operation OP is
+    not permitted on TYPE1 and TYPE2, NULL otherwise.  */
+ 
+ static const char *
+ aarch64_invalid_binary_op (int op ATTRIBUTE_UNUSED, const_tree type1,
+ 			   const_tree type2)
+ {
+   /* Reject all 2-operand operations on BFmode.  */
+   if (element_mode (type1) == BFmode
+       || element_mode (type2) == BFmode)
+     return N_("operation not permitted on type %<bfloat16_t%>");
+ 
+   if (VECTOR_TYPE_P (type1)
+       && VECTOR_TYPE_P (type2)
+       && !TYPE_INDIVISIBLE_P (type1)
+       && !TYPE_INDIVISIBLE_P (type2)
+       && (aarch64_sve::builtin_type_p (type1)
+ 	  != aarch64_sve::builtin_type_p (type2)))
+     return N_("cannot combine GNU and SVE vectors in a binary operation");
+ 
+   /* Operation allowed.  */
+   return NULL;
+ }
+ 
  /* Implement TARGET_ASM_FILE_END for AArch64.  This adds the AArch64 GNU NOTE
     section at the end if needed.  */
  #define GNU_PROPERTY_AARCH64_FEATURE_1_AND	0xc0000000
*************** aarch64_run_selftests (void)
*** 18991,18997 ****
  #define TARGET_BUILD_BUILTIN_VA_LIST aarch64_build_builtin_va_list
  
  #undef TARGET_CALLEE_COPIES
! #define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false
  
  #undef TARGET_CAN_ELIMINATE
  #define TARGET_CAN_ELIMINATE aarch64_can_eliminate
--- 22906,22912 ----
  #define TARGET_BUILD_BUILTIN_VA_LIST aarch64_build_builtin_va_list
  
  #undef TARGET_CALLEE_COPIES
! #define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_arg_info_false
  
  #undef TARGET_CAN_ELIMINATE
  #define TARGET_CAN_ELIMINATE aarch64_can_eliminate
*************** aarch64_run_selftests (void)
*** 19008,19013 ****
--- 22923,22931 ----
  #undef TARGET_CONDITIONAL_REGISTER_USAGE
  #define TARGET_CONDITIONAL_REGISTER_USAGE aarch64_conditional_register_usage
  
+ #undef TARGET_MEMBER_TYPE_FORCES_BLK
+ #define TARGET_MEMBER_TYPE_FORCES_BLK aarch64_member_type_forces_blk
+ 
  /* Only the least significant bit is used for initialization guard
     variables.  */
  #undef TARGET_CXX_GUARD_MASK_BIT
*************** aarch64_libgcc_floating_mode_supported_p
*** 19101,19106 ****
--- 23019,23036 ----
  #undef TARGET_MANGLE_TYPE
  #define TARGET_MANGLE_TYPE aarch64_mangle_type
  
+ #undef TARGET_INVALID_CONVERSION
+ #define TARGET_INVALID_CONVERSION aarch64_invalid_conversion
+ 
+ #undef TARGET_INVALID_UNARY_OP
+ #define TARGET_INVALID_UNARY_OP aarch64_invalid_unary_op
+ 
+ #undef TARGET_INVALID_BINARY_OP
+ #define TARGET_INVALID_BINARY_OP aarch64_invalid_binary_op
+ 
+ #undef TARGET_VERIFY_TYPE_CONTEXT
+ #define TARGET_VERIFY_TYPE_CONTEXT aarch64_verify_type_context
+ 
  #undef TARGET_MEMORY_MOVE_COST
  #define TARGET_MEMORY_MOVE_COST aarch64_memory_move_cost
  
*************** aarch64_libgcc_floating_mode_supported_p
*** 19180,19185 ****
--- 23110,23118 ----
  #undef TARGET_SCHED_ISSUE_RATE
  #define TARGET_SCHED_ISSUE_RATE aarch64_sched_issue_rate
  
+ #undef TARGET_SCHED_VARIABLE_ISSUE
+ #define TARGET_SCHED_VARIABLE_ISSUE aarch64_sched_variable_issue
+ 
  #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
  #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \
    aarch64_sched_first_cycle_multipass_dfa_lookahead
*************** aarch64_libgcc_floating_mode_supported_p
*** 19221,19226 ****
--- 23154,23162 ----
  #undef TARGET_VECTOR_MODE_SUPPORTED_P
  #define TARGET_VECTOR_MODE_SUPPORTED_P aarch64_vector_mode_supported_p
  
+ #undef TARGET_COMPATIBLE_VECTOR_TYPES_P
+ #define TARGET_COMPATIBLE_VECTOR_TYPES_P aarch64_compatible_vector_types_p
+ 
  #undef TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT
  #define TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT \
    aarch64_builtin_support_vector_misalignment
*************** aarch64_libgcc_floating_mode_supported_p
*** 19248,19256 ****
  #define TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION \
    aarch64_builtin_vectorized_function
  
! #undef TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES
! #define TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES \
!   aarch64_autovectorize_vector_sizes
  
  #undef TARGET_ATOMIC_ASSIGN_EXPAND_FENV
  #define TARGET_ATOMIC_ASSIGN_EXPAND_FENV \
--- 23184,23192 ----
  #define TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION \
    aarch64_builtin_vectorized_function
  
! #undef TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES
! #define TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES \
!   aarch64_autovectorize_vector_modes
  
  #undef TARGET_ATOMIC_ASSIGN_EXPAND_FENV
  #define TARGET_ATOMIC_ASSIGN_EXPAND_FENV \
*************** aarch64_libgcc_floating_mode_supported_p
*** 19283,19288 ****
--- 23219,23226 ----
  #define TARGET_VECTORIZE_VEC_PERM_CONST \
    aarch64_vectorize_vec_perm_const
  
+ #undef TARGET_VECTORIZE_RELATED_MODE
+ #define TARGET_VECTORIZE_RELATED_MODE aarch64_vectorize_related_mode
  #undef TARGET_VECTORIZE_GET_MASK_MODE
  #define TARGET_VECTORIZE_GET_MASK_MODE aarch64_get_mask_mode
  #undef TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE
*************** aarch64_libgcc_floating_mode_supported_p
*** 19366,19378 ****
  #define TARGET_HARD_REGNO_CALL_PART_CLOBBERED \
    aarch64_hard_regno_call_part_clobbered
  
! #undef TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS
! #define TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS \
!   aarch64_remove_extra_call_preserved_regs
! 
! #undef TARGET_RETURN_CALL_WITH_MAX_CLOBBERS
! #define TARGET_RETURN_CALL_WITH_MAX_CLOBBERS \
!   aarch64_return_call_with_max_clobbers
  
  #undef TARGET_CONSTANT_ALIGNMENT
  #define TARGET_CONSTANT_ALIGNMENT aarch64_constant_alignment
--- 23304,23311 ----
  #define TARGET_HARD_REGNO_CALL_PART_CLOBBERED \
    aarch64_hard_regno_call_part_clobbered
  
! #undef TARGET_INSN_CALLEE_ABI
! #define TARGET_INSN_CALLEE_ABI aarch64_insn_callee_abi
  
  #undef TARGET_CONSTANT_ALIGNMENT
  #define TARGET_CONSTANT_ALIGNMENT aarch64_constant_alignment
*************** aarch64_libgcc_floating_mode_supported_p
*** 19415,19425 ****
--- 23348,23370 ----
  #undef TARGET_GET_MULTILIB_ABI_NAME
  #define TARGET_GET_MULTILIB_ABI_NAME aarch64_get_multilib_abi_name
  
+ #undef TARGET_FNTYPE_ABI
+ #define TARGET_FNTYPE_ABI aarch64_fntype_abi
+ 
  #if CHECKING_P
  #undef TARGET_RUN_TARGET_SELFTESTS
  #define TARGET_RUN_TARGET_SELFTESTS selftest::aarch64_run_selftests
  #endif /* #if CHECKING_P */
  
+ #undef TARGET_ASM_POST_CFI_STARTPROC
+ #define TARGET_ASM_POST_CFI_STARTPROC aarch64_post_cfi_startproc
+ 
+ #undef TARGET_STRICT_ARGUMENT_NAMING
+ #define TARGET_STRICT_ARGUMENT_NAMING hook_bool_CUMULATIVE_ARGS_true
+ 
+ #undef TARGET_MD_ASM_ADJUST
+ #define TARGET_MD_ASM_ADJUST arm_md_asm_adjust
+ 
  struct gcc_target targetm = TARGET_INITIALIZER;
  
  #include "gt-aarch64.h"
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64.h gcc-10.1.0/gcc/config/aarch64/aarch64.h
*** gcc-9.3.0/gcc/config/aarch64/aarch64.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Machine description for AArch64 architecture.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 105,110 ****
--- 105,115 ----
     port.  */
  #define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_delta
  
+ 
+ /* Emit calls to libgcc helpers for atomic operations for runtime detection
+    of LSE instructions.  */
+ #define TARGET_OUTLINE_ATOMICS (aarch64_flag_outline_atomics)
+ 
  /* Align definitions of arrays, unions and structures so that
     initializations and copies can be made more efficient.  This is not
     ABI-changing, so it only affects places where we can see the
*************** extern unsigned aarch64_architecture_ver
*** 192,197 ****
--- 197,227 ----
  /* Execution and Data Prediction Restriction instructions supported.  */
  #define AARCH64_FL_PREDRES    (1 << 27)
  
+ /* SVE2 instruction supported.  */
+ #define AARCH64_FL_SVE2		(1 << 28)
+ #define AARCH64_FL_SVE2_AES	(1 << 29)
+ #define AARCH64_FL_SVE2_SM4	(1 << 30)
+ #define AARCH64_FL_SVE2_SHA3	(1ULL << 31)
+ #define AARCH64_FL_SVE2_BITPERM	(1ULL << 32)
+ 
+ /* Transactional Memory Extension.  */
+ #define AARCH64_FL_TME	      (1ULL << 33)  /* Has TME instructions.  */
+ 
+ /* Armv8.6-A architecture extensions.  */
+ #define AARCH64_FL_V8_6	      (1ULL << 34)
+ 
+ /* 8-bit Integer Matrix Multiply (I8MM) extensions.  */
+ #define AARCH64_FL_I8MM	      (1ULL << 35)
+ 
+ /* Brain half-precision floating-point (BFloat16) Extension.  */
+ #define AARCH64_FL_BF16	      (1ULL << 36)
+ 
+ /* 32-bit Floating-point Matrix Multiply (F32MM) extensions.  */
+ #define AARCH64_FL_F32MM      (1ULL << 37)
+ 
+ /* 64-bit Floating-point Matrix Multiply (F64MM) extensions.  */
+ #define AARCH64_FL_F64MM      (1ULL << 38)
+ 
  /* Has FP and SIMD.  */
  #define AARCH64_FL_FPSIMD     (AARCH64_FL_FP | AARCH64_FL_SIMD)
  
*************** extern unsigned aarch64_architecture_ver
*** 213,218 ****
--- 243,251 ----
  #define AARCH64_FL_FOR_ARCH8_5			\
    (AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_V8_5	\
     | AARCH64_FL_SB | AARCH64_FL_SSBS | AARCH64_FL_PREDRES)
+ #define AARCH64_FL_FOR_ARCH8_6			\
+   (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_V8_6 | AARCH64_FL_FPSIMD \
+    | AARCH64_FL_I8MM | AARCH64_FL_BF16)
  
  /* Macros to test ISA flags.  */
  
*************** extern unsigned aarch64_architecture_ver
*** 225,230 ****
--- 258,268 ----
  #define AARCH64_ISA_V8_2	   (aarch64_isa_flags & AARCH64_FL_V8_2)
  #define AARCH64_ISA_F16		   (aarch64_isa_flags & AARCH64_FL_F16)
  #define AARCH64_ISA_SVE            (aarch64_isa_flags & AARCH64_FL_SVE)
+ #define AARCH64_ISA_SVE2	   (aarch64_isa_flags & AARCH64_FL_SVE2)
+ #define AARCH64_ISA_SVE2_AES	   (aarch64_isa_flags & AARCH64_FL_SVE2_AES)
+ #define AARCH64_ISA_SVE2_BITPERM  (aarch64_isa_flags & AARCH64_FL_SVE2_BITPERM)
+ #define AARCH64_ISA_SVE2_SHA3	   (aarch64_isa_flags & AARCH64_FL_SVE2_SHA3)
+ #define AARCH64_ISA_SVE2_SM4	   (aarch64_isa_flags & AARCH64_FL_SVE2_SM4)
  #define AARCH64_ISA_V8_3	   (aarch64_isa_flags & AARCH64_FL_V8_3)
  #define AARCH64_ISA_DOTPROD	   (aarch64_isa_flags & AARCH64_FL_DOTPROD)
  #define AARCH64_ISA_AES	           (aarch64_isa_flags & AARCH64_FL_AES)
*************** extern unsigned aarch64_architecture_ver
*** 234,240 ****
--- 272,286 ----
  #define AARCH64_ISA_SHA3	   (aarch64_isa_flags & AARCH64_FL_SHA3)
  #define AARCH64_ISA_F16FML	   (aarch64_isa_flags & AARCH64_FL_F16FML)
  #define AARCH64_ISA_RCPC8_4	   (aarch64_isa_flags & AARCH64_FL_RCPC8_4)
+ #define AARCH64_ISA_RNG		   (aarch64_isa_flags & AARCH64_FL_RNG)
  #define AARCH64_ISA_V8_5	   (aarch64_isa_flags & AARCH64_FL_V8_5)
+ #define AARCH64_ISA_TME		   (aarch64_isa_flags & AARCH64_FL_TME)
+ #define AARCH64_ISA_MEMTAG	   (aarch64_isa_flags & AARCH64_FL_MEMTAG)
+ #define AARCH64_ISA_V8_6	   (aarch64_isa_flags & AARCH64_FL_V8_6)
+ #define AARCH64_ISA_I8MM	   (aarch64_isa_flags & AARCH64_FL_I8MM)
+ #define AARCH64_ISA_F32MM	   (aarch64_isa_flags & AARCH64_FL_F32MM)
+ #define AARCH64_ISA_F64MM	   (aarch64_isa_flags & AARCH64_FL_F64MM)
+ #define AARCH64_ISA_BF16	   (aarch64_isa_flags & AARCH64_FL_BF16)
  
  /* Crypto is an optional extension to AdvSIMD.  */
  #define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO)
*************** extern unsigned aarch64_architecture_ver
*** 268,281 ****
  #define TARGET_DOTPROD (TARGET_SIMD && AARCH64_ISA_DOTPROD)
  
  /* SVE instructions, enabled through +sve.  */
! #define TARGET_SVE (AARCH64_ISA_SVE)
  
  /* ARMv8.3-A features.  */
  #define TARGET_ARMV8_3	(AARCH64_ISA_V8_3)
  
  /* Armv8.3-a Complex number extension to AdvSIMD extensions.  */
  #define TARGET_COMPLEX (TARGET_SIMD && TARGET_ARMV8_3)
  
  /* Make sure this is always defined so we don't have to check for ifdefs
     but rather use normal ifs.  */
  #ifndef TARGET_FIX_ERR_A53_835769_DEFAULT
--- 314,374 ----
  #define TARGET_DOTPROD (TARGET_SIMD && AARCH64_ISA_DOTPROD)
  
  /* SVE instructions, enabled through +sve.  */
! #define TARGET_SVE (!TARGET_GENERAL_REGS_ONLY && AARCH64_ISA_SVE)
! 
! /* SVE2 instructions, enabled through +sve2.  */
! #define TARGET_SVE2 (TARGET_SVE && AARCH64_ISA_SVE2)
! 
! /* SVE2 AES instructions, enabled through +sve2-aes.  */
! #define TARGET_SVE2_AES (TARGET_SVE2 && AARCH64_ISA_SVE2_AES)
! 
! /* SVE2 BITPERM instructions, enabled through +sve2-bitperm.  */
! #define TARGET_SVE2_BITPERM (TARGET_SVE2 && AARCH64_ISA_SVE2_BITPERM)
! 
! /* SVE2 SHA3 instructions, enabled through +sve2-sha3.  */
! #define TARGET_SVE2_SHA3 (TARGET_SVE2 && AARCH64_ISA_SVE2_SHA3)
! 
! /* SVE2 SM4 instructions, enabled through +sve2-sm4.  */
! #define TARGET_SVE2_SM4 (TARGET_SVE2 && AARCH64_ISA_SVE2_SM4)
  
  /* ARMv8.3-A features.  */
  #define TARGET_ARMV8_3	(AARCH64_ISA_V8_3)
  
+ /* Javascript conversion instruction from Armv8.3-a.  */
+ #define TARGET_JSCVT	(TARGET_FLOAT && AARCH64_ISA_V8_3)
+ 
  /* Armv8.3-a Complex number extension to AdvSIMD extensions.  */
  #define TARGET_COMPLEX (TARGET_SIMD && TARGET_ARMV8_3)
  
+ /* Floating-point rounding instructions from Armv8.5-a.  */
+ #define TARGET_FRINT (AARCH64_ISA_V8_5 && TARGET_FLOAT)
+ 
+ /* TME instructions are enabled.  */
+ #define TARGET_TME (AARCH64_ISA_TME)
+ 
+ /* Random number instructions from Armv8.5-a.  */
+ #define TARGET_RNG (AARCH64_ISA_RNG)
+ 
+ /* Memory Tagging instructions optional to Armv8.5 enabled through +memtag.  */
+ #define TARGET_MEMTAG (AARCH64_ISA_V8_5 && AARCH64_ISA_MEMTAG)
+ 
+ /* I8MM instructions are enabled through +i8mm.  */
+ #define TARGET_I8MM (AARCH64_ISA_I8MM)
+ #define TARGET_SVE_I8MM (TARGET_SVE && AARCH64_ISA_I8MM)
+ 
+ /* F32MM instructions are enabled through +f32mm.  */
+ #define TARGET_F32MM (AARCH64_ISA_F32MM)
+ #define TARGET_SVE_F32MM (TARGET_SVE && AARCH64_ISA_F32MM)
+ 
+ /* F64MM instructions are enabled through +f64mm.  */
+ #define TARGET_F64MM (AARCH64_ISA_F64MM)
+ #define TARGET_SVE_F64MM (TARGET_SVE && AARCH64_ISA_F64MM)
+ 
+ /* BF16 instructions are enabled through +bf16.  */
+ #define TARGET_BF16_FP (AARCH64_ISA_BF16)
+ #define TARGET_BF16_SIMD (AARCH64_ISA_BF16 && TARGET_SIMD)
+ #define TARGET_SVE_BF16 (TARGET_SVE && AARCH64_ISA_BF16)
+ 
  /* Make sure this is always defined so we don't have to check for ifdefs
     but rather use normal ifs.  */
  #ifndef TARGET_FIX_ERR_A53_835769_DEFAULT
*************** extern unsigned aarch64_architecture_ver
*** 338,343 ****
--- 431,439 ----
     P0-P7        Predicate low registers: valid in all predicate contexts
     P8-P15       Predicate high registers: used as scratch space
  
+    FFR		First Fault Register, a fixed-use SVE predicate register
+    FFRT		FFR token: a fake register used for modelling dependencies
+ 
     VG           Pseudo "vector granules" register
  
     VG is the number of 64-bit elements in an SVE vector.  We define
*************** extern unsigned aarch64_architecture_ver
*** 358,363 ****
--- 454,460 ----
      1, 1, 1, 1,			/* SFP, AP, CC, VG */	\
      0, 0, 0, 0,   0, 0, 0, 0,   /* P0 - P7 */           \
      0, 0, 0, 0,   0, 0, 0, 0,   /* P8 - P15 */          \
+     1, 1			/* FFR and FFRT */	\
    }
  
  /* X30 is marked as caller-saved which is in line with regular function call
*************** extern unsigned aarch64_architecture_ver
*** 380,385 ****
--- 477,483 ----
      1, 1, 1, 1,			/* SFP, AP, CC, VG */	\
      1, 1, 1, 1,   1, 1, 1, 1,	/* P0 - P7 */		\
      1, 1, 1, 1,   1, 1, 1, 1,	/* P8 - P15 */		\
+     1, 1			/* FFR and FFRT */	\
    }
  
  #define REGISTER_NAMES						\
*************** extern unsigned aarch64_architecture_ver
*** 395,400 ****
--- 493,499 ----
      "sfp", "ap",  "cc",  "vg",					\
      "p0",  "p1",  "p2",  "p3",  "p4",  "p5",  "p6",  "p7",	\
      "p8",  "p9",  "p10", "p11", "p12", "p13", "p14", "p15",	\
+     "ffr", "ffrt"						\
    }
  
  /* Generate the register aliases for core register N */
*************** extern unsigned aarch64_architecture_ver
*** 443,453 ****
  #define FRAME_POINTER_REGNUM		SFP_REGNUM
  #define STACK_POINTER_REGNUM		SP_REGNUM
  #define ARG_POINTER_REGNUM		AP_REGNUM
! #define FIRST_PSEUDO_REGISTER		(P15_REGNUM + 1)
  
! /* The number of (integer) argument register available.  */
  #define NUM_ARG_REGS			8
  #define NUM_FP_ARG_REGS			8
  
  /* A Homogeneous Floating-Point or Short-Vector Aggregate may have at most
     four members.  */
--- 542,553 ----
  #define FRAME_POINTER_REGNUM		SFP_REGNUM
  #define STACK_POINTER_REGNUM		SP_REGNUM
  #define ARG_POINTER_REGNUM		AP_REGNUM
! #define FIRST_PSEUDO_REGISTER		(FFRT_REGNUM + 1)
  
! /* The number of argument registers available for each class.  */
  #define NUM_ARG_REGS			8
  #define NUM_FP_ARG_REGS			8
+ #define NUM_PR_ARG_REGS			4
  
  /* A Homogeneous Floating-Point or Short-Vector Aggregate may have at most
     four members.  */
*************** extern unsigned aarch64_architecture_ver
*** 514,519 ****
--- 614,622 ----
  #define ASM_OUTPUT_EXTERNAL(STR, DECL, NAME) \
    aarch64_asm_output_external (STR, DECL, NAME)
  
+ /* Output assembly strings after .cfi_startproc is emitted.  */
+ #define ASM_POST_CFI_STARTPROC  aarch64_post_cfi_startproc
+ 
  /* For EH returns X4 contains the stack adjustment.  */
  #define EH_RETURN_STACKADJ_RTX	gen_rtx_REG (Pmode, R4_REGNUM)
  #define EH_RETURN_HANDLER_RTX  aarch64_eh_return_handler_rtx ()
*************** extern unsigned aarch64_architecture_ver
*** 542,547 ****
--- 645,653 ----
  #define FP_LO_REGNUM_P(REGNO)            \
    (((unsigned) (REGNO - V0_REGNUM)) <= (V15_REGNUM - V0_REGNUM))
  
+ #define FP_LO8_REGNUM_P(REGNO)            \
+   (((unsigned) (REGNO - V0_REGNUM)) <= (V7_REGNUM - V0_REGNUM))
+ 
  #define PR_REGNUM_P(REGNO)\
    (((unsigned) (REGNO - P0_REGNUM)) <= (P15_REGNUM - P0_REGNUM))
  
*************** enum reg_class
*** 560,571 ****
--- 666,680 ----
    GENERAL_REGS,
    STACK_REG,
    POINTER_REGS,
+   FP_LO8_REGS,
    FP_LO_REGS,
    FP_REGS,
    POINTER_AND_FP_REGS,
    PR_LO_REGS,
    PR_HI_REGS,
    PR_REGS,
+   FFR_REGS,
+   PR_AND_FFR_REGS,
    ALL_REGS,
    LIM_REG_CLASSES		/* Last */
  };
*************** enum reg_class
*** 579,590 ****
--- 688,702 ----
    "GENERAL_REGS",				\
    "STACK_REG",					\
    "POINTER_REGS",				\
+   "FP_LO8_REGS",				\
    "FP_LO_REGS",					\
    "FP_REGS",					\
    "POINTER_AND_FP_REGS",			\
    "PR_LO_REGS",					\
    "PR_HI_REGS",					\
    "PR_REGS",					\
+   "FFR_REGS",					\
+   "PR_AND_FFR_REGS",				\
    "ALL_REGS"					\
  }
  
*************** enum reg_class
*** 595,606 ****
--- 707,721 ----
    { 0x7fffffff, 0x00000000, 0x00000003 },	/* GENERAL_REGS */	\
    { 0x80000000, 0x00000000, 0x00000000 },	/* STACK_REG */		\
    { 0xffffffff, 0x00000000, 0x00000003 },	/* POINTER_REGS */	\
+   { 0x00000000, 0x000000ff, 0x00000000 },       /* FP_LO8_REGS  */	\
    { 0x00000000, 0x0000ffff, 0x00000000 },       /* FP_LO_REGS  */	\
    { 0x00000000, 0xffffffff, 0x00000000 },       /* FP_REGS  */		\
    { 0xffffffff, 0xffffffff, 0x00000003 },	/* POINTER_AND_FP_REGS */\
    { 0x00000000, 0x00000000, 0x00000ff0 },	/* PR_LO_REGS */	\
    { 0x00000000, 0x00000000, 0x000ff000 },	/* PR_HI_REGS */	\
    { 0x00000000, 0x00000000, 0x000ffff0 },	/* PR_REGS */		\
+   { 0x00000000, 0x00000000, 0x00300000 },	/* FFR_REGS */		\
+   { 0x00000000, 0x00000000, 0x003ffff0 },	/* PR_AND_FFR_REGS */	\
    { 0xffffffff, 0xffffffff, 0x000fffff }	/* ALL_REGS */		\
  }
  
*************** extern enum aarch64_processor aarch64_tu
*** 676,682 ****
  #ifdef HAVE_POLY_INT_H
  struct GTY (()) aarch64_frame
  {
!   HOST_WIDE_INT reg_offset[FIRST_PSEUDO_REGISTER];
  
    /* The number of extra stack bytes taken up by register varargs.
       This area is allocated by the callee at the very top of the
--- 791,797 ----
  #ifdef HAVE_POLY_INT_H
  struct GTY (()) aarch64_frame
  {
!   poly_int64 reg_offset[LAST_SAVED_REGNUM + 1];
  
    /* The number of extra stack bytes taken up by register varargs.
       This area is allocated by the callee at the very top of the
*************** struct GTY (()) aarch64_frame
*** 684,692 ****
       STACK_BOUNDARY.  */
    HOST_WIDE_INT saved_varargs_size;
  
!   /* The size of the saved callee-save int/FP registers.  */
  
!   HOST_WIDE_INT saved_regs_size;
  
    /* Offset from the base of the frame (incomming SP) to the
       top of the locals area.  This value is always a multiple of
--- 799,810 ----
       STACK_BOUNDARY.  */
    HOST_WIDE_INT saved_varargs_size;
  
!   /* The size of the callee-save registers with a slot in REG_OFFSET.  */
!   poly_int64 saved_regs_size;
  
!   /* The size of the callee-save registers with a slot in REG_OFFSET that
!      are saved below the hard frame pointer.  */
!   poly_int64 below_hard_fp_saved_regs_size;
  
    /* Offset from the base of the frame (incomming SP) to the
       top of the locals area.  This value is always a multiple of
*************** struct GTY (()) aarch64_frame
*** 714,719 ****
--- 832,841 ----
       It may be non-zero if no push is used (ie. callee_adjust == 0).  */
    poly_int64 callee_offset;
  
+   /* The size of the stack adjustment before saving or after restoring
+      SVE registers.  */
+   poly_int64 sve_callee_adjust;
+ 
    /* The size of the stack adjustment after saving callee-saves.  */
    poly_int64 final_adjust;
  
*************** struct GTY (()) aarch64_frame
*** 723,728 ****
--- 845,855 ----
    unsigned wb_candidate1;
    unsigned wb_candidate2;
  
+   /* Big-endian SVE frames need a spare predicate register in order
+      to save vector registers in the correct layout for unwinding.
+      This is the register they should use.  */
+   unsigned spare_pred_reg;
+ 
    bool laid_out;
  };
  
*************** enum aarch64_abi_type
*** 751,756 ****
--- 878,887 ----
  enum arm_pcs
  {
    ARM_PCS_AAPCS64,		/* Base standard AAPCS for 64 bit.  */
+   ARM_PCS_SIMD,			/* For aarch64_vector_pcs functions.  */
+   ARM_PCS_SVE,			/* For functions that pass or return
+ 				   values in SVE registers.  */
+   ARM_PCS_TLSDESC,		/* For targets of tlsdesc calls.  */
    ARM_PCS_UNKNOWN
  };
  
*************** typedef struct
*** 777,782 ****
--- 908,915 ----
    int aapcs_nextncrn;		/* Next next core register number.  */
    int aapcs_nvrn;		/* Next Vector register number.  */
    int aapcs_nextnvrn;		/* Next Next Vector register number.  */
+   int aapcs_nprn;		/* Next Predicate register number.  */
+   int aapcs_nextnprn;		/* Next Next Predicate register number.  */
    rtx aapcs_reg;		/* Register assigned to this argument.  This
  				   is NULL_RTX if this parameter goes on
  				   the stack.  */
*************** typedef struct
*** 787,792 ****
--- 920,927 ----
  				   aapcs_reg == NULL_RTX.  */
    int aapcs_stack_size;		/* The total size (in words, per 8 byte) of the
  				   stack arg area so far.  */
+   bool silent_p;		/* True if we should act silently, rather than
+ 				   raise an error for invalid calls.  */
  } CUMULATIVE_ARGS;
  #endif
  
*************** typedef struct
*** 842,848 ****
  /* MOVE_RATIO dictates when we will use the move_by_pieces infrastructure.
     move_by_pieces will continually copy the largest safe chunks.  So a
     7-byte copy is a 4-byte + 2-byte + byte copy.  This proves inefficient
!    for both size and speed of copy, so we will instead use the "movmem"
     standard name to implement the copy.  This logic does not apply when
     targeting -mstrict-align, so keep a sensible default in that case.  */
  #define MOVE_RATIO(speed) \
--- 977,983 ----
  /* MOVE_RATIO dictates when we will use the move_by_pieces infrastructure.
     move_by_pieces will continually copy the largest safe chunks.  So a
     7-byte copy is a 4-byte + 2-byte + byte copy.  This proves inefficient
!    for both size and speed of copy, so we will instead use the "cpymem"
     standard name to implement the copy.  This logic does not apply when
     targeting -mstrict-align, so keep a sensible default in that case.  */
  #define MOVE_RATIO(speed) \
*************** typedef struct
*** 888,901 ****
     if given data not on the nominal alignment.  */
  #define STRICT_ALIGNMENT		TARGET_STRICT_ALIGN
  
! /* Define this macro to be non-zero if accessing less than a word of
!    memory is no faster than accessing a word of memory, i.e., if such
!    accesses require more than one instruction or if there is no
!    difference in cost.
!    Although there's no difference in instruction count or cycles,
!    in AArch64 we don't want to expand to a sub-word to a 64-bit access
!    if we don't have to, for power-saving reasons.  */
! #define SLOW_BYTE_ACCESS		0
  
  #define NO_FUNCTION_CSE	1
  
--- 1023,1030 ----
     if given data not on the nominal alignment.  */
  #define STRICT_ALIGNMENT		TARGET_STRICT_ALIGN
  
! /* Enable wide bitfield accesses for more efficient bitfield code.  */
! #define SLOW_BYTE_ACCESS 1
  
  #define NO_FUNCTION_CSE	1
  
*************** typedef struct
*** 915,926 ****
  
  #define SELECT_CC_MODE(OP, X, Y)	aarch64_select_cc_mode (OP, X, Y)
  
! #define REVERSIBLE_CC_MODE(MODE) 1
! 
! #define REVERSE_CONDITION(CODE, MODE)		\
!   (((MODE) == CCFPmode || (MODE) == CCFPEmode)	\
!    ? reverse_condition_maybe_unordered (CODE)	\
!    : reverse_condition (CODE))
  
  #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
    ((VALUE) = GET_MODE_UNIT_BITSIZE (MODE), 2)
--- 1044,1053 ----
  
  #define SELECT_CC_MODE(OP, X, Y)	aarch64_select_cc_mode (OP, X, Y)
  
! /* Having an integer comparison mode guarantees that we can use
!    reverse_condition, but the usual restrictions apply to floating-point
!    comparisons.  */
! #define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPmode && (MODE) != CCFPEmode)
  
  #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
    ((VALUE) = GET_MODE_UNIT_BITSIZE (MODE), 2)
*************** extern enum aarch64_code_model aarch64_c
*** 1025,1037 ****
  #define AARCH64_VALID_SIMD_DREG_MODE(MODE) \
    ((MODE) == V2SImode || (MODE) == V4HImode || (MODE) == V8QImode \
     || (MODE) == V2SFmode || (MODE) == V4HFmode || (MODE) == DImode \
!    || (MODE) == DFmode)
  
  /* Modes valid for AdvSIMD Q registers.  */
  #define AARCH64_VALID_SIMD_QREG_MODE(MODE) \
    ((MODE) == V4SImode || (MODE) == V8HImode || (MODE) == V16QImode \
     || (MODE) == V4SFmode || (MODE) == V8HFmode || (MODE) == V2DImode \
!    || (MODE) == V2DFmode)
  
  #define ENDIAN_LANE_N(NUNITS, N) \
    (BYTES_BIG_ENDIAN ? NUNITS - 1 - N : N)
--- 1152,1164 ----
  #define AARCH64_VALID_SIMD_DREG_MODE(MODE) \
    ((MODE) == V2SImode || (MODE) == V4HImode || (MODE) == V8QImode \
     || (MODE) == V2SFmode || (MODE) == V4HFmode || (MODE) == DImode \
!    || (MODE) == DFmode || (MODE) == V4BFmode)
  
  /* Modes valid for AdvSIMD Q registers.  */
  #define AARCH64_VALID_SIMD_QREG_MODE(MODE) \
    ((MODE) == V4SImode || (MODE) == V8HImode || (MODE) == V16QImode \
     || (MODE) == V4SFmode || (MODE) == V8HFmode || (MODE) == V2DImode \
!    || (MODE) == V2DFmode || (MODE) == V8BFmode)
  
  #define ENDIAN_LANE_N(NUNITS, N) \
    (BYTES_BIG_ENDIAN ? NUNITS - 1 - N : N)
*************** extern const char *host_detect_local_cpu
*** 1079,1084 ****
--- 1206,1216 ----
  extern tree aarch64_fp16_type_node;
  extern tree aarch64_fp16_ptr_type_node;
  
+ /* This type is the user-visible __bf16, and a pointer to that type.  Defined
+    in aarch64-builtins.c.  */
+ extern tree aarch64_bf16_type_node;
+ extern tree aarch64_bf16_ptr_type_node;
+ 
  /* The generic unwind code in libgcc does not initialize the frame pointer.
     So in order to unwind a function using a frame pointer, the very first
     function that is unwound must save the frame pointer.  That way the frame
*************** extern poly_uint16 aarch64_sve_vg;
*** 1094,1100 ****
  #define BITS_PER_SVE_VECTOR (poly_uint16 (aarch64_sve_vg * 64))
  #define BYTES_PER_SVE_VECTOR (poly_uint16 (aarch64_sve_vg * 8))
  
! /* The number of bytes in an SVE predicate.  */
  #define BYTES_PER_SVE_PRED aarch64_sve_vg
  
  /* The SVE mode for a vector of bytes.  */
--- 1226,1233 ----
  #define BITS_PER_SVE_VECTOR (poly_uint16 (aarch64_sve_vg * 64))
  #define BYTES_PER_SVE_VECTOR (poly_uint16 (aarch64_sve_vg * 8))
  
! /* The number of bits and bytes in an SVE predicate.  */
! #define BITS_PER_SVE_PRED BYTES_PER_SVE_VECTOR
  #define BYTES_PER_SVE_PRED aarch64_sve_vg
  
  /* The SVE mode for a vector of bytes.  */
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64.md gcc-10.1.0/gcc/config/aarch64/aarch64.md
*** gcc-9.3.0/gcc/config/aarch64/aarch64.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description for AArch64 architecture.
! ;; Copyright (C) 2009-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Machine description for AArch64 architecture.
! ;; Copyright (C) 2009-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
***************
*** 85,91 ****
      (V29_REGNUM		61)
      (V30_REGNUM		62)
      (V31_REGNUM		63)
-     (LAST_SAVED_REGNUM	63)
      (SFP_REGNUM		64)
      (AP_REGNUM		65)
      (CC_REGNUM		66)
--- 85,90 ----
***************
*** 107,112 ****
--- 106,116 ----
      (P13_REGNUM		81)
      (P14_REGNUM		82)
      (P15_REGNUM		83)
+     (LAST_SAVED_REGNUM	83)
+     (FFR_REGNUM		84)
+     ;; "FFR token": a fake register used for representing the scheduling
+     ;; restrictions on FFR-related operations.
+     (FFRT_REGNUM	85)
      ;; Scratch register used by stack clash protection to calculate
      ;; SVE CFA offsets during probing.
      (STACK_CLASH_SVE_CFA_REGNUM 11)
***************
*** 120,132 ****
      ;; Scratch registers used in frame layout.
      (IP0_REGNUM         16)
      (IP1_REGNUM         17)
      (LR_REGNUM          30)
    ]
  )
  
  (define_c_enum "unspec" [
!     UNSPEC_AUTI1716
!     UNSPEC_AUTISP
      UNSPEC_CASESI
      UNSPEC_CRC32B
      UNSPEC_CRC32CB
--- 124,140 ----
      ;; Scratch registers used in frame layout.
      (IP0_REGNUM         16)
      (IP1_REGNUM         17)
+     (FP_REGNUM		29)
      (LR_REGNUM          30)
    ]
  )
  
  (define_c_enum "unspec" [
!     UNSPEC_AUTIA1716
!     UNSPEC_AUTIB1716
!     UNSPEC_AUTIASP
!     UNSPEC_AUTIBSP
!     UNSPEC_CALLEE_ABI
      UNSPEC_CASESI
      UNSPEC_CRC32B
      UNSPEC_CRC32CB
***************
*** 138,143 ****
--- 146,156 ----
      UNSPEC_CRC32X
      UNSPEC_FCVTZS
      UNSPEC_FCVTZU
+     UNSPEC_FJCVTZS
+     UNSPEC_FRINT32Z
+     UNSPEC_FRINT32X
+     UNSPEC_FRINT64Z
+     UNSPEC_FRINT64X
      UNSPEC_URECPE
      UNSPEC_FRECPE
      UNSPEC_FRECPS
***************
*** 169,176 ****
      UNSPEC_LD4_LANE
      UNSPEC_MB
      UNSPEC_NOP
!     UNSPEC_PACI1716
!     UNSPEC_PACISP
      UNSPEC_PRLG_STK
      UNSPEC_REV
      UNSPEC_RBIT
--- 182,191 ----
      UNSPEC_LD4_LANE
      UNSPEC_MB
      UNSPEC_NOP
!     UNSPEC_PACIA1716
!     UNSPEC_PACIB1716
!     UNSPEC_PACIASP
!     UNSPEC_PACIBSP
      UNSPEC_PRLG_STK
      UNSPEC_REV
      UNSPEC_RBIT
***************
*** 211,236 ****
      UNSPEC_XPACLRI
      UNSPEC_LD1_SVE
      UNSPEC_ST1_SVE
      UNSPEC_LD1RQ
      UNSPEC_LD1_GATHER
      UNSPEC_ST1_SCATTER
!     UNSPEC_MERGE_PTRUE
!     UNSPEC_PTEST_PTRUE
      UNSPEC_UNPACKSHI
      UNSPEC_UNPACKUHI
      UNSPEC_UNPACKSLO
      UNSPEC_UNPACKULO
      UNSPEC_PACK
!     UNSPEC_FLOAT_CONVERT
!     UNSPEC_WHILE_LO
      UNSPEC_LDN
      UNSPEC_STN
      UNSPEC_INSR
      UNSPEC_CLASTB
      UNSPEC_FADDA
      UNSPEC_REV_SUBREG
      UNSPEC_SPECULATION_TRACKER
      UNSPEC_COPYSIGN
  ])
  
  (define_c_enum "unspecv" [
--- 226,286 ----
      UNSPEC_XPACLRI
      UNSPEC_LD1_SVE
      UNSPEC_ST1_SVE
+     UNSPEC_LDNT1_SVE
+     UNSPEC_STNT1_SVE
      UNSPEC_LD1RQ
      UNSPEC_LD1_GATHER
+     UNSPEC_LDFF1_GATHER
+     UNSPEC_LDNT1_GATHER
      UNSPEC_ST1_SCATTER
!     UNSPEC_STNT1_SCATTER
!     UNSPEC_PRED_X
!     UNSPEC_PRED_Z
!     UNSPEC_PTEST
!     UNSPEC_PTRUE
      UNSPEC_UNPACKSHI
      UNSPEC_UNPACKUHI
      UNSPEC_UNPACKSLO
      UNSPEC_UNPACKULO
      UNSPEC_PACK
!     UNSPEC_WHILEGE
!     UNSPEC_WHILEGT
!     UNSPEC_WHILEHI
!     UNSPEC_WHILEHS
!     UNSPEC_WHILELE
!     UNSPEC_WHILELO
!     UNSPEC_WHILELS
!     UNSPEC_WHILELT
!     UNSPEC_WHILERW
!     UNSPEC_WHILEWR
      UNSPEC_LDN
      UNSPEC_STN
      UNSPEC_INSR
+     UNSPEC_CLASTA
      UNSPEC_CLASTB
      UNSPEC_FADDA
      UNSPEC_REV_SUBREG
+     UNSPEC_REINTERPRET
      UNSPEC_SPECULATION_TRACKER
+     UNSPEC_SPECULATION_TRACKER_REV
      UNSPEC_COPYSIGN
+     UNSPEC_TTEST		; Represent transaction test.
+     UNSPEC_UPDATE_FFR
+     UNSPEC_UPDATE_FFRT
+     UNSPEC_RDFFR
+     UNSPEC_WRFFR
+     ;; Represents an SVE-style lane index, in which the indexing applies
+     ;; within the containing 128-bit block.
+     UNSPEC_SVE_LANE_SELECT
+     UNSPEC_SVE_CNT_PAT
+     UNSPEC_SVE_PREFETCH
+     UNSPEC_SVE_PREFETCH_GATHER
+     UNSPEC_SVE_COMPACT
+     UNSPEC_SVE_SPLICE
+     UNSPEC_GEN_TAG		; Generate a 4-bit MTE tag.
+     UNSPEC_GEN_TAG_RND		; Generate a random 4-bit MTE tag.
+     UNSPEC_TAG_SPACE		; Translate address to MTE tag address space.
+     UNSPEC_LD1RO
  ])
  
  (define_c_enum "unspecv" [
***************
*** 246,254 ****
--- 296,330 ----
      UNSPECV_BTI_C		; Represent BTI c.
      UNSPECV_BTI_J		; Represent BTI j.
      UNSPECV_BTI_JC		; Represent BTI jc.
+     UNSPECV_TSTART		; Represent transaction start.
+     UNSPECV_TCOMMIT		; Represent transaction commit.
+     UNSPECV_TCANCEL		; Represent transaction cancel.
+     UNSPEC_RNDR			; Represent RNDR
+     UNSPEC_RNDRRS		; Represent RNDRRS
    ]
  )
  
+ ;; These constants are used as a const_int in various SVE unspecs
+ ;; to indicate whether the governing predicate is known to be a PTRUE.
+ (define_constants
+   [; Indicates that the predicate might not be a PTRUE.
+    (SVE_MAYBE_NOT_PTRUE 0)
+ 
+    ; Indicates that the predicate is known to be a PTRUE.
+    (SVE_KNOWN_PTRUE 1)])
+ 
+ ;; These constants are used as a const_int in predicated SVE FP arithmetic
+ ;; to indicate whether the operation is allowed to make additional lanes
+ ;; active without worrying about the effect on faulting behavior.
+ (define_constants
+   [; Indicates either that all lanes are active or that the instruction may
+    ; operate on inactive inputs even if doing so could induce a fault.
+    (SVE_RELAXED_GP 0)
+ 
+    ; Indicates that some lanes might be inactive and that the instruction
+    ; must not operate on inactive inputs if doing so could induce a fault.
+    (SVE_STRICT_GP 1)])
+ 
  ;; If further include files are added the defintion of MD_INCLUDES
  ;; must be updated.
  
***************
*** 362,367 ****
--- 438,444 ----
  (include "../arm/xgene1.md")
  (include "thunderx2t99.md")
  (include "tsv110.md")
+ (include "thunderx3t110.md")
  
  ;; -------------------------------------------------------------------
  ;; Jumps and other miscellaneous insns
***************
*** 383,390 ****
  
  (define_expand "cbranch<mode>4"
    [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
! 			    [(match_operand:GPI 1 "register_operand" "")
! 			     (match_operand:GPI 2 "aarch64_plus_operand" "")])
  			   (label_ref (match_operand 3 "" ""))
  			   (pc)))]
    ""
--- 460,467 ----
  
  (define_expand "cbranch<mode>4"
    [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
! 			    [(match_operand:GPI 1 "register_operand")
! 			     (match_operand:GPI 2 "aarch64_plus_operand")])
  			   (label_ref (match_operand 3 "" ""))
  			   (pc)))]
    ""
***************
*** 397,404 ****
  
  (define_expand "cbranch<mode>4"
    [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
! 			    [(match_operand:GPF 1 "register_operand" "")
! 			     (match_operand:GPF 2 "aarch64_fp_compare_operand" "")])
  			   (label_ref (match_operand 3 "" ""))
  			   (pc)))]
    ""
--- 474,481 ----
  
  (define_expand "cbranch<mode>4"
    [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
! 			    [(match_operand:GPF 1 "register_operand")
! 			     (match_operand:GPF 2 "aarch64_fp_compare_operand")])
  			   (label_ref (match_operand 3 "" ""))
  			   (pc)))]
    ""
***************
*** 412,434 ****
  (define_expand "cbranchcc4"
    [(set (pc) (if_then_else
  	      (match_operator 0 "aarch64_comparison_operator"
! 	       [(match_operand 1 "cc_register" "")
  	        (match_operand 2 "const0_operand")])
  	      (label_ref (match_operand 3 "" ""))
  	      (pc)))]
    ""
    "")
  
! (define_insn "ccmp<mode>"
!   [(set (match_operand:CC 1 "cc_register" "")
! 	(if_then_else:CC
  	  (match_operator 4 "aarch64_comparison_operator"
  	   [(match_operand 0 "cc_register" "")
  	    (const_int 0)])
! 	  (compare:CC
  	    (match_operand:GPI 2 "register_operand" "r,r,r")
  	    (match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn"))
! 	  (unspec:CC [(match_operand 5 "immediate_operand")] UNSPEC_NZCV)))]
    ""
    "@
     ccmp\\t%<w>2, %<w>3, %k5, %m4
--- 489,513 ----
  (define_expand "cbranchcc4"
    [(set (pc) (if_then_else
  	      (match_operator 0 "aarch64_comparison_operator"
! 	       [(match_operand 1 "cc_register")
  	        (match_operand 2 "const0_operand")])
  	      (label_ref (match_operand 3 "" ""))
  	      (pc)))]
    ""
    "")
  
! (define_insn "@ccmp<CC_ONLY:mode><GPI:mode>"
!   [(set (match_operand:CC_ONLY 1 "cc_register" "")
! 	(if_then_else:CC_ONLY
  	  (match_operator 4 "aarch64_comparison_operator"
  	   [(match_operand 0 "cc_register" "")
  	    (const_int 0)])
! 	  (compare:CC_ONLY
  	    (match_operand:GPI 2 "register_operand" "r,r,r")
  	    (match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn"))
! 	  (unspec:CC_ONLY
! 	    [(match_operand 5 "immediate_operand")]
! 	    UNSPEC_NZCV)))]
    ""
    "@
     ccmp\\t%<w>2, %<w>3, %k5, %m4
***************
*** 437,469 ****
    [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
  )
  
! (define_insn "fccmp<mode>"
!   [(set (match_operand:CCFP 1 "cc_register" "")
! 	(if_then_else:CCFP
  	  (match_operator 4 "aarch64_comparison_operator"
  	   [(match_operand 0 "cc_register" "")
  	    (const_int 0)])
! 	  (compare:CCFP
  	    (match_operand:GPF 2 "register_operand" "w")
  	    (match_operand:GPF 3 "register_operand" "w"))
! 	  (unspec:CCFP [(match_operand 5 "immediate_operand")] UNSPEC_NZCV)))]
    "TARGET_FLOAT"
!   "fccmp\\t%<s>2, %<s>3, %k5, %m4"
    [(set_attr "type" "fccmp<s>")]
  )
  
! (define_insn "fccmpe<mode>"
!   [(set (match_operand:CCFPE 1 "cc_register" "")
! 	 (if_then_else:CCFPE
  	  (match_operator 4 "aarch64_comparison_operator"
  	   [(match_operand 0 "cc_register" "")
! 	  (const_int 0)])
! 	   (compare:CCFPE
  	    (match_operand:GPF 2 "register_operand" "w")
! 	    (match_operand:GPF 3 "register_operand" "w"))
! 	  (unspec:CCFPE [(match_operand 5 "immediate_operand")] UNSPEC_NZCV)))]
    "TARGET_FLOAT"
!   "fccmpe\\t%<s>2, %<s>3, %k5, %m4"
    [(set_attr "type" "fccmp<s>")]
  )
  
--- 516,572 ----
    [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
  )
  
! (define_insn "@ccmp<CCFP_CCFPE:mode><GPF:mode>"
!   [(set (match_operand:CCFP_CCFPE 1 "cc_register" "")
! 	(if_then_else:CCFP_CCFPE
  	  (match_operator 4 "aarch64_comparison_operator"
  	   [(match_operand 0 "cc_register" "")
  	    (const_int 0)])
! 	  (compare:CCFP_CCFPE
  	    (match_operand:GPF 2 "register_operand" "w")
  	    (match_operand:GPF 3 "register_operand" "w"))
! 	  (unspec:CCFP_CCFPE
! 	    [(match_operand 5 "immediate_operand")]
! 	    UNSPEC_NZCV)))]
    "TARGET_FLOAT"
!   "fccmp<e>\\t%<s>2, %<s>3, %k5, %m4"
    [(set_attr "type" "fccmp<s>")]
  )
  
! (define_insn "@ccmp<CC_ONLY:mode><GPI:mode>_rev"
!   [(set (match_operand:CC_ONLY 1 "cc_register" "")
! 	(if_then_else:CC_ONLY
  	  (match_operator 4 "aarch64_comparison_operator"
  	   [(match_operand 0 "cc_register" "")
! 	    (const_int 0)])
! 	  (unspec:CC_ONLY
! 	    [(match_operand 5 "immediate_operand")]
! 	    UNSPEC_NZCV)
! 	  (compare:CC_ONLY
! 	    (match_operand:GPI 2 "register_operand" "r,r,r")
! 	    (match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn"))))]
!   ""
!   "@
!    ccmp\\t%<w>2, %<w>3, %k5, %M4
!    ccmp\\t%<w>2, %3, %k5, %M4
!    ccmn\\t%<w>2, #%n3, %k5, %M4"
!   [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
! )
! 
! (define_insn "@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev"
!   [(set (match_operand:CCFP_CCFPE 1 "cc_register" "")
! 	(if_then_else:CCFP_CCFPE
! 	  (match_operator 4 "aarch64_comparison_operator"
! 	   [(match_operand 0 "cc_register" "")
! 	    (const_int 0)])
! 	  (unspec:CCFP_CCFPE
! 	    [(match_operand 5 "immediate_operand")]
! 	    UNSPEC_NZCV)
! 	  (compare:CCFP_CCFPE
  	    (match_operand:GPF 2 "register_operand" "w")
! 	    (match_operand:GPF 3 "register_operand" "w"))))]
    "TARGET_FLOAT"
!   "fccmp<e>\\t%<s>2, %<s>3, %k5, %M4"
    [(set_attr "type" "fccmp<s>")]
  )
  
***************
*** 475,483 ****
  ;; csneg  x0, x0, x1, mi
  
  (define_expand "mod<mode>3"
!   [(match_operand:GPI 0 "register_operand" "")
!    (match_operand:GPI 1 "register_operand" "")
!    (match_operand:GPI 2 "const_int_operand" "")]
    ""
    {
      HOST_WIDE_INT val = INTVAL (operands[2]);
--- 578,586 ----
  ;; csneg  x0, x0, x1, mi
  
  (define_expand "mod<mode>3"
!   [(match_operand:GPI 0 "register_operand")
!    (match_operand:GPI 1 "register_operand")
!    (match_operand:GPI 2 "const_int_operand")]
    ""
    {
      HOST_WIDE_INT val = INTVAL (operands[2]);
***************
*** 530,539 ****
  			   (pc)))]
    ""
    {
      if (get_attr_length (insn) == 8)
!       return aarch64_gen_far_branch (operands, 2, "Lbcond", "b%M0\\t");
      else
!       return  "b%m0\\t%l2";
    }
    [(set_attr "type" "branch")
     (set (attr "length")
--- 633,646 ----
  			   (pc)))]
    ""
    {
+     /* GCC's traditional style has been to use "beq" instead of "b.eq", etc.,
+        but the "." is required for SVE conditions.  */
+     bool use_dot_p = GET_MODE (operands[1]) == CC_NZCmode;
      if (get_attr_length (insn) == 8)
!       return aarch64_gen_far_branch (operands, 2, "Lbcond",
! 				     use_dot_p ? "b.%M0\\t" : "b%M0\\t");
      else
!       return use_dot_p ? "b.%m0\\t%l2" : "b%m0\\t%l2";
    }
    [(set_attr "type" "branch")
     (set (attr "length")
***************
*** 558,571 ****
  ;; 	sub	x0, x1, #(CST & 0xfff000)
  ;; 	subs	x0, x0, #(CST & 0x000fff)
  ;; 	b<ne,eq> .Label
! (define_insn_and_split "*compare_condjump<mode>"
    [(set (pc) (if_then_else (EQL
  			      (match_operand:GPI 0 "register_operand" "r")
  			      (match_operand:GPI 1 "aarch64_imm24" "n"))
  			   (label_ref:P (match_operand 2 "" ""))
  			   (pc)))]
!   "!aarch64_move_imm (INTVAL (operands[1]), <MODE>mode)
!    && !aarch64_plus_operand (operands[1], <MODE>mode)
     && !reload_completed"
    "#"
    "&& true"
--- 665,678 ----
  ;; 	sub	x0, x1, #(CST & 0xfff000)
  ;; 	subs	x0, x0, #(CST & 0x000fff)
  ;; 	b<ne,eq> .Label
! (define_insn_and_split "*compare_condjump<GPI:mode>"
    [(set (pc) (if_then_else (EQL
  			      (match_operand:GPI 0 "register_operand" "r")
  			      (match_operand:GPI 1 "aarch64_imm24" "n"))
  			   (label_ref:P (match_operand 2 "" ""))
  			   (pc)))]
!   "!aarch64_move_imm (INTVAL (operands[1]), <GPI:MODE>mode)
!    && !aarch64_plus_operand (operands[1], <GPI:MODE>mode)
     && !reload_completed"
    "#"
    "&& true"
***************
*** 573,592 ****
    {
      HOST_WIDE_INT lo_imm = UINTVAL (operands[1]) & 0xfff;
      HOST_WIDE_INT hi_imm = UINTVAL (operands[1]) & 0xfff000;
!     rtx tmp = gen_reg_rtx (<MODE>mode);
!     emit_insn (gen_add<mode>3 (tmp, operands[0], GEN_INT (-hi_imm)));
!     emit_insn (gen_add<mode>3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
      rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
!     rtx cmp_rtx = gen_rtx_fmt_ee (<EQL:CMP>, <MODE>mode, cc_reg, const0_rtx);
      emit_jump_insn (gen_condjump (cmp_rtx, cc_reg, operands[2]));
      DONE;
    }
  )
  
  (define_expand "casesi"
!   [(match_operand:SI 0 "register_operand" "")	; Index
!    (match_operand:SI 1 "const_int_operand" "")	; Lower bound
!    (match_operand:SI 2 "const_int_operand" "")	; Total range
     (match_operand:DI 3 "" "")			; Table label
     (match_operand:DI 4 "" "")]			; Out of range label
    ""
--- 680,700 ----
    {
      HOST_WIDE_INT lo_imm = UINTVAL (operands[1]) & 0xfff;
      HOST_WIDE_INT hi_imm = UINTVAL (operands[1]) & 0xfff000;
!     rtx tmp = gen_reg_rtx (<GPI:MODE>mode);
!     emit_insn (gen_add<GPI:mode>3 (tmp, operands[0], GEN_INT (-hi_imm)));
!     emit_insn (gen_add<GPI:mode>3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
      rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
!     rtx cmp_rtx = gen_rtx_fmt_ee (<EQL:CMP>, <GPI:MODE>mode,
! 				  cc_reg, const0_rtx);
      emit_jump_insn (gen_condjump (cmp_rtx, cc_reg, operands[2]));
      DONE;
    }
  )
  
  (define_expand "casesi"
!   [(match_operand:SI 0 "register_operand")	; Index
!    (match_operand:SI 1 "const_int_operand")	; Lower bound
!    (match_operand:SI 2 "const_int_operand")	; Total range
     (match_operand:DI 3 "" "")			; Table label
     (match_operand:DI 4 "" "")]			; Out of range label
    ""
***************
*** 739,746 ****
      if (aarch64_return_address_signing_enabled ()
  	&& TARGET_ARMV8_3
  	&& !crtl->calls_eh_return)
!       return "retaa";
! 
      return "ret";
    }
    [(set_attr "type" "branch")]
--- 847,858 ----
      if (aarch64_return_address_signing_enabled ()
  	&& TARGET_ARMV8_3
  	&& !crtl->calls_eh_return)
!       {
! 	if (aarch64_ra_sign_key == AARCH64_KEY_B)
! 	  return "retab";
! 	else
! 	  return "retaa";
!       }
      return "ret";
    }
    [(set_attr "type" "branch")]
***************
*** 754,760 ****
  
  (define_insn "simple_return"
    [(simple_return)]
!   "aarch64_use_simple_return_insn_p ()"
    "ret"
    [(set_attr "type" "branch")]
  )
--- 866,872 ----
  
  (define_insn "simple_return"
    [(simple_return)]
!   ""
    "ret"
    [(set_attr "type" "branch")]
  )
***************
*** 868,881 ****
  ;; -------------------------------------------------------------------
  
  (define_expand "call"
!   [(parallel [(call (match_operand 0 "memory_operand" "")
! 		    (match_operand 1 "general_operand" ""))
! 	      (use (match_operand 2 "" ""))
! 	      (clobber (reg:DI LR_REGNUM))])]
    ""
    "
    {
!     aarch64_expand_call (NULL_RTX, operands[0], false);
      DONE;
    }"
  )
--- 980,994 ----
  ;; -------------------------------------------------------------------
  
  (define_expand "call"
!   [(parallel
!      [(call (match_operand 0 "memory_operand")
! 	    (match_operand 1 "general_operand"))
!       (unspec:DI [(match_operand 2 "const_int_operand")] UNSPEC_CALLEE_ABI)
!       (clobber (reg:DI LR_REGNUM))])]
    ""
    "
    {
!     aarch64_expand_call (NULL_RTX, operands[0], operands[2], false);
      DONE;
    }"
  )
***************
*** 883,888 ****
--- 996,1002 ----
  (define_insn "*call_insn"
    [(call (mem:DI (match_operand:DI 0 "aarch64_call_insn_operand" "r, Usf"))
  	 (match_operand 1 "" ""))
+    (unspec:DI [(match_operand:DI 2 "const_int_operand")] UNSPEC_CALLEE_ABI)
     (clobber (reg:DI LR_REGNUM))]
    ""
    "@
***************
*** 892,906 ****
  )
  
  (define_expand "call_value"
!   [(parallel [(set (match_operand 0 "" "")
! 		   (call (match_operand 1 "memory_operand" "")
! 			 (match_operand 2 "general_operand" "")))
! 	      (use (match_operand 3 "" ""))
! 	      (clobber (reg:DI LR_REGNUM))])]
    ""
    "
    {
!     aarch64_expand_call (operands[0], operands[1], false);
      DONE;
    }"
  )
--- 1006,1021 ----
  )
  
  (define_expand "call_value"
!   [(parallel
!      [(set (match_operand 0 "")
! 	   (call (match_operand 1 "memory_operand")
! 		 (match_operand 2 "general_operand")))
!      (unspec:DI [(match_operand 3 "const_int_operand")] UNSPEC_CALLEE_ABI)
!      (clobber (reg:DI LR_REGNUM))])]
    ""
    "
    {
!     aarch64_expand_call (operands[0], operands[1], operands[3], false);
      DONE;
    }"
  )
***************
*** 909,914 ****
--- 1024,1030 ----
    [(set (match_operand 0 "" "")
  	(call (mem:DI (match_operand:DI 1 "aarch64_call_insn_operand" "r, Usf"))
  		      (match_operand 2 "" "")))
+    (unspec:DI [(match_operand:DI 3 "const_int_operand")] UNSPEC_CALLEE_ABI)
     (clobber (reg:DI LR_REGNUM))]
    ""
    "@
***************
*** 918,950 ****
  )
  
  (define_expand "sibcall"
!   [(parallel [(call (match_operand 0 "memory_operand" "")
! 		    (match_operand 1 "general_operand" ""))
! 	      (return)
! 	      (use (match_operand 2 "" ""))])]
    ""
    {
!     aarch64_expand_call (NULL_RTX, operands[0], true);
      DONE;
    }
  )
  
  (define_expand "sibcall_value"
!   [(parallel [(set (match_operand 0 "" "")
! 		   (call (match_operand 1 "memory_operand" "")
! 			 (match_operand 2 "general_operand" "")))
! 	      (return)
! 	      (use (match_operand 3 "" ""))])]
    ""
    {
!     aarch64_expand_call (operands[0], operands[1], true);
      DONE;
    }
  )
  
  (define_insn "*sibcall_insn"
    [(call (mem:DI (match_operand:DI 0 "aarch64_call_insn_operand" "Ucs, Usf"))
! 	 (match_operand 1 "" ""))
     (return)]
    "SIBLING_CALL_P (insn)"
    "@
--- 1034,1069 ----
  )
  
  (define_expand "sibcall"
!   [(parallel
!      [(call (match_operand 0 "memory_operand")
! 	    (match_operand 1 "general_operand"))
!       (unspec:DI [(match_operand 2 "const_int_operand")] UNSPEC_CALLEE_ABI)
!       (return)])]
    ""
    {
!     aarch64_expand_call (NULL_RTX, operands[0], operands[2], true);
      DONE;
    }
  )
  
  (define_expand "sibcall_value"
!   [(parallel
!      [(set (match_operand 0 "")
! 	   (call (match_operand 1 "memory_operand")
! 		 (match_operand 2 "general_operand")))
!       (unspec:DI [(match_operand 3 "const_int_operand")] UNSPEC_CALLEE_ABI)
!       (return)])]
    ""
    {
!     aarch64_expand_call (operands[0], operands[1], operands[3], true);
      DONE;
    }
  )
  
  (define_insn "*sibcall_insn"
    [(call (mem:DI (match_operand:DI 0 "aarch64_call_insn_operand" "Ucs, Usf"))
! 	 (match_operand 1 ""))
!    (unspec:DI [(match_operand:DI 2 "const_int_operand")] UNSPEC_CALLEE_ABI)
     (return)]
    "SIBLING_CALL_P (insn)"
    "@
***************
*** 954,963 ****
  )
  
  (define_insn "*sibcall_value_insn"
!   [(set (match_operand 0 "" "")
  	(call (mem:DI
  		(match_operand:DI 1 "aarch64_call_insn_operand" "Ucs, Usf"))
! 	      (match_operand 2 "" "")))
     (return)]
    "SIBLING_CALL_P (insn)"
    "@
--- 1073,1083 ----
  )
  
  (define_insn "*sibcall_value_insn"
!   [(set (match_operand 0 "")
  	(call (mem:DI
  		(match_operand:DI 1 "aarch64_call_insn_operand" "Ucs, Usf"))
! 	      (match_operand 2 "")))
!    (unspec:DI [(match_operand:DI 3 "const_int_operand")] UNSPEC_CALLEE_ABI)
     (return)]
    "SIBLING_CALL_P (insn)"
    "@
***************
*** 977,983 ****
  {
    int i;
  
!   emit_call_insn (gen_call (operands[0], const0_rtx, NULL));
  
    for (i = 0; i < XVECLEN (operands[2], 0); i++)
      {
--- 1097,1105 ----
  {
    int i;
  
!   /* Untyped calls always use the default ABI.  It's only possible to use
!      ABI variants if we know the type of the target function.  */
!   emit_call_insn (gen_call (operands[0], const0_rtx, const0_rtx));
  
    for (i = 0; i < XVECLEN (operands[2], 0); i++)
      {
***************
*** 998,1005 ****
  ;; -------------------------------------------------------------------
  
  (define_expand "mov<mode>"
!   [(set (match_operand:SHORT 0 "nonimmediate_operand" "")
! 	(match_operand:SHORT 1 "general_operand" ""))]
    ""
    "
      if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx)
--- 1120,1127 ----
  ;; -------------------------------------------------------------------
  
  (define_expand "mov<mode>"
!   [(set (match_operand:SHORT 0 "nonimmediate_operand")
! 	(match_operand:SHORT 1 "general_operand"))]
    ""
    "
      if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx)
***************
*** 1055,1062 ****
  )
  
  (define_expand "mov<mode>"
!   [(set (match_operand:GPI 0 "nonimmediate_operand" "")
! 	(match_operand:GPI 1 "general_operand" ""))]
    ""
    "
      if (MEM_P (operands[0]) && !MEM_VOLATILE_P (operands[0])
--- 1177,1184 ----
  )
  
  (define_expand "mov<mode>"
!   [(set (match_operand:GPI 0 "nonimmediate_operand")
! 	(match_operand:GPI 1 "general_operand"))]
    ""
    "
      if (MEM_P (operands[0]) && !MEM_VOLATILE_P (operands[0])
***************
*** 1161,1169 ****
    [(set_attr "type" "mov_imm")]
  )
  
  (define_expand "movti"
!   [(set (match_operand:TI 0 "nonimmediate_operand" "")
! 	(match_operand:TI 1 "general_operand" ""))]
    ""
    "
      if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx)
--- 1283,1309 ----
    [(set_attr "type" "mov_imm")]
  )
  
+ ;; Match MOVK as a normal AND and IOR operation.
+ (define_insn "aarch64_movk<mode>"
+   [(set (match_operand:GPI 0 "register_operand" "=r")
+ 	(ior:GPI (and:GPI (match_operand:GPI 1 "register_operand" "0")
+ 			  (match_operand:GPI 2 "const_int_operand"))
+ 		 (match_operand:GPI 3 "const_int_operand")))]
+   "aarch64_movk_shift (rtx_mode_t (operands[2], <MODE>mode),
+ 		       rtx_mode_t (operands[3], <MODE>mode)) >= 0"
+   {
+     int shift = aarch64_movk_shift (rtx_mode_t (operands[2], <MODE>mode),
+ 				    rtx_mode_t (operands[3], <MODE>mode));
+     operands[2] = gen_int_mode (UINTVAL (operands[3]) >> shift, SImode);
+     operands[3] = gen_int_mode (shift, SImode);
+     return "movk\\t%<w>0, #%X2, lsl %3";
+   }
+   [(set_attr "type" "mov_imm")]
+ )
+ 
  (define_expand "movti"
!   [(set (match_operand:TI 0 "nonimmediate_operand")
! 	(match_operand:TI 1 "general_operand"))]
    ""
    "
      if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx)
***************
*** 1217,1224 ****
  })
  
  (define_expand "mov<mode>"
!   [(set (match_operand:GPF_TF_F16 0 "nonimmediate_operand" "")
! 	(match_operand:GPF_TF_F16 1 "general_operand" ""))]
    ""
    {
      if (!TARGET_FLOAT)
--- 1357,1364 ----
  })
  
  (define_expand "mov<mode>"
!   [(set (match_operand:GPF_TF_F16_MOV 0 "nonimmediate_operand")
! 	(match_operand:GPF_TF_F16_MOV 1 "general_operand"))]
    ""
    {
      if (!TARGET_FLOAT)
***************
*** 1234,1244 ****
    }
  )
  
! (define_insn "*movhf_aarch64"
!   [(set (match_operand:HF 0 "nonimmediate_operand" "=w,w  , w,?r,w,w  ,w  ,w,m,r,m ,r")
! 	(match_operand:HF 1 "general_operand"      "Y ,?rY,?r, w,w,Ufc,Uvi,m,w,m,rY,r"))]
!   "TARGET_FLOAT && (register_operand (operands[0], HFmode)
!     || aarch64_reg_or_fp_zero (operands[1], HFmode))"
    "@
     movi\\t%0.4h, #0
     fmov\\t%h0, %w1
--- 1374,1384 ----
    }
  )
  
! (define_insn "*mov<mode>_aarch64"
!   [(set (match_operand:HFBF 0 "nonimmediate_operand" "=w,w  , w,?r,w,w  ,w  ,w,m,r,m ,r")
! 	(match_operand:HFBF 1 "general_operand"      "Y ,?rY,?r, w,w,Ufc,Uvi,m,w,m,rY,r"))]
!   "TARGET_FLOAT && (register_operand (operands[0], <MODE>mode)
!     || aarch64_reg_or_fp_zero (operands[1], <MODE>mode))"
    "@
     movi\\t%0.4h, #0
     fmov\\t%h0, %w1
***************
*** 1363,1379 ****
  
  ;; 0 is dst
  ;; 1 is src
! ;; 2 is size of move in bytes
  ;; 3 is alignment
  
! (define_expand "movmemdi"
    [(match_operand:BLK 0 "memory_operand")
     (match_operand:BLK 1 "memory_operand")
     (match_operand:DI 2 "immediate_operand")
     (match_operand:DI 3 "immediate_operand")]
     "!STRICT_ALIGNMENT"
  {
!   if (aarch64_expand_movmem (operands))
      DONE;
    FAIL;
  }
--- 1503,1519 ----
  
  ;; 0 is dst
  ;; 1 is src
! ;; 2 is size of copy in bytes
  ;; 3 is alignment
  
! (define_expand "cpymemdi"
    [(match_operand:BLK 0 "memory_operand")
     (match_operand:BLK 1 "memory_operand")
     (match_operand:DI 2 "immediate_operand")
     (match_operand:DI 3 "immediate_operand")]
     "!STRICT_ALIGNMENT"
  {
!   if (aarch64_expand_cpymem (operands))
      DONE;
    FAIL;
  }
***************
*** 1492,1499 ****
            (mem:GPI (plus:P (match_dup 1)
                     (match_operand:P 5 "const_int_operand" "n"))))])]
    "INTVAL (operands[5]) == GET_MODE_SIZE (<GPI:MODE>mode)"
!   "ldp\\t%<w>2, %<w>3, [%1], %4"
!   [(set_attr "type" "load_<ldpstp_sz>")]
  )
  
  (define_insn "loadwb_pair<GPF:mode>_<P:mode>"
--- 1632,1639 ----
            (mem:GPI (plus:P (match_dup 1)
                     (match_operand:P 5 "const_int_operand" "n"))))])]
    "INTVAL (operands[5]) == GET_MODE_SIZE (<GPI:MODE>mode)"
!   "ldp\\t%<GPI:w>2, %<GPI:w>3, [%1], %4"
!   [(set_attr "type" "load_<GPI:ldpstp_sz>")]
  )
  
  (define_insn "loadwb_pair<GPF:mode>_<P:mode>"
***************
*** 1507,1513 ****
            (mem:GPF (plus:P (match_dup 1)
                     (match_operand:P 5 "const_int_operand" "n"))))])]
    "INTVAL (operands[5]) == GET_MODE_SIZE (<GPF:MODE>mode)"
!   "ldp\\t%<w>2, %<w>3, [%1], %4"
    [(set_attr "type" "neon_load1_2reg")]
  )
  
--- 1647,1653 ----
            (mem:GPF (plus:P (match_dup 1)
                     (match_operand:P 5 "const_int_operand" "n"))))])]
    "INTVAL (operands[5]) == GET_MODE_SIZE (<GPF:MODE>mode)"
!   "ldp\\t%<GPF:w>2, %<GPF:w>3, [%1], %4"
    [(set_attr "type" "neon_load1_2reg")]
  )
  
***************
*** 1540,1547 ****
                     (match_operand:P 5 "const_int_operand" "n")))
            (match_operand:GPI 3 "register_operand" "r"))])]
    "INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (<GPI:MODE>mode)"
!   "stp\\t%<w>2, %<w>3, [%0, %4]!"
!   [(set_attr "type" "store_<ldpstp_sz>")]
  )
  
  (define_insn "storewb_pair<GPF:mode>_<P:mode>"
--- 1680,1687 ----
                     (match_operand:P 5 "const_int_operand" "n")))
            (match_operand:GPI 3 "register_operand" "r"))])]
    "INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (<GPI:MODE>mode)"
!   "stp\\t%<GPI:w>2, %<GPI:w>3, [%0, %4]!"
!   [(set_attr "type" "store_<GPI:ldpstp_sz>")]
  )
  
  (define_insn "storewb_pair<GPF:mode>_<P:mode>"
***************
*** 1556,1562 ****
                     (match_operand:P 5 "const_int_operand" "n")))
            (match_operand:GPF 3 "register_operand" "w"))])]
    "INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (<GPF:MODE>mode)"
!   "stp\\t%<w>2, %<w>3, [%0, %4]!"
    [(set_attr "type" "neon_store1_2reg<q>")]
  )
  
--- 1696,1702 ----
                     (match_operand:P 5 "const_int_operand" "n")))
            (match_operand:GPF 3 "register_operand" "w"))])]
    "INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (<GPF:MODE>mode)"
!   "stp\\t%<GPF:w>2, %<GPF:w>3, [%0, %4]!"
    [(set_attr "type" "neon_store1_2reg<q>")]
  )
  
***************
*** 1702,1710 ****
  
  (define_expand "add<mode>3"
    [(set
!     (match_operand:GPI 0 "register_operand" "")
!     (plus:GPI (match_operand:GPI 1 "register_operand" "")
! 	      (match_operand:GPI 2 "aarch64_pluslong_or_poly_operand" "")))]
    ""
  {
    /* If operands[1] is a subreg extract the inner RTX.  */
--- 1842,1850 ----
  
  (define_expand "add<mode>3"
    [(set
!     (match_operand:GPI 0 "register_operand")
!     (plus:GPI (match_operand:GPI 1 "register_operand")
! 	      (match_operand:GPI 2 "aarch64_pluslong_or_poly_operand")))]
    ""
  {
    /* If operands[1] is a subreg extract the inner RTX.  */
***************
*** 1713,1718 ****
--- 1853,1859 ----
    /* If the constant is too large for a single instruction and isn't frame
       based, split off the immediate so it is available for CSE.  */
    if (!aarch64_plus_immediate (operands[2], <MODE>mode)
+       && !(TARGET_SVE && aarch64_sve_plus_immediate (operands[2], <MODE>mode))
        && can_create_pseudo_p ()
        && (!REG_P (op1)
  	 || !REGNO_PTR_FRAME_P (REGNO (op1))))
***************
*** 1730,1739 ****
  
  (define_insn "*add<mode>3_aarch64"
    [(set
!     (match_operand:GPI 0 "register_operand" "=rk,rk,w,rk,r,rk")
      (plus:GPI
!      (match_operand:GPI 1 "register_operand" "%rk,rk,w,rk,rk,rk")
!      (match_operand:GPI 2 "aarch64_pluslong_operand" "I,r,w,J,Uaa,Uav")))]
    ""
    "@
    add\\t%<w>0, %<w>1, %2
--- 1871,1880 ----
  
  (define_insn "*add<mode>3_aarch64"
    [(set
!     (match_operand:GPI 0 "register_operand" "=rk,rk,w,rk,r,r,rk")
      (plus:GPI
!      (match_operand:GPI 1 "register_operand" "%rk,rk,w,rk,rk,0,rk")
!      (match_operand:GPI 2 "aarch64_pluslong_operand" "I,r,w,J,Uaa,Uai,Uav")))]
    ""
    "@
    add\\t%<w>0, %<w>1, %2
***************
*** 1741,1750 ****
    add\\t%<rtn>0<vas>, %<rtn>1<vas>, %<rtn>2<vas>
    sub\\t%<w>0, %<w>1, #%n2
    #
!   * return aarch64_output_sve_addvl_addpl (operands[0], operands[1], operands[2]);"
!   ;; The "alu_imm" type for ADDVL/ADDPL is just a placeholder.
!   [(set_attr "type" "alu_imm,alu_sreg,neon_add,alu_imm,multiple,alu_imm")
!    (set_attr "arch" "*,*,simd,*,*,*")]
  )
  
  ;; zero_extend version of above
--- 1882,1892 ----
    add\\t%<rtn>0<vas>, %<rtn>1<vas>, %<rtn>2<vas>
    sub\\t%<w>0, %<w>1, #%n2
    #
!   * return aarch64_output_sve_scalar_inc_dec (operands[2]);
!   * return aarch64_output_sve_addvl_addpl (operands[2]);"
!   ;; The "alu_imm" types for INC/DEC and ADDVL/ADDPL are just placeholders.
!   [(set_attr "type" "alu_imm,alu_sreg,neon_add,alu_imm,multiple,alu_imm,alu_imm")
!    (set_attr "arch" "*,*,simd,*,*,sve,sve")]
  )
  
  ;; zero_extend version of above
***************
*** 1823,1839 ****
  ;; this pattern.
  (define_insn_and_split "*add<mode>3_poly_1"
    [(set
!     (match_operand:GPI 0 "register_operand" "=r,r,r,r,r,&r")
      (plus:GPI
!      (match_operand:GPI 1 "register_operand" "%rk,rk,rk,rk,rk,rk")
!      (match_operand:GPI 2 "aarch64_pluslong_or_poly_operand" "I,r,J,Uaa,Uav,Uat")))]
    "TARGET_SVE && operands[0] != stack_pointer_rtx"
    "@
    add\\t%<w>0, %<w>1, %2
    add\\t%<w>0, %<w>1, %<w>2
    sub\\t%<w>0, %<w>1, #%n2
    #
!   * return aarch64_output_sve_addvl_addpl (operands[0], operands[1], operands[2]);
    #"
    "&& epilogue_completed
     && !reg_overlap_mentioned_p (operands[0], operands[1])
--- 1965,1982 ----
  ;; this pattern.
  (define_insn_and_split "*add<mode>3_poly_1"
    [(set
!     (match_operand:GPI 0 "register_operand" "=r,r,r,r,r,r,&r")
      (plus:GPI
!      (match_operand:GPI 1 "register_operand" "%rk,rk,rk,rk,rk,0,rk")
!      (match_operand:GPI 2 "aarch64_pluslong_or_poly_operand" "I,r,J,Uaa,Uav,Uai,Uat")))]
    "TARGET_SVE && operands[0] != stack_pointer_rtx"
    "@
    add\\t%<w>0, %<w>1, %2
    add\\t%<w>0, %<w>1, %<w>2
    sub\\t%<w>0, %<w>1, #%n2
    #
!   * return aarch64_output_sve_scalar_inc_dec (operands[2]);
!   * return aarch64_output_sve_addvl_addpl (operands[2]);
    #"
    "&& epilogue_completed
     && !reg_overlap_mentioned_p (operands[0], operands[1])
***************
*** 1844,1851 ****
  			      operands[2], operands[0], NULL_RTX);
      DONE;
    }
!   ;; The "alu_imm" type for ADDVL/ADDPL is just a placeholder.
!   [(set_attr "type" "alu_imm,alu_sreg,alu_imm,multiple,alu_imm,multiple")]
  )
  
  (define_split
--- 1987,1994 ----
  			      operands[2], operands[0], NULL_RTX);
      DONE;
    }
!   ;; The "alu_imm" types for INC/DEC and ADDVL/ADDPL are just placeholders.
!   [(set_attr "type" "alu_imm,alu_sreg,alu_imm,multiple,alu_imm,alu_imm,multiple")]
  )
  
  (define_split
***************
*** 1897,1905 ****
  })
  
  (define_expand "addti3"
!   [(set (match_operand:TI 0 "register_operand" "")
! 	(plus:TI (match_operand:TI 1 "register_operand" "")
! 		 (match_operand:TI 2 "aarch64_reg_or_imm" "")))]
    ""
  {
    rtx low_dest, op1_low, op2_low, high_dest, op1_high, op2_high;
--- 2040,2048 ----
  })
  
  (define_expand "addti3"
!   [(set (match_operand:TI 0 "register_operand")
! 	(plus:TI (match_operand:TI 1 "register_operand")
! 		 (match_operand:TI 2 "aarch64_reg_or_imm")))]
    ""
  {
    rtx low_dest, op1_low, op2_low, high_dest, op1_high, op2_high;
***************
*** 1930,1938 ****
  })
  
  (define_expand "addvti4"
!   [(match_operand:TI 0 "register_operand" "")
!    (match_operand:TI 1 "register_operand" "")
!    (match_operand:TI 2 "aarch64_reg_or_imm" "")
     (label_ref (match_operand 3 "" ""))]
    ""
  {
--- 2073,2081 ----
  })
  
  (define_expand "addvti4"
!   [(match_operand:TI 0 "register_operand")
!    (match_operand:TI 1 "register_operand")
!    (match_operand:TI 2 "aarch64_reg_or_imm")
     (label_ref (match_operand 3 "" ""))]
    ""
  {
***************
*** 1964,1972 ****
  })
  
  (define_expand "uaddvti4"
!   [(match_operand:TI 0 "register_operand" "")
!    (match_operand:TI 1 "register_operand" "")
!    (match_operand:TI 2 "aarch64_reg_or_imm" "")
     (label_ref (match_operand 3 "" ""))]
    ""
  {
--- 2107,2115 ----
  })
  
  (define_expand "uaddvti4"
!   [(match_operand:TI 0 "register_operand")
!    (match_operand:TI 1 "register_operand")
!    (match_operand:TI 2 "aarch64_reg_or_imm")
     (label_ref (match_operand 3 "" ""))]
    ""
  {
***************
*** 2501,2509 ****
  	       (plus:<DWI>
  		 (match_dup 4)
  		 (zero_extend:<DWI>
! 		   (match_operand:GPI 1 "register_operand" "")))
  	       (zero_extend:<DWI>
! 		 (match_operand:GPI 2 "register_operand" "")))
  	     (match_dup 6)))
        (set (match_operand:GPI 0 "register_operand")
  	   (plus:GPI
--- 2644,2652 ----
  	       (plus:<DWI>
  		 (match_dup 4)
  		 (zero_extend:<DWI>
! 		   (match_operand:GPI 1 "register_operand")))
  	       (zero_extend:<DWI>
! 		 (match_operand:GPI 2 "register_operand")))
  	     (match_dup 6)))
        (set (match_operand:GPI 0 "register_operand")
  	   (plus:GPI
***************
*** 2564,2572 ****
  	       (plus:<DWI>
  		 (match_dup 3)
  		 (sign_extend:<DWI>
! 		   (match_operand:GPI 1 "register_operand" "")))
  	       (sign_extend:<DWI>
! 		 (match_operand:GPI 2 "register_operand" "")))
  	   (sign_extend:<DWI>
  	     (plus:GPI
  	       (plus:GPI (match_dup 4) (match_dup 1))
--- 2707,2715 ----
  	       (plus:<DWI>
  		 (match_dup 3)
  		 (sign_extend:<DWI>
! 		   (match_operand:GPI 1 "register_operand")))
  	       (sign_extend:<DWI>
! 		 (match_operand:GPI 2 "register_operand")))
  	   (sign_extend:<DWI>
  	     (plus:GPI
  	       (plus:GPI (match_dup 4) (match_dup 1))
***************
*** 2835,2843 ****
  })
  
  (define_expand "subti3"
!   [(set (match_operand:TI 0 "register_operand" "")
! 	(minus:TI (match_operand:TI 1 "aarch64_reg_or_zero" "")
! 		  (match_operand:TI 2 "register_operand" "")))]
    ""
  {
    rtx low_dest, op1_low, op2_low, high_dest, op1_high, op2_high;
--- 2978,2986 ----
  })
  
  (define_expand "subti3"
!   [(set (match_operand:TI 0 "register_operand")
! 	(minus:TI (match_operand:TI 1 "aarch64_reg_or_zero")
! 		  (match_operand:TI 2 "register_operand")))]
    ""
  {
    rtx low_dest, op1_low, op2_low, high_dest, op1_high, op2_high;
***************
*** 3285,3296 ****
       [(set (reg:CC CC_REGNUM)
  	   (compare:CC
  	     (zero_extend:<DWI>
! 	       (match_operand:GPI 1 "aarch64_reg_or_zero" ""))
  	     (plus:<DWI>
  	       (zero_extend:<DWI>
! 		 (match_operand:GPI 2 "register_operand" ""))
  	       (ltu:<DWI> (reg:CC CC_REGNUM) (const_int 0)))))
!       (set (match_operand:GPI 0 "register_operand" "")
  	   (minus:GPI
  	     (minus:GPI (match_dup 1) (match_dup 2))
  	     (ltu:GPI (reg:CC CC_REGNUM) (const_int 0))))])]
--- 3428,3439 ----
       [(set (reg:CC CC_REGNUM)
  	   (compare:CC
  	     (zero_extend:<DWI>
! 	       (match_operand:GPI 1 "aarch64_reg_or_zero"))
  	     (plus:<DWI>
  	       (zero_extend:<DWI>
! 		 (match_operand:GPI 2 "register_operand"))
  	       (ltu:<DWI> (reg:CC CC_REGNUM) (const_int 0)))))
!       (set (match_operand:GPI 0 "register_operand")
  	   (minus:GPI
  	     (minus:GPI (match_dup 1) (match_dup 2))
  	     (ltu:GPI (reg:CC CC_REGNUM) (const_int 0))))])]
***************
*** 3353,3368 ****
  	   (compare:CC_V
  	    (minus:<DWI>
  	     (sign_extend:<DWI>
! 	       (match_operand:GPI 1 "aarch64_reg_or_zero" ""))
  	     (plus:<DWI>
  	       (sign_extend:<DWI>
! 		 (match_operand:GPI 2 "register_operand" ""))
  	       (ltu:<DWI> (reg:CC CC_REGNUM) (const_int 0))))
  	    (sign_extend:<DWI>
  	     (minus:GPI (match_dup 1)
  			(plus:GPI (ltu:GPI (reg:CC CC_REGNUM) (const_int 0))
  				  (match_dup 2))))))
!       (set (match_operand:GPI 0 "register_operand" "")
  	   (minus:GPI
  	     (minus:GPI (match_dup 1) (match_dup 2))
  	     (ltu:GPI (reg:CC CC_REGNUM) (const_int 0))))])]
--- 3496,3511 ----
  	   (compare:CC_V
  	    (minus:<DWI>
  	     (sign_extend:<DWI>
! 	       (match_operand:GPI 1 "aarch64_reg_or_zero"))
  	     (plus:<DWI>
  	       (sign_extend:<DWI>
! 		 (match_operand:GPI 2 "register_operand"))
  	       (ltu:<DWI> (reg:CC CC_REGNUM) (const_int 0))))
  	    (sign_extend:<DWI>
  	     (minus:GPI (match_dup 1)
  			(plus:GPI (ltu:GPI (reg:CC CC_REGNUM) (const_int 0))
  				  (match_dup 2))))))
!       (set (match_operand:GPI 0 "register_operand")
  	   (minus:GPI
  	     (minus:GPI (match_dup 1) (match_dup 2))
  	     (ltu:GPI (reg:CC CC_REGNUM) (const_int 0))))])]
***************
*** 3475,3482 ****
  )
  
  (define_expand "abs<mode>2"
!   [(match_operand:GPI 0 "register_operand" "")
!    (match_operand:GPI 1 "register_operand" "")]
    ""
    {
      rtx ccreg = aarch64_gen_compare_reg (LT, operands[1], const0_rtx);
--- 3618,3625 ----
  )
  
  (define_expand "abs<mode>2"
!   [(match_operand:GPI 0 "register_operand")
!    (match_operand:GPI 1 "register_operand")]
    ""
    {
      rtx ccreg = aarch64_gen_compare_reg (LT, operands[1], const0_rtx);
***************
*** 3889,3898 ****
  ;; -------------------------------------------------------------------
  
  (define_expand "cstore<mode>4"
!   [(set (match_operand:SI 0 "register_operand" "")
  	(match_operator:SI 1 "aarch64_comparison_operator"
! 	 [(match_operand:GPI 2 "register_operand" "")
! 	  (match_operand:GPI 3 "aarch64_plus_operand" "")]))]
    ""
    "
    operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
--- 4032,4041 ----
  ;; -------------------------------------------------------------------
  
  (define_expand "cstore<mode>4"
!   [(set (match_operand:SI 0 "register_operand")
  	(match_operator:SI 1 "aarch64_comparison_operator"
! 	 [(match_operand:GPI 2 "register_operand")
! 	  (match_operand:GPI 3 "aarch64_plus_operand")]))]
    ""
    "
    operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
***************
*** 3914,3923 ****
  
  
  (define_expand "cstore<mode>4"
!   [(set (match_operand:SI 0 "register_operand" "")
  	(match_operator:SI 1 "aarch64_comparison_operator_mode"
! 	 [(match_operand:GPF 2 "register_operand" "")
! 	  (match_operand:GPF 3 "aarch64_fp_compare_operand" "")]))]
    ""
    "
    operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
--- 4057,4066 ----
  
  
  (define_expand "cstore<mode>4"
!   [(set (match_operand:SI 0 "register_operand")
  	(match_operator:SI 1 "aarch64_comparison_operator_mode"
! 	 [(match_operand:GPF 2 "register_operand")
! 	  (match_operand:GPF 3 "aarch64_fp_compare_operand")]))]
    ""
    "
    operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
***************
*** 4002,4014 ****
  )
  
  (define_expand "cmov<mode>6"
!   [(set (match_operand:GPI 0 "register_operand" "")
  	(if_then_else:GPI
  	 (match_operator 1 "aarch64_comparison_operator"
! 	  [(match_operand:GPI 2 "register_operand" "")
! 	   (match_operand:GPI 3 "aarch64_plus_operand" "")])
! 	 (match_operand:GPI 4 "register_operand" "")
! 	 (match_operand:GPI 5 "register_operand" "")))]
    ""
    "
    operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
--- 4145,4157 ----
  )
  
  (define_expand "cmov<mode>6"
!   [(set (match_operand:GPI 0 "register_operand")
  	(if_then_else:GPI
  	 (match_operator 1 "aarch64_comparison_operator"
! 	  [(match_operand:GPI 2 "register_operand")
! 	   (match_operand:GPI 3 "aarch64_plus_operand")])
! 	 (match_operand:GPI 4 "register_operand")
! 	 (match_operand:GPI 5 "register_operand")))]
    ""
    "
    operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
***************
*** 4018,4030 ****
  )
  
  (define_expand "cmov<mode>6"
!   [(set (match_operand:GPF 0 "register_operand" "")
  	(if_then_else:GPF
  	 (match_operator 1 "aarch64_comparison_operator"
! 	  [(match_operand:GPF 2 "register_operand" "")
! 	   (match_operand:GPF 3 "aarch64_fp_compare_operand" "")])
! 	 (match_operand:GPF 4 "register_operand" "")
! 	 (match_operand:GPF 5 "register_operand" "")))]
    ""
    "
    operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
--- 4161,4173 ----
  )
  
  (define_expand "cmov<mode>6"
!   [(set (match_operand:GPF 0 "register_operand")
  	(if_then_else:GPF
  	 (match_operator 1 "aarch64_comparison_operator"
! 	  [(match_operand:GPF 2 "register_operand")
! 	   (match_operand:GPF 3 "aarch64_fp_compare_operand")])
! 	 (match_operand:GPF 4 "register_operand")
! 	 (match_operand:GPF 5 "register_operand")))]
    ""
    "
    operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
***************
*** 4102,4111 ****
  )
  
  (define_expand "mov<mode>cc"
!   [(set (match_operand:ALLI 0 "register_operand" "")
! 	(if_then_else:ALLI (match_operand 1 "aarch64_comparison_operator" "")
! 			   (match_operand:ALLI 2 "register_operand" "")
! 			   (match_operand:ALLI 3 "register_operand" "")))]
    ""
    {
      rtx ccreg;
--- 4245,4254 ----
  )
  
  (define_expand "mov<mode>cc"
!   [(set (match_operand:ALLI 0 "register_operand")
! 	(if_then_else:ALLI (match_operand 1 "aarch64_comparison_operator")
! 			   (match_operand:ALLI 2 "register_operand")
! 			   (match_operand:ALLI 3 "register_operand")))]
    ""
    {
      rtx ccreg;
***************
*** 4121,4130 ****
  )
  
  (define_expand "mov<GPF:mode><GPI:mode>cc"
!   [(set (match_operand:GPI 0 "register_operand" "")
! 	(if_then_else:GPI (match_operand 1 "aarch64_comparison_operator" "")
! 			  (match_operand:GPF 2 "register_operand" "")
! 			  (match_operand:GPF 3 "register_operand" "")))]
    ""
    {
      rtx ccreg;
--- 4264,4273 ----
  )
  
  (define_expand "mov<GPF:mode><GPI:mode>cc"
!   [(set (match_operand:GPI 0 "register_operand")
! 	(if_then_else:GPI (match_operand 1 "aarch64_comparison_operator")
! 			  (match_operand:GPF 2 "register_operand")
! 			  (match_operand:GPF 3 "register_operand")))]
    ""
    {
      rtx ccreg;
***************
*** 4140,4149 ****
  )
  
  (define_expand "mov<mode>cc"
!   [(set (match_operand:GPF 0 "register_operand" "")
! 	(if_then_else:GPF (match_operand 1 "aarch64_comparison_operator" "")
! 			  (match_operand:GPF 2 "register_operand" "")
! 			  (match_operand:GPF 3 "register_operand" "")))]
    ""
    {
      rtx ccreg;
--- 4283,4292 ----
  )
  
  (define_expand "mov<mode>cc"
!   [(set (match_operand:GPF 0 "register_operand")
! 	(if_then_else:GPF (match_operand 1 "aarch64_comparison_operator")
! 			  (match_operand:GPF 2 "register_operand")
! 			  (match_operand:GPF 3 "register_operand")))]
    ""
    {
      rtx ccreg;
***************
*** 4159,4168 ****
  )
  
  (define_expand "<neg_not_op><mode>cc"
!   [(set (match_operand:GPI 0 "register_operand" "")
! 	(if_then_else:GPI (match_operand 1 "aarch64_comparison_operator" "")
! 			  (NEG_NOT:GPI (match_operand:GPI 2 "register_operand" ""))
! 			  (match_operand:GPI 3 "register_operand" "")))]
    ""
    {
      rtx ccreg;
--- 4302,4311 ----
  )
  
  (define_expand "<neg_not_op><mode>cc"
!   [(set (match_operand:GPI 0 "register_operand")
! 	(if_then_else:GPI (match_operand 1 "aarch64_comparison_operator")
! 			  (NEG_NOT:GPI (match_operand:GPI 2 "register_operand"))
! 			  (match_operand:GPI 3 "register_operand")))]
    ""
    {
      rtx ccreg;
***************
*** 4706,4712 ****
  {
    rtx v = gen_reg_rtx (V8QImode);
    rtx v1 = gen_reg_rtx (V8QImode);
-   rtx r = gen_reg_rtx (QImode);
    rtx in = operands[1];
    rtx out = operands[0];
    if(<MODE>mode == SImode)
--- 4849,4854 ----
***************
*** 4720,4727 ****
      }
    emit_move_insn (v, gen_lowpart (V8QImode, in));
    emit_insn (gen_popcountv8qi2 (v1, v));
!   emit_insn (gen_reduc_plus_scal_v8qi (r, v1));
!   emit_insn (gen_zero_extendqi<mode>2 (out, r));
    DONE;
  })
  
--- 4862,4868 ----
      }
    emit_move_insn (v, gen_lowpart (V8QImode, in));
    emit_insn (gen_popcountv8qi2 (v1, v));
!   emit_insn (gen_aarch64_zero_extend<mode>_reduc_plus_v8qi (out, v1));
    DONE;
  })
  
***************
*** 4769,4775 ****
    [(set_attr "type" "alus_imm")]
  )
  
! (define_insn "*ands<mode>_compare0"
    [(set (reg:CC_NZ CC_REGNUM)
  	(compare:CC_NZ
  	 (zero_extend:GPI (match_operand:SHORT 1 "register_operand" "r"))
--- 4910,4916 ----
    [(set_attr "type" "alus_imm")]
  )
  
! (define_insn "*ands<GPI:mode>_compare0"
    [(set (reg:CC_NZ CC_REGNUM)
  	(compare:CC_NZ
  	 (zero_extend:GPI (match_operand:SHORT 1 "register_operand" "r"))
***************
*** 5391,5397 ****
  ;; -------------------------------------------------------------------
  
  (define_expand "<optab>"
!   [(set (match_operand:DI 0 "register_operand" "=r")
  	(ANY_EXTRACT:DI (match_operand:DI 1 "register_operand")
  			(match_operand 2
  			  "aarch64_simd_shift_imm_offset_di")
--- 5532,5538 ----
  ;; -------------------------------------------------------------------
  
  (define_expand "<optab>"
!   [(set (match_operand:DI 0 "register_operand")
  	(ANY_EXTRACT:DI (match_operand:DI 1 "register_operand")
  			(match_operand 2
  			  "aarch64_simd_shift_imm_offset_di")
***************
*** 5647,5652 ****
--- 5788,5808 ----
    [(set_attr "type" "bfx")]
  )
  
+ (define_insn "*ashiftsi_extvdi_bfiz"
+   [(set (match_operand:SI 0 "register_operand" "=r")
+ 	(ashift:SI
+ 	  (match_operator:SI 4 "subreg_lowpart_operator"
+ 	    [(sign_extract:DI
+ 	       (match_operand:DI 1 "register_operand" "r")
+ 	       (match_operand 2 "aarch64_simd_shift_imm_offset_si")
+ 	       (const_int 0))])
+ 	  (match_operand 3 "aarch64_simd_shift_imm_si")))]
+   "IN_RANGE (INTVAL (operands[2]) + INTVAL (operands[3]),
+ 	     1, GET_MODE_BITSIZE (SImode) - 1)"
+   "sbfiz\\t%w0, %w1, %3, %2"
+   [(set_attr "type" "bfx")]
+ )
+ 
  ;; When the bit position and width of the equivalent extraction add up to 32
  ;; we can use a W-reg LSL instruction taking advantage of the implicit
  ;; zero-extension of the X-reg.
***************
*** 6008,6013 ****
--- 6164,6207 ----
    [(set_attr "type" "f_cvtf2i")]
  )
  
+ ;; Equal width integer to fp and multiply combine.
+ (define_insn "*aarch64_<su_optab>cvtf<fcvt_target><GPF:mode>2_mult"
+   [(set (match_operand:GPF 0 "register_operand" "=w,w")
+ 	(mult:GPF (FLOATUORS:GPF
+ 		   (match_operand:<FCVT_TARGET> 1 "register_operand" "w,?r"))
+ 		   (match_operand:GPF 2 "aarch64_fp_pow2_recip" "Dt,Dt")))]
+   "TARGET_FLOAT"
+   {
+     operands[2] = GEN_INT (aarch64_fpconst_pow2_recip (operands[2]));
+     switch (which_alternative)
+     {
+       case 0:
+ 	return "<su_optab>cvtf\t%<GPF:s>0, %<s>1, #%2";
+       case 1:
+ 	return "<su_optab>cvtf\t%<GPF:s>0, %<w1>1, #%2";
+       default:
+ 	gcc_unreachable ();
+     }
+   }
+   [(set_attr "type" "neon_int_to_fp_<Vetype>,f_cvti2f")
+    (set_attr "arch" "simd,fp")]
+ )
+ 
+ ;; Unequal width integer to fp and multiply combine.
+ (define_insn "*aarch64_<su_optab>cvtf<fcvt_iesize><GPF:mode>2_mult"
+   [(set (match_operand:GPF 0 "register_operand" "=w")
+ 	(mult:GPF (FLOATUORS:GPF
+ 		   (match_operand:<FCVT_IESIZE> 1 "register_operand" "r"))
+ 		   (match_operand:GPF 2 "aarch64_fp_pow2_recip" "Dt")))]
+   "TARGET_FLOAT"
+   {
+     operands[2] = GEN_INT (aarch64_fpconst_pow2_recip (operands[2]));
+     return "<su_optab>cvtf\t%<GPF:s>0, %<w2>1, #%2";
+   }
+   [(set_attr "type" "f_cvti2f")]
+ )
+ 
+ ;; Equal width integer to fp conversion.
  (define_insn "<optab><fcvt_target><GPF:mode>2"
    [(set (match_operand:GPF 0 "register_operand" "=w,w")
          (FLOATUORS:GPF (match_operand:<FCVT_TARGET> 1 "register_operand" "w,?r")))]
***************
*** 6019,6024 ****
--- 6213,6219 ----
     (set_attr "arch" "simd,fp")]
  )
  
+ ;; Unequal width integer to fp conversions.
  (define_insn "<optab><fcvt_iesize><GPF:mode>2"
    [(set (match_operand:GPF 0 "register_operand" "=w")
          (FLOATUORS:GPF (match_operand:<FCVT_IESIZE> 1 "register_operand" "r")))]
***************
*** 6241,6248 ****
  )
  
  (define_expand "sqrt<mode>2"
!   [(set (match_operand:GPF_F16 0 "register_operand" "=w")
! 	(sqrt:GPF_F16 (match_operand:GPF_F16 1 "register_operand" "w")))]
    "TARGET_FLOAT"
  {
    if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
--- 6436,6443 ----
  )
  
  (define_expand "sqrt<mode>2"
!   [(set (match_operand:GPF_F16 0 "register_operand")
! 	(sqrt:GPF_F16 (match_operand:GPF_F16 1 "register_operand")))]
    "TARGET_FLOAT"
  {
    if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
***************
*** 6401,6406 ****
--- 6596,6602 ----
  ;; -------------------------------------------------------------------
  ;; Reload Scalar Floating point modes from constant pool.
  ;; The AArch64 port doesn't have __int128 constant move support.
+ ;; The patterns need constraints due to TARGET_SECONDARY_RELOAD hook.
  (define_expand "@aarch64_reload_movcp<GPF_TF:mode><P:mode>"
   [(set (match_operand:GPF_TF 0 "register_operand" "=w")
         (mem:GPF_TF (match_operand 1 "aarch64_constant_pool_symref" "S")))
***************
*** 6501,6509 ****
  ;; rodata section.
  
  (define_expand "add_losym"
!   [(set (match_operand 0 "register_operand" "=r")
! 	(lo_sum (match_operand 1 "register_operand" "r")
! 		(match_operand 2 "aarch64_valid_symref" "S")))]
    ""
  {
    machine_mode mode = GET_MODE (operands[0]);
--- 6697,6705 ----
  ;; rodata section.
  
  (define_expand "add_losym"
!   [(set (match_operand 0 "register_operand")
! 	(lo_sum (match_operand 1 "register_operand")
! 		(match_operand 2 "aarch64_valid_symref")))]
    ""
  {
    machine_mode mode = GET_MODE (operands[0]);
***************
*** 6571,6583 ****
    [(set_attr "type" "load_4")]
  )
  
! (define_insn "ldr_got_tiny"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(unspec:DI [(match_operand:DI 1 "aarch64_valid_symref" "S")]
! 		   UNSPEC_GOTTINYPIC))]
    ""
!   "ldr\\t%0, %L1"
!   [(set_attr "type" "load_8")]
  )
  
  (define_insn "aarch64_load_tp_hard"
--- 6767,6789 ----
    [(set_attr "type" "load_4")]
  )
  
! (define_insn "@ldr_got_tiny_<mode>"
!   [(set (match_operand:PTR 0 "register_operand" "=r")
! 	(unspec:PTR [(match_operand:PTR 1 "aarch64_valid_symref" "S")]
! 		    UNSPEC_GOTTINYPIC))]
    ""
!   "ldr\t%<w>0, %L1"
!   [(set_attr "type" "load_<ldst_sz>")]
! )
! 
! (define_insn "ldr_got_tiny_sidi"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(zero_extend:DI
! 	  (unspec:SI [(match_operand:DI 1 "aarch64_valid_symref" "S")]
! 		     UNSPEC_GOTTINYPIC)))]
!   "TARGET_ILP32"
!   "ldr\t%w0, %L1"
!   [(set_attr "type" "load_4")]
  )
  
  (define_insn "aarch64_load_tp_hard"
***************
*** 6592,6600 ****
  ;; instructions in the TLS stubs, in order to enable linker relaxation.
  ;; Therefore we treat the stubs as an atomic sequence.
  (define_expand "tlsgd_small_<mode>"
!  [(parallel [(set (match_operand 0 "register_operand" "")
                    (call (mem:DI (match_dup 2)) (const_int 1)))
! 	     (unspec:DI [(match_operand:PTR 1 "aarch64_valid_symref" "")] UNSPEC_GOTSMALLTLS)
  	     (clobber (reg:DI LR_REGNUM))])]
   ""
  {
--- 6798,6807 ----
  ;; instructions in the TLS stubs, in order to enable linker relaxation.
  ;; Therefore we treat the stubs as an atomic sequence.
  (define_expand "tlsgd_small_<mode>"
!  [(parallel [(set (match_operand:PTR 0 "register_operand")
                    (call (mem:DI (match_dup 2)) (const_int 1)))
! 	     (unspec:DI [(const_int 0)] UNSPEC_CALLEE_ABI)
! 	     (unspec:DI [(match_operand 1 "aarch64_valid_symref")] UNSPEC_GOTSMALLTLS)
  	     (clobber (reg:DI LR_REGNUM))])]
   ""
  {
***************
*** 6602,6610 ****
  })
  
  (define_insn "*tlsgd_small_<mode>"
!   [(set (match_operand 0 "register_operand" "")
  	(call (mem:DI (match_operand:DI 2 "" "")) (const_int 1)))
!    (unspec:DI [(match_operand:PTR 1 "aarch64_valid_symref" "S")] UNSPEC_GOTSMALLTLS)
     (clobber (reg:DI LR_REGNUM))
    ]
    ""
--- 6809,6818 ----
  })
  
  (define_insn "*tlsgd_small_<mode>"
!   [(set (match_operand:PTR 0 "register_operand" "")
  	(call (mem:DI (match_operand:DI 2 "" "")) (const_int 1)))
!    (unspec:DI [(const_int 0)] UNSPEC_CALLEE_ABI)
!    (unspec:DI [(match_operand 1 "aarch64_valid_symref" "S")] UNSPEC_GOTSMALLTLS)
     (clobber (reg:DI LR_REGNUM))
    ]
    ""
***************
*** 6704,6710 ****
    "TARGET_TLS_DESC"
    {
      if (TARGET_SVE)
!       emit_insn (gen_tlsdesc_small_sve_<mode> (operands[0]));
      else
        emit_insn (gen_tlsdesc_small_advsimd_<mode> (operands[0]));
      DONE;
--- 6912,6923 ----
    "TARGET_TLS_DESC"
    {
      if (TARGET_SVE)
!       {
! 	rtx abi = gen_int_mode (aarch64_tlsdesc_abi_id (), DImode);
! 	rtx_insn *call
! 	  = emit_call_insn (gen_tlsdesc_small_sve_<mode> (operands[0], abi));
! 	RTL_CONST_CALL_P (call) = 1;
!       }
      else
        emit_insn (gen_tlsdesc_small_advsimd_<mode> (operands[0]));
      DONE;
***************
*** 6719,6790 ****
  		    UNSPEC_TLSDESC))
     (clobber (reg:DI LR_REGNUM))
     (clobber (reg:CC CC_REGNUM))
!    (clobber (match_scratch:DI 1 "=r"))]
    "TARGET_TLS_DESC && !TARGET_SVE"
    "adrp\\tx0, %A0\;ldr\\t%<w>1, [x0, #%L0]\;add\\t<w>0, <w>0, %L0\;.tlsdesccall\\t%0\;blr\\t%1"
    [(set_attr "type" "call")
     (set_attr "length" "16")])
  
! ;; For SVE, model tlsdesc calls as clobbering the lower 128 bits of
! ;; all vector registers, and clobber all predicate registers, on
! ;; top of the usual R0 and LR.
  (define_insn "tlsdesc_small_sve_<mode>"
    [(set (reg:PTR R0_REGNUM)
!         (unspec:PTR [(match_operand 0 "aarch64_valid_symref" "S")]
! 		    UNSPEC_TLSDESC))
     (clobber (reg:DI LR_REGNUM))
!    (clobber (reg:CC CC_REGNUM))
!    (clobber_high (reg:TI V0_REGNUM))
!    (clobber_high (reg:TI V1_REGNUM))
!    (clobber_high (reg:TI V2_REGNUM))
!    (clobber_high (reg:TI V3_REGNUM))
!    (clobber_high (reg:TI V4_REGNUM))
!    (clobber_high (reg:TI V5_REGNUM))
!    (clobber_high (reg:TI V6_REGNUM))
!    (clobber_high (reg:TI V7_REGNUM))
!    (clobber_high (reg:TI V8_REGNUM))
!    (clobber_high (reg:TI V9_REGNUM))
!    (clobber_high (reg:TI V10_REGNUM))
!    (clobber_high (reg:TI V11_REGNUM))
!    (clobber_high (reg:TI V12_REGNUM))
!    (clobber_high (reg:TI V13_REGNUM))
!    (clobber_high (reg:TI V14_REGNUM))
!    (clobber_high (reg:TI V15_REGNUM))
!    (clobber_high (reg:TI V16_REGNUM))
!    (clobber_high (reg:TI V17_REGNUM))
!    (clobber_high (reg:TI V18_REGNUM))
!    (clobber_high (reg:TI V19_REGNUM))
!    (clobber_high (reg:TI V20_REGNUM))
!    (clobber_high (reg:TI V21_REGNUM))
!    (clobber_high (reg:TI V22_REGNUM))
!    (clobber_high (reg:TI V23_REGNUM))
!    (clobber_high (reg:TI V24_REGNUM))
!    (clobber_high (reg:TI V25_REGNUM))
!    (clobber_high (reg:TI V26_REGNUM))
!    (clobber_high (reg:TI V27_REGNUM))
!    (clobber_high (reg:TI V28_REGNUM))
!    (clobber_high (reg:TI V29_REGNUM))
!    (clobber_high (reg:TI V30_REGNUM))
!    (clobber_high (reg:TI V31_REGNUM))
!    (clobber (reg:VNx2BI P0_REGNUM))
!    (clobber (reg:VNx2BI P1_REGNUM))
!    (clobber (reg:VNx2BI P2_REGNUM))
!    (clobber (reg:VNx2BI P3_REGNUM))
!    (clobber (reg:VNx2BI P4_REGNUM))
!    (clobber (reg:VNx2BI P5_REGNUM))
!    (clobber (reg:VNx2BI P6_REGNUM))
!    (clobber (reg:VNx2BI P7_REGNUM))
!    (clobber (reg:VNx2BI P8_REGNUM))
!    (clobber (reg:VNx2BI P9_REGNUM))
!    (clobber (reg:VNx2BI P10_REGNUM))
!    (clobber (reg:VNx2BI P11_REGNUM))
!    (clobber (reg:VNx2BI P12_REGNUM))
!    (clobber (reg:VNx2BI P13_REGNUM))
!    (clobber (reg:VNx2BI P14_REGNUM))
!    (clobber (reg:VNx2BI P15_REGNUM))
!    (clobber (match_scratch:DI 1 "=r"))]
    "TARGET_TLS_DESC && TARGET_SVE"
!   "adrp\\tx0, %A0\;ldr\\t%<w>1, [x0, #%L0]\;add\\t<w>0, <w>0, %L0\;.tlsdesccall\\t%0\;blr\\t%1"
    [(set_attr "type" "call")
     (set_attr "length" "16")])
  
--- 6932,6958 ----
  		    UNSPEC_TLSDESC))
     (clobber (reg:DI LR_REGNUM))
     (clobber (reg:CC CC_REGNUM))
!    (clobber (match_scratch:DI 1 "=r"))
!    (use (reg:DI FP_REGNUM))]
    "TARGET_TLS_DESC && !TARGET_SVE"
    "adrp\\tx0, %A0\;ldr\\t%<w>1, [x0, #%L0]\;add\\t<w>0, <w>0, %L0\;.tlsdesccall\\t%0\;blr\\t%1"
    [(set_attr "type" "call")
     (set_attr "length" "16")])
  
! ;; For SVE, model tlsdesc calls as normal calls, with the callee ABI
! ;; describing the extra call-preserved guarantees.  This would work
! ;; for non-SVE too, but avoiding a call is probably better if we can.
  (define_insn "tlsdesc_small_sve_<mode>"
    [(set (reg:PTR R0_REGNUM)
! 	(call (mem:DI (unspec:PTR
! 			[(match_operand 0 "aarch64_valid_symref")]
! 			UNSPEC_TLSDESC))
! 	      (const_int 0)))
!    (unspec:DI [(match_operand:DI 1 "const_int_operand")] UNSPEC_CALLEE_ABI)
     (clobber (reg:DI LR_REGNUM))
!    (clobber (match_scratch:DI 2 "=r"))]
    "TARGET_TLS_DESC && TARGET_SVE"
!   "adrp\\tx0, %A0\;ldr\\t%<w>2, [x0, #%L0]\;add\\t<w>0, <w>0, %L0\;.tlsdesccall\\t%0\;blr\\t%2"
    [(set_attr "type" "call")
     (set_attr "length" "16")])
  
***************
*** 6798,6803 ****
--- 6966,6980 ----
    [(set_attr "length" "0")]
  )
  
+ (define_insn "aarch64_fjcvtzs"
+   [(set (match_operand:SI 0 "register_operand" "=r")
+ 	(unspec:SI [(match_operand:DF 1 "register_operand" "w")]
+ 		   UNSPEC_FJCVTZS))]
+   "TARGET_JSCVT"
+   "fjcvtzs\\t%w0, %d1"
+   [(set_attr "type" "f_cvtf2i")]
+ )
+ 
  ;; Pointer authentication patterns are always provided.  In architecture
  ;; revisions prior to ARMv8.3-A these HINT instructions operate as NOPs.
  ;; This lets the user write portable software which authenticates pointers
***************
*** 6811,6817 ****
    [(set (reg:DI R30_REGNUM)
  	(unspec:DI [(reg:DI R30_REGNUM) (reg:DI SP_REGNUM)] PAUTH_LR_SP))]
    ""
!   "hint\t<pauth_hint_num_a> // <pauth_mnem_prefix>asp";
  )
  
  ;; Signing/Authenticating X17 using X16 as the salt.
--- 6988,6994 ----
    [(set (reg:DI R30_REGNUM)
  	(unspec:DI [(reg:DI R30_REGNUM) (reg:DI SP_REGNUM)] PAUTH_LR_SP))]
    ""
!   "hint\t<pauth_hint_num> // <pauth_mnem_prefix>sp";
  )
  
  ;; Signing/Authenticating X17 using X16 as the salt.
***************
*** 6820,6826 ****
    [(set (reg:DI R17_REGNUM)
  	(unspec:DI [(reg:DI R17_REGNUM) (reg:DI R16_REGNUM)] PAUTH_17_16))]
    ""
!   "hint\t<pauth_hint_num_a> // <pauth_mnem_prefix>a1716";
  )
  
  ;; Stripping the signature in R30.
--- 6997,7003 ----
    [(set (reg:DI R17_REGNUM)
  	(unspec:DI [(reg:DI R17_REGNUM) (reg:DI R16_REGNUM)] PAUTH_17_16))]
    ""
!   "hint\t<pauth_hint_num> // <pauth_mnem_prefix>1716";
  )
  
  ;; Stripping the signature in R30.
***************
*** 6875,6881 ****
  
  ;; Named pattern for expanding thread pointer reference.
  (define_expand "get_thread_pointerdi"
!   [(match_operand:DI 0 "register_operand" "=r")]
    ""
  {
    rtx tmp = aarch64_load_tp (operands[0]);
--- 7052,7058 ----
  
  ;; Named pattern for expanding thread pointer reference.
  (define_expand "get_thread_pointerdi"
!   [(match_operand:DI 0 "register_operand")]
    ""
  {
    rtx tmp = aarch64_load_tp (operands[0]);
***************
*** 6931,6943 ****
   }
   [(set_attr "type" "mrs")])
  
  (define_insn "stack_protect_set_<mode>"
    [(set (match_operand:PTR 0 "memory_operand" "=m")
  	(unspec:PTR [(match_operand:PTR 1 "memory_operand" "m")]
  	 UNSPEC_SP_SET))
     (set (match_scratch:PTR 2 "=&r") (const_int 0))]
    ""
!   "ldr\\t%<w>2, %1\;str\\t%<w>2, %0\;mov\t%<w>2,0"
    [(set_attr "length" "12")
     (set_attr "type" "multiple")])
  
--- 7108,7122 ----
   }
   [(set_attr "type" "mrs")])
  
+ ;; DO NOT SPLIT THIS PATTERN.  It is important for security reasons that the
+ ;; canary value does not live beyond the life of this sequence.
  (define_insn "stack_protect_set_<mode>"
    [(set (match_operand:PTR 0 "memory_operand" "=m")
  	(unspec:PTR [(match_operand:PTR 1 "memory_operand" "m")]
  	 UNSPEC_SP_SET))
     (set (match_scratch:PTR 2 "=&r") (const_int 0))]
    ""
!   "ldr\\t%<w>2, %1\;str\\t%<w>2, %0\;mov\t%<w>2, 0"
    [(set_attr "length" "12")
     (set_attr "type" "multiple")])
  
***************
*** 7083,7088 ****
--- 7262,7281 ----
    [(set_attr "type" "csel")]
  )
  
+ ;; Like speculation_tracker, but track the inverse condition.
+ (define_insn "speculation_tracker_rev"
+   [(set (reg:DI SPECULATION_TRACKER_REGNUM)
+ 	(unspec:DI [(reg:DI SPECULATION_TRACKER_REGNUM) (match_operand 0)]
+ 	 UNSPEC_SPECULATION_TRACKER_REV))]
+   ""
+   {
+     operands[1] = gen_rtx_REG (DImode, SPECULATION_TRACKER_REGNUM);
+     output_asm_insn ("csel\\t%1, %1, xzr, %M0", operands);
+     return "";
+   }
+   [(set_attr "type" "csel")]
+ )
+ 
  ;; BTI <target> instructions
  (define_insn "bti_noarg"
    [(unspec_volatile [(const_int 0)] UNSPECV_BTI_NOARG)]
***************
*** 7112,7123 ****
    [(set_attr "type" "no_insn")]
  )
  
- ;; Helper for aarch64.c code.
- (define_expand "set_clobber_cc"
-   [(parallel [(set (match_operand 0)
- 		   (match_operand 1))
- 	      (clobber (reg:CC CC_REGNUM))])])
- 
  ;; Hard speculation barrier.
  (define_insn "speculation_barrier"
    [(unspec_volatile [(const_int 0)] UNSPECV_SPECULATION_BARRIER)]
--- 7305,7310 ----
***************
*** 7132,7141 ****
  ;; tracking enabled.  Use the speculation tracker to decide whether to
  ;; copy operand 1 to the target, or to copy the fail value (operand 2).
  (define_expand "@despeculate_copy<ALLI_TI:mode>"
!   [(set (match_operand:ALLI_TI 0 "register_operand" "=r")
  	(unspec_volatile:ALLI_TI
! 	 [(match_operand:ALLI_TI 1 "register_operand" "r")
! 	  (match_operand:ALLI_TI 2 "aarch64_reg_or_zero" "rZ")
  	  (use (reg:DI SPECULATION_TRACKER_REGNUM))
  	  (clobber (reg:CC CC_REGNUM))] UNSPECV_SPECULATION_BARRIER))]
    ""
--- 7319,7328 ----
  ;; tracking enabled.  Use the speculation tracker to decide whether to
  ;; copy operand 1 to the target, or to copy the fail value (operand 2).
  (define_expand "@despeculate_copy<ALLI_TI:mode>"
!   [(set (match_operand:ALLI_TI 0 "register_operand")
  	(unspec_volatile:ALLI_TI
! 	 [(match_operand:ALLI_TI 1 "register_operand")
! 	  (match_operand:ALLI_TI 2 "aarch64_reg_or_zero")
  	  (use (reg:DI SPECULATION_TRACKER_REGNUM))
  	  (clobber (reg:CC CC_REGNUM))] UNSPECV_SPECULATION_BARRIER))]
    ""
***************
*** 7225,7230 ****
--- 7412,7571 ----
     (set_attr "speculation_barrier" "true")]
  )
  
+ (define_insn "aarch64_<frintnzs_op><mode>"
+   [(set (match_operand:VSFDF 0 "register_operand" "=w")
+ 	(unspec:VSFDF [(match_operand:VSFDF 1 "register_operand" "w")]
+ 		      FRINTNZX))]
+   "TARGET_FRINT && TARGET_FLOAT
+    && !(VECTOR_MODE_P (<MODE>mode) && !TARGET_SIMD)"
+   "<frintnzs_op>\\t%<v>0<Vmtype>, %<v>1<Vmtype>"
+   [(set_attr "type" "f_rint<stype>")]
+ )
+ 
+ ;; Transactional Memory Extension (TME) instructions.
+ 
+ (define_insn "tstart"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(unspec_volatile:DI [(const_int 0)] UNSPECV_TSTART))
+    (clobber (mem:BLK (scratch)))]
+   "TARGET_TME"
+   "tstart\\t%0"
+   [(set_attr "type" "tme")]
+ )
+ 
+ (define_insn "ttest"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(unspec_volatile:DI [(const_int 0)] UNSPEC_TTEST))
+    (clobber (mem:BLK (scratch)))]
+   "TARGET_TME"
+   "ttest\\t%0"
+   [(set_attr "type" "tme")]
+ )
+ 
+ (define_insn "tcommit"
+   [(unspec_volatile:BLK [(const_int 0)] UNSPECV_TCOMMIT)
+    (clobber (mem:BLK (scratch)))]
+   "TARGET_TME"
+   "tcommit"
+   [(set_attr "type" "tme")]
+ )
+ 
+ (define_insn "tcancel"
+   [(unspec_volatile:BLK
+      [(match_operand 0 "const_int_operand" "n")] UNSPECV_TCANCEL)
+    (clobber (mem:BLK (scratch)))]
+   "TARGET_TME && (UINTVAL (operands[0]) <= 65535)"
+   "tcancel\\t#%0"
+   [(set_attr "type" "tme")]
+ )
+ 
+ (define_insn "aarch64_rndr"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(unspec_volatile:DI [(const_int 0)] UNSPEC_RNDR))
+    (set (reg:CC_Z CC_REGNUM)
+ 	(unspec_volatile:CC_Z [(const_int 0)] UNSPEC_RNDR))]
+   "TARGET_RNG"
+   "mrs\t%0, RNDR"
+   [(set_attr "type" "mrs")]
+ )
+ 
+ (define_insn "aarch64_rndrrs"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(unspec_volatile:DI [(const_int 0)] UNSPEC_RNDRRS))
+    (set (reg:CC_Z CC_REGNUM)
+ 	(unspec_volatile:CC_Z [(const_int 0)] UNSPEC_RNDRRS))]
+   "TARGET_RNG"
+   "mrs\t%0, RNDRRS"
+   [(set_attr "type" "mrs")]
+ )
+ 
+ ;; Memory Tagging Extension (MTE) instructions.
+ 
+ (define_insn "irg"
+   [(set (match_operand:DI 0 "register_operand" "=rk")
+ 	(ior:DI
+ 	 (and:DI (match_operand:DI 1 "register_operand" "rk")
+ 		 (const_int -1080863910568919041)) ;; 0xf0ff...
+ 	 (ashift:DI (unspec:QI [(match_operand:DI 2 "register_operand" "r")]
+ 		     UNSPEC_GEN_TAG_RND)
+ 		    (const_int 56))))]
+   "TARGET_MEMTAG"
+   "irg\\t%0, %1, %2"
+   [(set_attr "type" "memtag")]
+ )
+ 
+ (define_insn "gmi"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(ior:DI (ashift:DI
+ 		 (const_int 1)
+ 		 (and:QI (lshiftrt:DI
+ 			  (match_operand:DI 1 "register_operand" "rk")
+ 			  (const_int 56)) (const_int 15)))
+ 		(match_operand:DI 2 "register_operand" "r")))]
+   "TARGET_MEMTAG"
+   "gmi\\t%0, %1, %2"
+   [(set_attr "type" "memtag")]
+ )
+ 
+ (define_insn "addg"
+   [(set (match_operand:DI 0 "register_operand" "=rk")
+ 	(ior:DI
+ 	 (and:DI (plus:DI (match_operand:DI 1 "register_operand" "rk")
+ 			  (match_operand:DI 2 "aarch64_granule16_uimm6" "i"))
+ 		 (const_int -1080863910568919041)) ;; 0xf0ff...
+ 	 (ashift:DI
+ 	  (unspec:QI
+ 	   [(and:QI (lshiftrt:DI (match_dup 1) (const_int 56)) (const_int 15))
+ 	    (match_operand:QI 3 "aarch64_memtag_tag_offset" "i")]
+ 	   UNSPEC_GEN_TAG)
+ 	  (const_int 56))))]
+   "TARGET_MEMTAG"
+   "addg\\t%0, %1, #%2, #%3"
+   [(set_attr "type" "memtag")]
+ )
+ 
+ (define_insn "subp"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(minus:DI
+ 	  (and:DI (match_operand:DI 1 "register_operand" "rk")
+ 		  (const_int 72057594037927935)) ;; 0x00ff...
+ 	  (and:DI (match_operand:DI 2 "register_operand" "rk")
+ 		  (const_int 72057594037927935))))] ;; 0x00ff...
+   "TARGET_MEMTAG"
+   "subp\\t%0, %1, %2"
+   [(set_attr "type" "memtag")]
+ )
+ 
+ ;; LDG will use the 16-byte aligned value of the address.
+ (define_insn "ldg"
+   [(set (match_operand:DI 0 "register_operand" "+r")
+ 	(ior:DI
+ 	 (and:DI (match_dup 0) (const_int -1080863910568919041)) ;; 0xf0ff...
+ 	 (ashift:DI
+ 	  (mem:QI (unspec:DI
+ 	   [(and:DI (plus:DI (match_operand:DI 1 "register_operand" "rk")
+ 			     (match_operand:DI 2 "aarch64_granule16_simm9" "i"))
+ 		    (const_int -16))] UNSPEC_TAG_SPACE))
+ 	  (const_int 56))))]
+   "TARGET_MEMTAG"
+   "ldg\\t%0, [%1, #%2]"
+   [(set_attr "type" "memtag")]
+ )
+ 
+ ;; STG doesn't align the address but aborts with alignment fault
+ ;; when the address is not 16-byte aligned.
+ (define_insn "stg"
+   [(set (mem:QI (unspec:DI
+ 	 [(plus:DI (match_operand:DI 1 "register_operand" "rk")
+ 		   (match_operand:DI 2 "aarch64_granule16_simm9" "i"))]
+ 	 UNSPEC_TAG_SPACE))
+ 	(and:QI (lshiftrt:DI (match_operand:DI 0 "register_operand" "rk")
+ 			     (const_int 56)) (const_int 15)))]
+   "TARGET_MEMTAG"
+   "stg\\t%0, [%1, #%2]"
+   [(set_attr "type" "memtag")]
+ )
+ 
  ;; AdvSIMD Stuff
  (include "aarch64-simd.md")
  
***************
*** 7236,7238 ****
--- 7577,7582 ----
  
  ;; SVE.
  (include "aarch64-sve.md")
+ 
+ ;; SVE2.
+ (include "aarch64-sve2.md")
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/aarch64.opt gcc-10.1.0/gcc/config/aarch64/aarch64.opt
*** gcc-9.3.0/gcc/config/aarch64/aarch64.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/aarch64.opt	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ; Machine description for AArch64 architecture.
! ; Copyright (C) 2009-2019 Free Software Foundation, Inc.
  ; Contributed by ARM Ltd.
  ;
  ; This file is part of GCC.
--- 1,5 ----
  ; Machine description for AArch64 architecture.
! ; Copyright (C) 2009-2020 Free Software Foundation, Inc.
  ; Contributed by ARM Ltd.
  ;
  ; This file is part of GCC.
*************** TargetSave
*** 31,37 ****
  const char *x_aarch64_override_tune_string
  
  TargetVariable
! unsigned long aarch64_isa_flags = 0
  
  TargetVariable
  unsigned aarch64_enable_bti = 2
--- 31,37 ----
  const char *x_aarch64_override_tune_string
  
  TargetVariable
! uint64_t aarch64_isa_flags = 0
  
  TargetVariable
  unsigned aarch64_enable_bti = 2
*************** Target RejectNegative Joined Var(aarch64
*** 157,163 ****
  Use branch-protection features.
  
  msign-return-address=
! Target Deprecated RejectNegative Joined Enum(aarch64_ra_sign_scope_t) Var(aarch64_ra_sign_scope) Init(AARCH64_FUNCTION_NONE) Save
  Select return address signing scope.
  
  Enum
--- 157,163 ----
  Use branch-protection features.
  
  msign-return-address=
! Target WarnRemoved RejectNegative Joined Enum(aarch64_ra_sign_scope_t) Var(aarch64_ra_sign_scope) Init(AARCH64_FUNCTION_NONE) Save
  Select return address signing scope.
  
  Enum
*************** user-land code.
*** 255,257 ****
--- 255,273 ----
  TargetVariable
  long aarch64_stack_protector_guard_offset = 0
  
+ moutline-atomics
+ Target Report Var(aarch64_flag_outline_atomics) Init(2) Save
+ Generate local calls to out-of-line atomic operations.
+ 
+ -param=aarch64-sve-compare-costs=
+ Target Joined UInteger Var(aarch64_sve_compare_costs) Init(1) IntegerRange(0, 1) Param
+ When vectorizing for SVE, consider using unpacked vectors for smaller elements and use the cost model to pick the cheapest approach.  Also use the cost model to choose between SVE and Advanced SIMD vectorization.
+ 
+ -param=aarch64-float-recp-precision=
+ Target Joined UInteger Var(aarch64_float_recp_precision) Init(1) IntegerRange(1, 5) Param
+ The number of Newton iterations for calculating the reciprocal for float type.  The precision of division is proportional to this param when division approximation is enabled.  The default value is 1.
+ 
+ -param=aarch64-double-recp-precision=
+ Target Joined UInteger Var(aarch64_double_recp_precision) Init(2) IntegerRange(1, 5) Param
+ The number of Newton iterations for calculating the reciprocal for double type.  The precision of division is proportional to this param when division approximation is enabled.  The default value is 2.
+ 
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/arm_acle.h gcc-10.1.0/gcc/config/aarch64/arm_acle.h
*** gcc-9.3.0/gcc/config/aarch64/arm_acle.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/arm_acle.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* AArch64 Non-NEON ACLE intrinsics include file.
  
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,6 ----
  /* AArch64 Non-NEON ACLE intrinsics include file.
  
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 29,42 ****
  
  #include <stdint.h>
  
- #pragma GCC push_options
- 
- #pragma GCC target ("+nothing+crc")
- 
  #ifdef __cplusplus
  extern "C" {
  #endif
  
  __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
  __crc32b (uint32_t __a, uint8_t __b)
  {
--- 29,105 ----
  
  #include <stdint.h>
  
  #ifdef __cplusplus
  extern "C" {
  #endif
  
+ #pragma GCC push_options
+ #pragma GCC target ("arch=armv8.3-a")
+ __extension__ static __inline int32_t __attribute__ ((__always_inline__))
+ __jcvt (double __a)
+ {
+   return __builtin_aarch64_jcvtzs (__a);
+ }
+ 
+ #pragma GCC pop_options
+ 
+ #pragma GCC push_options
+ #pragma GCC target ("arch=armv8.5-a")
+ __extension__ static __inline float __attribute__ ((__always_inline__))
+ __rint32zf (float __a)
+ {
+   return __builtin_aarch64_frint32zsf (__a);
+ }
+ 
+ __extension__ static __inline double __attribute__ ((__always_inline__))
+ __rint32z (double __a)
+ {
+   return __builtin_aarch64_frint32zdf (__a);
+ }
+ 
+ __extension__ static __inline float __attribute__ ((__always_inline__))
+ __rint64zf (float __a)
+ {
+   return __builtin_aarch64_frint64zsf (__a);
+ }
+ 
+ __extension__ static __inline double __attribute__ ((__always_inline__))
+ __rint64z (double __a)
+ {
+   return __builtin_aarch64_frint64zdf (__a);
+ }
+ 
+ __extension__ static __inline float __attribute__ ((__always_inline__))
+ __rint32xf (float __a)
+ {
+   return __builtin_aarch64_frint32xsf (__a);
+ }
+ 
+ __extension__ static __inline double __attribute__ ((__always_inline__))
+ __rint32x (double __a)
+ {
+   return __builtin_aarch64_frint32xdf (__a);
+ }
+ 
+ __extension__ static __inline float __attribute__ ((__always_inline__))
+ __rint64xf (float __a)
+ {
+   return __builtin_aarch64_frint64xsf (__a);
+ }
+ 
+ __extension__ static __inline double __attribute__ ((__always_inline__))
+ __rint64x (double __a)
+ {
+   return __builtin_aarch64_frint64xdf (__a);
+ }
+ 
+ 
+ #pragma GCC pop_options
+ 
+ #pragma GCC push_options
+ 
+ #pragma GCC target ("+nothing+crc")
+ 
  __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
  __crc32b (uint32_t __a, uint8_t __b)
  {
*************** __crc32d (uint32_t __a, uint64_t __b)
*** 85,94 ****
    return __builtin_aarch64_crc32x (__a, __b);
  }
  
! #ifdef __cplusplus
  }
  #endif
  
  #pragma GCC pop_options
  
  #endif
--- 148,239 ----
    return __builtin_aarch64_crc32x (__a, __b);
  }
  
! #pragma GCC pop_options
! 
! #ifdef __ARM_FEATURE_TME
! #pragma GCC push_options
! #pragma GCC target ("+nothing+tme")
! 
! #define _TMFAILURE_REASON     0x00007fffu
! #define _TMFAILURE_RTRY       0x00008000u
! #define _TMFAILURE_CNCL       0x00010000u
! #define _TMFAILURE_MEM        0x00020000u
! #define _TMFAILURE_IMP        0x00040000u
! #define _TMFAILURE_ERR        0x00080000u
! #define _TMFAILURE_SIZE       0x00100000u
! #define _TMFAILURE_NEST       0x00200000u
! #define _TMFAILURE_DBG        0x00400000u
! #define _TMFAILURE_INT        0x00800000u
! #define _TMFAILURE_TRIVIAL    0x01000000u
! 
! __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
! __tstart (void)
! {
!   return __builtin_aarch64_tstart ();
  }
+ 
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ __tcommit (void)
+ {
+   __builtin_aarch64_tcommit ();
+ }
+ 
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ __tcancel (const uint64_t __reason)
+ {
+   __builtin_aarch64_tcancel (__reason);
+ }
+ 
+ __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
+ __ttest (void)
+ {
+   return __builtin_aarch64_ttest ();
+ }
+ 
+ #pragma GCC pop_options
  #endif
  
+ #pragma GCC push_options
+ #pragma GCC target ("+nothing+rng")
+ __extension__ static __inline int __attribute__ ((__always_inline__))
+ __rndr (uint64_t *__res)
+ {
+   return __builtin_aarch64_rndr (__res);
+ }
+ 
+ __extension__ static __inline int __attribute__ ((__always_inline__))
+ __rndrrs (uint64_t *__res)
+ {
+   return __builtin_aarch64_rndrrs (__res);
+ }
+ 
  #pragma GCC pop_options
  
+ #pragma GCC push_options
+ #pragma GCC target ("arch=armv8.5-a+memtag")
+ 
+ #define __arm_mte_create_random_tag(__ptr, __u64_mask) \
+   __builtin_aarch64_memtag_irg(__ptr, __u64_mask)
+ 
+ #define __arm_mte_exclude_tag(__ptr, __u64_excluded) \
+   __builtin_aarch64_memtag_gmi(__ptr, __u64_excluded)
+ 
+ #define __arm_mte_ptrdiff(__ptr_a, __ptr_b) \
+   __builtin_aarch64_memtag_subp(__ptr_a, __ptr_b)
+ 
+ #define __arm_mte_increment_tag(__ptr, __u_offset) \
+   __builtin_aarch64_memtag_inc_tag(__ptr, __u_offset)
+ 
+ #define __arm_mte_set_tag(__tagged_address) \
+   __builtin_aarch64_memtag_set_tag(__tagged_address)
+ 
+ #define __arm_mte_get_tag(__address) \
+   __builtin_aarch64_memtag_get_tag(__address)
+ 
+ #pragma GCC pop_options
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
  #endif
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/arm_bf16.h gcc-10.1.0/gcc/config/aarch64/arm_bf16.h
*** gcc-9.3.0/gcc/config/aarch64/arm_bf16.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/arm_bf16.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,45 ----
+ /* Arm BF16 instrinsics include file.
+ 
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by Arm.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published
+    by the Free Software Foundation; either version 3, or (at your
+    option) any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    Under Section 7 of GPL version 3, you are granted additional
+    permissions described in the GCC Runtime Library Exception, version
+    3.1, as published by the Free Software Foundation.
+ 
+    You should have received a copy of the GNU General Public License and
+    a copy of the GCC Runtime Library Exception along with this program;
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef _AARCH64_BF16_H_
+ #define _AARCH64_BF16_H_
+ 
+ typedef __bf16 bfloat16_t;
+ typedef float float32_t;
+ 
+ #pragma GCC push_options
+ #pragma GCC target ("+nothing+bf16+nosimd")
+ 
+ __extension__ extern __inline bfloat16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcvth_bf16_f32 (float32_t __a)
+ {
+   return __builtin_aarch64_bfcvtbf (__a);
+ }
+ 
+ #pragma GCC pop_options
+ 
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/arm_fp16.h gcc-10.1.0/gcc/config/aarch64/arm_fp16.h
*** gcc-9.3.0/gcc/config/aarch64/arm_fp16.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/arm_fp16.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* ARM FP16 scalar intrinsics include file.
  
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,6 ----
  /* ARM FP16 scalar intrinsics include file.
  
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/arm_neon.h gcc-10.1.0/gcc/config/aarch64/arm_neon.h
*** gcc-9.3.0/gcc/config/aarch64/arm_neon.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/arm_neon.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* ARM NEON intrinsics include file.
  
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,6 ----
  /* ARM NEON intrinsics include file.
  
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
*************** typedef __fp16 float16_t;
*** 73,78 ****
--- 73,111 ----
  typedef float float32_t;
  typedef double float64_t;
  
+ typedef __Bfloat16x4_t bfloat16x4_t;
+ typedef __Bfloat16x8_t bfloat16x8_t;
+ 
+ typedef struct bfloat16x4x2_t
+ {
+   bfloat16x4_t val[2];
+ } bfloat16x4x2_t;
+ 
+ typedef struct bfloat16x8x2_t
+ {
+   bfloat16x8_t val[2];
+ } bfloat16x8x2_t;
+ 
+ typedef struct bfloat16x4x3_t
+ {
+   bfloat16x4_t val[3];
+ } bfloat16x4x3_t;
+ 
+ typedef struct bfloat16x8x3_t
+ {
+   bfloat16x8_t val[3];
+ } bfloat16x8x3_t;
+ 
+ typedef struct bfloat16x4x4_t
+ {
+   bfloat16x4_t val[4];
+ } bfloat16x4x4_t;
+ 
+ typedef struct bfloat16x8x4_t
+ {
+   bfloat16x8_t val[4];
+ } bfloat16x8x4_t;
+ 
  typedef struct int8x8x2_t
  {
    int8x8_t val[2];
*************** vcombine_p64 (poly64x1_t __a, poly64x1_t
*** 6572,7438 ****
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaba_s8 (int8x8_t a, int8x8_t b, int8x8_t c)
  {
!   int8x8_t result;
    __asm__ ("saba %0.8b,%2.8b,%3.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaba_s16 (int16x4_t a, int16x4_t b, int16x4_t c)
  {
!   int16x4_t result;
    __asm__ ("saba %0.4h,%2.4h,%3.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaba_s32 (int32x2_t a, int32x2_t b, int32x2_t c)
  {
!   int32x2_t result;
    __asm__ ("saba %0.2s,%2.2s,%3.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaba_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c)
  {
!   uint8x8_t result;
    __asm__ ("uaba %0.8b,%2.8b,%3.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaba_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c)
  {
!   uint16x4_t result;
    __asm__ ("uaba %0.4h,%2.4h,%3.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaba_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c)
  {
!   uint32x2_t result;
    __asm__ ("uaba %0.2s,%2.2s,%3.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_high_s8 (int16x8_t a, int8x16_t b, int8x16_t c)
  {
!   int16x8_t result;
    __asm__ ("sabal2 %0.8h,%2.16b,%3.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c)
  {
!   int32x4_t result;
    __asm__ ("sabal2 %0.4s,%2.8h,%3.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c)
  {
!   int64x2_t result;
    __asm__ ("sabal2 %0.2d,%2.4s,%3.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_high_u8 (uint16x8_t a, uint8x16_t b, uint8x16_t c)
  {
!   uint16x8_t result;
    __asm__ ("uabal2 %0.8h,%2.16b,%3.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_high_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t c)
  {
!   uint32x4_t result;
    __asm__ ("uabal2 %0.4s,%2.8h,%3.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_high_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t c)
  {
!   uint64x2_t result;
    __asm__ ("uabal2 %0.2d,%2.4s,%3.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_s8 (int16x8_t a, int8x8_t b, int8x8_t c)
  {
!   int16x8_t result;
    __asm__ ("sabal %0.8h,%2.8b,%3.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_s16 (int32x4_t a, int16x4_t b, int16x4_t c)
  {
!   int32x4_t result;
    __asm__ ("sabal %0.4s,%2.4h,%3.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_s32 (int64x2_t a, int32x2_t b, int32x2_t c)
  {
!   int64x2_t result;
    __asm__ ("sabal %0.2d,%2.2s,%3.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_u8 (uint16x8_t a, uint8x8_t b, uint8x8_t c)
  {
!   uint16x8_t result;
    __asm__ ("uabal %0.8h,%2.8b,%3.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t c)
  {
!   uint32x4_t result;
    __asm__ ("uabal %0.4s,%2.4h,%3.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t c)
  {
!   uint64x2_t result;
    __asm__ ("uabal %0.2d,%2.2s,%3.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabaq_s8 (int8x16_t a, int8x16_t b, int8x16_t c)
  {
!   int8x16_t result;
    __asm__ ("saba %0.16b,%2.16b,%3.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabaq_s16 (int16x8_t a, int16x8_t b, int16x8_t c)
  {
!   int16x8_t result;
    __asm__ ("saba %0.8h,%2.8h,%3.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabaq_s32 (int32x4_t a, int32x4_t b, int32x4_t c)
  {
!   int32x4_t result;
    __asm__ ("saba %0.4s,%2.4s,%3.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabaq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c)
  {
!   uint8x16_t result;
    __asm__ ("uaba %0.16b,%2.16b,%3.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabaq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c)
  {
!   uint16x8_t result;
    __asm__ ("uaba %0.8h,%2.8h,%3.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabaq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c)
  {
!   uint32x4_t result;
    __asm__ ("uaba %0.4s,%2.4s,%3.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_s8 (int8x8_t a, int8x8_t b)
  {
!   int8x8_t result;
    __asm__ ("sabd %0.8b, %1.8b, %2.8b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_s16 (int16x4_t a, int16x4_t b)
  {
!   int16x4_t result;
    __asm__ ("sabd %0.4h, %1.4h, %2.4h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_s32 (int32x2_t a, int32x2_t b)
  {
!   int32x2_t result;
    __asm__ ("sabd %0.2s, %1.2s, %2.2s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_u8 (uint8x8_t a, uint8x8_t b)
  {
!   uint8x8_t result;
    __asm__ ("uabd %0.8b, %1.8b, %2.8b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_u16 (uint16x4_t a, uint16x4_t b)
  {
!   uint16x4_t result;
    __asm__ ("uabd %0.4h, %1.4h, %2.4h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_u32 (uint32x2_t a, uint32x2_t b)
  {
!   uint32x2_t result;
    __asm__ ("uabd %0.2s, %1.2s, %2.2s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_high_s8 (int8x16_t a, int8x16_t b)
  {
!   int16x8_t result;
    __asm__ ("sabdl2 %0.8h,%1.16b,%2.16b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_high_s16 (int16x8_t a, int16x8_t b)
  {
!   int32x4_t result;
    __asm__ ("sabdl2 %0.4s,%1.8h,%2.8h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_high_s32 (int32x4_t a, int32x4_t b)
  {
!   int64x2_t result;
    __asm__ ("sabdl2 %0.2d,%1.4s,%2.4s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_high_u8 (uint8x16_t a, uint8x16_t b)
  {
!   uint16x8_t result;
    __asm__ ("uabdl2 %0.8h,%1.16b,%2.16b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_high_u16 (uint16x8_t a, uint16x8_t b)
  {
!   uint32x4_t result;
    __asm__ ("uabdl2 %0.4s,%1.8h,%2.8h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_high_u32 (uint32x4_t a, uint32x4_t b)
  {
!   uint64x2_t result;
    __asm__ ("uabdl2 %0.2d,%1.4s,%2.4s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_s8 (int8x8_t a, int8x8_t b)
  {
!   int16x8_t result;
    __asm__ ("sabdl %0.8h, %1.8b, %2.8b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_s16 (int16x4_t a, int16x4_t b)
  {
!   int32x4_t result;
    __asm__ ("sabdl %0.4s, %1.4h, %2.4h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_s32 (int32x2_t a, int32x2_t b)
  {
!   int64x2_t result;
    __asm__ ("sabdl %0.2d, %1.2s, %2.2s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_u8 (uint8x8_t a, uint8x8_t b)
  {
!   uint16x8_t result;
    __asm__ ("uabdl %0.8h, %1.8b, %2.8b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_u16 (uint16x4_t a, uint16x4_t b)
  {
!   uint32x4_t result;
    __asm__ ("uabdl %0.4s, %1.4h, %2.4h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_u32 (uint32x2_t a, uint32x2_t b)
  {
!   uint64x2_t result;
    __asm__ ("uabdl %0.2d, %1.2s, %2.2s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_s8 (int8x16_t a, int8x16_t b)
  {
!   int8x16_t result;
    __asm__ ("sabd %0.16b, %1.16b, %2.16b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_s16 (int16x8_t a, int16x8_t b)
  {
!   int16x8_t result;
    __asm__ ("sabd %0.8h, %1.8h, %2.8h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_s32 (int32x4_t a, int32x4_t b)
  {
!   int32x4_t result;
    __asm__ ("sabd %0.4s, %1.4s, %2.4s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_u8 (uint8x16_t a, uint8x16_t b)
  {
!   uint8x16_t result;
    __asm__ ("uabd %0.16b, %1.16b, %2.16b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_u16 (uint16x8_t a, uint16x8_t b)
  {
!   uint16x8_t result;
    __asm__ ("uabd %0.8h, %1.8h, %2.8h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_u32 (uint32x4_t a, uint32x4_t b)
  {
!   uint32x4_t result;
    __asm__ ("uabd %0.4s, %1.4s, %2.4s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlv_s8 (int8x8_t a)
  {
!   int16_t result;
    __asm__ ("saddlv %h0,%1.8b"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlv_s16 (int16x4_t a)
  {
!   int32_t result;
    __asm__ ("saddlv %s0,%1.4h"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlv_u8 (uint8x8_t a)
  {
!   uint16_t result;
    __asm__ ("uaddlv %h0,%1.8b"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlv_u16 (uint16x4_t a)
  {
!   uint32_t result;
    __asm__ ("uaddlv %s0,%1.4h"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlvq_s8 (int8x16_t a)
  {
!   int16_t result;
    __asm__ ("saddlv %h0,%1.16b"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlvq_s16 (int16x8_t a)
  {
!   int32_t result;
    __asm__ ("saddlv %s0,%1.8h"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlvq_s32 (int32x4_t a)
  {
!   int64_t result;
    __asm__ ("saddlv %d0,%1.4s"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlvq_u8 (uint8x16_t a)
  {
!   uint16_t result;
    __asm__ ("uaddlv %h0,%1.16b"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlvq_u16 (uint16x8_t a)
  {
!   uint32_t result;
    __asm__ ("uaddlv %s0,%1.8h"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlvq_u32 (uint32x4_t a)
  {
!   uint64_t result;
    __asm__ ("uaddlv %d0,%1.4s"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vcvtx_f32_f64 (float64x2_t a)
  {
!   float32x2_t result;
    __asm__ ("fcvtxn %0.2s,%1.2d"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vcvtx_high_f32_f64 (float32x2_t a, float64x2_t b)
  {
!   float32x4_t result;
    __asm__ ("fcvtxn2 %0.4s,%1.2d"
!            : "=w"(result)
!            : "w" (b), "0"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline float32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vcvtxd_f32_f64 (float64_t a)
  {
!   float32_t result;
    __asm__ ("fcvtxn %s0,%d1"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_n_f32 (float32x2_t a, float32x2_t b, float32_t c)
  {
!   float32x2_t result;
!   float32x2_t t1;
    __asm__ ("fmul %1.2s, %3.2s, %4.s[0]; fadd %0.2s, %0.2s, %1.2s"
!            : "=w"(result), "=w"(t1)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_n_s16 (int16x4_t a, int16x4_t b, int16_t c)
  {
!   int16x4_t result;
    __asm__ ("mla %0.4h,%2.4h,%3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_n_s32 (int32x2_t a, int32x2_t b, int32_t c)
  {
!   int32x2_t result;
    __asm__ ("mla %0.2s,%2.2s,%3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_n_u16 (uint16x4_t a, uint16x4_t b, uint16_t c)
  {
!   uint16x4_t result;
    __asm__ ("mla %0.4h,%2.4h,%3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_n_u32 (uint32x2_t a, uint32x2_t b, uint32_t c)
  {
!   uint32x2_t result;
    __asm__ ("mla %0.2s,%2.2s,%3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_s8 (int8x8_t a, int8x8_t b, int8x8_t c)
  {
!   int8x8_t result;
    __asm__ ("mla %0.8b, %2.8b, %3.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_s16 (int16x4_t a, int16x4_t b, int16x4_t c)
  {
!   int16x4_t result;
    __asm__ ("mla %0.4h, %2.4h, %3.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_s32 (int32x2_t a, int32x2_t b, int32x2_t c)
  {
!   int32x2_t result;
    __asm__ ("mla %0.2s, %2.2s, %3.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c)
  {
!   uint8x8_t result;
    __asm__ ("mla %0.8b, %2.8b, %3.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c)
  {
!   uint16x4_t result;
    __asm__ ("mla %0.4h, %2.4h, %3.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c)
  {
!   uint32x2_t result;
    __asm__ ("mla %0.2s, %2.2s, %3.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  #define vmlal_high_lane_s16(a, b, c, d)                                 \
--- 6605,7471 ----
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaba_s8 (int8x8_t __a, int8x8_t __b, int8x8_t __c)
  {
!   int8x8_t __result;
    __asm__ ("saba %0.8b,%2.8b,%3.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaba_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c)
  {
!   int16x4_t __result;
    __asm__ ("saba %0.4h,%2.4h,%3.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaba_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c)
  {
!   int32x2_t __result;
    __asm__ ("saba %0.2s,%2.2s,%3.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaba_u8 (uint8x8_t __a, uint8x8_t __b, uint8x8_t __c)
  {
!   uint8x8_t __result;
    __asm__ ("uaba %0.8b,%2.8b,%3.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaba_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c)
  {
!   uint16x4_t __result;
    __asm__ ("uaba %0.4h,%2.4h,%3.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaba_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c)
  {
!   uint32x2_t __result;
    __asm__ ("uaba %0.2s,%2.2s,%3.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_high_s8 (int16x8_t __a, int8x16_t __b, int8x16_t __c)
  {
!   int16x8_t __result;
    __asm__ ("sabal2 %0.8h,%2.16b,%3.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_high_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c)
  {
!   int32x4_t __result;
    __asm__ ("sabal2 %0.4s,%2.8h,%3.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_high_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c)
  {
!   int64x2_t __result;
    __asm__ ("sabal2 %0.2d,%2.4s,%3.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_high_u8 (uint16x8_t __a, uint8x16_t __b, uint8x16_t __c)
  {
!   uint16x8_t __result;
    __asm__ ("uabal2 %0.8h,%2.16b,%3.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_high_u16 (uint32x4_t __a, uint16x8_t __b, uint16x8_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("uabal2 %0.4s,%2.8h,%3.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_high_u32 (uint64x2_t __a, uint32x4_t __b, uint32x4_t __c)
  {
!   uint64x2_t __result;
    __asm__ ("uabal2 %0.2d,%2.4s,%3.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_s8 (int16x8_t __a, int8x8_t __b, int8x8_t __c)
  {
!   int16x8_t __result;
    __asm__ ("sabal %0.8h,%2.8b,%3.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
  {
!   int32x4_t __result;
    __asm__ ("sabal %0.4s,%2.4h,%3.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
  {
!   int64x2_t __result;
    __asm__ ("sabal %0.2d,%2.2s,%3.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_u8 (uint16x8_t __a, uint8x8_t __b, uint8x8_t __c)
  {
!   uint16x8_t __result;
    __asm__ ("uabal %0.8h,%2.8b,%3.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_u16 (uint32x4_t __a, uint16x4_t __b, uint16x4_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("uabal %0.4s,%2.4h,%3.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabal_u32 (uint64x2_t __a, uint32x2_t __b, uint32x2_t __c)
  {
!   uint64x2_t __result;
    __asm__ ("uabal %0.2d,%2.2s,%3.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabaq_s8 (int8x16_t __a, int8x16_t __b, int8x16_t __c)
  {
!   int8x16_t __result;
    __asm__ ("saba %0.16b,%2.16b,%3.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabaq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c)
  {
!   int16x8_t __result;
    __asm__ ("saba %0.8h,%2.8h,%3.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabaq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c)
  {
!   int32x4_t __result;
    __asm__ ("saba %0.4s,%2.4s,%3.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabaq_u8 (uint8x16_t __a, uint8x16_t __b, uint8x16_t __c)
  {
!   uint8x16_t __result;
    __asm__ ("uaba %0.16b,%2.16b,%3.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabaq_u16 (uint16x8_t __a, uint16x8_t __b, uint16x8_t __c)
  {
!   uint16x8_t __result;
    __asm__ ("uaba %0.8h,%2.8h,%3.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabaq_u32 (uint32x4_t __a, uint32x4_t __b, uint32x4_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("uaba %0.4s,%2.4s,%3.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_s8 (int8x8_t __a, int8x8_t __b)
  {
!   int8x8_t __result;
    __asm__ ("sabd %0.8b, %1.8b, %2.8b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_s16 (int16x4_t __a, int16x4_t __b)
  {
!   int16x4_t __result;
    __asm__ ("sabd %0.4h, %1.4h, %2.4h"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_s32 (int32x2_t __a, int32x2_t __b)
  {
!   int32x2_t __result;
    __asm__ ("sabd %0.2s, %1.2s, %2.2s"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_u8 (uint8x8_t __a, uint8x8_t __b)
  {
!   uint8x8_t __result;
    __asm__ ("uabd %0.8b, %1.8b, %2.8b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_u16 (uint16x4_t __a, uint16x4_t __b)
  {
!   uint16x4_t __result;
    __asm__ ("uabd %0.4h, %1.4h, %2.4h"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_u32 (uint32x2_t __a, uint32x2_t __b)
  {
!   uint32x2_t __result;
    __asm__ ("uabd %0.2s, %1.2s, %2.2s"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_high_s8 (int8x16_t __a, int8x16_t __b)
  {
!   int16x8_t __result;
    __asm__ ("sabdl2 %0.8h,%1.16b,%2.16b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_high_s16 (int16x8_t __a, int16x8_t __b)
  {
!   int32x4_t __result;
    __asm__ ("sabdl2 %0.4s,%1.8h,%2.8h"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_high_s32 (int32x4_t __a, int32x4_t __b)
  {
!   int64x2_t __result;
    __asm__ ("sabdl2 %0.2d,%1.4s,%2.4s"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_high_u8 (uint8x16_t __a, uint8x16_t __b)
  {
!   uint16x8_t __result;
    __asm__ ("uabdl2 %0.8h,%1.16b,%2.16b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_high_u16 (uint16x8_t __a, uint16x8_t __b)
  {
!   uint32x4_t __result;
    __asm__ ("uabdl2 %0.4s,%1.8h,%2.8h"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_high_u32 (uint32x4_t __a, uint32x4_t __b)
  {
!   uint64x2_t __result;
    __asm__ ("uabdl2 %0.2d,%1.4s,%2.4s"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_s8 (int8x8_t __a, int8x8_t __b)
  {
!   int16x8_t __result;
    __asm__ ("sabdl %0.8h, %1.8b, %2.8b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_s16 (int16x4_t __a, int16x4_t __b)
  {
!   int32x4_t __result;
    __asm__ ("sabdl %0.4s, %1.4h, %2.4h"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_s32 (int32x2_t __a, int32x2_t __b)
  {
!   int64x2_t __result;
    __asm__ ("sabdl %0.2d, %1.2s, %2.2s"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_u8 (uint8x8_t __a, uint8x8_t __b)
  {
!   uint16x8_t __result;
    __asm__ ("uabdl %0.8h, %1.8b, %2.8b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_u16 (uint16x4_t __a, uint16x4_t __b)
  {
!   uint32x4_t __result;
    __asm__ ("uabdl %0.4s, %1.4h, %2.4h"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdl_u32 (uint32x2_t __a, uint32x2_t __b)
  {
!   uint64x2_t __result;
    __asm__ ("uabdl %0.2d, %1.2s, %2.2s"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_s8 (int8x16_t __a, int8x16_t __b)
  {
!   int8x16_t __result;
    __asm__ ("sabd %0.16b, %1.16b, %2.16b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_s16 (int16x8_t __a, int16x8_t __b)
  {
!   int16x8_t __result;
    __asm__ ("sabd %0.8h, %1.8h, %2.8h"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_s32 (int32x4_t __a, int32x4_t __b)
  {
!   int32x4_t __result;
    __asm__ ("sabd %0.4s, %1.4s, %2.4s"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_u8 (uint8x16_t __a, uint8x16_t __b)
  {
!   uint8x16_t __result;
    __asm__ ("uabd %0.16b, %1.16b, %2.16b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_u16 (uint16x8_t __a, uint16x8_t __b)
  {
!   uint16x8_t __result;
    __asm__ ("uabd %0.8h, %1.8h, %2.8h"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_u32 (uint32x4_t __a, uint32x4_t __b)
  {
!   uint32x4_t __result;
    __asm__ ("uabd %0.4s, %1.4s, %2.4s"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlv_s8 (int8x8_t __a)
  {
!   int16_t __result;
    __asm__ ("saddlv %h0,%1.8b"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlv_s16 (int16x4_t __a)
  {
!   int32_t __result;
    __asm__ ("saddlv %s0,%1.4h"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlv_u8 (uint8x8_t __a)
  {
!   uint16_t __result;
    __asm__ ("uaddlv %h0,%1.8b"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlv_u16 (uint16x4_t __a)
  {
!   uint32_t __result;
    __asm__ ("uaddlv %s0,%1.4h"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlvq_s8 (int8x16_t __a)
  {
!   int16_t __result;
    __asm__ ("saddlv %h0,%1.16b"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlvq_s16 (int16x8_t __a)
  {
!   int32_t __result;
    __asm__ ("saddlv %s0,%1.8h"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlvq_s32 (int32x4_t __a)
  {
!   int64_t __result;
    __asm__ ("saddlv %d0,%1.4s"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlvq_u8 (uint8x16_t __a)
  {
!   uint16_t __result;
    __asm__ ("uaddlv %h0,%1.16b"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlvq_u16 (uint16x8_t __a)
  {
!   uint32_t __result;
    __asm__ ("uaddlv %s0,%1.8h"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlvq_u32 (uint32x4_t __a)
  {
!   uint64_t __result;
    __asm__ ("uaddlv %d0,%1.4s"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vcvtx_f32_f64 (float64x2_t __a)
  {
!   float32x2_t __result;
    __asm__ ("fcvtxn %0.2s,%1.2d"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vcvtx_high_f32_f64 (float32x2_t __a, float64x2_t __b)
  {
!   float32x4_t __result;
    __asm__ ("fcvtxn2 %0.4s,%1.2d"
!            : "=w"(__result)
!            : "w" (__b), "0"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline float32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vcvtxd_f32_f64 (float64_t __a)
  {
!   float32_t __result;
    __asm__ ("fcvtxn %s0,%d1"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_n_f32 (float32x2_t __a, float32x2_t __b, float32_t __c)
  {
!   float32x2_t __result;
!   float32x2_t __t1;
    __asm__ ("fmul %1.2s, %3.2s, %4.s[0]; fadd %0.2s, %0.2s, %1.2s"
!            : "=w"(__result), "=w"(__t1)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_n_s16 (int16x4_t __a, int16x4_t __b, int16_t __c)
  {
!   int16x4_t __result;
    __asm__ ("mla %0.4h,%2.4h,%3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_n_s32 (int32x2_t __a, int32x2_t __b, int32_t __c)
  {
!   int32x2_t __result;
    __asm__ ("mla %0.2s,%2.2s,%3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_n_u16 (uint16x4_t __a, uint16x4_t __b, uint16_t __c)
  {
!   uint16x4_t __result;
    __asm__ ("mla %0.4h,%2.4h,%3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_n_u32 (uint32x2_t __a, uint32x2_t __b, uint32_t __c)
  {
!   uint32x2_t __result;
    __asm__ ("mla %0.2s,%2.2s,%3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_s8 (int8x8_t __a, int8x8_t __b, int8x8_t __c)
  {
!   int8x8_t __result;
    __asm__ ("mla %0.8b, %2.8b, %3.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c)
  {
!   int16x4_t __result;
    __asm__ ("mla %0.4h, %2.4h, %3.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c)
  {
!   int32x2_t __result;
    __asm__ ("mla %0.2s, %2.2s, %3.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_u8 (uint8x8_t __a, uint8x8_t __b, uint8x8_t __c)
  {
!   uint8x8_t __result;
    __asm__ ("mla %0.8b, %2.8b, %3.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c)
  {
!   uint16x4_t __result;
    __asm__ ("mla %0.4h, %2.4h, %3.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c)
  {
!   uint32x2_t __result;
    __asm__ ("mla %0.2s, %2.2s, %3.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  #define vmlal_high_lane_s16(a, b, c, d)                                 \
*************** vmla_u32 (uint32x2_t a, uint32x2_t b, ui
*** 7549,8168 ****
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_n_s16 (int32x4_t a, int16x8_t b, int16_t c)
  {
!   int32x4_t result;
    __asm__ ("smlal2 %0.4s,%2.8h,%3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_n_s32 (int64x2_t a, int32x4_t b, int32_t c)
  {
!   int64x2_t result;
    __asm__ ("smlal2 %0.2d,%2.4s,%3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_n_u16 (uint32x4_t a, uint16x8_t b, uint16_t c)
  {
!   uint32x4_t result;
    __asm__ ("umlal2 %0.4s,%2.8h,%3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_n_u32 (uint64x2_t a, uint32x4_t b, uint32_t c)
  {
!   uint64x2_t result;
    __asm__ ("umlal2 %0.2d,%2.4s,%3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_s8 (int16x8_t a, int8x16_t b, int8x16_t c)
  {
!   int16x8_t result;
    __asm__ ("smlal2 %0.8h,%2.16b,%3.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c)
  {
!   int32x4_t result;
    __asm__ ("smlal2 %0.4s,%2.8h,%3.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c)
  {
!   int64x2_t result;
    __asm__ ("smlal2 %0.2d,%2.4s,%3.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_u8 (uint16x8_t a, uint8x16_t b, uint8x16_t c)
  {
!   uint16x8_t result;
    __asm__ ("umlal2 %0.8h,%2.16b,%3.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t c)
  {
!   uint32x4_t result;
    __asm__ ("umlal2 %0.4s,%2.8h,%3.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t c)
  {
!   uint64x2_t result;
    __asm__ ("umlal2 %0.2d,%2.4s,%3.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
! #define vmlal_lane_s16(a, b, c, d)                                      \
!   __extension__                                                         \
!     ({                                                                  \
!        int16x4_t c_ = (c);                                              \
!        int16x4_t b_ = (b);                                              \
!        int32x4_t a_ = (a);                                              \
!        int32x4_t result;                                                \
!        __asm__ ("smlal %0.4s,%2.4h,%3.h[%4]"                            \
!                 : "=w"(result)                                          \
!                 : "0"(a_), "w"(b_), "x"(c_), "i"(d)                     \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmlal_lane_s32(a, b, c, d)                                      \
!   __extension__                                                         \
!     ({                                                                  \
!        int32x2_t c_ = (c);                                              \
!        int32x2_t b_ = (b);                                              \
!        int64x2_t a_ = (a);                                              \
!        int64x2_t result;                                                \
!        __asm__ ("smlal %0.2d,%2.2s,%3.s[%4]"                            \
!                 : "=w"(result)                                          \
!                 : "0"(a_), "w"(b_), "w"(c_), "i"(d)                     \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmlal_lane_u16(a, b, c, d)                                      \
!   __extension__                                                         \
!     ({                                                                  \
!        uint16x4_t c_ = (c);                                             \
!        uint16x4_t b_ = (b);                                             \
!        uint32x4_t a_ = (a);                                             \
!        uint32x4_t result;                                               \
!        __asm__ ("umlal %0.4s,%2.4h,%3.h[%4]"                            \
!                 : "=w"(result)                                          \
!                 : "0"(a_), "w"(b_), "x"(c_), "i"(d)                     \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmlal_lane_u32(a, b, c, d)                                      \
!   __extension__                                                         \
!     ({                                                                  \
!        uint32x2_t c_ = (c);                                             \
!        uint32x2_t b_ = (b);                                             \
!        uint64x2_t a_ = (a);                                             \
!        uint64x2_t result;                                               \
!        __asm__ ("umlal %0.2d, %2.2s, %3.s[%4]"                          \
!                 : "=w"(result)                                          \
!                 : "0"(a_), "w"(b_), "w"(c_), "i"(d)                     \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmlal_laneq_s16(a, b, c, d)                                     \
!   __extension__                                                         \
!     ({                                                                  \
!        int16x8_t c_ = (c);                                              \
!        int16x4_t b_ = (b);                                              \
!        int32x4_t a_ = (a);                                              \
!        int32x4_t result;                                                \
!        __asm__ ("smlal %0.4s, %2.4h, %3.h[%4]"                          \
!                 : "=w"(result)                                          \
!                 : "0"(a_), "w"(b_), "x"(c_), "i"(d)                     \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmlal_laneq_s32(a, b, c, d)                                     \
!   __extension__                                                         \
!     ({                                                                  \
!        int32x4_t c_ = (c);                                              \
!        int32x2_t b_ = (b);                                              \
!        int64x2_t a_ = (a);                                              \
!        int64x2_t result;                                                \
!        __asm__ ("smlal %0.2d, %2.2s, %3.s[%4]"                          \
!                 : "=w"(result)                                          \
!                 : "0"(a_), "w"(b_), "w"(c_), "i"(d)                     \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmlal_laneq_u16(a, b, c, d)                                     \
!   __extension__                                                         \
!     ({                                                                  \
!        uint16x8_t c_ = (c);                                             \
!        uint16x4_t b_ = (b);                                             \
!        uint32x4_t a_ = (a);                                             \
!        uint32x4_t result;                                               \
!        __asm__ ("umlal %0.4s, %2.4h, %3.h[%4]"                          \
!                 : "=w"(result)                                          \
!                 : "0"(a_), "w"(b_), "x"(c_), "i"(d)                     \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmlal_laneq_u32(a, b, c, d)                                     \
!   __extension__                                                         \
!     ({                                                                  \
!        uint32x4_t c_ = (c);                                             \
!        uint32x2_t b_ = (b);                                             \
!        uint64x2_t a_ = (a);                                             \
!        uint64x2_t result;                                               \
!        __asm__ ("umlal %0.2d, %2.2s, %3.s[%4]"                          \
!                 : "=w"(result)                                          \
!                 : "0"(a_), "w"(b_), "w"(c_), "i"(d)                     \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_n_s16 (int32x4_t a, int16x4_t b, int16_t c)
  {
!   int32x4_t result;
    __asm__ ("smlal %0.4s,%2.4h,%3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_n_s32 (int64x2_t a, int32x2_t b, int32_t c)
  {
!   int64x2_t result;
    __asm__ ("smlal %0.2d,%2.2s,%3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_n_u16 (uint32x4_t a, uint16x4_t b, uint16_t c)
  {
!   uint32x4_t result;
    __asm__ ("umlal %0.4s,%2.4h,%3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_n_u32 (uint64x2_t a, uint32x2_t b, uint32_t c)
  {
!   uint64x2_t result;
    __asm__ ("umlal %0.2d,%2.2s,%3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_s8 (int16x8_t a, int8x8_t b, int8x8_t c)
  {
!   int16x8_t result;
    __asm__ ("smlal %0.8h,%2.8b,%3.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_s16 (int32x4_t a, int16x4_t b, int16x4_t c)
  {
!   int32x4_t result;
    __asm__ ("smlal %0.4s,%2.4h,%3.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_s32 (int64x2_t a, int32x2_t b, int32x2_t c)
  {
!   int64x2_t result;
    __asm__ ("smlal %0.2d,%2.2s,%3.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_u8 (uint16x8_t a, uint8x8_t b, uint8x8_t c)
  {
!   uint16x8_t result;
    __asm__ ("umlal %0.8h,%2.8b,%3.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t c)
  {
!   uint32x4_t result;
    __asm__ ("umlal %0.4s,%2.4h,%3.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t c)
  {
!   uint64x2_t result;
    __asm__ ("umlal %0.2d,%2.2s,%3.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_n_f32 (float32x4_t a, float32x4_t b, float32_t c)
  {
!   float32x4_t result;
!   float32x4_t t1;
    __asm__ ("fmul %1.4s, %3.4s, %4.s[0]; fadd %0.4s, %0.4s, %1.4s"
!            : "=w"(result), "=w"(t1)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_n_s16 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   int16x8_t result;
    __asm__ ("mla %0.8h,%2.8h,%3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_n_s32 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   int32x4_t result;
    __asm__ ("mla %0.4s,%2.4s,%3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_n_u16 (uint16x8_t a, uint16x8_t b, uint16_t c)
  {
!   uint16x8_t result;
    __asm__ ("mla %0.8h,%2.8h,%3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_n_u32 (uint32x4_t a, uint32x4_t b, uint32_t c)
  {
!   uint32x4_t result;
    __asm__ ("mla %0.4s,%2.4s,%3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_s8 (int8x16_t a, int8x16_t b, int8x16_t c)
  {
!   int8x16_t result;
    __asm__ ("mla %0.16b, %2.16b, %3.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_s16 (int16x8_t a, int16x8_t b, int16x8_t c)
  {
!   int16x8_t result;
    __asm__ ("mla %0.8h, %2.8h, %3.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_s32 (int32x4_t a, int32x4_t b, int32x4_t c)
  {
!   int32x4_t result;
    __asm__ ("mla %0.4s, %2.4s, %3.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c)
  {
!   uint8x16_t result;
    __asm__ ("mla %0.16b, %2.16b, %3.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c)
  {
!   uint16x8_t result;
    __asm__ ("mla %0.8h, %2.8h, %3.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c)
  {
!   uint32x4_t result;
    __asm__ ("mla %0.4s, %2.4s, %3.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_n_f32 (float32x2_t a, float32x2_t b, float32_t c)
  {
!   float32x2_t result;
!   float32x2_t t1;
    __asm__ ("fmul %1.2s, %3.2s, %4.s[0]; fsub %0.2s, %0.2s, %1.2s"
!            : "=w"(result), "=w"(t1)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_n_s16 (int16x4_t a, int16x4_t b, int16_t c)
  {
!   int16x4_t result;
    __asm__ ("mls %0.4h, %2.4h, %3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_n_s32 (int32x2_t a, int32x2_t b, int32_t c)
  {
!   int32x2_t result;
    __asm__ ("mls %0.2s, %2.2s, %3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_n_u16 (uint16x4_t a, uint16x4_t b, uint16_t c)
  {
!   uint16x4_t result;
    __asm__ ("mls %0.4h, %2.4h, %3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_n_u32 (uint32x2_t a, uint32x2_t b, uint32_t c)
  {
!   uint32x2_t result;
    __asm__ ("mls %0.2s, %2.2s, %3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_s8 (int8x8_t a, int8x8_t b, int8x8_t c)
  {
!   int8x8_t result;
    __asm__ ("mls %0.8b,%2.8b,%3.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_s16 (int16x4_t a, int16x4_t b, int16x4_t c)
  {
!   int16x4_t result;
    __asm__ ("mls %0.4h,%2.4h,%3.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_s32 (int32x2_t a, int32x2_t b, int32x2_t c)
  {
!   int32x2_t result;
    __asm__ ("mls %0.2s,%2.2s,%3.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c)
  {
!   uint8x8_t result;
    __asm__ ("mls %0.8b,%2.8b,%3.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c)
  {
!   uint16x4_t result;
    __asm__ ("mls %0.4h,%2.4h,%3.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c)
  {
!   uint32x2_t result;
    __asm__ ("mls %0.2s,%2.2s,%3.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  #define vmlsl_high_lane_s16(a, b, c, d)                                 \
--- 7582,8145 ----
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_n_s16 (int32x4_t __a, int16x8_t __b, int16_t __c)
  {
!   int32x4_t __result;
    __asm__ ("smlal2 %0.4s,%2.8h,%3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_n_s32 (int64x2_t __a, int32x4_t __b, int32_t __c)
  {
!   int64x2_t __result;
    __asm__ ("smlal2 %0.2d,%2.4s,%3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_n_u16 (uint32x4_t __a, uint16x8_t __b, uint16_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("umlal2 %0.4s,%2.8h,%3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_n_u32 (uint64x2_t __a, uint32x4_t __b, uint32_t __c)
  {
!   uint64x2_t __result;
    __asm__ ("umlal2 %0.2d,%2.4s,%3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_s8 (int16x8_t __a, int8x16_t __b, int8x16_t __c)
  {
!   int16x8_t __result;
    __asm__ ("smlal2 %0.8h,%2.16b,%3.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c)
  {
!   int32x4_t __result;
    __asm__ ("smlal2 %0.4s,%2.8h,%3.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c)
  {
!   int64x2_t __result;
    __asm__ ("smlal2 %0.2d,%2.4s,%3.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_u8 (uint16x8_t __a, uint8x16_t __b, uint8x16_t __c)
  {
!   uint16x8_t __result;
    __asm__ ("umlal2 %0.8h,%2.16b,%3.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_u16 (uint32x4_t __a, uint16x8_t __b, uint16x8_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("umlal2 %0.4s,%2.8h,%3.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_high_u32 (uint64x2_t __a, uint32x4_t __b, uint32x4_t __c)
  {
!   uint64x2_t __result;
    __asm__ ("umlal2 %0.2d,%2.4s,%3.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
! __extension__ extern __inline int32x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_lane_s16 (int32x4_t __acc, int16x4_t __a, int16x4_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_smlal_lane_v4hi (__acc, __a, __b, __c);
! }
  
! __extension__ extern __inline int64x2_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_lane_s32 (int64x2_t __acc, int32x2_t __a, int32x2_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_smlal_lane_v2si (__acc, __a, __b, __c);
! }
  
! __extension__ extern __inline uint32x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_lane_u16 (uint32x4_t __acc, uint16x4_t __a, uint16x4_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_umlal_lane_v4hi_uuuus (__acc, __a, __b, __c);
! }
  
! __extension__ extern __inline uint64x2_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_lane_u32 (uint64x2_t __acc, uint32x2_t __a, uint32x2_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_umlal_lane_v2si_uuuus (__acc, __a, __b, __c);
! }
  
! __extension__ extern __inline int32x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_laneq_s16 (int32x4_t __acc, int16x4_t __a, int16x8_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_smlal_laneq_v4hi (__acc, __a, __b, __c);
! }
  
! __extension__ extern __inline int64x2_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_laneq_s32 (int64x2_t __acc, int32x2_t __a, int32x4_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_smlal_laneq_v2si (__acc, __a, __b, __c);
! }
  
! __extension__ extern __inline uint32x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_laneq_u16 (uint32x4_t __acc, uint16x4_t __a, uint16x8_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_umlal_laneq_v4hi_uuuus (__acc, __a, __b, __c);
! }
  
! __extension__ extern __inline uint64x2_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_laneq_u32 (uint64x2_t __acc, uint32x2_t __a, uint32x4_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_umlal_laneq_v2si_uuuus (__acc, __a, __b, __c);
! }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c)
  {
!   int32x4_t __result;
    __asm__ ("smlal %0.4s,%2.4h,%3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
  {
!   int64x2_t __result;
    __asm__ ("smlal %0.2d,%2.2s,%3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_n_u16 (uint32x4_t __a, uint16x4_t __b, uint16_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("umlal %0.4s,%2.4h,%3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_n_u32 (uint64x2_t __a, uint32x2_t __b, uint32_t __c)
  {
!   uint64x2_t __result;
    __asm__ ("umlal %0.2d,%2.2s,%3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_s8 (int16x8_t __a, int8x8_t __b, int8x8_t __c)
  {
!   int16x8_t __result;
    __asm__ ("smlal %0.8h,%2.8b,%3.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
  {
!   int32x4_t __result;
    __asm__ ("smlal %0.4s,%2.4h,%3.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
  {
!   int64x2_t __result;
    __asm__ ("smlal %0.2d,%2.2s,%3.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_u8 (uint16x8_t __a, uint8x8_t __b, uint8x8_t __c)
  {
!   uint16x8_t __result;
    __asm__ ("umlal %0.8h,%2.8b,%3.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_u16 (uint32x4_t __a, uint16x4_t __b, uint16x4_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("umlal %0.4s,%2.4h,%3.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlal_u32 (uint64x2_t __a, uint32x2_t __b, uint32x2_t __c)
  {
!   uint64x2_t __result;
    __asm__ ("umlal %0.2d,%2.2s,%3.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c)
  {
!   float32x4_t __result;
!   float32x4_t __t1;
    __asm__ ("fmul %1.4s, %3.4s, %4.s[0]; fadd %0.4s, %0.4s, %1.4s"
!            : "=w"(__result), "=w"(__t1)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
  {
!   int16x8_t __result;
    __asm__ ("mla %0.8h,%2.8h,%3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
  {
!   int32x4_t __result;
    __asm__ ("mla %0.4s,%2.4s,%3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_n_u16 (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
  {
!   uint16x8_t __result;
    __asm__ ("mla %0.8h,%2.8h,%3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_n_u32 (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("mla %0.4s,%2.4s,%3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_s8 (int8x16_t __a, int8x16_t __b, int8x16_t __c)
  {
!   int8x16_t __result;
    __asm__ ("mla %0.16b, %2.16b, %3.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c)
  {
!   int16x8_t __result;
    __asm__ ("mla %0.8h, %2.8h, %3.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c)
  {
!   int32x4_t __result;
    __asm__ ("mla %0.4s, %2.4s, %3.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_u8 (uint8x16_t __a, uint8x16_t __b, uint8x16_t __c)
  {
!   uint8x16_t __result;
    __asm__ ("mla %0.16b, %2.16b, %3.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_u16 (uint16x8_t __a, uint16x8_t __b, uint16x8_t __c)
  {
!   uint16x8_t __result;
    __asm__ ("mla %0.8h, %2.8h, %3.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_u32 (uint32x4_t __a, uint32x4_t __b, uint32x4_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("mla %0.4s, %2.4s, %3.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_n_f32 (float32x2_t __a, float32x2_t __b, float32_t __c)
  {
!   float32x2_t __result;
!   float32x2_t __t1;
    __asm__ ("fmul %1.2s, %3.2s, %4.s[0]; fsub %0.2s, %0.2s, %1.2s"
!            : "=w"(__result), "=w"(__t1)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_n_s16 (int16x4_t __a, int16x4_t __b, int16_t __c)
  {
!   int16x4_t __result;
    __asm__ ("mls %0.4h, %2.4h, %3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_n_s32 (int32x2_t __a, int32x2_t __b, int32_t __c)
  {
!   int32x2_t __result;
    __asm__ ("mls %0.2s, %2.2s, %3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_n_u16 (uint16x4_t __a, uint16x4_t __b, uint16_t __c)
  {
!   uint16x4_t __result;
    __asm__ ("mls %0.4h, %2.4h, %3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_n_u32 (uint32x2_t __a, uint32x2_t __b, uint32_t __c)
  {
!   uint32x2_t __result;
    __asm__ ("mls %0.2s, %2.2s, %3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_s8 (int8x8_t __a, int8x8_t __b, int8x8_t __c)
  {
!   int8x8_t __result;
    __asm__ ("mls %0.8b,%2.8b,%3.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c)
  {
!   int16x4_t __result;
    __asm__ ("mls %0.4h,%2.4h,%3.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c)
  {
!   int32x2_t __result;
    __asm__ ("mls %0.2s,%2.2s,%3.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_u8 (uint8x8_t __a, uint8x8_t __b, uint8x8_t __c)
  {
!   uint8x8_t __result;
    __asm__ ("mls %0.8b,%2.8b,%3.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_u16 (uint16x4_t __a, uint16x4_t __b, uint16x4_t __c)
  {
!   uint16x4_t __result;
    __asm__ ("mls %0.4h,%2.4h,%3.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_u32 (uint32x2_t __a, uint32x2_t __b, uint32x2_t __c)
  {
!   uint32x2_t __result;
    __asm__ ("mls %0.2s,%2.2s,%3.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  #define vmlsl_high_lane_s16(a, b, c, d)                                 \
*************** vmls_u32 (uint32x2_t a, uint32x2_t b, ui
*** 8279,8400 ****
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_n_s16 (int32x4_t a, int16x8_t b, int16_t c)
  {
!   int32x4_t result;
    __asm__ ("smlsl2 %0.4s, %2.8h, %3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_n_s32 (int64x2_t a, int32x4_t b, int32_t c)
  {
!   int64x2_t result;
    __asm__ ("smlsl2 %0.2d, %2.4s, %3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_n_u16 (uint32x4_t a, uint16x8_t b, uint16_t c)
  {
!   uint32x4_t result;
    __asm__ ("umlsl2 %0.4s, %2.8h, %3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_n_u32 (uint64x2_t a, uint32x4_t b, uint32_t c)
  {
!   uint64x2_t result;
    __asm__ ("umlsl2 %0.2d, %2.4s, %3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_s8 (int16x8_t a, int8x16_t b, int8x16_t c)
  {
!   int16x8_t result;
    __asm__ ("smlsl2 %0.8h,%2.16b,%3.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c)
  {
!   int32x4_t result;
    __asm__ ("smlsl2 %0.4s,%2.8h,%3.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c)
  {
!   int64x2_t result;
    __asm__ ("smlsl2 %0.2d,%2.4s,%3.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_u8 (uint16x8_t a, uint8x16_t b, uint8x16_t c)
  {
!   uint16x8_t result;
    __asm__ ("umlsl2 %0.8h,%2.16b,%3.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t c)
  {
!   uint32x4_t result;
    __asm__ ("umlsl2 %0.4s,%2.8h,%3.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t c)
  {
!   uint64x2_t result;
    __asm__ ("umlsl2 %0.2d,%2.4s,%3.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  #define vmlsl_lane_s16(a, b, c, d)                                      \
--- 8256,8377 ----
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_n_s16 (int32x4_t __a, int16x8_t __b, int16_t __c)
  {
!   int32x4_t __result;
    __asm__ ("smlsl2 %0.4s, %2.8h, %3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_n_s32 (int64x2_t __a, int32x4_t __b, int32_t __c)
  {
!   int64x2_t __result;
    __asm__ ("smlsl2 %0.2d, %2.4s, %3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_n_u16 (uint32x4_t __a, uint16x8_t __b, uint16_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("umlsl2 %0.4s, %2.8h, %3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_n_u32 (uint64x2_t __a, uint32x4_t __b, uint32_t __c)
  {
!   uint64x2_t __result;
    __asm__ ("umlsl2 %0.2d, %2.4s, %3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_s8 (int16x8_t __a, int8x16_t __b, int8x16_t __c)
  {
!   int16x8_t __result;
    __asm__ ("smlsl2 %0.8h,%2.16b,%3.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c)
  {
!   int32x4_t __result;
    __asm__ ("smlsl2 %0.4s,%2.8h,%3.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c)
  {
!   int64x2_t __result;
    __asm__ ("smlsl2 %0.2d,%2.4s,%3.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_u8 (uint16x8_t __a, uint8x16_t __b, uint8x16_t __c)
  {
!   uint16x8_t __result;
    __asm__ ("umlsl2 %0.8h,%2.16b,%3.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_u16 (uint32x4_t __a, uint16x8_t __b, uint16x8_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("umlsl2 %0.4s,%2.8h,%3.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_high_u32 (uint64x2_t __a, uint32x4_t __b, uint32x4_t __c)
  {
!   uint64x2_t __result;
    __asm__ ("umlsl2 %0.2d,%2.4s,%3.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  #define vmlsl_lane_s16(a, b, c, d)                                      \
*************** vmlsl_high_u32 (uint64x2_t a, uint32x4_t
*** 8511,9053 ****
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_n_s16 (int32x4_t a, int16x4_t b, int16_t c)
  {
!   int32x4_t result;
    __asm__ ("smlsl %0.4s, %2.4h, %3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_n_s32 (int64x2_t a, int32x2_t b, int32_t c)
  {
!   int64x2_t result;
    __asm__ ("smlsl %0.2d, %2.2s, %3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_n_u16 (uint32x4_t a, uint16x4_t b, uint16_t c)
  {
!   uint32x4_t result;
    __asm__ ("umlsl %0.4s, %2.4h, %3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_n_u32 (uint64x2_t a, uint32x2_t b, uint32_t c)
  {
!   uint64x2_t result;
    __asm__ ("umlsl %0.2d, %2.2s, %3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_s8 (int16x8_t a, int8x8_t b, int8x8_t c)
  {
!   int16x8_t result;
    __asm__ ("smlsl %0.8h, %2.8b, %3.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_s16 (int32x4_t a, int16x4_t b, int16x4_t c)
  {
!   int32x4_t result;
    __asm__ ("smlsl %0.4s, %2.4h, %3.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_s32 (int64x2_t a, int32x2_t b, int32x2_t c)
  {
!   int64x2_t result;
    __asm__ ("smlsl %0.2d, %2.2s, %3.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_u8 (uint16x8_t a, uint8x8_t b, uint8x8_t c)
  {
!   uint16x8_t result;
    __asm__ ("umlsl %0.8h, %2.8b, %3.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t c)
  {
!   uint32x4_t result;
    __asm__ ("umlsl %0.4s, %2.4h, %3.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t c)
  {
!   uint64x2_t result;
    __asm__ ("umlsl %0.2d, %2.2s, %3.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_n_f32 (float32x4_t a, float32x4_t b, float32_t c)
  {
!   float32x4_t result;
!   float32x4_t t1;
    __asm__ ("fmul %1.4s, %3.4s, %4.s[0]; fsub %0.4s, %0.4s, %1.4s"
!            : "=w"(result), "=w"(t1)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_n_s16 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   int16x8_t result;
    __asm__ ("mls %0.8h, %2.8h, %3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_n_s32 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   int32x4_t result;
    __asm__ ("mls %0.4s, %2.4s, %3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_n_u16 (uint16x8_t a, uint16x8_t b, uint16_t c)
  {
!   uint16x8_t result;
    __asm__ ("mls %0.8h, %2.8h, %3.h[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "x"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_n_u32 (uint32x4_t a, uint32x4_t b, uint32_t c)
  {
!   uint32x4_t result;
    __asm__ ("mls %0.4s, %2.4s, %3.s[0]"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_s8 (int8x16_t a, int8x16_t b, int8x16_t c)
  {
!   int8x16_t result;
    __asm__ ("mls %0.16b,%2.16b,%3.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_s16 (int16x8_t a, int16x8_t b, int16x8_t c)
  {
!   int16x8_t result;
    __asm__ ("mls %0.8h,%2.8h,%3.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_s32 (int32x4_t a, int32x4_t b, int32x4_t c)
  {
!   int32x4_t result;
    __asm__ ("mls %0.4s,%2.4s,%3.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c)
  {
!   uint8x16_t result;
    __asm__ ("mls %0.16b,%2.16b,%3.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c)
  {
!   uint16x8_t result;
    __asm__ ("mls %0.8h,%2.8h,%3.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c)
  {
!   uint32x4_t result;
    __asm__ ("mls %0.4s,%2.4s,%3.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b), "w"(c)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_high_s8 (int8x16_t a)
  {
!   int16x8_t result;
    __asm__ ("sshll2 %0.8h,%1.16b,#0"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_high_s16 (int16x8_t a)
  {
!   int32x4_t result;
    __asm__ ("sshll2 %0.4s,%1.8h,#0"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_high_s32 (int32x4_t a)
  {
!   int64x2_t result;
    __asm__ ("sshll2 %0.2d,%1.4s,#0"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_high_u8 (uint8x16_t a)
  {
!   uint16x8_t result;
    __asm__ ("ushll2 %0.8h,%1.16b,#0"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_high_u16 (uint16x8_t a)
  {
!   uint32x4_t result;
    __asm__ ("ushll2 %0.4s,%1.8h,#0"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_high_u32 (uint32x4_t a)
  {
!   uint64x2_t result;
    __asm__ ("ushll2 %0.2d,%1.4s,#0"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_s8 (int8x8_t a)
  {
!   int16x8_t result;
    __asm__ ("sshll %0.8h,%1.8b,#0"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_s16 (int16x4_t a)
  {
!   int32x4_t result;
    __asm__ ("sshll %0.4s,%1.4h,#0"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_s32 (int32x2_t a)
  {
!   int64x2_t result;
    __asm__ ("sshll %0.2d,%1.2s,#0"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_u8 (uint8x8_t a)
  {
!   uint16x8_t result;
    __asm__ ("ushll %0.8h,%1.8b,#0"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_u16 (uint16x4_t a)
  {
!   uint32x4_t result;
    __asm__ ("ushll %0.4s,%1.4h,#0"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_u32 (uint32x2_t a)
  {
!   uint64x2_t result;
    __asm__ ("ushll %0.2d,%1.2s,#0"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_high_s16 (int8x8_t a, int16x8_t b)
  {
!   int8x16_t result = vcombine_s8 (a, vcreate_s8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("xtn2 %0.16b,%1.8h"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_high_s32 (int16x4_t a, int32x4_t b)
  {
!   int16x8_t result = vcombine_s16 (a, vcreate_s16 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("xtn2 %0.8h,%1.4s"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_high_s64 (int32x2_t a, int64x2_t b)
  {
!   int32x4_t result = vcombine_s32 (a, vcreate_s32 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("xtn2 %0.4s,%1.2d"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_high_u16 (uint8x8_t a, uint16x8_t b)
  {
!   uint8x16_t result = vcombine_u8 (a, vcreate_u8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("xtn2 %0.16b,%1.8h"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_high_u32 (uint16x4_t a, uint32x4_t b)
  {
!   uint16x8_t result = vcombine_u16 (a, vcreate_u16 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("xtn2 %0.8h,%1.4s"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_high_u64 (uint32x2_t a, uint64x2_t b)
  {
!   uint32x4_t result = vcombine_u32 (a, vcreate_u32 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("xtn2 %0.4s,%1.2d"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_s16 (int16x8_t a)
  {
!   int8x8_t result;
    __asm__ ("xtn %0.8b,%1.8h"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_s32 (int32x4_t a)
  {
!   int16x4_t result;
    __asm__ ("xtn %0.4h,%1.4s"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_s64 (int64x2_t a)
  {
!   int32x2_t result;
    __asm__ ("xtn %0.2s,%1.2d"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_u16 (uint16x8_t a)
  {
!   uint8x8_t result;
    __asm__ ("xtn %0.8b,%1.8h"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_u32 (uint32x4_t a)
  {
!   uint16x4_t result;
    __asm__ ("xtn %0.4h,%1.4s"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_u64 (uint64x2_t a)
  {
!   uint32x2_t result;
    __asm__ ("xtn %0.2s,%1.2d"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  #define vmull_high_lane_s16(a, b, c)                                    \
--- 8488,9030 ----
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c)
  {
!   int32x4_t __result;
    __asm__ ("smlsl %0.4s, %2.4h, %3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
  {
!   int64x2_t __result;
    __asm__ ("smlsl %0.2d, %2.2s, %3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_n_u16 (uint32x4_t __a, uint16x4_t __b, uint16_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("umlsl %0.4s, %2.4h, %3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_n_u32 (uint64x2_t __a, uint32x2_t __b, uint32_t __c)
  {
!   uint64x2_t __result;
    __asm__ ("umlsl %0.2d, %2.2s, %3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_s8 (int16x8_t __a, int8x8_t __b, int8x8_t __c)
  {
!   int16x8_t __result;
    __asm__ ("smlsl %0.8h, %2.8b, %3.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
  {
!   int32x4_t __result;
    __asm__ ("smlsl %0.4s, %2.4h, %3.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
  {
!   int64x2_t __result;
    __asm__ ("smlsl %0.2d, %2.2s, %3.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_u8 (uint16x8_t __a, uint8x8_t __b, uint8x8_t __c)
  {
!   uint16x8_t __result;
    __asm__ ("umlsl %0.8h, %2.8b, %3.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_u16 (uint32x4_t __a, uint16x4_t __b, uint16x4_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("umlsl %0.4s, %2.4h, %3.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsl_u32 (uint64x2_t __a, uint32x2_t __b, uint32x2_t __c)
  {
!   uint64x2_t __result;
    __asm__ ("umlsl %0.2d, %2.2s, %3.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c)
  {
!   float32x4_t __result;
!   float32x4_t __t1;
    __asm__ ("fmul %1.4s, %3.4s, %4.s[0]; fsub %0.4s, %0.4s, %1.4s"
!            : "=w"(__result), "=w"(__t1)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
  {
!   int16x8_t __result;
    __asm__ ("mls %0.8h, %2.8h, %3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
  {
!   int32x4_t __result;
    __asm__ ("mls %0.4s, %2.4s, %3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_n_u16 (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
  {
!   uint16x8_t __result;
    __asm__ ("mls %0.8h, %2.8h, %3.h[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "x"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_n_u32 (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("mls %0.4s, %2.4s, %3.s[0]"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_s8 (int8x16_t __a, int8x16_t __b, int8x16_t __c)
  {
!   int8x16_t __result;
    __asm__ ("mls %0.16b,%2.16b,%3.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c)
  {
!   int16x8_t __result;
    __asm__ ("mls %0.8h,%2.8h,%3.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c)
  {
!   int32x4_t __result;
    __asm__ ("mls %0.4s,%2.4s,%3.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_u8 (uint8x16_t __a, uint8x16_t __b, uint8x16_t __c)
  {
!   uint8x16_t __result;
    __asm__ ("mls %0.16b,%2.16b,%3.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_u16 (uint16x8_t __a, uint16x8_t __b, uint16x8_t __c)
  {
!   uint16x8_t __result;
    __asm__ ("mls %0.8h,%2.8h,%3.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_u32 (uint32x4_t __a, uint32x4_t __b, uint32x4_t __c)
  {
!   uint32x4_t __result;
    __asm__ ("mls %0.4s,%2.4s,%3.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b), "w"(__c)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_high_s8 (int8x16_t __a)
  {
!   int16x8_t __result;
    __asm__ ("sshll2 %0.8h,%1.16b,#0"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_high_s16 (int16x8_t __a)
  {
!   int32x4_t __result;
    __asm__ ("sshll2 %0.4s,%1.8h,#0"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_high_s32 (int32x4_t __a)
  {
!   int64x2_t __result;
    __asm__ ("sshll2 %0.2d,%1.4s,#0"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_high_u8 (uint8x16_t __a)
  {
!   uint16x8_t __result;
    __asm__ ("ushll2 %0.8h,%1.16b,#0"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_high_u16 (uint16x8_t __a)
  {
!   uint32x4_t __result;
    __asm__ ("ushll2 %0.4s,%1.8h,#0"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_high_u32 (uint32x4_t __a)
  {
!   uint64x2_t __result;
    __asm__ ("ushll2 %0.2d,%1.4s,#0"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_s8 (int8x8_t __a)
  {
!   int16x8_t __result;
    __asm__ ("sshll %0.8h,%1.8b,#0"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_s16 (int16x4_t __a)
  {
!   int32x4_t __result;
    __asm__ ("sshll %0.4s,%1.4h,#0"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_s32 (int32x2_t __a)
  {
!   int64x2_t __result;
    __asm__ ("sshll %0.2d,%1.2s,#0"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_u8 (uint8x8_t __a)
  {
!   uint16x8_t __result;
    __asm__ ("ushll %0.8h,%1.8b,#0"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_u16 (uint16x4_t __a)
  {
!   uint32x4_t __result;
    __asm__ ("ushll %0.4s,%1.4h,#0"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovl_u32 (uint32x2_t __a)
  {
!   uint64x2_t __result;
    __asm__ ("ushll %0.2d,%1.2s,#0"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_high_s16 (int8x8_t __a, int16x8_t __b)
  {
!   int8x16_t __result = vcombine_s8 (__a, vcreate_s8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("xtn2 %0.16b,%1.8h"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_high_s32 (int16x4_t __a, int32x4_t __b)
  {
!   int16x8_t __result = vcombine_s16 (__a, vcreate_s16 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("xtn2 %0.8h,%1.4s"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_high_s64 (int32x2_t __a, int64x2_t __b)
  {
!   int32x4_t __result = vcombine_s32 (__a, vcreate_s32 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("xtn2 %0.4s,%1.2d"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_high_u16 (uint8x8_t __a, uint16x8_t __b)
  {
!   uint8x16_t __result = vcombine_u8 (__a, vcreate_u8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("xtn2 %0.16b,%1.8h"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_high_u32 (uint16x4_t __a, uint32x4_t __b)
  {
!   uint16x8_t __result = vcombine_u16 (__a, vcreate_u16 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("xtn2 %0.8h,%1.4s"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_high_u64 (uint32x2_t __a, uint64x2_t __b)
  {
!   uint32x4_t __result = vcombine_u32 (__a, vcreate_u32 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("xtn2 %0.4s,%1.2d"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_s16 (int16x8_t __a)
  {
!   int8x8_t __result;
    __asm__ ("xtn %0.8b,%1.8h"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_s32 (int32x4_t __a)
  {
!   int16x4_t __result;
    __asm__ ("xtn %0.4h,%1.4s"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_s64 (int64x2_t __a)
  {
!   int32x2_t __result;
    __asm__ ("xtn %0.2s,%1.2d"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_u16 (uint16x8_t __a)
  {
!   uint8x8_t __result;
    __asm__ ("xtn %0.8b,%1.8h"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_u32 (uint32x4_t __a)
  {
!   uint16x4_t __result;
    __asm__ ("xtn %0.4h,%1.4s"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmovn_u64 (uint64x2_t __a)
  {
!   uint32x2_t __result;
    __asm__ ("xtn %0.2s,%1.2d"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  #define vmull_high_lane_s16(a, b, c)                                    \
*************** vmovn_u64 (uint64x2_t a)
*** 9156,10113 ****
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_n_s16 (int16x8_t a, int16_t b)
  {
!   int32x4_t result;
    __asm__ ("smull2 %0.4s,%1.8h,%2.h[0]"
!            : "=w"(result)
!            : "w"(a), "x"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_n_s32 (int32x4_t a, int32_t b)
  {
!   int64x2_t result;
    __asm__ ("smull2 %0.2d,%1.4s,%2.s[0]"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_n_u16 (uint16x8_t a, uint16_t b)
  {
!   uint32x4_t result;
    __asm__ ("umull2 %0.4s,%1.8h,%2.h[0]"
!            : "=w"(result)
!            : "w"(a), "x"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_n_u32 (uint32x4_t a, uint32_t b)
  {
!   uint64x2_t result;
    __asm__ ("umull2 %0.2d,%1.4s,%2.s[0]"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline poly16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_p8 (poly8x16_t a, poly8x16_t b)
  {
!   poly16x8_t result;
    __asm__ ("pmull2 %0.8h,%1.16b,%2.16b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_s8 (int8x16_t a, int8x16_t b)
  {
!   int16x8_t result;
!   __asm__ ("smull2 %0.8h,%1.16b,%2.16b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
!            : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_s16 (int16x8_t a, int16x8_t b)
  {
!   int32x4_t result;
!   __asm__ ("smull2 %0.4s,%1.8h,%2.8h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
!            : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_s32 (int32x4_t a, int32x4_t b)
  {
!   int64x2_t result;
!   __asm__ ("smull2 %0.2d,%1.4s,%2.4s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
!            : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_u8 (uint8x16_t a, uint8x16_t b)
  {
!   uint16x8_t result;
!   __asm__ ("umull2 %0.8h,%1.16b,%2.16b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
!            : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_u16 (uint16x8_t a, uint16x8_t b)
  {
!   uint32x4_t result;
!   __asm__ ("umull2 %0.4s,%1.8h,%2.8h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
!            : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_u32 (uint32x4_t a, uint32x4_t b)
  {
!   uint64x2_t result;
!   __asm__ ("umull2 %0.2d,%1.4s,%2.4s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
!            : /* No clobbers */);
!   return result;
  }
  
! #define vmull_lane_s16(a, b, c)                                         \
!   __extension__                                                         \
!     ({                                                                  \
!        int16x4_t b_ = (b);                                              \
!        int16x4_t a_ = (a);                                              \
!        int32x4_t result;                                                \
!        __asm__ ("smull %0.4s,%1.4h,%2.h[%3]"                            \
!                 : "=w"(result)                                          \
!                 : "w"(a_), "x"(b_), "i"(c)                              \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmull_lane_s32(a, b, c)                                         \
!   __extension__                                                         \
!     ({                                                                  \
!        int32x2_t b_ = (b);                                              \
!        int32x2_t a_ = (a);                                              \
!        int64x2_t result;                                                \
!        __asm__ ("smull %0.2d,%1.2s,%2.s[%3]"                            \
!                 : "=w"(result)                                          \
!                 : "w"(a_), "w"(b_), "i"(c)                              \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmull_lane_u16(a, b, c)                                         \
!   __extension__                                                         \
!     ({                                                                  \
!        uint16x4_t b_ = (b);                                             \
!        uint16x4_t a_ = (a);                                             \
!        uint32x4_t result;                                               \
!        __asm__ ("umull %0.4s,%1.4h,%2.h[%3]"                            \
!                 : "=w"(result)                                          \
!                 : "w"(a_), "x"(b_), "i"(c)                              \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmull_lane_u32(a, b, c)                                         \
!   __extension__                                                         \
!     ({                                                                  \
!        uint32x2_t b_ = (b);                                             \
!        uint32x2_t a_ = (a);                                             \
!        uint64x2_t result;                                               \
!        __asm__ ("umull %0.2d, %1.2s, %2.s[%3]"                          \
!                 : "=w"(result)                                          \
!                 : "w"(a_), "w"(b_), "i"(c)                              \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmull_laneq_s16(a, b, c)                                        \
!   __extension__                                                         \
!     ({                                                                  \
!        int16x8_t b_ = (b);                                              \
!        int16x4_t a_ = (a);                                              \
!        int32x4_t result;                                                \
!        __asm__ ("smull %0.4s, %1.4h, %2.h[%3]"                          \
!                 : "=w"(result)                                          \
!                 : "w"(a_), "x"(b_), "i"(c)                              \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmull_laneq_s32(a, b, c)                                        \
!   __extension__                                                         \
!     ({                                                                  \
!        int32x4_t b_ = (b);                                              \
!        int32x2_t a_ = (a);                                              \
!        int64x2_t result;                                                \
!        __asm__ ("smull %0.2d, %1.2s, %2.s[%3]"                          \
!                 : "=w"(result)                                          \
!                 : "w"(a_), "w"(b_), "i"(c)                              \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmull_laneq_u16(a, b, c)                                        \
!   __extension__                                                         \
!     ({                                                                  \
!        uint16x8_t b_ = (b);                                             \
!        uint16x4_t a_ = (a);                                             \
!        uint32x4_t result;                                               \
!        __asm__ ("umull %0.4s, %1.4h, %2.h[%3]"                          \
!                 : "=w"(result)                                          \
!                 : "w"(a_), "x"(b_), "i"(c)                              \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
! #define vmull_laneq_u32(a, b, c)                                        \
!   __extension__                                                         \
!     ({                                                                  \
!        uint32x4_t b_ = (b);                                             \
!        uint32x2_t a_ = (a);                                             \
!        uint64x2_t result;                                               \
!        __asm__ ("umull %0.2d, %1.2s, %2.s[%3]"                          \
!                 : "=w"(result)                                          \
!                 : "w"(a_), "w"(b_), "i"(c)                              \
!                 : /* No clobbers */);                                   \
!        result;                                                          \
!      })
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_n_s16 (int16x4_t a, int16_t b)
  {
!   int32x4_t result;
    __asm__ ("smull %0.4s,%1.4h,%2.h[0]"
!            : "=w"(result)
!            : "w"(a), "x"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_n_s32 (int32x2_t a, int32_t b)
  {
!   int64x2_t result;
    __asm__ ("smull %0.2d,%1.2s,%2.s[0]"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_n_u16 (uint16x4_t a, uint16_t b)
  {
!   uint32x4_t result;
    __asm__ ("umull %0.4s,%1.4h,%2.h[0]"
!            : "=w"(result)
!            : "w"(a), "x"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_n_u32 (uint32x2_t a, uint32_t b)
  {
!   uint64x2_t result;
    __asm__ ("umull %0.2d,%1.2s,%2.s[0]"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline poly16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_p8 (poly8x8_t a, poly8x8_t b)
  {
!   poly16x8_t result;
    __asm__ ("pmull %0.8h, %1.8b, %2.8b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_s8 (int8x8_t a, int8x8_t b)
  {
!   int16x8_t result;
!   __asm__ ("smull %0.8h, %1.8b, %2.8b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
!            : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_s16 (int16x4_t a, int16x4_t b)
  {
!   int32x4_t result;
!   __asm__ ("smull %0.4s, %1.4h, %2.4h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
!            : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_s32 (int32x2_t a, int32x2_t b)
  {
!   int64x2_t result;
!   __asm__ ("smull %0.2d, %1.2s, %2.2s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
!            : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_u8 (uint8x8_t a, uint8x8_t b)
  {
!   uint16x8_t result;
!   __asm__ ("umull %0.8h, %1.8b, %2.8b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
!            : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_u16 (uint16x4_t a, uint16x4_t b)
  {
!   uint32x4_t result;
!   __asm__ ("umull %0.4s, %1.4h, %2.4h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
!            : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_u32 (uint32x2_t a, uint32x2_t b)
  {
!   uint64x2_t result;
!   __asm__ ("umull %0.2d, %1.2s, %2.2s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
!            : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadal_s8 (int16x4_t a, int8x8_t b)
  {
!   int16x4_t result;
    __asm__ ("sadalp %0.4h,%2.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadal_s16 (int32x2_t a, int16x4_t b)
  {
!   int32x2_t result;
    __asm__ ("sadalp %0.2s,%2.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadal_s32 (int64x1_t a, int32x2_t b)
  {
!   int64x1_t result;
    __asm__ ("sadalp %0.1d,%2.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadal_u8 (uint16x4_t a, uint8x8_t b)
  {
!   uint16x4_t result;
    __asm__ ("uadalp %0.4h,%2.8b"
!            : "=w"(result)
!            : "0"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadal_u16 (uint32x2_t a, uint16x4_t b)
  {
!   uint32x2_t result;
    __asm__ ("uadalp %0.2s,%2.4h"
!            : "=w"(result)
!            : "0"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadal_u32 (uint64x1_t a, uint32x2_t b)
  {
!   uint64x1_t result;
    __asm__ ("uadalp %0.1d,%2.2s"
!            : "=w"(result)
!            : "0"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadalq_s8 (int16x8_t a, int8x16_t b)
  {
!   int16x8_t result;
    __asm__ ("sadalp %0.8h,%2.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadalq_s16 (int32x4_t a, int16x8_t b)
  {
!   int32x4_t result;
    __asm__ ("sadalp %0.4s,%2.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadalq_s32 (int64x2_t a, int32x4_t b)
  {
!   int64x2_t result;
    __asm__ ("sadalp %0.2d,%2.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadalq_u8 (uint16x8_t a, uint8x16_t b)
  {
!   uint16x8_t result;
    __asm__ ("uadalp %0.8h,%2.16b"
!            : "=w"(result)
!            : "0"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadalq_u16 (uint32x4_t a, uint16x8_t b)
  {
!   uint32x4_t result;
    __asm__ ("uadalp %0.4s,%2.8h"
!            : "=w"(result)
!            : "0"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadalq_u32 (uint64x2_t a, uint32x4_t b)
  {
!   uint64x2_t result;
    __asm__ ("uadalp %0.2d,%2.4s"
!            : "=w"(result)
!            : "0"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddl_s8 (int8x8_t a)
  {
!   int16x4_t result;
    __asm__ ("saddlp %0.4h,%1.8b"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddl_s16 (int16x4_t a)
  {
!   int32x2_t result;
    __asm__ ("saddlp %0.2s,%1.4h"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddl_s32 (int32x2_t a)
  {
!   int64x1_t result;
    __asm__ ("saddlp %0.1d,%1.2s"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddl_u8 (uint8x8_t a)
  {
!   uint16x4_t result;
    __asm__ ("uaddlp %0.4h,%1.8b"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddl_u16 (uint16x4_t a)
  {
!   uint32x2_t result;
    __asm__ ("uaddlp %0.2s,%1.4h"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddl_u32 (uint32x2_t a)
  {
!   uint64x1_t result;
    __asm__ ("uaddlp %0.1d,%1.2s"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddlq_s8 (int8x16_t a)
  {
!   int16x8_t result;
    __asm__ ("saddlp %0.8h,%1.16b"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddlq_s16 (int16x8_t a)
  {
!   int32x4_t result;
    __asm__ ("saddlp %0.4s,%1.8h"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddlq_s32 (int32x4_t a)
  {
!   int64x2_t result;
    __asm__ ("saddlp %0.2d,%1.4s"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddlq_u8 (uint8x16_t a)
  {
!   uint16x8_t result;
    __asm__ ("uaddlp %0.8h,%1.16b"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddlq_u16 (uint16x8_t a)
  {
!   uint32x4_t result;
    __asm__ ("uaddlp %0.4s,%1.8h"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddlq_u32 (uint32x4_t a)
  {
!   uint64x2_t result;
    __asm__ ("uaddlp %0.2d,%1.4s"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_s8 (int8x16_t a, int8x16_t b)
  {
!   int8x16_t result;
    __asm__ ("addp %0.16b,%1.16b,%2.16b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_s16 (int16x8_t a, int16x8_t b)
  {
!   int16x8_t result;
    __asm__ ("addp %0.8h,%1.8h,%2.8h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_s32 (int32x4_t a, int32x4_t b)
  {
!   int32x4_t result;
    __asm__ ("addp %0.4s,%1.4s,%2.4s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_s64 (int64x2_t a, int64x2_t b)
  {
!   int64x2_t result;
    __asm__ ("addp %0.2d,%1.2d,%2.2d"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_u8 (uint8x16_t a, uint8x16_t b)
  {
!   uint8x16_t result;
    __asm__ ("addp %0.16b,%1.16b,%2.16b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_u16 (uint16x8_t a, uint16x8_t b)
  {
!   uint16x8_t result;
    __asm__ ("addp %0.8h,%1.8h,%2.8h"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_u32 (uint32x4_t a, uint32x4_t b)
  {
!   uint32x4_t result;
    __asm__ ("addp %0.4s,%1.4s,%2.4s"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_u64 (uint64x2_t a, uint64x2_t b)
  {
!   uint64x2_t result;
    __asm__ ("addp %0.2d,%1.2d,%2.2d"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqdmulh_n_s16 (int16x4_t a, int16_t b)
  {
!   int16x4_t result;
    __asm__ ("sqdmulh %0.4h,%1.4h,%2.h[0]"
!            : "=w"(result)
!            : "w"(a), "x"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqdmulh_n_s32 (int32x2_t a, int32_t b)
  {
!   int32x2_t result;
    __asm__ ("sqdmulh %0.2s,%1.2s,%2.s[0]"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqdmulhq_n_s16 (int16x8_t a, int16_t b)
  {
!   int16x8_t result;
    __asm__ ("sqdmulh %0.8h,%1.8h,%2.h[0]"
!            : "=w"(result)
!            : "w"(a), "x"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqdmulhq_n_s32 (int32x4_t a, int32_t b)
  {
!   int32x4_t result;
    __asm__ ("sqdmulh %0.4s,%1.4s,%2.s[0]"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovn_high_s16 (int8x8_t a, int16x8_t b)
  {
!   int8x16_t result = vcombine_s8 (a, vcreate_s8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("sqxtn2 %0.16b, %1.8h"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovn_high_s32 (int16x4_t a, int32x4_t b)
  {
!   int16x8_t result = vcombine_s16 (a, vcreate_s16 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("sqxtn2 %0.8h, %1.4s"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovn_high_s64 (int32x2_t a, int64x2_t b)
  {
!   int32x4_t result = vcombine_s32 (a, vcreate_s32 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("sqxtn2 %0.4s, %1.2d"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovn_high_u16 (uint8x8_t a, uint16x8_t b)
  {
!   uint8x16_t result = vcombine_u8 (a, vcreate_u8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("uqxtn2 %0.16b, %1.8h"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovn_high_u32 (uint16x4_t a, uint32x4_t b)
  {
!   uint16x8_t result = vcombine_u16 (a, vcreate_u16 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("uqxtn2 %0.8h, %1.4s"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovn_high_u64 (uint32x2_t a, uint64x2_t b)
  {
!   uint32x4_t result = vcombine_u32 (a, vcreate_u32 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("uqxtn2 %0.4s, %1.2d"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovun_high_s16 (uint8x8_t a, int16x8_t b)
  {
!   uint8x16_t result = vcombine_u8 (a, vcreate_u8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("sqxtun2 %0.16b, %1.8h"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovun_high_s32 (uint16x4_t a, int32x4_t b)
  {
!   uint16x8_t result = vcombine_u16 (a, vcreate_u16 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("sqxtun2 %0.8h, %1.4s"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovun_high_s64 (uint32x2_t a, int64x2_t b)
  {
!   uint32x4_t result = vcombine_u32 (a, vcreate_u32 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("sqxtun2 %0.4s, %1.2d"
!            : "+w"(result)
!            : "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqrdmulh_n_s16 (int16x4_t a, int16_t b)
  {
!   int16x4_t result;
    __asm__ ("sqrdmulh %0.4h,%1.4h,%2.h[0]"
!            : "=w"(result)
!            : "w"(a), "x"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqrdmulh_n_s32 (int32x2_t a, int32_t b)
  {
!   int32x2_t result;
    __asm__ ("sqrdmulh %0.2s,%1.2s,%2.s[0]"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqrdmulhq_n_s16 (int16x8_t a, int16_t b)
  {
!   int16x8_t result;
    __asm__ ("sqrdmulh %0.8h,%1.8h,%2.h[0]"
!            : "=w"(result)
!            : "w"(a), "x"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqrdmulhq_n_s32 (int32x4_t a, int32_t b)
  {
!   int32x4_t result;
    __asm__ ("sqrdmulh %0.4s,%1.4s,%2.s[0]"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  #define vqrshrn_high_n_s16(a, b, c)                                     \
--- 9133,9982 ----
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_n_s16 (int16x8_t __a, int16_t __b)
  {
!   int32x4_t __result;
    __asm__ ("smull2 %0.4s,%1.8h,%2.h[0]"
!            : "=w"(__result)
!            : "w"(__a), "x"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_n_s32 (int32x4_t __a, int32_t __b)
  {
!   int64x2_t __result;
    __asm__ ("smull2 %0.2d,%1.4s,%2.s[0]"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_n_u16 (uint16x8_t __a, uint16_t __b)
  {
!   uint32x4_t __result;
    __asm__ ("umull2 %0.4s,%1.8h,%2.h[0]"
!            : "=w"(__result)
!            : "w"(__a), "x"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_n_u32 (uint32x4_t __a, uint32_t __b)
  {
!   uint64x2_t __result;
    __asm__ ("umull2 %0.2d,%1.4s,%2.s[0]"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline poly16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_p8 (poly8x16_t __a, poly8x16_t __b)
  {
!   poly16x8_t __result;
    __asm__ ("pmull2 %0.8h,%1.16b,%2.16b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_s8 (int8x16_t __a, int8x16_t __b)
  {
!   return __builtin_aarch64_vec_widen_smult_hi_v16qi (__a, __b);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_s16 (int16x8_t __a, int16x8_t __b)
  {
!   return __builtin_aarch64_vec_widen_smult_hi_v8hi (__a, __b);
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_s32 (int32x4_t __a, int32x4_t __b)
  {
!   return __builtin_aarch64_vec_widen_smult_hi_v4si (__a, __b);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_u8 (uint8x16_t __a, uint8x16_t __b)
  {
!   return __builtin_aarch64_vec_widen_umult_hi_v16qi_uuu (__a, __b);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_u16 (uint16x8_t __a, uint16x8_t __b)
  {
!   return __builtin_aarch64_vec_widen_umult_hi_v8hi_uuu (__a, __b);
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_u32 (uint32x4_t __a, uint32x4_t __b)
  {
!   return __builtin_aarch64_vec_widen_umult_hi_v4si_uuu (__a, __b);
  }
  
! __extension__ extern __inline int32x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_lane_s16 (int16x4_t __a, int16x4_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_smult_lane_v4hi (__a, __b, __c);
! }
  
! __extension__ extern __inline int64x2_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_smult_lane_v2si (__a, __b, __c);
! }
  
! __extension__ extern __inline uint32x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_lane_u16 (uint16x4_t __a, uint16x4_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_umult_lane_v4hi_uuus (__a, __b, __c);
! }
  
! __extension__ extern __inline uint64x2_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_lane_u32 (uint32x2_t __a, uint32x2_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_umult_lane_v2si_uuus (__a, __b, __c);
! }
  
! __extension__ extern __inline int32x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_laneq_s16 (int16x4_t __a, int16x8_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_smult_laneq_v4hi (__a, __b, __c);
! }
  
! __extension__ extern __inline int64x2_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_laneq_s32 (int32x2_t __a, int32x4_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_smult_laneq_v2si (__a, __b, __c);
! }
  
! __extension__ extern __inline uint32x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_laneq_u16 (uint16x4_t __a, uint16x8_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_umult_laneq_v4hi_uuus (__a, __b, __c);
! }
  
! __extension__ extern __inline uint64x2_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_laneq_u32 (uint32x2_t __a, uint32x4_t __b, const int __c)
! {
!   return __builtin_aarch64_vec_umult_laneq_v2si_uuus (__a, __b, __c);
! }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_n_s16 (int16x4_t __a, int16_t __b)
  {
!   int32x4_t __result;
    __asm__ ("smull %0.4s,%1.4h,%2.h[0]"
!            : "=w"(__result)
!            : "w"(__a), "x"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_n_s32 (int32x2_t __a, int32_t __b)
  {
!   int64x2_t __result;
    __asm__ ("smull %0.2d,%1.2s,%2.s[0]"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_n_u16 (uint16x4_t __a, uint16_t __b)
  {
!   uint32x4_t __result;
    __asm__ ("umull %0.4s,%1.4h,%2.h[0]"
!            : "=w"(__result)
!            : "w"(__a), "x"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_n_u32 (uint32x2_t __a, uint32_t __b)
  {
!   uint64x2_t __result;
    __asm__ ("umull %0.2d,%1.2s,%2.s[0]"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline poly16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_p8 (poly8x8_t __a, poly8x8_t __b)
  {
!   poly16x8_t __result;
    __asm__ ("pmull %0.8h, %1.8b, %2.8b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_s8 (int8x8_t __a, int8x8_t __b)
  {
!   return __builtin_aarch64_intrinsic_vec_smult_lo_v8qi (__a, __b);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_s16 (int16x4_t __a, int16x4_t __b)
  {
!   return __builtin_aarch64_intrinsic_vec_smult_lo_v4hi (__a, __b);
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_s32 (int32x2_t __a, int32x2_t __b)
  {
!   return __builtin_aarch64_intrinsic_vec_smult_lo_v2si (__a, __b);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_u8 (uint8x8_t __a, uint8x8_t __b)
  {
!   return __builtin_aarch64_intrinsic_vec_umult_lo_v8qi_uuu (__a, __b);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_u16 (uint16x4_t __a, uint16x4_t __b)
  {
!   return __builtin_aarch64_intrinsic_vec_umult_lo_v4hi_uuu (__a, __b);
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_u32 (uint32x2_t __a, uint32x2_t __b)
  {
!   return __builtin_aarch64_intrinsic_vec_umult_lo_v2si_uuu (__a, __b);
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadal_s8 (int16x4_t __a, int8x8_t __b)
  {
!   int16x4_t __result;
    __asm__ ("sadalp %0.4h,%2.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadal_s16 (int32x2_t __a, int16x4_t __b)
  {
!   int32x2_t __result;
    __asm__ ("sadalp %0.2s,%2.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadal_s32 (int64x1_t __a, int32x2_t __b)
  {
!   int64x1_t __result;
    __asm__ ("sadalp %0.1d,%2.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadal_u8 (uint16x4_t __a, uint8x8_t __b)
  {
!   uint16x4_t __result;
    __asm__ ("uadalp %0.4h,%2.8b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadal_u16 (uint32x2_t __a, uint16x4_t __b)
  {
!   uint32x2_t __result;
    __asm__ ("uadalp %0.2s,%2.4h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadal_u32 (uint64x1_t __a, uint32x2_t __b)
  {
!   uint64x1_t __result;
    __asm__ ("uadalp %0.1d,%2.2s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadalq_s8 (int16x8_t __a, int8x16_t __b)
  {
!   int16x8_t __result;
    __asm__ ("sadalp %0.8h,%2.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadalq_s16 (int32x4_t __a, int16x8_t __b)
  {
!   int32x4_t __result;
    __asm__ ("sadalp %0.4s,%2.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadalq_s32 (int64x2_t __a, int32x4_t __b)
  {
!   int64x2_t __result;
    __asm__ ("sadalp %0.2d,%2.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadalq_u8 (uint16x8_t __a, uint8x16_t __b)
  {
!   uint16x8_t __result;
    __asm__ ("uadalp %0.8h,%2.16b"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadalq_u16 (uint32x4_t __a, uint16x8_t __b)
  {
!   uint32x4_t __result;
    __asm__ ("uadalp %0.4s,%2.8h"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadalq_u32 (uint64x2_t __a, uint32x4_t __b)
  {
!   uint64x2_t __result;
    __asm__ ("uadalp %0.2d,%2.4s"
!            : "=w"(__result)
!            : "0"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddl_s8 (int8x8_t __a)
  {
!   int16x4_t __result;
    __asm__ ("saddlp %0.4h,%1.8b"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddl_s16 (int16x4_t __a)
  {
!   int32x2_t __result;
    __asm__ ("saddlp %0.2s,%1.4h"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddl_s32 (int32x2_t __a)
  {
!   int64x1_t __result;
    __asm__ ("saddlp %0.1d,%1.2s"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddl_u8 (uint8x8_t __a)
  {
!   uint16x4_t __result;
    __asm__ ("uaddlp %0.4h,%1.8b"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddl_u16 (uint16x4_t __a)
  {
!   uint32x2_t __result;
    __asm__ ("uaddlp %0.2s,%1.4h"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddl_u32 (uint32x2_t __a)
  {
!   uint64x1_t __result;
    __asm__ ("uaddlp %0.1d,%1.2s"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddlq_s8 (int8x16_t __a)
  {
!   int16x8_t __result;
    __asm__ ("saddlp %0.8h,%1.16b"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddlq_s16 (int16x8_t __a)
  {
!   int32x4_t __result;
    __asm__ ("saddlp %0.4s,%1.8h"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddlq_s32 (int32x4_t __a)
  {
!   int64x2_t __result;
    __asm__ ("saddlp %0.2d,%1.4s"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddlq_u8 (uint8x16_t __a)
  {
!   uint16x8_t __result;
    __asm__ ("uaddlp %0.8h,%1.16b"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddlq_u16 (uint16x8_t __a)
  {
!   uint32x4_t __result;
    __asm__ ("uaddlp %0.4s,%1.8h"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddlq_u32 (uint32x4_t __a)
  {
!   uint64x2_t __result;
    __asm__ ("uaddlp %0.2d,%1.4s"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_s8 (int8x16_t __a, int8x16_t __b)
  {
!   int8x16_t __result;
    __asm__ ("addp %0.16b,%1.16b,%2.16b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_s16 (int16x8_t __a, int16x8_t __b)
  {
!   int16x8_t __result;
    __asm__ ("addp %0.8h,%1.8h,%2.8h"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_s32 (int32x4_t __a, int32x4_t __b)
  {
!   int32x4_t __result;
    __asm__ ("addp %0.4s,%1.4s,%2.4s"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_s64 (int64x2_t __a, int64x2_t __b)
  {
!   int64x2_t __result;
    __asm__ ("addp %0.2d,%1.2d,%2.2d"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_u8 (uint8x16_t __a, uint8x16_t __b)
  {
!   uint8x16_t __result;
    __asm__ ("addp %0.16b,%1.16b,%2.16b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_u16 (uint16x8_t __a, uint16x8_t __b)
  {
!   uint16x8_t __result;
    __asm__ ("addp %0.8h,%1.8h,%2.8h"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_u32 (uint32x4_t __a, uint32x4_t __b)
  {
!   uint32x4_t __result;
    __asm__ ("addp %0.4s,%1.4s,%2.4s"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_u64 (uint64x2_t __a, uint64x2_t __b)
  {
!   uint64x2_t __result;
    __asm__ ("addp %0.2d,%1.2d,%2.2d"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqdmulh_n_s16 (int16x4_t __a, int16_t __b)
  {
!   int16x4_t __result;
    __asm__ ("sqdmulh %0.4h,%1.4h,%2.h[0]"
!            : "=w"(__result)
!            : "w"(__a), "x"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqdmulh_n_s32 (int32x2_t __a, int32_t __b)
  {
!   int32x2_t __result;
    __asm__ ("sqdmulh %0.2s,%1.2s,%2.s[0]"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqdmulhq_n_s16 (int16x8_t __a, int16_t __b)
  {
!   int16x8_t __result;
    __asm__ ("sqdmulh %0.8h,%1.8h,%2.h[0]"
!            : "=w"(__result)
!            : "w"(__a), "x"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqdmulhq_n_s32 (int32x4_t __a, int32_t __b)
  {
!   int32x4_t __result;
    __asm__ ("sqdmulh %0.4s,%1.4s,%2.s[0]"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovn_high_s16 (int8x8_t __a, int16x8_t __b)
  {
!   int8x16_t __result = vcombine_s8 (__a, vcreate_s8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("sqxtn2 %0.16b, %1.8h"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovn_high_s32 (int16x4_t __a, int32x4_t __b)
  {
!   int16x8_t __result = vcombine_s16 (__a, vcreate_s16 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("sqxtn2 %0.8h, %1.4s"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovn_high_s64 (int32x2_t __a, int64x2_t __b)
  {
!   int32x4_t __result = vcombine_s32 (__a, vcreate_s32 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("sqxtn2 %0.4s, %1.2d"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovn_high_u16 (uint8x8_t __a, uint16x8_t __b)
  {
!   uint8x16_t __result = vcombine_u8 (__a, vcreate_u8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("uqxtn2 %0.16b, %1.8h"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovn_high_u32 (uint16x4_t __a, uint32x4_t __b)
  {
!   uint16x8_t __result = vcombine_u16 (__a, vcreate_u16 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("uqxtn2 %0.8h, %1.4s"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovn_high_u64 (uint32x2_t __a, uint64x2_t __b)
  {
!   uint32x4_t __result = vcombine_u32 (__a, vcreate_u32 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("uqxtn2 %0.4s, %1.2d"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovun_high_s16 (uint8x8_t __a, int16x8_t __b)
  {
!   uint8x16_t __result = vcombine_u8 (__a, vcreate_u8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("sqxtun2 %0.16b, %1.8h"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovun_high_s32 (uint16x4_t __a, int32x4_t __b)
  {
!   uint16x8_t __result = vcombine_u16 (__a, vcreate_u16 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("sqxtun2 %0.8h, %1.4s"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqmovun_high_s64 (uint32x2_t __a, int64x2_t __b)
  {
!   uint32x4_t __result = vcombine_u32 (__a, vcreate_u32 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("sqxtun2 %0.4s, %1.2d"
!            : "+w"(__result)
!            : "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqrdmulh_n_s16 (int16x4_t __a, int16_t __b)
  {
!   int16x4_t __result;
    __asm__ ("sqrdmulh %0.4h,%1.4h,%2.h[0]"
!            : "=w"(__result)
!            : "w"(__a), "x"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqrdmulh_n_s32 (int32x2_t __a, int32_t __b)
  {
!   int32x2_t __result;
    __asm__ ("sqrdmulh %0.2s,%1.2s,%2.s[0]"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqrdmulhq_n_s16 (int16x8_t __a, int16_t __b)
  {
!   int16x8_t __result;
    __asm__ ("sqrdmulh %0.8h,%1.8h,%2.h[0]"
!            : "=w"(__result)
!            : "w"(__a), "x"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqrdmulhq_n_s32 (int32x4_t __a, int32_t __b)
  {
!   int32x4_t __result;
    __asm__ ("sqrdmulh %0.4s,%1.4s,%2.s[0]"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  #define vqrshrn_high_n_s16(a, b, c)                                     \
*************** vqrdmulhq_n_s32 (int32x4_t a, int32_t b)
*** 10544,10569 ****
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrsqrte_u32 (uint32x2_t a)
  {
!   uint32x2_t result;
    __asm__ ("ursqrte %0.2s,%1.2s"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrsqrteq_u32 (uint32x4_t a)
  {
!   uint32x4_t result;
    __asm__ ("ursqrte %0.4s,%1.4s"
!            : "=w"(result)
!            : "w"(a)
             : /* No clobbers */);
!   return result;
  }
  
  #define vshrn_high_n_s16(a, b, c)                                       \
--- 10413,10438 ----
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrsqrte_u32 (uint32x2_t __a)
  {
!   uint32x2_t __result;
    __asm__ ("ursqrte %0.2s,%1.2s"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrsqrteq_u32 (uint32x4_t __a)
  {
!   uint32x4_t __result;
    __asm__ ("ursqrte %0.4s,%1.4s"
!            : "=w"(__result)
!            : "w"(__a)
             : /* No clobbers */);
!   return __result;
  }
  
  #define vshrn_high_n_s16(a, b, c)                                       \
*************** vrsqrteq_u32 (uint32x4_t a)
*** 10860,10907 ****
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtst_p8 (poly8x8_t a, poly8x8_t b)
  {
!   return (uint8x8_t) ((((uint8x8_t) a) & ((uint8x8_t) b))
  		       != 0);
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtst_p16 (poly16x4_t a, poly16x4_t b)
  {
!   return (uint16x4_t) ((((uint16x4_t) a) & ((uint16x4_t) b))
  		       != 0);
  }
  
  __extension__ extern __inline uint64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtst_p64 (poly64x1_t a, poly64x1_t b)
  {
!   return (uint64x1_t) ((a & b) != __AARCH64_INT64_C (0));
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtstq_p8 (poly8x16_t a, poly8x16_t b)
  {
!   return (uint8x16_t) ((((uint8x16_t) a) & ((uint8x16_t) b))
  		       != 0);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtstq_p16 (poly16x8_t a, poly16x8_t b)
  {
!   return (uint16x8_t) ((((uint16x8_t) a) & ((uint16x8_t) b))
  		       != 0);
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtstq_p64 (poly64x2_t a, poly64x2_t b)
  {
!   return (uint64x2_t) ((((uint64x2_t) a) & ((uint64x2_t) b))
  		       != __AARCH64_INT64_C (0));
  }
  
--- 10729,10776 ----
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtst_p8 (poly8x8_t __a, poly8x8_t __b)
  {
!   return (uint8x8_t) ((((uint8x8_t) __a) & ((uint8x8_t) __b))
  		       != 0);
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtst_p16 (poly16x4_t __a, poly16x4_t __b)
  {
!   return (uint16x4_t) ((((uint16x4_t) __a) & ((uint16x4_t) __b))
  		       != 0);
  }
  
  __extension__ extern __inline uint64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtst_p64 (poly64x1_t __a, poly64x1_t __b)
  {
!   return (uint64x1_t) ((__a & __b) != __AARCH64_INT64_C (0));
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtstq_p8 (poly8x16_t __a, poly8x16_t __b)
  {
!   return (uint8x16_t) ((((uint8x16_t) __a) & ((uint8x16_t) __b))
  		       != 0);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtstq_p16 (poly16x8_t __a, poly16x8_t __b)
  {
!   return (uint16x8_t) ((((uint16x8_t) __a) & ((uint16x8_t) __b))
  		       != 0);
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtstq_p64 (poly64x2_t __a, poly64x2_t __b)
  {
!   return (uint64x2_t) ((((uint64x2_t) __a) & ((uint64x2_t) __b))
  		       != __AARCH64_INT64_C (0));
  }
  
*************** __ST4_LANE_FUNC (uint64x2x4_t, uint64_t,
*** 11248,11267 ****
  
  __extension__ extern __inline int64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlv_s32 (int32x2_t a)
  {
!   int64_t result;
!   __asm__ ("saddlp %0.1d, %1.2s" : "=w"(result) : "w"(a) : );
!   return result;
  }
  
  __extension__ extern __inline uint64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlv_u32 (uint32x2_t a)
  {
!   uint64_t result;
!   __asm__ ("uaddlp %0.1d, %1.2s" : "=w"(result) : "w"(a) : );
!   return result;
  }
  
  __extension__ extern __inline int16x4_t
--- 11117,11136 ----
  
  __extension__ extern __inline int64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlv_s32 (int32x2_t __a)
  {
!   int64_t __result;
!   __asm__ ("saddlp %0.1d, %1.2s" : "=w"(__result) : "w"(__a) : );
!   return __result;
  }
  
  __extension__ extern __inline uint64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vaddlv_u32 (uint32x2_t __a)
  {
!   uint64_t __result;
!   __asm__ ("uaddlp %0.1d, %1.2s" : "=w"(__result) : "w"(__a) : );
!   return __result;
  }
  
  __extension__ extern __inline int16x4_t
*************** vqrdmulhq_laneq_s32 (int32x4_t __a, int3
*** 11324,11690 ****
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl1_p8 (poly8x16_t a, uint8x8_t b)
  {
!   poly8x8_t result;
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl1_s8 (int8x16_t a, uint8x8_t b)
  {
!   int8x8_t result;
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl1_u8 (uint8x16_t a, uint8x8_t b)
  {
!   uint8x8_t result;
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl1q_p8 (poly8x16_t a, uint8x16_t b)
  {
!   poly8x16_t result;
    __asm__ ("tbl %0.16b, {%1.16b}, %2.16b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl1q_s8 (int8x16_t a, uint8x16_t b)
  {
!   int8x16_t result;
    __asm__ ("tbl %0.16b, {%1.16b}, %2.16b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl1q_u8 (uint8x16_t a, uint8x16_t b)
  {
!   uint8x16_t result;
    __asm__ ("tbl %0.16b, {%1.16b}, %2.16b"
!            : "=w"(result)
!            : "w"(a), "w"(b)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx1_s8 (int8x8_t r, int8x16_t tab, uint8x8_t idx)
  {
!   int8x8_t result = r;
    __asm__ ("tbx %0.8b,{%1.16b},%2.8b"
!            : "+w"(result)
!            : "w"(tab), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx1_u8 (uint8x8_t r, uint8x16_t tab, uint8x8_t idx)
  {
!   uint8x8_t result = r;
    __asm__ ("tbx %0.8b,{%1.16b},%2.8b"
!            : "+w"(result)
!            : "w"(tab), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx1_p8 (poly8x8_t r, poly8x16_t tab, uint8x8_t idx)
  {
!   poly8x8_t result = r;
    __asm__ ("tbx %0.8b,{%1.16b},%2.8b"
!            : "+w"(result)
!            : "w"(tab), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx1q_s8 (int8x16_t r, int8x16_t tab, uint8x16_t idx)
  {
!   int8x16_t result = r;
    __asm__ ("tbx %0.16b,{%1.16b},%2.16b"
!            : "+w"(result)
!            : "w"(tab), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx1q_u8 (uint8x16_t r, uint8x16_t tab, uint8x16_t idx)
  {
!   uint8x16_t result = r;
    __asm__ ("tbx %0.16b,{%1.16b},%2.16b"
!            : "+w"(result)
!            : "w"(tab), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx1q_p8 (poly8x16_t r, poly8x16_t tab, uint8x16_t idx)
  {
!   poly8x16_t result = r;
    __asm__ ("tbx %0.16b,{%1.16b},%2.16b"
!            : "+w"(result)
!            : "w"(tab), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  /* V7 legacy table intrinsics.  */
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl1_s8 (int8x8_t tab, int8x8_t idx)
  {
!   int8x8_t result;
!   int8x16_t temp = vcombine_s8 (tab, vcreate_s8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(result)
!            : "w"(temp), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl1_u8 (uint8x8_t tab, uint8x8_t idx)
  {
!   uint8x8_t result;
!   uint8x16_t temp = vcombine_u8 (tab, vcreate_u8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(result)
!            : "w"(temp), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl1_p8 (poly8x8_t tab, uint8x8_t idx)
  {
!   poly8x8_t result;
!   poly8x16_t temp = vcombine_p8 (tab, vcreate_p8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(result)
!            : "w"(temp), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl2_s8 (int8x8x2_t tab, int8x8_t idx)
  {
!   int8x8_t result;
!   int8x16_t temp = vcombine_s8 (tab.val[0], tab.val[1]);
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(result)
!            : "w"(temp), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl2_u8 (uint8x8x2_t tab, uint8x8_t idx)
  {
!   uint8x8_t result;
!   uint8x16_t temp = vcombine_u8 (tab.val[0], tab.val[1]);
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(result)
!            : "w"(temp), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl2_p8 (poly8x8x2_t tab, uint8x8_t idx)
  {
!   poly8x8_t result;
!   poly8x16_t temp = vcombine_p8 (tab.val[0], tab.val[1]);
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(result)
!            : "w"(temp), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl3_s8 (int8x8x3_t tab, int8x8_t idx)
  {
!   int8x8_t result;
!   int8x16x2_t temp;
    __builtin_aarch64_simd_oi __o;
!   temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]);
!   temp.val[1] = vcombine_s8 (tab.val[2], vcreate_s8 (__AARCH64_UINT64_C (0x0)));
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[1], 1);
!   result = __builtin_aarch64_tbl3v8qi (__o, idx);
!   return result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl3_u8 (uint8x8x3_t tab, uint8x8_t idx)
  {
!   uint8x8_t result;
!   uint8x16x2_t temp;
    __builtin_aarch64_simd_oi __o;
!   temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]);
!   temp.val[1] = vcombine_u8 (tab.val[2], vcreate_u8 (__AARCH64_UINT64_C (0x0)));
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[1], 1);
!   result = (uint8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)idx);
!   return result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl3_p8 (poly8x8x3_t tab, uint8x8_t idx)
  {
!   poly8x8_t result;
!   poly8x16x2_t temp;
    __builtin_aarch64_simd_oi __o;
!   temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]);
!   temp.val[1] = vcombine_p8 (tab.val[2], vcreate_p8 (__AARCH64_UINT64_C (0x0)));
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[1], 1);
!   result = (poly8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)idx);
!   return result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl4_s8 (int8x8x4_t tab, int8x8_t idx)
  {
!   int8x8_t result;
!   int8x16x2_t temp;
    __builtin_aarch64_simd_oi __o;
!   temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]);
!   temp.val[1] = vcombine_s8 (tab.val[2], tab.val[3]);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[1], 1);
!   result = __builtin_aarch64_tbl3v8qi (__o, idx);
!   return result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl4_u8 (uint8x8x4_t tab, uint8x8_t idx)
  {
!   uint8x8_t result;
!   uint8x16x2_t temp;
    __builtin_aarch64_simd_oi __o;
!   temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]);
!   temp.val[1] = vcombine_u8 (tab.val[2], tab.val[3]);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[1], 1);
!   result = (uint8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)idx);
!   return result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl4_p8 (poly8x8x4_t tab, uint8x8_t idx)
  {
!   poly8x8_t result;
!   poly8x16x2_t temp;
    __builtin_aarch64_simd_oi __o;
!   temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]);
!   temp.val[1] = vcombine_p8 (tab.val[2], tab.val[3]);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[1], 1);
!   result = (poly8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)idx);
!   return result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbx2_s8 (int8x8_t r, int8x8x2_t tab, int8x8_t idx)
  {
!   int8x8_t result = r;
!   int8x16_t temp = vcombine_s8 (tab.val[0], tab.val[1]);
    __asm__ ("tbx %0.8b, {%1.16b}, %2.8b"
!            : "+w"(result)
!            : "w"(temp), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbx2_u8 (uint8x8_t r, uint8x8x2_t tab, uint8x8_t idx)
  {
!   uint8x8_t result = r;
!   uint8x16_t temp = vcombine_u8 (tab.val[0], tab.val[1]);
    __asm__ ("tbx %0.8b, {%1.16b}, %2.8b"
!            : "+w"(result)
!            : "w"(temp), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbx2_p8 (poly8x8_t r, poly8x8x2_t tab, uint8x8_t idx)
  {
!   poly8x8_t result = r;
!   poly8x16_t temp = vcombine_p8 (tab.val[0], tab.val[1]);
    __asm__ ("tbx %0.8b, {%1.16b}, %2.8b"
!            : "+w"(result)
!            : "w"(temp), "w"(idx)
             : /* No clobbers */);
!   return result;
  }
  
  /* End of temporary inline asm.  */
--- 11193,11559 ----
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl1_p8 (poly8x16_t __a, uint8x8_t __b)
  {
!   poly8x8_t __result;
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl1_s8 (int8x16_t __a, uint8x8_t __b)
  {
!   int8x8_t __result;
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl1_u8 (uint8x16_t __a, uint8x8_t __b)
  {
!   uint8x8_t __result;
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl1q_p8 (poly8x16_t __a, uint8x16_t __b)
  {
!   poly8x16_t __result;
    __asm__ ("tbl %0.16b, {%1.16b}, %2.16b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl1q_s8 (int8x16_t __a, uint8x16_t __b)
  {
!   int8x16_t __result;
    __asm__ ("tbl %0.16b, {%1.16b}, %2.16b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl1q_u8 (uint8x16_t __a, uint8x16_t __b)
  {
!   uint8x16_t __result;
    __asm__ ("tbl %0.16b, {%1.16b}, %2.16b"
!            : "=w"(__result)
!            : "w"(__a), "w"(__b)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx1_s8 (int8x8_t __r, int8x16_t __tab, uint8x8_t __idx)
  {
!   int8x8_t __result = __r;
    __asm__ ("tbx %0.8b,{%1.16b},%2.8b"
!            : "+w"(__result)
!            : "w"(__tab), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx1_u8 (uint8x8_t __r, uint8x16_t __tab, uint8x8_t __idx)
  {
!   uint8x8_t __result = __r;
    __asm__ ("tbx %0.8b,{%1.16b},%2.8b"
!            : "+w"(__result)
!            : "w"(__tab), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx1_p8 (poly8x8_t __r, poly8x16_t __tab, uint8x8_t __idx)
  {
!   poly8x8_t __result = __r;
    __asm__ ("tbx %0.8b,{%1.16b},%2.8b"
!            : "+w"(__result)
!            : "w"(__tab), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx1q_s8 (int8x16_t __r, int8x16_t __tab, uint8x16_t __idx)
  {
!   int8x16_t __result = __r;
    __asm__ ("tbx %0.16b,{%1.16b},%2.16b"
!            : "+w"(__result)
!            : "w"(__tab), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx1q_u8 (uint8x16_t __r, uint8x16_t __tab, uint8x16_t __idx)
  {
!   uint8x16_t __result = __r;
    __asm__ ("tbx %0.16b,{%1.16b},%2.16b"
!            : "+w"(__result)
!            : "w"(__tab), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx1q_p8 (poly8x16_t __r, poly8x16_t __tab, uint8x16_t __idx)
  {
!   poly8x16_t __result = __r;
    __asm__ ("tbx %0.16b,{%1.16b},%2.16b"
!            : "+w"(__result)
!            : "w"(__tab), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  /* V7 legacy table intrinsics.  */
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl1_s8 (int8x8_t __tab, int8x8_t __idx)
  {
!   int8x8_t __result;
!   int8x16_t __temp = vcombine_s8 (__tab, vcreate_s8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(__result)
!            : "w"(__temp), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl1_u8 (uint8x8_t __tab, uint8x8_t __idx)
  {
!   uint8x8_t __result;
!   uint8x16_t __temp = vcombine_u8 (__tab, vcreate_u8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(__result)
!            : "w"(__temp), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl1_p8 (poly8x8_t __tab, uint8x8_t __idx)
  {
!   poly8x8_t __result;
!   poly8x16_t __temp = vcombine_p8 (__tab, vcreate_p8 (__AARCH64_UINT64_C (0x0)));
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(__result)
!            : "w"(__temp), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl2_s8 (int8x8x2_t __tab, int8x8_t __idx)
  {
!   int8x8_t __result;
!   int8x16_t __temp = vcombine_s8 (__tab.val[0], __tab.val[1]);
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(__result)
!            : "w"(__temp), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl2_u8 (uint8x8x2_t __tab, uint8x8_t __idx)
  {
!   uint8x8_t __result;
!   uint8x16_t __temp = vcombine_u8 (__tab.val[0], __tab.val[1]);
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(__result)
!            : "w"(__temp), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl2_p8 (poly8x8x2_t __tab, uint8x8_t __idx)
  {
!   poly8x8_t __result;
!   poly8x16_t __temp = vcombine_p8 (__tab.val[0], __tab.val[1]);
    __asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
!            : "=w"(__result)
!            : "w"(__temp), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl3_s8 (int8x8x3_t __tab, int8x8_t __idx)
  {
!   int8x8_t __result;
!   int8x16x2_t __temp;
    __builtin_aarch64_simd_oi __o;
!   __temp.val[0] = vcombine_s8 (__tab.val[0], __tab.val[1]);
!   __temp.val[1] = vcombine_s8 (__tab.val[2], vcreate_s8 (__AARCH64_UINT64_C (0x0)));
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[1], 1);
!   __result = __builtin_aarch64_tbl3v8qi (__o, __idx);
!   return __result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl3_u8 (uint8x8x3_t __tab, uint8x8_t __idx)
  {
!   uint8x8_t __result;
!   uint8x16x2_t __temp;
    __builtin_aarch64_simd_oi __o;
!   __temp.val[0] = vcombine_u8 (__tab.val[0], __tab.val[1]);
!   __temp.val[1] = vcombine_u8 (__tab.val[2], vcreate_u8 (__AARCH64_UINT64_C (0x0)));
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[1], 1);
!   __result = (uint8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)__idx);
!   return __result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl3_p8 (poly8x8x3_t __tab, uint8x8_t __idx)
  {
!   poly8x8_t __result;
!   poly8x16x2_t __temp;
    __builtin_aarch64_simd_oi __o;
!   __temp.val[0] = vcombine_p8 (__tab.val[0], __tab.val[1]);
!   __temp.val[1] = vcombine_p8 (__tab.val[2], vcreate_p8 (__AARCH64_UINT64_C (0x0)));
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[1], 1);
!   __result = (poly8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)__idx);
!   return __result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl4_s8 (int8x8x4_t __tab, int8x8_t __idx)
  {
!   int8x8_t __result;
!   int8x16x2_t __temp;
    __builtin_aarch64_simd_oi __o;
!   __temp.val[0] = vcombine_s8 (__tab.val[0], __tab.val[1]);
!   __temp.val[1] = vcombine_s8 (__tab.val[2], __tab.val[3]);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[1], 1);
!   __result = __builtin_aarch64_tbl3v8qi (__o, __idx);
!   return __result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl4_u8 (uint8x8x4_t __tab, uint8x8_t __idx)
  {
!   uint8x8_t __result;
!   uint8x16x2_t __temp;
    __builtin_aarch64_simd_oi __o;
!   __temp.val[0] = vcombine_u8 (__tab.val[0], __tab.val[1]);
!   __temp.val[1] = vcombine_u8 (__tab.val[2], __tab.val[3]);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[1], 1);
!   __result = (uint8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)__idx);
!   return __result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbl4_p8 (poly8x8x4_t __tab, uint8x8_t __idx)
  {
!   poly8x8_t __result;
!   poly8x16x2_t __temp;
    __builtin_aarch64_simd_oi __o;
!   __temp.val[0] = vcombine_p8 (__tab.val[0], __tab.val[1]);
!   __temp.val[1] = vcombine_p8 (__tab.val[2], __tab.val[3]);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[1], 1);
!   __result = (poly8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)__idx);
!   return __result;
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbx2_s8 (int8x8_t __r, int8x8x2_t __tab, int8x8_t __idx)
  {
!   int8x8_t __result = __r;
!   int8x16_t __temp = vcombine_s8 (__tab.val[0], __tab.val[1]);
    __asm__ ("tbx %0.8b, {%1.16b}, %2.8b"
!            : "+w"(__result)
!            : "w"(__temp), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbx2_u8 (uint8x8_t __r, uint8x8x2_t __tab, uint8x8_t __idx)
  {
!   uint8x8_t __result = __r;
!   uint8x16_t __temp = vcombine_u8 (__tab.val[0], __tab.val[1]);
    __asm__ ("tbx %0.8b, {%1.16b}, %2.8b"
!            : "+w"(__result)
!            : "w"(__temp), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtbx2_p8 (poly8x8_t __r, poly8x8x2_t __tab, uint8x8_t __idx)
  {
!   poly8x8_t __result = __r;
!   poly8x16_t __temp = vcombine_p8 (__tab.val[0], __tab.val[1]);
    __asm__ ("tbx %0.8b, {%1.16b}, %2.8b"
!            : "+w"(__result)
!            : "w"(__temp), "w"(__idx)
             : /* No clobbers */);
!   return __result;
  }
  
  /* End of temporary inline asm.  */
*************** vld1_f16 (const float16_t *__a)
*** 17063,17160 ****
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_f32 (const float32_t *a)
  {
!   return __builtin_aarch64_ld1v2sf ((const __builtin_aarch64_simd_sf *) a);
  }
  
  __extension__ extern __inline float64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_f64 (const float64_t *a)
  {
!   return (float64x1_t) {*a};
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_p8 (const poly8_t *a)
  {
    return (poly8x8_t)
!     __builtin_aarch64_ld1v8qi ((const __builtin_aarch64_simd_qi *) a);
  }
  
  __extension__ extern __inline poly16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_p16 (const poly16_t *a)
  {
    return (poly16x4_t)
!     __builtin_aarch64_ld1v4hi ((const __builtin_aarch64_simd_hi *) a);
  }
  
  __extension__ extern __inline poly64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_p64 (const poly64_t *a)
  {
!   return (poly64x1_t) {*a};
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_s8 (const int8_t *a)
  {
!   return __builtin_aarch64_ld1v8qi ((const __builtin_aarch64_simd_qi *) a);
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_s16 (const int16_t *a)
  {
!   return __builtin_aarch64_ld1v4hi ((const __builtin_aarch64_simd_hi *) a);
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_s32 (const int32_t *a)
  {
!   return __builtin_aarch64_ld1v2si ((const __builtin_aarch64_simd_si *) a);
  }
  
  __extension__ extern __inline int64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_s64 (const int64_t *a)
  {
!   return (int64x1_t) {*a};
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_u8 (const uint8_t *a)
  {
    return (uint8x8_t)
!     __builtin_aarch64_ld1v8qi ((const __builtin_aarch64_simd_qi *) a);
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_u16 (const uint16_t *a)
  {
    return (uint16x4_t)
!     __builtin_aarch64_ld1v4hi ((const __builtin_aarch64_simd_hi *) a);
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_u32 (const uint32_t *a)
  {
    return (uint32x2_t)
!     __builtin_aarch64_ld1v2si ((const __builtin_aarch64_simd_si *) a);
  }
  
  __extension__ extern __inline uint64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_u64 (const uint64_t *a)
  {
!   return (uint64x1_t) {*a};
  }
  
  /* vld1x3  */
--- 16932,17029 ----
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_f32 (const float32_t *__a)
  {
!   return __builtin_aarch64_ld1v2sf ((const __builtin_aarch64_simd_sf *) __a);
  }
  
  __extension__ extern __inline float64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_f64 (const float64_t *__a)
  {
!   return (float64x1_t) {*__a};
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_p8 (const poly8_t *__a)
  {
    return (poly8x8_t)
!     __builtin_aarch64_ld1v8qi ((const __builtin_aarch64_simd_qi *) __a);
  }
  
  __extension__ extern __inline poly16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_p16 (const poly16_t *__a)
  {
    return (poly16x4_t)
!     __builtin_aarch64_ld1v4hi ((const __builtin_aarch64_simd_hi *) __a);
  }
  
  __extension__ extern __inline poly64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_p64 (const poly64_t *__a)
  {
!   return (poly64x1_t) {*__a};
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_s8 (const int8_t *__a)
  {
!   return __builtin_aarch64_ld1v8qi ((const __builtin_aarch64_simd_qi *) __a);
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_s16 (const int16_t *__a)
  {
!   return __builtin_aarch64_ld1v4hi ((const __builtin_aarch64_simd_hi *) __a);
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_s32 (const int32_t *__a)
  {
!   return __builtin_aarch64_ld1v2si ((const __builtin_aarch64_simd_si *) __a);
  }
  
  __extension__ extern __inline int64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_s64 (const int64_t *__a)
  {
!   return (int64x1_t) {*__a};
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_u8 (const uint8_t *__a)
  {
    return (uint8x8_t)
!     __builtin_aarch64_ld1v8qi ((const __builtin_aarch64_simd_qi *) __a);
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_u16 (const uint16_t *__a)
  {
    return (uint16x4_t)
!     __builtin_aarch64_ld1v4hi ((const __builtin_aarch64_simd_hi *) __a);
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_u32 (const uint32_t *__a)
  {
    return (uint32x2_t)
!     __builtin_aarch64_ld1v2si ((const __builtin_aarch64_simd_si *) __a);
  }
  
  __extension__ extern __inline uint64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_u64 (const uint64_t *__a)
  {
!   return (uint64x1_t) {*__a};
  }
  
  /* vld1x3  */
*************** vld1q_f16 (const float16_t *__a)
*** 17536,17611 ****
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_f32 (const float32_t *a)
  {
!   return __builtin_aarch64_ld1v4sf ((const __builtin_aarch64_simd_sf *) a);
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_f64 (const float64_t *a)
  {
!   return __builtin_aarch64_ld1v2df ((const __builtin_aarch64_simd_df *) a);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_p8 (const poly8_t *a)
  {
    return (poly8x16_t)
!     __builtin_aarch64_ld1v16qi ((const __builtin_aarch64_simd_qi *) a);
  }
  
  __extension__ extern __inline poly16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_p16 (const poly16_t *a)
  {
    return (poly16x8_t)
!     __builtin_aarch64_ld1v8hi ((const __builtin_aarch64_simd_hi *) a);
  }
  
  __extension__ extern __inline poly64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_p64 (const poly64_t *a)
  {
    return (poly64x2_t)
!     __builtin_aarch64_ld1v2di ((const __builtin_aarch64_simd_di *) a);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_s8 (const int8_t *a)
  {
!   return __builtin_aarch64_ld1v16qi ((const __builtin_aarch64_simd_qi *) a);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_s16 (const int16_t *a)
  {
!   return __builtin_aarch64_ld1v8hi ((const __builtin_aarch64_simd_hi *) a);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_s32 (const int32_t *a)
  {
!   return __builtin_aarch64_ld1v4si ((const __builtin_aarch64_simd_si *) a);
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_s64 (const int64_t *a)
  {
!   return __builtin_aarch64_ld1v2di ((const __builtin_aarch64_simd_di *) a);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_u8 (const uint8_t *a)
  {
    return (uint8x16_t)
!     __builtin_aarch64_ld1v16qi ((const __builtin_aarch64_simd_qi *) a);
  }
  
  __extension__ extern __inline uint8x8x2_t
--- 17405,17480 ----
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_f32 (const float32_t *__a)
  {
!   return __builtin_aarch64_ld1v4sf ((const __builtin_aarch64_simd_sf *) __a);
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_f64 (const float64_t *__a)
  {
!   return __builtin_aarch64_ld1v2df ((const __builtin_aarch64_simd_df *) __a);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_p8 (const poly8_t *__a)
  {
    return (poly8x16_t)
!     __builtin_aarch64_ld1v16qi ((const __builtin_aarch64_simd_qi *) __a);
  }
  
  __extension__ extern __inline poly16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_p16 (const poly16_t *__a)
  {
    return (poly16x8_t)
!     __builtin_aarch64_ld1v8hi ((const __builtin_aarch64_simd_hi *) __a);
  }
  
  __extension__ extern __inline poly64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_p64 (const poly64_t *__a)
  {
    return (poly64x2_t)
!     __builtin_aarch64_ld1v2di ((const __builtin_aarch64_simd_di *) __a);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_s8 (const int8_t *__a)
  {
!   return __builtin_aarch64_ld1v16qi ((const __builtin_aarch64_simd_qi *) __a);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_s16 (const int16_t *__a)
  {
!   return __builtin_aarch64_ld1v8hi ((const __builtin_aarch64_simd_hi *) __a);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_s32 (const int32_t *__a)
  {
!   return __builtin_aarch64_ld1v4si ((const __builtin_aarch64_simd_si *) __a);
  }
  
  __extension__ extern __inline int64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_s64 (const int64_t *__a)
  {
!   return __builtin_aarch64_ld1v2di ((const __builtin_aarch64_simd_di *) __a);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_u8 (const uint8_t *__a)
  {
    return (uint8x16_t)
!     __builtin_aarch64_ld1v16qi ((const __builtin_aarch64_simd_qi *) __a);
  }
  
  __extension__ extern __inline uint8x8x2_t
*************** vld1q_p64_x2 (const poly64_t *__a)
*** 17946,17971 ****
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_u16 (const uint16_t *a)
  {
    return (uint16x8_t)
!     __builtin_aarch64_ld1v8hi ((const __builtin_aarch64_simd_hi *) a);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_u32 (const uint32_t *a)
  {
    return (uint32x4_t)
!     __builtin_aarch64_ld1v4si ((const __builtin_aarch64_simd_si *) a);
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_u64 (const uint64_t *a)
  {
    return (uint64x2_t)
!     __builtin_aarch64_ld1v2di ((const __builtin_aarch64_simd_di *) a);
  }
  
  /* vld1_dup  */
--- 17815,18122 ----
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_u16 (const uint16_t *__a)
  {
    return (uint16x8_t)
!     __builtin_aarch64_ld1v8hi ((const __builtin_aarch64_simd_hi *) __a);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_u32 (const uint32_t *__a)
  {
    return (uint32x4_t)
!     __builtin_aarch64_ld1v4si ((const __builtin_aarch64_simd_si *) __a);
  }
  
  __extension__ extern __inline uint64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_u64 (const uint64_t *__a)
  {
    return (uint64x2_t)
!     __builtin_aarch64_ld1v2di ((const __builtin_aarch64_simd_di *) __a);
! }
! 
! /* vld1(q)_x4.  */
! 
! __extension__ extern __inline int8x8x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_s8_x4 (const int8_t *__a)
! {
!   union { int8x8x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v8qi ((const __builtin_aarch64_simd_qi *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline int8x16x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_s8_x4 (const int8_t *__a)
! {
!   union { int8x16x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v16qi ((const __builtin_aarch64_simd_qi *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline int16x4x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_s16_x4 (const int16_t *__a)
! {
!   union { int16x4x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v4hi ((const __builtin_aarch64_simd_hi *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline int16x8x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_s16_x4 (const int16_t *__a)
! {
!   union { int16x8x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v8hi ((const __builtin_aarch64_simd_hi *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline int32x2x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_s32_x4 (const int32_t *__a)
! {
!   union { int32x2x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!   = __builtin_aarch64_ld1x4v2si ((const __builtin_aarch64_simd_si *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline int32x4x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_s32_x4 (const int32_t *__a)
! {
!   union { int32x4x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!   = __builtin_aarch64_ld1x4v4si ((const __builtin_aarch64_simd_si *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline uint8x8x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_u8_x4 (const uint8_t *__a)
! {
!   union { uint8x8x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v8qi ((const __builtin_aarch64_simd_qi *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline uint8x16x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_u8_x4 (const uint8_t *__a)
! {
!   union { uint8x16x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v16qi ((const __builtin_aarch64_simd_qi *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline uint16x4x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_u16_x4 (const uint16_t *__a)
! {
!   union { uint16x4x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v4hi ((const __builtin_aarch64_simd_hi *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline uint16x8x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_u16_x4 (const uint16_t *__a)
! {
!   union { uint16x8x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v8hi ((const __builtin_aarch64_simd_hi *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline uint32x2x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_u32_x4 (const uint32_t *__a)
! {
!   union { uint32x2x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v2si ((const __builtin_aarch64_simd_si *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline uint32x4x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_u32_x4 (const uint32_t *__a)
! {
!   union { uint32x4x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v4si ((const __builtin_aarch64_simd_si *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline float16x4x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_f16_x4 (const float16_t *__a)
! {
!   union { float16x4x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v4hf ((const __builtin_aarch64_simd_hf *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline float16x8x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_f16_x4 (const float16_t *__a)
! {
!   union { float16x8x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v8hf ((const __builtin_aarch64_simd_hf *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline float32x2x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_f32_x4 (const float32_t *__a)
! {
!   union { float32x2x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v2sf ((const __builtin_aarch64_simd_sf *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline float32x4x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_f32_x4 (const float32_t *__a)
! {
!   union { float32x4x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v4sf ((const __builtin_aarch64_simd_sf *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline poly8x8x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_p8_x4 (const poly8_t *__a)
! {
!   union { poly8x8x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v8qi ((const __builtin_aarch64_simd_qi *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline poly8x16x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_p8_x4 (const poly8_t *__a)
! {
!   union { poly8x16x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v16qi ((const __builtin_aarch64_simd_qi *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline poly16x4x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_p16_x4 (const poly16_t *__a)
! {
!   union { poly16x4x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v4hi ((const __builtin_aarch64_simd_hi *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline poly16x8x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_p16_x4 (const poly16_t *__a)
! {
!   union { poly16x8x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v8hi ((const __builtin_aarch64_simd_hi *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline int64x1x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_s64_x4 (const int64_t *__a)
! {
!   union { int64x1x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4di ((const __builtin_aarch64_simd_di *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline uint64x1x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_u64_x4 (const uint64_t *__a)
! {
!   union { uint64x1x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4di ((const __builtin_aarch64_simd_di *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline poly64x1x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_p64_x4 (const poly64_t *__a)
! {
!   union { poly64x1x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4di ((const __builtin_aarch64_simd_di *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline int64x2x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_s64_x4 (const int64_t *__a)
! {
!   union { int64x2x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v2di ((const __builtin_aarch64_simd_di *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline uint64x2x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_u64_x4 (const uint64_t *__a)
! {
!   union { uint64x2x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v2di ((const __builtin_aarch64_simd_di *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline poly64x2x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_p64_x4 (const poly64_t *__a)
! {
!   union { poly64x2x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v2di ((const __builtin_aarch64_simd_di *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline float64x1x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1_f64_x4 (const float64_t *__a)
! {
!   union { float64x1x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4df ((const __builtin_aarch64_simd_df *) __a);
!   return __au.__i;
! }
! 
! __extension__ extern __inline float64x2x4_t
! __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vld1q_f64_x4 (const float64_t *__a)
! {
!   union { float64x2x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
!   __au.__o
!     = __builtin_aarch64_ld1x4v2df ((const __builtin_aarch64_simd_df *) __a);
!   return __au.__i;
  }
  
  /* vld1_dup  */
*************** vmulxd_laneq_f64 (float64_t __a, float64
*** 21115,21442 ****
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_s8 (int8x8_t a, int8x8_t b)
  {
!   return __builtin_aarch64_smaxpv8qi (a, b);
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_s16 (int16x4_t a, int16x4_t b)
  {
!   return __builtin_aarch64_smaxpv4hi (a, b);
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_s32 (int32x2_t a, int32x2_t b)
  {
!   return __builtin_aarch64_smaxpv2si (a, b);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_u8 (uint8x8_t a, uint8x8_t b)
  {
!   return (uint8x8_t) __builtin_aarch64_umaxpv8qi ((int8x8_t) a,
! 						  (int8x8_t) b);
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_u16 (uint16x4_t a, uint16x4_t b)
  {
!   return (uint16x4_t) __builtin_aarch64_umaxpv4hi ((int16x4_t) a,
! 						   (int16x4_t) b);
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_u32 (uint32x2_t a, uint32x2_t b)
  {
!   return (uint32x2_t) __builtin_aarch64_umaxpv2si ((int32x2_t) a,
! 						   (int32x2_t) b);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_s8 (int8x16_t a, int8x16_t b)
  {
!   return __builtin_aarch64_smaxpv16qi (a, b);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_s16 (int16x8_t a, int16x8_t b)
  {
!   return __builtin_aarch64_smaxpv8hi (a, b);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_s32 (int32x4_t a, int32x4_t b)
  {
!   return __builtin_aarch64_smaxpv4si (a, b);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_u8 (uint8x16_t a, uint8x16_t b)
  {
!   return (uint8x16_t) __builtin_aarch64_umaxpv16qi ((int8x16_t) a,
! 						    (int8x16_t) b);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_u16 (uint16x8_t a, uint16x8_t b)
  {
!   return (uint16x8_t) __builtin_aarch64_umaxpv8hi ((int16x8_t) a,
! 						   (int16x8_t) b);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_u32 (uint32x4_t a, uint32x4_t b)
  {
!   return (uint32x4_t) __builtin_aarch64_umaxpv4si ((int32x4_t) a,
! 						   (int32x4_t) b);
  }
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_f32 (float32x2_t a, float32x2_t b)
  {
!   return __builtin_aarch64_smax_nanpv2sf (a, b);
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_f32 (float32x4_t a, float32x4_t b)
  {
!   return __builtin_aarch64_smax_nanpv4sf (a, b);
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_f64 (float64x2_t a, float64x2_t b)
  {
!   return __builtin_aarch64_smax_nanpv2df (a, b);
  }
  
  __extension__ extern __inline float64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxqd_f64 (float64x2_t a)
  {
!   return __builtin_aarch64_reduc_smax_nan_scal_v2df (a);
  }
  
  __extension__ extern __inline float32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxs_f32 (float32x2_t a)
  {
!   return __builtin_aarch64_reduc_smax_nan_scal_v2sf (a);
  }
  
  /* vpmaxnm  */
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnm_f32 (float32x2_t a, float32x2_t b)
  {
!   return __builtin_aarch64_smaxpv2sf (a, b);
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnmq_f32 (float32x4_t a, float32x4_t b)
  {
!   return __builtin_aarch64_smaxpv4sf (a, b);
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnmq_f64 (float64x2_t a, float64x2_t b)
  {
!   return __builtin_aarch64_smaxpv2df (a, b);
  }
  
  __extension__ extern __inline float64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnmqd_f64 (float64x2_t a)
  {
!   return __builtin_aarch64_reduc_smax_scal_v2df (a);
  }
  
  __extension__ extern __inline float32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnms_f32 (float32x2_t a)
  {
!   return __builtin_aarch64_reduc_smax_scal_v2sf (a);
  }
  
  /* vpmin  */
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_s8 (int8x8_t a, int8x8_t b)
  {
!   return __builtin_aarch64_sminpv8qi (a, b);
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_s16 (int16x4_t a, int16x4_t b)
  {
!   return __builtin_aarch64_sminpv4hi (a, b);
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_s32 (int32x2_t a, int32x2_t b)
  {
!   return __builtin_aarch64_sminpv2si (a, b);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_u8 (uint8x8_t a, uint8x8_t b)
  {
!   return (uint8x8_t) __builtin_aarch64_uminpv8qi ((int8x8_t) a,
! 						  (int8x8_t) b);
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_u16 (uint16x4_t a, uint16x4_t b)
  {
!   return (uint16x4_t) __builtin_aarch64_uminpv4hi ((int16x4_t) a,
! 						   (int16x4_t) b);
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_u32 (uint32x2_t a, uint32x2_t b)
  {
!   return (uint32x2_t) __builtin_aarch64_uminpv2si ((int32x2_t) a,
! 						   (int32x2_t) b);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_s8 (int8x16_t a, int8x16_t b)
  {
!   return __builtin_aarch64_sminpv16qi (a, b);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_s16 (int16x8_t a, int16x8_t b)
  {
!   return __builtin_aarch64_sminpv8hi (a, b);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_s32 (int32x4_t a, int32x4_t b)
  {
!   return __builtin_aarch64_sminpv4si (a, b);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_u8 (uint8x16_t a, uint8x16_t b)
  {
!   return (uint8x16_t) __builtin_aarch64_uminpv16qi ((int8x16_t) a,
! 						    (int8x16_t) b);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_u16 (uint16x8_t a, uint16x8_t b)
  {
!   return (uint16x8_t) __builtin_aarch64_uminpv8hi ((int16x8_t) a,
! 						   (int16x8_t) b);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_u32 (uint32x4_t a, uint32x4_t b)
  {
!   return (uint32x4_t) __builtin_aarch64_uminpv4si ((int32x4_t) a,
! 						   (int32x4_t) b);
  }
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_f32 (float32x2_t a, float32x2_t b)
  {
!   return __builtin_aarch64_smin_nanpv2sf (a, b);
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_f32 (float32x4_t a, float32x4_t b)
  {
!   return __builtin_aarch64_smin_nanpv4sf (a, b);
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_f64 (float64x2_t a, float64x2_t b)
  {
!   return __builtin_aarch64_smin_nanpv2df (a, b);
  }
  
  __extension__ extern __inline float64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminqd_f64 (float64x2_t a)
  {
!   return __builtin_aarch64_reduc_smin_nan_scal_v2df (a);
  }
  
  __extension__ extern __inline float32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmins_f32 (float32x2_t a)
  {
!   return __builtin_aarch64_reduc_smin_nan_scal_v2sf (a);
  }
  
  /* vpminnm  */
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnm_f32 (float32x2_t a, float32x2_t b)
  {
!   return __builtin_aarch64_sminpv2sf (a, b);
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnmq_f32 (float32x4_t a, float32x4_t b)
  {
!   return __builtin_aarch64_sminpv4sf (a, b);
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnmq_f64 (float64x2_t a, float64x2_t b)
  {
!   return __builtin_aarch64_sminpv2df (a, b);
  }
  
  __extension__ extern __inline float64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnmqd_f64 (float64x2_t a)
  {
!   return __builtin_aarch64_reduc_smin_scal_v2df (a);
  }
  
  __extension__ extern __inline float32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnms_f32 (float32x2_t a)
  {
!   return __builtin_aarch64_reduc_smin_scal_v2sf (a);
  }
  
  /* vmaxnm  */
--- 21266,21593 ----
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_s8 (int8x8_t __a, int8x8_t __b)
  {
!   return __builtin_aarch64_smaxpv8qi (__a, __b);
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_s16 (int16x4_t __a, int16x4_t __b)
  {
!   return __builtin_aarch64_smaxpv4hi (__a, __b);
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_s32 (int32x2_t __a, int32x2_t __b)
  {
!   return __builtin_aarch64_smaxpv2si (__a, __b);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_u8 (uint8x8_t __a, uint8x8_t __b)
  {
!   return (uint8x8_t) __builtin_aarch64_umaxpv8qi ((int8x8_t) __a,
! 						  (int8x8_t) __b);
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_u16 (uint16x4_t __a, uint16x4_t __b)
  {
!   return (uint16x4_t) __builtin_aarch64_umaxpv4hi ((int16x4_t) __a,
! 						   (int16x4_t) __b);
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_u32 (uint32x2_t __a, uint32x2_t __b)
  {
!   return (uint32x2_t) __builtin_aarch64_umaxpv2si ((int32x2_t) __a,
! 						   (int32x2_t) __b);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_s8 (int8x16_t __a, int8x16_t __b)
  {
!   return __builtin_aarch64_smaxpv16qi (__a, __b);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_s16 (int16x8_t __a, int16x8_t __b)
  {
!   return __builtin_aarch64_smaxpv8hi (__a, __b);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_s32 (int32x4_t __a, int32x4_t __b)
  {
!   return __builtin_aarch64_smaxpv4si (__a, __b);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_u8 (uint8x16_t __a, uint8x16_t __b)
  {
!   return (uint8x16_t) __builtin_aarch64_umaxpv16qi ((int8x16_t) __a,
! 						    (int8x16_t) __b);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_u16 (uint16x8_t __a, uint16x8_t __b)
  {
!   return (uint16x8_t) __builtin_aarch64_umaxpv8hi ((int16x8_t) __a,
! 						   (int16x8_t) __b);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_u32 (uint32x4_t __a, uint32x4_t __b)
  {
!   return (uint32x4_t) __builtin_aarch64_umaxpv4si ((int32x4_t) __a,
! 						   (int32x4_t) __b);
  }
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_f32 (float32x2_t __a, float32x2_t __b)
  {
!   return __builtin_aarch64_smax_nanpv2sf (__a, __b);
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_f32 (float32x4_t __a, float32x4_t __b)
  {
!   return __builtin_aarch64_smax_nanpv4sf (__a, __b);
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_f64 (float64x2_t __a, float64x2_t __b)
  {
!   return __builtin_aarch64_smax_nanpv2df (__a, __b);
  }
  
  __extension__ extern __inline float64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxqd_f64 (float64x2_t __a)
  {
!   return __builtin_aarch64_reduc_smax_nan_scal_v2df (__a);
  }
  
  __extension__ extern __inline float32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxs_f32 (float32x2_t __a)
  {
!   return __builtin_aarch64_reduc_smax_nan_scal_v2sf (__a);
  }
  
  /* vpmaxnm  */
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnm_f32 (float32x2_t __a, float32x2_t __b)
  {
!   return __builtin_aarch64_smaxpv2sf (__a, __b);
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnmq_f32 (float32x4_t __a, float32x4_t __b)
  {
!   return __builtin_aarch64_smaxpv4sf (__a, __b);
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnmq_f64 (float64x2_t __a, float64x2_t __b)
  {
!   return __builtin_aarch64_smaxpv2df (__a, __b);
  }
  
  __extension__ extern __inline float64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnmqd_f64 (float64x2_t __a)
  {
!   return __builtin_aarch64_reduc_smax_scal_v2df (__a);
  }
  
  __extension__ extern __inline float32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnms_f32 (float32x2_t __a)
  {
!   return __builtin_aarch64_reduc_smax_scal_v2sf (__a);
  }
  
  /* vpmin  */
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_s8 (int8x8_t __a, int8x8_t __b)
  {
!   return __builtin_aarch64_sminpv8qi (__a, __b);
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_s16 (int16x4_t __a, int16x4_t __b)
  {
!   return __builtin_aarch64_sminpv4hi (__a, __b);
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_s32 (int32x2_t __a, int32x2_t __b)
  {
!   return __builtin_aarch64_sminpv2si (__a, __b);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_u8 (uint8x8_t __a, uint8x8_t __b)
  {
!   return (uint8x8_t) __builtin_aarch64_uminpv8qi ((int8x8_t) __a,
! 						  (int8x8_t) __b);
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_u16 (uint16x4_t __a, uint16x4_t __b)
  {
!   return (uint16x4_t) __builtin_aarch64_uminpv4hi ((int16x4_t) __a,
! 						   (int16x4_t) __b);
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_u32 (uint32x2_t __a, uint32x2_t __b)
  {
!   return (uint32x2_t) __builtin_aarch64_uminpv2si ((int32x2_t) __a,
! 						   (int32x2_t) __b);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_s8 (int8x16_t __a, int8x16_t __b)
  {
!   return __builtin_aarch64_sminpv16qi (__a, __b);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_s16 (int16x8_t __a, int16x8_t __b)
  {
!   return __builtin_aarch64_sminpv8hi (__a, __b);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_s32 (int32x4_t __a, int32x4_t __b)
  {
!   return __builtin_aarch64_sminpv4si (__a, __b);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_u8 (uint8x16_t __a, uint8x16_t __b)
  {
!   return (uint8x16_t) __builtin_aarch64_uminpv16qi ((int8x16_t) __a,
! 						    (int8x16_t) __b);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_u16 (uint16x8_t __a, uint16x8_t __b)
  {
!   return (uint16x8_t) __builtin_aarch64_uminpv8hi ((int16x8_t) __a,
! 						   (int16x8_t) __b);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_u32 (uint32x4_t __a, uint32x4_t __b)
  {
!   return (uint32x4_t) __builtin_aarch64_uminpv4si ((int32x4_t) __a,
! 						   (int32x4_t) __b);
  }
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_f32 (float32x2_t __a, float32x2_t __b)
  {
!   return __builtin_aarch64_smin_nanpv2sf (__a, __b);
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_f32 (float32x4_t __a, float32x4_t __b)
  {
!   return __builtin_aarch64_smin_nanpv4sf (__a, __b);
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_f64 (float64x2_t __a, float64x2_t __b)
  {
!   return __builtin_aarch64_smin_nanpv2df (__a, __b);
  }
  
  __extension__ extern __inline float64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminqd_f64 (float64x2_t __a)
  {
!   return __builtin_aarch64_reduc_smin_nan_scal_v2df (__a);
  }
  
  __extension__ extern __inline float32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmins_f32 (float32x2_t __a)
  {
!   return __builtin_aarch64_reduc_smin_nan_scal_v2sf (__a);
  }
  
  /* vpminnm  */
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnm_f32 (float32x2_t __a, float32x2_t __b)
  {
!   return __builtin_aarch64_sminpv2sf (__a, __b);
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnmq_f32 (float32x4_t __a, float32x4_t __b)
  {
!   return __builtin_aarch64_sminpv4sf (__a, __b);
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnmq_f64 (float64x2_t __a, float64x2_t __b)
  {
!   return __builtin_aarch64_sminpv2df (__a, __b);
  }
  
  __extension__ extern __inline float64_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnmqd_f64 (float64x2_t __a)
  {
!   return __builtin_aarch64_reduc_smin_scal_v2df (__a);
  }
  
  __extension__ extern __inline float32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnms_f32 (float32x2_t __a)
  {
!   return __builtin_aarch64_reduc_smin_scal_v2sf (__a);
  }
  
  /* vmaxnm  */
*************** vminnmvq_f64 (float64x2_t __a)
*** 21889,21897 ****
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_f32 (float32x2_t a, float32x2_t b, float32x2_t c)
  {
!   return a + b * c;
  }
  
  __extension__ extern __inline float64x1_t
--- 22040,22048 ----
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmla_f32 (float32x2_t __a, float32x2_t __b, float32x2_t __c)
  {
!   return __a + __b * __c;
  }
  
  __extension__ extern __inline float64x1_t
*************** vmla_f64 (float64x1_t __a, float64x1_t _
*** 21903,21918 ****
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_f32 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
!   return a + b * c;
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_f64 (float64x2_t a, float64x2_t b, float64x2_t c)
  {
!   return a + b * c;
  }
  
  /* vmla_lane  */
--- 22054,22069 ----
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
  {
!   return __a + __b * __c;
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlaq_f64 (float64x2_t __a, float64x2_t __b, float64x2_t __c)
  {
!   return __a + __b * __c;
  }
  
  /* vmla_lane  */
*************** vmlaq_laneq_u32 (uint32x4_t __a, uint32x
*** 22087,22095 ****
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_f32 (float32x2_t a, float32x2_t b, float32x2_t c)
  {
!   return a - b * c;
  }
  
  __extension__ extern __inline float64x1_t
--- 22238,22246 ----
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmls_f32 (float32x2_t __a, float32x2_t __b, float32x2_t __c)
  {
!   return __a - __b * __c;
  }
  
  __extension__ extern __inline float64x1_t
*************** vmls_f64 (float64x1_t __a, float64x1_t _
*** 22101,22116 ****
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_f32 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
!   return a - b * c;
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_f64 (float64x2_t a, float64x2_t b, float64x2_t c)
  {
!   return a - b * c;
  }
  
  /* vmls_lane  */
--- 22252,22267 ----
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
  {
!   return __a - __b * __c;
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmlsq_f64 (float64x2_t __a, float64x2_t __b, float64x2_t __c)
  {
!   return __a - __b * __c;
  }
  
  /* vmls_lane  */
*************** vqsubd_u64 (uint64_t __a, uint64_t __b)
*** 24874,25292 ****
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl2_s8 (int8x16x2_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, tab.val[1], 1);
!   return __builtin_aarch64_tbl3v8qi (__o, (int8x8_t)idx);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl2_u8 (uint8x16x2_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   return (uint8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)idx);
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl2_p8 (poly8x16x2_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   return (poly8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)idx);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl2q_s8 (int8x16x2_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   return __builtin_aarch64_tbl3v16qi (__o, (int8x16_t)idx);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl2q_u8 (uint8x16x2_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   return (uint8x16_t)__builtin_aarch64_tbl3v16qi (__o, (int8x16_t)idx);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl2q_p8 (poly8x16x2_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   return (poly8x16_t)__builtin_aarch64_tbl3v16qi (__o, (int8x16_t)idx);
  }
  
  /* vqtbl3 */
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl3_s8 (int8x16x3_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[2], 2);
!   return __builtin_aarch64_qtbl3v8qi (__o, (int8x8_t)idx);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl3_u8 (uint8x16x3_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[2], 2);
!   return (uint8x8_t)__builtin_aarch64_qtbl3v8qi (__o, (int8x8_t)idx);
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl3_p8 (poly8x16x3_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[2], 2);
!   return (poly8x8_t)__builtin_aarch64_qtbl3v8qi (__o, (int8x8_t)idx);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl3q_s8 (int8x16x3_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[2], 2);
!   return __builtin_aarch64_qtbl3v16qi (__o, (int8x16_t)idx);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl3q_u8 (uint8x16x3_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[2], 2);
!   return (uint8x16_t)__builtin_aarch64_qtbl3v16qi (__o, (int8x16_t)idx);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl3q_p8 (poly8x16x3_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[2], 2);
!   return (poly8x16_t)__builtin_aarch64_qtbl3v16qi (__o, (int8x16_t)idx);
  }
  
  /* vqtbl4 */
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl4_s8 (int8x16x4_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[3], 3);
!   return __builtin_aarch64_qtbl4v8qi (__o, (int8x8_t)idx);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl4_u8 (uint8x16x4_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[3], 3);
!   return (uint8x8_t)__builtin_aarch64_qtbl4v8qi (__o, (int8x8_t)idx);
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl4_p8 (poly8x16x4_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[3], 3);
!   return (poly8x8_t)__builtin_aarch64_qtbl4v8qi (__o, (int8x8_t)idx);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl4q_s8 (int8x16x4_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[3], 3);
!   return __builtin_aarch64_qtbl4v16qi (__o, (int8x16_t)idx);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl4q_u8 (uint8x16x4_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[3], 3);
!   return (uint8x16_t)__builtin_aarch64_qtbl4v16qi (__o, (int8x16_t)idx);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl4q_p8 (poly8x16x4_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[3], 3);
!   return (poly8x16_t)__builtin_aarch64_qtbl4v16qi (__o, (int8x16_t)idx);
  }
  
  
  /* vqtbx2 */
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx2_s8 (int8x8_t r, int8x16x2_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, tab.val[1], 1);
!   return __builtin_aarch64_tbx4v8qi (r, __o, (int8x8_t)idx);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx2_u8 (uint8x8_t r, uint8x16x2_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   return (uint8x8_t)__builtin_aarch64_tbx4v8qi ((int8x8_t)r, __o,
! 						(int8x8_t)idx);
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx2_p8 (poly8x8_t r, poly8x16x2_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   return (poly8x8_t)__builtin_aarch64_tbx4v8qi ((int8x8_t)r, __o,
! 						(int8x8_t)idx);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx2q_s8 (int8x16_t r, int8x16x2_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, tab.val[1], 1);
!   return __builtin_aarch64_tbx4v16qi (r, __o, (int8x16_t)idx);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx2q_u8 (uint8x16_t r, uint8x16x2_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   return (uint8x16_t)__builtin_aarch64_tbx4v16qi ((int8x16_t)r, __o,
! 						  (int8x16_t)idx);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx2q_p8 (poly8x16_t r, poly8x16x2_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   return (poly8x16_t)__builtin_aarch64_tbx4v16qi ((int8x16_t)r, __o,
! 						  (int8x16_t)idx);
  }
  
  /* vqtbx3 */
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx3_s8 (int8x8_t r, int8x16x3_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, tab.val[2], 2);
!   return __builtin_aarch64_qtbx3v8qi (r, __o, (int8x8_t)idx);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx3_u8 (uint8x8_t r, uint8x16x3_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[2], 2);
!   return (uint8x8_t)__builtin_aarch64_qtbx3v8qi ((int8x8_t)r, __o,
! 						 (int8x8_t)idx);
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx3_p8 (poly8x8_t r, poly8x16x3_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[2], 2);
!   return (poly8x8_t)__builtin_aarch64_qtbx3v8qi ((int8x8_t)r, __o,
! 						 (int8x8_t)idx);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx3q_s8 (int8x16_t r, int8x16x3_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, tab.val[2], 2);
!   return __builtin_aarch64_qtbx3v16qi (r, __o, (int8x16_t)idx);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx3q_u8 (uint8x16_t r, uint8x16x3_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[2], 2);
!   return (uint8x16_t)__builtin_aarch64_qtbx3v16qi ((int8x16_t)r, __o,
! 						   (int8x16_t)idx);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx3q_p8 (poly8x16_t r, poly8x16x3_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)tab.val[2], 2);
!   return (poly8x16_t)__builtin_aarch64_qtbx3v16qi ((int8x16_t)r, __o,
! 						   (int8x16_t)idx);
  }
  
  /* vqtbx4 */
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx4_s8 (int8x8_t r, int8x16x4_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, tab.val[3], 3);
!   return __builtin_aarch64_qtbx4v8qi (r, __o, (int8x8_t)idx);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx4_u8 (uint8x8_t r, uint8x16x4_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[3], 3);
!   return (uint8x8_t)__builtin_aarch64_qtbx4v8qi ((int8x8_t)r, __o,
! 						 (int8x8_t)idx);
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx4_p8 (poly8x8_t r, poly8x16x4_t tab, uint8x8_t idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[3], 3);
!   return (poly8x8_t)__builtin_aarch64_qtbx4v8qi ((int8x8_t)r, __o,
! 						 (int8x8_t)idx);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx4q_s8 (int8x16_t r, int8x16x4_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, tab.val[3], 3);
!   return __builtin_aarch64_qtbx4v16qi (r, __o, (int8x16_t)idx);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx4q_u8 (uint8x16_t r, uint8x16x4_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[3], 3);
!   return (uint8x16_t)__builtin_aarch64_qtbx4v16qi ((int8x16_t)r, __o,
! 						   (int8x16_t)idx);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx4q_p8 (poly8x16_t r, poly8x16x4_t tab, uint8x16_t idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)tab.val[3], 3);
!   return (poly8x16_t)__builtin_aarch64_qtbx4v16qi ((int8x16_t)r, __o,
! 						   (int8x16_t)idx);
  }
  
  /* vrbit  */
--- 25025,25443 ----
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl2_s8 (int8x16x2_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, __tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, __tab.val[1], 1);
!   return __builtin_aarch64_tbl3v8qi (__o, (int8x8_t)__idx);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl2_u8 (uint8x16x2_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   return (uint8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)__idx);
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl2_p8 (poly8x16x2_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   return (poly8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)__idx);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl2q_s8 (int8x16x2_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   return __builtin_aarch64_tbl3v16qi (__o, (int8x16_t)__idx);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl2q_u8 (uint8x16x2_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   return (uint8x16_t)__builtin_aarch64_tbl3v16qi (__o, (int8x16_t)__idx);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl2q_p8 (poly8x16x2_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   return (poly8x16_t)__builtin_aarch64_tbl3v16qi (__o, (int8x16_t)__idx);
  }
  
  /* vqtbl3 */
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl3_s8 (int8x16x3_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   return __builtin_aarch64_qtbl3v8qi (__o, (int8x8_t)__idx);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl3_u8 (uint8x16x3_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   return (uint8x8_t)__builtin_aarch64_qtbl3v8qi (__o, (int8x8_t)__idx);
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl3_p8 (poly8x16x3_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   return (poly8x8_t)__builtin_aarch64_qtbl3v8qi (__o, (int8x8_t)__idx);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl3q_s8 (int8x16x3_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   return __builtin_aarch64_qtbl3v16qi (__o, (int8x16_t)__idx);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl3q_u8 (uint8x16x3_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   return (uint8x16_t)__builtin_aarch64_qtbl3v16qi (__o, (int8x16_t)__idx);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl3q_p8 (poly8x16x3_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   return (poly8x16_t)__builtin_aarch64_qtbl3v16qi (__o, (int8x16_t)__idx);
  }
  
  /* vqtbl4 */
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl4_s8 (int8x16x4_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[3], 3);
!   return __builtin_aarch64_qtbl4v8qi (__o, (int8x8_t)__idx);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl4_u8 (uint8x16x4_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[3], 3);
!   return (uint8x8_t)__builtin_aarch64_qtbl4v8qi (__o, (int8x8_t)__idx);
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl4_p8 (poly8x16x4_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[3], 3);
!   return (poly8x8_t)__builtin_aarch64_qtbl4v8qi (__o, (int8x8_t)__idx);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl4q_s8 (int8x16x4_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[3], 3);
!   return __builtin_aarch64_qtbl4v16qi (__o, (int8x16_t)__idx);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl4q_u8 (uint8x16x4_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[3], 3);
!   return (uint8x16_t)__builtin_aarch64_qtbl4v16qi (__o, (int8x16_t)__idx);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbl4q_p8 (poly8x16x4_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[3], 3);
!   return (poly8x16_t)__builtin_aarch64_qtbl4v16qi (__o, (int8x16_t)__idx);
  }
  
  
  /* vqtbx2 */
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx2_s8 (int8x8_t __r, int8x16x2_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, __tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, __tab.val[1], 1);
!   return __builtin_aarch64_tbx4v8qi (__r, __o, (int8x8_t)__idx);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx2_u8 (uint8x8_t __r, uint8x16x2_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   return (uint8x8_t)__builtin_aarch64_tbx4v8qi ((int8x8_t)__r, __o,
! 						(int8x8_t)__idx);
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx2_p8 (poly8x8_t __r, poly8x16x2_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   return (poly8x8_t)__builtin_aarch64_tbx4v8qi ((int8x8_t)__r, __o,
! 						(int8x8_t)__idx);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx2q_s8 (int8x16_t __r, int8x16x2_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, __tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, __tab.val[1], 1);
!   return __builtin_aarch64_tbx4v16qi (__r, __o, (int8x16_t)__idx);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx2q_u8 (uint8x16_t __r, uint8x16x2_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   return (uint8x16_t)__builtin_aarch64_tbx4v16qi ((int8x16_t)__r, __o,
! 						  (int8x16_t)__idx);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx2q_p8 (poly8x16_t __r, poly8x16x2_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   return (poly8x16_t)__builtin_aarch64_tbx4v16qi ((int8x16_t)__r, __o,
! 						  (int8x16_t)__idx);
  }
  
  /* vqtbx3 */
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx3_s8 (int8x8_t __r, int8x16x3_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, __tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, __tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, __tab.val[2], 2);
!   return __builtin_aarch64_qtbx3v8qi (__r, __o, (int8x8_t)__idx);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx3_u8 (uint8x8_t __r, uint8x16x3_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   return (uint8x8_t)__builtin_aarch64_qtbx3v8qi ((int8x8_t)__r, __o,
! 						 (int8x8_t)__idx);
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx3_p8 (poly8x8_t __r, poly8x16x3_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   return (poly8x8_t)__builtin_aarch64_qtbx3v8qi ((int8x8_t)__r, __o,
! 						 (int8x8_t)__idx);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx3q_s8 (int8x16_t __r, int8x16x3_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, __tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, __tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, __tab.val[2], 2);
!   return __builtin_aarch64_qtbx3v16qi (__r, __o, (int8x16_t)__idx);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx3q_u8 (uint8x16_t __r, uint8x16x3_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   return (uint8x16_t)__builtin_aarch64_qtbx3v16qi ((int8x16_t)__r, __o,
! 						   (int8x16_t)__idx);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx3q_p8 (poly8x16_t __r, poly8x16x3_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   return (poly8x16_t)__builtin_aarch64_qtbx3v16qi ((int8x16_t)__r, __o,
! 						   (int8x16_t)__idx);
  }
  
  /* vqtbx4 */
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx4_s8 (int8x8_t __r, int8x16x4_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, __tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, __tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, __tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, __tab.val[3], 3);
!   return __builtin_aarch64_qtbx4v8qi (__r, __o, (int8x8_t)__idx);
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx4_u8 (uint8x8_t __r, uint8x16x4_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[3], 3);
!   return (uint8x8_t)__builtin_aarch64_qtbx4v8qi ((int8x8_t)__r, __o,
! 						 (int8x8_t)__idx);
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx4_p8 (poly8x8_t __r, poly8x16x4_t __tab, uint8x8_t __idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[3], 3);
!   return (poly8x8_t)__builtin_aarch64_qtbx4v8qi ((int8x8_t)__r, __o,
! 						 (int8x8_t)__idx);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx4q_s8 (int8x16_t __r, int8x16x4_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, __tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, __tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, __tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, __tab.val[3], 3);
!   return __builtin_aarch64_qtbx4v16qi (__r, __o, (int8x16_t)__idx);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx4q_u8 (uint8x16_t __r, uint8x16x4_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[3], 3);
!   return (uint8x16_t)__builtin_aarch64_qtbx4v16qi ((int8x16_t)__r, __o,
! 						   (int8x16_t)__idx);
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vqtbx4q_p8 (poly8x16_t __r, poly8x16x4_t __tab, uint8x16_t __idx)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t)__tab.val[3], 3);
!   return (poly8x16_t)__builtin_aarch64_qtbx4v16qi ((int8x16_t)__r, __o,
! 						   (int8x16_t)__idx);
  }
  
  /* vrbit  */
*************** vrecpxd_f64 (float64_t __a)
*** 25457,25590 ****
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev16_p8 (poly8x8_t a)
  {
!   return __builtin_shuffle (a, (uint8x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev16_s8 (int8x8_t a)
  {
!   return __builtin_shuffle (a, (uint8x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev16_u8 (uint8x8_t a)
  {
!   return __builtin_shuffle (a, (uint8x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev16q_p8 (poly8x16_t a)
  {
!   return __builtin_shuffle (a,
        (uint8x16_t) { 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14 });
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev16q_s8 (int8x16_t a)
  {
!   return __builtin_shuffle (a,
        (uint8x16_t) { 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14 });
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev16q_u8 (uint8x16_t a)
  {
!   return __builtin_shuffle (a,
        (uint8x16_t) { 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14 });
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32_p8 (poly8x8_t a)
  {
!   return __builtin_shuffle (a, (uint8x8_t) { 3, 2, 1, 0, 7, 6, 5, 4 });
  }
  
  __extension__ extern __inline poly16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32_p16 (poly16x4_t a)
  {
!   return __builtin_shuffle (a, (uint16x4_t) { 1, 0, 3, 2 });
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32_s8 (int8x8_t a)
  {
!   return __builtin_shuffle (a, (uint8x8_t) { 3, 2, 1, 0, 7, 6, 5, 4 });
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32_s16 (int16x4_t a)
  {
!   return __builtin_shuffle (a, (uint16x4_t) { 1, 0, 3, 2 });
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32_u8 (uint8x8_t a)
  {
!   return __builtin_shuffle (a, (uint8x8_t) { 3, 2, 1, 0, 7, 6, 5, 4 });
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32_u16 (uint16x4_t a)
  {
!   return __builtin_shuffle (a, (uint16x4_t) { 1, 0, 3, 2 });
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32q_p8 (poly8x16_t a)
  {
!   return __builtin_shuffle (a,
        (uint8x16_t) { 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 });
  }
  
  __extension__ extern __inline poly16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32q_p16 (poly16x8_t a)
  {
!   return __builtin_shuffle (a, (uint16x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32q_s8 (int8x16_t a)
  {
!   return __builtin_shuffle (a,
        (uint8x16_t) { 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 });
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32q_s16 (int16x8_t a)
  {
!   return __builtin_shuffle (a, (uint16x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32q_u8 (uint8x16_t a)
  {
!   return __builtin_shuffle (a,
        (uint8x16_t) { 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 });
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32q_u16 (uint16x8_t a)
  {
!   return __builtin_shuffle (a, (uint16x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
  }
  
  __extension__ extern __inline float16x4_t
--- 25608,25741 ----
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev16_p8 (poly8x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint8x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev16_s8 (int8x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint8x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev16_u8 (uint8x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint8x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev16q_p8 (poly8x16_t __a)
  {
!   return __builtin_shuffle (__a,
        (uint8x16_t) { 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14 });
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev16q_s8 (int8x16_t __a)
  {
!   return __builtin_shuffle (__a,
        (uint8x16_t) { 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14 });
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev16q_u8 (uint8x16_t __a)
  {
!   return __builtin_shuffle (__a,
        (uint8x16_t) { 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14 });
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32_p8 (poly8x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint8x8_t) { 3, 2, 1, 0, 7, 6, 5, 4 });
  }
  
  __extension__ extern __inline poly16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32_p16 (poly16x4_t __a)
  {
!   return __builtin_shuffle (__a, (uint16x4_t) { 1, 0, 3, 2 });
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32_s8 (int8x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint8x8_t) { 3, 2, 1, 0, 7, 6, 5, 4 });
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32_s16 (int16x4_t __a)
  {
!   return __builtin_shuffle (__a, (uint16x4_t) { 1, 0, 3, 2 });
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32_u8 (uint8x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint8x8_t) { 3, 2, 1, 0, 7, 6, 5, 4 });
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32_u16 (uint16x4_t __a)
  {
!   return __builtin_shuffle (__a, (uint16x4_t) { 1, 0, 3, 2 });
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32q_p8 (poly8x16_t __a)
  {
!   return __builtin_shuffle (__a,
        (uint8x16_t) { 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 });
  }
  
  __extension__ extern __inline poly16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32q_p16 (poly16x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint16x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32q_s8 (int8x16_t __a)
  {
!   return __builtin_shuffle (__a,
        (uint8x16_t) { 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 });
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32q_s16 (int16x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint16x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32q_u8 (uint8x16_t __a)
  {
!   return __builtin_shuffle (__a,
        (uint8x16_t) { 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 });
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev32q_u16 (uint16x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint16x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
  }
  
  __extension__ extern __inline float16x4_t
*************** vrev64_f16 (float16x4_t __a)
*** 25596,25660 ****
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_f32 (float32x2_t a)
  {
!   return __builtin_shuffle (a, (uint32x2_t) { 1, 0 });
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_p8 (poly8x8_t a)
  {
!   return __builtin_shuffle (a, (uint8x8_t) { 7, 6, 5, 4, 3, 2, 1, 0 });
  }
  
  __extension__ extern __inline poly16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_p16 (poly16x4_t a)
  {
!   return __builtin_shuffle (a, (uint16x4_t) { 3, 2, 1, 0 });
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_s8 (int8x8_t a)
  {
!   return __builtin_shuffle (a, (uint8x8_t) { 7, 6, 5, 4, 3, 2, 1, 0 });
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_s16 (int16x4_t a)
  {
!   return __builtin_shuffle (a, (uint16x4_t) { 3, 2, 1, 0 });
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_s32 (int32x2_t a)
  {
!   return __builtin_shuffle (a, (uint32x2_t) { 1, 0 });
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_u8 (uint8x8_t a)
  {
!   return __builtin_shuffle (a, (uint8x8_t) { 7, 6, 5, 4, 3, 2, 1, 0 });
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_u16 (uint16x4_t a)
  {
!   return __builtin_shuffle (a, (uint16x4_t) { 3, 2, 1, 0 });
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_u32 (uint32x2_t a)
  {
!   return __builtin_shuffle (a, (uint32x2_t) { 1, 0 });
  }
  
  __extension__ extern __inline float16x8_t
--- 25747,25811 ----
  
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_f32 (float32x2_t __a)
  {
!   return __builtin_shuffle (__a, (uint32x2_t) { 1, 0 });
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_p8 (poly8x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint8x8_t) { 7, 6, 5, 4, 3, 2, 1, 0 });
  }
  
  __extension__ extern __inline poly16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_p16 (poly16x4_t __a)
  {
!   return __builtin_shuffle (__a, (uint16x4_t) { 3, 2, 1, 0 });
  }
  
  __extension__ extern __inline int8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_s8 (int8x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint8x8_t) { 7, 6, 5, 4, 3, 2, 1, 0 });
  }
  
  __extension__ extern __inline int16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_s16 (int16x4_t __a)
  {
!   return __builtin_shuffle (__a, (uint16x4_t) { 3, 2, 1, 0 });
  }
  
  __extension__ extern __inline int32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_s32 (int32x2_t __a)
  {
!   return __builtin_shuffle (__a, (uint32x2_t) { 1, 0 });
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_u8 (uint8x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint8x8_t) { 7, 6, 5, 4, 3, 2, 1, 0 });
  }
  
  __extension__ extern __inline uint16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_u16 (uint16x4_t __a)
  {
!   return __builtin_shuffle (__a, (uint16x4_t) { 3, 2, 1, 0 });
  }
  
  __extension__ extern __inline uint32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64_u32 (uint32x2_t __a)
  {
!   return __builtin_shuffle (__a, (uint32x2_t) { 1, 0 });
  }
  
  __extension__ extern __inline float16x8_t
*************** vrev64q_f16 (float16x8_t __a)
*** 25666,25733 ****
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_f32 (float32x4_t a)
  {
!   return __builtin_shuffle (a, (uint32x4_t) { 1, 0, 3, 2 });
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_p8 (poly8x16_t a)
  {
!   return __builtin_shuffle (a,
        (uint8x16_t) { 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8 });
  }
  
  __extension__ extern __inline poly16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_p16 (poly16x8_t a)
  {
!   return __builtin_shuffle (a, (uint16x8_t) { 3, 2, 1, 0, 7, 6, 5, 4 });
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_s8 (int8x16_t a)
  {
!   return __builtin_shuffle (a,
        (uint8x16_t) { 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8 });
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_s16 (int16x8_t a)
  {
!   return __builtin_shuffle (a, (uint16x8_t) { 3, 2, 1, 0, 7, 6, 5, 4 });
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_s32 (int32x4_t a)
  {
!   return __builtin_shuffle (a, (uint32x4_t) { 1, 0, 3, 2 });
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_u8 (uint8x16_t a)
  {
!   return __builtin_shuffle (a,
        (uint8x16_t) { 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8 });
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_u16 (uint16x8_t a)
  {
!   return __builtin_shuffle (a, (uint16x8_t) { 3, 2, 1, 0, 7, 6, 5, 4 });
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_u32 (uint32x4_t a)
  {
!   return __builtin_shuffle (a, (uint32x4_t) { 1, 0, 3, 2 });
  }
  
  /* vrnd  */
--- 25817,25884 ----
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_f32 (float32x4_t __a)
  {
!   return __builtin_shuffle (__a, (uint32x4_t) { 1, 0, 3, 2 });
  }
  
  __extension__ extern __inline poly8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_p8 (poly8x16_t __a)
  {
!   return __builtin_shuffle (__a,
        (uint8x16_t) { 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8 });
  }
  
  __extension__ extern __inline poly16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_p16 (poly16x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint16x8_t) { 3, 2, 1, 0, 7, 6, 5, 4 });
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_s8 (int8x16_t __a)
  {
!   return __builtin_shuffle (__a,
        (uint8x16_t) { 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8 });
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_s16 (int16x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint16x8_t) { 3, 2, 1, 0, 7, 6, 5, 4 });
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_s32 (int32x4_t __a)
  {
!   return __builtin_shuffle (__a, (uint32x4_t) { 1, 0, 3, 2 });
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_u8 (uint8x16_t __a)
  {
!   return __builtin_shuffle (__a,
        (uint8x16_t) { 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8 });
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_u16 (uint16x8_t __a)
  {
!   return __builtin_shuffle (__a, (uint16x8_t) { 3, 2, 1, 0, 7, 6, 5, 4 });
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrev64q_u32 (uint32x4_t __a)
  {
!   return __builtin_shuffle (__a, (uint32x4_t) { 1, 0, 3, 2 });
  }
  
  /* vrnd  */
*************** vrsrad_n_u64 (uint64_t __a, uint64_t __b
*** 26420,26506 ****
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
  {
!   return __builtin_aarch64_crypto_sha1cv4si_uuuu (hash_abcd, hash_e, wk);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha1mq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
  {
!   return __builtin_aarch64_crypto_sha1mv4si_uuuu (hash_abcd, hash_e, wk);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha1pq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
  {
!   return __builtin_aarch64_crypto_sha1pv4si_uuuu (hash_abcd, hash_e, wk);
  }
  
  __extension__ extern __inline uint32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha1h_u32 (uint32_t hash_e)
  {
!   return __builtin_aarch64_crypto_sha1hsi_uu (hash_e);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha1su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11)
  {
!   return __builtin_aarch64_crypto_sha1su0v4si_uuuu (w0_3, w4_7, w8_11);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15)
  {
!   return __builtin_aarch64_crypto_sha1su1v4si_uuu (tw0_3, w12_15);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha256hq_u32 (uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk)
  {
!   return __builtin_aarch64_crypto_sha256hv4si_uuuu (hash_abcd, hash_efgh, wk);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha256h2q_u32 (uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk)
  {
!   return __builtin_aarch64_crypto_sha256h2v4si_uuuu (hash_efgh, hash_abcd, wk);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha256su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7)
  {
!   return __builtin_aarch64_crypto_sha256su0v4si_uuu (w0_3, w4_7);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha256su1q_u32 (uint32x4_t tw0_3, uint32x4_t w8_11, uint32x4_t w12_15)
  {
!   return __builtin_aarch64_crypto_sha256su1v4si_uuuu (tw0_3, w8_11, w12_15);
  }
  
  __extension__ extern __inline poly128_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_p64 (poly64_t a, poly64_t b)
  {
    return
!     __builtin_aarch64_crypto_pmulldi_ppp (a, b);
  }
  
  __extension__ extern __inline poly128_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_p64 (poly64x2_t a, poly64x2_t b)
  {
!   return __builtin_aarch64_crypto_pmullv2di_ppp (a, b);
  }
  
  #pragma GCC pop_options
--- 26571,26660 ----
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha1cq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
  {
!   return __builtin_aarch64_crypto_sha1cv4si_uuuu (__hash_abcd, __hash_e, __wk);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha1mq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
  {
!   return __builtin_aarch64_crypto_sha1mv4si_uuuu (__hash_abcd, __hash_e, __wk);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha1pq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
  {
!   return __builtin_aarch64_crypto_sha1pv4si_uuuu (__hash_abcd, __hash_e, __wk);
  }
  
  __extension__ extern __inline uint32_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha1h_u32 (uint32_t __hash_e)
  {
!   return __builtin_aarch64_crypto_sha1hsi_uu (__hash_e);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha1su0q_u32 (uint32x4_t __w0_3, uint32x4_t __w4_7, uint32x4_t __w8_11)
  {
!   return __builtin_aarch64_crypto_sha1su0v4si_uuuu (__w0_3, __w4_7, __w8_11);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha1su1q_u32 (uint32x4_t __tw0_3, uint32x4_t __w12_15)
  {
!   return __builtin_aarch64_crypto_sha1su1v4si_uuu (__tw0_3, __w12_15);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha256hq_u32 (uint32x4_t __hash_abcd, uint32x4_t __hash_efgh, uint32x4_t __wk)
  {
!   return __builtin_aarch64_crypto_sha256hv4si_uuuu (__hash_abcd, __hash_efgh,
! 						     __wk);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha256h2q_u32 (uint32x4_t __hash_efgh, uint32x4_t __hash_abcd, uint32x4_t __wk)
  {
!   return __builtin_aarch64_crypto_sha256h2v4si_uuuu (__hash_efgh, __hash_abcd,
! 						      __wk);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha256su0q_u32 (uint32x4_t __w0_3, uint32x4_t __w4_7)
  {
!   return __builtin_aarch64_crypto_sha256su0v4si_uuu (__w0_3, __w4_7);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsha256su1q_u32 (uint32x4_t __tw0_3, uint32x4_t __w8_11, uint32x4_t __w12_15)
  {
!   return __builtin_aarch64_crypto_sha256su1v4si_uuuu (__tw0_3, __w8_11,
! 						       __w12_15);
  }
  
  __extension__ extern __inline poly128_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_p64 (poly64_t __a, poly64_t __b)
  {
    return
!     __builtin_aarch64_crypto_pmulldi_ppp (__a, __b);
  }
  
  __extension__ extern __inline poly128_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vmull_high_p64 (poly64x2_t __a, poly64x2_t __b)
  {
!   return __builtin_aarch64_crypto_pmullv2di_ppp (__a, __b);
  }
  
  #pragma GCC pop_options
*************** vsqaddd_u64 (uint64_t __a, int64_t __b)
*** 27202,27231 ****
  /* vsqrt */
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsqrt_f32 (float32x2_t a)
  {
!   return __builtin_aarch64_sqrtv2sf (a);
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsqrtq_f32 (float32x4_t a)
  {
!   return __builtin_aarch64_sqrtv4sf (a);
  }
  
  __extension__ extern __inline float64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsqrt_f64 (float64x1_t a)
  {
!   return (float64x1_t) { __builtin_aarch64_sqrtdf (a[0]) };
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsqrtq_f64 (float64x2_t a)
  {
!   return __builtin_aarch64_sqrtv2df (a);
  }
  
  /* vsra */
--- 27356,27385 ----
  /* vsqrt */
  __extension__ extern __inline float32x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsqrt_f32 (float32x2_t __a)
  {
!   return __builtin_aarch64_sqrtv2sf (__a);
  }
  
  __extension__ extern __inline float32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsqrtq_f32 (float32x4_t __a)
  {
!   return __builtin_aarch64_sqrtv4sf (__a);
  }
  
  __extension__ extern __inline float64x1_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsqrt_f64 (float64x1_t __a)
  {
!   return (float64x1_t) { __builtin_aarch64_sqrtdf (__a[0]) };
  }
  
  __extension__ extern __inline float64x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsqrtq_f64 (float64x2_t __a)
  {
!   return __builtin_aarch64_sqrtv2df (__a);
  }
  
  /* vsra */
*************** vst1_f16 (float16_t *__a, float16x4_t __
*** 27495,27592 ****
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f32 (float32_t *a, float32x2_t b)
  {
!   __builtin_aarch64_st1v2sf ((__builtin_aarch64_simd_sf *) a, b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f64 (float64_t *a, float64x1_t b)
  {
!   *a = b[0];
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p8 (poly8_t *a, poly8x8_t b)
  {
!   __builtin_aarch64_st1v8qi ((__builtin_aarch64_simd_qi *) a,
! 			     (int8x8_t) b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p16 (poly16_t *a, poly16x4_t b)
  {
!   __builtin_aarch64_st1v4hi ((__builtin_aarch64_simd_hi *) a,
! 			     (int16x4_t) b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p64 (poly64_t *a, poly64x1_t b)
  {
!   *a = b[0];
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s8 (int8_t *a, int8x8_t b)
  {
!   __builtin_aarch64_st1v8qi ((__builtin_aarch64_simd_qi *) a, b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s16 (int16_t *a, int16x4_t b)
  {
!   __builtin_aarch64_st1v4hi ((__builtin_aarch64_simd_hi *) a, b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s32 (int32_t *a, int32x2_t b)
  {
!   __builtin_aarch64_st1v2si ((__builtin_aarch64_simd_si *) a, b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s64 (int64_t *a, int64x1_t b)
  {
!   *a = b[0];
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u8 (uint8_t *a, uint8x8_t b)
  {
!   __builtin_aarch64_st1v8qi ((__builtin_aarch64_simd_qi *) a,
! 			     (int8x8_t) b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u16 (uint16_t *a, uint16x4_t b)
  {
!   __builtin_aarch64_st1v4hi ((__builtin_aarch64_simd_hi *) a,
! 			     (int16x4_t) b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u32 (uint32_t *a, uint32x2_t b)
  {
!   __builtin_aarch64_st1v2si ((__builtin_aarch64_simd_si *) a,
! 			     (int32x2_t) b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u64 (uint64_t *a, uint64x1_t b)
  {
!   *a = b[0];
  }
  
  /* vst1q */
--- 27649,27746 ----
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f32 (float32_t *__a, float32x2_t __b)
  {
!   __builtin_aarch64_st1v2sf ((__builtin_aarch64_simd_sf *) __a, __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f64 (float64_t *__a, float64x1_t __b)
  {
!   *__a = __b[0];
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p8 (poly8_t *__a, poly8x8_t __b)
  {
!   __builtin_aarch64_st1v8qi ((__builtin_aarch64_simd_qi *) __a,
! 			     (int8x8_t) __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p16 (poly16_t *__a, poly16x4_t __b)
  {
!   __builtin_aarch64_st1v4hi ((__builtin_aarch64_simd_hi *) __a,
! 			     (int16x4_t) __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p64 (poly64_t *__a, poly64x1_t __b)
  {
!   *__a = __b[0];
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s8 (int8_t *__a, int8x8_t __b)
  {
!   __builtin_aarch64_st1v8qi ((__builtin_aarch64_simd_qi *) __a, __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s16 (int16_t *__a, int16x4_t __b)
  {
!   __builtin_aarch64_st1v4hi ((__builtin_aarch64_simd_hi *) __a, __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s32 (int32_t *__a, int32x2_t __b)
  {
!   __builtin_aarch64_st1v2si ((__builtin_aarch64_simd_si *) __a, __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s64 (int64_t *__a, int64x1_t __b)
  {
!   *__a = __b[0];
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u8 (uint8_t *__a, uint8x8_t __b)
  {
!   __builtin_aarch64_st1v8qi ((__builtin_aarch64_simd_qi *) __a,
! 			     (int8x8_t) __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u16 (uint16_t *__a, uint16x4_t __b)
  {
!   __builtin_aarch64_st1v4hi ((__builtin_aarch64_simd_hi *) __a,
! 			     (int16x4_t) __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u32 (uint32_t *__a, uint32x2_t __b)
  {
!   __builtin_aarch64_st1v2si ((__builtin_aarch64_simd_si *) __a,
! 			     (int32x2_t) __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u64 (uint64_t *__a, uint64x1_t __b)
  {
!   *__a = __b[0];
  }
  
  /* vst1q */
*************** vst1q_f16 (float16_t *__a, float16x8_t _
*** 27600,27699 ****
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f32 (float32_t *a, float32x4_t b)
  {
!   __builtin_aarch64_st1v4sf ((__builtin_aarch64_simd_sf *) a, b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f64 (float64_t *a, float64x2_t b)
  {
!   __builtin_aarch64_st1v2df ((__builtin_aarch64_simd_df *) a, b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p8 (poly8_t *a, poly8x16_t b)
  {
!   __builtin_aarch64_st1v16qi ((__builtin_aarch64_simd_qi *) a,
! 			      (int8x16_t) b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p16 (poly16_t *a, poly16x8_t b)
  {
!   __builtin_aarch64_st1v8hi ((__builtin_aarch64_simd_hi *) a,
! 			     (int16x8_t) b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p64 (poly64_t *a, poly64x2_t b)
  {
!   __builtin_aarch64_st1v2di_sp ((__builtin_aarch64_simd_di *) a,
! 				(poly64x2_t) b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s8 (int8_t *a, int8x16_t b)
  {
!   __builtin_aarch64_st1v16qi ((__builtin_aarch64_simd_qi *) a, b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s16 (int16_t *a, int16x8_t b)
  {
!   __builtin_aarch64_st1v8hi ((__builtin_aarch64_simd_hi *) a, b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s32 (int32_t *a, int32x4_t b)
  {
!   __builtin_aarch64_st1v4si ((__builtin_aarch64_simd_si *) a, b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s64 (int64_t *a, int64x2_t b)
  {
!   __builtin_aarch64_st1v2di ((__builtin_aarch64_simd_di *) a, b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u8 (uint8_t *a, uint8x16_t b)
  {
!   __builtin_aarch64_st1v16qi ((__builtin_aarch64_simd_qi *) a,
! 			      (int8x16_t) b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u16 (uint16_t *a, uint16x8_t b)
  {
!   __builtin_aarch64_st1v8hi ((__builtin_aarch64_simd_hi *) a,
! 			     (int16x8_t) b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u32 (uint32_t *a, uint32x4_t b)
  {
!   __builtin_aarch64_st1v4si ((__builtin_aarch64_simd_si *) a,
! 			     (int32x4_t) b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u64 (uint64_t *a, uint64x2_t b)
  {
!   __builtin_aarch64_st1v2di ((__builtin_aarch64_simd_di *) a,
! 			     (int64x2_t) b);
  }
  
  /* vst1_lane */
--- 27754,27853 ----
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f32 (float32_t *__a, float32x4_t __b)
  {
!   __builtin_aarch64_st1v4sf ((__builtin_aarch64_simd_sf *) __a, __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f64 (float64_t *__a, float64x2_t __b)
  {
!   __builtin_aarch64_st1v2df ((__builtin_aarch64_simd_df *) __a, __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p8 (poly8_t *__a, poly8x16_t __b)
  {
!   __builtin_aarch64_st1v16qi ((__builtin_aarch64_simd_qi *) __a,
! 			      (int8x16_t) __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p16 (poly16_t *__a, poly16x8_t __b)
  {
!   __builtin_aarch64_st1v8hi ((__builtin_aarch64_simd_hi *) __a,
! 			     (int16x8_t) __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p64 (poly64_t *__a, poly64x2_t __b)
  {
!   __builtin_aarch64_st1v2di_sp ((__builtin_aarch64_simd_di *) __a,
! 				(poly64x2_t) __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s8 (int8_t *__a, int8x16_t __b)
  {
!   __builtin_aarch64_st1v16qi ((__builtin_aarch64_simd_qi *) __a, __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s16 (int16_t *__a, int16x8_t __b)
  {
!   __builtin_aarch64_st1v8hi ((__builtin_aarch64_simd_hi *) __a, __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s32 (int32_t *__a, int32x4_t __b)
  {
!   __builtin_aarch64_st1v4si ((__builtin_aarch64_simd_si *) __a, __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s64 (int64_t *__a, int64x2_t __b)
  {
!   __builtin_aarch64_st1v2di ((__builtin_aarch64_simd_di *) __a, __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u8 (uint8_t *__a, uint8x16_t __b)
  {
!   __builtin_aarch64_st1v16qi ((__builtin_aarch64_simd_qi *) __a,
! 			      (int8x16_t) __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u16 (uint16_t *__a, uint16x8_t __b)
  {
!   __builtin_aarch64_st1v8hi ((__builtin_aarch64_simd_hi *) __a,
! 			     (int16x8_t) __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u32 (uint32_t *__a, uint32x4_t __b)
  {
!   __builtin_aarch64_st1v4si ((__builtin_aarch64_simd_si *) __a,
! 			     (int32x4_t) __b);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u64 (uint64_t *__a, uint64x2_t __b)
  {
!   __builtin_aarch64_st1v2di ((__builtin_aarch64_simd_di *) __a,
! 			     (int64x2_t) __b);
  }
  
  /* vst1_lane */
*************** vst1q_lane_u64 (uint64_t *__a, uint64x2_
*** 27900,28226 ****
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s64_x2 (int64_t * __a, int64x1x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   int64x2x2_t temp;
!   temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[1], 1);
    __builtin_aarch64_st1x2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u64_x2 (uint64_t * __a, uint64x1x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint64x2x2_t temp;
!   temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[1], 1);
    __builtin_aarch64_st1x2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f64_x2 (float64_t * __a, float64x1x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   float64x2x2_t temp;
!   temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) temp.val[1], 1);
    __builtin_aarch64_st1x2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s8_x2 (int8_t * __a, int8x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   int8x16x2_t temp;
!   temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1);
    __builtin_aarch64_st1x2v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p8_x2 (poly8_t * __a, poly8x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   poly8x16x2_t temp;
!   temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1);
    __builtin_aarch64_st1x2v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s16_x2 (int16_t * __a, int16x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   int16x8x2_t temp;
!   temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1);
    __builtin_aarch64_st1x2v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p16_x2 (poly16_t * __a, poly16x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   poly16x8x2_t temp;
!   temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1);
    __builtin_aarch64_st1x2v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s32_x2 (int32_t * __a, int32x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   int32x4x2_t temp;
!   temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[1], 1);
    __builtin_aarch64_st1x2v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u8_x2 (uint8_t * __a, uint8x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint8x16x2_t temp;
!   temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1);
    __builtin_aarch64_st1x2v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u16_x2 (uint16_t * __a, uint16x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint16x8x2_t temp;
!   temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1);
    __builtin_aarch64_st1x2v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u32_x2 (uint32_t * __a, uint32x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint32x4x2_t temp;
!   temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[1], 1);
    __builtin_aarch64_st1x2v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f16_x2 (float16_t * __a, float16x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   float16x8x2_t temp;
!   temp.val[0] = vcombine_f16 (val.val[0], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f16 (val.val[1], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, temp.val[1], 1);
    __builtin_aarch64_st1x2v4hf (__a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f32_x2 (float32_t * __a, float32x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   float32x4x2_t temp;
!   temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) temp.val[1], 1);
    __builtin_aarch64_st1x2v2sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p64_x2 (poly64_t * __a, poly64x1x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   poly64x2x2_t temp;
!   temp.val[0] = vcombine_p64 (val.val[0], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p64 (val.val[1], vcreate_p64 (__AARCH64_UINT64_C (0)));
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[1], 1);
    __builtin_aarch64_st1x2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s8_x2 (int8_t * __a, int8x16x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[1], 1);
    __builtin_aarch64_st1x2v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p8_x2 (poly8_t * __a, poly8x16x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[1], 1);
    __builtin_aarch64_st1x2v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s16_x2 (int16_t * __a, int16x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[1], 1);
    __builtin_aarch64_st1x2v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p16_x2 (poly16_t * __a, poly16x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[1], 1);
    __builtin_aarch64_st1x2v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s32_x2 (int32_t * __a, int32x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[1], 1);
    __builtin_aarch64_st1x2v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s64_x2 (int64_t * __a, int64x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[1], 1);
    __builtin_aarch64_st1x2v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u8_x2 (uint8_t * __a, uint8x16x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[1], 1);
    __builtin_aarch64_st1x2v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u16_x2 (uint16_t * __a, uint16x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[1], 1);
    __builtin_aarch64_st1x2v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u32_x2 (uint32_t * __a, uint32x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[1], 1);
    __builtin_aarch64_st1x2v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u64_x2 (uint64_t * __a, uint64x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[1], 1);
    __builtin_aarch64_st1x2v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f16_x2 (float16_t * __a, float16x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, val.val[1], 1);
    __builtin_aarch64_st1x2v8hf (__a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f32_x2 (float32_t * __a, float32x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) val.val[1], 1);
    __builtin_aarch64_st1x2v4sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f64_x2 (float64_t * __a, float64x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) val.val[1], 1);
    __builtin_aarch64_st1x2v2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p64_x2 (poly64_t * __a, poly64x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) val.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) val.val[1], 1);
    __builtin_aarch64_st1x2v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
--- 28054,28396 ----
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s64_x2 (int64_t * __a, int64x1x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   int64x2x2_t __temp;
!   __temp.val[0]
!     = vcombine_s64 (__val.val[0], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __temp.val[1]
!     = vcombine_s64 (__val.val[1], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __temp.val[1], 1);
    __builtin_aarch64_st1x2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u64_x2 (uint64_t * __a, uint64x1x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint64x2x2_t __temp;
!   __temp.val[0]
!     = vcombine_u64 (__val.val[0], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1]
!     = vcombine_u64 (__val.val[1], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __temp.val[1], 1);
    __builtin_aarch64_st1x2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f64_x2 (float64_t * __a, float64x1x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   float64x2x2_t __temp;
!   __temp.val[0]
!     = vcombine_f64 (__val.val[0], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1]
!     = vcombine_f64 (__val.val[1], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) __temp.val[1], 1);
    __builtin_aarch64_st1x2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s8_x2 (int8_t * __a, int8x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   int8x16x2_t __temp;
!   __temp.val[0]
!     = vcombine_s8 (__val.val[0], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __temp.val[1]
!     = vcombine_s8 (__val.val[1], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __temp.val[1], 1);
    __builtin_aarch64_st1x2v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p8_x2 (poly8_t * __a, poly8x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   poly8x16x2_t __temp;
!   __temp.val[0]
!     = vcombine_p8 (__val.val[0], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __temp.val[1]
!     = vcombine_p8 (__val.val[1], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __temp.val[1], 1);
    __builtin_aarch64_st1x2v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s16_x2 (int16_t * __a, int16x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   int16x8x2_t __temp;
!   __temp.val[0]
!     = vcombine_s16 (__val.val[0], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __temp.val[1]
!     = vcombine_s16 (__val.val[1], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __temp.val[1], 1);
    __builtin_aarch64_st1x2v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p16_x2 (poly16_t * __a, poly16x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   poly16x8x2_t __temp;
!   __temp.val[0]
!     = vcombine_p16 (__val.val[0], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1]
!     = vcombine_p16 (__val.val[1], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __temp.val[1], 1);
    __builtin_aarch64_st1x2v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s32_x2 (int32_t * __a, int32x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   int32x4x2_t __temp;
!   __temp.val[0]
!     = vcombine_s32 (__val.val[0], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __temp.val[1]
!     = vcombine_s32 (__val.val[1], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __temp.val[1], 1);
    __builtin_aarch64_st1x2v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u8_x2 (uint8_t * __a, uint8x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint8x16x2_t __temp;
!   __temp.val[0] = vcombine_u8 (__val.val[0], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u8 (__val.val[1], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __temp.val[1], 1);
    __builtin_aarch64_st1x2v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u16_x2 (uint16_t * __a, uint16x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint16x8x2_t __temp;
!   __temp.val[0] = vcombine_u16 (__val.val[0], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u16 (__val.val[1], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __temp.val[1], 1);
    __builtin_aarch64_st1x2v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u32_x2 (uint32_t * __a, uint32x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint32x4x2_t __temp;
!   __temp.val[0] = vcombine_u32 (__val.val[0], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u32 (__val.val[1], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __temp.val[1], 1);
    __builtin_aarch64_st1x2v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f16_x2 (float16_t * __a, float16x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   float16x8x2_t __temp;
!   __temp.val[0] = vcombine_f16 (__val.val[0], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f16 (__val.val[1], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, __temp.val[1], 1);
    __builtin_aarch64_st1x2v4hf (__a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f32_x2 (float32_t * __a, float32x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   float32x4x2_t __temp;
!   __temp.val[0] = vcombine_f32 (__val.val[0], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f32 (__val.val[1], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) __temp.val[1], 1);
    __builtin_aarch64_st1x2v2sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p64_x2 (poly64_t * __a, poly64x1x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   poly64x2x2_t __temp;
!   __temp.val[0] = vcombine_p64 (__val.val[0], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_p64 (__val.val[1], vcreate_p64 (__AARCH64_UINT64_C (0)));
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[1], 1);
    __builtin_aarch64_st1x2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s8_x2 (int8_t * __a, int8x16x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __val.val[1], 1);
    __builtin_aarch64_st1x2v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p8_x2 (poly8_t * __a, poly8x16x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __val.val[1], 1);
    __builtin_aarch64_st1x2v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s16_x2 (int16_t * __a, int16x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __val.val[1], 1);
    __builtin_aarch64_st1x2v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p16_x2 (poly16_t * __a, poly16x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __val.val[1], 1);
    __builtin_aarch64_st1x2v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s32_x2 (int32_t * __a, int32x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __val.val[1], 1);
    __builtin_aarch64_st1x2v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s64_x2 (int64_t * __a, int64x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __val.val[1], 1);
    __builtin_aarch64_st1x2v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u8_x2 (uint8_t * __a, uint8x16x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __val.val[1], 1);
    __builtin_aarch64_st1x2v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u16_x2 (uint16_t * __a, uint16x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __val.val[1], 1);
    __builtin_aarch64_st1x2v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u32_x2 (uint32_t * __a, uint32x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __val.val[1], 1);
    __builtin_aarch64_st1x2v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u64_x2 (uint64_t * __a, uint64x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __val.val[1], 1);
    __builtin_aarch64_st1x2v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f16_x2 (float16_t * __a, float16x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, __val.val[1], 1);
    __builtin_aarch64_st1x2v8hf (__a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f32_x2 (float32_t * __a, float32x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) __val.val[1], 1);
    __builtin_aarch64_st1x2v4sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f64_x2 (float64_t * __a, float64x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) __val.val[1], 1);
    __builtin_aarch64_st1x2v2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p64_x2 (poly64_t * __a, poly64x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[1], 1);
    __builtin_aarch64_st1x2v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
*************** vst1q_p64_x2 (poly64_t * __a, poly64x2x2
*** 28228,29710 ****
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s64_x3 (int64_t * __a, int64x1x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   int64x2x3_t temp;
!   temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (__AARCH64_INT64_C (0)));
!   temp.val[2] = vcombine_s64 (val.val[2], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[2], 2);
    __builtin_aarch64_st1x3di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u64_x3 (uint64_t * __a, uint64x1x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint64x2x3_t temp;
!   temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_u64 (val.val[2], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[2], 2);
    __builtin_aarch64_st1x3di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f64_x3 (float64_t * __a, float64x1x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   float64x2x3_t temp;
!   temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_f64 (val.val[2], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[2], 2);
    __builtin_aarch64_st1x3df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s8_x3 (int8_t * __a, int8x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   int8x16x3_t temp;
!   temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (__AARCH64_INT64_C (0)));
!   temp.val[2] = vcombine_s8 (val.val[2], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2);
    __builtin_aarch64_st1x3v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p8_x3 (poly8_t * __a, poly8x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   poly8x16x3_t temp;
!   temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_p8 (val.val[2], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2);
    __builtin_aarch64_st1x3v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s16_x3 (int16_t * __a, int16x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   int16x8x3_t temp;
!   temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (__AARCH64_INT64_C (0)));
!   temp.val[2] = vcombine_s16 (val.val[2], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2);
    __builtin_aarch64_st1x3v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p16_x3 (poly16_t * __a, poly16x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   poly16x8x3_t temp;
!   temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_p16 (val.val[2], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2);
    __builtin_aarch64_st1x3v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s32_x3 (int32_t * __a, int32x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   int32x4x3_t temp;
!   temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (__AARCH64_INT64_C (0)));
!   temp.val[2] = vcombine_s32 (val.val[2], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[2], 2);
    __builtin_aarch64_st1x3v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u8_x3 (uint8_t * __a, uint8x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint8x16x3_t temp;
!   temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_u8 (val.val[2], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2);
    __builtin_aarch64_st1x3v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u16_x3 (uint16_t * __a, uint16x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint16x8x3_t temp;
!   temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_u16 (val.val[2], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2);
    __builtin_aarch64_st1x3v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u32_x3 (uint32_t * __a, uint32x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint32x4x3_t temp;
!   temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_u32 (val.val[2], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[2], 2);
    __builtin_aarch64_st1x3v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f16_x3 (float16_t * __a, float16x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   float16x8x3_t temp;
!   temp.val[0] = vcombine_f16 (val.val[0], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f16 (val.val[1], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_f16 (val.val[2], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) temp.val[2], 2);
    __builtin_aarch64_st1x3v4hf ((__builtin_aarch64_simd_hf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f32_x3 (float32_t * __a, float32x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   float32x4x3_t temp;
!   temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_f32 (val.val[2], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[2], 2);
    __builtin_aarch64_st1x3v2sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p64_x3 (poly64_t * __a, poly64x1x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   poly64x2x3_t temp;
!   temp.val[0] = vcombine_p64 (val.val[0], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p64 (val.val[1], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_p64 (val.val[2], vcreate_p64 (__AARCH64_UINT64_C (0)));
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[1], 1);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[2], 2);
    __builtin_aarch64_st1x3di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s8_x3 (int8_t * __a, int8x16x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[2], 2);
    __builtin_aarch64_st1x3v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p8_x3 (poly8_t * __a, poly8x16x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[2], 2);
    __builtin_aarch64_st1x3v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s16_x3 (int16_t * __a, int16x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[2], 2);
    __builtin_aarch64_st1x3v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p16_x3 (poly16_t * __a, poly16x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[2], 2);
    __builtin_aarch64_st1x3v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s32_x3 (int32_t * __a, int32x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[2], 2);
    __builtin_aarch64_st1x3v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s64_x3 (int64_t * __a, int64x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[2], 2);
    __builtin_aarch64_st1x3v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u8_x3 (uint8_t * __a, uint8x16x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[2], 2);
    __builtin_aarch64_st1x3v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u16_x3 (uint16_t * __a, uint16x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[2], 2);
    __builtin_aarch64_st1x3v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u32_x3 (uint32_t * __a, uint32x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[2], 2);
    __builtin_aarch64_st1x3v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u64_x3 (uint64_t * __a, uint64x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[2], 2);
    __builtin_aarch64_st1x3v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f16_x3 (float16_t * __a, float16x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) val.val[2], 2);
    __builtin_aarch64_st1x3v8hf ((__builtin_aarch64_simd_hf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f32_x3 (float32_t * __a, float32x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) val.val[2], 2);
    __builtin_aarch64_st1x3v4sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f64_x3 (float64_t * __a, float64x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) val.val[2], 2);
    __builtin_aarch64_st1x3v2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p64_x3 (poly64_t * __a, poly64x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) val.val[0], 0);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) val.val[1], 1);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) val.val[2], 2);
    __builtin_aarch64_st1x3v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  /* vstn */
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_s64 (int64_t * __a, int64x1x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   int64x2x2_t temp;
!   temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[1], 1);
    __builtin_aarch64_st2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_u64 (uint64_t * __a, uint64x1x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint64x2x2_t temp;
!   temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[1], 1);
    __builtin_aarch64_st2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_f64 (float64_t * __a, float64x1x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   float64x2x2_t temp;
!   temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) temp.val[1], 1);
    __builtin_aarch64_st2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_s8 (int8_t * __a, int8x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   int8x16x2_t temp;
!   temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1);
    __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_p8 (poly8_t * __a, poly8x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   poly8x16x2_t temp;
!   temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1);
    __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_s16 (int16_t * __a, int16x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   int16x8x2_t temp;
!   temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1);
    __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_p16 (poly16_t * __a, poly16x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   poly16x8x2_t temp;
!   temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1);
    __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_s32 (int32_t * __a, int32x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   int32x4x2_t temp;
!   temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[1], 1);
    __builtin_aarch64_st2v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_u8 (uint8_t * __a, uint8x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint8x16x2_t temp;
!   temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1);
    __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_u16 (uint16_t * __a, uint16x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint16x8x2_t temp;
!   temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1);
    __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_u32 (uint32_t * __a, uint32x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint32x4x2_t temp;
!   temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[1], 1);
    __builtin_aarch64_st2v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_f16 (float16_t * __a, float16x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   float16x8x2_t temp;
!   temp.val[0] = vcombine_f16 (val.val[0], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f16 (val.val[1], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, temp.val[1], 1);
    __builtin_aarch64_st2v4hf (__a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_f32 (float32_t * __a, float32x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   float32x4x2_t temp;
!   temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) temp.val[1], 1);
    __builtin_aarch64_st2v2sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_p64 (poly64_t * __a, poly64x1x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   poly64x2x2_t temp;
!   temp.val[0] = vcombine_p64 (val.val[0], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p64 (val.val[1], vcreate_p64 (__AARCH64_UINT64_C (0)));
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[1], 1);
    __builtin_aarch64_st2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_s8 (int8_t * __a, int8x16x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[1], 1);
    __builtin_aarch64_st2v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_p8 (poly8_t * __a, poly8x16x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[1], 1);
    __builtin_aarch64_st2v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_s16 (int16_t * __a, int16x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[1], 1);
    __builtin_aarch64_st2v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_p16 (poly16_t * __a, poly16x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[1], 1);
    __builtin_aarch64_st2v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_s32 (int32_t * __a, int32x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[1], 1);
    __builtin_aarch64_st2v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_s64 (int64_t * __a, int64x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[1], 1);
    __builtin_aarch64_st2v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_u8 (uint8_t * __a, uint8x16x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[1], 1);
    __builtin_aarch64_st2v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_u16 (uint16_t * __a, uint16x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[1], 1);
    __builtin_aarch64_st2v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_u32 (uint32_t * __a, uint32x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[1], 1);
    __builtin_aarch64_st2v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_u64 (uint64_t * __a, uint64x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[1], 1);
    __builtin_aarch64_st2v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_f16 (float16_t * __a, float16x8x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, val.val[1], 1);
    __builtin_aarch64_st2v8hf (__a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_f32 (float32_t * __a, float32x4x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) val.val[1], 1);
    __builtin_aarch64_st2v4sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_f64 (float64_t * __a, float64x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) val.val[1], 1);
    __builtin_aarch64_st2v2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_p64 (poly64_t * __a, poly64x2x2_t val)
  {
    __builtin_aarch64_simd_oi __o;
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) val.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) val.val[1], 1);
    __builtin_aarch64_st2v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_s64 (int64_t * __a, int64x1x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   int64x2x3_t temp;
!   temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (__AARCH64_INT64_C (0)));
!   temp.val[2] = vcombine_s64 (val.val[2], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[2], 2);
    __builtin_aarch64_st3di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_u64 (uint64_t * __a, uint64x1x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint64x2x3_t temp;
!   temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_u64 (val.val[2], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[2], 2);
    __builtin_aarch64_st3di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_f64 (float64_t * __a, float64x1x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   float64x2x3_t temp;
!   temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_f64 (val.val[2], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[2], 2);
    __builtin_aarch64_st3df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_s8 (int8_t * __a, int8x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   int8x16x3_t temp;
!   temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (__AARCH64_INT64_C (0)));
!   temp.val[2] = vcombine_s8 (val.val[2], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2);
    __builtin_aarch64_st3v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_p8 (poly8_t * __a, poly8x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   poly8x16x3_t temp;
!   temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_p8 (val.val[2], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2);
    __builtin_aarch64_st3v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_s16 (int16_t * __a, int16x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   int16x8x3_t temp;
!   temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (__AARCH64_INT64_C (0)));
!   temp.val[2] = vcombine_s16 (val.val[2], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2);
    __builtin_aarch64_st3v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_p16 (poly16_t * __a, poly16x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   poly16x8x3_t temp;
!   temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_p16 (val.val[2], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2);
    __builtin_aarch64_st3v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_s32 (int32_t * __a, int32x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   int32x4x3_t temp;
!   temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (__AARCH64_INT64_C (0)));
!   temp.val[2] = vcombine_s32 (val.val[2], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[2], 2);
    __builtin_aarch64_st3v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_u8 (uint8_t * __a, uint8x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint8x16x3_t temp;
!   temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_u8 (val.val[2], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2);
    __builtin_aarch64_st3v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_u16 (uint16_t * __a, uint16x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint16x8x3_t temp;
!   temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_u16 (val.val[2], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2);
    __builtin_aarch64_st3v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_u32 (uint32_t * __a, uint32x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint32x4x3_t temp;
!   temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_u32 (val.val[2], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[2], 2);
    __builtin_aarch64_st3v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_f16 (float16_t * __a, float16x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   float16x8x3_t temp;
!   temp.val[0] = vcombine_f16 (val.val[0], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f16 (val.val[1], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_f16 (val.val[2], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) temp.val[2], 2);
    __builtin_aarch64_st3v4hf ((__builtin_aarch64_simd_hf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_f32 (float32_t * __a, float32x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   float32x4x3_t temp;
!   temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_f32 (val.val[2], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[2], 2);
    __builtin_aarch64_st3v2sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_p64 (poly64_t * __a, poly64x1x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   poly64x2x3_t temp;
!   temp.val[0] = vcombine_p64 (val.val[0], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p64 (val.val[1], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_p64 (val.val[2], vcreate_p64 (__AARCH64_UINT64_C (0)));
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[1], 1);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[2], 2);
    __builtin_aarch64_st3di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_s8 (int8_t * __a, int8x16x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[2], 2);
    __builtin_aarch64_st3v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_p8 (poly8_t * __a, poly8x16x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[2], 2);
    __builtin_aarch64_st3v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_s16 (int16_t * __a, int16x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[2], 2);
    __builtin_aarch64_st3v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_p16 (poly16_t * __a, poly16x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[2], 2);
    __builtin_aarch64_st3v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_s32 (int32_t * __a, int32x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[2], 2);
    __builtin_aarch64_st3v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_s64 (int64_t * __a, int64x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[2], 2);
    __builtin_aarch64_st3v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_u8 (uint8_t * __a, uint8x16x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[2], 2);
    __builtin_aarch64_st3v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_u16 (uint16_t * __a, uint16x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[2], 2);
    __builtin_aarch64_st3v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_u32 (uint32_t * __a, uint32x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[2], 2);
    __builtin_aarch64_st3v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_u64 (uint64_t * __a, uint64x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[2], 2);
    __builtin_aarch64_st3v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_f16 (float16_t * __a, float16x8x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) val.val[2], 2);
    __builtin_aarch64_st3v8hf ((__builtin_aarch64_simd_hf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_f32 (float32_t * __a, float32x4x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) val.val[2], 2);
    __builtin_aarch64_st3v4sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_f64 (float64_t * __a, float64x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) val.val[2], 2);
    __builtin_aarch64_st3v2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_p64 (poly64_t * __a, poly64x2x3_t val)
  {
    __builtin_aarch64_simd_ci __o;
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) val.val[0], 0);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) val.val[1], 1);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) val.val[2], 2);
    __builtin_aarch64_st3v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_s64 (int64_t * __a, int64x1x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   int64x2x4_t temp;
!   temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (__AARCH64_INT64_C (0)));
!   temp.val[2] = vcombine_s64 (val.val[2], vcreate_s64 (__AARCH64_INT64_C (0)));
!   temp.val[3] = vcombine_s64 (val.val[3], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[3], 3);
    __builtin_aarch64_st4di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_u64 (uint64_t * __a, uint64x1x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   uint64x2x4_t temp;
!   temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_u64 (val.val[2], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   temp.val[3] = vcombine_u64 (val.val[3], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[3], 3);
    __builtin_aarch64_st4di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_f64 (float64_t * __a, float64x1x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   float64x2x4_t temp;
!   temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_f64 (val.val[2], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   temp.val[3] = vcombine_f64 (val.val[3], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[3], 3);
    __builtin_aarch64_st4df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_s8 (int8_t * __a, int8x8x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   int8x16x4_t temp;
!   temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (__AARCH64_INT64_C (0)));
!   temp.val[2] = vcombine_s8 (val.val[2], vcreate_s8 (__AARCH64_INT64_C (0)));
!   temp.val[3] = vcombine_s8 (val.val[3], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[3], 3);
    __builtin_aarch64_st4v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_p8 (poly8_t * __a, poly8x8x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   poly8x16x4_t temp;
!   temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_p8 (val.val[2], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   temp.val[3] = vcombine_p8 (val.val[3], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[3], 3);
    __builtin_aarch64_st4v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_s16 (int16_t * __a, int16x4x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   int16x8x4_t temp;
!   temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (__AARCH64_INT64_C (0)));
!   temp.val[2] = vcombine_s16 (val.val[2], vcreate_s16 (__AARCH64_INT64_C (0)));
!   temp.val[3] = vcombine_s16 (val.val[3], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[3], 3);
    __builtin_aarch64_st4v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_p16 (poly16_t * __a, poly16x4x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   poly16x8x4_t temp;
!   temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_p16 (val.val[2], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   temp.val[3] = vcombine_p16 (val.val[3], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[3], 3);
    __builtin_aarch64_st4v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_s32 (int32_t * __a, int32x2x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   int32x4x4_t temp;
!   temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (__AARCH64_INT64_C (0)));
!   temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (__AARCH64_INT64_C (0)));
!   temp.val[2] = vcombine_s32 (val.val[2], vcreate_s32 (__AARCH64_INT64_C (0)));
!   temp.val[3] = vcombine_s32 (val.val[3], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[3], 3);
    __builtin_aarch64_st4v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_u8 (uint8_t * __a, uint8x8x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   uint8x16x4_t temp;
!   temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_u8 (val.val[2], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   temp.val[3] = vcombine_u8 (val.val[3], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[3], 3);
    __builtin_aarch64_st4v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_u16 (uint16_t * __a, uint16x4x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   uint16x8x4_t temp;
!   temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_u16 (val.val[2], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   temp.val[3] = vcombine_u16 (val.val[3], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[3], 3);
    __builtin_aarch64_st4v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_u32 (uint32_t * __a, uint32x2x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   uint32x4x4_t temp;
!   temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_u32 (val.val[2], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   temp.val[3] = vcombine_u32 (val.val[3], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[3], 3);
    __builtin_aarch64_st4v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_f16 (float16_t * __a, float16x4x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   float16x8x4_t temp;
!   temp.val[0] = vcombine_f16 (val.val[0], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f16 (val.val[1], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_f16 (val.val[2], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   temp.val[3] = vcombine_f16 (val.val[3], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) temp.val[3], 3);
    __builtin_aarch64_st4v4hf ((__builtin_aarch64_simd_hf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_f32 (float32_t * __a, float32x2x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   float32x4x4_t temp;
!   temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_f32 (val.val[2], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   temp.val[3] = vcombine_f32 (val.val[3], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[3], 3);
    __builtin_aarch64_st4v2sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_p64 (poly64_t * __a, poly64x1x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   poly64x2x4_t temp;
!   temp.val[0] = vcombine_p64 (val.val[0], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   temp.val[1] = vcombine_p64 (val.val[1], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   temp.val[2] = vcombine_p64 (val.val[2], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   temp.val[3] = vcombine_p64 (val.val[3], vcreate_p64 (__AARCH64_UINT64_C (0)));
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[1], 1);
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[2], 2);
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) temp.val[3], 3);
    __builtin_aarch64_st4di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_s8 (int8_t * __a, int8x16x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[3], 3);
    __builtin_aarch64_st4v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_p8 (poly8_t * __a, poly8x16x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[3], 3);
    __builtin_aarch64_st4v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_s16 (int16_t * __a, int16x8x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[3], 3);
    __builtin_aarch64_st4v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_p16 (poly16_t * __a, poly16x8x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[3], 3);
    __builtin_aarch64_st4v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_s32 (int32_t * __a, int32x4x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[3], 3);
    __builtin_aarch64_st4v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_s64 (int64_t * __a, int64x2x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[3], 3);
    __builtin_aarch64_st4v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_u8 (uint8_t * __a, uint8x16x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[3], 3);
    __builtin_aarch64_st4v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_u16 (uint16_t * __a, uint16x8x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[3], 3);
    __builtin_aarch64_st4v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_u32 (uint32_t * __a, uint32x4x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[3], 3);
    __builtin_aarch64_st4v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_u64 (uint64_t * __a, uint64x2x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[3], 3);
    __builtin_aarch64_st4v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_f16 (float16_t * __a, float16x8x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) val.val[3], 3);
    __builtin_aarch64_st4v8hf ((__builtin_aarch64_simd_hf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_f32 (float32_t * __a, float32x4x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) val.val[3], 3);
    __builtin_aarch64_st4v4sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_f64 (float64_t * __a, float64x2x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) val.val[3], 3);
    __builtin_aarch64_st4v2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_p64 (poly64_t * __a, poly64x2x4_t val)
  {
    __builtin_aarch64_simd_xi __o;
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) val.val[0], 0);
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) val.val[1], 1);
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) val.val[2], 2);
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) val.val[3], 3);
    __builtin_aarch64_st4v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
--- 28398,30106 ----
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s64_x3 (int64_t * __a, int64x1x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   int64x2x3_t __temp;
!   __temp.val[0] = vcombine_s64 (__val.val[0], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s64 (__val.val[1], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __temp.val[2] = vcombine_s64 (__val.val[2], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u64_x3 (uint64_t * __a, uint64x1x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint64x2x3_t __temp;
!   __temp.val[0] = vcombine_u64 (__val.val[0], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u64 (__val.val[1], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_u64 (__val.val[2], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f64_x3 (float64_t * __a, float64x1x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   float64x2x3_t __temp;
!   __temp.val[0] = vcombine_f64 (__val.val[0], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f64 (__val.val[1], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_f64 (__val.val[2], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s8_x3 (int8_t * __a, int8x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   int8x16x3_t __temp;
!   __temp.val[0] = vcombine_s8 (__val.val[0], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s8 (__val.val[1], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __temp.val[2] = vcombine_s8 (__val.val[2], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p8_x3 (poly8_t * __a, poly8x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   poly8x16x3_t __temp;
!   __temp.val[0] = vcombine_p8 (__val.val[0], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_p8 (__val.val[1], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_p8 (__val.val[2], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s16_x3 (int16_t * __a, int16x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   int16x8x3_t __temp;
!   __temp.val[0] = vcombine_s16 (__val.val[0], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s16 (__val.val[1], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __temp.val[2] = vcombine_s16 (__val.val[2], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p16_x3 (poly16_t * __a, poly16x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   poly16x8x3_t __temp;
!   __temp.val[0] = vcombine_p16 (__val.val[0], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_p16 (__val.val[1], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_p16 (__val.val[2], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_s32_x3 (int32_t * __a, int32x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   int32x4x3_t __temp;
!   __temp.val[0] = vcombine_s32 (__val.val[0], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s32 (__val.val[1], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __temp.val[2] = vcombine_s32 (__val.val[2], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u8_x3 (uint8_t * __a, uint8x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint8x16x3_t __temp;
!   __temp.val[0] = vcombine_u8 (__val.val[0], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u8 (__val.val[1], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_u8 (__val.val[2], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u16_x3 (uint16_t * __a, uint16x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint16x8x3_t __temp;
!   __temp.val[0] = vcombine_u16 (__val.val[0], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u16 (__val.val[1], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_u16 (__val.val[2], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_u32_x3 (uint32_t * __a, uint32x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint32x4x3_t __temp;
!   __temp.val[0] = vcombine_u32 (__val.val[0], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u32 (__val.val[1], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_u32 (__val.val[2], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f16_x3 (float16_t * __a, float16x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   float16x8x3_t __temp;
!   __temp.val[0] = vcombine_f16 (__val.val[0], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f16 (__val.val[1], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_f16 (__val.val[2], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3v4hf ((__builtin_aarch64_simd_hf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_f32_x3 (float32_t * __a, float32x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   float32x4x3_t __temp;
!   __temp.val[0] = vcombine_f32 (__val.val[0], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f32 (__val.val[1], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_f32 (__val.val[2], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3v2sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1_p64_x3 (poly64_t * __a, poly64x1x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   poly64x2x3_t __temp;
!   __temp.val[0] = vcombine_p64 (__val.val[0], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_p64 (__val.val[1], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_p64 (__val.val[2], vcreate_p64 (__AARCH64_UINT64_C (0)));
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[1], 1);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[2], 2);
    __builtin_aarch64_st1x3di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s8_x3 (int8_t * __a, int8x16x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p8_x3 (poly8_t * __a, poly8x16x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s16_x3 (int16_t * __a, int16x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p16_x3 (poly16_t * __a, poly16x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s32_x3 (int32_t * __a, int32x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_s64_x3 (int64_t * __a, int64x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u8_x3 (uint8_t * __a, uint8x16x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u16_x3 (uint16_t * __a, uint16x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u32_x3 (uint32_t * __a, uint32x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_u64_x3 (uint64_t * __a, uint64x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f16_x3 (float16_t * __a, float16x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v8hf ((__builtin_aarch64_simd_hf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f32_x3 (float32_t * __a, float32x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v4sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_f64_x3 (float64_t * __a, float64x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst1q_p64_x3 (poly64_t * __a, poly64x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[0], 0);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[1], 1);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[2], 2);
    __builtin_aarch64_st1x3v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
+ /* vst1(q)_x4.  */
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_s8_x4 (int8_t * __a, int8x8x4_t val)
+ {
+   union { int8x8x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v8qi ((__builtin_aarch64_simd_qi *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_s8_x4 (int8_t * __a, int8x16x4_t val)
+ {
+   union { int8x16x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v16qi ((__builtin_aarch64_simd_qi *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_s16_x4 (int16_t * __a, int16x4x4_t val)
+ {
+   union { int16x4x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v4hi ((__builtin_aarch64_simd_hi *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_s16_x4 (int16_t * __a, int16x8x4_t val)
+ {
+   union { int16x8x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v8hi ((__builtin_aarch64_simd_hi *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_s32_x4 (int32_t * __a, int32x2x4_t val)
+ {
+   union { int32x2x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v2si ((__builtin_aarch64_simd_si *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_s32_x4 (int32_t * __a, int32x4x4_t val)
+ {
+   union { int32x4x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v4si ((__builtin_aarch64_simd_si *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_u8_x4 (uint8_t * __a, uint8x8x4_t val)
+ {
+   union { uint8x8x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v8qi ((__builtin_aarch64_simd_qi *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_u8_x4 (uint8_t * __a, uint8x16x4_t val)
+ {
+   union { uint8x16x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v16qi ((__builtin_aarch64_simd_qi *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_u16_x4 (uint16_t * __a, uint16x4x4_t val)
+ {
+   union { uint16x4x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v4hi ((__builtin_aarch64_simd_hi *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_u16_x4 (uint16_t * __a, uint16x8x4_t val)
+ {
+   union { uint16x8x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v8hi ((__builtin_aarch64_simd_hi *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_u32_x4 (uint32_t * __a, uint32x2x4_t val)
+ {
+   union { uint32x2x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v2si ((__builtin_aarch64_simd_si *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_u32_x4 (uint32_t * __a, uint32x4x4_t val)
+ {
+   union { uint32x4x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v4si ((__builtin_aarch64_simd_si *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_f16_x4 (float16_t * __a, float16x4x4_t val)
+ {
+   union { float16x4x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v4hf ((__builtin_aarch64_simd_hf *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_f16_x4 (float16_t * __a, float16x8x4_t val)
+ {
+   union { float16x8x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v8hf ((__builtin_aarch64_simd_hf *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_f32_x4 (float32_t * __a, float32x2x4_t val)
+ {
+   union { float32x2x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v2sf ((__builtin_aarch64_simd_sf *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_f32_x4 (float32_t * __a, float32x4x4_t val)
+ {
+   union { float32x4x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v4sf ((__builtin_aarch64_simd_sf *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_p8_x4 (poly8_t * __a, poly8x8x4_t val)
+ {
+   union { poly8x8x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v8qi ((__builtin_aarch64_simd_qi *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_p8_x4 (poly8_t * __a, poly8x16x4_t val)
+ {
+   union { poly8x16x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v16qi ((__builtin_aarch64_simd_qi *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_p16_x4 (poly16_t * __a, poly16x4x4_t val)
+ {
+   union { poly16x4x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v4hi ((__builtin_aarch64_simd_hi *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_p16_x4 (poly16_t * __a, poly16x8x4_t val)
+ {
+   union { poly16x8x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v8hi ((__builtin_aarch64_simd_hi *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_s64_x4 (int64_t * __a, int64x1x4_t val)
+ {
+   union { int64x1x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4di ((__builtin_aarch64_simd_di *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_u64_x4 (uint64_t * __a, uint64x1x4_t val)
+ {
+   union { uint64x1x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4di ((__builtin_aarch64_simd_di *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_p64_x4 (poly64_t * __a, poly64x1x4_t val)
+ {
+   union { poly64x1x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4di ((__builtin_aarch64_simd_di *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_s64_x4 (int64_t * __a, int64x2x4_t val)
+ {
+   union { int64x2x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v2di ((__builtin_aarch64_simd_di *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_u64_x4 (uint64_t * __a, uint64x2x4_t val)
+ {
+   union { uint64x2x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v2di ((__builtin_aarch64_simd_di *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_p64_x4 (poly64_t * __a, poly64x2x4_t val)
+ {
+   union { poly64x2x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v2di ((__builtin_aarch64_simd_di *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_f64_x4 (float64_t * __a, float64x1x4_t val)
+ {
+   union { float64x1x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4df ((__builtin_aarch64_simd_df *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_f64_x4 (float64_t * __a, float64x2x4_t val)
+ {
+   union { float64x2x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v2df ((__builtin_aarch64_simd_df *) __a, __u.__o);
+ }
+ 
  /* vstn */
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_s64 (int64_t * __a, int64x1x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   int64x2x2_t __temp;
!   __temp.val[0] = vcombine_s64 (__val.val[0], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s64 (__val.val[1], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __temp.val[1], 1);
    __builtin_aarch64_st2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_u64 (uint64_t * __a, uint64x1x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint64x2x2_t __temp;
!   __temp.val[0] = vcombine_u64 (__val.val[0], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u64 (__val.val[1], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __temp.val[1], 1);
    __builtin_aarch64_st2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_f64 (float64_t * __a, float64x1x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   float64x2x2_t __temp;
!   __temp.val[0] = vcombine_f64 (__val.val[0], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f64 (__val.val[1], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) __temp.val[1], 1);
    __builtin_aarch64_st2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_s8 (int8_t * __a, int8x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   int8x16x2_t __temp;
!   __temp.val[0] = vcombine_s8 (__val.val[0], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s8 (__val.val[1], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __temp.val[1], 1);
    __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_p8 (poly8_t * __a, poly8x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   poly8x16x2_t __temp;
!   __temp.val[0] = vcombine_p8 (__val.val[0], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_p8 (__val.val[1], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __temp.val[1], 1);
    __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_s16 (int16_t * __a, int16x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   int16x8x2_t __temp;
!   __temp.val[0] = vcombine_s16 (__val.val[0], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s16 (__val.val[1], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __temp.val[1], 1);
    __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_p16 (poly16_t * __a, poly16x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   poly16x8x2_t __temp;
!   __temp.val[0] = vcombine_p16 (__val.val[0], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_p16 (__val.val[1], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __temp.val[1], 1);
    __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_s32 (int32_t * __a, int32x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   int32x4x2_t __temp;
!   __temp.val[0] = vcombine_s32 (__val.val[0], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s32 (__val.val[1], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __temp.val[1], 1);
    __builtin_aarch64_st2v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_u8 (uint8_t * __a, uint8x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint8x16x2_t __temp;
!   __temp.val[0] = vcombine_u8 (__val.val[0], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u8 (__val.val[1], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __temp.val[1], 1);
    __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_u16 (uint16_t * __a, uint16x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint16x8x2_t __temp;
!   __temp.val[0] = vcombine_u16 (__val.val[0], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u16 (__val.val[1], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __temp.val[1], 1);
    __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_u32 (uint32_t * __a, uint32x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   uint32x4x2_t __temp;
!   __temp.val[0] = vcombine_u32 (__val.val[0], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u32 (__val.val[1], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __temp.val[1], 1);
    __builtin_aarch64_st2v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_f16 (float16_t * __a, float16x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   float16x8x2_t __temp;
!   __temp.val[0] = vcombine_f16 (__val.val[0], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f16 (__val.val[1], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, __temp.val[1], 1);
    __builtin_aarch64_st2v4hf (__a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_f32 (float32_t * __a, float32x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   float32x4x2_t __temp;
!   __temp.val[0] = vcombine_f32 (__val.val[0], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f32 (__val.val[1], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) __temp.val[1], 1);
    __builtin_aarch64_st2v2sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2_p64 (poly64_t * __a, poly64x1x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   poly64x2x2_t __temp;
!   __temp.val[0] = vcombine_p64 (__val.val[0], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_p64 (__val.val[1], vcreate_p64 (__AARCH64_UINT64_C (0)));
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[1], 1);
    __builtin_aarch64_st2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_s8 (int8_t * __a, int8x16x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __val.val[1], 1);
    __builtin_aarch64_st2v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_p8 (poly8_t * __a, poly8x16x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __val.val[1], 1);
    __builtin_aarch64_st2v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_s16 (int16_t * __a, int16x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __val.val[1], 1);
    __builtin_aarch64_st2v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_p16 (poly16_t * __a, poly16x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __val.val[1], 1);
    __builtin_aarch64_st2v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_s32 (int32_t * __a, int32x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __val.val[1], 1);
    __builtin_aarch64_st2v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_s64 (int64_t * __a, int64x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __val.val[1], 1);
    __builtin_aarch64_st2v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_u8 (uint8_t * __a, uint8x16x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) __val.val[1], 1);
    __builtin_aarch64_st2v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_u16 (uint16_t * __a, uint16x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) __val.val[1], 1);
    __builtin_aarch64_st2v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_u32 (uint32_t * __a, uint32x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) __val.val[1], 1);
    __builtin_aarch64_st2v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_u64 (uint64_t * __a, uint64x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) __val.val[1], 1);
    __builtin_aarch64_st2v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_f16 (float16_t * __a, float16x8x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv8hf (__o, __val.val[1], 1);
    __builtin_aarch64_st2v8hf (__a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_f32 (float32_t * __a, float32x4x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) __val.val[1], 1);
    __builtin_aarch64_st2v4sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_f64 (float64_t * __a, float64x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) __val.val[1], 1);
    __builtin_aarch64_st2v2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst2q_p64 (poly64_t * __a, poly64x2x2_t __val)
  {
    __builtin_aarch64_simd_oi __o;
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[1], 1);
    __builtin_aarch64_st2v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_s64 (int64_t * __a, int64x1x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   int64x2x3_t __temp;
!   __temp.val[0] = vcombine_s64 (__val.val[0], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s64 (__val.val[1], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __temp.val[2] = vcombine_s64 (__val.val[2], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __temp.val[2], 2);
    __builtin_aarch64_st3di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_u64 (uint64_t * __a, uint64x1x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint64x2x3_t __temp;
!   __temp.val[0] = vcombine_u64 (__val.val[0], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u64 (__val.val[1], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_u64 (__val.val[2], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __temp.val[2], 2);
    __builtin_aarch64_st3di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_f64 (float64_t * __a, float64x1x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   float64x2x3_t __temp;
!   __temp.val[0] = vcombine_f64 (__val.val[0], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f64 (__val.val[1], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_f64 (__val.val[2], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) __temp.val[2], 2);
    __builtin_aarch64_st3df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_s8 (int8_t * __a, int8x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   int8x16x3_t __temp;
!   __temp.val[0] = vcombine_s8 (__val.val[0], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s8 (__val.val[1], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __temp.val[2] = vcombine_s8 (__val.val[2], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[2], 2);
    __builtin_aarch64_st3v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_p8 (poly8_t * __a, poly8x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   poly8x16x3_t __temp;
!   __temp.val[0] = vcombine_p8 (__val.val[0], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_p8 (__val.val[1], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_p8 (__val.val[2], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[2], 2);
    __builtin_aarch64_st3v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_s16 (int16_t * __a, int16x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   int16x8x3_t __temp;
!   __temp.val[0] = vcombine_s16 (__val.val[0], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s16 (__val.val[1], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __temp.val[2] = vcombine_s16 (__val.val[2], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[2], 2);
    __builtin_aarch64_st3v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_p16 (poly16_t * __a, poly16x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   poly16x8x3_t __temp;
!   __temp.val[0] = vcombine_p16 (__val.val[0], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_p16 (__val.val[1], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_p16 (__val.val[2], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[2], 2);
    __builtin_aarch64_st3v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_s32 (int32_t * __a, int32x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   int32x4x3_t __temp;
!   __temp.val[0] = vcombine_s32 (__val.val[0], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s32 (__val.val[1], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __temp.val[2] = vcombine_s32 (__val.val[2], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __temp.val[2], 2);
    __builtin_aarch64_st3v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_u8 (uint8_t * __a, uint8x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint8x16x3_t __temp;
!   __temp.val[0] = vcombine_u8 (__val.val[0], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u8 (__val.val[1], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_u8 (__val.val[2], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __temp.val[2], 2);
    __builtin_aarch64_st3v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_u16 (uint16_t * __a, uint16x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint16x8x3_t __temp;
!   __temp.val[0] = vcombine_u16 (__val.val[0], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u16 (__val.val[1], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_u16 (__val.val[2], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __temp.val[2], 2);
    __builtin_aarch64_st3v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_u32 (uint32_t * __a, uint32x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   uint32x4x3_t __temp;
!   __temp.val[0] = vcombine_u32 (__val.val[0], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u32 (__val.val[1], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_u32 (__val.val[2], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __temp.val[2], 2);
    __builtin_aarch64_st3v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_f16 (float16_t * __a, float16x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   float16x8x3_t __temp;
!   __temp.val[0] = vcombine_f16 (__val.val[0], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f16 (__val.val[1], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_f16 (__val.val[2], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) __temp.val[2], 2);
    __builtin_aarch64_st3v4hf ((__builtin_aarch64_simd_hf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_f32 (float32_t * __a, float32x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   float32x4x3_t __temp;
!   __temp.val[0] = vcombine_f32 (__val.val[0], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f32 (__val.val[1], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_f32 (__val.val[2], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) __temp.val[2], 2);
    __builtin_aarch64_st3v2sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3_p64 (poly64_t * __a, poly64x1x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   poly64x2x3_t __temp;
!   __temp.val[0] = vcombine_p64 (__val.val[0], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_p64 (__val.val[1], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_p64 (__val.val[2], vcreate_p64 (__AARCH64_UINT64_C (0)));
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[1], 1);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[2], 2);
    __builtin_aarch64_st3di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_s8 (int8_t * __a, int8x16x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[2], 2);
    __builtin_aarch64_st3v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_p8 (poly8_t * __a, poly8x16x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[2], 2);
    __builtin_aarch64_st3v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_s16 (int16_t * __a, int16x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[2], 2);
    __builtin_aarch64_st3v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_p16 (poly16_t * __a, poly16x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[2], 2);
    __builtin_aarch64_st3v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_s32 (int32_t * __a, int32x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __val.val[2], 2);
    __builtin_aarch64_st3v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_s64 (int64_t * __a, int64x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __val.val[2], 2);
    __builtin_aarch64_st3v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_u8 (uint8_t * __a, uint8x16x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) __val.val[2], 2);
    __builtin_aarch64_st3v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_u16 (uint16_t * __a, uint16x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) __val.val[2], 2);
    __builtin_aarch64_st3v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_u32 (uint32_t * __a, uint32x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) __val.val[2], 2);
    __builtin_aarch64_st3v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_u64 (uint64_t * __a, uint64x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) __val.val[2], 2);
    __builtin_aarch64_st3v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_f16 (float16_t * __a, float16x8x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) __val.val[2], 2);
    __builtin_aarch64_st3v8hf ((__builtin_aarch64_simd_hf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_f32 (float32_t * __a, float32x4x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) __val.val[2], 2);
    __builtin_aarch64_st3v4sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_f64 (float64_t * __a, float64x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) __val.val[2], 2);
    __builtin_aarch64_st3v2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst3q_p64 (poly64_t * __a, poly64x2x3_t __val)
  {
    __builtin_aarch64_simd_ci __o;
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[0], 0);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[1], 1);
    __o = __builtin_aarch64_set_qregciv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[2], 2);
    __builtin_aarch64_st3v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_s64 (int64_t * __a, int64x1x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   int64x2x4_t __temp;
!   __temp.val[0] = vcombine_s64 (__val.val[0], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s64 (__val.val[1], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __temp.val[2] = vcombine_s64 (__val.val[2], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __temp.val[3] = vcombine_s64 (__val.val[3], vcreate_s64 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __temp.val[3], 3);
    __builtin_aarch64_st4di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_u64 (uint64_t * __a, uint64x1x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   uint64x2x4_t __temp;
!   __temp.val[0] = vcombine_u64 (__val.val[0], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u64 (__val.val[1], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_u64 (__val.val[2], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __temp.val[3] = vcombine_u64 (__val.val[3], vcreate_u64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __temp.val[3], 3);
    __builtin_aarch64_st4di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_f64 (float64_t * __a, float64x1x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   float64x2x4_t __temp;
!   __temp.val[0] = vcombine_f64 (__val.val[0], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f64 (__val.val[1], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_f64 (__val.val[2], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __temp.val[3] = vcombine_f64 (__val.val[3], vcreate_f64 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) __temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) __temp.val[3], 3);
    __builtin_aarch64_st4df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_s8 (int8_t * __a, int8x8x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   int8x16x4_t __temp;
!   __temp.val[0] = vcombine_s8 (__val.val[0], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s8 (__val.val[1], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __temp.val[2] = vcombine_s8 (__val.val[2], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __temp.val[3] = vcombine_s8 (__val.val[3], vcreate_s8 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __temp.val[3], 3);
    __builtin_aarch64_st4v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_p8 (poly8_t * __a, poly8x8x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   poly8x16x4_t __temp;
!   __temp.val[0] = vcombine_p8 (__val.val[0], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_p8 (__val.val[1], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_p8 (__val.val[2], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __temp.val[3] = vcombine_p8 (__val.val[3], vcreate_p8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __temp.val[3], 3);
    __builtin_aarch64_st4v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_s16 (int16_t * __a, int16x4x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   int16x8x4_t __temp;
!   __temp.val[0] = vcombine_s16 (__val.val[0], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s16 (__val.val[1], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __temp.val[2] = vcombine_s16 (__val.val[2], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __temp.val[3] = vcombine_s16 (__val.val[3], vcreate_s16 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __temp.val[3], 3);
    __builtin_aarch64_st4v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_p16 (poly16_t * __a, poly16x4x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   poly16x8x4_t __temp;
!   __temp.val[0] = vcombine_p16 (__val.val[0], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_p16 (__val.val[1], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_p16 (__val.val[2], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __temp.val[3] = vcombine_p16 (__val.val[3], vcreate_p16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __temp.val[3], 3);
    __builtin_aarch64_st4v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_s32 (int32_t * __a, int32x2x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   int32x4x4_t __temp;
!   __temp.val[0] = vcombine_s32 (__val.val[0], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __temp.val[1] = vcombine_s32 (__val.val[1], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __temp.val[2] = vcombine_s32 (__val.val[2], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __temp.val[3] = vcombine_s32 (__val.val[3], vcreate_s32 (__AARCH64_INT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __temp.val[3], 3);
    __builtin_aarch64_st4v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_u8 (uint8_t * __a, uint8x8x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   uint8x16x4_t __temp;
!   __temp.val[0] = vcombine_u8 (__val.val[0], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u8 (__val.val[1], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_u8 (__val.val[2], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __temp.val[3] = vcombine_u8 (__val.val[3], vcreate_u8 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __temp.val[3], 3);
    __builtin_aarch64_st4v8qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_u16 (uint16_t * __a, uint16x4x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   uint16x8x4_t __temp;
!   __temp.val[0] = vcombine_u16 (__val.val[0], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u16 (__val.val[1], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_u16 (__val.val[2], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __temp.val[3] = vcombine_u16 (__val.val[3], vcreate_u16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __temp.val[3], 3);
    __builtin_aarch64_st4v4hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_u32 (uint32_t * __a, uint32x2x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   uint32x4x4_t __temp;
!   __temp.val[0] = vcombine_u32 (__val.val[0], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_u32 (__val.val[1], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_u32 (__val.val[2], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __temp.val[3] = vcombine_u32 (__val.val[3], vcreate_u32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __temp.val[3], 3);
    __builtin_aarch64_st4v2si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_f16 (float16_t * __a, float16x4x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   float16x8x4_t __temp;
!   __temp.val[0] = vcombine_f16 (__val.val[0], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f16 (__val.val[1], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_f16 (__val.val[2], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __temp.val[3] = vcombine_f16 (__val.val[3], vcreate_f16 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) __temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) __temp.val[3], 3);
    __builtin_aarch64_st4v4hf ((__builtin_aarch64_simd_hf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_f32 (float32_t * __a, float32x2x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   float32x4x4_t __temp;
!   __temp.val[0] = vcombine_f32 (__val.val[0], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_f32 (__val.val[1], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_f32 (__val.val[2], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __temp.val[3] = vcombine_f32 (__val.val[3], vcreate_f32 (__AARCH64_UINT64_C (0)));
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) __temp.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) __temp.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) __temp.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) __temp.val[3], 3);
    __builtin_aarch64_st4v2sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4_p64 (poly64_t * __a, poly64x1x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   poly64x2x4_t __temp;
!   __temp.val[0] = vcombine_p64 (__val.val[0], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   __temp.val[1] = vcombine_p64 (__val.val[1], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   __temp.val[2] = vcombine_p64 (__val.val[2], vcreate_p64 (__AARCH64_UINT64_C (0)));
!   __temp.val[3] = vcombine_p64 (__val.val[3], vcreate_p64 (__AARCH64_UINT64_C (0)));
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[1], 1);
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[2], 2);
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) __temp.val[3], 3);
    __builtin_aarch64_st4di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_s8 (int8_t * __a, int8x16x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __val.val[3], 3);
    __builtin_aarch64_st4v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_p8 (poly8_t * __a, poly8x16x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __val.val[3], 3);
    __builtin_aarch64_st4v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_s16 (int16_t * __a, int16x8x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __val.val[3], 3);
    __builtin_aarch64_st4v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_p16 (poly16_t * __a, poly16x8x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __val.val[3], 3);
    __builtin_aarch64_st4v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_s32 (int32_t * __a, int32x4x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __val.val[3], 3);
    __builtin_aarch64_st4v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_s64 (int64_t * __a, int64x2x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __val.val[3], 3);
    __builtin_aarch64_st4v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_u8 (uint8_t * __a, uint8x16x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) __val.val[3], 3);
    __builtin_aarch64_st4v16qi ((__builtin_aarch64_simd_qi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_u16 (uint16_t * __a, uint16x8x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) __val.val[3], 3);
    __builtin_aarch64_st4v8hi ((__builtin_aarch64_simd_hi *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_u32 (uint32_t * __a, uint32x4x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) __val.val[3], 3);
    __builtin_aarch64_st4v4si ((__builtin_aarch64_simd_si *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_u64 (uint64_t * __a, uint64x2x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) __val.val[3], 3);
    __builtin_aarch64_st4v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_f16 (float16_t * __a, float16x8x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) __val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) __val.val[3], 3);
    __builtin_aarch64_st4v8hf ((__builtin_aarch64_simd_hf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_f32 (float32_t * __a, float32x4x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) __val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) __val.val[3], 3);
    __builtin_aarch64_st4v4sf ((__builtin_aarch64_simd_sf *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_f64 (float64_t * __a, float64x2x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) __val.val[0], 0);
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) __val.val[1], 1);
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) __val.val[2], 2);
!   __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) __val.val[3], 3);
    __builtin_aarch64_st4v2df ((__builtin_aarch64_simd_df *) __a, __o);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vst4q_p64 (poly64_t * __a, poly64x2x4_t __val)
  {
    __builtin_aarch64_simd_xi __o;
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[0], 0);
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[1], 1);
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[2], 2);
    __o = __builtin_aarch64_set_qregxiv2di_ssps (__o,
! 					       (poly64x2_t) __val.val[3], 3);
    __builtin_aarch64_st4v2di ((__builtin_aarch64_simd_di *) __a, __o);
  }
  
*************** __extension__ extern __inline int8x8_t
*** 29796,29848 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  vtbx4_s8 (int8x8_t __r, int8x8x4_t __tab, int8x8_t __idx)
  {
!   int8x8_t result;
!   int8x16x2_t temp;
    __builtin_aarch64_simd_oi __o;
!   temp.val[0] = vcombine_s8 (__tab.val[0], __tab.val[1]);
!   temp.val[1] = vcombine_s8 (__tab.val[2], __tab.val[3]);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[1], 1);
!   result = __builtin_aarch64_tbx4v8qi (__r, __o, __idx);
!   return result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  vtbx4_u8 (uint8x8_t __r, uint8x8x4_t __tab, uint8x8_t __idx)
  {
!   uint8x8_t result;
!   uint8x16x2_t temp;
    __builtin_aarch64_simd_oi __o;
!   temp.val[0] = vcombine_u8 (__tab.val[0], __tab.val[1]);
!   temp.val[1] = vcombine_u8 (__tab.val[2], __tab.val[3]);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[1], 1);
!   result = (uint8x8_t)__builtin_aarch64_tbx4v8qi ((int8x8_t)__r, __o,
  						  (int8x8_t)__idx);
!   return result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  vtbx4_p8 (poly8x8_t __r, poly8x8x4_t __tab, uint8x8_t __idx)
  {
!   poly8x8_t result;
!   poly8x16x2_t temp;
    __builtin_aarch64_simd_oi __o;
!   temp.val[0] = vcombine_p8 (__tab.val[0], __tab.val[1]);
!   temp.val[1] = vcombine_p8 (__tab.val[2], __tab.val[3]);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) temp.val[1], 1);
!   result = (poly8x8_t)__builtin_aarch64_tbx4v8qi ((int8x8_t)__r, __o,
  						  (int8x8_t)__idx);
!   return result;
  }
  
  /* vtrn */
--- 30192,30244 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  vtbx4_s8 (int8x8_t __r, int8x8x4_t __tab, int8x8_t __idx)
  {
!   int8x8_t __result;
!   int8x16x2_t __temp;
    __builtin_aarch64_simd_oi __o;
!   __temp.val[0] = vcombine_s8 (__tab.val[0], __tab.val[1]);
!   __temp.val[1] = vcombine_s8 (__tab.val[2], __tab.val[3]);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[1], 1);
!   __result = __builtin_aarch64_tbx4v8qi (__r, __o, __idx);
!   return __result;
  }
  
  __extension__ extern __inline uint8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  vtbx4_u8 (uint8x8_t __r, uint8x8x4_t __tab, uint8x8_t __idx)
  {
!   uint8x8_t __result;
!   uint8x16x2_t __temp;
    __builtin_aarch64_simd_oi __o;
!   __temp.val[0] = vcombine_u8 (__tab.val[0], __tab.val[1]);
!   __temp.val[1] = vcombine_u8 (__tab.val[2], __tab.val[3]);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[1], 1);
!   __result = (uint8x8_t)__builtin_aarch64_tbx4v8qi ((int8x8_t)__r, __o,
  						  (int8x8_t)__idx);
!   return __result;
  }
  
  __extension__ extern __inline poly8x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  vtbx4_p8 (poly8x8_t __r, poly8x8x4_t __tab, uint8x8_t __idx)
  {
!   poly8x8_t __result;
!   poly8x16x2_t __temp;
    __builtin_aarch64_simd_oi __o;
!   __temp.val[0] = vcombine_p8 (__tab.val[0], __tab.val[1]);
!   __temp.val[1] = vcombine_p8 (__tab.val[2], __tab.val[3]);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[0], 0);
    __o = __builtin_aarch64_set_qregoiv16qi (__o,
! 					   (int8x16_t) __temp.val[1], 1);
!   __result = (poly8x8_t)__builtin_aarch64_tbx4v8qi ((int8x8_t)__r, __o,
  						  (int8x8_t)__idx);
!   return __result;
  }
  
  /* vtrn */
*************** vtrn_f16 (float16x4_t __a, float16x4_t _
*** 30374,30438 ****
  
  __extension__ extern __inline float32x2x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_f32 (float32x2_t a, float32x2_t b)
  {
!   return (float32x2x2_t) {vtrn1_f32 (a, b), vtrn2_f32 (a, b)};
  }
  
  __extension__ extern __inline poly8x8x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_p8 (poly8x8_t a, poly8x8_t b)
  {
!   return (poly8x8x2_t) {vtrn1_p8 (a, b), vtrn2_p8 (a, b)};
  }
  
  __extension__ extern __inline poly16x4x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_p16 (poly16x4_t a, poly16x4_t b)
  {
!   return (poly16x4x2_t) {vtrn1_p16 (a, b), vtrn2_p16 (a, b)};
  }
  
  __extension__ extern __inline int8x8x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_s8 (int8x8_t a, int8x8_t b)
  {
!   return (int8x8x2_t) {vtrn1_s8 (a, b), vtrn2_s8 (a, b)};
  }
  
  __extension__ extern __inline int16x4x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_s16 (int16x4_t a, int16x4_t b)
  {
!   return (int16x4x2_t) {vtrn1_s16 (a, b), vtrn2_s16 (a, b)};
  }
  
  __extension__ extern __inline int32x2x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_s32 (int32x2_t a, int32x2_t b)
  {
!   return (int32x2x2_t) {vtrn1_s32 (a, b), vtrn2_s32 (a, b)};
  }
  
  __extension__ extern __inline uint8x8x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_u8 (uint8x8_t a, uint8x8_t b)
  {
!   return (uint8x8x2_t) {vtrn1_u8 (a, b), vtrn2_u8 (a, b)};
  }
  
  __extension__ extern __inline uint16x4x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_u16 (uint16x4_t a, uint16x4_t b)
  {
!   return (uint16x4x2_t) {vtrn1_u16 (a, b), vtrn2_u16 (a, b)};
  }
  
  __extension__ extern __inline uint32x2x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_u32 (uint32x2_t a, uint32x2_t b)
  {
!   return (uint32x2x2_t) {vtrn1_u32 (a, b), vtrn2_u32 (a, b)};
  }
  
  __extension__ extern __inline float16x8x2_t
--- 30770,30834 ----
  
  __extension__ extern __inline float32x2x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_f32 (float32x2_t __a, float32x2_t __b)
  {
!   return (float32x2x2_t) {vtrn1_f32 (__a, __b), vtrn2_f32 (__a, __b)};
  }
  
  __extension__ extern __inline poly8x8x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_p8 (poly8x8_t __a, poly8x8_t __b)
  {
!   return (poly8x8x2_t) {vtrn1_p8 (__a, __b), vtrn2_p8 (__a, __b)};
  }
  
  __extension__ extern __inline poly16x4x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_p16 (poly16x4_t __a, poly16x4_t __b)
  {
!   return (poly16x4x2_t) {vtrn1_p16 (__a, __b), vtrn2_p16 (__a, __b)};
  }
  
  __extension__ extern __inline int8x8x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_s8 (int8x8_t __a, int8x8_t __b)
  {
!   return (int8x8x2_t) {vtrn1_s8 (__a, __b), vtrn2_s8 (__a, __b)};
  }
  
  __extension__ extern __inline int16x4x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_s16 (int16x4_t __a, int16x4_t __b)
  {
!   return (int16x4x2_t) {vtrn1_s16 (__a, __b), vtrn2_s16 (__a, __b)};
  }
  
  __extension__ extern __inline int32x2x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_s32 (int32x2_t __a, int32x2_t __b)
  {
!   return (int32x2x2_t) {vtrn1_s32 (__a, __b), vtrn2_s32 (__a, __b)};
  }
  
  __extension__ extern __inline uint8x8x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_u8 (uint8x8_t __a, uint8x8_t __b)
  {
!   return (uint8x8x2_t) {vtrn1_u8 (__a, __b), vtrn2_u8 (__a, __b)};
  }
  
  __extension__ extern __inline uint16x4x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_u16 (uint16x4_t __a, uint16x4_t __b)
  {
!   return (uint16x4x2_t) {vtrn1_u16 (__a, __b), vtrn2_u16 (__a, __b)};
  }
  
  __extension__ extern __inline uint32x2x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrn_u32 (uint32x2_t __a, uint32x2_t __b)
  {
!   return (uint32x2x2_t) {vtrn1_u32 (__a, __b), vtrn2_u32 (__a, __b)};
  }
  
  __extension__ extern __inline float16x8x2_t
*************** vtrnq_f16 (float16x8_t __a, float16x8_t
*** 30444,30508 ****
  
  __extension__ extern __inline float32x4x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_f32 (float32x4_t a, float32x4_t b)
  {
!   return (float32x4x2_t) {vtrn1q_f32 (a, b), vtrn2q_f32 (a, b)};
  }
  
  __extension__ extern __inline poly8x16x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_p8 (poly8x16_t a, poly8x16_t b)
  {
!   return (poly8x16x2_t) {vtrn1q_p8 (a, b), vtrn2q_p8 (a, b)};
  }
  
  __extension__ extern __inline poly16x8x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_p16 (poly16x8_t a, poly16x8_t b)
  {
!   return (poly16x8x2_t) {vtrn1q_p16 (a, b), vtrn2q_p16 (a, b)};
  }
  
  __extension__ extern __inline int8x16x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_s8 (int8x16_t a, int8x16_t b)
  {
!   return (int8x16x2_t) {vtrn1q_s8 (a, b), vtrn2q_s8 (a, b)};
  }
  
  __extension__ extern __inline int16x8x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_s16 (int16x8_t a, int16x8_t b)
  {
!   return (int16x8x2_t) {vtrn1q_s16 (a, b), vtrn2q_s16 (a, b)};
  }
  
  __extension__ extern __inline int32x4x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_s32 (int32x4_t a, int32x4_t b)
  {
!   return (int32x4x2_t) {vtrn1q_s32 (a, b), vtrn2q_s32 (a, b)};
  }
  
  __extension__ extern __inline uint8x16x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_u8 (uint8x16_t a, uint8x16_t b)
  {
!   return (uint8x16x2_t) {vtrn1q_u8 (a, b), vtrn2q_u8 (a, b)};
  }
  
  __extension__ extern __inline uint16x8x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_u16 (uint16x8_t a, uint16x8_t b)
  {
!   return (uint16x8x2_t) {vtrn1q_u16 (a, b), vtrn2q_u16 (a, b)};
  }
  
  __extension__ extern __inline uint32x4x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_u32 (uint32x4_t a, uint32x4_t b)
  {
!   return (uint32x4x2_t) {vtrn1q_u32 (a, b), vtrn2q_u32 (a, b)};
  }
  
  /* vtst */
--- 30840,30904 ----
  
  __extension__ extern __inline float32x4x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_f32 (float32x4_t __a, float32x4_t __b)
  {
!   return (float32x4x2_t) {vtrn1q_f32 (__a, __b), vtrn2q_f32 (__a, __b)};
  }
  
  __extension__ extern __inline poly8x16x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_p8 (poly8x16_t __a, poly8x16_t __b)
  {
!   return (poly8x16x2_t) {vtrn1q_p8 (__a, __b), vtrn2q_p8 (__a, __b)};
  }
  
  __extension__ extern __inline poly16x8x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_p16 (poly16x8_t __a, poly16x8_t __b)
  {
!   return (poly16x8x2_t) {vtrn1q_p16 (__a, __b), vtrn2q_p16 (__a, __b)};
  }
  
  __extension__ extern __inline int8x16x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_s8 (int8x16_t __a, int8x16_t __b)
  {
!   return (int8x16x2_t) {vtrn1q_s8 (__a, __b), vtrn2q_s8 (__a, __b)};
  }
  
  __extension__ extern __inline int16x8x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_s16 (int16x8_t __a, int16x8_t __b)
  {
!   return (int16x8x2_t) {vtrn1q_s16 (__a, __b), vtrn2q_s16 (__a, __b)};
  }
  
  __extension__ extern __inline int32x4x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_s32 (int32x4_t __a, int32x4_t __b)
  {
!   return (int32x4x2_t) {vtrn1q_s32 (__a, __b), vtrn2q_s32 (__a, __b)};
  }
  
  __extension__ extern __inline uint8x16x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_u8 (uint8x16_t __a, uint8x16_t __b)
  {
!   return (uint8x16x2_t) {vtrn1q_u8 (__a, __b), vtrn2q_u8 (__a, __b)};
  }
  
  __extension__ extern __inline uint16x8x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_u16 (uint16x8_t __a, uint16x8_t __b)
  {
!   return (uint16x8x2_t) {vtrn1q_u16 (__a, __b), vtrn2q_u16 (__a, __b)};
  }
  
  __extension__ extern __inline uint32x4x2_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vtrnq_u32 (uint32x4_t __a, uint32x4_t __b)
  {
!   return (uint32x4x2_t) {vtrn1q_u32 (__a, __b), vtrn2q_u32 (__a, __b)};
  }
  
  /* vtst */
*************** vrndxq_f16 (float16x8_t __a)
*** 32200,32229 ****
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrsqrte_f16 (float16x4_t a)
  {
!   return __builtin_aarch64_rsqrtev4hf (a);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrsqrteq_f16 (float16x8_t a)
  {
!   return __builtin_aarch64_rsqrtev8hf (a);
  }
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsqrt_f16 (float16x4_t a)
  {
!   return __builtin_aarch64_sqrtv4hf (a);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsqrtq_f16 (float16x8_t a)
  {
!   return __builtin_aarch64_sqrtv8hf (a);
  }
  
  /* ARMv8.2-A FP16 two operands vector intrinsics.  */
--- 32596,32625 ----
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrsqrte_f16 (float16x4_t __a)
  {
!   return __builtin_aarch64_rsqrtev4hf (__a);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrsqrteq_f16 (float16x8_t __a)
  {
!   return __builtin_aarch64_rsqrtev8hf (__a);
  }
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsqrt_f16 (float16x4_t __a)
  {
!   return __builtin_aarch64_sqrtv4hf (__a);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vsqrtq_f16 (float16x8_t __a)
  {
!   return __builtin_aarch64_sqrtv8hf (__a);
  }
  
  /* ARMv8.2-A FP16 two operands vector intrinsics.  */
*************** vaddq_f16 (float16x8_t __a, float16x8_t
*** 32244,32259 ****
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_f16 (float16x4_t a, float16x4_t b)
  {
!   return __builtin_aarch64_fabdv4hf (a, b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_f16 (float16x8_t a, float16x8_t b)
  {
!   return __builtin_aarch64_fabdv8hf (a, b);
  }
  
  __extension__ extern __inline uint16x4_t
--- 32640,32655 ----
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabd_f16 (float16x4_t __a, float16x4_t __b)
  {
!   return __builtin_aarch64_fabdv4hf (__a, __b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vabdq_f16 (float16x8_t __a, float16x8_t __b)
  {
!   return __builtin_aarch64_fabdv8hf (__a, __b);
  }
  
  __extension__ extern __inline uint16x4_t
*************** vmulxq_f16 (float16x8_t __a, float16x8_t
*** 32538,32609 ****
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadd_f16 (float16x4_t a, float16x4_t b)
  {
!   return __builtin_aarch64_faddpv4hf (a, b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_f16 (float16x8_t a, float16x8_t b)
  {
!   return __builtin_aarch64_faddpv8hf (a, b);
  }
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_f16 (float16x4_t a, float16x4_t b)
  {
!   return __builtin_aarch64_smax_nanpv4hf (a, b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_f16 (float16x8_t a, float16x8_t b)
  {
!   return __builtin_aarch64_smax_nanpv8hf (a, b);
  }
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnm_f16 (float16x4_t a, float16x4_t b)
  {
!   return __builtin_aarch64_smaxpv4hf (a, b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnmq_f16 (float16x8_t a, float16x8_t b)
  {
!   return __builtin_aarch64_smaxpv8hf (a, b);
  }
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_f16 (float16x4_t a, float16x4_t b)
  {
!   return __builtin_aarch64_smin_nanpv4hf (a, b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_f16 (float16x8_t a, float16x8_t b)
  {
!   return __builtin_aarch64_smin_nanpv8hf (a, b);
  }
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnm_f16 (float16x4_t a, float16x4_t b)
  {
!   return __builtin_aarch64_sminpv4hf (a, b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnmq_f16 (float16x8_t a, float16x8_t b)
  {
!   return __builtin_aarch64_sminpv8hf (a, b);
  }
  
  __extension__ extern __inline float16x4_t
--- 32934,33005 ----
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpadd_f16 (float16x4_t __a, float16x4_t __b)
  {
!   return __builtin_aarch64_faddpv4hf (__a, __b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpaddq_f16 (float16x8_t __a, float16x8_t __b)
  {
!   return __builtin_aarch64_faddpv8hf (__a, __b);
  }
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmax_f16 (float16x4_t __a, float16x4_t __b)
  {
!   return __builtin_aarch64_smax_nanpv4hf (__a, __b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxq_f16 (float16x8_t __a, float16x8_t __b)
  {
!   return __builtin_aarch64_smax_nanpv8hf (__a, __b);
  }
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnm_f16 (float16x4_t __a, float16x4_t __b)
  {
!   return __builtin_aarch64_smaxpv4hf (__a, __b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmaxnmq_f16 (float16x8_t __a, float16x8_t __b)
  {
!   return __builtin_aarch64_smaxpv8hf (__a, __b);
  }
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpmin_f16 (float16x4_t __a, float16x4_t __b)
  {
!   return __builtin_aarch64_smin_nanpv4hf (__a, __b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminq_f16 (float16x8_t __a, float16x8_t __b)
  {
!   return __builtin_aarch64_smin_nanpv8hf (__a, __b);
  }
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnm_f16 (float16x4_t __a, float16x4_t __b)
  {
!   return __builtin_aarch64_sminpv4hf (__a, __b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vpminnmq_f16 (float16x8_t __a, float16x8_t __b)
  {
!   return __builtin_aarch64_sminpv8hf (__a, __b);
  }
  
  __extension__ extern __inline float16x4_t
*************** vrecpsq_f16 (float16x8_t __a, float16x8_
*** 32622,32637 ****
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrsqrts_f16 (float16x4_t a, float16x4_t b)
  {
!   return __builtin_aarch64_rsqrtsv4hf (a, b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrsqrtsq_f16 (float16x8_t a, float16x8_t b)
  {
!   return __builtin_aarch64_rsqrtsv8hf (a, b);
  }
  
  __extension__ extern __inline float16x4_t
--- 33018,33033 ----
  
  __extension__ extern __inline float16x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrsqrts_f16 (float16x4_t __a, float16x4_t __b)
  {
!   return __builtin_aarch64_rsqrtsv4hf (__a, __b);
  }
  
  __extension__ extern __inline float16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! vrsqrtsq_f16 (float16x8_t __a, float16x8_t __b)
  {
!   return __builtin_aarch64_rsqrtsv8hf (__a, __b);
  }
  
  __extension__ extern __inline float16x4_t
*************** vfmlslq_laneq_high_f16 (float32x4_t __r,
*** 33960,33965 ****
--- 34356,35663 ----
  }
  
  #pragma GCC pop_options
+ 
+ #pragma GCC push_options
+ #pragma GCC target ("arch=armv8.5-a")
+ 
+ __extension__ extern __inline float32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd32z_f32 (float32x2_t __a)
+ {
+   return __builtin_aarch64_frint32zv2sf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd32zq_f32 (float32x4_t __a)
+ {
+   return __builtin_aarch64_frint32zv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float64x1_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd32z_f64 (float64x1_t __a)
+ {
+   return (float64x1_t)
+ 	   {__builtin_aarch64_frint32zdf (vget_lane_f64 (__a, 0))};
+ }
+ 
+ __extension__ extern __inline float64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd32zq_f64 (float64x2_t __a)
+ {
+   return __builtin_aarch64_frint32zv2df (__a);
+ }
+ 
+ __extension__ extern __inline float32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd32x_f32 (float32x2_t __a)
+ {
+   return __builtin_aarch64_frint32xv2sf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd32xq_f32 (float32x4_t __a)
+ {
+   return __builtin_aarch64_frint32xv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float64x1_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd32x_f64 (float64x1_t __a)
+ {
+   return (float64x1_t) {__builtin_aarch64_frint32xdf (vget_lane_f64 (__a, 0))};
+ }
+ 
+ __extension__ extern __inline float64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd32xq_f64 (float64x2_t __a)
+ {
+   return __builtin_aarch64_frint32xv2df (__a);
+ }
+ 
+ __extension__ extern __inline float32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd64z_f32 (float32x2_t __a)
+ {
+   return __builtin_aarch64_frint64zv2sf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd64zq_f32 (float32x4_t __a)
+ {
+   return __builtin_aarch64_frint64zv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float64x1_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd64z_f64 (float64x1_t __a)
+ {
+   return (float64x1_t) {__builtin_aarch64_frint64zdf (vget_lane_f64 (__a, 0))};
+ }
+ 
+ __extension__ extern __inline float64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd64zq_f64 (float64x2_t __a)
+ {
+   return __builtin_aarch64_frint64zv2df (__a);
+ }
+ 
+ __extension__ extern __inline float32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd64x_f32 (float32x2_t __a)
+ {
+   return __builtin_aarch64_frint64xv2sf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd64xq_f32 (float32x4_t __a)
+ {
+   return __builtin_aarch64_frint64xv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float64x1_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd64x_f64 (float64x1_t __a)
+ {
+   return (float64x1_t) {__builtin_aarch64_frint64xdf (vget_lane_f64 (__a, 0))};
+ }
+ 
+ __extension__ extern __inline float64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vrnd64xq_f64 (float64x2_t __a)
+ {
+   return __builtin_aarch64_frint64xv2df (__a);
+ }
+ 
+ #pragma GCC pop_options
+ 
+ #include "arm_bf16.h"
+ 
+ #pragma GCC push_options
+ #pragma GCC target ("arch=armv8.2-a+bf16")
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vset_lane_bf16 (bfloat16_t __elem, bfloat16x4_t __vec, const int __index)
+ {
+   return __aarch64_vset_lane_any (__elem, __vec, __index);
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vsetq_lane_bf16 (bfloat16_t __elem, bfloat16x8_t __vec, const int __index)
+ {
+   return __aarch64_vset_lane_any (__elem, __vec, __index);
+ }
+ 
+ __extension__ extern __inline bfloat16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vget_lane_bf16 (bfloat16x4_t __a, const int __b)
+ {
+   return __aarch64_vget_lane_any (__a, __b);
+ }
+ 
+ __extension__ extern __inline bfloat16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vgetq_lane_bf16 (bfloat16x8_t __a, const int __b)
+ {
+   return __aarch64_vget_lane_any (__a, __b);
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcreate_bf16 (uint64_t __a)
+ {
+   return (bfloat16x4_t) __a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcombine_bf16 (bfloat16x4_t __a, bfloat16x4_t __b)
+ {
+   return (bfloat16x8_t)__builtin_aarch64_combinev4bf (__a, __b);
+ }
+ 
+ /* vdup */
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vdup_n_bf16 (bfloat16_t __a)
+ {
+   return (bfloat16x4_t) {__a, __a, __a, __a};
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vdupq_n_bf16 (bfloat16_t __a)
+ {
+   return (bfloat16x8_t) {__a, __a, __a, __a, __a, __a, __a, __a};
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vdup_lane_bf16 (bfloat16x4_t __a, const int __b)
+ {
+   return vdup_n_bf16 (__aarch64_vget_lane_any (__a, __b));
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vdup_laneq_bf16 (bfloat16x8_t __a, const int __b)
+ {
+   return vdup_n_bf16 (__aarch64_vget_lane_any (__a, __b));
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vdupq_lane_bf16 (bfloat16x4_t __a, const int __b)
+ {
+   return vdupq_n_bf16 (__aarch64_vget_lane_any (__a, __b));
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vdupq_laneq_bf16 (bfloat16x8_t __a, const int __b)
+ {
+   return vdupq_n_bf16 (__aarch64_vget_lane_any (__a, __b));
+ }
+ 
+ __extension__ extern __inline bfloat16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vduph_lane_bf16 (bfloat16x4_t __a, const int __b)
+ {
+   return __aarch64_vget_lane_any (__a, __b);
+ }
+ 
+ __extension__ extern __inline bfloat16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vduph_laneq_bf16 (bfloat16x8_t __a, const int __b)
+ {
+   return __aarch64_vget_lane_any (__a, __b);
+ }
+ 
+ /* vld */
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld1_bf16 (const bfloat16_t *__a)
+ {
+   return (bfloat16x4_t) __builtin_aarch64_ld1v4bf (__a);
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld1q_bf16 (const bfloat16_t *__a)
+ {
+   return __builtin_aarch64_ld1v8bf (__a);
+ }
+ 
+ __extension__ extern __inline bfloat16x4x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld1_bf16_x2 (const bfloat16_t *__a)
+ {
+   bfloat16x4x2_t ret;
+   __builtin_aarch64_simd_oi __o;
+   __o = __builtin_aarch64_ld1x2v4bf ((const __builtin_aarch64_simd_bf *) __a);
+   ret.val[0] = (bfloat16x4_t) __builtin_aarch64_get_dregoiv4bf (__o, 0);
+   ret.val[1] = (bfloat16x4_t) __builtin_aarch64_get_dregoiv4bf (__o, 1);
+   return ret;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld1q_bf16_x2 (const bfloat16_t *__a)
+ {
+   bfloat16x8x2_t ret;
+   __builtin_aarch64_simd_oi __o;
+   __o = __builtin_aarch64_ld1x2v8bf ((const __builtin_aarch64_simd_bf *) __a);
+   ret.val[0] = (bfloat16x8_t) __builtin_aarch64_get_qregoiv8bf (__o, 0);
+   ret.val[1] = (bfloat16x8_t) __builtin_aarch64_get_qregoiv8bf (__o, 1);
+   return ret;
+ }
+ 
+ __extension__ extern __inline bfloat16x4x3_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld1_bf16_x3 (const bfloat16_t *__a)
+ {
+   bfloat16x4x3_t __i;
+   __builtin_aarch64_simd_ci __o;
+   __o = __builtin_aarch64_ld1x3v4bf ((const __builtin_aarch64_simd_bf *) __a);
+   __i.val[0] = (bfloat16x4_t) __builtin_aarch64_get_dregciv4bf  (__o, 0);
+   __i.val[1] = (bfloat16x4_t) __builtin_aarch64_get_dregciv4bf  (__o, 1);
+   __i.val[2] = (bfloat16x4_t) __builtin_aarch64_get_dregciv4bf  (__o, 2);
+   return __i;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x3_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld1q_bf16_x3 (const bfloat16_t *__a)
+ {
+   bfloat16x8x3_t __i;
+   __builtin_aarch64_simd_ci __o;
+   __o = __builtin_aarch64_ld1x3v8bf ((const __builtin_aarch64_simd_bf *) __a);
+   __i.val[0] = (bfloat16x8_t) __builtin_aarch64_get_qregciv8bf  (__o, 0);
+   __i.val[1] = (bfloat16x8_t) __builtin_aarch64_get_qregciv8bf  (__o, 1);
+   __i.val[2] = (bfloat16x8_t) __builtin_aarch64_get_qregciv8bf  (__o, 2);
+   return __i;
+ }
+ __extension__ extern __inline bfloat16x4x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld1_bf16_x4 (const bfloat16_t *__a)
+ {
+   union { bfloat16x4x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
+   __au.__o
+     = __builtin_aarch64_ld1x4v4bf ((const __builtin_aarch64_simd_bf *) __a);
+   return __au.__i;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld1q_bf16_x4 (const bfloat16_t *__a)
+ {
+   union { bfloat16x8x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
+   __au.__o
+     = __builtin_aarch64_ld1x4v8bf ((const __builtin_aarch64_simd_bf *) __a);
+   return __au.__i;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld1_lane_bf16 (const bfloat16_t *__src, bfloat16x4_t __vec, const int __lane)
+ {
+   return __aarch64_vset_lane_any (*__src, __vec, __lane);
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld1q_lane_bf16 (const bfloat16_t *__src, bfloat16x8_t __vec, const int __lane)
+ {
+   return __aarch64_vset_lane_any (*__src, __vec, __lane);
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld1_dup_bf16 (const bfloat16_t* __a)
+ {
+   return vdup_n_bf16 (*__a);
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld1q_dup_bf16 (const bfloat16_t* __a)
+ {
+   return vdupq_n_bf16 (*__a);
+ }
+ 
+ __extension__ extern __inline bfloat16x4x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld2_bf16 (const bfloat16_t * __a)
+ {
+   bfloat16x4x2_t ret;
+   __builtin_aarch64_simd_oi __o;
+   __o = __builtin_aarch64_ld2v4bf (__a);
+   ret.val[0] = (bfloat16x4_t) __builtin_aarch64_get_dregoiv4bf (__o, 0);
+   ret.val[1] = (bfloat16x4_t) __builtin_aarch64_get_dregoiv4bf (__o, 1);
+   return ret;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld2q_bf16 (const bfloat16_t * __a)
+ {
+   bfloat16x8x2_t ret;
+   __builtin_aarch64_simd_oi __o;
+   __o = __builtin_aarch64_ld2v8bf ((const __builtin_aarch64_simd_bf *) __a);
+   ret.val[0] = (bfloat16x8_t) __builtin_aarch64_get_qregoiv8bf (__o, 0);
+   ret.val[1] = (bfloat16x8_t) __builtin_aarch64_get_qregoiv8bf (__o, 1);
+   return ret;
+ }
+ 
+ __extension__ extern __inline bfloat16x4x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld2_dup_bf16 (const bfloat16_t * __a)
+ {
+   bfloat16x4x2_t ret;
+   __builtin_aarch64_simd_oi __o;
+   __o = __builtin_aarch64_ld2rv4bf ((const __builtin_aarch64_simd_bf *) __a);
+   ret.val[0] = (bfloat16x4_t) __builtin_aarch64_get_dregoiv4bf (__o, 0);
+   ret.val[1] = (bfloat16x4_t) __builtin_aarch64_get_dregoiv4bf (__o, 1);
+   return ret;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld2q_dup_bf16 (const bfloat16_t * __a)
+ {
+   bfloat16x8x2_t ret;
+   __builtin_aarch64_simd_oi __o;
+   __o = __builtin_aarch64_ld2rv8bf ((const __builtin_aarch64_simd_bf *) __a);
+   ret.val[0] = (bfloat16x8_t) __builtin_aarch64_get_qregoiv8bf (__o, 0);
+   ret.val[1] = (bfloat16x8_t) __builtin_aarch64_get_qregoiv8bf (__o, 1);
+   return ret;
+ }
+ 
+ __extension__ extern __inline bfloat16x4x3_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld3_bf16 (const bfloat16_t * __a)
+ {
+   bfloat16x4x3_t ret;
+   __builtin_aarch64_simd_ci __o;
+   __o = __builtin_aarch64_ld3v4bf ((const __builtin_aarch64_simd_bf *) __a);
+   ret.val[0] = (bfloat16x4_t) __builtin_aarch64_get_dregciv4bf (__o, 0);
+   ret.val[1] = (bfloat16x4_t) __builtin_aarch64_get_dregciv4bf (__o, 1);
+   ret.val[2] = (bfloat16x4_t) __builtin_aarch64_get_dregciv4bf (__o, 2);
+   return ret;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x3_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld3q_bf16 (const bfloat16_t * __a)
+ {
+   bfloat16x8x3_t ret;
+   __builtin_aarch64_simd_ci __o;
+   __o = __builtin_aarch64_ld3v8bf ((const __builtin_aarch64_simd_bf *) __a);
+   ret.val[0] = (bfloat16x8_t) __builtin_aarch64_get_qregciv8bf (__o, 0);
+   ret.val[1] = (bfloat16x8_t) __builtin_aarch64_get_qregciv8bf (__o, 1);
+   ret.val[2] = (bfloat16x8_t) __builtin_aarch64_get_qregciv8bf (__o, 2);
+   return ret;
+ }
+ 
+ __extension__ extern __inline bfloat16x4x3_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld3_dup_bf16 (const bfloat16_t * __a)
+ {
+   bfloat16x4x3_t ret;
+   __builtin_aarch64_simd_ci __o;
+   __o = __builtin_aarch64_ld3rv4bf ((const __builtin_aarch64_simd_bf *) __a);
+   ret.val[0] = (bfloat16x4_t) __builtin_aarch64_get_dregciv4bf (__o, 0);
+   ret.val[1] = (bfloat16x4_t) __builtin_aarch64_get_dregciv4bf (__o, 1);
+   ret.val[2] = (bfloat16x4_t) __builtin_aarch64_get_dregciv4bf (__o, 2);
+   return ret;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x3_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld3q_dup_bf16 (const bfloat16_t * __a)
+ {
+   bfloat16x8x3_t ret;
+   __builtin_aarch64_simd_ci __o;
+   __o = __builtin_aarch64_ld3rv8bf ((const __builtin_aarch64_simd_bf *) __a);
+   ret.val[0] = (bfloat16x8_t) __builtin_aarch64_get_qregciv8bf (__o, 0);
+   ret.val[1] = (bfloat16x8_t) __builtin_aarch64_get_qregciv8bf (__o, 1);
+   ret.val[2] = (bfloat16x8_t) __builtin_aarch64_get_qregciv8bf (__o, 2);
+   return ret;
+ }
+ 
+ __extension__ extern __inline bfloat16x4x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld4_bf16 (const bfloat16_t * __a)
+ {
+   bfloat16x4x4_t ret;
+   __builtin_aarch64_simd_xi __o;
+   __o = __builtin_aarch64_ld4v4bf ((const __builtin_aarch64_simd_bf *) __a);
+   ret.val[0] = (bfloat16x4_t) __builtin_aarch64_get_dregxiv4bf (__o, 0);
+   ret.val[1] = (bfloat16x4_t) __builtin_aarch64_get_dregxiv4bf (__o, 1);
+   ret.val[2] = (bfloat16x4_t) __builtin_aarch64_get_dregxiv4bf (__o, 2);
+   ret.val[3] = (bfloat16x4_t) __builtin_aarch64_get_dregxiv4bf (__o, 3);
+   return ret;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld4q_bf16 (const bfloat16_t * __a)
+ {
+   bfloat16x8x4_t ret;
+   __builtin_aarch64_simd_xi __o;
+   __o = __builtin_aarch64_ld4v8bf ((const __builtin_aarch64_simd_bf *) __a);
+   ret.val[0] = (bfloat16x8_t) __builtin_aarch64_get_qregxiv8bf (__o, 0);
+   ret.val[1] = (bfloat16x8_t) __builtin_aarch64_get_qregxiv8bf (__o, 1);
+   ret.val[2] = (bfloat16x8_t) __builtin_aarch64_get_qregxiv8bf (__o, 2);
+   ret.val[3] = (bfloat16x8_t) __builtin_aarch64_get_qregxiv8bf (__o, 3);
+   return ret;
+ }
+ 
+ __extension__ extern __inline bfloat16x4x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld4_dup_bf16 (const bfloat16_t * __a)
+ {
+   bfloat16x4x4_t ret;
+   __builtin_aarch64_simd_xi __o;
+   __o = __builtin_aarch64_ld4rv4bf ((const __builtin_aarch64_simd_bf *) __a);
+   ret.val[0] = (bfloat16x4_t) __builtin_aarch64_get_dregxiv4bf (__o, 0);
+   ret.val[1] = (bfloat16x4_t) __builtin_aarch64_get_dregxiv4bf (__o, 1);
+   ret.val[2] = (bfloat16x4_t) __builtin_aarch64_get_dregxiv4bf (__o, 2);
+   ret.val[3] = (bfloat16x4_t) __builtin_aarch64_get_dregxiv4bf (__o, 3);
+   return ret;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vld4q_dup_bf16 (const bfloat16_t * __a)
+ {
+   bfloat16x8x4_t ret;
+   __builtin_aarch64_simd_xi __o;
+   __o = __builtin_aarch64_ld4rv8bf ((const __builtin_aarch64_simd_bf *) __a);
+   ret.val[0] = (bfloat16x8_t) __builtin_aarch64_get_qregxiv8bf (__o, 0);
+   ret.val[1] = (bfloat16x8_t) __builtin_aarch64_get_qregxiv8bf (__o, 1);
+   ret.val[2] = (bfloat16x8_t) __builtin_aarch64_get_qregxiv8bf (__o, 2);
+   ret.val[3] = (bfloat16x8_t) __builtin_aarch64_get_qregxiv8bf (__o, 3);
+   return ret;
+ }
+ 
+ /* vst */
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_bf16 (bfloat16_t *__a, bfloat16x4_t __b)
+ {
+   __builtin_aarch64_st1v4bf (__a, __b);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_bf16_x2 (bfloat16_t * __a, bfloat16x4x2_t __val)
+ {
+   __builtin_aarch64_simd_oi __o;
+   bfloat16x8x2_t __temp;
+   __temp.val[0] = vcombine_bf16 (__val.val[0], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __temp.val[1] = vcombine_bf16 (__val.val[1], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __o = __builtin_aarch64_set_qregoiv8bf (__o, __temp.val[0], 0);
+   __o = __builtin_aarch64_set_qregoiv8bf (__o, __temp.val[1], 1);
+   __builtin_aarch64_st1x2v4bf (__a, __o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_bf16_x2 (bfloat16_t * __a, bfloat16x8x2_t __val)
+ {
+   __builtin_aarch64_simd_oi __o;
+   __o = __builtin_aarch64_set_qregoiv8bf (__o, __val.val[0], 0);
+   __o = __builtin_aarch64_set_qregoiv8bf (__o, __val.val[1], 1);
+   __builtin_aarch64_st1x2v8bf (__a, __o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_bf16_x3 (bfloat16_t * __a, bfloat16x4x3_t __val)
+ {
+   __builtin_aarch64_simd_ci __o;
+   bfloat16x8x3_t __temp;
+   __temp.val[0] = vcombine_bf16 (__val.val[0], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __temp.val[1] = vcombine_bf16 (__val.val[1], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __temp.val[2] = vcombine_bf16 (__val.val[2], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __o = __builtin_aarch64_set_qregciv8bf (__o, (bfloat16x8_t) __temp.val[0], 0);
+   __o = __builtin_aarch64_set_qregciv8bf (__o, (bfloat16x8_t) __temp.val[1], 1);
+   __o = __builtin_aarch64_set_qregciv8bf (__o, (bfloat16x8_t) __temp.val[2], 2);
+   __builtin_aarch64_st1x3v4bf ((__builtin_aarch64_simd_bf *) __a, __o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_bf16_x3 (bfloat16_t * __a, bfloat16x8x3_t __val)
+ {
+   __builtin_aarch64_simd_ci __o;
+   __o = __builtin_aarch64_set_qregciv8bf (__o, (bfloat16x8_t) __val.val[0], 0);
+   __o = __builtin_aarch64_set_qregciv8bf (__o, (bfloat16x8_t) __val.val[1], 1);
+   __o = __builtin_aarch64_set_qregciv8bf (__o, (bfloat16x8_t) __val.val[2], 2);
+   __builtin_aarch64_st1x3v8bf ((__builtin_aarch64_simd_bf *) __a, __o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_bf16_x4 (bfloat16_t * __a, bfloat16x4x4_t val)
+ {
+   union { bfloat16x4x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v4bf ((__builtin_aarch64_simd_bf *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_bf16_x4 (bfloat16_t * __a, bfloat16x8x4_t val)
+ {
+   union { bfloat16x8x4_t __i; __builtin_aarch64_simd_xi __o; } __u = { val };
+   __builtin_aarch64_st1x4v8bf ((__builtin_aarch64_simd_bf *) __a, __u.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_bf16 (bfloat16_t *__a, bfloat16x8_t __b)
+ {
+   __builtin_aarch64_st1v8bf (__a, __b);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1_lane_bf16 (bfloat16_t *__a, bfloat16x4_t __b, const int __lane)
+ {
+   *__a = __aarch64_vget_lane_any (__b, __lane);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst1q_lane_bf16 (bfloat16_t *__a, bfloat16x8_t __b, const int __lane)
+ {
+   *__a = __aarch64_vget_lane_any (__b, __lane);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst2_bf16 (bfloat16_t * __a, bfloat16x4x2_t __val)
+ {
+   __builtin_aarch64_simd_oi __o;
+   bfloat16x8x2_t __temp;
+   __temp.val[0] = vcombine_bf16 (__val.val[0], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __temp.val[1] = vcombine_bf16 (__val.val[1], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __o = __builtin_aarch64_set_qregoiv8bf (__o, __temp.val[0], 0);
+   __o = __builtin_aarch64_set_qregoiv8bf (__o, __temp.val[1], 1);
+   __builtin_aarch64_st2v4bf (__a, __o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst2q_bf16 (bfloat16_t * __a, bfloat16x8x2_t __val)
+ {
+   __builtin_aarch64_simd_oi __o;
+   __o = __builtin_aarch64_set_qregoiv8bf (__o, __val.val[0], 0);
+   __o = __builtin_aarch64_set_qregoiv8bf (__o, __val.val[1], 1);
+   __builtin_aarch64_st2v8bf (__a, __o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst3_bf16 (bfloat16_t * __a, bfloat16x4x3_t __val)
+ {
+   __builtin_aarch64_simd_ci __o;
+   bfloat16x8x3_t __temp;
+   __temp.val[0] = vcombine_bf16 (__val.val[0], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __temp.val[1] = vcombine_bf16 (__val.val[1], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __temp.val[2] = vcombine_bf16 (__val.val[2], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __o = __builtin_aarch64_set_qregciv8bf (__o, (bfloat16x8_t) __temp.val[0], 0);
+   __o = __builtin_aarch64_set_qregciv8bf (__o, (bfloat16x8_t) __temp.val[1], 1);
+   __o = __builtin_aarch64_set_qregciv8bf (__o, (bfloat16x8_t) __temp.val[2], 2);
+   __builtin_aarch64_st3v4bf ((__builtin_aarch64_simd_bf *) __a, __o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst3q_bf16 (bfloat16_t * __a, bfloat16x8x3_t __val)
+ {
+   __builtin_aarch64_simd_ci __o;
+   __o = __builtin_aarch64_set_qregciv8bf (__o, (bfloat16x8_t) __val.val[0], 0);
+   __o = __builtin_aarch64_set_qregciv8bf (__o, (bfloat16x8_t) __val.val[1], 1);
+   __o = __builtin_aarch64_set_qregciv8bf (__o, (bfloat16x8_t) __val.val[2], 2);
+   __builtin_aarch64_st3v8bf ((__builtin_aarch64_simd_bf *) __a, __o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst4_bf16 (bfloat16_t * __a, bfloat16x4x4_t __val)
+ {
+   __builtin_aarch64_simd_xi __o;
+   bfloat16x8x4_t __temp;
+   __temp.val[0] = vcombine_bf16 (__val.val[0], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __temp.val[1] = vcombine_bf16 (__val.val[1], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __temp.val[2] = vcombine_bf16 (__val.val[2], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __temp.val[3] = vcombine_bf16 (__val.val[3], vcreate_bf16 (__AARCH64_UINT64_C (0)));
+   __o = __builtin_aarch64_set_qregxiv8bf (__o, (bfloat16x8_t) __temp.val[0], 0);
+   __o = __builtin_aarch64_set_qregxiv8bf (__o, (bfloat16x8_t) __temp.val[1], 1);
+   __o = __builtin_aarch64_set_qregxiv8bf (__o, (bfloat16x8_t) __temp.val[2], 2);
+   __o = __builtin_aarch64_set_qregxiv8bf (__o, (bfloat16x8_t) __temp.val[3], 3);
+   __builtin_aarch64_st4v4bf ((__builtin_aarch64_simd_bf *) __a, __o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst4q_bf16 (bfloat16_t * __a, bfloat16x8x4_t __val)
+ {
+   __builtin_aarch64_simd_xi __o;
+   __o = __builtin_aarch64_set_qregxiv8bf (__o, (bfloat16x8_t) __val.val[0], 0);
+   __o = __builtin_aarch64_set_qregxiv8bf (__o, (bfloat16x8_t) __val.val[1], 1);
+   __o = __builtin_aarch64_set_qregxiv8bf (__o, (bfloat16x8_t) __val.val[2], 2);
+   __o = __builtin_aarch64_set_qregxiv8bf (__o, (bfloat16x8_t) __val.val[3], 3);
+   __builtin_aarch64_st4v8bf ((__builtin_aarch64_simd_bf *) __a, __o);
+ }
+ 
+ /* vreinterpret */
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_u8 (uint8x8_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_u16 (uint16x4_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_u32 (uint32x2_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_u64 (uint64x1_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_s8 (int8x8_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_s16 (int16x4_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_s32 (int32x2_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_s64 (int64x1_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_p8 (poly8x8_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_p16 (poly16x4_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_p64 (poly64x1_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_f16 (float16x4_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_f32 (float32x2_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_f64 (float64x1_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_u8 (uint8x16_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_u16 (uint16x8_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_u32 (uint32x4_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_u64 (uint64x2_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_s8 (int8x16_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_s16 (int16x8_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_s32 (int32x4_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_s64 (int64x2_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_p8 (poly8x16_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_p16 (poly16x8_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_p64 (poly64x2_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_p128 (poly128_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_f16 (float16x8_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_f32 (float32x4_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_f64 (float64x2_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline int8x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_s8_bf16 (bfloat16x4_t __a)
+ {
+   return (int8x8_t)__a;
+ }
+ 
+ __extension__ extern __inline int16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_s16_bf16 (bfloat16x4_t __a)
+ {
+   return (int16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline int32x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_s32_bf16 (bfloat16x4_t __a)
+ {
+   return (int32x2_t)__a;
+ }
+ 
+ __extension__ extern __inline int64x1_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_s64_bf16 (bfloat16x4_t __a)
+ {
+   return (int64x1_t)__a;
+ }
+ 
+ __extension__ extern __inline uint8x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_u8_bf16 (bfloat16x4_t __a)
+ {
+   return (uint8x8_t)__a;
+ }
+ 
+ __extension__ extern __inline uint16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_u16_bf16 (bfloat16x4_t __a)
+ {
+   return (uint16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline uint32x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_u32_bf16 (bfloat16x4_t __a)
+ {
+   return (uint32x2_t)__a;
+ }
+ 
+ __extension__ extern __inline uint64x1_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_u64_bf16 (bfloat16x4_t __a)
+ {
+   return (uint64x1_t)__a;
+ }
+ 
+ __extension__ extern __inline float16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_f16_bf16 (bfloat16x4_t __a)
+ {
+   return (float16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline float32x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_f32_bf16 (bfloat16x4_t __a)
+ {
+   return (float32x2_t)__a;
+ }
+ 
+ __extension__ extern __inline float64x1_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_f64_bf16 (bfloat16x4_t __a)
+ {
+   return (float64x1_t)__a;
+ }
+ 
+ __extension__ extern __inline poly8x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_p8_bf16 (bfloat16x4_t __a)
+ {
+   return (poly8x8_t)__a;
+ }
+ 
+ __extension__ extern __inline poly16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_p16_bf16 (bfloat16x4_t __a)
+ {
+   return (poly16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline poly64x1_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_p64_bf16 (bfloat16x4_t __a)
+ {
+   return (poly64x1_t)__a;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_s8_bf16 (bfloat16x8_t __a)
+ {
+   return (int8x16_t)__a;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_s16_bf16 (bfloat16x8_t __a)
+ {
+   return (int16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_s32_bf16 (bfloat16x8_t __a)
+ {
+   return (int32x4_t)__a;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_s64_bf16 (bfloat16x8_t __a)
+ {
+   return (int64x2_t)__a;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_u8_bf16 (bfloat16x8_t __a)
+ {
+   return (uint8x16_t)__a;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_u16_bf16 (bfloat16x8_t __a)
+ {
+   return (uint16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_u32_bf16 (bfloat16x8_t __a)
+ {
+   return (uint32x4_t)__a;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_u64_bf16 (bfloat16x8_t __a)
+ {
+   return (uint64x2_t)__a;
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_f16_bf16 (bfloat16x8_t __a)
+ {
+   return (float16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_f32_bf16 (bfloat16x8_t __a)
+ {
+   return (float32x4_t)__a;
+ }
+ 
+ __extension__ extern __inline float64x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_f64_bf16 (bfloat16x8_t __a)
+ {
+   return (float64x2_t)__a;
+ }
+ 
+ __extension__ extern __inline poly8x16_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_p8_bf16 (bfloat16x8_t __a)
+ {
+   return (poly8x16_t)__a;
+ }
+ 
+ __extension__ extern __inline poly16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_p16_bf16 (bfloat16x8_t __a)
+ {
+   return (poly16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline poly64x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_p64_bf16 (bfloat16x8_t __a)
+ {
+   return (poly64x2_t)__a;
+ }
+ 
+ __extension__ extern __inline poly128_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_p128_bf16 (bfloat16x8_t __a)
+ {
+   return (poly128_t)__a;
+ }
+ 
+ __extension__ extern __inline float32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfdot_f32 (float32x2_t __r, bfloat16x4_t __a, bfloat16x4_t __b)
+ {
+   return __builtin_aarch64_bfdotv2sf (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfdotq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b)
+ {
+   return __builtin_aarch64_bfdotv4sf (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline float32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfdot_lane_f32 (float32x2_t __r, bfloat16x4_t __a, bfloat16x4_t __b,
+ 		 const int __index)
+ {
+   return __builtin_aarch64_bfdot_lanev2sf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfdotq_lane_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x4_t __b,
+ 		  const int __index)
+ {
+   return __builtin_aarch64_bfdot_lanev4sf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline float32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfdot_laneq_f32 (float32x2_t __r, bfloat16x4_t __a, bfloat16x8_t __b,
+ 		  const int __index)
+ {
+   return __builtin_aarch64_bfdot_laneqv2sf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfdotq_laneq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b,
+ 		   const int __index)
+ {
+   return __builtin_aarch64_bfdot_laneqv4sf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmmlaq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b)
+ 
+ {
+   return __builtin_aarch64_bfmmlaqv4sf (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmlalbq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b)
+ {
+   return __builtin_aarch64_bfmlalbv4sf (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmlaltq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b)
+ {
+   return __builtin_aarch64_bfmlaltv4sf (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmlalbq_lane_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x4_t __b,
+ 		    const int __index)
+ {
+   return __builtin_aarch64_bfmlalb_lanev4sf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmlaltq_lane_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x4_t __b,
+ 		    const int __index)
+ {
+   return __builtin_aarch64_bfmlalt_lanev4sf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmlalbq_laneq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b,
+ 		     const int __index)
+ {
+   return __builtin_aarch64_bfmlalb_lane_qv4sf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmlaltq_laneq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b,
+ 		     const int __index)
+ {
+   return __builtin_aarch64_bfmlalt_lane_qv4sf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcvt_bf16_f32 (float32x4_t __a)
+ {
+   return __builtin_aarch64_bfcvtnv4bf (__a);
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcvtq_low_bf16_f32 (float32x4_t __a)
+ {
+   return __builtin_aarch64_bfcvtn_qv8bf (__a);
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcvtq_high_bf16_f32 (bfloat16x8_t __inactive, float32x4_t __a)
+ {
+   return __builtin_aarch64_bfcvtn2v8bf (__inactive, __a);
+ }
+ 
+ #pragma GCC pop_options
+ 
+ /* AdvSIMD 8-bit Integer Matrix Multiply (I8MM) intrinsics.  */
+ 
+ #pragma GCC push_options
+ #pragma GCC target ("arch=armv8.2-a+i8mm")
+ 
+ __extension__ extern __inline int32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vusdot_s32 (int32x2_t __r, uint8x8_t __a, int8x8_t __b)
+ {
+   return __builtin_aarch64_usdotv8qi_ssus (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vusdotq_s32 (int32x4_t __r, uint8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_aarch64_usdotv16qi_ssus (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vusdot_lane_s32 (int32x2_t __r, uint8x8_t __a, int8x8_t __b, const int __index)
+ {
+   return __builtin_aarch64_usdot_lanev8qi_ssuss (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline int32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vusdot_laneq_s32 (int32x2_t __r, uint8x8_t __a, int8x16_t __b,
+ 		  const int __index)
+ {
+   return __builtin_aarch64_usdot_laneqv8qi_ssuss (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vusdotq_lane_s32 (int32x4_t __r, uint8x16_t __a, int8x8_t __b,
+ 		  const int __index)
+ {
+   return __builtin_aarch64_usdot_lanev16qi_ssuss (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vusdotq_laneq_s32 (int32x4_t __r, uint8x16_t __a, int8x16_t __b,
+ 		   const int __index)
+ {
+   return __builtin_aarch64_usdot_laneqv16qi_ssuss (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline int32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vsudot_lane_s32 (int32x2_t __r, int8x8_t __a, uint8x8_t __b, const int __index)
+ {
+   return __builtin_aarch64_sudot_lanev8qi_sssus (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline int32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vsudot_laneq_s32 (int32x2_t __r, int8x8_t __a, uint8x16_t __b,
+ 		  const int __index)
+ {
+   return __builtin_aarch64_sudot_laneqv8qi_sssus (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vsudotq_lane_s32 (int32x4_t __r, int8x16_t __a, uint8x8_t __b,
+ 		  const int __index)
+ {
+   return __builtin_aarch64_sudot_lanev16qi_sssus (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vsudotq_laneq_s32 (int32x4_t __r, int8x16_t __a, uint8x16_t __b,
+ 		   const int __index)
+ {
+   return __builtin_aarch64_sudot_laneqv16qi_sssus (__r, __a, __b, __index);
+ }
+ 
+ /* Matrix Multiply-Accumulate.  */
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vmmlaq_s32 (int32x4_t __r, int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_aarch64_simd_smmlav16qi (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vmmlaq_u32 (uint32x4_t __r, uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_aarch64_simd_ummlav16qi_uuuu (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vusmmlaq_s32 (int32x4_t __r, uint8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_aarch64_simd_usmmlav16qi_ssus (__r, __a, __b);
+ }
+ 
+ #pragma GCC pop_options
  
  #undef __aarch64_vget_lane_any
  
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/arm_sve.h gcc-10.1.0/gcc/config/aarch64/arm_sve.h
*** gcc-9.3.0/gcc/config/aarch64/arm_sve.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/arm_sve.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,42 ----
+ /* AArch64 SVE intrinsics include file.
+    Copyright (C) 2018-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published
+    by the Free Software Foundation; either version 3, or (at your
+    option) any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    Under Section 7 of GPL version 3, you are granted additional
+    permissions described in the GCC Runtime Library Exception, version
+    3.1, as published by the Free Software Foundation.
+ 
+    You should have received a copy of the GNU General Public License and
+    a copy of the GCC Runtime Library Exception along with this program;
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef _ARM_SVE_H_
+ #define _ARM_SVE_H_
+ 
+ #include <stdint.h>
+ #include <arm_bf16.h>
+ 
+ typedef __fp16 float16_t;
+ typedef float float32_t;
+ typedef double float64_t;
+ 
+ /* NOTE: This implementation of arm_sve.h is intentionally short.  It does
+    not define the SVE types and intrinsic functions directly in C and C++
+    code, but instead uses the following pragma to tell GCC to insert the
+    necessary type and function definitions itself.  The net effect is the
+    same, and the file is a complete implementation of arm_sve.h.  */
+ #pragma GCC aarch64 "arm_sve.h"
+ 
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/atomics.md gcc-10.1.0/gcc/config/aarch64/atomics.md
*** gcc-9.3.0/gcc/config/aarch64/atomics.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/atomics.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description for AArch64 processor synchronization primitives.
! ;; Copyright (C) 2009-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Machine description for AArch64 processor synchronization primitives.
! ;; Copyright (C) 2009-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
***************
*** 22,31 ****
  
  (define_expand "@atomic_compare_and_swap<mode>"
    [(match_operand:SI 0 "register_operand" "")			;; bool out
!    (match_operand:ALLI 1 "register_operand" "")			;; val out
!    (match_operand:ALLI 2 "aarch64_sync_memory_operand" "")	;; memory
!    (match_operand:ALLI 3 "nonmemory_operand" "")		;; expected
!    (match_operand:ALLI 4 "aarch64_reg_or_zero" "")		;; desired
     (match_operand:SI 5 "const_int_operand")			;; is_weak
     (match_operand:SI 6 "const_int_operand")			;; mod_s
     (match_operand:SI 7 "const_int_operand")]			;; mod_f
--- 22,31 ----
  
  (define_expand "@atomic_compare_and_swap<mode>"
    [(match_operand:SI 0 "register_operand" "")			;; bool out
!    (match_operand:ALLI_TI 1 "register_operand" "")		;; val out
!    (match_operand:ALLI_TI 2 "aarch64_sync_memory_operand" "")	;; memory
!    (match_operand:ALLI_TI 3 "nonmemory_operand" "")		;; expected
!    (match_operand:ALLI_TI 4 "aarch64_reg_or_zero" "")		;; desired
     (match_operand:SI 5 "const_int_operand")			;; is_weak
     (match_operand:SI 6 "const_int_operand")			;; mod_s
     (match_operand:SI 7 "const_int_operand")]			;; mod_f
***************
*** 38,43 ****
--- 38,45 ----
  
  (define_mode_attr cas_short_expected_pred
    [(QI "aarch64_reg_or_imm") (HI "aarch64_plushi_operand")])
+ (define_mode_attr cas_short_expected_imm
+   [(QI "n") (HI "Uph")])
  
  (define_insn_and_split "@aarch64_compare_and_swap<mode>"
    [(set (reg:CC CC_REGNUM)					;; bool out
***************
*** 47,53 ****
        (match_operand:SHORT 1 "aarch64_sync_memory_operand" "+Q"))) ;; memory
     (set (match_dup 1)
      (unspec_volatile:SHORT
!       [(match_operand:SHORT 2 "<cas_short_expected_pred>" "rn")	;; expected
         (match_operand:SHORT 3 "aarch64_reg_or_zero" "rZ")	;; desired
         (match_operand:SI 4 "const_int_operand")			;; is_weak
         (match_operand:SI 5 "const_int_operand")			;; mod_s
--- 49,56 ----
        (match_operand:SHORT 1 "aarch64_sync_memory_operand" "+Q"))) ;; memory
     (set (match_dup 1)
      (unspec_volatile:SHORT
!       [(match_operand:SHORT 2 "<cas_short_expected_pred>"
! 			      "r<cas_short_expected_imm>")	;; expected
         (match_operand:SHORT 3 "aarch64_reg_or_zero" "rZ")	;; desired
         (match_operand:SI 4 "const_int_operand")			;; is_weak
         (match_operand:SI 5 "const_int_operand")			;; mod_s
***************
*** 88,93 ****
--- 91,120 ----
    }
  )
  
+ (define_insn_and_split "@aarch64_compare_and_swap<mode>"
+   [(set (reg:CC CC_REGNUM)					;; bool out
+     (unspec_volatile:CC [(const_int 0)] UNSPECV_ATOMIC_CMPSW))
+    (set (match_operand:JUST_TI 0 "register_operand" "=&r")	;; val out
+     (match_operand:JUST_TI 1 "aarch64_sync_memory_operand" "+Q")) ;; memory
+    (set (match_dup 1)
+     (unspec_volatile:JUST_TI
+       [(match_operand:JUST_TI 2 "aarch64_reg_or_zero" "rZ")	;; expect
+        (match_operand:JUST_TI 3 "aarch64_reg_or_zero" "rZ")	;; desired
+        (match_operand:SI 4 "const_int_operand")			;; is_weak
+        (match_operand:SI 5 "const_int_operand")			;; mod_s
+        (match_operand:SI 6 "const_int_operand")]		;; mod_f
+       UNSPECV_ATOMIC_CMPSW))
+    (clobber (match_scratch:SI 7 "=&r"))]
+   ""
+   "#"
+   "&& epilogue_completed"
+   [(const_int 0)]
+   {
+     aarch64_split_compare_and_swap (operands);
+     DONE;
+   }
+ )
+ 
  (define_insn "@aarch64_compare_and_swap<mode>_lse"
    [(set (match_operand:SI 0 "register_operand" "+r")		;; val out
      (zero_extend:SI
***************
*** 133,155 ****
      return "casal<atomic_sfx>\t%<w>0, %<w>2, %1";
  })
  
  (define_expand "atomic_exchange<mode>"
!  [(match_operand:ALLI 0 "register_operand" "")
!   (match_operand:ALLI 1 "aarch64_sync_memory_operand" "")
!   (match_operand:ALLI 2 "aarch64_reg_or_zero" "")
!   (match_operand:SI 3 "const_int_operand" "")]
    ""
    {
-     rtx (*gen) (rtx, rtx, rtx, rtx);
- 
      /* Use an atomic SWP when available.  */
      if (TARGET_LSE)
!       gen = gen_aarch64_atomic_exchange<mode>_lse;
      else
!       gen = gen_aarch64_atomic_exchange<mode>;
! 
!     emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
! 
      DONE;
    }
  )
--- 160,215 ----
      return "casal<atomic_sfx>\t%<w>0, %<w>2, %1";
  })
  
+ (define_insn "@aarch64_compare_and_swap<mode>_lse"
+   [(set (match_operand:JUST_TI 0 "register_operand" "+r")	;; val out
+     (match_operand:JUST_TI 1 "aarch64_sync_memory_operand" "+Q")) ;; memory
+    (set (match_dup 1)
+     (unspec_volatile:JUST_TI
+       [(match_dup 0)						;; expect
+        (match_operand:JUST_TI 2 "register_operand" "r")		;; desired
+        (match_operand:SI 3 "const_int_operand")]		;; mod_s
+       UNSPECV_ATOMIC_CMPSW))]
+   "TARGET_LSE"
+ {
+   enum memmodel model = memmodel_from_int (INTVAL (operands[3]));
+   if (is_mm_relaxed (model))
+     return "casp\t%0, %R0, %2, %R2, %1";
+   else if (is_mm_acquire (model) || is_mm_consume (model))
+     return "caspa\t%0, %R0, %2, %R2, %1";
+   else if (is_mm_release (model))
+     return "caspl\t%0, %R0, %2, %R2, %1";
+   else
+     return "caspal\t%0, %R0, %2, %R2, %1";
+ })
+ 
  (define_expand "atomic_exchange<mode>"
!  [(match_operand:ALLI 0 "register_operand")
!   (match_operand:ALLI 1 "aarch64_sync_memory_operand")
!   (match_operand:ALLI 2 "aarch64_reg_or_zero")
!   (match_operand:SI 3 "const_int_operand")]
    ""
    {
      /* Use an atomic SWP when available.  */
      if (TARGET_LSE)
!       {
! 	emit_insn (gen_aarch64_atomic_exchange<mode>_lse
! 		   (operands[0], operands[1], operands[2], operands[3]));
!       }
!     else if (TARGET_OUTLINE_ATOMICS)
!       {
! 	machine_mode mode = <MODE>mode;
! 	rtx func = aarch64_atomic_ool_func (mode, operands[3],
! 					    &aarch64_ool_swp_names);
! 	rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL,
! 					    mode, operands[2], mode,
! 					    XEXP (operands[1], 0), Pmode);
!         emit_move_insn (operands[0], rval);
!       }
      else
!       {
! 	emit_insn (gen_aarch64_atomic_exchange<mode>
! 		   (operands[0], operands[1], operands[2], operands[3]));
!       }
      DONE;
    }
  )
***************
*** 198,206 ****
  )
  
  (define_expand "atomic_<atomic_optab><mode>"
!  [(match_operand:ALLI 0 "aarch64_sync_memory_operand" "")
    (atomic_op:ALLI
!    (match_operand:ALLI 1 "<atomic_op_operand>" "")
     (match_operand:SI 2 "const_int_operand"))]
    ""
    {
--- 258,266 ----
  )
  
  (define_expand "atomic_<atomic_optab><mode>"
!  [(match_operand:ALLI 0 "aarch64_sync_memory_operand")
    (atomic_op:ALLI
!    (match_operand:ALLI 1 "<atomic_op_operand>")
     (match_operand:SI 2 "const_int_operand"))]
    ""
    {
***************
*** 234,239 ****
--- 294,332 ----
  	  }
  	operands[1] = force_reg (<MODE>mode, operands[1]);
        }
+     else if (TARGET_OUTLINE_ATOMICS)
+       {
+         const atomic_ool_names *names;
+ 	switch (<CODE>)
+ 	  {
+ 	  case MINUS:
+ 	    operands[1] = expand_simple_unop (<MODE>mode, NEG, operands[1],
+ 					      NULL, 1);
+ 	    /* fallthru */
+ 	  case PLUS:
+ 	    names = &aarch64_ool_ldadd_names;
+ 	    break;
+ 	  case IOR:
+ 	    names = &aarch64_ool_ldset_names;
+ 	    break;
+ 	  case XOR:
+ 	    names = &aarch64_ool_ldeor_names;
+ 	    break;
+ 	  case AND:
+ 	    operands[1] = expand_simple_unop (<MODE>mode, NOT, operands[1],
+ 					      NULL, 1);
+ 	    names = &aarch64_ool_ldclr_names;
+ 	    break;
+ 	  default:
+ 	    gcc_unreachable ();
+ 	  }
+         machine_mode mode = <MODE>mode;
+ 	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
+ 	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
+ 				 operands[1], mode,
+ 				 XEXP (operands[0], 0), Pmode);
+         DONE;
+       }
      else
        gen = gen_aarch64_atomic_<atomic_optab><mode>;
  
***************
*** 322,331 ****
  ;; Load-operate-store, returning the original memory data.
  
  (define_expand "atomic_fetch_<atomic_optab><mode>"
!  [(match_operand:ALLI 0 "register_operand" "")
!   (match_operand:ALLI 1 "aarch64_sync_memory_operand" "")
    (atomic_op:ALLI
!    (match_operand:ALLI 2 "<atomic_op_operand>" "")
     (match_operand:SI 3 "const_int_operand"))]
   ""
  {
--- 415,424 ----
  ;; Load-operate-store, returning the original memory data.
  
  (define_expand "atomic_fetch_<atomic_optab><mode>"
!  [(match_operand:ALLI 0 "register_operand")
!   (match_operand:ALLI 1 "aarch64_sync_memory_operand")
    (atomic_op:ALLI
!    (match_operand:ALLI 2 "<atomic_op_operand>")
     (match_operand:SI 3 "const_int_operand"))]
   ""
  {
***************
*** 359,364 ****
--- 452,491 ----
  	}
        operands[2] = force_reg (<MODE>mode, operands[2]);
      }
+   else if (TARGET_OUTLINE_ATOMICS)
+     {
+       const atomic_ool_names *names;
+       switch (<CODE>)
+ 	{
+ 	case MINUS:
+ 	  operands[2] = expand_simple_unop (<MODE>mode, NEG, operands[2],
+ 					    NULL, 1);
+ 	  /* fallthru */
+ 	case PLUS:
+ 	  names = &aarch64_ool_ldadd_names;
+ 	  break;
+ 	case IOR:
+ 	  names = &aarch64_ool_ldset_names;
+ 	  break;
+ 	case XOR:
+ 	  names = &aarch64_ool_ldeor_names;
+ 	  break;
+ 	case AND:
+ 	  operands[2] = expand_simple_unop (<MODE>mode, NOT, operands[2],
+ 					    NULL, 1);
+ 	  names = &aarch64_ool_ldclr_names;
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+       machine_mode mode = <MODE>mode;
+       rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
+       rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
+ 					  operands[2], mode,
+ 					  XEXP (operands[1], 0), Pmode);
+       emit_move_insn (operands[0], rval);
+       DONE;
+     }
    else
      gen = gen_aarch64_atomic_fetch_<atomic_optab><mode>;
  
***************
*** 439,454 ****
  ;; Load-operate-store, returning the updated memory data.
  
  (define_expand "atomic_<atomic_optab>_fetch<mode>"
!  [(match_operand:ALLI 0 "register_operand" "")
    (atomic_op:ALLI
!    (match_operand:ALLI 1 "aarch64_sync_memory_operand" "")
!    (match_operand:ALLI 2 "<atomic_op_operand>" ""))
    (match_operand:SI 3 "const_int_operand")]
   ""
  {
    /* Use an atomic load-operate instruction when possible.  In this case
       we will re-compute the result from the original mem value. */
!   if (TARGET_LSE)
      {
        rtx tmp = gen_reg_rtx (<MODE>mode);
        operands[2] = force_reg (<MODE>mode, operands[2]);
--- 566,581 ----
  ;; Load-operate-store, returning the updated memory data.
  
  (define_expand "atomic_<atomic_optab>_fetch<mode>"
!  [(match_operand:ALLI 0 "register_operand")
    (atomic_op:ALLI
!    (match_operand:ALLI 1 "aarch64_sync_memory_operand")
!    (match_operand:ALLI 2 "<atomic_op_operand>"))
    (match_operand:SI 3 "const_int_operand")]
   ""
  {
    /* Use an atomic load-operate instruction when possible.  In this case
       we will re-compute the result from the original mem value. */
!   if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
      {
        rtx tmp = gen_reg_rtx (<MODE>mode);
        operands[2] = force_reg (<MODE>mode, operands[2]);
***************
*** 581,586 ****
--- 708,731 ----
    }
  )
  
+ (define_insn "aarch64_load_exclusive_pair"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(unspec_volatile:DI
+ 	  [(match_operand:TI 2 "aarch64_sync_memory_operand" "Q")
+ 	   (match_operand:SI 3 "const_int_operand")]
+ 	  UNSPECV_LX))
+    (set (match_operand:DI 1 "register_operand" "=r")
+ 	(unspec_volatile:DI [(match_dup 2) (match_dup 3)] UNSPECV_LX))]
+   ""
+   {
+     enum memmodel model = memmodel_from_int (INTVAL (operands[3]));
+     if (is_mm_relaxed (model) || is_mm_consume (model) || is_mm_release (model))
+       return "ldxp\t%0, %1, %2";
+     else
+       return "ldaxp\t%0, %1, %2";
+   }
+ )
+ 
  (define_insn "@aarch64_store_exclusive<mode>"
    [(set (match_operand:SI 0 "register_operand" "=&r")
      (unspec_volatile:SI [(const_int 0)] UNSPECV_SX))
***************
*** 599,606 ****
    }
  )
  
  (define_expand "mem_thread_fence"
!   [(match_operand:SI 0 "const_int_operand" "")]
    ""
    {
      enum memmodel model = memmodel_from_int (INTVAL (operands[0]));
--- 744,770 ----
    }
  )
  
+ (define_insn "aarch64_store_exclusive_pair"
+   [(set (match_operand:SI 0 "register_operand" "=&r")
+ 	(unspec_volatile:SI [(const_int 0)] UNSPECV_SX))
+    (set (match_operand:TI 1 "aarch64_sync_memory_operand" "=Q")
+ 	(unspec_volatile:TI
+ 	  [(match_operand:DI 2 "aarch64_reg_or_zero" "rZ")
+ 	   (match_operand:DI 3 "aarch64_reg_or_zero" "rZ")
+ 	   (match_operand:SI 4 "const_int_operand")]
+ 	  UNSPECV_SX))]
+   ""
+   {
+     enum memmodel model = memmodel_from_int (INTVAL (operands[4]));
+     if (is_mm_relaxed (model) || is_mm_consume (model) || is_mm_acquire (model))
+       return "stxp\t%w0, %x2, %x3, %1";
+     else
+       return "stlxp\t%w0, %x2, %x3, %1";
+   }
+ )
+ 
  (define_expand "mem_thread_fence"
!   [(match_operand:SI 0 "const_int_operand")]
    ""
    {
      enum memmodel model = memmodel_from_int (INTVAL (operands[0]));
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/biarchilp32.h gcc-10.1.0/gcc/config/aarch64/biarchilp32.h
*** gcc-9.3.0/gcc/config/aarch64/biarchilp32.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/biarchilp32.h	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Make configure files to produce biarch compiler defaulting to ilp32 ABI.
     This file must be included very first, while the OS specific file later
     to overwrite otherwise wrong defaults.
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
  This file is part of GCC.
--- 1,7 ----
  /* Make configure files to produce biarch compiler defaulting to ilp32 ABI.
     This file must be included very first, while the OS specific file later
     to overwrite otherwise wrong defaults.
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/biarchlp64.h gcc-10.1.0/gcc/config/aarch64/biarchlp64.h
*** gcc-9.3.0/gcc/config/aarch64/biarchlp64.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/biarchlp64.h	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Make configure files to produce biarch compiler defaulting to ilp64 ABI.
     This file must be included very first, while the OS specific file later
     to overwrite otherwise wrong defaults.
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
  This file is part of GCC.
--- 1,7 ----
  /* Make configure files to produce biarch compiler defaulting to ilp64 ABI.
     This file must be included very first, while the OS specific file later
     to overwrite otherwise wrong defaults.
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/check-sve-md.awk gcc-10.1.0/gcc/config/aarch64/check-sve-md.awk
*** gcc-9.3.0/gcc/config/aarch64/check-sve-md.awk	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/check-sve-md.awk	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,66 ----
+ #!/usr/bin/awk -f
+ # Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ #
+ # This program is free software; you can redistribute it and/or modify it
+ # under the terms of the GNU General Public License as published by the
+ # Free Software Foundation; either version 3, or (at your option) any
+ # later version.
+ #
+ # This program is distributed in the hope that it will be useful,
+ # but WITHOUT ANY WARRANTY; without even the implied warranty of
+ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ # GNU General Public License for more details.
+ #
+ # You should have received a copy of the GNU General Public License
+ # along with this program; see the file COPYING3.  If not see
+ # <http://www.gnu.org/licenses/>.
+ 
+ # This awk script checks that aarch64-sve.md (passed either on the
+ # command line or via stdin) has an up-to-date contents section.
+ 
+ BEGIN {
+   seen1 = 0
+   seen2 = 0
+   errors = 0
+ }
+ 
+ # The headings in the comments use a two-level hierarchy: ";; == ..."
+ # for major sections and ";; ---- ..." for minor sections.  Each section
+ # heading must be unique.
+ #
+ # The contents section should list all the section headings, using the
+ # same text and in the same order.  We should therefore see exactly two
+ # copies of the section list.
+ /^;; == / || /^;; ---- / {
+   if ($0 in seen || seen2 > 0)
+     {
+       if (seen2 >= seen1)
+ 	{
+ 	  printf "error: line not in contents: %s\n", $0 > "/dev/stderr"
+ 	  errors += 1
+ 	  exit(1)
+ 	}
+       if ($0 != order[seen2])
+ 	{
+ 	  printf "error: mismatched contents\n     saw: %s\nexpected: %s\n", \
+ 	    $0, order[seen2] > "/dev/stderr"
+ 	  errors += 1
+ 	  exit(1)
+ 	}
+       seen2 += 1
+     }
+   else
+     {
+       seen[$0] = 1
+       order[seen1] = $0
+       seen1 += 1
+     }
+ }
+ 
+ END {
+   if (seen2 < seen1 && errors == 0)
+     {
+       printf "error: line only in contents: %s\n", order[seen2] > "/dev/stderr"
+       exit(1)
+     }
+ }
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/constraints.md gcc-10.1.0/gcc/config/aarch64/constraints.md
*** gcc-9.3.0/gcc/config/aarch64/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description for AArch64 architecture.
! ;; Copyright (C) 2009-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Machine description for AArch64 architecture.
! ;; Copyright (C) 2009-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
***************
*** 36,41 ****
--- 36,48 ----
  (define_register_constraint "x" "FP_LO_REGS"
    "Floating point and SIMD vector registers V0 - V15.")
  
+ (define_register_constraint "y" "FP_LO8_REGS"
+   "Floating point and SIMD vector registers V0 - V7.")
+ 
+ (define_constraint "c"
+  "@internal The condition code register."
+   (match_operand 0 "cc_register"))
+ 
  (define_constraint "I"
   "A constant that can be used with an ADD operation."
   (and (match_code "const_int")
***************
*** 46,51 ****
--- 53,64 ----
    (and (match_code "const_int")
         (match_test "aarch64_pluslong_strict_immedate (op, VOIDmode)")))
  
+ (define_constraint "Uai"
+   "@internal
+    A constraint that matches a VG-based constant that can be added by
+    a single INC or DEC."
+   (match_operand 0 "aarch64_sve_scalar_inc_dec_immediate"))
+ 
  (define_constraint "Uav"
    "@internal
     A constraint that matches a VG-based constant that can be added by
***************
*** 114,121 ****
         (match_test "aarch64_float_const_zero_rtx_p (op)")))
  
  (define_constraint "Z"
!   "Integer constant zero."
!   (match_test "op == const0_rtx"))
  
  (define_constraint "Ush"
    "A constraint that matches an absolute symbolic address high part."
--- 127,134 ----
         (match_test "aarch64_float_const_zero_rtx_p (op)")))
  
  (define_constraint "Z"
!   "Integer or floating-point constant zero."
!   (match_test "op == CONST0_RTX (GET_MODE (op))"))
  
  (define_constraint "Ush"
    "A constraint that matches an absolute symbolic address high part."
***************
*** 220,225 ****
--- 233,245 ----
    (and (match_code "const_int")
         (match_test "(unsigned) exact_log2 (ival) <= 4")))
  
+ (define_constraint "Uph"
+   "@internal
+   A constraint that matches HImode integers zero extendable to
+   SImode plus_operand."
+   (and (match_code "const_int")
+        (match_test "aarch64_plushi_immediate (op, VOIDmode)")))
+ 
  (define_memory_constraint "Q"
   "A memory address which uses a single base register with no offset."
   (and (match_code "mem")
***************
*** 248,253 ****
--- 268,305 ----
  						  true,
  						  ADDR_QUERY_LDP_STP_N)")))
  
+ (define_address_constraint "UPb"
+   "@internal
+    An address valid for SVE PRFB instructions."
+   (match_test "aarch64_sve_prefetch_operand_p (op, VNx16QImode)"))
+ 
+ (define_address_constraint "UPd"
+   "@internal
+    An address valid for SVE PRFD instructions."
+   (match_test "aarch64_sve_prefetch_operand_p (op, VNx2DImode)"))
+ 
+ (define_address_constraint "UPh"
+   "@internal
+    An address valid for SVE PRFH instructions."
+   (match_test "aarch64_sve_prefetch_operand_p (op, VNx8HImode)"))
+ 
+ (define_address_constraint "UPw"
+   "@internal
+    An address valid for SVE PRFW instructions."
+   (match_test "aarch64_sve_prefetch_operand_p (op, VNx4SImode)"))
+ 
+ (define_memory_constraint "Utf"
+   "@internal
+    An address valid for SVE LDFF1 instructions."
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ldff1_operand_p (op)")))
+ 
+ (define_memory_constraint "Utn"
+   "@internal
+    An address valid for SVE LDNF1 instructions."
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ldnf1_operand_p (op)")))
+ 
  (define_memory_constraint "Utr"
    "@internal
     An address valid for SVE LDR and STR instructions (as distinct from
***************
*** 269,274 ****
--- 321,357 ----
         (match_test "aarch64_legitimate_address_p (V2DImode,
  						  XEXP (op, 0), 1)")))
  
+ (define_memory_constraint "UtQ"
+   "@internal
+    An address valid for SVE LD1RQs."
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ld1rq_operand_p (op)")))
+ 
+ (define_memory_constraint "UOb"
+   "@internal
+    An address valid for SVE LD1ROH."
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ld1ro_operand_p (op, QImode)")))
+ 
+ (define_memory_constraint "UOh"
+   "@internal
+    An address valid for SVE LD1ROH."
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ld1ro_operand_p (op, HImode)")))
+ 
+ 
+ (define_memory_constraint "UOw"
+   "@internal
+    An address valid for SVE LD1ROW."
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ld1ro_operand_p (op, SImode)")))
+ 
+ (define_memory_constraint "UOd"
+   "@internal
+    An address valid for SVE LD1ROD."
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ld1ro_operand_p (op, DImode)")))
+ 
  (define_memory_constraint "Uty"
    "@internal
     An address valid for SVE LD1Rs."
***************
*** 284,290 ****
  (define_constraint "Ufc"
    "A floating point constant which can be used with an\
     FMOV immediate operation."
!   (and (match_code "const_double")
         (match_test "aarch64_float_const_representable_p (op)")))
  
  (define_constraint "Uvi"
--- 367,373 ----
  (define_constraint "Ufc"
    "A floating point constant which can be used with an\
     FMOV immediate operation."
!   (and (match_code "const_double,const_vector")
         (match_test "aarch64_float_const_representable_p (op)")))
  
  (define_constraint "Uvi"
***************
*** 329,334 ****
--- 412,424 ----
        (match_test "aarch64_simd_scalar_immediate_valid_for_move (op,
  						 QImode)")))
  
+ (define_constraint "Dt"
+   "@internal
+  A const_double which is the reciprocal of an exact power of two, can be
+  used in an scvtf with fract bits operation"
+  (and (match_code "const_double")
+       (match_test "aarch64_fpconst_pow2_recip (op) > 0")))
+ 
  (define_constraint "Dl"
    "@internal
   A constraint that matches vector of immediates for left shifts."
***************
*** 373,390 ****
--- 463,516 ----
   An address valid for a prefetch instruction."
   (match_test "aarch64_address_valid_for_prefetch_p (op, true)"))
  
+ (define_constraint "vgb"
+   "@internal
+    A constraint that matches an immediate offset valid for SVE LD1B
+    gather instructions."
+  (match_operand 0 "aarch64_sve_gather_immediate_b"))
+ 
+ (define_constraint "vgd"
+   "@internal
+    A constraint that matches an immediate offset valid for SVE LD1D
+    gather instructions."
+  (match_operand 0 "aarch64_sve_gather_immediate_d"))
+ 
+ (define_constraint "vgh"
+   "@internal
+    A constraint that matches an immediate offset valid for SVE LD1H
+    gather instructions."
+  (match_operand 0 "aarch64_sve_gather_immediate_h"))
+ 
+ (define_constraint "vgw"
+   "@internal
+    A constraint that matches an immediate offset valid for SVE LD1W
+    gather instructions."
+  (match_operand 0 "aarch64_sve_gather_immediate_w"))
+ 
  (define_constraint "vsa"
    "@internal
     A constraint that matches an immediate operand valid for SVE
     arithmetic instructions."
   (match_operand 0 "aarch64_sve_arith_immediate"))
  
+ (define_constraint "vsb"
+   "@internal
+    A constraint that matches an immediate operand valid for SVE UMAX
+    and UMIN operations."
+  (match_operand 0 "aarch64_sve_vsb_immediate"))
+ 
  (define_constraint "vsc"
    "@internal
     A constraint that matches a signed immediate operand valid for SVE
     CMP instructions."
   (match_operand 0 "aarch64_sve_cmp_vsc_immediate"))
  
+ (define_constraint "vss"
+   "@internal
+    A constraint that matches a signed immediate operand valid for SVE
+    DUP instructions."
+  (match_test "aarch64_sve_dup_immediate_p (op)"))
+ 
  (define_constraint "vsd"
    "@internal
     A constraint that matches an unsigned immediate operand valid for SVE
***************
*** 395,401 ****
    "@internal
     A constraint that matches a vector count operand valid for SVE INC and
     DEC instructions."
!  (match_operand 0 "aarch64_sve_inc_dec_immediate"))
  
  (define_constraint "vsn"
    "@internal
--- 521,527 ----
    "@internal
     A constraint that matches a vector count operand valid for SVE INC and
     DEC instructions."
!  (match_operand 0 "aarch64_sve_vector_inc_dec_immediate"))
  
  (define_constraint "vsn"
    "@internal
***************
*** 403,408 ****
--- 529,546 ----
     is valid for SVE SUB instructions."
   (match_operand 0 "aarch64_sve_sub_arith_immediate"))
  
+ (define_constraint "vsQ"
+   "@internal
+    Like vsa, but additionally check that the immediate is nonnegative
+    when interpreted as a signed value."
+  (match_operand 0 "aarch64_sve_qadd_immediate"))
+ 
+ (define_constraint "vsS"
+   "@internal
+    Like vsn, but additionally check that the immediate is negative
+    when interpreted as a signed value."
+  (match_operand 0 "aarch64_sve_qsub_immediate"))
+ 
  (define_constraint "vsl"
    "@internal
     A constraint that matches an immediate operand valid for SVE logical
***************
*** 411,419 ****
  
  (define_constraint "vsm"
    "@internal
!    A constraint that matches an immediate operand valid for SVE MUL
!    operations."
!  (match_operand 0 "aarch64_sve_mul_immediate"))
  
  (define_constraint "vsA"
    "@internal
--- 549,557 ----
  
  (define_constraint "vsm"
    "@internal
!    A constraint that matches an immediate operand valid for SVE MUL,
!    SMAX and SMIN operations."
!  (match_operand 0 "aarch64_sve_vsm_immediate"))
  
  (define_constraint "vsA"
    "@internal
***************
*** 421,433 ****
     and FSUB operations."
   (match_operand 0 "aarch64_sve_float_arith_immediate"))
  
  (define_constraint "vsM"
    "@internal
!    A constraint that matches an imediate operand valid for SVE FMUL
     operations."
   (match_operand 0 "aarch64_sve_float_mul_immediate"))
  
  (define_constraint "vsN"
    "@internal
     A constraint that matches the negative of vsA"
!  (match_operand 0 "aarch64_sve_float_arith_with_sub_immediate"))
--- 559,578 ----
     and FSUB operations."
   (match_operand 0 "aarch64_sve_float_arith_immediate"))
  
+ ;; "B" for "bound".
+ (define_constraint "vsB"
+   "@internal
+    A constraint that matches an immediate operand valid for SVE FMAX
+    and FMIN operations."
+  (match_operand 0 "aarch64_sve_float_maxmin_immediate"))
+ 
  (define_constraint "vsM"
    "@internal
!    A constraint that matches an immediate operand valid for SVE FMUL
     operations."
   (match_operand 0 "aarch64_sve_float_mul_immediate"))
  
  (define_constraint "vsN"
    "@internal
     A constraint that matches the negative of vsA"
!  (match_operand 0 "aarch64_sve_float_negated_arith_immediate"))
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/cortex-a57-fma-steering.c gcc-10.1.0/gcc/config/aarch64/cortex-a57-fma-steering.c
*** gcc-9.3.0/gcc/config/aarch64/cortex-a57-fma-steering.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/cortex-a57-fma-steering.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* FMA steering optimization pass for Cortex-A57.
!    Copyright (C) 2015-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* FMA steering optimization pass for Cortex-A57.
!    Copyright (C) 2015-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 37,42 ****
--- 37,43 ----
  #include "insn-attr.h"
  #include "context.h"
  #include "tree-pass.h"
+ #include "function-abi.h"
  #include "regrename.h"
  #include "aarch64-protos.h"
  
*************** rename_single_chain (du_head_p head, HAR
*** 267,273 ****
        if (DEBUG_INSN_P (tmp->insn))
  	continue;
        n_uses++;
!       IOR_COMPL_HARD_REG_SET (*unavailable, reg_class_contents[tmp->cl]);
        super_class = reg_class_superunion[(int) super_class][(int) tmp->cl];
      }
  
--- 268,274 ----
        if (DEBUG_INSN_P (tmp->insn))
  	continue;
        n_uses++;
!       *unavailable |= ~reg_class_contents[tmp->cl];
        super_class = reg_class_superunion[(int) super_class][(int) tmp->cl];
      }
  
*************** rename_single_chain (du_head_p head, HAR
*** 281,287 ****
      {
        fprintf (dump_file, "Register %s in insn %d", reg_names[reg],
  	       INSN_UID (head->first->insn));
!       if (head->need_caller_save_reg)
  	fprintf (dump_file, " crosses a call");
      }
  
--- 282,288 ----
      {
        fprintf (dump_file, "Register %s in insn %d", reg_names[reg],
  	       INSN_UID (head->first->insn));
!       if (head->call_abis)
  	fprintf (dump_file, " crosses a call");
      }
  
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/driver-aarch64.c gcc-10.1.0/gcc/config/aarch64/driver-aarch64.c
*** gcc-9.3.0/gcc/config/aarch64/driver-aarch64.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/driver-aarch64.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Native CPU detection for aarch64.
!    Copyright (C) 2015-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Native CPU detection for aarch64.
!    Copyright (C) 2015-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** std::string aarch64_get_extension_string
*** 32,38 ****
  struct aarch64_arch_extension
  {
    const char *ext;
!   unsigned int flag;
    const char *feat_string;
  };
  
--- 32,38 ----
  struct aarch64_arch_extension
  {
    const char *ext;
!   uint64_t flag;
    const char *feat_string;
  };
  
*************** struct aarch64_core_data
*** 52,58 ****
    unsigned char implementer_id; /* Exactly 8 bits */
    unsigned int part_no; /* 12 bits + 12 bits */
    unsigned variant;
!   const unsigned long flags;
  };
  
  #define AARCH64_BIG_LITTLE(BIG, LITTLE) \
--- 52,58 ----
    unsigned char implementer_id; /* Exactly 8 bits */
    unsigned int part_no; /* 12 bits + 12 bits */
    unsigned variant;
!   const uint64_t flags;
  };
  
  #define AARCH64_BIG_LITTLE(BIG, LITTLE) \
*************** struct aarch64_arch_driver_info
*** 75,81 ****
  {
    const char* id;
    const char* name;
!   const unsigned long flags;
  };
  
  #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
--- 75,81 ----
  {
    const char* id;
    const char* name;
!   const uint64_t flags;
  };
  
  #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
*************** host_detect_local_cpu (int argc, const c
*** 179,186 ****
    unsigned int variants[2] = { ALL_VARIANTS, ALL_VARIANTS };
    unsigned int n_variants = 0;
    bool processed_exts = false;
!   unsigned long extension_flags = 0;
!   unsigned long default_flags = 0;
  
    gcc_assert (argc);
  
--- 179,186 ----
    unsigned int variants[2] = { ALL_VARIANTS, ALL_VARIANTS };
    unsigned int n_variants = 0;
    bool processed_exts = false;
!   uint64_t extension_flags = 0;
!   uint64_t default_flags = 0;
  
    gcc_assert (argc);
  
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/falkor-tag-collision-avoidance.c gcc-10.1.0/gcc/config/aarch64/falkor-tag-collision-avoidance.c
*** gcc-9.3.0/gcc/config/aarch64/falkor-tag-collision-avoidance.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/falkor-tag-collision-avoidance.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Tag Collision Avoidance pass for Falkor.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Tag Collision Avoidance pass for Falkor.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
***************
*** 38,43 ****
--- 38,44 ----
  #include "optabs.h"
  #include "regs.h"
  #include "recog.h"
+ #include "function-abi.h"
  #include "regrename.h"
  #include "print-rtl.h"
  
*************** init_unavailable (tag_insn_info *insn_in
*** 229,235 ****
        if (DEBUG_INSN_P (tmp->insn))
  	continue;
  
!       IOR_COMPL_HARD_REG_SET (*unavailable, reg_class_contents[tmp->cl]);
        super_class = reg_class_superunion[(int) super_class][(int) tmp->cl];
      }
  
--- 230,236 ----
        if (DEBUG_INSN_P (tmp->insn))
  	continue;
  
!       *unavailable |= ~reg_class_contents[tmp->cl];
        super_class = reg_class_superunion[(int) super_class][(int) tmp->cl];
      }
  
*************** valid_src_p (rtx src, rtx_insn *insn, st
*** 537,542 ****
--- 538,550 ----
    if (!aarch64_classify_address (&addr, XEXP (x, 0), mode, true))
      return false;
  
+   if (addr.type != ADDRESS_REG_IMM
+       && addr.type != ADDRESS_REG_WB
+       && addr.type != ADDRESS_REG_REG
+       && addr.type != ADDRESS_REG_UXTW
+       && addr.type != ADDRESS_REG_SXTW)
+     return false;
+ 
    unsigned regno = REGNO (addr.base);
    if (global_regs[regno] || fixed_regs[regno])
      return false;
*************** in_same_chain (rtx_insn *insn, rtx_insn
*** 698,704 ****
  
  
  /* Callback function to traverse the tag map and drop loads that have the same
!    destination and and in the same chain of occurrence.  Routine always returns
     true to allow traversal through all of TAG_MAP.  */
  bool
  single_dest_per_chain (const rtx &t ATTRIBUTE_UNUSED, insn_info_list_t *v,
--- 706,712 ----
  
  
  /* Callback function to traverse the tag map and drop loads that have the same
!    destination and are in the same chain of occurrence.  Routine always returns
     true to allow traversal through all of TAG_MAP.  */
  bool
  single_dest_per_chain (const rtx &t ATTRIBUTE_UNUSED, insn_info_list_t *v,
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/falkor.md gcc-10.1.0/gcc/config/aarch64/falkor.md
*** gcc-9.3.0/gcc/config/aarch64/falkor.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/falkor.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Falkor pipeline description
! ;; Copyright (C) 2017-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Falkor pipeline description
! ;; Copyright (C) 2017-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 648,654 ****
  
  (define_insn_reservation "falkor_other_0_nothing" 0
    (and (eq_attr "tune" "falkor")
!        (eq_attr "type" "no_insn,trap,block"))
    "nothing")
  
  (define_insn_reservation "falkor_other_2_z" 2
--- 648,654 ----
  
  (define_insn_reservation "falkor_other_0_nothing" 0
    (and (eq_attr "tune" "falkor")
!        (eq_attr "type" "trap,block"))
    "nothing")
  
  (define_insn_reservation "falkor_other_2_z" 2
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/geniterators.sh gcc-10.1.0/gcc/config/aarch64/geniterators.sh
*** gcc-9.3.0/gcc/config/aarch64/geniterators.sh	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/geniterators.sh	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  #!/bin/sh
  #
! # Copyright (C) 2014-2019 Free Software Foundation, Inc.
  # Contributed by ARM Ltd.
  #
  # This file is part of GCC.
--- 1,6 ----
  #!/bin/sh
  #
! # Copyright (C) 2014-2020 Free Software Foundation, Inc.
  # Contributed by ARM Ltd.
  #
  # This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/gentune.sh gcc-10.1.0/gcc/config/aarch64/gentune.sh
*** gcc-9.3.0/gcc/config/aarch64/gentune.sh	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/gentune.sh	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  #!/bin/sh
  #
! # Copyright (C) 2011-2019 Free Software Foundation, Inc.
  # Contributed by ARM Ltd.
  #
  # This file is part of GCC.
--- 1,6 ----
  #!/bin/sh
  #
! # Copyright (C) 2011-2020 Free Software Foundation, Inc.
  # Contributed by ARM Ltd.
  #
  # This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/iterators.md gcc-10.1.0/gcc/config/aarch64/iterators.md
*** gcc-9.3.0/gcc/config/aarch64/iterators.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/iterators.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description for AArch64 architecture.
! ;; Copyright (C) 2009-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Machine description for AArch64 architecture.
! ;; Copyright (C) 2009-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
***************
*** 22,27 ****
--- 22,30 ----
  ;; Mode Iterators
  ;; -------------------------------------------------------------------
  
+ ;; Condition-code iterators.
+ (define_mode_iterator CC_ONLY [CC])
+ (define_mode_iterator CCFP_CCFPE [CCFP CCFPE])
  
  ;; Iterator for General Purpose Integer registers (32- and 64-bit modes)
  (define_mode_iterator GPI [SI DI])
***************
*** 29,37 ****
--- 32,47 ----
  ;; Iterator for HI, SI, DI, some instructions can only work on these modes.
  (define_mode_iterator GPI_I16 [(HI "AARCH64_ISA_F16") SI DI])
  
+ ;; "Iterator" for just TI -- features like @pattern only work with iterators.
+ (define_mode_iterator JUST_TI [TI])
+ 
  ;; Iterator for QI and HI modes
  (define_mode_iterator SHORT [QI HI])
  
+ ;; Iterators for single modes, for "@" patterns.
+ (define_mode_iterator SI_ONLY [SI])
+ (define_mode_iterator DI_ONLY [DI])
+ 
  ;; Iterator for all integer modes (up to 64-bit)
  (define_mode_iterator ALLI [QI HI SI DI])
  
***************
*** 50,58 ****
--- 60,75 ----
  ;; Iterator for all scalar floating point modes (HF, SF, DF)
  (define_mode_iterator GPF_HF [HF SF DF])
  
+ ;; Iterator for all 16-bit scalar floating point modes (HF, BF)
+ (define_mode_iterator HFBF [HF BF])
+ 
  ;; Iterator for all scalar floating point modes (HF, SF, DF and TF)
  (define_mode_iterator GPF_TF_F16 [HF SF DF TF])
  
+ ;; Iterator for all scalar floating point modes suitable for moving, including
+ ;; special BF type (HF, SF, DF, TF and BF)
+ (define_mode_iterator GPF_TF_F16_MOV [HF BF SF DF TF])
+ 
  ;; Double vector modes.
  (define_mode_iterator VDF [V2SF V4HF])
  
***************
*** 70,76 ****
  (define_mode_iterator VSDQ_I_DI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI DI])
  
  ;; Double vector modes.
! (define_mode_iterator VD [V8QI V4HI V4HF V2SI V2SF])
  
  ;; All modes stored in registers d0-d31.
  (define_mode_iterator DREG [V8QI V4HI V4HF V2SI V2SF DF])
--- 87,96 ----
  (define_mode_iterator VSDQ_I_DI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI DI])
  
  ;; Double vector modes.
! (define_mode_iterator VD [V8QI V4HI V4HF V2SI V2SF V4BF])
! 
! ;; Double vector modes suitable for moving.  Includes BFmode.
! (define_mode_iterator VDMOV [V8QI V4HI V4HF V4BF V2SI V2SF])
  
  ;; All modes stored in registers d0-d31.
  (define_mode_iterator DREG [V8QI V4HI V4HF V2SI V2SF DF])
***************
*** 85,104 ****
  (define_mode_iterator VDQ_BHSI [V8QI V16QI V4HI V8HI V2SI V4SI])
  
  ;; Quad vector modes.
! (define_mode_iterator VQ [V16QI V8HI V4SI V2DI V8HF V4SF V2DF])
  
  ;; Copy of the above.
! (define_mode_iterator VQ2 [V16QI V8HI V4SI V2DI V8HF V4SF V2DF])
  
  ;; Quad integer vector modes.
  (define_mode_iterator VQ_I [V16QI V8HI V4SI V2DI])
  
  ;; VQ without 2 element modes.
! (define_mode_iterator VQ_NO2E [V16QI V8HI V4SI V8HF V4SF])
  
  ;; Quad vector with only 2 element modes.
  (define_mode_iterator VQ_2E [V2DI V2DF])
  
  ;; This mode iterator allows :P to be used for patterns that operate on
  ;; addresses in different modes.  In LP64, only DI will match, while in
  ;; ILP32, either can match.
--- 105,133 ----
  (define_mode_iterator VDQ_BHSI [V8QI V16QI V4HI V8HI V2SI V4SI])
  
  ;; Quad vector modes.
! (define_mode_iterator VQ [V16QI V8HI V4SI V2DI V8HF V4SF V2DF V8BF])
  
  ;; Copy of the above.
! (define_mode_iterator VQ2 [V16QI V8HI V4SI V2DI V8HF V8BF V4SF V2DF])
! 
! ;; Quad vector modes suitable for moving.  Includes BFmode.
! (define_mode_iterator VQMOV [V16QI V8HI V4SI V2DI V8HF V8BF V4SF V2DF])
! 
! ;; VQMOV without 2-element modes.
! (define_mode_iterator VQMOV_NO2E [V16QI V8HI V4SI V8HF V8BF V4SF])
  
  ;; Quad integer vector modes.
  (define_mode_iterator VQ_I [V16QI V8HI V4SI V2DI])
  
  ;; VQ without 2 element modes.
! (define_mode_iterator VQ_NO2E [V16QI V8HI V4SI V8HF V4SF V8BF])
  
  ;; Quad vector with only 2 element modes.
  (define_mode_iterator VQ_2E [V2DI V2DF])
  
+ ;; BFmode vector modes.
+ (define_mode_iterator VBF [V4BF V8BF])
+ 
  ;; This mode iterator allows :P to be used for patterns that operate on
  ;; addresses in different modes.  In LP64, only DI will match, while in
  ;; ILP32, either can match.
***************
*** 110,116 ****
  (define_mode_iterator PTR [(SI "ptr_mode == SImode") (DI "ptr_mode == DImode")])
  
  ;; Advanced SIMD Float modes suitable for moving, loading and storing.
! (define_mode_iterator VDQF_F16 [V4HF V8HF V2SF V4SF V2DF])
  
  ;; Advanced SIMD Float modes.
  (define_mode_iterator VDQF [V2SF V4SF V2DF])
--- 139,146 ----
  (define_mode_iterator PTR [(SI "ptr_mode == SImode") (DI "ptr_mode == DImode")])
  
  ;; Advanced SIMD Float modes suitable for moving, loading and storing.
! (define_mode_iterator VDQF_F16 [V4HF V8HF V2SF V4SF V2DF
! 				V4BF V8BF])
  
  ;; Advanced SIMD Float modes.
  (define_mode_iterator VDQF [V2SF V4SF V2DF])
***************
*** 128,133 ****
--- 158,166 ----
  				  (HF "TARGET_SIMD_F16INST")
  				  SF DF])
  
+ ;; Scalar and vetor modes for SF, DF.
+ (define_mode_iterator VSFDF [V2SF V4SF V2DF DF SF])
+ 
  ;; Advanced SIMD single Float modes.
  (define_mode_iterator VDQSF [V2SF V4SF])
  
***************
*** 148,154 ****
  
  ;; All Advanced SIMD modes suitable for moving, loading, and storing.
  (define_mode_iterator VALL_F16 [V8QI V16QI V4HI V8HI V2SI V4SI V2DI
! 				V4HF V8HF V2SF V4SF V2DF])
  
  ;; The VALL_F16 modes except the 128-bit 2-element ones.
  (define_mode_iterator VALL_F16_NO_V2Q [V8QI V16QI V4HI V8HI V2SI V4SI
--- 181,192 ----
  
  ;; All Advanced SIMD modes suitable for moving, loading, and storing.
  (define_mode_iterator VALL_F16 [V8QI V16QI V4HI V8HI V2SI V4SI V2DI
! 				V4HF V8HF V4BF V8BF V2SF V4SF V2DF])
! 
! ;; All Advanced SIMD modes suitable for moving, loading, and storing,
! ;; including special Bfloat vector types.
! (define_mode_iterator VALL_F16MOV [V8QI V16QI V4HI V8HI V2SI V4SI V2DI
! 				   V4HF V8HF V4BF V8BF V2SF V4SF V2DF])
  
  ;; The VALL_F16 modes except the 128-bit 2-element ones.
  (define_mode_iterator VALL_F16_NO_V2Q [V8QI V16QI V4HI V8HI V2SI V4SI
***************
*** 159,168 ****
  
  ;; All Advanced SIMD modes and DI.
  (define_mode_iterator VALLDI_F16 [V8QI V16QI V4HI V8HI V2SI V4SI V2DI
! 				  V4HF V8HF V2SF V4SF V2DF DI])
  
  ;; All Advanced SIMD modes, plus DI and DF.
! (define_mode_iterator VALLDIF [V8QI V16QI V4HI V8HI V2SI V4SI
  			       V2DI V4HF V8HF V2SF V4SF V2DF DI DF])
  
  ;; Advanced SIMD modes for Integer reduction across lanes.
--- 197,206 ----
  
  ;; All Advanced SIMD modes and DI.
  (define_mode_iterator VALLDI_F16 [V8QI V16QI V4HI V8HI V2SI V4SI V2DI
! 				  V4HF V8HF V4BF V8BF V2SF V4SF V2DF DI])
  
  ;; All Advanced SIMD modes, plus DI and DF.
! (define_mode_iterator VALLDIF [V8QI V16QI V4HI V8HI V2SI V4SI V4BF V8BF
  			       V2DI V4HF V8HF V2SF V4SF V2DF DI DF])
  
  ;; Advanced SIMD modes for Integer reduction across lanes.
***************
*** 171,176 ****
--- 209,217 ----
  ;; Advanced SIMD modes (except V2DI) for Integer reduction across lanes.
  (define_mode_iterator VDQV_S [V8QI V16QI V4HI V8HI V4SI])
  
+ ;; Advanced SIMD modes for Integer reduction across lanes (zero/sign extended).
+ (define_mode_iterator VDQV_E [V8QI V16QI V4HI V8HI])
+ 
  ;; All double integer narrow-able modes.
  (define_mode_iterator VDN [V4HI V2SI DI])
  
***************
*** 185,191 ****
  (define_mode_iterator VQW [V16QI V8HI V4SI])
  
  ;; Double vector modes for combines.
! (define_mode_iterator VDC [V8QI V4HI V4HF V2SI V2SF DI DF])
  
  ;; Advanced SIMD modes except double int.
  (define_mode_iterator VDQIF [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF V2DF])
--- 226,232 ----
  (define_mode_iterator VQW [V16QI V8HI V4SI])
  
  ;; Double vector modes for combines.
! (define_mode_iterator VDC [V8QI V4HI V4BF V4HF V2SI V2SF DI DF])
  
  ;; Advanced SIMD modes except double int.
  (define_mode_iterator VDQIF [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF V2DF])
***************
*** 274,323 ****
  ;; count.
  (define_mode_iterator VMUL_CHANGE_NLANES [V4HI V8HI V2SI V4SI V2SF V4SF])
  
! ;; All SVE vector modes.
! (define_mode_iterator SVE_ALL [VNx16QI VNx8HI VNx4SI VNx2DI
! 			       VNx8HF VNx4SF VNx2DF])
  
  ;; All SVE vector structure modes.
  (define_mode_iterator SVE_STRUCT [VNx32QI VNx16HI VNx8SI VNx4DI
! 				  VNx16HF VNx8SF VNx4DF
  				  VNx48QI VNx24HI VNx12SI VNx6DI
! 				  VNx24HF VNx12SF VNx6DF
  				  VNx64QI VNx32HI VNx16SI VNx8DI
! 				  VNx32HF VNx16SF VNx8DF])
  
! ;; All SVE vector modes that have 8-bit or 16-bit elements.
! (define_mode_iterator SVE_BH [VNx16QI VNx8HI VNx8HF])
  
! ;; All SVE vector modes that have 8-bit, 16-bit or 32-bit elements.
! (define_mode_iterator SVE_BHS [VNx16QI VNx8HI VNx4SI VNx8HF VNx4SF])
  
! ;; All SVE integer vector modes that have 8-bit, 16-bit or 32-bit elements.
! (define_mode_iterator SVE_BHSI [VNx16QI VNx8HI VNx4SI])
  
! ;; All SVE integer vector modes that have 16-bit, 32-bit or 64-bit elements.
! (define_mode_iterator SVE_HSDI [VNx16QI VNx8HI VNx4SI])
  
! ;; All SVE floating-point vector modes that have 16-bit or 32-bit elements.
! (define_mode_iterator SVE_HSF [VNx8HF VNx4SF])
  
! ;; All SVE vector modes that have 32-bit or 64-bit elements.
! (define_mode_iterator SVE_SD [VNx4SI VNx2DI VNx4SF VNx2DF])
  
! ;; All SVE vector modes that have 32-bit elements.
! (define_mode_iterator SVE_S [VNx4SI VNx4SF])
  
! ;; All SVE vector modes that have 64-bit elements.
! (define_mode_iterator SVE_D [VNx2DI VNx2DF])
  
! ;; All SVE integer vector modes that have 32-bit or 64-bit elements.
! (define_mode_iterator SVE_SDI [VNx4SI VNx2DI])
  
  ;; All SVE integer vector modes.
! (define_mode_iterator SVE_I [VNx16QI VNx8HI VNx4SI VNx2DI])
  
! ;; All SVE floating-point vector modes.
! (define_mode_iterator SVE_F [VNx8HF VNx4SF VNx2DF])
  
  ;; All SVE predicate modes.
  (define_mode_iterator PRED_ALL [VNx16BI VNx8BI VNx4BI VNx2BI])
--- 315,457 ----
  ;; count.
  (define_mode_iterator VMUL_CHANGE_NLANES [V4HI V8HI V2SI V4SI V2SF V4SF])
  
! ;; Iterators for single modes, for "@" patterns.
! (define_mode_iterator VNx16QI_ONLY [VNx16QI])
! (define_mode_iterator VNx8HI_ONLY [VNx8HI])
! (define_mode_iterator VNx8BF_ONLY [VNx8BF])
! (define_mode_iterator VNx4SI_ONLY [VNx4SI])
! (define_mode_iterator VNx4SF_ONLY [VNx4SF])
! (define_mode_iterator VNx2DI_ONLY [VNx2DI])
! (define_mode_iterator VNx2DF_ONLY [VNx2DF])
  
  ;; All SVE vector structure modes.
  (define_mode_iterator SVE_STRUCT [VNx32QI VNx16HI VNx8SI VNx4DI
! 				  VNx16BF VNx16HF VNx8SF VNx4DF
  				  VNx48QI VNx24HI VNx12SI VNx6DI
! 				  VNx24BF VNx24HF VNx12SF VNx6DF
  				  VNx64QI VNx32HI VNx16SI VNx8DI
! 				  VNx32BF VNx32HF VNx16SF VNx8DF])
  
! ;; All fully-packed SVE vector modes.
! (define_mode_iterator SVE_FULL [VNx16QI VNx8HI VNx4SI VNx2DI
! 			        VNx8BF VNx8HF VNx4SF VNx2DF])
  
! ;; All fully-packed SVE integer vector modes.
! (define_mode_iterator SVE_FULL_I [VNx16QI VNx8HI VNx4SI VNx2DI])
  
! ;; All fully-packed SVE floating-point vector modes.
! (define_mode_iterator SVE_FULL_F [VNx8HF VNx4SF VNx2DF])
  
! ;; Fully-packed SVE integer vector modes that have 8-bit or 16-bit elements.
! (define_mode_iterator SVE_FULL_BHI [VNx16QI VNx8HI])
  
! ;; Fully-packed SVE integer vector modes that have 8-bit, 16-bit or 32-bit
! ;; elements.
! (define_mode_iterator SVE_FULL_BHSI [VNx16QI VNx8HI VNx4SI])
  
! ;; Fully-packed SVE vector modes that have 16-bit, 32-bit or 64-bit elements.
! (define_mode_iterator SVE_FULL_HSD [VNx8HI VNx4SI VNx2DI
! 				    VNx8BF VNx8HF VNx4SF VNx2DF])
  
! ;; Fully-packed SVE integer vector modes that have 16-bit, 32-bit or 64-bit
! ;; elements.
! (define_mode_iterator SVE_FULL_HSDI [VNx8HI VNx4SI VNx2DI])
  
! ;; Fully-packed SVE integer vector modes that have 16-bit or 32-bit
! ;; elements.
! (define_mode_iterator SVE_FULL_HSI [VNx8HI VNx4SI])
  
! ;; Fully-packed SVE floating-point vector modes that have 16-bit or 32-bit
! ;; elements.
! (define_mode_iterator SVE_FULL_HSF [VNx8HF VNx4SF])
! 
! ;; Fully-packed SVE integer vector modes that have 16-bit or 64-bit elements.
! (define_mode_iterator SVE_FULL_HDI [VNx8HI VNx2DI])
! 
! ;; Fully-packed SVE vector modes that have 32-bit or 64-bit elements.
! (define_mode_iterator SVE_FULL_SD [VNx4SI VNx2DI VNx4SF VNx2DF])
! 
! ;; Fully-packed SVE integer vector modes that have 32-bit or 64-bit elements.
! (define_mode_iterator SVE_FULL_SDI [VNx4SI VNx2DI])
! 
! ;; Fully-packed SVE floating-point vector modes that have 32-bit or 64-bit
! ;; elements.
! (define_mode_iterator SVE_FULL_SDF [VNx4SF VNx2DF])
! 
! ;; Same, but with the appropriate conditions for FMMLA support.
! (define_mode_iterator SVE_MATMULF [(VNx4SF "TARGET_SVE_F32MM")
! 				   (VNx2DF "TARGET_SVE_F64MM")])
! 
! ;; Fully-packed SVE vector modes that have 32-bit elements.
! (define_mode_iterator SVE_FULL_S [VNx4SI VNx4SF])
! 
! ;; Fully-packed SVE vector modes that have 64-bit elements.
! (define_mode_iterator SVE_FULL_D [VNx2DI VNx2DF])
! 
! ;; All partial SVE integer modes.
! (define_mode_iterator SVE_PARTIAL_I [VNx8QI VNx4QI VNx2QI
! 				     VNx4HI VNx2HI
! 				     VNx2SI])
! 
! ;; All SVE vector modes.
! (define_mode_iterator SVE_ALL [VNx16QI VNx8QI VNx4QI VNx2QI
! 			       VNx8HI VNx4HI VNx2HI
! 			       VNx8HF VNx4HF VNx2HF
! 			       VNx8BF
! 			       VNx4SI VNx2SI
! 			       VNx4SF VNx2SF
! 			       VNx2DI
! 			       VNx2DF])
  
  ;; All SVE integer vector modes.
! (define_mode_iterator SVE_I [VNx16QI VNx8QI VNx4QI VNx2QI
! 			     VNx8HI VNx4HI VNx2HI
! 			     VNx4SI VNx2SI
! 			     VNx2DI])
  
! ;; SVE integer vector modes whose elements are 16 bits or wider.
! (define_mode_iterator SVE_HSDI [VNx8HI VNx4HI VNx2HI
! 				VNx4SI VNx2SI
! 				VNx2DI])
! 
! ;; SVE modes with 2 or 4 elements.
! (define_mode_iterator SVE_24 [VNx2QI VNx2HI VNx2HF VNx2SI VNx2SF VNx2DI VNx2DF
! 			      VNx4QI VNx4HI VNx4HF VNx4SI VNx4SF])
! 
! ;; SVE modes with 2 elements.
! (define_mode_iterator SVE_2 [VNx2QI VNx2HI VNx2HF VNx2SI VNx2SF VNx2DI VNx2DF])
! 
! ;; SVE integer modes with 2 elements, excluding the widest element.
! (define_mode_iterator SVE_2BHSI [VNx2QI VNx2HI VNx2SI])
! 
! ;; SVE integer modes with 2 elements, excluding the narrowest element.
! (define_mode_iterator SVE_2HSDI [VNx2HI VNx2SI VNx2DI])
! 
! ;; SVE modes with 4 elements.
! (define_mode_iterator SVE_4 [VNx4QI VNx4HI VNx4HF VNx4SI VNx4SF])
! 
! ;; SVE integer modes with 4 elements, excluding the widest element.
! (define_mode_iterator SVE_4BHI [VNx4QI VNx4HI])
! 
! ;; SVE integer modes with 4 elements, excluding the narrowest element.
! (define_mode_iterator SVE_4HSI [VNx4HI VNx4SI])
! 
! ;; SVE integer modes that can form the input to an SVE2 PMULL[BT] instruction.
! (define_mode_iterator SVE2_PMULL_PAIR_I [VNx16QI VNx4SI
! 					 (VNx2DI "TARGET_SVE2_AES")])
! 
! ;; Modes involved in extending or truncating SVE data, for 8 elements per
! ;; 128-bit block.
! (define_mode_iterator VNx8_NARROW [VNx8QI])
! (define_mode_iterator VNx8_WIDE [VNx8HI])
! 
! ;; ...same for 4 elements per 128-bit block.
! (define_mode_iterator VNx4_NARROW [VNx4QI VNx4HI])
! (define_mode_iterator VNx4_WIDE [VNx4SI])
! 
! ;; ...same for 2 elements per 128-bit block.
! (define_mode_iterator VNx2_NARROW [VNx2QI VNx2HI VNx2SI])
! (define_mode_iterator VNx2_WIDE [VNx2DI])
  
  ;; All SVE predicate modes.
  (define_mode_iterator PRED_ALL [VNx16BI VNx8BI VNx4BI VNx2BI])
***************
*** 325,330 ****
--- 459,470 ----
  ;; SVE predicate modes that control 8-bit, 16-bit or 32-bit elements.
  (define_mode_iterator PRED_BHS [VNx16BI VNx8BI VNx4BI])
  
+ ;; SVE predicate modes that control 16-bit, 32-bit or 64-bit elements.
+ (define_mode_iterator PRED_HSD [VNx8BI VNx4BI VNx2BI])
+ 
+ ;; Bfloat16 modes to which V4SF can be converted
+ (define_mode_iterator V4SF_TO_BF [V4BF V8BF])
+ 
  ;; ------------------------------------------------------------------
  ;; Unspec enumerations for Advance SIMD. These could well go into
  ;; aarch64.md but for their use in int_iterators here.
***************
*** 353,360 ****
      UNSPEC_URHADD	; Used in aarch64-simd.md.
      UNSPEC_SHSUB	; Used in aarch64-simd.md.
      UNSPEC_UHSUB	; Used in aarch64-simd.md.
-     UNSPEC_SRHSUB	; Used in aarch64-simd.md.
-     UNSPEC_URHSUB	; Used in aarch64-simd.md.
      UNSPEC_ADDHN	; Used in aarch64-simd.md.
      UNSPEC_RADDHN	; Used in aarch64-simd.md.
      UNSPEC_SUBHN	; Used in aarch64-simd.md.
--- 493,498 ----
***************
*** 459,496 ****
      UNSPEC_FMLSL	; Used in aarch64-simd.md.
      UNSPEC_FMLAL2	; Used in aarch64-simd.md.
      UNSPEC_FMLSL2	; Used in aarch64-simd.md.
      UNSPEC_SEL		; Used in aarch64-sve.md.
      UNSPEC_ANDV		; Used in aarch64-sve.md.
      UNSPEC_IORV		; Used in aarch64-sve.md.
      UNSPEC_XORV		; Used in aarch64-sve.md.
      UNSPEC_ANDF		; Used in aarch64-sve.md.
      UNSPEC_IORF		; Used in aarch64-sve.md.
      UNSPEC_XORF		; Used in aarch64-sve.md.
      UNSPEC_SMUL_HIGHPART ; Used in aarch64-sve.md.
      UNSPEC_UMUL_HIGHPART ; Used in aarch64-sve.md.
!     UNSPEC_COND_ADD	; Used in aarch64-sve.md.
!     UNSPEC_COND_SUB	; Used in aarch64-sve.md.
!     UNSPEC_COND_MUL	; Used in aarch64-sve.md.
!     UNSPEC_COND_DIV	; Used in aarch64-sve.md.
!     UNSPEC_COND_MAX	; Used in aarch64-sve.md.
!     UNSPEC_COND_MIN	; Used in aarch64-sve.md.
      UNSPEC_COND_FMLA	; Used in aarch64-sve.md.
      UNSPEC_COND_FMLS	; Used in aarch64-sve.md.
      UNSPEC_COND_FNMLA	; Used in aarch64-sve.md.
      UNSPEC_COND_FNMLS	; Used in aarch64-sve.md.
!     UNSPEC_COND_LT	; Used in aarch64-sve.md.
!     UNSPEC_COND_LE	; Used in aarch64-sve.md.
!     UNSPEC_COND_EQ	; Used in aarch64-sve.md.
!     UNSPEC_COND_NE	; Used in aarch64-sve.md.
!     UNSPEC_COND_GE	; Used in aarch64-sve.md.
!     UNSPEC_COND_GT	; Used in aarch64-sve.md.
      UNSPEC_LASTB	; Used in aarch64-sve.md.
      UNSPEC_FCADD90	; Used in aarch64-simd.md.
      UNSPEC_FCADD270	; Used in aarch64-simd.md.
      UNSPEC_FCMLA	; Used in aarch64-simd.md.
      UNSPEC_FCMLA90	; Used in aarch64-simd.md.
      UNSPEC_FCMLA180	; Used in aarch64-simd.md.
      UNSPEC_FCMLA270	; Used in aarch64-simd.md.
  ])
  
  ;; ------------------------------------------------------------------
--- 597,839 ----
      UNSPEC_FMLSL	; Used in aarch64-simd.md.
      UNSPEC_FMLAL2	; Used in aarch64-simd.md.
      UNSPEC_FMLSL2	; Used in aarch64-simd.md.
+     UNSPEC_ADR		; Used in aarch64-sve.md.
      UNSPEC_SEL		; Used in aarch64-sve.md.
+     UNSPEC_BRKA		; Used in aarch64-sve.md.
+     UNSPEC_BRKB		; Used in aarch64-sve.md.
+     UNSPEC_BRKN		; Used in aarch64-sve.md.
+     UNSPEC_BRKPA	; Used in aarch64-sve.md.
+     UNSPEC_BRKPB	; Used in aarch64-sve.md.
+     UNSPEC_PFIRST	; Used in aarch64-sve.md.
+     UNSPEC_PNEXT	; Used in aarch64-sve.md.
+     UNSPEC_CNTP		; Used in aarch64-sve.md.
+     UNSPEC_SADDV	; Used in aarch64-sve.md.
+     UNSPEC_UADDV	; Used in aarch64-sve.md.
      UNSPEC_ANDV		; Used in aarch64-sve.md.
      UNSPEC_IORV		; Used in aarch64-sve.md.
      UNSPEC_XORV		; Used in aarch64-sve.md.
      UNSPEC_ANDF		; Used in aarch64-sve.md.
      UNSPEC_IORF		; Used in aarch64-sve.md.
      UNSPEC_XORF		; Used in aarch64-sve.md.
+     UNSPEC_REVB		; Used in aarch64-sve.md.
+     UNSPEC_REVH		; Used in aarch64-sve.md.
+     UNSPEC_REVW		; Used in aarch64-sve.md.
      UNSPEC_SMUL_HIGHPART ; Used in aarch64-sve.md.
      UNSPEC_UMUL_HIGHPART ; Used in aarch64-sve.md.
!     UNSPEC_FMLA		; Used in aarch64-sve.md.
!     UNSPEC_FMLS		; Used in aarch64-sve.md.
!     UNSPEC_FEXPA	; Used in aarch64-sve.md.
!     UNSPEC_FMMLA	; Used in aarch64-sve.md.
!     UNSPEC_FTMAD	; Used in aarch64-sve.md.
!     UNSPEC_FTSMUL	; Used in aarch64-sve.md.
!     UNSPEC_FTSSEL	; Used in aarch64-sve.md.
!     UNSPEC_SMATMUL	; Used in aarch64-sve.md.
!     UNSPEC_UMATMUL	; Used in aarch64-sve.md.
!     UNSPEC_USMATMUL	; Used in aarch64-sve.md.
!     UNSPEC_TRN1Q	; Used in aarch64-sve.md.
!     UNSPEC_TRN2Q	; Used in aarch64-sve.md.
!     UNSPEC_UZP1Q	; Used in aarch64-sve.md.
!     UNSPEC_UZP2Q	; Used in aarch64-sve.md.
!     UNSPEC_ZIP1Q	; Used in aarch64-sve.md.
!     UNSPEC_ZIP2Q	; Used in aarch64-sve.md.
!     UNSPEC_COND_CMPEQ_WIDE ; Used in aarch64-sve.md.
!     UNSPEC_COND_CMPGE_WIDE ; Used in aarch64-sve.md.
!     UNSPEC_COND_CMPGT_WIDE ; Used in aarch64-sve.md.
!     UNSPEC_COND_CMPHI_WIDE ; Used in aarch64-sve.md.
!     UNSPEC_COND_CMPHS_WIDE ; Used in aarch64-sve.md.
!     UNSPEC_COND_CMPLE_WIDE ; Used in aarch64-sve.md.
!     UNSPEC_COND_CMPLO_WIDE ; Used in aarch64-sve.md.
!     UNSPEC_COND_CMPLS_WIDE ; Used in aarch64-sve.md.
!     UNSPEC_COND_CMPLT_WIDE ; Used in aarch64-sve.md.
!     UNSPEC_COND_CMPNE_WIDE ; Used in aarch64-sve.md.
!     UNSPEC_COND_FABS	; Used in aarch64-sve.md.
!     UNSPEC_COND_FADD	; Used in aarch64-sve.md.
!     UNSPEC_COND_FCADD90	; Used in aarch64-sve.md.
!     UNSPEC_COND_FCADD270 ; Used in aarch64-sve.md.
!     UNSPEC_COND_FCMEQ	; Used in aarch64-sve.md.
!     UNSPEC_COND_FCMGE	; Used in aarch64-sve.md.
!     UNSPEC_COND_FCMGT	; Used in aarch64-sve.md.
!     UNSPEC_COND_FCMLA	; Used in aarch64-sve.md.
!     UNSPEC_COND_FCMLA90	; Used in aarch64-sve.md.
!     UNSPEC_COND_FCMLA180 ; Used in aarch64-sve.md.
!     UNSPEC_COND_FCMLA270 ; Used in aarch64-sve.md.
!     UNSPEC_COND_FCMLE	; Used in aarch64-sve.md.
!     UNSPEC_COND_FCMLT	; Used in aarch64-sve.md.
!     UNSPEC_COND_FCMNE	; Used in aarch64-sve.md.
!     UNSPEC_COND_FCMUO	; Used in aarch64-sve.md.
!     UNSPEC_COND_FCVT	; Used in aarch64-sve.md.
!     UNSPEC_COND_FCVTZS	; Used in aarch64-sve.md.
!     UNSPEC_COND_FCVTZU	; Used in aarch64-sve.md.
!     UNSPEC_COND_FDIV	; Used in aarch64-sve.md.
!     UNSPEC_COND_FMAX	; Used in aarch64-sve.md.
!     UNSPEC_COND_FMAXNM	; Used in aarch64-sve.md.
!     UNSPEC_COND_FMIN	; Used in aarch64-sve.md.
!     UNSPEC_COND_FMINNM	; Used in aarch64-sve.md.
      UNSPEC_COND_FMLA	; Used in aarch64-sve.md.
      UNSPEC_COND_FMLS	; Used in aarch64-sve.md.
+     UNSPEC_COND_FMUL	; Used in aarch64-sve.md.
+     UNSPEC_COND_FMULX	; Used in aarch64-sve.md.
+     UNSPEC_COND_FNEG	; Used in aarch64-sve.md.
      UNSPEC_COND_FNMLA	; Used in aarch64-sve.md.
      UNSPEC_COND_FNMLS	; Used in aarch64-sve.md.
!     UNSPEC_COND_FRECPX	; Used in aarch64-sve.md.
!     UNSPEC_COND_FRINTA	; Used in aarch64-sve.md.
!     UNSPEC_COND_FRINTI	; Used in aarch64-sve.md.
!     UNSPEC_COND_FRINTM	; Used in aarch64-sve.md.
!     UNSPEC_COND_FRINTN	; Used in aarch64-sve.md.
!     UNSPEC_COND_FRINTP	; Used in aarch64-sve.md.
!     UNSPEC_COND_FRINTX	; Used in aarch64-sve.md.
!     UNSPEC_COND_FRINTZ	; Used in aarch64-sve.md.
!     UNSPEC_COND_FSCALE	; Used in aarch64-sve.md.
!     UNSPEC_COND_FSQRT	; Used in aarch64-sve.md.
!     UNSPEC_COND_FSUB	; Used in aarch64-sve.md.
!     UNSPEC_COND_SCVTF	; Used in aarch64-sve.md.
!     UNSPEC_COND_UCVTF	; Used in aarch64-sve.md.
!     UNSPEC_LASTA	; Used in aarch64-sve.md.
      UNSPEC_LASTB	; Used in aarch64-sve.md.
+     UNSPEC_ASHIFT_WIDE  ; Used in aarch64-sve.md.
+     UNSPEC_ASHIFTRT_WIDE ; Used in aarch64-sve.md.
+     UNSPEC_LSHIFTRT_WIDE ; Used in aarch64-sve.md.
+     UNSPEC_LDFF1	; Used in aarch64-sve.md.
+     UNSPEC_LDNF1	; Used in aarch64-sve.md.
      UNSPEC_FCADD90	; Used in aarch64-simd.md.
      UNSPEC_FCADD270	; Used in aarch64-simd.md.
      UNSPEC_FCMLA	; Used in aarch64-simd.md.
      UNSPEC_FCMLA90	; Used in aarch64-simd.md.
      UNSPEC_FCMLA180	; Used in aarch64-simd.md.
      UNSPEC_FCMLA270	; Used in aarch64-simd.md.
+     UNSPEC_ASRD		; Used in aarch64-sve.md.
+     UNSPEC_ADCLB	; Used in aarch64-sve2.md.
+     UNSPEC_ADCLT	; Used in aarch64-sve2.md.
+     UNSPEC_ADDHNB	; Used in aarch64-sve2.md.
+     UNSPEC_ADDHNT	; Used in aarch64-sve2.md.
+     UNSPEC_BDEP		; Used in aarch64-sve2.md.
+     UNSPEC_BEXT		; Used in aarch64-sve2.md.
+     UNSPEC_BGRP		; Used in aarch64-sve2.md.
+     UNSPEC_CADD270	; Used in aarch64-sve2.md.
+     UNSPEC_CADD90	; Used in aarch64-sve2.md.
+     UNSPEC_CDOT		; Used in aarch64-sve2.md.
+     UNSPEC_CDOT180	; Used in aarch64-sve2.md.
+     UNSPEC_CDOT270	; Used in aarch64-sve2.md.
+     UNSPEC_CDOT90	; Used in aarch64-sve2.md.
+     UNSPEC_CMLA		; Used in aarch64-sve2.md.
+     UNSPEC_CMLA180	; Used in aarch64-sve2.md.
+     UNSPEC_CMLA270	; Used in aarch64-sve2.md.
+     UNSPEC_CMLA90	; Used in aarch64-sve2.md.
+     UNSPEC_COND_FCVTLT	; Used in aarch64-sve2.md.
+     UNSPEC_COND_FCVTNT	; Used in aarch64-sve2.md.
+     UNSPEC_COND_FCVTX	; Used in aarch64-sve2.md.
+     UNSPEC_COND_FCVTXNT	; Used in aarch64-sve2.md.
+     UNSPEC_COND_FLOGB	; Used in aarch64-sve2.md.
+     UNSPEC_EORBT	; Used in aarch64-sve2.md.
+     UNSPEC_EORTB	; Used in aarch64-sve2.md.
+     UNSPEC_FADDP	; Used in aarch64-sve2.md.
+     UNSPEC_FMAXNMP	; Used in aarch64-sve2.md.
+     UNSPEC_FMAXP	; Used in aarch64-sve2.md.
+     UNSPEC_FMINNMP	; Used in aarch64-sve2.md.
+     UNSPEC_FMINP	; Used in aarch64-sve2.md.
+     UNSPEC_FMLALB	; Used in aarch64-sve2.md.
+     UNSPEC_FMLALT	; Used in aarch64-sve2.md.
+     UNSPEC_FMLSLB	; Used in aarch64-sve2.md.
+     UNSPEC_FMLSLT	; Used in aarch64-sve2.md.
+     UNSPEC_HISTCNT	; Used in aarch64-sve2.md.
+     UNSPEC_HISTSEG	; Used in aarch64-sve2.md.
+     UNSPEC_MATCH	; Used in aarch64-sve2.md.
+     UNSPEC_NMATCH	; Used in aarch64-sve2.md.
+     UNSPEC_PMULLB	; Used in aarch64-sve2.md.
+     UNSPEC_PMULLB_PAIR	; Used in aarch64-sve2.md.
+     UNSPEC_PMULLT	; Used in aarch64-sve2.md.
+     UNSPEC_PMULLT_PAIR	; Used in aarch64-sve2.md.
+     UNSPEC_RADDHNB	; Used in aarch64-sve2.md.
+     UNSPEC_RADDHNT	; Used in aarch64-sve2.md.
+     UNSPEC_RSHRNB	; Used in aarch64-sve2.md.
+     UNSPEC_RSHRNT	; Used in aarch64-sve2.md.
+     UNSPEC_RSUBHNB	; Used in aarch64-sve2.md.
+     UNSPEC_RSUBHNT	; Used in aarch64-sve2.md.
+     UNSPEC_SABDLB	; Used in aarch64-sve2.md.
+     UNSPEC_SABDLT	; Used in aarch64-sve2.md.
+     UNSPEC_SADDLB	; Used in aarch64-sve2.md.
+     UNSPEC_SADDLBT	; Used in aarch64-sve2.md.
+     UNSPEC_SADDLT	; Used in aarch64-sve2.md.
+     UNSPEC_SADDWB	; Used in aarch64-sve2.md.
+     UNSPEC_SADDWT	; Used in aarch64-sve2.md.
+     UNSPEC_SBCLB	; Used in aarch64-sve2.md.
+     UNSPEC_SBCLT	; Used in aarch64-sve2.md.
+     UNSPEC_SHRNB	; Used in aarch64-sve2.md.
+     UNSPEC_SHRNT	; Used in aarch64-sve2.md.
+     UNSPEC_SLI		; Used in aarch64-sve2.md.
+     UNSPEC_SMAXP	; Used in aarch64-sve2.md.
+     UNSPEC_SMINP	; Used in aarch64-sve2.md.
+     UNSPEC_SMULHRS	; Used in aarch64-sve2.md.
+     UNSPEC_SMULHS	; Used in aarch64-sve2.md.
+     UNSPEC_SMULLB	; Used in aarch64-sve2.md.
+     UNSPEC_SMULLT	; Used in aarch64-sve2.md.
+     UNSPEC_SQCADD270	; Used in aarch64-sve2.md.
+     UNSPEC_SQCADD90	; Used in aarch64-sve2.md.
+     UNSPEC_SQDMULLB	; Used in aarch64-sve2.md.
+     UNSPEC_SQDMULLBT	; Used in aarch64-sve2.md.
+     UNSPEC_SQDMULLT	; Used in aarch64-sve2.md.
+     UNSPEC_SQRDCMLAH	; Used in aarch64-sve2.md.
+     UNSPEC_SQRDCMLAH180	; Used in aarch64-sve2.md.
+     UNSPEC_SQRDCMLAH270	; Used in aarch64-sve2.md.
+     UNSPEC_SQRDCMLAH90	; Used in aarch64-sve2.md.
+     UNSPEC_SQRSHRNB	; Used in aarch64-sve2.md.
+     UNSPEC_SQRSHRNT	; Used in aarch64-sve2.md.
+     UNSPEC_SQRSHRUNB	; Used in aarch64-sve2.md.
+     UNSPEC_SQRSHRUNT	; Used in aarch64-sve2.md.
+     UNSPEC_SQSHRNB	; Used in aarch64-sve2.md.
+     UNSPEC_SQSHRNT	; Used in aarch64-sve2.md.
+     UNSPEC_SQSHRUNB	; Used in aarch64-sve2.md.
+     UNSPEC_SQSHRUNT	; Used in aarch64-sve2.md.
+     UNSPEC_SQXTNB	; Used in aarch64-sve2.md.
+     UNSPEC_SQXTNT	; Used in aarch64-sve2.md.
+     UNSPEC_SQXTUNB	; Used in aarch64-sve2.md.
+     UNSPEC_SQXTUNT	; Used in aarch64-sve2.md.
+     UNSPEC_SRI		; Used in aarch64-sve2.md.
+     UNSPEC_SSHLLB	; Used in aarch64-sve2.md.
+     UNSPEC_SSHLLT	; Used in aarch64-sve2.md.
+     UNSPEC_SSUBLB	; Used in aarch64-sve2.md.
+     UNSPEC_SSUBLBT	; Used in aarch64-sve2.md.
+     UNSPEC_SSUBLT	; Used in aarch64-sve2.md.
+     UNSPEC_SSUBLTB	; Used in aarch64-sve2.md.
+     UNSPEC_SSUBWB	; Used in aarch64-sve2.md.
+     UNSPEC_SSUBWT	; Used in aarch64-sve2.md.
+     UNSPEC_SUBHNB	; Used in aarch64-sve2.md.
+     UNSPEC_SUBHNT	; Used in aarch64-sve2.md.
+     UNSPEC_TBL2		; Used in aarch64-sve2.md.
+     UNSPEC_UABDLB	; Used in aarch64-sve2.md.
+     UNSPEC_UABDLT	; Used in aarch64-sve2.md.
+     UNSPEC_UADDLB	; Used in aarch64-sve2.md.
+     UNSPEC_UADDLT	; Used in aarch64-sve2.md.
+     UNSPEC_UADDWB	; Used in aarch64-sve2.md.
+     UNSPEC_UADDWT	; Used in aarch64-sve2.md.
+     UNSPEC_UMAXP	; Used in aarch64-sve2.md.
+     UNSPEC_UMINP	; Used in aarch64-sve2.md.
+     UNSPEC_UMULHRS	; Used in aarch64-sve2.md.
+     UNSPEC_UMULHS	; Used in aarch64-sve2.md.
+     UNSPEC_UMULLB	; Used in aarch64-sve2.md.
+     UNSPEC_UMULLT	; Used in aarch64-sve2.md.
+     UNSPEC_UQRSHRNB	; Used in aarch64-sve2.md.
+     UNSPEC_UQRSHRNT	; Used in aarch64-sve2.md.
+     UNSPEC_UQSHRNB	; Used in aarch64-sve2.md.
+     UNSPEC_UQSHRNT	; Used in aarch64-sve2.md.
+     UNSPEC_UQXTNB	; Used in aarch64-sve2.md.
+     UNSPEC_UQXTNT	; Used in aarch64-sve2.md.
+     UNSPEC_USHLLB	; Used in aarch64-sve2.md.
+     UNSPEC_USHLLT	; Used in aarch64-sve2.md.
+     UNSPEC_USUBLB	; Used in aarch64-sve2.md.
+     UNSPEC_USUBLT	; Used in aarch64-sve2.md.
+     UNSPEC_USUBWB	; Used in aarch64-sve2.md.
+     UNSPEC_USUBWT	; Used in aarch64-sve2.md.
+     UNSPEC_USDOT	; Used in aarch64-simd.md.
+     UNSPEC_SUDOT	; Used in aarch64-simd.md.
+     UNSPEC_BFDOT	; Used in aarch64-simd.md.
+     UNSPEC_BFMLALB	; Used in aarch64-sve.md.
+     UNSPEC_BFMLALT	; Used in aarch64-sve.md.
+     UNSPEC_BFMMLA	; Used in aarch64-sve.md.
+     UNSPEC_BFCVTN      ; Used in aarch64-simd.md.
+     UNSPEC_BFCVTN2     ; Used in aarch64-simd.md.
+     UNSPEC_BFCVT       ; Used in aarch64-simd.md.
  ])
  
  ;; ------------------------------------------------------------------
***************
*** 519,524 ****
--- 862,870 ----
  ;; Mode attributes
  ;; -------------------------------------------------------------------
  
+ ;; "e" for signaling operations, "" for quiet operations.
+ (define_mode_attr e [(CCFP "") (CCFPE "e")])
+ 
  ;; In GPI templates, a string like "%<w>0" will expand to "%w0" in the
  ;; 32-bit version and "%x0" in the 64-bit version.
  (define_mode_attr w [(QI "w") (HI "w") (SI "w") (DI "x") (SF "s") (DF "d")])
***************
*** 586,591 ****
--- 932,938 ----
  			  (V2SI "2") (V4SI "4")
  				     (V2DI "2")
  			  (V4HF "4") (V8HF "8")
+ 			  (V4BF "4") (V8BF "8")
  			  (V2SF "2") (V4SF "4")
  			  (V1DF "1") (V2DF "2")
  			  (DI "1") (DF "1")])
***************
*** 610,615 ****
--- 957,970 ----
  (define_mode_attr sizem1 [(QI "#7") (HI "#15") (SI "#31") (DI "#63")
  			  (HF "#15") (SF "#31") (DF "#63")])
  
+ ;; The number of bits in a vector element, or controlled by a predicate
+ ;; element.
+ (define_mode_attr elem_bits [(VNx16BI "8") (VNx8BI "16")
+ 			     (VNx4BI "32") (VNx2BI "64")
+ 			     (VNx16QI "8") (VNx8HI "16")
+ 			     (VNx4SI "32") (VNx2DI "64")
+ 			     (VNx8HF "16") (VNx4SF "32") (VNx2DF "64")])
+ 
  ;; Attribute to describe constants acceptable in logical operations
  (define_mode_attr lconst [(SI "K") (DI "L")])
  
***************
*** 624,635 ****
--- 979,998 ----
  
  (define_mode_attr Vtype [(V8QI "8b") (V16QI "16b")
  			 (V4HI "4h") (V8HI  "8h")
+ 			 (V4BF "4h") (V8BF  "8h")
                           (V2SI "2s") (V4SI  "4s")
                           (DI   "1d") (DF    "1d")
                           (V2DI "2d") (V2SF "2s")
  			 (V4SF "4s") (V2DF "2d")
  			 (V4HF "4h") (V8HF "8h")])
  
+ ;; Map mode to type used in widening multiplies.
+ (define_mode_attr Vcondtype [(V4HI "4h") (V8HI "4h") (V2SI "2s") (V4SI "2s")])
+ 
+ ;; Map lane mode to name
+ (define_mode_attr Qlane [(V4HI "_v4hi") (V8HI  "q_v4hi")
+ 			 (V2SI "_v2si") (V4SI  "q_v2si")])
+ 
  (define_mode_attr Vrevsuff [(V4HI "16") (V8HI "16") (V2SI "32")
                              (V4SI "32") (V2DI "64")])
  
***************
*** 637,643 ****
  			 (V4HI ".4h") (V8HI  ".8h")
  			 (V2SI ".2s") (V4SI  ".4s")
  			 (V2DI ".2d") (V4HF ".4h")
! 			 (V8HF ".8h") (V2SF ".2s")
  			 (V4SF ".4s") (V2DF ".2d")
  			 (DI   "")    (SI   "")
  			 (HI   "")    (QI   "")
--- 1000,1007 ----
  			 (V4HI ".4h") (V8HI  ".8h")
  			 (V2SI ".2s") (V4SI  ".4s")
  			 (V2DI ".2d") (V4HF ".4h")
! 			 (V8HF ".8h") (V4BF ".4h")
! 			 (V8BF ".8h") (V2SF ".2s")
  			 (V4SF ".4s") (V2DF ".2d")
  			 (DI   "")    (SI   "")
  			 (HI   "")    (QI   "")
***************
*** 651,681 ****
  			   (HI   "")])
  
  ;; Mode-to-individual element type mapping.
! (define_mode_attr Vetype [(V8QI "b") (V16QI "b") (VNx16QI "b") (VNx16BI "b")
! 			  (V4HI "h") (V8HI  "h") (VNx8HI  "h") (VNx8BI  "h")
! 			  (V2SI "s") (V4SI  "s") (VNx4SI  "s") (VNx4BI  "s")
! 			  (V2DI "d")             (VNx2DI  "d") (VNx2BI  "d")
! 			  (V4HF "h") (V8HF  "h") (VNx8HF  "h")
! 			  (V2SF "s") (V4SF  "s") (VNx4SF  "s")
! 			  (V2DF "d")             (VNx2DF  "d")
! 			  (HF   "h")
! 			  (SF   "s") (DF  "d")
! 			  (QI "b")   (HI "h")
! 			  (SI "s")   (DI "d")])
  
  ;; Equivalent of "size" for a vector element.
! (define_mode_attr Vesize [(VNx16QI "b")
! 			  (VNx8HI  "h") (VNx8HF  "h")
! 			  (VNx4SI  "w") (VNx4SF  "w")
! 			  (VNx2DI  "d") (VNx2DF  "d")
  			  (VNx32QI "b") (VNx48QI "b") (VNx64QI "b")
  			  (VNx16HI "h") (VNx24HI "h") (VNx32HI "h")
  			  (VNx16HF "h") (VNx24HF "h") (VNx32HF "h")
  			  (VNx8SI  "w") (VNx12SI "w") (VNx16SI "w")
  			  (VNx8SF  "w") (VNx12SF "w") (VNx16SF "w")
  			  (VNx4DI  "d") (VNx6DI  "d") (VNx8DI  "d")
  			  (VNx4DF  "d") (VNx6DF  "d") (VNx8DF  "d")])
  
  ;; Vetype is used everywhere in scheduling type and assembly output,
  ;; sometimes they are not the same, for example HF modes on some
  ;; instructions.  stype is defined to represent scheduling type
--- 1015,1074 ----
  			   (HI   "")])
  
  ;; Mode-to-individual element type mapping.
! (define_mode_attr Vetype [(V8QI "b") (V16QI "b")
! 			  (V4HI "h") (V8HI  "h")
! 			  (V2SI "s") (V4SI  "s")
! 			  (V2DI "d")
! 			  (V4HF "h") (V8HF  "h")
! 			  (V2SF "s") (V4SF  "s")
! 			  (V2DF "d")
! 			  (VNx16BI "b") (VNx8BI "h") (VNx4BI "s") (VNx2BI "d")
! 			  (VNx16QI "b") (VNx8QI "b") (VNx4QI "b") (VNx2QI "b")
! 			  (VNx8HI "h") (VNx4HI "h") (VNx2HI "h")
! 			  (VNx8HF "h") (VNx4HF "h") (VNx2HF "h")
! 			  (VNx8BF "h")
! 			  (VNx4SI "s") (VNx2SI "s")
! 			  (VNx4SF "s") (VNx2SF "s")
! 			  (VNx2DI "d")
! 			  (VNx2DF "d")
! 			  (BF "h") (V4BF "h") (V8BF "h")
! 			  (HF "h")
! 			  (SF "s") (DF "d")
! 			  (QI "b") (HI "h")
! 			  (SI "s") (DI "d")])
! 
! ;; Like Vetype, but map to types that are a quarter of the element size.
! (define_mode_attr Vetype_fourth [(VNx4SI "b") (VNx2DI "h")])
  
  ;; Equivalent of "size" for a vector element.
! (define_mode_attr Vesize [(VNx16QI "b") (VNx8QI "b") (VNx4QI "b") (VNx2QI "b")
! 			  (VNx8HI "h") (VNx4HI "h") (VNx2HI "h")
! 			  (VNx8HF "h") (VNx4HF "h") (VNx2HF "h")
! 			  (VNx8BF "h")
! 			  (VNx4SI "w") (VNx2SI "w")
! 			  (VNx4SF "w") (VNx2SF "w")
! 			  (VNx2DI "d")
! 			  (VNx2DF "d")
  			  (VNx32QI "b") (VNx48QI "b") (VNx64QI "b")
  			  (VNx16HI "h") (VNx24HI "h") (VNx32HI "h")
  			  (VNx16HF "h") (VNx24HF "h") (VNx32HF "h")
+ 			  (VNx16BF "h") (VNx24BF "h") (VNx32BF "h")
  			  (VNx8SI  "w") (VNx12SI "w") (VNx16SI "w")
  			  (VNx8SF  "w") (VNx12SF "w") (VNx16SF "w")
  			  (VNx4DI  "d") (VNx6DI  "d") (VNx8DI  "d")
  			  (VNx4DF  "d") (VNx6DF  "d") (VNx8DF  "d")])
  
+ ;; The Z register suffix for an SVE mode's element container, i.e. the
+ ;; Vetype of full SVE modes that have the same number of elements.
+ (define_mode_attr Vctype [(VNx16QI "b") (VNx8QI "h") (VNx4QI "s") (VNx2QI "d")
+ 			  (VNx8HI "h") (VNx4HI "s") (VNx2HI "d")
+ 			  (VNx8HF "h") (VNx4HF "s") (VNx2HF "d")
+ 			  (VNx8BF "h")
+ 			  (VNx4SI "s") (VNx2SI "d")
+ 			  (VNx4SF "s") (VNx2SF "d")
+ 			  (VNx2DI "d")
+ 			  (VNx2DF "d")])
+ 
  ;; Vetype is used everywhere in scheduling type and assembly output,
  ;; sometimes they are not the same, for example HF modes on some
  ;; instructions.  stype is defined to represent scheduling type
***************
*** 694,738 ****
  			  (V8HF "16b") (V2SF  "8b")
  			  (V4SF "16b") (V2DF  "16b")
  			  (DI   "8b")  (DF    "8b")
! 			  (SI   "8b")  (SF    "8b")])
  
  ;; Define element mode for each vector mode.
! (define_mode_attr VEL [(V8QI  "QI") (V16QI "QI") (VNx16QI "QI")
! 			(V4HI "HI") (V8HI  "HI") (VNx8HI  "HI")
! 			(V2SI "SI") (V4SI  "SI") (VNx4SI  "SI")
! 			(DI   "DI") (V2DI  "DI") (VNx2DI  "DI")
! 			(V4HF "HF") (V8HF  "HF") (VNx8HF  "HF")
! 			(V2SF "SF") (V4SF  "SF") (VNx4SF  "SF")
! 			(DF   "DF") (V2DF  "DF") (VNx2DF  "DF")
! 			(SI   "SI") (HI    "HI")
! 			(QI   "QI")])
  
  ;; Define element mode for each vector mode (lower case).
! (define_mode_attr Vel [(V8QI "qi") (V16QI "qi") (VNx16QI "qi")
! 			(V4HI "hi") (V8HI "hi") (VNx8HI  "hi")
! 			(V2SI "si") (V4SI "si") (VNx4SI  "si")
! 			(DI "di")   (V2DI "di") (VNx2DI  "di")
! 			(V4HF "hf") (V8HF "hf") (VNx8HF  "hf")
! 			(V2SF "sf") (V4SF "sf") (VNx4SF  "sf")
! 			(V2DF "df") (DF "df")   (VNx2DF  "df")
! 			(SI   "si") (HI   "hi")
! 			(QI   "qi")])
  
  ;; Element mode with floating-point values replaced by like-sized integers.
  (define_mode_attr VEL_INT [(VNx16QI "QI")
! 			   (VNx8HI  "HI") (VNx8HF "HI")
  			   (VNx4SI  "SI") (VNx4SF "SI")
  			   (VNx2DI  "DI") (VNx2DF "DI")])
  
  ;; Gives the mode of the 128-bit lowpart of an SVE vector.
  (define_mode_attr V128 [(VNx16QI "V16QI")
! 			(VNx8HI  "V8HI") (VNx8HF "V8HF")
  			(VNx4SI  "V4SI") (VNx4SF "V4SF")
  			(VNx2DI  "V2DI") (VNx2DF "V2DF")])
  
  ;; ...and again in lower case.
  (define_mode_attr v128 [(VNx16QI "v16qi")
! 			(VNx8HI  "v8hi") (VNx8HF "v8hf")
  			(VNx4SI  "v4si") (VNx4SF "v4sf")
  			(VNx2DI  "v2di") (VNx2DF "v2df")])
  
--- 1087,1150 ----
  			  (V8HF "16b") (V2SF  "8b")
  			  (V4SF "16b") (V2DF  "16b")
  			  (DI   "8b")  (DF    "8b")
! 			  (SI   "8b")  (SF    "8b")
! 			  (V4BF "8b")  (V8BF  "16b")])
  
  ;; Define element mode for each vector mode.
! (define_mode_attr VEL [(V8QI  "QI") (V16QI "QI")
! 		       (V4HI "HI") (V8HI  "HI")
! 		       (V2SI "SI") (V4SI  "SI")
! 		       (DI   "DI") (V2DI  "DI")
! 		       (V4HF "HF") (V8HF  "HF")
! 		       (V2SF "SF") (V4SF  "SF")
! 		       (DF   "DF") (V2DF  "DF")
! 		       (SI   "SI") (HI    "HI")
! 		       (QI   "QI")
! 		       (V4BF "BF") (V8BF "BF")
! 		       (VNx16QI "QI") (VNx8QI "QI") (VNx4QI "QI") (VNx2QI "QI")
! 		       (VNx8HI "HI") (VNx4HI "HI") (VNx2HI "HI")
! 		       (VNx8HF "HF") (VNx4HF "HF") (VNx2HF "HF")
! 		       (VNx8BF "BF")
! 		       (VNx4SI "SI") (VNx2SI "SI")
! 		       (VNx4SF "SF") (VNx2SF "SF")
! 		       (VNx2DI "DI")
! 		       (VNx2DF "DF")])
  
  ;; Define element mode for each vector mode (lower case).
! (define_mode_attr Vel [(V8QI "qi") (V16QI "qi")
! 		       (V4HI "hi") (V8HI "hi")
! 		       (V2SI "si") (V4SI "si")
! 		       (DI   "di") (V2DI "di")
! 		       (V4HF "hf") (V8HF "hf")
! 		       (V2SF "sf") (V4SF "sf")
! 		       (V2DF "df") (DF   "df")
! 		       (SI   "si") (HI   "hi")
! 		       (QI   "qi")
! 		       (V4BF "bf") (V8BF "bf")
! 		       (VNx16QI "qi") (VNx8QI "qi") (VNx4QI "qi") (VNx2QI "qi")
! 		       (VNx8HI "hi") (VNx4HI "hi") (VNx2HI "hi")
! 		       (VNx8HF "hf") (VNx4HF "hf") (VNx2HF "hf")
! 		       (VNx8BF "bf")
! 		       (VNx4SI "si") (VNx2SI "si")
! 		       (VNx4SF "sf") (VNx2SF "sf")
! 		       (VNx2DI "di")
! 		       (VNx2DF "df")])
  
  ;; Element mode with floating-point values replaced by like-sized integers.
  (define_mode_attr VEL_INT [(VNx16QI "QI")
! 			   (VNx8HI  "HI") (VNx8HF "HI") (VNx8BF "HI")
  			   (VNx4SI  "SI") (VNx4SF "SI")
  			   (VNx2DI  "DI") (VNx2DF "DI")])
  
  ;; Gives the mode of the 128-bit lowpart of an SVE vector.
  (define_mode_attr V128 [(VNx16QI "V16QI")
! 			(VNx8HI  "V8HI") (VNx8HF "V8HF") (VNx8BF "V8BF")
  			(VNx4SI  "V4SI") (VNx4SF "V4SF")
  			(VNx2DI  "V2DI") (VNx2DF "V2DF")])
  
  ;; ...and again in lower case.
  (define_mode_attr v128 [(VNx16QI "v16qi")
! 			(VNx8HI  "v8hi") (VNx8HF "v8hf") (VNx8BF "v8bf")
  			(VNx4SI  "v4si") (VNx4SF "v4sf")
  			(VNx2DI  "v2di") (VNx2DF "v2df")])
  
***************
*** 760,777 ****
  			 (V2SI "SI")    (V4SI  "V2SI")
  			 (V2DI "DI")    (V2SF  "SF")
  			 (V4SF "V2SF")  (V4HF "V2HF")
! 			 (V8HF "V4HF")  (V2DF  "DF")])
  
  ;; Half modes of all vector modes, in lower-case.
  (define_mode_attr Vhalf [(V8QI "v4qi")  (V16QI "v8qi")
  			 (V4HI "v2hi")  (V8HI  "v4hi")
  			 (V2SI "si")    (V4SI  "v2si")
  			 (V2DI "di")    (V2SF  "sf")
  			 (V4SF "v2sf")  (V2DF  "df")])
  
  ;; Double modes of vector modes.
  (define_mode_attr VDBL [(V8QI "V16QI") (V4HI "V8HI")
! 			(V4HF "V8HF")
  			(V2SI "V4SI")  (V2SF "V4SF")
  			(SI   "V2SI")  (DI   "V2DI")
  			(DF   "V2DF")])
--- 1172,1191 ----
  			 (V2SI "SI")    (V4SI  "V2SI")
  			 (V2DI "DI")    (V2SF  "SF")
  			 (V4SF "V2SF")  (V4HF "V2HF")
! 			 (V8HF "V4HF")  (V2DF  "DF")
! 			 (V8BF "V4BF")])
  
  ;; Half modes of all vector modes, in lower-case.
  (define_mode_attr Vhalf [(V8QI "v4qi")  (V16QI "v8qi")
  			 (V4HI "v2hi")  (V8HI  "v4hi")
+ 			 (V8HF  "v4hf") (V8BF  "v4bf")
  			 (V2SI "si")    (V4SI  "v2si")
  			 (V2DI "di")    (V2SF  "sf")
  			 (V4SF "v2sf")  (V2DF  "df")])
  
  ;; Double modes of vector modes.
  (define_mode_attr VDBL [(V8QI "V16QI") (V4HI "V8HI")
! 			(V4HF "V8HF")  (V4BF "V8BF")
  			(V2SI "V4SI")  (V2SF "V4SF")
  			(SI   "V2SI")  (DI   "V2DI")
  			(DF   "V2DF")])
***************
*** 781,787 ****
  
  ;; Double modes of vector modes (lower case).
  (define_mode_attr Vdbl [(V8QI "v16qi") (V4HI "v8hi")
! 			(V4HF "v8hf")
  			(V2SI "v4si")  (V2SF "v4sf")
  			(SI   "v2si")  (DI   "v2di")
  			(DF   "v2df")])
--- 1195,1201 ----
  
  ;; Double modes of vector modes (lower case).
  (define_mode_attr Vdbl [(V8QI "v16qi") (V4HI "v8hi")
! 			(V4HF "v8hf")  (V4BF "v8bf")
  			(V2SI "v4si")  (V2SF "v4sf")
  			(SI   "v2si")  (DI   "v2di")
  			(DF   "v2df")])
***************
*** 800,810 ****
--- 1214,1231 ----
  			    (V2DI "V2SI")
  			    (DI	  "SI")	  (SI	"HI")
  			    (HI	  "QI")])
+ (define_mode_attr Vnarrowq [(V8HI "v8qi") (V4SI "v4hi")
+ 			    (V2DI "v2si")])
  
  ;; Narrowed quad-modes for VQN (Used for XTN2).
  (define_mode_attr VNARROWQ2 [(V8HI "V16QI") (V4SI "V8HI")
  			     (V2DI "V4SI")])
  
+ ;; Narrowed modes of vector modes.
+ (define_mode_attr VNARROW [(VNx8HI "VNx16QI")
+ 			   (VNx4SI "VNx8HI") (VNx4SF "VNx8HF")
+ 			   (VNx2DI "VNx4SI") (VNx2DF "VNx4SF")])
+ 
  ;; Register suffix narrowed modes for VQN.
  (define_mode_attr Vntype [(V8HI "8b") (V4SI "4h")
  			  (V2DI "2s")])
***************
*** 843,852 ****
  			  (V8HI "4s") (V4SI "2d")
  			  (V8HF "4s") (V4SF "2d")])
  
! ;; SVE vector after widening
  (define_mode_attr Vewtype [(VNx16QI "h")
  			   (VNx8HI  "s") (VNx8HF "s")
! 			   (VNx4SI  "d") (VNx4SF "d")])
  
  ;; Widened mode register suffixes for VDW/VQW.
  (define_mode_attr Vmwtype [(V8QI ".8h") (V4HI ".4s")
--- 1264,1279 ----
  			  (V8HI "4s") (V4SI "2d")
  			  (V8HF "4s") (V4SF "2d")])
  
! ;; SVE vector after narrowing.
! (define_mode_attr Ventype [(VNx8HI "b")
! 			   (VNx4SI "h") (VNx4SF "h")
! 			   (VNx2DI "s") (VNx2DF "s")])
! 
! ;; SVE vector after widening.
  (define_mode_attr Vewtype [(VNx16QI "h")
  			   (VNx8HI  "s") (VNx8HF "s")
! 			   (VNx4SI  "d") (VNx4SF "d")
! 			   (VNx2DI  "q")])
  
  ;; Widened mode register suffixes for VDW/VQW.
  (define_mode_attr Vmwtype [(V8QI ".8h") (V4HI ".4s")
***************
*** 861,883 ****
  			     (V4SF "2s")])
  
  ;; Define corresponding core/FP element mode for each vector mode.
! (define_mode_attr vw [(V8QI "w") (V16QI "w") (VNx16QI "w")
! 		      (V4HI "w") (V8HI "w") (VNx8HI "w")
! 		      (V2SI "w") (V4SI "w") (VNx4SI "w")
! 		      (DI   "x") (V2DI "x") (VNx2DI "x")
! 		      (VNx8HF "h")
! 		      (V2SF "s") (V4SF "s") (VNx4SF "s")
! 		      (V2DF "d") (VNx2DF "d")])
  
  ;; Corresponding core element mode for each vector mode.  This is a
  ;; variation on <vw> mapping FP modes to GP regs.
! (define_mode_attr vwcore [(V8QI "w") (V16QI "w") (VNx16QI "w")
! 			  (V4HI "w") (V8HI "w") (VNx8HI "w")
! 			  (V2SI "w") (V4SI "w") (VNx4SI "w")
! 			  (DI   "x") (V2DI "x") (VNx2DI "x")
! 			  (V4HF "w") (V8HF "w") (VNx8HF "w")
! 			  (V2SF "w") (V4SF "w") (VNx4SF "w")
! 			  (V2DF "x") (VNx2DF "x")])
  
  ;; Double vector types for ALLX.
  (define_mode_attr Vallxd [(QI "8b") (HI "4h") (SI "2s")])
--- 1288,1323 ----
  			     (V4SF "2s")])
  
  ;; Define corresponding core/FP element mode for each vector mode.
! (define_mode_attr vw [(V8QI "w") (V16QI "w")
! 		      (V4HI "w") (V8HI "w")
! 		      (V2SI "w") (V4SI "w")
! 		      (DI   "x") (V2DI "x")
! 		      (V2SF "s") (V4SF "s")
! 		      (V2DF "d")])
  
  ;; Corresponding core element mode for each vector mode.  This is a
  ;; variation on <vw> mapping FP modes to GP regs.
! (define_mode_attr vwcore [(V8QI "w") (V16QI "w")
! 			  (V4HI "w") (V8HI "w")
! 			  (V2SI "w") (V4SI "w")
! 			  (DI   "x") (V2DI "x")
! 			  (V4HF "w") (V8HF "w")
! 			  (V2SF "w") (V4SF "w")
! 			  (V2DF "x")
! 			  (VNx16QI "w") (VNx8QI "w") (VNx4QI "w") (VNx2QI "w")
! 			  (VNx8HI "w") (VNx4HI "w") (VNx2HI "w")
! 			  (VNx8HF "w") (VNx4HF "w") (VNx2HF "w")
! 			  (VNx8BF "w")
! 			  (VNx4SI "w") (VNx2SI "w")
! 			  (VNx4SF "w") (VNx2SF "w")
! 			  (VNx2DI "x")
! 			  (VNx2DF "x")])
! 
! ;; Like vwcore, but for the container mode rather than the element mode.
! (define_mode_attr vccore [(VNx16QI "w") (VNx8QI "w") (VNx4QI "w") (VNx2QI "x")
! 			  (VNx8HI "w") (VNx4HI "w") (VNx2HI "x")
! 			  (VNx4SI "w") (VNx2SI "x")
! 			  (VNx2DI "x")])
  
  ;; Double vector types for ALLX.
  (define_mode_attr Vallxd [(QI "8b") (HI "4h") (SI "2s")])
***************
*** 888,899 ****
--- 1328,1341 ----
  			       (V2SI "V2SI") (V4SI  "V4SI")
  			       (DI   "DI")   (V2DI  "V2DI")
  			       (V4HF "V4HI") (V8HF  "V8HI")
+ 			       (V4BF "V4HI") (V8BF  "V8HI")
  			       (V2SF "V2SI") (V4SF  "V4SI")
  			       (DF   "DI")   (V2DF  "V2DI")
  			       (SF   "SI")   (SI    "SI")
  			       (HF    "HI")
  			       (VNx16QI "VNx16QI")
  			       (VNx8HI  "VNx8HI") (VNx8HF "VNx8HI")
+ 			       (VNx8BF  "VNx8HI")
  			       (VNx4SI  "VNx4SI") (VNx4SF "VNx4SI")
  			       (VNx2DI  "VNx2DI") (VNx2DF "VNx2DI")
  ])
***************
*** 904,924 ****
  			       (V2SI "v2si") (V4SI  "v4si")
  			       (DI   "di")   (V2DI  "v2di")
  			       (V4HF "v4hi") (V8HF  "v8hi")
  			       (V2SF "v2si") (V4SF  "v4si")
  			       (DF   "di")   (V2DF  "v2di")
  			       (SF   "si")
  			       (VNx16QI "vnx16qi")
  			       (VNx8HI  "vnx8hi") (VNx8HF "vnx8hi")
  			       (VNx4SI  "vnx4si") (VNx4SF "vnx4si")
  			       (VNx2DI  "vnx2di") (VNx2DF "vnx2di")
  ])
  
  ;; Floating-point equivalent of selected modes.
! (define_mode_attr V_FP_EQUIV [(VNx4SI "VNx4SF") (VNx4SF "VNx4SF")
  			      (VNx2DI "VNx2DF") (VNx2DF "VNx2DF")])
! (define_mode_attr v_fp_equiv [(VNx4SI "vnx4sf") (VNx4SF "vnx4sf")
  			      (VNx2DI "vnx2df") (VNx2DF "vnx2df")])
  
  ;; Mode for vector conditional operations where the comparison has
  ;; different type from the lhs.
  (define_mode_attr V_cmp_mixed [(V2SI "V2SF") (V4SI "V4SF")
--- 1346,1397 ----
  			       (V2SI "v2si") (V4SI  "v4si")
  			       (DI   "di")   (V2DI  "v2di")
  			       (V4HF "v4hi") (V8HF  "v8hi")
+ 			       (V4BF "v4hi") (V8BF  "v8hi")
  			       (V2SF "v2si") (V4SF  "v4si")
  			       (DF   "di")   (V2DF  "v2di")
  			       (SF   "si")
  			       (VNx16QI "vnx16qi")
  			       (VNx8HI  "vnx8hi") (VNx8HF "vnx8hi")
+ 			       (VNx8BF  "vnx8hi")
  			       (VNx4SI  "vnx4si") (VNx4SF "vnx4si")
  			       (VNx2DI  "vnx2di") (VNx2DF "vnx2di")
  ])
  
  ;; Floating-point equivalent of selected modes.
! (define_mode_attr V_FP_EQUIV [(VNx8HI "VNx8HF") (VNx8HF "VNx8HF")
! 			      (VNx8BF "VNx8HF")
! 			      (VNx4SI "VNx4SF") (VNx4SF "VNx4SF")
  			      (VNx2DI "VNx2DF") (VNx2DF "VNx2DF")])
! (define_mode_attr v_fp_equiv [(VNx8HI "vnx8hf") (VNx8HF "vnx8hf")
! 			      (VNx8BF "vnx8hf")
! 			      (VNx4SI "vnx4sf") (VNx4SF "vnx4sf")
  			      (VNx2DI "vnx2df") (VNx2DF "vnx2df")])
  
+ ;; Maps full and partial vector modes of any element type to a full-vector
+ ;; integer mode with the same number of units.
+ (define_mode_attr V_INT_CONTAINER [(VNx16QI "VNx16QI") (VNx8QI "VNx8HI")
+ 				   (VNx4QI "VNx4SI") (VNx2QI "VNx2DI")
+ 				   (VNx8HI "VNx8HI") (VNx4HI "VNx4SI")
+ 				   (VNx2HI "VNx2DI")
+ 				   (VNx4SI "VNx4SI") (VNx2SI "VNx2DI")
+ 				   (VNx2DI "VNx2DI")
+ 				   (VNx8HF "VNx8HI") (VNx4HF "VNx4SI")
+ 				   (VNx2HF "VNx2DI")
+ 				   (VNx4SF "VNx4SI") (VNx2SF "VNx2DI")
+ 				   (VNx2DF "VNx2DI")])
+ 
+ ;; Lower-case version of V_INT_CONTAINER.
+ (define_mode_attr v_int_container [(VNx16QI "vnx16qi") (VNx8QI "vnx8hi")
+ 				   (VNx4QI "vnx4si") (VNx2QI "vnx2di")
+ 				   (VNx8HI "vnx8hi") (VNx4HI "vnx4si")
+ 				   (VNx2HI "vnx2di")
+ 				   (VNx4SI "vnx4si") (VNx2SI "vnx2di")
+ 				   (VNx2DI "vnx2di")
+ 				   (VNx8HF "vnx8hi") (VNx4HF "vnx4si")
+ 				   (VNx2HF "vnx2di")
+ 				   (VNx4SF "vnx4si") (VNx2SF "vnx2di")
+ 				   (VNx2DF "vnx2di")])
+ 
  ;; Mode for vector conditional operations where the comparison has
  ;; different type from the lhs.
  (define_mode_attr V_cmp_mixed [(V2SI "V2SF") (V4SI "V4SF")
***************
*** 970,975 ****
--- 1443,1449 ----
  
  (define_mode_attr VSWAP_WIDTH [(V8QI "V16QI") (V16QI "V8QI")
  				(V4HI "V8HI") (V8HI  "V4HI")
+ 				(V8BF "V4BF") (V4BF  "V8BF")
  				(V2SI "V4SI") (V4SI  "V2SI")
  				(DI   "V2DI") (V2DI  "DI")
  				(V2SF "V4SF") (V4SF  "V2SF")
***************
*** 982,987 ****
--- 1456,1462 ----
  				    (DI   "to_128") (V2DI  "to_64")
  				    (V4HF "to_128") (V8HF  "to_64")
  				    (V2SF "to_128") (V4SF  "to_64")
+ 				    (V4BF "to_128") (V8BF  "to_64")
  				    (DF   "to_128") (V2DF  "to_64")])
  
  ;; For certain vector-by-element multiplication instructions we must
***************
*** 1015,1023 ****
--- 1490,1500 ----
  ;; Defined to '_q' for 128-bit types.
  (define_mode_attr q [(V8QI "") (V16QI "_q")
  		     (V4HI "") (V8HI  "_q")
+ 		     (V4BF "") (V8BF  "_q")
  		     (V2SI "") (V4SI  "_q")
  		     (DI   "") (V2DI  "_q")
  		     (V4HF "") (V8HF "_q")
+ 		     (V4BF "") (V8BF "_q")
  		     (V2SF "") (V4SF  "_q")
  			       (V2DF  "_q")
  		     (QI "") (HI "") (SI "") (DI "") (HF "") (SF "") (DF "")])
***************
*** 1029,1041 ****
  		      (V2SF "p") (V4SF  "v")
  		      (V4HF "v") (V8HF  "v")])
  
! (define_mode_attr vsi2qi [(V2SI "v8qi") (V4SI "v16qi")])
! (define_mode_attr VSI2QI [(V2SI "V8QI") (V4SI "V16QI")])
  
  
  ;; Register suffix for DOTPROD input types from the return type.
  (define_mode_attr Vdottype [(V2SI "8b") (V4SI "16b")])
  
  ;; Sum of lengths of instructions needed to move vector registers of a mode.
  (define_mode_attr insn_count [(OI "8") (CI "12") (XI "16")])
  
--- 1506,1523 ----
  		      (V2SF "p") (V4SF  "v")
  		      (V4HF "v") (V8HF  "v")])
  
! (define_mode_attr vsi2qi [(V2SI "v8qi") (V4SI "v16qi")
! 			  (VNx4SI "vnx16qi") (VNx2DI "vnx8hi")])
! (define_mode_attr VSI2QI [(V2SI "V8QI") (V4SI "V16QI")
! 			  (VNx4SI "VNx16QI") (VNx2DI "VNx8HI")])
  
  
  ;; Register suffix for DOTPROD input types from the return type.
  (define_mode_attr Vdottype [(V2SI "8b") (V4SI "16b")])
  
+ ;; Register suffix for BFDOT input types from the return type.
+ (define_mode_attr Vbfdottype [(V2SF "4h") (V4SF "8h")])
+ 
  ;; Sum of lengths of instructions needed to move vector registers of a mode.
  (define_mode_attr insn_count [(OI "8") (CI "12") (XI "16")])
  
***************
*** 1046,1148 ****
  ;; Width of 2nd and 3rd arguments to fp16 vector multiply add/sub
  (define_mode_attr VFMLA_W [(V2SF "V4HF") (V4SF "V8HF")])
  
  (define_mode_attr VFMLA_SEL_W [(V2SF "V2HF") (V4SF "V4HF")])
  
  (define_mode_attr f16quad [(V2SF "") (V4SF "q")])
  
  (define_code_attr f16mac [(plus "a") (minus "s")])
  
  ;; Map smax to smin and umax to umin.
  (define_code_attr max_opp [(smax "smin") (umax "umin")])
  
  ;; The number of subvectors in an SVE_STRUCT.
  (define_mode_attr vector_count [(VNx32QI "2") (VNx16HI "2")
  				(VNx8SI  "2") (VNx4DI  "2")
  				(VNx16HF "2") (VNx8SF  "2") (VNx4DF "2")
  				(VNx48QI "3") (VNx24HI "3")
  				(VNx12SI "3") (VNx6DI  "3")
  				(VNx24HF "3") (VNx12SF "3") (VNx6DF "3")
  				(VNx64QI "4") (VNx32HI "4")
  				(VNx16SI "4") (VNx8DI  "4")
  				(VNx32HF "4") (VNx16SF "4") (VNx8DF "4")])
  
  ;; The number of instruction bytes needed for an SVE_STRUCT move.  This is
  ;; equal to vector_count * 4.
  (define_mode_attr insn_length [(VNx32QI "8")  (VNx16HI "8")
  			       (VNx8SI  "8")  (VNx4DI  "8")
  			       (VNx16HF "8")  (VNx8SF  "8")  (VNx4DF "8")
  			       (VNx48QI "12") (VNx24HI "12")
  			       (VNx12SI "12") (VNx6DI  "12")
  			       (VNx24HF "12") (VNx12SF "12") (VNx6DF "12")
  			       (VNx64QI "16") (VNx32HI "16")
  			       (VNx16SI "16") (VNx8DI  "16")
  			       (VNx32HF "16") (VNx16SF "16") (VNx8DF "16")])
  
  ;; The type of a subvector in an SVE_STRUCT.
  (define_mode_attr VSINGLE [(VNx32QI "VNx16QI")
  			   (VNx16HI "VNx8HI") (VNx16HF "VNx8HF")
  			   (VNx8SI "VNx4SI") (VNx8SF "VNx4SF")
  			   (VNx4DI "VNx2DI") (VNx4DF "VNx2DF")
  			   (VNx48QI "VNx16QI")
  			   (VNx24HI "VNx8HI") (VNx24HF "VNx8HF")
  			   (VNx12SI "VNx4SI") (VNx12SF "VNx4SF")
  			   (VNx6DI "VNx2DI") (VNx6DF "VNx2DF")
  			   (VNx64QI "VNx16QI")
  			   (VNx32HI "VNx8HI") (VNx32HF "VNx8HF")
  			   (VNx16SI "VNx4SI") (VNx16SF "VNx4SF")
  			   (VNx8DI "VNx2DI") (VNx8DF "VNx2DF")])
  
  ;; ...and again in lower case.
  (define_mode_attr vsingle [(VNx32QI "vnx16qi")
  			   (VNx16HI "vnx8hi") (VNx16HF "vnx8hf")
  			   (VNx8SI "vnx4si") (VNx8SF "vnx4sf")
  			   (VNx4DI "vnx2di") (VNx4DF "vnx2df")
  			   (VNx48QI "vnx16qi")
  			   (VNx24HI "vnx8hi") (VNx24HF "vnx8hf")
  			   (VNx12SI "vnx4si") (VNx12SF "vnx4sf")
  			   (VNx6DI "vnx2di") (VNx6DF "vnx2df")
  			   (VNx64QI "vnx16qi")
  			   (VNx32HI "vnx8hi") (VNx32HF "vnx8hf")
  			   (VNx16SI "vnx4si") (VNx16SF "vnx4sf")
  			   (VNx8DI "vnx2di") (VNx8DF "vnx2df")])
  
  ;; The predicate mode associated with an SVE data mode.  For structure modes
  ;; this is equivalent to the <VPRED> of the subvector mode.
! (define_mode_attr VPRED [(VNx16QI "VNx16BI")
! 			 (VNx8HI "VNx8BI") (VNx8HF "VNx8BI")
! 			 (VNx4SI "VNx4BI") (VNx4SF "VNx4BI")
! 			 (VNx2DI "VNx2BI") (VNx2DF "VNx2BI")
  			 (VNx32QI "VNx16BI")
  			 (VNx16HI "VNx8BI") (VNx16HF "VNx8BI")
  			 (VNx8SI "VNx4BI") (VNx8SF "VNx4BI")
  			 (VNx4DI "VNx2BI") (VNx4DF "VNx2BI")
  			 (VNx48QI "VNx16BI")
  			 (VNx24HI "VNx8BI") (VNx24HF "VNx8BI")
  			 (VNx12SI "VNx4BI") (VNx12SF "VNx4BI")
  			 (VNx6DI "VNx2BI") (VNx6DF "VNx2BI")
  			 (VNx64QI "VNx16BI")
  			 (VNx32HI "VNx8BI") (VNx32HF "VNx8BI")
  			 (VNx16SI "VNx4BI") (VNx16SF "VNx4BI")
  			 (VNx8DI "VNx2BI") (VNx8DF "VNx2BI")])
  
  ;; ...and again in lower case.
! (define_mode_attr vpred [(VNx16QI "vnx16bi")
! 			 (VNx8HI "vnx8bi") (VNx8HF "vnx8bi")
! 			 (VNx4SI "vnx4bi") (VNx4SF "vnx4bi")
! 			 (VNx2DI "vnx2bi") (VNx2DF "vnx2bi")
  			 (VNx32QI "vnx16bi")
  			 (VNx16HI "vnx8bi") (VNx16HF "vnx8bi")
  			 (VNx8SI "vnx4bi") (VNx8SF "vnx4bi")
  			 (VNx4DI "vnx2bi") (VNx4DF "vnx2bi")
  			 (VNx48QI "vnx16bi")
  			 (VNx24HI "vnx8bi") (VNx24HF "vnx8bi")
  			 (VNx12SI "vnx4bi") (VNx12SF "vnx4bi")
  			 (VNx6DI "vnx2bi") (VNx6DF "vnx2bi")
  			 (VNx64QI "vnx16bi")
  			 (VNx32HI "vnx8bi") (VNx32HF "vnx4bi")
  			 (VNx16SI "vnx4bi") (VNx16SF "vnx4bi")
  			 (VNx8DI "vnx2bi") (VNx8DF "vnx2bi")])
  
  ;; On AArch64 the By element instruction doesn't have a 2S variant.
  ;; However because the instruction always selects a pair of values
  ;; The normal 3SAME instruction can be used here instead.
--- 1528,1672 ----
  ;; Width of 2nd and 3rd arguments to fp16 vector multiply add/sub
  (define_mode_attr VFMLA_W [(V2SF "V4HF") (V4SF "V8HF")])
  
+ ;; Width of 2nd and 3rd arguments to bf16 vector multiply add/sub
+ (define_mode_attr VBFMLA_W [(V2SF "V4BF") (V4SF "V8BF")])
+ 
  (define_mode_attr VFMLA_SEL_W [(V2SF "V2HF") (V4SF "V4HF")])
  
  (define_mode_attr f16quad [(V2SF "") (V4SF "q")])
  
+ (define_mode_attr isquadop [(V8QI "") (V16QI "q") (V4BF "") (V8BF "q")])
+ 
  (define_code_attr f16mac [(plus "a") (minus "s")])
  
  ;; Map smax to smin and umax to umin.
  (define_code_attr max_opp [(smax "smin") (umax "umin")])
  
+ ;; Same as above, but louder.
+ (define_code_attr MAX_OPP [(smax "SMIN") (umax "UMIN")])
+ 
  ;; The number of subvectors in an SVE_STRUCT.
  (define_mode_attr vector_count [(VNx32QI "2") (VNx16HI "2")
  				(VNx8SI  "2") (VNx4DI  "2")
+ 				(VNx16BF "2")
  				(VNx16HF "2") (VNx8SF  "2") (VNx4DF "2")
  				(VNx48QI "3") (VNx24HI "3")
  				(VNx12SI "3") (VNx6DI  "3")
+ 				(VNx24BF "3")
  				(VNx24HF "3") (VNx12SF "3") (VNx6DF "3")
  				(VNx64QI "4") (VNx32HI "4")
  				(VNx16SI "4") (VNx8DI  "4")
+ 				(VNx32BF "4")
  				(VNx32HF "4") (VNx16SF "4") (VNx8DF "4")])
  
  ;; The number of instruction bytes needed for an SVE_STRUCT move.  This is
  ;; equal to vector_count * 4.
  (define_mode_attr insn_length [(VNx32QI "8")  (VNx16HI "8")
  			       (VNx8SI  "8")  (VNx4DI  "8")
+ 			       (VNx16BF "8")
  			       (VNx16HF "8")  (VNx8SF  "8")  (VNx4DF "8")
  			       (VNx48QI "12") (VNx24HI "12")
  			       (VNx12SI "12") (VNx6DI  "12")
+ 			       (VNx24BF "12")
  			       (VNx24HF "12") (VNx12SF "12") (VNx6DF "12")
  			       (VNx64QI "16") (VNx32HI "16")
  			       (VNx16SI "16") (VNx8DI  "16")
+ 			       (VNx32BF "16")
  			       (VNx32HF "16") (VNx16SF "16") (VNx8DF "16")])
  
  ;; The type of a subvector in an SVE_STRUCT.
  (define_mode_attr VSINGLE [(VNx32QI "VNx16QI")
  			   (VNx16HI "VNx8HI") (VNx16HF "VNx8HF")
+ 			   (VNx16BF "VNx8BF")
  			   (VNx8SI "VNx4SI") (VNx8SF "VNx4SF")
  			   (VNx4DI "VNx2DI") (VNx4DF "VNx2DF")
  			   (VNx48QI "VNx16QI")
  			   (VNx24HI "VNx8HI") (VNx24HF "VNx8HF")
+ 			   (VNx24BF "VNx8BF")
  			   (VNx12SI "VNx4SI") (VNx12SF "VNx4SF")
  			   (VNx6DI "VNx2DI") (VNx6DF "VNx2DF")
  			   (VNx64QI "VNx16QI")
  			   (VNx32HI "VNx8HI") (VNx32HF "VNx8HF")
+ 			   (VNx32BF "VNx8BF")
  			   (VNx16SI "VNx4SI") (VNx16SF "VNx4SF")
  			   (VNx8DI "VNx2DI") (VNx8DF "VNx2DF")])
  
  ;; ...and again in lower case.
  (define_mode_attr vsingle [(VNx32QI "vnx16qi")
  			   (VNx16HI "vnx8hi") (VNx16HF "vnx8hf")
+ 			   (VNx16BF "vnx8bf")
  			   (VNx8SI "vnx4si") (VNx8SF "vnx4sf")
  			   (VNx4DI "vnx2di") (VNx4DF "vnx2df")
  			   (VNx48QI "vnx16qi")
  			   (VNx24HI "vnx8hi") (VNx24HF "vnx8hf")
+ 			   (VNx24BF "vnx8bf")
  			   (VNx12SI "vnx4si") (VNx12SF "vnx4sf")
  			   (VNx6DI "vnx2di") (VNx6DF "vnx2df")
  			   (VNx64QI "vnx16qi")
  			   (VNx32HI "vnx8hi") (VNx32HF "vnx8hf")
+ 			   (VNx32BF "vnx8bf")
  			   (VNx16SI "vnx4si") (VNx16SF "vnx4sf")
  			   (VNx8DI "vnx2di") (VNx8DF "vnx2df")])
  
  ;; The predicate mode associated with an SVE data mode.  For structure modes
  ;; this is equivalent to the <VPRED> of the subvector mode.
! (define_mode_attr VPRED [(VNx16QI "VNx16BI") (VNx8QI "VNx8BI")
! 			 (VNx4QI "VNx4BI") (VNx2QI "VNx2BI")
! 			 (VNx8HI "VNx8BI") (VNx4HI "VNx4BI") (VNx2HI "VNx2BI")
! 			 (VNx8HF "VNx8BI") (VNx4HF "VNx4BI") (VNx2HF "VNx2BI")
! 			 (VNx8BF "VNx8BI")
! 			 (VNx4SI "VNx4BI") (VNx2SI "VNx2BI")
! 			 (VNx4SF "VNx4BI") (VNx2SF "VNx2BI")
! 			 (VNx2DI "VNx2BI")
! 			 (VNx2DF "VNx2BI")
  			 (VNx32QI "VNx16BI")
  			 (VNx16HI "VNx8BI") (VNx16HF "VNx8BI")
+ 			 (VNx16BF "VNx8BI")
  			 (VNx8SI "VNx4BI") (VNx8SF "VNx4BI")
  			 (VNx4DI "VNx2BI") (VNx4DF "VNx2BI")
  			 (VNx48QI "VNx16BI")
  			 (VNx24HI "VNx8BI") (VNx24HF "VNx8BI")
+ 			 (VNx24BF "VNx8BI")
  			 (VNx12SI "VNx4BI") (VNx12SF "VNx4BI")
  			 (VNx6DI "VNx2BI") (VNx6DF "VNx2BI")
  			 (VNx64QI "VNx16BI")
  			 (VNx32HI "VNx8BI") (VNx32HF "VNx8BI")
+ 			 (VNx32BF "VNx8BI")
  			 (VNx16SI "VNx4BI") (VNx16SF "VNx4BI")
  			 (VNx8DI "VNx2BI") (VNx8DF "VNx2BI")])
  
  ;; ...and again in lower case.
! (define_mode_attr vpred [(VNx16QI "vnx16bi") (VNx8QI "vnx8bi")
! 			 (VNx4QI "vnx4bi") (VNx2QI "vnx2bi")
! 			 (VNx8HI "vnx8bi") (VNx4HI "vnx4bi") (VNx2HI "vnx2bi")
! 			 (VNx8HF "vnx8bi") (VNx4HF "vnx4bi") (VNx2HF "vnx2bi")
! 			 (VNx8BF "vnx8bi")
! 			 (VNx4SI "vnx4bi") (VNx2SI "vnx2bi")
! 			 (VNx4SF "vnx4bi") (VNx2SF "vnx2bi")
! 			 (VNx2DI "vnx2bi")
! 			 (VNx2DF "vnx2bi")
  			 (VNx32QI "vnx16bi")
  			 (VNx16HI "vnx8bi") (VNx16HF "vnx8bi")
+ 			 (VNx16BF "vnx8bi")
  			 (VNx8SI "vnx4bi") (VNx8SF "vnx4bi")
  			 (VNx4DI "vnx2bi") (VNx4DF "vnx2bi")
  			 (VNx48QI "vnx16bi")
  			 (VNx24HI "vnx8bi") (VNx24HF "vnx8bi")
+ 			 (VNx24BF "vnx8bi")
  			 (VNx12SI "vnx4bi") (VNx12SF "vnx4bi")
  			 (VNx6DI "vnx2bi") (VNx6DF "vnx2bi")
  			 (VNx64QI "vnx16bi")
  			 (VNx32HI "vnx8bi") (VNx32HF "vnx4bi")
+ 			 (VNx32BF "vnx8bi")
  			 (VNx16SI "vnx4bi") (VNx16SF "vnx4bi")
  			 (VNx8DI "vnx2bi") (VNx8DF "vnx2bi")])
  
+ (define_mode_attr VDOUBLE [(VNx16QI "VNx32QI")
+ 			   (VNx8HI "VNx16HI") (VNx8HF "VNx16HF")
+ 			   (VNx8BF "VNx16BF")
+ 			   (VNx4SI "VNx8SI") (VNx4SF "VNx8SF")
+ 			   (VNx2DI "VNx4DI") (VNx2DF "VNx4DF")])
+ 
  ;; On AArch64 the By element instruction doesn't have a 2S variant.
  ;; However because the instruction always selects a pair of values
  ;; The normal 3SAME instruction can be used here instead.
***************
*** 1150,1155 ****
--- 1674,1704 ----
  				    (V4HF "<Vetype>[%4]") (V8HF "<Vetype>[%4]")
  				    ])
  
+ ;; The number of bytes controlled by a predicate
+ (define_mode_attr data_bytes [(VNx16BI "1") (VNx8BI "2")
+ 			      (VNx4BI "4") (VNx2BI "8")])
+ 
+ ;; Two-nybble mask for partial vector modes: nunits, byte size.
+ (define_mode_attr self_mask [(VNx8QI "0x81")
+ 			     (VNx4QI "0x41")
+ 			     (VNx2QI "0x21")
+ 			     (VNx4HI "0x42")
+ 			     (VNx2HI "0x22")
+ 			     (VNx2SI "0x24")])
+ 
+ ;; For SVE_HSDI vector modes, the mask of narrower modes, encoded as above.
+ (define_mode_attr narrower_mask [(VNx8HI "0x81") (VNx4HI "0x41")
+ 				 (VNx2HI "0x21")
+ 				 (VNx4SI "0x43") (VNx2SI "0x23")
+ 				 (VNx2DI "0x27")])
+ 
+ ;; The constraint to use for an SVE [SU]DOT, FMUL, FMLA or FMLS lane index.
+ (define_mode_attr sve_lane_con [(VNx8HI "y") (VNx4SI "y") (VNx2DI "x")
+ 				(VNx8HF "y") (VNx4SF "y") (VNx2DF "x")])
+ 
+ ;; The constraint to use for an SVE FCMLA lane index.
+ (define_mode_attr sve_lane_pair_con [(VNx8HF "y") (VNx4SF "x")])
+ 
  ;; -------------------------------------------------------------------
  ;; Code Iterators
  ;; -------------------------------------------------------------------
***************
*** 1160,1165 ****
--- 1709,1716 ----
  ;; This code iterator allows the shifts supported in arithmetic instructions
  (define_code_iterator ASHIFT [ashift ashiftrt lshiftrt])
  
+ (define_code_iterator SHIFTRT [ashiftrt lshiftrt])
+ 
  ;; Code iterator for logical operations
  (define_code_iterator LOGICAL [and ior xor])
  
***************
*** 1174,1179 ****
--- 1725,1731 ----
  
  ;; Code iterator for sign/zero extension
  (define_code_iterator ANY_EXTEND [sign_extend zero_extend])
+ (define_code_iterator ANY_EXTEND2 [sign_extend zero_extend])
  
  ;; All division operations (signed/unsigned)
  (define_code_iterator ANY_DIV [div udiv])
***************
*** 1206,1212 ****
  ;; Signed and unsigned max operations.
  (define_code_iterator USMAX [smax umax])
  
! ;; Code iterator for variants of vector max and min.
  (define_code_iterator ADDSUB [plus minus])
  
  ;; Code iterator for variants of vector saturating binary ops.
--- 1758,1764 ----
  ;; Signed and unsigned max operations.
  (define_code_iterator USMAX [smax umax])
  
! ;; Code iterator for plus and minus.
  (define_code_iterator ADDSUB [plus minus])
  
  ;; Code iterator for variants of vector saturating binary ops.
***************
*** 1218,1223 ****
--- 1770,1790 ----
  ;; Code iterator for signed variants of vector saturating binary ops.
  (define_code_iterator SBINQOPS [ss_plus ss_minus])
  
+ ;; Code iterator for unsigned variants of vector saturating binary ops.
+ (define_code_iterator UBINQOPS [us_plus us_minus])
+ 
+ ;; Modular and saturating addition.
+ (define_code_iterator ANY_PLUS [plus ss_plus us_plus])
+ 
+ ;; Saturating addition.
+ (define_code_iterator SAT_PLUS [ss_plus us_plus])
+ 
+ ;; Modular and saturating subtraction.
+ (define_code_iterator ANY_MINUS [minus ss_minus us_minus])
+ 
+ ;; Saturating subtraction.
+ (define_code_iterator SAT_MINUS [ss_minus us_minus])
+ 
  ;; Comparison operators for <F>CM.
  (define_code_iterator COMPARISONS [lt le eq ge gt])
  
***************
*** 1228,1254 ****
  (define_code_iterator FAC_COMPARISONS [lt le ge gt])
  
  ;; SVE integer unary operations.
! (define_code_iterator SVE_INT_UNARY [abs neg not popcount])
! 
! ;; SVE floating-point unary operations.
! (define_code_iterator SVE_FP_UNARY [abs neg sqrt])
  
  ;; SVE integer binary operations.
  (define_code_iterator SVE_INT_BINARY [plus minus mult smax umax smin umin
! 				      and ior xor])
  
  ;; SVE integer binary division operations.
  (define_code_iterator SVE_INT_BINARY_SD [div udiv])
  
  ;; SVE floating-point operations with an unpredicated all-register form.
  (define_code_iterator SVE_UNPRED_FP_BINARY [plus minus mult])
  
  ;; SVE integer comparisons.
  (define_code_iterator SVE_INT_CMP [lt le eq ne ge gt ltu leu geu gtu])
  
- ;; SVE floating-point comparisons.
- (define_code_iterator SVE_FP_CMP [lt le eq ne ge gt])
- 
  ;; -------------------------------------------------------------------
  ;; Code Attributes
  ;; -------------------------------------------------------------------
--- 1795,1825 ----
  (define_code_iterator FAC_COMPARISONS [lt le ge gt])
  
  ;; SVE integer unary operations.
! (define_code_iterator SVE_INT_UNARY [abs neg not clrsb clz popcount
! 				     (ss_abs "TARGET_SVE2")
! 				     (ss_neg "TARGET_SVE2")])
  
  ;; SVE integer binary operations.
  (define_code_iterator SVE_INT_BINARY [plus minus mult smax umax smin umin
! 				      ashift ashiftrt lshiftrt
! 				      and ior xor
! 				      (ss_plus "TARGET_SVE2")
! 				      (us_plus "TARGET_SVE2")
! 				      (ss_minus "TARGET_SVE2")
! 				      (us_minus "TARGET_SVE2")])
  
  ;; SVE integer binary division operations.
  (define_code_iterator SVE_INT_BINARY_SD [div udiv])
  
+ ;; SVE integer binary operations that have an immediate form.
+ (define_code_iterator SVE_INT_BINARY_IMM [mult smax smin umax umin])
+ 
  ;; SVE floating-point operations with an unpredicated all-register form.
  (define_code_iterator SVE_UNPRED_FP_BINARY [plus minus mult])
  
  ;; SVE integer comparisons.
  (define_code_iterator SVE_INT_CMP [lt le eq ne ge gt ltu leu geu gtu])
  
  ;; -------------------------------------------------------------------
  ;; Code Attributes
  ;; -------------------------------------------------------------------
***************
*** 1265,1270 ****
--- 1836,1843 ----
  			 (unsigned_fix "fixuns")
  			 (float "float")
  			 (unsigned_float "floatuns")
+ 			 (clrsb "clrsb")
+ 			 (clz "clz")
  			 (popcount "popcount")
  			 (and "and")
  			 (ior "ior")
***************
*** 1276,1285 ****
  			 (mult "mul")
  			 (div "div")
  			 (udiv "udiv")
! 			 (ss_plus "qadd")
! 			 (us_plus "qadd")
! 			 (ss_minus "qsub")
! 			 (us_minus "qsub")
  			 (ss_neg "qneg")
  			 (ss_abs "qabs")
  			 (smin "smin")
--- 1849,1858 ----
  			 (mult "mul")
  			 (div "div")
  			 (udiv "udiv")
! 			 (ss_plus "ssadd")
! 			 (us_plus "usadd")
! 			 (ss_minus "sssub")
! 			 (us_minus "ussub")
  			 (ss_neg "qneg")
  			 (ss_abs "qabs")
  			 (smin "smin")
***************
*** 1296,1303 ****
  			 (leu "leu")
  			 (geu "geu")
  			 (gtu "gtu")
! 			 (abs "abs")
! 			 (sqrt "sqrt")])
  
  ;; For comparison operators we use the FCM* and CM* instructions.
  ;; As there are no CMLE or CMLT instructions which act on 3 vector
--- 1869,1880 ----
  			 (leu "leu")
  			 (geu "geu")
  			 (gtu "gtu")
! 			 (abs "abs")])
! 
! (define_code_attr addsub [(ss_plus "add")
! 			  (us_plus "add")
! 			  (ss_minus "sub")
! 			  (us_minus "sub")])
  
  ;; For comparison operators we use the FCM* and CM* instructions.
  ;; As there are no CMLE or CMLT instructions which act on 3 vector
***************
*** 1342,1347 ****
--- 1919,1927 ----
  (define_code_attr shift [(ashift "lsl") (ashiftrt "asr")
  			 (lshiftrt "lsr") (rotatert "ror")])
  
+ ;; Op prefix for shift right and accumulate.
+ (define_code_attr sra_op [(ashiftrt "s") (lshiftrt "u")])
+ 
  ;; Map shift operators onto underlying bit-field instructions
  (define_code_attr bfshift [(ashift "ubfiz") (ashiftrt "sbfx")
  			   (lshiftrt "ubfx") (rotatert "extr")])
***************
*** 1366,1371 ****
--- 1946,1960 ----
  		      (smax "s") (umax "u")
  		      (smin "s") (umin "u")])
  
+ ;; "s" for signed ops, empty for unsigned ones.
+ (define_code_attr s [(sign_extend "s") (zero_extend "")])
+ 
+ ;; Map signed/unsigned ops to the corresponding extension.
+ (define_code_attr paired_extend [(ss_plus "sign_extend")
+ 				 (us_plus "zero_extend")
+ 				 (ss_minus "sign_extend")
+ 				 (us_minus "zero_extend")])
+ 
  ;; Whether a shift is left or right.
  (define_code_attr lr [(ashift "l") (ashiftrt "r") (lshiftrt "r")])
  
***************
*** 1426,1460 ****
  			      (smax "smax")
  			      (umin "umin")
  			      (umax "umax")
  			      (and "and")
  			      (ior "orr")
  			      (xor "eor")
  			      (not "not")
! 			      (popcount "cnt")])
  
  (define_code_attr sve_int_op_rev [(plus "add")
! 			          (minus "subr")
! 			          (mult "mul")
! 			          (div "sdivr")
! 			          (udiv "udivr")
! 			          (smin "smin")
! 			          (smax "smax")
! 			          (umin "umin")
! 			          (umax "umax")
! 			          (and "and")
! 			          (ior "orr")
! 			          (xor "eor")])
  
  ;; The floating-point SVE instruction that implements an rtx code.
  (define_code_attr sve_fp_op [(plus "fadd")
  			     (minus "fsub")
! 			     (mult "fmul")
! 			     (neg "fneg")
! 			     (abs "fabs")
! 			     (sqrt "fsqrt")])
  
  ;; The SVE immediate constraint to use for an rtl code.
! (define_code_attr sve_imm_con [(eq "vsc")
  			       (ne "vsc")
  			       (lt "vsc")
  			       (ge "vsc")
--- 2015,2069 ----
  			      (smax "smax")
  			      (umin "umin")
  			      (umax "umax")
+ 			      (ashift "lsl")
+ 			      (ashiftrt "asr")
+ 			      (lshiftrt "lsr")
  			      (and "and")
  			      (ior "orr")
  			      (xor "eor")
  			      (not "not")
! 			      (clrsb "cls")
! 			      (clz "clz")
! 			      (popcount "cnt")
! 			      (ss_plus "sqadd")
! 			      (us_plus "uqadd")
! 			      (ss_minus "sqsub")
! 			      (us_minus "uqsub")
! 			      (ss_neg "sqneg")
! 			      (ss_abs "sqabs")])
  
  (define_code_attr sve_int_op_rev [(plus "add")
! 				  (minus "subr")
! 				  (mult "mul")
! 				  (div "sdivr")
! 				  (udiv "udivr")
! 				  (smin "smin")
! 				  (smax "smax")
! 				  (umin "umin")
! 				  (umax "umax")
! 				  (ashift "lslr")
! 				  (ashiftrt "asrr")
! 				  (lshiftrt "lsrr")
! 				  (and "and")
! 				  (ior "orr")
! 				  (xor "eor")
! 				  (ss_plus "sqadd")
! 				  (us_plus "uqadd")
! 				  (ss_minus "sqsubr")
! 				  (us_minus "uqsubr")])
  
  ;; The floating-point SVE instruction that implements an rtx code.
  (define_code_attr sve_fp_op [(plus "fadd")
  			     (minus "fsub")
! 			     (mult "fmul")])
  
  ;; The SVE immediate constraint to use for an rtl code.
! (define_code_attr sve_imm_con [(mult "vsm")
! 			       (smax "vsm")
! 			       (smin "vsm")
! 			       (umax "vsb")
! 			       (umin "vsb")
! 			       (eq "vsc")
  			       (ne "vsc")
  			       (lt "vsc")
  			       (ge "vsc")
***************
*** 1465,1470 ****
--- 2074,2110 ----
  			       (geu "vsd")
  			       (gtu "vsd")])
  
+ ;; The prefix letter to use when printing an immediate operand.
+ (define_code_attr sve_imm_prefix [(mult "")
+ 				  (smax "")
+ 				  (smin "")
+ 				  (umax "D")
+ 				  (umin "D")])
+ 
+ ;; The predicate to use for the second input operand in a cond_<optab><mode>
+ ;; pattern.
+ (define_code_attr sve_pred_int_rhs2_operand
+   [(plus "register_operand")
+    (minus "register_operand")
+    (mult "register_operand")
+    (smax "register_operand")
+    (umax "register_operand")
+    (smin "register_operand")
+    (umin "register_operand")
+    (ashift "aarch64_sve_lshift_operand")
+    (ashiftrt "aarch64_sve_rshift_operand")
+    (lshiftrt "aarch64_sve_rshift_operand")
+    (and "aarch64_sve_pred_and_operand")
+    (ior "register_operand")
+    (xor "register_operand")
+    (ss_plus "register_operand")
+    (us_plus "register_operand")
+    (ss_minus "register_operand")
+    (us_minus "register_operand")])
+ 
+ (define_code_attr inc_dec [(minus "dec") (ss_minus "sqdec") (us_minus "uqdec")
+ 			   (plus "inc") (ss_plus "sqinc") (us_plus "uqinc")])
+ 
  ;; -------------------------------------------------------------------
  ;; Int Iterators.
  ;; -------------------------------------------------------------------
***************
*** 1484,1504 ****
  (define_int_iterator FMAXMINV [UNSPEC_FMAXV UNSPEC_FMINV
  			       UNSPEC_FMAXNMV UNSPEC_FMINNMV])
  
! (define_int_iterator BITWISEV [UNSPEC_ANDV UNSPEC_IORV UNSPEC_XORV])
  
  (define_int_iterator LOGICALF [UNSPEC_ANDF UNSPEC_IORF UNSPEC_XORF])
  
  (define_int_iterator HADDSUB [UNSPEC_SHADD UNSPEC_UHADD
  			      UNSPEC_SRHADD UNSPEC_URHADD
! 			      UNSPEC_SHSUB UNSPEC_UHSUB
! 			      UNSPEC_SRHSUB UNSPEC_URHSUB])
  
  (define_int_iterator HADD [UNSPEC_SHADD UNSPEC_UHADD])
  
  (define_int_iterator RHADD [UNSPEC_SRHADD UNSPEC_URHADD])
  
  (define_int_iterator DOTPROD [UNSPEC_SDOT UNSPEC_UDOT])
  
  (define_int_iterator ADDSUBHN [UNSPEC_ADDHN UNSPEC_RADDHN
  			       UNSPEC_SUBHN UNSPEC_RSUBHN])
  
--- 2124,2148 ----
  (define_int_iterator FMAXMINV [UNSPEC_FMAXV UNSPEC_FMINV
  			       UNSPEC_FMAXNMV UNSPEC_FMINNMV])
  
! (define_int_iterator SVE_INT_ADDV [UNSPEC_SADDV UNSPEC_UADDV])
  
  (define_int_iterator LOGICALF [UNSPEC_ANDF UNSPEC_IORF UNSPEC_XORF])
  
  (define_int_iterator HADDSUB [UNSPEC_SHADD UNSPEC_UHADD
  			      UNSPEC_SRHADD UNSPEC_URHADD
! 			      UNSPEC_SHSUB UNSPEC_UHSUB])
  
  (define_int_iterator HADD [UNSPEC_SHADD UNSPEC_UHADD])
  
  (define_int_iterator RHADD [UNSPEC_SRHADD UNSPEC_URHADD])
  
+ (define_int_iterator BSL_DUP [1 2])
+ 
  (define_int_iterator DOTPROD [UNSPEC_SDOT UNSPEC_UDOT])
  
+ (define_int_iterator DOTPROD_I8MM [UNSPEC_USDOT UNSPEC_SUDOT])
+ (define_int_iterator DOTPROD_US_ONLY [UNSPEC_USDOT])
+ 
  (define_int_iterator ADDSUBHN [UNSPEC_ADDHN UNSPEC_RADDHN
  			       UNSPEC_SUBHN UNSPEC_RSUBHN])
  
***************
*** 1508,1519 ****
  (define_int_iterator FMAXMIN_UNS [UNSPEC_FMAX UNSPEC_FMIN
  				  UNSPEC_FMAXNM UNSPEC_FMINNM])
  
! (define_int_iterator PAUTH_LR_SP [UNSPEC_PACISP UNSPEC_AUTISP])
  
! (define_int_iterator PAUTH_17_16 [UNSPEC_PACI1716 UNSPEC_AUTI1716])
  
  (define_int_iterator VQDMULH [UNSPEC_SQDMULH UNSPEC_SQRDMULH])
  
  (define_int_iterator USSUQADD [UNSPEC_SUQADD UNSPEC_USQADD])
  
  (define_int_iterator SUQMOVN [UNSPEC_SQXTN UNSPEC_UQXTN])
--- 2152,2168 ----
  (define_int_iterator FMAXMIN_UNS [UNSPEC_FMAX UNSPEC_FMIN
  				  UNSPEC_FMAXNM UNSPEC_FMINNM])
  
! (define_int_iterator PAUTH_LR_SP [UNSPEC_PACIASP UNSPEC_AUTIASP
! 				  UNSPEC_PACIBSP UNSPEC_AUTIBSP])
  
! (define_int_iterator PAUTH_17_16 [UNSPEC_PACIA1716 UNSPEC_AUTIA1716
! 				  UNSPEC_PACIB1716 UNSPEC_AUTIB1716])
  
  (define_int_iterator VQDMULH [UNSPEC_SQDMULH UNSPEC_SQRDMULH])
  
+ (define_int_iterator MULHRS [UNSPEC_SMULHS UNSPEC_UMULHS
+                              UNSPEC_SMULHRS UNSPEC_UMULHRS])
+ 
  (define_int_iterator USSUQADD [UNSPEC_SUQADD UNSPEC_USQADD])
  
  (define_int_iterator SUQMOVN [UNSPEC_SQXTN UNSPEC_UQXTN])
***************
*** 1547,1552 ****
--- 2196,2205 ----
  			      UNSPEC_TRN1 UNSPEC_TRN2
  			      UNSPEC_UZP1 UNSPEC_UZP2])
  
+ (define_int_iterator PERMUTEQ [UNSPEC_ZIP1Q UNSPEC_ZIP2Q
+ 			       UNSPEC_TRN1Q UNSPEC_TRN2Q
+ 			       UNSPEC_UZP1Q UNSPEC_UZP2Q])
+ 
  (define_int_iterator OPTAB_PERMUTE [UNSPEC_ZIP1 UNSPEC_ZIP2
  				    UNSPEC_UZP1 UNSPEC_UZP2])
  
***************
*** 1593,1610 ****
  
  (define_int_iterator MUL_HIGHPART [UNSPEC_SMUL_HIGHPART UNSPEC_UMUL_HIGHPART])
  
! (define_int_iterator SVE_COND_FP_BINARY [UNSPEC_COND_ADD UNSPEC_COND_SUB
! 					 UNSPEC_COND_MUL UNSPEC_COND_DIV
! 					 UNSPEC_COND_MAX UNSPEC_COND_MIN])
  
  (define_int_iterator SVE_COND_FP_TERNARY [UNSPEC_COND_FMLA
  					  UNSPEC_COND_FMLS
  					  UNSPEC_COND_FNMLA
  					  UNSPEC_COND_FNMLS])
  
! (define_int_iterator SVE_COND_FP_CMP [UNSPEC_COND_LT UNSPEC_COND_LE
! 				      UNSPEC_COND_EQ UNSPEC_COND_NE
! 				      UNSPEC_COND_GE UNSPEC_COND_GT])
  
  (define_int_iterator FCADD [UNSPEC_FCADD90
  			    UNSPEC_FCADD270])
--- 2246,2653 ----
  
  (define_int_iterator MUL_HIGHPART [UNSPEC_SMUL_HIGHPART UNSPEC_UMUL_HIGHPART])
  
! (define_int_iterator CLAST [UNSPEC_CLASTA UNSPEC_CLASTB])
! 
! (define_int_iterator LAST [UNSPEC_LASTA UNSPEC_LASTB])
! 
! (define_int_iterator SVE_INT_UNARY [UNSPEC_RBIT UNSPEC_REVB
! 				    UNSPEC_REVH UNSPEC_REVW])
! 
! (define_int_iterator SVE_FP_UNARY [UNSPEC_FRECPE UNSPEC_RSQRTE])
! 
! (define_int_iterator SVE_FP_UNARY_INT [UNSPEC_FEXPA])
! 
! (define_int_iterator SVE_INT_SHIFT_IMM [UNSPEC_ASRD
! 					(UNSPEC_SQSHLU "TARGET_SVE2")
! 					(UNSPEC_SRSHR "TARGET_SVE2")
! 					(UNSPEC_URSHR "TARGET_SVE2")])
! 
! (define_int_iterator SVE_FP_BINARY [UNSPEC_FRECPS UNSPEC_RSQRTS])
! 
! (define_int_iterator SVE_FP_BINARY_INT [UNSPEC_FTSMUL UNSPEC_FTSSEL])
! 
! (define_int_iterator SVE_BFLOAT_TERNARY_LONG [UNSPEC_BFDOT
! 					      UNSPEC_BFMLALB
! 					      UNSPEC_BFMLALT
! 					      UNSPEC_BFMMLA])
! 
! (define_int_iterator SVE_BFLOAT_TERNARY_LONG_LANE [UNSPEC_BFDOT
! 						   UNSPEC_BFMLALB
! 						   UNSPEC_BFMLALT])
! 
! (define_int_iterator SVE_INT_REDUCTION [UNSPEC_ANDV
! 					UNSPEC_IORV
! 					UNSPEC_SMAXV
! 					UNSPEC_SMINV
! 					UNSPEC_UMAXV
! 					UNSPEC_UMINV
! 					UNSPEC_XORV])
! 
! (define_int_iterator SVE_FP_REDUCTION [UNSPEC_FADDV
! 				       UNSPEC_FMAXV
! 				       UNSPEC_FMAXNMV
! 				       UNSPEC_FMINV
! 				       UNSPEC_FMINNMV])
! 
! (define_int_iterator SVE_COND_FP_UNARY [UNSPEC_COND_FABS
! 					UNSPEC_COND_FNEG
! 					UNSPEC_COND_FRECPX
! 					UNSPEC_COND_FRINTA
! 					UNSPEC_COND_FRINTI
! 					UNSPEC_COND_FRINTM
! 					UNSPEC_COND_FRINTN
! 					UNSPEC_COND_FRINTP
! 					UNSPEC_COND_FRINTX
! 					UNSPEC_COND_FRINTZ
! 					UNSPEC_COND_FSQRT])
! 
! ;; Same as SVE_COND_FP_UNARY, but without codes that have a dedicated
! ;; <optab><mode>2 expander.
! (define_int_iterator SVE_COND_FP_UNARY_OPTAB [UNSPEC_COND_FABS
! 					      UNSPEC_COND_FNEG
! 					      UNSPEC_COND_FRECPX
! 					      UNSPEC_COND_FRINTA
! 					      UNSPEC_COND_FRINTI
! 					      UNSPEC_COND_FRINTM
! 					      UNSPEC_COND_FRINTN
! 					      UNSPEC_COND_FRINTP
! 					      UNSPEC_COND_FRINTX
! 					      UNSPEC_COND_FRINTZ])
! 
! (define_int_iterator SVE_COND_FCVT [UNSPEC_COND_FCVT])
! (define_int_iterator SVE_COND_FCVTI [UNSPEC_COND_FCVTZS UNSPEC_COND_FCVTZU])
! (define_int_iterator SVE_COND_ICVTF [UNSPEC_COND_SCVTF UNSPEC_COND_UCVTF])
! 
! (define_int_iterator SVE_COND_FP_BINARY [UNSPEC_COND_FADD
! 					 UNSPEC_COND_FDIV
! 					 UNSPEC_COND_FMAX
! 					 UNSPEC_COND_FMAXNM
! 					 UNSPEC_COND_FMIN
! 					 UNSPEC_COND_FMINNM
! 					 UNSPEC_COND_FMUL
! 					 UNSPEC_COND_FMULX
! 					 UNSPEC_COND_FSUB])
! 
! ;; Same as SVE_COND_FP_BINARY, but without codes that have a dedicated
! ;; <optab><mode>3 expander.
! (define_int_iterator SVE_COND_FP_BINARY_OPTAB [UNSPEC_COND_FADD
! 					       UNSPEC_COND_FMAX
! 					       UNSPEC_COND_FMAXNM
! 					       UNSPEC_COND_FMIN
! 					       UNSPEC_COND_FMINNM
! 					       UNSPEC_COND_FMUL
! 					       UNSPEC_COND_FMULX
! 					       UNSPEC_COND_FSUB])
! 
! (define_int_iterator SVE_COND_FP_BINARY_INT [UNSPEC_COND_FSCALE])
! 
! (define_int_iterator SVE_COND_FP_ADD [UNSPEC_COND_FADD])
! (define_int_iterator SVE_COND_FP_SUB [UNSPEC_COND_FSUB])
! (define_int_iterator SVE_COND_FP_MUL [UNSPEC_COND_FMUL])
! 
! (define_int_iterator SVE_COND_FP_BINARY_I1 [UNSPEC_COND_FMAX
! 					    UNSPEC_COND_FMAXNM
! 					    UNSPEC_COND_FMIN
! 					    UNSPEC_COND_FMINNM
! 					    UNSPEC_COND_FMUL])
! 
! (define_int_iterator SVE_COND_FP_BINARY_REG [UNSPEC_COND_FDIV
! 					     UNSPEC_COND_FMULX])
! 
! (define_int_iterator SVE_COND_FCADD [UNSPEC_COND_FCADD90
! 				     UNSPEC_COND_FCADD270])
! 
! (define_int_iterator SVE_COND_FP_MAXMIN [UNSPEC_COND_FMAX
! 					 UNSPEC_COND_FMAXNM
! 					 UNSPEC_COND_FMIN
! 					 UNSPEC_COND_FMINNM])
! 
! ;; Floating-point max/min operations that correspond to optabs,
! ;; as opposed to those that are internal to the port.
! (define_int_iterator SVE_COND_FP_MAXMIN_PUBLIC [UNSPEC_COND_FMAXNM
! 						UNSPEC_COND_FMINNM])
  
  (define_int_iterator SVE_COND_FP_TERNARY [UNSPEC_COND_FMLA
  					  UNSPEC_COND_FMLS
  					  UNSPEC_COND_FNMLA
  					  UNSPEC_COND_FNMLS])
  
! (define_int_iterator SVE_COND_FCMLA [UNSPEC_COND_FCMLA
! 				     UNSPEC_COND_FCMLA90
! 				     UNSPEC_COND_FCMLA180
! 				     UNSPEC_COND_FCMLA270])
! 
! (define_int_iterator SVE_COND_INT_CMP_WIDE [UNSPEC_COND_CMPEQ_WIDE
! 					    UNSPEC_COND_CMPGE_WIDE
! 					    UNSPEC_COND_CMPGT_WIDE
! 					    UNSPEC_COND_CMPHI_WIDE
! 					    UNSPEC_COND_CMPHS_WIDE
! 					    UNSPEC_COND_CMPLE_WIDE
! 					    UNSPEC_COND_CMPLO_WIDE
! 					    UNSPEC_COND_CMPLS_WIDE
! 					    UNSPEC_COND_CMPLT_WIDE
! 					    UNSPEC_COND_CMPNE_WIDE])
! 
! ;; SVE FP comparisons that accept #0.0.
! (define_int_iterator SVE_COND_FP_CMP_I0 [UNSPEC_COND_FCMEQ
! 					 UNSPEC_COND_FCMGE
! 					 UNSPEC_COND_FCMGT
! 					 UNSPEC_COND_FCMLE
! 					 UNSPEC_COND_FCMLT
! 					 UNSPEC_COND_FCMNE])
! 
! (define_int_iterator SVE_COND_FP_ABS_CMP [UNSPEC_COND_FCMGE
! 					  UNSPEC_COND_FCMGT
! 					  UNSPEC_COND_FCMLE
! 					  UNSPEC_COND_FCMLT])
! 
! (define_int_iterator SVE_FP_TERNARY_LANE [UNSPEC_FMLA UNSPEC_FMLS])
! 
! (define_int_iterator SVE_CFP_TERNARY_LANE [UNSPEC_FCMLA UNSPEC_FCMLA90
! 					   UNSPEC_FCMLA180 UNSPEC_FCMLA270])
! 
! (define_int_iterator SVE_WHILE [UNSPEC_WHILELE UNSPEC_WHILELO
! 				UNSPEC_WHILELS UNSPEC_WHILELT
! 				(UNSPEC_WHILEGE "TARGET_SVE2")
! 				(UNSPEC_WHILEGT "TARGET_SVE2")
! 				(UNSPEC_WHILEHI "TARGET_SVE2")
! 				(UNSPEC_WHILEHS "TARGET_SVE2")
! 				(UNSPEC_WHILERW "TARGET_SVE2")
! 				(UNSPEC_WHILEWR "TARGET_SVE2")])
! 
! (define_int_iterator SVE2_WHILE_PTR [UNSPEC_WHILERW UNSPEC_WHILEWR])
! 
! (define_int_iterator SVE_SHIFT_WIDE [UNSPEC_ASHIFT_WIDE
! 				     UNSPEC_ASHIFTRT_WIDE
! 				     UNSPEC_LSHIFTRT_WIDE])
! 
! (define_int_iterator SVE_LDFF1_LDNF1 [UNSPEC_LDFF1 UNSPEC_LDNF1])
! 
! (define_int_iterator SVE2_U32_UNARY [UNSPEC_URECPE UNSPEC_RSQRTE])
! 
! (define_int_iterator SVE2_INT_UNARY_NARROWB [UNSPEC_SQXTNB
! 					     UNSPEC_SQXTUNB
! 					     UNSPEC_UQXTNB])
! 
! (define_int_iterator SVE2_INT_UNARY_NARROWT [UNSPEC_SQXTNT
! 					     UNSPEC_SQXTUNT
! 					     UNSPEC_UQXTNT])
! 
! (define_int_iterator SVE2_INT_BINARY [UNSPEC_SQDMULH
! 				      UNSPEC_SQRDMULH])
! 
! (define_int_iterator SVE2_INT_BINARY_LANE [UNSPEC_SQDMULH
! 					   UNSPEC_SQRDMULH])
! 
! (define_int_iterator SVE2_INT_BINARY_LONG [UNSPEC_SABDLB
! 					   UNSPEC_SABDLT
! 					   UNSPEC_SADDLB
! 					   UNSPEC_SADDLBT
! 					   UNSPEC_SADDLT
! 					   UNSPEC_SMULLB
! 					   UNSPEC_SMULLT
! 					   UNSPEC_SQDMULLB
! 					   UNSPEC_SQDMULLT
! 					   UNSPEC_SSUBLB
! 					   UNSPEC_SSUBLBT
! 					   UNSPEC_SSUBLT
! 					   UNSPEC_SSUBLTB
! 					   UNSPEC_UABDLB
! 					   UNSPEC_UABDLT
! 					   UNSPEC_UADDLB
! 					   UNSPEC_UADDLT
! 					   UNSPEC_UMULLB
! 					   UNSPEC_UMULLT
! 					   UNSPEC_USUBLB
! 					   UNSPEC_USUBLT])
! 
! (define_int_iterator SVE2_INT_BINARY_LONG_LANE [UNSPEC_SMULLB
! 						UNSPEC_SMULLT
! 						UNSPEC_SQDMULLB
! 						UNSPEC_SQDMULLT
! 						UNSPEC_UMULLB
! 						UNSPEC_UMULLT])
! 
! (define_int_iterator SVE2_INT_BINARY_NARROWB [UNSPEC_ADDHNB
! 					      UNSPEC_RADDHNB
! 					      UNSPEC_RSUBHNB
! 					      UNSPEC_SUBHNB])
! 
! (define_int_iterator SVE2_INT_BINARY_NARROWT [UNSPEC_ADDHNT
! 					      UNSPEC_RADDHNT
! 					      UNSPEC_RSUBHNT
! 					      UNSPEC_SUBHNT])
! 
! (define_int_iterator SVE2_INT_BINARY_PAIR [UNSPEC_ADDP
! 					   UNSPEC_SMAXP
! 					   UNSPEC_SMINP
! 					   UNSPEC_UMAXP
! 					   UNSPEC_UMINP])
! 
! (define_int_iterator SVE2_FP_BINARY_PAIR [UNSPEC_FADDP
! 					  UNSPEC_FMAXP
! 					  UNSPEC_FMAXNMP
! 					  UNSPEC_FMINP
! 					  UNSPEC_FMINNMP])
! 
! (define_int_iterator SVE2_INT_BINARY_PAIR_LONG [UNSPEC_SADALP UNSPEC_UADALP])
! 
! (define_int_iterator SVE2_INT_BINARY_WIDE [UNSPEC_SADDWB
! 					   UNSPEC_SADDWT
! 					   UNSPEC_SSUBWB
! 					   UNSPEC_SSUBWT
! 					   UNSPEC_UADDWB
! 					   UNSPEC_UADDWT
! 					   UNSPEC_USUBWB
! 					   UNSPEC_USUBWT])
! 
! (define_int_iterator SVE2_INT_SHIFT_IMM_LONG [UNSPEC_SSHLLB
! 					      UNSPEC_SSHLLT
! 					      UNSPEC_USHLLB
! 					      UNSPEC_USHLLT])
! 
! (define_int_iterator SVE2_INT_SHIFT_IMM_NARROWB [UNSPEC_RSHRNB
! 						 UNSPEC_SHRNB
! 						 UNSPEC_SQRSHRNB
! 						 UNSPEC_SQRSHRUNB
! 						 UNSPEC_SQSHRNB
! 						 UNSPEC_SQSHRUNB
! 						 UNSPEC_UQRSHRNB
! 						 UNSPEC_UQSHRNB])
! 
! (define_int_iterator SVE2_INT_SHIFT_IMM_NARROWT [UNSPEC_RSHRNT
! 						 UNSPEC_SHRNT
! 						 UNSPEC_SQRSHRNT
! 						 UNSPEC_SQRSHRUNT
! 						 UNSPEC_SQSHRNT
! 						 UNSPEC_SQSHRUNT
! 						 UNSPEC_UQRSHRNT
! 						 UNSPEC_UQSHRNT])
! 
! (define_int_iterator SVE2_INT_SHIFT_INSERT [UNSPEC_SLI UNSPEC_SRI])
! 
! (define_int_iterator SVE2_INT_CADD [UNSPEC_CADD90
! 				    UNSPEC_CADD270
! 				    UNSPEC_SQCADD90
! 				    UNSPEC_SQCADD270])
! 
! (define_int_iterator SVE2_INT_BITPERM [UNSPEC_BDEP UNSPEC_BEXT UNSPEC_BGRP])
! 
! (define_int_iterator SVE2_INT_TERNARY [UNSPEC_ADCLB
! 				       UNSPEC_ADCLT
! 				       UNSPEC_EORBT
! 				       UNSPEC_EORTB
! 				       UNSPEC_SBCLB
! 				       UNSPEC_SBCLT
! 				       UNSPEC_SQRDMLAH
! 				       UNSPEC_SQRDMLSH])
! 
! (define_int_iterator SVE2_INT_TERNARY_LANE [UNSPEC_SQRDMLAH
! 					    UNSPEC_SQRDMLSH])
! 
! (define_int_iterator SVE2_FP_TERNARY_LONG [UNSPEC_FMLALB
! 					   UNSPEC_FMLALT
! 					   UNSPEC_FMLSLB
! 					   UNSPEC_FMLSLT])
! 
! (define_int_iterator SVE2_FP_TERNARY_LONG_LANE [UNSPEC_FMLALB
! 						UNSPEC_FMLALT
! 						UNSPEC_FMLSLB
! 						UNSPEC_FMLSLT])
! 
! (define_int_iterator SVE2_INT_CMLA [UNSPEC_CMLA
! 				    UNSPEC_CMLA90
! 				    UNSPEC_CMLA180
! 				    UNSPEC_CMLA270
! 				    UNSPEC_SQRDCMLAH
! 				    UNSPEC_SQRDCMLAH90
! 				    UNSPEC_SQRDCMLAH180
! 				    UNSPEC_SQRDCMLAH270])
! 
! (define_int_iterator SVE2_INT_CDOT [UNSPEC_CDOT
! 				    UNSPEC_CDOT90
! 				    UNSPEC_CDOT180
! 				    UNSPEC_CDOT270])
! 
! (define_int_iterator SVE2_INT_ADD_BINARY_LONG [UNSPEC_SABDLB
! 					       UNSPEC_SABDLT
! 					       UNSPEC_SMULLB
! 					       UNSPEC_SMULLT
! 					       UNSPEC_UABDLB
! 					       UNSPEC_UABDLT
! 					       UNSPEC_UMULLB
! 					       UNSPEC_UMULLT])
! 
! (define_int_iterator SVE2_INT_QADD_BINARY_LONG [UNSPEC_SQDMULLB
! 					        UNSPEC_SQDMULLBT
! 					        UNSPEC_SQDMULLT])
! 
! (define_int_iterator SVE2_INT_SUB_BINARY_LONG [UNSPEC_SMULLB
! 					       UNSPEC_SMULLT
! 					       UNSPEC_UMULLB
! 					       UNSPEC_UMULLT])
! 
! (define_int_iterator SVE2_INT_QSUB_BINARY_LONG [UNSPEC_SQDMULLB
! 					        UNSPEC_SQDMULLBT
! 					        UNSPEC_SQDMULLT])
! 
! (define_int_iterator SVE2_INT_ADD_BINARY_LONG_LANE [UNSPEC_SMULLB
! 						    UNSPEC_SMULLT
! 						    UNSPEC_UMULLB
! 						    UNSPEC_UMULLT])
! 
! (define_int_iterator SVE2_INT_QADD_BINARY_LONG_LANE [UNSPEC_SQDMULLB
! 						     UNSPEC_SQDMULLT])
! 
! (define_int_iterator SVE2_INT_SUB_BINARY_LONG_LANE [UNSPEC_SMULLB
! 						    UNSPEC_SMULLT
! 						    UNSPEC_UMULLB
! 						    UNSPEC_UMULLT])
! 
! (define_int_iterator SVE2_INT_QSUB_BINARY_LONG_LANE [UNSPEC_SQDMULLB
! 						     UNSPEC_SQDMULLT])
! 
! (define_int_iterator SVE2_COND_INT_UNARY_FP [UNSPEC_COND_FLOGB])
! 
! (define_int_iterator SVE2_COND_FP_UNARY_LONG [UNSPEC_COND_FCVTLT])
! 
! (define_int_iterator SVE2_COND_FP_UNARY_NARROWB [UNSPEC_COND_FCVTX])
! 
! (define_int_iterator SVE2_COND_INT_BINARY [UNSPEC_SHADD
! 					   UNSPEC_SHSUB
! 					   UNSPEC_SQRSHL
! 					   UNSPEC_SRHADD
! 					   UNSPEC_SRSHL
! 					   UNSPEC_SUQADD
! 					   UNSPEC_UHADD
! 					   UNSPEC_UHSUB
! 					   UNSPEC_UQRSHL
! 					   UNSPEC_URHADD
! 					   UNSPEC_URSHL
! 					   UNSPEC_USQADD])
! 
! (define_int_iterator SVE2_COND_INT_BINARY_NOREV [UNSPEC_SUQADD
! 						 UNSPEC_USQADD])
! 
! (define_int_iterator SVE2_COND_INT_BINARY_REV [UNSPEC_SHADD
! 					       UNSPEC_SHSUB
! 					       UNSPEC_SQRSHL
! 					       UNSPEC_SRHADD
! 					       UNSPEC_SRSHL
! 					       UNSPEC_UHADD
! 					       UNSPEC_UHSUB
! 					       UNSPEC_UQRSHL
! 					       UNSPEC_URHADD
! 					       UNSPEC_URSHL])
! 
! (define_int_iterator SVE2_COND_INT_SHIFT [UNSPEC_SQSHL
! 					  UNSPEC_UQSHL])
! 
! (define_int_iterator SVE2_MATCH [UNSPEC_MATCH UNSPEC_NMATCH])
! 
! (define_int_iterator SVE2_PMULL [UNSPEC_PMULLB UNSPEC_PMULLT])
! 
! (define_int_iterator SVE2_PMULL_PAIR [UNSPEC_PMULLB_PAIR UNSPEC_PMULLT_PAIR])
  
  (define_int_iterator FCADD [UNSPEC_FCADD90
  			    UNSPEC_FCADD270])
***************
*** 1614,1619 ****
--- 2657,2679 ----
  			    UNSPEC_FCMLA180
  			    UNSPEC_FCMLA270])
  
+ (define_int_iterator FRINTNZX [UNSPEC_FRINT32Z UNSPEC_FRINT32X
+ 			       UNSPEC_FRINT64Z UNSPEC_FRINT64X])
+ 
+ (define_int_iterator SVE_BRK_UNARY [UNSPEC_BRKA UNSPEC_BRKB])
+ 
+ (define_int_iterator SVE_BRK_BINARY [UNSPEC_BRKN UNSPEC_BRKPA UNSPEC_BRKPB])
+ 
+ (define_int_iterator SVE_PITER [UNSPEC_PFIRST UNSPEC_PNEXT])
+ 
+ (define_int_iterator MATMUL [UNSPEC_SMATMUL UNSPEC_UMATMUL
+ 			     UNSPEC_USMATMUL])
+ 
+ (define_int_iterator FMMLA [UNSPEC_FMMLA])
+ 
+ (define_int_iterator BF_MLA [UNSPEC_BFMLALB
+ 			     UNSPEC_BFMLALT])
+ 
  ;; Iterators for atomic operations.
  
  (define_int_iterator ATOMIC_LDOP
***************
*** 1638,1656 ****
  (define_int_attr optab [(UNSPEC_ANDF "and")
  			(UNSPEC_IORF "ior")
  			(UNSPEC_XORF "xor")
  			(UNSPEC_ANDV "and")
  			(UNSPEC_IORV "ior")
  			(UNSPEC_XORV "xor")
! 			(UNSPEC_COND_ADD "add")
! 			(UNSPEC_COND_SUB "sub")
! 			(UNSPEC_COND_MUL "mul")
! 			(UNSPEC_COND_DIV "div")
! 			(UNSPEC_COND_MAX "smax")
! 			(UNSPEC_COND_MIN "smin")
  			(UNSPEC_COND_FMLA "fma")
  			(UNSPEC_COND_FMLS "fnma")
  			(UNSPEC_COND_FNMLA "fnms")
! 			(UNSPEC_COND_FNMLS "fms")])
  
  (define_int_attr  maxmin_uns [(UNSPEC_UMAXV "umax")
  			      (UNSPEC_UMINV "umin")
--- 2698,2803 ----
  (define_int_attr optab [(UNSPEC_ANDF "and")
  			(UNSPEC_IORF "ior")
  			(UNSPEC_XORF "xor")
+ 			(UNSPEC_SADDV "sadd")
+ 			(UNSPEC_UADDV "uadd")
  			(UNSPEC_ANDV "and")
  			(UNSPEC_IORV "ior")
  			(UNSPEC_XORV "xor")
! 			(UNSPEC_FRECPE "frecpe")
! 			(UNSPEC_FRECPS "frecps")
! 			(UNSPEC_RSQRTE "frsqrte")
! 			(UNSPEC_RSQRTS "frsqrts")
! 			(UNSPEC_RBIT "rbit")
! 			(UNSPEC_REVB "revb")
! 			(UNSPEC_REVH "revh")
! 			(UNSPEC_REVW "revw")
! 			(UNSPEC_UMAXV "umax")
! 			(UNSPEC_UMINV "umin")
! 			(UNSPEC_SMAXV "smax")
! 			(UNSPEC_SMINV "smin")
! 			(UNSPEC_CADD90 "cadd90")
! 			(UNSPEC_CADD270 "cadd270")
! 			(UNSPEC_CDOT "cdot")
! 			(UNSPEC_CDOT90 "cdot90")
! 			(UNSPEC_CDOT180 "cdot180")
! 			(UNSPEC_CDOT270 "cdot270")
! 			(UNSPEC_CMLA "cmla")
! 			(UNSPEC_CMLA90 "cmla90")
! 			(UNSPEC_CMLA180 "cmla180")
! 			(UNSPEC_CMLA270 "cmla270")
! 			(UNSPEC_FADDV "plus")
! 			(UNSPEC_FMAXNMV "smax")
! 			(UNSPEC_FMAXV "smax_nan")
! 			(UNSPEC_FMINNMV "smin")
! 			(UNSPEC_FMINV "smin_nan")
! 		        (UNSPEC_SMUL_HIGHPART "smulh")
! 		        (UNSPEC_UMUL_HIGHPART "umulh")
! 			(UNSPEC_FMLA "fma")
! 			(UNSPEC_FMLS "fnma")
! 			(UNSPEC_FCMLA "fcmla")
! 			(UNSPEC_FCMLA90 "fcmla90")
! 			(UNSPEC_FCMLA180 "fcmla180")
! 			(UNSPEC_FCMLA270 "fcmla270")
! 			(UNSPEC_FEXPA "fexpa")
! 			(UNSPEC_FTSMUL "ftsmul")
! 			(UNSPEC_FTSSEL "ftssel")
! 			(UNSPEC_PMULLB "pmullb")
! 			(UNSPEC_PMULLB_PAIR "pmullb_pair")
! 			(UNSPEC_PMULLT "pmullt")
! 			(UNSPEC_PMULLT_PAIR "pmullt_pair")
! 			(UNSPEC_SMATMUL "smatmul")
! 			(UNSPEC_SQCADD90 "sqcadd90")
! 			(UNSPEC_SQCADD270 "sqcadd270")
! 			(UNSPEC_SQRDCMLAH "sqrdcmlah")
! 			(UNSPEC_SQRDCMLAH90 "sqrdcmlah90")
! 			(UNSPEC_SQRDCMLAH180 "sqrdcmlah180")
! 			(UNSPEC_SQRDCMLAH270 "sqrdcmlah270")
! 			(UNSPEC_TRN1Q "trn1q")
! 			(UNSPEC_TRN2Q "trn2q")
! 			(UNSPEC_UMATMUL "umatmul")
! 			(UNSPEC_USMATMUL "usmatmul")
! 			(UNSPEC_UZP1Q "uzp1q")
! 			(UNSPEC_UZP2Q "uzp2q")
! 			(UNSPEC_WHILERW "vec_check_raw_alias")
! 			(UNSPEC_WHILEWR "vec_check_war_alias")
! 			(UNSPEC_ZIP1Q "zip1q")
! 			(UNSPEC_ZIP2Q "zip2q")
! 			(UNSPEC_COND_FABS "abs")
! 			(UNSPEC_COND_FADD "add")
! 			(UNSPEC_COND_FCADD90 "cadd90")
! 			(UNSPEC_COND_FCADD270 "cadd270")
! 			(UNSPEC_COND_FCMLA "fcmla")
! 			(UNSPEC_COND_FCMLA90 "fcmla90")
! 			(UNSPEC_COND_FCMLA180 "fcmla180")
! 			(UNSPEC_COND_FCMLA270 "fcmla270")
! 			(UNSPEC_COND_FCVT "fcvt")
! 			(UNSPEC_COND_FCVTZS "fix_trunc")
! 			(UNSPEC_COND_FCVTZU "fixuns_trunc")
! 			(UNSPEC_COND_FDIV "div")
! 			(UNSPEC_COND_FMAX "smax_nan")
! 			(UNSPEC_COND_FMAXNM "smax")
! 			(UNSPEC_COND_FMIN "smin_nan")
! 			(UNSPEC_COND_FMINNM "smin")
  			(UNSPEC_COND_FMLA "fma")
  			(UNSPEC_COND_FMLS "fnma")
+ 			(UNSPEC_COND_FMUL "mul")
+ 			(UNSPEC_COND_FMULX "mulx")
+ 			(UNSPEC_COND_FNEG "neg")
  			(UNSPEC_COND_FNMLA "fnms")
! 			(UNSPEC_COND_FNMLS "fms")
! 			(UNSPEC_COND_FRECPX "frecpx")
! 			(UNSPEC_COND_FRINTA "round")
! 			(UNSPEC_COND_FRINTI "nearbyint")
! 			(UNSPEC_COND_FRINTM "floor")
! 			(UNSPEC_COND_FRINTN "frintn")
! 			(UNSPEC_COND_FRINTP "ceil")
! 			(UNSPEC_COND_FRINTX "rint")
! 			(UNSPEC_COND_FRINTZ "btrunc")
! 			(UNSPEC_COND_FSCALE "fscale")
! 			(UNSPEC_COND_FSQRT "sqrt")
! 			(UNSPEC_COND_FSUB "sub")
! 			(UNSPEC_COND_SCVTF "float")
! 			(UNSPEC_COND_UCVTF "floatuns")])
  
  (define_int_attr  maxmin_uns [(UNSPEC_UMAXV "umax")
  			      (UNSPEC_UMINV "umin")
***************
*** 1663,1669 ****
  			      (UNSPEC_FMINNMV "smin")
  			      (UNSPEC_FMINV "smin_nan")
  			      (UNSPEC_FMAXNM "fmax")
! 			      (UNSPEC_FMINNM "fmin")])
  
  (define_int_attr  maxmin_uns_op [(UNSPEC_UMAXV "umax")
  				 (UNSPEC_UMINV "umin")
--- 2810,2820 ----
  			      (UNSPEC_FMINNMV "smin")
  			      (UNSPEC_FMINV "smin_nan")
  			      (UNSPEC_FMAXNM "fmax")
! 			      (UNSPEC_FMINNM "fmin")
! 			      (UNSPEC_COND_FMAX "fmax_nan")
! 			      (UNSPEC_COND_FMAXNM "fmax")
! 			      (UNSPEC_COND_FMIN "fmin_nan")
! 			      (UNSPEC_COND_FMINNM "fmin")])
  
  (define_int_attr  maxmin_uns_op [(UNSPEC_UMAXV "umax")
  				 (UNSPEC_UMINV "umin")
***************
*** 1678,1704 ****
  				 (UNSPEC_FMAXNM "fmaxnm")
  				 (UNSPEC_FMINNM "fminnm")])
  
! (define_int_attr bit_reduc_op [(UNSPEC_ANDV "andv")
! 			       (UNSPEC_IORV "orv")
! 			       (UNSPEC_XORV "eorv")])
  
  ;; The SVE logical instruction that implements an unspec.
  (define_int_attr logicalf_op [(UNSPEC_ANDF "and")
  		 	      (UNSPEC_IORF "orr")
  			      (UNSPEC_XORF "eor")])
  
  ;; "s" for signed operations and "u" for unsigned ones.
! (define_int_attr su [(UNSPEC_UNPACKSHI "s")
  		     (UNSPEC_UNPACKUHI "u")
  		     (UNSPEC_UNPACKSLO "s")
  		     (UNSPEC_UNPACKULO "u")
  		     (UNSPEC_SMUL_HIGHPART "s")
! 		     (UNSPEC_UMUL_HIGHPART "u")])
  
  (define_int_attr sur [(UNSPEC_SHADD "s") (UNSPEC_UHADD "u")
  		      (UNSPEC_SRHADD "sr") (UNSPEC_URHADD "ur")
  		      (UNSPEC_SHSUB "s") (UNSPEC_UHSUB "u")
- 		      (UNSPEC_SRHSUB "sr") (UNSPEC_URHSUB "ur")
  		      (UNSPEC_ADDHN "") (UNSPEC_RADDHN "r")
  		      (UNSPEC_SABAL "s") (UNSPEC_UABAL "u")
  		      (UNSPEC_SABDL2 "s") (UNSPEC_UABDL2 "u")
--- 2829,2871 ----
  				 (UNSPEC_FMAXNM "fmaxnm")
  				 (UNSPEC_FMINNM "fminnm")])
  
! (define_code_attr binqops_op [(ss_plus "sqadd")
! 			      (us_plus "uqadd")
! 			      (ss_minus "sqsub")
! 			      (us_minus "uqsub")])
! 
! (define_code_attr binqops_op_rev [(ss_plus "sqsub")
! 				  (ss_minus "sqadd")])
  
  ;; The SVE logical instruction that implements an unspec.
  (define_int_attr logicalf_op [(UNSPEC_ANDF "and")
  		 	      (UNSPEC_IORF "orr")
  			      (UNSPEC_XORF "eor")])
  
+ (define_int_attr last_op [(UNSPEC_CLASTA "after_last")
+ 			  (UNSPEC_CLASTB "last")
+ 			  (UNSPEC_LASTA "after_last")
+ 			  (UNSPEC_LASTB "last")])
+ 
  ;; "s" for signed operations and "u" for unsigned ones.
! (define_int_attr su [(UNSPEC_SADDV "s")
! 		     (UNSPEC_UADDV "u")
! 		     (UNSPEC_UNPACKSHI "s")
  		     (UNSPEC_UNPACKUHI "u")
  		     (UNSPEC_UNPACKSLO "s")
  		     (UNSPEC_UNPACKULO "u")
  		     (UNSPEC_SMUL_HIGHPART "s")
! 		     (UNSPEC_UMUL_HIGHPART "u")
! 		     (UNSPEC_COND_FCVTZS "s")
! 		     (UNSPEC_COND_FCVTZU "u")
! 		     (UNSPEC_COND_SCVTF "s")
! 		     (UNSPEC_COND_UCVTF "u")
! 		     (UNSPEC_SMULHS "s") (UNSPEC_UMULHS "u")
! 		     (UNSPEC_SMULHRS "s") (UNSPEC_UMULHRS "u")])
  
  (define_int_attr sur [(UNSPEC_SHADD "s") (UNSPEC_UHADD "u")
  		      (UNSPEC_SRHADD "sr") (UNSPEC_URHADD "ur")
  		      (UNSPEC_SHSUB "s") (UNSPEC_UHSUB "u")
  		      (UNSPEC_ADDHN "") (UNSPEC_RADDHN "r")
  		      (UNSPEC_SABAL "s") (UNSPEC_UABAL "u")
  		      (UNSPEC_SABDL2 "s") (UNSPEC_UABDL2 "u")
***************
*** 1723,1728 ****
--- 2890,2898 ----
  		      (UNSPEC_URSHL  "ur") (UNSPEC_SRSHL  "sr")
  		      (UNSPEC_UQRSHL  "u") (UNSPEC_SQRSHL  "s")
  		      (UNSPEC_SDOT "s") (UNSPEC_UDOT "u")
+ 		      (UNSPEC_USDOT "us") (UNSPEC_SUDOT "su")
+ 		      (UNSPEC_SMATMUL "s") (UNSPEC_UMATMUL "u")
+ 		      (UNSPEC_USMATMUL "us")
  ])
  
  (define_int_attr r [(UNSPEC_SQDMULH "") (UNSPEC_SQRDMULH "r")
***************
*** 1731,1740 ****
                      (UNSPEC_SQRSHRN "r") (UNSPEC_UQRSHRN "r")
                      (UNSPEC_SQSHL   "")  (UNSPEC_UQSHL  "")
                      (UNSPEC_SQRSHL   "r")(UNSPEC_UQRSHL  "r")
  ])
  
  (define_int_attr lr [(UNSPEC_SSLI  "l") (UNSPEC_USLI  "l")
! 		     (UNSPEC_SSRI  "r") (UNSPEC_USRI  "r")])
  
  (define_int_attr u [(UNSPEC_SQSHLU "u") (UNSPEC_SQSHL "") (UNSPEC_UQSHL "")
  		    (UNSPEC_SQSHRUN "u") (UNSPEC_SQRSHRUN "u")
--- 2901,2917 ----
                      (UNSPEC_SQRSHRN "r") (UNSPEC_UQRSHRN "r")
                      (UNSPEC_SQSHL   "")  (UNSPEC_UQSHL  "")
                      (UNSPEC_SQRSHL   "r")(UNSPEC_UQRSHL  "r")
+ 		    (UNSPEC_SMULHS "") (UNSPEC_UMULHS "")
+ 		    (UNSPEC_SMULHRS "r") (UNSPEC_UMULHRS "r")
  ])
  
  (define_int_attr lr [(UNSPEC_SSLI  "l") (UNSPEC_USLI  "l")
! 		     (UNSPEC_SSRI  "r") (UNSPEC_USRI  "r")
! 		     (UNSPEC_SQSHL "l") (UNSPEC_UQSHL "l")
! 		     (UNSPEC_SQSHLU "l")
! 		     (UNSPEC_SRSHR "r") (UNSPEC_URSHR "r")
! 		     (UNSPEC_ASRD  "r")
! 		     (UNSPEC_SLI   "l") (UNSPEC_SRI   "r")])
  
  (define_int_attr u [(UNSPEC_SQSHLU "u") (UNSPEC_SQSHL "") (UNSPEC_UQSHL "")
  		    (UNSPEC_SQSHRUN "u") (UNSPEC_SQRSHRUN "u")
***************
*** 1743,1756 ****
  		    (UNSPEC_SHADD "") (UNSPEC_UHADD "u")
  		    (UNSPEC_SRHADD "") (UNSPEC_URHADD "u")])
  
  (define_int_attr addsub [(UNSPEC_SHADD "add")
  			 (UNSPEC_UHADD "add")
  			 (UNSPEC_SRHADD "add")
  			 (UNSPEC_URHADD "add")
  			 (UNSPEC_SHSUB "sub")
  			 (UNSPEC_UHSUB "sub")
- 			 (UNSPEC_SRHSUB "sub")
- 			 (UNSPEC_URHSUB "sub")
  			 (UNSPEC_ADDHN "add")
  			 (UNSPEC_SUBHN "sub")
  			 (UNSPEC_RADDHN "add")
--- 2920,2938 ----
  		    (UNSPEC_SHADD "") (UNSPEC_UHADD "u")
  		    (UNSPEC_SRHADD "") (UNSPEC_URHADD "u")])
  
+ (define_int_attr fn [(UNSPEC_LDFF1 "f") (UNSPEC_LDNF1 "n")])
+ 
+ (define_int_attr ab [(UNSPEC_CLASTA "a") (UNSPEC_CLASTB "b")
+ 		     (UNSPEC_LASTA "a") (UNSPEC_LASTB "b")])
+ 
+ (define_int_attr bt [(UNSPEC_BFMLALB "b") (UNSPEC_BFMLALT "t")])
+ 
  (define_int_attr addsub [(UNSPEC_SHADD "add")
  			 (UNSPEC_UHADD "add")
  			 (UNSPEC_SRHADD "add")
  			 (UNSPEC_URHADD "add")
  			 (UNSPEC_SHSUB "sub")
  			 (UNSPEC_UHSUB "sub")
  			 (UNSPEC_ADDHN "add")
  			 (UNSPEC_SUBHN "sub")
  			 (UNSPEC_RADDHN "add")
***************
*** 1760,1765 ****
--- 2942,2959 ----
  			 (UNSPEC_RADDHN2 "add")
  			 (UNSPEC_RSUBHN2 "sub")])
  
+ ;; BSL variants: first commutative operand.
+ (define_int_attr bsl_1st [(1 "w") (2 "0")])
+ 
+ ;; BSL variants: second commutative operand.
+ (define_int_attr bsl_2nd [(1 "0") (2 "w")])
+ 
+ ;; BSL variants: duplicated input operand.
+ (define_int_attr bsl_dup [(1 "1") (2 "2")])
+ 
+ ;; BSL variants: operand which requires preserving via movprfx.
+ (define_int_attr bsl_mov [(1 "2") (2 "1")])
+ 
  (define_int_attr offsetlr [(UNSPEC_SSLI "") (UNSPEC_USLI "")
  			   (UNSPEC_SSRI "offset_")
  			   (UNSPEC_USRI "offset_")])
***************
*** 1789,1817 ****
  				  (UNSPEC_FCVTZU "fcvtzu")])
  
  ;; Pointer authentication mnemonic prefix.
! (define_int_attr pauth_mnem_prefix [(UNSPEC_PACISP "paci")
! 				    (UNSPEC_AUTISP "auti")
! 				    (UNSPEC_PACI1716 "paci")
! 				    (UNSPEC_AUTI1716 "auti")])
  
! ;; Pointer authentication HINT number for NOP space instructions using A Key.
! (define_int_attr pauth_hint_num_a [(UNSPEC_PACISP "25")
! 				    (UNSPEC_AUTISP "29")
! 				    (UNSPEC_PACI1716 "8")
! 				    (UNSPEC_AUTI1716 "12")])
  
! (define_int_attr perm_insn [(UNSPEC_ZIP1 "zip") (UNSPEC_ZIP2 "zip")
! 			    (UNSPEC_TRN1 "trn") (UNSPEC_TRN2 "trn")
! 			    (UNSPEC_UZP1 "uzp") (UNSPEC_UZP2 "uzp")])
  
  ; op code for REV instructions (size within which elements are reversed).
  (define_int_attr rev_op [(UNSPEC_REV64 "64") (UNSPEC_REV32 "32")
  			 (UNSPEC_REV16 "16")])
  
! (define_int_attr perm_hilo [(UNSPEC_ZIP1 "1") (UNSPEC_ZIP2 "2")
! 			    (UNSPEC_TRN1 "1") (UNSPEC_TRN2 "2")
! 			    (UNSPEC_UZP1 "1") (UNSPEC_UZP2 "2")
! 			    (UNSPEC_UNPACKSHI "hi") (UNSPEC_UNPACKUHI "hi")
  			    (UNSPEC_UNPACKSLO "lo") (UNSPEC_UNPACKULO "lo")])
  
  ;; Return true if the associated optab refers to the high-numbered lanes,
--- 2983,3029 ----
  				  (UNSPEC_FCVTZU "fcvtzu")])
  
  ;; Pointer authentication mnemonic prefix.
! (define_int_attr pauth_mnem_prefix [(UNSPEC_PACIASP "pacia")
! 				    (UNSPEC_PACIBSP "pacib")
! 				    (UNSPEC_PACIA1716 "pacia")
! 				    (UNSPEC_PACIB1716 "pacib")
! 				    (UNSPEC_AUTIASP "autia")
! 				    (UNSPEC_AUTIBSP "autib")
! 				    (UNSPEC_AUTIA1716 "autia")
! 				    (UNSPEC_AUTIB1716 "autib")])
  
! (define_int_attr pauth_key [(UNSPEC_PACIASP "AARCH64_KEY_A")
! 			    (UNSPEC_PACIBSP "AARCH64_KEY_B")
! 			    (UNSPEC_PACIA1716 "AARCH64_KEY_A")
! 			    (UNSPEC_PACIB1716 "AARCH64_KEY_B")
! 			    (UNSPEC_AUTIASP "AARCH64_KEY_A")
! 			    (UNSPEC_AUTIBSP "AARCH64_KEY_B")
! 			    (UNSPEC_AUTIA1716 "AARCH64_KEY_A")
! 			    (UNSPEC_AUTIB1716 "AARCH64_KEY_B")])
  
! ;; Pointer authentication HINT number for NOP space instructions using A and
! ;; B key.
! (define_int_attr pauth_hint_num [(UNSPEC_PACIASP "25")
! 				   (UNSPEC_PACIBSP "27")
! 				   (UNSPEC_AUTIASP "29")
! 				   (UNSPEC_AUTIBSP "31")
! 				   (UNSPEC_PACIA1716 "8")
! 				   (UNSPEC_PACIB1716 "10")
! 				   (UNSPEC_AUTIA1716 "12")
! 				   (UNSPEC_AUTIB1716 "14")])
! 
! (define_int_attr perm_insn [(UNSPEC_ZIP1 "zip1") (UNSPEC_ZIP2 "zip2")
! 			    (UNSPEC_ZIP1Q "zip1") (UNSPEC_ZIP2Q "zip2")
! 			    (UNSPEC_TRN1 "trn1") (UNSPEC_TRN2 "trn2")
! 			    (UNSPEC_TRN1Q "trn1") (UNSPEC_TRN2Q "trn2")
! 			    (UNSPEC_UZP1 "uzp1") (UNSPEC_UZP2 "uzp2")
! 			    (UNSPEC_UZP1Q "uzp1") (UNSPEC_UZP2Q "uzp2")])
  
  ; op code for REV instructions (size within which elements are reversed).
  (define_int_attr rev_op [(UNSPEC_REV64 "64") (UNSPEC_REV32 "32")
  			 (UNSPEC_REV16 "16")])
  
! (define_int_attr perm_hilo [(UNSPEC_UNPACKSHI "hi") (UNSPEC_UNPACKUHI "hi")
  			    (UNSPEC_UNPACKSLO "lo") (UNSPEC_UNPACKULO "lo")])
  
  ;; Return true if the associated optab refers to the high-numbered lanes,
***************
*** 1853,1886 ****
  (define_int_attr f16mac1 [(UNSPEC_FMLAL "a") (UNSPEC_FMLSL "s")
  			  (UNSPEC_FMLAL2 "a") (UNSPEC_FMLSL2 "s")])
  
  ;; The condition associated with an UNSPEC_COND_<xx>.
! (define_int_attr cmp_op [(UNSPEC_COND_LT "lt")
! 			 (UNSPEC_COND_LE "le")
! 			 (UNSPEC_COND_EQ "eq")
! 			 (UNSPEC_COND_NE "ne")
! 			 (UNSPEC_COND_GE "ge")
! 			 (UNSPEC_COND_GT "gt")])
  
! (define_int_attr sve_fp_op [(UNSPEC_COND_ADD "fadd")
! 			    (UNSPEC_COND_SUB "fsub")
! 			    (UNSPEC_COND_MUL "fmul")
! 			    (UNSPEC_COND_DIV "fdiv")
! 			    (UNSPEC_COND_MAX "fmaxnm")
! 			    (UNSPEC_COND_MIN "fminnm")])
  
! (define_int_attr sve_fp_op_rev [(UNSPEC_COND_ADD "fadd")
! 			        (UNSPEC_COND_SUB "fsubr")
! 			        (UNSPEC_COND_MUL "fmul")
! 			        (UNSPEC_COND_DIV "fdivr")
! 			        (UNSPEC_COND_MAX "fmaxnm")
! 			        (UNSPEC_COND_MIN "fminnm")])
  
! (define_int_attr rot [(UNSPEC_FCADD90 "90")
  		      (UNSPEC_FCADD270 "270")
  		      (UNSPEC_FCMLA "0")
  		      (UNSPEC_FCMLA90 "90")
  		      (UNSPEC_FCMLA180 "180")
! 		      (UNSPEC_FCMLA270 "270")])
  
  (define_int_attr sve_fmla_op [(UNSPEC_COND_FMLA "fmla")
  			      (UNSPEC_COND_FMLS "fmls")
--- 3065,3390 ----
  (define_int_attr f16mac1 [(UNSPEC_FMLAL "a") (UNSPEC_FMLSL "s")
  			  (UNSPEC_FMLAL2 "a") (UNSPEC_FMLSL2 "s")])
  
+ (define_int_attr frintnzs_op [(UNSPEC_FRINT32Z "frint32z") (UNSPEC_FRINT32X "frint32x")
+ 			      (UNSPEC_FRINT64Z "frint64z") (UNSPEC_FRINT64X "frint64x")])
+ 
  ;; The condition associated with an UNSPEC_COND_<xx>.
! (define_int_attr cmp_op [(UNSPEC_COND_CMPEQ_WIDE "eq")
! 			 (UNSPEC_COND_CMPGE_WIDE "ge")
! 			 (UNSPEC_COND_CMPGT_WIDE "gt")
! 			 (UNSPEC_COND_CMPHI_WIDE "hi")
! 			 (UNSPEC_COND_CMPHS_WIDE "hs")
! 			 (UNSPEC_COND_CMPLE_WIDE "le")
! 			 (UNSPEC_COND_CMPLO_WIDE "lo")
! 			 (UNSPEC_COND_CMPLS_WIDE "ls")
! 			 (UNSPEC_COND_CMPLT_WIDE "lt")
! 			 (UNSPEC_COND_CMPNE_WIDE "ne")
! 			 (UNSPEC_COND_FCMEQ "eq")
! 			 (UNSPEC_COND_FCMGE "ge")
! 			 (UNSPEC_COND_FCMGT "gt")
! 			 (UNSPEC_COND_FCMLE "le")
! 			 (UNSPEC_COND_FCMLT "lt")
! 			 (UNSPEC_COND_FCMNE "ne")
! 			 (UNSPEC_WHILEGE "ge")
! 			 (UNSPEC_WHILEGT "gt")
! 			 (UNSPEC_WHILEHI "hi")
! 			 (UNSPEC_WHILEHS "hs")
! 			 (UNSPEC_WHILELE "le")
! 			 (UNSPEC_WHILELO "lo")
! 			 (UNSPEC_WHILELS "ls")
! 			 (UNSPEC_WHILELT "lt")
! 			 (UNSPEC_WHILERW "rw")
! 			 (UNSPEC_WHILEWR "wr")])
  
! (define_int_attr while_optab_cmp [(UNSPEC_WHILEGE "ge")
! 				  (UNSPEC_WHILEGT "gt")
! 				  (UNSPEC_WHILEHI "ugt")
! 				  (UNSPEC_WHILEHS "uge")
! 				  (UNSPEC_WHILELE "le")
! 				  (UNSPEC_WHILELO "ult")
! 				  (UNSPEC_WHILELS "ule")
! 				  (UNSPEC_WHILELT "lt")
! 				  (UNSPEC_WHILERW "rw")
! 				  (UNSPEC_WHILEWR "wr")])
  
! (define_int_attr raw_war [(UNSPEC_WHILERW "raw")
! 			  (UNSPEC_WHILEWR "war")])
  
! (define_int_attr brk_op [(UNSPEC_BRKA "a") (UNSPEC_BRKB "b")
! 			 (UNSPEC_BRKN "n")
! 			 (UNSPEC_BRKPA "pa") (UNSPEC_BRKPB "pb")])
! 
! (define_int_attr sve_pred_op [(UNSPEC_PFIRST "pfirst") (UNSPEC_PNEXT "pnext")])
! 
! (define_int_attr sve_int_op [(UNSPEC_ADCLB "adclb")
! 			     (UNSPEC_ADCLT "adclt")
! 			     (UNSPEC_ADDHNB "addhnb")
! 			     (UNSPEC_ADDHNT "addhnt")
! 			     (UNSPEC_ADDP "addp")
! 			     (UNSPEC_ANDV "andv")
! 			     (UNSPEC_ASHIFTRT_WIDE "asr")
! 			     (UNSPEC_ASHIFT_WIDE "lsl")
! 			     (UNSPEC_ASRD "asrd")
! 			     (UNSPEC_BDEP "bdep")
! 			     (UNSPEC_BEXT "bext")
! 			     (UNSPEC_BGRP "bgrp")
! 			     (UNSPEC_CADD90 "cadd")
! 			     (UNSPEC_CADD270 "cadd")
! 			     (UNSPEC_CDOT "cdot")
! 			     (UNSPEC_CDOT90 "cdot")
! 			     (UNSPEC_CDOT180 "cdot")
! 			     (UNSPEC_CDOT270 "cdot")
! 			     (UNSPEC_CMLA "cmla")
! 			     (UNSPEC_CMLA90 "cmla")
! 			     (UNSPEC_CMLA180 "cmla")
! 			     (UNSPEC_CMLA270 "cmla")
! 			     (UNSPEC_EORBT "eorbt")
! 			     (UNSPEC_EORTB "eortb")
! 			     (UNSPEC_IORV "orv")
! 			     (UNSPEC_LSHIFTRT_WIDE "lsr")
! 			     (UNSPEC_MATCH "match")
! 			     (UNSPEC_NMATCH "nmatch")
! 			     (UNSPEC_PMULLB "pmullb")
! 			     (UNSPEC_PMULLB_PAIR "pmullb")
! 			     (UNSPEC_PMULLT "pmullt")
! 			     (UNSPEC_PMULLT_PAIR "pmullt")
! 			     (UNSPEC_RADDHNB "raddhnb")
! 			     (UNSPEC_RADDHNT "raddhnt")
! 			     (UNSPEC_RBIT "rbit")
! 			     (UNSPEC_REVB "revb")
! 			     (UNSPEC_REVH "revh")
! 			     (UNSPEC_REVW "revw")
! 			     (UNSPEC_RSHRNB "rshrnb")
! 			     (UNSPEC_RSHRNT "rshrnt")
! 			     (UNSPEC_RSQRTE "ursqrte")
! 			     (UNSPEC_RSUBHNB "rsubhnb")
! 			     (UNSPEC_RSUBHNT "rsubhnt")
! 			     (UNSPEC_SABDLB "sabdlb")
! 			     (UNSPEC_SABDLT "sabdlt")
! 			     (UNSPEC_SADALP "sadalp")
! 			     (UNSPEC_SADDLB "saddlb")
! 			     (UNSPEC_SADDLBT "saddlbt")
! 			     (UNSPEC_SADDLT "saddlt")
! 			     (UNSPEC_SADDWB "saddwb")
! 			     (UNSPEC_SADDWT "saddwt")
! 			     (UNSPEC_SBCLB "sbclb")
! 			     (UNSPEC_SBCLT "sbclt")
! 			     (UNSPEC_SHADD "shadd")
! 			     (UNSPEC_SHRNB "shrnb")
! 			     (UNSPEC_SHRNT "shrnt")
! 			     (UNSPEC_SHSUB "shsub")
! 			     (UNSPEC_SLI "sli")
! 			     (UNSPEC_SMAXP "smaxp")
! 			     (UNSPEC_SMAXV "smaxv")
! 			     (UNSPEC_SMINP "sminp")
! 			     (UNSPEC_SMINV "sminv")
! 			     (UNSPEC_SMUL_HIGHPART "smulh")
! 			     (UNSPEC_SMULLB "smullb")
! 			     (UNSPEC_SMULLT "smullt")
! 			     (UNSPEC_SQCADD90 "sqcadd")
! 			     (UNSPEC_SQCADD270 "sqcadd")
! 			     (UNSPEC_SQDMULH "sqdmulh")
! 			     (UNSPEC_SQDMULLB "sqdmullb")
! 			     (UNSPEC_SQDMULLBT "sqdmullbt")
! 			     (UNSPEC_SQDMULLT "sqdmullt")
! 			     (UNSPEC_SQRDCMLAH "sqrdcmlah")
! 			     (UNSPEC_SQRDCMLAH90 "sqrdcmlah")
! 			     (UNSPEC_SQRDCMLAH180 "sqrdcmlah")
! 			     (UNSPEC_SQRDCMLAH270 "sqrdcmlah")
! 			     (UNSPEC_SQRDMLAH "sqrdmlah")
! 			     (UNSPEC_SQRDMLSH "sqrdmlsh")
! 			     (UNSPEC_SQRDMULH "sqrdmulh")
! 			     (UNSPEC_SQRSHL "sqrshl")
! 			     (UNSPEC_SQRSHRNB "sqrshrnb")
! 			     (UNSPEC_SQRSHRNT "sqrshrnt")
! 			     (UNSPEC_SQRSHRUNB "sqrshrunb")
! 			     (UNSPEC_SQRSHRUNT "sqrshrunt")
! 			     (UNSPEC_SQSHL "sqshl")
! 			     (UNSPEC_SQSHLU "sqshlu")
! 			     (UNSPEC_SQSHRNB "sqshrnb")
! 			     (UNSPEC_SQSHRNT "sqshrnt")
! 			     (UNSPEC_SQSHRUNB "sqshrunb")
! 			     (UNSPEC_SQSHRUNT "sqshrunt")
! 			     (UNSPEC_SQXTNB "sqxtnb")
! 			     (UNSPEC_SQXTNT "sqxtnt")
! 			     (UNSPEC_SQXTUNB "sqxtunb")
! 			     (UNSPEC_SQXTUNT "sqxtunt")
! 			     (UNSPEC_SRHADD "srhadd")
! 			     (UNSPEC_SRI "sri")
! 			     (UNSPEC_SRSHL "srshl")
! 			     (UNSPEC_SRSHR "srshr")
! 			     (UNSPEC_SSHLLB "sshllb")
! 			     (UNSPEC_SSHLLT "sshllt")
! 			     (UNSPEC_SSUBLB "ssublb")
! 			     (UNSPEC_SSUBLBT "ssublbt")
! 			     (UNSPEC_SSUBLT "ssublt")
! 			     (UNSPEC_SSUBLTB "ssubltb")
! 			     (UNSPEC_SSUBWB "ssubwb")
! 			     (UNSPEC_SSUBWT "ssubwt")
! 			     (UNSPEC_SUBHNB "subhnb")
! 			     (UNSPEC_SUBHNT "subhnt")
! 			     (UNSPEC_SUQADD "suqadd")
! 			     (UNSPEC_UABDLB "uabdlb")
! 			     (UNSPEC_UABDLT "uabdlt")
! 			     (UNSPEC_UADALP "uadalp")
! 			     (UNSPEC_UADDLB "uaddlb")
! 			     (UNSPEC_UADDLT "uaddlt")
! 			     (UNSPEC_UADDWB "uaddwb")
! 			     (UNSPEC_UADDWT "uaddwt")
! 			     (UNSPEC_UHADD "uhadd")
! 			     (UNSPEC_UHSUB "uhsub")
! 			     (UNSPEC_UMAXP "umaxp")
! 			     (UNSPEC_UMAXV "umaxv")
! 			     (UNSPEC_UMINP "uminp")
! 			     (UNSPEC_UMINV "uminv")
! 			     (UNSPEC_UMUL_HIGHPART "umulh")
! 			     (UNSPEC_UMULLB "umullb")
! 			     (UNSPEC_UMULLT "umullt")
! 			     (UNSPEC_UQRSHL "uqrshl")
! 			     (UNSPEC_UQRSHRNB "uqrshrnb")
! 			     (UNSPEC_UQRSHRNT "uqrshrnt")
! 			     (UNSPEC_UQSHL "uqshl")
! 			     (UNSPEC_UQSHRNB "uqshrnb")
! 			     (UNSPEC_UQSHRNT "uqshrnt")
! 			     (UNSPEC_UQXTNB "uqxtnb")
! 			     (UNSPEC_UQXTNT "uqxtnt")
! 			     (UNSPEC_URECPE "urecpe")
! 			     (UNSPEC_URHADD "urhadd")
! 			     (UNSPEC_URSHL "urshl")
! 			     (UNSPEC_URSHR "urshr")
! 			     (UNSPEC_USHLLB "ushllb")
! 			     (UNSPEC_USHLLT "ushllt")
! 			     (UNSPEC_USQADD "usqadd")
! 			     (UNSPEC_USUBLB "usublb")
! 			     (UNSPEC_USUBLT "usublt")
! 			     (UNSPEC_USUBWB "usubwb")
! 			     (UNSPEC_USUBWT "usubwt")
! 			     (UNSPEC_XORV "eorv")])
! 
! (define_int_attr sve_int_op_rev [(UNSPEC_SHADD "shadd")
! 				 (UNSPEC_SHSUB "shsubr")
! 				 (UNSPEC_SQRSHL "sqrshlr")
! 				 (UNSPEC_SRHADD "srhadd")
! 				 (UNSPEC_SRSHL "srshlr")
! 				 (UNSPEC_UHADD "uhadd")
! 				 (UNSPEC_UHSUB "uhsubr")
! 				 (UNSPEC_UQRSHL "uqrshlr")
! 				 (UNSPEC_URHADD "urhadd")
! 				 (UNSPEC_URSHL "urshlr")])
! 
! (define_int_attr sve_int_add_op [(UNSPEC_SABDLB "sabalb")
! 				 (UNSPEC_SABDLT "sabalt")
! 				 (UNSPEC_SMULLB "smlalb")
! 				 (UNSPEC_SMULLT "smlalt")
! 				 (UNSPEC_UABDLB "uabalb")
! 				 (UNSPEC_UABDLT "uabalt")
! 				 (UNSPEC_UMULLB "umlalb")
! 				 (UNSPEC_UMULLT "umlalt")])
! 
! (define_int_attr sve_int_qadd_op [(UNSPEC_SQDMULLB "sqdmlalb")
! 				  (UNSPEC_SQDMULLBT "sqdmlalbt")
! 				  (UNSPEC_SQDMULLT "sqdmlalt")])
! 
! (define_int_attr sve_int_sub_op [(UNSPEC_SMULLB "smlslb")
! 				 (UNSPEC_SMULLT "smlslt")
! 				 (UNSPEC_UMULLB "umlslb")
! 				 (UNSPEC_UMULLT "umlslt")])
! 
! (define_int_attr sve_int_qsub_op [(UNSPEC_SQDMULLB "sqdmlslb")
! 				  (UNSPEC_SQDMULLBT "sqdmlslbt")
! 				  (UNSPEC_SQDMULLT "sqdmlslt")])
! 
! (define_int_attr sve_fp_op [(UNSPEC_BFDOT "bfdot")
! 			    (UNSPEC_BFMLALB "bfmlalb")
! 			    (UNSPEC_BFMLALT "bfmlalt")
! 			    (UNSPEC_BFMMLA "bfmmla")
! 			    (UNSPEC_FRECPE "frecpe")
! 			    (UNSPEC_FRECPS "frecps")
! 			    (UNSPEC_RSQRTE "frsqrte")
! 			    (UNSPEC_RSQRTS "frsqrts")
! 			    (UNSPEC_FADDP "faddp")
! 			    (UNSPEC_FADDV "faddv")
! 			    (UNSPEC_FEXPA "fexpa")
! 			    (UNSPEC_FMAXNMP "fmaxnmp")
! 			    (UNSPEC_FMAXNMV "fmaxnmv")
! 			    (UNSPEC_FMAXP "fmaxp")
! 			    (UNSPEC_FMAXV "fmaxv")
! 			    (UNSPEC_FMINNMP "fminnmp")
! 			    (UNSPEC_FMINNMV "fminnmv")
! 			    (UNSPEC_FMINP "fminp")
! 			    (UNSPEC_FMINV "fminv")
! 			    (UNSPEC_FMLA "fmla")
! 			    (UNSPEC_FMLALB "fmlalb")
! 			    (UNSPEC_FMLALT "fmlalt")
! 			    (UNSPEC_FMLS "fmls")
! 			    (UNSPEC_FMLSLB "fmlslb")
! 			    (UNSPEC_FMLSLT "fmlslt")
! 			    (UNSPEC_FMMLA "fmmla")
! 			    (UNSPEC_FTSMUL "ftsmul")
! 			    (UNSPEC_FTSSEL "ftssel")
! 			    (UNSPEC_COND_FABS "fabs")
! 			    (UNSPEC_COND_FADD "fadd")
! 			    (UNSPEC_COND_FCVTLT "fcvtlt")
! 			    (UNSPEC_COND_FCVTX "fcvtx")
! 			    (UNSPEC_COND_FDIV "fdiv")
! 			    (UNSPEC_COND_FLOGB "flogb")
! 			    (UNSPEC_COND_FMAX "fmax")
! 			    (UNSPEC_COND_FMAXNM "fmaxnm")
! 			    (UNSPEC_COND_FMIN "fmin")
! 			    (UNSPEC_COND_FMINNM "fminnm")
! 			    (UNSPEC_COND_FMUL "fmul")
! 			    (UNSPEC_COND_FMULX "fmulx")
! 			    (UNSPEC_COND_FNEG "fneg")
! 			    (UNSPEC_COND_FRECPX "frecpx")
! 			    (UNSPEC_COND_FRINTA "frinta")
! 			    (UNSPEC_COND_FRINTI "frinti")
! 			    (UNSPEC_COND_FRINTM "frintm")
! 			    (UNSPEC_COND_FRINTN "frintn")
! 			    (UNSPEC_COND_FRINTP "frintp")
! 			    (UNSPEC_COND_FRINTX "frintx")
! 			    (UNSPEC_COND_FRINTZ "frintz")
! 			    (UNSPEC_COND_FSCALE "fscale")
! 			    (UNSPEC_COND_FSQRT "fsqrt")
! 			    (UNSPEC_COND_FSUB "fsub")])
! 
! (define_int_attr sve_fp_op_rev [(UNSPEC_COND_FADD "fadd")
! 				(UNSPEC_COND_FDIV "fdivr")
! 				(UNSPEC_COND_FMAX "fmax")
! 				(UNSPEC_COND_FMAXNM "fmaxnm")
! 				(UNSPEC_COND_FMIN "fmin")
! 				(UNSPEC_COND_FMINNM "fminnm")
! 				(UNSPEC_COND_FMUL "fmul")
! 				(UNSPEC_COND_FMULX "fmulx")
! 				(UNSPEC_COND_FSUB "fsubr")])
! 
! (define_int_attr rot [(UNSPEC_CADD90 "90")
! 		      (UNSPEC_CADD270 "270")
! 		      (UNSPEC_CDOT "0")
! 		      (UNSPEC_CDOT90 "90")
! 		      (UNSPEC_CDOT180 "180")
! 		      (UNSPEC_CDOT270 "270")
! 		      (UNSPEC_CMLA "0")
! 		      (UNSPEC_CMLA90 "90")
! 		      (UNSPEC_CMLA180 "180")
! 		      (UNSPEC_CMLA270 "270")
! 		      (UNSPEC_FCADD90 "90")
  		      (UNSPEC_FCADD270 "270")
  		      (UNSPEC_FCMLA "0")
  		      (UNSPEC_FCMLA90 "90")
  		      (UNSPEC_FCMLA180 "180")
! 		      (UNSPEC_FCMLA270 "270")
! 		      (UNSPEC_SQCADD90 "90")
! 		      (UNSPEC_SQCADD270 "270")
! 		      (UNSPEC_SQRDCMLAH "0")
! 		      (UNSPEC_SQRDCMLAH90 "90")
! 		      (UNSPEC_SQRDCMLAH180 "180")
! 		      (UNSPEC_SQRDCMLAH270 "270")
! 		      (UNSPEC_COND_FCADD90 "90")
! 		      (UNSPEC_COND_FCADD270 "270")
! 		      (UNSPEC_COND_FCMLA "0")
! 		      (UNSPEC_COND_FCMLA90 "90")
! 		      (UNSPEC_COND_FCMLA180 "180")
! 		      (UNSPEC_COND_FCMLA270 "270")])
  
  (define_int_attr sve_fmla_op [(UNSPEC_COND_FMLA "fmla")
  			      (UNSPEC_COND_FMLS "fmls")
***************
*** 1892,1900 ****
  			      (UNSPEC_COND_FNMLA "fnmad")
  			      (UNSPEC_COND_FNMLS "fnmsb")])
  
! (define_int_attr commutative [(UNSPEC_COND_ADD "true")
! 			      (UNSPEC_COND_SUB "false")
! 			      (UNSPEC_COND_MUL "true")
! 			      (UNSPEC_COND_DIV "false")
! 			      (UNSPEC_COND_MIN "true")
! 			      (UNSPEC_COND_MAX "true")])
--- 3396,3452 ----
  			      (UNSPEC_COND_FNMLA "fnmad")
  			      (UNSPEC_COND_FNMLS "fnmsb")])
  
! ;; The register constraint to use for the final operand in a binary BRK.
! (define_int_attr brk_reg_con [(UNSPEC_BRKN "0")
! 			      (UNSPEC_BRKPA "Upa") (UNSPEC_BRKPB "Upa")])
! 
! ;; The register number to print for the above.
! (define_int_attr brk_reg_opno [(UNSPEC_BRKN "0")
! 			       (UNSPEC_BRKPA "3") (UNSPEC_BRKPB "3")])
! 
! ;; The predicate to use for the first input operand in a floating-point
! ;; <optab><mode>3 pattern.
! (define_int_attr sve_pred_fp_rhs1_operand
!   [(UNSPEC_COND_FADD "register_operand")
!    (UNSPEC_COND_FDIV "register_operand")
!    (UNSPEC_COND_FMAX "register_operand")
!    (UNSPEC_COND_FMAXNM "register_operand")
!    (UNSPEC_COND_FMIN "register_operand")
!    (UNSPEC_COND_FMINNM "register_operand")
!    (UNSPEC_COND_FMUL "register_operand")
!    (UNSPEC_COND_FMULX "register_operand")
!    (UNSPEC_COND_FSUB "aarch64_sve_float_arith_operand")])
! 
! ;; The predicate to use for the second input operand in a floating-point
! ;; <optab><mode>3 pattern.
! (define_int_attr sve_pred_fp_rhs2_operand
!   [(UNSPEC_COND_FADD "aarch64_sve_float_arith_with_sub_operand")
!    (UNSPEC_COND_FDIV "register_operand")
!    (UNSPEC_COND_FMAX "aarch64_sve_float_maxmin_operand")
!    (UNSPEC_COND_FMAXNM "aarch64_sve_float_maxmin_operand")
!    (UNSPEC_COND_FMIN "aarch64_sve_float_maxmin_operand")
!    (UNSPEC_COND_FMINNM "aarch64_sve_float_maxmin_operand")
!    (UNSPEC_COND_FMUL "aarch64_sve_float_mul_operand")
!    (UNSPEC_COND_FMULX "register_operand")
!    (UNSPEC_COND_FSUB "register_operand")])
! 
! ;; Likewise for immediates only.
! (define_int_attr sve_pred_fp_rhs2_immediate
!   [(UNSPEC_COND_FMAX "aarch64_sve_float_maxmin_immediate")
!    (UNSPEC_COND_FMAXNM "aarch64_sve_float_maxmin_immediate")
!    (UNSPEC_COND_FMIN "aarch64_sve_float_maxmin_immediate")
!    (UNSPEC_COND_FMINNM "aarch64_sve_float_maxmin_immediate")
!    (UNSPEC_COND_FMUL "aarch64_sve_float_mul_immediate")])
! 
! ;; The maximum number of element bits that an instruction can handle.
! (define_int_attr max_elem_bits [(UNSPEC_UADDV "64") (UNSPEC_SADDV "32")
! 				(UNSPEC_PFIRST "8") (UNSPEC_PNEXT "64")])
! 
! ;; The minimum number of element bits that an instruction can handle.
! (define_int_attr min_elem_bits [(UNSPEC_RBIT "8")
! 				(UNSPEC_REVB "16")
! 				(UNSPEC_REVH "32")
! 				(UNSPEC_REVW "64")])
! 
! (define_int_attr unspec [(UNSPEC_WHILERW "UNSPEC_WHILERW")
! 			 (UNSPEC_WHILEWR "UNSPEC_WHILEWR")])
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/predicates.md gcc-10.1.0/gcc/config/aarch64/predicates.md
*** gcc-9.3.0/gcc/config/aarch64/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description for AArch64 architecture.
! ;; Copyright (C) 2009-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Machine description for AArch64 architecture.
! ;; Copyright (C) 2009-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
***************
*** 39,47 ****
    (and (match_code "const_int")
         (match_test "op == CONST0_RTX (mode)")))
  
! (define_special_predicate "subreg_lowpart_operator"
!   (and (match_code "subreg")
!        (match_test "subreg_lowpart_p (op)")))
  
  (define_predicate "aarch64_ccmp_immediate"
    (and (match_code "const_int")
--- 39,55 ----
    (and (match_code "const_int")
         (match_test "op == CONST0_RTX (mode)")))
  
! (define_predicate "const_1_to_3_operand"
!   (match_code "const_int,const_vector")
! {
!   op = unwrap_const_vec_duplicate (op);
!   return CONST_INT_P (op) && IN_RANGE (INTVAL (op), 1, 3);
! })
! 
! (define_predicate "subreg_lowpart_operator"
!   (ior (match_code "truncate")
!        (and (match_code "subreg")
! 	    (match_test "subreg_lowpart_p (op)"))))
  
  (define_predicate "aarch64_ccmp_immediate"
    (and (match_code "const_int")
***************
*** 53,65 ****
  
  (define_predicate "aarch64_simd_register"
    (and (match_code "reg")
!        (ior (match_test "REGNO_REG_CLASS (REGNO (op)) == FP_LO_REGS")
!             (match_test "REGNO_REG_CLASS (REGNO (op)) == FP_REGS"))))
  
  (define_predicate "aarch64_reg_or_zero"
!   (and (match_code "reg,subreg,const_int")
         (ior (match_operand 0 "register_operand")
! 	    (match_test "op == const0_rtx"))))
  
  (define_predicate "aarch64_reg_or_fp_zero"
    (ior (match_operand 0 "register_operand")
--- 61,72 ----
  
  (define_predicate "aarch64_simd_register"
    (and (match_code "reg")
!        (match_test "FP_REGNUM_P (REGNO (op))")))
  
  (define_predicate "aarch64_reg_or_zero"
!   (and (match_code "reg,subreg,const_int,const_double")
         (ior (match_operand 0 "register_operand")
! 	    (match_test "op == CONST0_RTX (GET_MODE (op))"))))
  
  (define_predicate "aarch64_reg_or_fp_zero"
    (ior (match_operand 0 "register_operand")
***************
*** 98,103 ****
--- 105,114 ----
    (and (match_code "const_double")
  	(match_test "aarch64_fpconst_pow_of_2 (op) > 0")))
  
+ (define_predicate "aarch64_fp_pow2_recip"
+   (and (match_code "const_double")
+        (match_test "aarch64_fpconst_pow2_recip (op) > 0")))
+ 
  (define_predicate "aarch64_fp_vec_pow2"
    (match_test "aarch64_vec_fpconst_pow_of_2 (op) > 0"))
  
***************
*** 138,147 ****
--- 149,166 ----
    (and (match_operand 0 "aarch64_pluslong_immediate")
         (not (match_operand 0 "aarch64_plus_immediate"))))
  
+ (define_predicate "aarch64_sve_scalar_inc_dec_immediate"
+   (and (match_code "const_poly_int")
+        (match_test "aarch64_sve_scalar_inc_dec_immediate_p (op)")))
+ 
  (define_predicate "aarch64_sve_addvl_addpl_immediate"
    (and (match_code "const_poly_int")
         (match_test "aarch64_sve_addvl_addpl_immediate_p (op)")))
  
+ (define_predicate "aarch64_sve_plus_immediate"
+   (ior (match_operand 0 "aarch64_sve_scalar_inc_dec_immediate")
+        (match_operand 0 "aarch64_sve_addvl_addpl_immediate")))
+ 
  (define_predicate "aarch64_split_add_offset_immediate"
    (and (match_code "const_poly_int")
         (match_test "aarch64_add_offset_temporaries (op) == 1")))
***************
*** 149,155 ****
  (define_predicate "aarch64_pluslong_operand"
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_pluslong_immediate")
!        (match_operand 0 "aarch64_sve_addvl_addpl_immediate")))
  
  (define_predicate "aarch64_pluslong_or_poly_operand"
    (ior (match_operand 0 "aarch64_pluslong_operand")
--- 168,175 ----
  (define_predicate "aarch64_pluslong_operand"
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_pluslong_immediate")
!        (and (match_test "TARGET_SVE")
! 	    (match_operand 0 "aarch64_sve_plus_immediate"))))
  
  (define_predicate "aarch64_pluslong_or_poly_operand"
    (ior (match_operand 0 "aarch64_pluslong_operand")
***************
*** 323,334 ****
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "const_scalar_int_operand")))
  
- (define_predicate "aarch64_smin"
-   (match_code "smin"))
- 
- (define_predicate "aarch64_umin"
-   (match_code "umin"))
- 
  ;; True for integer comparisons and for FP comparisons other than LTGT or UNEQ.
  (define_special_predicate "aarch64_comparison_operator"
    (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,unordered,
--- 343,348 ----
***************
*** 438,443 ****
--- 452,469 ----
    return aarch64_simd_check_vect_par_cnst_half (op, mode, false);
  })
  
+ (define_predicate "descending_int_parallel"
+   (match_code "parallel")
+ {
+   return aarch64_stepped_int_parallel_p (op, -1);
+ })
+ 
+ (define_predicate "ascending_int_parallel"
+   (match_code "parallel")
+ {
+   return aarch64_stepped_int_parallel_p (op, 1);
+ })
+ 
  (define_special_predicate "aarch64_simd_lshift_imm"
    (match_code "const,const_vector")
  {
***************
*** 454,459 ****
--- 480,489 ----
    (and (match_code "const,const_vector")
         (match_test "op == CONST0_RTX (GET_MODE (op))")))
  
+ (define_predicate "aarch64_simd_imm_one"
+   (and (match_code "const_vector")
+        (match_test "op == CONST1_RTX (GET_MODE (op))")))
+ 
  (define_predicate "aarch64_simd_or_scalar_imm_zero"
    (and (match_code "const_int,const_double,const,const_vector")
         (match_test "op == CONST0_RTX (GET_MODE (op))")))
***************
*** 468,473 ****
--- 498,507 ----
  	    (match_test "op == const0_rtx")
  	    (match_operand 0 "aarch64_simd_or_scalar_imm_zero"))))
  
+ (define_predicate "aarch64_simd_reg_or_minus_one"
+   (ior (match_operand 0 "register_operand")
+        (match_operand 0 "aarch64_simd_imm_minus_one")))
+ 
  (define_predicate "aarch64_simd_struct_operand"
    (and (match_code "mem")
         (match_test "TARGET_SIMD && aarch64_simd_mem_operand_p (op)")))
***************
*** 550,561 ****
--- 584,627 ----
    (and (match_operand 0 "memory_operand")
         (match_test "aarch64_sve_ld1r_operand_p (op)")))
  
+ (define_predicate "aarch64_sve_ld1rq_operand"
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ld1rq_operand_p (op)")))
+ 
+ (define_predicate "aarch64_sve_ld1ro_operand_b"
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ld1ro_operand_p (op, QImode)")))
+ 
+ (define_predicate "aarch64_sve_ld1ro_operand_h"
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ld1ro_operand_p (op, HImode)")))
+ 
+ (define_predicate "aarch64_sve_ld1ro_operand_w"
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ld1ro_operand_p (op, SImode)")))
+ 
+ (define_predicate "aarch64_sve_ld1ro_operand_d"
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ld1ro_operand_p (op, DImode)")))
+ 
+ (define_predicate "aarch64_sve_ldff1_operand"
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ldff1_operand_p (op)")))
+ 
+ (define_predicate "aarch64_sve_ldnf1_operand"
+   (and (match_code "mem")
+        (match_test "aarch64_sve_ldnf1_operand_p (op)")))
+ 
  ;; Like memory_operand, but restricted to addresses that are valid for
  ;; SVE LDR and STR instructions.
  (define_predicate "aarch64_sve_ldr_operand"
    (and (match_code "mem")
         (match_test "aarch64_sve_ldr_operand_p (op)")))
  
+ (define_special_predicate "aarch64_sve_prefetch_operand"
+   (and (match_code "reg, plus")
+        (match_test "aarch64_sve_prefetch_operand_p (op, mode)")))
+ 
  (define_predicate "aarch64_sve_nonimmediate_operand"
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_sve_ldr_operand")))
***************
*** 580,615 ****
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_sve_ld1r_operand")))
  
  (define_predicate "aarch64_sve_arith_immediate"
    (and (match_code "const,const_vector")
!        (match_test "aarch64_sve_arith_immediate_p (op, false)")))
  
  (define_predicate "aarch64_sve_sub_arith_immediate"
    (and (match_code "const,const_vector")
!        (match_test "aarch64_sve_arith_immediate_p (op, true)")))
  
! (define_predicate "aarch64_sve_inc_dec_immediate"
    (and (match_code "const,const_vector")
!        (match_test "aarch64_sve_inc_dec_immediate_p (op)")))
  
  (define_predicate "aarch64_sve_logical_immediate"
    (and (match_code "const,const_vector")
         (match_test "aarch64_sve_bitmask_immediate_p (op)")))
  
! (define_predicate "aarch64_sve_mul_immediate"
    (and (match_code "const,const_vector")
         (match_test "aarch64_const_vec_all_same_in_range_p (op, -128, 127)")))
  
  (define_predicate "aarch64_sve_dup_immediate"
    (and (match_code "const,const_vector")
!        (match_test "aarch64_sve_dup_immediate_p (op)")))
  
  (define_predicate "aarch64_sve_cmp_vsc_immediate"
!   (and (match_code "const,const_vector")
         (match_test "aarch64_sve_cmp_immediate_p (op, true)")))
  
  (define_predicate "aarch64_sve_cmp_vsd_immediate"
!   (and (match_code "const,const_vector")
         (match_test "aarch64_sve_cmp_immediate_p (op, false)")))
  
  (define_predicate "aarch64_sve_index_immediate"
--- 646,741 ----
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_sve_ld1r_operand")))
  
+ (define_predicate "aarch64_sve_ptrue_svpattern_immediate"
+   (and (match_code "const")
+        (match_test "aarch64_sve_ptrue_svpattern_p (op, NULL)")))
+ 
  (define_predicate "aarch64_sve_arith_immediate"
    (and (match_code "const,const_vector")
!        (match_test "aarch64_sve_arith_immediate_p (mode, op, false)")))
  
  (define_predicate "aarch64_sve_sub_arith_immediate"
    (and (match_code "const,const_vector")
!        (match_test "aarch64_sve_arith_immediate_p (mode, op, true)")))
  
! (define_predicate "aarch64_sve_qadd_immediate"
    (and (match_code "const,const_vector")
!        (match_test "aarch64_sve_sqadd_sqsub_immediate_p (mode, op, false)")))
! 
! (define_predicate "aarch64_sve_qsub_immediate"
!   (and (match_code "const,const_vector")
!        (match_test "aarch64_sve_sqadd_sqsub_immediate_p (mode, op, true)")))
! 
! (define_predicate "aarch64_sve_vector_inc_dec_immediate"
!   (and (match_code "const,const_vector")
!        (match_test "aarch64_sve_vector_inc_dec_immediate_p (op)")))
! 
! (define_predicate "aarch64_sve_gather_immediate_b"
!   (and (match_code "const_int")
!        (match_test "IN_RANGE (INTVAL (op), 0, 31)")))
! 
! (define_predicate "aarch64_sve_gather_immediate_h"
!   (and (match_code "const_int")
!        (match_test "IN_RANGE (INTVAL (op), 0, 62)")
!        (match_test "(INTVAL (op) & 1) == 0")))
! 
! (define_predicate "aarch64_sve_gather_immediate_w"
!   (and (match_code "const_int")
!        (match_test "IN_RANGE (INTVAL (op), 0, 124)")
!        (match_test "(INTVAL (op) & 3) == 0")))
! 
! (define_predicate "aarch64_sve_gather_immediate_d"
!   (and (match_code "const_int")
!        (match_test "IN_RANGE (INTVAL (op), 0, 248)")
!        (match_test "(INTVAL (op) & 7) == 0")))
! 
! (define_predicate "aarch64_sve_uxtb_immediate"
!   (and (match_code "const_vector")
!        (match_test "GET_MODE_UNIT_BITSIZE (GET_MODE (op)) > 8")
!        (match_test "aarch64_const_vec_all_same_int_p (op, 0xff)")))
! 
! (define_predicate "aarch64_sve_uxth_immediate"
!   (and (match_code "const_vector")
!        (match_test "GET_MODE_UNIT_BITSIZE (GET_MODE (op)) > 16")
!        (match_test "aarch64_const_vec_all_same_int_p (op, 0xffff)")))
! 
! (define_predicate "aarch64_sve_uxtw_immediate"
!   (and (match_code "const_vector")
!        (match_test "GET_MODE_UNIT_BITSIZE (GET_MODE (op)) > 32")
!        (match_test "aarch64_const_vec_all_same_int_p (op, 0xffffffff)")))
! 
! (define_predicate "aarch64_sve_uxt_immediate"
!   (ior (match_operand 0 "aarch64_sve_uxtb_immediate")
!        (match_operand 0 "aarch64_sve_uxth_immediate")
!        (match_operand 0 "aarch64_sve_uxtw_immediate")))
  
  (define_predicate "aarch64_sve_logical_immediate"
    (and (match_code "const,const_vector")
         (match_test "aarch64_sve_bitmask_immediate_p (op)")))
  
! ;; Used for SVE UMAX and UMIN.
! (define_predicate "aarch64_sve_vsb_immediate"
!   (and (match_code "const_vector")
!        (match_test "GET_MODE_INNER (GET_MODE (op)) == QImode
! 		    ? aarch64_const_vec_all_same_in_range_p (op, -128, 127)
! 		    : aarch64_const_vec_all_same_in_range_p (op, 0, 255)")))
! 
! ;; Used for SVE MUL, SMAX and SMIN.
! (define_predicate "aarch64_sve_vsm_immediate"
    (and (match_code "const,const_vector")
         (match_test "aarch64_const_vec_all_same_in_range_p (op, -128, 127)")))
  
  (define_predicate "aarch64_sve_dup_immediate"
    (and (match_code "const,const_vector")
!        (ior (match_test "aarch64_sve_dup_immediate_p (op)")
! 	    (match_test "aarch64_float_const_representable_p (op)"))))
  
  (define_predicate "aarch64_sve_cmp_vsc_immediate"
!   (and (match_code "const_int,const_vector")
         (match_test "aarch64_sve_cmp_immediate_p (op, true)")))
  
  (define_predicate "aarch64_sve_cmp_vsd_immediate"
!   (and (match_code "const_int,const_vector")
         (match_test "aarch64_sve_cmp_immediate_p (op, false)")))
  
  (define_predicate "aarch64_sve_index_immediate"
***************
*** 620,633 ****
    (and (match_code "const,const_vector")
         (match_test "aarch64_sve_float_arith_immediate_p (op, false)")))
  
! (define_predicate "aarch64_sve_float_arith_with_sub_immediate"
    (and (match_code "const,const_vector")
         (match_test "aarch64_sve_float_arith_immediate_p (op, true)")))
  
  (define_predicate "aarch64_sve_float_mul_immediate"
    (and (match_code "const,const_vector")
         (match_test "aarch64_sve_float_mul_immediate_p (op)")))
  
  (define_predicate "aarch64_sve_arith_operand"
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_sve_arith_immediate")))
--- 746,768 ----
    (and (match_code "const,const_vector")
         (match_test "aarch64_sve_float_arith_immediate_p (op, false)")))
  
! (define_predicate "aarch64_sve_float_negated_arith_immediate"
    (and (match_code "const,const_vector")
         (match_test "aarch64_sve_float_arith_immediate_p (op, true)")))
  
+ (define_predicate "aarch64_sve_float_arith_with_sub_immediate"
+   (ior (match_operand 0 "aarch64_sve_float_arith_immediate")
+        (match_operand 0 "aarch64_sve_float_negated_arith_immediate")))
+ 
  (define_predicate "aarch64_sve_float_mul_immediate"
    (and (match_code "const,const_vector")
         (match_test "aarch64_sve_float_mul_immediate_p (op)")))
  
+ (define_predicate "aarch64_sve_float_maxmin_immediate"
+   (and (match_code "const_vector")
+        (ior (match_test "op == CONST0_RTX (GET_MODE (op))")
+ 	    (match_test "op == CONST1_RTX (GET_MODE (op))"))))
+ 
  (define_predicate "aarch64_sve_arith_operand"
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_sve_arith_immediate")))
***************
*** 635,646 ****
  (define_predicate "aarch64_sve_add_operand"
    (ior (match_operand 0 "aarch64_sve_arith_operand")
         (match_operand 0 "aarch64_sve_sub_arith_immediate")
!        (match_operand 0 "aarch64_sve_inc_dec_immediate")))
  
  (define_predicate "aarch64_sve_logical_operand"
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_sve_logical_immediate")))
  
  (define_predicate "aarch64_sve_lshift_operand"
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_simd_lshift_imm")))
--- 770,806 ----
  (define_predicate "aarch64_sve_add_operand"
    (ior (match_operand 0 "aarch64_sve_arith_operand")
         (match_operand 0 "aarch64_sve_sub_arith_immediate")
!        (match_operand 0 "aarch64_sve_vector_inc_dec_immediate")))
! 
! (define_predicate "aarch64_sve_sqadd_operand"
!   (ior (match_operand 0 "register_operand")
!        (match_operand 0 "aarch64_sve_qadd_immediate")
!        (match_operand 0 "aarch64_sve_qsub_immediate")))
! 
! (define_predicate "aarch64_sve_pred_and_operand"
!   (ior (match_operand 0 "register_operand")
!        (match_operand 0 "aarch64_sve_uxt_immediate")))
  
  (define_predicate "aarch64_sve_logical_operand"
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_sve_logical_immediate")))
  
+ (define_predicate "aarch64_sve_gather_offset_b"
+   (ior (match_operand 0 "register_operand")
+        (match_operand 0 "aarch64_sve_gather_immediate_b")))
+ 
+ (define_predicate "aarch64_sve_gather_offset_h"
+   (ior (match_operand 0 "register_operand")
+        (match_operand 0 "aarch64_sve_gather_immediate_h")))
+ 
+ (define_predicate "aarch64_sve_gather_offset_w"
+   (ior (match_operand 0 "register_operand")
+        (match_operand 0 "aarch64_sve_gather_immediate_w")))
+ 
+ (define_predicate "aarch64_sve_gather_offset_d"
+   (ior (match_operand 0 "register_operand")
+        (match_operand 0 "aarch64_sve_gather_immediate_d")))
+ 
  (define_predicate "aarch64_sve_lshift_operand"
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_simd_lshift_imm")))
***************
*** 649,657 ****
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_simd_rshift_imm")))
  
! (define_predicate "aarch64_sve_mul_operand"
    (ior (match_operand 0 "register_operand")
!        (match_operand 0 "aarch64_sve_mul_immediate")))
  
  (define_predicate "aarch64_sve_cmp_vsc_operand"
    (ior (match_operand 0 "register_operand")
--- 809,825 ----
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_simd_rshift_imm")))
  
! (define_predicate "aarch64_sve_vsb_operand"
    (ior (match_operand 0 "register_operand")
!        (match_operand 0 "aarch64_sve_vsb_immediate")))
! 
! (define_predicate "aarch64_sve_vsm_operand"
!   (ior (match_operand 0 "register_operand")
!        (match_operand 0 "aarch64_sve_vsm_immediate")))
! 
! (define_predicate "aarch64_sve_reg_or_dup_imm"
!   (ior (match_operand 0 "register_operand")
!        (match_operand 0 "aarch64_sve_dup_immediate")))
  
  (define_predicate "aarch64_sve_cmp_vsc_operand"
    (ior (match_operand 0 "register_operand")
***************
*** 670,686 ****
         (match_operand 0 "aarch64_sve_float_arith_immediate")))
  
  (define_predicate "aarch64_sve_float_arith_with_sub_operand"
!   (ior (match_operand 0 "aarch64_sve_float_arith_operand")
         (match_operand 0 "aarch64_sve_float_arith_with_sub_immediate")))
  
  (define_predicate "aarch64_sve_float_mul_operand"
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_sve_float_mul_immediate")))
  
  (define_predicate "aarch64_sve_vec_perm_operand"
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_constant_vector_operand")))
  
  (define_predicate "aarch64_gather_scale_operand_w"
    (and (match_code "const_int")
         (match_test "INTVAL (op) == 1 || INTVAL (op) == 4")))
--- 838,876 ----
         (match_operand 0 "aarch64_sve_float_arith_immediate")))
  
  (define_predicate "aarch64_sve_float_arith_with_sub_operand"
!   (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_sve_float_arith_with_sub_immediate")))
  
  (define_predicate "aarch64_sve_float_mul_operand"
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_sve_float_mul_immediate")))
  
+ (define_predicate "aarch64_sve_float_maxmin_operand"
+   (ior (match_operand 0 "register_operand")
+        (match_operand 0 "aarch64_sve_float_maxmin_immediate")))
+ 
  (define_predicate "aarch64_sve_vec_perm_operand"
    (ior (match_operand 0 "register_operand")
         (match_operand 0 "aarch64_constant_vector_operand")))
  
+ (define_predicate "aarch64_sve_ptrue_flag"
+   (and (match_code "const_int")
+        (ior (match_test "INTVAL (op) == SVE_MAYBE_NOT_PTRUE")
+ 	    (match_test "INTVAL (op) == SVE_KNOWN_PTRUE"))))
+ 
+ (define_predicate "aarch64_sve_gp_strictness"
+   (and (match_code "const_int")
+        (ior (match_test "INTVAL (op) == SVE_RELAXED_GP")
+ 	    (match_test "INTVAL (op) == SVE_STRICT_GP"))))
+ 
+ (define_predicate "aarch64_gather_scale_operand_b"
+   (and (match_code "const_int")
+        (match_test "INTVAL (op) == 1")))
+ 
+ (define_predicate "aarch64_gather_scale_operand_h"
+   (and (match_code "const_int")
+        (match_test "INTVAL (op) == 1 || INTVAL (op) == 2")))
+ 
  (define_predicate "aarch64_gather_scale_operand_w"
    (and (match_code "const_int")
         (match_test "INTVAL (op) == 1 || INTVAL (op) == 4")))
***************
*** 695,697 ****
--- 885,906 ----
  
  (define_predicate "aarch64_sve_any_binary_operator"
    (match_code "plus,minus,mult,div,udiv,smax,umax,smin,umin,and,ior,xor"))
+ 
+ (define_predicate "aarch64_bytes_per_sve_vector_operand"
+   (and (match_code "const_int,const_poly_int")
+        (match_test "known_eq (wi::to_poly_wide (op, mode),
+ 			      BYTES_PER_SVE_VECTOR)")))
+ 
+ (define_predicate "aarch64_memtag_tag_offset"
+   (and (match_code "const_int")
+        (match_test "IN_RANGE (INTVAL (op), 0, 15)")))
+ 
+ (define_predicate "aarch64_granule16_uimm6"
+   (and (match_code "const_int")
+        (match_test "IN_RANGE (INTVAL (op), 0, 1008)
+ 		    && !(INTVAL (op) & 0xf)")))
+ 
+ (define_predicate "aarch64_granule16_simm9"
+   (and (match_code "const_int")
+        (match_test "IN_RANGE (INTVAL (op),  -4096, 4080)
+ 		    && !(INTVAL (op) & 0xf)")))
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/rtems.h gcc-10.1.0/gcc/config/aarch64/rtems.h
*** gcc-9.3.0/gcc/config/aarch64/rtems.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/rtems.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for RTEMS based AARCH64 system.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for RTEMS based AARCH64 system.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/saphira.md gcc-10.1.0/gcc/config/aarch64/saphira.md
*** gcc-9.3.0/gcc/config/aarch64/saphira.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/saphira.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Saphira pipeline description
! ;; Copyright (C) 2017-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Saphira pipeline description
! ;; Copyright (C) 2017-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 520,526 ****
  
  (define_insn_reservation "saphira_other_0_nothing" 0
    (and (eq_attr "tune" "saphira")
!        (eq_attr "type" "no_insn,trap,block"))
    "nothing")
  
  (define_insn_reservation "saphira_other_2_ld" 2
--- 520,526 ----
  
  (define_insn_reservation "saphira_other_0_nothing" 0
    (and (eq_attr "tune" "saphira")
!        (eq_attr "type" "trap,block"))
    "nothing")
  
  (define_insn_reservation "saphira_other_2_ld" 2
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/t-aarch64 gcc-10.1.0/gcc/config/aarch64/t-aarch64
*** gcc-9.3.0/gcc/config/aarch64/t-aarch64	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/t-aarch64	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  # Machine description for AArch64 architecture.
! #  Copyright (C) 2009-2019 Free Software Foundation, Inc.
  #  Contributed by ARM Ltd.
  #
  #  This file is part of GCC.
--- 1,5 ----
  # Machine description for AArch64 architecture.
! #  Copyright (C) 2009-2020 Free Software Foundation, Inc.
  #  Contributed by ARM Ltd.
  #
  #  This file is part of GCC.
*************** OPTIONS_H_EXTRA += $(srcdir)/config/aarc
*** 24,34 ****
  		   $(srcdir)/config/aarch64/aarch64-fusion-pairs.def \
  		   $(srcdir)/config/aarch64/aarch64-tuning-flags.def
  
! $(srcdir)/config/aarch64/aarch64-tune.md: $(srcdir)/config/aarch64/gentune.sh \
  	$(srcdir)/config/aarch64/aarch64-cores.def
  	$(SHELL) $(srcdir)/config/aarch64/gentune.sh \
  		$(srcdir)/config/aarch64/aarch64-cores.def > \
  		$(srcdir)/config/aarch64/aarch64-tune.md
  
  aarch64-builtins.o: $(srcdir)/config/aarch64/aarch64-builtins.c $(CONFIG_H) \
    $(SYSTEM_H) coretypes.h $(TM_H) \
--- 24,38 ----
  		   $(srcdir)/config/aarch64/aarch64-fusion-pairs.def \
  		   $(srcdir)/config/aarch64/aarch64-tuning-flags.def
  
! $(srcdir)/config/aarch64/aarch64-tune.md: s-aarch64-tune-md; @true
! s-aarch64-tune-md: $(srcdir)/config/aarch64/gentune.sh \
  	$(srcdir)/config/aarch64/aarch64-cores.def
  	$(SHELL) $(srcdir)/config/aarch64/gentune.sh \
  		$(srcdir)/config/aarch64/aarch64-cores.def > \
+ 		tmp-aarch64-tune.md
+ 	$(SHELL) $(srcdir)/../move-if-change tmp-aarch64-tune.md \
  		$(srcdir)/config/aarch64/aarch64-tune.md
+ 	$(STAMP) s-aarch64-tune-md
  
  aarch64-builtins.o: $(srcdir)/config/aarch64/aarch64-builtins.c $(CONFIG_H) \
    $(SYSTEM_H) coretypes.h $(TM_H) \
*************** aarch64-builtins.o: $(srcdir)/config/aar
*** 40,45 ****
--- 44,103 ----
  	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
  		$(srcdir)/config/aarch64/aarch64-builtins.c
  
+ aarch64-sve-builtins.o: $(srcdir)/config/aarch64/aarch64-sve-builtins.cc \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins.def \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-base.def \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-sve2.def \
+   $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(RTL_H) \
+   $(TM_P_H) memmodel.h insn-codes.h $(OPTABS_H) $(RECOG_H) $(DIAGNOSTIC_H) \
+   $(EXPR_H) $(BASIC_BLOCK_H) $(FUNCTION_H) fold-const.h $(GIMPLE_H) \
+   gimple-iterator.h gimplify.h explow.h $(EMIT_RTL_H) tree-vector-builder.h \
+   stor-layout.h $(REG_H) alias.h gimple-fold.h langhooks.h \
+   stringpool.h \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins.h \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-shapes.h \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-base.h \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-sve2.h
+ 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
+ 		$(srcdir)/config/aarch64/aarch64-sve-builtins.cc
+ 
+ aarch64-sve-builtins-shapes.o: \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-shapes.cc \
+   $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(RTL_H) \
+   $(TM_P_H) memmodel.h insn-codes.h $(OPTABS_H) \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins.h \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-shapes.h
+ 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
+ 		$(srcdir)/config/aarch64/aarch64-sve-builtins-shapes.cc
+ 
+ aarch64-sve-builtins-base.o: \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-base.cc \
+   $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(RTL_H) \
+   $(TM_P_H) memmodel.h insn-codes.h $(OPTABS_H) $(RECOG_H) \
+   $(EXPR_H) $(BASIC_BLOCK_H) $(FUNCTION_H) fold-const.h $(GIMPLE_H) \
+   gimple-iterator.h gimplify.h explow.h $(EMIT_RTL_H) tree-vector-builder.h \
+   rtx-vector-builder.h vec-perm-indices.h \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins.h \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-shapes.h \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-base.h \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-functions.h
+ 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
+ 		$(srcdir)/config/aarch64/aarch64-sve-builtins-base.cc
+ 
+ aarch64-sve-builtins-sve2.o: \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-sve2.cc \
+   $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(RTL_H) \
+   $(TM_P_H) memmodel.h insn-codes.h $(OPTABS_H) $(RECOG_H) \
+   $(EXPR_H) $(BASIC_BLOCK_H) $(FUNCTION_H) fold-const.h $(GIMPLE_H) \
+   gimple-iterator.h gimplify.h explow.h $(EMIT_RTL_H) tree-vector-builder.h \
+   rtx-vector-builder.h vec-perm-indices.h \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins.h \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-shapes.h \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-sve2.h \
+   $(srcdir)/config/aarch64/aarch64-sve-builtins-functions.h
+ 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
+ 		$(srcdir)/config/aarch64/aarch64-sve-builtins-sve2.cc
+ 
  aarch64-builtin-iterators.h: $(srcdir)/config/aarch64/geniterators.sh \
  	$(srcdir)/config/aarch64/iterators.md
  	$(SHELL) $(srcdir)/config/aarch64/geniterators.sh \
*************** aarch64-bti-insert.o: $(srcdir)/config/a
*** 103,105 ****
--- 161,173 ----
  comma=,
  MULTILIB_OPTIONS    = $(subst $(comma),/, $(patsubst %, mabi=%, $(subst $(comma),$(comma)mabi=,$(TM_MULTILIB_CONFIG))))
  MULTILIB_DIRNAMES   = $(subst $(comma), ,$(TM_MULTILIB_CONFIG))
+ 
+ insn-conditions.md: s-check-sve-md
+ s-check-sve-md: $(srcdir)/config/aarch64/check-sve-md.awk \
+ 		$(srcdir)/config/aarch64/aarch64-sve.md \
+ 		$(srcdir)/config/aarch64/aarch64-sve2.md
+ 	$(AWK) -f $(srcdir)/config/aarch64/check-sve-md.awk \
+ 	  $(srcdir)/config/aarch64/aarch64-sve.md
+ 	$(AWK) -f $(srcdir)/config/aarch64/check-sve-md.awk \
+ 	  $(srcdir)/config/aarch64/aarch64-sve2.md
+ 	$(STAMP) s-check-sve-md
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/t-aarch64-freebsd gcc-10.1.0/gcc/config/aarch64/t-aarch64-freebsd
*** gcc-9.3.0/gcc/config/aarch64/t-aarch64-freebsd	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/t-aarch64-freebsd	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  # Machine description for AArch64 architecture.
! #  Copyright (C) 2016-2019 Free Software Foundation, Inc.
  #
  #  This file is part of GCC.
  #
--- 1,5 ----
  # Machine description for AArch64 architecture.
! #  Copyright (C) 2016-2020 Free Software Foundation, Inc.
  #
  #  This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/t-aarch64-linux gcc-10.1.0/gcc/config/aarch64/t-aarch64-linux
*** gcc-9.3.0/gcc/config/aarch64/t-aarch64-linux	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/t-aarch64-linux	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  # Machine description for AArch64 architecture.
! #  Copyright (C) 2009-2019 Free Software Foundation, Inc.
  #  Contributed by ARM Ltd.
  #
  #  This file is part of GCC.
--- 1,5 ----
  # Machine description for AArch64 architecture.
! #  Copyright (C) 2009-2020 Free Software Foundation, Inc.
  #  Contributed by ARM Ltd.
  #
  #  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/t-aarch64-netbsd gcc-10.1.0/gcc/config/aarch64/t-aarch64-netbsd
*** gcc-9.3.0/gcc/config/aarch64/t-aarch64-netbsd	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/t-aarch64-netbsd	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,21 ----
+ # Machine description for AArch64 architecture.
+ #  Copyright (C) 2016-2020 Free Software Foundation, Inc.
+ #
+ #  This file is part of GCC.
+ #
+ #  GCC is free software; you can redistribute it and/or modify it
+ #  under the terms of the GNU General Public License as published by
+ #  the Free Software Foundation; either version 3, or (at your option)
+ #  any later version.
+ #
+ #  GCC is distributed in the hope that it will be useful, but
+ #  WITHOUT ANY WARRANTY; without even the implied warranty of
+ #  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ #  General Public License for more details.
+ #
+ #  You should have received a copy of the GNU General Public License
+ #  along with GCC; see the file COPYING3.  If not see
+ #  <http://www.gnu.org/licenses/>.
+ 
+ LIB1ASMSRC   = aarch64/lib1funcs.asm
+ LIB1ASMFUNCS = _aarch64_sync_cache_range
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/t-aarch64-vxworks gcc-10.1.0/gcc/config/aarch64/t-aarch64-vxworks
*** gcc-9.3.0/gcc/config/aarch64/t-aarch64-vxworks	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/t-aarch64-vxworks	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,22 ----
+ # Multilibs for VxWorks.
+ #
+ # Copyright (C) 2018-2020 Free Software Foundation, Inc.
+ #
+ # This file is part of GCC.
+ #
+ # GCC is free software; you can redistribute it and/or modify
+ # it under the terms of the GNU General Public License as published by
+ # the Free Software Foundation; either version 3, or (at your option)
+ # any later version.
+ #
+ # GCC is distributed in the hope that it will be useful,
+ # but WITHOUT ANY WARRANTY; without even the implied warranty of
+ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ # GNU General Public License for more details.
+ #
+ # You should have received a copy of the GNU General Public License
+ # along with GCC; see the file COPYING3.  If not see
+ # <http://www.gnu.org/licenses/>.
+ 
+ MULTILIB_OPTIONS += mrtp
+ MULTILIB_DIRNAMES += mrtp
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/thunderx.md gcc-10.1.0/gcc/config/aarch64/thunderx.md
*** gcc-9.3.0/gcc/config/aarch64/thunderx.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/thunderx.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Cavium ThunderX pipeline description
! ;; Copyright (C) 2014-2019 Free Software Foundation, Inc.
  ;;
  ;; Written by Andrew Pinski  <apinski@cavium.com>
  
--- 1,5 ----
  ;; Cavium ThunderX pipeline description
! ;; Copyright (C) 2014-2020 Free Software Foundation, Inc.
  ;;
  ;; Written by Andrew Pinski  <apinski@cavium.com>
  
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/thunderx2t99.md gcc-10.1.0/gcc/config/aarch64/thunderx2t99.md
*** gcc-9.3.0/gcc/config/aarch64/thunderx2t99.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/thunderx2t99.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Cavium ThunderX 2 CN99xx pipeline description
! ;; Copyright (C) 2016-2019 Free Software Foundation, Inc.
  ;;
  ;; Contributed by Cavium, Broadcom and Mentor Embedded.
  
--- 1,5 ----
  ;; Cavium ThunderX 2 CN99xx pipeline description
! ;; Copyright (C) 2016-2020 Free Software Foundation, Inc.
  ;;
  ;; Contributed by Cavium, Broadcom and Mentor Embedded.
  
***************
*** 74,80 ****
  
  (define_insn_reservation "thunderx2t99_nothing" 0
    (and (eq_attr "tune" "thunderx2t99")
!        (eq_attr "type" "no_insn,block"))
    "nothing")
  
  (define_insn_reservation "thunderx2t99_mrs" 0
--- 74,80 ----
  
  (define_insn_reservation "thunderx2t99_nothing" 0
    (and (eq_attr "tune" "thunderx2t99")
!        (eq_attr "type" "block"))
    "nothing")
  
  (define_insn_reservation "thunderx2t99_mrs" 0
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/thunderx3t110.md gcc-10.1.0/gcc/config/aarch64/thunderx3t110.md
*** gcc-9.3.0/gcc/config/aarch64/thunderx3t110.md	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/aarch64/thunderx3t110.md	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,686 ----
+ ;; Cavium ThunderX 3 CN11xx pipeline description
+ ;; Copyright (C) 2020 Free Software Foundation, Inc.
+ ;;
+ ;; Contributed by Marvell
+ 
+ ;; This file is part of GCC.
+ 
+ ;; GCC is free software; you can redistribute it and/or modify
+ ;; it under the terms of the GNU General Public License as published by
+ ;; the Free Software Foundation; either version 3, or (at your option)
+ ;; any later version.
+ 
+ ;; GCC is distributed in the hope that it will be useful,
+ ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+ ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ ;; GNU General Public License for more details.
+ 
+ ;; You should have received a copy of the GNU General Public License
+ ;; along with GCC; see the file COPYING3.  If not see
+ ;; <http://www.gnu.org/licenses/>.
+ 
+ (define_automaton "thunderx3t110, thunderx3t110_advsimd, thunderx3t110_ldst")
+ (define_automaton "thunderx3t110_mult")
+ 
+ (define_cpu_unit "thunderx3t110_i0" "thunderx3t110")
+ (define_cpu_unit "thunderx3t110_i1" "thunderx3t110")
+ (define_cpu_unit "thunderx3t110_i2" "thunderx3t110")
+ (define_cpu_unit "thunderx3t110_i3" "thunderx3t110")
+ 
+ (define_cpu_unit "thunderx3t110_ls0" "thunderx3t110_ldst")
+ (define_cpu_unit "thunderx3t110_ls1" "thunderx3t110_ldst")
+ (define_cpu_unit "thunderx3t110_sd" "thunderx3t110_ldst")
+ 
+ ; Pseudo-units for multiply pipeline.
+ ; unchanged from TX2, occupies I1 for four (1 + 3 additional) slots
+ 
+ (define_cpu_unit "thunderx3t110_i1m1" "thunderx3t110_mult")
+ (define_cpu_unit "thunderx3t110_i1m2" "thunderx3t110_mult")
+ (define_cpu_unit "thunderx3t110_i1m3" "thunderx3t110_mult")
+ 
+ ; Pseudo-units for load delay (assuming dcache hit).
+ 
+ (define_cpu_unit "thunderx3t110_ls0d1" "thunderx3t110_ldst")
+ (define_cpu_unit "thunderx3t110_ls0d2" "thunderx3t110_ldst")
+ (define_cpu_unit "thunderx3t110_ls0d3" "thunderx3t110_ldst")
+ 
+ (define_cpu_unit "thunderx3t110_ls1d1" "thunderx3t110_ldst")
+ (define_cpu_unit "thunderx3t110_ls1d2" "thunderx3t110_ldst")
+ (define_cpu_unit "thunderx3t110_ls1d3" "thunderx3t110_ldst")
+ 
+ ; Define FP units f0/f1/f2/f3.
+ (define_cpu_unit "thunderx3t110_f0" "thunderx3t110_advsimd")
+ (define_cpu_unit "thunderx3t110_f1" "thunderx3t110_advsimd")
+ (define_cpu_unit "thunderx3t110_f2" "thunderx3t110_advsimd")
+ (define_cpu_unit "thunderx3t110_f3" "thunderx3t110_advsimd")
+ 
+ (define_reservation "thunderx3t110_i23" "thunderx3t110_i2|thunderx3t110_i3")
+ (define_reservation "thunderx3t110_i01"
+     "thunderx3t110_i0|thunderx3t110_i1")
+ (define_reservation "thunderx3t110_i012"
+     "thunderx3t110_i0|thunderx3t110_i1|thunderx3t110_i2")
+ (define_reservation "thunderx3t110_i0123"
+     "thunderx3t110_i0|thunderx3t110_i1|thunderx3t110_i2|thunderx3t110_i3")
+ (define_reservation "thunderx3t110_ls01" "thunderx3t110_ls0|thunderx3t110_ls1")
+ (define_reservation "thunderx3t110_f01" "thunderx3t110_f0|thunderx3t110_f1")
+ (define_reservation "thunderx3t110_f23" "thunderx3t110_f2|thunderx3t110_f3")
+ (define_reservation "thunderx3t110_f0123"
+     "thunderx3t110_f0|thunderx3t110_f1|thunderx3t110_f2|thunderx3t110_f3")
+ 
+ ; A load with delay in the ls0/ls1 pipes.
+ ; this is always a delay of four
+ (define_reservation "thunderx3t110_l0delay"
+     "thunderx3t110_ls0,thunderx3t110_ls0d1,thunderx3t110_ls0d2,\
+      thunderx3t110_ls0d3")
+ (define_reservation "thunderx3t110_l1delay"
+     "thunderx3t110_ls1,thunderx3t110_ls1d1,thunderx3t110_ls1d2,\
+      thunderx3t110_ls1d3")
+ (define_reservation "thunderx3t110_l01delay"
+     "thunderx3t110_l0delay|thunderx3t110_l1delay")
+ ;; Branch and call instructions.
+ 
+ (define_insn_reservation "thunderx3t110_branch" 1
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "call,branch,trap"))
+   "thunderx3t110_i23")
+ 
+ ;; Misc instructions.
+ 
+ ; Speculation barrier
+ (define_insn_reservation "thunderx3t110_nothing" 0
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "block"))
+   "nothing")
+ 
+ (define_insn_reservation "thunderx3t110_mrs" 0
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "mrs"))
+   "thunderx3t110_i2")
+ 
+ (define_insn_reservation "thunderx3t110_multiple" 1
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "multiple"))
+   "thunderx3t110_i0+thunderx3t110_i1+thunderx3t110_i3+thunderx3t110_ls0+\
+    thunderx3t110_ls1+thunderx3t110_sd+thunderx3t110_i1m1+thunderx3t110_i1m2+\
+    thunderx3t110_i1m3+thunderx3t110_f0+thunderx3t110_f1")
+ 
+ ;; Integer arithmetic/logic instructions.
+ 
+ ; Plain register moves are handled by renaming,
+ ; and don't create any uops.
+ (define_insn_reservation "thunderx3t110_regmove" 0
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "mov_reg"))
+   "nothing")
+ 
+ (define_insn_reservation "thunderx3t110_alu_basic" 1
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "alu_imm,alu_sreg,alus_imm,alus_sreg,\
+ 			adc_reg,adc_imm,adcs_reg,adcs_imm,\
+ 			logic_reg,logic_imm,logics_reg,logics_imm,\
+ 			csel,adr,mov_imm,shift_reg,shift_imm,bfm,\
+ 			bfx,rbit,rev,extend,rotate_imm"))
+   "thunderx3t110_i0123")
+ 
+ ; distinguish between latency 1|2 and throughput 1/4|2/4?
+ ; is it actually 1,1/2,{i0,i1} vs 2,1/4,{i0,i1,i2,i3}
+ (define_insn_reservation "thunderx3t110_alu_shift" 2
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "alu_shift_imm,alu_ext,\
+ 			alus_shift_imm,alus_ext,\
+ 			logic_shift_imm,logics_shift_imm"))
+   "thunderx3t110_i0123")
+ 
+ (define_insn_reservation "thunderx3t110_alu_shift1" 1
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "alu_shift_imm,alu_ext,\
+ 			alus_shift_imm,alus_ext,\
+ 			logic_shift_imm,logics_shift_imm"))
+   "thunderx3t110_i01")
+ 
+ ; we are going for the the optimistic answer (13)
+ ; for now, the worst case is 23
+ (define_insn_reservation "thunderx3t110_div" 13
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "sdiv,udiv"))
+   "thunderx3t110_i1*3")
+ 
+ (define_insn_reservation "thunderx3t110_madd" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "mla,smlal,umlal"))
+   "thunderx3t110_i0123,thunderx3t110_i1m1,thunderx3t110_i1m2,thunderx3t110_i1m3,\
+    thunderx3t110_i012")
+ 
+ ; NOTE: smull, umull are used for "high part" multiplies too.
+ ; mul is alias for MADD
+ ; it has to be distinguished between smulh, umulh (4,1) and
+ ; other (5,1) but there is no such a type, so, we go for the
+ ; conservative approach of (5,1) for now
+ ; smulh, umulh only runs on I1
+ (define_insn_reservation "thunderx3t110_mul" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "mul,smull,umull"))
+   "thunderx3t110_i0123,thunderx3t110_i1m1,thunderx3t110_i1m2,thunderx3t110_i1m3")
+ 
+ (define_insn_reservation "thunderx3t110_countbits" 3
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "clz"))
+   "thunderx3t110_i1")
+ 
+ ;; Integer loads and stores.
+ 
+ ; load_4 matches prefetch, a multitude of move/str/dup variants,
+ ; sign extend
+ (define_insn_reservation "thunderx3t110_load_basic" 4
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "load_4"))
+   "thunderx3t110_ls01")
+ 
+ ; model use of I0/I1/I2 for index versions only, model 4|8 2nd on load
+ (define_insn_reservation "thunderx3t110_loadpair" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "load_8,load_16"))
+   "thunderx3t110_i012,thunderx3t110_ls01")
+ 
+ (define_insn_reservation "thunderx3t110_store_basic" 1
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "store_4"))
+   "thunderx3t110_ls01,thunderx3t110_sd")
+ 
+ ; model use of I0/I1/I2/I3 for index versions, model differing
+ ; throughputs
+ (define_insn_reservation "thunderx3t110_storepair_basic" 1
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "store_8,store_16"))
+   "thunderx3t110_ls01,thunderx3t110_sd")
+ 
+ ;; FP data processing instructions.
+ 
+ (define_insn_reservation "thunderx3t110_fp_simple" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "ffariths,ffarithd,f_minmaxs,f_minmaxd"))
+   "thunderx3t110_f0123")
+ 
+ ; distinguish latency 3/4 throughput 1/2|1/4
+ (define_insn_reservation "thunderx3t110_fp_addsub3" 3
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "fadds,faddd"))
+   "thunderx3t110_f23")
+ (define_insn_reservation "thunderx3t110_fp_addsub4" 4
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "fadds,faddd"))
+   "thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_fp_cmp" 4
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "fcmps,fcmpd,fccmps,fccmpd"))
+   "thunderx3t110_f0123")
+ 
+ ; need to split out latency 23 throughput 23/4: F64 from
+ ; latency 16 throughput  16/4: FDIV F32
+ (define_insn_reservation "thunderx3t110_fp_divsqrt_s" 16
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "fdivs,fsqrts"))
+   "thunderx3t110_f0*3|thunderx3t110_f1*3|\
+    thunderx3t110_f2*3|thunderx3t110_f3*3")
+ 
+ (define_insn_reservation "thunderx3t110_fp_divsqrt_d" 23
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "fdivd,fsqrtd"))
+   "thunderx3t110_f0*5|thunderx3t110_f1*5|\
+    thunderx3t110_f2*5|thunderx3t110_f3*5")
+ 
+ (define_insn_reservation "thunderx3t110_fp_mul_mac" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "fmuls,fmuld,fmacs,fmacd"))
+   "thunderx3t110_f01")
+ 
+ (define_insn_reservation "thunderx3t110_frint" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "f_rints,f_rintd"))
+   "thunderx3t110_f0123")
+ 
+ ; mimic latency 3|4 throughput 1/2|1/4
+ (define_insn_reservation "thunderx3t110_fcsel3" 3
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "fcsel"))
+   "thunderx3t110_f23")
+ 
+ (define_insn_reservation "thunderx3t110_fcsel4" 4
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "fcsel"))
+   "thunderx3t110_f0123")
+ 
+ ;; FP miscellaneous instructions.
+ 
+ (define_insn_reservation "thunderx3t110_fp_cvt" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "f_cvtf2i,f_cvt,f_cvti2f"))
+   "thunderx3t110_f0123")
+ 
+ ; even though f_mrc has to belong to fp_mov_to_gen
+ ; we retain this for the sake of legacy as codegen
+ ; doesn't use it anyway
+ (define_insn_reservation "thunderx3t110_fp_mov3" 3
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "fconsts,fconstd,fmov,f_mrc"))
+   "thunderx3t110_f23")
+ 
+ (define_insn_reservation "thunderx3t110_fp_mov" 4
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "fconsts,fconstd,fmov,f_mrc"))
+   "thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_fp_mov_to_gen" 4
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "f_mcr"))
+   "thunderx3t110_f0123")
+ 
+ ;; FP loads and stores.
+ ;  model use of I0/I1/I2 for post/pre index modes
+ 
+ (define_insn_reservation "thunderx3t110_fp_load_basic" 4
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "f_loads,f_loadd"))
+   "thunderx3t110_ls01")
+ 
+ ; model throughput 1
+ (define_insn_reservation "thunderx3t110_fp_store_basic" 1
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "f_stores,f_stored"))
+   "thunderx3t110_ls01,thunderx3t110_sd")
+ 
+ ;; ASIMD integer instructions.
+ 
+ (define_insn_reservation "thunderx3t110_asimd_int" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_abd,neon_abd_q,\
+ 			neon_arith_acc,neon_arith_acc_q,\
+ 			neon_abs,neon_abs_q,\
+ 			neon_add,neon_add_q,\
+ 			neon_sub,neon_sub_q,\
+ 			neon_neg,neon_neg_q,\
+ 			neon_add_long,neon_add_widen,\
+ 			neon_add_halve,neon_add_halve_q,\
+ 			neon_sub_long,neon_sub_widen,\
+ 			neon_sub_halve,neon_sub_halve_q,\
+ 			neon_add_halve_narrow_q,neon_sub_halve_narrow_q,\
+ 			neon_qabs,neon_qabs_q,\
+ 			neon_qadd,neon_qadd_q,\
+ 			neon_qneg,neon_qneg_q,\
+ 			neon_qsub,neon_qsub_q,\
+ 			neon_minmax,neon_minmax_q,\
+ 			neon_reduc_minmax,neon_reduc_minmax_q,\
+ 			neon_mul_b,neon_mul_h,neon_mul_s,\
+ 			neon_mul_b_q,neon_mul_h_q,neon_mul_s_q,\
+ 			neon_sat_mul_b,neon_sat_mul_h,neon_sat_mul_s,\
+ 			neon_sat_mul_b_q,neon_sat_mul_h_q,neon_sat_mul_s_q,\
+ 			neon_mla_b,neon_mla_h,neon_mla_s,\
+ 			neon_mla_b_q,neon_mla_h_q,neon_mla_s_q,\
+ 			neon_mul_b_long,neon_mul_h_long,\
+ 			neon_mul_s_long,neon_mul_d_long,\
+ 			neon_sat_mul_b_long,neon_sat_mul_h_long,\
+ 			neon_sat_mul_s_long,\
+ 			neon_mla_b_long,neon_mla_h_long,neon_mla_s_long,\
+ 			neon_sat_mla_b_long,neon_sat_mla_h_long,\
+ 			neon_sat_mla_s_long,\
+ 			neon_shift_acc,neon_shift_acc_q,\
+ 			neon_shift_imm,neon_shift_imm_q,\
+ 			neon_shift_reg,neon_shift_reg_q,\
+ 			neon_shift_imm_long,neon_shift_imm_narrow_q,\
+ 			neon_sat_shift_imm,neon_sat_shift_imm_q,\
+ 			neon_sat_shift_reg,neon_sat_shift_reg_q,\
+ 			neon_sat_shift_imm_narrow_q"))
+   "thunderx3t110_f0123")
+ 
+ ; neon_reduc_add is used for both addp and [su]adalp
+ (define_insn_reservation "thunderx3t110_asimd_reduc_add" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_reduc_add,neon_reduc_add_q"))
+   "thunderx3t110_f01")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_cmp" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_compare,neon_compare_q,neon_compare_zero,\
+ 			neon_tst,neon_tst_q"))
+   "thunderx3t110_f0123")
+ 
+ ; neon_logic used in ldr, str, mov, umov, fmov, mov; orn; bic; and,
+ ;   simd mov immediate; orr, simd mov immediate; eor; not (mvn)
+ ; latency 4 throughput 1/2 LS0/LS1: ldr
+ ; latency 1 throughput 1 LS0/LS1,SDI,I0/I1/I2: str
+ ; latency 3|4 throughput 1/2|1/4 F2/F3 F0/F1/F2/F3: fmov immed, orn,
+ ;   bic, and, orr, eor, not (mvn)
+ ; latency 4 throughput 1/4 F0/F1/F2/F3: fmov register, fmov gen to vec
+ ; latency 5 throughput 1/4 F0/F1/F2/F3: fmov vec to gen, umov, fmov
+ (define_insn_reservation "thunderx3t110_asimd_logic4" 4
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_logic,neon_logic_q"))
+   "thunderx3t110_f23")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_logic5" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_logic,neon_logic_q"))
+   "thunderx3t110_f0123")
+ 
+ ;; ASIMD floating-point instructions.
+ 
+ ; Distinguish between latency 5 throughput 1/4: fabs, fmax, fmin, fneg
+ ; latency 4 throughput 1/4: fcmp
+ (define_insn_reservation "thunderx3t110_asimd_fp_simple" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_fp_abs_s,neon_fp_abs_d,\
+ 			neon_fp_abs_s_q,neon_fp_abs_d_q,\
+ 			neon_fp_compare_s,neon_fp_compare_d,\
+ 			neon_fp_compare_s_q,neon_fp_compare_d_q,\
+ 			neon_fp_minmax_s,neon_fp_minmax_d,\
+ 			neon_fp_minmax_s_q,neon_fp_minmax_d_q,\
+ 			neon_fp_reduc_minmax_s,neon_fp_reduc_minmax_d,\
+ 			neon_fp_reduc_minmax_s_q,neon_fp_reduc_minmax_d_q,\
+ 			neon_fp_neg_s,neon_fp_neg_d,\
+ 			neon_fp_neg_s_q,neon_fp_neg_d_q"))
+   "thunderx3t110_f0123")
+ 
+ ; distinguish between latency 3 throughput 1/2,
+ ; latency 4 throughput 1/4
+ ; neon_fp_reduc_add_<stype><q> is used for both faddp and
+ ; vector reduction add. On TX3, faddp is 3|4 1/2|1/4 and reduction is 5 1/4
+ (define_insn_reservation "thunderx3t110_asimd_fp_arith3" 3
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_fp_abd_s,neon_fp_abd_d,\
+ 			neon_fp_abd_s_q,neon_fp_abd_d_q,\
+ 			neon_fp_addsub_s,neon_fp_addsub_d,\
+ 			neon_fp_addsub_s_q,neon_fp_addsub_d_q,\
+ 			neon_fp_reduc_add_s,neon_fp_reduc_add_d,\
+ 			neon_fp_reduc_add_s_q,neon_fp_reduc_add_d_q"))
+   "thunderx3t110_f23")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_fp_arith4" 4
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_fp_abd_s,neon_fp_abd_d,\
+ 			neon_fp_abd_s_q,neon_fp_abd_d_q,\
+ 			neon_fp_addsub_s,neon_fp_addsub_d,\
+ 			neon_fp_addsub_s_q,neon_fp_addsub_d_q,\
+ 			neon_fp_reduc_add_s,neon_fp_reduc_add_d,\
+ 			neon_fp_reduc_add_s_q,neon_fp_reduc_add_d_q"))
+   "thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_fp_arith5" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_fp_mul_s,neon_fp_mul_d,\
+ 			neon_fp_mul_s_q,neon_fp_mul_d_q,\
+ 			neon_fp_mul_s_scalar_q,neon_fp_mul_d_scalar_q,\
+ 			neon_fp_mla_s,neon_fp_mla_d,\
+ 			neon_fp_mla_s_q,neon_fp_mla_d_q"))
+   "thunderx3t110_f0123")
+ 
+ ; neon_fp_cvt_widen_s,neon_fp_cvt_narrow_d_q: fcvtl,fctvl2,fcvtn,fcvtn2
+ ; neon_fp_to_int_s,neon_fp_to_int_d: fcvt{<frint_suffix><su>,z<su>}
+ ;   where frint_suffix: zpmixan, su: su (plus other sign/unsign/extract...
+ ; neon_fp_to_int_s_q,neon_fp_to_int_d_q: fcvtz<su> other
+ ; The int_to_fp* is complicated
+ ;   neon_int_to_fp_s,neon_int_to_fp_d: <su_optab>cvtf
+ ;   neon_int_to_fp_s_q,neon_int_to_fp_d_q
+ ; Round matches single define_insn, frint<frint_suffix>
+ ;   neon_fp_round_s,neon_fp_round_d,neon_fp_round_s_q,
+ ;   neon_fp_round_d_q: frint<frint_suffix>
+ ; FCVT*,VCVTAU,[SU]CVTF: latency 5 throughput 1/4
+ ; FRINT*: latency 5 throughput 1/4
+ (define_insn_reservation "thunderx3t110_asimd_fp_conv" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_fp_cvt_widen_s,neon_fp_cvt_narrow_d_q,\
+ 			neon_fp_to_int_s,neon_fp_to_int_d,\
+ 			neon_fp_to_int_s_q,neon_fp_to_int_d_q,\
+ 			neon_int_to_fp_s,neon_int_to_fp_d,\
+ 			neon_int_to_fp_s_q,neon_int_to_fp_d_q,\
+ 			neon_fp_round_s,neon_fp_round_d,\
+ 			neon_fp_round_s_q,neon_fp_round_d_q"))
+   "thunderx3t110_f0123")
+ 
+ ; model that pipeline is occupied the whole time D/F32, Q/F32: 16/4
+ ; Q/F64: 23/4
+ (define_insn_reservation "thunderx3t110_asimd_fp_div_s" 16
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_fp_div_s,neon_fp_div_s_q"))
+   "thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_fp_div_d" 23
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_fp_div_d,neon_fp_div_d_q"))
+   "thunderx3t110_f0123")
+ 
+ ;; ASIMD miscellaneous instructions.
+ 
+ ;  divided out:
+ ;  rbit,bsl,bsl_q,cls,cls_q,cnt,cnt_q,move,move_q: 3|4 1/2 | 1/4
+ ;  from_gp,from_gp_q : 4 | 1/4
+ ;  dup,dup_q,ext,ext_q,ins,ins_q,all recpe forms, rev,rev_q: 5 1/4
+ ;  permute,permute_q needs to depend on aarch64_expand_vec_perm_const does
+ ;  on TX3
+ (define_insn_reservation "thunderx3t110_asimd_misc3" 3
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_rbit,\
+ 			neon_bsl,neon_bsl_q,\
+ 			neon_cls,neon_cls_q,\
+ 			neon_cnt,neon_cnt_q,\
+ 			neon_move,neon_move_q"))
+   "thunderx3t110_f23")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_misc4" 4
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_rbit,\
+ 			neon_bsl,neon_bsl_q,\
+ 			neon_cls,neon_cls_q,\
+ 			neon_cnt,neon_cnt_q,\
+ 			neon_from_gp,neon_from_gp_q,\
+ 			neon_move,neon_move_q"))
+   "thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_misc" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "
+ 			neon_dup,neon_dup_q,\
+ 			neon_ext,neon_ext_q,\
+ 			neon_ins,neon_ins_q,\
+ 			neon_move,neon_move_q,\
+ 			neon_fp_recpe_s,neon_fp_recpe_d,\
+ 			neon_fp_recpe_s_q,neon_fp_recpe_d_q,\
+ 			neon_fp_recpx_s,neon_fp_recpx_d,\
+ 			neon_fp_recpx_s_q,neon_fp_recpx_d_q,\
+ 			neon_rev,neon_rev_q,\
+ 			neon_permute,neon_permute_q"))
+   "thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_recip_step" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_fp_recps_s,neon_fp_recps_s_q,\
+ 			neon_fp_recps_d,neon_fp_recps_d_q,\
+ 			neon_fp_sqrt_s,neon_fp_sqrt_s_q,\
+ 			neon_fp_sqrt_d,neon_fp_sqrt_d_q,\
+ 			neon_fp_rsqrte_s, neon_fp_rsqrte_s_q,\
+ 			neon_fp_rsqrte_d, neon_fp_rsqrte_d_q,\
+ 			neon_fp_rsqrts_s, neon_fp_rsqrts_s_q,\
+ 			neon_fp_rsqrts_d, neon_fp_rsqrts_d_q"))
+   "thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_lut1" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_tbl1,neon_tbl1_q"))
+   "thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_lut2" 10
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_tbl2,neon_tbl2_q"))
+   "thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_lut3" 15
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_tbl3,neon_tbl3_q"))
+   "thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_lut4" 20
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_tbl4,neon_tbl4_q"))
+   "thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_elt_to_gr" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_to_gp,neon_to_gp_q"))
+   "thunderx3t110_f0123")
+ 
+ ;; ASIMD load instructions.
+ 
+ ; NOTE: These reservations attempt to model latency and throughput
+ ; correctly, but the cycle timing of unit allocation is not
+ ; necessarily accurate (because insns are split into uops, and those
+ ; may be issued out-of-order).
+ 
+ ; the LDP/LDNP imm-offset S/D/Q suppplies the first arg with latency 4
+ ; and the 2nd at 5 (Q form) or 8 (S/D form). Can this be modeled? These
+ ;forms, as documented, do not use the I0/I1/I2 units (no I3), but the
+ ; other LDP ones do.
+ (define_insn_reservation "thunderx3t110_asimd_load1_ldp" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_ldp,neon_ldp_q"))
+   "thunderx3t110_i012,thunderx3t110_ls01")
+ 
+ ; Need to distinguish latency 6 throughput 2: 4 reg D/Q
+ ; latency 5 throughput 3/2: 3 reg D/Q
+ ; latency 4 throughput 1: 2 reg D/Q
+ ; latency 4 throughput 1/2: 1 reg D/Q
+ (define_insn_reservation "thunderx3t110_asimd_load1" 4
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_load1_1reg,neon_load1_1reg_q,\
+ 			neon_load1_2reg,neon_load1_2reg_q,\
+ 			neon_load1_3reg,neon_load1_3reg_q,\
+ 			neon_load1_4reg,neon_load1_4reg_q"))
+   "thunderx3t110_ls01")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_load1_onelane" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_load1_one_lane,neon_load1_one_lane_q"))
+   "thunderx3t110_l01delay,thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_load1_all" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_load1_all_lanes,neon_load1_all_lanes_q"))
+   "thunderx3t110_l01delay,thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_load2" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_load2_2reg,neon_load2_2reg_q,\
+ 			neon_load2_one_lane,neon_load2_one_lane_q,\
+ 			neon_load2_all_lanes,neon_load2_all_lanes_q"))
+   "thunderx3t110_l01delay,thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_load3" 7
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_load3_3reg,neon_load3_3reg_q,\
+ 			neon_load3_one_lane,neon_load3_one_lane_q,\
+ 			neon_load3_all_lanes,neon_load3_all_lanes_q"))
+   "thunderx3t110_l01delay,thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_load4" 8
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_load4_4reg,neon_load4_4reg_q,\
+ 			neon_load4_one_lane,neon_load4_one_lane_q,\
+ 			neon_load4_all_lanes,neon_load4_all_lanes_q"))
+   "thunderx3t110_l01delay,thunderx3t110_f0123")
+ 
+ ;; ASIMD store instructions.
+ 
+ ; Same note applies as for ASIMD load instructions.
+ 
+ ; Vector Store pair Need to distinguish:
+ ; 5 throughput: imm-offset S/D; imm-postindex S/D; imm-preindex S/D
+ ; 2 throughput: imm-offset Q; imm-postindex Q; imm-preindex Q
+ ; all index modes use I0/I1/I2
+ (define_insn_reservation "thunderx3t110_asimd_store_stp" 1
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_stp,neon_stp_q"))
+   "thunderx3t110_ls01,thunderx3t110_sd")
+ 
+ ; There are multiple forms of ST1
+ ; The following two groups, as documented, do not use the FP pipelines.
+ ; multiple, 1 reg, D-form     ST1
+ ; tx2_ltp:    x    1/2     LS0/LS1
+ ; tx3_ltp:    x    1/2     LS0/LS1
+ ; multiple, 1 reg, Q-form     ST1
+ ; tx2_ltp:    x    1/2     LS0/LS1
+ ; tx3_ltp:    x    1/2     LS0/LS1
+ ;
+ ; one lane, B/H/S         ST1
+ ; tx2_ltp:    x       1/2     LS0/LS1,F0/F1
+ ; tx3_ltp:    x       1/2     LS0/LS1,F0/F1/F2/F3
+ ; one lane, D             ST1
+ ; tx2_ltp:    x       1/2     LS0/LS1,F0/F1
+ ; tx3_ltp:    x       1/2     LS0/LS1,F0/F1/F2/F3
+ ;; Model for st1 insn needs refinement for different register forms
+ ; multiple, 2 reg, D-form     ST1     x    1     LS0/LS1
+ ; multiple, 2 reg, Q-form     ST1     x    1     LS0/LS1
+ ; multiple, 3 reg, D-form     ST1     x    3/2     LS0/LS1
+ ; multiple, 3 reg, Q-form     ST1     x    3/2     LS0/LS1
+ ; multiple,4 reg, D-form         ST1     x    2     LS0/LS1
+ ; multiple,4 reg, Q-form         ST1     x    2     LS0/LS1
+ (define_insn_reservation "thunderx3t110_asimd_store1" 1
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_store1_1reg,neon_store1_1reg_q,\
+ 			neon_store1_2reg,neon_store1_2reg_q,\
+ 			neon_store1_3reg,neon_store1_4reg"))
+   "thunderx3t110_ls01")
+ 
+ (define_insn_reservation "thunderx3t110_asimd_store1_onelane" 1
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_store1_one_lane,neon_store1_one_lane_q"))
+   "thunderx3t110_ls01,thunderx3t110_f0123")
+ 
+ ; distinguish between throughput 1: D/Q-form B/H/S, Q-form D and
+ ; throughput 1/2: one lane B/H/S/D
+ (define_insn_reservation "thunderx3t110_asimd_store2" 1
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_store2_2reg,neon_store2_2reg_q,\
+ 			neon_store2_one_lane,neon_store2_one_lane_q"))
+   "thunderx3t110_ls01,thunderx3t110_f0123")
+ 
+ ; distinguish between throughput 3: D/Q-form B/H/S, Q-form D and
+ ; throughput 1: one lane B/H/S/D
+ (define_insn_reservation "thunderx3t110_asimd_store3" 1
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_store3_3reg,neon_store3_3reg_q,\
+ 			neon_store3_one_lane,neon_store3_one_lane_q"))
+   "thunderx3t110_ls01,thunderx3t110_f0123")
+ 
+ ; distinguish between throughput 4: D/Q-form B/H/S, Q-form D and
+ ; throughput 1: one lane B/H/S/D? (not in doc)
+ (define_insn_reservation "thunderx3t110_asimd_store4" 1
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "neon_store4_4reg,neon_store4_4reg_q,\
+ 			neon_store4_one_lane,neon_store4_one_lane_q"))
+   "thunderx3t110_ls01,thunderx3t110_f0123")
+ 
+ ;; Crypto extensions.
+ 
+ (define_insn_reservation "thunderx3t110_aes" 4
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "crypto_aese,crypto_aesmc"))
+   "thunderx3t110_f0123")
+ 
+ (define_insn_reservation "thunderx3t110_sha" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "crypto_sha1_fast,crypto_sha1_xor,crypto_sha1_slow,\
+ 			crypto_sha256_fast,crypto_sha256_slow"))
+   "thunderx3t110_f0123")
+ 
+ ;; CRC extension.
+ 
+ (define_insn_reservation "thunderx3t110_crc" 3
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "crc"))
+   "thunderx3t110_i1")
+ 
+ ;; PMULL extension.
+ 
+ (define_insn_reservation "thunderx3t110_pmull" 5
+   (and (eq_attr "tune" "thunderx3t110")
+        (eq_attr "type" "crypto_pmull"))
+   "thunderx3t110_f0123")
diff -Nrcpad gcc-9.3.0/gcc/config/aarch64/tsv110.md gcc-10.1.0/gcc/config/aarch64/tsv110.md
*** gcc-9.3.0/gcc/config/aarch64/tsv110.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/aarch64/tsv110.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; tsv110 pipeline description
! ;; Copyright (C) 2018 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; tsv110 pipeline description
! ;; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 281,287 ****
  			shift_imm,shift_reg,\
  			mov_imm,mov_reg,\
  			mvn_imm,mvn_reg,\
! 			mrs,multiple,no_insn"))
    "tsv110_alu1|tsv110_alu2|tsv110_alu3")
    
  (define_insn_reservation "tsv110_alus" 1
--- 281,287 ----
  			shift_imm,shift_reg,\
  			mov_imm,mov_reg,\
  			mvn_imm,mvn_reg,\
! 			mrs,multiple"))
    "tsv110_alu1|tsv110_alu2|tsv110_alu3")
    
  (define_insn_reservation "tsv110_alus" 1
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/alpha-modes.def gcc-10.1.0/gcc/config/alpha/alpha-modes.def
*** gcc-9.3.0/gcc/config/alpha/alpha-modes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/alpha-modes.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Alpha extra machine modes. 
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Alpha extra machine modes. 
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/alpha-passes.def gcc-10.1.0/gcc/config/alpha/alpha-passes.def
*** gcc-9.3.0/gcc/config/alpha/alpha-passes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/alpha-passes.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Description of target passes for DEC Alpha
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Description of target passes for DEC Alpha
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/alpha-protos.h gcc-10.1.0/gcc/config/alpha/alpha-protos.h
*** gcc-9.3.0/gcc/config/alpha/alpha-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/alpha-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Prototypes for alpha.c functions used in the md file & elsewhere.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Prototypes for alpha.c functions used in the md file & elsewhere.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** extern int alpha_next_sequence_number;
*** 21,29 ****
  
  extern void literal_section (void);
  extern int zap_mask (HOST_WIDE_INT);
! extern int direct_return (void);
  
- extern int alpha_sa_size (void);
  extern HOST_WIDE_INT alpha_initial_elimination_offset (unsigned int,
  						       unsigned int);
  extern void alpha_expand_prologue (void);
--- 21,28 ----
  
  extern void literal_section (void);
  extern int zap_mask (HOST_WIDE_INT);
! extern bool direct_return (void);
  
  extern HOST_WIDE_INT alpha_initial_elimination_offset (unsigned int,
  						       unsigned int);
  extern void alpha_expand_prologue (void);
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/alpha.c gcc-10.1.0/gcc/config/alpha/alpha.c
*** gcc-9.3.0/gcc/config/alpha/alpha.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/alpha.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines used for code generation on the DEC Alpha.
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
     Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
  
  This file is part of GCC.
--- 1,5 ----
  /* Subroutines used for code generation on the DEC Alpha.
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
     Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 64,73 ****
  #include "tree-stdarg.h"
  #include "tm-constrs.h"
  #include "libfuncs.h"
- #include "params.h"
  #include "builtins.h"
  #include "rtl-iter.h"
  #include "flags.h"
  
  /* This file should be included last.  */
  #include "target-def.h"
--- 64,73 ----
  #include "tree-stdarg.h"
  #include "tm-constrs.h"
  #include "libfuncs.h"
  #include "builtins.h"
  #include "rtl-iter.h"
  #include "flags.h"
+ #include "opts.h"
  
  /* This file should be included last.  */
  #include "target-def.h"
*************** alpha_option_override (void)
*** 484,500 ****
      }
  
    if (line_size)
!     maybe_set_param_value (PARAM_L1_CACHE_LINE_SIZE, line_size,
! 			   global_options.x_param_values,
! 			   global_options_set.x_param_values);
    if (l1_size)
!     maybe_set_param_value (PARAM_L1_CACHE_SIZE, l1_size,
! 			   global_options.x_param_values,
! 			   global_options_set.x_param_values);
    if (l2_size)
!     maybe_set_param_value (PARAM_L2_CACHE_SIZE, l2_size,
! 			   global_options.x_param_values,
! 			   global_options_set.x_param_values);
  
    /* Do some sanity checks on the above options.  */
  
--- 484,497 ----
      }
  
    if (line_size)
!     SET_OPTION_IF_UNSET (&global_options, &global_options_set,
! 			 param_l1_cache_line_size, line_size);
    if (l1_size)
!     SET_OPTION_IF_UNSET (&global_options, &global_options_set,
! 			 param_l1_cache_size, l1_size);
    if (l2_size)
!     SET_OPTION_IF_UNSET (&global_options, &global_options_set,
! 			 param_l2_cache_size, l2_size);
  
    /* Do some sanity checks on the above options.  */
  
*************** alpha_option_override (void)
*** 526,532 ****
  	  alpha_fptm = ALPHA_FPTM_SU;
  	}
        if (target_flags_explicit & MASK_LONG_DOUBLE_128)
! 	warning (0, "128-bit long double not supported for VAX floats");
        target_flags &= ~MASK_LONG_DOUBLE_128;
      }
  
--- 523,529 ----
  	  alpha_fptm = ALPHA_FPTM_SU;
  	}
        if (target_flags_explicit & MASK_LONG_DOUBLE_128)
! 	warning (0, "128-bit %<long double%> not supported for VAX floats");
        target_flags &= ~MASK_LONG_DOUBLE_128;
      }
  
*************** alpha_vector_mode_supported_p (machine_m
*** 731,749 ****
    return mode == V8QImode || mode == V4HImode || mode == V2SImode;
  }
  
- /* Return 1 if this function can directly return via $26.  */
- 
- int
- direct_return (void)
- {
-   return (TARGET_ABI_OSF
- 	  && reload_completed
- 	  && alpha_sa_size () == 0
- 	  && get_frame_size () == 0
- 	  && crtl->outgoing_args_size == 0
- 	  && crtl->args.pretend_args_size == 0);
- }
- 
  /* Return the TLS model to use for SYMBOL.  */
  
  static enum tls_model
--- 728,733 ----
*************** alpha_expand_mov_nobwx (machine_mode mod
*** 2305,2314 ****
  	{
  	  if (reload_in_progress)
  	    {
! 	      if (mode == QImode)
! 		seq = gen_reload_inqi_aligned (operands[0], operands[1]);
! 	      else
! 		seq = gen_reload_inhi_aligned (operands[0], operands[1]);
  	      emit_insn (seq);
  	    }
  	  else
--- 2289,2295 ----
  	{
  	  if (reload_in_progress)
  	    {
! 	      seq = gen_reload_in_aligned (mode, operands[0], operands[1]);
  	      emit_insn (seq);
  	    }
  	  else
*************** alpha_expand_mov_nobwx (machine_mode mod
*** 2391,2400 ****
  	  rtx temp3 = gen_reg_rtx (DImode);
  	  rtx ua = get_unaligned_address (operands[0]);
  
! 	  if (mode == QImode)
! 	    seq = gen_unaligned_storeqi (ua, operands[1], temp1, temp2, temp3);
! 	  else
! 	    seq = gen_unaligned_storehi (ua, operands[1], temp1, temp2, temp3);
  
  	  alpha_set_memflags (seq, operands[0]);
  	  emit_insn (seq);
--- 2372,2379 ----
  	  rtx temp3 = gen_reg_rtx (DImode);
  	  rtx ua = get_unaligned_address (operands[0]);
  
! 	  seq = gen_unaligned_store
! 	    (mode, ua, operands[1], temp1, temp2, temp3);
  
  	  alpha_set_memflags (seq, operands[0]);
  	  emit_insn (seq);
*************** emit_unlikely_jump (rtx cond, rtx label)
*** 4362,4395 ****
    add_reg_br_prob_note (insn, profile_probability::very_unlikely ());
  }
  
- /* A subroutine of the atomic operation splitters.  Emit a load-locked
-    instruction in MODE.  */
- 
- static void
- emit_load_locked (machine_mode mode, rtx reg, rtx mem)
- {
-   rtx (*fn) (rtx, rtx) = NULL;
-   if (mode == SImode)
-     fn = gen_load_locked_si;
-   else if (mode == DImode)
-     fn = gen_load_locked_di;
-   emit_insn (fn (reg, mem));
- }
- 
- /* A subroutine of the atomic operation splitters.  Emit a store-conditional
-    instruction in MODE.  */
- 
- static void
- emit_store_conditional (machine_mode mode, rtx res, rtx mem, rtx val)
- {
-   rtx (*fn) (rtx, rtx, rtx) = NULL;
-   if (mode == SImode)
-     fn = gen_store_conditional_si;
-   else if (mode == DImode)
-     fn = gen_store_conditional_di;
-   emit_insn (fn (res, mem, val));
- }
- 
  /* Subroutines of the atomic operation splitters.  Emit barriers
     as needed for the memory MODEL.  */
  
--- 4341,4346 ----
*************** alpha_split_atomic_op (enum rtx_code cod
*** 4461,4467 ****
  
    if (before == NULL)
      before = scratch;
!   emit_load_locked (mode, before, mem);
  
    if (code == NOT)
      {
--- 4412,4418 ----
  
    if (before == NULL)
      before = scratch;
!   emit_insn (gen_load_locked (mode, before, mem));
  
    if (code == NOT)
      {
*************** alpha_split_atomic_op (enum rtx_code cod
*** 4476,4482 ****
      emit_insn (gen_rtx_SET (after, copy_rtx (x)));
    emit_insn (gen_rtx_SET (scratch, x));
  
!   emit_store_conditional (mode, cond, mem, scratch);
  
    x = gen_rtx_EQ (DImode, cond, const0_rtx);
    emit_unlikely_jump (x, label);
--- 4427,4433 ----
      emit_insn (gen_rtx_SET (after, copy_rtx (x)));
    emit_insn (gen_rtx_SET (scratch, x));
  
!   emit_insn (gen_store_conditional (mode, cond, mem, scratch));
  
    x = gen_rtx_EQ (DImode, cond, const0_rtx);
    emit_unlikely_jump (x, label);
*************** alpha_split_compare_and_swap (rtx operan
*** 4515,4521 ****
      }
    label2 = gen_rtx_LABEL_REF (DImode, gen_label_rtx ());
  
!   emit_load_locked (mode, retval, mem);
  
    x = gen_lowpart (DImode, retval);
    if (oldval == const0_rtx)
--- 4466,4472 ----
      }
    label2 = gen_rtx_LABEL_REF (DImode, gen_label_rtx ());
  
!   emit_insn (gen_load_locked (mode, retval, mem));
  
    x = gen_lowpart (DImode, retval);
    if (oldval == const0_rtx)
*************** alpha_split_compare_and_swap (rtx operan
*** 4532,4538 ****
    emit_unlikely_jump (x, label2);
  
    emit_move_insn (cond, newval);
!   emit_store_conditional (mode, cond, mem, gen_lowpart (mode, cond));
  
    if (!is_weak)
      {
--- 4483,4490 ----
    emit_unlikely_jump (x, label2);
  
    emit_move_insn (cond, newval);
!   emit_insn (gen_store_conditional
! 	     (mode, cond, mem, gen_lowpart (mode, cond)));
  
    if (!is_weak)
      {
*************** alpha_expand_compare_and_swap_12 (rtx op
*** 4555,4561 ****
    rtx cond, dst, mem, oldval, newval, is_weak, mod_s, mod_f;
    machine_mode mode;
    rtx addr, align, wdst;
-   rtx (*gen) (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
  
    cond = operands[0];
    dst = operands[1];
--- 4507,4512 ----
*************** alpha_expand_compare_and_swap_12 (rtx op
*** 4580,4591 ****
      newval = emit_insxl (mode, newval, addr);
  
    wdst = gen_reg_rtx (DImode);
!   if (mode == QImode)
!     gen = gen_atomic_compare_and_swapqi_1;
!   else
!     gen = gen_atomic_compare_and_swaphi_1;
!   emit_insn (gen (cond, wdst, mem, oldval, newval, align,
! 		  is_weak, mod_s, mod_f));
  
    emit_move_insn (dst, gen_lowpart (mode, wdst));
  }
--- 4531,4539 ----
      newval = emit_insxl (mode, newval, addr);
  
    wdst = gen_reg_rtx (DImode);
!   emit_insn (gen_atomic_compare_and_swap_1
! 	     (mode, cond, wdst, mem, oldval, newval, align,
! 	      is_weak, mod_s, mod_f));
  
    emit_move_insn (dst, gen_lowpart (mode, wdst));
  }
*************** alpha_split_compare_and_swap_12 (rtx ope
*** 4627,4633 ****
      }
    label2 = gen_rtx_LABEL_REF (DImode, gen_label_rtx ());
  
!   emit_load_locked (DImode, scratch, mem);
    
    width = GEN_INT (GET_MODE_BITSIZE (mode));
    mask = GEN_INT (mode == QImode ? 0xff : 0xffff);
--- 4575,4581 ----
      }
    label2 = gen_rtx_LABEL_REF (DImode, gen_label_rtx ());
  
!   emit_insn (gen_load_locked (DImode, scratch, mem));
    
    width = GEN_INT (GET_MODE_BITSIZE (mode));
    mask = GEN_INT (mode == QImode ? 0xff : 0xffff);
*************** alpha_split_compare_and_swap_12 (rtx ope
*** 4651,4657 ****
    if (newval != const0_rtx)
      emit_insn (gen_iordi3 (cond, cond, newval));
  
!   emit_store_conditional (DImode, cond, mem, cond);
  
    if (!is_weak)
      {
--- 4599,4605 ----
    if (newval != const0_rtx)
      emit_insn (gen_iordi3 (cond, cond, newval));
  
!   emit_insn (gen_store_conditional (DImode, cond, mem, cond));
  
    if (!is_weak)
      {
*************** alpha_split_atomic_exchange (rtx operand
*** 4691,4699 ****
    label = gen_rtx_LABEL_REF (DImode, gen_label_rtx ());
    emit_label (XEXP (label, 0));
  
!   emit_load_locked (mode, retval, mem);
    emit_move_insn (scratch, val);
!   emit_store_conditional (mode, cond, mem, scratch);
  
    x = gen_rtx_EQ (DImode, cond, const0_rtx);
    emit_unlikely_jump (x, label);
--- 4639,4647 ----
    label = gen_rtx_LABEL_REF (DImode, gen_label_rtx ());
    emit_label (XEXP (label, 0));
  
!   emit_insn (gen_load_locked (mode, retval, mem));
    emit_move_insn (scratch, val);
!   emit_insn (gen_store_conditional (mode, cond, mem, scratch));
  
    x = gen_rtx_EQ (DImode, cond, const0_rtx);
    emit_unlikely_jump (x, label);
*************** alpha_expand_atomic_exchange_12 (rtx ope
*** 4707,4713 ****
    rtx dst, mem, val, model;
    machine_mode mode;
    rtx addr, align, wdst;
-   rtx (*gen) (rtx, rtx, rtx, rtx, rtx);
  
    dst = operands[0];
    mem = operands[1];
--- 4655,4660 ----
*************** alpha_expand_atomic_exchange_12 (rtx ope
*** 4727,4737 ****
      val = emit_insxl (mode, val, addr);
  
    wdst = gen_reg_rtx (DImode);
!   if (mode == QImode)
!     gen = gen_atomic_exchangeqi_1;
!   else
!     gen = gen_atomic_exchangehi_1;
!   emit_insn (gen (wdst, mem, val, align, model));
  
    emit_move_insn (dst, gen_lowpart (mode, wdst));
  }
--- 4674,4680 ----
      val = emit_insxl (mode, val, addr);
  
    wdst = gen_reg_rtx (DImode);
!   emit_insn (gen_atomic_exchange_1 (mode, wdst, mem, val, align, model));
  
    emit_move_insn (dst, gen_lowpart (mode, wdst));
  }
*************** alpha_split_atomic_exchange_12 (rtx oper
*** 4763,4769 ****
    label = gen_rtx_LABEL_REF (DImode, gen_label_rtx ());
    emit_label (XEXP (label, 0));
  
!   emit_load_locked (DImode, scratch, mem);
    
    width = GEN_INT (GET_MODE_BITSIZE (mode));
    mask = GEN_INT (mode == QImode ? 0xff : 0xffff);
--- 4706,4712 ----
    label = gen_rtx_LABEL_REF (DImode, gen_label_rtx ());
    emit_label (XEXP (label, 0));
  
!   emit_insn (gen_load_locked (DImode, scratch, mem));
    
    width = GEN_INT (GET_MODE_BITSIZE (mode));
    mask = GEN_INT (mode == QImode ? 0xff : 0xffff);
*************** alpha_split_atomic_exchange_12 (rtx oper
*** 4772,4778 ****
    if (val != const0_rtx)
      emit_insn (gen_iordi3 (scratch, scratch, val));
  
!   emit_store_conditional (DImode, scratch, mem, scratch);
  
    x = gen_rtx_EQ (DImode, scratch, const0_rtx);
    emit_unlikely_jump (x, label);
--- 4715,4721 ----
    if (val != const0_rtx)
      emit_insn (gen_iordi3 (scratch, scratch, val));
  
!   emit_insn (gen_store_conditional (DImode, scratch, mem, scratch));
  
    x = gen_rtx_EQ (DImode, scratch, const0_rtx);
    emit_unlikely_jump (x, label);
*************** struct GTY(()) alpha_links;
*** 4840,4845 ****
--- 4783,4792 ----
  
  struct GTY(()) machine_function
  {
+   unsigned HOST_WIDE_INT sa_mask;
+   HOST_WIDE_INT sa_size;
+   HOST_WIDE_INT frame_size;
+ 
    /* For flag_reorder_blocks_and_partition.  */
    rtx gp_save_rtx;
  
*************** alpha_trampoline_init (rtx m_tramp, tree
*** 5595,5632 ****
     Value is zero to push the argument on the stack,
     or a hard register in which to store the argument.
  
-    MODE is the argument's machine mode.
-    TYPE is the data type of the argument (as a tree).
-     This is null for libcalls where that information may
-     not be available.
     CUM is a variable of type CUMULATIVE_ARGS which gives info about
      the preceding args and about the function being called.
!    NAMED is nonzero if this argument is a named parameter
!     (otherwise it is an extra parameter matching an ellipsis).
  
     On Alpha the first 6 words of args are normally in registers
     and the rest are pushed.  */
  
  static rtx
! alpha_function_arg (cumulative_args_t cum_v, machine_mode mode,
! 		    const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    int basereg;
    int num_args;
  
    /* Don't get confused and pass small structures in FP registers.  */
!   if (type && AGGREGATE_TYPE_P (type))
      basereg = 16;
    else
      {
        /* With alpha_split_complex_arg, we shouldn't see any raw complex
  	 values here.  */
!       gcc_checking_assert (!COMPLEX_MODE_P (mode));
  
        /* Set up defaults for FP operands passed in FP registers, and
  	 integral operands passed in integer registers.  */
!       if (TARGET_FPREGS && GET_MODE_CLASS (mode) == MODE_FLOAT)
  	basereg = 32 + 16;
        else
  	basereg = 16;
--- 5542,5573 ----
     Value is zero to push the argument on the stack,
     or a hard register in which to store the argument.
  
     CUM is a variable of type CUMULATIVE_ARGS which gives info about
      the preceding args and about the function being called.
!    ARG is a description of the argument.
  
     On Alpha the first 6 words of args are normally in registers
     and the rest are pushed.  */
  
  static rtx
! alpha_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    int basereg;
    int num_args;
  
    /* Don't get confused and pass small structures in FP registers.  */
!   if (arg.aggregate_type_p ())
      basereg = 16;
    else
      {
        /* With alpha_split_complex_arg, we shouldn't see any raw complex
  	 values here.  */
!       gcc_checking_assert (!COMPLEX_MODE_P (arg.mode));
  
        /* Set up defaults for FP operands passed in FP registers, and
  	 integral operands passed in integer registers.  */
!       if (TARGET_FPREGS && GET_MODE_CLASS (arg.mode) == MODE_FLOAT)
  	basereg = 32 + 16;
        else
  	basereg = 16;
*************** alpha_function_arg (cumulative_args_t cu
*** 5636,5647 ****
       the two platforms, so we can't avoid conditional compilation.  */
  #if TARGET_ABI_OPEN_VMS
      {
!       if (mode == VOIDmode)
  	return alpha_arg_info_reg_val (*cum);
  
        num_args = cum->num_args;
        if (num_args >= 6
! 	  || targetm.calls.must_pass_in_stack (mode, type))
  	return NULL_RTX;
      }
  #elif TARGET_ABI_OSF
--- 5577,5588 ----
       the two platforms, so we can't avoid conditional compilation.  */
  #if TARGET_ABI_OPEN_VMS
      {
!       if (arg.end_marker_p ())
  	return alpha_arg_info_reg_val (*cum);
  
        num_args = cum->num_args;
        if (num_args >= 6
! 	  || targetm.calls.must_pass_in_stack (arg))
  	return NULL_RTX;
      }
  #elif TARGET_ABI_OSF
*************** alpha_function_arg (cumulative_args_t cu
*** 5650,5704 ****
  	return NULL_RTX;
        num_args = *cum;
  
!       /* VOID is passed as a special flag for "last argument".  */
!       if (type == void_type_node)
  	basereg = 16;
!       else if (targetm.calls.must_pass_in_stack (mode, type))
  	return NULL_RTX;
      }
  #else
  #error Unhandled ABI
  #endif
  
!   return gen_rtx_REG (mode, num_args + basereg);
  }
  
! /* Update the data in CUM to advance over an argument
!    of mode MODE and data type TYPE.
!    (TYPE is null for libcalls where that information may not be available.)  */
  
  static void
! alpha_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
! 			    const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   bool onstack = targetm.calls.must_pass_in_stack (mode, type);
!   int increment = onstack ? 6 : ALPHA_ARG_SIZE (mode, type);
  
  #if TARGET_ABI_OSF
    *cum += increment;
  #else
    if (!onstack && cum->num_args < 6)
!     cum->atypes[cum->num_args] = alpha_arg_type (mode);
    cum->num_args += increment;
  #endif
  }
  
  static int
! alpha_arg_partial_bytes (cumulative_args_t cum_v,
! 			 machine_mode mode ATTRIBUTE_UNUSED,
! 			 tree type ATTRIBUTE_UNUSED,
! 			 bool named ATTRIBUTE_UNUSED)
  {
    int words = 0;
    CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED = get_cumulative_args (cum_v);
  
  #if TARGET_ABI_OPEN_VMS
    if (cum->num_args < 6
!       && 6 < cum->num_args + ALPHA_ARG_SIZE (mode, type))
      words = 6 - cum->num_args;
  #elif TARGET_ABI_OSF
!   if (*cum < 6 && 6 < *cum + ALPHA_ARG_SIZE (mode, type))
      words = 6 - *cum;
  #else
  #error Unhandled ABI
--- 5591,5639 ----
  	return NULL_RTX;
        num_args = *cum;
  
!       if (arg.end_marker_p ())
  	basereg = 16;
!       else if (targetm.calls.must_pass_in_stack (arg))
  	return NULL_RTX;
      }
  #else
  #error Unhandled ABI
  #endif
  
!   return gen_rtx_REG (arg.mode, num_args + basereg);
  }
  
! /* Update the data in CUM to advance over argument ARG.  */
  
  static void
! alpha_function_arg_advance (cumulative_args_t cum_v,
! 			    const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   bool onstack = targetm.calls.must_pass_in_stack (arg);
!   int increment = onstack ? 6 : ALPHA_ARG_SIZE (arg.mode, arg.type);
  
  #if TARGET_ABI_OSF
    *cum += increment;
  #else
    if (!onstack && cum->num_args < 6)
!     cum->atypes[cum->num_args] = alpha_arg_type (arg.mode);
    cum->num_args += increment;
  #endif
  }
  
  static int
! alpha_arg_partial_bytes (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    int words = 0;
    CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED = get_cumulative_args (cum_v);
  
  #if TARGET_ABI_OPEN_VMS
    if (cum->num_args < 6
!       && 6 < cum->num_args + ALPHA_ARG_SIZE (arg.mode, arg.type))
      words = 6 - cum->num_args;
  #elif TARGET_ABI_OSF
!   if (*cum < 6 && 6 < *cum + ALPHA_ARG_SIZE (arg.mode, arg.type))
      words = 6 - *cum;
  #else
  #error Unhandled ABI
*************** alpha_return_in_memory (const_tree type,
*** 5763,5775 ****
    return size > UNITS_PER_WORD;
  }
  
! /* Return true if TYPE should be passed by invisible reference.  */
  
  static bool
! alpha_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED,
! 			 machine_mode mode,
! 			 const_tree type ATTRIBUTE_UNUSED,
! 			 bool named)
  {
    /* Pass float and _Complex float variable arguments by reference.
       This avoids 64-bit store from a FP register to a pretend args save area
--- 5698,5707 ----
    return size > UNITS_PER_WORD;
  }
  
! /* Return true if ARG should be passed by invisible reference.  */
  
  static bool
! alpha_pass_by_reference (cumulative_args_t, const function_arg_info &arg)
  {
    /* Pass float and _Complex float variable arguments by reference.
       This avoids 64-bit store from a FP register to a pretend args save area
*************** alpha_pass_by_reference (cumulative_args
*** 5789,5798 ****
       to worry about, and passing unpromoted _Float32 and _Complex float
       as a variable argument will actually work in the future.  */
  
!   if (mode == SFmode || mode == SCmode)
!     return !named;
  
!   return mode == TFmode || mode == TCmode;
  }
  
  /* Define how to find the value returned by a function.  VALTYPE is the
--- 5721,5730 ----
       to worry about, and passing unpromoted _Float32 and _Complex float
       as a variable argument will actually work in the future.  */
  
!   if (arg.mode == SFmode || arg.mode == SCmode)
!     return !arg.named;
  
!   return arg.mode == TFmode || arg.mode == TCmode;
  }
  
  /* Define how to find the value returned by a function.  VALTYPE is the
*************** escapes:
*** 6146,6159 ****
     variable number of arguments.  */
  
  static void
! alpha_setup_incoming_varargs (cumulative_args_t pcum, machine_mode mode,
! 			      tree type, int *pretend_size, int no_rtl)
  {
    CUMULATIVE_ARGS cum = *get_cumulative_args (pcum);
  
    /* Skip the current argument.  */
!   targetm.calls.function_arg_advance (pack_cumulative_args (&cum), mode, type,
! 				      true);
  
  #if TARGET_ABI_OPEN_VMS
    /* For VMS, we allocate space for all 6 arg registers plus a count.
--- 6078,6091 ----
     variable number of arguments.  */
  
  static void
! alpha_setup_incoming_varargs (cumulative_args_t pcum,
! 			      const function_arg_info &arg,
! 			      int *pretend_size, int no_rtl)
  {
    CUMULATIVE_ARGS cum = *get_cumulative_args (pcum);
  
    /* Skip the current argument.  */
!   targetm.calls.function_arg_advance (pack_cumulative_args (&cum), arg);
  
  #if TARGET_ABI_OPEN_VMS
    /* For VMS, we allocate space for all 6 arg registers plus a count.
*************** alpha_gimplify_va_arg_1 (tree type, tree
*** 6293,6299 ****
  
    /* If the type could not be passed in registers, skip the block
       reserved for the registers.  */
!   if (targetm.calls.must_pass_in_stack (TYPE_MODE (type), type))
      {
        t = build_int_cst (TREE_TYPE (offset), 6*8);
        gimplify_assign (offset,
--- 6225,6231 ----
  
    /* If the type could not be passed in registers, skip the block
       reserved for the registers.  */
!   if (must_pass_va_arg_in_stack (type))
      {
        t = build_int_cst (TREE_TYPE (offset), 6*8);
        gimplify_assign (offset,
*************** alpha_gimplify_va_arg (tree valist, tree
*** 6380,6386 ****
    t = fold_convert (build_nonstandard_integer_type (64, 0), offset_field);
    offset = get_initialized_tmp_var (t, pre_p, NULL);
  
!   indirect = pass_by_reference (NULL, TYPE_MODE (type), type, false);
  
    if (indirect)
      {
--- 6312,6318 ----
    t = fold_convert (build_nonstandard_integer_type (64, 0), offset_field);
    offset = get_initialized_tmp_var (t, pre_p, NULL);
  
!   indirect = pass_va_arg_by_reference (type);
  
    if (indirect)
      {
*************** alpha_expand_builtin (tree exp, rtx targ
*** 6707,6713 ****
  #define MAX_ARGS 2
  
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
    tree arg;
    call_expr_arg_iterator iter;
    enum insn_code icode;
--- 6639,6645 ----
  #define MAX_ARGS 2
  
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl);
    tree arg;
    call_expr_arg_iterator iter;
    enum insn_code icode;
*************** alpha_fold_builtin (tree fndecl, int n_a
*** 7106,7112 ****
  	}
      }
  
!   switch (DECL_FUNCTION_CODE (fndecl))
      {
      case ALPHA_BUILTIN_CMPBGE:
        return alpha_fold_builtin_cmpbge (opint, op_const);
--- 7038,7044 ----
  	}
      }
  
!   switch (DECL_MD_FUNCTION_CODE (fndecl))
      {
      case ALPHA_BUILTIN_CMPBGE:
        return alpha_fold_builtin_cmpbge (opint, op_const);
*************** alpha_gimple_fold_builtin (gimple_stmt_i
*** 7222,7228 ****
  	{
  	  tree arg0, arg1;
  
! 	  switch (DECL_FUNCTION_CODE (fndecl))
  	    {
  	    case ALPHA_BUILTIN_UMULH:
  	      arg0 = gimple_call_arg (stmt, 0);
--- 7154,7160 ----
  	{
  	  tree arg0, arg1;
  
! 	  switch (DECL_MD_FUNCTION_CODE (fndecl))
  	    {
  	    case ALPHA_BUILTIN_UMULH:
  	      arg0 = gimple_call_arg (stmt, 0);
*************** static int vms_save_fp_regno;
*** 7271,7353 ****
  /* Register number used to reference objects off our PV.  */
  static int vms_base_regno;
  
! /* Compute register masks for saved registers.  */
! 
  static void
! alpha_sa_mask (unsigned long *imaskP, unsigned long *fmaskP)
  {
!   unsigned long imask = 0;
!   unsigned long fmask = 0;
!   unsigned int i;
  
    /* When outputting a thunk, we don't have valid register life info,
       but assemble_start_function wants to output .frame and .mask
       directives.  */
!   if (cfun->is_thunk)
      {
!       *imaskP = 0;
!       *fmaskP = 0;
!       return;
!     }
! 
!   if (TARGET_ABI_OPEN_VMS && alpha_procedure_type == PT_STACK)
!     imask |= (1UL << HARD_FRAME_POINTER_REGNUM);
  
!   /* One for every register we have to save.  */
!   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
!     if (! fixed_regs[i] && ! call_used_regs[i]
! 	&& df_regs_ever_live_p (i) && i != REG_RA)
!       {
! 	if (i < 32)
! 	  imask |= (1UL << i);
! 	else
! 	  fmask |= (1UL << (i - 32));
!       }
  
!   /* We need to restore these for the handler.  */
!   if (crtl->calls_eh_return)
!     {
!       for (i = 0; ; ++i)
  	{
! 	  unsigned regno = EH_RETURN_DATA_REGNO (i);
! 	  if (regno == INVALID_REGNUM)
! 	    break;
! 	  imask |= 1UL << regno;
  	}
-     }
- 
-   /* If any register spilled, then spill the return address also.  */
-   /* ??? This is required by the Digital stack unwind specification
-      and isn't needed if we're doing Dwarf2 unwinding.  */
-   if (imask || fmask || alpha_ra_ever_killed ())
-     imask |= (1UL << REG_RA);
- 
-   *imaskP = imask;
-   *fmaskP = fmask;
- }
- 
- int
- alpha_sa_size (void)
- {
-   unsigned long mask[2];
-   int sa_size = 0;
-   int i, j;
  
!   alpha_sa_mask (&mask[0], &mask[1]);
  
!   for (j = 0; j < 2; ++j)
!     for (i = 0; i < 32; ++i)
!       if ((mask[j] >> i) & 1)
! 	sa_size++;
  
    if (TARGET_ABI_OPEN_VMS)
      {
        /* Start with a stack procedure if we make any calls (REG_RA used), or
  	 need a frame pointer, with a register procedure if we otherwise need
  	 at least a slot, and with a null procedure in other cases.  */
!       if ((mask[0] >> REG_RA) & 1 || frame_pointer_needed)
  	alpha_procedure_type = PT_STACK;
!       else if (get_frame_size() != 0)
  	alpha_procedure_type = PT_REGISTER;
        else
  	alpha_procedure_type = PT_NULL;
--- 7203,7261 ----
  /* Register number used to reference objects off our PV.  */
  static int vms_base_regno;
  
! /* Compute register masks for saved registers, register save area size,
!    and total frame size.  */
  static void
! alpha_compute_frame_layout (void)
  {
!   unsigned HOST_WIDE_INT sa_mask = 0;
!   HOST_WIDE_INT frame_size;
!   int sa_size;
  
    /* When outputting a thunk, we don't have valid register life info,
       but assemble_start_function wants to output .frame and .mask
       directives.  */
!   if (!cfun->is_thunk)
      {
!       if (TARGET_ABI_OPEN_VMS && alpha_procedure_type == PT_STACK)
! 	sa_mask |= HOST_WIDE_INT_1U << HARD_FRAME_POINTER_REGNUM;
  
!       /* One for every register we have to save.  */
!       for (unsigned i = 0; i < FIRST_PSEUDO_REGISTER; i++)
! 	if (! call_used_or_fixed_reg_p (i)
! 	    && df_regs_ever_live_p (i) && i != REG_RA)
! 	  sa_mask |= HOST_WIDE_INT_1U << i;
  
!       /* We need to restore these for the handler.  */
!       if (crtl->calls_eh_return)
  	{
! 	  for (unsigned i = 0; ; ++i)
! 	    {
! 	      unsigned regno = EH_RETURN_DATA_REGNO (i);
! 	      if (regno == INVALID_REGNUM)
! 		break;
! 	      sa_mask |= HOST_WIDE_INT_1U << regno;
! 	    }
  	}
  
!       /* If any register spilled, then spill the return address also.  */
!       /* ??? This is required by the Digital stack unwind specification
! 	 and isn't needed if we're doing Dwarf2 unwinding.  */
!       if (sa_mask || alpha_ra_ever_killed ())
! 	sa_mask |= HOST_WIDE_INT_1U << REG_RA;
!     }
  
!   sa_size = popcount_hwi(sa_mask);
!   frame_size = get_frame_size ();
  
    if (TARGET_ABI_OPEN_VMS)
      {
        /* Start with a stack procedure if we make any calls (REG_RA used), or
  	 need a frame pointer, with a register procedure if we otherwise need
  	 at least a slot, and with a null procedure in other cases.  */
!       if ((sa_mask >> REG_RA) & 1 || frame_pointer_needed)
  	alpha_procedure_type = PT_STACK;
!       else if (frame_size != 0)
  	alpha_procedure_type = PT_REGISTER;
        else
  	alpha_procedure_type = PT_NULL;
*************** alpha_sa_size (void)
*** 7371,7382 ****
  
        /* If we want to copy PV into FP, we need to find some register
  	 in which to save FP.  */
- 
        vms_save_fp_regno = -1;
        if (vms_base_regno == HARD_FRAME_POINTER_REGNUM)
! 	for (i = 0; i < 32; i++)
! 	  if (! fixed_regs[i] && call_used_regs[i] && ! df_regs_ever_live_p (i))
! 	    vms_save_fp_regno = i;
  
        /* A VMS condition handler requires a stack procedure in our
  	 implementation. (not required by the calling standard).  */
--- 7279,7293 ----
  
        /* If we want to copy PV into FP, we need to find some register
  	 in which to save FP.  */
        vms_save_fp_regno = -1;
        if (vms_base_regno == HARD_FRAME_POINTER_REGNUM)
! 	for (unsigned i = 0; i < 32; i++)
! 	  if (! fixed_regs[i] && call_used_or_fixed_reg_p (i)
! 	      && ! df_regs_ever_live_p (i))
! 	    {
! 	      vms_save_fp_regno = i;
! 	      break;
! 	    }
  
        /* A VMS condition handler requires a stack procedure in our
  	 implementation. (not required by the calling standard).  */
*************** alpha_sa_size (void)
*** 7401,7408 ****
        if (sa_size & 1)
  	sa_size++;
      }
  
!   return sa_size * 8;
  }
  
  /* Define the offset between two registers, one to be eliminated,
--- 7312,7345 ----
        if (sa_size & 1)
  	sa_size++;
      }
+   sa_size *= 8;
  
!   if (TARGET_ABI_OPEN_VMS)
!     frame_size = ALPHA_ROUND (sa_size
! 			      + (alpha_procedure_type == PT_STACK ? 8 : 0)
! 			      + frame_size
! 			      + crtl->args.pretend_args_size);
!   else
!     frame_size = (ALPHA_ROUND (crtl->outgoing_args_size)
! 		  + sa_size
! 		  + ALPHA_ROUND (frame_size + crtl->args.pretend_args_size));
! 
!   cfun->machine->sa_mask = sa_mask;
!   cfun->machine->sa_size = sa_size;
!   cfun->machine->frame_size = frame_size;
! }
! 
! #undef  TARGET_COMPUTE_FRAME_LAYOUT
! #define TARGET_COMPUTE_FRAME_LAYOUT  alpha_compute_frame_layout
! 
! /* Return 1 if this function can directly return via $26.  */
! 
! bool
! direct_return (void)
! {
!   return (TARGET_ABI_OSF
! 	  && reload_completed
! 	  && cfun->machine->frame_size == 0);
  }
  
  /* Define the offset between two registers, one to be eliminated,
*************** alpha_initial_elimination_offset (unsign
*** 7414,7420 ****
  {
    HOST_WIDE_INT ret;
  
!   ret = alpha_sa_size ();
    ret += ALPHA_ROUND (crtl->outgoing_args_size);
  
    switch (from)
--- 7351,7357 ----
  {
    HOST_WIDE_INT ret;
  
!   ret = cfun->machine->sa_size;
    ret += ALPHA_ROUND (crtl->outgoing_args_size);
  
    switch (from)
*************** alpha_initial_elimination_offset (unsign
*** 7442,7450 ****
  static bool
  alpha_vms_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
  {
-   /* We need the alpha_procedure_type to decide. Evaluate it now.  */
-   alpha_sa_size ();
- 
    switch (alpha_procedure_type)
      {
      case PT_NULL:
--- 7379,7384 ----
*************** alpha_vms_initial_elimination_offset (un
*** 7474,7480 ****
       on the proper computations and will need the register save area size
       in most cases.  */
  
!   HOST_WIDE_INT sa_size = alpha_sa_size ();
  
    /* PT_NULL procedures have no frame of their own and we only allow
       elimination to the stack pointer. This is the argument pointer and we
--- 7408,7414 ----
       on the proper computations and will need the register save area size
       in most cases.  */
  
!   HOST_WIDE_INT sa_size = cfun->machine->sa_size;
  
    /* PT_NULL procedures have no frame of their own and we only allow
       elimination to the stack pointer. This is the argument pointer and we
*************** emit_frame_store (unsigned int regno, rt
*** 7706,7729 ****
    emit_frame_store_1 (reg, base_reg, frame_bias, base_ofs, reg);
  }
  
- /* Compute the frame size.  SIZE is the size of the "naked" frame
-    and SA_SIZE is the size of the register save area.  */
- 
- static HOST_WIDE_INT
- compute_frame_size (HOST_WIDE_INT size, HOST_WIDE_INT sa_size)
- {
-   if (TARGET_ABI_OPEN_VMS)
-     return ALPHA_ROUND (sa_size 
- 			+ (alpha_procedure_type == PT_STACK ? 8 : 0)
- 			+ size
- 			+ crtl->args.pretend_args_size);
-   else
-     return ALPHA_ROUND (crtl->outgoing_args_size)
- 	   + sa_size
- 	   + ALPHA_ROUND (size
- 			  + crtl->args.pretend_args_size);
- }
- 
  /* Write function prologue.  */
  
  /* On vms we have two kinds of functions:
--- 7640,7645 ----
*************** void
*** 7745,7766 ****
  alpha_expand_prologue (void)
  {
    /* Registers to save.  */
!   unsigned long imask = 0;
!   unsigned long fmask = 0;
    /* Stack space needed for pushing registers clobbered by us.  */
!   HOST_WIDE_INT sa_size, sa_bias;
    /* Complete stack size needed.  */
!   HOST_WIDE_INT frame_size;
    /* Probed stack size; it additionally includes the size of
       the "reserve region" if any.  */
!   HOST_WIDE_INT probed_size;
    /* Offset from base reg to register save area.  */
    HOST_WIDE_INT reg_offset;
    rtx sa_reg;
-   int i;
- 
-   sa_size = alpha_sa_size ();
-   frame_size = compute_frame_size (get_frame_size (), sa_size);
  
    if (flag_stack_usage_info)
      current_function_static_stack_size = frame_size;
--- 7661,7677 ----
  alpha_expand_prologue (void)
  {
    /* Registers to save.  */
!   unsigned HOST_WIDE_INT sa_mask = cfun->machine->sa_mask;
    /* Stack space needed for pushing registers clobbered by us.  */
!   HOST_WIDE_INT sa_size = cfun->machine->sa_size;
    /* Complete stack size needed.  */
!   HOST_WIDE_INT frame_size = cfun->machine->frame_size;
    /* Probed stack size; it additionally includes the size of
       the "reserve region" if any.  */
!   HOST_WIDE_INT probed_size, sa_bias;
    /* Offset from base reg to register save area.  */
    HOST_WIDE_INT reg_offset;
    rtx sa_reg;
  
    if (flag_stack_usage_info)
      current_function_static_stack_size = frame_size;
*************** alpha_expand_prologue (void)
*** 7770,7777 ****
    else
      reg_offset = ALPHA_ROUND (crtl->outgoing_args_size);
  
-   alpha_sa_mask (&imask, &fmask);
- 
    /* Emit an insn to reload GP, if needed.  */
    if (TARGET_ABI_OSF)
      {
--- 7681,7686 ----
*************** alpha_expand_prologue (void)
*** 7910,7938 ****
    if (TARGET_ABI_OPEN_VMS && alpha_procedure_type == PT_STACK)
      emit_frame_store (REG_PV, stack_pointer_rtx, 0, 0);
  
!   /* Save register RA next.  */
!   if (imask & (1UL << REG_RA))
      {
!       emit_frame_store (REG_RA, sa_reg, sa_bias, reg_offset);
!       imask &= ~(1UL << REG_RA);
        reg_offset += 8;
      }
  
-   /* Now save any other registers required to be saved.  */
-   for (i = 0; i < 31; i++)
-     if (imask & (1UL << i))
-       {
- 	emit_frame_store (i, sa_reg, sa_bias, reg_offset);
- 	reg_offset += 8;
-       }
- 
-   for (i = 0; i < 31; i++)
-     if (fmask & (1UL << i))
-       {
- 	emit_frame_store (i+32, sa_reg, sa_bias, reg_offset);
- 	reg_offset += 8;
-       }
- 
    if (TARGET_ABI_OPEN_VMS)
      {
        /* Register frame procedures save the fp.  */
--- 7819,7833 ----
    if (TARGET_ABI_OPEN_VMS && alpha_procedure_type == PT_STACK)
      emit_frame_store (REG_PV, stack_pointer_rtx, 0, 0);
  
!   /* Save register RA next, followed by any other registers
!      that need to be saved.  */
!   for (unsigned i = REG_RA; sa_mask != 0; i = ctz_hwi(sa_mask))
      {
!       emit_frame_store (i, sa_reg, sa_bias, reg_offset);
        reg_offset += 8;
+       sa_mask &= ~(HOST_WIDE_INT_1U << i);
      }
  
    if (TARGET_ABI_OPEN_VMS)
      {
        /* Register frame procedures save the fp.  */
*************** void
*** 8019,8032 ****
  alpha_start_function (FILE *file, const char *fnname,
  		      tree decl ATTRIBUTE_UNUSED)
  {
!   unsigned long imask = 0;
!   unsigned long fmask = 0;
!   /* Stack space needed for pushing registers clobbered by us.  */
!   HOST_WIDE_INT sa_size;
    /* Complete stack size needed.  */
!   unsigned HOST_WIDE_INT frame_size;
    /* The maximum debuggable frame size.  */
!   unsigned HOST_WIDE_INT max_frame_size = 1UL << 31;
    /* Offset from base reg to register save area.  */
    HOST_WIDE_INT reg_offset;
    char *entry_label = (char *) alloca (strlen (fnname) + 6);
--- 7914,7924 ----
  alpha_start_function (FILE *file, const char *fnname,
  		      tree decl ATTRIBUTE_UNUSED)
  {
!   unsigned long imask, fmask;
    /* Complete stack size needed.  */
!   HOST_WIDE_INT frame_size = cfun->machine->frame_size;
    /* The maximum debuggable frame size.  */
!   const HOST_WIDE_INT max_frame_size = HOST_WIDE_INT_1 << 31;
    /* Offset from base reg to register save area.  */
    HOST_WIDE_INT reg_offset;
    char *entry_label = (char *) alloca (strlen (fnname) + 6);
*************** alpha_start_function (FILE *file, const
*** 8038,8052 ****
  #endif
  
    alpha_fnname = fnname;
-   sa_size = alpha_sa_size ();
-   frame_size = compute_frame_size (get_frame_size (), sa_size);
  
    if (TARGET_ABI_OPEN_VMS)
      reg_offset = 8 + 8 * cfun->machine->uses_condition_handler;
    else
      reg_offset = ALPHA_ROUND (crtl->outgoing_args_size);
  
!   alpha_sa_mask (&imask, &fmask);
  
    /* Issue function start and label.  */
    if (TARGET_ABI_OPEN_VMS || !flag_inhibit_size_directive)
--- 7930,7943 ----
  #endif
  
    alpha_fnname = fnname;
  
    if (TARGET_ABI_OPEN_VMS)
      reg_offset = 8 + 8 * cfun->machine->uses_condition_handler;
    else
      reg_offset = ALPHA_ROUND (crtl->outgoing_args_size);
  
!   imask = cfun->machine->sa_mask & 0xffffffffu;
!   fmask = cfun->machine->sa_mask >> 32;
  
    /* Issue function start and label.  */
    if (TARGET_ABI_OPEN_VMS || !flag_inhibit_size_directive)
*************** alpha_start_function (FILE *file, const
*** 8113,8119 ****
      fprintf (file, "\t.frame $%d," HOST_WIDE_INT_PRINT_DEC ",$26,"
  	     HOST_WIDE_INT_PRINT_DEC "\n",
  	     vms_unwind_regno,
! 	     frame_size >= (1UL << 31) ? 0 : frame_size,
  	     reg_offset);
    else if (!flag_inhibit_size_directive)
      fprintf (file, "\t.frame $%d," HOST_WIDE_INT_PRINT_DEC ",$26,%d\n",
--- 8004,8010 ----
      fprintf (file, "\t.frame $%d," HOST_WIDE_INT_PRINT_DEC ",$26,"
  	     HOST_WIDE_INT_PRINT_DEC "\n",
  	     vms_unwind_regno,
! 	     frame_size >= max_frame_size ? 0 : frame_size,
  	     reg_offset);
    else if (!flag_inhibit_size_directive)
      fprintf (file, "\t.frame $%d," HOST_WIDE_INT_PRINT_DEC ",$26,%d\n",
*************** void
*** 8193,8204 ****
  alpha_expand_epilogue (void)
  {
    /* Registers to save.  */
!   unsigned long imask = 0;
!   unsigned long fmask = 0;
    /* Stack space needed for pushing registers clobbered by us.  */
!   HOST_WIDE_INT sa_size;
    /* Complete stack size needed.  */
!   HOST_WIDE_INT frame_size;
    /* Offset from base reg to register save area.  */
    HOST_WIDE_INT reg_offset;
    int fp_is_frame_pointer, fp_offset;
--- 8084,8094 ----
  alpha_expand_epilogue (void)
  {
    /* Registers to save.  */
!   unsigned HOST_WIDE_INT sa_mask = cfun->machine->sa_mask;
    /* Stack space needed for pushing registers clobbered by us.  */
!   HOST_WIDE_INT sa_size = cfun->machine->sa_size;
    /* Complete stack size needed.  */
!   HOST_WIDE_INT frame_size = cfun->machine->frame_size;
    /* Offset from base reg to register save area.  */
    HOST_WIDE_INT reg_offset;
    int fp_is_frame_pointer, fp_offset;
*************** alpha_expand_epilogue (void)
*** 8206,8215 ****
    rtx sp_adj1, sp_adj2, mem, reg, insn;
    rtx eh_ofs;
    rtx cfa_restores = NULL_RTX;
-   int i;
- 
-   sa_size = alpha_sa_size ();
-   frame_size = compute_frame_size (get_frame_size (), sa_size);
  
    if (TARGET_ABI_OPEN_VMS)
      {
--- 8096,8101 ----
*************** alpha_expand_epilogue (void)
*** 8221,8228 ****
    else
      reg_offset = ALPHA_ROUND (crtl->outgoing_args_size);
  
-   alpha_sa_mask (&imask, &fmask);
- 
    fp_is_frame_pointer
      = (TARGET_ABI_OPEN_VMS
         ? alpha_procedure_type == PT_STACK
--- 8107,8112 ----
*************** alpha_expand_epilogue (void)
*** 8261,8303 ****
  	}
  
        /* Restore registers in order, excepting a true frame pointer.  */
! 
!       mem = gen_frame_mem (DImode, plus_constant (Pmode, sa_reg, reg_offset));
!       reg = gen_rtx_REG (DImode, REG_RA);
!       emit_move_insn (reg, mem);
!       cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg, cfa_restores);
! 
!       reg_offset += 8;
!       imask &= ~(1UL << REG_RA);
! 
!       for (i = 0; i < 31; ++i)
! 	if (imask & (1UL << i))
! 	  {
! 	    if (i == HARD_FRAME_POINTER_REGNUM && fp_is_frame_pointer)
! 	      fp_offset = reg_offset;
! 	    else
! 	      {
! 		mem = gen_frame_mem (DImode,
! 				     plus_constant (Pmode, sa_reg,
! 						    reg_offset));
! 		reg = gen_rtx_REG (DImode, i);
! 		emit_move_insn (reg, mem);
! 		cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg,
! 					       cfa_restores);
! 	      }
! 	    reg_offset += 8;
! 	  }
! 
!       for (i = 0; i < 31; ++i)
! 	if (fmask & (1UL << i))
! 	  {
! 	    mem = gen_frame_mem (DFmode, plus_constant (Pmode, sa_reg,
! 						        reg_offset));
! 	    reg = gen_rtx_REG (DFmode, i+32);
! 	    emit_move_insn (reg, mem);
! 	    cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg, cfa_restores);
! 	    reg_offset += 8;
! 	  }
      }
  
    if (frame_size || eh_ofs)
--- 8145,8167 ----
  	}
  
        /* Restore registers in order, excepting a true frame pointer.  */
!       for (unsigned i = REG_RA; sa_mask != 0; i = ctz_hwi(sa_mask))
! 	{
! 	  if (i == HARD_FRAME_POINTER_REGNUM && fp_is_frame_pointer)
! 	    fp_offset = reg_offset;
! 	  else
! 	    {
! 	      mem = gen_frame_mem (DImode,
! 				   plus_constant (Pmode, sa_reg,
! 						  reg_offset));
! 	      reg = gen_rtx_REG (DImode, i);
! 	      emit_move_insn (reg, mem);
! 	      cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg,
! 					     cfa_restores);
! 	    }
! 	  reg_offset += 8;
! 	  sa_mask &= ~(HOST_WIDE_INT_1U << i);
! 	}
      }
  
    if (frame_size || eh_ofs)
*************** alpha_output_mi_thunk_osf (FILE *file, t
*** 8437,8442 ****
--- 8301,8307 ----
  			   HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
  			   tree function)
  {
+   const char *fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunk_fndecl));
    HOST_WIDE_INT hi, lo;
    rtx this_rtx, funexp;
    rtx_insn *insn;
*************** alpha_output_mi_thunk_osf (FILE *file, t
*** 8513,8525 ****
  
    /* Run just enough of rest_of_compilation to get the insns emitted.
       There's not really enough bulk here to make other passes such as
!      instruction scheduling worth while.  Note that use_thunk calls
!      assemble_start_function and assemble_end_function.  */
    insn = get_insns ();
    shorten_branches (insn);
    final_start_function (insn, file, 1);
    final (insn, file, 1);
    final_end_function ();
  }
  #endif /* TARGET_ABI_OSF */
  
--- 8378,8391 ----
  
    /* Run just enough of rest_of_compilation to get the insns emitted.
       There's not really enough bulk here to make other passes such as
!      instruction scheduling worth while.  */
    insn = get_insns ();
    shorten_branches (insn);
+   assemble_start_function (thunk_fndecl, fnname);
    final_start_function (insn, file, 1);
    final (insn, file, 1);
    final_end_function ();
+   assemble_end_function (thunk_fndecl, fnname);
  }
  #endif /* TARGET_ABI_OSF */
  
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/alpha.h gcc-10.1.0/gcc/config/alpha/alpha.h
*** gcc-9.3.0/gcc/config/alpha/alpha.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/alpha.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, for DEC Alpha.
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
     Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, for DEC Alpha.
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
     Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
  
  This file is part of GCC.
*************** do {									     \
*** 759,765 ****
  #define MOVE_MAX 8
  
  /* If a memory-to-memory move would take MOVE_RATIO or more simple
!    move-instruction pairs, we will do a movmem or libcall instead.
  
     Without byte/word accesses, we want no more than four instructions;
     with, several single byte accesses are better.  */
--- 759,765 ----
  #define MOVE_MAX 8
  
  /* If a memory-to-memory move would take MOVE_RATIO or more simple
!    move-instruction pairs, we will do a cpymem or libcall instead.
  
     Without byte/word accesses, we want no more than four instructions;
     with, several single byte accesses are better.  */
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/alpha.md gcc-10.1.0/gcc/config/alpha/alpha.md
*** gcc-9.3.0/gcc/config/alpha/alpha.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/alpha.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description for DEC Alpha for GNU C compiler
! ;; Copyright (C) 1992-2019 Free Software Foundation, Inc.
  ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Machine description for DEC Alpha for GNU C compiler
! ;; Copyright (C) 1992-2020 Free Software Foundation, Inc.
  ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
  ;;
  ;; This file is part of GCC.
***************
*** 4232,4238 ****
  ;; be the same temporary, if desired.  If the address is in a register,
  ;; operand 2 can be that register.
  
! (define_expand "unaligned_store<mode>"
    [(set (match_operand:DI 3 "register_operand")
  	(mem:DI (and:DI (match_operand:DI 0 "address_operand")
  			(const_int -8))))
--- 4232,4238 ----
  ;; be the same temporary, if desired.  If the address is in a register,
  ;; operand 2 can be that register.
  
! (define_expand "@unaligned_store<mode>"
    [(set (match_operand:DI 3 "register_operand")
  	(mem:DI (and:DI (match_operand:DI 0 "address_operand")
  			(const_int -8))))
***************
*** 4417,4423 ****
  ;; always get a proper address for a stack slot during reload_foo
  ;; expansion, so we must delay our address manipulations until after.
  
! (define_insn_and_split "reload_in<mode>_aligned"
    [(set (match_operand:I12MODE 0 "register_operand" "=r")
          (match_operand:I12MODE 1 "memory_operand" "m"))]
    "!TARGET_BWX && (reload_in_progress || reload_completed)"
--- 4417,4423 ----
  ;; always get a proper address for a stack slot during reload_foo
  ;; expansion, so we must delay our address manipulations until after.
  
! (define_insn_and_split "@reload_in<mode>_aligned"
    [(set (match_operand:I12MODE 0 "register_operand" "=r")
          (match_operand:I12MODE 1 "memory_operand" "m"))]
    "!TARGET_BWX && (reload_in_progress || reload_completed)"
***************
*** 4673,4679 ****
  ;; Argument 2 is the length
  ;; Argument 3 is the alignment
  
! (define_expand "movmemqi"
    [(parallel [(set (match_operand:BLK 0 "memory_operand")
  		   (match_operand:BLK 1 "memory_operand"))
  	      (use (match_operand:DI 2 "immediate_operand"))
--- 4673,4679 ----
  ;; Argument 2 is the length
  ;; Argument 3 is the alignment
  
! (define_expand "cpymemqi"
    [(parallel [(set (match_operand:BLK 0 "memory_operand")
  		   (match_operand:BLK 1 "memory_operand"))
  	      (use (match_operand:DI 2 "immediate_operand"))
***************
*** 4686,4692 ****
      FAIL;
  })
  
! (define_expand "movmemdi"
    [(parallel [(set (match_operand:BLK 0 "memory_operand")
  		   (match_operand:BLK 1 "memory_operand"))
  	      (use (match_operand:DI 2 "immediate_operand"))
--- 4686,4692 ----
      FAIL;
  })
  
! (define_expand "cpymemdi"
    [(parallel [(set (match_operand:BLK 0 "memory_operand")
  		   (match_operand:BLK 1 "memory_operand"))
  	      (use (match_operand:DI 2 "immediate_operand"))
***************
*** 4703,4709 ****
    "TARGET_ABI_OPEN_VMS"
    "operands[4] = gen_rtx_SYMBOL_REF (Pmode, \"OTS$MOVE\");")
  
! (define_insn "*movmemdi_1"
    [(set (match_operand:BLK 0 "memory_operand" "=m,m")
  	(match_operand:BLK 1 "memory_operand" "m,m"))
     (use (match_operand:DI 2 "nonmemory_operand" "r,i"))
--- 4703,4709 ----
    "TARGET_ABI_OPEN_VMS"
    "operands[4] = gen_rtx_SYMBOL_REF (Pmode, \"OTS$MOVE\");")
  
! (define_insn "*cpymemdi_1"
    [(set (match_operand:BLK 0 "memory_operand" "=m,m")
  	(match_operand:BLK 1 "memory_operand" "m,m"))
     (use (match_operand:DI 2 "nonmemory_operand" "r,i"))
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/alpha.opt gcc-10.1.0/gcc/config/alpha/alpha.opt
*** gcc-9.3.0/gcc/config/alpha/alpha.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/alpha.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the DEC Alpha port of the compiler
  ;
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for the DEC Alpha port of the compiler
  ;
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/constraints.md gcc-10.1.0/gcc/config/alpha/constraints.md
*** gcc-9.3.0/gcc/config/alpha/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for DEC Alpha.
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Constraint definitions for DEC Alpha.
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/driver-alpha.c gcc-10.1.0/gcc/config/alpha/driver-alpha.c
*** gcc-9.3.0/gcc/config/alpha/driver-alpha.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/driver-alpha.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines for the gcc driver.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by Arthur Loiret <aloiret@debian.org>
  
  This file is part of GCC.
--- 1,5 ----
  /* Subroutines for the gcc driver.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by Arthur Loiret <aloiret@debian.org>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/elf.h gcc-10.1.0/gcc/config/alpha/elf.h
*** gcc-9.3.0/gcc/config/alpha/elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/elf.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, for DEC Alpha w/ELF.
!    Copyright (C) 1996-2019 Free Software Foundation, Inc.
     Contributed by Richard Henderson (rth@tamu.edu).
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, for DEC Alpha w/ELF.
!    Copyright (C) 1996-2020 Free Software Foundation, Inc.
     Contributed by Richard Henderson (rth@tamu.edu).
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/elf.opt gcc-10.1.0/gcc/config/alpha/elf.opt
*** gcc-9.3.0/gcc/config/alpha/elf.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/elf.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Alpha ELF options.
  
! ; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Alpha ELF options.
  
! ; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/ev4.md gcc-10.1.0/gcc/config/alpha/ev4.md
*** gcc-9.3.0/gcc/config/alpha/ev4.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/ev4.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Scheduling description for Alpha EV4.
! ;;   Copyright (C) 2002-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Scheduling description for Alpha EV4.
! ;;   Copyright (C) 2002-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/ev5.md gcc-10.1.0/gcc/config/alpha/ev5.md
*** gcc-9.3.0/gcc/config/alpha/ev5.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/ev5.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Scheduling description for Alpha EV5.
! ;;   Copyright (C) 2002-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Scheduling description for Alpha EV5.
! ;;   Copyright (C) 2002-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/ev6.md gcc-10.1.0/gcc/config/alpha/ev6.md
*** gcc-9.3.0/gcc/config/alpha/ev6.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/ev6.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Scheduling description for Alpha EV6.
! ;;   Copyright (C) 2002-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Scheduling description for Alpha EV6.
! ;;   Copyright (C) 2002-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/linux-elf.h gcc-10.1.0/gcc/config/alpha/linux-elf.h
*** gcc-9.3.0/gcc/config/alpha/linux-elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/linux-elf.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for GNU compiler
     for Alpha Linux-based GNU systems using ELF.
!    Copyright (C) 1996-2019 Free Software Foundation, Inc.
     Contributed by Richard Henderson.
  
  This file is part of GCC.
--- 1,6 ----
  /* Definitions of target machine for GNU compiler
     for Alpha Linux-based GNU systems using ELF.
!    Copyright (C) 1996-2020 Free Software Foundation, Inc.
     Contributed by Richard Henderson.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/linux.h gcc-10.1.0/gcc/config/alpha/linux.h
*** gcc-9.3.0/gcc/config/alpha/linux.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/linux.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for GNU compiler,
     for Alpha Linux-based GNU systems.
!    Copyright (C) 1996-2019 Free Software Foundation, Inc.
     Contributed by Richard Henderson.
  
  This file is part of GCC.
--- 1,6 ----
  /* Definitions of target machine for GNU compiler,
     for Alpha Linux-based GNU systems.
!    Copyright (C) 1996-2020 Free Software Foundation, Inc.
     Contributed by Richard Henderson.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/netbsd.h gcc-10.1.0/gcc/config/alpha/netbsd.h
*** gcc-9.3.0/gcc/config/alpha/netbsd.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/netbsd.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for GNU compiler,
     for Alpha NetBSD systems.
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,6 ----
  /* Definitions of target machine for GNU compiler,
     for Alpha NetBSD systems.
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/openbsd.h gcc-10.1.0/gcc/config/alpha/openbsd.h
*** gcc-9.3.0/gcc/config/alpha/openbsd.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/openbsd.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Configuration file for an alpha OpenBSD target.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Configuration file for an alpha OpenBSD target.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/predicates.md gcc-10.1.0/gcc/config/alpha/predicates.md
*** gcc-9.3.0/gcc/config/alpha/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicate definitions for DEC Alpha.
! ;; Copyright (C) 2004-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Predicate definitions for DEC Alpha.
! ;; Copyright (C) 2004-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/sync.md gcc-10.1.0/gcc/config/alpha/sync.md
*** gcc-9.3.0/gcc/config/alpha/sync.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/sync.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; GCC machine description for Alpha synchronization instructions.
! ;; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; GCC machine description for Alpha synchronization instructions.
! ;; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 43,49 ****
    "mb"
    [(set_attr "type" "mb")])
  
! (define_insn "load_locked_<mode>"
    [(set (match_operand:I48MODE 0 "register_operand" "=r")
  	(unspec_volatile:I48MODE
  	  [(match_operand:I48MODE 1 "memory_operand" "m")]
--- 43,49 ----
    "mb"
    [(set_attr "type" "mb")])
  
! (define_insn "@load_locked_<mode>"
    [(set (match_operand:I48MODE 0 "register_operand" "=r")
  	(unspec_volatile:I48MODE
  	  [(match_operand:I48MODE 1 "memory_operand" "m")]
***************
*** 52,58 ****
    "ld<modesuffix>_l %0,%1"
    [(set_attr "type" "ld_l")])
  
! (define_insn "store_conditional_<mode>"
    [(set (match_operand:DI 0 "register_operand" "=r")
          (unspec_volatile:DI [(const_int 0)] UNSPECV_SC))
     (set (match_operand:I48MODE 1 "memory_operand" "=m")
--- 52,58 ----
    "ld<modesuffix>_l %0,%1"
    [(set_attr "type" "ld_l")])
  
! (define_insn "@store_conditional_<mode>"
    [(set (match_operand:DI 0 "register_operand" "=r")
          (unspec_volatile:DI [(const_int 0)] UNSPECV_SC))
     (set (match_operand:I48MODE 1 "memory_operand" "=m")
***************
*** 132,138 ****
    DONE;
  })
  
! (define_insn_and_split "atomic_compare_and_swap<mode>_1"
    [(set (match_operand:DI 0 "register_operand" "=&r")		;; bool out
  	(unspec_volatile:DI [(const_int 0)] UNSPECV_CMPXCHG))
     (set (match_operand:DI 1 "register_operand" "=&r")		;; val out
--- 132,138 ----
    DONE;
  })
  
! (define_insn_and_split "@atomic_compare_and_swap<mode>_1"
    [(set (match_operand:DI 0 "register_operand" "=&r")		;; bool out
  	(unspec_volatile:DI [(const_int 0)] UNSPECV_CMPXCHG))
     (set (match_operand:DI 1 "register_operand" "=&r")		;; val out
***************
*** 189,195 ****
    DONE;
  })
  
! (define_insn_and_split "atomic_exchange<mode>_1"
    [(set (match_operand:DI 0 "register_operand" "=&r")		;; output
  	(zero_extend:DI
  	  (match_operand:I12MODE 1 "mem_noofs_operand" "+w")))	;; memory
--- 189,195 ----
    DONE;
  })
  
! (define_insn_and_split "@atomic_exchange<mode>_1"
    [(set (match_operand:DI 0 "register_operand" "=&r")		;; output
  	(zero_extend:DI
  	  (match_operand:I12MODE 1 "mem_noofs_operand" "+w")))	;; memory
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/t-alpha gcc-10.1.0/gcc/config/alpha/t-alpha
*** gcc-9.3.0/gcc/config/alpha/t-alpha	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/t-alpha	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2016-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2016-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/t-vms gcc-10.1.0/gcc/config/alpha/t-vms
*** gcc-9.3.0/gcc/config/alpha/t-vms	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/t-vms	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 1996-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 1996-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/alpha/vms.h gcc-10.1.0/gcc/config/alpha/vms.h
*** gcc-9.3.0/gcc/config/alpha/vms.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/alpha/vms.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Output variables, constants and external declarations, for GNU compiler.
!    Copyright (C) 1996-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Output variables, constants and external declarations, for GNU compiler.
!    Copyright (C) 1996-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc-arch.h gcc-10.1.0/gcc/config/arc/arc-arch.h
*** gcc-9.3.0/gcc/config/arc/arc-arch.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc-arch.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of types that are used to store ARC architecture and
     device information.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Claudiu Zissulescu (claziss@synopsys.com)
  
  This file is part of GCC.
--- 1,6 ----
  /* Definitions of types that are used to store ARC architecture and
     device information.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Claudiu Zissulescu (claziss@synopsys.com)
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc-arches.def gcc-10.1.0/gcc/config/arc/arc-arches.def
*** gcc-9.3.0/gcc/config/arc/arc-arches.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc-arches.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* ARC ARCH architectures.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* ARC ARCH architectures.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc-c.c gcc-10.1.0/gcc/config/arc/arc-c.c
*** gcc-9.3.0/gcc/config/arc/arc-c.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc-c.c	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** arc_cpu_cpp_builtins (cpp_reader * pfile
*** 71,74 ****
--- 71,84 ----
    if (TARGET_BIG_ENDIAN)
      builtin_define ("__big_endian__");
  
+   if (TARGET_HARD_FLOAT)
+     {
+       builtin_define ("__arc_hard_float__");
+       builtin_define ("__ARC_HARD_FLOAT__");
+     }
+   else
+     {
+       builtin_define ("__arc_soft_float__");
+       builtin_define ("__ARC_SOFT_FLOAT__");
+     }
  }
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc-c.def gcc-10.1.0/gcc/config/arc/arc-c.def
*** gcc-9.3.0/gcc/config/arc/arc-c.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc-c.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc-cpus.def gcc-10.1.0/gcc/config/arc/arc-cpus.def
*** gcc-9.3.0/gcc/config/arc/arc-cpus.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc-cpus.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* ARC CPU architectures.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* ARC CPU architectures.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc-modes.def gcc-10.1.0/gcc/config/arc/arc-modes.def
*** gcc-9.3.0/gcc/config/arc/arc-modes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc-modes.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, Synopsys DesignWare ARC cpu.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
     Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
  		on behalf of Synopsys Inc.
  
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, Synopsys DesignWare ARC cpu.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
     Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
  		on behalf of Synopsys Inc.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc-options.def gcc-10.1.0/gcc/config/arc/arc-options.def
*** gcc-9.3.0/gcc/config/arc/arc-options.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc-options.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* ARC options.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* ARC options.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc-opts.h gcc-10.1.0/gcc/config/arc/arc-opts.h
*** gcc-9.3.0/gcc/config/arc/arc-opts.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc-opts.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* GCC option-handling definitions for the Synopsys DesignWare ARC architecture.
  
!    Copyright (C) 2007-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,6 ----
  /* GCC option-handling definitions for the Synopsys DesignWare ARC architecture.
  
!    Copyright (C) 2007-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc-passes.def gcc-10.1.0/gcc/config/arc/arc-passes.def
*** gcc-9.3.0/gcc/config/arc/arc-passes.def	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/arc/arc-passes.def	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,29 ----
+ /* Description of target passes for ARC.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc. */
+ 
+ /* This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it under
+    the terms of the GNU General Public License as published by the Free
+    Software Foundation; either version 3, or (at your option) any later
+    version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or
+    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+    for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ /* First target dependent ARC if-conversion pass.  */
+ INSERT_PASS_AFTER (pass_delay_slots, 1, pass_arc_ifcvt);
+ 
+ /* Second target dependent ARC if-conversion pass.  */
+ INSERT_PASS_BEFORE (pass_shorten_branches, 1, pass_arc_ifcvt);
+ 
+ /* Find annulled delay insns and convert them to use the appropriate
+    predicate.  This allows branch shortening to size up these
+    instructions properly.  */
+ INSERT_PASS_AFTER (pass_delay_slots, 1, pass_arc_predicate_delay_insns);
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc-protos.h gcc-10.1.0/gcc/config/arc/arc-protos.h
*** gcc-9.3.0/gcc/config/arc/arc-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, Synopsys DesignWare ARC cpu.
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, Synopsys DesignWare ARC cpu.
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** extern machine_mode arc_select_cc_mode (
*** 25,31 ****
  extern struct rtx_def *gen_compare_reg (rtx, machine_mode);
  
  /* Declarations for various fns used in the .md file.  */
- extern void arc_output_function_epilogue (FILE *, HOST_WIDE_INT, int);
  extern const char *output_shift (rtx *);
  extern bool compact_sda_memory_operand (rtx, machine_mode, bool);
  extern bool arc_double_limm_p (rtx);
--- 25,30 ----
*************** extern void arc_final_prescan_insn (rtx_
*** 35,56 ****
  extern const char *arc_output_libcall (const char *);
  extern int arc_output_addsi (rtx *operands, bool, bool);
  extern int arc_output_commutative_cond_exec (rtx *operands, bool);
! extern bool arc_expand_movmem (rtx *operands);
  extern bool prepare_move_operands (rtx *operands, machine_mode mode);
  extern void emit_shift (enum rtx_code, rtx, rtx, rtx);
  extern void arc_expand_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx);
  extern void arc_split_compare_and_swap (rtx *);
  extern void arc_expand_compare_and_swap (rtx *);
  extern bool compact_memory_operand_p (rtx, machine_mode, bool, bool);
- extern int arc_return_address_register (unsigned int);
- extern unsigned int arc_compute_function_type (struct function *);
  extern bool arc_is_uncached_mem_p (rtx);
  extern bool gen_operands_ldd_std (rtx *operands, bool load, bool commute);
  extern bool arc_check_multi (rtx, bool);
  extern void arc_adjust_reg_alloc_order (void);
  #endif /* RTX_CODE */
  
- extern unsigned int arc_compute_frame_size (int);
  extern bool arc_ccfsm_branch_deleted_p (void);
  extern void arc_ccfsm_record_branch_deleted (void);
  
--- 34,57 ----
  extern const char *arc_output_libcall (const char *);
  extern int arc_output_addsi (rtx *operands, bool, bool);
  extern int arc_output_commutative_cond_exec (rtx *operands, bool);
! extern bool arc_expand_cpymem (rtx *operands);
  extern bool prepare_move_operands (rtx *operands, machine_mode mode);
  extern void emit_shift (enum rtx_code, rtx, rtx, rtx);
  extern void arc_expand_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx);
  extern void arc_split_compare_and_swap (rtx *);
  extern void arc_expand_compare_and_swap (rtx *);
  extern bool compact_memory_operand_p (rtx, machine_mode, bool, bool);
  extern bool arc_is_uncached_mem_p (rtx);
  extern bool gen_operands_ldd_std (rtx *operands, bool load, bool commute);
  extern bool arc_check_multi (rtx, bool);
  extern void arc_adjust_reg_alloc_order (void);
+ extern bool arc_check_ior_const (HOST_WIDE_INT );
+ extern void arc_split_ior (rtx *);
+ extern bool arc_check_mov_const (HOST_WIDE_INT );
+ extern bool arc_split_mov_const (rtx *);
+ extern bool arc_can_use_return_insn (void);
  #endif /* RTX_CODE */
  
  extern bool arc_ccfsm_branch_deleted_p (void);
  extern void arc_ccfsm_record_branch_deleted (void);
  
*************** extern bool arc_is_longcall_p (rtx);
*** 67,73 ****
  extern bool arc_is_shortcall_p (rtx);
  extern bool valid_brcc_with_delay_p (rtx *);
  extern bool arc_ccfsm_cond_exec_p (void);
- struct secondary_reload_info;
  extern rtx disi_highpart (rtx);
  extern int arc_adjust_insn_length (rtx_insn *, int, bool);
  extern int arc_corereg_hazard (rtx, rtx);
--- 68,73 ----
*************** extern int arc_hazard (rtx_insn *, rtx_i
*** 75,82 ****
  extern int arc_write_ext_corereg (rtx);
  extern rtx gen_acc1 (void);
  extern rtx gen_acc2 (void);
- extern rtx gen_mlo (void);
- extern rtx gen_mhi (void);
  extern bool arc_branch_size_unknown_p (void);
  struct arc_ccfsm;
  extern void arc_ccfsm_record_condition (rtx, bool, rtx_insn *,
--- 75,80 ----
*************** extern void arc_expand_prologue (void);
*** 85,91 ****
  extern void arc_expand_epilogue (int);
  extern void arc_init_expanders (void);
  extern int arc_check_millicode (rtx op, int offset, int load_p);
- extern int arc_get_unalign (void);
  extern void arc_clear_unalign (void);
  extern void arc_toggle_unalign (void);
  extern void split_addsi (rtx *);
--- 83,88 ----
*************** extern void arc_eh_return_address_locati
*** 112,114 ****
--- 109,114 ----
  extern bool arc_is_jli_call_p (rtx);
  extern void arc_file_end (void);
  extern bool arc_is_secure_call_p (rtx);
+ 
+ rtl_opt_pass * make_pass_arc_ifcvt (gcc::context *ctxt);
+ rtl_opt_pass * make_pass_arc_predicate_delay_insns (gcc::context *ctxt);
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc-simd.h gcc-10.1.0/gcc/config/arc/arc-simd.h
*** gcc-9.3.0/gcc/config/arc/arc-simd.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc-simd.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Synopsys DesignWare ARC SIMD include file.
!    Copyright (C) 2007-2019 Free Software Foundation, Inc.
     Written by Saurabh Verma (saurabh.verma@celunite.com) on behalf os Synopsys
     Inc.
  
--- 1,5 ----
  /* Synopsys DesignWare ARC SIMD include file.
!    Copyright (C) 2007-2020 Free Software Foundation, Inc.
     Written by Saurabh Verma (saurabh.verma@celunite.com) on behalf os Synopsys
     Inc.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc-tables.opt gcc-10.1.0/gcc/config/arc/arc-tables.opt
*** gcc-9.3.0/gcc/config/arc/arc-tables.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc-tables.opt	Thu May  7 10:49:59 2020
***************
*** 2,8 ****
  ; Generated by    : ./gcc/config/arc/genoptions.awk
  ; Generated from  : ./gcc/config/arc/arc-cpu.def
  ;
! ; Copyright (C) 2016-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 2,8 ----
  ; Generated by    : ./gcc/config/arc/genoptions.awk
  ; Generated from  : ./gcc/config/arc/arc-cpu.def
  ;
! ; Copyright (C) 2016-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc.c gcc-10.1.0/gcc/config/arc/arc.c
*** gcc-9.3.0/gcc/config/arc/arc.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines used for code generation on the Synopsys DesignWare ARC cpu.
!    Copyright (C) 1994-2019 Free Software Foundation, Inc.
  
     Sources derived from work done by Sankhya Technologies (www.sankhya.com) on
     behalf of Synopsys Inc.
--- 1,5 ----
  /* Subroutines used for code generation on the Synopsys DesignWare ARC cpu.
!    Copyright (C) 1994-2020 Free Software Foundation, Inc.
  
     Sources derived from work done by Sankhya Technologies (www.sankhya.com) on
     behalf of Synopsys Inc.
*************** static int rgf_banked_register_count;
*** 206,211 ****
--- 206,221 ----
     this to be no less than the 1/p  */
  #define MAX_INSNS_SKIPPED 3
  
+ /* ZOL control registers.  */
+ #define AUX_LP_START 0x02
+ #define AUX_LP_END 0x03
+ 
+ /* FPX AUX registers.  */
+ #define AUX_DPFP_START 0x301
+ 
+ /* ARC600 MULHI register.  */
+ #define AUX_MULHI 0x12
+ 
  /* A nop is needed between a 4 byte insn that sets the condition codes and
     a branch that uses them (the same isn't true for an 8 byte insn that sets
     the condition codes).  Set by arc_ccfsm_advance.  Used by
*************** static bool arc_use_by_pieces_infrastruc
*** 298,303 ****
--- 308,436 ----
  /* Globally visible information about currently selected cpu.  */
  const arc_cpu_t *arc_selected_cpu;
  
+ /* Traditionally, we push saved registers first in the prologue,
+    then we allocate the rest of the frame - and reverse in the epilogue.
+    This has still its merits for ease of debugging, or saving code size
+    or even execution time if the stack frame is so large that some accesses
+    can't be encoded anymore with offsets in the instruction code when using
+    a different scheme.
+    Also, it would be a good starting point if we got instructions to help
+    with register save/restore.
+ 
+    However, often stack frames are small, and the pushing / popping has
+    some costs:
+    - the stack modification prevents a lot of scheduling.
+    - frame allocation / deallocation may need extra instructions.
+    - we need to place a memory barrier after frame allocation to avoid
+      the delay slot scheduler to reschedule a frame related info and
+      messing up with dwarf unwinding.  The barrier before deallocation
+      is for flushing all pending sp operations.
+ 
+    Thus, for small frames, we'd like to use a different scheme:
+    - The frame is allocated in full with the first prologue instruction,
+      and deallocated in full with the last epilogue instruction.
+      Thus, the instructions in-between can be freely scheduled.
+    - If the function has no outgoing arguments on the stack, we can allocate
+      one register save slot at the top of the stack.  This register can then
+      be saved simultaneously with frame allocation, and restored with
+      frame deallocation.
+      This register can be picked depending on scheduling considerations,
+      although same though should go into having some set of registers
+      to be potentially lingering after a call, and others to be available
+      immediately - i.e. in the absence of interprocedual optimization, we
+      can use an ABI-like convention for register allocation to reduce
+      stalls after function return.  */
+ 
+ /* ARCompact stack frames look like:
+ 
+            Before call                     After call
+   high  +-----------------------+       +-----------------------+
+   mem   |  reg parm save area   |       | reg parm save area    |
+         |  only created for     |       | only created for      |
+         |  variable arg fns     |       | variable arg fns      |
+     AP  +-----------------------+       +-----------------------+
+         |  return addr register |       | return addr register  |
+         |  (if required)        |       | (if required)         |
+         +-----------------------+       +-----------------------+
+         |                       |       |                       |
+         |  reg save area        |       | reg save area         |
+         |                       |       |                       |
+         +-----------------------+       +-----------------------+
+         |  frame pointer        |       | frame pointer         |
+         |  (if required)        |       | (if required)         |
+     FP  +-----------------------+       +-----------------------+
+         |                       |       |                       |
+         |  local/temp variables |       | local/temp variables  |
+         |                       |       |                       |
+         +-----------------------+       +-----------------------+
+         |                       |       |                       |
+         |  arguments on stack   |       | arguments on stack    |
+         |                       |       |                       |
+     SP  +-----------------------+       +-----------------------+
+                                         | reg parm save area    |
+                                         | only created for      |
+                                         | variable arg fns      |
+                                     AP  +-----------------------+
+                                         | return addr register  |
+                                         | (if required)         |
+                                         +-----------------------+
+                                         |                       |
+                                         | reg save area         |
+                                         |                       |
+                                         +-----------------------+
+                                         | frame pointer         |
+                                         | (if required)         |
+                                     FP  +-----------------------+
+                                         |                       |
+                                         | local/temp variables  |
+                                         |                       |
+                                         +-----------------------+
+                                         |                       |
+                                         | arguments on stack    |
+   low                                   |                       |
+   mem                               SP  +-----------------------+
+ 
+ Notes:
+ 1) The "reg parm save area" does not exist for non variable argument fns.
+    The "reg parm save area" can be eliminated completely if we created our
+    own va-arc.h, but that has tradeoffs as well (so it's not done).  */
+ 
+ /* Structure to be filled in by arc_compute_frame_size with register
+    save masks, and offsets for the current function.  */
+ struct GTY (()) arc_frame_info
+ {
+   unsigned int total_size;	/* # bytes that the entire frame takes up.  */
+   unsigned int extra_size;	/* # bytes of extra stuff.  */
+   unsigned int pretend_size;	/* # bytes we push and pretend caller did.  */
+   unsigned int args_size;	/* # bytes that outgoing arguments take up.  */
+   unsigned int reg_size;	/* # bytes needed to store regs.  */
+   unsigned int var_size;	/* # bytes that variables take up.  */
+   uint64_t gmask;		/* Mask of saved gp registers.  */
+   bool initialized; /* FALSE if frame size already calculated.  */
+   short millicode_start_reg;
+   short millicode_end_reg;
+   bool save_return_addr;
+ };
+ 
+ /* GMASK bit length -1.  */
+ #define GMASK_LEN 63
+ 
+ /* Defining data structures for per-function information.  */
+ 
+ typedef struct GTY (()) machine_function
+ {
+   unsigned int fn_type;
+   struct arc_frame_info frame_info;
+   /* To keep track of unalignment caused by short insns.  */
+   int unalign;
+   struct arc_ccfsm ccfsm_current;
+   /* Map from uid to ccfsm state during branch shortening.  */
+   rtx ccfsm_current_insn;
+   char arc_reorg_started;
+   char prescan_initialized;
+ } machine_function;
+ 
+ 
  /* Given a symbol RTX (const (symb <+ const_int>), returns its
     alignment.  */
  
*************** get_symbol_alignment (rtx x)
*** 330,350 ****
  /* Return true if x is ok to be used as a small data address.  */
  
  static bool
! legitimate_small_data_address_p (rtx x)
  {
    switch (GET_CODE (x))
      {
      case CONST:
!       return legitimate_small_data_address_p (XEXP (x, 0));
      case SYMBOL_REF:
        return SYMBOL_REF_SMALL_P (x);
      case PLUS:
        {
  	bool p0 = (GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
  	  && SYMBOL_REF_SMALL_P (XEXP (x, 0));
! 	bool p1 = CONST_INT_P (XEXP (x, 1))
! 	  && (INTVAL (XEXP (x, 1)) <= g_switch_value);
! 	return p0 && p1;
        }
      default:
        return false;
--- 463,499 ----
  /* Return true if x is ok to be used as a small data address.  */
  
  static bool
! legitimate_small_data_address_p (rtx x, machine_mode mode)
  {
    switch (GET_CODE (x))
      {
      case CONST:
!       return legitimate_small_data_address_p (XEXP (x, 0), mode);
      case SYMBOL_REF:
        return SYMBOL_REF_SMALL_P (x);
      case PLUS:
        {
  	bool p0 = (GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
  	  && SYMBOL_REF_SMALL_P (XEXP (x, 0));
! 
! 	/* If no constant then we cannot do small data.  */
! 	if (!CONST_INT_P (XEXP (x, 1)))
! 	  return false;
! 
! 	/* Small data relocs works with scalled addresses, check if
! 	   the immediate fits the requirements.  */
! 	switch (GET_MODE_SIZE (mode))
! 	  {
! 	  case 1:
! 	    return p0;
! 	  case 2:
! 	    return p0 && ((INTVAL (XEXP (x, 1)) & 0x1) == 0);
! 	  case 4:
! 	  case 8:
! 	    return p0 && ((INTVAL (XEXP (x, 1)) & 0x3) == 0);
! 	  default:
! 	    return false;
! 	  }
        }
      default:
        return false;
*************** legitimate_scaled_address_p (machine_mod
*** 398,404 ****
      }
  
    /* Scalled addresses for sdata is done other places.  */
!   if (legitimate_small_data_address_p (op))
      return false;
  
    if (CONSTANT_P (XEXP (op, 1)))
--- 547,553 ----
      }
  
    /* Scalled addresses for sdata is done other places.  */
!   if (legitimate_small_data_address_p (op, mode))
      return false;
  
    if (CONSTANT_P (XEXP (op, 1)))
*************** arc_preferred_simd_mode (scalar_mode mod
*** 477,492 ****
  }
  
  /* Implements target hook
!    TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES.  */
  
! static void
! arc_autovectorize_vector_sizes (vector_sizes *sizes)
  {
    if (TARGET_PLUS_QMACW)
      {
!       sizes->quick_push (8);
!       sizes->quick_push (4);
      }
  }
  
  
--- 626,642 ----
  }
  
  /* Implements target hook
!    TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES.  */
  
! static unsigned int
! arc_autovectorize_vector_modes (vector_modes *modes, bool)
  {
    if (TARGET_PLUS_QMACW)
      {
!       modes->quick_push (V4HImode);
!       modes->quick_push (V2HImode);
      }
+   return 0;
  }
  
  
*************** static bool arc_can_follow_jump (const r
*** 512,519 ****
  				 const rtx_insn *followee);
  
  static rtx frame_insn (rtx);
! static void arc_function_arg_advance (cumulative_args_t, machine_mode,
! 				      const_tree, bool);
  static rtx arc_legitimize_address_0 (rtx, rtx, machine_mode mode);
  
  /* initialize the GCC target structure.  */
--- 662,669 ----
  				 const rtx_insn *followee);
  
  static rtx frame_insn (rtx);
! static void arc_function_arg_advance (cumulative_args_t,
! 				      const function_arg_info &);
  static rtx arc_legitimize_address_0 (rtx, rtx, machine_mode mode);
  
  /* initialize the GCC target structure.  */
*************** static rtx arc_legitimize_address_0 (rtx
*** 596,603 ****
  #undef TARGET_VECTORIZE_PREFERRED_SIMD_MODE
  #define TARGET_VECTORIZE_PREFERRED_SIMD_MODE arc_preferred_simd_mode
  
! #undef TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES
! #define TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES arc_autovectorize_vector_sizes
  
  #undef TARGET_CAN_USE_DOLOOP_P
  #define TARGET_CAN_USE_DOLOOP_P arc_can_use_doloop_p
--- 746,753 ----
  #undef TARGET_VECTORIZE_PREFERRED_SIMD_MODE
  #define TARGET_VECTORIZE_PREFERRED_SIMD_MODE arc_preferred_simd_mode
  
! #undef TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES
! #define TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES arc_autovectorize_vector_modes
  
  #undef TARGET_CAN_USE_DOLOOP_P
  #define TARGET_CAN_USE_DOLOOP_P arc_can_use_doloop_p
*************** static rtx arc_legitimize_address_0 (rtx
*** 689,696 ****
  
  #undef TARGET_MODES_TIEABLE_P
  #define TARGET_MODES_TIEABLE_P arc_modes_tieable_p
- #undef TARGET_BUILTIN_SETJMP_FRAME_VALUE
- #define TARGET_BUILTIN_SETJMP_FRAME_VALUE arc_builtin_setjmp_frame_value
  
  /* Try to keep the (mov:DF _, reg) as early as possible so
     that the d<add/sub/mul>h-lr insns appear together and can
--- 839,844 ----
*************** const pass_data pass_data_arc_ifcvt =
*** 833,846 ****
  
  class pass_arc_ifcvt : public rtl_opt_pass
  {
! public:
!   pass_arc_ifcvt(gcc::context *ctxt)
!   : rtl_opt_pass(pass_data_arc_ifcvt, ctxt)
!   {}
  
    /* opt_pass methods: */
!   opt_pass * clone () { return new pass_arc_ifcvt (m_ctxt); }
!   virtual unsigned int execute (function *) { return arc_ifcvt (); }
  };
  
  } // anon namespace
--- 981,1004 ----
  
  class pass_arc_ifcvt : public rtl_opt_pass
  {
!  public:
!  pass_arc_ifcvt (gcc::context *ctxt)
!    : rtl_opt_pass (pass_data_arc_ifcvt, ctxt)
!     {}
  
    /* opt_pass methods: */
!   opt_pass * clone ()
!     {
!       return new pass_arc_ifcvt (m_ctxt);
!     }
!   virtual unsigned int execute (function *)
!   {
!     return arc_ifcvt ();
!   }
!   virtual bool gate (function *)
!   {
!     return (optimize > 1 && !TARGET_NO_COND_EXEC);
!   }
  };
  
  } // anon namespace
*************** const pass_data pass_data_arc_predicate_
*** 870,885 ****
  
  class pass_arc_predicate_delay_insns : public rtl_opt_pass
  {
! public:
!   pass_arc_predicate_delay_insns(gcc::context *ctxt)
!   : rtl_opt_pass(pass_data_arc_predicate_delay_insns, ctxt)
!   {}
  
    /* opt_pass methods: */
    virtual unsigned int execute (function *)
!     {
!       return arc_predicate_delay_insns ();
!     }
  };
  
  } // anon namespace
--- 1028,1047 ----
  
  class pass_arc_predicate_delay_insns : public rtl_opt_pass
  {
!  public:
!  pass_arc_predicate_delay_insns(gcc::context *ctxt)
!    : rtl_opt_pass(pass_data_arc_predicate_delay_insns, ctxt)
!     {}
  
    /* opt_pass methods: */
    virtual unsigned int execute (function *)
!   {
!     return arc_predicate_delay_insns ();
!   }
!   virtual bool gate (function *)
!   {
!     return flag_delayed_branch;
!   }
  };
  
  } // anon namespace
*************** arc_init (void)
*** 972,1001 ****
    arc_punct_chars['&'] = 1;
    arc_punct_chars['+'] = 1;
    arc_punct_chars['_'] = 1;
- 
-   if (optimize > 1 && !TARGET_NO_COND_EXEC)
-     {
-       /* There are two target-independent ifcvt passes, and arc_reorg may do
- 	 one or more arc_ifcvt calls.  */
-       opt_pass *pass_arc_ifcvt_4 = make_pass_arc_ifcvt (g);
-       struct register_pass_info arc_ifcvt4_info
- 	= { pass_arc_ifcvt_4, "dbr", 1, PASS_POS_INSERT_AFTER };
-       struct register_pass_info arc_ifcvt5_info
- 	= { pass_arc_ifcvt_4->clone (), "shorten", 1, PASS_POS_INSERT_BEFORE };
- 
-       register_pass (&arc_ifcvt4_info);
-       register_pass (&arc_ifcvt5_info);
-     }
- 
-   if (flag_delayed_branch)
-     {
-       opt_pass *pass_arc_predicate_delay_insns
- 	= make_pass_arc_predicate_delay_insns (g);
-       struct register_pass_info arc_predicate_delay_info
- 	= { pass_arc_predicate_delay_insns, "dbr", 1, PASS_POS_INSERT_AFTER };
- 
-       register_pass (&arc_predicate_delay_info);
-     }
  }
  
  /* Parse -mirq-ctrl-saved=RegisterRange, blink, lp_copunt.  The
--- 1134,1139 ----
*************** arc_override_options (void)
*** 1305,1313 ****
    if (flag_no_common == 255)
      flag_no_common = !TARGET_NO_SDATA_SET;
  
-   if (TARGET_MIXED_CODE)
-     TARGET_Q_CLASS = 1;
- 
    /* Check for small data option */
    if (!global_options_set.x_g_switch_value && !TARGET_NO_SDATA_SET)
      g_switch_value = TARGET_LL64 ? 8 : 4;
--- 1443,1448 ----
*************** arc_conditional_register_usage (void)
*** 1791,1798 ****
  	 this way, we don't have to carry clobbers of that reg around in every
  	 isntruction that modifies mlo and/or mhi.  */
        strcpy (rname57, "");
!       strcpy (rname58, TARGET_BIG_ENDIAN ? "mhi" : "mlo");
!       strcpy (rname59, TARGET_BIG_ENDIAN ? "mlo" : "mhi");
      }
  
    /* The nature of arc_tp_regno is actually something more like a global
--- 1926,1933 ----
  	 this way, we don't have to carry clobbers of that reg around in every
  	 isntruction that modifies mlo and/or mhi.  */
        strcpy (rname57, "");
!       strcpy (rname58, "mlo");
!       strcpy (rname59, "mhi");
      }
  
    /* The nature of arc_tp_regno is actually something more like a global
*************** arc_conditional_register_usage (void)
*** 1834,1841 ****
    for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
      if (i < ILINK1_REG)
        {
! 	if ((TARGET_Q_CLASS || TARGET_RRQ_CLASS)
! 	    && ((i <= R3_REG) || ((i >= R12_REG) && (i <= R15_REG))))
  	  arc_regno_reg_class[i] = ARCOMPACT16_REGS;
  	else
  	  arc_regno_reg_class[i] = GENERAL_REGS;
--- 1969,1975 ----
    for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
      if (i < ILINK1_REG)
        {
! 	if ((i <= R3_REG) || ((i >= R12_REG) && (i <= R15_REG)))
  	  arc_regno_reg_class[i] = ARCOMPACT16_REGS;
  	else
  	  arc_regno_reg_class[i] = GENERAL_REGS;
*************** arc_handle_fndecl_attribute (tree *node,
*** 2001,2006 ****
--- 2135,2184 ----
    return NULL_TREE;
  }
  
+ /* Type of function DECL.
+ 
+    The result is cached.  To reset the cache at the end of a function,
+    call with DECL = NULL_TREE.  */
+ 
+ static unsigned int
+ arc_compute_function_type (struct function *fun)
+ {
+   tree attr, decl = fun->decl;
+   unsigned int fn_type = fun->machine->fn_type;
+ 
+   if (fn_type != ARC_FUNCTION_UNKNOWN)
+     return fn_type;
+ 
+   /* Check if it is a naked function.  */
+   if (lookup_attribute ("naked", DECL_ATTRIBUTES (decl)) != NULL_TREE)
+     fn_type |= ARC_FUNCTION_NAKED;
+   else
+     fn_type |= ARC_FUNCTION_NORMAL;
+ 
+   /* Now see if this is an interrupt handler.  */
+   attr = lookup_attribute ("interrupt", DECL_ATTRIBUTES (decl));
+   if (attr != NULL_TREE)
+     {
+       tree value, args = TREE_VALUE (attr);
+ 
+       gcc_assert (list_length (args) == 1);
+       value = TREE_VALUE (args);
+       gcc_assert (TREE_CODE (value) == STRING_CST);
+ 
+       if (!strcmp (TREE_STRING_POINTER (value), "ilink1")
+ 	  || !strcmp (TREE_STRING_POINTER (value), "ilink"))
+ 	fn_type |= ARC_FUNCTION_ILINK1;
+       else if (!strcmp (TREE_STRING_POINTER (value), "ilink2"))
+ 	fn_type |= ARC_FUNCTION_ILINK2;
+       else if (!strcmp (TREE_STRING_POINTER (value), "firq"))
+ 	fn_type |= ARC_FUNCTION_FIRQ;
+       else
+ 	gcc_unreachable ();
+     }
+ 
+   return fun->machine->fn_type = fn_type;
+ }
+ 
  /* Implement `TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS' */
  
  static bool
*************** arc_double_limm_p (rtx value)
*** 2246,2257 ****
     create a register parameter block, and then copy any anonymous arguments
     in registers to memory.
  
!    CUM has not been updated for the last named argument which has type TYPE
!    and mode MODE, and we rely on this fact.  */
  
  static void
  arc_setup_incoming_varargs (cumulative_args_t args_so_far,
! 			    machine_mode mode, tree type,
  			    int *pretend_size, int no_rtl)
  {
    int first_anon_arg;
--- 2424,2435 ----
     create a register parameter block, and then copy any anonymous arguments
     in registers to memory.
  
!    CUM has not been updated for the last named argument (which is given
!    by ARG), and we rely on this fact.  */
  
  static void
  arc_setup_incoming_varargs (cumulative_args_t args_so_far,
! 			    const function_arg_info &arg,
  			    int *pretend_size, int no_rtl)
  {
    int first_anon_arg;
*************** arc_setup_incoming_varargs (cumulative_a
*** 2260,2267 ****
    /* We must treat `__builtin_va_alist' as an anonymous arg.  */
  
    next_cum = *get_cumulative_args (args_so_far);
!   arc_function_arg_advance (pack_cumulative_args (&next_cum),
! 			    mode, type, true);
    first_anon_arg = next_cum;
  
    if (FUNCTION_ARG_REGNO_P (first_anon_arg))
--- 2438,2444 ----
    /* We must treat `__builtin_va_alist' as an anonymous arg.  */
  
    next_cum = *get_cumulative_args (args_so_far);
!   arc_function_arg_advance (pack_cumulative_args (&next_cum), arg);
    first_anon_arg = next_cum;
  
    if (FUNCTION_ARG_REGNO_P (first_anon_arg))
*************** frame_stack_add (HOST_WIDE_INT offset)
*** 2407,2580 ****
    return frame_add (stack_pointer_rtx, offset);
  }
  
- /* Traditionally, we push saved registers first in the prologue,
-    then we allocate the rest of the frame - and reverse in the epilogue.
-    This has still its merits for ease of debugging, or saving code size
-    or even execution time if the stack frame is so large that some accesses
-    can't be encoded anymore with offsets in the instruction code when using
-    a different scheme.
-    Also, it would be a good starting point if we got instructions to help
-    with register save/restore.
- 
-    However, often stack frames are small, and the pushing / popping has
-    some costs:
-    - the stack modification prevents a lot of scheduling.
-    - frame allocation / deallocation needs extra instructions.
-    - unless we know that we compile ARC700 user code, we need to put
-      a memory barrier after frame allocation / before deallocation to
-      prevent interrupts clobbering our data in the frame.
-      In particular, we don't have any such guarantees for library functions,
-      which tend to, on the other hand, to have small frames.
- 
-    Thus, for small frames, we'd like to use a different scheme:
-    - The frame is allocated in full with the first prologue instruction,
-      and deallocated in full with the last epilogue instruction.
-      Thus, the instructions in-betwen can be freely scheduled.
-    - If the function has no outgoing arguments on the stack, we can allocate
-      one register save slot at the top of the stack.  This register can then
-      be saved simultanously with frame allocation, and restored with
-      frame deallocation.
-      This register can be picked depending on scheduling considerations,
-      although same though should go into having some set of registers
-      to be potentially lingering after a call, and others to be available
-      immediately - i.e. in the absence of interprocedual optimization, we
-      can use an ABI-like convention for register allocation to reduce
-      stalls after function return.  */
- /* Function prologue/epilogue handlers.  */
- 
- /* ARCompact stack frames look like:
- 
-            Before call                     After call
-   high  +-----------------------+       +-----------------------+
-   mem   |  reg parm save area   |       | reg parm save area    |
-         |  only created for     |       | only created for      |
-         |  variable arg fns     |       | variable arg fns      |
-     AP  +-----------------------+       +-----------------------+
-         |  return addr register |       | return addr register  |
-         |  (if required)        |       | (if required)         |
-         +-----------------------+       +-----------------------+
-         |                       |       |                       |
-         |  reg save area        |       | reg save area         |
-         |                       |       |                       |
-         +-----------------------+       +-----------------------+
-         |  frame pointer        |       | frame pointer         |
-         |  (if required)        |       | (if required)         |
-     FP  +-----------------------+       +-----------------------+
-         |                       |       |                       |
-         |  local/temp variables |       | local/temp variables  |
-         |                       |       |                       |
-         +-----------------------+       +-----------------------+
-         |                       |       |                       |
-         |  arguments on stack   |       | arguments on stack    |
-         |                       |       |                       |
-     SP  +-----------------------+       +-----------------------+
-                                         | reg parm save area    |
-                                         | only created for      |
-                                         | variable arg fns      |
-                                     AP  +-----------------------+
-                                         | return addr register  |
-                                         | (if required)         |
-                                         +-----------------------+
-                                         |                       |
-                                         | reg save area         |
-                                         |                       |
-                                         +-----------------------+
-                                         | frame pointer         |
-                                         | (if required)         |
-                                     FP  +-----------------------+
-                                         |                       |
-                                         | local/temp variables  |
-                                         |                       |
-                                         +-----------------------+
-                                         |                       |
-                                         | arguments on stack    |
-   low                                   |                       |
-   mem                               SP  +-----------------------+
- 
- Notes:
- 1) The "reg parm save area" does not exist for non variable argument fns.
-    The "reg parm save area" can be eliminated completely if we created our
-    own va-arc.h, but that has tradeoffs as well (so it's not done).  */
- 
- /* Structure to be filled in by arc_compute_frame_size with register
-    save masks, and offsets for the current function.  */
- struct GTY (()) arc_frame_info
- {
-   unsigned int total_size;	/* # bytes that the entire frame takes up.  */
-   unsigned int extra_size;	/* # bytes of extra stuff.  */
-   unsigned int pretend_size;	/* # bytes we push and pretend caller did.  */
-   unsigned int args_size;	/* # bytes that outgoing arguments take up.  */
-   unsigned int reg_size;	/* # bytes needed to store regs.  */
-   unsigned int var_size;	/* # bytes that variables take up.  */
-   unsigned int gmask;		/* Mask of saved gp registers.  */
-   bool initialized; /* FALSE if frame size already calculated.  */
-   short millicode_start_reg;
-   short millicode_end_reg;
-   bool save_return_addr;
- };
- 
- /* GMASK bit length -1.  */
- #define GMASK_LEN 31
- 
- /* Defining data structures for per-function information.  */
- 
- typedef struct GTY (()) machine_function
- {
-   unsigned int fn_type;
-   struct arc_frame_info frame_info;
-   /* To keep track of unalignment caused by short insns.  */
-   int unalign;
-   struct arc_ccfsm ccfsm_current;
-   /* Map from uid to ccfsm state during branch shortening.  */
-   rtx ccfsm_current_insn;
-   char arc_reorg_started;
-   char prescan_initialized;
- } machine_function;
- 
- /* Type of function DECL.
- 
-    The result is cached.  To reset the cache at the end of a function,
-    call with DECL = NULL_TREE.  */
- 
- unsigned int
- arc_compute_function_type (struct function *fun)
- {
-   tree attr, decl = fun->decl;
-   unsigned int fn_type = fun->machine->fn_type;
- 
-   if (fn_type != ARC_FUNCTION_UNKNOWN)
-     return fn_type;
- 
-   /* Check if it is a naked function.  */
-   if (lookup_attribute ("naked", DECL_ATTRIBUTES (decl)) != NULL_TREE)
-     fn_type |= ARC_FUNCTION_NAKED;
-   else
-     fn_type |= ARC_FUNCTION_NORMAL;
- 
-   /* Now see if this is an interrupt handler.  */
-   attr = lookup_attribute ("interrupt", DECL_ATTRIBUTES (decl));
-   if (attr != NULL_TREE)
-     {
-       tree value, args = TREE_VALUE (attr);
- 
-       gcc_assert (list_length (args) == 1);
-       value = TREE_VALUE (args);
-       gcc_assert (TREE_CODE (value) == STRING_CST);
- 
-       if (!strcmp (TREE_STRING_POINTER (value), "ilink1")
- 	  || !strcmp (TREE_STRING_POINTER (value), "ilink"))
- 	fn_type |= ARC_FUNCTION_ILINK1;
-       else if (!strcmp (TREE_STRING_POINTER (value), "ilink2"))
- 	fn_type |= ARC_FUNCTION_ILINK2;
-       else if (!strcmp (TREE_STRING_POINTER (value), "firq"))
- 	fn_type |= ARC_FUNCTION_FIRQ;
-       else
- 	gcc_unreachable ();
-     }
- 
-   return fun->machine->fn_type = fn_type;
- }
- 
  /* Helper function to wrap FRAME_POINTER_NEEDED.  We do this as
     FRAME_POINTER_NEEDED will not be true until the IRA (Integrated
     Register Allocator) pass, while we want to get the frame size
--- 2584,2589 ----
*************** arc_compute_function_type (struct functi
*** 2598,2604 ****
     register.
  
     During compilation of a function the frame size is evaluated
!    multiple times, it is not until the reload pass is complete the the
     frame size is considered fixed (it is at this point that space for
     all spills has been allocated).  However the frame_pointer_needed
     variable is not set true until the register allocation pass, as a
--- 2607,2613 ----
     register.
  
     During compilation of a function the frame size is evaluated
!    multiple times, it is not until the reload pass is complete the
     frame size is considered fixed (it is at this point that space for
     all spills has been allocated).  However the frame_pointer_needed
     variable is not set true until the register allocation pass, as a
*************** arc_frame_pointer_needed (void)
*** 2624,2637 ****
  }
  
  /* Tell prologue and epilogue if register REGNO should be saved /
!    restored.  The return address, stack pointer and frame pointer are
!    treated separately.  Don't consider them here.  Addition for pic:
!    The gp register needs to be saved if the current function changes
!    it to access gotoff variables.  FIXME: This will not be needed if
!    we used some arbitrary register instead of r26.  */
  
  static bool
! arc_must_save_register (int regno, struct function *func)
  {
    unsigned int fn_type = arc_compute_function_type (func);
    bool irq_auto_save_p = ((irq_ctrl_saved.irq_save_last_reg >= regno)
--- 2633,2644 ----
  }
  
  /* Tell prologue and epilogue if register REGNO should be saved /
!    restored.  The SPECIAL_P is true when the register may need special
!    ld/st sequence.  The return address, and stack pointer are treated
!    separately.  Don't consider them here.  */
  
  static bool
! arc_must_save_register (int regno, struct function *func, bool special_p)
  {
    unsigned int fn_type = arc_compute_function_type (func);
    bool irq_auto_save_p = ((irq_ctrl_saved.irq_save_last_reg >= regno)
*************** arc_must_save_register (int regno, struc
*** 2661,2668 ****
--- 2668,2748 ----
  
    switch (regno)
      {
+     case ILINK1_REG:
      case RETURN_ADDR_REGNUM:
      case STACK_POINTER_REGNUM:
+       /* The stack pointer and the return address are handled
+ 	 separately.  */
+       return false;
+ 
+     case R30_REG:
+       /* r30 is either used as ilink2 by ARCv1 or as a free register
+ 	 by ARCv2.  */
+       if (!TARGET_V2)
+ 	return false;
+       break;
+ 
+     case R40_REG:
+     case R41_REG:
+     case R42_REG:
+     case R43_REG:
+     case R44_REG:
+       /* If those ones are used by the FPX machinery, we handle them
+ 	 separately.  */
+       if (TARGET_DPFP && !special_p)
+ 	return false;
+       /* FALLTHRU.  */
+ 
+     case R32_REG:
+     case R33_REG:
+     case R34_REG:
+     case R35_REG:
+     case R36_REG:
+     case R37_REG:
+     case R38_REG:
+     case R39_REG:
+     case R45_REG:
+     case R46_REG:
+     case R47_REG:
+     case R48_REG:
+     case R49_REG:
+     case R50_REG:
+     case R51_REG:
+     case R52_REG:
+     case R53_REG:
+     case R54_REG:
+     case R55_REG:
+     case R56_REG:
+     case R57_REG:
+       /* The Extension Registers.  */
+       if (ARC_INTERRUPT_P (fn_type)
+ 	  && (df_regs_ever_live_p (RETURN_ADDR_REGNUM)
+ 	      || df_regs_ever_live_p (regno))
+ 	  /* Not all extension registers are available, choose the
+ 	     real ones.  */
+ 	  && !fixed_regs[regno])
+ 	return true;
+       return false;
+ 
+     case R58_REG:
+     case R59_REG:
+       /* ARC600 specifies those ones as mlo/mhi registers, otherwise
+ 	 just handle them like any other extension register.  */
+       if (ARC_INTERRUPT_P (fn_type)
+ 	  && (df_regs_ever_live_p (RETURN_ADDR_REGNUM)
+ 	      || df_regs_ever_live_p (regno))
+ 	  /* Not all extension registers are available, choose the
+ 	     real ones.  */
+ 	  && ((!fixed_regs[regno] && !special_p)
+ 	      || (TARGET_MUL64_SET && special_p)))
+ 	return true;
+       return false;
+ 
+     case 61:
+     case 62:
+     case 63:
+       /* Fixed/control register, nothing to do.  LP_COUNT is
+ 	 different.  */
        return false;
  
      case HARD_FRAME_POINTER_REGNUM:
*************** arc_must_save_register (int regno, struc
*** 2670,2687 ****
  	 regular reg.  */
        if (arc_frame_pointer_needed ())
  	return false;
  
-       /* FALLTHRU */
      default:
!       if (df_regs_ever_live_p (regno)
! 	  && (!call_used_regs[regno]
! 	      || ARC_INTERRUPT_P (fn_type))
! 	  /* Do not emit code for auto saved regs.  */
! 	  && !irq_auto_save_p
! 	  && !firq_auto_save_p)
! 	return true;
      }
  
    return false;
  }
  
--- 2750,2770 ----
  	 regular reg.  */
        if (arc_frame_pointer_needed ())
  	return false;
+       break;
  
      default:
!       break;
      }
  
+   if (((df_regs_ever_live_p (regno) && !call_used_or_fixed_reg_p (regno))
+        /* In an interrupt save everything.  */
+        || (ARC_INTERRUPT_P (fn_type)
+ 	   && (df_regs_ever_live_p (RETURN_ADDR_REGNUM)
+ 	       || df_regs_ever_live_p (regno))))
+       /* Do not emit code for auto saved regs.  */
+       && !irq_auto_save_p
+       && !firq_auto_save_p)
+     return true;
    return false;
  }
  
*************** arc_must_save_return_addr (struct functi
*** 2705,2718 ****
     of registers to be saved / restored with a millicode call.  */
  
  static int
! arc_compute_millicode_save_restore_regs (unsigned int gmask,
  					 struct arc_frame_info *frame)
  {
    int regno;
  
    int start_reg = 13, end_reg = 25;
  
!   for (regno = start_reg; regno <= end_reg && (gmask & (1L << regno));)
      regno++;
    end_reg = regno - 1;
    /* There is no point in using millicode thunks if we don't save/restore
--- 2788,2801 ----
     of registers to be saved / restored with a millicode call.  */
  
  static int
! arc_compute_millicode_save_restore_regs (uint64_t gmask,
  					 struct arc_frame_info *frame)
  {
    int regno;
  
    int start_reg = 13, end_reg = 25;
  
!   for (regno = start_reg; regno <= end_reg && (gmask & (1ULL << regno));)
      regno++;
    end_reg = regno - 1;
    /* There is no point in using millicode thunks if we don't save/restore
*************** arc_compute_frame_size (void)
*** 2736,2746 ****
    int regno;
    unsigned int total_size, var_size, args_size, pretend_size, extra_size;
    unsigned int reg_size;
!   unsigned int gmask;
    struct arc_frame_info *frame_info;
    int size;
    unsigned int extra_plus_reg_size;
    unsigned int extra_plus_reg_size_aligned;
  
    /* The answer might already be known.  */
    if (cfun->machine->frame_info.initialized)
--- 2819,2830 ----
    int regno;
    unsigned int total_size, var_size, args_size, pretend_size, extra_size;
    unsigned int reg_size;
!   uint64_t gmask;
    struct arc_frame_info *frame_info;
    int size;
    unsigned int extra_plus_reg_size;
    unsigned int extra_plus_reg_size_aligned;
+   unsigned int fn_type = arc_compute_function_type (cfun);
  
    /* The answer might already be known.  */
    if (cfun->machine->frame_info.initialized)
*************** arc_compute_frame_size (void)
*** 2764,2775 ****
    reg_size = 0;
    gmask = 0;
  
!   for (regno = 0; regno <= 31; regno++)
      {
!       if (arc_must_save_register (regno, cfun))
  	{
  	  reg_size += UNITS_PER_WORD;
! 	  gmask |= 1L << regno;
  	}
      }
  
--- 2848,2860 ----
    reg_size = 0;
    gmask = 0;
  
!   /* The last 4 regs are special, avoid them.  */
!   for (regno = 0; regno <= (GMASK_LEN - 4); regno++)
      {
!       if (arc_must_save_register (regno, cfun, false))
  	{
  	  reg_size += UNITS_PER_WORD;
! 	  gmask |= 1ULL << regno;
  	}
      }
  
*************** arc_compute_frame_size (void)
*** 2784,2790 ****
      for (regno = 0; EH_RETURN_DATA_REGNO (regno) != INVALID_REGNUM; regno++)
        {
  	reg_size += UNITS_PER_WORD;
! 	gmask |= 1L << regno;
        }
  
    /* Check if we need to save the return address.  */
--- 2869,2875 ----
      for (regno = 0; EH_RETURN_DATA_REGNO (regno) != INVALID_REGNUM; regno++)
        {
  	reg_size += UNITS_PER_WORD;
! 	gmask |= 1ULL << regno;
        }
  
    /* Check if we need to save the return address.  */
*************** arc_compute_frame_size (void)
*** 2794,2810 ****
  
    /* Saving blink reg for millicode thunk calls.  */
    if (TARGET_MILLICODE_THUNK_SET
        && !crtl->calls_eh_return)
      {
        if (arc_compute_millicode_save_restore_regs (gmask, frame_info))
  	frame_info->save_return_addr = true;
      }
  
    /* 4) Calculate extra size made up of the blink + fp size.  */
    extra_size = 0;
    if (arc_must_save_return_addr (cfun))
      extra_size = 4;
!   if (arc_frame_pointer_needed ())
      extra_size += 4;
  
    /* 5) Space for variable arguments passed in registers */
--- 2879,2915 ----
  
    /* Saving blink reg for millicode thunk calls.  */
    if (TARGET_MILLICODE_THUNK_SET
+       && !ARC_INTERRUPT_P (fn_type)
        && !crtl->calls_eh_return)
      {
        if (arc_compute_millicode_save_restore_regs (gmask, frame_info))
  	frame_info->save_return_addr = true;
      }
  
+   /* Save lp_count, lp_start and lp_end.  */
+   if (arc_lpcwidth != 0 && arc_must_save_register (LP_COUNT, cfun, true))
+     reg_size += UNITS_PER_WORD * 3;
+ 
+   /* Check for the special R40-R44 regs used by FPX extension.  */
+   if (arc_must_save_register (TARGET_BIG_ENDIAN ? R41_REG : R40_REG,
+ 			      cfun, TARGET_DPFP))
+     reg_size += UNITS_PER_WORD * 2;
+   if (arc_must_save_register (TARGET_BIG_ENDIAN ? R43_REG : R42_REG,
+ 			      cfun, TARGET_DPFP))
+     reg_size += UNITS_PER_WORD * 2;
+ 
+   /* Check for special MLO/MHI case used by ARC600' MUL64
+      extension.  */
+   if (arc_must_save_register (R58_REG, cfun, TARGET_MUL64_SET))
+     reg_size += UNITS_PER_WORD * 2;
+ 
    /* 4) Calculate extra size made up of the blink + fp size.  */
    extra_size = 0;
    if (arc_must_save_return_addr (cfun))
      extra_size = 4;
!   /* Add FP size only when it is not autosaved.  */
!   if (arc_frame_pointer_needed ()
!       && !ARC_AUTOFP_IRQ_P (fn_type))
      extra_size += 4;
  
    /* 5) Space for variable arguments passed in registers */
*************** frame_save_reg (rtx reg, HOST_WIDE_INT o
*** 2934,2939 ****
--- 3039,3060 ----
    return GET_MODE_SIZE (GET_MODE (reg)) - offset;
  }
  
+ /* Helper used when saving AUX regs during ISR.  */
+ 
+ static int
+ push_reg (rtx reg)
+ {
+   rtx stkslot = gen_rtx_MEM (GET_MODE (reg), gen_rtx_PRE_DEC (Pmode,
+ 						   stack_pointer_rtx));
+   rtx insn = emit_move_insn (stkslot, reg);
+   RTX_FRAME_RELATED_P (insn) = 1;
+   add_reg_note (insn, REG_CFA_ADJUST_CFA,
+ 		gen_rtx_SET (stack_pointer_rtx,
+ 			     plus_constant (Pmode, stack_pointer_rtx,
+ 					    -GET_MODE_SIZE (GET_MODE (reg)))));
+   return GET_MODE_SIZE (GET_MODE (reg));
+ }
+ 
  /* Helper for epilogue: emit frame load with post_modify or post_inc
     to restore register REG from stack.  The initial offset is passed
     via OFFSET.  */
*************** frame_restore_reg (rtx reg, HOST_WIDE_IN
*** 2972,2983 ****
    return GET_MODE_SIZE (GET_MODE (reg)) + offset;
  }
  
  /* Check if we have a continous range to be save/restored with the
     help of enter/leave instructions.  A vaild register range starts
     from $r13 and is up to (including) $r26.  */
  
  static bool
! arc_enter_leave_p (unsigned int gmask)
  {
    int regno;
    unsigned int rmask = 0;
--- 3093,3120 ----
    return GET_MODE_SIZE (GET_MODE (reg)) + offset;
  }
  
+ /* Helper used when restoring AUX regs during ISR.  */
+ 
+ static int
+ pop_reg (rtx reg)
+ {
+   rtx stkslot = gen_rtx_MEM (GET_MODE (reg), gen_rtx_POST_INC (Pmode,
+ 						   stack_pointer_rtx));
+   rtx insn = emit_move_insn (reg, stkslot);
+   RTX_FRAME_RELATED_P (insn) = 1;
+   add_reg_note (insn, REG_CFA_ADJUST_CFA,
+ 		gen_rtx_SET (stack_pointer_rtx,
+ 			     plus_constant (Pmode, stack_pointer_rtx,
+ 					    GET_MODE_SIZE (GET_MODE (reg)))));
+   return GET_MODE_SIZE (GET_MODE (reg));
+ }
+ 
  /* Check if we have a continous range to be save/restored with the
     help of enter/leave instructions.  A vaild register range starts
     from $r13 and is up to (including) $r26.  */
  
  static bool
! arc_enter_leave_p (uint64_t gmask)
  {
    int regno;
    unsigned int rmask = 0;
*************** arc_enter_leave_p (unsigned int gmask)
*** 2986,2993 ****
      return false;
  
    for (regno = ENTER_LEAVE_START_REG;
!        regno <= ENTER_LEAVE_END_REG && (gmask & (1L << regno)); regno++)
!     rmask |= 1L << regno;
  
    if (rmask ^ gmask)
      return false;
--- 3123,3130 ----
      return false;
  
    for (regno = ENTER_LEAVE_START_REG;
!        regno <= ENTER_LEAVE_END_REG && (gmask & (1ULL << regno)); regno++)
!     rmask |= 1ULL << regno;
  
    if (rmask ^ gmask)
      return false;
*************** arc_enter_leave_p (unsigned int gmask)
*** 3000,3012 ****
     instructions.  */
  
  static int
! arc_save_callee_saves (unsigned int gmask,
  		       bool save_blink,
  		       bool save_fp,
! 		       HOST_WIDE_INT offset)
  {
    rtx reg;
    int frame_allocated = 0;
  
    /* The home-grown ABI says link register is saved first.  */
    if (save_blink)
--- 3137,3151 ----
     instructions.  */
  
  static int
! arc_save_callee_saves (uint64_t gmask,
  		       bool save_blink,
  		       bool save_fp,
! 		       HOST_WIDE_INT offset,
! 		       bool emit_move)
  {
    rtx reg;
    int frame_allocated = 0;
+   int i;
  
    /* The home-grown ABI says link register is saved first.  */
    if (save_blink)
*************** arc_save_callee_saves (unsigned int gmas
*** 3018,3036 ****
  
    /* N.B. FRAME_POINTER_MASK and RETURN_ADDR_MASK are cleared in gmask.  */
    if (gmask)
!     for (int i = 31; i >= 0; i--)
        {
  	machine_mode save_mode = SImode;
  
  	if (TARGET_LL64
  	    && ((i - 1) % 2 == 0)
! 	    && ((gmask & (1L << i)) != 0)
! 	    && ((gmask & (1L << (i - 1))) != 0))
  	  {
  	    save_mode = DImode;
  	    --i;
  	  }
! 	else if ((gmask & (1L << i)) == 0)
  	  continue;
  
  	reg = gen_rtx_REG (save_mode, i);
--- 3157,3175 ----
  
    /* N.B. FRAME_POINTER_MASK and RETURN_ADDR_MASK are cleared in gmask.  */
    if (gmask)
!     for (i = GMASK_LEN; i >= 0; i--)
        {
  	machine_mode save_mode = SImode;
  
  	if (TARGET_LL64
  	    && ((i - 1) % 2 == 0)
! 	    && ((gmask & (1ULL << i)) != 0)
! 	    && ((gmask & (1ULL << (i - 1))) != 0))
  	  {
  	    save_mode = DImode;
  	    --i;
  	  }
! 	else if ((gmask & (1ULL << i)) == 0)
  	  continue;
  
  	reg = gen_rtx_REG (save_mode, i);
*************** arc_save_callee_saves (unsigned int gmas
*** 3049,3055 ****
      }
  
    /* Emit mov fp,sp.  */
!   if (arc_frame_pointer_needed ())
      frame_move (hard_frame_pointer_rtx, stack_pointer_rtx);
  
    return frame_allocated;
--- 3188,3194 ----
      }
  
    /* Emit mov fp,sp.  */
!   if (emit_move)
      frame_move (hard_frame_pointer_rtx, stack_pointer_rtx);
  
    return frame_allocated;
*************** arc_save_callee_saves (unsigned int gmas
*** 3059,3065 ****
     if it is for an interrupt handler) using LD/LDD instructions.  */
  
  static int
! arc_restore_callee_saves (unsigned int gmask,
  			  bool restore_blink,
  			  bool restore_fp,
  			  HOST_WIDE_INT offset,
--- 3198,3204 ----
     if it is for an interrupt handler) using LD/LDD instructions.  */
  
  static int
! arc_restore_callee_saves (uint64_t gmask,
  			  bool restore_blink,
  			  bool restore_fp,
  			  HOST_WIDE_INT offset,
*************** arc_restore_callee_saves (unsigned int g
*** 3068,3074 ****
--- 3207,3215 ----
    rtx reg;
    int frame_deallocated = 0;
    HOST_WIDE_INT offs = cfun->machine->frame_info.reg_size;
+   unsigned int fn_type = arc_compute_function_type (cfun);
    bool early_blink_restore;
+   int i;
  
    /* Emit mov fp,sp.  */
    if (arc_frame_pointer_needed () && offset)
*************** arc_restore_callee_saves (unsigned int g
*** 3094,3101 ****
        offset = 0;
      }
  
!   /* When we do not optimize for size, restore first blink.  */
!   early_blink_restore = restore_blink && !optimize_size && offs;
    if (early_blink_restore)
      {
        rtx addr = plus_constant (Pmode, stack_pointer_rtx, offs);
--- 3235,3244 ----
        offset = 0;
      }
  
!   /* When we do not optimize for size or we aren't in an interrupt,
!      restore first blink.  */
!   early_blink_restore = restore_blink && !optimize_size && offs
!     && !ARC_INTERRUPT_P (fn_type);
    if (early_blink_restore)
      {
        rtx addr = plus_constant (Pmode, stack_pointer_rtx, offs);
*************** arc_restore_callee_saves (unsigned int g
*** 3108,3123 ****
  
    /* N.B. FRAME_POINTER_MASK and RETURN_ADDR_MASK are cleared in gmask.  */
    if (gmask)
!     for (int i = 0; i <= GMASK_LEN; i++)
        {
  	machine_mode restore_mode = SImode;
  
  	if (TARGET_LL64
  	    && ((i % 2) == 0)
! 	    && ((gmask & (1L << i)) != 0)
! 	    && ((gmask & (1L << (i + 1))) != 0))
  	  restore_mode = DImode;
! 	else if ((gmask & (1L << i)) == 0)
  	  continue;
  
  	reg = gen_rtx_REG (restore_mode, i);
--- 3251,3266 ----
  
    /* N.B. FRAME_POINTER_MASK and RETURN_ADDR_MASK are cleared in gmask.  */
    if (gmask)
!     for (i = 0; i <= GMASK_LEN; i++)
        {
  	machine_mode restore_mode = SImode;
  
  	if (TARGET_LL64
  	    && ((i % 2) == 0)
! 	    && ((gmask & (1ULL << i)) != 0)
! 	    && ((gmask & (1ULL << (i + 1))) != 0))
  	  restore_mode = DImode;
! 	else if ((gmask & (1ULL << i)) == 0)
  	  continue;
  
  	reg = gen_rtx_REG (restore_mode, i);
*************** arc_restore_callee_saves (unsigned int g
*** 3125,3136 ****
  	switch (restore_mode)
  	  {
  	  case E_DImode:
! 	    if ((GMASK_LEN - __builtin_clz (gmask)) == (i + 1)
  		&& early_blink_restore)
  	      offs = 4;
  	    break;
  	  case E_SImode:
! 	    if ((GMASK_LEN - __builtin_clz (gmask)) == i
  		&& early_blink_restore)
  	      offs = 4;
  	    break;
--- 3268,3279 ----
  	switch (restore_mode)
  	  {
  	  case E_DImode:
! 	    if ((GMASK_LEN - __builtin_clzll (gmask)) == (i + 1)
  		&& early_blink_restore)
  	      offs = 4;
  	    break;
  	  case E_SImode:
! 	    if ((GMASK_LEN - __builtin_clzll (gmask)) == i
  		&& early_blink_restore)
  	      offs = 4;
  	    break;
*************** arc_restore_callee_saves (unsigned int g
*** 3163,3169 ****
     register.  */
  
  static int
! arc_save_callee_enter (unsigned int gmask,
  		       bool save_blink,
  		       bool save_fp,
  		       HOST_WIDE_INT offset)
--- 3306,3312 ----
     register.  */
  
  static int
! arc_save_callee_enter (uint64_t gmask,
  		       bool save_blink,
  		       bool save_fp,
  		       HOST_WIDE_INT offset)
*************** arc_save_callee_enter (unsigned int gmas
*** 3174,3180 ****
    rtx insn, reg, mem;
    int frame_allocated = 0;
  
!   for (regno = start_reg; regno <= end_reg && (gmask & (1L << regno));)
      regno++;
  
    end_reg = regno - 1;
--- 3317,3323 ----
    rtx insn, reg, mem;
    int frame_allocated = 0;
  
!   for (regno = start_reg; regno <= end_reg && (gmask & (1ULL << regno));)
      regno++;
  
    end_reg = regno - 1;
*************** arc_save_callee_enter (unsigned int gmas
*** 3219,3225 ****
  						  off));
        XVECEXP (insn, 0, indx) = gen_rtx_SET (mem, reg);
        RTX_FRAME_RELATED_P (XVECEXP (insn, 0, indx)) = 1;
!       gmask = gmask & ~(1L << regno);
      }
  
    if (save_fp)
--- 3362,3368 ----
  						  off));
        XVECEXP (insn, 0, indx) = gen_rtx_SET (mem, reg);
        RTX_FRAME_RELATED_P (XVECEXP (insn, 0, indx)) = 1;
!       gmask = gmask & ~(1ULL << regno);
      }
  
    if (save_fp)
*************** arc_save_callee_enter (unsigned int gmas
*** 3254,3260 ****
     (RESTORE_FP), and can automatic return (RETURN_P).  */
  
  static int
! arc_restore_callee_leave (unsigned int gmask,
  			  bool restore_blink,
  			  bool restore_fp,
  			  bool return_p,
--- 3397,3403 ----
     (RESTORE_FP), and can automatic return (RETURN_P).  */
  
  static int
! arc_restore_callee_leave (uint64_t gmask,
  			  bool restore_blink,
  			  bool restore_fp,
  			  bool return_p,
*************** arc_restore_callee_leave (unsigned int g
*** 3266,3272 ****
    rtx insn, reg, mem;
    int frame_allocated = 0;
  
!   for (regno = start_reg; regno <= end_reg && (gmask & (1L << regno));)
      regno++;
  
    end_reg = regno - 1;
--- 3409,3415 ----
    rtx insn, reg, mem;
    int frame_allocated = 0;
  
!   for (regno = start_reg; regno <= end_reg && (gmask & (1ULL << regno));)
      regno++;
  
    end_reg = regno - 1;
*************** arc_restore_callee_leave (unsigned int g
*** 3327,3333 ****
  						  off));
        XVECEXP (insn, 0, indx) = gen_rtx_SET (reg, mem);
        RTX_FRAME_RELATED_P (XVECEXP (insn, 0, indx)) = 1;
!       gmask = gmask & ~(1L << regno);
      }
  
    if (restore_fp)
--- 3470,3476 ----
  						  off));
        XVECEXP (insn, 0, indx) = gen_rtx_SET (reg, mem);
        RTX_FRAME_RELATED_P (XVECEXP (insn, 0, indx)) = 1;
!       gmask = gmask & ~(1ULL << regno);
      }
  
    if (restore_fp)
*************** arc_restore_callee_leave (unsigned int g
*** 3390,3396 ****
  */
  
  static int
! arc_save_callee_milli (unsigned int gmask,
  		       bool save_blink,
  		       bool save_fp,
  		       HOST_WIDE_INT offset,
--- 3533,3539 ----
  */
  
  static int
! arc_save_callee_milli (uint64_t gmask,
  		       bool save_blink,
  		       bool save_fp,
  		       HOST_WIDE_INT offset,
*************** arc_save_callee_milli (unsigned int gmas
*** 3402,3408 ****
    rtx insn, reg, mem;
    int frame_allocated = 0;
  
!   for (regno = start_reg; regno <= end_reg && (gmask & (1L << regno));)
      regno++;
  
    end_reg = regno - 1;
--- 3545,3551 ----
    rtx insn, reg, mem;
    int frame_allocated = 0;
  
!   for (regno = start_reg; regno <= end_reg && (gmask & (1ULL << regno));)
      regno++;
  
    end_reg = regno - 1;
*************** arc_save_callee_milli (unsigned int gmas
*** 3445,3451 ****
  						  off));
        XVECEXP (insn, 0, indx) = gen_rtx_SET (mem, reg);
        RTX_FRAME_RELATED_P (XVECEXP (insn, 0, indx)) = 1;
!       gmask = gmask & ~(1L << regno);
      }
    insn = frame_insn (insn);
  
--- 3588,3594 ----
  						  off));
        XVECEXP (insn, 0, indx) = gen_rtx_SET (mem, reg);
        RTX_FRAME_RELATED_P (XVECEXP (insn, 0, indx)) = 1;
!       gmask = gmask & ~(1ULL << regno);
      }
    insn = frame_insn (insn);
  
*************** arc_save_callee_milli (unsigned int gmas
*** 3473,3481 ****
      }
  
    /* Save remaining registers using st instructions.  */
!   for (regno = 0; regno <= 31; regno++)
      {
!       if ((gmask & (1L << regno)) == 0)
  	continue;
  
        reg = gen_rtx_REG (SImode, regno);
--- 3616,3624 ----
      }
  
    /* Save remaining registers using st instructions.  */
!   for (regno = 0; regno <= GMASK_LEN; regno++)
      {
!       if ((gmask & (1ULL << regno)) == 0)
  	continue;
  
        reg = gen_rtx_REG (SImode, regno);
*************** arc_save_callee_milli (unsigned int gmas
*** 3504,3510 ****
  /* Like the previous function but restore.  */
  
  static int
! arc_restore_callee_milli (unsigned int gmask,
  			  bool restore_blink,
  			  bool restore_fp,
  			  bool return_p,
--- 3647,3653 ----
  /* Like the previous function but restore.  */
  
  static int
! arc_restore_callee_milli (uint64_t gmask,
  			  bool restore_blink,
  			  bool restore_fp,
  			  bool return_p,
*************** arc_restore_callee_milli (unsigned int g
*** 3516,3522 ****
    rtx insn, reg, mem;
    int frame_allocated = 0;
  
!   for (regno = start_reg; regno <= end_reg && (gmask & (1L << regno));)
      regno++;
  
    end_reg = regno - 1;
--- 3659,3665 ----
    rtx insn, reg, mem;
    int frame_allocated = 0;
  
!   for (regno = start_reg; regno <= end_reg && (gmask & (1ULL << regno));)
      regno++;
  
    end_reg = regno - 1;
*************** arc_restore_callee_milli (unsigned int g
*** 3576,3588 ****
  						  off));
        XVECEXP (insn, 0, indx) = gen_rtx_SET (reg, mem);
        RTX_FRAME_RELATED_P (XVECEXP (insn, 0, indx)) = 1;
!       gmask = gmask & ~(1L << regno);
      }
  
    /* Restore remaining registers using LD instructions.  */
!   for (regno = 0; regno <= 31; regno++)
      {
!       if ((gmask & (1L << regno)) == 0)
  	continue;
  
        reg = gen_rtx_REG (SImode, regno);
--- 3719,3731 ----
  						  off));
        XVECEXP (insn, 0, indx) = gen_rtx_SET (reg, mem);
        RTX_FRAME_RELATED_P (XVECEXP (insn, 0, indx)) = 1;
!       gmask = gmask & ~(1ULL << regno);
      }
  
    /* Restore remaining registers using LD instructions.  */
!   for (regno = 0; regno <= GMASK_LEN; regno++)
      {
!       if ((gmask & (1ULL << regno)) == 0)
  	continue;
  
        reg = gen_rtx_REG (SImode, regno);
*************** void
*** 3632,3644 ****
  arc_expand_prologue (void)
  {
    int size;
!   unsigned int gmask = cfun->machine->frame_info.gmask;
    struct arc_frame_info *frame = &cfun->machine->frame_info;
    unsigned int frame_size_to_allocate;
    int first_offset = 0;
    unsigned int fn_type = arc_compute_function_type (cfun);
    bool save_blink = false;
    bool save_fp = false;
  
    /* Naked functions don't have prologue.  */
    if (ARC_NAKED_P (fn_type))
--- 3775,3788 ----
  arc_expand_prologue (void)
  {
    int size;
!   uint64_t gmask = cfun->machine->frame_info.gmask;
    struct arc_frame_info *frame = &cfun->machine->frame_info;
    unsigned int frame_size_to_allocate;
    int first_offset = 0;
    unsigned int fn_type = arc_compute_function_type (cfun);
    bool save_blink = false;
    bool save_fp = false;
+   bool emit_move = false;
  
    /* Naked functions don't have prologue.  */
    if (ARC_NAKED_P (fn_type))
*************** arc_expand_prologue (void)
*** 3676,3682 ****
  
    save_blink = arc_must_save_return_addr (cfun)
      && !ARC_AUTOBLINK_IRQ_P (fn_type);
!   save_fp = arc_frame_pointer_needed () && !ARC_AUTOFP_IRQ_P (fn_type);
  
    /* Use enter/leave only for non-interrupt functions.  */
    if (TARGET_CODE_DENSITY
--- 3820,3828 ----
  
    save_blink = arc_must_save_return_addr (cfun)
      && !ARC_AUTOBLINK_IRQ_P (fn_type);
!   save_fp = arc_frame_pointer_needed () && !ARC_AUTOFP_IRQ_P (fn_type)
!     && !ARC_INTERRUPT_P (fn_type);
!   emit_move = arc_frame_pointer_needed () && !ARC_INTERRUPT_P (fn_type);
  
    /* Use enter/leave only for non-interrupt functions.  */
    if (TARGET_CODE_DENSITY
*************** arc_expand_prologue (void)
*** 3695,3701 ****
  						     frame->reg_size);
    else
      frame_size_to_allocate -= arc_save_callee_saves (gmask, save_blink, save_fp,
! 						     first_offset);
  
    /* Allocate the stack frame.  */
    if (frame_size_to_allocate > 0)
--- 3841,3895 ----
  						     frame->reg_size);
    else
      frame_size_to_allocate -= arc_save_callee_saves (gmask, save_blink, save_fp,
! 						     first_offset, emit_move);
! 
!   /* Check if we need to save the ZOL machinery.  */
!   if (arc_lpcwidth != 0 && arc_must_save_register (LP_COUNT, cfun, true))
!     {
!       rtx reg0 = gen_rtx_REG (SImode, R0_REG);
!       emit_insn (gen_rtx_SET (reg0,
! 			      gen_rtx_UNSPEC_VOLATILE
! 			      (Pmode, gen_rtvec (1, GEN_INT (AUX_LP_START)),
! 			       VUNSPEC_ARC_LR)));
!       frame_size_to_allocate -= push_reg (reg0);
!       emit_insn (gen_rtx_SET (reg0,
! 			      gen_rtx_UNSPEC_VOLATILE
! 			      (Pmode, gen_rtvec (1, GEN_INT (AUX_LP_END)),
! 			       VUNSPEC_ARC_LR)));
!       frame_size_to_allocate -= push_reg (reg0);
!       emit_move_insn (reg0, gen_rtx_REG (SImode, LP_COUNT));
!       frame_size_to_allocate -= push_reg (reg0);
!     }
! 
!   /* Save AUX regs used by FPX machinery.  */
!   if (arc_must_save_register (TARGET_BIG_ENDIAN ? R41_REG : R40_REG,
! 			      cfun, TARGET_DPFP))
!     {
!       rtx reg0 = gen_rtx_REG (SImode, R0_REG);
!       int i;
! 
!       for (i = 0; i < 4; i++)
! 	{
! 	  emit_insn (gen_rtx_SET (reg0,
! 				  gen_rtx_UNSPEC_VOLATILE
! 				  (Pmode, gen_rtvec (1, GEN_INT (AUX_DPFP_START
! 								 + i)),
! 				   VUNSPEC_ARC_LR)));
! 	  frame_size_to_allocate -= push_reg (reg0);
! 	}
!     }
! 
!   /* Save ARC600' MUL64 registers.  */
!   if (arc_must_save_register (R58_REG, cfun, true))
!     frame_size_to_allocate -= arc_save_callee_saves (3ULL << 58,
! 						     false, false, 0, false);
! 
!   if (arc_frame_pointer_needed () && ARC_INTERRUPT_P (fn_type))
!     {
!       /* Just save fp at the end of the saving context.  */
!       frame_size_to_allocate -=
! 	arc_save_callee_saves (0, false, !ARC_AUTOFP_IRQ_P (fn_type), 0, true);
!     }
  
    /* Allocate the stack frame.  */
    if (frame_size_to_allocate > 0)
*************** arc_expand_prologue (void)
*** 3705,3710 ****
--- 3899,3928 ----
    emit_insn (gen_blockage ());
  }
  
+ /* Return the register number of the register holding the return address
+    for a function of type TYPE.  */
+ 
+ static int
+ arc_return_address_register (unsigned int fn_type)
+ {
+   int regno = 0;
+ 
+   if (ARC_INTERRUPT_P (fn_type))
+     {
+       if ((fn_type & (ARC_FUNCTION_ILINK1 | ARC_FUNCTION_FIRQ)) != 0)
+ 	regno = ILINK1_REG;
+       else if ((fn_type & ARC_FUNCTION_ILINK2) != 0)
+ 	regno = ILINK2_REG;
+       else
+ 	gcc_unreachable ();
+     }
+   else if (ARC_NORMAL_P (fn_type) || ARC_NAKED_P (fn_type))
+     regno = RETURN_ADDR_REGNUM;
+ 
+   gcc_assert (regno != 0);
+   return regno;
+ }
+ 
  /* Do any necessary cleanup after a function to restore stack, frame,
     and regs.  */
  
*************** arc_expand_epilogue (int sibcall_p)
*** 3720,3731 ****
    bool restore_fp = arc_frame_pointer_needed () && !ARC_AUTOFP_IRQ_P (fn_type);
    bool restore_blink = arc_must_save_return_addr (cfun)
      && !ARC_AUTOBLINK_IRQ_P (fn_type);
!   unsigned int gmask = cfun->machine->frame_info.gmask;
    bool return_p = !sibcall_p && fn_type == ARC_FUNCTION_NORMAL
  		   && !cfun->machine->frame_info.pretend_size;
    struct arc_frame_info *frame = &cfun->machine->frame_info;
  
- 
    /* Naked functions don't have epilogue.  */
    if (ARC_NAKED_P (fn_type))
      return;
--- 3938,3948 ----
    bool restore_fp = arc_frame_pointer_needed () && !ARC_AUTOFP_IRQ_P (fn_type);
    bool restore_blink = arc_must_save_return_addr (cfun)
      && !ARC_AUTOBLINK_IRQ_P (fn_type);
!   uint64_t gmask = cfun->machine->frame_info.gmask;
    bool return_p = !sibcall_p && fn_type == ARC_FUNCTION_NORMAL
  		   && !cfun->machine->frame_info.pretend_size;
    struct arc_frame_info *frame = &cfun->machine->frame_info;
  
    /* Naked functions don't have epilogue.  */
    if (ARC_NAKED_P (fn_type))
      return;
*************** arc_expand_epilogue (int sibcall_p)
*** 3743,3748 ****
--- 3960,4033 ----
    if (size)
      emit_insn (gen_blockage ());
  
+   if (ARC_INTERRUPT_P (fn_type) && restore_fp)
+     {
+       /* We need to restore FP before any SP operation in an
+ 	 interrupt.  */
+       size_to_deallocate -= arc_restore_callee_saves (0, false,
+ 						      restore_fp,
+ 						      first_offset,
+ 						      size_to_deallocate);
+       restore_fp = false;
+       first_offset = 0;
+     }
+ 
+   /* Restore ARC600' MUL64 registers.  */
+   if (arc_must_save_register (R58_REG, cfun, true))
+     {
+       rtx insn;
+       rtx reg0 = gen_rtx_REG (SImode, R0_REG);
+       rtx reg1 = gen_rtx_REG (SImode, R1_REG);
+       size_to_deallocate -= pop_reg (reg0);
+       size_to_deallocate -= pop_reg (reg1);
+ 
+       insn = emit_insn (gen_mulu64 (reg0, const1_rtx));
+       add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (SImode, R58_REG));
+       RTX_FRAME_RELATED_P (insn) = 1;
+       emit_insn (gen_arc600_stall ());
+       insn = emit_insn (gen_rtx_UNSPEC_VOLATILE
+ 			(VOIDmode, gen_rtvec (2, reg1, GEN_INT (AUX_MULHI)),
+ 			 VUNSPEC_ARC_SR));
+       add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (SImode, R59_REG));
+       RTX_FRAME_RELATED_P (insn) = 1;
+     }
+ 
+   /* Restore AUX-regs used by FPX machinery.  */
+   if (arc_must_save_register (TARGET_BIG_ENDIAN ? R41_REG : R40_REG,
+ 			      cfun, TARGET_DPFP))
+     {
+       rtx reg0 = gen_rtx_REG (SImode, R0_REG);
+       int i;
+ 
+       for (i = 0; i < 4; i++)
+ 	{
+ 	  size_to_deallocate -= pop_reg (reg0);
+ 	  emit_insn (gen_rtx_UNSPEC_VOLATILE
+ 		     (VOIDmode, gen_rtvec (2, reg0, GEN_INT (AUX_DPFP_START
+ 							     + i)),
+ 		      VUNSPEC_ARC_SR));
+ 	}
+     }
+ 
+   /* Check if we need to restore the ZOL machinery.  */
+   if (arc_lpcwidth !=0 && arc_must_save_register (LP_COUNT, cfun, true))
+     {
+       rtx reg0 = gen_rtx_REG (SImode, R0_REG);
+ 
+       size_to_deallocate -= pop_reg (reg0);
+       emit_move_insn (gen_rtx_REG (SImode, LP_COUNT), reg0);
+ 
+       size_to_deallocate -= pop_reg (reg0);
+       emit_insn (gen_rtx_UNSPEC_VOLATILE
+ 		 (VOIDmode, gen_rtvec (2, reg0, GEN_INT (AUX_LP_END)),
+ 		  VUNSPEC_ARC_SR));
+ 
+       size_to_deallocate -= pop_reg (reg0);
+       emit_insn (gen_rtx_UNSPEC_VOLATILE
+ 		 (VOIDmode, gen_rtvec (2, reg0, GEN_INT (AUX_LP_START)),
+ 		  VUNSPEC_ARC_SR));
+     }
+ 
    if (TARGET_CODE_DENSITY
        && TARGET_CODE_DENSITY_FRAME
        && !ARC_AUTOFP_IRQ_P (fn_type)
*************** arc_expand_epilogue (int sibcall_p)
*** 3800,3806 ****
  			      EH_RETURN_STACKADJ_RTX));
  
    /* Emit the return instruction.  */
!   if (sibcall_p == FALSE)
      emit_jump_insn (gen_simple_return ());
  }
  
--- 4085,4102 ----
  			      EH_RETURN_STACKADJ_RTX));
  
    /* Emit the return instruction.  */
!   if (ARC_INTERRUPT_P (fn_type))
!     {
!       rtx ra = gen_rtx_REG (Pmode, arc_return_address_register (fn_type));
! 
!       if (TARGET_V2)
! 	emit_jump_insn (gen_rtie ());
!       else if (TARGET_ARC700)
! 	emit_jump_insn (gen_rtie ());
!       else
! 	emit_jump_insn (gen_arc600_rtie (ra));
!     }
!   else if (sibcall_p == FALSE)
      emit_jump_insn (gen_simple_return ());
  }
  
*************** arc_print_operand (FILE *file, rtx x, in
*** 4226,4232 ****
  
      case 'z':
        if (GET_CODE (x) == CONST_INT)
! 	fprintf (file, "%d",exact_log2(INTVAL (x)) );
        else
  	output_operand_lossage ("invalid operand to %%z code");
  
--- 4522,4528 ----
  
      case 'z':
        if (GET_CODE (x) == CONST_INT)
! 	fprintf (file, "%d",exact_log2 (INTVAL (x) & 0xffffffff));
        else
  	output_operand_lossage ("invalid operand to %%z code");
  
*************** arc_print_operand (FILE *file, rtx x, in
*** 4234,4240 ****
  
      case 'c':
        if (GET_CODE (x) == CONST_INT)
!         fprintf (file, "%ld", INTVAL (x) );
        else
          output_operand_lossage ("invalid operands to %%c code");
  
--- 4530,4536 ----
  
      case 'c':
        if (GET_CODE (x) == CONST_INT)
!         fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) );
        else
          output_operand_lossage ("invalid operands to %%c code");
  
*************** arc_print_operand (FILE *file, rtx x, in
*** 4428,4434 ****
  		  /* No special treatment for jli_fixed functions.  */
  		  if (code == 'j')
  		    break;
! 		  fprintf (file, "%ld\t; @",
  			   TREE_INT_CST_LOW (TREE_VALUE (TREE_VALUE (attrs))));
  		  assemble_name (file, XSTR (x, 0));
  		  return;
--- 4724,4730 ----
  		  /* No special treatment for jli_fixed functions.  */
  		  if (code == 'j')
  		    break;
! 		  fprintf (file, HOST_WIDE_INT_PRINT_DEC "\t; @",
  			   TREE_INT_CST_LOW (TREE_VALUE (TREE_VALUE (attrs))));
  		  assemble_name (file, XSTR (x, 0));
  		  return;
*************** arc_print_operand (FILE *file, rtx x, in
*** 4449,4455 ****
  	  tree attrs = (TREE_TYPE (SYMBOL_REF_DECL (x)) != error_mark_node
  			? TYPE_ATTRIBUTES (TREE_TYPE (SYMBOL_REF_DECL (x)))
  			: NULL_TREE);
! 	  fprintf (file, "%ld\t; @",
  		   TREE_INT_CST_LOW (TREE_VALUE (TREE_VALUE (attrs))));
  	  assemble_name (file, XSTR (x, 0));
  	  return;
--- 4745,4751 ----
  	  tree attrs = (TREE_TYPE (SYMBOL_REF_DECL (x)) != error_mark_node
  			? TYPE_ATTRIBUTES (TREE_TYPE (SYMBOL_REF_DECL (x)))
  			: NULL_TREE);
! 	  fprintf (file, HOST_WIDE_INT_PRINT_DEC "\t; @",
  		   TREE_INT_CST_LOW (TREE_VALUE (TREE_VALUE (attrs))));
  	  assemble_name (file, XSTR (x, 0));
  	  return;
*************** arc_print_operand (FILE *file, rtx x, in
*** 4530,4536 ****
  	      break;
  	    case SYMBOL_REF:
  	    case CONST:
! 	      if (legitimate_small_data_address_p (addr)
  		  && GET_MODE_SIZE (GET_MODE (x)) > 1)
  		{
  		  int align = get_symbol_alignment (addr);
--- 4826,4832 ----
  	      break;
  	    case SYMBOL_REF:
  	    case CONST:
! 	      if (legitimate_small_data_address_p (addr, GET_MODE (x))
  		  && GET_MODE_SIZE (GET_MODE (x)) > 1)
  		{
  		  int align = get_symbol_alignment (addr);
*************** arc_print_operand (FILE *file, rtx x, in
*** 4663,4669 ****
  	rtx addr = XEXP (x, 0);
  	int size = GET_MODE_SIZE (GET_MODE (x));
  
! 	if (legitimate_small_data_address_p (addr))
  	  output_sdata = 1;
  
  	fputc ('[', file);
--- 4959,4965 ----
  	rtx addr = XEXP (x, 0);
  	int size = GET_MODE_SIZE (GET_MODE (x));
  
! 	if (legitimate_small_data_address_p (addr, GET_MODE (x)))
  	  output_sdata = 1;
  
  	fputc ('[', file);
*************** static void
*** 5325,5330 ****
--- 5621,5628 ----
  output_short_suffix (FILE *file)
  {
    rtx_insn *insn = current_output_insn;
+   if (!insn)
+     return;
  
    if (arc_verify_short (insn, cfun->machine->unalign, 1))
      {
*************** arc_rtx_costs (rtx x, machine_mode mode,
*** 5563,5605 ****
      case CONST_INT:
        {
  	bool nolimm = false; /* Can we do without long immediate?  */
- 	bool fast = false; /* Is the result available immediately?  */
- 	bool condexec = false; /* Does this allow conditiobnal execution?  */
- 	bool compact = false; /* Is a 16 bit opcode available?  */
- 	/* CONDEXEC also implies that we can have an unconditional
- 	   3-address operation.  */
  
! 	nolimm = compact = condexec = false;
  	if (UNSIGNED_INT6 (INTVAL (x)))
! 	  nolimm = condexec = compact = true;
  	else
  	  {
- 	    if (SMALL_INT (INTVAL (x)))
- 	      nolimm = fast = true;
  	    switch (outer_code)
  	      {
  	      case AND: /* bclr, bmsk, ext[bw] */
  		if (satisfies_constraint_Ccp (x) /* bclr */
  		    || satisfies_constraint_C1p (x) /* bmsk */)
! 		  nolimm = fast = condexec = compact = true;
  		break;
  	      case IOR: /* bset */
  		if (satisfies_constraint_C0p (x)) /* bset */
! 		  nolimm = fast = condexec = compact = true;
  		break;
  	      case XOR:
  		if (satisfies_constraint_C0p (x)) /* bxor */
! 		  nolimm = fast = condexec = true;
  		break;
  	      case SET:
! 		if (satisfies_constraint_Crr (x)) /* ror b,u6 */
  		  nolimm = true;
  	      default:
  		break;
  	      }
  	  }
- 	/* FIXME: Add target options to attach a small cost if
- 	   condexec / compact is not true.  */
  	if (nolimm)
  	  {
  	    *total = 0;
--- 5861,5904 ----
      case CONST_INT:
        {
  	bool nolimm = false; /* Can we do without long immediate?  */
  
! 	nolimm = false;
  	if (UNSIGNED_INT6 (INTVAL (x)))
! 	  nolimm = true;
  	else
  	  {
  	    switch (outer_code)
  	      {
  	      case AND: /* bclr, bmsk, ext[bw] */
  		if (satisfies_constraint_Ccp (x) /* bclr */
  		    || satisfies_constraint_C1p (x) /* bmsk */)
! 		  nolimm = true;
  		break;
  	      case IOR: /* bset */
  		if (satisfies_constraint_C0p (x)) /* bset */
! 		  nolimm = true;
  		break;
  	      case XOR:
  		if (satisfies_constraint_C0p (x)) /* bxor */
! 		  nolimm = true;
  		break;
  	      case SET:
! 		if (UNSIGNED_INT8 (INTVAL (x)))
! 		  nolimm = true;
! 		if (satisfies_constraint_Chi (x))
! 		  nolimm = true;
! 		if (satisfies_constraint_Clo (x))
  		  nolimm = true;
+ 		break;
+ 	      case MULT:
+ 		if (TARGET_MUL64_SET)
+ 		  if (SIGNED_INT12 (INTVAL (x)))
+ 		    nolimm = true;
+ 		break;
  	      default:
  		break;
  	      }
  	  }
  	if (nolimm)
  	  {
  	    *total = 0;
*************** arc_rtx_costs (rtx x, machine_mode mode,
*** 5613,5619 ****
      case CONST:
      case LABEL_REF:
      case SYMBOL_REF:
!       *total = COSTS_N_INSNS (1);
        return true;
  
      case CONST_DOUBLE:
--- 5912,5918 ----
      case CONST:
      case LABEL_REF:
      case SYMBOL_REF:
!       *total = speed ? COSTS_N_INSNS (1) : COSTS_N_INSNS (4);
        return true;
  
      case CONST_DOUBLE:
*************** arc_rtx_costs (rtx x, machine_mode mode,
*** 5639,5654 ****
      case LSHIFTRT:
        if (TARGET_BARREL_SHIFTER)
  	{
- 	  /* If we want to shift a constant, we need a LIMM.  */
- 	  /* ??? when the optimizers want to know if a constant should be
- 	     hoisted, they ask for the cost of the constant.  OUTER_CODE is
- 	     insufficient context for shifts since we don't know which operand
- 	     we are looking at.  */
  	  if (CONSTANT_P (XEXP (x, 0)))
  	    {
! 	      *total += (COSTS_N_INSNS (2)
! 			 + rtx_cost (XEXP (x, 1), mode, (enum rtx_code) code,
! 				     0, speed));
  	      return true;
  	    }
  	  *total = COSTS_N_INSNS (1);
--- 5938,5947 ----
      case LSHIFTRT:
        if (TARGET_BARREL_SHIFTER)
  	{
  	  if (CONSTANT_P (XEXP (x, 0)))
  	    {
! 	      *total += rtx_cost (XEXP (x, 1), mode, (enum rtx_code) code,
! 				  0, speed);
  	      return true;
  	    }
  	  *total = COSTS_N_INSNS (1);
*************** arc_rtx_costs (rtx x, machine_mode mode,
*** 5668,5674 ****
  
      case DIV:
      case UDIV:
!       if (speed)
  	*total = COSTS_N_INSNS(30);
        else
  	*total = COSTS_N_INSNS(1);
--- 5961,5973 ----
  
      case DIV:
      case UDIV:
!       if (GET_MODE_CLASS (mode) == MODE_FLOAT
! 	  && (TARGET_FP_SP_SQRT || TARGET_FP_DP_SQRT))
! 	*total = COSTS_N_INSNS(1);
!       else if (GET_MODE_CLASS (mode) == MODE_INT
! 	       && TARGET_DIVREM)
! 	*total = COSTS_N_INSNS(1);
!       else if (speed)
  	*total = COSTS_N_INSNS(30);
        else
  	*total = COSTS_N_INSNS(1);
*************** arc_rtx_costs (rtx x, machine_mode mode,
*** 5681,5699 ****
  	*total= arc_multcost;
        /* We do not want synth_mult sequences when optimizing
  	 for size.  */
!       else if (TARGET_MUL64_SET || TARGET_ARC700_MPY)
  	*total = COSTS_N_INSNS (1);
        else
  	*total = COSTS_N_INSNS (2);
        return false;
      case PLUS:
        if ((GET_CODE (XEXP (x, 0)) == ASHIFT
  	   && _1_2_3_operand (XEXP (XEXP (x, 0), 1), VOIDmode))
            || (GET_CODE (XEXP (x, 0)) == MULT
                && _2_4_8_operand (XEXP (XEXP (x, 0), 1), VOIDmode)))
  	{
! 	  *total += (rtx_cost (XEXP (x, 1), mode, PLUS, 0, speed)
! 		     + rtx_cost (XEXP (XEXP (x, 0), 0), mode, PLUS, 1, speed));
  	  return true;
  	}
        return false;
--- 5980,6007 ----
  	*total= arc_multcost;
        /* We do not want synth_mult sequences when optimizing
  	 for size.  */
!       else if (TARGET_ANY_MPY)
  	*total = COSTS_N_INSNS (1);
        else
  	*total = COSTS_N_INSNS (2);
        return false;
+ 
      case PLUS:
+       if (outer_code == MEM && CONST_INT_P (XEXP (x, 1))
+ 	  && RTX_OK_FOR_OFFSET_P (mode, XEXP (x, 1)))
+ 	{
+ 	  *total = 0;
+ 	  return true;
+ 	}
+ 
        if ((GET_CODE (XEXP (x, 0)) == ASHIFT
  	   && _1_2_3_operand (XEXP (XEXP (x, 0), 1), VOIDmode))
            || (GET_CODE (XEXP (x, 0)) == MULT
                && _2_4_8_operand (XEXP (XEXP (x, 0), 1), VOIDmode)))
  	{
! 	  if (CONSTANT_P (XEXP (x, 1)) && !speed)
! 	    *total += COSTS_N_INSNS (4);
! 	  *total += rtx_cost (XEXP (XEXP (x, 0), 0), mode, PLUS, 1, speed);
  	  return true;
  	}
        return false;
*************** arc_rtx_costs (rtx x, machine_mode mode,
*** 5703,5713 ****
            || (GET_CODE (XEXP (x, 1)) == MULT
                && _2_4_8_operand (XEXP (XEXP (x, 1), 1), VOIDmode)))
  	{
! 	  *total += (rtx_cost (XEXP (x, 0), mode, PLUS, 0, speed)
! 		     + rtx_cost (XEXP (XEXP (x, 1), 0), mode, PLUS, 1, speed));
  	  return true;
  	}
        return false;
      case COMPARE:
        {
  	rtx op0 = XEXP (x, 0);
--- 6011,6023 ----
            || (GET_CODE (XEXP (x, 1)) == MULT
                && _2_4_8_operand (XEXP (XEXP (x, 1), 1), VOIDmode)))
  	{
! 	  if (CONSTANT_P (XEXP (x, 0)) && !speed)
! 	    *total += COSTS_N_INSNS (4);
! 	  *total += rtx_cost (XEXP (XEXP (x, 1), 0), mode, PLUS, 1, speed);
  	  return true;
  	}
        return false;
+ 
      case COMPARE:
        {
  	rtx op0 = XEXP (x, 0);
*************** arc_output_pic_addr_const (FILE * file,
*** 6223,6239 ****
  /* Implement TARGET_ARG_PARTIAL_BYTES.  */
  
  static int
! arc_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode,
! 		       tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   int bytes = (mode == BLKmode
! 	       ? int_size_in_bytes (type) : (int) GET_MODE_SIZE (mode));
    int words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
    int arg_num = *cum;
    int ret;
  
!   arg_num = ROUND_ADVANCE_CUM (arg_num, mode, type);
    ret = GPR_REST_ARG_REGS (arg_num);
  
    /* ICEd at function.c:2361, and ret is copied to data->partial */
--- 6533,6547 ----
  /* Implement TARGET_ARG_PARTIAL_BYTES.  */
  
  static int
! arc_arg_partial_bytes (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   int bytes = arg.promoted_size_in_bytes ();
    int words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
    int arg_num = *cum;
    int ret;
  
!   arg_num = ROUND_ADVANCE_CUM (arg_num, arg.mode, arg.type);
    ret = GPR_REST_ARG_REGS (arg_num);
  
    /* ICEd at function.c:2361, and ret is copied to data->partial */
*************** arc_arg_partial_bytes (cumulative_args_t
*** 6242,6304 ****
    return ret;
  }
  
! /* This function is used to control a function argument is passed in a
!    register, and which register.
! 
!    The arguments are CUM, of type CUMULATIVE_ARGS, which summarizes
!    (in a way defined by INIT_CUMULATIVE_ARGS and FUNCTION_ARG_ADVANCE)
!    all of the previous arguments so far passed in registers; MODE, the
!    machine mode of the argument; TYPE, the data type of the argument
!    as a tree node or 0 if that is not known (which happens for C
!    support library functions); and NAMED, which is 1 for an ordinary
!    argument and 0 for nameless arguments that correspond to `...' in
!    the called function's prototype.
! 
!    The returned value should either be a `reg' RTX for the hard
!    register in which to pass the argument, or zero to pass the
!    argument on the stack.
! 
!    For machines like the Vax and 68000, where normally all arguments
!    are pushed, zero suffices as a definition.
! 
!    The usual way to make the ANSI library `stdarg.h' work on a machine
!    where some arguments are usually passed in registers, is to cause
!    nameless arguments to be passed on the stack instead.  This is done
!    by making the function return 0 whenever NAMED is 0.
! 
!    You may use the macro `MUST_PASS_IN_STACK (MODE, TYPE)' in the
!    definition of this function to determine if this argument is of a
!    type that must be passed in the stack.  If `REG_PARM_STACK_SPACE'
!    is not defined and the function returns non-zero for such an
!    argument, the compiler will abort.  If `REG_PARM_STACK_SPACE' is
!    defined, the argument will be computed in the stack and then loaded
!    into a register.
! 
!    The function is used to implement macro FUNCTION_ARG.  */
! /* On the ARC the first MAX_ARC_PARM_REGS args are normally in registers
!    and the rest are pushed.  */
  
  static rtx
! arc_function_arg (cumulative_args_t cum_v,
! 		  machine_mode mode,
! 		  const_tree type ATTRIBUTE_UNUSED,
! 		  bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    int arg_num = *cum;
    rtx ret;
    const char *debstr ATTRIBUTE_UNUSED;
  
!   arg_num = ROUND_ADVANCE_CUM (arg_num, mode, type);
    /* Return a marker for use in the call instruction.  */
!   if (mode == VOIDmode)
      {
        ret = const0_rtx;
        debstr = "<0>";
      }
    else if (GPR_REST_ARG_REGS (arg_num) > 0)
      {
!       ret = gen_rtx_REG (mode, arg_num);
        debstr = reg_names [arg_num];
      }
    else
--- 6550,6576 ----
    return ret;
  }
  
! /* Implement TARGET_FUNCTION_ARG.  On the ARC the first MAX_ARC_PARM_REGS
!    args are normally in registers and the rest are pushed.  */
  
  static rtx
! arc_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    int arg_num = *cum;
    rtx ret;
    const char *debstr ATTRIBUTE_UNUSED;
  
!   arg_num = ROUND_ADVANCE_CUM (arg_num, arg.mode, arg.type);
    /* Return a marker for use in the call instruction.  */
!   if (arg.end_marker_p ())
      {
        ret = const0_rtx;
        debstr = "<0>";
      }
    else if (GPR_REST_ARG_REGS (arg_num) > 0)
      {
!       ret = gen_rtx_REG (arg.mode, arg_num);
        debstr = reg_names [arg_num];
      }
    else
*************** arc_function_arg (cumulative_args_t cum_
*** 6309,6325 ****
    return ret;
  }
  
! /* The function to update the summarizer variable *CUM to advance past
!    an argument in the argument list.  The values MODE, TYPE and NAMED
!    describe that argument.  Once this is done, the variable *CUM is
!    suitable for analyzing the *following* argument with
!    `FUNCTION_ARG', etc.
! 
!    This function need not do anything if the argument in question was
!    passed on the stack.  The compiler knows how to track the amount of
!    stack space used for arguments without any special help.
! 
!    The function is used to implement macro FUNCTION_ARG_ADVANCE.  */
  /* For the ARC: the cum set here is passed on to function_arg where we
     look at its value and say which reg to use. Strategy: advance the
     regnumber here till we run out of arg regs, then set *cum to last
--- 6581,6587 ----
    return ret;
  }
  
! /* Implement TARGET_FUNCTION_ARG_ADVANCE.  */
  /* For the ARC: the cum set here is passed on to function_arg where we
     look at its value and say which reg to use. Strategy: advance the
     regnumber here till we run out of arg regs, then set *cum to last
*************** arc_function_arg (cumulative_args_t cum_
*** 6329,6346 ****
  
  static void
  arc_function_arg_advance (cumulative_args_t cum_v,
! 			  machine_mode mode,
! 			  const_tree type,
! 			  bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   int bytes = (mode == BLKmode
! 	       ? int_size_in_bytes (type) : (int) GET_MODE_SIZE (mode));
    int words = (bytes + UNITS_PER_WORD  - 1) / UNITS_PER_WORD;
    int i;
  
    if (words)
!     *cum = ROUND_ADVANCE_CUM (*cum, mode, type);
    for (i = 0; i < words; i++)
      *cum = ARC_NEXT_ARG_REG (*cum);
  
--- 6591,6605 ----
  
  static void
  arc_function_arg_advance (cumulative_args_t cum_v,
! 			  const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   int bytes = arg.promoted_size_in_bytes ();
    int words = (bytes + UNITS_PER_WORD  - 1) / UNITS_PER_WORD;
    int i;
  
    if (words)
!     *cum = ROUND_ADVANCE_CUM (*cum, arg.mode, arg.type);
    for (i = 0; i < words; i++)
      *cum = ARC_NEXT_ARG_REG (*cum);
  
*************** arc_legitimate_address_p (machine_mode m
*** 6458,6464 ****
       return true;
    if (legitimate_scaled_address_p (mode, x, strict))
      return true;
!   if (legitimate_small_data_address_p (x))
       return true;
    if (GET_CODE (x) == CONST_INT && LARGE_INT (INTVAL (x)))
       return true;
--- 6717,6723 ----
       return true;
    if (legitimate_scaled_address_p (mode, x, strict))
      return true;
!   if (legitimate_small_data_address_p (x, mode))
       return true;
    if (GET_CODE (x) == CONST_INT && LARGE_INT (INTVAL (x)))
       return true;
*************** arc_expand_builtin (tree exp,
*** 6787,6793 ****
  		    int ignore ATTRIBUTE_UNUSED)
  {
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   unsigned int id = DECL_FUNCTION_CODE (fndecl);
    const struct arc_builtin_description *d = &arc_bdesc[id];
    int i, j, n_args = call_expr_nargs (exp);
    rtx pat = NULL_RTX;
--- 7046,7052 ----
  		    int ignore ATTRIBUTE_UNUSED)
  {
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   unsigned int id = DECL_MD_FUNCTION_CODE (fndecl);
    const struct arc_builtin_description *d = &arc_bdesc[id];
    int i, j, n_args = call_expr_nargs (exp);
    rtx pat = NULL_RTX;
*************** arc_output_mi_thunk (FILE *file, tree th
*** 7228,7233 ****
--- 7487,7493 ----
  		     HOST_WIDE_INT vcall_offset,
  		     tree function)
  {
+   const char *fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunk));
    int mi_delta = delta;
    const char *const mi_op = mi_delta < 0 ? "sub" : "add";
    int shift = 0;
*************** arc_output_mi_thunk (FILE *file, tree th
*** 7235,7240 ****
--- 7495,7502 ----
      = aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function) ? 1 : 0;
    rtx fnaddr;
  
+   assemble_start_function (thunk, fnname);
+ 
    if (mi_delta < 0)
      mi_delta = - mi_delta;
  
*************** arc_output_mi_thunk (FILE *file, tree th
*** 7298,7303 ****
--- 7560,7566 ----
  	fputs ("@plt\n", file);
      }
    fputc ('\n', file);
+   assemble_end_function (thunk, fnname);
  }
  
  /* Return true if a 32 bit "long_call" should be generated for
*************** arc_return_in_memory (const_tree type, c
*** 7355,7368 ****
  }
  
  static bool
! arc_pass_by_reference (cumulative_args_t ca_v ATTRIBUTE_UNUSED,
! 		       machine_mode mode ATTRIBUTE_UNUSED,
! 		       const_tree type,
! 		       bool named ATTRIBUTE_UNUSED)
  {
!   return (type != 0
! 	  && (TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST
! 	      || TREE_ADDRESSABLE (type)));
  }
  
  /* Implement TARGET_CAN_USE_DOLOOP_P.  */
--- 7618,7628 ----
  }
  
  static bool
! arc_pass_by_reference (cumulative_args_t, const function_arg_info &arg)
  {
!   return (arg.type != 0
! 	  && (TREE_CODE (TYPE_SIZE (arg.type)) != INTEGER_CST
! 	      || TREE_ADDRESSABLE (arg.type)));
  }
  
  /* Implement TARGET_CAN_USE_DOLOOP_P.  */
*************** hwloop_optimize (hwloop_info loop)
*** 7843,7849 ****
  	  return false;
  	}
        if (dump_file)
! 	fprintf (dump_file, ";; loop %d has a control like last insn;"
  		 "add a nop\n",
  		 loop->loop_no);
  
--- 8103,8109 ----
  	  return false;
  	}
        if (dump_file)
! 	fprintf (dump_file, ";; loop %d has a control like last insn; "
  		 "add a nop\n",
  		 loop->loop_no);
  
*************** hwloop_optimize (hwloop_info loop)
*** 7853,7859 ****
    if (LABEL_P (last_insn))
      {
        if (dump_file)
! 	fprintf (dump_file, ";; loop %d has a label as last insn;"
  		 "add a nop\n",
  		 loop->loop_no);
        last_insn = emit_insn_after (gen_nopv (), last_insn);
--- 8113,8119 ----
    if (LABEL_P (last_insn))
      {
        if (dump_file)
! 	fprintf (dump_file, ";; loop %d has a label as last insn; "
  		 "add a nop\n",
  		 loop->loop_no);
        last_insn = emit_insn_after (gen_nopv (), last_insn);
*************** hwloop_optimize (hwloop_info loop)
*** 7880,7886 ****
    if (entry_edge == NULL)
      {
        if (dump_file)
! 	fprintf (dump_file, ";; loop %d has no fallthru edge jumping"
  		 "into the loop\n",
  		 loop->loop_no);
        return false;
--- 8140,8146 ----
    if (entry_edge == NULL)
      {
        if (dump_file)
! 	fprintf (dump_file, ";; loop %d has no fallthru edge jumping "
  		 "into the loop\n",
  		 loop->loop_no);
        return false;
*************** compact_sda_memory_operand (rtx op, mach
*** 8504,8510 ****
    /* Decode the address now.  */
    addr = XEXP (op, 0);
  
!   if (!legitimate_small_data_address_p (addr))
      return false;
  
    if (!short_p || size == 1)
--- 8764,8770 ----
    /* Decode the address now.  */
    addr = XEXP (op, 0);
  
!   if (!legitimate_small_data_address_p (addr, mode))
      return false;
  
    if (!short_p || size == 1)
*************** arc_output_commutative_cond_exec (rtx *o
*** 8790,8796 ****
    return 8;
  }
  
! /* Helper function of arc_expand_movmem.  ADDR points to a chunk of memory.
     Emit code and return an potentially modified address such that offsets
     up to SIZE are can be added to yield a legitimate address.
     if REUSE is set, ADDR is a register that may be modified.  */
--- 9050,9056 ----
    return 8;
  }
  
! /* Helper function of arc_expand_cpymem.  ADDR points to a chunk of memory.
     Emit code and return an potentially modified address such that offsets
     up to SIZE are can be added to yield a legitimate address.
     if REUSE is set, ADDR is a register that may be modified.  */
*************** force_offsettable (rtx addr, HOST_WIDE_I
*** 8824,8830 ****
     offset ranges.  Return true on success.  */
  
  bool
! arc_expand_movmem (rtx *operands)
  {
    rtx dst = operands[0];
    rtx src = operands[1];
--- 9084,9090 ----
     offset ranges.  Return true on success.  */
  
  bool
! arc_expand_cpymem (rtx *operands)
  {
    rtx dst = operands[0];
    rtx src = operands[1];
*************** arc_get_aux_arg (rtx pat, int *auxr)
*** 8921,8969 ****
  bool
  prepare_move_operands (rtx *operands, machine_mode mode)
  {
!   /* First handle aux attribute.  */
!   if (mode == SImode
!       && (MEM_P (operands[0]) || MEM_P (operands[1])))
      {
!       rtx tmp;
!       int auxr = 0;
!       if (MEM_P (operands[0]) && arc_is_aux_reg_p (operands[0]))
  	{
! 	  /* Save operation.  */
! 	  if (arc_get_aux_arg (operands[0], &auxr))
  	    {
! 	      tmp = gen_reg_rtx (SImode);
! 	      emit_move_insn (tmp, GEN_INT (auxr));
  	    }
! 	  else
  	    {
! 	      tmp = XEXP (operands[0], 0);
  	    }
! 
! 	  operands[1] = force_reg (SImode, operands[1]);
  	  emit_insn (gen_rtx_UNSPEC_VOLATILE
! 		     (VOIDmode, gen_rtvec (2, operands[1], tmp),
! 		      VUNSPEC_ARC_SR));
  	  return true;
  	}
!       if (MEM_P (operands[1]) && arc_is_aux_reg_p (operands[1]))
  	{
! 	  if (arc_get_aux_arg (operands[1], &auxr))
! 	    {
! 	      tmp = gen_reg_rtx (SImode);
! 	      emit_move_insn (tmp, GEN_INT (auxr));
! 	    }
! 	  else
! 	    {
! 	      tmp = XEXP (operands[1], 0);
! 	      gcc_assert (GET_CODE (tmp) == SYMBOL_REF);
! 	    }
! 	  /* Load operation.  */
! 	  gcc_assert (REG_P (operands[0]));
! 	  emit_insn (gen_rtx_SET (operands[0],
! 				  gen_rtx_UNSPEC_VOLATILE
! 				  (SImode, gen_rtvec (1, tmp),
! 				   VUNSPEC_ARC_LR)));
  	  return true;
  	}
      }
--- 9181,9251 ----
  bool
  prepare_move_operands (rtx *operands, machine_mode mode)
  {
!   if ((MEM_P (operands[0]) || MEM_P (operands[1]))
!       && SCALAR_INT_MODE_P (mode))
      {
!       /* First handle aux attribute.  */
!       if (mode == SImode)
  	{
! 	  rtx tmp;
! 	  int auxr = 0;
! 	  if (MEM_P (operands[0]) && arc_is_aux_reg_p (operands[0]))
  	    {
! 	      /* Save operation.  */
! 	      if (arc_get_aux_arg (operands[0], &auxr))
! 		{
! 		  tmp = gen_reg_rtx (SImode);
! 		  emit_move_insn (tmp, GEN_INT (auxr));
! 		}
! 	      else
! 		tmp = XEXP (operands[0], 0);
! 
! 	      operands[1] = force_reg (SImode, operands[1]);
! 	      emit_insn (gen_rtx_UNSPEC_VOLATILE
! 			 (VOIDmode, gen_rtvec (2, operands[1], tmp),
! 			  VUNSPEC_ARC_SR));
! 	      return true;
  	    }
! 	  if (MEM_P (operands[1]) && arc_is_aux_reg_p (operands[1]))
  	    {
! 	      if (arc_get_aux_arg (operands[1], &auxr))
! 		{
! 		  tmp = gen_reg_rtx (SImode);
! 		  emit_move_insn (tmp, GEN_INT (auxr));
! 		}
! 	      else
! 		{
! 		  tmp = XEXP (operands[1], 0);
! 		  gcc_assert (GET_CODE (tmp) == SYMBOL_REF);
! 		}
! 	      /* Load operation.  */
! 	      gcc_assert (REG_P (operands[0]));
! 	      emit_insn (gen_rtx_SET (operands[0],
! 				      gen_rtx_UNSPEC_VOLATILE
! 				      (SImode, gen_rtvec (1, tmp),
! 				       VUNSPEC_ARC_LR)));
! 	      return true;
  	    }
! 	}
!       /* Second, we check for the uncached.  */
!       if (arc_is_uncached_mem_p (operands[0]))
! 	{
! 	  if (!REG_P (operands[1]))
! 	    operands[1] = force_reg (mode, operands[1]);
  	  emit_insn (gen_rtx_UNSPEC_VOLATILE
! 		     (VOIDmode, gen_rtvec (2, operands[0], operands[1]),
! 		      VUNSPEC_ARC_STDI));
  	  return true;
  	}
!       if (arc_is_uncached_mem_p (operands[1]))
  	{
! 	  if (MEM_P (operands[0]))
! 	    operands[0] = force_reg (mode, operands[0]);
! 	  emit_insn (gen_rtx_SET
! 		     (operands[0],
! 		      gen_rtx_UNSPEC_VOLATILE
! 		      (mode, gen_rtvec (1, operands[1]),
! 		       VUNSPEC_ARC_LDDI)));
  	  return true;
  	}
      }
*************** arc600_corereg_hazard (rtx_insn *pred, r
*** 9071,9077 ****
  	  continue;
  	}
        rtx dest = XEXP (x, 0);
!       /* Check if this sets a an extension register.  N.B. we use 61 for the
  	 condition codes, which is definitely not an extension register.  */
        if (REG_P (dest) && REGNO (dest) >= 32 && REGNO (dest) < 61
  	  /* Check if the same register is used by the PAT.  */
--- 9353,9359 ----
  	  continue;
  	}
        rtx dest = XEXP (x, 0);
!       /* Check if this sets an extension register.  N.B. we use 61 for the
  	 condition codes, which is definitely not an extension register.  */
        if (REG_P (dest) && REGNO (dest) >= 32 && REGNO (dest) < 61
  	  /* Check if the same register is used by the PAT.  */
*************** gen_acc2 (void)
*** 9583,9608 ****
    return gen_rtx_REG (SImode, TARGET_BIG_ENDIAN ? 57: 56);
  }
  
- /* Return a REG rtx for mlo.  N.B. the gcc-internal representation may
-    differ from the hardware register number in order to allow the generic
-    code to correctly split the concatenation of mhi and mlo.  */
- 
- rtx
- gen_mlo (void)
- {
-   return gen_rtx_REG (SImode, TARGET_BIG_ENDIAN ? 59: 58);
- }
- 
- /* Return a REG rtx for mhi.  N.B. the gcc-internal representation may
-    differ from the hardware register number in order to allow the generic
-    code to correctly split the concatenation of mhi and mlo.  */
- 
- rtx
- gen_mhi (void)
- {
-   return gen_rtx_REG (SImode, TARGET_BIG_ENDIAN ? 58: 59);
- }
- 
  /* FIXME: a parameter should be added, and code added to final.c,
     to reproduce this functionality in shorten_branches.  */
  #if 0
--- 9865,9870 ----
*************** arc_check_millicode (rtx op, int offset,
*** 9714,9725 ****
  
  /* Accessor functions for cfun->machine->unalign.  */
  
- int
- arc_get_unalign (void)
- {
-   return cfun->machine->unalign;
- }
- 
  void
  arc_clear_unalign (void)
  {
--- 9976,9981 ----
*************** arc_can_follow_jump (const rtx_insn *fol
*** 10154,10182 ****
    return true;
  }
  
- /* Return the register number of the register holding the return address
-    for a function of type TYPE.  */
- 
- int
- arc_return_address_register (unsigned int fn_type)
- {
-   int regno = 0;
- 
-   if (ARC_INTERRUPT_P (fn_type))
-     {
-       if ((fn_type & (ARC_FUNCTION_ILINK1 | ARC_FUNCTION_FIRQ)) != 0)
- 	regno = ILINK1_REG;
-       else if ((fn_type & ARC_FUNCTION_ILINK2) != 0)
- 	regno = ILINK2_REG;
-       else
- 	gcc_unreachable ();
-     }
-   else if (ARC_NORMAL_P (fn_type) || ARC_NAKED_P (fn_type))
-     regno = RETURN_ADDR_REGNUM;
- 
-   gcc_assert (regno != 0);
-   return regno;
- }
  
  /* Implement EPILOGUE_USES.
     Return true if REGNO should be added to the deemed uses of the epilogue.
--- 10410,10415 ----
*************** bool
*** 10189,10213 ****
  arc_epilogue_uses (int regno)
  {
    unsigned int fn_type;
  
    if (regno == arc_tp_regno)
      return true;
  
!   fn_type = arc_compute_function_type (cfun);
!   if (reload_completed)
      {
!       if (ARC_INTERRUPT_P (cfun->machine->fn_type))
! 	{
! 	  if (!fixed_regs[regno])
! 	    return true;
! 	  return ((regno == arc_return_address_register (fn_type))
! 		  || (regno == RETURN_ADDR_REGNUM));
! 	}
!       else
! 	return regno == RETURN_ADDR_REGNUM;
      }
!   else
!     return regno == arc_return_address_register (fn_type);
  }
  
  /* Helper for EH_USES macro.  */
--- 10422,10446 ----
  arc_epilogue_uses (int regno)
  {
    unsigned int fn_type;
+   fn_type = arc_compute_function_type (cfun);
  
    if (regno == arc_tp_regno)
      return true;
  
!   if (regno == RETURN_ADDR_REGNUM)
!     return true;
! 
!   if (regno == arc_return_address_register (fn_type))
!     return true;
! 
!   if (epilogue_completed && ARC_INTERRUPT_P (fn_type))
      {
!       /* An interrupt function restores more registers.  */
!       if (df_regs_ever_live_p (regno) || call_used_or_fixed_reg_p (regno))
! 	return true;
      }
! 
!   return false;
  }
  
  /* Helper for EH_USES macro.  */
*************** arc_use_by_pieces_infrastructure_p (unsi
*** 10334,10340 ****
  				    enum by_pieces_operation op,
  				    bool speed_p)
  {
!   /* Let the movmem expander handle small block moves.  */
    if (op == MOVE_BY_PIECES)
      return false;
  
--- 10567,10573 ----
  				    enum by_pieces_operation op,
  				    bool speed_p)
  {
!   /* Let the cpymem expander handle small block moves.  */
    if (op == MOVE_BY_PIECES)
      return false;
  
*************** compact_memory_operand_p (rtx op, machin
*** 10865,10892 ****
    return false;
  }
  
- /* Return the frame pointer value to be backed up in the setjmp buffer.  */
- 
- static rtx
- arc_builtin_setjmp_frame_value (void)
- {
-   /* We always want to preserve whatever value is currently in the frame
-      pointer register.  For frames that are using the frame pointer the new
-      value of the frame pointer register will have already been computed
-      (as part of the prologue).  For frames that are not using the frame
-      pointer it is important that we backup whatever value is in the frame
-      pointer register, as earlier (more outer) frames may have placed a
-      value into the frame pointer register.  It might be tempting to try
-      and use `frame_pointer_rtx` here, however, this is not what we want.
-      For frames that are using the frame pointer this will give the
-      correct value.  However, for frames that are not using the frame
-      pointer this will still give the value that _would_ have been the
-      frame pointer value for this frame (if the use of the frame pointer
-      had not been removed).  We really do want the raw frame pointer
-      register value.  */
-   return gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
- }
- 
  /* Return nonzero if a jli call should be generated for a call from
     the current function to DECL.  */
  
--- 11098,11103 ----
*************** arc_is_uncached_mem_p (rtx pat)
*** 11043,11066 ****
      return false;
  
    /* Get the attributes.  */
!   if (TREE_CODE (addr) == MEM_REF)
      {
        attrs = TYPE_ATTRIBUTES (TREE_TYPE (addr));
        if (lookup_attribute ("uncached", attrs))
  	return true;
! 
        attrs = TYPE_ATTRIBUTES (TREE_TYPE (TREE_OPERAND (addr, 0)));
        if (lookup_attribute ("uncached", attrs))
  	return true;
-     }
- 
-   /* For COMPONENT_REF, use the FIELD_DECL from tree operand 1.  */
-   if (TREE_CODE (addr) == COMPONENT_REF)
-     {
        attrs = TYPE_ATTRIBUTES (TREE_TYPE (TREE_OPERAND (addr, 1)));
        if (lookup_attribute ("uncached", attrs))
  	return true;
      }
    return false;
  }
  
--- 11254,11293 ----
      return false;
  
    /* Get the attributes.  */
!   if (TREE_CODE (addr) == MEM_REF
!       || TREE_CODE (addr) == VAR_DECL)
      {
        attrs = TYPE_ATTRIBUTES (TREE_TYPE (addr));
        if (lookup_attribute ("uncached", attrs))
  	return true;
!     }
!   if (TREE_CODE (addr) == MEM_REF)
!     {
        attrs = TYPE_ATTRIBUTES (TREE_TYPE (TREE_OPERAND (addr, 0)));
        if (lookup_attribute ("uncached", attrs))
  	return true;
        attrs = TYPE_ATTRIBUTES (TREE_TYPE (TREE_OPERAND (addr, 1)));
        if (lookup_attribute ("uncached", attrs))
  	return true;
      }
+ 
+   /* Check the definitions of the structs.  */
+   while (handled_component_p (addr))
+     {
+       if (TREE_CODE (addr) == COMPONENT_REF)
+ 	{
+ 	  attrs = TYPE_ATTRIBUTES (TREE_TYPE (addr));
+ 	  if (lookup_attribute ("uncached", attrs))
+ 	    return true;
+ 	  attrs = TYPE_ATTRIBUTES (TREE_TYPE (TREE_OPERAND (addr, 0)));
+ 	  if (lookup_attribute ("uncached", attrs))
+ 	    return true;
+ 	  attrs = TYPE_ATTRIBUTES (TREE_TYPE (TREE_OPERAND (addr, 1)));
+ 	  if (lookup_attribute ("uncached", attrs))
+ 	    return true;
+ 	}
+       addr = TREE_OPERAND (addr, 0);
+     }
    return false;
  }
  
*************** arc_memory_move_cost (machine_mode mode,
*** 11334,11339 ****
--- 11561,11823 ----
    return (2 * GET_MODE_SIZE (mode));
  }
  
+ /* Split an OR instruction into multiple BSET/OR instructions in a
+    attempt to avoid long immediate constants.  The next strategies are
+    employed when destination is 'q' reg.
+ 
+    1. if there are up to three bits set in the mask, a succession of
+    three bset instruction will be emitted:
+    OR rA, rB, mask ->
+    BSET(_S) rA,rB,mask1/BSET_S rA,rA,mask2/BSET_S rA,rA,mask3
+ 
+    2. if the lower 6 bits of the mask is set and there is only one
+    bit set in the upper remaining bits then we will emit one bset and
+    one OR instruction:
+    OR rA, rB, mask -> OR rA,rB,mask1/BSET_S rA,mask2
+ 
+    3. otherwise an OR with limm will be emmitted.  */
+ 
+ void
+ arc_split_ior (rtx *operands)
+ {
+   unsigned HOST_WIDE_INT mask, maskx;
+   rtx op1 = operands[1];
+ 
+   gcc_assert (CONST_INT_P (operands[2]));
+   mask =  INTVAL (operands[2]) & 0xffffffff;
+ 
+   if (__builtin_popcount (mask) > 3 || (mask & 0x3f))
+     {
+       maskx = mask & 0x3f;
+       emit_insn (gen_rtx_SET (operands[0],
+ 			      gen_rtx_IOR (SImode, op1, GEN_INT (maskx))));
+       op1 = operands[0];
+       mask &= ~maskx;
+     }
+ 
+   switch (__builtin_popcount (mask))
+     {
+     case 3:
+       maskx = 1 << (__builtin_ffs (mask) - 1);
+       emit_insn (gen_rtx_SET (operands[0],
+ 			      gen_rtx_IOR (SImode, op1, GEN_INT (maskx))));
+       mask &= ~maskx;
+       op1 = operands[0];
+       /* FALLTHRU */
+     case 2:
+       maskx = 1 << (__builtin_ffs (mask) - 1);
+       emit_insn (gen_rtx_SET (operands[0],
+ 			      gen_rtx_IOR (SImode, op1, GEN_INT (maskx))));
+       mask &= ~maskx;
+       op1 = operands[0];
+       /* FALLTHRU */
+     case 1:
+       maskx = 1 << (__builtin_ffs (mask) - 1);
+       emit_insn (gen_rtx_SET (operands[0],
+ 			      gen_rtx_IOR (SImode, op1, GEN_INT (maskx))));
+       break;
+     case 0:
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ }
+ 
+ /* Helper to check C0x constraint.  */
+ 
+ bool
+ arc_check_ior_const (HOST_WIDE_INT ival)
+ {
+   unsigned int mask = (unsigned int) (ival & 0xffffffff);
+ 
+   if (UNSIGNED_INT6 (ival)
+       || IS_POWEROF2_P (mask))
+     return false;
+   if (__builtin_popcount (mask) <= 3)
+     return true;
+   if (__builtin_popcount (mask & ~0x3f) <= 1)
+     return true;
+   return false;
+ }
+ 
+ /* Split a mov with long immediate instruction into smaller, size
+    friendly instructions.  */
+ 
+ bool
+ arc_split_mov_const (rtx *operands)
+ {
+   unsigned HOST_WIDE_INT ival;
+   HOST_WIDE_INT shimm;
+   machine_mode mode = GET_MODE (operands[0]);
+ 
+   /* Manage a constant.  */
+   gcc_assert (CONST_INT_P (operands[1]));
+   ival = INTVAL (operands[1]) & 0xffffffff;
+ 
+   /* 1. Check if we can just rotate limm by 8 but using ROR8.  */
+   if (TARGET_BARREL_SHIFTER && TARGET_V2
+       && ((ival & ~0x3f000000) == 0))
+     {
+       shimm = (ival >> 24) & 0x3f;
+       emit_insn (gen_rtx_SET (operands[0],
+ 			      gen_rtx_ROTATERT (mode, GEN_INT (shimm),
+ 						GEN_INT (8))));
+       return true;
+     }
+   /* 2. Check if we can just shift by 8 to fit into the u6 of LSL8.  */
+   if (TARGET_BARREL_SHIFTER && TARGET_V2
+       && ((ival & ~0x3f00) == 0))
+     {
+       shimm = (ival >> 8) & 0x3f;
+       emit_insn (gen_rtx_SET (operands[0],
+ 			      gen_rtx_ASHIFT (mode, GEN_INT (shimm),
+ 					      GEN_INT (8))));
+       return true;
+     }
+ 
+   /* 3. Check if we can just shift by 16 to fit into the u6 of LSL16.  */
+   if (TARGET_BARREL_SHIFTER && TARGET_V2
+       && ((ival & ~0x3f0000) == 0))
+     {
+       shimm = (ival >> 16) & 0x3f;
+       emit_insn (gen_rtx_SET (operands[0],
+ 			      gen_rtx_ASHIFT (mode, GEN_INT (shimm),
+ 					      GEN_INT (16))));
+       return true;
+     }
+ 
+   /* 4. Check if we can do something like mov_s h,u8 / asl_s ra,h,#nb.  */
+   if (((ival >> (__builtin_ffs (ival) - 1)) & 0xffffff00) == 0
+       && TARGET_BARREL_SHIFTER)
+     {
+       HOST_WIDE_INT shift = __builtin_ffs (ival);
+       shimm = (ival >> (shift - 1)) & 0xff;
+       emit_insn (gen_rtx_SET (operands[0], GEN_INT (shimm)));
+       emit_insn (gen_rtx_SET (operands[0],
+ 			      gen_rtx_ASHIFT (mode, operands[0],
+ 					      GEN_INT (shift - 1))));
+       return true;
+     }
+ 
+   /* 5. Check if we can just rotate the limm, useful when no barrel
+      shifter is present.  */
+   if ((ival & ~0x8000001f) == 0)
+     {
+       shimm = (ival * 2 + 1) & 0x3f;
+       emit_insn (gen_rtx_SET (operands[0],
+ 			      gen_rtx_ROTATERT (mode, GEN_INT (shimm),
+ 						const1_rtx)));
+       return true;
+     }
+ 
+   /* 6. Check if we can do something with bmask.  */
+   if (IS_POWEROF2_P (ival + 1))
+     {
+       emit_insn (gen_rtx_SET (operands[0], constm1_rtx));
+       emit_insn (gen_rtx_SET (operands[0],
+ 			      gen_rtx_AND (mode, operands[0],
+ 					   GEN_INT (ival))));
+       return true;
+     }
+ 
+   gcc_unreachable ();
+ }
+ 
+ /* Helper to check Cax constraint.  */
+ 
+ bool
+ arc_check_mov_const (HOST_WIDE_INT ival)
+ {
+   ival = ival & 0xffffffff;
+ 
+   if (SIGNED_INT12 (ival))
+     return false;
+ 
+   if ((ival & ~0x8000001f) == 0)
+     return true;
+ 
+   if (IS_POWEROF2_P (ival + 1))
+     return true;
+ 
+   /* The next rules requires a barrel shifter.  */
+   if (!TARGET_BARREL_SHIFTER)
+     return false;
+ 
+   if (((ival >> (__builtin_ffs (ival) - 1)) & 0xffffff00) == 0)
+     return true;
+ 
+   if ((ival & ~0x3f00) == 0)
+     return true;
+ 
+   if ((ival & ~0x3f0000) == 0)
+     return true;
+ 
+   if ((ival & ~0x3f000000) == 0)
+     return true;
+ 
+   return false;
+ }
+ 
+ /* Return nonzero if this function is known to have a null epilogue.
+    This allows the optimizer to omit jumps to jumps if no stack
+    was created.  */
+ 
+ bool
+ arc_can_use_return_insn (void)
+ {
+   return (reload_completed && cfun->machine->frame_info.total_size == 0
+ 	  && !ARC_INTERRUPT_P (arc_compute_function_type (cfun)));
+ }
+ 
+ /* Helper for INSN_COST.
+ 
+    Per Segher Boessenkool: rtx_costs computes the cost for any rtx (an
+    insn, a set, a set source, any random piece of one).  set_src_cost,
+    set_rtx_cost, etc. are helper functions that use that.
+ 
+    Those functions do not work for parallels.  Also, costs are not
+    additive like this simplified model assumes.  Also, more complex
+    backends tend to miss many cases in their rtx_costs function.
+ 
+    Many passes that want costs want to know the cost of a full insn.  Like
+    combine.  That's why I created insn_cost: it solves all of the above
+    problems.  */
+ 
+ static int
+ arc_insn_cost (rtx_insn *insn, bool speed)
+ {
+   int cost;
+   if (recog_memoized (insn) < 0)
+     return 0;
+ 
+   /* If optimizing for size, we want the insn size.  */
+   if (!speed)
+     return get_attr_length (insn);
+ 
+   /* Use cost if provided.  */
+   cost = get_attr_cost (insn);
+   if (cost > 0)
+     return cost;
+ 
+   /* For speed make a simple cost model: memory access is more
+      expensive than any other instruction.  */
+   enum attr_type type = get_attr_type (insn);
+ 
+   switch (type)
+     {
+     case TYPE_LOAD:
+     case TYPE_STORE:
+       cost = COSTS_N_INSNS (2);
+       break;
+ 
+     default:
+       cost = COSTS_N_INSNS (1);
+       break;
+     }
+ 
+   return cost;
+ }
+ 
  #undef TARGET_USE_ANCHORS_FOR_SYMBOL_P
  #define TARGET_USE_ANCHORS_FOR_SYMBOL_P arc_use_anchors_for_symbol_p
  
*************** arc_memory_move_cost (machine_mode mode,
*** 11355,11360 ****
--- 11839,11847 ----
  #undef TARGET_MEMORY_MOVE_COST
  #define TARGET_MEMORY_MOVE_COST arc_memory_move_cost
  
+ #undef  TARGET_INSN_COST
+ #define TARGET_INSN_COST arc_insn_cost
+ 
  struct gcc_target targetm = TARGET_INITIALIZER;
  
  #include "gt-arc.h"
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc.h gcc-10.1.0/gcc/config/arc/arc.h
*** gcc-9.3.0/gcc/config/arc/arc.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, Synopsys DesignWare ARC cpu.
!    Copyright (C) 1994-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, Synopsys DesignWare ARC cpu.
!    Copyright (C) 1994-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** extern const char *arc_cpu_to_as (int ar
*** 97,103 ****
  
  #undef ASM_SPEC
  #define ASM_SPEC  "%{mbig-endian|EB:-EB} %{EL} "			\
!   "%:cpu_to_as(%{mcpu=*:%*}) %{mspfp*} %{mdpfp*} %{mfpu=fpuda*:-mfpuda}"
  
  #define OPTION_DEFAULT_SPECS						\
    {"cpu", "%{!mcpu=*:%{!mARC*:%{!marc*:%{!mA7:%{!mA6:-mcpu=%(VALUE)}}}}}" }
--- 97,104 ----
  
  #undef ASM_SPEC
  #define ASM_SPEC  "%{mbig-endian|EB:-EB} %{EL} "			\
!   "%:cpu_to_as(%{mcpu=*:%*}) %{mspfp*} %{mdpfp*} "                      \
!   "%{mfpu=fpuda*:-mfpuda} %{mcode-density}"
  
  #define OPTION_DEFAULT_SPECS						\
    {"cpu", "%{!mcpu=*:%{!mARC*:%{!marc*:%{!mA7:%{!mA6:-mcpu=%(VALUE)}}}}}" }
*************** do {							\
*** 1135,1143 ****
  /* Store in OUTPUT a string (made with alloca) containing
     an assembler-name for a local static variable named NAME.
     LABELNO is an integer which is different for each call.  */
! #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
! ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10),	\
!   sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
  
  /* The following macro defines the format used to output the second
     operand of the .type assembler directive.  Different svr4 assemblers
--- 1136,1144 ----
  /* Store in OUTPUT a string (made with alloca) containing
     an assembler-name for a local static variable named NAME.
     LABELNO is an integer which is different for each call.  */
! #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)			\
!   ((OUTPUT) = (char *) alloca (strlen ((NAME)) + 10),			\
!    sprintf ((OUTPUT), "%s.%u", (NAME), (unsigned int)(LABELNO)))
  
  /* The following macro defines the format used to output the second
     operand of the .type assembler directive.  Different svr4 assemblers
*************** do { \
*** 1341,1359 ****
  #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
  
  /* How to renumber registers for dbx and gdb.  */
! #define DBX_REGISTER_NUMBER(REGNO) \
    ((TARGET_MULMAC_32BY16_SET && (REGNO) >= 56 && (REGNO) <= 57) \
!    ? ((REGNO) ^ !TARGET_BIG_ENDIAN) \
!    : (TARGET_MUL64_SET && (REGNO) >= 57 && (REGNO) <= 59) \
!    ? ((REGNO) == 57 \
!       ? 58 /* MMED */ \
!       : ((REGNO) & 1) ^ TARGET_BIG_ENDIAN \
!       ? 59 /* MHI */ \
!       : 57 + !!TARGET_MULMAC_32BY16_SET) /* MLO */ \
     : (REGNO))
  
  #define DWARF_FRAME_REGNUM(REG) (REG)
  
  #define DWARF_FRAME_RETURN_COLUMN 	DWARF_FRAME_REGNUM (31)
  
  #define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (Pmode, 31)
--- 1342,1371 ----
  #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
  
  /* How to renumber registers for dbx and gdb.  */
! #define DBX_REGISTER_NUMBER(REGNO)				\
    ((TARGET_MULMAC_32BY16_SET && (REGNO) >= 56 && (REGNO) <= 57) \
!    ? ((REGNO) ^ !TARGET_BIG_ENDIAN)				\
!    : (TARGET_MUL64_SET && (REGNO) >= 57 && (REGNO) <= 58)	\
!    ? (((REGNO) == 57)						\
!       ? 58 /* MMED */						\
!       : 57 + !!TARGET_MULMAC_32BY16_SET) /* MLO */		\
     : (REGNO))
  
+ /* Use gcc hard register numbering for eh_frame.  */
  #define DWARF_FRAME_REGNUM(REG) (REG)
  
+ /* Map register numbers held in the call frame info that gcc has
+    collected using DWARF_FRAME_REGNUM to those that should be output
+    in .debug_frame and .eh_frame.  */
+ #define DWARF2_FRAME_REG_OUT(REGNO, FOR_EH)			\
+   ((TARGET_MULMAC_32BY16_SET && (REGNO) >= 56 && (REGNO) <= 57) \
+    ? ((REGNO) ^ !TARGET_BIG_ENDIAN)				\
+    : (TARGET_MUL64_SET && (REGNO) >= 57 && (REGNO) <= 58)	\
+    ? (((REGNO) == 57)						\
+       ? 58 /* MMED */						\
+       : 57 + !!TARGET_MULMAC_32BY16_SET) /* MLO */		\
+    : (REGNO))
+ 
  #define DWARF_FRAME_RETURN_COLUMN 	DWARF_FRAME_REGNUM (31)
  
  #define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (Pmode, 31)
*************** do { \
*** 1423,1429 ****
     in one reasonably fast instruction.  */
  #define MOVE_MAX 4
  
! /* Undo the effects of the movmem pattern presence on STORE_BY_PIECES_P .  */
  #define MOVE_RATIO(SPEED) ((SPEED) ? 15 : 3)
  
  /* Define this to be nonzero if shift instructions ignore all but the
--- 1435,1441 ----
     in one reasonably fast instruction.  */
  #define MOVE_MAX 4
  
! /* Undo the effects of the cpymem pattern presence on STORE_BY_PIECES_P .  */
  #define MOVE_RATIO(SPEED) ((SPEED) ? 15 : 3)
  
  /* Define this to be nonzero if shift instructions ignore all but the
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc.md gcc-10.1.0/gcc/config/arc/arc.md
*** gcc-9.3.0/gcc/config/arc/arc.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description of the Synopsys DesignWare ARC cpu for GNU C compiler
! ;; Copyright (C) 1994-2019 Free Software Foundation, Inc.
  
  ;; Sources derived from work done by Sankhya Technologies (www.sankhya.com) on
  ;; behalf of Synopsys Inc.
--- 1,5 ----
  ;; Machine description of the Synopsys DesignWare ARC cpu for GNU C compiler
! ;; Copyright (C) 1994-2020 Free Software Foundation, Inc.
  
  ;; Sources derived from work done by Sankhya Technologies (www.sankhya.com) on
  ;; behalf of Synopsys Inc.
***************
*** 163,168 ****
--- 163,172 ----
    VUNSPEC_ARC_LL
    VUNSPEC_ARC_BLOCKAGE
    VUNSPEC_ARC_EH_RETURN
+   VUNSPEC_ARC_ARC600_RTIE
+   VUNSPEC_ARC_ARC600_STALL
+   VUNSPEC_ARC_LDDI
+   VUNSPEC_ARC_STDI
    ])
  
  (define_constants
***************
*** 187,209 ****
     (R30_REG 30)
     (RETURN_ADDR_REGNUM 31)
     (R32_REG 32)
     (R40_REG 40)
     (R41_REG 41)
     (R42_REG 42)
     (R43_REG 43)
     (R44_REG 44)
     (R57_REG 57)
     (MUL64_OUT_REG 58)
     (MUL32x16_REG 56)
     (ARCV2_ACC 58)
-    (R59_REG 59)
- 
     (LP_COUNT 60)
     (CC_REG 61)
     (PCL_REG 63)
    ]
  )
  
  (define_attr "is_sfunc" "no,yes" (const_string "no"))
  
  ;; Insn type.  Used to default other attribute values.
--- 191,237 ----
     (R30_REG 30)
     (RETURN_ADDR_REGNUM 31)
     (R32_REG 32)
+    (R33_REG 33)
+    (R34_REG 34)
+    (R35_REG 35)
+    (R36_REG 36)
+    (R37_REG 37)
+    (R38_REG 38)
+    (R39_REG 39)
     (R40_REG 40)
     (R41_REG 41)
     (R42_REG 42)
     (R43_REG 43)
     (R44_REG 44)
+    (R45_REG 45)
+    (R46_REG 46)
+    (R47_REG 47)
+    (R48_REG 48)
+    (R49_REG 49)
+    (R50_REG 50)
+    (R51_REG 51)
+    (R52_REG 52)
+    (R53_REG 53)
+    (R54_REG 54)
+    (R55_REG 55)
+    (R56_REG 56)
     (R57_REG 57)
+    (R58_REG 58)
+    (R59_REG 59)
+ 
     (MUL64_OUT_REG 58)
     (MUL32x16_REG 56)
     (ARCV2_ACC 58)
     (LP_COUNT 60)
     (CC_REG 61)
     (PCL_REG 63)
    ]
  )
  
+ ;; What is the insn_cost for this insn?  The target hook can still override
+ ;; this.  For optimizing for size the "length" attribute is used instead.
+ (define_attr "cost" "" (const_int 0))
+ 
  (define_attr "is_sfunc" "no,yes" (const_string "no"))
  
  ;; Insn type.  Used to default other attribute values.
***************
*** 214,220 ****
  
  (define_attr "type"
    "move,load,store,cmove,unary,binary,compare,shift,uncond_branch,jump,branch,
!    brcc,brcc_no_delay_slot,call,sfunc,call_no_delay_slot,
     multi,umulti, two_cycle_core,lr,sr,divaw,loop_setup,loop_end,return,
     misc,spfp,dpfp_mult,dpfp_addsub,mulmac_600,cc_arith,
     simd_vload, simd_vload128, simd_vstore, simd_vmove, simd_vmove_else_zero,
--- 242,248 ----
  
  (define_attr "type"
    "move,load,store,cmove,unary,binary,compare,shift,uncond_branch,jump,branch,
!    brcc,brcc_no_delay_slot,call,sfunc,call_no_delay_slot,rtie,
     multi,umulti, two_cycle_core,lr,sr,divaw,loop_setup,loop_end,return,
     misc,spfp,dpfp_mult,dpfp_addsub,mulmac_600,cc_arith,
     simd_vload, simd_vload128, simd_vstore, simd_vmove, simd_vmove_else_zero,
***************
*** 531,539 ****
    (cond [(eq_attr "in_delay_slot" "false")
  	 (const_string "no")
  	 (match_test "regno_clobbered_p
! 			(arc_return_address_register
! 			  (arc_compute_function_type (cfun)),
! 			 insn, SImode, 1)")
  	 (const_string "no")]
  	(const_string "yes")))
  
--- 559,565 ----
    (cond [(eq_attr "in_delay_slot" "false")
  	 (const_string "no")
  	 (match_test "regno_clobbered_p
! 			(RETURN_ADDR_REGNUM, insn, SImode, 1)")
  	 (const_string "no")]
  	(const_string "yes")))
  
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 753,818 ****
  ; In order to allow the ccfsm machinery to do its work, the leading compact
  ; alternatives say 'canuse' - there is another alternative that will match
  ; when the condition codes are used.
! ; Rcq won't match if the condition is actually used; to avoid a spurious match
! ; via q, q is inactivated as constraint there.
! ; Likewise, the length of an alternative that might be shifted to conditional
  ; execution must reflect this, lest out-of-range branches are created.
  ; the iscompact attribute allows the epilogue expander to know for which
  ; insns it should lengthen the return insn.
! ; N.B. operand 1 of alternative 7 expands into pcl,symbol@gotpc .
! (define_insn "*movsi_insn"			;   0     1     2     3    4  5  6   7   8   9   10  11  12  13    14  15   16  17  18     19     20  21  22    23    24 25 26    27 28  29  30   31
!   [(set (match_operand:SI 0 "move_dest_operand" "=Rcq,Rcq#q,    w,Rcq#q,   h,wl, w,  w,  w,  w,  w,???w, ?w,  w,Rcq#q,  h,  wl,Rcq,  S,   Us<,RcqRck,!*x,  r,!*Rsd,!*Rcd,r,Ucm,  Usd,m,???m,  m,VUsc")
! 	(match_operand:SI 1 "move_src_operand"  "  cL,   cP,Rcq#q,    P,hCm1,cL, I,Crr,Clo,Chi,Cbi,?Rac,Cpc,Clb, ?Cal,Cal,?Cal,Uts,Rcq,RcqRck,   Us>,Usd,Ucm,  Usd,  Ucd,m,  w,!*Rzd,c,?Rac,Cm3, C32"))]
    "register_operand (operands[0], SImode)
     || register_operand (operands[1], SImode)
     || (CONSTANT_P (operands[1])
!        /* Don't use a LIMM that we could load with a single insn - we loose
! 	  delay-slot filling opportunities.  */
!        && !satisfies_constraint_I (operands[1])
         && satisfies_constraint_Usc (operands[0]))
     || (satisfies_constraint_Cm3 (operands[1])
        && memory_operand (operands[0], SImode))"
    "@
!    mov%? %0,%1%&	;0
!    mov%? %0,%1%&	;1
!    mov%? %0,%1%&	;2
!    mov%? %0,%1%&	;3
!    mov%? %0,%1%&	;4
!    mov%? %0,%1		;5
!    mov%? %0,%1		;6
!    ror %0,((%1*2+1) & 0x3f) ;7
!    movl.cl %0,%1	;8
!    movh.cl %0,%L1>>16   ;9
!    * return INTVAL (operands[1]) & 0xffffff ? \"movbi.cl %0,%1 >> %p1,%p1,8;10\" : \"movbi.cl %0,%L1 >> 24,24,8;10\";
!    mov%? %0,%1		;11
!    add %0,%1		;12
!    add %0,pcl,%1@pcl    ;13
!    mov%? %0,%j1 	;14
!    mov%? %0,%j1		;15
!    mov%? %0,%j1		;16
!    ld%? %0,%1		;17
!    st%? %1,%0%&		;18
!    * return arc_short_long (insn, \"push%? %1%&\", \"st%U0 %1,%0%&\");
!    * return arc_short_long (insn, \"pop%? %0%&\",  \"ld%U1 %0,%1%&\");
!    ld%? %0,%1%&		;21
!    xld%U1 %0,%1		;22
!    ld%? %0,%1%&		;23
!    ld%? %0,%1%&		;24
!    ld%U1%V1 %0,%1	;25
!    xst%U0 %1,%0		;26
!    st%? %1,%0%&		;27
!    st%U0%V0 %1,%0	;28
!    st%U0%V0 %1,%0	;29
!    st%U0%V0 %1,%0	;30
!    st%U0%V0 %1,%0	;31"
!    ;                         0     1     2     3    4    5      6       7           8     9    10     11    12    13           14        15    16   17    18    19   20    21    22   23  24    25    26    27    28    29   30   31
!   [(set_attr "type"       "move, move, move,move,move, move, move,two_cycle_core,shift,shift,shift, move,binary,binary,      move,      move, move,load,store,store,load,load, load,load,load, load,store,store,store,store,store,store")
!    (set_attr "iscompact" "maybe,maybe,maybe,true,true,false,false,         false,false,false,false,false, false, false,maybe_limm,maybe_limm,false,true, true, true,true,true,false,true,true,false,false, true,false,false,false,false")
!    ; Use default length for iscompact to allow for COND_EXEC.  But set length
!    ; of Crr to 4.
!    (set_attr "length" "*,*,*,*,*,4,4,4,4,4,4,4,8,8,*,*,*,*,*,*,*,*,4,*,4,*,*,*,*,*,*,8")
!    (set_attr "predicable" "yes,no,yes,no,no,yes,no,no,no,no,no,yes,no,no,yes,yes,yes,no,no,no,no,no,no,no,no,no,no,no,no,no,no,no")
!    (set_attr "cpu_facility" "av1,av1,av1,av2,av2,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,av2,av2,*,*,av2,*,*,av2,*")])
  
  ;; Sometimes generated by the epilogue code.  We don't want to
  ;; recognize these addresses in general, because the limm is costly,
--- 779,844 ----
  ; In order to allow the ccfsm machinery to do its work, the leading compact
  ; alternatives say 'canuse' - there is another alternative that will match
  ; when the condition codes are used.
! ; The length of an alternative that might be shifted to conditional
  ; execution must reflect this, lest out-of-range branches are created.
  ; the iscompact attribute allows the epilogue expander to know for which
  ; insns it should lengthen the return insn.
! (define_insn_and_split "*movsi_insn"		; 0  1 2 3    4   5 6   7   8   9  10  11  12  13  14  15  16    17      18  19  20    21   22 23  24   25 26  27  28
!   [(set (match_operand:SI 0 "move_dest_operand" "=q, q,r,q,   h, rl,r,  r,  r,  r, ?r,  r,  q,  h, rl,  q,  S,   Us<,RcqRck,!*x,  r,!*Rsd,!*Rcd,r,Ucm,  Usd,m,  m,VUsc")
! 	(match_operand:SI 1 "move_src_operand"  "rL,rP,q,P,hCm1,rLl,I,Clo,Chi,Cbi,Cpc,Clb,Cax,Cal,Cal,Uts,Rcq,RcqRck,   Us>,Usd,Ucm,  Usd,  Ucd,m,  r,!*Rzd,r,Cm3, C32"))]
    "register_operand (operands[0], SImode)
     || register_operand (operands[1], SImode)
     || (CONSTANT_P (operands[1])
!        && (!satisfies_constraint_I (operands[1]) || !optimize_size)
         && satisfies_constraint_Usc (operands[0]))
     || (satisfies_constraint_Cm3 (operands[1])
        && memory_operand (operands[0], SImode))"
    "@
!    mov%?\\t%0,%1	;0
!    mov%?\\t%0,%1	;1
!    mov%?\\t%0,%1	;2
!    mov%?\\t%0,%1	;3
!    mov%?\\t%0,%1	;4
!    mov%?\\t%0,%1	;5
!    mov%?\\t%0,%1	;6
!    movl.cl\\t%0,%1	;7
!    movh.cl\\t%0,%L1>>16 ;8
!    * return INTVAL (operands[1]) & 0xffffff ? \"movbi.cl\\t%0,%1 >> %p1,%p1,8;9\" : \"movbi.cl\\t%0,%L1 >> 24,24,8;9\";
!    add\\t%0,%1		;10
!    add\\t%0,pcl,%1@pcl  ;11
!    #
!    mov%?\\t%0,%j1	;13
!    mov%?\\t%0,%j1	;14
!    ld%?\\t%0,%1		;15
!    st%?\\t%1,%0		;16
!    * return arc_short_long (insn, \"push%?\\t%1%&\", \"st%U0\\t%1,%0%&\");
!    * return arc_short_long (insn, \"pop%?\\t%0%&\",  \"ld%U1\\t%0,%1%&\");
!    ld%?\\t%0,%1		;19
!    xld%U1\\t%0,%1	;20
!    ld%?\\t%0,%1		;21
!    ld%?\\t%0,%1		;22
!    ld%U1%V1\\t%0,%1	;23
!    xst%U0\\t%1,%0	;24
!    st%?\\t%1,%0%&	;25
!    st%U0%V0\\t%1,%0	;26
!    st%U0%V0\\t%1,%0	;37
!    st%U0%V0\\t%1,%0	;28"
!   "reload_completed
!    && GET_CODE (PATTERN (insn)) != COND_EXEC
!    && register_operand (operands[0], SImode)
!    && IN_RANGE (REGNO (operands[0]) ^ 4, 4, 11)
!    && satisfies_constraint_Cax (operands[1])"
!   [(const_int 0)]
!   "
!    arc_split_mov_const (operands);
!    DONE;
!   "
!    ;                          0     1     2     3    4    5     6     7     8     9     10     11    12   13    14   15    16    17   18   19    20   21   22    23    24    25    26    27   28
!   [(set_attr "type"       "move, move, move,move,move, move, move,shift,shift,shift,binary,binary,multi,move, move,load,store,store,load,load, load,load,load, load,store,store,store,store,store")
!    (set_attr "iscompact" "maybe,maybe,maybe,true,true,false,false,false,false,false, false, false,false,true,false,true, true, true,true,true,false,true,true,false,false, true,false,false,false")
!    (set_attr "length"    "*,*,*,*,*,4,4,4,4,4,8,8,*,6,*,*,*,*,*,*,4,*,4,*,*,*,*,*,8")
!    (set_attr "predicable" "yes,no,yes,no,no,yes,no,no,no,yes,no,no,no,yes,yes,no,no,no,no,no,no,no,no,no,no,no,no,no,no")
!    (set_attr "cpu_facility" "av1,av1,av1,av2,av2,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,av2,av2,*,*,av2,*,av2,*")])
  
  ;; Sometimes generated by the epilogue code.  We don't want to
  ;; recognize these addresses in general, because the limm is costly,
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 1244,1250 ****
    "")
  
  (define_insn "*bic_f"
!   [(set (match_operand 3 "cc_register" "=Rcc,Rcc,Rcc")
  	(match_operator 4 "zn_compare_operator"
  	  [(and:SI (match_operand:SI 1 "register_operand" "c,0,c")
  		   (not:SI
--- 1270,1276 ----
    "")
  
  (define_insn "*bic_f"
!   [(set (match_operand 3 "cc_set_register" "")
  	(match_operator 4 "zn_compare_operator"
  	  [(and:SI (match_operand:SI 1 "register_operand" "c,0,c")
  		   (not:SI
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 1258,1263 ****
--- 1284,1317 ----
     (set_attr "cond" "set_zn,set_zn,set_zn")
     (set_attr "length" "4,4,8")])
  
+ (define_insn "*bic_cmp0_noout"
+   [(set (match_operand 0 "cc_set_register" "")
+ 	(compare:CC_ZN
+ 	 (and:SI (not:SI (match_operand:SI 1 "nonmemory_operand" "Lr,Cal,r"))
+ 		 (match_operand:SI 2 "nonmemory_operand" "r,r,Cal"))
+ 	 (const_int 0)))]
+   "register_operand (operands[1], SImode)
+    || register_operand (operands[2], SImode)"
+   "bic.f\\t0,%2,%1"
+   [(set_attr "type" "unary")
+    (set_attr "cond" "set_zn")
+    (set_attr "length" "4,8,8")])
+ 
+ (define_insn "*bic_cmp0"
+   [(set (match_operand 0 "cc_set_register" "")
+ 	(compare:CC_ZN
+ 	 (and:SI (not:SI (match_operand:SI 1 "nonmemory_operand" "Lr,Cal,r"))
+ 		 (match_operand:SI 2 "nonmemory_operand" "r,r,Cal"))
+ 	 (const_int 0)))
+    (set (match_operand:SI 3 "register_operand" "=r,r,r")
+ 	(and:SI (not:SI (match_dup 1)) (match_dup 2)))]
+   "register_operand (operands[1], SImode)
+    || register_operand (operands[2], SImode)"
+   "bic.f\\t%3,%2,%1"
+   [(set_attr "type" "unary")
+    (set_attr "cond" "set_zn")
+    (set_attr "length" "4,8,8")])
+ 
  (define_expand "movdi"
    [(set (match_operand:DI 0 "move_dest_operand" "")
  	(match_operand:DI 1 "general_operand" ""))]
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 1785,1802 ****
    [(set_attr "type" "cmove,cmove")
     (set_attr "length" "8,16")])
  
  
  (define_insn "*zero_extendqihi2_i"
!   [(set (match_operand:HI 0 "dest_reg_operand" "=Rcq,Rcq#q,Rcw,w,r,r")
! 	(zero_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "0,Rcq#q,0,c,Ucm,m")))]
    ""
    "@
!    extb%? %0,%1%&
!    extb%? %0,%1%&
!    bmsk%? %0,%1,7
!    extb %0,%1
!    xldb%U1 %0,%1
!    ldb%U1 %0,%1"
    [(set_attr "type" "unary,unary,unary,unary,load,load")
     (set_attr "iscompact" "maybe,true,false,false,false,false")
     (set_attr "predicable" "no,no,yes,no,no,no")])
--- 1839,1860 ----
    [(set_attr "type" "cmove,cmove")
     (set_attr "length" "8,16")])
  
+ ;; -------------------------------------------------------------------
+ ;; Sign/Zero extension
+ ;; -------------------------------------------------------------------
  
  (define_insn "*zero_extendqihi2_i"
!   [(set (match_operand:HI 0 "dest_reg_operand" "=q,q,r,r,r,r")
! 	(zero_extend:HI
! 	 (match_operand:QI 1 "nonvol_nonimm_operand" "0,q,0,r,Ucm,m")))]
    ""
    "@
!    extb%?\\t%0,%1
!    extb%?\\t%0,%1
!    bmsk%?\\t%0,%1,7
!    extb\\t%0,%1
!    xldb%U1\\t%0,%1
!    ldb%U1\\t%0,%1"
    [(set_attr "type" "unary,unary,unary,unary,load,load")
     (set_attr "iscompact" "maybe,true,false,false,false,false")
     (set_attr "predicable" "no,no,yes,no,no,no")])
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 1809,1826 ****
  )
  
  (define_insn "*zero_extendqisi2_ac"
!   [(set (match_operand:SI 0 "dest_reg_operand"    "=Rcq,Rcq#q,Rcw,w,qRcq,!*x,r,r")
! 	(zero_extend:SI (match_operand:QI 1 "nonvol_nonimm_operand" "0,Rcq#q,0,c,T,Usd,Ucm,m")))]
    ""
    "@
!    extb%? %0,%1%&
!    extb%? %0,%1%&
!    bmsk%? %0,%1,7
!    extb %0,%1
!    ldb%? %0,%1%&
!    ldb%? %0,%1%&
!    xldb%U1 %0,%1
!    ldb%U1 %0,%1"
    [(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
     (set_attr "iscompact" "maybe,true,false,false,true,true,false,false")
     (set_attr "predicable" "no,no,yes,no,no,no,no,no")])
--- 1867,1885 ----
  )
  
  (define_insn "*zero_extendqisi2_ac"
!   [(set (match_operand:SI 0 "dest_reg_operand"    "=q,q,r,r,q,!*x,r,r")
! 	(zero_extend:SI
! 	 (match_operand:QI 1 "nonvol_nonimm_operand" "0,q,0,r,T,Usd,Ucm,m")))]
    ""
    "@
!    extb%?\\t%0,%1
!    extb%?\\t%0,%1
!    bmsk%?\\t%0,%1,7
!    extb\\t%0,%1
!    ldb%?\\t%0,%1
!    ldb%?\\t%0,%1
!    xldb%U1\\t%0,%1
!    ldb%U1\\t%0,%1"
    [(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
     (set_attr "iscompact" "maybe,true,false,false,true,true,false,false")
     (set_attr "predicable" "no,no,yes,no,no,no,no,no")])
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 1833,1855 ****
  )
  
  (define_insn "*zero_extendhisi2_i"
!   [(set (match_operand:SI 0 "dest_reg_operand" "=Rcq,q,Rcw,w,!x,Rcqq,r,r")
! 	(zero_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "0,q,0,c,Usd,T,Ucm,m")))]
    ""
    "@
!    ext%_%? %0,%1%&
!    ext%_%? %0,%1%&
!    bmsk%? %0,%1,15
!    ext%_ %0,%1
!    ld%_%? %0,%1
!    ld%_%? %0,%1
!    * return TARGET_EM ? \"xldh%U1%V1 %0,%1\" : \"xldw%U1 %0,%1\";
!    ld%_%U1%V1 %0,%1"
    [(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
     (set_attr "iscompact" "maybe,true,false,false,true,true,false,false")
     (set_attr "predicable" "no,no,yes,no,no,no,no,no")])
  
- 
  (define_expand "zero_extendhisi2"
    [(set (match_operand:SI 0 "dest_reg_operand" "")
  	(zero_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "")))]
--- 1892,1914 ----
  )
  
  (define_insn "*zero_extendhisi2_i"
!   [(set (match_operand:SI 0 "dest_reg_operand" "=q,q,r,r,!x,q,r,r")
! 	(zero_extend:SI
! 	 (match_operand:HI 1 "nonvol_nonimm_operand" "0,q,0,r,Usd,T,Ucm,m")))]
    ""
    "@
!    ext%_%?\\t%0,%1
!    ext%_%?\\t%0,%1
!    bmsk%?\\t%0,%1,15
!    ext%_\\t%0,%1
!    ld%_%?\\t%0,%1
!    ld%_%?\\t%0,%1
!    xldw%U1\\t%0,%1
!    ld%_%U1%V1\\t%0,%1"
    [(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
     (set_attr "iscompact" "maybe,true,false,false,true,true,false,false")
     (set_attr "predicable" "no,no,yes,no,no,no,no,no")])
  
  (define_expand "zero_extendhisi2"
    [(set (match_operand:SI 0 "dest_reg_operand" "")
  	(zero_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "")))]
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 1860,1878 ****
  ;; Sign extension instructions.
  
  (define_insn "*extendqihi2_i"
!   [(set (match_operand:HI 0 "dest_reg_operand" "=Rcqq,r,r,r")
! 	(sign_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "Rcqq,r,Uex,m")))]
    ""
    "@
!    sexb%? %0,%1%&
!    sexb %0,%1
!    ldb.x%U1 %0,%1
!    ldb.x%U1 %0,%1"
    [(set_attr "type" "unary,unary,load,load")
     (set_attr "iscompact" "true,false,false,false")
     (set_attr "length" "*,*,*,8")])
  
- 
  (define_expand "extendqihi2"
    [(set (match_operand:HI 0 "dest_reg_operand" "")
  	(sign_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "")))]
--- 1919,1937 ----
  ;; Sign extension instructions.
  
  (define_insn "*extendqihi2_i"
!   [(set (match_operand:HI 0 "dest_reg_operand" "=q,r,r,r")
! 	(sign_extend:HI
! 	 (match_operand:QI 1 "nonvol_nonimm_operand" "q,r,Uex,m")))]
    ""
    "@
!    sexb%?\\t%0,%1
!    sexb\\t%0,%1
!    ldb.x%U1\\t%0,%1
!    ldb.x%U1\\t%0,%1"
    [(set_attr "type" "unary,unary,load,load")
     (set_attr "iscompact" "true,false,false,false")
     (set_attr "length" "*,*,*,8")])
  
  (define_expand "extendqihi2"
    [(set (match_operand:HI 0 "dest_reg_operand" "")
  	(sign_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "")))]
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 1881,1894 ****
  )
  
  (define_insn "*extendqisi2_ac"
!   [(set (match_operand:SI 0 "dest_reg_operand" "=Rcqq,w,r,r")
! 	(sign_extend:SI (match_operand:QI 1 "nonvol_nonimm_operand" "Rcqq,c,Uex,m")))]
    ""
    "@
!    sexb%? %0,%1%&
!    sexb %0,%1
!    ldb.x%U1 %0,%1
!    ldb.x%U1 %0,%1"
    [(set_attr "type" "unary,unary,load,load")
     (set_attr "iscompact" "true,false,false,false")
     (set_attr "length" "*,*,*,8")])
--- 1940,1954 ----
  )
  
  (define_insn "*extendqisi2_ac"
!   [(set (match_operand:SI 0 "dest_reg_operand" "=q,r,r,r")
! 	(sign_extend:SI
! 	 (match_operand:QI 1 "nonvol_nonimm_operand" "q,r,Uex,m")))]
    ""
    "@
!    sexb%?\\t%0,%1
!    sexb\\t%0,%1
!    ldb.x%U1\\t%0,%1
!    ldb.x%U1\\t%0,%1"
    [(set_attr "type" "unary,unary,load,load")
     (set_attr "iscompact" "true,false,false,false")
     (set_attr "length" "*,*,*,8")])
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 1901,1915 ****
  )
  
  (define_insn "*extendhisi2_i"
!   [(set (match_operand:SI 0 "dest_reg_operand" "=Rcqq,w,Rcqq,r,r")
! 	(sign_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "Rcqq,c,Ucd,Uex,m")))]
    ""
    "@
!    sex%_%? %0,%1%&
!    sex%_ %0,%1
!    ldh%?.x %0,%1%&
!    ld%_.x%U1%V1 %0,%1
!    ld%_.x%U1%V1 %0,%1"
    [(set_attr "type" "unary,unary,load,load,load")
     (set_attr "iscompact" "true,false,true,false,false")
     (set_attr "length" "*,*,*,4,8")])
--- 1961,1976 ----
  )
  
  (define_insn "*extendhisi2_i"
!   [(set (match_operand:SI 0 "dest_reg_operand" "=q,r,q,r,r")
! 	(sign_extend:SI
! 	 (match_operand:HI 1 "nonvol_nonimm_operand" "q,r,Ucd,Uex,m")))]
    ""
    "@
!    sex%_%?\\t%0,%1
!    sex%_\\t%0,%1
!    ldh%?.x\\t%0,%1%&
!    ld%_.x%U1%V1\\t%0,%1
!    ld%_.x%U1%V1\\t%0,%1"
    [(set_attr "type" "unary,unary,load,load,load")
     (set_attr "iscompact" "true,false,true,false,false")
     (set_attr "length" "*,*,*,4,8")])
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 2182,2187 ****
--- 2243,2251 ----
     (set_attr "predicable" "no, no, yes")
     (set_attr "cond" "nocond, canuse_limm, canuse")])
  
+ ; The gcc-internal representation may differ from the hardware
+ ; register number in order to allow the generic code to correctly
+ ; split the concatenation of mhi and mlo.
  (define_insn_and_split "mulsi64"
   [(set (match_operand:SI 0 "register_operand"            "=w")
  	(mult:SI (match_operand:SI 1 "register_operand"  "%c")
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 2191,2202 ****
   "#"
   "TARGET_MUL64_SET && reload_completed"
    [(const_int 0)]
! {
!   emit_insn (gen_mulsi_600 (operands[1], operands[2],
! 			gen_mlo (), gen_mhi ()));
!   emit_move_insn (operands[0], gen_mlo ());
!   DONE;
! }
    [(set_attr "type" "multi")
     (set_attr "length" "8")])
  
--- 2255,2267 ----
   "#"
   "TARGET_MUL64_SET && reload_completed"
    [(const_int 0)]
!   {
!    rtx mhi = gen_rtx_REG (SImode, R59_REG);
!    rtx mlo = gen_rtx_REG (SImode, R58_REG);
!    emit_insn (gen_mulsi_600 (operands[1], operands[2], mlo, mhi));
!    emit_move_insn (operands[0], mlo);
!    DONE;
!   }
    [(set_attr "type" "multi")
     (set_attr "length" "8")])
  
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 2206,2228 ****
  		 (match_operand:SI 1 "nonmemory_operand" "Rcq#q,cL,I,Cal")))
     (clobber (match_operand:SI 3 "mhi_operand" ""))]
    "TARGET_MUL64_SET"
! ; The assembler mis-assembles mul64 / mulu64 with "I" constraint constants,
! ; using a machine code pattern that only allows "L" constraint constants.
! ;  "mul64%? \t0, %0, %1%&"
! {
!   if (satisfies_constraint_I (operands[1])
!       && !satisfies_constraint_L (operands[1]))
!     {
!       /* MUL64 <0,>b,s12 00101bbb10000100 0BBBssssssSSSSSS  */
!       int n = true_regnum (operands[0]);
!       int i = INTVAL (operands[1]);
!       asm_fprintf (asm_out_file, "\t.short %d`", 0x2884 + ((n & 7) << 8));
!       asm_fprintf (asm_out_file, "\t.short %d`",
! 		   ((i & 0x3f) << 6) + ((i >> 6) & 0x3f) + ((n & 070) << 9));
!       return "; mul64%? \t0, %0, %1%&";
!     }
!   return "mul64%? \t0, %0, %1%&";
! }
    [(set_attr "length" "*,4,4,8")
     (set_attr "iscompact" "maybe,false,false,false")
     (set_attr "type" "multi,multi,multi,multi")
--- 2271,2277 ----
  		 (match_operand:SI 1 "nonmemory_operand" "Rcq#q,cL,I,Cal")))
     (clobber (match_operand:SI 3 "mhi_operand" ""))]
    "TARGET_MUL64_SET"
!   "mul64%?\\t0,%0,%1"
    [(set_attr "length" "*,4,4,8")
     (set_attr "iscompact" "maybe,false,false,false")
     (set_attr "type" "multi,multi,multi,multi")
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 2230,2248 ****
     (set_attr "cond" "canuse,canuse,canuse_limm,canuse")])
  
  (define_insn_and_split "mulsidi_600"
!   [(set (match_operand:DI 0 "register_operand"                               "=c, c,c,  c")
! 	(mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand"  "%Rcq#q, c,c,  c"))
! 		 (sign_extend:DI (match_operand:SI 2 "nonmemory_operand"  "Rcq#q,cL,L,C32"))))
!    (clobber (reg:DI MUL64_OUT_REG))]
    "TARGET_MUL64_SET"
    "#"
!   "TARGET_MUL64_SET"
    [(const_int 0)]
!   "emit_insn (gen_mul64 (operands[1], operands[2]));
!    emit_move_insn (operands[0], gen_rtx_REG (DImode, MUL64_OUT_REG));
!    DONE;"
    [(set_attr "type" "multi")
!    (set_attr "length" "8")])
  
  (define_insn "mul64"
    [(set (reg:DI MUL64_OUT_REG)
--- 2279,2304 ----
     (set_attr "cond" "canuse,canuse,canuse_limm,canuse")])
  
  (define_insn_and_split "mulsidi_600"
!   [(set (match_operand:DI 0 "register_operand"                           "=r,r,  r")
! 	(mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand"  "%r,r,  r"))
! 		 (sign_extend:DI (match_operand:SI 2 "nonmemory_operand" "rL,L,C32"))))
!    (clobber (reg:DI R58_REG))]
    "TARGET_MUL64_SET"
    "#"
!   "TARGET_MUL64_SET && reload_completed"
    [(const_int 0)]
!  {
!    int hi = !TARGET_BIG_ENDIAN;
!    int lo = !hi;
!    rtx lr = operand_subword (operands[0], lo, 0, DImode);
!    rtx hr = operand_subword (operands[0], hi, 0, DImode);
!    emit_insn (gen_mul64 (operands[1], operands[2]));
!    emit_move_insn (lr, gen_rtx_REG (SImode, R58_REG));
!    emit_move_insn (hr, gen_rtx_REG (SImode, R59_REG));
!    DONE;
!  }
    [(set_attr "type" "multi")
!    (set_attr "length" "4,4,8")])
  
  (define_insn "mul64"
    [(set (reg:DI MUL64_OUT_REG)
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 2258,2276 ****
     (set_attr "cond" "canuse,canuse,canuse_limm,canuse")])
  
  (define_insn_and_split "umulsidi_600"
!   [(set (match_operand:DI 0 "register_operand"                            "=c,c, c")
! 	(mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand"   "%c,c, c"))
! 		 (sign_extend:DI (match_operand:SI 2 "nonmemory_operand"  "cL,L,C32"))))
!    (clobber (reg:DI MUL64_OUT_REG))]
    "TARGET_MUL64_SET"
    "#"
!   "TARGET_MUL64_SET"
    [(const_int 0)]
!   "emit_insn (gen_mulu64 (operands[1], operands[2]));
!    emit_move_insn (operands[0], gen_rtx_REG (DImode, MUL64_OUT_REG));
!    DONE;"
    [(set_attr "type" "umulti")
!    (set_attr "length" "8")])
  
  (define_insn "mulu64"
    [(set (reg:DI MUL64_OUT_REG)
--- 2314,2339 ----
     (set_attr "cond" "canuse,canuse,canuse_limm,canuse")])
  
  (define_insn_and_split "umulsidi_600"
!   [(set (match_operand:DI 0 "register_operand"                            "=r,r, r")
! 	(mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand"   "%r,r, r"))
! 		 (zero_extend:DI (match_operand:SI 2 "nonmemory_operand"  "rL,L,C32"))))
!    (clobber (reg:DI R58_REG))]
    "TARGET_MUL64_SET"
    "#"
!   "TARGET_MUL64_SET && reload_completed"
    [(const_int 0)]
!  {
!    int hi = !TARGET_BIG_ENDIAN;
!    int lo = !hi;
!    rtx lr = operand_subword (operands[0], lo, 0, DImode);
!    rtx hr = operand_subword (operands[0], hi, 0, DImode);
!    emit_insn (gen_mulu64 (operands[1], operands[2]));
!    emit_move_insn (lr, gen_rtx_REG (SImode, R58_REG));
!    emit_move_insn (hr, gen_rtx_REG (SImode, R59_REG));
!    DONE;
!  }
    [(set_attr "type" "umulti")
!    (set_attr "length" "4,4,8")])
  
  (define_insn "mulu64"
    [(set (reg:DI MUL64_OUT_REG)
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 2307,2322 ****
  ; ARCv2 has no penalties between mpy and mpyu. So, we use mpy because of its
  ; short variant. LP_COUNT constraints are still valid.
  (define_insn "mulsi3_v2"
!  [(set (match_operand:SI 0 "mpy_dest_reg_operand"        "=Rcqq,Rcr, r,r,Rcr,  r")
! 	(mult:SI (match_operand:SI 1 "register_operand"     "%0,  0, c,0,  0,  c")
! 		 (match_operand:SI 2 "nonmemory_operand" " Rcqq, cL,cL,I,Cal,Cal")))]
   "TARGET_MULTI"
!  "mpy%? %0,%1,%2"
!  [(set_attr "length" "*,4,4,4,8,8")
!   (set_attr "iscompact" "maybe,false,false,false,false,false")
    (set_attr "type" "umulti")
!   (set_attr "predicable" "no,yes,no,no,yes,no")
!   (set_attr "cond" "nocond,canuse,nocond,canuse_limm,canuse,nocond")])
  
  (define_expand "mulsidi3"
    [(set (match_operand:DI 0 "register_operand" "")
--- 2370,2392 ----
  ; ARCv2 has no penalties between mpy and mpyu. So, we use mpy because of its
  ; short variant. LP_COUNT constraints are still valid.
  (define_insn "mulsi3_v2"
!  [(set (match_operand:SI 0 "mpy_dest_reg_operand"        "=q,q, r, r,r,  r,  r")
! 	(mult:SI (match_operand:SI 1 "register_operand"  "%0,q, 0, r,0,  0,  c")
! 		 (match_operand:SI 2 "nonmemory_operand"  "q,0,rL,rL,I,Cal,Cal")))]
   "TARGET_MULTI"
!  "@
!   mpy%?\\t%0,%1,%2
!   mpy%?\\t%0,%2,%1
!   mpy%?\\t%0,%1,%2
!   mpy%?\\t%0,%1,%2
!   mpy%?\\t%0,%1,%2
!   mpy%?\\t%0,%1,%2
!   mpy%?\\t%0,%1,%2"
!  [(set_attr "length" "*,*,4,4,4,8,8")
!   (set_attr "iscompact" "maybe,maybe,false,false,false,false,false")
    (set_attr "type" "umulti")
!   (set_attr "predicable" "no,no,yes,no,no,yes,no")
!   (set_attr "cond" "nocond,nocond,canuse,nocond,canuse_limm,canuse,nocond")])
  
  (define_expand "mulsidi3"
    [(set (match_operand:DI 0 "register_operand" "")
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 2676,2709 ****
    ")
  
  (define_expand "adddi3"
!   [(parallel [(set (match_operand:DI 0 "dest_reg_operand" "")
! 		   (plus:DI (match_operand:DI 1 "register_operand" "")
! 			    (match_operand:DI 2 "nonmemory_operand" "")))
! 	      (clobber (reg:CC CC_REG))])]
!   ""
! {})
! 
! ; This assumes that there can be no strictly partial overlap between
! ; operands[1] and operands[2].
! (define_insn_and_split "*adddi3_i"
!   [(set (match_operand:DI 0 "dest_reg_operand" "=&w,w,w")
! 	(plus:DI (match_operand:DI 1 "register_operand" "%c,0,c")
! 		 (match_operand:DI 2 "nonmemory_operand" "ci,ci,!i")))
     (clobber (reg:CC CC_REG))]
    ""
!   "#"
!   "reload_completed"
!   [(const_int 0)]
! {
!   int hi = !TARGET_BIG_ENDIAN;
!   int lo = !hi;
!   rtx l0 = operand_subword (operands[0], lo, 0, DImode);
!   rtx h0 = operand_subword (operands[0], hi, 0, DImode);
!   rtx l1 = operand_subword (operands[1], lo, 0, DImode);
!   rtx h1 = operand_subword (operands[1], hi, 0, DImode);
!   rtx l2 = operand_subword (operands[2], lo, 0, DImode);
!   rtx h2 = operand_subword (operands[2], hi, 0, DImode);
! 
  
    if (l2 == const0_rtx)
      {
--- 2746,2765 ----
    ")
  
  (define_expand "adddi3"
!   [(set (match_operand:DI 0 "register_operand" "")
! 	(plus:DI (match_operand:DI 1 "register_operand" "")
! 		 (match_operand:DI 2 "nonmemory_operand" "")))
     (clobber (reg:CC CC_REG))]
    ""
!   "
!   rtx l0 = gen_lowpart (SImode, operands[0]);
!   rtx h0 = gen_highpart (SImode, operands[0]);
!   rtx l1 = gen_lowpart (SImode, operands[1]);
!   rtx h1 = gen_highpart (SImode, operands[1]);
!   rtx l2 = simplify_gen_subreg (SImode, operands[2], DImode,
!                                 subreg_lowpart_offset (SImode, DImode));
!   rtx h2 = simplify_gen_subreg (SImode, operands[2], DImode,
!                                 subreg_highpart_offset (SImode, DImode));
  
    if (l2 == const0_rtx)
      {
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 2714,2726 ****
  	emit_move_insn (l0, l1);
        DONE;
      }
-   if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) < 0
-       && INTVAL (operands[2]) >= -0x7fffffff)
-     {
-       emit_insn (gen_subdi3_i (operands[0], operands[1],
- 		 GEN_INT (-INTVAL (operands[2]))));
-       DONE;
-     }
    if (rtx_equal_p (l0, h1))
      {
        if (h2 != const0_rtx)
--- 2770,2775 ----
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 2734,2761 ****
  	   gen_rtx_LTU (VOIDmode, gen_rtx_REG (CC_Cmode, CC_REG), GEN_INT (0)),
  	   gen_rtx_SET (h0, plus_constant (SImode, h0, 1))));
        DONE;
!     }
    emit_insn (gen_add_f (l0, l1, l2));
    emit_insn (gen_adc (h0, h1, h2));
    DONE;
! }
!   [(set_attr "cond" "clob")
!    (set_attr "type" "binary")
!    (set_attr "length" "16,16,20")])
  
  (define_insn "add_f"
    [(set (reg:CC_C CC_REG)
  	(compare:CC_C
! 	  (plus:SI (match_operand:SI 1 "register_operand" "c,0,c")
! 		   (match_operand:SI 2 "nonmemory_operand" "cL,I,cCal"))
  	  (match_dup 1)))
!    (set (match_operand:SI 0 "dest_reg_operand" "=w,Rcw,w")
  	(plus:SI (match_dup 1) (match_dup 2)))]
!   ""
!   "add.f %0,%1,%2"
    [(set_attr "cond" "set")
     (set_attr "type" "compare")
!    (set_attr "length" "4,4,8")])
  
  (define_insn "*add_f_2"
    [(set (reg:CC_C CC_REG)
--- 2783,2814 ----
  	   gen_rtx_LTU (VOIDmode, gen_rtx_REG (CC_Cmode, CC_REG), GEN_INT (0)),
  	   gen_rtx_SET (h0, plus_constant (SImode, h0, 1))));
        DONE;
!       }
    emit_insn (gen_add_f (l0, l1, l2));
    emit_insn (gen_adc (h0, h1, h2));
    DONE;
! ")
  
  (define_insn "add_f"
    [(set (reg:CC_C CC_REG)
  	(compare:CC_C
! 	  (plus:SI (match_operand:SI 1 "nonmemory_operand" "%r,L,0,I,Cal,r")
! 		   (match_operand:SI 2 "nonmemory_operand" "rL,r,I,0,  r,rCal"))
  	  (match_dup 1)))
!    (set (match_operand:SI 0 "dest_reg_operand" "=r,r,r,r,r,r")
  	(plus:SI (match_dup 1) (match_dup 2)))]
!   "register_operand (operands[1], SImode)
!    || register_operand (operands[2], SImode)"
!   "@
!   add.f\\t%0,%1,%2
!   add.f\\t%0,%2,%1
!   add.f\\t%0,%1,%2
!   add.f\\t%0,%2,%1
!   add.f\\t%0,%2,%1
!   add.f\\t%0,%1,%2"
    [(set_attr "cond" "set")
     (set_attr "type" "compare")
!    (set_attr "length" "4,4,4,4,8,8")])
  
  (define_insn "*add_f_2"
    [(set (reg:CC_C CC_REG)
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 2910,2944 ****
    ])
  
  (define_expand "subdi3"
!   [(parallel [(set (match_operand:DI 0 "dest_reg_operand" "")
! 		   (minus:DI (match_operand:DI 1 "nonmemory_operand" "")
! 			     (match_operand:DI 2 "nonmemory_operand" "")))
! 	      (clobber (reg:CC CC_REG))])]
!   ""
! {
!   if (!register_operand (operands[2], DImode))
!     operands[1] = force_reg (DImode, operands[1]);
! })
! 
! (define_insn_and_split "subdi3_i"
!   [(set (match_operand:DI 0 "dest_reg_operand" "=&w,w,w,w,w")
! 	(minus:DI (match_operand:DI 1 "nonmemory_operand" "ci,0,ci,c,!i")
! 		  (match_operand:DI 2 "nonmemory_operand" "ci,ci,0,!i,c")))
     (clobber (reg:CC CC_REG))]
!   "register_operand (operands[1], DImode)
!    || register_operand (operands[2], DImode)"
!   "#"
!   "reload_completed"
!   [(const_int 0)]
! {
!   int hi = !TARGET_BIG_ENDIAN;
!   int lo = !hi;
!   rtx l0 = operand_subword (operands[0], lo, 0, DImode);
!   rtx h0 = operand_subword (operands[0], hi, 0, DImode);
!   rtx l1 = operand_subword (operands[1], lo, 0, DImode);
!   rtx h1 = operand_subword (operands[1], hi, 0, DImode);
!   rtx l2 = operand_subword (operands[2], lo, 0, DImode);
!   rtx h2 = operand_subword (operands[2], hi, 0, DImode);
  
    if (rtx_equal_p (l0, h1) || rtx_equal_p (l0, h2))
      {
--- 2963,2982 ----
    ])
  
  (define_expand "subdi3"
!   [(set (match_operand:DI 0 "register_operand" "")
! 	(minus:DI (match_operand:DI 1 "register_operand" "")
! 		  (match_operand:DI 2 "nonmemory_operand" "")))
     (clobber (reg:CC CC_REG))]
!   ""
!   "
!   rtx l0 = gen_lowpart (SImode, operands[0]);
!   rtx h0 = gen_highpart (SImode, operands[0]);
!   rtx l1 = gen_lowpart (SImode, operands[1]);
!   rtx h1 = gen_highpart (SImode, operands[1]);
!   rtx l2 = simplify_gen_subreg (SImode, operands[2], DImode,
!                                 subreg_lowpart_offset (SImode, DImode));
!   rtx h2 = simplify_gen_subreg (SImode, operands[2], DImode,
!                                 subreg_highpart_offset (SImode, DImode));
  
    if (rtx_equal_p (l0, h1) || rtx_equal_p (l0, h2))
      {
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 2956,2964 ****
    emit_insn (gen_sub_f (l0, l1, l2));
    emit_insn (gen_sbc (h0, h1, h2, gen_rtx_REG (CCmode, CC_REG)));
    DONE;
! }
!   [(set_attr "cond" "clob")
!    (set_attr "length" "16,16,16,20,20")])
  
  (define_insn "*sbc_0"
    [(set (match_operand:SI 0 "dest_reg_operand" "=w")
--- 2994,3000 ----
    emit_insn (gen_sub_f (l0, l1, l2));
    emit_insn (gen_sbc (h0, h1, h2, gen_rtx_REG (CCmode, CC_REG)));
    DONE;
!   ")
  
  (define_insn "*sbc_0"
    [(set (match_operand:SI 0 "dest_reg_operand" "=w")
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 3061,3069 ****
    [(set (match_operand:SI 0 "dest_reg_operand" "=q,r,r")
  	(plus:SI (mult:SI (match_operand:SI 1 "register_operand" "q,r,r")
  			  (match_operand:SI 2 "_2_4_8_operand" ""))
! 		 (match_operand:SI 3 "nonmemory_operand" "0,r,Csz")))]
    ""
!   "add%z2%?\\t%0,%3,%1%&"
    [(set_attr "type" "shift")
     (set_attr "length" "*,4,8")
     (set_attr "predicable" "yes,no,no")
--- 3097,3105 ----
    [(set (match_operand:SI 0 "dest_reg_operand" "=q,r,r")
  	(plus:SI (mult:SI (match_operand:SI 1 "register_operand" "q,r,r")
  			  (match_operand:SI 2 "_2_4_8_operand" ""))
! 		 (match_operand:SI 3 "arc_nonmemory_operand" "0,r,Csz")))]
    ""
!   "add%z2%?\\t%0,%3,%1"
    [(set_attr "type" "shift")
     (set_attr "length" "*,4,8")
     (set_attr "predicable" "yes,no,no")
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 3220,3229 ****
       operands[1] = force_reg (SImode, operands[1]);
    ")
  
! (define_insn "andsi3_i"
!   [(set (match_operand:SI 0 "dest_reg_operand"          "=Rcqq,Rcq,Rcqq,Rcqq,Rcqq,Rcw,Rcw,   Rcw,Rcw,Rcw,Rcw, w,     w,  w,  w,Rrq,w,Rcw,  w,W")
! 	(and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,Rcq,   0,   0,Rcqq,  0,  c,     0,  0,  0,  0, c,     c,  c,  c,Rrq,0,  0,  c,o")
! 		(match_operand:SI 2 "nonmemory_operand"  "Rcqq,  0, C1p, Ccp, Cux, cL,  0,C2pC1p,Ccp,CnL,  I,Lc,C2pC1p,Ccp,CnL,Cbf,I,Cal,Cal,Cux")))]
    "(register_operand (operands[1], SImode)
      && nonmemory_operand (operands[2], SImode))
     || (memory_operand (operands[1], SImode)
--- 3256,3265 ----
       operands[1] = force_reg (SImode, operands[1]);
    ")
  
! (define_insn "andsi3_i"                                     ;0 1   2   3   4  5 6      7   8  9 10 11     12  13  14  15 16 17  18   19
!   [(set (match_operand:SI 0 "dest_reg_operand"             "=q,q,  q,  q,  q, r,r,     r,  r,  r,r, r,     r,  r,  r,  q,r,  r,  r,  W")
! 	(and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,q,  0,  0,  q, 0,r,     0,  0,  0,0, r,     r,  r,  r,  q,0,  0,  r,  o")
! 		(match_operand:SI 2 "nonmemory_operand"     "q,0,C1p,Ccp,Cux,rL,0,C2pC1p,Ccp,CnL,I,rL,C2pC1p,Ccp,CnL,Cbf,I,Cal,Cal,Cux")))]
    "(register_operand (operands[1], SImode)
      && nonmemory_operand (operands[2], SImode))
     || (memory_operand (operands[1], SImode)
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 3321,3347 ****
    (set_attr "predicable" "no,yes,no,yes,no,no,no")
    (set_attr "cond" "canuse,canuse,canuse_limm,canuse,nocond,nocond,nocond")])
  
! (define_insn "iorsi3"
!   [(set (match_operand:SI 0 "dest_reg_operand"        "=Rcqq,Rcq,Rcqq,Rcw,Rcw,Rcw,Rcw,w,  w,w,Rcw,  w")
! 	(ior:SI (match_operand:SI 1 "nonmemory_operand" "% 0,Rcq,   0,  0,  c,  0, 0, c,  c,0,  0,  c")
! 		(match_operand:SI 2 "nonmemory_operand" "Rcqq, 0, C0p, cL,  0,C0p, I,cL,C0p,I,Cal,Cal")))]
    ""
!   "*
!   switch (which_alternative)
!     {
!     case 0: case 3: case 6: case 7: case 9: case 10: case 11:
!       return \"or%? %0,%1,%2%&\";
!     case 1: case 4:
!       return \"or%? %0,%2,%1%&\";
!     case 2: case 5: case 8:
!       return \"bset%? %0,%1,%z2%&\";
!     default:
!       gcc_unreachable ();
!     }"
!   [(set_attr "iscompact" "maybe,maybe,maybe,false,false,false,false,false,false,false,false,false")
!    (set_attr "length" "*,*,*,4,4,4,4,4,4,4,8,8")
!    (set_attr "predicable" "no,no,no,yes,yes,yes,no,no,no,no,yes,no")
!    (set_attr "cond" "canuse,canuse,canuse,canuse,canuse,canuse,canuse_limm,nocond,nocond,canuse_limm,canuse,nocond")])
  
  (define_insn "xorsi3"
    [(set (match_operand:SI 0 "dest_reg_operand"          "=Rcqq,Rcq,Rcw,Rcw,Rcw,Rcw, w,  w,w,  w,  w")
--- 3357,3395 ----
    (set_attr "predicable" "no,yes,no,yes,no,no,no")
    (set_attr "cond" "canuse,canuse,canuse_limm,canuse,nocond,nocond,nocond")])
  
! (define_insn_and_split "iorsi3"
!   [(set (match_operand:SI 0 "dest_reg_operand"          "=q,q,  q, r,r,  r,r, r,  r,r,  q,  r,  r")
! 	(ior:SI (match_operand:SI 1 "register_operand"  "%0,q,  0, 0,r,  0,0, r,  r,0,  r,  0,  r")
! 		(match_operand:SI 2 "nonmemory_operand"  "q,0,C0p,rL,0,C0p,I,rL,C0p,I,C0x,Cal,Cal")))]
    ""
!   "@
!    or%?\\t%0,%1,%2
!    or%?\\t%0,%2,%1
!    bset%?\\t%0,%1,%z2
!    or%?\\t%0,%1,%2
!    or%?\\t%0,%2,%1
!    bset%?\\t%0,%1,%z2
!    or%?\\t%0,%1,%2
!    or%?\\t%0,%1,%2
!    bset%?\\t%0,%1,%z2
!    or%?\\t%0,%1,%2
!    #
!    or%?\\t%0,%1,%2
!    or%?\\t%0,%1,%2"
!   "reload_completed
!    && GET_CODE (PATTERN (insn)) != COND_EXEC
!    && register_operand (operands[0], SImode)
!    && IN_RANGE (REGNO (operands[0]) ^ 4, 4, 11)
!    && satisfies_constraint_C0x (operands[2])"
!   [(const_int 0)]
!   "
!    arc_split_ior (operands);
!    DONE;
!   "
!   [(set_attr "iscompact" "maybe,maybe,maybe,false,false,false,false,false,false,false,false,false,false")
!    (set_attr "length" "*,*,*,4,4,4,4,4,4,4,*,8,8")
!    (set_attr "predicable" "no,no,no,yes,yes,yes,no,no,no,no,no,yes,no")
!    (set_attr "cond" "canuse,canuse,canuse,canuse,canuse,canuse,canuse_limm,nocond,nocond,canuse_limm,nocond,canuse,nocond")])
  
  (define_insn "xorsi3"
    [(set (match_operand:SI 0 "dest_reg_operand"          "=Rcqq,Rcq,Rcw,Rcw,Rcw,Rcw, w,  w,w,  w,  w")
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 3482,3507 ****
  ; to truncate a symbol in a u6 immediate; but that's rather exotic, so only
  ; provide one alternatice for this, without condexec support.
  (define_insn "*ashlsi3_insn"
!   [(set (match_operand:SI 0 "dest_reg_operand"           "=Rcq,Rcqq,Rcqq,Rcw, w,   w")
! 	(ashift:SI (match_operand:SI 1 "nonmemory_operand" "!0,Rcqq,   0,  0, c,cCsz")
! 		   (match_operand:SI 2 "nonmemory_operand"  "K,  K,RcqqM, cL,cL,cCal")))]
    "TARGET_BARREL_SHIFTER
     && (register_operand (operands[1], SImode)
         || register_operand (operands[2], SImode))"
!   "asl%? %0,%1,%2%&"
    [(set_attr "type" "shift")
     (set_attr "iscompact" "maybe,maybe,maybe,false,false,false")
     (set_attr "predicable" "no,no,no,yes,no,no")
     (set_attr "cond" "canuse,nocond,canuse,canuse,nocond,nocond")])
  
  (define_insn "*ashrsi3_insn"
!   [(set (match_operand:SI 0 "dest_reg_operand"             "=Rcq,Rcqq,Rcqq,Rcw, w,   w")
! 	(ashiftrt:SI (match_operand:SI 1 "nonmemory_operand" "!0,Rcqq,   0,  0, c,cCsz")
! 		     (match_operand:SI 2 "nonmemory_operand"  "K,  K,RcqqM, cL,cL,cCal")))]
    "TARGET_BARREL_SHIFTER
     && (register_operand (operands[1], SImode)
         || register_operand (operands[2], SImode))"
!   "asr%? %0,%1,%2%&"
    [(set_attr "type" "shift")
     (set_attr "iscompact" "maybe,maybe,maybe,false,false,false")
     (set_attr "predicable" "no,no,no,yes,no,no")
--- 3530,3555 ----
  ; to truncate a symbol in a u6 immediate; but that's rather exotic, so only
  ; provide one alternatice for this, without condexec support.
  (define_insn "*ashlsi3_insn"
!   [(set (match_operand:SI 0 "dest_reg_operand"                 "=q,q, q, r, r,   r")
! 	(ashift:SI (match_operand:SI 1 "arc_nonmemory_operand" "!0,q, 0, 0, r,rCsz")
! 		   (match_operand:SI 2 "nonmemory_operand"      "K,K,qM,rL,rL,rCal")))]
    "TARGET_BARREL_SHIFTER
     && (register_operand (operands[1], SImode)
         || register_operand (operands[2], SImode))"
!   "asl%?\\t%0,%1,%2"
    [(set_attr "type" "shift")
     (set_attr "iscompact" "maybe,maybe,maybe,false,false,false")
     (set_attr "predicable" "no,no,no,yes,no,no")
     (set_attr "cond" "canuse,nocond,canuse,canuse,nocond,nocond")])
  
  (define_insn "*ashrsi3_insn"
!   [(set (match_operand:SI 0 "dest_reg_operand"                   "=q,q, q, r, r,   r")
! 	(ashiftrt:SI (match_operand:SI 1 "arc_nonmemory_operand" "!0,q, 0, 0, r,rCsz")
! 		     (match_operand:SI 2 "nonmemory_operand"      "K,K,qM,rL,rL,rCal")))]
    "TARGET_BARREL_SHIFTER
     && (register_operand (operands[1], SImode)
         || register_operand (operands[2], SImode))"
!   "asr%?\\t%0,%1,%2"
    [(set_attr "type" "shift")
     (set_attr "iscompact" "maybe,maybe,maybe,false,false,false")
     (set_attr "predicable" "no,no,no,yes,no,no")
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 3522,3532 ****
     (set_attr "cond" "canuse,nocond,canuse,canuse,nocond,nocond")])
  
  (define_insn "rotrsi3"
!   [(set (match_operand:SI 0 "dest_reg_operand"             "=Rcw, w,   w")
! 	(rotatert:SI (match_operand:SI 1 "register_operand"  " 0,cL,cCsz")
! 		     (match_operand:SI 2 "nonmemory_operand" "cL,cL,cCal")))]
    "TARGET_BARREL_SHIFTER"
!   "ror%? %0,%1,%2"
    [(set_attr "type" "shift,shift,shift")
     (set_attr "predicable" "yes,no,no")
     (set_attr "length" "4,4,8")])
--- 3570,3580 ----
     (set_attr "cond" "canuse,nocond,canuse,canuse,nocond,nocond")])
  
  (define_insn "rotrsi3"
!   [(set (match_operand:SI 0 "dest_reg_operand"                    "=r, r,   r")
! 	(rotatert:SI (match_operand:SI 1 "arc_nonmemory_operand"  " 0,rL,rCsz")
! 		     (match_operand:SI 2 "nonmemory_operand"      "rL,rL,rCal")))]
    "TARGET_BARREL_SHIFTER"
!   "ror%?\\t%0,%1,%2"
    [(set_attr "type" "shift,shift,shift")
     (set_attr "predicable" "yes,no,no")
     (set_attr "length" "4,4,8")])
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 3717,3744 ****
  }
    [(set_attr "type" "unary")])
  
- ;; ??? At least for ARC600, we should use sbc b,b,s12 if we want a value
- ;; that is one lower if the carry flag is set.
- 
- ;; ??? Look up negscc insn.  See pa.md for example.
- (define_insn "*neg_scc_insn"
-   [(set (match_operand:SI 0 "dest_reg_operand" "=w")
- 	(neg:SI (match_operator:SI 1 "proper_comparison_operator"
- 		 [(reg CC_REG) (const_int 0)])))]
-   ""
-   "mov %0,-1\;sub.%D1 %0,%0,%0"
-   [(set_attr "type" "unary")
-    (set_attr "length" "8")])
- 
- (define_insn "*not_scc_insn"
-   [(set (match_operand:SI 0 "dest_reg_operand" "=w")
- 	(not:SI (match_operator:SI 1 "proper_comparison_operator"
- 		 [(reg CC_REG) (const_int 0)])))]
-   ""
-   "mov %0,1\;sub.%d1 %0,%0,%0"
-   [(set_attr "type" "unary")
-    (set_attr "length" "8")])
- 
  ; cond_exec patterns
  (define_insn "*movsi_ne"
    [(cond_exec
--- 3765,3770 ----
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 4245,4250 ****
--- 4271,4284 ----
     (set_attr "type" "block")]
  )
  
+ (define_insn "arc600_stall"
+   [(unspec_volatile [(const_int 0)] VUNSPEC_ARC_ARC600_STALL)]
+   "TARGET_MUL64_SET"
+   "mov\\t0,mlo\t;wait until multiply complete."
+   [(set_attr "length" "4")
+    (set_attr "type" "move")]
+ )
+ 
  ;; Split up troublesome insns for better scheduling.
  
  ;; Peepholes go at the end.
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 4272,4287 ****
  	(ashift:SI (match_operand:SI 1 "register_operand" "")
  		   (match_operand:SI 2 "_1_2_3_operand" "")))
    (set (match_operand:SI 3 "dest_reg_operand" "")
!        (plus:SI (match_operand:SI 4 "nonmemory_operand" "")
! 		(match_operand:SI 5 "nonmemory_operand" "")))]
    "(true_regnum (operands[4]) == true_regnum (operands[0])
         || true_regnum (operands[5]) == true_regnum (operands[0]))
     && (peep2_reg_dead_p (2, operands[0])
!        || (true_regnum (operands[3]) == true_regnum (operands[0])))
!    && !(optimize_size && satisfies_constraint_I (operands[4]))
!    && !(optimize_size && satisfies_constraint_I (operands[5]))"
!  ;; the preparation statements take care to put proper operand in operands[4]
!  ;; operands[4] will always contain the correct operand. This is added to satisfy commutativity
    [(set (match_dup 3)
  	(plus:SI (mult:SI (match_dup 1)
  			  (match_dup 2))
--- 4306,4320 ----
  	(ashift:SI (match_operand:SI 1 "register_operand" "")
  		   (match_operand:SI 2 "_1_2_3_operand" "")))
    (set (match_operand:SI 3 "dest_reg_operand" "")
!        (plus:SI (match_operand:SI 4 "arc_nonmemory_operand" "")
! 		(match_operand:SI 5 "arc_nonmemory_operand" "")))]
    "(true_regnum (operands[4]) == true_regnum (operands[0])
         || true_regnum (operands[5]) == true_regnum (operands[0]))
     && (peep2_reg_dead_p (2, operands[0])
!        || (true_regnum (operands[3]) == true_regnum (operands[0])))"
!  ;; the preparation statements take care to put proper operand in
!  ;; operands[4] operands[4] will always contain the correct
!  ;; operand. This is added to satisfy commutativity
    [(set (match_dup 3)
  	(plus:SI (mult:SI (match_dup 1)
  			  (match_dup 2))
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 4548,4560 ****
    (set_attr "type" "misc")])
  
  (define_insn "rtie"
!   [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "N")]
! 		   VUNSPEC_ARC_RTIE)]
!   ""
    "rtie"
    [(set_attr "length" "4")
!   (set_attr "type" "misc")
!   (set_attr "cond" "clob")])
  
  (define_insn "sync"
    [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "N")]
--- 4581,4593 ----
    (set_attr "type" "misc")])
  
  (define_insn "rtie"
!   [(return)
!    (unspec_volatile [(const_int 0)] VUNSPEC_ARC_RTIE)]
!   "!TARGET_ARC600_FAMILY"
    "rtie"
    [(set_attr "length" "4")
!    (set_attr "type" "rtie")
!    (set_attr "cond" "clob")])
  
  (define_insn "sync"
    [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "N")]
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 4631,4636 ****
--- 4664,4727 ----
    [(set_attr "length" "8,4,8,4")
     (set_attr "type" "sr,sr,sr,sr")])
  
+ (define_mode_iterator ALLI [QI HI SI (DI "TARGET_LL64")])
+ (define_mode_attr mALLI [(QI "b") (HI "%_") (SI "") (DI "d")])
+ 
+ (define_insn "lddi<mode>"
+   [(set (match_operand:ALLI 0 "register_operand" "=r")
+ 	(unspec_volatile:ALLI [(match_operand:ALLI 1 "memory_operand" "m")]
+ 			      VUNSPEC_ARC_LDDI))]
+   ""
+   "ld<mALLI>%U1.di\\t%0,%1"
+   [(set_attr "type" "load")])
+ 
+ (define_insn "stdi<mode>"
+   [(unspec_volatile [(match_operand:ALLI 0 "memory_operand"    "m,m,Usc")
+ 		     (match_operand:ALLI 1 "nonmemory_operand" "r,Cm3,i")]
+ 		    VUNSPEC_ARC_STDI)]
+   ""
+   "st<mALLI>%U0.di\\t%1,%0"
+   [(set_attr "length" "*,*,8")
+    (set_attr "type" "store")])
+ 
+ (define_insn_and_split "*stdidi_split"
+   [(unspec_volatile [(match_operand:DI 0 "memory_operand"   "m")
+ 		     (match_operand:DI 1 "register_operand" "r")]
+ 		    VUNSPEC_ARC_STDI)]
+   "!TARGET_LL64"
+   "#"
+   "&& reload_completed"
+   [(unspec_volatile:SI [(match_dup 2) (match_dup 3)] VUNSPEC_ARC_STDI)
+    (unspec_volatile:SI [(match_dup 4) (match_dup 5)] VUNSPEC_ARC_STDI)]
+   "
+   {
+    operands[3] = gen_lowpart (SImode, operands[1]);
+    operands[5] = gen_highpart_mode (SImode, DImode, operands[1]);
+    operands[2] = gen_lowpart (SImode, operands[0]);
+    operands[4] = gen_highpart (SImode, operands[0]);
+   }
+   "
+   )
+ 
+ (define_insn_and_split "*lddidi_split"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(unspec_volatile:DI [(match_operand:DI 1 "memory_operand" "m")]
+ 			    VUNSPEC_ARC_LDDI))]
+   "!TARGET_LL64"
+   "#"
+   "&& reload_completed"
+   [(set (match_dup 2) (unspec_volatile:SI [(match_dup 3)] VUNSPEC_ARC_LDDI))
+    (set (match_dup 4) (unspec_volatile:SI [(match_dup 5)] VUNSPEC_ARC_LDDI))]
+   "
+   {
+    operands[3] = gen_lowpart (SImode, operands[1]);
+    operands[5] = gen_highpart (SImode, operands[1]);
+    operands[2] = gen_lowpart (SImode, operands[0]);
+    operands[4] = gen_highpart (SImode, operands[0]);
+   }
+   "
+   )
+ 
  (define_insn "trap_s"
    [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "L,Cal")]
  		   VUNSPEC_ARC_TRAP_S)]
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 4776,4863 ****
  ; forbid instructions that change blink in the return / sibcall delay slot.
  (define_insn "simple_return"
    [(simple_return)]
!   "reload_completed"
! {
!   rtx reg
!     = gen_rtx_REG (Pmode,
! 		   arc_return_address_register (arc_compute_function_type
! 						(cfun)));
  
!   if (TARGET_V2
!       && ARC_INTERRUPT_P (arc_compute_function_type (cfun)))
!   {
!     return \"rtie\";
!   }
!   output_asm_insn (\"j%!%* [%0]%&\", &reg);
!   return \"\";
! }
!   [(set (attr "type")
! 	(cond [(and (match_test "ARC_INTERRUPT_P (arc_compute_function_type (cfun))")
! 		    (match_test "TARGET_V2"))
! 	       (const_string "brcc_no_delay_slot")]
! 	      (const_string "return")))
!    ; predicable won't help here since the canonical rtl looks different
!    ; for branches.
!    (set (attr "cond")
! 	(cond [(and (eq (symbol_ref "arc_compute_function_type (cfun)")
! 			(symbol_ref "ARC_FUNCTION_ILINK1"))
! 		    (match_test "TARGET_V2"))
! 	       (const_string "nocond")]
! 	      (const_string "canuse")))
!   (set (attr "iscompact")
! 	(cond [(eq (symbol_ref "arc_compute_function_type (cfun)")
! 		   (symbol_ref "ARC_FUNCTION_NORMAL"))
! 	       (const_string "maybe")]
! 	      (const_string "false")))
!    (set (attr "length")
! 	(cond [(ne (symbol_ref "arc_compute_function_type (cfun)")
! 		   (symbol_ref "ARC_FUNCTION_NORMAL"))
! 	       (const_int 4)]
! 	      (const_int 2)))])
  
  (define_insn "p_return_i"
    [(set (pc)
  	(if_then_else (match_operator 0 "proper_comparison_operator"
  				      [(reg CC_REG) (const_int 0)])
  		      (simple_return) (pc)))]
!   "reload_completed
!    && !(TARGET_V2
!      && ARC_INTERRUPT_P (arc_compute_function_type (cfun)))"
  {
!   rtx xop[2];
!   xop[0] = operands[0];
!   xop[1]
!     = gen_rtx_REG (Pmode,
! 		   arc_return_address_register (arc_compute_function_type
! 						(cfun)));
! 
!   output_asm_insn (\"j%d0%!%# [%1]%&\", xop);
    /* record the condition in case there is a delay insn.  */
!   arc_ccfsm_record_condition (xop[0], false, insn, 0);
    return \"\";
  }
    [(set_attr "type" "return")
     (set_attr "cond" "use")
!    (set (attr "iscompact")
! 	(cond [(eq (symbol_ref "arc_compute_function_type (cfun)")
! 		   (symbol_ref "ARC_FUNCTION_NORMAL"))
! 	       (const_string "maybe")]
! 	      (const_string "false")))
     (set (attr "length")
! 	(cond [(ne (symbol_ref "arc_compute_function_type (cfun)")
! 		   (symbol_ref "ARC_FUNCTION_NORMAL"))
! 	       (const_int 4)
! 	       (not (match_operand 0 "equality_comparison_operator" ""))
  	       (const_int 4)
  	       (eq_attr "delay_slot_filled" "yes")
  	       (const_int 4)]
  	      (const_int 2)))])
  
! ;; ??? #ifdefs in function.c require the presence of this pattern, with a
! ;; non-constant predicate.
  (define_expand "return"
    [(return)]
!   "optimize < 0")
  
   ;; Comment in final.c (insn_current_reference_address) says
   ;; forward branch addresses are calculated from the next insn after branch
--- 4867,4918 ----
  ; forbid instructions that change blink in the return / sibcall delay slot.
  (define_insn "simple_return"
    [(simple_return)]
!   ""
!   "j%!%*\\t[blink]"
!   [(set_attr "type" "return")
!    (set_attr "cond" "canuse")
!    (set_attr "iscompact" "maybe")
!    (set_attr "length" "*")])
  
! (define_insn "arc600_rtie"
!   [(return)
!    (unspec_volatile [(match_operand 0 "pmode_register_operand" "")]
! 		    VUNSPEC_ARC_ARC600_RTIE)]
!   "TARGET_ARC600_FAMILY"
!   "j.f\\t[%0]"
!   [(set_attr "length" "4")
!    (set_attr "type" "rtie")
!    (set_attr "cond" "clob")])
  
  (define_insn "p_return_i"
    [(set (pc)
  	(if_then_else (match_operator 0 "proper_comparison_operator"
  				      [(reg CC_REG) (const_int 0)])
  		      (simple_return) (pc)))]
!   "reload_completed"
  {
!   output_asm_insn (\"j%d0%!%#\\t[blink]\", operands);
    /* record the condition in case there is a delay insn.  */
!   arc_ccfsm_record_condition (operands[0], false, insn, 0);
    return \"\";
  }
    [(set_attr "type" "return")
     (set_attr "cond" "use")
!    (set_attr "iscompact" "maybe" )
     (set (attr "length")
! 	(cond [(not (match_operand 0 "equality_comparison_operator" ""))
  	       (const_int 4)
  	       (eq_attr "delay_slot_filled" "yes")
  	       (const_int 4)]
  	      (const_int 2)))])
  
! ;; Return nonzero if this function is known to have a null epilogue.
! ;; This allows the optimizer to omit jumps to jumps if no stack
! ;; was created.
  (define_expand "return"
    [(return)]
!   "arc_can_use_return_insn ()"
!   "")
  
   ;; Comment in final.c (insn_current_reference_address) says
   ;; forward branch addresses are calculated from the next insn after branch
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 5114,5126 ****
     (set_attr "type" "loop_end")
     (set_attr "length" "4,20")])
  
! (define_expand "movmemsi"
    [(match_operand:BLK 0 "" "")
     (match_operand:BLK 1 "" "")
     (match_operand:SI 2 "nonmemory_operand" "")
     (match_operand 3 "immediate_operand" "")]
    ""
!   "if (arc_expand_movmem (operands)) DONE; else FAIL;")
  
  ;; Close http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35803 if this works
  ;; to the point that we can generate cmove instructions.
--- 5169,5181 ----
     (set_attr "type" "loop_end")
     (set_attr "length" "4,20")])
  
! (define_expand "cpymemsi"
    [(match_operand:BLK 0 "" "")
     (match_operand:BLK 1 "" "")
     (match_operand:SI 2 "nonmemory_operand" "")
     (match_operand 3 "immediate_operand" "")]
    ""
!   "if (arc_expand_cpymem (operands)) DONE; else FAIL;")
  
  ;; Close http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35803 if this works
  ;; to the point that we can generate cmove instructions.
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 5976,5986 ****
     (match_dup 1)])
  
  (define_insn "*rotrsi3_cnt1"
!   [(set (match_operand:SI 0 "dest_reg_operand"             "=w")
! 	(rotatert:SI (match_operand:SI 1 "register_operand" "c")
  		     (const_int 1)))]
    ""
!   "ror %0,%1%&"
    [(set_attr "type" "shift")
     (set_attr "predicable" "no")
     (set_attr "length" "4")])
--- 6031,6051 ----
     (match_dup 1)])
  
  (define_insn "*rotrsi3_cnt1"
!   [(set (match_operand:SI 0 "dest_reg_operand"              "=r")
! 	(rotatert:SI (match_operand:SI 1 "nonmemory_operand" "rL")
  		     (const_int 1)))]
    ""
!   "ror\\t%0,%1"
!   [(set_attr "type" "shift")
!    (set_attr "predicable" "no")
!    (set_attr "length" "4")])
! 
! (define_insn "*rotrsi3_cnt8"
!   [(set (match_operand:SI 0 "register_operand"             "=r")
! 	(rotatert:SI (match_operand:SI 1 "nonmemory_operand" "rL")
! 		     (const_int 8)))]
!   "TARGET_BARREL_SHIFTER && TARGET_V2"
!   "ror8\\t%0,%1"
    [(set_attr "type" "shift")
     (set_attr "predicable" "no")
     (set_attr "length" "4")])
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 5993,6000 ****
--- 6058,6088 ----
    "asl%? %0,%1%&"
    [(set_attr "type" "shift")
     (set_attr "iscompact" "maybe,false")
+    (set_attr "length" "4")
     (set_attr "predicable" "no,no")])
  
+ (define_insn "*ashlsi2_cnt8"
+   [(set (match_operand:SI 0 "register_operand"            "=r")
+ 	(ashift:SI (match_operand:SI 1 "nonmemory_operand" "rL")
+ 		   (const_int 8)))]
+   "TARGET_BARREL_SHIFTER && TARGET_V2"
+   "lsl8\\t%0,%1"
+   [(set_attr "type" "shift")
+    (set_attr "iscompact" "false")
+    (set_attr "length" "4")
+    (set_attr "predicable" "no")])
+ 
+ (define_insn "*ashlsi2_cnt16"
+   [(set (match_operand:SI 0 "register_operand"            "=r")
+ 	(ashift:SI (match_operand:SI 1 "nonmemory_operand" "rL")
+ 		   (const_int 16)))]
+   "TARGET_BARREL_SHIFTER && TARGET_V2"
+   "lsl16\\t%0,%1"
+   [(set_attr "type" "shift")
+    (set_attr "iscompact" "false")
+    (set_attr "length" "4")
+    (set_attr "predicable" "no")])
+ 
  (define_insn "*lshrsi3_cnt1"
    [(set (match_operand:SI 0 "dest_reg_operand"             "=Rcqq,w")
  	(lshiftrt:SI (match_operand:SI 1 "register_operand" "Rcqq,c")
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 6303,6309 ****
    [(set (match_operand:SI 0 "register_operand" "=q,r,r")
  	(plus:SI (ashift:SI (match_operand:SI 1 "register_operand" "q,r,r")
  			    (match_operand:SI 2 "_1_2_3_operand" ""))
! 		 (match_operand:SI 3 "nonmemory_operand"  "0,r,Csz")))]
    ""
    "add%2%?\\t%0,%3,%1"
    [(set_attr "length" "*,4,8")
--- 6391,6397 ----
    [(set (match_operand:SI 0 "register_operand" "=q,r,r")
  	(plus:SI (ashift:SI (match_operand:SI 1 "register_operand" "q,r,r")
  			    (match_operand:SI 2 "_1_2_3_operand" ""))
! 		 (match_operand:SI 3 "arc_nonmemory_operand"  "0,r,Csz")))]
    ""
    "add%2%?\\t%0,%3,%1"
    [(set_attr "length" "*,4,8")
*************** core_3, archs4x, archs4xd, archs4xd_slow
*** 6630,6636 ****
      arc_eh_return_address_location (operands[0]);
      DONE;
    }"
! )
  ;; include the arc-FPX instructions
  (include "fpx.md")
  
--- 6718,6726 ----
      arc_eh_return_address_location (operands[0]);
      DONE;
    }"
!   [(set_attr "length" "8")]
!   )
! 
  ;; include the arc-FPX instructions
  (include "fpx.md")
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc.opt gcc-10.1.0/gcc/config/arc/arc.opt
*** gcc-9.3.0/gcc/config/arc/arc.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the Synopsys DesignWare ARC port of the compiler
  ;
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for the Synopsys DesignWare ARC port of the compiler
  ;
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
*************** Force all calls to be made via a jli ins
*** 59,65 ****
  
  mmpy-option=
  Target RejectNegative Joined Enum(arc_mpy) Var(arc_mpy_option) Init(DEFAULT_arc_mpy_option)
! -mmpy-option=MPY Compile ARCv2 code with a multiplier design option.
  
  Enum
  Name(arc_mpy) Type(int)
--- 59,65 ----
  
  mmpy-option=
  Target RejectNegative Joined Enum(arc_mpy) Var(arc_mpy_option) Init(DEFAULT_arc_mpy_option)
! -mmpy-option=MPY	Compile ARCv2 code with a multiplier design option.
  
  Enum
  Name(arc_mpy) Type(int)
*************** Do not generate mpy instructions for ARC
*** 175,181 ****
  
  mea
  Target Report Mask(EA_SET)
! Generate Extended arithmetic instructions.  Currently only divaw, adds, subs and sat16 are supported.
  
  msoft-float
  Target Report Mask(0)
--- 175,181 ----
  
  mea
  Target Report Mask(EA_SET)
! Generate extended arithmetic instructions, only valid for ARC700.
  
  msoft-float
  Target Report Mask(0)
*************** Cost to assume for a multiply instructio
*** 251,257 ****
  
  mtune=
  Target RejectNegative ToLower Joined Var(arc_tune) Enum(arc_tune_attr) Init(ARC_TUNE_NONE)
! -mcpu=TUNE Tune code for given ARC variant.
  
  Enum
  Name(arc_tune_attr) Type(int)
--- 251,257 ----
  
  mtune=
  Target RejectNegative ToLower Joined Var(arc_tune) Enum(arc_tune_attr) Init(ARC_TUNE_NONE)
! -mtune=TUNE	Tune code for given ARC variant.
  
  Enum
  Name(arc_tune_attr) Type(int)
*************** Target Warn(%qs is deprecated)
*** 335,341 ****
  Enable compact casesi pattern.
  
  mq-class
! Target Var(TARGET_Q_CLASS)
  Enable 'q' instruction alternatives.
  
  mexpand-adddi
--- 335,341 ----
  Enable compact casesi pattern.
  
  mq-class
! Target Warn(%qs is deprecated)
  Enable 'q' instruction alternatives.
  
  mexpand-adddi
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc600.md gcc-10.1.0/gcc/config/arc/arc600.md
*** gcc-9.3.0/gcc/config/arc/arc600.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc600.md	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ;; DFA scheduling description of the Synopsys DesignWare ARC600 cpu
  ;; for GNU C compiler
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  ;; Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
  ;;              on behalf of Synopsys Inc.
  
--- 1,6 ----
  ;; DFA scheduling description of the Synopsys DesignWare ARC600 cpu
  ;; for GNU C compiler
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  ;; Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
  ;;              on behalf of Synopsys Inc.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arc700.md gcc-10.1.0/gcc/config/arc/arc700.md
*** gcc-9.3.0/gcc/config/arc/arc700.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arc700.md	Thu May  7 10:49:59 2020
***************
*** 5,11 ****
  ;;    Ramana Radhakrishnan(ramana.radhakrishnan@codito.com)
  ;;    Factoring out and improvement of ARC700 Scheduling by
  ;;    Joern Rennecke (joern.rennecke@embecosm.com)
! ;; Copyright (C) 2006-2019 Free Software Foundation, Inc.
  
  ;; This file is part of GCC.
  
--- 5,11 ----
  ;;    Ramana Radhakrishnan(ramana.radhakrishnan@codito.com)
  ;;    Factoring out and improvement of ARC700 Scheduling by
  ;;    Joern Rennecke (joern.rennecke@embecosm.com)
! ;; Copyright (C) 2006-2020 Free Software Foundation, Inc.
  
  ;; This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arcEM.md gcc-10.1.0/gcc/config/arc/arcEM.md
*** gcc-9.3.0/gcc/config/arc/arcEM.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arcEM.md	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ;; DFA scheduling description of the Synopsys DesignWare ARC EM cpu
  ;; for GNU C compiler
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  ;; Contributor: Claudiu Zissulescu <claudiu.zissulescu@synopsys.com>
  
  ;; This file is part of GCC.
--- 1,6 ----
  ;; DFA scheduling description of the Synopsys DesignWare ARC EM cpu
  ;; for GNU C compiler
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  ;; Contributor: Claudiu Zissulescu <claudiu.zissulescu@synopsys.com>
  
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arcHS.md gcc-10.1.0/gcc/config/arc/arcHS.md
*** gcc-9.3.0/gcc/config/arc/arcHS.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arcHS.md	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ;; DFA scheduling description of the Synopsys DesignWare ARC HS cpu
  ;; for GNU C compiler
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  ;; Contributor: Claudiu Zissulescu <claudiu.zissulescu@synopsys.com>
  
  ;; This file is part of GCC.
--- 1,6 ----
  ;; DFA scheduling description of the Synopsys DesignWare ARC HS cpu
  ;; for GNU C compiler
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  ;; Contributor: Claudiu Zissulescu <claudiu.zissulescu@synopsys.com>
  
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arc/arcHS4x.md gcc-10.1.0/gcc/config/arc/arcHS4x.md
*** gcc-9.3.0/gcc/config/arc/arcHS4x.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/arcHS4x.md	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ;; DFA scheduling description of the Synopsys DesignWare ARC HS4x cpu
  ;; for GNU C compiler
! ;; Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
  ;; This file is part of GCC.
  
--- 1,6 ----
  ;; DFA scheduling description of the Synopsys DesignWare ARC HS4x cpu
  ;; for GNU C compiler
! ;; Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
  ;; This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/atomic.md gcc-10.1.0/gcc/config/arc/atomic.md
*** gcc-9.3.0/gcc/config/arc/atomic.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/atomic.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; GCC machine description for ARC atomic instructions.
! ;; Copyright (C) 2015-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; GCC machine description for ARC atomic instructions.
! ;; Copyright (C) 2015-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/arc/big.h gcc-10.1.0/gcc/config/arc/big.h
*** gcc-9.3.0/gcc/config/arc/big.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/big.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definition of big endian ARC machine for GNU compiler.
  
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,6 ----
  /* Definition of big endian ARC machine for GNU compiler.
  
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/builtins.def gcc-10.1.0/gcc/config/arc/builtins.def
*** gcc-9.3.0/gcc/config/arc/builtins.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/builtins.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2015-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2015-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
***************
*** 33,39 ****
  
  /* Special builtins.  */
  DEF_BUILTIN (NOP,        0, void_ftype_void,        nothing,     1)
! DEF_BUILTIN (RTIE,       0, void_ftype_void,        rtie,        1)
  DEF_BUILTIN (SYNC,       0, void_ftype_void,        sync,        1)
  DEF_BUILTIN (BRK,        0, void_ftype_void,        brk,         1)
  DEF_BUILTIN (SWI,        0, void_ftype_void,        swi,         1)
--- 33,39 ----
  
  /* Special builtins.  */
  DEF_BUILTIN (NOP,        0, void_ftype_void,        nothing,     1)
! DEF_BUILTIN (RTIE,       0, void_ftype_void,        rtie,        !TARGET_ARC600_FAMILY)
  DEF_BUILTIN (SYNC,       0, void_ftype_void,        sync,        1)
  DEF_BUILTIN (BRK,        0, void_ftype_void,        brk,         1)
  DEF_BUILTIN (SWI,        0, void_ftype_void,        swi,         1)
diff -Nrcpad gcc-9.3.0/gcc/config/arc/constraints.md gcc-10.1.0/gcc/config/arc/constraints.md
*** gcc-9.3.0/gcc/config/arc/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for Synopsys DesignWare ARC.
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Constraint definitions for Synopsys DesignWare ARC.
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 53,59 ****
  (define_register_constraint "x" "R0_REGS"
    "@code{R0} register.")
  
! (define_register_constraint "q" "TARGET_Q_CLASS ? ARCOMPACT16_REGS : NO_REGS"
    "Registers usable in ARCompact 16-bit instructions: @code{r0}-@code{r3},
     @code{r12}-@code{r15}")
  
--- 53,59 ----
  (define_register_constraint "x" "R0_REGS"
    "@code{R0} register.")
  
! (define_register_constraint "q" "ARCOMPACT16_REGS"
    "Registers usable in ARCompact 16-bit instructions: @code{r0}-@code{r3},
     @code{r12}-@code{r15}")
  
***************
*** 201,207 ****
   "@internal
    power of two"
    (and (match_code "const_int")
!        (match_test "IS_POWEROF2_P (ival)")))
  
  (define_constraint "C1p"
   "@internal
--- 201,207 ----
   "@internal
    power of two"
    (and (match_code "const_int")
!        (match_test "IS_POWEROF2_P (ival & 0xffffffff)")))
  
  (define_constraint "C1p"
   "@internal
***************
*** 275,286 ****
    (and (match_code "const_int")
         (match_test "ival == 1 || ival == 2 || ival == 4 || ival == 8")))
  
- (define_constraint "Crr"
-  "@internal
-   constant that can be loaded with ror b,u6"
-   (and (match_code "const_int")
-        (match_test "(ival & ~0x8000001f) == 0 && !arc_ccfsm_cond_exec_p ()")))
- 
  (define_constraint "Cbi"
   "@internal
    constant that can be loaded with movbi.cl"
--- 275,280 ----
***************
*** 290,295 ****
--- 284,303 ----
  		    || ((ival & 0xffffffffUL) >> exact_log2 (ival & -ival)
  			<= 0xff)")))
  
+ (define_constraint "C0x"
+   "@internal
+   special const_int pattern used to split ior insns"
+   (and (match_code "const_int")
+        (match_test "optimize_size")
+        (match_test "arc_check_ior_const (ival)")))
+ 
+ (define_constraint "Cax"
+   "@internal
+   special const_int pattern used to split mov insns"
+   (and (match_code "const_int")
+        (match_test "optimize_size")
+        (match_test "arc_check_mov_const (ival)")))
+ 
  ;; Floating-point constraints
  
  (define_constraint "G"
diff -Nrcpad gcc-9.3.0/gcc/config/arc/driver-arc.c gcc-10.1.0/gcc/config/arc/driver-arc.c
*** gcc-9.3.0/gcc/config/arc/driver-arc.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/driver-arc.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines for the gcc driver.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by Claudiu Zissulescu <claziss@synopsys.com>
  
     This file is part of GCC.
--- 1,5 ----
  /* Subroutines for the gcc driver.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by Claudiu Zissulescu <claziss@synopsys.com>
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arc/elf.h gcc-10.1.0/gcc/config/arc/elf.h
*** gcc-9.3.0/gcc/config/arc/elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/elf.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Target macros for arc*-elf targets.
  
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,6 ----
  /* Target macros for arc*-elf targets.
  
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/fpu.md gcc-10.1.0/gcc/config/arc/fpu.md
*** gcc-9.3.0/gcc/config/arc/fpu.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/fpu.md	Thu May  7 10:49:59 2020
***************
*** 89,95 ****
    [(set (match_operand:SF 0 "register_operand"          "=r,r,r,r,r")
  	(fma:SF (match_operand:SF 1 "nonmemory_operand" "%0,r,0,r,F")
  		(match_operand:SF 2 "nonmemory_operand"  "r,r,F,F,r")
! 		(match_operand:SF 3 "mlo_operand" "")))]
    "TARGET_FP_SP_FUSED
     && (register_operand (operands[1], SFmode)
         || register_operand (operands[2], SFmode))"
--- 89,95 ----
    [(set (match_operand:SF 0 "register_operand"          "=r,r,r,r,r")
  	(fma:SF (match_operand:SF 1 "nonmemory_operand" "%0,r,0,r,F")
  		(match_operand:SF 2 "nonmemory_operand"  "r,r,F,F,r")
! 		(match_operand:SF 3 "accl_operand" "")))]
    "TARGET_FP_SP_FUSED
     && (register_operand (operands[1], SFmode)
         || register_operand (operands[2], SFmode))"
***************
*** 104,110 ****
    [(set (match_operand:SF 0 "register_operand"                  "=r,r,r,r,r")
  	(fma:SF (neg:SF (match_operand:SF 1 "nonmemory_operand" "%0,r,0,r,F"))
  		(match_operand:SF 2 "nonmemory_operand"          "r,r,F,F,r")
! 		(match_operand:SF 3 "mlo_operand" "")))]
    "TARGET_FP_SP_FUSED
     && (register_operand (operands[1], SFmode)
         || register_operand (operands[2], SFmode))"
--- 104,110 ----
    [(set (match_operand:SF 0 "register_operand"                  "=r,r,r,r,r")
  	(fma:SF (neg:SF (match_operand:SF 1 "nonmemory_operand" "%0,r,0,r,F"))
  		(match_operand:SF 2 "nonmemory_operand"          "r,r,F,F,r")
! 		(match_operand:SF 3 "accl_operand" "")))]
    "TARGET_FP_SP_FUSED
     && (register_operand (operands[1], SFmode)
         || register_operand (operands[2], SFmode))"
diff -Nrcpad gcc-9.3.0/gcc/config/arc/fpx.md gcc-10.1.0/gcc/config/arc/fpx.md
*** gcc-9.3.0/gcc/config/arc/fpx.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/fpx.md	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ;; Machine description of the Synopsys DesignWare ARC cpu Floating Point
  ;; extensions for GNU C compiler
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  
  ;; This file is part of GCC.
  
--- 1,6 ----
  ;; Machine description of the Synopsys DesignWare ARC cpu Floating Point
  ;; extensions for GNU C compiler
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  
  ;; This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/genmultilib.awk gcc-10.1.0/gcc/config/arc/genmultilib.awk
*** gcc-9.3.0/gcc/config/arc/genmultilib.awk	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/genmultilib.awk	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2016-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2016-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/arc/genoptions.awk gcc-10.1.0/gcc/config/arc/genoptions.awk
*** gcc-9.3.0/gcc/config/arc/genoptions.awk	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/genoptions.awk	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2016-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2016-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/arc/linux.h gcc-10.1.0/gcc/config/arc/linux.h
*** gcc-9.3.0/gcc/config/arc/linux.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/linux.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Target macros for arc*-*-linux targets.
  
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,6 ----
  /* Target macros for arc*-*-linux targets.
  
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 29,35 ****
      }						\
    while (0)
  
! #define GLIBC_DYNAMIC_LINKER   "/lib/ld-linux-arc.so.2"
  #define UCLIBC_DYNAMIC_LINKER  "/lib/ld-uClibc.so.0"
  
  /* Note that the default is to link against dynamic libraries, if they are
--- 29,36 ----
      }						\
    while (0)
  
! #define GLIBC_DYNAMIC_LINKER					\
!   "/lib/ld-linux-arc%{mbig-endian:eb}%{mcpu=arc700:700}.so.2"
  #define UCLIBC_DYNAMIC_LINKER  "/lib/ld-uClibc.so.0"
  
  /* Note that the default is to link against dynamic libraries, if they are
diff -Nrcpad gcc-9.3.0/gcc/config/arc/predicates.md gcc-10.1.0/gcc/config/arc/predicates.md
*** gcc-9.3.0/gcc/config/arc/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicate definitions for Synopsys DesignWare ARC.
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Predicate definitions for Synopsys DesignWare ARC.
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 285,290 ****
--- 285,292 ----
  	return GET_MODE (op) == SFmode;
        return 0;
      case REG :
+       if (REGNO (op) == LP_COUNT)
+ 	return 1;
        return register_operand (op, mode);
      case SUBREG :
        /* (subreg (mem ...) ...) can occur here if the inner part was once a
***************
*** 686,696 ****
  
  (define_predicate "mlo_operand"
    (and (match_code "reg")
!        (match_test "REGNO (op) == (TARGET_BIG_ENDIAN ? 59 : 58)")))
  
  (define_predicate "mhi_operand"
    (and (match_code "reg")
!        (match_test "REGNO (op) == (TARGET_BIG_ENDIAN ? 58 : 59)")))
  
  (define_predicate "accl_operand"
    (and (match_code "reg")
--- 688,698 ----
  
  (define_predicate "mlo_operand"
    (and (match_code "reg")
!        (match_test "REGNO (op) == R58_REG")))
  
  (define_predicate "mhi_operand"
    (and (match_code "reg")
!        (match_test "REGNO (op) == R59_REG")))
  
  (define_predicate "accl_operand"
    (and (match_code "reg")
***************
*** 793,795 ****
--- 795,802 ----
    {
     return arc_check_multi (op, false);
  })
+ 
+ (define_predicate "arc_nonmemory_operand"
+   (ior (match_test "register_operand (op, mode)")
+        (and (match_code "const_int, symbol_ref")
+ 	    (match_test "!optimize_size"))))
diff -Nrcpad gcc-9.3.0/gcc/config/arc/simdext.md gcc-10.1.0/gcc/config/arc/simdext.md
*** gcc-9.3.0/gcc/config/arc/simdext.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/simdext.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description of the Synopsys DesignWare ARC cpu for GNU C compiler
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  
  ;; This file is part of GCC.
  
--- 1,5 ----
  ;; Machine description of the Synopsys DesignWare ARC cpu for GNU C compiler
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  
  ;; This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arc/t-arc gcc-10.1.0/gcc/config/arc/t-arc
*** gcc-9.3.0/gcc/config/arc/t-arc	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/t-arc	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  # GCC Makefile fragment for Synopsys DesignWare ARC.
  #
! # Copyright (C) 2016-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,6 ----
  # GCC Makefile fragment for Synopsys DesignWare ARC.
  #
! # Copyright (C) 2016-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
*************** $(srcdir)/config/arc/arc-tables.opt: $(s
*** 43,48 ****
--- 43,50 ----
  				 $(srcdir)/config/arc/arc-cpus.def
  	$(AWK) -f $< -v FORMAT=Makefile $< $(srcdir)/config/arc/arc-cpus.def > $@
  
+ PASSES_EXTRA += $(srcdir)/config/arc/arc-passes.def
+ 
  # Local Variables:
  # mode: Makefile
  # End:
diff -Nrcpad gcc-9.3.0/gcc/config/arc/t-multilib gcc-10.1.0/gcc/config/arc/t-multilib
*** gcc-9.3.0/gcc/config/arc/t-multilib	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/t-multilib	Thu May  7 10:49:59 2020
***************
*** 3,9 ****
  # Generated from  : ./gcc/config/arc/arc-cpu.def
  # Used by         : tmake_file from Makefile and genmultilib
  
! # Copyright (C) 2016-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 3,9 ----
  # Generated from  : ./gcc/config/arc/arc-cpu.def
  # Used by         : tmake_file from Makefile and genmultilib
  
! # Copyright (C) 2016-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/arc/t-multilib-linux gcc-10.1.0/gcc/config/arc/t-multilib-linux
*** gcc-9.3.0/gcc/config/arc/t-multilib-linux	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arc/t-multilib-linux	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2018-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2018-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/arm/README-interworking gcc-10.1.0/gcc/config/arm/README-interworking
*** gcc-9.3.0/gcc/config/arm/README-interworking	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/README-interworking	Thu May  7 10:49:59 2020
*************** used.
*** 742,748 ****
       interworking as the --support-old-code switch has taken care if this.
  
  
! Copyright (C) 1998-2019 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
--- 742,748 ----
       interworking as the --support-old-code switch has taken care if this.
  
  
! Copyright (C) 1998-2020 Free Software Foundation, Inc.
  
  Copying and distribution of this file, with or without modification,
  are permitted in any medium without royalty provided the copyright
diff -Nrcpad gcc-9.3.0/gcc/config/arm/aarch-common-protos.h gcc-10.1.0/gcc/config/arm/aarch-common-protos.h
*** gcc-9.3.0/gcc/config/arm/aarch-common-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/aarch-common-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Functions and structures shared between arm and aarch64.
  
!    Copyright (C) 1991-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,6 ----
  /* Functions and structures shared between arm and aarch64.
  
!    Copyright (C) 1991-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 23,30 ****
  #ifndef GCC_AARCH_COMMON_PROTOS_H
  #define GCC_AARCH_COMMON_PROTOS_H
  
  extern int aarch_accumulator_forwarding (rtx_insn *, rtx_insn *);
- extern int aarch_crypto_can_dual_issue (rtx_insn *, rtx_insn *);
  extern bool aarch_rev16_p (rtx);
  extern bool aarch_rev16_shleft_mask_imm_p (rtx, machine_mode);
  extern bool aarch_rev16_shright_mask_imm_p (rtx, machine_mode);
--- 23,31 ----
  #ifndef GCC_AARCH_COMMON_PROTOS_H
  #define GCC_AARCH_COMMON_PROTOS_H
  
+ #include "hard-reg-set.h"
+ 
  extern int aarch_accumulator_forwarding (rtx_insn *, rtx_insn *);
  extern bool aarch_rev16_p (rtx);
  extern bool aarch_rev16_shleft_mask_imm_p (rtx, machine_mode);
  extern bool aarch_rev16_shright_mask_imm_p (rtx, machine_mode);
*************** struct cpu_cost_table
*** 142,146 ****
--- 143,151 ----
    const struct vector_cost_table vect;
  };
  
+ rtx_insn *
+ arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
+ 		    vec<const char *> &constraints,
+ 		    vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs);
  
  #endif /* GCC_AARCH_COMMON_PROTOS_H */
diff -Nrcpad gcc-9.3.0/gcc/config/arm/aarch-common.c gcc-10.1.0/gcc/config/arm/aarch-common.c
*** gcc-9.3.0/gcc/config/arm/aarch-common.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/aarch-common.c	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Dependency checks for instruction scheduling, shared between ARM and
     AARCH64.
  
!    Copyright (C) 1991-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,7 ----
  /* Dependency checks for instruction scheduling, shared between ARM and
     AARCH64.
  
!    Copyright (C) 1991-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 26,75 ****
  #include "config.h"
  #include "system.h"
  #include "coretypes.h"
  #include "tm.h"
  #include "rtl.h"
  #include "rtl-iter.h"
  #include "memmodel.h"
! 
! /* In ARMv8-A there's a general expectation that AESE/AESMC
!    and AESD/AESIMC sequences of the form:
! 
!    AESE Vn, _
!    AESMC Vn, Vn
! 
!    will issue both instructions in a single cycle on super-scalar
!    implementations.  This function identifies such pairs.  */
! 
! int
! aarch_crypto_can_dual_issue (rtx_insn *producer_insn, rtx_insn *consumer_insn)
! {
!   rtx producer_set, consumer_set;
!   rtx producer_src, consumer_src;
! 
!   producer_set = single_set (producer_insn);
!   consumer_set = single_set (consumer_insn);
! 
!   producer_src = producer_set ? SET_SRC (producer_set) : NULL;
!   consumer_src = consumer_set ? SET_SRC (consumer_set) : NULL;
! 
!   if (producer_src && consumer_src
!       && GET_CODE (producer_src) == UNSPEC && GET_CODE (consumer_src) == UNSPEC
!       && ((XINT (producer_src, 1) == UNSPEC_AESE
!            && XINT (consumer_src, 1) == UNSPEC_AESMC)
!           || (XINT (producer_src, 1) == UNSPEC_AESD
!               && XINT (consumer_src, 1) == UNSPEC_AESIMC)))
!   {
!     unsigned int regno = REGNO (SET_DEST (producer_set));
! 
!     /* Before reload the registers are virtual, so the destination of
!        consumer_set doesn't need to match.  */
! 
!     return (REGNO (SET_DEST (consumer_set)) == regno || !reload_completed)
! 	    && REGNO (XVECEXP (consumer_src, 0, 0)) == regno;
!   }
! 
!   return 0;
! }
  
  /* Return TRUE if X is either an arithmetic shift left, or
     is a multiplication by a power of two.  */
--- 26,41 ----
  #include "config.h"
  #include "system.h"
  #include "coretypes.h"
+ #include "insn-modes.h"
  #include "tm.h"
  #include "rtl.h"
  #include "rtl-iter.h"
  #include "memmodel.h"
! #include "diagnostic.h"
! #include "tree.h"
! #include "expr.h"
! #include "function.h"
! #include "emit-rtl.h"
  
  /* Return TRUE if X is either an arithmetic shift left, or
     is a multiplication by a power of two.  */
*************** arm_mac_accumulator_is_mul_result (rtx p
*** 560,562 ****
--- 526,658 ----
            && !reg_overlap_mentioned_p (mul_result, mac_op0)
            && !reg_overlap_mentioned_p (mul_result, mac_op1));
  }
+ 
+ /* Worker function for TARGET_MD_ASM_ADJUST.
+    We implement asm flag outputs.  */
+ 
+ rtx_insn *
+ arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
+ 		    vec<const char *> &constraints,
+ 		    vec<rtx> &/*clobbers*/, HARD_REG_SET &/*clobbered_regs*/)
+ {
+   bool saw_asm_flag = false;
+ 
+   start_sequence ();
+   for (unsigned i = 0, n = outputs.length (); i < n; ++i)
+     {
+       const char *con = constraints[i];
+       if (strncmp (con, "=@cc", 4) != 0)
+ 	continue;
+       con += 4;
+       if (strchr (con, ',') != NULL)
+ 	{
+ 	  error ("alternatives not allowed in %<asm%> flag output");
+ 	  continue;
+ 	}
+ 
+       machine_mode mode;
+       rtx_code code;
+       int con01 = 0;
+ 
+ #define C(X, Y)  (unsigned char)(X) * 256 + (unsigned char)(Y)
+ 
+       /* All of the condition codes are two characters.  */
+       if (con[0] != 0 && con[1] != 0 && con[2] == 0)
+ 	con01 = C(con[0], con[1]);
+ 
+       switch (con01)
+ 	{
+ 	case C('c', 'c'):
+ 	case C('l', 'o'):
+ 	  mode = CC_Cmode, code = GEU;
+ 	  break;
+ 	case C('c', 's'):
+ 	case C('h', 's'):
+ 	  mode = CC_Cmode, code = LTU;
+ 	  break;
+ 	case C('e', 'q'):
+ 	  mode = CC_NZmode, code = EQ;
+ 	  break;
+ 	case C('g', 'e'):
+ 	  mode = CCmode, code = GE;
+ 	  break;
+ 	case C('g', 't'):
+ 	  mode = CCmode, code = GT;
+ 	  break;
+ 	case C('h', 'i'):
+ 	  mode = CCmode, code = GTU;
+ 	  break;
+ 	case C('l', 'e'):
+ 	  mode = CCmode, code = LE;
+ 	  break;
+ 	case C('l', 's'):
+ 	  mode = CCmode, code = LEU;
+ 	  break;
+ 	case C('l', 't'):
+ 	  mode = CCmode, code = LT;
+ 	  break;
+ 	case C('m', 'i'):
+ 	  mode = CC_NZmode, code = LT;
+ 	  break;
+ 	case C('n', 'e'):
+ 	  mode = CC_NZmode, code = NE;
+ 	  break;
+ 	case C('p', 'l'):
+ 	  mode = CC_NZmode, code = GE;
+ 	  break;
+ 	case C('v', 'c'):
+ 	  mode = CC_Vmode, code = EQ;
+ 	  break;
+ 	case C('v', 's'):
+ 	  mode = CC_Vmode, code = NE;
+ 	  break;
+ 	default:
+ 	  error ("unknown %<asm%> flag output %qs", constraints[i]);
+ 	  continue;
+ 	}
+ 
+ #undef C
+ 
+       rtx dest = outputs[i];
+       machine_mode dest_mode = GET_MODE (dest);
+       if (!SCALAR_INT_MODE_P (dest_mode))
+ 	{
+ 	  error ("invalid type for %<asm%> flag output");
+ 	  continue;
+ 	}
+ 
+       if (!saw_asm_flag)
+ 	{
+ 	  /* This is the first asm flag output.  Here we put the flags
+ 	     register in as the real output and adjust the condition to
+ 	     allow it.  */
+ 	  constraints[i] = "=c";
+ 	  outputs[i] = gen_rtx_REG (CCmode, CC_REGNUM);
+ 	  saw_asm_flag = true;
+ 	}
+       else
+ 	{
+ 	  /* We don't need the flags register as output twice.  */
+ 	  constraints[i] = "=X";
+ 	  outputs[i] = gen_rtx_SCRATCH (word_mode);
+ 	}
+ 
+       rtx x = gen_rtx_REG (mode, CC_REGNUM);
+       x = gen_rtx_fmt_ee (code, word_mode, x, const0_rtx);
+ 
+       if (dest_mode == word_mode)
+ 	emit_insn (gen_rtx_SET (dest, x));
+       else
+ 	{
+ 	  rtx tmp = gen_reg_rtx (word_mode);
+ 	  emit_insn (gen_rtx_SET (tmp, x));
+ 
+ 	  tmp = convert_modes (dest_mode, word_mode, tmp, true);
+ 	  emit_move_insn (dest, tmp);
+ 	}
+     }
+   rtx_insn *seq = get_insns ();
+   end_sequence ();
+ 
+   return saw_asm_flag ? seq : NULL;
+ }
diff -Nrcpad gcc-9.3.0/gcc/config/arm/aarch-cost-tables.h gcc-10.1.0/gcc/config/arm/aarch-cost-tables.h
*** gcc-9.3.0/gcc/config/arm/aarch-cost-tables.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/aarch-cost-tables.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* RTX cost tables shared between arm and aarch64.
  
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,6 ----
  /* RTX cost tables shared between arm and aarch64.
  
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
*************** const struct cpu_cost_table cortexa57_ex
*** 235,241 ****
      0,                 /* arith.  */
      0,                 /* logical.  */
      0,                 /* shift.  */
!     COSTS_N_INSNS (1), /* shift_reg.  */
      COSTS_N_INSNS (1), /* arith_shift.  */
      COSTS_N_INSNS (1), /* arith_shift_reg.  */
      COSTS_N_INSNS (1), /* log_shift.  */
--- 235,241 ----
      0,                 /* arith.  */
      0,                 /* logical.  */
      0,                 /* shift.  */
!     0,			/* shift_reg.  */
      COSTS_N_INSNS (1), /* arith_shift.  */
      COSTS_N_INSNS (1), /* arith_shift_reg.  */
      COSTS_N_INSNS (1), /* log_shift.  */
diff -Nrcpad gcc-9.3.0/gcc/config/arm/aout.h gcc-10.1.0/gcc/config/arm/aout.h
*** gcc-9.3.0/gcc/config/arm/aout.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/aout.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, for ARM with a.out
!    Copyright (C) 1995-2019 Free Software Foundation, Inc.
     Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
     
     This file is part of GCC.
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, for ARM with a.out
!    Copyright (C) 1995-2020 Free Software Foundation, Inc.
     Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
     
     This file is part of GCC.
***************
*** 53,59 ****
  /* The assembler's names for the registers.  Note that the ?xx registers are
     there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
     (each of which is overlaid on two S registers), although there are no
!    actual single-precision registers which correspond to D16-D31.  */
  #ifndef REGISTER_NAMES
  #define REGISTER_NAMES						\
  {								\
--- 53,61 ----
  /* The assembler's names for the registers.  Note that the ?xx registers are
     there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
     (each of which is overlaid on two S registers), although there are no
!    actual single-precision registers which correspond to D16-D31.  New register
!    p0 is added which is used for MVE predicated cases.  */
! 
  #ifndef REGISTER_NAMES
  #define REGISTER_NAMES						\
  {								\
***************
*** 72,78 ****
    "wr8",   "wr9",   "wr10",  "wr11",				\
    "wr12",  "wr13",  "wr14",  "wr15",				\
    "wcgr0", "wcgr1", "wcgr2", "wcgr3",				\
!   "cc", "vfpcc", "sfp", "afp"					\
  }
  #endif
  
--- 74,80 ----
    "wr8",   "wr9",   "wr10",  "wr11",				\
    "wr12",  "wr13",  "wr14",  "wr15",				\
    "wcgr0", "wcgr1", "wcgr2", "wcgr3",				\
!   "cc", "vfpcc", "sfp", "afp", "apsrq", "apsrge", "p0"		\
  }
  #endif
  
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-builtins.c gcc-10.1.0/gcc/config/arm/arm-builtins.c
*** gcc-9.3.0/gcc/config/arm/arm-builtins.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm-builtins.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Description of builtins used by the ARM backend.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Description of builtins used by the ARM backend.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
***************
*** 41,46 ****
--- 41,48 ----
  #include "langhooks.h"
  #include "case-cfn-macros.h"
  #include "sbitmap.h"
+ #include "stringpool.h"
+ #include "arm-builtins.h"
  
  #define SIMD_MAX_BUILTIN_ARGS 7
  
*************** enum arm_type_qualifiers
*** 85,91 ****
    qualifier_const_void_pointer = 0x802,
    /* Lane indices selected in pairs - must be within range of previous
       argument = a vector.  */
!   qualifier_lane_pair_index = 0x1000
  };
  
  /*  The qualifier_internal allows generation of a unary builtin from
--- 87,96 ----
    qualifier_const_void_pointer = 0x802,
    /* Lane indices selected in pairs - must be within range of previous
       argument = a vector.  */
!   qualifier_lane_pair_index = 0x1000,
!   /* Lane indices selected in quadtuplets - must be within range of previous
!      argument = a vector.  */
!   qualifier_lane_quadtup_index = 0x2000
  };
  
  /*  The qualifier_internal allows generation of a unary builtin from
*************** arm_unsigned_uternop_qualifiers[SIMD_MAX
*** 121,132 ****
--- 126,158 ----
        qualifier_unsigned };
  #define UTERNOP_QUALIFIERS (arm_unsigned_uternop_qualifiers)
  
+ /* T (T, unsigned T, T).  */
+ static enum arm_type_qualifiers
+ arm_usternop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_unsigned,
+       qualifier_none };
+ #define USTERNOP_QUALIFIERS (arm_usternop_qualifiers)
+ 
  /* T (T, immediate).  */
  static enum arm_type_qualifiers
  arm_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
    = { qualifier_none, qualifier_none, qualifier_immediate };
  #define BINOP_IMM_QUALIFIERS (arm_binop_imm_qualifiers)
  
+ /* T (T, unsigned immediate).  */
+ static enum arm_type_qualifiers
+ arm_sat_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_none, qualifier_unsigned_immediate };
+ #define SAT_BINOP_UNSIGNED_IMM_QUALIFIERS \
+   (arm_sat_binop_imm_qualifiers)
+ 
+ /* unsigned T (T, unsigned immediate).  */
+ static enum arm_type_qualifiers
+ arm_unsigned_sat_binop_unsigned_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_none, qualifier_unsigned_immediate };
+ #define UNSIGNED_SAT_BINOP_UNSIGNED_IMM_QUALIFIERS \
+   (arm_unsigned_sat_binop_unsigned_imm_qualifiers)
+ 
  /* T (T, lane index).  */
  static enum arm_type_qualifiers
  arm_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
*************** arm_umac_lane_qualifiers[SIMD_MAX_BUILTI
*** 161,166 ****
--- 187,206 ----
        qualifier_unsigned, qualifier_lane_index };
  #define UMAC_LANE_QUALIFIERS (arm_umac_lane_qualifiers)
  
+ /* T (T, unsigned T, T, lane index).  */
+ static enum arm_type_qualifiers
+ arm_usmac_lane_quadtup_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_unsigned,
+       qualifier_none, qualifier_lane_quadtup_index };
+ #define USMAC_LANE_QUADTUP_QUALIFIERS (arm_usmac_lane_quadtup_qualifiers)
+ 
+ /* T (T, T, unsigend T, lane index).  */
+ static enum arm_type_qualifiers
+ arm_sumac_lane_quadtup_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_none,
+       qualifier_unsigned, qualifier_lane_quadtup_index };
+ #define SUMAC_LANE_QUADTUP_QUALIFIERS (arm_sumac_lane_quadtup_qualifiers)
+ 
  /* T (T, T, immediate).  */
  static enum arm_type_qualifiers
  arm_ternop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
*************** arm_mrrc_qualifiers[SIMD_MAX_BUILTIN_ARG
*** 266,271 ****
--- 306,366 ----
  #define MRRC_QUALIFIERS \
    (arm_mrrc_qualifiers)
  
+ /* T (immediate, unsigned immediate).  */
+ static enum arm_type_qualifiers
+ arm_cx_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_immediate, qualifier_unsigned_immediate };
+ #define CX_IMM_QUALIFIERS (arm_cx_imm_qualifiers)
+ 
+ /* T (immediate, T, unsigned immediate).  */
+ static enum arm_type_qualifiers
+ arm_cx_unary_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_immediate, qualifier_none,
+       qualifier_unsigned_immediate };
+ #define CX_UNARY_QUALIFIERS (arm_cx_unary_qualifiers)
+ 
+ /* T (immediate, T, T, unsigned immediate).  */
+ static enum arm_type_qualifiers
+ arm_cx_binary_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_immediate,
+       qualifier_none, qualifier_none,
+       qualifier_unsigned_immediate };
+ #define CX_BINARY_QUALIFIERS (arm_cx_binary_qualifiers)
+ 
+ /* T (immediate, T, T, T, unsigned immediate).  */
+ static enum arm_type_qualifiers
+ arm_cx_ternary_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_immediate,
+       qualifier_none, qualifier_none, qualifier_none,
+       qualifier_unsigned_immediate };
+ #define CX_TERNARY_QUALIFIERS (arm_cx_ternary_qualifiers)
+ 
+ /* T (immediate, T, unsigned immediate).  */
+ static enum arm_type_qualifiers
+ arm_cx_unary_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_immediate, qualifier_none,
+       qualifier_unsigned_immediate,
+       qualifier_unsigned };
+ #define CX_UNARY_UNONE_QUALIFIERS (arm_cx_unary_unone_qualifiers)
+ 
+ /* T (immediate, T, T, unsigned immediate).  */
+ static enum arm_type_qualifiers
+ arm_cx_binary_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_immediate,
+       qualifier_none, qualifier_none,
+       qualifier_unsigned_immediate,
+       qualifier_unsigned };
+ #define CX_BINARY_UNONE_QUALIFIERS (arm_cx_binary_unone_qualifiers)
+ 
+ /* T (immediate, T, T, T, unsigned immediate).  */
+ static enum arm_type_qualifiers
+ arm_cx_ternary_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_immediate,
+       qualifier_none, qualifier_none, qualifier_none,
+       qualifier_unsigned_immediate,
+       qualifier_unsigned };
+ #define CX_TERNARY_UNONE_QUALIFIERS (arm_cx_ternary_unone_qualifiers)
+ 
  /* The first argument (return type) of a store should be void type,
     which we represent with qualifier_void.  Their first operand will be
     a DImode pointer to the location to store to, so we must use
*************** arm_store1_qualifiers[SIMD_MAX_BUILTIN_A
*** 278,283 ****
--- 373,856 ----
    = { qualifier_void, qualifier_pointer_map_mode, qualifier_none };
  #define STORE1_QUALIFIERS (arm_store1_qualifiers)
  
+ /* Qualifiers for MVE builtins.  */
+ 
+ static enum arm_type_qualifiers
+ arm_unop_none_none_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none };
+ #define UNOP_NONE_NONE_QUALIFIERS \
+   (arm_unop_none_none_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_unop_none_snone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none };
+ #define UNOP_NONE_SNONE_QUALIFIERS \
+   (arm_unop_none_snone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_unop_none_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_unsigned };
+ #define UNOP_NONE_UNONE_QUALIFIERS \
+   (arm_unop_none_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_unop_snone_snone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none };
+ #define UNOP_SNONE_SNONE_QUALIFIERS \
+   (arm_unop_snone_snone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_unop_snone_none_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none };
+ #define UNOP_SNONE_NONE_QUALIFIERS \
+   (arm_unop_snone_none_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_unop_snone_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_immediate };
+ #define UNOP_SNONE_IMM_QUALIFIERS \
+   (arm_unop_snone_imm_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_unop_unone_none_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_none };
+ #define UNOP_UNONE_NONE_QUALIFIERS \
+   (arm_unop_unone_none_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_unop_unone_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned };
+ #define UNOP_UNONE_UNONE_QUALIFIERS \
+   (arm_unop_unone_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_unop_unone_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_immediate };
+ #define UNOP_UNONE_IMM_QUALIFIERS \
+   (arm_unop_unone_imm_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_binop_none_none_none_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_none };
+ #define BINOP_NONE_NONE_NONE_QUALIFIERS \
+   (arm_binop_none_none_none_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_binop_none_none_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_immediate };
+ #define BINOP_NONE_NONE_IMM_QUALIFIERS \
+   (arm_binop_none_none_imm_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_binop_none_unone_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_unsigned, qualifier_immediate };
+ #define BINOP_NONE_UNONE_IMM_QUALIFIERS \
+   (arm_binop_none_unone_imm_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_binop_none_unone_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_unsigned, qualifier_unsigned };
+ #define BINOP_NONE_UNONE_UNONE_QUALIFIERS \
+   (arm_binop_none_unone_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_binop_unone_unone_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_immediate };
+ #define BINOP_UNONE_UNONE_IMM_QUALIFIERS \
+   (arm_binop_unone_unone_imm_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_binop_unone_unone_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned };
+ #define BINOP_UNONE_UNONE_UNONE_QUALIFIERS \
+   (arm_binop_unone_unone_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_binop_unone_none_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_none, qualifier_immediate };
+ #define BINOP_UNONE_NONE_IMM_QUALIFIERS \
+   (arm_binop_unone_none_imm_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_binop_none_none_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_unsigned };
+ #define BINOP_NONE_NONE_UNONE_QUALIFIERS \
+   (arm_binop_none_none_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_binop_unone_none_none_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_none, qualifier_none };
+ #define BINOP_UNONE_NONE_NONE_QUALIFIERS \
+   (arm_binop_unone_none_none_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_binop_unone_unone_none_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_none };
+ #define BINOP_UNONE_UNONE_NONE_QUALIFIERS \
+   (arm_binop_unone_unone_none_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_unone_unone_unone_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned,
+     qualifier_immediate };
+ #define TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS \
+   (arm_ternop_unone_unone_unone_imm_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_unone_unone_none_none_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_none, qualifier_none };
+ #define TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS \
+   (arm_ternop_unone_unone_none_none_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_unone_none_unone_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_none, qualifier_unsigned,
+       qualifier_immediate };
+ #define TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS \
+   (arm_ternop_unone_none_unone_imm_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_none_none_unone_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_unsigned, qualifier_immediate };
+ #define TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS \
+   (arm_ternop_none_none_unone_imm_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_unone_unone_none_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_none,
+     qualifier_immediate };
+ #define TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS \
+   (arm_ternop_unone_unone_none_imm_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_unone_unone_none_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_none,
+       qualifier_unsigned };
+ #define TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS \
+   (arm_ternop_unone_unone_none_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_unone_unone_imm_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_immediate,
+     qualifier_unsigned };
+ #define TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS \
+   (arm_ternop_unone_unone_imm_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_unone_none_none_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_none, qualifier_none, qualifier_unsigned };
+ #define TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS \
+   (arm_ternop_unone_none_none_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_none_none_none_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_none, qualifier_immediate };
+ #define TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS \
+   (arm_ternop_none_none_none_imm_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_none_none_none_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_none, qualifier_unsigned };
+ #define TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS \
+   (arm_ternop_none_none_none_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_none_none_imm_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_immediate, qualifier_unsigned };
+ #define TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS \
+   (arm_ternop_none_none_imm_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_none_none_unone_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_unsigned, qualifier_unsigned };
+ #define TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS \
+   (arm_ternop_none_none_unone_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_unone_unone_unone_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned,
+     qualifier_unsigned };
+ #define TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS \
+   (arm_ternop_unone_unone_unone_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ternop_none_none_none_none_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_none, qualifier_none };
+ #define TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS \
+   (arm_ternop_none_none_none_none_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_quadop_unone_unone_none_none_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_none, qualifier_none,
+     qualifier_unsigned };
+ #define QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS \
+   (arm_quadop_unone_unone_none_none_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_quadop_none_none_none_none_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_none, qualifier_none,
+     qualifier_unsigned };
+ #define QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS \
+   (arm_quadop_none_none_none_none_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_quadop_none_none_none_imm_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_none, qualifier_immediate,
+     qualifier_unsigned };
+ #define QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS \
+   (arm_quadop_none_none_none_imm_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_quadop_unone_unone_unone_unone_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned,
+     qualifier_unsigned, qualifier_unsigned };
+ #define QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS \
+   (arm_quadop_unone_unone_unone_unone_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_quadop_unone_unone_none_imm_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_none,
+     qualifier_immediate, qualifier_unsigned };
+ #define QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS \
+   (arm_quadop_unone_unone_none_imm_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_quadop_none_none_unone_imm_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_unsigned, qualifier_immediate,
+     qualifier_unsigned };
+ #define QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS \
+   (arm_quadop_none_none_unone_imm_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_quadop_unone_unone_unone_imm_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned,
+     qualifier_immediate, qualifier_unsigned };
+ #define QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS \
+   (arm_quadop_unone_unone_unone_imm_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_quadop_unone_unone_unone_none_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned,
+     qualifier_none, qualifier_unsigned };
+ #define QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS \
+   (arm_quadop_unone_unone_unone_none_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strs_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_pointer, qualifier_none };
+ #define STRS_QUALIFIERS (arm_strs_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_stru_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_pointer, qualifier_unsigned };
+ #define STRU_QUALIFIERS (arm_stru_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strss_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_pointer, qualifier_unsigned,
+       qualifier_none};
+ #define STRSS_QUALIFIERS (arm_strss_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strsu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_pointer, qualifier_unsigned,
+       qualifier_unsigned};
+ #define STRSU_QUALIFIERS (arm_strsu_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strsbs_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_unsigned, qualifier_immediate, qualifier_none};
+ #define STRSBS_QUALIFIERS (arm_strsbs_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strsbu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_unsigned, qualifier_immediate,
+       qualifier_unsigned};
+ #define STRSBU_QUALIFIERS (arm_strsbu_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strs_p_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_pointer, qualifier_none, qualifier_unsigned};
+ #define STRS_P_QUALIFIERS (arm_strs_p_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_stru_p_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_pointer, qualifier_unsigned,
+       qualifier_unsigned};
+ #define STRU_P_QUALIFIERS (arm_stru_p_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strsu_p_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_pointer, qualifier_unsigned,
+       qualifier_unsigned, qualifier_unsigned};
+ #define STRSU_P_QUALIFIERS (arm_strsu_p_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strss_p_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_pointer, qualifier_unsigned,
+       qualifier_none, qualifier_unsigned};
+ #define STRSS_P_QUALIFIERS (arm_strss_p_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strsbs_p_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_unsigned, qualifier_immediate,
+       qualifier_none, qualifier_unsigned};
+ #define STRSBS_P_QUALIFIERS (arm_strsbs_p_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strsbu_p_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_unsigned, qualifier_immediate,
+       qualifier_unsigned, qualifier_unsigned};
+ #define STRSBU_P_QUALIFIERS (arm_strsbu_p_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_pointer, qualifier_unsigned};
+ #define LDRGU_QUALIFIERS (arm_ldrgu_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgs_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_pointer, qualifier_unsigned};
+ #define LDRGS_QUALIFIERS (arm_ldrgs_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrs_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_pointer};
+ #define LDRS_QUALIFIERS (arm_ldrs_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldru_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_pointer};
+ #define LDRU_QUALIFIERS (arm_ldru_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgbs_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_unsigned, qualifier_immediate};
+ #define LDRGBS_QUALIFIERS (arm_ldrgbs_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgbu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_immediate};
+ #define LDRGBU_QUALIFIERS (arm_ldrgbu_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgbs_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_unsigned, qualifier_immediate,
+       qualifier_unsigned};
+ #define LDRGBS_Z_QUALIFIERS (arm_ldrgbs_z_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgbu_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_immediate,
+       qualifier_unsigned};
+ #define LDRGBU_Z_QUALIFIERS (arm_ldrgbu_z_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgs_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_pointer, qualifier_unsigned,
+       qualifier_unsigned};
+ #define LDRGS_Z_QUALIFIERS (arm_ldrgs_z_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgu_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_pointer, qualifier_unsigned,
+       qualifier_unsigned};
+ #define LDRGU_Z_QUALIFIERS (arm_ldrgu_z_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrs_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_pointer, qualifier_unsigned};
+ #define LDRS_Z_QUALIFIERS (arm_ldrs_z_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldru_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_pointer, qualifier_unsigned};
+ #define LDRU_Z_QUALIFIERS (arm_ldru_z_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_quinop_unone_unone_unone_unone_imm_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned,
+       qualifier_unsigned, qualifier_immediate, qualifier_unsigned };
+ #define QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS \
+   (arm_quinop_unone_unone_unone_unone_imm_unone_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgbwbxu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_immediate};
+ #define LDRGBWBXU_QUALIFIERS (arm_ldrgbwbxu_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgbwbxu_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_immediate,
+       qualifier_unsigned};
+ #define LDRGBWBXU_Z_QUALIFIERS (arm_ldrgbwbxu_z_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgbwbs_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_unsigned, qualifier_immediate};
+ #define LDRGBWBS_QUALIFIERS (arm_ldrgbwbs_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgbwbu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_immediate};
+ #define LDRGBWBU_QUALIFIERS (arm_ldrgbwbu_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgbwbs_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_unsigned, qualifier_immediate,
+       qualifier_unsigned};
+ #define LDRGBWBS_Z_QUALIFIERS (arm_ldrgbwbs_z_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_ldrgbwbu_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_immediate,
+       qualifier_unsigned};
+ #define LDRGBWBU_Z_QUALIFIERS (arm_ldrgbwbu_z_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strsbwbs_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_unsigned, qualifier_const, qualifier_none};
+ #define STRSBWBS_QUALIFIERS (arm_strsbwbs_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strsbwbu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_unsigned, qualifier_const, qualifier_unsigned};
+ #define STRSBWBU_QUALIFIERS (arm_strsbwbu_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strsbwbs_p_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_unsigned, qualifier_const,
+       qualifier_none, qualifier_unsigned};
+ #define STRSBWBS_P_QUALIFIERS (arm_strsbwbs_p_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_strsbwbu_p_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_unsigned, qualifier_const,
+       qualifier_unsigned, qualifier_unsigned};
+ #define STRSBWBU_P_QUALIFIERS (arm_strsbwbu_p_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_lsll_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_none};
+ #define LSLL_QUALIFIERS (arm_lsll_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_uqshl_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_const};
+ #define UQSHL_QUALIFIERS (arm_uqshl_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_asrl_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_none};
+ #define ASRL_QUALIFIERS (arm_asrl_qualifiers)
+ 
+ static enum arm_type_qualifiers
+ arm_sqshl_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned, qualifier_const};
+ #define SQSHL_QUALIFIERS (arm_sqshl_qualifiers)
+ 
+ /* End of Qualifier for MVE builtins.  */
+ 
     /* void ([T element type] *, T, immediate).  */
  static enum arm_type_qualifiers
  arm_storestruct_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
*************** arm_storestruct_lane_qualifiers[SIMD_MAX
*** 285,299 ****
--- 858,887 ----
        qualifier_none, qualifier_struct_load_store_lane_index };
  #define STORE1LANE_QUALIFIERS (arm_storestruct_lane_qualifiers)
  
+    /* int (void).  */
+ static enum arm_type_qualifiers
+ arm_sat_occurred_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_void };
+ #define SAT_OCCURRED_QUALIFIERS (arm_sat_occurred_qualifiers)
+ 
+    /* void (int).  */
+ static enum arm_type_qualifiers
+ arm_set_sat_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_none };
+ #define SET_SAT_QUALIFIERS (arm_set_sat_qualifiers)
+ 
  #define v8qi_UP  E_V8QImode
  #define v4hi_UP  E_V4HImode
  #define v4hf_UP  E_V4HFmode
+ #define v4bf_UP  E_V4BFmode
  #define v2si_UP  E_V2SImode
  #define v2sf_UP  E_V2SFmode
+ #define v2bf_UP  E_V2BFmode
  #define di_UP    E_DImode
  #define v16qi_UP E_V16QImode
  #define v8hi_UP  E_V8HImode
  #define v8hf_UP  E_V8HFmode
+ #define v8bf_UP  E_V8BFmode
  #define v4si_UP  E_V4SImode
  #define v4sf_UP  E_V4SFmode
  #define v2di_UP  E_V2DImode
*************** arm_storestruct_lane_qualifiers[SIMD_MAX
*** 301,309 ****
  #define ei_UP	 E_EImode
  #define oi_UP	 E_OImode
  #define hf_UP	 E_HFmode
  #define si_UP	 E_SImode
  #define void_UP	 E_VOIDmode
! 
  #define UP(X) X##_UP
  
  typedef struct {
--- 889,899 ----
  #define ei_UP	 E_EImode
  #define oi_UP	 E_OImode
  #define hf_UP	 E_HFmode
+ #define bf_UP    E_BFmode
  #define si_UP	 E_SImode
+ #define hi_UP    E_HImode
  #define void_UP	 E_VOIDmode
! #define sf_UP	 E_SFmode
  #define UP(X) X##_UP
  
  typedef struct {
*************** typedef struct {
*** 351,356 ****
--- 941,949 ----
  #define VAR12(T, N, A, B, C, D, E, F, G, H, I, J, K, L) \
    VAR11 (T, N, A, B, C, D, E, F, G, H, I, J, K) \
    VAR1 (T, N, L)
+ #define VAR13(T, N, A, B, C, D, E, F, G, H, I, J, K, L, M) \
+   VAR12 (T, N, A, B, C, D, E, F, G, H, I, J, K, L) \
+   VAR1 (T, N, M)
  
  /* The builtin data can be found in arm_neon_builtins.def, arm_vfp_builtins.def
     and arm_acle_builtins.def.  The entries in arm_neon_builtins.def require
*************** static arm_builtin_datum neon_builtin_da
*** 374,382 ****
  };
  
  #undef CF
  #undef VAR1
  #define VAR1(T, N, A) \
!   {#N, UP (A), CODE_FOR_##N, 0, T##_QUALIFIERS},
  
  static arm_builtin_datum acle_builtin_data[] =
  {
--- 967,982 ----
  };
  
  #undef CF
+ #define CF(N,X) CODE_FOR_mve_##N##X
+ static arm_builtin_datum mve_builtin_data[] =
+ {
+ #include "arm_mve_builtins.def"
+ };
+ 
+ #undef CF
  #undef VAR1
  #define VAR1(T, N, A) \
!   {#N, UP (A), CODE_FOR_arm_##N, 0, T##_QUALIFIERS},
  
  static arm_builtin_datum acle_builtin_data[] =
  {
*************** static arm_builtin_datum acle_builtin_da
*** 384,390 ****
--- 984,1006 ----
  };
  
  #undef VAR1
+ /* IMM_MAX sets the maximum valid value of the CDE immediate operand.
+    ECF_FLAG sets the flag used for set_call_expr_flags.  */
+ #define VAR1(T, N, A, IMM_MAX, ECF_FLAG) \
+   {{#N #A, UP (A), CODE_FOR_arm_##N##A, 0, T##_QUALIFIERS}, IMM_MAX, ECF_FLAG},
  
+ typedef struct {
+   arm_builtin_datum base;
+   unsigned int imm_max;
+   int ecf_flag;
+ } arm_builtin_cde_datum;
+ 
+ static arm_builtin_cde_datum cde_builtin_data[] =
+ {
+ #include "arm_cde_builtins.def"
+ };
+ 
+ #undef VAR1
  #define VAR1(T, N, X) \
    ARM_BUILTIN_NEON_##N##X,
  
*************** enum arm_builtins
*** 638,645 ****
--- 1254,1264 ----
  
    ARM_BUILTIN_GET_FPSCR,
    ARM_BUILTIN_SET_FPSCR,
+   ARM_BUILTIN_GET_FPSCR_NZCVQC,
+   ARM_BUILTIN_SET_FPSCR_NZCVQC,
  
    ARM_BUILTIN_CMSE_NONSECURE_CALLER,
+   ARM_BUILTIN_SIMD_LANE_CHECK,
  
  #undef CRYPTO1
  #undef CRYPTO2
*************** enum arm_builtins
*** 665,671 ****
  #include "arm_vfp_builtins.def"
  
    ARM_BUILTIN_NEON_BASE,
-   ARM_BUILTIN_NEON_LANE_CHECK = ARM_BUILTIN_NEON_BASE,
  
  #include "arm_neon_builtins.def"
  
--- 1284,1289 ----
*************** enum arm_builtins
*** 674,682 ****
--- 1292,1316 ----
    ARM_BUILTIN_##N,
  
    ARM_BUILTIN_ACLE_BASE,
+   ARM_BUILTIN_SAT_IMM_CHECK = ARM_BUILTIN_ACLE_BASE,
  
  #include "arm_acle_builtins.def"
  
+ #undef VAR1
+ #define VAR1(T, N, X, ... ) \
+   ARM_BUILTIN_##N##X,
+ 
+   ARM_BUILTIN_CDE_BASE,
+ 
+ #include "arm_cde_builtins.def"
+ 
+   ARM_BUILTIN_MVE_BASE,
+ 
+ #undef VAR1
+ #define VAR1(T, N, X) \
+   ARM_BUILTIN_MVE_##N##X,
+ #include "arm_mve_builtins.def"
+ 
    ARM_BUILTIN_MAX
  };
  
*************** enum arm_builtins
*** 686,694 ****
--- 1320,1337 ----
  #define ARM_BUILTIN_NEON_PATTERN_START \
    (ARM_BUILTIN_NEON_BASE + 1)
  
+ #define ARM_BUILTIN_MVE_PATTERN_START \
+   (ARM_BUILTIN_MVE_BASE + 1)
+ 
  #define ARM_BUILTIN_ACLE_PATTERN_START \
    (ARM_BUILTIN_ACLE_BASE + 1)
  
+ #define ARM_BUILTIN_CDE_PATTERN_START \
+   (ARM_BUILTIN_CDE_BASE + 1)
+ 
+ #define ARM_BUILTIN_CDE_PATTERN_END \
+   (ARM_BUILTIN_CDE_BASE + ARRAY_SIZE (cde_builtin_data))
+ 
  #undef CF
  #undef VAR1
  #undef VAR2
*************** const char *arm_scalar_builtin_types[] =
*** 725,730 ****
--- 1368,1374 ----
    "__builtin_neon_oi",
    "__builtin_neon_ci",
    "__builtin_neon_xi",
+   "__builtin_neon_bf",
    NULL
  };
  
*************** static struct arm_simd_type_info arm_sim
*** 778,783 ****
--- 1422,1432 ----
  
  /* The user-visible __fp16 type.  */
  tree arm_fp16_type_node = NULL_TREE;
+ 
+ /* Back-end node type for brain float (bfloat) types.  */
+ tree arm_bf16_type_node = NULL_TREE;
+ tree arm_bf16_ptr_type_node = NULL_TREE;
+ 
  static tree arm_simd_intOI_type_node = NULL_TREE;
  static tree arm_simd_intEI_type_node = NULL_TREE;
  static tree arm_simd_intCI_type_node = NULL_TREE;
*************** const char *
*** 828,834 ****
  arm_mangle_builtin_type (const_tree type)
  {
    const char *mangle;
!   /* Walk through all the AArch64 builtins types tables to filter out the
       incoming type.  */
    if ((mangle = arm_mangle_builtin_vector_type (type))
        || (mangle = arm_mangle_builtin_scalar_type (type)))
--- 1477,1483 ----
  arm_mangle_builtin_type (const_tree type)
  {
    const char *mangle;
!   /* Walk through all the Arm builtins types tables to filter out the
       incoming type.  */
    if ((mangle = arm_mangle_builtin_vector_type (type))
        || (mangle = arm_mangle_builtin_scalar_type (type)))
*************** arm_simd_builtin_std_type (machine_mode
*** 869,874 ****
--- 1518,1525 ----
        return float_type_node;
      case E_DFmode:
        return double_type_node;
+     case E_BFmode:
+       return arm_bf16_type_node;
      default:
        gcc_unreachable ();
      }
*************** arm_init_simd_builtin_types (void)
*** 920,947 ****
       an entry in our mangling table, consequently, they get default
       mangling.  As a further gotcha, poly8_t and poly16_t are signed
       types, poly64_t and poly128_t are unsigned types.  */
!   arm_simd_polyQI_type_node
!     = build_distinct_type_copy (intQI_type_node);
!   (*lang_hooks.types.register_builtin_type) (arm_simd_polyQI_type_node,
! 					     "__builtin_neon_poly8");
!   arm_simd_polyHI_type_node
!     = build_distinct_type_copy (intHI_type_node);
!   (*lang_hooks.types.register_builtin_type) (arm_simd_polyHI_type_node,
! 					     "__builtin_neon_poly16");
!   arm_simd_polyDI_type_node
!     = build_distinct_type_copy (unsigned_intDI_type_node);
!   (*lang_hooks.types.register_builtin_type) (arm_simd_polyDI_type_node,
! 					     "__builtin_neon_poly64");
!   arm_simd_polyTI_type_node
!     = build_distinct_type_copy (unsigned_intTI_type_node);
!   (*lang_hooks.types.register_builtin_type) (arm_simd_polyTI_type_node,
! 					     "__builtin_neon_poly128");
! 
!   /* Prevent front-ends from transforming poly vectors into string
!      literals.  */
!   TYPE_STRING_FLAG (arm_simd_polyQI_type_node) = false;
!   TYPE_STRING_FLAG (arm_simd_polyHI_type_node) = false;
  
    /* Init all the element types built by the front-end.  */
    arm_simd_types[Int8x8_t].eltype = intQI_type_node;
    arm_simd_types[Int8x16_t].eltype = intQI_type_node;
--- 1571,1607 ----
       an entry in our mangling table, consequently, they get default
       mangling.  As a further gotcha, poly8_t and poly16_t are signed
       types, poly64_t and poly128_t are unsigned types.  */
!   if (!TARGET_HAVE_MVE)
!     {
!       arm_simd_polyQI_type_node
! 	= build_distinct_type_copy (intQI_type_node);
!       (*lang_hooks.types.register_builtin_type) (arm_simd_polyQI_type_node,
! 						 "__builtin_neon_poly8");
!       arm_simd_polyHI_type_node
! 	= build_distinct_type_copy (intHI_type_node);
!       (*lang_hooks.types.register_builtin_type) (arm_simd_polyHI_type_node,
! 						 "__builtin_neon_poly16");
!       arm_simd_polyDI_type_node
! 	= build_distinct_type_copy (unsigned_intDI_type_node);
!       (*lang_hooks.types.register_builtin_type) (arm_simd_polyDI_type_node,
! 						 "__builtin_neon_poly64");
!       arm_simd_polyTI_type_node
! 	= build_distinct_type_copy (unsigned_intTI_type_node);
!       (*lang_hooks.types.register_builtin_type) (arm_simd_polyTI_type_node,
! 						 "__builtin_neon_poly128");
!       /* Init poly vector element types with scalar poly types.  */
!       arm_simd_types[Poly8x8_t].eltype = arm_simd_polyQI_type_node;
!       arm_simd_types[Poly8x16_t].eltype = arm_simd_polyQI_type_node;
!       arm_simd_types[Poly16x4_t].eltype = arm_simd_polyHI_type_node;
!       arm_simd_types[Poly16x8_t].eltype = arm_simd_polyHI_type_node;
!       /* Note: poly64x2_t is defined in arm_neon.h, to ensure it gets default
! 	 mangling.  */
  
+       /* Prevent front-ends from transforming poly vectors into string
+ 	 literals.  */
+       TYPE_STRING_FLAG (arm_simd_polyQI_type_node) = false;
+       TYPE_STRING_FLAG (arm_simd_polyHI_type_node) = false;
+     }
    /* Init all the element types built by the front-end.  */
    arm_simd_types[Int8x8_t].eltype = intQI_type_node;
    arm_simd_types[Int8x16_t].eltype = intQI_type_node;
*************** arm_init_simd_builtin_types (void)
*** 958,968 ****
    arm_simd_types[Uint32x4_t].eltype = unsigned_intSI_type_node;
    arm_simd_types[Uint64x2_t].eltype = unsigned_intDI_type_node;
  
-   /* Init poly vector element types with scalar poly types.  */
-   arm_simd_types[Poly8x8_t].eltype = arm_simd_polyQI_type_node;
-   arm_simd_types[Poly8x16_t].eltype = arm_simd_polyQI_type_node;
-   arm_simd_types[Poly16x4_t].eltype = arm_simd_polyHI_type_node;
-   arm_simd_types[Poly16x8_t].eltype = arm_simd_polyHI_type_node;
    /* Note: poly64x2_t is defined in arm_neon.h, to ensure it gets default
       mangling.  */
  
--- 1618,1623 ----
*************** arm_init_simd_builtin_types (void)
*** 974,984 ****
--- 1629,1646 ----
    arm_simd_types[Float32x2_t].eltype = float_type_node;
    arm_simd_types[Float32x4_t].eltype = float_type_node;
  
+   /* Init Bfloat vector types with underlying __bf16 scalar type.  */
+   arm_simd_types[Bfloat16x2_t].eltype = arm_bf16_type_node;
+   arm_simd_types[Bfloat16x4_t].eltype = arm_bf16_type_node;
+   arm_simd_types[Bfloat16x8_t].eltype = arm_bf16_type_node;
+ 
    for (i = 0; i < nelts; i++)
      {
        tree eltype = arm_simd_types[i].eltype;
        machine_mode mode = arm_simd_types[i].mode;
  
+       if (eltype == NULL)
+ 	continue;
        if (arm_simd_types[i].itype == NULL)
  	arm_simd_types[i].itype =
  	  build_distinct_type_copy
*************** arm_init_simd_builtin_scalar_types (void
*** 1030,1036 ****
  					     "__builtin_neon_df");
    (*lang_hooks.types.register_builtin_type) (intTI_type_node,
  					     "__builtin_neon_ti");
! 
    /* Unsigned integer types for various mode sizes.  */
    (*lang_hooks.types.register_builtin_type) (unsigned_intQI_type_node,
  					     "__builtin_neon_uqi");
--- 1692,1699 ----
  					     "__builtin_neon_df");
    (*lang_hooks.types.register_builtin_type) (intTI_type_node,
  					     "__builtin_neon_ti");
!   (*lang_hooks.types.register_builtin_type) (arm_bf16_type_node,
!                                              "__builtin_neon_bf");
    /* Unsigned integer types for various mode sizes.  */
    (*lang_hooks.types.register_builtin_type) (unsigned_intQI_type_node,
  					     "__builtin_neon_uqi");
*************** arm_init_builtin (unsigned int fcode, ar
*** 1159,1164 ****
--- 1822,1840 ----
    arm_builtin_decls[fcode] = fndecl;
  }
  
+ /* Initialize the backend REAL_TYPE type supporting bfloat types.  */
+ static void
+ arm_init_bf16_types (void)
+ {
+   arm_bf16_type_node = make_node (REAL_TYPE);
+   TYPE_PRECISION (arm_bf16_type_node) = 16;
+   SET_TYPE_MODE (arm_bf16_type_node, BFmode);
+   layout_type (arm_bf16_type_node);
+ 
+   lang_hooks.types.register_builtin_type (arm_bf16_type_node, "__bf16");
+   arm_bf16_ptr_type_node = build_pointer_type (arm_bf16_type_node);
+ }
+ 
  /* Set up ACLE builtins, even builtins for instructions that are not
     in the current target ISA to allow the user to compile particular modules
     with different target specific options that differ from the command line
*************** arm_init_acle_builtins (void)
*** 1169,1174 ****
--- 1845,1860 ----
  {
    unsigned int i, fcode = ARM_BUILTIN_ACLE_PATTERN_START;
  
+   tree sat_check_fpr = build_function_type_list (void_type_node,
+ 						 intSI_type_node,
+ 						 intSI_type_node,
+ 						 intSI_type_node,
+ 						 NULL);
+   arm_builtin_decls[ARM_BUILTIN_SAT_IMM_CHECK]
+     = add_builtin_function ("__builtin_sat_imm_check", sat_check_fpr,
+ 			    ARM_BUILTIN_SAT_IMM_CHECK, BUILT_IN_MD,
+ 			    NULL, NULL_TREE);
+ 
    for (i = 0; i < ARRAY_SIZE (acle_builtin_data); i++, fcode++)
      {
        arm_builtin_datum *d = &acle_builtin_data[i];
*************** arm_init_acle_builtins (void)
*** 1176,1181 ****
--- 1862,1920 ----
      }
  }
  
+ static void
+ arm_init_cde_builtins (void)
+ {
+   unsigned int i, fcode = ARM_BUILTIN_CDE_PATTERN_START;
+   for (i = 0; i < ARRAY_SIZE (cde_builtin_data); i++, fcode++)
+     {
+       /* Only define CDE floating point builtins if the target has floating
+ 	 point registers.  NOTE: without HARD_FLOAT we don't have MVE, so we
+ 	 can break out of this loop directly here.  */
+       if (!TARGET_MAYBE_HARD_FLOAT && fcode >= ARM_BUILTIN_vcx1si)
+ 	break;
+       /* Only define CDE/MVE builtins if MVE is available.  */
+       if (!TARGET_HAVE_MVE && fcode >= ARM_BUILTIN_vcx1qv16qi)
+ 	break;
+       arm_builtin_cde_datum *cde = &cde_builtin_data[i];
+       arm_builtin_datum *d = &cde->base;
+       arm_init_builtin (fcode, d, "__builtin_arm");
+       set_call_expr_flags (arm_builtin_decls[fcode], cde->ecf_flag);
+     }
+ }
+ 
+ /* Set up all the MVE builtins mentioned in arm_mve_builtins.def file.  */
+ static void
+ arm_init_mve_builtins (void)
+ {
+   volatile unsigned int i, fcode = ARM_BUILTIN_MVE_PATTERN_START;
+ 
+   arm_init_simd_builtin_scalar_types ();
+   arm_init_simd_builtin_types ();
+ 
+   /* Add support for __builtin_{get,set}_fpscr_nzcvqc, used by MVE intrinsics
+      that read and/or write the carry bit.  */
+   tree get_fpscr_nzcvqc = build_function_type_list (intSI_type_node,
+ 						    NULL);
+   tree set_fpscr_nzcvqc = build_function_type_list (void_type_node,
+ 						    intSI_type_node,
+ 						    NULL);
+   arm_builtin_decls[ARM_BUILTIN_GET_FPSCR_NZCVQC]
+     = add_builtin_function ("__builtin_arm_get_fpscr_nzcvqc", get_fpscr_nzcvqc,
+ 			    ARM_BUILTIN_GET_FPSCR_NZCVQC, BUILT_IN_MD, NULL,
+ 			    NULL_TREE);
+   arm_builtin_decls[ARM_BUILTIN_SET_FPSCR_NZCVQC]
+     = add_builtin_function ("__builtin_arm_set_fpscr_nzcvqc", set_fpscr_nzcvqc,
+ 			    ARM_BUILTIN_SET_FPSCR_NZCVQC, BUILT_IN_MD, NULL,
+ 			    NULL_TREE);
+ 
+   for (i = 0; i < ARRAY_SIZE (mve_builtin_data); i++, fcode++)
+     {
+       arm_builtin_datum *d = &mve_builtin_data[i];
+       arm_init_builtin (fcode, d, "__builtin_mve");
+     }
+ }
+ 
  /* Set up all the NEON builtins, even builtins for instructions that are not
     in the current target ISA to allow the user to compile particular modules
     with different target specific options that differ from the command line
*************** arm_init_neon_builtins (void)
*** 1194,1208 ****
       system.  */
    arm_init_simd_builtin_scalar_types ();
  
-   tree lane_check_fpr = build_function_type_list (void_type_node,
- 						  intSI_type_node,
- 						  intSI_type_node,
- 						  NULL);
-   arm_builtin_decls[ARM_BUILTIN_NEON_LANE_CHECK] =
-       add_builtin_function ("__builtin_arm_lane_check", lane_check_fpr,
- 			    ARM_BUILTIN_NEON_LANE_CHECK, BUILT_IN_MD,
- 			    NULL, NULL_TREE);
- 
    for (i = 0; i < ARRAY_SIZE (neon_builtin_data); i++, fcode++)
      {
        arm_builtin_datum *d = &neon_builtin_data[i];
--- 1933,1938 ----
*************** arm_init_builtins (void)
*** 1917,1929 ****
       arm_init_neon_builtins which uses it.  */
    arm_init_fp16_builtins ();
  
    if (TARGET_MAYBE_HARD_FLOAT)
      {
!       arm_init_neon_builtins ();
        arm_init_vfp_builtins ();
        arm_init_crypto_builtins ();
      }
  
    arm_init_acle_builtins ();
  
    if (TARGET_MAYBE_HARD_FLOAT)
--- 2647,2675 ----
       arm_init_neon_builtins which uses it.  */
    arm_init_fp16_builtins ();
  
+   arm_init_bf16_types ();
+ 
    if (TARGET_MAYBE_HARD_FLOAT)
      {
!       tree lane_check_fpr = build_function_type_list (void_type_node,
! 						      intSI_type_node,
! 						      intSI_type_node,
! 						      NULL);
!       arm_builtin_decls[ARM_BUILTIN_SIMD_LANE_CHECK]
!       = add_builtin_function ("__builtin_arm_lane_check", lane_check_fpr,
! 			      ARM_BUILTIN_SIMD_LANE_CHECK, BUILT_IN_MD,
! 			      NULL, NULL_TREE);
!       if (TARGET_HAVE_MVE)
! 	arm_init_mve_builtins ();
!       else
! 	arm_init_neon_builtins ();
        arm_init_vfp_builtins ();
        arm_init_crypto_builtins ();
      }
  
+   if (TARGET_CDE)
+     arm_init_cde_builtins ();
+ 
    arm_init_acle_builtins ();
  
    if (TARGET_MAYBE_HARD_FLOAT)
*************** arm_expand_ternop_builtin (enum insn_cod
*** 1993,2017 ****
    rtx op0 = expand_normal (arg0);
    rtx op1 = expand_normal (arg1);
    rtx op2 = expand_normal (arg2);
-   rtx op3 = NULL_RTX;
- 
-   /* The sha1c, sha1p, sha1m crypto builtins require a different vec_select
-      lane operand depending on endianness.  */
-   bool builtin_sha1cpm_p = false;
  
-   if (insn_data[icode].n_operands == 5)
-     {
-       gcc_assert (icode == CODE_FOR_crypto_sha1c
-                   || icode == CODE_FOR_crypto_sha1p
-                   || icode == CODE_FOR_crypto_sha1m);
-       builtin_sha1cpm_p = true;
-     }
    machine_mode tmode = insn_data[icode].operand[0].mode;
    machine_mode mode0 = insn_data[icode].operand[1].mode;
    machine_mode mode1 = insn_data[icode].operand[2].mode;
    machine_mode mode2 = insn_data[icode].operand[3].mode;
  
- 
    if (VECTOR_MODE_P (mode0))
      op0 = safe_vector_operand (op0, mode0);
    if (VECTOR_MODE_P (mode1))
--- 2739,2750 ----
*************** arm_expand_ternop_builtin (enum insn_cod
*** 2034,2046 ****
      op1 = copy_to_mode_reg (mode1, op1);
    if (! (*insn_data[icode].operand[3].predicate) (op2, mode2))
      op2 = copy_to_mode_reg (mode2, op2);
-   if (builtin_sha1cpm_p)
-     op3 = GEN_INT (TARGET_BIG_END ? 1 : 0);
  
!   if (builtin_sha1cpm_p)
!     pat = GEN_FCN (icode) (target, op0, op1, op2, op3);
!   else
!     pat = GEN_FCN (icode) (target, op0, op1, op2);
    if (! pat)
      return 0;
    emit_insn (pat);
--- 2767,2774 ----
      op1 = copy_to_mode_reg (mode1, op1);
    if (! (*insn_data[icode].operand[3].predicate) (op2, mode2))
      op2 = copy_to_mode_reg (mode2, op2);
  
!   pat = GEN_FCN (icode) (target, op0, op1, op2);
    if (! pat)
      return 0;
    emit_insn (pat);
*************** arm_expand_unop_builtin (enum insn_code
*** 2096,2111 ****
    rtx pat;
    tree arg0 = CALL_EXPR_ARG (exp, 0);
    rtx op0 = expand_normal (arg0);
-   rtx op1 = NULL_RTX;
    machine_mode tmode = insn_data[icode].operand[0].mode;
    machine_mode mode0 = insn_data[icode].operand[1].mode;
-   bool builtin_sha1h_p = false;
- 
-   if (insn_data[icode].n_operands == 3)
-     {
-       gcc_assert (icode == CODE_FOR_crypto_sha1h);
-       builtin_sha1h_p = true;
-     }
  
    if (! target
        || GET_MODE (target) != tmode
--- 2824,2831 ----
*************** arm_expand_unop_builtin (enum insn_code
*** 2121,2133 ****
        if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
  	op0 = copy_to_mode_reg (mode0, op0);
      }
-   if (builtin_sha1h_p)
-     op1 = GEN_INT (TARGET_BIG_END ? 1 : 0);
  
!   if (builtin_sha1h_p)
!     pat = GEN_FCN (icode) (target, op0, op1);
!   else
!     pat = GEN_FCN (icode) (target, op0);
    if (! pat)
      return 0;
    emit_insn (pat);
--- 2841,2849 ----
        if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
  	op0 = copy_to_mode_reg (mode0, op0);
      }
  
!   pat = GEN_FCN (icode) (target, op0);
! 
    if (! pat)
      return 0;
    emit_insn (pat);
*************** typedef enum {
*** 2140,2145 ****
--- 2856,2862 ----
    ARG_BUILTIN_LANE_INDEX,
    ARG_BUILTIN_STRUCT_LOAD_STORE_LANE_INDEX,
    ARG_BUILTIN_LANE_PAIR_INDEX,
+   ARG_BUILTIN_LANE_QUADTUP_INDEX,
    ARG_BUILTIN_NEON_MEMORY,
    ARG_BUILTIN_MEMORY,
    ARG_BUILTIN_STOP
*************** neon_dereference_pointer (tree exp, tree
*** 2194,2199 ****
--- 2911,2957 ----
  		      build_int_cst (build_pointer_type (array_type), 0));
  }
  
+ /* EXP is a pointer argument to a vector scatter store intrinsics.
+ 
+    Consider the following example:
+ 	VSTRW<v>.<dt> Qd, [Qm{, #+/-<imm>}]!
+    When <Qm> used as the base register for the target address,
+    this function is used to derive and return an expression for the
+    accessed memory.
+ 
+    The intrinsic function operates on a block of registers that has mode
+    REG_MODE.  This block contains vectors of type TYPE_MODE.  The function
+    references the memory at EXP of type TYPE and in mode MEM_MODE.  This
+    mode may be BLKmode if no more suitable mode is available.  */
+ 
+ static tree
+ mve_dereference_pointer (tree exp, tree type, machine_mode reg_mode,
+ 			 machine_mode vector_mode)
+ {
+   HOST_WIDE_INT reg_size, vector_size, nelems;
+   tree elem_type, upper_bound, array_type;
+ 
+   /* Work out the size of each vector in bytes.  */
+   vector_size = GET_MODE_SIZE (vector_mode);
+ 
+   /* Work out the size of the register block in bytes.  */
+   reg_size = GET_MODE_SIZE (reg_mode);
+ 
+   /* Work out the type of each element.  */
+   gcc_assert (POINTER_TYPE_P (type));
+   elem_type = TREE_TYPE (type);
+ 
+   nelems = reg_size / vector_size;
+ 
+   /* Create a type that describes the full access.  */
+   upper_bound = build_int_cst (size_type_node, nelems - 1);
+   array_type = build_array_type (elem_type, build_index_type (upper_bound));
+ 
+   /* Dereference EXP using that type.  */
+   return fold_build2 (MEM_REF, array_type, exp,
+ 		      build_int_cst (build_pointer_type (array_type), 0));
+ }
+ 
  /* Expand a builtin.  */
  static rtx
  arm_expand_builtin_args (rtx target, machine_mode map_mode, int fcode,
*************** arm_expand_builtin_args (rtx target, mac
*** 2232,2241 ****
              {
                machine_mode other_mode
  		= insn_data[icode].operand[1 - opno].mode;
!               arg[argc] = neon_dereference_pointer (arg[argc],
  						    TREE_VALUE (formals),
! 						    mode[argc], other_mode,
! 						    map_mode);
              }
  
  	  /* Use EXPAND_MEMORY for ARG_BUILTIN_MEMORY and
--- 2990,3006 ----
              {
                machine_mode other_mode
  		= insn_data[icode].operand[1 - opno].mode;
! 	      if (TARGET_HAVE_MVE && mode[argc] != other_mode)
! 		{
! 		  arg[argc] = mve_dereference_pointer (arg[argc],
  						    TREE_VALUE (formals),
! 						    other_mode, map_mode);
! 		}
! 	      else
! 		arg[argc] = neon_dereference_pointer (arg[argc],
! 						      TREE_VALUE (formals),
! 						      mode[argc], other_mode,
! 						      map_mode);
              }
  
  	  /* Use EXPAND_MEMORY for ARG_BUILTIN_MEMORY and
*************** arm_expand_builtin_args (rtx target, mac
*** 2288,2305 ****
  	      if (CONST_INT_P (op[argc]))
  		{
  		  machine_mode vmode = mode[argc - 1];
! 		  neon_lane_bounds (op[argc], 0, GET_MODE_NUNITS (vmode) / 2, exp);
  		}
! 	      /* If the lane index isn't a constant then the next
! 		 case will error.  */
! 	      /* Fall through.  */
  	    case ARG_BUILTIN_CONSTANT:
  constant_arg:
  	      if (!(*insn_data[icode].operand[opno].predicate)
  		  (op[argc], mode[argc]))
  		{
! 		  error ("%Kargument %d must be a constant immediate",
! 			 exp, argc + 1);
  		  /* We have failed to expand the pattern, and are safely
  		     in to invalid code.  But the mid-end will still try to
  		     build an assignment for this node while it expands,
--- 3053,3109 ----
  	      if (CONST_INT_P (op[argc]))
  		{
  		  machine_mode vmode = mode[argc - 1];
! 		  neon_lane_bounds (op[argc], 0,
! 				    GET_MODE_NUNITS (vmode) / 2, exp);
  		}
! 	      /* If the lane index isn't a constant then error out.  */
! 	      goto constant_arg;
! 
! 	    case ARG_BUILTIN_LANE_QUADTUP_INDEX:
! 	      /* Previous argument must be a vector, which this indexes.  */
! 	      gcc_assert (argc > 0);
! 	      if (CONST_INT_P (op[argc]))
! 		{
! 		  machine_mode vmode = mode[argc - 1];
! 		  neon_lane_bounds (op[argc], 0,
! 				    GET_MODE_NUNITS (vmode) / 4, exp);
! 		}
! 	      /* If the lane index isn't a constant then error out.  */
! 	      goto constant_arg;
! 
  	    case ARG_BUILTIN_CONSTANT:
  constant_arg:
  	      if (!(*insn_data[icode].operand[opno].predicate)
  		  (op[argc], mode[argc]))
  		{
! 		  if (IN_RANGE (fcode, ARM_BUILTIN_CDE_PATTERN_START,
! 				ARM_BUILTIN_CDE_PATTERN_END))
! 		    {
! 		      if (argc == 0)
! 			{
! 			  unsigned int cp_bit = (CONST_INT_P (op[argc])
! 						 ? UINTVAL (op[argc]) : -1);
! 			  if (IN_RANGE (cp_bit, 0, ARM_CDE_CONST_COPROC))
! 			    error ("%Kcoprocessor %d is not enabled "
! 				   "with +cdecp%d", exp, cp_bit, cp_bit);
! 			  else
! 			    error ("%Kcoproc must be a constant immediate in "
! 				   "range [0-%d] enabled with +cdecp<N>", exp,
! 				   ARM_CDE_CONST_COPROC);
! 			}
! 		      else
! 			/* Here we mention the builtin name to follow the same
! 			   format that the C/C++ frontends use for referencing
! 			   a given argument index.  */
! 			error ("%Kargument %d to %qE must be a constant immediate "
! 			       "in range [0-%d]", exp, argc + 1,
! 			       arm_builtin_decls[fcode],
! 			       cde_builtin_data[fcode -
! 			       ARM_BUILTIN_CDE_PATTERN_START].imm_max);
! 		    }
! 		  else
! 		    error ("%Kargument %d must be a constant immediate",
! 			   exp, argc + 1);
  		  /* We have failed to expand the pattern, and are safely
  		     in to invalid code.  But the mid-end will still try to
  		     build an assignment for this node while it expands,
*************** constant_arg:
*** 2337,2342 ****
--- 3141,3149 ----
    if (have_retval)
      switch (argc)
        {
+       case 0:
+ 	pat = GEN_FCN (icode) (target);
+ 	break;
        case 1:
  	pat = GEN_FCN (icode) (target, op[0]);
  	break;
*************** arm_expand_builtin_1 (int fcode, tree ex
*** 2428,2437 ****
--- 3235,3248 ----
    int is_void = 0;
    int k;
    bool neon = false;
+   bool mve = false;
  
    if (IN_RANGE (fcode, ARM_BUILTIN_VFP_BASE, ARM_BUILTIN_ACLE_BASE - 1))
      neon = true;
  
+   if (IN_RANGE (fcode, ARM_BUILTIN_MVE_BASE, ARM_BUILTIN_MAX - 1))
+     mve = true;
+ 
    is_void = !!(d->qualifiers[0] & qualifier_void);
  
    num_args += is_void;
*************** arm_expand_builtin_1 (int fcode, tree ex
*** 2453,2458 ****
--- 3264,3271 ----
  	args[k] = ARG_BUILTIN_LANE_INDEX;
        else if (d->qualifiers[qualifiers_k] & qualifier_lane_pair_index)
  	args[k] = ARG_BUILTIN_LANE_PAIR_INDEX;
+       else if (d->qualifiers[qualifiers_k] & qualifier_lane_quadtup_index)
+ 	args[k] = ARG_BUILTIN_LANE_QUADTUP_INDEX;
        else if (d->qualifiers[qualifiers_k] & qualifier_struct_load_store_lane_index)
  	args[k] = ARG_BUILTIN_STRUCT_LOAD_STORE_LANE_INDEX;
        else if (d->qualifiers[qualifiers_k] & qualifier_immediate)
*************** arm_expand_builtin_1 (int fcode, tree ex
*** 2471,2477 ****
  	}
        else if (d->qualifiers[qualifiers_k] & qualifier_pointer)
  	{
! 	  if (neon)
  	    args[k] = ARG_BUILTIN_NEON_MEMORY;
  	  else
  	    args[k] = ARG_BUILTIN_MEMORY;
--- 3284,3290 ----
  	}
        else if (d->qualifiers[qualifiers_k] & qualifier_pointer)
  	{
! 	  if (neon || mve)
  	    args[k] = ARG_BUILTIN_NEON_MEMORY;
  	  else
  	    args[k] = ARG_BUILTIN_MEMORY;
*************** arm_expand_builtin_1 (int fcode, tree ex
*** 2495,2503 ****
  static rtx
  arm_expand_acle_builtin (int fcode, tree exp, rtx target)
  {
  
    arm_builtin_datum *d
!     = &acle_builtin_data[fcode - ARM_BUILTIN_ACLE_PATTERN_START];
  
    return arm_expand_builtin_1 (fcode, exp, target, d);
  }
--- 3308,3359 ----
  static rtx
  arm_expand_acle_builtin (int fcode, tree exp, rtx target)
  {
+   if (fcode == ARM_BUILTIN_SAT_IMM_CHECK)
+     {
+       /* Check the saturation immediate bounds.  */
  
+       rtx min_sat = expand_normal (CALL_EXPR_ARG (exp, 1));
+       rtx max_sat = expand_normal (CALL_EXPR_ARG (exp, 2));
+       gcc_assert (CONST_INT_P (min_sat));
+       gcc_assert (CONST_INT_P (max_sat));
+       rtx sat_imm = expand_normal (CALL_EXPR_ARG (exp, 0));
+       if (CONST_INT_P (sat_imm))
+ 	{
+ 	  if (!IN_RANGE (sat_imm, min_sat, max_sat))
+ 	    error ("%Ksaturation bit range must be in the range [%wd, %wd]",
+ 		   exp, UINTVAL (min_sat), UINTVAL (max_sat));
+ 	}
+       else
+ 	error ("%Ksaturation bit range must be a constant immediate", exp);
+       /* Don't generate any RTL.  */
+       return const0_rtx;
+     }
+ 
+   gcc_assert (fcode != ARM_BUILTIN_CDE_BASE);
    arm_builtin_datum *d
!     = (fcode < ARM_BUILTIN_CDE_BASE)
!       ? &acle_builtin_data[fcode - ARM_BUILTIN_ACLE_PATTERN_START]
!       : &cde_builtin_data[fcode - ARM_BUILTIN_CDE_PATTERN_START].base;
! 
!   return arm_expand_builtin_1 (fcode, exp, target, d);
! }
! 
! /* Expand an MVE builtin, i.e. those registered only if their respective target
!    constraints are met.  This check happens within arm_expand_builtin.  */
! 
! static rtx
! arm_expand_mve_builtin (int fcode, tree exp, rtx target)
! {
!   if (fcode >= ARM_BUILTIN_MVE_BASE && !TARGET_HAVE_MVE)
!   {
!     fatal_error (input_location,
! 		"You must enable MVE instructions"
! 		" to use these intrinsics");
!     return const0_rtx;
!   }
! 
!   arm_builtin_datum *d
!     = &mve_builtin_data[fcode - ARM_BUILTIN_MVE_PATTERN_START];
  
    return arm_expand_builtin_1 (fcode, exp, target, d);
  }
*************** arm_expand_neon_builtin (int fcode, tree
*** 2519,2540 ****
        return const0_rtx;
      }
  
-   if (fcode == ARM_BUILTIN_NEON_LANE_CHECK)
-     {
-       /* Builtin is only to check bounds of the lane passed to some intrinsics
- 	 that are implemented with gcc vector extensions in arm_neon.h.  */
- 
-       tree nlanes = CALL_EXPR_ARG (exp, 0);
-       gcc_assert (TREE_CODE (nlanes) == INTEGER_CST);
-       rtx lane_idx = expand_normal (CALL_EXPR_ARG (exp, 1));
-       if (CONST_INT_P (lane_idx))
- 	neon_lane_bounds (lane_idx, 0, TREE_INT_CST_LOW (nlanes), exp);
-       else
- 	error ("%Klane index must be a constant immediate", exp);
-       /* Don't generate any RTL.  */
-       return const0_rtx;
-     }
- 
    arm_builtin_datum *d
      = &neon_builtin_data[fcode - ARM_BUILTIN_NEON_PATTERN_START];
  
--- 3375,3380 ----
*************** arm_expand_builtin (tree exp,
*** 2585,2591 ****
    rtx               op1;
    rtx               op2;
    rtx               pat;
!   unsigned int      fcode = DECL_FUNCTION_CODE (fndecl);
    size_t            i;
    machine_mode tmode;
    machine_mode mode0;
--- 3425,3431 ----
    rtx               op1;
    rtx               op2;
    rtx               pat;
!   unsigned int      fcode = DECL_MD_FUNCTION_CODE (fndecl);
    size_t            i;
    machine_mode tmode;
    machine_mode mode0;
*************** arm_expand_builtin (tree exp,
*** 2596,2601 ****
--- 3436,3459 ----
    int mask;
    int imm;
  
+   if (fcode == ARM_BUILTIN_SIMD_LANE_CHECK)
+     {
+       /* Builtin is only to check bounds of the lane passed to some intrinsics
+ 	 that are implemented with gcc vector extensions in arm_neon.h.  */
+ 
+       tree nlanes = CALL_EXPR_ARG (exp, 0);
+       gcc_assert (TREE_CODE (nlanes) == INTEGER_CST);
+       rtx lane_idx = expand_normal (CALL_EXPR_ARG (exp, 1));
+       if (CONST_INT_P (lane_idx))
+ 	neon_lane_bounds (lane_idx, 0, TREE_INT_CST_LOW (nlanes), exp);
+       else
+ 	error ("%Klane index must be a constant immediate", exp);
+       /* Don't generate any RTL.  */
+       return const0_rtx;
+     }
+   if (fcode >= ARM_BUILTIN_MVE_BASE)
+     return arm_expand_mve_builtin (fcode, exp, target);
+ 
    if (fcode >= ARM_BUILTIN_ACLE_BASE)
      return arm_expand_acle_builtin (fcode, exp, target);
  
*************** arm_expand_builtin (tree exp,
*** 2620,2625 ****
--- 3478,3500 ----
  
    switch (fcode)
      {
+     case ARM_BUILTIN_GET_FPSCR_NZCVQC:
+     case ARM_BUILTIN_SET_FPSCR_NZCVQC:
+       if (fcode == ARM_BUILTIN_GET_FPSCR_NZCVQC)
+ 	{
+ 	  icode = CODE_FOR_get_fpscr_nzcvqc;
+ 	  target = gen_reg_rtx (SImode);
+ 	  emit_insn (GEN_FCN (icode) (target));
+ 	  return target;
+ 	}
+       else
+ 	{
+ 	  icode = CODE_FOR_set_fpscr_nzcvqc;
+ 	  op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
+ 	  emit_insn (GEN_FCN (icode) (force_reg (SImode, op0)));
+ 	  return NULL_RTX;
+ 	}
+ 
      case ARM_BUILTIN_GET_FPSCR:
      case ARM_BUILTIN_SET_FPSCR:
        if (fcode == ARM_BUILTIN_GET_FPSCR)
*************** arm_atomic_assign_expand_fenv (tree *hol
*** 3292,3299 ****
    mask = build_int_cst (unsigned_type_node,
  			~((ARM_FE_ALL_EXCEPT << ARM_FE_EXCEPT_SHIFT)
  			  | ARM_FE_ALL_EXCEPT));
!   ld_fenv = build2 (MODIFY_EXPR, unsigned_type_node,
! 		    fenv_var, build_call_expr (get_fpscr, 0));
    masked_fenv = build2 (BIT_AND_EXPR, unsigned_type_node, fenv_var, mask);
    hold_fnclex = build_call_expr (set_fpscr, 1, masked_fenv);
    *hold = build2 (COMPOUND_EXPR, void_type_node,
--- 4167,4175 ----
    mask = build_int_cst (unsigned_type_node,
  			~((ARM_FE_ALL_EXCEPT << ARM_FE_EXCEPT_SHIFT)
  			  | ARM_FE_ALL_EXCEPT));
!   ld_fenv = build4 (TARGET_EXPR, unsigned_type_node,
! 		    fenv_var, build_call_expr (get_fpscr, 0),
! 		    NULL_TREE, NULL_TREE);
    masked_fenv = build2 (BIT_AND_EXPR, unsigned_type_node, fenv_var, mask);
    hold_fnclex = build_call_expr (set_fpscr, 1, masked_fenv);
    *hold = build2 (COMPOUND_EXPR, void_type_node,
*************** arm_atomic_assign_expand_fenv (tree *hol
*** 3314,3321 ****
         __atomic_feraiseexcept (new_fenv_var);  */
  
    new_fenv_var = create_tmp_var_raw (unsigned_type_node);
!   reload_fenv = build2 (MODIFY_EXPR, unsigned_type_node, new_fenv_var,
! 			build_call_expr (get_fpscr, 0));
    restore_fnenv = build_call_expr (set_fpscr, 1, fenv_var);
    atomic_feraiseexcept = builtin_decl_implicit (BUILT_IN_ATOMIC_FERAISEEXCEPT);
    update_call = build_call_expr (atomic_feraiseexcept, 1,
--- 4190,4197 ----
         __atomic_feraiseexcept (new_fenv_var);  */
  
    new_fenv_var = create_tmp_var_raw (unsigned_type_node);
!   reload_fenv = build4 (TARGET_EXPR, unsigned_type_node, new_fenv_var,
! 			build_call_expr (get_fpscr, 0), NULL_TREE, NULL_TREE);
    restore_fnenv = build_call_expr (set_fpscr, 1, fenv_var);
    atomic_feraiseexcept = builtin_decl_implicit (BUILT_IN_ATOMIC_FERAISEEXCEPT);
    update_call = build_call_expr (atomic_feraiseexcept, 1,
*************** arm_atomic_assign_expand_fenv (tree *hol
*** 3325,3328 ****
--- 4201,4244 ----
  			    reload_fenv, restore_fnenv), update_call);
  }
  
+ /* Implement TARGET_CHECK_BUILTIN_CALL.  Record a read of the Q bit through
+    intrinsics in the machine function.  */
+ bool
+ arm_check_builtin_call (location_t , vec<location_t> , tree fndecl,
+ 			tree, unsigned int, tree *)
+ {
+   int fcode = DECL_MD_FUNCTION_CODE (fndecl);
+   if (fcode == ARM_BUILTIN_saturation_occurred
+       || fcode == ARM_BUILTIN_set_saturation)
+     {
+       if (cfun && cfun->decl)
+ 	DECL_ATTRIBUTES (cfun->decl)
+ 	  = tree_cons (get_identifier ("acle qbit"), NULL_TREE,
+ 		       DECL_ATTRIBUTES (cfun->decl));
+     }
+   if (fcode == ARM_BUILTIN_sel)
+     {
+       if (cfun && cfun->decl)
+ 	DECL_ATTRIBUTES (cfun->decl)
+ 	  = tree_cons (get_identifier ("acle gebits"), NULL_TREE,
+ 		       DECL_ATTRIBUTES (cfun->decl));
+     }
+   return true;
+ }
+ 
+ enum resolver_ident
+ arm_describe_resolver (tree fndecl)
+ {
+   if (DECL_MD_FUNCTION_CODE (fndecl) >= ARM_BUILTIN_vcx1qv16qi
+     && DECL_MD_FUNCTION_CODE (fndecl) < ARM_BUILTIN_MVE_BASE)
+     return arm_cde_resolver;
+   return arm_no_resolver;
+ }
+ 
+ unsigned
+ arm_cde_end_args (tree fndecl)
+ {
+   return DECL_MD_FUNCTION_CODE (fndecl) >= ARM_BUILTIN_vcx1q_p_v16qi ? 2 : 1;
+ }
+ 
  #include "gt-arm-builtins.h"
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-builtins.h gcc-10.1.0/gcc/config/arm/arm-builtins.h
*** gcc-9.3.0/gcc/config/arm/arm-builtins.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/arm/arm-builtins.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,35 ----
+ /* Declarations for determining resolver for a given builtin.
+    Copyright (C) 2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published
+    by the Free Software Foundation; either version 3, or (at your
+    option) any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    Under Section 7 of GPL version 3, you are granted additional
+    permissions described in the GCC Runtime Library Exception, version
+    3.1, as published by the Free Software Foundation.
+ 
+    You should have received a copy of the GNU General Public License and
+    a copy of the GCC Runtime Library Exception along with this program;
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ARM_BUILTINS_H
+ #define GCC_ARM_BUILTINS_H
+ 
+ enum resolver_ident {
+     arm_cde_resolver,
+     arm_no_resolver
+ };
+ enum resolver_ident arm_describe_resolver (tree);
+ unsigned arm_cde_end_args (tree);
+ 
+ #endif /* GCC_ARM_BUILTINS_H */
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-c.c gcc-10.1.0/gcc/config/arm/arm-c.c
*** gcc-9.3.0/gcc/config/arm/arm-c.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm-c.c	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2007-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2007-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
***************
*** 27,32 ****
--- 27,146 ----
  #include "tm_p.h"
  #include "c-family/c-pragma.h"
  #include "stringpool.h"
+ #include "arm-builtins.h"
+ 
+ tree
+ arm_resolve_cde_builtin (location_t loc, tree fndecl, void *arglist)
+ {
+   vec<tree, va_gc> *params = static_cast<vec<tree, va_gc> *> (arglist);
+   unsigned param_num = params ? params->length() : 0;
+   unsigned num_args = list_length (TYPE_ARG_TYPES (TREE_TYPE (fndecl))) - 1;
+   /* Ensure this function has the correct number of arguments.
+      This won't happen when using the intrinsics defined by the ACLE, since
+      they're exposed to the user via a wrapper in the arm_cde.h header that has
+      the correct number of arguments ... hence the compiler would already catch
+      an incorrect number of arguments there.
+ 
+      It is still possible to get here if the user tries to call the __bulitin_*
+      functions directly.  We could print some error message in this function,
+      but instead we leave it to the rest of the code to catch this problem in
+      the same way that other __builtin_* functions catch it.
+ 
+      This does mean an odd error message, but it's consistent with the rest of
+      the builtins.  */
+   if (param_num != num_args)
+     return NULL_TREE;
+ 
+   tree to_return = NULL_TREE;
+   /* Take the functions return type since that's the same type as the arguments
+      this function needs (the types of the builtin function all come from the
+      machine mode of the RTL pattern, and they're all the same and calculated
+      in the same way).  */
+   tree pattern_type = TREE_TYPE (TREE_TYPE (fndecl));
+ 
+   unsigned i;
+   /* Hard coding the number of parameters we don't want to cast at the end of
+      the builtin.  This is the  easiest approach for the CDE intrinsics, and
+      introducing a parameter to store in the builtins.def macros seems overkill
+      when they're only relevant here.  */
+   unsigned end_args = arm_cde_end_args (fndecl);
+   unsigned cast_param_end = param_num - end_args;
+   /* For the vcx1q patterns that don't need any casts.  */
+   if (cast_param_end == 1)
+     return NULL_TREE;
+ 
+   /* In order to check all arguments rather than complaining on the first
+      invalid one we record whether *any* arguments are invalid using this
+      boolean variable.  */
+   bool invalid = false;
+   for (i = 1; i < cast_param_end; i++)
+     {
+       tree this_param = (*params)[i];
+       if (TREE_CODE (this_param) == ERROR_MARK)
+ 	{
+ 	  invalid = true;
+ 	  continue;
+ 	}
+       tree param_type = TREE_TYPE (this_param);
+ 
+       /* Return value is cast to type that second argument originally was.
+ 	 All non-constant arguments are cast to the return type calculated from
+ 	 the RTL pattern.
+ 
+ 	 Set the return type to an unqualified version of the type of the first
+ 	 parameter.  The first parameter since that is how the intrinsics are
+ 	 defined -- to always return the same type as the first polymorphic
+ 	 argument.  Unqualified version of the type since we don't want passing
+ 	 a constant parameter to mean that the return value of the builtin is
+ 	 also constant.  */
+       if (i == 1)
+ 	to_return = build_qualified_type (param_type, 0 MEM_STAT_INFO);
+ 
+       /* The only requirement of these intrinsics on the type of the variable
+ 	 is that it's 128 bits wide.  All other types are valid and we simply
+ 	 VIEW_CONVERT_EXPR them to the type of the underlying builtin.  */
+       tree type_size = TYPE_SIZE (param_type);
+       if (! tree_fits_shwi_p (type_size)
+ 	  || tree_to_shwi (type_size) != 128)
+ 	{
+ 	  error_at (loc,
+ 		    "argument %u to function %qE is of type %qT which is not "
+ 		    "known to be 128 bits wide",
+ 		    i + 1, fndecl, param_type);
+ 	  invalid = true;
+ 	  continue;
+ 	}
+ 
+       /* Only convert the argument if we actually need to.  */
+       if (! check_base_type (pattern_type, param_type))
+ 	(*params)[i] = build1 (VIEW_CONVERT_EXPR, pattern_type, this_param);
+     }
+   if (invalid)
+     return NULL_TREE;
+ 
+   /* We know it's safe to call this since this builtin is here to implement an
+      ACLE function, and those functions are only for C/C++.  */
+   tree call_expr = build_function_call_vec (loc, vNULL, fndecl, params,
+ 					    NULL, fndecl);
+ 
+   gcc_assert (to_return != NULL_TREE);
+   if (! check_base_type (to_return, pattern_type))
+     return build1 (VIEW_CONVERT_EXPR, to_return, call_expr);
+   return call_expr;
+ }
+ 
+ /* Implement TARGET_RESOLVE_OVERLOADED_BUILTIN.  This is currently only
+    used for the MVE related builtins for the CDE extension.
+    Here we ensure the type of arguments is such that the size is correct, and
+    then return a tree that describes the same function call but with the
+    relevant types cast as necessary.  */
+ tree
+ arm_resolve_overloaded_builtin (location_t loc, tree fndecl, void *arglist)
+ {
+   if (arm_describe_resolver (fndecl) == arm_cde_resolver)
+     return arm_resolve_cde_builtin (loc, fndecl, arglist);
+   return NULL_TREE;
+ }
  
  /* Output C specific EABI object attributes.  These cannot be done in
     arm.c because they require information from the C frontend.  */
*************** arm_cpu_builtins (struct cpp_reader* pfi
*** 79,84 ****
--- 193,208 ----
    def_or_undef_macro (pfile, "__ARM_FEATURE_COMPLEX", TARGET_COMPLEX);
    def_or_undef_macro (pfile, "__ARM_32BIT_STATE", TARGET_32BIT);
  
+   cpp_undef (pfile, "__ARM_FEATURE_MVE");
+   if (TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT)
+     {
+       builtin_define_with_int_value ("__ARM_FEATURE_MVE", 3);
+     }
+   else if (TARGET_HAVE_MVE)
+     {
+       builtin_define_with_int_value ("__ARM_FEATURE_MVE", 1);
+     }
+ 
    cpp_undef (pfile, "__ARM_FEATURE_CMSE");
    if (arm_arch8 && !arm_arch_notm)
      {
*************** arm_cpu_builtins (struct cpp_reader* pfi
*** 123,128 ****
--- 247,254 ----
      builtin_define ("__ARM_ARCH_ISA_ARM");
    builtin_define ("__APCS_32__");
  
+   def_or_undef_macro (pfile, "__GCC_ASM_FLAG_OUTPUTS__", !TARGET_THUMB1);
+ 
    def_or_undef_macro (pfile, "__thumb__", TARGET_THUMB);
    def_or_undef_macro (pfile, "__thumb2__", TARGET_THUMB2);
    if (TARGET_BIG_END)
*************** arm_cpu_builtins (struct cpp_reader* pfi
*** 203,208 ****
--- 329,336 ----
        builtin_define ("__ARM_EABI__");
      }
  
+   def_or_undef_macro (pfile, "__FDPIC__", TARGET_FDPIC);
+ 
    def_or_undef_macro (pfile, "__ARM_ARCH_EXT_IDIV__", TARGET_IDIV);
    def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
  
*************** arm_cpu_builtins (struct cpp_reader* pfi
*** 222,227 ****
--- 350,369 ----
  
        builtin_define_with_int_value ("__ARM_FEATURE_COPROC", coproc_level);
      }
+ 
+   def_or_undef_macro (pfile, "__ARM_FEATURE_CDE", TARGET_CDE);
+   cpp_undef (pfile, "__ARM_FEATURE_CDE_COPROC");
+   if (TARGET_CDE)
+     builtin_define_with_int_value ("__ARM_FEATURE_CDE_COPROC",
+ 				   arm_arch_cde_coproc);
+ 
+   def_or_undef_macro (pfile, "__ARM_FEATURE_MATMUL_INT8", TARGET_I8MM);
+   def_or_undef_macro (pfile, "__ARM_FEATURE_BF16_SCALAR_ARITHMETIC",
+ 		      TARGET_BF16_FP);
+   def_or_undef_macro (pfile, "__ARM_FEATURE_BF16_VECTOR_ARITHMETIC",
+ 		      TARGET_BF16_SIMD);
+   def_or_undef_macro (pfile, "__ARM_BF16_FORMAT_ALTERNATIVE",
+ 		      TARGET_BF16_FP || TARGET_BF16_SIMD);
  }
  
  void
*************** arm_register_target_pragmas (void)
*** 332,337 ****
--- 474,480 ----
  {
    /* Update pragma hook to allow parsing #pragma GCC target.  */
    targetm.target_option.pragma_parse = arm_pragma_target_parse;
+   targetm.resolve_overloaded_builtin = arm_resolve_overloaded_builtin;
  
  #ifdef REGISTER_SUBTARGET_PRAGMAS
    REGISTER_SUBTARGET_PRAGMAS ();
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-cpus.in gcc-10.1.0/gcc/config/arm/arm-cpus.in
*** gcc-9.3.0/gcc/config/arm/arm-cpus.in	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm-cpus.in	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  # CPU, FPU and architecture specifications for ARM.
  #
! # Copyright (C) 2011-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,6 ----
  # CPU, FPU and architecture specifications for ARM.
  #
! # Copyright (C) 2011-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
*************** define feature armv8_4
*** 123,134 ****
--- 123,144 ----
  # Architecture rel 8.5.
  define feature armv8_5
  
+ # Architecture rel 8.6.
+ define feature armv8_6
+ 
  # M-Profile security extensions.
  define feature cmse
  
+ # Architecture rel 8.1-M.
+ define feature armv8_1m_main
+ 
  # Floating point and Neon extensions.
  # VFPv1 is not supported in GCC.
  
+ # This feature bit is enabled for all VFP, MVE and
+ # MVE with floating point extensions.
+ define feature vfp_base
+ 
  # Vector floating point v2.
  define feature vfpv2
  
*************** define feature quirk_armv6kz
*** 180,185 ****
--- 190,198 ----
  # Cortex-M3 LDRD quirk.
  define feature quirk_cm3_ldrd
  
+ # Don't use .cpu assembly directive
+ define feature quirk_no_asmcpu
+ 
  # (Very) slow multiply operations.  Should probably be a tuning bit.
  define feature smallmul
  
*************** define feature sb
*** 191,196 ****
--- 204,229 ----
  # v8-A architectures, added by default from v8.5-A
  define feature predres
  
+ # M-profile Vector Extension feature bits
+ define feature mve
+ define feature mve_float
+ 
+ # 8-bit Integer Matrix Multiply extension. Optional from v8.2-A.
+ define feature i8mm
+ 
+ # Brain half-precision floating-point extension. Optional from v8.2-A.
+ define feature bf16
+ 
+ # Arm Custom Datapath Extension (CDE).
+ define feature cdecp0
+ define feature cdecp1
+ define feature cdecp2
+ define feature cdecp3
+ define feature cdecp4
+ define feature cdecp5
+ define feature cdecp6
+ define feature cdecp7
+ 
  # Feature groups.  Conventionally all (or mostly) upper case.
  # ALL_FPU lists all the feature bits associated with the floating-point
  # unit; these will all be removed if the floating-point unit is disabled
*************** define fgroup ALL_CRYPTO	crypto
*** 213,243 ****
  # strip off 32 D-registers, but does not remove support for
  # double-precision FP.
  define fgroup ALL_SIMD_INTERNAL	fp_d32 neon ALL_CRYPTO
! define fgroup ALL_SIMD	ALL_SIMD_INTERNAL dotprod fp16fml
  
  # List of all FPU bits to strip out if -mfpu is used to override the
  # default.  fp16 is deliberately missing from this list.
! define fgroup ALL_FPU_INTERNAL	vfpv2 vfpv3 vfpv4 fpv5 fp16conv fp_dbl ALL_SIMD_INTERNAL
! 
  # Similarly, but including fp16 and other extensions that aren't part of
  # -mfpu support.
! define fgroup ALL_FP	fp16 ALL_FPU_INTERNAL
  
! define fgroup ARMv4       armv4 notm
! define fgroup ARMv4t      ARMv4 thumb
! define fgroup ARMv5t      ARMv4t armv5t
! define fgroup ARMv5te     ARMv5t armv5te
! define fgroup ARMv5tej    ARMv5te
! define fgroup ARMv6       ARMv5te armv6 be8
! define fgroup ARMv6j      ARMv6
! define fgroup ARMv6k      ARMv6 armv6k
! define fgroup ARMv6z      ARMv6
! define fgroup ARMv6kz     ARMv6k quirk_armv6kz
! define fgroup ARMv6zk     ARMv6k
! define fgroup ARMv6t2     ARMv6 thumb2
  # This is suspect.  ARMv6-m doesn't really pull in any useful features
  # from ARMv5* or ARMv6.
! define fgroup ARMv6m      armv4 thumb armv5t armv5te armv6 be8
  # This is suspect, the 'common' ARMv7 subset excludes the thumb2 'DSP' and
  # integer SIMD instructions that are in ARMv6T2.  */
  define fgroup ARMv7       ARMv6m thumb2 armv7
--- 246,279 ----
  # strip off 32 D-registers, but does not remove support for
  # double-precision FP.
  define fgroup ALL_SIMD_INTERNAL	fp_d32 neon ALL_CRYPTO
! define fgroup ALL_SIMD_EXTERNAL dotprod fp16fml i8mm
! define fgroup ALL_SIMD	ALL_SIMD_INTERNAL ALL_SIMD_EXTERNAL
  
  # List of all FPU bits to strip out if -mfpu is used to override the
  # default.  fp16 is deliberately missing from this list.
! define fgroup ALL_FPU_INTERNAL	vfp_base vfpv2 vfpv3 vfpv4 fpv5 fp16conv fp_dbl ALL_SIMD_INTERNAL
  # Similarly, but including fp16 and other extensions that aren't part of
  # -mfpu support.
! define fgroup ALL_FPU_EXTERNAL fp16 bf16
  
! # Everything related to the FPU extensions (FP or SIMD).
! define fgroup ALL_FP	ALL_FPU_EXTERNAL ALL_FPU_INTERNAL ALL_SIMD
! 
! define fgroup ARMv4         armv4 notm
! define fgroup ARMv4t        ARMv4 thumb
! define fgroup ARMv5t        ARMv4t armv5t
! define fgroup ARMv5te       ARMv5t armv5te
! define fgroup ARMv5tej      ARMv5te
! define fgroup ARMv6         ARMv5te armv6 be8
! define fgroup ARMv6j        ARMv6
! define fgroup ARMv6k        ARMv6 armv6k
! define fgroup ARMv6z        ARMv6
! define fgroup ARMv6kz       ARMv6k quirk_armv6kz
! define fgroup ARMv6zk       ARMv6k
! define fgroup ARMv6t2       ARMv6 thumb2
  # This is suspect.  ARMv6-m doesn't really pull in any useful features
  # from ARMv5* or ARMv6.
! define fgroup ARMv6m        armv4 thumb armv5t armv5te armv6 be8
  # This is suspect, the 'common' ARMv7 subset excludes the thumb2 'DSP' and
  # integer SIMD instructions that are in ARMv6T2.  */
  define fgroup ARMv7       ARMv6m thumb2 armv7
*************** define fgroup ARMv8_2a    ARMv8_1a armv8
*** 253,267 ****
  define fgroup ARMv8_3a    ARMv8_2a armv8_3
  define fgroup ARMv8_4a    ARMv8_3a armv8_4
  define fgroup ARMv8_5a    ARMv8_4a armv8_5 sb predres
  define fgroup ARMv8m_base ARMv6m armv8 cmse tdiv
  define fgroup ARMv8m_main ARMv7m armv8 cmse
  define fgroup ARMv8r      ARMv8a
  
  # Useful combinations.
! define fgroup VFPv2	vfpv2
  define fgroup VFPv3	VFPv2 vfpv3
  define fgroup VFPv4	VFPv3 vfpv4 fp16conv
  define fgroup FPv5	VFPv4 fpv5
  
  define fgroup FP_DBL	fp_dbl
  define fgroup FP_D32	FP_DBL fp_d32
--- 289,307 ----
  define fgroup ARMv8_3a    ARMv8_2a armv8_3
  define fgroup ARMv8_4a    ARMv8_3a armv8_4
  define fgroup ARMv8_5a    ARMv8_4a armv8_5 sb predres
+ define fgroup ARMv8_6a    ARMv8_5a armv8_6
  define fgroup ARMv8m_base ARMv6m armv8 cmse tdiv
  define fgroup ARMv8m_main ARMv7m armv8 cmse
  define fgroup ARMv8r      ARMv8a
+ define fgroup ARMv8_1m_main ARMv8m_main armv8_1m_main
  
  # Useful combinations.
! define fgroup VFPv2	vfp_base vfpv2
  define fgroup VFPv3	VFPv2 vfpv3
  define fgroup VFPv4	VFPv3 vfpv4 fp16conv
  define fgroup FPv5	VFPv4 fpv5
+ define fgroup MVE      mve vfp_base armv7em
+ define fgroup MVE_FP   MVE FPv5 fp16 mve_float
  
  define fgroup FP_DBL	fp_dbl
  define fgroup FP_D32	FP_DBL fp_d32
*************** define fgroup DOTPROD	NEON dotprod
*** 274,280 ****
  # architectures.
  # xscale isn't really a 'quirk', but it isn't an architecture either and we
  # need to ignore it for matching purposes.
! define fgroup ALL_QUIRKS   quirk_no_volatile_ce quirk_armv6kz quirk_cm3_ldrd xscale
  
  # Architecture entries
  # format:
--- 314,320 ----
  # architectures.
  # xscale isn't really a 'quirk', but it isn't an architecture either and we
  # need to ignore it for matching purposes.
! define fgroup ALL_QUIRKS   quirk_no_volatile_ce quirk_armv6kz quirk_cm3_ldrd xscale quirk_no_asmcpu
  
  # Architecture entries
  # format:
*************** begin arch armv6s-m
*** 415,421 ****
  end arch armv6s-m
  
  begin arch armv7
!  tune for cortex-a8
   tune flags CO_PROC
   base 7
   isa ARMv7
--- 455,461 ----
  end arch armv6s-m
  
  begin arch armv7
!  tune for cortex-a53
   tune flags CO_PROC
   base 7
   isa ARMv7
*************** begin arch armv7
*** 426,432 ****
  end arch armv7
  
  begin arch armv7-a
!  tune for cortex-a8
   tune flags CO_PROC
   base 7A
   profile A
--- 466,472 ----
  end arch armv7
  
  begin arch armv7-a
!  tune for cortex-a53
   tune flags CO_PROC
   base 7A
   profile A
*************** begin arch armv7-a
*** 451,457 ****
  end arch armv7-a
  
  begin arch armv7ve
!  tune for cortex-a8
   tune flags CO_PROC
   base 7A
   profile A
--- 491,497 ----
  end arch armv7-a
  
  begin arch armv7ve
!  tune for cortex-a53
   tune flags CO_PROC
   base 7A
   profile A
*************** begin arch armv8.2-a
*** 560,565 ****
--- 600,607 ----
   option dotprod add FP_ARMv8 DOTPROD
   option sb add sb
   option predres add predres
+  option i8mm add i8mm FP_ARMv8 NEON
+  option bf16 add bf16 FP_ARMv8 NEON
  end arch armv8.2-a
  
  begin arch armv8.3-a
*************** begin arch armv8.3-a
*** 577,582 ****
--- 619,626 ----
   option dotprod add FP_ARMv8 DOTPROD
   option sb add sb
   option predres add predres
+  option i8mm add i8mm FP_ARMv8 NEON
+  option bf16 add bf16 FP_ARMv8 NEON
  end arch armv8.3-a
  
  begin arch armv8.4-a
*************** begin arch armv8.4-a
*** 592,597 ****
--- 636,643 ----
   option nofp remove ALL_FP
   option sb add sb
   option predres add predres
+  option i8mm add i8mm FP_ARMv8 DOTPROD
+  option bf16 add bf16 FP_ARMv8 DOTPROD
  end arch armv8.4-a
  
  begin arch armv8.5-a
*************** begin arch armv8.5-a
*** 605,612 ****
--- 651,675 ----
   option crypto add FP_ARMv8 CRYPTO DOTPROD
   option nocrypto remove ALL_CRYPTO
   option nofp remove ALL_FP
+  option i8mm add i8mm FP_ARMv8 DOTPROD
+  option bf16 add bf16 FP_ARMv8 DOTPROD
  end arch armv8.5-a
  
+ begin arch armv8.6-a
+  tune for cortex-a53
+  tune flags CO_PROC
+  base 8A
+  profile A
+  isa ARMv8_6a
+  option simd add FP_ARMv8 DOTPROD
+  option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD
+  option crypto add FP_ARMv8 CRYPTO DOTPROD
+  option nocrypto remove ALL_CRYPTO
+  option nofp remove ALL_FP
+  option i8mm add i8mm FP_ARMv8 DOTPROD
+  option bf16 add bf16 FP_ARMv8 DOTPROD
+ end arch armv8.6-a
+ 
  begin arch armv8-m.base
   tune for cortex-m23
   base 8M_BASE
*************** begin arch armv8-m.main
*** 626,631 ****
--- 689,702 ----
   option fp.dp add FPv5 FP_DBL
   option nofp remove ALL_FP
   option nodsp remove armv7em
+  option cdecp0 add cdecp0
+  option cdecp1 add cdecp1
+  option cdecp2 add cdecp2
+  option cdecp3 add cdecp3
+  option cdecp4 add cdecp4
+  option cdecp5 add cdecp5
+  option cdecp6 add cdecp6
+  option cdecp7 add cdecp7
  end arch armv8-m.main
  
  begin arch armv8-r
*************** begin arch armv8-r
*** 644,649 ****
--- 715,743 ----
   option nofp remove ALL_FP
  end arch armv8-r
  
+ begin arch armv8.1-m.main
+  tune for cortex-m7
+  tune flags CO_PROC
+  base 8M_MAIN
+  profile M
+  isa ARMv8_1m_main
+ # fp => FPv5-sp-d16; fp.dp => FPv5-d16
+  option dsp add armv7em
+  option fp add FPv5 fp16
+  option fp.dp add FPv5 FP_DBL fp16
+  option nofp remove ALL_FP
+  option mve add MVE
+  option mve.fp add MVE_FP
+  option cdecp0 add cdecp0
+  option cdecp1 add cdecp1
+  option cdecp2 add cdecp2
+  option cdecp3 add cdecp3
+  option cdecp4 add cdecp4
+  option cdecp5 add cdecp5
+  option cdecp6 add cdecp6
+  option cdecp7 add cdecp7
+ end arch armv8.1-m.main
+ 
  begin arch iwmmxt
   tune for iwmmxt
   tune flags LDSCHED STRONG XSCALE
*************** end cpu cortex-m3
*** 1150,1156 ****
  
  begin cpu marvell-pj4
   tune flags LDSCHED
!  architecture armv7-a+mp+sec
   costs marvell_pj4
  end cpu marvell-pj4
  
--- 1244,1250 ----
  
  begin cpu marvell-pj4
   tune flags LDSCHED
!  architecture armv7-a+mp+sec+fp
   costs marvell_pj4
  end cpu marvell-pj4
  
*************** begin cpu cortex-a55
*** 1301,1307 ****
   cname cortexa55
   tune for cortex-a53
   tune flags LDSCHED
!  architecture armv8.2-a+fp16+dotprod+simd
   option crypto add FP_ARMv8 CRYPTO
   option nofp remove ALL_FP
   costs cortex_a53
--- 1395,1401 ----
   cname cortexa55
   tune for cortex-a53
   tune flags LDSCHED
!  architecture armv8.2-a+fp16+dotprod
   option crypto add FP_ARMv8 CRYPTO
   option nofp remove ALL_FP
   costs cortex_a53
*************** begin cpu cortex-a75
*** 1313,1319 ****
   cname cortexa75
   tune for cortex-a57
   tune flags LDSCHED
!  architecture armv8.2-a+fp16+dotprod+simd
   option crypto add FP_ARMv8 CRYPTO
   costs cortex_a73
   vendor 41
--- 1407,1413 ----
   cname cortexa75
   tune for cortex-a57
   tune flags LDSCHED
!  architecture armv8.2-a+fp16+dotprod
   option crypto add FP_ARMv8 CRYPTO
   costs cortex_a73
   vendor 41
*************** begin cpu cortex-a76
*** 1324,1342 ****
   cname cortexa76
   tune for cortex-a57
   tune flags LDSCHED
!  architecture armv8.2-a+fp16+dotprod+simd
   option crypto add FP_ARMv8 CRYPTO
   costs cortex_a57
   vendor 41
   part d0b
  end cpu cortex-a76
  
  begin cpu neoverse-n1
   cname neoversen1
   alias !ares
   tune for cortex-a57
   tune flags LDSCHED
!  architecture armv8.2-a+fp16+dotprod+simd
   option crypto add FP_ARMv8 CRYPTO
   costs cortex_a57
   vendor 41
--- 1418,1458 ----
   cname cortexa76
   tune for cortex-a57
   tune flags LDSCHED
!  architecture armv8.2-a+fp16+dotprod
   option crypto add FP_ARMv8 CRYPTO
   costs cortex_a57
   vendor 41
   part d0b
  end cpu cortex-a76
  
+ begin cpu cortex-a76ae
+  cname cortexa76ae
+  tune for cortex-a57
+  tune flags LDSCHED
+  architecture armv8.2-a+fp16+dotprod
+  option crypto add FP_ARMv8 CRYPTO
+  costs cortex_a57
+  vendor 41
+  part d0e
+ end cpu cortex-a76ae
+ 
+ begin cpu cortex-a77
+  cname cortexa77
+  tune for cortex-a57
+  tune flags LDSCHED
+  architecture armv8.2-a+fp16+dotprod
+  option crypto add FP_ARMv8 CRYPTO
+  costs cortex_a57
+  vendor 41
+  part d0d
+ end cpu cortex-a77
+ 
  begin cpu neoverse-n1
   cname neoversen1
   alias !ares
   tune for cortex-a57
   tune flags LDSCHED
!  architecture armv8.2-a+fp16+dotprod
   option crypto add FP_ARMv8 CRYPTO
   costs cortex_a57
   vendor 41
*************** begin cpu cortex-a75.cortex-a55
*** 1348,1354 ****
   cname cortexa75cortexa55
   tune for cortex-a53
   tune flags LDSCHED
!  architecture armv8.2-a+fp16+dotprod+simd
   option crypto add FP_ARMv8 CRYPTO
   costs cortex_a73
  end cpu cortex-a75.cortex-a55
--- 1464,1470 ----
   cname cortexa75cortexa55
   tune for cortex-a53
   tune flags LDSCHED
!  architecture armv8.2-a+fp16+dotprod
   option crypto add FP_ARMv8 CRYPTO
   costs cortex_a73
  end cpu cortex-a75.cortex-a55
*************** begin cpu cortex-a76.cortex-a55
*** 1357,1363 ****
   cname cortexa76cortexa55
   tune for cortex-a53
   tune flags LDSCHED
!  architecture armv8.2-a+fp16+dotprod+simd
   option crypto add FP_ARMv8 CRYPTO
   costs cortex_a57
  end cpu cortex-a76.cortex-a55
--- 1473,1479 ----
   cname cortexa76cortexa55
   tune for cortex-a53
   tune flags LDSCHED
!  architecture armv8.2-a+fp16+dotprod
   option crypto add FP_ARMv8 CRYPTO
   costs cortex_a57
  end cpu cortex-a76.cortex-a55
*************** begin cpu cortex-m33
*** 1379,1384 ****
--- 1495,1518 ----
   costs v7m
  end cpu cortex-m33
  
+ begin cpu cortex-m35p
+  cname cortexm35p
+  tune flags LDSCHED
+  architecture armv8-m.main+dsp+fp
+  option nofp remove ALL_FP
+  option nodsp remove armv7em
+  costs v7m
+ end cpu cortex-m35p
+ 
+ begin cpu cortex-m55
+  cname cortexm55
+  tune flags LDSCHED
+  architecture armv8.1-m.main+mve.fp+fp.dp
+  isa quirk_no_asmcpu
+  costs v7m
+  vendor 41
+ end cpu cortex-m55
+ 
  # V8 R-profile implementations.
  begin cpu cortex-r52
   cname cortexr52
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-d.c gcc-10.1.0/gcc/config/arm/arm-d.c
*** gcc-9.3.0/gcc/config/arm/arm-d.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm-d.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines for the D front end on the ARM architecture.
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
  GCC is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
--- 1,5 ----
  /* Subroutines for the D front end on the ARM architecture.
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
  GCC is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-fixed.md gcc-10.1.0/gcc/config/arm/arm-fixed.md
*** gcc-9.3.0/gcc/config/arm/arm-fixed.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm-fixed.md	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! ;; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,4 ----
! ;; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 28,38 ****
     (set_attr "predicable_short_it" "yes,no")
     (set_attr "type" "alu_sreg")])
  
! (define_insn "add<mode>3"
    [(set (match_operand:ADDSUB 0 "s_register_operand" "=r")
  	(plus:ADDSUB (match_operand:ADDSUB 1 "s_register_operand" "r")
  		     (match_operand:ADDSUB 2 "s_register_operand" "r")))]
!   "TARGET_INT_SIMD"
    "sadd<qaddsub_suf>%?\\t%0, %1, %2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_dsp_reg")])
--- 28,49 ----
     (set_attr "predicable_short_it" "yes,no")
     (set_attr "type" "alu_sreg")])
  
! (define_expand "add<mode>3"
!   [(set (match_operand:ADDSUB 0 "s_register_operand")
! 	(plus:ADDSUB (match_operand:ADDSUB 1 "s_register_operand")
! 		     (match_operand:ADDSUB 2 "s_register_operand")))]
!   "TARGET_INT_SIMD"
!   {
!     if (ARM_GE_BITS_READ)
!       FAIL;
!   }
! )
! 
! (define_insn "*arm_add<mode>3"
    [(set (match_operand:ADDSUB 0 "s_register_operand" "=r")
  	(plus:ADDSUB (match_operand:ADDSUB 1 "s_register_operand" "r")
  		     (match_operand:ADDSUB 2 "s_register_operand" "r")))]
!   "TARGET_INT_SIMD && !ARM_GE_BITS_READ"
    "sadd<qaddsub_suf>%?\\t%0, %1, %2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_dsp_reg")])
***************
*** 46,56 ****
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_dsp_reg")])
  
! (define_insn "ssadd<mode>3"
    [(set (match_operand:QADDSUB 0 "s_register_operand" "=r")
  	(ss_plus:QADDSUB (match_operand:QADDSUB 1 "s_register_operand" "r")
  			 (match_operand:QADDSUB 2 "s_register_operand" "r")))]
!   "TARGET_INT_SIMD"
    "qadd<qaddsub_suf>%?\\t%0, %1, %2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_dsp_reg")])
--- 57,78 ----
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_dsp_reg")])
  
! (define_expand "ssadd<mode>3"
!   [(set (match_operand:QADDSUB 0 "s_register_operand")
! 	(ss_plus:QADDSUB (match_operand:QADDSUB 1 "s_register_operand")
! 			 (match_operand:QADDSUB 2 "s_register_operand")))]
!   "TARGET_INT_SIMD"
!   {
!     if (<qaddsub_clob_q>)
!       FAIL;
!   }
! )
! 
! (define_insn "*arm_ssadd<mode>3"
    [(set (match_operand:QADDSUB 0 "s_register_operand" "=r")
  	(ss_plus:QADDSUB (match_operand:QADDSUB 1 "s_register_operand" "r")
  			 (match_operand:QADDSUB 2 "s_register_operand" "r")))]
!   "TARGET_INT_SIMD && !<qaddsub_clob_q>"
    "qadd<qaddsub_suf>%?\\t%0, %1, %2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_dsp_reg")])
***************
*** 65,75 ****
     (set_attr "predicable_short_it" "yes,no")
     (set_attr "type" "alu_sreg")])
  
! (define_insn "sub<mode>3"
    [(set (match_operand:ADDSUB 0 "s_register_operand" "=r")
  	(minus:ADDSUB (match_operand:ADDSUB 1 "s_register_operand" "r")
  		      (match_operand:ADDSUB 2 "s_register_operand" "r")))]
!   "TARGET_INT_SIMD"
    "ssub<qaddsub_suf>%?\\t%0, %1, %2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_dsp_reg")])
--- 87,108 ----
     (set_attr "predicable_short_it" "yes,no")
     (set_attr "type" "alu_sreg")])
  
! (define_expand "sub<mode>3"
!   [(set (match_operand:ADDSUB 0 "s_register_operand")
! 	(minus:ADDSUB (match_operand:ADDSUB 1 "s_register_operand")
! 		     (match_operand:ADDSUB 2 "s_register_operand")))]
!   "TARGET_INT_SIMD"
!   {
!     if (ARM_GE_BITS_READ)
!       FAIL;
!   }
! )
! 
! (define_insn "*arm_sub<mode>3"
    [(set (match_operand:ADDSUB 0 "s_register_operand" "=r")
  	(minus:ADDSUB (match_operand:ADDSUB 1 "s_register_operand" "r")
  		      (match_operand:ADDSUB 2 "s_register_operand" "r")))]
!   "TARGET_INT_SIMD && !ARM_GE_BITS_READ"
    "ssub<qaddsub_suf>%?\\t%0, %1, %2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_dsp_reg")])
***************
*** 84,94 ****
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_dsp_reg")])
  
! (define_insn "sssub<mode>3"
    [(set (match_operand:QADDSUB 0 "s_register_operand" "=r")
  	(ss_minus:QADDSUB (match_operand:QADDSUB 1 "s_register_operand" "r")
  			  (match_operand:QADDSUB 2 "s_register_operand" "r")))]
!   "TARGET_INT_SIMD"
    "qsub<qaddsub_suf>%?\\t%0, %1, %2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_dsp_reg")])
--- 117,138 ----
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_dsp_reg")])
  
! (define_expand "sssub<mode>3"
!   [(set (match_operand:QADDSUB 0 "s_register_operand")
! 	(ss_minus:QADDSUB (match_operand:QADDSUB 1 "s_register_operand")
! 			  (match_operand:QADDSUB 2 "s_register_operand")))]
!   "TARGET_INT_SIMD"
!   {
!     if (<qaddsub_clob_q>)
!       FAIL;
!   }
! )
! 
! (define_insn "*arm_sssub<mode>3"
    [(set (match_operand:QADDSUB 0 "s_register_operand" "=r")
  	(ss_minus:QADDSUB (match_operand:QADDSUB 1 "s_register_operand" "r")
  			  (match_operand:QADDSUB 2 "s_register_operand" "r")))]
!   "TARGET_INT_SIMD && !<qaddsub_clob_q>"
    "qsub<qaddsub_suf>%?\\t%0, %1, %2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_dsp_reg")])
***************
*** 98,106 ****
  ; Note: none of these do any rounding.
  
  (define_expand "mulqq3"
!   [(set (match_operand:QQ 0 "s_register_operand" "")
! 	(mult:QQ (match_operand:QQ 1 "s_register_operand" "")
! 		 (match_operand:QQ 2 "s_register_operand" "")))]
    "TARGET_DSP_MULTIPLY && arm_arch_thumb2"
  {
    rtx tmp1 = gen_reg_rtx (HImode);
--- 142,150 ----
  ; Note: none of these do any rounding.
  
  (define_expand "mulqq3"
!   [(set (match_operand:QQ 0 "s_register_operand")
! 	(mult:QQ (match_operand:QQ 1 "s_register_operand")
! 		 (match_operand:QQ 2 "s_register_operand")))]
    "TARGET_DSP_MULTIPLY && arm_arch_thumb2"
  {
    rtx tmp1 = gen_reg_rtx (HImode);
***************
*** 116,124 ****
  })
  
  (define_expand "mulhq3"
!   [(set (match_operand:HQ 0 "s_register_operand" "")
! 	(mult:HQ (match_operand:HQ 1 "s_register_operand" "")
! 		 (match_operand:HQ 2 "s_register_operand" "")))]
    "TARGET_DSP_MULTIPLY && arm_arch_thumb2"
  {
    rtx tmp = gen_reg_rtx (SImode);
--- 160,168 ----
  })
  
  (define_expand "mulhq3"
!   [(set (match_operand:HQ 0 "s_register_operand")
! 	(mult:HQ (match_operand:HQ 1 "s_register_operand")
! 		 (match_operand:HQ 2 "s_register_operand")))]
    "TARGET_DSP_MULTIPLY && arm_arch_thumb2"
  {
    rtx tmp = gen_reg_rtx (SImode);
***************
*** 134,142 ****
  })
  
  (define_expand "mulsq3"
!   [(set (match_operand:SQ 0 "s_register_operand" "")
! 	(mult:SQ (match_operand:SQ 1 "s_register_operand" "")
! 		 (match_operand:SQ 2 "s_register_operand" "")))]
    "TARGET_32BIT"
  {
    rtx tmp1 = gen_reg_rtx (DImode);
--- 178,186 ----
  })
  
  (define_expand "mulsq3"
!   [(set (match_operand:SQ 0 "s_register_operand")
! 	(mult:SQ (match_operand:SQ 1 "s_register_operand")
! 		 (match_operand:SQ 2 "s_register_operand")))]
    "TARGET_32BIT"
  {
    rtx tmp1 = gen_reg_rtx (DImode);
***************
*** 156,164 ****
  ;; Accumulator multiplies.
  
  (define_expand "mulsa3"
!   [(set (match_operand:SA 0 "s_register_operand" "")
! 	(mult:SA (match_operand:SA 1 "s_register_operand" "")
! 		 (match_operand:SA 2 "s_register_operand" "")))]
    "TARGET_32BIT"
  {
    rtx tmp1 = gen_reg_rtx (DImode);
--- 200,208 ----
  ;; Accumulator multiplies.
  
  (define_expand "mulsa3"
!   [(set (match_operand:SA 0 "s_register_operand")
! 	(mult:SA (match_operand:SA 1 "s_register_operand")
! 		 (match_operand:SA 2 "s_register_operand")))]
    "TARGET_32BIT"
  {
    rtx tmp1 = gen_reg_rtx (DImode);
***************
*** 175,183 ****
  })
  
  (define_expand "mulusa3"
!   [(set (match_operand:USA 0 "s_register_operand" "")
! 	(mult:USA (match_operand:USA 1 "s_register_operand" "")
! 		  (match_operand:USA 2 "s_register_operand" "")))]
    "TARGET_32BIT"
  {
    rtx tmp1 = gen_reg_rtx (DImode);
--- 219,227 ----
  })
  
  (define_expand "mulusa3"
!   [(set (match_operand:USA 0 "s_register_operand")
! 	(mult:USA (match_operand:USA 1 "s_register_operand")
! 		  (match_operand:USA 2 "s_register_operand")))]
    "TARGET_32BIT"
  {
    rtx tmp1 = gen_reg_rtx (DImode);
***************
*** 193,211 ****
    DONE;
  })
  
! ;; The code sequence emitted by this insn pattern uses the Q flag, which GCC
! ;; doesn't generally know about, so we don't bother expanding to individual
! ;; instructions.  It may be better to just use an out-of-line asm libcall for
! ;; this.
  
! (define_insn "ssmulsa3"
    [(set (match_operand:SA 0 "s_register_operand" "=r")
  	(ss_mult:SA (match_operand:SA 1 "s_register_operand" "r")
  		    (match_operand:SA 2 "s_register_operand" "r")))
     (clobber (match_scratch:DI 3 "=r"))
     (clobber (match_scratch:SI 4 "=r"))
     (clobber (reg:CC CC_REGNUM))]
!   "TARGET_32BIT && arm_arch6"
  {
    /* s16.15 * s16.15 -> s32.30.  */
    output_asm_insn ("smull\\t%Q3, %R3, %1, %2", operands);
--- 237,267 ----
    DONE;
  })
  
! ;; The code sequence emitted by this insn pattern uses the Q flag, so we need
! ;; to bail out when ARM_Q_BIT_READ and resort to a library sequence instead.
  
! (define_expand "ssmulsa3"
!   [(parallel [(set (match_operand:SA 0 "s_register_operand")
! 	(ss_mult:SA (match_operand:SA 1 "s_register_operand")
! 		    (match_operand:SA 2 "s_register_operand")))
!    (clobber (match_scratch:DI 3))
!    (clobber (match_scratch:SI 4))
!    (clobber (reg:CC CC_REGNUM))])]
!   "TARGET_32BIT && arm_arch6"
!   {
!     if (ARM_Q_BIT_READ)
!       FAIL;
!   }
! )
! 
! (define_insn "*arm_ssmulsa3"
    [(set (match_operand:SA 0 "s_register_operand" "=r")
  	(ss_mult:SA (match_operand:SA 1 "s_register_operand" "r")
  		    (match_operand:SA 2 "s_register_operand" "r")))
     (clobber (match_scratch:DI 3 "=r"))
     (clobber (match_scratch:SI 4 "=r"))
     (clobber (reg:CC CC_REGNUM))]
!   "TARGET_32BIT && arm_arch6 && !ARM_Q_BIT_READ"
  {
    /* s16.15 * s16.15 -> s32.30.  */
    output_asm_insn ("smull\\t%Q3, %R3, %1, %2", operands);
***************
*** 256,271 ****
  		                    (const_int 38))
  		      (const_int 32)))])
  
! ;; Same goes for this.
  
! (define_insn "usmulusa3"
    [(set (match_operand:USA 0 "s_register_operand" "=r")
  	(us_mult:USA (match_operand:USA 1 "s_register_operand" "r")
  		     (match_operand:USA 2 "s_register_operand" "r")))
     (clobber (match_scratch:DI 3 "=r"))
     (clobber (match_scratch:SI 4 "=r"))
     (clobber (reg:CC CC_REGNUM))]
!   "TARGET_32BIT && arm_arch6"
  {
    /* 16.16 * 16.16 -> 32.32.  */
    output_asm_insn ("umull\\t%Q3, %R3, %1, %2", operands);
--- 312,339 ----
  		                    (const_int 38))
  		      (const_int 32)))])
  
! (define_expand "usmulusa3"
!   [(parallel [(set (match_operand:USA 0 "s_register_operand")
! 	(us_mult:USA (match_operand:USA 1 "s_register_operand")
! 		     (match_operand:USA 2 "s_register_operand")))
!    (clobber (match_scratch:DI 3))
!    (clobber (match_scratch:SI 4))
!    (clobber (reg:CC CC_REGNUM))])]
!   "TARGET_32BIT && arm_arch6"
!   {
!     if (ARM_Q_BIT_READ)
!       FAIL;
!   }
! )
  
! (define_insn "*arm_usmulusa3"
    [(set (match_operand:USA 0 "s_register_operand" "=r")
  	(us_mult:USA (match_operand:USA 1 "s_register_operand" "r")
  		     (match_operand:USA 2 "s_register_operand" "r")))
     (clobber (match_scratch:DI 3 "=r"))
     (clobber (match_scratch:SI 4 "=r"))
     (clobber (reg:CC CC_REGNUM))]
!   "TARGET_32BIT && arm_arch6 && !ARM_Q_BIT_READ"
  {
    /* 16.16 * 16.16 -> 32.32.  */
    output_asm_insn ("umull\\t%Q3, %R3, %1, %2", operands);
***************
*** 317,325 ****
  		      (const_int 32)))])
  
  (define_expand "mulha3"
!   [(set (match_operand:HA 0 "s_register_operand" "")
! 	(mult:HA (match_operand:HA 1 "s_register_operand" "")
! 		 (match_operand:HA 2 "s_register_operand" "")))]
    "TARGET_DSP_MULTIPLY && arm_arch_thumb2"
  {
    rtx tmp = gen_reg_rtx (SImode);
--- 385,393 ----
  		      (const_int 32)))])
  
  (define_expand "mulha3"
!   [(set (match_operand:HA 0 "s_register_operand")
! 	(mult:HA (match_operand:HA 1 "s_register_operand")
! 		 (match_operand:HA 2 "s_register_operand")))]
    "TARGET_DSP_MULTIPLY && arm_arch_thumb2"
  {
    rtx tmp = gen_reg_rtx (SImode);
***************
*** 333,341 ****
  })
  
  (define_expand "muluha3"
!   [(set (match_operand:UHA 0 "s_register_operand" "")
! 	(mult:UHA (match_operand:UHA 1 "s_register_operand" "")
! 		  (match_operand:UHA 2 "s_register_operand" "")))]
    "TARGET_DSP_MULTIPLY"
  {
    rtx tmp1 = gen_reg_rtx (SImode);
--- 401,409 ----
  })
  
  (define_expand "muluha3"
!   [(set (match_operand:UHA 0 "s_register_operand")
! 	(mult:UHA (match_operand:UHA 1 "s_register_operand")
! 		  (match_operand:UHA 2 "s_register_operand")))]
    "TARGET_DSP_MULTIPLY"
  {
    rtx tmp1 = gen_reg_rtx (SImode);
***************
*** 353,363 ****
  })
  
  (define_expand "ssmulha3"
!   [(set (match_operand:HA 0 "s_register_operand" "")
! 	(ss_mult:HA (match_operand:HA 1 "s_register_operand" "")
! 		    (match_operand:HA 2 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_DSP_MULTIPLY && arm_arch6"
  {
    rtx tmp = gen_reg_rtx (SImode);
    rtx rshift;
  
--- 421,433 ----
  })
  
  (define_expand "ssmulha3"
!   [(set (match_operand:HA 0 "s_register_operand")
! 	(ss_mult:HA (match_operand:HA 1 "s_register_operand")
! 		    (match_operand:HA 2 "s_register_operand")))]
    "TARGET_32BIT && TARGET_DSP_MULTIPLY && arm_arch6"
  {
+   if (ARM_Q_BIT_READ)
+     FAIL;
    rtx tmp = gen_reg_rtx (SImode);
    rtx rshift;
  
***************
*** 373,383 ****
  })
  
  (define_expand "usmuluha3"
!   [(set (match_operand:UHA 0 "s_register_operand" "")
! 	(us_mult:UHA (match_operand:UHA 1 "s_register_operand" "")
! 		     (match_operand:UHA 2 "s_register_operand" "")))]
    "TARGET_INT_SIMD"
  {
    rtx tmp1 = gen_reg_rtx (SImode);
    rtx tmp2 = gen_reg_rtx (SImode);
    rtx tmp3 = gen_reg_rtx (SImode);
--- 443,456 ----
  })
  
  (define_expand "usmuluha3"
!   [(set (match_operand:UHA 0 "s_register_operand")
! 	(us_mult:UHA (match_operand:UHA 1 "s_register_operand")
! 		     (match_operand:UHA 2 "s_register_operand")))]
    "TARGET_INT_SIMD"
  {
+   if (ARM_Q_BIT_READ)
+     FAIL;
+ 
    rtx tmp1 = gen_reg_rtx (SImode);
    rtx tmp2 = gen_reg_rtx (SImode);
    rtx tmp3 = gen_reg_rtx (SImode);
***************
*** 405,411 ****
  	(ss_truncate:HI (match_operator:SI 1 "sat_shift_operator"
  			  [(match_operand:SI 2 "s_register_operand" "r")
  			   (match_operand:SI 3 "immediate_operand" "I")])))]
!   "TARGET_32BIT && arm_arch6"
    "ssat%?\\t%0, #16, %2%S1"
    [(set_attr "predicable" "yes")
     (set_attr "shift" "1")
--- 478,484 ----
  	(ss_truncate:HI (match_operator:SI 1 "sat_shift_operator"
  			  [(match_operand:SI 2 "s_register_operand" "r")
  			   (match_operand:SI 3 "immediate_operand" "I")])))]
!   "TARGET_32BIT && arm_arch6 && !ARM_Q_BIT_READ"
    "ssat%?\\t%0, #16, %2%S1"
    [(set_attr "predicable" "yes")
     (set_attr "shift" "1")
***************
*** 414,420 ****
  (define_insn "arm_usatsihi"
    [(set (match_operand:HI 0 "s_register_operand" "=r")
  	(us_truncate:HI (match_operand:SI 1 "s_register_operand")))]
!   "TARGET_INT_SIMD"
    "usat%?\\t%0, #16, %1"
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_imm")]
--- 487,493 ----
  (define_insn "arm_usatsihi"
    [(set (match_operand:HI 0 "s_register_operand" "=r")
  	(us_truncate:HI (match_operand:SI 1 "s_register_operand")))]
!   "TARGET_INT_SIMD && !ARM_Q_BIT_READ"
    "usat%?\\t%0, #16, %1"
    [(set_attr "predicable" "yes")
     (set_attr "type" "alu_imm")]
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-flags.h gcc-10.1.0/gcc/config/arm/arm-flags.h
*** gcc-9.3.0/gcc/config/arm/arm-flags.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm-flags.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Flags used to identify the presence of processor capabilities.
  
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,6 ----
  /* Flags used to identify the presence of processor capabilities.
  
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-generic.md gcc-10.1.0/gcc/config/arm/arm-generic.md
*** gcc-9.3.0/gcc/config/arm/arm-generic.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm-generic.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Generic ARM Pipeline Description
! ;; Copyright (C) 2003-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Generic ARM Pipeline Description
! ;; Copyright (C) 2003-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-ldmstm.ml gcc-10.1.0/gcc/config/arm/arm-ldmstm.ml
*** gcc-9.3.0/gcc/config/arm/arm-ldmstm.ml	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm-ldmstm.ml	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  (* Auto-generate ARM ldm/stm patterns
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
     Contributed by CodeSourcery.
  
     This file is part of GCC.
--- 1,5 ----
  (* Auto-generate ARM ldm/stm patterns
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
     Contributed by CodeSourcery.
  
     This file is part of GCC.
*************** let _ =
*** 335,341 ****
  "/* ARM ldm/stm instruction patterns.  This file was automatically generated";
  "   using arm-ldmstm.ml.  Please do not edit manually.";
  "";
! "   Copyright (C) 2010-2019 Free Software Foundation, Inc.";
  "   Contributed by CodeSourcery.";
  "";
  "   This file is part of GCC.";
--- 335,341 ----
  "/* ARM ldm/stm instruction patterns.  This file was automatically generated";
  "   using arm-ldmstm.ml.  Please do not edit manually.";
  "";
! "   Copyright (C) 2010-2020 Free Software Foundation, Inc.";
  "   Contributed by CodeSourcery.";
  "";
  "   This file is part of GCC.";
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-modes.def gcc-10.1.0/gcc/config/arm/arm-modes.def
*** gcc-9.3.0/gcc/config/arm/arm-modes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm-modes.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, for ARM.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
     Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
     and Martin Simmons (@harleqn.co.uk).
     More major hacks by Richard Earnshaw (rearnsha@arm.com)
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, for ARM.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
     Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
     and Martin Simmons (@harleqn.co.uk).
     More major hacks by Richard Earnshaw (rearnsha@arm.com)
*************** ADJUST_FLOAT_FORMAT (HF, ((arm_fp16_form
*** 29,50 ****
  
  /* CCFPEmode should be used with floating inequalities,
     CCFPmode should be used with floating equalities.
!    CC_NOOVmode should be used with SImode integer equalities.
     CC_Zmode should be used if only the Z flag is set correctly
     CC_Cmode should be used if only the C flag is set correctly, after an
       addition.
     CC_Nmode should be used if only the N (sign) flag is set correctly
!    CC_CZmode should be used if only the C and Z flags are correct
!    (used for DImode unsigned comparisons).
!    CC_NCVmode should be used if only the N, C, and V flags are correct
     (used for DImode signed comparisons).
     CCmode should be used otherwise.  */
  
! CC_MODE (CC_NOOV);
  CC_MODE (CC_Z);
! CC_MODE (CC_CZ);
! CC_MODE (CC_NCV);
  CC_MODE (CC_SWP);
  CC_MODE (CCFP);
  CC_MODE (CCFPE);
  CC_MODE (CC_DNE);
--- 29,57 ----
  
  /* CCFPEmode should be used with floating inequalities,
     CCFPmode should be used with floating equalities.
!    CC_NZmode should be used if only the N and Z bits are set correctly.
     CC_Zmode should be used if only the Z flag is set correctly
     CC_Cmode should be used if only the C flag is set correctly, after an
       addition.
     CC_Nmode should be used if only the N (sign) flag is set correctly
!    CC_NVmode should be used if only the N and V bits are set correctly,
!      (used for signed comparisons when the carry is propagated in).
!    CC_RSBmode should be used where the comparison is set by an RSB immediate,
!      or NEG instruction.  The form of the comparison for (const - reg) will
!      be (COMPARE (not (reg)) (~const)).
!    CC_Bmode should be used if only the C flag is correct after a subtract
!      (eg after an unsigned borrow with carry-in propagation).
     (used for DImode signed comparisons).
+    CC_ADCmode is used when the carry is formed from the output of ADC for an
+      addtion.  In this case we cannot use the trick of comparing the sum
+      against one of the other operands.
     CCmode should be used otherwise.  */
  
! CC_MODE (CC_NZ);
  CC_MODE (CC_Z);
! CC_MODE (CC_NV);
  CC_MODE (CC_SWP);
+ CC_MODE (CC_RSB);
  CC_MODE (CCFP);
  CC_MODE (CCFPE);
  CC_MODE (CC_DNE);
*************** CC_MODE (CC_DLTU);
*** 58,65 ****
--- 65,74 ----
  CC_MODE (CC_DGEU);
  CC_MODE (CC_DGTU);
  CC_MODE (CC_C);
+ CC_MODE (CC_B);
  CC_MODE (CC_N);
  CC_MODE (CC_V);
+ CC_MODE (CC_ADC);
  
  /* Vector modes.  */
  VECTOR_MODES (INT, 4);        /*            V4QI V2HI */
*************** VECTOR_MODES (FLOAT, 8);      /*
*** 69,74 ****
--- 78,89 ----
  VECTOR_MODES (FLOAT, 16);     /*       V8HF V4SF V2DF */
  VECTOR_MODE (FLOAT, HF, 2);   /*                 V2HF */
  
+ FLOAT_MODE (BF, 2, 0);
+ ADJUST_FLOAT_FORMAT (BF, &arm_bfloat_half_format);
+ VECTOR_MODE (FLOAT, BF, 2);   /*                 V2BF.  */
+ VECTOR_MODE (FLOAT, BF, 4);   /*		 V4BF.  */
+ VECTOR_MODE (FLOAT, BF, 8);   /*		 V8BF.  */
+ 
  /* Fraction and accumulator vector modes.  */
  VECTOR_MODES (FRACT, 4);      /* V4QQ  V2HQ */
  VECTOR_MODES (UFRACT, 4);     /* V4UQQ V2UHQ */
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-opts.h gcc-10.1.0/gcc/config/arm/arm-opts.h
*** gcc-9.3.0/gcc/config/arm/arm-opts.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm-opts.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for option handling for ARM.
!    Copyright (C) 1991-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for option handling for ARM.
!    Copyright (C) 1991-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-protos.h gcc-10.1.0/gcc/config/arm/arm-protos.h
*** gcc-9.3.0/gcc/config/arm/arm-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Prototypes for exported functions defined in arm.c and pe.c
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
     Contributed by Richard Earnshaw (rearnsha@arm.com)
     Minor hacks by Nick Clifton (nickc@cygnus.com)
  
--- 1,5 ----
  /* Prototypes for exported functions defined in arm.c and pe.c
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
     Contributed by Richard Earnshaw (rearnsha@arm.com)
     Minor hacks by Nick Clifton (nickc@cygnus.com)
  
*************** extern enum unwind_info_type arm_except_
*** 28,33 ****
--- 28,35 ----
  extern int use_return_insn (int, rtx);
  extern bool use_simple_return_p (void);
  extern enum reg_class arm_regno_class (int);
+ extern bool arm_check_builtin_call (location_t , vec<location_t> , tree,
+ 				    tree, unsigned int, tree *);
  extern void arm_load_pic_register (unsigned long, rtx);
  extern int arm_volatile_func (void);
  extern void arm_expand_prologue (void);
*************** extern rtx arm_simd_vect_par_cnst_half (
*** 57,62 ****
--- 59,67 ----
  extern bool arm_simd_check_vect_par_cnst_half_p (rtx op, machine_mode mode,
  						 bool high);
  extern void arm_emit_speculation_barrier_function (void);
+ extern void arm_decompose_di_binop (rtx, rtx, rtx *, rtx *, rtx *, rtx *);
+ extern bool arm_q_bit_access (void);
+ extern bool arm_ge_bits_access (void);
  
  #ifdef RTX_CODE
  extern void arm_gen_unlikely_cbranch (enum rtx_code, machine_mode cc_mode,
*************** extern int thumb_legitimate_offset_p (ma
*** 78,86 ****
  extern int thumb1_legitimate_address_p (machine_mode, rtx, int);
  extern bool ldm_stm_operation_p (rtx, bool, machine_mode mode,
                                   bool, bool);
  extern int arm_const_double_rtx (rtx);
  extern int vfp3_const_double_rtx (rtx);
! extern int neon_immediate_valid_for_move (rtx, machine_mode, rtx *, int *);
  extern int neon_immediate_valid_for_logic (rtx, machine_mode, int, rtx *,
  					   int *);
  extern int neon_immediate_valid_for_shift (rtx, machine_mode, rtx *,
--- 83,92 ----
  extern int thumb1_legitimate_address_p (machine_mode, rtx, int);
  extern bool ldm_stm_operation_p (rtx, bool, machine_mode mode,
                                   bool, bool);
+ extern bool clear_operation_p (rtx, bool);
  extern int arm_const_double_rtx (rtx);
  extern int vfp3_const_double_rtx (rtx);
! extern int simd_immediate_valid_for_move (rtx, machine_mode, rtx *, int *);
  extern int neon_immediate_valid_for_logic (rtx, machine_mode, int, rtx *,
  					   int *);
  extern int neon_immediate_valid_for_shift (rtx, machine_mode, rtx *,
*************** extern bool offset_ok_for_ldrd_strd (HOS
*** 127,134 ****
  extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool);
  extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool);
  extern bool valid_operands_ldrd_strd (rtx *, bool);
! extern int arm_gen_movmemqi (rtx *);
! extern bool gen_movmem_ldrd_strd (rtx *);
  extern machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
  extern machine_mode arm_select_dominance_cc_mode (rtx, rtx,
  						       HOST_WIDE_INT);
--- 133,140 ----
  extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool);
  extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool);
  extern bool valid_operands_ldrd_strd (rtx *, bool);
! extern int arm_gen_cpymemqi (rtx *);
! extern bool gen_cpymem_ldrd_strd (rtx *);
  extern machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
  extern machine_mode arm_select_dominance_cc_mode (rtx, rtx,
  						       HOST_WIDE_INT);
*************** extern int arm_max_const_double_inline_c
*** 140,145 ****
--- 146,152 ----
  extern int arm_const_double_inline_cost (rtx);
  extern bool arm_const_double_by_parts (rtx);
  extern bool arm_const_double_by_immediates (rtx);
+ extern rtx arm_load_function_descriptor (rtx funcdesc);
  extern void arm_emit_call_insn (rtx, rtx, bool);
  bool detect_cmse_nonsecure_call (tree);
  extern const char *output_call (rtx *);
*************** extern void thumb2_final_prescan_insn (r
*** 204,210 ****
  extern const char *thumb_load_double_from_address (rtx *);
  extern const char *thumb_output_move_mem_multiple (int, rtx *);
  extern const char *thumb_call_via_reg (rtx);
! extern void thumb_expand_movmemqi (rtx *);
  extern rtx arm_return_addr (int, rtx);
  extern void thumb_reload_out_hi (rtx *);
  extern void thumb_set_return_address (rtx, rtx);
--- 211,217 ----
  extern const char *thumb_load_double_from_address (rtx *);
  extern const char *thumb_output_move_mem_multiple (int, rtx *);
  extern const char *thumb_call_via_reg (rtx);
! extern void thumb_expand_cpymemqi (rtx *);
  extern rtx arm_return_addr (int, rtx);
  extern void thumb_reload_out_hi (rtx *);
  extern void thumb_set_return_address (rtx, rtx);
*************** struct tune_params
*** 328,334 ****
    /* Prefer 32-bit encoding instead of flag-setting 16-bit encoding.  */
    enum {DISPARAGE_FLAGS_NEITHER, DISPARAGE_FLAGS_PARTIAL, DISPARAGE_FLAGS_ALL}
      disparage_flag_setting_t16_encodings: 2;
-   enum {PREF_NEON_64_FALSE, PREF_NEON_64_TRUE} prefer_neon_for_64bits: 1;
    /* Prefer to inline string operations like memset by using Neon.  */
    enum {PREF_NEON_STRINGOPS_FALSE, PREF_NEON_STRINGOPS_TRUE}
      string_ops_prefer_neon: 1;
--- 335,340 ----
*************** extern int arm_arch_thumb_hwdiv;
*** 473,482 ****
  /* Nonzero if chip disallows volatile memory access in IT block.  */
  extern int arm_arch_no_volatile_ce;
  
- /* Nonzero if we should use Neon to handle 64-bits operations rather
-    than core registers.  */
- extern int prefer_neon_for_64bits;
- 
  /* Structure defining the current overall architectural target and tuning.  */
  struct arm_build_target
  {
--- 479,484 ----
*************** void arm_parse_option_features (sbitmap,
*** 575,578 ****
--- 577,583 ----
  
  void arm_initialize_isa (sbitmap, const enum isa_feature *);
  
+ const char * arm_gen_far_branch (rtx *, int, const char * , const char *);
+ 
+ bool arm_mve_immediate_check(rtx, machine_mode, bool);
  #endif /* ! GCC_ARM_PROTOS_H */
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-simd-builtin-types.def gcc-10.1.0/gcc/config/arm/arm-simd-builtin-types.def
*** gcc-9.3.0/gcc/config/arm/arm-simd-builtin-types.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm-simd-builtin-types.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Builtin AdvSIMD types.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* Builtin AdvSIMD types.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
***************
*** 48,50 ****
--- 48,53 ----
    ENTRY (Float16x8_t, V8HF, none, 128, float16, 19)
    ENTRY (Float32x4_t, V4SF, none, 128, float32, 19)
  
+   ENTRY (Bfloat16x2_t, V2BF, none, 32, bfloat16, 20)
+   ENTRY (Bfloat16x4_t, V4BF, none, 64, bfloat16, 20)
+   ENTRY (Bfloat16x8_t, V8BF, none, 128, bfloat16, 20)
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-tables.opt gcc-10.1.0/gcc/config/arm/arm-tables.opt
*** gcc-9.3.0/gcc/config/arm/arm-tables.opt	Thu Mar 12 11:08:30 2020
--- gcc-10.1.0/gcc/config/arm/arm-tables.opt	Thu May  7 10:50:51 2020
***************
*** 2,8 ****
  ; Generated automatically by parsecpu.awk from arm-cpus.in.
  ; Do not edit.
  
! ; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
  ; This file is part of GCC.
  
--- 2,8 ----
  ; Generated automatically by parsecpu.awk from arm-cpus.in.
  ; Do not edit.
  
! ; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
  ; This file is part of GCC.
  
*************** EnumValue
*** 235,240 ****
--- 235,246 ----
  Enum(processor_type) String(cortex-a76) Value( TARGET_CPU_cortexa76)
  
  EnumValue
+ Enum(processor_type) String(cortex-a76ae) Value( TARGET_CPU_cortexa76ae)
+ 
+ EnumValue
+ Enum(processor_type) String(cortex-a77) Value( TARGET_CPU_cortexa77)
+ 
+ EnumValue
  Enum(processor_type) String(neoverse-n1) Value( TARGET_CPU_neoversen1)
  
  EnumValue
*************** EnumValue
*** 250,255 ****
--- 256,267 ----
  Enum(processor_type) String(cortex-m33) Value( TARGET_CPU_cortexm33)
  
  EnumValue
+ Enum(processor_type) String(cortex-m35p) Value( TARGET_CPU_cortexm35p)
+ 
+ EnumValue
+ Enum(processor_type) String(cortex-m55) Value( TARGET_CPU_cortexm55)
+ 
+ EnumValue
  Enum(processor_type) String(cortex-r52) Value( TARGET_CPU_cortexr52)
  
  Enum
*************** EnumValue
*** 335,353 ****
  Enum(arm_arch) String(armv8.5-a) Value(25)
  
  EnumValue
! Enum(arm_arch) String(armv8-m.base) Value(26)
  
  EnumValue
! Enum(arm_arch) String(armv8-m.main) Value(27)
  
  EnumValue
! Enum(arm_arch) String(armv8-r) Value(28)
  
  EnumValue
! Enum(arm_arch) String(iwmmxt) Value(29)
  
  EnumValue
! Enum(arm_arch) String(iwmmxt2) Value(30)
  
  Enum
  Name(arm_fpu) Type(enum fpu_type)
--- 347,371 ----
  Enum(arm_arch) String(armv8.5-a) Value(25)
  
  EnumValue
! Enum(arm_arch) String(armv8.6-a) Value(26)
  
  EnumValue
! Enum(arm_arch) String(armv8-m.base) Value(27)
  
  EnumValue
! Enum(arm_arch) String(armv8-m.main) Value(28)
  
  EnumValue
! Enum(arm_arch) String(armv8-r) Value(29)
  
  EnumValue
! Enum(arm_arch) String(armv8.1-m.main) Value(30)
! 
! EnumValue
! Enum(arm_arch) String(iwmmxt) Value(31)
! 
! EnumValue
! Enum(arm_arch) String(iwmmxt2) Value(32)
  
  Enum
  Name(arm_fpu) Type(enum fpu_type)
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm-tune.md gcc-10.1.0/gcc/config/arm/arm-tune.md
*** gcc-9.3.0/gcc/config/arm/arm-tune.md	Thu Mar 12 11:08:30 2020
--- gcc-10.1.0/gcc/config/arm/arm-tune.md	Thu May  7 10:50:51 2020
***************
*** 2,8 ****
  ; Generated automatically by parsecpu.awk from arm-cpus.in.
  ; Do not edit.
  
! ; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
  ; This file is part of GCC.
  
--- 2,8 ----
  ; Generated automatically by parsecpu.awk from arm-cpus.in.
  ; Do not edit.
  
! ; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
  ; This file is part of GCC.
  
***************
*** 44,50 ****
  	cortexa73,exynosm1,xgene1,
  	cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,
  	cortexa73cortexa53,cortexa55,cortexa75,
! 	cortexa76,neoversen1,cortexa75cortexa55,
! 	cortexa76cortexa55,cortexm23,cortexm33,
! 	cortexr52"
  	(const (symbol_ref "((enum attr_tune) arm_tune)")))
--- 44,51 ----
  	cortexa73,exynosm1,xgene1,
  	cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,
  	cortexa73cortexa53,cortexa55,cortexa75,
! 	cortexa76,cortexa76ae,cortexa77,
! 	neoversen1,cortexa75cortexa55,cortexa76cortexa55,
! 	cortexm23,cortexm33,cortexm35p,
! 	cortexm55,cortexr52"
  	(const (symbol_ref "((enum attr_tune) arm_tune)")))
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm.c gcc-10.1.0/gcc/config/arm/arm.c
*** gcc-9.3.0/gcc/config/arm/arm.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Output routines for GCC for ARM.
!    Copyright (C) 1991-2019 Free Software Foundation, Inc.
     Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
     and Martin Simmons (@harleqn.co.uk).
     More major hacks by Richard Earnshaw (rearnsha@arm.com).
--- 1,5 ----
  /* Output routines for GCC for ARM.
!    Copyright (C) 1991-2020 Free Software Foundation, Inc.
     Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
     and Martin Simmons (@harleqn.co.uk).
     More major hacks by Richard Earnshaw (rearnsha@arm.com).
***************
*** 59,65 ****
  #include "langhooks.h"
  #include "intl.h"
  #include "libfuncs.h"
- #include "params.h"
  #include "opts.h"
  #include "dumpfile.h"
  #include "target-globals.h"
--- 59,64 ----
*************** static bool arm_have_conditional_executi
*** 181,198 ****
  static bool arm_cannot_force_const_mem (machine_mode, rtx);
  static bool arm_legitimate_constant_p (machine_mode, rtx);
  static bool arm_rtx_costs (rtx, machine_mode, int, int, int *, bool);
  static int arm_address_cost (rtx, machine_mode, addr_space_t, bool);
  static int arm_register_move_cost (machine_mode, reg_class_t, reg_class_t);
  static int arm_memory_move_cost (machine_mode, reg_class_t, bool);
  static void emit_constant_insn (rtx cond, rtx pattern);
  static rtx_insn *emit_set_insn (rtx, rtx);
  static rtx emit_multi_reg_push (unsigned long, unsigned long);
! static int arm_arg_partial_bytes (cumulative_args_t, machine_mode,
! 				  tree, bool);
! static rtx arm_function_arg (cumulative_args_t, machine_mode,
! 			     const_tree, bool);
! static void arm_function_arg_advance (cumulative_args_t, machine_mode,
! 				      const_tree, bool);
  static pad_direction arm_function_arg_padding (machine_mode, const_tree);
  static unsigned int arm_function_arg_boundary (machine_mode, const_tree);
  static rtx aapcs_allocate_return_reg (machine_mode, const_tree,
--- 180,201 ----
  static bool arm_cannot_force_const_mem (machine_mode, rtx);
  static bool arm_legitimate_constant_p (machine_mode, rtx);
  static bool arm_rtx_costs (rtx, machine_mode, int, int, int *, bool);
+ static int arm_insn_cost (rtx_insn *, bool);
  static int arm_address_cost (rtx, machine_mode, addr_space_t, bool);
  static int arm_register_move_cost (machine_mode, reg_class_t, reg_class_t);
  static int arm_memory_move_cost (machine_mode, reg_class_t, bool);
  static void emit_constant_insn (rtx cond, rtx pattern);
  static rtx_insn *emit_set_insn (rtx, rtx);
+ static void arm_add_cfa_adjust_cfa_note (rtx, int, rtx, rtx);
  static rtx emit_multi_reg_push (unsigned long, unsigned long);
! static void arm_emit_multi_reg_pop (unsigned long);
! static int vfp_emit_fstmd (int, int);
! static void arm_emit_vfp_multi_reg_pop (int, int, rtx);
! static int arm_arg_partial_bytes (cumulative_args_t,
! 				  const function_arg_info &);
! static rtx arm_function_arg (cumulative_args_t, const function_arg_info &);
! static void arm_function_arg_advance (cumulative_args_t,
! 				      const function_arg_info &);
  static pad_direction arm_function_arg_padding (machine_mode, const_tree);
  static unsigned int arm_function_arg_boundary (machine_mode, const_tree);
  static rtx aapcs_allocate_return_reg (machine_mode, const_tree,
*************** static void arm_file_end (void);
*** 212,226 ****
  static void arm_file_start (void);
  static void arm_insert_attributes (tree, tree *);
  
! static void arm_setup_incoming_varargs (cumulative_args_t, machine_mode,
! 					tree, int *, int);
  static bool arm_pass_by_reference (cumulative_args_t,
! 				   machine_mode, const_tree, bool);
  static bool arm_promote_prototypes (const_tree);
  static bool arm_default_short_enums (void);
  static bool arm_align_anon_bitfield (void);
  static bool arm_return_in_msb (const_tree);
! static bool arm_must_pass_in_stack (machine_mode, const_tree);
  static bool arm_return_in_memory (const_tree, const_tree);
  #if ARM_UNWIND_INFO
  static void arm_unwind_emit (FILE *, rtx_insn *);
--- 215,229 ----
  static void arm_file_start (void);
  static void arm_insert_attributes (tree, tree *);
  
! static void arm_setup_incoming_varargs (cumulative_args_t,
! 					const function_arg_info &, int *, int);
  static bool arm_pass_by_reference (cumulative_args_t,
! 				   const function_arg_info &);
  static bool arm_promote_prototypes (const_tree);
  static bool arm_default_short_enums (void);
  static bool arm_align_anon_bitfield (void);
  static bool arm_return_in_msb (const_tree);
! static bool arm_must_pass_in_stack (const function_arg_info &);
  static bool arm_return_in_memory (const_tree, const_tree);
  #if ARM_UNWIND_INFO
  static void arm_unwind_emit (FILE *, rtx_insn *);
*************** static bool arm_sched_can_speculate_insn
*** 258,263 ****
--- 261,267 ----
  static bool arm_macro_fusion_p (void);
  static bool arm_cannot_copy_insn_p (rtx_insn *);
  static int arm_issue_rate (void);
+ static int arm_sched_variable_issue (FILE *, int, rtx_insn *, int);
  static int arm_first_cycle_multipass_dfa_lookahead (void);
  static int arm_first_cycle_multipass_dfa_lookahead_guard (rtx_insn *, int);
  static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;
*************** static bool arm_builtin_support_vector_m
*** 288,294 ****
  static void arm_conditional_register_usage (void);
  static enum flt_eval_method arm_excess_precision (enum excess_precision_type);
  static reg_class_t arm_preferred_rename_class (reg_class_t rclass);
! static void arm_autovectorize_vector_sizes (vector_sizes *);
  static int arm_default_branch_cost (bool, bool);
  static int arm_cortex_a5_branch_cost (bool, bool);
  static int arm_cortex_m_branch_cost (bool, bool);
--- 292,298 ----
  static void arm_conditional_register_usage (void);
  static enum flt_eval_method arm_excess_precision (enum excess_precision_type);
  static reg_class_t arm_preferred_rename_class (reg_class_t rclass);
! static unsigned int arm_autovectorize_vector_modes (vector_modes *, bool);
  static int arm_default_branch_cost (bool, bool);
  static int arm_cortex_a5_branch_cost (bool, bool);
  static int arm_cortex_m_branch_cost (bool, bool);
*************** static unsigned int arm_hard_regno_nregs
*** 325,330 ****
--- 329,337 ----
  static bool arm_hard_regno_mode_ok (unsigned int, machine_mode);
  static bool arm_modes_tieable_p (machine_mode, machine_mode);
  static HOST_WIDE_INT arm_constant_alignment (const_tree, HOST_WIDE_INT);
+ static rtx_insn * thumb1_md_asm_adjust (vec<rtx> &, vec<rtx> &,
+ 					vec<const char *> &, vec<rtx> &,
+ 					HARD_REG_SET &);
  
  /* Table of machine attributes.  */
  static const struct attribute_spec arm_attribute_table[] =
*************** static const struct attribute_spec arm_a
*** 384,389 ****
--- 391,399 ----
  #define TARGET_MERGE_DECL_ATTRIBUTES merge_dllimport_decl_attributes
  #endif
  
+ #undef TARGET_CHECK_BUILTIN_CALL
+ #define TARGET_CHECK_BUILTIN_CALL arm_check_builtin_call
+ 
  #undef TARGET_LEGITIMIZE_ADDRESS
  #define TARGET_LEGITIMIZE_ADDRESS arm_legitimize_address
  
*************** static const struct attribute_spec arm_a
*** 510,515 ****
--- 520,527 ----
  #define TARGET_RTX_COSTS arm_rtx_costs
  #undef  TARGET_ADDRESS_COST
  #define TARGET_ADDRESS_COST arm_address_cost
+ #undef TARGET_INSN_COST
+ #define TARGET_INSN_COST arm_insn_cost
  
  #undef TARGET_SHIFT_TRUNCATION_MASK
  #define TARGET_SHIFT_TRUNCATION_MASK arm_shift_truncation_mask
*************** static const struct attribute_spec arm_a
*** 519,527 ****
  #define TARGET_ARRAY_MODE_SUPPORTED_P arm_array_mode_supported_p
  #undef TARGET_VECTORIZE_PREFERRED_SIMD_MODE
  #define TARGET_VECTORIZE_PREFERRED_SIMD_MODE arm_preferred_simd_mode
! #undef TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES
! #define TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES \
!   arm_autovectorize_vector_sizes
  
  #undef  TARGET_MACHINE_DEPENDENT_REORG
  #define TARGET_MACHINE_DEPENDENT_REORG arm_reorg
--- 531,539 ----
  #define TARGET_ARRAY_MODE_SUPPORTED_P arm_array_mode_supported_p
  #undef TARGET_VECTORIZE_PREFERRED_SIMD_MODE
  #define TARGET_VECTORIZE_PREFERRED_SIMD_MODE arm_preferred_simd_mode
! #undef TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES
! #define TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES \
!   arm_autovectorize_vector_modes
  
  #undef  TARGET_MACHINE_DEPENDENT_REORG
  #define TARGET_MACHINE_DEPENDENT_REORG arm_reorg
*************** static const struct attribute_spec arm_a
*** 666,671 ****
--- 678,686 ----
  #undef TARGET_SCHED_ISSUE_RATE
  #define TARGET_SCHED_ISSUE_RATE arm_issue_rate
  
+ #undef TARGET_SCHED_VARIABLE_ISSUE
+ #define TARGET_SCHED_VARIABLE_ISSUE arm_sched_variable_issue
+ 
  #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
  #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \
    arm_first_cycle_multipass_dfa_lookahead
*************** static const struct attribute_spec arm_a
*** 677,682 ****
--- 692,706 ----
  #undef TARGET_MANGLE_TYPE
  #define TARGET_MANGLE_TYPE arm_mangle_type
  
+ #undef TARGET_INVALID_CONVERSION
+ #define TARGET_INVALID_CONVERSION arm_invalid_conversion
+ 
+ #undef TARGET_INVALID_UNARY_OP
+ #define TARGET_INVALID_UNARY_OP arm_invalid_unary_op
+ 
+ #undef TARGET_INVALID_BINARY_OP
+ #define TARGET_INVALID_BINARY_OP arm_invalid_binary_op
+ 
  #undef TARGET_ATOMIC_ASSIGN_EXPAND_FENV
  #define TARGET_ATOMIC_ASSIGN_EXPAND_FENV arm_atomic_assign_expand_fenv
  
*************** static const struct attribute_spec arm_a
*** 808,813 ****
--- 832,840 ----
  
  #undef TARGET_CONSTANT_ALIGNMENT
  #define TARGET_CONSTANT_ALIGNMENT arm_constant_alignment
+ 
+ #undef TARGET_MD_ASM_ADJUST
+ #define TARGET_MD_ASM_ADJUST arm_md_asm_adjust
  
  /* Obstack for minipool constant handling.  */
  static struct obstack minipool_obstack;
*************** int arm_arch8_3 = 0;
*** 900,905 ****
--- 927,935 ----
  
  /* Nonzero if this chip supports the ARM Architecture 8.4 extensions.  */
  int arm_arch8_4 = 0;
+ /* Nonzero if this chip supports the ARM Architecture 8.1-M Mainline
+    extensions.  */
+ int arm_arch8_1m_main = 0;
  
  /* Nonzero if this chip supports the FP16 instructions extension of ARM
     Architecture 8.2.  */
*************** int arm_arch_thumb_hwdiv;
*** 950,959 ****
  /* Nonzero if chip disallows volatile memory access in IT block.  */
  int arm_arch_no_volatile_ce;
  
- /* Nonzero if we should use Neon to handle 64-bits operations rather
-    than core registers.  */
- int prefer_neon_for_64bits = 0;
- 
  /* Nonzero if we shouldn't use literal pools.  */
  bool arm_disable_literal_pool = false;
  
--- 980,985 ----
*************** int arm_arch_cmse = 0;
*** 989,994 ****
--- 1015,1033 ----
  /* Nonzero if the core has a very small, high-latency, multiply unit.  */
  int arm_m_profile_small_mul = 0;
  
+ /* Nonzero if chip supports the AdvSIMD I8MM instructions.  */
+ int arm_arch_i8mm = 0;
+ 
+ /* Nonzero if chip supports the BFloat16 instructions.  */
+ int arm_arch_bf16 = 0;
+ 
+ /* Nonzero if chip supports the Custom Datapath Extension.  */
+ int arm_arch_cde = 0;
+ int arm_arch_cde_coproc = 0;
+ const int arm_arch_cde_coproc_bits[] = {
+   0x1, 0x2, 0x4, 0x8, 0x10, 0x20, 0x40, 0x80
+ };
+ 
  /* The condition codes of the ARM, and the inverse function.  */
  static const char * const arm_condition_codes[] =
  {
*************** int arm_regs_in_sequence[] =
*** 1002,1007 ****
--- 1041,1052 ----
    0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
  };
  
+ #define DEF_FP_SYSREG(reg) #reg,
+ const char *fp_sysreg_names[NB_FP_SYSREGS] = {
+   FP_SYSREGS
+ };
+ #undef DEF_FP_SYSREG
+ 
  #define ARM_LSL_NAME "lsl"
  #define streq(string1, string2) (strcmp (string1, string2) == 0)
  
*************** const struct tune_params arm_slowmul_tun
*** 1811,1817 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 1856,1861 ----
*************** const struct tune_params arm_fastmul_tun
*** 1834,1840 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 1878,1883 ----
*************** const struct tune_params arm_strongarm_t
*** 1860,1866 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 1903,1908 ----
*************** const struct tune_params arm_xscale_tune
*** 1883,1889 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 1925,1930 ----
*************** const struct tune_params arm_9e_tune =
*** 1906,1912 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 1947,1952 ----
*************** const struct tune_params arm_marvell_pj4
*** 1929,1935 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 1969,1974 ----
*************** const struct tune_params arm_v6t2_tune =
*** 1952,1958 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 1991,1996 ----
*************** const struct tune_params arm_cortex_tune
*** 1977,1983 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 2015,2020 ----
*************** const struct tune_params arm_cortex_a8_t
*** 2000,2006 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_TRUE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 2037,2042 ----
*************** const struct tune_params arm_cortex_a7_t
*** 2023,2029 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_TRUE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 2059,2064 ----
*************** const struct tune_params arm_cortex_a15_
*** 2046,2052 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_ALL,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_TRUE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_FULL
--- 2081,2086 ----
*************** const struct tune_params arm_cortex_a35_
*** 2069,2075 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_TRUE,
    FUSE_OPS (tune_params::FUSE_MOVW_MOVT),
    tune_params::SCHED_AUTOPREF_OFF
--- 2103,2108 ----
*************** const struct tune_params arm_cortex_a53_
*** 2092,2098 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_TRUE,
    FUSE_OPS (tune_params::FUSE_MOVW_MOVT | tune_params::FUSE_AES_AESMC),
    tune_params::SCHED_AUTOPREF_OFF
--- 2125,2130 ----
*************** const struct tune_params arm_cortex_a57_
*** 2115,2121 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_ALL,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_TRUE,
    FUSE_OPS (tune_params::FUSE_MOVW_MOVT | tune_params::FUSE_AES_AESMC),
    tune_params::SCHED_AUTOPREF_FULL
--- 2147,2152 ----
*************** const struct tune_params arm_exynosm1_tu
*** 2138,2144 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,	/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,	/* ARM.  */
    tune_params::DISPARAGE_FLAGS_ALL,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_TRUE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 2169,2174 ----
*************** const struct tune_params arm_xgene1_tune
*** 2161,2167 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_ALL,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 2191,2196 ----
*************** const struct tune_params arm_cortex_a5_t
*** 2187,2193 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_TRUE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 2216,2221 ----
*************** const struct tune_params arm_cortex_a9_t
*** 2210,2216 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 2238,2243 ----
*************** const struct tune_params arm_cortex_a12_
*** 2233,2239 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_ALL,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_TRUE,
    FUSE_OPS (tune_params::FUSE_MOVW_MOVT),
    tune_params::SCHED_AUTOPREF_OFF
--- 2260,2265 ----
*************** const struct tune_params arm_cortex_a73_
*** 2256,2262 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_ALL,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_TRUE,
    FUSE_OPS (tune_params::FUSE_AES_AESMC | tune_params::FUSE_MOVW_MOVT),
    tune_params::SCHED_AUTOPREF_FULL
--- 2282,2287 ----
*************** const struct tune_params arm_v7m_tune =
*** 2286,2292 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 2311,2316 ----
*************** const struct tune_params arm_cortex_m7_t
*** 2311,2317 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 2335,2340 ----
*************** const struct tune_params arm_v6m_tune =
*** 2337,2343 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 2360,2365 ----
*************** const struct tune_params arm_fa726te_tun
*** 2360,2366 ****
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
    tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
    tune_params::DISPARAGE_FLAGS_NEITHER,
-   tune_params::PREF_NEON_64_FALSE,
    tune_params::PREF_NEON_STRINGOPS_FALSE,
    tune_params::FUSE_NOTHING,
    tune_params::SCHED_AUTOPREF_OFF
--- 2382,2387 ----
*************** char arm_arch_name[] = "__ARM_ARCH_PROFI
*** 2379,2387 ****
--- 2400,2411 ----
  
  enum tls_reloc {
    TLS_GD32,
+   TLS_GD32_FDPIC,
    TLS_LDM32,
+   TLS_LDM32_FDPIC,
    TLS_LDO32,
    TLS_IE32,
+   TLS_IE32_FDPIC,
    TLS_LE32,
    TLS_DESCSEQ	/* GNU scheme */
  };
*************** arm_set_fixed_conv_libfunc (convert_opta
*** 2474,2483 ****
--- 2498,2532 ----
  
  static GTY(()) rtx speculation_barrier_libfunc;
  
+ /* Record that we have no arithmetic or comparison libfuncs for
+    machine mode MODE.  */
+ 
+ static void
+ arm_block_arith_comp_libfuncs_for_mode (machine_mode mode)
+ {
+   /* Arithmetic.  */
+   set_optab_libfunc (add_optab, mode, NULL);
+   set_optab_libfunc (sdiv_optab, mode, NULL);
+   set_optab_libfunc (smul_optab, mode, NULL);
+   set_optab_libfunc (neg_optab, mode, NULL);
+   set_optab_libfunc (sub_optab, mode, NULL);
+ 
+   /* Comparisons.  */
+   set_optab_libfunc (eq_optab, mode, NULL);
+   set_optab_libfunc (ne_optab, mode, NULL);
+   set_optab_libfunc (lt_optab, mode, NULL);
+   set_optab_libfunc (le_optab, mode, NULL);
+   set_optab_libfunc (ge_optab, mode, NULL);
+   set_optab_libfunc (gt_optab, mode, NULL);
+   set_optab_libfunc (unord_optab, mode, NULL);
+ }
+ 
  /* Set up library functions unique to ARM.  */
  static void
  arm_init_libfuncs (void)
  {
+   machine_mode mode_iter;
+ 
    /* For Linux, we have access to kernel support for atomic operations.  */
    if (arm_abi == ARM_ABI_AAPCS_LINUX)
      init_sync_libfuncs (MAX_SYNC_LIBFUNC_SIZE);
*************** arm_init_libfuncs (void)
*** 2606,2632 ****
  			 ? "__gnu_d2h_ieee"
  			 : "__gnu_d2h_alternative"));
  
!       /* Arithmetic.  */
!       set_optab_libfunc (add_optab, HFmode, NULL);
!       set_optab_libfunc (sdiv_optab, HFmode, NULL);
!       set_optab_libfunc (smul_optab, HFmode, NULL);
!       set_optab_libfunc (neg_optab, HFmode, NULL);
!       set_optab_libfunc (sub_optab, HFmode, NULL);
! 
!       /* Comparisons.  */
!       set_optab_libfunc (eq_optab, HFmode, NULL);
!       set_optab_libfunc (ne_optab, HFmode, NULL);
!       set_optab_libfunc (lt_optab, HFmode, NULL);
!       set_optab_libfunc (le_optab, HFmode, NULL);
!       set_optab_libfunc (ge_optab, HFmode, NULL);
!       set_optab_libfunc (gt_optab, HFmode, NULL);
!       set_optab_libfunc (unord_optab, HFmode, NULL);
        break;
  
      default:
        break;
      }
  
    /* Use names prefixed with __gnu_ for fixed-point helper functions.  */
    {
      const arm_fixed_mode_set fixed_arith_modes[] =
--- 2655,2677 ----
  			 ? "__gnu_d2h_ieee"
  			 : "__gnu_d2h_alternative"));
  
!       arm_block_arith_comp_libfuncs_for_mode (HFmode);
        break;
  
      default:
        break;
      }
  
+   /* For all possible libcalls in BFmode, record NULL.  */
+   FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_FLOAT)
+     {
+       set_conv_libfunc (trunc_optab, BFmode, mode_iter, NULL);
+       set_conv_libfunc (trunc_optab, mode_iter, BFmode, NULL);
+       set_conv_libfunc (sext_optab, mode_iter, BFmode, NULL);
+       set_conv_libfunc (sext_optab, BFmode, mode_iter, NULL);
+     }
+   arm_block_arith_comp_libfuncs_for_mode (BFmode);
+ 
    /* Use names prefixed with __gnu_ for fixed-point helper functions.  */
    {
      const arm_fixed_mode_set fixed_arith_modes[] =
*************** arm_option_params_internal (void)
*** 2960,2965 ****
--- 3005,3015 ----
    /* For THUMB2, we limit the conditional sequence to one IT block.  */
    if (TARGET_THUMB2)
      max_insns_skipped = MIN (max_insns_skipped, MAX_INSN_PER_IT_BLOCK);
+ 
+   if (TARGET_THUMB1)
+     targetm.md_asm_adjust = thumb1_md_asm_adjust;
+   else
+     targetm.md_asm_adjust = arm_md_asm_adjust;
  }
  
  /* True if -mflip-thumb should next add an attribute for the default
*************** arm_option_override_internal (struct gcc
*** 3055,3060 ****
--- 3105,3115 ----
    if (!TARGET_THUMB2_P (opts->x_target_flags) || !arm_arch_notm)
      opts->x_arm_restrict_it = 0;
  
+   /* Use the IT size from CPU specific tuning unless -mrestrict-it is used.  */
+   if (!opts_set->x_arm_restrict_it
+       && (opts_set->x_arm_cpu_string || opts_set->x_arm_tune_string))
+     opts->x_arm_restrict_it = 0;
+ 
    /* Enable -munaligned-access by default for
       - all ARMv6 architecture-based processors when compiling for a 32-bit ISA
       i.e. Thumb2 and ARM state only.
*************** arm_option_override_internal (struct gcc
*** 3115,3121 ****
  #endif
  }
  
! static sbitmap isa_all_fpubits;
  static sbitmap isa_quirkbits;
  
  /* Configure a build target TARGET from the user-specified options OPTS and
--- 3170,3177 ----
  #endif
  }
  
! static sbitmap isa_all_fpubits_internal;
! static sbitmap isa_all_fpbits;
  static sbitmap isa_quirkbits;
  
  /* Configure a build target TARGET from the user-specified options OPTS and
*************** arm_configure_build_target (struct arm_b
*** 3182,3188 ****
  	  /* Ignore any bits that are quirk bits.  */
  	  bitmap_and_compl (isa_delta, isa_delta, isa_quirkbits);
  	  /* Ignore (for now) any bits that might be set by -mfpu.  */
! 	  bitmap_and_compl (isa_delta, isa_delta, isa_all_fpubits);
  
  	  if (!bitmap_empty_p (isa_delta))
  	    {
--- 3238,3249 ----
  	  /* Ignore any bits that are quirk bits.  */
  	  bitmap_and_compl (isa_delta, isa_delta, isa_quirkbits);
  	  /* Ignore (for now) any bits that might be set by -mfpu.  */
! 	  bitmap_and_compl (isa_delta, isa_delta, isa_all_fpubits_internal);
! 
! 	  /* And if the target ISA lacks floating point, ignore any
! 	     extensions that depend on that.  */
! 	  if (!bitmap_bit_p (target->isa, isa_bit_vfpv2))
! 	    bitmap_and_compl (isa_delta, isa_delta, isa_all_fpbits);
  
  	  if (!bitmap_empty_p (isa_delta))
  	    {
*************** arm_configure_build_target (struct arm_b
*** 3341,3347 ****
        auto_sbitmap fpu_bits (isa_num_bits);
  
        arm_initialize_isa (fpu_bits, arm_selected_fpu->isa_bits);
!       bitmap_and_compl (target->isa, target->isa, isa_all_fpubits);
        bitmap_ior (target->isa, target->isa, fpu_bits);
      }
  
--- 3402,3408 ----
        auto_sbitmap fpu_bits (isa_num_bits);
  
        arm_initialize_isa (fpu_bits, arm_selected_fpu->isa_bits);
!       bitmap_and_compl (target->isa, target->isa, isa_all_fpubits_internal);
        bitmap_ior (target->isa, target->isa, fpu_bits);
      }
  
*************** arm_configure_build_target (struct arm_b
*** 3367,3382 ****
  static void
  arm_option_override (void)
  {
!   static const enum isa_feature fpu_bitlist[]
      = { ISA_ALL_FPU_INTERNAL, isa_nobit };
    static const enum isa_feature quirk_bitlist[] = { ISA_ALL_QUIRKS, isa_nobit};
    cl_target_option opts;
  
    isa_quirkbits = sbitmap_alloc (isa_num_bits);
    arm_initialize_isa (isa_quirkbits, quirk_bitlist);
  
!   isa_all_fpubits = sbitmap_alloc (isa_num_bits);
!   arm_initialize_isa (isa_all_fpubits, fpu_bitlist);
  
    arm_active_target.isa = sbitmap_alloc (isa_num_bits);
  
--- 3428,3447 ----
  static void
  arm_option_override (void)
  {
!   static const enum isa_feature fpu_bitlist_internal[]
      = { ISA_ALL_FPU_INTERNAL, isa_nobit };
+   static const enum isa_feature fp_bitlist[]
+     = { ISA_ALL_FP, isa_nobit };
    static const enum isa_feature quirk_bitlist[] = { ISA_ALL_QUIRKS, isa_nobit};
    cl_target_option opts;
  
    isa_quirkbits = sbitmap_alloc (isa_num_bits);
    arm_initialize_isa (isa_quirkbits, quirk_bitlist);
  
!   isa_all_fpubits_internal = sbitmap_alloc (isa_num_bits);
!   isa_all_fpbits = sbitmap_alloc (isa_num_bits);
!   arm_initialize_isa (isa_all_fpubits_internal, fpu_bitlist_internal);
!   arm_initialize_isa (isa_all_fpbits, fp_bitlist);
  
    arm_active_target.isa = sbitmap_alloc (isa_num_bits);
  
*************** arm_option_override (void)
*** 3490,3495 ****
--- 3555,3568 ----
    if (flag_pic && TARGET_VXWORKS_RTP)
      arm_pic_register = 9;
  
+   /* If in FDPIC mode then force arm_pic_register to be r9.  */
+   if (TARGET_FDPIC)
+     {
+       arm_pic_register = FDPIC_REGNUM;
+       if (TARGET_THUMB1)
+ 	sorry ("FDPIC mode is not supported in Thumb-1 mode");
+     }
+ 
    if (arm_pic_register_string != NULL)
      {
        int pic_register = decode_reg_name (arm_pic_register_string);
*************** arm_option_override (void)
*** 3498,3504 ****
  	warning (0, "%<-mpic-register=%> is useless without %<-fpic%>");
  
        /* Prevent the user from choosing an obviously stupid PIC register.  */
!       else if (pic_register < 0 || call_used_regs[pic_register]
  	       || pic_register == HARD_FRAME_POINTER_REGNUM
  	       || pic_register == STACK_POINTER_REGNUM
  	       || pic_register >= PC_REGNUM
--- 3571,3577 ----
  	warning (0, "%<-mpic-register=%> is useless without %<-fpic%>");
  
        /* Prevent the user from choosing an obviously stupid PIC register.  */
!       else if (pic_register < 0 || call_used_or_fixed_reg_p (pic_register)
  	       || pic_register == HARD_FRAME_POINTER_REGNUM
  	       || pic_register == STACK_POINTER_REGNUM
  	       || pic_register >= PC_REGNUM
*************** arm_option_override (void)
*** 3537,3545 ****
         but measurable, size reduction for PIC code.  Therefore, we decrease
         the bar for unrestricted expression hoisting to the cost of PIC address
         calculation, which is 2 instructions.  */
!     maybe_set_param_value (PARAM_GCSE_UNRESTRICTED_COST, 2,
! 			   global_options.x_param_values,
! 			   global_options_set.x_param_values);
  
    /* ARM EABI defaults to strict volatile bitfields.  */
    if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0
--- 3610,3617 ----
         but measurable, size reduction for PIC code.  Therefore, we decrease
         the bar for unrestricted expression hoisting to the cost of PIC address
         calculation, which is 2 instructions.  */
!     SET_OPTION_IF_UNSET (&global_options, &global_options_set,
! 			 param_gcse_unrestricted_cost, 2);
  
    /* ARM EABI defaults to strict volatile bitfields.  */
    if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0
*************** arm_option_override (void)
*** 3559,3616 ****
       override the defaults unless we are tuning for a core we have
       researched values for.  */
    if (current_tune->prefetch.num_slots > 0)
!     maybe_set_param_value (PARAM_SIMULTANEOUS_PREFETCHES,
! 			   current_tune->prefetch.num_slots,
! 			   global_options.x_param_values,
! 			   global_options_set.x_param_values);
    if (current_tune->prefetch.l1_cache_line_size >= 0)
!     maybe_set_param_value (PARAM_L1_CACHE_LINE_SIZE,
! 			   current_tune->prefetch.l1_cache_line_size,
! 			   global_options.x_param_values,
! 			   global_options_set.x_param_values);
    if (current_tune->prefetch.l1_cache_size >= 0)
!     maybe_set_param_value (PARAM_L1_CACHE_SIZE,
! 			   current_tune->prefetch.l1_cache_size,
! 			   global_options.x_param_values,
! 			   global_options_set.x_param_values);
! 
!   /* Use Neon to perform 64-bits operations rather than core
!      registers.  */
!   prefer_neon_for_64bits = current_tune->prefer_neon_for_64bits;
!   if (use_neon_for_64bits == 1)
!      prefer_neon_for_64bits = true;
! 
!   /* Use the alternative scheduling-pressure algorithm by default.  */
!   maybe_set_param_value (PARAM_SCHED_PRESSURE_ALGORITHM, SCHED_PRESSURE_MODEL,
! 			 global_options.x_param_values,
! 			 global_options_set.x_param_values);
  
    /* Look through ready list and all of queue for instructions
       relevant for L2 auto-prefetcher.  */
!   int param_sched_autopref_queue_depth;
  
    switch (current_tune->sched_autopref)
      {
      case tune_params::SCHED_AUTOPREF_OFF:
!       param_sched_autopref_queue_depth = -1;
        break;
  
      case tune_params::SCHED_AUTOPREF_RANK:
!       param_sched_autopref_queue_depth = 0;
        break;
  
      case tune_params::SCHED_AUTOPREF_FULL:
!       param_sched_autopref_queue_depth = max_insn_queue_index + 1;
        break;
  
      default:
        gcc_unreachable ();
      }
  
!   maybe_set_param_value (PARAM_SCHED_AUTOPREF_QUEUE_DEPTH,
! 			 param_sched_autopref_queue_depth,
! 			 global_options.x_param_values,
! 			 global_options_set.x_param_values);
  
    /* Currently, for slow flash data, we just disable literal pools.  We also
       disable it for pure-code.  */
--- 3631,3673 ----
       override the defaults unless we are tuning for a core we have
       researched values for.  */
    if (current_tune->prefetch.num_slots > 0)
!     SET_OPTION_IF_UNSET (&global_options, &global_options_set,
! 			 param_simultaneous_prefetches,
! 			 current_tune->prefetch.num_slots);
    if (current_tune->prefetch.l1_cache_line_size >= 0)
!     SET_OPTION_IF_UNSET (&global_options, &global_options_set,
! 			 param_l1_cache_line_size,
! 			 current_tune->prefetch.l1_cache_line_size);
    if (current_tune->prefetch.l1_cache_size >= 0)
!     SET_OPTION_IF_UNSET (&global_options, &global_options_set,
! 			 param_l1_cache_size,
! 			 current_tune->prefetch.l1_cache_size);
  
    /* Look through ready list and all of queue for instructions
       relevant for L2 auto-prefetcher.  */
!   int sched_autopref_queue_depth;
  
    switch (current_tune->sched_autopref)
      {
      case tune_params::SCHED_AUTOPREF_OFF:
!       sched_autopref_queue_depth = -1;
        break;
  
      case tune_params::SCHED_AUTOPREF_RANK:
!       sched_autopref_queue_depth = 0;
        break;
  
      case tune_params::SCHED_AUTOPREF_FULL:
!       sched_autopref_queue_depth = max_insn_queue_index + 1;
        break;
  
      default:
        gcc_unreachable ();
      }
  
!   SET_OPTION_IF_UNSET (&global_options, &global_options_set,
! 		       param_sched_autopref_queue_depth,
! 		       sched_autopref_queue_depth);
  
    /* Currently, for slow flash data, we just disable literal pools.  We also
       disable it for pure-code.  */
*************** arm_option_reconfigure_globals (void)
*** 3667,3672 ****
--- 3724,3731 ----
    arm_arch8_2 = bitmap_bit_p (arm_active_target.isa, isa_bit_armv8_2);
    arm_arch8_3 = bitmap_bit_p (arm_active_target.isa, isa_bit_armv8_3);
    arm_arch8_4 = bitmap_bit_p (arm_active_target.isa, isa_bit_armv8_4);
+   arm_arch8_1m_main = bitmap_bit_p (arm_active_target.isa,
+ 				    isa_bit_armv8_1m_main);
    arm_arch_thumb1 = bitmap_bit_p (arm_active_target.isa, isa_bit_thumb);
    arm_arch_thumb2 = bitmap_bit_p (arm_active_target.isa, isa_bit_thumb2);
    arm_arch_xscale = bitmap_bit_p (arm_active_target.isa, isa_bit_xscale);
*************** arm_option_reconfigure_globals (void)
*** 3676,3683 ****
    arm_arch_arm_hwdiv = bitmap_bit_p (arm_active_target.isa, isa_bit_adiv);
    arm_arch_crc = bitmap_bit_p (arm_active_target.isa, isa_bit_crc32);
    arm_arch_cmse = bitmap_bit_p (arm_active_target.isa, isa_bit_cmse);
-   arm_fp16_inst = bitmap_bit_p (arm_active_target.isa, isa_bit_fp16);
    arm_arch_lpae = bitmap_bit_p (arm_active_target.isa, isa_bit_lpae);
    if (arm_fp16_inst)
      {
        if (arm_fp16_format == ARM_FP16_FORMAT_ALTERNATIVE)
--- 3735,3745 ----
    arm_arch_arm_hwdiv = bitmap_bit_p (arm_active_target.isa, isa_bit_adiv);
    arm_arch_crc = bitmap_bit_p (arm_active_target.isa, isa_bit_crc32);
    arm_arch_cmse = bitmap_bit_p (arm_active_target.isa, isa_bit_cmse);
    arm_arch_lpae = bitmap_bit_p (arm_active_target.isa, isa_bit_lpae);
+   arm_arch_i8mm = bitmap_bit_p (arm_active_target.isa, isa_bit_i8mm);
+   arm_arch_bf16 = bitmap_bit_p (arm_active_target.isa, isa_bit_bf16);
+ 
+   arm_fp16_inst = bitmap_bit_p (arm_active_target.isa, isa_bit_fp16);
    if (arm_fp16_inst)
      {
        if (arm_fp16_format == ARM_FP16_FORMAT_ALTERNATIVE)
*************** arm_option_reconfigure_globals (void)
*** 3685,3690 ****
--- 3747,3767 ----
        arm_fp16_format = ARM_FP16_FORMAT_IEEE;
      }
  
+   arm_arch_cde = 0;
+   arm_arch_cde_coproc = 0;
+   int cde_bits[] = {isa_bit_cdecp0, isa_bit_cdecp1, isa_bit_cdecp2,
+ 		    isa_bit_cdecp3, isa_bit_cdecp4, isa_bit_cdecp5,
+ 		    isa_bit_cdecp6, isa_bit_cdecp7};
+   for (int i = 0, e = ARRAY_SIZE (cde_bits); i < e; i++)
+     {
+       int cde_bit = bitmap_bit_p (arm_active_target.isa, cde_bits[i]);
+       if (cde_bit)
+ 	{
+ 	  arm_arch_cde |= cde_bit;
+ 	  arm_arch_cde_coproc |= arm_arch_cde_coproc_bits[i];
+ 	}
+     }
+ 
    /* And finally, set up some quirks.  */
    arm_arch_no_volatile_ce
      = bitmap_bit_p (arm_active_target.isa, isa_bit_quirk_no_volatile_ce);
*************** arm_options_perform_arch_sanity_checks (
*** 3768,3774 ****
        else if (TARGET_HARD_FLOAT_ABI)
  	{
  	  arm_pcs_default = ARM_PCS_AAPCS_VFP;
! 	  if (!bitmap_bit_p (arm_active_target.isa, isa_bit_vfpv2))
  	    error ("%<-mfloat-abi=hard%>: selected processor lacks an FPU");
  	}
        else
--- 3845,3852 ----
        else if (TARGET_HARD_FLOAT_ABI)
  	{
  	  arm_pcs_default = ARM_PCS_AAPCS_VFP;
! 	  if (!bitmap_bit_p (arm_active_target.isa, isa_bit_vfpv2)
! 	      && !bitmap_bit_p (arm_active_target.isa, isa_bit_mve))
  	    error ("%<-mfloat-abi=hard%>: selected processor lacks an FPU");
  	}
        else
*************** arm_options_perform_arch_sanity_checks (
*** 3786,3791 ****
--- 3864,3905 ----
      }
  }
  
+ /* Test whether a local function descriptor is canonical, i.e.,
+    whether we can use GOTOFFFUNCDESC to compute the address of the
+    function.  */
+ static bool
+ arm_fdpic_local_funcdesc_p (rtx fnx)
+ {
+   tree fn;
+   enum symbol_visibility vis;
+   bool ret;
+ 
+   if (!TARGET_FDPIC)
+     return true;
+ 
+   if (! SYMBOL_REF_LOCAL_P (fnx))
+     return false;
+ 
+   fn = SYMBOL_REF_DECL (fnx);
+ 
+   if (! fn)
+     return false;
+ 
+   vis = DECL_VISIBILITY (fn);
+ 
+   if (vis == VISIBILITY_PROTECTED)
+     /* Private function descriptors for protected functions are not
+        canonical.  Temporarily change the visibility to global so that
+        we can ensure uniqueness of funcdesc pointers.  */
+     DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
+ 
+   ret = default_binds_local_p_1 (fn, flag_pic);
+ 
+   DECL_VISIBILITY (fn) = vis;
+ 
+   return ret;
+ }
+ 
  static void
  arm_add_gc_roots (void)
  {
*************** static const isr_attribute_arg isr_attri
*** 3811,3818 ****
    { "fiq",   ARM_FT_FIQ },
    { "ABORT", ARM_FT_ISR },
    { "abort", ARM_FT_ISR },
-   { "ABORT", ARM_FT_ISR },
-   { "abort", ARM_FT_ISR },
    { "UNDEF", ARM_FT_EXCEPTION },
    { "undef", ARM_FT_EXCEPTION },
    { "SWI",   ARM_FT_EXCEPTION },
--- 3925,3930 ----
*************** arm_warn_func_return (tree decl)
*** 3935,3948 ****
  	   ldr		pc, [pc]
  	   .word	static chain value
  	   .word	function's address
!    XXX FIXME: When the trampoline returns, r8 will be clobbered.  */
  
  static void
  arm_asm_trampoline_template (FILE *f)
  {
    fprintf (f, "\t.syntax unified\n");
  
!   if (TARGET_ARM)
      {
        fprintf (f, "\t.arm\n");
        asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM, PC_REGNUM);
--- 4047,4098 ----
  	   ldr		pc, [pc]
  	   .word	static chain value
  	   .word	function's address
!    XXX FIXME: When the trampoline returns, r8 will be clobbered.
! 
!    In FDPIC mode, the trampoline looks like:
! 	   .word	trampoline address
! 	   .word	trampoline GOT address
! 	   ldr 		r12, [pc, #8] ; #4 for Arm mode
! 	   ldr 		r9,  [pc, #8] ; #4 for Arm mode
! 	   ldr		pc,  [pc, #8] ; #4 for Arm mode
! 	   .word	static chain value
! 	   .word	GOT address
! 	   .word	function's address
! */
  
  static void
  arm_asm_trampoline_template (FILE *f)
  {
    fprintf (f, "\t.syntax unified\n");
  
!   if (TARGET_FDPIC)
!     {
!       /* The first two words are a function descriptor pointing to the
! 	 trampoline code just below.  */
!       if (TARGET_ARM)
! 	fprintf (f, "\t.arm\n");
!       else if (TARGET_THUMB2)
! 	fprintf (f, "\t.thumb\n");
!       else
! 	/* Only ARM and Thumb-2 are supported.  */
! 	gcc_unreachable ();
! 
!       assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
!       assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
!       /* Trampoline code which sets the static chain register but also
! 	 PIC register before jumping into real code.  */
!       asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
! 		   STATIC_CHAIN_REGNUM, PC_REGNUM,
! 		   TARGET_THUMB2 ? 8 : 4);
!       asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
! 		   PIC_OFFSET_TABLE_REGNUM, PC_REGNUM,
! 		   TARGET_THUMB2 ? 8 : 4);
!       asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
! 		   PC_REGNUM, PC_REGNUM,
! 		   TARGET_THUMB2 ? 8 : 4);
!       assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
!     }
!   else if (TARGET_ARM)
      {
        fprintf (f, "\t.arm\n");
        asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM, PC_REGNUM);
*************** arm_trampoline_init (rtx m_tramp, tree f
*** 3983,3994 ****
    emit_block_move (m_tramp, assemble_trampoline_template (),
  		   GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
  
!   mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
!   emit_move_insn (mem, chain_value);
  
!   mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
!   fnaddr = XEXP (DECL_RTL (fndecl), 0);
!   emit_move_insn (mem, fnaddr);
  
    a_tramp = XEXP (m_tramp, 0);
    emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
--- 4133,4172 ----
    emit_block_move (m_tramp, assemble_trampoline_template (),
  		   GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
  
!   if (TARGET_FDPIC)
!     {
!       rtx funcdesc = XEXP (DECL_RTL (fndecl), 0);
!       rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
!       rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
!       /* The function start address is at offset 8, but in Thumb mode
! 	 we want bit 0 set to 1 to indicate Thumb-ness, hence 9
! 	 below.  */
!       rtx trampoline_code_start
! 	= plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9 : 8);
  
!       /* Write initial funcdesc which points to the trampoline.  */
!       mem = adjust_address (m_tramp, SImode, 0);
!       emit_move_insn (mem, trampoline_code_start);
!       mem = adjust_address (m_tramp, SImode, 4);
!       emit_move_insn (mem, gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM));
!       /* Setup static chain.  */
!       mem = adjust_address (m_tramp, SImode, 20);
!       emit_move_insn (mem, chain_value);
!       /* GOT + real function entry point.  */
!       mem = adjust_address (m_tramp, SImode, 24);
!       emit_move_insn (mem, gotaddr);
!       mem = adjust_address (m_tramp, SImode, 28);
!       emit_move_insn (mem, fnaddr);
!     }
!   else
!     {
!       mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
!       emit_move_insn (mem, chain_value);
! 
!       mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
!       fnaddr = XEXP (DECL_RTL (fndecl), 0);
!       emit_move_insn (mem, fnaddr);
!     }
  
    a_tramp = XEXP (m_tramp, 0);
    emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
*************** arm_trampoline_init (rtx m_tramp, tree f
*** 4002,4008 ****
  static rtx
  arm_trampoline_adjust_address (rtx addr)
  {
!   if (TARGET_THUMB)
      addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx,
  				NULL, 0, OPTAB_LIB_WIDEN);
    return addr;
--- 4180,4188 ----
  static rtx
  arm_trampoline_adjust_address (rtx addr)
  {
!   /* For FDPIC don't fix trampoline address since it's a function
!      descriptor and not a function address.  */
!   if (TARGET_THUMB && !TARGET_FDPIC)
      addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx,
  				NULL, 0, OPTAB_LIB_WIDEN);
    return addr;
*************** use_return_insn (int iscond, rtx sibling
*** 4080,4086 ****
      {
        /* Validate that r3 is a call-clobbered register (always true in
  	 the default abi) ...  */
!       if (!call_used_regs[3])
  	return 0;
  
        /* ... that it isn't being used for a return value ... */
--- 4260,4266 ----
      {
        /* Validate that r3 is a call-clobbered register (always true in
  	 the default abi) ...  */
!       if (!call_used_or_fixed_reg_p (3))
  	return 0;
  
        /* ... that it isn't being used for a return value ... */
*************** use_return_insn (int iscond, rtx sibling
*** 4123,4130 ****
      }
  
    /* ARMv8-M nonsecure entry function need to use bxns to return and thus need
!      several instructions if anything needs to be popped.  */
!   if (saved_int_regs && IS_CMSE_ENTRY (func_type))
      return 0;
  
    /* If there are saved registers but the LR isn't saved, then we need
--- 4303,4311 ----
      }
  
    /* ARMv8-M nonsecure entry function need to use bxns to return and thus need
!      several instructions if anything needs to be popped.  Armv8.1-M Mainline
!      also needs several instructions to save and restore FP context.  */
!   if (IS_CMSE_ENTRY (func_type) && (saved_int_regs || TARGET_HAVE_FPCXT_CMSE))
      return 0;
  
    /* If there are saved registers but the LR isn't saved, then we need
*************** use_return_insn (int iscond, rtx sibling
*** 4134,4147 ****
  
    /* Can't be done if any of the VFP regs are pushed,
       since this also requires an insn.  */
!   if (TARGET_HARD_FLOAT)
      for (regno = FIRST_VFP_REGNUM; regno <= LAST_VFP_REGNUM; regno++)
!       if (df_regs_ever_live_p (regno) && !call_used_regs[regno])
  	return 0;
  
    if (TARGET_REALLY_IWMMXT)
      for (regno = FIRST_IWMMXT_REGNUM; regno <= LAST_IWMMXT_REGNUM; regno++)
!       if (df_regs_ever_live_p (regno) && ! call_used_regs[regno])
  	return 0;
  
    return 1;
--- 4315,4328 ----
  
    /* Can't be done if any of the VFP regs are pushed,
       since this also requires an insn.  */
!   if (TARGET_VFP_BASE)
      for (regno = FIRST_VFP_REGNUM; regno <= LAST_VFP_REGNUM; regno++)
!       if (df_regs_ever_live_p (regno) && !call_used_or_fixed_reg_p (regno))
  	return 0;
  
    if (TARGET_REALLY_IWMMXT)
      for (regno = FIRST_IWMMXT_REGNUM; regno <= LAST_IWMMXT_REGNUM; regno++)
!       if (df_regs_ever_live_p (regno) && ! call_used_or_fixed_reg_p (regno))
  	return 0;
  
    return 1;
*************** const_ok_for_dimode_op (HOST_WIDE_INT i,
*** 4311,4318 ****
      case AND:
      case IOR:
      case XOR:
!       return (const_ok_for_op (hi_val, code) || hi_val == 0xFFFFFFFF)
!               && (const_ok_for_op (lo_val, code) || lo_val == 0xFFFFFFFF);
      case PLUS:
        return arm_not_operand (hi, SImode) && arm_add_operand (lo, SImode);
  
--- 4492,4499 ----
      case AND:
      case IOR:
      case XOR:
!       return const_ok_for_op (hi_val, code) || hi_val == 0xFFFFFFFF
! 	     || const_ok_for_op (lo_val, code) || lo_val == 0xFFFFFFFF;
      case PLUS:
        return arm_not_operand (hi, SImode) && arm_add_operand (lo, SImode);
  
*************** arm_gen_constant (enum rtx_code code, ma
*** 5310,5315 ****
--- 5491,5511 ----
    return insns;
  }
  
+ /* Return TRUE if op is a constant where both the low and top words are
+    suitable for RSB/RSC instructions.  This is never true for Thumb, since
+    we do not have RSC in that case.  */
+ static bool
+ arm_const_double_prefer_rsbs_rsc (rtx op)
+ {
+   /* Thumb lacks RSC, so we never prefer that sequence.  */
+   if (TARGET_THUMB || !CONST_INT_P (op))
+     return false;
+   HOST_WIDE_INT hi, lo;
+   lo = UINTVAL (op) & 0xffffffffULL;
+   hi = UINTVAL (op) >> 32;
+   return const_ok_for_arm (lo) && const_ok_for_arm (hi);
+ }
+ 
  /* Canonicalize a comparison so that we are more likely to recognize it.
     This can be done for a few constant compares, where we can make the
     immediate value easier to load.  */
*************** arm_canonicalize_comparison (int *code,
*** 5327,5341 ****
  
    maxval = (HOST_WIDE_INT_1U << (GET_MODE_BITSIZE (mode) - 1)) - 1;
  
!   /* For DImode, we have GE/LT/GEU/LTU comparisons.  In ARM mode
!      we can also use cmp/cmpeq for GTU/LEU.  GT/LE must be either
!      reversed or (for constant OP1) adjusted to GE/LT.  Similarly
!      for GTU/LEU in Thumb mode.  */
    if (mode == DImode)
      {
  
        if (*code == GT || *code == LE
! 	  || (!TARGET_ARM && (*code == GTU || *code == LEU)))
  	{
  	  /* Missing comparison.  First try to use an available
  	     comparison.  */
--- 5523,5537 ----
  
    maxval = (HOST_WIDE_INT_1U << (GET_MODE_BITSIZE (mode) - 1)) - 1;
  
!   /* For DImode, we have GE/LT/GEU/LTU comparisons (with cmp/sbc).  In
!      ARM mode we can also use cmp/cmpeq for GTU/LEU.  GT/LE must be
!      either reversed or (for constant OP1) adjusted to GE/LT.
!      Similarly for GTU/LEU in Thumb mode.  */
    if (mode == DImode)
      {
  
        if (*code == GT || *code == LE
! 	  || *code == GTU || *code == LEU)
  	{
  	  /* Missing comparison.  First try to use an available
  	     comparison.  */
*************** arm_canonicalize_comparison (int *code,
*** 5346,5375 ****
  		{
  		case GT:
  		case LE:
! 		  if (i != maxval
! 		      && arm_const_double_by_immediates (GEN_INT (i + 1)))
  		    {
  		      *op1 = GEN_INT (i + 1);
  		      *code = *code == GT ? GE : LT;
  		      return;
  		    }
  		  break;
  		case GTU:
  		case LEU:
! 		  if (i != ~((unsigned HOST_WIDE_INT) 0)
! 		      && arm_const_double_by_immediates (GEN_INT (i + 1)))
  		    {
  		      *op1 = GEN_INT (i + 1);
  		      *code = *code == GTU ? GEU : LTU;
  		      return;
  		    }
  		  break;
  		default:
  		  gcc_unreachable ();
  		}
  	    }
  
- 	  /* If that did not work, reverse the condition.  */
  	  if (!op0_preserve_value)
  	    {
  	      std::swap (*op0, *op1);
--- 5542,5580 ----
  		{
  		case GT:
  		case LE:
! 		  if (i != maxval)
  		    {
+ 		      /* Try to convert to GE/LT, unless that would be more
+ 			 expensive.  */
+ 		      if (!arm_const_double_by_immediates (GEN_INT (i + 1))
+ 			  && arm_const_double_prefer_rsbs_rsc (*op1))
+ 			return;
  		      *op1 = GEN_INT (i + 1);
  		      *code = *code == GT ? GE : LT;
  		      return;
  		    }
  		  break;
+ 
  		case GTU:
  		case LEU:
! 		  if (i != ~((unsigned HOST_WIDE_INT) 0))
  		    {
+ 		      /* Try to convert to GEU/LTU, unless that would
+ 			 be more expensive.  */
+ 		      if (!arm_const_double_by_immediates (GEN_INT (i + 1))
+ 			  && arm_const_double_prefer_rsbs_rsc (*op1))
+ 			return;
  		      *op1 = GEN_INT (i + 1);
  		      *code = *code == GTU ? GEU : LTU;
  		      return;
  		    }
  		  break;
+ 
  		default:
  		  gcc_unreachable ();
  		}
  	    }
  
  	  if (!op0_preserve_value)
  	    {
  	      std::swap (*op0, *op1);
*************** arm_libcall_uses_aapcs_base (const_rtx l
*** 5569,5577 ****
        /* Values from double-precision helper functions are returned in core
  	 registers if the selected core only supports single-precision
  	 arithmetic, even if we are using the hard-float ABI.  The same is
! 	 true for single-precision helpers, but we will never be using the
! 	 hard-float ABI on a CPU which doesn't support single-precision
! 	 operations in hardware.  */
        add_libcall (libcall_htab, optab_libfunc (add_optab, DFmode));
        add_libcall (libcall_htab, optab_libfunc (sdiv_optab, DFmode));
        add_libcall (libcall_htab, optab_libfunc (smul_optab, DFmode));
--- 5774,5798 ----
        /* Values from double-precision helper functions are returned in core
  	 registers if the selected core only supports single-precision
  	 arithmetic, even if we are using the hard-float ABI.  The same is
! 	 true for single-precision helpers except in case of MVE, because in
! 	 MVE we will be using the hard-float ABI on a CPU which doesn't support
! 	 single-precision operations in hardware.  In MVE the following check
! 	 enables use of emulation for the single-precision arithmetic
! 	 operations.  */
!       if (TARGET_HAVE_MVE)
! 	{
! 	  add_libcall (libcall_htab, optab_libfunc (add_optab, SFmode));
! 	  add_libcall (libcall_htab, optab_libfunc (sdiv_optab, SFmode));
! 	  add_libcall (libcall_htab, optab_libfunc (smul_optab, SFmode));
! 	  add_libcall (libcall_htab, optab_libfunc (neg_optab, SFmode));
! 	  add_libcall (libcall_htab, optab_libfunc (sub_optab, SFmode));
! 	  add_libcall (libcall_htab, optab_libfunc (eq_optab, SFmode));
! 	  add_libcall (libcall_htab, optab_libfunc (lt_optab, SFmode));
! 	  add_libcall (libcall_htab, optab_libfunc (le_optab, SFmode));
! 	  add_libcall (libcall_htab, optab_libfunc (ge_optab, SFmode));
! 	  add_libcall (libcall_htab, optab_libfunc (gt_optab, SFmode));
! 	  add_libcall (libcall_htab, optab_libfunc (unord_optab, SFmode));
! 	}
        add_libcall (libcall_htab, optab_libfunc (add_optab, DFmode));
        add_libcall (libcall_htab, optab_libfunc (sdiv_optab, DFmode));
        add_libcall (libcall_htab, optab_libfunc (smul_optab, DFmode));
*************** arm_return_in_memory (const_tree type, c
*** 5740,5745 ****
--- 5961,5968 ----
  
        /* Find the first field, ignoring non FIELD_DECL things which will
  	 have been created by C++.  */
+       /* NOTE: This code is deprecated and has not been updated to handle
+ 	 DECL_FIELD_ABI_IGNORED.  */
        for (field = TYPE_FIELDS (type);
  	   field && TREE_CODE (field) != FIELD_DECL;
  	   field = DECL_CHAIN (field))
*************** arm_get_pcs_model (const_tree type, cons
*** 5887,5894 ****
  	     so we are free to use whatever conventions are
  	     appropriate.  */
  	  /* FIXME: remove CONST_CAST_TREE when cgraph is constified.  */
! 	  cgraph_local_info *i = cgraph_node::local_info (CONST_CAST_TREE(decl));
! 	  if (i && i->local)
  	    return ARM_PCS_AAPCS_LOCAL;
  	}
      }
--- 6110,6118 ----
  	     so we are free to use whatever conventions are
  	     appropriate.  */
  	  /* FIXME: remove CONST_CAST_TREE when cgraph is constified.  */
! 	  cgraph_node *local_info_node
! 	    = cgraph_node::local_info_node (CONST_CAST_TREE (decl));
! 	  if (local_info_node && local_info_node->local)
  	    return ARM_PCS_AAPCS_LOCAL;
  	}
      }
*************** aapcs_vfp_cum_init (CUMULATIVE_ARGS *pcu
*** 5911,5923 ****
    pcum->aapcs_vfp_reg_alloc = 0;
  }
  
  /* Walk down the type tree of TYPE counting consecutive base elements.
     If *MODEP is VOIDmode, then set it to the first valid floating point
     type.  If a non-floating point type is found, or if a floating point
     type that doesn't match a non-VOIDmode *MODEP is found, then return -1,
!    otherwise return the count in the sub-tree.  */
  static int
! aapcs_vfp_sub_candidate (const_tree type, machine_mode *modep)
  {
    machine_mode mode;
    HOST_WIDE_INT size;
--- 6135,6176 ----
    pcum->aapcs_vfp_reg_alloc = 0;
  }
  
+ /* Bitmasks that indicate whether earlier versions of GCC would have
+    taken a different path through the ABI logic.  This should result in
+    a -Wpsabi warning if the earlier path led to a different ABI decision.
+ 
+    WARN_PSABI_EMPTY_CXX17_BASE
+       Indicates that the type includes an artificial empty C++17 base field
+       that, prior to GCC 10.1, would prevent the type from being treated as
+       a HFA or HVA.  See PR94711 for details.
+ 
+    WARN_PSABI_NO_UNIQUE_ADDRESS
+       Indicates that the type includes an empty [[no_unique_address]] field
+       that, prior to GCC 10.1, would prevent the type from being treated as
+       a HFA or HVA.  */
+ const unsigned int WARN_PSABI_EMPTY_CXX17_BASE = 1U << 0;
+ const unsigned int WARN_PSABI_NO_UNIQUE_ADDRESS = 1U << 1;
+ 
  /* Walk down the type tree of TYPE counting consecutive base elements.
     If *MODEP is VOIDmode, then set it to the first valid floating point
     type.  If a non-floating point type is found, or if a floating point
     type that doesn't match a non-VOIDmode *MODEP is found, then return -1,
!    otherwise return the count in the sub-tree.
! 
!    The WARN_PSABI_FLAGS argument allows the caller to check whether this
!    function has changed its behavior relative to earlier versions of GCC.
!    Normally the argument should be nonnull and point to a zero-initialized
!    variable.  The function then records whether the ABI decision might
!    be affected by a known fix to the ABI logic, setting the associated
!    WARN_PSABI_* bits if so.
! 
!    When the argument is instead a null pointer, the function tries to
!    simulate the behavior of GCC before all such ABI fixes were made.
!    This is useful to check whether the function returns something
!    different after the ABI fixes.  */
  static int
! aapcs_vfp_sub_candidate (const_tree type, machine_mode *modep,
! 			 unsigned int *warn_psabi_flags)
  {
    machine_mode mode;
    HOST_WIDE_INT size;
*************** aapcs_vfp_sub_candidate (const_tree type
*** 5926,5932 ****
      {
      case REAL_TYPE:
        mode = TYPE_MODE (type);
!       if (mode != DFmode && mode != SFmode && mode != HFmode)
  	return -1;
  
        if (*modep == VOIDmode)
--- 6179,6185 ----
      {
      case REAL_TYPE:
        mode = TYPE_MODE (type);
!       if (mode != DFmode && mode != SFmode && mode != HFmode && mode != BFmode)
  	return -1;
  
        if (*modep == VOIDmode)
*************** aapcs_vfp_sub_candidate (const_tree type
*** 5989,5995 ****
  	    || TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
  	  return -1;
  
! 	count = aapcs_vfp_sub_candidate (TREE_TYPE (type), modep);
  	if (count == -1
  	    || !index
  	    || !TYPE_MAX_VALUE (index)
--- 6242,6249 ----
  	    || TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
  	  return -1;
  
! 	count = aapcs_vfp_sub_candidate (TREE_TYPE (type), modep,
! 					 warn_psabi_flags);
  	if (count == -1
  	    || !index
  	    || !TYPE_MAX_VALUE (index)
*************** aapcs_vfp_sub_candidate (const_tree type
*** 6027,6033 ****
  	    if (TREE_CODE (field) != FIELD_DECL)
  	      continue;
  
! 	    sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep);
  	    if (sub_count < 0)
  	      return -1;
  	    count += sub_count;
--- 6281,6310 ----
  	    if (TREE_CODE (field) != FIELD_DECL)
  	      continue;
  
! 	    if (DECL_FIELD_ABI_IGNORED (field))
! 	      {
! 		/* See whether this is something that earlier versions of
! 		   GCC failed to ignore.  */
! 		unsigned int flag;
! 		if (lookup_attribute ("no_unique_address",
! 				      DECL_ATTRIBUTES (field)))
! 		  flag = WARN_PSABI_NO_UNIQUE_ADDRESS;
! 		else if (cxx17_empty_base_field_p (field))
! 		  flag = WARN_PSABI_EMPTY_CXX17_BASE;
! 		else
! 		  /* No compatibility problem.  */
! 		  continue;
! 
! 		/* Simulate the old behavior when WARN_PSABI_FLAGS is null.  */
! 		if (warn_psabi_flags)
! 		  {
! 		    *warn_psabi_flags |= flag;
! 		    continue;
! 		  }
! 	      }
! 
! 	    sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep,
! 						 warn_psabi_flags);
  	    if (sub_count < 0)
  	      return -1;
  	    count += sub_count;
*************** aapcs_vfp_sub_candidate (const_tree type
*** 6060,6066 ****
  	    if (TREE_CODE (field) != FIELD_DECL)
  	      continue;
  
! 	    sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep);
  	    if (sub_count < 0)
  	      return -1;
  	    count = count > sub_count ? count : sub_count;
--- 6337,6344 ----
  	    if (TREE_CODE (field) != FIELD_DECL)
  	      continue;
  
! 	    sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep,
! 						 warn_psabi_flags);
  	    if (sub_count < 0)
  	      return -1;
  	    count = count > sub_count ? count : sub_count;
*************** use_vfp_abi (enum arm_pcs pcs_variant, b
*** 6103,6109 ****
      return false;
  
    return (TARGET_32BIT && TARGET_HARD_FLOAT &&
! 	  (TARGET_VFP_DOUBLE || !is_double));
  }
  
  /* Return true if an argument whose type is TYPE, or mode is MODE, is
--- 6381,6387 ----
      return false;
  
    return (TARGET_32BIT && TARGET_HARD_FLOAT &&
! 	 (TARGET_VFP_DOUBLE || !is_double));
  }
  
  /* Return true if an argument whose type is TYPE, or mode is MODE, is
*************** aapcs_vfp_is_call_or_return_candidate (e
*** 6122,6131 ****
       out from the mode.  */
    if (type)
      {
!       int ag_count = aapcs_vfp_sub_candidate (type, &new_mode);
! 
        if (ag_count > 0 && ag_count <= 4)
! 	*count = ag_count;
        else
  	return false;
      }
--- 6400,6438 ----
       out from the mode.  */
    if (type)
      {
!       unsigned int warn_psabi_flags = 0;
!       int ag_count = aapcs_vfp_sub_candidate (type, &new_mode,
! 					      &warn_psabi_flags);
        if (ag_count > 0 && ag_count <= 4)
! 	{
! 	  static unsigned last_reported_type_uid;
! 	  unsigned uid = TYPE_UID (TYPE_MAIN_VARIANT (type));
! 	  int alt;
! 	  if (warn_psabi
! 	      && warn_psabi_flags
! 	      && uid != last_reported_type_uid
! 	      && ((alt = aapcs_vfp_sub_candidate (type, &new_mode, NULL))
! 		  != ag_count))
! 	    {
! 	      const char *url
! 		= CHANGES_ROOT_URL "gcc-10/changes.html#empty_base";
! 	      gcc_assert (alt == -1);
! 	      last_reported_type_uid = uid;
! 	      /* Use TYPE_MAIN_VARIANT to strip any redundant const
! 		 qualification.  */
! 	      if (warn_psabi_flags & WARN_PSABI_NO_UNIQUE_ADDRESS)
! 		inform (input_location, "parameter passing for argument of "
! 			"type %qT with %<[[no_unique_address]]%> members "
! 			"changed %{in GCC 10.1%}",
! 			TYPE_MAIN_VARIANT (type), url);
! 	      else if (warn_psabi_flags & WARN_PSABI_EMPTY_CXX17_BASE)
! 		inform (input_location, "parameter passing for argument of "
! 			"type %qT when C++17 is enabled changed to match "
! 			"C++14 %{in GCC 10.1%}",
! 			TYPE_MAIN_VARIANT (type), url);
! 	    }
! 	  *count = ag_count;
! 	}
        else
  	return false;
      }
*************** aapcs_vfp_allocate (CUMULATIVE_ARGS *pcu
*** 6200,6206 ****
        {
  	pcum->aapcs_vfp_reg_alloc = mask << regno;
  	if (mode == BLKmode
! 	    || (mode == TImode && ! TARGET_NEON)
  	    || ! arm_hard_regno_mode_ok (FIRST_VFP_REGNUM + regno, mode))
  	  {
  	    int i;
--- 6507,6513 ----
        {
  	pcum->aapcs_vfp_reg_alloc = mask << regno;
  	if (mode == BLKmode
! 	    || (mode == TImode && ! (TARGET_NEON || TARGET_HAVE_MVE))
  	    || ! arm_hard_regno_mode_ok (FIRST_VFP_REGNUM + regno, mode))
  	  {
  	    int i;
*************** aapcs_vfp_allocate (CUMULATIVE_ARGS *pcu
*** 6208,6214 ****
  	    int rshift = shift;
  	    machine_mode rmode = pcum->aapcs_vfp_rmode;
  	    rtx par;
! 	    if (!TARGET_NEON)
  	      {
  		/* Avoid using unsupported vector modes.  */
  		if (rmode == V2SImode)
--- 6515,6521 ----
  	    int rshift = shift;
  	    machine_mode rmode = pcum->aapcs_vfp_rmode;
  	    rtx par;
! 	    if (!(TARGET_NEON || TARGET_HAVE_MVE))
  	      {
  		/* Avoid using unsupported vector modes.  */
  		if (rmode == V2SImode)
*************** aapcs_vfp_allocate_return_reg (enum arm_
*** 6254,6260 ****
    if (mode == BLKmode
        || (GET_MODE_CLASS (mode) == MODE_INT
  	  && GET_MODE_SIZE (mode) >= GET_MODE_SIZE (TImode)
! 	  && !TARGET_NEON))
      {
        int count;
        machine_mode ag_mode;
--- 6561,6567 ----
    if (mode == BLKmode
        || (GET_MODE_CLASS (mode) == MODE_INT
  	  && GET_MODE_SIZE (mode) >= GET_MODE_SIZE (TImode)
! 	  && !(TARGET_NEON || TARGET_HAVE_MVE)))
      {
        int count;
        machine_mode ag_mode;
*************** aapcs_vfp_allocate_return_reg (enum arm_
*** 6265,6271 ****
        aapcs_vfp_is_call_or_return_candidate (pcs_variant, mode, type,
  					     &ag_mode, &count);
  
!       if (!TARGET_NEON)
  	{
  	  if (ag_mode == V2SImode)
  	    ag_mode = DImode;
--- 6572,6578 ----
        aapcs_vfp_is_call_or_return_candidate (pcs_variant, mode, type,
  					     &ag_mode, &count);
  
!       if (!(TARGET_NEON || TARGET_HAVE_MVE))
  	{
  	  if (ag_mode == V2SImode)
  	    ag_mode = DImode;
*************** arm_needs_doubleword_align (machine_mode
*** 6667,6673 ****
  
    int ret = 0;
    int ret2 = 0;
!   /* Record/aggregate types: Use greatest member alignment of any member.  */
    for (tree field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field))
      if (DECL_ALIGN (field) > PARM_BOUNDARY)
        {
--- 6974,6993 ----
  
    int ret = 0;
    int ret2 = 0;
!   /* Record/aggregate types: Use greatest member alignment of any member.
! 
!      Note that we explicitly consider zero-sized fields here, even though
!      they don't map to AAPCS machine types.  For example, in:
! 
! 	 struct __attribute__((aligned(8))) empty {};
! 
! 	 struct s {
! 	   [[no_unique_address]] empty e;
! 	   int x;
! 	 };
! 
!      "s" contains only one Fundamental Data Type (the int field)
!      but gains 8-byte alignment and size thanks to "e".  */
    for (tree field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field))
      if (DECL_ALIGN (field) > PARM_BOUNDARY)
        {
*************** arm_needs_doubleword_align (machine_mode
*** 6695,6708 ****
     Value is zero to push the argument on the stack,
     or a hard register in which to store the argument.
  
-    MODE is the argument's machine mode.
-    TYPE is the data type of the argument (as a tree).
-     This is null for libcalls where that information may
-     not be available.
     CUM is a variable of type CUMULATIVE_ARGS which gives info about
      the preceding args and about the function being called.
!    NAMED is nonzero if this argument is a named parameter
!     (otherwise it is an extra parameter matching an ellipsis).
  
     On the ARM, normally the first 16 bytes are passed in registers r0-r3; all
     other arguments are passed on the stack.  If (NAMED == 0) (which happens
--- 7015,7023 ----
     Value is zero to push the argument on the stack,
     or a hard register in which to store the argument.
  
     CUM is a variable of type CUMULATIVE_ARGS which gives info about
      the preceding args and about the function being called.
!    ARG is a description of the argument.
  
     On the ARM, normally the first 16 bytes are passed in registers r0-r3; all
     other arguments are passed on the stack.  If (NAMED == 0) (which happens
*************** arm_needs_doubleword_align (machine_mode
*** 6711,6741 ****
     indeed make it pass in the stack if necessary).  */
  
  static rtx
! arm_function_arg (cumulative_args_t pcum_v, machine_mode mode,
! 		  const_tree type, bool named)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
    int nregs;
  
    /* Handle the special case quickly.  Pick an arbitrary value for op2 of
       a call insn (op3 of a call_value insn).  */
!   if (mode == VOIDmode)
      return const0_rtx;
  
    if (pcum->pcs_variant <= ARM_PCS_AAPCS_LOCAL)
      {
!       aapcs_layout_arg (pcum, mode, type, named);
        return pcum->aapcs_reg;
      }
  
    /* Varargs vectors are treated the same as long long.
       named_count avoids having to change the way arm handles 'named' */
    if (TARGET_IWMMXT_ABI
!       && arm_vector_mode_supported_p (mode)
        && pcum->named_count > pcum->nargs + 1)
      {
        if (pcum->iwmmxt_nregs <= 9)
! 	return gen_rtx_REG (mode, pcum->iwmmxt_nregs + FIRST_IWMMXT_REGNUM);
        else
  	{
  	  pcum->can_split = false;
--- 7026,7056 ----
     indeed make it pass in the stack if necessary).  */
  
  static rtx
! arm_function_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
    int nregs;
  
    /* Handle the special case quickly.  Pick an arbitrary value for op2 of
       a call insn (op3 of a call_value insn).  */
!   if (arg.end_marker_p ())
      return const0_rtx;
  
    if (pcum->pcs_variant <= ARM_PCS_AAPCS_LOCAL)
      {
!       aapcs_layout_arg (pcum, arg.mode, arg.type, arg.named);
        return pcum->aapcs_reg;
      }
  
    /* Varargs vectors are treated the same as long long.
       named_count avoids having to change the way arm handles 'named' */
    if (TARGET_IWMMXT_ABI
!       && arm_vector_mode_supported_p (arg.mode)
        && pcum->named_count > pcum->nargs + 1)
      {
        if (pcum->iwmmxt_nregs <= 9)
! 	return gen_rtx_REG (arg.mode,
! 			    pcum->iwmmxt_nregs + FIRST_IWMMXT_REGNUM);
        else
  	{
  	  pcum->can_split = false;
*************** arm_function_arg (cumulative_args_t pcum
*** 6746,6761 ****
    /* Put doubleword aligned quantities in even register pairs.  */
    if ((pcum->nregs & 1) && ARM_DOUBLEWORD_ALIGN)
      {
!       int res = arm_needs_doubleword_align (mode, type);
        if (res < 0 && warn_psabi)
  	inform (input_location, "parameter passing for argument of type "
! 		"%qT changed in GCC 7.1", type);
        else if (res > 0)
  	{
  	  pcum->nregs++;
  	  if (res > 1 && warn_psabi)
  	    inform (input_location, "parameter passing for argument of type "
! 		    "%qT changed in GCC 9.1", type);
  	}
      }
  
--- 7061,7076 ----
    /* Put doubleword aligned quantities in even register pairs.  */
    if ((pcum->nregs & 1) && ARM_DOUBLEWORD_ALIGN)
      {
!       int res = arm_needs_doubleword_align (arg.mode, arg.type);
        if (res < 0 && warn_psabi)
  	inform (input_location, "parameter passing for argument of type "
! 		"%qT changed in GCC 7.1", arg.type);
        else if (res > 0)
  	{
  	  pcum->nregs++;
  	  if (res > 1 && warn_psabi)
  	    inform (input_location, "parameter passing for argument of type "
! 		    "%qT changed in GCC 9.1", arg.type);
  	}
      }
  
*************** arm_function_arg (cumulative_args_t pcum
*** 6765,6776 ****
    if (pcum->can_split)
      nregs = 1;
    else
!     nregs = ARM_NUM_REGS2 (mode, type);
  
!   if (!named || pcum->nregs + nregs > NUM_ARG_REGS)
      return NULL_RTX;
  
!   return gen_rtx_REG (mode, pcum->nregs);
  }
  
  static unsigned int
--- 7080,7091 ----
    if (pcum->can_split)
      nregs = 1;
    else
!     nregs = ARM_NUM_REGS2 (arg.mode, arg.type);
  
!   if (!arg.named || pcum->nregs + nregs > NUM_ARG_REGS)
      return NULL_RTX;
  
!   return gen_rtx_REG (arg.mode, pcum->nregs);
  }
  
  static unsigned int
*************** arm_function_arg_boundary (machine_mode
*** 6791,6837 ****
  }
  
  static int
! arm_arg_partial_bytes (cumulative_args_t pcum_v, machine_mode mode,
! 		       tree type, bool named)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
    int nregs = pcum->nregs;
  
    if (pcum->pcs_variant <= ARM_PCS_AAPCS_LOCAL)
      {
!       aapcs_layout_arg (pcum, mode, type, named);
        return pcum->aapcs_partial;
      }
  
!   if (TARGET_IWMMXT_ABI && arm_vector_mode_supported_p (mode))
      return 0;
  
    if (NUM_ARG_REGS > nregs
!       && (NUM_ARG_REGS < nregs + ARM_NUM_REGS2 (mode, type))
        && pcum->can_split)
      return (NUM_ARG_REGS - nregs) * UNITS_PER_WORD;
  
    return 0;
  }
  
! /* Update the data in PCUM to advance over an argument
!    of mode MODE and data type TYPE.
!    (TYPE is null for libcalls where that information may not be available.)  */
  
  static void
! arm_function_arg_advance (cumulative_args_t pcum_v, machine_mode mode,
! 			  const_tree type, bool named)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
  
    if (pcum->pcs_variant <= ARM_PCS_AAPCS_LOCAL)
      {
!       aapcs_layout_arg (pcum, mode, type, named);
  
        if (pcum->aapcs_cprc_slot >= 0)
  	{
! 	  aapcs_cp_arg_layout[pcum->aapcs_cprc_slot].advance (pcum, mode,
! 							      type);
  	  pcum->aapcs_cprc_slot = -1;
  	}
  
--- 7106,7149 ----
  }
  
  static int
! arm_arg_partial_bytes (cumulative_args_t pcum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
    int nregs = pcum->nregs;
  
    if (pcum->pcs_variant <= ARM_PCS_AAPCS_LOCAL)
      {
!       aapcs_layout_arg (pcum, arg.mode, arg.type, arg.named);
        return pcum->aapcs_partial;
      }
  
!   if (TARGET_IWMMXT_ABI && arm_vector_mode_supported_p (arg.mode))
      return 0;
  
    if (NUM_ARG_REGS > nregs
!       && (NUM_ARG_REGS < nregs + ARM_NUM_REGS2 (arg.mode, arg.type))
        && pcum->can_split)
      return (NUM_ARG_REGS - nregs) * UNITS_PER_WORD;
  
    return 0;
  }
  
! /* Update the data in PCUM to advance over argument ARG.  */
  
  static void
! arm_function_arg_advance (cumulative_args_t pcum_v,
! 			  const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
  
    if (pcum->pcs_variant <= ARM_PCS_AAPCS_LOCAL)
      {
!       aapcs_layout_arg (pcum, arg.mode, arg.type, arg.named);
  
        if (pcum->aapcs_cprc_slot >= 0)
  	{
! 	  aapcs_cp_arg_layout[pcum->aapcs_cprc_slot].advance (pcum, arg.mode,
! 							      arg.type);
  	  pcum->aapcs_cprc_slot = -1;
  	}
  
*************** arm_function_arg_advance (cumulative_arg
*** 6844,6855 ****
    else
      {
        pcum->nargs += 1;
!       if (arm_vector_mode_supported_p (mode)
  	  && pcum->named_count > pcum->nargs
  	  && TARGET_IWMMXT_ABI)
  	pcum->iwmmxt_nregs += 1;
        else
! 	pcum->nregs += ARM_NUM_REGS2 (mode, type);
      }
  }
  
--- 7156,7167 ----
    else
      {
        pcum->nargs += 1;
!       if (arm_vector_mode_supported_p (arg.mode)
  	  && pcum->named_count > pcum->nargs
  	  && TARGET_IWMMXT_ABI)
  	pcum->iwmmxt_nregs += 1;
        else
! 	pcum->nregs += ARM_NUM_REGS2 (arg.mode, arg.type);
      }
  }
  
*************** arm_function_arg_advance (cumulative_arg
*** 6857,6867 ****
     extension to the ARM ABI.  */
  
  static bool
! arm_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
! 		       machine_mode mode ATTRIBUTE_UNUSED,
! 		       const_tree type, bool named ATTRIBUTE_UNUSED)
  {
!   return type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST;
  }
  
  /* Encode the current state of the #pragma [no_]long_calls.  */
--- 7169,7177 ----
     extension to the ARM ABI.  */
  
  static bool
! arm_pass_by_reference (cumulative_args_t, const function_arg_info &arg)
  {
!   return arg.type && TREE_CODE (TYPE_SIZE (arg.type)) != INTEGER_CST;
  }
  
  /* Encode the current state of the #pragma [no_]long_calls.  */
*************** cmse_func_args_or_return_in_stack (tree
*** 7030,7046 ****
    FOREACH_FUNCTION_ARGS (fntype, arg_type, args_iter)
      {
        rtx arg_rtx;
-       machine_mode arg_mode = TYPE_MODE (arg_type);
  
        prev_arg_type = arg_type;
        if (VOID_TYPE_P (arg_type))
  	continue;
  
        if (!first_param)
! 	arm_function_arg_advance (args_so_far, arg_mode, arg_type, true);
!       arg_rtx = arm_function_arg (args_so_far, arg_mode, arg_type, true);
!       if (!arg_rtx
! 	  || arm_arg_partial_bytes (args_so_far, arg_mode, arg_type, true))
  	{
  	  error ("%qE attribute not available to functions with arguments "
  		 "passed on the stack", name);
--- 7340,7357 ----
    FOREACH_FUNCTION_ARGS (fntype, arg_type, args_iter)
      {
        rtx arg_rtx;
  
        prev_arg_type = arg_type;
        if (VOID_TYPE_P (arg_type))
  	continue;
  
+       function_arg_info arg (arg_type, /*named=*/true);
        if (!first_param)
! 	/* ??? We should advance after processing the argument and pass
! 	   the argument we're advancing past.  */
! 	arm_function_arg_advance (args_so_far, arg);
!       arg_rtx = arm_function_arg (args_so_far, arg);
!       if (!arg_rtx || arm_arg_partial_bytes (args_so_far, arg))
  	{
  	  error ("%qE attribute not available to functions with arguments "
  		 "passed on the stack", name);
*************** arm_function_ok_for_sibcall (tree decl,
*** 7332,7337 ****
--- 7643,7657 ----
    if (cfun->machine->sibcall_blocked)
      return false;
  
+   if (TARGET_FDPIC)
+     {
+       /* In FDPIC, never tailcall something for which we have no decl:
+ 	 the target function could be in a different module, requiring
+ 	 a different FDPIC register value.  */
+       if (decl == NULL)
+ 	return false;
+     }
+ 
    /* Never tailcall something if we are generating code for Thumb-1.  */
    if (TARGET_THUMB1)
      return false;
*************** arm_function_ok_for_sibcall (tree decl,
*** 7424,7433 ****
  	{
  	  tree type = TREE_VALUE (t);
  	  if (!VOID_TYPE_P (type))
! 	    arm_function_arg_advance (cum_v, TYPE_MODE (type), type, true);
  	}
  
!       if (!arm_function_arg (cum_v, SImode, integer_type_node, true))
  	return false;
      }
  
--- 7744,7757 ----
  	{
  	  tree type = TREE_VALUE (t);
  	  if (!VOID_TYPE_P (type))
! 	    {
! 	      function_arg_info arg (type, /*named=*/true);
! 	      arm_function_arg_advance (cum_v, arg);
! 	    }
  	}
  
!       function_arg_info arg (integer_type_node, /*named=*/true);
!       if (!arm_function_arg (cum_v, arg))
  	return false;
      }
  
*************** require_pic_register (rtx pic_reg, bool
*** 7538,7543 ****
--- 7862,7885 ----
      }
  }
  
+ /* Generate insns to calculate the address of ORIG in pic mode.  */
+ static rtx_insn *
+ calculate_pic_address_constant (rtx reg, rtx pic_reg, rtx orig)
+ {
+   rtx pat;
+   rtx mem;
+ 
+   pat = gen_calculate_pic_address (reg, pic_reg, orig);
+ 
+   /* Make the MEM as close to a constant as possible.  */
+   mem = SET_SRC (pat);
+   gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem));
+   MEM_READONLY_P (mem) = 1;
+   MEM_NOTRAP_P (mem) = 1;
+ 
+   return emit_insn (pat);
+ }
+ 
  /* Legitimize PIC load to ORIG into REG.  If REG is NULL, a new pseudo is
     created to hold the result of the load.  If not NULL, PIC_REG indicates
     which register to use as PIC register, otherwise it is decided by register
*************** legitimize_pic_address (rtx orig, machin
*** 7576,7605 ****
  	   || (GET_CODE (orig) == SYMBOL_REF
  	       && SYMBOL_REF_LOCAL_P (orig)
  	       && (SYMBOL_REF_DECL (orig)
! 		   ? !DECL_WEAK (SYMBOL_REF_DECL (orig)) : 1)))
  	  && NEED_GOT_RELOC
  	  && arm_pic_data_is_text_relative)
  	insn = arm_pic_static_addr (orig, reg);
        else
  	{
- 	  rtx pat;
- 	  rtx mem;
- 
  	  /* If this function doesn't have a pic register, create one now.  */
  	  require_pic_register (pic_reg, compute_now);
  
  	  if (pic_reg == NULL_RTX)
  	    pic_reg = cfun->machine->pic_reg;
  
! 	  pat = gen_calculate_pic_address (reg, pic_reg, orig);
! 
! 	  /* Make the MEM as close to a constant as possible.  */
! 	  mem = SET_SRC (pat);
! 	  gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem));
! 	  MEM_READONLY_P (mem) = 1;
! 	  MEM_NOTRAP_P (mem) = 1;
! 
! 	  insn = emit_insn (pat);
  	}
  
        /* Put a REG_EQUAL note on this insn, so that it can be optimized
--- 7918,7938 ----
  	   || (GET_CODE (orig) == SYMBOL_REF
  	       && SYMBOL_REF_LOCAL_P (orig)
  	       && (SYMBOL_REF_DECL (orig)
! 		   ? !DECL_WEAK (SYMBOL_REF_DECL (orig)) : 1)
! 	       && (!SYMBOL_REF_FUNCTION_P (orig)
! 		   || arm_fdpic_local_funcdesc_p (orig))))
  	  && NEED_GOT_RELOC
  	  && arm_pic_data_is_text_relative)
  	insn = arm_pic_static_addr (orig, reg);
        else
  	{
  	  /* If this function doesn't have a pic register, create one now.  */
  	  require_pic_register (pic_reg, compute_now);
  
  	  if (pic_reg == NULL_RTX)
  	    pic_reg = cfun->machine->pic_reg;
  
! 	  insn = calculate_pic_address_constant (reg, pic_reg, orig);
  	}
  
        /* Put a REG_EQUAL note on this insn, so that it can be optimized
*************** legitimize_pic_address (rtx orig, machin
*** 7675,7680 ****
--- 8008,8048 ----
  }
  
  
+ /* Whether a register is callee saved or not.  This is necessary because high
+    registers are marked as caller saved when optimizing for size on Thumb-1
+    targets despite being callee saved in order to avoid using them.  */
+ #define callee_saved_reg_p(reg) \
+   (!call_used_or_fixed_reg_p (reg) \
+    || (TARGET_THUMB1 && optimize_size \
+        && reg >= FIRST_HI_REGNUM && reg <= LAST_HI_REGNUM))
+ 
+ /* Return a mask for the call-clobbered low registers that are unused
+    at the end of the prologue.  */
+ static unsigned long
+ thumb1_prologue_unused_call_clobbered_lo_regs (void)
+ {
+   unsigned long mask = 0;
+   bitmap prologue_live_out = df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun));
+ 
+   for (int reg = FIRST_LO_REGNUM; reg <= LAST_LO_REGNUM; reg++)
+     if (!callee_saved_reg_p (reg) && !REGNO_REG_SET_P (prologue_live_out, reg))
+       mask |= 1 << (reg - FIRST_LO_REGNUM);
+   return mask;
+ }
+ 
+ /* Similarly for the start of the epilogue.  */
+ static unsigned long
+ thumb1_epilogue_unused_call_clobbered_lo_regs (void)
+ {
+   unsigned long mask = 0;
+   bitmap epilogue_live_in = df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun));
+ 
+   for (int reg = FIRST_LO_REGNUM; reg <= LAST_LO_REGNUM; reg++)
+     if (!callee_saved_reg_p (reg) && !REGNO_REG_SET_P (epilogue_live_in, reg))
+       mask |= 1 << (reg - FIRST_LO_REGNUM);
+   return mask;
+ }
+ 
  /* Find a spare register to use during the prolog of a function.  */
  
  static int
*************** thumb_find_work_register (unsigned long
*** 7682,7726 ****
  {
    int reg;
  
    /* Check the argument registers first as these are call-used.  The
       register allocation order means that sometimes r3 might be used
       but earlier argument registers might not, so check them all.  */
!   for (reg = LAST_ARG_REGNUM; reg >= 0; reg --)
!     if (!df_regs_ever_live_p (reg))
        return reg;
  
-   /* Before going on to check the call-saved registers we can try a couple
-      more ways of deducing that r3 is available.  The first is when we are
-      pushing anonymous arguments onto the stack and we have less than 4
-      registers worth of fixed arguments(*).  In this case r3 will be part of
-      the variable argument list and so we can be sure that it will be
-      pushed right at the start of the function.  Hence it will be available
-      for the rest of the prologue.
-      (*): ie crtl->args.pretend_args_size is greater than 0.  */
-   if (cfun->machine->uses_anonymous_args
-       && crtl->args.pretend_args_size > 0)
-     return LAST_ARG_REGNUM;
- 
-   /* The other case is when we have fixed arguments but less than 4 registers
-      worth.  In this case r3 might be used in the body of the function, but
-      it is not being used to convey an argument into the function.  In theory
-      we could just check crtl->args.size to see how many bytes are
-      being passed in argument registers, but it seems that it is unreliable.
-      Sometimes it will have the value 0 when in fact arguments are being
-      passed.  (See testcase execute/20021111-1.c for an example).  So we also
-      check the args_info.nregs field as well.  The problem with this field is
-      that it makes no allowances for arguments that are passed to the
-      function but which are not used.  Hence we could miss an opportunity
-      when a function has an unused argument in r3.  But it is better to be
-      safe than to be sorry.  */
-   if (! cfun->machine->uses_anonymous_args
-       && crtl->args.size >= 0
-       && crtl->args.size <= (LAST_ARG_REGNUM * UNITS_PER_WORD)
-       && (TARGET_AAPCS_BASED
- 	  ? crtl->args.info.aapcs_ncrn < 4
- 	  : crtl->args.info.nregs < 4))
-     return LAST_ARG_REGNUM;
- 
    /* Otherwise look for a call-saved register that is going to be pushed.  */
    for (reg = LAST_LO_REGNUM; reg > LAST_ARG_REGNUM; reg --)
      if (pushed_regs_mask & (1 << reg))
--- 8050,8065 ----
  {
    int reg;
  
+   unsigned long unused_regs
+     = thumb1_prologue_unused_call_clobbered_lo_regs ();
+ 
    /* Check the argument registers first as these are call-used.  The
       register allocation order means that sometimes r3 might be used
       but earlier argument registers might not, so check them all.  */
!   for (reg = LAST_LO_REGNUM; reg >= FIRST_LO_REGNUM; reg--)
!     if (unused_regs & (1 << (reg - FIRST_LO_REGNUM)))
        return reg;
  
    /* Otherwise look for a call-saved register that is going to be pushed.  */
    for (reg = LAST_LO_REGNUM; reg > LAST_ARG_REGNUM; reg --)
      if (pushed_regs_mask & (1 << reg))
*************** arm_load_pic_register (unsigned long sav
*** 7748,7754 ****
  {
    rtx l1, labelno, pic_tmp, pic_rtx;
  
!   if (crtl->uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE)
      return;
  
    gcc_assert (flag_pic);
--- 8087,8095 ----
  {
    rtx l1, labelno, pic_tmp, pic_rtx;
  
!   if (crtl->uses_pic_offset_table == 0
!       || TARGET_SINGLE_PIC_BASE
!       || TARGET_FDPIC)
      return;
  
    gcc_assert (flag_pic);
*************** arm_load_pic_register (unsigned long sav
*** 7817,7844 ****
    emit_use (pic_reg);
  }
  
  /* Generate code to load the address of a static var when flag_pic is set.  */
  static rtx_insn *
  arm_pic_static_addr (rtx orig, rtx reg)
  {
    rtx l1, labelno, offset_rtx;
  
    gcc_assert (flag_pic);
  
!   /* We use an UNSPEC rather than a LABEL_REF because this label
!      never appears in the code stream.  */
!   labelno = GEN_INT (pic_labelno++);
!   l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
!   l1 = gen_rtx_CONST (VOIDmode, l1);
  
!   /* On the ARM the PC register contains 'dot + 8' at the time of the
!      addition, on the Thumb it is 'dot + 4'.  */
!   offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
!   offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
!                                UNSPEC_SYMBOL_OFFSET);
!   offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
  
!   return emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno));
  }
  
  /* Return nonzero if X is valid as an ARM state addressing register.  */
--- 8158,8285 ----
    emit_use (pic_reg);
  }
  
+ /* Try to determine whether an object, referenced via ORIG, will be
+    placed in the text or data segment.  This is used in FDPIC mode, to
+    decide which relocations to use when accessing ORIG.  *IS_READONLY
+    is set to true if ORIG is a read-only location, false otherwise.
+    Return true if we could determine the location of ORIG, false
+    otherwise.  *IS_READONLY is valid only when we return true.  */
+ static bool
+ arm_is_segment_info_known (rtx orig, bool *is_readonly)
+ {
+   *is_readonly = false;
+ 
+   if (GET_CODE (orig) == LABEL_REF)
+     {
+       *is_readonly = true;
+       return true;
+     }
+ 
+   if (SYMBOL_REF_P (orig))
+     {
+       if (CONSTANT_POOL_ADDRESS_P (orig))
+ 	{
+ 	  *is_readonly = true;
+ 	  return true;
+ 	}
+       if (SYMBOL_REF_LOCAL_P (orig)
+ 	  && !SYMBOL_REF_EXTERNAL_P (orig)
+ 	  && SYMBOL_REF_DECL (orig)
+ 	  && (!DECL_P (SYMBOL_REF_DECL (orig))
+ 	      || !DECL_COMMON (SYMBOL_REF_DECL (orig))))
+ 	{
+ 	  tree decl = SYMBOL_REF_DECL (orig);
+ 	  tree init = (TREE_CODE (decl) == VAR_DECL)
+ 	    ? DECL_INITIAL (decl) : (TREE_CODE (decl) == CONSTRUCTOR)
+ 	    ? decl : 0;
+ 	  int reloc = 0;
+ 	  bool named_section, readonly;
+ 
+ 	  if (init && init != error_mark_node)
+ 	    reloc = compute_reloc_for_constant (init);
+ 
+ 	  named_section = TREE_CODE (decl) == VAR_DECL
+ 	    && lookup_attribute ("section", DECL_ATTRIBUTES (decl));
+ 	  readonly = decl_readonly_section (decl, reloc);
+ 
+ 	  /* We don't know where the link script will put a named
+ 	     section, so return false in such a case.  */
+ 	  if (named_section)
+ 	    return false;
+ 
+ 	  *is_readonly = readonly;
+ 	  return true;
+ 	}
+ 
+       /* We don't know.  */
+       return false;
+     }
+ 
+   gcc_unreachable ();
+ }
+ 
  /* Generate code to load the address of a static var when flag_pic is set.  */
  static rtx_insn *
  arm_pic_static_addr (rtx orig, rtx reg)
  {
    rtx l1, labelno, offset_rtx;
+   rtx_insn *insn;
  
    gcc_assert (flag_pic);
  
!   bool is_readonly = false;
!   bool info_known = false;
  
!   if (TARGET_FDPIC
!       && SYMBOL_REF_P (orig)
!       && !SYMBOL_REF_FUNCTION_P (orig))
!     info_known = arm_is_segment_info_known (orig, &is_readonly);
  
!   if (TARGET_FDPIC
!       && SYMBOL_REF_P (orig)
!       && !SYMBOL_REF_FUNCTION_P (orig)
!       && !info_known)
!     {
!       /* We don't know where orig is stored, so we have be
! 	 pessimistic and use a GOT relocation.  */
!       rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
! 
!       insn = calculate_pic_address_constant (reg, pic_reg, orig);
!     }
!   else if (TARGET_FDPIC
! 	   && SYMBOL_REF_P (orig)
! 	   && (SYMBOL_REF_FUNCTION_P (orig)
! 	       || !is_readonly))
!     {
!       /* We use the GOTOFF relocation.  */
!       rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
! 
!       rtx l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_PIC_SYM);
!       emit_insn (gen_movsi (reg, l1));
!       insn = emit_insn (gen_addsi3 (reg, reg, pic_reg));
!     }
!   else
!     {
!       /* Not FDPIC, not SYMBOL_REF_P or readonly: we can use
! 	 PC-relative access.  */
!       /* We use an UNSPEC rather than a LABEL_REF because this label
! 	 never appears in the code stream.  */
!       labelno = GEN_INT (pic_labelno++);
!       l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
!       l1 = gen_rtx_CONST (VOIDmode, l1);
! 
!       /* On the ARM the PC register contains 'dot + 8' at the time of the
! 	 addition, on the Thumb it is 'dot + 4'.  */
!       offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
!       offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
! 				   UNSPEC_SYMBOL_OFFSET);
!       offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
! 
!       insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx,
! 						   labelno));
!     }
! 
!   return insn;
  }
  
  /* Return nonzero if X is valid as an ARM state addressing register.  */
*************** thumb2_legitimate_address_p (machine_mod
*** 8043,8049 ****
  		   && CONST_INT_P (XEXP (XEXP (x, 0), 1)))))
      return 1;
  
!   else if (mode == TImode || (TARGET_NEON && VALID_NEON_STRUCT_MODE (mode)))
      return 0;
  
    else if (code == PLUS)
--- 8484,8492 ----
  		   && CONST_INT_P (XEXP (XEXP (x, 0), 1)))))
      return 1;
  
!   else if (mode == TImode
! 	   || (TARGET_NEON && VALID_NEON_STRUCT_MODE (mode))
! 	   || (TARGET_HAVE_MVE && VALID_MVE_STRUCT_MODE (mode)))
      return 0;
  
    else if (code == PLUS)
*************** thumb2_legitimate_index_p (machine_mode
*** 8203,8209 ****
  
    /* ??? Combine arm and thumb2 coprocessor addressing modes.  */
    /* Standard coprocessor addressing modes.  */
!   if (TARGET_HARD_FLOAT
        && (mode == SFmode || mode == DFmode))
      return (code == CONST_INT && INTVAL (index) < 1024
  	    /* Thumb-2 allows only > -256 index range for it's core register
--- 8646,8652 ----
  
    /* ??? Combine arm and thumb2 coprocessor addressing modes.  */
    /* Standard coprocessor addressing modes.  */
!   if (TARGET_VFP_BASE
        && (mode == SFmode || mode == DFmode))
      return (code == CONST_INT && INTVAL (index) < 1024
  	    /* Thumb-2 allows only > -256 index range for it's core register
*************** arm_load_tp (rtx target)
*** 8523,8529 ****
  
        rtx tmp;
  
!       emit_insn (gen_load_tp_soft ());
  
        tmp = gen_rtx_REG (SImode, R0_REGNUM);
        emit_move_insn (target, tmp);
--- 8966,8983 ----
  
        rtx tmp;
  
!       if (TARGET_FDPIC)
! 	{
! 	  rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
! 	  rtx initial_fdpic_reg = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
! 
! 	  emit_insn (gen_load_tp_soft_fdpic ());
! 
! 	  /* Restore r9.  */
! 	  emit_insn (gen_restore_pic_register_after_call(fdpic_reg, initial_fdpic_reg));
! 	}
!       else
! 	emit_insn (gen_load_tp_soft ());
  
        tmp = gen_rtx_REG (SImode, R0_REGNUM);
        emit_move_insn (target, tmp);
*************** load_tls_operand (rtx x, rtx reg)
*** 8549,8570 ****
  static rtx_insn *
  arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
  {
!   rtx label, labelno, sum;
  
    gcc_assert (reloc != TLS_DESCSEQ);
    start_sequence ();
  
!   labelno = GEN_INT (pic_labelno++);
!   label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
!   label = gen_rtx_CONST (VOIDmode, label);
  
!   sum = gen_rtx_UNSPEC (Pmode,
! 			gen_rtvec (4, x, GEN_INT (reloc), label,
! 				   GEN_INT (TARGET_ARM ? 8 : 4)),
! 			UNSPEC_TLS);
    reg = load_tls_operand (sum, reg);
  
!   if (TARGET_ARM)
      emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
    else
      emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
--- 9003,9035 ----
  static rtx_insn *
  arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
  {
!   rtx label, labelno = NULL_RTX, sum;
  
    gcc_assert (reloc != TLS_DESCSEQ);
    start_sequence ();
  
!   if (TARGET_FDPIC)
!     {
!       sum = gen_rtx_UNSPEC (Pmode,
! 			    gen_rtvec (2, x, GEN_INT (reloc)),
! 			    UNSPEC_TLS);
!     }
!   else
!     {
!       labelno = GEN_INT (pic_labelno++);
!       label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
!       label = gen_rtx_CONST (VOIDmode, label);
  
!       sum = gen_rtx_UNSPEC (Pmode,
! 			    gen_rtvec (4, x, GEN_INT (reloc), label,
! 				       GEN_INT (TARGET_ARM ? 8 : 4)),
! 			    UNSPEC_TLS);
!     }
    reg = load_tls_operand (sum, reg);
  
!   if (TARGET_FDPIC)
!       emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode, FDPIC_REGNUM)));
!   else if (TARGET_ARM)
      emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
    else
      emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
*************** arm_tls_descseq_addr (rtx x, rtx reg)
*** 8602,8607 ****
--- 9067,9073 ----
    return reg;
  }
  
+ 
  rtx
  legitimize_tls_address (rtx x, rtx reg)
  {
*************** legitimize_tls_address (rtx x, rtx reg)
*** 8614,8619 ****
--- 9080,9087 ----
      case TLS_MODEL_GLOBAL_DYNAMIC:
        if (TARGET_GNU2_TLS)
  	{
+ 	  gcc_assert (!TARGET_FDPIC);
+ 
  	  reg = arm_tls_descseq_addr (x, reg);
  
  	  tp = arm_load_tp (NULL_RTX);
*************** legitimize_tls_address (rtx x, rtx reg)
*** 8623,8629 ****
        else
  	{
  	  /* Original scheme */
! 	  insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
  	  dest = gen_reg_rtx (Pmode);
  	  emit_libcall_block (insns, dest, ret, x);
  	}
--- 9091,9100 ----
        else
  	{
  	  /* Original scheme */
! 	  if (TARGET_FDPIC)
! 	    insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32_FDPIC);
! 	  else
! 	    insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
  	  dest = gen_reg_rtx (Pmode);
  	  emit_libcall_block (insns, dest, ret, x);
  	}
*************** legitimize_tls_address (rtx x, rtx reg)
*** 8632,8637 ****
--- 9103,9110 ----
      case TLS_MODEL_LOCAL_DYNAMIC:
        if (TARGET_GNU2_TLS)
  	{
+ 	  gcc_assert (!TARGET_FDPIC);
+ 
  	  reg = arm_tls_descseq_addr (x, reg);
  
  	  tp = arm_load_tp (NULL_RTX);
*************** legitimize_tls_address (rtx x, rtx reg)
*** 8640,8646 ****
  	}
        else
  	{
! 	  insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
  
  	  /* Attach a unique REG_EQUIV, to allow the RTL optimizers to
  	     share the LDM result with other LD model accesses.  */
--- 9113,9122 ----
  	}
        else
  	{
! 	  if (TARGET_FDPIC)
! 	    insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32_FDPIC);
! 	  else
! 	    insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
  
  	  /* Attach a unique REG_EQUIV, to allow the RTL optimizers to
  	     share the LDM result with other LD model accesses.  */
*************** legitimize_tls_address (rtx x, rtx reg)
*** 8659,8681 ****
        return dest;
  
      case TLS_MODEL_INITIAL_EXEC:
!       labelno = GEN_INT (pic_labelno++);
!       label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
!       label = gen_rtx_CONST (VOIDmode, label);
!       sum = gen_rtx_UNSPEC (Pmode,
! 			    gen_rtvec (4, x, GEN_INT (TLS_IE32), label,
! 				       GEN_INT (TARGET_ARM ? 8 : 4)),
! 			    UNSPEC_TLS);
!       reg = load_tls_operand (sum, reg);
! 
!       if (TARGET_ARM)
! 	emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
!       else if (TARGET_THUMB2)
! 	emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));
        else
  	{
! 	  emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
! 	  emit_move_insn (reg, gen_const_mem (SImode, reg));
  	}
  
        tp = arm_load_tp (NULL_RTX);
--- 9135,9169 ----
        return dest;
  
      case TLS_MODEL_INITIAL_EXEC:
!       if (TARGET_FDPIC)
! 	{
! 	  sum = gen_rtx_UNSPEC (Pmode,
! 				gen_rtvec (2, x, GEN_INT (TLS_IE32_FDPIC)),
! 				UNSPEC_TLS);
! 	  reg = load_tls_operand (sum, reg);
! 	  emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode, FDPIC_REGNUM)));
! 	  emit_move_insn (reg, gen_rtx_MEM (Pmode, reg));
! 	}
        else
  	{
! 	  labelno = GEN_INT (pic_labelno++);
! 	  label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
! 	  label = gen_rtx_CONST (VOIDmode, label);
! 	  sum = gen_rtx_UNSPEC (Pmode,
! 				gen_rtvec (4, x, GEN_INT (TLS_IE32), label,
! 					   GEN_INT (TARGET_ARM ? 8 : 4)),
! 				UNSPEC_TLS);
! 	  reg = load_tls_operand (sum, reg);
! 
! 	  if (TARGET_ARM)
! 	    emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
! 	  else if (TARGET_THUMB2)
! 	    emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));
! 	  else
! 	    {
! 	      emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
! 	      emit_move_insn (reg, gen_const_mem (SImode, reg));
! 	    }
  	}
  
        tp = arm_load_tp (NULL_RTX);
*************** arm_legitimize_address (rtx x, rtx orig_
*** 8728,8740 ****
  	return x;
      }
  
!   if (!TARGET_ARM)
!     {
!       /* TODO: legitimize_address for Thumb2.  */
!       if (TARGET_THUMB2)
!         return x;
!       return thumb_legitimize_address (x, orig_x, mode);
!     }
  
    if (GET_CODE (x) == PLUS)
      {
--- 9216,9223 ----
  	return x;
      }
  
!   if (TARGET_THUMB1)
!     return thumb_legitimize_address (x, orig_x, mode);
  
    if (GET_CODE (x) == PLUS)
      {
*************** arm_legitimize_address (rtx x, rtx orig_
*** 8810,8826 ****
        HOST_WIDE_INT mask, base, index;
        rtx base_reg;
  
!       /* ldr and ldrb can use a 12-bit index, ldrsb and the rest can only
!          use a 8-bit index. So let's use a 12-bit index for SImode only and
!          hope that arm_gen_constant will enable ldrb to use more bits. */
        bits = (mode == SImode) ? 12 : 8;
        mask = (1 << bits) - 1;
        base = INTVAL (x) & ~mask;
        index = INTVAL (x) & mask;
!       if (bit_count (base & 0xffffffff) > (32 - bits)/2)
!         {
! 	  /* It'll most probably be more efficient to generate the base
! 	     with more bits set and use a negative index instead. */
  	  base |= mask;
  	  index -= mask;
  	}
--- 9293,9312 ----
        HOST_WIDE_INT mask, base, index;
        rtx base_reg;
  
!       /* LDR and LDRB can use a 12-bit index, ldrsb and the rest can
! 	 only use a 8-bit index. So let's use a 12-bit index for
! 	 SImode only and hope that arm_gen_constant will enable LDRB
! 	 to use more bits. */
        bits = (mode == SImode) ? 12 : 8;
        mask = (1 << bits) - 1;
        base = INTVAL (x) & ~mask;
        index = INTVAL (x) & mask;
!       if (TARGET_ARM && bit_count (base & 0xffffffff) > (32 - bits)/2)
! 	{
! 	  /* It'll most probably be more efficient to generate the
! 	     base with more bits set and use a negative index instead.
! 	     Don't do this for Thumb as negative offsets are much more
! 	     limited.  */
  	  base |= mask;
  	  index -= mask;
  	}
*************** thumb1_size_rtx_costs (rtx x, enum rtx_c
*** 9307,9312 ****
--- 9793,9812 ----
      }
  }
  
+ /* Helper function for arm_rtx_costs.  If one operand of the OP, a
+    PLUS, adds the carry flag, then return the other operand.  If
+    neither is a carry, return OP unchanged.  */
+ static rtx
+ strip_carry_operation (rtx op)
+ {
+   gcc_assert (GET_CODE (op) == PLUS);
+   if (arm_carry_operation (XEXP (op, 0), GET_MODE (op)))
+     return XEXP (op, 1);
+   else if (arm_carry_operation (XEXP (op, 1), GET_MODE (op)))
+     return XEXP (op, 0);
+   return op;
+ }
+ 
  /* Helper function for arm_rtx_costs.  If the operand is a valid shift
     operand, then return the operand that is being shifted.  If the shift
     is not by a constant, then set SHIFT_REG to point to the operand.
*************** arm_rtx_costs_internal (rtx x, enum rtx_
*** 9539,9545 ****
  	  /* Assume that most copies can be done with a single insn,
  	     unless we don't have HW FP, in which case everything
  	     larger than word mode will require two insns.  */
! 	  *cost = COSTS_N_INSNS (((!TARGET_HARD_FLOAT
  				   && GET_MODE_SIZE (mode) > 4)
  				  || mode == DImode)
  				 ? 2 : 1);
--- 10039,10045 ----
  	  /* Assume that most copies can be done with a single insn,
  	     unless we don't have HW FP, in which case everything
  	     larger than word mode will require two insns.  */
! 	  *cost = COSTS_N_INSNS (((!TARGET_VFP_BASE
  				   && GET_MODE_SIZE (mode) > 4)
  				  || mode == DImode)
  				 ? 2 : 1);
*************** arm_rtx_costs_internal (rtx x, enum rtx_
*** 9838,9852 ****
  	  rtx shift_by_reg = NULL;
  	  rtx shift_op;
  	  rtx non_shift_op;
  
! 	  shift_op = shifter_op_p (XEXP (x, 0), &shift_by_reg);
  	  if (shift_op == NULL)
  	    {
! 	      shift_op = shifter_op_p (XEXP (x, 1), &shift_by_reg);
! 	      non_shift_op = XEXP (x, 0);
  	    }
  	  else
! 	    non_shift_op = XEXP (x, 1);
  
  	  if (shift_op != NULL)
  	    {
--- 10338,10390 ----
  	  rtx shift_by_reg = NULL;
  	  rtx shift_op;
  	  rtx non_shift_op;
+ 	  rtx op0 = XEXP (x, 0);
+ 	  rtx op1 = XEXP (x, 1);
  
! 	  /* Factor out any borrow operation.  There's more than one way
! 	     of expressing this; try to recognize them all.  */
! 	  if (GET_CODE (op0) == MINUS)
! 	    {
! 	      if (arm_borrow_operation (op1, SImode))
! 		{
! 		  op1 = XEXP (op0, 1);
! 		  op0 = XEXP (op0, 0);
! 		}
! 	      else if (arm_borrow_operation (XEXP (op0, 1), SImode))
! 		op0 = XEXP (op0, 0);
! 	    }
! 	  else if (GET_CODE (op1) == PLUS
! 		   && arm_borrow_operation (XEXP (op1, 0), SImode))
! 	    op1 = XEXP (op1, 0);
! 	  else if (GET_CODE (op0) == NEG
! 		   && arm_borrow_operation (op1, SImode))
! 	    {
! 	      /* Negate with carry-in.  For Thumb2 this is done with
! 		 SBC R, X, X lsl #1 (ie X - 2X - C) as Thumb lacks the
! 		 RSC instruction that exists in Arm mode.  */
! 	      if (speed_p)
! 		*cost += (TARGET_THUMB2
! 			  ? extra_cost->alu.arith_shift
! 			  : extra_cost->alu.arith);
! 	      *cost += rtx_cost (XEXP (op0, 0), mode, MINUS, 0, speed_p);
! 	      return true;
! 	    }
! 	  /* (Carry_op - reg) can be done as RSC Rd, Rn, #1 on Arm.
! 	     Note we do mean ~borrow here.  */
! 	  else if (TARGET_ARM && arm_carry_operation (op0, SImode))
! 	    {
! 	      *cost += rtx_cost (op1, mode, code, 1, speed_p);
! 	      return true;
! 	    }
! 
! 	  shift_op = shifter_op_p (op0, &shift_by_reg);
  	  if (shift_op == NULL)
  	    {
! 	      shift_op = shifter_op_p (op1, &shift_by_reg);
! 	      non_shift_op = op0;
  	    }
  	  else
! 	    non_shift_op = op1;
  
  	  if (shift_op != NULL)
  	    {
*************** arm_rtx_costs_internal (rtx x, enum rtx_
*** 9876,9885 ****
  	      return true;
  	    }
  
! 	  if (CONST_INT_P (XEXP (x, 0)))
  	    {
  	      int insns = arm_gen_constant (MINUS, SImode, NULL_RTX,
! 					    INTVAL (XEXP (x, 0)), NULL_RTX,
  					    NULL_RTX, 1, 0);
  	      *cost = COSTS_N_INSNS (insns);
  	      if (speed_p)
--- 10414,10423 ----
  	      return true;
  	    }
  
! 	  if (CONST_INT_P (op0))
  	    {
  	      int insns = arm_gen_constant (MINUS, SImode, NULL_RTX,
! 					    INTVAL (op0), NULL_RTX,
  					    NULL_RTX, 1, 0);
  	      *cost = COSTS_N_INSNS (insns);
  	      if (speed_p)
*************** arm_rtx_costs_internal (rtx x, enum rtx_
*** 9890,9896 ****
  	  else if (speed_p)
  	    *cost += extra_cost->alu.arith;
  
! 	  return false;
  	}
  
        if (GET_MODE_CLASS (mode) == MODE_INT
--- 10428,10438 ----
  	  else if (speed_p)
  	    *cost += extra_cost->alu.arith;
  
! 	  /* Don't recurse as we don't want to cost any borrow that
! 	     we've stripped.  */
! 	  *cost += rtx_cost (op0, mode, MINUS, 0, speed_p);
! 	  *cost += rtx_cost (op1, mode, MINUS, 1, speed_p);
! 	  return true;
  	}
  
        if (GET_MODE_CLASS (mode) == MODE_INT
*************** arm_rtx_costs_internal (rtx x, enum rtx_
*** 10056,10063 ****
  	      return true;
  	    }
  
  	  shift_reg = NULL;
! 	  shift_op = shifter_op_p (XEXP (x, 0), &shift_reg);
  	  if (shift_op != NULL)
  	    {
  	      if (shift_reg)
--- 10598,10638 ----
  	      return true;
  	    }
  
+ 	  rtx op0 = XEXP (x, 0);
+ 	  rtx op1 = XEXP (x, 1);
+ 
+ 	  /* Handle a side effect of adding in the carry to an addition.  */
+ 	  if (GET_CODE (op0) == PLUS
+ 	      && arm_carry_operation (op1, mode))
+ 	    {
+ 	      op1 = XEXP (op0, 1);
+ 	      op0 = XEXP (op0, 0);
+ 	    }
+ 	  else if (GET_CODE (op1) == PLUS
+ 		   && arm_carry_operation (op0, mode))
+ 	    {
+ 	      op0 = XEXP (op1, 0);
+ 	      op1 = XEXP (op1, 1);
+ 	    }
+ 	  else if (GET_CODE (op0) == PLUS)
+ 	    {
+ 	      op0 = strip_carry_operation (op0);
+ 	      if (swap_commutative_operands_p (op0, op1))
+ 		std::swap (op0, op1);
+ 	    }
+ 
+ 	  if (arm_carry_operation (op0, mode))
+ 	    {
+ 	      /* Adding the carry to a register is a canonicalization of
+ 		 adding 0 to the register plus the carry.  */
+ 	      if (speed_p)
+ 		*cost += extra_cost->alu.arith;
+ 	      *cost += rtx_cost (op1, mode, PLUS, 1, speed_p);
+ 	      return true;
+ 	    }
+ 
  	  shift_reg = NULL;
! 	  shift_op = shifter_op_p (op0, &shift_reg);
  	  if (shift_op != NULL)
  	    {
  	      if (shift_reg)
*************** arm_rtx_costs_internal (rtx x, enum rtx_
*** 10070,10081 ****
  		*cost += extra_cost->alu.arith_shift;
  
  	      *cost += (rtx_cost (shift_op, mode, ASHIFT, 0, speed_p)
! 			+ rtx_cost (XEXP (x, 1), mode, PLUS, 1, speed_p));
  	      return true;
  	    }
! 	  if (GET_CODE (XEXP (x, 0)) == MULT)
  	    {
! 	      rtx mul_op = XEXP (x, 0);
  
  	      if (TARGET_DSP_MULTIPLY
  		  && ((GET_CODE (XEXP (mul_op, 0)) == SIGN_EXTEND
--- 10645,10657 ----
  		*cost += extra_cost->alu.arith_shift;
  
  	      *cost += (rtx_cost (shift_op, mode, ASHIFT, 0, speed_p)
! 			+ rtx_cost (op1, mode, PLUS, 1, speed_p));
  	      return true;
  	    }
! 
! 	  if (GET_CODE (op0) == MULT)
  	    {
! 	      rtx mul_op = op0;
  
  	      if (TARGET_DSP_MULTIPLY
  		  && ((GET_CODE (XEXP (mul_op, 0)) == SIGN_EXTEND
*************** arm_rtx_costs_internal (rtx x, enum rtx_
*** 10099,10105 ****
  				      SIGN_EXTEND, 0, speed_p)
  			    + rtx_cost (XEXP (XEXP (mul_op, 1), 0), mode,
  					SIGN_EXTEND, 0, speed_p)
! 			    + rtx_cost (XEXP (x, 1), mode, PLUS, 1, speed_p));
  		  return true;
  		}
  
--- 10675,10681 ----
  				      SIGN_EXTEND, 0, speed_p)
  			    + rtx_cost (XEXP (XEXP (mul_op, 1), 0), mode,
  					SIGN_EXTEND, 0, speed_p)
! 			    + rtx_cost (op1, mode, PLUS, 1, speed_p));
  		  return true;
  		}
  
*************** arm_rtx_costs_internal (rtx x, enum rtx_
*** 10107,10130 ****
  		*cost += extra_cost->mult[0].add;
  	      *cost += (rtx_cost (XEXP (mul_op, 0), mode, MULT, 0, speed_p)
  			+ rtx_cost (XEXP (mul_op, 1), mode, MULT, 1, speed_p)
! 			+ rtx_cost (XEXP (x, 1), mode, PLUS, 1, speed_p));
  	      return true;
  	    }
! 	  if (CONST_INT_P (XEXP (x, 1)))
  	    {
  	      int insns = arm_gen_constant (PLUS, SImode, NULL_RTX,
! 					    INTVAL (XEXP (x, 1)), NULL_RTX,
  					    NULL_RTX, 1, 0);
  	      *cost = COSTS_N_INSNS (insns);
  	      if (speed_p)
  		*cost += insns * extra_cost->alu.arith;
! 	      *cost += rtx_cost (XEXP (x, 0), mode, PLUS, 0, speed_p);
  	      return true;
  	    }
! 	  else if (speed_p)
  	    *cost += extra_cost->alu.arith;
  
! 	  return false;
  	}
  
        if (mode == DImode)
--- 10683,10712 ----
  		*cost += extra_cost->mult[0].add;
  	      *cost += (rtx_cost (XEXP (mul_op, 0), mode, MULT, 0, speed_p)
  			+ rtx_cost (XEXP (mul_op, 1), mode, MULT, 1, speed_p)
! 			+ rtx_cost (op1, mode, PLUS, 1, speed_p));
  	      return true;
  	    }
! 
! 	  if (CONST_INT_P (op1))
  	    {
  	      int insns = arm_gen_constant (PLUS, SImode, NULL_RTX,
! 					    INTVAL (op1), NULL_RTX,
  					    NULL_RTX, 1, 0);
  	      *cost = COSTS_N_INSNS (insns);
  	      if (speed_p)
  		*cost += insns * extra_cost->alu.arith;
! 	      *cost += rtx_cost (op0, mode, PLUS, 0, speed_p);
  	      return true;
  	    }
! 
! 	  if (speed_p)
  	    *cost += extra_cost->alu.arith;
  
! 	  /* Don't recurse here because we want to test the operands
! 	     without any carry operation.  */
! 	  *cost += rtx_cost (op0, mode, PLUS, 0, speed_p);
! 	  *cost += rtx_cost (op1, mode, PLUS, 1, speed_p);
! 	  return true;
  	}
  
        if (mode == DImode)
*************** arm_rtx_costs_internal (rtx x, enum rtx_
*** 10938,10947 ****
  
      case CONST_VECTOR:
        /* Fixme.  */
!       if (TARGET_NEON
! 	  && TARGET_HARD_FLOAT
! 	  && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))
! 	  && neon_immediate_valid_for_move (x, mode, NULL, NULL))
  	*cost = COSTS_N_INSNS (1);
        else
  	*cost = COSTS_N_INSNS (4);
--- 11520,11529 ----
  
      case CONST_VECTOR:
        /* Fixme.  */
!       if (((TARGET_NEON && TARGET_HARD_FLOAT
! 	    && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode)))
! 	   || TARGET_HAVE_MVE)
! 	  && simd_immediate_valid_for_move (x, mode, NULL, NULL))
  	*cost = COSTS_N_INSNS (1);
        else
  	*cost = COSTS_N_INSNS (4);
*************** arm_rtx_costs (rtx x, machine_mode mode
*** 11200,11205 ****
--- 11782,11805 ----
    return result;
  }
  
+ static int
+ arm_insn_cost (rtx_insn *insn, bool speed)
+ {
+   int cost;
+ 
+   /* Don't cost a simple reg-reg move at a full insn cost: such moves
+      will likely disappear during register allocation.  */
+   if (!reload_completed
+       && GET_CODE (PATTERN (insn)) == SET
+       && REG_P (SET_DEST (PATTERN (insn)))
+       && REG_P (SET_SRC (PATTERN (insn))))
+     return 2;
+   cost = pattern_cost (PATTERN (insn), speed);
+   /* If the cost is zero, then it's likely a complex insn.  We don't want the
+      cost of these to be less than something we know about.  */
+   return cost ? cost : COSTS_N_INSNS (2);
+ }
+ 
  /* All address computations that can be done are free, but rtx cost returns
     the same for practically all of them.  So we weight the different types
     of address here in the order (most pref first):
*************** vfp3_const_double_rtx (rtx x)
*** 11967,11974 ****
    return vfp3_const_double_index (x) != -1;
  }
  
! /* Recognize immediates which can be used in various Neon instructions. Legal
!    immediates are described by the following table (for VMVN variants, the
     bitwise inverse of the constant shown is recognized. In either case, VMOV
     is output and the correct instruction to use for a given constant is chosen
     by the assembler). The constant shown is replicated across all elements of
--- 12567,12574 ----
    return vfp3_const_double_index (x) != -1;
  }
  
! /* Recognize immediates which can be used in various Neon and MVE instructions.
!    Legal immediates are described by the following table (for VMVN variants, the
     bitwise inverse of the constant shown is recognized. In either case, VMOV
     is output and the correct instruction to use for a given constant is chosen
     by the assembler). The constant shown is replicated across all elements of
*************** vfp3_const_double_rtx (rtx x)
*** 12019,12025 ****
     -1 if the given value doesn't match any of the listed patterns.
  */
  static int
! neon_valid_immediate (rtx op, machine_mode mode, int inverse,
  		      rtx *modconst, int *elementwidth)
  {
  #define CHECK(STRIDE, ELSIZE, CLASS, TEST)	\
--- 12619,12625 ----
     -1 if the given value doesn't match any of the listed patterns.
  */
  static int
! simd_valid_immediate (rtx op, machine_mode mode, int inverse,
  		      rtx *modconst, int *elementwidth)
  {
  #define CHECK(STRIDE, ELSIZE, CLASS, TEST)	\
*************** neon_valid_immediate (rtx op, machine_mo
*** 12036,12042 ****
  
    unsigned int i, elsize = 0, idx = 0, n_elts;
    unsigned int innersize;
!   unsigned char bytes[16];
    int immtype = -1, matches;
    unsigned int invmask = inverse ? 0xff : 0;
    bool vector = GET_CODE (op) == CONST_VECTOR;
--- 12636,12642 ----
  
    unsigned int i, elsize = 0, idx = 0, n_elts;
    unsigned int innersize;
!   unsigned char bytes[16] = {};
    int immtype = -1, matches;
    unsigned int invmask = inverse ? 0xff : 0;
    bool vector = GET_CODE (op) == CONST_VECTOR;
*************** neon_valid_immediate (rtx op, machine_mo
*** 12051,12056 ****
--- 12651,12660 ----
  
    innersize = GET_MODE_UNIT_SIZE (mode);
  
+   /* Only support 128-bit vectors for MVE.  */
+   if (TARGET_HAVE_MVE && (!vector || n_elts * innersize != 16))
+     return -1;
+ 
    /* Vectors of float constants.  */
    if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
      {
*************** neon_valid_immediate (rtx op, machine_mo
*** 12199,12216 ****
  #undef CHECK
  }
  
! /* Return TRUE if rtx X is legal for use as either a Neon VMOV (or, implicitly,
!    VMVN) immediate. Write back width per element to *ELEMENTWIDTH (or zero for
!    float elements), and a modified constant (whatever should be output for a
!    VMOV) in *MODCONST.  */
! 
  int
! neon_immediate_valid_for_move (rtx op, machine_mode mode,
  			       rtx *modconst, int *elementwidth)
  {
    rtx tmpconst;
    int tmpwidth;
!   int retval = neon_valid_immediate (op, mode, 0, &tmpconst, &tmpwidth);
  
    if (retval == -1)
      return 0;
--- 12803,12821 ----
  #undef CHECK
  }
  
! /* Return TRUE if rtx X is legal for use as either a Neon or MVE VMOV (or,
!    implicitly, VMVN) immediate.  Write back width per element to *ELEMENTWIDTH
!    (or zero for float elements), and a modified constant (whatever should be
!    output for a VMOV) in *MODCONST.  "neon_immediate_valid_for_move" function is
!    modified to "simd_immediate_valid_for_move" as this function will be used
!    both by neon and mve.  */
  int
! simd_immediate_valid_for_move (rtx op, machine_mode mode,
  			       rtx *modconst, int *elementwidth)
  {
    rtx tmpconst;
    int tmpwidth;
!   int retval = simd_valid_immediate (op, mode, 0, &tmpconst, &tmpwidth);
  
    if (retval == -1)
      return 0;
*************** neon_immediate_valid_for_move (rtx op, m
*** 12227,12233 ****
  /* Return TRUE if rtx X is legal for use in a VORR or VBIC instruction.  If
     the immediate is valid, write a constant suitable for using as an operand
     to VORR/VBIC/VAND/VORN to *MODCONST and the corresponding element width to
!    *ELEMENTWIDTH. See neon_valid_immediate for description of INVERSE.  */
  
  int
  neon_immediate_valid_for_logic (rtx op, machine_mode mode, int inverse,
--- 12832,12838 ----
  /* Return TRUE if rtx X is legal for use in a VORR or VBIC instruction.  If
     the immediate is valid, write a constant suitable for using as an operand
     to VORR/VBIC/VAND/VORN to *MODCONST and the corresponding element width to
!    *ELEMENTWIDTH.  See simd_valid_immediate for description of INVERSE.  */
  
  int
  neon_immediate_valid_for_logic (rtx op, machine_mode mode, int inverse,
*************** neon_immediate_valid_for_logic (rtx op,
*** 12235,12241 ****
  {
    rtx tmpconst;
    int tmpwidth;
!   int retval = neon_valid_immediate (op, mode, inverse, &tmpconst, &tmpwidth);
  
    if (retval < 0 || retval > 5)
      return 0;
--- 12840,12846 ----
  {
    rtx tmpconst;
    int tmpwidth;
!   int retval = simd_valid_immediate (op, mode, inverse, &tmpconst, &tmpwidth);
  
    if (retval < 0 || retval > 5)
      return 0;
*************** neon_make_constant (rtx vals)
*** 12442,12448 ****
      gcc_unreachable ();
  
    if (const_vec != NULL
!       && neon_immediate_valid_for_move (const_vec, mode, NULL, NULL))
      /* Load using VMOV.  On Cortex-A8 this takes one cycle.  */
      return const_vec;
    else if ((target = neon_vdup_constant (vals)) != NULL_RTX)
--- 13047,13053 ----
      gcc_unreachable ();
  
    if (const_vec != NULL
!       && simd_immediate_valid_for_move (const_vec, mode, NULL, NULL))
      /* Load using VMOV.  On Cortex-A8 this takes one cycle.  */
      return const_vec;
    else if ((target = neon_vdup_constant (vals)) != NULL_RTX)
*************** neon_expand_vector_init (rtx target, rtx
*** 12508,12514 ****
    if (n_var == 1)
      {
        rtx copy = copy_rtx (vals);
!       rtx index = GEN_INT (one_var);
  
        /* Load constant part of vector, substitute neighboring value for
  	 varying element.  */
--- 13113,13119 ----
    if (n_var == 1)
      {
        rtx copy = copy_rtx (vals);
!       rtx merge_mask = GEN_INT (1 << one_var);
  
        /* Load constant part of vector, substitute neighboring value for
  	 varying element.  */
*************** neon_expand_vector_init (rtx target, rtx
*** 12517,12554 ****
  
        /* Insert variable.  */
        x = copy_to_mode_reg (inner_mode, XVECEXP (vals, 0, one_var));
!       switch (mode)
! 	{
! 	case E_V8QImode:
! 	  emit_insn (gen_neon_vset_lanev8qi (target, x, target, index));
! 	  break;
! 	case E_V16QImode:
! 	  emit_insn (gen_neon_vset_lanev16qi (target, x, target, index));
! 	  break;
! 	case E_V4HImode:
! 	  emit_insn (gen_neon_vset_lanev4hi (target, x, target, index));
! 	  break;
! 	case E_V8HImode:
! 	  emit_insn (gen_neon_vset_lanev8hi (target, x, target, index));
! 	  break;
! 	case E_V2SImode:
! 	  emit_insn (gen_neon_vset_lanev2si (target, x, target, index));
! 	  break;
! 	case E_V4SImode:
! 	  emit_insn (gen_neon_vset_lanev4si (target, x, target, index));
! 	  break;
! 	case E_V2SFmode:
! 	  emit_insn (gen_neon_vset_lanev2sf (target, x, target, index));
! 	  break;
! 	case E_V4SFmode:
! 	  emit_insn (gen_neon_vset_lanev4sf (target, x, target, index));
! 	  break;
! 	case E_V2DImode:
! 	  emit_insn (gen_neon_vset_lanev2di (target, x, target, index));
! 	  break;
! 	default:
! 	  gcc_unreachable ();
! 	}
        return;
      }
  
--- 13122,13128 ----
  
        /* Insert variable.  */
        x = copy_to_mode_reg (inner_mode, XVECEXP (vals, 0, one_var));
!       emit_insn (gen_vec_set_internal (mode, target, x, merge_mask, target));
        return;
      }
  
*************** neon_vector_mem_operand (rtx op, int typ
*** 12750,12755 ****
--- 13324,13338 ----
        && (INTVAL (XEXP (ind, 1)) & 3) == 0)
      return TRUE;
  
+   if (type == 1 && TARGET_HAVE_MVE
+       && (GET_CODE (ind) == POST_INC || GET_CODE (ind) == PRE_DEC))
+     {
+       rtx ind1 = XEXP (ind, 0);
+       if (!REG_P (ind1))
+ 	return 0;
+       return VFP_REGNO_OK_FOR_SINGLE (REGNO (ind1));
+     }
+ 
    return FALSE;
  }
  
*************** ldm_stm_operation_p (rtx op, bool load,
*** 13308,13313 ****
--- 13891,13985 ----
    return true;
  }
  
+ /* Checks whether OP is a valid parallel pattern for a CLRM (if VFP is false)
+    or VSCCLRM (otherwise) insn.  To be a valid CLRM pattern, OP must have the
+    following form:
+ 
+    [(set (reg:SI <N>) (const_int 0))
+     (set (reg:SI <M>) (const_int 0))
+     ...
+     (unspec_volatile [(const_int 0)]
+ 		     VUNSPEC_CLRM_APSR)
+     (clobber (reg:CC CC_REGNUM))
+    ]
+ 
+    Any number (including 0) of set expressions is valid, the volatile unspec is
+    optional.  All registers but SP and PC are allowed and registers must be in
+    strict increasing order.
+ 
+    To be a valid VSCCLRM pattern, OP must have the following form:
+ 
+    [(unspec_volatile [(const_int 0)]
+ 		     VUNSPEC_VSCCLRM_VPR)
+     (set (reg:SF <N>) (const_int 0))
+     (set (reg:SF <M>) (const_int 0))
+     ...
+    ]
+ 
+    As with CLRM, any number (including 0) of set expressions is valid, however
+    the volatile unspec is mandatory here.  Any VFP single-precision register is
+    accepted but all registers must be consecutive and in increasing order.  */
+ 
+ bool
+ clear_operation_p (rtx op, bool vfp)
+ {
+   unsigned regno;
+   unsigned last_regno = INVALID_REGNUM;
+   rtx elt, reg, zero;
+   int count = XVECLEN (op, 0);
+   int first_set = vfp ? 1 : 0;
+   machine_mode expected_mode = vfp ? E_SFmode : E_SImode;
+ 
+   for (int i = first_set; i < count; i++)
+     {
+       elt = XVECEXP (op, 0, i);
+ 
+       if (!vfp && GET_CODE (elt) == UNSPEC_VOLATILE)
+ 	{
+ 	  if (XINT (elt, 1) != VUNSPEC_CLRM_APSR
+ 	      || XVECLEN (elt, 0) != 1
+ 	      || XVECEXP (elt, 0, 0) != CONST0_RTX (SImode)
+ 	      || i != count - 2)
+ 	    return false;
+ 
+ 	  continue;
+ 	}
+ 
+       if (GET_CODE (elt) == CLOBBER)
+ 	continue;
+ 
+       if (GET_CODE (elt) != SET)
+ 	return false;
+ 
+       reg = SET_DEST (elt);
+       zero = SET_SRC (elt);
+ 
+       if (!REG_P (reg)
+ 	  || GET_MODE (reg) != expected_mode
+ 	  || zero != CONST0_RTX (SImode))
+ 	return false;
+ 
+       regno = REGNO (reg);
+ 
+       if (vfp)
+ 	{
+ 	  if (i != first_set && regno != last_regno + 1)
+ 	    return false;
+ 	}
+       else
+ 	{
+ 	  if (regno == SP_REGNUM || regno == PC_REGNUM)
+ 	    return false;
+ 	  if (i != first_set && regno <= last_regno)
+ 	    return false;
+ 	}
+ 
+       last_regno = regno;
+     }
+ 
+   return true;
+ }
+ 
  /* Return true iff it would be profitable to turn a sequence of NOPS loads
     or stores (depending on IS_STORE) into a load-multiple or store-multiple
     instruction.  ADD_OFFSET is nonzero if the base address register needs
*************** arm_block_move_unaligned_loop (rtx dest,
*** 14422,14428 ****
     core type, optimize_size setting, etc.  */
  
  static int
! arm_movmemqi_unaligned (rtx *operands)
  {
    HOST_WIDE_INT length = INTVAL (operands[2]);
    
--- 15094,15100 ----
     core type, optimize_size setting, etc.  */
  
  static int
! arm_cpymemqi_unaligned (rtx *operands)
  {
    HOST_WIDE_INT length = INTVAL (operands[2]);
    
*************** arm_movmemqi_unaligned (rtx *operands)
*** 14459,14465 ****
  }
  
  int
! arm_gen_movmemqi (rtx *operands)
  {
    HOST_WIDE_INT in_words_to_go, out_words_to_go, last_bytes;
    HOST_WIDE_INT srcoffset, dstoffset;
--- 15131,15137 ----
  }
  
  int
! arm_gen_cpymemqi (rtx *operands)
  {
    HOST_WIDE_INT in_words_to_go, out_words_to_go, last_bytes;
    HOST_WIDE_INT srcoffset, dstoffset;
*************** arm_gen_movmemqi (rtx *operands)
*** 14473,14479 ****
      return 0;
  
    if (unaligned_access && (INTVAL (operands[3]) & 3) != 0)
!     return arm_movmemqi_unaligned (operands);
  
    if (INTVAL (operands[3]) & 3)
      return 0;
--- 15145,15151 ----
      return 0;
  
    if (unaligned_access && (INTVAL (operands[3]) & 3) != 0)
!     return arm_cpymemqi_unaligned (operands);
  
    if (INTVAL (operands[3]) & 3)
      return 0;
*************** arm_gen_movmemqi (rtx *operands)
*** 14607,14613 ****
    return 1;
  }
  
! /* Helper for gen_movmem_ldrd_strd. Increase the address of memory rtx
  by mode size.  */
  inline static rtx
  next_consecutive_mem (rtx mem)
--- 15279,15285 ----
    return 1;
  }
  
! /* Helper for gen_cpymem_ldrd_strd. Increase the address of memory rtx
  by mode size.  */
  inline static rtx
  next_consecutive_mem (rtx mem)
*************** next_consecutive_mem (rtx mem)
*** 14622,14628 ****
  /* Copy using LDRD/STRD instructions whenever possible.
     Returns true upon success. */
  bool
! gen_movmem_ldrd_strd (rtx *operands)
  {
    unsigned HOST_WIDE_INT len;
    HOST_WIDE_INT align;
--- 15294,15300 ----
  /* Copy using LDRD/STRD instructions whenever possible.
     Returns true upon success. */
  bool
! gen_cpymem_ldrd_strd (rtx *operands)
  {
    unsigned HOST_WIDE_INT len;
    HOST_WIDE_INT align;
*************** gen_movmem_ldrd_strd (rtx *operands)
*** 14666,14672 ****
  
    /* If we cannot generate any LDRD/STRD, try to generate LDM/STM.  */
    if (!(dst_aligned || src_aligned))
!     return arm_gen_movmemqi (operands);
  
    /* If the either src or dst is unaligned we'll be accessing it as pairs
       of unaligned SImode accesses.  Otherwise we can generate DImode
--- 15338,15344 ----
  
    /* If we cannot generate any LDRD/STRD, try to generate LDM/STM.  */
    if (!(dst_aligned || src_aligned))
!     return arm_gen_cpymemqi (operands);
  
    /* If the either src or dst is unaligned we'll be accessing it as pairs
       of unaligned SImode accesses.  Otherwise we can generate DImode
*************** gen_movmem_ldrd_strd (rtx *operands)
*** 14686,14693 ****
  	  low_reg = gen_lowpart (SImode, reg0);
  	  hi_reg = gen_highpart_mode (SImode, DImode, reg0);
  	}
!       if (src_aligned)
!         emit_move_insn (reg0, src);
        else
  	{
  	  emit_insn (gen_unaligned_loadsi (low_reg, src));
--- 15358,15367 ----
  	  low_reg = gen_lowpart (SImode, reg0);
  	  hi_reg = gen_highpart_mode (SImode, DImode, reg0);
  	}
!       if (MEM_ALIGN (src) >= 2 * BITS_PER_WORD)
! 	emit_move_insn (reg0, src);
!       else if (src_aligned)
! 	emit_insn (gen_unaligned_loaddi (reg0, src));
        else
  	{
  	  emit_insn (gen_unaligned_loadsi (low_reg, src));
*************** gen_movmem_ldrd_strd (rtx *operands)
*** 14695,14702 ****
  	  emit_insn (gen_unaligned_loadsi (hi_reg, src));
  	}
  
!       if (dst_aligned)
!         emit_move_insn (dst, reg0);
        else
  	{
  	  emit_insn (gen_unaligned_storesi (dst, low_reg));
--- 15369,15378 ----
  	  emit_insn (gen_unaligned_loadsi (hi_reg, src));
  	}
  
!       if (MEM_ALIGN (dst) >= 2 * BITS_PER_WORD)
! 	emit_move_insn (dst, reg0);
!       else if (dst_aligned)
! 	emit_insn (gen_unaligned_storedi (dst, reg0));
        else
  	{
  	  emit_insn (gen_unaligned_storesi (dst, low_reg));
*************** gen_movmem_ldrd_strd (rtx *operands)
*** 14763,14768 ****
--- 15439,15459 ----
    return true;
  }
  
+ /* Decompose operands for a 64-bit binary operation in OP1 and OP2
+    into its component 32-bit subregs.  OP2 may be an immediate
+    constant and we want to simplify it in that case.  */
+ void
+ arm_decompose_di_binop (rtx op1, rtx op2, rtx *lo_op1, rtx *hi_op1,
+ 			rtx *lo_op2, rtx *hi_op2)
+ {
+   *lo_op1 = gen_lowpart (SImode, op1);
+   *hi_op1 = gen_highpart (SImode, op1);
+   *lo_op2 = simplify_gen_subreg (SImode, op2, DImode,
+ 				 subreg_lowpart_offset (SImode, DImode));
+   *hi_op2 = simplify_gen_subreg (SImode, op2, DImode,
+ 				 subreg_highpart_offset (SImode, DImode));
+ }
+ 
  /* Select a dominance comparison mode if possible for a test of the general
     form (OP (COND_OR (X) (Y)) (const_int 0)).  We support three forms.
     COND_OR == DOM_CC_X_AND_Y => (X && Y)
*************** arm_select_cc_mode (enum rtx_code op, rt
*** 14951,14956 ****
--- 15642,15669 ----
  	  || GET_CODE (x) == ROTATERT))
      return CC_SWPmode;
  
+   /* A widened compare of the sum of a value plus a carry against a
+      constant.  This is a representation of RSC.  We want to swap the
+      result of the comparison at output.  Not valid if the Z bit is
+      needed.  */
+   if (GET_MODE (x) == DImode
+       && GET_CODE (x) == PLUS
+       && arm_borrow_operation (XEXP (x, 1), DImode)
+       && CONST_INT_P (y)
+       && ((GET_CODE (XEXP (x, 0)) == SIGN_EXTEND
+ 	   && (op == LE || op == GT))
+ 	  || (GET_CODE (XEXP (x, 0)) == ZERO_EXTEND
+ 	      && (op == LEU || op == GTU))))
+     return CC_SWPmode;
+ 
+   /* If X is a constant we want to use CC_RSBmode.  This is
+      non-canonical, but arm_gen_compare_reg uses this to generate the
+      correct canonical form.  */
+   if (GET_MODE (y) == SImode
+       && (REG_P (y) || GET_CODE (y) == SUBREG)
+       && CONST_INT_P (x))
+     return CC_RSBmode;
+ 
    /* This operation is performed swapped, but since we only rely on the Z
       flag we don't need an additional mode.  */
    if (GET_MODE (y) == SImode
*************** arm_select_cc_mode (enum rtx_code op, rt
*** 15027,15033 ****
  	  || GET_CODE (x) == ASHIFT || GET_CODE (x) == ASHIFTRT
  	  || GET_CODE (x) == ROTATERT
  	  || (TARGET_32BIT && GET_CODE (x) == ZERO_EXTRACT)))
!     return CC_NOOVmode;
  
    if (GET_MODE (x) == QImode && (op == EQ || op == NE))
      return CC_Zmode;
--- 15740,15755 ----
  	  || GET_CODE (x) == ASHIFT || GET_CODE (x) == ASHIFTRT
  	  || GET_CODE (x) == ROTATERT
  	  || (TARGET_32BIT && GET_CODE (x) == ZERO_EXTRACT)))
!     return CC_NZmode;
! 
!   /* A comparison of ~reg with a const is really a special
!      canoncialization of compare (~const, reg), which is a reverse
!      subtract operation.  We may not get here if CONST is 0, but that
!      doesn't matter because ~0 isn't a valid immediate for RSB.  */
!   if (GET_MODE (x) == SImode
!       && GET_CODE (x) == NOT
!       && CONST_INT_P (y))
!     return CC_RSBmode;
  
    if (GET_MODE (x) == QImode && (op == EQ || op == NE))
      return CC_Zmode;
*************** arm_select_cc_mode (enum rtx_code op, rt
*** 15037,15085 ****
        && (rtx_equal_p (XEXP (x, 0), y) || rtx_equal_p (XEXP (x, 1), y)))
      return CC_Cmode;
  
!   if (GET_MODE (x) == DImode || GET_MODE (y) == DImode)
!     {
!       switch (op)
! 	{
! 	case EQ:
! 	case NE:
! 	  /* A DImode comparison against zero can be implemented by
! 	     or'ing the two halves together.  */
! 	  if (y == const0_rtx)
! 	    return CC_Zmode;
! 
! 	  /* We can do an equality test in three Thumb instructions.  */
! 	  if (!TARGET_32BIT)
! 	    return CC_Zmode;
! 
! 	  /* FALLTHROUGH */
! 
! 	case LTU:
! 	case LEU:
! 	case GTU:
! 	case GEU:
! 	  /* DImode unsigned comparisons can be implemented by cmp +
! 	     cmpeq without a scratch register.  Not worth doing in
! 	     Thumb-2.  */
! 	  if (TARGET_32BIT)
! 	    return CC_CZmode;
  
! 	  /* FALLTHROUGH */
  
! 	case LT:
! 	case LE:
! 	case GT:
! 	case GE:
! 	  /* DImode signed and unsigned comparisons can be implemented
! 	     by cmp + sbcs with a scratch register, but that does not
! 	     set the Z flag - we must reverse GT/LE/GTU/LEU.  */
! 	  gcc_assert (op != EQ && op != NE);
! 	  return CC_NCVmode;
  
! 	default:
! 	  gcc_unreachable ();
! 	}
!     }
  
    if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
      return GET_MODE (x);
--- 15759,15797 ----
        && (rtx_equal_p (XEXP (x, 0), y) || rtx_equal_p (XEXP (x, 1), y)))
      return CC_Cmode;
  
!   if (GET_MODE (x) == DImode
!       && GET_CODE (x) == PLUS
!       && GET_CODE (XEXP (x, 1)) == ZERO_EXTEND
!       && CONST_INT_P (y)
!       && UINTVAL (y) == 0x800000000
!       && (op == GEU || op == LTU))
!     return CC_ADCmode;
  
!   if (GET_MODE (x) == DImode
!       && (op == GE || op == LT)
!       && GET_CODE (x) == SIGN_EXTEND
!       && ((GET_CODE (y) == PLUS
! 	   && arm_borrow_operation (XEXP (y, 0), DImode))
! 	  || arm_borrow_operation (y, DImode)))
!     return CC_NVmode;
  
!   if (GET_MODE (x) == DImode
!       && (op == GEU || op == LTU)
!       && GET_CODE (x) == ZERO_EXTEND
!       && ((GET_CODE (y) == PLUS
! 	   && arm_borrow_operation (XEXP (y, 0), DImode))
! 	  || arm_borrow_operation (y, DImode)))
!     return CC_Bmode;
  
!   if (GET_MODE (x) == DImode
!       && (op == EQ || op == NE)
!       && (GET_CODE (x) == PLUS
! 	  || GET_CODE (x) == MINUS)
!       && (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND
! 	  || GET_CODE (XEXP (x, 1)) == SIGN_EXTEND)
!       && GET_CODE (y) == SIGN_EXTEND
!       && GET_CODE (XEXP (y, 0)) == GET_CODE (x))
!     return CC_Vmode;
  
    if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
      return GET_MODE (x);
*************** arm_select_cc_mode (enum rtx_code op, rt
*** 15087,15134 ****
    return CCmode;
  }
  
! /* X and Y are two things to compare using CODE.  Emit the compare insn and
!    return the rtx for register 0 in the proper mode.  FP means this is a
!    floating point compare: I don't think that it is needed on the arm.  */
! rtx
! arm_gen_compare_reg (enum rtx_code code, rtx x, rtx y, rtx scratch)
  {
    machine_mode mode;
    rtx cc_reg;
-   int dimode_comparison = GET_MODE (x) == DImode || GET_MODE (y) == DImode;
  
!   /* We might have X as a constant, Y as a register because of the predicates
!      used for cmpdi.  If so, force X to a register here.  */
!   if (dimode_comparison && !REG_P (x))
!     x = force_reg (DImode, x);
! 
!   mode = SELECT_CC_MODE (code, x, y);
!   cc_reg = gen_rtx_REG (mode, CC_REGNUM);
  
!   if (dimode_comparison
!       && mode != CC_CZmode)
      {
!       rtx clobber, set;
  
!       /* To compare two non-zero values for equality, XOR them and
! 	 then compare against zero.  Not used for ARM mode; there
! 	 CC_CZmode is cheaper.  */
!       if (mode == CC_Zmode && y != const0_rtx)
! 	{
! 	  gcc_assert (!reload_completed);
! 	  x = expand_binop (DImode, xor_optab, x, y, NULL_RTX, 0, OPTAB_WIDEN);
! 	  y = const0_rtx;
! 	}
  
!       /* A scratch register is required.  */
!       if (reload_completed)
! 	gcc_assert (scratch != NULL && GET_MODE (scratch) == SImode);
!       else
! 	scratch = gen_rtx_SCRATCH (SImode);
  
!       clobber = gen_rtx_CLOBBER (VOIDmode, scratch);
!       set = gen_rtx_SET (cc_reg, gen_rtx_COMPARE (mode, x, y));
!       emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set, clobber)));
      }
    else
      emit_set_insn (cc_reg, gen_rtx_COMPARE (mode, x, y));
--- 15799,16038 ----
    return CCmode;
  }
  
! /* X and Y are two (DImode) things to compare for the condition CODE.  Emit
!    the sequence of instructions needed to generate a suitable condition
!    code register.  Return the CC register result.  */
! static rtx
! arm_gen_dicompare_reg (rtx_code code, rtx x, rtx y, rtx scratch)
  {
    machine_mode mode;
    rtx cc_reg;
  
!     /* We don't currently handle DImode in thumb1, but rely on libgcc.  */
!   gcc_assert (TARGET_32BIT);
!   gcc_assert (!CONST_INT_P (x));
  
!   rtx x_lo = simplify_gen_subreg (SImode, x, DImode,
! 				  subreg_lowpart_offset (SImode, DImode));
!   rtx x_hi = simplify_gen_subreg (SImode, x, DImode,
! 				  subreg_highpart_offset (SImode, DImode));
!   rtx y_lo = simplify_gen_subreg (SImode, y, DImode,
! 				  subreg_lowpart_offset (SImode, DImode));
!   rtx y_hi = simplify_gen_subreg (SImode, y, DImode,
! 				  subreg_highpart_offset (SImode, DImode));
!   switch (code)
      {
!     case EQ:
!     case NE:
!       {
! 	if (y_lo == const0_rtx || y_hi == const0_rtx)
! 	  {
! 	    if (y_lo != const0_rtx)
! 	      {
! 		rtx scratch2 = scratch ? scratch : gen_reg_rtx (SImode);
  
! 		gcc_assert (y_hi == const0_rtx);
! 		y_lo = gen_int_mode (-INTVAL (y_lo), SImode);
! 		if (!arm_add_operand (y_lo, SImode))
! 		  y_lo = force_reg (SImode, y_lo);
! 		emit_insn (gen_addsi3 (scratch2, x_lo, y_lo));
! 		x_lo = scratch2;
! 	      }
! 	    else if (y_hi != const0_rtx)
! 	      {
! 		rtx scratch2 = scratch ? scratch : gen_reg_rtx (SImode);
  
! 		y_hi = gen_int_mode (-INTVAL (y_hi), SImode);
! 		if (!arm_add_operand (y_hi, SImode))
! 		  y_hi = force_reg (SImode, y_hi);
! 		emit_insn (gen_addsi3 (scratch2, x_hi, y_hi));
! 		x_hi = scratch2;
! 	      }
  
! 	    if (!scratch)
! 	      {
! 		gcc_assert (!reload_completed);
! 		scratch = gen_rtx_SCRATCH (SImode);
! 	      }
! 
! 	    rtx clobber = gen_rtx_CLOBBER (VOIDmode, scratch);
! 	    cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
! 
! 	    rtx set
! 	      = gen_rtx_SET (cc_reg,
! 			     gen_rtx_COMPARE (CC_NZmode,
! 					      gen_rtx_IOR (SImode, x_lo, x_hi),
! 					      const0_rtx));
! 	    emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set,
! 							      clobber)));
! 	    return cc_reg;
! 	  }
! 
! 	if (!arm_add_operand (y_lo, SImode))
! 	  y_lo = force_reg (SImode, y_lo);
! 
! 	if (!arm_add_operand (y_hi, SImode))
! 	  y_hi = force_reg (SImode, y_hi);
! 
! 	rtx cmp1 = gen_rtx_NE (SImode, x_lo, y_lo);
! 	rtx cmp2 = gen_rtx_NE (SImode, x_hi, y_hi);
! 	rtx conjunction = gen_rtx_IOR (SImode, cmp1, cmp2);
! 	mode = SELECT_CC_MODE (code, conjunction, const0_rtx);
! 	cc_reg = gen_rtx_REG (mode, CC_REGNUM);
! 
! 	emit_insn (gen_rtx_SET (cc_reg,
! 				gen_rtx_COMPARE (mode, conjunction,
! 						 const0_rtx)));
! 	return cc_reg;
!       }
! 
!     case LT:
!     case GE:
!       {
! 	if (y_lo == const0_rtx)
! 	  {
! 	    /* If the low word of y is 0, then this is simply a normal
! 	       compare of the upper words.  */
! 	    if (!arm_add_operand (y_hi, SImode))
! 	      y_hi = force_reg (SImode, y_hi);
! 
! 	    return arm_gen_compare_reg (code, x_hi, y_hi, NULL_RTX);
! 	  }
! 
! 	if (!arm_add_operand (y_lo, SImode))
! 	  y_lo = force_reg (SImode, y_lo);
! 
! 	rtx cmp1
! 	  = gen_rtx_LTU (DImode,
! 			 arm_gen_compare_reg (LTU, x_lo, y_lo, NULL_RTX),
! 			 const0_rtx);
! 
! 	if (!scratch)
! 	  scratch = gen_rtx_SCRATCH (SImode);
! 
! 	if (!arm_not_operand (y_hi, SImode))
! 	  y_hi = force_reg (SImode, y_hi);
! 
! 	rtx_insn *insn;
! 	if (y_hi == const0_rtx)
! 	  insn = emit_insn (gen_cmpsi3_0_carryin_CC_NVout (scratch, x_hi,
! 							   cmp1));
! 	else if (CONST_INT_P (y_hi))
! 	  insn = emit_insn (gen_cmpsi3_imm_carryin_CC_NVout (scratch, x_hi,
! 							     y_hi, cmp1));
! 	else
! 	  insn = emit_insn (gen_cmpsi3_carryin_CC_NVout (scratch, x_hi, y_hi,
! 							 cmp1));
! 	return SET_DEST (single_set (insn));
!       }
! 
!     case LE:
!     case GT:
!       {
! 	/* During expansion, we only expect to get here if y is a
! 	   constant that we want to handle, otherwise we should have
! 	   swapped the operands already.  */
! 	gcc_assert (arm_const_double_prefer_rsbs_rsc (y));
! 
! 	if (!const_ok_for_arm (INTVAL (y_lo)))
! 	  y_lo = force_reg (SImode, y_lo);
! 
! 	/* Perform a reverse subtract and compare.  */
! 	rtx cmp1
! 	  = gen_rtx_LTU (DImode,
! 			 arm_gen_compare_reg (LTU, y_lo, x_lo, scratch),
! 			 const0_rtx);
! 	rtx_insn *insn = emit_insn (gen_rscsi3_CC_NVout_scratch (scratch, y_hi,
! 								 x_hi, cmp1));
! 	return SET_DEST (single_set (insn));
!       }
! 
!     case LTU:
!     case GEU:
!       {
! 	if (y_lo == const0_rtx)
! 	  {
! 	    /* If the low word of y is 0, then this is simply a normal
! 	       compare of the upper words.  */
! 	    if (!arm_add_operand (y_hi, SImode))
! 	      y_hi = force_reg (SImode, y_hi);
! 
! 	    return arm_gen_compare_reg (code, x_hi, y_hi, NULL_RTX);
! 	  }
! 
! 	if (!arm_add_operand (y_lo, SImode))
! 	  y_lo = force_reg (SImode, y_lo);
! 
! 	rtx cmp1
! 	  = gen_rtx_LTU (DImode,
! 			 arm_gen_compare_reg (LTU, x_lo, y_lo, NULL_RTX),
! 			 const0_rtx);
! 
! 	if (!scratch)
! 	  scratch = gen_rtx_SCRATCH (SImode);
! 	if (!arm_not_operand (y_hi, SImode))
! 	  y_hi = force_reg (SImode, y_hi);
! 
! 	rtx_insn *insn;
! 	if (y_hi == const0_rtx)
! 	  insn = emit_insn (gen_cmpsi3_0_carryin_CC_Bout (scratch, x_hi,
! 							  cmp1));
! 	else if (CONST_INT_P (y_hi))
! 	  {
! 	    /* Constant is viewed as unsigned when zero-extended.  */
! 	    y_hi = GEN_INT (UINTVAL (y_hi) & 0xffffffffULL);
! 	    insn = emit_insn (gen_cmpsi3_imm_carryin_CC_Bout (scratch, x_hi,
! 							      y_hi, cmp1));
! 	  }
! 	else
! 	  insn = emit_insn (gen_cmpsi3_carryin_CC_Bout (scratch, x_hi, y_hi,
! 							cmp1));
! 	return SET_DEST (single_set (insn));
!       }
! 
!     case LEU:
!     case GTU:
!       {
! 	/* During expansion, we only expect to get here if y is a
! 	   constant that we want to handle, otherwise we should have
! 	   swapped the operands already.  */
! 	gcc_assert (arm_const_double_prefer_rsbs_rsc (y));
! 
! 	if (!const_ok_for_arm (INTVAL (y_lo)))
! 	  y_lo = force_reg (SImode, y_lo);
! 
! 	/* Perform a reverse subtract and compare.  */
! 	rtx cmp1
! 	  = gen_rtx_LTU (DImode,
! 			 arm_gen_compare_reg (LTU, y_lo, x_lo, scratch),
! 			 const0_rtx);
! 	y_hi = GEN_INT (0xffffffff & UINTVAL (y_hi));
! 	rtx_insn *insn = emit_insn (gen_rscsi3_CC_Bout_scratch (scratch, y_hi,
! 								x_hi, cmp1));
! 	return SET_DEST (single_set (insn));
!       }
! 
!     default:
!       gcc_unreachable ();
!     }
! }
! 
! /* X and Y are two things to compare using CODE.  Emit the compare insn and
!    return the rtx for register 0 in the proper mode.  */
! rtx
! arm_gen_compare_reg (rtx_code code, rtx x, rtx y, rtx scratch)
! {
!   if (GET_MODE (x) == DImode || GET_MODE (y) == DImode)
!     return arm_gen_dicompare_reg (code, x, y, scratch);
! 
!   machine_mode mode = SELECT_CC_MODE (code, x, y);
!   rtx cc_reg = gen_rtx_REG (mode, CC_REGNUM);
!   if (mode == CC_RSBmode)
!     {
!       if (!scratch)
! 	scratch = gen_rtx_SCRATCH (SImode);
!       emit_insn (gen_rsb_imm_compare_scratch (scratch,
! 					      GEN_INT (~UINTVAL (x)), y));
      }
    else
      emit_set_insn (cc_reg, gen_rtx_COMPARE (mode, x, y));
*************** arm_reload_out_hi (rtx *operands)
*** 15456,15467 ****
     (padded to the size of a word) should be passed in a register.  */
  
  static bool
! arm_must_pass_in_stack (machine_mode mode, const_tree type)
  {
    if (TARGET_AAPCS_BASED)
!     return must_pass_in_stack_var_size (mode, type);
    else
!     return must_pass_in_stack_var_size_or_pad (mode, type);
  }
  
  
--- 16360,16371 ----
     (padded to the size of a word) should be passed in a register.  */
  
  static bool
! arm_must_pass_in_stack (const function_arg_info &arg)
  {
    if (TARGET_AAPCS_BASED)
!     return must_pass_in_stack_var_size (arg);
    else
!     return must_pass_in_stack_var_size_or_pad (arg);
  }
  
  
*************** arm_print_value (FILE *f, rtx x)
*** 15942,15948 ****
        return;
  
      case CONST_DOUBLE:
!       fprintf (f, "<0x%lx,0x%lx>", (long)XWINT (x, 2), (long)XWINT (x, 3));
        return;
  
      case CONST_VECTOR:
--- 16846,16857 ----
        return;
  
      case CONST_DOUBLE:
!       {
! 	char fpstr[20];
! 	real_to_decimal (fpstr, CONST_DOUBLE_REAL_VALUE (x),
! 			 sizeof (fpstr), 0, 1);
! 	fputs (fpstr, f);
!       }
        return;
  
      case CONST_VECTOR:
*************** get_jump_table_size (rtx_jump_table_data
*** 16155,16163 ****
    return 0;
  }
  
  /* Return the maximum amount of padding that will be inserted before
     label LABEL.  */
- 
  static HOST_WIDE_INT
  get_label_padding (rtx label)
  {
--- 17064,17095 ----
    return 0;
  }
  
+ /* Emit insns to load the function address from FUNCDESC (an FDPIC
+    function descriptor) into a register and the GOT address into the
+    FDPIC register, returning an rtx for the register holding the
+    function address.  */
+ 
+ rtx
+ arm_load_function_descriptor (rtx funcdesc)
+ {
+   rtx fnaddr_reg = gen_reg_rtx (Pmode);
+   rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+   rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
+   rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
+ 
+   emit_move_insn (fnaddr_reg, fnaddr);
+ 
+   /* The ABI requires the entry point address to be loaded first, but
+      since we cannot support lazy binding for lack of atomic load of
+      two 32-bits values, we do not need to bother to prevent the
+      previous load from being moved after that of the GOT address.  */
+   emit_insn (gen_restore_pic_register_after_call (pic_reg, gotaddr));
+ 
+   return fnaddr_reg;
+ }
+ 
  /* Return the maximum amount of padding that will be inserted before
     label LABEL.  */
  static HOST_WIDE_INT
  get_label_padding (rtx label)
  {
*************** cmse_clear_registers (sbitmap to_clear_b
*** 17378,17433 ****
  
    /* Clear full registers.  */
  
!   /* If not marked for clearing, clearing_reg already does not contain
!      any secret.  */
!   if (clearing_regno <= maxregno
!       && bitmap_bit_p (to_clear_bitmap, clearing_regno))
      {
!       emit_move_insn (clearing_reg, const0_rtx);
!       emit_use (clearing_reg);
!       bitmap_clear_bit (to_clear_bitmap, clearing_regno);
!     }
  
!   for (regno = minregno; regno <= maxregno; regno++)
      {
!       if (!bitmap_bit_p (to_clear_bitmap, regno))
! 	continue;
  
!       if (IS_VFP_REGNUM (regno))
  	{
! 	  /* If regno is an even vfp register and its successor is also to
! 	     be cleared, use vmov.  */
! 	  if (TARGET_VFP_DOUBLE
! 	      && VFP_REGNO_OK_FOR_DOUBLE (regno)
! 	      && bitmap_bit_p (to_clear_bitmap, regno + 1))
  	    {
! 	      emit_move_insn (gen_rtx_REG (DFmode, regno),
! 			      CONST1_RTX (DFmode));
! 	      emit_use (gen_rtx_REG (DFmode, regno));
! 	      regno++;
  	    }
  	  else
  	    {
! 	      emit_move_insn (gen_rtx_REG (SFmode, regno),
! 			      CONST1_RTX (SFmode));
! 	      emit_use (gen_rtx_REG (SFmode, regno));
  	    }
  	}
-       else
- 	{
- 	  emit_move_insn (gen_rtx_REG (SImode, regno), clearing_reg);
- 	  emit_use (gen_rtx_REG (SImode, regno));
- 	}
      }
  }
  
! /* Clears caller saved registers not used to pass arguments before a
!    cmse_nonsecure_call.  Saving, clearing and restoring of callee saved
!    registers is done in __gnu_cmse_nonsecure_call libcall.
!    See libgcc/config/arm/cmse_nonsecure_call.S.  */
  
  static void
! cmse_nonsecure_call_clear_caller_saved (void)
  {
    basic_block bb;
  
--- 18310,18459 ----
  
    /* Clear full registers.  */
  
!   if (TARGET_HAVE_FPCXT_CMSE)
      {
!       rtvec vunspec_vec;
!       int i, j, k, nb_regs;
!       rtx use_seq, par, reg, set, vunspec;
!       int to_clear_bitmap_size = SBITMAP_SIZE (to_clear_bitmap);
!       auto_sbitmap core_regs_bitmap (to_clear_bitmap_size);
!       auto_sbitmap to_clear_core_bitmap (to_clear_bitmap_size);
  
!       for (i = FIRST_VFP_REGNUM; i <= maxregno; i += nb_regs)
! 	{
! 	  /* Find next register to clear and exit if none.  */
! 	  for (; i <= maxregno && !bitmap_bit_p (to_clear_bitmap, i); i++);
! 	  if (i > maxregno)
! 	    break;
! 
! 	  /* Compute number of consecutive registers to clear.  */
! 	  for (j = i; j <= maxregno && bitmap_bit_p (to_clear_bitmap, j);
! 	       j++);
! 	  nb_regs = j - i;
! 
! 	  /* Create VSCCLRM RTX pattern.  */
! 	  par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (nb_regs + 1));
! 	  vunspec_vec = gen_rtvec (1, gen_int_mode (0, SImode));
! 	  vunspec = gen_rtx_UNSPEC_VOLATILE (SImode, vunspec_vec,
! 					     VUNSPEC_VSCCLRM_VPR);
! 	  XVECEXP (par, 0, 0) = vunspec;
! 
! 	  /* Insert VFP register clearing RTX in the pattern.  */
! 	  start_sequence ();
! 	  for (k = 1, j = i; j <= maxregno && k < nb_regs + 1; j++)
! 	    {
! 	      if (!bitmap_bit_p (to_clear_bitmap, j))
! 		continue;
! 
! 	      reg = gen_rtx_REG (SFmode, j);
! 	      set = gen_rtx_SET (reg, const0_rtx);
! 	      XVECEXP (par, 0, k++) = set;
! 	      emit_use (reg);
! 	    }
! 	  use_seq = get_insns ();
! 	  end_sequence ();
! 
! 	  emit_insn_after (use_seq, emit_insn (par));
! 	}
! 
!       /* Get set of core registers to clear.  */
!       bitmap_clear (core_regs_bitmap);
!       bitmap_set_range (core_regs_bitmap, R0_REGNUM,
! 			IP_REGNUM - R0_REGNUM + 1);
!       bitmap_and (to_clear_core_bitmap, to_clear_bitmap,
! 		  core_regs_bitmap);
!       gcc_assert (!bitmap_empty_p (to_clear_core_bitmap));
! 
!       if (bitmap_empty_p (to_clear_core_bitmap))
! 	return;
! 
!       /* Create clrm RTX pattern.  */
!       nb_regs = bitmap_count_bits (to_clear_core_bitmap);
!       par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (nb_regs + 2));
! 
!       /* Insert core register clearing RTX in the pattern.  */
!       start_sequence ();
!       for (j = 0, i = minregno; j < nb_regs; i++)
! 	{
! 	  if (!bitmap_bit_p (to_clear_core_bitmap, i))
! 	    continue;
! 
! 	  reg = gen_rtx_REG (SImode, i);
! 	  set = gen_rtx_SET (reg, const0_rtx);
! 	  XVECEXP (par, 0, j++) = set;
! 	  emit_use (reg);
! 	}
! 
!       /* Insert APSR register clearing RTX in the pattern
!        * along with clobbering CC.  */
!       vunspec_vec = gen_rtvec (1, gen_int_mode (0, SImode));
!       vunspec = gen_rtx_UNSPEC_VOLATILE (SImode, vunspec_vec,
! 					 VUNSPEC_CLRM_APSR);
! 
!       XVECEXP (par, 0, j++) = vunspec;
! 
!       rtx ccreg = gen_rtx_REG (CCmode, CC_REGNUM);
!       rtx clobber = gen_rtx_CLOBBER (VOIDmode, ccreg);
!       XVECEXP (par, 0, j) = clobber;
! 
!       use_seq = get_insns ();
!       end_sequence ();
! 
!       emit_insn_after (use_seq, emit_insn (par));
!     }
!   else
      {
!       /* If not marked for clearing, clearing_reg already does not contain
! 	 any secret.  */
!       if (clearing_regno <= maxregno
! 	  && bitmap_bit_p (to_clear_bitmap, clearing_regno))
! 	{
! 	  emit_move_insn (clearing_reg, const0_rtx);
! 	  emit_use (clearing_reg);
! 	  bitmap_clear_bit (to_clear_bitmap, clearing_regno);
! 	}
  
!       for (regno = minregno; regno <= maxregno; regno++)
  	{
! 	  if (!bitmap_bit_p (to_clear_bitmap, regno))
! 	    continue;
! 
! 	  if (IS_VFP_REGNUM (regno))
  	    {
! 	      /* If regno is an even vfp register and its successor is also to
! 		 be cleared, use vmov.  */
! 	      if (TARGET_VFP_DOUBLE
! 		  && VFP_REGNO_OK_FOR_DOUBLE (regno)
! 		  && bitmap_bit_p (to_clear_bitmap, regno + 1))
! 		{
! 		  emit_move_insn (gen_rtx_REG (DFmode, regno),
! 				  CONST1_RTX (DFmode));
! 		  emit_use (gen_rtx_REG (DFmode, regno));
! 		  regno++;
! 		}
! 	      else
! 		{
! 		  emit_move_insn (gen_rtx_REG (SFmode, regno),
! 				  CONST1_RTX (SFmode));
! 		  emit_use (gen_rtx_REG (SFmode, regno));
! 		}
  	    }
  	  else
  	    {
! 	      emit_move_insn (gen_rtx_REG (SImode, regno), clearing_reg);
! 	      emit_use (gen_rtx_REG (SImode, regno));
  	    }
  	}
      }
  }
  
! /* Clear core and caller-saved VFP registers not used to pass arguments before
!    a cmse_nonsecure_call.  Saving, clearing and restoring of VFP callee-saved
!    registers is done in the __gnu_cmse_nonsecure_call libcall.  See
!    libgcc/config/arm/cmse_nonsecure_call.S.  */
  
  static void
! cmse_nonsecure_call_inline_register_clear (void)
  {
    basic_block bb;
  
*************** cmse_nonsecure_call_clear_caller_saved (
*** 17437,17444 ****
  
        FOR_BB_INSNS (bb, insn)
  	{
! 	  unsigned address_regnum, regno, maxregno =
! 	    TARGET_HARD_FLOAT_ABI ? D7_VFP_REGNUM : NUM_ARG_REGS - 1;
  	  auto_sbitmap to_clear_bitmap (maxregno + 1);
  	  rtx_insn *seq;
  	  rtx pat, call, unspec, clearing_reg, ip_reg, shift;
--- 18463,18482 ----
  
        FOR_BB_INSNS (bb, insn)
  	{
! 	  bool clear_callee_saved = TARGET_HAVE_FPCXT_CMSE;
! 	  /* frame = VFP regs + FPSCR + VPR.  */
! 	  unsigned lazy_store_stack_frame_size
! 	    = (LAST_VFP_REGNUM - FIRST_VFP_REGNUM + 1 + 2) * UNITS_PER_WORD;
! 	  unsigned long callee_saved_mask
! 	    = ((1 << (LAST_HI_REGNUM + 1)) - 1)
! 	    & ~((1 << (LAST_ARG_REGNUM + 1)) - 1);
! 	  unsigned address_regnum, regno;
! 	  unsigned max_int_regno
! 	    = clear_callee_saved ? IP_REGNUM : LAST_ARG_REGNUM;
! 	  unsigned max_fp_regno
! 	    = TARGET_HAVE_FPCXT_CMSE ? LAST_VFP_REGNUM : D7_VFP_REGNUM;
! 	  unsigned maxregno
! 	    = TARGET_HARD_FLOAT_ABI ? max_fp_regno : max_int_regno;
  	  auto_sbitmap to_clear_bitmap (maxregno + 1);
  	  rtx_insn *seq;
  	  rtx pat, call, unspec, clearing_reg, ip_reg, shift;
*************** cmse_nonsecure_call_clear_caller_saved (
*** 17446,17452 ****
  	  CUMULATIVE_ARGS args_so_far_v;
  	  cumulative_args_t args_so_far;
  	  tree arg_type, fntype;
! 	  bool first_param = true;
  	  function_args_iterator args_iter;
  	  uint32_t padding_bits_to_clear[4] = {0U, 0U, 0U, 0U};
  
--- 18484,18490 ----
  	  CUMULATIVE_ARGS args_so_far_v;
  	  cumulative_args_t args_so_far;
  	  tree arg_type, fntype;
! 	  bool first_param = true, lazy_fpclear = !TARGET_HARD_FLOAT_ABI;
  	  function_args_iterator args_iter;
  	  uint32_t padding_bits_to_clear[4] = {0U, 0U, 0U, 0U};
  
*************** cmse_nonsecure_call_clear_caller_saved (
*** 17470,17490 ****
  	      || XINT (unspec, 1) != UNSPEC_NONSECURE_MEM)
  	    continue;
  
! 	  /* Determine the caller-saved registers we need to clear.  */
  	  bitmap_clear (to_clear_bitmap);
! 	  bitmap_set_range (to_clear_bitmap, R0_REGNUM, NUM_ARG_REGS);
  
  	  /* Only look at the caller-saved floating point registers in case of
  	     -mfloat-abi=hard.  For -mfloat-abi=softfp we will be using the
  	     lazy store and loads which clear both caller- and callee-saved
  	     registers.  */
! 	  if (TARGET_HARD_FLOAT_ABI)
  	    {
  	      auto_sbitmap float_bitmap (maxregno + 1);
  
  	      bitmap_clear (float_bitmap);
  	      bitmap_set_range (float_bitmap, FIRST_VFP_REGNUM,
! 				D7_VFP_REGNUM - FIRST_VFP_REGNUM + 1);
  	      bitmap_ior (to_clear_bitmap, to_clear_bitmap, float_bitmap);
  	    }
  
--- 18508,18530 ----
  	      || XINT (unspec, 1) != UNSPEC_NONSECURE_MEM)
  	    continue;
  
! 	  /* Mark registers that needs to be cleared.  Those that holds a
! 	     parameter are removed from the set further below.  */
  	  bitmap_clear (to_clear_bitmap);
! 	  bitmap_set_range (to_clear_bitmap, R0_REGNUM,
! 			    max_int_regno - R0_REGNUM + 1);
  
  	  /* Only look at the caller-saved floating point registers in case of
  	     -mfloat-abi=hard.  For -mfloat-abi=softfp we will be using the
  	     lazy store and loads which clear both caller- and callee-saved
  	     registers.  */
! 	  if (!lazy_fpclear)
  	    {
  	      auto_sbitmap float_bitmap (maxregno + 1);
  
  	      bitmap_clear (float_bitmap);
  	      bitmap_set_range (float_bitmap, FIRST_VFP_REGNUM,
! 				max_fp_regno - FIRST_VFP_REGNUM + 1);
  	      bitmap_ior (to_clear_bitmap, to_clear_bitmap, float_bitmap);
  	    }
  
*************** cmse_nonsecure_call_clear_caller_saved (
*** 17494,17500 ****
  	  gcc_assert (MEM_P (address));
  	  gcc_assert (REG_P (XEXP (address, 0)));
  	  address_regnum = REGNO (XEXP (address, 0));
! 	  if (address_regnum < R0_REGNUM + NUM_ARG_REGS)
  	    bitmap_clear_bit (to_clear_bitmap, address_regnum);
  
  	  /* Set basic block of call insn so that df rescan is performed on
--- 18534,18540 ----
  	  gcc_assert (MEM_P (address));
  	  gcc_assert (REG_P (XEXP (address, 0)));
  	  address_regnum = REGNO (XEXP (address, 0));
! 	  if (address_regnum <= max_int_regno)
  	    bitmap_clear_bit (to_clear_bitmap, address_regnum);
  
  	  /* Set basic block of call insn so that df rescan is performed on
*************** cmse_nonsecure_call_clear_caller_saved (
*** 17517,17533 ****
  	    {
  	      rtx arg_rtx;
  	      uint64_t to_clear_args_mask;
- 	      machine_mode arg_mode = TYPE_MODE (arg_type);
  
  	      if (VOID_TYPE_P (arg_type))
  		continue;
  
  	      if (!first_param)
! 		arm_function_arg_advance (args_so_far, arg_mode, arg_type,
! 					  true);
  
! 	      arg_rtx = arm_function_arg (args_so_far, arg_mode, arg_type,
! 					  true);
  	      gcc_assert (REG_P (arg_rtx));
  	      to_clear_args_mask
  		= compute_not_to_clear_mask (arg_type, arg_rtx,
--- 18557,18573 ----
  	    {
  	      rtx arg_rtx;
  	      uint64_t to_clear_args_mask;
  
  	      if (VOID_TYPE_P (arg_type))
  		continue;
  
+ 	      function_arg_info arg (arg_type, /*named=*/true);
  	      if (!first_param)
! 		/* ??? We should advance after processing the argument and pass
! 		   the argument we're advancing past.  */
! 		arm_function_arg_advance (args_so_far, arg);
  
! 	      arg_rtx = arm_function_arg (args_so_far, arg);
  	      gcc_assert (REG_P (arg_rtx));
  	      to_clear_args_mask
  		= compute_not_to_clear_mask (arg_type, arg_rtx,
*************** cmse_nonsecure_call_clear_caller_saved (
*** 17554,17559 ****
--- 18594,18633 ----
  	  shift = gen_rtx_ASHIFT (SImode, clearing_reg, const1_rtx);
  	  emit_insn (gen_rtx_SET (clearing_reg, shift));
  
+ 	  if (clear_callee_saved)
+ 	    {
+ 	      rtx push_insn =
+ 		emit_multi_reg_push (callee_saved_mask, callee_saved_mask);
+ 	      /* Disable frame debug info in push because it needs to be
+ 		 disabled for pop (see below).  */
+ 	      RTX_FRAME_RELATED_P (push_insn) = 0;
+ 
+ 	      /* Lazy store multiple.  */
+ 	      if (lazy_fpclear)
+ 		{
+ 		  rtx imm;
+ 		  rtx_insn *add_insn;
+ 
+ 		  imm = gen_int_mode (- lazy_store_stack_frame_size, SImode);
+ 		  add_insn = emit_insn (gen_addsi3 (stack_pointer_rtx,
+ 						    stack_pointer_rtx, imm));
+ 		  arm_add_cfa_adjust_cfa_note (add_insn,
+ 					       - lazy_store_stack_frame_size,
+ 					       stack_pointer_rtx,
+ 					       stack_pointer_rtx);
+ 		  emit_insn (gen_lazy_store_multiple_insn (stack_pointer_rtx));
+ 		}
+ 	      /* Save VFP callee-saved registers.  */
+ 	      else
+ 		{
+ 		  vfp_emit_fstmd (D7_VFP_REGNUM + 1,
+ 				  (max_fp_regno - D7_VFP_REGNUM) / 2);
+ 		  /* Disable frame debug info in push because it needs to be
+ 		     disabled for vpop (see below).  */
+ 		  RTX_FRAME_RELATED_P (get_last_insn ()) = 0;
+ 		}
+ 	    }
+ 
  	  /* Clear caller-saved registers that leak before doing a non-secure
  	     call.  */
  	  ip_reg = gen_rtx_REG (SImode, IP_REGNUM);
*************** cmse_nonsecure_call_clear_caller_saved (
*** 17563,17568 ****
--- 18637,18703 ----
  	  seq = get_insns ();
  	  end_sequence ();
  	  emit_insn_before (seq, insn);
+ 
+ 	  if (TARGET_HAVE_FPCXT_CMSE)
+ 	    {
+ 	      rtx_insn *last, *pop_insn, *after = insn;
+ 
+ 	      start_sequence ();
+ 
+ 	      /* Lazy load multiple done as part of libcall in Armv8-M.  */
+ 	      if (lazy_fpclear)
+ 		{
+ 		  rtx imm = gen_int_mode (lazy_store_stack_frame_size, SImode);
+ 		  emit_insn (gen_lazy_load_multiple_insn (stack_pointer_rtx));
+ 		  rtx_insn *add_insn =
+ 		    emit_insn (gen_addsi3 (stack_pointer_rtx,
+ 					   stack_pointer_rtx, imm));
+ 		  arm_add_cfa_adjust_cfa_note (add_insn,
+ 					       lazy_store_stack_frame_size,
+ 					       stack_pointer_rtx,
+ 					       stack_pointer_rtx);
+ 		}
+ 	      /* Restore VFP callee-saved registers.  */
+ 	      else
+ 		{
+ 		  int nb_callee_saved_vfp_regs =
+ 		    (max_fp_regno - D7_VFP_REGNUM) / 2;
+ 		  arm_emit_vfp_multi_reg_pop (D7_VFP_REGNUM + 1,
+ 					      nb_callee_saved_vfp_regs,
+ 					      stack_pointer_rtx);
+ 		  /* Disable frame debug info in vpop because the SP adjustment
+ 		     is made using a CFA adjustment note while CFA used is
+ 		     sometimes R7.  This then causes an assert failure in the
+ 		     CFI note creation code.  */
+ 		  RTX_FRAME_RELATED_P (get_last_insn ()) = 0;
+ 		}
+ 
+ 	      arm_emit_multi_reg_pop (callee_saved_mask);
+ 	      pop_insn = get_last_insn ();
+ 
+ 	      /* Disable frame debug info in pop because they reset the state
+ 		 of popped registers to what it was at the beginning of the
+ 		 function, before the prologue.  This leads to incorrect state
+ 		 when doing the pop after the nonsecure call for registers that
+ 		 are pushed both in prologue and before the nonsecure call.
+ 
+ 		 It also occasionally triggers an assert failure in CFI note
+ 		 creation code when there are two codepaths to the epilogue,
+ 		 one of which does not go through the nonsecure call.
+ 		 Obviously this mean that debugging between the push and pop is
+ 		 not reliable.  */
+ 	      RTX_FRAME_RELATED_P (pop_insn) = 0;
+ 
+ 	      seq = get_insns ();
+ 	      last = get_last_insn ();
+ 	      end_sequence ();
+ 
+ 	      emit_insn_after (seq, after);
+ 
+ 	      /* Skip pop we have just inserted after nonsecure call, we know
+ 		 it does not contain a nonsecure call.  */
+ 	      insn = last;
+ 	    }
  	}
      }
  }
*************** arm_reorg (void)
*** 17868,17874 ****
    Mfix * fix;
  
    if (use_cmse)
!     cmse_nonsecure_call_clear_caller_saved ();
  
    /* We cannot run the Thumb passes for thunks because there is no CFG.  */
    if (cfun->is_thunk)
--- 19003,19009 ----
    Mfix * fix;
  
    if (use_cmse)
!     cmse_nonsecure_call_inline_register_clear ();
  
    /* We cannot run the Thumb passes for thunks because there is no CFG.  */
    if (cfun->is_thunk)
*************** arm_emit_call_insn (rtx pat, rtx addr, b
*** 18292,18297 ****
--- 19427,19438 ----
        use_reg (&CALL_INSN_FUNCTION_USAGE (insn), cfun->machine->pic_reg);
      }
  
+   if (TARGET_FDPIC)
+     {
+       rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+       use_reg (&CALL_INSN_FUNCTION_USAGE (insn), fdpic_reg);
+     }
+ 
    if (TARGET_AAPCS_BASED)
      {
        /* For AAPCS, IP and CC can be clobbered by veneers inserted by the
*************** output_move_neon (rtx *operands)
*** 19060,19066 ****
      {
      case POST_INC:
        /* We have to use vldm / vstm for too-large modes.  */
!       if (nregs > 4)
  	{
  	  templ = "v%smia%%?\t%%0!, %%h1";
  	  ops[0] = XEXP (addr, 0);
--- 20201,20207 ----
      {
      case POST_INC:
        /* We have to use vldm / vstm for too-large modes.  */
!       if (nregs > 4 || (TARGET_HAVE_MVE && nregs >= 2))
  	{
  	  templ = "v%smia%%?\t%%0!, %%h1";
  	  ops[0] = XEXP (addr, 0);
*************** output_move_neon (rtx *operands)
*** 19089,19095 ****
        /* We have to use vldm / vstm for too-large modes.  */
        if (nregs > 1)
  	{
! 	  if (nregs > 4)
  	    templ = "v%smia%%?\t%%m0, %%h1";
  	  else
  	    templ = "v%s1.64\t%%h1, %%A0";
--- 20230,20236 ----
        /* We have to use vldm / vstm for too-large modes.  */
        if (nregs > 1)
  	{
! 	  if (nregs > 4 || (TARGET_HAVE_MVE && nregs >= 2))
  	    templ = "v%smia%%?\t%%m0, %%h1";
  	  else
  	    templ = "v%s1.64\t%%h1, %%A0";
*************** output_move_neon (rtx *operands)
*** 19099,19112 ****
  	  break;
  	}
        /* Fall through.  */
-     case LABEL_REF:
      case PLUS:
        {
  	int i;
  	int overlap = -1;
  	for (i = 0; i < nregs; i++)
  	  {
! 	    /* We're only using DImode here because it's a convenient size.  */
  	    ops[0] = gen_rtx_REG (DImode, REGNO (reg) + 2 * i);
  	    ops[1] = adjust_address (mem, DImode, 8 * i);
  	    if (reg_overlap_mentioned_p (ops[0], mem))
--- 20240,20257 ----
  	  break;
  	}
        /* Fall through.  */
      case PLUS:
+       if (GET_CODE (addr) == PLUS)
+ 	addr = XEXP (addr, 0);
+       /* Fall through.  */
+     case LABEL_REF:
        {
  	int i;
  	int overlap = -1;
  	for (i = 0; i < nregs; i++)
  	  {
! 	    /* We're only using DImode here because it's a convenient
! 	       size.  */
  	    ops[0] = gen_rtx_REG (DImode, REGNO (reg) + 2 * i);
  	    ops[1] = adjust_address (mem, DImode, 8 * i);
  	    if (reg_overlap_mentioned_p (ops[0], mem))
*************** output_move_neon (rtx *operands)
*** 19116,19122 ****
  	      }
  	    else
  	      {
! 		sprintf (buff, "v%sr%%?\t%%P0, %%1", load ? "ld" : "st");
  		output_asm_insn (buff, ops);
  	      }
  	  }
--- 20261,20270 ----
  	      }
  	    else
  	      {
! 		if (TARGET_HAVE_MVE && GET_CODE (addr) == LABEL_REF)
! 		  sprintf (buff, "v%sr.64\t%%P0, %%1", load ? "ld" : "st");
! 		else
! 		  sprintf (buff, "v%sr%%?\t%%P0, %%1", load ? "ld" : "st");
  		output_asm_insn (buff, ops);
  	      }
  	  }
*************** output_move_neon (rtx *operands)
*** 19124,19130 ****
  	  {
  	    ops[0] = gen_rtx_REG (DImode, REGNO (reg) + 2 * overlap);
  	    ops[1] = adjust_address (mem, SImode, 8 * overlap);
! 	    sprintf (buff, "v%sr%%?\t%%P0, %%1", load ? "ld" : "st");
  	    output_asm_insn (buff, ops);
  	  }
  
--- 20272,20281 ----
  	  {
  	    ops[0] = gen_rtx_REG (DImode, REGNO (reg) + 2 * overlap);
  	    ops[1] = adjust_address (mem, SImode, 8 * overlap);
! 	    if (TARGET_HAVE_MVE && GET_CODE (addr) == LABEL_REF)
! 	      sprintf (buff, "v%sr.32\t%%P0, %%1", load ? "ld" : "st");
! 	    else
! 	      sprintf (buff, "v%sr%%?\t%%P0, %%1", load ? "ld" : "st");
  	    output_asm_insn (buff, ops);
  	  }
  
*************** output_ascii_pseudo_op (FILE *stream, co
*** 19484,19496 ****
    fputs ("\"\n", stream);
  }
  
- /* Whether a register is callee saved or not.  This is necessary because high
-    registers are marked as caller saved when optimizing for size on Thumb-1
-    targets despite being callee saved in order to avoid using them.  */
- #define callee_saved_reg_p(reg) \
-   (!call_used_regs[reg] \
-    || (TARGET_THUMB1 && optimize_size \
-        && reg >= FIRST_HI_REGNUM && reg <= LAST_HI_REGNUM))
  
  /* Compute the register save mask for registers 0 through 12
     inclusive.  This code is used by arm_compute_save_core_reg_mask ().  */
--- 20635,20640 ----
*************** arm_compute_save_reg0_reg12_mask (void)
*** 19523,19535 ****
  
        for (reg = 0; reg <= max_reg; reg++)
  	if (df_regs_ever_live_p (reg)
! 	    || (! crtl->is_leaf && call_used_regs[reg]))
  	  save_reg_mask |= (1 << reg);
  
        /* Also save the pic base register if necessary.  */
!       if (flag_pic
! 	  && !TARGET_SINGLE_PIC_BASE
! 	  && arm_pic_register != INVALID_REGNUM
  	  && crtl->uses_pic_offset_table)
  	save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM;
      }
--- 20667,20677 ----
  
        for (reg = 0; reg <= max_reg; reg++)
  	if (df_regs_ever_live_p (reg)
! 	    || (! crtl->is_leaf && call_used_or_fixed_reg_p (reg)))
  	  save_reg_mask |= (1 << reg);
  
        /* Also save the pic base register if necessary.  */
!       if (PIC_REGISTER_MAY_NEED_SAVING
  	  && crtl->uses_pic_offset_table)
  	save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM;
      }
*************** arm_compute_save_reg0_reg12_mask (void)
*** 19561,19569 ****
  
        /* If we aren't loading the PIC register,
  	 don't stack it even though it may be live.  */
!       if (flag_pic
! 	  && !TARGET_SINGLE_PIC_BASE
! 	  && arm_pic_register != INVALID_REGNUM
  	  && (df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM)
  	      || crtl->uses_pic_offset_table))
  	save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM;
--- 20703,20709 ----
  
        /* If we aren't loading the PIC register,
  	 don't stack it even though it may be live.  */
!       if (PIC_REGISTER_MAY_NEED_SAVING
  	  && (df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM)
  	      || crtl->uses_pic_offset_table))
  	save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM;
*************** arm_compute_save_core_reg_mask (void)
*** 19706,19747 ****
        && (save_reg_mask & THUMB2_WORK_REGS) == 0)
      {
        reg = thumb_find_work_register (1 << 4);
!       if (!call_used_regs[reg])
  	save_reg_mask |= (1 << reg);
      }
  
    return save_reg_mask;
  }
  
- /* Return a mask for the call-clobbered low registers that are unused
-    at the end of the prologue.  */
- static unsigned long
- thumb1_prologue_unused_call_clobbered_lo_regs (void)
- {
-   unsigned long mask = 0;
- 
-   for (int reg = 0; reg <= LAST_LO_REGNUM; reg++)
-     if (!callee_saved_reg_p (reg)
- 	&& !REGNO_REG_SET_P (df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun)),
- 			     reg))
-       mask |= 1 << reg;
-   return mask;
- }
- 
- /* Similarly for the start of the epilogue.  */
- static unsigned long
- thumb1_epilogue_unused_call_clobbered_lo_regs (void)
- {
-   unsigned long mask = 0;
- 
-   for (int reg = 0; reg <= LAST_LO_REGNUM; reg++)
-     if (!callee_saved_reg_p (reg)
- 	&& !REGNO_REG_SET_P (df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun)),
- 			     reg))
-       mask |= 1 << reg;
-   return mask;
- }
- 
  /* Compute a bit mask of which core registers need to be
     saved on the stack for the current function.  */
  static unsigned long
--- 20846,20858 ----
        && (save_reg_mask & THUMB2_WORK_REGS) == 0)
      {
        reg = thumb_find_work_register (1 << 4);
!       if (!call_used_or_fixed_reg_p (reg))
  	save_reg_mask |= (1 << reg);
      }
  
    return save_reg_mask;
  }
  
  /* Compute a bit mask of which core registers need to be
     saved on the stack for the current function.  */
  static unsigned long
*************** arm_get_vfp_saved_size (void)
*** 19836,19850 ****
  
    saved = 0;
    /* Space for saved VFP registers.  */
!   if (TARGET_HARD_FLOAT)
      {
        count = 0;
        for (regno = FIRST_VFP_REGNUM;
  	   regno < LAST_VFP_REGNUM;
  	   regno += 2)
  	{
! 	  if ((!df_regs_ever_live_p (regno) || call_used_regs[regno])
! 	      && (!df_regs_ever_live_p (regno + 1) || call_used_regs[regno + 1]))
  	    {
  	      if (count > 0)
  		{
--- 20947,20963 ----
  
    saved = 0;
    /* Space for saved VFP registers.  */
!   if (TARGET_VFP_BASE)
      {
        count = 0;
        for (regno = FIRST_VFP_REGNUM;
  	   regno < LAST_VFP_REGNUM;
  	   regno += 2)
  	{
! 	  if ((!df_regs_ever_live_p (regno)
! 	       || call_used_or_fixed_reg_p (regno))
! 	      && (!df_regs_ever_live_p (regno + 1)
! 		  || call_used_or_fixed_reg_p (regno + 1)))
  	    {
  	      if (count > 0)
  		{
*************** output_return_instruction (rtx operand,
*** 20073,20110 ****
  	default:
  	  if (IS_CMSE_ENTRY (func_type))
  	    {
! 	      /* Check if we have to clear the 'GE bits' which is only used if
! 		 parallel add and subtraction instructions are available.  */
! 	      if (TARGET_INT_SIMD)
! 		snprintf (instr, sizeof (instr),
! 			  "msr%s\tAPSR_nzcvqg, %%|lr", conditional);
! 	      else
! 		snprintf (instr, sizeof (instr),
! 			  "msr%s\tAPSR_nzcvq, %%|lr", conditional);
! 
! 	      output_asm_insn (instr, & operand);
! 	      if (TARGET_HARD_FLOAT)
  		{
! 		  /* Clear the cumulative exception-status bits (0-4,7) and the
! 		     condition code bits (28-31) of the FPSCR.  We need to
! 		     remember to clear the first scratch register used (IP) and
! 		     save and restore the second (r4).  */
! 		  snprintf (instr, sizeof (instr), "push\t{%%|r4}");
! 		  output_asm_insn (instr, & operand);
! 		  snprintf (instr, sizeof (instr), "vmrs\t%%|ip, fpscr");
! 		  output_asm_insn (instr, & operand);
! 		  snprintf (instr, sizeof (instr), "movw\t%%|r4, #65376");
! 		  output_asm_insn (instr, & operand);
! 		  snprintf (instr, sizeof (instr), "movt\t%%|r4, #4095");
! 		  output_asm_insn (instr, & operand);
! 		  snprintf (instr, sizeof (instr), "and\t%%|ip, %%|r4");
! 		  output_asm_insn (instr, & operand);
! 		  snprintf (instr, sizeof (instr), "vmsr\tfpscr, %%|ip");
! 		  output_asm_insn (instr, & operand);
! 		  snprintf (instr, sizeof (instr), "pop\t{%%|r4}");
! 		  output_asm_insn (instr, & operand);
! 		  snprintf (instr, sizeof (instr), "mov\t%%|ip, %%|lr");
  		  output_asm_insn (instr, & operand);
  		}
  	      snprintf (instr, sizeof (instr), "bxns\t%%|lr");
  	    }
--- 21186,21227 ----
  	default:
  	  if (IS_CMSE_ENTRY (func_type))
  	    {
! 	      /* For Armv8.1-M, this is cleared as part of the CLRM instruction
! 		 emitted by cmse_nonsecure_entry_clear_before_return () and the
! 		 VSTR/VLDR instructions in the prologue and epilogue.  */
! 	      if (!TARGET_HAVE_FPCXT_CMSE)
  		{
! 		  /* Check if we have to clear the 'GE bits' which is only used if
! 		     parallel add and subtraction instructions are available.  */
! 		  if (TARGET_INT_SIMD)
! 		    snprintf (instr, sizeof (instr),
! 			      "msr%s\tAPSR_nzcvqg, %%|lr", conditional);
! 		  else
! 		    snprintf (instr, sizeof (instr),
! 			      "msr%s\tAPSR_nzcvq, %%|lr", conditional);
! 
  		  output_asm_insn (instr, & operand);
+ 		  /* Do not clear FPSCR if targeting Armv8.1-M Mainline, VLDR takes
+ 		     care of it.  */
+ 		  if (TARGET_HARD_FLOAT)
+ 		    {
+ 		      /* Clear the cumulative exception-status bits (0-4,7) and
+ 			 the condition code bits (28-31) of the FPSCR.  We need
+ 			 to remember to clear the first scratch register used
+ 			 (IP) and save and restore the second (r4).
+ 
+ 			 Important note: the length of the
+ 			 thumb2_cmse_entry_return insn pattern must account for
+ 			 the size of the below instructions.  */
+ 		      output_asm_insn ("push\t{%|r4}", & operand);
+ 		      output_asm_insn ("vmrs\t%|ip, fpscr", & operand);
+ 		      output_asm_insn ("movw\t%|r4, #65376", & operand);
+ 		      output_asm_insn ("movt\t%|r4, #4095", & operand);
+ 		      output_asm_insn ("and\t%|ip, %|r4", & operand);
+ 		      output_asm_insn ("vmsr\tfpscr, %|ip", & operand);
+ 		      output_asm_insn ("pop\t{%|r4}", & operand);
+ 		      output_asm_insn ("mov\t%|ip, %|lr", & operand);
+ 		    }
  		}
  	      snprintf (instr, sizeof (instr), "bxns\t%%|lr");
  	    }
*************** arm_compute_frame_layout (void)
*** 21365,21379 ****
  	  for (regno = FIRST_IWMMXT_REGNUM;
  	       regno <= LAST_IWMMXT_REGNUM;
  	       regno++)
! 	    if (df_regs_ever_live_p (regno) && ! call_used_regs[regno])
  	      saved += 8;
  	}
  
        func_type = arm_current_func_type ();
        /* Space for saved VFP registers.  */
        if (! IS_VOLATILE (func_type)
! 	  && TARGET_HARD_FLOAT)
  	saved += arm_get_vfp_saved_size ();
      }
    else /* TARGET_THUMB1 */
      {
--- 22482,22502 ----
  	  for (regno = FIRST_IWMMXT_REGNUM;
  	       regno <= LAST_IWMMXT_REGNUM;
  	       regno++)
! 	    if (df_regs_ever_live_p (regno)
! 		&& !call_used_or_fixed_reg_p (regno))
  	      saved += 8;
  	}
  
        func_type = arm_current_func_type ();
        /* Space for saved VFP registers.  */
        if (! IS_VOLATILE (func_type)
! 	  && TARGET_VFP_BASE)
  	saved += arm_get_vfp_saved_size ();
+ 
+       /* Allocate space for saving/restoring FPCXTNS in Armv8.1-M Mainline
+ 	 nonecure entry functions with VSTR/VLDR.  */
+       if (TARGET_HAVE_FPCXT_CMSE && IS_CMSE_ENTRY (func_type))
+ 	saved += 4;
      }
    else /* TARGET_THUMB1 */
      {
*************** arm_save_coproc_regs(void)
*** 21582,21588 ****
    rtx insn;
  
    for (reg = LAST_IWMMXT_REGNUM; reg >= FIRST_IWMMXT_REGNUM; reg--)
!     if (df_regs_ever_live_p (reg) && ! call_used_regs[reg])
        {
  	insn = gen_rtx_PRE_DEC (Pmode, stack_pointer_rtx);
  	insn = gen_rtx_MEM (V2SImode, insn);
--- 22705,22711 ----
    rtx insn;
  
    for (reg = LAST_IWMMXT_REGNUM; reg >= FIRST_IWMMXT_REGNUM; reg--)
!     if (df_regs_ever_live_p (reg) && !call_used_or_fixed_reg_p (reg))
        {
  	insn = gen_rtx_PRE_DEC (Pmode, stack_pointer_rtx);
  	insn = gen_rtx_MEM (V2SImode, insn);
*************** arm_save_coproc_regs(void)
*** 21591,21604 ****
  	saved_size += 8;
        }
  
!   if (TARGET_HARD_FLOAT)
      {
        start_reg = FIRST_VFP_REGNUM;
  
        for (reg = FIRST_VFP_REGNUM; reg < LAST_VFP_REGNUM; reg += 2)
  	{
! 	  if ((!df_regs_ever_live_p (reg) || call_used_regs[reg])
! 	      && (!df_regs_ever_live_p (reg + 1) || call_used_regs[reg + 1]))
  	    {
  	      if (start_reg != reg)
  		saved_size += vfp_emit_fstmd (start_reg,
--- 22714,22728 ----
  	saved_size += 8;
        }
  
!   if (TARGET_VFP_BASE)
      {
        start_reg = FIRST_VFP_REGNUM;
  
        for (reg = FIRST_VFP_REGNUM; reg < LAST_VFP_REGNUM; reg += 2)
  	{
! 	  if ((!df_regs_ever_live_p (reg) || call_used_or_fixed_reg_p (reg))
! 	      && (!df_regs_ever_live_p (reg + 1)
! 		  || call_used_or_fixed_reg_p (reg + 1)))
  	    {
  	      if (start_reg != reg)
  		saved_size += vfp_emit_fstmd (start_reg,
*************** arm_expand_prologue (void)
*** 22074,22079 ****
--- 23198,23215 ----
        RTX_FRAME_RELATED_P (insn) = 1;
      }
  
+   /* Armv8.1-M Mainline nonsecure entry: save FPCXTNS on stack using VSTR.  */
+   if (TARGET_HAVE_FPCXT_CMSE && IS_CMSE_ENTRY (func_type))
+     {
+       saved_regs += 4;
+       insn = emit_insn (gen_push_fpsysreg_insn (stack_pointer_rtx,
+ 						GEN_INT (FPCXTNS_ENUM)));
+       rtx dwarf = gen_rtx_SET (stack_pointer_rtx,
+ 			  plus_constant (Pmode, stack_pointer_rtx, -4));
+       add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf);
+       RTX_FRAME_RELATED_P (insn) = 1;
+     }
+ 
    if (args_to_push)
      {
        /* Push the argument registers, or reserve space for them.  */
*************** arm_print_operand (FILE *stream, rtx x,
*** 22883,22888 ****
--- 24019,24071 ----
        }
        return;
  
+     /* To print the memory operand with "Us" constraint.  Based on the rtx_code
+        the memory operands output looks like following.
+        1. [Rn], #+/-<imm>
+        2. [Rn, #+/-<imm>]!
+        3. [Rn].  */
+     case 'E':
+       {
+ 	rtx addr;
+ 	rtx postinc_reg = NULL;
+ 	unsigned inc_val = 0;
+ 	enum rtx_code code;
+ 
+ 	gcc_assert (MEM_P (x));
+ 	addr = XEXP (x, 0);
+ 	code = GET_CODE (addr);
+ 	if (code == POST_INC || code == POST_DEC || code == PRE_INC
+ 	    || code  == PRE_DEC)
+ 	  {
+ 	    asm_fprintf (stream, "[%r", REGNO (XEXP (addr, 0)));
+ 	    inc_val = GET_MODE_SIZE (GET_MODE (x));
+ 	    if (code == POST_INC || code == POST_DEC)
+ 	      asm_fprintf (stream, "], #%s%d",(code == POST_INC)
+ 					      ? "": "-", inc_val);
+ 	    else
+ 	      asm_fprintf (stream, ", #%s%d]!",(code == PRE_INC)
+ 					       ? "": "-", inc_val);
+ 	  }
+ 	else if (code == POST_MODIFY || code == PRE_MODIFY)
+ 	  {
+ 	    asm_fprintf (stream, "[%r", REGNO (XEXP (addr, 0)));
+ 	    postinc_reg = XEXP ( XEXP (x, 1), 1);
+ 	    if (postinc_reg && CONST_INT_P (postinc_reg))
+ 	      {
+ 		if (code == POST_MODIFY)
+ 		  asm_fprintf (stream, "], #%wd",INTVAL (postinc_reg));
+ 		else
+ 		  asm_fprintf (stream, ", #%wd]!",INTVAL (postinc_reg));
+ 	      }
+ 	  }
+ 	else
+ 	  {
+ 	    gcc_assert (REG_P (addr));
+ 	    asm_fprintf (stream, "[%r]",REGNO (addr));
+ 	  }
+       }
+       return;
+ 
      case 'C':
        {
  	rtx addr;
*************** arm_print_operand_address (FILE *stream,
*** 23060,23068 ****
  			 REGNO (XEXP (x, 0)),
  			 GET_CODE (x) == PRE_DEC ? "-" : "",
  			 GET_MODE_SIZE (mode));
  	  else
! 	    asm_fprintf (stream, "[%r], #%s%d",
! 			 REGNO (XEXP (x, 0)),
  			 GET_CODE (x) == POST_DEC ? "-" : "",
  			 GET_MODE_SIZE (mode));
  	}
--- 24243,24252 ----
  			 REGNO (XEXP (x, 0)),
  			 GET_CODE (x) == PRE_DEC ? "-" : "",
  			 GET_MODE_SIZE (mode));
+ 	  else if (TARGET_HAVE_MVE && (mode == OImode || mode == XImode))
+ 	    asm_fprintf (stream, "[%r]!", REGNO (XEXP (x,0)));
  	  else
! 	    asm_fprintf (stream, "[%r], #%s%d", REGNO (XEXP (x, 0)),
  			 GET_CODE (x) == POST_DEC ? "-" : "",
  			 GET_MODE_SIZE (mode));
  	}
*************** arm_assemble_integer (rtx x, unsigned in
*** 23149,23159 ****
  	      || (GET_CODE (x) == SYMBOL_REF
  		  && (!SYMBOL_REF_LOCAL_P (x)
  		      || (SYMBOL_REF_DECL (x)
! 			  ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0))))
! 	    fputs ("(GOT)", asm_out_file);
  	  else
! 	    fputs ("(GOTOFF)", asm_out_file);
  	}
        fputc ('\n', asm_out_file);
        return true;
      }
--- 24333,24371 ----
  	      || (GET_CODE (x) == SYMBOL_REF
  		  && (!SYMBOL_REF_LOCAL_P (x)
  		      || (SYMBOL_REF_DECL (x)
! 			  ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0)
! 		      || (SYMBOL_REF_FUNCTION_P (x)
! 			  && !arm_fdpic_local_funcdesc_p (x)))))
! 	    {
! 	      if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
! 		fputs ("(GOTFUNCDESC)", asm_out_file);
! 	      else
! 		fputs ("(GOT)", asm_out_file);
! 	    }
  	  else
! 	    {
! 	      if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
! 		fputs ("(GOTOFFFUNCDESC)", asm_out_file);
! 	      else
! 		{
! 		  bool is_readonly;
! 
! 		  if (!TARGET_FDPIC
! 		      || arm_is_segment_info_known (x, &is_readonly))
! 		    fputs ("(GOTOFF)", asm_out_file);
! 		  else
! 		    fputs ("(GOT)", asm_out_file);
! 		}
! 	    }
  	}
+ 
+       /* For FDPIC we also have to mark symbol for .data section.  */
+       if (TARGET_FDPIC
+ 	  && !making_const_table
+ 	  && SYMBOL_REF_P (x)
+ 	  && SYMBOL_REF_FUNCTION_P (x))
+ 	fputs ("(FUNCDESC)", asm_out_file);
+ 
        fputc ('\n', asm_out_file);
        return true;
      }
*************** maybe_get_arm_condition_code (rtx compar
*** 23315,23321 ****
  	return code;
        return ARM_NV;
  
!     case E_CC_NOOVmode:
        switch (comp_code)
  	{
  	case NE: return ARM_NE;
--- 24527,24533 ----
  	return code;
        return ARM_NV;
  
!     case E_CC_NZmode:
        switch (comp_code)
  	{
  	case NE: return ARM_NE;
*************** maybe_get_arm_condition_code (rtx compar
*** 23385,23412 ****
  	{
  	case LTU: return ARM_CS;
  	case GEU: return ARM_CC;
- 	case NE: return ARM_CS;
- 	case EQ: return ARM_CC;
  	default: return ARM_NV;
  	}
  
!     case E_CC_CZmode:
        switch (comp_code)
  	{
! 	case NE: return ARM_NE;
! 	case EQ: return ARM_EQ;
! 	case GEU: return ARM_CS;
! 	case GTU: return ARM_HI;
! 	case LEU: return ARM_LS;
! 	case LTU: return ARM_CC;
  	default: return ARM_NV;
  	}
  
!     case E_CC_NCVmode:
        switch (comp_code)
  	{
- 	case GE: return ARM_GE;
- 	case LT: return ARM_LT;
  	case GEU: return ARM_CS;
  	case LTU: return ARM_CC;
  	default: return ARM_NV;
--- 24597,24616 ----
  	{
  	case LTU: return ARM_CS;
  	case GEU: return ARM_CC;
  	default: return ARM_NV;
  	}
  
!     case E_CC_NVmode:
        switch (comp_code)
  	{
! 	case GE: return ARM_GE;
! 	case LT: return ARM_LT;
  	default: return ARM_NV;
  	}
  
!     case E_CC_Bmode:
        switch (comp_code)
  	{
  	case GEU: return ARM_CS;
  	case LTU: return ARM_CC;
  	default: return ARM_NV;
*************** maybe_get_arm_condition_code (rtx compar
*** 23420,23426 ****
--- 24624,24639 ----
  	default: return ARM_NV;
  	}
  
+     case E_CC_ADCmode:
+       switch (comp_code)
+ 	{
+ 	case GEU: return ARM_CS;
+ 	case LTU: return ARM_CC;
+ 	default: return ARM_NV;
+ 	}
+ 
      case E_CCmode:
+     case E_CC_RSBmode:
        switch (comp_code)
  	{
  	case NE: return ARM_NE;
*************** arm_fixed_condition_code_regs (unsigned
*** 23459,23465 ****
      return false;
  
    *p1 = CC_REGNUM;
!   *p2 = TARGET_HARD_FLOAT ? VFPCC_REGNUM : INVALID_REGNUM;
    return true;
  }
  
--- 24672,24678 ----
      return false;
  
    *p1 = CC_REGNUM;
!   *p2 = TARGET_VFP_BASE ? VFPCC_REGNUM : INVALID_REGNUM;
    return true;
  }
  
*************** arm_hard_regno_mode_ok (unsigned int reg
*** 23878,23889 ****
  {
    if (GET_MODE_CLASS (mode) == MODE_CC)
      return (regno == CC_REGNUM
! 	    || (TARGET_HARD_FLOAT
  		&& regno == VFPCC_REGNUM));
  
    if (regno == CC_REGNUM && GET_MODE_CLASS (mode) != MODE_CC)
      return false;
  
    if (TARGET_THUMB1)
      /* For the Thumb we only allow values bigger than SImode in
         registers 0 - 6, so that there is always a second low
--- 25091,25105 ----
  {
    if (GET_MODE_CLASS (mode) == MODE_CC)
      return (regno == CC_REGNUM
! 	    || (TARGET_VFP_BASE
  		&& regno == VFPCC_REGNUM));
  
    if (regno == CC_REGNUM && GET_MODE_CLASS (mode) != MODE_CC)
      return false;
  
+   if (IS_VPR_REGNUM (regno))
+     return true;
+ 
    if (TARGET_THUMB1)
      /* For the Thumb we only allow values bigger than SImode in
         registers 0 - 6, so that there is always a second low
*************** arm_hard_regno_mode_ok (unsigned int reg
*** 23892,23910 ****
         start of an even numbered register pair.  */
      return (ARM_NUM_REGS (mode) < 2) || (regno < LAST_LO_REGNUM);
  
!   if (TARGET_HARD_FLOAT && IS_VFP_REGNUM (regno))
      {
!       if (mode == SFmode || mode == SImode)
! 	return VFP_REGNO_OK_FOR_SINGLE (regno);
! 
!       if (mode == DFmode)
  	return VFP_REGNO_OK_FOR_DOUBLE (regno);
  
!       if (mode == HFmode)
! 	return VFP_REGNO_OK_FOR_SINGLE (regno);
! 
!       /* VFP registers can hold HImode values.  */
!       if (mode == HImode)
  	return VFP_REGNO_OK_FOR_SINGLE (regno);
  
        if (TARGET_NEON)
--- 25108,25120 ----
         start of an even numbered register pair.  */
      return (ARM_NUM_REGS (mode) < 2) || (regno < LAST_LO_REGNUM);
  
!   if (TARGET_VFP_BASE && IS_VFP_REGNUM (regno))
      {
!       if (mode == DFmode || mode == DImode)
  	return VFP_REGNO_OK_FOR_DOUBLE (regno);
  
!       if (mode == HFmode || mode == BFmode || mode == HImode
! 	  || mode == SFmode || mode == SImode)
  	return VFP_REGNO_OK_FOR_SINGLE (regno);
  
        if (TARGET_NEON)
*************** arm_hard_regno_mode_ok (unsigned int reg
*** 23916,23921 ****
--- 25126,25135 ----
  	       || (mode == OImode && NEON_REGNO_OK_FOR_NREGS (regno, 4))
  	       || (mode == CImode && NEON_REGNO_OK_FOR_NREGS (regno, 6))
  	       || (mode == XImode && NEON_REGNO_OK_FOR_NREGS (regno, 8));
+      if (TARGET_HAVE_MVE)
+        return ((VALID_MVE_MODE (mode) && NEON_REGNO_OK_FOR_QUAD (regno))
+ 	       || (mode == OImode && NEON_REGNO_OK_FOR_NREGS (regno, 4))
+ 	       || (mode == XImode && NEON_REGNO_OK_FOR_NREGS (regno, 8)));
  
        return false;
      }
*************** arm_hard_regno_mode_ok (unsigned int reg
*** 23931,23947 ****
  
    /* We allow almost any value to be stored in the general registers.
       Restrict doubleword quantities to even register pairs in ARM state
!      so that we can use ldrd.  Do not allow very large Neon structure
!      opaque modes in general registers; they would use too many.  */
    if (regno <= LAST_ARM_REGNUM)
      {
        if (ARM_NUM_REGS (mode) > 4)
  	return false;
  
!       if (TARGET_THUMB2)
  	return true;
  
!       return !(TARGET_LDRD && GET_MODE_SIZE (mode) > 4 && (regno & 1) != 0);
      }
  
    if (regno == FRAME_POINTER_REGNUM
--- 25145,25164 ----
  
    /* We allow almost any value to be stored in the general registers.
       Restrict doubleword quantities to even register pairs in ARM state
!      so that we can use ldrd. The same restriction applies for MVE
!      in order to support Armv8.1-M Mainline instructions.
!      Do not allow very large Neon structure  opaque modes in general
!      registers; they would use too many.  */
    if (regno <= LAST_ARM_REGNUM)
      {
        if (ARM_NUM_REGS (mode) > 4)
  	return false;
  
!       if (TARGET_THUMB2 && !(TARGET_HAVE_MVE || TARGET_CDE))
  	return true;
  
!       return !((TARGET_LDRD || TARGET_CDE)
! 	       && GET_MODE_SIZE (mode) > 4 && (regno & 1) != 0);
      }
  
    if (regno == FRAME_POINTER_REGNUM
*************** arm_modes_tieable_p (machine_mode mode1,
*** 23963,23975 ****
    /* We specifically want to allow elements of "structure" modes to
       be tieable to the structure.  This more general condition allows
       other rarer situations too.  */
!   if (TARGET_NEON
!       && (VALID_NEON_DREG_MODE (mode1)
! 	  || VALID_NEON_QREG_MODE (mode1)
! 	  || VALID_NEON_STRUCT_MODE (mode1))
!       && (VALID_NEON_DREG_MODE (mode2)
! 	  || VALID_NEON_QREG_MODE (mode2)
! 	  || VALID_NEON_STRUCT_MODE (mode2)))
      return true;
  
    return false;
--- 25180,25197 ----
    /* We specifically want to allow elements of "structure" modes to
       be tieable to the structure.  This more general condition allows
       other rarer situations too.  */
!   if ((TARGET_NEON
!        && (VALID_NEON_DREG_MODE (mode1)
! 	   || VALID_NEON_QREG_MODE (mode1)
! 	   || VALID_NEON_STRUCT_MODE (mode1))
!        && (VALID_NEON_DREG_MODE (mode2)
! 	   || VALID_NEON_QREG_MODE (mode2)
! 	   || VALID_NEON_STRUCT_MODE (mode2)))
!       || (TARGET_HAVE_MVE
! 	  && (VALID_MVE_MODE (mode1)
! 	      || VALID_MVE_STRUCT_MODE (mode1))
! 	  && (VALID_MVE_MODE (mode2)
! 	      || VALID_MVE_STRUCT_MODE (mode2))))
      return true;
  
    return false;
*************** arm_regno_class (int regno)
*** 23984,23989 ****
--- 25206,25214 ----
    if (regno == PC_REGNUM)
      return NO_REGS;
  
+   if (IS_VPR_REGNUM (regno))
+     return VPR_REG;
+ 
    if (TARGET_THUMB1)
      {
        if (regno == STACK_POINTER_REGNUM)
*************** thumb_exit (FILE *f, int reg_containing_
*** 24458,24465 ****
  
        if (IS_CMSE_ENTRY (arm_current_func_type ()))
  	{
! 	  asm_fprintf (f, "\tmsr\tAPSR_nzcvq, %r\n",
! 		       reg_containing_return_addr);
  	  asm_fprintf (f, "\tbxns\t%r\n", reg_containing_return_addr);
  	}
        else
--- 25683,25693 ----
  
        if (IS_CMSE_ENTRY (arm_current_func_type ()))
  	{
! 	  /* For Armv8.1-M, this is cleared as part of the CLRM instruction
! 	     emitted by cmse_nonsecure_entry_clear_before_return ().  */
! 	  if (!TARGET_HAVE_FPCXT_CMSE)
! 	    asm_fprintf (f, "\tmsr\tAPSR_nzcvq, %r\n",
! 			 reg_containing_return_addr);
  	  asm_fprintf (f, "\tbxns\t%r\n", reg_containing_return_addr);
  	}
        else
*************** thumb_exit (FILE *f, int reg_containing_
*** 24699,24709 ****
           address.  It may therefore contain information that we might not want
  	 to leak, hence it must be cleared.  The value in R0 will never be a
  	 secret at this point, so it is safe to use it, see the clearing code
! 	 in 'cmse_nonsecure_entry_clear_before_return'.  */
        if (reg_containing_return_addr != LR_REGNUM)
  	asm_fprintf (f, "\tmov\tlr, r0\n");
  
!       asm_fprintf (f, "\tmsr\tAPSR_nzcvq, %r\n", reg_containing_return_addr);
        asm_fprintf (f, "\tbxns\t%r\n", reg_containing_return_addr);
      }
    else
--- 25927,25940 ----
           address.  It may therefore contain information that we might not want
  	 to leak, hence it must be cleared.  The value in R0 will never be a
  	 secret at this point, so it is safe to use it, see the clearing code
! 	 in cmse_nonsecure_entry_clear_before_return ().  */
        if (reg_containing_return_addr != LR_REGNUM)
  	asm_fprintf (f, "\tmov\tlr, r0\n");
  
!       /* For Armv8.1-M, this is cleared as part of the CLRM instruction emitted
! 	 by cmse_nonsecure_entry_clear_before_return ().  */
!       if (!TARGET_HAVE_FPCXT_CMSE)
! 	asm_fprintf (f, "\tmsr\tAPSR_nzcvq, %r\n", reg_containing_return_addr);
        asm_fprintf (f, "\tbxns\t%r\n", reg_containing_return_addr);
      }
    else
*************** thumb1_final_prescan_insn (rtx_insn *ins
*** 24737,24743 ****
  	  cfun->machine->thumb1_cc_insn = insn;
  	  cfun->machine->thumb1_cc_op0 = SET_DEST (set);
  	  cfun->machine->thumb1_cc_op1 = const0_rtx;
! 	  cfun->machine->thumb1_cc_mode = CC_NOOVmode;
  	  if (INSN_CODE (insn) == CODE_FOR_thumb1_subsi3_insn)
  	    {
  	      rtx src1 = XEXP (SET_SRC (set), 1);
--- 25968,25974 ----
  	  cfun->machine->thumb1_cc_insn = insn;
  	  cfun->machine->thumb1_cc_op0 = SET_DEST (set);
  	  cfun->machine->thumb1_cc_op1 = const0_rtx;
! 	  cfun->machine->thumb1_cc_mode = CC_NZmode;
  	  if (INSN_CODE (insn) == CODE_FOR_thumb1_subsi3_insn)
  	    {
  	      rtx src1 = XEXP (SET_SRC (set), 1);
*************** thumb1_extra_regs_pushed (arm_stack_offs
*** 24944,24950 ****
      }
  
    while (reg_base + n_free < 8 && !(live_regs_mask & 1)
! 	 && (for_prologue || call_used_regs[reg_base + n_free]))
      {
        live_regs_mask >>= 1;
        n_free++;
--- 26175,26181 ----
      }
  
    while (reg_base + n_free < 8 && !(live_regs_mask & 1)
! 	 && (for_prologue || call_used_or_fixed_reg_p (reg_base + n_free)))
      {
        live_regs_mask >>= 1;
        n_free++;
*************** thumb1_expand_prologue (void)
*** 25590,25596 ****
  void
  cmse_nonsecure_entry_clear_before_return (void)
  {
!   int regno, maxregno = TARGET_HARD_FLOAT ? LAST_VFP_REGNUM : IP_REGNUM;
    uint32_t padding_bits_to_clear = 0;
    auto_sbitmap to_clear_bitmap (maxregno + 1);
    rtx r1_reg, result_rtl, clearing_reg = NULL_RTX;
--- 26821,26828 ----
  void
  cmse_nonsecure_entry_clear_before_return (void)
  {
!   bool clear_vfpregs = TARGET_HARD_FLOAT || TARGET_HAVE_FPCXT_CMSE;
!   int regno, maxregno = clear_vfpregs ? LAST_VFP_REGNUM : IP_REGNUM;
    uint32_t padding_bits_to_clear = 0;
    auto_sbitmap to_clear_bitmap (maxregno + 1);
    rtx r1_reg, result_rtl, clearing_reg = NULL_RTX;
*************** cmse_nonsecure_entry_clear_before_return
*** 25602,25619 ****
  
    /* If we are not dealing with -mfloat-abi=soft we will need to clear VFP
       registers.  */
!   if (TARGET_HARD_FLOAT)
      {
        int float_bits = D7_VFP_REGNUM - FIRST_VFP_REGNUM + 1;
  
        bitmap_set_range (to_clear_bitmap, FIRST_VFP_REGNUM, float_bits);
  
!       /* Make sure we don't clear the two scratch registers used to clear the
! 	 relevant FPSCR bits in output_return_instruction.  */
!       emit_use (gen_rtx_REG (SImode, IP_REGNUM));
!       bitmap_clear_bit (to_clear_bitmap, IP_REGNUM);
!       emit_use (gen_rtx_REG (SImode, 4));
!       bitmap_clear_bit (to_clear_bitmap, 4);
      }
  
    /* If the user has defined registers to be caller saved, these are no longer
--- 26834,26854 ----
  
    /* If we are not dealing with -mfloat-abi=soft we will need to clear VFP
       registers.  */
!   if (clear_vfpregs)
      {
        int float_bits = D7_VFP_REGNUM - FIRST_VFP_REGNUM + 1;
  
        bitmap_set_range (to_clear_bitmap, FIRST_VFP_REGNUM, float_bits);
  
!       if (!TARGET_HAVE_FPCXT_CMSE)
! 	{
! 	  /* Make sure we don't clear the two scratch registers used to clear
! 	     the relevant FPSCR bits in output_return_instruction.  */
! 	  emit_use (gen_rtx_REG (SImode, IP_REGNUM));
! 	  bitmap_clear_bit (to_clear_bitmap, IP_REGNUM);
! 	  emit_use (gen_rtx_REG (SImode, 4));
! 	  bitmap_clear_bit (to_clear_bitmap, 4);
! 	}
      }
  
    /* If the user has defined registers to be caller saved, these are no longer
*************** cmse_nonsecure_entry_clear_before_return
*** 25628,25634 ****
  	continue;
        if (IN_RANGE (regno, IP_REGNUM, PC_REGNUM))
  	continue;
!       if (call_used_regs[regno])
  	bitmap_set_bit (to_clear_bitmap, regno);
      }
  
--- 26863,26871 ----
  	continue;
        if (IN_RANGE (regno, IP_REGNUM, PC_REGNUM))
  	continue;
!       if (call_used_or_fixed_reg_p (regno)
! 	  && (!IN_RANGE (regno, FIRST_VFP_REGNUM, LAST_VFP_REGNUM)
! 	      || TARGET_HARD_FLOAT))
  	bitmap_set_bit (to_clear_bitmap, regno);
      }
  
*************** thumb1_expand_epilogue (void)
*** 25780,25786 ****
    /* Emit a clobber for each insn that will be restored in the epilogue,
       so that flow2 will get register lifetimes correct.  */
    for (regno = 0; regno < 13; regno++)
!     if (df_regs_ever_live_p (regno) && !call_used_regs[regno])
        emit_clobber (gen_rtx_REG (SImode, regno));
  
    if (! df_regs_ever_live_p (LR_REGNUM))
--- 27017,27023 ----
    /* Emit a clobber for each insn that will be restored in the epilogue,
       so that flow2 will get register lifetimes correct.  */
    for (regno = 0; regno < 13; regno++)
!     if (df_regs_ever_live_p (regno) && !call_used_or_fixed_reg_p (regno))
        emit_clobber (gen_rtx_REG (SImode, regno));
  
    if (! df_regs_ever_live_p (LR_REGNUM))
*************** arm_expand_epilogue_apcs_frame (bool rea
*** 25823,25829 ****
          floats_from_frame += 4;
        }
  
!   if (TARGET_HARD_FLOAT)
      {
        int start_reg;
        rtx ip_rtx = gen_rtx_REG (SImode, IP_REGNUM);
--- 27060,27066 ----
          floats_from_frame += 4;
        }
  
!   if (TARGET_VFP_BASE)
      {
        int start_reg;
        rtx ip_rtx = gen_rtx_REG (SImode, IP_REGNUM);
*************** arm_expand_epilogue_apcs_frame (bool rea
*** 25846,25854 ****
  
        for (i = FIRST_VFP_REGNUM; i < LAST_VFP_REGNUM; i += 2)
          /* Look for a case where a reg does not need restoring.  */
!         if ((!df_regs_ever_live_p (i) || call_used_regs[i])
              && (!df_regs_ever_live_p (i + 1)
!                 || call_used_regs[i + 1]))
            {
              if (start_reg != i)
                arm_emit_vfp_multi_reg_pop (start_reg,
--- 27083,27091 ----
  
        for (i = FIRST_VFP_REGNUM; i < LAST_VFP_REGNUM; i += 2)
          /* Look for a case where a reg does not need restoring.  */
!         if ((!df_regs_ever_live_p (i) || call_used_or_fixed_reg_p (i))
              && (!df_regs_ever_live_p (i + 1)
!                 || call_used_or_fixed_reg_p (i + 1)))
            {
              if (start_reg != i)
                arm_emit_vfp_multi_reg_pop (start_reg,
*************** arm_expand_epilogue_apcs_frame (bool rea
*** 25875,25881 ****
        int lrm_count = (num_regs % 2) ? (num_regs + 2) : (num_regs + 1);
  
        for (i = LAST_IWMMXT_REGNUM; i >= FIRST_IWMMXT_REGNUM; i--)
!         if (df_regs_ever_live_p (i) && !call_used_regs[i])
            {
              rtx addr = gen_frame_mem (V2SImode,
                                   plus_constant (Pmode, hard_frame_pointer_rtx,
--- 27112,27118 ----
        int lrm_count = (num_regs % 2) ? (num_regs + 2) : (num_regs + 1);
  
        for (i = LAST_IWMMXT_REGNUM; i >= FIRST_IWMMXT_REGNUM; i--)
!         if (df_regs_ever_live_p (i) && !call_used_or_fixed_reg_p (i))
            {
              rtx addr = gen_frame_mem (V2SImode,
                                   plus_constant (Pmode, hard_frame_pointer_rtx,
*************** arm_expand_epilogue (bool really_return)
*** 26069,26075 ****
          }
      }
  
!   if (TARGET_HARD_FLOAT)
      {
        /* Generate VFP register multi-pop.  */
        int end_reg = LAST_VFP_REGNUM + 1;
--- 27306,27312 ----
          }
      }
  
!   if (TARGET_VFP_BASE)
      {
        /* Generate VFP register multi-pop.  */
        int end_reg = LAST_VFP_REGNUM + 1;
*************** arm_expand_epilogue (bool really_return)
*** 26080,26088 ****
           unlike pop, vldm can only do consecutive regs.  */
        for (i = LAST_VFP_REGNUM - 1; i >= FIRST_VFP_REGNUM; i -= 2)
          /* Look for a case where a reg does not need restoring.  */
!         if ((!df_regs_ever_live_p (i) || call_used_regs[i])
              && (!df_regs_ever_live_p (i + 1)
!                 || call_used_regs[i + 1]))
            {
              /* Restore the regs discovered so far (from reg+2 to
                 end_reg).  */
--- 27317,27325 ----
           unlike pop, vldm can only do consecutive regs.  */
        for (i = LAST_VFP_REGNUM - 1; i >= FIRST_VFP_REGNUM; i -= 2)
          /* Look for a case where a reg does not need restoring.  */
!         if ((!df_regs_ever_live_p (i) || call_used_or_fixed_reg_p (i))
              && (!df_regs_ever_live_p (i + 1)
!                 || call_used_or_fixed_reg_p (i + 1)))
            {
              /* Restore the regs discovered so far (from reg+2 to
                 end_reg).  */
*************** arm_expand_epilogue (bool really_return)
*** 26104,26110 ****
  
    if (TARGET_IWMMXT)
      for (i = FIRST_IWMMXT_REGNUM; i <= LAST_IWMMXT_REGNUM; i++)
!       if (df_regs_ever_live_p (i) && !call_used_regs[i])
          {
            rtx_insn *insn;
            rtx addr = gen_rtx_MEM (V2SImode,
--- 27341,27347 ----
  
    if (TARGET_IWMMXT)
      for (i = FIRST_IWMMXT_REGNUM; i <= LAST_IWMMXT_REGNUM; i++)
!       if (df_regs_ever_live_p (i) && !call_used_or_fixed_reg_p (i))
          {
            rtx_insn *insn;
            rtx addr = gen_rtx_MEM (V2SImode,
*************** arm_expand_epilogue (bool really_return)
*** 26223,26235 ****
  				   stack_pointer_rtx, stack_pointer_rtx);
      }
  
!     /* Clear all caller-saved regs that are not used to return.  */
!     if (IS_CMSE_ENTRY (arm_current_func_type ()))
!       {
! 	/* CMSE_ENTRY always returns.  */
! 	gcc_assert (really_return);
! 	cmse_nonsecure_entry_clear_before_return ();
!       }
  
    if (!really_return)
      return;
--- 27460,27486 ----
  				   stack_pointer_rtx, stack_pointer_rtx);
      }
  
!   if (IS_CMSE_ENTRY (func_type))
!     {
!       /* CMSE_ENTRY always returns.  */
!       gcc_assert (really_return);
!       /* Clear all caller-saved regs that are not used to return.  */
!       cmse_nonsecure_entry_clear_before_return ();
! 
!       /* Armv8.1-M Mainline nonsecure entry: restore FPCXTNS from stack using
! 	 VLDR.  */
!       if (TARGET_HAVE_FPCXT_CMSE)
! 	{
! 	  rtx_insn *insn;
! 
! 	  insn = emit_insn (gen_pop_fpsysreg_insn (stack_pointer_rtx,
! 						   GEN_INT (FPCXTNS_ENUM)));
! 	  rtx dwarf = gen_rtx_SET (stack_pointer_rtx,
! 				  plus_constant (Pmode, stack_pointer_rtx, 4));
! 	  add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf);
! 	  RTX_FRAME_RELATED_P (insn) = 1;
! 	}
!     }
  
    if (!really_return)
      return;
*************** thumb_call_via_reg (rtx reg)
*** 26468,26474 ****
  
  /* Routines for generating rtl.  */
  void
! thumb_expand_movmemqi (rtx *operands)
  {
    rtx out = copy_to_mode_reg (SImode, XEXP (operands[0], 0));
    rtx in  = copy_to_mode_reg (SImode, XEXP (operands[1], 0));
--- 27719,27725 ----
  
  /* Routines for generating rtl.  */
  void
! thumb_expand_cpymemqi (rtx *operands)
  {
    rtx out = copy_to_mode_reg (SImode, XEXP (operands[0], 0));
    rtx in  = copy_to_mode_reg (SImode, XEXP (operands[1], 0));
*************** thumb_expand_movmemqi (rtx *operands)
*** 26477,26489 ****
  
    while (len >= 12)
      {
!       emit_insn (gen_movmem12b (out, in, out, in));
        len -= 12;
      }
  
    if (len >= 8)
      {
!       emit_insn (gen_movmem8b (out, in, out, in));
        len -= 8;
      }
  
--- 27728,27740 ----
  
    while (len >= 12)
      {
!       emit_insn (gen_cpymem12b (out, in, out, in));
        len -= 12;
      }
  
    if (len >= 8)
      {
!       emit_insn (gen_cpymem8b (out, in, out, in));
        len -= 8;
      }
  
*************** arm_print_tune_info (void)
*** 26631,26639 ****
  	       (int) current_tune->logical_op_non_short_circuit_thumb,
  	       (int) current_tune->logical_op_non_short_circuit_arm);
    asm_fprintf (asm_out_file, "\t\t" ASM_COMMENT_START
- 	       "prefer_neon_for_64bits:\t%d\n",
- 	       (int) current_tune->prefer_neon_for_64bits);
-   asm_fprintf (asm_out_file, "\t\t" ASM_COMMENT_START
  	       "disparage_flag_setting_t16_encodings:\t%d\n",
  	       (int) current_tune->disparage_flag_setting_t16_encodings);
    asm_fprintf (asm_out_file, "\t\t" ASM_COMMENT_START
--- 27882,27887 ----
*************** arm_print_asm_arch_directives ()
*** 26673,26684 ****
  	{
  	  arm_initialize_isa (opt_bits, opt->isa_bits);
  
  	  /* If every feature bit of this option is set in the target
  	     ISA specification, print out the option name.  However,
  	     don't print anything if all the bits are part of the
  	     FPU specification.  */
  	  if (bitmap_subset_p (opt_bits, arm_active_target.isa)
! 	      && !bitmap_subset_p (opt_bits, isa_all_fpubits))
  	    asm_fprintf (asm_out_file, "\t.arch_extension %s\n", opt->name);
  	}
      }
--- 27921,27946 ----
  	{
  	  arm_initialize_isa (opt_bits, opt->isa_bits);
  
+ 	  /* For the cases "-march=armv8.1-m.main+mve -mfloat-abi=soft" and
+ 	     "-march=armv8.1-m.main+mve.fp -mfloat-abi=soft" MVE and MVE with
+ 	     floating point instructions is disabled.  So the following check
+ 	     restricts the printing of ".arch_extension mve" and
+ 	     ".arch_extension fp" (for mve.fp) in the assembly file.  MVE needs
+ 	     this special behaviour because the feature bit "mve" and
+ 	     "mve_float" are not part of "fpu bits", so they are not cleared
+ 	     when -mfloat-abi=soft (i.e nofp) but the marco TARGET_HAVE_MVE and
+ 	     TARGET_HAVE_MVE_FLOAT are disabled.  */
+ 	  if ((bitmap_bit_p (opt_bits, isa_bit_mve) && !TARGET_HAVE_MVE)
+ 	      || (bitmap_bit_p (opt_bits, isa_bit_mve_float)
+ 		  && !TARGET_HAVE_MVE_FLOAT))
+ 	    continue;
+ 
  	  /* If every feature bit of this option is set in the target
  	     ISA specification, print out the option name.  However,
  	     don't print anything if all the bits are part of the
  	     FPU specification.  */
  	  if (bitmap_subset_p (opt_bits, arm_active_target.isa)
! 	      && !bitmap_subset_p (opt_bits, isa_all_fpubits_internal))
  	    asm_fprintf (asm_out_file, "\t.arch_extension %s\n", opt->name);
  	}
      }
*************** arm_file_start (void)
*** 26724,26730 ****
  	{
  	  const char* truncated_name
  	    = arm_rewrite_selected_cpu (arm_active_target.core_name);
! 	  asm_fprintf (asm_out_file, "\t.cpu %s\n", truncated_name);
  	}
  
        if (print_tune_info)
--- 27986,27996 ----
  	{
  	  const char* truncated_name
  	    = arm_rewrite_selected_cpu (arm_active_target.core_name);
! 	  if (bitmap_bit_p (arm_active_target.isa, isa_bit_quirk_no_asmcpu))
! 	    asm_fprintf (asm_out_file, "\t.eabi_attribute 5, \"%s\"\n",
! 			 truncated_name);
! 	  else
! 	    asm_fprintf (asm_out_file, "\t.cpu %s\n", truncated_name);
  	}
  
        if (print_tune_info)
*************** static void
*** 27097,27106 ****
--- 28363,28376 ----
  arm_output_mi_thunk (FILE *file, tree thunk, HOST_WIDE_INT delta,
  		     HOST_WIDE_INT vcall_offset, tree function)
  {
+   const char *fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunk));
+ 
+   assemble_start_function (thunk, fnname);
    if (TARGET_32BIT)
      arm32_output_mi_thunk (file, thunk, delta, vcall_offset, function);
    else
      arm_thumb1_mi_thunk (file, thunk, delta, vcall_offset, function);
+   assemble_end_function (thunk, fnname);
  }
  
  int
*************** arm_output_load_gr (rtx *operands)
*** 27184,27191 ****
  
  static void
  arm_setup_incoming_varargs (cumulative_args_t pcum_v,
! 			    machine_mode mode,
! 			    tree type,
  			    int *pretend_size,
  			    int second_time ATTRIBUTE_UNUSED)
  {
--- 28454,28460 ----
  
  static void
  arm_setup_incoming_varargs (cumulative_args_t pcum_v,
! 			    const function_arg_info &arg,
  			    int *pretend_size,
  			    int second_time ATTRIBUTE_UNUSED)
  {
*************** arm_setup_incoming_varargs (cumulative_a
*** 27198,27214 ****
        nregs = pcum->aapcs_ncrn;
        if (nregs & 1)
  	{
! 	  int res = arm_needs_doubleword_align (mode, type);
  	  if (res < 0 && warn_psabi)
  	    inform (input_location, "parameter passing for argument of "
! 		    "type %qT changed in GCC 7.1", type);
  	  else if (res > 0)
  	    {
  	      nregs++;
  	      if (res > 1 && warn_psabi)
  		inform (input_location,
  			"parameter passing for argument of type "
! 			"%qT changed in GCC 9.1", type);
  	    }
  	}
      }
--- 28467,28483 ----
        nregs = pcum->aapcs_ncrn;
        if (nregs & 1)
  	{
! 	  int res = arm_needs_doubleword_align (arg.mode, arg.type);
  	  if (res < 0 && warn_psabi)
  	    inform (input_location, "parameter passing for argument of "
! 		    "type %qT changed in GCC 7.1", arg.type);
  	  else if (res > 0)
  	    {
  	      nregs++;
  	      if (res > 1 && warn_psabi)
  		inform (input_location,
  			"parameter passing for argument of type "
! 			"%qT changed in GCC 9.1", arg.type);
  	    }
  	}
      }
*************** arm_vector_mode_supported_p (machine_mod
*** 27464,27470 ****
    /* Neon also supports V2SImode, etc. listed in the clause below.  */
    if (TARGET_NEON && (mode == V2SFmode || mode == V4SImode || mode == V8HImode
        || mode == V4HFmode || mode == V16QImode || mode == V4SFmode
!       || mode == V2DImode || mode == V8HFmode))
      return true;
  
    if ((TARGET_NEON || TARGET_IWMMXT)
--- 28733,28740 ----
    /* Neon also supports V2SImode, etc. listed in the clause below.  */
    if (TARGET_NEON && (mode == V2SFmode || mode == V4SImode || mode == V8HImode
        || mode == V4HFmode || mode == V16QImode || mode == V4SFmode
!       || mode == V2DImode || mode == V8HFmode || mode == V4BFmode
!       || mode == V8BFmode))
      return true;
  
    if ((TARGET_NEON || TARGET_IWMMXT)
*************** arm_vector_mode_supported_p (machine_mod
*** 27478,27483 ****
--- 28748,28762 ----
        || mode == V2HAmode))
      return true;
  
+   if (TARGET_HAVE_MVE
+       && (mode == V2DImode || mode == V4SImode || mode == V8HImode
+ 	  || mode == V16QImode))
+       return true;
+ 
+   if (TARGET_HAVE_MVE_FLOAT
+       && (mode == V2DFmode || mode == V4SFmode || mode == V8HFmode))
+       return true;
+ 
    return false;
  }
  
*************** arm_array_mode_supported_p (machine_mode
*** 27495,27500 ****
--- 28774,28783 ----
        && (nelems >= 2 && nelems <= 4))
      return true;
  
+   if (TARGET_HAVE_MVE && !BYTES_BIG_ENDIAN
+       && VALID_MVE_MODE (mode) && (nelems == 2 || nelems == 4))
+     return true;
+ 
    return false;
  }
  
*************** arm_emit_tls_decoration (FILE *fp, rtx x
*** 28040,28054 ****
--- 29323,29346 ----
      case TLS_GD32:
        fputs ("(tlsgd)", fp);
        break;
+     case TLS_GD32_FDPIC:
+       fputs ("(tlsgd_fdpic)", fp);
+       break;
      case TLS_LDM32:
        fputs ("(tlsldm)", fp);
        break;
+     case TLS_LDM32_FDPIC:
+       fputs ("(tlsldm_fdpic)", fp);
+       break;
      case TLS_LDO32:
        fputs ("(tlsldo)", fp);
        break;
      case TLS_IE32:
        fputs ("(gottpoff)", fp);
        break;
+     case TLS_IE32_FDPIC:
+       fputs ("(gottpoff_fdpic)", fp);
+       break;
      case TLS_LE32:
        fputs ("(tpoff)", fp);
        break;
*************** arm_issue_rate (void)
*** 28316,28321 ****
--- 29608,29630 ----
    return current_tune->issue_rate;
  }
  
+ /* Implement TARGET_SCHED_VARIABLE_ISSUE.  */
+ static int
+ arm_sched_variable_issue (FILE *, int, rtx_insn *insn, int more)
+ {
+   if (DEBUG_INSN_P (insn))
+     return more;
+ 
+   rtx_code code = GET_CODE (PATTERN (insn));
+   if (code == USE || code == CLOBBER)
+     return more;
+ 
+   if (get_attr_type (insn) == TYPE_NO_INSN)
+     return more;
+ 
+   return more - 1;
+ }
+ 
  /* Return how many instructions should scheduler lookahead to choose the
     best one.  */
  static int
*************** arm_mangle_type (const_tree type)
*** 28342,28350 ****
        && lang_hooks.types_compatible_p (CONST_CAST_TREE (type), va_list_type))
      return "St9__va_list";
  
!   /* Half-precision float.  */
    if (TREE_CODE (type) == REAL_TYPE && TYPE_PRECISION (type) == 16)
!     return "Dh";
  
    /* Try mangling as a Neon type, TYPE_NAME is non-NULL if this is a
       builtin type.  */
--- 29651,29664 ----
        && lang_hooks.types_compatible_p (CONST_CAST_TREE (type), va_list_type))
      return "St9__va_list";
  
!   /* Half-precision floating point types.  */
    if (TREE_CODE (type) == REAL_TYPE && TYPE_PRECISION (type) == 16)
!     {
!       if (TYPE_MODE (type) == BFmode)
! 	return "u6__bf16";
!       else
! 	return "Dh";
!     }
  
    /* Try mangling as a Neon type, TYPE_NAME is non-NULL if this is a
       builtin type.  */
*************** arm_vector_alignment (const_tree type)
*** 28446,28459 ****
    return align;
  }
  
! static void
! arm_autovectorize_vector_sizes (vector_sizes *sizes)
  {
    if (!TARGET_NEON_VECTORIZE_DOUBLE)
      {
!       sizes->safe_push (16);
!       sizes->safe_push (8);
      }
  }
  
  static bool
--- 29760,29774 ----
    return align;
  }
  
! static unsigned int
! arm_autovectorize_vector_modes (vector_modes *modes, bool)
  {
    if (!TARGET_NEON_VECTORIZE_DOUBLE)
      {
!       modes->safe_push (V16QImode);
!       modes->safe_push (V8QImode);
      }
+   return 0;
  }
  
  static bool
*************** arm_conditional_register_usage (void)
*** 28515,28521 ****
    if (TARGET_THUMB1)
      fixed_regs[LR_REGNUM] = call_used_regs[LR_REGNUM] = 1;
  
!   if (TARGET_32BIT && TARGET_HARD_FLOAT)
      {
        /* VFPv3 registers are disabled when earlier VFP
  	 versions are selected due to the definition of
--- 29830,29836 ----
    if (TARGET_THUMB1)
      fixed_regs[LR_REGNUM] = call_used_regs[LR_REGNUM] = 1;
  
!   if (TARGET_32BIT && TARGET_VFP_BASE)
      {
        /* VFPv3 registers are disabled when earlier VFP
  	 versions are selected due to the definition of
*************** arm_conditional_register_usage (void)
*** 28527,28532 ****
--- 29842,29849 ----
  	  call_used_regs[regno] = regno < FIRST_VFP_REGNUM + 16
  	    || regno >= FIRST_VFP_REGNUM + 32;
  	}
+       if (TARGET_HAVE_MVE)
+ 	fixed_regs[VPR_REGNUM] = 0;
      }
  
    if (TARGET_REALLY_IWMMXT && !TARGET_GENERAL_REGS_ONLY)
*************** arm_conditional_register_usage (void)
*** 28571,28576 ****
--- 29888,29898 ----
        if (TARGET_CALLER_INTERWORKING)
  	global_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1;
      }
+ 
+   /* The Q and GE bits are only accessed via special ACLE patterns.  */
+   CLEAR_HARD_REG_BIT (operand_reg_set, APSRQ_REGNUM);
+   CLEAR_HARD_REG_BIT (operand_reg_set, APSRGE_REGNUM);
+ 
    SUBTARGET_CONDITIONAL_REGISTER_USAGE
  }
  
*************** arm_emit_coreregs_64bit_shift (enum rtx_
*** 29915,29921 ****
    else
      {
        /* We have a shift-by-register.  */
!       rtx cc_reg = gen_rtx_REG (CC_NOOVmode, CC_REGNUM);
  
        /* This alternative requires the scratch registers.  */
        gcc_assert (scratch1 && REG_P (scratch1));
--- 31237,31243 ----
    else
      {
        /* We have a shift-by-register.  */
!       rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
  
        /* This alternative requires the scratch registers.  */
        gcc_assert (scratch1 && REG_P (scratch1));
*************** arm_validize_comparison (rtx *comparison
*** 30089,30098 ****
        return true;
  
      case E_DImode:
!       if (!cmpdi_operand (*op1, mode))
! 	*op1 = force_reg (mode, *op1);
!       if (!cmpdi_operand (*op2, mode))
! 	*op2 = force_reg (mode, *op2);
        return true;
  
      case E_HFmode:
--- 31411,31417 ----
        return true;
  
      case E_DImode:
!       /* gen_compare_reg() will sort out any invalid operands.  */
        return true;
  
      case E_HFmode:
*************** arm_block_set_aligned_vect (rtx dstbase,
*** 30368,30374 ****
      {
        addr = plus_constant (Pmode, dst, i);
        mem = adjust_automodify_address (dstbase, mode, addr, offset + i);
!       emit_move_insn (mem, reg);
      }
  
    /* Handle single word leftover by shifting 4 bytes back.  We can
--- 31687,31696 ----
      {
        addr = plus_constant (Pmode, dst, i);
        mem = adjust_automodify_address (dstbase, mode, addr, offset + i);
!       if (MEM_ALIGN (mem) >= 2 * BITS_PER_WORD)
! 	emit_move_insn (mem, reg);
!       else
! 	emit_insn (gen_unaligned_storev8qi (mem, reg));
      }
  
    /* Handle single word leftover by shifting 4 bytes back.  We can
*************** arm_block_set_aligned_vect (rtx dstbase,
*** 30382,30388 ****
        if (align > UNITS_PER_WORD)
  	set_mem_align (mem, BITS_PER_UNIT * UNITS_PER_WORD);
  
!       emit_move_insn (mem, reg);
      }
    /* Handle (0, 4), (4, 8) bytes leftover by shifting bytes back.
       We have to use unaligned access for this case.  */
--- 31704,31710 ----
        if (align > UNITS_PER_WORD)
  	set_mem_align (mem, BITS_PER_UNIT * UNITS_PER_WORD);
  
!       emit_insn (gen_unaligned_storev8qi (mem, reg));
      }
    /* Handle (0, 4), (4, 8) bytes leftover by shifting bytes back.
       We have to use unaligned access for this case.  */
*************** arm_block_set_aligned_non_vect (rtx dstb
*** 30516,30522 ****
  	{
  	  addr = plus_constant (Pmode, dst, i);
  	  mem = adjust_automodify_address (dstbase, DImode, addr, i);
! 	  emit_move_insn (mem, reg);
  	}
      }
    else
--- 31838,31847 ----
  	{
  	  addr = plus_constant (Pmode, dst, i);
  	  mem = adjust_automodify_address (dstbase, DImode, addr, i);
! 	  if (MEM_ALIGN (mem) >= 2 * BITS_PER_WORD)
! 	    emit_move_insn (mem, reg);
! 	  else
! 	    emit_insn (gen_unaligned_storedi (mem, reg));
  	}
      }
    else
*************** aarch_macro_fusion_pair_p (rtx_insn* pre
*** 30702,30711 ****
    if (!arm_macro_fusion_p ())
      return false;
  
-   if (current_tune->fusible_ops & tune_params::FUSE_AES_AESMC
-       && aarch_crypto_can_dual_issue (prev, curr))
-     return true;
- 
    if (current_tune->fusible_ops & tune_params::FUSE_MOVW_MOVT
        && arm_sets_movw_movt_fusible_p (prev_set, curr_set))
      return true;
--- 32027,32032 ----
*************** arm_valid_target_attribute_rec (tree arg
*** 30998,31004 ****
      {
        argstr = NULL;
        if (!strcmp (q, "thumb"))
! 	opts->x_target_flags |= MASK_THUMB;
  
        else if (!strcmp (q, "arm"))
  	opts->x_target_flags &= ~MASK_THUMB;
--- 32319,32329 ----
      {
        argstr = NULL;
        if (!strcmp (q, "thumb"))
! 	{
! 	  opts->x_target_flags |= MASK_THUMB;
! 	  if (TARGET_FDPIC && !arm_arch_thumb2)
! 	    sorry ("FDPIC mode is not supported in Thumb-1 mode");
! 	}
  
        else if (!strcmp (q, "arm"))
  	opts->x_target_flags &= ~MASK_THUMB;
*************** arm_valid_target_attribute_p (tree fndec
*** 31168,31175 ****
  
    DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl) = new_optimize;
  
-   finalize_options_struct (&func_options);
- 
    return ret;
  }
  
--- 32493,32498 ----
*************** arm_identify_fpu_from_isa (sbitmap isa)
*** 31182,31188 ****
    auto_sbitmap fpubits (isa_num_bits);
    auto_sbitmap cand_fpubits (isa_num_bits);
  
!   bitmap_and (fpubits, isa, isa_all_fpubits);
  
    /* If there are no ISA feature bits relating to the FPU, we must be
       doing soft-float.  */
--- 32505,32511 ----
    auto_sbitmap fpubits (isa_num_bits);
    auto_sbitmap cand_fpubits (isa_num_bits);
  
!   bitmap_and (fpubits, isa, isa_all_fpubits_internal);
  
    /* If there are no ISA feature bits relating to the FPU, we must be
       doing soft-float.  */
*************** arm_declare_function_name (FILE *stream,
*** 31241,31248 ****
  	      if (!opt->remove)
  		{
  		  arm_initialize_isa (opt_bits, opt->isa_bits);
  		  if (bitmap_subset_p (opt_bits, arm_active_target.isa)
! 		      && !bitmap_subset_p (opt_bits, isa_all_fpubits))
  		    asm_fprintf (asm_out_file, "\t.arch_extension %s\n",
  				 opt->name);
  		}
--- 32564,32585 ----
  	      if (!opt->remove)
  		{
  		  arm_initialize_isa (opt_bits, opt->isa_bits);
+ 		  /* For the cases "-march=armv8.1-m.main+mve -mfloat-abi=soft"
+ 		     and "-march=armv8.1-m.main+mve.fp -mfloat-abi=soft" MVE and
+ 		     MVE with floating point instructions is disabled.  So the
+ 		     following check restricts the printing of ".arch_extension
+ 		     mve" and ".arch_extension fp" (for mve.fp) in the assembly
+ 		     file.    MVE needs this special behaviour because the
+ 		     feature bit "mve" and "mve_float" are not part of
+ 		     "fpu bits", so they are not cleared when -mfloat-abi=soft
+ 		     (i.e nofp) but the marco TARGET_HAVE_MVE and
+ 		     TARGET_HAVE_MVE_FLOAT are disabled.  */
+ 		  if ((bitmap_bit_p (opt_bits, isa_bit_mve) && !TARGET_HAVE_MVE)
+ 		      || (bitmap_bit_p (opt_bits, isa_bit_mve_float)
+ 			  && !TARGET_HAVE_MVE_FLOAT))
+ 		    continue;
  		  if (bitmap_subset_p (opt_bits, arm_active_target.isa)
! 		      && !bitmap_subset_p (opt_bits, isa_all_fpubits_internal))
  		    asm_fprintf (asm_out_file, "\t.arch_extension %s\n",
  				 opt->name);
  		}
*************** arm_declare_function_name (FILE *stream,
*** 31272,31278 ****
      = TARGET_SOFT_FLOAT
  	? "softvfp" : arm_identify_fpu_from_isa (arm_active_target.isa);
  
!   if (fpu_to_print != arm_last_printed_arch_string)
      {
        asm_fprintf (asm_out_file, "\t.fpu %s\n", fpu_to_print.c_str ());
        arm_last_printed_fpu_string = fpu_to_print;
--- 32609,32616 ----
      = TARGET_SOFT_FLOAT
  	? "softvfp" : arm_identify_fpu_from_isa (arm_active_target.isa);
  
!   if (!(!strcmp (fpu_to_print.c_str (), "softvfp") && TARGET_VFP_BASE)
!       && (fpu_to_print != arm_last_printed_arch_string))
      {
        asm_fprintf (asm_out_file, "\t.fpu %s\n", fpu_to_print.c_str ());
        arm_last_printed_fpu_string = fpu_to_print;
*************** arm_coproc_ldc_stc_legitimate_address (r
*** 31754,31759 ****
--- 33092,33146 ----
    return false;
  }
  
+ /* Return the diagnostic message string if conversion from FROMTYPE to
+    TOTYPE is not allowed, NULL otherwise.  */
+ 
+ static const char *
+ arm_invalid_conversion (const_tree fromtype, const_tree totype)
+ {
+   if (element_mode (fromtype) != element_mode (totype))
+     {
+       /* Do no allow conversions to/from BFmode scalar types.  */
+       if (TYPE_MODE (fromtype) == BFmode)
+ 	return N_("invalid conversion from type %<bfloat16_t%>");
+       if (TYPE_MODE (totype) == BFmode)
+ 	return N_("invalid conversion to type %<bfloat16_t%>");
+     }
+ 
+   /* Conversion allowed.  */
+   return NULL;
+ }
+ 
+ /* Return the diagnostic message string if the unary operation OP is
+    not permitted on TYPE, NULL otherwise.  */
+ 
+ static const char *
+ arm_invalid_unary_op (int op, const_tree type)
+ {
+   /* Reject all single-operand operations on BFmode except for &.  */
+   if (element_mode (type) == BFmode && op != ADDR_EXPR)
+     return N_("operation not permitted on type %<bfloat16_t%>");
+ 
+   /* Operation allowed.  */
+   return NULL;
+ }
+ 
+ /* Return the diagnostic message string if the binary operation OP is
+    not permitted on TYPE1 and TYPE2, NULL otherwise.  */
+ 
+ static const char *
+ arm_invalid_binary_op (int op ATTRIBUTE_UNUSED, const_tree type1,
+ 			   const_tree type2)
+ {
+   /* Reject all 2-operand operations on BFmode.  */
+   if (element_mode (type1) == BFmode
+       || element_mode (type2) == BFmode)
+     return N_("operation not permitted on type %<bfloat16_t%>");
+ 
+   /* Operation allowed.  */
+   return NULL;
+ }
+ 
  /* Implement TARGET_CAN_CHANGE_MODE_CLASS.
  
     In VFPv1, VFP registers could only be accessed in the mode they were
*************** arm_emit_speculation_barrier_function ()
*** 31803,31808 ****
--- 33190,33215 ----
    emit_library_call (speculation_barrier_libfunc, LCT_NORMAL, VOIDmode);
  }
  
+ /* Have we recorded an explicit access to the Q bit of APSR?.  */
+ bool
+ arm_q_bit_access (void)
+ {
+   if (cfun && cfun->decl)
+     return lookup_attribute ("acle qbit",
+ 			     DECL_ATTRIBUTES (cfun->decl));
+   return true;
+ }
+ 
+ /* Have we recorded an explicit access to the GE bits of PSTATE?.  */
+ bool
+ arm_ge_bits_access (void)
+ {
+   if (cfun && cfun->decl)
+     return lookup_attribute ("acle gebits",
+ 			     DECL_ATTRIBUTES (cfun->decl));
+   return true;
+ }
+ 
  #if CHECKING_P
  namespace selftest {
  
*************** arm_test_cpu_arch_data (void)
*** 31895,31922 ****
  static void
  arm_test_fpu_data (void)
  {
!   auto_sbitmap isa_all_fpubits (isa_num_bits);
    auto_sbitmap fpubits (isa_num_bits);
    auto_sbitmap tmpset (isa_num_bits);
  
!   static const enum isa_feature fpu_bitlist[]
      = { ISA_ALL_FPU_INTERNAL, isa_nobit };
!   arm_initialize_isa (isa_all_fpubits, fpu_bitlist);
  
    for (unsigned int i = 0; i < TARGET_FPU_auto; i++)
    {
      arm_initialize_isa (fpubits, all_fpus[i].isa_bits);
!     bitmap_and_compl (tmpset, isa_all_fpubits, fpubits);
!     bitmap_clear (isa_all_fpubits);
!     bitmap_copy (isa_all_fpubits, tmpset);
    }
  
!   if (!bitmap_empty_p (isa_all_fpubits))
      {
  	fprintf (stderr, "Error: found feature bits in the ALL_FPU_INTERAL"
  			 " group that are not defined by any FPU.\n"
  			 "       Check your arm-cpus.in.\n");
! 	ASSERT_TRUE (bitmap_empty_p (isa_all_fpubits));
      }
  }
  
--- 33302,33329 ----
  static void
  arm_test_fpu_data (void)
  {
!   auto_sbitmap isa_all_fpubits_internal (isa_num_bits);
    auto_sbitmap fpubits (isa_num_bits);
    auto_sbitmap tmpset (isa_num_bits);
  
!   static const enum isa_feature fpu_bitlist_internal[]
      = { ISA_ALL_FPU_INTERNAL, isa_nobit };
!   arm_initialize_isa (isa_all_fpubits_internal, fpu_bitlist_internal);
  
    for (unsigned int i = 0; i < TARGET_FPU_auto; i++)
    {
      arm_initialize_isa (fpubits, all_fpus[i].isa_bits);
!     bitmap_and_compl (tmpset, isa_all_fpubits_internal, fpubits);
!     bitmap_clear (isa_all_fpubits_internal);
!     bitmap_copy (isa_all_fpubits_internal, tmpset);
    }
  
!   if (!bitmap_empty_p (isa_all_fpubits_internal))
      {
  	fprintf (stderr, "Error: found feature bits in the ALL_FPU_INTERAL"
  			 " group that are not defined by any FPU.\n"
  			 "       Check your arm-cpus.in.\n");
! 	ASSERT_TRUE (bitmap_empty_p (isa_all_fpubits_internal));
      }
  }
  
*************** arm_run_selftests (void)
*** 31932,31937 ****
--- 33339,33394 ----
  #define TARGET_RUN_TARGET_SELFTESTS selftest::arm_run_selftests
  #endif /* CHECKING_P */
  
+ /* Worker function for TARGET_MD_ASM_ADJUST, while in thumb1 mode.
+    Unlike the arm version, we do NOT implement asm flag outputs.  */
+ 
+ rtx_insn *
+ thumb1_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
+ 		      vec<const char *> &constraints,
+ 		      vec<rtx> &/*clobbers*/, HARD_REG_SET &/*clobbered_regs*/)
+ {
+   for (unsigned i = 0, n = outputs.length (); i < n; ++i)
+     if (strncmp (constraints[i], "=@cc", 4) == 0)
+       {
+ 	sorry ("asm flags not supported in thumb1 mode");
+ 	break;
+       }
+   return NULL;
+ }
+ 
+ /* Generate code to enable conditional branches in functions over 1 MiB.
+    Parameters are:
+      operands: is the operands list of the asm insn (see arm_cond_branch or
+        arm_cond_branch_reversed).
+      pos_label: is an index into the operands array where operands[pos_label] is
+        the asm label of the final jump destination.
+      dest: is a string which is used to generate the asm label of the intermediate
+        destination
+    branch_format: is a string denoting the intermediate branch format, e.g.
+      "beq", "bne", etc.  */
+ 
+ const char *
+ arm_gen_far_branch (rtx * operands, int pos_label, const char * dest,
+ 		    const char * branch_format)
+ {
+   rtx_code_label * tmp_label = gen_label_rtx ();
+   char label_buf[256];
+   char buffer[128];
+   ASM_GENERATE_INTERNAL_LABEL (label_buf, dest , \
+ 			CODE_LABEL_NUMBER (tmp_label));
+   const char *label_ptr = arm_strip_name_encoding (label_buf);
+   rtx dest_label = operands[pos_label];
+   operands[pos_label] = tmp_label;
+ 
+   snprintf (buffer, sizeof (buffer), "%s%s", branch_format , label_ptr);
+   output_asm_insn (buffer, operands);
+ 
+   snprintf (buffer, sizeof (buffer), "b\t%%l0%d\n%s:", pos_label, label_ptr);
+   operands[pos_label] = dest_label;
+   output_asm_insn (buffer, operands);
+   return "";
+ }
+ 
  struct gcc_target targetm = TARGET_INITIALIZER;
  
  #include "gt-arm.h"
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm.h gcc-10.1.0/gcc/config/arm/arm.h
*** gcc-9.3.0/gcc/config/arm/arm.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, for ARM.
!    Copyright (C) 1991-2019 Free Software Foundation, Inc.
     Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
     and Martin Simmons (@harleqn.co.uk).
     More major hacks by Richard Earnshaw (rearnsha@arm.com)
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, for ARM.
!    Copyright (C) 1991-2020 Free Software Foundation, Inc.
     Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
     and Martin Simmons (@harleqn.co.uk).
     More major hacks by Richard Earnshaw (rearnsha@arm.com)
*************** extern void (*arm_lang_output_object_att
*** 81,86 ****
--- 81,91 ----
     the backend.  Defined in arm-builtins.c.  */
  extern tree arm_fp16_type_node;
  
+ /* This type is the user-visible __bf16.  We need it in a few places in
+    the backend.  Defined in arm-builtins.c.  */
+ extern tree arm_bf16_type_node;
+ extern tree arm_bf16_ptr_type_node;
+ 
  
  #undef  CPP_SPEC
  #define CPP_SPEC "%(subtarget_cpp_spec)					\
*************** emission of floating point pcs attribute
*** 246,251 ****
--- 251,265 ----
  /* FPU supports the AdvSIMD FP16 instructions for ARMv8.2 and later.  */
  #define TARGET_NEON_FP16INST (TARGET_VFP_FP16INST && TARGET_NEON_RDMA)
  
+ /* FPU supports 8-bit Integer Matrix Multiply (I8MM) AdvSIMD extensions.  */
+ #define TARGET_I8MM (TARGET_NEON && arm_arch8_2 && arm_arch_i8mm)
+ 
+ /* FPU supports Brain half-precision floating-point (BFloat16) extension.  */
+ #define TARGET_BF16_FP (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP5 \
+ 			&& arm_arch8_2 && arm_arch_bf16)
+ #define TARGET_BF16_SIMD (TARGET_NEON && TARGET_VFP5 \
+ 			  && arm_arch8_2 && arm_arch_bf16)
+ 
  /* Q-bit is present.  */
  #define TARGET_ARM_QBIT \
    (TARGET_32BIT && arm_arch5te && (arm_arch_notm || arm_arch7))
*************** emission of floating point pcs attribute
*** 306,311 ****
--- 320,352 ----
  /* Nonzero if this chip provides the CBZ and CBNZ instructions.  */
  #define TARGET_HAVE_CBZ		(arm_arch_thumb2 || arm_arch8)
  
+ /* Nonzero if this chip provides Armv8.1-M Mainline Security extensions
+    instructions (most are floating-point related).  */
+ #define TARGET_HAVE_FPCXT_CMSE	(arm_arch8_1m_main)
+ 
+ #define TARGET_HAVE_MVE (arm_float_abi != ARM_FLOAT_ABI_SOFT \
+ 			 && bitmap_bit_p (arm_active_target.isa, \
+ 					  isa_bit_mve) \
+ 			 && !TARGET_GENERAL_REGS_ONLY)
+ 
+ #define TARGET_HAVE_MVE_FLOAT (arm_float_abi != ARM_FLOAT_ABI_SOFT \
+ 			       && bitmap_bit_p (arm_active_target.isa, \
+ 						isa_bit_mve_float) \
+ 			       && !TARGET_GENERAL_REGS_ONLY)
+ 
+ /* MVE have few common instructions as VFP, like VLDM alias VPOP, VLDR, VSTM
+    alia VPUSH, VSTR and VMOV, VMSR and VMRS.  In the same manner it updates few
+    registers such as FPCAR, FPCCR, FPDSCR, FPSCR, MVFR0, MVFR1 and MVFR2.  All
+    the VFP instructions, RTL patterns and register are guarded by
+    TARGET_HARD_FLOAT.  But the common instructions, RTL pattern and registers
+    between MVE and VFP will be guarded by the following macro TARGET_VFP_BASE
+    hereafter.  */
+ 
+ #define TARGET_VFP_BASE (arm_float_abi != ARM_FLOAT_ABI_SOFT \
+ 			 && bitmap_bit_p (arm_active_target.isa, \
+ 					  isa_bit_vfp_base) \
+ 			 && !TARGET_GENERAL_REGS_ONLY)
+ 
  /* Nonzero if integer division instructions supported.  */
  #define TARGET_IDIV	((TARGET_ARM && arm_arch_arm_hwdiv)	\
  			 || (TARGET_THUMB && arm_arch_thumb_hwdiv))
*************** emission of floating point pcs attribute
*** 313,320 ****
  /* Nonzero if disallow volatile memory access in IT block.  */
  #define TARGET_NO_VOLATILE_CE		(arm_arch_no_volatile_ce)
  
! /* Should NEON be used for 64-bits bitops.  */
! #define TARGET_PREFER_NEON_64BITS (prefer_neon_for_64bits)
  
  /* Should constant I be slplit for OP.  */
  #define DONT_EARLY_SPLIT_CONSTANT(i, op) \
--- 354,361 ----
  /* Nonzero if disallow volatile memory access in IT block.  */
  #define TARGET_NO_VOLATILE_CE		(arm_arch_no_volatile_ce)
  
! /* Nonzero if chip supports the Custom Datapath Extension.  */
! #define TARGET_CDE	(arm_arch_cde && arm_arch8 && !arm_arch_notm)
  
  /* Should constant I be slplit for OP.  */
  #define DONT_EARLY_SPLIT_CONSTANT(i, op) \
*************** extern int arm_arch8_3;
*** 459,464 ****
--- 500,509 ----
  /* Nonzero if this chip supports the ARM Architecture 8.4 extensions.  */
  extern int arm_arch8_4;
  
+ /* Nonzero if this chip supports the ARM Architecture 8.1-M Mainline
+    extensions.  */
+ extern int arm_arch8_1m_main;
+ 
  /* Nonzero if this chip supports the FP16 instructions extension of ARM
     Architecture 8.2.  */
  extern int arm_fp16_inst;
*************** extern int arm_arch_thumb_hwdiv;
*** 509,518 ****
  /* Nonzero if chip disallows volatile memory access in IT block.  */
  extern int arm_arch_no_volatile_ce;
  
- /* Nonzero if we should use Neon to handle 64-bits operations rather
-    than core registers.  */
- extern int prefer_neon_for_64bits;
- 
  /* Nonzero if we shouldn't use literal pools.  */
  #ifndef USED_FOR_TARGET
  extern bool arm_disable_literal_pool;
--- 554,559 ----
*************** extern int arm_arch_crc;
*** 524,529 ****
--- 565,591 ----
  /* Nonzero if chip supports the ARMv8-M Security Extensions.  */
  extern int arm_arch_cmse;
  
+ /* Nonzero if chip supports the I8MM instructions.  */
+ extern int arm_arch_i8mm;
+ 
+ /* Nonzero if chip supports the BFloat16 instructions.  */
+ extern int arm_arch_bf16;
+ 
+ /* Nonzero if chip supports the Custom Datapath Extension.  */
+ extern int arm_arch_cde;
+ extern int arm_arch_cde_coproc;
+ extern const int arm_arch_cde_coproc_bits[];
+ #define ARM_CDE_CONST_COPROC	7
+ #define ARM_CCDE_CONST_1	((1 << 13) - 1)
+ #define ARM_CCDE_CONST_2	((1 << 9 ) - 1)
+ #define ARM_CCDE_CONST_3	((1 << 6 ) - 1)
+ #define ARM_VCDE_CONST_1	((1 << 11) - 1)
+ #define ARM_VCDE_CONST_2	((1 << 6 ) - 1)
+ #define ARM_VCDE_CONST_3	((1 << 3 ) - 1)
+ #define ARM_MVE_CDE_CONST_1	((1 << 12) - 1)
+ #define ARM_MVE_CDE_CONST_2	((1 << 7 ) - 1)
+ #define ARM_MVE_CDE_CONST_3	((1 << 4 ) - 1)
+ 
  #ifndef TARGET_DEFAULT
  #define TARGET_DEFAULT  (MASK_APCS_FRAME)
  #endif
*************** extern int arm_arch_cmse;
*** 730,742 ****
  	                goto.  Without it fp appears to be used and the
  			elimination code won't get rid of sfp.  It tracks
  			fp exactly at all times.
  
     *: See TARGET_CONDITIONAL_REGISTER_USAGE  */
  
  /*	s0-s15		VFP scratch (aka d0-d7).
  	s16-s31	      S	VFP variable (aka d8-d15).
  	vfpcc		Not a real register.  Represents the VFP condition
! 			code flags.  */
  
  /* The stack backtrace structure is as follows:
    fp points to here:  |  save code pointer  |      [fp]
--- 792,809 ----
  	                goto.  Without it fp appears to be used and the
  			elimination code won't get rid of sfp.  It tracks
  			fp exactly at all times.
+ 	apsrq		Nor this, it is used to track operations on the Q bit
+ 			of APSR by ACLE saturating intrinsics.
+ 	apsrge		Nor this, it is used to track operations on the GE bits
+ 			of APSR by ACLE SIMD32 intrinsics
  
     *: See TARGET_CONDITIONAL_REGISTER_USAGE  */
  
  /*	s0-s15		VFP scratch (aka d0-d7).
  	s16-s31	      S	VFP variable (aka d8-d15).
  	vfpcc		Not a real register.  Represents the VFP condition
! 			code flags.
! 	vpr		Used to represent MVE VPR predication.  */
  
  /* The stack backtrace structure is as follows:
    fp points to here:  |  save code pointer  |      [fp]
*************** extern int arm_arch_cmse;
*** 777,783 ****
    1,1,1,1,1,1,1,1,		\
    1,1,1,1,			\
    /* Specials.  */		\
!   1,1,1,1			\
  }
  
  /* 1 for registers not available across function calls.
--- 844,850 ----
    1,1,1,1,1,1,1,1,		\
    1,1,1,1,			\
    /* Specials.  */		\
!   1,1,1,1,1,1,1			\
  }
  
  /* 1 for registers not available across function calls.
*************** extern int arm_arch_cmse;
*** 807,813 ****
    1,1,1,1,1,1,1,1,		\
    1,1,1,1,			\
    /* Specials.  */		\
!   1,1,1,1			\
  }
  
  #ifndef SUBTARGET_CONDITIONAL_REGISTER_USAGE
--- 874,880 ----
    1,1,1,1,1,1,1,1,		\
    1,1,1,1,			\
    /* Specials.  */		\
!   1,1,1,1,1,1,1			\
  }
  
  #ifndef SUBTARGET_CONDITIONAL_REGISTER_USAGE
*************** extern int arm_arch_cmse;
*** 892,897 ****
--- 959,967 ----
     Pascal), so the following is not true.  */
  #define STATIC_CHAIN_REGNUM	12
  
+ /* r9 is the FDPIC register (base register for GOT and FUNCDESC accesses).  */
+ #define FDPIC_REGNUM		9
+ 
  /* Define this to be where the real frame pointer is if it is not possible to
     work out the offset between the frame pointer and the automatic variables
     until after register allocation has taken place.  FRAME_POINTER_REGNUM
*************** extern int arm_arch_cmse;
*** 979,988 ****
    ((((REGNUM) - FIRST_VFP_REGNUM) & 3) == 0 \
     && (LAST_VFP_REGNUM - (REGNUM) >= 2 * (N) - 1))
  
! /* The number of hard registers is 16 ARM + 1 CC + 1 SFP + 1 AFP.  */
  /* Intel Wireless MMX Technology registers add 16 + 4 more.  */
  /* VFP (VFP3) adds 32 (64) + 1 VFPCC.  */
! #define FIRST_PSEUDO_REGISTER   104
  
  #define DBX_REGISTER_NUMBER(REGNO) arm_dbx_register_number (REGNO)
  
--- 1049,1059 ----
    ((((REGNUM) - FIRST_VFP_REGNUM) & 3) == 0 \
     && (LAST_VFP_REGNUM - (REGNUM) >= 2 * (N) - 1))
  
! /* The number of hard registers is 16 ARM + 1 CC + 1 SFP + 1 AFP
!    + 1 APSRQ + 1 APSRGE + 1 VPR.  */
  /* Intel Wireless MMX Technology registers add 16 + 4 more.  */
  /* VFP (VFP3) adds 32 (64) + 1 VFPCC.  */
! #define FIRST_PSEUDO_REGISTER   107
  
  #define DBX_REGISTER_NUMBER(REGNO) arm_dbx_register_number (REGNO)
  
*************** extern int arm_arch_cmse;
*** 1003,1020 ****
  /* Modes valid for Neon D registers.  */
  #define VALID_NEON_DREG_MODE(MODE) \
    ((MODE) == V2SImode || (MODE) == V4HImode || (MODE) == V8QImode \
!    || (MODE) == V4HFmode || (MODE) == V2SFmode || (MODE) == DImode)
  
  /* Modes valid for Neon Q registers.  */
  #define VALID_NEON_QREG_MODE(MODE) \
    ((MODE) == V4SImode || (MODE) == V8HImode || (MODE) == V16QImode \
!    || (MODE) == V8HFmode || (MODE) == V4SFmode || (MODE) == V2DImode)
  
  /* Structure modes valid for Neon registers.  */
  #define VALID_NEON_STRUCT_MODE(MODE) \
    ((MODE) == TImode || (MODE) == EImode || (MODE) == OImode \
     || (MODE) == CImode || (MODE) == XImode)
  
  /* The register numbers in sequence, for passing to arm_gen_load_multiple.  */
  extern int arm_regs_in_sequence[];
  
--- 1074,1108 ----
  /* Modes valid for Neon D registers.  */
  #define VALID_NEON_DREG_MODE(MODE) \
    ((MODE) == V2SImode || (MODE) == V4HImode || (MODE) == V8QImode \
!    || (MODE) == V4HFmode || (MODE) == V2SFmode || (MODE) == DImode \
!    || (MODE) == V4BFmode)
  
  /* Modes valid for Neon Q registers.  */
  #define VALID_NEON_QREG_MODE(MODE) \
    ((MODE) == V4SImode || (MODE) == V8HImode || (MODE) == V16QImode \
!    || (MODE) == V8HFmode || (MODE) == V4SFmode || (MODE) == V2DImode \
!    || (MODE) == V8BFmode)
! 
! #define VALID_MVE_MODE(MODE) \
!   ((MODE) == V2DImode ||(MODE) == V4SImode || (MODE) == V8HImode \
!    || (MODE) == V16QImode || (MODE) == V8HFmode || (MODE) == V4SFmode \
!    || (MODE) == V2DFmode)
! 
! #define VALID_MVE_SI_MODE(MODE) \
!   ((MODE) == V2DImode ||(MODE) == V4SImode || (MODE) == V8HImode \
!    || (MODE) == V16QImode)
! 
! #define VALID_MVE_SF_MODE(MODE) \
!   ((MODE) == V8HFmode || (MODE) == V4SFmode || (MODE) == V2DFmode)
  
  /* Structure modes valid for Neon registers.  */
  #define VALID_NEON_STRUCT_MODE(MODE) \
    ((MODE) == TImode || (MODE) == EImode || (MODE) == OImode \
     || (MODE) == CImode || (MODE) == XImode)
  
+ #define VALID_MVE_STRUCT_MODE(MODE) \
+   ((MODE) == TImode || (MODE) == OImode || (MODE) == XImode)
+ 
  /* The register numbers in sequence, for passing to arm_gen_load_multiple.  */
  extern int arm_regs_in_sequence[];
  
*************** extern int arm_regs_in_sequence[];
*** 1066,1080 ****
    /* Registers not for general use.  */		\
    CC_REGNUM, VFPCC_REGNUM,			\
    FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM,	\
!   SP_REGNUM, PC_REGNUM 				\
  }
  
  /* Use different register alloc ordering for Thumb.  */
  #define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc ()
  
! /* Tell IRA to use the order we define rather than messing it up with its
!    own cost calculations.  */
! #define HONOR_REG_ALLOC_ORDER 1
  
  /* Interrupt functions can only use registers that have already been
     saved by the prologue, even if they would normally be
--- 1154,1171 ----
    /* Registers not for general use.  */		\
    CC_REGNUM, VFPCC_REGNUM,			\
    FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM,	\
!   SP_REGNUM, PC_REGNUM, APSRQ_REGNUM,		\
!   APSRGE_REGNUM, VPR_REGNUM			\
  }
  
+ #define IS_VPR_REGNUM(REGNUM) \
+   ((REGNUM) == VPR_REGNUM)
+ 
  /* Use different register alloc ordering for Thumb.  */
  #define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc ()
  
! /* Tell IRA to use the order we define when optimizing for size.  */
! #define HONOR_REG_ALLOC_ORDER optimize_function_for_size_p (cfun)
  
  /* Interrupt functions can only use registers that have already been
     saved by the prologue, even if they would normally be
*************** enum reg_class
*** 1094,1099 ****
--- 1185,1191 ----
    BASE_REGS,
    HI_REGS,
    CALLER_SAVE_REGS,
+   EVEN_REG,
    GENERAL_REGS,
    CORE_REGS,
    VFP_D0_D7_REGS,
*************** enum reg_class
*** 1106,1111 ****
--- 1198,1204 ----
    VFPCC_REG,
    SFP_REG,
    AFP_REG,
+   VPR_REG,
    ALL_REGS,
    LIM_REG_CLASSES
  };
*************** enum reg_class
*** 1113,1119 ****
  #define N_REG_CLASSES  (int) LIM_REG_CLASSES
  
  /* Give names of register classes as strings for dump file.  */
! #define REG_CLASS_NAMES  \
  {			\
    "NO_REGS",		\
    "LO_REGS",		\
--- 1206,1212 ----
  #define N_REG_CLASSES  (int) LIM_REG_CLASSES
  
  /* Give names of register classes as strings for dump file.  */
! #define REG_CLASS_NAMES \
  {			\
    "NO_REGS",		\
    "LO_REGS",		\
*************** enum reg_class
*** 1121,1126 ****
--- 1214,1220 ----
    "BASE_REGS",		\
    "HI_REGS",		\
    "CALLER_SAVE_REGS",	\
+   "EVEN_REG",		\
    "GENERAL_REGS",	\
    "CORE_REGS",		\
    "VFP_D0_D7_REGS",	\
*************** enum reg_class
*** 1133,1138 ****
--- 1227,1233 ----
    "VFPCC_REG",		\
    "SFP_REG",		\
    "AFP_REG",		\
+   "VPR_REG",		\
    "ALL_REGS"		\
  }
  
*************** enum reg_class
*** 1147,1152 ****
--- 1242,1248 ----
    { 0x000020FF, 0x00000000, 0x00000000, 0x00000000 }, /* BASE_REGS */	\
    { 0x00005F00, 0x00000000, 0x00000000, 0x00000000 }, /* HI_REGS */	\
    { 0x0000100F, 0x00000000, 0x00000000, 0x00000000 }, /* CALLER_SAVE_REGS */ \
+   { 0x00005555, 0x00000000, 0x00000000, 0x00000000 }, /* EVEN_REGS.  */ \
    { 0x00005FFF, 0x00000000, 0x00000000, 0x00000000 }, /* GENERAL_REGS */ \
    { 0x00007FFF, 0x00000000, 0x00000000, 0x00000000 }, /* CORE_REGS */	\
    { 0xFFFF0000, 0x00000000, 0x00000000, 0x00000000 }, /* VFP_D0_D7_REGS  */ \
*************** enum reg_class
*** 1159,1167 ****
    { 0x00000000, 0x00000000, 0x00000000, 0x00000020 }, /* VFPCC_REG */	\
    { 0x00000000, 0x00000000, 0x00000000, 0x00000040 }, /* SFP_REG */	\
    { 0x00000000, 0x00000000, 0x00000000, 0x00000080 }, /* AFP_REG */	\
!   { 0xFFFF7FFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x0000000F }  /* ALL_REGS */	\
  }
  
  /* Any of the VFP register classes.  */
  #define IS_VFP_CLASS(X) \
    ((X) == VFP_D0_D7_REGS || (X) == VFP_LO_REGS \
--- 1255,1280 ----
    { 0x00000000, 0x00000000, 0x00000000, 0x00000020 }, /* VFPCC_REG */	\
    { 0x00000000, 0x00000000, 0x00000000, 0x00000040 }, /* SFP_REG */	\
    { 0x00000000, 0x00000000, 0x00000000, 0x00000080 }, /* AFP_REG */	\
!   { 0x00000000, 0x00000000, 0x00000000, 0x00000400 }, /* VPR_REG.  */	\
!   { 0xFFFF7FFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x0000000F }  /* ALL_REGS.  */	\
  }
  
+ #define FP_SYSREGS \
+   DEF_FP_SYSREG (FPSCR) \
+   DEF_FP_SYSREG (FPSCR_nzcvqc) \
+   DEF_FP_SYSREG (VPR) \
+   DEF_FP_SYSREG (P0) \
+   DEF_FP_SYSREG (FPCXTNS) \
+   DEF_FP_SYSREG (FPCXTS)
+ 
+ #define DEF_FP_SYSREG(reg) reg ## _ENUM,
+ enum vfp_sysregs_encoding {
+   FP_SYSREGS
+   NB_FP_SYSREGS
+ };
+ #undef DEF_FP_SYSREG
+ extern const char *fp_sysreg_names[NB_FP_SYSREGS];
+ 
  /* Any of the VFP register classes.  */
  #define IS_VFP_CLASS(X) \
    ((X) == VFP_D0_D7_REGS || (X) == VFP_LO_REGS \
*************** typedef struct GTY(()) machine_function
*** 1407,1412 ****
--- 1520,1528 ----
  machine_function;
  #endif
  
+ #define ARM_Q_BIT_READ (arm_q_bit_access ())
+ #define ARM_GE_BITS_READ (arm_ge_bits_access ())
+ 
  /* As in the machine_function, a global set of call-via labels, for code 
     that is in text_section.  */
  extern GTY(()) rtx thumb_call_via_label[14];
*************** typedef struct
*** 1599,1605 ****
  #define INIT_EXPANDERS  arm_init_expanders ()
  
  /* Length in units of the trampoline for entering a nested function.  */
! #define TRAMPOLINE_SIZE  (TARGET_32BIT ? 16 : 20)
  
  /* Alignment required for a trampoline in bits.  */
  #define TRAMPOLINE_ALIGNMENT  32
--- 1715,1721 ----
  #define INIT_EXPANDERS  arm_init_expanders ()
  
  /* Length in units of the trampoline for entering a nested function.  */
! #define TRAMPOLINE_SIZE  (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16 : 20))
  
  /* Alignment required for a trampoline in bits.  */
  #define TRAMPOLINE_ALIGNMENT  32
*************** extern unsigned arm_pic_register;
*** 1950,1955 ****
--- 2066,2075 ----
     data addresses in memory.  */
  #define PIC_OFFSET_TABLE_REGNUM arm_pic_register
  
+ /* For FDPIC, the FDPIC register is call-clobbered (otherwise PLT
+    entries would need to handle saving and restoring it).  */
+ #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED TARGET_FDPIC
+ 
  /* We can't directly access anything that contains a symbol,
     nor can we indirect via the constant pool.  One exception is
     UNSPEC_TLS, which is always PIC.  */
*************** extern unsigned arm_pic_register;
*** 1962,1967 ****
--- 2082,2094 ----
  		   || label_mentioned_p (get_pool_constant (X)))))	\
  	 || tls_mentioned_p (X))
  
+ /* We may want to save the PIC register if it is a dedicated one.  */
+ #define PIC_REGISTER_MAY_NEED_SAVING			\
+   (flag_pic						\
+    && !TARGET_SINGLE_PIC_BASE				\
+    && !TARGET_FDPIC					\
+    && arm_pic_register != INVALID_REGNUM)
+ 
  /* We need to know when we are making a constant pool; this determines
     whether data needs to be in the GOT or can be referenced via a GOT
     offset.  */
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm.md gcc-10.1.0/gcc/config/arm/arm.md
*** gcc-9.3.0/gcc/config/arm/arm.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;;- Machine description for ARM for GNU compiler
! ;;  Copyright (C) 1991-2019 Free Software Foundation, Inc.
  ;;  Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
  ;;  and Martin Simmons (@harleqn.co.uk).
  ;;  More major hacks by Richard Earnshaw (rearnsha@arm.com).
--- 1,5 ----
  ;;- Machine description for ARM for GNU compiler
! ;;  Copyright (C) 1991-2020 Free Software Foundation, Inc.
  ;;  Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
  ;;  and Martin Simmons (@harleqn.co.uk).
  ;;  More major hacks by Richard Earnshaw (rearnsha@arm.com).
***************
*** 31,36 ****
--- 31,37 ----
    [(R0_REGNUM         0)	; First CORE register
     (R1_REGNUM	      1)	; Second CORE register
     (R4_REGNUM	      4)	; Fifth CORE register
+    (FDPIC_REGNUM      9)	; FDPIC register
     (IP_REGNUM	     12)	; Scratch register
     (SP_REGNUM	     13)	; Stack pointer
     (LR_REGNUM        14)	; Return address register
***************
*** 38,43 ****
--- 39,47 ----
     (LAST_ARM_REGNUM  15)	;
     (CC_REGNUM       100)	; Condition code pseudo register
     (VFPCC_REGNUM    101)	; VFP Condition code pseudo register
+    (APSRQ_REGNUM    104)	; Q bit pseudo register
+    (APSRGE_REGNUM   105)	; GE bits pseudo register
+    (VPR_REGNUM      106)	; Vector Predication Register - MVE register.
    ]
  )
  ;; 3rd operand to select_dominance_cc_mode
***************
*** 130,136 ****
  ; arm_arch6.  "v6t2" for Thumb-2 with arm_arch6 and "v8mb" for ARMv8-M
  ; Baseline.  This attribute is used to compute attribute "enabled",
  ; use type "any" to enable an alternative in all cases.
! (define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,v6t2,v8mb,neon_for_64bits,avoid_neon_for_64bits,iwmmxt,iwmmxt2,armv6_or_vfpv3,neon"
    (const_string "any"))
  
  (define_attr "arch_enabled" "no,yes"
--- 134,140 ----
  ; arm_arch6.  "v6t2" for Thumb-2 with arm_arch6 and "v8mb" for ARMv8-M
  ; Baseline.  This attribute is used to compute attribute "enabled",
  ; use type "any" to enable an alternative in all cases.
! (define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,v6t2,v8mb,iwmmxt,iwmmxt2,armv6_or_vfpv3,neon,mve"
    (const_string "any"))
  
  (define_attr "arch_enabled" "no,yes"
***************
*** 173,188 ****
  	      (match_test "TARGET_THUMB1 && arm_arch8"))
  	 (const_string "yes")
  
- 	 (and (eq_attr "arch" "avoid_neon_for_64bits")
- 	      (match_test "TARGET_NEON")
- 	      (not (match_test "TARGET_PREFER_NEON_64BITS")))
- 	 (const_string "yes")
- 
- 	 (and (eq_attr "arch" "neon_for_64bits")
- 	      (match_test "TARGET_NEON")
- 	      (match_test "TARGET_PREFER_NEON_64BITS"))
- 	 (const_string "yes")
- 
  	 (and (eq_attr "arch" "iwmmxt2")
  	      (match_test "TARGET_REALLY_IWMMXT2"))
  	 (const_string "yes")
--- 177,182 ----
***************
*** 194,199 ****
--- 188,197 ----
  	 (and (eq_attr "arch" "neon")
  	      (match_test "TARGET_NEON"))
  	 (const_string "yes")
+ 
+ 	 (and (eq_attr "arch" "mve")
+ 	      (match_test "TARGET_HAVE_MVE"))
+ 	 (const_string "yes")
  	]
  
  	(const_string "no")))
***************
*** 307,315 ****
  	 (ior (eq_attr "is_thumb1" "yes")
  	      (eq_attr "type" "call"))
  	 (const_string "clob")
! 	 (if_then_else (eq_attr "is_neon_type" "no")
! 	 (const_string "nocond")
! 	 (const_string "unconditional"))))
  
  ; Predicable means that the insn can be conditionally executed based on
  ; an automatically added predicate (additional patterns are generated by 
--- 305,315 ----
  	 (ior (eq_attr "is_thumb1" "yes")
  	      (eq_attr "type" "call"))
  	 (const_string "clob")
!          (if_then_else
! 	  (ior (eq_attr "is_neon_type" "yes")
! 	       (eq_attr "is_mve_type" "yes"))
! 	  (const_string "unconditional")
! 	  (const_string "nocond"))))
  
  ; Predicable means that the insn can be conditionally executed based on
  ; an automatically added predicate (additional patterns are generated by 
***************
*** 441,446 ****
--- 441,460 ----
  (include "marvell-pj4.md")
  (include "xgene1.md")
  
+ ;; define_subst and associated attributes
+ 
+ (define_subst "add_setq"
+   [(set (match_operand:SI 0 "" "")
+         (match_operand:SI 1 "" ""))]
+   ""
+   [(set (match_dup 0)
+         (match_dup 1))
+    (set (reg:CC APSRQ_REGNUM)
+ 	(unspec:CC [(reg:CC APSRQ_REGNUM)] UNSPEC_Q_SET))])
+ 
+ (define_subst_attr "add_clobber_q_name" "add_setq" "" "_setq")
+ (define_subst_attr "add_clobber_q_pred" "add_setq" "!ARM_Q_BIT_READ"
+ 		   "ARM_Q_BIT_READ")
  
  ;;---------------------------------------------------------------------------
  ;; Insn patterns
***************
*** 453,590 ****
  
  (define_expand "adddi3"
   [(parallel
!    [(set (match_operand:DI           0 "s_register_operand" "")
! 	  (plus:DI (match_operand:DI 1 "s_register_operand" "")
! 	           (match_operand:DI 2 "arm_adddi_operand"  "")))
      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_EITHER"
    "
    if (TARGET_THUMB1)
      {
-       if (!REG_P (operands[1]))
-         operands[1] = force_reg (DImode, operands[1]);
        if (!REG_P (operands[2]))
!         operands[2] = force_reg (DImode, operands[2]);
!      }
    "
  )
  
! (define_insn_and_split "*arm_adddi3"
!   [(set (match_operand:DI          0 "arm_general_register_operand" "=&r,&r,&r,&r,&r")
! 	(plus:DI (match_operand:DI 1 "arm_general_register_operand" "%0, 0, r, 0, r")
! 		 (match_operand:DI 2 "arm_general_adddi_operand"    "r,  0, r, Dd, Dd")))
!    (clobber (reg:CC CC_REGNUM))]
!   "TARGET_32BIT && !TARGET_NEON"
!   "#"
!   "TARGET_32BIT && ((!TARGET_NEON && !TARGET_IWMMXT) || reload_completed)"
!   [(parallel [(set (reg:CC_C CC_REGNUM)
! 		   (compare:CC_C (plus:SI (match_dup 1) (match_dup 2))
! 				 (match_dup 1)))
! 	      (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))])
!    (set (match_dup 3) (plus:SI (plus:SI (match_dup 4) (match_dup 5))
! 			       (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
!   "
    {
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!     operands[5] = gen_highpart_mode (SImode, DImode, operands[2]);
!     operands[2] = gen_lowpart (SImode, operands[2]);
!   }"
!   [(set_attr "conds" "clob")
!    (set_attr "length" "8")
!    (set_attr "type" "multiple")]
  )
  
! (define_insn_and_split "*adddi_sesidi_di"
!   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
! 	(plus:DI (sign_extend:DI
! 		  (match_operand:SI 2 "s_register_operand" "r,r"))
! 		 (match_operand:DI 1 "s_register_operand" "0,r")))
!    (clobber (reg:CC CC_REGNUM))]
    "TARGET_32BIT"
-   "#"
-   "TARGET_32BIT && reload_completed"
-   [(parallel [(set (reg:CC_C CC_REGNUM)
- 		   (compare:CC_C (plus:SI (match_dup 1) (match_dup 2))
- 				 (match_dup 1)))
- 	      (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))])
-    (set (match_dup 3) (plus:SI (plus:SI (ashiftrt:SI (match_dup 2)
- 						     (const_int 31))
- 					(match_dup 4))
- 			       (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
-   "
    {
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!     operands[2] = gen_lowpart (SImode, operands[2]);
!   }"
!   [(set_attr "conds" "clob")
!    (set_attr "length" "8")
!    (set_attr "type" "multiple")]
  )
  
! (define_insn_and_split "*adddi_zesidi_di"
!   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
! 	(plus:DI (zero_extend:DI
! 		  (match_operand:SI 2 "s_register_operand" "r,r"))
! 		 (match_operand:DI 1 "s_register_operand" "0,r")))
!    (clobber (reg:CC CC_REGNUM))]
    "TARGET_32BIT"
-   "#"
-   "TARGET_32BIT && reload_completed"
-   [(parallel [(set (reg:CC_C CC_REGNUM)
- 		   (compare:CC_C (plus:SI (match_dup 1) (match_dup 2))
- 				 (match_dup 1)))
- 	      (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))])
-    (set (match_dup 3) (plus:SI (plus:SI (match_dup 4) (const_int 0))
- 			       (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
-   "
    {
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!     operands[2] = gen_lowpart (SImode, operands[2]);
!   }"
!   [(set_attr "conds" "clob")
!    (set_attr "length" "8")
!    (set_attr "type" "multiple")]
  )
  
! (define_expand "addv<mode>4"
!   [(match_operand:SIDI 0 "register_operand")
!    (match_operand:SIDI 1 "register_operand")
!    (match_operand:SIDI 2 "register_operand")
     (match_operand 3 "")]
    "TARGET_32BIT"
  {
!   emit_insn (gen_add<mode>3_compareV (operands[0], operands[1], operands[2]));
!   arm_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);
  
    DONE;
  })
  
! (define_expand "uaddv<mode>4"
!   [(match_operand:SIDI 0 "register_operand")
!    (match_operand:SIDI 1 "register_operand")
!    (match_operand:SIDI 2 "register_operand")
     (match_operand 3 "")]
    "TARGET_32BIT"
  {
!   emit_insn (gen_add<mode>3_compareC (operands[0], operands[1], operands[2]));
!   arm_gen_unlikely_cbranch (NE, CC_Cmode, operands[3]);
  
    DONE;
  })
  
  (define_expand "addsi3"
!   [(set (match_operand:SI          0 "s_register_operand" "")
! 	(plus:SI (match_operand:SI 1 "s_register_operand" "")
! 		 (match_operand:SI 2 "reg_or_int_operand" "")))]
    "TARGET_EITHER"
    "
    if (TARGET_32BIT && CONST_INT_P (operands[2]))
--- 467,888 ----
  
  (define_expand "adddi3"
   [(parallel
!    [(set (match_operand:DI           0 "s_register_operand")
! 	  (plus:DI (match_operand:DI 1 "s_register_operand")
! 		   (match_operand:DI 2 "reg_or_int_operand")))
      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_EITHER"
    "
    if (TARGET_THUMB1)
      {
        if (!REG_P (operands[2]))
! 	operands[2] = force_reg (DImode, operands[2]);
!     }
!   else
!     {
!       rtx lo_result, hi_result, lo_dest, hi_dest;
!       rtx lo_op1, hi_op1, lo_op2, hi_op2;
!       arm_decompose_di_binop (operands[1], operands[2], &lo_op1, &hi_op1,
! 			      &lo_op2, &hi_op2);
!       lo_result = lo_dest = gen_lowpart (SImode, operands[0]);
!       hi_result = hi_dest = gen_highpart (SImode, operands[0]);
! 
!       if (lo_op2 == const0_rtx)
! 	{
! 	  lo_dest = lo_op1;
! 	  if (!arm_add_operand (hi_op2, SImode))
! 	    hi_op2 = force_reg (SImode, hi_op2);
! 	  /* Assume hi_op2 won't also be zero.  */
! 	  emit_insn (gen_addsi3 (hi_dest, hi_op1, hi_op2));
! 	}
!       else
! 	{
! 	  if (!arm_add_operand (lo_op2, SImode))
! 	    lo_op2 = force_reg (SImode, lo_op2);
! 	  if (!arm_not_operand (hi_op2, SImode))
! 	    hi_op2 = force_reg (SImode, hi_op2);
! 
! 	  emit_insn (gen_addsi3_compare_op1 (lo_dest, lo_op1, lo_op2));
! 	  rtx carry = gen_rtx_LTU (SImode, gen_rtx_REG (CC_Cmode, CC_REGNUM),
! 				   const0_rtx);
! 	  if (hi_op2 == const0_rtx)
! 	    emit_insn (gen_add0si3_carryin (hi_dest, hi_op1, carry));
! 	  else
! 	    emit_insn (gen_addsi3_carryin (hi_dest, hi_op1, hi_op2, carry));
! 	}
! 
!       if (lo_result != lo_dest)
! 	emit_move_insn (lo_result, lo_dest);
!       if (hi_result != hi_dest)
! 	emit_move_insn (gen_highpart (SImode, operands[0]), hi_dest);
!       DONE;
!     }
    "
  )
  
! (define_expand "addvsi4"
!   [(match_operand:SI 0 "s_register_operand")
!    (match_operand:SI 1 "s_register_operand")
!    (match_operand:SI 2 "arm_add_operand")
!    (match_operand 3 "")]
!   "TARGET_32BIT"
! {
!   if (CONST_INT_P (operands[2]))
!     emit_insn (gen_addsi3_compareV_imm (operands[0], operands[1], operands[2]));
!   else
!     emit_insn (gen_addsi3_compareV_reg (operands[0], operands[1], operands[2]));
!   arm_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);
! 
!   DONE;
! })
! 
! (define_expand "addvdi4"
!   [(match_operand:DI 0 "s_register_operand")
!    (match_operand:DI 1 "s_register_operand")
!    (match_operand:DI 2 "reg_or_int_operand")
!    (match_operand 3 "")]
!   "TARGET_32BIT"
! {
!   rtx lo_result, hi_result;
!   rtx lo_op1, hi_op1, lo_op2, hi_op2;
!   arm_decompose_di_binop (operands[1], operands[2], &lo_op1, &hi_op1,
! 			  &lo_op2, &hi_op2);
!   lo_result = gen_lowpart (SImode, operands[0]);
!   hi_result = gen_highpart (SImode, operands[0]);
! 
!   if (lo_op2 == const0_rtx)
!     {
!       emit_move_insn (lo_result, lo_op1);
!       if (!arm_add_operand (hi_op2, SImode))
! 	hi_op2 = force_reg (SImode, hi_op2);
! 
!       emit_insn (gen_addvsi4 (hi_result, hi_op1, hi_op2, operands[3]));
!     }
!   else
!     {
!       if (!arm_add_operand (lo_op2, SImode))
! 	lo_op2 = force_reg (SImode, lo_op2);
!       if (!arm_not_operand (hi_op2, SImode))
! 	hi_op2 = force_reg (SImode, hi_op2);
! 
!       emit_insn (gen_addsi3_compare_op1 (lo_result, lo_op1, lo_op2));
! 
!       if (hi_op2 == const0_rtx)
!         emit_insn (gen_addsi3_cin_vout_0 (hi_result, hi_op1));
!       else if (CONST_INT_P (hi_op2))
!         emit_insn (gen_addsi3_cin_vout_imm (hi_result, hi_op1, hi_op2));
!       else
!         emit_insn (gen_addsi3_cin_vout_reg (hi_result, hi_op1, hi_op2));
! 
!       arm_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);
!     }
! 
!   DONE;
! })
! 
! (define_expand "addsi3_cin_vout_reg"
!   [(parallel
!     [(set (match_dup 3)
! 	  (compare:CC_V
! 	   (plus:DI
! 	    (plus:DI (match_dup 4)
! 		     (sign_extend:DI (match_operand:SI 1 "s_register_operand")))
! 	    (sign_extend:DI (match_operand:SI 2 "s_register_operand")))
! 	   (sign_extend:DI (plus:SI (plus:SI (match_dup 5) (match_dup 1))
! 				    (match_dup 2)))))
!      (set (match_operand:SI 0 "s_register_operand")
! 	  (plus:SI (plus:SI (match_dup 5) (match_dup 1))
! 		   (match_dup 2)))])]
!   "TARGET_32BIT"
    {
!     operands[3] = gen_rtx_REG (CC_Vmode, CC_REGNUM);
!     rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
!     operands[4] = gen_rtx_LTU (DImode, ccin, const0_rtx);
!     operands[5] = gen_rtx_LTU (SImode, ccin, const0_rtx);
!   }
  )
  
! (define_insn "*addsi3_cin_vout_reg_insn"
!   [(set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
! 	 (plus:DI
! 	  (plus:DI
! 	   (match_operand:DI 3 "arm_carry_operation" "")
! 	   (sign_extend:DI (match_operand:SI 1 "s_register_operand" "%0,r")))
! 	  (sign_extend:DI (match_operand:SI 2 "s_register_operand" "l,r")))
! 	 (sign_extend:DI
! 	  (plus:SI (plus:SI (match_operand:SI 4 "arm_carry_operation" "")
! 			    (match_dup 1))
! 		   (match_dup 2)))))
!    (set (match_operand:SI 0 "s_register_operand" "=l,r")
! 	(plus:SI (plus:SI (match_dup 4) (match_dup 1))
! 		 (match_dup 2)))]
!   "TARGET_32BIT"
!   "@
!    adcs%?\\t%0, %0, %2
!    adcs%?\\t%0, %1, %2"
!   [(set_attr "type" "alus_sreg")
!    (set_attr "arch" "t2,*")
!    (set_attr "length" "2,4")]
! )
! 
! (define_expand "addsi3_cin_vout_imm"
!   [(parallel
!     [(set (match_dup 3)
! 	  (compare:CC_V
! 	   (plus:DI
! 	    (plus:DI (match_dup 4)
! 		     (sign_extend:DI (match_operand:SI 1 "s_register_operand")))
! 	    (match_dup 2))
! 	   (sign_extend:DI (plus:SI (plus:SI (match_dup 5) (match_dup 1))
! 				    (match_dup 2)))))
!      (set (match_operand:SI 0 "s_register_operand")
! 	  (plus:SI (plus:SI (match_dup 5) (match_dup 1))
! 		   (match_operand 2 "arm_adcimm_operand")))])]
    "TARGET_32BIT"
    {
!     operands[3] = gen_rtx_REG (CC_Vmode, CC_REGNUM);
!     rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
!     operands[4] = gen_rtx_LTU (DImode, ccin, const0_rtx);
!     operands[5] = gen_rtx_LTU (SImode, ccin, const0_rtx);
!   }
  )
  
! (define_insn "*addsi3_cin_vout_imm_insn"
!   [(set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
! 	 (plus:DI
! 	  (plus:DI
! 	   (match_operand:DI 3 "arm_carry_operation" "")
! 	   (sign_extend:DI (match_operand:SI 1 "s_register_operand" "r,r")))
! 	  (match_operand 2 "arm_adcimm_operand" "I,K"))
! 	 (sign_extend:DI
! 	  (plus:SI (plus:SI (match_operand:SI 4 "arm_carry_operation" "")
! 			    (match_dup 1))
! 		   (match_dup 2)))))
!    (set (match_operand:SI 0 "s_register_operand" "=r,r")
! 	(plus:SI (plus:SI (match_dup 4) (match_dup 1))
! 		 (match_dup 2)))]
!   "TARGET_32BIT"
!   "@
!    adcs%?\\t%0, %1, %2
!    sbcs%?\\t%0, %1, #%B2"
!   [(set_attr "type" "alus_imm")]
! )
! 
! (define_expand "addsi3_cin_vout_0"
!   [(parallel
!     [(set (match_dup 2)
! 	  (compare:CC_V
! 	   (plus:DI (match_dup 3)
! 		    (sign_extend:DI (match_operand:SI 1 "s_register_operand")))
! 	   (sign_extend:DI (plus:SI (match_dup 4) (match_dup 1)))))
!      (set (match_operand:SI 0 "s_register_operand")
! 	  (plus:SI (match_dup 4) (match_dup 1)))])]
    "TARGET_32BIT"
    {
!     operands[2] = gen_rtx_REG (CC_Vmode, CC_REGNUM);
!     rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
!     operands[3] = gen_rtx_LTU (DImode, ccin, const0_rtx);
!     operands[4] = gen_rtx_LTU (SImode, ccin, const0_rtx);
!   }
  )
  
! (define_insn "*addsi3_cin_vout_0_insn"
!   [(set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
! 	 (plus:DI
! 	  (match_operand:DI 2 "arm_carry_operation" "")
! 	  (sign_extend:DI (match_operand:SI 1 "s_register_operand" "r")))
! 	 (sign_extend:DI (plus:SI
! 			  (match_operand:SI 3 "arm_carry_operation" "")
! 			  (match_dup 1)))))
!    (set (match_operand:SI 0 "s_register_operand" "=r")
! 	(plus:SI (match_dup 3) (match_dup 1)))]
!   "TARGET_32BIT"
!   "adcs%?\\t%0, %1, #0"
!   [(set_attr "type" "alus_imm")]
! )
! 
! (define_expand "uaddvsi4"
!   [(match_operand:SI 0 "s_register_operand")
!    (match_operand:SI 1 "s_register_operand")
!    (match_operand:SI 2 "arm_add_operand")
     (match_operand 3 "")]
    "TARGET_32BIT"
  {
!   emit_insn (gen_addsi3_compare_op1 (operands[0], operands[1], operands[2]));
!   arm_gen_unlikely_cbranch (LTU, CC_Cmode, operands[3]);
  
    DONE;
  })
  
! (define_expand "uaddvdi4"
!   [(match_operand:DI 0 "s_register_operand")
!    (match_operand:DI 1 "s_register_operand")
!    (match_operand:DI 2 "reg_or_int_operand")
     (match_operand 3 "")]
    "TARGET_32BIT"
  {
!   rtx lo_result, hi_result;
!   rtx lo_op1, hi_op1, lo_op2, hi_op2;
!   arm_decompose_di_binop (operands[1], operands[2], &lo_op1, &hi_op1,
! 			  &lo_op2, &hi_op2);
!   lo_result = gen_lowpart (SImode, operands[0]);
!   hi_result = gen_highpart (SImode, operands[0]);
! 
!   if (lo_op2 == const0_rtx)
!     {
!       emit_move_insn (lo_result, lo_op1);
!       if (!arm_add_operand (hi_op2, SImode))
! 	hi_op2 = force_reg (SImode, hi_op2);
! 
!       emit_insn (gen_uaddvsi4 (hi_result, hi_op1, hi_op2, operands[3]));
!     }
!   else
!     {
!       if (!arm_add_operand (lo_op2, SImode))
! 	lo_op2 = force_reg (SImode, lo_op2);
!       if (!arm_not_operand (hi_op2, SImode))
! 	hi_op2 = force_reg (SImode, hi_op2);
! 
!       emit_insn (gen_addsi3_compare_op1 (lo_result, lo_op1, lo_op2));
! 
!       if (hi_op2 == const0_rtx)
!         emit_insn (gen_addsi3_cin_cout_0 (hi_result, hi_op1));
!       else if (CONST_INT_P (hi_op2))
!         emit_insn (gen_addsi3_cin_cout_imm (hi_result, hi_op1, hi_op2));
!       else
!         emit_insn (gen_addsi3_cin_cout_reg (hi_result, hi_op1, hi_op2));
! 
!       arm_gen_unlikely_cbranch (GEU, CC_ADCmode, operands[3]);
!     }
  
    DONE;
  })
  
+ (define_expand "addsi3_cin_cout_reg"
+   [(parallel
+     [(set (match_dup 3)
+ 	  (compare:CC_ADC
+ 	   (plus:DI
+ 	    (plus:DI (match_dup 4)
+ 		     (zero_extend:DI (match_operand:SI 1 "s_register_operand")))
+ 	    (zero_extend:DI (match_operand:SI 2 "s_register_operand")))
+ 	   (const_int 4294967296)))
+      (set (match_operand:SI 0 "s_register_operand")
+ 	  (plus:SI (plus:SI (match_dup 5) (match_dup 1))
+ 		   (match_dup 2)))])]
+   "TARGET_32BIT"
+   {
+     operands[3] = gen_rtx_REG (CC_ADCmode, CC_REGNUM);
+     rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
+     operands[4] = gen_rtx_LTU (DImode, ccin, const0_rtx);
+     operands[5] = gen_rtx_LTU (SImode, ccin, const0_rtx);
+   }
+ )
+ 
+ (define_insn "*addsi3_cin_cout_reg_insn"
+   [(set (reg:CC_ADC CC_REGNUM)
+ 	(compare:CC_ADC
+ 	 (plus:DI
+ 	  (plus:DI
+ 	   (match_operand:DI 3 "arm_carry_operation" "")
+ 	   (zero_extend:DI (match_operand:SI 1 "s_register_operand" "%0,r")))
+ 	  (zero_extend:DI (match_operand:SI 2 "s_register_operand" "l,r")))
+ 	(const_int 4294967296)))
+    (set (match_operand:SI 0 "s_register_operand" "=l,r")
+ 	(plus:SI (plus:SI (match_operand:SI 4 "arm_carry_operation" "")
+ 			  (match_dup 1))
+ 		 (match_dup 2)))]
+   "TARGET_32BIT"
+   "@
+    adcs%?\\t%0, %0, %2
+    adcs%?\\t%0, %1, %2"
+   [(set_attr "type" "alus_sreg")
+    (set_attr "arch" "t2,*")
+    (set_attr "length" "2,4")]
+ )
+ 
+ (define_expand "addsi3_cin_cout_imm"
+   [(parallel
+     [(set (match_dup 3)
+ 	  (compare:CC_ADC
+ 	   (plus:DI
+ 	    (plus:DI (match_dup 4)
+ 		     (zero_extend:DI (match_operand:SI 1 "s_register_operand")))
+ 	    (match_dup 6))
+ 	   (const_int 4294967296)))
+      (set (match_operand:SI 0 "s_register_operand")
+ 	  (plus:SI (plus:SI (match_dup 5) (match_dup 1))
+ 		   (match_operand:SI 2 "arm_adcimm_operand")))])]
+   "TARGET_32BIT"
+   {
+     operands[3] = gen_rtx_REG (CC_ADCmode, CC_REGNUM);
+     rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
+     operands[4] = gen_rtx_LTU (DImode, ccin, const0_rtx);
+     operands[5] = gen_rtx_LTU (SImode, ccin, const0_rtx);
+     operands[6] = GEN_INT (UINTVAL (operands[2]) & 0xffffffff);
+   }
+ )
+ 
+ (define_insn "*addsi3_cin_cout_imm_insn"
+   [(set (reg:CC_ADC CC_REGNUM)
+ 	(compare:CC_ADC
+ 	 (plus:DI
+ 	  (plus:DI
+ 	   (match_operand:DI 3 "arm_carry_operation" "")
+ 	   (zero_extend:DI (match_operand:SI 1 "s_register_operand" "r,r")))
+ 	  (match_operand:DI 5 "const_int_operand" "n,n"))
+ 	(const_int 4294967296)))
+    (set (match_operand:SI 0 "s_register_operand" "=r,r")
+ 	(plus:SI (plus:SI (match_operand:SI 4 "arm_carry_operation" "")
+ 			  (match_dup 1))
+ 		 (match_operand:SI 2 "arm_adcimm_operand" "I,K")))]
+   "TARGET_32BIT
+    && (UINTVAL (operands[2]) & 0xffffffff) == UINTVAL (operands[5])"
+   "@
+    adcs%?\\t%0, %1, %2
+    sbcs%?\\t%0, %1, #%B2"
+   [(set_attr "type" "alus_imm")]
+ )
+ 
+ (define_expand "addsi3_cin_cout_0"
+   [(parallel
+     [(set (match_dup 2)
+ 	  (compare:CC_ADC
+ 	   (plus:DI (match_dup 3)
+ 		    (zero_extend:DI (match_operand:SI 1 "s_register_operand")))
+ 	   (const_int 4294967296)))
+      (set (match_operand:SI 0 "s_register_operand")
+ 	  (plus:SI (match_dup 4) (match_dup 1)))])]
+   "TARGET_32BIT"
+   {
+     operands[2] = gen_rtx_REG (CC_ADCmode, CC_REGNUM);
+     rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
+     operands[3] = gen_rtx_LTU (DImode, ccin, const0_rtx);
+     operands[4] = gen_rtx_LTU (SImode, ccin, const0_rtx);
+   }
+ )
+ 
+ (define_insn "*addsi3_cin_cout_0_insn"
+   [(set (reg:CC_ADC CC_REGNUM)
+ 	(compare:CC_ADC
+ 	 (plus:DI
+ 	  (match_operand:DI 2 "arm_carry_operation" "")
+ 	  (zero_extend:DI (match_operand:SI 1 "s_register_operand" "r")))
+ 	(const_int 4294967296)))
+    (set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(plus:SI (match_operand:SI 3 "arm_carry_operation" "") (match_dup 1)))]
+   "TARGET_32BIT"
+   "adcs%?\\t%0, %1, #0"
+   [(set_attr "type" "alus_imm")]
+ )
+ 
  (define_expand "addsi3"
!   [(set (match_operand:SI          0 "s_register_operand")
! 	(plus:SI (match_operand:SI 1 "s_register_operand")
! 		 (match_operand:SI 2 "reg_or_int_operand")))]
    "TARGET_EITHER"
    "
    if (TARGET_32BIT && CONST_INT_P (operands[2]))
***************
*** 659,826 ****
   ]
  )
  
! (define_insn_and_split "adddi3_compareV"
!   [(set (reg:CC_V CC_REGNUM)
! 	(ne:CC_V
! 	  (plus:TI
! 	    (sign_extend:TI (match_operand:DI 1 "register_operand" "r"))
! 	    (sign_extend:TI (match_operand:DI 2 "register_operand" "r")))
! 	  (sign_extend:TI (plus:DI (match_dup 1) (match_dup 2)))))
!    (set (match_operand:DI 0 "register_operand" "=&r")
! 	(plus:DI (match_dup 1) (match_dup 2)))]
!   "TARGET_32BIT"
!   "#"
!   "&& reload_completed"
!   [(parallel [(set (reg:CC_C CC_REGNUM)
! 		   (compare:CC_C (plus:SI (match_dup 1) (match_dup 2))
! 				 (match_dup 1)))
! 	      (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))])
!    (parallel [(set (reg:CC_V CC_REGNUM)
! 		   (ne:CC_V
! 		    (plus:DI (plus:DI
! 			      (sign_extend:DI (match_dup 4))
! 			      (sign_extend:DI (match_dup 5)))
! 			     (ltu:DI (reg:CC_C CC_REGNUM) (const_int 0)))
! 		    (plus:DI (sign_extend:DI
! 			      (plus:SI (match_dup 4) (match_dup 5)))
! 			     (ltu:DI (reg:CC_C CC_REGNUM) (const_int 0)))))
! 	     (set (match_dup 3) (plus:SI (plus:SI
! 					  (match_dup 4) (match_dup 5))
! 					 (ltu:SI (reg:CC_C CC_REGNUM)
! 						 (const_int 0))))])]
!   "
!   {
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!     operands[5] = gen_highpart (SImode, operands[2]);
!     operands[2] = gen_lowpart (SImode, operands[2]);
!   }"
!  [(set_attr "conds" "set")
!    (set_attr "length" "8")
!    (set_attr "type" "multiple")]
! )
! 
! (define_insn "addsi3_compareV"
    [(set (reg:CC_V CC_REGNUM)
! 	(ne:CC_V
  	  (plus:DI
! 	    (sign_extend:DI (match_operand:SI 1 "register_operand" "r"))
! 	    (sign_extend:DI (match_operand:SI 2 "register_operand" "r")))
  	  (sign_extend:DI (plus:SI (match_dup 1) (match_dup 2)))))
!    (set (match_operand:SI 0 "register_operand" "=r")
  	(plus:SI (match_dup 1) (match_dup 2)))]
    "TARGET_32BIT"
    "adds%?\\t%0, %1, %2"
    [(set_attr "conds" "set")
     (set_attr "type" "alus_sreg")]
  )
  
! (define_insn "*addsi3_compareV_upper"
    [(set (reg:CC_V CC_REGNUM)
! 	(ne:CC_V
  	  (plus:DI
! 	   (plus:DI
! 	    (sign_extend:DI (match_operand:SI 1 "register_operand" "r"))
! 	    (sign_extend:DI (match_operand:SI 2 "register_operand" "r")))
! 	   (ltu:DI (reg:CC_C CC_REGNUM) (const_int 0)))
! 	  (plus:DI (sign_extend:DI
! 		    (plus:SI (match_dup 1) (match_dup 2)))
! 		   (ltu:DI (reg:CC_C CC_REGNUM) (const_int 0)))))
!    (set (match_operand:SI 0 "register_operand" "=r")
! 	(plus:SI
! 	 (plus:SI (match_dup 1) (match_dup 2))
! 	 (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
    "TARGET_32BIT"
!   "adcs%?\\t%0, %1, %2"
    [(set_attr "conds" "set")
!    (set_attr "type" "adcs_reg")]
  )
  
! (define_insn_and_split "adddi3_compareC"
!   [(set (reg:CC_C CC_REGNUM)
! 	(ne:CC_C
! 	  (plus:TI
! 	    (zero_extend:TI (match_operand:DI 1 "register_operand" "r"))
! 	    (zero_extend:TI (match_operand:DI 2 "register_operand" "r")))
! 	  (zero_extend:TI (plus:DI (match_dup 1) (match_dup 2)))))
!    (set (match_operand:DI 0 "register_operand" "=&r")
! 	(plus:DI (match_dup 1) (match_dup 2)))]
    "TARGET_32BIT"
!   "#"
!   "&& reload_completed"
!   [(parallel [(set (reg:CC_C CC_REGNUM)
! 		   (compare:CC_C (plus:SI (match_dup 1) (match_dup 2))
! 				 (match_dup 1)))
! 	      (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))])
!    (parallel [(set (reg:CC_C CC_REGNUM)
! 		   (ne:CC_C
! 		    (plus:DI (plus:DI
! 			      (zero_extend:DI (match_dup 4))
! 			      (zero_extend:DI (match_dup 5)))
! 			     (ltu:DI (reg:CC_C CC_REGNUM) (const_int 0)))
! 		    (plus:DI (zero_extend:DI
! 			      (plus:SI (match_dup 4) (match_dup 5)))
! 			     (ltu:DI (reg:CC_C CC_REGNUM) (const_int 0)))))
! 	     (set (match_dup 3) (plus:SI
! 				 (plus:SI (match_dup 4) (match_dup 5))
! 				 (ltu:SI (reg:CC_C CC_REGNUM)
! 					 (const_int 0))))])]
!   "
!   {
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[5] = gen_highpart (SImode, operands[2]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!     operands[2] = gen_lowpart (SImode, operands[2]);
!   }"
!  [(set_attr "conds" "set")
!    (set_attr "length" "8")
!    (set_attr "type" "multiple")]
  )
  
! (define_insn "*addsi3_compareC_upper"
!   [(set (reg:CC_C CC_REGNUM)
! 	(ne:CC_C
  	  (plus:DI
! 	   (plus:DI
! 	    (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
! 	    (zero_extend:DI (match_operand:SI 2 "register_operand" "r")))
! 	   (ltu:DI (reg:CC_C CC_REGNUM) (const_int 0)))
! 	  (plus:DI (zero_extend:DI
! 		    (plus:SI (match_dup 1) (match_dup 2)))
! 		   (ltu:DI (reg:CC_C CC_REGNUM) (const_int 0)))))
!    (set (match_operand:SI 0 "register_operand" "=r")
! 	(plus:SI
! 	 (plus:SI (match_dup 1) (match_dup 2))
! 	 (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
!   "TARGET_32BIT"
!   "adcs%?\\t%0, %1, %2"
    [(set_attr "conds" "set")
!    (set_attr "type" "adcs_reg")]
  )
  
! (define_insn "addsi3_compareC"
!    [(set (reg:CC_C CC_REGNUM)
! 	 (ne:CC_C
  	  (plus:DI
! 	   (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
! 	   (zero_extend:DI (match_operand:SI 2 "register_operand" "r")))
! 	  (zero_extend:DI
! 	   (plus:SI (match_dup 1) (match_dup 2)))))
!     (set (match_operand:SI 0 "register_operand" "=r")
! 	 (plus:SI (match_dup 1) (match_dup 2)))]
!   "TARGET_32BIT"
!   "adds%?\\t%0, %1, %2"
    [(set_attr "conds" "set")
!    (set_attr "type" "alus_sreg")]
  )
  
  (define_insn "addsi3_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (plus:SI (match_operand:SI 1 "s_register_operand" "r, r,r")
  		  (match_operand:SI 2 "arm_add_operand"    "I,L,r"))
  	 (const_int 0)))
--- 957,1101 ----
   ]
  )
  
! (define_insn "addsi3_compareV_reg"
    [(set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
  	  (plus:DI
! 	    (sign_extend:DI (match_operand:SI 1 "register_operand" "%l,0,r"))
! 	    (sign_extend:DI (match_operand:SI 2 "register_operand" "l,r,r")))
  	  (sign_extend:DI (plus:SI (match_dup 1) (match_dup 2)))))
!    (set (match_operand:SI 0 "register_operand" "=l,r,r")
  	(plus:SI (match_dup 1) (match_dup 2)))]
    "TARGET_32BIT"
    "adds%?\\t%0, %1, %2"
    [(set_attr "conds" "set")
+    (set_attr "arch" "t2,t2,*")
+    (set_attr "length" "2,2,4")
     (set_attr "type" "alus_sreg")]
  )
  
! (define_insn "*addsi3_compareV_reg_nosum"
    [(set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
  	  (plus:DI
! 	    (sign_extend:DI (match_operand:SI 0 "register_operand" "%l,r"))
! 	    (sign_extend:DI (match_operand:SI 1 "register_operand" "l,r")))
! 	  (sign_extend:DI (plus:SI (match_dup 0) (match_dup 1)))))]
    "TARGET_32BIT"
!   "cmn%?\\t%0, %1"
    [(set_attr "conds" "set")
!    (set_attr "arch" "t2,*")
!    (set_attr "length" "2,4")
!    (set_attr "type" "alus_sreg")]
  )
  
! (define_insn "subvsi3_intmin"
!   [(set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
! 	  (plus:DI
! 	    (sign_extend:DI
! 	     (match_operand:SI 1 "register_operand" "r"))
! 	    (const_int 2147483648))
! 	  (sign_extend:DI (plus:SI (match_dup 1) (const_int -2147483648)))))
!    (set (match_operand:SI 0 "register_operand" "=r")
! 	(plus:SI (match_dup 1) (const_int -2147483648)))]
    "TARGET_32BIT"
!   "subs%?\\t%0, %1, #-2147483648"
!   [(set_attr "conds" "set")
!    (set_attr "type" "alus_imm")]
  )
  
! (define_insn "addsi3_compareV_imm"
!   [(set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
  	  (plus:DI
! 	    (sign_extend:DI
! 	     (match_operand:SI 1 "register_operand" "l,0,l,0,r,r"))
! 	    (match_operand 2 "arm_addimm_operand" "Pd,Py,Px,Pw,I,L"))
! 	  (sign_extend:DI (plus:SI (match_dup 1) (match_dup 2)))))
!    (set (match_operand:SI 0 "register_operand" "=l,l,l,l,r,r")
! 	(plus:SI (match_dup 1) (match_dup 2)))]
!   "TARGET_32BIT
!    && INTVAL (operands[2]) == ARM_SIGN_EXTEND (INTVAL (operands[2]))"
!   "@
!    adds%?\\t%0, %1, %2
!    adds%?\\t%0, %0, %2
!    subs%?\\t%0, %1, #%n2
!    subs%?\\t%0, %0, #%n2
!    adds%?\\t%0, %1, %2
!    subs%?\\t%0, %1, #%n2"
    [(set_attr "conds" "set")
!    (set_attr "arch" "t2,t2,t2,t2,*,*")
!    (set_attr "length" "2,2,2,2,4,4")
!    (set_attr "type" "alus_imm")]
  )
  
! (define_insn "addsi3_compareV_imm_nosum"
!   [(set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
  	  (plus:DI
! 	    (sign_extend:DI
! 	     (match_operand:SI 0 "register_operand" "l,r,r"))
! 	    (match_operand 1 "arm_addimm_operand" "Pw,I,L"))
! 	  (sign_extend:DI (plus:SI (match_dup 0) (match_dup 1)))))]
!   "TARGET_32BIT
!    && INTVAL (operands[1]) == ARM_SIGN_EXTEND (INTVAL (operands[1]))"
!   "@
!    cmp%?\\t%0, #%n1
!    cmn%?\\t%0, %1
!    cmp%?\\t%0, #%n1"
    [(set_attr "conds" "set")
!    (set_attr "arch" "t2,*,*")
!    (set_attr "length" "2,4,4")
!    (set_attr "type" "alus_imm")]
! )
! 
! ;; We can handle more constants efficently if we can clobber either a scratch
! ;; or the other source operand.  We deliberately leave this late as in
! ;; high register pressure situations it's not worth forcing any reloads.
! (define_peephole2
!   [(match_scratch:SI 2 "l")
!    (set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
! 	  (plus:DI
! 	    (sign_extend:DI
! 	     (match_operand:SI 0 "low_register_operand"))
! 	    (match_operand 1 "const_int_operand"))
! 	  (sign_extend:DI (plus:SI (match_dup 0) (match_dup 1)))))]
!   "TARGET_THUMB2
!    && satisfies_constraint_Pd (operands[1])"
!   [(parallel[
!     (set (reg:CC_V CC_REGNUM)
! 	 (compare:CC_V
! 	  (plus:DI (sign_extend:DI (match_dup 0))
! 		   (sign_extend:DI (match_dup 1)))
! 	  (sign_extend:DI (plus:SI (match_dup 0) (match_dup 1)))))
!     (set (match_dup 2) (plus:SI (match_dup 0) (match_dup 1)))])]
! )
! 
! (define_peephole2
!   [(set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
! 	  (plus:DI
! 	    (sign_extend:DI
! 	     (match_operand:SI 0 "low_register_operand"))
! 	    (match_operand 1 "const_int_operand"))
! 	  (sign_extend:DI (plus:SI (match_dup 0) (match_dup 1)))))]
!   "TARGET_THUMB2
!    && dead_or_set_p (peep2_next_insn (0), operands[0])
!    && satisfies_constraint_Py (operands[1])"
!   [(parallel[
!     (set (reg:CC_V CC_REGNUM)
! 	 (compare:CC_V
! 	  (plus:DI (sign_extend:DI (match_dup 0))
! 		   (sign_extend:DI (match_dup 1)))
! 	  (sign_extend:DI (plus:SI (match_dup 0) (match_dup 1)))))
!     (set (match_dup 0) (plus:SI (match_dup 0) (match_dup 1)))])]
  )
  
  (define_insn "addsi3_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (plus:SI (match_operand:SI 1 "s_register_operand" "r, r,r")
  		  (match_operand:SI 2 "arm_add_operand"    "I,L,r"))
  	 (const_int 0)))
***************
*** 836,843 ****
  )
  
  (define_insn "*addsi3_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (plus:SI (match_operand:SI 0 "s_register_operand" "r, r, r")
  		  (match_operand:SI 1 "arm_add_operand"    "I,L, r"))
  	 (const_int 0)))]
--- 1111,1118 ----
  )
  
  (define_insn "*addsi3_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (plus:SI (match_operand:SI 0 "s_register_operand" "r, r, r")
  		  (match_operand:SI 1 "arm_add_operand"    "I,L, r"))
  	 (const_int 0)))]
***************
*** 936,1022 ****
  ;; the operands, and we know that the use of the condition code is
  ;; either GEU or LTU, so we can use the carry flag from the addition
  ;; instead of doing the compare a second time.
! (define_insn "*addsi3_compare_op1"
    [(set (reg:CC_C CC_REGNUM)
  	(compare:CC_C
! 	 (plus:SI (match_operand:SI 1 "s_register_operand" "r,r,r")
! 		  (match_operand:SI 2 "arm_add_operand" "I,L,r"))
  	 (match_dup 1)))
!    (set (match_operand:SI 0 "s_register_operand" "=r,r,r")
  	(plus:SI (match_dup 1) (match_dup 2)))]
    "TARGET_32BIT"
    "@
     adds%?\\t%0, %1, %2
     subs%?\\t%0, %1, #%n2
!    adds%?\\t%0, %1, %2"
    [(set_attr "conds" "set")
!    (set_attr "type"  "alus_imm,alus_imm,alus_sreg")]
  )
  
  (define_insn "*addsi3_compare_op2"
    [(set (reg:CC_C CC_REGNUM)
  	(compare:CC_C
! 	 (plus:SI (match_operand:SI 1 "s_register_operand" "r,r,r")
! 		  (match_operand:SI 2 "arm_add_operand" "I,L,r"))
  	 (match_dup 2)))
!    (set (match_operand:SI 0 "s_register_operand" "=r,r,r")
  	(plus:SI (match_dup 1) (match_dup 2)))]
    "TARGET_32BIT"
    "@
     adds%?\\t%0, %1, %2
     subs%?\\t%0, %1, #%n2
!    adds%?\\t%0, %1, %2"
    [(set_attr "conds" "set")
!    (set_attr "type" "alus_imm,alus_imm,alus_sreg")]
  )
  
  (define_insn "*compare_addsi2_op0"
    [(set (reg:CC_C CC_REGNUM)
          (compare:CC_C
!           (plus:SI (match_operand:SI 0 "s_register_operand" "l,l,r,r,r")
!                    (match_operand:SI 1 "arm_add_operand" "Pv,l,I,L,r"))
            (match_dup 0)))]
    "TARGET_32BIT"
    "@
-    cmp%?\\t%0, #%n1
-    cmn%?\\t%0, %1
     cmn%?\\t%0, %1
     cmp%?\\t%0, #%n1
!    cmn%?\\t%0, %1"
    [(set_attr "conds" "set")
     (set_attr "predicable" "yes")
!    (set_attr "arch" "t2,t2,*,*,*")
!    (set_attr "predicable_short_it" "yes,yes,no,no,no")
!    (set_attr "length" "2,2,4,4,4")
!    (set_attr "type" "alus_imm,alus_sreg,alus_imm,alus_imm,alus_sreg")]
  )
  
  (define_insn "*compare_addsi2_op1"
    [(set (reg:CC_C CC_REGNUM)
          (compare:CC_C
!           (plus:SI (match_operand:SI 0 "s_register_operand" "l,l,r,r,r")
!                    (match_operand:SI 1 "arm_add_operand" "Pv,l,I,L,r"))
            (match_dup 1)))]
    "TARGET_32BIT"
    "@
-    cmp%?\\t%0, #%n1
-    cmn%?\\t%0, %1
     cmn%?\\t%0, %1
     cmp%?\\t%0, #%n1
!    cmn%?\\t%0, %1"
    [(set_attr "conds" "set")
     (set_attr "predicable" "yes")
!    (set_attr "arch" "t2,t2,*,*,*")
!    (set_attr "predicable_short_it" "yes,yes,no,no,no")
!    (set_attr "length" "2,2,4,4,4")
!    (set_attr "type" "alus_imm,alus_sreg,alus_imm,alus_imm,alus_sreg")]
   )
  
! (define_insn "*addsi3_carryin_<optab>"
    [(set (match_operand:SI 0 "s_register_operand" "=l,r,r")
          (plus:SI (plus:SI (match_operand:SI 1 "s_register_operand" "%l,r,r")
                            (match_operand:SI 2 "arm_not_operand" "0,rI,K"))
!                  (LTUGEU:SI (reg:<cnb> CC_REGNUM) (const_int 0))))]
    "TARGET_32BIT"
    "@
     adc%?\\t%0, %1, %2
--- 1211,1317 ----
  ;; the operands, and we know that the use of the condition code is
  ;; either GEU or LTU, so we can use the carry flag from the addition
  ;; instead of doing the compare a second time.
! (define_insn "addsi3_compare_op1"
    [(set (reg:CC_C CC_REGNUM)
  	(compare:CC_C
! 	 (plus:SI (match_operand:SI 1 "s_register_operand" "l,0,l,0,rk,rk")
! 		  (match_operand:SI 2 "arm_add_operand" "lPd,Py,lPx,Pw,rkI,L"))
  	 (match_dup 1)))
!    (set (match_operand:SI 0 "s_register_operand" "=l,l,l,l,rk,rk")
  	(plus:SI (match_dup 1) (match_dup 2)))]
    "TARGET_32BIT"
    "@
     adds%?\\t%0, %1, %2
+    adds%?\\t%0, %0, %2
     subs%?\\t%0, %1, #%n2
!    subs%?\\t%0, %0, #%n2
!    adds%?\\t%0, %1, %2
!    subs%?\\t%0, %1, #%n2"
    [(set_attr "conds" "set")
!    (set_attr "arch" "t2,t2,t2,t2,*,*")
!    (set_attr "length" "2,2,2,2,4,4")
!    (set (attr "type")
! 	(if_then_else (match_operand 2 "const_int_operand")
! 		      (const_string "alu_imm")
! 		      (const_string "alu_sreg")))]
  )
  
  (define_insn "*addsi3_compare_op2"
    [(set (reg:CC_C CC_REGNUM)
  	(compare:CC_C
! 	 (plus:SI (match_operand:SI 1 "s_register_operand" "l,0,l,0,r,r")
! 		  (match_operand:SI 2 "arm_add_operand" "lPd,Py,lPx,Pw,rI,L"))
  	 (match_dup 2)))
!    (set (match_operand:SI 0 "s_register_operand" "=l,l,l,l,r,r")
  	(plus:SI (match_dup 1) (match_dup 2)))]
    "TARGET_32BIT"
    "@
     adds%?\\t%0, %1, %2
+    adds%?\\t%0, %0, %2
     subs%?\\t%0, %1, #%n2
!    subs%?\\t%0, %0, #%n2
!    adds%?\\t%0, %1, %2
!    subs%?\\t%0, %1, #%n2"
    [(set_attr "conds" "set")
!    (set_attr "arch" "t2,t2,t2,t2,*,*")
!    (set_attr "length" "2,2,2,2,4,4")
!    (set (attr "type")
! 	(if_then_else (match_operand 2 "const_int_operand")
! 		      (const_string "alu_imm")
! 		      (const_string "alu_sreg")))]
  )
  
  (define_insn "*compare_addsi2_op0"
    [(set (reg:CC_C CC_REGNUM)
          (compare:CC_C
!           (plus:SI (match_operand:SI 0 "s_register_operand" "l,l,r,r")
!                    (match_operand:SI 1 "arm_add_operand"    "l,Pw,rI,L"))
            (match_dup 0)))]
    "TARGET_32BIT"
    "@
     cmn%?\\t%0, %1
     cmp%?\\t%0, #%n1
!    cmn%?\\t%0, %1
!    cmp%?\\t%0, #%n1"
    [(set_attr "conds" "set")
     (set_attr "predicable" "yes")
!    (set_attr "arch" "t2,t2,*,*")
!    (set_attr "predicable_short_it" "yes,yes,no,no")
!    (set_attr "length" "2,2,4,4")
!    (set (attr "type")
! 	(if_then_else (match_operand 1 "const_int_operand")
! 		      (const_string "alu_imm")
! 		      (const_string "alu_sreg")))]
  )
  
  (define_insn "*compare_addsi2_op1"
    [(set (reg:CC_C CC_REGNUM)
          (compare:CC_C
!           (plus:SI (match_operand:SI 0 "s_register_operand" "l,l,r,r")
!                    (match_operand:SI 1 "arm_add_operand" "l,Pw,rI,L"))
            (match_dup 1)))]
    "TARGET_32BIT"
    "@
     cmn%?\\t%0, %1
     cmp%?\\t%0, #%n1
!    cmn%?\\t%0, %1
!    cmp%?\\t%0, #%n1"
    [(set_attr "conds" "set")
     (set_attr "predicable" "yes")
!    (set_attr "arch" "t2,t2,*,*")
!    (set_attr "predicable_short_it" "yes,yes,no,no")
!    (set_attr "length" "2,2,4,4")
!    (set (attr "type")
! 	(if_then_else (match_operand 1 "const_int_operand")
! 		      (const_string "alu_imm")
! 		      (const_string "alu_sreg")))]
   )
  
! (define_insn "addsi3_carryin"
    [(set (match_operand:SI 0 "s_register_operand" "=l,r,r")
          (plus:SI (plus:SI (match_operand:SI 1 "s_register_operand" "%l,r,r")
                            (match_operand:SI 2 "arm_not_operand" "0,rI,K"))
!                  (match_operand:SI 3 "arm_carry_operation" "")))]
    "TARGET_32BIT"
    "@
     adc%?\\t%0, %1, %2
***************
*** 1030,1040 ****
     (set_attr "type" "adc_reg,adc_reg,adc_imm")]
  )
  
! (define_insn "*addsi3_carryin_alt2_<optab>"
    [(set (match_operand:SI 0 "s_register_operand" "=l,r,r")
!         (plus:SI (plus:SI (LTUGEU:SI (reg:<cnb> CC_REGNUM) (const_int 0))
                            (match_operand:SI 1 "s_register_operand" "%l,r,r"))
!                  (match_operand:SI 2 "arm_rhs_operand" "l,rI,K")))]
    "TARGET_32BIT"
    "@
     adc%?\\t%0, %1, %2
--- 1325,1348 ----
     (set_attr "type" "adc_reg,adc_reg,adc_imm")]
  )
  
! ;; Canonicalization of the above when the immediate is zero.
! (define_insn "add0si3_carryin"
!   [(set (match_operand:SI 0 "s_register_operand" "=r")
! 	(plus:SI (match_operand:SI 2 "arm_carry_operation" "")
! 		 (match_operand:SI 1 "arm_not_operand" "r")))]
!   "TARGET_32BIT"
!   "adc%?\\t%0, %1, #0"
!   [(set_attr "conds" "use")
!    (set_attr "predicable" "yes")
!    (set_attr "length" "4")
!    (set_attr "type" "adc_imm")]
! )
! 
! (define_insn "*addsi3_carryin_alt2"
    [(set (match_operand:SI 0 "s_register_operand" "=l,r,r")
!         (plus:SI (plus:SI (match_operand:SI 3 "arm_carry_operation" "")
                            (match_operand:SI 1 "s_register_operand" "%l,r,r"))
!                  (match_operand:SI 2 "arm_not_operand" "l,rI,K")))]
    "TARGET_32BIT"
    "@
     adc%?\\t%0, %1, %2
***************
*** 1048,1075 ****
     (set_attr "type" "adc_reg,adc_reg,adc_imm")]
  )
  
! (define_insn "*addsi3_carryin_shift_<optab>"
!   [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(plus:SI (plus:SI
  		  (match_operator:SI 2 "shift_operator"
! 		    [(match_operand:SI 3 "s_register_operand" "r")
! 		     (match_operand:SI 4 "reg_or_int_operand" "rM")])
! 		  (match_operand:SI 1 "s_register_operand" "r"))
! 		 (LTUGEU:SI (reg:<cnb> CC_REGNUM) (const_int 0))))]
    "TARGET_32BIT"
    "adc%?\\t%0, %1, %3%S2"
    [(set_attr "conds" "use")
     (set_attr "predicable" "yes")
!    (set (attr "type") (if_then_else (match_operand 4 "const_int_operand" "")
! 		      (const_string "alu_shift_imm")
! 		      (const_string "alu_shift_reg")))]
  )
  
! (define_insn "*addsi3_carryin_clobercc_<optab>"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(plus:SI (plus:SI (match_operand:SI 1 "s_register_operand" "%r")
  			  (match_operand:SI 2 "arm_rhs_operand" "rI"))
! 		 (LTUGEU:SI (reg:<cnb> CC_REGNUM) (const_int 0))))
     (clobber (reg:CC CC_REGNUM))]
     "TARGET_32BIT"
     "adcs%?\\t%0, %1, %2"
--- 1356,1383 ----
     (set_attr "type" "adc_reg,adc_reg,adc_imm")]
  )
  
! (define_insn "*addsi3_carryin_shift"
!   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
  	(plus:SI (plus:SI
  		  (match_operator:SI 2 "shift_operator"
! 		    [(match_operand:SI 3 "s_register_operand" "r,r")
! 		     (match_operand:SI 4 "shift_amount_operand" "M,r")])
! 		  (match_operand:SI 5 "arm_carry_operation" ""))
! 		 (match_operand:SI 1 "s_register_operand" "r,r")))]
    "TARGET_32BIT"
    "adc%?\\t%0, %1, %3%S2"
    [(set_attr "conds" "use")
+    (set_attr "arch" "32,a")
+    (set_attr "shift" "3")
     (set_attr "predicable" "yes")
!    (set_attr "type" "alu_shift_imm,alu_shift_reg")]
  )
  
! (define_insn "*addsi3_carryin_clobercc"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(plus:SI (plus:SI (match_operand:SI 1 "s_register_operand" "%r")
  			  (match_operand:SI 2 "arm_rhs_operand" "rI"))
! 		 (match_operand:SI 3 "arm_carry_operation" "")))
     (clobber (reg:CC CC_REGNUM))]
     "TARGET_32BIT"
     "adcs%?\\t%0, %1, %2"
***************
*** 1077,1137 ****
      (set_attr "type" "adcs_reg")]
  )
  
! (define_expand "subv<mode>4"
!   [(match_operand:SIDI 0 "register_operand")
!    (match_operand:SIDI 1 "register_operand")
!    (match_operand:SIDI 2 "register_operand")
     (match_operand 3 "")]
    "TARGET_32BIT"
  {
!   emit_insn (gen_sub<mode>3_compare1 (operands[0], operands[1], operands[2]));
    arm_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);
  
    DONE;
  })
  
! (define_expand "usubv<mode>4"
!   [(match_operand:SIDI 0 "register_operand")
!    (match_operand:SIDI 1 "register_operand")
!    (match_operand:SIDI 2 "register_operand")
     (match_operand 3 "")]
    "TARGET_32BIT"
  {
!   emit_insn (gen_sub<mode>3_compare1 (operands[0], operands[1], operands[2]));
!   arm_gen_unlikely_cbranch (LTU, CCmode, operands[3]);
  
    DONE;
  })
  
! (define_insn_and_split "subdi3_compare1"
!   [(set (reg:CC CC_REGNUM)
! 	(compare:CC
! 	  (match_operand:DI 1 "register_operand" "r")
! 	  (match_operand:DI 2 "register_operand" "r")))
!    (set (match_operand:DI 0 "register_operand" "=&r")
! 	(minus:DI (match_dup 1) (match_dup 2)))]
    "TARGET_32BIT"
!   "#"
!   "&& reload_completed"
!   [(parallel [(set (reg:CC CC_REGNUM)
! 		   (compare:CC (match_dup 1) (match_dup 2)))
! 	      (set (match_dup 0) (minus:SI (match_dup 1) (match_dup 2)))])
!    (parallel [(set (reg:CC CC_REGNUM)
! 		   (compare:CC (match_dup 4) (match_dup 5)))
! 	     (set (match_dup 3) (minus:SI (minus:SI (match_dup 4) (match_dup 5))
! 			       (ltu:SI (reg:CC CC_REGNUM) (const_int 0))))])]
!   {
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!     operands[5] = gen_highpart (SImode, operands[2]);
!     operands[2] = gen_lowpart (SImode, operands[2]);
!    }
!   [(set_attr "conds" "set")
!    (set_attr "length" "8")
!    (set_attr "type" "multiple")]
! )
  
  (define_insn "subsi3_compare1"
    [(set (reg:CC CC_REGNUM)
--- 1385,1625 ----
      (set_attr "type" "adcs_reg")]
  )
  
! (define_expand "subvsi4"
!   [(match_operand:SI 0 "s_register_operand")
!    (match_operand:SI 1 "arm_rhs_operand")
!    (match_operand:SI 2 "arm_add_operand")
     (match_operand 3 "")]
    "TARGET_32BIT"
  {
!   if (CONST_INT_P (operands[1]) && CONST_INT_P (operands[2]))
!     {
!       /* If both operands are constants we can decide the result statically.  */
!       wi::overflow_type overflow;
!       wide_int val = wi::sub (rtx_mode_t (operands[1], SImode),
! 			      rtx_mode_t (operands[2], SImode),
! 			      SIGNED, &overflow);
!       emit_move_insn (operands[0], GEN_INT (val.to_shwi ()));
!       if (overflow != wi::OVF_NONE)
! 	emit_jump_insn (gen_jump (operands[3]));
!       DONE;
!     }
!   else if (CONST_INT_P (operands[2]))
!     {
!       operands[2] = GEN_INT (-INTVAL (operands[2]));
!       /* Special case for INT_MIN.  */
!       if (INTVAL (operands[2]) == 0x80000000)
! 	emit_insn (gen_subvsi3_intmin (operands[0], operands[1]));
!       else
! 	emit_insn (gen_addsi3_compareV_imm (operands[0], operands[1],
! 					  operands[2]));
!     }
!   else if (CONST_INT_P (operands[1]))
!     emit_insn (gen_subvsi3_imm1 (operands[0], operands[1], operands[2]));
!   else
!     emit_insn (gen_subvsi3 (operands[0], operands[1], operands[2]));
! 
!   arm_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);
!   DONE;
! })
! 
! (define_expand "subvdi4"
!   [(match_operand:DI 0 "s_register_operand")
!    (match_operand:DI 1 "reg_or_int_operand")
!    (match_operand:DI 2 "reg_or_int_operand")
!    (match_operand 3 "")]
!   "TARGET_32BIT"
! {
!   rtx lo_result, hi_result;
!   rtx lo_op1, hi_op1, lo_op2, hi_op2;
!   lo_result = gen_lowpart (SImode, operands[0]);
!   hi_result = gen_highpart (SImode, operands[0]);
!   machine_mode mode = CCmode;
! 
!   if (CONST_INT_P (operands[1]) && CONST_INT_P (operands[2]))
!     {
!       /* If both operands are constants we can decide the result statically.  */
!       wi::overflow_type overflow;
!       wide_int val = wi::sub (rtx_mode_t (operands[1], DImode),
! 			      rtx_mode_t (operands[2], DImode),
! 			      SIGNED, &overflow);
!       emit_move_insn (operands[0], GEN_INT (val.to_shwi ()));
!       if (overflow != wi::OVF_NONE)
! 	emit_jump_insn (gen_jump (operands[3]));
!       DONE;
!     }
!   else if (CONST_INT_P (operands[1]))
!     {
!       arm_decompose_di_binop (operands[2], operands[1], &lo_op2, &hi_op2,
! 			      &lo_op1, &hi_op1);
!       if (const_ok_for_arm (INTVAL (lo_op1)))
! 	{
! 	  emit_insn (gen_rsb_imm_compare (lo_result, lo_op1, lo_op2,
! 					  GEN_INT (~UINTVAL (lo_op1))));
! 	  /* We could potentially use RSC here in Arm state, but not
! 	     in Thumb, so it's probably not worth the effort of handling
! 	     this.  */
! 	  hi_op1 = force_reg (SImode, hi_op1);
! 	  mode = CC_RSBmode;
! 	  goto highpart;
! 	}
!       operands[1] = force_reg (DImode, operands[1]);
!     }
! 
!   arm_decompose_di_binop (operands[1], operands[2], &lo_op1, &hi_op1,
! 			  &lo_op2, &hi_op2);
!   if (lo_op2 == const0_rtx)
!     {
!       emit_move_insn (lo_result, lo_op1);
!       if (!arm_add_operand (hi_op2, SImode))
!         hi_op2 = force_reg (SImode, hi_op2);
!       emit_insn (gen_subvsi4 (hi_result, hi_op1, hi_op2, operands[3]));
!       DONE;
!     }
! 
!   if (CONST_INT_P (lo_op2) && !arm_addimm_operand (lo_op2, SImode))
!     lo_op2 = force_reg (SImode, lo_op2);
!   if (CONST_INT_P (lo_op2))
!     emit_insn (gen_cmpsi2_addneg (lo_result, lo_op1, lo_op2,
! 				  gen_int_mode (-INTVAL (lo_op2), SImode)));
!   else
!     emit_insn (gen_subsi3_compare1 (lo_result, lo_op1, lo_op2));
! 
!  highpart:
!   if (!arm_not_operand (hi_op2, SImode))
!     hi_op2 = force_reg (SImode, hi_op2);
!   rtx ccreg = gen_rtx_REG (mode, CC_REGNUM);
!   if (CONST_INT_P (hi_op2))
!     emit_insn (gen_subvsi3_borrow_imm (hi_result, hi_op1, hi_op2,
! 				       gen_rtx_LTU (SImode, ccreg, const0_rtx),
! 				       gen_rtx_LTU (DImode, ccreg,
! 						    const0_rtx)));
!   else
!     emit_insn (gen_subvsi3_borrow (hi_result, hi_op1, hi_op2,
! 				   gen_rtx_LTU (SImode, ccreg, const0_rtx),
! 				   gen_rtx_LTU (DImode, ccreg, const0_rtx)));
    arm_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);
  
    DONE;
  })
  
! (define_expand "usubvsi4"
!   [(match_operand:SI 0 "s_register_operand")
!    (match_operand:SI 1 "arm_rhs_operand")
!    (match_operand:SI 2 "arm_add_operand")
     (match_operand 3 "")]
    "TARGET_32BIT"
  {
!   machine_mode mode = CCmode;
!   if (CONST_INT_P (operands[1]) && CONST_INT_P (operands[2]))
!     {
!       /* If both operands are constants we can decide the result statically.  */
!       wi::overflow_type overflow;
!       wide_int val = wi::sub (rtx_mode_t (operands[1], SImode),
! 			      rtx_mode_t (operands[2], SImode),
! 			      UNSIGNED, &overflow);
!       emit_move_insn (operands[0], GEN_INT (val.to_shwi ()));
!       if (overflow != wi::OVF_NONE)
! 	emit_jump_insn (gen_jump (operands[3]));
!       DONE;
!     }
!   else if (CONST_INT_P (operands[2]))
!     emit_insn (gen_cmpsi2_addneg (operands[0], operands[1], operands[2],
! 				  gen_int_mode (-INTVAL (operands[2]),
! 						SImode)));
!   else if (CONST_INT_P (operands[1]))
!     {
!       mode = CC_RSBmode;
!       emit_insn (gen_rsb_imm_compare (operands[0], operands[1], operands[2],
! 				      GEN_INT (~UINTVAL (operands[1]))));
!     }
!   else
!     emit_insn (gen_subsi3_compare1 (operands[0], operands[1], operands[2]));
!   arm_gen_unlikely_cbranch (LTU, mode, operands[3]);
  
    DONE;
  })
  
! (define_expand "usubvdi4"
!   [(match_operand:DI 0 "s_register_operand")
!    (match_operand:DI 1 "reg_or_int_operand")
!    (match_operand:DI 2 "reg_or_int_operand")
!    (match_operand 3 "")]
    "TARGET_32BIT"
! {
!   rtx lo_result, hi_result;
!   rtx lo_op1, hi_op1, lo_op2, hi_op2;
!   lo_result = gen_lowpart (SImode, operands[0]);
!   hi_result = gen_highpart (SImode, operands[0]);
!   machine_mode mode = CCmode;
! 
!   if (CONST_INT_P (operands[1]) && CONST_INT_P (operands[2]))
!     {
!       /* If both operands are constants we can decide the result statically.  */
!       wi::overflow_type overflow;
!       wide_int val = wi::sub (rtx_mode_t (operands[1], DImode),
! 			      rtx_mode_t (operands[2], DImode),
! 			      UNSIGNED, &overflow);
!       emit_move_insn (operands[0], GEN_INT (val.to_shwi ()));
!       if (overflow != wi::OVF_NONE)
! 	emit_jump_insn (gen_jump (operands[3]));
!       DONE;
!     }
!   else if (CONST_INT_P (operands[1]))
!     {
!       arm_decompose_di_binop (operands[2], operands[1], &lo_op2, &hi_op2,
! 			      &lo_op1, &hi_op1);
!       if (const_ok_for_arm (INTVAL (lo_op1)))
! 	{
! 	  emit_insn (gen_rsb_imm_compare (lo_result, lo_op1, lo_op2,
! 					  GEN_INT (~UINTVAL (lo_op1))));
! 	  /* We could potentially use RSC here in Arm state, but not
! 	     in Thumb, so it's probably not worth the effort of handling
! 	     this.  */
! 	  hi_op1 = force_reg (SImode, hi_op1);
! 	  mode = CC_RSBmode;
! 	  goto highpart;
! 	}
!       operands[1] = force_reg (DImode, operands[1]);
!     }
! 
!   arm_decompose_di_binop (operands[1], operands[2], &lo_op1, &hi_op1,
! 			  &lo_op2, &hi_op2);
!   if (lo_op2 == const0_rtx)
!     {
!       emit_move_insn (lo_result, lo_op1);
!       if (!arm_add_operand (hi_op2, SImode))
!         hi_op2 = force_reg (SImode, hi_op2);
!       emit_insn (gen_usubvsi4 (hi_result, hi_op1, hi_op2, operands[3]));
!       DONE;
!     }
! 
!   if (CONST_INT_P (lo_op2) && !arm_addimm_operand (lo_op2, SImode))
!     lo_op2 = force_reg (SImode, lo_op2);
!   if (CONST_INT_P (lo_op2))
!     emit_insn (gen_cmpsi2_addneg (lo_result, lo_op1, lo_op2,
! 				  gen_int_mode (-INTVAL (lo_op2), SImode)));
!   else
!     emit_insn (gen_subsi3_compare1 (lo_result, lo_op1, lo_op2));
! 
!  highpart:
!   if (!arm_not_operand (hi_op2, SImode))
!     hi_op2 = force_reg (SImode, hi_op2);
!   rtx ccreg = gen_rtx_REG (mode, CC_REGNUM);
!   if (CONST_INT_P (hi_op2))
!     emit_insn (gen_usubvsi3_borrow_imm (hi_result, hi_op1, hi_op2,
! 					GEN_INT (UINTVAL (hi_op2) & 0xffffffff),
! 					gen_rtx_LTU (SImode, ccreg, const0_rtx),
! 					gen_rtx_LTU (DImode, ccreg,
! 						     const0_rtx)));
!   else
!     emit_insn (gen_usubvsi3_borrow (hi_result, hi_op1, hi_op2,
! 				    gen_rtx_LTU (SImode, ccreg, const0_rtx),
! 				    gen_rtx_LTU (DImode, ccreg, const0_rtx)));
!   arm_gen_unlikely_cbranch (LTU, CC_Bmode, operands[3]);
! 
!   DONE;
! })
  
  (define_insn "subsi3_compare1"
    [(set (reg:CC CC_REGNUM)
***************
*** 1146,1152 ****
     (set_attr "type" "alus_sreg")]
  )
  
! (define_insn "*subsi3_carryin"
    [(set (match_operand:SI 0 "s_register_operand" "=r,r,r")
  	(minus:SI (minus:SI (match_operand:SI 1 "reg_or_int_operand" "r,I,Pz")
  			    (match_operand:SI 2 "s_register_operand" "r,r,r"))
--- 1634,1672 ----
     (set_attr "type" "alus_sreg")]
  )
  
! (define_insn "subvsi3"
!   [(set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
! 	 (minus:DI
! 	  (sign_extend:DI (match_operand:SI 1 "s_register_operand" "l,r"))
! 	  (sign_extend:DI (match_operand:SI 2 "s_register_operand" "l,r")))
! 	 (sign_extend:DI (minus:SI (match_dup 1) (match_dup 2)))))
!    (set (match_operand:SI 0 "s_register_operand" "=l,r")
! 	(minus:SI (match_dup 1) (match_dup 2)))]
!   "TARGET_32BIT"
!   "subs%?\\t%0, %1, %2"
!   [(set_attr "conds" "set")
!    (set_attr "arch" "t2,*")
!    (set_attr "length" "2,4")
!    (set_attr "type" "alus_sreg")]
! )
! 
! (define_insn "subvsi3_imm1"
!   [(set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
! 	 (minus:DI
! 	  (match_operand 1 "arm_immediate_operand" "I")
! 	  (sign_extend:DI (match_operand:SI 2 "s_register_operand" "r")))
! 	 (sign_extend:DI (minus:SI (match_dup 1) (match_dup 2)))))
!    (set (match_operand:SI 0 "s_register_operand" "=r")
! 	(minus:SI (match_dup 1) (match_dup 2)))]
!   "TARGET_32BIT"
!   "rsbs%?\\t%0, %2, %1"
!   [(set_attr "conds" "set")
!    (set_attr "type" "alus_imm")]
! )
! 
! (define_insn "subsi3_carryin"
    [(set (match_operand:SI 0 "s_register_operand" "=r,r,r")
  	(minus:SI (minus:SI (match_operand:SI 1 "reg_or_int_operand" "r,I,Pz")
  			    (match_operand:SI 2 "s_register_operand" "r,r,r"))
***************
*** 1162,1167 ****
--- 1682,1780 ----
     (set_attr "type" "adc_reg,adc_imm,alu_shift_imm")]
  )
  
+ ;; Special canonicalization of the above when operand1 == (const_int 1):
+ ;; in this case the 'borrow' needs to treated like subtracting from the carry.
+ (define_insn "rsbsi_carryin_reg"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(minus:SI (match_operand:SI 1 "arm_carry_operation" "")
+ 		  (match_operand:SI 2 "s_register_operand" "r")))]
+   "TARGET_ARM"
+   "rsc%?\\t%0, %2, #1"
+   [(set_attr "conds" "use")
+    (set_attr "predicable" "yes")
+    (set_attr "type" "adc_imm")]
+ )
+ 
+ ;; SBC performs Rn - Rm - ~C, but -Rm = ~Rm + 1 => Rn + ~Rm + 1 - ~C
+ ;; => Rn + ~Rm + C, which is essentially ADC Rd, Rn, ~Rm
+ (define_insn "*add_not_cin"
+   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
+ 	(plus:SI
+ 	 (plus:SI (not:SI (match_operand:SI 1 "s_register_operand" "r,r"))
+ 		  (match_operand:SI 3 "arm_carry_operation" ""))
+ 	 (match_operand:SI 2 "arm_rhs_operand" "r,I")))]
+   "TARGET_ARM || (TARGET_THUMB2 && !CONST_INT_P (operands[2]))"
+   "@
+    sbc%?\\t%0, %2, %1
+    rsc%?\\t%0, %1, %2"
+   [(set_attr "conds" "use")
+    (set_attr "predicable" "yes")
+    (set_attr "arch" "*,a")
+    (set_attr "type" "adc_reg,adc_imm")]
+ )
+ 
+ ;; On Arm we can also use the same trick when the non-inverted operand is
+ ;; shifted, using RSC.
+ (define_insn "add_not_shift_cin"
+   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
+ 	(plus:SI
+ 	 (plus:SI (match_operator:SI 3 "shift_operator"
+ 		   [(match_operand:SI 1 "s_register_operand" "r,r")
+ 		    (match_operand:SI 2 "shift_amount_operand" "M,r")])
+ 		  (not:SI (match_operand:SI 4 "s_register_operand" "r,r")))
+ 	 (match_operand:SI 5 "arm_carry_operation" "")))]
+   "TARGET_ARM"
+   "rsc%?\\t%0, %4, %1%S3"
+   [(set_attr "conds" "use")
+    (set_attr "predicable" "yes")
+    (set_attr "type" "alu_shift_imm,alu_shift_reg")]
+ )
+ 
+ (define_insn "cmpsi3_carryin_<CC_EXTEND>out"
+   [(set (reg:<CC_EXTEND> CC_REGNUM)
+ 	(compare:<CC_EXTEND>
+ 	 (SE:DI (match_operand:SI 1 "s_register_operand" "0,r"))
+ 	 (plus:DI (match_operand:DI 3 "arm_borrow_operation" "")
+ 		  (SE:DI (match_operand:SI 2 "s_register_operand" "l,r")))))
+    (clobber (match_scratch:SI 0 "=l,r"))]
+   "TARGET_32BIT"
+   "sbcs\\t%0, %1, %2"
+   [(set_attr "conds" "set")
+    (set_attr "arch" "t2,*")
+    (set_attr "length" "2,4")
+    (set_attr "type" "adc_reg")]
+ )
+ 
+ ;; Similar to the above, but handling a constant which has a different
+ ;; canonicalization.
+ (define_insn "cmpsi3_imm_carryin_<CC_EXTEND>out"
+   [(set (reg:<CC_EXTEND> CC_REGNUM)
+ 	(compare:<CC_EXTEND>
+ 	 (SE:DI (match_operand:SI 1 "s_register_operand" "r,r"))
+ 	 (plus:DI (match_operand:DI 3 "arm_borrow_operation" "")
+ 		  (match_operand:DI 2 "arm_adcimm_operand" "I,K"))))
+    (clobber (match_scratch:SI 0 "=l,r"))]
+   "TARGET_32BIT"
+   "@
+    sbcs\\t%0, %1, %2
+    adcs\\t%0, %1, #%B2"
+   [(set_attr "conds" "set")
+    (set_attr "type" "adc_imm")]
+ )
+ 
+ ;; Further canonicalization when the constant is zero.
+ (define_insn "cmpsi3_0_carryin_<CC_EXTEND>out"
+   [(set (reg:<CC_EXTEND> CC_REGNUM)
+ 	(compare:<CC_EXTEND>
+ 	 (SE:DI (match_operand:SI 1 "s_register_operand" "r,r"))
+ 	 (match_operand:DI 2 "arm_borrow_operation" "")))
+    (clobber (match_scratch:SI 0 "=l,r"))]
+   "TARGET_32BIT"
+   "sbcs\\t%0, %1, #0"
+   [(set_attr "conds" "set")
+    (set_attr "type" "adc_imm")]
+ )
+ 
  (define_insn "*subsi3_carryin_const"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(minus:SI (plus:SI
***************
*** 1184,1264 ****
     (set_attr "type" "adc_imm")]
  )
  
! (define_insn "*subsi3_carryin_compare"
!   [(set (reg:CC CC_REGNUM)
! 	(compare:CC (match_operand:SI 1 "s_register_operand" "r")
! 		    (match_operand:SI 2 "s_register_operand" "r")))
!    (set (match_operand:SI 0 "s_register_operand" "=r")
! 	(minus:SI (minus:SI (match_dup 1) (match_dup 2))
! 		  (match_operand:SI 3 "arm_borrow_operation" "")))]
    "TARGET_32BIT"
!   "sbcs\\t%0, %1, %2"
!   [(set_attr "conds" "set")
!    (set_attr "type" "adcs_reg")]
! )
! 
! (define_insn "*subsi3_carryin_compare_const"
!   [(set (reg:CC CC_REGNUM)
! 	(compare:CC (match_operand:SI 1 "reg_or_int_operand" "r")
! 		    (match_operand:SI 2 "const_int_I_operand" "I")))
!    (set (match_operand:SI 0 "s_register_operand" "=r")
! 	(minus:SI (plus:SI
! 		   (match_dup 1)
! 		   (match_operand:SI 3 "arm_neg_immediate_operand" "L"))
! 		  (match_operand:SI 4 "arm_borrow_operation" "")))]
!   "TARGET_32BIT
!    && (INTVAL (operands[2])
!        == trunc_int_for_mode (-INTVAL (operands[3]), SImode))"
!   "sbcs\\t%0, %1, #%n3"
!   [(set_attr "conds" "set")
!    (set_attr "type" "adcs_imm")]
  )
  
! (define_insn "*subsi3_carryin_compare_const0"
!   [(set (reg:CC CC_REGNUM)
! 	(compare:CC (match_operand:SI 1 "reg_or_int_operand" "r")
! 		    (const_int 0)))
!    (set (match_operand:SI 0 "s_register_operand" "=r")
! 	(minus:SI (match_dup 1)
! 		  (match_operand:SI 2 "arm_borrow_operation" "")))]
    "TARGET_32BIT"
!   "sbcs\\t%0, %1, #0"
!   [(set_attr "conds" "set")
!    (set_attr "type" "adcs_imm")]
  )
  
! (define_insn "*subsi3_carryin_shift"
!   [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(minus:SI (minus:SI
- 		   (match_operand:SI 1 "s_register_operand" "r")
  		   (match_operator:SI 2 "shift_operator"
! 		    [(match_operand:SI 3 "s_register_operand" "r")
! 		     (match_operand:SI 4 "reg_or_int_operand" "rM")]))
  		  (match_operand:SI 5 "arm_borrow_operation" "")))]
!   "TARGET_32BIT"
!   "sbc%?\\t%0, %1, %3%S2"
    [(set_attr "conds" "use")
     (set_attr "predicable" "yes")
!    (set (attr "type") (if_then_else (match_operand 4 "const_int_operand" "")
! 				    (const_string "alu_shift_imm")
! 				    (const_string "alu_shift_reg")))]
  )
  
! (define_insn "*rsbsi3_carryin_shift"
!   [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(minus:SI (minus:SI
  		   (match_operator:SI 2 "shift_operator"
! 		    [(match_operand:SI 3 "s_register_operand" "r")
! 		     (match_operand:SI 4 "reg_or_int_operand" "rM")])
! 		   (match_operand:SI 1 "s_register_operand" "r"))
! 		  (match_operand:SI 5 "arm_borrow_operation" "")))]
    "TARGET_ARM"
    "rsc%?\\t%0, %1, %3%S2"
    [(set_attr "conds" "use")
     (set_attr "predicable" "yes")
!    (set (attr "type") (if_then_else (match_operand 4 "const_int_operand" "")
! 		      (const_string "alu_shift_imm")
! 		      (const_string "alu_shift_reg")))]
  )
  
  ; transform ((x << y) - 1) to ~(~(x-1) << y)  Where X is a constant.
--- 1797,1865 ----
     (set_attr "type" "adc_imm")]
  )
  
! (define_insn "*subsi3_carryin_shift"
!   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
! 	(minus:SI (minus:SI
! 		   (match_operand:SI 1 "s_register_operand" "r,r")
! 		   (match_operator:SI 2 "shift_operator"
! 		    [(match_operand:SI 3 "s_register_operand" "r,r")
! 		     (match_operand:SI 4 "shift_amount_operand" "M,r")]))
! 		  (match_operand:SI 5 "arm_borrow_operation" "")))]
    "TARGET_32BIT"
!   "sbc%?\\t%0, %1, %3%S2"
!   [(set_attr "conds" "use")
!    (set_attr "arch" "32,a")
!    (set_attr "shift" "3")
!    (set_attr "predicable" "yes")
!    (set_attr "type" "alu_shift_imm,alu_shift_reg")]
  )
  
! (define_insn "*subsi3_carryin_shift_alt"
!   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
! 	(minus:SI (minus:SI
! 		   (match_operand:SI 1 "s_register_operand" "r,r")
! 		   (match_operand:SI 5 "arm_borrow_operation" ""))
! 		  (match_operator:SI 2 "shift_operator"
! 		   [(match_operand:SI 3 "s_register_operand" "r,r")
! 		    (match_operand:SI 4 "shift_amount_operand" "M,r")])))]
    "TARGET_32BIT"
!   "sbc%?\\t%0, %1, %3%S2"
!   [(set_attr "conds" "use")
!    (set_attr "arch" "32,a")
!    (set_attr "shift" "3")
!    (set_attr "predicable" "yes")
!    (set_attr "type" "alu_shift_imm,alu_shift_reg")]
  )
  
! ;; No RSC in Thumb2
! (define_insn "*rsbsi3_carryin_shift"
!   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
  	(minus:SI (minus:SI
  		   (match_operator:SI 2 "shift_operator"
! 		    [(match_operand:SI 3 "s_register_operand" "r,r")
! 		     (match_operand:SI 4 "shift_amount_operand" "M,r")])
! 		   (match_operand:SI 1 "s_register_operand" "r,r"))
  		  (match_operand:SI 5 "arm_borrow_operation" "")))]
!   "TARGET_ARM"
!   "rsc%?\\t%0, %1, %3%S2"
    [(set_attr "conds" "use")
     (set_attr "predicable" "yes")
!    (set_attr "type" "alu_shift_imm,alu_shift_reg")]
  )
  
! (define_insn "*rsbsi3_carryin_shift_alt"
!   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
  	(minus:SI (minus:SI
  		   (match_operator:SI 2 "shift_operator"
! 		    [(match_operand:SI 3 "s_register_operand" "r,r")
! 		     (match_operand:SI 4 "shift_amount_operand" "M,r")])
! 		    (match_operand:SI 5 "arm_borrow_operation" ""))
! 		  (match_operand:SI 1 "s_register_operand" "r,r")))]
    "TARGET_ARM"
    "rsc%?\\t%0, %1, %3%S2"
    [(set_attr "conds" "use")
     (set_attr "predicable" "yes")
!    (set_attr "type" "alu_shift_imm,alu_shift_reg")]
  )
  
  ; transform ((x << y) - 1) to ~(~(x-1) << y)  Where X is a constant.
***************
*** 1276,1477 ****
  ")
  
  (define_expand "addsf3"
!   [(set (match_operand:SF          0 "s_register_operand" "")
! 	(plus:SF (match_operand:SF 1 "s_register_operand" "")
! 		 (match_operand:SF 2 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "
  ")
  
  (define_expand "adddf3"
!   [(set (match_operand:DF          0 "s_register_operand" "")
! 	(plus:DF (match_operand:DF 1 "s_register_operand" "")
! 		 (match_operand:DF 2 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "
  ")
  
  (define_expand "subdi3"
   [(parallel
!    [(set (match_operand:DI            0 "s_register_operand" "")
! 	  (minus:DI (match_operand:DI 1 "s_register_operand" "")
! 	            (match_operand:DI 2 "s_register_operand" "")))
      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_EITHER"
    "
    if (TARGET_THUMB1)
      {
        if (!REG_P (operands[1]))
!         operands[1] = force_reg (DImode, operands[1]);
!       if (!REG_P (operands[2]))
!         operands[2] = force_reg (DImode, operands[2]);
!      }	
!   "
! )
  
! (define_insn_and_split "*arm_subdi3"
!   [(set (match_operand:DI           0 "arm_general_register_operand" "=&r,&r,&r")
! 	(minus:DI (match_operand:DI 1 "arm_general_register_operand" "0,r,0")
! 		  (match_operand:DI 2 "arm_general_register_operand" "r,0,0")))
!    (clobber (reg:CC CC_REGNUM))]
!   "TARGET_32BIT && !TARGET_NEON"
!   "#"  ; "subs\\t%Q0, %Q1, %Q2\;sbc\\t%R0, %R1, %R2"
!   "&& (!TARGET_IWMMXT || reload_completed)"
!   [(parallel [(set (reg:CC CC_REGNUM)
! 		   (compare:CC (match_dup 1) (match_dup 2)))
! 	      (set (match_dup 0) (minus:SI (match_dup 1) (match_dup 2)))])
!    (set (match_dup 3) (minus:SI (minus:SI (match_dup 4) (match_dup 5))
! 			       (ltu:SI (reg:CC CC_REGNUM) (const_int 0))))]
!   {
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!     operands[5] = gen_highpart (SImode, operands[2]);
!     operands[2] = gen_lowpart (SImode, operands[2]);
!    }
!   [(set_attr "conds" "clob")
!    (set_attr "length" "8")
!    (set_attr "type" "multiple")]
! )
  
! (define_insn_and_split "*subdi_di_zesidi"
!   [(set (match_operand:DI           0 "s_register_operand" "=&r,&r")
! 	(minus:DI (match_operand:DI 1 "s_register_operand"  "0,r")
! 		  (zero_extend:DI
! 		   (match_operand:SI 2 "s_register_operand"  "r,r"))))
!    (clobber (reg:CC CC_REGNUM))]
!   "TARGET_32BIT"
!   "#"   ; "subs\\t%Q0, %Q1, %2\;sbc\\t%R0, %R1, #0"
!   "&& reload_completed"
!   [(parallel [(set (reg:CC CC_REGNUM)
! 		   (compare:CC (match_dup 1) (match_dup 2)))
! 	      (set (match_dup 0) (minus:SI (match_dup 1) (match_dup 2)))])
!    (set (match_dup 3) (minus:SI (match_dup 4)
! 				(ltu:SI (reg:CC CC_REGNUM) (const_int 0))))]
!   {
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!    }
!   [(set_attr "conds" "clob")
!    (set_attr "length" "8")
!    (set_attr "type" "multiple")]
! )
  
! (define_insn_and_split "*subdi_di_sesidi"
!   [(set (match_operand:DI            0 "s_register_operand" "=&r,&r")
! 	(minus:DI (match_operand:DI  1 "s_register_operand"  "0,r")
! 		  (sign_extend:DI
! 		   (match_operand:SI 2 "s_register_operand"  "r,r"))))
!    (clobber (reg:CC CC_REGNUM))]
!   "TARGET_32BIT"
!   "#"   ; "subs\\t%Q0, %Q1, %2\;sbc\\t%R0, %R1, %2, asr #31"
!   "&& reload_completed"
!   [(parallel [(set (reg:CC CC_REGNUM)
! 		   (compare:CC (match_dup 1) (match_dup 2)))
! 	      (set (match_dup 0) (minus:SI (match_dup 1) (match_dup 2)))])
!    (set (match_dup 3) (minus:SI (minus:SI (match_dup 4)
!                                          (ashiftrt:SI (match_dup 2)
!                                                       (const_int 31)))
!                                 (ltu:SI (reg:CC CC_REGNUM) (const_int 0))))]
!   {
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!   }
!   [(set_attr "conds" "clob")
!    (set_attr "length" "8")
!    (set_attr "type" "multiple")]
! )
  
! (define_insn_and_split "*subdi_zesidi_di"
!   [(set (match_operand:DI            0 "s_register_operand" "=&r,&r")
! 	(minus:DI (zero_extend:DI
! 		   (match_operand:SI 2 "s_register_operand"  "r,r"))
! 		  (match_operand:DI  1 "s_register_operand" "0,r")))
!    (clobber (reg:CC CC_REGNUM))]
!   "TARGET_ARM"
!   "#"   ; "rsbs\\t%Q0, %Q1, %2\;rsc\\t%R0, %R1, #0"
!         ; is equivalent to:
!         ; "subs\\t%Q0, %2, %Q1\;rsc\\t%R0, %R1, #0"
!   "&& reload_completed"
!   [(parallel [(set (reg:CC CC_REGNUM)
! 		   (compare:CC (match_dup 2) (match_dup 1)))
! 	      (set (match_dup 0) (minus:SI (match_dup 2) (match_dup 1)))])
!    (set (match_dup 3) (minus:SI (minus:SI (const_int 0) (match_dup 4))
! 			       (ltu:SI (reg:CC CC_REGNUM) (const_int 0))))]
!   {
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!   }
!   [(set_attr "conds" "clob")
!    (set_attr "length" "8")
!    (set_attr "type" "multiple")]
! )
  
! (define_insn_and_split "*subdi_sesidi_di"
!   [(set (match_operand:DI            0 "s_register_operand" "=&r,&r")
! 	(minus:DI (sign_extend:DI
! 		   (match_operand:SI 2 "s_register_operand"   "r,r"))
! 		  (match_operand:DI  1 "s_register_operand"  "0,r")))
!    (clobber (reg:CC CC_REGNUM))]
!   "TARGET_ARM"
!   "#"   ; "rsbs\\t%Q0, %Q1, %2\;rsc\\t%R0, %R1, %2, asr #31"
!         ; is equivalent to:
!         ; "subs\\t%Q0, %2, %Q1\;rsc\\t%R0, %R1, %2, asr #31"
!   "&& reload_completed"
!   [(parallel [(set (reg:CC CC_REGNUM)
! 		   (compare:CC (match_dup 2) (match_dup 1)))
! 	      (set (match_dup 0) (minus:SI (match_dup 2) (match_dup 1)))])
!    (set (match_dup 3) (minus:SI (minus:SI
!                                 (ashiftrt:SI (match_dup 2)
!                                              (const_int 31))
!                                 (match_dup 4))
! 			       (ltu:SI (reg:CC CC_REGNUM) (const_int 0))))]
!   {
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!   }
!   [(set_attr "conds" "clob")
!    (set_attr "length" "8")
!    (set_attr "type" "multiple")]
! )
  
! (define_insn_and_split "*subdi_zesidi_zesidi"
!   [(set (match_operand:DI            0 "s_register_operand" "=r")
! 	(minus:DI (zero_extend:DI
! 		   (match_operand:SI 1 "s_register_operand"  "r"))
! 		  (zero_extend:DI
! 		   (match_operand:SI 2 "s_register_operand"  "r"))))
!    (clobber (reg:CC CC_REGNUM))]
!   "TARGET_32BIT"
!   "#"   ; "subs\\t%Q0, %1, %2\;sbc\\t%R0, %1, %1"
!   "&& reload_completed"
!   [(parallel [(set (reg:CC CC_REGNUM)
! 		   (compare:CC (match_dup 1) (match_dup 2)))
! 	      (set (match_dup 0) (minus:SI (match_dup 1) (match_dup 2)))])
!    (set (match_dup 3) (minus:SI (minus:SI (match_dup 1) (match_dup 1))
! 			       (ltu:SI (reg:CC CC_REGNUM) (const_int 0))))]
!   {
!        operands[3] = gen_highpart (SImode, operands[0]);
!        operands[0] = gen_lowpart (SImode, operands[0]);
!   }
!   [(set_attr "conds" "clob")
!    (set_attr "length" "8")
!    (set_attr "type" "multiple")]
  )
  
  (define_expand "subsi3"
!   [(set (match_operand:SI           0 "s_register_operand" "")
! 	(minus:SI (match_operand:SI 1 "reg_or_int_operand" "")
! 		  (match_operand:SI 2 "s_register_operand" "")))]
    "TARGET_EITHER"
    "
    if (CONST_INT_P (operands[1]))
--- 1877,1971 ----
  ")
  
  (define_expand "addsf3"
!   [(set (match_operand:SF          0 "s_register_operand")
! 	(plus:SF (match_operand:SF 1 "s_register_operand")
! 		 (match_operand:SF 2 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "
  ")
  
  (define_expand "adddf3"
!   [(set (match_operand:DF          0 "s_register_operand")
! 	(plus:DF (match_operand:DF 1 "s_register_operand")
! 		 (match_operand:DF 2 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "
  ")
  
  (define_expand "subdi3"
   [(parallel
!    [(set (match_operand:DI            0 "s_register_operand")
! 	  (minus:DI (match_operand:DI 1 "reg_or_int_operand")
! 		    (match_operand:DI 2 "s_register_operand")))
      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_EITHER"
    "
    if (TARGET_THUMB1)
      {
        if (!REG_P (operands[1]))
! 	operands[1] = force_reg (DImode, operands[1]);
!     }
!   else
!     {
!       rtx lo_result, hi_result, lo_dest, hi_dest;
!       rtx lo_op1, hi_op1, lo_op2, hi_op2;
!       rtx condition;
  
!       /* Since operands[1] may be an integer, pass it second, so that
! 	 any necessary simplifications will be done on the decomposed
! 	 constant.  */
!       arm_decompose_di_binop (operands[2], operands[1], &lo_op2, &hi_op2,
! 			      &lo_op1, &hi_op1);
!       lo_result = lo_dest = gen_lowpart (SImode, operands[0]);
!       hi_result = hi_dest = gen_highpart (SImode, operands[0]);
  
!       if (!arm_rhs_operand (lo_op1, SImode))
! 	lo_op1 = force_reg (SImode, lo_op1);
  
!       if ((TARGET_THUMB2 && ! s_register_operand (hi_op1, SImode))
! 	  || !arm_rhs_operand (hi_op1, SImode))
! 	hi_op1 = force_reg (SImode, hi_op1);
  
!       rtx cc_reg;
!       if (lo_op1 == const0_rtx)
! 	{
! 	  cc_reg = gen_rtx_REG (CC_RSBmode, CC_REGNUM);
! 	  emit_insn (gen_negsi2_0compare (lo_dest, lo_op2));
! 	}
!       else if (CONST_INT_P (lo_op1))
! 	{
! 	  cc_reg = gen_rtx_REG (CC_RSBmode, CC_REGNUM);
! 	  emit_insn (gen_rsb_imm_compare (lo_dest, lo_op1, lo_op2, 
! 					  GEN_INT (~UINTVAL (lo_op1))));
! 	}
!       else
! 	{
! 	  cc_reg = gen_rtx_REG (CCmode, CC_REGNUM);
! 	  emit_insn (gen_subsi3_compare (lo_dest, lo_op1, lo_op2));
! 	}
  
!       condition = gen_rtx_LTU (SImode, cc_reg, const0_rtx);
  
!       if (hi_op1 == const0_rtx)
!         emit_insn (gen_negsi2_carryin (hi_dest, hi_op2, condition));
!       else
! 	emit_insn (gen_subsi3_carryin (hi_dest, hi_op1, hi_op2, condition));
! 
!       if (lo_result != lo_dest)
! 	emit_move_insn (lo_result, lo_dest);
! 
!       if (hi_result != hi_dest)
! 	emit_move_insn (hi_result, hi_dest);
! 
!       DONE;
!     }
!   "
  )
  
  (define_expand "subsi3"
!   [(set (match_operand:SI           0 "s_register_operand")
! 	(minus:SI (match_operand:SI 1 "reg_or_int_operand")
! 		  (match_operand:SI 2 "s_register_operand")))]
    "TARGET_EITHER"
    "
    if (CONST_INT_P (operands[1]))
***************
*** 1540,1547 ****
  )
  
  (define_insn "subsi3_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (minus:SI (match_operand:SI 1 "arm_rhs_operand" "r,r,I")
  		   (match_operand:SI 2 "arm_rhs_operand" "I,r,r"))
  	 (const_int 0)))
--- 2034,2041 ----
  )
  
  (define_insn "subsi3_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (minus:SI (match_operand:SI 1 "arm_rhs_operand" "r,r,I")
  		   (match_operand:SI 2 "arm_rhs_operand" "I,r,r"))
  	 (const_int 0)))
***************
*** 1568,1588 ****
     subs%?\\t%0, %1, %2
     rsbs%?\\t%0, %2, %1"
    [(set_attr "conds" "set")
!    (set_attr "type" "alus_imm,alus_sreg,alus_sreg")]
  )
  
  (define_expand "subsf3"
!   [(set (match_operand:SF           0 "s_register_operand" "")
! 	(minus:SF (match_operand:SF 1 "s_register_operand" "")
! 		  (match_operand:SF 2 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "
  ")
  
  (define_expand "subdf3"
!   [(set (match_operand:DF           0 "s_register_operand" "")
! 	(minus:DF (match_operand:DF 1 "s_register_operand" "")
! 		  (match_operand:DF 2 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "
  ")
--- 2062,2206 ----
     subs%?\\t%0, %1, %2
     rsbs%?\\t%0, %2, %1"
    [(set_attr "conds" "set")
!    (set_attr "type" "alus_imm,alus_sreg,alus_imm")]
! )
! 
! ;; To keep the comparison in canonical form we express it as (~reg cmp ~0)
! ;; rather than (0 cmp reg).  This gives the same results for unsigned
! ;; and equality compares which is what we mostly need here.
! (define_insn "rsb_imm_compare"
!   [(set (reg:CC_RSB CC_REGNUM)
! 	(compare:CC_RSB (not:SI (match_operand:SI 2 "s_register_operand" "r"))
! 			(match_operand 3 "const_int_operand" "")))
!    (set (match_operand:SI 0 "s_register_operand" "=r")
! 	(minus:SI (match_operand 1 "arm_immediate_operand" "I")
! 		  (match_dup 2)))]
!   "TARGET_32BIT && ~UINTVAL (operands[1]) == UINTVAL (operands[3])"
!   "rsbs\\t%0, %2, %1"
!   [(set_attr "conds" "set")
!    (set_attr "type" "alus_imm")]
! )
! 
! ;; Similarly, but the result is unused.
! (define_insn "rsb_imm_compare_scratch"
!   [(set (reg:CC_RSB CC_REGNUM)
! 	(compare:CC_RSB (not:SI (match_operand:SI 2 "s_register_operand" "r"))
! 			(match_operand 1 "arm_not_immediate_operand" "K")))
!    (clobber (match_scratch:SI 0 "=r"))]
!   "TARGET_32BIT"
!   "rsbs\\t%0, %2, #%B1"
!   [(set_attr "conds" "set")
!    (set_attr "type" "alus_imm")]
! )
! 
! ;; Compare the sum of a value plus a carry against a constant.  Uses
! ;; RSC, so the result is swapped.  Only available on Arm
! (define_insn "rscsi3_<CC_EXTEND>out_scratch"
!   [(set (reg:CC_SWP CC_REGNUM)
! 	(compare:CC_SWP
! 	 (plus:DI (SE:DI (match_operand:SI 2 "s_register_operand" "r"))
! 		  (match_operand:DI 3 "arm_borrow_operation" ""))
! 	 (match_operand 1 "arm_immediate_operand" "I")))
!    (clobber (match_scratch:SI 0 "=r"))]
!   "TARGET_ARM"
!   "rscs\\t%0, %2, %1"
!   [(set_attr "conds" "set")
!    (set_attr "type" "alus_imm")]
! )
! 
! (define_insn "usubvsi3_borrow"
!   [(set (reg:CC_B CC_REGNUM)
! 	(compare:CC_B
! 	 (zero_extend:DI (match_operand:SI 1 "s_register_operand" "0,r"))
! 	 (plus:DI (match_operand:DI 4 "arm_borrow_operation" "")
! 	          (zero_extend:DI
! 		   (match_operand:SI 2 "s_register_operand" "l,r")))))
!    (set (match_operand:SI 0 "s_register_operand" "=l,r")
! 	(minus:SI (match_dup 1)
! 		  (plus:SI (match_operand:SI 3 "arm_borrow_operation" "")
! 			   (match_dup 2))))]
!   "TARGET_32BIT"
!   "sbcs%?\\t%0, %1, %2"
!   [(set_attr "conds" "set")
!    (set_attr "arch" "t2,*")
!    (set_attr "length" "2,4")]
! )
! 
! (define_insn "usubvsi3_borrow_imm"
!   [(set (reg:CC_B CC_REGNUM)
! 	(compare:CC_B
! 	 (zero_extend:DI (match_operand:SI 1 "s_register_operand" "r,r"))
! 	 (plus:DI (match_operand:DI 5 "arm_borrow_operation" "")
! 		  (match_operand:DI 3 "const_int_operand" "n,n"))))
!    (set (match_operand:SI 0 "s_register_operand" "=r,r")
! 	(minus:SI (match_dup 1)
! 		  (plus:SI (match_operand:SI 4 "arm_borrow_operation" "")
! 			   (match_operand:SI 2 "arm_adcimm_operand" "I,K"))))]
!   "TARGET_32BIT
!    && (UINTVAL (operands[2]) & 0xffffffff) == UINTVAL (operands[3])"
!   "@
!   sbcs%?\\t%0, %1, %2
!   adcs%?\\t%0, %1, #%B2"
!   [(set_attr "conds" "set")
!    (set_attr "type" "alus_imm")]
! )
! 
! (define_insn "subvsi3_borrow"
!   [(set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
! 	 (minus:DI
! 	  (minus:DI
! 	   (sign_extend:DI (match_operand:SI 1 "s_register_operand" "0,r"))
! 	   (sign_extend:DI (match_operand:SI 2 "s_register_operand" "l,r")))
! 	  (match_operand:DI 4 "arm_borrow_operation" ""))
! 	 (sign_extend:DI
! 	  (minus:SI (minus:SI (match_dup 1) (match_dup 2))
! 		    (match_operand:SI 3 "arm_borrow_operation" "")))))
!    (set (match_operand:SI 0 "s_register_operand" "=l,r")
! 	(minus:SI (minus:SI (match_dup 1) (match_dup 2))
! 		  (match_dup 3)))]
!   "TARGET_32BIT"
!   "sbcs%?\\t%0, %1, %2"
!   [(set_attr "conds" "set")
!    (set_attr "arch" "t2,*")
!    (set_attr "length" "2,4")]
! )
! 
! (define_insn "subvsi3_borrow_imm"
!   [(set (reg:CC_V CC_REGNUM)
! 	(compare:CC_V
! 	 (minus:DI
! 	  (minus:DI
! 	   (sign_extend:DI (match_operand:SI 1 "s_register_operand" "r,r"))
! 	   (match_operand 2 "arm_adcimm_operand" "I,K"))
! 	  (match_operand:DI 4 "arm_borrow_operation" ""))
! 	 (sign_extend:DI
! 	  (minus:SI (minus:SI (match_dup 1) (match_dup 2))
! 		    (match_operand:SI 3 "arm_borrow_operation" "")))))
!    (set (match_operand:SI 0 "s_register_operand" "=r,r")
! 	(minus:SI (minus:SI (match_dup 1) (match_dup 2))
! 		  (match_dup 3)))]
!   "TARGET_32BIT
!    && INTVAL (operands[2]) == ARM_SIGN_EXTEND (INTVAL (operands[2]))"
!   "@
!   sbcs%?\\t%0, %1, %2
!   adcs%?\\t%0, %1, #%B2"
!   [(set_attr "conds" "set")
!    (set_attr "type" "alus_imm")]
  )
  
  (define_expand "subsf3"
!   [(set (match_operand:SF           0 "s_register_operand")
! 	(minus:SF (match_operand:SF 1 "s_register_operand")
! 		  (match_operand:SF 2 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "
  ")
  
  (define_expand "subdf3"
!   [(set (match_operand:DF           0 "s_register_operand")
! 	(minus:DF (match_operand:DF 1 "s_register_operand")
! 		  (match_operand:DF 2 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "
  ")
***************
*** 1591,1599 ****
  ;; Multiplication insns
  
  (define_expand "mulhi3"
!   [(set (match_operand:HI 0 "s_register_operand" "")
! 	(mult:HI (match_operand:HI 1 "s_register_operand" "")
! 		 (match_operand:HI 2 "s_register_operand" "")))]
    "TARGET_DSP_MULTIPLY"
    "
    {
--- 2209,2217 ----
  ;; Multiplication insns
  
  (define_expand "mulhi3"
!   [(set (match_operand:HI 0 "s_register_operand")
! 	(mult:HI (match_operand:HI 1 "s_register_operand")
! 		 (match_operand:HI 2 "s_register_operand")))]
    "TARGET_DSP_MULTIPLY"
    "
    {
***************
*** 1605,1644 ****
  )
  
  (define_expand "mulsi3"
!   [(set (match_operand:SI          0 "s_register_operand" "")
! 	(mult:SI (match_operand:SI 2 "s_register_operand" "")
! 		 (match_operand:SI 1 "s_register_operand" "")))]
    "TARGET_EITHER"
    ""
  )
  
! ;; Use `&' and then `0' to prevent the operands 0 and 1 being the same
! (define_insn "*arm_mulsi3"
!   [(set (match_operand:SI          0 "s_register_operand" "=&r,&r")
! 	(mult:SI (match_operand:SI 2 "s_register_operand" "r,r")
! 		 (match_operand:SI 1 "s_register_operand" "%0,r")))]
!   "TARGET_32BIT && !arm_arch6"
    "mul%?\\t%0, %2, %1"
    [(set_attr "type" "mul")
!    (set_attr "predicable" "yes")]
  )
  
! (define_insn "*arm_mulsi3_v6"
!   [(set (match_operand:SI          0 "s_register_operand" "=l,l,r")
! 	(mult:SI (match_operand:SI 1 "s_register_operand" "0,l,r")
! 		 (match_operand:SI 2 "s_register_operand" "l,0,r")))]
!   "TARGET_32BIT && arm_arch6"
!   "mul%?\\t%0, %1, %2"
!   [(set_attr "type" "mul")
     (set_attr "predicable" "yes")
!    (set_attr "arch" "t2,t2,*")
!    (set_attr "length" "4")
!    (set_attr "predicable_short_it" "yes,yes,no")]
  )
  
  (define_insn "*mulsi3_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (mult:SI
  			  (match_operand:SI 2 "s_register_operand" "r,r")
  			  (match_operand:SI 1 "s_register_operand" "%0,r"))
  			 (const_int 0)))
--- 2223,2280 ----
  )
  
  (define_expand "mulsi3"
!   [(set (match_operand:SI          0 "s_register_operand")
! 	(mult:SI (match_operand:SI 2 "s_register_operand")
! 		 (match_operand:SI 1 "s_register_operand")))]
    "TARGET_EITHER"
    ""
  )
  
! ;; Use `&' and then `0' to prevent operands 0 and 2 being the same
! (define_insn "*mul"
!   [(set (match_operand:SI          0 "s_register_operand" "=l,r,&r,&r")
! 	(mult:SI (match_operand:SI 2 "s_register_operand" "l,r,r,r")
! 		 (match_operand:SI 1 "s_register_operand" "%0,r,0,r")))]
!   "TARGET_32BIT"
    "mul%?\\t%0, %2, %1"
    [(set_attr "type" "mul")
!    (set_attr "predicable" "yes")
!    (set_attr "arch" "t2,v6,nov6,nov6")
!    (set_attr "length" "4")
!    (set_attr "predicable_short_it" "yes,no,*,*")]
  )
  
! ;; MLA and MLS instruction. Use operand 1 for the accumulator to prefer
! ;; reusing the same register.
! 
! (define_insn "*mla"
!   [(set (match_operand:SI 0 "s_register_operand" "=r,&r,&r,&r")
! 	(plus:SI
! 	  (mult:SI (match_operand:SI 3 "s_register_operand" "r,r,r,r")
! 		   (match_operand:SI 2 "s_register_operand" "%r,r,0,r"))
! 	  (match_operand:SI 1 "s_register_operand" "r,0,r,r")))]
!   "TARGET_32BIT"
!   "mla%?\\t%0, %3, %2, %1"
!   [(set_attr "type" "mla")
     (set_attr "predicable" "yes")
!    (set_attr "arch" "v6,nov6,nov6,nov6")]
! )
! 
! (define_insn "*mls"
!   [(set (match_operand:SI 0 "s_register_operand" "=r")
! 	(minus:SI
! 	  (match_operand:SI 1 "s_register_operand" "r")
! 	  (mult:SI (match_operand:SI 3 "s_register_operand" "r")
! 		   (match_operand:SI 2 "s_register_operand" "r"))))]
!   "TARGET_32BIT && arm_arch_thumb2"
!   "mls%?\\t%0, %3, %2, %1"
!   [(set_attr "type" "mla")
!    (set_attr "predicable" "yes")]
  )
  
  (define_insn "*mulsi3_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (mult:SI
  			  (match_operand:SI 2 "s_register_operand" "r,r")
  			  (match_operand:SI 1 "s_register_operand" "%0,r"))
  			 (const_int 0)))
***************
*** 1651,1658 ****
  )
  
  (define_insn "*mulsi3_compare0_v6"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (mult:SI
  			  (match_operand:SI 2 "s_register_operand" "r")
  			  (match_operand:SI 1 "s_register_operand" "r"))
  			 (const_int 0)))
--- 2287,2294 ----
  )
  
  (define_insn "*mulsi3_compare0_v6"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (mult:SI
  			  (match_operand:SI 2 "s_register_operand" "r")
  			  (match_operand:SI 1 "s_register_operand" "r"))
  			 (const_int 0)))
***************
*** 1665,1672 ****
  )
  
  (define_insn "*mulsi_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (mult:SI
  			  (match_operand:SI 2 "s_register_operand" "r,r")
  			  (match_operand:SI 1 "s_register_operand" "%0,r"))
  			 (const_int 0)))
--- 2301,2308 ----
  )
  
  (define_insn "*mulsi_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (mult:SI
  			  (match_operand:SI 2 "s_register_operand" "r,r")
  			  (match_operand:SI 1 "s_register_operand" "%0,r"))
  			 (const_int 0)))
***************
*** 1678,1685 ****
  )
  
  (define_insn "*mulsi_compare0_scratch_v6"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (mult:SI
  			  (match_operand:SI 2 "s_register_operand" "r")
  			  (match_operand:SI 1 "s_register_operand" "r"))
  			 (const_int 0)))
--- 2314,2321 ----
  )
  
  (define_insn "*mulsi_compare0_scratch_v6"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (mult:SI
  			  (match_operand:SI 2 "s_register_operand" "r")
  			  (match_operand:SI 1 "s_register_operand" "r"))
  			 (const_int 0)))
***************
*** 1690,1724 ****
     (set_attr "type" "muls")]
  )
  
- ;; Unnamed templates to match MLA instruction.
- 
- (define_insn "*mulsi3addsi"
-   [(set (match_operand:SI 0 "s_register_operand" "=&r,&r,&r,&r")
- 	(plus:SI
- 	  (mult:SI (match_operand:SI 2 "s_register_operand" "r,r,r,r")
- 		   (match_operand:SI 1 "s_register_operand" "%0,r,0,r"))
- 	  (match_operand:SI 3 "s_register_operand" "r,r,0,0")))]
-   "TARGET_32BIT && !arm_arch6"
-   "mla%?\\t%0, %2, %1, %3"
-   [(set_attr "type" "mla")
-    (set_attr "predicable" "yes")]
- )
- 
- (define_insn "*mulsi3addsi_v6"
-   [(set (match_operand:SI 0 "s_register_operand" "=r")
- 	(plus:SI
- 	  (mult:SI (match_operand:SI 2 "s_register_operand" "r")
- 		   (match_operand:SI 1 "s_register_operand" "r"))
- 	  (match_operand:SI 3 "s_register_operand" "r")))]
-   "TARGET_32BIT && arm_arch6"
-   "mla%?\\t%0, %2, %1, %3"
-   [(set_attr "type" "mla")
-    (set_attr "predicable" "yes")]
- )
- 
  (define_insn "*mulsi3addsi_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (plus:SI (mult:SI
  		   (match_operand:SI 2 "s_register_operand" "r,r,r,r")
  		   (match_operand:SI 1 "s_register_operand" "%0,r,0,r"))
--- 2326,2334 ----
     (set_attr "type" "muls")]
  )
  
  (define_insn "*mulsi3addsi_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (plus:SI (mult:SI
  		   (match_operand:SI 2 "s_register_operand" "r,r,r,r")
  		   (match_operand:SI 1 "s_register_operand" "%0,r,0,r"))
***************
*** 1734,1741 ****
  )
  
  (define_insn "*mulsi3addsi_compare0_v6"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (plus:SI (mult:SI
  		   (match_operand:SI 2 "s_register_operand" "r")
  		   (match_operand:SI 1 "s_register_operand" "r"))
--- 2344,2351 ----
  )
  
  (define_insn "*mulsi3addsi_compare0_v6"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (plus:SI (mult:SI
  		   (match_operand:SI 2 "s_register_operand" "r")
  		   (match_operand:SI 1 "s_register_operand" "r"))
***************
*** 1751,1758 ****
  )
  
  (define_insn "*mulsi3addsi_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (plus:SI (mult:SI
  		   (match_operand:SI 2 "s_register_operand" "r,r,r,r")
  		   (match_operand:SI 1 "s_register_operand" "%0,r,0,r"))
--- 2361,2368 ----
  )
  
  (define_insn "*mulsi3addsi_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (plus:SI (mult:SI
  		   (match_operand:SI 2 "s_register_operand" "r,r,r,r")
  		   (match_operand:SI 1 "s_register_operand" "%0,r,0,r"))
***************
*** 1766,1773 ****
  )
  
  (define_insn "*mulsi3addsi_compare0_scratch_v6"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (plus:SI (mult:SI
  		   (match_operand:SI 2 "s_register_operand" "r")
  		   (match_operand:SI 1 "s_register_operand" "r"))
--- 2376,2383 ----
  )
  
  (define_insn "*mulsi3addsi_compare0_scratch_v6"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (plus:SI (mult:SI
  		   (match_operand:SI 2 "s_register_operand" "r")
  		   (match_operand:SI 1 "s_register_operand" "r"))
***************
*** 1780,2023 ****
     (set_attr "type" "mlas")]
  )
  
- (define_insn "*mulsi3subsi"
-   [(set (match_operand:SI 0 "s_register_operand" "=r")
- 	(minus:SI
- 	  (match_operand:SI 3 "s_register_operand" "r")
- 	  (mult:SI (match_operand:SI 2 "s_register_operand" "r")
- 		   (match_operand:SI 1 "s_register_operand" "r"))))]
-   "TARGET_32BIT && arm_arch_thumb2"
-   "mls%?\\t%0, %2, %1, %3"
-   [(set_attr "type" "mla")
-    (set_attr "predicable" "yes")]
- )
- 
- (define_expand "maddsidi4"
-   [(set (match_operand:DI 0 "s_register_operand" "")
- 	(plus:DI
- 	 (mult:DI
- 	  (sign_extend:DI (match_operand:SI 1 "s_register_operand" ""))
- 	  (sign_extend:DI (match_operand:SI 2 "s_register_operand" "")))
- 	 (match_operand:DI 3 "s_register_operand" "")))]
-   "TARGET_32BIT"
-   "")
- 
- (define_insn "*mulsidi3adddi"
-   [(set (match_operand:DI 0 "s_register_operand" "=&r")
- 	(plus:DI
- 	 (mult:DI
- 	  (sign_extend:DI (match_operand:SI 2 "s_register_operand" "%r"))
- 	  (sign_extend:DI (match_operand:SI 3 "s_register_operand" "r")))
- 	 (match_operand:DI 1 "s_register_operand" "0")))]
-   "TARGET_32BIT && !arm_arch6"
-   "smlal%?\\t%Q0, %R0, %3, %2"
-   [(set_attr "type" "smlal")
-    (set_attr "predicable" "yes")]
- )
- 
- (define_insn "*mulsidi3adddi_v6"
-   [(set (match_operand:DI 0 "s_register_operand" "=r")
- 	(plus:DI
- 	 (mult:DI
- 	  (sign_extend:DI (match_operand:SI 2 "s_register_operand" "r"))
- 	  (sign_extend:DI (match_operand:SI 3 "s_register_operand" "r")))
- 	 (match_operand:DI 1 "s_register_operand" "0")))]
-   "TARGET_32BIT && arm_arch6"
-   "smlal%?\\t%Q0, %R0, %3, %2"
-   [(set_attr "type" "smlal")
-    (set_attr "predicable" "yes")]
- )
- 
  ;; 32x32->64 widening multiply.
! ;; As with mulsi3, the only difference between the v3-5 and v6+
! ;; versions of these patterns is the requirement that the output not
! ;; overlap the inputs, but that still means we have to have a named
! ;; expander and two different starred insns.
  
! (define_expand "mulsidi3"
!   [(set (match_operand:DI 0 "s_register_operand" "")
  	(mult:DI
! 	 (sign_extend:DI (match_operand:SI 1 "s_register_operand" ""))
! 	 (sign_extend:DI (match_operand:SI 2 "s_register_operand" ""))))]
    "TARGET_32BIT"
!   ""
! )
! 
! (define_insn "*mulsidi3_nov6"
!   [(set (match_operand:DI 0 "s_register_operand" "=&r")
! 	(mult:DI
! 	 (sign_extend:DI (match_operand:SI 1 "s_register_operand" "%r"))
! 	 (sign_extend:DI (match_operand:SI 2 "s_register_operand" "r"))))]
!   "TARGET_32BIT && !arm_arch6"
!   "smull%?\\t%Q0, %R0, %1, %2"
!   [(set_attr "type" "smull")
!    (set_attr "predicable" "yes")]
! )
! 
! (define_insn "*mulsidi3_v6"
!   [(set (match_operand:DI 0 "s_register_operand" "=r")
! 	(mult:DI
! 	 (sign_extend:DI (match_operand:SI 1 "s_register_operand" "r"))
! 	 (sign_extend:DI (match_operand:SI 2 "s_register_operand" "r"))))]
!   "TARGET_32BIT && arm_arch6"
!   "smull%?\\t%Q0, %R0, %1, %2"
!   [(set_attr "type" "smull")
!    (set_attr "predicable" "yes")]
  )
  
! (define_expand "umulsidi3"
!   [(set (match_operand:DI 0 "s_register_operand" "")
! 	(mult:DI
! 	 (zero_extend:DI (match_operand:SI 1 "s_register_operand" ""))
! 	 (zero_extend:DI (match_operand:SI 2 "s_register_operand" ""))))]
    "TARGET_32BIT"
!   ""
! )
! 
! (define_insn "*umulsidi3_nov6"
!   [(set (match_operand:DI 0 "s_register_operand" "=&r")
! 	(mult:DI
! 	 (zero_extend:DI (match_operand:SI 1 "s_register_operand" "%r"))
! 	 (zero_extend:DI (match_operand:SI 2 "s_register_operand" "r"))))]
!   "TARGET_32BIT && !arm_arch6"
!   "umull%?\\t%Q0, %R0, %1, %2"
!   [(set_attr "type" "umull")
!    (set_attr "predicable" "yes")]
! )
! 
! (define_insn "*umulsidi3_v6"
!   [(set (match_operand:DI 0 "s_register_operand" "=r")
! 	(mult:DI
! 	 (zero_extend:DI (match_operand:SI 1 "s_register_operand" "r"))
! 	 (zero_extend:DI (match_operand:SI 2 "s_register_operand" "r"))))]
!   "TARGET_32BIT && arm_arch6"
!   "umull%?\\t%Q0, %R0, %1, %2"
    [(set_attr "type" "umull")
!    (set_attr "predicable" "yes")]
  )
  
! (define_expand "umaddsidi4"
!   [(set (match_operand:DI 0 "s_register_operand" "")
  	(plus:DI
  	 (mult:DI
! 	  (zero_extend:DI (match_operand:SI 1 "s_register_operand" ""))
! 	  (zero_extend:DI (match_operand:SI 2 "s_register_operand" "")))
! 	 (match_operand:DI 3 "s_register_operand" "")))]
    "TARGET_32BIT"
!   "")
! 
! (define_insn "*umulsidi3adddi"
!   [(set (match_operand:DI 0 "s_register_operand" "=&r")
! 	(plus:DI
! 	 (mult:DI
! 	  (zero_extend:DI (match_operand:SI 2 "s_register_operand" "%r"))
! 	  (zero_extend:DI (match_operand:SI 3 "s_register_operand" "r")))
! 	 (match_operand:DI 1 "s_register_operand" "0")))]
!   "TARGET_32BIT && !arm_arch6"
!   "umlal%?\\t%Q0, %R0, %3, %2"
!   [(set_attr "type" "umlal")
!    (set_attr "predicable" "yes")]
  )
  
! (define_insn "*umulsidi3adddi_v6"
!   [(set (match_operand:DI 0 "s_register_operand" "=r")
! 	(plus:DI
! 	 (mult:DI
! 	  (zero_extend:DI (match_operand:SI 2 "s_register_operand" "r"))
! 	  (zero_extend:DI (match_operand:SI 3 "s_register_operand" "r")))
! 	 (match_operand:DI 1 "s_register_operand" "0")))]
!   "TARGET_32BIT && arm_arch6"
!   "umlal%?\\t%Q0, %R0, %3, %2"
    [(set_attr "type" "umlal")
!    (set_attr "predicable" "yes")]
  )
  
! (define_expand "smulsi3_highpart"
    [(parallel
!     [(set (match_operand:SI 0 "s_register_operand" "")
  	  (truncate:SI
  	   (lshiftrt:DI
  	    (mult:DI
! 	     (sign_extend:DI (match_operand:SI 1 "s_register_operand" ""))
! 	     (sign_extend:DI (match_operand:SI 2 "s_register_operand" "")))
  	    (const_int 32))))
       (clobber (match_scratch:SI 3 ""))])]
    "TARGET_32BIT"
    ""
  )
  
! (define_insn "*smulsi3_highpart_nov6"
!   [(set (match_operand:SI 0 "s_register_operand" "=&r,&r")
! 	(truncate:SI
! 	 (lshiftrt:DI
! 	  (mult:DI
! 	   (sign_extend:DI (match_operand:SI 1 "s_register_operand" "%0,r"))
! 	   (sign_extend:DI (match_operand:SI 2 "s_register_operand" "r,r")))
! 	  (const_int 32))))
!    (clobber (match_scratch:SI 3 "=&r,&r"))]
!   "TARGET_32BIT && !arm_arch6"
!   "smull%?\\t%3, %0, %2, %1"
!   [(set_attr "type" "smull")
!    (set_attr "predicable" "yes")]
! )
! 
! (define_insn "*smulsi3_highpart_v6"
!   [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(truncate:SI
  	 (lshiftrt:DI
  	  (mult:DI
! 	   (sign_extend:DI (match_operand:SI 1 "s_register_operand" "r"))
! 	   (sign_extend:DI (match_operand:SI 2 "s_register_operand" "r")))
  	  (const_int 32))))
!    (clobber (match_scratch:SI 3 "=r"))]
!   "TARGET_32BIT && arm_arch6"
!   "smull%?\\t%3, %0, %2, %1"
!   [(set_attr "type" "smull")
!    (set_attr "predicable" "yes")]
! )
! 
! (define_expand "umulsi3_highpart"
!   [(parallel
!     [(set (match_operand:SI 0 "s_register_operand" "")
! 	  (truncate:SI
! 	   (lshiftrt:DI
! 	    (mult:DI
! 	     (zero_extend:DI (match_operand:SI 1 "s_register_operand" ""))
! 	      (zero_extend:DI (match_operand:SI 2 "s_register_operand" "")))
! 	    (const_int 32))))
!      (clobber (match_scratch:SI 3 ""))])]
    "TARGET_32BIT"
!   ""
! )
! 
! (define_insn "*umulsi3_highpart_nov6"
!   [(set (match_operand:SI 0 "s_register_operand" "=&r,&r")
! 	(truncate:SI
! 	 (lshiftrt:DI
! 	  (mult:DI
! 	   (zero_extend:DI (match_operand:SI 1 "s_register_operand" "%0,r"))
! 	   (zero_extend:DI (match_operand:SI 2 "s_register_operand" "r,r")))
! 	  (const_int 32))))
!    (clobber (match_scratch:SI 3 "=&r,&r"))]
!   "TARGET_32BIT && !arm_arch6"
!   "umull%?\\t%3, %0, %2, %1"
!   [(set_attr "type" "umull")
!    (set_attr "predicable" "yes")]
! )
! 
! (define_insn "*umulsi3_highpart_v6"
!   [(set (match_operand:SI 0 "s_register_operand" "=r")
! 	(truncate:SI
! 	 (lshiftrt:DI
! 	  (mult:DI
! 	   (zero_extend:DI (match_operand:SI 1 "s_register_operand" "r"))
! 	   (zero_extend:DI (match_operand:SI 2 "s_register_operand" "r")))
! 	  (const_int 32))))
!    (clobber (match_scratch:SI 3 "=r"))]
!   "TARGET_32BIT && arm_arch6"
!   "umull%?\\t%3, %0, %2, %1"
    [(set_attr "type" "umull")
!    (set_attr "predicable" "yes")]
  )
  
  (define_insn "mulhisi3"
--- 2390,2499 ----
     (set_attr "type" "mlas")]
  )
  
  ;; 32x32->64 widening multiply.
! ;; The only difference between the v3-5 and v6+ versions is the requirement
! ;; that the output does not overlap with either input.
  
! (define_expand "<Us>mulsidi3"
!   [(set (match_operand:DI 0 "s_register_operand")
  	(mult:DI
! 	 (SE:DI (match_operand:SI 1 "s_register_operand"))
! 	 (SE:DI (match_operand:SI 2 "s_register_operand"))))]
    "TARGET_32BIT"
!   {
!       emit_insn (gen_<US>mull (gen_lowpart (SImode, operands[0]),
! 			       gen_highpart (SImode, operands[0]),
! 			       operands[1], operands[2]));
!       DONE;
!   }
  )
  
! (define_insn "<US>mull"
!   [(set (match_operand:SI 0 "s_register_operand" "=r,&r")
! 	(mult:SI
! 	 (match_operand:SI 2 "s_register_operand" "%r,r")
! 	 (match_operand:SI 3 "s_register_operand" "r,r")))
!    (set (match_operand:SI 1 "s_register_operand" "=r,&r")
! 	(truncate:SI
! 	 (lshiftrt:DI
! 	  (mult:DI (SE:DI (match_dup 2)) (SE:DI (match_dup 3)))
! 	  (const_int 32))))]
    "TARGET_32BIT"
!   "<US>mull%?\\t%0, %1, %2, %3"
    [(set_attr "type" "umull")
!    (set_attr "predicable" "yes")
!    (set_attr "arch" "v6,nov6")]
  )
  
! (define_expand "<Us>maddsidi4"
!   [(set (match_operand:DI 0 "s_register_operand")
  	(plus:DI
  	 (mult:DI
! 	  (SE:DI (match_operand:SI 1 "s_register_operand"))
! 	  (SE:DI (match_operand:SI 2 "s_register_operand")))
! 	 (match_operand:DI 3 "s_register_operand")))]
    "TARGET_32BIT"
!   {
!       emit_insn (gen_<US>mlal (gen_lowpart (SImode, operands[0]),
! 			       gen_lowpart (SImode, operands[3]),
! 			       gen_highpart (SImode, operands[0]),
! 			       gen_highpart (SImode, operands[3]),
! 			       operands[1], operands[2]));
!       DONE;
!   }
  )
  
! (define_insn "<US>mlal"
!   [(set (match_operand:SI 0 "s_register_operand" "=r,&r")
! 	(plus:SI
! 	 (mult:SI
! 	  (match_operand:SI 4 "s_register_operand" "%r,r")
! 	  (match_operand:SI 5 "s_register_operand" "r,r"))
! 	 (match_operand:SI 1 "s_register_operand" "0,0")))
!    (set (match_operand:SI 2 "s_register_operand" "=r,&r")
! 	(plus:SI
! 	 (truncate:SI
! 	  (lshiftrt:DI
! 	   (plus:DI
! 	    (mult:DI (SE:DI (match_dup 4)) (SE:DI (match_dup 5)))
! 	    (zero_extend:DI (match_dup 1)))
! 	   (const_int 32)))
! 	 (match_operand:SI 3 "s_register_operand" "2,2")))]
!   "TARGET_32BIT"
!   "<US>mlal%?\\t%0, %2, %4, %5"
    [(set_attr "type" "umlal")
!    (set_attr "predicable" "yes")
!    (set_attr "arch" "v6,nov6")]
  )
  
! (define_expand "<US>mulsi3_highpart"
    [(parallel
!     [(set (match_operand:SI 0 "s_register_operand")
  	  (truncate:SI
  	   (lshiftrt:DI
  	    (mult:DI
! 	     (SE:DI (match_operand:SI 1 "s_register_operand"))
! 	     (SE:DI (match_operand:SI 2 "s_register_operand")))
  	    (const_int 32))))
       (clobber (match_scratch:SI 3 ""))])]
    "TARGET_32BIT"
    ""
  )
  
! (define_insn "*<US>mull_high"
!   [(set (match_operand:SI 0 "s_register_operand" "=r,&r,&r")
  	(truncate:SI
  	 (lshiftrt:DI
  	  (mult:DI
! 	   (SE:DI (match_operand:SI 1 "s_register_operand" "%r,0,r"))
! 	   (SE:DI (match_operand:SI 2 "s_register_operand" "r,r,r")))
  	  (const_int 32))))
!    (clobber (match_scratch:SI 3 "=r,&r,&r"))]
    "TARGET_32BIT"
!   "<US>mull%?\\t%3, %0, %2, %1"
    [(set_attr "type" "umull")
!    (set_attr "predicable" "yes")
!    (set_attr "arch" "v6,nov6,nov6")]
  )
  
  (define_insn "mulhisi3"
***************
*** 2072,2092 ****
     (set_attr "predicable" "yes")]
  )
  
! (define_insn "maddhisi4"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(plus:SI (mult:SI (sign_extend:SI
  			   (match_operand:HI 1 "s_register_operand" "r"))
  			  (sign_extend:SI
  			   (match_operand:HI 2 "s_register_operand" "r")))
  		 (match_operand:SI 3 "s_register_operand" "r")))]
    "TARGET_DSP_MULTIPLY"
    "smlabb%?\\t%0, %1, %2, %3"
    [(set_attr "type" "smlaxy")
     (set_attr "predicable" "yes")]
  )
  
  ;; Note: there is no maddhisi4ibt because this one is canonical form
! (define_insn "*maddhisi4tb"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(plus:SI (mult:SI (ashiftrt:SI
  			   (match_operand:SI 1 "s_register_operand" "r")
--- 2548,2622 ----
     (set_attr "predicable" "yes")]
  )
  
! (define_expand "maddhisi4"
!   [(set (match_operand:SI 0 "s_register_operand")
! 	(plus:SI (mult:SI (sign_extend:SI
! 			   (match_operand:HI 1 "s_register_operand"))
! 			  (sign_extend:SI
! 			   (match_operand:HI 2 "s_register_operand")))
! 		 (match_operand:SI 3 "s_register_operand")))]
!   "TARGET_DSP_MULTIPLY"
!   {
!     /* If this function reads the Q bit from ACLE intrinsics break up the
!        multiplication and accumulation as an overflow during accumulation will
!        clobber the Q flag.  */
!     if (ARM_Q_BIT_READ)
!       {
! 	rtx tmp = gen_reg_rtx (SImode);
! 	emit_insn (gen_mulhisi3 (tmp, operands[1], operands[2]));
! 	emit_insn (gen_addsi3 (operands[0], tmp, operands[3]));
! 	DONE;
!       }
!   }
! )
! 
! (define_insn "*arm_maddhisi4"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(plus:SI (mult:SI (sign_extend:SI
  			   (match_operand:HI 1 "s_register_operand" "r"))
  			  (sign_extend:SI
  			   (match_operand:HI 2 "s_register_operand" "r")))
  		 (match_operand:SI 3 "s_register_operand" "r")))]
+   "TARGET_DSP_MULTIPLY && !ARM_Q_BIT_READ"
+   "smlabb%?\\t%0, %1, %2, %3"
+   [(set_attr "type" "smlaxy")
+    (set_attr "predicable" "yes")]
+ )
+ 
+ (define_insn "arm_smlabb_setq"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(plus:SI (mult:SI (sign_extend:SI
+ 			   (match_operand:HI 1 "s_register_operand" "r"))
+ 			  (sign_extend:SI
+ 			   (match_operand:HI 2 "s_register_operand" "r")))
+ 		 (match_operand:SI 3 "s_register_operand" "r")))
+    (set (reg:CC APSRQ_REGNUM)
+ 	(unspec:CC [(reg:CC APSRQ_REGNUM)] UNSPEC_Q_SET))]
    "TARGET_DSP_MULTIPLY"
    "smlabb%?\\t%0, %1, %2, %3"
    [(set_attr "type" "smlaxy")
     (set_attr "predicable" "yes")]
  )
  
+ (define_expand "arm_smlabb"
+  [(match_operand:SI 0 "s_register_operand")
+   (match_operand:SI 1 "s_register_operand")
+   (match_operand:SI 2 "s_register_operand")
+   (match_operand:SI 3 "s_register_operand")]
+   "TARGET_DSP_MULTIPLY"
+   {
+     rtx mult1 = gen_lowpart (HImode, operands[1]);
+     rtx mult2 = gen_lowpart (HImode, operands[2]);
+     if (ARM_Q_BIT_READ)
+       emit_insn (gen_arm_smlabb_setq (operands[0], mult1, mult2, operands[3]));
+     else
+       emit_insn (gen_maddhisi4 (operands[0], mult1, mult2, operands[3]));
+     DONE;
+   }
+ )
+ 
  ;; Note: there is no maddhisi4ibt because this one is canonical form
! (define_insn "maddhisi4tb"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(plus:SI (mult:SI (ashiftrt:SI
  			   (match_operand:SI 1 "s_register_operand" "r")
***************
*** 2094,2106 ****
  			  (sign_extend:SI
  			   (match_operand:HI 2 "s_register_operand" "r")))
  		 (match_operand:SI 3 "s_register_operand" "r")))]
    "TARGET_DSP_MULTIPLY"
    "smlatb%?\\t%0, %1, %2, %3"
    [(set_attr "type" "smlaxy")
     (set_attr "predicable" "yes")]
  )
  
! (define_insn "*maddhisi4tt"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(plus:SI (mult:SI (ashiftrt:SI
  			   (match_operand:SI 1 "s_register_operand" "r")
--- 2624,2670 ----
  			  (sign_extend:SI
  			   (match_operand:HI 2 "s_register_operand" "r")))
  		 (match_operand:SI 3 "s_register_operand" "r")))]
+   "TARGET_DSP_MULTIPLY && !ARM_Q_BIT_READ"
+   "smlatb%?\\t%0, %1, %2, %3"
+   [(set_attr "type" "smlaxy")
+    (set_attr "predicable" "yes")]
+ )
+ 
+ (define_insn "arm_smlatb_setq"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(plus:SI (mult:SI (ashiftrt:SI
+ 			   (match_operand:SI 1 "s_register_operand" "r")
+ 			   (const_int 16))
+ 			  (sign_extend:SI
+ 			   (match_operand:HI 2 "s_register_operand" "r")))
+ 		 (match_operand:SI 3 "s_register_operand" "r")))
+    (set (reg:CC APSRQ_REGNUM)
+ 	(unspec:CC [(reg:CC APSRQ_REGNUM)] UNSPEC_Q_SET))]
    "TARGET_DSP_MULTIPLY"
    "smlatb%?\\t%0, %1, %2, %3"
    [(set_attr "type" "smlaxy")
     (set_attr "predicable" "yes")]
  )
  
! (define_expand "arm_smlatb"
!  [(match_operand:SI 0 "s_register_operand")
!   (match_operand:SI 1 "s_register_operand")
!   (match_operand:SI 2 "s_register_operand")
!   (match_operand:SI 3 "s_register_operand")]
!   "TARGET_DSP_MULTIPLY"
!   {
!     rtx mult2 = gen_lowpart (HImode, operands[2]);
!     if (ARM_Q_BIT_READ)
!       emit_insn (gen_arm_smlatb_setq (operands[0], operands[1],
! 				      mult2, operands[3]));
!     else
!       emit_insn (gen_maddhisi4tb (operands[0], operands[1],
! 				  mult2, operands[3]));
!     DONE;
!   }
! )
! 
! (define_insn "maddhisi4tt"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(plus:SI (mult:SI (ashiftrt:SI
  			   (match_operand:SI 1 "s_register_operand" "r")
***************
*** 2109,2120 ****
--- 2673,2718 ----
  			   (match_operand:SI 2 "s_register_operand" "r")
  			   (const_int 16)))
  		 (match_operand:SI 3 "s_register_operand" "r")))]
+   "TARGET_DSP_MULTIPLY && !ARM_Q_BIT_READ"
+   "smlatt%?\\t%0, %1, %2, %3"
+   [(set_attr "type" "smlaxy")
+    (set_attr "predicable" "yes")]
+ )
+ 
+ (define_insn "arm_smlatt_setq"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(plus:SI (mult:SI (ashiftrt:SI
+ 			   (match_operand:SI 1 "s_register_operand" "r")
+ 			   (const_int 16))
+ 			  (ashiftrt:SI
+ 			   (match_operand:SI 2 "s_register_operand" "r")
+ 			   (const_int 16)))
+ 		 (match_operand:SI 3 "s_register_operand" "r")))
+    (set (reg:CC APSRQ_REGNUM)
+ 	(unspec:CC [(reg:CC APSRQ_REGNUM)] UNSPEC_Q_SET))]
    "TARGET_DSP_MULTIPLY"
    "smlatt%?\\t%0, %1, %2, %3"
    [(set_attr "type" "smlaxy")
     (set_attr "predicable" "yes")]
  )
  
+ (define_expand "arm_smlatt"
+  [(match_operand:SI 0 "s_register_operand")
+   (match_operand:SI 1 "s_register_operand")
+   (match_operand:SI 2 "s_register_operand")
+   (match_operand:SI 3 "s_register_operand")]
+   "TARGET_DSP_MULTIPLY"
+   {
+     if (ARM_Q_BIT_READ)
+       emit_insn (gen_arm_smlatt_setq (operands[0], operands[1],
+ 				      operands[2], operands[3]));
+     else
+       emit_insn (gen_maddhisi4tt (operands[0], operands[1],
+ 				  operands[2], operands[3]));
+     DONE;
+   }
+ )
+ 
  (define_insn "maddhidi4"
    [(set (match_operand:DI 0 "s_register_operand" "=r")
  	(plus:DI
***************
*** 2161,2178 ****
    [(set_attr "type" "smlalxy")
     (set_attr "predicable" "yes")])
  
  (define_expand "mulsf3"
!   [(set (match_operand:SF          0 "s_register_operand" "")
! 	(mult:SF (match_operand:SF 1 "s_register_operand" "")
! 		 (match_operand:SF 2 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "
  ")
  
  (define_expand "muldf3"
!   [(set (match_operand:DF          0 "s_register_operand" "")
! 	(mult:DF (match_operand:DF 1 "s_register_operand" "")
! 		 (match_operand:DF 2 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "
  ")
--- 2759,2808 ----
    [(set_attr "type" "smlalxy")
     (set_attr "predicable" "yes")])
  
+ (define_insn "arm_<smlaw_op><add_clobber_q_name>_insn"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(unspec:SI
+ 	   [(match_operand:SI 1 "s_register_operand" "r")
+ 	    (match_operand:SI 2 "s_register_operand" "r")
+ 	    (match_operand:SI 3 "s_register_operand" "r")]
+ 	   SMLAWBT))]
+   "TARGET_DSP_MULTIPLY && <add_clobber_q_pred>"
+   "<smlaw_op>%?\\t%0, %1, %2, %3"
+   [(set_attr "type" "smlaxy")
+    (set_attr "predicable" "yes")]
+ )
+ 
+ (define_expand "arm_<smlaw_op>"
+   [(set (match_operand:SI 0 "s_register_operand")
+ 	(unspec:SI
+ 	   [(match_operand:SI 1 "s_register_operand")
+ 	    (match_operand:SI 2 "s_register_operand")
+ 	    (match_operand:SI 3 "s_register_operand")]
+ 	   SMLAWBT))]
+   "TARGET_DSP_MULTIPLY"
+   {
+     if (ARM_Q_BIT_READ)
+       emit_insn (gen_arm_<smlaw_op>_setq_insn (operands[0], operands[1],
+ 					       operands[2], operands[3]));
+     else
+       emit_insn (gen_arm_<smlaw_op>_insn (operands[0], operands[1],
+ 					  operands[2], operands[3]));
+     DONE;
+   }
+ )
+ 
  (define_expand "mulsf3"
!   [(set (match_operand:SF          0 "s_register_operand")
! 	(mult:SF (match_operand:SF 1 "s_register_operand")
! 		 (match_operand:SF 2 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "
  ")
  
  (define_expand "muldf3"
!   [(set (match_operand:DF          0 "s_register_operand")
! 	(mult:DF (match_operand:DF 1 "s_register_operand")
! 		 (match_operand:DF 2 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "
  ")
***************
*** 2180,2211 ****
  ;; Division insns
  
  (define_expand "divsf3"
!   [(set (match_operand:SF 0 "s_register_operand" "")
! 	(div:SF (match_operand:SF 1 "s_register_operand" "")
! 		(match_operand:SF 2 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "")
  
  (define_expand "divdf3"
!   [(set (match_operand:DF 0 "s_register_operand" "")
! 	(div:DF (match_operand:DF 1 "s_register_operand" "")
! 		(match_operand:DF 2 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
    "")
  
- ;; Boolean and,ior,xor insns
  
! ;; Split up double word logical operations
  
! ;; Split up simple DImode logical operations.  Simply perform the logical
  ;; operation on the upper and lower halves of the registers.
  (define_split
    [(set (match_operand:DI 0 "s_register_operand" "")
  	(match_operator:DI 6 "logical_binary_operator"
  	  [(match_operand:DI 1 "s_register_operand" "")
  	   (match_operand:DI 2 "s_register_operand" "")]))]
    "TARGET_32BIT && reload_completed
-    && ! (TARGET_NEON && IS_VFP_REGNUM (REGNO (operands[0])))
     && ! IS_IWMMXT_REGNUM (REGNO (operands[0]))"
    [(set (match_dup 0) (match_op_dup:SI 6 [(match_dup 1) (match_dup 2)]))
     (set (match_dup 3) (match_op_dup:SI 6 [(match_dup 4) (match_dup 5)]))]
--- 2810,2882 ----
  ;; Division insns
  
  (define_expand "divsf3"
!   [(set (match_operand:SF 0 "s_register_operand")
! 	(div:SF (match_operand:SF 1 "s_register_operand")
! 		(match_operand:SF 2 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "")
  
  (define_expand "divdf3"
!   [(set (match_operand:DF 0 "s_register_operand")
! 	(div:DF (match_operand:DF 1 "s_register_operand")
! 		(match_operand:DF 2 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
    "")
  
  
! ; Expand logical operations.  The mid-end expander does not split off memory
! ; operands or complex immediates, which leads to fewer LDRD/STRD instructions.
! ; So an explicit expander is needed to generate better code.
  
! (define_expand "<LOGICAL:optab>di3"
!   [(set (match_operand:DI	  0 "s_register_operand")
! 	(LOGICAL:DI (match_operand:DI 1 "s_register_operand")
! 		    (match_operand:DI 2 "arm_<optab>di_operand")))]
!   "TARGET_32BIT"
!   {
!       rtx low  = simplify_gen_binary (<CODE>, SImode,
! 				      gen_lowpart (SImode, operands[1]),
! 				      gen_lowpart (SImode, operands[2]));
!       rtx high = simplify_gen_binary (<CODE>, SImode,
! 				      gen_highpart (SImode, operands[1]),
! 				      gen_highpart_mode (SImode, DImode,
! 							 operands[2]));
! 
!       emit_insn (gen_rtx_SET (gen_lowpart (SImode, operands[0]), low));
!       emit_insn (gen_rtx_SET (gen_highpart (SImode, operands[0]), high));
!       DONE;
!   }
! )
! 
! (define_expand "one_cmpldi2"
!   [(set (match_operand:DI 0 "s_register_operand")
! 	(not:DI (match_operand:DI 1 "s_register_operand")))]
!   "TARGET_32BIT"
!   {
!       rtx low  = simplify_gen_unary (NOT, SImode,
! 				     gen_lowpart (SImode, operands[1]),
! 				     SImode);
!       rtx high = simplify_gen_unary (NOT, SImode,
! 				     gen_highpart_mode (SImode, DImode,
! 							operands[1]),
! 				     SImode);
! 
!       emit_insn (gen_rtx_SET (gen_lowpart (SImode, operands[0]), low));
!       emit_insn (gen_rtx_SET (gen_highpart (SImode, operands[0]), high));
!       DONE;
!   }
! )
! 
! ;; Split DImode and, ior, xor operations.  Simply perform the logical
  ;; operation on the upper and lower halves of the registers.
+ ;; This is needed for atomic operations in arm_split_atomic_op.
+ ;; Avoid splitting IWMMXT instructions.
  (define_split
    [(set (match_operand:DI 0 "s_register_operand" "")
  	(match_operator:DI 6 "logical_binary_operator"
  	  [(match_operand:DI 1 "s_register_operand" "")
  	   (match_operand:DI 2 "s_register_operand" "")]))]
    "TARGET_32BIT && reload_completed
     && ! IS_IWMMXT_REGNUM (REGNO (operands[0]))"
    [(set (match_dup 0) (match_op_dup:SI 6 [(match_dup 1) (match_dup 2)]))
     (set (match_dup 3) (match_op_dup:SI 6 [(match_dup 4) (match_dup 5)]))]
***************
*** 2220,2392 ****
    }"
  )
  
  (define_split
!   [(set (match_operand:DI 0 "s_register_operand" "")
! 	(match_operator:DI 6 "logical_binary_operator"
! 	  [(sign_extend:DI (match_operand:SI 2 "s_register_operand" ""))
! 	   (match_operand:DI 1 "s_register_operand" "")]))]
!   "TARGET_32BIT && reload_completed"
!   [(set (match_dup 0) (match_op_dup:SI 6 [(match_dup 1) (match_dup 2)]))
!    (set (match_dup 3) (match_op_dup:SI 6
! 			[(ashiftrt:SI (match_dup 2) (const_int 31))
! 			 (match_dup 4)]))]
!   "
!   {
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!     operands[5] = gen_highpart (SImode, operands[2]);
!     operands[2] = gen_lowpart (SImode, operands[2]);
!   }"
! )
! 
! ;; The zero extend of operand 2 means we can just copy the high part of
! ;; operand1 into operand0.
! (define_split
!   [(set (match_operand:DI 0 "s_register_operand" "")
! 	(ior:DI
! 	  (zero_extend:DI (match_operand:SI 2 "s_register_operand" ""))
! 	  (match_operand:DI 1 "s_register_operand" "")))]
!   "TARGET_32BIT && operands[0] != operands[1] && reload_completed"
!   [(set (match_dup 0) (ior:SI (match_dup 1) (match_dup 2)))
!    (set (match_dup 3) (match_dup 4))]
!   "
!   {
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!   }"
! )
! 
! ;; The zero extend of operand 2 means we can just copy the high part of
! ;; operand1 into operand0.
! (define_split
!   [(set (match_operand:DI 0 "s_register_operand" "")
! 	(xor:DI
! 	  (zero_extend:DI (match_operand:SI 2 "s_register_operand" ""))
! 	  (match_operand:DI 1 "s_register_operand" "")))]
!   "TARGET_32BIT && operands[0] != operands[1] && reload_completed"
!   [(set (match_dup 0) (xor:SI (match_dup 1) (match_dup 2)))
!    (set (match_dup 3) (match_dup 4))]
!   "
!   {
!     operands[4] = gen_highpart (SImode, operands[1]);
!     operands[3] = gen_highpart (SImode, operands[0]);
!     operands[0] = gen_lowpart (SImode, operands[0]);
!     operands[1] = gen_lowpart (SImode, operands[1]);
!   }"
! )
! 
! (define_expand "anddi3"
!   [(set (match_operand:DI         0 "s_register_operand" "")
! 	(and:DI (match_operand:DI 1 "s_register_operand" "")
! 		(match_operand:DI 2 "neon_inv_logic_op2" "")))]
!   "TARGET_32BIT"
!   "
!   if (!TARGET_NEON && !TARGET_IWMMXT)
!     {
!       rtx low  = simplify_gen_binary (AND, SImode,
! 				      gen_lowpart (SImode, operands[1]),
! 				      gen_lowpart (SImode, operands[2]));
!       rtx high = simplify_gen_binary (AND, SImode,
! 				      gen_highpart (SImode, operands[1]),
! 				      gen_highpart_mode (SImode, DImode,
! 							 operands[2]));
! 
!       emit_insn (gen_rtx_SET (gen_lowpart (SImode, operands[0]), low));
!       emit_insn (gen_rtx_SET (gen_highpart (SImode, operands[0]), high));
! 
!       DONE;
!     }
!   /* Otherwise expand pattern as above.  */
!   "
! )
! 
! (define_insn_and_split "*anddi3_insn"
!   [(set (match_operand:DI         0 "s_register_operand"     "=w,w ,&r,&r,&r,&r,?w,?w")
!         (and:DI (match_operand:DI 1 "s_register_operand"     "%w,0 ,0 ,r ,0 ,r ,w ,0")
!                 (match_operand:DI 2 "arm_anddi_operand_neon" "w ,DL,r ,r ,De,De,w ,DL")))]
!   "TARGET_32BIT && !TARGET_IWMMXT"
! {
!   switch (which_alternative)
!     {
!     case 0: /* fall through */
!     case 6: return "vand\t%P0, %P1, %P2";
!     case 1: /* fall through */
!     case 7: return neon_output_logic_immediate ("vand", &operands[2],
!                     DImode, 1, VALID_NEON_QREG_MODE (DImode));
!     case 2:
!     case 3:
!     case 4:
!     case 5: /* fall through */
!       return "#";
!     default: gcc_unreachable ();
!     }
! }
!   "TARGET_32BIT && !TARGET_IWMMXT && reload_completed
!    && !(IS_VFP_REGNUM (REGNO (operands[0])))"
!   [(set (match_dup 3) (match_dup 4))
!    (set (match_dup 5) (match_dup 6))]
!   "
!   {
!     operands[3] = gen_lowpart (SImode, operands[0]);
!     operands[5] = gen_highpart (SImode, operands[0]);
! 
!     operands[4] = simplify_gen_binary (AND, SImode,
!                                            gen_lowpart (SImode, operands[1]),
!                                            gen_lowpart (SImode, operands[2]));
!     operands[6] = simplify_gen_binary (AND, SImode,
!                                            gen_highpart (SImode, operands[1]),
!                                            gen_highpart_mode (SImode, DImode, operands[2]));
! 
!   }"
!   [(set_attr "type" "neon_logic,neon_logic,multiple,multiple,\
!                      multiple,multiple,neon_logic,neon_logic")
!    (set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,*,*,
!                      avoid_neon_for_64bits,avoid_neon_for_64bits")
!    (set_attr "length" "*,*,8,8,8,8,*,*")
!   ]
! )
! 
! (define_insn_and_split "*anddi_zesidi_di"
!   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
! 	(and:DI (zero_extend:DI
! 		 (match_operand:SI 2 "s_register_operand" "r,r"))
! 		(match_operand:DI 1 "s_register_operand" "0,r")))]
    "TARGET_32BIT"
!   "#"
!   "TARGET_32BIT && reload_completed"
!   ; The zero extend of operand 2 clears the high word of the output
!   ; operand.
!   [(set (match_dup 0) (and:SI (match_dup 1) (match_dup 2)))
!    (set (match_dup 3) (const_int 0))]
    "
    {
!     operands[3] = gen_highpart (SImode, operands[0]);
      operands[0] = gen_lowpart (SImode, operands[0]);
      operands[1] = gen_lowpart (SImode, operands[1]);
    }"
-   [(set_attr "length" "8")
-    (set_attr "type" "multiple")]
- )
- 
- (define_insn "*anddi_sesdi_di"
-   [(set (match_operand:DI          0 "s_register_operand" "=&r,&r")
- 	(and:DI (sign_extend:DI
- 		 (match_operand:SI 2 "s_register_operand" "r,r"))
- 		(match_operand:DI  1 "s_register_operand" "0,r")))]
-   "TARGET_32BIT"
-   "#"
-   [(set_attr "length" "8")
-    (set_attr "type" "multiple")]
  )
  
  (define_expand "andsi3"
!   [(set (match_operand:SI         0 "s_register_operand" "")
! 	(and:SI (match_operand:SI 1 "s_register_operand" "")
! 		(match_operand:SI 2 "reg_or_int_operand" "")))]
    "TARGET_EITHER"
    "
    if (TARGET_32BIT)
--- 2891,2917 ----
    }"
  )
  
+ ;; Split DImode not (needed for atomic operations in arm_split_atomic_op).
+ ;; Unconditionally split since there is no SIMD DImode NOT pattern.
  (define_split
!   [(set (match_operand:DI 0 "s_register_operand")
! 	(not:DI (match_operand:DI 1 "s_register_operand")))]
    "TARGET_32BIT"
!   [(set (match_dup 0) (not:SI (match_dup 1)))
!    (set (match_dup 2) (not:SI (match_dup 3)))]
    "
    {
!     operands[2] = gen_highpart (SImode, operands[0]);
      operands[0] = gen_lowpart (SImode, operands[0]);
+     operands[3] = gen_highpart (SImode, operands[1]);
      operands[1] = gen_lowpart (SImode, operands[1]);
    }"
  )
  
  (define_expand "andsi3"
!   [(set (match_operand:SI         0 "s_register_operand")
! 	(and:SI (match_operand:SI 1 "s_register_operand")
! 		(match_operand:SI 2 "reg_or_int_operand")))]
    "TARGET_EITHER"
    "
    if (TARGET_32BIT)
***************
*** 2496,2503 ****
  )
  
  (define_insn "*andsi3_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (and:SI (match_operand:SI 1 "s_register_operand" "r,r,r")
  		 (match_operand:SI 2 "arm_not_operand" "I,K,r"))
  	 (const_int 0)))
--- 3021,3028 ----
  )
  
  (define_insn "*andsi3_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (and:SI (match_operand:SI 1 "s_register_operand" "r,r,r")
  		 (match_operand:SI 2 "arm_not_operand" "I,K,r"))
  	 (const_int 0)))
***************
*** 2513,2520 ****
  )
  
  (define_insn "*andsi3_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (and:SI (match_operand:SI 0 "s_register_operand" "r,r,r")
  		 (match_operand:SI 1 "arm_not_operand" "I,K,r"))
  	 (const_int 0)))
--- 3038,3045 ----
  )
  
  (define_insn "*andsi3_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (and:SI (match_operand:SI 0 "s_register_operand" "r,r,r")
  		 (match_operand:SI 1 "arm_not_operand" "I,K,r"))
  	 (const_int 0)))
***************
*** 2529,2536 ****
  )
  
  (define_insn "*zeroextractsi_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (zero_extract:SI
  			  (match_operand:SI 0 "s_register_operand" "r")
  			  (match_operand 1 "const_int_operand" "n")
  			  (match_operand 2 "const_int_operand" "n"))
--- 3054,3061 ----
  )
  
  (define_insn "*zeroextractsi_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (zero_extract:SI
  			  (match_operand:SI 0 "s_register_operand" "r")
  			  (match_operand 1 "const_int_operand" "n")
  			  (match_operand 2 "const_int_operand" "n"))
***************
*** 2570,2581 ****
         && INTVAL (operands[2]) > 0 
         && INTVAL (operands[2]) + (INTVAL (operands[3]) & 1) <= 8
         && INTVAL (operands[2]) + INTVAL (operands[3]) <= 32)"
!   [(parallel [(set (reg:CC_NOOV CC_REGNUM)
! 		   (compare:CC_NOOV (and:SI (match_dup 1) (match_dup 2))
  				    (const_int 0)))
  	      (set (match_dup 0) (and:SI (match_dup 1) (match_dup 2)))])
     (set (match_dup 0)
! 	(if_then_else:SI (eq (reg:CC_NOOV CC_REGNUM) (const_int 0))
  			 (match_dup 0) (const_int 1)))]
    "
    operands[2] = GEN_INT (((1 << INTVAL (operands[2])) - 1)
--- 3095,3106 ----
         && INTVAL (operands[2]) > 0 
         && INTVAL (operands[2]) + (INTVAL (operands[3]) & 1) <= 8
         && INTVAL (operands[2]) + INTVAL (operands[3]) <= 32)"
!   [(parallel [(set (reg:CC_NZ CC_REGNUM)
! 		   (compare:CC_NZ (and:SI (match_dup 1) (match_dup 2))
  				    (const_int 0)))
  	      (set (match_dup 0) (and:SI (match_dup 1) (match_dup 2)))])
     (set (match_dup 0)
! 	(if_then_else:SI (eq (reg:CC_NZ CC_REGNUM) (const_int 0))
  			 (match_dup 0) (const_int 1)))]
    "
    operands[2] = GEN_INT (((1 << INTVAL (operands[2])) - 1)
***************
*** 2600,2611 ****
    "TARGET_ARM"
    "#"
    "TARGET_ARM"
!   [(parallel [(set (reg:CC_NOOV CC_REGNUM)
! 		   (compare:CC_NOOV (ashift:SI (match_dup 1) (match_dup 2))
  				    (const_int 0)))
  	      (set (match_dup 0) (ashift:SI (match_dup 1) (match_dup 2)))])
     (set (match_dup 0)
! 	(if_then_else:SI (eq (reg:CC_NOOV CC_REGNUM) (const_int 0))
  			 (match_dup 0) (const_int 1)))]
    "
    operands[2] = GEN_INT (32 - INTVAL (operands[2]));
--- 3125,3136 ----
    "TARGET_ARM"
    "#"
    "TARGET_ARM"
!   [(parallel [(set (reg:CC_NZ CC_REGNUM)
! 		   (compare:CC_NZ (ashift:SI (match_dup 1) (match_dup 2))
  				    (const_int 0)))
  	      (set (match_dup 0) (ashift:SI (match_dup 1) (match_dup 2)))])
     (set (match_dup 0)
! 	(if_then_else:SI (eq (reg:CC_NZ CC_REGNUM) (const_int 0))
  			 (match_dup 0) (const_int 1)))]
    "
    operands[2] = GEN_INT (32 - INTVAL (operands[2]));
***************
*** 2638,2649 ****
         && INTVAL (operands[2]) + (INTVAL (operands[3]) & 1) <= 8
         && INTVAL (operands[2]) + INTVAL (operands[3]) <= 32)
     && !reg_overlap_mentioned_p (operands[0], operands[4])"
!   [(parallel [(set (reg:CC_NOOV CC_REGNUM)
! 		   (compare:CC_NOOV (and:SI (match_dup 1) (match_dup 2))
  				    (const_int 0)))
  	      (set (match_dup 0) (and:SI (match_dup 1) (match_dup 2)))])
     (set (match_dup 0)
! 	(if_then_else:SI (eq (reg:CC_NOOV CC_REGNUM) (const_int 0))
  			 (match_dup 0) (match_dup 4)))]
    "
    operands[2] = GEN_INT (((1 << INTVAL (operands[2])) - 1)
--- 3163,3174 ----
         && INTVAL (operands[2]) + (INTVAL (operands[3]) & 1) <= 8
         && INTVAL (operands[2]) + INTVAL (operands[3]) <= 32)
     && !reg_overlap_mentioned_p (operands[0], operands[4])"
!   [(parallel [(set (reg:CC_NZ CC_REGNUM)
! 		   (compare:CC_NZ (and:SI (match_dup 1) (match_dup 2))
  				    (const_int 0)))
  	      (set (match_dup 0) (and:SI (match_dup 1) (match_dup 2)))])
     (set (match_dup 0)
! 	(if_then_else:SI (eq (reg:CC_NZ CC_REGNUM) (const_int 0))
  			 (match_dup 0) (match_dup 4)))]
    "
    operands[2] = GEN_INT (((1 << INTVAL (operands[2])) - 1)
***************
*** 2667,2678 ****
    "TARGET_ARM && !reg_overlap_mentioned_p (operands[0], operands[3])"
    "#"
    "TARGET_ARM && !reg_overlap_mentioned_p (operands[0], operands[3])"
!   [(parallel [(set (reg:CC_NOOV CC_REGNUM)
! 		   (compare:CC_NOOV (ashift:SI (match_dup 1) (match_dup 2))
  				    (const_int 0)))
  	      (set (match_dup 0) (ashift:SI (match_dup 1) (match_dup 2)))])
     (set (match_dup 0)
! 	(if_then_else:SI (eq (reg:CC_NOOV CC_REGNUM) (const_int 0))
  			 (match_dup 0) (match_dup 3)))]
    "
    operands[2] = GEN_INT (32 - INTVAL (operands[2]));
--- 3192,3203 ----
    "TARGET_ARM && !reg_overlap_mentioned_p (operands[0], operands[3])"
    "#"
    "TARGET_ARM && !reg_overlap_mentioned_p (operands[0], operands[3])"
!   [(parallel [(set (reg:CC_NZ CC_REGNUM)
! 		   (compare:CC_NZ (ashift:SI (match_dup 1) (match_dup 2))
  				    (const_int 0)))
  	      (set (match_dup 0) (ashift:SI (match_dup 1) (match_dup 2)))])
     (set (match_dup 0)
! 	(if_then_else:SI (eq (reg:CC_NZ CC_REGNUM) (const_int 0))
  			 (match_dup 0) (match_dup 3)))]
    "
    operands[2] = GEN_INT (32 - INTVAL (operands[2]));
***************
*** 2737,2746 ****
  ;;; this insv pattern, so this pattern needs to be reevalutated.
  
  (define_expand "insv"
!   [(set (zero_extract (match_operand 0 "nonimmediate_operand" "")
!                       (match_operand 1 "general_operand" "")
!                       (match_operand 2 "general_operand" ""))
!         (match_operand 3 "reg_or_int_operand" ""))]
    "TARGET_ARM || arm_arch_thumb2"
    "
    {
--- 3262,3271 ----
  ;;; this insv pattern, so this pattern needs to be reevalutated.
  
  (define_expand "insv"
!   [(set (zero_extract (match_operand 0 "nonimmediate_operand")
!                       (match_operand 1 "general_operand")
!                       (match_operand 2 "general_operand"))
!         (match_operand 3 "reg_or_int_operand"))]
    "TARGET_ARM || arm_arch_thumb2"
    "
    {
***************
*** 2962,3066 ****
     (set_attr "type" "bfm")]
  )
  
- ; constants for op 2 will never be given to these patterns.
- (define_insn_and_split "*anddi_notdi_di"
-   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
- 	(and:DI (not:DI (match_operand:DI 1 "s_register_operand" "0,r"))
- 		(match_operand:DI 2 "s_register_operand" "r,0")))]
-   "TARGET_32BIT"
-   "#"
-   "TARGET_32BIT && reload_completed
-    && ! (TARGET_NEON && IS_VFP_REGNUM (REGNO (operands[0])))
-    && ! IS_IWMMXT_REGNUM (REGNO (operands[0]))"
-   [(set (match_dup 0) (and:SI (not:SI (match_dup 1)) (match_dup 2)))
-    (set (match_dup 3) (and:SI (not:SI (match_dup 4)) (match_dup 5)))]
-   "
-   {
-     operands[3] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-     operands[4] = gen_highpart (SImode, operands[1]);
-     operands[1] = gen_lowpart (SImode, operands[1]);
-     operands[5] = gen_highpart (SImode, operands[2]);
-     operands[2] = gen_lowpart (SImode, operands[2]);
-   }"
-   [(set_attr "length" "8")
-    (set_attr "predicable" "yes")
-    (set_attr "type" "multiple")]
- )
- 
- (define_insn_and_split "*anddi_notzesidi_di"
-   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
- 	(and:DI (not:DI (zero_extend:DI
- 			 (match_operand:SI 2 "s_register_operand" "r,r")))
- 		(match_operand:DI 1 "s_register_operand" "0,?r")))]
-   "TARGET_32BIT"
-   "@
-    bic%?\\t%Q0, %Q1, %2
-    #"
-   ; (not (zero_extend ...)) allows us to just copy the high word from
-   ; operand1 to operand0.
-   "TARGET_32BIT
-    && reload_completed
-    && operands[0] != operands[1]"
-   [(set (match_dup 0) (and:SI (not:SI (match_dup 2)) (match_dup 1)))
-    (set (match_dup 3) (match_dup 4))]
-   "
-   {
-     operands[3] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-     operands[4] = gen_highpart (SImode, operands[1]);
-     operands[1] = gen_lowpart (SImode, operands[1]);
-   }"
-   [(set_attr "length" "4,8")
-    (set_attr "predicable" "yes")
-    (set_attr "type" "multiple")]
- )
- 
- (define_insn_and_split "*anddi_notdi_zesidi"
-   [(set (match_operand:DI 0 "s_register_operand" "=r")
-         (and:DI (not:DI (match_operand:DI 2 "s_register_operand" "r"))
-                 (zero_extend:DI
-                  (match_operand:SI 1 "s_register_operand" "r"))))]
-   "TARGET_32BIT"
-   "#"
-   "TARGET_32BIT && reload_completed"
-   [(set (match_dup 0) (and:SI (not:SI (match_dup 2)) (match_dup 1)))
-    (set (match_dup 3) (const_int 0))]
-   "
-   {
-     operands[3] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-     operands[2] = gen_lowpart (SImode, operands[2]);
-   }"
-   [(set_attr "length" "8")
-    (set_attr "predicable" "yes")
-    (set_attr "type" "multiple")]
- )
- 
- (define_insn_and_split "*anddi_notsesidi_di"
-   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
- 	(and:DI (not:DI (sign_extend:DI
- 			 (match_operand:SI 2 "s_register_operand" "r,r")))
- 		(match_operand:DI 1 "s_register_operand" "0,r")))]
-   "TARGET_32BIT"
-   "#"
-   "TARGET_32BIT && reload_completed"
-   [(set (match_dup 0) (and:SI (not:SI (match_dup 2)) (match_dup 1)))
-    (set (match_dup 3) (and:SI (not:SI
- 				(ashiftrt:SI (match_dup 2) (const_int 31)))
- 			       (match_dup 4)))]
-   "
-   {
-     operands[3] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-     operands[4] = gen_highpart (SImode, operands[1]);
-     operands[1] = gen_lowpart (SImode, operands[1]);
-   }"
-   [(set_attr "length" "8")
-    (set_attr "predicable" "yes")
-    (set_attr "type" "multiple")]
- )
- 
  (define_insn "andsi_notsi_si"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(and:SI (not:SI (match_operand:SI 2 "s_register_operand" "r"))
--- 3487,3492 ----
***************
*** 3072,3141 ****
  )
  
  (define_insn "andsi_not_shiftsi_si"
!   [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(and:SI (not:SI (match_operator:SI 4 "shift_operator"
! 			 [(match_operand:SI 2 "s_register_operand" "r")
! 			  (match_operand:SI 3 "arm_rhs_operand" "rM")]))
! 		(match_operand:SI 1 "s_register_operand" "r")))]
!   "TARGET_ARM"
    "bic%?\\t%0, %1, %2%S4"
    [(set_attr "predicable" "yes")
     (set_attr "shift" "2")
!    (set (attr "type") (if_then_else (match_operand 3 "const_int_operand" "")
! 		      (const_string "logic_shift_imm")
! 		      (const_string "logic_shift_reg")))]
  )
  
  ;; Shifted bics pattern used to set up CC status register and not reusing
  ;; bics output.  Pattern restricts Thumb2 shift operand as bics for Thumb2
  ;; does not support shift by register.
  (define_insn "andsi_not_shiftsi_si_scc_no_reuse"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  		(and:SI (not:SI (match_operator:SI 0 "shift_operator"
! 			[(match_operand:SI 1 "s_register_operand" "r")
! 			 (match_operand:SI 2 "arm_rhs_operand" "rM")]))
! 			(match_operand:SI 3 "s_register_operand" "r"))
  		(const_int 0)))
!    (clobber (match_scratch:SI 4 "=r"))]
!   "TARGET_ARM || (TARGET_THUMB2 && CONST_INT_P (operands[2]))"
    "bics%?\\t%4, %3, %1%S0"
    [(set_attr "predicable" "yes")
     (set_attr "conds" "set")
     (set_attr "shift" "1")
!    (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "")
! 		      (const_string "logic_shift_imm")
! 		      (const_string "logic_shift_reg")))]
  )
  
  ;; Same as andsi_not_shiftsi_si_scc_no_reuse, but the bics result is also
  ;; getting reused later.
  (define_insn "andsi_not_shiftsi_si_scc"
!   [(parallel [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  		(and:SI (not:SI (match_operator:SI 0 "shift_operator"
! 			[(match_operand:SI 1 "s_register_operand" "r")
! 			 (match_operand:SI 2 "arm_rhs_operand" "rM")]))
! 			(match_operand:SI 3 "s_register_operand" "r"))
  		(const_int 0)))
! 	(set (match_operand:SI 4 "s_register_operand" "=r")
  	     (and:SI (not:SI (match_op_dup 0
  		     [(match_dup 1)
  		      (match_dup 2)]))
  		     (match_dup 3)))])]
!   "TARGET_ARM || (TARGET_THUMB2 && CONST_INT_P (operands[2]))"
    "bics%?\\t%4, %3, %1%S0"
    [(set_attr "predicable" "yes")
     (set_attr "conds" "set")
     (set_attr "shift" "1")
!    (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "")
! 		      (const_string "logic_shift_imm")
! 		      (const_string "logic_shift_reg")))]
  )
  
  (define_insn "*andsi_notsi_si_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (and:SI (not:SI (match_operand:SI 2 "s_register_operand" "r"))
  		 (match_operand:SI 1 "s_register_operand" "r"))
  	 (const_int 0)))
--- 3498,3564 ----
  )
  
  (define_insn "andsi_not_shiftsi_si"
!   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
  	(and:SI (not:SI (match_operator:SI 4 "shift_operator"
! 			 [(match_operand:SI 2 "s_register_operand" "r,r")
! 			  (match_operand:SI 3 "shift_amount_operand" "M,r")]))
! 		(match_operand:SI 1 "s_register_operand" "r,r")))]
!   "TARGET_32BIT"
    "bic%?\\t%0, %1, %2%S4"
    [(set_attr "predicable" "yes")
     (set_attr "shift" "2")
!    (set_attr "arch" "32,a")
!    (set_attr "type" "logic_shift_imm,logic_shift_reg")]
  )
  
  ;; Shifted bics pattern used to set up CC status register and not reusing
  ;; bics output.  Pattern restricts Thumb2 shift operand as bics for Thumb2
  ;; does not support shift by register.
  (define_insn "andsi_not_shiftsi_si_scc_no_reuse"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  		(and:SI (not:SI (match_operator:SI 0 "shift_operator"
! 			[(match_operand:SI 1 "s_register_operand" "r,r")
! 			 (match_operand:SI 2 "shift_amount_operand" "M,r")]))
! 			(match_operand:SI 3 "s_register_operand" "r,r"))
  		(const_int 0)))
!    (clobber (match_scratch:SI 4 "=r,r"))]
!   "TARGET_32BIT"
    "bics%?\\t%4, %3, %1%S0"
    [(set_attr "predicable" "yes")
+    (set_attr "arch" "32,a")
     (set_attr "conds" "set")
     (set_attr "shift" "1")
!    (set_attr "type" "logic_shift_imm,logic_shift_reg")]
  )
  
  ;; Same as andsi_not_shiftsi_si_scc_no_reuse, but the bics result is also
  ;; getting reused later.
  (define_insn "andsi_not_shiftsi_si_scc"
!   [(parallel [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  		(and:SI (not:SI (match_operator:SI 0 "shift_operator"
! 			[(match_operand:SI 1 "s_register_operand" "r,r")
! 			 (match_operand:SI 2 "shift_amount_operand" "M,r")]))
! 			(match_operand:SI 3 "s_register_operand" "r,r"))
  		(const_int 0)))
! 	(set (match_operand:SI 4 "s_register_operand" "=r,r")
  	     (and:SI (not:SI (match_op_dup 0
  		     [(match_dup 1)
  		      (match_dup 2)]))
  		     (match_dup 3)))])]
!   "TARGET_32BIT"
    "bics%?\\t%4, %3, %1%S0"
    [(set_attr "predicable" "yes")
+    (set_attr "arch" "32,a")
     (set_attr "conds" "set")
     (set_attr "shift" "1")
!    (set_attr "type" "logic_shift_imm,logic_shift_reg")]
  )
  
  (define_insn "*andsi_notsi_si_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (and:SI (not:SI (match_operand:SI 2 "s_register_operand" "r"))
  		 (match_operand:SI 1 "s_register_operand" "r"))
  	 (const_int 0)))
***************
*** 3148,3155 ****
  )
  
  (define_insn "*andsi_notsi_si_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (and:SI (not:SI (match_operand:SI 2 "s_register_operand" "r"))
  		 (match_operand:SI 1 "s_register_operand" "r"))
  	 (const_int 0)))
--- 3571,3578 ----
  )
  
  (define_insn "*andsi_notsi_si_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (and:SI (not:SI (match_operand:SI 2 "s_register_operand" "r"))
  		 (match_operand:SI 1 "s_register_operand" "r"))
  	 (const_int 0)))
***************
*** 3160,3264 ****
     (set_attr "type" "logics_shift_reg")]
  )
  
- (define_expand "iordi3"
-   [(set (match_operand:DI         0 "s_register_operand" "")
- 	(ior:DI (match_operand:DI 1 "s_register_operand" "")
- 		(match_operand:DI 2 "neon_logic_op2" "")))]
-   "TARGET_32BIT"
-   "
-   if (!TARGET_NEON && !TARGET_IWMMXT)
-     {
-       rtx low  = simplify_gen_binary (IOR, SImode,
- 				      gen_lowpart (SImode, operands[1]),
- 				      gen_lowpart (SImode, operands[2]));
-       rtx high = simplify_gen_binary (IOR, SImode,
- 				      gen_highpart (SImode, operands[1]),
- 				      gen_highpart_mode (SImode, DImode,
- 							 operands[2]));
- 
-       emit_insn (gen_rtx_SET (gen_lowpart (SImode, operands[0]), low));
-       emit_insn (gen_rtx_SET (gen_highpart (SImode, operands[0]), high));
- 
-       DONE;
-     }
-   /* Otherwise expand pattern as above.  */
-   "
- )
- 
- (define_insn_and_split "*iordi3_insn"
-   [(set (match_operand:DI         0 "s_register_operand"     "=w,w ,&r,&r,&r,&r,?w,?w")
- 	(ior:DI (match_operand:DI 1 "s_register_operand"     "%w,0 ,0 ,r ,0 ,r ,w ,0")
- 		(match_operand:DI 2 "arm_iordi_operand_neon" "w ,Dl,r ,r ,Df,Df,w ,Dl")))]
-   "TARGET_32BIT && !TARGET_IWMMXT"
-   {
-   switch (which_alternative)
-     {
-     case 0: /* fall through */
-     case 6: return "vorr\t%P0, %P1, %P2";
-     case 1: /* fall through */
-     case 7: return neon_output_logic_immediate ("vorr", &operands[2],
- 		     DImode, 0, VALID_NEON_QREG_MODE (DImode));
-     case 2:
-     case 3:
-     case 4:
-     case 5:
-       return "#";
-     default: gcc_unreachable ();
-     }
-   }
-   "TARGET_32BIT && !TARGET_IWMMXT && reload_completed
-    && !(IS_VFP_REGNUM (REGNO (operands[0])))"
-   [(set (match_dup 3) (match_dup 4))
-    (set (match_dup 5) (match_dup 6))]
-   "
-   {
-     operands[3] = gen_lowpart (SImode, operands[0]);
-     operands[5] = gen_highpart (SImode, operands[0]);
- 
-     operands[4] = simplify_gen_binary (IOR, SImode,
-                                            gen_lowpart (SImode, operands[1]),
-                                            gen_lowpart (SImode, operands[2]));
-     operands[6] = simplify_gen_binary (IOR, SImode,
-                                            gen_highpart (SImode, operands[1]),
-                                            gen_highpart_mode (SImode, DImode, operands[2]));
- 
-   }"
-   [(set_attr "type" "neon_logic,neon_logic,multiple,multiple,multiple,\
-                      multiple,neon_logic,neon_logic")
-    (set_attr "length" "*,*,8,8,8,8,*,*")
-    (set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,*,*,avoid_neon_for_64bits,avoid_neon_for_64bits")]
- )
- 
- (define_insn "*iordi_zesidi_di"
-   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
- 	(ior:DI (zero_extend:DI
- 		 (match_operand:SI 2 "s_register_operand" "r,r"))
- 		(match_operand:DI 1 "s_register_operand" "0,?r")))]
-   "TARGET_32BIT"
-   "@
-    orr%?\\t%Q0, %Q1, %2
-    #"
-   [(set_attr "length" "4,8")
-    (set_attr "predicable" "yes")
-    (set_attr "type" "logic_reg,multiple")]
- )
- 
- (define_insn "*iordi_sesidi_di"
-   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
- 	(ior:DI (sign_extend:DI
- 		 (match_operand:SI 2 "s_register_operand" "r,r"))
- 		(match_operand:DI 1 "s_register_operand" "0,r")))]
-   "TARGET_32BIT"
-   "#"
-   [(set_attr "length" "8")
-    (set_attr "predicable" "yes")
-    (set_attr "type" "multiple")]
- )
- 
  (define_expand "iorsi3"
!   [(set (match_operand:SI         0 "s_register_operand" "")
! 	(ior:SI (match_operand:SI 1 "s_register_operand" "")
! 		(match_operand:SI 2 "reg_or_int_operand" "")))]
    "TARGET_EITHER"
    "
    if (CONST_INT_P (operands[2]))
--- 3583,3592 ----
     (set_attr "type" "logics_shift_reg")]
  )
  
  (define_expand "iorsi3"
!   [(set (match_operand:SI         0 "s_register_operand")
! 	(ior:SI (match_operand:SI 1 "s_register_operand")
! 		(match_operand:SI 2 "reg_or_int_operand")))]
    "TARGET_EITHER"
    "
    if (CONST_INT_P (operands[2]))
***************
*** 3333,3463 ****
  )
  
  (define_insn "*iorsi3_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (ior:SI (match_operand:SI 1 "s_register_operand" "%r,r")
! 				 (match_operand:SI 2 "arm_rhs_operand" "I,r"))
! 			 (const_int 0)))
!    (set (match_operand:SI 0 "s_register_operand" "=r,r")
  	(ior:SI (match_dup 1) (match_dup 2)))]
    "TARGET_32BIT"
    "orrs%?\\t%0, %1, %2"
    [(set_attr "conds" "set")
!    (set_attr "type" "logics_imm,logics_reg")]
  )
  
  (define_insn "*iorsi3_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (ior:SI (match_operand:SI 1 "s_register_operand" "%r,r")
! 				 (match_operand:SI 2 "arm_rhs_operand" "I,r"))
! 			 (const_int 0)))
!    (clobber (match_scratch:SI 0 "=r,r"))]
    "TARGET_32BIT"
    "orrs%?\\t%0, %1, %2"
    [(set_attr "conds" "set")
!    (set_attr "type" "logics_imm,logics_reg")]
! )
! 
! (define_expand "xordi3"
!   [(set (match_operand:DI         0 "s_register_operand" "")
! 	(xor:DI (match_operand:DI 1 "s_register_operand" "")
! 		(match_operand:DI 2 "arm_xordi_operand" "")))]
!   "TARGET_32BIT"
!   {
!     /* The iWMMXt pattern for xordi3 accepts only register operands but we want
!        to reuse this expander for all TARGET_32BIT targets so just force the
!        constants into a register.  Unlike for the anddi3 and iordi3 there are
!        no NEON instructions that take an immediate.  */
!     if (TARGET_IWMMXT && !REG_P (operands[2]))
!       operands[2] = force_reg (DImode, operands[2]);
!     if (!TARGET_NEON && !TARGET_IWMMXT)
!       {
! 	rtx low  = simplify_gen_binary (XOR, SImode,
! 					gen_lowpart (SImode, operands[1]),
! 					gen_lowpart (SImode, operands[2]));
! 	rtx high = simplify_gen_binary (XOR, SImode,
! 					gen_highpart (SImode, operands[1]),
! 					gen_highpart_mode (SImode, DImode,
! 							   operands[2]));
! 
! 	emit_insn (gen_rtx_SET (gen_lowpart (SImode, operands[0]), low));
! 	emit_insn (gen_rtx_SET (gen_highpart (SImode, operands[0]), high));
! 
! 	DONE;
!       }
!     /* Otherwise expand pattern as above.  */
!   }
! )
! 
! (define_insn_and_split "*xordi3_insn"
!   [(set (match_operand:DI         0 "s_register_operand" "=w,&r,&r,&r,&r,?w")
! 	(xor:DI (match_operand:DI 1 "s_register_operand" "%w ,0,r ,0 ,r ,w")
! 		(match_operand:DI 2 "arm_xordi_operand"  "w ,r ,r ,Dg,Dg,w")))]
!   "TARGET_32BIT && !TARGET_IWMMXT"
! {
!   switch (which_alternative)
!     {
!     case 1:
!     case 2:
!     case 3:
!     case 4:  /* fall through */
!       return "#";
!     case 0: /* fall through */
!     case 5: return "veor\t%P0, %P1, %P2";
!     default: gcc_unreachable ();
!     }
! }
!   "TARGET_32BIT && !TARGET_IWMMXT && reload_completed
!    && !(IS_VFP_REGNUM (REGNO (operands[0])))"
!   [(set (match_dup 3) (match_dup 4))
!    (set (match_dup 5) (match_dup 6))]
!   "
!   {
!     operands[3] = gen_lowpart (SImode, operands[0]);
!     operands[5] = gen_highpart (SImode, operands[0]);
! 
!     operands[4] = simplify_gen_binary (XOR, SImode,
!                                            gen_lowpart (SImode, operands[1]),
!                                            gen_lowpart (SImode, operands[2]));
!     operands[6] = simplify_gen_binary (XOR, SImode,
!                                            gen_highpart (SImode, operands[1]),
!                                            gen_highpart_mode (SImode, DImode, operands[2]));
! 
!   }"
!   [(set_attr "length" "*,8,8,8,8,*")
!    (set_attr "type" "neon_logic,multiple,multiple,multiple,multiple,neon_logic")
!    (set_attr "arch" "neon_for_64bits,*,*,*,*,avoid_neon_for_64bits")]
! )
! 
! (define_insn "*xordi_zesidi_di"
!   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
! 	(xor:DI (zero_extend:DI
! 		 (match_operand:SI 2 "s_register_operand" "r,r"))
! 		(match_operand:DI 1 "s_register_operand" "0,?r")))]
!   "TARGET_32BIT"
!   "@
!    eor%?\\t%Q0, %Q1, %2
!    #"
!   [(set_attr "length" "4,8")
!    (set_attr "predicable" "yes")
!    (set_attr "type" "logic_reg")]
! )
! 
! (define_insn "*xordi_sesidi_di"
!   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
! 	(xor:DI (sign_extend:DI
! 		 (match_operand:SI 2 "s_register_operand" "r,r"))
! 		(match_operand:DI 1 "s_register_operand" "0,r")))]
!   "TARGET_32BIT"
!   "#"
!   [(set_attr "length" "8")
!    (set_attr "predicable" "yes")
!    (set_attr "type" "multiple")]
  )
  
  (define_expand "xorsi3"
!   [(set (match_operand:SI         0 "s_register_operand" "")
! 	(xor:SI (match_operand:SI 1 "s_register_operand" "")
! 		(match_operand:SI 2 "reg_or_int_operand" "")))]
    "TARGET_EITHER"
    "if (CONST_INT_P (operands[2]))
      {
--- 3661,3700 ----
  )
  
  (define_insn "*iorsi3_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
! 	 (ior:SI (match_operand:SI 1 "s_register_operand" "%r,0,r")
! 		 (match_operand:SI 2 "arm_rhs_operand" "I,l,r"))
! 	 (const_int 0)))
!    (set (match_operand:SI 0 "s_register_operand" "=r,l,r")
  	(ior:SI (match_dup 1) (match_dup 2)))]
    "TARGET_32BIT"
    "orrs%?\\t%0, %1, %2"
    [(set_attr "conds" "set")
!    (set_attr "arch" "*,t2,*")
!    (set_attr "length" "4,2,4")
!    (set_attr "type" "logics_imm,logics_reg,logics_reg")]
  )
  
  (define_insn "*iorsi3_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
! 	 (ior:SI (match_operand:SI 1 "s_register_operand" "%r,0,r")
! 		 (match_operand:SI 2 "arm_rhs_operand" "I,l,r"))
! 	 (const_int 0)))
!    (clobber (match_scratch:SI 0 "=r,l,r"))]
    "TARGET_32BIT"
    "orrs%?\\t%0, %1, %2"
    [(set_attr "conds" "set")
!    (set_attr "arch" "*,t2,*")
!    (set_attr "length" "4,2,4")
!    (set_attr "type" "logics_imm,logics_reg,logics_reg")]
  )
  
  (define_expand "xorsi3"
!   [(set (match_operand:SI         0 "s_register_operand")
! 	(xor:SI (match_operand:SI 1 "s_register_operand")
! 		(match_operand:SI 2 "reg_or_int_operand")))]
    "TARGET_EITHER"
    "if (CONST_INT_P (operands[2]))
      {
***************
*** 3514,3521 ****
  )
  
  (define_insn "*xorsi3_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (xor:SI (match_operand:SI 1 "s_register_operand" "r,r")
  				 (match_operand:SI 2 "arm_rhs_operand" "I,r"))
  			 (const_int 0)))
     (set (match_operand:SI 0 "s_register_operand" "=r,r")
--- 3751,3758 ----
  )
  
  (define_insn "*xorsi3_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (xor:SI (match_operand:SI 1 "s_register_operand" "r,r")
  				 (match_operand:SI 2 "arm_rhs_operand" "I,r"))
  			 (const_int 0)))
     (set (match_operand:SI 0 "s_register_operand" "=r,r")
***************
*** 3527,3534 ****
  )
  
  (define_insn "*xorsi3_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (xor:SI (match_operand:SI 0 "s_register_operand" "r,r")
  				 (match_operand:SI 1 "arm_rhs_operand" "I,r"))
  			 (const_int 0)))]
    "TARGET_32BIT"
--- 3764,3771 ----
  )
  
  (define_insn "*xorsi3_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (xor:SI (match_operand:SI 0 "s_register_operand" "r,r")
  				 (match_operand:SI 1 "arm_rhs_operand" "I,r"))
  			 (const_int 0)))]
    "TARGET_32BIT"
***************
*** 3696,3704 ****
  
  (define_expand "smaxsi3"
    [(parallel [
!     (set (match_operand:SI 0 "s_register_operand" "")
! 	 (smax:SI (match_operand:SI 1 "s_register_operand" "")
! 		  (match_operand:SI 2 "arm_rhs_operand" "")))
      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_32BIT"
    "
--- 3933,3941 ----
  
  (define_expand "smaxsi3"
    [(parallel [
!     (set (match_operand:SI 0 "s_register_operand")
! 	 (smax:SI (match_operand:SI 1 "s_register_operand")
! 		  (match_operand:SI 2 "arm_rhs_operand")))
      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_32BIT"
    "
***************
*** 3756,3764 ****
  
  (define_expand "sminsi3"
    [(parallel [
!     (set (match_operand:SI 0 "s_register_operand" "")
! 	 (smin:SI (match_operand:SI 1 "s_register_operand" "")
! 		  (match_operand:SI 2 "arm_rhs_operand" "")))
      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_32BIT"
    "
--- 3993,4001 ----
  
  (define_expand "sminsi3"
    [(parallel [
!     (set (match_operand:SI 0 "s_register_operand")
! 	 (smin:SI (match_operand:SI 1 "s_register_operand")
! 		  (match_operand:SI 2 "arm_rhs_operand")))
      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_32BIT"
    "
***************
*** 3806,3814 ****
  
  (define_expand "umaxsi3"
    [(parallel [
!     (set (match_operand:SI 0 "s_register_operand" "")
! 	 (umax:SI (match_operand:SI 1 "s_register_operand" "")
! 		  (match_operand:SI 2 "arm_rhs_operand" "")))
      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_32BIT"
    ""
--- 4043,4051 ----
  
  (define_expand "umaxsi3"
    [(parallel [
!     (set (match_operand:SI 0 "s_register_operand")
! 	 (umax:SI (match_operand:SI 1 "s_register_operand")
! 		  (match_operand:SI 2 "arm_rhs_operand")))
      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_32BIT"
    ""
***************
*** 3839,3847 ****
  
  (define_expand "uminsi3"
    [(parallel [
!     (set (match_operand:SI 0 "s_register_operand" "")
! 	 (umin:SI (match_operand:SI 1 "s_register_operand" "")
! 		  (match_operand:SI 2 "arm_rhs_operand" "")))
      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_32BIT"
    ""
--- 4076,4084 ----
  
  (define_expand "uminsi3"
    [(parallel [
!     (set (match_operand:SI 0 "s_register_operand")
! 	 (umin:SI (match_operand:SI 1 "s_register_operand")
! 		  (match_operand:SI 2 "arm_rhs_operand")))
      (clobber (reg:CC CC_REGNUM))])]
    "TARGET_32BIT"
    ""
***************
*** 3989,4005 ****
     (set_attr "type" "multiple")]
  )
  
  (define_code_iterator SAT [smin smax])
! (define_code_iterator SATrev [smin smax])
  (define_code_attr SATlo [(smin "1") (smax "2")])
  (define_code_attr SAThi [(smin "2") (smax "1")])
  
! (define_insn "*satsi_<SAT:code>"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
!         (SAT:SI (SATrev:SI (match_operand:SI 3 "s_register_operand" "r")
                             (match_operand:SI 1 "const_int_operand" "i"))
                  (match_operand:SI 2 "const_int_operand" "i")))]
!   "TARGET_32BIT && arm_arch6 && <SAT:CODE> != <SATrev:CODE>
     && arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>], NULL, NULL)"
  {
    int mask;
--- 4226,4369 ----
     (set_attr "type" "multiple")]
  )
  
+ 
+ (define_expand "arm_<ss_op>"
+   [(set (match_operand:SI 0 "s_register_operand")
+ 	(SSPLUSMINUS:SI (match_operand:SI 1 "s_register_operand")
+ 			(match_operand:SI 2 "s_register_operand")))]
+   "TARGET_DSP_MULTIPLY"
+   {
+     if (ARM_Q_BIT_READ)
+       emit_insn (gen_arm_<ss_op>_setq_insn (operands[0],
+ 					    operands[1], operands[2]));
+     else
+       emit_insn (gen_arm_<ss_op>_insn (operands[0], operands[1], operands[2]));
+     DONE;
+   }
+ )
+ 
+ (define_insn "arm_<ss_op><add_clobber_q_name>_insn"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(SSPLUSMINUS:SI (match_operand:SI 1 "s_register_operand" "r")
+ 			(match_operand:SI 2 "s_register_operand" "r")))]
+   "TARGET_DSP_MULTIPLY && <add_clobber_q_pred>"
+   "<ss_op>%?\t%0, %1, %2"
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "alu_dsp_reg")]
+ )
+ 
  (define_code_iterator SAT [smin smax])
! (define_code_attr SATrev [(smin "smax") (smax "smin")])
  (define_code_attr SATlo [(smin "1") (smax "2")])
  (define_code_attr SAThi [(smin "2") (smax "1")])
  
! (define_expand "arm_ssat"
!   [(match_operand:SI 0 "s_register_operand")
!    (match_operand:SI 1 "s_register_operand")
!    (match_operand:SI 2 "const_int_operand")]
!   "TARGET_32BIT && arm_arch6"
!   {
!     HOST_WIDE_INT val = INTVAL (operands[2]);
!     /* The builtin checking code should have ensured the right
!        range for the immediate.  */
!     gcc_assert (IN_RANGE (val, 1, 32));
!     HOST_WIDE_INT upper_bound = (HOST_WIDE_INT_1 << (val - 1)) - 1;
!     HOST_WIDE_INT lower_bound = -upper_bound - 1;
!     rtx up_rtx = gen_int_mode (upper_bound, SImode);
!     rtx lo_rtx = gen_int_mode (lower_bound, SImode);
!     if (ARM_Q_BIT_READ)
!       emit_insn (gen_satsi_smin_setq (operands[0], lo_rtx,
! 				      up_rtx, operands[1]));
!     else
!       emit_insn (gen_satsi_smin (operands[0], lo_rtx, up_rtx, operands[1]));
!     DONE;
!   }
! )
! 
! (define_expand "arm_usat"
!   [(match_operand:SI 0 "s_register_operand")
!    (match_operand:SI 1 "s_register_operand")
!    (match_operand:SI 2 "const_int_operand")]
!   "TARGET_32BIT && arm_arch6"
!   {
!     HOST_WIDE_INT val = INTVAL (operands[2]);
!     /* The builtin checking code should have ensured the right
!        range for the immediate.  */
!     gcc_assert (IN_RANGE (val, 0, 31));
!     HOST_WIDE_INT upper_bound = (HOST_WIDE_INT_1 << val) - 1;
!     rtx up_rtx = gen_int_mode (upper_bound, SImode);
!     rtx lo_rtx = CONST0_RTX (SImode);
!     if (ARM_Q_BIT_READ)
!       emit_insn (gen_satsi_smin_setq (operands[0], lo_rtx, up_rtx,
! 				      operands[1]));
!     else
!       emit_insn (gen_satsi_smin (operands[0], lo_rtx, up_rtx, operands[1]));
!     DONE;
!   }
! )
! 
! (define_insn "arm_get_apsr"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
! 	(unspec:SI [(reg:CC APSRQ_REGNUM)] UNSPEC_APSR_READ))]
!   "TARGET_ARM_QBIT"
!   "mrs%?\t%0, APSR"
!   [(set_attr "predicable" "yes")
!    (set_attr "conds" "use")]
! )
! 
! (define_insn "arm_set_apsr"
!   [(set (reg:CC APSRQ_REGNUM)
! 	(unspec_volatile:CC
! 	  [(match_operand:SI 0 "s_register_operand" "r")] VUNSPEC_APSR_WRITE))]
!   "TARGET_ARM_QBIT"
!   "msr%?\tAPSR_nzcvq, %0"
!   [(set_attr "predicable" "yes")
!    (set_attr "conds" "set")]
! )
! 
! ;; Read the APSR and extract the Q bit (bit 27)
! (define_expand "arm_saturation_occurred"
!   [(match_operand:SI 0 "s_register_operand")]
!   "TARGET_ARM_QBIT"
!   {
!     rtx apsr = gen_reg_rtx (SImode);
!     emit_insn (gen_arm_get_apsr (apsr));
!     emit_insn (gen_extzv (operands[0], apsr, CONST1_RTX (SImode),
! 	       gen_int_mode (27, SImode)));
!     DONE;
!   }
! )
! 
! ;; Read the APSR and set the Q bit (bit position 27) according to operand 0
! (define_expand "arm_set_saturation"
!   [(match_operand:SI 0 "reg_or_int_operand")]
!   "TARGET_ARM_QBIT"
!   {
!     rtx apsr = gen_reg_rtx (SImode);
!     emit_insn (gen_arm_get_apsr (apsr));
!     rtx to_insert = gen_reg_rtx (SImode);
!     if (CONST_INT_P (operands[0]))
!       emit_move_insn (to_insert, operands[0] == CONST0_RTX (SImode)
! 				 ? CONST0_RTX (SImode) : CONST1_RTX (SImode));
!     else
!       {
!         rtx cmp = gen_rtx_NE (SImode, operands[0], CONST0_RTX (SImode));
!         emit_insn (gen_cstoresi4 (to_insert, cmp, operands[0],
! 				  CONST0_RTX (SImode)));
!       }
!     emit_insn (gen_insv (apsr, CONST1_RTX (SImode),
! 	       gen_int_mode (27, SImode), to_insert));
!     emit_insn (gen_arm_set_apsr (apsr));
!     DONE;
!   }
! )
! 
! (define_insn "satsi_<SAT:code><add_clobber_q_name>"
!   [(set (match_operand:SI 0 "s_register_operand" "=r")
!         (SAT:SI (<SATrev>:SI (match_operand:SI 3 "s_register_operand" "r")
                             (match_operand:SI 1 "const_int_operand" "i"))
                  (match_operand:SI 2 "const_int_operand" "i")))]
!   "TARGET_32BIT && arm_arch6 && <add_clobber_q_pred>
     && arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>], NULL, NULL)"
  {
    int mask;
***************
*** 4020,4031 ****
  
  (define_insn "*satsi_<SAT:code>_shift"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
!         (SAT:SI (SATrev:SI (match_operator:SI 3 "sat_shift_operator"
                               [(match_operand:SI 4 "s_register_operand" "r")
                                (match_operand:SI 5 "const_int_operand" "i")])
                             (match_operand:SI 1 "const_int_operand" "i"))
                  (match_operand:SI 2 "const_int_operand" "i")))]
!   "TARGET_32BIT && arm_arch6 && <SAT:CODE> != <SATrev:CODE>
     && arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>], NULL, NULL)"
  {
    int mask;
--- 4384,4395 ----
  
  (define_insn "*satsi_<SAT:code>_shift"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
!         (SAT:SI (<SATrev>:SI (match_operator:SI 3 "sat_shift_operator"
                               [(match_operand:SI 4 "s_register_operand" "r")
                                (match_operand:SI 5 "const_int_operand" "i")])
                             (match_operand:SI 1 "const_int_operand" "i"))
                  (match_operand:SI 2 "const_int_operand" "i")))]
!   "TARGET_32BIT && arm_arch6 && !ARM_Q_BIT_READ
     && arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>], NULL, NULL)"
  {
    int mask;
***************
*** 4044,4097 ****
     (set_attr "shift" "3")
     (set_attr "type" "logic_shift_reg")])
  
  ;; Shift and rotation insns
  
  (define_expand "ashldi3"
!   [(set (match_operand:DI            0 "s_register_operand" "")
!         (ashift:DI (match_operand:DI 1 "s_register_operand" "")
!                    (match_operand:SI 2 "general_operand" "")))]
    "TARGET_32BIT"
    "
!   if (TARGET_NEON)
!     {
!       /* Delay the decision whether to use NEON or core-regs until
! 	 register allocation.  */
!       emit_insn (gen_ashldi3_neon (operands[0], operands[1], operands[2]));
!       DONE;
!     }
!   else
      {
-       /* Only the NEON case can handle in-memory shift counts.  */
        if (!reg_or_int_operand (operands[2], SImode))
          operands[2] = force_reg (SImode, operands[2]);
-     }
- 
-   if (!CONST_INT_P (operands[2]) && TARGET_REALLY_IWMMXT)
-     ; /* No special preparation statements; expand pattern as above.  */
-   else
-     {
-       rtx scratch1, scratch2;
  
!       /* Ideally we should use iwmmxt here if we could know that operands[1]
!          ends up already living in an iwmmxt register. Otherwise it's
!          cheaper to have the alternate code being generated than moving
!          values to iwmmxt regs and back.  */
  
!       /* Expand operation using core-registers.
! 	 'FAIL' would achieve the same thing, but this is a bit smarter.  */
!       scratch1 = gen_reg_rtx (SImode);
!       scratch2 = gen_reg_rtx (SImode);
!       arm_emit_coreregs_64bit_shift (ASHIFT, operands[0], operands[1],
! 				     operands[2], scratch1, scratch2);
!       DONE;
      }
!   "
! )
  
  (define_expand "ashlsi3"
!   [(set (match_operand:SI            0 "s_register_operand" "")
! 	(ashift:SI (match_operand:SI 1 "s_register_operand" "")
! 		   (match_operand:SI 2 "arm_rhs_operand" "")))]
    "TARGET_EITHER"
    "
    if (CONST_INT_P (operands[2])
--- 4408,4518 ----
     (set_attr "shift" "3")
     (set_attr "type" "logic_shift_reg")])
  
+ ;; Custom Datapath Extension insns.
+ (define_insn "arm_cx1<mode>"
+    [(set (match_operand:SIDI 0 "s_register_operand" "=r")
+ 	 (unspec:SIDI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 	               (match_operand:SI 2 "const_int_ccde1_operand" "i")]
+ 	    UNSPEC_CDE))]
+    "TARGET_CDE"
+    "cx1<cde_suffix>\\tp%c1, <cde_dest>, %2"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_cx1a<mode>"
+    [(set (match_operand:SIDI 0 "s_register_operand" "=r")
+ 	 (unspec:SIDI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 		       (match_operand:SIDI 2 "s_register_operand" "0")
+ 	               (match_operand:SI 3 "const_int_ccde1_operand" "i")]
+ 	    UNSPEC_CDEA))]
+    "TARGET_CDE"
+    "cx1<cde_suffix>a\\tp%c1, <cde_dest>, %3"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_cx2<mode>"
+    [(set (match_operand:SIDI 0 "s_register_operand" "=r")
+ 	 (unspec:SIDI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 		       (match_operand:SI 2 "s_register_operand" "r")
+ 	               (match_operand:SI 3 "const_int_ccde2_operand" "i")]
+ 	    UNSPEC_CDE))]
+    "TARGET_CDE"
+    "cx2<cde_suffix>\\tp%c1, <cde_dest>, %2, %3"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_cx2a<mode>"
+    [(set (match_operand:SIDI 0 "s_register_operand" "=r")
+ 	 (unspec:SIDI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 		       (match_operand:SIDI 2 "s_register_operand" "0")
+ 		       (match_operand:SI 3 "s_register_operand" "r")
+ 	               (match_operand:SI 4 "const_int_ccde2_operand" "i")]
+ 	    UNSPEC_CDEA))]
+    "TARGET_CDE"
+    "cx2<cde_suffix>a\\tp%c1, <cde_dest>, %3, %4"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_cx3<mode>"
+    [(set (match_operand:SIDI 0 "s_register_operand" "=r")
+ 	 (unspec:SIDI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 		       (match_operand:SI 2 "s_register_operand" "r")
+ 		       (match_operand:SI 3 "s_register_operand" "r")
+ 	               (match_operand:SI 4 "const_int_ccde3_operand" "i")]
+ 	    UNSPEC_CDE))]
+    "TARGET_CDE"
+    "cx3<cde_suffix>\\tp%c1, <cde_dest>, %2, %3, %4"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_cx3a<mode>"
+    [(set (match_operand:SIDI 0 "s_register_operand" "=r")
+ 	 (unspec:SIDI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 		       (match_operand:SIDI 2 "s_register_operand" "0")
+ 		       (match_operand:SI 3 "s_register_operand" "r")
+ 		       (match_operand:SI 4 "s_register_operand" "r")
+                        (match_operand:SI 5 "const_int_ccde3_operand" "i")]
+ 	    UNSPEC_CDEA))]
+    "TARGET_CDE"
+    "cx3<cde_suffix>a\\tp%c1, <cde_dest>, %3, %4, %5"
+   [(set_attr "type" "coproc")]
+ )
+ 
  ;; Shift and rotation insns
  
  (define_expand "ashldi3"
!   [(set (match_operand:DI            0 "s_register_operand")
!         (ashift:DI (match_operand:DI 1 "s_register_operand")
!                    (match_operand:SI 2 "reg_or_int_operand")))]
    "TARGET_32BIT"
    "
!   if (TARGET_HAVE_MVE && !BYTES_BIG_ENDIAN)
      {
        if (!reg_or_int_operand (operands[2], SImode))
          operands[2] = force_reg (SImode, operands[2]);
  
!       /* Armv8.1-M Mainline double shifts are not expanded.  */
!       if (arm_reg_or_long_shift_imm (operands[2], GET_MODE (operands[2]))
! 	  && (REG_P (operands[2]) || INTVAL(operands[2]) != 32))
!         {
! 	  if (!reg_overlap_mentioned_p(operands[0], operands[1]))
! 	    emit_insn (gen_movdi (operands[0], operands[1]));
  
! 	  emit_insn (gen_thumb2_lsll (operands[0], operands[2]));
! 	  DONE;
! 	}
      }
! 
!   arm_emit_coreregs_64bit_shift (ASHIFT, operands[0], operands[1],
! 				 operands[2], gen_reg_rtx (SImode),
! 				 gen_reg_rtx (SImode));
!   DONE;
! ")
  
  (define_expand "ashlsi3"
!   [(set (match_operand:SI            0 "s_register_operand")
! 	(ashift:SI (match_operand:SI 1 "s_register_operand")
! 		   (match_operand:SI 2 "arm_rhs_operand")))]
    "TARGET_EITHER"
    "
    if (CONST_INT_P (operands[2])
***************
*** 4104,4148 ****
  )
  
  (define_expand "ashrdi3"
!   [(set (match_operand:DI              0 "s_register_operand" "")
!         (ashiftrt:DI (match_operand:DI 1 "s_register_operand" "")
!                      (match_operand:SI 2 "reg_or_int_operand" "")))]
    "TARGET_32BIT"
    "
!   if (TARGET_NEON)
!     {
!       /* Delay the decision whether to use NEON or core-regs until
! 	 register allocation.  */
!       emit_insn (gen_ashrdi3_neon (operands[0], operands[1], operands[2]));
!       DONE;
!     }
! 
!   if (!CONST_INT_P (operands[2]) && TARGET_REALLY_IWMMXT)
!     ; /* No special preparation statements; expand pattern as above.  */
!   else
      {
!       rtx scratch1, scratch2;
! 
!       /* Ideally we should use iwmmxt here if we could know that operands[1]
!          ends up already living in an iwmmxt register. Otherwise it's
!          cheaper to have the alternate code being generated than moving
!          values to iwmmxt regs and back.  */
  
!       /* Expand operation using core-registers.
! 	 'FAIL' would achieve the same thing, but this is a bit smarter.  */
!       scratch1 = gen_reg_rtx (SImode);
!       scratch2 = gen_reg_rtx (SImode);
!       arm_emit_coreregs_64bit_shift (ASHIFTRT, operands[0], operands[1],
! 				     operands[2], scratch1, scratch2);
        DONE;
      }
!   "
! )
  
  (define_expand "ashrsi3"
!   [(set (match_operand:SI              0 "s_register_operand" "")
! 	(ashiftrt:SI (match_operand:SI 1 "s_register_operand" "")
! 		     (match_operand:SI 2 "arm_rhs_operand" "")))]
    "TARGET_EITHER"
    "
    if (CONST_INT_P (operands[2])
--- 4525,4556 ----
  )
  
  (define_expand "ashrdi3"
!   [(set (match_operand:DI              0 "s_register_operand")
!         (ashiftrt:DI (match_operand:DI 1 "s_register_operand")
!                      (match_operand:SI 2 "reg_or_int_operand")))]
    "TARGET_32BIT"
    "
!   /* Armv8.1-M Mainline double shifts are not expanded.  */
!   if (TARGET_HAVE_MVE && !BYTES_BIG_ENDIAN
!       && arm_reg_or_long_shift_imm (operands[2], GET_MODE (operands[2])))
      {
!       if (!reg_overlap_mentioned_p(operands[0], operands[1]))
! 	emit_insn (gen_movdi (operands[0], operands[1]));
  
!       emit_insn (gen_thumb2_asrl (operands[0], operands[2]));
        DONE;
      }
! 
!   arm_emit_coreregs_64bit_shift (ASHIFTRT, operands[0], operands[1],
! 				 operands[2], gen_reg_rtx (SImode),
! 				 gen_reg_rtx (SImode));
!   DONE;
! ")
  
  (define_expand "ashrsi3"
!   [(set (match_operand:SI              0 "s_register_operand")
! 	(ashiftrt:SI (match_operand:SI 1 "s_register_operand")
! 		     (match_operand:SI 2 "arm_rhs_operand")))]
    "TARGET_EITHER"
    "
    if (CONST_INT_P (operands[2])
***************
*** 4152,4196 ****
  )
  
  (define_expand "lshrdi3"
!   [(set (match_operand:DI              0 "s_register_operand" "")
!         (lshiftrt:DI (match_operand:DI 1 "s_register_operand" "")
!                      (match_operand:SI 2 "reg_or_int_operand" "")))]
    "TARGET_32BIT"
    "
!   if (TARGET_NEON)
!     {
!       /* Delay the decision whether to use NEON or core-regs until
! 	 register allocation.  */
!       emit_insn (gen_lshrdi3_neon (operands[0], operands[1], operands[2]));
!       DONE;
!     }
! 
!   if (!CONST_INT_P (operands[2]) && TARGET_REALLY_IWMMXT)
!     ; /* No special preparation statements; expand pattern as above.  */
!   else
      {
!       rtx scratch1, scratch2;
! 
!       /* Ideally we should use iwmmxt here if we could know that operands[1]
!          ends up already living in an iwmmxt register. Otherwise it's
!          cheaper to have the alternate code being generated than moving
!          values to iwmmxt regs and back.  */
  
!       /* Expand operation using core-registers.
! 	 'FAIL' would achieve the same thing, but this is a bit smarter.  */
!       scratch1 = gen_reg_rtx (SImode);
!       scratch2 = gen_reg_rtx (SImode);
!       arm_emit_coreregs_64bit_shift (LSHIFTRT, operands[0], operands[1],
! 				     operands[2], scratch1, scratch2);
        DONE;
      }
!   "
! )
  
  (define_expand "lshrsi3"
!   [(set (match_operand:SI              0 "s_register_operand" "")
! 	(lshiftrt:SI (match_operand:SI 1 "s_register_operand" "")
! 		     (match_operand:SI 2 "arm_rhs_operand" "")))]
    "TARGET_EITHER"
    "
    if (CONST_INT_P (operands[2])
--- 4560,4591 ----
  )
  
  (define_expand "lshrdi3"
!   [(set (match_operand:DI              0 "s_register_operand")
!         (lshiftrt:DI (match_operand:DI 1 "s_register_operand")
!                      (match_operand:SI 2 "reg_or_int_operand")))]
    "TARGET_32BIT"
    "
!   /* Armv8.1-M Mainline double shifts are not expanded.  */
!   if (TARGET_HAVE_MVE && !BYTES_BIG_ENDIAN
!     && long_shift_imm (operands[2], GET_MODE (operands[2])))
      {
!       if (!reg_overlap_mentioned_p(operands[0], operands[1]))
!         emit_insn (gen_movdi (operands[0], operands[1]));
  
!       emit_insn (gen_thumb2_lsrl (operands[0], operands[2]));
        DONE;
      }
! 
!   arm_emit_coreregs_64bit_shift (LSHIFTRT, operands[0], operands[1],
! 				 operands[2], gen_reg_rtx (SImode),
! 				 gen_reg_rtx (SImode));
!   DONE;
! ")
  
  (define_expand "lshrsi3"
!   [(set (match_operand:SI              0 "s_register_operand")
! 	(lshiftrt:SI (match_operand:SI 1 "s_register_operand")
! 		     (match_operand:SI 2 "arm_rhs_operand")))]
    "TARGET_EITHER"
    "
    if (CONST_INT_P (operands[2])
***************
*** 4203,4211 ****
  )
  
  (define_expand "rotlsi3"
!   [(set (match_operand:SI              0 "s_register_operand" "")
! 	(rotatert:SI (match_operand:SI 1 "s_register_operand" "")
! 		     (match_operand:SI 2 "reg_or_int_operand" "")))]
    "TARGET_32BIT"
    "
    if (CONST_INT_P (operands[2]))
--- 4598,4606 ----
  )
  
  (define_expand "rotlsi3"
!   [(set (match_operand:SI              0 "s_register_operand")
! 	(rotatert:SI (match_operand:SI 1 "s_register_operand")
! 		     (match_operand:SI 2 "reg_or_int_operand")))]
    "TARGET_32BIT"
    "
    if (CONST_INT_P (operands[2]))
***************
*** 4220,4228 ****
  )
  
  (define_expand "rotrsi3"
!   [(set (match_operand:SI              0 "s_register_operand" "")
! 	(rotatert:SI (match_operand:SI 1 "s_register_operand" "")
! 		     (match_operand:SI 2 "arm_rhs_operand" "")))]
    "TARGET_EITHER"
    "
    if (TARGET_32BIT)
--- 4615,4623 ----
  )
  
  (define_expand "rotrsi3"
!   [(set (match_operand:SI              0 "s_register_operand")
! 	(rotatert:SI (match_operand:SI 1 "s_register_operand")
! 		     (match_operand:SI 2 "arm_rhs_operand")))]
    "TARGET_EITHER"
    "
    if (TARGET_32BIT)
***************
*** 4255,4262 ****
  )
  
  (define_insn "*shiftsi3_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (match_operator:SI 3 "shift_operator"
  			  [(match_operand:SI 1 "s_register_operand" "r,r")
  			   (match_operand:SI 2 "arm_rhs_operand" "M,r")])
  			 (const_int 0)))
--- 4650,4657 ----
  )
  
  (define_insn "*shiftsi3_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (match_operator:SI 3 "shift_operator"
  			  [(match_operand:SI 1 "s_register_operand" "r,r")
  			   (match_operand:SI 2 "arm_rhs_operand" "M,r")])
  			 (const_int 0)))
***************
*** 4270,4277 ****
  )
  
  (define_insn "*shiftsi3_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (match_operator:SI 3 "shift_operator"
  			  [(match_operand:SI 1 "s_register_operand" "r,r")
  			   (match_operand:SI 2 "arm_rhs_operand" "M,r")])
  			 (const_int 0)))
--- 4665,4672 ----
  )
  
  (define_insn "*shiftsi3_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (match_operator:SI 3 "shift_operator"
  			  [(match_operand:SI 1 "s_register_operand" "r,r")
  			   (match_operand:SI 2 "arm_rhs_operand" "M,r")])
  			 (const_int 0)))
***************
*** 4287,4293 ****
    [(set (match_operand:SI 0 "s_register_operand" "=r,r")
  	(not:SI (match_operator:SI 3 "shift_operator"
  		 [(match_operand:SI 1 "s_register_operand" "r,r")
! 		  (match_operand:SI 2 "shift_amount_operand" "M,rM")])))]
    "TARGET_32BIT"
    "mvn%?\\t%0, %1%S3"
    [(set_attr "predicable" "yes")
--- 4682,4688 ----
    [(set (match_operand:SI 0 "s_register_operand" "=r,r")
  	(not:SI (match_operator:SI 3 "shift_operator"
  		 [(match_operand:SI 1 "s_register_operand" "r,r")
! 		  (match_operand:SI 2 "shift_amount_operand" "M,r")])))]
    "TARGET_32BIT"
    "mvn%?\\t%0, %1%S3"
    [(set_attr "predicable" "yes")
***************
*** 4296,4306 ****
     (set_attr "type" "mvn_shift,mvn_shift_reg")])
  
  (define_insn "*not_shiftsi_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (not:SI (match_operator:SI 3 "shift_operator"
  		  [(match_operand:SI 1 "s_register_operand" "r,r")
! 		   (match_operand:SI 2 "shift_amount_operand" "M,rM")]))
  	 (const_int 0)))
     (set (match_operand:SI 0 "s_register_operand" "=r,r")
  	(not:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)])))]
--- 4691,4701 ----
     (set_attr "type" "mvn_shift,mvn_shift_reg")])
  
  (define_insn "*not_shiftsi_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (not:SI (match_operator:SI 3 "shift_operator"
  		  [(match_operand:SI 1 "s_register_operand" "r,r")
! 		   (match_operand:SI 2 "shift_amount_operand" "M,r")]))
  	 (const_int 0)))
     (set (match_operand:SI 0 "s_register_operand" "=r,r")
  	(not:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)])))]
***************
*** 4312,4322 ****
     (set_attr "type" "mvn_shift,mvn_shift_reg")])
  
  (define_insn "*not_shiftsi_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (not:SI (match_operator:SI 3 "shift_operator"
  		  [(match_operand:SI 1 "s_register_operand" "r,r")
! 		   (match_operand:SI 2 "shift_amount_operand" "M,rM")]))
  	 (const_int 0)))
     (clobber (match_scratch:SI 0 "=r,r"))]
    "TARGET_32BIT"
--- 4707,4717 ----
     (set_attr "type" "mvn_shift,mvn_shift_reg")])
  
  (define_insn "*not_shiftsi_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (not:SI (match_operator:SI 3 "shift_operator"
  		  [(match_operand:SI 1 "s_register_operand" "r,r")
! 		   (match_operand:SI 2 "shift_amount_operand" "M,r")]))
  	 (const_int 0)))
     (clobber (match_scratch:SI 0 "=r,r"))]
    "TARGET_32BIT"
***************
*** 4330,4339 ****
  ;; to reduce register pressure later on.
  
  (define_expand "extzv"
!   [(set (match_operand 0 "s_register_operand" "")
! 	(zero_extract (match_operand 1 "nonimmediate_operand" "")
! 		      (match_operand 2 "const_int_operand" "")
! 		      (match_operand 3 "const_int_operand" "")))]
    "TARGET_THUMB1 || arm_arch_thumb2"
    "
    {
--- 4725,4734 ----
  ;; to reduce register pressure later on.
  
  (define_expand "extzv"
!   [(set (match_operand 0 "s_register_operand")
! 	(zero_extract (match_operand 1 "nonimmediate_operand")
! 		      (match_operand 2 "const_int_operand")
! 		      (match_operand 3 "const_int_operand")))]
    "TARGET_THUMB1 || arm_arch_thumb2"
    "
    {
***************
*** 4411,4430 ****
  ;; Helper for extzv, for the Thumb-1 register-shifts case.
  
  (define_expand "extzv_t1"
!   [(set (match_operand:SI 4 "s_register_operand" "")
! 	(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "")
! 		   (match_operand:SI 2 "const_int_operand" "")))
!    (set (match_operand:SI 0 "s_register_operand" "")
  	(lshiftrt:SI (match_dup 4)
! 		     (match_operand:SI 3 "const_int_operand" "")))]
    "TARGET_THUMB1"
    "")
  
  (define_expand "extv"
!   [(set (match_operand 0 "s_register_operand" "")
! 	(sign_extract (match_operand 1 "nonimmediate_operand" "")
! 		      (match_operand 2 "const_int_operand" "")
! 		      (match_operand 3 "const_int_operand" "")))]
    "arm_arch_thumb2"
  {
    HOST_WIDE_INT width = INTVAL (operands[2]);
--- 4806,4825 ----
  ;; Helper for extzv, for the Thumb-1 register-shifts case.
  
  (define_expand "extzv_t1"
!   [(set (match_operand:SI 4 "s_register_operand")
! 	(ashift:SI (match_operand:SI 1 "nonimmediate_operand")
! 		   (match_operand:SI 2 "const_int_operand")))
!    (set (match_operand:SI 0 "s_register_operand")
  	(lshiftrt:SI (match_dup 4)
! 		     (match_operand:SI 3 "const_int_operand")))]
    "TARGET_THUMB1"
    "")
  
  (define_expand "extv"
!   [(set (match_operand 0 "s_register_operand")
! 	(sign_extract (match_operand 1 "nonimmediate_operand")
! 		      (match_operand 2 "const_int_operand")
! 		      (match_operand 3 "const_int_operand")))]
    "arm_arch_thumb2"
  {
    HOST_WIDE_INT width = INTVAL (operands[2]);
***************
*** 4482,4497 ****
  ; Helper to expand register forms of extv with the proper modes.
  
  (define_expand "extv_regsi"
!   [(set (match_operand:SI 0 "s_register_operand" "")
! 	(sign_extract:SI (match_operand:SI 1 "s_register_operand" "")
! 			 (match_operand 2 "const_int_operand" "")
! 			 (match_operand 3 "const_int_operand" "")))]
    ""
  {
  })
  
  ; ARMv6+ unaligned load/store instructions (used for packed structure accesses).
  
  (define_insn "unaligned_loadsi"
    [(set (match_operand:SI 0 "s_register_operand" "=l,l,r")
  	(unspec:SI [(match_operand:SI 1 "memory_operand" "m,Uw,m")]
--- 4877,4903 ----
  ; Helper to expand register forms of extv with the proper modes.
  
  (define_expand "extv_regsi"
!   [(set (match_operand:SI 0 "s_register_operand")
! 	(sign_extract:SI (match_operand:SI 1 "s_register_operand")
! 			 (match_operand 2 "const_int_operand")
! 			 (match_operand 3 "const_int_operand")))]
    ""
  {
  })
  
  ; ARMv6+ unaligned load/store instructions (used for packed structure accesses).
  
+ (define_insn "unaligned_loaddi"
+   [(set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "memory_operand" "m")]
+ 		   UNSPEC_UNALIGNED_LOAD))]
+   "TARGET_32BIT && TARGET_LDRD"
+   "*
+   return output_move_double (operands, true, NULL);
+   "
+   [(set_attr "length" "8")
+    (set_attr "type" "load_8")])
+ 
  (define_insn "unaligned_loadsi"
    [(set (match_operand:SI 0 "s_register_operand" "=l,l,r")
  	(unspec:SI [(match_operand:SI 1 "memory_operand" "m,Uw,m")]
***************
*** 4537,4542 ****
--- 4943,4959 ----
     (set_attr "predicable_short_it" "no,yes,no")
     (set_attr "type" "load_byte")])
  
+ (define_insn "unaligned_storedi"
+   [(set (match_operand:DI 0 "memory_operand" "=m")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "r")]
+ 		   UNSPEC_UNALIGNED_STORE))]
+   "TARGET_32BIT && TARGET_LDRD"
+   "*
+   return output_move_double (operands, true, NULL);
+   "
+   [(set_attr "length" "8")
+    (set_attr "type" "store_8")])
+ 
  (define_insn "unaligned_storesi"
    [(set (match_operand:SI 0 "memory_operand" "=m,Uw,m")
  	(unspec:SI [(match_operand:SI 1 "s_register_operand" "l,l,r")]
***************
*** 4627,4747 ****
  
  ;; Unary arithmetic insns
  
! (define_expand "negvsi3"
!   [(match_operand:SI 0 "register_operand")
!    (match_operand:SI 1 "register_operand")
     (match_operand 2 "")]
    "TARGET_32BIT"
  {
!   emit_insn (gen_subsi3_compare (operands[0], const0_rtx, operands[1]));
!   arm_gen_unlikely_cbranch (NE, CC_Vmode, operands[2]);
! 
!   DONE;
! })
! 
! (define_expand "negvdi3"
!   [(match_operand:DI 0 "register_operand")
!    (match_operand:DI 1 "register_operand")
!    (match_operand 2 "")]
!   "TARGET_ARM"
! {
!   emit_insn (gen_negdi2_compare (operands[0], operands[1]));
!   arm_gen_unlikely_cbranch (NE, CC_Vmode, operands[2]);
! 
    DONE;
  })
  
- 
- (define_insn_and_split "negdi2_compare"
-   [(set (reg:CC CC_REGNUM)
- 	(compare:CC
- 	  (const_int 0)
- 	  (match_operand:DI 1 "register_operand" "0,r")))
-    (set (match_operand:DI 0 "register_operand" "=r,&r")
- 	(minus:DI (const_int 0) (match_dup 1)))]
-   "TARGET_ARM"
-   "#"
-   "&& reload_completed"
-   [(parallel [(set (reg:CC CC_REGNUM)
- 		   (compare:CC (const_int 0) (match_dup 1)))
- 	      (set (match_dup 0) (minus:SI (const_int 0)
- 					   (match_dup 1)))])
-    (parallel [(set (reg:CC CC_REGNUM)
- 		   (compare:CC (const_int 0) (match_dup 3)))
- 	     (set (match_dup 2)
- 		  (minus:SI
- 		   (minus:SI (const_int 0) (match_dup 3))
- 		   (ltu:SI (reg:CC CC_REGNUM)
- 			   (const_int 0))))])]
-   {
-     operands[2] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-     operands[3] = gen_highpart (SImode, operands[1]);
-     operands[1] = gen_lowpart (SImode, operands[1]);
-   }
-   [(set_attr "conds" "set")
-    (set_attr "length" "8")
-    (set_attr "type" "multiple")]
- )
- 
- (define_expand "negdi2"
-  [(parallel
-    [(set (match_operand:DI 0 "s_register_operand" "")
- 	 (neg:DI (match_operand:DI 1 "s_register_operand" "")))
-     (clobber (reg:CC CC_REGNUM))])]
-   "TARGET_EITHER"
-   {
-     if (TARGET_NEON)
-       {
-         emit_insn (gen_negdi2_neon (operands[0], operands[1]));
- 	DONE;
-       }
-   }
- )
- 
- ;; The constraints here are to prevent a *partial* overlap (where %Q0 == %R1).
- ;; The first alternative allows the common case of a *full* overlap.
- (define_insn_and_split "*negdi2_insn"
-   [(set (match_operand:DI         0 "s_register_operand" "=r,&r")
- 	(neg:DI (match_operand:DI 1 "s_register_operand"  "0,r")))
-    (clobber (reg:CC CC_REGNUM))]
-   "TARGET_32BIT"
-   "#"	; rsbs %Q0, %Q1, #0; rsc %R0, %R1, #0	       (ARM)
- 	; negs %Q0, %Q1    ; sbc %R0, %R1, %R1, lsl #1 (Thumb-2)
-   "&& reload_completed"
-   [(parallel [(set (reg:CC CC_REGNUM)
- 		   (compare:CC (const_int 0) (match_dup 1)))
- 	      (set (match_dup 0) (minus:SI (const_int 0) (match_dup 1)))])
-    (set (match_dup 2) (minus:SI (minus:SI (const_int 0) (match_dup 3))
-                                 (ltu:SI (reg:CC CC_REGNUM) (const_int 0))))]
-   {
-     operands[2] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-     operands[3] = gen_highpart (SImode, operands[1]);
-     operands[1] = gen_lowpart (SImode, operands[1]);
-   }
-   [(set_attr "conds" "clob")
-    (set_attr "length" "8")
-    (set_attr "type" "multiple")]
- )
- 
- (define_insn "*negsi2_carryin_compare"
-   [(set (reg:CC CC_REGNUM)
- 	(compare:CC (const_int 0)
- 		    (match_operand:SI 1 "s_register_operand" "r")))
-    (set (match_operand:SI 0 "s_register_operand" "=r")
- 	(minus:SI (minus:SI (const_int 0)
- 			    (match_dup 1))
- 		  (match_operand:SI 2 "arm_borrow_operation" "")))]
-   "TARGET_ARM"
-   "rscs\\t%0, %1, #0"
-   [(set_attr "conds" "set")
-    (set_attr "type" "alus_imm")]
- )
- 
  (define_expand "negsi2"
!   [(set (match_operand:SI         0 "s_register_operand" "")
! 	(neg:SI (match_operand:SI 1 "s_register_operand" "")))]
    "TARGET_EITHER"
    ""
  )
--- 5044,5063 ----
  
  ;; Unary arithmetic insns
  
! (define_expand "negv<SIDI:mode>3"
!   [(match_operand:SIDI 0 "s_register_operand")
!    (match_operand:SIDI 1 "s_register_operand")
     (match_operand 2 "")]
    "TARGET_32BIT"
  {
!   emit_insn (gen_subv<mode>4 (operands[0], const0_rtx, operands[1],
! 			      operands[2]));
    DONE;
  })
  
  (define_expand "negsi2"
!   [(set (match_operand:SI         0 "s_register_operand")
! 	(neg:SI (match_operand:SI 1 "s_register_operand")))]
    "TARGET_EITHER"
    ""
  )
***************
*** 4755,4889 ****
     (set_attr "predicable_short_it" "yes,no")
     (set_attr "arch" "t2,*")
     (set_attr "length" "4")
!    (set_attr "type" "alu_sreg")]
  )
  
  (define_expand "negsf2"
!   [(set (match_operand:SF         0 "s_register_operand" "")
! 	(neg:SF (match_operand:SF 1 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    ""
  )
  
  (define_expand "negdf2"
!   [(set (match_operand:DF         0 "s_register_operand" "")
! 	(neg:DF (match_operand:DF 1 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
    "")
  
- (define_insn_and_split "*zextendsidi_negsi"
-   [(set (match_operand:DI 0 "s_register_operand" "=r")
-         (zero_extend:DI (neg:SI (match_operand:SI 1 "s_register_operand" "r"))))]
-    "TARGET_32BIT"
-    "#"
-    ""
-    [(set (match_dup 2)
-          (neg:SI (match_dup 1)))
-     (set (match_dup 3)
-          (const_int 0))]
-    {
-       operands[2] = gen_lowpart (SImode, operands[0]);
-       operands[3] = gen_highpart (SImode, operands[0]);
-    }
-  [(set_attr "length" "8")
-   (set_attr "type" "multiple")]
- )
- 
- ;; Negate an extended 32-bit value.
- (define_insn_and_split "*negdi_extendsidi"
-   [(set (match_operand:DI 0 "s_register_operand" "=l,r")
- 	(neg:DI (sign_extend:DI
- 		 (match_operand:SI 1 "s_register_operand" "l,r"))))
-    (clobber (reg:CC CC_REGNUM))]
-   "TARGET_32BIT"
-   "#"
-   "&& reload_completed"
-   [(const_int 0)]
-   {
-     rtx low = gen_lowpart (SImode, operands[0]);
-     rtx high = gen_highpart (SImode, operands[0]);
- 
-     if (reg_overlap_mentioned_p (low, operands[1]))
-       {
- 	/* Input overlaps the low word of the output.  Use:
- 		asr	Rhi, Rin, #31
- 		rsbs	Rlo, Rin, #0
- 		rsc	Rhi, Rhi, #0 (thumb2: sbc Rhi, Rhi, Rhi, lsl #1).  */
- 	rtx cc_reg = gen_rtx_REG (CCmode, CC_REGNUM);
- 
- 	emit_insn (gen_rtx_SET (high,
- 				gen_rtx_ASHIFTRT (SImode, operands[1],
- 						  GEN_INT (31))));
- 
- 	emit_insn (gen_subsi3_compare (low, const0_rtx, operands[1]));
- 	if (TARGET_ARM)
- 	  emit_insn (gen_rtx_SET (high,
- 				  gen_rtx_MINUS (SImode,
- 						 gen_rtx_MINUS (SImode,
- 								const0_rtx,
- 								high),
- 						 gen_rtx_LTU (SImode,
- 							      cc_reg,
- 							      const0_rtx))));
- 	else
- 	  {
- 	    rtx two_x = gen_rtx_ASHIFT (SImode, high, GEN_INT (1));
- 	    emit_insn (gen_rtx_SET (high,
- 				    gen_rtx_MINUS (SImode,
- 						   gen_rtx_MINUS (SImode,
- 								  high,
- 								  two_x),
- 						   gen_rtx_LTU (SImode,
- 								cc_reg,
- 								const0_rtx))));
- 	  }
-       }
-     else
-       {
- 	/* No overlap, or overlap on high word.  Use:
- 		rsb	Rlo, Rin, #0
- 		bic	Rhi, Rlo, Rin
- 		asr	Rhi, Rhi, #31
- 	   Flags not needed for this sequence.  */
- 	emit_insn (gen_rtx_SET (low, gen_rtx_NEG (SImode, operands[1])));
- 	emit_insn (gen_rtx_SET (high,
- 				gen_rtx_AND (SImode,
- 					     gen_rtx_NOT (SImode, operands[1]),
- 					     low)));
- 	emit_insn (gen_rtx_SET (high,
- 				gen_rtx_ASHIFTRT (SImode, high,
- 						  GEN_INT (31))));
-       }
-     DONE;
-   }
-   [(set_attr "length" "12")
-    (set_attr "arch" "t2,*")
-    (set_attr "type" "multiple")]
- )
- 
- (define_insn_and_split "*negdi_zero_extendsidi"
-   [(set (match_operand:DI 0 "s_register_operand" "=r,&r")
- 	(neg:DI (zero_extend:DI (match_operand:SI 1 "s_register_operand" "0,r"))))
-    (clobber (reg:CC CC_REGNUM))]
-   "TARGET_32BIT"
-   "#" ; "rsbs\\t%Q0, %1, #0\;sbc\\t%R0,%R0,%R0"
-       ;; Don't care what register is input to sbc,
-       ;; since we just need to propagate the carry.
-   "&& reload_completed"
-   [(parallel [(set (reg:CC CC_REGNUM)
- 		   (compare:CC (const_int 0) (match_dup 1)))
- 	      (set (match_dup 0) (minus:SI (const_int 0) (match_dup 1)))])
-    (set (match_dup 2) (minus:SI (minus:SI (match_dup 2) (match_dup 2))
- 				(ltu:SI (reg:CC CC_REGNUM) (const_int 0))))]
-   {
-     operands[2] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-   }
-   [(set_attr "conds" "clob")
-    (set_attr "length" "8")
-    (set_attr "type" "multiple")]   ;; length in thumb is 4
- )
- 
  ;; abssi2 doesn't really clobber the condition codes if a different register
  ;; is being set.  To keep things simple, assume during rtl manipulations that
  ;; it does, but tell the final scan operator the truth.  Similarly for
--- 5071,5124 ----
     (set_attr "predicable_short_it" "yes,no")
     (set_attr "arch" "t2,*")
     (set_attr "length" "4")
!    (set_attr "type" "alu_imm")]
! )
! 
! ;; To keep the comparison in canonical form we express it as (~reg cmp ~0)
! ;; rather than (0 cmp reg).  This gives the same results for unsigned
! ;; and equality compares which is what we mostly need here.
! (define_insn "negsi2_0compare"
!   [(set (reg:CC_RSB CC_REGNUM)
! 	(compare:CC_RSB (not:SI (match_operand:SI 1 "s_register_operand" "l,r"))
! 			(const_int -1)))
!    (set (match_operand:SI 0 "s_register_operand" "=l,r")
! 	(neg:SI (match_dup 1)))]
!   "TARGET_32BIT"
!   "@
!    negs\\t%0, %1
!    rsbs\\t%0, %1, #0"
!   [(set_attr "conds" "set")
!    (set_attr "arch" "t2,*")
!    (set_attr "length" "2,*")
!    (set_attr "type" "alus_imm")]
! )
! 
! (define_insn "negsi2_carryin"
!   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
! 	(minus:SI (neg:SI (match_operand:SI 1 "s_register_operand" "r,r"))
! 		  (match_operand:SI 2 "arm_borrow_operation" "")))]
!   "TARGET_32BIT"
!   "@
!    rsc\\t%0, %1, #0
!    sbc\\t%0, %1, %1, lsl #1"
!   [(set_attr "conds" "use")
!    (set_attr "arch" "a,t2")
!    (set_attr "type" "adc_imm,adc_reg")]
  )
  
  (define_expand "negsf2"
!   [(set (match_operand:SF         0 "s_register_operand")
! 	(neg:SF (match_operand:SF 1 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    ""
  )
  
  (define_expand "negdf2"
!   [(set (match_operand:DF         0 "s_register_operand")
! 	(neg:DF (match_operand:DF 1 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
    "")
  
  ;; abssi2 doesn't really clobber the condition codes if a different register
  ;; is being set.  To keep things simple, assume during rtl manipulations that
  ;; it does, but tell the final scan operator the truth.  Similarly for
***************
*** 4891,4898 ****
  
  (define_expand "abssi2"
    [(parallel
!     [(set (match_operand:SI         0 "s_register_operand" "")
! 	  (abs:SI (match_operand:SI 1 "s_register_operand" "")))
       (clobber (match_dup 2))])]
    "TARGET_EITHER"
    "
--- 5126,5133 ----
  
  (define_expand "abssi2"
    [(parallel
!     [(set (match_operand:SI         0 "s_register_operand")
! 	  (abs:SI (match_operand:SI 1 "s_register_operand")))
       (clobber (match_dup 2))])]
    "TARGET_EITHER"
    "
***************
*** 5020,5101 ****
  )
  
  (define_expand "abssf2"
!   [(set (match_operand:SF         0 "s_register_operand" "")
! 	(abs:SF (match_operand:SF 1 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "")
  
  (define_expand "absdf2"
!   [(set (match_operand:DF         0 "s_register_operand" "")
! 	(abs:DF (match_operand:DF 1 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "")
  
  (define_expand "sqrtsf2"
!   [(set (match_operand:SF 0 "s_register_operand" "")
! 	(sqrt:SF (match_operand:SF 1 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "")
  
  (define_expand "sqrtdf2"
!   [(set (match_operand:DF 0 "s_register_operand" "")
! 	(sqrt:DF (match_operand:DF 1 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
    "")
  
- (define_expand "one_cmpldi2"
-   [(set (match_operand:DI 0 "s_register_operand" "")
- 	(not:DI (match_operand:DI 1 "s_register_operand" "")))]
-   "TARGET_32BIT"
-   "
-   if (!TARGET_NEON && !TARGET_IWMMXT)
-     {
-       rtx low  = simplify_gen_unary (NOT, SImode,
- 				     gen_lowpart (SImode, operands[1]),
- 				     SImode);
-       rtx high = simplify_gen_unary (NOT, SImode,
- 				     gen_highpart_mode (SImode, DImode,
- 							operands[1]),
- 				     SImode);
- 
-       emit_insn (gen_rtx_SET (gen_lowpart (SImode, operands[0]), low));
-       emit_insn (gen_rtx_SET (gen_highpart (SImode, operands[0]), high));
- 
-       DONE;
-     }
-   /* Otherwise expand pattern as above.  */
-   "
- )
- 
- (define_insn_and_split "*one_cmpldi2_insn"
-   [(set (match_operand:DI 0 "s_register_operand"	 "=w,&r,&r,?w")
- 	(not:DI (match_operand:DI 1 "s_register_operand" " w, 0, r, w")))]
-   "TARGET_32BIT"
-   "@
-    vmvn\t%P0, %P1
-    #
-    #
-    vmvn\t%P0, %P1"
-   "TARGET_32BIT && reload_completed
-    && arm_general_register_operand (operands[0], DImode)"
-   [(set (match_dup 0) (not:SI (match_dup 1)))
-    (set (match_dup 2) (not:SI (match_dup 3)))]
-   "
-   {
-     operands[2] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-     operands[3] = gen_highpart (SImode, operands[1]);
-     operands[1] = gen_lowpart (SImode, operands[1]);
-   }"
-   [(set_attr "length" "*,8,8,*")
-    (set_attr "predicable" "no,yes,yes,no")
-    (set_attr "type" "neon_move,multiple,multiple,neon_move")
-    (set_attr "arch" "neon_for_64bits,*,*,avoid_neon_for_64bits")]
- )
- 
  (define_expand "one_cmplsi2"
!   [(set (match_operand:SI         0 "s_register_operand" "")
! 	(not:SI (match_operand:SI 1 "s_register_operand" "")))]
    "TARGET_EITHER"
    ""
  )
--- 5255,5286 ----
  )
  
  (define_expand "abssf2"
!   [(set (match_operand:SF         0 "s_register_operand")
! 	(abs:SF (match_operand:SF 1 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "")
  
  (define_expand "absdf2"
!   [(set (match_operand:DF         0 "s_register_operand")
! 	(abs:DF (match_operand:DF 1 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "")
  
  (define_expand "sqrtsf2"
!   [(set (match_operand:SF 0 "s_register_operand")
! 	(sqrt:SF (match_operand:SF 1 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "")
  
  (define_expand "sqrtdf2"
!   [(set (match_operand:DF 0 "s_register_operand")
! 	(sqrt:DF (match_operand:DF 1 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
    "")
  
  (define_expand "one_cmplsi2"
!   [(set (match_operand:SI         0 "s_register_operand")
! 	(not:SI (match_operand:SI 1 "s_register_operand")))]
    "TARGET_EITHER"
    ""
  )
***************
*** 5113,5120 ****
  )
  
  (define_insn "*notsi_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (not:SI (match_operand:SI 1 "s_register_operand" "r"))
  			 (const_int 0)))
     (set (match_operand:SI 0 "s_register_operand" "=r")
  	(not:SI (match_dup 1)))]
--- 5298,5305 ----
  )
  
  (define_insn "*notsi_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (not:SI (match_operand:SI 1 "s_register_operand" "r"))
  			 (const_int 0)))
     (set (match_operand:SI 0 "s_register_operand" "=r")
  	(not:SI (match_dup 1)))]
***************
*** 5125,5132 ****
  )
  
  (define_insn "*notsi_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (not:SI (match_operand:SI 1 "s_register_operand" "r"))
  			 (const_int 0)))
     (clobber (match_scratch:SI 0 "=r"))]
    "TARGET_32BIT"
--- 5310,5317 ----
  )
  
  (define_insn "*notsi_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (not:SI (match_operand:SI 1 "s_register_operand" "r"))
  			 (const_int 0)))
     (clobber (match_scratch:SI 0 "=r"))]
    "TARGET_32BIT"
***************
*** 5138,5145 ****
  ;; Fixed <--> Floating conversion insns
  
  (define_expand "floatsihf2"
!   [(set (match_operand:HF           0 "general_operand" "")
! 	(float:HF (match_operand:SI 1 "general_operand" "")))]
    "TARGET_EITHER"
    "
    {
--- 5323,5330 ----
  ;; Fixed <--> Floating conversion insns
  
  (define_expand "floatsihf2"
!   [(set (match_operand:HF           0 "general_operand")
! 	(float:HF (match_operand:SI 1 "general_operand")))]
    "TARGET_EITHER"
    "
    {
***************
*** 5152,5159 ****
  )
  
  (define_expand "floatdihf2"
!   [(set (match_operand:HF           0 "general_operand" "")
! 	(float:HF (match_operand:DI 1 "general_operand" "")))]
    "TARGET_EITHER"
    "
    {
--- 5337,5344 ----
  )
  
  (define_expand "floatdihf2"
!   [(set (match_operand:HF           0 "general_operand")
! 	(float:HF (match_operand:DI 1 "general_operand")))]
    "TARGET_EITHER"
    "
    {
***************
*** 5166,5187 ****
  )
  
  (define_expand "floatsisf2"
!   [(set (match_operand:SF           0 "s_register_operand" "")
! 	(float:SF (match_operand:SI 1 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "
  ")
  
  (define_expand "floatsidf2"
!   [(set (match_operand:DF           0 "s_register_operand" "")
! 	(float:DF (match_operand:SI 1 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "
  ")
  
  (define_expand "fix_trunchfsi2"
!   [(set (match_operand:SI         0 "general_operand" "")
! 	(fix:SI (fix:HF (match_operand:HF 1 "general_operand"  ""))))]
    "TARGET_EITHER"
    "
    {
--- 5351,5372 ----
  )
  
  (define_expand "floatsisf2"
!   [(set (match_operand:SF           0 "s_register_operand")
! 	(float:SF (match_operand:SI 1 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "
  ")
  
  (define_expand "floatsidf2"
!   [(set (match_operand:DF           0 "s_register_operand")
! 	(float:DF (match_operand:SI 1 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "
  ")
  
  (define_expand "fix_trunchfsi2"
!   [(set (match_operand:SI         0 "general_operand")
! 	(fix:SI (fix:HF (match_operand:HF 1 "general_operand"))))]
    "TARGET_EITHER"
    "
    {
***************
*** 5192,5199 ****
  )
  
  (define_expand "fix_trunchfdi2"
!   [(set (match_operand:DI         0 "general_operand" "")
! 	(fix:DI (fix:HF (match_operand:HF 1 "general_operand"  ""))))]
    "TARGET_EITHER"
    "
    {
--- 5377,5384 ----
  )
  
  (define_expand "fix_trunchfdi2"
!   [(set (match_operand:DI         0 "general_operand")
! 	(fix:DI (fix:HF (match_operand:HF 1 "general_operand"))))]
    "TARGET_EITHER"
    "
    {
***************
*** 5204,5218 ****
  )
  
  (define_expand "fix_truncsfsi2"
!   [(set (match_operand:SI         0 "s_register_operand" "")
! 	(fix:SI (fix:SF (match_operand:SF 1 "s_register_operand"  ""))))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "
  ")
  
  (define_expand "fix_truncdfsi2"
!   [(set (match_operand:SI         0 "s_register_operand" "")
! 	(fix:SI (fix:DF (match_operand:DF 1 "s_register_operand"  ""))))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "
  ")
--- 5389,5403 ----
  )
  
  (define_expand "fix_truncsfsi2"
!   [(set (match_operand:SI         0 "s_register_operand")
! 	(fix:SI (fix:SF (match_operand:SF 1 "s_register_operand"))))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "
  ")
  
  (define_expand "fix_truncdfsi2"
!   [(set (match_operand:SI         0 "s_register_operand")
! 	(fix:SI (fix:DF (match_operand:DF 1 "s_register_operand"))))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "
  ")
***************
*** 5220,5228 ****
  ;; Truncation insns
  
  (define_expand "truncdfsf2"
!   [(set (match_operand:SF  0 "s_register_operand" "")
  	(float_truncate:SF
!  	 (match_operand:DF 1 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    ""
  )
--- 5405,5413 ----
  ;; Truncation insns
  
  (define_expand "truncdfsf2"
!   [(set (match_operand:SF  0 "s_register_operand")
  	(float_truncate:SF
! 	 (match_operand:DF 1 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    ""
  )
***************
*** 5235,5243 ****
  ;; a single-step instruction.
  
  (define_expand "truncdfhf2"
!   [(set (match_operand:HF  0 "s_register_operand" "")
  	(float_truncate:HF
! 	 (match_operand:DF 1 "s_register_operand" "")))]
    "(TARGET_EITHER && flag_unsafe_math_optimizations)
     || (TARGET_32BIT && TARGET_FP16_TO_DOUBLE)"
  {
--- 5420,5428 ----
  ;; a single-step instruction.
  
  (define_expand "truncdfhf2"
!   [(set (match_operand:HF  0 "s_register_operand")
  	(float_truncate:HF
! 	 (match_operand:DF 1 "s_register_operand")))]
    "(TARGET_EITHER && flag_unsafe_math_optimizations)
     || (TARGET_32BIT && TARGET_FP16_TO_DOUBLE)"
  {
***************
*** 5259,5314 ****
  
  ;; Zero and sign extension instructions.
  
! (define_insn "zero_extend<mode>di2"
!   [(set (match_operand:DI 0 "s_register_operand" "=w,r,?r,w")
!         (zero_extend:DI (match_operand:QHSI 1 "<qhs_zextenddi_op>"
! 					    "<qhs_zextenddi_cstr>")))]
    "TARGET_32BIT <qhs_zextenddi_cond>"
!   "#"
!   [(set_attr "length" "8,4,8,8")
!    (set_attr "arch" "neon_for_64bits,*,*,avoid_neon_for_64bits")
!    (set_attr "ce_count" "2")
!    (set_attr "predicable" "yes")
!    (set_attr "type" "multiple,mov_reg,multiple,multiple")]
  )
  
! (define_insn "extend<mode>di2"
!   [(set (match_operand:DI 0 "s_register_operand" "=w,r,?r,?r,w")
!         (sign_extend:DI (match_operand:QHSI 1 "<qhs_extenddi_op>"
! 					    "<qhs_extenddi_cstr>")))]
    "TARGET_32BIT <qhs_sextenddi_cond>"
!   "#"
!   [(set_attr "length" "8,4,8,8,8")
!    (set_attr "ce_count" "2")
!    (set_attr "shift" "1")
!    (set_attr "predicable" "yes")
!    (set_attr "arch" "neon_for_64bits,*,a,t,avoid_neon_for_64bits")
!    (set_attr "type" "multiple,mov_reg,multiple,multiple,multiple")]
  )
  
  ;; Splits for all extensions to DImode
  (define_split
    [(set (match_operand:DI 0 "s_register_operand" "")
          (zero_extend:DI (match_operand 1 "nonimmediate_operand" "")))]
!   "TARGET_32BIT && reload_completed && !IS_VFP_REGNUM (REGNO (operands[0]))"
    [(set (match_dup 0) (match_dup 1))]
  {
    rtx lo_part = gen_lowpart (SImode, operands[0]);
    machine_mode src_mode = GET_MODE (operands[1]);
  
!   if (REG_P (operands[0])
!       && !reg_overlap_mentioned_p (operands[0], operands[1]))
!     emit_clobber (operands[0]);
!   if (!REG_P (lo_part) || src_mode != SImode
!       || !rtx_equal_p (lo_part, operands[1]))
!     {
!       if (src_mode == SImode)
!         emit_move_insn (lo_part, operands[1]);
!       else
!         emit_insn (gen_rtx_SET (lo_part,
! 				gen_rtx_ZERO_EXTEND (SImode, operands[1])));
!       operands[1] = lo_part;
!     }
    operands[0] = gen_highpart (SImode, operands[0]);
    operands[1] = const0_rtx;
  })
--- 5444,5524 ----
  
  ;; Zero and sign extension instructions.
  
! (define_expand "zero_extend<mode>di2"
!   [(set (match_operand:DI 0 "s_register_operand" "")
! 	(zero_extend:DI (match_operand:QHSI 1 "<qhs_zextenddi_op>" "")))]
    "TARGET_32BIT <qhs_zextenddi_cond>"
!   {
!     rtx res_lo, res_hi, op0_lo, op0_hi;
!     res_lo = gen_lowpart (SImode, operands[0]);
!     res_hi = gen_highpart (SImode, operands[0]);
!     if (can_create_pseudo_p ())
!       {
! 	op0_lo = <MODE>mode == SImode ? operands[1] : gen_reg_rtx (SImode);
! 	op0_hi = gen_reg_rtx (SImode);
!       }
!     else
!       {
! 	op0_lo = <MODE>mode == SImode ? operands[1] : res_lo;
! 	op0_hi = res_hi;
!       }
!     if (<MODE>mode != SImode)
!       emit_insn (gen_rtx_SET (op0_lo,
! 			      gen_rtx_ZERO_EXTEND (SImode, operands[1])));
!     emit_insn (gen_movsi (op0_hi, const0_rtx));
!     if (res_lo != op0_lo)
!       emit_move_insn (res_lo, op0_lo);
!     if (res_hi != op0_hi)
!       emit_move_insn (res_hi, op0_hi);
!     DONE;
!   }
  )
  
! (define_expand "extend<mode>di2"
!   [(set (match_operand:DI 0 "s_register_operand" "")
! 	(sign_extend:DI (match_operand:QHSI 1 "<qhs_extenddi_op>" "")))]
    "TARGET_32BIT <qhs_sextenddi_cond>"
!   {
!     rtx res_lo, res_hi, op0_lo, op0_hi;
!     res_lo = gen_lowpart (SImode, operands[0]);
!     res_hi = gen_highpart (SImode, operands[0]);
!     if (can_create_pseudo_p ())
!       {
! 	op0_lo = <MODE>mode == SImode ? operands[1] : gen_reg_rtx (SImode);
! 	op0_hi = gen_reg_rtx (SImode);
!       }
!     else
!       {
! 	op0_lo = <MODE>mode == SImode ? operands[1] : res_lo;
! 	op0_hi = res_hi;
!       }
!     if (<MODE>mode != SImode)
!       emit_insn (gen_rtx_SET (op0_lo,
! 			      gen_rtx_SIGN_EXTEND (SImode, operands[1])));
!     emit_insn (gen_ashrsi3 (op0_hi, op0_lo, GEN_INT (31)));
!     if (res_lo != op0_lo)
!       emit_move_insn (res_lo, op0_lo);
!     if (res_hi != op0_hi)
!       emit_move_insn (res_hi, op0_hi);
!     DONE;
!   }
  )
  
  ;; Splits for all extensions to DImode
  (define_split
    [(set (match_operand:DI 0 "s_register_operand" "")
          (zero_extend:DI (match_operand 1 "nonimmediate_operand" "")))]
!   "TARGET_32BIT"
    [(set (match_dup 0) (match_dup 1))]
  {
    rtx lo_part = gen_lowpart (SImode, operands[0]);
    machine_mode src_mode = GET_MODE (operands[1]);
  
!   if (src_mode == SImode)
!     emit_move_insn (lo_part, operands[1]);
!   else
!     emit_insn (gen_rtx_SET (lo_part,
! 			    gen_rtx_ZERO_EXTEND (SImode, operands[1])));
    operands[0] = gen_highpart (SImode, operands[0]);
    operands[1] = const0_rtx;
  })
***************
*** 5316,5347 ****
  (define_split
    [(set (match_operand:DI 0 "s_register_operand" "")
          (sign_extend:DI (match_operand 1 "nonimmediate_operand" "")))]
!   "TARGET_32BIT && reload_completed && !IS_VFP_REGNUM (REGNO (operands[0]))"
    [(set (match_dup 0) (ashiftrt:SI (match_dup 1) (const_int 31)))]
  {
    rtx lo_part = gen_lowpart (SImode, operands[0]);
    machine_mode src_mode = GET_MODE (operands[1]);
  
!   if (REG_P (operands[0])
!       && !reg_overlap_mentioned_p (operands[0], operands[1]))
!     emit_clobber (operands[0]);
! 
!   if (!REG_P (lo_part) || src_mode != SImode
!       || !rtx_equal_p (lo_part, operands[1]))
!     {
!       if (src_mode == SImode)
!         emit_move_insn (lo_part, operands[1]);
!       else
!         emit_insn (gen_rtx_SET (lo_part,
! 				gen_rtx_SIGN_EXTEND (SImode, operands[1])));
!       operands[1] = lo_part;
!     }
    operands[0] = gen_highpart (SImode, operands[0]);
  })
  
  (define_expand "zero_extendhisi2"
!   [(set (match_operand:SI 0 "s_register_operand" "")
! 	(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))]
    "TARGET_EITHER"
  {
    if (TARGET_ARM && !arm_arch4 && MEM_P (operands[1]))
--- 5526,5549 ----
  (define_split
    [(set (match_operand:DI 0 "s_register_operand" "")
          (sign_extend:DI (match_operand 1 "nonimmediate_operand" "")))]
!   "TARGET_32BIT"
    [(set (match_dup 0) (ashiftrt:SI (match_dup 1) (const_int 31)))]
  {
    rtx lo_part = gen_lowpart (SImode, operands[0]);
    machine_mode src_mode = GET_MODE (operands[1]);
  
!   if (src_mode == SImode)
!     emit_move_insn (lo_part, operands[1]);
!   else
!     emit_insn (gen_rtx_SET (lo_part,
! 			    gen_rtx_SIGN_EXTEND (SImode, operands[1])));
!   operands[1] = lo_part;
    operands[0] = gen_highpart (SImode, operands[0]);
  })
  
  (define_expand "zero_extendhisi2"
!   [(set (match_operand:SI 0 "s_register_operand")
! 	(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand")))]
    "TARGET_EITHER"
  {
    if (TARGET_ARM && !arm_arch4 && MEM_P (operands[1]))
***************
*** 5402,5409 ****
  )
  
  (define_expand "zero_extendqisi2"
!   [(set (match_operand:SI 0 "s_register_operand" "")
! 	(zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "")))]
    "TARGET_EITHER"
  {
    if (TARGET_ARM && !arm_arch6 && !MEM_P (operands[1]))
--- 5604,5611 ----
  )
  
  (define_expand "zero_extendqisi2"
!   [(set (match_operand:SI 0 "s_register_operand")
! 	(zero_extend:SI (match_operand:QI 1 "nonimmediate_operand")))]
    "TARGET_EITHER"
  {
    if (TARGET_ARM && !arm_arch6 && !MEM_P (operands[1]))
***************
*** 5524,5531 ****
  )
  
  (define_expand "extendhisi2"
!   [(set (match_operand:SI 0 "s_register_operand" "")
! 	(sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))]
    "TARGET_EITHER"
  {
    if (TARGET_THUMB1)
--- 5726,5733 ----
  )
  
  (define_expand "extendhisi2"
!   [(set (match_operand:SI 0 "s_register_operand")
! 	(sign_extend:SI (match_operand:HI 1 "nonimmediate_operand")))]
    "TARGET_EITHER"
  {
    if (TARGET_THUMB1)
***************
*** 5643,5651 ****
  
  (define_expand "extendqihi2"
    [(set (match_dup 2)
! 	(ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")
  		   (const_int 24)))
!    (set (match_operand:HI 0 "s_register_operand" "")
  	(ashiftrt:SI (match_dup 2)
  		     (const_int 24)))]
    "TARGET_ARM"
--- 5845,5853 ----
  
  (define_expand "extendqihi2"
    [(set (match_dup 2)
! 	(ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op")
  		   (const_int 24)))
!    (set (match_operand:HI 0 "s_register_operand")
  	(ashiftrt:SI (match_dup 2)
  		     (const_int 24)))]
    "TARGET_ARM"
***************
*** 5675,5682 ****
  )
  
  (define_expand "extendqisi2"
!   [(set (match_operand:SI 0 "s_register_operand" "")
! 	(sign_extend:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")))]
    "TARGET_EITHER"
  {
    if (!arm_arch4 && MEM_P (operands[1]))
--- 5877,5884 ----
  )
  
  (define_expand "extendqisi2"
!   [(set (match_operand:SI 0 "s_register_operand")
! 	(sign_extend:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op")))]
    "TARGET_EITHER"
  {
    if (!arm_arch4 && MEM_P (operands[1]))
***************
*** 5736,5744 ****
     (set_attr "predicable" "yes")]
  )
  
  (define_expand "extendsfdf2"
!   [(set (match_operand:DF                  0 "s_register_operand" "")
! 	(float_extend:DF (match_operand:SF 1 "s_register_operand"  "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    ""
  )
--- 5938,6093 ----
     (set_attr "predicable" "yes")]
  )
  
+ (define_insn "arm_<sup>xtb16"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(unspec:SI
+ 	  [(match_operand:SI 1 "s_register_operand" "r")] USXTB16))]
+   "TARGET_INT_SIMD"
+   "<sup>xtb16%?\\t%0, %1"
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "alu_dsp_reg")])
+ 
+ (define_insn "arm_<simd32_op>"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(unspec:SI
+ 	  [(match_operand:SI 1 "s_register_operand" "r")
+ 	   (match_operand:SI 2 "s_register_operand" "r")] SIMD32_NOGE_BINOP))]
+   "TARGET_INT_SIMD"
+   "<simd32_op>%?\\t%0, %1, %2"
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "alu_dsp_reg")])
+ 
+ (define_insn "arm_usada8"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(unspec:SI
+ 	  [(match_operand:SI 1 "s_register_operand" "r")
+ 	  (match_operand:SI 2 "s_register_operand" "r")
+ 	  (match_operand:SI 3 "s_register_operand" "r")] UNSPEC_USADA8))]
+   "TARGET_INT_SIMD"
+   "usada8%?\\t%0, %1, %2, %3"
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "alu_dsp_reg")])
+ 
+ (define_insn "arm_<simd32_op>"
+   [(set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI
+ 	  [(match_operand:SI 1 "s_register_operand" "r")
+ 	   (match_operand:SI 2 "s_register_operand" "r")
+ 	   (match_operand:DI 3 "s_register_operand" "0")] SIMD32_DIMODE))]
+   "TARGET_INT_SIMD"
+   "<simd32_op>%?\\t%Q0, %R0, %1, %2"
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "smlald")])
+ 
+ (define_insn "arm_<simd32_op>"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(unspec:SI
+ 	  [(match_operand:SI 1 "s_register_operand" "r")
+ 	   (match_operand:SI 2 "s_register_operand" "r")] SIMD32_GE))
+    (set (reg:CC APSRGE_REGNUM)
+ 	(unspec:CC [(reg:CC APSRGE_REGNUM)] UNSPEC_GE_SET))]
+   "TARGET_INT_SIMD"
+   "<simd32_op>%?\\t%0, %1, %2"
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "alu_sreg")])
+ 
+ (define_insn "arm_<simd32_op><add_clobber_q_name>_insn"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(unspec:SI
+ 	  [(match_operand:SI 1 "s_register_operand" "r")
+ 	   (match_operand:SI 2 "s_register_operand" "r")
+ 	   (match_operand:SI 3 "s_register_operand" "r")] SIMD32_TERNOP_Q))]
+   "TARGET_INT_SIMD && <add_clobber_q_pred>"
+   "<simd32_op>%?\\t%0, %1, %2, %3"
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "alu_sreg")])
+ 
+ (define_expand "arm_<simd32_op>"
+   [(set (match_operand:SI 0 "s_register_operand")
+ 	(unspec:SI
+ 	  [(match_operand:SI 1 "s_register_operand")
+ 	   (match_operand:SI 2 "s_register_operand")
+ 	   (match_operand:SI 3 "s_register_operand")] SIMD32_TERNOP_Q))]
+   "TARGET_INT_SIMD"
+   {
+     if (ARM_Q_BIT_READ)
+       emit_insn (gen_arm_<simd32_op>_setq_insn (operands[0], operands[1],
+ 						operands[2], operands[3]));
+     else
+       emit_insn (gen_arm_<simd32_op>_insn (operands[0], operands[1],
+ 					   operands[2], operands[3]));
+     DONE;
+   }
+ )
+ 
+ (define_insn "arm_<simd32_op><add_clobber_q_name>_insn"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(unspec:SI
+ 	  [(match_operand:SI 1 "s_register_operand" "r")
+ 	   (match_operand:SI 2 "s_register_operand" "r")] SIMD32_BINOP_Q))]
+   "TARGET_INT_SIMD && <add_clobber_q_pred>"
+   "<simd32_op>%?\\t%0, %1, %2"
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "alu_sreg")])
+ 
+ (define_expand "arm_<simd32_op>"
+   [(set (match_operand:SI 0 "s_register_operand")
+ 	(unspec:SI
+ 	  [(match_operand:SI 1 "s_register_operand")
+ 	   (match_operand:SI 2 "s_register_operand")] SIMD32_BINOP_Q))]
+   "TARGET_INT_SIMD"
+   {
+     if (ARM_Q_BIT_READ)
+       emit_insn (gen_arm_<simd32_op>_setq_insn (operands[0], operands[1],
+ 						operands[2]));
+     else
+       emit_insn (gen_arm_<simd32_op>_insn (operands[0], operands[1],
+ 					   operands[2]));
+     DONE;
+   }
+ )
+ 
+ (define_insn "arm_<simd32_op><add_clobber_q_name>_insn"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(unspec:SI
+ 	  [(match_operand:SI 1 "s_register_operand" "r")
+ 	   (match_operand:SI 2 "<sup>sat16_imm" "i")] USSAT16))]
+   "TARGET_INT_SIMD && <add_clobber_q_pred>"
+   "<simd32_op>%?\\t%0, %2, %1"
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "alu_sreg")])
+ 
+ (define_expand "arm_<simd32_op>"
+   [(set (match_operand:SI 0 "s_register_operand")
+ 	(unspec:SI
+ 	  [(match_operand:SI 1 "s_register_operand")
+ 	   (match_operand:SI 2 "<sup>sat16_imm")] USSAT16))]
+   "TARGET_INT_SIMD"
+   {
+     if (ARM_Q_BIT_READ)
+       emit_insn (gen_arm_<simd32_op>_setq_insn (operands[0], operands[1],
+ 						operands[2]));
+     else
+       emit_insn (gen_arm_<simd32_op>_insn (operands[0], operands[1],
+ 					   operands[2]));
+     DONE;
+   }
+ )
+ 
+ (define_insn "arm_sel"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(unspec:SI
+ 	  [(match_operand:SI 1 "s_register_operand" "r")
+ 	   (match_operand:SI 2 "s_register_operand" "r")
+ 	   (reg:CC APSRGE_REGNUM)] UNSPEC_SEL))]
+   "TARGET_INT_SIMD"
+   "sel%?\\t%0, %1, %2"
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "alu_sreg")])
+ 
  (define_expand "extendsfdf2"
!   [(set (match_operand:DF                  0 "s_register_operand")
! 	(float_extend:DF (match_operand:SF 1 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    ""
  )
***************
*** 5749,5756 ****
  ;; This is always safe for an extend.
  
  (define_expand "extendhfdf2"
!   [(set (match_operand:DF		   0 "s_register_operand" "")
! 	(float_extend:DF (match_operand:HF 1 "s_register_operand" "")))]
    "TARGET_EITHER"
  {
    /* We don't have a direct instruction for this, so go via SFmode.  */
--- 6098,6105 ----
  ;; This is always safe for an extend.
  
  (define_expand "extendhfdf2"
!   [(set (match_operand:DF		   0 "s_register_operand")
! 	(float_extend:DF (match_operand:HF 1 "s_register_operand")))]
    "TARGET_EITHER"
  {
    /* We don't have a direct instruction for this, so go via SFmode.  */
***************
*** 5773,5790 ****
  ;; I don't think these are a good idea on the arm, there just aren't enough
  ;; registers
  ;;(define_expand "loadti"
! ;;  [(set (match_operand:TI 0 "s_register_operand" "")
! ;;	(mem:TI (match_operand:SI 1 "address_operand" "")))]
  ;;  "" "")
  
  ;;(define_expand "storeti"
! ;;  [(set (mem:TI (match_operand:TI 0 "address_operand" ""))
! ;;	(match_operand:TI 1 "s_register_operand" ""))]
  ;;  "" "")
  
  ;;(define_expand "movti"
! ;;  [(set (match_operand:TI 0 "general_operand" "")
! ;;	(match_operand:TI 1 "general_operand" ""))]
  ;;  ""
  ;;  "
  ;;{
--- 6122,6139 ----
  ;; I don't think these are a good idea on the arm, there just aren't enough
  ;; registers
  ;;(define_expand "loadti"
! ;;  [(set (match_operand:TI 0 "s_register_operand")
! ;;	(mem:TI (match_operand:SI 1 "address_operand")))]
  ;;  "" "")
  
  ;;(define_expand "storeti"
! ;;  [(set (mem:TI (match_operand:TI 0 "address_operand"))
! ;;	(match_operand:TI 1 "s_register_operand"))]
  ;;  "" "")
  
  ;;(define_expand "movti"
! ;;  [(set (match_operand:TI 0 "general_operand")
! ;;	(match_operand:TI 1 "general_operand"))]
  ;;  ""
  ;;  "
  ;;{
***************
*** 5829,5838 ****
  ;;  }")
  
  (define_expand "movdi"
!   [(set (match_operand:DI 0 "general_operand" "")
! 	(match_operand:DI 1 "general_operand" ""))]
    "TARGET_EITHER"
    "
    if (can_create_pseudo_p ())
      {
        if (!REG_P (operands[0]))
--- 6178,6189 ----
  ;;  }")
  
  (define_expand "movdi"
!   [(set (match_operand:DI 0 "general_operand")
! 	(match_operand:DI 1 "general_operand"))]
    "TARGET_EITHER"
    "
+   gcc_checking_assert (aligned_operand (operands[0], DImode));
+   gcc_checking_assert (aligned_operand (operands[1], DImode));
    if (can_create_pseudo_p ())
      {
        if (!REG_P (operands[0]))
***************
*** 5882,5887 ****
--- 6233,6239 ----
  	(match_operand:DI 1 "di_operand"              "rDa,Db,Dc,mi,r"))]
    "TARGET_32BIT
     && !(TARGET_HARD_FLOAT)
+    && !(TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT)
     && !TARGET_IWMMXT
     && (   register_operand (operands[0], DImode)
         || register_operand (operands[1], DImode))"
***************
*** 5956,5963 ****
  )
  
  (define_split
!   [(set (match_operand:ANY64 0 "arm_general_register_operand" "")
! 	(match_operand:ANY64 1 "arm_general_register_operand" ""))]
    "TARGET_EITHER && reload_completed"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2) (match_dup 3))]
--- 6308,6315 ----
  )
  
  (define_split
!   [(set (match_operand:ANY64_BF 0 "arm_general_register_operand" "")
! 	(match_operand:ANY64_BF 1 "arm_general_register_operand" ""))]
    "TARGET_EITHER && reload_completed"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2) (match_dup 3))]
***************
*** 6002,6014 ****
  )
  
  (define_expand "movsi"
!   [(set (match_operand:SI 0 "general_operand" "")
!         (match_operand:SI 1 "general_operand" ""))]
    "TARGET_EITHER"
    "
    {
    rtx base, offset, tmp;
  
    if (TARGET_32BIT || TARGET_HAVE_MOVT)
      {
        /* Everything except mem = const or mem = mem can be done easily.  */
--- 6354,6368 ----
  )
  
  (define_expand "movsi"
!   [(set (match_operand:SI 0 "general_operand")
!         (match_operand:SI 1 "general_operand"))]
    "TARGET_EITHER"
    "
    {
    rtx base, offset, tmp;
  
+   gcc_checking_assert (aligned_operand (operands[0], SImode));
+   gcc_checking_assert (aligned_operand (operands[1], SImode));
    if (TARGET_32BIT || TARGET_HAVE_MOVT)
      {
        /* Everything except mem = const or mem = mem can be done easily.  */
***************
*** 6193,6200 ****
  ;;
  ;; Note: Update arm.c: legitimize_pic_address() when changing this pattern.
  (define_expand "calculate_pic_address"
!   [(set (match_operand:SI 0 "register_operand" "")
! 	(mem:SI (plus:SI (match_operand:SI 1 "register_operand" "")
  			 (unspec:SI [(match_operand:SI 2 "" "")]
  				    UNSPEC_PIC_SYM))))]
    "flag_pic"
--- 6547,6554 ----
  ;;
  ;; Note: Update arm.c: legitimize_pic_address() when changing this pattern.
  (define_expand "calculate_pic_address"
!   [(set (match_operand:SI 0 "register_operand")
! 	(mem:SI (plus:SI (match_operand:SI 1 "register_operand")
  			 (unspec:SI [(match_operand:SI 2 "" "")]
  				    UNSPEC_PIC_SYM))))]
    "flag_pic"
***************
*** 6362,6377 ****
  
  (define_insn "*movsi_compare0"
    [(set (reg:CC CC_REGNUM)
! 	(compare:CC (match_operand:SI 1 "s_register_operand" "0,r")
  		    (const_int 0)))
!    (set (match_operand:SI 0 "s_register_operand" "=r,r")
  	(match_dup 1))]
    "TARGET_32BIT"
    "@
     cmp%?\\t%0, #0
     subs%?\\t%0, %1, #0"
    [(set_attr "conds" "set")
!    (set_attr "type" "alus_imm,alus_imm")]
  )
  
  ;; Subroutine to store a half word from a register into memory.
--- 6716,6736 ----
  
  (define_insn "*movsi_compare0"
    [(set (reg:CC CC_REGNUM)
! 	(compare:CC (match_operand:SI 1 "s_register_operand" "0,0,l,rk,rk")
  		    (const_int 0)))
!    (set (match_operand:SI 0 "s_register_operand" "=l,rk,l,r,rk")
  	(match_dup 1))]
    "TARGET_32BIT"
    "@
     cmp%?\\t%0, #0
+    cmp%?\\t%0, #0
+    subs%?\\t%0, %1, #0
+    subs%?\\t%0, %1, #0
     subs%?\\t%0, %1, #0"
    [(set_attr "conds" "set")
!    (set_attr "arch" "t2,*,t2,t2,a")
!    (set_attr "type" "alus_imm")
!    (set_attr "length" "2,4,2,4,4")]
  )
  
  ;; Subroutine to store a half word from a register into memory.
***************
*** 6484,6491 ****
  )
  
  (define_expand "storehi_single_op"
!   [(set (match_operand:HI 0 "memory_operand" "")
! 	(match_operand:HI 1 "general_operand" ""))]
    "TARGET_32BIT && arm_arch4"
    "
    if (!s_register_operand (operands[1], HImode))
--- 6843,6850 ----
  )
  
  (define_expand "storehi_single_op"
!   [(set (match_operand:HI 0 "memory_operand")
! 	(match_operand:HI 1 "general_operand"))]
    "TARGET_32BIT && arm_arch4"
    "
    if (!s_register_operand (operands[1], HImode))
***************
*** 6494,6503 ****
  )
  
  (define_expand "movhi"
!   [(set (match_operand:HI 0 "general_operand" "")
! 	(match_operand:HI 1 "general_operand" ""))]
    "TARGET_EITHER"
    "
    if (TARGET_ARM)
      {
        if (can_create_pseudo_p ())
--- 6853,6864 ----
  )
  
  (define_expand "movhi"
!   [(set (match_operand:HI 0 "general_operand")
! 	(match_operand:HI 1 "general_operand"))]
    "TARGET_EITHER"
    "
+   gcc_checking_assert (aligned_operand (operands[0], HImode));
+   gcc_checking_assert (aligned_operand (operands[1], HImode));
    if (TARGET_ARM)
      {
        if (can_create_pseudo_p ())
***************
*** 6719,6729 ****
  
  (define_expand "movhi_bigend"
    [(set (match_dup 2)
! 	(rotate:SI (subreg:SI (match_operand:HI 1 "memory_operand" "") 0)
  		   (const_int 16)))
     (set (match_dup 3)
  	(ashiftrt:SI (match_dup 2) (const_int 16)))
!    (set (match_operand:HI 0 "s_register_operand" "")
  	(match_dup 4))]
    "TARGET_ARM"
    "
--- 7080,7090 ----
  
  (define_expand "movhi_bigend"
    [(set (match_dup 2)
! 	(rotate:SI (subreg:SI (match_operand:HI 1 "memory_operand") 0)
  		   (const_int 16)))
     (set (match_dup 3)
  	(ashiftrt:SI (match_dup 2) (const_int 16)))
!    (set (match_operand:HI 0 "s_register_operand")
  	(match_dup 4))]
    "TARGET_ARM"
    "
***************
*** 6776,6781 ****
--- 7137,7144 ----
  ;; We use a DImode scratch because we may occasionally need an additional
  ;; temporary if the address isn't offsettable -- push_reload doesn't seem
  ;; to take any notice of the "o" constraints on reload_memory_operand operand.
+ ;; The reload_in<m> and reload_out<m> patterns require special constraints
+ ;; to be correctly handled in default_secondary_reload function.
  (define_expand "reload_outhi"
    [(parallel [(match_operand:HI 0 "arm_reload_memory_operand" "=o")
  	      (match_operand:HI 1 "s_register_operand"        "r")
***************
*** 6803,6810 ****
  ")
  
  (define_expand "movqi"
!   [(set (match_operand:QI 0 "general_operand" "")
!         (match_operand:QI 1 "general_operand" ""))]
    "TARGET_EITHER"
    "
    /* Everything except mem = const or mem = mem can be done easily */
--- 7166,7173 ----
  ")
  
  (define_expand "movqi"
!   [(set (match_operand:QI 0 "general_operand")
!         (match_operand:QI 1 "general_operand"))]
    "TARGET_EITHER"
    "
    /* Everything except mem = const or mem = mem can be done easily */
***************
*** 6899,6948 ****
     (set_attr "length" "2,4,4,2,4,2,2,4,4")]
  )
  
! ;; HFmode moves
! (define_expand "movhf"
!   [(set (match_operand:HF 0 "general_operand" "")
! 	(match_operand:HF 1 "general_operand" ""))]
    "TARGET_EITHER"
    "
    if (TARGET_32BIT)
      {
        if (MEM_P (operands[0]))
!         operands[1] = force_reg (HFmode, operands[1]);
      }
    else /* TARGET_THUMB1 */
      {
        if (can_create_pseudo_p ())
          {
             if (!REG_P (operands[0]))
! 	     operands[1] = force_reg (HFmode, operands[1]);
          }
      }
    "
  )
  
! (define_insn "*arm32_movhf"
!   [(set (match_operand:HF 0 "nonimmediate_operand" "=r,m,r,r")
! 	(match_operand:HF 1 "general_operand"	   " m,r,r,F"))]
    "TARGET_32BIT && !TARGET_HARD_FLOAT
!    && (	  s_register_operand (operands[0], HFmode)
!        || s_register_operand (operands[1], HFmode))"
    "*
    switch (which_alternative)
      {
      case 0:	/* ARM register from memory */
!       return \"ldrh%?\\t%0, %1\\t%@ __fp16\";
      case 1:	/* memory from ARM register */
!       return \"strh%?\\t%1, %0\\t%@ __fp16\";
      case 2:	/* ARM register from ARM register */
!       return \"mov%?\\t%0, %1\\t%@ __fp16\";
      case 3:	/* ARM register from constant */
        {
  	long bits;
  	rtx ops[4];
  
  	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
! 			       HFmode);
  	ops[0] = operands[0];
  	ops[1] = GEN_INT (bits);
  	ops[2] = GEN_INT (bits & 0xff00);
--- 7262,7313 ----
     (set_attr "length" "2,4,4,2,4,2,2,4,4")]
  )
  
! ;; HFmode and BFmode moves.
! (define_expand "mov<mode>"
!   [(set (match_operand:HFBF 0 "general_operand")
! 	(match_operand:HFBF 1 "general_operand"))]
    "TARGET_EITHER"
    "
+   gcc_checking_assert (aligned_operand (operands[0], <MODE>mode));
+   gcc_checking_assert (aligned_operand (operands[1], <MODE>mode));
    if (TARGET_32BIT)
      {
        if (MEM_P (operands[0]))
! 	operands[1] = force_reg (<MODE>mode, operands[1]);
      }
    else /* TARGET_THUMB1 */
      {
        if (can_create_pseudo_p ())
          {
             if (!REG_P (operands[0]))
! 	     operands[1] = force_reg (<MODE>mode, operands[1]);
          }
      }
    "
  )
  
! (define_insn "*arm32_mov<mode>"
!   [(set (match_operand:HFBF 0 "nonimmediate_operand" "=r,m,r,r")
! 	(match_operand:HFBF 1 "general_operand"	   " m,r,r,F"))]
    "TARGET_32BIT && !TARGET_HARD_FLOAT
!    && (	  s_register_operand (operands[0], <MODE>mode)
!        || s_register_operand (operands[1], <MODE>mode))"
    "*
    switch (which_alternative)
      {
      case 0:	/* ARM register from memory */
!       return \"ldrh%?\\t%0, %1\\t%@ __<fporbf>\";
      case 1:	/* memory from ARM register */
!       return \"strh%?\\t%1, %0\\t%@ __<fporbf>\";
      case 2:	/* ARM register from ARM register */
!       return \"mov%?\\t%0, %1\\t%@ __<fporbf>\";
      case 3:	/* ARM register from constant */
        {
  	long bits;
  	rtx ops[4];
  
  	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
! 			       <MODE>mode);
  	ops[0] = operands[0];
  	ops[1] = GEN_INT (bits);
  	ops[2] = GEN_INT (bits & 0xff00);
***************
*** 6965,6974 ****
  )
  
  (define_expand "movsf"
!   [(set (match_operand:SF 0 "general_operand" "")
! 	(match_operand:SF 1 "general_operand" ""))]
    "TARGET_EITHER"
    "
    if (TARGET_32BIT)
      {
        if (MEM_P (operands[0]))
--- 7330,7341 ----
  )
  
  (define_expand "movsf"
!   [(set (match_operand:SF 0 "general_operand")
! 	(match_operand:SF 1 "general_operand"))]
    "TARGET_EITHER"
    "
+   gcc_checking_assert (aligned_operand (operands[0], SFmode));
+   gcc_checking_assert (aligned_operand (operands[1], SFmode));
    if (TARGET_32BIT)
      {
        if (MEM_P (operands[0]))
***************
*** 7020,7026 ****
    [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,m")
  	(match_operand:SF 1 "general_operand"  "r,mE,r"))]
    "TARGET_32BIT
!    && TARGET_SOFT_FLOAT
     && (!MEM_P (operands[0])
         || register_operand (operands[1], SFmode))"
  {
--- 7387,7393 ----
    [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,m")
  	(match_operand:SF 1 "general_operand"  "r,mE,r"))]
    "TARGET_32BIT
!    && TARGET_SOFT_FLOAT && !TARGET_HAVE_MVE
     && (!MEM_P (operands[0])
         || register_operand (operands[1], SFmode))"
  {
***************
*** 7060,7069 ****
  )
  
  (define_expand "movdf"
!   [(set (match_operand:DF 0 "general_operand" "")
! 	(match_operand:DF 1 "general_operand" ""))]
    "TARGET_EITHER"
    "
    if (TARGET_32BIT)
      {
        if (MEM_P (operands[0]))
--- 7427,7438 ----
  )
  
  (define_expand "movdf"
!   [(set (match_operand:DF 0 "general_operand")
! 	(match_operand:DF 1 "general_operand"))]
    "TARGET_EITHER"
    "
+   gcc_checking_assert (aligned_operand (operands[0], DFmode));
+   gcc_checking_assert (aligned_operand (operands[1], DFmode));
    if (TARGET_32BIT)
      {
        if (MEM_P (operands[0]))
***************
*** 7097,7102 ****
--- 7466,7472 ----
  
  ;; Reloading a df mode value stored in integer regs to memory can require a
  ;; scratch reg.
+ ;; Another reload_out<m> pattern that requires special constraints.
  (define_expand "reload_outdf"
    [(match_operand:DF 0 "arm_reload_memory_operand" "=o")
     (match_operand:DF 1 "s_register_operand" "r")
***************
*** 7140,7147 ****
  
  (define_insn "*movdf_soft_insn"
    [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=r,r,r,r,m")
! 	(match_operand:DF 1 "soft_df_operand" "rDa,Db,Dc,mF,r"))]
!   "TARGET_32BIT && TARGET_SOFT_FLOAT
     && (   register_operand (operands[0], DFmode)
         || register_operand (operands[1], DFmode))"
    "*
--- 7510,7517 ----
  
  (define_insn "*movdf_soft_insn"
    [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=r,r,r,r,m")
!        (match_operand:DF 1 "soft_df_operand" "rDa,Db,Dc,mF,r"))]
!   "TARGET_32BIT && TARGET_SOFT_FLOAT && !TARGET_HAVE_MVE
     && (   register_operand (operands[0], DFmode)
         || register_operand (operands[1], DFmode))"
    "*
***************
*** 7243,7252 ****
  
  
  (define_expand "setmemsi"
!   [(match_operand:BLK 0 "general_operand" "")
!    (match_operand:SI 1 "const_int_operand" "")
!    (match_operand:SI 2 "const_int_operand" "")
!    (match_operand:SI 3 "const_int_operand" "")]
    "TARGET_32BIT"
  {
    if (arm_gen_setmem (operands))
--- 7613,7622 ----
  
  
  (define_expand "setmemsi"
!   [(match_operand:BLK 0 "general_operand")
!    (match_operand:SI 1 "const_int_operand")
!    (match_operand:SI 2 "const_int_operand")
!    (match_operand:SI 3 "const_int_operand")]
    "TARGET_32BIT"
  {
    if (arm_gen_setmem (operands))
***************
*** 7260,7270 ****
  ;; We could let this apply for blocks of less than this, but it clobbers so
  ;; many registers that there is then probably a better way.
  
! (define_expand "movmemqi"
!   [(match_operand:BLK 0 "general_operand" "")
!    (match_operand:BLK 1 "general_operand" "")
!    (match_operand:SI 2 "const_int_operand" "")
!    (match_operand:SI 3 "const_int_operand" "")]
    ""
    "
    if (TARGET_32BIT)
--- 7630,7640 ----
  ;; We could let this apply for blocks of less than this, but it clobbers so
  ;; many registers that there is then probably a better way.
  
! (define_expand "cpymemqi"
!   [(match_operand:BLK 0 "general_operand")
!    (match_operand:BLK 1 "general_operand")
!    (match_operand:SI 2 "const_int_operand")
!    (match_operand:SI 3 "const_int_operand")]
    ""
    "
    if (TARGET_32BIT)
***************
*** 7272,7283 ****
        if (TARGET_LDRD && current_tune->prefer_ldrd_strd
            && !optimize_function_for_size_p (cfun))
          {
!           if (gen_movmem_ldrd_strd (operands))
              DONE;
            FAIL;
          }
  
!       if (arm_gen_movmemqi (operands))
          DONE;
        FAIL;
      }
--- 7642,7653 ----
        if (TARGET_LDRD && current_tune->prefer_ldrd_strd
            && !optimize_function_for_size_p (cfun))
          {
!           if (gen_cpymem_ldrd_strd (operands))
              DONE;
            FAIL;
          }
  
!       if (arm_gen_cpymemqi (operands))
          DONE;
        FAIL;
      }
***************
*** 7287,7293 ****
            || INTVAL (operands[2]) > 48)
          FAIL;
  
!       thumb_expand_movmemqi (operands);
        DONE;
      }
    "
--- 7657,7663 ----
            || INTVAL (operands[2]) > 48)
          FAIL;
  
!       thumb_expand_cpymemqi (operands);
        DONE;
      }
    "
***************
*** 7308,7321 ****
  ;; And for backward branches we have 
  ;;   (neg_range - neg_base_offs + pc_offs) = (neg_range - (-2 or -4) + 4).
  ;;
  ;; For a 'b'       pos_range = 2046, neg_range = -2048 giving (-2040->2048).
  ;; For a 'b<cond>' pos_range = 254,  neg_range = -256  giving (-250 ->256).
  
  (define_expand "cbranchsi4"
    [(set (pc) (if_then_else
  	      (match_operator 0 "expandable_comparison_operator"
! 	       [(match_operand:SI 1 "s_register_operand" "")
! 	        (match_operand:SI 2 "nonmemory_operand" "")])
  	      (label_ref (match_operand 3 "" ""))
  	      (pc)))]
    "TARGET_EITHER"
--- 7678,7697 ----
  ;; And for backward branches we have 
  ;;   (neg_range - neg_base_offs + pc_offs) = (neg_range - (-2 or -4) + 4).
  ;;
+ ;; In 16-bit Thumb these ranges are:
  ;; For a 'b'       pos_range = 2046, neg_range = -2048 giving (-2040->2048).
  ;; For a 'b<cond>' pos_range = 254,  neg_range = -256  giving (-250 ->256).
  
+ ;; In 32-bit Thumb these ranges are:
+ ;; For a 'b'       +/- 16MB is not checked for.
+ ;; For a 'b<cond>' pos_range = 1048574,  neg_range = -1048576  giving
+ ;; (-1048568 -> 1048576).
+ 
  (define_expand "cbranchsi4"
    [(set (pc) (if_then_else
  	      (match_operator 0 "expandable_comparison_operator"
! 	       [(match_operand:SI 1 "s_register_operand")
! 	        (match_operand:SI 2 "nonmemory_operand")])
  	      (label_ref (match_operand 3 "" ""))
  	      (pc)))]
    "TARGET_EITHER"
***************
*** 7341,7348 ****
  (define_expand "cbranchsf4"
    [(set (pc) (if_then_else
  	      (match_operator 0 "expandable_comparison_operator"
! 	       [(match_operand:SF 1 "s_register_operand" "")
! 	        (match_operand:SF 2 "vfp_compare_operand" "")])
  	      (label_ref (match_operand 3 "" ""))
  	      (pc)))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
--- 7717,7724 ----
  (define_expand "cbranchsf4"
    [(set (pc) (if_then_else
  	      (match_operator 0 "expandable_comparison_operator"
! 	       [(match_operand:SF 1 "s_register_operand")
! 	        (match_operand:SF 2 "vfp_compare_operand")])
  	      (label_ref (match_operand 3 "" ""))
  	      (pc)))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
***************
*** 7353,7360 ****
  (define_expand "cbranchdf4"
    [(set (pc) (if_then_else
  	      (match_operator 0 "expandable_comparison_operator"
! 	       [(match_operand:DF 1 "s_register_operand" "")
! 	        (match_operand:DF 2 "vfp_compare_operand" "")])
  	      (label_ref (match_operand 3 "" ""))
  	      (pc)))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
--- 7729,7736 ----
  (define_expand "cbranchdf4"
    [(set (pc) (if_then_else
  	      (match_operator 0 "expandable_comparison_operator"
! 	       [(match_operand:DF 1 "s_register_operand")
! 	        (match_operand:DF 2 "vfp_compare_operand")])
  	      (label_ref (match_operand 3 "" ""))
  	      (pc)))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
***************
*** 7365,7372 ****
  (define_expand "cbranchdi4"
    [(set (pc) (if_then_else
  	      (match_operator 0 "expandable_comparison_operator"
! 	       [(match_operand:DI 1 "s_register_operand" "")
! 	        (match_operand:DI 2 "cmpdi_operand" "")])
  	      (label_ref (match_operand 3 "" ""))
  	      (pc)))]
    "TARGET_32BIT"
--- 7741,7748 ----
  (define_expand "cbranchdi4"
    [(set (pc) (if_then_else
  	      (match_operator 0 "expandable_comparison_operator"
! 	       [(match_operand:DI 1 "s_register_operand")
! 	        (match_operand:DI 2 "reg_or_int_operand")])
  	      (label_ref (match_operand 3 "" ""))
  	      (pc)))]
    "TARGET_32BIT"
***************
*** 7402,7532 ****
  
  (define_insn "*cmpsi_shiftsi"
    [(set (reg:CC CC_REGNUM)
! 	(compare:CC (match_operand:SI   0 "s_register_operand" "r,r,r")
  		    (match_operator:SI  3 "shift_operator"
! 		     [(match_operand:SI 1 "s_register_operand" "r,r,r")
! 		      (match_operand:SI 2 "shift_amount_operand" "M,r,M")])))]
    "TARGET_32BIT"
    "cmp\\t%0, %1%S3"
    [(set_attr "conds" "set")
     (set_attr "shift" "1")
!    (set_attr "arch" "32,a,a")
!    (set_attr "type" "alus_shift_imm,alus_shift_reg,alus_shift_imm")])
  
  (define_insn "*cmpsi_shiftsi_swp"
    [(set (reg:CC_SWP CC_REGNUM)
  	(compare:CC_SWP (match_operator:SI 3 "shift_operator"
! 			 [(match_operand:SI 1 "s_register_operand" "r,r,r")
! 			  (match_operand:SI 2 "shift_amount_operand" "M,r,M")])
! 			(match_operand:SI 0 "s_register_operand" "r,r,r")))]
    "TARGET_32BIT"
    "cmp%?\\t%0, %1%S3"
    [(set_attr "conds" "set")
     (set_attr "shift" "1")
!    (set_attr "arch" "32,a,a")
!    (set_attr "type" "alus_shift_imm,alus_shift_reg,alus_shift_imm")])
  
  (define_insn "*arm_cmpsi_negshiftsi_si"
    [(set (reg:CC_Z CC_REGNUM)
  	(compare:CC_Z
  	 (neg:SI (match_operator:SI 1 "shift_operator"
! 		    [(match_operand:SI 2 "s_register_operand" "r")
! 		     (match_operand:SI 3 "reg_or_int_operand" "rM")]))
! 	 (match_operand:SI 0 "s_register_operand" "r")))]
!   "TARGET_ARM"
    "cmn%?\\t%0, %2%S1"
    [(set_attr "conds" "set")
!    (set (attr "type") (if_then_else (match_operand 3 "const_int_operand" "")
! 				    (const_string "alus_shift_imm")
! 				    (const_string "alus_shift_reg")))
     (set_attr "predicable" "yes")]
  )
  
- ;; DImode comparisons.  The generic code generates branches that
- ;; if-conversion cannot reduce to a conditional compare, so we do
- ;; that directly.
- 
- (define_insn_and_split "*arm_cmpdi_insn"
-   [(set (reg:CC_NCV CC_REGNUM)
- 	(compare:CC_NCV (match_operand:DI 0 "s_register_operand" "r")
- 			(match_operand:DI 1 "arm_di_operand"	   "rDi")))
-    (clobber (match_scratch:SI 2 "=r"))]
-   "TARGET_32BIT"
-   "#"   ; "cmp\\t%Q0, %Q1\;sbcs\\t%2, %R0, %R1"
-   "&& reload_completed"
-   [(set (reg:CC CC_REGNUM)
- 	(compare:CC (match_dup 0) (match_dup 1)))
-    (parallel [(set (reg:CC CC_REGNUM)
- 		   (compare:CC (match_dup 3) (match_dup 4)))
- 	      (set (match_dup 2)
- 		   (minus:SI (match_dup 5)
- 			     (ltu:SI (reg:CC CC_REGNUM) (const_int 0))))])]
-   {
-     operands[3] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-     if (CONST_INT_P (operands[1]))
-       {
- 	operands[4] = gen_highpart_mode (SImode, DImode, operands[1]);
- 	if (operands[4] == const0_rtx)
- 	  operands[5] = operands[3];
- 	else
- 	  operands[5] = gen_rtx_PLUS (SImode, operands[3],
- 				      gen_int_mode (-UINTVAL (operands[4]),
- 						    SImode));
-       }
-     else
-       {
-         operands[4] = gen_highpart (SImode, operands[1]);
-         operands[5] = gen_rtx_MINUS (SImode, operands[3], operands[4]);
-       }
-     operands[1] = gen_lowpart (SImode, operands[1]);
-     operands[2] = gen_lowpart (SImode, operands[2]);
-   }
-   [(set_attr "conds" "set")
-    (set_attr "length" "8")
-    (set_attr "type" "multiple")]
- )
- 
- (define_insn_and_split "*arm_cmpdi_unsigned"
-   [(set (reg:CC_CZ CC_REGNUM)
-         (compare:CC_CZ (match_operand:DI 0 "s_register_operand" "l,r,r,r")
-                        (match_operand:DI 1 "arm_di_operand"     "Py,r,Di,rDi")))]
- 
-   "TARGET_32BIT"
-   "#"   ; "cmp\\t%R0, %R1\;it eq\;cmpeq\\t%Q0, %Q1"
-   "&& reload_completed"
-   [(set (reg:CC CC_REGNUM)
-         (compare:CC (match_dup 2) (match_dup 3)))
-    (cond_exec (eq:SI (reg:CC CC_REGNUM) (const_int 0))
-               (set (reg:CC CC_REGNUM)
-                    (compare:CC (match_dup 0) (match_dup 1))))]
-   {
-     operands[2] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-     if (CONST_INT_P (operands[1]))
-       operands[3] = gen_highpart_mode (SImode, DImode, operands[1]);
-     else
-       operands[3] = gen_highpart (SImode, operands[1]);
-     operands[1] = gen_lowpart (SImode, operands[1]);
-   }
-   [(set_attr "conds" "set")
-    (set_attr "enabled_for_short_it" "yes,yes,no,*")
-    (set_attr "arch" "t2,t2,t2,a")
-    (set_attr "length" "6,6,10,8")
-    (set_attr "type" "multiple")]
- )
- 
- (define_insn "*arm_cmpdi_zero"
-   [(set (reg:CC_Z CC_REGNUM)
- 	(compare:CC_Z (match_operand:DI 0 "s_register_operand" "r")
- 		      (const_int 0)))
-    (clobber (match_scratch:SI 1 "=r"))]
-   "TARGET_32BIT"
-   "orrs%?\\t%1, %Q0, %R0"
-   [(set_attr "conds" "set")
-    (set_attr "type" "logics_reg")]
- )
- 
  ; This insn allows redundant compares to be removed by cse, nothing should
  ; ever appear in the output file since (set (reg x) (reg x)) is a no-op that
  ; is deleted later on. The match_dup will match the mode here, so that
--- 7778,7823 ----
  
  (define_insn "*cmpsi_shiftsi"
    [(set (reg:CC CC_REGNUM)
! 	(compare:CC (match_operand:SI   0 "s_register_operand" "r,r")
  		    (match_operator:SI  3 "shift_operator"
! 		     [(match_operand:SI 1 "s_register_operand" "r,r")
! 		      (match_operand:SI 2 "shift_amount_operand" "M,r")])))]
    "TARGET_32BIT"
    "cmp\\t%0, %1%S3"
    [(set_attr "conds" "set")
     (set_attr "shift" "1")
!    (set_attr "arch" "32,a")
!    (set_attr "type" "alus_shift_imm,alus_shift_reg")])
  
  (define_insn "*cmpsi_shiftsi_swp"
    [(set (reg:CC_SWP CC_REGNUM)
  	(compare:CC_SWP (match_operator:SI 3 "shift_operator"
! 			 [(match_operand:SI 1 "s_register_operand" "r,r")
! 			  (match_operand:SI 2 "shift_amount_operand" "M,r")])
! 			(match_operand:SI 0 "s_register_operand" "r,r")))]
    "TARGET_32BIT"
    "cmp%?\\t%0, %1%S3"
    [(set_attr "conds" "set")
     (set_attr "shift" "1")
!    (set_attr "arch" "32,a")
!    (set_attr "type" "alus_shift_imm,alus_shift_reg")])
  
  (define_insn "*arm_cmpsi_negshiftsi_si"
    [(set (reg:CC_Z CC_REGNUM)
  	(compare:CC_Z
  	 (neg:SI (match_operator:SI 1 "shift_operator"
! 		    [(match_operand:SI 2 "s_register_operand" "r,r")
! 		     (match_operand:SI 3 "shift_amount_operand" "M,r")]))
! 	 (match_operand:SI 0 "s_register_operand" "r,r")))]
!   "TARGET_32BIT"
    "cmn%?\\t%0, %2%S1"
    [(set_attr "conds" "set")
!    (set_attr "arch" "32,a")
!    (set_attr "shift" "2")
!    (set_attr "type" "alus_shift_imm,alus_shift_reg")
     (set_attr "predicable" "yes")]
  )
  
  ; This insn allows redundant compares to be removed by cse, nothing should
  ; ever appear in the output file since (set (reg x) (reg x)) is a no-op that
  ; is deleted later on. The match_dup will match the mode here, so that
***************
*** 7568,7590 ****
  		      (label_ref (match_operand 0 "" ""))
  		      (pc)))]
    "TARGET_32BIT"
!   "*
!   if (arm_ccfsm_state == 1 || arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
!       return \"\";
      }
!   return \"b%d1\\t%l0\";
!   "
    [(set_attr "conds" "use")
     (set_attr "type" "branch")
     (set (attr "length")
! 	(if_then_else
! 	   (and (match_test "TARGET_THUMB2")
! 		(and (ge (minus (match_dup 0) (pc)) (const_int -250))
! 		     (le (minus (match_dup 0) (pc)) (const_int 256))))
! 	   (const_int 2)
! 	   (const_int 4)))]
  )
  
  (define_insn "*arm_cond_branch_reversed"
--- 7859,7908 ----
  		      (label_ref (match_operand 0 "" ""))
  		      (pc)))]
    "TARGET_32BIT"
!   {
!     if (arm_ccfsm_state == 1 || arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
!       return "";
      }
!     switch (get_attr_length (insn))
!       {
! 	case 2: /* Thumb2 16-bit b{cond}.  */
! 	case 4: /* Thumb2 32-bit b{cond} or A32 b{cond}.  */
! 	  return "b%d1\t%l0";
! 	  break;
! 
! 	/* Thumb2 b{cond} out of range.  Use 16-bit b{cond} and
! 	   unconditional branch b.  */
! 	default: return arm_gen_far_branch (operands, 0, "Lbcond", "b%D1\t");
!       }
!   }
    [(set_attr "conds" "use")
     (set_attr "type" "branch")
     (set (attr "length")
!     (if_then_else (match_test "!TARGET_THUMB2")
! 
!       ;;Target is not Thumb2, therefore is A32.  Generate b{cond}.
!       (const_int 4)
! 
!       ;; Check if target is within 16-bit Thumb2 b{cond} range.
!       (if_then_else (and (ge (minus (match_dup 0) (pc)) (const_int -250))
! 		         (le (minus (match_dup 0) (pc)) (const_int 256)))
! 
! 	;; Target is Thumb2, within narrow range.
! 	;; Generate b{cond}.
! 	(const_int 2)
! 
! 	;; Check if target is within 32-bit Thumb2 b{cond} range.
! 	(if_then_else (and (ge (minus (match_dup 0) (pc))(const_int -1048568))
! 			   (le (minus (match_dup 0) (pc)) (const_int 1048576)))
! 
! 	  ;; Target is Thumb2, within wide range.
! 	  ;; Generate b{cond}
! 	  (const_int 4)
! 	  ;; Target is Thumb2, out of range.
! 	  ;; Generate narrow b{cond} and unconditional branch b.
! 	  (const_int 6)))))]
  )
  
  (define_insn "*arm_cond_branch_reversed"
***************
*** 7594,7616 ****
  		      (pc)
  		      (label_ref (match_operand 0 "" ""))))]
    "TARGET_32BIT"
!   "*
!   if (arm_ccfsm_state == 1 || arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
!       return \"\";
      }
!   return \"b%D1\\t%l0\";
!   "
    [(set_attr "conds" "use")
     (set_attr "type" "branch")
     (set (attr "length")
! 	(if_then_else
! 	   (and (match_test "TARGET_THUMB2")
! 		(and (ge (minus (match_dup 0) (pc)) (const_int -250))
! 		     (le (minus (match_dup 0) (pc)) (const_int 256))))
! 	   (const_int 2)
! 	   (const_int 4)))]
  )
  
  
--- 7912,7961 ----
  		      (pc)
  		      (label_ref (match_operand 0 "" ""))))]
    "TARGET_32BIT"
!   {
!     if (arm_ccfsm_state == 1 || arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
!       return "";
      }
!     switch (get_attr_length (insn))
!       {
! 	case 2: /* Thumb2 16-bit b{cond}.  */
! 	case 4: /* Thumb2 32-bit b{cond} or A32 b{cond}.  */
! 	  return "b%D1\t%l0";
! 	  break;
! 
! 	/* Thumb2 b{cond} out of range.  Use 16-bit b{cond} and
! 	   unconditional branch b.  */
! 	default: return arm_gen_far_branch (operands, 0, "Lbcond", "b%d1\t");
!       }
!   }
    [(set_attr "conds" "use")
     (set_attr "type" "branch")
     (set (attr "length")
!     (if_then_else (match_test "!TARGET_THUMB2")
! 
!       ;;Target is not Thumb2, therefore is A32.  Generate b{cond}.
!       (const_int 4)
! 
!       ;; Check if target is within 16-bit Thumb2 b{cond} range.
!       (if_then_else (and (ge (minus (match_dup 0) (pc)) (const_int -250))
! 			 (le (minus (match_dup 0) (pc)) (const_int 256)))
! 
! 	;; Target is Thumb2, within narrow range.
! 	;; Generate b{cond}.
! 	(const_int 2)
! 
! 	;; Check if target is within 32-bit Thumb2 b{cond} range.
! 	(if_then_else (and (ge (minus (match_dup 0) (pc))(const_int -1048568))
! 			   (le (minus (match_dup 0) (pc)) (const_int 1048576)))
! 
! 	  ;; Target is Thumb2, within wide range.
! 	  ;; Generate b{cond}.
! 	  (const_int 4)
! 	  ;; Target is Thumb2, out of range.
! 	  ;; Generate narrow b{cond} and unconditional branch b.
! 	  (const_int 6)))))]
  )
  
  
***************
*** 7618,7624 ****
  ; scc insns
  
  (define_expand "cstore_cc"
!   [(set (match_operand:SI 0 "s_register_operand" "")
  	(match_operator:SI 1 "" [(match_operand 2 "" "")
  				 (match_operand 3 "" "")]))]
    "TARGET_32BIT"
--- 7963,7969 ----
  ; scc insns
  
  (define_expand "cstore_cc"
!   [(set (match_operand:SI 0 "s_register_operand")
  	(match_operator:SI 1 "" [(match_operand 2 "" "")
  				 (match_operand 3 "" "")]))]
    "TARGET_32BIT"
***************
*** 7644,7656 ****
     (set_attr "type" "multiple")]
  )
  
  (define_insn_and_split "*mov_negscc"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(neg:SI (match_operator:SI 1 "arm_comparison_operator_mode"
  		 [(match_operand 2 "cc_register" "") (const_int 0)])))]
!   "TARGET_ARM"
    "#"   ; "mov%D1\\t%0, #0\;mvn%d1\\t%0, #0"
!   "TARGET_ARM"
    [(set (match_dup 0)
          (if_then_else:SI (match_dup 1)
                           (match_dup 3)
--- 7989,8011 ----
     (set_attr "type" "multiple")]
  )
  
+ (define_insn "*negscc_borrow"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(neg:SI (match_operand:SI 1 "arm_borrow_operation" "")))]
+   "TARGET_32BIT"
+   "sbc\\t%0, %0, %0"
+   [(set_attr "conds" "use")
+    (set_attr "length" "4")
+    (set_attr "type" "adc_reg")]
+ )
+ 
  (define_insn_and_split "*mov_negscc"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(neg:SI (match_operator:SI 1 "arm_comparison_operator_mode"
  		 [(match_operand 2 "cc_register" "") (const_int 0)])))]
!   "TARGET_ARM && !arm_borrow_operation (operands[1], SImode)"
    "#"   ; "mov%D1\\t%0, #0\;mvn%d1\\t%0, #0"
!   "&& true"
    [(set (match_dup 0)
          (if_then_else:SI (match_dup 1)
                           (match_dup 3)
***************
*** 7684,7693 ****
  )
  
  (define_expand "cstoresi4"
!   [(set (match_operand:SI 0 "s_register_operand" "")
  	(match_operator:SI 1 "expandable_comparison_operator"
! 	 [(match_operand:SI 2 "s_register_operand" "")
! 	  (match_operand:SI 3 "reg_or_int_operand" "")]))]
    "TARGET_32BIT || TARGET_THUMB1"
    "{
    rtx op3, scratch, scratch2;
--- 8039,8048 ----
  )
  
  (define_expand "cstoresi4"
!   [(set (match_operand:SI 0 "s_register_operand")
  	(match_operator:SI 1 "expandable_comparison_operator"
! 	 [(match_operand:SI 2 "s_register_operand")
! 	  (match_operand:SI 3 "reg_or_int_operand")]))]
    "TARGET_32BIT || TARGET_THUMB1"
    "{
    rtx op3, scratch, scratch2;
***************
*** 7838,7867 ****
  )
  
  (define_expand "cstoresf4"
!   [(set (match_operand:SI 0 "s_register_operand" "")
  	(match_operator:SI 1 "expandable_comparison_operator"
! 	 [(match_operand:SF 2 "s_register_operand" "")
! 	  (match_operand:SF 3 "vfp_compare_operand" "")]))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "emit_insn (gen_cstore_cc (operands[0], operands[1],
  			     operands[2], operands[3])); DONE;"
  )
  
  (define_expand "cstoredf4"
!   [(set (match_operand:SI 0 "s_register_operand" "")
  	(match_operator:SI 1 "expandable_comparison_operator"
! 	 [(match_operand:DF 2 "s_register_operand" "")
! 	  (match_operand:DF 3 "vfp_compare_operand" "")]))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "emit_insn (gen_cstore_cc (operands[0], operands[1],
  			     operands[2], operands[3])); DONE;"
  )
  
  (define_expand "cstoredi4"
!   [(set (match_operand:SI 0 "s_register_operand" "")
  	(match_operator:SI 1 "expandable_comparison_operator"
! 	 [(match_operand:DI 2 "s_register_operand" "")
! 	  (match_operand:DI 3 "cmpdi_operand" "")]))]
    "TARGET_32BIT"
    "{
       if (!arm_validize_comparison (&operands[1],
--- 8193,8222 ----
  )
  
  (define_expand "cstoresf4"
!   [(set (match_operand:SI 0 "s_register_operand")
  	(match_operator:SI 1 "expandable_comparison_operator"
! 	 [(match_operand:SF 2 "s_register_operand")
! 	  (match_operand:SF 3 "vfp_compare_operand")]))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "emit_insn (gen_cstore_cc (operands[0], operands[1],
  			     operands[2], operands[3])); DONE;"
  )
  
  (define_expand "cstoredf4"
!   [(set (match_operand:SI 0 "s_register_operand")
  	(match_operator:SI 1 "expandable_comparison_operator"
! 	 [(match_operand:DF 2 "s_register_operand")
! 	  (match_operand:DF 3 "vfp_compare_operand")]))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
    "emit_insn (gen_cstore_cc (operands[0], operands[1],
  			     operands[2], operands[3])); DONE;"
  )
  
  (define_expand "cstoredi4"
!   [(set (match_operand:SI 0 "s_register_operand")
  	(match_operator:SI 1 "expandable_comparison_operator"
! 	 [(match_operand:DI 2 "s_register_operand")
! 	  (match_operand:DI 3 "reg_or_int_operand")]))]
    "TARGET_32BIT"
    "{
       if (!arm_validize_comparison (&operands[1],
***************
*** 7878,7887 ****
  ;; Conditional move insns
  
  (define_expand "movsicc"
!   [(set (match_operand:SI 0 "s_register_operand" "")
! 	(if_then_else:SI (match_operand 1 "expandable_comparison_operator" "")
! 			 (match_operand:SI 2 "arm_not_operand" "")
! 			 (match_operand:SI 3 "arm_not_operand" "")))]
    "TARGET_32BIT"
    "
    {
--- 8233,8242 ----
  ;; Conditional move insns
  
  (define_expand "movsicc"
!   [(set (match_operand:SI 0 "s_register_operand")
! 	(if_then_else:SI (match_operand 1 "expandable_comparison_operator")
! 			 (match_operand:SI 2 "arm_not_operand")
! 			 (match_operand:SI 3 "arm_not_operand")))]
    "TARGET_32BIT"
    "
    {
***************
*** 7922,7931 ****
  )
  
  (define_expand "movsfcc"
!   [(set (match_operand:SF 0 "s_register_operand" "")
! 	(if_then_else:SF (match_operand 1 "arm_cond_move_operator" "")
! 			 (match_operand:SF 2 "s_register_operand" "")
! 			 (match_operand:SF 3 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "
    {
--- 8277,8286 ----
  )
  
  (define_expand "movsfcc"
!   [(set (match_operand:SF 0 "s_register_operand")
! 	(if_then_else:SF (match_operand 1 "arm_cond_move_operator")
! 			 (match_operand:SF 2 "s_register_operand")
! 			 (match_operand:SF 3 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT"
    "
    {
***************
*** 7944,7953 ****
  )
  
  (define_expand "movdfcc"
!   [(set (match_operand:DF 0 "s_register_operand" "")
! 	(if_then_else:DF (match_operand 1 "arm_cond_move_operator" "")
! 			 (match_operand:DF 2 "s_register_operand" "")
! 			 (match_operand:DF 3 "s_register_operand" "")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
    "
    {
--- 8299,8308 ----
  )
  
  (define_expand "movdfcc"
!   [(set (match_operand:DF 0 "s_register_operand")
! 	(if_then_else:DF (match_operand 1 "arm_cond_move_operator")
! 			 (match_operand:DF 2 "s_register_operand")
! 			 (match_operand:DF 3 "s_register_operand")))]
    "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
    "
    {
***************
*** 8143,8150 ****
  )
  
  (define_expand "call"
!   [(parallel [(call (match_operand 0 "memory_operand" "")
! 	            (match_operand 1 "general_operand" ""))
  	      (use (match_operand 2 "" ""))
  	      (clobber (reg:SI LR_REGNUM))])]
    "TARGET_EITHER"
--- 8498,8505 ----
  )
  
  (define_expand "call"
!   [(parallel [(call (match_operand 0 "memory_operand")
! 	            (match_operand 1 "general_operand"))
  	      (use (match_operand 2 "" ""))
  	      (clobber (reg:SI LR_REGNUM))])]
    "TARGET_EITHER"
***************
*** 8166,8171 ****
--- 8521,8531 ----
  	: !REG_P (callee))
        XEXP (operands[0], 0) = force_reg (Pmode, callee);
  
+     if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[0], 0)))
+ 	/* Indirect call: set r9 with FDPIC value of callee.  */
+ 	XEXP (operands[0], 0)
+ 	  = arm_load_function_descriptor (XEXP (operands[0], 0));
+ 
      if (detect_cmse_nonsecure_call (addr))
        {
  	pat = gen_nonsecure_call_internal (operands[0], operands[1],
***************
*** 8177,8207 ****
  	pat = gen_call_internal (operands[0], operands[1], operands[2]);
  	arm_emit_call_insn (pat, XEXP (operands[0], 0), false);
        }
      DONE;
    }"
  )
  
  (define_expand "call_internal"
!   [(parallel [(call (match_operand 0 "memory_operand" "")
! 	            (match_operand 1 "general_operand" ""))
  	      (use (match_operand 2 "" ""))
  	      (clobber (reg:SI LR_REGNUM))])])
  
  (define_expand "nonsecure_call_internal"
!   [(parallel [(call (unspec:SI [(match_operand 0 "memory_operand" "")]
  			       UNSPEC_NONSECURE_MEM)
! 		    (match_operand 1 "general_operand" ""))
  	      (use (match_operand 2 "" ""))
  	      (clobber (reg:SI LR_REGNUM))])]
    "use_cmse"
    "
    {
!     rtx tmp;
!     tmp = copy_to_suggested_reg (XEXP (operands[0], 0),
  				 gen_rtx_REG (SImode, R4_REGNUM),
  				 SImode);
  
!     operands[0] = replace_equiv_address (operands[0], tmp);
    }")
  
  (define_insn "*call_reg_armv5"
--- 8537,8593 ----
  	pat = gen_call_internal (operands[0], operands[1], operands[2]);
  	arm_emit_call_insn (pat, XEXP (operands[0], 0), false);
        }
+ 
+     /* Restore FDPIC register (r9) after call.  */
+     if (TARGET_FDPIC)
+       {
+ 	rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ 	rtx initial_fdpic_reg
+ 	    = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
+ 
+ 	emit_insn (gen_restore_pic_register_after_call (fdpic_reg,
+ 							initial_fdpic_reg));
+       }
+ 
      DONE;
    }"
  )
  
+ (define_insn "restore_pic_register_after_call"
+   [(set (match_operand:SI 0 "s_register_operand" "+r,r")
+         (unspec:SI [(match_dup 0)
+                     (match_operand:SI 1 "nonimmediate_operand" "r,m")]
+                    UNSPEC_PIC_RESTORE))]
+   ""
+   "@
+   mov\t%0, %1
+   ldr\t%0, %1"
+ )
+ 
  (define_expand "call_internal"
!   [(parallel [(call (match_operand 0 "memory_operand")
! 	            (match_operand 1 "general_operand"))
  	      (use (match_operand 2 "" ""))
  	      (clobber (reg:SI LR_REGNUM))])])
  
  (define_expand "nonsecure_call_internal"
!   [(parallel [(call (unspec:SI [(match_operand 0 "memory_operand")]
  			       UNSPEC_NONSECURE_MEM)
! 		    (match_operand 1 "general_operand"))
  	      (use (match_operand 2 "" ""))
  	      (clobber (reg:SI LR_REGNUM))])]
    "use_cmse"
    "
    {
!     if (!TARGET_HAVE_FPCXT_CMSE)
!       {
! 	rtx tmp =
! 	  copy_to_suggested_reg (XEXP (operands[0], 0),
  				 gen_rtx_REG (SImode, R4_REGNUM),
  				 SImode);
  
! 	operands[0] = replace_equiv_address (operands[0], tmp);
!       }
    }")
  
  (define_insn "*call_reg_armv5"
***************
*** 8231,8238 ****
  
  (define_expand "call_value"
    [(parallel [(set (match_operand       0 "" "")
! 	           (call (match_operand 1 "memory_operand" "")
! 		         (match_operand 2 "general_operand" "")))
  	      (use (match_operand 3 "" ""))
  	      (clobber (reg:SI LR_REGNUM))])]
    "TARGET_EITHER"
--- 8617,8624 ----
  
  (define_expand "call_value"
    [(parallel [(set (match_operand       0 "" "")
! 	           (call (match_operand 1 "memory_operand")
! 		         (match_operand 2 "general_operand")))
  	      (use (match_operand 3 "" ""))
  	      (clobber (reg:SI LR_REGNUM))])]
    "TARGET_EITHER"
***************
*** 8254,8259 ****
--- 8640,8650 ----
  	: !REG_P (callee))
        XEXP (operands[1], 0) = force_reg (Pmode, callee);
  
+     if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[1], 0)))
+ 	/* Indirect call: set r9 with FDPIC value of callee.  */
+ 	XEXP (operands[1], 0)
+ 	  = arm_load_function_descriptor (XEXP (operands[1], 0));
+ 
      if (detect_cmse_nonsecure_call (addr))
        {
  	pat = gen_nonsecure_call_value_internal (operands[0], operands[1],
***************
*** 8266,8298 ****
  				       operands[2], operands[3]);
  	arm_emit_call_insn (pat, XEXP (operands[1], 0), false);
        }
      DONE;
    }"
  )
  
  (define_expand "call_value_internal"
    [(parallel [(set (match_operand       0 "" "")
! 	           (call (match_operand 1 "memory_operand" "")
! 		         (match_operand 2 "general_operand" "")))
  	      (use (match_operand 3 "" ""))
  	      (clobber (reg:SI LR_REGNUM))])])
  
  (define_expand "nonsecure_call_value_internal"
    [(parallel [(set (match_operand       0 "" "")
! 		   (call (unspec:SI [(match_operand 1 "memory_operand" "")]
  				    UNSPEC_NONSECURE_MEM)
! 			 (match_operand 2 "general_operand" "")))
  	      (use (match_operand 3 "" ""))
  	      (clobber (reg:SI LR_REGNUM))])]
    "use_cmse"
    "
    {
!     rtx tmp;
!     tmp = copy_to_suggested_reg (XEXP (operands[1], 0),
  				 gen_rtx_REG (SImode, R4_REGNUM),
  				 SImode);
  
!     operands[1] = replace_equiv_address (operands[1], tmp);
    }")
  
  (define_insn "*call_value_reg_armv5"
--- 8657,8704 ----
  				       operands[2], operands[3]);
  	arm_emit_call_insn (pat, XEXP (operands[1], 0), false);
        }
+ 
+     /* Restore FDPIC register (r9) after call.  */
+     if (TARGET_FDPIC)
+       {
+ 	rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ 	rtx initial_fdpic_reg
+ 	    = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
+ 
+ 	emit_insn (gen_restore_pic_register_after_call (fdpic_reg,
+ 							initial_fdpic_reg));
+       }
+ 
      DONE;
    }"
  )
  
  (define_expand "call_value_internal"
    [(parallel [(set (match_operand       0 "" "")
! 	           (call (match_operand 1 "memory_operand")
! 		         (match_operand 2 "general_operand")))
  	      (use (match_operand 3 "" ""))
  	      (clobber (reg:SI LR_REGNUM))])])
  
  (define_expand "nonsecure_call_value_internal"
    [(parallel [(set (match_operand       0 "" "")
! 		   (call (unspec:SI [(match_operand 1 "memory_operand")]
  				    UNSPEC_NONSECURE_MEM)
! 			 (match_operand 2 "general_operand")))
  	      (use (match_operand 3 "" ""))
  	      (clobber (reg:SI LR_REGNUM))])]
    "use_cmse"
    "
    {
!     if (!TARGET_HAVE_FPCXT_CMSE)
!       {
! 	rtx tmp =
! 	  copy_to_suggested_reg (XEXP (operands[1], 0),
  				 gen_rtx_REG (SImode, R4_REGNUM),
  				 SImode);
  
! 	operands[1] = replace_equiv_address (operands[1], tmp);
!       }
    }")
  
  (define_insn "*call_value_reg_armv5"
***************
*** 8371,8385 ****
  )
  
  (define_expand "sibcall_internal"
!   [(parallel [(call (match_operand 0 "memory_operand" "")
! 		    (match_operand 1 "general_operand" ""))
  	      (return)
  	      (use (match_operand 2 "" ""))])])
  
  ;; We may also be able to do sibcalls for Thumb, but it's much harder...
  (define_expand "sibcall"
!   [(parallel [(call (match_operand 0 "memory_operand" "")
! 		    (match_operand 1 "general_operand" ""))
  	      (return)
  	      (use (match_operand 2 "" ""))])]
    "TARGET_32BIT"
--- 8777,8791 ----
  )
  
  (define_expand "sibcall_internal"
!   [(parallel [(call (match_operand 0 "memory_operand")
! 		    (match_operand 1 "general_operand"))
  	      (return)
  	      (use (match_operand 2 "" ""))])])
  
  ;; We may also be able to do sibcalls for Thumb, but it's much harder...
  (define_expand "sibcall"
!   [(parallel [(call (match_operand 0 "memory_operand")
! 		    (match_operand 1 "general_operand"))
  	      (return)
  	      (use (match_operand 2 "" ""))])]
    "TARGET_32BIT"
***************
*** 8404,8418 ****
  
  (define_expand "sibcall_value_internal"
    [(parallel [(set (match_operand 0 "" "")
! 		   (call (match_operand 1 "memory_operand" "")
! 			 (match_operand 2 "general_operand" "")))
  	      (return)
  	      (use (match_operand 3 "" ""))])])
  
  (define_expand "sibcall_value"
    [(parallel [(set (match_operand 0 "" "")
! 		   (call (match_operand 1 "memory_operand" "")
! 			 (match_operand 2 "general_operand" "")))
  	      (return)
  	      (use (match_operand 3 "" ""))])]
    "TARGET_32BIT"
--- 8810,8824 ----
  
  (define_expand "sibcall_value_internal"
    [(parallel [(set (match_operand 0 "" "")
! 		   (call (match_operand 1 "memory_operand")
! 			 (match_operand 2 "general_operand")))
  	      (return)
  	      (use (match_operand 3 "" ""))])])
  
  (define_expand "sibcall_value"
    [(parallel [(set (match_operand 0 "" "")
! 		   (call (match_operand 1 "memory_operand")
! 			 (match_operand 2 "general_operand")))
  	      (return)
  	      (use (match_operand 3 "" ""))])]
    "TARGET_32BIT"
***************
*** 8579,8598 ****
  
  (define_expand "return_addr_mask"
    [(set (match_dup 1)
!       (compare:CC_NOOV (unspec [(const_int 0)] UNSPEC_CHECK_ARCH)
  		       (const_int 0)))
!    (set (match_operand:SI 0 "s_register_operand" "")
        (if_then_else:SI (eq (match_dup 1) (const_int 0))
  		       (const_int -1)
  		       (const_int 67108860)))] ; 0x03fffffc
    "TARGET_ARM"
    "
!   operands[1] = gen_rtx_REG (CC_NOOVmode, CC_REGNUM);
    ")
  
  (define_insn "*check_arch2"
!   [(set (match_operand:CC_NOOV 0 "cc_register" "")
!       (compare:CC_NOOV (unspec [(const_int 0)] UNSPEC_CHECK_ARCH)
  		       (const_int 0)))]
    "TARGET_ARM"
    "teq\\t%|r0, %|r0\;teq\\t%|pc, %|pc"
--- 8985,9004 ----
  
  (define_expand "return_addr_mask"
    [(set (match_dup 1)
!       (compare:CC_NZ (unspec [(const_int 0)] UNSPEC_CHECK_ARCH)
  		       (const_int 0)))
!    (set (match_operand:SI 0 "s_register_operand")
        (if_then_else:SI (eq (match_dup 1) (const_int 0))
  		       (const_int -1)
  		       (const_int 67108860)))] ; 0x03fffffc
    "TARGET_ARM"
    "
!   operands[1] = gen_rtx_REG (CC_NZmode, CC_REGNUM);
    ")
  
  (define_insn "*check_arch2"
!   [(set (match_operand:CC_NZ 0 "cc_register" "")
!       (compare:CC_NZ (unspec [(const_int 0)] UNSPEC_CHECK_ARCH)
  		       (const_int 0)))]
    "TARGET_ARM"
    "teq\\t%|r0, %|r0\;teq\\t%|pc, %|pc"
***************
*** 8608,8614 ****
  		    (const_int 0))
  	      (match_operand 1 "" "")
  	      (match_operand 2 "" "")])]
!   "TARGET_EITHER"
    "
    {
      int i;
--- 9014,9020 ----
  		    (const_int 0))
  	      (match_operand 1 "" "")
  	      (match_operand 2 "" "")])]
!   "TARGET_EITHER && !TARGET_FDPIC"
    "
    {
      int i;
***************
*** 8673,8681 ****
  )
  
  (define_expand "untyped_return"
!   [(match_operand:BLK 0 "memory_operand" "")
     (match_operand 1 "" "")]
!   "TARGET_EITHER"
    "
    {
      int i;
--- 9079,9087 ----
  )
  
  (define_expand "untyped_return"
!   [(match_operand:BLK 0 "memory_operand")
     (match_operand 1 "" "")]
!   "TARGET_EITHER && !TARGET_FDPIC"
    "
    {
      int i;
***************
*** 8759,8766 ****
  ;; Named patterns for stack smashing protection.
  (define_expand "stack_protect_combined_set"
    [(parallel
!      [(set (match_operand:SI 0 "memory_operand" "")
! 	   (unspec:SI [(match_operand:SI 1 "guard_operand" "")]
  		      UNSPEC_SP_SET))
        (clobber (match_scratch:SI 2 ""))
        (clobber (match_scratch:SI 3 ""))])]
--- 9165,9172 ----
  ;; Named patterns for stack smashing protection.
  (define_expand "stack_protect_combined_set"
    [(parallel
!      [(set (match_operand:SI 0 "memory_operand")
! 	   (unspec:SI [(match_operand:SI 1 "guard_operand")]
  		      UNSPEC_SP_SET))
        (clobber (match_scratch:SI 2 ""))
        (clobber (match_scratch:SI 3 ""))])]
***************
*** 8789,8796 ****
  {
    if (flag_pic)
      {
        /* Forces recomputing of GOT base now.  */
!       legitimize_pic_address (operands[1], SImode, operands[2], operands[3],
  			      true /*compute_now*/);
      }
    else
--- 9195,9209 ----
  {
    if (flag_pic)
      {
+       rtx pic_reg;
+ 
+       if (TARGET_FDPIC)
+ 	  pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+       else
+ 	  pic_reg = operands[3];
+ 
        /* Forces recomputing of GOT base now.  */
!       legitimize_pic_address (operands[1], SImode, operands[2], pic_reg,
  			      true /*compute_now*/);
      }
    else
***************
*** 8807,8812 ****
--- 9220,9227 ----
    [(set_attr "arch" "t1,32")]
  )
  
+ ;; DO NOT SPLIT THIS INSN.  It's important for security reasons that the
+ ;; canary value does not live beyond the life of this sequence.
  (define_insn "*stack_protect_set_insn"
    [(set (match_operand:SI 0 "memory_operand" "=m,m")
  	(unspec:SI [(mem:SI (match_operand:SI 1 "register_operand" "+&l,&r"))]
***************
*** 8814,8821 ****
     (clobber (match_dup 1))]
    ""
    "@
!    ldr\\t%1, [%1]\;str\\t%1, %0\;movs\t%1,#0
!    ldr\\t%1, [%1]\;str\\t%1, %0\;mov\t%1,#0"
    [(set_attr "length" "8,12")
     (set_attr "conds" "clob,nocond")
     (set_attr "type" "multiple")
--- 9229,9236 ----
     (clobber (match_dup 1))]
    ""
    "@
!    ldr\\t%1, [%1]\;str\\t%1, %0\;movs\t%1, #0
!    ldr\\t%1, [%1]\;str\\t%1, %0\;mov\t%1, #0"
    [(set_attr "length" "8,12")
     (set_attr "conds" "clob,nocond")
     (set_attr "type" "multiple")
***************
*** 8826,8833 ****
    [(parallel
       [(set (pc)
  	   (if_then_else
! 		(eq (match_operand:SI 0 "memory_operand" "")
! 		    (unspec:SI [(match_operand:SI 1 "guard_operand" "")]
  			       UNSPEC_SP_TEST))
  		(label_ref (match_operand 2))
  		(pc)))
--- 9241,9248 ----
    [(parallel
       [(set (pc)
  	   (if_then_else
! 		(eq (match_operand:SI 0 "memory_operand")
! 		    (unspec:SI [(match_operand:SI 1 "guard_operand")]
  			       UNSPEC_SP_TEST))
  		(label_ref (match_operand 2))
  		(pc)))
***************
*** 8863,8870 ****
  
    if (flag_pic)
      {
        /* Forces recomputing of GOT base now.  */
!       legitimize_pic_address (operands[1], SImode, operands[3], operands[4],
  			      true /*compute_now*/);
      }
    else
--- 9278,9292 ----
  
    if (flag_pic)
      {
+       rtx pic_reg;
+ 
+       if (TARGET_FDPIC)
+ 	  pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+       else
+ 	  pic_reg = operands[4];
+ 
        /* Forces recomputing of GOT base now.  */
!       legitimize_pic_address (operands[1], SImode, operands[3], pic_reg,
  			      true /*compute_now*/);
      }
    else
***************
*** 8915,8923 ****
  )
  
  (define_expand "casesi"
!   [(match_operand:SI 0 "s_register_operand" "")	; index to jump on
!    (match_operand:SI 1 "const_int_operand" "")	; lower bound
!    (match_operand:SI 2 "const_int_operand" "")	; total range
     (match_operand:SI 3 "" "")			; table label
     (match_operand:SI 4 "" "")]			; Out of range label
    "(TARGET_32BIT || optimize_size || flag_pic) && !target_pure_code"
--- 9337,9345 ----
  )
  
  (define_expand "casesi"
!   [(match_operand:SI 0 "s_register_operand")	; index to jump on
!    (match_operand:SI 1 "const_int_operand")	; lower bound
!    (match_operand:SI 2 "const_int_operand")	; total range
     (match_operand:SI 3 "" "")			; table label
     (match_operand:SI 4 "" "")]			; Out of range label
    "(TARGET_32BIT || optimize_size || flag_pic) && !target_pure_code"
***************
*** 8996,9002 ****
  
  (define_expand "indirect_jump"
    [(set (pc)
! 	(match_operand:SI 0 "s_register_operand" ""))]
    "TARGET_EITHER"
    "
    /* Thumb-2 doesn't have mov pc, reg.  Explicitly set the low bit of the
--- 9418,9424 ----
  
  (define_expand "indirect_jump"
    [(set (pc)
! 	(match_operand:SI 0 "s_register_operand"))]
    "TARGET_EITHER"
    "
    /* Thumb-2 doesn't have mov pc, reg.  Explicitly set the low bit of the
***************
*** 9112,9119 ****
    "")
  
  (define_insn "*arith_shiftsi_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
!         (compare:CC_NOOV
  	 (match_operator:SI 1 "shiftable_operator"
  	  [(match_operator:SI 3 "shift_operator"
  	    [(match_operand:SI 4 "s_register_operand" "r,r")
--- 9534,9541 ----
    "")
  
  (define_insn "*arith_shiftsi_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
!         (compare:CC_NZ
  	 (match_operator:SI 1 "shiftable_operator"
  	  [(match_operator:SI 3 "shift_operator"
  	    [(match_operand:SI 4 "s_register_operand" "r,r")
***************
*** 9131,9138 ****
     (set_attr "type" "alus_shift_imm,alus_shift_reg")])
  
  (define_insn "*arith_shiftsi_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
!         (compare:CC_NOOV
  	 (match_operator:SI 1 "shiftable_operator"
  	  [(match_operator:SI 3 "shift_operator"
  	    [(match_operand:SI 4 "s_register_operand" "r,r")
--- 9553,9560 ----
     (set_attr "type" "alus_shift_imm,alus_shift_reg")])
  
  (define_insn "*arith_shiftsi_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
!         (compare:CC_NZ
  	 (match_operator:SI 1 "shiftable_operator"
  	  [(match_operator:SI 3 "shift_operator"
  	    [(match_operand:SI 4 "s_register_operand" "r,r")
***************
*** 9162,9199 ****
     (set_attr "type" "alus_shift_imm,alus_shift_reg")])
  
  (define_insn "*sub_shiftsi_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
! 	 (minus:SI (match_operand:SI 1 "s_register_operand" "r,r,r")
  		   (match_operator:SI 2 "shift_operator"
! 		    [(match_operand:SI 3 "s_register_operand" "r,r,r")
! 		     (match_operand:SI 4 "shift_amount_operand" "M,r,M")]))
  	 (const_int 0)))
!    (set (match_operand:SI 0 "s_register_operand" "=r,r,r")
  	(minus:SI (match_dup 1)
  		  (match_op_dup 2 [(match_dup 3) (match_dup 4)])))]
    "TARGET_32BIT"
    "subs%?\\t%0, %1, %3%S2"
    [(set_attr "conds" "set")
     (set_attr "shift" "3")
!    (set_attr "arch" "32,a,a")
!    (set_attr "type" "alus_shift_imm,alus_shift_reg,alus_shift_imm")])
  
  (define_insn "*sub_shiftsi_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
! 	 (minus:SI (match_operand:SI 1 "s_register_operand" "r,r,r")
  		   (match_operator:SI 2 "shift_operator"
! 		    [(match_operand:SI 3 "s_register_operand" "r,r,r")
! 		     (match_operand:SI 4 "shift_amount_operand" "M,r,M")]))
  	 (const_int 0)))
!    (clobber (match_scratch:SI 0 "=r,r,r"))]
    "TARGET_32BIT"
    "subs%?\\t%0, %1, %3%S2"
    [(set_attr "conds" "set")
     (set_attr "shift" "3")
!    (set_attr "arch" "32,a,a")
!    (set_attr "type" "alus_shift_imm,alus_shift_reg,alus_shift_imm")])
  
  
  (define_insn_and_split "*and_scc"
--- 9584,9621 ----
     (set_attr "type" "alus_shift_imm,alus_shift_reg")])
  
  (define_insn "*sub_shiftsi_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
! 	 (minus:SI (match_operand:SI 1 "s_register_operand" "r,r")
  		   (match_operator:SI 2 "shift_operator"
! 		    [(match_operand:SI 3 "s_register_operand" "r,r")
! 		     (match_operand:SI 4 "shift_amount_operand" "M,r")]))
  	 (const_int 0)))
!    (set (match_operand:SI 0 "s_register_operand" "=r,r")
  	(minus:SI (match_dup 1)
  		  (match_op_dup 2 [(match_dup 3) (match_dup 4)])))]
    "TARGET_32BIT"
    "subs%?\\t%0, %1, %3%S2"
    [(set_attr "conds" "set")
     (set_attr "shift" "3")
!    (set_attr "arch" "32,a")
!    (set_attr "type" "alus_shift_imm,alus_shift_reg")])
  
  (define_insn "*sub_shiftsi_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
! 	 (minus:SI (match_operand:SI 1 "s_register_operand" "r,r")
  		   (match_operator:SI 2 "shift_operator"
! 		    [(match_operand:SI 3 "s_register_operand" "r,r")
! 		     (match_operand:SI 4 "shift_amount_operand" "M,r")]))
  	 (const_int 0)))
!    (clobber (match_scratch:SI 0 "=r,r"))]
    "TARGET_32BIT"
    "subs%?\\t%0, %1, %3%S2"
    [(set_attr "conds" "set")
     (set_attr "shift" "3")
!    (set_attr "arch" "32,a")
!    (set_attr "type" "alus_shift_imm,alus_shift_reg")])
  
  
  (define_insn_and_split "*and_scc"
***************
*** 9325,9335 ****
     (clobber (reg:CC CC_REGNUM))]
    "TARGET_32BIT && reload_completed"
    [(parallel
!     [(set (reg:CC_NOOV CC_REGNUM)
! 	  (compare:CC_NOOV (minus:SI (match_dup 1) (match_dup 2))
  			   (const_int 0)))
       (set (match_dup 0) (minus:SI (match_dup 1) (match_dup 2)))])
!    (cond_exec (ne:CC_NOOV (reg:CC_NOOV CC_REGNUM) (const_int 0))
  	      (set (match_dup 0) (const_int 1)))])
  
  (define_insn_and_split "*compare_scc"
--- 9747,9757 ----
     (clobber (reg:CC CC_REGNUM))]
    "TARGET_32BIT && reload_completed"
    [(parallel
!     [(set (reg:CC_NZ CC_REGNUM)
! 	  (compare:CC_NZ (minus:SI (match_dup 1) (match_dup 2))
  			   (const_int 0)))
       (set (match_dup 0) (minus:SI (match_dup 1) (match_dup 2)))])
!    (cond_exec (ne:CC_NZ (reg:CC_NZ CC_REGNUM) (const_int 0))
  	      (set (match_dup 0) (const_int 1)))])
  
  (define_insn_and_split "*compare_scc"
***************
*** 9706,9720 ****
  	(compare
  	 (and:SI
  	  (match_operator 4 "arm_comparison_operator"
! 	   [(match_operand:SI 0 "s_register_operand" 
! 	        "l,l,l,r,r,r,r,r,r")
! 	    (match_operand:SI 1 "arm_add_operand" 
! 	        "lPy,lPy,lPy,rI,L,rI,L,rI,L")])
  	  (match_operator:SI 5 "arm_comparison_operator"
! 	   [(match_operand:SI 2 "s_register_operand" 
! 	        "l,r,r,l,l,r,r,r,r")
! 	    (match_operand:SI 3 "arm_add_operand" 
! 	        "lPy,rI,L,lPy,lPy,rI,rI,L,L")]))
  	 (const_int 0)))]
    "TARGET_32BIT"
    "*
--- 10128,10142 ----
  	(compare
  	 (and:SI
  	  (match_operator 4 "arm_comparison_operator"
! 	   [(match_operand:SI 0 "s_register_operand"
! 	        "l,l,l,r,r,r,r,r,r,r")
! 	    (match_operand:SI 1 "arm_add_operand"
! 	        "lPy,lPy,lPy,rI,L,r,rI,L,rI,L")])
  	  (match_operator:SI 5 "arm_comparison_operator"
! 	   [(match_operand:SI 2 "s_register_operand"
! 	        "l,r,r,l,l,r,r,r,r,r")
! 	    (match_operand:SI 3 "arm_add_operand"
! 	        "lPy,rI,L,lPy,lPy,r,rI,rI,L,L")]))
  	 (const_int 0)))]
    "TARGET_32BIT"
    "*
***************
*** 9746,9754 ****
        \"it\\t%d5\",
        \"it\\t%d4\"
      };
!     static const int cmp_idx[9] = {CMP_CMP, CMP_CMP, CMP_CMN,
!                                    CMP_CMP, CMN_CMP, CMP_CMP,
!                                    CMN_CMP, CMP_CMN, CMN_CMN};
      int swap =
        comparison_dominates_p (GET_CODE (operands[5]), GET_CODE (operands[4]));
  
--- 10168,10177 ----
        \"it\\t%d5\",
        \"it\\t%d4\"
      };
!     static const int cmp_idx[] = {CMP_CMP, CMP_CMP, CMP_CMN,
!                                   CMP_CMP, CMN_CMP, CMP_CMP,
!                                   CMP_CMP, CMN_CMP, CMP_CMN,
! 				  CMN_CMN};
      int swap =
        comparison_dominates_p (GET_CODE (operands[5]), GET_CODE (operands[4]));
  
***************
*** 9761,9774 ****
    }"
    [(set_attr "conds" "set")
     (set_attr "predicable" "no")
!    (set_attr "arch" "t2,t2,t2,t2,t2,any,any,any,any")
!    (set_attr "enabled_for_short_it" "yes,no,no,no,no,no,no,no,no")
     (set_attr_alternative "length"
        [(const_int 6)
         (const_int 8)
         (const_int 8)
         (const_int 8)
         (const_int 8)
         (if_then_else (eq_attr "is_thumb" "no")
             (const_int 8)
             (const_int 10))
--- 10184,10198 ----
    }"
    [(set_attr "conds" "set")
     (set_attr "predicable" "no")
!    (set_attr "arch" "t2,t2,t2,t2,t2,t2,any,any,any,any")
!    (set_attr "enabled_for_short_it" "yes,no,no,no,no,yes,no,no,no,no")
     (set_attr_alternative "length"
        [(const_int 6)
         (const_int 8)
         (const_int 8)
         (const_int 8)
         (const_int 8)
+        (const_int 6)
         (if_then_else (eq_attr "is_thumb" "no")
             (const_int 8)
             (const_int 10))
***************
*** 9790,9803 ****
  	 (ior:SI
  	  (match_operator 4 "arm_comparison_operator"
  	   [(match_operand:SI 0 "s_register_operand"
! 	        "l,l,l,r,r,r,r,r,r")
  	    (match_operand:SI 1 "arm_add_operand"
! 	        "lPy,lPy,lPy,rI,L,rI,L,rI,L")])
  	  (match_operator:SI 5 "arm_comparison_operator"
  	   [(match_operand:SI 2 "s_register_operand"
! 	        "l,r,r,l,l,r,r,r,r")
  	    (match_operand:SI 3 "arm_add_operand"
! 	        "lPy,rI,L,lPy,lPy,rI,rI,L,L")]))
  	 (const_int 0)))]
    "TARGET_32BIT"
    "*
--- 10214,10227 ----
  	 (ior:SI
  	  (match_operator 4 "arm_comparison_operator"
  	   [(match_operand:SI 0 "s_register_operand"
! 	        "l,l,l,r,r,r,r,r,r,r")
  	    (match_operand:SI 1 "arm_add_operand"
! 	        "lPy,lPy,lPy,rI,L,r,rI,L,rI,L")])
  	  (match_operator:SI 5 "arm_comparison_operator"
  	   [(match_operand:SI 2 "s_register_operand"
! 	        "l,r,r,l,l,r,r,r,r,r")
  	    (match_operand:SI 3 "arm_add_operand"
! 	        "lPy,rI,L,lPy,lPy,r,rI,rI,L,L")]))
  	 (const_int 0)))]
    "TARGET_32BIT"
    "*
***************
*** 9829,9837 ****
        \"it\\t%D4\",
        \"it\\t%D5\"
      };
!     static const int cmp_idx[9] = {CMP_CMP, CMP_CMP, CMP_CMN,
!                                    CMP_CMP, CMN_CMP, CMP_CMP,
!                                    CMN_CMP, CMP_CMN, CMN_CMN};
      int swap =
        comparison_dominates_p (GET_CODE (operands[5]), GET_CODE (operands[4]));
  
--- 10253,10262 ----
        \"it\\t%D4\",
        \"it\\t%D5\"
      };
!     static const int cmp_idx[] = {CMP_CMP, CMP_CMP, CMP_CMN,
!                                   CMP_CMP, CMN_CMP, CMP_CMP,
! 				  CMP_CMP, CMN_CMP, CMP_CMN,
! 				  CMN_CMN};
      int swap =
        comparison_dominates_p (GET_CODE (operands[5]), GET_CODE (operands[4]));
  
***************
*** 9844,9857 ****
    }
    "
    [(set_attr "conds" "set")
!    (set_attr "arch" "t2,t2,t2,t2,t2,any,any,any,any")
!    (set_attr "enabled_for_short_it" "yes,no,no,no,no,no,no,no,no")
     (set_attr_alternative "length"
        [(const_int 6)
         (const_int 8)
         (const_int 8)
         (const_int 8)
         (const_int 8)
         (if_then_else (eq_attr "is_thumb" "no")
             (const_int 8)
             (const_int 10))
--- 10269,10283 ----
    }
    "
    [(set_attr "conds" "set")
!    (set_attr "arch" "t2,t2,t2,t2,t2,t2,any,any,any,any")
!    (set_attr "enabled_for_short_it" "yes,no,no,no,no,yes,no,no,no,no")
     (set_attr_alternative "length"
        [(const_int 6)
         (const_int 8)
         (const_int 8)
         (const_int 8)
         (const_int 8)
+        (const_int 6)
         (if_then_else (eq_attr "is_thumb" "no")
             (const_int 8)
             (const_int 10))
***************
*** 10030,10037 ****
  )
  
  (define_split
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (ior:SI
  			  (and:SI (match_operand:SI 0 "s_register_operand" "")
  				  (const_int 1))
  			  (match_operator:SI 1 "arm_comparison_operator"
--- 10456,10463 ----
  )
  
  (define_split
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (ior:SI
  			  (and:SI (match_operand:SI 0 "s_register_operand" "")
  				  (const_int 1))
  			  (match_operator:SI 1 "arm_comparison_operator"
***************
*** 10043,10056 ****
    [(set (match_dup 4)
  	(ior:SI (match_op_dup 1 [(match_dup 2) (match_dup 3)])
  		(match_dup 0)))
!    (set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (and:SI (match_dup 4) (const_int 1))
  			 (const_int 0)))]
    "")
  
  (define_split
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (ior:SI
  			  (match_operator:SI 1 "arm_comparison_operator"
  			   [(match_operand:SI 2 "s_register_operand" "")
  			    (match_operand:SI 3 "arm_add_operand" "")])
--- 10469,10482 ----
    [(set (match_dup 4)
  	(ior:SI (match_op_dup 1 [(match_dup 2) (match_dup 3)])
  		(match_dup 0)))
!    (set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (and:SI (match_dup 4) (const_int 1))
  			 (const_int 0)))]
    "")
  
  (define_split
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (ior:SI
  			  (match_operator:SI 1 "arm_comparison_operator"
  			   [(match_operand:SI 2 "s_register_operand" "")
  			    (match_operand:SI 3 "arm_add_operand" "")])
***************
*** 10062,10069 ****
    [(set (match_dup 4)
  	(ior:SI (match_op_dup 1 [(match_dup 2) (match_dup 3)])
  		(match_dup 0)))
!    (set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV (and:SI (match_dup 4) (const_int 1))
  			 (const_int 0)))]
    "")
  ;; ??? The conditional patterns above need checking for Thumb-2 usefulness
--- 10488,10495 ----
    [(set (match_dup 4)
  	(ior:SI (match_op_dup 1 [(match_dup 2) (match_dup 3)])
  		(match_dup 0)))
!    (set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ (and:SI (match_dup 4) (const_int 1))
  			 (const_int 0)))]
    "")
  ;; ??? The conditional patterns above need checking for Thumb-2 usefulness
***************
*** 10152,10159 ****
     "TARGET_32BIT"
     "#"
     "&& reload_completed"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	 (plus:SI (match_dup 3)
  		  (match_dup 4))
  	 (const_int 0)))
--- 10578,10585 ----
     "TARGET_32BIT"
     "#"
     "&& reload_completed"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	 (plus:SI (match_dup 3)
  		  (match_dup 4))
  	 (const_int 0)))
***************
*** 11051,11059 ****
  )
  
  (define_expand "eh_epilogue"
!   [(use (match_operand:SI 0 "register_operand" ""))
!    (use (match_operand:SI 1 "register_operand" ""))
!    (use (match_operand:SI 2 "register_operand" ""))]
    "TARGET_EITHER"
    "
    {
--- 11477,11485 ----
  )
  
  (define_expand "eh_epilogue"
!   [(use (match_operand:SI 0 "register_operand"))
!    (use (match_operand:SI 1 "register_operand"))
!    (use (match_operand:SI 2 "register_operand"))]
    "TARGET_EITHER"
    "
    {
***************
*** 11409,11415 ****
                     (match_operand:SI 2 "const_int_I_operand" "I")))
       (set (match_operand:DF 3 "vfp_hard_register_operand" "")
            (mem:DF (match_dup 1)))])]
!   "TARGET_32BIT && TARGET_HARD_FLOAT"
    "*
    {
      int num_regs = XVECLEN (operands[0], 0);
--- 11835,11841 ----
                     (match_operand:SI 2 "const_int_I_operand" "I")))
       (set (match_operand:DF 3 "vfp_hard_register_operand" "")
            (mem:DF (match_dup 1)))])]
!   "TARGET_32BIT && TARGET_VFP_BASE"
    "*
    {
      int num_regs = XVECLEN (operands[0], 0);
***************
*** 11638,11644 ****
  ;; Patterns for exception handling
  
  (define_expand "eh_return"
!   [(use (match_operand 0 "general_operand" ""))]
    "TARGET_EITHER"
    "
    {
--- 12064,12070 ----
  ;; Patterns for exception handling
  
  (define_expand "eh_return"
!   [(use (match_operand 0 "general_operand"))]
    "TARGET_EITHER"
    "
    {
***************
*** 11679,11690 ****
  )
  
  ;; Doesn't clobber R1-R3.  Must use r0 for the first operand.
  (define_insn "load_tp_soft"
    [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
     (clobber (reg:SI LR_REGNUM))
     (clobber (reg:SI IP_REGNUM))
     (clobber (reg:CC CC_REGNUM))]
!   "TARGET_SOFT_TP"
    "bl\\t__aeabi_read_tp\\t@ load_tp_soft"
    [(set_attr "conds" "clob")
     (set_attr "type" "branch")]
--- 12105,12129 ----
  )
  
  ;; Doesn't clobber R1-R3.  Must use r0 for the first operand.
+ (define_insn "load_tp_soft_fdpic"
+   [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
+    (clobber (reg:SI FDPIC_REGNUM))
+    (clobber (reg:SI LR_REGNUM))
+    (clobber (reg:SI IP_REGNUM))
+    (clobber (reg:CC CC_REGNUM))]
+   "TARGET_SOFT_TP && TARGET_FDPIC"
+   "bl\\t__aeabi_read_tp\\t@ load_tp_soft"
+   [(set_attr "conds" "clob")
+    (set_attr "type" "branch")]
+ )
+ 
+ ;; Doesn't clobber R1-R3.  Must use r0 for the first operand.
  (define_insn "load_tp_soft"
    [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
     (clobber (reg:SI LR_REGNUM))
     (clobber (reg:SI IP_REGNUM))
     (clobber (reg:CC CC_REGNUM))]
!   "TARGET_SOFT_TP && !TARGET_FDPIC"
    "bl\\t__aeabi_read_tp\\t@ load_tp_soft"
    [(set_attr "conds" "clob")
     (set_attr "type" "branch")]
***************
*** 11712,11718 ****
  
  ;; For thread pointer builtin
  (define_expand "get_thread_pointersi"
!   [(match_operand:SI 0 "s_register_operand" "=r")]
   ""
   "
   {
--- 12151,12157 ----
  
  ;; For thread pointer builtin
  (define_expand "get_thread_pointersi"
!   [(match_operand:SI 0 "s_register_operand")]
   ""
   "
   {
***************
*** 11754,11773 ****
  )
  
  (define_expand "arm_legacy_rev"
!   [(set (match_operand:SI 2 "s_register_operand" "")
! 	(xor:SI (rotatert:SI (match_operand:SI 1 "s_register_operand" "")
  			     (const_int 16))
  		(match_dup 1)))
     (set (match_dup 2)
  	(lshiftrt:SI (match_dup 2)
  		     (const_int 8)))
!    (set (match_operand:SI 3 "s_register_operand" "")
  	(rotatert:SI (match_dup 1)
  		     (const_int 8)))
     (set (match_dup 2)
  	(and:SI (match_dup 2)
  		(const_int -65281)))
!    (set (match_operand:SI 0 "s_register_operand" "")
  	(xor:SI (match_dup 3)
  		(match_dup 2)))]
    "TARGET_32BIT"
--- 12193,12212 ----
  )
  
  (define_expand "arm_legacy_rev"
!   [(set (match_operand:SI 2 "s_register_operand")
! 	(xor:SI (rotatert:SI (match_operand:SI 1 "s_register_operand")
  			     (const_int 16))
  		(match_dup 1)))
     (set (match_dup 2)
  	(lshiftrt:SI (match_dup 2)
  		     (const_int 8)))
!    (set (match_operand:SI 3 "s_register_operand")
  	(rotatert:SI (match_dup 1)
  		     (const_int 8)))
     (set (match_dup 2)
  	(and:SI (match_dup 2)
  		(const_int -65281)))
!    (set (match_operand:SI 0 "s_register_operand")
  	(xor:SI (match_dup 3)
  		(match_dup 2)))]
    "TARGET_32BIT"
***************
*** 11776,11793 ****
  
  ;; Reuse temporaries to keep register pressure down.
  (define_expand "thumb_legacy_rev"
!   [(set (match_operand:SI 2 "s_register_operand" "")
!      (ashift:SI (match_operand:SI 1 "s_register_operand" "")
                  (const_int 24)))
!    (set (match_operand:SI 3 "s_register_operand" "")
       (lshiftrt:SI (match_dup 1)
  		  (const_int 24)))
     (set (match_dup 3)
       (ior:SI (match_dup 3)
  	     (match_dup 2)))
!    (set (match_operand:SI 4 "s_register_operand" "")
       (const_int 16))
!    (set (match_operand:SI 5 "s_register_operand" "")
       (rotatert:SI (match_dup 1)
  		  (match_dup 4)))
     (set (match_dup 2)
--- 12215,12232 ----
  
  ;; Reuse temporaries to keep register pressure down.
  (define_expand "thumb_legacy_rev"
!   [(set (match_operand:SI 2 "s_register_operand")
!      (ashift:SI (match_operand:SI 1 "s_register_operand")
                  (const_int 24)))
!    (set (match_operand:SI 3 "s_register_operand")
       (lshiftrt:SI (match_dup 1)
  		  (const_int 24)))
     (set (match_dup 3)
       (ior:SI (match_dup 3)
  	     (match_dup 2)))
!    (set (match_operand:SI 4 "s_register_operand")
       (const_int 16))
!    (set (match_operand:SI 5 "s_register_operand")
       (rotatert:SI (match_dup 1)
  		  (match_dup 4)))
     (set (match_dup 2)
***************
*** 11802,11808 ****
     (set (match_dup 5)
       (rotatert:SI (match_dup 5)
  		  (match_dup 4)))
!    (set (match_operand:SI 0 "s_register_operand" "")
       (ior:SI (match_dup 5)
               (match_dup 3)))]
    "TARGET_THUMB"
--- 12241,12247 ----
     (set (match_dup 5)
       (rotatert:SI (match_dup 5)
  		  (match_dup 4)))
!    (set (match_operand:SI 0 "s_register_operand")
       (ior:SI (match_dup 5)
               (match_dup 3)))]
    "TARGET_THUMB"
***************
*** 11818,11826 ****
  ;; rsbpl   r0, r1, #0
  
  (define_expand "modsi3"
!   [(match_operand:SI 0 "register_operand" "")
!    (match_operand:SI 1 "register_operand" "")
!    (match_operand:SI 2 "const_int_operand" "")]
    "TARGET_32BIT"
    {
      HOST_WIDE_INT val = INTVAL (operands[2]);
--- 12257,12265 ----
  ;; rsbpl   r0, r1, #0
  
  (define_expand "modsi3"
!   [(match_operand:SI 0 "register_operand")
!    (match_operand:SI 1 "register_operand")
!    (match_operand:SI 2 "const_int_operand")]
    "TARGET_32BIT"
    {
      HOST_WIDE_INT val = INTVAL (operands[2]);
***************
*** 11879,11886 ****
  )
  
  (define_expand "bswapsi2"
!   [(set (match_operand:SI 0 "s_register_operand" "=r")
!   	(bswap:SI (match_operand:SI 1 "s_register_operand" "r")))]
  "TARGET_EITHER && (arm_arch6 || !optimize_size)"
  "
      if (!arm_arch6)
--- 12318,12325 ----
  )
  
  (define_expand "bswapsi2"
!   [(set (match_operand:SI 0 "s_register_operand")
! 	(bswap:SI (match_operand:SI 1 "s_register_operand")))]
  "TARGET_EITHER && (arm_arch6 || !optimize_size)"
  "
      if (!arm_arch6)
***************
*** 11975,11982 ****
  )
  
  (define_expand "bswaphi2"
!   [(set (match_operand:HI 0 "s_register_operand" "=r")
! 	(bswap:HI (match_operand:HI 1 "s_register_operand" "r")))]
  "arm_arch6"
  ""
  )
--- 12414,12421 ----
  )
  
  (define_expand "bswaphi2"
!   [(set (match_operand:HI 0 "s_register_operand")
! 	(bswap:HI (match_operand:HI 1 "s_register_operand")))]
  "arm_arch6"
  ""
  )
***************
*** 12068,12074 ****
     (set_attr "predicable" "yes")])
  
  ;; ARMv8 CRC32 instructions.
! (define_insn "<crc_variant>"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
          (unspec:SI [(match_operand:SI 1 "s_register_operand" "r")
                      (match_operand:<crc_mode> 2 "s_register_operand" "r")]
--- 12507,12513 ----
     (set_attr "predicable" "yes")])
  
  ;; ARMv8 CRC32 instructions.
! (define_insn "arm_<crc_variant>"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
          (unspec:SI [(match_operand:SI 1 "s_register_operand" "r")
                      (match_operand:<crc_mode> 2 "s_register_operand" "r")]
***************
*** 12184,12190 ****
    DONE;
  })
  
! (define_insn "<cdp>"
    [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
  		     (match_operand:SI 1 "immediate_operand" "n")
  		     (match_operand:SI 2 "immediate_operand" "n")
--- 12623,12629 ----
    DONE;
  })
  
! (define_insn "arm_<cdp>"
    [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
  		     (match_operand:SI 1 "immediate_operand" "n")
  		     (match_operand:SI 2 "immediate_operand" "n")
***************
*** 12230,12248 ****
    [(set_attr "length" "4")
     (set_attr "type" "coproc")])
  
! (define_expand "<ldc>"
    [(unspec_volatile [(match_operand:SI 0 "immediate_operand")
  		     (match_operand:SI 1 "immediate_operand")
  		     (mem:SI (match_operand:SI 2 "s_register_operand"))] LDCI)]
    "arm_coproc_builtin_available (VUNSPEC_<LDC>)")
  
! (define_expand "<stc>"
    [(unspec_volatile [(match_operand:SI 0 "immediate_operand")
  		     (match_operand:SI 1 "immediate_operand")
  		     (mem:SI (match_operand:SI 2 "s_register_operand"))] STCI)]
    "arm_coproc_builtin_available (VUNSPEC_<STC>)")
  
! (define_insn "<mcr>"
    [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
  		     (match_operand:SI 1 "immediate_operand" "n")
  		     (match_operand:SI 2 "s_register_operand" "r")
--- 12669,12687 ----
    [(set_attr "length" "4")
     (set_attr "type" "coproc")])
  
! (define_expand "arm_<ldc>"
    [(unspec_volatile [(match_operand:SI 0 "immediate_operand")
  		     (match_operand:SI 1 "immediate_operand")
  		     (mem:SI (match_operand:SI 2 "s_register_operand"))] LDCI)]
    "arm_coproc_builtin_available (VUNSPEC_<LDC>)")
  
! (define_expand "arm_<stc>"
    [(unspec_volatile [(match_operand:SI 0 "immediate_operand")
  		     (match_operand:SI 1 "immediate_operand")
  		     (mem:SI (match_operand:SI 2 "s_register_operand"))] STCI)]
    "arm_coproc_builtin_available (VUNSPEC_<STC>)")
  
! (define_insn "arm_<mcr>"
    [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
  		     (match_operand:SI 1 "immediate_operand" "n")
  		     (match_operand:SI 2 "s_register_operand" "r")
***************
*** 12262,12268 ****
    [(set_attr "length" "4")
     (set_attr "type" "coproc")])
  
! (define_insn "<mrc>"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(unspec_volatile:SI [(match_operand:SI 1 "immediate_operand" "n")
  			  (match_operand:SI 2 "immediate_operand" "n")
--- 12701,12707 ----
    [(set_attr "length" "4")
     (set_attr "type" "coproc")])
  
! (define_insn "arm_<mrc>"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(unspec_volatile:SI [(match_operand:SI 1 "immediate_operand" "n")
  			  (match_operand:SI 2 "immediate_operand" "n")
***************
*** 12281,12287 ****
    [(set_attr "length" "4")
     (set_attr "type" "coproc")])
  
! (define_insn "<mcrr>"
    [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
  		     (match_operand:SI 1 "immediate_operand" "n")
  		     (match_operand:DI 2 "s_register_operand" "r")
--- 12720,12726 ----
    [(set_attr "length" "4")
     (set_attr "type" "coproc")])
  
! (define_insn "arm_<mcrr>"
    [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
  		     (match_operand:SI 1 "immediate_operand" "n")
  		     (match_operand:DI 2 "s_register_operand" "r")
***************
*** 12297,12303 ****
    [(set_attr "length" "4")
     (set_attr "type" "coproc")])
  
! (define_insn "<mrrc>"
    [(set (match_operand:DI 0 "s_register_operand" "=r")
  	(unspec_volatile:DI [(match_operand:SI 1 "immediate_operand" "n")
  			  (match_operand:SI 2 "immediate_operand" "n")
--- 12736,12742 ----
    [(set_attr "length" "4")
     (set_attr "type" "coproc")])
  
! (define_insn "arm_<mrrc>"
    [(set (match_operand:DI 0 "s_register_operand" "=r")
  	(unspec_volatile:DI [(match_operand:SI 1 "immediate_operand" "n")
  			  (match_operand:SI 2 "immediate_operand" "n")
***************
*** 12339,12345 ****
     (set_attr "length" "8")]
  )
  
! ;; Vector bits common to IWMMXT and Neon
  (include "vec-common.md")
  ;; Load the Intel Wireless Multimedia Extension patterns
  (include "iwmmxt.md")
--- 12778,12784 ----
     (set_attr "length" "8")]
  )
  
! ;; Vector bits common to IWMMXT, Neon and MVE
  (include "vec-common.md")
  ;; Load the Intel Wireless Multimedia Extension patterns
  (include "iwmmxt.md")
***************
*** 12357,12359 ****
--- 12796,12800 ----
  (include "sync.md")
  ;; Fixed-point patterns
  (include "arm-fixed.md")
+ ;; M-profile Vector Extension
+ (include "mve.md")
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm.opt gcc-10.1.0/gcc/config/arm/arm.opt
*** gcc-9.3.0/gcc/config/arm/arm.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the ARM port of the compiler.
  
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for the ARM port of the compiler.
  
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
*************** Target Report Var(unaligned_access) Init
*** 276,283 ****
  Enable unaligned word and halfword accesses to packed data.
  
  mneon-for-64bits
! Target Report RejectNegative Var(use_neon_for_64bits) Init(0)
! Use Neon to perform 64-bits operations rather than core registers.
  
  mslow-flash-data
  Target Report Var(target_slow_flash_data) Init(0)
--- 276,283 ----
  Enable unaligned word and halfword accesses to packed data.
  
  mneon-for-64bits
! Target WarnRemoved
! This option is deprecated and has no effect.
  
  mslow-flash-data
  Target Report Var(target_slow_flash_data) Init(0)
*************** Cost to assume for a branch insn.
*** 306,308 ****
--- 306,312 ----
  mgeneral-regs-only
  Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save
  Generate code which uses the core registers only (r0-r14).
+ 
+ mfdpic
+ Target Report Mask(FDPIC)
+ Enable Function Descriptor PIC mode.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm1020e.md gcc-10.1.0/gcc/config/arm/arm1020e.md
*** gcc-9.3.0/gcc/config/arm/arm1020e.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm1020e.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM 1020E & ARM 1022E Pipeline Description
! ;; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;; Contributed by Richard Earnshaw (richard.earnshaw@arm.com)
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM 1020E & ARM 1022E Pipeline Description
! ;; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;; Contributed by Richard Earnshaw (richard.earnshaw@arm.com)
  ;;
  ;; This file is part of GCC.
***************
*** 72,78 ****
                         adr,bfm,rev,\
                         shift_imm,shift_reg,\
                         mov_imm,mov_reg,mvn_imm,mvn_reg,\
!                        multiple,no_insn"))
   "1020a_e,1020a_m,1020a_w")
  
  ;; ALU operations with a shift-by-constant operand
--- 72,78 ----
                         adr,bfm,rev,\
                         shift_imm,shift_reg,\
                         mov_imm,mov_reg,mvn_imm,mvn_reg,\
!                        multiple"))
   "1020a_e,1020a_m,1020a_w")
  
  ;; ALU operations with a shift-by-constant operand
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm1026ejs.md gcc-10.1.0/gcc/config/arm/arm1026ejs.md
*** gcc-9.3.0/gcc/config/arm/arm1026ejs.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm1026ejs.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM 1026EJ-S Pipeline Description
! ;; Copyright (C) 2003-2019 Free Software Foundation, Inc.
  ;; Written by CodeSourcery, LLC.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM 1026EJ-S Pipeline Description
! ;; Copyright (C) 2003-2020 Free Software Foundation, Inc.
  ;; Written by CodeSourcery, LLC.
  ;;
  ;; This file is part of GCC.
***************
*** 72,78 ****
                         adr,bfm,rev,\
                         shift_imm,shift_reg,\
                         mov_imm,mov_reg,mvn_imm,mvn_reg,\
!                        multiple,no_insn"))
   "a_e,a_m,a_w")
  
  ;; ALU operations with a shift-by-constant operand
--- 72,78 ----
                         adr,bfm,rev,\
                         shift_imm,shift_reg,\
                         mov_imm,mov_reg,mvn_imm,mvn_reg,\
!                        multiple"))
   "a_e,a_m,a_w")
  
  ;; ALU operations with a shift-by-constant operand
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm1136jfs.md gcc-10.1.0/gcc/config/arm/arm1136jfs.md
*** gcc-9.3.0/gcc/config/arm/arm1136jfs.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm1136jfs.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM 1136J[F]-S Pipeline Description
! ;; Copyright (C) 2003-2019 Free Software Foundation, Inc.
  ;; Written by CodeSourcery, LLC.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM 1136J[F]-S Pipeline Description
! ;; Copyright (C) 2003-2020 Free Software Foundation, Inc.
  ;; Written by CodeSourcery, LLC.
  ;;
  ;; This file is part of GCC.
***************
*** 81,87 ****
                         adr,bfm,rev,\
                         shift_imm,shift_reg,\
                         mov_imm,mov_reg,mvn_imm,mvn_reg,\
!                        multiple,no_insn"))
   "e_1,e_2,e_3,e_wb")
  
  ;; ALU operations with a shift-by-constant operand
--- 81,87 ----
                         adr,bfm,rev,\
                         shift_imm,shift_reg,\
                         mov_imm,mov_reg,mvn_imm,mvn_reg,\
!                        multiple"))
   "e_1,e_2,e_3,e_wb")
  
  ;; ALU operations with a shift-by-constant operand
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm926ejs.md gcc-10.1.0/gcc/config/arm/arm926ejs.md
*** gcc-9.3.0/gcc/config/arm/arm926ejs.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm926ejs.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM 926EJ-S Pipeline Description
! ;; Copyright (C) 2003-2019 Free Software Foundation, Inc.
  ;; Written by CodeSourcery, LLC.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM 926EJ-S Pipeline Description
! ;; Copyright (C) 2003-2020 Free Software Foundation, Inc.
  ;; Written by CodeSourcery, LLC.
  ;;
  ;; This file is part of GCC.
***************
*** 67,73 ****
                         shift_imm,shift_reg,extend,\
                         mov_imm,mov_reg,mov_shift,\
                         mvn_imm,mvn_reg,mvn_shift,\
!                        multiple,no_insn"))
   "e,m,w")
  
  ;; ALU operations with a shift-by-register operand
--- 67,73 ----
                         shift_imm,shift_reg,extend,\
                         mov_imm,mov_reg,mov_shift,\
                         mvn_imm,mvn_reg,mvn_shift,\
!                        multiple"))
   "e,m,w")
  
  ;; ALU operations with a shift-by-register operand
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm_acle.h gcc-10.1.0/gcc/config/arm/arm_acle.h
*** gcc-9.3.0/gcc/config/arm/arm_acle.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm_acle.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* ARM Non-NEON ACLE intrinsics include file.
  
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,6 ----
  /* ARM Non-NEON ACLE intrinsics include file.
  
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
*************** __arm_mrrc2 (const unsigned int __coproc
*** 173,178 ****
--- 173,701 ----
  #endif /*  __ARM_ARCH >= 5.  */
  #endif /* (!__thumb__ || __thumb2__) &&  __ARM_ARCH >= 4.  */
  
+ #ifdef __ARM_FEATURE_SIMD32
+ typedef int32_t int16x2_t;
+ typedef uint32_t uint16x2_t;
+ typedef int32_t int8x4_t;
+ typedef uint32_t uint8x4_t;
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __sxtab16 (int16x2_t __a, int8x4_t __b)
+ {
+   return __builtin_arm_sxtab16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __sxtb16 (int8x4_t __a)
+ {
+   return __builtin_arm_sxtb16 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uxtab16 (uint16x2_t __a, uint8x4_t __b)
+ {
+   return __builtin_arm_uxtab16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uxtb16 (uint8x4_t __a)
+ {
+   return __builtin_arm_uxtb16 (__a);
+ }
+ 
+ __extension__ extern __inline int8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __qadd8 (int8x4_t __a, int8x4_t __b)
+ {
+   return __builtin_arm_qadd8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __qsub8 (int8x4_t __a, int8x4_t __b)
+ {
+   return __builtin_arm_qsub8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __shadd8 (int8x4_t __a, int8x4_t __b)
+ {
+   return __builtin_arm_shadd8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __shsub8 (int8x4_t __a, int8x4_t __b)
+ {
+   return __builtin_arm_shsub8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uhadd8 (uint8x4_t __a, uint8x4_t __b)
+ {
+   return __builtin_arm_uhadd8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uhsub8 (uint8x4_t __a, uint8x4_t __b)
+ {
+   return __builtin_arm_uhsub8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uqadd8 (uint8x4_t __a, uint8x4_t __b)
+ {
+   return __builtin_arm_uqadd8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uqsub8 (uint8x4_t __a, uint8x4_t __b)
+ {
+   return __builtin_arm_uqsub8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __qadd16 (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_qadd16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __qasx (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_qasx (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __qsax (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_qsax (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __qsub16 (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_qsub16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __shadd16 (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_shadd16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __shasx (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_shasx (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __shsax (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_shsax (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __shsub16 (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_shsub16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uhadd16 (uint16x2_t __a, uint16x2_t __b)
+ {
+   return __builtin_arm_uhadd16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uhasx (uint16x2_t __a, uint16x2_t __b)
+ {
+   return __builtin_arm_uhasx (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uhsax (uint16x2_t __a, uint16x2_t __b)
+ {
+   return __builtin_arm_uhsax (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uhsub16 (uint16x2_t __a, uint16x2_t __b)
+ {
+   return __builtin_arm_uhsub16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uqadd16 (uint16x2_t __a, uint16x2_t __b)
+ {
+   return __builtin_arm_uqadd16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uqasx (uint16x2_t __a, uint16x2_t __b)
+ {
+   return __builtin_arm_uqasx (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uqsax (uint16x2_t __a, uint16x2_t __b)
+ {
+   return __builtin_arm_uqsax (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uqsub16 (uint16x2_t __a, uint16x2_t __b)
+ {
+   return __builtin_arm_uqsub16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smusd (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_smusd (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smusdx (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_smusdx (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __usad8 (uint8x4_t __a, uint8x4_t __b)
+ {
+   return __builtin_arm_usad8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __usada8 (uint8x4_t __a, uint8x4_t __b, uint32_t __c)
+ {
+   return __builtin_arm_usada8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smlald (int16x2_t __a, int16x2_t __b, int64_t __c)
+ {
+   return __builtin_arm_smlald (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smlaldx (int16x2_t __a, int16x2_t __b, int64_t __c)
+ {
+   return __builtin_arm_smlaldx (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smlsld (int16x2_t __a, int16x2_t __b, int64_t __c)
+ {
+   return __builtin_arm_smlsld (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smlsldx (int16x2_t __a, int16x2_t __b, int64_t __c)
+ {
+   return __builtin_arm_smlsldx (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __sel (uint8x4_t __a, uint8x4_t __b)
+ {
+   return __builtin_arm_sel (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __sadd8 (int8x4_t __a, int8x4_t __b)
+ {
+   return __builtin_arm_sadd8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __ssub8 (int8x4_t __a, int8x4_t __b)
+ {
+   return __builtin_arm_ssub8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uadd8 (uint8x4_t __a, uint8x4_t __b)
+ {
+   return __builtin_arm_uadd8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __usub8 (uint8x4_t __a, uint8x4_t __b)
+ {
+   return __builtin_arm_usub8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __sadd16 (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_sadd16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __sasx (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_sasx (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __ssax (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_ssax (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __ssub16 (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_ssub16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uadd16 (uint16x2_t __a, uint16x2_t __b)
+ {
+   return __builtin_arm_uadd16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __uasx (uint16x2_t __a, uint16x2_t __b)
+ {
+   return __builtin_arm_uasx (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __usax (uint16x2_t __a, uint16x2_t __b)
+ {
+   return __builtin_arm_usax (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __usub16 (uint16x2_t __a, uint16x2_t __b)
+ {
+   return __builtin_arm_usub16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smlad (int16x2_t __a, int16x2_t __b, int32_t __c)
+ {
+   return __builtin_arm_smlad (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smladx (int16x2_t __a, int16x2_t __b, int32_t __c)
+ {
+   return __builtin_arm_smladx (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smlsd (int16x2_t __a, int16x2_t __b, int32_t __c)
+ {
+   return __builtin_arm_smlsd (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smlsdx (int16x2_t __a, int16x2_t __b, int32_t __c)
+ {
+   return __builtin_arm_smlsdx (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smuad (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_smuad (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smuadx (int16x2_t __a, int16x2_t __b)
+ {
+   return __builtin_arm_smuadx (__a, __b);
+ }
+ 
+ #define __ssat16(__a, __sat)					\
+   __extension__							\
+   ({								\
+     int16x2_t __arg = (__a);					\
+     __builtin_sat_imm_check (__sat, 1, 16);			\
+     int16x2_t __res = __builtin_arm_ssat16 (__arg, __sat);	\
+     __res;							\
+   })
+ 
+ #define __usat16(__a, __sat)					\
+   __extension__							\
+   ({								\
+     int16x2_t __arg = (__a);					\
+     __builtin_sat_imm_check (__sat, 0, 15);			\
+     int16x2_t __res = __builtin_arm_usat16 (__arg, __sat);	\
+     __res;							\
+   })
+ 
+ #endif
+ 
+ #ifdef __ARM_FEATURE_SAT
+ 
+ #define __ssat(__a, __sat)				\
+   __extension__						\
+   ({							\
+     int32_t __arg = (__a);				\
+     __builtin_sat_imm_check (__sat, 1, 32);		\
+     int32_t __res = __builtin_arm_ssat (__arg, __sat);	\
+     __res;						\
+   })
+ 
+ #define __usat(__a, __sat)				\
+   __extension__						\
+   ({							\
+     int32_t __arg = (__a);				\
+     __builtin_sat_imm_check (__sat, 0, 31);		\
+     uint32_t __res = __builtin_arm_usat (__arg, __sat);	\
+     __res;						\
+   })
+ 
+ #endif
+ 
+ #ifdef __ARM_FEATURE_QBIT
+ __extension__ extern __inline void
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ __ignore_saturation (void)
+ {
+   /* ACLE designates this intrinsic as a hint.
+      Implement as a nop for now.  */
+ }
+ 
+ /* These are defined as macros because the implementation of the builtins
+    requires easy access to the current function so wrapping it in an
+    always_inline function complicates things.  */
+ 
+ #define __saturation_occurred __builtin_arm_saturation_occurred
+ 
+ #define __set_saturation_occurred(__a)			\
+   __extension__						\
+   ({							\
+     int __arg = (__a);					\
+     __builtin_arm_set_saturation (__arg);		\
+   })
+ #endif
+ 
+ #ifdef __ARM_FEATURE_DSP
+ __extension__ extern __inline int32_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ __qadd (int32_t __a, int32_t __b)
+ {
+   return __builtin_arm_qadd (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ __qsub (int32_t __a, int32_t __b)
+ {
+   return __builtin_arm_qsub (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ __qdbl (int32_t __x)
+ {
+   return __qadd (__x, __x);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ __smlabb (int32_t __a, int32_t __b, int32_t __c)
+ {
+   return __builtin_arm_smlabb (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ __smlatb (int32_t __a, int32_t __b, int32_t __c)
+ {
+   return __builtin_arm_smlatb (__a, __b, __c);
+ }
+ 
+ /* smlatb is equivalent to smlabt with the two multiplication operands
+    swapped around.  */
+ __extension__ extern __inline int32_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ __smlabt (int32_t __a, int32_t __b, int32_t __c)
+ {
+   return __smlatb (__b, __a, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ __smlatt (int32_t __a, int32_t __b, int32_t __c)
+ {
+   return __builtin_arm_smlatt (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smlawb (int32_t __a, int32_t __b, int32_t __c)
+ {
+   return __builtin_arm_smlawb (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __smlawt (int32_t __a, int32_t __b, int32_t __c)
+ {
+   return __builtin_arm_smlawt (__a, __b, __c);
+ }
+ #endif
+ 
  #pragma GCC push_options
  #ifdef __ARM_FEATURE_CRC32
  #ifdef __ARM_FP
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm_acle_builtins.def gcc-10.1.0/gcc/config/arm/arm_acle_builtins.def
*** gcc-9.3.0/gcc/config/arm/arm_acle_builtins.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm_acle_builtins.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* ACLE builtin definitions for ARM.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* ACLE builtin definitions for ARM.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
*************** VAR1 (MCRR, mcrr, void)
*** 42,44 ****
--- 42,119 ----
  VAR1 (MCRR, mcrr2, void)
  VAR1 (MRRC, mrrc, di)
  VAR1 (MRRC, mrrc2, di)
+ 
+ VAR1 (BINOP, sxtab16, si)
+ VAR1 (UBINOP, uxtab16, si)
+ VAR1 (UNOP, sxtb16, si)
+ VAR1 (BSWAP, uxtb16, si)
+ VAR1 (BINOP, qadd8, si)
+ VAR1 (BINOP, qsub8, si)
+ VAR1 (BINOP, shadd8, si)
+ VAR1 (BINOP, shsub8, si)
+ VAR1 (UBINOP, uhadd8, si)
+ VAR1 (UBINOP, uhsub8, si)
+ VAR1 (UBINOP, uqadd8, si)
+ VAR1 (UBINOP, uqsub8, si)
+ VAR1 (BINOP, qadd16, si)
+ VAR1 (BINOP, qasx, si)
+ VAR1 (BINOP, qsax, si)
+ VAR1 (BINOP, qsub16, si)
+ VAR1 (BINOP, shadd16, si)
+ VAR1 (BINOP, shasx, si)
+ VAR1 (BINOP, shsax, si)
+ VAR1 (BINOP, shsub16, si)
+ VAR1 (UBINOP, uhadd16, si)
+ VAR1 (UBINOP, uhasx, si)
+ VAR1 (UBINOP, uhsax, si)
+ VAR1 (UBINOP, uhsub16, si)
+ VAR1 (UBINOP, uqadd16, si)
+ VAR1 (UBINOP, uqasx, si)
+ VAR1 (UBINOP, uqsax, si)
+ VAR1 (UBINOP, uqsub16, si)
+ VAR1 (BINOP, smusd, si)
+ VAR1 (BINOP, smusdx, si)
+ VAR1 (UBINOP, usad8, si)
+ VAR1 (UBINOP, usada8, si)
+ VAR1 (TERNOP, smlald, di)
+ VAR1 (TERNOP, smlaldx, di)
+ VAR1 (TERNOP, smlsld, di)
+ VAR1 (TERNOP, smlsldx, di)
+ 
+ VAR1 (SAT_BINOP_UNSIGNED_IMM, ssat, si)
+ VAR1 (UNSIGNED_SAT_BINOP_UNSIGNED_IMM, usat, si)
+ VAR1 (SAT_OCCURRED, saturation_occurred, si)
+ VAR1 (SET_SAT, set_saturation, void)
+ VAR1 (BINOP, qadd, si)
+ VAR1 (BINOP, qsub, si)
+ VAR1 (TERNOP, smlabb, si)
+ VAR1 (TERNOP, smlatb, si)
+ VAR1 (TERNOP, smlatt, si)
+ VAR1 (TERNOP, smlawb, si)
+ VAR1 (TERNOP, smlawt, si)
+ 
+ VAR1 (BINOP, sadd8, si)
+ VAR1 (BINOP, ssub8, si)
+ VAR1 (BINOP, sadd16, si)
+ VAR1 (BINOP, sasx, si)
+ VAR1 (BINOP, ssax, si)
+ VAR1 (BINOP, ssub16, si)
+ 
+ VAR1 (UBINOP, uadd8, si)
+ VAR1 (UBINOP, usub8, si)
+ VAR1 (UBINOP, uadd16, si)
+ VAR1 (UBINOP, uasx, si)
+ VAR1 (UBINOP, usax, si)
+ VAR1 (UBINOP, usub16, si)
+ 
+ VAR1 (UBINOP, sel, si)
+ 
+ VAR1 (TERNOP, smlad, si)
+ VAR1 (TERNOP, smladx, si)
+ VAR1 (TERNOP, smlsd, si)
+ VAR1 (TERNOP, smlsdx, si)
+ VAR1 (BINOP, smuad, si)
+ VAR1 (BINOP, smuadx, si)
+ 
+ VAR1 (SAT_BINOP_UNSIGNED_IMM, ssat16, si)
+ VAR1 (SAT_BINOP_UNSIGNED_IMM, usat16, si)
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm_bf16.h gcc-10.1.0/gcc/config/arm/arm_bf16.h
*** gcc-9.3.0/gcc/config/arm/arm_bf16.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/arm/arm_bf16.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,55 ----
+ /* Arm BF16 intrinsics include file.
+ 
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published
+    by the Free Software Foundation; either version 3, or (at your
+    option) any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    Under Section 7 of GPL version 3, you are granted additional
+    permissions described in the GCC Runtime Library Exception, version
+    3.1, as published by the Free Software Foundation.
+ 
+    You should have received a copy of the GNU General Public License and
+    a copy of the GCC Runtime Library Exception along with this program;
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ 
+ #ifndef _GCC_ARM_BF16_H
+ #define _GCC_ARM_BF16_H 1
+ 
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ typedef __bf16 bfloat16_t;
+ typedef float float32_t;
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcvtah_f32_bf16 (bfloat16_t __a)
+ {
+   return __builtin_neon_vbfcvtbf (__a);
+ }
+ 
+ __extension__ extern __inline bfloat16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcvth_bf16_f32 (float32_t __a)
+ {
+   return __builtin_neon_vbfcvtsf (__a);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm_cde.h gcc-10.1.0/gcc/config/arm/arm_cde.h
*** gcc-9.3.0/gcc/config/arm/arm_cde.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/arm/arm_cde.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,176 ----
+ /* Arm Custom Datapath Extension (CDE) intrinsics include file.
+ 
+    Copyright (C) 2020 Free Software Foundation, Inc.
+    Contributed by Arm Ltd.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published
+    by the Free Software Foundation; either version 3, or (at your
+    option) any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    Under Section 7 of GPL version 3, you are granted additional
+    permissions described in the GCC Runtime Library Exception, version
+    3.1, as published by the Free Software Foundation.
+ 
+    You should have received a copy of the GNU General Public License and
+    a copy of the GCC Runtime Library Exception along with this program;
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef _GCC_ARM_CDE_H
+ #define _GCC_ARM_CDE_H 1
+ 
+ #include <stdint.h>
+ 
+ #if defined (__ARM_FEATURE_CDE)
+ 
+ #define __arm_cx1(coproc, imm) \
+ 	__builtin_arm_cx1si(coproc, imm)
+ 
+ #define __arm_cx1a(coproc, acc, imm) \
+ 	__builtin_arm_cx1asi(coproc, acc, imm)
+ 
+ #define __arm_cx2(coproc, n, imm) \
+ 	__builtin_arm_cx2si(coproc, n, imm)
+ 
+ #define __arm_cx2a(coproc, acc, n, imm) \
+ 	__builtin_arm_cx2asi(coproc, acc, n, imm)
+ 
+ #define __arm_cx3(coproc, n, m, imm) \
+ 	__builtin_arm_cx3si(coproc, n, m, imm)
+ 
+ #define __arm_cx3a(coproc, acc, n, m, imm) \
+ 	__builtin_arm_cx3asi(coproc, acc, n, m, imm)
+ 
+ #define __arm_cx1d(coproc, imm) \
+ 	__builtin_arm_cx1di(coproc, imm)
+ 
+ #define __arm_cx1da(coproc, acc, imm) \
+ 	__builtin_arm_cx1adi(coproc, acc, imm)
+ 
+ #define __arm_cx2d(coproc, n, imm) \
+ 	__builtin_arm_cx2di(coproc, n, imm)
+ 
+ #define __arm_cx2da(coproc, acc, n, imm) \
+ 	__builtin_arm_cx2adi(coproc, acc, n, imm)
+ 
+ #define __arm_cx3d(coproc, n, m, imm) \
+ 	__builtin_arm_cx3di(coproc, n, m, imm)
+ 
+ #define __arm_cx3da(coproc, acc, n, m, imm) \
+ 	__builtin_arm_cx3adi(coproc, acc, n, m, imm)
+ 
+ #if defined (__ARM_FP) || defined (__ARM_FEATURE_MVE)
+ 
+ /* CDE builtins using FPU/MVE registers.  */
+ 
+ /* uint32_t
+    __arm_vcx1_u32(int coproc, uint32_t imm);  */
+ #define __arm_vcx1_u32(coproc, imm) \
+ 	__builtin_arm_vcx1si(coproc, imm)
+ 
+ /* uint32_t
+    __arm_vcx1a_u32(int coproc, uint32_t acc, uint32_t imm);  */
+ #define __arm_vcx1a_u32(coproc, acc, imm) \
+ 	__builtin_arm_vcx1asi(coproc, acc, imm)
+ 
+ /* uint32_t
+    __arm_vcx2_u32(int coproc, uint32_t n, uint32_t imm);  */
+ #define __arm_vcx2_u32(coproc, n, imm) \
+ 	__builtin_arm_vcx2si(coproc, n, imm)
+ 
+ /* uint32_t
+    __arm_vcx2a_u32(int coproc, uint32_t acc, uint32_t n, uint32_t imm);  */
+ #define __arm_vcx2a_u32(coproc, acc, n, imm) \
+ 	__builtin_arm_vcx2asi(coproc, acc, n, imm)
+ 
+ /* uint32_t
+    __arm_vcx3_u32(int coproc, uint32_t n, uint32_t m, uint32_t imm);  */
+ #define __arm_vcx3_u32(coproc, n, m, imm) \
+ 	__builtin_arm_vcx3si(coproc, n, m, imm)
+ 
+ /* uint32_t
+    __arm_vcx3a_u32(int coproc, uint32_t acc, uint32_t n, uint32_t m,
+ 		   uint32_t imm);  */
+ #define __arm_vcx3a_u32(coproc, acc, n, m, imm) \
+ 	__builtin_arm_vcx3asi(coproc, acc, n, m, imm)
+ 
+ /* uint64_t
+    __arm_vcx1d_u64(int coproc, uint32_t imm);  */
+ #define __arm_vcx1d_u64(coproc, imm) \
+ 	__builtin_arm_vcx1di(coproc, imm)
+ 
+ /* uint64_t
+    __arm_vcx1da_u64(int coproc, uint64_t acc, uint32_t imm);  */
+ #define __arm_vcx1da_u64(coproc, acc, imm) \
+ 	__builtin_arm_vcx1adi(coproc, acc, imm)
+ 
+ /* uint64_t
+    __arm_vcx2d_u64(int coproc, uint64_t m, uint32_t imm);  */
+ #define __arm_vcx2d_u64(coproc, m, imm) \
+ 	__builtin_arm_vcx2di(coproc, m, imm)
+ 
+ /* uint64_t
+    __arm_vcx2da_u64(int coproc, uint64_t acc, uint64_t m, uint32_t imm);  */
+ #define __arm_vcx2da_u64(coproc, acc, m, imm) \
+ 	__builtin_arm_vcx2adi(coproc, acc, m, imm)
+ 
+ /* uint64_t
+    __arm_vcx3d_u64(int coproc, uint64_t n, uint64_t m, uint32_t imm);  */
+ #define __arm_vcx3d_u64(coproc, n, m, imm) \
+ 	__builtin_arm_vcx3di(coproc, n, m, imm)
+ 
+ /* uint64_t
+    __arm_vcx3da_u64(int coproc, uint64_t acc, uint64_t n, uint64_t m,
+ 		    uint32_t imm);  */
+ #define __arm_vcx3da_u64(coproc, acc, n, m, imm) \
+ 	__builtin_arm_vcx3adi(coproc, acc, n, m, imm)
+ 
+ #endif /* __ARM_FP || __ARM_FEATURE_MVE.  */
+ #endif /* __ARM_FEATURE_CDE.  */
+ 
+ #if __ARM_FEATURE_MVE
+ #include "arm_mve_types.h"
+ 
+ #define __arm_vcx1q_u8(coproc, imm) \
+ 	(uint8x16_t)__builtin_arm_vcx1qv16qi(coproc, imm)
+ #define __arm_vcx1qa(coproc, acc, imm) \
+ 	__builtin_arm_vcx1qav16qi(coproc, acc, imm)
+ #define __arm_vcx2q(coproc, n, imm) \
+ 	__builtin_arm_vcx2qv16qi(coproc, n, imm)
+ #define __arm_vcx2q_u8(coproc, n, imm) \
+ 	(uint8x16_t)__builtin_arm_vcx2qv16qi(coproc, n, imm)
+ #define __arm_vcx2qa(coproc, acc, n, imm) \
+ 	__builtin_arm_vcx2qav16qi(coproc, acc, n, imm)
+ #define __arm_vcx3q(coproc, n, m, imm) \
+ 	__builtin_arm_vcx3qv16qi(coproc, n, m, imm)
+ #define __arm_vcx3q_u8(coproc, n, m, imm) \
+ 	(uint8x16_t)__builtin_arm_vcx3qv16qi(coproc, n, m, imm)
+ #define __arm_vcx3qa(coproc, acc, n, m, imm) \
+ 	__builtin_arm_vcx3qav16qi(coproc, acc, n, m, imm)
+ 
+ #define __arm_vcx1q_m(coproc, inactive, imm, pred) \
+ 	__builtin_arm_vcx1q_p_v16qi(coproc, inactive, imm, pred)
+ #define __arm_vcx1qa_m(coproc, acc, imm, pred) \
+ 	__builtin_arm_vcx1qa_p_v16qi(coproc, acc, imm, pred)
+ 
+ #define __arm_vcx2q_m(coproc, inactive, n, imm, pred) \
+ 	__builtin_arm_vcx2q_p_v16qi(coproc, inactive, n, imm, pred)
+ #define __arm_vcx2qa_m(coproc, acc, n, imm, pred) \
+ 	__builtin_arm_vcx2qa_p_v16qi(coproc, acc, n, imm, pred)
+ 
+ #define __arm_vcx3q_m(coproc, inactive, n, m, imm, pred) \
+ 	__builtin_arm_vcx3q_p_v16qi(coproc, inactive, n, m, imm, pred)
+ #define __arm_vcx3qa_m(coproc, acc, n, m, imm, pred) \
+ 	__builtin_arm_vcx3qa_p_v16qi(coproc, acc, n, m, imm, pred)
+ 
+ #endif
+ 
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm_cde_builtins.def gcc-10.1.0/gcc/config/arm/arm_cde_builtins.def
*** gcc-9.3.0/gcc/config/arm/arm_cde_builtins.def	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/arm/arm_cde_builtins.def	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,58 ----
+ /* Arm Custom Datapath Extension (CDE) builtin definitions.
+    Copyright (C) 2020 Free Software Foundation, Inc.
+    Contributed by Arm Ltd.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published
+    by the Free Software Foundation; either version 3, or (at your
+    option) any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #undef CDE_VAR2
+ #define CDE_VAR2(T, N, A, B, IMM_MAX, ECF_FLAG) \
+   VAR1 (T, N, A, IMM_MAX, ECF_FLAG) \
+   VAR1 (T, N, B, IMM_MAX, ECF_FLAG)
+ 
+ CDE_VAR2 (CX_IMM, cx1, si, di, ARM_CCDE_CONST_1, ECF_CONST)
+ CDE_VAR2 (CX_UNARY, cx1a, si, di, ARM_CCDE_CONST_1, ECF_CONST)
+ CDE_VAR2 (CX_UNARY, cx2, si, di, ARM_CCDE_CONST_2, ECF_CONST)
+ CDE_VAR2 (CX_BINARY, cx2a, si, di, ARM_CCDE_CONST_2, ECF_CONST)
+ CDE_VAR2 (CX_BINARY, cx3, si, di, ARM_CCDE_CONST_3, ECF_CONST)
+ CDE_VAR2 (CX_TERNARY, cx3a, si, di, ARM_CCDE_CONST_3, ECF_CONST)
+ 
+ CDE_VAR2 (CX_IMM, vcx1, si, di, ARM_VCDE_CONST_1, ECF_CONST)
+ CDE_VAR2 (CX_UNARY, vcx1a, si, di, ARM_VCDE_CONST_1, ECF_CONST)
+ CDE_VAR2 (CX_UNARY, vcx2, si, di, ARM_VCDE_CONST_2, ECF_CONST)
+ CDE_VAR2 (CX_BINARY, vcx2a, si, di, ARM_VCDE_CONST_2, ECF_CONST)
+ CDE_VAR2 (CX_BINARY, vcx3, si, di, ARM_VCDE_CONST_3, ECF_CONST)
+ CDE_VAR2 (CX_TERNARY, vcx3a, si, di, ARM_VCDE_CONST_3, ECF_CONST)
+ 
+ /* NOTE: The MVE intrinsics must be defined at the end of this file, and with
+ 	 vcx1q first.  Amongst the MVE intrinsics, the predicated ones are
+ 	 defined last.
+          These restrictions are relied on to determine which intrinsics need
+ 	 overload resolution in `arm_resolve_overloaded_builtin`.  */
+ VAR1 (CX_IMM, vcx1q, v16qi, ARM_MVE_CDE_CONST_1, ECF_CONST)
+ VAR1 (CX_UNARY, vcx1qa, v16qi, ARM_MVE_CDE_CONST_1, ECF_CONST)
+ VAR1 (CX_UNARY, vcx2q, v16qi, ARM_MVE_CDE_CONST_2, ECF_CONST)
+ VAR1 (CX_BINARY, vcx2qa, v16qi, ARM_MVE_CDE_CONST_2, ECF_CONST)
+ VAR1 (CX_BINARY, vcx3q, v16qi, ARM_MVE_CDE_CONST_3, ECF_CONST)
+ VAR1 (CX_TERNARY, vcx3qa, v16qi, ARM_MVE_CDE_CONST_3, ECF_CONST)
+ 
+ VAR1 (CX_UNARY_UNONE, vcx1q_p_, v16qi, ARM_MVE_CDE_CONST_1, ECF_CONST)
+ VAR1 (CX_UNARY_UNONE, vcx1qa_p_, v16qi, ARM_MVE_CDE_CONST_1, ECF_CONST)
+ VAR1 (CX_BINARY_UNONE, vcx2q_p_, v16qi, ARM_MVE_CDE_CONST_2, ECF_CONST)
+ VAR1 (CX_BINARY_UNONE, vcx2qa_p_, v16qi, ARM_MVE_CDE_CONST_2, ECF_CONST)
+ VAR1 (CX_TERNARY_UNONE, vcx3q_p_, v16qi, ARM_MVE_CDE_CONST_3, ECF_CONST)
+ VAR1 (CX_TERNARY_UNONE, vcx3qa_p_, v16qi, ARM_MVE_CDE_CONST_3, ECF_CONST)
+ #undef CDE_VAR2
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm_cmse.h gcc-10.1.0/gcc/config/arm/arm_cmse.h
*** gcc-9.3.0/gcc/config/arm/arm_cmse.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm_cmse.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* ARMv8-M Secure Extensions intrinsics include file.
  
!    Copyright (C) 2015-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,6 ----
  /* ARMv8-M Secure Extensions intrinsics include file.
  
!    Copyright (C) 2015-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
*************** __CMSE_TT_ASM (at)
*** 164,169 ****
--- 164,170 ----
  
  /* FIXME: diagnose use outside cmse_nonsecure_entry functions.  */
  __extension__ static __inline int __attribute__ ((__always_inline__))
+ __attribute__ ((warn_unused_result))
  cmse_nonsecure_caller (void)
  {
    return __builtin_arm_cmse_nonsecure_caller ();
*************** cmse_nonsecure_caller (void)
*** 184,189 ****
--- 185,191 ----
  #define CMSE_MPU_READ		8
  
  __extension__ void *
+ __attribute__ ((warn_unused_result))
  cmse_check_address_range (void *, size_t, int);
  
  #define cmse_check_pointed_object(p, f) \
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm_fp16.h gcc-10.1.0/gcc/config/arm/arm_fp16.h
*** gcc-9.3.0/gcc/config/arm/arm_fp16.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm_fp16.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* ARM FP16 intrinsics include file.
  
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,6 ----
  /* ARM FP16 intrinsics include file.
  
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm_mve.h gcc-10.1.0/gcc/config/arm/arm_mve.h
*** gcc-9.3.0/gcc/config/arm/arm_mve.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/arm/arm_mve.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,42125 ----
+ /* Arm MVE intrinsics include file.
+ 
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+    Contributed by Arm.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published
+    by the Free Software Foundation; either version 3, or (at your
+    option) any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef _GCC_ARM_MVE_H
+ #define _GCC_ARM_MVE_H
+ 
+ #if __ARM_BIG_ENDIAN
+ #error "MVE intrinsics are not supported in Big-Endian mode."
+ #elif !__ARM_FEATURE_MVE
+ #error "MVE feature not supported"
+ #else
+ 
+ #include <stdint.h>
+ #ifndef  __cplusplus
+ #include <stdbool.h>
+ #endif
+ #include "arm_mve_types.h"
+ 
+ #ifndef __ARM_MVE_PRESERVE_USER_NAMESPACE
+ #define vst4q(__addr, __value) __arm_vst4q(__addr, __value)
+ #define vdupq_n(__a) __arm_vdupq_n(__a)
+ #define vabsq(__a) __arm_vabsq(__a)
+ #define vclsq(__a) __arm_vclsq(__a)
+ #define vclzq(__a) __arm_vclzq(__a)
+ #define vnegq(__a) __arm_vnegq(__a)
+ #define vaddlvq(__a) __arm_vaddlvq(__a)
+ #define vaddvq(__a) __arm_vaddvq(__a)
+ #define vmovlbq(__a) __arm_vmovlbq(__a)
+ #define vmovltq(__a) __arm_vmovltq(__a)
+ #define vmvnq(__a) __arm_vmvnq(__a)
+ #define vrev16q(__a) __arm_vrev16q(__a)
+ #define vrev32q(__a) __arm_vrev32q(__a)
+ #define vrev64q(__a) __arm_vrev64q(__a)
+ #define vqabsq(__a) __arm_vqabsq(__a)
+ #define vqnegq(__a) __arm_vqnegq(__a)
+ #define vshrq(__a, __imm) __arm_vshrq(__a, __imm)
+ #define vaddlvq_p(__a, __p) __arm_vaddlvq_p(__a, __p)
+ #define vcmpneq(__a, __b) __arm_vcmpneq(__a, __b)
+ #define vshlq(__a, __b) __arm_vshlq(__a, __b)
+ #define vsubq(__a, __b) __arm_vsubq(__a, __b)
+ #define vrmulhq(__a, __b) __arm_vrmulhq(__a, __b)
+ #define vrhaddq(__a, __b) __arm_vrhaddq(__a, __b)
+ #define vqsubq(__a, __b) __arm_vqsubq(__a, __b)
+ #define vqaddq(__a, __b) __arm_vqaddq(__a, __b)
+ #define vorrq(__a, __b) __arm_vorrq(__a, __b)
+ #define vornq(__a, __b) __arm_vornq(__a, __b)
+ #define vmulq(__a, __b) __arm_vmulq(__a, __b)
+ #define vmulltq_int(__a, __b) __arm_vmulltq_int(__a, __b)
+ #define vmullbq_int(__a, __b) __arm_vmullbq_int(__a, __b)
+ #define vmulhq(__a, __b) __arm_vmulhq(__a, __b)
+ #define vmladavq(__a, __b) __arm_vmladavq(__a, __b)
+ #define vminvq(__a, __b) __arm_vminvq(__a, __b)
+ #define vminq(__a, __b) __arm_vminq(__a, __b)
+ #define vmaxvq(__a, __b) __arm_vmaxvq(__a, __b)
+ #define vmaxq(__a, __b) __arm_vmaxq(__a, __b)
+ #define vhsubq(__a, __b) __arm_vhsubq(__a, __b)
+ #define vhaddq(__a, __b) __arm_vhaddq(__a, __b)
+ #define veorq(__a, __b) __arm_veorq(__a, __b)
+ #define vcmphiq(__a, __b) __arm_vcmphiq(__a, __b)
+ #define vcmpeqq(__a, __b) __arm_vcmpeqq(__a, __b)
+ #define vcmpcsq(__a, __b) __arm_vcmpcsq(__a, __b)
+ #define vcaddq_rot90(__a, __b) __arm_vcaddq_rot90(__a, __b)
+ #define vcaddq_rot270(__a, __b) __arm_vcaddq_rot270(__a, __b)
+ #define vbicq(__a, __b) __arm_vbicq(__a, __b)
+ #define vandq(__a, __b) __arm_vandq(__a, __b)
+ #define vaddvq_p(__a, __p) __arm_vaddvq_p(__a, __p)
+ #define vaddvaq(__a, __b) __arm_vaddvaq(__a, __b)
+ #define vaddq(__a, __b) __arm_vaddq(__a, __b)
+ #define vabdq(__a, __b) __arm_vabdq(__a, __b)
+ #define vshlq_r(__a, __b) __arm_vshlq_r(__a, __b)
+ #define vrshlq(__a, __b) __arm_vrshlq(__a, __b)
+ #define vqshlq(__a, __b) __arm_vqshlq(__a, __b)
+ #define vqshlq_r(__a, __b) __arm_vqshlq_r(__a, __b)
+ #define vqrshlq(__a, __b) __arm_vqrshlq(__a, __b)
+ #define vminavq(__a, __b) __arm_vminavq(__a, __b)
+ #define vminaq(__a, __b) __arm_vminaq(__a, __b)
+ #define vmaxavq(__a, __b) __arm_vmaxavq(__a, __b)
+ #define vmaxaq(__a, __b) __arm_vmaxaq(__a, __b)
+ #define vbrsrq(__a, __b) __arm_vbrsrq(__a, __b)
+ #define vshlq_n(__a, __imm) __arm_vshlq_n(__a, __imm)
+ #define vrshrq(__a, __imm) __arm_vrshrq(__a, __imm)
+ #define vqshlq_n(__a, __imm) __arm_vqshlq_n(__a, __imm)
+ #define vcmpltq(__a, __b) __arm_vcmpltq(__a, __b)
+ #define vcmpleq(__a, __b) __arm_vcmpleq(__a, __b)
+ #define vcmpgtq(__a, __b) __arm_vcmpgtq(__a, __b)
+ #define vcmpgeq(__a, __b) __arm_vcmpgeq(__a, __b)
+ #define vqshluq(__a, __imm) __arm_vqshluq(__a, __imm)
+ #define vqrdmulhq(__a, __b) __arm_vqrdmulhq(__a, __b)
+ #define vqdmulhq(__a, __b) __arm_vqdmulhq(__a, __b)
+ #define vmlsdavxq(__a, __b) __arm_vmlsdavxq(__a, __b)
+ #define vmlsdavq(__a, __b) __arm_vmlsdavq(__a, __b)
+ #define vmladavxq(__a, __b) __arm_vmladavxq(__a, __b)
+ #define vhcaddq_rot90(__a, __b) __arm_vhcaddq_rot90(__a, __b)
+ #define vhcaddq_rot270(__a, __b) __arm_vhcaddq_rot270(__a, __b)
+ #define vqmovntq(__a, __b) __arm_vqmovntq(__a, __b)
+ #define vqmovnbq(__a, __b) __arm_vqmovnbq(__a, __b)
+ #define vmulltq_poly(__a, __b) __arm_vmulltq_poly(__a, __b)
+ #define vmullbq_poly(__a, __b) __arm_vmullbq_poly(__a, __b)
+ #define vmovntq(__a, __b) __arm_vmovntq(__a, __b)
+ #define vmovnbq(__a, __b) __arm_vmovnbq(__a, __b)
+ #define vmlaldavq(__a, __b) __arm_vmlaldavq(__a, __b)
+ #define vqmovuntq(__a, __b) __arm_vqmovuntq(__a, __b)
+ #define vqmovunbq(__a, __b) __arm_vqmovunbq(__a, __b)
+ #define vshlltq(__a, __imm) __arm_vshlltq(__a, __imm)
+ #define vshllbq(__a, __imm) __arm_vshllbq(__a, __imm)
+ #define vqdmulltq(__a, __b) __arm_vqdmulltq(__a, __b)
+ #define vqdmullbq(__a, __b) __arm_vqdmullbq(__a, __b)
+ #define vmlsldavxq(__a, __b) __arm_vmlsldavxq(__a, __b)
+ #define vmlsldavq(__a, __b) __arm_vmlsldavq(__a, __b)
+ #define vmlaldavxq(__a, __b) __arm_vmlaldavxq(__a, __b)
+ #define vrmlaldavhq(__a, __b) __arm_vrmlaldavhq(__a, __b)
+ #define vaddlvaq(__a, __b) __arm_vaddlvaq(__a, __b)
+ #define vrmlsldavhxq(__a, __b) __arm_vrmlsldavhxq(__a, __b)
+ #define vrmlsldavhq(__a, __b) __arm_vrmlsldavhq(__a, __b)
+ #define vrmlaldavhxq(__a, __b) __arm_vrmlaldavhxq(__a, __b)
+ #define vabavq(__a, __b, __c) __arm_vabavq(__a, __b, __c)
+ #define vbicq_m_n(__a, __imm, __p) __arm_vbicq_m_n(__a, __imm, __p)
+ #define vqrshrnbq(__a, __b, __imm) __arm_vqrshrnbq(__a, __b, __imm)
+ #define vqrshrunbq(__a, __b, __imm) __arm_vqrshrunbq(__a, __b, __imm)
+ #define vrmlaldavhaq(__a, __b, __c) __arm_vrmlaldavhaq(__a, __b, __c)
+ #define vshlcq(__a, __b, __imm) __arm_vshlcq(__a, __b, __imm)
+ #define vpselq(__a, __b, __p) __arm_vpselq(__a, __b, __p)
+ #define vrev64q_m(__inactive, __a, __p) __arm_vrev64q_m(__inactive, __a, __p)
+ #define vqrdmlashq(__a, __b, __c) __arm_vqrdmlashq(__a, __b, __c)
+ #define vqrdmlahq(__a, __b, __c) __arm_vqrdmlahq(__a, __b, __c)
+ #define vqdmlahq(__a, __b, __c) __arm_vqdmlahq(__a, __b, __c)
+ #define vmvnq_m(__inactive, __a, __p) __arm_vmvnq_m(__inactive, __a, __p)
+ #define vmlasq(__a, __b, __c) __arm_vmlasq(__a, __b, __c)
+ #define vmlaq(__a, __b, __c) __arm_vmlaq(__a, __b, __c)
+ #define vmladavq_p(__a, __b, __p) __arm_vmladavq_p(__a, __b, __p)
+ #define vmladavaq(__a, __b, __c) __arm_vmladavaq(__a, __b, __c)
+ #define vminvq_p(__a, __b, __p) __arm_vminvq_p(__a, __b, __p)
+ #define vmaxvq_p(__a, __b, __p) __arm_vmaxvq_p(__a, __b, __p)
+ #define vdupq_m(__inactive, __a, __p) __arm_vdupq_m(__inactive, __a, __p)
+ #define vcmpneq_m(__a, __b, __p) __arm_vcmpneq_m(__a, __b, __p)
+ #define vcmphiq_m(__a, __b, __p) __arm_vcmphiq_m(__a, __b, __p)
+ #define vcmpeqq_m(__a, __b, __p) __arm_vcmpeqq_m(__a, __b, __p)
+ #define vcmpcsq_m(__a, __b, __p) __arm_vcmpcsq_m(__a, __b, __p)
+ #define vcmpcsq_m_n(__a, __b, __p) __arm_vcmpcsq_m_n(__a, __b, __p)
+ #define vclzq_m(__inactive, __a, __p) __arm_vclzq_m(__inactive, __a, __p)
+ #define vaddvaq_p(__a, __b, __p) __arm_vaddvaq_p(__a, __b, __p)
+ #define vsriq(__a, __b, __imm) __arm_vsriq(__a, __b, __imm)
+ #define vsliq(__a, __b, __imm) __arm_vsliq(__a, __b, __imm)
+ #define vshlq_m_r(__a, __b, __p) __arm_vshlq_m_r(__a, __b, __p)
+ #define vrshlq_m_n(__a, __b, __p) __arm_vrshlq_m_n(__a, __b, __p)
+ #define vqshlq_m_r(__a, __b, __p) __arm_vqshlq_m_r(__a, __b, __p)
+ #define vqrshlq_m_n(__a, __b, __p) __arm_vqrshlq_m_n(__a, __b, __p)
+ #define vminavq_p(__a, __b, __p) __arm_vminavq_p(__a, __b, __p)
+ #define vminaq_m(__a, __b, __p) __arm_vminaq_m(__a, __b, __p)
+ #define vmaxavq_p(__a, __b, __p) __arm_vmaxavq_p(__a, __b, __p)
+ #define vmaxaq_m(__a, __b, __p) __arm_vmaxaq_m(__a, __b, __p)
+ #define vcmpltq_m(__a, __b, __p) __arm_vcmpltq_m(__a, __b, __p)
+ #define vcmpleq_m(__a, __b, __p) __arm_vcmpleq_m(__a, __b, __p)
+ #define vcmpgtq_m(__a, __b, __p) __arm_vcmpgtq_m(__a, __b, __p)
+ #define vcmpgeq_m(__a, __b, __p) __arm_vcmpgeq_m(__a, __b, __p)
+ #define vqnegq_m(__inactive, __a, __p) __arm_vqnegq_m(__inactive, __a, __p)
+ #define vqabsq_m(__inactive, __a, __p) __arm_vqabsq_m(__inactive, __a, __p)
+ #define vnegq_m(__inactive, __a, __p) __arm_vnegq_m(__inactive, __a, __p)
+ #define vmlsdavxq_p(__a, __b, __p) __arm_vmlsdavxq_p(__a, __b, __p)
+ #define vmlsdavq_p(__a, __b, __p) __arm_vmlsdavq_p(__a, __b, __p)
+ #define vmladavxq_p(__a, __b, __p) __arm_vmladavxq_p(__a, __b, __p)
+ #define vclsq_m(__inactive, __a, __p) __arm_vclsq_m(__inactive, __a, __p)
+ #define vabsq_m(__inactive, __a, __p) __arm_vabsq_m(__inactive, __a, __p)
+ #define vqrdmlsdhxq(__inactive, __a, __b) __arm_vqrdmlsdhxq(__inactive, __a, __b)
+ #define vqrdmlsdhq(__inactive, __a, __b) __arm_vqrdmlsdhq(__inactive, __a, __b)
+ #define vqrdmladhxq(__inactive, __a, __b) __arm_vqrdmladhxq(__inactive, __a, __b)
+ #define vqrdmladhq(__inactive, __a, __b) __arm_vqrdmladhq(__inactive, __a, __b)
+ #define vqdmlsdhxq(__inactive, __a, __b) __arm_vqdmlsdhxq(__inactive, __a, __b)
+ #define vqdmlsdhq(__inactive, __a, __b) __arm_vqdmlsdhq(__inactive, __a, __b)
+ #define vqdmladhxq(__inactive, __a, __b) __arm_vqdmladhxq(__inactive, __a, __b)
+ #define vqdmladhq(__inactive, __a, __b) __arm_vqdmladhq(__inactive, __a, __b)
+ #define vmlsdavaxq(__a, __b, __c) __arm_vmlsdavaxq(__a, __b, __c)
+ #define vmlsdavaq(__a, __b, __c) __arm_vmlsdavaq(__a, __b, __c)
+ #define vmladavaxq(__a, __b, __c) __arm_vmladavaxq(__a, __b, __c)
+ #define vrmlaldavhaxq(__a, __b, __c) __arm_vrmlaldavhaxq(__a, __b, __c)
+ #define vrmlsldavhaq(__a, __b, __c) __arm_vrmlsldavhaq(__a, __b, __c)
+ #define vrmlsldavhaxq(__a, __b, __c) __arm_vrmlsldavhaxq(__a, __b, __c)
+ #define vaddlvaq_p(__a, __b, __p) __arm_vaddlvaq_p(__a, __b, __p)
+ #define vrev16q_m(__inactive, __a, __p) __arm_vrev16q_m(__inactive, __a, __p)
+ #define vrmlaldavhq_p(__a, __b, __p) __arm_vrmlaldavhq_p(__a, __b, __p)
+ #define vrmlaldavhxq_p(__a, __b, __p) __arm_vrmlaldavhxq_p(__a, __b, __p)
+ #define vrmlsldavhq_p(__a, __b, __p) __arm_vrmlsldavhq_p(__a, __b, __p)
+ #define vrmlsldavhxq_p(__a, __b, __p) __arm_vrmlsldavhxq_p(__a, __b, __p)
+ #define vorrq_m_n(__a, __imm, __p) __arm_vorrq_m_n(__a, __imm, __p)
+ #define vqrshrntq(__a, __b, __imm) __arm_vqrshrntq(__a, __b, __imm)
+ #define vqshrnbq(__a, __b, __imm) __arm_vqshrnbq(__a, __b, __imm)
+ #define vqshrntq(__a, __b, __imm) __arm_vqshrntq(__a, __b, __imm)
+ #define vrshrnbq(__a, __b, __imm) __arm_vrshrnbq(__a, __b, __imm)
+ #define vrshrntq(__a, __b, __imm) __arm_vrshrntq(__a, __b, __imm)
+ #define vshrnbq(__a, __b, __imm) __arm_vshrnbq(__a, __b, __imm)
+ #define vshrntq(__a, __b, __imm) __arm_vshrntq(__a, __b, __imm)
+ #define vmlaldavaq(__a, __b, __c) __arm_vmlaldavaq(__a, __b, __c)
+ #define vmlaldavaxq(__a, __b, __c) __arm_vmlaldavaxq(__a, __b, __c)
+ #define vmlsldavaq(__a, __b, __c) __arm_vmlsldavaq(__a, __b, __c)
+ #define vmlsldavaxq(__a, __b, __c) __arm_vmlsldavaxq(__a, __b, __c)
+ #define vmlaldavq_p(__a, __b, __p) __arm_vmlaldavq_p(__a, __b, __p)
+ #define vmlaldavxq_p(__a, __b, __p) __arm_vmlaldavxq_p(__a, __b, __p)
+ #define vmlsldavq_p(__a, __b, __p) __arm_vmlsldavq_p(__a, __b, __p)
+ #define vmlsldavxq_p(__a, __b, __p) __arm_vmlsldavxq_p(__a, __b, __p)
+ #define vmovlbq_m(__inactive, __a, __p) __arm_vmovlbq_m(__inactive, __a, __p)
+ #define vmovltq_m(__inactive, __a, __p) __arm_vmovltq_m(__inactive, __a, __p)
+ #define vmovnbq_m(__a, __b, __p) __arm_vmovnbq_m(__a, __b, __p)
+ #define vmovntq_m(__a, __b, __p) __arm_vmovntq_m(__a, __b, __p)
+ #define vqmovnbq_m(__a, __b, __p) __arm_vqmovnbq_m(__a, __b, __p)
+ #define vqmovntq_m(__a, __b, __p) __arm_vqmovntq_m(__a, __b, __p)
+ #define vrev32q_m(__inactive, __a, __p) __arm_vrev32q_m(__inactive, __a, __p)
+ #define vqrshruntq(__a, __b, __imm) __arm_vqrshruntq(__a, __b, __imm)
+ #define vqshrunbq(__a, __b, __imm) __arm_vqshrunbq(__a, __b, __imm)
+ #define vqshruntq(__a, __b, __imm) __arm_vqshruntq(__a, __b, __imm)
+ #define vqmovunbq_m(__a, __b, __p) __arm_vqmovunbq_m(__a, __b, __p)
+ #define vqmovuntq_m(__a, __b, __p) __arm_vqmovuntq_m(__a, __b, __p)
+ #define vsriq_m(__a, __b, __imm, __p) __arm_vsriq_m(__a, __b, __imm, __p)
+ #define vsubq_m(__inactive, __a, __b, __p) __arm_vsubq_m(__inactive, __a, __b, __p)
+ #define vqshluq_m(__inactive, __a, __imm, __p) __arm_vqshluq_m(__inactive, __a, __imm, __p)
+ #define vabavq_p(__a, __b, __c, __p) __arm_vabavq_p(__a, __b, __c, __p)
+ #define vshlq_m(__inactive, __a, __b, __p) __arm_vshlq_m(__inactive, __a, __b, __p)
+ #define vabdq_m(__inactive, __a, __b, __p) __arm_vabdq_m(__inactive, __a, __b, __p)
+ #define vaddq_m(__inactive, __a, __b, __p) __arm_vaddq_m(__inactive, __a, __b, __p)
+ #define vandq_m(__inactive, __a, __b, __p) __arm_vandq_m(__inactive, __a, __b, __p)
+ #define vbicq_m(__inactive, __a, __b, __p) __arm_vbicq_m(__inactive, __a, __b, __p)
+ #define vbrsrq_m(__inactive, __a, __b, __p) __arm_vbrsrq_m(__inactive, __a, __b, __p)
+ #define vcaddq_rot270_m(__inactive, __a, __b, __p) __arm_vcaddq_rot270_m(__inactive, __a, __b, __p)
+ #define vcaddq_rot90_m(__inactive, __a, __b, __p) __arm_vcaddq_rot90_m(__inactive, __a, __b, __p)
+ #define veorq_m(__inactive, __a, __b, __p) __arm_veorq_m(__inactive, __a, __b, __p)
+ #define vhaddq_m(__inactive, __a, __b, __p) __arm_vhaddq_m(__inactive, __a, __b, __p)
+ #define vhcaddq_rot270_m(__inactive, __a, __b, __p) __arm_vhcaddq_rot270_m(__inactive, __a, __b, __p)
+ #define vhcaddq_rot90_m(__inactive, __a, __b, __p) __arm_vhcaddq_rot90_m(__inactive, __a, __b, __p)
+ #define vhsubq_m(__inactive, __a, __b, __p) __arm_vhsubq_m(__inactive, __a, __b, __p)
+ #define vmaxq_m(__inactive, __a, __b, __p) __arm_vmaxq_m(__inactive, __a, __b, __p)
+ #define vminq_m(__inactive, __a, __b, __p) __arm_vminq_m(__inactive, __a, __b, __p)
+ #define vmladavaq_p(__a, __b, __c, __p) __arm_vmladavaq_p(__a, __b, __c, __p)
+ #define vmladavaxq_p(__a, __b, __c, __p) __arm_vmladavaxq_p(__a, __b, __c, __p)
+ #define vmlaq_m(__a, __b, __c, __p) __arm_vmlaq_m(__a, __b, __c, __p)
+ #define vmlasq_m(__a, __b, __c, __p) __arm_vmlasq_m(__a, __b, __c, __p)
+ #define vmlsdavaq_p(__a, __b, __c, __p) __arm_vmlsdavaq_p(__a, __b, __c, __p)
+ #define vmlsdavaxq_p(__a, __b, __c, __p) __arm_vmlsdavaxq_p(__a, __b, __c, __p)
+ #define vmulhq_m(__inactive, __a, __b, __p) __arm_vmulhq_m(__inactive, __a, __b, __p)
+ #define vmullbq_int_m(__inactive, __a, __b, __p) __arm_vmullbq_int_m(__inactive, __a, __b, __p)
+ #define vmulltq_int_m(__inactive, __a, __b, __p) __arm_vmulltq_int_m(__inactive, __a, __b, __p)
+ #define vmulq_m(__inactive, __a, __b, __p) __arm_vmulq_m(__inactive, __a, __b, __p)
+ #define vornq_m(__inactive, __a, __b, __p) __arm_vornq_m(__inactive, __a, __b, __p)
+ #define vorrq_m(__inactive, __a, __b, __p) __arm_vorrq_m(__inactive, __a, __b, __p)
+ #define vqaddq_m(__inactive, __a, __b, __p) __arm_vqaddq_m(__inactive, __a, __b, __p)
+ #define vqdmladhq_m(__inactive, __a, __b, __p) __arm_vqdmladhq_m(__inactive, __a, __b, __p)
+ #define vqdmladhxq_m(__inactive, __a, __b, __p) __arm_vqdmladhxq_m(__inactive, __a, __b, __p)
+ #define vqdmlahq_m(__a, __b, __c, __p) __arm_vqdmlahq_m(__a, __b, __c, __p)
+ #define vqdmlsdhq_m(__inactive, __a, __b, __p) __arm_vqdmlsdhq_m(__inactive, __a, __b, __p)
+ #define vqdmlsdhxq_m(__inactive, __a, __b, __p) __arm_vqdmlsdhxq_m(__inactive, __a, __b, __p)
+ #define vqdmulhq_m(__inactive, __a, __b, __p) __arm_vqdmulhq_m(__inactive, __a, __b, __p)
+ #define vqrdmladhq_m(__inactive, __a, __b, __p) __arm_vqrdmladhq_m(__inactive, __a, __b, __p)
+ #define vqrdmladhxq_m(__inactive, __a, __b, __p) __arm_vqrdmladhxq_m(__inactive, __a, __b, __p)
+ #define vqrdmlahq_m(__a, __b, __c, __p) __arm_vqrdmlahq_m(__a, __b, __c, __p)
+ #define vqrdmlashq_m(__a, __b, __c, __p) __arm_vqrdmlashq_m(__a, __b, __c, __p)
+ #define vqrdmlsdhq_m(__inactive, __a, __b, __p) __arm_vqrdmlsdhq_m(__inactive, __a, __b, __p)
+ #define vqrdmlsdhxq_m(__inactive, __a, __b, __p) __arm_vqrdmlsdhxq_m(__inactive, __a, __b, __p)
+ #define vqrdmulhq_m(__inactive, __a, __b, __p) __arm_vqrdmulhq_m(__inactive, __a, __b, __p)
+ #define vqrshlq_m(__inactive, __a, __b, __p) __arm_vqrshlq_m(__inactive, __a, __b, __p)
+ #define vqshlq_m_n(__inactive, __a, __imm, __p) __arm_vqshlq_m_n(__inactive, __a, __imm, __p)
+ #define vqshlq_m(__inactive, __a, __b, __p) __arm_vqshlq_m(__inactive, __a, __b, __p)
+ #define vqsubq_m(__inactive, __a, __b, __p) __arm_vqsubq_m(__inactive, __a, __b, __p)
+ #define vrhaddq_m(__inactive, __a, __b, __p) __arm_vrhaddq_m(__inactive, __a, __b, __p)
+ #define vrmulhq_m(__inactive, __a, __b, __p) __arm_vrmulhq_m(__inactive, __a, __b, __p)
+ #define vrshlq_m(__inactive, __a, __b, __p) __arm_vrshlq_m(__inactive, __a, __b, __p)
+ #define vrshrq_m(__inactive, __a, __imm, __p) __arm_vrshrq_m(__inactive, __a, __imm, __p)
+ #define vshlq_m_n(__inactive, __a, __imm, __p) __arm_vshlq_m_n(__inactive, __a, __imm, __p)
+ #define vshrq_m(__inactive, __a, __imm, __p) __arm_vshrq_m(__inactive, __a, __imm, __p)
+ #define vsliq_m(__a, __b, __imm, __p) __arm_vsliq_m(__a, __b, __imm, __p)
+ #define vmlaldavaq_p(__a, __b, __c, __p) __arm_vmlaldavaq_p(__a, __b, __c, __p)
+ #define vmlaldavaxq_p(__a, __b, __c, __p) __arm_vmlaldavaxq_p(__a, __b, __c, __p)
+ #define vmlsldavaq_p(__a, __b, __c, __p) __arm_vmlsldavaq_p(__a, __b, __c, __p)
+ #define vmlsldavaxq_p(__a, __b, __c, __p) __arm_vmlsldavaxq_p(__a, __b, __c, __p)
+ #define vmullbq_poly_m(__inactive, __a, __b, __p) __arm_vmullbq_poly_m(__inactive, __a, __b, __p)
+ #define vmulltq_poly_m(__inactive, __a, __b, __p) __arm_vmulltq_poly_m(__inactive, __a, __b, __p)
+ #define vqdmullbq_m(__inactive, __a, __b, __p) __arm_vqdmullbq_m(__inactive, __a, __b, __p)
+ #define vqdmulltq_m(__inactive, __a, __b, __p) __arm_vqdmulltq_m(__inactive, __a, __b, __p)
+ #define vqrshrnbq_m(__a, __b, __imm, __p) __arm_vqrshrnbq_m(__a, __b, __imm, __p)
+ #define vqrshrntq_m(__a, __b, __imm, __p) __arm_vqrshrntq_m(__a, __b, __imm, __p)
+ #define vqrshrunbq_m(__a, __b, __imm, __p) __arm_vqrshrunbq_m(__a, __b, __imm, __p)
+ #define vqrshruntq_m(__a, __b, __imm, __p) __arm_vqrshruntq_m(__a, __b, __imm, __p)
+ #define vqshrnbq_m(__a, __b, __imm, __p) __arm_vqshrnbq_m(__a, __b, __imm, __p)
+ #define vqshrntq_m(__a, __b, __imm, __p) __arm_vqshrntq_m(__a, __b, __imm, __p)
+ #define vqshrunbq_m(__a, __b, __imm, __p) __arm_vqshrunbq_m(__a, __b, __imm, __p)
+ #define vqshruntq_m(__a, __b, __imm, __p) __arm_vqshruntq_m(__a, __b, __imm, __p)
+ #define vrmlaldavhaq_p(__a, __b, __c, __p) __arm_vrmlaldavhaq_p(__a, __b, __c, __p)
+ #define vrmlaldavhaxq_p(__a, __b, __c, __p) __arm_vrmlaldavhaxq_p(__a, __b, __c, __p)
+ #define vrmlsldavhaq_p(__a, __b, __c, __p) __arm_vrmlsldavhaq_p(__a, __b, __c, __p)
+ #define vrmlsldavhaxq_p(__a, __b, __c, __p) __arm_vrmlsldavhaxq_p(__a, __b, __c, __p)
+ #define vrshrnbq_m(__a, __b, __imm, __p) __arm_vrshrnbq_m(__a, __b, __imm, __p)
+ #define vrshrntq_m(__a, __b, __imm, __p) __arm_vrshrntq_m(__a, __b, __imm, __p)
+ #define vshllbq_m(__inactive, __a, __imm, __p) __arm_vshllbq_m(__inactive, __a, __imm, __p)
+ #define vshlltq_m(__inactive, __a, __imm, __p) __arm_vshlltq_m(__inactive, __a, __imm, __p)
+ #define vshrnbq_m(__a, __b, __imm, __p) __arm_vshrnbq_m(__a, __b, __imm, __p)
+ #define vshrntq_m(__a, __b, __imm, __p) __arm_vshrntq_m(__a, __b, __imm, __p)
+ #define vstrbq_scatter_offset(__base, __offset, __value) __arm_vstrbq_scatter_offset(__base, __offset, __value)
+ #define vstrbq(__addr, __value) __arm_vstrbq(__addr, __value)
+ #define vstrwq_scatter_base(__addr, __offset, __value) __arm_vstrwq_scatter_base(__addr, __offset, __value)
+ #define vldrbq_gather_offset(__base, __offset) __arm_vldrbq_gather_offset(__base, __offset)
+ #define vstrbq_p(__addr, __value, __p) __arm_vstrbq_p(__addr, __value, __p)
+ #define vstrbq_scatter_offset_p(__base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p(__base, __offset, __value, __p)
+ #define vstrwq_scatter_base_p(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_p(__addr, __offset, __value, __p)
+ #define vldrbq_gather_offset_z(__base, __offset, __p) __arm_vldrbq_gather_offset_z(__base, __offset, __p)
+ #define vld1q(__base) __arm_vld1q(__base)
+ #define vldrhq_gather_offset(__base, __offset) __arm_vldrhq_gather_offset(__base, __offset)
+ #define vldrhq_gather_offset_z(__base, __offset, __p) __arm_vldrhq_gather_offset_z(__base, __offset, __p)
+ #define vldrhq_gather_shifted_offset(__base, __offset) __arm_vldrhq_gather_shifted_offset(__base, __offset)
+ #define vldrhq_gather_shifted_offset_z(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z(__base, __offset, __p)
+ #define vldrdq_gather_offset(__base, __offset) __arm_vldrdq_gather_offset(__base, __offset)
+ #define vldrdq_gather_offset_z(__base, __offset, __p) __arm_vldrdq_gather_offset_z(__base, __offset, __p)
+ #define vldrdq_gather_shifted_offset(__base, __offset) __arm_vldrdq_gather_shifted_offset(__base, __offset)
+ #define vldrdq_gather_shifted_offset_z(__base, __offset, __p) __arm_vldrdq_gather_shifted_offset_z(__base, __offset, __p)
+ #define vldrwq_gather_offset(__base, __offset) __arm_vldrwq_gather_offset(__base, __offset)
+ #define vldrwq_gather_offset_z(__base, __offset, __p) __arm_vldrwq_gather_offset_z(__base, __offset, __p)
+ #define vldrwq_gather_shifted_offset(__base, __offset) __arm_vldrwq_gather_shifted_offset(__base, __offset)
+ #define vldrwq_gather_shifted_offset_z(__base, __offset, __p) __arm_vldrwq_gather_shifted_offset_z(__base, __offset, __p)
+ #define vst1q(__addr, __value) __arm_vst1q(__addr, __value)
+ #define vstrhq_scatter_offset(__base, __offset, __value) __arm_vstrhq_scatter_offset(__base, __offset, __value)
+ #define vstrhq_scatter_offset_p(__base, __offset, __value, __p) __arm_vstrhq_scatter_offset_p(__base, __offset, __value, __p)
+ #define vstrhq_scatter_shifted_offset(__base, __offset, __value) __arm_vstrhq_scatter_shifted_offset(__base, __offset, __value)
+ #define vstrhq_scatter_shifted_offset_p(__base, __offset, __value, __p) __arm_vstrhq_scatter_shifted_offset_p(__base, __offset, __value, __p)
+ #define vstrhq(__addr, __value) __arm_vstrhq(__addr, __value)
+ #define vstrhq_p(__addr, __value, __p) __arm_vstrhq_p(__addr, __value, __p)
+ #define vstrwq(__addr, __value) __arm_vstrwq(__addr, __value)
+ #define vstrwq_p(__addr, __value, __p) __arm_vstrwq_p(__addr, __value, __p)
+ #define vstrdq_scatter_base_p(__addr, __offset, __value, __p) __arm_vstrdq_scatter_base_p(__addr, __offset, __value, __p)
+ #define vstrdq_scatter_base(__addr, __offset, __value) __arm_vstrdq_scatter_base(__addr, __offset, __value)
+ #define vstrdq_scatter_offset_p(__base, __offset, __value, __p) __arm_vstrdq_scatter_offset_p(__base, __offset, __value, __p)
+ #define vstrdq_scatter_offset(__base, __offset, __value) __arm_vstrdq_scatter_offset(__base, __offset, __value)
+ #define vstrdq_scatter_shifted_offset_p(__base, __offset, __value, __p) __arm_vstrdq_scatter_shifted_offset_p(__base, __offset, __value, __p)
+ #define vstrdq_scatter_shifted_offset(__base, __offset, __value) __arm_vstrdq_scatter_shifted_offset(__base, __offset, __value)
+ #define vstrwq_scatter_offset_p(__base, __offset, __value, __p) __arm_vstrwq_scatter_offset_p(__base, __offset, __value, __p)
+ #define vstrwq_scatter_offset(__base, __offset, __value) __arm_vstrwq_scatter_offset(__base, __offset, __value)
+ #define vstrwq_scatter_shifted_offset_p(__base, __offset, __value, __p) __arm_vstrwq_scatter_shifted_offset_p(__base, __offset, __value, __p)
+ #define vstrwq_scatter_shifted_offset(__base, __offset, __value) __arm_vstrwq_scatter_shifted_offset(__base, __offset, __value)
+ #define vuninitializedq(__v) __arm_vuninitializedq(__v)
+ #define vreinterpretq_s16(__a) __arm_vreinterpretq_s16(__a)
+ #define vreinterpretq_s32(__a) __arm_vreinterpretq_s32(__a)
+ #define vreinterpretq_s64(__a) __arm_vreinterpretq_s64(__a)
+ #define vreinterpretq_s8(__a) __arm_vreinterpretq_s8(__a)
+ #define vreinterpretq_u16(__a) __arm_vreinterpretq_u16(__a)
+ #define vreinterpretq_u32(__a) __arm_vreinterpretq_u32(__a)
+ #define vreinterpretq_u64(__a) __arm_vreinterpretq_u64(__a)
+ #define vreinterpretq_u8(__a) __arm_vreinterpretq_u8(__a)
+ #define vddupq_m(__inactive, __a, __imm, __p) __arm_vddupq_m(__inactive, __a, __imm, __p)
+ #define vddupq_u8(__a, __imm) __arm_vddupq_u8(__a, __imm)
+ #define vddupq_u32(__a, __imm) __arm_vddupq_u32(__a, __imm)
+ #define vddupq_u16(__a, __imm) __arm_vddupq_u16(__a, __imm)
+ #define vdwdupq_m(__inactive, __a, __b, __imm, __p) __arm_vdwdupq_m(__inactive, __a, __b, __imm, __p)
+ #define vdwdupq_u8(__a, __b, __imm) __arm_vdwdupq_u8(__a, __b, __imm)
+ #define vdwdupq_u32(__a, __b, __imm) __arm_vdwdupq_u32(__a, __b, __imm)
+ #define vdwdupq_u16(__a, __b, __imm) __arm_vdwdupq_u16(__a, __b, __imm)
+ #define vidupq_m(__inactive, __a, __imm, __p) __arm_vidupq_m(__inactive, __a, __imm, __p)
+ #define vidupq_u8(__a, __imm) __arm_vidupq_u8(__a, __imm)
+ #define vidupq_u32(__a, __imm) __arm_vidupq_u32(__a, __imm)
+ #define vidupq_u16(__a, __imm) __arm_vidupq_u16(__a, __imm)
+ #define viwdupq_m(__inactive, __a, __b, __imm, __p) __arm_viwdupq_m(__inactive, __a, __b, __imm, __p)
+ #define viwdupq_u8(__a, __b, __imm) __arm_viwdupq_u8(__a, __b, __imm)
+ #define viwdupq_u32(__a, __b, __imm) __arm_viwdupq_u32(__a, __b, __imm)
+ #define viwdupq_u16(__a, __b, __imm) __arm_viwdupq_u16(__a, __b, __imm)
+ #define vstrdq_scatter_base_wb(__addr, __offset, __value) __arm_vstrdq_scatter_base_wb(__addr, __offset, __value)
+ #define vstrdq_scatter_base_wb_p(__addr, __offset, __value, __p) __arm_vstrdq_scatter_base_wb_p(__addr, __offset, __value, __p)
+ #define vstrwq_scatter_base_wb_p(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_wb_p(__addr, __offset, __value, __p)
+ #define vstrwq_scatter_base_wb(__addr, __offset, __value) __arm_vstrwq_scatter_base_wb(__addr, __offset, __value)
+ #define vddupq_x_u8(__a, __imm, __p) __arm_vddupq_x_u8(__a, __imm, __p)
+ #define vddupq_x_u16(__a, __imm, __p) __arm_vddupq_x_u16(__a, __imm, __p)
+ #define vddupq_x_u32(__a, __imm, __p) __arm_vddupq_x_u32(__a, __imm, __p)
+ #define vdwdupq_x_u8(__a, __b, __imm, __p) __arm_vdwdupq_x_u8(__a, __b, __imm, __p)
+ #define vdwdupq_x_u16(__a, __b, __imm, __p) __arm_vdwdupq_x_u16(__a, __b, __imm, __p)
+ #define vdwdupq_x_u32(__a, __b, __imm, __p) __arm_vdwdupq_x_u32(__a, __b, __imm, __p)
+ #define vidupq_x_u8(__a, __imm, __p) __arm_vidupq_x_u8(__a, __imm, __p)
+ #define vidupq_x_u16(__a, __imm, __p) __arm_vidupq_x_u16(__a, __imm, __p)
+ #define vidupq_x_u32(__a, __imm, __p) __arm_vidupq_x_u32(__a, __imm, __p)
+ #define viwdupq_x_u8(__a, __b, __imm, __p) __arm_viwdupq_x_u8(__a, __b, __imm, __p)
+ #define viwdupq_x_u16(__a, __b, __imm, __p) __arm_viwdupq_x_u16(__a, __b, __imm, __p)
+ #define viwdupq_x_u32(__a, __b, __imm, __p) __arm_viwdupq_x_u32(__a, __b, __imm, __p)
+ #define vminq_x(__a, __b, __p) __arm_vminq_x(__a, __b, __p)
+ #define vmaxq_x(__a, __b, __p) __arm_vmaxq_x(__a, __b, __p)
+ #define vabdq_x(__a, __b, __p) __arm_vabdq_x(__a, __b, __p)
+ #define vabsq_x(__a, __p) __arm_vabsq_x(__a, __p)
+ #define vaddq_x(__a, __b, __p) __arm_vaddq_x(__a, __b, __p)
+ #define vclsq_x(__a, __p) __arm_vclsq_x(__a, __p)
+ #define vclzq_x(__a, __p) __arm_vclzq_x(__a, __p)
+ #define vnegq_x(__a, __p) __arm_vnegq_x(__a, __p)
+ #define vmulhq_x(__a, __b, __p) __arm_vmulhq_x(__a, __b, __p)
+ #define vmullbq_poly_x(__a, __b, __p) __arm_vmullbq_poly_x(__a, __b, __p)
+ #define vmullbq_int_x(__a, __b, __p) __arm_vmullbq_int_x(__a, __b, __p)
+ #define vmulltq_poly_x(__a, __b, __p) __arm_vmulltq_poly_x(__a, __b, __p)
+ #define vmulltq_int_x(__a, __b, __p) __arm_vmulltq_int_x(__a, __b, __p)
+ #define vmulq_x(__a, __b, __p) __arm_vmulq_x(__a, __b, __p)
+ #define vsubq_x(__a, __b, __p) __arm_vsubq_x(__a, __b, __p)
+ #define vcaddq_rot90_x(__a, __b, __p) __arm_vcaddq_rot90_x(__a, __b, __p)
+ #define vcaddq_rot270_x(__a, __b, __p) __arm_vcaddq_rot270_x(__a, __b, __p)
+ #define vhaddq_x(__a, __b, __p) __arm_vhaddq_x(__a, __b, __p)
+ #define vhcaddq_rot90_x(__a, __b, __p) __arm_vhcaddq_rot90_x(__a, __b, __p)
+ #define vhcaddq_rot270_x(__a, __b, __p) __arm_vhcaddq_rot270_x(__a, __b, __p)
+ #define vhsubq_x(__a, __b, __p) __arm_vhsubq_x(__a, __b, __p)
+ #define vrhaddq_x(__a, __b, __p) __arm_vrhaddq_x(__a, __b, __p)
+ #define vrmulhq_x(__a, __b, __p) __arm_vrmulhq_x(__a, __b, __p)
+ #define vandq_x(__a, __b, __p) __arm_vandq_x(__a, __b, __p)
+ #define vbicq_x(__a, __b, __p) __arm_vbicq_x(__a, __b, __p)
+ #define vbrsrq_x(__a, __b, __p) __arm_vbrsrq_x(__a, __b, __p)
+ #define veorq_x(__a, __b, __p) __arm_veorq_x(__a, __b, __p)
+ #define vmovlbq_x(__a, __p) __arm_vmovlbq_x(__a, __p)
+ #define vmovltq_x(__a, __p) __arm_vmovltq_x(__a, __p)
+ #define vmvnq_x(__a, __p) __arm_vmvnq_x(__a, __p)
+ #define vornq_x(__a, __b, __p) __arm_vornq_x(__a, __b, __p)
+ #define vorrq_x(__a, __b, __p) __arm_vorrq_x(__a, __b, __p)
+ #define vrev16q_x(__a, __p) __arm_vrev16q_x(__a, __p)
+ #define vrev32q_x(__a, __p) __arm_vrev32q_x(__a, __p)
+ #define vrev64q_x(__a, __p) __arm_vrev64q_x(__a, __p)
+ #define vrshlq_x(__a, __b, __p) __arm_vrshlq_x(__a, __b, __p)
+ #define vshllbq_x(__a, __imm, __p) __arm_vshllbq_x(__a, __imm, __p)
+ #define vshlltq_x(__a, __imm, __p) __arm_vshlltq_x(__a, __imm, __p)
+ #define vshlq_x(__a, __b, __p) __arm_vshlq_x(__a, __b, __p)
+ #define vshlq_x_n(__a, __imm, __p) __arm_vshlq_x_n(__a, __imm, __p)
+ #define vrshrq_x(__a, __imm, __p) __arm_vrshrq_x(__a, __imm, __p)
+ #define vshrq_x(__a, __imm, __p) __arm_vshrq_x(__a, __imm, __p)
+ #define vadciq(__a, __b, __carry_out) __arm_vadciq(__a, __b, __carry_out)
+ #define vadciq_m(__inactive, __a, __b, __carry_out, __p) __arm_vadciq_m(__inactive, __a, __b, __carry_out, __p)
+ #define vadcq(__a, __b, __carry) __arm_vadcq(__a, __b, __carry)
+ #define vadcq_m(__inactive, __a, __b, __carry, __p) __arm_vadcq_m(__inactive, __a, __b, __carry, __p)
+ #define vsbciq(__a, __b, __carry_out) __arm_vsbciq(__a, __b, __carry_out)
+ #define vsbciq_m(__inactive, __a, __b, __carry_out, __p) __arm_vsbciq_m(__inactive, __a, __b, __carry_out, __p)
+ #define vsbcq(__a, __b, __carry) __arm_vsbcq(__a, __b, __carry)
+ #define vsbcq_m(__inactive, __a, __b, __carry, __p) __arm_vsbcq_m(__inactive, __a, __b, __carry, __p)
+ #define vst1q_p(__addr, __value, __p) __arm_vst1q_p(__addr, __value, __p)
+ #define vst2q(__addr, __value) __arm_vst2q(__addr, __value)
+ #define vld1q_z(__base, __p) __arm_vld1q_z(__base, __p)
+ #define vld2q(__addr) __arm_vld2q(__addr)
+ #define vld4q(__addr) __arm_vld4q(__addr)
+ #define vsetq_lane(__a, __b, __idx) __arm_vsetq_lane(__a, __b, __idx)
+ #define vgetq_lane(__a, __idx) __arm_vgetq_lane(__a, __idx)
+ #define vshlcq_m(__a, __b, __imm, __p) __arm_vshlcq_m(__a, __b, __imm, __p)
+ #define vrndxq(__a) __arm_vrndxq(__a)
+ #define vrndq(__a) __arm_vrndq(__a)
+ #define vrndpq(__a) __arm_vrndpq(__a)
+ #define vrndnq(__a) __arm_vrndnq(__a)
+ #define vrndmq(__a) __arm_vrndmq(__a)
+ #define vrndaq(__a) __arm_vrndaq(__a)
+ #define vcvttq_f32(__a) __arm_vcvttq_f32(__a)
+ #define vcvtbq_f32(__a) __arm_vcvtbq_f32(__a)
+ #define vcvtq(__a) __arm_vcvtq(__a)
+ #define vcvtq_n(__a, __imm6) __arm_vcvtq_n(__a, __imm6)
+ #define vminnmvq(__a, __b) __arm_vminnmvq(__a, __b)
+ #define vminnmq(__a, __b) __arm_vminnmq(__a, __b)
+ #define vminnmavq(__a, __b) __arm_vminnmavq(__a, __b)
+ #define vminnmaq(__a, __b) __arm_vminnmaq(__a, __b)
+ #define vmaxnmvq(__a, __b) __arm_vmaxnmvq(__a, __b)
+ #define vmaxnmq(__a, __b) __arm_vmaxnmq(__a, __b)
+ #define vmaxnmavq(__a, __b) __arm_vmaxnmavq(__a, __b)
+ #define vmaxnmaq(__a, __b) __arm_vmaxnmaq(__a, __b)
+ #define vcmulq_rot90(__a, __b) __arm_vcmulq_rot90(__a, __b)
+ #define vcmulq_rot270(__a, __b) __arm_vcmulq_rot270(__a, __b)
+ #define vcmulq_rot180(__a, __b) __arm_vcmulq_rot180(__a, __b)
+ #define vcmulq(__a, __b) __arm_vcmulq(__a, __b)
+ #define vcvtaq_m(__inactive, __a, __p) __arm_vcvtaq_m(__inactive, __a, __p)
+ #define vcvtq_m(__inactive, __a, __p) __arm_vcvtq_m(__inactive, __a, __p)
+ #define vcvtbq_m(__a, __b, __p) __arm_vcvtbq_m(__a, __b, __p)
+ #define vcvttq_m(__a, __b, __p) __arm_vcvttq_m(__a, __b, __p)
+ #define vcmlaq(__a, __b, __c) __arm_vcmlaq(__a, __b, __c)
+ #define vcmlaq_rot180(__a, __b, __c) __arm_vcmlaq_rot180(__a, __b, __c)
+ #define vcmlaq_rot270(__a, __b, __c) __arm_vcmlaq_rot270(__a, __b, __c)
+ #define vcmlaq_rot90(__a, __b, __c) __arm_vcmlaq_rot90(__a, __b, __c)
+ #define vfmaq(__a, __b, __c) __arm_vfmaq(__a, __b, __c)
+ #define vfmasq(__a, __b, __c) __arm_vfmasq(__a, __b, __c)
+ #define vfmsq(__a, __b, __c) __arm_vfmsq(__a, __b, __c)
+ #define vcvtmq_m(__inactive, __a, __p) __arm_vcvtmq_m(__inactive, __a, __p)
+ #define vcvtnq_m(__inactive, __a, __p) __arm_vcvtnq_m(__inactive, __a, __p)
+ #define vcvtpq_m(__inactive, __a, __p) __arm_vcvtpq_m(__inactive, __a, __p)
+ #define vmaxnmaq_m(__a, __b, __p) __arm_vmaxnmaq_m(__a, __b, __p)
+ #define vmaxnmavq_p(__a, __b, __p) __arm_vmaxnmavq_p(__a, __b, __p)
+ #define vmaxnmvq_p(__a, __b, __p) __arm_vmaxnmvq_p(__a, __b, __p)
+ #define vminnmaq_m(__a, __b, __p) __arm_vminnmaq_m(__a, __b, __p)
+ #define vminnmavq_p(__a, __b, __p) __arm_vminnmavq_p(__a, __b, __p)
+ #define vminnmvq_p(__a, __b, __p) __arm_vminnmvq_p(__a, __b, __p)
+ #define vrndaq_m(__inactive, __a, __p) __arm_vrndaq_m(__inactive, __a, __p)
+ #define vrndmq_m(__inactive, __a, __p) __arm_vrndmq_m(__inactive, __a, __p)
+ #define vrndnq_m(__inactive, __a, __p) __arm_vrndnq_m(__inactive, __a, __p)
+ #define vrndpq_m(__inactive, __a, __p) __arm_vrndpq_m(__inactive, __a, __p)
+ #define vrndq_m(__inactive, __a, __p) __arm_vrndq_m(__inactive, __a, __p)
+ #define vrndxq_m(__inactive, __a, __p) __arm_vrndxq_m(__inactive, __a, __p)
+ #define vcvtq_m_n(__inactive, __a, __imm6, __p) __arm_vcvtq_m_n(__inactive, __a, __imm6, __p)
+ #define vcmlaq_m(__a, __b, __c, __p) __arm_vcmlaq_m(__a, __b, __c, __p)
+ #define vcmlaq_rot180_m(__a, __b, __c, __p) __arm_vcmlaq_rot180_m(__a, __b, __c, __p)
+ #define vcmlaq_rot270_m(__a, __b, __c, __p) __arm_vcmlaq_rot270_m(__a, __b, __c, __p)
+ #define vcmlaq_rot90_m(__a, __b, __c, __p) __arm_vcmlaq_rot90_m(__a, __b, __c, __p)
+ #define vcmulq_m(__inactive, __a, __b, __p) __arm_vcmulq_m(__inactive, __a, __b, __p)
+ #define vcmulq_rot180_m(__inactive, __a, __b, __p) __arm_vcmulq_rot180_m(__inactive, __a, __b, __p)
+ #define vcmulq_rot270_m(__inactive, __a, __b, __p) __arm_vcmulq_rot270_m(__inactive, __a, __b, __p)
+ #define vcmulq_rot90_m(__inactive, __a, __b, __p) __arm_vcmulq_rot90_m(__inactive, __a, __b, __p)
+ #define vfmaq_m(__a, __b, __c, __p) __arm_vfmaq_m(__a, __b, __c, __p)
+ #define vfmasq_m(__a, __b, __c, __p) __arm_vfmasq_m(__a, __b, __c, __p)
+ #define vfmsq_m(__a, __b, __c, __p) __arm_vfmsq_m(__a, __b, __c, __p)
+ #define vmaxnmq_m(__inactive, __a, __b, __p) __arm_vmaxnmq_m(__inactive, __a, __b, __p)
+ #define vminnmq_m(__inactive, __a, __b, __p) __arm_vminnmq_m(__inactive, __a, __b, __p)
+ #define vreinterpretq_f16(__a) __arm_vreinterpretq_f16(__a)
+ #define vreinterpretq_f32(__a) __arm_vreinterpretq_f32(__a)
+ #define vminnmq_x(__a, __b, __p) __arm_vminnmq_x(__a, __b, __p)
+ #define vmaxnmq_x(__a, __b, __p) __arm_vmaxnmq_x(__a, __b, __p)
+ #define vcmulq_x(__a, __b, __p) __arm_vcmulq_x(__a, __b, __p)
+ #define vcmulq_rot90_x(__a, __b, __p) __arm_vcmulq_rot90_x(__a, __b, __p)
+ #define vcmulq_rot180_x(__a, __b, __p) __arm_vcmulq_rot180_x(__a, __b, __p)
+ #define vcmulq_rot270_x(__a, __b, __p) __arm_vcmulq_rot270_x(__a, __b, __p)
+ #define vcvtq_x(__a, __p) __arm_vcvtq_x(__a, __p)
+ #define vcvtq_x_n(__a, __imm6, __p) __arm_vcvtq_x_n(__a, __imm6, __p)
+ #define vrndq_x(__a, __p) __arm_vrndq_x(__a, __p)
+ #define vrndnq_x(__a, __p) __arm_vrndnq_x(__a, __p)
+ #define vrndmq_x(__a, __p) __arm_vrndmq_x(__a, __p)
+ #define vrndpq_x(__a, __p) __arm_vrndpq_x(__a, __p)
+ #define vrndaq_x(__a, __p) __arm_vrndaq_x(__a, __p)
+ #define vrndxq_x(__a, __p) __arm_vrndxq_x(__a, __p)
+ 
+ 
+ #define vst4q_s8( __addr, __value) __arm_vst4q_s8( __addr, __value)
+ #define vst4q_s16( __addr, __value) __arm_vst4q_s16( __addr, __value)
+ #define vst4q_s32( __addr, __value) __arm_vst4q_s32( __addr, __value)
+ #define vst4q_u8( __addr, __value) __arm_vst4q_u8( __addr, __value)
+ #define vst4q_u16( __addr, __value) __arm_vst4q_u16( __addr, __value)
+ #define vst4q_u32( __addr, __value) __arm_vst4q_u32( __addr, __value)
+ #define vst4q_f16( __addr, __value) __arm_vst4q_f16( __addr, __value)
+ #define vst4q_f32( __addr, __value) __arm_vst4q_f32( __addr, __value)
+ #define vrndxq_f16(__a) __arm_vrndxq_f16(__a)
+ #define vrndxq_f32(__a) __arm_vrndxq_f32(__a)
+ #define vrndq_f16(__a) __arm_vrndq_f16(__a)
+ #define vrndq_f32(__a) __arm_vrndq_f32(__a)
+ #define vrndpq_f16(__a) __arm_vrndpq_f16(__a)
+ #define vrndpq_f32(__a) __arm_vrndpq_f32(__a)
+ #define vrndnq_f16(__a) __arm_vrndnq_f16(__a)
+ #define vrndnq_f32(__a) __arm_vrndnq_f32(__a)
+ #define vrndmq_f16(__a) __arm_vrndmq_f16(__a)
+ #define vrndmq_f32(__a) __arm_vrndmq_f32(__a)
+ #define vrndaq_f16(__a) __arm_vrndaq_f16(__a)
+ #define vrndaq_f32(__a) __arm_vrndaq_f32(__a)
+ #define vrev64q_f16(__a) __arm_vrev64q_f16(__a)
+ #define vrev64q_f32(__a) __arm_vrev64q_f32(__a)
+ #define vnegq_f16(__a) __arm_vnegq_f16(__a)
+ #define vnegq_f32(__a) __arm_vnegq_f32(__a)
+ #define vdupq_n_f16(__a) __arm_vdupq_n_f16(__a)
+ #define vdupq_n_f32(__a) __arm_vdupq_n_f32(__a)
+ #define vabsq_f16(__a) __arm_vabsq_f16(__a)
+ #define vabsq_f32(__a) __arm_vabsq_f32(__a)
+ #define vrev32q_f16(__a) __arm_vrev32q_f16(__a)
+ #define vcvttq_f32_f16(__a) __arm_vcvttq_f32_f16(__a)
+ #define vcvtbq_f32_f16(__a) __arm_vcvtbq_f32_f16(__a)
+ #define vcvtq_f16_s16(__a) __arm_vcvtq_f16_s16(__a)
+ #define vcvtq_f32_s32(__a) __arm_vcvtq_f32_s32(__a)
+ #define vcvtq_f16_u16(__a) __arm_vcvtq_f16_u16(__a)
+ #define vcvtq_f32_u32(__a) __arm_vcvtq_f32_u32(__a)
+ #define vdupq_n_s8(__a) __arm_vdupq_n_s8(__a)
+ #define vdupq_n_s16(__a) __arm_vdupq_n_s16(__a)
+ #define vdupq_n_s32(__a) __arm_vdupq_n_s32(__a)
+ #define vabsq_s8(__a) __arm_vabsq_s8(__a)
+ #define vabsq_s16(__a) __arm_vabsq_s16(__a)
+ #define vabsq_s32(__a) __arm_vabsq_s32(__a)
+ #define vclsq_s8(__a) __arm_vclsq_s8(__a)
+ #define vclsq_s16(__a) __arm_vclsq_s16(__a)
+ #define vclsq_s32(__a) __arm_vclsq_s32(__a)
+ #define vclzq_s8(__a) __arm_vclzq_s8(__a)
+ #define vclzq_s16(__a) __arm_vclzq_s16(__a)
+ #define vclzq_s32(__a) __arm_vclzq_s32(__a)
+ #define vnegq_s8(__a) __arm_vnegq_s8(__a)
+ #define vnegq_s16(__a) __arm_vnegq_s16(__a)
+ #define vnegq_s32(__a) __arm_vnegq_s32(__a)
+ #define vaddlvq_s32(__a) __arm_vaddlvq_s32(__a)
+ #define vaddvq_s8(__a) __arm_vaddvq_s8(__a)
+ #define vaddvq_s16(__a) __arm_vaddvq_s16(__a)
+ #define vaddvq_s32(__a) __arm_vaddvq_s32(__a)
+ #define vmovlbq_s8(__a) __arm_vmovlbq_s8(__a)
+ #define vmovlbq_s16(__a) __arm_vmovlbq_s16(__a)
+ #define vmovltq_s8(__a) __arm_vmovltq_s8(__a)
+ #define vmovltq_s16(__a) __arm_vmovltq_s16(__a)
+ #define vmvnq_s8(__a) __arm_vmvnq_s8(__a)
+ #define vmvnq_s16(__a) __arm_vmvnq_s16(__a)
+ #define vmvnq_s32(__a) __arm_vmvnq_s32(__a)
+ #define vmvnq_n_s16( __imm) __arm_vmvnq_n_s16( __imm)
+ #define vmvnq_n_s32( __imm) __arm_vmvnq_n_s32( __imm)
+ #define vrev16q_s8(__a) __arm_vrev16q_s8(__a)
+ #define vrev32q_s8(__a) __arm_vrev32q_s8(__a)
+ #define vrev32q_s16(__a) __arm_vrev32q_s16(__a)
+ #define vrev64q_s8(__a) __arm_vrev64q_s8(__a)
+ #define vrev64q_s16(__a) __arm_vrev64q_s16(__a)
+ #define vrev64q_s32(__a) __arm_vrev64q_s32(__a)
+ #define vqabsq_s8(__a) __arm_vqabsq_s8(__a)
+ #define vqabsq_s16(__a) __arm_vqabsq_s16(__a)
+ #define vqabsq_s32(__a) __arm_vqabsq_s32(__a)
+ #define vqnegq_s8(__a) __arm_vqnegq_s8(__a)
+ #define vqnegq_s16(__a) __arm_vqnegq_s16(__a)
+ #define vqnegq_s32(__a) __arm_vqnegq_s32(__a)
+ #define vcvtaq_s16_f16(__a) __arm_vcvtaq_s16_f16(__a)
+ #define vcvtaq_s32_f32(__a) __arm_vcvtaq_s32_f32(__a)
+ #define vcvtnq_s16_f16(__a) __arm_vcvtnq_s16_f16(__a)
+ #define vcvtnq_s32_f32(__a) __arm_vcvtnq_s32_f32(__a)
+ #define vcvtpq_s16_f16(__a) __arm_vcvtpq_s16_f16(__a)
+ #define vcvtpq_s32_f32(__a) __arm_vcvtpq_s32_f32(__a)
+ #define vcvtmq_s16_f16(__a) __arm_vcvtmq_s16_f16(__a)
+ #define vcvtmq_s32_f32(__a) __arm_vcvtmq_s32_f32(__a)
+ #define vcvtq_s16_f16(__a) __arm_vcvtq_s16_f16(__a)
+ #define vcvtq_s32_f32(__a) __arm_vcvtq_s32_f32(__a)
+ #define vrev64q_u8(__a) __arm_vrev64q_u8(__a)
+ #define vrev64q_u16(__a) __arm_vrev64q_u16(__a)
+ #define vrev64q_u32(__a) __arm_vrev64q_u32(__a)
+ #define vmvnq_u8(__a) __arm_vmvnq_u8(__a)
+ #define vmvnq_u16(__a) __arm_vmvnq_u16(__a)
+ #define vmvnq_u32(__a) __arm_vmvnq_u32(__a)
+ #define vdupq_n_u8(__a) __arm_vdupq_n_u8(__a)
+ #define vdupq_n_u16(__a) __arm_vdupq_n_u16(__a)
+ #define vdupq_n_u32(__a) __arm_vdupq_n_u32(__a)
+ #define vclzq_u8(__a) __arm_vclzq_u8(__a)
+ #define vclzq_u16(__a) __arm_vclzq_u16(__a)
+ #define vclzq_u32(__a) __arm_vclzq_u32(__a)
+ #define vaddvq_u8(__a) __arm_vaddvq_u8(__a)
+ #define vaddvq_u16(__a) __arm_vaddvq_u16(__a)
+ #define vaddvq_u32(__a) __arm_vaddvq_u32(__a)
+ #define vrev32q_u8(__a) __arm_vrev32q_u8(__a)
+ #define vrev32q_u16(__a) __arm_vrev32q_u16(__a)
+ #define vmovltq_u8(__a) __arm_vmovltq_u8(__a)
+ #define vmovltq_u16(__a) __arm_vmovltq_u16(__a)
+ #define vmovlbq_u8(__a) __arm_vmovlbq_u8(__a)
+ #define vmovlbq_u16(__a) __arm_vmovlbq_u16(__a)
+ #define vmvnq_n_u16( __imm) __arm_vmvnq_n_u16( __imm)
+ #define vmvnq_n_u32( __imm) __arm_vmvnq_n_u32( __imm)
+ #define vrev16q_u8(__a) __arm_vrev16q_u8(__a)
+ #define vaddlvq_u32(__a) __arm_vaddlvq_u32(__a)
+ #define vcvtq_u16_f16(__a) __arm_vcvtq_u16_f16(__a)
+ #define vcvtq_u32_f32(__a) __arm_vcvtq_u32_f32(__a)
+ #define vcvtpq_u16_f16(__a) __arm_vcvtpq_u16_f16(__a)
+ #define vcvtpq_u32_f32(__a) __arm_vcvtpq_u32_f32(__a)
+ #define vcvtnq_u16_f16(__a) __arm_vcvtnq_u16_f16(__a)
+ #define vcvtmq_u16_f16(__a) __arm_vcvtmq_u16_f16(__a)
+ #define vcvtmq_u32_f32(__a) __arm_vcvtmq_u32_f32(__a)
+ #define vcvtaq_u16_f16(__a) __arm_vcvtaq_u16_f16(__a)
+ #define vcvtaq_u32_f32(__a) __arm_vcvtaq_u32_f32(__a)
+ #define vctp16q(__a) __arm_vctp16q(__a)
+ #define vctp32q(__a) __arm_vctp32q(__a)
+ #define vctp64q(__a) __arm_vctp64q(__a)
+ #define vctp8q(__a) __arm_vctp8q(__a)
+ #define vpnot(__a) __arm_vpnot(__a)
+ #define vsubq_n_f16(__a, __b) __arm_vsubq_n_f16(__a, __b)
+ #define vsubq_n_f32(__a, __b) __arm_vsubq_n_f32(__a, __b)
+ #define vbrsrq_n_f16(__a, __b) __arm_vbrsrq_n_f16(__a, __b)
+ #define vbrsrq_n_f32(__a, __b) __arm_vbrsrq_n_f32(__a, __b)
+ #define vcvtq_n_f16_s16(__a,  __imm6) __arm_vcvtq_n_f16_s16(__a,  __imm6)
+ #define vcvtq_n_f32_s32(__a,  __imm6) __arm_vcvtq_n_f32_s32(__a,  __imm6)
+ #define vcvtq_n_f16_u16(__a,  __imm6) __arm_vcvtq_n_f16_u16(__a,  __imm6)
+ #define vcvtq_n_f32_u32(__a,  __imm6) __arm_vcvtq_n_f32_u32(__a,  __imm6)
+ #define vcreateq_f16(__a, __b) __arm_vcreateq_f16(__a, __b)
+ #define vcreateq_f32(__a, __b) __arm_vcreateq_f32(__a, __b)
+ #define vcvtq_n_s16_f16(__a,  __imm6) __arm_vcvtq_n_s16_f16(__a,  __imm6)
+ #define vcvtq_n_s32_f32(__a,  __imm6) __arm_vcvtq_n_s32_f32(__a,  __imm6)
+ #define vcvtq_n_u16_f16(__a,  __imm6) __arm_vcvtq_n_u16_f16(__a,  __imm6)
+ #define vcvtq_n_u32_f32(__a,  __imm6) __arm_vcvtq_n_u32_f32(__a,  __imm6)
+ #define vcreateq_u8(__a, __b) __arm_vcreateq_u8(__a, __b)
+ #define vcreateq_u16(__a, __b) __arm_vcreateq_u16(__a, __b)
+ #define vcreateq_u32(__a, __b) __arm_vcreateq_u32(__a, __b)
+ #define vcreateq_u64(__a, __b) __arm_vcreateq_u64(__a, __b)
+ #define vcreateq_s8(__a, __b) __arm_vcreateq_s8(__a, __b)
+ #define vcreateq_s16(__a, __b) __arm_vcreateq_s16(__a, __b)
+ #define vcreateq_s32(__a, __b) __arm_vcreateq_s32(__a, __b)
+ #define vcreateq_s64(__a, __b) __arm_vcreateq_s64(__a, __b)
+ #define vshrq_n_s8(__a,  __imm) __arm_vshrq_n_s8(__a,  __imm)
+ #define vshrq_n_s16(__a,  __imm) __arm_vshrq_n_s16(__a,  __imm)
+ #define vshrq_n_s32(__a,  __imm) __arm_vshrq_n_s32(__a,  __imm)
+ #define vshrq_n_u8(__a,  __imm) __arm_vshrq_n_u8(__a,  __imm)
+ #define vshrq_n_u16(__a,  __imm) __arm_vshrq_n_u16(__a,  __imm)
+ #define vshrq_n_u32(__a,  __imm) __arm_vshrq_n_u32(__a,  __imm)
+ #define vaddlvq_p_s32(__a, __p) __arm_vaddlvq_p_s32(__a, __p)
+ #define vaddlvq_p_u32(__a, __p) __arm_vaddlvq_p_u32(__a, __p)
+ #define vcmpneq_s8(__a, __b) __arm_vcmpneq_s8(__a, __b)
+ #define vcmpneq_s16(__a, __b) __arm_vcmpneq_s16(__a, __b)
+ #define vcmpneq_s32(__a, __b) __arm_vcmpneq_s32(__a, __b)
+ #define vcmpneq_u8(__a, __b) __arm_vcmpneq_u8(__a, __b)
+ #define vcmpneq_u16(__a, __b) __arm_vcmpneq_u16(__a, __b)
+ #define vcmpneq_u32(__a, __b) __arm_vcmpneq_u32(__a, __b)
+ #define vshlq_s8(__a, __b) __arm_vshlq_s8(__a, __b)
+ #define vshlq_s16(__a, __b) __arm_vshlq_s16(__a, __b)
+ #define vshlq_s32(__a, __b) __arm_vshlq_s32(__a, __b)
+ #define vshlq_u8(__a, __b) __arm_vshlq_u8(__a, __b)
+ #define vshlq_u16(__a, __b) __arm_vshlq_u16(__a, __b)
+ #define vshlq_u32(__a, __b) __arm_vshlq_u32(__a, __b)
+ #define vsubq_u8(__a, __b) __arm_vsubq_u8(__a, __b)
+ #define vsubq_n_u8(__a, __b) __arm_vsubq_n_u8(__a, __b)
+ #define vrmulhq_u8(__a, __b) __arm_vrmulhq_u8(__a, __b)
+ #define vrhaddq_u8(__a, __b) __arm_vrhaddq_u8(__a, __b)
+ #define vqsubq_u8(__a, __b) __arm_vqsubq_u8(__a, __b)
+ #define vqsubq_n_u8(__a, __b) __arm_vqsubq_n_u8(__a, __b)
+ #define vqaddq_u8(__a, __b) __arm_vqaddq_u8(__a, __b)
+ #define vqaddq_n_u8(__a, __b) __arm_vqaddq_n_u8(__a, __b)
+ #define vorrq_u8(__a, __b) __arm_vorrq_u8(__a, __b)
+ #define vornq_u8(__a, __b) __arm_vornq_u8(__a, __b)
+ #define vmulq_u8(__a, __b) __arm_vmulq_u8(__a, __b)
+ #define vmulq_n_u8(__a, __b) __arm_vmulq_n_u8(__a, __b)
+ #define vmulltq_int_u8(__a, __b) __arm_vmulltq_int_u8(__a, __b)
+ #define vmullbq_int_u8(__a, __b) __arm_vmullbq_int_u8(__a, __b)
+ #define vmulhq_u8(__a, __b) __arm_vmulhq_u8(__a, __b)
+ #define vmladavq_u8(__a, __b) __arm_vmladavq_u8(__a, __b)
+ #define vminvq_u8(__a, __b) __arm_vminvq_u8(__a, __b)
+ #define vminq_u8(__a, __b) __arm_vminq_u8(__a, __b)
+ #define vmaxvq_u8(__a, __b) __arm_vmaxvq_u8(__a, __b)
+ #define vmaxq_u8(__a, __b) __arm_vmaxq_u8(__a, __b)
+ #define vhsubq_u8(__a, __b) __arm_vhsubq_u8(__a, __b)
+ #define vhsubq_n_u8(__a, __b) __arm_vhsubq_n_u8(__a, __b)
+ #define vhaddq_u8(__a, __b) __arm_vhaddq_u8(__a, __b)
+ #define vhaddq_n_u8(__a, __b) __arm_vhaddq_n_u8(__a, __b)
+ #define veorq_u8(__a, __b) __arm_veorq_u8(__a, __b)
+ #define vcmpneq_n_u8(__a, __b) __arm_vcmpneq_n_u8(__a, __b)
+ #define vcmphiq_u8(__a, __b) __arm_vcmphiq_u8(__a, __b)
+ #define vcmphiq_n_u8(__a, __b) __arm_vcmphiq_n_u8(__a, __b)
+ #define vcmpeqq_u8(__a, __b) __arm_vcmpeqq_u8(__a, __b)
+ #define vcmpeqq_n_u8(__a, __b) __arm_vcmpeqq_n_u8(__a, __b)
+ #define vcmpcsq_u8(__a, __b) __arm_vcmpcsq_u8(__a, __b)
+ #define vcmpcsq_n_u8(__a, __b) __arm_vcmpcsq_n_u8(__a, __b)
+ #define vcaddq_rot90_u8(__a, __b) __arm_vcaddq_rot90_u8(__a, __b)
+ #define vcaddq_rot270_u8(__a, __b) __arm_vcaddq_rot270_u8(__a, __b)
+ #define vbicq_u8(__a, __b) __arm_vbicq_u8(__a, __b)
+ #define vandq_u8(__a, __b) __arm_vandq_u8(__a, __b)
+ #define vaddvq_p_u8(__a, __p) __arm_vaddvq_p_u8(__a, __p)
+ #define vaddvaq_u8(__a, __b) __arm_vaddvaq_u8(__a, __b)
+ #define vaddq_n_u8(__a, __b) __arm_vaddq_n_u8(__a, __b)
+ #define vabdq_u8(__a, __b) __arm_vabdq_u8(__a, __b)
+ #define vshlq_r_u8(__a, __b) __arm_vshlq_r_u8(__a, __b)
+ #define vrshlq_u8(__a, __b) __arm_vrshlq_u8(__a, __b)
+ #define vrshlq_n_u8(__a, __b) __arm_vrshlq_n_u8(__a, __b)
+ #define vqshlq_u8(__a, __b) __arm_vqshlq_u8(__a, __b)
+ #define vqshlq_r_u8(__a, __b) __arm_vqshlq_r_u8(__a, __b)
+ #define vqrshlq_u8(__a, __b) __arm_vqrshlq_u8(__a, __b)
+ #define vqrshlq_n_u8(__a, __b) __arm_vqrshlq_n_u8(__a, __b)
+ #define vminavq_s8(__a, __b) __arm_vminavq_s8(__a, __b)
+ #define vminaq_s8(__a, __b) __arm_vminaq_s8(__a, __b)
+ #define vmaxavq_s8(__a, __b) __arm_vmaxavq_s8(__a, __b)
+ #define vmaxaq_s8(__a, __b) __arm_vmaxaq_s8(__a, __b)
+ #define vbrsrq_n_u8(__a, __b) __arm_vbrsrq_n_u8(__a, __b)
+ #define vshlq_n_u8(__a,  __imm) __arm_vshlq_n_u8(__a,  __imm)
+ #define vrshrq_n_u8(__a,  __imm) __arm_vrshrq_n_u8(__a,  __imm)
+ #define vqshlq_n_u8(__a,  __imm) __arm_vqshlq_n_u8(__a,  __imm)
+ #define vcmpneq_n_s8(__a, __b) __arm_vcmpneq_n_s8(__a, __b)
+ #define vcmpltq_s8(__a, __b) __arm_vcmpltq_s8(__a, __b)
+ #define vcmpltq_n_s8(__a, __b) __arm_vcmpltq_n_s8(__a, __b)
+ #define vcmpleq_s8(__a, __b) __arm_vcmpleq_s8(__a, __b)
+ #define vcmpleq_n_s8(__a, __b) __arm_vcmpleq_n_s8(__a, __b)
+ #define vcmpgtq_s8(__a, __b) __arm_vcmpgtq_s8(__a, __b)
+ #define vcmpgtq_n_s8(__a, __b) __arm_vcmpgtq_n_s8(__a, __b)
+ #define vcmpgeq_s8(__a, __b) __arm_vcmpgeq_s8(__a, __b)
+ #define vcmpgeq_n_s8(__a, __b) __arm_vcmpgeq_n_s8(__a, __b)
+ #define vcmpeqq_s8(__a, __b) __arm_vcmpeqq_s8(__a, __b)
+ #define vcmpeqq_n_s8(__a, __b) __arm_vcmpeqq_n_s8(__a, __b)
+ #define vqshluq_n_s8(__a,  __imm) __arm_vqshluq_n_s8(__a,  __imm)
+ #define vaddvq_p_s8(__a, __p) __arm_vaddvq_p_s8(__a, __p)
+ #define vsubq_s8(__a, __b) __arm_vsubq_s8(__a, __b)
+ #define vsubq_n_s8(__a, __b) __arm_vsubq_n_s8(__a, __b)
+ #define vshlq_r_s8(__a, __b) __arm_vshlq_r_s8(__a, __b)
+ #define vrshlq_s8(__a, __b) __arm_vrshlq_s8(__a, __b)
+ #define vrshlq_n_s8(__a, __b) __arm_vrshlq_n_s8(__a, __b)
+ #define vrmulhq_s8(__a, __b) __arm_vrmulhq_s8(__a, __b)
+ #define vrhaddq_s8(__a, __b) __arm_vrhaddq_s8(__a, __b)
+ #define vqsubq_s8(__a, __b) __arm_vqsubq_s8(__a, __b)
+ #define vqsubq_n_s8(__a, __b) __arm_vqsubq_n_s8(__a, __b)
+ #define vqshlq_s8(__a, __b) __arm_vqshlq_s8(__a, __b)
+ #define vqshlq_r_s8(__a, __b) __arm_vqshlq_r_s8(__a, __b)
+ #define vqrshlq_s8(__a, __b) __arm_vqrshlq_s8(__a, __b)
+ #define vqrshlq_n_s8(__a, __b) __arm_vqrshlq_n_s8(__a, __b)
+ #define vqrdmulhq_s8(__a, __b) __arm_vqrdmulhq_s8(__a, __b)
+ #define vqrdmulhq_n_s8(__a, __b) __arm_vqrdmulhq_n_s8(__a, __b)
+ #define vqdmulhq_s8(__a, __b) __arm_vqdmulhq_s8(__a, __b)
+ #define vqdmulhq_n_s8(__a, __b) __arm_vqdmulhq_n_s8(__a, __b)
+ #define vqaddq_s8(__a, __b) __arm_vqaddq_s8(__a, __b)
+ #define vqaddq_n_s8(__a, __b) __arm_vqaddq_n_s8(__a, __b)
+ #define vorrq_s8(__a, __b) __arm_vorrq_s8(__a, __b)
+ #define vornq_s8(__a, __b) __arm_vornq_s8(__a, __b)
+ #define vmulq_s8(__a, __b) __arm_vmulq_s8(__a, __b)
+ #define vmulq_n_s8(__a, __b) __arm_vmulq_n_s8(__a, __b)
+ #define vmulltq_int_s8(__a, __b) __arm_vmulltq_int_s8(__a, __b)
+ #define vmullbq_int_s8(__a, __b) __arm_vmullbq_int_s8(__a, __b)
+ #define vmulhq_s8(__a, __b) __arm_vmulhq_s8(__a, __b)
+ #define vmlsdavxq_s8(__a, __b) __arm_vmlsdavxq_s8(__a, __b)
+ #define vmlsdavq_s8(__a, __b) __arm_vmlsdavq_s8(__a, __b)
+ #define vmladavxq_s8(__a, __b) __arm_vmladavxq_s8(__a, __b)
+ #define vmladavq_s8(__a, __b) __arm_vmladavq_s8(__a, __b)
+ #define vminvq_s8(__a, __b) __arm_vminvq_s8(__a, __b)
+ #define vminq_s8(__a, __b) __arm_vminq_s8(__a, __b)
+ #define vmaxvq_s8(__a, __b) __arm_vmaxvq_s8(__a, __b)
+ #define vmaxq_s8(__a, __b) __arm_vmaxq_s8(__a, __b)
+ #define vhsubq_s8(__a, __b) __arm_vhsubq_s8(__a, __b)
+ #define vhsubq_n_s8(__a, __b) __arm_vhsubq_n_s8(__a, __b)
+ #define vhcaddq_rot90_s8(__a, __b) __arm_vhcaddq_rot90_s8(__a, __b)
+ #define vhcaddq_rot270_s8(__a, __b) __arm_vhcaddq_rot270_s8(__a, __b)
+ #define vhaddq_s8(__a, __b) __arm_vhaddq_s8(__a, __b)
+ #define vhaddq_n_s8(__a, __b) __arm_vhaddq_n_s8(__a, __b)
+ #define veorq_s8(__a, __b) __arm_veorq_s8(__a, __b)
+ #define vcaddq_rot90_s8(__a, __b) __arm_vcaddq_rot90_s8(__a, __b)
+ #define vcaddq_rot270_s8(__a, __b) __arm_vcaddq_rot270_s8(__a, __b)
+ #define vbrsrq_n_s8(__a, __b) __arm_vbrsrq_n_s8(__a, __b)
+ #define vbicq_s8(__a, __b) __arm_vbicq_s8(__a, __b)
+ #define vandq_s8(__a, __b) __arm_vandq_s8(__a, __b)
+ #define vaddvaq_s8(__a, __b) __arm_vaddvaq_s8(__a, __b)
+ #define vaddq_n_s8(__a, __b) __arm_vaddq_n_s8(__a, __b)
+ #define vabdq_s8(__a, __b) __arm_vabdq_s8(__a, __b)
+ #define vshlq_n_s8(__a,  __imm) __arm_vshlq_n_s8(__a,  __imm)
+ #define vrshrq_n_s8(__a,  __imm) __arm_vrshrq_n_s8(__a,  __imm)
+ #define vqshlq_n_s8(__a,  __imm) __arm_vqshlq_n_s8(__a,  __imm)
+ #define vsubq_u16(__a, __b) __arm_vsubq_u16(__a, __b)
+ #define vsubq_n_u16(__a, __b) __arm_vsubq_n_u16(__a, __b)
+ #define vrmulhq_u16(__a, __b) __arm_vrmulhq_u16(__a, __b)
+ #define vrhaddq_u16(__a, __b) __arm_vrhaddq_u16(__a, __b)
+ #define vqsubq_u16(__a, __b) __arm_vqsubq_u16(__a, __b)
+ #define vqsubq_n_u16(__a, __b) __arm_vqsubq_n_u16(__a, __b)
+ #define vqaddq_u16(__a, __b) __arm_vqaddq_u16(__a, __b)
+ #define vqaddq_n_u16(__a, __b) __arm_vqaddq_n_u16(__a, __b)
+ #define vorrq_u16(__a, __b) __arm_vorrq_u16(__a, __b)
+ #define vornq_u16(__a, __b) __arm_vornq_u16(__a, __b)
+ #define vmulq_u16(__a, __b) __arm_vmulq_u16(__a, __b)
+ #define vmulq_n_u16(__a, __b) __arm_vmulq_n_u16(__a, __b)
+ #define vmulltq_int_u16(__a, __b) __arm_vmulltq_int_u16(__a, __b)
+ #define vmullbq_int_u16(__a, __b) __arm_vmullbq_int_u16(__a, __b)
+ #define vmulhq_u16(__a, __b) __arm_vmulhq_u16(__a, __b)
+ #define vmladavq_u16(__a, __b) __arm_vmladavq_u16(__a, __b)
+ #define vminvq_u16(__a, __b) __arm_vminvq_u16(__a, __b)
+ #define vminq_u16(__a, __b) __arm_vminq_u16(__a, __b)
+ #define vmaxvq_u16(__a, __b) __arm_vmaxvq_u16(__a, __b)
+ #define vmaxq_u16(__a, __b) __arm_vmaxq_u16(__a, __b)
+ #define vhsubq_u16(__a, __b) __arm_vhsubq_u16(__a, __b)
+ #define vhsubq_n_u16(__a, __b) __arm_vhsubq_n_u16(__a, __b)
+ #define vhaddq_u16(__a, __b) __arm_vhaddq_u16(__a, __b)
+ #define vhaddq_n_u16(__a, __b) __arm_vhaddq_n_u16(__a, __b)
+ #define veorq_u16(__a, __b) __arm_veorq_u16(__a, __b)
+ #define vcmpneq_n_u16(__a, __b) __arm_vcmpneq_n_u16(__a, __b)
+ #define vcmphiq_u16(__a, __b) __arm_vcmphiq_u16(__a, __b)
+ #define vcmphiq_n_u16(__a, __b) __arm_vcmphiq_n_u16(__a, __b)
+ #define vcmpeqq_u16(__a, __b) __arm_vcmpeqq_u16(__a, __b)
+ #define vcmpeqq_n_u16(__a, __b) __arm_vcmpeqq_n_u16(__a, __b)
+ #define vcmpcsq_u16(__a, __b) __arm_vcmpcsq_u16(__a, __b)
+ #define vcmpcsq_n_u16(__a, __b) __arm_vcmpcsq_n_u16(__a, __b)
+ #define vcaddq_rot90_u16(__a, __b) __arm_vcaddq_rot90_u16(__a, __b)
+ #define vcaddq_rot270_u16(__a, __b) __arm_vcaddq_rot270_u16(__a, __b)
+ #define vbicq_u16(__a, __b) __arm_vbicq_u16(__a, __b)
+ #define vandq_u16(__a, __b) __arm_vandq_u16(__a, __b)
+ #define vaddvq_p_u16(__a, __p) __arm_vaddvq_p_u16(__a, __p)
+ #define vaddvaq_u16(__a, __b) __arm_vaddvaq_u16(__a, __b)
+ #define vaddq_n_u16(__a, __b) __arm_vaddq_n_u16(__a, __b)
+ #define vabdq_u16(__a, __b) __arm_vabdq_u16(__a, __b)
+ #define vshlq_r_u16(__a, __b) __arm_vshlq_r_u16(__a, __b)
+ #define vrshlq_u16(__a, __b) __arm_vrshlq_u16(__a, __b)
+ #define vrshlq_n_u16(__a, __b) __arm_vrshlq_n_u16(__a, __b)
+ #define vqshlq_u16(__a, __b) __arm_vqshlq_u16(__a, __b)
+ #define vqshlq_r_u16(__a, __b) __arm_vqshlq_r_u16(__a, __b)
+ #define vqrshlq_u16(__a, __b) __arm_vqrshlq_u16(__a, __b)
+ #define vqrshlq_n_u16(__a, __b) __arm_vqrshlq_n_u16(__a, __b)
+ #define vminavq_s16(__a, __b) __arm_vminavq_s16(__a, __b)
+ #define vminaq_s16(__a, __b) __arm_vminaq_s16(__a, __b)
+ #define vmaxavq_s16(__a, __b) __arm_vmaxavq_s16(__a, __b)
+ #define vmaxaq_s16(__a, __b) __arm_vmaxaq_s16(__a, __b)
+ #define vbrsrq_n_u16(__a, __b) __arm_vbrsrq_n_u16(__a, __b)
+ #define vshlq_n_u16(__a,  __imm) __arm_vshlq_n_u16(__a,  __imm)
+ #define vrshrq_n_u16(__a,  __imm) __arm_vrshrq_n_u16(__a,  __imm)
+ #define vqshlq_n_u16(__a,  __imm) __arm_vqshlq_n_u16(__a,  __imm)
+ #define vcmpneq_n_s16(__a, __b) __arm_vcmpneq_n_s16(__a, __b)
+ #define vcmpltq_s16(__a, __b) __arm_vcmpltq_s16(__a, __b)
+ #define vcmpltq_n_s16(__a, __b) __arm_vcmpltq_n_s16(__a, __b)
+ #define vcmpleq_s16(__a, __b) __arm_vcmpleq_s16(__a, __b)
+ #define vcmpleq_n_s16(__a, __b) __arm_vcmpleq_n_s16(__a, __b)
+ #define vcmpgtq_s16(__a, __b) __arm_vcmpgtq_s16(__a, __b)
+ #define vcmpgtq_n_s16(__a, __b) __arm_vcmpgtq_n_s16(__a, __b)
+ #define vcmpgeq_s16(__a, __b) __arm_vcmpgeq_s16(__a, __b)
+ #define vcmpgeq_n_s16(__a, __b) __arm_vcmpgeq_n_s16(__a, __b)
+ #define vcmpeqq_s16(__a, __b) __arm_vcmpeqq_s16(__a, __b)
+ #define vcmpeqq_n_s16(__a, __b) __arm_vcmpeqq_n_s16(__a, __b)
+ #define vqshluq_n_s16(__a,  __imm) __arm_vqshluq_n_s16(__a,  __imm)
+ #define vaddvq_p_s16(__a, __p) __arm_vaddvq_p_s16(__a, __p)
+ #define vsubq_s16(__a, __b) __arm_vsubq_s16(__a, __b)
+ #define vsubq_n_s16(__a, __b) __arm_vsubq_n_s16(__a, __b)
+ #define vshlq_r_s16(__a, __b) __arm_vshlq_r_s16(__a, __b)
+ #define vrshlq_s16(__a, __b) __arm_vrshlq_s16(__a, __b)
+ #define vrshlq_n_s16(__a, __b) __arm_vrshlq_n_s16(__a, __b)
+ #define vrmulhq_s16(__a, __b) __arm_vrmulhq_s16(__a, __b)
+ #define vrhaddq_s16(__a, __b) __arm_vrhaddq_s16(__a, __b)
+ #define vqsubq_s16(__a, __b) __arm_vqsubq_s16(__a, __b)
+ #define vqsubq_n_s16(__a, __b) __arm_vqsubq_n_s16(__a, __b)
+ #define vqshlq_s16(__a, __b) __arm_vqshlq_s16(__a, __b)
+ #define vqshlq_r_s16(__a, __b) __arm_vqshlq_r_s16(__a, __b)
+ #define vqrshlq_s16(__a, __b) __arm_vqrshlq_s16(__a, __b)
+ #define vqrshlq_n_s16(__a, __b) __arm_vqrshlq_n_s16(__a, __b)
+ #define vqrdmulhq_s16(__a, __b) __arm_vqrdmulhq_s16(__a, __b)
+ #define vqrdmulhq_n_s16(__a, __b) __arm_vqrdmulhq_n_s16(__a, __b)
+ #define vqdmulhq_s16(__a, __b) __arm_vqdmulhq_s16(__a, __b)
+ #define vqdmulhq_n_s16(__a, __b) __arm_vqdmulhq_n_s16(__a, __b)
+ #define vqaddq_s16(__a, __b) __arm_vqaddq_s16(__a, __b)
+ #define vqaddq_n_s16(__a, __b) __arm_vqaddq_n_s16(__a, __b)
+ #define vorrq_s16(__a, __b) __arm_vorrq_s16(__a, __b)
+ #define vornq_s16(__a, __b) __arm_vornq_s16(__a, __b)
+ #define vmulq_s16(__a, __b) __arm_vmulq_s16(__a, __b)
+ #define vmulq_n_s16(__a, __b) __arm_vmulq_n_s16(__a, __b)
+ #define vmulltq_int_s16(__a, __b) __arm_vmulltq_int_s16(__a, __b)
+ #define vmullbq_int_s16(__a, __b) __arm_vmullbq_int_s16(__a, __b)
+ #define vmulhq_s16(__a, __b) __arm_vmulhq_s16(__a, __b)
+ #define vmlsdavxq_s16(__a, __b) __arm_vmlsdavxq_s16(__a, __b)
+ #define vmlsdavq_s16(__a, __b) __arm_vmlsdavq_s16(__a, __b)
+ #define vmladavxq_s16(__a, __b) __arm_vmladavxq_s16(__a, __b)
+ #define vmladavq_s16(__a, __b) __arm_vmladavq_s16(__a, __b)
+ #define vminvq_s16(__a, __b) __arm_vminvq_s16(__a, __b)
+ #define vminq_s16(__a, __b) __arm_vminq_s16(__a, __b)
+ #define vmaxvq_s16(__a, __b) __arm_vmaxvq_s16(__a, __b)
+ #define vmaxq_s16(__a, __b) __arm_vmaxq_s16(__a, __b)
+ #define vhsubq_s16(__a, __b) __arm_vhsubq_s16(__a, __b)
+ #define vhsubq_n_s16(__a, __b) __arm_vhsubq_n_s16(__a, __b)
+ #define vhcaddq_rot90_s16(__a, __b) __arm_vhcaddq_rot90_s16(__a, __b)
+ #define vhcaddq_rot270_s16(__a, __b) __arm_vhcaddq_rot270_s16(__a, __b)
+ #define vhaddq_s16(__a, __b) __arm_vhaddq_s16(__a, __b)
+ #define vhaddq_n_s16(__a, __b) __arm_vhaddq_n_s16(__a, __b)
+ #define veorq_s16(__a, __b) __arm_veorq_s16(__a, __b)
+ #define vcaddq_rot90_s16(__a, __b) __arm_vcaddq_rot90_s16(__a, __b)
+ #define vcaddq_rot270_s16(__a, __b) __arm_vcaddq_rot270_s16(__a, __b)
+ #define vbrsrq_n_s16(__a, __b) __arm_vbrsrq_n_s16(__a, __b)
+ #define vbicq_s16(__a, __b) __arm_vbicq_s16(__a, __b)
+ #define vandq_s16(__a, __b) __arm_vandq_s16(__a, __b)
+ #define vaddvaq_s16(__a, __b) __arm_vaddvaq_s16(__a, __b)
+ #define vaddq_n_s16(__a, __b) __arm_vaddq_n_s16(__a, __b)
+ #define vabdq_s16(__a, __b) __arm_vabdq_s16(__a, __b)
+ #define vshlq_n_s16(__a,  __imm) __arm_vshlq_n_s16(__a,  __imm)
+ #define vrshrq_n_s16(__a,  __imm) __arm_vrshrq_n_s16(__a,  __imm)
+ #define vqshlq_n_s16(__a,  __imm) __arm_vqshlq_n_s16(__a,  __imm)
+ #define vsubq_u32(__a, __b) __arm_vsubq_u32(__a, __b)
+ #define vsubq_n_u32(__a, __b) __arm_vsubq_n_u32(__a, __b)
+ #define vrmulhq_u32(__a, __b) __arm_vrmulhq_u32(__a, __b)
+ #define vrhaddq_u32(__a, __b) __arm_vrhaddq_u32(__a, __b)
+ #define vqsubq_u32(__a, __b) __arm_vqsubq_u32(__a, __b)
+ #define vqsubq_n_u32(__a, __b) __arm_vqsubq_n_u32(__a, __b)
+ #define vqaddq_u32(__a, __b) __arm_vqaddq_u32(__a, __b)
+ #define vqaddq_n_u32(__a, __b) __arm_vqaddq_n_u32(__a, __b)
+ #define vorrq_u32(__a, __b) __arm_vorrq_u32(__a, __b)
+ #define vornq_u32(__a, __b) __arm_vornq_u32(__a, __b)
+ #define vmulq_u32(__a, __b) __arm_vmulq_u32(__a, __b)
+ #define vmulq_n_u32(__a, __b) __arm_vmulq_n_u32(__a, __b)
+ #define vmulltq_int_u32(__a, __b) __arm_vmulltq_int_u32(__a, __b)
+ #define vmullbq_int_u32(__a, __b) __arm_vmullbq_int_u32(__a, __b)
+ #define vmulhq_u32(__a, __b) __arm_vmulhq_u32(__a, __b)
+ #define vmladavq_u32(__a, __b) __arm_vmladavq_u32(__a, __b)
+ #define vminvq_u32(__a, __b) __arm_vminvq_u32(__a, __b)
+ #define vminq_u32(__a, __b) __arm_vminq_u32(__a, __b)
+ #define vmaxvq_u32(__a, __b) __arm_vmaxvq_u32(__a, __b)
+ #define vmaxq_u32(__a, __b) __arm_vmaxq_u32(__a, __b)
+ #define vhsubq_u32(__a, __b) __arm_vhsubq_u32(__a, __b)
+ #define vhsubq_n_u32(__a, __b) __arm_vhsubq_n_u32(__a, __b)
+ #define vhaddq_u32(__a, __b) __arm_vhaddq_u32(__a, __b)
+ #define vhaddq_n_u32(__a, __b) __arm_vhaddq_n_u32(__a, __b)
+ #define veorq_u32(__a, __b) __arm_veorq_u32(__a, __b)
+ #define vcmpneq_n_u32(__a, __b) __arm_vcmpneq_n_u32(__a, __b)
+ #define vcmphiq_u32(__a, __b) __arm_vcmphiq_u32(__a, __b)
+ #define vcmphiq_n_u32(__a, __b) __arm_vcmphiq_n_u32(__a, __b)
+ #define vcmpeqq_u32(__a, __b) __arm_vcmpeqq_u32(__a, __b)
+ #define vcmpeqq_n_u32(__a, __b) __arm_vcmpeqq_n_u32(__a, __b)
+ #define vcmpcsq_u32(__a, __b) __arm_vcmpcsq_u32(__a, __b)
+ #define vcmpcsq_n_u32(__a, __b) __arm_vcmpcsq_n_u32(__a, __b)
+ #define vcaddq_rot90_u32(__a, __b) __arm_vcaddq_rot90_u32(__a, __b)
+ #define vcaddq_rot270_u32(__a, __b) __arm_vcaddq_rot270_u32(__a, __b)
+ #define vbicq_u32(__a, __b) __arm_vbicq_u32(__a, __b)
+ #define vandq_u32(__a, __b) __arm_vandq_u32(__a, __b)
+ #define vaddvq_p_u32(__a, __p) __arm_vaddvq_p_u32(__a, __p)
+ #define vaddvaq_u32(__a, __b) __arm_vaddvaq_u32(__a, __b)
+ #define vaddq_n_u32(__a, __b) __arm_vaddq_n_u32(__a, __b)
+ #define vabdq_u32(__a, __b) __arm_vabdq_u32(__a, __b)
+ #define vshlq_r_u32(__a, __b) __arm_vshlq_r_u32(__a, __b)
+ #define vrshlq_u32(__a, __b) __arm_vrshlq_u32(__a, __b)
+ #define vrshlq_n_u32(__a, __b) __arm_vrshlq_n_u32(__a, __b)
+ #define vqshlq_u32(__a, __b) __arm_vqshlq_u32(__a, __b)
+ #define vqshlq_r_u32(__a, __b) __arm_vqshlq_r_u32(__a, __b)
+ #define vqrshlq_u32(__a, __b) __arm_vqrshlq_u32(__a, __b)
+ #define vqrshlq_n_u32(__a, __b) __arm_vqrshlq_n_u32(__a, __b)
+ #define vminavq_s32(__a, __b) __arm_vminavq_s32(__a, __b)
+ #define vminaq_s32(__a, __b) __arm_vminaq_s32(__a, __b)
+ #define vmaxavq_s32(__a, __b) __arm_vmaxavq_s32(__a, __b)
+ #define vmaxaq_s32(__a, __b) __arm_vmaxaq_s32(__a, __b)
+ #define vbrsrq_n_u32(__a, __b) __arm_vbrsrq_n_u32(__a, __b)
+ #define vshlq_n_u32(__a,  __imm) __arm_vshlq_n_u32(__a,  __imm)
+ #define vrshrq_n_u32(__a,  __imm) __arm_vrshrq_n_u32(__a,  __imm)
+ #define vqshlq_n_u32(__a,  __imm) __arm_vqshlq_n_u32(__a,  __imm)
+ #define vcmpneq_n_s32(__a, __b) __arm_vcmpneq_n_s32(__a, __b)
+ #define vcmpltq_s32(__a, __b) __arm_vcmpltq_s32(__a, __b)
+ #define vcmpltq_n_s32(__a, __b) __arm_vcmpltq_n_s32(__a, __b)
+ #define vcmpleq_s32(__a, __b) __arm_vcmpleq_s32(__a, __b)
+ #define vcmpleq_n_s32(__a, __b) __arm_vcmpleq_n_s32(__a, __b)
+ #define vcmpgtq_s32(__a, __b) __arm_vcmpgtq_s32(__a, __b)
+ #define vcmpgtq_n_s32(__a, __b) __arm_vcmpgtq_n_s32(__a, __b)
+ #define vcmpgeq_s32(__a, __b) __arm_vcmpgeq_s32(__a, __b)
+ #define vcmpgeq_n_s32(__a, __b) __arm_vcmpgeq_n_s32(__a, __b)
+ #define vcmpeqq_s32(__a, __b) __arm_vcmpeqq_s32(__a, __b)
+ #define vcmpeqq_n_s32(__a, __b) __arm_vcmpeqq_n_s32(__a, __b)
+ #define vqshluq_n_s32(__a,  __imm) __arm_vqshluq_n_s32(__a,  __imm)
+ #define vaddvq_p_s32(__a, __p) __arm_vaddvq_p_s32(__a, __p)
+ #define vsubq_s32(__a, __b) __arm_vsubq_s32(__a, __b)
+ #define vsubq_n_s32(__a, __b) __arm_vsubq_n_s32(__a, __b)
+ #define vshlq_r_s32(__a, __b) __arm_vshlq_r_s32(__a, __b)
+ #define vrshlq_s32(__a, __b) __arm_vrshlq_s32(__a, __b)
+ #define vrshlq_n_s32(__a, __b) __arm_vrshlq_n_s32(__a, __b)
+ #define vrmulhq_s32(__a, __b) __arm_vrmulhq_s32(__a, __b)
+ #define vrhaddq_s32(__a, __b) __arm_vrhaddq_s32(__a, __b)
+ #define vqsubq_s32(__a, __b) __arm_vqsubq_s32(__a, __b)
+ #define vqsubq_n_s32(__a, __b) __arm_vqsubq_n_s32(__a, __b)
+ #define vqshlq_s32(__a, __b) __arm_vqshlq_s32(__a, __b)
+ #define vqshlq_r_s32(__a, __b) __arm_vqshlq_r_s32(__a, __b)
+ #define vqrshlq_s32(__a, __b) __arm_vqrshlq_s32(__a, __b)
+ #define vqrshlq_n_s32(__a, __b) __arm_vqrshlq_n_s32(__a, __b)
+ #define vqrdmulhq_s32(__a, __b) __arm_vqrdmulhq_s32(__a, __b)
+ #define vqrdmulhq_n_s32(__a, __b) __arm_vqrdmulhq_n_s32(__a, __b)
+ #define vqdmulhq_s32(__a, __b) __arm_vqdmulhq_s32(__a, __b)
+ #define vqdmulhq_n_s32(__a, __b) __arm_vqdmulhq_n_s32(__a, __b)
+ #define vqaddq_s32(__a, __b) __arm_vqaddq_s32(__a, __b)
+ #define vqaddq_n_s32(__a, __b) __arm_vqaddq_n_s32(__a, __b)
+ #define vorrq_s32(__a, __b) __arm_vorrq_s32(__a, __b)
+ #define vornq_s32(__a, __b) __arm_vornq_s32(__a, __b)
+ #define vmulq_s32(__a, __b) __arm_vmulq_s32(__a, __b)
+ #define vmulq_n_s32(__a, __b) __arm_vmulq_n_s32(__a, __b)
+ #define vmulltq_int_s32(__a, __b) __arm_vmulltq_int_s32(__a, __b)
+ #define vmullbq_int_s32(__a, __b) __arm_vmullbq_int_s32(__a, __b)
+ #define vmulhq_s32(__a, __b) __arm_vmulhq_s32(__a, __b)
+ #define vmlsdavxq_s32(__a, __b) __arm_vmlsdavxq_s32(__a, __b)
+ #define vmlsdavq_s32(__a, __b) __arm_vmlsdavq_s32(__a, __b)
+ #define vmladavxq_s32(__a, __b) __arm_vmladavxq_s32(__a, __b)
+ #define vmladavq_s32(__a, __b) __arm_vmladavq_s32(__a, __b)
+ #define vminvq_s32(__a, __b) __arm_vminvq_s32(__a, __b)
+ #define vminq_s32(__a, __b) __arm_vminq_s32(__a, __b)
+ #define vmaxvq_s32(__a, __b) __arm_vmaxvq_s32(__a, __b)
+ #define vmaxq_s32(__a, __b) __arm_vmaxq_s32(__a, __b)
+ #define vhsubq_s32(__a, __b) __arm_vhsubq_s32(__a, __b)
+ #define vhsubq_n_s32(__a, __b) __arm_vhsubq_n_s32(__a, __b)
+ #define vhcaddq_rot90_s32(__a, __b) __arm_vhcaddq_rot90_s32(__a, __b)
+ #define vhcaddq_rot270_s32(__a, __b) __arm_vhcaddq_rot270_s32(__a, __b)
+ #define vhaddq_s32(__a, __b) __arm_vhaddq_s32(__a, __b)
+ #define vhaddq_n_s32(__a, __b) __arm_vhaddq_n_s32(__a, __b)
+ #define veorq_s32(__a, __b) __arm_veorq_s32(__a, __b)
+ #define vcaddq_rot90_s32(__a, __b) __arm_vcaddq_rot90_s32(__a, __b)
+ #define vcaddq_rot270_s32(__a, __b) __arm_vcaddq_rot270_s32(__a, __b)
+ #define vbrsrq_n_s32(__a, __b) __arm_vbrsrq_n_s32(__a, __b)
+ #define vbicq_s32(__a, __b) __arm_vbicq_s32(__a, __b)
+ #define vandq_s32(__a, __b) __arm_vandq_s32(__a, __b)
+ #define vaddvaq_s32(__a, __b) __arm_vaddvaq_s32(__a, __b)
+ #define vaddq_n_s32(__a, __b) __arm_vaddq_n_s32(__a, __b)
+ #define vabdq_s32(__a, __b) __arm_vabdq_s32(__a, __b)
+ #define vshlq_n_s32(__a,  __imm) __arm_vshlq_n_s32(__a,  __imm)
+ #define vrshrq_n_s32(__a,  __imm) __arm_vrshrq_n_s32(__a,  __imm)
+ #define vqshlq_n_s32(__a,  __imm) __arm_vqshlq_n_s32(__a,  __imm)
+ #define vqmovntq_u16(__a, __b) __arm_vqmovntq_u16(__a, __b)
+ #define vqmovnbq_u16(__a, __b) __arm_vqmovnbq_u16(__a, __b)
+ #define vmulltq_poly_p8(__a, __b) __arm_vmulltq_poly_p8(__a, __b)
+ #define vmullbq_poly_p8(__a, __b) __arm_vmullbq_poly_p8(__a, __b)
+ #define vmovntq_u16(__a, __b) __arm_vmovntq_u16(__a, __b)
+ #define vmovnbq_u16(__a, __b) __arm_vmovnbq_u16(__a, __b)
+ #define vmlaldavq_u16(__a, __b) __arm_vmlaldavq_u16(__a, __b)
+ #define vqmovuntq_s16(__a, __b) __arm_vqmovuntq_s16(__a, __b)
+ #define vqmovunbq_s16(__a, __b) __arm_vqmovunbq_s16(__a, __b)
+ #define vshlltq_n_u8(__a,  __imm) __arm_vshlltq_n_u8(__a,  __imm)
+ #define vshllbq_n_u8(__a,  __imm) __arm_vshllbq_n_u8(__a,  __imm)
+ #define vorrq_n_u16(__a,  __imm) __arm_vorrq_n_u16(__a,  __imm)
+ #define vbicq_n_u16(__a,  __imm) __arm_vbicq_n_u16(__a,  __imm)
+ #define vcmpneq_n_f16(__a, __b) __arm_vcmpneq_n_f16(__a, __b)
+ #define vcmpneq_f16(__a, __b) __arm_vcmpneq_f16(__a, __b)
+ #define vcmpltq_n_f16(__a, __b) __arm_vcmpltq_n_f16(__a, __b)
+ #define vcmpltq_f16(__a, __b) __arm_vcmpltq_f16(__a, __b)
+ #define vcmpleq_n_f16(__a, __b) __arm_vcmpleq_n_f16(__a, __b)
+ #define vcmpleq_f16(__a, __b) __arm_vcmpleq_f16(__a, __b)
+ #define vcmpgtq_n_f16(__a, __b) __arm_vcmpgtq_n_f16(__a, __b)
+ #define vcmpgtq_f16(__a, __b) __arm_vcmpgtq_f16(__a, __b)
+ #define vcmpgeq_n_f16(__a, __b) __arm_vcmpgeq_n_f16(__a, __b)
+ #define vcmpgeq_f16(__a, __b) __arm_vcmpgeq_f16(__a, __b)
+ #define vcmpeqq_n_f16(__a, __b) __arm_vcmpeqq_n_f16(__a, __b)
+ #define vcmpeqq_f16(__a, __b) __arm_vcmpeqq_f16(__a, __b)
+ #define vsubq_f16(__a, __b) __arm_vsubq_f16(__a, __b)
+ #define vqmovntq_s16(__a, __b) __arm_vqmovntq_s16(__a, __b)
+ #define vqmovnbq_s16(__a, __b) __arm_vqmovnbq_s16(__a, __b)
+ #define vqdmulltq_s16(__a, __b) __arm_vqdmulltq_s16(__a, __b)
+ #define vqdmulltq_n_s16(__a, __b) __arm_vqdmulltq_n_s16(__a, __b)
+ #define vqdmullbq_s16(__a, __b) __arm_vqdmullbq_s16(__a, __b)
+ #define vqdmullbq_n_s16(__a, __b) __arm_vqdmullbq_n_s16(__a, __b)
+ #define vorrq_f16(__a, __b) __arm_vorrq_f16(__a, __b)
+ #define vornq_f16(__a, __b) __arm_vornq_f16(__a, __b)
+ #define vmulq_n_f16(__a, __b) __arm_vmulq_n_f16(__a, __b)
+ #define vmulq_f16(__a, __b) __arm_vmulq_f16(__a, __b)
+ #define vmovntq_s16(__a, __b) __arm_vmovntq_s16(__a, __b)
+ #define vmovnbq_s16(__a, __b) __arm_vmovnbq_s16(__a, __b)
+ #define vmlsldavxq_s16(__a, __b) __arm_vmlsldavxq_s16(__a, __b)
+ #define vmlsldavq_s16(__a, __b) __arm_vmlsldavq_s16(__a, __b)
+ #define vmlaldavxq_s16(__a, __b) __arm_vmlaldavxq_s16(__a, __b)
+ #define vmlaldavq_s16(__a, __b) __arm_vmlaldavq_s16(__a, __b)
+ #define vminnmvq_f16(__a, __b) __arm_vminnmvq_f16(__a, __b)
+ #define vminnmq_f16(__a, __b) __arm_vminnmq_f16(__a, __b)
+ #define vminnmavq_f16(__a, __b) __arm_vminnmavq_f16(__a, __b)
+ #define vminnmaq_f16(__a, __b) __arm_vminnmaq_f16(__a, __b)
+ #define vmaxnmvq_f16(__a, __b) __arm_vmaxnmvq_f16(__a, __b)
+ #define vmaxnmq_f16(__a, __b) __arm_vmaxnmq_f16(__a, __b)
+ #define vmaxnmavq_f16(__a, __b) __arm_vmaxnmavq_f16(__a, __b)
+ #define vmaxnmaq_f16(__a, __b) __arm_vmaxnmaq_f16(__a, __b)
+ #define veorq_f16(__a, __b) __arm_veorq_f16(__a, __b)
+ #define vcmulq_rot90_f16(__a, __b) __arm_vcmulq_rot90_f16(__a, __b)
+ #define vcmulq_rot270_f16(__a, __b) __arm_vcmulq_rot270_f16(__a, __b)
+ #define vcmulq_rot180_f16(__a, __b) __arm_vcmulq_rot180_f16(__a, __b)
+ #define vcmulq_f16(__a, __b) __arm_vcmulq_f16(__a, __b)
+ #define vcaddq_rot90_f16(__a, __b) __arm_vcaddq_rot90_f16(__a, __b)
+ #define vcaddq_rot270_f16(__a, __b) __arm_vcaddq_rot270_f16(__a, __b)
+ #define vbicq_f16(__a, __b) __arm_vbicq_f16(__a, __b)
+ #define vandq_f16(__a, __b) __arm_vandq_f16(__a, __b)
+ #define vaddq_n_f16(__a, __b) __arm_vaddq_n_f16(__a, __b)
+ #define vabdq_f16(__a, __b) __arm_vabdq_f16(__a, __b)
+ #define vshlltq_n_s8(__a,  __imm) __arm_vshlltq_n_s8(__a,  __imm)
+ #define vshllbq_n_s8(__a,  __imm) __arm_vshllbq_n_s8(__a,  __imm)
+ #define vorrq_n_s16(__a,  __imm) __arm_vorrq_n_s16(__a,  __imm)
+ #define vbicq_n_s16(__a,  __imm) __arm_vbicq_n_s16(__a,  __imm)
+ #define vqmovntq_u32(__a, __b) __arm_vqmovntq_u32(__a, __b)
+ #define vqmovnbq_u32(__a, __b) __arm_vqmovnbq_u32(__a, __b)
+ #define vmulltq_poly_p16(__a, __b) __arm_vmulltq_poly_p16(__a, __b)
+ #define vmullbq_poly_p16(__a, __b) __arm_vmullbq_poly_p16(__a, __b)
+ #define vmovntq_u32(__a, __b) __arm_vmovntq_u32(__a, __b)
+ #define vmovnbq_u32(__a, __b) __arm_vmovnbq_u32(__a, __b)
+ #define vmlaldavq_u32(__a, __b) __arm_vmlaldavq_u32(__a, __b)
+ #define vqmovuntq_s32(__a, __b) __arm_vqmovuntq_s32(__a, __b)
+ #define vqmovunbq_s32(__a, __b) __arm_vqmovunbq_s32(__a, __b)
+ #define vshlltq_n_u16(__a,  __imm) __arm_vshlltq_n_u16(__a,  __imm)
+ #define vshllbq_n_u16(__a,  __imm) __arm_vshllbq_n_u16(__a,  __imm)
+ #define vorrq_n_u32(__a,  __imm) __arm_vorrq_n_u32(__a,  __imm)
+ #define vbicq_n_u32(__a,  __imm) __arm_vbicq_n_u32(__a,  __imm)
+ #define vcmpneq_n_f32(__a, __b) __arm_vcmpneq_n_f32(__a, __b)
+ #define vcmpneq_f32(__a, __b) __arm_vcmpneq_f32(__a, __b)
+ #define vcmpltq_n_f32(__a, __b) __arm_vcmpltq_n_f32(__a, __b)
+ #define vcmpltq_f32(__a, __b) __arm_vcmpltq_f32(__a, __b)
+ #define vcmpleq_n_f32(__a, __b) __arm_vcmpleq_n_f32(__a, __b)
+ #define vcmpleq_f32(__a, __b) __arm_vcmpleq_f32(__a, __b)
+ #define vcmpgtq_n_f32(__a, __b) __arm_vcmpgtq_n_f32(__a, __b)
+ #define vcmpgtq_f32(__a, __b) __arm_vcmpgtq_f32(__a, __b)
+ #define vcmpgeq_n_f32(__a, __b) __arm_vcmpgeq_n_f32(__a, __b)
+ #define vcmpgeq_f32(__a, __b) __arm_vcmpgeq_f32(__a, __b)
+ #define vcmpeqq_n_f32(__a, __b) __arm_vcmpeqq_n_f32(__a, __b)
+ #define vcmpeqq_f32(__a, __b) __arm_vcmpeqq_f32(__a, __b)
+ #define vsubq_f32(__a, __b) __arm_vsubq_f32(__a, __b)
+ #define vqmovntq_s32(__a, __b) __arm_vqmovntq_s32(__a, __b)
+ #define vqmovnbq_s32(__a, __b) __arm_vqmovnbq_s32(__a, __b)
+ #define vqdmulltq_s32(__a, __b) __arm_vqdmulltq_s32(__a, __b)
+ #define vqdmulltq_n_s32(__a, __b) __arm_vqdmulltq_n_s32(__a, __b)
+ #define vqdmullbq_s32(__a, __b) __arm_vqdmullbq_s32(__a, __b)
+ #define vqdmullbq_n_s32(__a, __b) __arm_vqdmullbq_n_s32(__a, __b)
+ #define vorrq_f32(__a, __b) __arm_vorrq_f32(__a, __b)
+ #define vornq_f32(__a, __b) __arm_vornq_f32(__a, __b)
+ #define vmulq_n_f32(__a, __b) __arm_vmulq_n_f32(__a, __b)
+ #define vmulq_f32(__a, __b) __arm_vmulq_f32(__a, __b)
+ #define vmovntq_s32(__a, __b) __arm_vmovntq_s32(__a, __b)
+ #define vmovnbq_s32(__a, __b) __arm_vmovnbq_s32(__a, __b)
+ #define vmlsldavxq_s32(__a, __b) __arm_vmlsldavxq_s32(__a, __b)
+ #define vmlsldavq_s32(__a, __b) __arm_vmlsldavq_s32(__a, __b)
+ #define vmlaldavxq_s32(__a, __b) __arm_vmlaldavxq_s32(__a, __b)
+ #define vmlaldavq_s32(__a, __b) __arm_vmlaldavq_s32(__a, __b)
+ #define vminnmvq_f32(__a, __b) __arm_vminnmvq_f32(__a, __b)
+ #define vminnmq_f32(__a, __b) __arm_vminnmq_f32(__a, __b)
+ #define vminnmavq_f32(__a, __b) __arm_vminnmavq_f32(__a, __b)
+ #define vminnmaq_f32(__a, __b) __arm_vminnmaq_f32(__a, __b)
+ #define vmaxnmvq_f32(__a, __b) __arm_vmaxnmvq_f32(__a, __b)
+ #define vmaxnmq_f32(__a, __b) __arm_vmaxnmq_f32(__a, __b)
+ #define vmaxnmavq_f32(__a, __b) __arm_vmaxnmavq_f32(__a, __b)
+ #define vmaxnmaq_f32(__a, __b) __arm_vmaxnmaq_f32(__a, __b)
+ #define veorq_f32(__a, __b) __arm_veorq_f32(__a, __b)
+ #define vcmulq_rot90_f32(__a, __b) __arm_vcmulq_rot90_f32(__a, __b)
+ #define vcmulq_rot270_f32(__a, __b) __arm_vcmulq_rot270_f32(__a, __b)
+ #define vcmulq_rot180_f32(__a, __b) __arm_vcmulq_rot180_f32(__a, __b)
+ #define vcmulq_f32(__a, __b) __arm_vcmulq_f32(__a, __b)
+ #define vcaddq_rot90_f32(__a, __b) __arm_vcaddq_rot90_f32(__a, __b)
+ #define vcaddq_rot270_f32(__a, __b) __arm_vcaddq_rot270_f32(__a, __b)
+ #define vbicq_f32(__a, __b) __arm_vbicq_f32(__a, __b)
+ #define vandq_f32(__a, __b) __arm_vandq_f32(__a, __b)
+ #define vaddq_n_f32(__a, __b) __arm_vaddq_n_f32(__a, __b)
+ #define vabdq_f32(__a, __b) __arm_vabdq_f32(__a, __b)
+ #define vshlltq_n_s16(__a,  __imm) __arm_vshlltq_n_s16(__a,  __imm)
+ #define vshllbq_n_s16(__a,  __imm) __arm_vshllbq_n_s16(__a,  __imm)
+ #define vorrq_n_s32(__a,  __imm) __arm_vorrq_n_s32(__a,  __imm)
+ #define vbicq_n_s32(__a,  __imm) __arm_vbicq_n_s32(__a,  __imm)
+ #define vrmlaldavhq_u32(__a, __b) __arm_vrmlaldavhq_u32(__a, __b)
+ #define vctp8q_m(__a, __p) __arm_vctp8q_m(__a, __p)
+ #define vctp64q_m(__a, __p) __arm_vctp64q_m(__a, __p)
+ #define vctp32q_m(__a, __p) __arm_vctp32q_m(__a, __p)
+ #define vctp16q_m(__a, __p) __arm_vctp16q_m(__a, __p)
+ #define vaddlvaq_u32(__a, __b) __arm_vaddlvaq_u32(__a, __b)
+ #define vrmlsldavhxq_s32(__a, __b) __arm_vrmlsldavhxq_s32(__a, __b)
+ #define vrmlsldavhq_s32(__a, __b) __arm_vrmlsldavhq_s32(__a, __b)
+ #define vrmlaldavhxq_s32(__a, __b) __arm_vrmlaldavhxq_s32(__a, __b)
+ #define vrmlaldavhq_s32(__a, __b) __arm_vrmlaldavhq_s32(__a, __b)
+ #define vcvttq_f16_f32(__a, __b) __arm_vcvttq_f16_f32(__a, __b)
+ #define vcvtbq_f16_f32(__a, __b) __arm_vcvtbq_f16_f32(__a, __b)
+ #define vaddlvaq_s32(__a, __b) __arm_vaddlvaq_s32(__a, __b)
+ #define vabavq_s8(__a, __b, __c) __arm_vabavq_s8(__a, __b, __c)
+ #define vabavq_s16(__a, __b, __c) __arm_vabavq_s16(__a, __b, __c)
+ #define vabavq_s32(__a, __b, __c) __arm_vabavq_s32(__a, __b, __c)
+ #define vbicq_m_n_s16(__a,  __imm, __p) __arm_vbicq_m_n_s16(__a,  __imm, __p)
+ #define vbicq_m_n_s32(__a,  __imm, __p) __arm_vbicq_m_n_s32(__a,  __imm, __p)
+ #define vbicq_m_n_u16(__a,  __imm, __p) __arm_vbicq_m_n_u16(__a,  __imm, __p)
+ #define vbicq_m_n_u32(__a,  __imm, __p) __arm_vbicq_m_n_u32(__a,  __imm, __p)
+ #define vcmpeqq_m_f16(__a, __b, __p) __arm_vcmpeqq_m_f16(__a, __b, __p)
+ #define vcmpeqq_m_f32(__a, __b, __p) __arm_vcmpeqq_m_f32(__a, __b, __p)
+ #define vcvtaq_m_s16_f16(__inactive, __a, __p) __arm_vcvtaq_m_s16_f16(__inactive, __a, __p)
+ #define vcvtaq_m_u16_f16(__inactive, __a, __p) __arm_vcvtaq_m_u16_f16(__inactive, __a, __p)
+ #define vcvtaq_m_s32_f32(__inactive, __a, __p) __arm_vcvtaq_m_s32_f32(__inactive, __a, __p)
+ #define vcvtaq_m_u32_f32(__inactive, __a, __p) __arm_vcvtaq_m_u32_f32(__inactive, __a, __p)
+ #define vcvtq_m_f16_s16(__inactive, __a, __p) __arm_vcvtq_m_f16_s16(__inactive, __a, __p)
+ #define vcvtq_m_f16_u16(__inactive, __a, __p) __arm_vcvtq_m_f16_u16(__inactive, __a, __p)
+ #define vcvtq_m_f32_s32(__inactive, __a, __p) __arm_vcvtq_m_f32_s32(__inactive, __a, __p)
+ #define vcvtq_m_f32_u32(__inactive, __a, __p) __arm_vcvtq_m_f32_u32(__inactive, __a, __p)
+ #define vqrshrnbq_n_s16(__a, __b,  __imm) __arm_vqrshrnbq_n_s16(__a, __b,  __imm)
+ #define vqrshrnbq_n_u16(__a, __b,  __imm) __arm_vqrshrnbq_n_u16(__a, __b,  __imm)
+ #define vqrshrnbq_n_s32(__a, __b,  __imm) __arm_vqrshrnbq_n_s32(__a, __b,  __imm)
+ #define vqrshrnbq_n_u32(__a, __b,  __imm) __arm_vqrshrnbq_n_u32(__a, __b,  __imm)
+ #define vqrshrunbq_n_s16(__a, __b,  __imm) __arm_vqrshrunbq_n_s16(__a, __b,  __imm)
+ #define vqrshrunbq_n_s32(__a, __b,  __imm) __arm_vqrshrunbq_n_s32(__a, __b,  __imm)
+ #define vrmlaldavhaq_s32(__a, __b, __c) __arm_vrmlaldavhaq_s32(__a, __b, __c)
+ #define vrmlaldavhaq_u32(__a, __b, __c) __arm_vrmlaldavhaq_u32(__a, __b, __c)
+ #define vshlcq_s8(__a,  __b,  __imm) __arm_vshlcq_s8(__a,  __b,  __imm)
+ #define vshlcq_u8(__a,  __b,  __imm) __arm_vshlcq_u8(__a,  __b,  __imm)
+ #define vshlcq_s16(__a,  __b,  __imm) __arm_vshlcq_s16(__a,  __b,  __imm)
+ #define vshlcq_u16(__a,  __b,  __imm) __arm_vshlcq_u16(__a,  __b,  __imm)
+ #define vshlcq_s32(__a,  __b,  __imm) __arm_vshlcq_s32(__a,  __b,  __imm)
+ #define vshlcq_u32(__a,  __b,  __imm) __arm_vshlcq_u32(__a,  __b,  __imm)
+ #define vabavq_u8(__a, __b, __c) __arm_vabavq_u8(__a, __b, __c)
+ #define vabavq_u16(__a, __b, __c) __arm_vabavq_u16(__a, __b, __c)
+ #define vabavq_u32(__a, __b, __c) __arm_vabavq_u32(__a, __b, __c)
+ #define vpselq_u8(__a, __b, __p) __arm_vpselq_u8(__a, __b, __p)
+ #define vpselq_s8(__a, __b, __p) __arm_vpselq_s8(__a, __b, __p)
+ #define vrev64q_m_u8(__inactive, __a, __p) __arm_vrev64q_m_u8(__inactive, __a, __p)
+ #define vqrdmlashq_n_u8(__a, __b, __c) __arm_vqrdmlashq_n_u8(__a, __b, __c)
+ #define vqrdmlahq_n_u8(__a, __b, __c) __arm_vqrdmlahq_n_u8(__a, __b, __c)
+ #define vqdmlahq_n_u8(__a, __b, __c) __arm_vqdmlahq_n_u8(__a, __b, __c)
+ #define vmvnq_m_u8(__inactive, __a, __p) __arm_vmvnq_m_u8(__inactive, __a, __p)
+ #define vmlasq_n_u8(__a, __b, __c) __arm_vmlasq_n_u8(__a, __b, __c)
+ #define vmlaq_n_u8(__a, __b, __c) __arm_vmlaq_n_u8(__a, __b, __c)
+ #define vmladavq_p_u8(__a, __b, __p) __arm_vmladavq_p_u8(__a, __b, __p)
+ #define vmladavaq_u8(__a, __b, __c) __arm_vmladavaq_u8(__a, __b, __c)
+ #define vminvq_p_u8(__a, __b, __p) __arm_vminvq_p_u8(__a, __b, __p)
+ #define vmaxvq_p_u8(__a, __b, __p) __arm_vmaxvq_p_u8(__a, __b, __p)
+ #define vdupq_m_n_u8(__inactive, __a, __p) __arm_vdupq_m_n_u8(__inactive, __a, __p)
+ #define vcmpneq_m_u8(__a, __b, __p) __arm_vcmpneq_m_u8(__a, __b, __p)
+ #define vcmpneq_m_n_u8(__a, __b, __p) __arm_vcmpneq_m_n_u8(__a, __b, __p)
+ #define vcmphiq_m_u8(__a, __b, __p) __arm_vcmphiq_m_u8(__a, __b, __p)
+ #define vcmphiq_m_n_u8(__a, __b, __p) __arm_vcmphiq_m_n_u8(__a, __b, __p)
+ #define vcmpeqq_m_u8(__a, __b, __p) __arm_vcmpeqq_m_u8(__a, __b, __p)
+ #define vcmpeqq_m_n_u8(__a, __b, __p) __arm_vcmpeqq_m_n_u8(__a, __b, __p)
+ #define vcmpcsq_m_u8(__a, __b, __p) __arm_vcmpcsq_m_u8(__a, __b, __p)
+ #define vcmpcsq_m_n_u8(__a, __b, __p) __arm_vcmpcsq_m_n_u8(__a, __b, __p)
+ #define vclzq_m_u8(__inactive, __a, __p) __arm_vclzq_m_u8(__inactive, __a, __p)
+ #define vaddvaq_p_u8(__a, __b, __p) __arm_vaddvaq_p_u8(__a, __b, __p)
+ #define vsriq_n_u8(__a, __b,  __imm) __arm_vsriq_n_u8(__a, __b,  __imm)
+ #define vsliq_n_u8(__a, __b,  __imm) __arm_vsliq_n_u8(__a, __b,  __imm)
+ #define vshlq_m_r_u8(__a, __b, __p) __arm_vshlq_m_r_u8(__a, __b, __p)
+ #define vrshlq_m_n_u8(__a, __b, __p) __arm_vrshlq_m_n_u8(__a, __b, __p)
+ #define vqshlq_m_r_u8(__a, __b, __p) __arm_vqshlq_m_r_u8(__a, __b, __p)
+ #define vqrshlq_m_n_u8(__a, __b, __p) __arm_vqrshlq_m_n_u8(__a, __b, __p)
+ #define vminavq_p_s8(__a, __b, __p) __arm_vminavq_p_s8(__a, __b, __p)
+ #define vminaq_m_s8(__a, __b, __p) __arm_vminaq_m_s8(__a, __b, __p)
+ #define vmaxavq_p_s8(__a, __b, __p) __arm_vmaxavq_p_s8(__a, __b, __p)
+ #define vmaxaq_m_s8(__a, __b, __p) __arm_vmaxaq_m_s8(__a, __b, __p)
+ #define vcmpneq_m_s8(__a, __b, __p) __arm_vcmpneq_m_s8(__a, __b, __p)
+ #define vcmpneq_m_n_s8(__a, __b, __p) __arm_vcmpneq_m_n_s8(__a, __b, __p)
+ #define vcmpltq_m_s8(__a, __b, __p) __arm_vcmpltq_m_s8(__a, __b, __p)
+ #define vcmpltq_m_n_s8(__a, __b, __p) __arm_vcmpltq_m_n_s8(__a, __b, __p)
+ #define vcmpleq_m_s8(__a, __b, __p) __arm_vcmpleq_m_s8(__a, __b, __p)
+ #define vcmpleq_m_n_s8(__a, __b, __p) __arm_vcmpleq_m_n_s8(__a, __b, __p)
+ #define vcmpgtq_m_s8(__a, __b, __p) __arm_vcmpgtq_m_s8(__a, __b, __p)
+ #define vcmpgtq_m_n_s8(__a, __b, __p) __arm_vcmpgtq_m_n_s8(__a, __b, __p)
+ #define vcmpgeq_m_s8(__a, __b, __p) __arm_vcmpgeq_m_s8(__a, __b, __p)
+ #define vcmpgeq_m_n_s8(__a, __b, __p) __arm_vcmpgeq_m_n_s8(__a, __b, __p)
+ #define vcmpeqq_m_s8(__a, __b, __p) __arm_vcmpeqq_m_s8(__a, __b, __p)
+ #define vcmpeqq_m_n_s8(__a, __b, __p) __arm_vcmpeqq_m_n_s8(__a, __b, __p)
+ #define vshlq_m_r_s8(__a, __b, __p) __arm_vshlq_m_r_s8(__a, __b, __p)
+ #define vrshlq_m_n_s8(__a, __b, __p) __arm_vrshlq_m_n_s8(__a, __b, __p)
+ #define vrev64q_m_s8(__inactive, __a, __p) __arm_vrev64q_m_s8(__inactive, __a, __p)
+ #define vqshlq_m_r_s8(__a, __b, __p) __arm_vqshlq_m_r_s8(__a, __b, __p)
+ #define vqrshlq_m_n_s8(__a, __b, __p) __arm_vqrshlq_m_n_s8(__a, __b, __p)
+ #define vqnegq_m_s8(__inactive, __a, __p) __arm_vqnegq_m_s8(__inactive, __a, __p)
+ #define vqabsq_m_s8(__inactive, __a, __p) __arm_vqabsq_m_s8(__inactive, __a, __p)
+ #define vnegq_m_s8(__inactive, __a, __p) __arm_vnegq_m_s8(__inactive, __a, __p)
+ #define vmvnq_m_s8(__inactive, __a, __p) __arm_vmvnq_m_s8(__inactive, __a, __p)
+ #define vmlsdavxq_p_s8(__a, __b, __p) __arm_vmlsdavxq_p_s8(__a, __b, __p)
+ #define vmlsdavq_p_s8(__a, __b, __p) __arm_vmlsdavq_p_s8(__a, __b, __p)
+ #define vmladavxq_p_s8(__a, __b, __p) __arm_vmladavxq_p_s8(__a, __b, __p)
+ #define vmladavq_p_s8(__a, __b, __p) __arm_vmladavq_p_s8(__a, __b, __p)
+ #define vminvq_p_s8(__a, __b, __p) __arm_vminvq_p_s8(__a, __b, __p)
+ #define vmaxvq_p_s8(__a, __b, __p) __arm_vmaxvq_p_s8(__a, __b, __p)
+ #define vdupq_m_n_s8(__inactive, __a, __p) __arm_vdupq_m_n_s8(__inactive, __a, __p)
+ #define vclzq_m_s8(__inactive, __a, __p) __arm_vclzq_m_s8(__inactive, __a, __p)
+ #define vclsq_m_s8(__inactive, __a, __p) __arm_vclsq_m_s8(__inactive, __a, __p)
+ #define vaddvaq_p_s8(__a, __b, __p) __arm_vaddvaq_p_s8(__a, __b, __p)
+ #define vabsq_m_s8(__inactive, __a, __p) __arm_vabsq_m_s8(__inactive, __a, __p)
+ #define vqrdmlsdhxq_s8(__inactive, __a, __b) __arm_vqrdmlsdhxq_s8(__inactive, __a, __b)
+ #define vqrdmlsdhq_s8(__inactive, __a, __b) __arm_vqrdmlsdhq_s8(__inactive, __a, __b)
+ #define vqrdmlashq_n_s8(__a, __b, __c) __arm_vqrdmlashq_n_s8(__a, __b, __c)
+ #define vqrdmlahq_n_s8(__a, __b, __c) __arm_vqrdmlahq_n_s8(__a, __b, __c)
+ #define vqrdmladhxq_s8(__inactive, __a, __b) __arm_vqrdmladhxq_s8(__inactive, __a, __b)
+ #define vqrdmladhq_s8(__inactive, __a, __b) __arm_vqrdmladhq_s8(__inactive, __a, __b)
+ #define vqdmlsdhxq_s8(__inactive, __a, __b) __arm_vqdmlsdhxq_s8(__inactive, __a, __b)
+ #define vqdmlsdhq_s8(__inactive, __a, __b) __arm_vqdmlsdhq_s8(__inactive, __a, __b)
+ #define vqdmlahq_n_s8(__a, __b, __c) __arm_vqdmlahq_n_s8(__a, __b, __c)
+ #define vqdmladhxq_s8(__inactive, __a, __b) __arm_vqdmladhxq_s8(__inactive, __a, __b)
+ #define vqdmladhq_s8(__inactive, __a, __b) __arm_vqdmladhq_s8(__inactive, __a, __b)
+ #define vmlsdavaxq_s8(__a, __b, __c) __arm_vmlsdavaxq_s8(__a, __b, __c)
+ #define vmlsdavaq_s8(__a, __b, __c) __arm_vmlsdavaq_s8(__a, __b, __c)
+ #define vmlasq_n_s8(__a, __b, __c) __arm_vmlasq_n_s8(__a, __b, __c)
+ #define vmlaq_n_s8(__a, __b, __c) __arm_vmlaq_n_s8(__a, __b, __c)
+ #define vmladavaxq_s8(__a, __b, __c) __arm_vmladavaxq_s8(__a, __b, __c)
+ #define vmladavaq_s8(__a, __b, __c) __arm_vmladavaq_s8(__a, __b, __c)
+ #define vsriq_n_s8(__a, __b,  __imm) __arm_vsriq_n_s8(__a, __b,  __imm)
+ #define vsliq_n_s8(__a, __b,  __imm) __arm_vsliq_n_s8(__a, __b,  __imm)
+ #define vpselq_u16(__a, __b, __p) __arm_vpselq_u16(__a, __b, __p)
+ #define vpselq_s16(__a, __b, __p) __arm_vpselq_s16(__a, __b, __p)
+ #define vrev64q_m_u16(__inactive, __a, __p) __arm_vrev64q_m_u16(__inactive, __a, __p)
+ #define vqrdmlashq_n_u16(__a, __b, __c) __arm_vqrdmlashq_n_u16(__a, __b, __c)
+ #define vqrdmlahq_n_u16(__a, __b, __c) __arm_vqrdmlahq_n_u16(__a, __b, __c)
+ #define vqdmlahq_n_u16(__a, __b, __c) __arm_vqdmlahq_n_u16(__a, __b, __c)
+ #define vmvnq_m_u16(__inactive, __a, __p) __arm_vmvnq_m_u16(__inactive, __a, __p)
+ #define vmlasq_n_u16(__a, __b, __c) __arm_vmlasq_n_u16(__a, __b, __c)
+ #define vmlaq_n_u16(__a, __b, __c) __arm_vmlaq_n_u16(__a, __b, __c)
+ #define vmladavq_p_u16(__a, __b, __p) __arm_vmladavq_p_u16(__a, __b, __p)
+ #define vmladavaq_u16(__a, __b, __c) __arm_vmladavaq_u16(__a, __b, __c)
+ #define vminvq_p_u16(__a, __b, __p) __arm_vminvq_p_u16(__a, __b, __p)
+ #define vmaxvq_p_u16(__a, __b, __p) __arm_vmaxvq_p_u16(__a, __b, __p)
+ #define vdupq_m_n_u16(__inactive, __a, __p) __arm_vdupq_m_n_u16(__inactive, __a, __p)
+ #define vcmpneq_m_u16(__a, __b, __p) __arm_vcmpneq_m_u16(__a, __b, __p)
+ #define vcmpneq_m_n_u16(__a, __b, __p) __arm_vcmpneq_m_n_u16(__a, __b, __p)
+ #define vcmphiq_m_u16(__a, __b, __p) __arm_vcmphiq_m_u16(__a, __b, __p)
+ #define vcmphiq_m_n_u16(__a, __b, __p) __arm_vcmphiq_m_n_u16(__a, __b, __p)
+ #define vcmpeqq_m_u16(__a, __b, __p) __arm_vcmpeqq_m_u16(__a, __b, __p)
+ #define vcmpeqq_m_n_u16(__a, __b, __p) __arm_vcmpeqq_m_n_u16(__a, __b, __p)
+ #define vcmpcsq_m_u16(__a, __b, __p) __arm_vcmpcsq_m_u16(__a, __b, __p)
+ #define vcmpcsq_m_n_u16(__a, __b, __p) __arm_vcmpcsq_m_n_u16(__a, __b, __p)
+ #define vclzq_m_u16(__inactive, __a, __p) __arm_vclzq_m_u16(__inactive, __a, __p)
+ #define vaddvaq_p_u16(__a, __b, __p) __arm_vaddvaq_p_u16(__a, __b, __p)
+ #define vsriq_n_u16(__a, __b,  __imm) __arm_vsriq_n_u16(__a, __b,  __imm)
+ #define vsliq_n_u16(__a, __b,  __imm) __arm_vsliq_n_u16(__a, __b,  __imm)
+ #define vshlq_m_r_u16(__a, __b, __p) __arm_vshlq_m_r_u16(__a, __b, __p)
+ #define vrshlq_m_n_u16(__a, __b, __p) __arm_vrshlq_m_n_u16(__a, __b, __p)
+ #define vqshlq_m_r_u16(__a, __b, __p) __arm_vqshlq_m_r_u16(__a, __b, __p)
+ #define vqrshlq_m_n_u16(__a, __b, __p) __arm_vqrshlq_m_n_u16(__a, __b, __p)
+ #define vminavq_p_s16(__a, __b, __p) __arm_vminavq_p_s16(__a, __b, __p)
+ #define vminaq_m_s16(__a, __b, __p) __arm_vminaq_m_s16(__a, __b, __p)
+ #define vmaxavq_p_s16(__a, __b, __p) __arm_vmaxavq_p_s16(__a, __b, __p)
+ #define vmaxaq_m_s16(__a, __b, __p) __arm_vmaxaq_m_s16(__a, __b, __p)
+ #define vcmpneq_m_s16(__a, __b, __p) __arm_vcmpneq_m_s16(__a, __b, __p)
+ #define vcmpneq_m_n_s16(__a, __b, __p) __arm_vcmpneq_m_n_s16(__a, __b, __p)
+ #define vcmpltq_m_s16(__a, __b, __p) __arm_vcmpltq_m_s16(__a, __b, __p)
+ #define vcmpltq_m_n_s16(__a, __b, __p) __arm_vcmpltq_m_n_s16(__a, __b, __p)
+ #define vcmpleq_m_s16(__a, __b, __p) __arm_vcmpleq_m_s16(__a, __b, __p)
+ #define vcmpleq_m_n_s16(__a, __b, __p) __arm_vcmpleq_m_n_s16(__a, __b, __p)
+ #define vcmpgtq_m_s16(__a, __b, __p) __arm_vcmpgtq_m_s16(__a, __b, __p)
+ #define vcmpgtq_m_n_s16(__a, __b, __p) __arm_vcmpgtq_m_n_s16(__a, __b, __p)
+ #define vcmpgeq_m_s16(__a, __b, __p) __arm_vcmpgeq_m_s16(__a, __b, __p)
+ #define vcmpgeq_m_n_s16(__a, __b, __p) __arm_vcmpgeq_m_n_s16(__a, __b, __p)
+ #define vcmpeqq_m_s16(__a, __b, __p) __arm_vcmpeqq_m_s16(__a, __b, __p)
+ #define vcmpeqq_m_n_s16(__a, __b, __p) __arm_vcmpeqq_m_n_s16(__a, __b, __p)
+ #define vshlq_m_r_s16(__a, __b, __p) __arm_vshlq_m_r_s16(__a, __b, __p)
+ #define vrshlq_m_n_s16(__a, __b, __p) __arm_vrshlq_m_n_s16(__a, __b, __p)
+ #define vrev64q_m_s16(__inactive, __a, __p) __arm_vrev64q_m_s16(__inactive, __a, __p)
+ #define vqshlq_m_r_s16(__a, __b, __p) __arm_vqshlq_m_r_s16(__a, __b, __p)
+ #define vqrshlq_m_n_s16(__a, __b, __p) __arm_vqrshlq_m_n_s16(__a, __b, __p)
+ #define vqnegq_m_s16(__inactive, __a, __p) __arm_vqnegq_m_s16(__inactive, __a, __p)
+ #define vqabsq_m_s16(__inactive, __a, __p) __arm_vqabsq_m_s16(__inactive, __a, __p)
+ #define vnegq_m_s16(__inactive, __a, __p) __arm_vnegq_m_s16(__inactive, __a, __p)
+ #define vmvnq_m_s16(__inactive, __a, __p) __arm_vmvnq_m_s16(__inactive, __a, __p)
+ #define vmlsdavxq_p_s16(__a, __b, __p) __arm_vmlsdavxq_p_s16(__a, __b, __p)
+ #define vmlsdavq_p_s16(__a, __b, __p) __arm_vmlsdavq_p_s16(__a, __b, __p)
+ #define vmladavxq_p_s16(__a, __b, __p) __arm_vmladavxq_p_s16(__a, __b, __p)
+ #define vmladavq_p_s16(__a, __b, __p) __arm_vmladavq_p_s16(__a, __b, __p)
+ #define vminvq_p_s16(__a, __b, __p) __arm_vminvq_p_s16(__a, __b, __p)
+ #define vmaxvq_p_s16(__a, __b, __p) __arm_vmaxvq_p_s16(__a, __b, __p)
+ #define vdupq_m_n_s16(__inactive, __a, __p) __arm_vdupq_m_n_s16(__inactive, __a, __p)
+ #define vclzq_m_s16(__inactive, __a, __p) __arm_vclzq_m_s16(__inactive, __a, __p)
+ #define vclsq_m_s16(__inactive, __a, __p) __arm_vclsq_m_s16(__inactive, __a, __p)
+ #define vaddvaq_p_s16(__a, __b, __p) __arm_vaddvaq_p_s16(__a, __b, __p)
+ #define vabsq_m_s16(__inactive, __a, __p) __arm_vabsq_m_s16(__inactive, __a, __p)
+ #define vqrdmlsdhxq_s16(__inactive, __a, __b) __arm_vqrdmlsdhxq_s16(__inactive, __a, __b)
+ #define vqrdmlsdhq_s16(__inactive, __a, __b) __arm_vqrdmlsdhq_s16(__inactive, __a, __b)
+ #define vqrdmlashq_n_s16(__a, __b, __c) __arm_vqrdmlashq_n_s16(__a, __b, __c)
+ #define vqrdmlahq_n_s16(__a, __b, __c) __arm_vqrdmlahq_n_s16(__a, __b, __c)
+ #define vqrdmladhxq_s16(__inactive, __a, __b) __arm_vqrdmladhxq_s16(__inactive, __a, __b)
+ #define vqrdmladhq_s16(__inactive, __a, __b) __arm_vqrdmladhq_s16(__inactive, __a, __b)
+ #define vqdmlsdhxq_s16(__inactive, __a, __b) __arm_vqdmlsdhxq_s16(__inactive, __a, __b)
+ #define vqdmlsdhq_s16(__inactive, __a, __b) __arm_vqdmlsdhq_s16(__inactive, __a, __b)
+ #define vqdmlahq_n_s16(__a, __b, __c) __arm_vqdmlahq_n_s16(__a, __b, __c)
+ #define vqdmladhxq_s16(__inactive, __a, __b) __arm_vqdmladhxq_s16(__inactive, __a, __b)
+ #define vqdmladhq_s16(__inactive, __a, __b) __arm_vqdmladhq_s16(__inactive, __a, __b)
+ #define vmlsdavaxq_s16(__a, __b, __c) __arm_vmlsdavaxq_s16(__a, __b, __c)
+ #define vmlsdavaq_s16(__a, __b, __c) __arm_vmlsdavaq_s16(__a, __b, __c)
+ #define vmlasq_n_s16(__a, __b, __c) __arm_vmlasq_n_s16(__a, __b, __c)
+ #define vmlaq_n_s16(__a, __b, __c) __arm_vmlaq_n_s16(__a, __b, __c)
+ #define vmladavaxq_s16(__a, __b, __c) __arm_vmladavaxq_s16(__a, __b, __c)
+ #define vmladavaq_s16(__a, __b, __c) __arm_vmladavaq_s16(__a, __b, __c)
+ #define vsriq_n_s16(__a, __b,  __imm) __arm_vsriq_n_s16(__a, __b,  __imm)
+ #define vsliq_n_s16(__a, __b,  __imm) __arm_vsliq_n_s16(__a, __b,  __imm)
+ #define vpselq_u32(__a, __b, __p) __arm_vpselq_u32(__a, __b, __p)
+ #define vpselq_s32(__a, __b, __p) __arm_vpselq_s32(__a, __b, __p)
+ #define vrev64q_m_u32(__inactive, __a, __p) __arm_vrev64q_m_u32(__inactive, __a, __p)
+ #define vqrdmlashq_n_u32(__a, __b, __c) __arm_vqrdmlashq_n_u32(__a, __b, __c)
+ #define vqrdmlahq_n_u32(__a, __b, __c) __arm_vqrdmlahq_n_u32(__a, __b, __c)
+ #define vqdmlahq_n_u32(__a, __b, __c) __arm_vqdmlahq_n_u32(__a, __b, __c)
+ #define vmvnq_m_u32(__inactive, __a, __p) __arm_vmvnq_m_u32(__inactive, __a, __p)
+ #define vmlasq_n_u32(__a, __b, __c) __arm_vmlasq_n_u32(__a, __b, __c)
+ #define vmlaq_n_u32(__a, __b, __c) __arm_vmlaq_n_u32(__a, __b, __c)
+ #define vmladavq_p_u32(__a, __b, __p) __arm_vmladavq_p_u32(__a, __b, __p)
+ #define vmladavaq_u32(__a, __b, __c) __arm_vmladavaq_u32(__a, __b, __c)
+ #define vminvq_p_u32(__a, __b, __p) __arm_vminvq_p_u32(__a, __b, __p)
+ #define vmaxvq_p_u32(__a, __b, __p) __arm_vmaxvq_p_u32(__a, __b, __p)
+ #define vdupq_m_n_u32(__inactive, __a, __p) __arm_vdupq_m_n_u32(__inactive, __a, __p)
+ #define vcmpneq_m_u32(__a, __b, __p) __arm_vcmpneq_m_u32(__a, __b, __p)
+ #define vcmpneq_m_n_u32(__a, __b, __p) __arm_vcmpneq_m_n_u32(__a, __b, __p)
+ #define vcmphiq_m_u32(__a, __b, __p) __arm_vcmphiq_m_u32(__a, __b, __p)
+ #define vcmphiq_m_n_u32(__a, __b, __p) __arm_vcmphiq_m_n_u32(__a, __b, __p)
+ #define vcmpeqq_m_u32(__a, __b, __p) __arm_vcmpeqq_m_u32(__a, __b, __p)
+ #define vcmpeqq_m_n_u32(__a, __b, __p) __arm_vcmpeqq_m_n_u32(__a, __b, __p)
+ #define vcmpcsq_m_u32(__a, __b, __p) __arm_vcmpcsq_m_u32(__a, __b, __p)
+ #define vcmpcsq_m_n_u32(__a, __b, __p) __arm_vcmpcsq_m_n_u32(__a, __b, __p)
+ #define vclzq_m_u32(__inactive, __a, __p) __arm_vclzq_m_u32(__inactive, __a, __p)
+ #define vaddvaq_p_u32(__a, __b, __p) __arm_vaddvaq_p_u32(__a, __b, __p)
+ #define vsriq_n_u32(__a, __b,  __imm) __arm_vsriq_n_u32(__a, __b,  __imm)
+ #define vsliq_n_u32(__a, __b,  __imm) __arm_vsliq_n_u32(__a, __b,  __imm)
+ #define vshlq_m_r_u32(__a, __b, __p) __arm_vshlq_m_r_u32(__a, __b, __p)
+ #define vrshlq_m_n_u32(__a, __b, __p) __arm_vrshlq_m_n_u32(__a, __b, __p)
+ #define vqshlq_m_r_u32(__a, __b, __p) __arm_vqshlq_m_r_u32(__a, __b, __p)
+ #define vqrshlq_m_n_u32(__a, __b, __p) __arm_vqrshlq_m_n_u32(__a, __b, __p)
+ #define vminavq_p_s32(__a, __b, __p) __arm_vminavq_p_s32(__a, __b, __p)
+ #define vminaq_m_s32(__a, __b, __p) __arm_vminaq_m_s32(__a, __b, __p)
+ #define vmaxavq_p_s32(__a, __b, __p) __arm_vmaxavq_p_s32(__a, __b, __p)
+ #define vmaxaq_m_s32(__a, __b, __p) __arm_vmaxaq_m_s32(__a, __b, __p)
+ #define vcmpneq_m_s32(__a, __b, __p) __arm_vcmpneq_m_s32(__a, __b, __p)
+ #define vcmpneq_m_n_s32(__a, __b, __p) __arm_vcmpneq_m_n_s32(__a, __b, __p)
+ #define vcmpltq_m_s32(__a, __b, __p) __arm_vcmpltq_m_s32(__a, __b, __p)
+ #define vcmpltq_m_n_s32(__a, __b, __p) __arm_vcmpltq_m_n_s32(__a, __b, __p)
+ #define vcmpleq_m_s32(__a, __b, __p) __arm_vcmpleq_m_s32(__a, __b, __p)
+ #define vcmpleq_m_n_s32(__a, __b, __p) __arm_vcmpleq_m_n_s32(__a, __b, __p)
+ #define vcmpgtq_m_s32(__a, __b, __p) __arm_vcmpgtq_m_s32(__a, __b, __p)
+ #define vcmpgtq_m_n_s32(__a, __b, __p) __arm_vcmpgtq_m_n_s32(__a, __b, __p)
+ #define vcmpgeq_m_s32(__a, __b, __p) __arm_vcmpgeq_m_s32(__a, __b, __p)
+ #define vcmpgeq_m_n_s32(__a, __b, __p) __arm_vcmpgeq_m_n_s32(__a, __b, __p)
+ #define vcmpeqq_m_s32(__a, __b, __p) __arm_vcmpeqq_m_s32(__a, __b, __p)
+ #define vcmpeqq_m_n_s32(__a, __b, __p) __arm_vcmpeqq_m_n_s32(__a, __b, __p)
+ #define vshlq_m_r_s32(__a, __b, __p) __arm_vshlq_m_r_s32(__a, __b, __p)
+ #define vrshlq_m_n_s32(__a, __b, __p) __arm_vrshlq_m_n_s32(__a, __b, __p)
+ #define vrev64q_m_s32(__inactive, __a, __p) __arm_vrev64q_m_s32(__inactive, __a, __p)
+ #define vqshlq_m_r_s32(__a, __b, __p) __arm_vqshlq_m_r_s32(__a, __b, __p)
+ #define vqrshlq_m_n_s32(__a, __b, __p) __arm_vqrshlq_m_n_s32(__a, __b, __p)
+ #define vqnegq_m_s32(__inactive, __a, __p) __arm_vqnegq_m_s32(__inactive, __a, __p)
+ #define vqabsq_m_s32(__inactive, __a, __p) __arm_vqabsq_m_s32(__inactive, __a, __p)
+ #define vnegq_m_s32(__inactive, __a, __p) __arm_vnegq_m_s32(__inactive, __a, __p)
+ #define vmvnq_m_s32(__inactive, __a, __p) __arm_vmvnq_m_s32(__inactive, __a, __p)
+ #define vmlsdavxq_p_s32(__a, __b, __p) __arm_vmlsdavxq_p_s32(__a, __b, __p)
+ #define vmlsdavq_p_s32(__a, __b, __p) __arm_vmlsdavq_p_s32(__a, __b, __p)
+ #define vmladavxq_p_s32(__a, __b, __p) __arm_vmladavxq_p_s32(__a, __b, __p)
+ #define vmladavq_p_s32(__a, __b, __p) __arm_vmladavq_p_s32(__a, __b, __p)
+ #define vminvq_p_s32(__a, __b, __p) __arm_vminvq_p_s32(__a, __b, __p)
+ #define vmaxvq_p_s32(__a, __b, __p) __arm_vmaxvq_p_s32(__a, __b, __p)
+ #define vdupq_m_n_s32(__inactive, __a, __p) __arm_vdupq_m_n_s32(__inactive, __a, __p)
+ #define vclzq_m_s32(__inactive, __a, __p) __arm_vclzq_m_s32(__inactive, __a, __p)
+ #define vclsq_m_s32(__inactive, __a, __p) __arm_vclsq_m_s32(__inactive, __a, __p)
+ #define vaddvaq_p_s32(__a, __b, __p) __arm_vaddvaq_p_s32(__a, __b, __p)
+ #define vabsq_m_s32(__inactive, __a, __p) __arm_vabsq_m_s32(__inactive, __a, __p)
+ #define vqrdmlsdhxq_s32(__inactive, __a, __b) __arm_vqrdmlsdhxq_s32(__inactive, __a, __b)
+ #define vqrdmlsdhq_s32(__inactive, __a, __b) __arm_vqrdmlsdhq_s32(__inactive, __a, __b)
+ #define vqrdmlashq_n_s32(__a, __b, __c) __arm_vqrdmlashq_n_s32(__a, __b, __c)
+ #define vqrdmlahq_n_s32(__a, __b, __c) __arm_vqrdmlahq_n_s32(__a, __b, __c)
+ #define vqrdmladhxq_s32(__inactive, __a, __b) __arm_vqrdmladhxq_s32(__inactive, __a, __b)
+ #define vqrdmladhq_s32(__inactive, __a, __b) __arm_vqrdmladhq_s32(__inactive, __a, __b)
+ #define vqdmlsdhxq_s32(__inactive, __a, __b) __arm_vqdmlsdhxq_s32(__inactive, __a, __b)
+ #define vqdmlsdhq_s32(__inactive, __a, __b) __arm_vqdmlsdhq_s32(__inactive, __a, __b)
+ #define vqdmlahq_n_s32(__a, __b, __c) __arm_vqdmlahq_n_s32(__a, __b, __c)
+ #define vqdmladhxq_s32(__inactive, __a, __b) __arm_vqdmladhxq_s32(__inactive, __a, __b)
+ #define vqdmladhq_s32(__inactive, __a, __b) __arm_vqdmladhq_s32(__inactive, __a, __b)
+ #define vmlsdavaxq_s32(__a, __b, __c) __arm_vmlsdavaxq_s32(__a, __b, __c)
+ #define vmlsdavaq_s32(__a, __b, __c) __arm_vmlsdavaq_s32(__a, __b, __c)
+ #define vmlasq_n_s32(__a, __b, __c) __arm_vmlasq_n_s32(__a, __b, __c)
+ #define vmlaq_n_s32(__a, __b, __c) __arm_vmlaq_n_s32(__a, __b, __c)
+ #define vmladavaxq_s32(__a, __b, __c) __arm_vmladavaxq_s32(__a, __b, __c)
+ #define vmladavaq_s32(__a, __b, __c) __arm_vmladavaq_s32(__a, __b, __c)
+ #define vsriq_n_s32(__a, __b,  __imm) __arm_vsriq_n_s32(__a, __b,  __imm)
+ #define vsliq_n_s32(__a, __b,  __imm) __arm_vsliq_n_s32(__a, __b,  __imm)
+ #define vpselq_u64(__a, __b, __p) __arm_vpselq_u64(__a, __b, __p)
+ #define vpselq_s64(__a, __b, __p) __arm_vpselq_s64(__a, __b, __p)
+ #define vrmlaldavhaxq_s32(__a, __b, __c) __arm_vrmlaldavhaxq_s32(__a, __b, __c)
+ #define vrmlsldavhaq_s32(__a, __b, __c) __arm_vrmlsldavhaq_s32(__a, __b, __c)
+ #define vrmlsldavhaxq_s32(__a, __b, __c) __arm_vrmlsldavhaxq_s32(__a, __b, __c)
+ #define vaddlvaq_p_s32(__a, __b, __p) __arm_vaddlvaq_p_s32(__a, __b, __p)
+ #define vcvtbq_m_f16_f32(__a, __b, __p) __arm_vcvtbq_m_f16_f32(__a, __b, __p)
+ #define vcvtbq_m_f32_f16(__inactive, __a, __p) __arm_vcvtbq_m_f32_f16(__inactive, __a, __p)
+ #define vcvttq_m_f16_f32(__a, __b, __p) __arm_vcvttq_m_f16_f32(__a, __b, __p)
+ #define vcvttq_m_f32_f16(__inactive, __a, __p) __arm_vcvttq_m_f32_f16(__inactive, __a, __p)
+ #define vrev16q_m_s8(__inactive, __a, __p) __arm_vrev16q_m_s8(__inactive, __a, __p)
+ #define vrev32q_m_f16(__inactive, __a, __p) __arm_vrev32q_m_f16(__inactive, __a, __p)
+ #define vrmlaldavhq_p_s32(__a, __b, __p) __arm_vrmlaldavhq_p_s32(__a, __b, __p)
+ #define vrmlaldavhxq_p_s32(__a, __b, __p) __arm_vrmlaldavhxq_p_s32(__a, __b, __p)
+ #define vrmlsldavhq_p_s32(__a, __b, __p) __arm_vrmlsldavhq_p_s32(__a, __b, __p)
+ #define vrmlsldavhxq_p_s32(__a, __b, __p) __arm_vrmlsldavhxq_p_s32(__a, __b, __p)
+ #define vaddlvaq_p_u32(__a, __b, __p) __arm_vaddlvaq_p_u32(__a, __b, __p)
+ #define vrev16q_m_u8(__inactive, __a, __p) __arm_vrev16q_m_u8(__inactive, __a, __p)
+ #define vrmlaldavhq_p_u32(__a, __b, __p) __arm_vrmlaldavhq_p_u32(__a, __b, __p)
+ #define vmvnq_m_n_s16(__inactive,  __imm, __p) __arm_vmvnq_m_n_s16(__inactive,  __imm, __p)
+ #define vorrq_m_n_s16(__a,  __imm, __p) __arm_vorrq_m_n_s16(__a,  __imm, __p)
+ #define vqrshrntq_n_s16(__a, __b,  __imm) __arm_vqrshrntq_n_s16(__a, __b,  __imm)
+ #define vqshrnbq_n_s16(__a, __b,  __imm) __arm_vqshrnbq_n_s16(__a, __b,  __imm)
+ #define vqshrntq_n_s16(__a, __b,  __imm) __arm_vqshrntq_n_s16(__a, __b,  __imm)
+ #define vrshrnbq_n_s16(__a, __b,  __imm) __arm_vrshrnbq_n_s16(__a, __b,  __imm)
+ #define vrshrntq_n_s16(__a, __b,  __imm) __arm_vrshrntq_n_s16(__a, __b,  __imm)
+ #define vshrnbq_n_s16(__a, __b,  __imm) __arm_vshrnbq_n_s16(__a, __b,  __imm)
+ #define vshrntq_n_s16(__a, __b,  __imm) __arm_vshrntq_n_s16(__a, __b,  __imm)
+ #define vcmlaq_f16(__a, __b, __c) __arm_vcmlaq_f16(__a, __b, __c)
+ #define vcmlaq_rot180_f16(__a, __b, __c) __arm_vcmlaq_rot180_f16(__a, __b, __c)
+ #define vcmlaq_rot270_f16(__a, __b, __c) __arm_vcmlaq_rot270_f16(__a, __b, __c)
+ #define vcmlaq_rot90_f16(__a, __b, __c) __arm_vcmlaq_rot90_f16(__a, __b, __c)
+ #define vfmaq_f16(__a, __b, __c) __arm_vfmaq_f16(__a, __b, __c)
+ #define vfmaq_n_f16(__a, __b, __c) __arm_vfmaq_n_f16(__a, __b, __c)
+ #define vfmasq_n_f16(__a, __b, __c) __arm_vfmasq_n_f16(__a, __b, __c)
+ #define vfmsq_f16(__a, __b, __c) __arm_vfmsq_f16(__a, __b, __c)
+ #define vmlaldavaq_s16(__a, __b, __c) __arm_vmlaldavaq_s16(__a, __b, __c)
+ #define vmlaldavaxq_s16(__a, __b, __c) __arm_vmlaldavaxq_s16(__a, __b, __c)
+ #define vmlsldavaq_s16(__a, __b, __c) __arm_vmlsldavaq_s16(__a, __b, __c)
+ #define vmlsldavaxq_s16(__a, __b, __c) __arm_vmlsldavaxq_s16(__a, __b, __c)
+ #define vabsq_m_f16(__inactive, __a, __p) __arm_vabsq_m_f16(__inactive, __a, __p)
+ #define vcvtmq_m_s16_f16(__inactive, __a, __p) __arm_vcvtmq_m_s16_f16(__inactive, __a, __p)
+ #define vcvtnq_m_s16_f16(__inactive, __a, __p) __arm_vcvtnq_m_s16_f16(__inactive, __a, __p)
+ #define vcvtpq_m_s16_f16(__inactive, __a, __p) __arm_vcvtpq_m_s16_f16(__inactive, __a, __p)
+ #define vcvtq_m_s16_f16(__inactive, __a, __p) __arm_vcvtq_m_s16_f16(__inactive, __a, __p)
+ #define vdupq_m_n_f16(__inactive, __a, __p) __arm_vdupq_m_n_f16(__inactive, __a, __p)
+ #define vmaxnmaq_m_f16(__a, __b, __p) __arm_vmaxnmaq_m_f16(__a, __b, __p)
+ #define vmaxnmavq_p_f16(__a, __b, __p) __arm_vmaxnmavq_p_f16(__a, __b, __p)
+ #define vmaxnmvq_p_f16(__a, __b, __p) __arm_vmaxnmvq_p_f16(__a, __b, __p)
+ #define vminnmaq_m_f16(__a, __b, __p) __arm_vminnmaq_m_f16(__a, __b, __p)
+ #define vminnmavq_p_f16(__a, __b, __p) __arm_vminnmavq_p_f16(__a, __b, __p)
+ #define vminnmvq_p_f16(__a, __b, __p) __arm_vminnmvq_p_f16(__a, __b, __p)
+ #define vmlaldavq_p_s16(__a, __b, __p) __arm_vmlaldavq_p_s16(__a, __b, __p)
+ #define vmlaldavxq_p_s16(__a, __b, __p) __arm_vmlaldavxq_p_s16(__a, __b, __p)
+ #define vmlsldavq_p_s16(__a, __b, __p) __arm_vmlsldavq_p_s16(__a, __b, __p)
+ #define vmlsldavxq_p_s16(__a, __b, __p) __arm_vmlsldavxq_p_s16(__a, __b, __p)
+ #define vmovlbq_m_s8(__inactive, __a, __p) __arm_vmovlbq_m_s8(__inactive, __a, __p)
+ #define vmovltq_m_s8(__inactive, __a, __p) __arm_vmovltq_m_s8(__inactive, __a, __p)
+ #define vmovnbq_m_s16(__a, __b, __p) __arm_vmovnbq_m_s16(__a, __b, __p)
+ #define vmovntq_m_s16(__a, __b, __p) __arm_vmovntq_m_s16(__a, __b, __p)
+ #define vnegq_m_f16(__inactive, __a, __p) __arm_vnegq_m_f16(__inactive, __a, __p)
+ #define vpselq_f16(__a, __b, __p) __arm_vpselq_f16(__a, __b, __p)
+ #define vqmovnbq_m_s16(__a, __b, __p) __arm_vqmovnbq_m_s16(__a, __b, __p)
+ #define vqmovntq_m_s16(__a, __b, __p) __arm_vqmovntq_m_s16(__a, __b, __p)
+ #define vrev32q_m_s8(__inactive, __a, __p) __arm_vrev32q_m_s8(__inactive, __a, __p)
+ #define vrev64q_m_f16(__inactive, __a, __p) __arm_vrev64q_m_f16(__inactive, __a, __p)
+ #define vrndaq_m_f16(__inactive, __a, __p) __arm_vrndaq_m_f16(__inactive, __a, __p)
+ #define vrndmq_m_f16(__inactive, __a, __p) __arm_vrndmq_m_f16(__inactive, __a, __p)
+ #define vrndnq_m_f16(__inactive, __a, __p) __arm_vrndnq_m_f16(__inactive, __a, __p)
+ #define vrndpq_m_f16(__inactive, __a, __p) __arm_vrndpq_m_f16(__inactive, __a, __p)
+ #define vrndq_m_f16(__inactive, __a, __p) __arm_vrndq_m_f16(__inactive, __a, __p)
+ #define vrndxq_m_f16(__inactive, __a, __p) __arm_vrndxq_m_f16(__inactive, __a, __p)
+ #define vcmpeqq_m_n_f16(__a, __b, __p) __arm_vcmpeqq_m_n_f16(__a, __b, __p)
+ #define vcmpgeq_m_f16(__a, __b, __p) __arm_vcmpgeq_m_f16(__a, __b, __p)
+ #define vcmpgeq_m_n_f16(__a, __b, __p) __arm_vcmpgeq_m_n_f16(__a, __b, __p)
+ #define vcmpgtq_m_f16(__a, __b, __p) __arm_vcmpgtq_m_f16(__a, __b, __p)
+ #define vcmpgtq_m_n_f16(__a, __b, __p) __arm_vcmpgtq_m_n_f16(__a, __b, __p)
+ #define vcmpleq_m_f16(__a, __b, __p) __arm_vcmpleq_m_f16(__a, __b, __p)
+ #define vcmpleq_m_n_f16(__a, __b, __p) __arm_vcmpleq_m_n_f16(__a, __b, __p)
+ #define vcmpltq_m_f16(__a, __b, __p) __arm_vcmpltq_m_f16(__a, __b, __p)
+ #define vcmpltq_m_n_f16(__a, __b, __p) __arm_vcmpltq_m_n_f16(__a, __b, __p)
+ #define vcmpneq_m_f16(__a, __b, __p) __arm_vcmpneq_m_f16(__a, __b, __p)
+ #define vcmpneq_m_n_f16(__a, __b, __p) __arm_vcmpneq_m_n_f16(__a, __b, __p)
+ #define vmvnq_m_n_u16(__inactive,  __imm, __p) __arm_vmvnq_m_n_u16(__inactive,  __imm, __p)
+ #define vorrq_m_n_u16(__a,  __imm, __p) __arm_vorrq_m_n_u16(__a,  __imm, __p)
+ #define vqrshruntq_n_s16(__a, __b,  __imm) __arm_vqrshruntq_n_s16(__a, __b,  __imm)
+ #define vqshrunbq_n_s16(__a, __b,  __imm) __arm_vqshrunbq_n_s16(__a, __b,  __imm)
+ #define vqshruntq_n_s16(__a, __b,  __imm) __arm_vqshruntq_n_s16(__a, __b,  __imm)
+ #define vcvtmq_m_u16_f16(__inactive, __a, __p) __arm_vcvtmq_m_u16_f16(__inactive, __a, __p)
+ #define vcvtnq_m_u16_f16(__inactive, __a, __p) __arm_vcvtnq_m_u16_f16(__inactive, __a, __p)
+ #define vcvtpq_m_u16_f16(__inactive, __a, __p) __arm_vcvtpq_m_u16_f16(__inactive, __a, __p)
+ #define vcvtq_m_u16_f16(__inactive, __a, __p) __arm_vcvtq_m_u16_f16(__inactive, __a, __p)
+ #define vqmovunbq_m_s16(__a, __b, __p) __arm_vqmovunbq_m_s16(__a, __b, __p)
+ #define vqmovuntq_m_s16(__a, __b, __p) __arm_vqmovuntq_m_s16(__a, __b, __p)
+ #define vqrshrntq_n_u16(__a, __b,  __imm) __arm_vqrshrntq_n_u16(__a, __b,  __imm)
+ #define vqshrnbq_n_u16(__a, __b,  __imm) __arm_vqshrnbq_n_u16(__a, __b,  __imm)
+ #define vqshrntq_n_u16(__a, __b,  __imm) __arm_vqshrntq_n_u16(__a, __b,  __imm)
+ #define vrshrnbq_n_u16(__a, __b,  __imm) __arm_vrshrnbq_n_u16(__a, __b,  __imm)
+ #define vrshrntq_n_u16(__a, __b,  __imm) __arm_vrshrntq_n_u16(__a, __b,  __imm)
+ #define vshrnbq_n_u16(__a, __b,  __imm) __arm_vshrnbq_n_u16(__a, __b,  __imm)
+ #define vshrntq_n_u16(__a, __b,  __imm) __arm_vshrntq_n_u16(__a, __b,  __imm)
+ #define vmlaldavaq_u16(__a, __b, __c) __arm_vmlaldavaq_u16(__a, __b, __c)
+ #define vmlaldavq_p_u16(__a, __b, __p) __arm_vmlaldavq_p_u16(__a, __b, __p)
+ #define vmovlbq_m_u8(__inactive, __a, __p) __arm_vmovlbq_m_u8(__inactive, __a, __p)
+ #define vmovltq_m_u8(__inactive, __a, __p) __arm_vmovltq_m_u8(__inactive, __a, __p)
+ #define vmovnbq_m_u16(__a, __b, __p) __arm_vmovnbq_m_u16(__a, __b, __p)
+ #define vmovntq_m_u16(__a, __b, __p) __arm_vmovntq_m_u16(__a, __b, __p)
+ #define vqmovnbq_m_u16(__a, __b, __p) __arm_vqmovnbq_m_u16(__a, __b, __p)
+ #define vqmovntq_m_u16(__a, __b, __p) __arm_vqmovntq_m_u16(__a, __b, __p)
+ #define vrev32q_m_u8(__inactive, __a, __p) __arm_vrev32q_m_u8(__inactive, __a, __p)
+ #define vmvnq_m_n_s32(__inactive,  __imm, __p) __arm_vmvnq_m_n_s32(__inactive,  __imm, __p)
+ #define vorrq_m_n_s32(__a,  __imm, __p) __arm_vorrq_m_n_s32(__a,  __imm, __p)
+ #define vqrshrntq_n_s32(__a, __b,  __imm) __arm_vqrshrntq_n_s32(__a, __b,  __imm)
+ #define vqshrnbq_n_s32(__a, __b,  __imm) __arm_vqshrnbq_n_s32(__a, __b,  __imm)
+ #define vqshrntq_n_s32(__a, __b,  __imm) __arm_vqshrntq_n_s32(__a, __b,  __imm)
+ #define vrshrnbq_n_s32(__a, __b,  __imm) __arm_vrshrnbq_n_s32(__a, __b,  __imm)
+ #define vrshrntq_n_s32(__a, __b,  __imm) __arm_vrshrntq_n_s32(__a, __b,  __imm)
+ #define vshrnbq_n_s32(__a, __b,  __imm) __arm_vshrnbq_n_s32(__a, __b,  __imm)
+ #define vshrntq_n_s32(__a, __b,  __imm) __arm_vshrntq_n_s32(__a, __b,  __imm)
+ #define vcmlaq_f32(__a, __b, __c) __arm_vcmlaq_f32(__a, __b, __c)
+ #define vcmlaq_rot180_f32(__a, __b, __c) __arm_vcmlaq_rot180_f32(__a, __b, __c)
+ #define vcmlaq_rot270_f32(__a, __b, __c) __arm_vcmlaq_rot270_f32(__a, __b, __c)
+ #define vcmlaq_rot90_f32(__a, __b, __c) __arm_vcmlaq_rot90_f32(__a, __b, __c)
+ #define vfmaq_f32(__a, __b, __c) __arm_vfmaq_f32(__a, __b, __c)
+ #define vfmaq_n_f32(__a, __b, __c) __arm_vfmaq_n_f32(__a, __b, __c)
+ #define vfmasq_n_f32(__a, __b, __c) __arm_vfmasq_n_f32(__a, __b, __c)
+ #define vfmsq_f32(__a, __b, __c) __arm_vfmsq_f32(__a, __b, __c)
+ #define vmlaldavaq_s32(__a, __b, __c) __arm_vmlaldavaq_s32(__a, __b, __c)
+ #define vmlaldavaxq_s32(__a, __b, __c) __arm_vmlaldavaxq_s32(__a, __b, __c)
+ #define vmlsldavaq_s32(__a, __b, __c) __arm_vmlsldavaq_s32(__a, __b, __c)
+ #define vmlsldavaxq_s32(__a, __b, __c) __arm_vmlsldavaxq_s32(__a, __b, __c)
+ #define vabsq_m_f32(__inactive, __a, __p) __arm_vabsq_m_f32(__inactive, __a, __p)
+ #define vcvtmq_m_s32_f32(__inactive, __a, __p) __arm_vcvtmq_m_s32_f32(__inactive, __a, __p)
+ #define vcvtnq_m_s32_f32(__inactive, __a, __p) __arm_vcvtnq_m_s32_f32(__inactive, __a, __p)
+ #define vcvtpq_m_s32_f32(__inactive, __a, __p) __arm_vcvtpq_m_s32_f32(__inactive, __a, __p)
+ #define vcvtq_m_s32_f32(__inactive, __a, __p) __arm_vcvtq_m_s32_f32(__inactive, __a, __p)
+ #define vdupq_m_n_f32(__inactive, __a, __p) __arm_vdupq_m_n_f32(__inactive, __a, __p)
+ #define vmaxnmaq_m_f32(__a, __b, __p) __arm_vmaxnmaq_m_f32(__a, __b, __p)
+ #define vmaxnmavq_p_f32(__a, __b, __p) __arm_vmaxnmavq_p_f32(__a, __b, __p)
+ #define vmaxnmvq_p_f32(__a, __b, __p) __arm_vmaxnmvq_p_f32(__a, __b, __p)
+ #define vminnmaq_m_f32(__a, __b, __p) __arm_vminnmaq_m_f32(__a, __b, __p)
+ #define vminnmavq_p_f32(__a, __b, __p) __arm_vminnmavq_p_f32(__a, __b, __p)
+ #define vminnmvq_p_f32(__a, __b, __p) __arm_vminnmvq_p_f32(__a, __b, __p)
+ #define vmlaldavq_p_s32(__a, __b, __p) __arm_vmlaldavq_p_s32(__a, __b, __p)
+ #define vmlaldavxq_p_s32(__a, __b, __p) __arm_vmlaldavxq_p_s32(__a, __b, __p)
+ #define vmlsldavq_p_s32(__a, __b, __p) __arm_vmlsldavq_p_s32(__a, __b, __p)
+ #define vmlsldavxq_p_s32(__a, __b, __p) __arm_vmlsldavxq_p_s32(__a, __b, __p)
+ #define vmovlbq_m_s16(__inactive, __a, __p) __arm_vmovlbq_m_s16(__inactive, __a, __p)
+ #define vmovltq_m_s16(__inactive, __a, __p) __arm_vmovltq_m_s16(__inactive, __a, __p)
+ #define vmovnbq_m_s32(__a, __b, __p) __arm_vmovnbq_m_s32(__a, __b, __p)
+ #define vmovntq_m_s32(__a, __b, __p) __arm_vmovntq_m_s32(__a, __b, __p)
+ #define vnegq_m_f32(__inactive, __a, __p) __arm_vnegq_m_f32(__inactive, __a, __p)
+ #define vpselq_f32(__a, __b, __p) __arm_vpselq_f32(__a, __b, __p)
+ #define vqmovnbq_m_s32(__a, __b, __p) __arm_vqmovnbq_m_s32(__a, __b, __p)
+ #define vqmovntq_m_s32(__a, __b, __p) __arm_vqmovntq_m_s32(__a, __b, __p)
+ #define vrev32q_m_s16(__inactive, __a, __p) __arm_vrev32q_m_s16(__inactive, __a, __p)
+ #define vrev64q_m_f32(__inactive, __a, __p) __arm_vrev64q_m_f32(__inactive, __a, __p)
+ #define vrndaq_m_f32(__inactive, __a, __p) __arm_vrndaq_m_f32(__inactive, __a, __p)
+ #define vrndmq_m_f32(__inactive, __a, __p) __arm_vrndmq_m_f32(__inactive, __a, __p)
+ #define vrndnq_m_f32(__inactive, __a, __p) __arm_vrndnq_m_f32(__inactive, __a, __p)
+ #define vrndpq_m_f32(__inactive, __a, __p) __arm_vrndpq_m_f32(__inactive, __a, __p)
+ #define vrndq_m_f32(__inactive, __a, __p) __arm_vrndq_m_f32(__inactive, __a, __p)
+ #define vrndxq_m_f32(__inactive, __a, __p) __arm_vrndxq_m_f32(__inactive, __a, __p)
+ #define vcmpeqq_m_n_f32(__a, __b, __p) __arm_vcmpeqq_m_n_f32(__a, __b, __p)
+ #define vcmpgeq_m_f32(__a, __b, __p) __arm_vcmpgeq_m_f32(__a, __b, __p)
+ #define vcmpgeq_m_n_f32(__a, __b, __p) __arm_vcmpgeq_m_n_f32(__a, __b, __p)
+ #define vcmpgtq_m_f32(__a, __b, __p) __arm_vcmpgtq_m_f32(__a, __b, __p)
+ #define vcmpgtq_m_n_f32(__a, __b, __p) __arm_vcmpgtq_m_n_f32(__a, __b, __p)
+ #define vcmpleq_m_f32(__a, __b, __p) __arm_vcmpleq_m_f32(__a, __b, __p)
+ #define vcmpleq_m_n_f32(__a, __b, __p) __arm_vcmpleq_m_n_f32(__a, __b, __p)
+ #define vcmpltq_m_f32(__a, __b, __p) __arm_vcmpltq_m_f32(__a, __b, __p)
+ #define vcmpltq_m_n_f32(__a, __b, __p) __arm_vcmpltq_m_n_f32(__a, __b, __p)
+ #define vcmpneq_m_f32(__a, __b, __p) __arm_vcmpneq_m_f32(__a, __b, __p)
+ #define vcmpneq_m_n_f32(__a, __b, __p) __arm_vcmpneq_m_n_f32(__a, __b, __p)
+ #define vmvnq_m_n_u32(__inactive,  __imm, __p) __arm_vmvnq_m_n_u32(__inactive,  __imm, __p)
+ #define vorrq_m_n_u32(__a,  __imm, __p) __arm_vorrq_m_n_u32(__a,  __imm, __p)
+ #define vqrshruntq_n_s32(__a, __b,  __imm) __arm_vqrshruntq_n_s32(__a, __b,  __imm)
+ #define vqshrunbq_n_s32(__a, __b,  __imm) __arm_vqshrunbq_n_s32(__a, __b,  __imm)
+ #define vqshruntq_n_s32(__a, __b,  __imm) __arm_vqshruntq_n_s32(__a, __b,  __imm)
+ #define vcvtmq_m_u32_f32(__inactive, __a, __p) __arm_vcvtmq_m_u32_f32(__inactive, __a, __p)
+ #define vcvtnq_m_u32_f32(__inactive, __a, __p) __arm_vcvtnq_m_u32_f32(__inactive, __a, __p)
+ #define vcvtpq_m_u32_f32(__inactive, __a, __p) __arm_vcvtpq_m_u32_f32(__inactive, __a, __p)
+ #define vcvtq_m_u32_f32(__inactive, __a, __p) __arm_vcvtq_m_u32_f32(__inactive, __a, __p)
+ #define vqmovunbq_m_s32(__a, __b, __p) __arm_vqmovunbq_m_s32(__a, __b, __p)
+ #define vqmovuntq_m_s32(__a, __b, __p) __arm_vqmovuntq_m_s32(__a, __b, __p)
+ #define vqrshrntq_n_u32(__a, __b,  __imm) __arm_vqrshrntq_n_u32(__a, __b,  __imm)
+ #define vqshrnbq_n_u32(__a, __b,  __imm) __arm_vqshrnbq_n_u32(__a, __b,  __imm)
+ #define vqshrntq_n_u32(__a, __b,  __imm) __arm_vqshrntq_n_u32(__a, __b,  __imm)
+ #define vrshrnbq_n_u32(__a, __b,  __imm) __arm_vrshrnbq_n_u32(__a, __b,  __imm)
+ #define vrshrntq_n_u32(__a, __b,  __imm) __arm_vrshrntq_n_u32(__a, __b,  __imm)
+ #define vshrnbq_n_u32(__a, __b,  __imm) __arm_vshrnbq_n_u32(__a, __b,  __imm)
+ #define vshrntq_n_u32(__a, __b,  __imm) __arm_vshrntq_n_u32(__a, __b,  __imm)
+ #define vmlaldavaq_u32(__a, __b, __c) __arm_vmlaldavaq_u32(__a, __b, __c)
+ #define vmlaldavq_p_u32(__a, __b, __p) __arm_vmlaldavq_p_u32(__a, __b, __p)
+ #define vmovlbq_m_u16(__inactive, __a, __p) __arm_vmovlbq_m_u16(__inactive, __a, __p)
+ #define vmovltq_m_u16(__inactive, __a, __p) __arm_vmovltq_m_u16(__inactive, __a, __p)
+ #define vmovnbq_m_u32(__a, __b, __p) __arm_vmovnbq_m_u32(__a, __b, __p)
+ #define vmovntq_m_u32(__a, __b, __p) __arm_vmovntq_m_u32(__a, __b, __p)
+ #define vqmovnbq_m_u32(__a, __b, __p) __arm_vqmovnbq_m_u32(__a, __b, __p)
+ #define vqmovntq_m_u32(__a, __b, __p) __arm_vqmovntq_m_u32(__a, __b, __p)
+ #define vrev32q_m_u16(__inactive, __a, __p) __arm_vrev32q_m_u16(__inactive, __a, __p)
+ #define vsriq_m_n_s8(__a, __b,  __imm, __p) __arm_vsriq_m_n_s8(__a, __b,  __imm, __p)
+ #define vsubq_m_s8(__inactive, __a, __b, __p) __arm_vsubq_m_s8(__inactive, __a, __b, __p)
+ #define vcvtq_m_n_f16_u16(__inactive, __a,  __imm6, __p) __arm_vcvtq_m_n_f16_u16(__inactive, __a,  __imm6, __p)
+ #define vqshluq_m_n_s8(__inactive, __a,  __imm, __p) __arm_vqshluq_m_n_s8(__inactive, __a,  __imm, __p)
+ #define vabavq_p_s8(__a, __b, __c, __p) __arm_vabavq_p_s8(__a, __b, __c, __p)
+ #define vsriq_m_n_u8(__a, __b,  __imm, __p) __arm_vsriq_m_n_u8(__a, __b,  __imm, __p)
+ #define vshlq_m_u8(__inactive, __a, __b, __p) __arm_vshlq_m_u8(__inactive, __a, __b, __p)
+ #define vsubq_m_u8(__inactive, __a, __b, __p) __arm_vsubq_m_u8(__inactive, __a, __b, __p)
+ #define vabavq_p_u8(__a, __b, __c, __p) __arm_vabavq_p_u8(__a, __b, __c, __p)
+ #define vshlq_m_s8(__inactive, __a, __b, __p) __arm_vshlq_m_s8(__inactive, __a, __b, __p)
+ #define vcvtq_m_n_f16_s16(__inactive, __a,  __imm6, __p) __arm_vcvtq_m_n_f16_s16(__inactive, __a,  __imm6, __p)
+ #define vsriq_m_n_s16(__a, __b,  __imm, __p) __arm_vsriq_m_n_s16(__a, __b,  __imm, __p)
+ #define vsubq_m_s16(__inactive, __a, __b, __p) __arm_vsubq_m_s16(__inactive, __a, __b, __p)
+ #define vcvtq_m_n_f32_u32(__inactive, __a,  __imm6, __p) __arm_vcvtq_m_n_f32_u32(__inactive, __a,  __imm6, __p)
+ #define vqshluq_m_n_s16(__inactive, __a,  __imm, __p) __arm_vqshluq_m_n_s16(__inactive, __a,  __imm, __p)
+ #define vabavq_p_s16(__a, __b, __c, __p) __arm_vabavq_p_s16(__a, __b, __c, __p)
+ #define vsriq_m_n_u16(__a, __b,  __imm, __p) __arm_vsriq_m_n_u16(__a, __b,  __imm, __p)
+ #define vshlq_m_u16(__inactive, __a, __b, __p) __arm_vshlq_m_u16(__inactive, __a, __b, __p)
+ #define vsubq_m_u16(__inactive, __a, __b, __p) __arm_vsubq_m_u16(__inactive, __a, __b, __p)
+ #define vabavq_p_u16(__a, __b, __c, __p) __arm_vabavq_p_u16(__a, __b, __c, __p)
+ #define vshlq_m_s16(__inactive, __a, __b, __p) __arm_vshlq_m_s16(__inactive, __a, __b, __p)
+ #define vcvtq_m_n_f32_s32(__inactive, __a,  __imm6, __p) __arm_vcvtq_m_n_f32_s32(__inactive, __a,  __imm6, __p)
+ #define vsriq_m_n_s32(__a, __b,  __imm, __p) __arm_vsriq_m_n_s32(__a, __b,  __imm, __p)
+ #define vsubq_m_s32(__inactive, __a, __b, __p) __arm_vsubq_m_s32(__inactive, __a, __b, __p)
+ #define vqshluq_m_n_s32(__inactive, __a,  __imm, __p) __arm_vqshluq_m_n_s32(__inactive, __a,  __imm, __p)
+ #define vabavq_p_s32(__a, __b, __c, __p) __arm_vabavq_p_s32(__a, __b, __c, __p)
+ #define vsriq_m_n_u32(__a, __b,  __imm, __p) __arm_vsriq_m_n_u32(__a, __b,  __imm, __p)
+ #define vshlq_m_u32(__inactive, __a, __b, __p) __arm_vshlq_m_u32(__inactive, __a, __b, __p)
+ #define vsubq_m_u32(__inactive, __a, __b, __p) __arm_vsubq_m_u32(__inactive, __a, __b, __p)
+ #define vabavq_p_u32(__a, __b, __c, __p) __arm_vabavq_p_u32(__a, __b, __c, __p)
+ #define vshlq_m_s32(__inactive, __a, __b, __p) __arm_vshlq_m_s32(__inactive, __a, __b, __p)
+ #define vabdq_m_s8(__inactive, __a, __b, __p) __arm_vabdq_m_s8(__inactive, __a, __b, __p)
+ #define vabdq_m_s32(__inactive, __a, __b, __p) __arm_vabdq_m_s32(__inactive, __a, __b, __p)
+ #define vabdq_m_s16(__inactive, __a, __b, __p) __arm_vabdq_m_s16(__inactive, __a, __b, __p)
+ #define vabdq_m_u8(__inactive, __a, __b, __p) __arm_vabdq_m_u8(__inactive, __a, __b, __p)
+ #define vabdq_m_u32(__inactive, __a, __b, __p) __arm_vabdq_m_u32(__inactive, __a, __b, __p)
+ #define vabdq_m_u16(__inactive, __a, __b, __p) __arm_vabdq_m_u16(__inactive, __a, __b, __p)
+ #define vaddq_m_n_s8(__inactive, __a, __b, __p) __arm_vaddq_m_n_s8(__inactive, __a, __b, __p)
+ #define vaddq_m_n_s32(__inactive, __a, __b, __p) __arm_vaddq_m_n_s32(__inactive, __a, __b, __p)
+ #define vaddq_m_n_s16(__inactive, __a, __b, __p) __arm_vaddq_m_n_s16(__inactive, __a, __b, __p)
+ #define vaddq_m_n_u8(__inactive, __a, __b, __p) __arm_vaddq_m_n_u8(__inactive, __a, __b, __p)
+ #define vaddq_m_n_u32(__inactive, __a, __b, __p) __arm_vaddq_m_n_u32(__inactive, __a, __b, __p)
+ #define vaddq_m_n_u16(__inactive, __a, __b, __p) __arm_vaddq_m_n_u16(__inactive, __a, __b, __p)
+ #define vaddq_m_s8(__inactive, __a, __b, __p) __arm_vaddq_m_s8(__inactive, __a, __b, __p)
+ #define vaddq_m_s32(__inactive, __a, __b, __p) __arm_vaddq_m_s32(__inactive, __a, __b, __p)
+ #define vaddq_m_s16(__inactive, __a, __b, __p) __arm_vaddq_m_s16(__inactive, __a, __b, __p)
+ #define vaddq_m_u8(__inactive, __a, __b, __p) __arm_vaddq_m_u8(__inactive, __a, __b, __p)
+ #define vaddq_m_u32(__inactive, __a, __b, __p) __arm_vaddq_m_u32(__inactive, __a, __b, __p)
+ #define vaddq_m_u16(__inactive, __a, __b, __p) __arm_vaddq_m_u16(__inactive, __a, __b, __p)
+ #define vandq_m_s8(__inactive, __a, __b, __p) __arm_vandq_m_s8(__inactive, __a, __b, __p)
+ #define vandq_m_s32(__inactive, __a, __b, __p) __arm_vandq_m_s32(__inactive, __a, __b, __p)
+ #define vandq_m_s16(__inactive, __a, __b, __p) __arm_vandq_m_s16(__inactive, __a, __b, __p)
+ #define vandq_m_u8(__inactive, __a, __b, __p) __arm_vandq_m_u8(__inactive, __a, __b, __p)
+ #define vandq_m_u32(__inactive, __a, __b, __p) __arm_vandq_m_u32(__inactive, __a, __b, __p)
+ #define vandq_m_u16(__inactive, __a, __b, __p) __arm_vandq_m_u16(__inactive, __a, __b, __p)
+ #define vbicq_m_s8(__inactive, __a, __b, __p) __arm_vbicq_m_s8(__inactive, __a, __b, __p)
+ #define vbicq_m_s32(__inactive, __a, __b, __p) __arm_vbicq_m_s32(__inactive, __a, __b, __p)
+ #define vbicq_m_s16(__inactive, __a, __b, __p) __arm_vbicq_m_s16(__inactive, __a, __b, __p)
+ #define vbicq_m_u8(__inactive, __a, __b, __p) __arm_vbicq_m_u8(__inactive, __a, __b, __p)
+ #define vbicq_m_u32(__inactive, __a, __b, __p) __arm_vbicq_m_u32(__inactive, __a, __b, __p)
+ #define vbicq_m_u16(__inactive, __a, __b, __p) __arm_vbicq_m_u16(__inactive, __a, __b, __p)
+ #define vbrsrq_m_n_s8(__inactive, __a, __b, __p) __arm_vbrsrq_m_n_s8(__inactive, __a, __b, __p)
+ #define vbrsrq_m_n_s32(__inactive, __a, __b, __p) __arm_vbrsrq_m_n_s32(__inactive, __a, __b, __p)
+ #define vbrsrq_m_n_s16(__inactive, __a, __b, __p) __arm_vbrsrq_m_n_s16(__inactive, __a, __b, __p)
+ #define vbrsrq_m_n_u8(__inactive, __a, __b, __p) __arm_vbrsrq_m_n_u8(__inactive, __a, __b, __p)
+ #define vbrsrq_m_n_u32(__inactive, __a, __b, __p) __arm_vbrsrq_m_n_u32(__inactive, __a, __b, __p)
+ #define vbrsrq_m_n_u16(__inactive, __a, __b, __p) __arm_vbrsrq_m_n_u16(__inactive, __a, __b, __p)
+ #define vcaddq_rot270_m_s8(__inactive, __a, __b, __p) __arm_vcaddq_rot270_m_s8(__inactive, __a, __b, __p)
+ #define vcaddq_rot270_m_s32(__inactive, __a, __b, __p) __arm_vcaddq_rot270_m_s32(__inactive, __a, __b, __p)
+ #define vcaddq_rot270_m_s16(__inactive, __a, __b, __p) __arm_vcaddq_rot270_m_s16(__inactive, __a, __b, __p)
+ #define vcaddq_rot270_m_u8(__inactive, __a, __b, __p) __arm_vcaddq_rot270_m_u8(__inactive, __a, __b, __p)
+ #define vcaddq_rot270_m_u32(__inactive, __a, __b, __p) __arm_vcaddq_rot270_m_u32(__inactive, __a, __b, __p)
+ #define vcaddq_rot270_m_u16(__inactive, __a, __b, __p) __arm_vcaddq_rot270_m_u16(__inactive, __a, __b, __p)
+ #define vcaddq_rot90_m_s8(__inactive, __a, __b, __p) __arm_vcaddq_rot90_m_s8(__inactive, __a, __b, __p)
+ #define vcaddq_rot90_m_s32(__inactive, __a, __b, __p) __arm_vcaddq_rot90_m_s32(__inactive, __a, __b, __p)
+ #define vcaddq_rot90_m_s16(__inactive, __a, __b, __p) __arm_vcaddq_rot90_m_s16(__inactive, __a, __b, __p)
+ #define vcaddq_rot90_m_u8(__inactive, __a, __b, __p) __arm_vcaddq_rot90_m_u8(__inactive, __a, __b, __p)
+ #define vcaddq_rot90_m_u32(__inactive, __a, __b, __p) __arm_vcaddq_rot90_m_u32(__inactive, __a, __b, __p)
+ #define vcaddq_rot90_m_u16(__inactive, __a, __b, __p) __arm_vcaddq_rot90_m_u16(__inactive, __a, __b, __p)
+ #define veorq_m_s8(__inactive, __a, __b, __p) __arm_veorq_m_s8(__inactive, __a, __b, __p)
+ #define veorq_m_s32(__inactive, __a, __b, __p) __arm_veorq_m_s32(__inactive, __a, __b, __p)
+ #define veorq_m_s16(__inactive, __a, __b, __p) __arm_veorq_m_s16(__inactive, __a, __b, __p)
+ #define veorq_m_u8(__inactive, __a, __b, __p) __arm_veorq_m_u8(__inactive, __a, __b, __p)
+ #define veorq_m_u32(__inactive, __a, __b, __p) __arm_veorq_m_u32(__inactive, __a, __b, __p)
+ #define veorq_m_u16(__inactive, __a, __b, __p) __arm_veorq_m_u16(__inactive, __a, __b, __p)
+ #define vhaddq_m_n_s8(__inactive, __a, __b, __p) __arm_vhaddq_m_n_s8(__inactive, __a, __b, __p)
+ #define vhaddq_m_n_s32(__inactive, __a, __b, __p) __arm_vhaddq_m_n_s32(__inactive, __a, __b, __p)
+ #define vhaddq_m_n_s16(__inactive, __a, __b, __p) __arm_vhaddq_m_n_s16(__inactive, __a, __b, __p)
+ #define vhaddq_m_n_u8(__inactive, __a, __b, __p) __arm_vhaddq_m_n_u8(__inactive, __a, __b, __p)
+ #define vhaddq_m_n_u32(__inactive, __a, __b, __p) __arm_vhaddq_m_n_u32(__inactive, __a, __b, __p)
+ #define vhaddq_m_n_u16(__inactive, __a, __b, __p) __arm_vhaddq_m_n_u16(__inactive, __a, __b, __p)
+ #define vhaddq_m_s8(__inactive, __a, __b, __p) __arm_vhaddq_m_s8(__inactive, __a, __b, __p)
+ #define vhaddq_m_s32(__inactive, __a, __b, __p) __arm_vhaddq_m_s32(__inactive, __a, __b, __p)
+ #define vhaddq_m_s16(__inactive, __a, __b, __p) __arm_vhaddq_m_s16(__inactive, __a, __b, __p)
+ #define vhaddq_m_u8(__inactive, __a, __b, __p) __arm_vhaddq_m_u8(__inactive, __a, __b, __p)
+ #define vhaddq_m_u32(__inactive, __a, __b, __p) __arm_vhaddq_m_u32(__inactive, __a, __b, __p)
+ #define vhaddq_m_u16(__inactive, __a, __b, __p) __arm_vhaddq_m_u16(__inactive, __a, __b, __p)
+ #define vhcaddq_rot270_m_s8(__inactive, __a, __b, __p) __arm_vhcaddq_rot270_m_s8(__inactive, __a, __b, __p)
+ #define vhcaddq_rot270_m_s32(__inactive, __a, __b, __p) __arm_vhcaddq_rot270_m_s32(__inactive, __a, __b, __p)
+ #define vhcaddq_rot270_m_s16(__inactive, __a, __b, __p) __arm_vhcaddq_rot270_m_s16(__inactive, __a, __b, __p)
+ #define vhcaddq_rot90_m_s8(__inactive, __a, __b, __p) __arm_vhcaddq_rot90_m_s8(__inactive, __a, __b, __p)
+ #define vhcaddq_rot90_m_s32(__inactive, __a, __b, __p) __arm_vhcaddq_rot90_m_s32(__inactive, __a, __b, __p)
+ #define vhcaddq_rot90_m_s16(__inactive, __a, __b, __p) __arm_vhcaddq_rot90_m_s16(__inactive, __a, __b, __p)
+ #define vhsubq_m_n_s8(__inactive, __a, __b, __p) __arm_vhsubq_m_n_s8(__inactive, __a, __b, __p)
+ #define vhsubq_m_n_s32(__inactive, __a, __b, __p) __arm_vhsubq_m_n_s32(__inactive, __a, __b, __p)
+ #define vhsubq_m_n_s16(__inactive, __a, __b, __p) __arm_vhsubq_m_n_s16(__inactive, __a, __b, __p)
+ #define vhsubq_m_n_u8(__inactive, __a, __b, __p) __arm_vhsubq_m_n_u8(__inactive, __a, __b, __p)
+ #define vhsubq_m_n_u32(__inactive, __a, __b, __p) __arm_vhsubq_m_n_u32(__inactive, __a, __b, __p)
+ #define vhsubq_m_n_u16(__inactive, __a, __b, __p) __arm_vhsubq_m_n_u16(__inactive, __a, __b, __p)
+ #define vhsubq_m_s8(__inactive, __a, __b, __p) __arm_vhsubq_m_s8(__inactive, __a, __b, __p)
+ #define vhsubq_m_s32(__inactive, __a, __b, __p) __arm_vhsubq_m_s32(__inactive, __a, __b, __p)
+ #define vhsubq_m_s16(__inactive, __a, __b, __p) __arm_vhsubq_m_s16(__inactive, __a, __b, __p)
+ #define vhsubq_m_u8(__inactive, __a, __b, __p) __arm_vhsubq_m_u8(__inactive, __a, __b, __p)
+ #define vhsubq_m_u32(__inactive, __a, __b, __p) __arm_vhsubq_m_u32(__inactive, __a, __b, __p)
+ #define vhsubq_m_u16(__inactive, __a, __b, __p) __arm_vhsubq_m_u16(__inactive, __a, __b, __p)
+ #define vmaxq_m_s8(__inactive, __a, __b, __p) __arm_vmaxq_m_s8(__inactive, __a, __b, __p)
+ #define vmaxq_m_s32(__inactive, __a, __b, __p) __arm_vmaxq_m_s32(__inactive, __a, __b, __p)
+ #define vmaxq_m_s16(__inactive, __a, __b, __p) __arm_vmaxq_m_s16(__inactive, __a, __b, __p)
+ #define vmaxq_m_u8(__inactive, __a, __b, __p) __arm_vmaxq_m_u8(__inactive, __a, __b, __p)
+ #define vmaxq_m_u32(__inactive, __a, __b, __p) __arm_vmaxq_m_u32(__inactive, __a, __b, __p)
+ #define vmaxq_m_u16(__inactive, __a, __b, __p) __arm_vmaxq_m_u16(__inactive, __a, __b, __p)
+ #define vminq_m_s8(__inactive, __a, __b, __p) __arm_vminq_m_s8(__inactive, __a, __b, __p)
+ #define vminq_m_s32(__inactive, __a, __b, __p) __arm_vminq_m_s32(__inactive, __a, __b, __p)
+ #define vminq_m_s16(__inactive, __a, __b, __p) __arm_vminq_m_s16(__inactive, __a, __b, __p)
+ #define vminq_m_u8(__inactive, __a, __b, __p) __arm_vminq_m_u8(__inactive, __a, __b, __p)
+ #define vminq_m_u32(__inactive, __a, __b, __p) __arm_vminq_m_u32(__inactive, __a, __b, __p)
+ #define vminq_m_u16(__inactive, __a, __b, __p) __arm_vminq_m_u16(__inactive, __a, __b, __p)
+ #define vmladavaq_p_s8(__a, __b, __c, __p) __arm_vmladavaq_p_s8(__a, __b, __c, __p)
+ #define vmladavaq_p_s32(__a, __b, __c, __p) __arm_vmladavaq_p_s32(__a, __b, __c, __p)
+ #define vmladavaq_p_s16(__a, __b, __c, __p) __arm_vmladavaq_p_s16(__a, __b, __c, __p)
+ #define vmladavaq_p_u8(__a, __b, __c, __p) __arm_vmladavaq_p_u8(__a, __b, __c, __p)
+ #define vmladavaq_p_u32(__a, __b, __c, __p) __arm_vmladavaq_p_u32(__a, __b, __c, __p)
+ #define vmladavaq_p_u16(__a, __b, __c, __p) __arm_vmladavaq_p_u16(__a, __b, __c, __p)
+ #define vmladavaxq_p_s8(__a, __b, __c, __p) __arm_vmladavaxq_p_s8(__a, __b, __c, __p)
+ #define vmladavaxq_p_s32(__a, __b, __c, __p) __arm_vmladavaxq_p_s32(__a, __b, __c, __p)
+ #define vmladavaxq_p_s16(__a, __b, __c, __p) __arm_vmladavaxq_p_s16(__a, __b, __c, __p)
+ #define vmlaq_m_n_s8(__a, __b, __c, __p) __arm_vmlaq_m_n_s8(__a, __b, __c, __p)
+ #define vmlaq_m_n_s32(__a, __b, __c, __p) __arm_vmlaq_m_n_s32(__a, __b, __c, __p)
+ #define vmlaq_m_n_s16(__a, __b, __c, __p) __arm_vmlaq_m_n_s16(__a, __b, __c, __p)
+ #define vmlaq_m_n_u8(__a, __b, __c, __p) __arm_vmlaq_m_n_u8(__a, __b, __c, __p)
+ #define vmlaq_m_n_u32(__a, __b, __c, __p) __arm_vmlaq_m_n_u32(__a, __b, __c, __p)
+ #define vmlaq_m_n_u16(__a, __b, __c, __p) __arm_vmlaq_m_n_u16(__a, __b, __c, __p)
+ #define vmlasq_m_n_s8(__a, __b, __c, __p) __arm_vmlasq_m_n_s8(__a, __b, __c, __p)
+ #define vmlasq_m_n_s32(__a, __b, __c, __p) __arm_vmlasq_m_n_s32(__a, __b, __c, __p)
+ #define vmlasq_m_n_s16(__a, __b, __c, __p) __arm_vmlasq_m_n_s16(__a, __b, __c, __p)
+ #define vmlasq_m_n_u8(__a, __b, __c, __p) __arm_vmlasq_m_n_u8(__a, __b, __c, __p)
+ #define vmlasq_m_n_u32(__a, __b, __c, __p) __arm_vmlasq_m_n_u32(__a, __b, __c, __p)
+ #define vmlasq_m_n_u16(__a, __b, __c, __p) __arm_vmlasq_m_n_u16(__a, __b, __c, __p)
+ #define vmlsdavaq_p_s8(__a, __b, __c, __p) __arm_vmlsdavaq_p_s8(__a, __b, __c, __p)
+ #define vmlsdavaq_p_s32(__a, __b, __c, __p) __arm_vmlsdavaq_p_s32(__a, __b, __c, __p)
+ #define vmlsdavaq_p_s16(__a, __b, __c, __p) __arm_vmlsdavaq_p_s16(__a, __b, __c, __p)
+ #define vmlsdavaxq_p_s8(__a, __b, __c, __p) __arm_vmlsdavaxq_p_s8(__a, __b, __c, __p)
+ #define vmlsdavaxq_p_s32(__a, __b, __c, __p) __arm_vmlsdavaxq_p_s32(__a, __b, __c, __p)
+ #define vmlsdavaxq_p_s16(__a, __b, __c, __p) __arm_vmlsdavaxq_p_s16(__a, __b, __c, __p)
+ #define vmulhq_m_s8(__inactive, __a, __b, __p) __arm_vmulhq_m_s8(__inactive, __a, __b, __p)
+ #define vmulhq_m_s32(__inactive, __a, __b, __p) __arm_vmulhq_m_s32(__inactive, __a, __b, __p)
+ #define vmulhq_m_s16(__inactive, __a, __b, __p) __arm_vmulhq_m_s16(__inactive, __a, __b, __p)
+ #define vmulhq_m_u8(__inactive, __a, __b, __p) __arm_vmulhq_m_u8(__inactive, __a, __b, __p)
+ #define vmulhq_m_u32(__inactive, __a, __b, __p) __arm_vmulhq_m_u32(__inactive, __a, __b, __p)
+ #define vmulhq_m_u16(__inactive, __a, __b, __p) __arm_vmulhq_m_u16(__inactive, __a, __b, __p)
+ #define vmullbq_int_m_s8(__inactive, __a, __b, __p) __arm_vmullbq_int_m_s8(__inactive, __a, __b, __p)
+ #define vmullbq_int_m_s32(__inactive, __a, __b, __p) __arm_vmullbq_int_m_s32(__inactive, __a, __b, __p)
+ #define vmullbq_int_m_s16(__inactive, __a, __b, __p) __arm_vmullbq_int_m_s16(__inactive, __a, __b, __p)
+ #define vmullbq_int_m_u8(__inactive, __a, __b, __p) __arm_vmullbq_int_m_u8(__inactive, __a, __b, __p)
+ #define vmullbq_int_m_u32(__inactive, __a, __b, __p) __arm_vmullbq_int_m_u32(__inactive, __a, __b, __p)
+ #define vmullbq_int_m_u16(__inactive, __a, __b, __p) __arm_vmullbq_int_m_u16(__inactive, __a, __b, __p)
+ #define vmulltq_int_m_s8(__inactive, __a, __b, __p) __arm_vmulltq_int_m_s8(__inactive, __a, __b, __p)
+ #define vmulltq_int_m_s32(__inactive, __a, __b, __p) __arm_vmulltq_int_m_s32(__inactive, __a, __b, __p)
+ #define vmulltq_int_m_s16(__inactive, __a, __b, __p) __arm_vmulltq_int_m_s16(__inactive, __a, __b, __p)
+ #define vmulltq_int_m_u8(__inactive, __a, __b, __p) __arm_vmulltq_int_m_u8(__inactive, __a, __b, __p)
+ #define vmulltq_int_m_u32(__inactive, __a, __b, __p) __arm_vmulltq_int_m_u32(__inactive, __a, __b, __p)
+ #define vmulltq_int_m_u16(__inactive, __a, __b, __p) __arm_vmulltq_int_m_u16(__inactive, __a, __b, __p)
+ #define vmulq_m_n_s8(__inactive, __a, __b, __p) __arm_vmulq_m_n_s8(__inactive, __a, __b, __p)
+ #define vmulq_m_n_s32(__inactive, __a, __b, __p) __arm_vmulq_m_n_s32(__inactive, __a, __b, __p)
+ #define vmulq_m_n_s16(__inactive, __a, __b, __p) __arm_vmulq_m_n_s16(__inactive, __a, __b, __p)
+ #define vmulq_m_n_u8(__inactive, __a, __b, __p) __arm_vmulq_m_n_u8(__inactive, __a, __b, __p)
+ #define vmulq_m_n_u32(__inactive, __a, __b, __p) __arm_vmulq_m_n_u32(__inactive, __a, __b, __p)
+ #define vmulq_m_n_u16(__inactive, __a, __b, __p) __arm_vmulq_m_n_u16(__inactive, __a, __b, __p)
+ #define vmulq_m_s8(__inactive, __a, __b, __p) __arm_vmulq_m_s8(__inactive, __a, __b, __p)
+ #define vmulq_m_s32(__inactive, __a, __b, __p) __arm_vmulq_m_s32(__inactive, __a, __b, __p)
+ #define vmulq_m_s16(__inactive, __a, __b, __p) __arm_vmulq_m_s16(__inactive, __a, __b, __p)
+ #define vmulq_m_u8(__inactive, __a, __b, __p) __arm_vmulq_m_u8(__inactive, __a, __b, __p)
+ #define vmulq_m_u32(__inactive, __a, __b, __p) __arm_vmulq_m_u32(__inactive, __a, __b, __p)
+ #define vmulq_m_u16(__inactive, __a, __b, __p) __arm_vmulq_m_u16(__inactive, __a, __b, __p)
+ #define vornq_m_s8(__inactive, __a, __b, __p) __arm_vornq_m_s8(__inactive, __a, __b, __p)
+ #define vornq_m_s32(__inactive, __a, __b, __p) __arm_vornq_m_s32(__inactive, __a, __b, __p)
+ #define vornq_m_s16(__inactive, __a, __b, __p) __arm_vornq_m_s16(__inactive, __a, __b, __p)
+ #define vornq_m_u8(__inactive, __a, __b, __p) __arm_vornq_m_u8(__inactive, __a, __b, __p)
+ #define vornq_m_u32(__inactive, __a, __b, __p) __arm_vornq_m_u32(__inactive, __a, __b, __p)
+ #define vornq_m_u16(__inactive, __a, __b, __p) __arm_vornq_m_u16(__inactive, __a, __b, __p)
+ #define vorrq_m_s8(__inactive, __a, __b, __p) __arm_vorrq_m_s8(__inactive, __a, __b, __p)
+ #define vorrq_m_s32(__inactive, __a, __b, __p) __arm_vorrq_m_s32(__inactive, __a, __b, __p)
+ #define vorrq_m_s16(__inactive, __a, __b, __p) __arm_vorrq_m_s16(__inactive, __a, __b, __p)
+ #define vorrq_m_u8(__inactive, __a, __b, __p) __arm_vorrq_m_u8(__inactive, __a, __b, __p)
+ #define vorrq_m_u32(__inactive, __a, __b, __p) __arm_vorrq_m_u32(__inactive, __a, __b, __p)
+ #define vorrq_m_u16(__inactive, __a, __b, __p) __arm_vorrq_m_u16(__inactive, __a, __b, __p)
+ #define vqaddq_m_n_s8(__inactive, __a, __b, __p) __arm_vqaddq_m_n_s8(__inactive, __a, __b, __p)
+ #define vqaddq_m_n_s32(__inactive, __a, __b, __p) __arm_vqaddq_m_n_s32(__inactive, __a, __b, __p)
+ #define vqaddq_m_n_s16(__inactive, __a, __b, __p) __arm_vqaddq_m_n_s16(__inactive, __a, __b, __p)
+ #define vqaddq_m_n_u8(__inactive, __a, __b, __p) __arm_vqaddq_m_n_u8(__inactive, __a, __b, __p)
+ #define vqaddq_m_n_u32(__inactive, __a, __b, __p) __arm_vqaddq_m_n_u32(__inactive, __a, __b, __p)
+ #define vqaddq_m_n_u16(__inactive, __a, __b, __p) __arm_vqaddq_m_n_u16(__inactive, __a, __b, __p)
+ #define vqaddq_m_s8(__inactive, __a, __b, __p) __arm_vqaddq_m_s8(__inactive, __a, __b, __p)
+ #define vqaddq_m_s32(__inactive, __a, __b, __p) __arm_vqaddq_m_s32(__inactive, __a, __b, __p)
+ #define vqaddq_m_s16(__inactive, __a, __b, __p) __arm_vqaddq_m_s16(__inactive, __a, __b, __p)
+ #define vqaddq_m_u8(__inactive, __a, __b, __p) __arm_vqaddq_m_u8(__inactive, __a, __b, __p)
+ #define vqaddq_m_u32(__inactive, __a, __b, __p) __arm_vqaddq_m_u32(__inactive, __a, __b, __p)
+ #define vqaddq_m_u16(__inactive, __a, __b, __p) __arm_vqaddq_m_u16(__inactive, __a, __b, __p)
+ #define vqdmladhq_m_s8(__inactive, __a, __b, __p) __arm_vqdmladhq_m_s8(__inactive, __a, __b, __p)
+ #define vqdmladhq_m_s32(__inactive, __a, __b, __p) __arm_vqdmladhq_m_s32(__inactive, __a, __b, __p)
+ #define vqdmladhq_m_s16(__inactive, __a, __b, __p) __arm_vqdmladhq_m_s16(__inactive, __a, __b, __p)
+ #define vqdmladhxq_m_s8(__inactive, __a, __b, __p) __arm_vqdmladhxq_m_s8(__inactive, __a, __b, __p)
+ #define vqdmladhxq_m_s32(__inactive, __a, __b, __p) __arm_vqdmladhxq_m_s32(__inactive, __a, __b, __p)
+ #define vqdmladhxq_m_s16(__inactive, __a, __b, __p) __arm_vqdmladhxq_m_s16(__inactive, __a, __b, __p)
+ #define vqdmlahq_m_n_s8(__a, __b, __c, __p) __arm_vqdmlahq_m_n_s8(__a, __b, __c, __p)
+ #define vqdmlahq_m_n_s32(__a, __b, __c, __p) __arm_vqdmlahq_m_n_s32(__a, __b, __c, __p)
+ #define vqdmlahq_m_n_s16(__a, __b, __c, __p) __arm_vqdmlahq_m_n_s16(__a, __b, __c, __p)
+ #define vqdmlsdhq_m_s8(__inactive, __a, __b, __p) __arm_vqdmlsdhq_m_s8(__inactive, __a, __b, __p)
+ #define vqdmlsdhq_m_s32(__inactive, __a, __b, __p) __arm_vqdmlsdhq_m_s32(__inactive, __a, __b, __p)
+ #define vqdmlsdhq_m_s16(__inactive, __a, __b, __p) __arm_vqdmlsdhq_m_s16(__inactive, __a, __b, __p)
+ #define vqdmlsdhxq_m_s8(__inactive, __a, __b, __p) __arm_vqdmlsdhxq_m_s8(__inactive, __a, __b, __p)
+ #define vqdmlsdhxq_m_s32(__inactive, __a, __b, __p) __arm_vqdmlsdhxq_m_s32(__inactive, __a, __b, __p)
+ #define vqdmlsdhxq_m_s16(__inactive, __a, __b, __p) __arm_vqdmlsdhxq_m_s16(__inactive, __a, __b, __p)
+ #define vqdmulhq_m_n_s8(__inactive, __a, __b, __p) __arm_vqdmulhq_m_n_s8(__inactive, __a, __b, __p)
+ #define vqdmulhq_m_n_s32(__inactive, __a, __b, __p) __arm_vqdmulhq_m_n_s32(__inactive, __a, __b, __p)
+ #define vqdmulhq_m_n_s16(__inactive, __a, __b, __p) __arm_vqdmulhq_m_n_s16(__inactive, __a, __b, __p)
+ #define vqdmulhq_m_s8(__inactive, __a, __b, __p) __arm_vqdmulhq_m_s8(__inactive, __a, __b, __p)
+ #define vqdmulhq_m_s32(__inactive, __a, __b, __p) __arm_vqdmulhq_m_s32(__inactive, __a, __b, __p)
+ #define vqdmulhq_m_s16(__inactive, __a, __b, __p) __arm_vqdmulhq_m_s16(__inactive, __a, __b, __p)
+ #define vqrdmladhq_m_s8(__inactive, __a, __b, __p) __arm_vqrdmladhq_m_s8(__inactive, __a, __b, __p)
+ #define vqrdmladhq_m_s32(__inactive, __a, __b, __p) __arm_vqrdmladhq_m_s32(__inactive, __a, __b, __p)
+ #define vqrdmladhq_m_s16(__inactive, __a, __b, __p) __arm_vqrdmladhq_m_s16(__inactive, __a, __b, __p)
+ #define vqrdmladhxq_m_s8(__inactive, __a, __b, __p) __arm_vqrdmladhxq_m_s8(__inactive, __a, __b, __p)
+ #define vqrdmladhxq_m_s32(__inactive, __a, __b, __p) __arm_vqrdmladhxq_m_s32(__inactive, __a, __b, __p)
+ #define vqrdmladhxq_m_s16(__inactive, __a, __b, __p) __arm_vqrdmladhxq_m_s16(__inactive, __a, __b, __p)
+ #define vqrdmlahq_m_n_s8(__a, __b, __c, __p) __arm_vqrdmlahq_m_n_s8(__a, __b, __c, __p)
+ #define vqrdmlahq_m_n_s32(__a, __b, __c, __p) __arm_vqrdmlahq_m_n_s32(__a, __b, __c, __p)
+ #define vqrdmlahq_m_n_s16(__a, __b, __c, __p) __arm_vqrdmlahq_m_n_s16(__a, __b, __c, __p)
+ #define vqrdmlashq_m_n_s8(__a, __b, __c, __p) __arm_vqrdmlashq_m_n_s8(__a, __b, __c, __p)
+ #define vqrdmlashq_m_n_s32(__a, __b, __c, __p) __arm_vqrdmlashq_m_n_s32(__a, __b, __c, __p)
+ #define vqrdmlashq_m_n_s16(__a, __b, __c, __p) __arm_vqrdmlashq_m_n_s16(__a, __b, __c, __p)
+ #define vqrdmlsdhq_m_s8(__inactive, __a, __b, __p) __arm_vqrdmlsdhq_m_s8(__inactive, __a, __b, __p)
+ #define vqrdmlsdhq_m_s32(__inactive, __a, __b, __p) __arm_vqrdmlsdhq_m_s32(__inactive, __a, __b, __p)
+ #define vqrdmlsdhq_m_s16(__inactive, __a, __b, __p) __arm_vqrdmlsdhq_m_s16(__inactive, __a, __b, __p)
+ #define vqrdmlsdhxq_m_s8(__inactive, __a, __b, __p) __arm_vqrdmlsdhxq_m_s8(__inactive, __a, __b, __p)
+ #define vqrdmlsdhxq_m_s32(__inactive, __a, __b, __p) __arm_vqrdmlsdhxq_m_s32(__inactive, __a, __b, __p)
+ #define vqrdmlsdhxq_m_s16(__inactive, __a, __b, __p) __arm_vqrdmlsdhxq_m_s16(__inactive, __a, __b, __p)
+ #define vqrdmulhq_m_n_s8(__inactive, __a, __b, __p) __arm_vqrdmulhq_m_n_s8(__inactive, __a, __b, __p)
+ #define vqrdmulhq_m_n_s32(__inactive, __a, __b, __p) __arm_vqrdmulhq_m_n_s32(__inactive, __a, __b, __p)
+ #define vqrdmulhq_m_n_s16(__inactive, __a, __b, __p) __arm_vqrdmulhq_m_n_s16(__inactive, __a, __b, __p)
+ #define vqrdmulhq_m_s8(__inactive, __a, __b, __p) __arm_vqrdmulhq_m_s8(__inactive, __a, __b, __p)
+ #define vqrdmulhq_m_s32(__inactive, __a, __b, __p) __arm_vqrdmulhq_m_s32(__inactive, __a, __b, __p)
+ #define vqrdmulhq_m_s16(__inactive, __a, __b, __p) __arm_vqrdmulhq_m_s16(__inactive, __a, __b, __p)
+ #define vqrshlq_m_s8(__inactive, __a, __b, __p) __arm_vqrshlq_m_s8(__inactive, __a, __b, __p)
+ #define vqrshlq_m_s32(__inactive, __a, __b, __p) __arm_vqrshlq_m_s32(__inactive, __a, __b, __p)
+ #define vqrshlq_m_s16(__inactive, __a, __b, __p) __arm_vqrshlq_m_s16(__inactive, __a, __b, __p)
+ #define vqrshlq_m_u8(__inactive, __a, __b, __p) __arm_vqrshlq_m_u8(__inactive, __a, __b, __p)
+ #define vqrshlq_m_u32(__inactive, __a, __b, __p) __arm_vqrshlq_m_u32(__inactive, __a, __b, __p)
+ #define vqrshlq_m_u16(__inactive, __a, __b, __p) __arm_vqrshlq_m_u16(__inactive, __a, __b, __p)
+ #define vqshlq_m_n_s8(__inactive, __a,  __imm, __p) __arm_vqshlq_m_n_s8(__inactive, __a,  __imm, __p)
+ #define vqshlq_m_n_s32(__inactive, __a,  __imm, __p) __arm_vqshlq_m_n_s32(__inactive, __a,  __imm, __p)
+ #define vqshlq_m_n_s16(__inactive, __a,  __imm, __p) __arm_vqshlq_m_n_s16(__inactive, __a,  __imm, __p)
+ #define vqshlq_m_n_u8(__inactive, __a,  __imm, __p) __arm_vqshlq_m_n_u8(__inactive, __a,  __imm, __p)
+ #define vqshlq_m_n_u32(__inactive, __a,  __imm, __p) __arm_vqshlq_m_n_u32(__inactive, __a,  __imm, __p)
+ #define vqshlq_m_n_u16(__inactive, __a,  __imm, __p) __arm_vqshlq_m_n_u16(__inactive, __a,  __imm, __p)
+ #define vqshlq_m_s8(__inactive, __a, __b, __p) __arm_vqshlq_m_s8(__inactive, __a, __b, __p)
+ #define vqshlq_m_s32(__inactive, __a, __b, __p) __arm_vqshlq_m_s32(__inactive, __a, __b, __p)
+ #define vqshlq_m_s16(__inactive, __a, __b, __p) __arm_vqshlq_m_s16(__inactive, __a, __b, __p)
+ #define vqshlq_m_u8(__inactive, __a, __b, __p) __arm_vqshlq_m_u8(__inactive, __a, __b, __p)
+ #define vqshlq_m_u32(__inactive, __a, __b, __p) __arm_vqshlq_m_u32(__inactive, __a, __b, __p)
+ #define vqshlq_m_u16(__inactive, __a, __b, __p) __arm_vqshlq_m_u16(__inactive, __a, __b, __p)
+ #define vqsubq_m_n_s8(__inactive, __a, __b, __p) __arm_vqsubq_m_n_s8(__inactive, __a, __b, __p)
+ #define vqsubq_m_n_s32(__inactive, __a, __b, __p) __arm_vqsubq_m_n_s32(__inactive, __a, __b, __p)
+ #define vqsubq_m_n_s16(__inactive, __a, __b, __p) __arm_vqsubq_m_n_s16(__inactive, __a, __b, __p)
+ #define vqsubq_m_n_u8(__inactive, __a, __b, __p) __arm_vqsubq_m_n_u8(__inactive, __a, __b, __p)
+ #define vqsubq_m_n_u32(__inactive, __a, __b, __p) __arm_vqsubq_m_n_u32(__inactive, __a, __b, __p)
+ #define vqsubq_m_n_u16(__inactive, __a, __b, __p) __arm_vqsubq_m_n_u16(__inactive, __a, __b, __p)
+ #define vqsubq_m_s8(__inactive, __a, __b, __p) __arm_vqsubq_m_s8(__inactive, __a, __b, __p)
+ #define vqsubq_m_s32(__inactive, __a, __b, __p) __arm_vqsubq_m_s32(__inactive, __a, __b, __p)
+ #define vqsubq_m_s16(__inactive, __a, __b, __p) __arm_vqsubq_m_s16(__inactive, __a, __b, __p)
+ #define vqsubq_m_u8(__inactive, __a, __b, __p) __arm_vqsubq_m_u8(__inactive, __a, __b, __p)
+ #define vqsubq_m_u32(__inactive, __a, __b, __p) __arm_vqsubq_m_u32(__inactive, __a, __b, __p)
+ #define vqsubq_m_u16(__inactive, __a, __b, __p) __arm_vqsubq_m_u16(__inactive, __a, __b, __p)
+ #define vrhaddq_m_s8(__inactive, __a, __b, __p) __arm_vrhaddq_m_s8(__inactive, __a, __b, __p)
+ #define vrhaddq_m_s32(__inactive, __a, __b, __p) __arm_vrhaddq_m_s32(__inactive, __a, __b, __p)
+ #define vrhaddq_m_s16(__inactive, __a, __b, __p) __arm_vrhaddq_m_s16(__inactive, __a, __b, __p)
+ #define vrhaddq_m_u8(__inactive, __a, __b, __p) __arm_vrhaddq_m_u8(__inactive, __a, __b, __p)
+ #define vrhaddq_m_u32(__inactive, __a, __b, __p) __arm_vrhaddq_m_u32(__inactive, __a, __b, __p)
+ #define vrhaddq_m_u16(__inactive, __a, __b, __p) __arm_vrhaddq_m_u16(__inactive, __a, __b, __p)
+ #define vrmulhq_m_s8(__inactive, __a, __b, __p) __arm_vrmulhq_m_s8(__inactive, __a, __b, __p)
+ #define vrmulhq_m_s32(__inactive, __a, __b, __p) __arm_vrmulhq_m_s32(__inactive, __a, __b, __p)
+ #define vrmulhq_m_s16(__inactive, __a, __b, __p) __arm_vrmulhq_m_s16(__inactive, __a, __b, __p)
+ #define vrmulhq_m_u8(__inactive, __a, __b, __p) __arm_vrmulhq_m_u8(__inactive, __a, __b, __p)
+ #define vrmulhq_m_u32(__inactive, __a, __b, __p) __arm_vrmulhq_m_u32(__inactive, __a, __b, __p)
+ #define vrmulhq_m_u16(__inactive, __a, __b, __p) __arm_vrmulhq_m_u16(__inactive, __a, __b, __p)
+ #define vrshlq_m_s8(__inactive, __a, __b, __p) __arm_vrshlq_m_s8(__inactive, __a, __b, __p)
+ #define vrshlq_m_s32(__inactive, __a, __b, __p) __arm_vrshlq_m_s32(__inactive, __a, __b, __p)
+ #define vrshlq_m_s16(__inactive, __a, __b, __p) __arm_vrshlq_m_s16(__inactive, __a, __b, __p)
+ #define vrshlq_m_u8(__inactive, __a, __b, __p) __arm_vrshlq_m_u8(__inactive, __a, __b, __p)
+ #define vrshlq_m_u32(__inactive, __a, __b, __p) __arm_vrshlq_m_u32(__inactive, __a, __b, __p)
+ #define vrshlq_m_u16(__inactive, __a, __b, __p) __arm_vrshlq_m_u16(__inactive, __a, __b, __p)
+ #define vrshrq_m_n_s8(__inactive, __a,  __imm, __p) __arm_vrshrq_m_n_s8(__inactive, __a,  __imm, __p)
+ #define vrshrq_m_n_s32(__inactive, __a,  __imm, __p) __arm_vrshrq_m_n_s32(__inactive, __a,  __imm, __p)
+ #define vrshrq_m_n_s16(__inactive, __a,  __imm, __p) __arm_vrshrq_m_n_s16(__inactive, __a,  __imm, __p)
+ #define vrshrq_m_n_u8(__inactive, __a,  __imm, __p) __arm_vrshrq_m_n_u8(__inactive, __a,  __imm, __p)
+ #define vrshrq_m_n_u32(__inactive, __a,  __imm, __p) __arm_vrshrq_m_n_u32(__inactive, __a,  __imm, __p)
+ #define vrshrq_m_n_u16(__inactive, __a,  __imm, __p) __arm_vrshrq_m_n_u16(__inactive, __a,  __imm, __p)
+ #define vshlq_m_n_s8(__inactive, __a,  __imm, __p) __arm_vshlq_m_n_s8(__inactive, __a,  __imm, __p)
+ #define vshlq_m_n_s32(__inactive, __a,  __imm, __p) __arm_vshlq_m_n_s32(__inactive, __a,  __imm, __p)
+ #define vshlq_m_n_s16(__inactive, __a,  __imm, __p) __arm_vshlq_m_n_s16(__inactive, __a,  __imm, __p)
+ #define vshlq_m_n_u8(__inactive, __a,  __imm, __p) __arm_vshlq_m_n_u8(__inactive, __a,  __imm, __p)
+ #define vshlq_m_n_u32(__inactive, __a,  __imm, __p) __arm_vshlq_m_n_u32(__inactive, __a,  __imm, __p)
+ #define vshlq_m_n_u16(__inactive, __a,  __imm, __p) __arm_vshlq_m_n_u16(__inactive, __a,  __imm, __p)
+ #define vshrq_m_n_s8(__inactive, __a,  __imm, __p) __arm_vshrq_m_n_s8(__inactive, __a,  __imm, __p)
+ #define vshrq_m_n_s32(__inactive, __a,  __imm, __p) __arm_vshrq_m_n_s32(__inactive, __a,  __imm, __p)
+ #define vshrq_m_n_s16(__inactive, __a,  __imm, __p) __arm_vshrq_m_n_s16(__inactive, __a,  __imm, __p)
+ #define vshrq_m_n_u8(__inactive, __a,  __imm, __p) __arm_vshrq_m_n_u8(__inactive, __a,  __imm, __p)
+ #define vshrq_m_n_u32(__inactive, __a,  __imm, __p) __arm_vshrq_m_n_u32(__inactive, __a,  __imm, __p)
+ #define vshrq_m_n_u16(__inactive, __a,  __imm, __p) __arm_vshrq_m_n_u16(__inactive, __a,  __imm, __p)
+ #define vsliq_m_n_s8(__a, __b,  __imm, __p) __arm_vsliq_m_n_s8(__a, __b,  __imm, __p)
+ #define vsliq_m_n_s32(__a, __b,  __imm, __p) __arm_vsliq_m_n_s32(__a, __b,  __imm, __p)
+ #define vsliq_m_n_s16(__a, __b,  __imm, __p) __arm_vsliq_m_n_s16(__a, __b,  __imm, __p)
+ #define vsliq_m_n_u8(__a, __b,  __imm, __p) __arm_vsliq_m_n_u8(__a, __b,  __imm, __p)
+ #define vsliq_m_n_u32(__a, __b,  __imm, __p) __arm_vsliq_m_n_u32(__a, __b,  __imm, __p)
+ #define vsliq_m_n_u16(__a, __b,  __imm, __p) __arm_vsliq_m_n_u16(__a, __b,  __imm, __p)
+ #define vsubq_m_n_s8(__inactive, __a, __b, __p) __arm_vsubq_m_n_s8(__inactive, __a, __b, __p)
+ #define vsubq_m_n_s32(__inactive, __a, __b, __p) __arm_vsubq_m_n_s32(__inactive, __a, __b, __p)
+ #define vsubq_m_n_s16(__inactive, __a, __b, __p) __arm_vsubq_m_n_s16(__inactive, __a, __b, __p)
+ #define vsubq_m_n_u8(__inactive, __a, __b, __p) __arm_vsubq_m_n_u8(__inactive, __a, __b, __p)
+ #define vsubq_m_n_u32(__inactive, __a, __b, __p) __arm_vsubq_m_n_u32(__inactive, __a, __b, __p)
+ #define vsubq_m_n_u16(__inactive, __a, __b, __p) __arm_vsubq_m_n_u16(__inactive, __a, __b, __p)
+ #define vmlaldavaq_p_s32(__a, __b, __c, __p) __arm_vmlaldavaq_p_s32(__a, __b, __c, __p)
+ #define vmlaldavaq_p_s16(__a, __b, __c, __p) __arm_vmlaldavaq_p_s16(__a, __b, __c, __p)
+ #define vmlaldavaq_p_u32(__a, __b, __c, __p) __arm_vmlaldavaq_p_u32(__a, __b, __c, __p)
+ #define vmlaldavaq_p_u16(__a, __b, __c, __p) __arm_vmlaldavaq_p_u16(__a, __b, __c, __p)
+ #define vmlaldavaxq_p_s32(__a, __b, __c, __p) __arm_vmlaldavaxq_p_s32(__a, __b, __c, __p)
+ #define vmlaldavaxq_p_s16(__a, __b, __c, __p) __arm_vmlaldavaxq_p_s16(__a, __b, __c, __p)
+ #define vmlaldavaxq_p_u32(__a, __b, __c, __p) __arm_vmlaldavaxq_p_u32(__a, __b, __c, __p)
+ #define vmlaldavaxq_p_u16(__a, __b, __c, __p) __arm_vmlaldavaxq_p_u16(__a, __b, __c, __p)
+ #define vmlsldavaq_p_s32(__a, __b, __c, __p) __arm_vmlsldavaq_p_s32(__a, __b, __c, __p)
+ #define vmlsldavaq_p_s16(__a, __b, __c, __p) __arm_vmlsldavaq_p_s16(__a, __b, __c, __p)
+ #define vmlsldavaxq_p_s32(__a, __b, __c, __p) __arm_vmlsldavaxq_p_s32(__a, __b, __c, __p)
+ #define vmlsldavaxq_p_s16(__a, __b, __c, __p) __arm_vmlsldavaxq_p_s16(__a, __b, __c, __p)
+ #define vmullbq_poly_m_p8(__inactive, __a, __b, __p) __arm_vmullbq_poly_m_p8(__inactive, __a, __b, __p)
+ #define vmullbq_poly_m_p16(__inactive, __a, __b, __p) __arm_vmullbq_poly_m_p16(__inactive, __a, __b, __p)
+ #define vmulltq_poly_m_p8(__inactive, __a, __b, __p) __arm_vmulltq_poly_m_p8(__inactive, __a, __b, __p)
+ #define vmulltq_poly_m_p16(__inactive, __a, __b, __p) __arm_vmulltq_poly_m_p16(__inactive, __a, __b, __p)
+ #define vqdmullbq_m_n_s32(__inactive, __a, __b, __p) __arm_vqdmullbq_m_n_s32(__inactive, __a, __b, __p)
+ #define vqdmullbq_m_n_s16(__inactive, __a, __b, __p) __arm_vqdmullbq_m_n_s16(__inactive, __a, __b, __p)
+ #define vqdmullbq_m_s32(__inactive, __a, __b, __p) __arm_vqdmullbq_m_s32(__inactive, __a, __b, __p)
+ #define vqdmullbq_m_s16(__inactive, __a, __b, __p) __arm_vqdmullbq_m_s16(__inactive, __a, __b, __p)
+ #define vqdmulltq_m_n_s32(__inactive, __a, __b, __p) __arm_vqdmulltq_m_n_s32(__inactive, __a, __b, __p)
+ #define vqdmulltq_m_n_s16(__inactive, __a, __b, __p) __arm_vqdmulltq_m_n_s16(__inactive, __a, __b, __p)
+ #define vqdmulltq_m_s32(__inactive, __a, __b, __p) __arm_vqdmulltq_m_s32(__inactive, __a, __b, __p)
+ #define vqdmulltq_m_s16(__inactive, __a, __b, __p) __arm_vqdmulltq_m_s16(__inactive, __a, __b, __p)
+ #define vqrshrnbq_m_n_s32(__a, __b,  __imm, __p) __arm_vqrshrnbq_m_n_s32(__a, __b,  __imm, __p)
+ #define vqrshrnbq_m_n_s16(__a, __b,  __imm, __p) __arm_vqrshrnbq_m_n_s16(__a, __b,  __imm, __p)
+ #define vqrshrnbq_m_n_u32(__a, __b,  __imm, __p) __arm_vqrshrnbq_m_n_u32(__a, __b,  __imm, __p)
+ #define vqrshrnbq_m_n_u16(__a, __b,  __imm, __p) __arm_vqrshrnbq_m_n_u16(__a, __b,  __imm, __p)
+ #define vqrshrntq_m_n_s32(__a, __b,  __imm, __p) __arm_vqrshrntq_m_n_s32(__a, __b,  __imm, __p)
+ #define vqrshrntq_m_n_s16(__a, __b,  __imm, __p) __arm_vqrshrntq_m_n_s16(__a, __b,  __imm, __p)
+ #define vqrshrntq_m_n_u32(__a, __b,  __imm, __p) __arm_vqrshrntq_m_n_u32(__a, __b,  __imm, __p)
+ #define vqrshrntq_m_n_u16(__a, __b,  __imm, __p) __arm_vqrshrntq_m_n_u16(__a, __b,  __imm, __p)
+ #define vqrshrunbq_m_n_s32(__a, __b,  __imm, __p) __arm_vqrshrunbq_m_n_s32(__a, __b,  __imm, __p)
+ #define vqrshrunbq_m_n_s16(__a, __b,  __imm, __p) __arm_vqrshrunbq_m_n_s16(__a, __b,  __imm, __p)
+ #define vqrshruntq_m_n_s32(__a, __b,  __imm, __p) __arm_vqrshruntq_m_n_s32(__a, __b,  __imm, __p)
+ #define vqrshruntq_m_n_s16(__a, __b,  __imm, __p) __arm_vqrshruntq_m_n_s16(__a, __b,  __imm, __p)
+ #define vqshrnbq_m_n_s32(__a, __b,  __imm, __p) __arm_vqshrnbq_m_n_s32(__a, __b,  __imm, __p)
+ #define vqshrnbq_m_n_s16(__a, __b,  __imm, __p) __arm_vqshrnbq_m_n_s16(__a, __b,  __imm, __p)
+ #define vqshrnbq_m_n_u32(__a, __b,  __imm, __p) __arm_vqshrnbq_m_n_u32(__a, __b,  __imm, __p)
+ #define vqshrnbq_m_n_u16(__a, __b,  __imm, __p) __arm_vqshrnbq_m_n_u16(__a, __b,  __imm, __p)
+ #define vqshrntq_m_n_s32(__a, __b,  __imm, __p) __arm_vqshrntq_m_n_s32(__a, __b,  __imm, __p)
+ #define vqshrntq_m_n_s16(__a, __b,  __imm, __p) __arm_vqshrntq_m_n_s16(__a, __b,  __imm, __p)
+ #define vqshrntq_m_n_u32(__a, __b,  __imm, __p) __arm_vqshrntq_m_n_u32(__a, __b,  __imm, __p)
+ #define vqshrntq_m_n_u16(__a, __b,  __imm, __p) __arm_vqshrntq_m_n_u16(__a, __b,  __imm, __p)
+ #define vqshrunbq_m_n_s32(__a, __b,  __imm, __p) __arm_vqshrunbq_m_n_s32(__a, __b,  __imm, __p)
+ #define vqshrunbq_m_n_s16(__a, __b,  __imm, __p) __arm_vqshrunbq_m_n_s16(__a, __b,  __imm, __p)
+ #define vqshruntq_m_n_s32(__a, __b,  __imm, __p) __arm_vqshruntq_m_n_s32(__a, __b,  __imm, __p)
+ #define vqshruntq_m_n_s16(__a, __b,  __imm, __p) __arm_vqshruntq_m_n_s16(__a, __b,  __imm, __p)
+ #define vrmlaldavhaq_p_s32(__a, __b, __c, __p) __arm_vrmlaldavhaq_p_s32(__a, __b, __c, __p)
+ #define vrmlaldavhaq_p_u32(__a, __b, __c, __p) __arm_vrmlaldavhaq_p_u32(__a, __b, __c, __p)
+ #define vrmlaldavhaxq_p_s32(__a, __b, __c, __p) __arm_vrmlaldavhaxq_p_s32(__a, __b, __c, __p)
+ #define vrmlsldavhaq_p_s32(__a, __b, __c, __p) __arm_vrmlsldavhaq_p_s32(__a, __b, __c, __p)
+ #define vrmlsldavhaxq_p_s32(__a, __b, __c, __p) __arm_vrmlsldavhaxq_p_s32(__a, __b, __c, __p)
+ #define vrshrnbq_m_n_s32(__a, __b,  __imm, __p) __arm_vrshrnbq_m_n_s32(__a, __b,  __imm, __p)
+ #define vrshrnbq_m_n_s16(__a, __b,  __imm, __p) __arm_vrshrnbq_m_n_s16(__a, __b,  __imm, __p)
+ #define vrshrnbq_m_n_u32(__a, __b,  __imm, __p) __arm_vrshrnbq_m_n_u32(__a, __b,  __imm, __p)
+ #define vrshrnbq_m_n_u16(__a, __b,  __imm, __p) __arm_vrshrnbq_m_n_u16(__a, __b,  __imm, __p)
+ #define vrshrntq_m_n_s32(__a, __b,  __imm, __p) __arm_vrshrntq_m_n_s32(__a, __b,  __imm, __p)
+ #define vrshrntq_m_n_s16(__a, __b,  __imm, __p) __arm_vrshrntq_m_n_s16(__a, __b,  __imm, __p)
+ #define vrshrntq_m_n_u32(__a, __b,  __imm, __p) __arm_vrshrntq_m_n_u32(__a, __b,  __imm, __p)
+ #define vrshrntq_m_n_u16(__a, __b,  __imm, __p) __arm_vrshrntq_m_n_u16(__a, __b,  __imm, __p)
+ #define vshllbq_m_n_s8(__inactive, __a,  __imm, __p) __arm_vshllbq_m_n_s8(__inactive, __a,  __imm, __p)
+ #define vshllbq_m_n_s16(__inactive, __a,  __imm, __p) __arm_vshllbq_m_n_s16(__inactive, __a,  __imm, __p)
+ #define vshllbq_m_n_u8(__inactive, __a,  __imm, __p) __arm_vshllbq_m_n_u8(__inactive, __a,  __imm, __p)
+ #define vshllbq_m_n_u16(__inactive, __a,  __imm, __p) __arm_vshllbq_m_n_u16(__inactive, __a,  __imm, __p)
+ #define vshlltq_m_n_s8(__inactive, __a,  __imm, __p) __arm_vshlltq_m_n_s8(__inactive, __a,  __imm, __p)
+ #define vshlltq_m_n_s16(__inactive, __a,  __imm, __p) __arm_vshlltq_m_n_s16(__inactive, __a,  __imm, __p)
+ #define vshlltq_m_n_u8(__inactive, __a,  __imm, __p) __arm_vshlltq_m_n_u8(__inactive, __a,  __imm, __p)
+ #define vshlltq_m_n_u16(__inactive, __a,  __imm, __p) __arm_vshlltq_m_n_u16(__inactive, __a,  __imm, __p)
+ #define vshrnbq_m_n_s32(__a, __b,  __imm, __p) __arm_vshrnbq_m_n_s32(__a, __b,  __imm, __p)
+ #define vshrnbq_m_n_s16(__a, __b,  __imm, __p) __arm_vshrnbq_m_n_s16(__a, __b,  __imm, __p)
+ #define vshrnbq_m_n_u32(__a, __b,  __imm, __p) __arm_vshrnbq_m_n_u32(__a, __b,  __imm, __p)
+ #define vshrnbq_m_n_u16(__a, __b,  __imm, __p) __arm_vshrnbq_m_n_u16(__a, __b,  __imm, __p)
+ #define vshrntq_m_n_s32(__a, __b,  __imm, __p) __arm_vshrntq_m_n_s32(__a, __b,  __imm, __p)
+ #define vshrntq_m_n_s16(__a, __b,  __imm, __p) __arm_vshrntq_m_n_s16(__a, __b,  __imm, __p)
+ #define vshrntq_m_n_u32(__a, __b,  __imm, __p) __arm_vshrntq_m_n_u32(__a, __b,  __imm, __p)
+ #define vshrntq_m_n_u16(__a, __b,  __imm, __p) __arm_vshrntq_m_n_u16(__a, __b,  __imm, __p)
+ #define vabdq_m_f32(__inactive, __a, __b, __p) __arm_vabdq_m_f32(__inactive, __a, __b, __p)
+ #define vabdq_m_f16(__inactive, __a, __b, __p) __arm_vabdq_m_f16(__inactive, __a, __b, __p)
+ #define vaddq_m_f32(__inactive, __a, __b, __p) __arm_vaddq_m_f32(__inactive, __a, __b, __p)
+ #define vaddq_m_f16(__inactive, __a, __b, __p) __arm_vaddq_m_f16(__inactive, __a, __b, __p)
+ #define vaddq_m_n_f32(__inactive, __a, __b, __p) __arm_vaddq_m_n_f32(__inactive, __a, __b, __p)
+ #define vaddq_m_n_f16(__inactive, __a, __b, __p) __arm_vaddq_m_n_f16(__inactive, __a, __b, __p)
+ #define vandq_m_f32(__inactive, __a, __b, __p) __arm_vandq_m_f32(__inactive, __a, __b, __p)
+ #define vandq_m_f16(__inactive, __a, __b, __p) __arm_vandq_m_f16(__inactive, __a, __b, __p)
+ #define vbicq_m_f32(__inactive, __a, __b, __p) __arm_vbicq_m_f32(__inactive, __a, __b, __p)
+ #define vbicq_m_f16(__inactive, __a, __b, __p) __arm_vbicq_m_f16(__inactive, __a, __b, __p)
+ #define vbrsrq_m_n_f32(__inactive, __a, __b, __p) __arm_vbrsrq_m_n_f32(__inactive, __a, __b, __p)
+ #define vbrsrq_m_n_f16(__inactive, __a, __b, __p) __arm_vbrsrq_m_n_f16(__inactive, __a, __b, __p)
+ #define vcaddq_rot270_m_f32(__inactive, __a, __b, __p) __arm_vcaddq_rot270_m_f32(__inactive, __a, __b, __p)
+ #define vcaddq_rot270_m_f16(__inactive, __a, __b, __p) __arm_vcaddq_rot270_m_f16(__inactive, __a, __b, __p)
+ #define vcaddq_rot90_m_f32(__inactive, __a, __b, __p) __arm_vcaddq_rot90_m_f32(__inactive, __a, __b, __p)
+ #define vcaddq_rot90_m_f16(__inactive, __a, __b, __p) __arm_vcaddq_rot90_m_f16(__inactive, __a, __b, __p)
+ #define vcmlaq_m_f32(__a, __b, __c, __p) __arm_vcmlaq_m_f32(__a, __b, __c, __p)
+ #define vcmlaq_m_f16(__a, __b, __c, __p) __arm_vcmlaq_m_f16(__a, __b, __c, __p)
+ #define vcmlaq_rot180_m_f32(__a, __b, __c, __p) __arm_vcmlaq_rot180_m_f32(__a, __b, __c, __p)
+ #define vcmlaq_rot180_m_f16(__a, __b, __c, __p) __arm_vcmlaq_rot180_m_f16(__a, __b, __c, __p)
+ #define vcmlaq_rot270_m_f32(__a, __b, __c, __p) __arm_vcmlaq_rot270_m_f32(__a, __b, __c, __p)
+ #define vcmlaq_rot270_m_f16(__a, __b, __c, __p) __arm_vcmlaq_rot270_m_f16(__a, __b, __c, __p)
+ #define vcmlaq_rot90_m_f32(__a, __b, __c, __p) __arm_vcmlaq_rot90_m_f32(__a, __b, __c, __p)
+ #define vcmlaq_rot90_m_f16(__a, __b, __c, __p) __arm_vcmlaq_rot90_m_f16(__a, __b, __c, __p)
+ #define vcmulq_m_f32(__inactive, __a, __b, __p) __arm_vcmulq_m_f32(__inactive, __a, __b, __p)
+ #define vcmulq_m_f16(__inactive, __a, __b, __p) __arm_vcmulq_m_f16(__inactive, __a, __b, __p)
+ #define vcmulq_rot180_m_f32(__inactive, __a, __b, __p) __arm_vcmulq_rot180_m_f32(__inactive, __a, __b, __p)
+ #define vcmulq_rot180_m_f16(__inactive, __a, __b, __p) __arm_vcmulq_rot180_m_f16(__inactive, __a, __b, __p)
+ #define vcmulq_rot270_m_f32(__inactive, __a, __b, __p) __arm_vcmulq_rot270_m_f32(__inactive, __a, __b, __p)
+ #define vcmulq_rot270_m_f16(__inactive, __a, __b, __p) __arm_vcmulq_rot270_m_f16(__inactive, __a, __b, __p)
+ #define vcmulq_rot90_m_f32(__inactive, __a, __b, __p) __arm_vcmulq_rot90_m_f32(__inactive, __a, __b, __p)
+ #define vcmulq_rot90_m_f16(__inactive, __a, __b, __p) __arm_vcmulq_rot90_m_f16(__inactive, __a, __b, __p)
+ #define vcvtq_m_n_s32_f32(__inactive, __a,  __imm6, __p) __arm_vcvtq_m_n_s32_f32(__inactive, __a,  __imm6, __p)
+ #define vcvtq_m_n_s16_f16(__inactive, __a,  __imm6, __p) __arm_vcvtq_m_n_s16_f16(__inactive, __a,  __imm6, __p)
+ #define vcvtq_m_n_u32_f32(__inactive, __a,  __imm6, __p) __arm_vcvtq_m_n_u32_f32(__inactive, __a,  __imm6, __p)
+ #define vcvtq_m_n_u16_f16(__inactive, __a,  __imm6, __p) __arm_vcvtq_m_n_u16_f16(__inactive, __a,  __imm6, __p)
+ #define veorq_m_f32(__inactive, __a, __b, __p) __arm_veorq_m_f32(__inactive, __a, __b, __p)
+ #define veorq_m_f16(__inactive, __a, __b, __p) __arm_veorq_m_f16(__inactive, __a, __b, __p)
+ #define vfmaq_m_f32(__a, __b, __c, __p) __arm_vfmaq_m_f32(__a, __b, __c, __p)
+ #define vfmaq_m_f16(__a, __b, __c, __p) __arm_vfmaq_m_f16(__a, __b, __c, __p)
+ #define vfmaq_m_n_f32(__a, __b, __c, __p) __arm_vfmaq_m_n_f32(__a, __b, __c, __p)
+ #define vfmaq_m_n_f16(__a, __b, __c, __p) __arm_vfmaq_m_n_f16(__a, __b, __c, __p)
+ #define vfmasq_m_n_f32(__a, __b, __c, __p) __arm_vfmasq_m_n_f32(__a, __b, __c, __p)
+ #define vfmasq_m_n_f16(__a, __b, __c, __p) __arm_vfmasq_m_n_f16(__a, __b, __c, __p)
+ #define vfmsq_m_f32(__a, __b, __c, __p) __arm_vfmsq_m_f32(__a, __b, __c, __p)
+ #define vfmsq_m_f16(__a, __b, __c, __p) __arm_vfmsq_m_f16(__a, __b, __c, __p)
+ #define vmaxnmq_m_f32(__inactive, __a, __b, __p) __arm_vmaxnmq_m_f32(__inactive, __a, __b, __p)
+ #define vmaxnmq_m_f16(__inactive, __a, __b, __p) __arm_vmaxnmq_m_f16(__inactive, __a, __b, __p)
+ #define vminnmq_m_f32(__inactive, __a, __b, __p) __arm_vminnmq_m_f32(__inactive, __a, __b, __p)
+ #define vminnmq_m_f16(__inactive, __a, __b, __p) __arm_vminnmq_m_f16(__inactive, __a, __b, __p)
+ #define vmulq_m_f32(__inactive, __a, __b, __p) __arm_vmulq_m_f32(__inactive, __a, __b, __p)
+ #define vmulq_m_f16(__inactive, __a, __b, __p) __arm_vmulq_m_f16(__inactive, __a, __b, __p)
+ #define vmulq_m_n_f32(__inactive, __a, __b, __p) __arm_vmulq_m_n_f32(__inactive, __a, __b, __p)
+ #define vmulq_m_n_f16(__inactive, __a, __b, __p) __arm_vmulq_m_n_f16(__inactive, __a, __b, __p)
+ #define vornq_m_f32(__inactive, __a, __b, __p) __arm_vornq_m_f32(__inactive, __a, __b, __p)
+ #define vornq_m_f16(__inactive, __a, __b, __p) __arm_vornq_m_f16(__inactive, __a, __b, __p)
+ #define vorrq_m_f32(__inactive, __a, __b, __p) __arm_vorrq_m_f32(__inactive, __a, __b, __p)
+ #define vorrq_m_f16(__inactive, __a, __b, __p) __arm_vorrq_m_f16(__inactive, __a, __b, __p)
+ #define vsubq_m_f32(__inactive, __a, __b, __p) __arm_vsubq_m_f32(__inactive, __a, __b, __p)
+ #define vsubq_m_f16(__inactive, __a, __b, __p) __arm_vsubq_m_f16(__inactive, __a, __b, __p)
+ #define vsubq_m_n_f32(__inactive, __a, __b, __p) __arm_vsubq_m_n_f32(__inactive, __a, __b, __p)
+ #define vsubq_m_n_f16(__inactive, __a, __b, __p) __arm_vsubq_m_n_f16(__inactive, __a, __b, __p)
+ #define vstrbq_s8( __addr, __value) __arm_vstrbq_s8( __addr, __value)
+ #define vstrbq_u8( __addr, __value) __arm_vstrbq_u8( __addr, __value)
+ #define vstrbq_u16( __addr, __value) __arm_vstrbq_u16( __addr, __value)
+ #define vstrbq_scatter_offset_s8( __base, __offset, __value) __arm_vstrbq_scatter_offset_s8( __base, __offset, __value)
+ #define vstrbq_scatter_offset_u8( __base, __offset, __value) __arm_vstrbq_scatter_offset_u8( __base, __offset, __value)
+ #define vstrbq_scatter_offset_u16( __base, __offset, __value) __arm_vstrbq_scatter_offset_u16( __base, __offset, __value)
+ #define vstrbq_s16( __addr, __value) __arm_vstrbq_s16( __addr, __value)
+ #define vstrbq_u32( __addr, __value) __arm_vstrbq_u32( __addr, __value)
+ #define vstrbq_scatter_offset_s16( __base, __offset, __value) __arm_vstrbq_scatter_offset_s16( __base, __offset, __value)
+ #define vstrbq_scatter_offset_u32( __base, __offset, __value) __arm_vstrbq_scatter_offset_u32( __base, __offset, __value)
+ #define vstrbq_s32( __addr, __value) __arm_vstrbq_s32( __addr, __value)
+ #define vstrbq_scatter_offset_s32( __base, __offset, __value) __arm_vstrbq_scatter_offset_s32( __base, __offset, __value)
+ #define vstrwq_scatter_base_s32(__addr,  __offset, __value) __arm_vstrwq_scatter_base_s32(__addr,  __offset, __value)
+ #define vstrwq_scatter_base_u32(__addr,  __offset, __value) __arm_vstrwq_scatter_base_u32(__addr,  __offset, __value)
+ #define vldrbq_gather_offset_u8(__base, __offset) __arm_vldrbq_gather_offset_u8(__base, __offset)
+ #define vldrbq_gather_offset_s8(__base, __offset) __arm_vldrbq_gather_offset_s8(__base, __offset)
+ #define vldrbq_s8(__base) __arm_vldrbq_s8(__base)
+ #define vldrbq_u8(__base) __arm_vldrbq_u8(__base)
+ #define vldrbq_gather_offset_u16(__base, __offset) __arm_vldrbq_gather_offset_u16(__base, __offset)
+ #define vldrbq_gather_offset_s16(__base, __offset) __arm_vldrbq_gather_offset_s16(__base, __offset)
+ #define vldrbq_s16(__base) __arm_vldrbq_s16(__base)
+ #define vldrbq_u16(__base) __arm_vldrbq_u16(__base)
+ #define vldrbq_gather_offset_u32(__base, __offset) __arm_vldrbq_gather_offset_u32(__base, __offset)
+ #define vldrbq_gather_offset_s32(__base, __offset) __arm_vldrbq_gather_offset_s32(__base, __offset)
+ #define vldrbq_s32(__base) __arm_vldrbq_s32(__base)
+ #define vldrbq_u32(__base) __arm_vldrbq_u32(__base)
+ #define vldrwq_gather_base_s32(__addr,  __offset) __arm_vldrwq_gather_base_s32(__addr,  __offset)
+ #define vldrwq_gather_base_u32(__addr,  __offset) __arm_vldrwq_gather_base_u32(__addr,  __offset)
+ #define vstrbq_p_s8( __addr, __value, __p) __arm_vstrbq_p_s8( __addr, __value, __p)
+ #define vstrbq_p_s32( __addr, __value, __p) __arm_vstrbq_p_s32( __addr, __value, __p)
+ #define vstrbq_p_s16( __addr, __value, __p) __arm_vstrbq_p_s16( __addr, __value, __p)
+ #define vstrbq_p_u8( __addr, __value, __p) __arm_vstrbq_p_u8( __addr, __value, __p)
+ #define vstrbq_p_u32( __addr, __value, __p) __arm_vstrbq_p_u32( __addr, __value, __p)
+ #define vstrbq_p_u16( __addr, __value, __p) __arm_vstrbq_p_u16( __addr, __value, __p)
+ #define vstrbq_scatter_offset_p_s8( __base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p_s8( __base, __offset, __value, __p)
+ #define vstrbq_scatter_offset_p_s32( __base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p_s32( __base, __offset, __value, __p)
+ #define vstrbq_scatter_offset_p_s16( __base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p_s16( __base, __offset, __value, __p)
+ #define vstrbq_scatter_offset_p_u8( __base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p_u8( __base, __offset, __value, __p)
+ #define vstrbq_scatter_offset_p_u32( __base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p_u32( __base, __offset, __value, __p)
+ #define vstrbq_scatter_offset_p_u16( __base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p_u16( __base, __offset, __value, __p)
+ #define vstrwq_scatter_base_p_s32(__addr,  __offset, __value, __p) __arm_vstrwq_scatter_base_p_s32(__addr,  __offset, __value, __p)
+ #define vstrwq_scatter_base_p_u32(__addr,  __offset, __value, __p) __arm_vstrwq_scatter_base_p_u32(__addr,  __offset, __value, __p)
+ #define vldrbq_gather_offset_z_s16(__base, __offset, __p) __arm_vldrbq_gather_offset_z_s16(__base, __offset, __p)
+ #define vldrbq_gather_offset_z_u8(__base, __offset, __p) __arm_vldrbq_gather_offset_z_u8(__base, __offset, __p)
+ #define vldrbq_gather_offset_z_s32(__base, __offset, __p) __arm_vldrbq_gather_offset_z_s32(__base, __offset, __p)
+ #define vldrbq_gather_offset_z_u16(__base, __offset, __p) __arm_vldrbq_gather_offset_z_u16(__base, __offset, __p)
+ #define vldrbq_gather_offset_z_u32(__base, __offset, __p) __arm_vldrbq_gather_offset_z_u32(__base, __offset, __p)
+ #define vldrbq_gather_offset_z_s8(__base, __offset, __p) __arm_vldrbq_gather_offset_z_s8(__base, __offset, __p)
+ #define vldrbq_z_s16(__base, __p) __arm_vldrbq_z_s16(__base, __p)
+ #define vldrbq_z_u8(__base, __p) __arm_vldrbq_z_u8(__base, __p)
+ #define vldrbq_z_s8(__base, __p) __arm_vldrbq_z_s8(__base, __p)
+ #define vldrbq_z_s32(__base, __p) __arm_vldrbq_z_s32(__base, __p)
+ #define vldrbq_z_u16(__base, __p) __arm_vldrbq_z_u16(__base, __p)
+ #define vldrbq_z_u32(__base, __p) __arm_vldrbq_z_u32(__base, __p)
+ #define vldrwq_gather_base_z_u32(__addr,  __offset, __p) __arm_vldrwq_gather_base_z_u32(__addr,  __offset, __p)
+ #define vldrwq_gather_base_z_s32(__addr,  __offset, __p) __arm_vldrwq_gather_base_z_s32(__addr,  __offset, __p)
+ #define vld1q_s8(__base) __arm_vld1q_s8(__base)
+ #define vld1q_s32(__base) __arm_vld1q_s32(__base)
+ #define vld1q_s16(__base) __arm_vld1q_s16(__base)
+ #define vld1q_u8(__base) __arm_vld1q_u8(__base)
+ #define vld1q_u32(__base) __arm_vld1q_u32(__base)
+ #define vld1q_u16(__base) __arm_vld1q_u16(__base)
+ #define vldrhq_gather_offset_s32(__base, __offset) __arm_vldrhq_gather_offset_s32(__base, __offset)
+ #define vldrhq_gather_offset_s16(__base, __offset) __arm_vldrhq_gather_offset_s16(__base, __offset)
+ #define vldrhq_gather_offset_u32(__base, __offset) __arm_vldrhq_gather_offset_u32(__base, __offset)
+ #define vldrhq_gather_offset_u16(__base, __offset) __arm_vldrhq_gather_offset_u16(__base, __offset)
+ #define vldrhq_gather_offset_z_s32(__base, __offset, __p) __arm_vldrhq_gather_offset_z_s32(__base, __offset, __p)
+ #define vldrhq_gather_offset_z_s16(__base, __offset, __p) __arm_vldrhq_gather_offset_z_s16(__base, __offset, __p)
+ #define vldrhq_gather_offset_z_u32(__base, __offset, __p) __arm_vldrhq_gather_offset_z_u32(__base, __offset, __p)
+ #define vldrhq_gather_offset_z_u16(__base, __offset, __p) __arm_vldrhq_gather_offset_z_u16(__base, __offset, __p)
+ #define vldrhq_gather_shifted_offset_s32(__base, __offset) __arm_vldrhq_gather_shifted_offset_s32(__base, __offset)
+ #define vldrhq_gather_shifted_offset_s16(__base, __offset) __arm_vldrhq_gather_shifted_offset_s16(__base, __offset)
+ #define vldrhq_gather_shifted_offset_u32(__base, __offset) __arm_vldrhq_gather_shifted_offset_u32(__base, __offset)
+ #define vldrhq_gather_shifted_offset_u16(__base, __offset) __arm_vldrhq_gather_shifted_offset_u16(__base, __offset)
+ #define vldrhq_gather_shifted_offset_z_s32(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_s32(__base, __offset, __p)
+ #define vldrhq_gather_shifted_offset_z_s16(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_s16(__base, __offset, __p)
+ #define vldrhq_gather_shifted_offset_z_u32(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_u32(__base, __offset, __p)
+ #define vldrhq_gather_shifted_offset_z_u16(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_u16(__base, __offset, __p)
+ #define vldrhq_s32(__base) __arm_vldrhq_s32(__base)
+ #define vldrhq_s16(__base) __arm_vldrhq_s16(__base)
+ #define vldrhq_u32(__base) __arm_vldrhq_u32(__base)
+ #define vldrhq_u16(__base) __arm_vldrhq_u16(__base)
+ #define vldrhq_z_s32(__base, __p) __arm_vldrhq_z_s32(__base, __p)
+ #define vldrhq_z_s16(__base, __p) __arm_vldrhq_z_s16(__base, __p)
+ #define vldrhq_z_u32(__base, __p) __arm_vldrhq_z_u32(__base, __p)
+ #define vldrhq_z_u16(__base, __p) __arm_vldrhq_z_u16(__base, __p)
+ #define vldrwq_s32(__base) __arm_vldrwq_s32(__base)
+ #define vldrwq_u32(__base) __arm_vldrwq_u32(__base)
+ #define vldrwq_z_s32(__base, __p) __arm_vldrwq_z_s32(__base, __p)
+ #define vldrwq_z_u32(__base, __p) __arm_vldrwq_z_u32(__base, __p)
+ #define vld1q_f32(__base) __arm_vld1q_f32(__base)
+ #define vld1q_f16(__base) __arm_vld1q_f16(__base)
+ #define vldrhq_f16(__base) __arm_vldrhq_f16(__base)
+ #define vldrhq_z_f16(__base, __p) __arm_vldrhq_z_f16(__base, __p)
+ #define vldrwq_f32(__base) __arm_vldrwq_f32(__base)
+ #define vldrwq_z_f32(__base, __p) __arm_vldrwq_z_f32(__base, __p)
+ #define vldrdq_gather_base_s64(__addr,  __offset) __arm_vldrdq_gather_base_s64(__addr,  __offset)
+ #define vldrdq_gather_base_u64(__addr,  __offset) __arm_vldrdq_gather_base_u64(__addr,  __offset)
+ #define vldrdq_gather_base_z_s64(__addr,  __offset, __p) __arm_vldrdq_gather_base_z_s64(__addr,  __offset, __p)
+ #define vldrdq_gather_base_z_u64(__addr,  __offset, __p) __arm_vldrdq_gather_base_z_u64(__addr,  __offset, __p)
+ #define vldrdq_gather_offset_s64(__base, __offset) __arm_vldrdq_gather_offset_s64(__base, __offset)
+ #define vldrdq_gather_offset_u64(__base, __offset) __arm_vldrdq_gather_offset_u64(__base, __offset)
+ #define vldrdq_gather_offset_z_s64(__base, __offset, __p) __arm_vldrdq_gather_offset_z_s64(__base, __offset, __p)
+ #define vldrdq_gather_offset_z_u64(__base, __offset, __p) __arm_vldrdq_gather_offset_z_u64(__base, __offset, __p)
+ #define vldrdq_gather_shifted_offset_s64(__base, __offset) __arm_vldrdq_gather_shifted_offset_s64(__base, __offset)
+ #define vldrdq_gather_shifted_offset_u64(__base, __offset) __arm_vldrdq_gather_shifted_offset_u64(__base, __offset)
+ #define vldrdq_gather_shifted_offset_z_s64(__base, __offset, __p) __arm_vldrdq_gather_shifted_offset_z_s64(__base, __offset, __p)
+ #define vldrdq_gather_shifted_offset_z_u64(__base, __offset, __p) __arm_vldrdq_gather_shifted_offset_z_u64(__base, __offset, __p)
+ #define vldrhq_gather_offset_f16(__base, __offset) __arm_vldrhq_gather_offset_f16(__base, __offset)
+ #define vldrhq_gather_offset_z_f16(__base, __offset, __p) __arm_vldrhq_gather_offset_z_f16(__base, __offset, __p)
+ #define vldrhq_gather_shifted_offset_f16(__base, __offset) __arm_vldrhq_gather_shifted_offset_f16(__base, __offset)
+ #define vldrhq_gather_shifted_offset_z_f16(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_f16(__base, __offset, __p)
+ #define vldrwq_gather_base_f32(__addr,  __offset) __arm_vldrwq_gather_base_f32(__addr,  __offset)
+ #define vldrwq_gather_base_z_f32(__addr,  __offset, __p) __arm_vldrwq_gather_base_z_f32(__addr,  __offset, __p)
+ #define vldrwq_gather_offset_f32(__base, __offset) __arm_vldrwq_gather_offset_f32(__base, __offset)
+ #define vldrwq_gather_offset_s32(__base, __offset) __arm_vldrwq_gather_offset_s32(__base, __offset)
+ #define vldrwq_gather_offset_u32(__base, __offset) __arm_vldrwq_gather_offset_u32(__base, __offset)
+ #define vldrwq_gather_offset_z_f32(__base, __offset, __p) __arm_vldrwq_gather_offset_z_f32(__base, __offset, __p)
+ #define vldrwq_gather_offset_z_s32(__base, __offset, __p) __arm_vldrwq_gather_offset_z_s32(__base, __offset, __p)
+ #define vldrwq_gather_offset_z_u32(__base, __offset, __p) __arm_vldrwq_gather_offset_z_u32(__base, __offset, __p)
+ #define vldrwq_gather_shifted_offset_f32(__base, __offset) __arm_vldrwq_gather_shifted_offset_f32(__base, __offset)
+ #define vldrwq_gather_shifted_offset_s32(__base, __offset) __arm_vldrwq_gather_shifted_offset_s32(__base, __offset)
+ #define vldrwq_gather_shifted_offset_u32(__base, __offset) __arm_vldrwq_gather_shifted_offset_u32(__base, __offset)
+ #define vldrwq_gather_shifted_offset_z_f32(__base, __offset, __p) __arm_vldrwq_gather_shifted_offset_z_f32(__base, __offset, __p)
+ #define vldrwq_gather_shifted_offset_z_s32(__base, __offset, __p) __arm_vldrwq_gather_shifted_offset_z_s32(__base, __offset, __p)
+ #define vldrwq_gather_shifted_offset_z_u32(__base, __offset, __p) __arm_vldrwq_gather_shifted_offset_z_u32(__base, __offset, __p)
+ #define vst1q_f32(__addr, __value) __arm_vst1q_f32(__addr, __value)
+ #define vst1q_f16(__addr, __value) __arm_vst1q_f16(__addr, __value)
+ #define vst1q_s8(__addr, __value) __arm_vst1q_s8(__addr, __value)
+ #define vst1q_s32(__addr, __value) __arm_vst1q_s32(__addr, __value)
+ #define vst1q_s16(__addr, __value) __arm_vst1q_s16(__addr, __value)
+ #define vst1q_u8(__addr, __value) __arm_vst1q_u8(__addr, __value)
+ #define vst1q_u32(__addr, __value) __arm_vst1q_u32(__addr, __value)
+ #define vst1q_u16(__addr, __value) __arm_vst1q_u16(__addr, __value)
+ #define vstrhq_f16(__addr, __value) __arm_vstrhq_f16(__addr, __value)
+ #define vstrhq_scatter_offset_s32( __base, __offset, __value) __arm_vstrhq_scatter_offset_s32( __base, __offset, __value)
+ #define vstrhq_scatter_offset_s16( __base, __offset, __value) __arm_vstrhq_scatter_offset_s16( __base, __offset, __value)
+ #define vstrhq_scatter_offset_u32( __base, __offset, __value) __arm_vstrhq_scatter_offset_u32( __base, __offset, __value)
+ #define vstrhq_scatter_offset_u16( __base, __offset, __value) __arm_vstrhq_scatter_offset_u16( __base, __offset, __value)
+ #define vstrhq_scatter_offset_p_s32( __base, __offset, __value, __p) __arm_vstrhq_scatter_offset_p_s32( __base, __offset, __value, __p)
+ #define vstrhq_scatter_offset_p_s16( __base, __offset, __value, __p) __arm_vstrhq_scatter_offset_p_s16( __base, __offset, __value, __p)
+ #define vstrhq_scatter_offset_p_u32( __base, __offset, __value, __p) __arm_vstrhq_scatter_offset_p_u32( __base, __offset, __value, __p)
+ #define vstrhq_scatter_offset_p_u16( __base, __offset, __value, __p) __arm_vstrhq_scatter_offset_p_u16( __base, __offset, __value, __p)
+ #define vstrhq_scatter_shifted_offset_s32( __base, __offset, __value) __arm_vstrhq_scatter_shifted_offset_s32( __base, __offset, __value)
+ #define vstrhq_scatter_shifted_offset_s16( __base, __offset, __value) __arm_vstrhq_scatter_shifted_offset_s16( __base, __offset, __value)
+ #define vstrhq_scatter_shifted_offset_u32( __base, __offset, __value) __arm_vstrhq_scatter_shifted_offset_u32( __base, __offset, __value)
+ #define vstrhq_scatter_shifted_offset_u16( __base, __offset, __value) __arm_vstrhq_scatter_shifted_offset_u16( __base, __offset, __value)
+ #define vstrhq_scatter_shifted_offset_p_s32( __base, __offset, __value, __p) __arm_vstrhq_scatter_shifted_offset_p_s32( __base, __offset, __value, __p)
+ #define vstrhq_scatter_shifted_offset_p_s16( __base, __offset, __value, __p) __arm_vstrhq_scatter_shifted_offset_p_s16( __base, __offset, __value, __p)
+ #define vstrhq_scatter_shifted_offset_p_u32( __base, __offset, __value, __p) __arm_vstrhq_scatter_shifted_offset_p_u32( __base, __offset, __value, __p)
+ #define vstrhq_scatter_shifted_offset_p_u16( __base, __offset, __value, __p) __arm_vstrhq_scatter_shifted_offset_p_u16( __base, __offset, __value, __p)
+ #define vstrhq_s32(__addr, __value) __arm_vstrhq_s32(__addr, __value)
+ #define vstrhq_s16(__addr, __value) __arm_vstrhq_s16(__addr, __value)
+ #define vstrhq_u32(__addr, __value) __arm_vstrhq_u32(__addr, __value)
+ #define vstrhq_u16(__addr, __value) __arm_vstrhq_u16(__addr, __value)
+ #define vstrhq_p_f16(__addr, __value, __p) __arm_vstrhq_p_f16(__addr, __value, __p)
+ #define vstrhq_p_s32(__addr, __value, __p) __arm_vstrhq_p_s32(__addr, __value, __p)
+ #define vstrhq_p_s16(__addr, __value, __p) __arm_vstrhq_p_s16(__addr, __value, __p)
+ #define vstrhq_p_u32(__addr, __value, __p) __arm_vstrhq_p_u32(__addr, __value, __p)
+ #define vstrhq_p_u16(__addr, __value, __p) __arm_vstrhq_p_u16(__addr, __value, __p)
+ #define vstrwq_f32(__addr, __value) __arm_vstrwq_f32(__addr, __value)
+ #define vstrwq_s32(__addr, __value) __arm_vstrwq_s32(__addr, __value)
+ #define vstrwq_u32(__addr, __value) __arm_vstrwq_u32(__addr, __value)
+ #define vstrwq_p_f32(__addr, __value, __p) __arm_vstrwq_p_f32(__addr, __value, __p)
+ #define vstrwq_p_s32(__addr, __value, __p) __arm_vstrwq_p_s32(__addr, __value, __p)
+ #define vstrwq_p_u32(__addr, __value, __p) __arm_vstrwq_p_u32(__addr, __value, __p)
+ #define vstrdq_scatter_base_p_s64(__addr, __offset, __value, __p) __arm_vstrdq_scatter_base_p_s64(__addr, __offset, __value, __p)
+ #define vstrdq_scatter_base_p_u64(__addr, __offset, __value, __p) __arm_vstrdq_scatter_base_p_u64(__addr, __offset, __value, __p)
+ #define vstrdq_scatter_base_s64(__addr, __offset, __value) __arm_vstrdq_scatter_base_s64(__addr, __offset, __value)
+ #define vstrdq_scatter_base_u64(__addr, __offset, __value) __arm_vstrdq_scatter_base_u64(__addr, __offset, __value)
+ #define vstrdq_scatter_offset_p_s64(__base, __offset, __value, __p) __arm_vstrdq_scatter_offset_p_s64(__base, __offset, __value, __p)
+ #define vstrdq_scatter_offset_p_u64(__base, __offset, __value, __p) __arm_vstrdq_scatter_offset_p_u64(__base, __offset, __value, __p)
+ #define vstrdq_scatter_offset_s64(__base, __offset, __value) __arm_vstrdq_scatter_offset_s64(__base, __offset, __value)
+ #define vstrdq_scatter_offset_u64(__base, __offset, __value) __arm_vstrdq_scatter_offset_u64(__base, __offset, __value)
+ #define vstrdq_scatter_shifted_offset_p_s64(__base, __offset, __value, __p) __arm_vstrdq_scatter_shifted_offset_p_s64(__base, __offset, __value, __p)
+ #define vstrdq_scatter_shifted_offset_p_u64(__base, __offset, __value, __p) __arm_vstrdq_scatter_shifted_offset_p_u64(__base, __offset, __value, __p)
+ #define vstrdq_scatter_shifted_offset_s64(__base, __offset, __value) __arm_vstrdq_scatter_shifted_offset_s64(__base, __offset, __value)
+ #define vstrdq_scatter_shifted_offset_u64(__base, __offset, __value) __arm_vstrdq_scatter_shifted_offset_u64(__base, __offset, __value)
+ #define vstrhq_scatter_offset_f16(__base, __offset, __value) __arm_vstrhq_scatter_offset_f16(__base, __offset, __value)
+ #define vstrhq_scatter_offset_p_f16(__base, __offset, __value, __p) __arm_vstrhq_scatter_offset_p_f16(__base, __offset, __value, __p)
+ #define vstrhq_scatter_shifted_offset_f16(__base, __offset, __value) __arm_vstrhq_scatter_shifted_offset_f16(__base, __offset, __value)
+ #define vstrhq_scatter_shifted_offset_p_f16(__base, __offset, __value, __p) __arm_vstrhq_scatter_shifted_offset_p_f16(__base, __offset, __value, __p)
+ #define vstrwq_scatter_base_f32(__addr, __offset, __value) __arm_vstrwq_scatter_base_f32(__addr, __offset, __value)
+ #define vstrwq_scatter_base_p_f32(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_p_f32(__addr, __offset, __value, __p)
+ #define vstrwq_scatter_offset_f32(__base, __offset, __value) __arm_vstrwq_scatter_offset_f32(__base, __offset, __value)
+ #define vstrwq_scatter_offset_p_f32(__base, __offset, __value, __p) __arm_vstrwq_scatter_offset_p_f32(__base, __offset, __value, __p)
+ #define vstrwq_scatter_offset_p_s32(__base, __offset, __value, __p) __arm_vstrwq_scatter_offset_p_s32(__base, __offset, __value, __p)
+ #define vstrwq_scatter_offset_p_u32(__base, __offset, __value, __p) __arm_vstrwq_scatter_offset_p_u32(__base, __offset, __value, __p)
+ #define vstrwq_scatter_offset_s32(__base, __offset, __value) __arm_vstrwq_scatter_offset_s32(__base, __offset, __value)
+ #define vstrwq_scatter_offset_u32(__base, __offset, __value) __arm_vstrwq_scatter_offset_u32(__base, __offset, __value)
+ #define vstrwq_scatter_shifted_offset_f32(__base, __offset, __value) __arm_vstrwq_scatter_shifted_offset_f32(__base, __offset, __value)
+ #define vstrwq_scatter_shifted_offset_p_f32(__base, __offset, __value, __p) __arm_vstrwq_scatter_shifted_offset_p_f32(__base, __offset, __value, __p)
+ #define vstrwq_scatter_shifted_offset_p_s32(__base, __offset, __value, __p) __arm_vstrwq_scatter_shifted_offset_p_s32(__base, __offset, __value, __p)
+ #define vstrwq_scatter_shifted_offset_p_u32(__base, __offset, __value, __p) __arm_vstrwq_scatter_shifted_offset_p_u32(__base, __offset, __value, __p)
+ #define vstrwq_scatter_shifted_offset_s32(__base, __offset, __value) __arm_vstrwq_scatter_shifted_offset_s32(__base, __offset, __value)
+ #define vstrwq_scatter_shifted_offset_u32(__base, __offset, __value) __arm_vstrwq_scatter_shifted_offset_u32(__base, __offset, __value)
+ #define vaddq_s8(__a, __b) __arm_vaddq_s8(__a, __b)
+ #define vaddq_s16(__a, __b) __arm_vaddq_s16(__a, __b)
+ #define vaddq_s32(__a, __b) __arm_vaddq_s32(__a, __b)
+ #define vaddq_u8(__a, __b) __arm_vaddq_u8(__a, __b)
+ #define vaddq_u16(__a, __b) __arm_vaddq_u16(__a, __b)
+ #define vaddq_u32(__a, __b) __arm_vaddq_u32(__a, __b)
+ #define vaddq_f16(__a, __b) __arm_vaddq_f16(__a, __b)
+ #define vaddq_f32(__a, __b) __arm_vaddq_f32(__a, __b)
+ #define vreinterpretq_s16_s32(__a) __arm_vreinterpretq_s16_s32(__a)
+ #define vreinterpretq_s16_s64(__a) __arm_vreinterpretq_s16_s64(__a)
+ #define vreinterpretq_s16_s8(__a) __arm_vreinterpretq_s16_s8(__a)
+ #define vreinterpretq_s16_u16(__a) __arm_vreinterpretq_s16_u16(__a)
+ #define vreinterpretq_s16_u32(__a) __arm_vreinterpretq_s16_u32(__a)
+ #define vreinterpretq_s16_u64(__a) __arm_vreinterpretq_s16_u64(__a)
+ #define vreinterpretq_s16_u8(__a) __arm_vreinterpretq_s16_u8(__a)
+ #define vreinterpretq_s32_s16(__a) __arm_vreinterpretq_s32_s16(__a)
+ #define vreinterpretq_s32_s64(__a) __arm_vreinterpretq_s32_s64(__a)
+ #define vreinterpretq_s32_s8(__a) __arm_vreinterpretq_s32_s8(__a)
+ #define vreinterpretq_s32_u16(__a) __arm_vreinterpretq_s32_u16(__a)
+ #define vreinterpretq_s32_u32(__a) __arm_vreinterpretq_s32_u32(__a)
+ #define vreinterpretq_s32_u64(__a) __arm_vreinterpretq_s32_u64(__a)
+ #define vreinterpretq_s32_u8(__a) __arm_vreinterpretq_s32_u8(__a)
+ #define vreinterpretq_s64_s16(__a) __arm_vreinterpretq_s64_s16(__a)
+ #define vreinterpretq_s64_s32(__a) __arm_vreinterpretq_s64_s32(__a)
+ #define vreinterpretq_s64_s8(__a) __arm_vreinterpretq_s64_s8(__a)
+ #define vreinterpretq_s64_u16(__a) __arm_vreinterpretq_s64_u16(__a)
+ #define vreinterpretq_s64_u32(__a) __arm_vreinterpretq_s64_u32(__a)
+ #define vreinterpretq_s64_u64(__a) __arm_vreinterpretq_s64_u64(__a)
+ #define vreinterpretq_s64_u8(__a) __arm_vreinterpretq_s64_u8(__a)
+ #define vreinterpretq_s8_s16(__a) __arm_vreinterpretq_s8_s16(__a)
+ #define vreinterpretq_s8_s32(__a) __arm_vreinterpretq_s8_s32(__a)
+ #define vreinterpretq_s8_s64(__a) __arm_vreinterpretq_s8_s64(__a)
+ #define vreinterpretq_s8_u16(__a) __arm_vreinterpretq_s8_u16(__a)
+ #define vreinterpretq_s8_u32(__a) __arm_vreinterpretq_s8_u32(__a)
+ #define vreinterpretq_s8_u64(__a) __arm_vreinterpretq_s8_u64(__a)
+ #define vreinterpretq_s8_u8(__a) __arm_vreinterpretq_s8_u8(__a)
+ #define vreinterpretq_u16_s16(__a) __arm_vreinterpretq_u16_s16(__a)
+ #define vreinterpretq_u16_s32(__a) __arm_vreinterpretq_u16_s32(__a)
+ #define vreinterpretq_u16_s64(__a) __arm_vreinterpretq_u16_s64(__a)
+ #define vreinterpretq_u16_s8(__a) __arm_vreinterpretq_u16_s8(__a)
+ #define vreinterpretq_u16_u32(__a) __arm_vreinterpretq_u16_u32(__a)
+ #define vreinterpretq_u16_u64(__a) __arm_vreinterpretq_u16_u64(__a)
+ #define vreinterpretq_u16_u8(__a) __arm_vreinterpretq_u16_u8(__a)
+ #define vreinterpretq_u32_s16(__a) __arm_vreinterpretq_u32_s16(__a)
+ #define vreinterpretq_u32_s32(__a) __arm_vreinterpretq_u32_s32(__a)
+ #define vreinterpretq_u32_s64(__a) __arm_vreinterpretq_u32_s64(__a)
+ #define vreinterpretq_u32_s8(__a) __arm_vreinterpretq_u32_s8(__a)
+ #define vreinterpretq_u32_u16(__a) __arm_vreinterpretq_u32_u16(__a)
+ #define vreinterpretq_u32_u64(__a) __arm_vreinterpretq_u32_u64(__a)
+ #define vreinterpretq_u32_u8(__a) __arm_vreinterpretq_u32_u8(__a)
+ #define vreinterpretq_u64_s16(__a) __arm_vreinterpretq_u64_s16(__a)
+ #define vreinterpretq_u64_s32(__a) __arm_vreinterpretq_u64_s32(__a)
+ #define vreinterpretq_u64_s64(__a) __arm_vreinterpretq_u64_s64(__a)
+ #define vreinterpretq_u64_s8(__a) __arm_vreinterpretq_u64_s8(__a)
+ #define vreinterpretq_u64_u16(__a) __arm_vreinterpretq_u64_u16(__a)
+ #define vreinterpretq_u64_u32(__a) __arm_vreinterpretq_u64_u32(__a)
+ #define vreinterpretq_u64_u8(__a) __arm_vreinterpretq_u64_u8(__a)
+ #define vreinterpretq_u8_s16(__a) __arm_vreinterpretq_u8_s16(__a)
+ #define vreinterpretq_u8_s32(__a) __arm_vreinterpretq_u8_s32(__a)
+ #define vreinterpretq_u8_s64(__a) __arm_vreinterpretq_u8_s64(__a)
+ #define vreinterpretq_u8_s8(__a) __arm_vreinterpretq_u8_s8(__a)
+ #define vreinterpretq_u8_u16(__a) __arm_vreinterpretq_u8_u16(__a)
+ #define vreinterpretq_u8_u32(__a) __arm_vreinterpretq_u8_u32(__a)
+ #define vreinterpretq_u8_u64(__a) __arm_vreinterpretq_u8_u64(__a)
+ #define vreinterpretq_s32_f16(__a) __arm_vreinterpretq_s32_f16(__a)
+ #define vreinterpretq_s32_f32(__a) __arm_vreinterpretq_s32_f32(__a)
+ #define vreinterpretq_u16_f16(__a) __arm_vreinterpretq_u16_f16(__a)
+ #define vreinterpretq_u16_f32(__a) __arm_vreinterpretq_u16_f32(__a)
+ #define vreinterpretq_u32_f16(__a) __arm_vreinterpretq_u32_f16(__a)
+ #define vreinterpretq_u32_f32(__a) __arm_vreinterpretq_u32_f32(__a)
+ #define vreinterpretq_u64_f16(__a) __arm_vreinterpretq_u64_f16(__a)
+ #define vreinterpretq_u64_f32(__a) __arm_vreinterpretq_u64_f32(__a)
+ #define vreinterpretq_u8_f16(__a) __arm_vreinterpretq_u8_f16(__a)
+ #define vreinterpretq_u8_f32(__a) __arm_vreinterpretq_u8_f32(__a)
+ #define vreinterpretq_f16_f32(__a) __arm_vreinterpretq_f16_f32(__a)
+ #define vreinterpretq_f16_s16(__a) __arm_vreinterpretq_f16_s16(__a)
+ #define vreinterpretq_f16_s32(__a) __arm_vreinterpretq_f16_s32(__a)
+ #define vreinterpretq_f16_s64(__a) __arm_vreinterpretq_f16_s64(__a)
+ #define vreinterpretq_f16_s8(__a) __arm_vreinterpretq_f16_s8(__a)
+ #define vreinterpretq_f16_u16(__a) __arm_vreinterpretq_f16_u16(__a)
+ #define vreinterpretq_f16_u32(__a) __arm_vreinterpretq_f16_u32(__a)
+ #define vreinterpretq_f16_u64(__a) __arm_vreinterpretq_f16_u64(__a)
+ #define vreinterpretq_f16_u8(__a) __arm_vreinterpretq_f16_u8(__a)
+ #define vreinterpretq_f32_f16(__a) __arm_vreinterpretq_f32_f16(__a)
+ #define vreinterpretq_f32_s16(__a) __arm_vreinterpretq_f32_s16(__a)
+ #define vreinterpretq_f32_s32(__a) __arm_vreinterpretq_f32_s32(__a)
+ #define vreinterpretq_f32_s64(__a) __arm_vreinterpretq_f32_s64(__a)
+ #define vreinterpretq_f32_s8(__a) __arm_vreinterpretq_f32_s8(__a)
+ #define vreinterpretq_f32_u16(__a) __arm_vreinterpretq_f32_u16(__a)
+ #define vreinterpretq_f32_u32(__a) __arm_vreinterpretq_f32_u32(__a)
+ #define vreinterpretq_f32_u64(__a) __arm_vreinterpretq_f32_u64(__a)
+ #define vreinterpretq_f32_u8(__a) __arm_vreinterpretq_f32_u8(__a)
+ #define vreinterpretq_s16_f16(__a) __arm_vreinterpretq_s16_f16(__a)
+ #define vreinterpretq_s16_f32(__a) __arm_vreinterpretq_s16_f32(__a)
+ #define vreinterpretq_s64_f16(__a) __arm_vreinterpretq_s64_f16(__a)
+ #define vreinterpretq_s64_f32(__a) __arm_vreinterpretq_s64_f32(__a)
+ #define vreinterpretq_s8_f16(__a) __arm_vreinterpretq_s8_f16(__a)
+ #define vreinterpretq_s8_f32(__a) __arm_vreinterpretq_s8_f32(__a)
+ #define vuninitializedq_u8(void) __arm_vuninitializedq_u8(void)
+ #define vuninitializedq_u16(void) __arm_vuninitializedq_u16(void)
+ #define vuninitializedq_u32(void) __arm_vuninitializedq_u32(void)
+ #define vuninitializedq_u64(void) __arm_vuninitializedq_u64(void)
+ #define vuninitializedq_s8(void) __arm_vuninitializedq_s8(void)
+ #define vuninitializedq_s16(void) __arm_vuninitializedq_s16(void)
+ #define vuninitializedq_s32(void) __arm_vuninitializedq_s32(void)
+ #define vuninitializedq_s64(void) __arm_vuninitializedq_s64(void)
+ #define vuninitializedq_f16(void) __arm_vuninitializedq_f16(void)
+ #define vuninitializedq_f32(void) __arm_vuninitializedq_f32(void)
+ #define vddupq_m_n_u8(__inactive, __a,  __imm, __p) __arm_vddupq_m_n_u8(__inactive, __a,  __imm, __p)
+ #define vddupq_m_n_u32(__inactive, __a,  __imm, __p) __arm_vddupq_m_n_u32(__inactive, __a,  __imm, __p)
+ #define vddupq_m_n_u16(__inactive, __a,  __imm, __p) __arm_vddupq_m_n_u16(__inactive, __a,  __imm, __p)
+ #define vddupq_m_wb_u8(__inactive,  __a,  __imm, __p) __arm_vddupq_m_wb_u8(__inactive,  __a,  __imm, __p)
+ #define vddupq_m_wb_u16(__inactive,  __a,  __imm, __p) __arm_vddupq_m_wb_u16(__inactive,  __a,  __imm, __p)
+ #define vddupq_m_wb_u32(__inactive,  __a,  __imm, __p) __arm_vddupq_m_wb_u32(__inactive,  __a,  __imm, __p)
+ #define vddupq_n_u8(__a,  __imm) __arm_vddupq_n_u8(__a,  __imm)
+ #define vddupq_n_u32(__a,  __imm) __arm_vddupq_n_u32(__a,  __imm)
+ #define vddupq_n_u16(__a,  __imm) __arm_vddupq_n_u16(__a,  __imm)
+ #define vddupq_wb_u8( __a,  __imm) __arm_vddupq_wb_u8( __a,  __imm)
+ #define vddupq_wb_u16( __a,  __imm) __arm_vddupq_wb_u16( __a,  __imm)
+ #define vddupq_wb_u32( __a,  __imm) __arm_vddupq_wb_u32( __a,  __imm)
+ #define vdwdupq_m_n_u8(__inactive, __a, __b,  __imm, __p) __arm_vdwdupq_m_n_u8(__inactive, __a, __b,  __imm, __p)
+ #define vdwdupq_m_n_u32(__inactive, __a, __b,  __imm, __p) __arm_vdwdupq_m_n_u32(__inactive, __a, __b,  __imm, __p)
+ #define vdwdupq_m_n_u16(__inactive, __a, __b,  __imm, __p) __arm_vdwdupq_m_n_u16(__inactive, __a, __b,  __imm, __p)
+ #define vdwdupq_m_wb_u8(__inactive,  __a, __b,  __imm, __p) __arm_vdwdupq_m_wb_u8(__inactive,  __a, __b,  __imm, __p)
+ #define vdwdupq_m_wb_u32(__inactive,  __a, __b,  __imm, __p) __arm_vdwdupq_m_wb_u32(__inactive,  __a, __b,  __imm, __p)
+ #define vdwdupq_m_wb_u16(__inactive,  __a, __b,  __imm, __p) __arm_vdwdupq_m_wb_u16(__inactive,  __a, __b,  __imm, __p)
+ #define vdwdupq_n_u8(__a, __b,  __imm) __arm_vdwdupq_n_u8(__a, __b,  __imm)
+ #define vdwdupq_n_u32(__a, __b,  __imm) __arm_vdwdupq_n_u32(__a, __b,  __imm)
+ #define vdwdupq_n_u16(__a, __b,  __imm) __arm_vdwdupq_n_u16(__a, __b,  __imm)
+ #define vdwdupq_wb_u8( __a, __b,  __imm) __arm_vdwdupq_wb_u8( __a, __b,  __imm)
+ #define vdwdupq_wb_u32( __a, __b,  __imm) __arm_vdwdupq_wb_u32( __a, __b,  __imm)
+ #define vdwdupq_wb_u16( __a, __b,  __imm) __arm_vdwdupq_wb_u16( __a, __b,  __imm)
+ #define vidupq_m_n_u8(__inactive, __a,  __imm, __p) __arm_vidupq_m_n_u8(__inactive, __a,  __imm, __p)
+ #define vidupq_m_n_u32(__inactive, __a,  __imm, __p) __arm_vidupq_m_n_u32(__inactive, __a,  __imm, __p)
+ #define vidupq_m_n_u16(__inactive, __a,  __imm, __p) __arm_vidupq_m_n_u16(__inactive, __a,  __imm, __p)
+ #define vidupq_m_wb_u8(__inactive,  __a,  __imm, __p) __arm_vidupq_m_wb_u8(__inactive,  __a,  __imm, __p)
+ #define vidupq_m_wb_u16(__inactive,  __a,  __imm, __p) __arm_vidupq_m_wb_u16(__inactive,  __a,  __imm, __p)
+ #define vidupq_m_wb_u32(__inactive,  __a,  __imm, __p) __arm_vidupq_m_wb_u32(__inactive,  __a,  __imm, __p)
+ #define vidupq_n_u8(__a,  __imm) __arm_vidupq_n_u8(__a,  __imm)
+ #define vidupq_n_u32(__a,  __imm) __arm_vidupq_n_u32(__a,  __imm)
+ #define vidupq_n_u16(__a,  __imm) __arm_vidupq_n_u16(__a,  __imm)
+ #define vidupq_wb_u8( __a,  __imm) __arm_vidupq_wb_u8( __a,  __imm)
+ #define vidupq_wb_u16( __a,  __imm) __arm_vidupq_wb_u16( __a,  __imm)
+ #define vidupq_wb_u32( __a,  __imm) __arm_vidupq_wb_u32( __a,  __imm)
+ #define viwdupq_m_n_u8(__inactive, __a, __b,  __imm, __p) __arm_viwdupq_m_n_u8(__inactive, __a, __b,  __imm, __p)
+ #define viwdupq_m_n_u32(__inactive, __a, __b,  __imm, __p) __arm_viwdupq_m_n_u32(__inactive, __a, __b,  __imm, __p)
+ #define viwdupq_m_n_u16(__inactive, __a, __b,  __imm, __p) __arm_viwdupq_m_n_u16(__inactive, __a, __b,  __imm, __p)
+ #define viwdupq_m_wb_u8(__inactive,  __a, __b,  __imm, __p) __arm_viwdupq_m_wb_u8(__inactive,  __a, __b,  __imm, __p)
+ #define viwdupq_m_wb_u32(__inactive,  __a, __b,  __imm, __p) __arm_viwdupq_m_wb_u32(__inactive,  __a, __b,  __imm, __p)
+ #define viwdupq_m_wb_u16(__inactive,  __a, __b,  __imm, __p) __arm_viwdupq_m_wb_u16(__inactive,  __a, __b,  __imm, __p)
+ #define viwdupq_n_u8(__a, __b,  __imm) __arm_viwdupq_n_u8(__a, __b,  __imm)
+ #define viwdupq_n_u32(__a, __b,  __imm) __arm_viwdupq_n_u32(__a, __b,  __imm)
+ #define viwdupq_n_u16(__a, __b,  __imm) __arm_viwdupq_n_u16(__a, __b,  __imm)
+ #define viwdupq_wb_u8( __a, __b,  __imm) __arm_viwdupq_wb_u8( __a, __b,  __imm)
+ #define viwdupq_wb_u32( __a, __b,  __imm) __arm_viwdupq_wb_u32( __a, __b,  __imm)
+ #define viwdupq_wb_u16( __a, __b,  __imm) __arm_viwdupq_wb_u16( __a, __b,  __imm)
+ #define vldrdq_gather_base_wb_s64(__addr, __offset) __arm_vldrdq_gather_base_wb_s64(__addr, __offset)
+ #define vldrdq_gather_base_wb_u64(__addr, __offset) __arm_vldrdq_gather_base_wb_u64(__addr, __offset)
+ #define vldrdq_gather_base_wb_z_s64(__addr, __offset, __p) __arm_vldrdq_gather_base_wb_z_s64(__addr, __offset, __p)
+ #define vldrdq_gather_base_wb_z_u64(__addr, __offset, __p) __arm_vldrdq_gather_base_wb_z_u64(__addr, __offset, __p)
+ #define vldrwq_gather_base_wb_f32(__addr, __offset) __arm_vldrwq_gather_base_wb_f32(__addr, __offset)
+ #define vldrwq_gather_base_wb_s32(__addr, __offset) __arm_vldrwq_gather_base_wb_s32(__addr, __offset)
+ #define vldrwq_gather_base_wb_u32(__addr, __offset) __arm_vldrwq_gather_base_wb_u32(__addr, __offset)
+ #define vldrwq_gather_base_wb_z_f32(__addr, __offset, __p) __arm_vldrwq_gather_base_wb_z_f32(__addr, __offset, __p)
+ #define vldrwq_gather_base_wb_z_s32(__addr, __offset, __p) __arm_vldrwq_gather_base_wb_z_s32(__addr, __offset, __p)
+ #define vldrwq_gather_base_wb_z_u32(__addr, __offset, __p) __arm_vldrwq_gather_base_wb_z_u32(__addr, __offset, __p)
+ #define vstrdq_scatter_base_wb_p_s64(__addr, __offset, __value, __p) __arm_vstrdq_scatter_base_wb_p_s64(__addr, __offset, __value, __p)
+ #define vstrdq_scatter_base_wb_p_u64(__addr, __offset, __value, __p) __arm_vstrdq_scatter_base_wb_p_u64(__addr, __offset, __value, __p)
+ #define vstrdq_scatter_base_wb_s64(__addr, __offset, __value) __arm_vstrdq_scatter_base_wb_s64(__addr, __offset, __value)
+ #define vstrdq_scatter_base_wb_u64(__addr, __offset, __value) __arm_vstrdq_scatter_base_wb_u64(__addr, __offset, __value)
+ #define vstrwq_scatter_base_wb_p_s32(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_wb_p_s32(__addr, __offset, __value, __p)
+ #define vstrwq_scatter_base_wb_p_f32(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_wb_p_f32(__addr, __offset, __value, __p)
+ #define vstrwq_scatter_base_wb_p_u32(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_wb_p_u32(__addr, __offset, __value, __p)
+ #define vstrwq_scatter_base_wb_s32(__addr, __offset, __value) __arm_vstrwq_scatter_base_wb_s32(__addr, __offset, __value)
+ #define vstrwq_scatter_base_wb_u32(__addr, __offset, __value) __arm_vstrwq_scatter_base_wb_u32(__addr, __offset, __value)
+ #define vstrwq_scatter_base_wb_f32(__addr, __offset, __value) __arm_vstrwq_scatter_base_wb_f32(__addr, __offset, __value)
+ #define vddupq_x_n_u8(__a,  __imm, __p) __arm_vddupq_x_n_u8(__a,  __imm, __p)
+ #define vddupq_x_n_u16(__a,  __imm, __p) __arm_vddupq_x_n_u16(__a,  __imm, __p)
+ #define vddupq_x_n_u32(__a,  __imm, __p) __arm_vddupq_x_n_u32(__a,  __imm, __p)
+ #define vddupq_x_wb_u8(__a,  __imm, __p) __arm_vddupq_x_wb_u8(__a,  __imm, __p)
+ #define vddupq_x_wb_u16(__a,  __imm, __p) __arm_vddupq_x_wb_u16(__a,  __imm, __p)
+ #define vddupq_x_wb_u32(__a,  __imm, __p) __arm_vddupq_x_wb_u32(__a,  __imm, __p)
+ #define vdwdupq_x_n_u8(__a, __b,  __imm, __p) __arm_vdwdupq_x_n_u8(__a, __b,  __imm, __p)
+ #define vdwdupq_x_n_u16(__a, __b,  __imm, __p) __arm_vdwdupq_x_n_u16(__a, __b,  __imm, __p)
+ #define vdwdupq_x_n_u32(__a, __b,  __imm, __p) __arm_vdwdupq_x_n_u32(__a, __b,  __imm, __p)
+ #define vdwdupq_x_wb_u8(__a, __b,  __imm, __p) __arm_vdwdupq_x_wb_u8(__a, __b,  __imm, __p)
+ #define vdwdupq_x_wb_u16(__a, __b,  __imm, __p) __arm_vdwdupq_x_wb_u16(__a, __b,  __imm, __p)
+ #define vdwdupq_x_wb_u32(__a, __b,  __imm, __p) __arm_vdwdupq_x_wb_u32(__a, __b,  __imm, __p)
+ #define vidupq_x_n_u8(__a,  __imm, __p) __arm_vidupq_x_n_u8(__a,  __imm, __p)
+ #define vidupq_x_n_u16(__a,  __imm, __p) __arm_vidupq_x_n_u16(__a,  __imm, __p)
+ #define vidupq_x_n_u32(__a,  __imm, __p) __arm_vidupq_x_n_u32(__a,  __imm, __p)
+ #define vidupq_x_wb_u8(__a,  __imm, __p) __arm_vidupq_x_wb_u8(__a,  __imm, __p)
+ #define vidupq_x_wb_u16(__a,  __imm, __p) __arm_vidupq_x_wb_u16(__a,  __imm, __p)
+ #define vidupq_x_wb_u32(__a,  __imm, __p) __arm_vidupq_x_wb_u32(__a,  __imm, __p)
+ #define viwdupq_x_n_u8(__a, __b,  __imm, __p) __arm_viwdupq_x_n_u8(__a, __b,  __imm, __p)
+ #define viwdupq_x_n_u16(__a, __b,  __imm, __p) __arm_viwdupq_x_n_u16(__a, __b,  __imm, __p)
+ #define viwdupq_x_n_u32(__a, __b,  __imm, __p) __arm_viwdupq_x_n_u32(__a, __b,  __imm, __p)
+ #define viwdupq_x_wb_u8(__a, __b,  __imm, __p) __arm_viwdupq_x_wb_u8(__a, __b,  __imm, __p)
+ #define viwdupq_x_wb_u16(__a, __b,  __imm, __p) __arm_viwdupq_x_wb_u16(__a, __b,  __imm, __p)
+ #define viwdupq_x_wb_u32(__a, __b,  __imm, __p) __arm_viwdupq_x_wb_u32(__a, __b,  __imm, __p)
+ #define vdupq_x_n_s8(__a, __p) __arm_vdupq_x_n_s8(__a, __p)
+ #define vdupq_x_n_s16(__a, __p) __arm_vdupq_x_n_s16(__a, __p)
+ #define vdupq_x_n_s32(__a, __p) __arm_vdupq_x_n_s32(__a, __p)
+ #define vdupq_x_n_u8(__a, __p) __arm_vdupq_x_n_u8(__a, __p)
+ #define vdupq_x_n_u16(__a, __p) __arm_vdupq_x_n_u16(__a, __p)
+ #define vdupq_x_n_u32(__a, __p) __arm_vdupq_x_n_u32(__a, __p)
+ #define vminq_x_s8(__a, __b, __p) __arm_vminq_x_s8(__a, __b, __p)
+ #define vminq_x_s16(__a, __b, __p) __arm_vminq_x_s16(__a, __b, __p)
+ #define vminq_x_s32(__a, __b, __p) __arm_vminq_x_s32(__a, __b, __p)
+ #define vminq_x_u8(__a, __b, __p) __arm_vminq_x_u8(__a, __b, __p)
+ #define vminq_x_u16(__a, __b, __p) __arm_vminq_x_u16(__a, __b, __p)
+ #define vminq_x_u32(__a, __b, __p) __arm_vminq_x_u32(__a, __b, __p)
+ #define vmaxq_x_s8(__a, __b, __p) __arm_vmaxq_x_s8(__a, __b, __p)
+ #define vmaxq_x_s16(__a, __b, __p) __arm_vmaxq_x_s16(__a, __b, __p)
+ #define vmaxq_x_s32(__a, __b, __p) __arm_vmaxq_x_s32(__a, __b, __p)
+ #define vmaxq_x_u8(__a, __b, __p) __arm_vmaxq_x_u8(__a, __b, __p)
+ #define vmaxq_x_u16(__a, __b, __p) __arm_vmaxq_x_u16(__a, __b, __p)
+ #define vmaxq_x_u32(__a, __b, __p) __arm_vmaxq_x_u32(__a, __b, __p)
+ #define vabdq_x_s8(__a, __b, __p) __arm_vabdq_x_s8(__a, __b, __p)
+ #define vabdq_x_s16(__a, __b, __p) __arm_vabdq_x_s16(__a, __b, __p)
+ #define vabdq_x_s32(__a, __b, __p) __arm_vabdq_x_s32(__a, __b, __p)
+ #define vabdq_x_u8(__a, __b, __p) __arm_vabdq_x_u8(__a, __b, __p)
+ #define vabdq_x_u16(__a, __b, __p) __arm_vabdq_x_u16(__a, __b, __p)
+ #define vabdq_x_u32(__a, __b, __p) __arm_vabdq_x_u32(__a, __b, __p)
+ #define vabsq_x_s8(__a, __p) __arm_vabsq_x_s8(__a, __p)
+ #define vabsq_x_s16(__a, __p) __arm_vabsq_x_s16(__a, __p)
+ #define vabsq_x_s32(__a, __p) __arm_vabsq_x_s32(__a, __p)
+ #define vaddq_x_s8(__a, __b, __p) __arm_vaddq_x_s8(__a, __b, __p)
+ #define vaddq_x_s16(__a, __b, __p) __arm_vaddq_x_s16(__a, __b, __p)
+ #define vaddq_x_s32(__a, __b, __p) __arm_vaddq_x_s32(__a, __b, __p)
+ #define vaddq_x_n_s8(__a, __b, __p) __arm_vaddq_x_n_s8(__a, __b, __p)
+ #define vaddq_x_n_s16(__a, __b, __p) __arm_vaddq_x_n_s16(__a, __b, __p)
+ #define vaddq_x_n_s32(__a, __b, __p) __arm_vaddq_x_n_s32(__a, __b, __p)
+ #define vaddq_x_u8(__a, __b, __p) __arm_vaddq_x_u8(__a, __b, __p)
+ #define vaddq_x_u16(__a, __b, __p) __arm_vaddq_x_u16(__a, __b, __p)
+ #define vaddq_x_u32(__a, __b, __p) __arm_vaddq_x_u32(__a, __b, __p)
+ #define vaddq_x_n_u8(__a, __b, __p) __arm_vaddq_x_n_u8(__a, __b, __p)
+ #define vaddq_x_n_u16(__a, __b, __p) __arm_vaddq_x_n_u16(__a, __b, __p)
+ #define vaddq_x_n_u32(__a, __b, __p) __arm_vaddq_x_n_u32(__a, __b, __p)
+ #define vclsq_x_s8(__a, __p) __arm_vclsq_x_s8(__a, __p)
+ #define vclsq_x_s16(__a, __p) __arm_vclsq_x_s16(__a, __p)
+ #define vclsq_x_s32(__a, __p) __arm_vclsq_x_s32(__a, __p)
+ #define vclzq_x_s8(__a, __p) __arm_vclzq_x_s8(__a, __p)
+ #define vclzq_x_s16(__a, __p) __arm_vclzq_x_s16(__a, __p)
+ #define vclzq_x_s32(__a, __p) __arm_vclzq_x_s32(__a, __p)
+ #define vclzq_x_u8(__a, __p) __arm_vclzq_x_u8(__a, __p)
+ #define vclzq_x_u16(__a, __p) __arm_vclzq_x_u16(__a, __p)
+ #define vclzq_x_u32(__a, __p) __arm_vclzq_x_u32(__a, __p)
+ #define vnegq_x_s8(__a, __p) __arm_vnegq_x_s8(__a, __p)
+ #define vnegq_x_s16(__a, __p) __arm_vnegq_x_s16(__a, __p)
+ #define vnegq_x_s32(__a, __p) __arm_vnegq_x_s32(__a, __p)
+ #define vmulhq_x_s8(__a, __b, __p) __arm_vmulhq_x_s8(__a, __b, __p)
+ #define vmulhq_x_s16(__a, __b, __p) __arm_vmulhq_x_s16(__a, __b, __p)
+ #define vmulhq_x_s32(__a, __b, __p) __arm_vmulhq_x_s32(__a, __b, __p)
+ #define vmulhq_x_u8(__a, __b, __p) __arm_vmulhq_x_u8(__a, __b, __p)
+ #define vmulhq_x_u16(__a, __b, __p) __arm_vmulhq_x_u16(__a, __b, __p)
+ #define vmulhq_x_u32(__a, __b, __p) __arm_vmulhq_x_u32(__a, __b, __p)
+ #define vmullbq_poly_x_p8(__a, __b, __p) __arm_vmullbq_poly_x_p8(__a, __b, __p)
+ #define vmullbq_poly_x_p16(__a, __b, __p) __arm_vmullbq_poly_x_p16(__a, __b, __p)
+ #define vmullbq_int_x_s8(__a, __b, __p) __arm_vmullbq_int_x_s8(__a, __b, __p)
+ #define vmullbq_int_x_s16(__a, __b, __p) __arm_vmullbq_int_x_s16(__a, __b, __p)
+ #define vmullbq_int_x_s32(__a, __b, __p) __arm_vmullbq_int_x_s32(__a, __b, __p)
+ #define vmullbq_int_x_u8(__a, __b, __p) __arm_vmullbq_int_x_u8(__a, __b, __p)
+ #define vmullbq_int_x_u16(__a, __b, __p) __arm_vmullbq_int_x_u16(__a, __b, __p)
+ #define vmullbq_int_x_u32(__a, __b, __p) __arm_vmullbq_int_x_u32(__a, __b, __p)
+ #define vmulltq_poly_x_p8(__a, __b, __p) __arm_vmulltq_poly_x_p8(__a, __b, __p)
+ #define vmulltq_poly_x_p16(__a, __b, __p) __arm_vmulltq_poly_x_p16(__a, __b, __p)
+ #define vmulltq_int_x_s8(__a, __b, __p) __arm_vmulltq_int_x_s8(__a, __b, __p)
+ #define vmulltq_int_x_s16(__a, __b, __p) __arm_vmulltq_int_x_s16(__a, __b, __p)
+ #define vmulltq_int_x_s32(__a, __b, __p) __arm_vmulltq_int_x_s32(__a, __b, __p)
+ #define vmulltq_int_x_u8(__a, __b, __p) __arm_vmulltq_int_x_u8(__a, __b, __p)
+ #define vmulltq_int_x_u16(__a, __b, __p) __arm_vmulltq_int_x_u16(__a, __b, __p)
+ #define vmulltq_int_x_u32(__a, __b, __p) __arm_vmulltq_int_x_u32(__a, __b, __p)
+ #define vmulq_x_s8(__a, __b, __p) __arm_vmulq_x_s8(__a, __b, __p)
+ #define vmulq_x_s16(__a, __b, __p) __arm_vmulq_x_s16(__a, __b, __p)
+ #define vmulq_x_s32(__a, __b, __p) __arm_vmulq_x_s32(__a, __b, __p)
+ #define vmulq_x_n_s8(__a, __b, __p) __arm_vmulq_x_n_s8(__a, __b, __p)
+ #define vmulq_x_n_s16(__a, __b, __p) __arm_vmulq_x_n_s16(__a, __b, __p)
+ #define vmulq_x_n_s32(__a, __b, __p) __arm_vmulq_x_n_s32(__a, __b, __p)
+ #define vmulq_x_u8(__a, __b, __p) __arm_vmulq_x_u8(__a, __b, __p)
+ #define vmulq_x_u16(__a, __b, __p) __arm_vmulq_x_u16(__a, __b, __p)
+ #define vmulq_x_u32(__a, __b, __p) __arm_vmulq_x_u32(__a, __b, __p)
+ #define vmulq_x_n_u8(__a, __b, __p) __arm_vmulq_x_n_u8(__a, __b, __p)
+ #define vmulq_x_n_u16(__a, __b, __p) __arm_vmulq_x_n_u16(__a, __b, __p)
+ #define vmulq_x_n_u32(__a, __b, __p) __arm_vmulq_x_n_u32(__a, __b, __p)
+ #define vsubq_x_s8(__a, __b, __p) __arm_vsubq_x_s8(__a, __b, __p)
+ #define vsubq_x_s16(__a, __b, __p) __arm_vsubq_x_s16(__a, __b, __p)
+ #define vsubq_x_s32(__a, __b, __p) __arm_vsubq_x_s32(__a, __b, __p)
+ #define vsubq_x_n_s8(__a, __b, __p) __arm_vsubq_x_n_s8(__a, __b, __p)
+ #define vsubq_x_n_s16(__a, __b, __p) __arm_vsubq_x_n_s16(__a, __b, __p)
+ #define vsubq_x_n_s32(__a, __b, __p) __arm_vsubq_x_n_s32(__a, __b, __p)
+ #define vsubq_x_u8(__a, __b, __p) __arm_vsubq_x_u8(__a, __b, __p)
+ #define vsubq_x_u16(__a, __b, __p) __arm_vsubq_x_u16(__a, __b, __p)
+ #define vsubq_x_u32(__a, __b, __p) __arm_vsubq_x_u32(__a, __b, __p)
+ #define vsubq_x_n_u8(__a, __b, __p) __arm_vsubq_x_n_u8(__a, __b, __p)
+ #define vsubq_x_n_u16(__a, __b, __p) __arm_vsubq_x_n_u16(__a, __b, __p)
+ #define vsubq_x_n_u32(__a, __b, __p) __arm_vsubq_x_n_u32(__a, __b, __p)
+ #define vcaddq_rot90_x_s8(__a, __b, __p) __arm_vcaddq_rot90_x_s8(__a, __b, __p)
+ #define vcaddq_rot90_x_s16(__a, __b, __p) __arm_vcaddq_rot90_x_s16(__a, __b, __p)
+ #define vcaddq_rot90_x_s32(__a, __b, __p) __arm_vcaddq_rot90_x_s32(__a, __b, __p)
+ #define vcaddq_rot90_x_u8(__a, __b, __p) __arm_vcaddq_rot90_x_u8(__a, __b, __p)
+ #define vcaddq_rot90_x_u16(__a, __b, __p) __arm_vcaddq_rot90_x_u16(__a, __b, __p)
+ #define vcaddq_rot90_x_u32(__a, __b, __p) __arm_vcaddq_rot90_x_u32(__a, __b, __p)
+ #define vcaddq_rot270_x_s8(__a, __b, __p) __arm_vcaddq_rot270_x_s8(__a, __b, __p)
+ #define vcaddq_rot270_x_s16(__a, __b, __p) __arm_vcaddq_rot270_x_s16(__a, __b, __p)
+ #define vcaddq_rot270_x_s32(__a, __b, __p) __arm_vcaddq_rot270_x_s32(__a, __b, __p)
+ #define vcaddq_rot270_x_u8(__a, __b, __p) __arm_vcaddq_rot270_x_u8(__a, __b, __p)
+ #define vcaddq_rot270_x_u16(__a, __b, __p) __arm_vcaddq_rot270_x_u16(__a, __b, __p)
+ #define vcaddq_rot270_x_u32(__a, __b, __p) __arm_vcaddq_rot270_x_u32(__a, __b, __p)
+ #define vhaddq_x_n_s8(__a, __b, __p) __arm_vhaddq_x_n_s8(__a, __b, __p)
+ #define vhaddq_x_n_s16(__a, __b, __p) __arm_vhaddq_x_n_s16(__a, __b, __p)
+ #define vhaddq_x_n_s32(__a, __b, __p) __arm_vhaddq_x_n_s32(__a, __b, __p)
+ #define vhaddq_x_n_u8(__a, __b, __p) __arm_vhaddq_x_n_u8(__a, __b, __p)
+ #define vhaddq_x_n_u16(__a, __b, __p) __arm_vhaddq_x_n_u16(__a, __b, __p)
+ #define vhaddq_x_n_u32(__a, __b, __p) __arm_vhaddq_x_n_u32(__a, __b, __p)
+ #define vhaddq_x_s8(__a, __b, __p) __arm_vhaddq_x_s8(__a, __b, __p)
+ #define vhaddq_x_s16(__a, __b, __p) __arm_vhaddq_x_s16(__a, __b, __p)
+ #define vhaddq_x_s32(__a, __b, __p) __arm_vhaddq_x_s32(__a, __b, __p)
+ #define vhaddq_x_u8(__a, __b, __p) __arm_vhaddq_x_u8(__a, __b, __p)
+ #define vhaddq_x_u16(__a, __b, __p) __arm_vhaddq_x_u16(__a, __b, __p)
+ #define vhaddq_x_u32(__a, __b, __p) __arm_vhaddq_x_u32(__a, __b, __p)
+ #define vhcaddq_rot90_x_s8(__a, __b, __p) __arm_vhcaddq_rot90_x_s8(__a, __b, __p)
+ #define vhcaddq_rot90_x_s16(__a, __b, __p) __arm_vhcaddq_rot90_x_s16(__a, __b, __p)
+ #define vhcaddq_rot90_x_s32(__a, __b, __p) __arm_vhcaddq_rot90_x_s32(__a, __b, __p)
+ #define vhcaddq_rot270_x_s8(__a, __b, __p) __arm_vhcaddq_rot270_x_s8(__a, __b, __p)
+ #define vhcaddq_rot270_x_s16(__a, __b, __p) __arm_vhcaddq_rot270_x_s16(__a, __b, __p)
+ #define vhcaddq_rot270_x_s32(__a, __b, __p) __arm_vhcaddq_rot270_x_s32(__a, __b, __p)
+ #define vhsubq_x_n_s8(__a, __b, __p) __arm_vhsubq_x_n_s8(__a, __b, __p)
+ #define vhsubq_x_n_s16(__a, __b, __p) __arm_vhsubq_x_n_s16(__a, __b, __p)
+ #define vhsubq_x_n_s32(__a, __b, __p) __arm_vhsubq_x_n_s32(__a, __b, __p)
+ #define vhsubq_x_n_u8(__a, __b, __p) __arm_vhsubq_x_n_u8(__a, __b, __p)
+ #define vhsubq_x_n_u16(__a, __b, __p) __arm_vhsubq_x_n_u16(__a, __b, __p)
+ #define vhsubq_x_n_u32(__a, __b, __p) __arm_vhsubq_x_n_u32(__a, __b, __p)
+ #define vhsubq_x_s8(__a, __b, __p) __arm_vhsubq_x_s8(__a, __b, __p)
+ #define vhsubq_x_s16(__a, __b, __p) __arm_vhsubq_x_s16(__a, __b, __p)
+ #define vhsubq_x_s32(__a, __b, __p) __arm_vhsubq_x_s32(__a, __b, __p)
+ #define vhsubq_x_u8(__a, __b, __p) __arm_vhsubq_x_u8(__a, __b, __p)
+ #define vhsubq_x_u16(__a, __b, __p) __arm_vhsubq_x_u16(__a, __b, __p)
+ #define vhsubq_x_u32(__a, __b, __p) __arm_vhsubq_x_u32(__a, __b, __p)
+ #define vrhaddq_x_s8(__a, __b, __p) __arm_vrhaddq_x_s8(__a, __b, __p)
+ #define vrhaddq_x_s16(__a, __b, __p) __arm_vrhaddq_x_s16(__a, __b, __p)
+ #define vrhaddq_x_s32(__a, __b, __p) __arm_vrhaddq_x_s32(__a, __b, __p)
+ #define vrhaddq_x_u8(__a, __b, __p) __arm_vrhaddq_x_u8(__a, __b, __p)
+ #define vrhaddq_x_u16(__a, __b, __p) __arm_vrhaddq_x_u16(__a, __b, __p)
+ #define vrhaddq_x_u32(__a, __b, __p) __arm_vrhaddq_x_u32(__a, __b, __p)
+ #define vrmulhq_x_s8(__a, __b, __p) __arm_vrmulhq_x_s8(__a, __b, __p)
+ #define vrmulhq_x_s16(__a, __b, __p) __arm_vrmulhq_x_s16(__a, __b, __p)
+ #define vrmulhq_x_s32(__a, __b, __p) __arm_vrmulhq_x_s32(__a, __b, __p)
+ #define vrmulhq_x_u8(__a, __b, __p) __arm_vrmulhq_x_u8(__a, __b, __p)
+ #define vrmulhq_x_u16(__a, __b, __p) __arm_vrmulhq_x_u16(__a, __b, __p)
+ #define vrmulhq_x_u32(__a, __b, __p) __arm_vrmulhq_x_u32(__a, __b, __p)
+ #define vandq_x_s8(__a, __b, __p) __arm_vandq_x_s8(__a, __b, __p)
+ #define vandq_x_s16(__a, __b, __p) __arm_vandq_x_s16(__a, __b, __p)
+ #define vandq_x_s32(__a, __b, __p) __arm_vandq_x_s32(__a, __b, __p)
+ #define vandq_x_u8(__a, __b, __p) __arm_vandq_x_u8(__a, __b, __p)
+ #define vandq_x_u16(__a, __b, __p) __arm_vandq_x_u16(__a, __b, __p)
+ #define vandq_x_u32(__a, __b, __p) __arm_vandq_x_u32(__a, __b, __p)
+ #define vbicq_x_s8(__a, __b, __p) __arm_vbicq_x_s8(__a, __b, __p)
+ #define vbicq_x_s16(__a, __b, __p) __arm_vbicq_x_s16(__a, __b, __p)
+ #define vbicq_x_s32(__a, __b, __p) __arm_vbicq_x_s32(__a, __b, __p)
+ #define vbicq_x_u8(__a, __b, __p) __arm_vbicq_x_u8(__a, __b, __p)
+ #define vbicq_x_u16(__a, __b, __p) __arm_vbicq_x_u16(__a, __b, __p)
+ #define vbicq_x_u32(__a, __b, __p) __arm_vbicq_x_u32(__a, __b, __p)
+ #define vbrsrq_x_n_s8(__a, __b, __p) __arm_vbrsrq_x_n_s8(__a, __b, __p)
+ #define vbrsrq_x_n_s16(__a, __b, __p) __arm_vbrsrq_x_n_s16(__a, __b, __p)
+ #define vbrsrq_x_n_s32(__a, __b, __p) __arm_vbrsrq_x_n_s32(__a, __b, __p)
+ #define vbrsrq_x_n_u8(__a, __b, __p) __arm_vbrsrq_x_n_u8(__a, __b, __p)
+ #define vbrsrq_x_n_u16(__a, __b, __p) __arm_vbrsrq_x_n_u16(__a, __b, __p)
+ #define vbrsrq_x_n_u32(__a, __b, __p) __arm_vbrsrq_x_n_u32(__a, __b, __p)
+ #define veorq_x_s8(__a, __b, __p) __arm_veorq_x_s8(__a, __b, __p)
+ #define veorq_x_s16(__a, __b, __p) __arm_veorq_x_s16(__a, __b, __p)
+ #define veorq_x_s32(__a, __b, __p) __arm_veorq_x_s32(__a, __b, __p)
+ #define veorq_x_u8(__a, __b, __p) __arm_veorq_x_u8(__a, __b, __p)
+ #define veorq_x_u16(__a, __b, __p) __arm_veorq_x_u16(__a, __b, __p)
+ #define veorq_x_u32(__a, __b, __p) __arm_veorq_x_u32(__a, __b, __p)
+ #define vmovlbq_x_s8(__a, __p) __arm_vmovlbq_x_s8(__a, __p)
+ #define vmovlbq_x_s16(__a, __p) __arm_vmovlbq_x_s16(__a, __p)
+ #define vmovlbq_x_u8(__a, __p) __arm_vmovlbq_x_u8(__a, __p)
+ #define vmovlbq_x_u16(__a, __p) __arm_vmovlbq_x_u16(__a, __p)
+ #define vmovltq_x_s8(__a, __p) __arm_vmovltq_x_s8(__a, __p)
+ #define vmovltq_x_s16(__a, __p) __arm_vmovltq_x_s16(__a, __p)
+ #define vmovltq_x_u8(__a, __p) __arm_vmovltq_x_u8(__a, __p)
+ #define vmovltq_x_u16(__a, __p) __arm_vmovltq_x_u16(__a, __p)
+ #define vmvnq_x_s8(__a, __p) __arm_vmvnq_x_s8(__a, __p)
+ #define vmvnq_x_s16(__a, __p) __arm_vmvnq_x_s16(__a, __p)
+ #define vmvnq_x_s32(__a, __p) __arm_vmvnq_x_s32(__a, __p)
+ #define vmvnq_x_u8(__a, __p) __arm_vmvnq_x_u8(__a, __p)
+ #define vmvnq_x_u16(__a, __p) __arm_vmvnq_x_u16(__a, __p)
+ #define vmvnq_x_u32(__a, __p) __arm_vmvnq_x_u32(__a, __p)
+ #define vmvnq_x_n_s16( __imm, __p) __arm_vmvnq_x_n_s16( __imm, __p)
+ #define vmvnq_x_n_s32( __imm, __p) __arm_vmvnq_x_n_s32( __imm, __p)
+ #define vmvnq_x_n_u16( __imm, __p) __arm_vmvnq_x_n_u16( __imm, __p)
+ #define vmvnq_x_n_u32( __imm, __p) __arm_vmvnq_x_n_u32( __imm, __p)
+ #define vornq_x_s8(__a, __b, __p) __arm_vornq_x_s8(__a, __b, __p)
+ #define vornq_x_s16(__a, __b, __p) __arm_vornq_x_s16(__a, __b, __p)
+ #define vornq_x_s32(__a, __b, __p) __arm_vornq_x_s32(__a, __b, __p)
+ #define vornq_x_u8(__a, __b, __p) __arm_vornq_x_u8(__a, __b, __p)
+ #define vornq_x_u16(__a, __b, __p) __arm_vornq_x_u16(__a, __b, __p)
+ #define vornq_x_u32(__a, __b, __p) __arm_vornq_x_u32(__a, __b, __p)
+ #define vorrq_x_s8(__a, __b, __p) __arm_vorrq_x_s8(__a, __b, __p)
+ #define vorrq_x_s16(__a, __b, __p) __arm_vorrq_x_s16(__a, __b, __p)
+ #define vorrq_x_s32(__a, __b, __p) __arm_vorrq_x_s32(__a, __b, __p)
+ #define vorrq_x_u8(__a, __b, __p) __arm_vorrq_x_u8(__a, __b, __p)
+ #define vorrq_x_u16(__a, __b, __p) __arm_vorrq_x_u16(__a, __b, __p)
+ #define vorrq_x_u32(__a, __b, __p) __arm_vorrq_x_u32(__a, __b, __p)
+ #define vrev16q_x_s8(__a, __p) __arm_vrev16q_x_s8(__a, __p)
+ #define vrev16q_x_u8(__a, __p) __arm_vrev16q_x_u8(__a, __p)
+ #define vrev32q_x_s8(__a, __p) __arm_vrev32q_x_s8(__a, __p)
+ #define vrev32q_x_s16(__a, __p) __arm_vrev32q_x_s16(__a, __p)
+ #define vrev32q_x_u8(__a, __p) __arm_vrev32q_x_u8(__a, __p)
+ #define vrev32q_x_u16(__a, __p) __arm_vrev32q_x_u16(__a, __p)
+ #define vrev64q_x_s8(__a, __p) __arm_vrev64q_x_s8(__a, __p)
+ #define vrev64q_x_s16(__a, __p) __arm_vrev64q_x_s16(__a, __p)
+ #define vrev64q_x_s32(__a, __p) __arm_vrev64q_x_s32(__a, __p)
+ #define vrev64q_x_u8(__a, __p) __arm_vrev64q_x_u8(__a, __p)
+ #define vrev64q_x_u16(__a, __p) __arm_vrev64q_x_u16(__a, __p)
+ #define vrev64q_x_u32(__a, __p) __arm_vrev64q_x_u32(__a, __p)
+ #define vrshlq_x_s8(__a, __b, __p) __arm_vrshlq_x_s8(__a, __b, __p)
+ #define vrshlq_x_s16(__a, __b, __p) __arm_vrshlq_x_s16(__a, __b, __p)
+ #define vrshlq_x_s32(__a, __b, __p) __arm_vrshlq_x_s32(__a, __b, __p)
+ #define vrshlq_x_u8(__a, __b, __p) __arm_vrshlq_x_u8(__a, __b, __p)
+ #define vrshlq_x_u16(__a, __b, __p) __arm_vrshlq_x_u16(__a, __b, __p)
+ #define vrshlq_x_u32(__a, __b, __p) __arm_vrshlq_x_u32(__a, __b, __p)
+ #define vshllbq_x_n_s8(__a,  __imm, __p) __arm_vshllbq_x_n_s8(__a,  __imm, __p)
+ #define vshllbq_x_n_s16(__a,  __imm, __p) __arm_vshllbq_x_n_s16(__a,  __imm, __p)
+ #define vshllbq_x_n_u8(__a,  __imm, __p) __arm_vshllbq_x_n_u8(__a,  __imm, __p)
+ #define vshllbq_x_n_u16(__a,  __imm, __p) __arm_vshllbq_x_n_u16(__a,  __imm, __p)
+ #define vshlltq_x_n_s8(__a,  __imm, __p) __arm_vshlltq_x_n_s8(__a,  __imm, __p)
+ #define vshlltq_x_n_s16(__a,  __imm, __p) __arm_vshlltq_x_n_s16(__a,  __imm, __p)
+ #define vshlltq_x_n_u8(__a,  __imm, __p) __arm_vshlltq_x_n_u8(__a,  __imm, __p)
+ #define vshlltq_x_n_u16(__a,  __imm, __p) __arm_vshlltq_x_n_u16(__a,  __imm, __p)
+ #define vshlq_x_s8(__a, __b, __p) __arm_vshlq_x_s8(__a, __b, __p)
+ #define vshlq_x_s16(__a, __b, __p) __arm_vshlq_x_s16(__a, __b, __p)
+ #define vshlq_x_s32(__a, __b, __p) __arm_vshlq_x_s32(__a, __b, __p)
+ #define vshlq_x_u8(__a, __b, __p) __arm_vshlq_x_u8(__a, __b, __p)
+ #define vshlq_x_u16(__a, __b, __p) __arm_vshlq_x_u16(__a, __b, __p)
+ #define vshlq_x_u32(__a, __b, __p) __arm_vshlq_x_u32(__a, __b, __p)
+ #define vshlq_x_n_s8(__a,  __imm, __p) __arm_vshlq_x_n_s8(__a,  __imm, __p)
+ #define vshlq_x_n_s16(__a,  __imm, __p) __arm_vshlq_x_n_s16(__a,  __imm, __p)
+ #define vshlq_x_n_s32(__a,  __imm, __p) __arm_vshlq_x_n_s32(__a,  __imm, __p)
+ #define vshlq_x_n_u8(__a,  __imm, __p) __arm_vshlq_x_n_u8(__a,  __imm, __p)
+ #define vshlq_x_n_u16(__a,  __imm, __p) __arm_vshlq_x_n_u16(__a,  __imm, __p)
+ #define vshlq_x_n_u32(__a,  __imm, __p) __arm_vshlq_x_n_u32(__a,  __imm, __p)
+ #define vrshrq_x_n_s8(__a,  __imm, __p) __arm_vrshrq_x_n_s8(__a,  __imm, __p)
+ #define vrshrq_x_n_s16(__a,  __imm, __p) __arm_vrshrq_x_n_s16(__a,  __imm, __p)
+ #define vrshrq_x_n_s32(__a,  __imm, __p) __arm_vrshrq_x_n_s32(__a,  __imm, __p)
+ #define vrshrq_x_n_u8(__a,  __imm, __p) __arm_vrshrq_x_n_u8(__a,  __imm, __p)
+ #define vrshrq_x_n_u16(__a,  __imm, __p) __arm_vrshrq_x_n_u16(__a,  __imm, __p)
+ #define vrshrq_x_n_u32(__a,  __imm, __p) __arm_vrshrq_x_n_u32(__a,  __imm, __p)
+ #define vshrq_x_n_s8(__a,  __imm, __p) __arm_vshrq_x_n_s8(__a,  __imm, __p)
+ #define vshrq_x_n_s16(__a,  __imm, __p) __arm_vshrq_x_n_s16(__a,  __imm, __p)
+ #define vshrq_x_n_s32(__a,  __imm, __p) __arm_vshrq_x_n_s32(__a,  __imm, __p)
+ #define vshrq_x_n_u8(__a,  __imm, __p) __arm_vshrq_x_n_u8(__a,  __imm, __p)
+ #define vshrq_x_n_u16(__a,  __imm, __p) __arm_vshrq_x_n_u16(__a,  __imm, __p)
+ #define vshrq_x_n_u32(__a,  __imm, __p) __arm_vshrq_x_n_u32(__a,  __imm, __p)
+ #define vdupq_x_n_f16(__a, __p) __arm_vdupq_x_n_f16(__a, __p)
+ #define vdupq_x_n_f32(__a, __p) __arm_vdupq_x_n_f32(__a, __p)
+ #define vminnmq_x_f16(__a, __b, __p) __arm_vminnmq_x_f16(__a, __b, __p)
+ #define vminnmq_x_f32(__a, __b, __p) __arm_vminnmq_x_f32(__a, __b, __p)
+ #define vmaxnmq_x_f16(__a, __b, __p) __arm_vmaxnmq_x_f16(__a, __b, __p)
+ #define vmaxnmq_x_f32(__a, __b, __p) __arm_vmaxnmq_x_f32(__a, __b, __p)
+ #define vabdq_x_f16(__a, __b, __p) __arm_vabdq_x_f16(__a, __b, __p)
+ #define vabdq_x_f32(__a, __b, __p) __arm_vabdq_x_f32(__a, __b, __p)
+ #define vabsq_x_f16(__a, __p) __arm_vabsq_x_f16(__a, __p)
+ #define vabsq_x_f32(__a, __p) __arm_vabsq_x_f32(__a, __p)
+ #define vaddq_x_f16(__a, __b, __p) __arm_vaddq_x_f16(__a, __b, __p)
+ #define vaddq_x_f32(__a, __b, __p) __arm_vaddq_x_f32(__a, __b, __p)
+ #define vaddq_x_n_f16(__a, __b, __p) __arm_vaddq_x_n_f16(__a, __b, __p)
+ #define vaddq_x_n_f32(__a, __b, __p) __arm_vaddq_x_n_f32(__a, __b, __p)
+ #define vnegq_x_f16(__a, __p) __arm_vnegq_x_f16(__a, __p)
+ #define vnegq_x_f32(__a, __p) __arm_vnegq_x_f32(__a, __p)
+ #define vmulq_x_f16(__a, __b, __p) __arm_vmulq_x_f16(__a, __b, __p)
+ #define vmulq_x_f32(__a, __b, __p) __arm_vmulq_x_f32(__a, __b, __p)
+ #define vmulq_x_n_f16(__a, __b, __p) __arm_vmulq_x_n_f16(__a, __b, __p)
+ #define vmulq_x_n_f32(__a, __b, __p) __arm_vmulq_x_n_f32(__a, __b, __p)
+ #define vsubq_x_f16(__a, __b, __p) __arm_vsubq_x_f16(__a, __b, __p)
+ #define vsubq_x_f32(__a, __b, __p) __arm_vsubq_x_f32(__a, __b, __p)
+ #define vsubq_x_n_f16(__a, __b, __p) __arm_vsubq_x_n_f16(__a, __b, __p)
+ #define vsubq_x_n_f32(__a, __b, __p) __arm_vsubq_x_n_f32(__a, __b, __p)
+ #define vcaddq_rot90_x_f16(__a, __b, __p) __arm_vcaddq_rot90_x_f16(__a, __b, __p)
+ #define vcaddq_rot90_x_f32(__a, __b, __p) __arm_vcaddq_rot90_x_f32(__a, __b, __p)
+ #define vcaddq_rot270_x_f16(__a, __b, __p) __arm_vcaddq_rot270_x_f16(__a, __b, __p)
+ #define vcaddq_rot270_x_f32(__a, __b, __p) __arm_vcaddq_rot270_x_f32(__a, __b, __p)
+ #define vcmulq_x_f16(__a, __b, __p) __arm_vcmulq_x_f16(__a, __b, __p)
+ #define vcmulq_x_f32(__a, __b, __p) __arm_vcmulq_x_f32(__a, __b, __p)
+ #define vcmulq_rot90_x_f16(__a, __b, __p) __arm_vcmulq_rot90_x_f16(__a, __b, __p)
+ #define vcmulq_rot90_x_f32(__a, __b, __p) __arm_vcmulq_rot90_x_f32(__a, __b, __p)
+ #define vcmulq_rot180_x_f16(__a, __b, __p) __arm_vcmulq_rot180_x_f16(__a, __b, __p)
+ #define vcmulq_rot180_x_f32(__a, __b, __p) __arm_vcmulq_rot180_x_f32(__a, __b, __p)
+ #define vcmulq_rot270_x_f16(__a, __b, __p) __arm_vcmulq_rot270_x_f16(__a, __b, __p)
+ #define vcmulq_rot270_x_f32(__a, __b, __p) __arm_vcmulq_rot270_x_f32(__a, __b, __p)
+ #define vcvtaq_x_s16_f16(__a, __p) __arm_vcvtaq_x_s16_f16(__a, __p)
+ #define vcvtaq_x_s32_f32(__a, __p) __arm_vcvtaq_x_s32_f32(__a, __p)
+ #define vcvtaq_x_u16_f16(__a, __p) __arm_vcvtaq_x_u16_f16(__a, __p)
+ #define vcvtaq_x_u32_f32(__a, __p) __arm_vcvtaq_x_u32_f32(__a, __p)
+ #define vcvtnq_x_s16_f16(__a, __p) __arm_vcvtnq_x_s16_f16(__a, __p)
+ #define vcvtnq_x_s32_f32(__a, __p) __arm_vcvtnq_x_s32_f32(__a, __p)
+ #define vcvtnq_x_u16_f16(__a, __p) __arm_vcvtnq_x_u16_f16(__a, __p)
+ #define vcvtnq_x_u32_f32(__a, __p) __arm_vcvtnq_x_u32_f32(__a, __p)
+ #define vcvtpq_x_s16_f16(__a, __p) __arm_vcvtpq_x_s16_f16(__a, __p)
+ #define vcvtpq_x_s32_f32(__a, __p) __arm_vcvtpq_x_s32_f32(__a, __p)
+ #define vcvtpq_x_u16_f16(__a, __p) __arm_vcvtpq_x_u16_f16(__a, __p)
+ #define vcvtpq_x_u32_f32(__a, __p) __arm_vcvtpq_x_u32_f32(__a, __p)
+ #define vcvtmq_x_s16_f16(__a, __p) __arm_vcvtmq_x_s16_f16(__a, __p)
+ #define vcvtmq_x_s32_f32(__a, __p) __arm_vcvtmq_x_s32_f32(__a, __p)
+ #define vcvtmq_x_u16_f16(__a, __p) __arm_vcvtmq_x_u16_f16(__a, __p)
+ #define vcvtmq_x_u32_f32(__a, __p) __arm_vcvtmq_x_u32_f32(__a, __p)
+ #define vcvtbq_x_f32_f16(__a, __p) __arm_vcvtbq_x_f32_f16(__a, __p)
+ #define vcvttq_x_f32_f16(__a, __p) __arm_vcvttq_x_f32_f16(__a, __p)
+ #define vcvtq_x_f16_u16(__a, __p) __arm_vcvtq_x_f16_u16(__a, __p)
+ #define vcvtq_x_f16_s16(__a, __p) __arm_vcvtq_x_f16_s16(__a, __p)
+ #define vcvtq_x_f32_s32(__a, __p) __arm_vcvtq_x_f32_s32(__a, __p)
+ #define vcvtq_x_f32_u32(__a, __p) __arm_vcvtq_x_f32_u32(__a, __p)
+ #define vcvtq_x_n_f16_s16(__a,  __imm6, __p) __arm_vcvtq_x_n_f16_s16(__a,  __imm6, __p)
+ #define vcvtq_x_n_f16_u16(__a,  __imm6, __p) __arm_vcvtq_x_n_f16_u16(__a,  __imm6, __p)
+ #define vcvtq_x_n_f32_s32(__a,  __imm6, __p) __arm_vcvtq_x_n_f32_s32(__a,  __imm6, __p)
+ #define vcvtq_x_n_f32_u32(__a,  __imm6, __p) __arm_vcvtq_x_n_f32_u32(__a,  __imm6, __p)
+ #define vcvtq_x_s16_f16(__a, __p) __arm_vcvtq_x_s16_f16(__a, __p)
+ #define vcvtq_x_s32_f32(__a, __p) __arm_vcvtq_x_s32_f32(__a, __p)
+ #define vcvtq_x_u16_f16(__a, __p) __arm_vcvtq_x_u16_f16(__a, __p)
+ #define vcvtq_x_u32_f32(__a, __p) __arm_vcvtq_x_u32_f32(__a, __p)
+ #define vcvtq_x_n_s16_f16(__a,  __imm6, __p) __arm_vcvtq_x_n_s16_f16(__a,  __imm6, __p)
+ #define vcvtq_x_n_s32_f32(__a,  __imm6, __p) __arm_vcvtq_x_n_s32_f32(__a,  __imm6, __p)
+ #define vcvtq_x_n_u16_f16(__a,  __imm6, __p) __arm_vcvtq_x_n_u16_f16(__a,  __imm6, __p)
+ #define vcvtq_x_n_u32_f32(__a,  __imm6, __p) __arm_vcvtq_x_n_u32_f32(__a,  __imm6, __p)
+ #define vrndq_x_f16(__a, __p) __arm_vrndq_x_f16(__a, __p)
+ #define vrndq_x_f32(__a, __p) __arm_vrndq_x_f32(__a, __p)
+ #define vrndnq_x_f16(__a, __p) __arm_vrndnq_x_f16(__a, __p)
+ #define vrndnq_x_f32(__a, __p) __arm_vrndnq_x_f32(__a, __p)
+ #define vrndmq_x_f16(__a, __p) __arm_vrndmq_x_f16(__a, __p)
+ #define vrndmq_x_f32(__a, __p) __arm_vrndmq_x_f32(__a, __p)
+ #define vrndpq_x_f16(__a, __p) __arm_vrndpq_x_f16(__a, __p)
+ #define vrndpq_x_f32(__a, __p) __arm_vrndpq_x_f32(__a, __p)
+ #define vrndaq_x_f16(__a, __p) __arm_vrndaq_x_f16(__a, __p)
+ #define vrndaq_x_f32(__a, __p) __arm_vrndaq_x_f32(__a, __p)
+ #define vrndxq_x_f16(__a, __p) __arm_vrndxq_x_f16(__a, __p)
+ #define vrndxq_x_f32(__a, __p) __arm_vrndxq_x_f32(__a, __p)
+ #define vandq_x_f16(__a, __b, __p) __arm_vandq_x_f16(__a, __b, __p)
+ #define vandq_x_f32(__a, __b, __p) __arm_vandq_x_f32(__a, __b, __p)
+ #define vbicq_x_f16(__a, __b, __p) __arm_vbicq_x_f16(__a, __b, __p)
+ #define vbicq_x_f32(__a, __b, __p) __arm_vbicq_x_f32(__a, __b, __p)
+ #define vbrsrq_x_n_f16(__a, __b, __p) __arm_vbrsrq_x_n_f16(__a, __b, __p)
+ #define vbrsrq_x_n_f32(__a, __b, __p) __arm_vbrsrq_x_n_f32(__a, __b, __p)
+ #define veorq_x_f16(__a, __b, __p) __arm_veorq_x_f16(__a, __b, __p)
+ #define veorq_x_f32(__a, __b, __p) __arm_veorq_x_f32(__a, __b, __p)
+ #define vornq_x_f16(__a, __b, __p) __arm_vornq_x_f16(__a, __b, __p)
+ #define vornq_x_f32(__a, __b, __p) __arm_vornq_x_f32(__a, __b, __p)
+ #define vorrq_x_f16(__a, __b, __p) __arm_vorrq_x_f16(__a, __b, __p)
+ #define vorrq_x_f32(__a, __b, __p) __arm_vorrq_x_f32(__a, __b, __p)
+ #define vrev32q_x_f16(__a, __p) __arm_vrev32q_x_f16(__a, __p)
+ #define vrev64q_x_f16(__a, __p) __arm_vrev64q_x_f16(__a, __p)
+ #define vrev64q_x_f32(__a, __p) __arm_vrev64q_x_f32(__a, __p)
+ #define vadciq_s32(__a, __b,  __carry_out) __arm_vadciq_s32(__a, __b,  __carry_out)
+ #define vadciq_u32(__a, __b,  __carry_out) __arm_vadciq_u32(__a, __b,  __carry_out)
+ #define vadciq_m_s32(__inactive, __a, __b,  __carry_out, __p) __arm_vadciq_m_s32(__inactive, __a, __b,  __carry_out, __p)
+ #define vadciq_m_u32(__inactive, __a, __b,  __carry_out, __p) __arm_vadciq_m_u32(__inactive, __a, __b,  __carry_out, __p)
+ #define vadcq_s32(__a, __b,  __carry) __arm_vadcq_s32(__a, __b,  __carry)
+ #define vadcq_u32(__a, __b,  __carry) __arm_vadcq_u32(__a, __b,  __carry)
+ #define vadcq_m_s32(__inactive, __a, __b,  __carry, __p) __arm_vadcq_m_s32(__inactive, __a, __b,  __carry, __p)
+ #define vadcq_m_u32(__inactive, __a, __b,  __carry, __p) __arm_vadcq_m_u32(__inactive, __a, __b,  __carry, __p)
+ #define vsbciq_s32(__a, __b,  __carry_out) __arm_vsbciq_s32(__a, __b,  __carry_out)
+ #define vsbciq_u32(__a, __b,  __carry_out) __arm_vsbciq_u32(__a, __b,  __carry_out)
+ #define vsbciq_m_s32(__inactive, __a, __b,  __carry_out, __p) __arm_vsbciq_m_s32(__inactive, __a, __b,  __carry_out, __p)
+ #define vsbciq_m_u32(__inactive, __a, __b,  __carry_out, __p) __arm_vsbciq_m_u32(__inactive, __a, __b,  __carry_out, __p)
+ #define vsbcq_s32(__a, __b,  __carry) __arm_vsbcq_s32(__a, __b,  __carry)
+ #define vsbcq_u32(__a, __b,  __carry) __arm_vsbcq_u32(__a, __b,  __carry)
+ #define vsbcq_m_s32(__inactive, __a, __b,  __carry, __p) __arm_vsbcq_m_s32(__inactive, __a, __b,  __carry, __p)
+ #define vsbcq_m_u32(__inactive, __a, __b,  __carry, __p) __arm_vsbcq_m_u32(__inactive, __a, __b,  __carry, __p)
+ #define vst1q_p_u8(__addr, __value, __p) __arm_vst1q_p_u8(__addr, __value, __p)
+ #define vst1q_p_s8(__addr, __value, __p) __arm_vst1q_p_s8(__addr, __value, __p)
+ #define vst2q_s8(__addr, __value) __arm_vst2q_s8(__addr, __value)
+ #define vst2q_u8(__addr, __value) __arm_vst2q_u8(__addr, __value)
+ #define vld1q_z_u8(__base, __p) __arm_vld1q_z_u8(__base, __p)
+ #define vld1q_z_s8(__base, __p) __arm_vld1q_z_s8(__base, __p)
+ #define vld2q_s8(__addr) __arm_vld2q_s8(__addr)
+ #define vld2q_u8(__addr) __arm_vld2q_u8(__addr)
+ #define vld4q_s8(__addr) __arm_vld4q_s8(__addr)
+ #define vld4q_u8(__addr) __arm_vld4q_u8(__addr)
+ #define vst1q_p_u16(__addr, __value, __p) __arm_vst1q_p_u16(__addr, __value, __p)
+ #define vst1q_p_s16(__addr, __value, __p) __arm_vst1q_p_s16(__addr, __value, __p)
+ #define vst2q_s16(__addr, __value) __arm_vst2q_s16(__addr, __value)
+ #define vst2q_u16(__addr, __value) __arm_vst2q_u16(__addr, __value)
+ #define vld1q_z_u16(__base, __p) __arm_vld1q_z_u16(__base, __p)
+ #define vld1q_z_s16(__base, __p) __arm_vld1q_z_s16(__base, __p)
+ #define vld2q_s16(__addr) __arm_vld2q_s16(__addr)
+ #define vld2q_u16(__addr) __arm_vld2q_u16(__addr)
+ #define vld4q_s16(__addr) __arm_vld4q_s16(__addr)
+ #define vld4q_u16(__addr) __arm_vld4q_u16(__addr)
+ #define vst1q_p_u32(__addr, __value, __p) __arm_vst1q_p_u32(__addr, __value, __p)
+ #define vst1q_p_s32(__addr, __value, __p) __arm_vst1q_p_s32(__addr, __value, __p)
+ #define vst2q_s32(__addr, __value) __arm_vst2q_s32(__addr, __value)
+ #define vst2q_u32(__addr, __value) __arm_vst2q_u32(__addr, __value)
+ #define vld1q_z_u32(__base, __p) __arm_vld1q_z_u32(__base, __p)
+ #define vld1q_z_s32(__base, __p) __arm_vld1q_z_s32(__base, __p)
+ #define vld2q_s32(__addr) __arm_vld2q_s32(__addr)
+ #define vld2q_u32(__addr) __arm_vld2q_u32(__addr)
+ #define vld4q_s32(__addr) __arm_vld4q_s32(__addr)
+ #define vld4q_u32(__addr) __arm_vld4q_u32(__addr)
+ #define vld4q_f16(__addr) __arm_vld4q_f16(__addr)
+ #define vld2q_f16(__addr) __arm_vld2q_f16(__addr)
+ #define vld1q_z_f16(__base, __p) __arm_vld1q_z_f16(__base, __p)
+ #define vst2q_f16(__addr, __value) __arm_vst2q_f16(__addr, __value)
+ #define vst1q_p_f16(__addr, __value, __p) __arm_vst1q_p_f16(__addr, __value, __p)
+ #define vld4q_f32(__addr) __arm_vld4q_f32(__addr)
+ #define vld2q_f32(__addr) __arm_vld2q_f32(__addr)
+ #define vld1q_z_f32(__base, __p) __arm_vld1q_z_f32(__base, __p)
+ #define vst2q_f32(__addr, __value) __arm_vst2q_f32(__addr, __value)
+ #define vst1q_p_f32(__addr, __value, __p) __arm_vst1q_p_f32(__addr, __value, __p)
+ #define vsetq_lane_f16(__a, __b,  __idx) __arm_vsetq_lane_f16(__a, __b,  __idx)
+ #define vsetq_lane_f32(__a, __b,  __idx) __arm_vsetq_lane_f32(__a, __b,  __idx)
+ #define vsetq_lane_s16(__a, __b,  __idx) __arm_vsetq_lane_s16(__a, __b,  __idx)
+ #define vsetq_lane_s32(__a, __b,  __idx) __arm_vsetq_lane_s32(__a, __b,  __idx)
+ #define vsetq_lane_s8(__a, __b,  __idx) __arm_vsetq_lane_s8(__a, __b,  __idx)
+ #define vsetq_lane_s64(__a, __b,  __idx) __arm_vsetq_lane_s64(__a, __b,  __idx)
+ #define vsetq_lane_u8(__a, __b,  __idx) __arm_vsetq_lane_u8(__a, __b,  __idx)
+ #define vsetq_lane_u16(__a, __b,  __idx) __arm_vsetq_lane_u16(__a, __b,  __idx)
+ #define vsetq_lane_u32(__a, __b,  __idx) __arm_vsetq_lane_u32(__a, __b,  __idx)
+ #define vsetq_lane_u64(__a, __b,  __idx) __arm_vsetq_lane_u64(__a, __b,  __idx)
+ #define vgetq_lane_f16(__a,  __idx) __arm_vgetq_lane_f16(__a,  __idx)
+ #define vgetq_lane_f32(__a,  __idx) __arm_vgetq_lane_f32(__a,  __idx)
+ #define vgetq_lane_s16(__a,  __idx) __arm_vgetq_lane_s16(__a,  __idx)
+ #define vgetq_lane_s32(__a,  __idx) __arm_vgetq_lane_s32(__a,  __idx)
+ #define vgetq_lane_s8(__a,  __idx) __arm_vgetq_lane_s8(__a,  __idx)
+ #define vgetq_lane_s64(__a,  __idx) __arm_vgetq_lane_s64(__a,  __idx)
+ #define vgetq_lane_u8(__a,  __idx) __arm_vgetq_lane_u8(__a,  __idx)
+ #define vgetq_lane_u16(__a,  __idx) __arm_vgetq_lane_u16(__a,  __idx)
+ #define vgetq_lane_u32(__a,  __idx) __arm_vgetq_lane_u32(__a,  __idx)
+ #define vgetq_lane_u64(__a,  __idx) __arm_vgetq_lane_u64(__a,  __idx)
+ #define sqrshr(__p0, __p1) __arm_sqrshr(__p0, __p1)
+ #define sqrshrl(__p0, __p1) __arm_sqrshrl(__p0, __p1)
+ #define sqrshrl_sat48(__p0, __p1) __arm_sqrshrl_sat48(__p0, __p1)
+ #define sqshl(__p0, __p1) __arm_sqshl(__p0, __p1)
+ #define sqshll(__p0, __p1) __arm_sqshll(__p0, __p1)
+ #define srshr(__p0, __p1) __arm_srshr(__p0, __p1)
+ #define srshrl(__p0, __p1) __arm_srshrl(__p0, __p1)
+ #define uqrshl(__p0, __p1) __arm_uqrshl(__p0, __p1)
+ #define uqrshll(__p0, __p1) __arm_uqrshll(__p0, __p1)
+ #define uqrshll_sat48(__p0, __p1) __arm_uqrshll_sat48(__p0, __p1)
+ #define uqshl(__p0, __p1) __arm_uqshl(__p0, __p1)
+ #define uqshll(__p0, __p1) __arm_uqshll(__p0, __p1)
+ #define urshr(__p0, __p1) __arm_urshr(__p0, __p1)
+ #define urshrl(__p0, __p1) __arm_urshrl(__p0, __p1)
+ #define lsll(__p0, __p1) __arm_lsll(__p0, __p1)
+ #define asrl(__p0, __p1) __arm_asrl(__p0, __p1)
+ #define vshlcq_m_s8(__a,  __b,  __imm, __p) __arm_vshlcq_m_s8(__a,  __b,  __imm, __p)
+ #define vshlcq_m_u8(__a,  __b,  __imm, __p) __arm_vshlcq_m_u8(__a,  __b,  __imm, __p)
+ #define vshlcq_m_s16(__a,  __b,  __imm, __p) __arm_vshlcq_m_s16(__a,  __b,  __imm, __p)
+ #define vshlcq_m_u16(__a,  __b,  __imm, __p) __arm_vshlcq_m_u16(__a,  __b,  __imm, __p)
+ #define vshlcq_m_s32(__a,  __b,  __imm, __p) __arm_vshlcq_m_s32(__a,  __b,  __imm, __p)
+ #define vshlcq_m_u32(__a,  __b,  __imm, __p) __arm_vshlcq_m_u32(__a,  __b,  __imm, __p)
+ #endif
+ 
+ /* For big-endian, GCC's vector indices are reversed within each 64 bits
+    compared to the architectural lane indices used by MVE intrinsics.  */
+ #define __ARM_NUM_LANES(__v) (sizeof (__v) / sizeof (__v[0]))
+ #ifdef __ARM_BIG_ENDIAN
+ #define __ARM_LANEQ(__vec, __idx) (__idx ^ (__ARM_NUM_LANES(__vec)/2 - 1))
+ #else
+ #define __ARM_LANEQ(__vec, __idx) __idx
+ #endif
+ #define __ARM_CHECK_LANEQ(__vec, __idx)		 \
+   __builtin_arm_lane_check (__ARM_NUM_LANES(__vec),     \
+ 			    __ARM_LANEQ(__vec, __idx))
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q_s8 (int8_t * __addr, int8x16x4_t __value)
+ {
+   union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst4qv16qi ((__builtin_neon_qi *) __addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q_s16 (int16_t * __addr, int16x8x4_t __value)
+ {
+   union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst4qv8hi ((__builtin_neon_hi *) __addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q_s32 (int32_t * __addr, int32x4x4_t __value)
+ {
+   union { int32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst4qv4si ((__builtin_neon_si *) __addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q_u8 (uint8_t * __addr, uint8x16x4_t __value)
+ {
+   union { uint8x16x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst4qv16qi ((__builtin_neon_qi *) __addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q_u16 (uint16_t * __addr, uint16x8x4_t __value)
+ {
+   union { uint16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst4qv8hi ((__builtin_neon_hi *) __addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q_u32 (uint32_t * __addr, uint32x4x4_t __value)
+ {
+   union { uint32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst4qv4si ((__builtin_neon_si *) __addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n_s8 (int8_t __a)
+ {
+   return __builtin_mve_vdupq_n_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n_s16 (int16_t __a)
+ {
+   return __builtin_mve_vdupq_n_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n_s32 (int32_t __a)
+ {
+   return __builtin_mve_vdupq_n_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_s8 (int8x16_t __a)
+ {
+   return __builtin_mve_vabsq_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_s16 (int16x8_t __a)
+ {
+   return __builtin_mve_vabsq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_s32 (int32x4_t __a)
+ {
+   return __builtin_mve_vabsq_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_s8 (int8x16_t __a)
+ {
+   return __builtin_mve_vclsq_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_s16 (int16x8_t __a)
+ {
+   return __builtin_mve_vclsq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_s32 (int32x4_t __a)
+ {
+   return __builtin_mve_vclsq_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_s8 (int8x16_t __a)
+ {
+   return __builtin_mve_vclzq_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_s16 (int16x8_t __a)
+ {
+   return __builtin_mve_vclzq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_s32 (int32x4_t __a)
+ {
+   return __builtin_mve_vclzq_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_s8 (int8x16_t __a)
+ {
+   return __builtin_mve_vnegq_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_s16 (int16x8_t __a)
+ {
+   return __builtin_mve_vnegq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_s32 (int32x4_t __a)
+ {
+   return __builtin_mve_vnegq_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvq_s32 (int32x4_t __a)
+ {
+   return __builtin_mve_vaddlvq_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_s8 (int8x16_t __a)
+ {
+   return __builtin_mve_vaddvq_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_s16 (int16x8_t __a)
+ {
+   return __builtin_mve_vaddvq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_s32 (int32x4_t __a)
+ {
+   return __builtin_mve_vaddvq_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_s8 (int8x16_t __a)
+ {
+   return __builtin_mve_vmovlbq_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_s16 (int16x8_t __a)
+ {
+   return __builtin_mve_vmovlbq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_s8 (int8x16_t __a)
+ {
+   return __builtin_mve_vmovltq_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_s16 (int16x8_t __a)
+ {
+   return __builtin_mve_vmovltq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_s8 (int8x16_t __a)
+ {
+   return __builtin_mve_vmvnq_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_s16 (int16x8_t __a)
+ {
+   return __builtin_mve_vmvnq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_s32 (int32x4_t __a)
+ {
+   return __builtin_mve_vmvnq_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_n_s16 (const int16_t __imm)
+ {
+   return __builtin_mve_vmvnq_n_sv8hi (__imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_n_s32 (const int32_t __imm)
+ {
+   return __builtin_mve_vmvnq_n_sv4si (__imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev16q_s8 (int8x16_t __a)
+ {
+   return __builtin_mve_vrev16q_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_s8 (int8x16_t __a)
+ {
+   return __builtin_mve_vrev32q_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_s16 (int16x8_t __a)
+ {
+   return __builtin_mve_vrev32q_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_s8 (int8x16_t __a)
+ {
+   return __builtin_mve_vrev64q_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_s16 (int16x8_t __a)
+ {
+   return __builtin_mve_vrev64q_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_s32 (int32x4_t __a)
+ {
+   return __builtin_mve_vrev64q_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqabsq_s8 (int8x16_t __a)
+ {
+   return __builtin_mve_vqabsq_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqabsq_s16 (int16x8_t __a)
+ {
+   return __builtin_mve_vqabsq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqabsq_s32 (int32x4_t __a)
+ {
+   return __builtin_mve_vqabsq_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqnegq_s8 (int8x16_t __a)
+ {
+   return __builtin_mve_vqnegq_sv16qi (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqnegq_s16 (int16x8_t __a)
+ {
+   return __builtin_mve_vqnegq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqnegq_s32 (int32x4_t __a)
+ {
+   return __builtin_mve_vqnegq_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_u8 (uint8x16_t __a)
+ {
+   return __builtin_mve_vrev64q_uv16qi (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_u16 (uint16x8_t __a)
+ {
+   return __builtin_mve_vrev64q_uv8hi (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_u32 (uint32x4_t __a)
+ {
+   return __builtin_mve_vrev64q_uv4si (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_u8 (uint8x16_t __a)
+ {
+   return __builtin_mve_vmvnq_uv16qi (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_u16 (uint16x8_t __a)
+ {
+   return __builtin_mve_vmvnq_uv8hi (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_u32 (uint32x4_t __a)
+ {
+   return __builtin_mve_vmvnq_uv4si (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n_u8 (uint8_t __a)
+ {
+   return __builtin_mve_vdupq_n_uv16qi (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n_u16 (uint16_t __a)
+ {
+   return __builtin_mve_vdupq_n_uv8hi (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n_u32 (uint32_t __a)
+ {
+   return __builtin_mve_vdupq_n_uv4si (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_u8 (uint8x16_t __a)
+ {
+   return __builtin_mve_vclzq_uv16qi (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_u16 (uint16x8_t __a)
+ {
+   return __builtin_mve_vclzq_uv8hi (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_u32 (uint32x4_t __a)
+ {
+   return __builtin_mve_vclzq_uv4si (__a);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_u8 (uint8x16_t __a)
+ {
+   return __builtin_mve_vaddvq_uv16qi (__a);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_u16 (uint16x8_t __a)
+ {
+   return __builtin_mve_vaddvq_uv8hi (__a);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_u32 (uint32x4_t __a)
+ {
+   return __builtin_mve_vaddvq_uv4si (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_u8 (uint8x16_t __a)
+ {
+   return __builtin_mve_vrev32q_uv16qi (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_u16 (uint16x8_t __a)
+ {
+   return __builtin_mve_vrev32q_uv8hi (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_u8 (uint8x16_t __a)
+ {
+   return __builtin_mve_vmovltq_uv16qi (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_u16 (uint16x8_t __a)
+ {
+   return __builtin_mve_vmovltq_uv8hi (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_u8 (uint8x16_t __a)
+ {
+   return __builtin_mve_vmovlbq_uv16qi (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_u16 (uint16x8_t __a)
+ {
+   return __builtin_mve_vmovlbq_uv8hi (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_n_u16 (const int __imm)
+ {
+   return __builtin_mve_vmvnq_n_uv8hi (__imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_n_u32 (const int __imm)
+ {
+   return __builtin_mve_vmvnq_n_uv4si (__imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev16q_u8 (uint8x16_t __a)
+ {
+   return __builtin_mve_vrev16q_uv16qi (__a);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvq_u32 (uint32x4_t __a)
+ {
+   return __builtin_mve_vaddlvq_uv4si (__a);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vctp16q (uint32_t __a)
+ {
+   return __builtin_mve_vctp16qhi (__a);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vctp32q (uint32_t __a)
+ {
+   return __builtin_mve_vctp32qhi (__a);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vctp64q (uint32_t __a)
+ {
+   return __builtin_mve_vctp64qhi (__a);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vctp8q (uint32_t __a)
+ {
+   return __builtin_mve_vctp8qhi (__a);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpnot (mve_pred16_t __a)
+ {
+   return __builtin_mve_vpnothi (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcreateq_u8 (uint64_t __a, uint64_t __b)
+ {
+   return __builtin_mve_vcreateq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcreateq_u16 (uint64_t __a, uint64_t __b)
+ {
+   return __builtin_mve_vcreateq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcreateq_u32 (uint64_t __a, uint64_t __b)
+ {
+   return __builtin_mve_vcreateq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcreateq_u64 (uint64_t __a, uint64_t __b)
+ {
+   return __builtin_mve_vcreateq_uv2di (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcreateq_s8 (uint64_t __a, uint64_t __b)
+ {
+   return __builtin_mve_vcreateq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcreateq_s16 (uint64_t __a, uint64_t __b)
+ {
+   return __builtin_mve_vcreateq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcreateq_s32 (uint64_t __a, uint64_t __b)
+ {
+   return __builtin_mve_vcreateq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcreateq_s64 (uint64_t __a, uint64_t __b)
+ {
+   return __builtin_mve_vcreateq_sv2di (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_n_s8 (int8x16_t __a, const int __imm)
+ {
+   return __builtin_mve_vshrq_n_sv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_n_s16 (int16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vshrq_n_sv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_n_s32 (int32x4_t __a, const int __imm)
+ {
+   return __builtin_mve_vshrq_n_sv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_n_u8 (uint8x16_t __a, const int __imm)
+ {
+   return __builtin_mve_vshrq_n_uv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_n_u16 (uint16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vshrq_n_uv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_n_u32 (uint32x4_t __a, const int __imm)
+ {
+   return __builtin_mve_vshrq_n_uv4si (__a, __imm);
+ }
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvq_p_s32 (int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddlvq_p_sv4si (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvq_p_u32 (uint32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddlvq_p_uv4si (__a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vcmpneq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vcmpneq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vcmpneq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vcmpneq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vcmpneq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vcmpneq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vshlq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vshlq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vshlq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_u8 (uint8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vshlq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_u16 (uint16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vshlq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_u32 (uint32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vshlq_uv4si (__a, __b);
+ }
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vsubq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_n_u8 (uint8x16_t __a, uint8_t __b)
+ {
+   return __builtin_mve_vsubq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vrmulhq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vrhaddq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vqsubq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_n_u8 (uint8x16_t __a, uint8_t __b)
+ {
+   return __builtin_mve_vqsubq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vqaddq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_n_u8 (uint8x16_t __a, uint8_t __b)
+ {
+   return __builtin_mve_vqaddq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vorrq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vornq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vmulq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_n_u8 (uint8x16_t __a, uint8_t __b)
+ {
+   return __builtin_mve_vmulq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vmulltq_int_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vmullbq_int_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vmulhq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vmladavq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_u8 (uint8_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vminvq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vminq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_u8 (uint8_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vmaxvq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vmaxq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vhsubq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_n_u8 (uint8x16_t __a, uint8_t __b)
+ {
+   return __builtin_mve_vhsubq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vhaddq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_n_u8 (uint8x16_t __a, uint8_t __b)
+ {
+   return __builtin_mve_vhaddq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_veorq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_n_u8 (uint8x16_t __a, uint8_t __b)
+ {
+   return __builtin_mve_vcmpneq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vcmphiq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_n_u8 (uint8x16_t __a, uint8_t __b)
+ {
+   return __builtin_mve_vcmphiq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vcmpeqq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_n_u8 (uint8x16_t __a, uint8_t __b)
+ {
+   return __builtin_mve_vcmpeqq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vcmpcsq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_n_u8 (uint8x16_t __a, uint8_t __b)
+ {
+   return __builtin_mve_vcmpcsq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vcaddq_rot90_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vcaddq_rot270_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vbicq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vandq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_p_u8 (uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddvq_p_uv16qi (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_u8 (uint32_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vaddvaq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_n_u8 (uint8x16_t __a, uint8_t __b)
+ {
+   return __builtin_mve_vaddq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vabdq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_r_u8 (uint8x16_t __a, int32_t __b)
+ {
+   return __builtin_mve_vshlq_r_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_u8 (uint8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vrshlq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_n_u8 (uint8x16_t __a, int32_t __b)
+ {
+   return __builtin_mve_vrshlq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_u8 (uint8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqshlq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_r_u8 (uint8x16_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqshlq_r_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_u8 (uint8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqrshlq_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_n_u8 (uint8x16_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqrshlq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminavq_s8 (uint8_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vminavq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminaq_s8 (uint8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vminaq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxavq_s8 (uint8_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vmaxavq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxaq_s8 (uint8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vmaxaq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_n_u8 (uint8x16_t __a, int32_t __b)
+ {
+   return __builtin_mve_vbrsrq_n_uv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_n_u8 (uint8x16_t __a, const int __imm)
+ {
+   return __builtin_mve_vshlq_n_uv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_n_u8 (uint8x16_t __a, const int __imm)
+ {
+   return __builtin_mve_vrshrq_n_uv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_n_u8 (uint8x16_t __a, const int __imm)
+ {
+   return __builtin_mve_vqshlq_n_uv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vcmpneq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vcmpltq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vcmpltq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vcmpleq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vcmpleq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vcmpgtq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vcmpgtq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vcmpgeq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vcmpgeq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vcmpeqq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vcmpeqq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshluq_n_s8 (int8x16_t __a, const int __imm)
+ {
+   return __builtin_mve_vqshluq_n_sv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_p_s8 (int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddvq_p_sv16qi (__a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vsubq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vsubq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_r_s8 (int8x16_t __a, int32_t __b)
+ {
+   return __builtin_mve_vshlq_r_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vrshlq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_n_s8 (int8x16_t __a, int32_t __b)
+ {
+   return __builtin_mve_vrshlq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vrmulhq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vrhaddq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqsubq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vqsubq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqshlq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_r_s8 (int8x16_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqshlq_r_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqrshlq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_n_s8 (int8x16_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqrshlq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqrdmulhq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vqrdmulhq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqdmulhq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vqdmulhq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqaddq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vqaddq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vorrq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vornq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vmulq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vmulq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vmulltq_int_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vmullbq_int_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vmulhq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavxq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vmlsdavxq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vmlsdavq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavxq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vmladavxq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vmladavq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_s8 (int8_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vminvq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vminq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_s8 (int8_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vmaxvq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vmaxq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vhsubq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vhsubq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vhcaddq_rot90_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vhcaddq_rot270_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vhaddq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vhaddq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_veorq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vcaddq_rot90_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vcaddq_rot270_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_n_s8 (int8x16_t __a, int32_t __b)
+ {
+   return __builtin_mve_vbrsrq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vbicq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vandq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_s8 (int32_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vaddvaq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_n_s8 (int8x16_t __a, int8_t __b)
+ {
+   return __builtin_mve_vaddq_n_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vabdq_sv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_n_s8 (int8x16_t __a, const int __imm)
+ {
+   return __builtin_mve_vshlq_n_sv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_n_s8 (int8x16_t __a, const int __imm)
+ {
+   return __builtin_mve_vrshrq_n_sv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_n_s8 (int8x16_t __a, const int __imm)
+ {
+   return __builtin_mve_vqshlq_n_sv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vsubq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_n_u16 (uint16x8_t __a, uint16_t __b)
+ {
+   return __builtin_mve_vsubq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vrmulhq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vrhaddq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vqsubq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_n_u16 (uint16x8_t __a, uint16_t __b)
+ {
+   return __builtin_mve_vqsubq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vqaddq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_n_u16 (uint16x8_t __a, uint16_t __b)
+ {
+   return __builtin_mve_vqaddq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vorrq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vornq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vmulq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_n_u16 (uint16x8_t __a, uint16_t __b)
+ {
+   return __builtin_mve_vmulq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vmulltq_int_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vmullbq_int_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vmulhq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vmladavq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_u16 (uint16_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vminvq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vminq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_u16 (uint16_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vmaxvq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vmaxq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vhsubq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_n_u16 (uint16x8_t __a, uint16_t __b)
+ {
+   return __builtin_mve_vhsubq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vhaddq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_n_u16 (uint16x8_t __a, uint16_t __b)
+ {
+   return __builtin_mve_vhaddq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_veorq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_n_u16 (uint16x8_t __a, uint16_t __b)
+ {
+   return __builtin_mve_vcmpneq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vcmphiq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_n_u16 (uint16x8_t __a, uint16_t __b)
+ {
+   return __builtin_mve_vcmphiq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vcmpeqq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_n_u16 (uint16x8_t __a, uint16_t __b)
+ {
+   return __builtin_mve_vcmpeqq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vcmpcsq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_n_u16 (uint16x8_t __a, uint16_t __b)
+ {
+   return __builtin_mve_vcmpcsq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vcaddq_rot90_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vcaddq_rot270_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vbicq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vandq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_p_u16 (uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddvq_p_uv8hi (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_u16 (uint32_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vaddvaq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_n_u16 (uint16x8_t __a, uint16_t __b)
+ {
+   return __builtin_mve_vaddq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vabdq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_r_u16 (uint16x8_t __a, int32_t __b)
+ {
+   return __builtin_mve_vshlq_r_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_u16 (uint16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vrshlq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_n_u16 (uint16x8_t __a, int32_t __b)
+ {
+   return __builtin_mve_vrshlq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_u16 (uint16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqshlq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_r_u16 (uint16x8_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqshlq_r_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_u16 (uint16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqrshlq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_n_u16 (uint16x8_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqrshlq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminavq_s16 (uint16_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vminavq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminaq_s16 (uint16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vminaq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxavq_s16 (uint16_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmaxavq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxaq_s16 (uint16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmaxaq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_n_u16 (uint16x8_t __a, int32_t __b)
+ {
+   return __builtin_mve_vbrsrq_n_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_n_u16 (uint16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vshlq_n_uv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_n_u16 (uint16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vrshrq_n_uv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_n_u16 (uint16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vqshlq_n_uv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vcmpneq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vcmpltq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vcmpltq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vcmpleq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vcmpleq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vcmpgtq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vcmpgtq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vcmpgeq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vcmpgeq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vcmpeqq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vcmpeqq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshluq_n_s16 (int16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vqshluq_n_sv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_p_s16 (int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddvq_p_sv8hi (__a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vsubq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vsubq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_r_s16 (int16x8_t __a, int32_t __b)
+ {
+   return __builtin_mve_vshlq_r_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vrshlq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_n_s16 (int16x8_t __a, int32_t __b)
+ {
+   return __builtin_mve_vrshlq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vrmulhq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vrhaddq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqsubq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vqsubq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqshlq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_r_s16 (int16x8_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqshlq_r_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqrshlq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_n_s16 (int16x8_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqrshlq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqrdmulhq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vqrdmulhq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqdmulhq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vqdmulhq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqaddq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vqaddq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vorrq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vornq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmulq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vmulq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmulltq_int_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmullbq_int_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmulhq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavxq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmlsdavxq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmlsdavq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavxq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmladavxq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmladavq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_s16 (int16_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vminvq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vminq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_s16 (int16_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmaxvq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmaxq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vhsubq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vhsubq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vhcaddq_rot90_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vhcaddq_rot270_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vhaddq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vhaddq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_veorq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vcaddq_rot90_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vcaddq_rot270_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_n_s16 (int16x8_t __a, int32_t __b)
+ {
+   return __builtin_mve_vbrsrq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vbicq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vandq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_s16 (int32_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vaddvaq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vaddq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vabdq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_n_s16 (int16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vshlq_n_sv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_n_s16 (int16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vrshrq_n_sv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_n_s16 (int16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vqshlq_n_sv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vsubq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_n_u32 (uint32x4_t __a, uint32_t __b)
+ {
+   return __builtin_mve_vsubq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vrmulhq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vrhaddq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vqsubq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_n_u32 (uint32x4_t __a, uint32_t __b)
+ {
+   return __builtin_mve_vqsubq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vqaddq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_n_u32 (uint32x4_t __a, uint32_t __b)
+ {
+   return __builtin_mve_vqaddq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vorrq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vornq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vmulq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_n_u32 (uint32x4_t __a, uint32_t __b)
+ {
+   return __builtin_mve_vmulq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vmulltq_int_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vmullbq_int_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vmulhq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vmladavq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_u32 (uint32_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vminvq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vminq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_u32 (uint32_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vmaxvq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vmaxq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vhsubq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_n_u32 (uint32x4_t __a, uint32_t __b)
+ {
+   return __builtin_mve_vhsubq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vhaddq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_n_u32 (uint32x4_t __a, uint32_t __b)
+ {
+   return __builtin_mve_vhaddq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_veorq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_n_u32 (uint32x4_t __a, uint32_t __b)
+ {
+   return __builtin_mve_vcmpneq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vcmphiq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_n_u32 (uint32x4_t __a, uint32_t __b)
+ {
+   return __builtin_mve_vcmphiq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vcmpeqq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_n_u32 (uint32x4_t __a, uint32_t __b)
+ {
+   return __builtin_mve_vcmpeqq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vcmpcsq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_n_u32 (uint32x4_t __a, uint32_t __b)
+ {
+   return __builtin_mve_vcmpcsq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vcaddq_rot90_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vcaddq_rot270_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vbicq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vandq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_p_u32 (uint32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddvq_p_uv4si (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_u32 (uint32_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vaddvaq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_n_u32 (uint32x4_t __a, uint32_t __b)
+ {
+   return __builtin_mve_vaddq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vabdq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_r_u32 (uint32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vshlq_r_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_u32 (uint32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vrshlq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_n_u32 (uint32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vrshlq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_u32 (uint32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqshlq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_r_u32 (uint32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqshlq_r_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_u32 (uint32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqrshlq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_n_u32 (uint32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqrshlq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminavq_s32 (uint32_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vminavq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminaq_s32 (uint32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vminaq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxavq_s32 (uint32_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmaxavq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxaq_s32 (uint32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmaxaq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_n_u32 (uint32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vbrsrq_n_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_n_u32 (uint32x4_t __a, const int __imm)
+ {
+   return __builtin_mve_vshlq_n_uv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_n_u32 (uint32x4_t __a, const int __imm)
+ {
+   return __builtin_mve_vrshrq_n_uv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_n_u32 (uint32x4_t __a, const int __imm)
+ {
+   return __builtin_mve_vqshlq_n_uv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vcmpneq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vcmpltq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vcmpltq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vcmpleq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vcmpleq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vcmpgtq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vcmpgtq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vcmpgeq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vcmpgeq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vcmpeqq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vcmpeqq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshluq_n_s32 (int32x4_t __a, const int __imm)
+ {
+   return __builtin_mve_vqshluq_n_sv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_p_s32 (int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddvq_p_sv4si (__a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vsubq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vsubq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_r_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vshlq_r_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vrshlq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vrshlq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vrmulhq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vrhaddq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqsubq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqsubq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqshlq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_r_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqshlq_r_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqrshlq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqrshlq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqrdmulhq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqrdmulhq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqdmulhq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqdmulhq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqaddq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqaddq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vorrq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vornq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmulq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vmulq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmulltq_int_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmullbq_int_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmulhq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavxq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmlsdavxq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmlsdavq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavxq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmladavxq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmladavq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_s32 (int32_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vminvq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vminq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_s32 (int32_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmaxvq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmaxq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vhsubq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vhsubq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vhcaddq_rot90_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vhcaddq_rot270_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vhaddq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vhaddq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_veorq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vcaddq_rot90_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vcaddq_rot270_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vbrsrq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vbicq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vandq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_s32 (int32_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vaddvaq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vaddq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vabdq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_n_s32 (int32x4_t __a, const int __imm)
+ {
+   return __builtin_mve_vshlq_n_sv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_n_s32 (int32x4_t __a, const int __imm)
+ {
+   return __builtin_mve_vrshrq_n_sv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_n_s32 (int32x4_t __a, const int __imm)
+ {
+   return __builtin_mve_vqshlq_n_sv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq_u16 (uint8x16_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vqmovntq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq_u16 (uint8x16_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vqmovnbq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_poly_p8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vmulltq_poly_pv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_poly_p8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_mve_vmullbq_poly_pv16qi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq_u16 (uint8x16_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vmovntq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq_u16 (uint8x16_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vmovnbq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vmlaldavq_uv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovuntq_s16 (uint8x16_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqmovuntq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovunbq_s16 (uint8x16_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqmovunbq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_n_u8 (uint8x16_t __a, const int __imm)
+ {
+   return __builtin_mve_vshlltq_n_uv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_n_u8 (uint8x16_t __a, const int __imm)
+ {
+   return __builtin_mve_vshllbq_n_uv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_n_u16 (uint16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vorrq_n_uv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_n_u16 (uint16x8_t __a, const uint16_t __imm)
+ {
+   return __builtin_mve_vbicq_n_uv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq_s16 (int8x16_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqmovntq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq_s16 (int8x16_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqmovnbq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqdmulltq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vqdmulltq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqdmullbq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq_n_s16 (int16x8_t __a, int16_t __b)
+ {
+   return __builtin_mve_vqdmullbq_n_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq_s16 (int8x16_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmovntq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq_s16 (int8x16_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmovnbq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavxq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmlsldavxq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmlsldavq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavxq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmlaldavxq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vmlaldavq_sv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_n_s8 (int8x16_t __a, const int __imm)
+ {
+   return __builtin_mve_vshlltq_n_sv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_n_s8 (int8x16_t __a, const int __imm)
+ {
+   return __builtin_mve_vshllbq_n_sv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_n_s16 (int16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vorrq_n_sv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_n_s16 (int16x8_t __a, const int16_t __imm)
+ {
+   return __builtin_mve_vbicq_n_sv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq_u32 (uint16x8_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vqmovntq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq_u32 (uint16x8_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vqmovnbq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_poly_p16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vmulltq_poly_pv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_poly_p16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __builtin_mve_vmullbq_poly_pv8hi (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq_u32 (uint16x8_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vmovntq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq_u32 (uint16x8_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vmovnbq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vmlaldavq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovuntq_s32 (uint16x8_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqmovuntq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovunbq_s32 (uint16x8_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqmovunbq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_n_u16 (uint16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vshlltq_n_uv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_n_u16 (uint16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vshllbq_n_uv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_n_u32 (uint32x4_t __a, const int __imm)
+ {
+   return __builtin_mve_vorrq_n_uv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_n_u32 (uint32x4_t __a, const uint32_t __imm)
+ {
+   return __builtin_mve_vbicq_n_uv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq_s32 (int16x8_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqmovntq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq_s32 (int16x8_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqmovnbq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqdmulltq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqdmulltq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqdmullbq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq_n_s32 (int32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vqdmullbq_n_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq_s32 (int16x8_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmovntq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq_s32 (int16x8_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmovnbq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavxq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmlsldavxq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmlsldavq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavxq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmlaldavxq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vmlaldavq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_n_s16 (int16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vshlltq_n_sv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_n_s16 (int16x8_t __a, const int __imm)
+ {
+   return __builtin_mve_vshllbq_n_sv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_n_s32 (int32x4_t __a, const int __imm)
+ {
+   return __builtin_mve_vorrq_n_sv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_n_s32 (int32x4_t __a, const int32_t __imm)
+ {
+   return __builtin_mve_vbicq_n_sv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vrmlaldavhq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vctp8q_m (uint32_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vctp8q_mhi (__a, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vctp64q_m (uint32_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vctp64q_mhi (__a, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vctp32q_m (uint32_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vctp32q_mhi (__a, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vctp16q_m (uint32_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vctp16q_mhi (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvaq_u32 (uint64_t __a, uint32x4_t __b)
+ {
+   return __builtin_mve_vaddlvaq_uv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhxq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vrmlsldavhxq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vrmlsldavhq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhxq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vrmlaldavhxq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vrmlaldavhq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvaq_s32 (int64_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vaddlvaq_sv4si (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_s8 (uint32_t __a, int8x16_t __b, int8x16_t __c)
+ {
+   return __builtin_mve_vabavq_sv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_s16 (uint32_t __a, int16x8_t __b, int16x8_t __c)
+ {
+   return __builtin_mve_vabavq_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_s32 (uint32_t __a, int32x4_t __b, int32x4_t __c)
+ {
+   return __builtin_mve_vabavq_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_u8 (uint32_t __a, uint8x16_t __b, uint8x16_t __c)
+ {
+   return __builtin_mve_vabavq_uv16qi(__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_u16 (uint32_t __a, uint16x8_t __b, uint16x8_t __c)
+ {
+   return __builtin_mve_vabavq_uv8hi(__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_u32 (uint32_t __a, uint32x4_t __b, uint32x4_t __c)
+ {
+   return __builtin_mve_vabavq_uv4si(__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_n_s16 (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_n_sv8hi (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_n_s32 (int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_n_sv4si (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_n_u16 (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_n_uv8hi (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_n_u32 (uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_n_uv4si (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vqrshrnbq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vqrshrnbq_n_uv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vqrshrnbq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vqrshrnbq_n_uv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrunbq_n_s16 (uint8x16_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vqrshrunbq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrunbq_n_s32 (uint16x8_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vqrshrunbq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhaq_s32 (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+   return __builtin_mve_vrmlaldavhaq_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhaq_u32 (uint64_t __a, uint32x4_t __b, uint32x4_t __c)
+ {
+   return __builtin_mve_vrmlaldavhaq_uv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_s8 (int8x16_t __a, uint32_t * __b, const int __imm)
+ {
+   int8x16_t __res = __builtin_mve_vshlcq_vec_sv16qi (__a, *__b, __imm);
+   *__b = __builtin_mve_vshlcq_carry_sv16qi (__a, *__b, __imm);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_u8 (uint8x16_t __a, uint32_t * __b, const int __imm)
+ {
+   uint8x16_t __res = __builtin_mve_vshlcq_vec_uv16qi (__a, *__b, __imm);
+   *__b = __builtin_mve_vshlcq_carry_uv16qi (__a, *__b, __imm);
+   return __res;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_s16 (int16x8_t __a, uint32_t * __b, const int __imm)
+ {
+   int16x8_t __res = __builtin_mve_vshlcq_vec_sv8hi (__a, *__b, __imm);
+   *__b = __builtin_mve_vshlcq_carry_sv8hi (__a, *__b, __imm);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_u16 (uint16x8_t __a, uint32_t * __b, const int __imm)
+ {
+   uint16x8_t __res = __builtin_mve_vshlcq_vec_uv8hi (__a, *__b, __imm);
+   *__b = __builtin_mve_vshlcq_carry_uv8hi (__a, *__b, __imm);
+   return __res;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_s32 (int32x4_t __a, uint32_t * __b, const int __imm)
+ {
+   int32x4_t __res = __builtin_mve_vshlcq_vec_sv4si (__a, *__b, __imm);
+   *__b = __builtin_mve_vshlcq_carry_sv4si (__a, *__b, __imm);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_u32 (uint32x4_t __a, uint32_t * __b, const int __imm)
+ {
+   uint32x4_t __res = __builtin_mve_vshlcq_vec_uv4si (__a, *__b, __imm);
+   *__b = __builtin_mve_vshlcq_carry_uv4si (__a, *__b, __imm);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vpselq_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vpselq_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m_u8 (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_uv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq_n_u8 (uint8x16_t __a, uint8x16_t __b, uint8_t __c)
+ {
+   return __builtin_mve_vqrdmlashq_n_uv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq_n_u8 (uint8x16_t __a, uint8x16_t __b, uint8_t __c)
+ {
+   return __builtin_mve_vqrdmlahq_n_uv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq_n_u8 (uint8x16_t __a, uint8x16_t __b, uint8_t __c)
+ {
+   return __builtin_mve_vqdmlahq_n_uv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_uv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_n_u8 (uint8x16_t __a, uint8x16_t __b, uint8_t __c)
+ {
+   return __builtin_mve_vmlasq_n_uv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_n_u8 (uint8x16_t __a, uint8x16_t __b, uint8_t __c)
+ {
+   return __builtin_mve_vmlaq_n_uv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_p_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavq_p_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_u8 (uint32_t __a, uint8x16_t __b, uint8x16_t __c)
+ {
+   return __builtin_mve_vmladavaq_uv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_p_u8 (uint8_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminvq_p_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_p_u8 (uint8_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxvq_p_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m_n_u8 (uint8x16_t __inactive, uint8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_uv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_n_u8 (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_n_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_m_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmphiq_m_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_m_n_u8 (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmphiq_m_n_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_n_u8 (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_n_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_m_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpcsq_m_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_m_n_u8 (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpcsq_m_n_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclzq_m_uv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_p_u8 (uint32_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddvaq_p_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __imm)
+ {
+   return __builtin_mve_vsriq_n_uv16qi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __imm)
+ {
+   return __builtin_mve_vsliq_n_uv16qi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_r_u8 (uint8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_r_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_n_u8 (uint8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_n_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_r_u8 (uint8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_r_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_n_u8 (uint8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshlq_m_n_uv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminavq_p_s8 (uint8_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminavq_p_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminaq_m_s8 (uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminaq_m_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxavq_p_s8 (uint8_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxavq_p_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxaq_m_s8 (uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxaq_m_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_n_s8 (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_n_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpltq_m_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m_n_s8 (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpltq_m_n_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpleq_m_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m_n_s8 (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpleq_m_n_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgtq_m_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m_n_s8 (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgtq_m_n_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgeq_m_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m_n_s8 (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgeq_m_n_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_n_s8 (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_n_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_r_s8 (int8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_r_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_n_s8 (int8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_n_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_sv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_r_s8 (int8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_r_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_n_s8 (int8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshlq_m_n_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqnegq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqnegq_m_sv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqabsq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqabsq_m_sv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vnegq_m_sv16qi (__inactive, __a, __p);
+ }
+ 
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_sv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavxq_p_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsdavxq_p_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavq_p_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsdavq_p_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavxq_p_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavxq_p_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_p_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavq_p_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_p_s8 (int8_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminvq_p_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_p_s8 (int8_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxvq_p_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m_n_s8 (int8x16_t __inactive, int8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_sv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclzq_m_sv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclsq_m_sv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_p_s8 (int32_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddvaq_p_sv16qi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabsq_m_sv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhxq_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqrdmlsdhxq_sv16qi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhq_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqrdmlsdhq_sv16qi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c)
+ {
+   return __builtin_mve_vqrdmlashq_n_sv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c)
+ {
+   return __builtin_mve_vqrdmlahq_n_sv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhxq_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqrdmladhxq_sv16qi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhq_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqrdmladhq_sv16qi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhxq_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqdmlsdhxq_sv16qi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhq_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqdmlsdhq_sv16qi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c)
+ {
+   return __builtin_mve_vqdmlahq_n_sv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhxq_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqdmladhxq_sv16qi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhq_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_mve_vqdmladhq_sv16qi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaxq_s8 (int32_t __a, int8x16_t __b, int8x16_t __c)
+ {
+   return __builtin_mve_vmlsdavaxq_sv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaq_s8 (int32_t __a, int8x16_t __b, int8x16_t __c)
+ {
+   return __builtin_mve_vmlsdavaq_sv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c)
+ {
+   return __builtin_mve_vmlasq_n_sv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c)
+ {
+   return __builtin_mve_vmlaq_n_sv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaxq_s8 (int32_t __a, int8x16_t __b, int8x16_t __c)
+ {
+   return __builtin_mve_vmladavaxq_sv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_s8 (int32_t __a, int8x16_t __b, int8x16_t __c)
+ {
+   return __builtin_mve_vmladavaq_sv16qi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_n_s8 (int8x16_t __a, int8x16_t __b, const int __imm)
+ {
+   return __builtin_mve_vsriq_n_sv16qi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_n_s8 (int8x16_t __a, int8x16_t __b, const int __imm)
+ {
+   return __builtin_mve_vsliq_n_sv16qi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vpselq_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vpselq_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m_u16 (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_uv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq_n_u16 (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+ {
+   return __builtin_mve_vqrdmlashq_n_uv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq_n_u16 (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+ {
+   return __builtin_mve_vqrdmlahq_n_uv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq_n_u16 (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+ {
+   return __builtin_mve_vqdmlahq_n_uv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_uv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_n_u16 (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+ {
+   return __builtin_mve_vmlasq_n_uv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_n_u16 (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+ {
+   return __builtin_mve_vmlaq_n_uv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_p_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavq_p_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_u16 (uint32_t __a, uint16x8_t __b, uint16x8_t __c)
+ {
+   return __builtin_mve_vmladavaq_uv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_p_u16 (uint16_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminvq_p_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_p_u16 (uint16_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxvq_p_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m_n_u16 (uint16x8_t __inactive, uint16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_uv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_n_u16 (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_n_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_m_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmphiq_m_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_m_n_u16 (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmphiq_m_n_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_n_u16 (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_n_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_m_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpcsq_m_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_m_n_u16 (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpcsq_m_n_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclzq_m_uv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_p_u16 (uint32_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddvaq_p_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vsriq_n_uv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vsliq_n_uv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_r_u16 (uint16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_r_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_n_u16 (uint16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_n_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_r_u16 (uint16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_r_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_n_u16 (uint16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshlq_m_n_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminavq_p_s16 (uint16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminavq_p_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminaq_m_s16 (uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminaq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxavq_p_s16 (uint16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxavq_p_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxaq_m_s16 (uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxaq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_n_s16 (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_n_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpltq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m_n_s16 (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpltq_m_n_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpleq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m_n_s16 (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpleq_m_n_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgtq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m_n_s16 (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgtq_m_n_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgeq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m_n_s16 (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgeq_m_n_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_n_s16 (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_n_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_r_s16 (int16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_r_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_n_s16 (int16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_n_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_r_s16 (int16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_r_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_n_s16 (int16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshlq_m_n_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqnegq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqnegq_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqabsq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqabsq_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vnegq_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavxq_p_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsdavxq_p_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavq_p_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsdavq_p_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavxq_p_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavxq_p_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_p_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavq_p_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_p_s16 (int16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminvq_p_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_p_s16 (int16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxvq_p_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m_n_s16 (int16x8_t __inactive, int16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclzq_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclsq_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_p_s16 (int32_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddvaq_p_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabsq_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhxq_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqrdmlsdhxq_sv8hi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhq_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqrdmlsdhq_sv8hi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
+ {
+   return __builtin_mve_vqrdmlashq_n_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
+ {
+   return __builtin_mve_vqrdmlahq_n_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhxq_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqrdmladhxq_sv8hi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhq_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqrdmladhq_sv8hi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhxq_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqdmlsdhxq_sv8hi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhq_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqdmlsdhq_sv8hi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
+ {
+   return __builtin_mve_vqdmlahq_n_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhxq_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqdmladhxq_sv8hi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhq_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+   return __builtin_mve_vqdmladhq_sv8hi (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaxq_s16 (int32_t __a, int16x8_t __b, int16x8_t __c)
+ {
+   return __builtin_mve_vmlsdavaxq_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaq_s16 (int32_t __a, int16x8_t __b, int16x8_t __c)
+ {
+   return __builtin_mve_vmlsdavaq_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
+ {
+   return __builtin_mve_vmlasq_n_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
+ {
+   return __builtin_mve_vmlaq_n_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaxq_s16 (int32_t __a, int16x8_t __b, int16x8_t __c)
+ {
+   return __builtin_mve_vmladavaxq_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_s16 (int32_t __a, int16x8_t __b, int16x8_t __c)
+ {
+   return __builtin_mve_vmladavaq_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_n_s16 (int16x8_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vsriq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_n_s16 (int16x8_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vsliq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vpselq_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vpselq_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m_u32 (uint32x4_t __inactive, uint32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_uv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq_n_u32 (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+ {
+   return __builtin_mve_vqrdmlashq_n_uv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq_n_u32 (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+ {
+   return __builtin_mve_vqrdmlahq_n_uv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq_n_u32 (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+ {
+   return __builtin_mve_vqdmlahq_n_uv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_uv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_n_u32 (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+ {
+   return __builtin_mve_vmlasq_n_uv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_n_u32 (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+ {
+   return __builtin_mve_vmlaq_n_uv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_p_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavq_p_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_u32 (uint32_t __a, uint32x4_t __b, uint32x4_t __c)
+ {
+   return __builtin_mve_vmladavaq_uv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_p_u32 (uint32_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminvq_p_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_p_u32 (uint32_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxvq_p_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m_n_u32 (uint32x4_t __inactive, uint32_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_uv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_n_u32 (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_n_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_m_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmphiq_m_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_m_n_u32 (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmphiq_m_n_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_n_u32 (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_n_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_m_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpcsq_m_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_m_n_u32 (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpcsq_m_n_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclzq_m_uv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_p_u32 (uint32_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddvaq_p_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vsriq_n_uv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vsliq_n_uv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_r_u32 (uint32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_r_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_n_u32 (uint32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_n_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_r_u32 (uint32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_r_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_n_u32 (uint32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshlq_m_n_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminavq_p_s32 (uint32_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminavq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminaq_m_s32 (uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminaq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxavq_p_s32 (uint32_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxavq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxaq_m_s32 (uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxaq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_n_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpltq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpltq_m_n_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpleq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpleq_m_n_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgtq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgtq_m_n_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgeq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgeq_m_n_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_n_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_r_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_r_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_n_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_r_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_r_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshlq_m_n_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqnegq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqnegq_m_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqabsq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqabsq_m_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vnegq_m_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavxq_p_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsdavxq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavq_p_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsdavq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavxq_p_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavxq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_p_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_p_s32 (int32_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminvq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_p_s32 (int32_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxvq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m_n_s32 (int32x4_t __inactive, int32_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclzq_m_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclsq_m_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_p_s32 (int32_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddvaq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabsq_m_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhxq_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqrdmlsdhxq_sv4si (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhq_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqrdmlsdhq_sv4si (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
+ {
+   return __builtin_mve_vqrdmlashq_n_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
+ {
+   return __builtin_mve_vqrdmlahq_n_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhxq_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqrdmladhxq_sv4si (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhq_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqrdmladhq_sv4si (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhxq_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqdmlsdhxq_sv4si (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhq_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqdmlsdhq_sv4si (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
+ {
+   return __builtin_mve_vqdmlahq_n_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhxq_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqdmladhxq_sv4si (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhq_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+   return __builtin_mve_vqdmladhq_sv4si (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaxq_s32 (int32_t __a, int32x4_t __b, int32x4_t __c)
+ {
+   return __builtin_mve_vmlsdavaxq_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaq_s32 (int32_t __a, int32x4_t __b, int32x4_t __c)
+ {
+   return __builtin_mve_vmlsdavaq_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
+ {
+   return __builtin_mve_vmlasq_n_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
+ {
+   return __builtin_mve_vmlaq_n_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaxq_s32 (int32_t __a, int32x4_t __b, int32x4_t __c)
+ {
+   return __builtin_mve_vmladavaxq_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_s32 (int32_t __a, int32x4_t __b, int32x4_t __c)
+ {
+   return __builtin_mve_vmladavaq_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_n_s32 (int32x4_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vsriq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_n_s32 (int32x4_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vsliq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq_u64 (uint64x2_t __a, uint64x2_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vpselq_uv2di (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq_s64 (int64x2_t __a, int64x2_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vpselq_sv2di (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhaxq_s32 (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+   return __builtin_mve_vrmlaldavhaxq_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhaq_s32 (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+   return __builtin_mve_vrmlsldavhaq_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhaxq_s32 (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+   return __builtin_mve_vrmlsldavhaxq_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvaq_p_s32 (int64_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddlvaq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev16q_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev16q_m_sv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhq_p_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmlaldavhq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhxq_p_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmlaldavhxq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhq_p_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmlsldavhq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhxq_p_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmlsldavhxq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvaq_p_u32 (uint64_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddlvaq_p_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev16q_m_u8 (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev16q_m_uv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhq_p_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmlaldavhq_p_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m_n_s16 (int16x8_t __inactive, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_n_sv8hi (__inactive, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_n_s16 (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_n_sv8hi (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vqrshrntq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vqshrnbq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vqshrntq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vrshrnbq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vrshrntq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vshrnbq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vshrntq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq_s16 (int64_t __a, int16x8_t __b, int16x8_t __c)
+ {
+   return __builtin_mve_vmlaldavaq_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaxq_s16 (int64_t __a, int16x8_t __b, int16x8_t __c)
+ {
+   return __builtin_mve_vmlaldavaxq_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaq_s16 (int64_t __a, int16x8_t __b, int16x8_t __c)
+ {
+   return __builtin_mve_vmlsldavaq_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaxq_s16 (int64_t __a, int16x8_t __b, int16x8_t __c)
+ {
+   return __builtin_mve_vmlsldavaxq_sv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq_p_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavq_p_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavxq_p_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavxq_p_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavq_p_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsldavq_p_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavxq_p_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsldavxq_p_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_m_s8 (int16x8_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovlbq_m_sv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_m_s8 (int16x8_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovltq_m_sv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq_m_s16 (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovnbq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq_m_s16 (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovntq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq_m_s16 (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqmovnbq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq_m_s16 (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqmovntq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev32q_m_sv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m_n_u16 (uint16x8_t __inactive, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_n_uv8hi (__inactive, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_n_u16 (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_n_uv8hi (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshruntq_n_s16 (uint8x16_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vqrshruntq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrunbq_n_s16 (uint8x16_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vqshrunbq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshruntq_n_s16 (uint8x16_t __a, int16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vqshruntq_n_sv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovunbq_m_s16 (uint8x16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqmovunbq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovuntq_m_s16 (uint8x16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqmovuntq_m_sv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vqrshrntq_n_uv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vqshrnbq_n_uv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vqshrntq_n_uv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vrshrnbq_n_uv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vrshrntq_n_uv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vshrnbq_n_uv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+   return __builtin_mve_vshrntq_n_uv8hi (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq_u16 (uint64_t __a, uint16x8_t __b, uint16x8_t __c)
+ {
+   return __builtin_mve_vmlaldavaq_uv8hi (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq_p_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavq_p_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_m_u8 (uint16x8_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovlbq_m_uv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_m_u8 (uint16x8_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovltq_m_uv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq_m_u16 (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovnbq_m_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq_m_u16 (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovntq_m_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq_m_u16 (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqmovnbq_m_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq_m_u16 (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqmovntq_m_uv8hi (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_m_u8 (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev32q_m_uv16qi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m_n_s32 (int32x4_t __inactive, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_n_sv4si (__inactive, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_n_s32 (int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_n_sv4si (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vqrshrntq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vqshrnbq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vqshrntq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vrshrnbq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vrshrntq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vshrnbq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vshrntq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq_s32 (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+   return __builtin_mve_vmlaldavaq_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaxq_s32 (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+   return __builtin_mve_vmlaldavaxq_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaq_s32 (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+   return __builtin_mve_vmlsldavaq_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaxq_s32 (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+   return __builtin_mve_vmlsldavaxq_sv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq_p_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavxq_p_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavxq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavq_p_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsldavq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavxq_p_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsldavxq_p_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_m_s16 (int32x4_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovlbq_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_m_s16 (int32x4_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovltq_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq_m_s32 (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovnbq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq_m_s32 (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovntq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq_m_s32 (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqmovnbq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq_m_s32 (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqmovntq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev32q_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m_n_u32 (uint32x4_t __inactive, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_n_uv4si (__inactive, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_n_u32 (uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_n_uv4si (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshruntq_n_s32 (uint16x8_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vqrshruntq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrunbq_n_s32 (uint16x8_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vqshrunbq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshruntq_n_s32 (uint16x8_t __a, int32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vqshruntq_n_sv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovunbq_m_s32 (uint16x8_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqmovunbq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovuntq_m_s32 (uint16x8_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqmovuntq_m_sv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vqrshrntq_n_uv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vqshrnbq_n_uv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vqshrntq_n_uv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vrshrnbq_n_uv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vrshrntq_n_uv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vshrnbq_n_uv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+   return __builtin_mve_vshrntq_n_uv4si (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq_u32 (uint64_t __a, uint32x4_t __b, uint32x4_t __c)
+ {
+   return __builtin_mve_vmlaldavaq_uv4si (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq_p_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavq_p_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_m_u16 (uint32x4_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovlbq_m_uv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_m_u16 (uint32x4_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovltq_m_uv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq_m_u32 (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovnbq_m_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq_m_u32 (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovntq_m_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq_m_u32 (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqmovnbq_m_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq_m_u32 (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqmovntq_m_uv4si (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_m_u16 (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev32q_m_uv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_m_n_s8 (int8x16_t __a, int8x16_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsriq_m_n_sv16qi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshluq_m_n_s8 (uint8x16_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshluq_m_n_sv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_p_s8 (uint32_t __a, int8x16_t __b, int8x16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabavq_p_sv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_m_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsriq_m_n_uv16qi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_p_u8 (uint32_t __a, uint8x16_t __b, uint8x16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabavq_p_uv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_m_n_s16 (int16x8_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsriq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshluq_m_n_s16 (uint16x8_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshluq_m_n_sv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_p_s16 (uint32_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabavq_p_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_m_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsriq_m_n_uv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_p_u16 (uint32_t __a, uint16x8_t __b, uint16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabavq_p_uv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_m_n_s32 (int32x4_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsriq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshluq_m_n_s32 (uint32x4_t __inactive, int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshluq_m_n_sv4si (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_p_s32 (uint32_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabavq_p_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_m_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsriq_m_n_uv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_p_u32 (uint32_t __a, uint32x4_t __b, uint32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabavq_p_uv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_n_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_n_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_n_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_n_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_n_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_n_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhcaddq_rot270_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhcaddq_rot270_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhcaddq_rot270_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhcaddq_rot90_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhcaddq_rot90_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhcaddq_rot90_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_n_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_n_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_n_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_n_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_n_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_n_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_p_s8 (int32_t __a, int8x16_t __b, int8x16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavaq_p_sv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_p_s32 (int32_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavaq_p_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_p_s16 (int32_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavaq_p_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_p_u8 (uint32_t __a, uint8x16_t __b, uint8x16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavaq_p_uv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_p_u32 (uint32_t __a, uint32x4_t __b, uint32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavaq_p_uv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_p_u16 (uint32_t __a, uint16x8_t __b, uint16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavaq_p_uv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaxq_p_s8 (int32_t __a, int8x16_t __b, int8x16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavaxq_p_sv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaxq_p_s32 (int32_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavaxq_p_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaxq_p_s16 (int32_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmladavaxq_p_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_m_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaq_m_n_sv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_m_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaq_m_n_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_m_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaq_m_n_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_m_n_u8 (uint8x16_t __a, uint8x16_t __b, uint8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaq_m_n_uv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_m_n_u32 (uint32x4_t __a, uint32x4_t __b, uint32_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaq_m_n_uv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_m_n_u16 (uint16x8_t __a, uint16x8_t __b, uint16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaq_m_n_uv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_m_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlasq_m_n_sv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_m_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlasq_m_n_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_m_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlasq_m_n_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_m_n_u8 (uint8x16_t __a, uint8x16_t __b, uint8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlasq_m_n_uv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_m_n_u32 (uint32x4_t __a, uint32x4_t __b, uint32_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlasq_m_n_uv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_m_n_u16 (uint16x8_t __a, uint16x8_t __b, uint16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlasq_m_n_uv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaq_p_s8 (int32_t __a, int8x16_t __b, int8x16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsdavaq_p_sv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaq_p_s32 (int32_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsdavaq_p_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaq_p_s16 (int32_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsdavaq_p_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaxq_p_s8 (int32_t __a, int8x16_t __b, int8x16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsdavaxq_p_sv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaxq_p_s32 (int32_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsdavaxq_p_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaxq_p_s16 (int32_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsdavaxq_p_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulhq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulhq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulhq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulhq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulhq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulhq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_m_s8 (int16x8_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_int_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_m_s32 (int64x2_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_int_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_m_s16 (int32x4_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_int_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_m_u8 (uint16x8_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_int_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_m_u32 (uint64x2_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_int_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_m_u16 (uint32x4_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_int_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_m_s8 (int16x8_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_int_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_m_s32 (int64x2_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_int_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_m_s16 (int32x4_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_int_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_m_u8 (uint16x8_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_int_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_m_u32 (uint64x2_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_int_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_m_u16 (uint32x4_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_int_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqaddq_m_n_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqaddq_m_n_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqaddq_m_n_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqaddq_m_n_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqaddq_m_n_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqaddq_m_n_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqaddq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqaddq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqaddq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqaddq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqaddq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqaddq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmladhq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmladhq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmladhq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhxq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmladhxq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhxq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmladhxq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhxq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmladhxq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq_m_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmlahq_m_n_sv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq_m_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmlahq_m_n_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq_m_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmlahq_m_n_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmlsdhq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmlsdhq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmlsdhq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhxq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmlsdhxq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhxq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmlsdhxq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhxq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmlsdhxq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmulhq_m_n_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmulhq_m_n_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmulhq_m_n_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmulhq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmulhq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmulhq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmladhq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmladhq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmladhq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhxq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmladhxq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhxq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmladhxq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhxq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmladhxq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq_m_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmlahq_m_n_sv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq_m_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmlahq_m_n_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq_m_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmlahq_m_n_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq_m_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmlashq_m_n_sv16qi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq_m_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmlashq_m_n_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq_m_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmlashq_m_n_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmlsdhq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmlsdhq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmlsdhq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhxq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmlsdhxq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhxq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmlsdhxq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhxq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmlsdhxq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmulhq_m_n_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmulhq_m_n_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmulhq_m_n_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmulhq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmulhq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrdmulhq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshlq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshlq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshlq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshlq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshlq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshlq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_n_sv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_n_sv4si (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_n_sv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_n_uv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_n_uv4si (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_n_uv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshlq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqsubq_m_n_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqsubq_m_n_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqsubq_m_n_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqsubq_m_n_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqsubq_m_n_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqsubq_m_n_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqsubq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqsubq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqsubq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqsubq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqsubq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqsubq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrhaddq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrhaddq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrhaddq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrhaddq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrhaddq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrhaddq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmulhq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmulhq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmulhq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmulhq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmulhq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmulhq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrq_m_n_sv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrq_m_n_sv4si (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrq_m_n_sv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrq_m_n_uv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrq_m_n_uv4si (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrq_m_n_uv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_n_sv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_n_sv4si (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_n_sv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_n_uv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_n_uv4si (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_n_uv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrq_m_n_sv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrq_m_n_sv4si (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrq_m_n_sv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrq_m_n_uv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrq_m_n_uv4si (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrq_m_n_uv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_m_n_s8 (int8x16_t __a, int8x16_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsliq_m_n_sv16qi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_m_n_s32 (int32x4_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsliq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_m_n_s16 (int16x8_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsliq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_m_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsliq_m_n_uv16qi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_m_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsliq_m_n_uv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_m_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsliq_m_n_uv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_sv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_uv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_uv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_uv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq_p_s32 (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavaq_p_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq_p_s16 (int64_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavaq_p_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq_p_u32 (uint64_t __a, uint32x4_t __b, uint32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavaq_p_uv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq_p_u16 (uint64_t __a, uint16x8_t __b, uint16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavaq_p_uv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaxq_p_s32 (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavaxq_p_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaxq_p_s16 (int64_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavaxq_p_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaxq_p_u32 (uint64_t __a, uint32x4_t __b, uint32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavaxq_p_uv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaxq_p_u16 (uint64_t __a, uint16x8_t __b, uint16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlaldavaxq_p_uv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaq_p_s32 (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsldavaq_p_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaq_p_s16 (int64_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsldavaq_p_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaxq_p_s32 (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsldavaxq_p_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaxq_p_s16 (int64_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmlsldavaxq_p_sv8hi (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_poly_m_p8 (uint16x8_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_poly_m_pv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_poly_m_p16 (uint32x4_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_poly_m_pv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_poly_m_p8 (uint16x8_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_poly_m_pv16qi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_poly_m_p16 (uint32x4_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_poly_m_pv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq_m_n_s32 (int64x2_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmullbq_m_n_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq_m_n_s16 (int32x4_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmullbq_m_n_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq_m_s32 (int64x2_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmullbq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq_m_s16 (int32x4_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmullbq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq_m_n_s32 (int64x2_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmulltq_m_n_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq_m_n_s16 (int32x4_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmulltq_m_n_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq_m_s32 (int64x2_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmulltq_m_sv4si (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq_m_s16 (int32x4_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqdmulltq_m_sv8hi (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq_m_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshrnbq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq_m_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshrnbq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq_m_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshrnbq_m_n_uv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq_m_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshrnbq_m_n_uv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq_m_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshrntq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq_m_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshrntq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq_m_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshrntq_m_n_uv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq_m_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshrntq_m_n_uv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrunbq_m_n_s32 (uint16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshrunbq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrunbq_m_n_s16 (uint8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshrunbq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshruntq_m_n_s32 (uint16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshruntq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshruntq_m_n_s16 (uint8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqrshruntq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq_m_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshrnbq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq_m_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshrnbq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq_m_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshrnbq_m_n_uv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq_m_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshrnbq_m_n_uv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq_m_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshrntq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq_m_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshrntq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq_m_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshrntq_m_n_uv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq_m_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshrntq_m_n_uv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrunbq_m_n_s32 (uint16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshrunbq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrunbq_m_n_s16 (uint8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshrunbq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshruntq_m_n_s32 (uint16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshruntq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshruntq_m_n_s16 (uint8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vqshruntq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhaq_p_s32 (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmlaldavhaq_p_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhaq_p_u32 (uint64_t __a, uint32x4_t __b, uint32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmlaldavhaq_p_uv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhaxq_p_s32 (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmlaldavhaxq_p_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhaq_p_s32 (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmlsldavhaq_p_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhaxq_p_s32 (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmlsldavhaxq_p_sv4si (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq_m_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrnbq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq_m_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrnbq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq_m_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrnbq_m_n_uv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq_m_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrnbq_m_n_uv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq_m_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrntq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq_m_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrntq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq_m_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrntq_m_n_uv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq_m_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrntq_m_n_uv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_m_n_s8 (int16x8_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshllbq_m_n_sv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_m_n_s16 (int32x4_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshllbq_m_n_sv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_m_n_u8 (uint16x8_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshllbq_m_n_uv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_m_n_u16 (uint32x4_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshllbq_m_n_uv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_m_n_s8 (int16x8_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlltq_m_n_sv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_m_n_s16 (int32x4_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlltq_m_n_sv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_m_n_u8 (uint16x8_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlltq_m_n_uv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_m_n_u16 (uint32x4_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlltq_m_n_uv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq_m_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrnbq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq_m_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrnbq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq_m_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrnbq_m_n_uv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq_m_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrnbq_m_n_uv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq_m_n_s32 (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrntq_m_n_sv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq_m_n_s16 (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrntq_m_n_sv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq_m_n_u32 (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrntq_m_n_uv4si (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq_m_n_u16 (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrntq_m_n_uv8hi (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_s8 (int8_t * __base, uint8x16_t __offset, int8x16_t __value)
+ {
+   __builtin_mve_vstrbq_scatter_offset_sv16qi ((__builtin_neon_qi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_s32 (int8_t * __base, uint32x4_t __offset, int32x4_t __value)
+ {
+   __builtin_mve_vstrbq_scatter_offset_sv4si ((__builtin_neon_qi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_s16 (int8_t * __base, uint16x8_t __offset, int16x8_t __value)
+ {
+   __builtin_mve_vstrbq_scatter_offset_sv8hi ((__builtin_neon_qi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_u8 (uint8_t * __base, uint8x16_t __offset, uint8x16_t __value)
+ {
+   __builtin_mve_vstrbq_scatter_offset_uv16qi ((__builtin_neon_qi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_u32 (uint8_t * __base, uint32x4_t __offset, uint32x4_t __value)
+ {
+   __builtin_mve_vstrbq_scatter_offset_uv4si ((__builtin_neon_qi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_u16 (uint8_t * __base, uint16x8_t __offset, uint16x8_t __value)
+ {
+   __builtin_mve_vstrbq_scatter_offset_uv8hi ((__builtin_neon_qi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_s8 (int8_t * __addr, int8x16_t __value)
+ {
+   __builtin_mve_vstrbq_sv16qi ((__builtin_neon_qi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_s32 (int8_t * __addr, int32x4_t __value)
+ {
+   __builtin_mve_vstrbq_sv4si ((__builtin_neon_qi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_s16 (int8_t * __addr, int16x8_t __value)
+ {
+   __builtin_mve_vstrbq_sv8hi ((__builtin_neon_qi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_u8 (uint8_t * __addr, uint8x16_t __value)
+ {
+   __builtin_mve_vstrbq_uv16qi ((__builtin_neon_qi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_u32 (uint8_t * __addr, uint32x4_t __value)
+ {
+   __builtin_mve_vstrbq_uv4si ((__builtin_neon_qi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_u16 (uint8_t * __addr, uint16x8_t __value)
+ {
+   __builtin_mve_vstrbq_uv8hi ((__builtin_neon_qi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_s32 (uint32x4_t __addr, const int __offset, int32x4_t __value)
+ {
+   __builtin_mve_vstrwq_scatter_base_sv4si (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_u32 (uint32x4_t __addr, const int __offset, uint32x4_t __value)
+ {
+   __builtin_mve_vstrwq_scatter_base_uv4si (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_u8 (uint8_t const * __base, uint8x16_t __offset)
+ {
+   return __builtin_mve_vldrbq_gather_offset_uv16qi ((__builtin_neon_qi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_s8 (int8_t const * __base, uint8x16_t __offset)
+ {
+   return __builtin_mve_vldrbq_gather_offset_sv16qi ((__builtin_neon_qi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_s8 (int8_t const * __base)
+ {
+   return __builtin_mve_vldrbq_sv16qi ((__builtin_neon_qi *) __base);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_u8 (uint8_t const * __base)
+ {
+   return __builtin_mve_vldrbq_uv16qi ((__builtin_neon_qi *) __base);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_u16 (uint8_t const * __base, uint16x8_t __offset)
+ {
+   return __builtin_mve_vldrbq_gather_offset_uv8hi ((__builtin_neon_qi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_s16 (int8_t const * __base, uint16x8_t __offset)
+ {
+   return __builtin_mve_vldrbq_gather_offset_sv8hi ((__builtin_neon_qi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_s16 (int8_t const * __base)
+ {
+   return __builtin_mve_vldrbq_sv8hi ((__builtin_neon_qi *) __base);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_u16 (uint8_t const * __base)
+ {
+   return __builtin_mve_vldrbq_uv8hi ((__builtin_neon_qi *) __base);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_u32 (uint8_t const * __base, uint32x4_t __offset)
+ {
+   return __builtin_mve_vldrbq_gather_offset_uv4si ((__builtin_neon_qi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_s32 (int8_t const * __base, uint32x4_t __offset)
+ {
+   return __builtin_mve_vldrbq_gather_offset_sv4si ((__builtin_neon_qi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_s32 (int8_t const * __base)
+ {
+   return __builtin_mve_vldrbq_sv4si ((__builtin_neon_qi *) __base);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_u32 (uint8_t const * __base)
+ {
+   return __builtin_mve_vldrbq_uv4si ((__builtin_neon_qi *) __base);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_base_s32 (uint32x4_t __addr, const int __offset)
+ {
+   return __builtin_mve_vldrwq_gather_base_sv4si (__addr, __offset);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_base_u32 (uint32x4_t __addr, const int __offset)
+ {
+   return __builtin_mve_vldrwq_gather_base_uv4si (__addr, __offset);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_p_s8 (int8_t * __addr, int8x16_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrbq_p_sv16qi ((__builtin_neon_qi *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_p_s32 (int8_t * __addr, int32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrbq_p_sv4si ((__builtin_neon_qi *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_p_s16 (int8_t * __addr, int16x8_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrbq_p_sv8hi ((__builtin_neon_qi *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_p_u8 (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrbq_p_uv16qi ((__builtin_neon_qi *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_p_u32 (uint8_t * __addr, uint32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrbq_p_uv4si ((__builtin_neon_qi *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_p_u16 (uint8_t * __addr, uint16x8_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrbq_p_uv8hi ((__builtin_neon_qi *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_p_s8 (int8_t * __base, uint8x16_t __offset, int8x16_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrbq_scatter_offset_p_sv16qi ((__builtin_neon_qi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_p_s32 (int8_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrbq_scatter_offset_p_sv4si ((__builtin_neon_qi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_p_s16 (int8_t * __base, uint16x8_t __offset, int16x8_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrbq_scatter_offset_p_sv8hi ((__builtin_neon_qi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_p_u8 (uint8_t * __base, uint8x16_t __offset, uint8x16_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrbq_scatter_offset_p_uv16qi ((__builtin_neon_qi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_p_u32 (uint8_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrbq_scatter_offset_p_uv4si ((__builtin_neon_qi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_p_u16 (uint8_t * __base, uint16x8_t __offset, uint16x8_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrbq_scatter_offset_p_uv8hi ((__builtin_neon_qi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_p_s32 (uint32x4_t __addr, const int __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_scatter_base_p_sv4si (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_p_u32 (uint32x4_t __addr, const int __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_scatter_base_p_uv4si (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_z_s8 (int8_t const * __base, uint8x16_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrbq_gather_offset_z_sv16qi ((__builtin_neon_qi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_z_s32 (int8_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrbq_gather_offset_z_sv4si ((__builtin_neon_qi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_z_s16 (int8_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrbq_gather_offset_z_sv8hi ((__builtin_neon_qi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_z_u8 (uint8_t const * __base, uint8x16_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrbq_gather_offset_z_uv16qi ((__builtin_neon_qi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_z_u32 (uint8_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrbq_gather_offset_z_uv4si ((__builtin_neon_qi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_z_u16 (uint8_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrbq_gather_offset_z_uv8hi ((__builtin_neon_qi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_z_s8 (int8_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrbq_z_sv16qi ((__builtin_neon_qi *) __base, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_z_s32 (int8_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrbq_z_sv4si ((__builtin_neon_qi *) __base, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_z_s16 (int8_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrbq_z_sv8hi ((__builtin_neon_qi *) __base, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_z_u8 (uint8_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrbq_z_uv16qi ((__builtin_neon_qi *) __base, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_z_u32 (uint8_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrbq_z_uv4si ((__builtin_neon_qi *) __base, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_z_u16 (uint8_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrbq_z_uv8hi ((__builtin_neon_qi *) __base, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_base_z_s32 (uint32x4_t __addr, const int __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrwq_gather_base_z_sv4si (__addr, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_base_z_u32 (uint32x4_t __addr, const int __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrwq_gather_base_z_uv4si (__addr, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_s8 (int8_t const * __base)
+ {
+   return __builtin_mve_vld1q_sv16qi ((__builtin_neon_qi *) __base);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_s32 (int32_t const * __base)
+ {
+   return __builtin_mve_vld1q_sv4si ((__builtin_neon_si *) __base);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_s16 (int16_t const * __base)
+ {
+   return __builtin_mve_vld1q_sv8hi ((__builtin_neon_hi *) __base);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_u8 (uint8_t const * __base)
+ {
+   return __builtin_mve_vld1q_uv16qi ((__builtin_neon_qi *) __base);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_u32 (uint32_t const * __base)
+ {
+   return __builtin_mve_vld1q_uv4si ((__builtin_neon_si *) __base);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_u16 (uint16_t const * __base)
+ {
+   return __builtin_mve_vld1q_uv8hi ((__builtin_neon_hi *) __base);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_s32 (int16_t const * __base, uint32x4_t __offset)
+ {
+   return __builtin_mve_vldrhq_gather_offset_sv4si ((__builtin_neon_hi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_s16 (int16_t const * __base, uint16x8_t __offset)
+ {
+   return __builtin_mve_vldrhq_gather_offset_sv8hi ((__builtin_neon_hi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_u32 (uint16_t const * __base, uint32x4_t __offset)
+ {
+   return __builtin_mve_vldrhq_gather_offset_uv4si ((__builtin_neon_hi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_u16 (uint16_t const * __base, uint16x8_t __offset)
+ {
+   return __builtin_mve_vldrhq_gather_offset_uv8hi ((__builtin_neon_hi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_z_s32 (int16_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_gather_offset_z_sv4si ((__builtin_neon_hi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_z_s16 (int16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_gather_offset_z_sv8hi ((__builtin_neon_hi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_z_u32 (uint16_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_gather_offset_z_uv4si ((__builtin_neon_hi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_z_u16 (uint16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_gather_offset_z_uv8hi ((__builtin_neon_hi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_s32 (int16_t const * __base, uint32x4_t __offset)
+ {
+   return __builtin_mve_vldrhq_gather_shifted_offset_sv4si ((__builtin_neon_hi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_s16 (int16_t const * __base, uint16x8_t __offset)
+ {
+   return __builtin_mve_vldrhq_gather_shifted_offset_sv8hi ((__builtin_neon_hi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_u32 (uint16_t const * __base, uint32x4_t __offset)
+ {
+   return __builtin_mve_vldrhq_gather_shifted_offset_uv4si ((__builtin_neon_hi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_u16 (uint16_t const * __base, uint16x8_t __offset)
+ {
+   return __builtin_mve_vldrhq_gather_shifted_offset_uv8hi ((__builtin_neon_hi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_z_s32 (int16_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_gather_shifted_offset_z_sv4si ((__builtin_neon_hi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_z_s16 (int16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_gather_shifted_offset_z_sv8hi ((__builtin_neon_hi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_z_u32 (uint16_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_gather_shifted_offset_z_uv4si ((__builtin_neon_hi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_z_u16 (uint16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_gather_shifted_offset_z_uv8hi ((__builtin_neon_hi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_s32 (int16_t const * __base)
+ {
+   return __builtin_mve_vldrhq_sv4si ((__builtin_neon_hi *) __base);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_s16 (int16_t const * __base)
+ {
+   return __builtin_mve_vldrhq_sv8hi ((__builtin_neon_hi *) __base);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_u32 (uint16_t const * __base)
+ {
+   return __builtin_mve_vldrhq_uv4si ((__builtin_neon_hi *) __base);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_u16 (uint16_t const * __base)
+ {
+   return __builtin_mve_vldrhq_uv8hi ((__builtin_neon_hi *) __base);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_z_s32 (int16_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_z_sv4si ((__builtin_neon_hi *) __base, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_z_s16 (int16_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_z_sv8hi ((__builtin_neon_hi *) __base, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_z_u32 (uint16_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_z_uv4si ((__builtin_neon_hi *) __base, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_z_u16 (uint16_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_z_uv8hi ((__builtin_neon_hi *) __base, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_s32 (int32_t const * __base)
+ {
+   return __builtin_mve_vldrwq_sv4si ((__builtin_neon_si *) __base);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_u32 (uint32_t const * __base)
+ {
+   return __builtin_mve_vldrwq_uv4si ((__builtin_neon_si *) __base);
+ }
+ 
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_z_s32 (int32_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrwq_z_sv4si ((__builtin_neon_si *) __base, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_z_u32 (uint32_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrwq_z_uv4si ((__builtin_neon_si *) __base, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_base_s64 (uint64x2_t __addr, const int __offset)
+ {
+   return __builtin_mve_vldrdq_gather_base_sv2di (__addr, __offset);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_base_u64 (uint64x2_t __addr, const int __offset)
+ {
+   return __builtin_mve_vldrdq_gather_base_uv2di (__addr, __offset);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_base_z_s64 (uint64x2_t __addr, const int __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrdq_gather_base_z_sv2di (__addr, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_base_z_u64 (uint64x2_t __addr, const int __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrdq_gather_base_z_uv2di (__addr, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_offset_s64 (int64_t const * __base, uint64x2_t __offset)
+ {
+   return __builtin_mve_vldrdq_gather_offset_sv2di ((__builtin_neon_di *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_offset_u64 (uint64_t const * __base, uint64x2_t __offset)
+ {
+   return __builtin_mve_vldrdq_gather_offset_uv2di ((__builtin_neon_di *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_offset_z_s64 (int64_t const * __base, uint64x2_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrdq_gather_offset_z_sv2di ((__builtin_neon_di *) __base, __offset, __p);
+ }
+ 
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_offset_z_u64 (uint64_t const * __base, uint64x2_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrdq_gather_offset_z_uv2di ((__builtin_neon_di *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_shifted_offset_s64 (int64_t const * __base, uint64x2_t __offset)
+ {
+   return __builtin_mve_vldrdq_gather_shifted_offset_sv2di ((__builtin_neon_di *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_shifted_offset_u64 (uint64_t const * __base, uint64x2_t __offset)
+ {
+   return __builtin_mve_vldrdq_gather_shifted_offset_uv2di ((__builtin_neon_di *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_shifted_offset_z_s64 (int64_t const * __base, uint64x2_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrdq_gather_shifted_offset_z_sv2di ((__builtin_neon_di *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_shifted_offset_z_u64 (uint64_t const * __base, uint64x2_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrdq_gather_shifted_offset_z_uv2di ((__builtin_neon_di *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_offset_s32 (int32_t const * __base, uint32x4_t __offset)
+ {
+   return __builtin_mve_vldrwq_gather_offset_sv4si ((__builtin_neon_si *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_offset_u32 (uint32_t const * __base, uint32x4_t __offset)
+ {
+   return __builtin_mve_vldrwq_gather_offset_uv4si ((__builtin_neon_si *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_offset_z_s32 (int32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrwq_gather_offset_z_sv4si ((__builtin_neon_si *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_offset_z_u32 (uint32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrwq_gather_offset_z_uv4si ((__builtin_neon_si *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_shifted_offset_s32 (int32_t const * __base, uint32x4_t __offset)
+ {
+   return __builtin_mve_vldrwq_gather_shifted_offset_sv4si ((__builtin_neon_si *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_shifted_offset_u32 (uint32_t const * __base, uint32x4_t __offset)
+ {
+   return __builtin_mve_vldrwq_gather_shifted_offset_uv4si ((__builtin_neon_si *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_shifted_offset_z_s32 (int32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrwq_gather_shifted_offset_z_sv4si ((__builtin_neon_si *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_shifted_offset_z_u32 (uint32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrwq_gather_shifted_offset_z_uv4si ((__builtin_neon_si *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_s8 (int8_t * __addr, int8x16_t __value)
+ {
+   __builtin_mve_vst1q_sv16qi ((__builtin_neon_qi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_s32 (int32_t * __addr, int32x4_t __value)
+ {
+   __builtin_mve_vst1q_sv4si ((__builtin_neon_si *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_s16 (int16_t * __addr, int16x8_t __value)
+ {
+   __builtin_mve_vst1q_sv8hi ((__builtin_neon_hi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_u8 (uint8_t * __addr, uint8x16_t __value)
+ {
+   __builtin_mve_vst1q_uv16qi ((__builtin_neon_qi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_u32 (uint32_t * __addr, uint32x4_t __value)
+ {
+   __builtin_mve_vst1q_uv4si ((__builtin_neon_si *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_u16 (uint16_t * __addr, uint16x8_t __value)
+ {
+   __builtin_mve_vst1q_uv8hi ((__builtin_neon_hi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_s32 (int16_t * __base, uint32x4_t __offset, int32x4_t __value)
+ {
+   __builtin_mve_vstrhq_scatter_offset_sv4si ((__builtin_neon_hi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_s16 (int16_t * __base, uint16x8_t __offset, int16x8_t __value)
+ {
+   __builtin_mve_vstrhq_scatter_offset_sv8hi ((__builtin_neon_hi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_u32 (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value)
+ {
+   __builtin_mve_vstrhq_scatter_offset_uv4si ((__builtin_neon_hi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_u16 (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value)
+ {
+   __builtin_mve_vstrhq_scatter_offset_uv8hi ((__builtin_neon_hi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_p_s32 (int16_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_scatter_offset_p_sv4si ((__builtin_neon_hi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_p_s16 (int16_t * __base, uint16x8_t __offset, int16x8_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_scatter_offset_p_sv8hi ((__builtin_neon_hi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_p_u32 (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_scatter_offset_p_uv4si ((__builtin_neon_hi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_p_u16 (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_scatter_offset_p_uv8hi ((__builtin_neon_hi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_s32 (int16_t * __base, uint32x4_t __offset, int32x4_t __value)
+ {
+   __builtin_mve_vstrhq_scatter_shifted_offset_sv4si ((__builtin_neon_hi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_s16 (int16_t * __base, uint16x8_t __offset, int16x8_t __value)
+ {
+   __builtin_mve_vstrhq_scatter_shifted_offset_sv8hi ((__builtin_neon_hi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_u32 (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value)
+ {
+   __builtin_mve_vstrhq_scatter_shifted_offset_uv4si ((__builtin_neon_hi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_u16 (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value)
+ {
+   __builtin_mve_vstrhq_scatter_shifted_offset_uv8hi ((__builtin_neon_hi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_p_s32 (int16_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_scatter_shifted_offset_p_sv4si ((__builtin_neon_hi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_p_s16 (int16_t * __base, uint16x8_t __offset, int16x8_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_scatter_shifted_offset_p_sv8hi ((__builtin_neon_hi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_p_u32 (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_scatter_shifted_offset_p_uv4si ((__builtin_neon_hi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_p_u16 (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_scatter_shifted_offset_p_uv8hi ((__builtin_neon_hi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_s32 (int16_t * __addr, int32x4_t __value)
+ {
+   __builtin_mve_vstrhq_sv4si ((__builtin_neon_hi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_s16 (int16_t * __addr, int16x8_t __value)
+ {
+   __builtin_mve_vstrhq_sv8hi ((__builtin_neon_hi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_u32 (uint16_t * __addr, uint32x4_t __value)
+ {
+   __builtin_mve_vstrhq_uv4si ((__builtin_neon_hi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_u16 (uint16_t * __addr, uint16x8_t __value)
+ {
+   __builtin_mve_vstrhq_uv8hi ((__builtin_neon_hi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_p_s32 (int16_t * __addr, int32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_p_sv4si ((__builtin_neon_hi *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_p_s16 (int16_t * __addr, int16x8_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_p_sv8hi ((__builtin_neon_hi *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_p_u32 (uint16_t * __addr, uint32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_p_uv4si ((__builtin_neon_hi *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_p_u16 (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_p_uv8hi ((__builtin_neon_hi *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_s32 (int32_t * __addr, int32x4_t __value)
+ {
+   __builtin_mve_vstrwq_sv4si ((__builtin_neon_si *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_u32 (uint32_t * __addr, uint32x4_t __value)
+ {
+   __builtin_mve_vstrwq_uv4si ((__builtin_neon_si *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_p_s32 (int32_t * __addr, int32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_p_sv4si ((__builtin_neon_si *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_p_u32 (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_p_uv4si ((__builtin_neon_si *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_p_s64 (uint64x2_t __addr, const int __offset, int64x2_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrdq_scatter_base_p_sv2di (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_p_u64 (uint64x2_t __addr, const int __offset, uint64x2_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrdq_scatter_base_p_uv2di (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_s64 (uint64x2_t __addr, const int __offset, int64x2_t __value)
+ {
+   __builtin_mve_vstrdq_scatter_base_sv2di (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_u64 (uint64x2_t __addr, const int __offset, uint64x2_t __value)
+ {
+   __builtin_mve_vstrdq_scatter_base_uv2di (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_offset_p_s64 (int64_t * __base, uint64x2_t __offset, int64x2_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrdq_scatter_offset_p_sv2di ((__builtin_neon_di *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_offset_p_u64 (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrdq_scatter_offset_p_uv2di ((__builtin_neon_di *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_offset_s64 (int64_t * __base, uint64x2_t __offset, int64x2_t __value)
+ {
+   __builtin_mve_vstrdq_scatter_offset_sv2di ((__builtin_neon_di *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_offset_u64 (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value)
+ {
+   __builtin_mve_vstrdq_scatter_offset_uv2di ((__builtin_neon_di *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_shifted_offset_p_s64 (int64_t * __base, uint64x2_t __offset, int64x2_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrdq_scatter_shifted_offset_p_sv2di ((__builtin_neon_di *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_shifted_offset_p_u64 (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrdq_scatter_shifted_offset_p_uv2di ((__builtin_neon_di *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_shifted_offset_s64 (int64_t * __base, uint64x2_t __offset, int64x2_t __value)
+ {
+   __builtin_mve_vstrdq_scatter_shifted_offset_sv2di ((__builtin_neon_di *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_shifted_offset_u64 (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value)
+ {
+   __builtin_mve_vstrdq_scatter_shifted_offset_uv2di ((__builtin_neon_di *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_offset_p_s32 (int32_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_scatter_offset_p_sv4si ((__builtin_neon_si *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_offset_p_u32 (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_scatter_offset_p_uv4si ((__builtin_neon_si *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_offset_s32 (int32_t * __base, uint32x4_t __offset, int32x4_t __value)
+ {
+   __builtin_mve_vstrwq_scatter_offset_sv4si ((__builtin_neon_si *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_offset_u32 (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value)
+ {
+   __builtin_mve_vstrwq_scatter_offset_uv4si ((__builtin_neon_si *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_shifted_offset_p_s32 (int32_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_scatter_shifted_offset_p_sv4si ((__builtin_neon_si *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_shifted_offset_p_u32 (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_scatter_shifted_offset_p_uv4si ((__builtin_neon_si *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_shifted_offset_s32 (int32_t * __base, uint32x4_t __offset, int32x4_t __value)
+ {
+   __builtin_mve_vstrwq_scatter_shifted_offset_sv4si ((__builtin_neon_si *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_shifted_offset_u32 (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value)
+ {
+   __builtin_mve_vstrwq_scatter_shifted_offset_uv4si ((__builtin_neon_si *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_s8 (int8x16_t __a, int8x16_t __b)
+ {
+   return __a + __b;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_s16 (int16x8_t __a, int16x8_t __b)
+ {
+   return __a + __b;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_s32 (int32x4_t __a, int32x4_t __b)
+ {
+   return __a + __b;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_u8 (uint8x16_t __a, uint8x16_t __b)
+ {
+   return __a + __b;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_u16 (uint16x8_t __a, uint16x8_t __b)
+ {
+   return __a + __b;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_u32 (uint32x4_t __a, uint32x4_t __b)
+ {
+   return __a + __b;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_m_n_u8 (uint8x16_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vddupq_m_n_uv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_m_n_u32 (uint32x4_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vddupq_m_n_uv4si (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_m_n_u16 (uint16x8_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vddupq_m_n_uv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_m_wb_u8 (uint8x16_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p)
+ {
+   uint8x16_t __res = __builtin_mve_vddupq_m_n_uv16qi (__inactive, * __a, __imm, __p);
+   *__a -= __imm * 16u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_m_wb_u16 (uint16x8_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p)
+ {
+   uint16x8_t __res = __builtin_mve_vddupq_m_n_uv8hi (__inactive, *__a, __imm, __p);
+   *__a -= __imm * 8u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_m_wb_u32 (uint32x4_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p)
+ {
+   uint32x4_t __res = __builtin_mve_vddupq_m_n_uv4si (__inactive, *__a, __imm, __p);
+   *__a -= __imm * 4u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_n_u8 (uint32_t __a, const int __imm)
+ {
+   return __builtin_mve_vddupq_n_uv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_n_u32 (uint32_t __a, const int __imm)
+ {
+   return __builtin_mve_vddupq_n_uv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_n_u16 (uint32_t __a, const int __imm)
+ {
+   return __builtin_mve_vddupq_n_uv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_m_n_u8 (uint8x16_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_vdwdupq_m_n_uv16qi (__inactive, __a, __c, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_m_n_u32 (uint32x4_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_vdwdupq_m_n_uv4si (__inactive, __a, __c, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_m_n_u16 (uint16x8_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_vdwdupq_m_n_uv8hi (__inactive, __a, __c, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_m_wb_u8 (uint8x16_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint8x16_t __res =  __builtin_mve_vdwdupq_m_n_uv16qi (__inactive, *__a, __c, __imm, __p);
+   *__a = __builtin_mve_vdwdupq_m_wb_uv16qi (__inactive, *__a, __c, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_m_wb_u32 (uint32x4_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint32x4_t __res =  __builtin_mve_vdwdupq_m_n_uv4si (__inactive, *__a, __c, __imm, __p);
+   *__a = __builtin_mve_vdwdupq_m_wb_uv4si (__inactive, *__a, __c, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_m_wb_u16 (uint16x8_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint16x8_t __res =  __builtin_mve_vdwdupq_m_n_uv8hi (__inactive, *__a, __c, __imm, __p);
+   *__a = __builtin_mve_vdwdupq_m_wb_uv8hi (__inactive, *__a, __c, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_n_u8 (uint32_t __a, uint32_t __b, const int __imm)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_vdwdupq_n_uv16qi (__a, __c, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_n_u32 (uint32_t __a, uint32_t __b, const int __imm)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_vdwdupq_n_uv4si (__a, __c, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_n_u16 (uint32_t __a, uint32_t __b, const int __imm)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_vdwdupq_n_uv8hi (__a, __c, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_wb_u8 (uint32_t * __a, uint32_t __b, const int __imm)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint8x16_t __res = __builtin_mve_vdwdupq_n_uv16qi (*__a, __c, __imm);
+   *__a = __builtin_mve_vdwdupq_wb_uv16qi (*__a, __c, __imm);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_wb_u32 (uint32_t * __a, uint32_t __b, const int __imm)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint32x4_t __res = __builtin_mve_vdwdupq_n_uv4si (*__a, __c, __imm);
+   *__a = __builtin_mve_vdwdupq_wb_uv4si (*__a, __c, __imm);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_wb_u16 (uint32_t * __a, uint32_t __b, const int __imm)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint16x8_t __res = __builtin_mve_vdwdupq_n_uv8hi (*__a, __c, __imm);
+   *__a = __builtin_mve_vdwdupq_wb_uv8hi (*__a, __c, __imm);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_m_n_u8 (uint8x16_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vidupq_m_n_uv16qi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_m_n_u32 (uint32x4_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vidupq_m_n_uv4si (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_m_n_u16 (uint16x8_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vidupq_m_n_uv8hi (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_n_u8 (uint32_t __a, const int __imm)
+ {
+   return __builtin_mve_vidupq_n_uv16qi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_m_wb_u8 (uint8x16_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p)
+ {
+   uint8x16_t __res = __builtin_mve_vidupq_m_n_uv16qi (__inactive, *__a, __imm, __p);
+   *__a += __imm * 16u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_m_wb_u16 (uint16x8_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p)
+ {
+   uint16x8_t __res = __builtin_mve_vidupq_m_n_uv8hi (__inactive, *__a, __imm, __p);
+   *__a += __imm * 8u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_m_wb_u32 (uint32x4_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p)
+ {
+   uint32x4_t __res = __builtin_mve_vidupq_m_n_uv4si (__inactive, *__a, __imm, __p);
+   *__a += __imm * 4u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_n_u32 (uint32_t __a, const int __imm)
+ {
+   return __builtin_mve_vidupq_n_uv4si (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_n_u16 (uint32_t __a, const int __imm)
+ {
+   return __builtin_mve_vidupq_n_uv8hi (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_wb_u8 (uint32_t * __a, const int __imm)
+ {
+   uint8x16_t __res = __builtin_mve_vidupq_n_uv16qi (*__a, __imm);
+   *__a += __imm * 16u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_wb_u16 (uint32_t * __a, const int __imm)
+ {
+   uint16x8_t __res = __builtin_mve_vidupq_n_uv8hi (*__a, __imm);
+   *__a += __imm * 8u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_wb_u32 (uint32_t * __a, const int __imm)
+ {
+   uint32x4_t __res = __builtin_mve_vidupq_n_uv4si (*__a, __imm);
+   *__a += __imm * 4u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_wb_u8 (uint32_t * __a, const int __imm)
+ {
+   uint8x16_t __res = __builtin_mve_vddupq_n_uv16qi (*__a, __imm);
+   *__a -= __imm * 16u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_wb_u16 (uint32_t * __a, const int __imm)
+ {
+   uint16x8_t __res = __builtin_mve_vddupq_n_uv8hi (*__a, __imm);
+   *__a -= __imm * 8u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_wb_u32 (uint32_t * __a, const int __imm)
+ {
+   uint32x4_t __res = __builtin_mve_vddupq_n_uv4si (*__a, __imm);
+   *__a -= __imm * 4u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_m_n_u8 (uint8x16_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_viwdupq_m_n_uv16qi (__inactive, __a, __c, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_m_n_u32 (uint32x4_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_viwdupq_m_n_uv4si (__inactive, __a, __c, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_m_n_u16 (uint16x8_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_viwdupq_m_n_uv8hi (__inactive, __a, __c, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_m_wb_u8 (uint8x16_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint8x16_t __res = __builtin_mve_viwdupq_m_n_uv16qi (__inactive, *__a, __c, __imm, __p);
+   *__a =  __builtin_mve_viwdupq_m_wb_uv16qi (__inactive, *__a, __c, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_m_wb_u32 (uint32x4_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint32x4_t __res = __builtin_mve_viwdupq_m_n_uv4si (__inactive, *__a, __c, __imm, __p);
+   *__a =  __builtin_mve_viwdupq_m_wb_uv4si (__inactive, *__a, __c, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_m_wb_u16 (uint16x8_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint16x8_t __res = __builtin_mve_viwdupq_m_n_uv8hi (__inactive, *__a, __c, __imm, __p);
+   *__a =  __builtin_mve_viwdupq_m_wb_uv8hi (__inactive, *__a, __c, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_n_u8 (uint32_t __a, uint32_t __b, const int __imm)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_viwdupq_n_uv16qi (__a, __c, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_n_u32 (uint32_t __a, uint32_t __b, const int __imm)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_viwdupq_n_uv4si (__a, __c, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_n_u16 (uint32_t __a, uint32_t __b, const int __imm)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_viwdupq_n_uv8hi (__a, __c, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_wb_u8 (uint32_t * __a, uint32_t __b, const int __imm)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint8x16_t __res = __builtin_mve_viwdupq_n_uv16qi (*__a, __c, __imm);
+   *__a = __builtin_mve_viwdupq_wb_uv16qi (*__a, __c, __imm);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_wb_u32 (uint32_t * __a, uint32_t __b, const int __imm)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint32x4_t __res = __builtin_mve_viwdupq_n_uv4si (*__a, __c, __imm);
+   *__a = __builtin_mve_viwdupq_wb_uv4si (*__a, __c, __imm);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_wb_u16 (uint32_t * __a, uint32_t __b, const int __imm)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint16x8_t __res = __builtin_mve_viwdupq_n_uv8hi (*__a, __c, __imm);
+   *__a = __builtin_mve_viwdupq_wb_uv8hi (*__a, __c, __imm);
+   return __res;
+ }
+ 
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_base_wb_s64 (uint64x2_t * __addr, const int __offset)
+ {
+   int64x2_t
+   result = __builtin_mve_vldrdq_gather_base_nowb_sv2di (*__addr, __offset);
+   *__addr = __builtin_mve_vldrdq_gather_base_wb_sv2di (*__addr, __offset);
+   return result;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_base_wb_u64 (uint64x2_t * __addr, const int __offset)
+ {
+   uint64x2_t
+   result = __builtin_mve_vldrdq_gather_base_nowb_uv2di (*__addr, __offset);
+   *__addr = __builtin_mve_vldrdq_gather_base_wb_uv2di (*__addr, __offset);
+   return result;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_base_wb_z_s64 (uint64x2_t * __addr, const int __offset, mve_pred16_t __p)
+ {
+   int64x2_t
+   result = __builtin_mve_vldrdq_gather_base_nowb_z_sv2di (*__addr, __offset, __p);
+   *__addr = __builtin_mve_vldrdq_gather_base_wb_z_sv2di (*__addr, __offset, __p);
+   return result;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_base_wb_z_u64 (uint64x2_t * __addr, const int __offset, mve_pred16_t __p)
+ {
+   uint64x2_t
+   result = __builtin_mve_vldrdq_gather_base_nowb_z_uv2di (*__addr, __offset, __p);
+   *__addr = __builtin_mve_vldrdq_gather_base_wb_z_uv2di (*__addr, __offset, __p);
+   return result;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_base_wb_s32 (uint32x4_t * __addr, const int __offset)
+ {
+   int32x4_t
+   result = __builtin_mve_vldrwq_gather_base_nowb_sv4si (*__addr, __offset);
+   *__addr = __builtin_mve_vldrwq_gather_base_wb_sv4si (*__addr, __offset);
+   return result;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_base_wb_u32 (uint32x4_t * __addr, const int __offset)
+ {
+   uint32x4_t
+   result = __builtin_mve_vldrwq_gather_base_nowb_uv4si (*__addr, __offset);
+   *__addr = __builtin_mve_vldrwq_gather_base_wb_uv4si (*__addr, __offset);
+   return result;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_base_wb_z_s32 (uint32x4_t * __addr, const int __offset, mve_pred16_t __p)
+ {
+   int32x4_t
+   result = __builtin_mve_vldrwq_gather_base_nowb_z_sv4si (*__addr, __offset, __p);
+   *__addr = __builtin_mve_vldrwq_gather_base_wb_z_sv4si (*__addr, __offset, __p);
+   return result;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_base_wb_z_u32 (uint32x4_t * __addr, const int __offset, mve_pred16_t __p)
+ {
+   uint32x4_t
+   result = __builtin_mve_vldrwq_gather_base_nowb_z_uv4si (*__addr, __offset, __p);
+   *__addr = __builtin_mve_vldrwq_gather_base_wb_z_uv4si (*__addr, __offset, __p);
+   return result;
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_wb_s64 (uint64x2_t * __addr, const int __offset, int64x2_t __value)
+ {
+   __builtin_mve_vstrdq_scatter_base_wb_sv2di (*__addr, __offset, __value);
+   __builtin_mve_vstrdq_scatter_base_wb_add_sv2di (*__addr, __offset, *__addr);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_wb_u64 (uint64x2_t * __addr, const int __offset, uint64x2_t __value)
+ {
+   __builtin_mve_vstrdq_scatter_base_wb_uv2di (*__addr, __offset, __value);
+   __builtin_mve_vstrdq_scatter_base_wb_add_uv2di (*__addr, __offset, *__addr);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_wb_p_s64 (uint64x2_t * __addr, const int __offset, int64x2_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrdq_scatter_base_wb_p_sv2di (*__addr, __offset, __value, __p);
+   __builtin_mve_vstrdq_scatter_base_wb_p_add_sv2di (*__addr, __offset, *__addr, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_wb_p_u64 (uint64x2_t * __addr, const int __offset, uint64x2_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrdq_scatter_base_wb_p_uv2di (*__addr, __offset, __value, __p);
+   __builtin_mve_vstrdq_scatter_base_wb_p_add_uv2di (*__addr, __offset, *__addr, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_wb_p_s32 (uint32x4_t * __addr, const int __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_scatter_base_wb_p_sv4si (*__addr, __offset, __value, __p);
+   __builtin_mve_vstrwq_scatter_base_wb_p_add_sv4si (*__addr, __offset, *__addr, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_wb_p_u32 (uint32x4_t * __addr, const int __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_scatter_base_wb_p_uv4si (*__addr, __offset, __value, __p);
+   __builtin_mve_vstrwq_scatter_base_wb_p_add_uv4si (*__addr, __offset, *__addr, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_wb_s32 (uint32x4_t * __addr, const int __offset, int32x4_t __value)
+ {
+   __builtin_mve_vstrwq_scatter_base_wb_sv4si (*__addr, __offset, __value);
+   __builtin_mve_vstrwq_scatter_base_wb_add_sv4si (*__addr, __offset, *__addr);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_wb_u32 (uint32x4_t * __addr, const int __offset, uint32x4_t __value)
+ {
+   __builtin_mve_vstrwq_scatter_base_wb_uv4si (*__addr, __offset, __value);
+   __builtin_mve_vstrwq_scatter_base_wb_add_uv4si (*__addr, __offset, *__addr);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_x_n_u8 (uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vddupq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_x_n_u16 (uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vddupq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_x_n_u32 (uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vddupq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_x_wb_u8 (uint32_t *__a, const int __imm, mve_pred16_t __p)
+ {
+   uint8x16_t __arg1 = __arm_vuninitializedq_u8 ();
+   uint8x16_t __res = __builtin_mve_vddupq_m_n_uv16qi (__arg1, * __a, __imm, __p);
+   *__a -= __imm * 16u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_x_wb_u16 (uint32_t *__a, const int __imm, mve_pred16_t __p)
+ {
+   uint16x8_t __arg1 = __arm_vuninitializedq_u16 ();
+   uint16x8_t __res = __builtin_mve_vddupq_m_n_uv8hi (__arg1, *__a, __imm, __p);
+   *__a -= __imm * 8u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_x_wb_u32 (uint32_t *__a, const int __imm, mve_pred16_t __p)
+ {
+   uint32x4_t __arg1 = __arm_vuninitializedq_u32 ();
+   uint32x4_t __res = __builtin_mve_vddupq_m_n_uv4si (__arg1, *__a, __imm, __p);
+   *__a -= __imm * 4u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_x_n_u8 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_vdwdupq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __c, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_x_n_u16 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_vdwdupq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __c, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_x_n_u32 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_vdwdupq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __c, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_x_wb_u8 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint8x16_t __arg1 = __arm_vuninitializedq_u8 ();
+   uint8x16_t __res = __builtin_mve_vdwdupq_m_n_uv16qi (__arg1, *__a, __c, __imm, __p);
+   *__a = __builtin_mve_vdwdupq_m_wb_uv16qi (__arg1, *__a, __c, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_x_wb_u16 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint16x8_t __arg1 = __arm_vuninitializedq_u16 ();
+   uint16x8_t __res =  __builtin_mve_vdwdupq_m_n_uv8hi (__arg1, *__a, __c, __imm, __p);
+   *__a = __builtin_mve_vdwdupq_m_wb_uv8hi (__arg1, *__a, __c, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_x_wb_u32 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint32x4_t __arg1 = __arm_vuninitializedq_u32 ();
+   uint32x4_t __res =  __builtin_mve_vdwdupq_m_n_uv4si (__arg1, *__a, __c, __imm, __p);
+   *__a = __builtin_mve_vdwdupq_m_wb_uv4si (__arg1, *__a, __c, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_x_n_u8 (uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vidupq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_x_n_u16 (uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vidupq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_x_n_u32 (uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vidupq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_x_wb_u8 (uint32_t *__a, const int __imm, mve_pred16_t __p)
+ {
+   uint8x16_t __arg1 = __arm_vuninitializedq_u8 ();
+   uint8x16_t __res = __builtin_mve_vidupq_m_n_uv16qi (__arg1, *__a, __imm, __p);
+   *__a += __imm * 16u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_x_wb_u16 (uint32_t *__a, const int __imm, mve_pred16_t __p)
+ {
+   uint16x8_t __arg1 = __arm_vuninitializedq_u16 ();
+   uint16x8_t __res = __builtin_mve_vidupq_m_n_uv8hi (__arg1, *__a, __imm, __p);
+   *__a += __imm * 8u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_x_wb_u32 (uint32_t *__a, const int __imm, mve_pred16_t __p)
+ {
+   uint32x4_t __arg1 = __arm_vuninitializedq_u32 ();
+   uint32x4_t __res = __builtin_mve_vidupq_m_n_uv4si (__arg1, *__a, __imm, __p);
+   *__a += __imm * 4u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_x_n_u8 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_viwdupq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __c, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_x_n_u16 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_viwdupq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __c, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_x_n_u32 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   return __builtin_mve_viwdupq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __c, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_x_wb_u8 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint8x16_t __arg1 = __arm_vuninitializedq_u8 ();
+   uint8x16_t __res = __builtin_mve_viwdupq_m_n_uv16qi (__arg1, *__a, __c, __imm, __p);
+   *__a =  __builtin_mve_viwdupq_m_wb_uv16qi (__arg1, *__a, __c, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_x_wb_u16 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint16x8_t __arg1 = __arm_vuninitializedq_u16 ();
+   uint16x8_t __res = __builtin_mve_viwdupq_m_n_uv8hi (__arg1, *__a, __c, __imm, __p);
+   *__a =  __builtin_mve_viwdupq_m_wb_uv8hi (__arg1, *__a, __c, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_x_wb_u32 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+   uint64_t __c = ((uint64_t) __b) << 32;
+   uint32x4_t __arg1 = __arm_vuninitializedq_u32 ();
+   uint32x4_t __res = __builtin_mve_viwdupq_m_n_uv4si (__arg1, *__a, __c, __imm, __p);
+   *__a =  __builtin_mve_viwdupq_m_wb_uv4si (__arg1, *__a, __c, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_x_n_s8 (int8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_sv16qi (__arm_vuninitializedq_s8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_x_n_s16 (int16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_x_n_s32 (int32_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_x_n_u8 (uint8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_x_n_u16 (uint16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_x_n_u32 (uint32_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_x_s8 (int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabsq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_x_s16 (int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabsq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_x_s32 (int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabsq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_n_s8 (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_n_s16 (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_n_u8 (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_n_u16 (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_n_u32 (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_x_s8 (int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclsq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_x_s16 (int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclsq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_x_s32 (int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclsq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_x_s8 (int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclzq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_x_s16 (int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclzq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_x_s32 (int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclzq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_x_u8 (uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclzq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_x_u16 (uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclzq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_x_u32 (uint32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vclzq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_x_s8 (int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vnegq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_x_s16 (int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vnegq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_x_s32 (int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vnegq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulhq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulhq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulhq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulhq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulhq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulhq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_poly_x_p8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_poly_m_pv16qi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_poly_x_p16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_poly_m_pv8hi (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_int_m_sv16qi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_int_m_sv8hi (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_int_m_sv4si (__arm_vuninitializedq_s64 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_int_m_uv16qi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_int_m_uv8hi (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmullbq_int_m_uv4si (__arm_vuninitializedq_u64 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_poly_x_p8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_poly_m_pv16qi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_poly_x_p16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_poly_m_pv8hi (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_int_m_sv16qi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_int_m_sv8hi (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_int_m_sv4si (__arm_vuninitializedq_s64 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_int_m_uv16qi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_int_m_uv8hi (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulltq_int_m_uv4si (__arm_vuninitializedq_u64 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_n_s8 (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_n_s16 (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_n_u8 (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_n_u16 (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_n_u32 (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_n_s8 (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_n_s16 (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_n_u8 (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_n_u16 (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_n_u32 (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x_n_s8 (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_n_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x_n_s16 (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_n_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_n_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x_n_u8 (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x_n_u16 (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x_n_u32 (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhaddq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhcaddq_rot90_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhcaddq_rot90_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhcaddq_rot90_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhcaddq_rot270_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhcaddq_rot270_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhcaddq_rot270_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x_n_s8 (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_n_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x_n_s16 (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_n_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_n_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x_n_u8 (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x_n_u16 (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x_n_u32 (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vhsubq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrhaddq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrhaddq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrhaddq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrhaddq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrhaddq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrhaddq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmulhq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmulhq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmulhq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmulhq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmulhq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrmulhq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x_n_s8 (int8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x_n_s16 (int16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x_n_s32 (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x_n_u8 (uint8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x_n_u16 (uint16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x_n_u32 (uint32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_x_s8 (int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovlbq_m_sv16qi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_x_s16 (int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovlbq_m_sv8hi (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_x_u8 (uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovlbq_m_uv16qi (__arm_vuninitializedq_u16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_x_u16 (uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovlbq_m_uv8hi (__arm_vuninitializedq_u32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_x_s8 (int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovltq_m_sv16qi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_x_s16 (int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovltq_m_sv8hi (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_x_u8 (uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovltq_m_uv16qi (__arm_vuninitializedq_u16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_x_u16 (uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmovltq_m_uv8hi (__arm_vuninitializedq_u32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x_s8 (int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x_s16 (int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x_s32 (int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x_u8 (uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x_u16 (uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x_u32 (uint32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x_n_s16 (const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_n_sv8hi (__arm_vuninitializedq_s16 (), __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x_n_s32 (const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_n_sv4si (__arm_vuninitializedq_s32 (), __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x_n_u16 (const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x_n_u32 (const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmvnq_m_n_uv4si (__arm_vuninitializedq_u32 (), __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev16q_x_s8 (int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev16q_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev16q_x_u8 (uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev16q_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_x_s8 (int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev32q_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_x_s16 (int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev32q_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_x_u8 (uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev32q_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_x_u16 (uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev32q_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x_s8 (int8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x_s16 (int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x_s32 (int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x_u8 (uint8x16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x_u16 (uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x_u32 (uint32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_uv4si (__arm_vuninitializedq_u32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_x_u8 (uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_x_u16 (uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_x_u32 (uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshlq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_x_n_s8 (int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshllbq_m_n_sv16qi (__arm_vuninitializedq_s16 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_x_n_s16 (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshllbq_m_n_sv8hi (__arm_vuninitializedq_s32 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_x_n_u8 (uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshllbq_m_n_uv16qi (__arm_vuninitializedq_u16 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_x_n_u16 (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshllbq_m_n_uv8hi (__arm_vuninitializedq_u32 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_x_n_s8 (int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlltq_m_n_sv16qi (__arm_vuninitializedq_s16 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_x_n_s16 (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlltq_m_n_sv8hi (__arm_vuninitializedq_s32 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_x_n_u8 (uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlltq_m_n_uv16qi (__arm_vuninitializedq_u16 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_x_n_u16 (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlltq_m_n_uv8hi (__arm_vuninitializedq_u32 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_u8 (uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_u16 (uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_u32 (uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_n_s8 (int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_n_sv16qi (__arm_vuninitializedq_s8 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_n_s16 (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_n_sv8hi (__arm_vuninitializedq_s16 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_n_s32 (int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_n_sv4si (__arm_vuninitializedq_s32 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_n_u8 (uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_n_u16 (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_n_u32 (uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshlq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_x_n_s8 (int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrq_m_n_sv16qi (__arm_vuninitializedq_s8 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_x_n_s16 (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrq_m_n_sv8hi (__arm_vuninitializedq_s16 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_x_n_s32 (int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrq_m_n_sv4si (__arm_vuninitializedq_s32 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_x_n_u8 (uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_x_n_u16 (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_x_n_u32 (uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrshrq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_x_n_s8 (int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrq_m_n_sv16qi (__arm_vuninitializedq_s8 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_x_n_s16 (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrq_m_n_sv8hi (__arm_vuninitializedq_s16 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_x_n_s32 (int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrq_m_n_sv4si (__arm_vuninitializedq_s32 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_x_n_u8 (uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_x_n_u16 (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_x_n_u32 (uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+   return __builtin_mve_vshrq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadciq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry_out)
+ {
+   int32x4_t __res = __builtin_mve_vadciq_sv4si (__a, __b);
+   *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadciq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out)
+ {
+   uint32x4_t __res = __builtin_mve_vadciq_uv4si (__a, __b);
+   *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadciq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry_out, mve_pred16_t __p)
+ {
+   int32x4_t __res =  __builtin_mve_vadciq_m_sv4si (__inactive, __a, __b, __p);
+   *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadciq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out, mve_pred16_t __p)
+ {
+   uint32x4_t __res = __builtin_mve_vadciq_m_uv4si (__inactive, __a, __b, __p);
+   *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry)
+ {
+   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
+   int32x4_t __res = __builtin_mve_vadcq_sv4si (__a, __b);
+   *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry)
+ {
+   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
+   uint32x4_t __res = __builtin_mve_vadcq_uv4si (__a, __b);
+   *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p)
+ {
+   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
+   int32x4_t __res = __builtin_mve_vadcq_m_sv4si (__inactive, __a, __b, __p);
+   *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p)
+ {
+   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
+   uint32x4_t __res =  __builtin_mve_vadcq_m_uv4si (__inactive, __a, __b, __p);
+   *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbciq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry_out)
+ {
+   int32x4_t __res = __builtin_mve_vsbciq_sv4si (__a, __b);
+   *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbciq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out)
+ {
+   uint32x4_t __res = __builtin_mve_vsbciq_uv4si (__a, __b);
+   *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbciq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry_out, mve_pred16_t __p)
+ {
+   int32x4_t __res = __builtin_mve_vsbciq_m_sv4si (__inactive, __a, __b, __p);
+   *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbciq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out, mve_pred16_t __p)
+ {
+   uint32x4_t __res = __builtin_mve_vsbciq_m_uv4si (__inactive, __a, __b, __p);
+   *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry)
+ {
+   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
+   int32x4_t __res = __builtin_mve_vsbcq_sv4si (__a, __b);
+   *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry)
+ {
+   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
+   uint32x4_t __res =  __builtin_mve_vsbcq_uv4si (__a, __b);
+   *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p)
+ {
+   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
+   int32x4_t __res = __builtin_mve_vsbcq_m_sv4si (__inactive, __a, __b, __p);
+   *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p)
+ {
+   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
+   uint32x4_t __res = __builtin_mve_vsbcq_m_uv4si (__inactive, __a, __b, __p);
+   *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
+   return __res;
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p_u8 (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p)
+ {
+   return vstrbq_p_u8 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p_s8 (int8_t * __addr, int8x16_t __value, mve_pred16_t __p)
+ {
+   return vstrbq_p_s8 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q_s8 (int8_t * __addr, int8x16x2_t __value)
+ {
+   union { int8x16x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst2qv16qi ((__builtin_neon_qi *) __addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q_u8 (uint8_t * __addr, uint8x16x2_t __value)
+ {
+   union { uint8x16x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst2qv16qi ((__builtin_neon_qi *) __addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z_u8 (uint8_t const *__base, mve_pred16_t __p)
+ {
+   return vldrbq_z_u8 ( __base, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z_s8 (int8_t const *__base, mve_pred16_t __p)
+ {
+   return vldrbq_z_s8 ( __base, __p);
+ }
+ 
+ __extension__ extern __inline int8x16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q_s8 (int8_t const * __addr)
+ {
+   union { int8x16x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__o = __builtin_mve_vld2qv16qi ((__builtin_neon_qi *) __addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline uint8x16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q_u8 (uint8_t const * __addr)
+ {
+   union { uint8x16x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__o = __builtin_mve_vld2qv16qi ((__builtin_neon_qi *) __addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline int8x16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q_s8 (int8_t const * __addr)
+ {
+   union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__o = __builtin_mve_vld4qv16qi ((__builtin_neon_qi *) __addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline uint8x16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q_u8 (uint8_t const * __addr)
+ {
+   union { uint8x16x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__o = __builtin_mve_vld4qv16qi ((__builtin_neon_qi *) __addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p_u16 (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p)
+ {
+   return vstrhq_p_u16 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p_s16 (int16_t * __addr, int16x8_t __value, mve_pred16_t __p)
+ {
+   return vstrhq_p_s16 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q_s16 (int16_t * __addr, int16x8x2_t __value)
+ {
+   union { int16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst2qv8hi ((__builtin_neon_hi *) __addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q_u16 (uint16_t * __addr, uint16x8x2_t __value)
+ {
+   union { uint16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst2qv8hi ((__builtin_neon_hi *) __addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z_u16 (uint16_t const *__base, mve_pred16_t __p)
+ {
+   return vldrhq_z_u16 ( __base, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z_s16 (int16_t const *__base, mve_pred16_t __p)
+ {
+   return vldrhq_z_s16 ( __base, __p);
+ }
+ 
+ __extension__ extern __inline int16x8x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q_s16 (int16_t const * __addr)
+ {
+   union { int16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__o = __builtin_mve_vld2qv8hi ((__builtin_neon_hi *) __addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline uint16x8x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q_u16 (uint16_t const * __addr)
+ {
+   union { uint16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__o = __builtin_mve_vld2qv8hi ((__builtin_neon_hi *) __addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline int16x8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q_s16 (int16_t const * __addr)
+ {
+   union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__o = __builtin_mve_vld4qv8hi ((__builtin_neon_hi *) __addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline uint16x8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q_u16 (uint16_t const * __addr)
+ {
+   union { uint16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__o = __builtin_mve_vld4qv8hi ((__builtin_neon_hi *) __addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p_u32 (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p)
+ {
+   return vstrwq_p_u32 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p_s32 (int32_t * __addr, int32x4_t __value, mve_pred16_t __p)
+ {
+   return vstrwq_p_s32 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q_s32 (int32_t * __addr, int32x4x2_t __value)
+ {
+   union { int32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst2qv4si ((__builtin_neon_si *) __addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q_u32 (uint32_t * __addr, uint32x4x2_t __value)
+ {
+   union { uint32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst2qv4si ((__builtin_neon_si *) __addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z_u32 (uint32_t const *__base, mve_pred16_t __p)
+ {
+   return vldrwq_z_u32 ( __base, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z_s32 (int32_t const *__base, mve_pred16_t __p)
+ {
+   return vldrwq_z_s32 ( __base, __p);
+ }
+ 
+ __extension__ extern __inline int32x4x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q_s32 (int32_t const * __addr)
+ {
+   union { int32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__o = __builtin_mve_vld2qv4si ((__builtin_neon_si *) __addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline uint32x4x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q_u32 (uint32_t const * __addr)
+ {
+   union { uint32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__o = __builtin_mve_vld2qv4si ((__builtin_neon_si *) __addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline int32x4x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q_s32 (int32_t const * __addr)
+ {
+   union { int32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__o = __builtin_mve_vld4qv4si ((__builtin_neon_si *) __addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline uint32x4x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q_u32 (uint32_t const * __addr)
+ {
+   union { uint32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__o = __builtin_mve_vld4qv4si ((__builtin_neon_si *) __addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane_s16 (int16_t __a, int16x8_t __b, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__b, __idx);
+   __b[__ARM_LANEQ(__b,__idx)] = __a;
+   return __b;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane_s32 (int32_t __a, int32x4_t __b, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__b, __idx);
+   __b[__ARM_LANEQ(__b,__idx)] = __a;
+   return __b;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane_s8 (int8_t __a, int8x16_t __b, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__b, __idx);
+   __b[__ARM_LANEQ(__b,__idx)] = __a;
+   return __b;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane_s64 (int64_t __a, int64x2_t __b, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__b, __idx);
+   __b[__ARM_LANEQ(__b,__idx)] = __a;
+   return __b;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane_u8 (uint8_t __a, uint8x16_t __b, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__b, __idx);
+   __b[__ARM_LANEQ(__b,__idx)] = __a;
+   return __b;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane_u16 (uint16_t __a, uint16x8_t __b, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__b, __idx);
+   __b[__ARM_LANEQ(__b,__idx)] = __a;
+   return __b;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane_u32 (uint32_t __a, uint32x4_t __b, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__b, __idx);
+   __b[__ARM_LANEQ(__b,__idx)] = __a;
+   return __b;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane_u64 (uint64_t __a, uint64x2_t __b, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__b, __idx);
+   __b[__ARM_LANEQ(__b,__idx)] = __a;
+   return __b;
+ }
+ 
+ __extension__ extern __inline int16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane_s16 (int16x8_t __a, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__a, __idx);
+   return __a[__ARM_LANEQ(__a,__idx)];
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane_s32 (int32x4_t __a, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__a, __idx);
+   return __a[__ARM_LANEQ(__a,__idx)];
+ }
+ 
+ __extension__ extern __inline int8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane_s8 (int8x16_t __a, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__a, __idx);
+   return __a[__ARM_LANEQ(__a,__idx)];
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane_s64 (int64x2_t __a, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__a, __idx);
+   return __a[__ARM_LANEQ(__a,__idx)];
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane_u8 (uint8x16_t __a, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__a, __idx);
+   return __a[__ARM_LANEQ(__a,__idx)];
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane_u16 (uint16x8_t __a, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__a, __idx);
+   return __a[__ARM_LANEQ(__a,__idx)];
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane_u32 (uint32x4_t __a, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__a, __idx);
+   return __a[__ARM_LANEQ(__a,__idx)];
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane_u64 (uint64x2_t __a, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__a, __idx);
+   return __a[__ARM_LANEQ(__a,__idx)];
+ }
+ 
+ __extension__ extern __inline  uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_lsll (uint64_t value, int32_t shift)
+ {
+   return (value << shift);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_asrl (int64_t value, int32_t shift)
+ {
+   return (value >> shift);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_uqrshll (uint64_t value, int32_t shift)
+ {
+   return __builtin_mve_uqrshll_sat64_di (value, shift);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_uqrshll_sat48 (uint64_t value, int32_t shift)
+ {
+   return __builtin_mve_uqrshll_sat48_di (value, shift);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_sqrshrl (int64_t value, int32_t shift)
+ {
+   return __builtin_mve_sqrshrl_sat64_di (value, shift);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_sqrshrl_sat48 (int64_t value, int32_t shift)
+ {
+   return __builtin_mve_sqrshrl_sat48_di (value, shift);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_uqshll (uint64_t value, const int shift)
+ {
+   return __builtin_mve_uqshll_di (value, shift);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_urshrl (uint64_t value, const int shift)
+ {
+   return __builtin_mve_urshrl_di (value, shift);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_srshrl (int64_t value, const int shift)
+ {
+   return __builtin_mve_srshrl_di (value, shift);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_sqshll (int64_t value, const int shift)
+ {
+   return __builtin_mve_sqshll_di (value, shift);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_uqrshl (uint32_t value, int32_t shift)
+ {
+   return __builtin_mve_uqrshl_si (value, shift);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_sqrshr (int32_t value, int32_t shift)
+ {
+   return __builtin_mve_sqrshr_si (value, shift);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_uqshl (uint32_t value, const int shift)
+ {
+   return  __builtin_mve_uqshl_si (value, shift);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_urshr (uint32_t value, const int shift)
+ {
+   return __builtin_mve_urshr_si (value, shift);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_sqshl (int32_t value, const int shift)
+ {
+   return __builtin_mve_sqshl_si (value, shift);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_srshr (int32_t value, const int shift)
+ {
+   return __builtin_mve_srshr_si (value, shift);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_m_s8 (int8x16_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p)
+ {
+   int8x16_t __res = __builtin_mve_vshlcq_m_vec_sv16qi (__a, *__b, __imm, __p);
+   *__b = __builtin_mve_vshlcq_m_carry_sv16qi (__a, *__b, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_m_u8 (uint8x16_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p)
+ {
+   uint8x16_t __res = __builtin_mve_vshlcq_m_vec_uv16qi (__a, *__b, __imm, __p);
+   *__b = __builtin_mve_vshlcq_m_carry_uv16qi (__a, *__b, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_m_s16 (int16x8_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p)
+ {
+   int16x8_t __res = __builtin_mve_vshlcq_m_vec_sv8hi (__a, *__b, __imm, __p);
+   *__b = __builtin_mve_vshlcq_m_carry_sv8hi (__a, *__b, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_m_u16 (uint16x8_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p)
+ {
+   uint16x8_t __res = __builtin_mve_vshlcq_m_vec_uv8hi (__a, *__b, __imm, __p);
+   *__b = __builtin_mve_vshlcq_m_carry_uv8hi (__a, *__b, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_m_s32 (int32x4_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p)
+ {
+   int32x4_t __res = __builtin_mve_vshlcq_m_vec_sv4si (__a, *__b, __imm, __p);
+   *__b = __builtin_mve_vshlcq_m_carry_sv4si (__a, *__b, __imm, __p);
+   return __res;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_m_u32 (uint32x4_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p)
+ {
+   uint32x4_t __res = __builtin_mve_vshlcq_m_vec_uv4si (__a, *__b, __imm, __p);
+   *__b = __builtin_mve_vshlcq_m_carry_uv4si (__a, *__b, __imm, __p);
+   return __res;
+ }
+ 
+ #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point.  */
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q_f16 (float16_t * __addr, float16x8x4_t __value)
+ {
+   union { float16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst4qv8hf (__addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q_f32 (float32_t * __addr, float32x4x4_t __value)
+ {
+   union { float32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst4qv4sf (__addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndxq_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vrndxq_fv8hf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndxq_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vrndxq_fv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndq_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vrndq_fv8hf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndq_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vrndq_fv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndpq_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vrndpq_fv8hf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndpq_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vrndpq_fv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndnq_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vrndnq_fv8hf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndnq_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vrndnq_fv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndmq_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vrndmq_fv8hf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndmq_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vrndmq_fv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndaq_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vrndaq_fv8hf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndaq_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vrndaq_fv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vrev64q_fv8hf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vrev64q_fv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vnegq_fv8hf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vnegq_fv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n_f16 (float16_t __a)
+ {
+   return __builtin_mve_vdupq_n_fv8hf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n_f32 (float32_t __a)
+ {
+   return __builtin_mve_vdupq_n_fv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vabsq_fv8hf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vabsq_fv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vrev32q_fv8hf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvttq_f32_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vcvttq_f32_f16v4sf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtbq_f32_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vcvtbq_f32_f16v4sf (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_f16_s16 (int16x8_t __a)
+ {
+   return __builtin_mve_vcvtq_to_f_sv8hf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_f32_s32 (int32x4_t __a)
+ {
+   return __builtin_mve_vcvtq_to_f_sv4sf (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_f16_u16 (uint16x8_t __a)
+ {
+   return __builtin_mve_vcvtq_to_f_uv8hf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_f32_u32 (uint32x4_t __a)
+ {
+   return __builtin_mve_vcvtq_to_f_uv4sf (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_s16_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vcvtq_from_f_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_s32_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vcvtq_from_f_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_u16_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vcvtq_from_f_uv8hi (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_u32_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vcvtq_from_f_uv4si (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_u16_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vcvtpq_uv8hi (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_u32_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vcvtpq_uv4si (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_u16_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vcvtnq_uv8hi (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_u16_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vcvtmq_uv8hi (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_u32_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vcvtmq_uv4si (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_u16_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vcvtaq_uv8hi (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_u32_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vcvtaq_uv4si (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_s16_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vcvtaq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_s32_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vcvtaq_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_s16_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vcvtnq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_s32_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vcvtnq_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_s16_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vcvtpq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_s32_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vcvtpq_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_s16_f16 (float16x8_t __a)
+ {
+   return __builtin_mve_vcvtmq_sv8hi (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_s32_f32 (float32x4_t __a)
+ {
+   return __builtin_mve_vcvtmq_sv4si (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_n_f16 (float16x8_t __a, float16_t __b)
+ {
+   return __builtin_mve_vsubq_n_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_n_f32 (float32x4_t __a, float32_t __b)
+ {
+   return __builtin_mve_vsubq_n_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_n_f16 (float16x8_t __a, int32_t __b)
+ {
+   return __builtin_mve_vbrsrq_n_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_n_f32 (float32x4_t __a, int32_t __b)
+ {
+   return __builtin_mve_vbrsrq_n_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_n_f16_s16 (int16x8_t __a, const int __imm6)
+ {
+   return __builtin_mve_vcvtq_n_to_f_sv8hf (__a, __imm6);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_n_f32_s32 (int32x4_t __a, const int __imm6)
+ {
+   return __builtin_mve_vcvtq_n_to_f_sv4sf (__a, __imm6);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_n_f16_u16 (uint16x8_t __a, const int __imm6)
+ {
+   return __builtin_mve_vcvtq_n_to_f_uv8hf (__a, __imm6);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_n_f32_u32 (uint32x4_t __a, const int __imm6)
+ {
+   return __builtin_mve_vcvtq_n_to_f_uv4sf (__a, __imm6);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcreateq_f16 (uint64_t __a, uint64_t __b)
+ {
+   return __builtin_mve_vcreateq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcreateq_f32 (uint64_t __a, uint64_t __b)
+ {
+   return __builtin_mve_vcreateq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_n_s16_f16 (float16x8_t __a, const int __imm6)
+ {
+   return __builtin_mve_vcvtq_n_from_f_sv8hi (__a, __imm6);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_n_s32_f32 (float32x4_t __a, const int __imm6)
+ {
+   return __builtin_mve_vcvtq_n_from_f_sv4si (__a, __imm6);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_n_u16_f16 (float16x8_t __a, const int __imm6)
+ {
+   return __builtin_mve_vcvtq_n_from_f_uv8hi (__a, __imm6);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_n_u32_f32 (float32x4_t __a, const int __imm6)
+ {
+   return __builtin_mve_vcvtq_n_from_f_uv4si (__a, __imm6);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_n_f16 (float16x8_t __a, float16_t __b)
+ {
+   return __builtin_mve_vcmpneq_n_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vcmpneq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_n_f16 (float16x8_t __a, float16_t __b)
+ {
+   return __builtin_mve_vcmpltq_n_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vcmpltq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_n_f16 (float16x8_t __a, float16_t __b)
+ {
+   return __builtin_mve_vcmpleq_n_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vcmpleq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_n_f16 (float16x8_t __a, float16_t __b)
+ {
+   return __builtin_mve_vcmpgtq_n_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vcmpgtq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_n_f16 (float16x8_t __a, float16_t __b)
+ {
+   return __builtin_mve_vcmpgeq_n_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vcmpgeq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_n_f16 (float16x8_t __a, float16_t __b)
+ {
+   return __builtin_mve_vcmpeqq_n_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vcmpeqq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vsubq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vorrq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vornq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_n_f16 (float16x8_t __a, float16_t __b)
+ {
+   return __builtin_mve_vmulq_n_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vmulq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmvq_f16 (float16_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vminnmvq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vminnmq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmavq_f16 (float16_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vminnmavq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmaq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vminnmaq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmvq_f16 (float16_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vmaxnmvq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vmaxnmq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmavq_f16 (float16_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vmaxnmavq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmaq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vmaxnmaq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_veorq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot90_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vcmulq_rot90_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot270_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vcmulq_rot270_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot180_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vcmulq_rot180_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vcmulq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vcaddq_rot90_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vcaddq_rot270_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vbicq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vandq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_n_f16 (float16x8_t __a, float16_t __b)
+ {
+   return __builtin_mve_vaddq_n_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __builtin_mve_vabdq_fv8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_n_f32 (float32x4_t __a, float32_t __b)
+ {
+   return __builtin_mve_vcmpneq_n_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcmpneq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_n_f32 (float32x4_t __a, float32_t __b)
+ {
+   return __builtin_mve_vcmpltq_n_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcmpltq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_n_f32 (float32x4_t __a, float32_t __b)
+ {
+   return __builtin_mve_vcmpleq_n_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcmpleq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_n_f32 (float32x4_t __a, float32_t __b)
+ {
+   return __builtin_mve_vcmpgtq_n_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcmpgtq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_n_f32 (float32x4_t __a, float32_t __b)
+ {
+   return __builtin_mve_vcmpgeq_n_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcmpgeq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_n_f32 (float32x4_t __a, float32_t __b)
+ {
+   return __builtin_mve_vcmpeqq_n_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcmpeqq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vsubq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vorrq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vornq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_n_f32 (float32x4_t __a, float32_t __b)
+ {
+   return __builtin_mve_vmulq_n_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vmulq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmvq_f32 (float32_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vminnmvq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vminnmq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmavq_f32 (float32_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vminnmavq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmaq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vminnmaq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmvq_f32 (float32_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vmaxnmvq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vmaxnmq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmavq_f32 (float32_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vmaxnmavq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmaq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vmaxnmaq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_veorq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot90_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcmulq_rot90_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot270_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcmulq_rot270_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot180_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcmulq_rot180_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcmulq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcaddq_rot90_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcaddq_rot270_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vbicq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vandq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_n_f32 (float32x4_t __a, float32_t __b)
+ {
+   return __builtin_mve_vaddq_n_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vabdq_fv4sf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvttq_f16_f32 (float16x8_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcvttq_f16_f32v8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtbq_f16_f32 (float16x8_t __a, float32x4_t __b)
+ {
+   return __builtin_mve_vcvtbq_f16_f32v8hf (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_m_s16_f16 (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtaq_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_m_u16_f16 (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtaq_m_uv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_m_s32_f32 (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtaq_m_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_m_u32_f32 (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtaq_m_uv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_f16_s16 (float16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_to_f_sv8hf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_f16_u16 (float16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_to_f_uv8hf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_f32_s32 (float32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_to_f_sv4sf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_f32_u32 (float32x4_t __inactive, uint32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_to_f_uv4sf (__inactive, __a, __p);
+ }
+ 
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtbq_m_f16_f32 (float16x8_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtbq_m_f16_f32v8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtbq_m_f32_f16 (float32x4_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtbq_m_f32_f16v4sf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvttq_m_f16_f32 (float16x8_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvttq_m_f16_f32v8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvttq_m_f32_f16 (float32x4_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvttq_m_f32_f16v4sf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev32q_m_fv8hf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_f16 (float16x8_t __a, float16x8_t __b, float16x8_t __c)
+ {
+   return __builtin_mve_vcmlaq_fv8hf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot180_f16 (float16x8_t __a, float16x8_t __b, float16x8_t __c)
+ {
+   return __builtin_mve_vcmlaq_rot180_fv8hf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot270_f16 (float16x8_t __a, float16x8_t __b, float16x8_t __c)
+ {
+   return __builtin_mve_vcmlaq_rot270_fv8hf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot90_f16 (float16x8_t __a, float16x8_t __b, float16x8_t __c)
+ {
+   return __builtin_mve_vcmlaq_rot90_fv8hf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq_f16 (float16x8_t __a, float16x8_t __b, float16x8_t __c)
+ {
+   return __builtin_mve_vfmaq_fv8hf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq_n_f16 (float16x8_t __a, float16x8_t __b, float16_t __c)
+ {
+   return __builtin_mve_vfmaq_n_fv8hf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmasq_n_f16 (float16x8_t __a, float16x8_t __b, float16_t __c)
+ {
+   return __builtin_mve_vfmasq_n_fv8hf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmsq_f16 (float16x8_t __a, float16x8_t __b, float16x8_t __c)
+ {
+   return __builtin_mve_vfmsq_fv8hf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabsq_m_fv8hf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_m_s16_f16 (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtmq_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_m_s16_f16 (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtnq_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_m_s16_f16 (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtpq_m_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_s16_f16 (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_from_f_sv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m_n_f16 (float16x8_t __inactive, float16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_fv8hf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmaq_m_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxnmaq_m_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmavq_p_f16 (float16_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxnmavq_p_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmvq_p_f16 (float16_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxnmvq_p_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmaq_m_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminnmaq_m_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmavq_p_f16 (float16_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminnmavq_p_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmvq_p_f16 (float16_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminnmvq_p_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vnegq_m_fv8hf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vpselq_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_fv8hf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndaq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndaq_m_fv8hf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndmq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndmq_m_fv8hf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndnq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndnq_m_fv8hf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndpq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndpq_m_fv8hf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndq_m_fv8hf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndxq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndxq_m_fv8hf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_n_f16 (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_n_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgeq_m_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m_n_f16 (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgeq_m_n_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgtq_m_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m_n_f16 (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgtq_m_n_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpleq_m_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m_n_f16 (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpleq_m_n_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpltq_m_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m_n_f16 (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpltq_m_n_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_n_f16 (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_n_fv8hf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_m_u16_f16 (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtmq_m_uv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_m_u16_f16 (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtnq_m_uv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_m_u16_f16 (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtpq_m_uv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_u16_f16 (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_from_f_uv8hi (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+ {
+   return __builtin_mve_vcmlaq_fv4sf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot180_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+ {
+   return __builtin_mve_vcmlaq_rot180_fv4sf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot270_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+ {
+   return __builtin_mve_vcmlaq_rot270_fv4sf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot90_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+ {
+   return __builtin_mve_vcmlaq_rot90_fv4sf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+ {
+   return __builtin_mve_vfmaq_fv4sf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c)
+ {
+   return __builtin_mve_vfmaq_n_fv4sf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmasq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c)
+ {
+   return __builtin_mve_vfmasq_n_fv4sf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmsq_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+ {
+   return __builtin_mve_vfmsq_fv4sf (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabsq_m_fv4sf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_m_s32_f32 (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtmq_m_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_m_s32_f32 (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtnq_m_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_m_s32_f32 (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtpq_m_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_s32_f32 (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_from_f_sv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m_n_f32 (float32x4_t __inactive, float32_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_fv4sf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmaq_m_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxnmaq_m_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmavq_p_f32 (float32_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxnmavq_p_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmvq_p_f32 (float32_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxnmvq_p_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmaq_m_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminnmaq_m_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmavq_p_f32 (float32_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminnmavq_p_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmvq_p_f32 (float32_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminnmvq_p_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vnegq_m_fv4sf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vpselq_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_fv4sf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndaq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndaq_m_fv4sf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndmq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndmq_m_fv4sf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndnq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndnq_m_fv4sf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndpq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndpq_m_fv4sf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndq_m_fv4sf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndxq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndxq_m_fv4sf (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m_n_f32 (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpeqq_m_n_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgeq_m_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m_n_f32 (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgeq_m_n_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgtq_m_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m_n_f32 (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpgtq_m_n_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpleq_m_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m_n_f32 (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpleq_m_n_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpltq_m_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m_n_f32 (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpltq_m_n_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m_n_f32 (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmpneq_m_n_fv4sf (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_m_u32_f32 (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtmq_m_uv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_m_u32_f32 (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtnq_m_uv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_m_u32_f32 (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtpq_m_uv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_u32_f32 (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_from_f_uv4si (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n_f16_u16 (float16x8_t __inactive, uint16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_to_f_uv8hf (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n_f16_s16 (float16x8_t __inactive, int16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_to_f_sv8hf (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n_f32_u32 (float32x4_t __inactive, uint32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_to_f_uv4sf (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n_f32_s32 (float32x4_t __inactive, int32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_to_f_sv4sf (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_n_f32 (float32x4_t __inactive, float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m_n_f16 (float16x8_t __inactive, float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m_n_f32 (float32x4_t __inactive, float32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m_n_f16 (float16x8_t __inactive, float16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_m_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmlaq_m_fv4sf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_m_f16 (float16x8_t __a, float16x8_t __b, float16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmlaq_m_fv8hf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot180_m_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmlaq_rot180_m_fv4sf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot180_m_f16 (float16x8_t __a, float16x8_t __b, float16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmlaq_rot180_m_fv8hf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot270_m_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmlaq_rot270_m_fv4sf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot270_m_f16 (float16x8_t __a, float16x8_t __b, float16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmlaq_rot270_m_fv8hf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot90_m_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmlaq_rot90_m_fv4sf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot90_m_f16 (float16x8_t __a, float16x8_t __b, float16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmlaq_rot90_m_fv8hf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot180_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_rot180_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot180_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_rot180_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot270_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_rot270_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot270_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_rot270_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot90_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_rot90_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot90_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_rot90_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n_s32_f32 (int32x4_t __inactive, float32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_from_f_sv4si (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n_s16_f16 (int16x8_t __inactive, float16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_from_f_sv8hi (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n_u32_f32 (uint32x4_t __inactive, float32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_from_f_uv4si (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n_u16_f16 (uint16x8_t __inactive, float16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_from_f_uv8hi (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq_m_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vfmaq_m_fv4sf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq_m_f16 (float16x8_t __a, float16x8_t __b, float16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vfmaq_m_fv8hf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq_m_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vfmaq_m_n_fv4sf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq_m_n_f16 (float16x8_t __a, float16x8_t __b, float16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vfmaq_m_n_fv8hf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmasq_m_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vfmasq_m_n_fv4sf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmasq_m_n_f16 (float16x8_t __a, float16x8_t __b, float16_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vfmasq_m_n_fv8hf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmsq_m_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vfmsq_m_fv4sf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmsq_m_f16 (float16x8_t __a, float16x8_t __b, float16x8_t __c, mve_pred16_t __p)
+ {
+   return __builtin_mve_vfmsq_m_fv8hf (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxnmq_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxnmq_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminnmq_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminnmq_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_n_f32 (float32x4_t __inactive, float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m_n_f16 (float16x8_t __inactive, float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_n_f32 (float32x4_t __inactive, float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_fv4sf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m_n_f16 (float16x8_t __inactive, float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_fv8hf (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_f32 (float32_t const * __base)
+ {
+   return __builtin_mve_vld1q_fv4sf((__builtin_neon_si *) __base);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_f16 (float16_t const * __base)
+ {
+   return __builtin_mve_vld1q_fv8hf((__builtin_neon_hi *) __base);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_f32 (float32_t const * __base)
+ {
+   return __builtin_mve_vldrwq_fv4sf((__builtin_neon_si *) __base);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_z_f32 (float32_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrwq_z_fv4sf((__builtin_neon_si *) __base, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_z_f16 (float16_t const * __base, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_z_fv8hf((__builtin_neon_hi *) __base, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_f16 (float16_t const * __base)
+ {
+   return __builtin_mve_vldrhq_fv8hf((__builtin_neon_hi *) __base);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_f16 (float16_t const * __base, uint16x8_t __offset)
+ {
+   return __builtin_mve_vldrhq_gather_offset_fv8hf((__builtin_neon_hi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_z_f16 (float16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_gather_offset_z_fv8hf((__builtin_neon_hi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_f16 (float16_t const * __base, uint16x8_t __offset)
+ {
+   return __builtin_mve_vldrhq_gather_shifted_offset_fv8hf ((__builtin_neon_hi *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_z_f16 (float16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrhq_gather_shifted_offset_z_fv8hf ((__builtin_neon_hi *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_base_f32 (uint32x4_t __addr, const int __offset)
+ {
+   return __builtin_mve_vldrwq_gather_base_fv4sf (__addr, __offset);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_base_z_f32 (uint32x4_t __addr, const int __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrwq_gather_base_z_fv4sf (__addr, __offset, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_offset_f32 (float32_t const * __base, uint32x4_t __offset)
+ {
+   return __builtin_mve_vldrwq_gather_offset_fv4sf((__builtin_neon_si *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_offset_z_f32 (float32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrwq_gather_offset_z_fv4sf((__builtin_neon_si *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_shifted_offset_f32 (float32_t const * __base, uint32x4_t __offset)
+ {
+   return __builtin_mve_vldrwq_gather_shifted_offset_fv4sf ((__builtin_neon_si *) __base, __offset);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_shifted_offset_z_f32 (float32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+   return __builtin_mve_vldrwq_gather_shifted_offset_z_fv4sf ((__builtin_neon_si *) __base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_p_f32 (float32_t * __addr, float32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_p_fv4sf ((__builtin_neon_si *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_f32 (float32_t * __addr, float32x4_t __value)
+ {
+   __builtin_mve_vstrwq_fv4sf ((__builtin_neon_si *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_f32 (float32_t * __addr, float32x4_t __value)
+ {
+   __builtin_mve_vst1q_fv4sf ((__builtin_neon_si *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_f16 (float16_t * __addr, float16x8_t __value)
+ {
+   __builtin_mve_vst1q_fv8hf ((__builtin_neon_hi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_f16 (float16_t * __addr, float16x8_t __value)
+ {
+   __builtin_mve_vstrhq_fv8hf ((__builtin_neon_hi *) __addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_p_f16 (float16_t * __addr, float16x8_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_p_fv8hf ((__builtin_neon_hi *) __addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_f16 (float16_t * __base, uint16x8_t __offset, float16x8_t __value)
+ {
+   __builtin_mve_vstrhq_scatter_offset_fv8hf ((__builtin_neon_hi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_p_f16 (float16_t * __base, uint16x8_t __offset, float16x8_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_scatter_offset_p_fv8hf ((__builtin_neon_hi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_f16 (float16_t * __base, uint16x8_t __offset, float16x8_t __value)
+ {
+   __builtin_mve_vstrhq_scatter_shifted_offset_fv8hf ((__builtin_neon_hi *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_p_f16 (float16_t * __base, uint16x8_t __offset, float16x8_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrhq_scatter_shifted_offset_p_fv8hf ((__builtin_neon_hi *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_f32 (uint32x4_t __addr, const int __offset, float32x4_t __value)
+ {
+   __builtin_mve_vstrwq_scatter_base_fv4sf (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_p_f32 (uint32x4_t __addr, const int __offset, float32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_scatter_base_p_fv4sf (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_offset_f32 (float32_t * __base, uint32x4_t __offset, float32x4_t __value)
+ {
+   __builtin_mve_vstrwq_scatter_offset_fv4sf ((__builtin_neon_si *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_offset_p_f32 (float32_t * __base, uint32x4_t __offset, float32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_scatter_offset_p_fv4sf ((__builtin_neon_si *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_shifted_offset_f32 (float32_t * __base, uint32x4_t __offset, float32x4_t __value)
+ {
+   __builtin_mve_vstrwq_scatter_shifted_offset_fv4sf ((__builtin_neon_si *) __base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_shifted_offset_p_f32 (float32_t * __base, uint32x4_t __offset, float32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_scatter_shifted_offset_p_fv4sf ((__builtin_neon_si *) __base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_f16 (float16x8_t __a, float16x8_t __b)
+ {
+   return __a + __b;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_f32 (float32x4_t __a, float32x4_t __b)
+ {
+   return __a + __b;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_base_wb_f32 (uint32x4_t * __addr, const int __offset)
+ {
+   float32x4_t
+   result = __builtin_mve_vldrwq_gather_base_nowb_fv4sf (*__addr, __offset);
+   *__addr = __builtin_mve_vldrwq_gather_base_wb_fv4sf (*__addr, __offset);
+   return result;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_base_wb_z_f32 (uint32x4_t * __addr, const int __offset, mve_pred16_t __p)
+ {
+   float32x4_t
+   result = __builtin_mve_vldrwq_gather_base_nowb_z_fv4sf (*__addr, __offset, __p);
+   *__addr = __builtin_mve_vldrwq_gather_base_wb_z_fv4sf (*__addr, __offset, __p);
+   return result;
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_wb_f32 (uint32x4_t * __addr, const int __offset, float32x4_t __value)
+ {
+   __builtin_mve_vstrwq_scatter_base_wb_fv4sf (*__addr, __offset, __value);
+   __builtin_mve_vstrwq_scatter_base_wb_add_fv4sf (*__addr, __offset, *__addr);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_wb_p_f32 (uint32x4_t * __addr, const int __offset, float32x4_t __value, mve_pred16_t __p)
+ {
+   __builtin_mve_vstrwq_scatter_base_wb_p_fv4sf (*__addr, __offset, __value, __p);
+   __builtin_mve_vstrwq_scatter_base_wb_p_add_fv4sf (*__addr, __offset, *__addr, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_x_n_f16 (float16_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_x_n_f32 (float32_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vdupq_m_n_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminnmq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vminnmq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxnmq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmaxnmq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabdq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_x_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabsq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_x_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vabsq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_n_f16 (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x_n_f32 (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vaddq_m_n_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_x_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vnegq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_x_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vnegq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_n_f16 (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x_n_f32 (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vmulq_m_n_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_n_f16 (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x_n_f32 (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vsubq_m_n_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot90_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcaddq_rot270_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot90_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_rot90_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot90_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_rot90_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot180_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_rot180_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot180_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_rot180_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot270_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_rot270_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot270_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcmulq_rot270_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_x_s16_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtaq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_x_s32_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtaq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_x_u16_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtaq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_x_u32_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtaq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_x_s16_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtnq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_x_s32_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtnq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_x_u16_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtnq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_x_u32_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtnq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_x_s16_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtpq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_x_s32_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtpq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_x_u16_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtpq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_x_u32_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtpq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_x_s16_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtmq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_x_s32_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtmq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_x_u16_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtmq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_x_u32_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtmq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtbq_x_f32_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtbq_m_f32_f16v4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvttq_x_f32_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvttq_m_f32_f16v4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_f16_u16 (uint16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_to_f_uv8hf (__arm_vuninitializedq_f16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_f16_s16 (int16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_to_f_sv8hf (__arm_vuninitializedq_f16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_f32_s32 (int32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_to_f_sv4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_f32_u32 (uint32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_to_f_uv4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_n_f16_s16 (int16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_to_f_sv8hf (__arm_vuninitializedq_f16 (), __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_n_f16_u16 (uint16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_to_f_uv8hf (__arm_vuninitializedq_f16 (), __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_n_f32_s32 (int32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_to_f_sv4sf (__arm_vuninitializedq_f32 (), __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_n_f32_u32 (uint32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_to_f_uv4sf (__arm_vuninitializedq_f32 (), __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_s16_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_from_f_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_s32_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_from_f_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_u16_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_from_f_uv8hi (__arm_vuninitializedq_u16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_u32_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_from_f_uv4si (__arm_vuninitializedq_u32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_n_s16_f16 (float16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_from_f_sv8hi (__arm_vuninitializedq_s16 (), __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_n_s32_f32 (float32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_from_f_sv4si (__arm_vuninitializedq_s32 (), __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_n_u16_f16 (float16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_from_f_uv8hi (__arm_vuninitializedq_u16 (), __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_n_u32_f32 (float32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+   return __builtin_mve_vcvtq_m_n_from_f_uv4si (__arm_vuninitializedq_u32 (), __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndq_x_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndq_x_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndnq_x_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndnq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndnq_x_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndnq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndmq_x_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndmq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndmq_x_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndmq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndpq_x_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndpq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndpq_x_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndpq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndaq_x_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndaq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndaq_x_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndaq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndxq_x_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndxq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndxq_x_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrndxq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vandq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbicq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x_n_f16 (float16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x_n_f32 (float32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vbrsrq_m_n_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_veorq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vornq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+   return __builtin_mve_vorrq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_x_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev32q_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x_f16 (float16x8_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x_f32 (float32x4_t __a, mve_pred16_t __p)
+ {
+   return __builtin_mve_vrev64q_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q_f16 (float16_t const * __addr)
+ {
+   union { float16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__o = __builtin_mve_vld4qv8hf (__addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline float16x8x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q_f16 (float16_t const * __addr)
+ {
+   union { float16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__o = __builtin_mve_vld2qv8hf (__addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z_f16 (float16_t const *__base, mve_pred16_t __p)
+ {
+   return vldrhq_z_f16 (__base, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q_f16 (float16_t * __addr, float16x8x2_t __value)
+ {
+   union { float16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst2qv8hf (__addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p_f16 (float16_t * __addr, float16x8_t __value, mve_pred16_t __p)
+ {
+   return vstrhq_p_f16 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline float32x4x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q_f32 (float32_t const * __addr)
+ {
+   union { float32x4x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__o = __builtin_mve_vld4qv4sf (__addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline float32x4x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q_f32 (float32_t const * __addr)
+ {
+   union { float32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__o = __builtin_mve_vld2qv4sf (__addr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z_f32 (float32_t const *__base, mve_pred16_t __p)
+ {
+   return vldrwq_z_f32 (__base, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q_f32 (float32_t * __addr, float32x4x2_t __value)
+ {
+   union { float32x4x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__i = __value;
+   __builtin_mve_vst2qv4sf (__addr, __rv.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p_f32 (float32_t * __addr, float32x4_t __value, mve_pred16_t __p)
+ {
+   return vstrwq_p_f32 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane_f16 (float16_t __a, float16x8_t __b, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__b, __idx);
+   __b[__ARM_LANEQ(__b,__idx)] = __a;
+   return __b;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane_f32 (float32_t __a, float32x4_t __b, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__b, __idx);
+   __b[__ARM_LANEQ(__b,__idx)] = __a;
+   return __b;
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane_f16 (float16x8_t __a, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__a, __idx);
+   return __a[__ARM_LANEQ(__a,__idx)];
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane_f32 (float32x4_t __a, const int __idx)
+ {
+   __ARM_CHECK_LANEQ (__a, __idx);
+   return __a[__ARM_LANEQ(__a,__idx)];
+ }
+ #endif
+ 
+ #ifdef __cplusplus
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q (int8_t * __addr, int8x16x4_t __value)
+ {
+  __arm_vst4q_s8 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q (int16_t * __addr, int16x8x4_t __value)
+ {
+  __arm_vst4q_s16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q (int32_t * __addr, int32x4x4_t __value)
+ {
+  __arm_vst4q_s32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q (uint8_t * __addr, uint8x16x4_t __value)
+ {
+  __arm_vst4q_u8 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q (uint16_t * __addr, uint16x8x4_t __value)
+ {
+  __arm_vst4q_u16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q (uint32_t * __addr, uint32x4x4_t __value)
+ {
+  __arm_vst4q_u32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n (int8_t __a)
+ {
+  return __arm_vdupq_n_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n (int16_t __a)
+ {
+  return __arm_vdupq_n_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n (int32_t __a)
+ {
+  return __arm_vdupq_n_s32 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq (int8x16_t __a)
+ {
+  return __arm_vabsq_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq (int16x8_t __a)
+ {
+  return __arm_vabsq_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq (int32x4_t __a)
+ {
+  return __arm_vabsq_s32 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq (int8x16_t __a)
+ {
+  return __arm_vclsq_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq (int16x8_t __a)
+ {
+  return __arm_vclsq_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq (int32x4_t __a)
+ {
+  return __arm_vclsq_s32 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq (int8x16_t __a)
+ {
+  return __arm_vclzq_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq (int16x8_t __a)
+ {
+  return __arm_vclzq_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq (int32x4_t __a)
+ {
+  return __arm_vclzq_s32 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq (int8x16_t __a)
+ {
+  return __arm_vnegq_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq (int16x8_t __a)
+ {
+  return __arm_vnegq_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq (int32x4_t __a)
+ {
+  return __arm_vnegq_s32 (__a);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvq (int32x4_t __a)
+ {
+  return __arm_vaddlvq_s32 (__a);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq (int8x16_t __a)
+ {
+  return __arm_vaddvq_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq (int16x8_t __a)
+ {
+  return __arm_vaddvq_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq (int32x4_t __a)
+ {
+  return __arm_vaddvq_s32 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq (int8x16_t __a)
+ {
+  return __arm_vmovlbq_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq (int16x8_t __a)
+ {
+  return __arm_vmovlbq_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq (int8x16_t __a)
+ {
+  return __arm_vmovltq_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq (int16x8_t __a)
+ {
+  return __arm_vmovltq_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq (int8x16_t __a)
+ {
+  return __arm_vmvnq_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq (int16x8_t __a)
+ {
+  return __arm_vmvnq_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq (int32x4_t __a)
+ {
+  return __arm_vmvnq_s32 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev16q (int8x16_t __a)
+ {
+  return __arm_vrev16q_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q (int8x16_t __a)
+ {
+  return __arm_vrev32q_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q (int16x8_t __a)
+ {
+  return __arm_vrev32q_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q (int8x16_t __a)
+ {
+  return __arm_vrev64q_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q (int16x8_t __a)
+ {
+  return __arm_vrev64q_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q (int32x4_t __a)
+ {
+  return __arm_vrev64q_s32 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqabsq (int8x16_t __a)
+ {
+  return __arm_vqabsq_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqabsq (int16x8_t __a)
+ {
+  return __arm_vqabsq_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqabsq (int32x4_t __a)
+ {
+  return __arm_vqabsq_s32 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqnegq (int8x16_t __a)
+ {
+  return __arm_vqnegq_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqnegq (int16x8_t __a)
+ {
+  return __arm_vqnegq_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqnegq (int32x4_t __a)
+ {
+  return __arm_vqnegq_s32 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q (uint8x16_t __a)
+ {
+  return __arm_vrev64q_u8 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q (uint16x8_t __a)
+ {
+  return __arm_vrev64q_u16 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q (uint32x4_t __a)
+ {
+  return __arm_vrev64q_u32 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq (uint8x16_t __a)
+ {
+  return __arm_vmvnq_u8 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq (uint16x8_t __a)
+ {
+  return __arm_vmvnq_u16 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq (uint32x4_t __a)
+ {
+  return __arm_vmvnq_u32 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n (uint8_t __a)
+ {
+  return __arm_vdupq_n_u8 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n (uint16_t __a)
+ {
+  return __arm_vdupq_n_u16 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n (uint32_t __a)
+ {
+  return __arm_vdupq_n_u32 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq (uint8x16_t __a)
+ {
+  return __arm_vclzq_u8 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq (uint16x8_t __a)
+ {
+  return __arm_vclzq_u16 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq (uint32x4_t __a)
+ {
+  return __arm_vclzq_u32 (__a);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq (uint8x16_t __a)
+ {
+  return __arm_vaddvq_u8 (__a);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq (uint16x8_t __a)
+ {
+  return __arm_vaddvq_u16 (__a);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq (uint32x4_t __a)
+ {
+  return __arm_vaddvq_u32 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q (uint8x16_t __a)
+ {
+  return __arm_vrev32q_u8 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q (uint16x8_t __a)
+ {
+  return __arm_vrev32q_u16 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq (uint8x16_t __a)
+ {
+  return __arm_vmovltq_u8 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq (uint16x8_t __a)
+ {
+  return __arm_vmovltq_u16 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq (uint8x16_t __a)
+ {
+  return __arm_vmovlbq_u8 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq (uint16x8_t __a)
+ {
+  return __arm_vmovlbq_u16 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev16q (uint8x16_t __a)
+ {
+  return __arm_vrev16q_u8 (__a);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvq (uint32x4_t __a)
+ {
+  return __arm_vaddlvq_u32 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq (int8x16_t __a, const int __imm)
+ {
+  return __arm_vshrq_n_s8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq (int16x8_t __a, const int __imm)
+ {
+  return __arm_vshrq_n_s16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq (int32x4_t __a, const int __imm)
+ {
+  return __arm_vshrq_n_s32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq (uint8x16_t __a, const int __imm)
+ {
+  return __arm_vshrq_n_u8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq (uint16x8_t __a, const int __imm)
+ {
+  return __arm_vshrq_n_u16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq (uint32x4_t __a, const int __imm)
+ {
+  return __arm_vshrq_n_u32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvq_p (int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vaddlvq_p_s32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvq_p (uint32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vaddlvq_p_u32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vcmpneq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vcmpneq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vcmpneq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vcmpneq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vcmpneq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vcmpneq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vshlq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vshlq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vshlq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq (uint8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vshlq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq (uint16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vshlq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq (uint32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vshlq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vsubq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (uint8x16_t __a, uint8_t __b)
+ {
+  return __arm_vsubq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vrmulhq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vrhaddq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vqsubq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq (uint8x16_t __a, uint8_t __b)
+ {
+  return __arm_vqsubq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vqaddq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq (uint8x16_t __a, uint8_t __b)
+ {
+  return __arm_vqaddq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vorrq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vornq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vmulq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (uint8x16_t __a, uint8_t __b)
+ {
+  return __arm_vmulq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vmulltq_int_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vmullbq_int_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vmulhq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vmladavq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq (uint8_t __a, uint8x16_t __b)
+ {
+  return __arm_vminvq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vminq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq (uint8_t __a, uint8x16_t __b)
+ {
+  return __arm_vmaxvq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vmaxq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vhsubq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq (uint8x16_t __a, uint8_t __b)
+ {
+  return __arm_vhsubq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vhaddq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq (uint8x16_t __a, uint8_t __b)
+ {
+  return __arm_vhaddq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_veorq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (uint8x16_t __a, uint8_t __b)
+ {
+  return __arm_vcmpneq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vcmphiq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq (uint8x16_t __a, uint8_t __b)
+ {
+  return __arm_vcmphiq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vcmpeqq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (uint8x16_t __a, uint8_t __b)
+ {
+  return __arm_vcmpeqq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vcmpcsq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq (uint8x16_t __a, uint8_t __b)
+ {
+  return __arm_vcmpcsq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90 (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vcaddq_rot90_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270 (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vcaddq_rot270_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vbicq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vandq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_p (uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vaddvq_p_u8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq (uint32_t __a, uint8x16_t __b)
+ {
+  return __arm_vaddvaq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (uint8x16_t __a, uint8_t __b)
+ {
+  return __arm_vaddq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vabdq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_r (uint8x16_t __a, int32_t __b)
+ {
+  return __arm_vshlq_r_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq (uint8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vrshlq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq (uint8x16_t __a, int32_t __b)
+ {
+  return __arm_vrshlq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq (uint8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqshlq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_r (uint8x16_t __a, int32_t __b)
+ {
+  return __arm_vqshlq_r_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq (uint8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqrshlq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq (uint8x16_t __a, int32_t __b)
+ {
+  return __arm_vqrshlq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminavq (uint8_t __a, int8x16_t __b)
+ {
+  return __arm_vminavq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminaq (uint8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vminaq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxavq (uint8_t __a, int8x16_t __b)
+ {
+  return __arm_vmaxavq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxaq (uint8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vmaxaq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq (uint8x16_t __a, int32_t __b)
+ {
+  return __arm_vbrsrq_n_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_n (uint8x16_t __a, const int __imm)
+ {
+  return __arm_vshlq_n_u8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq (uint8x16_t __a, const int __imm)
+ {
+  return __arm_vrshrq_n_u8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_n (uint8x16_t __a, const int __imm)
+ {
+  return __arm_vqshlq_n_u8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vcmpneq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vcmpltq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vcmpltq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vcmpleq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vcmpleq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vcmpgtq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vcmpgtq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vcmpgeq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vcmpgeq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vcmpeqq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vcmpeqq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshluq (int8x16_t __a, const int __imm)
+ {
+  return __arm_vqshluq_n_s8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_p (int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vaddvq_p_s8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vsubq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vsubq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_r (int8x16_t __a, int32_t __b)
+ {
+  return __arm_vshlq_r_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vrshlq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq (int8x16_t __a, int32_t __b)
+ {
+  return __arm_vrshlq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vrmulhq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vrhaddq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqsubq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vqsubq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqshlq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_r (int8x16_t __a, int32_t __b)
+ {
+  return __arm_vqshlq_r_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqrshlq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq (int8x16_t __a, int32_t __b)
+ {
+  return __arm_vqrshlq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqrdmulhq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vqrdmulhq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqdmulhq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vqdmulhq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqaddq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vqaddq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vorrq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vornq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vmulq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vmulq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vmulltq_int_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vmullbq_int_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vmulhq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavxq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vmlsdavxq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vmlsdavq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavxq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vmladavxq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vmladavq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq (int8_t __a, int8x16_t __b)
+ {
+  return __arm_vminvq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vminq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq (int8_t __a, int8x16_t __b)
+ {
+  return __arm_vmaxvq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vmaxq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vhsubq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vhsubq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90 (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vhcaddq_rot90_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270 (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vhcaddq_rot270_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vhaddq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vhaddq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_veorq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90 (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vcaddq_rot90_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270 (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vcaddq_rot270_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq (int8x16_t __a, int32_t __b)
+ {
+  return __arm_vbrsrq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vbicq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vandq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq (int32_t __a, int8x16_t __b)
+ {
+  return __arm_vaddvaq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (int8x16_t __a, int8_t __b)
+ {
+  return __arm_vaddq_n_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vabdq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_n (int8x16_t __a, const int __imm)
+ {
+  return __arm_vshlq_n_s8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq (int8x16_t __a, const int __imm)
+ {
+  return __arm_vrshrq_n_s8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_n (int8x16_t __a, const int __imm)
+ {
+  return __arm_vqshlq_n_s8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vsubq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (uint16x8_t __a, uint16_t __b)
+ {
+  return __arm_vsubq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vrmulhq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vrhaddq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vqsubq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq (uint16x8_t __a, uint16_t __b)
+ {
+  return __arm_vqsubq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vqaddq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq (uint16x8_t __a, uint16_t __b)
+ {
+  return __arm_vqaddq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vorrq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vornq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vmulq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (uint16x8_t __a, uint16_t __b)
+ {
+  return __arm_vmulq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vmulltq_int_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vmullbq_int_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vmulhq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vmladavq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq (uint16_t __a, uint16x8_t __b)
+ {
+  return __arm_vminvq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vminq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq (uint16_t __a, uint16x8_t __b)
+ {
+  return __arm_vmaxvq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vmaxq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vhsubq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq (uint16x8_t __a, uint16_t __b)
+ {
+  return __arm_vhsubq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vhaddq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq (uint16x8_t __a, uint16_t __b)
+ {
+  return __arm_vhaddq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_veorq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (uint16x8_t __a, uint16_t __b)
+ {
+  return __arm_vcmpneq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vcmphiq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq (uint16x8_t __a, uint16_t __b)
+ {
+  return __arm_vcmphiq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vcmpeqq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (uint16x8_t __a, uint16_t __b)
+ {
+  return __arm_vcmpeqq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vcmpcsq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq (uint16x8_t __a, uint16_t __b)
+ {
+  return __arm_vcmpcsq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90 (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vcaddq_rot90_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270 (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vcaddq_rot270_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vbicq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vandq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_p (uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vaddvq_p_u16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq (uint32_t __a, uint16x8_t __b)
+ {
+  return __arm_vaddvaq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (uint16x8_t __a, uint16_t __b)
+ {
+  return __arm_vaddq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vabdq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_r (uint16x8_t __a, int32_t __b)
+ {
+  return __arm_vshlq_r_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq (uint16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vrshlq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq (uint16x8_t __a, int32_t __b)
+ {
+  return __arm_vrshlq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq (uint16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqshlq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_r (uint16x8_t __a, int32_t __b)
+ {
+  return __arm_vqshlq_r_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq (uint16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqrshlq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq (uint16x8_t __a, int32_t __b)
+ {
+  return __arm_vqrshlq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminavq (uint16_t __a, int16x8_t __b)
+ {
+  return __arm_vminavq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminaq (uint16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vminaq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxavq (uint16_t __a, int16x8_t __b)
+ {
+  return __arm_vmaxavq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxaq (uint16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmaxaq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq (uint16x8_t __a, int32_t __b)
+ {
+  return __arm_vbrsrq_n_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_n (uint16x8_t __a, const int __imm)
+ {
+  return __arm_vshlq_n_u16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq (uint16x8_t __a, const int __imm)
+ {
+  return __arm_vrshrq_n_u16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_n (uint16x8_t __a, const int __imm)
+ {
+  return __arm_vqshlq_n_u16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vcmpneq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vcmpltq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vcmpltq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vcmpleq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vcmpleq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vcmpgtq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vcmpgtq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vcmpgeq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vcmpgeq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vcmpeqq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vcmpeqq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshluq (int16x8_t __a, const int __imm)
+ {
+  return __arm_vqshluq_n_s16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_p (int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vaddvq_p_s16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vsubq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vsubq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_r (int16x8_t __a, int32_t __b)
+ {
+  return __arm_vshlq_r_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vrshlq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq (int16x8_t __a, int32_t __b)
+ {
+  return __arm_vrshlq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vrmulhq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vrhaddq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqsubq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vqsubq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqshlq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_r (int16x8_t __a, int32_t __b)
+ {
+  return __arm_vqshlq_r_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqrshlq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq (int16x8_t __a, int32_t __b)
+ {
+  return __arm_vqrshlq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqrdmulhq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vqrdmulhq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqdmulhq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vqdmulhq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqaddq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vqaddq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vorrq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vornq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmulq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vmulq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmulltq_int_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmullbq_int_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmulhq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavxq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmlsdavxq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmlsdavq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavxq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmladavxq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmladavq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq (int16_t __a, int16x8_t __b)
+ {
+  return __arm_vminvq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vminq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq (int16_t __a, int16x8_t __b)
+ {
+  return __arm_vmaxvq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmaxq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vhsubq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vhsubq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90 (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vhcaddq_rot90_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270 (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vhcaddq_rot270_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vhaddq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vhaddq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_veorq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90 (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vcaddq_rot90_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270 (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vcaddq_rot270_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq (int16x8_t __a, int32_t __b)
+ {
+  return __arm_vbrsrq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vbicq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vandq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq (int32_t __a, int16x8_t __b)
+ {
+  return __arm_vaddvaq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vaddq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vabdq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_n (int16x8_t __a, const int __imm)
+ {
+  return __arm_vshlq_n_s16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq (int16x8_t __a, const int __imm)
+ {
+  return __arm_vrshrq_n_s16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_n (int16x8_t __a, const int __imm)
+ {
+  return __arm_vqshlq_n_s16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vsubq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (uint32x4_t __a, uint32_t __b)
+ {
+  return __arm_vsubq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vrmulhq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vrhaddq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vqsubq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq (uint32x4_t __a, uint32_t __b)
+ {
+  return __arm_vqsubq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vqaddq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq (uint32x4_t __a, uint32_t __b)
+ {
+  return __arm_vqaddq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vorrq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vornq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vmulq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (uint32x4_t __a, uint32_t __b)
+ {
+  return __arm_vmulq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vmulltq_int_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vmullbq_int_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vmulhq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vmladavq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq (uint32_t __a, uint32x4_t __b)
+ {
+  return __arm_vminvq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vminq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq (uint32_t __a, uint32x4_t __b)
+ {
+  return __arm_vmaxvq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vmaxq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vhsubq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq (uint32x4_t __a, uint32_t __b)
+ {
+  return __arm_vhsubq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vhaddq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq (uint32x4_t __a, uint32_t __b)
+ {
+  return __arm_vhaddq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_veorq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (uint32x4_t __a, uint32_t __b)
+ {
+  return __arm_vcmpneq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vcmphiq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq (uint32x4_t __a, uint32_t __b)
+ {
+  return __arm_vcmphiq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vcmpeqq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (uint32x4_t __a, uint32_t __b)
+ {
+  return __arm_vcmpeqq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vcmpcsq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq (uint32x4_t __a, uint32_t __b)
+ {
+  return __arm_vcmpcsq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90 (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vcaddq_rot90_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270 (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vcaddq_rot270_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vbicq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vandq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_p (uint32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vaddvq_p_u32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq (uint32_t __a, uint32x4_t __b)
+ {
+  return __arm_vaddvaq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (uint32x4_t __a, uint32_t __b)
+ {
+  return __arm_vaddq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vabdq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_r (uint32x4_t __a, int32_t __b)
+ {
+  return __arm_vshlq_r_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq (uint32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vrshlq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq (uint32x4_t __a, int32_t __b)
+ {
+  return __arm_vrshlq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq (uint32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqshlq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_r (uint32x4_t __a, int32_t __b)
+ {
+  return __arm_vqshlq_r_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq (uint32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqrshlq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq (uint32x4_t __a, int32_t __b)
+ {
+  return __arm_vqrshlq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminavq (uint32_t __a, int32x4_t __b)
+ {
+  return __arm_vminavq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminaq (uint32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vminaq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxavq (uint32_t __a, int32x4_t __b)
+ {
+  return __arm_vmaxavq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxaq (uint32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmaxaq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq (uint32x4_t __a, int32_t __b)
+ {
+  return __arm_vbrsrq_n_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_n (uint32x4_t __a, const int __imm)
+ {
+  return __arm_vshlq_n_u32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq (uint32x4_t __a, const int __imm)
+ {
+  return __arm_vrshrq_n_u32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_n (uint32x4_t __a, const int __imm)
+ {
+  return __arm_vqshlq_n_u32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vcmpneq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vcmpltq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vcmpltq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vcmpleq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vcmpleq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vcmpgtq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vcmpgtq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vcmpgeq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vcmpgeq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vcmpeqq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vcmpeqq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshluq (int32x4_t __a, const int __imm)
+ {
+  return __arm_vqshluq_n_s32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvq_p (int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vaddvq_p_s32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vsubq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vsubq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_r (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vshlq_r_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vrshlq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vrshlq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vrmulhq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vrhaddq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqsubq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vqsubq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqshlq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_r (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vqshlq_r_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqrshlq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vqrshlq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqrdmulhq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vqrdmulhq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqdmulhq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vqdmulhq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqaddq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vqaddq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vorrq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vornq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmulq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vmulq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmulltq_int_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmullbq_int_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmulhq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavxq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmlsdavxq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmlsdavq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavxq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmladavxq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmladavq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq (int32_t __a, int32x4_t __b)
+ {
+  return __arm_vminvq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vminq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq (int32_t __a, int32x4_t __b)
+ {
+  return __arm_vmaxvq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmaxq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vhsubq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vhsubq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90 (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vhcaddq_rot90_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270 (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vhcaddq_rot270_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vhaddq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vhaddq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_veorq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90 (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vcaddq_rot90_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270 (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vcaddq_rot270_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vbrsrq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vbicq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vandq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq (int32_t __a, int32x4_t __b)
+ {
+  return __arm_vaddvaq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vaddq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vabdq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_n (int32x4_t __a, const int __imm)
+ {
+  return __arm_vshlq_n_s32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq (int32x4_t __a, const int __imm)
+ {
+  return __arm_vrshrq_n_s32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_n (int32x4_t __a, const int __imm)
+ {
+  return __arm_vqshlq_n_s32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq (uint8x16_t __a, uint16x8_t __b)
+ {
+  return __arm_vqmovntq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq (uint8x16_t __a, uint16x8_t __b)
+ {
+  return __arm_vqmovnbq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_poly (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vmulltq_poly_p8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_poly (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vmullbq_poly_p8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq (uint8x16_t __a, uint16x8_t __b)
+ {
+  return __arm_vmovntq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq (uint8x16_t __a, uint16x8_t __b)
+ {
+  return __arm_vmovnbq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vmlaldavq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovuntq (uint8x16_t __a, int16x8_t __b)
+ {
+  return __arm_vqmovuntq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovunbq (uint8x16_t __a, int16x8_t __b)
+ {
+  return __arm_vqmovunbq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq (uint8x16_t __a, const int __imm)
+ {
+  return __arm_vshlltq_n_u8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq (uint8x16_t __a, const int __imm)
+ {
+  return __arm_vshllbq_n_u8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq (uint16x8_t __a, const int __imm)
+ {
+  return __arm_vorrq_n_u16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq (uint16x8_t __a, const uint16_t __imm)
+ {
+  return __arm_vbicq_n_u16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq (int8x16_t __a, int16x8_t __b)
+ {
+  return __arm_vqmovntq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq (int8x16_t __a, int16x8_t __b)
+ {
+  return __arm_vqmovnbq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqdmulltq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vqdmulltq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqdmullbq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq (int16x8_t __a, int16_t __b)
+ {
+  return __arm_vqdmullbq_n_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq (int8x16_t __a, int16x8_t __b)
+ {
+  return __arm_vmovntq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq (int8x16_t __a, int16x8_t __b)
+ {
+  return __arm_vmovnbq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavxq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmlsldavxq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmlsldavq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavxq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmlaldavxq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vmlaldavq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq (int8x16_t __a, const int __imm)
+ {
+  return __arm_vshlltq_n_s8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq (int8x16_t __a, const int __imm)
+ {
+  return __arm_vshllbq_n_s8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq (int16x8_t __a, const int __imm)
+ {
+  return __arm_vorrq_n_s16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq (int16x8_t __a, const int16_t __imm)
+ {
+  return __arm_vbicq_n_s16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq (uint16x8_t __a, uint32x4_t __b)
+ {
+  return __arm_vqmovntq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq (uint16x8_t __a, uint32x4_t __b)
+ {
+  return __arm_vqmovnbq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_poly (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vmulltq_poly_p16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_poly (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vmullbq_poly_p16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq (uint16x8_t __a, uint32x4_t __b)
+ {
+  return __arm_vmovntq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq (uint16x8_t __a, uint32x4_t __b)
+ {
+  return __arm_vmovnbq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vmlaldavq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovuntq (uint16x8_t __a, int32x4_t __b)
+ {
+  return __arm_vqmovuntq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovunbq (uint16x8_t __a, int32x4_t __b)
+ {
+  return __arm_vqmovunbq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq (uint16x8_t __a, const int __imm)
+ {
+  return __arm_vshlltq_n_u16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq (uint16x8_t __a, const int __imm)
+ {
+  return __arm_vshllbq_n_u16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq (uint32x4_t __a, const int __imm)
+ {
+  return __arm_vorrq_n_u32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq (uint32x4_t __a, const uint32_t __imm)
+ {
+  return __arm_vbicq_n_u32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq (int16x8_t __a, int32x4_t __b)
+ {
+  return __arm_vqmovntq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq (int16x8_t __a, int32x4_t __b)
+ {
+  return __arm_vqmovnbq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqdmulltq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vqdmulltq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqdmullbq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq (int32x4_t __a, int32_t __b)
+ {
+  return __arm_vqdmullbq_n_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq (int16x8_t __a, int32x4_t __b)
+ {
+  return __arm_vmovntq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq (int16x8_t __a, int32x4_t __b)
+ {
+  return __arm_vmovnbq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavxq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmlsldavxq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmlsldavq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavxq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmlaldavxq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vmlaldavq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq (int16x8_t __a, const int __imm)
+ {
+  return __arm_vshlltq_n_s16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq (int16x8_t __a, const int __imm)
+ {
+  return __arm_vshllbq_n_s16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq (int32x4_t __a, const int __imm)
+ {
+  return __arm_vorrq_n_s32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq (int32x4_t __a, const int32_t __imm)
+ {
+  return __arm_vbicq_n_s32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vrmlaldavhq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvaq (uint64_t __a, uint32x4_t __b)
+ {
+  return __arm_vaddlvaq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhxq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vrmlsldavhxq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vrmlsldavhq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhxq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vrmlaldavhxq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vrmlaldavhq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvaq (int64_t __a, int32x4_t __b)
+ {
+  return __arm_vaddlvaq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq (uint32_t __a, int8x16_t __b, int8x16_t __c)
+ {
+  return __arm_vabavq_s8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq (uint32_t __a, int16x8_t __b, int16x8_t __c)
+ {
+  return __arm_vabavq_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq (uint32_t __a, int32x4_t __b, int32x4_t __c)
+ {
+  return __arm_vabavq_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq (uint32_t __a, uint8x16_t __b, uint8x16_t __c)
+ {
+  return __arm_vabavq_u8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq (uint32_t __a, uint16x8_t __b, uint16x8_t __c)
+ {
+  return __arm_vabavq_u16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq (uint32_t __a, uint32x4_t __b, uint32x4_t __c)
+ {
+  return __arm_vabavq_u32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_n (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vbicq_m_n_s16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_n (int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vbicq_m_n_s32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_n (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vbicq_m_n_u16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m_n (uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vbicq_m_n_u32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vqrshrnbq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+  return __arm_vqrshrnbq_n_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vqrshrnbq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+  return __arm_vqrshrnbq_n_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrunbq (uint8x16_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vqrshrunbq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrunbq (uint16x8_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vqrshrunbq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhaq (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+  return __arm_vrmlaldavhaq_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhaq (uint64_t __a, uint32x4_t __b, uint32x4_t __c)
+ {
+  return __arm_vrmlaldavhaq_u32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq (int8x16_t __a, uint32_t * __b, const int __imm)
+ {
+  return __arm_vshlcq_s8 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq (uint8x16_t __a, uint32_t * __b, const int __imm)
+ {
+  return __arm_vshlcq_u8 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq (int16x8_t __a, uint32_t * __b, const int __imm)
+ {
+  return __arm_vshlcq_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq (uint16x8_t __a, uint32_t * __b, const int __imm)
+ {
+  return __arm_vshlcq_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq (int32x4_t __a, uint32_t * __b, const int __imm)
+ {
+  return __arm_vshlcq_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq (uint32x4_t __a, uint32_t * __b, const int __imm)
+ {
+  return __arm_vshlcq_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vpselq_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vpselq_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_m_u8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq (uint8x16_t __a, uint8x16_t __b, uint8_t __c)
+ {
+  return __arm_vqrdmlashq_n_u8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq (uint8x16_t __a, uint8x16_t __b, uint8_t __c)
+ {
+  return __arm_vqrdmlahq_n_u8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq (uint8x16_t __a, uint8x16_t __b, uint8_t __c)
+ {
+  return __arm_vqdmlahq_n_u8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_m_u8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq (uint8x16_t __a, uint8x16_t __b, uint8_t __c)
+ {
+  return __arm_vmlasq_n_u8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq (uint8x16_t __a, uint8x16_t __b, uint8_t __c)
+ {
+  return __arm_vmlaq_n_u8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_p (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmladavq_p_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq (uint32_t __a, uint8x16_t __b, uint8x16_t __c)
+ {
+  return __arm_vmladavaq_u8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_p (uint8_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminvq_p_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_p (uint8_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxvq_p_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m (uint8x16_t __inactive, uint8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vdupq_m_n_u8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_n_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_m (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmphiq_m_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_m (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmphiq_m_n_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_n_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_m (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpcsq_m_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_m (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpcsq_m_n_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_m (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclzq_m_u8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_p (uint32_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddvaq_p_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq (uint8x16_t __a, uint8x16_t __b, const int __imm)
+ {
+  return __arm_vsriq_n_u8 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq (uint8x16_t __a, uint8x16_t __b, const int __imm)
+ {
+  return __arm_vsliq_n_u8 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_r (uint8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_r_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_n (uint8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_m_n_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_r (uint8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_r_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_n (uint8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrshlq_m_n_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminavq_p (uint8_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminavq_p_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminaq_m (uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminaq_m_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxavq_p (uint8_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxavq_p_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxaq_m (uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxaq_m_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpltq_m_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpltq_m_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpleq_m_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpleq_m_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgtq_m_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgtq_m_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgeq_m_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgeq_m_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_r (int8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_r_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_n (int8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_m_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_m_s8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_r (int8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_r_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_n (int8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrshlq_m_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqnegq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vqnegq_m_s8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqabsq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vqabsq_m_s8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vnegq_m_s8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_m_s8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavxq_p (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlsdavxq_p_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavq_p (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlsdavq_p_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavxq_p (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmladavxq_p_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_p (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmladavq_p_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_p (int8_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminvq_p_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_p (int8_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxvq_p_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m (int8x16_t __inactive, int8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vdupq_m_n_s8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclzq_m_s8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclsq_m_s8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_p (int32_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddvaq_p_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vabsq_m_s8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhxq (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqrdmlsdhxq_s8 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhq (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqrdmlsdhq_s8 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq (int8x16_t __a, int8x16_t __b, int8_t __c)
+ {
+  return __arm_vqrdmlashq_n_s8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq (int8x16_t __a, int8x16_t __b, int8_t __c)
+ {
+  return __arm_vqrdmlahq_n_s8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhxq (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqrdmladhxq_s8 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhq (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqrdmladhq_s8 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhxq (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqdmlsdhxq_s8 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhq (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqdmlsdhq_s8 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq (int8x16_t __a, int8x16_t __b, int8_t __c)
+ {
+  return __arm_vqdmlahq_n_s8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhxq (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqdmladhxq_s8 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhq (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vqdmladhq_s8 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaxq (int32_t __a, int8x16_t __b, int8x16_t __c)
+ {
+  return __arm_vmlsdavaxq_s8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaq (int32_t __a, int8x16_t __b, int8x16_t __c)
+ {
+  return __arm_vmlsdavaq_s8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq (int8x16_t __a, int8x16_t __b, int8_t __c)
+ {
+  return __arm_vmlasq_n_s8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq (int8x16_t __a, int8x16_t __b, int8_t __c)
+ {
+  return __arm_vmlaq_n_s8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaxq (int32_t __a, int8x16_t __b, int8x16_t __c)
+ {
+  return __arm_vmladavaxq_s8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq (int32_t __a, int8x16_t __b, int8x16_t __c)
+ {
+  return __arm_vmladavaq_s8 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq (int8x16_t __a, int8x16_t __b, const int __imm)
+ {
+  return __arm_vsriq_n_s8 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq (int8x16_t __a, int8x16_t __b, const int __imm)
+ {
+  return __arm_vsliq_n_s8 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vpselq_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vpselq_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_m_u16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+ {
+  return __arm_vqrdmlashq_n_u16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+ {
+  return __arm_vqrdmlahq_n_u16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+ {
+  return __arm_vqdmlahq_n_u16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_m_u16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+ {
+  return __arm_vmlasq_n_u16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq (uint16x8_t __a, uint16x8_t __b, uint16_t __c)
+ {
+  return __arm_vmlaq_n_u16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_p (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmladavq_p_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq (uint32_t __a, uint16x8_t __b, uint16x8_t __c)
+ {
+  return __arm_vmladavaq_u16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_p (uint16_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminvq_p_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_p (uint16_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxvq_p_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m (uint16x8_t __inactive, uint16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vdupq_m_n_u16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_n_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_m (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmphiq_m_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_m (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmphiq_m_n_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_n_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_m (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpcsq_m_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_m (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpcsq_m_n_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_m (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclzq_m_u16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_p (uint32_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddvaq_p_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq (uint16x8_t __a, uint16x8_t __b, const int __imm)
+ {
+  return __arm_vsriq_n_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq (uint16x8_t __a, uint16x8_t __b, const int __imm)
+ {
+  return __arm_vsliq_n_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_r (uint16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_r_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_n (uint16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_m_n_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_r (uint16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_r_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_n (uint16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrshlq_m_n_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminavq_p (uint16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminavq_p_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminaq_m (uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminaq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxavq_p (uint16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxavq_p_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxaq_m (uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxaq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpltq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpltq_m_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpleq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpleq_m_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgtq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgtq_m_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgeq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgeq_m_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_r (int16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_r_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_n (int16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_m_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_m_s16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_r (int16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_r_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_n (int16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrshlq_m_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqnegq_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vqnegq_m_s16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqabsq_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vqabsq_m_s16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vnegq_m_s16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_m_s16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavxq_p (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlsdavxq_p_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavq_p (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlsdavq_p_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavxq_p (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmladavxq_p_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_p (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmladavq_p_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_p (int16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminvq_p_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_p (int16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxvq_p_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m (int16x8_t __inactive, int16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vdupq_m_n_s16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclzq_m_s16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclsq_m_s16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_p (int32_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddvaq_p_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vabsq_m_s16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhxq (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqrdmlsdhxq_s16 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhq (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqrdmlsdhq_s16 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq (int16x8_t __a, int16x8_t __b, int16_t __c)
+ {
+  return __arm_vqrdmlashq_n_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq (int16x8_t __a, int16x8_t __b, int16_t __c)
+ {
+  return __arm_vqrdmlahq_n_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhxq (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqrdmladhxq_s16 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhq (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqrdmladhq_s16 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhxq (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqdmlsdhxq_s16 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhq (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqdmlsdhq_s16 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq (int16x8_t __a, int16x8_t __b, int16_t __c)
+ {
+  return __arm_vqdmlahq_n_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhxq (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqdmladhxq_s16 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhq (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vqdmladhq_s16 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaxq (int32_t __a, int16x8_t __b, int16x8_t __c)
+ {
+  return __arm_vmlsdavaxq_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaq (int32_t __a, int16x8_t __b, int16x8_t __c)
+ {
+  return __arm_vmlsdavaq_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq (int16x8_t __a, int16x8_t __b, int16_t __c)
+ {
+  return __arm_vmlasq_n_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq (int16x8_t __a, int16x8_t __b, int16_t __c)
+ {
+  return __arm_vmlaq_n_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaxq (int32_t __a, int16x8_t __b, int16x8_t __c)
+ {
+  return __arm_vmladavaxq_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq (int32_t __a, int16x8_t __b, int16x8_t __c)
+ {
+  return __arm_vmladavaq_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq (int16x8_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vsriq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq (int16x8_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vsliq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vpselq_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vpselq_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m (uint32x4_t __inactive, uint32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_m_u32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+ {
+  return __arm_vqrdmlashq_n_u32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+ {
+  return __arm_vqrdmlahq_n_u32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+ {
+  return __arm_vqdmlahq_n_u32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m (uint32x4_t __inactive, uint32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_m_u32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+ {
+  return __arm_vmlasq_n_u32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq (uint32x4_t __a, uint32x4_t __b, uint32_t __c)
+ {
+  return __arm_vmlaq_n_u32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_p (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmladavq_p_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq (uint32_t __a, uint32x4_t __b, uint32x4_t __c)
+ {
+  return __arm_vmladavaq_u32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_p (uint32_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminvq_p_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_p (uint32_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxvq_p_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m (uint32x4_t __inactive, uint32_t __a, mve_pred16_t __p)
+ {
+  return __arm_vdupq_m_n_u32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_n_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_m (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmphiq_m_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmphiq_m (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmphiq_m_n_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_n_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_m (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpcsq_m_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpcsq_m (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpcsq_m_n_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_m (uint32x4_t __inactive, uint32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclzq_m_u32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_p (uint32_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddvaq_p_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq (uint32x4_t __a, uint32x4_t __b, const int __imm)
+ {
+  return __arm_vsriq_n_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq (uint32x4_t __a, uint32x4_t __b, const int __imm)
+ {
+  return __arm_vsliq_n_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_r (uint32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_r_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_n (uint32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_m_n_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_r (uint32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_r_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_n (uint32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrshlq_m_n_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminavq_p (uint32_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminavq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminaq_m (uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminaq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxavq_p (uint32_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxavq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxaq_m (uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxaq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpltq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpltq_m_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpleq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpleq_m_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgtq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgtq_m_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgeq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgeq_m_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_r (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_r_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m_n (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_m_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_m_s32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_r (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_r_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m_n (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrshlq_m_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqnegq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vqnegq_m_s32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqabsq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vqabsq_m_s32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vnegq_m_s32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_m_s32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavxq_p (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlsdavxq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavq_p (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlsdavq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavxq_p (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmladavxq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavq_p (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmladavq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminvq_p (int32_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminvq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxvq_p (int32_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxvq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m (int32x4_t __inactive, int32_t __a, mve_pred16_t __p)
+ {
+  return __arm_vdupq_m_n_s32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclzq_m_s32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclsq_m_s32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddvaq_p (int32_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddvaq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vabsq_m_s32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhxq (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqrdmlsdhxq_s32 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhq (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqrdmlsdhq_s32 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq (int32x4_t __a, int32x4_t __b, int32_t __c)
+ {
+  return __arm_vqrdmlashq_n_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq (int32x4_t __a, int32x4_t __b, int32_t __c)
+ {
+  return __arm_vqrdmlahq_n_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhxq (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqrdmladhxq_s32 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhq (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqrdmladhq_s32 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhxq (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqdmlsdhxq_s32 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhq (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqdmlsdhq_s32 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq (int32x4_t __a, int32x4_t __b, int32_t __c)
+ {
+  return __arm_vqdmlahq_n_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhxq (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqdmladhxq_s32 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhq (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vqdmladhq_s32 (__inactive, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaxq (int32_t __a, int32x4_t __b, int32x4_t __c)
+ {
+  return __arm_vmlsdavaxq_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaq (int32_t __a, int32x4_t __b, int32x4_t __c)
+ {
+  return __arm_vmlsdavaq_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq (int32x4_t __a, int32x4_t __b, int32_t __c)
+ {
+  return __arm_vmlasq_n_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq (int32x4_t __a, int32x4_t __b, int32_t __c)
+ {
+  return __arm_vmlaq_n_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaxq (int32_t __a, int32x4_t __b, int32x4_t __c)
+ {
+  return __arm_vmladavaxq_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq (int32_t __a, int32x4_t __b, int32x4_t __c)
+ {
+  return __arm_vmladavaq_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq (int32x4_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vsriq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq (int32x4_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vsliq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq (uint64x2_t __a, uint64x2_t __b, mve_pred16_t __p)
+ {
+  return __arm_vpselq_u64 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq (int64x2_t __a, int64x2_t __b, mve_pred16_t __p)
+ {
+  return __arm_vpselq_s64 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhaxq (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+  return __arm_vrmlaldavhaxq_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhaq (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+  return __arm_vrmlsldavhaq_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhaxq (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+  return __arm_vrmlsldavhaxq_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvaq_p (int64_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddlvaq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev16q_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev16q_m_s8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhq_p (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmlaldavhq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhxq_p (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmlaldavhxq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhq_p (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmlsldavhq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhxq_p (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmlsldavhxq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddlvaq_p (uint64_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddlvaq_p_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev16q_m (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev16q_m_u8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhq_p (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmlaldavhq_p_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m (int16x8_t __inactive, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_m_n_s16 (__inactive, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_n (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vorrq_m_n_s16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vqrshrntq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vqshrnbq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vqshrntq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vrshrnbq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vrshrntq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vshrnbq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq (int8x16_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vshrntq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq (int64_t __a, int16x8_t __b, int16x8_t __c)
+ {
+  return __arm_vmlaldavaq_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaxq (int64_t __a, int16x8_t __b, int16x8_t __c)
+ {
+  return __arm_vmlaldavaxq_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaq (int64_t __a, int16x8_t __b, int16x8_t __c)
+ {
+  return __arm_vmlsldavaq_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaxq (int64_t __a, int16x8_t __b, int16x8_t __c)
+ {
+  return __arm_vmlsldavaxq_s16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq_p (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavq_p_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavxq_p (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavxq_p_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavq_p (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlsldavq_p_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavxq_p (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlsldavxq_p_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_m (int16x8_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovlbq_m_s8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_m (int16x8_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovltq_m_s8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq_m (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmovnbq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq_m (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmovntq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq_m (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqmovnbq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq_m (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqmovntq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev32q_m_s8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m (uint16x8_t __inactive, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_m_n_u16 (__inactive, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_n (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vorrq_m_n_u16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshruntq (uint8x16_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vqrshruntq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrunbq (uint8x16_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vqshrunbq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshruntq (uint8x16_t __a, int16x8_t __b, const int __imm)
+ {
+  return __arm_vqshruntq_n_s16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovunbq_m (uint8x16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqmovunbq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovuntq_m (uint8x16_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqmovuntq_m_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+  return __arm_vqrshrntq_n_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+  return __arm_vqshrnbq_n_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+  return __arm_vqshrntq_n_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+  return __arm_vrshrnbq_n_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+  return __arm_vrshrntq_n_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+  return __arm_vshrnbq_n_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq (uint8x16_t __a, uint16x8_t __b, const int __imm)
+ {
+  return __arm_vshrntq_n_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq (uint64_t __a, uint16x8_t __b, uint16x8_t __c)
+ {
+  return __arm_vmlaldavaq_u16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq_p (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavq_p_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_m (uint16x8_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovlbq_m_u8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_m (uint16x8_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovltq_m_u8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq_m (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmovnbq_m_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq_m (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmovntq_m_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq_m (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqmovnbq_m_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq_m (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqmovntq_m_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_m (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev32q_m_u8 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m (int32x4_t __inactive, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_m_n_s32 (__inactive, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_n (int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vorrq_m_n_s32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vqrshrntq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vqshrnbq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vqshrntq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vrshrnbq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vrshrntq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vshrnbq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq (int16x8_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vshrntq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+  return __arm_vmlaldavaq_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaxq (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+  return __arm_vmlaldavaxq_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaq (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+  return __arm_vmlsldavaq_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaxq (int64_t __a, int32x4_t __b, int32x4_t __c)
+ {
+  return __arm_vmlsldavaxq_s32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq_p (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavxq_p (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavxq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavq_p (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlsldavq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavxq_p (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlsldavxq_p_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_m (int32x4_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovlbq_m_s16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_m (int32x4_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovltq_m_s16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq_m (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmovnbq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq_m (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmovntq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq_m (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqmovnbq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq_m (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqmovntq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev32q_m_s16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_m (uint32x4_t __inactive, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_m_n_u32 (__inactive, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m_n (uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vorrq_m_n_u32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshruntq (uint16x8_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vqrshruntq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrunbq (uint16x8_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vqshrunbq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshruntq (uint16x8_t __a, int32x4_t __b, const int __imm)
+ {
+  return __arm_vqshruntq_n_s32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovunbq_m (uint16x8_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqmovunbq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovuntq_m (uint16x8_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqmovuntq_m_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+  return __arm_vqrshrntq_n_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+  return __arm_vqshrnbq_n_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+  return __arm_vqshrntq_n_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+  return __arm_vrshrnbq_n_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+  return __arm_vrshrntq_n_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+  return __arm_vshrnbq_n_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq (uint16x8_t __a, uint32x4_t __b, const int __imm)
+ {
+  return __arm_vshrntq_n_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq (uint64_t __a, uint32x4_t __b, uint32x4_t __c)
+ {
+  return __arm_vmlaldavaq_u32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavq_p (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavq_p_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_m (uint32x4_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovlbq_m_u16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_m (uint32x4_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovltq_m_u16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovnbq_m (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmovnbq_m_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovntq_m (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmovntq_m_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovnbq_m (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqmovnbq_m_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqmovntq_m (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqmovntq_m_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_m (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev32q_m_u16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_m (int8x16_t __a, int8x16_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vsriq_m_n_s8 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshluq_m (uint8x16_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshluq_m_n_s8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_p (uint32_t __a, int8x16_t __b, int8x16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vabavq_p_s8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_m (uint8x16_t __a, uint8x16_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vsriq_m_n_u8 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m (uint8x16_t __inactive, uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_p (uint32_t __a, uint8x16_t __b, uint8x16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vabavq_p_u8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_m (int16x8_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vsriq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshluq_m (uint16x8_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshluq_m_n_s16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_p (uint32_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vabavq_p_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_m (uint16x8_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vsriq_m_n_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m (uint16x8_t __inactive, uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_p (uint32_t __a, uint16x8_t __b, uint16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vabavq_p_u16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_m (int32x4_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vsriq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshluq_m (uint32x4_t __inactive, int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshluq_m_n_s32 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_p (uint32_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vabavq_p_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsriq_m (uint32x4_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vsriq_m_n_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m (uint32x4_t __inactive, uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabavq_p (uint32_t __a, uint32x4_t __b, uint32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vabavq_p_u32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_n_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_n_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_n_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_n_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_n_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_n_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m (int8x16_t __inactive, int8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_m_n_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_m_n_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m (int16x8_t __inactive, int16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_m_n_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m (uint8x16_t __inactive, uint8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_m_n_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m (uint32x4_t __inactive, uint32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_m_n_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m (uint16x8_t __inactive, uint16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_m_n_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_m_n_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_m_n_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_m_n_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_m_n_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_m_n_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_m_n_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhcaddq_rot270_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhcaddq_rot270_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhcaddq_rot270_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhcaddq_rot90_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhcaddq_rot90_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhcaddq_rot90_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_m_n_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_m_n_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_m_n_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_m_n_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_m_n_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_m_n_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_p (int32_t __a, int8x16_t __b, int8x16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmladavaq_p_s8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_p (int32_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmladavaq_p_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_p (int32_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmladavaq_p_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_p (uint32_t __a, uint8x16_t __b, uint8x16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmladavaq_p_u8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_p (uint32_t __a, uint32x4_t __b, uint32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmladavaq_p_u32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaq_p (uint32_t __a, uint16x8_t __b, uint16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmladavaq_p_u16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaxq_p (int32_t __a, int8x16_t __b, int8x16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmladavaxq_p_s8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaxq_p (int32_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmladavaxq_p_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmladavaxq_p (int32_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmladavaxq_p_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_m (int8x16_t __a, int8x16_t __b, int8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaq_m_n_s8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_m (int32x4_t __a, int32x4_t __b, int32_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaq_m_n_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_m (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaq_m_n_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_m (uint8x16_t __a, uint8x16_t __b, uint8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaq_m_n_u8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_m (uint32x4_t __a, uint32x4_t __b, uint32_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaq_m_n_u32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaq_m (uint16x8_t __a, uint16x8_t __b, uint16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaq_m_n_u16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_m (int8x16_t __a, int8x16_t __b, int8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlasq_m_n_s8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_m (int32x4_t __a, int32x4_t __b, int32_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlasq_m_n_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_m (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlasq_m_n_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_m (uint8x16_t __a, uint8x16_t __b, uint8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlasq_m_n_u8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_m (uint32x4_t __a, uint32x4_t __b, uint32_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlasq_m_n_u32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlasq_m (uint16x8_t __a, uint16x8_t __b, uint16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlasq_m_n_u16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaq_p (int32_t __a, int8x16_t __b, int8x16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlsdavaq_p_s8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaq_p (int32_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlsdavaq_p_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaq_p (int32_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlsdavaq_p_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaxq_p (int32_t __a, int8x16_t __b, int8x16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlsdavaxq_p_s8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaxq_p (int32_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlsdavaxq_p_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsdavaxq_p (int32_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlsdavaxq_p_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulhq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulhq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulhq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulhq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulhq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulhq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_m (int16x8_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_int_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_m (int64x2_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_int_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_m (int32x4_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_int_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_m (uint16x8_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_int_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_m (uint64x2_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_int_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_m (uint32x4_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_int_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_m (int16x8_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_int_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_m (int64x2_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_int_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_m (int32x4_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_int_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_m (uint16x8_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_int_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_m (uint64x2_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_int_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_m (uint32x4_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_int_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_n_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_n_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_n_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_n_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_n_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_n_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqaddq_m_n_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqaddq_m_n_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqaddq_m_n_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqaddq_m_n_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqaddq_m_n_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqaddq_m_n_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqaddq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqaddq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqaddq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqaddq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqaddq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqaddq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqaddq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmladhq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmladhq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmladhq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhxq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmladhxq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhxq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmladhxq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmladhxq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmladhxq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq_m (int8x16_t __a, int8x16_t __b, int8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vqdmlahq_m_n_s8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq_m (int32x4_t __a, int32x4_t __b, int32_t __c, mve_pred16_t __p)
+ {
+  return __arm_vqdmlahq_m_n_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlahq_m (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vqdmlahq_m_n_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmlsdhq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmlsdhq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmlsdhq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhxq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmlsdhxq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhxq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmlsdhxq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmlsdhxq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmlsdhxq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_m (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmulhq_m_n_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmulhq_m_n_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_m (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmulhq_m_n_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmulhq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmulhq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulhq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmulhq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmladhq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmladhq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmladhq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhxq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmladhxq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhxq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmladhxq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmladhxq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmladhxq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq_m (int8x16_t __a, int8x16_t __b, int8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vqrdmlahq_m_n_s8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq_m (int32x4_t __a, int32x4_t __b, int32_t __c, mve_pred16_t __p)
+ {
+  return __arm_vqrdmlahq_m_n_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlahq_m (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vqrdmlahq_m_n_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq_m (int8x16_t __a, int8x16_t __b, int8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vqrdmlashq_m_n_s8 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq_m (int32x4_t __a, int32x4_t __b, int32_t __c, mve_pred16_t __p)
+ {
+  return __arm_vqrdmlashq_m_n_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlashq_m (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vqrdmlashq_m_n_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmlsdhq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmlsdhq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmlsdhq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhxq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmlsdhxq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhxq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmlsdhxq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmlsdhxq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmlsdhxq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_m (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmulhq_m_n_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmulhq_m_n_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_m (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmulhq_m_n_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmulhq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmulhq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrdmulhq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrdmulhq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrshlq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrshlq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrshlq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m (uint8x16_t __inactive, uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrshlq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m (uint32x4_t __inactive, uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrshlq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshlq_m (uint16x8_t __inactive, uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqrshlq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_n (int8x16_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_n_s8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_n (int32x4_t __inactive, int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_n_s32 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_n (int16x8_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_n_s16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_n (uint8x16_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_n_u8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_n (uint32x4_t __inactive, uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_n_u32 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m_n (uint16x8_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_n_u16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m (uint8x16_t __inactive, uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m (uint32x4_t __inactive, uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshlq_m (uint16x8_t __inactive, uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqshlq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqsubq_m_n_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqsubq_m_n_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqsubq_m_n_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqsubq_m_n_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqsubq_m_n_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqsubq_m_n_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqsubq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqsubq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqsubq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqsubq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqsubq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqsubq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqsubq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrhaddq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrhaddq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrhaddq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrhaddq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrhaddq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrhaddq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmulhq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmulhq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmulhq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmulhq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmulhq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmulhq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_m_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m (uint8x16_t __inactive, uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_m_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m (uint32x4_t __inactive, uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_m_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_m (uint16x8_t __inactive, uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_m_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_m (int8x16_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrq_m_n_s8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_m (int32x4_t __inactive, int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrq_m_n_s32 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_m (int16x8_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrq_m_n_s16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_m (uint8x16_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrq_m_n_u8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_m (uint32x4_t __inactive, uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrq_m_n_u32 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_m (uint16x8_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrq_m_n_u16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_n (int8x16_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_n_s8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_n (int32x4_t __inactive, int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_n_s32 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_n (int16x8_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_n_s16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_n (uint8x16_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_n_u8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_n (uint32x4_t __inactive, uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_n_u32 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_m_n (uint16x8_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlq_m_n_u16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_m (int8x16_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrq_m_n_s8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_m (int32x4_t __inactive, int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrq_m_n_s32 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_m (int16x8_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrq_m_n_s16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_m (uint8x16_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrq_m_n_u8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_m (uint32x4_t __inactive, uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrq_m_n_u32 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_m (uint16x8_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrq_m_n_u16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_m (int8x16_t __a, int8x16_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vsliq_m_n_s8 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_m (int32x4_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vsliq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_m (int16x8_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vsliq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_m (uint8x16_t __a, uint8x16_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vsliq_m_n_u8 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_m (uint32x4_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vsliq_m_n_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsliq_m (uint16x8_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vsliq_m_n_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_n_s8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_n_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_n_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_n_u8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_n_u32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_n_u16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq_p (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavaq_p_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq_p (int64_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavaq_p_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq_p (uint64_t __a, uint32x4_t __b, uint32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavaq_p_u32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaq_p (uint64_t __a, uint16x8_t __b, uint16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavaq_p_u16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaxq_p (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavaxq_p_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaxq_p (int64_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavaxq_p_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaxq_p (uint64_t __a, uint32x4_t __b, uint32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavaxq_p_u32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlaldavaxq_p (uint64_t __a, uint16x8_t __b, uint16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlaldavaxq_p_u16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaq_p (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlsldavaq_p_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaq_p (int64_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlsldavaq_p_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaxq_p (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlsldavaxq_p_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmlsldavaxq_p (int64_t __a, int16x8_t __b, int16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vmlsldavaxq_p_s16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_poly_m (uint16x8_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_poly_m_p8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_poly_m (uint32x4_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_poly_m_p16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_poly_m (uint16x8_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_poly_m_p8 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_poly_m (uint32x4_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_poly_m_p16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq_m (int64x2_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmullbq_m_n_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq_m (int32x4_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmullbq_m_n_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq_m (int64x2_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmullbq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmullbq_m (int32x4_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmullbq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq_m (int64x2_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmulltq_m_n_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq_m (int32x4_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmulltq_m_n_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq_m (int64x2_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmulltq_m_s32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqdmulltq_m (int32x4_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vqdmulltq_m_s16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq_m (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqrshrnbq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq_m (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqrshrnbq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq_m (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqrshrnbq_m_n_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrnbq_m (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqrshrnbq_m_n_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq_m (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqrshrntq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq_m (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqrshrntq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq_m (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqrshrntq_m_n_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrntq_m (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqrshrntq_m_n_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrunbq_m (uint16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqrshrunbq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshrunbq_m (uint8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqrshrunbq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshruntq_m (uint16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqrshruntq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqrshruntq_m (uint8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqrshruntq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq_m (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshrnbq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq_m (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshrnbq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq_m (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshrnbq_m_n_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrnbq_m (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshrnbq_m_n_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq_m (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshrntq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq_m (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshrntq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq_m (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshrntq_m_n_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrntq_m (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshrntq_m_n_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrunbq_m (uint16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshrunbq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshrunbq_m (uint8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshrunbq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshruntq_m (uint16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshruntq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vqshruntq_m (uint8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vqshruntq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhaq_p (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vrmlaldavhaq_p_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhaq_p (uint64_t __a, uint32x4_t __b, uint32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vrmlaldavhaq_p_u32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlaldavhaxq_p (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vrmlaldavhaxq_p_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhaq_p (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vrmlsldavhaq_p_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmlsldavhaxq_p (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vrmlsldavhaxq_p_s32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq_m (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrnbq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq_m (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrnbq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq_m (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrnbq_m_n_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrnbq_m (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrnbq_m_n_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq_m (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrntq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq_m (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrntq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq_m (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrntq_m_n_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrntq_m (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrntq_m_n_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_m (int16x8_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshllbq_m_n_s8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_m (int32x4_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshllbq_m_n_s16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_m (uint16x8_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshllbq_m_n_u8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_m (uint32x4_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshllbq_m_n_u16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_m (int16x8_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlltq_m_n_s8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_m (int32x4_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlltq_m_n_s16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_m (uint16x8_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlltq_m_n_u8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_m (uint32x4_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlltq_m_n_u16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq_m (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrnbq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq_m (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrnbq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq_m (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrnbq_m_n_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrnbq_m (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrnbq_m_n_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq_m (int16x8_t __a, int32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrntq_m_n_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq_m (int8x16_t __a, int16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrntq_m_n_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq_m (uint16x8_t __a, uint32x4_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrntq_m_n_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrntq_m (uint8x16_t __a, uint16x8_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrntq_m_n_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset (int8_t * __base, uint8x16_t __offset, int8x16_t __value)
+ {
+  __arm_vstrbq_scatter_offset_s8 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset (int8_t * __base, uint32x4_t __offset, int32x4_t __value)
+ {
+  __arm_vstrbq_scatter_offset_s32 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset (int8_t * __base, uint16x8_t __offset, int16x8_t __value)
+ {
+  __arm_vstrbq_scatter_offset_s16 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset (uint8_t * __base, uint8x16_t __offset, uint8x16_t __value)
+ {
+  __arm_vstrbq_scatter_offset_u8 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset (uint8_t * __base, uint32x4_t __offset, uint32x4_t __value)
+ {
+  __arm_vstrbq_scatter_offset_u32 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset (uint8_t * __base, uint16x8_t __offset, uint16x8_t __value)
+ {
+  __arm_vstrbq_scatter_offset_u16 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq (int8_t * __addr, int8x16_t __value)
+ {
+  __arm_vstrbq_s8 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq (int8_t * __addr, int32x4_t __value)
+ {
+  __arm_vstrbq_s32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq (int8_t * __addr, int16x8_t __value)
+ {
+  __arm_vstrbq_s16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq (uint8_t * __addr, uint8x16_t __value)
+ {
+  __arm_vstrbq_u8 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq (uint8_t * __addr, uint32x4_t __value)
+ {
+  __arm_vstrbq_u32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq (uint8_t * __addr, uint16x8_t __value)
+ {
+  __arm_vstrbq_u16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base (uint32x4_t __addr, const int __offset, int32x4_t __value)
+ {
+  __arm_vstrwq_scatter_base_s32 (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base (uint32x4_t __addr, const int __offset, uint32x4_t __value)
+ {
+  __arm_vstrwq_scatter_base_u32 (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset (uint8_t const * __base, uint8x16_t __offset)
+ {
+  return __arm_vldrbq_gather_offset_u8 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset (int8_t const * __base, uint8x16_t __offset)
+ {
+  return __arm_vldrbq_gather_offset_s8 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset (uint8_t const * __base, uint16x8_t __offset)
+ {
+  return __arm_vldrbq_gather_offset_u16 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset (int8_t const * __base, uint16x8_t __offset)
+ {
+  return __arm_vldrbq_gather_offset_s16 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset (uint8_t const * __base, uint32x4_t __offset)
+ {
+  return __arm_vldrbq_gather_offset_u32 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset (int8_t const * __base, uint32x4_t __offset)
+ {
+  return __arm_vldrbq_gather_offset_s32 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_p (int8_t * __addr, int8x16_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrbq_p_s8 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_p (int8_t * __addr, int32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrbq_p_s32 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_p (int8_t * __addr, int16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrbq_p_s16 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_p (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrbq_p_u8 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_p (uint8_t * __addr, uint32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrbq_p_u32 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_p (uint8_t * __addr, uint16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrbq_p_u16 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_p (int8_t * __base, uint8x16_t __offset, int8x16_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrbq_scatter_offset_p_s8 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_p (int8_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrbq_scatter_offset_p_s32 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_p (int8_t * __base, uint16x8_t __offset, int16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrbq_scatter_offset_p_s16 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_p (uint8_t * __base, uint8x16_t __offset, uint8x16_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrbq_scatter_offset_p_u8 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_p (uint8_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrbq_scatter_offset_p_u32 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrbq_scatter_offset_p (uint8_t * __base, uint16x8_t __offset, uint16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrbq_scatter_offset_p_u16 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_p (uint32x4_t __addr, const int __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_scatter_base_p_s32 (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_p (uint32x4_t __addr, const int __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_scatter_base_p_u32 (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_z (int8_t const * __base, uint8x16_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrbq_gather_offset_z_s8 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_z (int8_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrbq_gather_offset_z_s32 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_z (int8_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrbq_gather_offset_z_s16 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_z (uint8_t const * __base, uint8x16_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrbq_gather_offset_z_u8 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_z (uint8_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrbq_gather_offset_z_u32 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrbq_gather_offset_z (uint8_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrbq_gather_offset_z_u16 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q (int8_t const * __base)
+ {
+  return __arm_vld1q_s8 (__base);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q (int32_t const * __base)
+ {
+  return __arm_vld1q_s32 (__base);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q (int16_t const * __base)
+ {
+  return __arm_vld1q_s16 (__base);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q (uint8_t const * __base)
+ {
+  return __arm_vld1q_u8 (__base);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q (uint32_t const * __base)
+ {
+  return __arm_vld1q_u32 (__base);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q (uint16_t const * __base)
+ {
+  return __arm_vld1q_u16 (__base);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset (int16_t const * __base, uint32x4_t __offset)
+ {
+  return __arm_vldrhq_gather_offset_s32 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset (int16_t const * __base, uint16x8_t __offset)
+ {
+  return __arm_vldrhq_gather_offset_s16 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset (uint16_t const * __base, uint32x4_t __offset)
+ {
+  return __arm_vldrhq_gather_offset_u32 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset (uint16_t const * __base, uint16x8_t __offset)
+ {
+  return __arm_vldrhq_gather_offset_u16 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_z (int16_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrhq_gather_offset_z_s32 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_z (int16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrhq_gather_offset_z_s16 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_z (uint16_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrhq_gather_offset_z_u32 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_z (uint16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrhq_gather_offset_z_u16 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset (int16_t const * __base, uint32x4_t __offset)
+ {
+  return __arm_vldrhq_gather_shifted_offset_s32 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset (int16_t const * __base, uint16x8_t __offset)
+ {
+  return __arm_vldrhq_gather_shifted_offset_s16 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset (uint16_t const * __base, uint32x4_t __offset)
+ {
+  return __arm_vldrhq_gather_shifted_offset_u32 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset (uint16_t const * __base, uint16x8_t __offset)
+ {
+  return __arm_vldrhq_gather_shifted_offset_u16 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_z (int16_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrhq_gather_shifted_offset_z_s32 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_z (int16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrhq_gather_shifted_offset_z_s16 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_z (uint16_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrhq_gather_shifted_offset_z_u32 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_z (uint16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrhq_gather_shifted_offset_z_u16 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_offset (int64_t const * __base, uint64x2_t __offset)
+ {
+  return __arm_vldrdq_gather_offset_s64 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_offset (uint64_t const * __base, uint64x2_t __offset)
+ {
+  return __arm_vldrdq_gather_offset_u64 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_offset_z (int64_t const * __base, uint64x2_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrdq_gather_offset_z_s64 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_offset_z (uint64_t const * __base, uint64x2_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrdq_gather_offset_z_u64 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_shifted_offset (int64_t const * __base, uint64x2_t __offset)
+ {
+  return __arm_vldrdq_gather_shifted_offset_s64 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_shifted_offset (uint64_t const * __base, uint64x2_t __offset)
+ {
+  return __arm_vldrdq_gather_shifted_offset_u64 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_shifted_offset_z (int64_t const * __base, uint64x2_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrdq_gather_shifted_offset_z_s64 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrdq_gather_shifted_offset_z (uint64_t const * __base, uint64x2_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrdq_gather_shifted_offset_z_u64 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_offset (int32_t const * __base, uint32x4_t __offset)
+ {
+  return __arm_vldrwq_gather_offset_s32 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_offset (uint32_t const * __base, uint32x4_t __offset)
+ {
+  return __arm_vldrwq_gather_offset_u32 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_offset_z (int32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrwq_gather_offset_z_s32 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_offset_z (uint32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrwq_gather_offset_z_u32 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_shifted_offset (int32_t const * __base, uint32x4_t __offset)
+ {
+  return __arm_vldrwq_gather_shifted_offset_s32 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_shifted_offset (uint32_t const * __base, uint32x4_t __offset)
+ {
+  return __arm_vldrwq_gather_shifted_offset_u32 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_shifted_offset_z (int32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrwq_gather_shifted_offset_z_s32 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_shifted_offset_z (uint32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrwq_gather_shifted_offset_z_u32 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q (int8_t * __addr, int8x16_t __value)
+ {
+  __arm_vst1q_s8 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q (int32_t * __addr, int32x4_t __value)
+ {
+  __arm_vst1q_s32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q (int16_t * __addr, int16x8_t __value)
+ {
+  __arm_vst1q_s16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q (uint8_t * __addr, uint8x16_t __value)
+ {
+  __arm_vst1q_u8 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q (uint32_t * __addr, uint32x4_t __value)
+ {
+  __arm_vst1q_u32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q (uint16_t * __addr, uint16x8_t __value)
+ {
+  __arm_vst1q_u16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset (int16_t * __base, uint32x4_t __offset, int32x4_t __value)
+ {
+  __arm_vstrhq_scatter_offset_s32 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset (int16_t * __base, uint16x8_t __offset, int16x8_t __value)
+ {
+  __arm_vstrhq_scatter_offset_s16 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value)
+ {
+  __arm_vstrhq_scatter_offset_u32 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value)
+ {
+  __arm_vstrhq_scatter_offset_u16 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_p (int16_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_scatter_offset_p_s32 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_p (int16_t * __base, uint16x8_t __offset, int16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_scatter_offset_p_s16 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_p (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_scatter_offset_p_u32 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_p (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_scatter_offset_p_u16 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset (int16_t * __base, uint32x4_t __offset, int32x4_t __value)
+ {
+  __arm_vstrhq_scatter_shifted_offset_s32 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset (int16_t * __base, uint16x8_t __offset, int16x8_t __value)
+ {
+  __arm_vstrhq_scatter_shifted_offset_s16 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value)
+ {
+  __arm_vstrhq_scatter_shifted_offset_u32 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value)
+ {
+  __arm_vstrhq_scatter_shifted_offset_u16 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_p (int16_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_scatter_shifted_offset_p_s32 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_p (int16_t * __base, uint16x8_t __offset, int16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_scatter_shifted_offset_p_s16 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_p (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_scatter_shifted_offset_p_u32 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_p (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_scatter_shifted_offset_p_u16 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq (int16_t * __addr, int32x4_t __value)
+ {
+  __arm_vstrhq_s32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq (int16_t * __addr, int16x8_t __value)
+ {
+  __arm_vstrhq_s16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq (uint16_t * __addr, uint32x4_t __value)
+ {
+  __arm_vstrhq_u32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq (uint16_t * __addr, uint16x8_t __value)
+ {
+  __arm_vstrhq_u16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_p (int16_t * __addr, int32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_p_s32 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_p (int16_t * __addr, int16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_p_s16 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_p (uint16_t * __addr, uint32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_p_u32 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_p (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_p_u16 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq (int32_t * __addr, int32x4_t __value)
+ {
+  __arm_vstrwq_s32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq (uint32_t * __addr, uint32x4_t __value)
+ {
+  __arm_vstrwq_u32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_p (int32_t * __addr, int32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_p_s32 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_p (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_p_u32 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_p (uint64x2_t __addr, const int __offset, int64x2_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrdq_scatter_base_p_s64 (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_p (uint64x2_t __addr, const int __offset, uint64x2_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrdq_scatter_base_p_u64 (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base (uint64x2_t __addr, const int __offset, int64x2_t __value)
+ {
+  __arm_vstrdq_scatter_base_s64 (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base (uint64x2_t __addr, const int __offset, uint64x2_t __value)
+ {
+  __arm_vstrdq_scatter_base_u64 (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_offset_p (int64_t * __base, uint64x2_t __offset, int64x2_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrdq_scatter_offset_p_s64 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_offset_p (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrdq_scatter_offset_p_u64 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_offset (int64_t * __base, uint64x2_t __offset, int64x2_t __value)
+ {
+  __arm_vstrdq_scatter_offset_s64 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_offset (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value)
+ {
+  __arm_vstrdq_scatter_offset_u64 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_shifted_offset_p (int64_t * __base, uint64x2_t __offset, int64x2_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrdq_scatter_shifted_offset_p_s64 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_shifted_offset_p (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrdq_scatter_shifted_offset_p_u64 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_shifted_offset (int64_t * __base, uint64x2_t __offset, int64x2_t __value)
+ {
+  __arm_vstrdq_scatter_shifted_offset_s64 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_shifted_offset (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value)
+ {
+  __arm_vstrdq_scatter_shifted_offset_u64 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_offset_p (int32_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_scatter_offset_p_s32 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_offset_p (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_scatter_offset_p_u32 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_offset (int32_t * __base, uint32x4_t __offset, int32x4_t __value)
+ {
+  __arm_vstrwq_scatter_offset_s32 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_offset (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value)
+ {
+  __arm_vstrwq_scatter_offset_u32 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_shifted_offset_p (int32_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_scatter_shifted_offset_p_s32 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_shifted_offset_p (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_scatter_shifted_offset_p_u32 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_shifted_offset (int32_t * __base, uint32x4_t __offset, int32x4_t __value)
+ {
+  __arm_vstrwq_scatter_shifted_offset_s32 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_shifted_offset (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value)
+ {
+  __arm_vstrwq_scatter_shifted_offset_u32 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (int8x16_t __a, int8x16_t __b)
+ {
+  return __arm_vaddq_s8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (int16x8_t __a, int16x8_t __b)
+ {
+  return __arm_vaddq_s16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (int32x4_t __a, int32x4_t __b)
+ {
+  return __arm_vaddq_s32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (uint8x16_t __a, uint8x16_t __b)
+ {
+  return __arm_vaddq_u8 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (uint16x8_t __a, uint16x8_t __b)
+ {
+  return __arm_vaddq_u16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (uint32x4_t __a, uint32x4_t __b)
+ {
+  return __arm_vaddq_u32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_m (uint8x16_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vddupq_m_n_u8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_m (uint32x4_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vddupq_m_n_u32 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_m (uint16x8_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vddupq_m_n_u16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_m (uint8x16_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vddupq_m_wb_u8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_m (uint16x8_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vddupq_m_wb_u16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_m (uint32x4_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vddupq_m_wb_u32 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_u8 (uint32_t __a, const int __imm)
+ {
+  return __arm_vddupq_n_u8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_u32 (uint32_t __a, const int __imm)
+ {
+  return __arm_vddupq_n_u32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_u16 (uint32_t __a, const int __imm)
+ {
+  return __arm_vddupq_n_u16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_m (uint8x16_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vdwdupq_m_n_u8 (__inactive, __a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_m (uint32x4_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vdwdupq_m_n_u32 (__inactive, __a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_m (uint16x8_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vdwdupq_m_n_u16 (__inactive, __a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_m (uint8x16_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vdwdupq_m_wb_u8 (__inactive, __a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_m (uint32x4_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vdwdupq_m_wb_u32 (__inactive, __a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_m (uint16x8_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vdwdupq_m_wb_u16 (__inactive, __a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_u8 (uint32_t __a, uint32_t __b, const int __imm)
+ {
+  return __arm_vdwdupq_n_u8 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_u32 (uint32_t __a, uint32_t __b, const int __imm)
+ {
+  return __arm_vdwdupq_n_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_u16 (uint32_t __a, uint32_t __b, const int __imm)
+ {
+  return __arm_vdwdupq_n_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_u8 (uint32_t * __a, uint32_t __b, const int __imm)
+ {
+  return __arm_vdwdupq_wb_u8 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_u32 (uint32_t * __a, uint32_t __b, const int __imm)
+ {
+  return __arm_vdwdupq_wb_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_u16 (uint32_t * __a, uint32_t __b, const int __imm)
+ {
+  return __arm_vdwdupq_wb_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_m (uint8x16_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vidupq_m_n_u8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_m (uint32x4_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vidupq_m_n_u32 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_m (uint16x8_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vidupq_m_n_u16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_u8 (uint32_t __a, const int __imm)
+ {
+  return __arm_vidupq_n_u8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_m (uint8x16_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vidupq_m_wb_u8 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_m (uint16x8_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vidupq_m_wb_u16 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_m (uint32x4_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vidupq_m_wb_u32 (__inactive, __a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_u32 (uint32_t __a, const int __imm)
+ {
+  return __arm_vidupq_n_u32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_u16 (uint32_t __a, const int __imm)
+ {
+  return __arm_vidupq_n_u16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_u8 (uint32_t * __a, const int __imm)
+ {
+  return __arm_vidupq_wb_u8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_u16 (uint32_t * __a, const int __imm)
+ {
+  return __arm_vidupq_wb_u16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_u32 (uint32_t * __a, const int __imm)
+ {
+  return __arm_vidupq_wb_u32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_u8 (uint32_t * __a, const int __imm)
+ {
+  return __arm_vddupq_wb_u8 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_u16 (uint32_t * __a, const int __imm)
+ {
+  return __arm_vddupq_wb_u16 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_u32 (uint32_t * __a, const int __imm)
+ {
+  return __arm_vddupq_wb_u32 (__a, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_m (uint8x16_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_viwdupq_m_n_u8 (__inactive, __a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_m (uint32x4_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_viwdupq_m_n_u32 (__inactive, __a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_m (uint16x8_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_viwdupq_m_n_u16 (__inactive, __a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_m (uint8x16_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_viwdupq_m_wb_u8 (__inactive, __a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_m (uint32x4_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_viwdupq_m_wb_u32 (__inactive, __a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_m (uint16x8_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_viwdupq_m_wb_u16 (__inactive, __a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_u8 (uint32_t __a, uint32_t __b, const int __imm)
+ {
+  return __arm_viwdupq_n_u8 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_u32 (uint32_t __a, uint32_t __b, const int __imm)
+ {
+  return __arm_viwdupq_n_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_u16 (uint32_t __a, uint32_t __b, const int __imm)
+ {
+  return __arm_viwdupq_n_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_u8 (uint32_t * __a, uint32_t __b, const int __imm)
+ {
+  return __arm_viwdupq_wb_u8 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_u32 (uint32_t * __a, uint32_t __b, const int __imm)
+ {
+  return __arm_viwdupq_wb_u32 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_u16 (uint32_t * __a, uint32_t __b, const int __imm)
+ {
+  return __arm_viwdupq_wb_u16 (__a, __b, __imm);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_wb (uint64x2_t * __addr, const int __offset, int64x2_t __value)
+ {
+  __arm_vstrdq_scatter_base_wb_s64 (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_wb (uint64x2_t * __addr, const int __offset, uint64x2_t __value)
+ {
+  __arm_vstrdq_scatter_base_wb_u64 (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_wb_p (uint64x2_t * __addr, const int __offset, int64x2_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrdq_scatter_base_wb_p_s64 (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrdq_scatter_base_wb_p (uint64x2_t * __addr, const int __offset, uint64x2_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrdq_scatter_base_wb_p_u64 (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_wb_p (uint32x4_t * __addr, const int __offset, int32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_scatter_base_wb_p_s32 (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_wb_p (uint32x4_t * __addr, const int __offset, uint32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_scatter_base_wb_p_u32 (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_wb (uint32x4_t * __addr, const int __offset, int32x4_t __value)
+ {
+  __arm_vstrwq_scatter_base_wb_s32 (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_wb (uint32x4_t * __addr, const int __offset, uint32x4_t __value)
+ {
+  __arm_vstrwq_scatter_base_wb_u32 (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_x_u8 (uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vddupq_x_n_u8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_x_u16 (uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vddupq_x_n_u16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_x_u32 (uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vddupq_x_n_u32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_x_u8 (uint32_t *__a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vddupq_x_wb_u8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_x_u16 (uint32_t *__a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vddupq_x_wb_u16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vddupq_x_u32 (uint32_t *__a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vddupq_x_wb_u32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_x_u8 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vdwdupq_x_n_u8 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_x_u16 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vdwdupq_x_n_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_x_u32 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vdwdupq_x_n_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_x_u8 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vdwdupq_x_wb_u8 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_x_u16 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vdwdupq_x_wb_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdwdupq_x_u32 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vdwdupq_x_wb_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_x_u8 (uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vidupq_x_n_u8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_x_u16 (uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vidupq_x_n_u16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_x_u32 (uint32_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vidupq_x_n_u32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_x_u8 (uint32_t *__a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vidupq_x_wb_u8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_x_u16 (uint32_t *__a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vidupq_x_wb_u16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vidupq_x_u32 (uint32_t *__a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vidupq_x_wb_u32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_x_u8 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_viwdupq_x_n_u8 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_x_u16 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_viwdupq_x_n_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_x_u32 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_viwdupq_x_n_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_x_u8 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_viwdupq_x_wb_u8 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_x_u16 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_viwdupq_x_wb_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_viwdupq_x_u32 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_viwdupq_x_wb_u32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_x (int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vabsq_x_s8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_x (int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vabsq_x_s16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_x (int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vabsq_x_s32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_n_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_n_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_n_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_x (int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclsq_x_s8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_x (int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclsq_x_s16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclsq_x (int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclsq_x_s32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_x (int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclzq_x_s8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_x (int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclzq_x_s16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_x (int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclzq_x_s32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_x (uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclzq_x_u8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_x (uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclzq_x_u16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vclzq_x (uint32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vclzq_x_u32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_x (int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vnegq_x_s8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_x (int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vnegq_x_s16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_x (int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vnegq_x_s32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulhq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulhq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulhq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulhq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulhq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulhq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulhq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_poly_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_poly_x_p8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_poly_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_poly_x_p16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_int_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_int_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_int_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_int_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_int_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmullbq_int_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmullbq_int_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_poly_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_poly_x_p8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_poly_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_poly_x_p16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_int_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_int_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_int_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_int_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_int_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulltq_int_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulltq_int_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_n_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_n_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_n_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_n_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_n_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_n_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_x_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_x_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_x_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_x_n_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_x_n_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_x_n_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhaddq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhaddq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhcaddq_rot90_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhcaddq_rot90_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot90_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhcaddq_rot90_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhcaddq_rot270_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhcaddq_rot270_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhcaddq_rot270_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhcaddq_rot270_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x (int8x16_t __a, int8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_x_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x (int16x8_t __a, int16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_x_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_x_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_x_n_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_x_n_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_x_n_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vhsubq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vhsubq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrhaddq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrhaddq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrhaddq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrhaddq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrhaddq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrhaddq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrhaddq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmulhq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmulhq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmulhq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmulhq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmulhq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrmulhq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrmulhq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x (int8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_x_n_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x (int16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_x_n_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x (int32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_x_n_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x (uint8x16_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_x_n_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x (uint16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_x_n_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x (uint32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_x_n_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_x (int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovlbq_x_s8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_x (int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovlbq_x_s16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_x (uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovlbq_x_u8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovlbq_x (uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovlbq_x_u16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_x (int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovltq_x_s8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_x (int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovltq_x_s16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_x (uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovltq_x_u8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmovltq_x (uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmovltq_x_u16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x (int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_x_s8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x (int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_x_s16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x (int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_x_s32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x (uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_x_u8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x (uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_x_u16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmvnq_x (uint32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vmvnq_x_u32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev16q_x (int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev16q_x_s8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev16q_x (uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev16q_x_u8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_x (int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev32q_x_s8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_x (int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev32q_x_s16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_x (uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev32q_x_u8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_x (uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev32q_x_u16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x (int8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_x_s8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x (int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_x_s16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x (int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_x_s32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x (uint8x16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_x_u8 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x (uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_x_u16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x (uint32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_x_u32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_x (uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_x (uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshlq_x (uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vrshlq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_x (int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshllbq_x_n_s8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_x (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshllbq_x_n_s16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_x (uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshllbq_x_n_u8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshllbq_x (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshllbq_x_n_u16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_x (int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlltq_x_n_s8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_x (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlltq_x_n_s16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_x (uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlltq_x_n_u8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlltq_x (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlltq_x_n_u16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_x_s8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_x_s16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_x_s32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x (uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_x_u8 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x (uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_x_u16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x (uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vshlq_x_u32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_n (int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlq_x_n_s8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_n (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlq_x_n_s16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_n (int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlq_x_n_s32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_n (uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlq_x_n_u8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_n (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlq_x_n_u16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlq_x_n (uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlq_x_n_u32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_x (int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrq_x_n_s8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_x (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrq_x_n_s16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_x (int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrq_x_n_s32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_x (uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrq_x_n_u8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_x (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrq_x_n_u16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrshrq_x (uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vrshrq_x_n_u32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_x (int8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrq_x_n_s8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_x (int16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrq_x_n_s16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_x (int32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrq_x_n_s32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_x (uint8x16_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrq_x_n_u8 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_x (uint16x8_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrq_x_n_u16 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshrq_x (uint32x4_t __a, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshrq_x_n_u32 (__a, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadciq (int32x4_t __a, int32x4_t __b, unsigned * __carry_out)
+ {
+  return __arm_vadciq_s32 (__a, __b, __carry_out);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadciq (uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out)
+ {
+  return __arm_vadciq_u32 (__a, __b, __carry_out);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadciq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry_out, mve_pred16_t __p)
+ {
+  return __arm_vadciq_m_s32 (__inactive, __a, __b, __carry_out, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadciq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out, mve_pred16_t __p)
+ {
+  return __arm_vadciq_m_u32 (__inactive, __a, __b, __carry_out, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadcq (int32x4_t __a, int32x4_t __b, unsigned * __carry)
+ {
+  return __arm_vadcq_s32 (__a, __b, __carry);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadcq (uint32x4_t __a, uint32x4_t __b, unsigned * __carry)
+ {
+  return __arm_vadcq_u32 (__a, __b, __carry);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadcq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p)
+ {
+  return __arm_vadcq_m_s32 (__inactive, __a, __b, __carry, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vadcq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p)
+ {
+  return __arm_vadcq_m_u32 (__inactive, __a, __b, __carry, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbciq (int32x4_t __a, int32x4_t __b, unsigned * __carry_out)
+ {
+  return __arm_vsbciq_s32 (__a, __b, __carry_out);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbciq (uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out)
+ {
+  return __arm_vsbciq_u32 (__a, __b, __carry_out);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbciq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry_out, mve_pred16_t __p)
+ {
+  return __arm_vsbciq_m_s32 (__inactive, __a, __b, __carry_out, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbciq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out, mve_pred16_t __p)
+ {
+  return __arm_vsbciq_m_u32 (__inactive, __a, __b, __carry_out, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbcq (int32x4_t __a, int32x4_t __b, unsigned * __carry)
+ {
+  return __arm_vsbcq_s32 (__a, __b, __carry);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbcq (uint32x4_t __a, uint32x4_t __b, unsigned * __carry)
+ {
+  return __arm_vsbcq_u32 (__a, __b, __carry);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbcq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p)
+ {
+  return __arm_vsbcq_m_s32 (__inactive, __a, __b, __carry, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsbcq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p)
+ {
+  return __arm_vsbcq_m_u32 (__inactive, __a, __b, __carry, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p)
+ {
+  __arm_vst1q_p_u8 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p (int8_t * __addr, int8x16_t __value, mve_pred16_t __p)
+ {
+  __arm_vst1q_p_s8 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q (int8_t * __addr, int8x16x2_t __value)
+ {
+  __arm_vst2q_s8 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q (uint8_t * __addr, uint8x16x2_t __value)
+ {
+  __arm_vst2q_u8 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z (uint8_t const *__base, mve_pred16_t __p)
+ {
+  return __arm_vld1q_z_u8 (__base, __p);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z (int8_t const *__base, mve_pred16_t __p)
+ {
+  return __arm_vld1q_z_s8 (__base, __p);
+ }
+ 
+ __extension__ extern __inline int8x16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q (int8_t const * __addr)
+ {
+  return __arm_vld2q_s8 (__addr);
+ }
+ 
+ __extension__ extern __inline uint8x16x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q (uint8_t const * __addr)
+ {
+  return __arm_vld2q_u8 (__addr);
+ }
+ 
+ __extension__ extern __inline int8x16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q (int8_t const * __addr)
+ {
+  return __arm_vld4q_s8 (__addr);
+ }
+ 
+ __extension__ extern __inline uint8x16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q (uint8_t const * __addr)
+ {
+  return __arm_vld4q_u8 (__addr);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vst1q_p_u16 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p (int16_t * __addr, int16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vst1q_p_s16 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q (int16_t * __addr, int16x8x2_t __value)
+ {
+  __arm_vst2q_s16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q (uint16_t * __addr, uint16x8x2_t __value)
+ {
+  __arm_vst2q_u16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z (uint16_t const *__base, mve_pred16_t __p)
+ {
+  return __arm_vld1q_z_u16 (__base, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z (int16_t const *__base, mve_pred16_t __p)
+ {
+  return __arm_vld1q_z_s16 (__base, __p);
+ }
+ 
+ __extension__ extern __inline int16x8x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q (int16_t const * __addr)
+ {
+  return __arm_vld2q_s16 (__addr);
+ }
+ 
+ __extension__ extern __inline uint16x8x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q (uint16_t const * __addr)
+ {
+  return __arm_vld2q_u16 (__addr);
+ }
+ 
+ __extension__ extern __inline int16x8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q (int16_t const * __addr)
+ {
+  return __arm_vld4q_s16 (__addr);
+ }
+ 
+ __extension__ extern __inline uint16x8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q (uint16_t const * __addr)
+ {
+  return __arm_vld4q_u16 (__addr);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vst1q_p_u32 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p (int32_t * __addr, int32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vst1q_p_s32 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q (int32_t * __addr, int32x4x2_t __value)
+ {
+  __arm_vst2q_s32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q (uint32_t * __addr, uint32x4x2_t __value)
+ {
+  __arm_vst2q_u32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z (uint32_t const *__base, mve_pred16_t __p)
+ {
+  return __arm_vld1q_z_u32 (__base, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z (int32_t const *__base, mve_pred16_t __p)
+ {
+  return __arm_vld1q_z_s32 (__base, __p);
+ }
+ 
+ __extension__ extern __inline int32x4x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q (int32_t const * __addr)
+ {
+  return __arm_vld2q_s32 (__addr);
+ }
+ 
+ __extension__ extern __inline uint32x4x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q (uint32_t const * __addr)
+ {
+  return __arm_vld2q_u32 (__addr);
+ }
+ 
+ __extension__ extern __inline int32x4x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q (int32_t const * __addr)
+ {
+  return __arm_vld4q_s32 (__addr);
+ }
+ 
+ __extension__ extern __inline uint32x4x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q (uint32_t const * __addr)
+ {
+  return __arm_vld4q_u32 (__addr);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane (int16_t __a, int16x8_t __b, const int __idx)
+ {
+  return __arm_vsetq_lane_s16 (__a, __b, __idx);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane (int32_t __a, int32x4_t __b, const int __idx)
+ {
+  return __arm_vsetq_lane_s32 (__a, __b, __idx);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane (int8_t __a, int8x16_t __b, const int __idx)
+ {
+  return __arm_vsetq_lane_s8 (__a, __b, __idx);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane (int64_t __a, int64x2_t __b, const int __idx)
+ {
+  return __arm_vsetq_lane_s64 (__a, __b, __idx);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane (uint8_t __a, uint8x16_t __b, const int __idx)
+ {
+  return __arm_vsetq_lane_u8 (__a, __b, __idx);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane (uint16_t __a, uint16x8_t __b, const int __idx)
+ {
+  return __arm_vsetq_lane_u16 (__a, __b, __idx);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane (uint32_t __a, uint32x4_t __b, const int __idx)
+ {
+  return __arm_vsetq_lane_u32 (__a, __b, __idx);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane (uint64_t __a, uint64x2_t __b, const int __idx)
+ {
+  return __arm_vsetq_lane_u64 (__a, __b, __idx);
+ }
+ 
+ __extension__ extern __inline int16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane (int16x8_t __a, const int __idx)
+ {
+  return __arm_vgetq_lane_s16 (__a, __idx);
+ }
+ 
+ __extension__ extern __inline int32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane (int32x4_t __a, const int __idx)
+ {
+  return __arm_vgetq_lane_s32 (__a, __idx);
+ }
+ 
+ __extension__ extern __inline int8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane (int8x16_t __a, const int __idx)
+ {
+  return __arm_vgetq_lane_s8 (__a, __idx);
+ }
+ 
+ __extension__ extern __inline int64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane (int64x2_t __a, const int __idx)
+ {
+  return __arm_vgetq_lane_s64 (__a, __idx);
+ }
+ 
+ __extension__ extern __inline uint8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane (uint8x16_t __a, const int __idx)
+ {
+  return __arm_vgetq_lane_u8 (__a, __idx);
+ }
+ 
+ __extension__ extern __inline uint16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane (uint16x8_t __a, const int __idx)
+ {
+  return __arm_vgetq_lane_u16 (__a, __idx);
+ }
+ 
+ __extension__ extern __inline uint32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane (uint32x4_t __a, const int __idx)
+ {
+  return __arm_vgetq_lane_u32 (__a, __idx);
+ }
+ 
+ __extension__ extern __inline uint64_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane (uint64x2_t __a, const int __idx)
+ {
+  return __arm_vgetq_lane_u64 (__a, __idx);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_m (int8x16_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlcq_m_s8 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_m (uint8x16_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlcq_m_u8 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_m (int16x8_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlcq_m_s16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_m (uint16x8_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlcq_m_u16 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_m (int32x4_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlcq_m_s32 (__a, __b, __imm, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vshlcq_m (uint32x4_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p)
+ {
+  return __arm_vshlcq_m_u32 (__a, __b, __imm, __p);
+ }
+ 
+ #if (__ARM_FEATURE_MVE & 2)  /* MVE Floating point.  */
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q (float16_t * __addr, float16x8x4_t __value)
+ {
+  __arm_vst4q_f16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst4q (float32_t * __addr, float32x4x4_t __value)
+ {
+  __arm_vst4q_f32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndxq (float16x8_t __a)
+ {
+  return __arm_vrndxq_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndxq (float32x4_t __a)
+ {
+  return __arm_vrndxq_f32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndq (float16x8_t __a)
+ {
+  return __arm_vrndq_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndq (float32x4_t __a)
+ {
+  return __arm_vrndq_f32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndpq (float16x8_t __a)
+ {
+  return __arm_vrndpq_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndpq (float32x4_t __a)
+ {
+  return __arm_vrndpq_f32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndnq (float16x8_t __a)
+ {
+  return __arm_vrndnq_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndnq (float32x4_t __a)
+ {
+  return __arm_vrndnq_f32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndmq (float16x8_t __a)
+ {
+  return __arm_vrndmq_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndmq (float32x4_t __a)
+ {
+  return __arm_vrndmq_f32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndaq (float16x8_t __a)
+ {
+  return __arm_vrndaq_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndaq (float32x4_t __a)
+ {
+  return __arm_vrndaq_f32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q (float16x8_t __a)
+ {
+  return __arm_vrev64q_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q (float32x4_t __a)
+ {
+  return __arm_vrev64q_f32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq (float16x8_t __a)
+ {
+  return __arm_vnegq_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq (float32x4_t __a)
+ {
+  return __arm_vnegq_f32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n (float16_t __a)
+ {
+  return __arm_vdupq_n_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_n (float32_t __a)
+ {
+  return __arm_vdupq_n_f32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq (float16x8_t __a)
+ {
+  return __arm_vabsq_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq (float32x4_t __a)
+ {
+  return __arm_vabsq_f32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q (float16x8_t __a)
+ {
+  return __arm_vrev32q_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvttq_f32 (float16x8_t __a)
+ {
+  return __arm_vcvttq_f32_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtbq_f32 (float16x8_t __a)
+ {
+  return __arm_vcvtbq_f32_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq (int16x8_t __a)
+ {
+  return __arm_vcvtq_f16_s16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq (int32x4_t __a)
+ {
+  return __arm_vcvtq_f32_s32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq (uint16x8_t __a)
+ {
+  return __arm_vcvtq_f16_u16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq (uint32x4_t __a)
+ {
+  return __arm_vcvtq_f32_u32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (float16x8_t __a, float16_t __b)
+ {
+  return __arm_vsubq_n_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (float32x4_t __a, float32_t __b)
+ {
+  return __arm_vsubq_n_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq (float16x8_t __a, int32_t __b)
+ {
+  return __arm_vbrsrq_n_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq (float32x4_t __a, int32_t __b)
+ {
+  return __arm_vbrsrq_n_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_n (int16x8_t __a, const int __imm6)
+ {
+  return __arm_vcvtq_n_f16_s16 (__a, __imm6);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_n (int32x4_t __a, const int __imm6)
+ {
+  return __arm_vcvtq_n_f32_s32 (__a, __imm6);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_n (uint16x8_t __a, const int __imm6)
+ {
+  return __arm_vcvtq_n_f16_u16 (__a, __imm6);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_n (uint32x4_t __a, const int __imm6)
+ {
+  return __arm_vcvtq_n_f32_u32 (__a, __imm6);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (float16x8_t __a, float16_t __b)
+ {
+  return __arm_vcmpneq_n_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vcmpneq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq (float16x8_t __a, float16_t __b)
+ {
+  return __arm_vcmpltq_n_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vcmpltq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq (float16x8_t __a, float16_t __b)
+ {
+  return __arm_vcmpleq_n_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vcmpleq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq (float16x8_t __a, float16_t __b)
+ {
+  return __arm_vcmpgtq_n_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vcmpgtq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq (float16x8_t __a, float16_t __b)
+ {
+  return __arm_vcmpgeq_n_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vcmpgeq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (float16x8_t __a, float16_t __b)
+ {
+  return __arm_vcmpeqq_n_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vcmpeqq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vsubq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vorrq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vornq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (float16x8_t __a, float16_t __b)
+ {
+  return __arm_vmulq_n_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vmulq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmvq (float16_t __a, float16x8_t __b)
+ {
+  return __arm_vminnmvq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vminnmq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmavq (float16_t __a, float16x8_t __b)
+ {
+  return __arm_vminnmavq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmaq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vminnmaq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmvq (float16_t __a, float16x8_t __b)
+ {
+  return __arm_vmaxnmvq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vmaxnmq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmavq (float16_t __a, float16x8_t __b)
+ {
+  return __arm_vmaxnmavq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmaq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vmaxnmaq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_veorq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot90 (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vcmulq_rot90_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot270 (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vcmulq_rot270_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot180 (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vcmulq_rot180_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vcmulq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90 (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vcaddq_rot90_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270 (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vcaddq_rot270_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vbicq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vandq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (float16x8_t __a, float16_t __b)
+ {
+  return __arm_vaddq_n_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vabdq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (float32x4_t __a, float32_t __b)
+ {
+  return __arm_vcmpneq_n_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vcmpneq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq (float32x4_t __a, float32_t __b)
+ {
+  return __arm_vcmpltq_n_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vcmpltq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq (float32x4_t __a, float32_t __b)
+ {
+  return __arm_vcmpleq_n_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vcmpleq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq (float32x4_t __a, float32_t __b)
+ {
+  return __arm_vcmpgtq_n_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vcmpgtq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq (float32x4_t __a, float32_t __b)
+ {
+  return __arm_vcmpgeq_n_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vcmpgeq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (float32x4_t __a, float32_t __b)
+ {
+  return __arm_vcmpeqq_n_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vcmpeqq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vsubq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vorrq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vornq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (float32x4_t __a, float32_t __b)
+ {
+  return __arm_vmulq_n_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vmulq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmvq (float32_t __a, float32x4_t __b)
+ {
+  return __arm_vminnmvq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vminnmq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmavq (float32_t __a, float32x4_t __b)
+ {
+  return __arm_vminnmavq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmaq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vminnmaq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmvq (float32_t __a, float32x4_t __b)
+ {
+  return __arm_vmaxnmvq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vmaxnmq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmavq (float32_t __a, float32x4_t __b)
+ {
+  return __arm_vmaxnmavq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmaq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vmaxnmaq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_veorq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot90 (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vcmulq_rot90_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot270 (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vcmulq_rot270_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot180 (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vcmulq_rot180_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vcmulq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90 (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vcaddq_rot90_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270 (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vcaddq_rot270_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vbicq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vandq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (float32x4_t __a, float32_t __b)
+ {
+  return __arm_vaddq_n_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vabdq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_m (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtaq_m_s16_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_m (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtaq_m_u16_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_m (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtaq_m_s32_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtaq_m (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtaq_m_u32_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m (float16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_f16_s16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m (float16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_f16_u16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m (float32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_f32_s32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m (float32x4_t __inactive, uint32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_f32_u32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtbq_m (float16x8_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcvtbq_m_f16_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtbq_m (float32x4_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtbq_m_f32_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvttq_m (float16x8_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcvttq_m_f16_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvttq_m (float32x4_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvttq_m_f32_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev32q_m_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq (float16x8_t __a, float16x8_t __b, float16x8_t __c)
+ {
+  return __arm_vcmlaq_f16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot180 (float16x8_t __a, float16x8_t __b, float16x8_t __c)
+ {
+  return __arm_vcmlaq_rot180_f16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot270 (float16x8_t __a, float16x8_t __b, float16x8_t __c)
+ {
+  return __arm_vcmlaq_rot270_f16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot90 (float16x8_t __a, float16x8_t __b, float16x8_t __c)
+ {
+  return __arm_vcmlaq_rot90_f16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq (float16x8_t __a, float16x8_t __b, float16x8_t __c)
+ {
+  return __arm_vfmaq_f16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq (float16x8_t __a, float16x8_t __b, float16_t __c)
+ {
+  return __arm_vfmaq_n_f16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmasq (float16x8_t __a, float16x8_t __b, float16_t __c)
+ {
+  return __arm_vfmasq_n_f16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmsq (float16x8_t __a, float16x8_t __b, float16x8_t __c)
+ {
+  return __arm_vfmsq_f16 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vabsq_m_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_m (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtmq_m_s16_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_m (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtnq_m_s16_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_m (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtpq_m_s16_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_s16_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m (float16x8_t __inactive, float16_t __a, mve_pred16_t __p)
+ {
+  return __arm_vdupq_m_n_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmaq_m (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxnmaq_m_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmavq_p (float16_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxnmavq_p_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmvq_p (float16_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxnmvq_p_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmaq_m (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminnmaq_m_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmavq_p (float16_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminnmavq_p_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmvq_p (float16_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminnmvq_p_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vnegq_m_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vpselq_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_m_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndaq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndaq_m_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndmq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndmq_m_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndnq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndnq_m_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndpq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndpq_m_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndq_m_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndxq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndxq_m_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_n_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgeq_m_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgeq_m_n_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgtq_m_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgtq_m_n_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpleq_m_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpleq_m_n_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpltq_m_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpltq_m_n_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_n_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_m (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtmq_m_u16_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_m (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtnq_m_u16_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_m (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtpq_m_u16_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_u16_f16 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+ {
+  return __arm_vcmlaq_f32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot180 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+ {
+  return __arm_vcmlaq_rot180_f32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot270 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+ {
+  return __arm_vcmlaq_rot270_f32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot90 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+ {
+  return __arm_vcmlaq_rot90_f32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+ {
+  return __arm_vfmaq_f32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq (float32x4_t __a, float32x4_t __b, float32_t __c)
+ {
+  return __arm_vfmaq_n_f32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmasq (float32x4_t __a, float32x4_t __b, float32_t __c)
+ {
+  return __arm_vfmasq_n_f32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmsq (float32x4_t __a, float32x4_t __b, float32x4_t __c)
+ {
+  return __arm_vfmsq_f32 (__a, __b, __c);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vabsq_m_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_m (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtmq_m_s32_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_m (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtnq_m_s32_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_m (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtpq_m_s32_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_s32_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vdupq_m (float32x4_t __inactive, float32_t __a, mve_pred16_t __p)
+ {
+  return __arm_vdupq_m_n_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmaq_m (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxnmaq_m_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmavq_p (float32_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxnmavq_p_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmvq_p (float32_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxnmvq_p_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmaq_m (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminnmaq_m_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmavq_p (float32_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminnmavq_p_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmvq_p (float32_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminnmvq_p_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vnegq_m_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vpselq (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vpselq_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_m_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndaq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndaq_m_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndmq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndmq_m_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndnq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndnq_m_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndpq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndpq_m_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndq_m_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndxq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndxq_m_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpeqq_m (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpeqq_m_n_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgeq_m_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgeq_m (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgeq_m_n_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgtq_m_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpgtq_m (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpgtq_m_n_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpleq_m_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpleq_m (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpleq_m_n_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpltq_m_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpltq_m (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpltq_m_n_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline mve_pred16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmpneq_m (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmpneq_m_n_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtmq_m (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtmq_m_u32_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtnq_m (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtnq_m_u32_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtpq_m (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtpq_m_u32_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_u32_f32 (__inactive, __a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n (float16x8_t __inactive, uint16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_n_f16_u16 (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n (float16x8_t __inactive, int16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_n_f16_s16 (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n (float32x4_t __inactive, uint32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_n_f32_u32 (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n (float32x4_t __inactive, int32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_n_f32_s32 (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (float32x4_t __inactive, float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_n_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_m (float16x8_t __inactive, float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_m_n_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m (float32x4_t __inactive, float32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_m_n_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_m (float16x8_t __inactive, float16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_m_n_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_m (float32x4_t __a, float32x4_t __b, float32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vcmlaq_m_f32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_m (float16x8_t __a, float16x8_t __b, float16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vcmlaq_m_f16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot180_m (float32x4_t __a, float32x4_t __b, float32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vcmlaq_rot180_m_f32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot180_m (float16x8_t __a, float16x8_t __b, float16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vcmlaq_rot180_m_f16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot270_m (float32x4_t __a, float32x4_t __b, float32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vcmlaq_rot270_m_f32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot270_m (float16x8_t __a, float16x8_t __b, float16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vcmlaq_rot270_m_f16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot90_m (float32x4_t __a, float32x4_t __b, float32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vcmlaq_rot90_m_f32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmlaq_rot90_m (float16x8_t __a, float16x8_t __b, float16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vcmlaq_rot90_m_f16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot180_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_rot180_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot180_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_rot180_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot270_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_rot270_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot270_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_rot270_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot90_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_rot90_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot90_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_rot90_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n (int32x4_t __inactive, float32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_n_s32_f32 (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n (int16x8_t __inactive, float16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_n_s16_f16 (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n (uint32x4_t __inactive, float32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_n_u32_f32 (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_m_n (uint16x8_t __inactive, float16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_m_n_u16_f16 (__inactive, __a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq_m (float32x4_t __a, float32x4_t __b, float32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vfmaq_m_f32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq_m (float16x8_t __a, float16x8_t __b, float16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vfmaq_m_f16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq_m (float32x4_t __a, float32x4_t __b, float32_t __c, mve_pred16_t __p)
+ {
+  return __arm_vfmaq_m_n_f32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmaq_m (float16x8_t __a, float16x8_t __b, float16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vfmaq_m_n_f16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmasq_m (float32x4_t __a, float32x4_t __b, float32_t __c, mve_pred16_t __p)
+ {
+  return __arm_vfmasq_m_n_f32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmasq_m (float16x8_t __a, float16x8_t __b, float16_t __c, mve_pred16_t __p)
+ {
+  return __arm_vfmasq_m_n_f16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmsq_m (float32x4_t __a, float32x4_t __b, float32x4_t __c, mve_pred16_t __p)
+ {
+  return __arm_vfmsq_m_f32 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vfmsq_m (float16x8_t __a, float16x8_t __b, float16x8_t __c, mve_pred16_t __p)
+ {
+  return __arm_vfmsq_m_f16 (__a, __b, __c, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxnmq_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxnmq_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminnmq_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminnmq_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (float32x4_t __inactive, float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_n_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_m (float16x8_t __inactive, float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_m_n_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (float32x4_t __inactive, float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_n_f32 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_m (float16x8_t __inactive, float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_m_n_f16 (__inactive, __a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q (float32_t const * __base)
+ {
+  return __arm_vld1q_f32 (__base);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q (float16_t const * __base)
+ {
+  return __arm_vld1q_f16 (__base);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset (float16_t const * __base, uint16x8_t __offset)
+ {
+  return __arm_vldrhq_gather_offset_f16 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_offset_z (float16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrhq_gather_offset_z_f16 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset (float16_t const * __base, uint16x8_t __offset)
+ {
+  return __arm_vldrhq_gather_shifted_offset_f16 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrhq_gather_shifted_offset_z (float16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrhq_gather_shifted_offset_z_f16 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_offset (float32_t const * __base, uint32x4_t __offset)
+ {
+  return __arm_vldrwq_gather_offset_f32 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_offset_z (float32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrwq_gather_offset_z_f32 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_shifted_offset (float32_t const * __base, uint32x4_t __offset)
+ {
+  return __arm_vldrwq_gather_shifted_offset_f32 (__base, __offset);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vldrwq_gather_shifted_offset_z (float32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
+ {
+  return __arm_vldrwq_gather_shifted_offset_z_f32 (__base, __offset, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_p (float32_t * __addr, float32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_p_f32 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq (float32_t * __addr, float32x4_t __value)
+ {
+  __arm_vstrwq_f32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q (float32_t * __addr, float32x4_t __value)
+ {
+  __arm_vst1q_f32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q (float16_t * __addr, float16x8_t __value)
+ {
+  __arm_vst1q_f16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq (float16_t * __addr, float16x8_t __value)
+ {
+  __arm_vstrhq_f16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_p (float16_t * __addr, float16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_p_f16 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset (float16_t * __base, uint16x8_t __offset, float16x8_t __value)
+ {
+  __arm_vstrhq_scatter_offset_f16 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_offset_p (float16_t * __base, uint16x8_t __offset, float16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_scatter_offset_p_f16 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset (float16_t * __base, uint16x8_t __offset, float16x8_t __value)
+ {
+  __arm_vstrhq_scatter_shifted_offset_f16 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrhq_scatter_shifted_offset_p (float16_t * __base, uint16x8_t __offset, float16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrhq_scatter_shifted_offset_p_f16 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base (uint32x4_t __addr, const int __offset, float32x4_t __value)
+ {
+  __arm_vstrwq_scatter_base_f32 (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_p (uint32x4_t __addr, const int __offset, float32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_scatter_base_p_f32 (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_offset (float32_t * __base, uint32x4_t __offset, float32x4_t __value)
+ {
+  __arm_vstrwq_scatter_offset_f32 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_offset_p (float32_t * __base, uint32x4_t __offset, float32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_scatter_offset_p_f32 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_shifted_offset (float32_t * __base, uint32x4_t __offset, float32x4_t __value)
+ {
+  __arm_vstrwq_scatter_shifted_offset_f32 (__base, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_shifted_offset_p (float32_t * __base, uint32x4_t __offset, float32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_scatter_shifted_offset_p_f32 (__base, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (float16x8_t __a, float16x8_t __b)
+ {
+  return __arm_vaddq_f16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq (float32x4_t __a, float32x4_t __b)
+ {
+  return __arm_vaddq_f32 (__a, __b);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_wb (uint32x4_t * __addr, const int __offset, float32x4_t __value)
+ {
+  __arm_vstrwq_scatter_base_wb_f32 (__addr, __offset, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vstrwq_scatter_base_wb_p (uint32x4_t * __addr, const int __offset, float32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vstrwq_scatter_base_wb_p_f32 (__addr, __offset, __value, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminnmq_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vminnmq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vminnmq_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxnmq_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmaxnmq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmaxnmq_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabdq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vabdq_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_x (float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vabsq_x_f16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vabsq_x (float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vabsq_x_f32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_n_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vaddq_x (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vaddq_x_n_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_x (float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vnegq_x_f16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vnegq_x (float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vnegq_x_f32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_n_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vmulq_x (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vmulq_x_n_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (float16x8_t __a, float16_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_n_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsubq_x (float32x4_t __a, float32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vsubq_x_n_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot90_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot90_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcaddq_rot270_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcaddq_rot270_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot90_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_rot90_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot90_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_rot90_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot180_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_rot180_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot180_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_rot180_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot270_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_rot270_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcmulq_rot270_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vcmulq_rot270_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x (uint16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_x_f16_u16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x (int16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_x_f16_s16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x (int32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_x_f32_s32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x (uint32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_x_f32_u32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_n (int16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_x_n_f16_s16 (__a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_n (uint16x8_t __a, const int __imm6, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_x_n_f16_u16 (__a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_n (int32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_x_n_f32_s32 (__a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vcvtq_x_n (uint32x4_t __a, const int __imm6, mve_pred16_t __p)
+ {
+  return __arm_vcvtq_x_n_f32_u32 (__a, __imm6, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndq_x (float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndq_x_f16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndq_x (float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndq_x_f32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndnq_x (float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndnq_x_f16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndnq_x (float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndnq_x_f32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndmq_x (float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndmq_x_f16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndmq_x (float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndmq_x_f32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndpq_x (float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndpq_x_f16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndpq_x (float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndpq_x_f32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndaq_x (float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndaq_x_f16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndaq_x (float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndaq_x_f32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndxq_x (float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndxq_x_f16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrndxq_x (float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrndxq_x_f32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vandq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vandq_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbicq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbicq_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x (float16x8_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_x_n_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vbrsrq_x (float32x4_t __a, int32_t __b, mve_pred16_t __p)
+ {
+  return __arm_vbrsrq_x_n_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_veorq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_veorq_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vornq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vornq_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_x_f16 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vorrq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
+ {
+  return __arm_vorrq_x_f32 (__a, __b, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev32q_x (float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev32q_x_f16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x (float16x8_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_x_f16 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vrev64q_x (float32x4_t __a, mve_pred16_t __p)
+ {
+  return __arm_vrev64q_x_f32 (__a, __p);
+ }
+ 
+ __extension__ extern __inline float16x8x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q (float16_t const * __addr)
+ {
+  return __arm_vld4q_f16 (__addr);
+ }
+ 
+ __extension__ extern __inline float16x8x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q (float16_t const * __addr)
+ {
+  return __arm_vld2q_f16 (__addr);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z (float16_t const *__base, mve_pred16_t __p)
+ {
+  return __arm_vld1q_z_f16 (__base, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q (float16_t * __addr, float16x8x2_t __value)
+ {
+  __arm_vst2q_f16 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p (float16_t * __addr, float16x8_t __value, mve_pred16_t __p)
+ {
+  __arm_vst1q_p_f16 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline float32x4x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld4q (float32_t const * __addr)
+ {
+  return __arm_vld4q_f32 (__addr);
+ }
+ 
+ __extension__ extern __inline float32x4x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld2q (float32_t const * __addr)
+ {
+  return __arm_vld2q_f32 (__addr);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vld1q_z (float32_t const *__base, mve_pred16_t __p)
+ {
+  return __arm_vld1q_z_f32 (__base, __p);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst2q (float32_t * __addr, float32x4x2_t __value)
+ {
+  __arm_vst2q_f32 (__addr, __value);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vst1q_p (float32_t * __addr, float32x4_t __value, mve_pred16_t __p)
+ {
+  __arm_vst1q_p_f32 (__addr, __value, __p);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane (float16_t __a, float16x8_t __b, const int __idx)
+ {
+  return __arm_vsetq_lane_f16 (__a, __b, __idx);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vsetq_lane (float32_t __a, float32x4_t __b, const int __idx)
+ {
+  return __arm_vsetq_lane_f32 (__a, __b, __idx);
+ }
+ 
+ __extension__ extern __inline float16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane (float16x8_t __a, const int __idx)
+ {
+  return __arm_vgetq_lane_f16 (__a, __idx);
+ }
+ 
+ __extension__ extern __inline float32_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vgetq_lane (float32x4_t __a, const int __idx)
+ {
+  return __arm_vgetq_lane_f32 (__a, __idx);
+ }
+ #endif /* MVE Floating point.  */
+ 
+ #else
+ enum {
+     __ARM_mve_type_fp_n = 1,
+     __ARM_mve_type_int_n,
+     __ARM_mve_type_float16_t_ptr,
+     __ARM_mve_type_float16x8_t,
+     __ARM_mve_type_float16x8x2_t,
+     __ARM_mve_type_float16x8x4_t,
+     __ARM_mve_type_float32_t_ptr,
+     __ARM_mve_type_float32x4_t,
+     __ARM_mve_type_float32x4x2_t,
+     __ARM_mve_type_float32x4x4_t,
+     __ARM_mve_type_int16_t_ptr,
+     __ARM_mve_type_int16x8_t,
+     __ARM_mve_type_int16x8x2_t,
+     __ARM_mve_type_int16x8x4_t,
+     __ARM_mve_type_int32_t_ptr,
+     __ARM_mve_type_int32x4_t,
+     __ARM_mve_type_int32x4x2_t,
+     __ARM_mve_type_int32x4x4_t,
+     __ARM_mve_type_int64_t_ptr,
+     __ARM_mve_type_int64x2_t,
+     __ARM_mve_type_int8_t_ptr,
+     __ARM_mve_type_int8x16_t,
+     __ARM_mve_type_int8x16x2_t,
+     __ARM_mve_type_int8x16x4_t,
+     __ARM_mve_type_uint16_t_ptr,
+     __ARM_mve_type_uint16x8_t,
+     __ARM_mve_type_uint16x8x2_t,
+     __ARM_mve_type_uint16x8x4_t,
+     __ARM_mve_type_uint32_t_ptr,
+     __ARM_mve_type_uint32x4_t,
+     __ARM_mve_type_uint32x4x2_t,
+     __ARM_mve_type_uint32x4x4_t,
+     __ARM_mve_type_uint64_t_ptr,
+     __ARM_mve_type_uint64x2_t,
+     __ARM_mve_type_uint8_t_ptr,
+     __ARM_mve_type_uint8x16_t,
+     __ARM_mve_type_uint8x16x2_t,
+     __ARM_mve_type_uint8x16x4_t,
+     __ARM_mve_unsupported_type
+ };
+ 
+ #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point.  */
+ #define __ARM_mve_typeid(x) _Generic(x, \
+     float16_t: __ARM_mve_type_fp_n, \
+     float16_t *: __ARM_mve_type_float16_t_ptr, \
+     float16_t const *: __ARM_mve_type_float16_t_ptr, \
+     float16x8_t: __ARM_mve_type_float16x8_t, \
+     float16x8x2_t: __ARM_mve_type_float16x8x2_t, \
+     float16x8x4_t: __ARM_mve_type_float16x8x4_t, \
+     float32_t: __ARM_mve_type_fp_n, \
+     float32_t *: __ARM_mve_type_float32_t_ptr, \
+     float32_t const *: __ARM_mve_type_float32_t_ptr, \
+     float32x4_t: __ARM_mve_type_float32x4_t, \
+     float32x4x2_t: __ARM_mve_type_float32x4x2_t, \
+     float32x4x4_t: __ARM_mve_type_float32x4x4_t, \
+     int16_t: __ARM_mve_type_int_n, \
+     int16_t *: __ARM_mve_type_int16_t_ptr, \
+     int16_t const *: __ARM_mve_type_int16_t_ptr, \
+     int16x8_t: __ARM_mve_type_int16x8_t, \
+     int16x8x2_t: __ARM_mve_type_int16x8x2_t, \
+     int16x8x4_t: __ARM_mve_type_int16x8x4_t, \
+     int32_t: __ARM_mve_type_int_n, \
+     int32_t *: __ARM_mve_type_int32_t_ptr, \
+     int32_t const *: __ARM_mve_type_int32_t_ptr, \
+     int32x4_t: __ARM_mve_type_int32x4_t, \
+     int32x4x2_t: __ARM_mve_type_int32x4x2_t, \
+     int32x4x4_t: __ARM_mve_type_int32x4x4_t, \
+     int64_t: __ARM_mve_type_int_n, \
+     int64_t *: __ARM_mve_type_int64_t_ptr, \
+     int64_t const *: __ARM_mve_type_int64_t_ptr, \
+     int64x2_t: __ARM_mve_type_int64x2_t, \
+     int8_t: __ARM_mve_type_int_n, \
+     int8_t *: __ARM_mve_type_int8_t_ptr, \
+     int8_t const *: __ARM_mve_type_int8_t_ptr, \
+     int8x16_t: __ARM_mve_type_int8x16_t, \
+     int8x16x2_t: __ARM_mve_type_int8x16x2_t, \
+     int8x16x4_t: __ARM_mve_type_int8x16x4_t, \
+     uint16_t: __ARM_mve_type_int_n, \
+     uint16_t *: __ARM_mve_type_uint16_t_ptr, \
+     uint16_t const *: __ARM_mve_type_uint16_t_ptr, \
+     uint16x8_t: __ARM_mve_type_uint16x8_t, \
+     uint16x8x2_t: __ARM_mve_type_uint16x8x2_t, \
+     uint16x8x4_t: __ARM_mve_type_uint16x8x4_t, \
+     uint32_t: __ARM_mve_type_int_n, \
+     uint32_t *: __ARM_mve_type_uint32_t_ptr, \
+     uint32_t const *: __ARM_mve_type_uint32_t_ptr, \
+     uint32x4_t: __ARM_mve_type_uint32x4_t, \
+     uint32x4x2_t: __ARM_mve_type_uint32x4x2_t, \
+     uint32x4x4_t: __ARM_mve_type_uint32x4x4_t, \
+     uint64_t: __ARM_mve_type_int_n, \
+     uint64_t *: __ARM_mve_type_uint64_t_ptr, \
+     uint64_t const *: __ARM_mve_type_uint64_t_ptr, \
+     uint64x2_t: __ARM_mve_type_uint64x2_t, \
+     uint8_t: __ARM_mve_type_int_n, \
+     uint8_t *: __ARM_mve_type_uint8_t_ptr, \
+     uint8_t const *: __ARM_mve_type_uint8_t_ptr, \
+     uint8x16_t: __ARM_mve_type_uint8x16_t, \
+     uint8x16x2_t: __ARM_mve_type_uint8x16x2_t, \
+     uint8x16x4_t: __ARM_mve_type_uint8x16x4_t, \
+     default: _Generic(x, \
+ 	signed char: __ARM_mve_type_int_n, \
+ 	short: __ARM_mve_type_int_n, \
+ 	int: __ARM_mve_type_int_n, \
+ 	long: __ARM_mve_type_int_n, \
+ 	long long: __ARM_mve_type_int_n, \
+ 	unsigned char: __ARM_mve_type_int_n, \
+ 	unsigned short: __ARM_mve_type_int_n, \
+ 	unsigned int: __ARM_mve_type_int_n, \
+ 	unsigned long: __ARM_mve_type_int_n, \
+ 	unsigned long long: __ARM_mve_type_int_n, \
+ 	default: __ARM_mve_unsupported_type))
+ #else
+ #define __ARM_mve_typeid(x) _Generic(x, \
+     int16_t: __ARM_mve_type_int_n, \
+     int16_t *: __ARM_mve_type_int16_t_ptr, \
+     int16_t const *: __ARM_mve_type_int16_t_ptr, \
+     int16x8_t: __ARM_mve_type_int16x8_t, \
+     int16x8x2_t: __ARM_mve_type_int16x8x2_t, \
+     int16x8x4_t: __ARM_mve_type_int16x8x4_t, \
+     int32_t: __ARM_mve_type_int_n, \
+     int32_t *: __ARM_mve_type_int32_t_ptr, \
+     int32_t const *: __ARM_mve_type_int32_t_ptr, \
+     int32x4_t: __ARM_mve_type_int32x4_t, \
+     int32x4x2_t: __ARM_mve_type_int32x4x2_t, \
+     int32x4x4_t: __ARM_mve_type_int32x4x4_t, \
+     int64_t: __ARM_mve_type_int_n, \
+     int64_t *: __ARM_mve_type_int64_t_ptr, \
+     int64_t const *: __ARM_mve_type_int64_t_ptr, \
+     int64x2_t: __ARM_mve_type_int64x2_t, \
+     int8_t: __ARM_mve_type_int_n, \
+     int8_t *: __ARM_mve_type_int8_t_ptr, \
+     int8_t const *: __ARM_mve_type_int8_t_ptr, \
+     int8x16_t: __ARM_mve_type_int8x16_t, \
+     int8x16x2_t: __ARM_mve_type_int8x16x2_t, \
+     int8x16x4_t: __ARM_mve_type_int8x16x4_t, \
+     uint16_t: __ARM_mve_type_int_n, \
+     uint16_t *: __ARM_mve_type_uint16_t_ptr, \
+     uint16_t const *: __ARM_mve_type_uint16_t_ptr, \
+     uint16x8_t: __ARM_mve_type_uint16x8_t, \
+     uint16x8x2_t: __ARM_mve_type_uint16x8x2_t, \
+     uint16x8x4_t: __ARM_mve_type_uint16x8x4_t, \
+     uint32_t: __ARM_mve_type_int_n, \
+     uint32_t *: __ARM_mve_type_uint32_t_ptr, \
+     uint32_t const *: __ARM_mve_type_uint32_t_ptr, \
+     uint32x4_t: __ARM_mve_type_uint32x4_t, \
+     uint32x4x2_t: __ARM_mve_type_uint32x4x2_t, \
+     uint32x4x4_t: __ARM_mve_type_uint32x4x4_t, \
+     uint64_t: __ARM_mve_type_int_n, \
+     uint64_t *: __ARM_mve_type_uint64_t_ptr, \
+     uint64_t const *: __ARM_mve_type_uint64_t_ptr, \
+     uint64x2_t: __ARM_mve_type_uint64x2_t, \
+     uint8_t: __ARM_mve_type_int_n, \
+     uint8_t *: __ARM_mve_type_uint8_t_ptr, \
+     uint8_t const *: __ARM_mve_type_uint8_t_ptr, \
+     uint8x16_t: __ARM_mve_type_uint8x16_t, \
+     uint8x16x2_t: __ARM_mve_type_uint8x16x2_t, \
+     uint8x16x4_t: __ARM_mve_type_uint8x16x4_t, \
+     default: _Generic(x, \
+ 	signed char: __ARM_mve_type_int_n, \
+ 	short: __ARM_mve_type_int_n, \
+ 	int: __ARM_mve_type_int_n, \
+ 	long: __ARM_mve_type_int_n, \
+ 	long long: __ARM_mve_type_int_n, \
+ 	unsigned char: __ARM_mve_type_int_n, \
+ 	unsigned short: __ARM_mve_type_int_n, \
+ 	unsigned int: __ARM_mve_type_int_n, \
+ 	unsigned long: __ARM_mve_type_int_n, \
+ 	unsigned long long: __ARM_mve_type_int_n, \
+ 	default: __ARM_mve_unsupported_type))
+ #endif /* MVE Floating point.  */
+ 
+ extern void *__ARM_undef;
+ #define __ARM_mve_coerce(param, type) \
+     _Generic(param, type: param, default: *(type *)__ARM_undef)
+ #define __ARM_mve_coerce1(param, type) \
+     _Generic(param, type: param, const type: param, default: *(type *)__ARM_undef)
+ 
+ #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point.  */
+ 
+ #define __arm_vst4q(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce(__p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce(__p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce(__p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce(__p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x4_t]: __arm_vst4q_f16 (__ARM_mve_coerce(__p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x4_t)), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x4_t]: __arm_vst4q_f32 (__ARM_mve_coerce(__p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x4_t)));})
+ 
+ #define __arm_vrndxq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndxq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndxq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vrndq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vrndpq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndpq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndpq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vrndnq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndnq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndnq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vrndmq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndmq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndmq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vrndaq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndaq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndaq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vrev64q(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev64q_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrev64q_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vrev64q_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrev64q_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrev64q_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vrev64q_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrev64q_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrev64q_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vnegq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vnegq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vnegq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vnegq_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vnegq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vnegq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vdupq_n(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vdupq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vdupq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vabsq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vabsq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vabsq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vabsq_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vabsq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vabsq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vrev32q(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev32q_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrev32q_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrev32q_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrev32q_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrev32q_f16 (__ARM_mve_coerce(__p0, float16x8_t)));})
+ 
+ #define __arm_vcvtbq_f32(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vcvtbq_f32_f16 (__ARM_mve_coerce(__p0, float16x8_t)));})
+ 
+ #define __arm_vcvttq_f32(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vcvttq_f32_f16 (__ARM_mve_coerce(__p0, float16x8_t)));})
+ 
+ #define __arm_vrev16q(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev16q_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrev16q_u8 (__ARM_mve_coerce(__p0, uint8x16_t)));})
+ 
+ #define __arm_vqabsq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqabsq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqabsq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqabsq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
+ 
+ #define __arm_vqnegq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqnegq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqnegq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqnegq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
+ 
+ #define __arm_vmvnq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vmvnq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vmvnq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vmvnq_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vmvnq_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vmvnq_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vmvnq_u32 (__ARM_mve_coerce(__p0, uint32x4_t)));})
+ 
+ #define __arm_vmovlbq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vmovlbq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vmovlbq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vmovlbq_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vmovlbq_u16 (__ARM_mve_coerce(__p0, uint16x8_t)));})
+ 
+ #define __arm_vmovltq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vmovltq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vmovltq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vmovltq_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vmovltq_u16 (__ARM_mve_coerce(__p0, uint16x8_t)));})
+ 
+ #define __arm_vclzq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vclzq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vclzq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vclzq_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vclzq_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vclzq_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vclzq_u32 (__ARM_mve_coerce(__p0, uint32x4_t)));})
+ 
+ #define __arm_vclsq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vclsq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vclsq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vclsq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
+ 
+ #define __arm_vcvtq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vcvtq_f16_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vcvtq_f32_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vcvtq_f16_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vcvtq_f32_u32 (__ARM_mve_coerce(__p0, uint32x4_t)));})
+ 
+ #define __arm_vshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vshrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshrq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshrq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vcvtq_n(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vcvtq_n_f16_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vcvtq_n_f32_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vcvtq_n_f16_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vcvtq_n_f32_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vorrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vorrq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vorrq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vorrq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vorrq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vorrq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vabdq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vabdq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vabdq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vabdq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vabdq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vabdq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vabdq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vabdq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vabdq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_f16 (__ARM_mve_coerce(p0, float16x8_t), __ARM_mve_coerce(p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_f32 (__ARM_mve_coerce(p0, float32x4_t), __ARM_mve_coerce(p1, float32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t)));})
+ 
+ #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vandq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vandq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vandq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vandq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vandq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vandq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vandq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vandq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), (const int16_t) __p1), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), (const int32_t) __p1), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (const uint16_t) __p1), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (const uint32_t) __p1), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbicq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbicq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbicq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vbicq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vbicq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vornq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vornq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vornq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vornq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vornq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vornq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vornq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vornq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vornq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vcaddq_rot270(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcaddq_rot270_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcaddq_rot270_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcaddq_rot270_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcaddq_rot270_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcaddq_rot270_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcaddq_rot270_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcaddq_rot270_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcaddq_rot270_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vcmpeqq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpeqq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpeqq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpeqq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpeqq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpeqq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vcaddq_rot90(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcaddq_rot90_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcaddq_rot90_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcaddq_rot90_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcaddq_rot90_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcaddq_rot90_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcaddq_rot90_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcaddq_rot90_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcaddq_rot90_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vcmpeqq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpeqq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpeqq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpeqq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpeqq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpeqq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t), p2));})
+ 
+ #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t)));})
+ 
+ #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t)));})
+ 
+ #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t)));})
+ 
+ #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpneq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpneq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpneq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vcmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmulq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmulq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vcmulq_rot180(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmulq_rot180_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmulq_rot180_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vcmulq_rot270(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmulq_rot270_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmulq_rot270_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vcmulq_rot90(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmulq_rot90_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmulq_rot90_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_veorq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_veorq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_veorq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_veorq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_veorq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_veorq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_veorq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_veorq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_veorq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vmaxnmaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmaxnmaq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmaxnmaq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vmaxnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vmaxnmq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmaxnmq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmaxnmq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vminnmaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vminnmaq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vminnmaq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vminnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vbrsrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vbrsrq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vbrsrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vbrsrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vbrsrq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vbrsrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbrsrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1), \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vbrsrq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), p1), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vbrsrq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), p1));})
+ 
+ #define __arm_vminnmq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vminnmq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vminnmq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vminnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlq_r_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlq_r_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlq_r_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlq_r_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlq_r_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlq_r_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vshlq_n(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vshlltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlltq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlltq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1));})
+ 
+ #define __arm_vshllbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshllbq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshllbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshllbq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshllbq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1));})
+ 
+ #define __arm_vrshrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrshrq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrshrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vrshrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrshrq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrshrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vrshrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vrshrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrshrq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrshrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vrshrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrshrq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrshrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vrshrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vrmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrmulhq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vrmulhq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmulhq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vrhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrhaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vrhaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrhaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vqsubq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vqsubq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vqsubq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vqshluq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqshluq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqshluq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqshluq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1));})
+ 
+ #define __arm_vqshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vqshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqshlq_r_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqshlq_r_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqshlq_r_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vqshlq_r_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vqshlq_r_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vqshlq_r_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vqshlq_n(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vqshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vqshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vqshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vqrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
+ 
+ #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
+ 
+ #define __arm_vmlaldavxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vqmovuntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovuntq_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovuntq_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vqmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovntq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovntq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovntq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovntq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vqmovnbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovnbq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovnbq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovnbq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovnbq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vqmovunbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovunbq_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovunbq_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vqaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vqaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vqaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmulltq_poly(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulltq_poly_p8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulltq_poly_p16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)));})
+ 
+ #define __arm_vmullbq_poly(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmullbq_poly_p8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmullbq_poly_p16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)));})
+ 
+ #define __arm_vmulltq_int(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulltq_int_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulltq_int_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulltq_int_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulltq_int_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulltq_int_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulltq_int_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vhcaddq_rot270(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhcaddq_rot270_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhcaddq_rot270_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhcaddq_rot270_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vhcaddq_rot90(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhcaddq_rot90_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhcaddq_rot90_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhcaddq_rot90_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhsubq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhsubq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhsubq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vminq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vminq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vminq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vminq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vminq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vminq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vminq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vminaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vminaq_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vminaq_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vminaq_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vmaxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmaxq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmaxq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmaxq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmaxq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmaxaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmaxaq_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxaq_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxaq_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovntq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovntq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovntq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovntq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmovnbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovnbq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovnbq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovnbq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovnbq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulhq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulhq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulhq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmullbq_int(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmullbq_int_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmullbq_int_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmullbq_int_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmullbq_int_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmullbq_int_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmullbq_int_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vbicq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vbicq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vbicq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vbicq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbicq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
+ 
+ #define __arm_vqrshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqrshrnbq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqrshrnbq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqrshrnbq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqrshrnbq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vqrshrunbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqrshrunbq_n_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqrshrunbq_n_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vshlcq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlcq_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlcq_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlcq_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlcq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlcq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlcq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
+ 
+ #define __arm_vclsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vclsq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vclsq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vclsq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vclzq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vclzq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vclzq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vclzq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vclzq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vclzq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vclzq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vmaxaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmaxaq_m_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxaq_m_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxaq_m_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vminaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vminaq_m_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vminaq_m_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vminaq_m_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vmlaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
+ 
+ #define __arm_vsriq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsriq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsriq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsriq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsriq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsriq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsriq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vsliq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsliq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsliq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsliq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsliq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsliq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsliq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vshlq_m_r(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlq_m_r_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlq_m_r_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlq_m_r_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlq_m_r_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlq_m_r_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlq_m_r_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
+ 
+ #define __arm_vrshlq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrshlq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrshlq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vrshlq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrshlq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrshlq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vrshlq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __p1, p2));})
+ 
+ #define __arm_vqshlq_m_r(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqshlq_m_r_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqshlq_m_r_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqshlq_m_r_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vqshlq_m_r_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vqshlq_m_r_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vqshlq_m_r_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
+ 
+ #define __arm_vqrshlq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqrshlq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqrshlq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqrshlq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vqrshlq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vqrshlq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vqrshlq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
+ 
+ #define __arm_vqrdmlsdhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmlsdhxq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmlsdhxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmlsdhxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vqrdmlsdhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmlsdhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmlsdhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmlsdhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vqrdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
+ 
+ #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
+ 
+ #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
+ 
+ #define __arm_vqdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
+ 
+ #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmladhxq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmladhxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmladhxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vqrdmladhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmladhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmladhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmladhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vqnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqnegq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqnegq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqnegq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vqdmlsdhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmlsdhxq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmlsdhxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmlsdhxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vqdmlsdhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmlsdhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmlsdhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmlsdhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vqdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmladhxq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmladhxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmladhxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vqdmladhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmladhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmladhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmladhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vmovlbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int8x16_t]: __arm_vmovlbq_m_s8 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t]: __arm_vmovlbq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vmovlbq_m_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vmovlbq_m_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
+ 
+ #define __arm_vmovnbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovnbq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovnbq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovnbq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovnbq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vmovntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovntq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovntq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovntq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovntq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vmovltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int8x16_t]: __arm_vmovltq_m_s8 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t]: __arm_vmovltq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vmovltq_m_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vmovltq_m_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
+ 
+ #define __arm_vshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vshrnbq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vshrnbq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vshrnbq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vshrnbq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vcvtaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtaq_m_s16_f16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtaq_m_s32_f32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtaq_m_u16_f16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtaq_m_u32_f32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vcvtq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcvtq_m_f16_s16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcvtq_m_f32_s32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcvtq_m_f16_u16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcvtq_m_f32_u32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtq_m_s16_f16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtq_m_s32_f32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtq_m_u16_f16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtq_m_u32_f32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vcvtq_m_n(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtq_m_n_s16_f16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtq_m_n_s32_f32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtq_m_n_u16_f16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtq_m_n_u32_f32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcvtq_m_n_f16_s16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcvtq_m_n_f32_s32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcvtq_m_n_f16_u16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcvtq_m_n_f32_u32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vabsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vabsq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vabsq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vabsq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vabsq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vabsq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vcmlaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmlaq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmlaq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t)));})
+ 
+ #define __arm_vcmlaq_rot180(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmlaq_rot180_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmlaq_rot180_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t)));})
+ 
+ #define __arm_vcmlaq_rot270(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmlaq_rot270_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmlaq_rot270_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t)));})
+ 
+ #define __arm_vcmlaq_rot90(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmlaq_rot90_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmlaq_rot90_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t)));})
+ 
+ #define __arm_vrndxq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrndxq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vrndxq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vrndq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrndq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vrndq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vrndpq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrndpq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vrndpq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vcmpgtq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vcmpleq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t), p2));})
+ 
+ #define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t), p2));})
+ 
+ #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpneq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpneq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpneq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t), p2));})
+ 
+ #define __arm_vcvtbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float16x8_t]: __arm_vcvtbq_m_f32_f16 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float32x4_t]: __arm_vcvtbq_m_f16_f32 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vcvttq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float16x8_t]: __arm_vcvttq_m_f32_f16 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float32x4_t]: __arm_vcvttq_m_f16_f32 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vcvtmq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtmq_m_s16_f16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtmq_m_s32_f32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtmq_m_u16_f16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtmq_m_u32_f32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vcvtnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtnq_m_s16_f16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtnq_m_s32_f32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtnq_m_u16_f16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtnq_m_u32_f32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vcvtpq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtpq_m_s16_f16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtpq_m_s32_f32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtpq_m_u16_f16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtpq_m_u32_f32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vdupq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), (int8_t) __p1, p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), (int16_t) __p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), (int32_t) __p1, p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint8_t) __p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint16_t) __p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vdupq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), (float16_t) __p1, p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vdupq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), (float32_t) __p1, p2));})
+ 
+ #define __arm_vfmaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t)));})
+ 
+ #define __arm_vfmsq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmsq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmsq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t)));})
+ 
+ #define __arm_vfmasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32_t)));})
+ 
+ #define __arm_vmaxnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmaxnmaq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmaxnmaq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vmaxnmavq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vmaxnmvq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vmaxnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_p_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_p_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vmaxnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_p_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_p_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vminnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vminnmaq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vminnmaq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vminnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_p_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_p_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vminnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_p_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_p_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vrndnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrndnq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vrndnq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __p2));})
+ 
+ #define __arm_vrndaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrndaq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vrndaq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vrndmq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrndmq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vrndmq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vrev64q_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrev64q_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrev64q_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrev64q_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrev64q_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vrev64q_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrev64q_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrev64q_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vrev64q_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vrev32q_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrev32q_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrev32q_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrev32q_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vrev32q_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrev32q_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2));})
+ 
+ #define __arm_vpselq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vpselq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vpselq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vpselq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int64x2_t]: __arm_vpselq_s64 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int64x2_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vpselq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vpselq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vpselq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint64x2_t][__ARM_mve_type_uint64x2_t]: __arm_vpselq_u64 (__ARM_mve_coerce(__p0, uint64x2_t), __ARM_mve_coerce(__p1, uint64x2_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vpselq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vpselq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vcmpgeq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t)), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t)));})
+ 
+ #define __arm_vrshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vrshrnbq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vrshrnbq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vrshrnbq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vrshrnbq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vrev16q_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrev16q_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrev16q_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2));})
+ 
+ #define __arm_vqshruntq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqshruntq_n_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqshruntq_n_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vqshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqshrnbq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqshrnbq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqshrnbq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqshrnbq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vqshrntq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqshrntq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqshrntq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqshrntq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqshrntq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vqrshruntq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqrshruntq_n_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqrshruntq_n_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vqmovnbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovnbq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovnbq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovnbq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovnbq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vqmovntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovntq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovntq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovntq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovntq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vqmovunbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovunbq_m_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovunbq_m_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vqmovuntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovuntq_m_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovuntq_m_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vqrshrntq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqrshrntq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqrshrntq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqrshrntq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqrshrntq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vqrshruntq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqrshruntq_n_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqrshruntq_n_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vnegq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vnegq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vnegq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vnegq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vnegq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vcmpgeq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vabdq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vabdq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vabdq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vabdq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vabdq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vabdq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vabdq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vabdq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vabdq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vaddq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32_t), p3));})
+ 
+ #define __arm_vandq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vandq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vandq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vandq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vandq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vandq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vandq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vandq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vandq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vbicq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbicq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbicq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbicq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vbicq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vbicq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vbrsrq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbrsrq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbrsrq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbrsrq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbrsrq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbrsrq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbrsrq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vbrsrq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vbrsrq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2, p3));})
+ 
+ #define __arm_vcaddq_rot270_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcaddq_rot270_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcaddq_rot270_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcaddq_rot270_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcaddq_rot270_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcaddq_rot270_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcaddq_rot270_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcaddq_rot270_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcaddq_rot270_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcaddq_rot90_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcaddq_rot90_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcaddq_rot90_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcaddq_rot90_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcaddq_rot90_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcaddq_rot90_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcaddq_rot90_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcaddq_rot90_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcaddq_rot90_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcmlaq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmlaq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmlaq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcmlaq_rot180_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmlaq_rot180_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmlaq_rot180_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcmlaq_rot270_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmlaq_rot270_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmlaq_rot270_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcmlaq_rot90_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmlaq_rot90_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmlaq_rot90_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcmulq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmulq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmulq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcmulq_rot180_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmulq_rot180_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmulq_rot180_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcmulq_rot270_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmulq_rot270_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmulq_rot270_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcmulq_rot90_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)] [__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmulq_rot90_m_f16(__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmulq_rot90_m_f32(__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_veorq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_veorq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_veorq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_veorq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_veorq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_veorq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_veorq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_veorq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_veorq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vfmaq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32_t), p3));})
+ 
+ #define __arm_vfmasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32_t), p3));})
+ 
+ #define __arm_vfmsq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmsq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmsq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vmaxnmq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmaxnmq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmaxnmq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vminnmq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vminnmq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vminnmq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vmulq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32_t), p3));})
+ 
+ #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vornq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vornq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vornq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vornq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vornq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vornq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vornq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vornq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vsubq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32_t), p3));})
+ 
+ #define __arm_vorrq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vorrq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vorrq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vorrq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vorrq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vorrq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vld1q(p0) (\
+   _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce(p0, int8_t const *)), \
+   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce(p0, int16_t const *)), \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce(p0, int32_t const *)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce(p0, uint8_t const *)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce(p0, uint16_t const *)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce(p0, uint32_t const *)), \
+   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_f16 (__ARM_mve_coerce(p0, float16_t const *)), \
+   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_f32 (__ARM_mve_coerce(p0, float32_t const *))))
+ 
+ #define __arm_vld1q_z(p0,p1) ( \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce(p0, int8_t const *), p1), \
+   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce(p0, int16_t const *), p1), \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce(p0, int32_t const *), p1), \
+   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce(p0, uint8_t const *), p1), \
+   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce(p0, uint16_t const *), p1), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce(p0, uint32_t const *), p1), \
+   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_z_f16 (__ARM_mve_coerce(p0, float16_t const *), p1), \
+   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_z_f32 (__ARM_mve_coerce(p0, float32_t const *), p1)))
+ 
+ #define __arm_vld2q(p0) ( \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce(p0, int8_t const *)), \
+   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce(p0, int16_t const *)), \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce(p0, int32_t const *)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce(p0, uint8_t const *)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce(p0, uint16_t const *)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce(p0, uint32_t const *)), \
+   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld2q_f16 (__ARM_mve_coerce(p0, float16_t const *)), \
+   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld2q_f32 (__ARM_mve_coerce(p0, float32_t const *))))
+ 
+ #define __arm_vld4q(p0) ( \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce(p0, int8_t const *)), \
+   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce(p0, int16_t const *)), \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce(p0, int32_t const *)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce(p0, uint8_t const *)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce(p0, uint16_t const *)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce(p0, uint32_t const *)), \
+   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld4q_f16 (__ARM_mve_coerce(p0, float16_t const *)), \
+   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld4q_f32 (__ARM_mve_coerce(p0, float32_t const *))))
+ 
+ #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));})
+ 
+ #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
+ 
+ #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));})
+ 
+ #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
+ 
+ #define __arm_vldrwq_gather_offset(p0,p1) ( \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \
+   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_f32 (__ARM_mve_coerce1(p0, float32_t *), p1)))
+ 
+ #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ( \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1, p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1, p2), \
+   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1, p2)))
+ 
+ #define __arm_vldrwq_gather_shifted_offset(p0,p1) ( \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \
+   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_f32 (__ARM_mve_coerce1(p0, float32_t *), p1)))
+ 
+ #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ( \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1, p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1, p2), \
+   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1, p2)))
+ 
+ #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_p_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x2_t]: __arm_vst2q_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x2_t)), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x2_t]: __arm_vst2q_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x2_t)));})
+ 
+ #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)));})
+ 
+ #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2));})
+ 
+ #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
+ 
+ #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
+ 
+ #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
+ 
+ #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
+ 
+ #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_p_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));})
+ 
+ #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
+ 
+ #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
+ 
+ #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
+ 
+ #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
+ 
+ #define __arm_vstrwq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_s32 (p0, p1, __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_u32 (p0, p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_base_f32 (p0, p1, __ARM_mve_coerce(__p2, float32x4_t)));})
+ 
+ #define __arm_vstrwq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_p_s32(p0, p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_p_u32(p0, p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_base_p_f32(p0, p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));})
+ 
+ #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_p_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_p_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));})
+ 
+ #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));})
+ 
+ #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));})
+ 
+ #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vuninitializedq_s8 (), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vuninitializedq_s16 (), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vuninitializedq_s32 (), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vuninitializedq_s64 (), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vuninitializedq_u8 (), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vuninitializedq_u16 (), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vuninitializedq_u32 (), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vuninitializedq_u64 (), \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vuninitializedq_f16 (), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vuninitializedq_f32 ());})
+ 
+ #define __arm_vreinterpretq_f16(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_f16_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_f16_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_f16_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_f16_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_f16_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_f16_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_f16_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_f16_u64 (__ARM_mve_coerce(__p0, uint64x2_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vreinterpretq_f16_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vreinterpretq_f32(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_f32_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_f32_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_f32_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_f32_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_f32_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_f32_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_f32_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_f32_u64 (__ARM_mve_coerce(__p0, uint64x2_t)), \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vreinterpretq_f32_f16 (__ARM_mve_coerce(__p0, float16x8_t)));})
+ 
+ #define __arm_vreinterpretq_s16(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vreinterpretq_s16_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_s16_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_s16_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_s16_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_s16_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_s16_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_s16_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_s16_u64 (__ARM_mve_coerce(__p0, uint64x2_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vreinterpretq_s16_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vreinterpretq_s32(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vreinterpretq_s32_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_s32_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_s32_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_s32_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_s32_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_s32_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_s32_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_s32_u64 (__ARM_mve_coerce(__p0, uint64x2_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vreinterpretq_s32_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vreinterpretq_s64(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vreinterpretq_s64_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_s64_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_s64_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_s64_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_s64_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_s64_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_s64_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_s64_u64 (__ARM_mve_coerce(__p0, uint64x2_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vreinterpretq_s64_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vreinterpretq_s8(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vreinterpretq_s8_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_s8_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_s8_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_s8_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_s8_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_s8_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_s8_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_s8_u64 (__ARM_mve_coerce(__p0, uint64x2_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vreinterpretq_s8_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vreinterpretq_u16(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vreinterpretq_u16_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_u16_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_u16_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_u16_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_u16_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_u16_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_u16_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_u16_u64 (__ARM_mve_coerce(__p0, uint64x2_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vreinterpretq_u16_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vreinterpretq_u32(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vreinterpretq_u32_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_u32_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_u32_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_u32_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_u32_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_u32_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_u32_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_u32_u64 (__ARM_mve_coerce(__p0, uint64x2_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vreinterpretq_u32_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vreinterpretq_u64(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vreinterpretq_u64_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_u64_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_u64_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_u64_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_u64_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_u64_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_u64_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_u64_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vreinterpretq_u64_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vreinterpretq_u8(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vreinterpretq_u8_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_u8_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_u8_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_u8_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_u8_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_u8_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_u8_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_u8_u64 (__ARM_mve_coerce(__p0, uint64x2_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vreinterpretq_u8_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
+ 
+ #define __arm_vstrwq_scatter_base_wb(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_wb_s32 (p0, p1, __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_wb_u32 (p0, p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_base_wb_f32 (p0, p1, __ARM_mve_coerce(__p2, float32x4_t)));})
+ 
+ #define __arm_vstrwq_scatter_base_wb_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_wb_p_s32 (p0, p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_wb_p_u32 (p0, p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_base_wb_p_f32 (p0, p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vabdq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vabdq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vabdq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vabdq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vabdq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vabdq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vabdq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vabdq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vabdq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vabsq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vabsq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vabsq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vabsq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vabsq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vabsq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vaddq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32_t), p3));})
+ 
+ #define __arm_vandq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vandq_x_s8  (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vandq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vandq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vandq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vandq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vandq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vandq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vandq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vbicq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_x_s8   (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_x_s16  (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_x_s32  (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbicq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbicq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbicq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vbicq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vbicq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vbrsrq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vbrsrq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vbrsrq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vbrsrq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vbrsrq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vbrsrq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbrsrq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vbrsrq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vbrsrq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2, p3));})
+ 
+ #define __arm_vcaddq_rot270_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcaddq_rot270_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcaddq_rot270_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcaddq_rot270_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcaddq_rot270_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcaddq_rot270_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcaddq_rot270_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcaddq_rot270_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcaddq_rot270_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcaddq_rot90_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcaddq_rot90_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcaddq_rot90_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcaddq_rot90_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcaddq_rot90_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcaddq_rot90_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcaddq_rot90_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcaddq_rot90_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcaddq_rot90_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcmulq_rot180_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmulq_rot180_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmulq_rot180_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcmulq_rot270_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmulq_rot270_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmulq_rot270_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcmulq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmulq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmulq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vcvtq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vcvtq_x_f16_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vcvtq_x_f32_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vcvtq_x_f16_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vcvtq_x_f32_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vcvtq_x_n(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vcvtq_x_n_f16_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vcvtq_x_n_f32_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vcvtq_x_n_f16_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vcvtq_x_n_f32_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_veorq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_veorq_x_s8(__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_veorq_x_s16(__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_veorq_x_s32(__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_veorq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_veorq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_veorq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_veorq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_veorq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vmaxnmq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmaxnmq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmaxnmq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vminnmq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vminnmq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vminnmq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vmulq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32_t), p3));})
+ 
+ #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vnegq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vnegq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vnegq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vnegq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vnegq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vornq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vornq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vornq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vornq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vornq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vornq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vornq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vornq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vornq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vorrq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vorrq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vorrq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vorrq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vorrq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vorrq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vrev32q_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev32q_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrev32q_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrev32q_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrev32q_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrev32q_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2));})
+ 
+ #define __arm_vrev64q_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev64q_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrev64q_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vrev64q_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrev64q_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrev64q_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vrev64q_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrev64q_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrev64q_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vrndaq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndaq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndaq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vrndmq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndmq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndmq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vrndnq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndnq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndnq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vrndpq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndpq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndpq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vrndq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vrndxq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndxq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndxq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #define __arm_vsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32_t), p3));})
+ 
+ #define __arm_vcmulq_rot90_x(p1,p2,p3)  ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmulq_rot90_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
+   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmulq_rot90_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
+ 
+ #define __arm_vgetq_lane(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vgetq_lane_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vgetq_lane_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vgetq_lane_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vgetq_lane_s64 (__ARM_mve_coerce(__p0, int64x2_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vgetq_lane_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vgetq_lane_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vgetq_lane_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vgetq_lane_u64 (__ARM_mve_coerce(__p0, uint64x2_t), p1), \
+   int (*)[__ARM_mve_type_float16x8_t]: __arm_vgetq_lane_f16 (__ARM_mve_coerce(__p0, float16x8_t), p1), \
+   int (*)[__ARM_mve_type_float32x4_t]: __arm_vgetq_lane_f32 (__ARM_mve_coerce(__p0, float32x4_t), p1));})
+ 
+ #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int64x2_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint64x2_t), p2), \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vsetq_lane_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
+   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vsetq_lane_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+ 
+ #else /* MVE Integer.  */
+ 
+ #define __arm_vstrwq_scatter_base_wb(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_wb_s32 (p0, p1, __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_wb_u32 (p0, p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vstrwq_scatter_base_wb_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_wb_p_s32 (p0, p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_wb_p_u32 (p0, p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vst4q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)));})
+ 
+ #define __arm_vabsq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vabsq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vabsq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vabsq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
+ 
+ #define __arm_vclsq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vclsq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vclsq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vclsq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
+ 
+ #define __arm_vclzq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vclzq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vclzq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vclzq_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vclzq_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vclzq_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vclzq_u32 (__ARM_mve_coerce(__p0, uint32x4_t)));})
+ 
+ #define __arm_vnegq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vnegq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vnegq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vnegq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
+ 
+ #define __arm_vmovlbq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vmovlbq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vmovlbq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vmovlbq_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vmovlbq_u16 (__ARM_mve_coerce(__p0, uint16x8_t)));})
+ 
+ #define __arm_vmovltq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vmovltq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vmovltq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vmovltq_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vmovltq_u16 (__ARM_mve_coerce(__p0, uint16x8_t)));})
+ 
+ #define __arm_vmvnq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vmvnq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vmvnq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vmvnq_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vmvnq_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vmvnq_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vmvnq_u32 (__ARM_mve_coerce(__p0, uint32x4_t)));})
+ 
+ #define __arm_vrev16q(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev16q_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrev16q_u8 (__ARM_mve_coerce(__p0, uint8x16_t)));})
+ 
+ #define __arm_vrev32q(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev32q_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrev32q_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrev32q_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrev32q_u16 (__ARM_mve_coerce(__p0, uint16x8_t)));})
+ 
+ #define __arm_vrev64q(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev64q_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrev64q_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vrev64q_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrev64q_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrev64q_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vrev64q_u32 (__ARM_mve_coerce(__p0, uint32x4_t)));})
+ 
+ #define __arm_vqabsq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqabsq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqabsq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqabsq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
+ 
+ #define __arm_vqnegq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqnegq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqnegq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqnegq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
+ 
+ #define __arm_vshrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshrq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshrq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpneq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
+ 
+ #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlq_r_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlq_r_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlq_r_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlq_r_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlq_r_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlq_r_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vrmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrmulhq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vrmulhq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmulhq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vrhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrhaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vrhaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrhaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vqsubq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vqsubq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vqsubq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vqshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vqshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqshlq_r_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqshlq_r_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqshlq_r_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vqshlq_r_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vqshlq_r_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vqshlq_r_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vqshluq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqshluq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqshluq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqshluq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1));})
+ 
+ #define __arm_vrshrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrshrq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrshrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vrshrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrshrq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrshrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vrshrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vshlq_n(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vqshlq_n(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vqshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vqshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vqshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vqrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
+ 
+ #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
+ 
+ #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vqaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vqaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vqaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vorrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vorrq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vorrq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vorrq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vornq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vornq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vornq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vornq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vornq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vornq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vornq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmulltq_int(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulltq_int_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulltq_int_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulltq_int_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulltq_int_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulltq_int_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulltq_int_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmullbq_int(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmullbq_int_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmullbq_int_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmullbq_int_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmullbq_int_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmullbq_int_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmullbq_int_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulhq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulhq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulhq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vminq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vminq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vminq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vminq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vminq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vminq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vminq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vminaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vminaq_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vminaq_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vminaq_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vmaxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmaxq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmaxq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmaxq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmaxq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmaxaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmaxaq_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxaq_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxaq_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhsubq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhsubq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhsubq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vhcaddq_rot90(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhcaddq_rot90_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhcaddq_rot90_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhcaddq_rot90_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vhcaddq_rot270(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhcaddq_rot270_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhcaddq_rot270_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhcaddq_rot270_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_veorq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_veorq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_veorq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_veorq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_veorq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_veorq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_veorq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vcaddq_rot90(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcaddq_rot90_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcaddq_rot90_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcaddq_rot90_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcaddq_rot90_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcaddq_rot90_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcaddq_rot90_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vcaddq_rot270(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcaddq_rot270_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcaddq_rot270_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcaddq_rot270_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcaddq_rot270_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcaddq_rot270_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcaddq_rot270_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vbrsrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vbrsrq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vbrsrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vbrsrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vbrsrq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vbrsrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbrsrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), (const int16_t) __p1), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), (const int32_t) __p1), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (const uint16_t) __p1), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (const uint32_t) __p1), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbicq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbicq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbicq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
+ 
+ #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vandq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vandq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vandq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vandq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vandq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vandq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vabdq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vabdq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vabdq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vabdq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vabdq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vabdq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vabdq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vcmpeqq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpeqq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpeqq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpeqq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
+ 
+ #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpneq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
+ 
+ 
+ #define __arm_vqmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovntq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovntq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovntq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovntq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vqmovnbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovnbq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovnbq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovnbq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovnbq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmulltq_poly(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulltq_poly_p8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulltq_poly_p16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)));})
+ 
+ #define __arm_vmullbq_poly(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmullbq_poly_p8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmullbq_poly_p16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)));})
+ 
+ #define __arm_vmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovntq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovntq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovntq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovntq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmovnbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovnbq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovnbq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovnbq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovnbq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmlaldavxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vqmovuntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovuntq_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovuntq_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vshlltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlltq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlltq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1));})
+ 
+ #define __arm_vshllbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshllbq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshllbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshllbq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshllbq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1));})
+ 
+ #define __arm_vqmovunbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovunbq_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovunbq_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vcmpgeq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
+ 
+ #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
+ 
+ #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
+ 
+ #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
+ 
+ #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpneq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpneq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
+ 
+ #define __arm_vshlcq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlcq_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlcq_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlcq_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlcq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlcq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlcq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
+ 
+ #define __arm_vcmpeqq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpeqq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpeqq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpeqq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2));})
+ 
+ #define __arm_vbicq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vbicq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vbicq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vbicq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbicq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
+ 
+ #define __arm_vqrshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqrshrnbq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqrshrnbq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqrshrnbq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqrshrnbq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vqrshrunbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqrshrunbq_n_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqrshrunbq_n_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vqrdmlsdhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmlsdhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmlsdhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmlsdhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vqrdmlsdhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmlsdhxq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmlsdhxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmlsdhxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vqrshlq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqrshlq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqrshlq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqrshlq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vqrshlq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vqrshlq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vqrshlq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
+ 
+ #define __arm_vqshlq_m_r(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vqshlq_m_r_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vqshlq_m_r_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vqshlq_m_r_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vqshlq_m_r_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vqshlq_m_r_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vqshlq_m_r_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
+ 
+ #define __arm_vrev64q_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrev64q_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrev64q_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrev64q_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrev64q_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vrev64q_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrev64q_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vrshlq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrshlq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrshlq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vrshlq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrshlq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrshlq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vrshlq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __p1, p2));})
+ 
+ #define __arm_vshlq_m_r(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlq_m_r_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlq_m_r_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlq_m_r_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlq_m_r_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlq_m_r_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlq_m_r_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
+ 
+ #define __arm_vsliq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsliq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsliq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsliq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsliq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsliq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsliq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vsriq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsriq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsriq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsriq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsriq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsriq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsriq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vqrdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
+ 
+ #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
+ 
+ #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmladhxq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmladhxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmladhxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vqrdmladhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmladhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmladhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmladhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vqnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqnegq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqnegq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqnegq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vqdmlsdhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmlsdhxq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmlsdhxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmlsdhxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vabsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vabsq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vabsq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vabsq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vclsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vclsq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vclsq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vclsq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vclzq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vclzq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vclzq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vclzq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vclzq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vclzq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vclzq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vcmpgeq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
+ 
+ #define __arm_vdupq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), (int8_t) __p1, p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), (int16_t) __p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), (int32_t) __p1, p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint8_t) __p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint16_t) __p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2));})
+ 
+ #define __arm_vmaxaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmaxaq_m_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxaq_m_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxaq_m_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vmlaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
+ 
+ #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
+ 
+ #define __arm_vnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vnegq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vnegq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vnegq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vpselq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vpselq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vpselq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vpselq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int64x2_t]: __arm_vpselq_s64 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int64x2_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vpselq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vpselq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vpselq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint64x2_t][__ARM_mve_type_uint64x2_t]: __arm_vpselq_u64 (__ARM_mve_coerce(__p0, uint64x2_t), __ARM_mve_coerce(__p1, uint64x2_t), p2));})
+ 
+ #define __arm_vqdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
+ 
+ #define __arm_vqdmlsdhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmlsdhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmlsdhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmlsdhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vqdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmladhxq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmladhxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmladhxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vqdmladhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmladhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmladhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmladhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vminaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vminaq_m_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vminaq_m_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vminaq_m_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vrmlaldavhaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
+ 
+ #define __arm_vmlsdavxq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
+ 
+ #define __arm_vmlsdavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
+ 
+ #define __arm_vmlsdavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vshrntq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vshrntq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vshrntq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vshrntq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vmlsdavaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vrshrntq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vrshrntq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vrshrntq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vrshrntq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vmovlbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int8x16_t]: __arm_vmovlbq_m_s8 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t]: __arm_vmovlbq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vmovlbq_m_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vmovlbq_m_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
+ 
+ #define __arm_vmovnbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovnbq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovnbq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovnbq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovnbq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vmovntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovntq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovntq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovntq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovntq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vshrnbq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vshrnbq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vshrnbq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vshrnbq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vrshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vrshrnbq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vrshrnbq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vrshrnbq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vrshrnbq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vrev32q_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrev32q_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrev32q_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrev32q_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vrev32q_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
+ 
+ #define __arm_vqshruntq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqshruntq_n_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqshruntq_n_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vrev16q_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrev16q_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrev16q_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2));})
+ 
+ #define __arm_vqshrntq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqshrntq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqshrntq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqshrntq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqshrntq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vqrshruntq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqrshruntq_n_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqrshruntq_n_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vqrshrntq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqrshrntq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqrshrntq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqrshrntq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqrshrntq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vqshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqshrnbq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqshrnbq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqshrnbq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqshrnbq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vqmovuntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovuntq_m_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovuntq_m_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vqmovntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovntq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovntq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovntq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovntq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vqmovnbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovnbq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovnbq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovnbq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovnbq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vmovltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int8x16_t]: __arm_vmovltq_m_s8 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t]: __arm_vmovltq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vmovltq_m_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vmovltq_m_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
+ 
+ #define __arm_vqmovunbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovunbq_m_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovunbq_m_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vsubq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vabavq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vabavq_p_s8(__p0, __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vabavq_p_s16(__p0, __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vabavq_p_s32(__p0, __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vabavq_p_u8(__p0, __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vabavq_p_u16(__p0, __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vabavq_p_u32(__p0, __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vabdq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vabdq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vabdq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vabdq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vabdq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vabdq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vabdq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vandq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vandq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vandq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vandq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vandq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vandq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vandq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vbicq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbicq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbicq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbicq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vbrsrq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbrsrq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbrsrq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbrsrq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbrsrq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbrsrq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbrsrq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __p2, p3));})
+ 
+ #define __arm_vcaddq_rot270_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcaddq_rot270_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcaddq_rot270_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcaddq_rot270_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcaddq_rot270_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcaddq_rot270_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcaddq_rot270_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vcaddq_rot90_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcaddq_rot90_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcaddq_rot90_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcaddq_rot90_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcaddq_rot90_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcaddq_rot90_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcaddq_rot90_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_veorq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_veorq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_veorq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_veorq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_veorq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_veorq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_veorq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmladavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vornq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vornq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vornq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vornq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vornq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vornq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vorrq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vorrq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vorrq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vorrq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vaddq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmulq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vstrbq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_s16 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_s32 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_u16 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_u32 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vstrbq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vstrwq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_s32(p0, p1, __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_u32(p0, p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8 (__ARM_mve_coerce(p0, int8_t const *), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16 (__ARM_mve_coerce(p0, int8_t const *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32 (__ARM_mve_coerce(p0, int8_t const *), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8 (__ARM_mve_coerce(p0, uint8_t const *), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16 (__ARM_mve_coerce(p0, uint8_t const *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32 (__ARM_mve_coerce(p0, uint8_t const *), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vstrbq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_p_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_p_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_p_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_p_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_p_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_p_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vstrbq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_p_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_p_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_p_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_p_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_p_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_p_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vstrwq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_p_s32 (p0, p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_p_u32 (p0, p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vld1q(p0) (_Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce(p0, int8_t const *)), \
+   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce(p0, int16_t const *)), \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce(p0, int32_t const *)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce(p0, uint8_t const *)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce(p0, uint16_t const *)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce(p0, uint32_t const *))))
+ 
+ #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vldrwq_gather_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1));})
+ 
+ #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1, p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1, p2));})
+ 
+ #define __arm_vldrwq_gather_shifted_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1));})
+ 
+ #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1, p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1, p2));})
+ 
+ #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)));})
+ 
+ #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ 
+ #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vstrdq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_base_p_s64 (p0, p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_p_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
+ 
+ #define __arm_vstrdq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_base_s64 (p0, p1, __ARM_mve_coerce(__p2, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
+ 
+ #define __arm_vstrdq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_p_s64 (__ARM_mve_coerce(__p0, int64_t *), __p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
+   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_p_u64 (__ARM_mve_coerce(__p0, uint64_t *), __p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
+ 
+ #define __arm_vstrdq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_s64 (__ARM_mve_coerce(__p0, int64_t *), __p1, __ARM_mve_coerce(__p2, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_u64 (__ARM_mve_coerce(__p0, uint64_t *), __p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
+ 
+ #define __arm_vstrdq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_s64 (__ARM_mve_coerce(__p0, int64_t *), __p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
+   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_u64 (__ARM_mve_coerce(__p0, uint64_t *), __p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
+ 
+ #define __arm_vstrdq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_s64 (__ARM_mve_coerce(__p0, int64_t *), __p1, __ARM_mve_coerce(__p2, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_u64 (__ARM_mve_coerce(__p0, uint64_t *), __p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
+ 
+ #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vuninitializedq_s8 (), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vuninitializedq_s16 (), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vuninitializedq_s32 (), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vuninitializedq_s64 (), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vuninitializedq_u8 (), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vuninitializedq_u16 (), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vuninitializedq_u32 (), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vuninitializedq_u64 ());})
+ 
+ #define __arm_vreinterpretq_s16(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_s16_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_s16_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_s16_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_s16_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_s16_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_s16_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_s16_u64 (__ARM_mve_coerce(__p0, uint64x2_t)));})
+ 
+ #define __arm_vreinterpretq_s32(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_s32_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_s32_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_s32_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_s32_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_s32_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_s32_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_s32_u64 (__ARM_mve_coerce(__p0, uint64x2_t)));})
+ 
+ #define __arm_vreinterpretq_s64(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_s64_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_s64_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_s64_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_s64_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_s64_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_s64_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_s64_u64 (__ARM_mve_coerce(__p0, uint64x2_t)));})
+ 
+ #define __arm_vreinterpretq_s8(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_s8_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_s8_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_s8_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_s8_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_s8_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_s8_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_s8_u64 (__ARM_mve_coerce(__p0, uint64x2_t)));})
+ 
+ #define __arm_vreinterpretq_u16(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_u16_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_u16_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_u16_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_u16_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_u16_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_u16_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_u16_u64 (__ARM_mve_coerce(__p0, uint64x2_t)));})
+ 
+ #define __arm_vreinterpretq_u32(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_u32_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_u32_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_u32_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_u32_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_u32_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_u32_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_u32_u64 (__ARM_mve_coerce(__p0, uint64x2_t)));})
+ 
+ #define __arm_vreinterpretq_u64(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_u64_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_u64_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_u64_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vreinterpretq_u64_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_u64_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_u64_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_u64_s64 (__ARM_mve_coerce(__p0, int64x2_t)));})
+ 
+ #define __arm_vreinterpretq_u8(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vreinterpretq_u8_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vreinterpretq_u8_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vreinterpretq_u8_s64 (__ARM_mve_coerce(__p0, int64x2_t)), \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vreinterpretq_u8_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vreinterpretq_u8_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vreinterpretq_u8_u32 (__ARM_mve_coerce(__p0, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vreinterpretq_u8_u64 (__ARM_mve_coerce(__p0, uint64x2_t)));})
+ 
+ #define __arm_vabsq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vabsq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vabsq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vabsq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vaddq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
+ 
+ #define __arm_vcaddq_rot270_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcaddq_rot270_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcaddq_rot270_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcaddq_rot270_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcaddq_rot270_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcaddq_rot270_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcaddq_rot270_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vcaddq_rot90_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcaddq_rot90_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcaddq_rot90_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcaddq_rot90_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcaddq_rot90_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcaddq_rot90_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcaddq_rot90_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_veorq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_veorq_x_s8(__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_veorq_x_s16(__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_veorq_x_s32(__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_veorq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_veorq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_veorq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmaxq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
+ 
+ #define __arm_vminq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vminq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vminq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vminq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vminq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vminq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vminq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmovlbq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vmovlbq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vmovlbq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vmovlbq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vmovlbq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2));})
+ 
+ #define __arm_vmovltq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vmovltq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vmovltq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vmovltq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vmovltq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2));})
+ 
+ #define __arm_vmulhq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulhq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulhq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulhq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulhq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulhq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulhq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmullbq_int_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmullbq_int_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmullbq_int_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmullbq_int_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmullbq_int_x_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmullbq_int_x_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmullbq_int_x_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmullbq_poly_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmullbq_poly_x_p8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmullbq_poly_x_p16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3));})
+ 
+ #define __arm_vmulltq_int_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulltq_int_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulltq_int_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulltq_int_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulltq_int_x_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulltq_int_x_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulltq_int_x_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmulltq_poly_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulltq_poly_x_p8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulltq_poly_x_p16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3));})
+ 
+ #define __arm_vmulq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
+ 
+ #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vnegq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vnegq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vnegq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vornq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vornq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vornq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vornq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vornq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vornq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vornq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vorrq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vorrq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vorrq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vorrq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vrev32q_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev32q_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrev32q_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrev32q_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrev32q_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2));})
+ 
+ #define __arm_vrev64q_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev64q_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrev64q_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vrev64q_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrev64q_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrev64q_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vrev64q_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vabdq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vabdq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vabdq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vabdq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vabdq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vabdq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vabdq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vandq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vandq_x_s8  (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vandq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vandq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vandq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vandq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vandq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vbicq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_x_s8   (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_x_s16  (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_x_s32  (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbicq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbicq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbicq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vbrsrq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vbrsrq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vbrsrq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vbrsrq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vbrsrq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vbrsrq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbrsrq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vld1q_z(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce(p0, int8_t const *), p1), \
+   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce(p0, int16_t const *), p1), \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce(p0, int32_t const *), p1), \
+   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce(p0, uint8_t const *), p1), \
+   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce(p0, uint16_t const *), p1), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce(p0, uint32_t const *), p1)))
+ 
+ #define __arm_vld2q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce(p0, int8_t const *)), \
+   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce(p0, int16_t const *)), \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce(p0, int32_t const *)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce(p0, uint8_t const *)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce(p0, uint16_t const *)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce(p0, uint32_t const *))))
+ 
+ 
+ #define __arm_vld4q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce(p0, int8_t const *)), \
+   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce(p0, int16_t const *)), \
+   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce(p0, int32_t const *)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce(p0, uint8_t const *)), \
+   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce(p0, uint16_t const *)), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce(p0, uint32_t const *))))
+ 
+ #define __arm_vgetq_lane(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vgetq_lane_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vgetq_lane_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vgetq_lane_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vgetq_lane_s64 (__ARM_mve_coerce(__p0, int64x2_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vgetq_lane_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vgetq_lane_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vgetq_lane_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vgetq_lane_u64 (__ARM_mve_coerce(__p0, uint64x2_t), p1));})
+ 
+ #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int64x2_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint64x2_t), p2));})
+ 
+ #endif /* MVE Integer.  */
+ 
+ #define __arm_vshrntq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vshrntq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vshrntq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vshrntq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vshrntq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ 
+ #define __arm_vrshrntq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vrshrntq_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vrshrntq_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vrshrntq_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vrshrntq_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ 
+ #define __arm_vmvnq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vmvnq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vmvnq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vmvnq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vmvnq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vmvnq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vmvnq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vrev16q_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev16q_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrev16q_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2));})
+ 
+ #define __arm_vrhaddq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrhaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrhaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrhaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrhaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vrhaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrhaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vshlq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vshlq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vshlq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vshlq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vshlq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vshlq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vshlq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vrmulhq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrmulhq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrmulhq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmulhq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrmulhq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vrmulhq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmulhq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vrshlq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vrshrq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vrshrq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vrshrq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vrshrq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrshrq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrshrq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vrshrq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vshllbq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshllbq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshllbq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshllbq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshllbq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2, p3));})
+ 
+ #define __arm_vshlltq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlltq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlltq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlltq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlltq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2, p3));})
+ 
+ #define __arm_vshlq_x_n(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vdwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
+ 
+ #define __arm_vdwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
+ 
+ #define __arm_vdwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
+ 
+ #define __arm_viwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
+ 
+ #define __arm_viwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
+ 
+ #define __arm_viwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
+ 
+ #define __arm_vidupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u8 ((uint32_t) __p1, p2, p3), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
+ 
+ #define __arm_vddupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u8 ((uint32_t) __p1, p2, p3), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
+ 
+ #define __arm_vidupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u16 ((uint32_t) __p1, p2, p3), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
+ 
+ #define __arm_vddupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u16 ((uint32_t) __p1, p2, p3), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
+ 
+ #define __arm_vidupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u32 ((uint32_t) __p1, p2, p3), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
+ 
+ #define __arm_vddupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u32 ((uint32_t) __p1, p2, p3), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
+ 
+ #define __arm_vshrq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshrq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshrq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshrq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshrq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshrq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshrq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vhaddq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhaddq_x_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vhcaddq_rot270_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhcaddq_rot270_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhcaddq_rot270_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhcaddq_rot270_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vhcaddq_rot90_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhcaddq_rot90_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhcaddq_rot90_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhcaddq_rot90_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vhsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhsubq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhsubq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhsubq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vclsq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vclsq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vclsq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vclsq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vclzq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vclzq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vclzq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vclzq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vclzq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vclzq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vclzq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vadciq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vadciq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vadciq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vstrdq_scatter_base_wb_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_base_wb_p_s64 (p0, p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_wb_p_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
+ 
+ #define __arm_vstrdq_scatter_base_wb(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_base_wb_s64 (p0, p1, __ARM_mve_coerce(__p2, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_wb_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
+ 
+ #define __arm_vldrdq_gather_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_s64 (__ARM_mve_coerce1(p0, int64_t *), p1), \
+   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1)))
+ 
+ #define __arm_vldrdq_gather_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_z_s64 (__ARM_mve_coerce1(p0, int64_t *), p1, p2), \
+   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_z_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1, p2)))
+ 
+ #define __arm_vldrdq_gather_shifted_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_s64 (__ARM_mve_coerce1(p0, int64_t *), p1), \
+   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1)))
+ 
+ #define __arm_vldrdq_gather_shifted_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
+   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_s64 (__ARM_mve_coerce1(p0, int64_t *), p1, p2), \
+   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1, p2)))
+ 
+ #define __arm_vadciq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vadciq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3, p4), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vadciq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3, p4));})
+ 
+ #define __arm_vadciq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vadciq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vadciq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vadcq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vadcq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3, p4), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vadcq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3, p4));})
+ 
+ #define __arm_vadcq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vadcq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vadcq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vsbciq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsbciq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3, p4), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsbciq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3, p4));})
+ 
+ #define __arm_vsbciq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsbciq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsbciq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vsbcq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsbcq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3, p4), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsbcq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3, p4));})
+ 
+ #define __arm_vsbcq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsbcq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsbcq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vldrbq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_s8 (__ARM_mve_coerce(p0, int8_t const *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_s16 (__ARM_mve_coerce(p0, int8_t const *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_s32 (__ARM_mve_coerce(p0, int8_t const *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_u8 (__ARM_mve_coerce(p0, uint8_t const *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_u16 (__ARM_mve_coerce(p0, uint8_t const *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_u32 (__ARM_mve_coerce(p0, uint8_t const *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vqrdmlahq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
+ 
+ #define __arm_vqrdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
+ 
+ #define __arm_vqrshlq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vqshlq_m_n(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqshlq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t),  p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqshlq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t),  p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqshlq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vqshlq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vqshlq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vqshlq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t),  p2, p3));})
+ 
+ #define __arm_vqshlq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqshlq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqshlq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqshlq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqshlq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqshlq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqshlq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vrhaddq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrhaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrhaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrhaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrhaddq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vrhaddq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrhaddq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vrmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrmulhq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vrmulhq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmulhq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vrshlq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vrshrq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshrq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t),  p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshrq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t),  p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshrq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrshrq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vrshrq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrshrq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t),  p2, p3));})
+ 
+ #define __arm_vshrq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vshrq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t),  p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vshrq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t),  p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vshrq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vshrq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vshrq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vshrq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t),  p2, p3));})
+ 
+ #define __arm_vsliq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsliq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t),  p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsliq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t),  p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsliq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsliq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsliq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsliq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t),  p2, p3));})
+ 
+ #define __arm_vqsubq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vqsubq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vqsubq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vqsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vqrdmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
+ 
+ #define __arm_vqrdmlsdhxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmlsdhxq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmlsdhxq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmlsdhxq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vqrdmlsdhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmlsdhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmlsdhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmlsdhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vshllbq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int8x16_t]: __arm_vshllbq_m_n_s8 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t]: __arm_vshllbq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vshllbq_m_n_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vshllbq_m_n_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3));})
+ 
+ #define __arm_vshrntq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vshrntq_m_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vshrntq_m_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vshrntq_m_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vshrntq_m_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vshrnbq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vshrnbq_m_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vshrnbq_m_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vshrnbq_m_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vshrnbq_m_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vshlltq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int8x16_t]: __arm_vshlltq_m_n_s8 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t]: __arm_vshlltq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vshlltq_m_n_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vshlltq_m_n_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3));})
+ 
+ #define __arm_vrshrntq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vrshrntq_m_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vrshrntq_m_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vrshrntq_m_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vrshrntq_m_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vqshruntq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqshruntq_m_n_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqshruntq_m_n_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3));})
+ 
+ #define __arm_vqshrunbq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqshrunbq_m_n_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqshrunbq_m_n_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3));})
+ 
+ #define __arm_vqrshrnbq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqrshrnbq_m_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqrshrnbq_m_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqrshrnbq_m_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqrshrnbq_m_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vqrshrntq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqrshrntq_m_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqrshrntq_m_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqrshrntq_m_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqrshrntq_m_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vqrshrunbq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqrshrunbq_m_n_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqrshrunbq_m_n_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3));})
+ 
+ #define __arm_vqrshruntq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqrshruntq_m_n_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqrshruntq_m_n_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3));})
+ 
+ #define __arm_vqshrnbq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqshrnbq_m_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqshrnbq_m_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqshrnbq_m_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqshrnbq_m_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vqshrntq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqshrntq_m_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqshrntq_m_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqshrntq_m_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqshrntq_m_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vrshrnbq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vrshrnbq_m_n_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vrshrnbq_m_n_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vrshrnbq_m_n_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vrshrnbq_m_n_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vmlaldavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_p_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_p_u16 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmlaldavaxq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_p_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaxq_p_u16 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaxq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmlsldavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsldavaq_p_s16(__p0, __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsldavaq_p_s32(__p0, __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vmlsldavaxq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsldavaxq_p_s16(__p0, __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsldavaxq_p_s32(__p0, __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vrmlaldavhaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vrmlaldavhaxq_p(p0,p1,p2,p3) __arm_vrmlaldavhaxq_p_s32(p0,p1,p2,p3)
+ 
+ #define __arm_vrmlsldavhaq_p(p0,p1,p2,p3) __arm_vrmlsldavhaq_p_s32(p0,p1,p2,p3)
+ 
+ #define __arm_vrmlsldavhaxq_p(p0,p1,p2,p3) __arm_vrmlsldavhaxq_p_s32(p0,p1,p2,p3)
+ 
+ #define __arm_vqdmladhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmladhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmladhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmladhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vqdmladhxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmladhxq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmladhxq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmladhxq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vqdmlsdhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmlsdhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmlsdhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmlsdhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vqdmlsdhxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmlsdhxq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmlsdhxq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmlsdhxq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vqabsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqabsq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqabsq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqabsq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vmvnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmvnq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmvnq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmvnq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmvnq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmvnq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmvnq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1(__p1, int) , p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1(__p1, int) , p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1(__p1, int) , p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1(__p1, int) , p2));})
+ 
+ #define __arm_vorrq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vorrq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vorrq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vorrq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vorrq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
+ 
+ #define __arm_vqshrunbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqshrunbq_n_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqshrunbq_n_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vqshluq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqshluq_m_n_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqshluq_m_n_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqshluq_m_n_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3));})
+ 
+ #define __arm_vshlq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vshlq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vshlq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vshlq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vshlq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vshlq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vshlq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vshlq_m_n(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vshlq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t),  p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vshlq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t),  p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vshlq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vshlq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vshlq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t),  p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vshlq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t),  p2, p3));})
+ 
+ #define __arm_vshlq_m_r(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlq_m_r_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlq_m_r_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlq_m_r_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlq_m_r_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlq_m_r_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlq_m_r_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
+ 
+ #define __arm_vsriq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsriq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsriq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsriq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsriq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsriq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsriq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
+ 
+ #define __arm_vhaddq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhaddq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhaddq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhaddq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vhcaddq_rot270_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhcaddq_rot270_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhcaddq_rot270_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhcaddq_rot270_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vhcaddq_rot90_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhcaddq_rot90_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhcaddq_rot90_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhcaddq_rot90_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vhsubq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhsubq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhsubq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
+ 
+ #define __arm_vmaxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmaxq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmaxq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmaxq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmaxq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vminq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vminq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vminq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vminq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vminq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vminq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vminq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmlaq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
+ 
+ #define __arm_vmlasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
+ 
+ #define __arm_vmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulhq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulhq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulhq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmullbq_int_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmullbq_int_m_s8 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmullbq_int_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmullbq_int_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmullbq_int_m_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmullbq_int_m_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint64x2_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmullbq_int_m_u32 (__ARM_mve_coerce(__p0, uint64x2_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmulltq_int_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulltq_int_m_s8 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulltq_int_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulltq_int_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulltq_int_m_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulltq_int_m_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint64x2_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulltq_int_m_u32 (__ARM_mve_coerce(__p0, uint64x2_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmulltq_poly_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulltq_poly_m_p8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulltq_poly_m_p16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3));})
+ 
+ #define __arm_vqaddq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vqaddq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vqaddq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vqaddq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vqdmlahq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
+ 
+ #define __arm_vqdmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vqdmullbq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
+ 
+ #define __arm_vqdmulltq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
+   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vqrdmladhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmladhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmladhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmladhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vqrdmladhxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmladhxq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmladhxq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmladhxq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vmlsdavaxq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmlsdavaxq_p_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsdavaxq_p_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsdavaxq_p_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vmlsdavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmlsdavaq_p_s8(__p0, __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsdavaq_p_s16(__p0, __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsdavaq_p_s32(__p0, __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vmladavaxq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
+ 
+ #define __arm_vmullbq_poly_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmullbq_poly_m_p8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmullbq_poly_m_p16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3));})
+ 
+ #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8 (__ARM_mve_coerce(p0, int8_t const *), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16 (__ARM_mve_coerce(p0, int8_t const *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32 (__ARM_mve_coerce(p0, int8_t const *), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8 (__ARM_mve_coerce(p0, uint8_t const *), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16 (__ARM_mve_coerce(p0, uint8_t const *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32 (__ARM_mve_coerce(p0, uint8_t const *), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vidupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+  __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \
+  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \
+  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \
+  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \
+  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \
+  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
+ 
+ #define __arm_vddupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+  __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \
+  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \
+  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \
+  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \
+  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \
+  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
+ 
+ #define __arm_vidupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u16 ((uint32_t) __p0, p1), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
+ 
+ #define __arm_vidupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u32 ((uint32_t) __p0, p1), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
+ 
+ #define __arm_vidupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u8 ((uint32_t) __p0, p1), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
+ 
+ #define __arm_vddupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u16 ((uint32_t) __p0, p1), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
+ 
+ #define __arm_vddupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u32 ((uint32_t) __p0, p1), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
+ 
+ #define __arm_vddupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u8 ((uint32_t) __p0, p1), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
+ 
+ #define __arm_viwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
+ 
+ #define __arm_viwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u16 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
+ 
+ #define __arm_viwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u32 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
+ 
+ #define __arm_viwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u8 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
+ 
+ #define __arm_vdwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
+ 
+ #define __arm_vdwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u16 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
+ 
+ #define __arm_vdwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u32 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
+ 
+ #define __arm_vdwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u8 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
+   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
+ 
+ #define __arm_vshlcq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlcq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2, p3), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlcq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2, p3), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlcq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2, p3), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlcq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2, p3), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlcq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2, p3), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlcq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2, p3));})
+ 
+ #define __arm_vabavq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vabavq_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vabavq_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vabavq_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vabavq_u8 (__p0, __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vabavq_u16 (__p0, __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vabavq_u32 (__p0, __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vabavq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vabavq_p_s8(__p0, __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vabavq_p_s16(__p0, __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vabavq_p_s32(__p0, __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vabavq_p_u8(__p0, __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vabavq_p_u16(__p0, __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vabavq_p_u32(__p0, __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vaddlvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vaddlvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vaddlvq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vaddlvq_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vaddlvq_u32 (__ARM_mve_coerce(__p0, uint32x4_t)));})
+ 
+ #define __arm_vaddlvq_p(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vaddlvq_p_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vaddlvq_p_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vaddvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vaddvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vaddvq(p0) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vaddvq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vaddvq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vaddvq_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vaddvq_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vaddvq_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vaddvq_u32 (__ARM_mve_coerce(__p0, uint32x4_t)));})
+ 
+ #define __arm_vaddvq_p(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vaddvq_p_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vaddvq_p_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
+   int (*)[__ARM_mve_type_int32x4_t]: __arm_vaddvq_p_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vaddvq_p_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vaddvq_p_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
+   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vaddvq_p_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));})
+ 
+ #define __arm_vcmpcsq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
+ 
+ #define __arm_vcmpcsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2));})
+ 
+ #define __arm_vcmphiq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
+ 
+ #define __arm_vcmphiq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vmaxavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_s8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_s16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_s32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vmaxavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_p_s8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_p_s16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_p_s32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vmaxq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmaxq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmaxq_x_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmaxq_x_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmaxq_x_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmaxvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmaxvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_p_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_p_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_p_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_p_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vminavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_s8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_s16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_s32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vminavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_p_s8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_p_s16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_p_s32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vminq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vminq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vminq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vminq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vminq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vminq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vminq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vminvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vminvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_p_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_p_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_p_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_p_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vmladavaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vmladavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmladavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaxq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaxq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaxq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vmladavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmladavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavq_p_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavq_p_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavq_p_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavq_p_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavq_p_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavq_p_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vmladavxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavxq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavxq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavxq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavxq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmladavxq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavxq_p_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavxq_p_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavxq_p_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vmlaldavaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_u16 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vmlaldavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vmlaldavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vmlaldavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavq_p_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavq_p_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavq_p_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavq_p_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vmlaldavxq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavxq_p_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavxq_p_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vmlsdavaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmlsdavaq_s8(__p0, __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsdavaq_s16(__p0, __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsdavaq_s32(__p0, __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vmlsdavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmlsdavaxq_s8(__p0, __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsdavaxq_s16(__p0, __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsdavaxq_s32(__p0, __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vmlsdavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmlsdavq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsdavq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsdavq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vmlsdavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmlsdavq_p_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsdavq_p_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsdavq_p_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vmlsdavxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmlsdavxq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsdavxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsdavxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vmlsdavxq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmlsdavxq_p_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsdavxq_p_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsdavxq_p_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vmlsldavaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsldavaq_s16(__p0, __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsldavaq_s32(__p0, __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vmlsldavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsldavaxq_s16(__p0, __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsldavaxq_s32(__p0, __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
+ 
+ #define __arm_vmlsldavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsldavq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsldavq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vmlsldavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsldavq_p_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsldavq_p_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vmlsldavxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsldavxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsldavxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+ 
+ #define __arm_vmlsldavxq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlsldavxq_p_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlsldavxq_p_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+ 
+ #define __arm_vmovlbq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vmovlbq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vmovlbq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vmovlbq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vmovlbq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2));})
+ 
+ #define __arm_vmovltq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8x16_t]: __arm_vmovltq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int16x8_t]: __arm_vmovltq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint8x16_t]: __arm_vmovltq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint16x8_t]: __arm_vmovltq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2));})
+ 
+ #define __arm_vmulhq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulhq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulhq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulhq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulhq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulhq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulhq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmullbq_int_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmullbq_int_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmullbq_int_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmullbq_int_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmullbq_int_x_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmullbq_int_x_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmullbq_int_x_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmullbq_poly_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmullbq_poly_x_p8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmullbq_poly_x_p16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3));})
+ 
+ #define __arm_vmulltq_int_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulltq_int_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulltq_int_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulltq_int_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulltq_int_x_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulltq_int_x_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulltq_int_x_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vmulltq_poly_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulltq_poly_x_p8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulltq_poly_x_p16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3));})
+ 
+ #define __arm_vrmlaldavhaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ #define __arm_vrmlaldavhaxq(p0,p1,p2) __arm_vrmlaldavhaxq_s32(p0,p1,p2)
+ 
+ #define __arm_vrmlaldavhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vrmlaldavhq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+   __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhq_p_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhq_p_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vrmlaldavhxq(p0,p1) __arm_vrmlaldavhxq_s32(p0,p1)
+ 
+ #define __arm_vrmlaldavhxq_p(p0,p1,p2) __arm_vrmlaldavhxq_p_s32(p0,p1,p2)
+ 
+ #define __arm_vrmlsldavhaq(p0,p1,p2) __arm_vrmlsldavhaq_s32(p0,p1,p2)
+ 
+ #define __arm_vrmlsldavhaxq(p0,p1,p2) __arm_vrmlsldavhaxq_s32(p0,p1,p2)
+ 
+ #define __arm_vrmlsldavhq(p0,p1) __arm_vrmlsldavhq_s32(p0,p1)
+ 
+ #define __arm_vrmlsldavhq_p(p0,p1,p2) __arm_vrmlsldavhq_p_s32(p0,p1,p2)
+ 
+ #define __arm_vrmlsldavhxq(p0,p1) __arm_vrmlsldavhxq_s32(p0,p1)
+ 
+ #define __arm_vrmlsldavhxq_p(p0,p1,p2) __arm_vrmlsldavhxq_p_s32(p0,p1,p2)
+ 
+ #define __arm_vstrbq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_s16 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_s32 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_u16 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_u32 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
+ 
+ #define __arm_vstrbq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_p_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_p_s16 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_p_s32 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_p_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_p_u16 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_p_u32 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+ 
+ #define __arm_vstrbq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_s16 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_s32 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
+ 
+ 
+ #define __arm_vstrbq_scatter_offset_p(p0,p1,p2,p3) ({__typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_p_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_p_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
+ 
+ #define __arm_vstrdq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_base_s64 (p0, p1, __ARM_mve_coerce(__p2, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
+ 
+ #define __arm_vstrdq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_base_p_s64 (p0, p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
+   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_p_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
+ 
+ #define __arm_vstrdq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_s64 (__ARM_mve_coerce(p0, int64_t *), __p1, __ARM_mve_coerce(__p2, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_u64 (__ARM_mve_coerce(p0, uint64_t *), __p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
+ 
+ #define __arm_vstrdq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_p_s64 (__ARM_mve_coerce(p0, int64_t *), __p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
+   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_p_u64 (__ARM_mve_coerce(p0, uint64_t *), __p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
+ 
+ #define __arm_vstrdq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_s64 (__ARM_mve_coerce(p0, int64_t *), __p1, __ARM_mve_coerce(__p2, int64x2_t)), \
+   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_u64 (__ARM_mve_coerce(p0, uint64_t *), __p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
+ 
+ #define __arm_vstrdq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
+   __typeof(p2) __p2 = (p2); \
+   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_s64 (__ARM_mve_coerce(p0, int64_t *), __p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
+   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_u64 (__ARM_mve_coerce(p0, uint64_t *), __p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
+ 
+ #endif /* __cplusplus  */
+ #endif /* __ARM_FEATURE_MVE  */
+ #endif /* _GCC_ARM_MVE_H.  */
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm_mve_builtins.def gcc-10.1.0/gcc/config/arm/arm_mve_builtins.def
*** gcc-9.3.0/gcc/config/arm/arm_mve_builtins.def	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/arm/arm_mve_builtins.def	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,906 ----
+ /*  MVE builtin definitions for Arm.
+     Copyright  (C) 2019-2020 Free Software Foundation, Inc.
+     Contributed by Arm.
+ 
+     This file is part of GCC.
+ 
+     GCC is free software; you can redistribute it and/or modify it
+     under the terms of the GNU General Public License as published
+     by the Free Software Foundation; either version 3, or (at your
+     option) any later version.
+ 
+     GCC is distributed in the hope that it will be useful, but WITHOUT
+     ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+     License for more details.
+ 
+     You should have received a copy of the GNU General Public License
+     along with GCC; see the file COPYING3.  If not see
+     <http://www.gnu.org/licenses/>.  */
+ 
+ VAR5 (STORE1, vst4q, v16qi, v8hi, v4si, v8hf, v4sf)
+ VAR2 (UNOP_NONE_NONE, vrndxq_f, v8hf, v4sf)
+ VAR2 (UNOP_NONE_NONE, vrndq_f, v8hf, v4sf)
+ VAR2 (UNOP_NONE_NONE, vrndpq_f, v8hf, v4sf)
+ VAR2 (UNOP_NONE_NONE, vrndnq_f, v8hf, v4sf)
+ VAR2 (UNOP_NONE_NONE, vrndmq_f, v8hf, v4sf)
+ VAR2 (UNOP_NONE_NONE, vrndaq_f, v8hf, v4sf)
+ VAR2 (UNOP_NONE_NONE, vrev64q_f, v8hf, v4sf)
+ VAR2 (UNOP_NONE_NONE, vnegq_f, v8hf, v4sf)
+ VAR2 (UNOP_NONE_NONE, vdupq_n_f, v8hf, v4sf)
+ VAR2 (UNOP_NONE_NONE, vabsq_f, v8hf, v4sf)
+ VAR1 (UNOP_NONE_NONE, vrev32q_f, v8hf)
+ VAR1 (UNOP_NONE_NONE, vcvttq_f32_f16, v4sf)
+ VAR1 (UNOP_NONE_NONE, vcvtbq_f32_f16, v4sf)
+ VAR2 (UNOP_NONE_SNONE, vcvtq_to_f_s, v8hf, v4sf)
+ VAR2 (UNOP_NONE_UNONE, vcvtq_to_f_u, v8hf, v4sf)
+ VAR3 (UNOP_SNONE_SNONE, vrev64q_s, v16qi, v8hi, v4si)
+ VAR3 (UNOP_SNONE_SNONE, vqnegq_s, v16qi, v8hi, v4si)
+ VAR3 (UNOP_SNONE_SNONE, vqabsq_s, v16qi, v8hi, v4si)
+ VAR3 (UNOP_SNONE_SNONE, vnegq_s, v16qi, v8hi, v4si)
+ VAR3 (UNOP_SNONE_SNONE, vmvnq_s, v16qi, v8hi, v4si)
+ VAR3 (UNOP_SNONE_SNONE, vdupq_n_s, v16qi, v8hi, v4si)
+ VAR3 (UNOP_SNONE_SNONE, vclzq_s, v16qi, v8hi, v4si)
+ VAR3 (UNOP_SNONE_SNONE, vclsq_s, v16qi, v8hi, v4si)
+ VAR3 (UNOP_SNONE_SNONE, vaddvq_s, v16qi, v8hi, v4si)
+ VAR3 (UNOP_SNONE_SNONE, vabsq_s, v16qi, v8hi, v4si)
+ VAR2 (UNOP_SNONE_SNONE, vrev32q_s, v16qi, v8hi)
+ VAR2 (UNOP_SNONE_SNONE, vmovltq_s, v16qi, v8hi)
+ VAR2 (UNOP_SNONE_SNONE, vmovlbq_s, v16qi, v8hi)
+ VAR2 (UNOP_SNONE_NONE, vcvtq_from_f_s, v8hi, v4si)
+ VAR2 (UNOP_SNONE_NONE, vcvtpq_s, v8hi, v4si)
+ VAR2 (UNOP_SNONE_NONE, vcvtnq_s, v8hi, v4si)
+ VAR2 (UNOP_SNONE_NONE, vcvtmq_s, v8hi, v4si)
+ VAR2 (UNOP_SNONE_NONE, vcvtaq_s, v8hi, v4si)
+ VAR2 (UNOP_SNONE_IMM, vmvnq_n_s, v8hi, v4si)
+ VAR1 (UNOP_SNONE_SNONE, vrev16q_s, v16qi)
+ VAR1 (UNOP_SNONE_SNONE, vaddlvq_s, v4si)
+ VAR3 (UNOP_UNONE_UNONE, vrev64q_u, v16qi, v8hi, v4si)
+ VAR3 (UNOP_UNONE_UNONE, vmvnq_u, v16qi, v8hi, v4si)
+ VAR3 (UNOP_UNONE_UNONE, vdupq_n_u, v16qi, v8hi, v4si)
+ VAR3 (UNOP_UNONE_UNONE, vclzq_u, v16qi, v8hi, v4si)
+ VAR3 (UNOP_UNONE_UNONE, vaddvq_u, v16qi, v8hi, v4si)
+ VAR2 (UNOP_UNONE_UNONE, vrev32q_u, v16qi, v8hi)
+ VAR2 (UNOP_UNONE_UNONE, vmovltq_u, v16qi, v8hi)
+ VAR2 (UNOP_UNONE_UNONE, vmovlbq_u, v16qi, v8hi)
+ VAR2 (UNOP_UNONE_NONE, vcvtq_from_f_u, v8hi, v4si)
+ VAR2 (UNOP_UNONE_NONE, vcvtpq_u, v8hi, v4si)
+ VAR2 (UNOP_UNONE_NONE, vcvtnq_u, v8hi, v4si)
+ VAR2 (UNOP_UNONE_NONE, vcvtmq_u, v8hi, v4si)
+ VAR2 (UNOP_UNONE_NONE, vcvtaq_u, v8hi, v4si)
+ VAR2 (UNOP_UNONE_IMM, vmvnq_n_u, v8hi, v4si)
+ VAR1 (UNOP_UNONE_UNONE, vrev16q_u, v16qi)
+ VAR1 (UNOP_UNONE_UNONE, vaddlvq_u, v4si)
+ VAR1 (UNOP_UNONE_UNONE, vctp16q, hi)
+ VAR1 (UNOP_UNONE_UNONE, vctp32q, hi)
+ VAR1 (UNOP_UNONE_UNONE, vctp64q, hi)
+ VAR1 (UNOP_UNONE_UNONE, vctp8q, hi)
+ VAR1 (UNOP_UNONE_UNONE, vpnot, hi)
+ VAR2 (BINOP_NONE_NONE_NONE, vsubq_n_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vbrsrq_n_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_IMM, vcvtq_n_to_f_s, v8hf, v4sf)
+ VAR2 (BINOP_NONE_UNONE_IMM, vcvtq_n_to_f_u, v8hf, v4sf)
+ VAR2 (BINOP_NONE_UNONE_UNONE, vcreateq_f, v8hf, v4sf)
+ VAR2 (BINOP_UNONE_NONE_IMM, vcvtq_n_from_f_u, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_IMM, vcvtq_n_from_f_s, v8hi, v4si)
+ VAR4 (BINOP_UNONE_UNONE_UNONE, vcreateq_u, v16qi, v8hi, v4si, v2di)
+ VAR4 (BINOP_NONE_UNONE_UNONE, vcreateq_s, v16qi, v8hi, v4si, v2di)
+ VAR3 (BINOP_UNONE_UNONE_IMM, vshrq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_IMM, vshrq_n_s, v16qi, v8hi, v4si)
+ VAR1 (BINOP_NONE_NONE_UNONE, vaddlvq_p_s, v4si)
+ VAR1 (BINOP_UNONE_UNONE_UNONE, vaddlvq_p_u, v4si)
+ VAR3 (BINOP_UNONE_NONE_NONE, vcmpneq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vcmpneq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vshlq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_NONE, vshlq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vsubq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vsubq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vrmulhq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vrhaddq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vqsubq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vqsubq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vqaddq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vqaddq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vorrq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vornq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vmulq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vmulq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vmulltq_int_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vmullbq_int_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vmulhq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vmladavq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vminvq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vminq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vmaxvq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vmaxq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vhsubq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vhsubq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vhaddq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vhaddq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, veorq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vcmpneq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vcmphiq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vcmphiq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vcmpeqq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vcmpeqq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vcmpcsq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vcmpcsq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vcaddq_rot90_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vcaddq_rot270_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vbicq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vandq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vaddvq_p_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vaddvaq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vaddq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_UNONE, vabdq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_NONE, vshlq_r_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_NONE, vrshlq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_NONE, vrshlq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_NONE, vqshlq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_NONE, vqshlq_r_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_NONE, vqrshlq_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_NONE, vqrshlq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_NONE, vminavq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_NONE, vminaq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_NONE, vmaxavq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_NONE, vmaxaq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_NONE, vbrsrq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_IMM, vshlq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_IMM, vrshrq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_IMM, vqshlq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_NONE_NONE, vcmpneq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_NONE_NONE, vcmpltq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_NONE_NONE, vcmpltq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_NONE_NONE, vcmpleq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_NONE_NONE, vcmpleq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_NONE_NONE, vcmpgtq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_NONE_NONE, vcmpgtq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_NONE_NONE, vcmpgeq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_NONE_NONE, vcmpgeq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_NONE_NONE, vcmpeqq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_NONE_NONE, vcmpeqq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_NONE_IMM, vqshluq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_UNONE, vaddvq_p_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vsubq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vsubq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vshlq_r_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vrshlq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vrshlq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vrmulhq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vrhaddq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vqsubq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vqsubq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vqshlq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vqshlq_r_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vqrshlq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vqrshlq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vqrdmulhq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vqrdmulhq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vqdmulhq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vqdmulhq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vqaddq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vqaddq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vorrq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vornq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vmulq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vmulq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vmulltq_int_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vmullbq_int_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vmulhq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vmlsdavxq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vmlsdavq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vmladavxq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vmladavq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vminvq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vminq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vmaxvq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vmaxq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vhsubq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vhsubq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vhcaddq_rot90_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vhcaddq_rot270_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vhaddq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vhaddq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, veorq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vcaddq_rot90_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vcaddq_rot270_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vbrsrq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vbicq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vandq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vaddvaq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vaddq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_NONE, vabdq_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_IMM, vshlq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_IMM, vrshrq_n_s, v16qi, v8hi, v4si)
+ VAR3 (BINOP_NONE_NONE_IMM, vqshlq_n_s, v16qi, v8hi, v4si)
+ VAR2 (BINOP_UNONE_UNONE_UNONE, vqmovntq_u, v8hi, v4si)
+ VAR2 (BINOP_UNONE_UNONE_UNONE, vqmovnbq_u, v8hi, v4si)
+ VAR2 (BINOP_UNONE_UNONE_UNONE, vmulltq_poly_p, v16qi, v8hi)
+ VAR2 (BINOP_UNONE_UNONE_UNONE, vmullbq_poly_p, v16qi, v8hi)
+ VAR2 (BINOP_UNONE_UNONE_UNONE, vmovntq_u, v8hi, v4si)
+ VAR2 (BINOP_UNONE_UNONE_UNONE, vmovnbq_u, v8hi, v4si)
+ VAR2 (BINOP_UNONE_UNONE_UNONE, vmlaldavq_u, v8hi, v4si)
+ VAR2 (BINOP_UNONE_UNONE_NONE, vqmovuntq_s, v8hi, v4si)
+ VAR2 (BINOP_UNONE_UNONE_NONE, vqmovunbq_s, v8hi, v4si)
+ VAR2 (BINOP_UNONE_UNONE_IMM, vshlltq_n_u, v16qi, v8hi)
+ VAR2 (BINOP_UNONE_UNONE_IMM, vshllbq_n_u, v16qi, v8hi)
+ VAR2 (BINOP_UNONE_UNONE_IMM, vorrq_n_u, v8hi, v4si)
+ VAR2 (BINOP_UNONE_UNONE_IMM, vbicq_n_u, v8hi, v4si)
+ VAR2 (BINOP_UNONE_NONE_NONE, vcmpneq_n_f, v8hf, v4sf)
+ VAR2 (BINOP_UNONE_NONE_NONE, vcmpneq_f, v8hf, v4sf)
+ VAR2 (BINOP_UNONE_NONE_NONE, vcmpltq_n_f, v8hf, v4sf)
+ VAR2 (BINOP_UNONE_NONE_NONE, vcmpltq_f, v8hf, v4sf)
+ VAR2 (BINOP_UNONE_NONE_NONE, vcmpleq_n_f, v8hf, v4sf)
+ VAR2 (BINOP_UNONE_NONE_NONE, vcmpleq_f, v8hf, v4sf)
+ VAR2 (BINOP_UNONE_NONE_NONE, vcmpgtq_n_f, v8hf, v4sf)
+ VAR2 (BINOP_UNONE_NONE_NONE, vcmpgtq_f, v8hf, v4sf)
+ VAR2 (BINOP_UNONE_NONE_NONE, vcmpgeq_n_f, v8hf, v4sf)
+ VAR2 (BINOP_UNONE_NONE_NONE, vcmpgeq_f, v8hf, v4sf)
+ VAR2 (BINOP_UNONE_NONE_NONE, vcmpeqq_n_f, v8hf, v4sf)
+ VAR2 (BINOP_UNONE_NONE_NONE, vcmpeqq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vsubq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vqmovntq_s, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_NONE, vqmovnbq_s, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_NONE, vqdmulltq_s, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_NONE, vqdmulltq_n_s, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_NONE, vqdmullbq_s, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_NONE, vqdmullbq_n_s, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_NONE, vorrq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vornq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vmulq_n_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vmulq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vmovntq_s, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_NONE, vmovnbq_s, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_NONE, vmlsldavxq_s, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_NONE, vmlsldavq_s, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_NONE, vmlaldavxq_s, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_NONE, vmlaldavq_s, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_NONE, vminnmvq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vminnmq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vminnmavq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vminnmaq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vmaxnmvq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vmaxnmq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vmaxnmavq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vmaxnmaq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, veorq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vcmulq_rot90_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vcmulq_rot270_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vcmulq_rot180_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vcmulq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vcaddq_rot90_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vcaddq_rot270_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vbicq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vandq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vaddq_n_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_NONE, vabdq_f, v8hf, v4sf)
+ VAR2 (BINOP_NONE_NONE_IMM, vshlltq_n_s, v16qi, v8hi)
+ VAR2 (BINOP_NONE_NONE_IMM, vshllbq_n_s, v16qi, v8hi)
+ VAR2 (BINOP_NONE_NONE_IMM, vorrq_n_s, v8hi, v4si)
+ VAR2 (BINOP_NONE_NONE_IMM, vbicq_n_s, v8hi, v4si)
+ VAR1 (BINOP_UNONE_UNONE_UNONE, vrmlaldavhq_u, v4si)
+ VAR1 (BINOP_UNONE_UNONE_UNONE, vctp8q_m, hi)
+ VAR1 (BINOP_UNONE_UNONE_UNONE, vctp64q_m, hi)
+ VAR1 (BINOP_UNONE_UNONE_UNONE, vctp32q_m, hi)
+ VAR1 (BINOP_UNONE_UNONE_UNONE, vctp16q_m, hi)
+ VAR1 (BINOP_UNONE_UNONE_UNONE, vaddlvaq_u, v4si)
+ VAR1 (BINOP_NONE_NONE_NONE, vrmlsldavhxq_s, v4si)
+ VAR1 (BINOP_NONE_NONE_NONE, vrmlsldavhq_s, v4si)
+ VAR1 (BINOP_NONE_NONE_NONE, vrmlaldavhxq_s, v4si)
+ VAR1 (BINOP_NONE_NONE_NONE, vrmlaldavhq_s, v4si)
+ VAR1 (BINOP_NONE_NONE_NONE, vcvttq_f16_f32, v8hf)
+ VAR1 (BINOP_NONE_NONE_NONE, vcvtbq_f16_f32, v8hf)
+ VAR1 (BINOP_NONE_NONE_NONE, vaddlvaq_s, v4si)
+ VAR2 (TERNOP_NONE_NONE_IMM_UNONE, vbicq_m_n_s, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_IMM_UNONE, vbicq_m_n_u, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_IMM, vqrshrnbq_n_s, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_IMM, vqrshrnbq_n_u, v8hi, v4si)
+ VAR1 (TERNOP_NONE_NONE_NONE_NONE, vrmlaldavhaq_s, v4si)
+ VAR1 (TERNOP_UNONE_UNONE_UNONE_UNONE, vrmlaldavhaq_u, v4si)
+ VAR2 (TERNOP_NONE_NONE_UNONE_UNONE, vcvtq_m_to_f_u, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vcvtq_m_to_f_s, v8hf, v4sf)
+ VAR2 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpeqq_m_f, v8hf, v4sf)
+ VAR3 (TERNOP_UNONE_NONE_UNONE_IMM, vshlcq_carry_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_IMM, vshlcq_carry_u, v16qi, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_NONE_IMM, vqrshrunbq_n_s, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_NONE_NONE, vabavq_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vabavq_u, v16qi, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_NONE_UNONE, vcvtaq_m_u, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vcvtaq_m_s, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_IMM, vshlcq_vec_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_UNONE_IMM, vshlcq_vec_s, v16qi, v8hi, v4si)
+ VAR4 (TERNOP_UNONE_UNONE_UNONE_UNONE, vpselq_u, v16qi, v8hi, v4si, v2di)
+ VAR4 (TERNOP_NONE_NONE_NONE_UNONE, vpselq_s, v16qi, v8hi, v4si, v2di)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vrev64q_m_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vqrdmlashq_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vqrdmlahq_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vqdmlahq_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vmvnq_m_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vmlasq_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vmlaq_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vmladavq_p_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vmladavaq_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vminvq_p_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vmaxvq_p_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vdupq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vcmpneq_m_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vcmpneq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vcmphiq_m_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vcmphiq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vcmpeqq_m_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vcmpeqq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vcmpcsq_m_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vcmpcsq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vclzq_m_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_UNONE, vaddvaq_p_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_IMM, vsriq_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_IMM, vsliq_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_NONE_UNONE, vshlq_m_r_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_NONE_UNONE, vrshlq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_NONE_UNONE, vqshlq_m_r_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_NONE_UNONE, vqrshlq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_NONE_UNONE, vminavq_p_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_NONE_UNONE, vminaq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_NONE_UNONE, vmaxavq_p_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_NONE_UNONE, vmaxaq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpneq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpneq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpltq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpltq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpleq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpleq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpgtq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpgtq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpgeq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpgeq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpeqq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpeqq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vshlq_m_r_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vrshlq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vrev64q_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vqshlq_m_r_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vqrshlq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vqnegq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vqabsq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vnegq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vmvnq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vmlsdavxq_p_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vmlsdavq_p_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vmladavxq_p_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vmladavq_p_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vminvq_p_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vmaxvq_p_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vdupq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vclzq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vclsq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vaddvaq_p_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_UNONE, vabsq_m_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqrdmlsdhxq_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqrdmlsdhq_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqrdmlashq_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqrdmlahq_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqrdmladhxq_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqrdmladhq_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqdmlsdhxq_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqdmlsdhq_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqdmlahq_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqdmladhxq_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqdmladhq_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vmlsdavaxq_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vmlsdavaq_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vmlasq_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vmlaq_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vmladavaxq_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vmladavaq_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_IMM, vsriq_n_s, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_NONE_NONE_NONE_IMM, vsliq_n_s, v16qi, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_UNONE, vrev32q_m_u, v16qi, v8hi)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_UNONE, vqmovntq_m_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_UNONE, vqmovnbq_m_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_UNONE, vmovntq_m_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_UNONE, vmovnbq_m_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_UNONE, vmovltq_m_u, v16qi, v8hi)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_UNONE, vmovlbq_m_u, v16qi, v8hi)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_UNONE, vmlaldavq_p_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_UNONE, vmlaldavaq_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_IMM, vshrntq_n_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_IMM, vshrnbq_n_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_IMM, vrshrntq_n_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_IMM, vrshrnbq_n_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_IMM, vqshrntq_n_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_IMM, vqshrnbq_n_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_UNONE_IMM, vqrshrntq_n_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_NONE_UNONE, vqmovuntq_m_s, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_NONE_UNONE, vqmovunbq_m_s, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_NONE_UNONE, vcvtq_m_from_f_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_NONE_UNONE, vcvtpq_m_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_NONE_UNONE, vcvtnq_m_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_NONE_UNONE, vcvtmq_m_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_NONE_IMM, vqshruntq_n_s, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_NONE_IMM, vqshrunbq_n_s, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_NONE_IMM, vqrshruntq_n_s, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_IMM_UNONE, vorrq_m_n_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_UNONE_IMM_UNONE, vmvnq_m_n_u, v8hi, v4si)
+ VAR2 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpneq_m_n_f, v8hf, v4sf)
+ VAR2 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpneq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpltq_m_n_f, v8hf, v4sf)
+ VAR2 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpltq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpleq_m_n_f, v8hf, v4sf)
+ VAR2 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpleq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpgtq_m_n_f, v8hf, v4sf)
+ VAR2 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpgtq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpgeq_m_n_f, v8hf, v4sf)
+ VAR2 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpgeq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_UNONE_NONE_NONE_UNONE, vcmpeqq_m_n_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vrndxq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vrndq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vrndpq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vrndnq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vrndmq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vrndaq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vrev64q_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vrev32q_m_s, v16qi, v8hi)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vqmovntq_m_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vqmovnbq_m_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vpselq_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vnegq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vmovntq_m_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vmovnbq_m_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vmovltq_m_s, v16qi, v8hi)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vmovlbq_m_s, v16qi, v8hi)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vmlsldavxq_p_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vmlsldavq_p_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vmlaldavxq_p_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vmlaldavq_p_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vminnmvq_p_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vminnmavq_p_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vminnmaq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vmaxnmvq_p_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vmaxnmavq_p_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vmaxnmaq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vdupq_m_n_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vcvtq_m_from_f_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vcvtpq_m_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vcvtnq_m_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vcvtmq_m_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_UNONE, vabsq_m_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_NONE, vmlsldavaxq_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_NONE, vmlsldavaq_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_NONE, vmlaldavaxq_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_NONE, vmlaldavaq_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_NONE, vfmsq_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_NONE, vfmasq_n_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_NONE, vfmaq_n_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_NONE, vfmaq_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_NONE, vcmlaq_rot90_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_NONE, vcmlaq_rot270_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_NONE, vcmlaq_rot180_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_NONE, vcmlaq_f, v8hf, v4sf)
+ VAR2 (TERNOP_NONE_NONE_NONE_IMM, vshrntq_n_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_IMM, vshrnbq_n_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_IMM, vrshrntq_n_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_IMM, vrshrnbq_n_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_IMM, vqshrntq_n_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_IMM, vqshrnbq_n_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_NONE_IMM, vqrshrntq_n_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_IMM_UNONE, vorrq_m_n_s, v8hi, v4si)
+ VAR2 (TERNOP_NONE_NONE_IMM_UNONE, vmvnq_m_n_s, v8hi, v4si)
+ VAR1 (TERNOP_UNONE_UNONE_UNONE_UNONE, vrmlaldavhq_p_u, v4si)
+ VAR1 (TERNOP_UNONE_UNONE_UNONE_UNONE, vrev16q_m_u, v16qi)
+ VAR1 (TERNOP_UNONE_UNONE_UNONE_UNONE, vaddlvaq_p_u, v4si)
+ VAR1 (TERNOP_NONE_NONE_NONE_UNONE, vrmlsldavhxq_p_s, v4si)
+ VAR1 (TERNOP_NONE_NONE_NONE_UNONE, vrmlsldavhq_p_s, v4si)
+ VAR1 (TERNOP_NONE_NONE_NONE_UNONE, vrmlaldavhxq_p_s, v4si)
+ VAR1 (TERNOP_NONE_NONE_NONE_UNONE, vrmlaldavhq_p_s, v4si)
+ VAR1 (TERNOP_NONE_NONE_NONE_UNONE, vrev32q_m_f, v8hf)
+ VAR1 (TERNOP_NONE_NONE_NONE_UNONE, vrev16q_m_s, v16qi)
+ VAR1 (TERNOP_NONE_NONE_NONE_UNONE, vcvttq_m_f32_f16, v4sf)
+ VAR1 (TERNOP_NONE_NONE_NONE_UNONE, vcvttq_m_f16_f32, v8hf)
+ VAR1 (TERNOP_NONE_NONE_NONE_UNONE, vcvtbq_m_f32_f16, v4sf)
+ VAR1 (TERNOP_NONE_NONE_NONE_UNONE, vcvtbq_m_f16_f32, v8hf)
+ VAR1 (TERNOP_NONE_NONE_NONE_UNONE, vaddlvaq_p_s, v4si)
+ VAR1 (TERNOP_NONE_NONE_NONE_NONE, vrmlsldavhaxq_s, v4si)
+ VAR1 (TERNOP_NONE_NONE_NONE_NONE, vrmlsldavhaq_s, v4si)
+ VAR1 (TERNOP_NONE_NONE_NONE_NONE, vrmlaldavhaxq_s, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vsriq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vsriq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vsubq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vsubq_m_u, v16qi, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_UNONE_IMM_UNONE, vcvtq_m_n_to_f_u, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vcvtq_m_n_to_f_s, v8hf, v4sf)
+ VAR3 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE, vqshluq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE, vabavq_p_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vabavq_p_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE, vshlq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vshlq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vsubq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vrmulhq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vrhaddq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vqsubq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vqsubq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vqaddq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vqaddq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vorrq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vornq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vmulq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vmulq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vmulltq_int_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vmullbq_int_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vmulhq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vmlasq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vmlaq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vmladavaq_p_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vminq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vmaxq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vhsubq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vhsubq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vhaddq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vhaddq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, veorq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vcaddq_rot90_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vcaddq_rot270_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vbicq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vandq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vaddq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vaddq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vabdq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE, vrshlq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE, vqshlq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE, vqrshlq_m_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE, vbrsrq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vsliq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vshrq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vshlq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vrshrq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vqshlq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vsubq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vrshlq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vrmulhq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vrhaddq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqsubq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqsubq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqshlq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqrshlq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqrdmulhq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqrdmulhq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqrdmlsdhxq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqrdmlsdhq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqrdmlashq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqrdmlahq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqrdmladhxq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqrdmladhq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmulhq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmulhq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmlsdhxq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmlsdhq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmlahq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmladhxq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmladhq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqaddq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqaddq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vorrq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vornq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmulq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmulq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmulltq_int_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmullbq_int_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmulhq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmlsdavaxq_p_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmlsdavaq_p_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmlasq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmlaq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmladavaxq_p_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmladavaq_p_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vminq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmaxq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vhsubq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vhsubq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vhcaddq_rot90_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vhcaddq_rot270_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vhaddq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vhaddq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, veorq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vcaddq_rot90_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vcaddq_rot270_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vbrsrq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vbicq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vandq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vaddq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vaddq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vabdq_m_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vsliq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vshrq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vshlq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vrshrq_m_n_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vqshlq_m_n_s, v16qi, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vmulltq_poly_m_p, v16qi, v8hi)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vmullbq_poly_m_p, v16qi, v8hi)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vmlaldavaxq_p_u, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vmlaldavaq_p_u, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vshrntq_m_n_u, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vshrnbq_m_n_u, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vshlltq_m_n_u, v16qi, v8hi)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vshllbq_m_n_u, v16qi, v8hi)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vrshrntq_m_n_u, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vrshrnbq_m_n_u, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vqshrntq_m_n_u, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vqshrnbq_m_n_u, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vqrshrntq_m_n_u, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vqrshrnbq_m_n_u, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE, vqshruntq_m_n_s, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE, vqshrunbq_m_n_s, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE, vqrshruntq_m_n_s, v8hi, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE, vqrshrunbq_m_n_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmulltq_m_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmulltq_m_n_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmullbq_m_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmullbq_m_n_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmlsldavaxq_p_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmlsldavaq_p_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmlaldavaxq_p_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmlaldavaq_p_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vshrntq_m_n_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vshrnbq_m_n_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vshlltq_m_n_s, v16qi, v8hi)
+ VAR2 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vshllbq_m_n_s, v16qi, v8hi)
+ VAR2 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vrshrntq_m_n_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vrshrnbq_m_n_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vqshrntq_m_n_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vqshrnbq_m_n_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vqrshrntq_m_n_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vqrshrnbq_m_n_s, v8hi, v4si)
+ VAR1 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vrmlaldavhaq_p_u, v4si)
+ VAR1 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vrmlsldavhaxq_p_s, v4si)
+ VAR1 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vrmlsldavhaq_p_s, v4si)
+ VAR1 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vrmlaldavhaxq_p_s, v4si)
+ VAR1 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vrmlaldavhaq_p_s, v4si)
+ VAR2 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE, vcvtq_m_n_from_f_u, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_IMM_UNONE, vcvtq_m_n_from_f_s, v8hi, v4si)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vbrsrq_m_n_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vsubq_m_n_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vsubq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vorrq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vornq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmulq_m_n_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmulq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vminnmq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vmaxnmq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vfmsq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vfmasq_m_n_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vfmaq_m_n_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vfmaq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, veorq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vcmulq_rot90_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vcmulq_rot270_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vcmulq_rot180_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vcmulq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vcmlaq_rot90_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vcmlaq_rot270_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vcmlaq_rot180_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vcmlaq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vcaddq_rot90_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vcaddq_rot270_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vbicq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vandq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vaddq_m_n_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vaddq_m_f, v8hf, v4sf)
+ VAR2 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vabdq_m_f, v8hf, v4sf)
+ VAR3 (STRS, vstrbq_s, v16qi, v8hi, v4si)
+ VAR3 (STRU, vstrbq_u, v16qi, v8hi, v4si)
+ VAR3 (STRSS, vstrbq_scatter_offset_s, v16qi, v8hi, v4si)
+ VAR3 (STRSU, vstrbq_scatter_offset_u, v16qi, v8hi, v4si)
+ VAR1 (STRSBS, vstrwq_scatter_base_s, v4si)
+ VAR1 (STRSBU, vstrwq_scatter_base_u, v4si)
+ VAR3 (LDRGU, vldrbq_gather_offset_u, v16qi, v8hi, v4si)
+ VAR3 (LDRGS, vldrbq_gather_offset_s, v16qi, v8hi, v4si)
+ VAR3 (LDRS, vldrbq_s, v16qi, v8hi, v4si)
+ VAR3 (LDRU, vldrbq_u, v16qi, v8hi, v4si)
+ VAR1 (LDRGBS, vldrwq_gather_base_s, v4si)
+ VAR1 (LDRGBU, vldrwq_gather_base_u, v4si)
+ VAR3 (STRS_P, vstrbq_p_s, v16qi, v8hi, v4si)
+ VAR3 (STRU_P, vstrbq_p_u, v16qi, v8hi, v4si)
+ VAR3 (STRSS_P, vstrbq_scatter_offset_p_s, v16qi, v8hi, v4si)
+ VAR3 (STRSU_P, vstrbq_scatter_offset_p_u, v16qi, v8hi, v4si)
+ VAR1 (STRSBS_P, vstrwq_scatter_base_p_s, v4si)
+ VAR1 (STRSBU_P, vstrwq_scatter_base_p_u, v4si)
+ VAR1 (LDRGBS_Z, vldrwq_gather_base_z_s, v4si)
+ VAR1 (LDRGBU_Z, vldrwq_gather_base_z_u, v4si)
+ VAR3 (LDRGS_Z, vldrbq_gather_offset_z_s, v16qi, v8hi, v4si)
+ VAR3 (LDRGU_Z, vldrbq_gather_offset_z_u, v16qi, v8hi, v4si)
+ VAR3 (LDRS_Z, vldrbq_z_s, v16qi, v8hi, v4si)
+ VAR3 (LDRU_Z, vldrbq_z_u, v16qi, v8hi, v4si)
+ VAR3 (LDRU, vld1q_u, v16qi, v8hi, v4si)
+ VAR3 (LDRS, vld1q_s, v16qi, v8hi, v4si)
+ VAR2 (LDRU_Z, vldrhq_z_u, v8hi, v4si)
+ VAR2 (LDRU, vldrhq_u, v8hi, v4si)
+ VAR2 (LDRS_Z, vldrhq_z_s, v8hi, v4si)
+ VAR2 (LDRS, vldrhq_s, v8hi, v4si)
+ VAR2 (LDRS, vld1q_f, v8hf, v4sf)
+ VAR2 (LDRGU_Z, vldrhq_gather_shifted_offset_z_u, v8hi, v4si)
+ VAR2 (LDRGU_Z, vldrhq_gather_offset_z_u, v8hi, v4si)
+ VAR2 (LDRGU, vldrhq_gather_shifted_offset_u, v8hi, v4si)
+ VAR2 (LDRGU, vldrhq_gather_offset_u, v8hi, v4si)
+ VAR2 (LDRGS_Z, vldrhq_gather_shifted_offset_z_s, v8hi, v4si)
+ VAR2 (LDRGS_Z, vldrhq_gather_offset_z_s, v8hi, v4si)
+ VAR2 (LDRGS, vldrhq_gather_shifted_offset_s, v8hi, v4si)
+ VAR2 (LDRGS, vldrhq_gather_offset_s, v8hi, v4si)
+ VAR1 (LDRS, vldrhq_f, v8hf)
+ VAR1 (LDRS_Z, vldrhq_z_f, v8hf)
+ VAR1 (LDRS, vldrwq_f, v4sf)
+ VAR1 (LDRS, vldrwq_s, v4si)
+ VAR1 (LDRU, vldrwq_u, v4si)
+ VAR1 (LDRS_Z, vldrwq_z_f, v4sf)
+ VAR1 (LDRS_Z, vldrwq_z_s, v4si)
+ VAR1 (LDRU_Z, vldrwq_z_u, v4si)
+ VAR1 (LDRGBS, vldrdq_gather_base_s, v2di)
+ VAR1 (LDRGBS, vldrwq_gather_base_f, v4sf)
+ VAR1 (LDRGBS_Z, vldrdq_gather_base_z_s, v2di)
+ VAR1 (LDRGBS_Z, vldrwq_gather_base_z_f, v4sf)
+ VAR1 (LDRGBU, vldrdq_gather_base_u, v2di)
+ VAR1 (LDRGBU_Z, vldrdq_gather_base_z_u, v2di)
+ VAR1 (LDRGS, vldrdq_gather_offset_s, v2di)
+ VAR1 (LDRGS, vldrdq_gather_shifted_offset_s, v2di)
+ VAR1 (LDRGS, vldrhq_gather_offset_f, v8hf)
+ VAR1 (LDRGS, vldrhq_gather_shifted_offset_f, v8hf)
+ VAR1 (LDRGS, vldrwq_gather_offset_f, v4sf)
+ VAR1 (LDRGS, vldrwq_gather_offset_s, v4si)
+ VAR1 (LDRGS, vldrwq_gather_shifted_offset_f, v4sf)
+ VAR1 (LDRGS, vldrwq_gather_shifted_offset_s, v4si)
+ VAR1 (LDRGS_Z, vldrdq_gather_offset_z_s, v2di)
+ VAR1 (LDRGS_Z, vldrdq_gather_shifted_offset_z_s, v2di)
+ VAR1 (LDRGS_Z, vldrhq_gather_offset_z_f, v8hf)
+ VAR1 (LDRGS_Z, vldrhq_gather_shifted_offset_z_f, v8hf)
+ VAR1 (LDRGS_Z, vldrwq_gather_offset_z_f, v4sf)
+ VAR1 (LDRGS_Z, vldrwq_gather_offset_z_s, v4si)
+ VAR1 (LDRGS_Z, vldrwq_gather_shifted_offset_z_f, v4sf)
+ VAR1 (LDRGS_Z, vldrwq_gather_shifted_offset_z_s, v4si)
+ VAR1 (LDRGU, vldrdq_gather_offset_u, v2di)
+ VAR1 (LDRGU, vldrdq_gather_shifted_offset_u, v2di)
+ VAR1 (LDRGU, vldrwq_gather_offset_u, v4si)
+ VAR1 (LDRGU, vldrwq_gather_shifted_offset_u, v4si)
+ VAR1 (LDRGU_Z, vldrdq_gather_offset_z_u, v2di)
+ VAR1 (LDRGU_Z, vldrdq_gather_shifted_offset_z_u, v2di)
+ VAR1 (LDRGU_Z, vldrwq_gather_offset_z_u, v4si)
+ VAR1 (LDRGU_Z, vldrwq_gather_shifted_offset_z_u, v4si)
+ VAR3 (STRU, vst1q_u, v16qi, v8hi, v4si)
+ VAR3 (STRS, vst1q_s, v16qi, v8hi, v4si)
+ VAR2 (STRU_P, vstrhq_p_u, v8hi, v4si)
+ VAR2 (STRU, vstrhq_u, v8hi, v4si)
+ VAR2 (STRS_P, vstrhq_p_s, v8hi, v4si)
+ VAR2 (STRS, vstrhq_s, v8hi, v4si)
+ VAR2 (STRS, vst1q_f, v8hf, v4sf)
+ VAR2 (STRSU_P, vstrhq_scatter_shifted_offset_p_u, v8hi, v4si)
+ VAR2 (STRSU_P, vstrhq_scatter_offset_p_u, v8hi, v4si)
+ VAR2 (STRSU, vstrhq_scatter_shifted_offset_u, v8hi, v4si)
+ VAR2 (STRSU, vstrhq_scatter_offset_u, v8hi, v4si)
+ VAR2 (STRSS_P, vstrhq_scatter_shifted_offset_p_s, v8hi, v4si)
+ VAR2 (STRSS_P, vstrhq_scatter_offset_p_s, v8hi, v4si)
+ VAR2 (STRSS, vstrhq_scatter_shifted_offset_s, v8hi, v4si)
+ VAR2 (STRSS, vstrhq_scatter_offset_s, v8hi, v4si)
+ VAR1 (STRS, vstrhq_f, v8hf)
+ VAR1 (STRS_P, vstrhq_p_f, v8hf)
+ VAR1 (STRS, vstrwq_f, v4sf)
+ VAR1 (STRS, vstrwq_s, v4si)
+ VAR1 (STRU, vstrwq_u, v4si)
+ VAR1 (STRS_P, vstrwq_p_f, v4sf)
+ VAR1 (STRS_P, vstrwq_p_s, v4si)
+ VAR1 (STRU_P, vstrwq_p_u, v4si)
+ VAR1 (STRSBS, vstrdq_scatter_base_s, v2di)
+ VAR1 (STRSBS, vstrwq_scatter_base_f, v4sf)
+ VAR1 (STRSBS_P, vstrdq_scatter_base_p_s, v2di)
+ VAR1 (STRSBS_P, vstrwq_scatter_base_p_f, v4sf)
+ VAR1 (STRSBU, vstrdq_scatter_base_u, v2di)
+ VAR1 (STRSBU_P, vstrdq_scatter_base_p_u, v2di)
+ VAR1 (STRSS, vstrdq_scatter_offset_s, v2di)
+ VAR1 (STRSS, vstrdq_scatter_shifted_offset_s, v2di)
+ VAR1 (STRSS, vstrhq_scatter_offset_f, v8hf)
+ VAR1 (STRSS, vstrhq_scatter_shifted_offset_f, v8hf)
+ VAR1 (STRSS, vstrwq_scatter_offset_f, v4sf)
+ VAR1 (STRSS, vstrwq_scatter_offset_s, v4si)
+ VAR1 (STRSS, vstrwq_scatter_shifted_offset_f, v4sf)
+ VAR1 (STRSS, vstrwq_scatter_shifted_offset_s, v4si)
+ VAR1 (STRSS_P, vstrdq_scatter_offset_p_s, v2di)
+ VAR1 (STRSS_P, vstrdq_scatter_shifted_offset_p_s, v2di)
+ VAR1 (STRSS_P, vstrhq_scatter_offset_p_f, v8hf)
+ VAR1 (STRSS_P, vstrhq_scatter_shifted_offset_p_f, v8hf)
+ VAR1 (STRSS_P, vstrwq_scatter_offset_p_f, v4sf)
+ VAR1 (STRSS_P, vstrwq_scatter_offset_p_s, v4si)
+ VAR1 (STRSS_P, vstrwq_scatter_shifted_offset_p_f, v4sf)
+ VAR1 (STRSS_P, vstrwq_scatter_shifted_offset_p_s, v4si)
+ VAR1 (STRSU, vstrdq_scatter_offset_u, v2di)
+ VAR1 (STRSU, vstrdq_scatter_shifted_offset_u, v2di)
+ VAR1 (STRSU, vstrwq_scatter_offset_u, v4si)
+ VAR1 (STRSU, vstrwq_scatter_shifted_offset_u, v4si)
+ VAR1 (STRSU_P, vstrdq_scatter_offset_p_u, v2di)
+ VAR1 (STRSU_P, vstrdq_scatter_shifted_offset_p_u, v2di)
+ VAR1 (STRSU_P, vstrwq_scatter_offset_p_u, v4si)
+ VAR1 (STRSU_P, vstrwq_scatter_shifted_offset_p_u, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_IMM, viwdupq_wb_u, v16qi, v4si, v8hi)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_IMM, vdwdupq_wb_u, v16qi, v4si, v8hi)
+ VAR3 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE, viwdupq_m_wb_u, v16qi, v8hi, v4si)
+ VAR3 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE, vdwdupq_m_wb_u, v16qi, v8hi, v4si)
+ VAR3 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE, viwdupq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE, vdwdupq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_IMM, vddupq_n_u, v16qi, v8hi, v4si)
+ VAR3 (BINOP_UNONE_UNONE_IMM, vidupq_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vddupq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vidupq_m_n_u, v16qi, v8hi, v4si)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_IMM, vdwdupq_n_u, v16qi, v4si, v8hi)
+ VAR3 (TERNOP_UNONE_UNONE_UNONE_IMM, viwdupq_n_u, v16qi, v4si, v8hi)
+ VAR1 (STRSBWBU, vstrwq_scatter_base_wb_u, v4si)
+ VAR1 (STRSBWBU, vstrwq_scatter_base_wb_add_u, v4si)
+ VAR1 (STRSBWBU, vstrwq_scatter_base_wb_add_s, v4si)
+ VAR1 (STRSBWBU, vstrwq_scatter_base_wb_add_f, v4sf)
+ VAR1 (STRSBWBU, vstrdq_scatter_base_wb_u, v2di)
+ VAR1 (STRSBWBU, vstrdq_scatter_base_wb_add_u, v2di)
+ VAR1 (STRSBWBU, vstrdq_scatter_base_wb_add_s, v2di)
+ VAR1 (STRSBWBU_P, vstrwq_scatter_base_wb_p_u, v4si)
+ VAR1 (STRSBWBU_P, vstrwq_scatter_base_wb_p_add_u, v4si)
+ VAR1 (STRSBWBU_P, vstrwq_scatter_base_wb_p_add_s, v4si)
+ VAR1 (STRSBWBU_P, vstrwq_scatter_base_wb_p_add_f, v4sf)
+ VAR1 (STRSBWBU_P, vstrdq_scatter_base_wb_p_u, v2di)
+ VAR1 (STRSBWBU_P, vstrdq_scatter_base_wb_p_add_u, v2di)
+ VAR1 (STRSBWBU_P, vstrdq_scatter_base_wb_p_add_s, v2di)
+ VAR1 (STRSBWBS, vstrwq_scatter_base_wb_s, v4si)
+ VAR1 (STRSBWBS, vstrwq_scatter_base_wb_f, v4sf)
+ VAR1 (STRSBWBS, vstrdq_scatter_base_wb_s, v2di)
+ VAR1 (STRSBWBS_P, vstrwq_scatter_base_wb_p_s, v4si)
+ VAR1 (STRSBWBS_P, vstrwq_scatter_base_wb_p_f, v4sf)
+ VAR1 (STRSBWBS_P, vstrdq_scatter_base_wb_p_s, v2di)
+ VAR1 (LDRGBWBU_Z, vldrwq_gather_base_nowb_z_u, v4si)
+ VAR1 (LDRGBWBU_Z, vldrdq_gather_base_nowb_z_u, v2di)
+ VAR1 (LDRGBWBU, vldrwq_gather_base_nowb_u, v4si)
+ VAR1 (LDRGBWBU, vldrdq_gather_base_nowb_u, v2di)
+ VAR1 (LDRGBWBS_Z, vldrwq_gather_base_nowb_z_s, v4si)
+ VAR1 (LDRGBWBS_Z, vldrwq_gather_base_nowb_z_f, v4sf)
+ VAR1 (LDRGBWBS_Z, vldrdq_gather_base_nowb_z_s, v2di)
+ VAR1 (LDRGBWBS, vldrwq_gather_base_nowb_s, v4si)
+ VAR1 (LDRGBWBS, vldrwq_gather_base_nowb_f, v4sf)
+ VAR1 (LDRGBWBS, vldrdq_gather_base_nowb_s, v2di)
+ VAR1 (LDRGBWBXU_Z, vldrdq_gather_base_wb_z_s, v2di)
+ VAR1 (LDRGBWBXU_Z, vldrdq_gather_base_wb_z_u, v2di)
+ VAR1 (LDRGBWBXU, vldrdq_gather_base_wb_s, v2di)
+ VAR1 (LDRGBWBXU, vldrdq_gather_base_wb_u, v2di)
+ VAR1 (LDRGBWBXU_Z, vldrwq_gather_base_wb_z_s, v4si)
+ VAR1 (LDRGBWBXU_Z, vldrwq_gather_base_wb_z_f, v4sf)
+ VAR1 (LDRGBWBXU_Z, vldrwq_gather_base_wb_z_u, v4si)
+ VAR1 (LDRGBWBXU, vldrwq_gather_base_wb_s, v4si)
+ VAR1 (LDRGBWBXU, vldrwq_gather_base_wb_f, v4sf)
+ VAR1 (LDRGBWBXU, vldrwq_gather_base_wb_u, v4si)
+ VAR1 (BINOP_NONE_NONE_NONE, vadciq_s, v4si)
+ VAR1 (BINOP_UNONE_UNONE_UNONE, vadciq_u, v4si)
+ VAR1 (BINOP_NONE_NONE_NONE, vadcq_s, v4si)
+ VAR1 (BINOP_UNONE_UNONE_UNONE, vadcq_u, v4si)
+ VAR1 (BINOP_NONE_NONE_NONE, vsbciq_s, v4si)
+ VAR1 (BINOP_UNONE_UNONE_UNONE, vsbciq_u, v4si)
+ VAR1 (BINOP_NONE_NONE_NONE, vsbcq_s, v4si)
+ VAR1 (BINOP_UNONE_UNONE_UNONE, vsbcq_u, v4si)
+ VAR1 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vadciq_m_s, v4si)
+ VAR1 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vadciq_m_u, v4si)
+ VAR1 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vadcq_m_s, v4si)
+ VAR1 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vadcq_m_u, v4si)
+ VAR1 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vsbciq_m_s, v4si)
+ VAR1 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vsbciq_m_u, v4si)
+ VAR1 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vsbcq_m_s, v4si)
+ VAR1 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE, vsbcq_m_u, v4si)
+ VAR5 (STORE1, vst2q, v16qi, v8hi, v4si, v8hf, v4sf)
+ VAR5 (LOAD1, vld4q, v16qi, v8hi, v4si, v8hf, v4sf)
+ VAR5 (LOAD1, vld2q, v16qi, v8hi, v4si, v8hf, v4sf)
+ VAR1 (ASRL, sqrshr_,si)
+ VAR1 (ASRL, sqrshrl_sat64_,di)
+ VAR1 (ASRL, sqrshrl_sat48_,di)
+ VAR1 (LSLL, uqrshl_, si)
+ VAR1 (LSLL, uqrshll_sat64_, di)
+ VAR1 (LSLL, uqrshll_sat48_, di)
+ VAR1 (SQSHL,srshr_,si)
+ VAR1 (SQSHL,srshrl_,di)
+ VAR1 (SQSHL,sqshl_,si)
+ VAR1 (SQSHL,sqshll_,di)
+ VAR1 (UQSHL, urshr_, si)
+ VAR1 (UQSHL, urshrl_, di)
+ VAR1 (UQSHL, uqshl_, si)
+ VAR1 (UQSHL, uqshll_, di)
+ VAR3 (QUADOP_NONE_NONE_UNONE_IMM_UNONE, vshlcq_m_vec_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_NONE_NONE_UNONE_IMM_UNONE, vshlcq_m_carry_s, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vshlcq_m_vec_u, v16qi, v8hi, v4si)
+ VAR3 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vshlcq_m_carry_u, v16qi, v8hi, v4si)
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm_mve_types.h gcc-10.1.0/gcc/config/arm/arm_mve_types.h
*** gcc-9.3.0/gcc/config/arm/arm_mve_types.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/arm/arm_mve_types.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,1490 ----
+ /* Arm MVE intrinsics include file.
+ 
+    Copyright (C) 2020 Free Software Foundation, Inc.
+    Contributed by Arm.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published
+    by the Free Software Foundation; either version 3, or (at your
+    option) any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef _GCC_ARM_MVE_TYPES_H
+ #define _GCC_ARM_MVE_TYPES_H
+ 
+ #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point.  */
+ typedef __fp16 float16_t;
+ typedef float float32_t;
+ typedef __simd128_float16_t float16x8_t;
+ typedef __simd128_float32_t float32x4_t;
+ 
+ typedef struct { float16x8_t val[2]; } float16x8x2_t;
+ typedef struct { float16x8_t val[4]; } float16x8x4_t;
+ typedef struct { float32x4_t val[2]; } float32x4x2_t;
+ typedef struct { float32x4_t val[4]; } float32x4x4_t;
+ #endif
+ 
+ typedef uint16_t mve_pred16_t;
+ typedef __simd128_uint8_t uint8x16_t;
+ typedef __simd128_uint16_t uint16x8_t;
+ typedef __simd128_uint32_t uint32x4_t;
+ typedef __simd128_uint64_t uint64x2_t;
+ typedef __simd128_int8_t int8x16_t;
+ typedef __simd128_int16_t int16x8_t;
+ typedef __simd128_int32_t int32x4_t;
+ typedef __simd128_int64_t int64x2_t;
+ 
+ typedef struct { int16x8_t val[2]; } int16x8x2_t;
+ typedef struct { int16x8_t val[4]; } int16x8x4_t;
+ typedef struct { int32x4_t val[2]; } int32x4x2_t;
+ typedef struct { int32x4_t val[4]; } int32x4x4_t;
+ typedef struct { int8x16_t val[2]; } int8x16x2_t;
+ typedef struct { int8x16_t val[4]; } int8x16x4_t;
+ typedef struct { uint16x8_t val[2]; } uint16x8x2_t;
+ typedef struct { uint16x8_t val[4]; } uint16x8x4_t;
+ typedef struct { uint32x4_t val[2]; } uint32x4x2_t;
+ typedef struct { uint32x4_t val[4]; } uint32x4x4_t;
+ typedef struct { uint8x16_t val[2]; } uint8x16x2_t;
+ typedef struct { uint8x16_t val[4]; } uint8x16x4_t;
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16_s32 (int32x4_t __a)
+ {
+   return (int16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16_s64 (int64x2_t __a)
+ {
+   return (int16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16_s8 (int8x16_t __a)
+ {
+   return (int16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16_u16 (uint16x8_t __a)
+ {
+   return (int16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16_u32 (uint32x4_t __a)
+ {
+   return (int16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16_u64 (uint64x2_t __a)
+ {
+   return (int16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16_u8 (uint8x16_t __a)
+ {
+   return (int16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32_s16 (int16x8_t __a)
+ {
+   return (int32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32_s64 (int64x2_t __a)
+ {
+   return (int32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32_s8 (int8x16_t __a)
+ {
+   return (int32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32_u16 (uint16x8_t __a)
+ {
+   return (int32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32_u32 (uint32x4_t __a)
+ {
+   return (int32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32_u64 (uint64x2_t __a)
+ {
+   return (int32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32_u8 (uint8x16_t __a)
+ {
+   return (int32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64_s16 (int16x8_t __a)
+ {
+   return (int64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64_s32 (int32x4_t __a)
+ {
+   return (int64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64_s8 (int8x16_t __a)
+ {
+   return (int64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64_u16 (uint16x8_t __a)
+ {
+   return (int64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64_u32 (uint32x4_t __a)
+ {
+   return (int64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64_u64 (uint64x2_t __a)
+ {
+   return (int64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64_u8 (uint8x16_t __a)
+ {
+   return (int64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8_s16 (int16x8_t __a)
+ {
+   return (int8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8_s32 (int32x4_t __a)
+ {
+   return (int8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8_s64 (int64x2_t __a)
+ {
+   return (int8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8_u16 (uint16x8_t __a)
+ {
+   return (int8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8_u32 (uint32x4_t __a)
+ {
+   return (int8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8_u64 (uint64x2_t __a)
+ {
+   return (int8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8_u8 (uint8x16_t __a)
+ {
+   return (int8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16_s16 (int16x8_t __a)
+ {
+   return (uint16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16_s32 (int32x4_t __a)
+ {
+   return (uint16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16_s64 (int64x2_t __a)
+ {
+   return (uint16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16_s8 (int8x16_t __a)
+ {
+   return (uint16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16_u32 (uint32x4_t __a)
+ {
+   return (uint16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16_u64 (uint64x2_t __a)
+ {
+   return (uint16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16_u8 (uint8x16_t __a)
+ {
+   return (uint16x8_t)  __a;
+ }
+ 
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32_s16 (int16x8_t __a)
+ {
+   return (uint32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32_s32 (int32x4_t __a)
+ {
+   return (uint32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32_s64 (int64x2_t __a)
+ {
+   return (uint32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32_s8 (int8x16_t __a)
+ {
+   return (uint32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32_u16 (uint16x8_t __a)
+ {
+   return (uint32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32_u64 (uint64x2_t __a)
+ {
+   return (uint32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32_u8 (uint8x16_t __a)
+ {
+   return (uint32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64_s16 (int16x8_t __a)
+ {
+   return (uint64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64_s32 (int32x4_t __a)
+ {
+   return (uint64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64_s64 (int64x2_t __a)
+ {
+   return (uint64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64_s8 (int8x16_t __a)
+ {
+   return (uint64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64_u16 (uint16x8_t __a)
+ {
+   return (uint64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64_u32 (uint32x4_t __a)
+ {
+   return (uint64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64_u8 (uint8x16_t __a)
+ {
+   return (uint64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8_s16 (int16x8_t __a)
+ {
+   return (uint8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8_s32 (int32x4_t __a)
+ {
+   return (uint8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8_s64 (int64x2_t __a)
+ {
+   return (uint8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8_s8 (int8x16_t __a)
+ {
+   return (uint8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8_u16 (uint16x8_t __a)
+ {
+   return (uint8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8_u32 (uint32x4_t __a)
+ {
+   return (uint8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8_u64 (uint64x2_t __a)
+ {
+   return (uint8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq_u8 (void)
+ {
+   uint8x16_t __uninit;
+   __asm__ ("": "=w"(__uninit));
+   return __uninit;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq_u16 (void)
+ {
+   uint16x8_t __uninit;
+   __asm__ ("": "=w"(__uninit));
+   return __uninit;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq_u32 (void)
+ {
+   uint32x4_t __uninit;
+   __asm__ ("": "=w"(__uninit));
+   return __uninit;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq_u64 (void)
+ {
+   uint64x2_t __uninit;
+   __asm__ ("": "=w"(__uninit));
+   return __uninit;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq_s8 (void)
+ {
+   int8x16_t __uninit;
+   __asm__ ("": "=w"(__uninit));
+   return __uninit;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq_s16 (void)
+ {
+   int16x8_t __uninit;
+   __asm__ ("": "=w"(__uninit));
+   return __uninit;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq_s32 (void)
+ {
+   int32x4_t __uninit;
+   __asm__ ("": "=w"(__uninit));
+   return __uninit;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq_s64 (void)
+ {
+   int64x2_t __uninit;
+   __asm__ ("": "=w"(__uninit));
+   return __uninit;
+ }
+ 
+ #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point.  */
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32_f16 (float16x8_t __a)
+ {
+   return (int32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32_f32 (float32x4_t __a)
+ {
+   return (int32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16_f16 (float16x8_t __a)
+ {
+   return (int16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16_f32 (float32x4_t __a)
+ {
+   return (int16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64_f16 (float16x8_t __a)
+ {
+   return (int64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64_f32 (float32x4_t __a)
+ {
+   return (int64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8_f16 (float16x8_t __a)
+ {
+   return (int8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8_f32 (float32x4_t __a)
+ {
+   return (int8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16_f16 (float16x8_t __a)
+ {
+   return (uint16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16_f32 (float32x4_t __a)
+ {
+   return (uint16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32_f16 (float16x8_t __a)
+ {
+   return (uint32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32_f32 (float32x4_t __a)
+ {
+   return (uint32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64_f16 (float16x8_t __a)
+ {
+   return (uint64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64_f32 (float32x4_t __a)
+ {
+   return (uint64x2_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8_f16 (float16x8_t __a)
+ {
+   return (uint8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8_f32 (float32x4_t __a)
+ {
+   return (uint8x16_t)  __a;
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16_f32 (float32x4_t __a)
+ {
+   return (float16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16_s16 (int16x8_t __a)
+ {
+   return (float16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16_s32 (int32x4_t __a)
+ {
+   return (float16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16_s64 (int64x2_t __a)
+ {
+   return (float16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16_s8 (int8x16_t __a)
+ {
+   return (float16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16_u16 (uint16x8_t __a)
+ {
+   return (float16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16_u32 (uint32x4_t __a)
+ {
+   return (float16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16_u64 (uint64x2_t __a)
+ {
+   return (float16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16_u8 (uint8x16_t __a)
+ {
+   return (float16x8_t)  __a;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32_f16 (float16x8_t __a)
+ {
+   return (float32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32_s16 (int16x8_t __a)
+ {
+   return (float32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32_s32 (int32x4_t __a)
+ {
+   return (float32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32_s64 (int64x2_t __a)
+ {
+   return (float32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32_s8 (int8x16_t __a)
+ {
+   return (float32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32_u16 (uint16x8_t __a)
+ {
+   return (float32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32_u32 (uint32x4_t __a)
+ {
+   return (float32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32_u64 (uint64x2_t __a)
+ {
+   return (float32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32_u8 (uint8x16_t __a)
+ {
+   return (float32x4_t)  __a;
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq_f16 (void)
+ {
+   float16x8_t __uninit;
+   __asm__ ("": "=w" (__uninit));
+   return __uninit;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq_f32 (void)
+ {
+   float32x4_t __uninit;
+   __asm__ ("": "=w" (__uninit));
+   return __uninit;
+ }
+ 
+ #endif
+ 
+ #ifdef __cplusplus
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16 (int32x4_t __a)
+ {
+  return __arm_vreinterpretq_s16_s32 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16 (int64x2_t __a)
+ {
+  return __arm_vreinterpretq_s16_s64 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16 (int8x16_t __a)
+ {
+  return __arm_vreinterpretq_s16_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16 (uint16x8_t __a)
+ {
+  return __arm_vreinterpretq_s16_u16 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16 (uint32x4_t __a)
+ {
+  return __arm_vreinterpretq_s16_u32 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16 (uint64x2_t __a)
+ {
+  return __arm_vreinterpretq_s16_u64 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16 (uint8x16_t __a)
+ {
+  return __arm_vreinterpretq_s16_u8 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32 (int16x8_t __a)
+ {
+  return __arm_vreinterpretq_s32_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32 (int64x2_t __a)
+ {
+  return __arm_vreinterpretq_s32_s64 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32 (int8x16_t __a)
+ {
+  return __arm_vreinterpretq_s32_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32 (uint16x8_t __a)
+ {
+  return __arm_vreinterpretq_s32_u16 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32 (uint32x4_t __a)
+ {
+  return __arm_vreinterpretq_s32_u32 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32 (uint64x2_t __a)
+ {
+  return __arm_vreinterpretq_s32_u64 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32 (uint8x16_t __a)
+ {
+  return __arm_vreinterpretq_s32_u8 (__a);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64 (int16x8_t __a)
+ {
+  return __arm_vreinterpretq_s64_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64 (int32x4_t __a)
+ {
+  return __arm_vreinterpretq_s64_s32 (__a);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64 (int8x16_t __a)
+ {
+  return __arm_vreinterpretq_s64_s8 (__a);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64 (uint16x8_t __a)
+ {
+  return __arm_vreinterpretq_s64_u16 (__a);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64 (uint32x4_t __a)
+ {
+  return __arm_vreinterpretq_s64_u32 (__a);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64 (uint64x2_t __a)
+ {
+  return __arm_vreinterpretq_s64_u64 (__a);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64 (uint8x16_t __a)
+ {
+  return __arm_vreinterpretq_s64_u8 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8 (int16x8_t __a)
+ {
+  return __arm_vreinterpretq_s8_s16 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8 (int32x4_t __a)
+ {
+  return __arm_vreinterpretq_s8_s32 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8 (int64x2_t __a)
+ {
+  return __arm_vreinterpretq_s8_s64 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8 (uint16x8_t __a)
+ {
+  return __arm_vreinterpretq_s8_u16 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8 (uint32x4_t __a)
+ {
+  return __arm_vreinterpretq_s8_u32 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8 (uint64x2_t __a)
+ {
+  return __arm_vreinterpretq_s8_u64 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8 (uint8x16_t __a)
+ {
+  return __arm_vreinterpretq_s8_u8 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16 (int16x8_t __a)
+ {
+  return __arm_vreinterpretq_u16_s16 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16 (int32x4_t __a)
+ {
+  return __arm_vreinterpretq_u16_s32 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16 (int64x2_t __a)
+ {
+  return __arm_vreinterpretq_u16_s64 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16 (int8x16_t __a)
+ {
+  return __arm_vreinterpretq_u16_s8 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16 (uint32x4_t __a)
+ {
+  return __arm_vreinterpretq_u16_u32 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16 (uint64x2_t __a)
+ {
+  return __arm_vreinterpretq_u16_u64 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16 (uint8x16_t __a)
+ {
+  return __arm_vreinterpretq_u16_u8 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32 (int16x8_t __a)
+ {
+  return __arm_vreinterpretq_u32_s16 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32 (int32x4_t __a)
+ {
+  return __arm_vreinterpretq_u32_s32 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32 (int64x2_t __a)
+ {
+  return __arm_vreinterpretq_u32_s64 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32 (int8x16_t __a)
+ {
+  return __arm_vreinterpretq_u32_s8 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32 (uint16x8_t __a)
+ {
+  return __arm_vreinterpretq_u32_u16 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32 (uint64x2_t __a)
+ {
+  return __arm_vreinterpretq_u32_u64 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32 (uint8x16_t __a)
+ {
+  return __arm_vreinterpretq_u32_u8 (__a);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64 (int16x8_t __a)
+ {
+  return __arm_vreinterpretq_u64_s16 (__a);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64 (int32x4_t __a)
+ {
+  return __arm_vreinterpretq_u64_s32 (__a);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64 (int64x2_t __a)
+ {
+  return __arm_vreinterpretq_u64_s64 (__a);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64 (int8x16_t __a)
+ {
+  return __arm_vreinterpretq_u64_s8 (__a);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64 (uint16x8_t __a)
+ {
+  return __arm_vreinterpretq_u64_u16 (__a);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64 (uint32x4_t __a)
+ {
+  return __arm_vreinterpretq_u64_u32 (__a);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64 (uint8x16_t __a)
+ {
+  return __arm_vreinterpretq_u64_u8 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8 (int16x8_t __a)
+ {
+  return __arm_vreinterpretq_u8_s16 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8 (int32x4_t __a)
+ {
+  return __arm_vreinterpretq_u8_s32 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8 (int64x2_t __a)
+ {
+  return __arm_vreinterpretq_u8_s64 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8 (int8x16_t __a)
+ {
+  return __arm_vreinterpretq_u8_s8 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8 (uint16x8_t __a)
+ {
+  return __arm_vreinterpretq_u8_u16 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8 (uint32x4_t __a)
+ {
+  return __arm_vreinterpretq_u8_u32 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8 (uint64x2_t __a)
+ {
+  return __arm_vreinterpretq_u8_u64 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq (uint8x16_t /* __v ATTRIBUTE UNUSED */)
+ {
+  return __arm_vuninitializedq_u8 ();
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq (uint16x8_t /* __v ATTRIBUTE UNUSED */)
+ {
+  return __arm_vuninitializedq_u16 ();
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq (uint32x4_t /* __v ATTRIBUTE UNUSED */)
+ {
+  return __arm_vuninitializedq_u32 ();
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq (uint64x2_t /* __v ATTRIBUTE UNUSED */)
+ {
+  return __arm_vuninitializedq_u64 ();
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq (int8x16_t /* __v ATTRIBUTE UNUSED */)
+ {
+  return __arm_vuninitializedq_s8 ();
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq (int16x8_t /* __v ATTRIBUTE UNUSED */)
+ {
+  return __arm_vuninitializedq_s16 ();
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq (int32x4_t /* __v ATTRIBUTE UNUSED */)
+ {
+  return __arm_vuninitializedq_s32 ();
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq (int64x2_t /* __v ATTRIBUTE UNUSED */)
+ {
+  return __arm_vuninitializedq_s64 ();
+ }
+ 
+ #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point.  */
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32 (float16x8_t __a)
+ {
+  return __arm_vreinterpretq_s32_f16 (__a);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s32 (float32x4_t __a)
+ {
+  return __arm_vreinterpretq_s32_f32 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16 (float16x8_t __a)
+ {
+  return __arm_vreinterpretq_s16_f16 (__a);
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s16 (float32x4_t __a)
+ {
+  return __arm_vreinterpretq_s16_f32 (__a);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64 (float16x8_t __a)
+ {
+  return __arm_vreinterpretq_s64_f16 (__a);
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s64 (float32x4_t __a)
+ {
+  return __arm_vreinterpretq_s64_f32 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8 (float16x8_t __a)
+ {
+  return __arm_vreinterpretq_s8_f16 (__a);
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_s8 (float32x4_t __a)
+ {
+  return __arm_vreinterpretq_s8_f32 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16 (float16x8_t __a)
+ {
+  return __arm_vreinterpretq_u16_f16 (__a);
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u16 (float32x4_t __a)
+ {
+  return __arm_vreinterpretq_u16_f32 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32 (float16x8_t __a)
+ {
+  return __arm_vreinterpretq_u32_f16 (__a);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u32 (float32x4_t __a)
+ {
+  return __arm_vreinterpretq_u32_f32 (__a);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64 (float16x8_t __a)
+ {
+  return __arm_vreinterpretq_u64_f16 (__a);
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u64 (float32x4_t __a)
+ {
+  return __arm_vreinterpretq_u64_f32 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8 (float16x8_t __a)
+ {
+  return __arm_vreinterpretq_u8_f16 (__a);
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_u8 (float32x4_t __a)
+ {
+  return __arm_vreinterpretq_u8_f32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16 (float32x4_t __a)
+ {
+  return __arm_vreinterpretq_f16_f32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16 (int16x8_t __a)
+ {
+  return __arm_vreinterpretq_f16_s16 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16 (int32x4_t __a)
+ {
+  return __arm_vreinterpretq_f16_s32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16 (int64x2_t __a)
+ {
+  return __arm_vreinterpretq_f16_s64 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16 (int8x16_t __a)
+ {
+  return __arm_vreinterpretq_f16_s8 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16 (uint16x8_t __a)
+ {
+  return __arm_vreinterpretq_f16_u16 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16 (uint32x4_t __a)
+ {
+  return __arm_vreinterpretq_f16_u32 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16 (uint64x2_t __a)
+ {
+  return __arm_vreinterpretq_f16_u64 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f16 (uint8x16_t __a)
+ {
+  return __arm_vreinterpretq_f16_u8 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32 (float16x8_t __a)
+ {
+  return __arm_vreinterpretq_f32_f16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32 (int16x8_t __a)
+ {
+  return __arm_vreinterpretq_f32_s16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32 (int32x4_t __a)
+ {
+  return __arm_vreinterpretq_f32_s32 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32 (int64x2_t __a)
+ {
+  return __arm_vreinterpretq_f32_s64 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32 (int8x16_t __a)
+ {
+  return __arm_vreinterpretq_f32_s8 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32 (uint16x8_t __a)
+ {
+  return __arm_vreinterpretq_f32_u16 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32 (uint32x4_t __a)
+ {
+  return __arm_vreinterpretq_f32_u32 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32 (uint64x2_t __a)
+ {
+  return __arm_vreinterpretq_f32_u64 (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vreinterpretq_f32 (uint8x16_t __a)
+ {
+  return __arm_vreinterpretq_f32_u8 (__a);
+ }
+ 
+ __extension__ extern __inline float16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq (float16x8_t /* __v ATTRIBUTE UNUSED */)
+ {
+  return __arm_vuninitializedq_f16 ();
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ __arm_vuninitializedq (float32x4_t /* __v ATTRIBUTE UNUSED */)
+ {
+  return __arm_vuninitializedq_f32 ();
+ }
+ #endif /* __ARM_FEATURE_MVE & 2 (MVE floating point)  */
+ #endif /* __cplusplus */
+ 
+ #endif /* _GCC_ARM_MVE_H.  */
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm_neon.h gcc-10.1.0/gcc/config/arm/arm_neon.h
*** gcc-9.3.0/gcc/config/arm/arm_neon.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm_neon.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* ARM NEON intrinsics include file.
  
!    Copyright (C) 2006-2019 Free Software Foundation, Inc.
     Contributed by CodeSourcery.
  
     This file is part of GCC.
--- 1,6 ----
  /* ARM NEON intrinsics include file.
  
!    Copyright (C) 2006-2020 Free Software Foundation, Inc.
     Contributed by CodeSourcery.
  
     This file is part of GCC.
*************** extern "C" {
*** 39,46 ****
--- 39,59 ----
  #endif
  
  #include <arm_fp16.h>
+ #include <arm_bf16.h>
  #include <stdint.h>
  
+ /* For big-endian, GCC's vector indices are reversed within each 64
+    bits compared to the architectural lane indices used by Neon
+    intrinsics.  */
+ #ifdef __ARM_BIG_ENDIAN
+ #define __ARM_NUM_LANES(__v) (sizeof (__v) / sizeof (__v[0]))
+ #define __arm_lane(__vec, __idx) (__idx ^ (__ARM_NUM_LANES(__vec) - 1))
+ #define __arm_laneq(__vec, __idx) (__idx ^ (__ARM_NUM_LANES(__vec)/2 - 1))
+ #else
+ #define __arm_lane(__vec, __idx) __idx
+ #define __arm_laneq(__vec, __idx) __idx
+ #endif
+ 
  typedef __simd64_int8_t int8x8_t;
  typedef __simd64_int16_t int16x4_t;
  typedef __simd64_int32_t int32x2_t;
*************** typedef __simd128_uint64_t uint64x2_t;
*** 83,88 ****
--- 96,104 ----
  
  typedef float float32_t;
  
+ typedef __simd128_bfloat16_t bfloat16x8_t;
+ typedef __simd64_bfloat16_t bfloat16x4_t;
+ 
  /* The Poly types are user visible and live in their own world,
     keep them that way.  */
  typedef __builtin_neon_poly8 poly8_t;
*************** vget_lane_s32 (int32x2_t __a, const int
*** 6140,6157 ****
     were marked always-inline so there were no call sites, the declaration
     would nonetheless raise an error.  Hence, we must use a macro instead.  */
  
-   /* For big-endian, GCC's vector indices are reversed within each 64
-      bits compared to the architectural lane indices used by Neon
-      intrinsics.  */
- #ifdef __ARM_BIG_ENDIAN
- #define __ARM_NUM_LANES(__v) (sizeof (__v) / sizeof (__v[0]))
- #define __arm_lane(__vec, __idx) (__idx ^ (__ARM_NUM_LANES(__vec) - 1))
- #define __arm_laneq(__vec, __idx) (__idx ^ (__ARM_NUM_LANES(__vec)/2 - 1))
- #else
- #define __arm_lane(__vec, __idx) __idx
- #define __arm_laneq(__vec, __idx) __idx
- #endif
- 
  #define vget_lane_f16(__v, __idx)			\
    __extension__						\
    ({							\
--- 6156,6161 ----
*************** vreinterpret_p16_u32 (uint32x2_t __a)
*** 14472,14477 ****
--- 14476,14490 ----
  #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
  __extension__ extern __inline float16x4_t
  __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_f16_bf16 (bfloat16x4_t __a)
+ {
+   return (float16x4_t) __a;
+ }
+ #endif
+ 
+ #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+ __extension__ extern __inline float16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
  vreinterpret_f16_p8 (poly8x8_t __a)
  {
    return (float16x4_t) __a;
*************** vreinterpretq_f16_p16 (poly16x8_t __a)
*** 15684,15689 ****
--- 15697,15711 ----
  #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
  __extension__ extern __inline float16x8_t
  __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_f16_bf16 (bfloat16x8_t __a)
+ {
+   return (float16x8_t) __a;
+ }
+ #endif
+ 
+ #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+ __extension__ extern __inline float16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
  vreinterpretq_f16_f32 (float32x4_t __a)
  {
    return (float16x8_t) __a;
*************** __extension__ extern __inline uint32_t
*** 16938,16974 ****
  __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
  vsha1h_u32 (uint32_t __hash_e)
  {
!   uint32x4_t __t = vdupq_n_u32 (0);
!   __t = vsetq_lane_u32 (__hash_e, __t, 0);
!   __t = __builtin_arm_crypto_sha1h (__t);
!   return vgetq_lane_u32 (__t, 0);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
  vsha1cq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
  {
!   uint32x4_t __t = vdupq_n_u32 (0);
!   __t = vsetq_lane_u32 (__hash_e, __t, 0);
!   return __builtin_arm_crypto_sha1c (__hash_abcd, __t, __wk);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
  vsha1pq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
  {
!   uint32x4_t __t = vdupq_n_u32 (0);
!   __t = vsetq_lane_u32 (__hash_e, __t, 0);
!   return __builtin_arm_crypto_sha1p (__hash_abcd, __t, __wk);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
  vsha1mq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
  {
!   uint32x4_t __t = vdupq_n_u32 (0);
!   __t = vsetq_lane_u32 (__hash_e, __t, 0);
!   return __builtin_arm_crypto_sha1m (__hash_abcd, __t, __wk);
  }
  
  __extension__ extern __inline uint32x4_t
--- 16960,16991 ----
  __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
  vsha1h_u32 (uint32_t __hash_e)
  {
!   return vgetq_lane_u32 (__builtin_arm_crypto_sha1h (vdupq_n_u32 (__hash_e)),
! 			 0);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
  vsha1cq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
  {
!   return __builtin_arm_crypto_sha1c (__hash_abcd, vdupq_n_u32 (__hash_e),
! 				     __wk);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
  vsha1pq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
  {
!   return __builtin_arm_crypto_sha1p (__hash_abcd, vdupq_n_u32 (__hash_e),
! 				     __wk);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
  vsha1mq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
  {
!   return __builtin_arm_crypto_sha1m (__hash_abcd,  vdupq_n_u32 (__hash_e),
! 				     __wk);
  }
  
  __extension__ extern __inline uint32x4_t
*************** vcmlaq_rot270_laneq_f32 (float32x4_t __r
*** 18743,18751 ****
--- 18760,19672 ----
    return __builtin_neon_vcmla_lane270v4sf (__r, __a, __b, __index);
  }
  
+ 
+ /* AdvSIMD Matrix Multiply-Accumulate and Dot Product intrinsics.  */
+ #pragma GCC push_options
+ #pragma GCC target ("arch=armv8.2-a+i8mm")
+ 
+ __extension__ extern __inline int32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vusdot_s32 (int32x2_t __r, uint8x8_t __a, int8x8_t __b)
+ {
+   return __builtin_neon_usdotv8qi_ssus (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vusdot_lane_s32 (int32x2_t __r, uint8x8_t __a,
+ 		 int8x8_t __b, const int __index)
+ {
+   return __builtin_neon_usdot_lanev8qi_ssuss (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vusdotq_lane_s32 (int32x4_t __r, uint8x16_t __a,
+ 		  int8x8_t __b, const int __index)
+ {
+   return __builtin_neon_usdot_lanev16qi_ssuss (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline int32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vsudot_lane_s32 (int32x2_t __r, int8x8_t __a,
+ 		 uint8x8_t __b, const int __index)
+ {
+   return __builtin_neon_sudot_lanev8qi_sssus (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vsudotq_lane_s32 (int32x4_t __r, int8x16_t __a,
+ 		  uint8x8_t __b, const int __index)
+ {
+   return __builtin_neon_sudot_lanev16qi_sssus (__r, __a, __b, __index);
+ }
+ 
+ #pragma GCC pop_options
+ 
  #pragma GCC pop_options
  #endif
  
+ /* AdvSIMD 8-bit Integer Matrix Multiply (I8MM) intrinsics.  */
+ 
+ #pragma GCC push_options
+ #pragma GCC target ("arch=armv8.2-a+i8mm")
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vmmlaq_s32 (int32x4_t __r, int8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_neon_smmlav16qi (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vmmlaq_u32 (uint32x4_t __r, uint8x16_t __a, uint8x16_t __b)
+ {
+   return __builtin_neon_ummlav16qi_uuuu (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vusmmlaq_s32 (int32x4_t __r, uint8x16_t __a, int8x16_t __b)
+ {
+   return __builtin_neon_usmmlav16qi_ssus (__r, __a, __b);
+ }
+ 
+ #pragma GCC pop_options
+ 
+ /* AdvSIMD Brain half-precision float-point (Bfloat16) intrinsics.  */
+ #pragma GCC push_options
+ #pragma GCC target ("arch=armv8.2-a+bf16")
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vcreate_bf16 (uint64_t __a)
+ {
+   return (bfloat16x4_t) __a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vdup_n_bf16 (bfloat16_t __a)
+ {
+   return __builtin_neon_vdup_nv4bf (__a);
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vdupq_n_bf16 (bfloat16_t __a)
+ {
+   return __builtin_neon_vdup_nv8bf (__a);
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vdup_lane_bf16 (bfloat16x4_t __a, const int __b)
+ {
+   return __builtin_neon_vdup_lanev4bf (__a, __b);
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vdupq_lane_bf16 (bfloat16x4_t __a, const int __b)
+ {
+   return __builtin_neon_vdup_lanev8bf (__a, __b);
+ }
+ 
+ #define vset_lane_bf16(__e, __v, __idx)		\
+   __extension__					\
+   ({						\
+     bfloat16_t __elem = (__e);			\
+     bfloat16x4_t __vec = (__v);			\
+     __builtin_arm_lane_check (4, __idx);	\
+     __vec[__arm_lane(__vec, __idx)] = __elem;	\
+     __vec;					\
+   })
+ 
+ #define vsetq_lane_bf16(__e, __v, __idx)		\
+   __extension__					\
+   ({						\
+     bfloat16_t __elem = (__e);			\
+     bfloat16x8_t __vec = (__v);			\
+     __builtin_arm_lane_check (8, __idx);	\
+     __vec[__arm_laneq(__vec, __idx)] = __elem;	\
+     __vec;					\
+   })
+ 
+ #define vget_lane_bf16(__v, __idx)			\
+   __extension__						\
+   ({							\
+     bfloat16x4_t __vec = (__v);				\
+     __builtin_arm_lane_check (4, __idx);		\
+     bfloat16_t __res = __vec[__arm_lane(__vec, __idx)];	\
+     __res;						\
+   })
+ 
+ #define vgetq_lane_bf16(__v, __idx)			\
+   __extension__						\
+   ({							\
+     bfloat16x8_t __vec = (__v);				\
+     __builtin_arm_lane_check (8, __idx);		\
+     bfloat16_t __res = __vec[__arm_laneq(__vec, __idx)];	\
+     __res;						\
+   })
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vdup_laneq_bf16 (bfloat16x8_t __a, const int __b)
+ {
+   return vdup_n_bf16( vgetq_lane_bf16 (__a, __b));
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vdupq_laneq_bf16 (bfloat16x8_t __a, const int __b)
+ {
+   return vdupq_n_bf16( vgetq_lane_bf16 (__a, __b));
+ }
+ 
+ __extension__ extern __inline bfloat16_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vduph_lane_bf16 (bfloat16x4_t __a, const int __b)
+ {
+   return vget_lane_bf16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline bfloat16_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vduph_laneq_bf16 (bfloat16x8_t __a, const int __b)
+ {
+   return vgetq_lane_bf16 (__a, __b);
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vget_high_bf16 (bfloat16x8_t __a)
+ {
+   return __builtin_neon_vget_highv8bf (__a);
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vget_low_bf16 (bfloat16x8_t __a)
+ {
+   return __builtin_neon_vget_lowv8bf (__a);
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vcombine_bf16 (bfloat16x4_t __a, bfloat16x4_t __b)
+ {
+   return __builtin_neon_vcombinev4bf (__a, __b);
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_u8 (uint8x8_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_u16 (uint16x4_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_u32 (uint32x2_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_u64 (uint64x1_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_s8 (int8x8_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_s16 (int16x4_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_s32 (int32x2_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_s64 (int64x1_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_p8 (poly8x8_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_p16 (poly16x4_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_p64 (poly64x1_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_f16 (float16x4_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ #endif
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_bf16_f32 (float32x2_t __a)
+ {
+   return (bfloat16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_u8 (uint8x16_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_u16 (uint16x8_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_u32 (uint32x4_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_u64 (uint64x2_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_s8 (int8x16_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_s16 (int16x8_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_s32 (int32x4_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_s64 (int64x2_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_p8 (poly8x16_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_p16 (poly16x8_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_p64 (poly64x2_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_p128 (poly128_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_f16 (float16x8_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ #endif
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_bf16_f32 (float32x4_t __a)
+ {
+   return (bfloat16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline int8x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_s8_bf16 (bfloat16x4_t __a)
+ {
+   return (int8x8_t)__a;
+ }
+ 
+ __extension__ extern __inline int16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_s16_bf16 (bfloat16x4_t __a)
+ {
+   return (int16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline int32x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_s32_bf16 (bfloat16x4_t __a)
+ {
+   return (int32x2_t)__a;
+ }
+ 
+ __extension__ extern __inline int64x1_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_s64_bf16 (bfloat16x4_t __a)
+ {
+   return (int64x1_t)__a;
+ }
+ 
+ __extension__ extern __inline uint8x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_u8_bf16 (bfloat16x4_t __a)
+ {
+   return (uint8x8_t)__a;
+ }
+ 
+ __extension__ extern __inline uint16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_u16_bf16 (bfloat16x4_t __a)
+ {
+   return (uint16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline uint32x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_u32_bf16 (bfloat16x4_t __a)
+ {
+   return (uint32x2_t)__a;
+ }
+ 
+ __extension__ extern __inline uint64x1_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_u64_bf16 (bfloat16x4_t __a)
+ {
+   return (uint64x1_t)__a;
+ }
+ 
+ __extension__ extern __inline float32x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_f32_bf16 (bfloat16x4_t __a)
+ {
+   return (float32x2_t)__a;
+ }
+ 
+ __extension__ extern __inline poly8x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_p8_bf16 (bfloat16x4_t __a)
+ {
+   return (poly8x8_t)__a;
+ }
+ 
+ __extension__ extern __inline poly16x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_p16_bf16 (bfloat16x4_t __a)
+ {
+   return (poly16x4_t)__a;
+ }
+ 
+ __extension__ extern __inline poly64x1_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpret_p64_bf16 (bfloat16x4_t __a)
+ {
+   return (poly64x1_t)__a;
+ }
+ 
+ __extension__ extern __inline int8x16_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_s8_bf16 (bfloat16x8_t __a)
+ {
+   return (int8x16_t)__a;
+ }
+ 
+ __extension__ extern __inline int16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_s16_bf16 (bfloat16x8_t __a)
+ {
+   return (int16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline int32x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_s32_bf16 (bfloat16x8_t __a)
+ {
+   return (int32x4_t)__a;
+ }
+ 
+ __extension__ extern __inline int64x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_s64_bf16 (bfloat16x8_t __a)
+ {
+   return (int64x2_t)__a;
+ }
+ 
+ __extension__ extern __inline uint8x16_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_u8_bf16 (bfloat16x8_t __a)
+ {
+   return (uint8x16_t)__a;
+ }
+ 
+ __extension__ extern __inline uint16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_u16_bf16 (bfloat16x8_t __a)
+ {
+   return (uint16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline uint32x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_u32_bf16 (bfloat16x8_t __a)
+ {
+   return (uint32x4_t)__a;
+ }
+ 
+ __extension__ extern __inline uint64x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_u64_bf16 (bfloat16x8_t __a)
+ {
+   return (uint64x2_t)__a;
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_f32_bf16 (bfloat16x8_t __a)
+ {
+   return (float32x4_t)__a;
+ }
+ 
+ __extension__ extern __inline poly8x16_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_p8_bf16 (bfloat16x8_t __a)
+ {
+   return (poly8x16_t)__a;
+ }
+ 
+ __extension__ extern __inline poly16x8_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_p16_bf16 (bfloat16x8_t __a)
+ {
+   return (poly16x8_t)__a;
+ }
+ 
+ __extension__ extern __inline poly64x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_p64_bf16 (bfloat16x8_t __a)
+ {
+   return (poly64x2_t)__a;
+ }
+ 
+ __extension__ extern __inline poly128_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vreinterpretq_p128_bf16 (bfloat16x8_t __a)
+ {
+   return (poly128_t)__a;
+ }
+ 
+ __extension__ extern __inline float32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfdot_f32 (float32x2_t __r, bfloat16x4_t __a, bfloat16x4_t __b)
+ {
+   return __builtin_neon_vbfdotv2sf (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfdotq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b)
+ {
+   return __builtin_neon_vbfdotv4sf (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline float32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfdot_lane_f32 (float32x2_t __r, bfloat16x4_t __a, bfloat16x4_t __b,
+ 		 const int __index)
+ {
+   return __builtin_neon_vbfdot_lanev4bfv2sf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfdotq_laneq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b,
+ 		   const int __index)
+ {
+   return __builtin_neon_vbfdot_lanev8bfv4sf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline float32x2_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfdot_laneq_f32 (float32x2_t __r, bfloat16x4_t __a, bfloat16x8_t __b,
+ 		  const int __index)
+ {
+   return __builtin_neon_vbfdot_lanev8bfv2sf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfdotq_lane_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x4_t __b,
+ 		  const int __index)
+ {
+   return __builtin_neon_vbfdot_lanev4bfv4sf (__r, __a, __b, __index);
+ }
+ 
+ #pragma GCC pop_options
+ 
+ #pragma GCC push_options
+ #pragma GCC target ("arch=armv8.2-a+bf16")
+ 
+ typedef struct bfloat16x4x2_t
+ {
+   bfloat16x4_t val[2];
+ } bfloat16x4x2_t;
+ 
+ typedef struct bfloat16x8x2_t
+ {
+   bfloat16x8_t val[2];
+ } bfloat16x8x2_t;
+ 
+ typedef struct bfloat16x4x3_t
+ {
+   bfloat16x4_t val[3];
+ } bfloat16x4x3_t;
+ 
+ typedef struct bfloat16x8x3_t
+ {
+   bfloat16x8_t val[3];
+ } bfloat16x8x3_t;
+ 
+ typedef struct bfloat16x4x4_t
+ {
+   bfloat16x4_t val[4];
+ } bfloat16x4x4_t;
+ 
+ typedef struct bfloat16x8x4_t
+ {
+   bfloat16x8_t val[4];
+ } bfloat16x8x4_t;
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcvt_f32_bf16 (bfloat16x4_t __a)
+ {
+   return __builtin_neon_vbfcvtv4bf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcvtq_low_f32_bf16 (bfloat16x8_t __a)
+ {
+   return __builtin_neon_vbfcvtv8bf (__a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcvtq_high_f32_bf16 (bfloat16x8_t __a)
+ {
+   return __builtin_neon_vbfcvt_highv8bf (__a);
+ }
+ 
+ __extension__ extern __inline bfloat16x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcvt_bf16_f32 (float32x4_t __a)
+ {
+   return __builtin_neon_vbfcvtv4sfv4bf (__a);
+ }
+ 
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcvtq_low_bf16_f32 (float32x4_t __a)
+ {
+   return __builtin_neon_vbfcvtv4sfv8bf (__a);
+ }
+ 
+ /* The 'inactive' operand is not converted but it provides the
+    low 64 bits to assemble the final 128-bit result.  */
+ __extension__ extern __inline bfloat16x8_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vcvtq_high_bf16_f32 (bfloat16x8_t inactive, float32x4_t __a)
+ {
+   return __builtin_neon_vbfcvtv4sf_highv8bf (inactive, __a);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmmlaq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b)
+ {
+   return __builtin_neon_vmmlav8bf (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmlalbq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b)
+ {
+   return __builtin_neon_vfmabv8bf (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmlaltq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b)
+ {
+   return __builtin_neon_vfmatv8bf (__r, __a, __b);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmlalbq_lane_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x4_t __b,
+ 		   const int __index)
+ {
+   return __builtin_neon_vfmab_lanev8bf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmlaltq_lane_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x4_t __b,
+ 		   const int __index)
+ {
+   return __builtin_neon_vfmat_lanev8bf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmlalbq_laneq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b,
+ 		    const int __index)
+ {
+   return __builtin_neon_vfmab_laneqv8bf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline float32x4_t
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vbfmlaltq_laneq_f32 (float32x4_t __r, bfloat16x8_t __a, bfloat16x8_t __b,
+ 		    const int __index)
+ {
+   return __builtin_neon_vfmat_laneqv8bf (__r, __a, __b, __index);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst2_bf16 (bfloat16_t * __ptr, bfloat16x4x2_t __val)
+ {
+   union { bfloat16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __val };
+   return __builtin_neon_vst2v4bf (__ptr, __bu.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst2q_bf16 (bfloat16_t * __ptr, bfloat16x8x2_t __val)
+ {
+   union { bfloat16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __val };
+   return __builtin_neon_vst2v8bf (__ptr, __bu.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst3_bf16 (bfloat16_t * __ptr, bfloat16x4x3_t __val)
+ {
+   union { bfloat16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __val };
+   return __builtin_neon_vst3v4bf (__ptr, __bu.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst3q_bf16 (bfloat16_t * __ptr, bfloat16x8x3_t __val)
+ {
+   union { bfloat16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __val };
+   return __builtin_neon_vst3v8bf (__ptr, __bu.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst4_bf16 (bfloat16_t * __ptr, bfloat16x4x4_t __val)
+ {
+   union { bfloat16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __val };
+   return __builtin_neon_vst4v4bf (__ptr, __bu.__o);
+ }
+ 
+ __extension__ extern __inline void
+ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+ vst4q_bf16 (bfloat16_t * __ptr, bfloat16x8x4_t __val)
+ {
+   union { bfloat16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __val };
+   return __builtin_neon_vst4v8bf (__ptr, __bu.__o);
+ }
+ 
+ __extension__ extern __inline bfloat16x4x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vld2_bf16 (bfloat16_t const * __ptr)
+ {
+   union { bfloat16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+   __rv.__o = __builtin_neon_vld2v4bf ((const __builtin_neon_bf *) __ptr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vld2q_bf16 (const bfloat16_t * __ptr)
+ {
+   union { bfloat16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__o = __builtin_neon_vld2v8bf ((const __builtin_neon_bf *) __ptr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline bfloat16x4x3_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vld3_bf16 (const bfloat16_t * __ptr)
+ {
+   union { bfloat16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+   __rv.__o = __builtin_neon_vld3v4bf ((const __builtin_neon_bf *) __ptr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x3_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vld3q_bf16 (const bfloat16_t * __ptr)
+ {
+   union { bfloat16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+   __rv.__o = __builtin_neon_vld3v8bf ((const __builtin_neon_bf *) __ptr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline bfloat16x4x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vld4_bf16 (const bfloat16_t * __ptr)
+ {
+   union { bfloat16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__o = __builtin_neon_vld4v4bf ((const __builtin_neon_bf *) __ptr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vld4q_bf16 (const bfloat16_t * __ptr)
+ {
+   union { bfloat16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__o = __builtin_neon_vld4v8bf ((const __builtin_neon_bf *) __ptr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline bfloat16x4x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vld2_dup_bf16 (const bfloat16_t * __ptr)
+ {
+   union { bfloat16x4x2_t __i; __builtin_neon_ti __o; } __rv;
+   __rv.__o = __builtin_neon_vld2_dupv4bf ((const __builtin_neon_bf *) __ptr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x2_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vld2q_dup_bf16 (const bfloat16_t * __ptr)
+ {
+   union { bfloat16x8x2_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__o = __builtin_neon_vld2_dupv8bf ((const __builtin_neon_bf *) __ptr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline bfloat16x4x3_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vld3_dup_bf16 (const bfloat16_t * __ptr)
+ {
+   union { bfloat16x4x3_t __i; __builtin_neon_ei __o; } __rv;
+   __rv.__o = __builtin_neon_vld3_dupv4bf ((const __builtin_neon_bf *) __ptr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x3_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vld3q_dup_bf16 (const bfloat16_t * __ptr)
+ {
+   union { bfloat16x8x3_t __i; __builtin_neon_ci __o; } __rv;
+   __rv.__o = __builtin_neon_vld3_dupv8bf ((const __builtin_neon_bf *) __ptr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline bfloat16x4x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vld4_dup_bf16 (const bfloat16_t * __ptr)
+ {
+   union { bfloat16x4x4_t __i; __builtin_neon_oi __o; } __rv;
+   __rv.__o = __builtin_neon_vld4_dupv4bf ((const __builtin_neon_bf *) __ptr);
+   return __rv.__i;
+ }
+ 
+ __extension__ extern __inline bfloat16x8x4_t
+ __attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+ vld4q_dup_bf16 (const bfloat16_t * __ptr)
+ {
+   union { bfloat16x8x4_t __i; __builtin_neon_xi __o; } __rv;
+   __rv.__o = __builtin_neon_vld4_dupv8bf ((const __builtin_neon_bf *) __ptr);
+   return __rv.__i;
+ }
+ 
+ #pragma GCC pop_options
+ 
  #ifdef __cplusplus
  }
  #endif
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm_neon_builtins.def gcc-10.1.0/gcc/config/arm/arm_neon_builtins.def
*** gcc-9.3.0/gcc/config/arm/arm_neon_builtins.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm_neon_builtins.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* NEON builtin definitions for ARM.
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
--- 1,5 ----
  /* NEON builtin definitions for ARM.
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
  
     This file is part of GCC.
*************** VAR10 (SETLANE, vset_lane,
*** 221,233 ****
  VAR5 (UNOP, vcreate, v8qi, v4hi, v2si, v2sf, di)
  VAR10 (UNOP, vdup_n,
  	 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
! VAR2 (UNOP, vdup_n, v8hf, v4hf)
  VAR10 (GETLANE, vdup_lane,
  	 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
! VAR2 (GETLANE, vdup_lane, v8hf, v4hf)
! VAR6 (COMBINE, vcombine, v8qi, v4hi, v4hf, v2si, v2sf, di)
! VAR6 (UNOP, vget_high, v16qi, v8hi, v8hf, v4si, v4sf, v2di)
! VAR6 (UNOP, vget_low, v16qi, v8hi, v8hf, v4si, v4sf, v2di)
  VAR3 (UNOP, vmovn, v8hi, v4si, v2di)
  VAR3 (UNOP, vqmovns, v8hi, v4si, v2di)
  VAR3 (UNOP, vqmovnu, v8hi, v4si, v2di)
--- 221,233 ----
  VAR5 (UNOP, vcreate, v8qi, v4hi, v2si, v2sf, di)
  VAR10 (UNOP, vdup_n,
  	 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
! VAR4 (UNOP, vdup_n, v8hf, v4hf, v8bf, v4bf)
  VAR10 (GETLANE, vdup_lane,
  	 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
! VAR4 (GETLANE, vdup_lane, v8hf, v4hf, v8bf, v4bf)
! VAR7 (COMBINE, vcombine, v8qi, v4hi, v4hf, v2si, v2sf, di, v4bf)
! VAR7 (UNOP, vget_high, v16qi, v8hi, v8hf, v8bf, v4si, v4sf, v2di)
! VAR7 (UNOP, vget_low, v16qi, v8hi, v8hf, v8bf, v4si, v4sf, v2di)
  VAR3 (UNOP, vmovn, v8hi, v4si, v2di)
  VAR3 (UNOP, vqmovns, v8hi, v4si, v2di)
  VAR3 (UNOP, vqmovnu, v8hi, v4si, v2di)
*************** VAR12 (STORE1, vst1,
*** 320,350 ****
  	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di)
  VAR12 (STORE1LANE, vst1_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di)
! VAR11 (LOAD1, vld2,
! 	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf)
  VAR9 (LOAD1LANE, vld2_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
! VAR6 (LOAD1, vld2_dup, v8qi, v4hi, v4hf, v2si, v2sf, di)
! VAR11 (STORE1, vst2,
! 	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf)
  VAR9 (STORE1LANE, vst2_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
! VAR11 (LOAD1, vld3,
! 	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf)
  VAR9 (LOAD1LANE, vld3_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
! VAR6 (LOAD1, vld3_dup, v8qi, v4hi, v4hf, v2si, v2sf, di)
! VAR11 (STORE1, vst3,
! 	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf)
  VAR9 (STORE1LANE, vst3_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
! VAR11 (LOAD1, vld4,
! 	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf)
  VAR9 (LOAD1LANE, vld4_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
! VAR6 (LOAD1, vld4_dup, v8qi, v4hi, v4hf, v2si, v2sf, di)
! VAR11 (STORE1, vst4,
! 	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf)
  VAR9 (STORE1LANE, vst4_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
  VAR2 (TERNOP, sdot, v8qi, v16qi)
--- 320,350 ----
  	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di)
  VAR12 (STORE1LANE, vst1_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di)
! VAR13 (LOAD1, vld2,
! 	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v4bf, v8bf)
  VAR9 (LOAD1LANE, vld2_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
! VAR8 (LOAD1, vld2_dup, v8qi, v4hi, v4hf, v2si, v2sf, di, v4bf, v8bf)
! VAR13 (STORE1, vst2,
! 	v8qi, v4hi, v4hf, v4bf, v2si, v2sf, di, v16qi, v8hi, v8hf, v8bf, v4si, v4sf)
  VAR9 (STORE1LANE, vst2_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
! VAR13 (LOAD1, vld3,
! 	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v4bf, v8bf)
  VAR9 (LOAD1LANE, vld3_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
! VAR8 (LOAD1, vld3_dup, v8qi, v4hi, v4hf, v2si, v2sf, di, v4bf, v8bf)
! VAR13 (STORE1, vst3,
! 	v8qi, v4hi, v4hf, v4bf, v2si, v2sf, di, v16qi, v8hi, v8hf, v8bf, v4si, v4sf)
  VAR9 (STORE1LANE, vst3_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
! VAR13 (LOAD1, vld4,
! 	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v4bf, v8bf)
  VAR9 (LOAD1LANE, vld4_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
! VAR8 (LOAD1, vld4_dup, v8qi, v4hi, v4hf, v2si, v2sf, di, v4bf, v8bf)
! VAR13 (STORE1, vst4,
! 	v8qi, v4hi, v4hf, v4bf, v2si, v2sf, di, v16qi, v8hi, v8hf, v8bf, v4si, v4sf)
  VAR9 (STORE1LANE, vst4_lane,
  	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
  VAR2 (TERNOP, sdot, v8qi, v16qi)
*************** VAR2 (UTERNOP, udot, v8qi, v16qi)
*** 352,357 ****
--- 352,361 ----
  VAR2 (MAC_LANE, sdot_lane, v8qi, v16qi)
  VAR2 (UMAC_LANE, udot_lane, v8qi, v16qi)
  
+ VAR1 (USTERNOP, usdot, v8qi)
+ VAR2 (USMAC_LANE_QUADTUP, usdot_lane, v8qi, v16qi)
+ VAR2 (SUMAC_LANE_QUADTUP, sudot_lane, v8qi, v16qi)
+ 
  VAR4 (BINOP, vcadd90, v4hf, v2sf, v8hf, v4sf)
  VAR4 (BINOP, vcadd270, v4hf, v2sf, v8hf, v4sf)
  VAR4 (TERNOP, vcmla0, v2sf, v4sf, v4hf, v8hf)
*************** VAR2 (MAC_LANE_PAIR, vcmlaq_lane0, v4sf,
*** 373,375 ****
--- 377,402 ----
  VAR2 (MAC_LANE_PAIR, vcmlaq_lane90, v4sf, v8hf)
  VAR2 (MAC_LANE_PAIR, vcmlaq_lane180, v4sf, v8hf)
  VAR2 (MAC_LANE_PAIR, vcmlaq_lane270, v4sf, v8hf)
+ 
+ VAR1 (TERNOP, smmla, v16qi)
+ VAR1 (UTERNOP, ummla, v16qi)
+ VAR1 (USTERNOP, usmmla, v16qi)
+ 
+ VAR2 (TERNOP, vbfdot, v2sf, v4sf)
+ VAR2 (MAC_LANE_PAIR, vbfdot_lanev4bf, v2sf, v4sf)
+ VAR2 (MAC_LANE_PAIR, vbfdot_lanev8bf, v2sf, v4sf)
+ 
+ VAR2 (UNOP, vbfcvt, sf, bf)
+ VAR2 (UNOP, vbfcvt, v4bf, v8bf)
+ VAR1 (UNOP, vbfcvt_high, v8bf)
+ VAR2 (UNOP, vbfcvtv4sf, v4bf, v8bf)
+ VAR1 (BINOP, vbfcvtv4sf_high, v8bf)
+ 
+ VAR1 (TERNOP, vmmla, v8bf)
+ 
+ VAR1 (TERNOP, vfmab, v8bf)
+ VAR1 (TERNOP, vfmat, v8bf)
+ VAR1 (MAC_LANE, vfmab_lane, v8bf)
+ VAR1 (MAC_LANE, vfmat_lane, v8bf)
+ VAR1 (MAC_LANE, vfmab_laneq, v8bf)
+ VAR1 (MAC_LANE, vfmat_laneq, v8bf)
diff -Nrcpad gcc-9.3.0/gcc/config/arm/arm_vfp_builtins.def gcc-10.1.0/gcc/config/arm/arm_vfp_builtins.def
*** gcc-9.3.0/gcc/config/arm/arm_vfp_builtins.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/arm_vfp_builtins.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* VFP instruction builtin definitions.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
     This file is part of GCC.
  
--- 1,5 ----
  /* VFP instruction builtin definitions.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arm/bpabi.h gcc-10.1.0/gcc/config/arm/bpabi.h
*** gcc-9.3.0/gcc/config/arm/bpabi.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/bpabi.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Configuration file for ARM BPABI targets.
!    Copyright (C) 2004-2019 Free Software Foundation, Inc.
     Contributed by CodeSourcery, LLC   
  
     This file is part of GCC.
--- 1,5 ----
  /* Configuration file for ARM BPABI targets.
!    Copyright (C) 2004-2020 Free Software Foundation, Inc.
     Contributed by CodeSourcery, LLC   
  
     This file is part of GCC.
***************
*** 55,60 ****
--- 55,62 ----
  #define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\
    "|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}"
  
+ #define TARGET_FDPIC_ASM_SPEC ""
+ 
  #define BE8_LINK_SPEC							\
    "%{!r:%{!mbe32:%:be8_linkopt(%{mlittle-endian:little}"		\
    "			       %{mbig-endian:big}"			\
***************
*** 64,70 ****
  /* Tell the assembler to build BPABI binaries.  */
  #undef  SUBTARGET_EXTRA_ASM_SPEC
  #define SUBTARGET_EXTRA_ASM_SPEC \
!   "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
  
  #ifndef SUBTARGET_EXTRA_LINK_SPEC
  #define SUBTARGET_EXTRA_LINK_SPEC ""
--- 66,73 ----
  /* Tell the assembler to build BPABI binaries.  */
  #undef  SUBTARGET_EXTRA_ASM_SPEC
  #define SUBTARGET_EXTRA_ASM_SPEC \
!   "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC \
!   TARGET_FDPIC_ASM_SPEC
  
  #ifndef SUBTARGET_EXTRA_LINK_SPEC
  #define SUBTARGET_EXTRA_LINK_SPEC ""
diff -Nrcpad gcc-9.3.0/gcc/config/arm/constraints.md gcc-10.1.0/gcc/config/arm/constraints.md
*** gcc-9.3.0/gcc/config/arm/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for ARM and Thumb
! ;; Copyright (C) 2006-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Constraint definitions for ARM and Thumb
! ;; Copyright (C) 2006-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  
  ;; This file is part of GCC.
***************
*** 32,48 ****
  
  ;; The following multi-letter normal constraints have been used:
  ;; in ARM/Thumb-2 state: Da, Db, Dc, Dd, Dn, DN, Dm, Dl, DL, Do, Dv, Dy, Di,
! ;;			 Dt, Dp, Dz, Tu
  ;; in Thumb-1 state: Pa, Pb, Pc, Pd, Pe
! ;; in Thumb-2 state: Ha, Pj, PJ, Ps, Pt, Pu, Pv, Pw, Px, Py, Pz
! ;; in all states: Pf
  
  ;; The following memory constraints have been used:
! ;; in ARM/Thumb-2 state: Uh, Ut, Uv, Uy, Un, Um, Us
  ;; in ARM state: Uq
  ;; in Thumb state: Uu, Uw
  ;; in all states: Q
  
  
  (define_register_constraint "t" "TARGET_32BIT ? VFP_LO_REGS : NO_REGS"
   "The VFP registers @code{s0}-@code{s31}.")
--- 32,98 ----
  
  ;; The following multi-letter normal constraints have been used:
  ;; in ARM/Thumb-2 state: Da, Db, Dc, Dd, Dn, DN, Dm, Dl, DL, Do, Dv, Dy, Di,
! ;;			 Dt, Dp, Dz, Tu, Te
  ;; in Thumb-1 state: Pa, Pb, Pc, Pd, Pe
! ;; in Thumb-2 state: Ha, Pj, PJ, Ps, Pt, Pu, Pv, Pw, Px, Py, Pz, Rd, Rf, Rb, Ra,
! ;;		     Rg, Ri
! ;; in all states: Pf, Pg
  
  ;; The following memory constraints have been used:
! ;; in ARM/Thumb-2 state: Uh, Ut, Uv, Uy, Un, Um, Us, Up, Uf
  ;; in ARM state: Uq
  ;; in Thumb state: Uu, Uw
  ;; in all states: Q
  
+ (define_register_constraint "Up" "TARGET_HAVE_MVE ? VPR_REG : NO_REGS"
+   "MVE VPR register")
+ 
+ (define_register_constraint "Uf" "TARGET_HAVE_MVE ? VFPCC_REG : NO_REGS"
+   "MVE FPCCR register")
+ 
+ (define_register_constraint "Te" "TARGET_HAVE_MVE ? EVEN_REG : NO_REGS"
+   "EVEN core registers @code{r0}, @code{r2}, @code{r4}, @code{r6}, @code{r8},
+    @code{r10}, @code{r12}, @code{r14}")
+ 
+ (define_constraint "Rd"
+   "@internal In Thumb-2 state a constant in range 1 to 16"
+   (and (match_code "const_int")
+        (match_test "TARGET_HAVE_MVE && ival >= 1 && ival <= 16")))
+ 
+ (define_constraint "Ra"
+   "@internal In Thumb-2 state a constant in range 0 to 7"
+   (and (match_code "const_int")
+        (match_test "TARGET_HAVE_MVE && ival >= 0 && ival <= 7")))
+ 
+ (define_constraint "Rb"
+   "@internal In Thumb-2 state a constant in range 1 to 8"
+   (and (match_code "const_int")
+        (match_test "TARGET_HAVE_MVE && ival >= 1 && ival <= 8")))
+ 
+ (define_constraint "Rc"
+   "@internal In Thumb-2 state a constant in range 0 to 15"
+   (and (match_code "const_int")
+        (match_test "TARGET_HAVE_MVE && ival >= 0 && ival <= 15")))
+ 
+ (define_constraint "Re"
+   "@internal In Thumb-2 state a constant in range 0 to 31"
+   (and (match_code "const_int")
+        (match_test "TARGET_HAVE_MVE && ival >= 0 && ival <= 31")))
+ 
+ (define_constraint "Rf"
+   "@internal In Thumb-2 state a constant in range 1 to 32"
+   (and (match_code "const_int")
+        (match_test "TARGET_HAVE_MVE && ival >= 1 && ival <= 32")))
+ 
+ (define_constraint "Rg"
+   "@internal In Thumb-2 state a constant is one among 1, 2, 4 and 8"
+   (and (match_code "const_int")
+        (match_test "TARGET_HAVE_MVE && ((ival == 1) || (ival == 2)
+ 				       || (ival == 4) || (ival == 8))")))
+ 
+ ;; True if the immediate is multiple of 8 and in range of -/+ 1016 for MVE.
+ (define_predicate "mve_vldrd_immediate"
+   (match_test "satisfies_constraint_Ri (op)"))
  
  (define_register_constraint "t" "TARGET_32BIT ? VFP_LO_REGS : NO_REGS"
   "The VFP registers @code{s0}-@code{s31}.")
***************
*** 94,101 ****
   "@internal
    Thumb only.  The union of the low registers and the stack register.")
  
! (define_register_constraint "c" "CC_REG"
!  "@internal The condition code register.")
  
  (define_register_constraint "Cs" "CALLER_SAVE_REGS"
   "@internal The caller save registers.  Useful for sibcalls.")
--- 144,152 ----
   "@internal
    Thumb only.  The union of the low registers and the stack register.")
  
! (define_constraint "c"
!  "@internal The condition code register."
!  (match_operand 0 "cc_register"))
  
  (define_register_constraint "Cs" "CALLER_SAVE_REGS"
   "@internal The caller save registers.  Useful for sibcalls.")
***************
*** 187,192 ****
--- 238,248 ----
  		    && !is_mm_consume (memmodel_from_int (ival))
  		    && !is_mm_release (memmodel_from_int (ival))")))
  
+ (define_constraint "Pg"
+   "@internal In Thumb-2 state a constant in range 1 to 32"
+   (and (match_code "const_int")
+        (match_test "TARGET_THUMB2 && ival >= 1 && ival <= 32")))
+ 
  (define_constraint "Ps"
    "@internal In Thumb-2 state a constant in the range -255 to +255"
    (and (match_code "const_int")
***************
*** 273,296 ****
   (and (match_code "const_int")
        (match_test "TARGET_32BIT && const_ok_for_dimode_op (ival, PLUS)")))
  
- (define_constraint "De"
-  "@internal
-   In ARM/Thumb-2 state a const_int that can be used by insn anddi."
-  (and (match_code "const_int")
-       (match_test "TARGET_32BIT && const_ok_for_dimode_op (ival, AND)")))
- 
- (define_constraint "Df"
-  "@internal
-   In ARM/Thumb-2 state a const_int that can be used by insn iordi."
-  (and (match_code "const_int")
-       (match_test "TARGET_32BIT && const_ok_for_dimode_op (ival, IOR)")))
- 
- (define_constraint "Dg"
-  "@internal
-   In ARM/Thumb-2 state a const_int that can be used by insn xordi."
-  (and (match_code "const_int")
-       (match_test "TARGET_32BIT && const_ok_for_dimode_op (ival, XOR)")))
- 
  (define_constraint "Di"
   "@internal
    In ARM/Thumb-2 state a const_int or const_double where both the high
--- 329,334 ----
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-a15-neon.md gcc-10.1.0/gcc/config/arm/cortex-a15-neon.md
*** gcc-9.3.0/gcc/config/arm/cortex-a15-neon.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-a15-neon.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-A15 NEON pipeline description
! ;; Copyright (C) 2012-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; ARM Cortex-A15 NEON pipeline description
! ;; Copyright (C) 2012-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-a15.md gcc-10.1.0/gcc/config/arm/cortex-a15.md
*** gcc-9.3.0/gcc/config/arm/cortex-a15.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-a15.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-A15 pipeline description
! ;; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;;
  ;; Written by Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
  
--- 1,5 ----
  ;; ARM Cortex-A15 pipeline description
! ;; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;;
  ;; Written by Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
  
***************
*** 68,74 ****
                          shift_imm,shift_reg,\
                          mov_imm,mov_reg,\
                          mvn_imm,mvn_reg,\
!                         mrs,multiple,no_insn"))
    "ca15_issue1,(ca15_sx1,ca15_sx1_alu)|(ca15_sx2,ca15_sx2_alu)")
  
  ;; ALU ops with immediate shift
--- 68,74 ----
                          shift_imm,shift_reg,\
                          mov_imm,mov_reg,\
                          mvn_imm,mvn_reg,\
!                         mrs,multiple"))
    "ca15_issue1,(ca15_sx1,ca15_sx1_alu)|(ca15_sx2,ca15_sx2_alu)")
  
  ;; ALU ops with immediate shift
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-a17-neon.md gcc-10.1.0/gcc/config/arm/cortex-a17-neon.md
*** gcc-9.3.0/gcc/config/arm/cortex-a17-neon.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-a17-neon.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-A17 NEON pipeline description
! ;; Copyright (C) 2014-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; ARM Cortex-A17 NEON pipeline description
! ;; Copyright (C) 2014-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-a17.md gcc-10.1.0/gcc/config/arm/cortex-a17.md
*** gcc-9.3.0/gcc/config/arm/cortex-a17.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-a17.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-A17 pipeline description
! ;; Copyright (C) 2014-2019 Free Software Foundation, Inc.
  ;;
  ;; Contributed by ARM Ltd.
  ;;
--- 1,5 ----
  ;; ARM Cortex-A17 pipeline description
! ;; Copyright (C) 2014-2020 Free Software Foundation, Inc.
  ;;
  ;; Contributed by ARM Ltd.
  ;;
***************
*** 42,48 ****
                          adc_imm,adcs_imm,adc_reg,adcs_reg,\
                          adr, mov_imm,mov_reg,\
                          mvn_imm,mvn_reg,extend,\
!                         mrs,multiple,no_insn"))
    "ca17_alu")
  
  (define_insn_reservation "cortex_a17_alu_shiftimm" 2
--- 42,48 ----
                          adc_imm,adcs_imm,adc_reg,adcs_reg,\
                          adr, mov_imm,mov_reg,\
                          mvn_imm,mvn_reg,extend,\
!                         mrs,multiple"))
    "ca17_alu")
  
  (define_insn_reservation "cortex_a17_alu_shiftimm" 2
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-a5.md gcc-10.1.0/gcc/config/arm/cortex-a5.md
*** gcc-9.3.0/gcc/config/arm/cortex-a5.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-a5.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-A5 pipeline description
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by CodeSourcery.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM Cortex-A5 pipeline description
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by CodeSourcery.
  ;;
  ;; This file is part of GCC.
***************
*** 64,70 ****
                          adr,bfm,clz,rbit,rev,alu_dsp_reg,\
                          shift_imm,shift_reg,\
                          mov_imm,mov_reg,mvn_imm,mvn_reg,\
!                         mrs,multiple,no_insn"))
    "cortex_a5_ex1")
  
  (define_insn_reservation "cortex_a5_alu_shift" 2
--- 64,70 ----
                          adr,bfm,clz,rbit,rev,alu_dsp_reg,\
                          shift_imm,shift_reg,\
                          mov_imm,mov_reg,mvn_imm,mvn_reg,\
!                         mrs,multiple"))
    "cortex_a5_ex1")
  
  (define_insn_reservation "cortex_a5_alu_shift" 2
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-a53.md gcc-10.1.0/gcc/config/arm/cortex-a53.md
*** gcc-9.3.0/gcc/config/arm/cortex-a53.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-a53.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-A53 pipeline description
! ;; Copyright (C) 2013-2019 Free Software Foundation, Inc.
  ;;
  ;; Contributed by ARM Ltd.
  ;;
--- 1,5 ----
  ;; ARM Cortex-A53 pipeline description
! ;; Copyright (C) 2013-2020 Free Software Foundation, Inc.
  ;;
  ;; Contributed by ARM Ltd.
  ;;
***************
*** 86,92 ****
  			alu_sreg,alus_sreg,logic_reg,logics_reg,
  			adc_imm,adcs_imm,adc_reg,adcs_reg,
  			csel,clz,rbit,rev,alu_dsp_reg,
! 			mov_reg,mvn_reg,mrs,multiple,no_insn"))
    "cortex_a53_slot_any")
  
  (define_insn_reservation "cortex_a53_alu_shift" 3
--- 86,92 ----
  			alu_sreg,alus_sreg,logic_reg,logics_reg,
  			adc_imm,adcs_imm,adc_reg,adcs_reg,
  			csel,clz,rbit,rev,alu_dsp_reg,
! 			mov_reg,mvn_reg,mrs,multiple"))
    "cortex_a53_slot_any")
  
  (define_insn_reservation "cortex_a53_alu_shift" 3
***************
*** 723,731 ****
  		 "cortex_a53_fpmac"
  		 "aarch_accumulator_forwarding")
  
- ;; We want AESE and AESMC to end up consecutive to one another.
- 
- (define_bypass 0 "cortex_a53_crypto_aese"
- 		 "cortex_a53_crypto_aesmc"
- 		 "aarch_crypto_can_dual_issue")
- 
--- 723,725 ----
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-a57.md gcc-10.1.0/gcc/config/arm/cortex-a57.md
*** gcc-9.3.0/gcc/config/arm/cortex-a57.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-a57.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-A57 pipeline description
! ;; Copyright (C) 2014-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; ARM Cortex-A57 pipeline description
! ;; Copyright (C) 2014-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 236,242 ****
  			   neon_store1_4reg, neon_store1_4reg_q,\
  			   neon_store1_one_lane, neon_store1_one_lane_q,\
  			   neon_store2_one_lane, neon_store2_one_lane_q")
! 	    (const_string "neon_store_complex")]
  	  (const_string "unknown")))
  
  ;; The Cortex-A57 core is modelled as a triple issue pipeline that has
--- 236,247 ----
  			   neon_store1_4reg, neon_store1_4reg_q,\
  			   neon_store1_one_lane, neon_store1_one_lane_q,\
  			   neon_store2_one_lane, neon_store2_one_lane_q")
! 	    (const_string "neon_store_complex")
! ;; If it doesn't match any of the above that we want to treat specially but is
! ;; still a NEON type, treat it as a basic NEON type.  This is better than
! ;; dropping it on the floor and making no assumptions about it whatsoever.
! 	  (eq_attr "is_neon_type" "yes")
! 	    (const_string "neon_arith_basic")]
  	  (const_string "unknown")))
  
  ;; The Cortex-A57 core is modelled as a triple issue pipeline that has
***************
*** 301,307 ****
  			rotate_imm,shift_imm,shift_reg,\
  			mov_imm,mov_reg,\
  			mvn_imm,mvn_reg,\
! 			mrs,multiple,no_insn"))
    "ca57_sx1|ca57_sx2")
  
  ;; ALU ops with immediate shift
--- 306,312 ----
  			rotate_imm,shift_imm,shift_reg,\
  			mov_imm,mov_reg,\
  			mvn_imm,mvn_reg,\
! 			mrs,multiple"))
    "ca57_sx1|ca57_sx2")
  
  ;; ALU ops with immediate shift
***************
*** 796,804 ****
  ;; help.
  (define_bypass 1 "cortex_a57_*"
  		 "cortex_a57_call,cortex_a57_branch")
- 
- ;; AESE+AESMC and AESD+AESIMC pairs forward with zero latency
- (define_bypass 0 "cortex_a57_crypto_simple"
- 		 "cortex_a57_crypto_simple"
- 		 "aarch_crypto_can_dual_issue")
- 
--- 801,803 ----
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-a7.md gcc-10.1.0/gcc/config/arm/cortex-a7.md
*** gcc-9.3.0/gcc/config/arm/cortex-a7.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-a7.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-A7 pipeline description
! ;; Copyright (C) 2012-2019 Free Software Foundation, Inc.
  ;;
  ;; Contributed by ARM Ltd.
  ;; Based on cortex-a5.md which was originally contributed by CodeSourcery.
--- 1,5 ----
  ;; ARM Cortex-A7 pipeline description
! ;; Copyright (C) 2012-2020 Free Software Foundation, Inc.
  ;;
  ;; Contributed by ARM Ltd.
  ;; Based on cortex-a5.md which was originally contributed by CodeSourcery.
***************
*** 149,155 ****
                          logic_shift_reg,logics_shift_reg,\
                          mov_shift,mov_shift_reg,\
                          mvn_shift,mvn_shift_reg,\
!                         mrs,multiple,no_insn"))
    "cortex_a7_ex1")
  
  ;; Forwarding path for unshifted operands.
--- 149,155 ----
                          logic_shift_reg,logics_shift_reg,\
                          mov_shift,mov_shift_reg,\
                          mvn_shift,mvn_shift_reg,\
!                         mrs,multiple"))
    "cortex_a7_ex1")
  
  ;; Forwarding path for unshifted operands.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-a8-neon.md gcc-10.1.0/gcc/config/arm/cortex-a8-neon.md
*** gcc-9.3.0/gcc/config/arm/cortex-a8-neon.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-a8-neon.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-A8 NEON scheduling description.
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  ;; Contributed by CodeSourcery.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM Cortex-A8 NEON scheduling description.
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  ;; Contributed by CodeSourcery.
  
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-a8.md gcc-10.1.0/gcc/config/arm/cortex-a8.md
*** gcc-9.3.0/gcc/config/arm/cortex-a8.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-a8.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-A8 scheduling description.
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  ;; Contributed by CodeSourcery.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM Cortex-A8 scheduling description.
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  ;; Contributed by CodeSourcery.
  
  ;; This file is part of GCC.
***************
*** 90,96 ****
                          adc_imm,adcs_imm,adc_reg,adcs_reg,\
                          adr,bfm,clz,rbit,rev,alu_dsp_reg,\
                          shift_imm,shift_reg,\
!                         multiple,no_insn"))
    "cortex_a8_default")
  
  (define_insn_reservation "cortex_a8_alu_shift" 2
--- 90,96 ----
                          adc_imm,adcs_imm,adc_reg,adcs_reg,\
                          adr,bfm,clz,rbit,rev,alu_dsp_reg,\
                          shift_imm,shift_reg,\
!                         multiple"))
    "cortex_a8_default")
  
  (define_insn_reservation "cortex_a8_alu_shift" 2
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-a9-neon.md gcc-10.1.0/gcc/config/arm/cortex-a9-neon.md
*** gcc-9.3.0/gcc/config/arm/cortex-a9-neon.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-a9-neon.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-A9 pipeline description
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;;
  ;; Neon pipeline description contributed by ARM Ltd.
  ;;
--- 1,5 ----
  ;; ARM Cortex-A9 pipeline description
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;;
  ;; Neon pipeline description contributed by ARM Ltd.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-a9.md gcc-10.1.0/gcc/config/arm/cortex-a9.md
*** gcc-9.3.0/gcc/config/arm/cortex-a9.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-a9.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-A9 pipeline description
! ;; Copyright (C) 2008-2019 Free Software Foundation, Inc.
  ;; Originally written by CodeSourcery for VFP.
  ;;
  ;; Rewritten by Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
--- 1,5 ----
  ;; ARM Cortex-A9 pipeline description
! ;; Copyright (C) 2008-2020 Free Software Foundation, Inc.
  ;; Originally written by CodeSourcery for VFP.
  ;;
  ;; Rewritten by Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
*************** cortex_a9_p1_e2 + cortex_a9_p0_e1 + cort
*** 87,93 ****
                          shift_imm,shift_reg,\
                          mov_imm,mov_reg,mvn_imm,mvn_reg,\
                          mov_shift_reg,mov_shift,\
!                         mrs,multiple,no_insn"))
    "cortex_a9_p0_default|cortex_a9_p1_default")
  
  ;; An instruction using the shifter will go down E1.
--- 87,93 ----
                          shift_imm,shift_reg,\
                          mov_imm,mov_reg,mvn_imm,mvn_reg,\
                          mov_shift_reg,mov_shift,\
!                         mrs,multiple"))
    "cortex_a9_p0_default|cortex_a9_p1_default")
  
  ;; An instruction using the shifter will go down E1.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-m4-fpu.md gcc-10.1.0/gcc/config/arm/cortex-m4-fpu.md
*** gcc-9.3.0/gcc/config/arm/cortex-m4-fpu.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-m4-fpu.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-M4 FPU pipeline description
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by CodeSourcery.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM Cortex-M4 FPU pipeline description
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by CodeSourcery.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-m4.md gcc-10.1.0/gcc/config/arm/cortex-m4.md
*** gcc-9.3.0/gcc/config/arm/cortex-m4.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-m4.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-M4 pipeline description
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by CodeSourcery.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM Cortex-M4 pipeline description
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by CodeSourcery.
  ;;
  ;; This file is part of GCC.
***************
*** 42,48 ****
                               logic_shift_reg,logics_shift_reg,\
                               mov_imm,mov_reg,mov_shift,mov_shift_reg,\
                               mvn_imm,mvn_reg,mvn_shift,mvn_shift_reg,\
!                              mrs,multiple,no_insn")
  	    (ior (eq_attr "mul32" "yes")
  		 (eq_attr "widen_mul64" "yes"))))
    "cortex_m4_ex")
--- 42,48 ----
                               logic_shift_reg,logics_shift_reg,\
                               mov_imm,mov_reg,mov_shift,mov_shift_reg,\
                               mvn_imm,mvn_reg,mvn_shift,mvn_shift_reg,\
!                              mrs,multiple")
  	    (ior (eq_attr "mul32" "yes")
  		 (eq_attr "widen_mul64" "yes"))))
    "cortex_m4_ex")
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-m7.md gcc-10.1.0/gcc/config/arm/cortex-m7.md
*** gcc-9.3.0/gcc/config/arm/cortex-m7.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-m7.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-M7 pipeline description
! ;; Copyright (C) 2014-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; ARM Cortex-M7 pipeline description
! ;; Copyright (C) 2014-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 48,54 ****
                          logic_shift_imm,logics_shift_imm,\
                          alu_shift_reg,alus_shift_reg,\
                          logic_shift_reg,logics_shift_reg,\
!                         mrs,clz,f_mcr,f_mrc,multiple,no_insn"))
    "cm7_i0|cm7_i1,cm7_a0|cm7_a1")
  
  ;; Simple alu with inline shift operation.
--- 48,54 ----
                          logic_shift_imm,logics_shift_imm,\
                          alu_shift_reg,alus_shift_reg,\
                          logic_shift_reg,logics_shift_reg,\
!                         mrs,clz,f_mcr,f_mrc,multiple"))
    "cm7_i0|cm7_i1,cm7_a0|cm7_a1")
  
  ;; Simple alu with inline shift operation.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-r4.md gcc-10.1.0/gcc/config/arm/cortex-r4.md
*** gcc-9.3.0/gcc/config/arm/cortex-r4.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-r4.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-R4 scheduling description.
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  ;; Contributed by CodeSourcery.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM Cortex-R4 scheduling description.
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  ;; Contributed by CodeSourcery.
  
  ;; This file is part of GCC.
***************
*** 102,108 ****
         (eq_attr "type" "alu_shift_reg,alus_shift_reg,\
                         logic_shift_reg,logics_shift_reg,\
                         mov_shift_reg,mvn_shift_reg,\
!                        mrs,multiple,no_insn"))
    "cortex_r4_alu_shift_reg")
  
  ;; An ALU instruction followed by an ALU instruction with no early dep.
--- 102,108 ----
         (eq_attr "type" "alu_shift_reg,alus_shift_reg,\
                         logic_shift_reg,logics_shift_reg,\
                         mov_shift_reg,mvn_shift_reg,\
!                        mrs,multiple"))
    "cortex_r4_alu_shift_reg")
  
  ;; An ALU instruction followed by an ALU instruction with no early dep.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/cortex-r4f.md gcc-10.1.0/gcc/config/arm/cortex-r4f.md
*** gcc-9.3.0/gcc/config/arm/cortex-r4f.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/cortex-r4f.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Cortex-R4F VFP pipeline description
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  ;; Written by CodeSourcery.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM Cortex-R4F VFP pipeline description
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  ;; Written by CodeSourcery.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/crypto.def gcc-10.1.0/gcc/config/arm/crypto.def
*** gcc-9.3.0/gcc/config/arm/crypto.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/crypto.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Cryptographic instruction builtin definitions.
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
     This file is part of GCC.
  
--- 1,5 ----
  /* Cryptographic instruction builtin definitions.
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
     Contributed by ARM Ltd.
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arm/crypto.md gcc-10.1.0/gcc/config/arm/crypto.md
*** gcc-9.3.0/gcc/config/arm/crypto.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/crypto.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARMv8-A crypto patterns.
! ;; Copyright (C) 2013-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARMv8-A crypto patterns.
! ;; Copyright (C) 2013-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  
  ;; This file is part of GCC.
***************
*** 19,51 ****
  ;; <http://www.gnu.org/licenses/>.
  
  
- ;; When AES/AESMC fusion is enabled we want the register allocation to
- ;; look like:
- ;;    AESE Vn, _
- ;;    AESMC Vn, Vn
- ;; So prefer to tie operand 1 to operand 0 when fusing.
- 
  (define_insn "crypto_<crypto_pattern>"
!   [(set (match_operand:<crypto_mode> 0 "register_operand" "=w,w")
!         (unspec:<crypto_mode> [(match_operand:<crypto_mode> 1
!                        "register_operand" "0,w")]
!          CRYPTO_UNARY))]
    "TARGET_CRYPTO"
    "<crypto_pattern>.<crypto_size_sfx>\\t%q0, %q1"
!   [(set_attr "type" "<crypto_type>")
!    (set_attr_alternative "enabled"
!      [(if_then_else (match_test
! 		       "arm_fusion_enabled_p (tune_params::FUSE_AES_AESMC)")
! 		     (const_string "yes" )
! 		     (const_string "no"))
!       (const_string "yes")])]
  )
  
  (define_insn "crypto_<crypto_pattern>"
    [(set (match_operand:<crypto_mode> 0 "register_operand" "=w")
!         (unspec:<crypto_mode> [(match_operand:<crypto_mode> 1 "register_operand" "0")
!                       (match_operand:<crypto_mode> 2 "register_operand" "w")]
!          CRYPTO_BINARY))]
    "TARGET_CRYPTO"
    "<crypto_pattern>.<crypto_size_sfx>\\t%q0, %q2"
    [(set_attr "type" "<crypto_type>")]
--- 19,94 ----
  ;; <http://www.gnu.org/licenses/>.
  
  
  (define_insn "crypto_<crypto_pattern>"
!   [(set (match_operand:<crypto_mode> 0 "register_operand" "=w")
! 	(unspec:<crypto_mode>
! 		[(match_operand:<crypto_mode> 1 "register_operand" "w")]
! 	 CRYPTO_AESMC))]
    "TARGET_CRYPTO"
    "<crypto_pattern>.<crypto_size_sfx>\\t%q0, %q1"
!   [(set_attr "type" "<crypto_type>")]
! )
! 
! (define_insn "crypto_<crypto_pattern>"
!   [(set (match_operand:V16QI 0 "register_operand" "=w")
! 	(unspec:V16QI
! 		[(xor:V16QI
! 		     (match_operand:V16QI 1 "register_operand" "%0")
! 		     (match_operand:V16QI 2 "register_operand" "w"))]
! 	CRYPTO_AES))]
!   "TARGET_CRYPTO"
!   "<crypto_pattern>.<crypto_size_sfx>\\t%q0, %q2"
!   [(set_attr "type" "<crypto_type>")]
! )
! 
! ;; When AESE/AESMC fusion is enabled we really want to keep the two together
! ;; and enforce the register dependency without scheduling or register
! ;; allocation messing up the order or introducing moves inbetween.
! ;;  Mash the two together during combine.
! 
! (define_insn "*aarch32_crypto_aese_fused"
!   [(set (match_operand:V16QI 0 "register_operand" "=w")
! 	(unspec:V16QI
! 		[(unspec:V16QI
! 		    [(xor:V16QI
! 			(match_operand:V16QI 1 "register_operand" "%0")
! 			(match_operand:V16QI 2 "register_operand" "w"))]
! 		UNSPEC_AESE)]
! 	UNSPEC_AESMC))]
!   "TARGET_CRYPTO
!    && arm_fusion_enabled_p (tune_params::FUSE_AES_AESMC)"
!   "aese.8\\t%q0, %q2\;aesmc.8\\t%q0, %q0"
!   [(set_attr "type" "crypto_aese")
!    (set_attr "length" "8")]
! )
! 
! ;; When AESD/AESIMC fusion is enabled we really want to keep the two together
! ;; and enforce the register dependency without scheduling or register
! ;; allocation messing up the order or introducing moves inbetween.
! ;;  Mash the two together during combine.
! 
! (define_insn "*aarch32_crypto_aesd_fused"
!   [(set (match_operand:V16QI 0 "register_operand" "=w")
! 	(unspec:V16QI
! 		[(unspec:V16QI
! 		    [(xor:V16QI
! 			(match_operand:V16QI 1 "register_operand" "%0")
! 			(match_operand:V16QI 2 "register_operand" "w"))]
! 		UNSPEC_AESD)]
! 	UNSPEC_AESIMC))]
!   "TARGET_CRYPTO
!    && arm_fusion_enabled_p (tune_params::FUSE_AES_AESMC)"
!   "aesd.8\\t%q0, %q2\;aesimc.8\\t%q0, %q0"
!   [(set_attr "type" "crypto_aese")
!    (set_attr "length" "8")]
  )
  
  (define_insn "crypto_<crypto_pattern>"
    [(set (match_operand:<crypto_mode> 0 "register_operand" "=w")
! 	(unspec:<crypto_mode>
! 		[(match_operand:<crypto_mode> 1 "register_operand" "0")
! 		(match_operand:<crypto_mode> 2 "register_operand" "w")]
! 	CRYPTO_BINARY))]
    "TARGET_CRYPTO"
    "<crypto_pattern>.<crypto_size_sfx>\\t%q0, %q2"
    [(set_attr "type" "<crypto_type>")]
***************
*** 62,75 ****
    [(set_attr "type" "<crypto_type>")]
  )
  
! (define_insn "crypto_sha1h"
!   [(set (match_operand:V4SI 0 "register_operand" "=w")
!         (zero_extend:V4SI
!           (unspec:SI [(vec_select:SI
!                         (match_operand:V4SI 1 "register_operand" "w")
!                         (parallel [(match_operand:SI 2 "immediate_operand" "i")]))]
!            UNSPEC_SHA1H)))]
    "TARGET_CRYPTO"
    "sha1h.32\\t%q0, %q1"
    [(set_attr "type" "crypto_sha1_fast")]
  )
--- 105,132 ----
    [(set_attr "type" "<crypto_type>")]
  )
  
! /* The vec_select operation always selects index 0 from the lower V2SI subreg
!    of the V4SI, adjusted for endianness. Required due to neon_vget_lane and
!    neon_set_lane that change the element ordering in memory for big-endian.  */
! 
! (define_expand "crypto_sha1h"
!   [(set (match_operand:V4SI 0 "register_operand")
! 	(match_operand:V4SI 1 "register_operand"))]
    "TARGET_CRYPTO"
+ {
+   rtx op2 = GEN_INT (NEON_ENDIAN_LANE_N (V2SImode, 0));
+   emit_insn (gen_crypto_sha1h_lb (operands[0], operands[1], op2));
+   DONE;
+ })
+ 
+ (define_insn "crypto_sha1h_lb"
+   [(set (match_operand:V4SI 0 "register_operand" "=w")
+ 	(unspec:V4SI
+ 	  [(vec_select:SI
+ 	   (match_operand:V4SI 1 "register_operand" "w")
+ 	   (parallel [(match_operand:SI 2 "immediate_operand" "i")]))]
+ 	UNSPEC_SHA1H))]
+   "TARGET_CRYPTO && INTVAL (operands[2]) == NEON_ENDIAN_LANE_N (V2SImode, 0)"
    "sha1h.32\\t%q0, %q1"
    [(set_attr "type" "crypto_sha1_fast")]
  )
***************
*** 84,90 ****
    [(set_attr "type" "crypto_pmull")]
  )
  
! (define_insn "crypto_<crypto_pattern>"
    [(set (match_operand:V4SI 0 "register_operand" "=w")
          (unspec:<crypto_mode>
                       [(match_operand:<crypto_mode> 1 "register_operand" "0")
--- 141,166 ----
    [(set_attr "type" "crypto_pmull")]
  )
  
! /* The vec_select operation always selects index 0 from the lower V2SI subreg
!    of the V4SI, adjusted for endianness. Required due to neon_vget_lane and
!    neon_set_lane that change the element ordering in memory for big-endian.  */
! 
! (define_expand "crypto_<crypto_pattern>"
!   [(set (match_operand:V4SI 0 "register_operand")
! 	(unspec:<crypto_mode>
! 		[(match_operand:<crypto_mode> 1 "register_operand")
! 		 (match_operand:<crypto_mode> 2 "register_operand")
! 		 (match_operand:<crypto_mode> 3 "register_operand")]
! 	CRYPTO_SELECTING))]
!   "TARGET_CRYPTO"
! {
!   rtx op4 = GEN_INT (NEON_ENDIAN_LANE_N (V2SImode, 0));
!   emit_insn (gen_crypto_<crypto_pattern>_lb
! 	     (operands[0], operands[1], operands[2], operands[3], op4));
!   DONE;
! })
! 
! (define_insn "crypto_<crypto_pattern>_lb"
    [(set (match_operand:V4SI 0 "register_operand" "=w")
          (unspec:<crypto_mode>
                       [(match_operand:<crypto_mode> 1 "register_operand" "0")
***************
*** 93,99 ****
                          (parallel [(match_operand:SI 4 "immediate_operand" "i")]))
                        (match_operand:<crypto_mode> 3 "register_operand" "w")]
           CRYPTO_SELECTING))]
!   "TARGET_CRYPTO"
    "<crypto_pattern>.<crypto_size_sfx>\\t%q0, %q2, %q3"
    [(set_attr "type" "<crypto_type>")]
  )
--- 169,175 ----
                          (parallel [(match_operand:SI 4 "immediate_operand" "i")]))
                        (match_operand:<crypto_mode> 3 "register_operand" "w")]
           CRYPTO_SELECTING))]
!   "TARGET_CRYPTO && INTVAL (operands[4]) == NEON_ENDIAN_LANE_N (V2SImode, 0)"
    "<crypto_pattern>.<crypto_size_sfx>\\t%q0, %q2, %q3"
    [(set_attr "type" "<crypto_type>")]
  )
diff -Nrcpad gcc-9.3.0/gcc/config/arm/driver-arm.c gcc-10.1.0/gcc/config/arm/driver-arm.c
*** gcc-9.3.0/gcc/config/arm/driver-arm.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/driver-arm.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines for the gcc driver.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Subroutines for the gcc driver.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arm/elf.h gcc-10.1.0/gcc/config/arm/elf.h
*** gcc-9.3.0/gcc/config/arm/elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/elf.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for GNU compiler.
     For ARM with ELF obj format.
!    Copyright (C) 1995-2019 Free Software Foundation, Inc.
     Contributed by Philip Blundell <philb@gnu.org> and
     Catherine Moore <clm@cygnus.com>
     
--- 1,6 ----
  /* Definitions of target machine for GNU compiler.
     For ARM with ELF obj format.
!    Copyright (C) 1995-2020 Free Software Foundation, Inc.
     Contributed by Philip Blundell <philb@gnu.org> and
     Catherine Moore <clm@cygnus.com>
     
diff -Nrcpad gcc-9.3.0/gcc/config/arm/exynos-m1.md gcc-10.1.0/gcc/config/arm/exynos-m1.md
*** gcc-9.3.0/gcc/config/arm/exynos-m1.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/exynos-m1.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Samsung Exynos M1 pipeline description
! ;; Copyright (C) 2014-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Samsung Exynos M1 pipeline description
! ;; Copyright (C) 2014-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 950,960 ****
  		 "exynos_m1_crypto_simple, exynos_m1_crypto_complex,\
  		  exynos_m1_crypto_poly*")
  
- ;; AES{D,E}/AESMC pairs can feed each other instantly.
- (define_bypass 0 "exynos_m1_crypto_simple"
- 		 "exynos_m1_crypto_simple"
- 		 "aarch_crypto_can_dual_issue")
- 
  ;; Predicted branches take no time, but mispredicted ones take forever anyway.
  (define_bypass 1 "exynos_m1_*"
  		 "exynos_m1_call, exynos_m1_branch")
--- 950,955 ----
diff -Nrcpad gcc-9.3.0/gcc/config/arm/fa526.md gcc-10.1.0/gcc/config/arm/fa526.md
*** gcc-9.3.0/gcc/config/arm/fa526.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/fa526.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Faraday FA526 Pipeline Description
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Written by I-Jui Sung, based on ARM926EJ-S Pipeline Description.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Faraday FA526 Pipeline Description
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Written by I-Jui Sung, based on ARM926EJ-S Pipeline Description.
  
  ;; This file is part of GCC.
***************
*** 68,74 ****
                         adr,bfm,rev,\
                         shift_imm,shift_reg,\
                         mov_imm,mov_reg,mvn_imm,mvn_reg,\
!                        mrs,multiple,no_insn"))
   "fa526_core")
  
  (define_insn_reservation "526_alu_shift_op" 2
--- 68,74 ----
                         adr,bfm,rev,\
                         shift_imm,shift_reg,\
                         mov_imm,mov_reg,mvn_imm,mvn_reg,\
!                        mrs,multiple"))
   "fa526_core")
  
  (define_insn_reservation "526_alu_shift_op" 2
diff -Nrcpad gcc-9.3.0/gcc/config/arm/fa606te.md gcc-10.1.0/gcc/config/arm/fa606te.md
*** gcc-9.3.0/gcc/config/arm/fa606te.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/fa606te.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Faraday FA606TE Pipeline Description
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Written by Mingfeng Wu, based on ARM926EJ-S Pipeline Description.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Faraday FA606TE Pipeline Description
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Written by Mingfeng Wu, based on ARM926EJ-S Pipeline Description.
  ;;
  ;; This file is part of GCC.
***************
*** 73,79 ****
                         logic_shift_reg,logics_shift_reg,\
                         mov_imm,mov_reg,mov_shift,mov_shift_reg,\
                         mvn_imm,mvn_reg,mvn_shift,mvn_shift_reg,\
!                        mrs,multiple,no_insn"))
   "fa606te_core")
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
--- 73,79 ----
                         logic_shift_reg,logics_shift_reg,\
                         mov_imm,mov_reg,mov_shift,mov_shift_reg,\
                         mvn_imm,mvn_reg,mvn_shift,mvn_shift_reg,\
!                        mrs,multiple"))
   "fa606te_core")
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
diff -Nrcpad gcc-9.3.0/gcc/config/arm/fa626te.md gcc-10.1.0/gcc/config/arm/fa626te.md
*** gcc-9.3.0/gcc/config/arm/fa626te.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/fa626te.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Faraday FA626TE Pipeline Description
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Written by I-Jui Sung, based on ARM926EJ-S Pipeline Description.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Faraday FA626TE Pipeline Description
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Written by I-Jui Sung, based on ARM926EJ-S Pipeline Description.
  ;;
  ;; This file is part of GCC.
***************
*** 74,80 ****
                         adr,bfm,rev,\
                         shift_imm,shift_reg,\
                         mov_imm,mov_reg,mvn_imm,mvn_reg,\
!                        mrs,multiple,no_insn"))
   "fa626te_core")
  
  (define_insn_reservation "626te_alu_shift_op" 2
--- 74,80 ----
                         adr,bfm,rev,\
                         shift_imm,shift_reg,\
                         mov_imm,mov_reg,mvn_imm,mvn_reg,\
!                        mrs,multiple"))
   "fa626te_core")
  
  (define_insn_reservation "626te_alu_shift_op" 2
diff -Nrcpad gcc-9.3.0/gcc/config/arm/fa726te.md gcc-10.1.0/gcc/config/arm/fa726te.md
*** gcc-9.3.0/gcc/config/arm/fa726te.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/fa726te.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Faraday FA726TE Pipeline Description
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Written by I-Jui Sung, based on ARM926EJ-S Pipeline Description.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Faraday FA726TE Pipeline Description
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Written by I-Jui Sung, based on ARM926EJ-S Pipeline Description.
  ;;
  ;; This file is part of GCC.
***************
*** 91,97 ****
                         adc_imm,adcs_imm,adc_reg,adcs_reg,\
                         adr,bfm,rev,\
                         shift_imm,shift_reg,\
!                        mrs,multiple,no_insn"))
    "fa726te_issue+(fa726te_alu0_pipe|fa726te_alu1_pipe)")
  
  ;; ALU operations with a shift-by-register operand.
--- 91,97 ----
                         adc_imm,adcs_imm,adc_reg,adcs_reg,\
                         adr,bfm,rev,\
                         shift_imm,shift_reg,\
!                        mrs,multiple"))
    "fa726te_issue+(fa726te_alu0_pipe|fa726te_alu1_pipe)")
  
  ;; ALU operations with a shift-by-register operand.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/fmp626.md gcc-10.1.0/gcc/config/arm/fmp626.md
*** gcc-9.3.0/gcc/config/arm/fmp626.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/fmp626.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Faraday FA626TE Pipeline Description
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Written by Mingfeng Wu, based on ARM926EJ-S Pipeline Description.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Faraday FA626TE Pipeline Description
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Written by Mingfeng Wu, based on ARM926EJ-S Pipeline Description.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/freebsd.h gcc-10.1.0/gcc/config/arm/freebsd.h
*** gcc-9.3.0/gcc/config/arm/freebsd.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/freebsd.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, FreeBSD/arm version.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
     Contributed by Wasabi Systems, Inc.
  
     This file is part of GCC.
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, FreeBSD/arm version.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
     Contributed by Wasabi Systems, Inc.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/fuchsia-elf.h gcc-10.1.0/gcc/config/arm/fuchsia-elf.h
*** gcc-9.3.0/gcc/config/arm/fuchsia-elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/fuchsia-elf.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Configuration file for ARM Fuchsia ELF targets.
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
     Contributed by Google.
  
     This file is part of GCC.
--- 1,5 ----
  /* Configuration file for ARM Fuchsia ELF targets.
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
     Contributed by Google.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/iterators.md gcc-10.1.0/gcc/config/arm/iterators.md
*** gcc-9.3.0/gcc/config/arm/iterators.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/iterators.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Code and mode itertator and attribute definitions for the ARM backend
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Code and mode itertator and attribute definitions for the ARM backend
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  ;;
  ;; This file is part of GCC.
***************
*** 28,33 ****
--- 28,37 ----
  ;; registers.
  (define_mode_iterator ANY64 [DI DF V8QI V4HI V4HF V2SI V2SF])
  
+ ;; Additional definition of ANY64 that also includes the special V4BF mode.
+ ;; BFmode is allowed only on define_split between ARM registers.
+ (define_mode_iterator ANY64_BF [DI DF V8QI V4HI V4BF V4HF V2SI V2SF])
+ 
  (define_mode_iterator ANY128 [V2DI V2DF V16QI V8HI V4SI V4SF])
  
  ;; A list of integer modes that are up to one word long
***************
*** 62,67 ****
--- 66,85 ----
  ;; Integer and float modes supported by Neon and IWMMXT.
  (define_mode_iterator VALL [V2DI V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF])
  
+ ;; Integer and float modes supported by Neon, IWMMXT and MVE, used by
+ ;; arithmetic epxand patterns.
+ (define_mode_iterator VNIM [V16QI V8HI V4SI V4SF])
+ 
+ ;; Integer and float modes supported by Neon and IWMMXT but not MVE, used by
+ ;; arithmetic epxand patterns.
+ (define_mode_iterator VNINOTM [V2SI V4HI V8QI V2SF V2DI])
+ 
+ ;; Integer and float modes supported by Neon, IWMMXT and MVE.
+ (define_mode_iterator VNIM1 [V16QI V8HI V4SI V4SF V2DI])
+ 
+ ;; Integer and float modes supported by Neon and IWMMXT but not MVE.
+ (define_mode_iterator VNINOTM1 [V2SI V4HI V8QI V2SF])
+ 
  ;; Integer and float modes supported by Neon and IWMMXT, except V2DI.
  (define_mode_iterator VALLW [V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF])
  
***************
*** 78,87 ****
  (define_mode_iterator VD_RE [V8QI V4HI V2SI V2SF DI])
  
  ;; Double-width vector modes plus 64-bit elements.
! (define_mode_iterator VDX [V8QI V4HI V4HF V2SI V2SF DI])
  
  ;; Double-width vector modes, with V4HF - for vldN_lane and vstN_lane.
! (define_mode_iterator VD_LANE [V8QI V4HI V4HF V2SI V2SF])
  
  ;; Double-width vector modes without floating-point elements.
  (define_mode_iterator VDI [V8QI V4HI V2SI])
--- 96,115 ----
  (define_mode_iterator VD_RE [V8QI V4HI V2SI V2SF DI])
  
  ;; Double-width vector modes plus 64-bit elements.
! (define_mode_iterator VDX [V8QI V4HI V4HF V4BF V2SI V2SF DI])
! 
! ;; Double-width vector modes plus 64-bit elements, including V4BF.
! (define_mode_iterator VDXBF [V8QI V4HI V4HF (V4BF "TARGET_BF16_SIMD") V2SI V2SF DI])
! 
! ;; Double-width vector modes plus 64-bit elements, V4BF and V8BF.
! (define_mode_iterator VDXBF2 [V8QI V4HI V4HF V2SI V2SF DI (V4BF "TARGET_BF16_SIMD") (V8BF ("TARGET_BF16_SIMD"))])
! 
! ;; Double-width vector modes plus 64-bit elements,
! ;; with V4BFmode added, suitable for moves.
! (define_mode_iterator VDXMOV [V8QI V4HI V4HF V4BF V2SI V2SF DI])
  
  ;; Double-width vector modes, with V4HF - for vldN_lane and vstN_lane.
! (define_mode_iterator VD_LANE [V8QI V4HI V4HF V4BF V2SI V2SF])
  
  ;; Double-width vector modes without floating-point elements.
  (define_mode_iterator VDI [V8QI V4HI V2SI])
***************
*** 92,111 ****
  ;; Quad-width vector modes, including V8HF.
  (define_mode_iterator VQ2 [V16QI V8HI V8HF V4SI V4SF])
  
  ;; Quad-width vector modes with 16- or 32-bit elements
  (define_mode_iterator VQ_HS [V8HI V8HF V4SI V4SF])
  
  ;; Quad-width vector modes plus 64-bit elements.
! (define_mode_iterator VQX [V16QI V8HI V8HF V4SI V4SF V2DI])
  
  ;; Quad-width vector modes without floating-point elements.
  (define_mode_iterator VQI [V16QI V8HI V4SI])
  
! ;; Quad-width vector modes, with TImode added, for moves.
! (define_mode_iterator VQXMOV [V16QI V8HI V8HF V4SI V4SF V2DI TI])
  
  ;; Opaque structure types wider than TImode.
! (define_mode_iterator VSTRUCT [EI OI CI XI])
  
  ;; Opaque structure types used in table lookups (except vtbl1/vtbx1).
  (define_mode_iterator VTAB [TI EI OI])
--- 120,149 ----
  ;; Quad-width vector modes, including V8HF.
  (define_mode_iterator VQ2 [V16QI V8HI V8HF V4SI V4SF])
  
+ ;; Quad-width vector modes, including V8BF.
+ (define_mode_iterator VQ2BF [V16QI V8HI V8HF (V8BF "TARGET_BF16_SIMD") V4SI V4SF])
+ 
  ;; Quad-width vector modes with 16- or 32-bit elements
  (define_mode_iterator VQ_HS [V8HI V8HF V4SI V4SF])
  
  ;; Quad-width vector modes plus 64-bit elements.
! (define_mode_iterator VQX [V16QI V8HI V8HF V8BF V4SI V4SF V2DI])
! 
! ;; Quad-width vector modes plus 64-bit elements.
! (define_mode_iterator VQX_NOBF [V16QI V8HI V8HF V4SI V4SF V2DI])
! 
! ;; Quad-width vector modes plus 64-bit elements and V8BF.
! (define_mode_iterator VQXBF [V16QI V8HI V8HF (V8BF "TARGET_BF16_SIMD") V4SI V4SF V2DI])
  
  ;; Quad-width vector modes without floating-point elements.
  (define_mode_iterator VQI [V16QI V8HI V4SI])
  
! ;; Quad-width vector modes, with TImode and V8BFmode added, suitable for moves.
! (define_mode_iterator VQXMOV [V16QI V8HI V8HF V8BF V4SI V4SF V2DI TI])
  
  ;; Opaque structure types wider than TImode.
! (define_mode_iterator VSTRUCT [(EI "!TARGET_HAVE_MVE") OI
! 			       (CI "!TARGET_HAVE_MVE") XI])
  
  ;; Opaque structure types used in table lookups (except vtbl1/vtbx1).
  (define_mode_iterator VTAB [TI EI OI])
***************
*** 145,151 ****
  
  ;; Vector modes, including 64-bit integer elements.
  (define_mode_iterator VDQX [V8QI V16QI V4HI V8HI V2SI V4SI
! 			    V4HF V8HF V2SF V4SF DI V2DI])
  
  ;; Vector modes including 64-bit integer elements, but no floats.
  (define_mode_iterator VDQIX [V8QI V16QI V4HI V8HI V2SI V4SI DI V2DI])
--- 183,189 ----
  
  ;; Vector modes, including 64-bit integer elements.
  (define_mode_iterator VDQX [V8QI V16QI V4HI V8HI V2SI V4SI
! 			    V4HF V8HF V4BF V8BF V2SF V4SF DI V2DI])
  
  ;; Vector modes including 64-bit integer elements, but no floats.
  (define_mode_iterator VDQIX [V8QI V16QI V4HI V8HI V2SI V4SI DI V2DI])
***************
*** 186,191 ****
--- 224,232 ----
  ;; Modes with 8-bit elements.
  (define_mode_iterator VE [V8QI V16QI])
  
+ ;; V2DI only (for use with @ patterns).
+ (define_mode_iterator V2DI_ONLY [V2DI])
+ 
  ;; Modes with 64-bit elements only.
  (define_mode_iterator V64 [DI V2DI])
  
***************
*** 198,203 ****
--- 239,254 ----
  ;; Vector modes for 16-bit floating-point support.
  (define_mode_iterator VH [V8HF V4HF])
  
+ ;; 16-bit floating-point vector modes suitable for moving (includes BFmode).
+ (define_mode_iterator VHFBF [V8HF V4HF V4BF V8BF])
+ 
+ ;; 16-bit floating-point vector modes suitable for moving (includes BFmode,
+ ;; without V8HF ).
+ (define_mode_iterator VHFBF_split [V4HF V4BF V8BF])
+ 
+ ;; 16-bit floating-point scalar modes suitable for moving (includes BFmode).
+ (define_mode_iterator HFBF [HF BF])
+ 
  ;; Iterators used for fixed-point support.
  (define_mode_iterator FIXED [QQ HQ SQ UQQ UHQ USQ HA SA UHA USA])
  
***************
*** 212,226 ****
  ;; Modes for polynomial or float values.
  (define_mode_iterator VPF [V8QI V16QI V2SF V4SF])
  
  ;;----------------------------------------------------------------------------
  ;; Code iterators
  ;;----------------------------------------------------------------------------
  
- ;; A list of condition codes used in compare instructions where
- ;; the carry flag from the addition is used instead of doing the
- ;; compare a second time.
- (define_code_iterator LTUGEU [ltu geu])
- 
  ;; The signed gt, ge comparisons
  (define_code_iterator GTGE [gt ge])
  
--- 263,276 ----
  ;; Modes for polynomial or float values.
  (define_mode_iterator VPF [V8QI V16QI V2SF V4SF])
  
+ ;; Modes for BF16 convert instructions.
+ (define_mode_iterator VBFCVT [V4BF V8BF])
+ (define_mode_iterator VBFCVTM [V2SI SF])
+ 
  ;;----------------------------------------------------------------------------
  ;; Code iterators
  ;;----------------------------------------------------------------------------
  
  ;; The signed gt, ge comparisons
  (define_code_iterator GTGE [gt ge])
  
***************
*** 236,241 ****
--- 286,293 ----
  ;; A list of ...
  (define_code_iterator IOR_XOR [ior xor])
  
+ (define_code_iterator LOGICAL [and ior xor])
+ 
  ;; Operations on two halves of a quadword vector.
  (define_code_iterator VQH_OPS [plus smin smax umin umax])
  
***************
*** 264,271 ****
  ;; Conversions.
  (define_code_iterator FCVT [unsigned_float float])
  
  ;; plus and minus are the only SHIFTABLE_OPS for which Thumb2 allows
! ;; a stack pointer opoerand.  The minus operation is a candidate for an rsub
  ;; and hence only plus is supported.
  (define_code_attr t2_binop0
    [(plus "rk") (minus "r") (ior "r") (xor "r") (and "r")])
--- 316,326 ----
  ;; Conversions.
  (define_code_iterator FCVT [unsigned_float float])
  
+ ;; Saturating addition, subtraction
+ (define_code_iterator SSPLUSMINUS [ss_plus ss_minus])
+ 
  ;; plus and minus are the only SHIFTABLE_OPS for which Thumb2 allows
! ;; a stack pointer operand.  The minus operation is a candidate for an rsub
  ;; and hence only plus is supported.
  (define_code_attr t2_binop0
    [(plus "rk") (minus "r") (ior "r") (xor "r") (and "r")])
***************
*** 282,287 ****
--- 337,344 ----
  
  (define_code_attr vfml_op [(plus "a") (minus "s")])
  
+ (define_code_attr ss_op [(ss_plus "qadd") (ss_minus "qsub")])
+ 
  ;;----------------------------------------------------------------------------
  ;; Int iterators
  ;;----------------------------------------------------------------------------
***************
*** 341,346 ****
--- 398,405 ----
  
  (define_int_iterator VSUBHN [UNSPEC_VSUBHN UNSPEC_VRSUBHN])
  
+ (define_int_iterator VABAL [UNSPEC_VABAL_S UNSPEC_VABAL_U])
+ 
  (define_int_iterator VABD [UNSPEC_VABD_S UNSPEC_VABD_U])
  
  (define_int_iterator VABDL [UNSPEC_VABDL_S UNSPEC_VABDL_U])
***************
*** 411,420 ****
  (define_int_iterator CRC [UNSPEC_CRC32B UNSPEC_CRC32H UNSPEC_CRC32W
                            UNSPEC_CRC32CB UNSPEC_CRC32CH UNSPEC_CRC32CW])
  
! (define_int_iterator CRYPTO_UNARY [UNSPEC_AESMC UNSPEC_AESIMC])
  
! (define_int_iterator CRYPTO_BINARY [UNSPEC_AESD UNSPEC_AESE
!                                     UNSPEC_SHA1SU1 UNSPEC_SHA256SU0])
  
  (define_int_iterator CRYPTO_TERNARY [UNSPEC_SHA1SU0 UNSPEC_SHA256H
                                       UNSPEC_SHA256H2 UNSPEC_SHA256SU1])
--- 470,480 ----
  (define_int_iterator CRC [UNSPEC_CRC32B UNSPEC_CRC32H UNSPEC_CRC32W
                            UNSPEC_CRC32CB UNSPEC_CRC32CH UNSPEC_CRC32CW])
  
! (define_int_iterator CRYPTO_AESMC [UNSPEC_AESMC UNSPEC_AESIMC])
  
! (define_int_iterator CRYPTO_AES [UNSPEC_AESD UNSPEC_AESE])
! 
! (define_int_iterator CRYPTO_BINARY [UNSPEC_SHA1SU1 UNSPEC_SHA256SU0])
  
  (define_int_iterator CRYPTO_TERNARY [UNSPEC_SHA1SU0 UNSPEC_SHA256H
                                       UNSPEC_SHA256H2 UNSPEC_SHA256SU1])
***************
*** 422,438 ****
--- 482,536 ----
  (define_int_iterator CRYPTO_SELECTING [UNSPEC_SHA1C UNSPEC_SHA1M
                                         UNSPEC_SHA1P])
  
+ (define_int_iterator USXTB16 [UNSPEC_SXTB16 UNSPEC_UXTB16])
+ (define_int_iterator SIMD32_NOGE_BINOP
+ 				[UNSPEC_QADD8 UNSPEC_QSUB8 UNSPEC_SHADD8
+ 				 UNSPEC_SHSUB8 UNSPEC_UHADD8 UNSPEC_UHSUB8
+ 				 UNSPEC_UQADD8 UNSPEC_UQSUB8
+ 				 UNSPEC_QADD16 UNSPEC_QASX UNSPEC_QSAX
+ 				 UNSPEC_QSUB16 UNSPEC_SHADD16 UNSPEC_SHASX
+ 				 UNSPEC_SHSAX UNSPEC_SHSUB16 UNSPEC_UHADD16
+ 				 UNSPEC_UHASX UNSPEC_UHSAX UNSPEC_UHSUB16
+ 				 UNSPEC_UQADD16 UNSPEC_UQASX UNSPEC_UQSAX
+ 				 UNSPEC_UQSUB16 UNSPEC_SMUSD UNSPEC_SMUSDX
+ 				 UNSPEC_SXTAB16 UNSPEC_UXTAB16 UNSPEC_USAD8])
+ 
+ (define_int_iterator SIMD32_DIMODE [UNSPEC_SMLALD UNSPEC_SMLALDX
+ 				    UNSPEC_SMLSLD UNSPEC_SMLSLDX])
+ 
+ (define_int_iterator SMLAWBT [UNSPEC_SMLAWB UNSPEC_SMLAWT])
+ 
+ (define_int_iterator SIMD32_GE [UNSPEC_SADD8 UNSPEC_SSUB8 UNSPEC_UADD8
+ 				UNSPEC_USUB8 UNSPEC_SADD16 UNSPEC_SASX
+ 				UNSPEC_SSAX UNSPEC_SSUB16 UNSPEC_UADD16
+ 				UNSPEC_UASX UNSPEC_USAX UNSPEC_USUB16])
+ 
+ (define_int_iterator SIMD32_TERNOP_Q [UNSPEC_SMLAD UNSPEC_SMLADX UNSPEC_SMLSD
+ 				      UNSPEC_SMLSDX])
+ 
+ (define_int_iterator SIMD32_BINOP_Q [UNSPEC_SMUAD UNSPEC_SMUADX])
+ 
+ (define_int_iterator USSAT16 [UNSPEC_SSAT16 UNSPEC_USAT16])
+ 
  (define_int_iterator VQRDMLH_AS [UNSPEC_VQRDMLAH UNSPEC_VQRDMLSH])
  
  (define_int_iterator VFM_LANE_AS [UNSPEC_VFMA_LANE UNSPEC_VFMS_LANE])
  
  (define_int_iterator DOTPROD [UNSPEC_DOT_S UNSPEC_DOT_U])
  
+ (define_int_iterator DOTPROD_I8MM [UNSPEC_DOT_US UNSPEC_DOT_SU])
+ 
  (define_int_iterator VFMLHALVES [UNSPEC_VFML_LO UNSPEC_VFML_HI])
  
  (define_int_iterator VCADD [UNSPEC_VCADD90 UNSPEC_VCADD270])
  (define_int_iterator VCMLA [UNSPEC_VCMLA UNSPEC_VCMLA90 UNSPEC_VCMLA180 UNSPEC_VCMLA270])
  
+ (define_int_iterator MATMUL [UNSPEC_MATMUL_S UNSPEC_MATMUL_U UNSPEC_MATMUL_US])
+ 
+ (define_int_iterator BF_MA [UNSPEC_BFMAB UNSPEC_BFMAT])
+ 
+ (define_int_iterator CDE_VCX [UNSPEC_VCDE UNSPEC_VCDEA])
+ 
  ;;----------------------------------------------------------------------------
  ;; Mode attributes
  ;;----------------------------------------------------------------------------
***************
*** 447,452 ****
--- 545,553 ----
  ;; vtbl<n> suffix for NEON vector modes.
  (define_mode_attr VTAB_n [(TI "2") (EI "3") (OI "4")])
  
+ ;; fp16 or bf16 marker for 16-bit float modes.
+ (define_mode_attr fporbf [(HF "fp16") (BF "bf16")])
+ 
  ;; (Opposite) mode to convert to/from for NEON mode conversions.
  (define_mode_attr V_CVTTO [(V2SI "V2SF") (V2SF "V2SI")
                 (V4SI "V4SF") (V4SF "V4SI")])
***************
*** 463,468 ****
--- 564,570 ----
  (define_mode_attr V_elem [(V8QI "QI") (V16QI "QI")
  			  (V4HI "HI") (V8HI "HI")
  			  (V4HF "HF") (V8HF "HF")
+ 			  (V4BF "BF") (V8BF "BF")
                            (V2SI "SI") (V4SI "SI")
                            (V2SF "SF") (V4SF "SF")
                            (DI "DI")   (V2DI "DI")])
***************
*** 471,476 ****
--- 573,579 ----
  (define_mode_attr V_elem_l [(V8QI "qi") (V16QI "qi")
  			    (V4HI "hi") (V8HI "hi")
  			    (V4HF "hf") (V8HF "hf")
+ 			    (V4BF "bf") (V8BF "bf")
  			    (V2SI "si") (V4SI "si")
  			    (V2SF "sf") (V4SF "sf")
  			    (DI "di")   (V2DI "di")])
***************
*** 488,493 ****
--- 591,597 ----
  (define_mode_attr V_two_elem [(V8QI "HI")   (V16QI "HI")
                                (V4HI "SI")   (V8HI "SI")
                                (V4HF "SF")   (V8HF "SF")
+                               (V4BF "BF")   (V8BF "BF")
                                (V2SI "V2SI") (V4SI "V2SI")
                                (V2SF "V2SF") (V4SF "V2SF")
                                (DI "V2DI")   (V2DI "V2DI")])
***************
*** 508,513 ****
--- 612,618 ----
  (define_mode_attr V_three_elem [(V8QI "BLK") (V16QI "BLK")
                                  (V4HI "BLK") (V8HI "BLK")
                                  (V4HF "BLK") (V8HF "BLK")
+                                 (V4BF "BLK") (V8BF "BLK")
                                  (V2SI "BLK") (V4SI "BLK")
                                  (V2SF "BLK") (V4SF "BLK")
                                  (DI "EI")    (V2DI "EI")])
***************
*** 516,521 ****
--- 621,627 ----
  (define_mode_attr V_four_elem [(V8QI "SI")   (V16QI "SI")
                                 (V4HI "V4HI") (V8HI "V4HI")
                                 (V4HF "V4HF") (V8HF "V4HF")
+                                (V4BF "V4BF") (V8BF "V4BF")
                                 (V2SI "V4SI") (V4SI "V4SI")
                                 (V2SF "V4SF") (V4SF "V4SF")
                                 (DI "OI")     (V2DI "OI")])
***************
*** 524,533 ****
  (define_mode_attr V_reg [(V8QI "P") (V16QI "q")
  			 (V4HI "P") (V8HI  "q")
  			 (V4HF "P") (V8HF  "q")
  			 (V2SI "P") (V4SI  "q")
  			 (V2SF "P") (V4SF  "q")
  			 (DI   "P") (V2DI  "q")
! 			 (V2HF "") (SF   "")
  			 (DF    "P") (HF   "")])
  
  ;; Output template to select the high VFP register of a mult-register value.
--- 630,640 ----
  (define_mode_attr V_reg [(V8QI "P") (V16QI "q")
  			 (V4HI "P") (V8HI  "q")
  			 (V4HF "P") (V8HF  "q")
+ 			 (V4BF "P") (V8BF  "q")
  			 (V2SI "P") (V4SI  "q")
  			 (V2SF "P") (V4SF  "q")
  			 (DI   "P") (V2DI  "q")
! 			 (V2HF "") (SF   "") (SI "")
  			 (DF    "P") (HF   "")])
  
  ;; Output template to select the high VFP register of a mult-register value.
***************
*** 554,560 ****
  (define_mode_attr V_HALF [(V16QI "V8QI") (V8HI "V4HI")
  			  (V8HF "V4HF") (V4SI  "V2SI")
  			  (V4SF "V2SF") (V2DF "DF")
! 			  (V2DI "DI") (V4HF "HF")])
  
  ;; Same, but lower-case.
  (define_mode_attr V_half [(V16QI "v8qi") (V8HI "v4hi")
--- 661,668 ----
  (define_mode_attr V_HALF [(V16QI "V8QI") (V8HI "V4HI")
  			  (V8HF "V4HF") (V4SI  "V2SI")
  			  (V4SF "V2SF") (V2DF "DF")
! 			  (V2DI "DI") (V4HF "HF")
! 			  (V4BF "BF") (V8BF  "V4BF")])
  
  ;; Same, but lower-case.
  (define_mode_attr V_half [(V16QI "v8qi") (V8HI "v4hi")
***************
*** 565,571 ****
  (define_mode_attr V_DOUBLE [(V8QI "V16QI") (V4HI "V8HI")
  			    (V2SI "V4SI") (V4HF "V8HF")
  			    (V2SF "V4SF") (DF "V2DF")
! 			    (DI "V2DI")])
  
  ;; Same, but lower-case.
  (define_mode_attr V_double [(V8QI "v16qi") (V4HI "v8hi")
--- 673,679 ----
  (define_mode_attr V_DOUBLE [(V8QI "V16QI") (V4HI "V8HI")
  			    (V2SI "V4SI") (V4HF "V8HF")
  			    (V2SF "V4SF") (DF "V2DF")
! 			    (DI "V2DI")   (V4BF "V8BF")])
  
  ;; Same, but lower-case.
  (define_mode_attr V_double [(V8QI "v16qi") (V4HI "v8hi")
***************
*** 584,589 ****
--- 692,698 ----
  					(V4SI "V2SI") (V4SF "V2SF")
  					(V8QI "V8QI") (V4HI "V4HI")
  					(V2SI "V2SI") (V2SF "V2SF")
+ 					(V8BF "V4BF") (V4BF "V4BF")
  					(V8HF "V4HF") (V4HF "V4HF")])
  
  ;; Mode of result of comparison operations (and bit-select operand 1).
***************
*** 591,596 ****
--- 700,706 ----
  				(V4HI "V4HI") (V8HI  "V8HI")
                                  (V2SI "V2SI") (V4SI  "V4SI")
  				(V4HF "V4HI") (V8HF  "V8HI")
+ 				(V4BF "V4HI") (V8BF  "V8HI")
                                  (V2SF "V2SI") (V4SF  "V4SI")
                                  (DI   "DI")   (V2DI  "V2DI")])
  
***************
*** 632,637 ****
--- 742,748 ----
                   (V4HI "u16") (V8HI "u16")
                               (V2SI "32") (V4SI "32")
                               (V4HF "u16") (V8HF "u16")
+                              (V4BF "u16") (V8BF "u16")
                               (V2SF "32") (V4SF "32")])
  
  (define_mode_attr V_sz_elem [(V8QI "8")  (V16QI "8")
***************
*** 639,644 ****
--- 750,756 ----
  			     (V2SI "32") (V4SI  "32")
  			     (DI   "64") (V2DI  "64")
  			     (V4HF "16") (V8HF "16")
+ 			     (V4BF "16") (V8BF "16")
  			     (V2SF "32") (V4SF  "32")])
  
  (define_mode_attr V_elem_ch [(V8QI "b")  (V16QI "b")
***************
*** 677,682 ****
--- 789,800 ----
                             (V2SF "") (V4SF "")
                             (DI "_neon") (V2DI "")])
  
+ ;; To select the low 64 bits of a vector.
+ (define_mode_attr V_bf_low [(V4BF "P") (V8BF "e")])
+ 
+ ;; To generate intermediate modes for BF16 scalar convert.
+ (define_mode_attr V_bf_cvt_m [(V2SI "BF") (SF "V2SI")])
+ 
  
  ;; Scalars to be presented to scalar multiplication instructions
  ;; must satisfy the following constraints.
***************
*** 709,718 ****
--- 827,838 ----
  			    (V2SI "true") (V4SI  "false")
  			    (V2SF "true") (V4SF  "false")
  			    (DI   "true") (V2DI  "false")
+ 			    (V4BF "true") (V8BF  "false")
  			    (V4HF "true") (V8HF  "false")])
  
  (define_mode_attr V_mode_nunits [(V8QI "8") (V16QI "16")
  				 (V4HF "4") (V8HF "8")
+ 				 (V4BF "4") (V8BF "8")
                                   (V4HI "4") (V8HI "8")
                                   (V2SI "2") (V4SI "4")
                                   (V2SF "2") (V4SF "4")
***************
*** 735,742 ****
  (define_mode_attr qhs_extenddi_op [(SI "s_register_operand")
  				   (HI "nonimmediate_operand")
  				   (QI "arm_reg_or_extendqisi_mem_op")])
! (define_mode_attr qhs_extenddi_cstr [(SI "r,0,r,r,r") (HI "r,0,rm,rm,r") (QI "r,0,rUq,rm,r")])
! (define_mode_attr qhs_zextenddi_cstr [(SI "r,0,r,r") (HI "r,0,rm,r") (QI "r,0,rm,r")])
  
  ;; Mode attributes used for fixed-point support.
  (define_mode_attr qaddsub_suf [(V4UQQ "8") (V2UHQ "16") (UQQ "8") (UHQ "16")
--- 855,862 ----
  (define_mode_attr qhs_extenddi_op [(SI "s_register_operand")
  				   (HI "nonimmediate_operand")
  				   (QI "arm_reg_or_extendqisi_mem_op")])
! (define_mode_attr qhs_extenddi_cstr [(SI "0,r,r") (HI "0,rm,rm") (QI "0,rUq,rm")])
! (define_mode_attr qhs_zextenddi_cstr [(SI "0,r") (HI "0,rm") (QI "0,rm")])
  
  ;; Mode attributes used for fixed-point support.
  (define_mode_attr qaddsub_suf [(V4UQQ "8") (V2UHQ "16") (UQQ "8") (UHQ "16")
***************
*** 744,749 ****
--- 864,875 ----
  			       (V4QQ "8") (V2HQ "16") (QQ "8") (HQ "16")
  			       (V2HA "16") (HA "16") (SQ "") (SA "")])
  
+ (define_mode_attr qaddsub_clob_q [(V4UQQ "0") (V2UHQ "0") (UQQ "0") (UHQ "0")
+ 			       (V2UHA "0") (UHA "0")
+ 			       (V4QQ "0") (V2HQ "0") (QQ "0") (HQ "0")
+ 			       (V2HA "0") (HA "0") (SQ "ARM_Q_BIT_READ")
+ 			       (SA "ARM_Q_BIT_READ")])
+ 
  ;; Mode attribute for vshll.
  (define_mode_attr V_innermode [(V8QI "QI") (V4HI "HI") (V2SI "SI")])
  
***************
*** 760,765 ****
--- 886,892 ----
  		     (V4HF "") (V8HF "_q")
  		     (V2SF "") (V4SF "_q")
  		     (V4HF "") (V8HF "_q")
+ 		     (V4BF "") (V8BF "_q")
  		     (DI "")   (V2DI "_q")
  		     (DF "")   (V2DF "_q")
  		     (HF "")])
***************
*** 769,778 ****
--- 896,914 ----
  (define_mode_attr VSI2QI [(V2SI "V8QI") (V4SI "V16QI")])
  (define_mode_attr vsi2qi [(V2SI "v8qi") (V4SI "v16qi")])
  
+ (define_mode_attr VSF2BF [(V2SF "V4BF") (V4SF "V8BF")])
+ 
+ (define_mode_attr cde_suffix [(SI "") (DI "d")])
+ (define_mode_attr cde_dest [(SI "%0") (DI "%0, %H0")])
+ 
  ;;----------------------------------------------------------------------------
  ;; Code attributes
  ;;----------------------------------------------------------------------------
  
+ ;; Determine the mode of a 'wide compare', ie where the carry flag is
+ ;; propagated into the comparison.
+ (define_code_attr CC_EXTEND [(sign_extend "CC_NV") (zero_extend "CC_B")])
+ 
  ;; Assembler mnemonics for vqh_ops and vqhs_ops iterators.
  (define_code_attr VQH_mnem [(plus "vadd") (smin "vmin") (smax "vmax")
                  (umin "vmin") (umax "vmax")])
***************
*** 785,795 ****
  (define_code_attr VQH_sign [(plus "i") (smin "s") (smax "s") (umin "u")
                  (umax "u")])
  
! (define_code_attr cnb [(ltu "CC_C") (geu "CC")])
! (define_code_attr optab [(ltu "ltu") (geu "geu")])
  
  ;; Assembler mnemonics for signedness of widening operations.
  (define_code_attr US [(sign_extend "s") (zero_extend "u")])
  
  ;; Signedness suffix for float->fixed conversions.  Empty for signed
  ;; conversion.
--- 921,935 ----
  (define_code_attr VQH_sign [(plus "i") (smin "s") (smax "s") (umin "u")
                  (umax "u")])
  
! ;; Map rtl operator codes to optab names
! (define_code_attr optab
!  [(and "and")
!   (ior "ior")
!   (xor "xor")])
  
  ;; Assembler mnemonics for signedness of widening operations.
  (define_code_attr US [(sign_extend "s") (zero_extend "u")])
+ (define_code_attr Us [(sign_extend "") (zero_extend "u")])
  
  ;; Signedness suffix for float->fixed conversions.  Empty for signed
  ;; conversion.
***************
*** 819,824 ****
--- 959,965 ----
  ;; Mapping between vector UNSPEC operations and the signed ('s'),
  ;; unsigned ('u'), poly ('p') or float ('f') nature of their data type.
  (define_int_attr sup [
+   (UNSPEC_SXTB16 "s") (UNSPEC_UXTB16 "u")
    (UNSPEC_VADDL_S "s") (UNSPEC_VADDL_U "u")
    (UNSPEC_VADDW_S "s") (UNSPEC_VADDW_U "u")
    (UNSPEC_VRHADD_S "s") (UNSPEC_VRHADD_U "u")
***************
*** 834,839 ****
--- 975,981 ----
    (UNSPEC_VSUBW_S "s") (UNSPEC_VSUBW_U "u")
    (UNSPEC_VHSUB_S "s") (UNSPEC_VHSUB_U "u")
    (UNSPEC_VQSUB_S "s") (UNSPEC_VQSUB_U "u")
+   (UNSPEC_VABAL_S "s") (UNSPEC_VABAL_U "u")
    (UNSPEC_VABD_S "s") (UNSPEC_VABD_U "u")
    (UNSPEC_VABDL_S "s") (UNSPEC_VABDL_U "u")
    (UNSPEC_VMAX "s") (UNSPEC_VMAX_U "u")
***************
*** 866,871 ****
--- 1008,1016 ----
    (UNSPEC_VRSRA_S_N "s") (UNSPEC_VRSRA_U_N "u")
    (UNSPEC_VCVTH_S "s") (UNSPEC_VCVTH_U "u")
    (UNSPEC_DOT_S "s") (UNSPEC_DOT_U "u")
+   (UNSPEC_DOT_US "us") (UNSPEC_DOT_SU "su")
+   (UNSPEC_SSAT16 "s") (UNSPEC_USAT16 "u")
+   (UNSPEC_MATMUL_S "s") (UNSPEC_MATMUL_U "u") (UNSPEC_MATMUL_US "us")
  ])
  
  (define_int_attr vfml_half
***************
*** 1006,1011 ****
--- 1151,1187 ----
  		      (UNSPEC_VCMLA180 "180")
  		      (UNSPEC_VCMLA270 "270")])
  
+ (define_int_attr simd32_op [(UNSPEC_QADD8 "qadd8") (UNSPEC_QSUB8 "qsub8")
+ 			    (UNSPEC_SHADD8 "shadd8") (UNSPEC_SHSUB8 "shsub8")
+ 			    (UNSPEC_UHADD8 "uhadd8") (UNSPEC_UHSUB8 "uhsub8")
+ 			    (UNSPEC_UQADD8 "uqadd8") (UNSPEC_UQSUB8 "uqsub8")
+ 			    (UNSPEC_QADD16 "qadd16") (UNSPEC_QASX "qasx")
+ 			    (UNSPEC_QSAX "qsax") (UNSPEC_QSUB16 "qsub16")
+ 			    (UNSPEC_SHADD16 "shadd16") (UNSPEC_SHASX "shasx")
+ 			    (UNSPEC_SHSAX "shsax") (UNSPEC_SHSUB16 "shsub16")
+ 			    (UNSPEC_UHADD16 "uhadd16") (UNSPEC_UHASX "uhasx")
+ 			    (UNSPEC_UHSAX "uhsax") (UNSPEC_UHSUB16 "uhsub16")
+ 			    (UNSPEC_UQADD16 "uqadd16") (UNSPEC_UQASX "uqasx")
+ 			    (UNSPEC_UQSAX "uqsax") (UNSPEC_UQSUB16 "uqsub16")
+ 			    (UNSPEC_SMUSD "smusd") (UNSPEC_SMUSDX "smusdx")
+ 			    (UNSPEC_SXTAB16 "sxtab16") (UNSPEC_UXTAB16 "uxtab16")
+ 			    (UNSPEC_USAD8 "usad8") (UNSPEC_SMLALD "smlald")
+ 			    (UNSPEC_SMLALDX "smlaldx") (UNSPEC_SMLSLD "smlsld")
+ 			    (UNSPEC_SMLSLDX "smlsldx")(UNSPEC_SADD8 "sadd8")
+ 			    (UNSPEC_UADD8 "uadd8") (UNSPEC_SSUB8 "ssub8")
+ 			    (UNSPEC_USUB8 "usub8") (UNSPEC_SADD16 "sadd16")
+ 			    (UNSPEC_SASX "sasx") (UNSPEC_SSAX "ssax")
+ 			    (UNSPEC_SSUB16 "ssub16") (UNSPEC_UADD16 "uadd16")
+ 			    (UNSPEC_UASX "uasx") (UNSPEC_USAX "usax")
+ 			    (UNSPEC_USUB16 "usub16") (UNSPEC_SMLAD "smlad")
+ 			    (UNSPEC_SMLADX "smladx") (UNSPEC_SMLSD "smlsd")
+ 			    (UNSPEC_SMLSDX "smlsdx") (UNSPEC_SMUAD "smuad")
+ 			    (UNSPEC_SMUADX "smuadx") (UNSPEC_SSAT16 "ssat16")
+ 			    (UNSPEC_USAT16 "usat16")])
+ 
+ (define_int_attr mmla_sfx [(UNSPEC_MATMUL_S "s8") (UNSPEC_MATMUL_U "u8")
+ 			   (UNSPEC_MATMUL_US "s8")])
+ 
  ;; Both kinds of return insn.
  (define_code_iterator RETURNS [return simple_return])
  (define_code_attr return_str [(return "") (simple_return "simple_")])
***************
*** 1068,1071 ****
  (define_int_attr MRRC [(VUNSPEC_MRRC "MRRC") (VUNSPEC_MRRC2 "MRRC2")])
  
  (define_int_attr opsuffix [(UNSPEC_DOT_S "s8")
! 			   (UNSPEC_DOT_U "u8")])
--- 1244,1258 ----
  (define_int_attr MRRC [(VUNSPEC_MRRC "MRRC") (VUNSPEC_MRRC2 "MRRC2")])
  
  (define_int_attr opsuffix [(UNSPEC_DOT_S "s8")
! 			   (UNSPEC_DOT_U "u8")
! 			   (UNSPEC_DOT_US "s8")
! 			   (UNSPEC_DOT_SU "u8")
! 			   ])
! 
! (define_int_attr smlaw_op [(UNSPEC_SMLAWB "smlawb") (UNSPEC_SMLAWT "smlawt")])
! 
! ;; An iterator for VFMA<bt>
! (define_int_attr bt [(UNSPEC_BFMAB "b") (UNSPEC_BFMAT "t")])
! 
! ;; An iterator for CDE MVE accumulator/non-accumulator versions.
! (define_int_attr a [(UNSPEC_VCDE "") (UNSPEC_VCDEA "a")])
diff -Nrcpad gcc-9.3.0/gcc/config/arm/iwmmxt.md gcc-10.1.0/gcc/config/arm/iwmmxt.md
*** gcc-9.3.0/gcc/config/arm/iwmmxt.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/iwmmxt.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Patterns for the Intel Wireless MMX technology architecture.
! ;; Copyright (C) 2003-2019 Free Software Foundation, Inc.
  ;; Contributed by Red Hat.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Patterns for the Intel Wireless MMX technology architecture.
! ;; Copyright (C) 2003-2020 Free Software Foundation, Inc.
  ;; Contributed by Red Hat.
  
  ;; This file is part of GCC.
***************
*** 55,99 ****
  )
  
  (define_insn "iwmmxt_iordi3"
!   [(set (match_operand:DI         0 "register_operand" "=y,?&r,?&r")
!         (ior:DI (match_operand:DI 1 "register_operand" "%y,0,r")
! 		(match_operand:DI 2 "register_operand"  "y,r,r")))]
    "TARGET_REALLY_IWMMXT"
!   "@
!    wor%?\\t%0, %1, %2
!    #
!    #"
    [(set_attr "predicable" "yes")
!    (set_attr "length" "4,8,8")
!    (set_attr "type" "wmmx_wor,*,*")]
  )
  
  (define_insn "iwmmxt_xordi3"
!   [(set (match_operand:DI         0 "register_operand" "=y,?&r,?&r")
!         (xor:DI (match_operand:DI 1 "register_operand" "%y,0,r")
! 		(match_operand:DI 2 "register_operand"  "y,r,r")))]
    "TARGET_REALLY_IWMMXT"
!   "@
!    wxor%?\\t%0, %1, %2
!    #
!    #"
    [(set_attr "predicable" "yes")
!    (set_attr "length" "4,8,8")
!    (set_attr "type" "wmmx_wxor,*,*")]
  )
  
  (define_insn "iwmmxt_anddi3"
!   [(set (match_operand:DI         0 "register_operand" "=y,?&r,?&r")
!         (and:DI (match_operand:DI 1 "register_operand" "%y,0,r")
! 		(match_operand:DI 2 "register_operand"  "y,r,r")))]
    "TARGET_REALLY_IWMMXT"
!   "@
!    wand%?\\t%0, %1, %2
!    #
!    #"
    [(set_attr "predicable" "yes")
!    (set_attr "length" "4,8,8")
!    (set_attr "type" "wmmx_wand,*,*")]
  )
  
  (define_insn "iwmmxt_nanddi3"
--- 55,90 ----
  )
  
  (define_insn "iwmmxt_iordi3"
!   [(set (match_operand:DI         0 "register_operand" "=y")
!         (ior:DI (match_operand:DI 1 "register_operand" "%y")
! 		(match_operand:DI 2 "register_operand"  "y")))]
    "TARGET_REALLY_IWMMXT"
!   "wor%?\\t%0, %1, %2"
    [(set_attr "predicable" "yes")
!    (set_attr "length" "4")
!    (set_attr "type" "wmmx_wor")]
  )
  
  (define_insn "iwmmxt_xordi3"
!   [(set (match_operand:DI         0 "register_operand" "=y")
!         (xor:DI (match_operand:DI 1 "register_operand" "%y")
! 		(match_operand:DI 2 "register_operand"  "y")))]
    "TARGET_REALLY_IWMMXT"
!   "wxor%?\\t%0, %1, %2"
    [(set_attr "predicable" "yes")
!    (set_attr "length" "4")
!    (set_attr "type" "wmmx_wxor")]
  )
  
  (define_insn "iwmmxt_anddi3"
!   [(set (match_operand:DI         0 "register_operand" "=y")
!         (and:DI (match_operand:DI 1 "register_operand" "%y")
! 		(match_operand:DI 2 "register_operand"  "y")))]
    "TARGET_REALLY_IWMMXT"
!   "wand%?\\t%0, %1, %2"
    [(set_attr "predicable" "yes")
!    (set_attr "length" "4")
!    (set_attr "type" "wmmx_wand")]
  )
  
  (define_insn "iwmmxt_nanddi3"
***************
*** 256,310 ****
  
  (define_expand "iwmmxt_setwcgr0"
    [(set (reg:SI WCGR0)
! 	(match_operand:SI 0 "register_operand"  ""))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_setwcgr1"
    [(set (reg:SI WCGR1)
! 	(match_operand:SI 0 "register_operand"  ""))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_setwcgr2"
    [(set (reg:SI WCGR2)
! 	(match_operand:SI 0 "register_operand"  ""))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_setwcgr3"
    [(set (reg:SI WCGR3)
! 	(match_operand:SI 0 "register_operand"  ""))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_getwcgr0"
!   [(set (match_operand:SI 0 "register_operand"  "")
          (reg:SI WCGR0))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_getwcgr1"
!   [(set (match_operand:SI 0 "register_operand"  "")
          (reg:SI WCGR1))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_getwcgr2"
!   [(set (match_operand:SI 0 "register_operand"  "")
          (reg:SI WCGR2))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_getwcgr3"
!   [(set (match_operand:SI 0 "register_operand"  "")
          (reg:SI WCGR3))]
    "TARGET_REALLY_IWMMXT"
    {}
--- 247,301 ----
  
  (define_expand "iwmmxt_setwcgr0"
    [(set (reg:SI WCGR0)
! 	(match_operand:SI 0 "register_operand"))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_setwcgr1"
    [(set (reg:SI WCGR1)
! 	(match_operand:SI 0 "register_operand"))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_setwcgr2"
    [(set (reg:SI WCGR2)
! 	(match_operand:SI 0 "register_operand"))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_setwcgr3"
    [(set (reg:SI WCGR3)
! 	(match_operand:SI 0 "register_operand"))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_getwcgr0"
!   [(set (match_operand:SI 0 "register_operand")
          (reg:SI WCGR0))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_getwcgr1"
!   [(set (match_operand:SI 0 "register_operand")
          (reg:SI WCGR1))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_getwcgr2"
!   [(set (match_operand:SI 0 "register_operand")
          (reg:SI WCGR2))]
    "TARGET_REALLY_IWMMXT"
    {}
  )
  
  (define_expand "iwmmxt_getwcgr3"
!   [(set (match_operand:SI 0 "register_operand")
          (reg:SI WCGR3))]
    "TARGET_REALLY_IWMMXT"
    {}
diff -Nrcpad gcc-9.3.0/gcc/config/arm/iwmmxt2.md gcc-10.1.0/gcc/config/arm/iwmmxt2.md
*** gcc-9.3.0/gcc/config/arm/iwmmxt2.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/iwmmxt2.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Patterns for the Intel Wireless MMX technology architecture.
! ;; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;; Written by Marvell, Inc.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Patterns for the Intel Wireless MMX technology architecture.
! ;; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;; Written by Marvell, Inc.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/ldmstm.md gcc-10.1.0/gcc/config/arm/ldmstm.md
*** gcc-9.3.0/gcc/config/arm/ldmstm.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/ldmstm.md	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* ARM ldm/stm instruction patterns.  This file was automatically generated
     using arm-ldmstm.ml.  Please do not edit manually.
  
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
     Contributed by CodeSourcery.
  
     This file is part of GCC.
--- 1,7 ----
  /* ARM ldm/stm instruction patterns.  This file was automatically generated
     using arm-ldmstm.ml.  Please do not edit manually.
  
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
     Contributed by CodeSourcery.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/ldrdstrd.md gcc-10.1.0/gcc/config/arm/ldrdstrd.md
*** gcc-9.3.0/gcc/config/arm/ldrdstrd.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/ldrdstrd.md	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ;; ARM ldrd/strd peephole optimizations.
  ;;
! ;; Copyright (C) 2013-2019 Free Software Foundation, Inc.
  ;;
  ;; Written by Greta Yorsh <greta.yorsh@arm.com>
  
--- 1,6 ----
  ;; ARM ldrd/strd peephole optimizations.
  ;;
! ;; Copyright (C) 2013-2020 Free Software Foundation, Inc.
  ;;
  ;; Written by Greta Yorsh <greta.yorsh@arm.com>
  
diff -Nrcpad gcc-9.3.0/gcc/config/arm/linux-eabi.h gcc-10.1.0/gcc/config/arm/linux-eabi.h
*** gcc-9.3.0/gcc/config/arm/linux-eabi.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/linux-eabi.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Configuration file for ARM GNU/Linux EABI targets.
!    Copyright (C) 2004-2019 Free Software Foundation, Inc.
     Contributed by CodeSourcery, LLC   
  
     This file is part of GCC.
--- 1,5 ----
  /* Configuration file for ARM GNU/Linux EABI targets.
!    Copyright (C) 2004-2020 Free Software Foundation, Inc.
     Contributed by CodeSourcery, LLC   
  
     This file is part of GCC.
***************
*** 89,95 ****
  #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
  #endif
  #define MUSL_DYNAMIC_LINKER \
!   "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
  
  /* At this point, bpabi.h will have clobbered LINK_SPEC.  We want to
     use the GNU/Linux version, not the generic BPABI version.  */
--- 89,95 ----
  #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
  #endif
  #define MUSL_DYNAMIC_LINKER \
!   "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
  
  /* At this point, bpabi.h will have clobbered LINK_SPEC.  We want to
     use the GNU/Linux version, not the generic BPABI version.  */
***************
*** 101,109 ****
  #undef  ASAN_CC1_SPEC
  #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
  
  #undef  CC1_SPEC
  #define CC1_SPEC							\
!   LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC,	\
  		       GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " "	\
  		       ANDROID_CC1_SPEC)
  
--- 101,112 ----
  #undef  ASAN_CC1_SPEC
  #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
  
+ #define FDPIC_CC1_SPEC ""
+ 
  #undef  CC1_SPEC
  #define CC1_SPEC							\
!   LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " "	\
! 		       FDPIC_CC1_SPEC,					\
  		       GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " "	\
  		       ANDROID_CC1_SPEC)
  
diff -Nrcpad gcc-9.3.0/gcc/config/arm/linux-elf.h gcc-10.1.0/gcc/config/arm/linux-elf.h
*** gcc-9.3.0/gcc/config/arm/linux-elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/linux-elf.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for ARM running Linux-based GNU systems using ELF
!    Copyright (C) 1993-2019 Free Software Foundation, Inc.
     Contributed by Philip Blundell <philb@gnu.org>
  
     This file is part of GCC.
--- 1,5 ----
  /* Definitions for ARM running Linux-based GNU systems using ELF
!    Copyright (C) 1993-2020 Free Software Foundation, Inc.
     Contributed by Philip Blundell <philb@gnu.org>
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/linux-gas.h gcc-10.1.0/gcc/config/arm/linux-gas.h
*** gcc-9.3.0/gcc/config/arm/linux-gas.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/linux-gas.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for GNU compiler.
     ARM Linux-based GNU systems version.
!    Copyright (C) 1997-2019 Free Software Foundation, Inc.
     Contributed by Russell King  <rmk92@ecs.soton.ac.uk>.
  
     This file is part of GCC.
--- 1,6 ----
  /* Definitions of target machine for GNU compiler.
     ARM Linux-based GNU systems version.
!    Copyright (C) 1997-2020 Free Software Foundation, Inc.
     Contributed by Russell King  <rmk92@ecs.soton.ac.uk>.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/marvell-f-iwmmxt.md gcc-10.1.0/gcc/config/arm/marvell-f-iwmmxt.md
*** gcc-9.3.0/gcc/config/arm/marvell-f-iwmmxt.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/marvell-f-iwmmxt.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Marvell WMMX2 pipeline description
! ;; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;; Written by Marvell, Inc.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Marvell WMMX2 pipeline description
! ;; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;; Written by Marvell, Inc.
  
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/marvell-pj4.md gcc-10.1.0/gcc/config/arm/marvell-pj4.md
*** gcc-9.3.0/gcc/config/arm/marvell-pj4.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/marvell-pj4.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Marvell ARM Processor Pipeline Description
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by Marvell.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Marvell ARM Processor Pipeline Description
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by Marvell.
  
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/mmintrin.h gcc-10.1.0/gcc/config/arm/mmintrin.h
*** gcc-9.3.0/gcc/config/arm/mmintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/mmintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2002-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2002-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arm/mve.md gcc-10.1.0/gcc/config/arm/mve.md
*** gcc-9.3.0/gcc/config/arm/mve.md	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/arm/mve.md	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,11421 ----
+ ;; Arm M-profile Vector Extension Machine Description
+ ;; Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ ;;
+ ;; This file is part of GCC.
+ ;;
+ ;; GCC is free software; you can redistribute it and/or modify it
+ ;; under the terms of the GNU General Public License as published by
+ ;; the Free Software Foundation; either version 3, or (at your option)
+ ;; any later version.
+ ;;
+ ;; GCC is distributed in the hope that it will be useful, but
+ ;; WITHOUT ANY WARRANTY; without even the implied warranty of
+ ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ ;; General Public License for more details.
+ ;;
+ ;; You should have received a copy of the GNU General Public License
+ ;; along with GCC; see the file COPYING3.  If not see
+ ;; <http://www.gnu.org/licenses/>.
+ 
+ (define_mode_iterator MVE_types [V16QI V8HI V4SI V2DI TI V8HF V4SF V2DF])
+ (define_mode_iterator MVE_VLD_ST [V16QI V8HI V4SI V8HF V4SF])
+ (define_mode_iterator MVE_0 [V8HF V4SF])
+ (define_mode_iterator MVE_1 [V16QI V8HI V4SI V2DI])
+ (define_mode_iterator MVE_3 [V16QI V8HI])
+ (define_mode_iterator MVE_2 [V16QI V8HI V4SI])
+ (define_mode_iterator MVE_5 [V8HI V4SI])
+ (define_mode_iterator MVE_6 [V8HI V4SI])
+ 
+ (define_c_enum "unspec" [VST4Q VRNDXQ_F VRNDQ_F VRNDPQ_F VRNDNQ_F VRNDMQ_F
+ 			 VRNDAQ_F VREV64Q_F VNEGQ_F VDUPQ_N_F VABSQ_F VREV32Q_F
+ 			 VCVTTQ_F32_F16 VCVTBQ_F32_F16 VCVTQ_TO_F_S VQNEGQ_S
+ 			 VCVTQ_TO_F_U VREV16Q_S VREV16Q_U VADDLVQ_S VMVNQ_N_S
+ 			 VMVNQ_N_U VCVTAQ_S VCVTAQ_U VREV64Q_S VREV64Q_U
+ 			 VQABSQ_S VNEGQ_S VMVNQ_S VMVNQ_U VDUPQ_N_U VDUPQ_N_S
+ 			 VCLZQ_U VCLZQ_S VCLSQ_S VADDVQ_S VADDVQ_U VABSQ_S
+ 			 VREV32Q_U VREV32Q_S VMOVLTQ_U VMOVLTQ_S VMOVLBQ_S
+ 			 VMOVLBQ_U VCVTQ_FROM_F_S VCVTQ_FROM_F_U VCVTPQ_S
+ 			 VCVTPQ_U VCVTNQ_S VCVTNQ_U VCVTMQ_S VCVTMQ_U
+ 			 VADDLVQ_U VCTP8Q VCTP16Q VCTP32Q VCTP64Q VPNOT
+ 			 VCREATEQ_F VCVTQ_N_TO_F_S VCVTQ_N_TO_F_U VBRSRQ_N_F
+ 			 VSUBQ_N_F VCREATEQ_U VCREATEQ_S VSHRQ_N_S VSHRQ_N_U
+ 			 VCVTQ_N_FROM_F_S VCVTQ_N_FROM_F_U VADDLVQ_P_S
+ 			 VADDLVQ_P_U VCMPNEQ_U VCMPNEQ_S VSHLQ_S VSHLQ_U VABDQ_S
+ 			 VADDQ_N_S VADDVAQ_S VADDVQ_P_S VANDQ_S VBICQ_S
+ 			 VBRSRQ_N_S VCADDQ_ROT270_S VCADDQ_ROT90_S VCMPEQQ_S
+ 			 VCMPEQQ_N_S VCMPNEQ_N_S VEORQ_S VHADDQ_S VHADDQ_N_S
+ 			 VHSUBQ_S VHSUBQ_N_S VMAXQ_S VMAXVQ_S VMINQ_S VMINVQ_S
+ 			 VMLADAVQ_S VMULHQ_S VMULLBQ_INT_S VMULLTQ_INT_S VMULQ_S
+ 			 VMULQ_N_S VORNQ_S VORRQ_S VQADDQ_S VQADDQ_N_S VQRSHLQ_S
+ 			 VQRSHLQ_N_S VQSHLQ_S VQSHLQ_N_S VQSHLQ_R_S VQSUBQ_S
+ 			 VQSUBQ_N_S VRHADDQ_S VRMULHQ_S VRSHLQ_S VRSHLQ_N_S
+ 			 VRSHRQ_N_S VSHLQ_N_S VSHLQ_R_S VSUBQ_S VSUBQ_N_S
+ 			 VABDQ_U VADDQ_N_U VADDVAQ_U VADDVQ_P_U VANDQ_U VBICQ_U
+ 			 VBRSRQ_N_U VCADDQ_ROT270_U VCADDQ_ROT90_U VCMPEQQ_U
+ 			 VCMPEQQ_N_U VCMPNEQ_N_U VEORQ_U VHADDQ_U VHADDQ_N_U
+ 			 VHSUBQ_U VHSUBQ_N_U VMAXQ_U VMAXVQ_U VMINQ_U VMINVQ_U
+ 			 VMLADAVQ_U VMULHQ_U VMULLBQ_INT_U VMULLTQ_INT_U VMULQ_U
+ 			 VMULQ_N_U VORNQ_U VORRQ_U VQADDQ_U VQADDQ_N_U VQRSHLQ_U
+ 			 VQRSHLQ_N_U VQSHLQ_U VQSHLQ_N_U VQSHLQ_R_U VQSUBQ_U
+ 			 VQSUBQ_N_U VRHADDQ_U VRMULHQ_U VRSHLQ_U VRSHLQ_N_U
+ 			 VRSHRQ_N_U VSHLQ_N_U VSHLQ_R_U VSUBQ_U VSUBQ_N_U
+ 			 VCMPGEQ_N_S VCMPGEQ_S VCMPGTQ_N_S VCMPGTQ_S VCMPLEQ_N_S
+ 			 VCMPLEQ_S VCMPLTQ_N_S VCMPLTQ_S VHCADDQ_ROT270_S
+ 			 VHCADDQ_ROT90_S VMAXAQ_S VMAXAVQ_S VMINAQ_S VMINAVQ_S
+ 			 VMLADAVXQ_S VMLSDAVQ_S VMLSDAVXQ_S VQDMULHQ_N_S
+ 			 VQDMULHQ_S VQRDMULHQ_N_S VQRDMULHQ_S VQSHLUQ_N_S
+ 			 VCMPCSQ_N_U VCMPCSQ_U VCMPHIQ_N_U VCMPHIQ_U VABDQ_M_S
+ 			 VABDQ_M_U VABDQ_F VADDQ_N_F VANDQ_F VBICQ_F
+ 			 VCADDQ_ROT270_F VCADDQ_ROT90_F VCMPEQQ_F VCMPEQQ_N_F
+ 			 VCMPGEQ_F VCMPGEQ_N_F VCMPGTQ_F VCMPGTQ_N_F VCMPLEQ_F
+ 			 VCMPLEQ_N_F VCMPLTQ_F VCMPLTQ_N_F VCMPNEQ_F VCMPNEQ_N_F
+ 			 VCMULQ_F VCMULQ_ROT180_F VCMULQ_ROT270_F VCMULQ_ROT90_F
+ 			 VEORQ_F VMAXNMAQ_F VMAXNMAVQ_F VMAXNMQ_F VMAXNMVQ_F
+ 			 VMINNMAQ_F VMINNMAVQ_F VMINNMQ_F VMINNMVQ_F VMULQ_F
+ 			 VMULQ_N_F VORNQ_F VORRQ_F VSUBQ_F VADDLVAQ_U
+ 			 VADDLVAQ_S VBICQ_N_U VBICQ_N_S VCTP8Q_M VCTP16Q_M
+ 			 VCTP32Q_M VCTP64Q_M VCVTBQ_F16_F32 VCVTTQ_F16_F32
+ 			 VMLALDAVQ_U VMLALDAVXQ_U VMLALDAVXQ_S VMLALDAVQ_S
+ 			 VMLSLDAVQ_S VMLSLDAVXQ_S VMOVNBQ_U VMOVNBQ_S
+ 			 VMOVNTQ_U VMOVNTQ_S VORRQ_N_S VORRQ_N_U VQDMULLBQ_N_S
+ 			 VQDMULLBQ_S VQDMULLTQ_N_S VQDMULLTQ_S VQMOVNBQ_U
+ 			 VQMOVNBQ_S VQMOVUNBQ_S VQMOVUNTQ_S VRMLALDAVHXQ_S
+ 			 VRMLSLDAVHQ_S VRMLSLDAVHXQ_S VSHLLBQ_S
+ 			 VSHLLBQ_U VSHLLTQ_U VSHLLTQ_S VQMOVNTQ_U VQMOVNTQ_S
+ 			 VSHLLBQ_N_S VSHLLBQ_N_U VSHLLTQ_N_U VSHLLTQ_N_S
+ 			 VRMLALDAVHQ_U VRMLALDAVHQ_S VMULLTQ_POLY_P
+ 			 VMULLBQ_POLY_P VBICQ_M_N_S VBICQ_M_N_U VCMPEQQ_M_F
+ 			 VCVTAQ_M_S VCVTAQ_M_U VCVTQ_M_TO_F_S VCVTQ_M_TO_F_U
+ 			 VQRSHRNBQ_N_U VQRSHRNBQ_N_S VQRSHRUNBQ_N_S
+ 			 VRMLALDAVHAQ_S VABAVQ_S VABAVQ_U VSHLCQ_S VSHLCQ_U
+ 			 VRMLALDAVHAQ_U VABSQ_M_S VADDVAQ_P_S VADDVAQ_P_U
+ 			 VCLSQ_M_S VCLZQ_M_S VCLZQ_M_U VCMPCSQ_M_N_U
+ 			 VCMPCSQ_M_U VCMPEQQ_M_N_S VCMPEQQ_M_N_U VCMPEQQ_M_S
+ 			 VCMPEQQ_M_U VCMPGEQ_M_N_S VCMPGEQ_M_S VCMPGTQ_M_N_S
+ 			 VCMPGTQ_M_S VCMPHIQ_M_N_U VCMPHIQ_M_U VCMPLEQ_M_N_S
+ 			 VCMPLEQ_M_S VCMPLTQ_M_N_S VCMPLTQ_M_S VCMPNEQ_M_N_S
+ 			 VCMPNEQ_M_N_U VCMPNEQ_M_S VCMPNEQ_M_U VDUPQ_M_N_S
+ 			 VDUPQ_M_N_U VDWDUPQ_N_U VDWDUPQ_WB_U VIWDUPQ_N_U
+ 			 VIWDUPQ_WB_U VMAXAQ_M_S VMAXAVQ_P_S VMAXVQ_P_S
+ 			 VMAXVQ_P_U VMINAQ_M_S VMINAVQ_P_S VMINVQ_P_S VMINVQ_P_U
+ 			 VMLADAVAQ_S VMLADAVAQ_U VMLADAVQ_P_S VMLADAVQ_P_U
+ 			 VMLADAVXQ_P_S VMLAQ_N_S VMLAQ_N_U VMLASQ_N_S VMLASQ_N_U
+ 			 VMLSDAVQ_P_S VMLSDAVXQ_P_S VMVNQ_M_S VMVNQ_M_U
+ 			 VNEGQ_M_S VPSELQ_S VPSELQ_U VQABSQ_M_S VQDMLAHQ_N_S
+ 			 VQDMLAHQ_N_U VQNEGQ_M_S VQRDMLADHQ_S VQRDMLADHXQ_S
+ 			 VQRDMLAHQ_N_S VQRDMLAHQ_N_U VQRDMLASHQ_N_S
+ 			 VQRDMLASHQ_N_U VQRDMLSDHQ_S VQRDMLSDHXQ_S VQRSHLQ_M_N_S
+ 			 VQRSHLQ_M_N_U VQSHLQ_M_R_S VQSHLQ_M_R_U VREV64Q_M_S
+ 			 VREV64Q_M_U VRSHLQ_M_N_S VRSHLQ_M_N_U VSHLQ_M_R_S
+ 			 VSHLQ_M_R_U VSLIQ_N_S VSLIQ_N_U VSRIQ_N_S VSRIQ_N_U
+ 			 VQDMLSDHXQ_S VQDMLSDHQ_S VQDMLADHXQ_S VQDMLADHQ_S
+ 			 VMLSDAVAXQ_S VMLSDAVAQ_S VMLADAVAXQ_S
+ 			 VCMPGEQ_M_F VCMPGTQ_M_N_F VMLSLDAVQ_P_S VRMLALDAVHAXQ_S
+ 			 VMLSLDAVXQ_P_S VFMAQ_F VMLSLDAVAQ_S VQSHRUNBQ_N_S
+ 			 VQRSHRUNTQ_N_S VCMLAQ_F VMINNMAQ_M_F VFMASQ_N_F
+ 			 VDUPQ_M_N_F VCMPGTQ_M_F VCMPLTQ_M_F VRMLSLDAVHQ_P_S
+ 			 VQSHRUNTQ_N_S VABSQ_M_F VMAXNMAVQ_P_F VFMAQ_N_F
+ 			 VRMLSLDAVHXQ_P_S VREV32Q_M_F VRMLSLDAVHAQ_S
+ 			 VRMLSLDAVHAXQ_S VCMPLTQ_M_N_F VCMPNEQ_M_F VRNDAQ_M_F
+ 			 VRNDPQ_M_F VADDLVAQ_P_S VQMOVUNBQ_M_S VCMPLEQ_M_F
+ 			 VCMLAQ_ROT180_F VMLSLDAVAXQ_S VRNDXQ_M_F VFMSQ_F
+ 			 VMINNMVQ_P_F VMAXNMVQ_P_F VPSELQ_F VCMLAQ_ROT90_F
+ 			 VQMOVUNTQ_M_S VREV64Q_M_F VNEGQ_M_F VRNDMQ_M_F
+ 			 VCMPLEQ_M_N_F VCMPGEQ_M_N_F VRNDNQ_M_F VMINNMAVQ_P_F
+ 			 VCMPNEQ_M_N_F VRMLALDAVHQ_P_S VRMLALDAVHXQ_P_S
+ 			 VCMPEQQ_M_N_F VCMLAQ_ROT270_F VMAXNMAQ_M_F VRNDQ_M_F
+ 			 VMLALDAVQ_P_U VMLALDAVQ_P_S VQMOVNBQ_M_S VQMOVNBQ_M_U
+ 			 VMOVLTQ_M_U VMOVLTQ_M_S VMOVNBQ_M_U VMOVNBQ_M_S
+ 			 VRSHRNTQ_N_U VRSHRNTQ_N_S VORRQ_M_N_S VORRQ_M_N_U
+ 			 VREV32Q_M_S VREV32Q_M_U VQRSHRNTQ_N_U VQRSHRNTQ_N_S
+ 			 VMOVNTQ_M_U VMOVNTQ_M_S VMOVLBQ_M_U VMOVLBQ_M_S
+ 			 VMLALDAVAQ_S VMLALDAVAQ_U VQSHRNBQ_N_U VQSHRNBQ_N_S
+ 			 VSHRNBQ_N_U VSHRNBQ_N_S VRSHRNBQ_N_S VRSHRNBQ_N_U
+ 			 VMLALDAVXQ_P_U VMLALDAVXQ_P_S VQMOVNTQ_M_U VQMOVNTQ_M_S
+ 			 VMVNQ_M_N_U VMVNQ_M_N_S VQSHRNTQ_N_U VQSHRNTQ_N_S
+ 			 VMLALDAVAXQ_S VMLALDAVAXQ_U VSHRNTQ_N_S VSHRNTQ_N_U
+ 			 VCVTBQ_M_F16_F32 VCVTBQ_M_F32_F16 VCVTTQ_M_F16_F32
+ 			 VCVTTQ_M_F32_F16 VCVTMQ_M_S VCVTMQ_M_U VCVTNQ_M_S
+ 			 VCVTPQ_M_S VCVTPQ_M_U VCVTQ_M_N_FROM_F_S VCVTNQ_M_U
+ 			 VREV16Q_M_S VREV16Q_M_U VREV32Q_M VCVTQ_M_FROM_F_U
+ 			 VCVTQ_M_FROM_F_S VRMLALDAVHQ_P_U VADDLVAQ_P_U
+ 			 VCVTQ_M_N_FROM_F_U VQSHLUQ_M_N_S VABAVQ_P_S
+ 			 VABAVQ_P_U VSHLQ_M_S VSHLQ_M_U VSRIQ_M_N_S
+ 			 VSRIQ_M_N_U VSUBQ_M_U VSUBQ_M_S VCVTQ_M_N_TO_F_U
+ 			 VCVTQ_M_N_TO_F_S VQADDQ_M_U VQADDQ_M_S
+ 			 VRSHRQ_M_N_S VSUBQ_M_N_S VSUBQ_M_N_U VBRSRQ_M_N_S
+ 			 VSUBQ_M_N_F VBICQ_M_F VHADDQ_M_U VBICQ_M_U VBICQ_M_S
+ 			 VMULQ_M_N_U VHADDQ_M_S VORNQ_M_F VMLAQ_M_N_S VQSUBQ_M_U
+ 			 VQSUBQ_M_S VMLAQ_M_N_U VQSUBQ_M_N_U VQSUBQ_M_N_S
+ 			 VMULLTQ_INT_M_S VMULLTQ_INT_M_U VMULQ_M_N_S VMULQ_M_N_F
+ 			 VMLASQ_M_N_U VMLASQ_M_N_S VMAXQ_M_U VQRDMLAHQ_M_N_U
+ 			 VCADDQ_ROT270_M_F VCADDQ_ROT270_M_U VCADDQ_ROT270_M_S
+ 			 VQRSHLQ_M_S VMULQ_M_F VRHADDQ_M_U VSHRQ_M_N_U
+ 			 VRHADDQ_M_S VMULQ_M_S VMULQ_M_U VQRDMLASHQ_M_N_S
+ 			 VRSHLQ_M_S VRSHLQ_M_U VRSHRQ_M_N_U VADDQ_M_N_F
+ 			 VADDQ_M_N_S VADDQ_M_N_U VQRDMLASHQ_M_N_U VMAXQ_M_S
+ 			 VQRDMLAHQ_M_N_S VORRQ_M_S VORRQ_M_U VORRQ_M_F
+ 			 VQRSHLQ_M_U VRMULHQ_M_U VRMULHQ_M_S VMINQ_M_S VMINQ_M_U
+ 			 VANDQ_M_F VANDQ_M_U VANDQ_M_S VHSUBQ_M_N_S VHSUBQ_M_N_U
+ 			 VMULHQ_M_S VMULHQ_M_U VMULLBQ_INT_M_U
+ 			 VMULLBQ_INT_M_S VCADDQ_ROT90_M_F
+ 			 VSHRQ_M_N_S VADDQ_M_U VSLIQ_M_N_U
+ 			 VQADDQ_M_N_S VBRSRQ_M_N_F VABDQ_M_F VBRSRQ_M_N_U
+ 			 VEORQ_M_F VSHLQ_M_N_S VQDMLAHQ_M_N_U VQDMLAHQ_M_N_S
+ 			 VSHLQ_M_N_U VMLADAVAQ_P_U VMLADAVAQ_P_S VSLIQ_M_N_S
+ 			 VQSHLQ_M_U VQSHLQ_M_S VCADDQ_ROT90_M_U VCADDQ_ROT90_M_S
+ 			 VORNQ_M_U VORNQ_M_S VQSHLQ_M_N_S VQSHLQ_M_N_U VADDQ_M_S
+ 			 VHADDQ_M_N_S VADDQ_M_F VQADDQ_M_N_U VEORQ_M_S VEORQ_M_U
+ 			 VHSUBQ_M_S VHSUBQ_M_U VHADDQ_M_N_U VHCADDQ_ROT90_M_S
+ 			 VQRDMLSDHQ_M_S VQRDMLSDHXQ_M_S VQRDMLADHXQ_M_S
+ 			 VQDMULHQ_M_S VMLADAVAXQ_P_S VQDMLADHXQ_M_S
+ 			 VQRDMULHQ_M_S VMLSDAVAXQ_P_S VQDMULHQ_M_N_S
+ 			 VHCADDQ_ROT270_M_S VQDMLSDHQ_M_S VQDMLSDHXQ_M_S
+ 			 VMLSDAVAQ_P_S VQRDMLADHQ_M_S VQDMLADHQ_M_S
+ 			 VMLALDAVAQ_P_U VMLALDAVAQ_P_S VMLALDAVAXQ_P_U
+ 			 VQRSHRNBQ_M_N_U VQRSHRNBQ_M_N_S VQRSHRNTQ_M_N_S
+ 			 VQSHRNBQ_M_N_U VQSHRNBQ_M_N_S VQSHRNTQ_M_N_S
+ 			 VRSHRNBQ_M_N_U VRSHRNBQ_M_N_S VRSHRNTQ_M_N_U
+ 			 VSHLLBQ_M_N_U VSHLLBQ_M_N_S VSHLLTQ_M_N_U VSHLLTQ_M_N_S
+ 			 VSHRNBQ_M_N_S VSHRNBQ_M_N_U VSHRNTQ_M_N_S VSHRNTQ_M_N_U
+ 			 VMLALDAVAXQ_P_S VQRSHRNTQ_M_N_U VQSHRNTQ_M_N_U
+ 			 VRSHRNTQ_M_N_S VQRDMULHQ_M_N_S VRMLALDAVHAQ_P_S
+ 			 VMLSLDAVAQ_P_S VMLSLDAVAXQ_P_S VMULLBQ_POLY_M_P
+ 			 VMULLTQ_POLY_M_P VQDMULLBQ_M_N_S VQDMULLBQ_M_S
+ 			 VQDMULLTQ_M_N_S VQDMULLTQ_M_S VQRSHRUNBQ_M_N_S
+ 			 VQRSHRUNTQ_M_N_SVQSHRUNBQ_M_N_S VQSHRUNTQ_M_N_S
+ 			 VRMLALDAVHAQ_P_U VRMLALDAVHAXQ_P_S VRMLSLDAVHAQ_P_S
+ 			 VRMLSLDAVHAXQ_P_S VQRSHRUNTQ_M_N_S VQSHRUNBQ_M_N_S
+ 			 VCMLAQ_M_F VCMLAQ_ROT180_M_F VCMLAQ_ROT270_M_F
+ 			 VCMLAQ_ROT90_M_F VCMULQ_M_F VCMULQ_ROT180_M_F
+ 			 VCMULQ_ROT270_M_F VCMULQ_ROT90_M_F VFMAQ_M_F
+ 			 VFMAQ_M_N_F VFMASQ_M_N_F VFMSQ_M_F VMAXNMQ_M_F
+ 			 VMINNMQ_M_F VSUBQ_M_F VSTRWQSB_S VSTRWQSB_U
+ 			 VSTRBQSO_S VSTRBQSO_U VSTRBQ_S VSTRBQ_U VLDRBQGO_S
+ 			 VLDRBQGO_U VLDRBQ_S VLDRBQ_U VLDRWQGB_S VLDRWQGB_U
+ 			 VLD1Q_F VLD1Q_S VLD1Q_U VLDRHQ_F VLDRHQGO_S
+ 			 VLDRHQGO_U VLDRHQGSO_S VLDRHQGSO_U VLDRHQ_S VLDRHQ_U
+ 			 VLDRWQ_F VLDRWQ_S VLDRWQ_U VLDRDQGB_S VLDRDQGB_U
+ 			 VLDRDQGO_S VLDRDQGO_U VLDRDQGSO_S VLDRDQGSO_U
+ 			 VLDRHQGO_F VLDRHQGSO_F VLDRWQGB_F VLDRWQGO_F
+ 			 VLDRWQGO_S VLDRWQGO_U VLDRWQGSO_F VLDRWQGSO_S
+ 			 VLDRWQGSO_U VSTRHQ_F VST1Q_S VST1Q_U VSTRHQSO_S
+ 			 VSTRHQSO_U VSTRHQSSO_S VSTRHQSSO_U VSTRHQ_S
+ 			 VSTRHQ_U VSTRWQ_S VSTRWQ_U VSTRWQ_F VST1Q_F VSTRDQSB_S
+ 			 VSTRDQSB_U VSTRDQSO_S VSTRDQSO_U VSTRDQSSO_S
+ 			 VSTRDQSSO_U VSTRWQSO_S VSTRWQSO_U VSTRWQSSO_S
+ 			 VSTRWQSSO_U VSTRHQSO_F VSTRHQSSO_F VSTRWQSB_F
+ 			 VSTRWQSO_F VSTRWQSSO_F VDDUPQ VDDUPQ_M VDWDUPQ
+ 			 VDWDUPQ_M VIDUPQ VIDUPQ_M VIWDUPQ VIWDUPQ_M
+ 			 VSTRWQSBWB_S VSTRWQSBWB_U VLDRWQGBWB_S VLDRWQGBWB_U
+ 			 VSTRWQSBWB_F VLDRWQGBWB_F VSTRDQSBWB_S VSTRDQSBWB_U
+ 			 VLDRDQGBWB_S VLDRDQGBWB_U VADCQ_U VADCQ_M_U VADCQ_S
+ 			 VADCQ_M_S VSBCIQ_U VSBCIQ_S VSBCIQ_M_U VSBCIQ_M_S
+ 			 VSBCQ_U VSBCQ_S VSBCQ_M_U VSBCQ_M_S VADCIQ_U VADCIQ_M_U
+ 			 VADCIQ_S VADCIQ_M_S VLD2Q VLD4Q VST2Q SRSHRL SRSHR
+ 			 URSHR URSHRL SQRSHR UQRSHL UQRSHLL_64 VSHLCQ_M_U
+ 			 UQRSHLL_48 SQRSHRL_64 SQRSHRL_48 VSHLCQ_M_S])
+ 
+ (define_mode_attr MVE_CNVT [(V8HI "V8HF") (V4SI "V4SF") (V8HF "V8HI")
+ 			    (V4SF "V4SI")])
+ 
+ (define_int_attr supf [(VCVTQ_TO_F_S "s") (VCVTQ_TO_F_U "u") (VREV16Q_S "s")
+ 		       (VREV16Q_U "u") (VMVNQ_N_S "s") (VMVNQ_N_U "u")
+ 		       (VCVTAQ_U "u") (VCVTAQ_S "s") (VREV64Q_S "s")
+ 		       (VREV64Q_U "u") (VMVNQ_S "s") (VMVNQ_U "u")
+ 		       (VDUPQ_N_U "u") (VDUPQ_N_S"s") (VADDVQ_S "s")
+ 		       (VADDVQ_U "u") (VADDVQ_S "s") (VADDVQ_U "u")
+ 		       (VMOVLTQ_U "u") (VMOVLTQ_S "s") (VMOVLBQ_S "s")
+ 		       (VMOVLBQ_U "u") (VCVTQ_FROM_F_S "s") (VCVTQ_FROM_F_U "u")
+ 		       (VCVTPQ_S "s") (VCVTPQ_U "u") (VCVTNQ_S "s")
+ 		       (VCVTNQ_U "u") (VCVTMQ_S "s") (VCVTMQ_U "u")
+ 		       (VCLZQ_U "u") (VCLZQ_S "s") (VREV32Q_U "u")
+ 		       (VREV32Q_S "s") (VADDLVQ_U "u") (VADDLVQ_S "s")
+ 		       (VCVTQ_N_TO_F_S "s") (VCVTQ_N_TO_F_U "u")
+ 		       (VCREATEQ_U "u") (VCREATEQ_S "s") (VSHRQ_N_S "s")
+ 		       (VSHRQ_N_U "u") (VCVTQ_N_FROM_F_S "s") (VSHLQ_U "u")
+ 		       (VCVTQ_N_FROM_F_U "u") (VADDLVQ_P_S "s") (VSHLQ_S "s")
+ 		       (VADDLVQ_P_U "u") (VCMPNEQ_U "u") (VCMPNEQ_S "s")
+ 		       (VABDQ_M_S "s") (VABDQ_M_U "u") (VABDQ_S "s")
+ 		       (VABDQ_U "u") (VADDQ_N_S "s") (VADDQ_N_U "u")
+ 		       (VADDVQ_P_S "s")	(VADDVQ_P_U "u") (VANDQ_S "s")
+ 		       (VANDQ_U "u") (VBICQ_S "s") (VBICQ_U "u")
+ 		       (VBRSRQ_N_S "s") (VBRSRQ_N_U "u") (VCADDQ_ROT270_S "s")
+ 		       (VCADDQ_ROT270_U "u") (VCADDQ_ROT90_S "s")
+ 		       (VCMPEQQ_S "s") (VCMPEQQ_U "u") (VCADDQ_ROT90_U "u")
+ 		       (VCMPEQQ_N_S "s") (VCMPEQQ_N_U "u") (VCMPNEQ_N_S "s")
+ 		       (VCMPNEQ_N_U "u") (VEORQ_S "s") (VEORQ_U "u")
+ 		       (VHADDQ_N_S "s") (VHADDQ_N_U "u") (VHADDQ_S "s")
+ 		       (VHADDQ_U "u") (VHSUBQ_N_S "s")	(VHSUBQ_N_U "u")
+ 		       (VHSUBQ_S "s") (VMAXQ_S "s") (VMAXQ_U "u") (VHSUBQ_U "u")
+ 		       (VMAXVQ_S "s") (VMAXVQ_U "u") (VMINQ_S "s") (VMINQ_U "u")
+ 		       (VMINVQ_S "s") (VMINVQ_U "u") (VMLADAVQ_S "s")
+ 		       (VMLADAVQ_U "u") (VMULHQ_S "s") (VMULHQ_U "u")
+ 		       (VMULLBQ_INT_S "s") (VMULLBQ_INT_U "u") (VQADDQ_S "s")
+ 		       (VMULLTQ_INT_S "s") (VMULLTQ_INT_U "u") (VQADDQ_U "u")
+ 		       (VMULQ_N_S "s") (VMULQ_N_U "u") (VMULQ_S "s")
+ 		       (VMULQ_U "u") (VORNQ_S "s") (VORNQ_U "u") (VORRQ_S "s")
+ 		       (VORRQ_U "u") (VQADDQ_N_S "s") (VQADDQ_N_U "u")
+ 		       (VQRSHLQ_N_S "s") (VQRSHLQ_N_U "u") (VQRSHLQ_S "s")
+ 		       (VQRSHLQ_U "u") (VQSHLQ_N_S "s")	(VQSHLQ_N_U "u")
+ 		       (VQSHLQ_R_S "s") (VQSHLQ_R_U "u") (VQSHLQ_S "s")
+ 		       (VQSHLQ_U "u") (VQSUBQ_N_S "s") (VQSUBQ_N_U "u")
+ 		       (VQSUBQ_S "s") (VQSUBQ_U "u") (VRHADDQ_S "s")
+ 		       (VRHADDQ_U "u") (VRMULHQ_S "s") (VRMULHQ_U "u")
+ 		       (VRSHLQ_N_S "s") (VRSHLQ_N_U "u") (VRSHLQ_S "s")
+ 		       (VRSHLQ_U "u") (VRSHRQ_N_S "s") (VRSHRQ_N_U "u")
+ 		       (VSHLQ_N_S "s") (VSHLQ_N_U "u") (VSHLQ_R_S "s")
+ 		       (VSHLQ_R_U "u") (VSUBQ_N_S "s") (VSUBQ_N_U "u")
+ 		       (VSUBQ_S "s") (VSUBQ_U "u") (VADDVAQ_S "s")
+ 		       (VADDVAQ_U "u") (VADDLVAQ_S "s") (VADDLVAQ_U "u")
+ 		       (VBICQ_N_S "s") (VBICQ_N_U "u") (VMLALDAVQ_U "u")
+ 		       (VMLALDAVQ_S "s") (VMLALDAVXQ_U "u") (VMLALDAVXQ_S "s")
+ 		       (VMOVNBQ_U "u") (VMOVNBQ_S "s") (VMOVNTQ_U "u")
+ 		       (VMOVNTQ_S "s") (VORRQ_N_S "s") (VORRQ_N_U "u")
+ 		       (VQMOVNBQ_U "u") (VQMOVNBQ_S "s") (VQMOVNTQ_S "s")
+ 		       (VQMOVNTQ_U "u") (VSHLLBQ_N_U "u") (VSHLLBQ_N_S "s")
+ 		       (VSHLLTQ_N_U "u") (VSHLLTQ_N_S "s") (VRMLALDAVHQ_U "u")
+ 		       (VRMLALDAVHQ_S "s") (VBICQ_M_N_S "s") (VBICQ_M_N_U "u")
+ 		       (VCVTAQ_M_S "s") (VCVTAQ_M_U "u") (VCVTQ_M_TO_F_S "s")
+ 		       (VCVTQ_M_TO_F_U "u") (VQRSHRNBQ_N_S "s")
+ 		       (VQRSHRNBQ_N_U "u") (VABAVQ_S "s") (VABAVQ_U "u")
+ 		       (VRMLALDAVHAQ_U "u") (VRMLALDAVHAQ_S "s") (VSHLCQ_S "s")
+ 		       (VSHLCQ_U "u") (VADDVAQ_P_S "s") (VADDVAQ_P_U "u")
+ 		       (VCLZQ_M_S "s") (VCLZQ_M_U "u") (VCMPEQQ_M_N_S "s")
+ 		       (VCMPEQQ_M_N_U "u") (VCMPEQQ_M_S "s") (VCMPEQQ_M_U "u")
+ 		       (VCMPNEQ_M_N_S "s") (VCMPNEQ_M_N_U "u") (VCMPNEQ_M_S "s")
+ 		       (VCMPNEQ_M_U "u") (VDUPQ_M_N_S "s") (VDUPQ_M_N_U "u")
+ 		       (VMAXVQ_P_S "s") (VMAXVQ_P_U "u") (VMINVQ_P_S "s")
+ 		       (VMINVQ_P_U "u") (VMLADAVAQ_S "s") (VMLADAVAQ_U "u")
+ 		       (VMLADAVQ_P_S "s") (VMLADAVQ_P_U "u") (VMLAQ_N_S "s")
+ 		       (VMLAQ_N_U "u") (VMLASQ_N_S "s") (VMLASQ_N_U "u")
+ 		       (VMVNQ_M_S "s") (VMVNQ_M_U "u") (VPSELQ_S "s")
+ 		       (VPSELQ_U "u") (VQDMLAHQ_N_S "s") (VQDMLAHQ_N_U "u")
+ 		       (VQRDMLAHQ_N_S "s") (VQRDMLAHQ_N_U "u")
+ 		       (VQRDMLASHQ_N_S "s") (VQRDMLASHQ_N_U "u")
+ 		       (VQRSHLQ_M_N_S "s") (VQRSHLQ_M_N_U "u")
+ 		       (VQSHLQ_M_R_S "s") (VQSHLQ_M_R_U "u") (VSRIQ_N_S "s")
+ 		       (VREV64Q_M_S "s") (VREV64Q_M_U "u") (VSRIQ_N_U "u")
+ 		       (VRSHLQ_M_N_S "s") (VRSHLQ_M_N_U "u") (VSHLQ_M_R_S "s")
+ 		       (VSHLQ_M_R_U "u") (VSLIQ_N_S "s") (VSLIQ_N_U "u")
+ 		       (VMLALDAVQ_P_S "s") (VQMOVNBQ_M_S "s") (VMOVLTQ_M_S "s")
+ 		       (VMOVNBQ_M_S "s") (VRSHRNTQ_N_S "s") (VORRQ_M_N_S "s")
+ 		       (VREV32Q_M_S "s") (VQRSHRNTQ_N_S "s") (VMOVNTQ_M_S "s")
+ 		       (VMOVLBQ_M_S "s") (VMLALDAVAQ_S "s") (VQSHRNBQ_N_S "s")
+ 		       (VSHRNBQ_N_S "s") (VRSHRNBQ_N_S "s") (VMLALDAVXQ_P_S "s")
+ 		       (VQMOVNTQ_M_S "s") (VMVNQ_M_N_S "s") (VQSHRNTQ_N_S "s")
+ 		       (VMLALDAVAXQ_S "s") (VSHRNTQ_N_S "s") (VMLALDAVQ_P_U "u")
+ 		       (VQMOVNBQ_M_U "u") (VMOVLTQ_M_U "u") (VMOVNBQ_M_U "u")
+ 		       (VRSHRNTQ_N_U "u") (VORRQ_M_N_U "u") (VREV32Q_M_U "u")
+ 		       (VREV16Q_M_S "s") (VREV16Q_M_U "u")
+ 		       (VQRSHRNTQ_N_U "u") (VMOVNTQ_M_U "u") (VMOVLBQ_M_U "u")
+ 		       (VMLALDAVAQ_U "u") (VQSHRNBQ_N_U "u") (VSHRNBQ_N_U "u")
+ 		       (VRSHRNBQ_N_U "u") (VMLALDAVXQ_P_U "u")
+ 		       (VMVNQ_M_N_U "u") (VQSHRNTQ_N_U "u") (VMLALDAVAXQ_U "u")
+ 		       (VQMOVNTQ_M_U "u") (VSHRNTQ_N_U "u") (VCVTMQ_M_S "s")
+ 		       (VCVTMQ_M_U "u") (VCVTNQ_M_S "s") (VCVTNQ_M_U "u")
+ 		       (VCVTPQ_M_S "s") (VCVTPQ_M_U "u") (VADDLVAQ_P_S "s")
+ 		       (VCVTQ_M_N_FROM_F_U "u") (VCVTQ_M_FROM_F_S "s")
+ 		       (VCVTQ_M_FROM_F_U "u") (VRMLALDAVHQ_P_U "u")
+ 		       (VRMLALDAVHQ_P_S "s") (VADDLVAQ_P_U "u")
+ 		       (VCVTQ_M_N_FROM_F_S "s") (VABAVQ_P_U "u")
+ 		       (VABAVQ_P_S "s") (VSHLQ_M_S "s") (VSHLQ_M_U "u")
+ 		       (VSRIQ_M_N_S "s") (VSRIQ_M_N_U "u") (VSUBQ_M_S "s")
+ 		       (VSUBQ_M_U "u") (VCVTQ_M_N_TO_F_S "s")
+ 		       (VCVTQ_M_N_TO_F_U "u") (VADDQ_M_N_U "u")
+ 		       (VSHLQ_M_N_S "s") (VMAXQ_M_U "u") (VHSUBQ_M_N_U "u")
+ 		       (VMULQ_M_N_S "s") (VQSHLQ_M_U "u") (VRHADDQ_M_S "s")
+ 		       (VEORQ_M_U "u") (VSHRQ_M_N_U "u") (VCADDQ_ROT90_M_U "u")
+ 		       (VMLADAVAQ_P_U "u") (VEORQ_M_S "s") (VBRSRQ_M_N_S "s")
+ 		       (VMULQ_M_U "u") (VQRDMLAHQ_M_N_S "s") (VHSUBQ_M_N_S "s")
+ 		       (VQRSHLQ_M_S "s") (VMULQ_M_N_U "u")
+ 		       (VMULQ_M_S "s") (VQSHLQ_M_N_U "u") (VSLIQ_M_N_U "u")
+ 		       (VMLADAVAQ_P_S "s") (VQRSHLQ_M_U "u")
+ 		       (VMULLBQ_INT_M_U "u") (VSHLQ_M_N_U "u") (VQSUBQ_M_U "u")
+ 		       (VQRDMLASHQ_M_N_U "u") (VRSHRQ_M_N_S "s")
+ 		       (VORNQ_M_S "s") (VCADDQ_ROT270_M_S "s") (VRHADDQ_M_U "u")
+ 		       (VRSHRQ_M_N_U "u") (VMLASQ_M_N_U "u") (VHSUBQ_M_U "u")
+ 		       (VQSUBQ_M_N_S "s") (VMULLTQ_INT_M_S "s")
+ 		       (VORRQ_M_S "s") (VQDMLAHQ_M_N_U "u") (VRSHLQ_M_S "s")
+ 		       (VHADDQ_M_U "u") (VHADDQ_M_N_S "s") (VMULLTQ_INT_M_U "u")
+ 		       (VORRQ_M_U "u") (VHADDQ_M_S "s") (VHADDQ_M_N_U "u")
+ 		       (VQDMLAHQ_M_N_S "s") (VMAXQ_M_S "s") (VORNQ_M_U "u")
+ 		       (VCADDQ_ROT270_M_U "u") (VQADDQ_M_U "u")
+ 		       (VQRDMLASHQ_M_N_S "s") (VBICQ_M_U "u") (VMINQ_M_U "u")
+ 		       (VSUBQ_M_N_S "s") (VMULLBQ_INT_M_S "s") (VQSUBQ_M_S "s")
+ 		       (VCADDQ_ROT90_M_S "s") (VRMULHQ_M_S "s") (VANDQ_M_U "u")
+ 		       (VMULHQ_M_S "s") (VADDQ_M_S "s") (VQRDMLAHQ_M_N_U "u")
+ 		       (VMLASQ_M_N_S "s") (VHSUBQ_M_S "s") (VRMULHQ_M_U "u")
+ 		       (VQADDQ_M_N_S "s") (VSHRQ_M_N_S "s") (VANDQ_M_S "s")
+ 		       (VABDQ_M_U "u") (VQSHLQ_M_S "s") (VABDQ_M_S "s")
+ 		       (VSUBQ_M_N_U "u") (VMLAQ_M_N_S "s") (VBRSRQ_M_N_U "u")
+ 		       (VADDQ_M_U "u") (VRSHLQ_M_U "u") (VSLIQ_M_N_S "s")
+ 		       (VQADDQ_M_N_U "u") (VADDQ_M_N_S "s") (VQSUBQ_M_N_U "u")
+ 		       (VMLAQ_M_N_U "u") (VMINQ_M_S "s") (VMULHQ_M_U "u")
+ 		       (VQADDQ_M_S "s") (VBICQ_M_S "s") (VQSHLQ_M_N_S "s")
+ 		       (VQSHRNTQ_M_N_S "s") (VQSHRNTQ_M_N_U "u")
+ 		       (VSHRNTQ_M_N_U "u") (VSHRNTQ_M_N_S "s")
+ 		       (VSHRNBQ_M_N_S "s") (VSHRNBQ_M_N_U "u")
+ 		       (VSHLLTQ_M_N_S "s") (VSHLLTQ_M_N_U "u")
+ 		       (VSHLLBQ_M_N_S "s") (VSHLLBQ_M_N_U "u")
+ 		       (VRSHRNTQ_M_N_S "s") (VRSHRNTQ_M_N_U "u")
+ 		       (VRSHRNBQ_M_N_U "u") (VRSHRNBQ_M_N_S "s")
+ 		       (VQSHRNTQ_M_N_U "u") (VQSHRNTQ_M_N_S "s")
+ 		       (VQSHRNBQ_M_N_S "s") (VQSHRNBQ_M_N_U "u")
+ 		       (VQRSHRNTQ_M_N_S "s") (VQRSHRNTQ_M_N_U "u")
+ 		       (VQRSHRNBQ_M_N_S "s") (VQRSHRNBQ_M_N_U "u")
+ 		       (VMLALDAVAXQ_P_S "s") (VMLALDAVAXQ_P_U "u")
+ 		       (VMLALDAVAQ_P_S "s") (VMLALDAVAQ_P_U "u")
+ 		       (VSTRWQSB_S "s") (VSTRWQSB_U "u") (VSTRBQSO_S "s")
+ 		       (VSTRBQSO_U "u") (VSTRBQ_S "s") (VSTRBQ_U "u")
+ 		       (VLDRBQGO_S "s") (VLDRBQGO_U "u") (VLDRBQ_S "s")
+ 		       (VLDRBQ_U "u") (VLDRWQGB_S "s") (VLDRWQGB_U "u")
+ 		       (VLD1Q_S "s") (VLD1Q_U "u") (VLDRHQGO_S "s")
+ 		       (VLDRHQGO_U "u") (VLDRHQGSO_S "s") (VLDRHQGSO_U "u")
+ 		       (VLDRHQ_S "s") (VLDRHQ_U "u") (VLDRWQ_S "s")
+ 		       (VLDRWQ_U "u") (VLDRDQGB_S "s") (VLDRDQGB_U "u")
+ 		       (VLDRDQGO_S "s") (VLDRDQGO_U "u") (VLDRDQGSO_S "s")
+ 		       (VLDRDQGSO_U "u") (VLDRWQGO_S "s") (VLDRWQGO_U "u")
+ 		       (VLDRWQGSO_S "s") (VLDRWQGSO_U "u") (VST1Q_S "s")
+ 		       (VST1Q_U "u") (VSTRHQSO_S "s") (VSTRHQSO_U "u")
+ 		       (VSTRHQSSO_S "s") (VSTRHQSSO_U "u") (VSTRHQ_S "s")
+ 		       (VSTRHQ_U "u") (VSTRWQ_S "s") (VSTRWQ_U "u")
+ 		       (VSTRDQSB_S "s") (VSTRDQSB_U "u") (VSTRDQSO_S "s")
+ 		       (VSTRDQSO_U "u") (VSTRDQSSO_S "s") (VSTRDQSSO_U "u")
+ 		       (VSTRWQSO_U "u") (VSTRWQSO_S "s") (VSTRWQSSO_U "u")
+ 		       (VSTRWQSSO_S "s") (VSTRWQSBWB_S "s") (VSTRWQSBWB_U "u")
+ 		       (VLDRWQGBWB_S "s") (VLDRWQGBWB_U "u") (VLDRDQGBWB_S "s")
+ 		       (VLDRDQGBWB_U "u") (VSTRDQSBWB_S "s") (VADCQ_M_S "s")
+ 		       (VSTRDQSBWB_U "u") (VSBCQ_U "u")  (VSBCQ_M_U "u")
+ 		       (VSBCQ_S "s")  (VSBCQ_M_S "s") (VSBCIQ_U "u")
+ 		       (VSBCIQ_M_U "u") (VSBCIQ_S "s") (VSBCIQ_M_S "s")
+ 		       (VADCQ_U "u")  (VADCQ_M_U "u") (VADCQ_S "s")
+ 		       (VADCIQ_U "u") (VADCIQ_M_U "u") (VADCIQ_S "s")
+ 		       (VADCIQ_M_S "s") (SQRSHRL_64 "64") (SQRSHRL_48 "48")
+ 		       (UQRSHLL_64 "64") (UQRSHLL_48 "48") (VSHLCQ_M_S "s")
+ 		       (VSHLCQ_M_U "u")])
+ 
+ (define_int_attr mode1 [(VCTP8Q "8") (VCTP16Q "16") (VCTP32Q "32")
+ 			(VCTP64Q "64") (VCTP8Q_M "8") (VCTP16Q_M "16")
+ 			(VCTP32Q_M "32") (VCTP64Q_M "64")])
+ (define_mode_attr MVE_pred2 [(V16QI "mve_imm_8") (V8HI "mve_imm_16")
+ 			     (V4SI "mve_imm_32")
+ 			     (V8HF "mve_imm_16") (V4SF "mve_imm_32")])
+ (define_mode_attr MVE_constraint2 [(V16QI "Rb") (V8HI "Rd") (V4SI "Rf")
+ 				    (V8HF "Rd") (V4SF "Rf")])
+ (define_mode_attr MVE_LANES [(V16QI "16") (V8HI "8") (V4SI "4")])
+ (define_mode_attr MVE_constraint [ (V16QI "Ra") (V8HI "Rc") (V4SI "Re")])
+ (define_mode_attr MVE_pred [ (V16QI "mve_imm_7") (V8HI "mve_imm_15")
+ 				   (V4SI "mve_imm_31")])
+ (define_mode_attr MVE_constraint3 [ (V8HI "Rb") (V4SI "Rd")])
+ (define_mode_attr MVE_pred3 [ (V8HI "mve_imm_8") (V4SI "mve_imm_16")])
+ (define_mode_attr MVE_constraint1 [ (V8HI "Ra") (V4SI "Rc")])
+ (define_mode_attr MVE_pred1 [ (V8HI "mve_imm_7") (V4SI "mve_imm_15")])
+ (define_mode_attr MVE_B_ELEM [ (V16QI "V16QI") (V8HI "V8QI") (V4SI "V4QI")])
+ (define_mode_attr MVE_H_ELEM [ (V8HI "V8HI") (V4SI "V4HI")])
+ (define_mode_attr V_sz_elem1 [(V16QI "b") (V8HI  "h") (V4SI "w") (V8HF "h")
+ 			      (V4SF "w")])
+ (define_mode_attr V_extr_elem [(V16QI "u8") (V8HI "u16") (V4SI "32")
+                               (V8HF "u16") (V4SF "32")])
+ 
+ (define_mode_attr earlyclobber_32 [(V16QI "=w") (V8HI "=w") (V4SI "=&w")
+ 						(V8HF "=w") (V4SF "=&w")])
+ 
+ (define_int_iterator VCVTQ_TO_F [VCVTQ_TO_F_S VCVTQ_TO_F_U])
+ (define_int_iterator VMVNQ_N [VMVNQ_N_U VMVNQ_N_S])
+ (define_int_iterator VREV64Q [VREV64Q_S VREV64Q_U])
+ (define_int_iterator VCVTQ_FROM_F [VCVTQ_FROM_F_S VCVTQ_FROM_F_U])
+ (define_int_iterator VREV16Q [VREV16Q_U VREV16Q_S])
+ (define_int_iterator VCVTAQ [VCVTAQ_U VCVTAQ_S])
+ (define_int_iterator VMVNQ [VMVNQ_U VMVNQ_S])
+ (define_int_iterator VDUPQ_N [VDUPQ_N_U VDUPQ_N_S])
+ (define_int_iterator VCLZQ [VCLZQ_U VCLZQ_S])
+ (define_int_iterator VADDVQ [VADDVQ_U VADDVQ_S])
+ (define_int_iterator VREV32Q [VREV32Q_U VREV32Q_S])
+ (define_int_iterator VMOVLBQ [VMOVLBQ_S VMOVLBQ_U])
+ (define_int_iterator VMOVLTQ [VMOVLTQ_U VMOVLTQ_S])
+ (define_int_iterator VCVTPQ [VCVTPQ_S VCVTPQ_U])
+ (define_int_iterator VCVTNQ [VCVTNQ_S VCVTNQ_U])
+ (define_int_iterator VCVTMQ [VCVTMQ_S VCVTMQ_U])
+ (define_int_iterator VADDLVQ [VADDLVQ_U VADDLVQ_S])
+ (define_int_iterator VCTPQ [VCTP8Q VCTP16Q VCTP32Q VCTP64Q])
+ (define_int_iterator VCTPQ_M [VCTP8Q_M VCTP16Q_M VCTP32Q_M VCTP64Q_M])
+ (define_int_iterator VCVTQ_N_TO_F [VCVTQ_N_TO_F_S VCVTQ_N_TO_F_U])
+ (define_int_iterator VCREATEQ [VCREATEQ_U VCREATEQ_S])
+ (define_int_iterator VSHRQ_N [VSHRQ_N_S VSHRQ_N_U])
+ (define_int_iterator VCVTQ_N_FROM_F [VCVTQ_N_FROM_F_S VCVTQ_N_FROM_F_U])
+ (define_int_iterator VADDLVQ_P [VADDLVQ_P_S VADDLVQ_P_U])
+ (define_int_iterator VCMPNEQ [VCMPNEQ_U VCMPNEQ_S])
+ (define_int_iterator VSHLQ [VSHLQ_S VSHLQ_U])
+ (define_int_iterator VABDQ [VABDQ_S VABDQ_U])
+ (define_int_iterator VADDQ_N [VADDQ_N_S VADDQ_N_U])
+ (define_int_iterator VADDVAQ [VADDVAQ_S VADDVAQ_U])
+ (define_int_iterator VADDVQ_P [VADDVQ_P_U VADDVQ_P_S])
+ (define_int_iterator VANDQ [VANDQ_U VANDQ_S])
+ (define_int_iterator VBICQ [VBICQ_S VBICQ_U])
+ (define_int_iterator VBRSRQ_N [VBRSRQ_N_U VBRSRQ_N_S])
+ (define_int_iterator VCADDQ_ROT270 [VCADDQ_ROT270_S VCADDQ_ROT270_U])
+ (define_int_iterator VCADDQ_ROT90 [VCADDQ_ROT90_U VCADDQ_ROT90_S])
+ (define_int_iterator VCMPEQQ [VCMPEQQ_U VCMPEQQ_S])
+ (define_int_iterator VCMPEQQ_N [VCMPEQQ_N_S VCMPEQQ_N_U])
+ (define_int_iterator VCMPNEQ_N [VCMPNEQ_N_U VCMPNEQ_N_S])
+ (define_int_iterator VEORQ [VEORQ_U VEORQ_S])
+ (define_int_iterator VHADDQ [VHADDQ_S VHADDQ_U])
+ (define_int_iterator VHADDQ_N [VHADDQ_N_U VHADDQ_N_S])
+ (define_int_iterator VHSUBQ [VHSUBQ_S VHSUBQ_U])
+ (define_int_iterator VHSUBQ_N [VHSUBQ_N_U VHSUBQ_N_S])
+ (define_int_iterator VMAXQ [VMAXQ_U VMAXQ_S])
+ (define_int_iterator VMAXVQ [VMAXVQ_U VMAXVQ_S])
+ (define_int_iterator VMINQ [VMINQ_S VMINQ_U])
+ (define_int_iterator VMINVQ [VMINVQ_U VMINVQ_S])
+ (define_int_iterator VMLADAVQ [VMLADAVQ_U VMLADAVQ_S])
+ (define_int_iterator VMULHQ [VMULHQ_S VMULHQ_U])
+ (define_int_iterator VMULLBQ_INT [VMULLBQ_INT_U VMULLBQ_INT_S])
+ (define_int_iterator VMULLTQ_INT [VMULLTQ_INT_U VMULLTQ_INT_S])
+ (define_int_iterator VMULQ [VMULQ_U VMULQ_S])
+ (define_int_iterator VMULQ_N [VMULQ_N_U VMULQ_N_S])
+ (define_int_iterator VORNQ [VORNQ_U VORNQ_S])
+ (define_int_iterator VORRQ [VORRQ_S VORRQ_U])
+ (define_int_iterator VQADDQ [VQADDQ_U VQADDQ_S])
+ (define_int_iterator VQADDQ_N [VQADDQ_N_S VQADDQ_N_U])
+ (define_int_iterator VQRSHLQ [VQRSHLQ_S VQRSHLQ_U])
+ (define_int_iterator VQRSHLQ_N [VQRSHLQ_N_S VQRSHLQ_N_U])
+ (define_int_iterator VQSHLQ [VQSHLQ_S VQSHLQ_U])
+ (define_int_iterator VQSHLQ_N [VQSHLQ_N_S VQSHLQ_N_U])
+ (define_int_iterator VQSHLQ_R [VQSHLQ_R_U VQSHLQ_R_S])
+ (define_int_iterator VQSUBQ [VQSUBQ_U VQSUBQ_S])
+ (define_int_iterator VQSUBQ_N [VQSUBQ_N_S VQSUBQ_N_U])
+ (define_int_iterator VRHADDQ [VRHADDQ_S VRHADDQ_U])
+ (define_int_iterator VRMULHQ [VRMULHQ_S VRMULHQ_U])
+ (define_int_iterator VRSHLQ [VRSHLQ_S VRSHLQ_U])
+ (define_int_iterator VRSHLQ_N [VRSHLQ_N_U VRSHLQ_N_S])
+ (define_int_iterator VRSHRQ_N [VRSHRQ_N_S VRSHRQ_N_U])
+ (define_int_iterator VSHLQ_N [VSHLQ_N_U VSHLQ_N_S])
+ (define_int_iterator VSHLQ_R [VSHLQ_R_S VSHLQ_R_U])
+ (define_int_iterator VSUBQ [VSUBQ_S VSUBQ_U])
+ (define_int_iterator VSUBQ_N [VSUBQ_N_S VSUBQ_N_U])
+ (define_int_iterator VADDLVAQ [VADDLVAQ_S VADDLVAQ_U])
+ (define_int_iterator VBICQ_N [VBICQ_N_S VBICQ_N_U])
+ (define_int_iterator VMLALDAVQ [VMLALDAVQ_U VMLALDAVQ_S])
+ (define_int_iterator VMLALDAVXQ [VMLALDAVXQ_U VMLALDAVXQ_S])
+ (define_int_iterator VMOVNBQ [VMOVNBQ_U VMOVNBQ_S])
+ (define_int_iterator VMOVNTQ [VMOVNTQ_S VMOVNTQ_U])
+ (define_int_iterator VORRQ_N [VORRQ_N_U VORRQ_N_S])
+ (define_int_iterator VQMOVNBQ [VQMOVNBQ_U VQMOVNBQ_S])
+ (define_int_iterator VQMOVNTQ [VQMOVNTQ_U VQMOVNTQ_S])
+ (define_int_iterator VSHLLBQ_N [VSHLLBQ_N_S VSHLLBQ_N_U])
+ (define_int_iterator VSHLLTQ_N [VSHLLTQ_N_U VSHLLTQ_N_S])
+ (define_int_iterator VRMLALDAVHQ [VRMLALDAVHQ_U VRMLALDAVHQ_S])
+ (define_int_iterator VBICQ_M_N [VBICQ_M_N_S VBICQ_M_N_U])
+ (define_int_iterator VCVTAQ_M [VCVTAQ_M_S VCVTAQ_M_U])
+ (define_int_iterator VCVTQ_M_TO_F [VCVTQ_M_TO_F_S VCVTQ_M_TO_F_U])
+ (define_int_iterator VQRSHRNBQ_N [VQRSHRNBQ_N_U VQRSHRNBQ_N_S])
+ (define_int_iterator VABAVQ [VABAVQ_S VABAVQ_U])
+ (define_int_iterator VSHLCQ [VSHLCQ_S VSHLCQ_U])
+ (define_int_iterator VRMLALDAVHAQ [VRMLALDAVHAQ_S VRMLALDAVHAQ_U])
+ (define_int_iterator VADDVAQ_P [VADDVAQ_P_S VADDVAQ_P_U])
+ (define_int_iterator VCLZQ_M [VCLZQ_M_S VCLZQ_M_U])
+ (define_int_iterator VCMPEQQ_M_N [VCMPEQQ_M_N_S VCMPEQQ_M_N_U])
+ (define_int_iterator VCMPEQQ_M [VCMPEQQ_M_S VCMPEQQ_M_U])
+ (define_int_iterator VCMPNEQ_M_N [VCMPNEQ_M_N_S VCMPNEQ_M_N_U])
+ (define_int_iterator VCMPNEQ_M [VCMPNEQ_M_S VCMPNEQ_M_U])
+ (define_int_iterator VDUPQ_M_N [VDUPQ_M_N_S VDUPQ_M_N_U])
+ (define_int_iterator VMAXVQ_P [VMAXVQ_P_S VMAXVQ_P_U])
+ (define_int_iterator VMINVQ_P [VMINVQ_P_S VMINVQ_P_U])
+ (define_int_iterator VMLADAVAQ [VMLADAVAQ_S VMLADAVAQ_U])
+ (define_int_iterator VMLADAVQ_P [VMLADAVQ_P_S VMLADAVQ_P_U])
+ (define_int_iterator VMLAQ_N [VMLAQ_N_S VMLAQ_N_U])
+ (define_int_iterator VMLASQ_N [VMLASQ_N_S VMLASQ_N_U])
+ (define_int_iterator VMVNQ_M [VMVNQ_M_S VMVNQ_M_U])
+ (define_int_iterator VPSELQ [VPSELQ_S VPSELQ_U])
+ (define_int_iterator VQDMLAHQ_N [VQDMLAHQ_N_S VQDMLAHQ_N_U])
+ (define_int_iterator VQRDMLAHQ_N [VQRDMLAHQ_N_S VQRDMLAHQ_N_U])
+ (define_int_iterator VQRDMLASHQ_N [VQRDMLASHQ_N_S VQRDMLASHQ_N_U])
+ (define_int_iterator VQRSHLQ_M_N [VQRSHLQ_M_N_S VQRSHLQ_M_N_U])
+ (define_int_iterator VQSHLQ_M_R [VQSHLQ_M_R_S VQSHLQ_M_R_U])
+ (define_int_iterator VREV64Q_M [VREV64Q_M_S VREV64Q_M_U])
+ (define_int_iterator VRSHLQ_M_N [VRSHLQ_M_N_S VRSHLQ_M_N_U])
+ (define_int_iterator VSHLQ_M_R [VSHLQ_M_R_S VSHLQ_M_R_U])
+ (define_int_iterator VSLIQ_N [VSLIQ_N_S VSLIQ_N_U])
+ (define_int_iterator VSRIQ_N [VSRIQ_N_S VSRIQ_N_U])
+ (define_int_iterator VMLALDAVQ_P [VMLALDAVQ_P_U VMLALDAVQ_P_S])
+ (define_int_iterator VQMOVNBQ_M [VQMOVNBQ_M_S VQMOVNBQ_M_U])
+ (define_int_iterator VMOVLTQ_M [VMOVLTQ_M_U VMOVLTQ_M_S])
+ (define_int_iterator VMOVNBQ_M [VMOVNBQ_M_U VMOVNBQ_M_S])
+ (define_int_iterator VRSHRNTQ_N [VRSHRNTQ_N_U VRSHRNTQ_N_S])
+ (define_int_iterator VORRQ_M_N [VORRQ_M_N_S VORRQ_M_N_U])
+ (define_int_iterator VREV32Q_M [VREV32Q_M_S VREV32Q_M_U])
+ (define_int_iterator VREV16Q_M [VREV16Q_M_S VREV16Q_M_U])
+ (define_int_iterator VQRSHRNTQ_N [VQRSHRNTQ_N_U VQRSHRNTQ_N_S])
+ (define_int_iterator VMOVNTQ_M [VMOVNTQ_M_U VMOVNTQ_M_S])
+ (define_int_iterator VMOVLBQ_M [VMOVLBQ_M_U VMOVLBQ_M_S])
+ (define_int_iterator VMLALDAVAQ [VMLALDAVAQ_S VMLALDAVAQ_U])
+ (define_int_iterator VQSHRNBQ_N [VQSHRNBQ_N_U VQSHRNBQ_N_S])
+ (define_int_iterator VSHRNBQ_N [VSHRNBQ_N_U VSHRNBQ_N_S])
+ (define_int_iterator VRSHRNBQ_N [VRSHRNBQ_N_S VRSHRNBQ_N_U])
+ (define_int_iterator VMLALDAVXQ_P [VMLALDAVXQ_P_U VMLALDAVXQ_P_S])
+ (define_int_iterator VQMOVNTQ_M [VQMOVNTQ_M_U VQMOVNTQ_M_S])
+ (define_int_iterator VMVNQ_M_N [VMVNQ_M_N_U VMVNQ_M_N_S])
+ (define_int_iterator VQSHRNTQ_N [VQSHRNTQ_N_U VQSHRNTQ_N_S])
+ (define_int_iterator VMLALDAVAXQ [VMLALDAVAXQ_S VMLALDAVAXQ_U])
+ (define_int_iterator VSHRNTQ_N [VSHRNTQ_N_S VSHRNTQ_N_U])
+ (define_int_iterator VCVTMQ_M [VCVTMQ_M_S VCVTMQ_M_U])
+ (define_int_iterator VCVTNQ_M [VCVTNQ_M_S VCVTNQ_M_U])
+ (define_int_iterator VCVTPQ_M [VCVTPQ_M_S VCVTPQ_M_U])
+ (define_int_iterator VCVTQ_M_N_FROM_F [VCVTQ_M_N_FROM_F_S VCVTQ_M_N_FROM_F_U])
+ (define_int_iterator VCVTQ_M_FROM_F [VCVTQ_M_FROM_F_U VCVTQ_M_FROM_F_S])
+ (define_int_iterator VRMLALDAVHQ_P [VRMLALDAVHQ_P_S VRMLALDAVHQ_P_U])
+ (define_int_iterator VADDLVAQ_P [VADDLVAQ_P_U VADDLVAQ_P_S])
+ (define_int_iterator VABAVQ_P [VABAVQ_P_S VABAVQ_P_U])
+ (define_int_iterator VSHLQ_M [VSHLQ_M_S VSHLQ_M_U])
+ (define_int_iterator VSRIQ_M_N [VSRIQ_M_N_S VSRIQ_M_N_U])
+ (define_int_iterator VSUBQ_M [VSUBQ_M_U VSUBQ_M_S])
+ (define_int_iterator VCVTQ_M_N_TO_F [VCVTQ_M_N_TO_F_U VCVTQ_M_N_TO_F_S])
+ (define_int_iterator VHSUBQ_M [VHSUBQ_M_S VHSUBQ_M_U])
+ (define_int_iterator VSLIQ_M_N [VSLIQ_M_N_U VSLIQ_M_N_S])
+ (define_int_iterator VRSHLQ_M [VRSHLQ_M_S VRSHLQ_M_U])
+ (define_int_iterator VMINQ_M [VMINQ_M_S VMINQ_M_U])
+ (define_int_iterator VMULLBQ_INT_M [VMULLBQ_INT_M_U VMULLBQ_INT_M_S])
+ (define_int_iterator VMULHQ_M [VMULHQ_M_S VMULHQ_M_U])
+ (define_int_iterator VMULQ_M [VMULQ_M_S VMULQ_M_U])
+ (define_int_iterator VHSUBQ_M_N [VHSUBQ_M_N_S VHSUBQ_M_N_U])
+ (define_int_iterator VHADDQ_M_N [VHADDQ_M_N_S VHADDQ_M_N_U])
+ (define_int_iterator VORRQ_M [VORRQ_M_S VORRQ_M_U])
+ (define_int_iterator VRMULHQ_M [VRMULHQ_M_U VRMULHQ_M_S])
+ (define_int_iterator VQADDQ_M [VQADDQ_M_U VQADDQ_M_S])
+ (define_int_iterator VRSHRQ_M_N [VRSHRQ_M_N_S VRSHRQ_M_N_U])
+ (define_int_iterator VQSUBQ_M_N [VQSUBQ_M_N_U VQSUBQ_M_N_S])
+ (define_int_iterator VADDQ_M [VADDQ_M_U VADDQ_M_S])
+ (define_int_iterator VORNQ_M [VORNQ_M_U VORNQ_M_S])
+ (define_int_iterator VRHADDQ_M [VRHADDQ_M_U VRHADDQ_M_S])
+ (define_int_iterator VQSHLQ_M [VQSHLQ_M_U VQSHLQ_M_S])
+ (define_int_iterator VANDQ_M [VANDQ_M_U VANDQ_M_S])
+ (define_int_iterator VBICQ_M [VBICQ_M_U VBICQ_M_S])
+ (define_int_iterator VSHLQ_M_N [VSHLQ_M_N_S VSHLQ_M_N_U])
+ (define_int_iterator VCADDQ_ROT270_M [VCADDQ_ROT270_M_U VCADDQ_ROT270_M_S])
+ (define_int_iterator VQRSHLQ_M [VQRSHLQ_M_U VQRSHLQ_M_S])
+ (define_int_iterator VQADDQ_M_N [VQADDQ_M_N_U VQADDQ_M_N_S])
+ (define_int_iterator VADDQ_M_N [VADDQ_M_N_S VADDQ_M_N_U])
+ (define_int_iterator VMAXQ_M [VMAXQ_M_S VMAXQ_M_U])
+ (define_int_iterator VQSUBQ_M [VQSUBQ_M_U VQSUBQ_M_S])
+ (define_int_iterator VMLASQ_M_N [VMLASQ_M_N_U VMLASQ_M_N_S])
+ (define_int_iterator VMLADAVAQ_P [VMLADAVAQ_P_U VMLADAVAQ_P_S])
+ (define_int_iterator VBRSRQ_M_N [VBRSRQ_M_N_U VBRSRQ_M_N_S])
+ (define_int_iterator VMULQ_M_N [VMULQ_M_N_U VMULQ_M_N_S])
+ (define_int_iterator VCADDQ_ROT90_M [VCADDQ_ROT90_M_U VCADDQ_ROT90_M_S])
+ (define_int_iterator VMULLTQ_INT_M [VMULLTQ_INT_M_S VMULLTQ_INT_M_U])
+ (define_int_iterator VEORQ_M [VEORQ_M_S VEORQ_M_U])
+ (define_int_iterator VSHRQ_M_N [VSHRQ_M_N_S VSHRQ_M_N_U])
+ (define_int_iterator VSUBQ_M_N [VSUBQ_M_N_S VSUBQ_M_N_U])
+ (define_int_iterator VHADDQ_M [VHADDQ_M_S VHADDQ_M_U])
+ (define_int_iterator VABDQ_M [VABDQ_M_S VABDQ_M_U])
+ (define_int_iterator VMLAQ_M_N [VMLAQ_M_N_S VMLAQ_M_N_U])
+ (define_int_iterator VQSHLQ_M_N [VQSHLQ_M_N_S VQSHLQ_M_N_U])
+ (define_int_iterator VMLALDAVAQ_P [VMLALDAVAQ_P_U VMLALDAVAQ_P_S])
+ (define_int_iterator VMLALDAVAXQ_P [VMLALDAVAXQ_P_U VMLALDAVAXQ_P_S])
+ (define_int_iterator VQRSHRNBQ_M_N [VQRSHRNBQ_M_N_U VQRSHRNBQ_M_N_S])
+ (define_int_iterator VQRSHRNTQ_M_N [VQRSHRNTQ_M_N_S VQRSHRNTQ_M_N_U])
+ (define_int_iterator VQSHRNBQ_M_N [VQSHRNBQ_M_N_U VQSHRNBQ_M_N_S])
+ (define_int_iterator VQSHRNTQ_M_N [VQSHRNTQ_M_N_S VQSHRNTQ_M_N_U])
+ (define_int_iterator VRSHRNBQ_M_N [VRSHRNBQ_M_N_U VRSHRNBQ_M_N_S])
+ (define_int_iterator VRSHRNTQ_M_N [VRSHRNTQ_M_N_U VRSHRNTQ_M_N_S])
+ (define_int_iterator VSHLLBQ_M_N [VSHLLBQ_M_N_U VSHLLBQ_M_N_S])
+ (define_int_iterator VSHLLTQ_M_N [VSHLLTQ_M_N_U VSHLLTQ_M_N_S])
+ (define_int_iterator VSHRNBQ_M_N [VSHRNBQ_M_N_S VSHRNBQ_M_N_U])
+ (define_int_iterator VSHRNTQ_M_N [VSHRNTQ_M_N_S VSHRNTQ_M_N_U])
+ (define_int_iterator VSTRWSBQ [VSTRWQSB_S VSTRWQSB_U])
+ (define_int_iterator VSTRBSOQ [VSTRBQSO_S VSTRBQSO_U])
+ (define_int_iterator VSTRBQ [VSTRBQ_S VSTRBQ_U])
+ (define_int_iterator VLDRBGOQ [VLDRBQGO_S VLDRBQGO_U])
+ (define_int_iterator VLDRBQ [VLDRBQ_S VLDRBQ_U])
+ (define_int_iterator VLDRWGBQ [VLDRWQGB_S VLDRWQGB_U])
+ (define_int_iterator VLD1Q [VLD1Q_S VLD1Q_U])
+ (define_int_iterator VLDRHGOQ [VLDRHQGO_S VLDRHQGO_U])
+ (define_int_iterator VLDRHGSOQ [VLDRHQGSO_S VLDRHQGSO_U])
+ (define_int_iterator VLDRHQ [VLDRHQ_S VLDRHQ_U])
+ (define_int_iterator VLDRWQ [VLDRWQ_S VLDRWQ_U])
+ (define_int_iterator VLDRDGBQ [VLDRDQGB_S VLDRDQGB_U])
+ (define_int_iterator VLDRDGOQ [VLDRDQGO_S VLDRDQGO_U])
+ (define_int_iterator VLDRDGSOQ [VLDRDQGSO_S VLDRDQGSO_U])
+ (define_int_iterator VLDRWGOQ [VLDRWQGO_S VLDRWQGO_U])
+ (define_int_iterator VLDRWGSOQ [VLDRWQGSO_S VLDRWQGSO_U])
+ (define_int_iterator VST1Q [VST1Q_S VST1Q_U])
+ (define_int_iterator VSTRHSOQ [VSTRHQSO_S VSTRHQSO_U])
+ (define_int_iterator VSTRHSSOQ [VSTRHQSSO_S VSTRHQSSO_U])
+ (define_int_iterator VSTRHQ [VSTRHQ_S VSTRHQ_U])
+ (define_int_iterator VSTRWQ [VSTRWQ_S VSTRWQ_U])
+ (define_int_iterator VSTRDSBQ [VSTRDQSB_S VSTRDQSB_U])
+ (define_int_iterator VSTRDSOQ [VSTRDQSO_S VSTRDQSO_U])
+ (define_int_iterator VSTRDSSOQ [VSTRDQSSO_S VSTRDQSSO_U])
+ (define_int_iterator VSTRWSOQ [VSTRWQSO_S VSTRWQSO_U])
+ (define_int_iterator VSTRWSSOQ [VSTRWQSSO_S VSTRWQSSO_U])
+ (define_int_iterator VSTRWSBWBQ [VSTRWQSBWB_S VSTRWQSBWB_U])
+ (define_int_iterator VLDRWGBWBQ [VLDRWQGBWB_S VLDRWQGBWB_U])
+ (define_int_iterator VSTRDSBWBQ [VSTRDQSBWB_S VSTRDQSBWB_U])
+ (define_int_iterator VLDRDGBWBQ [VLDRDQGBWB_S VLDRDQGBWB_U])
+ (define_int_iterator VADCIQ [VADCIQ_U VADCIQ_S])
+ (define_int_iterator VADCIQ_M [VADCIQ_M_U VADCIQ_M_S])
+ (define_int_iterator VSBCQ [VSBCQ_U VSBCQ_S])
+ (define_int_iterator VSBCQ_M [VSBCQ_M_U VSBCQ_M_S])
+ (define_int_iterator VSBCIQ [VSBCIQ_U VSBCIQ_S])
+ (define_int_iterator VSBCIQ_M [VSBCIQ_M_U VSBCIQ_M_S])
+ (define_int_iterator VADCQ [VADCQ_U VADCQ_S])
+ (define_int_iterator VADCQ_M [VADCQ_M_U VADCQ_M_S])
+ (define_int_iterator UQRSHLLQ [UQRSHLL_64 UQRSHLL_48])
+ (define_int_iterator SQRSHRLQ [SQRSHRL_64 SQRSHRL_48])
+ (define_int_iterator VSHLCQ_M [VSHLCQ_M_S VSHLCQ_M_U])
+ 
+ (define_insn "*mve_mov<mode>"
+   [(set (match_operand:MVE_types 0 "nonimmediate_operand" "=w,w,r,w,w,r,w,Us")
+ 	(match_operand:MVE_types 1 "general_operand" "w,r,w,Dn,Usi,r,Dm,w"))]
+   "TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT"
+ {
+   if (which_alternative == 3 || which_alternative == 6)
+     {
+       int width, is_valid;
+       static char templ[40];
+ 
+       is_valid = simd_immediate_valid_for_move (operands[1], <MODE>mode,
+ 	&operands[1], &width);
+ 
+       gcc_assert (is_valid != 0);
+ 
+       if (width == 0)
+ 	return "vmov.f32\t%q0, %1  @ <mode>";
+       else
+ 	sprintf (templ, "vmov.i%d\t%%q0, %%x1  @ <mode>", width);
+       return templ;
+     }
+   switch (which_alternative)
+     {
+     case 0:
+       return "vmov\t%q0, %q1";
+     case 1:
+       return "vmov\t%e0, %Q1, %R1  @ <mode>\;vmov\t%f0, %J1, %K1";
+     case 2:
+       return "vmov\t%Q0, %R0, %e1  @ <mode>\;vmov\t%J0, %K0, %f1";
+     case 4:
+       if (MEM_P (operands[1])
+ 	  && (GET_CODE (XEXP (operands[1], 0)) == LABEL_REF
+ 	      || GET_CODE (XEXP (operands[1], 0)) == CONST))
+ 	return output_move_neon (operands);
+       else
+ 	return "vldrb.8 %q0, %E1";
+     case 5:
+       return output_move_quad (operands);
+     case 7:
+       return "vstrb.8 %q1, %E0";
+     default:
+       gcc_unreachable ();
+       return "";
+     }
+ }
+   [(set_attr "type" "mve_move,mve_move,mve_move,mve_move,mve_load,multiple,mve_move,mve_store")
+    (set_attr "length" "4,8,8,4,8,8,4,4")
+    (set_attr "thumb2_pool_range" "*,*,*,*,1018,*,*,*")
+    (set_attr "neg_pool_range" "*,*,*,*,996,*,*,*")])
+ 
+ (define_insn "*mve_mov<mode>"
+   [(set (match_operand:MVE_types 0 "s_register_operand" "=w,w")
+ 	(vec_duplicate:MVE_types
+ 	  (match_operand:SI 1 "nonmemory_operand" "r,i")))]
+   "TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT"
+ {
+   if (which_alternative == 0)
+     return "vdup.<V_sz_elem>\t%q0, %1";
+   return "vmov.<V_sz_elem>\t%q0, %1";
+ }
+   [(set_attr "length" "4,4")
+    (set_attr "type" "mve_move,mve_move")])
+ 
+ ;;
+ ;; [vst4q])
+ ;;
+ (define_insn "mve_vst4q<mode>"
+   [(set (match_operand:XI 0 "neon_struct_operand" "=Um")
+ 	(unspec:XI [(match_operand:XI 1 "s_register_operand" "w")
+ 		    (unspec:MVE_VLD_ST [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+ 	 VST4Q))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[6];
+    int regno = REGNO (operands[1]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1] = gen_rtx_REG (TImode, regno+4);
+    ops[2] = gen_rtx_REG (TImode, regno+8);
+    ops[3] = gen_rtx_REG (TImode, regno+12);
+    rtx reg  = operands[0];
+    while (reg && !REG_P (reg))
+     reg = XEXP (reg, 0);
+    gcc_assert (REG_P (reg));
+    ops[4] = reg;
+    ops[5] = operands[0];
+    /* Here in first three instructions data is stored to ops[4]'s location but
+       in the fourth instruction data is stored to operands[0], this is to
+       support the writeback.  */
+    output_asm_insn ("vst40.<V_sz_elem>\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
+ 		    "vst41.<V_sz_elem>\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
+ 		    "vst42.<V_sz_elem>\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
+ 		    "vst43.<V_sz_elem>\t{%q0, %q1, %q2, %q3}, %5", ops);
+    return "";
+ }
+   [(set_attr "length" "16")])
+ 
+ ;;
+ ;; [vrndq_m_f])
+ ;;
+ (define_insn "mve_vrndq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VRNDQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vrintzt.f%#<V_sz_elem> %q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrndxq_f])
+ ;;
+ (define_insn "mve_vrndxq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
+ 	 VRNDXQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vrintx.f%#<V_sz_elem>	%q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrndq_f])
+ ;;
+ (define_insn "mve_vrndq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
+ 	 VRNDQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vrintz.f%#<V_sz_elem>	%q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrndpq_f])
+ ;;
+ (define_insn "mve_vrndpq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
+ 	 VRNDPQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vrintp.f%#<V_sz_elem>	%q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrndnq_f])
+ ;;
+ (define_insn "mve_vrndnq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
+ 	 VRNDNQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vrintn.f%#<V_sz_elem>	%q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrndmq_f])
+ ;;
+ (define_insn "mve_vrndmq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
+ 	 VRNDMQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vrintm.f%#<V_sz_elem>	%q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrndaq_f])
+ ;;
+ (define_insn "mve_vrndaq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
+ 	 VRNDAQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vrinta.f%#<V_sz_elem>	%q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrev64q_f])
+ ;;
+ (define_insn "mve_vrev64q_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=&w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
+ 	 VREV64Q_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vrev64.%#<V_sz_elem> %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vnegq_f])
+ ;;
+ (define_insn "mve_vnegq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
+ 	 VNEGQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vneg.f%#<V_sz_elem>  %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vdupq_n_f])
+ ;;
+ (define_insn "mve_vdupq_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:<V_elem> 1 "s_register_operand" "r")]
+ 	 VDUPQ_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vdup.%#<V_sz_elem>   %q0, %1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vabsq_f])
+ ;;
+ (define_insn "mve_vabsq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
+ 	 VABSQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vabs.f%#<V_sz_elem>  %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrev32q_f])
+ ;;
+ (define_insn "mve_vrev32q_fv8hf"
+   [
+    (set (match_operand:V8HF 0 "s_register_operand" "=w")
+ 	(unspec:V8HF [(match_operand:V8HF 1 "s_register_operand" "w")]
+ 	 VREV32Q_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vrev32.16 %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ ;;
+ ;; [vcvttq_f32_f16])
+ ;;
+ (define_insn "mve_vcvttq_f32_f16v4sf"
+   [
+    (set (match_operand:V4SF 0 "s_register_operand" "=w")
+ 	(unspec:V4SF [(match_operand:V8HF 1 "s_register_operand" "w")]
+ 	 VCVTTQ_F32_F16))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcvtt.f32.f16 %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcvtbq_f32_f16])
+ ;;
+ (define_insn "mve_vcvtbq_f32_f16v4sf"
+   [
+    (set (match_operand:V4SF 0 "s_register_operand" "=w")
+ 	(unspec:V4SF [(match_operand:V8HF 1 "s_register_operand" "w")]
+ 	 VCVTBQ_F32_F16))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcvtb.f32.f16 %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcvtq_to_f_s, vcvtq_to_f_u])
+ ;;
+ (define_insn "mve_vcvtq_to_f_<supf><mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:<MVE_CNVT> 1 "s_register_operand" "w")]
+ 	 VCVTQ_TO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcvt.f%#<V_sz_elem>.<supf>%#<V_sz_elem>       %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrev64q_u, vrev64q_s])
+ ;;
+ (define_insn "mve_vrev64q_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=&w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")]
+ 	 VREV64Q))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrev64.%#<V_sz_elem> %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcvtq_from_f_s, vcvtq_from_f_u])
+ ;;
+ (define_insn "mve_vcvtq_from_f_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:<MVE_CNVT> 1 "s_register_operand" "w")]
+ 	 VCVTQ_FROM_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcvt.<supf>%#<V_sz_elem>.f%#<V_sz_elem>       %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ ;; [vqnegq_s])
+ ;;
+ (define_insn "mve_vqnegq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")]
+ 	 VQNEGQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqneg.s%#<V_sz_elem> %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqabsq_s])
+ ;;
+ (define_insn "mve_vqabsq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")]
+ 	 VQABSQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqabs.s%#<V_sz_elem> %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vnegq_s])
+ ;;
+ (define_insn "mve_vnegq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")]
+ 	 VNEGQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vneg.s%#<V_sz_elem>  %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmvnq_u, vmvnq_s])
+ ;;
+ (define_insn "mve_vmvnq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")]
+ 	 VMVNQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmvn %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vdupq_n_u, vdupq_n_s])
+ ;;
+ (define_insn "mve_vdupq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:<V_elem> 1 "s_register_operand" "r")]
+ 	 VDUPQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vdup.%#<V_sz_elem>   %q0, %1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vclzq_u, vclzq_s])
+ ;;
+ (define_insn "mve_vclzq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")]
+ 	 VCLZQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vclz.i%#<V_sz_elem>  %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vclsq_s])
+ ;;
+ (define_insn "mve_vclsq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")]
+ 	 VCLSQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcls.s%#<V_sz_elem>  %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vaddvq_s, vaddvq_u])
+ ;;
+ (define_insn "mve_vaddvq_<supf><mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:MVE_2 1 "s_register_operand" "w")]
+ 	 VADDVQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vaddv.<supf>%#<V_sz_elem>\t%0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vabsq_s])
+ ;;
+ (define_insn "mve_vabsq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")]
+ 	 VABSQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vabs.s%#<V_sz_elem>\t%q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrev32q_u, vrev32q_s])
+ ;;
+ (define_insn "mve_vrev32q_<supf><mode>"
+   [
+    (set (match_operand:MVE_3 0 "s_register_operand" "=w")
+ 	(unspec:MVE_3 [(match_operand:MVE_3 1 "s_register_operand" "w")]
+ 	 VREV32Q))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrev32.%#<V_sz_elem>\t%q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmovltq_u, vmovltq_s])
+ ;;
+ (define_insn "mve_vmovltq_<supf><mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
+ 	(unspec:<V_double_width> [(match_operand:MVE_3 1 "s_register_operand" "w")]
+ 	 VMOVLTQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmovlt.<supf>%#<V_sz_elem>   %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmovlbq_s, vmovlbq_u])
+ ;;
+ (define_insn "mve_vmovlbq_<supf><mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
+ 	(unspec:<V_double_width> [(match_operand:MVE_3 1 "s_register_operand" "w")]
+ 	 VMOVLBQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmovlb.<supf>%#<V_sz_elem>   %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcvtpq_s, vcvtpq_u])
+ ;;
+ (define_insn "mve_vcvtpq_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:<MVE_CNVT> 1 "s_register_operand" "w")]
+ 	 VCVTPQ))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcvtp.<supf>%#<V_sz_elem>.f%#<V_sz_elem>      %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcvtnq_s, vcvtnq_u])
+ ;;
+ (define_insn "mve_vcvtnq_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:<MVE_CNVT> 1 "s_register_operand" "w")]
+ 	 VCVTNQ))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcvtn.<supf>%#<V_sz_elem>.f%#<V_sz_elem>      %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcvtmq_s, vcvtmq_u])
+ ;;
+ (define_insn "mve_vcvtmq_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:<MVE_CNVT> 1 "s_register_operand" "w")]
+ 	 VCVTMQ))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcvtm.<supf>%#<V_sz_elem>.f%#<V_sz_elem>      %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcvtaq_u, vcvtaq_s])
+ ;;
+ (define_insn "mve_vcvtaq_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:<MVE_CNVT> 1 "s_register_operand" "w")]
+ 	 VCVTAQ))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcvta.<supf>%#<V_sz_elem>.f%#<V_sz_elem>      %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmvnq_n_u, vmvnq_n_s])
+ ;;
+ (define_insn "mve_vmvnq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:HI 1 "immediate_operand" "i")]
+ 	 VMVNQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmvn.i%#<V_sz_elem>  %q0, %1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrev16q_u, vrev16q_s])
+ ;;
+ (define_insn "mve_vrev16q_<supf>v16qi"
+   [
+    (set (match_operand:V16QI 0 "s_register_operand" "=w")
+ 	(unspec:V16QI [(match_operand:V16QI 1 "s_register_operand" "w")]
+ 	 VREV16Q))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrev16.8 %q0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vaddlvq_s vaddlvq_u])
+ ;;
+ (define_insn "mve_vaddlvq_<supf>v4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:V4SI 1 "s_register_operand" "w")]
+ 	 VADDLVQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vaddlv.<supf>32 %Q0, %R0, %q1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vctp8q vctp16q vctp32q vctp64q])
+ ;;
+ (define_insn "mve_vctp<mode1>qhi"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:SI 1 "s_register_operand" "r")]
+ 	VCTPQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vctp.<mode1> %1"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vpnot])
+ ;;
+ (define_insn "mve_vpnothi"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:HI 1 "vpr_register_operand" "0")]
+ 	 VPNOT))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpnot"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vsubq_n_f])
+ ;;
+ (define_insn "mve_vsubq_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VSUBQ_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vsub.f<V_sz_elem>  %q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vbrsrq_n_f])
+ ;;
+ (define_insn "mve_vbrsrq_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:SI 2 "s_register_operand" "r")]
+ 	 VBRSRQ_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vbrsr.<V_sz_elem>  %q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcvtq_n_to_f_s, vcvtq_n_to_f_u])
+ ;;
+ (define_insn "mve_vcvtq_n_to_f_<supf><mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:<MVE_CNVT> 1 "s_register_operand" "w")
+ 		       (match_operand:SI 2 "<MVE_pred2>" "<MVE_constraint2>")]
+ 	 VCVTQ_N_TO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcvt.f<V_sz_elem>.<supf><V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;; [vcreateq_f])
+ ;;
+ (define_insn "mve_vcreateq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:DI 1 "s_register_operand" "r")
+ 		       (match_operand:DI 2 "s_register_operand" "r")]
+ 	 VCREATEQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vmov %q0[2], %q0[0], %Q2, %Q1\;vmov %q0[3], %q0[1], %R2, %R1"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcreateq_u, vcreateq_s])
+ ;;
+ (define_insn "mve_vcreateq_<supf><mode>"
+   [
+    (set (match_operand:MVE_1 0 "s_register_operand" "=w")
+ 	(unspec:MVE_1 [(match_operand:DI 1 "s_register_operand" "r")
+ 		       (match_operand:DI 2 "s_register_operand" "r")]
+ 	 VCREATEQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmov %q0[2], %q0[0], %Q2, %Q1\;vmov %q0[3], %q0[1], %R2, %R1"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vshrq_n_s, vshrq_n_u])
+ ;;
+ (define_insn "mve_vshrq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:SI 2 "<MVE_pred2>" "<MVE_constraint2>")]
+ 	 VSHRQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vshr.<supf><V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcvtq_n_from_f_s, vcvtq_n_from_f_u])
+ ;;
+ (define_insn "mve_vcvtq_n_from_f_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:<MVE_CNVT> 1 "s_register_operand" "w")
+ 		       (match_operand:SI 2 "<MVE_pred2>" "<MVE_constraint2>")]
+ 	 VCVTQ_N_FROM_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcvt.<supf><V_sz_elem>.f<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vaddlvq_p_s])
+ ;;
+ (define_insn "mve_vaddlvq_p_<supf>v4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		    (match_operand:HI 2 "vpr_register_operand" "Up")]
+ 	 VADDLVQ_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vaddlvt.<supf>32 %Q0, %R0, %q1"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpneq_u, vcmpneq_s])
+ ;;
+ (define_insn "mve_vcmpneq_<supf><mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VCMPNEQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.i%#<V_sz_elem>  ne, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vshlq_s, vshlq_u])
+ ;;
+ (define_insn "mve_vshlq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VSHLQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vshl.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vabdq_s, vabdq_u])
+ ;;
+ (define_insn "mve_vabdq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VABDQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vabd.<supf>%#<V_sz_elem>	%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vaddq_n_s, vaddq_n_u])
+ ;;
+ (define_insn "mve_vaddq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VADDQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vadd.i%#<V_sz_elem>	%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vaddvaq_s, vaddvaq_u])
+ ;;
+ (define_insn "mve_vaddvaq_<supf><mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:SI 1 "s_register_operand" "0")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VADDVAQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vaddva.<supf>%#<V_sz_elem>	%0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vaddvq_p_u, vaddvq_p_s])
+ ;;
+ (define_insn "mve_vaddvq_p_<supf><mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:HI 2 "vpr_register_operand" "Up")]
+ 	 VADDVQ_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vaddvt.<supf>%#<V_sz_elem>	%0, %q1"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vandq_u, vandq_s])
+ ;;
+ (define_insn "mve_vandq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VANDQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vand %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vbicq_s, vbicq_u])
+ ;;
+ (define_insn "mve_vbicq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VBICQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vbic %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vbrsrq_n_u, vbrsrq_n_s])
+ ;;
+ (define_insn "mve_vbrsrq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:SI 2 "s_register_operand" "r")]
+ 	 VBRSRQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vbrsr.%#<V_sz_elem>	%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcaddq_rot270_s, vcaddq_rot270_u])
+ ;;
+ (define_insn "mve_vcaddq_rot270_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VCADDQ_ROT270))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcadd.i%#<V_sz_elem>	%q0, %q1, %q2, #270"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcaddq_rot90_u, vcaddq_rot90_s])
+ ;;
+ (define_insn "mve_vcaddq_rot90_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VCADDQ_ROT90))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcadd.i%#<V_sz_elem>	%q0, %q1, %q2, #90"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpcsq_n_u])
+ ;;
+ (define_insn "mve_vcmpcsq_n_u<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPCSQ_N_U))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.u%#<V_sz_elem>	cs, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpcsq_u])
+ ;;
+ (define_insn "mve_vcmpcsq_u<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VCMPCSQ_U))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.u%#<V_sz_elem>	cs, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpeqq_n_s, vcmpeqq_n_u])
+ ;;
+ (define_insn "mve_vcmpeqq_n_<supf><mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPEQQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.i%#<V_sz_elem>	eq, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpeqq_u, vcmpeqq_s])
+ ;;
+ (define_insn "mve_vcmpeqq_<supf><mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VCMPEQQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.i%#<V_sz_elem>	eq, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpgeq_n_s])
+ ;;
+ (define_insn "mve_vcmpgeq_n_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPGEQ_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.s%#<V_sz_elem>	ge, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpgeq_s])
+ ;;
+ (define_insn "mve_vcmpgeq_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VCMPGEQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.s%#<V_sz_elem>	ge, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpgtq_n_s])
+ ;;
+ (define_insn "mve_vcmpgtq_n_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPGTQ_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.s%#<V_sz_elem>	gt, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpgtq_s])
+ ;;
+ (define_insn "mve_vcmpgtq_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VCMPGTQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.s%#<V_sz_elem>	gt, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmphiq_n_u])
+ ;;
+ (define_insn "mve_vcmphiq_n_u<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPHIQ_N_U))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.u%#<V_sz_elem>	hi, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmphiq_u])
+ ;;
+ (define_insn "mve_vcmphiq_u<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VCMPHIQ_U))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.u%#<V_sz_elem>	hi, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpleq_n_s])
+ ;;
+ (define_insn "mve_vcmpleq_n_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPLEQ_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.s%#<V_sz_elem>	le, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpleq_s])
+ ;;
+ (define_insn "mve_vcmpleq_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VCMPLEQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.s%#<V_sz_elem>	le, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpltq_n_s])
+ ;;
+ (define_insn "mve_vcmpltq_n_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPLTQ_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.s%#<V_sz_elem>	lt, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpltq_s])
+ ;;
+ (define_insn "mve_vcmpltq_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VCMPLTQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.s%#<V_sz_elem>	lt, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpneq_n_u, vcmpneq_n_s])
+ ;;
+ (define_insn "mve_vcmpneq_n_<supf><mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPNEQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vcmp.i%#<V_sz_elem>	ne, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [veorq_u, veorq_s])
+ ;;
+ (define_insn "mve_veorq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VEORQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "veor %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vhaddq_n_u, vhaddq_n_s])
+ ;;
+ (define_insn "mve_vhaddq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VHADDQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vhadd.<supf>%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vhaddq_s, vhaddq_u])
+ ;;
+ (define_insn "mve_vhaddq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VHADDQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vhadd.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vhcaddq_rot270_s])
+ ;;
+ (define_insn "mve_vhcaddq_rot270_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VHCADDQ_ROT270_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vhcadd.s%#<V_sz_elem>\t%q0, %q1, %q2, #270"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vhcaddq_rot90_s])
+ ;;
+ (define_insn "mve_vhcaddq_rot90_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VHCADDQ_ROT90_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vhcadd.s%#<V_sz_elem>\t%q0, %q1, %q2, #90"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vhsubq_n_u, vhsubq_n_s])
+ ;;
+ (define_insn "mve_vhsubq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VHSUBQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vhsub.<supf>%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vhsubq_s, vhsubq_u])
+ ;;
+ (define_insn "mve_vhsubq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VHSUBQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vhsub.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmaxaq_s])
+ ;;
+ (define_insn "mve_vmaxaq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMAXAQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmaxa.s%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmaxavq_s])
+ ;;
+ (define_insn "mve_vmaxavq_s<mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 			  (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMAXAVQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmaxav.s%#<V_sz_elem>\t%0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmaxq_u, vmaxq_s])
+ ;;
+ (define_insn "mve_vmaxq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMAXQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmax.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmaxvq_u, vmaxvq_s])
+ ;;
+ (define_insn "mve_vmaxvq_<supf><mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 			  (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMAXVQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmaxv.<supf>%#<V_sz_elem>\t%0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vminaq_s])
+ ;;
+ (define_insn "mve_vminaq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMINAQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmina.s%#<V_sz_elem>\t%q0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vminavq_s])
+ ;;
+ (define_insn "mve_vminavq_s<mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 			  (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMINAVQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vminav.s%#<V_sz_elem>\t%0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vminq_s, vminq_u])
+ ;;
+ (define_insn "mve_vminq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMINQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmin.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vminvq_u, vminvq_s])
+ ;;
+ (define_insn "mve_vminvq_<supf><mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 			  (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMINVQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vminv.<supf>%#<V_sz_elem>\t%0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmladavq_u, vmladavq_s])
+ ;;
+ (define_insn "mve_vmladavq_<supf><mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMLADAVQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmladav.<supf>%#<V_sz_elem>\t%0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmladavxq_s])
+ ;;
+ (define_insn "mve_vmladavxq_s<mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMLADAVXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmladavx.s%#<V_sz_elem>\t%0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlsdavq_s])
+ ;;
+ (define_insn "mve_vmlsdavq_s<mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMLSDAVQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmlsdav.s%#<V_sz_elem>\t%0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlsdavxq_s])
+ ;;
+ (define_insn "mve_vmlsdavxq_s<mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMLSDAVXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmlsdavx.s%#<V_sz_elem>\t%0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmulhq_s, vmulhq_u])
+ ;;
+ (define_insn "mve_vmulhq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMULHQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmulh.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmullbq_int_u, vmullbq_int_s])
+ ;;
+ (define_insn "mve_vmullbq_int_<supf><mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:<V_double_width> [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 				  (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMULLBQ_INT))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmullb.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmulltq_int_u, vmulltq_int_s])
+ ;;
+ (define_insn "mve_vmulltq_int_<supf><mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:<V_double_width> [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 				  (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMULLTQ_INT))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmullt.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmulq_n_u, vmulq_n_s])
+ ;;
+ (define_insn "mve_vmulq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VMULQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmul.i%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmulq_u, vmulq_s])
+ ;;
+ (define_insn "mve_vmulq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VMULQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmul.i%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vornq_u, vornq_s])
+ ;;
+ (define_insn "mve_vornq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VORNQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vorn %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vorrq_s, vorrq_u])
+ ;;
+ (define_insn "mve_vorrq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VORRQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vorr %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqaddq_n_s, vqaddq_n_u])
+ ;;
+ (define_insn "mve_vqaddq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VQADDQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqadd.<supf>%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqaddq_u, vqaddq_s])
+ ;;
+ (define_insn "mve_vqaddq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VQADDQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqadd.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqdmulhq_n_s])
+ ;;
+ (define_insn "mve_vqdmulhq_n_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VQDMULHQ_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqdmulh.s%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqdmulhq_s])
+ ;;
+ (define_insn "mve_vqdmulhq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VQDMULHQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqdmulh.s%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqrdmulhq_n_s])
+ ;;
+ (define_insn "mve_vqrdmulhq_n_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VQRDMULHQ_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrdmulh.s%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqrdmulhq_s])
+ ;;
+ (define_insn "mve_vqrdmulhq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VQRDMULHQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrdmulh.s%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqrshlq_n_s, vqrshlq_n_u])
+ ;;
+ (define_insn "mve_vqrshlq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:SI 2 "s_register_operand" "r")]
+ 	 VQRSHLQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrshl.<supf>%#<V_sz_elem>\t%q0, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqrshlq_s, vqrshlq_u])
+ ;;
+ (define_insn "mve_vqrshlq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VQRSHLQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrshl.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqshlq_n_s, vqshlq_n_u])
+ ;;
+ (define_insn "mve_vqshlq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:SI 2 "immediate_operand" "i")]
+ 	 VQSHLQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqshl.<supf>%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqshlq_r_u, vqshlq_r_s])
+ ;;
+ (define_insn "mve_vqshlq_r_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:SI 2 "s_register_operand" "r")]
+ 	 VQSHLQ_R))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqshl.<supf>%#<V_sz_elem>\t%q0, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqshlq_s, vqshlq_u])
+ ;;
+ (define_insn "mve_vqshlq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VQSHLQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqshl.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqshluq_n_s])
+ ;;
+ (define_insn "mve_vqshluq_n_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:SI 2 "mve_imm_7" "Ra")]
+ 	 VQSHLUQ_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqshlu.s%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqsubq_n_s, vqsubq_n_u])
+ ;;
+ (define_insn "mve_vqsubq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VQSUBQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqsub.<supf>%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqsubq_u, vqsubq_s])
+ ;;
+ (define_insn "mve_vqsubq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VQSUBQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqsub.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrhaddq_s, vrhaddq_u])
+ ;;
+ (define_insn "mve_vrhaddq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VRHADDQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrhadd.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrmulhq_s, vrmulhq_u])
+ ;;
+ (define_insn "mve_vrmulhq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VRMULHQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrmulh.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrshlq_n_u, vrshlq_n_s])
+ ;;
+ (define_insn "mve_vrshlq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:SI 2 "s_register_operand" "r")]
+ 	 VRSHLQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrshl.<supf>%#<V_sz_elem>\t%q0, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrshlq_s, vrshlq_u])
+ ;;
+ (define_insn "mve_vrshlq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VRSHLQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrshl.<supf>%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrshrq_n_s, vrshrq_n_u])
+ ;;
+ (define_insn "mve_vrshrq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:SI 2 "<MVE_pred2>" "<MVE_constraint2>")]
+ 	 VRSHRQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrshr.<supf>%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vshlq_n_u, vshlq_n_s])
+ ;;
+ (define_insn "mve_vshlq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:SI 2 "immediate_operand" "i")]
+ 	 VSHLQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vshl.<supf>%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vshlq_r_s, vshlq_r_u])
+ ;;
+ (define_insn "mve_vshlq_r_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:SI 2 "s_register_operand" "r")]
+ 	 VSHLQ_R))
+   ]
+   "TARGET_HAVE_MVE"
+   "vshl.<supf>%#<V_sz_elem>\t%q0, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vsubq_n_s, vsubq_n_u])
+ ;;
+ (define_insn "mve_vsubq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VSUBQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vsub.i%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vsubq_s, vsubq_u])
+ ;;
+ (define_insn "mve_vsubq_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VSUBQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vsub.i%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vabdq_f])
+ ;;
+ (define_insn "mve_vabdq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VABDQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vabd.f%#<V_sz_elem>	%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vaddlvaq_s vaddlvaq_u])
+ ;;
+ (define_insn "mve_vaddlvaq_<supf>v4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		    (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VADDLVAQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vaddlva.<supf>32 %Q0, %R0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vaddq_n_f])
+ ;;
+ (define_insn "mve_vaddq_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VADDQ_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vadd.f%#<V_sz_elem>	%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vandq_f])
+ ;;
+ (define_insn "mve_vandq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VANDQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vand %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vbicq_f])
+ ;;
+ (define_insn "mve_vbicq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VBICQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vbic %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vbicq_n_s, vbicq_n_u])
+ ;;
+ (define_insn "mve_vbicq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:MVE_5 1 "s_register_operand" "0")
+ 		       (match_operand:SI 2 "immediate_operand" "i")]
+ 	 VBICQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vbic.i%#<V_sz_elem>	%q0, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcaddq_rot270_f])
+ ;;
+ (define_insn "mve_vcaddq_rot270_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VCADDQ_ROT270_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcadd.f%#<V_sz_elem>	%q0, %q1, %q2, #270"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcaddq_rot90_f])
+ ;;
+ (define_insn "mve_vcaddq_rot90_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VCADDQ_ROT90_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcadd.f%#<V_sz_elem>	%q0, %q1, %q2, #90"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpeqq_f])
+ ;;
+ (define_insn "mve_vcmpeqq_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VCMPEQQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmp.f%#<V_sz_elem>	eq, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpeqq_n_f])
+ ;;
+ (define_insn "mve_vcmpeqq_n_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPEQQ_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmp.f%#<V_sz_elem>	eq, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpgeq_f])
+ ;;
+ (define_insn "mve_vcmpgeq_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VCMPGEQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmp.f%#<V_sz_elem>	ge, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpgeq_n_f])
+ ;;
+ (define_insn "mve_vcmpgeq_n_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPGEQ_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmp.f%#<V_sz_elem>	ge, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpgtq_f])
+ ;;
+ (define_insn "mve_vcmpgtq_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VCMPGTQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmp.f%#<V_sz_elem>	gt, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpgtq_n_f])
+ ;;
+ (define_insn "mve_vcmpgtq_n_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPGTQ_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmp.f%#<V_sz_elem>	gt, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpleq_f])
+ ;;
+ (define_insn "mve_vcmpleq_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VCMPLEQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmp.f%#<V_sz_elem>	le, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpleq_n_f])
+ ;;
+ (define_insn "mve_vcmpleq_n_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPLEQ_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmp.f%#<V_sz_elem>	le, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpltq_f])
+ ;;
+ (define_insn "mve_vcmpltq_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VCMPLTQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmp.f%#<V_sz_elem>	lt, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpltq_n_f])
+ ;;
+ (define_insn "mve_vcmpltq_n_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPLTQ_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmp.f%#<V_sz_elem>	lt, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpneq_f])
+ ;;
+ (define_insn "mve_vcmpneq_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VCMPNEQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmp.f%#<V_sz_elem>	ne, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpneq_n_f])
+ ;;
+ (define_insn "mve_vcmpneq_n_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VCMPNEQ_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmp.f%#<V_sz_elem>	ne, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmulq_f])
+ ;;
+ (define_insn "mve_vcmulq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VCMULQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmul.f%#<V_sz_elem>	%q0, %q1, %q2, #0"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmulq_rot180_f])
+ ;;
+ (define_insn "mve_vcmulq_rot180_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VCMULQ_ROT180_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmul.f%#<V_sz_elem>	%q0, %q1, %q2, #180"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmulq_rot270_f])
+ ;;
+ (define_insn "mve_vcmulq_rot270_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VCMULQ_ROT270_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmul.f%#<V_sz_elem>	%q0, %q1, %q2, #270"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmulq_rot90_f])
+ ;;
+ (define_insn "mve_vcmulq_rot90_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VCMULQ_ROT90_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmul.f%#<V_sz_elem>	%q0, %q1, %q2, #90"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vctp8q_m vctp16q_m vctp32q_m vctp64q_m])
+ ;;
+ (define_insn "mve_vctp<mode1>q_mhi"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:SI 1 "s_register_operand" "r")
+ 		    (match_operand:HI 2 "vpr_register_operand" "Up")]
+ 	 VCTPQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vctpt.<mode1> %1"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcvtbq_f16_f32])
+ ;;
+ (define_insn "mve_vcvtbq_f16_f32v8hf"
+   [
+    (set (match_operand:V8HF 0 "s_register_operand" "=w")
+ 	(unspec:V8HF [(match_operand:V8HF 1 "s_register_operand" "0")
+ 		      (match_operand:V4SF 2 "s_register_operand" "w")]
+ 	 VCVTBQ_F16_F32))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcvtb.f16.f32 %q0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcvttq_f16_f32])
+ ;;
+ (define_insn "mve_vcvttq_f16_f32v8hf"
+   [
+    (set (match_operand:V8HF 0 "s_register_operand" "=w")
+ 	(unspec:V8HF [(match_operand:V8HF 1 "s_register_operand" "0")
+ 		      (match_operand:V4SF 2 "s_register_operand" "w")]
+ 	 VCVTTQ_F16_F32))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcvtt.f16.f32 %q0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [veorq_f])
+ ;;
+ (define_insn "mve_veorq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VEORQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "veor %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmaxnmaq_f])
+ ;;
+ (define_insn "mve_vmaxnmaq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VMAXNMAQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vmaxnma.f%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmaxnmavq_f])
+ ;;
+ (define_insn "mve_vmaxnmavq_f<mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 			  (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VMAXNMAVQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vmaxnmav.f%#<V_sz_elem>	%0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmaxnmq_f])
+ ;;
+ (define_insn "mve_vmaxnmq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VMAXNMQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vmaxnm.f%#<V_sz_elem>	%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmaxnmvq_f])
+ ;;
+ (define_insn "mve_vmaxnmvq_f<mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 			  (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VMAXNMVQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vmaxnmv.f%#<V_sz_elem>	%0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vminnmaq_f])
+ ;;
+ (define_insn "mve_vminnmaq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VMINNMAQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vminnma.f%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vminnmavq_f])
+ ;;
+ (define_insn "mve_vminnmavq_f<mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 			  (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VMINNMAVQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vminnmav.f%#<V_sz_elem>	%0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vminnmq_f])
+ ;;
+ (define_insn "mve_vminnmq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VMINNMQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vminnm.f%#<V_sz_elem>	%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vminnmvq_f])
+ ;;
+ (define_insn "mve_vminnmvq_f<mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 			  (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VMINNMVQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vminnmv.f%#<V_sz_elem>	%0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlaldavq_u, vmlaldavq_s])
+ ;;
+ (define_insn "mve_vmlaldavq_<supf><mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:MVE_5 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_5 2 "s_register_operand" "w")]
+ 	 VMLALDAVQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmlaldav.<supf>%#<V_sz_elem>	%Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlaldavxq_s])
+ ;;
+ (define_insn "mve_vmlaldavxq_s<mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:MVE_5 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_5 2 "s_register_operand" "w")]
+ 	 VMLALDAVXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmlaldavx.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlsldavq_s])
+ ;;
+ (define_insn "mve_vmlsldavq_s<mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:MVE_5 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_5 2 "s_register_operand" "w")]
+ 	 VMLSLDAVQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmlsldav.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlsldavxq_s])
+ ;;
+ (define_insn "mve_vmlsldavxq_s<mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:MVE_5 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_5 2 "s_register_operand" "w")]
+ 	 VMLSLDAVXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmlsldavx.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmovnbq_u, vmovnbq_s])
+ ;;
+ (define_insn "mve_vmovnbq_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 				 (match_operand:MVE_5 2 "s_register_operand" "w")]
+ 	 VMOVNBQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmovnb.i%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmovntq_s, vmovntq_u])
+ ;;
+ (define_insn "mve_vmovntq_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 				 (match_operand:MVE_5 2 "s_register_operand" "w")]
+ 	 VMOVNTQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmovnt.i%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmulq_f])
+ ;;
+ (define_insn "mve_vmulq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VMULQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vmul.f%#<V_sz_elem>	%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmulq_n_f])
+ ;;
+ (define_insn "mve_vmulq_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VMULQ_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vmul.f%#<V_sz_elem>	%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vornq_f])
+ ;;
+ (define_insn "mve_vornq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VORNQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vorn %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vorrq_f])
+ ;;
+ (define_insn "mve_vorrq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VORRQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vorr %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vorrq_n_u, vorrq_n_s])
+ ;;
+ (define_insn "mve_vorrq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:MVE_5 1 "s_register_operand" "0")
+ 		       (match_operand:SI 2 "immediate_operand" "i")]
+ 	 VORRQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vorr.i%#<V_sz_elem>	%q0, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqdmullbq_n_s])
+ ;;
+ (define_insn "mve_vqdmullbq_n_s<mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:<V_double_width> [(match_operand:MVE_5 1 "s_register_operand" "w")
+ 				  (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VQDMULLBQ_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqdmullb.s%#<V_sz_elem>	%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqdmullbq_s])
+ ;;
+ (define_insn "mve_vqdmullbq_s<mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:<V_double_width> [(match_operand:MVE_5 1 "s_register_operand" "w")
+ 				  (match_operand:MVE_5 2 "s_register_operand" "w")]
+ 	 VQDMULLBQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqdmullb.s%#<V_sz_elem>	%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqdmulltq_n_s])
+ ;;
+ (define_insn "mve_vqdmulltq_n_s<mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:<V_double_width> [(match_operand:MVE_5 1 "s_register_operand" "w")
+ 				  (match_operand:<V_elem> 2 "s_register_operand" "r")]
+ 	 VQDMULLTQ_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqdmullt.s%#<V_sz_elem>	%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqdmulltq_s])
+ ;;
+ (define_insn "mve_vqdmulltq_s<mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:<V_double_width> [(match_operand:MVE_5 1 "s_register_operand" "w")
+ 				  (match_operand:MVE_5 2 "s_register_operand" "w")]
+ 	 VQDMULLTQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqdmullt.s%#<V_sz_elem>	%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqmovnbq_u, vqmovnbq_s])
+ ;;
+ (define_insn "mve_vqmovnbq_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 				 (match_operand:MVE_5 2 "s_register_operand" "w")]
+ 	 VQMOVNBQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqmovnb.<supf>%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqmovntq_u, vqmovntq_s])
+ ;;
+ (define_insn "mve_vqmovntq_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 				 (match_operand:MVE_5 2 "s_register_operand" "w")]
+ 	 VQMOVNTQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqmovnt.<supf>%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqmovunbq_s])
+ ;;
+ (define_insn "mve_vqmovunbq_s<mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 				 (match_operand:MVE_5 2 "s_register_operand" "w")]
+ 	 VQMOVUNBQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqmovunb.s%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqmovuntq_s])
+ ;;
+ (define_insn "mve_vqmovuntq_s<mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 				 (match_operand:MVE_5 2 "s_register_operand" "w")]
+ 	 VQMOVUNTQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqmovunt.s%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrmlaldavhxq_s])
+ ;;
+ (define_insn "mve_vrmlaldavhxq_sv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		    (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VRMLALDAVHXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrmlaldavhx.s32 %Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrmlsldavhq_s])
+ ;;
+ (define_insn "mve_vrmlsldavhq_sv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		    (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VRMLSLDAVHQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrmlsldavh.s32\t%Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrmlsldavhxq_s])
+ ;;
+ (define_insn "mve_vrmlsldavhxq_sv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		    (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VRMLSLDAVHXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrmlsldavhx.s32\t%Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vshllbq_n_s, vshllbq_n_u])
+ ;;
+ (define_insn "mve_vshllbq_n_<supf><mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
+ 	(unspec:<V_double_width> [(match_operand:MVE_3 1 "s_register_operand" "w")
+ 				  (match_operand:SI 2 "immediate_operand" "i")]
+ 	 VSHLLBQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vshllb.<supf>%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vshlltq_n_u, vshlltq_n_s])
+ ;;
+ (define_insn "mve_vshlltq_n_<supf><mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
+ 	(unspec:<V_double_width> [(match_operand:MVE_3 1 "s_register_operand" "w")
+ 				  (match_operand:SI 2 "immediate_operand" "i")]
+ 	 VSHLLTQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vshllt.<supf>%#<V_sz_elem>\t%q0, %q1, %2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vsubq_f])
+ ;;
+ (define_insn "mve_vsubq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")]
+ 	 VSUBQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vsub.f%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmulltq_poly_p])
+ ;;
+ (define_insn "mve_vmulltq_poly_p<mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
+ 	(unspec:<V_double_width> [(match_operand:MVE_3 1 "s_register_operand" "w")
+ 				  (match_operand:MVE_3 2 "s_register_operand" "w")]
+ 	 VMULLTQ_POLY_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmullt.p%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmullbq_poly_p])
+ ;;
+ (define_insn "mve_vmullbq_poly_p<mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
+ 	(unspec:<V_double_width> [(match_operand:MVE_3 1 "s_register_operand" "w")
+ 				  (match_operand:MVE_3 2 "s_register_operand" "w")]
+ 	 VMULLBQ_POLY_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmullb.p%#<V_sz_elem>\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrmlaldavhq_u vrmlaldavhq_s])
+ ;;
+ (define_insn "mve_vrmlaldavhq_<supf>v4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		    (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VRMLALDAVHQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrmlaldavh.<supf>32 %Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vbicq_m_n_s, vbicq_m_n_u])
+ ;;
+ (define_insn "mve_vbicq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:MVE_5 1 "s_register_operand" "0")
+ 		       (match_operand:SI 2 "immediate_operand" "i")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VBICQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vbict.i%#<V_sz_elem>	%q0, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vcmpeqq_m_f])
+ ;;
+ (define_insn "mve_vcmpeqq_m_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		    (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPEQQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmpt.f%#<V_sz_elem>	eq, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vcvtaq_m_u, vcvtaq_m_s])
+ ;;
+ (define_insn "mve_vcvtaq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:MVE_5 1 "s_register_operand" "0")
+ 		       (match_operand:<MVE_CNVT> 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCVTAQ_M))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcvtat.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vcvtq_m_to_f_s, vcvtq_m_to_f_u])
+ ;;
+ (define_insn "mve_vcvtq_m_to_f_<supf><mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:<MVE_CNVT> 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCVTQ_M_TO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcvtt.f%#<V_sz_elem>.<supf>%#<V_sz_elem>	 %q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vqrshrnbq_n_u, vqrshrnbq_n_s])
+ ;;
+ (define_insn "mve_vqrshrnbq_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 				 (match_operand:MVE_5 2 "s_register_operand" "w")
+ 				 (match_operand:SI 3 "mve_imm_8" "Rb")]
+ 	 VQRSHRNBQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrshrnb.<supf>%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ ;;
+ ;; [vqrshrunbq_n_s])
+ ;;
+ (define_insn "mve_vqrshrunbq_n_s<mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 				 (match_operand:MVE_5 2 "s_register_operand" "w")
+ 				 (match_operand:SI 3 "mve_imm_8" "Rb")]
+ 	 VQRSHRUNBQ_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrshrunb.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ ;;
+ ;; [vrmlaldavhaq_s vrmlaldavhaq_u])
+ ;;
+ (define_insn "mve_vrmlaldavhaq_<supf>v4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		    (match_operand:V4SI 2 "s_register_operand" "w")
+ 		    (match_operand:V4SI 3 "s_register_operand" "w")]
+ 	 VRMLALDAVHAQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrmlaldavha.<supf>32 %Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vabavq_s, vabavq_u])
+ ;;
+ (define_insn "mve_vabavq_<supf><mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(unspec:SI [(match_operand:SI 1 "s_register_operand" "0")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 3 "s_register_operand" "w")]
+ 	 VABAVQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vabav.<supf>%#<V_sz_elem>\t%0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vshlcq_u vshlcq_s]
+ ;;
+ (define_expand "mve_vshlcq_vec_<supf><mode>"
+  [(match_operand:MVE_2 0 "s_register_operand")
+   (match_operand:MVE_2 1 "s_register_operand")
+   (match_operand:SI 2 "s_register_operand")
+   (match_operand:SI 3 "mve_imm_32")
+   (unspec:MVE_2 [(const_int 0)] VSHLCQ)]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (SImode);
+   emit_insn(gen_mve_vshlcq_<supf><mode>(operands[0], ignore_wb, operands[1],
+ 				      operands[2], operands[3]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vshlcq_carry_<supf><mode>"
+  [(match_operand:SI 0 "s_register_operand")
+   (match_operand:MVE_2 1 "s_register_operand")
+   (match_operand:SI 2 "s_register_operand")
+   (match_operand:SI 3 "mve_imm_32")
+   (unspec:MVE_2 [(const_int 0)] VSHLCQ)]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ignore_vec = gen_reg_rtx (<MODE>mode);
+   emit_insn(gen_mve_vshlcq_<supf><mode>(ignore_vec, operands[0], operands[1],
+ 				      operands[2], operands[3]));
+   DONE;
+ })
+ 
+ (define_insn "mve_vshlcq_<supf><mode>"
+  [(set (match_operand:MVE_2 0 "s_register_operand" "=w")
+        (unspec:MVE_2 [(match_operand:MVE_2 2 "s_register_operand" "0")
+ 		      (match_operand:SI 3 "s_register_operand" "1")
+ 		      (match_operand:SI 4 "mve_imm_32" "Rf")]
+ 	VSHLCQ))
+   (set (match_operand:SI  1 "s_register_operand" "=r")
+        (unspec:SI [(match_dup 2)
+ 		   (match_dup 3)
+ 		   (match_dup 4)]
+ 	VSHLCQ))]
+  "TARGET_HAVE_MVE"
+  "vshlc %q0, %1, %4")
+ 
+ ;;
+ ;; [vabsq_m_s])
+ ;;
+ (define_insn "mve_vabsq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VABSQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vabst.s%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vaddvaq_p_u, vaddvaq_p_s])
+ ;;
+ (define_insn "mve_vaddvaq_p_<supf><mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:SI 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VADDVAQ_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vaddvat.<supf>%#<V_sz_elem>	%0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vclsq_m_s])
+ ;;
+ (define_insn "mve_vclsq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCLSQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vclst.s%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vclzq_m_s, vclzq_m_u])
+ ;;
+ (define_insn "mve_vclzq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCLZQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vclzt.i%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpcsq_m_n_u])
+ ;;
+ (define_insn "mve_vcmpcsq_m_n_u<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPCSQ_M_N_U))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.u%#<V_sz_elem>	cs, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpcsq_m_u])
+ ;;
+ (define_insn "mve_vcmpcsq_m_u<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPCSQ_M_U))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.u%#<V_sz_elem>	cs, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpeqq_m_n_u, vcmpeqq_m_n_s])
+ ;;
+ (define_insn "mve_vcmpeqq_m_n_<supf><mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPEQQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.i%#<V_sz_elem>	eq, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpeqq_m_u, vcmpeqq_m_s])
+ ;;
+ (define_insn "mve_vcmpeqq_m_<supf><mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPEQQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.i%#<V_sz_elem>	eq, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpgeq_m_n_s])
+ ;;
+ (define_insn "mve_vcmpgeq_m_n_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPGEQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.s%#<V_sz_elem>	ge, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpgeq_m_s])
+ ;;
+ (define_insn "mve_vcmpgeq_m_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPGEQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.s%#<V_sz_elem>	ge, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpgtq_m_n_s])
+ ;;
+ (define_insn "mve_vcmpgtq_m_n_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPGTQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.s%#<V_sz_elem>	gt, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpgtq_m_s])
+ ;;
+ (define_insn "mve_vcmpgtq_m_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPGTQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.s%#<V_sz_elem>	gt, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmphiq_m_n_u])
+ ;;
+ (define_insn "mve_vcmphiq_m_n_u<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPHIQ_M_N_U))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.u%#<V_sz_elem>	hi, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmphiq_m_u])
+ ;;
+ (define_insn "mve_vcmphiq_m_u<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPHIQ_M_U))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.u%#<V_sz_elem>	hi, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpleq_m_n_s])
+ ;;
+ (define_insn "mve_vcmpleq_m_n_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPLEQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.s%#<V_sz_elem>	le, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpleq_m_s])
+ ;;
+ (define_insn "mve_vcmpleq_m_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPLEQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.s%#<V_sz_elem>	le, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpltq_m_n_s])
+ ;;
+ (define_insn "mve_vcmpltq_m_n_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPLTQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.s%#<V_sz_elem>	lt, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpltq_m_s])
+ ;;
+ (define_insn "mve_vcmpltq_m_s<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPLTQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.s%#<V_sz_elem>	lt, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpneq_m_n_u, vcmpneq_m_n_s])
+ ;;
+ (define_insn "mve_vcmpneq_m_n_<supf><mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPNEQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.i%#<V_sz_elem>	ne, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpneq_m_s, vcmpneq_m_u])
+ ;;
+ (define_insn "mve_vcmpneq_m_<supf><mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPNEQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcmpt.i%#<V_sz_elem>	ne, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vdupq_m_n_s, vdupq_m_n_u])
+ ;;
+ (define_insn "mve_vdupq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VDUPQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vdupt.%#<V_sz_elem>	%q0, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmaxaq_m_s])
+ ;;
+ (define_insn "mve_vmaxaq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMAXAQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmaxat.s%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmaxavq_p_s])
+ ;;
+ (define_insn "mve_vmaxavq_p_s<mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMAXAVQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmaxavt.s%#<V_sz_elem>	%0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmaxvq_p_u, vmaxvq_p_s])
+ ;;
+ (define_insn "mve_vmaxvq_p_<supf><mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMAXVQ_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmaxvt.<supf>%#<V_sz_elem>	%0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vminaq_m_s])
+ ;;
+ (define_insn "mve_vminaq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMINAQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vminat.s%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vminavq_p_s])
+ ;;
+ (define_insn "mve_vminavq_p_s<mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMINAVQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vminavt.s%#<V_sz_elem>	%0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vminvq_p_s, vminvq_p_u])
+ ;;
+ (define_insn "mve_vminvq_p_<supf><mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMINVQ_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vminvt.<supf>%#<V_sz_elem>\t%0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmladavaq_u, vmladavaq_s])
+ ;;
+ (define_insn "mve_vmladavaq_<supf><mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:SI 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")]
+ 	 VMLADAVAQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmladava.<supf>%#<V_sz_elem>	%0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmladavq_p_u, vmladavq_p_s])
+ ;;
+ (define_insn "mve_vmladavq_p_<supf><mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMLADAVQ_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmladavt.<supf>%#<V_sz_elem>\t%0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmladavxq_p_s])
+ ;;
+ (define_insn "mve_vmladavxq_p_s<mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMLADAVXQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmladavxt.s%#<V_sz_elem>\t%0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmlaq_n_u, vmlaq_n_s])
+ ;;
+ (define_insn "mve_vmlaq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")]
+ 	 VMLAQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmla.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlasq_n_u, vmlasq_n_s])
+ ;;
+ (define_insn "mve_vmlasq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")]
+ 	 VMLASQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmlas.<supf>%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlsdavq_p_s])
+ ;;
+ (define_insn "mve_vmlsdavq_p_s<mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMLSDAVQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlsdavt.s%#<V_sz_elem>	%0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmlsdavxq_p_s])
+ ;;
+ (define_insn "mve_vmlsdavxq_p_s<mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMLSDAVXQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlsdavxt.s%#<V_sz_elem>	%0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmvnq_m_s, vmvnq_m_u])
+ ;;
+ (define_insn "mve_vmvnq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMVNQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmvnt %q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vnegq_m_s])
+ ;;
+ (define_insn "mve_vnegq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VNEGQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vnegt.s%#<V_sz_elem>\t%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vpselq_u, vpselq_s])
+ ;;
+ (define_insn "mve_vpselq_<supf><mode>"
+   [
+    (set (match_operand:MVE_1 0 "s_register_operand" "=w")
+ 	(unspec:MVE_1 [(match_operand:MVE_1 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_1 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VPSELQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpsel %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqabsq_m_s])
+ ;;
+ (define_insn "mve_vqabsq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VQABSQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqabst.s%#<V_sz_elem>\t%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqdmlahq_n_s, vqdmlahq_n_u])
+ ;;
+ (define_insn "mve_vqdmlahq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")]
+ 	 VQDMLAHQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqdmlah.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqnegq_m_s])
+ ;;
+ (define_insn "mve_vqnegq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VQNEGQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqnegt.s%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrdmladhq_s])
+ ;;
+ (define_insn "mve_vqrdmladhq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")]
+ 	 VQRDMLADHQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrdmladh.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqrdmladhxq_s])
+ ;;
+ (define_insn "mve_vqrdmladhxq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")]
+ 	 VQRDMLADHXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrdmladhx.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqrdmlahq_n_s, vqrdmlahq_n_u])
+ ;;
+ (define_insn "mve_vqrdmlahq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")]
+ 	 VQRDMLAHQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrdmlah.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqrdmlashq_n_s, vqrdmlashq_n_u])
+ ;;
+ (define_insn "mve_vqrdmlashq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")]
+ 	 VQRDMLASHQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrdmlash.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqrdmlsdhq_s])
+ ;;
+ (define_insn "mve_vqrdmlsdhq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")]
+ 	 VQRDMLSDHQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrdmlsdh.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqrdmlsdhxq_s])
+ ;;
+ (define_insn "mve_vqrdmlsdhxq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")]
+ 	 VQRDMLSDHXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrdmlsdhx.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqrshlq_m_n_s, vqrshlq_m_n_u])
+ ;;
+ (define_insn "mve_vqrshlq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:SI 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VQRSHLQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrshlt.<supf>%#<V_sz_elem>	%q0, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqshlq_m_r_u, vqshlq_m_r_s])
+ ;;
+ (define_insn "mve_vqshlq_m_r_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:SI 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VQSHLQ_M_R))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqshlt.<supf>%#<V_sz_elem>\t%q0, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrev64q_m_u, vrev64q_m_s])
+ ;;
+ (define_insn "mve_vrev64q_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VREV64Q_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrev64t.%#<V_sz_elem>\t%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrshlq_m_n_s, vrshlq_m_n_u])
+ ;;
+ (define_insn "mve_vrshlq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:SI 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VRSHLQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrshlt.<supf>%#<V_sz_elem>\t%q0, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vshlq_m_r_u, vshlq_m_r_s])
+ ;;
+ (define_insn "mve_vshlq_m_r_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:SI 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSHLQ_M_R))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vshlt.<supf>%#<V_sz_elem>\t%q0, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vsliq_n_u, vsliq_n_s])
+ ;;
+ (define_insn "mve_vsliq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred>" "<MVE_constraint>")]
+ 	 VSLIQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vsli.%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vsriq_n_u, vsriq_n_s])
+ ;;
+ (define_insn "mve_vsriq_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "mve_imm_selective_upto_8" "Rg")]
+ 	 VSRIQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vsri.%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqdmlsdhxq_s])
+ ;;
+ (define_insn "mve_vqdmlsdhxq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")]
+ 	 VQDMLSDHXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqdmlsdhx.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqdmlsdhq_s])
+ ;;
+ (define_insn "mve_vqdmlsdhq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")]
+ 	 VQDMLSDHQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqdmlsdh.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqdmladhxq_s])
+ ;;
+ (define_insn "mve_vqdmladhxq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")]
+ 	 VQDMLADHXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqdmladhx.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqdmladhq_s])
+ ;;
+ (define_insn "mve_vqdmladhq_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")]
+ 	 VQDMLADHQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqdmladh.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlsdavaxq_s])
+ ;;
+ (define_insn "mve_vmlsdavaxq_s<mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:SI 1 "s_register_operand" "0")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 3 "s_register_operand" "w")]
+ 	 VMLSDAVAXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmlsdavax.s%#<V_sz_elem>\t%0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlsdavaq_s])
+ ;;
+ (define_insn "mve_vmlsdavaq_s<mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:SI 1 "s_register_operand" "0")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 3 "s_register_operand" "w")]
+ 	 VMLSDAVAQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmlsdava.s%#<V_sz_elem>\t%0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmladavaxq_s])
+ ;;
+ (define_insn "mve_vmladavaxq_s<mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:SI 1 "s_register_operand" "0")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 3 "s_register_operand" "w")]
+ 	 VMLADAVAXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmladavax.s%#<V_sz_elem>\t%0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ ;;
+ ;; [vabsq_m_f])
+ ;;
+ (define_insn "mve_vabsq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VABSQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vabst.f%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vaddlvaq_p_s vaddlvaq_p_u])
+ ;;
+ (define_insn "mve_vaddlvaq_p_<supf>v4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VADDLVAQ_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vaddlvat.<supf>32 %Q0, %R0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vcmlaq_f])
+ ;;
+ (define_insn "mve_vcmlaq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")]
+ 	 VCMLAQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmla.f%#<V_sz_elem>	%q0, %q2, %q3, #0"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmlaq_rot180_f])
+ ;;
+ (define_insn "mve_vcmlaq_rot180_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")]
+ 	 VCMLAQ_ROT180_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmla.f%#<V_sz_elem>	%q0, %q2, %q3, #180"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmlaq_rot270_f])
+ ;;
+ (define_insn "mve_vcmlaq_rot270_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")]
+ 	 VCMLAQ_ROT270_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmla.f%#<V_sz_elem>	%q0, %q2, %q3, #270"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmlaq_rot90_f])
+ ;;
+ (define_insn "mve_vcmlaq_rot90_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")]
+ 	 VCMLAQ_ROT90_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vcmla.f%#<V_sz_elem>	%q0, %q2, %q3, #90"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcmpeqq_m_n_f])
+ ;;
+ (define_insn "mve_vcmpeqq_m_n_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPEQQ_M_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmpt.f%#<V_sz_elem>	eq, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpgeq_m_f])
+ ;;
+ (define_insn "mve_vcmpgeq_m_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPGEQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmpt.f%#<V_sz_elem>	ge, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpgeq_m_n_f])
+ ;;
+ (define_insn "mve_vcmpgeq_m_n_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPGEQ_M_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmpt.f%#<V_sz_elem>	ge, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpgtq_m_f])
+ ;;
+ (define_insn "mve_vcmpgtq_m_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPGTQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmpt.f%#<V_sz_elem>	gt, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpgtq_m_n_f])
+ ;;
+ (define_insn "mve_vcmpgtq_m_n_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPGTQ_M_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmpt.f%#<V_sz_elem>	gt, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpleq_m_f])
+ ;;
+ (define_insn "mve_vcmpleq_m_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPLEQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmpt.f%#<V_sz_elem>	le, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpleq_m_n_f])
+ ;;
+ (define_insn "mve_vcmpleq_m_n_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPLEQ_M_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmpt.f%#<V_sz_elem>	le, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpltq_m_f])
+ ;;
+ (define_insn "mve_vcmpltq_m_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPLTQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmpt.f%#<V_sz_elem>	lt, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpltq_m_n_f])
+ ;;
+ (define_insn "mve_vcmpltq_m_n_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPLTQ_M_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmpt.f%#<V_sz_elem>	lt, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpneq_m_f])
+ ;;
+ (define_insn "mve_vcmpneq_m_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPNEQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmpt.f%#<V_sz_elem>	ne, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmpneq_m_n_f])
+ ;;
+ (define_insn "mve_vcmpneq_m_n_f<mode>"
+   [
+    (set (match_operand:HI 0 "vpr_register_operand" "=Up")
+ 	(unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCMPNEQ_M_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmpt.f%#<V_sz_elem>	ne, %q1, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcvtbq_m_f16_f32])
+ ;;
+ (define_insn "mve_vcvtbq_m_f16_f32v8hf"
+   [
+    (set (match_operand:V8HF 0 "s_register_operand" "=w")
+ 	(unspec:V8HF [(match_operand:V8HF 1 "s_register_operand" "0")
+ 		       (match_operand:V4SF 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCVTBQ_M_F16_F32))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcvtbt.f16.f32 %q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcvtbq_m_f32_f16])
+ ;;
+ (define_insn "mve_vcvtbq_m_f32_f16v4sf"
+   [
+    (set (match_operand:V4SF 0 "s_register_operand" "=w")
+ 	(unspec:V4SF [(match_operand:V4SF 1 "s_register_operand" "0")
+ 		       (match_operand:V8HF 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCVTBQ_M_F32_F16))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcvtbt.f32.f16 %q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcvttq_m_f16_f32])
+ ;;
+ (define_insn "mve_vcvttq_m_f16_f32v8hf"
+   [
+    (set (match_operand:V8HF 0 "s_register_operand" "=w")
+ 	(unspec:V8HF [(match_operand:V8HF 1 "s_register_operand" "0")
+ 		       (match_operand:V4SF 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCVTTQ_M_F16_F32))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcvttt.f16.f32 %q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcvttq_m_f32_f16])
+ ;;
+ (define_insn "mve_vcvttq_m_f32_f16v4sf"
+   [
+    (set (match_operand:V4SF 0 "s_register_operand" "=w")
+ 	(unspec:V4SF [(match_operand:V4SF 1 "s_register_operand" "0")
+ 		       (match_operand:V8HF 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCVTTQ_M_F32_F16))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcvttt.f32.f16 %q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vdupq_m_n_f])
+ ;;
+ (define_insn "mve_vdupq_m_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:<V_elem> 2 "s_register_operand" "r")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VDUPQ_M_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vdupt.%#<V_sz_elem>	%q0, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vfmaq_f])
+ ;;
+ (define_insn "mve_vfmaq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")]
+ 	 VFMAQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vfma.f%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vfmaq_n_f])
+ ;;
+ (define_insn "mve_vfmaq_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")]
+ 	 VFMAQ_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vfma.f%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vfmasq_n_f])
+ ;;
+ (define_insn "mve_vfmasq_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")]
+ 	 VFMASQ_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vfmas.f%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ ;;
+ ;; [vfmsq_f])
+ ;;
+ (define_insn "mve_vfmsq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")]
+ 	 VFMSQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vfms.f%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmaxnmaq_m_f])
+ ;;
+ (define_insn "mve_vmaxnmaq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMAXNMAQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vmaxnmat.f%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vmaxnmavq_p_f])
+ ;;
+ (define_insn "mve_vmaxnmavq_p_f<mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMAXNMAVQ_P_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vmaxnmavt.f%#<V_sz_elem>	%0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmaxnmvq_p_f])
+ ;;
+ (define_insn "mve_vmaxnmvq_p_f<mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMAXNMVQ_P_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vmaxnmvt.f%#<V_sz_elem>	%0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vminnmaq_m_f])
+ ;;
+ (define_insn "mve_vminnmaq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMINNMAQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vminnmat.f%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vminnmavq_p_f])
+ ;;
+ (define_insn "mve_vminnmavq_p_f<mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMINNMAVQ_P_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vminnmavt.f%#<V_sz_elem>	%0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vminnmvq_p_f])
+ ;;
+ (define_insn "mve_vminnmvq_p_f<mode>"
+   [
+    (set (match_operand:<V_elem> 0 "s_register_operand" "=r")
+ 	(unspec:<V_elem> [(match_operand:<V_elem> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMINNMVQ_P_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vminnmvt.f%#<V_sz_elem>	%0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmlaldavaq_s, vmlaldavaq_u])
+ ;;
+ (define_insn "mve_vmlaldavaq_<supf><mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 3 "s_register_operand" "w")]
+ 	 VMLALDAVAQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmlaldava.<supf>%#<V_sz_elem> %Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlaldavaxq_s])
+ ;;
+ (define_insn "mve_vmlaldavaxq_s<mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 3 "s_register_operand" "w")]
+ 	 VMLALDAVAXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmlaldavax.s%#<V_sz_elem> %Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlaldavq_p_u, vmlaldavq_p_s])
+ ;;
+ (define_insn "mve_vmlaldavq_p_<supf><mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:MVE_5 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMLALDAVQ_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlaldavt.<supf>%#<V_sz_elem> %Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmlaldavxq_p_s])
+ ;;
+ (define_insn "mve_vmlaldavxq_p_s<mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:MVE_5 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMLALDAVXQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlaldavxt.s%#<V_sz_elem>\t%Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vmlsldavaq_s])
+ ;;
+ (define_insn "mve_vmlsldavaq_s<mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 3 "s_register_operand" "w")]
+ 	 VMLSLDAVAQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmlsldava.s%#<V_sz_elem> %Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlsldavaxq_s])
+ ;;
+ (define_insn "mve_vmlsldavaxq_s<mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 3 "s_register_operand" "w")]
+ 	 VMLSLDAVAXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vmlsldavax.s%#<V_sz_elem> %Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vmlsldavq_p_s])
+ ;;
+ (define_insn "mve_vmlsldavq_p_s<mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:MVE_5 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMLSLDAVQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlsldavt.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmlsldavxq_p_s])
+ ;;
+ (define_insn "mve_vmlsldavxq_p_s<mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:MVE_5 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMLSLDAVXQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlsldavxt.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vmovlbq_m_u, vmovlbq_m_s])
+ ;;
+ (define_insn "mve_vmovlbq_m_<supf><mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
+ 	(unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_3 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMOVLBQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmovlbt.<supf>%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vmovltq_m_u, vmovltq_m_s])
+ ;;
+ (define_insn "mve_vmovltq_m_<supf><mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
+ 	(unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_3 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMOVLTQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmovltt.<supf>%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vmovnbq_m_u, vmovnbq_m_s])
+ ;;
+ (define_insn "mve_vmovnbq_m_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMOVNBQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmovnbt.i%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmovntq_m_u, vmovntq_m_s])
+ ;;
+ (define_insn "mve_vmovntq_m_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMOVNTQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmovntt.i%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmvnq_m_n_u, vmvnq_m_n_s])
+ ;;
+ (define_insn "mve_vmvnq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:MVE_5 1 "s_register_operand" "0")
+ 		       (match_operand:SI 2 "immediate_operand" "i")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VMVNQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmvnt.i%#<V_sz_elem>	%q0, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vnegq_m_f])
+ ;;
+ (define_insn "mve_vnegq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VNEGQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vnegt.f%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vorrq_m_n_s, vorrq_m_n_u])
+ ;;
+ (define_insn "mve_vorrq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:MVE_5 1 "s_register_operand" "0")
+ 		       (match_operand:SI 2 "immediate_operand" "i")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VORRQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vorrt.i%#<V_sz_elem>	%q0, %2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vpselq_f])
+ ;;
+ (define_insn "mve_vpselq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VPSELQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpsel %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqmovnbq_m_s, vqmovnbq_m_u])
+ ;;
+ (define_insn "mve_vqmovnbq_m_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VQMOVNBQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqmovnbt.<supf>%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqmovntq_m_u, vqmovntq_m_s])
+ ;;
+ (define_insn "mve_vqmovntq_m_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VQMOVNTQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqmovntt.<supf>%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqmovunbq_m_s])
+ ;;
+ (define_insn "mve_vqmovunbq_m_s<mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VQMOVUNBQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqmovunbt.s%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqmovuntq_m_s])
+ ;;
+ (define_insn "mve_vqmovuntq_m_s<mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VQMOVUNTQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqmovuntt.s%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrshrntq_n_u, vqrshrntq_n_s])
+ ;;
+ (define_insn "mve_vqrshrntq_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "mve_imm_8" "Rb")]
+ 	 VQRSHRNTQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrshrnt.<supf>%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqrshruntq_n_s])
+ ;;
+ (define_insn "mve_vqrshruntq_n_s<mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "mve_imm_8" "Rb")]
+ 	 VQRSHRUNTQ_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqrshrunt.s%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqshrnbq_n_u, vqshrnbq_n_s])
+ ;;
+ (define_insn "mve_vqshrnbq_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred3>" "<MVE_constraint3>")]
+ 	 VQSHRNBQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqshrnb.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqshrntq_n_u, vqshrntq_n_s])
+ ;;
+ (define_insn "mve_vqshrntq_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred3>" "<MVE_constraint3>")]
+ 	 VQSHRNTQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqshrnt.<supf>%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqshrunbq_n_s])
+ ;;
+ (define_insn "mve_vqshrunbq_n_s<mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred3>" "<MVE_constraint3>")]
+ 	 VQSHRUNBQ_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqshrunb.s%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqshruntq_n_s])
+ ;;
+ (define_insn "mve_vqshruntq_n_s<mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred3>" "<MVE_constraint3>")]
+ 	 VQSHRUNTQ_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vqshrunt.s%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrev32q_m_f])
+ ;;
+ (define_insn "mve_vrev32q_m_fv8hf"
+   [
+    (set (match_operand:V8HF 0 "s_register_operand" "=w")
+ 	(unspec:V8HF [(match_operand:V8HF 1 "s_register_operand" "0")
+ 		       (match_operand:V8HF 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VREV32Q_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vrev32t.16 %q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrev32q_m_s, vrev32q_m_u])
+ ;;
+ (define_insn "mve_vrev32q_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_3 0 "s_register_operand" "=w")
+ 	(unspec:MVE_3 [(match_operand:MVE_3 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_3 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VREV32Q_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrev32t.%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrev64q_m_f])
+ ;;
+ (define_insn "mve_vrev64q_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VREV64Q_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vrev64t.%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrmlaldavhaxq_s])
+ ;;
+ (define_insn "mve_vrmlaldavhaxq_sv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")
+ 		       (match_operand:V4SI 3 "s_register_operand" "w")]
+ 	 VRMLALDAVHAXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrmlaldavhax.s32 %Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrmlaldavhxq_p_s])
+ ;;
+ (define_insn "mve_vrmlaldavhxq_p_sv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VRMLALDAVHXQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrmlaldavhxt.s32 %Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrmlsldavhaxq_s])
+ ;;
+ (define_insn "mve_vrmlsldavhaxq_sv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")
+ 		       (match_operand:V4SI 3 "s_register_operand" "w")]
+ 	 VRMLSLDAVHAXQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrmlsldavhax.s32 %Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrmlsldavhq_p_s])
+ ;;
+ (define_insn "mve_vrmlsldavhq_p_sv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VRMLSLDAVHQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrmlsldavht.s32 %Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrmlsldavhxq_p_s])
+ ;;
+ (define_insn "mve_vrmlsldavhxq_p_sv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VRMLSLDAVHXQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrmlsldavhxt.s32 %Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrndaq_m_f])
+ ;;
+ (define_insn "mve_vrndaq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VRNDAQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vrintat.f%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrndmq_m_f])
+ ;;
+ (define_insn "mve_vrndmq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VRNDMQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vrintmt.f%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrndnq_m_f])
+ ;;
+ (define_insn "mve_vrndnq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VRNDNQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vrintnt.f%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrndpq_m_f])
+ ;;
+ (define_insn "mve_vrndpq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VRNDPQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vrintpt.f%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrndxq_m_f])
+ ;;
+ (define_insn "mve_vrndxq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VRNDXQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vrintxt.f%#<V_sz_elem>	%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrshrnbq_n_s, vrshrnbq_n_u])
+ ;;
+ (define_insn "mve_vrshrnbq_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "mve_imm_8" "Rb")]
+ 	 VRSHRNBQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrshrnb.i%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vrshrntq_n_u, vrshrntq_n_s])
+ ;;
+ (define_insn "mve_vrshrntq_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "mve_imm_8" "Rb")]
+ 	 VRSHRNTQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrshrnt.i%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vshrnbq_n_u, vshrnbq_n_s])
+ ;;
+ (define_insn "mve_vshrnbq_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred3>" "<MVE_constraint3>")]
+ 	 VSHRNBQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vshrnb.i%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vshrntq_n_s, vshrntq_n_u])
+ ;;
+ (define_insn "mve_vshrntq_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 				 (match_operand:MVE_5 2 "s_register_operand" "w")
+ 				 (match_operand:SI 3 "<MVE_pred3>" "<MVE_constraint3>")]
+ 	 VSHRNTQ_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vshrnt.i%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vcvtmq_m_s, vcvtmq_m_u])
+ ;;
+ (define_insn "mve_vcvtmq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:MVE_5 1 "s_register_operand" "0")
+ 		       (match_operand:<MVE_CNVT> 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCVTMQ_M))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcvtmt.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcvtpq_m_u, vcvtpq_m_s])
+ ;;
+ (define_insn "mve_vcvtpq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:MVE_5 1 "s_register_operand" "0")
+ 		       (match_operand:<MVE_CNVT> 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCVTPQ_M))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcvtpt.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcvtnq_m_s, vcvtnq_m_u])
+ ;;
+ (define_insn "mve_vcvtnq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:MVE_5 1 "s_register_operand" "0")
+ 		       (match_operand:<MVE_CNVT> 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCVTNQ_M))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcvtnt.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcvtq_m_n_from_f_s, vcvtq_m_n_from_f_u])
+ ;;
+ (define_insn "mve_vcvtq_m_n_from_f_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:MVE_5 1 "s_register_operand" "0")
+ 		       (match_operand:<MVE_CNVT> 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred2>" "<MVE_constraint2>")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCVTQ_M_N_FROM_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcvtt.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrev16q_m_u, vrev16q_m_s])
+ ;;
+ (define_insn "mve_vrev16q_m_<supf>v16qi"
+   [
+    (set (match_operand:V16QI 0 "s_register_operand" "=w")
+ 	(unspec:V16QI [(match_operand:V16QI 1 "s_register_operand" "0")
+ 		       (match_operand:V16QI 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VREV16Q_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrev16t.8 %q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcvtq_m_from_f_u, vcvtq_m_from_f_s])
+ ;;
+ (define_insn "mve_vcvtq_m_from_f_<supf><mode>"
+   [
+    (set (match_operand:MVE_5 0 "s_register_operand" "=w")
+ 	(unspec:MVE_5 [(match_operand:MVE_5 1 "s_register_operand" "0")
+ 		       (match_operand:<MVE_CNVT> 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VCVTQ_M_FROM_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcvtt.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrmlaldavhq_p_u vrmlaldavhq_p_s])
+ ;;
+ (define_insn "mve_vrmlaldavhq_p_<supf>v4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		    (match_operand:V4SI 2 "s_register_operand" "w")
+ 		    (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VRMLALDAVHQ_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrmlaldavht.<supf>32 %Q0, %R0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrmlsldavhaq_s])
+ ;;
+ (define_insn "mve_vrmlsldavhaq_sv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		    (match_operand:V4SI 2 "s_register_operand" "w")
+ 		    (match_operand:V4SI 3 "s_register_operand" "w")]
+ 	 VRMLSLDAVHAQ_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vrmlsldavha.s32 %Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vabavq_p_s, vabavq_p_u])
+ ;;
+ (define_insn "mve_vabavq_p_<supf><mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(unspec:SI [(match_operand:SI 1 "s_register_operand" "0")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		    (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VABAVQ_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vabavt.<supf>%#<V_sz_elem>\t%0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vqshluq_m_n_s])
+ ;;
+ (define_insn "mve_vqshluq_m_n_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "mve_imm_7" "Ra")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQSHLUQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\n\tvqshlut.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")])
+ 
+ ;;
+ ;; [vshlq_m_s, vshlq_m_u])
+ ;;
+ (define_insn "mve_vshlq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSHLQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vshlt.<supf>%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")])
+ 
+ ;;
+ ;; [vsriq_m_n_s, vsriq_m_n_u])
+ ;;
+ (define_insn "mve_vsriq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "mve_imm_selective_upto_8" "Rg")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSRIQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vsrit.%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")])
+ 
+ ;;
+ ;; [vsubq_m_u, vsubq_m_s])
+ ;;
+ (define_insn "mve_vsubq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSUBQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vsubt.i%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")])
+ 
+ ;;
+ ;; [vcvtq_m_n_to_f_u, vcvtq_m_n_to_f_s])
+ ;;
+ (define_insn "mve_vcvtq_m_n_to_f_<supf><mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:<MVE_CNVT> 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred2>" "<MVE_constraint2>")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCVTQ_M_N_TO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcvtt.f%#<V_sz_elem>.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vabdq_m_s, vabdq_m_u])
+ ;;
+ (define_insn "mve_vabdq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VABDQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vabdt.<supf>%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vaddq_m_n_s, vaddq_m_n_u])
+ ;;
+ (define_insn "mve_vaddq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VADDQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vaddt.i%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vaddq_m_u, vaddq_m_s])
+ ;;
+ (define_insn "mve_vaddq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VADDQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vaddt.i%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vandq_m_u, vandq_m_s])
+ ;;
+ (define_insn "mve_vandq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VANDQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vandt %q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vbicq_m_u, vbicq_m_s])
+ ;;
+ (define_insn "mve_vbicq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VBICQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vbict %q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vbrsrq_m_n_u, vbrsrq_m_n_s])
+ ;;
+ (define_insn "mve_vbrsrq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VBRSRQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vbrsrt.%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcaddq_rot270_m_u, vcaddq_rot270_m_s])
+ ;;
+ (define_insn "mve_vcaddq_rot270_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCADDQ_ROT270_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcaddt.i%#<V_sz_elem>	%q0, %q2, %q3, #270"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcaddq_rot90_m_u, vcaddq_rot90_m_s])
+ ;;
+ (define_insn "mve_vcaddq_rot90_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCADDQ_ROT90_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vcaddt.i%#<V_sz_elem>	%q0, %q2, %q3, #90"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [veorq_m_s, veorq_m_u])
+ ;;
+ (define_insn "mve_veorq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VEORQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;veort %q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vhaddq_m_n_s, vhaddq_m_n_u])
+ ;;
+ (define_insn "mve_vhaddq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VHADDQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vhaddt.<supf>%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vhaddq_m_s, vhaddq_m_u])
+ ;;
+ (define_insn "mve_vhaddq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VHADDQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vhaddt.<supf>%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vhsubq_m_n_s, vhsubq_m_n_u])
+ ;;
+ (define_insn "mve_vhsubq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VHSUBQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vhsubt.<supf>%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vhsubq_m_s, vhsubq_m_u])
+ ;;
+ (define_insn "mve_vhsubq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VHSUBQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vhsubt.<supf>%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmaxq_m_s, vmaxq_m_u])
+ ;;
+ (define_insn "mve_vmaxq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMAXQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmaxt.<supf>%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vminq_m_s, vminq_m_u])
+ ;;
+ (define_insn "mve_vminq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMINQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmint.<supf>%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmladavaq_p_u, vmladavaq_p_s])
+ ;;
+ (define_insn "mve_vmladavaq_p_<supf><mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:SI 1 "s_register_operand" "0")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		    (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMLADAVAQ_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmladavat.<supf>%#<V_sz_elem>	%0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmlaq_m_n_s, vmlaq_m_n_u])
+ ;;
+ (define_insn "mve_vmlaq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMLAQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlat.<supf>%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmlasq_m_n_u, vmlasq_m_n_s])
+ ;;
+ (define_insn "mve_vmlasq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMLASQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlast.<supf>%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmulhq_m_s, vmulhq_m_u])
+ ;;
+ (define_insn "mve_vmulhq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMULHQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmulht.<supf>%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmullbq_int_m_u, vmullbq_int_m_s])
+ ;;
+ (define_insn "mve_vmullbq_int_m_<supf><mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
+ 				  (match_operand:MVE_2 2 "s_register_operand" "w")
+ 				  (match_operand:MVE_2 3 "s_register_operand" "w")
+ 				  (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMULLBQ_INT_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmullbt.<supf>%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmulltq_int_m_s, vmulltq_int_m_u])
+ ;;
+ (define_insn "mve_vmulltq_int_m_<supf><mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
+ 				  (match_operand:MVE_2 2 "s_register_operand" "w")
+ 				  (match_operand:MVE_2 3 "s_register_operand" "w")
+ 				  (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMULLTQ_INT_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmulltt.<supf>%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmulq_m_n_u, vmulq_m_n_s])
+ ;;
+ (define_insn "mve_vmulq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMULQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmult.i%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmulq_m_s, vmulq_m_u])
+ ;;
+ (define_insn "mve_vmulq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMULQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmult.i%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vornq_m_u, vornq_m_s])
+ ;;
+ (define_insn "mve_vornq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VORNQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vornt %q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vorrq_m_s, vorrq_m_u])
+ ;;
+ (define_insn "mve_vorrq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VORRQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vorrt %q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqaddq_m_n_u, vqaddq_m_n_s])
+ ;;
+ (define_insn "mve_vqaddq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQADDQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqaddt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqaddq_m_u, vqaddq_m_s])
+ ;;
+ (define_insn "mve_vqaddq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQADDQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqaddt.<supf>%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqdmlahq_m_n_s])
+ ;;
+ (define_insn "mve_vqdmlahq_m_n_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQDMLAHQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqdmlaht.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrdmlahq_m_n_s])
+ ;;
+ (define_insn "mve_vqrdmlahq_m_n_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQRDMLAHQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrdmlaht.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrdmlashq_m_n_s])
+ ;;
+ (define_insn "mve_vqrdmlashq_m_n_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQRDMLASHQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrdmlasht.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrshlq_m_u, vqrshlq_m_s])
+ ;;
+ (define_insn "mve_vqrshlq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQRSHLQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrshlt.<supf>%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqshlq_m_n_s, vqshlq_m_n_u])
+ ;;
+ (define_insn "mve_vqshlq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "immediate_operand" "i")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQSHLQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqshlt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqshlq_m_u, vqshlq_m_s])
+ ;;
+ (define_insn "mve_vqshlq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQSHLQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqshlt.<supf>%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqsubq_m_n_u, vqsubq_m_n_s])
+ ;;
+ (define_insn "mve_vqsubq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQSUBQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqsubt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqsubq_m_u, vqsubq_m_s])
+ ;;
+ (define_insn "mve_vqsubq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQSUBQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqsubt.<supf>%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrhaddq_m_u, vrhaddq_m_s])
+ ;;
+ (define_insn "mve_vrhaddq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VRHADDQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrhaddt.<supf>%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrmulhq_m_u, vrmulhq_m_s])
+ ;;
+ (define_insn "mve_vrmulhq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VRMULHQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrmulht.<supf>%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrshlq_m_s, vrshlq_m_u])
+ ;;
+ (define_insn "mve_vrshlq_m_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VRSHLQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrshlt.<supf>%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrshrq_m_n_s, vrshrq_m_n_u])
+ ;;
+ (define_insn "mve_vrshrq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred2>" "<MVE_constraint2>")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VRSHRQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrshrt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vshlq_m_n_s, vshlq_m_n_u])
+ ;;
+ (define_insn "mve_vshlq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "immediate_operand" "i")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSHLQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vshlt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vshrq_m_n_s, vshrq_m_n_u])
+ ;;
+ (define_insn "mve_vshrq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred2>" "<MVE_constraint2>")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSHRQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vshrt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vsliq_m_n_u, vsliq_m_n_s])
+ ;;
+ (define_insn "mve_vsliq_m_n_<supf><mode>"
+    [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+        (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred>" "<MVE_constraint>")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSLIQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vslit.%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vsubq_m_n_s, vsubq_m_n_u])
+ ;;
+ (define_insn "mve_vsubq_m_n_<supf><mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSUBQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vsubt.i%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vhcaddq_rot270_m_s])
+ ;;
+ (define_insn "mve_vhcaddq_rot270_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VHCADDQ_ROT270_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vhcaddt.s%#<V_sz_elem>\t%q0, %q2, %q3, #270"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vhcaddq_rot90_m_s])
+ ;;
+ (define_insn "mve_vhcaddq_rot90_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VHCADDQ_ROT90_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vhcaddt.s%#<V_sz_elem>\t%q0, %q2, %q3, #90"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmladavaxq_p_s])
+ ;;
+ (define_insn "mve_vmladavaxq_p_s<mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:SI 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMLADAVAXQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmladavaxt.s%#<V_sz_elem>\t%0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmlsdavaq_p_s])
+ ;;
+ (define_insn "mve_vmlsdavaq_p_s<mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:SI 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMLSDAVAQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlsdavat.s%#<V_sz_elem>\t%0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmlsdavaxq_p_s])
+ ;;
+ (define_insn "mve_vmlsdavaxq_p_s<mode>"
+   [
+    (set (match_operand:SI 0 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_operand:SI 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMLSDAVAXQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlsdavaxt.s%#<V_sz_elem>\t%0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqdmladhq_m_s])
+ ;;
+ (define_insn "mve_vqdmladhq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQDMLADHQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqdmladht.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqdmladhxq_m_s])
+ ;;
+ (define_insn "mve_vqdmladhxq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQDMLADHXQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqdmladhxt.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqdmlsdhq_m_s])
+ ;;
+ (define_insn "mve_vqdmlsdhq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQDMLSDHQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqdmlsdht.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqdmlsdhxq_m_s])
+ ;;
+ (define_insn "mve_vqdmlsdhxq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQDMLSDHXQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqdmlsdhxt.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqdmulhq_m_n_s])
+ ;;
+ (define_insn "mve_vqdmulhq_m_n_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQDMULHQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqdmulht.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqdmulhq_m_s])
+ ;;
+ (define_insn "mve_vqdmulhq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQDMULHQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqdmulht.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrdmladhq_m_s])
+ ;;
+ (define_insn "mve_vqrdmladhq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQRDMLADHQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrdmladht.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrdmladhxq_m_s])
+ ;;
+ (define_insn "mve_vqrdmladhxq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQRDMLADHXQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrdmladhxt.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrdmlsdhq_m_s])
+ ;;
+ (define_insn "mve_vqrdmlsdhq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQRDMLSDHQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrdmlsdht.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrdmlsdhxq_m_s])
+ ;;
+ (define_insn "mve_vqrdmlsdhxq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQRDMLSDHXQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrdmlsdhxt.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrdmulhq_m_n_s])
+ ;;
+ (define_insn "mve_vqrdmulhq_m_n_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQRDMULHQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrdmulht.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrdmulhq_m_s])
+ ;;
+ (define_insn "mve_vqrdmulhq_m_s<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_2 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQRDMULHQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrdmulht.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmlaldavaq_p_u, vmlaldavaq_p_s])
+ ;;
+ (define_insn "mve_vmlaldavaq_p_<supf><mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMLALDAVAQ_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlaldavat.<supf>%#<V_sz_elem>	%Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmlaldavaxq_p_u, vmlaldavaxq_p_s])
+ ;;
+ (define_insn "mve_vmlaldavaxq_p_<supf><mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMLALDAVAXQ_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlaldavaxt.<supf>%#<V_sz_elem> %Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrshrnbq_m_n_u, vqrshrnbq_m_n_s])
+ ;;
+ (define_insn "mve_vqrshrnbq_m_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "mve_imm_8" "Rb")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQRSHRNBQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrshrnbt.<supf>%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrshrntq_m_n_s, vqrshrntq_m_n_u])
+ ;;
+ (define_insn "mve_vqrshrntq_m_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "mve_imm_8" "Rb")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQRSHRNTQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrshrntt.<supf>%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqshrnbq_m_n_u, vqshrnbq_m_n_s])
+ ;;
+ (define_insn "mve_vqshrnbq_m_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred3>" "<MVE_constraint3>")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQSHRNBQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\n\tvqshrnbt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqshrntq_m_n_s, vqshrntq_m_n_u])
+ ;;
+ (define_insn "mve_vqshrntq_m_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred3>" "<MVE_constraint3>")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQSHRNTQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqshrntt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrmlaldavhaq_p_s])
+ ;;
+ (define_insn "mve_vrmlaldavhaq_p_sv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")
+ 		       (match_operand:V4SI 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VRMLALDAVHAQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrmlaldavhat.s32\t%Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrshrnbq_m_n_u, vrshrnbq_m_n_s])
+ ;;
+ (define_insn "mve_vrshrnbq_m_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "mve_imm_8" "Rb")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VRSHRNBQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrshrnbt.i%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrshrntq_m_n_u, vrshrntq_m_n_s])
+ ;;
+ (define_insn "mve_vrshrntq_m_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "mve_imm_8" "Rb")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VRSHRNTQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrshrntt.i%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vshllbq_m_n_u, vshllbq_m_n_s])
+ ;;
+ (define_insn "mve_vshllbq_m_n_<supf><mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
+ 	(unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_3 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "immediate_operand" "i")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSHLLBQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vshllbt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vshlltq_m_n_u, vshlltq_m_n_s])
+ ;;
+ (define_insn "mve_vshlltq_m_n_<supf><mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
+ 	(unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_3 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "immediate_operand" "i")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSHLLTQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vshlltt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vshrnbq_m_n_s, vshrnbq_m_n_u])
+ ;;
+ (define_insn "mve_vshrnbq_m_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred3>" "<MVE_constraint3>")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSHRNBQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vshrnbt.i%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vshrntq_m_n_s, vshrntq_m_n_u])
+ ;;
+ (define_insn "mve_vshrntq_m_n_<supf><mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred3>" "<MVE_constraint3>")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSHRNTQ_M_N))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vshrntt.i%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmlsldavaq_p_s])
+ ;;
+ (define_insn "mve_vmlsldavaq_p_s<mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMLSLDAVAQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlsldavat.s%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmlsldavaxq_p_s])
+ ;;
+ (define_insn "mve_vmlsldavaxq_p_s<mode>"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMLSLDAVAXQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmlsldavaxt.s%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmullbq_poly_m_p])
+ ;;
+ (define_insn "mve_vmullbq_poly_m_p<mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
+ 	(unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_3 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_3 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMULLBQ_POLY_M_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmullbt.p%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmulltq_poly_m_p])
+ ;;
+ (define_insn "mve_vmulltq_poly_m_p<mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
+ 	(unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_3 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_3 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMULLTQ_POLY_M_P))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vmulltt.p%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqdmullbq_m_n_s])
+ ;;
+ (define_insn "mve_vqdmullbq_m_n_s<mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQDMULLBQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqdmullbt.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqdmullbq_m_s])
+ ;;
+ (define_insn "mve_vqdmullbq_m_s<mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQDMULLBQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqdmullbt.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqdmulltq_m_n_s])
+ ;;
+ (define_insn "mve_vqdmulltq_m_n_s<mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQDMULLTQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqdmulltt.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqdmulltq_m_s])
+ ;;
+ (define_insn "mve_vqdmulltq_m_s<mode>"
+   [
+    (set (match_operand:<V_double_width> 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_5 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQDMULLTQ_M_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqdmulltt.s%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrshrunbq_m_n_s])
+ ;;
+ (define_insn "mve_vqrshrunbq_m_n_s<mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "mve_imm_8" "Rb")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQRSHRUNBQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrshrunbt.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqrshruntq_m_n_s])
+ ;;
+ (define_insn "mve_vqrshruntq_m_n_s<mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred3>" "<MVE_constraint3>")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQRSHRUNTQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqrshruntt.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqshrunbq_m_n_s])
+ ;;
+ (define_insn "mve_vqshrunbq_m_n_s<mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred3>" "<MVE_constraint3>")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQSHRUNBQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqshrunbt.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vqshruntq_m_n_s])
+ ;;
+ (define_insn "mve_vqshruntq_m_n_s<mode>"
+   [
+    (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
+ 	(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_5 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "<MVE_pred3>" "<MVE_constraint3>")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VQSHRUNTQ_M_N_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vqshruntt.s%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrmlaldavhaq_p_u])
+ ;;
+ (define_insn "mve_vrmlaldavhaq_p_uv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")
+ 		       (match_operand:V4SI 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VRMLALDAVHAQ_P_U))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrmlaldavhat.u32\t%Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrmlaldavhaxq_p_s])
+ ;;
+ (define_insn "mve_vrmlaldavhaxq_p_sv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")
+ 		       (match_operand:V4SI 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VRMLALDAVHAXQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrmlaldavhaxt.s32\t%Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrmlsldavhaq_p_s])
+ ;;
+ (define_insn "mve_vrmlsldavhaq_p_sv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")
+ 		       (match_operand:V4SI 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VRMLSLDAVHAQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrmlsldavhat.s32\t%Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vrmlsldavhaxq_p_s])
+ ;;
+ (define_insn "mve_vrmlsldavhaxq_p_sv4si"
+   [
+    (set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")
+ 		       (match_operand:V4SI 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VRMLSLDAVHAXQ_P_S))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vrmlsldavhaxt.s32\t%Q0, %R0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ ;;
+ ;; [vabdq_m_f])
+ ;;
+ (define_insn "mve_vabdq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VABDQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vabdt.f%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vaddq_m_f])
+ ;;
+ (define_insn "mve_vaddq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VADDQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vaddt.f%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vaddq_m_n_f])
+ ;;
+ (define_insn "mve_vaddq_m_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VADDQ_M_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vaddt.f%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vandq_m_f])
+ ;;
+ (define_insn "mve_vandq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VANDQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vandt %q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vbicq_m_f])
+ ;;
+ (define_insn "mve_vbicq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VBICQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vbict %q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vbrsrq_m_n_f])
+ ;;
+ (define_insn "mve_vbrsrq_m_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:SI 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VBRSRQ_M_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vbrsrt.%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcaddq_rot270_m_f])
+ ;;
+ (define_insn "mve_vcaddq_rot270_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCADDQ_ROT270_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcaddt.f%#<V_sz_elem>	%q0, %q2, %q3, #270"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcaddq_rot90_m_f])
+ ;;
+ (define_insn "mve_vcaddq_rot90_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCADDQ_ROT90_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcaddt.f%#<V_sz_elem>	%q0, %q2, %q3, #90"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmlaq_m_f])
+ ;;
+ (define_insn "mve_vcmlaq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCMLAQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmlat.f%#<V_sz_elem>	%q0, %q2, %q3, #0"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmlaq_rot180_m_f])
+ ;;
+ (define_insn "mve_vcmlaq_rot180_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCMLAQ_ROT180_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmlat.f%#<V_sz_elem>	%q0, %q2, %q3, #180"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmlaq_rot270_m_f])
+ ;;
+ (define_insn "mve_vcmlaq_rot270_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCMLAQ_ROT270_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmlat.f%#<V_sz_elem>	%q0, %q2, %q3, #270"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmlaq_rot90_m_f])
+ ;;
+ (define_insn "mve_vcmlaq_rot90_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCMLAQ_ROT90_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmlat.f%#<V_sz_elem>	%q0, %q2, %q3, #90"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmulq_m_f])
+ ;;
+ (define_insn "mve_vcmulq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCMULQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmult.f%#<V_sz_elem>	%q0, %q2, %q3, #0"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmulq_rot180_m_f])
+ ;;
+ (define_insn "mve_vcmulq_rot180_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCMULQ_ROT180_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmult.f%#<V_sz_elem>	%q0, %q2, %q3, #180"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmulq_rot270_m_f])
+ ;;
+ (define_insn "mve_vcmulq_rot270_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCMULQ_ROT270_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmult.f%#<V_sz_elem>	%q0, %q2, %q3, #270"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vcmulq_rot90_m_f])
+ ;;
+ (define_insn "mve_vcmulq_rot90_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "<earlyclobber_32>")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VCMULQ_ROT90_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vcmult.f%#<V_sz_elem>	%q0, %q2, %q3, #90"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [veorq_m_f])
+ ;;
+ (define_insn "mve_veorq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VEORQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;veort %q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vfmaq_m_f])
+ ;;
+ (define_insn "mve_vfmaq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VFMAQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vfmat.f%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vfmaq_m_n_f])
+ ;;
+ (define_insn "mve_vfmaq_m_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VFMAQ_M_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vfmat.f%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vfmasq_m_n_f])
+ ;;
+ (define_insn "mve_vfmasq_m_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VFMASQ_M_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vfmast.f%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vfmsq_m_f])
+ ;;
+ (define_insn "mve_vfmsq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VFMSQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vfmst.f%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmaxnmq_m_f])
+ ;;
+ (define_insn "mve_vmaxnmq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMAXNMQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vmaxnmt.f%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vminnmq_m_f])
+ ;;
+ (define_insn "mve_vminnmq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMINNMQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vminnmt.f%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmulq_m_f])
+ ;;
+ (define_insn "mve_vmulq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMULQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vmult.f%#<V_sz_elem>	%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vmulq_m_n_f])
+ ;;
+ (define_insn "mve_vmulq_m_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VMULQ_M_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vmult.f%#<V_sz_elem>	%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vornq_m_f])
+ ;;
+ (define_insn "mve_vornq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VORNQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vornt %q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vorrq_m_f])
+ ;;
+ (define_insn "mve_vorrq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VORRQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vorrt %q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vsubq_m_f])
+ ;;
+ (define_insn "mve_vsubq_m_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:MVE_0 3 "s_register_operand" "w")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSUBQ_M_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vsubt.f%#<V_sz_elem>\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vsubq_m_n_f])
+ ;;
+ (define_insn "mve_vsubq_m_n_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
+ 		       (match_operand:MVE_0 2 "s_register_operand" "w")
+ 		       (match_operand:<V_elem> 3 "s_register_operand" "r")
+ 		       (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSUBQ_M_N_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vpst\;vsubt.f%#<V_sz_elem>\t%q0, %q2, %3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [vstrbq_s vstrbq_u]
+ ;;
+ (define_insn "mve_vstrbq_<supf><mode>"
+   [(set (match_operand:<MVE_B_ELEM> 0 "memory_operand" "=Us")
+ 	(unspec:<MVE_B_ELEM> [(match_operand:MVE_2 1 "s_register_operand" "w")]
+ 	 VSTRBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[1]);
+    ops[1] = gen_rtx_REG (TImode, regno);
+    ops[0]  = operands[0];
+    output_asm_insn("vstrb.<V_sz_elem>\t%q1, %E0",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrbq_scatter_offset_s vstrbq_scatter_offset_u]
+ ;;
+ (define_insn "mve_vstrbq_scatter_offset_<supf><mode>"
+   [(set (match_operand:<MVE_B_ELEM> 0 "memory_operand" "=Us")
+ 	(unspec:<MVE_B_ELEM>
+ 		[(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		 (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VSTRBSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn("vstrb.<V_sz_elem>\t%q2, [%m0, %q1]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrwq_scatter_base_s vstrwq_scatter_base_u]
+ ;;
+ (define_insn "mve_vstrwq_scatter_base_<supf>v4si"
+   [(set (mem:BLK (scratch))
+ 	(unspec:BLK
+ 		[(match_operand:V4SI 0 "s_register_operand" "w")
+ 		 (match_operand:SI 1 "immediate_operand" "i")
+ 		 (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VSTRWSBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn("vstrw.u32\t%q2, [%q0, %1]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrbq_gather_offset_s vldrbq_gather_offset_u]
+ ;;
+ (define_insn "mve_vldrbq_gather_offset_<supf><mode>"
+   [(set (match_operand:MVE_2 0 "s_register_operand" "=&w")
+ 	(unspec:MVE_2 [(match_operand:<MVE_B_ELEM> 1 "memory_operand" "Us")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")]
+ 	 VLDRBGOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    if (!strcmp ("<supf>","s") && <V_sz_elem> == 8)
+      output_asm_insn ("vldrb.u8\t%q0, [%m1, %q2]",ops);
+    else
+      output_asm_insn ("vldrb.<supf><V_sz_elem>\t%q0, [%m1, %q2]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrbq_s vldrbq_u]
+ ;;
+ (define_insn "mve_vldrbq_<supf><mode>"
+   [(set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:<MVE_B_ELEM> 1 "memory_operand" "Us")]
+ 	 VLDRBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[0]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1]  = operands[1];
+    output_asm_insn ("vldrb.<supf><V_sz_elem>\t%q0, %E1",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrwq_gather_base_s vldrwq_gather_base_u]
+ ;;
+ (define_insn "mve_vldrwq_gather_base_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=&w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		      (match_operand:SI 2 "immediate_operand" "i")]
+ 	 VLDRWGBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vldrw.u32\t%q0, [%q1, %2]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrbq_scatter_offset_p_s vstrbq_scatter_offset_p_u]
+ ;;
+ (define_insn "mve_vstrbq_scatter_offset_p_<supf><mode>"
+   [(set (match_operand:<MVE_B_ELEM> 0 "memory_operand" "=Us")
+ 	(unspec:<MVE_B_ELEM>
+ 		[(match_operand:MVE_2 1 "s_register_operand" "w")
+ 		 (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRBSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\n\tvstrbt.<V_sz_elem>\t%q2, [%m0, %q1]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrwq_scatter_base_p_s vstrwq_scatter_base_p_u]
+ ;;
+ (define_insn "mve_vstrwq_scatter_base_p_<supf>v4si"
+   [(set (mem:BLK (scratch))
+ 	(unspec:BLK
+ 		[(match_operand:V4SI 0 "s_register_operand" "w")
+ 		 (match_operand:SI 1 "immediate_operand" "i")
+ 		 (match_operand:V4SI 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRWSBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\n\tvstrwt.u32\t%q2, [%q0, %1]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrbq_p_s vstrbq_p_u]
+ ;;
+ (define_insn "mve_vstrbq_p_<supf><mode>"
+   [(set (match_operand:<MVE_B_ELEM> 0 "memory_operand" "=Us")
+ 	(unspec:<MVE_B_ELEM> [(match_operand:MVE_2 1 "s_register_operand" "w")
+ 			      (match_operand:HI 2 "vpr_register_operand" "Up")]
+ 	 VSTRBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[1]);
+    ops[1] = gen_rtx_REG (TImode, regno);
+    ops[0]  = operands[0];
+    output_asm_insn ("vpst\n\tvstrbt.<V_sz_elem>\t%q1, %E0",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrbq_gather_offset_z_s vldrbq_gather_offset_z_u]
+ ;;
+ (define_insn "mve_vldrbq_gather_offset_z_<supf><mode>"
+   [(set (match_operand:MVE_2 0 "s_register_operand" "=&w")
+ 	(unspec:MVE_2 [(match_operand:<MVE_B_ELEM> 1 "memory_operand" "Us")
+ 		       (match_operand:MVE_2 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VLDRBGOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[4];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    ops[3] = operands[3];
+    if (!strcmp ("<supf>","s") && <V_sz_elem> == 8)
+      output_asm_insn ("vpst\n\tvldrbt.u8\t%q0, [%m1, %q2]",ops);
+    else
+      output_asm_insn ("vpst\n\tvldrbt.<supf><V_sz_elem>\t%q0, [%m1, %q2]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrbq_z_s vldrbq_z_u]
+ ;;
+ (define_insn "mve_vldrbq_z_<supf><mode>"
+   [(set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:<MVE_B_ELEM> 1 "memory_operand" "Us")
+ 		       (match_operand:HI 2 "vpr_register_operand" "Up")]
+ 	 VLDRBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[0]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1]  = operands[1];
+    output_asm_insn ("vpst\n\tvldrbt.<supf><V_sz_elem>\t%q0, %E1",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrwq_gather_base_z_s vldrwq_gather_base_z_u]
+ ;;
+ (define_insn "mve_vldrwq_gather_base_z_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=&w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		      (match_operand:SI 2 "immediate_operand" "i")
+ 		      (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VLDRWGBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%q1, %2]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrhq_f]
+ ;;
+ (define_insn "mve_vldrhq_fv8hf"
+   [(set (match_operand:V8HF 0 "s_register_operand" "=w")
+ 	(unspec:V8HF [(match_operand:V8HI 1 "memory_operand" "Us")]
+ 	 VLDRHQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[0]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1]  = operands[1];
+    output_asm_insn ("vldrh.f16\t%q0, %E1",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrhq_gather_offset_s vldrhq_gather_offset_u]
+ ;;
+ (define_insn "mve_vldrhq_gather_offset_<supf><mode>"
+   [(set (match_operand:MVE_6 0 "s_register_operand" "=&w")
+ 	(unspec:MVE_6 [(match_operand:<MVE_H_ELEM> 1 "memory_operand" "Us")
+ 		       (match_operand:MVE_6 2 "s_register_operand" "w")]
+ 	VLDRHGOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    if (!strcmp ("<supf>","s") && <V_sz_elem> == 16)
+      output_asm_insn ("vldrh.u16\t%q0, [%m1, %q2]",ops);
+    else
+      output_asm_insn ("vldrh.<supf><V_sz_elem>\t%q0, [%m1, %q2]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrhq_gather_offset_z_s vldrhq_gather_offset_z_u]
+ ;;
+ (define_insn "mve_vldrhq_gather_offset_z_<supf><mode>"
+   [(set (match_operand:MVE_6 0 "s_register_operand" "=&w")
+ 	(unspec:MVE_6 [(match_operand:<MVE_H_ELEM> 1 "memory_operand" "Us")
+ 		       (match_operand:MVE_6 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")
+ 	]VLDRHGOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[4];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    ops[3] = operands[3];
+    if (!strcmp ("<supf>","s") && <V_sz_elem> == 16)
+      output_asm_insn ("vpst\n\tvldrht.u16\t%q0, [%m1, %q2]",ops);
+    else
+      output_asm_insn ("vpst\n\tvldrht.<supf><V_sz_elem>\t%q0, [%m1, %q2]",ops);
+    return "";
+ }
+  [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrhq_gather_shifted_offset_s vldrhq_gather_shifted_offset_u]
+ ;;
+ (define_insn "mve_vldrhq_gather_shifted_offset_<supf><mode>"
+   [(set (match_operand:MVE_6 0 "s_register_operand" "=&w")
+ 	(unspec:MVE_6 [(match_operand:<MVE_H_ELEM> 1 "memory_operand" "Us")
+ 		       (match_operand:MVE_6 2 "s_register_operand" "w")]
+ 	VLDRHGSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+       if (!strcmp ("<supf>","s") && <V_sz_elem> == 16)
+      output_asm_insn ("vldrh.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
+    else
+      output_asm_insn ("vldrh.<supf><V_sz_elem>\t%q0, [%m1, %q2, uxtw #1]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrhq_gather_shifted_offset_z_s vldrhq_gather_shited_offset_z_u]
+ ;;
+ (define_insn "mve_vldrhq_gather_shifted_offset_z_<supf><mode>"
+   [(set (match_operand:MVE_6 0 "s_register_operand" "=&w")
+ 	(unspec:MVE_6 [(match_operand:<MVE_H_ELEM> 1 "memory_operand" "Us")
+ 		       (match_operand:MVE_6 2 "s_register_operand" "w")
+ 		       (match_operand:HI 3 "vpr_register_operand" "Up")
+ 	]VLDRHGSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[4];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    ops[3] = operands[3];
+    if (!strcmp ("<supf>","s") && <V_sz_elem> == 16)
+      output_asm_insn ("vpst\n\tvldrht.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
+    else
+      output_asm_insn ("vpst\n\tvldrht.<supf><V_sz_elem>\t%q0, [%m1, %q2, uxtw #1]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;;
+ ;; [vldrhq_s, vldrhq_u]
+ ;;
+ (define_insn "mve_vldrhq_<supf><mode>"
+   [(set (match_operand:MVE_6 0 "s_register_operand" "=w")
+ 	(unspec:MVE_6 [(match_operand:<MVE_H_ELEM> 1 "memory_operand" "Us")]
+ 	 VLDRHQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[0]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1]  = operands[1];
+    output_asm_insn ("vldrh.<supf><V_sz_elem>\t%q0, %E1",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrhq_z_f]
+ ;;
+ (define_insn "mve_vldrhq_z_fv8hf"
+   [(set (match_operand:V8HF 0 "s_register_operand" "=w")
+ 	(unspec:V8HF [(match_operand:V8HI 1 "memory_operand" "Us")
+ 	(match_operand:HI 2 "vpr_register_operand" "Up")]
+ 	 VLDRHQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[0]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1]  = operands[1];
+    output_asm_insn ("vpst\n\tvldrht.f16\t%q0, %E1",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrhq_z_s vldrhq_z_u]
+ ;;
+ (define_insn "mve_vldrhq_z_<supf><mode>"
+   [(set (match_operand:MVE_6 0 "s_register_operand" "=w")
+ 	(unspec:MVE_6 [(match_operand:<MVE_H_ELEM> 1 "memory_operand" "Us")
+ 	(match_operand:HI 2 "vpr_register_operand" "Up")]
+ 	 VLDRHQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[0]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1]  = operands[1];
+    output_asm_insn ("vpst\n\tvldrht.<supf><V_sz_elem>\t%q0, %E1",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrwq_f]
+ ;;
+ (define_insn "mve_vldrwq_fv4sf"
+   [(set (match_operand:V4SF 0 "s_register_operand" "=w")
+ 	(unspec:V4SF [(match_operand:V4SI 1 "memory_operand" "Us")]
+ 	 VLDRWQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[0]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1]  = operands[1];
+    output_asm_insn ("vldrw.f32\t%q0, %E1",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrwq_s vldrwq_u]
+ ;;
+ (define_insn "mve_vldrwq_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "memory_operand" "Us")]
+ 	 VLDRWQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[0]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1]  = operands[1];
+    output_asm_insn ("vldrw.<supf>32\t%q0, %E1",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrwq_z_f]
+ ;;
+ (define_insn "mve_vldrwq_z_fv4sf"
+   [(set (match_operand:V4SF 0 "s_register_operand" "=w")
+ 	(unspec:V4SF [(match_operand:V4SI 1 "memory_operand" "Us")
+ 	(match_operand:HI 2 "vpr_register_operand" "Up")]
+ 	 VLDRWQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[0]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1]  = operands[1];
+    output_asm_insn ("vpst\n\tvldrwt.f32\t%q0, %E1",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrwq_z_s vldrwq_z_u]
+ ;;
+ (define_insn "mve_vldrwq_z_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "memory_operand" "Us")
+ 	(match_operand:HI 2 "vpr_register_operand" "Up")]
+ 	 VLDRWQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[0]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1]  = operands[1];
+    output_asm_insn ("vpst\n\tvldrwt.<supf>32\t%q0, %E1",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ (define_expand "mve_vld1q_f<mode>"
+   [(match_operand:MVE_0 0 "s_register_operand")
+    (unspec:MVE_0 [(match_operand:<MVE_CNVT> 1 "memory_operand")] VLD1Q_F)
+   ]
+   "TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT"
+ {
+   emit_insn (gen_mve_vldr<V_sz_elem1>q_f<mode>(operands[0],operands[1]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vld1q_<supf><mode>"
+   [(match_operand:MVE_2 0 "s_register_operand")
+    (unspec:MVE_2 [(match_operand:MVE_2 1 "memory_operand")] VLD1Q)
+   ]
+   "TARGET_HAVE_MVE"
+ {
+   emit_insn (gen_mve_vldr<V_sz_elem1>q_<supf><mode>(operands[0],operands[1]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vldrdq_gather_base_s vldrdq_gather_base_u]
+ ;;
+ (define_insn "mve_vldrdq_gather_base_<supf>v2di"
+   [(set (match_operand:V2DI 0 "s_register_operand" "=&w")
+ 	(unspec:V2DI [(match_operand:V2DI 1 "s_register_operand" "w")
+ 		      (match_operand:SI 2 "immediate_operand" "i")]
+ 	 VLDRDGBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vldrd.64\t%q0, [%q1, %2]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrdq_gather_base_z_s vldrdq_gather_base_z_u]
+ ;;
+ (define_insn "mve_vldrdq_gather_base_z_<supf>v2di"
+   [(set (match_operand:V2DI 0 "s_register_operand" "=&w")
+ 	(unspec:V2DI [(match_operand:V2DI 1 "s_register_operand" "w")
+ 		      (match_operand:SI 2 "immediate_operand" "i")
+ 		      (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VLDRDGBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\n\tvldrdt.u64\t%q0, [%q1, %2]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrdq_gather_offset_s vldrdq_gather_offset_u]
+ ;;
+ (define_insn "mve_vldrdq_gather_offset_<supf>v2di"
+  [(set (match_operand:V2DI 0 "s_register_operand" "=&w")
+        (unspec:V2DI [(match_operand:V2DI 1 "memory_operand" "Us")
+ 		     (match_operand:V2DI 2 "s_register_operand" "w")]
+ 	VLDRDGOQ))
+  ]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ops[3];
+   ops[0] = operands[0];
+   ops[1] = operands[1];
+   ops[2] = operands[2];
+   output_asm_insn ("vldrd.u64\t%q0, [%m1, %q2]",ops);
+   return "";
+ }
+  [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrdq_gather_offset_z_s vldrdq_gather_offset_z_u]
+ ;;
+ (define_insn "mve_vldrdq_gather_offset_z_<supf>v2di"
+  [(set (match_operand:V2DI 0 "s_register_operand" "=&w")
+        (unspec:V2DI [(match_operand:V2DI 1 "memory_operand" "Us")
+ 		     (match_operand:V2DI 2 "s_register_operand" "w")
+ 		     (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	VLDRDGOQ))
+  ]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ops[3];
+   ops[0] = operands[0];
+   ops[1] = operands[1];
+   ops[2] = operands[2];
+   output_asm_insn ("vpst\n\tvldrdt.u64\t%q0, [%m1, %q2]",ops);
+   return "";
+ }
+  [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrdq_gather_shifted_offset_s vldrdq_gather_shifted_offset_u]
+ ;;
+ (define_insn "mve_vldrdq_gather_shifted_offset_<supf>v2di"
+   [(set (match_operand:V2DI 0 "s_register_operand" "=&w")
+ 	(unspec:V2DI [(match_operand:V2DI 1 "memory_operand" "Us")
+ 		      (match_operand:V2DI 2 "s_register_operand" "w")]
+ 	 VLDRDGSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vldrd.u64\t%q0, [%m1, %q2, uxtw #3]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrdq_gather_shifted_offset_z_s vldrdq_gather_shifted_offset_z_u]
+ ;;
+ (define_insn "mve_vldrdq_gather_shifted_offset_z_<supf>v2di"
+   [(set (match_operand:V2DI 0 "s_register_operand" "=&w")
+ 	(unspec:V2DI [(match_operand:V2DI 1 "memory_operand" "Us")
+ 		      (match_operand:V2DI 2 "s_register_operand" "w")
+ 		      (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VLDRDGSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\n\tvldrdt.u64\t%q0, [%m1, %q2, uxtw #3]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrhq_gather_offset_f]
+ ;;
+ (define_insn "mve_vldrhq_gather_offset_fv8hf"
+   [(set (match_operand:V8HF 0 "s_register_operand" "=&w")
+ 	(unspec:V8HF [(match_operand:V8HI 1 "memory_operand" "Us")
+ 		      (match_operand:V8HI 2 "s_register_operand" "w")]
+ 	 VLDRHQGO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vldrh.f16\t%q0, [%m1, %q2]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrhq_gather_offset_z_f]
+ ;;
+ (define_insn "mve_vldrhq_gather_offset_z_fv8hf"
+   [(set (match_operand:V8HF 0 "s_register_operand" "=&w")
+ 	(unspec:V8HF [(match_operand:V8HI 1 "memory_operand" "Us")
+ 		      (match_operand:V8HI 2 "s_register_operand" "w")
+ 		      (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VLDRHQGO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[4];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    ops[3] = operands[3];
+    output_asm_insn ("vpst\n\tvldrht.f16\t%q0, [%m1, %q2]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrhq_gather_shifted_offset_f]
+ ;;
+ (define_insn "mve_vldrhq_gather_shifted_offset_fv8hf"
+   [(set (match_operand:V8HF 0 "s_register_operand" "=&w")
+ 	(unspec:V8HF [(match_operand:V8HI 1 "memory_operand" "Us")
+ 		      (match_operand:V8HI 2 "s_register_operand" "w")]
+ 	 VLDRHQGSO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vldrh.f16\t%q0, [%m1, %q2, uxtw #1]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrhq_gather_shifted_offset_z_f]
+ ;;
+ (define_insn "mve_vldrhq_gather_shifted_offset_z_fv8hf"
+   [(set (match_operand:V8HF 0 "s_register_operand" "=&w")
+ 	(unspec:V8HF [(match_operand:V8HI 1 "memory_operand" "Us")
+ 		      (match_operand:V8HI 2 "s_register_operand" "w")
+ 		      (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VLDRHQGSO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[4];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    ops[3] = operands[3];
+    output_asm_insn ("vpst\n\tvldrht.f16\t%q0, [%m1, %q2, uxtw #1]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrwq_gather_base_f]
+ ;;
+ (define_insn "mve_vldrwq_gather_base_fv4sf"
+   [(set (match_operand:V4SF 0 "s_register_operand" "=&w")
+ 	(unspec:V4SF [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		      (match_operand:SI 2 "immediate_operand" "i")]
+ 	 VLDRWQGB_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vldrw.u32\t%q0, [%q1, %2]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrwq_gather_base_z_f]
+ ;;
+ (define_insn "mve_vldrwq_gather_base_z_fv4sf"
+   [(set (match_operand:V4SF 0 "s_register_operand" "=&w")
+ 	(unspec:V4SF [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		      (match_operand:SI 2 "immediate_operand" "i")
+ 		      (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VLDRWQGB_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%q1, %2]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrwq_gather_offset_f]
+ ;;
+ (define_insn "mve_vldrwq_gather_offset_fv4sf"
+   [(set (match_operand:V4SF 0 "s_register_operand" "=&w")
+ 	(unspec:V4SF [(match_operand:V4SI 1 "memory_operand" "Us")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VLDRWQGO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vldrw.u32\t%q0, [%m1, %q2]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrwq_gather_offset_s vldrwq_gather_offset_u]
+ ;;
+ (define_insn "mve_vldrwq_gather_offset_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=&w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "memory_operand" "Us")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VLDRWGOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vldrw.u32\t%q0, [%m1, %q2]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrwq_gather_offset_z_f]
+ ;;
+ (define_insn "mve_vldrwq_gather_offset_z_fv4sf"
+   [(set (match_operand:V4SF 0 "s_register_operand" "=&w")
+ 	(unspec:V4SF [(match_operand:V4SI 1 "memory_operand" "Us")
+ 		      (match_operand:V4SI 2 "s_register_operand" "w")
+ 		      (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VLDRWQGO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[4];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    ops[3] = operands[3];
+    output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%m1, %q2]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrwq_gather_offset_z_s vldrwq_gather_offset_z_u]
+ ;;
+ (define_insn "mve_vldrwq_gather_offset_z_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=&w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "memory_operand" "Us")
+ 		      (match_operand:V4SI 2 "s_register_operand" "w")
+ 		      (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VLDRWGOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[4];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    ops[3] = operands[3];
+    output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%m1, %q2]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrwq_gather_shifted_offset_f]
+ ;;
+ (define_insn "mve_vldrwq_gather_shifted_offset_fv4sf"
+   [(set (match_operand:V4SF 0 "s_register_operand" "=&w")
+ 	(unspec:V4SF [(match_operand:V4SI 1 "memory_operand" "Us")
+ 		      (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VLDRWQGSO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vldrw.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrwq_gather_shifted_offset_s vldrwq_gather_shifted_offset_u]
+ ;;
+ (define_insn "mve_vldrwq_gather_shifted_offset_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=&w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "memory_operand" "Us")
+ 		      (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VLDRWGSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vldrw.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vldrwq_gather_shifted_offset_z_f]
+ ;;
+ (define_insn "mve_vldrwq_gather_shifted_offset_z_fv4sf"
+   [(set (match_operand:V4SF 0 "s_register_operand" "=&w")
+ 	(unspec:V4SF [(match_operand:V4SI 1 "memory_operand" "Us")
+ 		      (match_operand:V4SI 2 "s_register_operand" "w")
+ 		      (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VLDRWQGSO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[4];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    ops[3] = operands[3];
+    output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vldrwq_gather_shifted_offset_z_s vldrwq_gather_shifted_offset_z_u]
+ ;;
+ (define_insn "mve_vldrwq_gather_shifted_offset_z_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=&w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "memory_operand" "Us")
+ 		      (match_operand:V4SI 2 "s_register_operand" "w")
+ 		      (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VLDRWGSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[4];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    ops[3] = operands[3];
+    output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrhq_f]
+ ;;
+ (define_insn "mve_vstrhq_fv8hf"
+   [(set (match_operand:V8HI 0 "memory_operand" "=Us")
+ 	(unspec:V8HI [(match_operand:V8HF 1 "s_register_operand" "w")]
+ 	 VSTRHQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[1]);
+    ops[1] = gen_rtx_REG (TImode, regno);
+    ops[0]  = operands[0];
+    output_asm_insn ("vstrh.16\t%q1, %E0",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrhq_p_f]
+ ;;
+ (define_insn "mve_vstrhq_p_fv8hf"
+   [(set (match_operand:V8HI 0 "memory_operand" "=Us")
+ 	(unspec:V8HI [(match_operand:V8HF 1 "s_register_operand" "w")
+ 		      (match_operand:HI 2 "vpr_register_operand" "Up")]
+ 	 VSTRHQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[1]);
+    ops[1] = gen_rtx_REG (TImode, regno);
+    ops[0]  = operands[0];
+    output_asm_insn ("vpst\n\tvstrht.16\t%q1, %E0",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrhq_p_s vstrhq_p_u]
+ ;;
+ (define_insn "mve_vstrhq_p_<supf><mode>"
+   [(set (match_operand:<MVE_H_ELEM> 0 "memory_operand" "=Us")
+ 	(unspec:<MVE_H_ELEM> [(match_operand:MVE_6 1 "s_register_operand" "w")
+ 			      (match_operand:HI 2 "vpr_register_operand" "Up")]
+ 	 VSTRHQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[1]);
+    ops[1] = gen_rtx_REG (TImode, regno);
+    ops[0]  = operands[0];
+    output_asm_insn ("vpst\n\tvstrht.<V_sz_elem>\t%q1, %E0",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrhq_scatter_offset_p_s vstrhq_scatter_offset_p_u]
+ ;;
+ (define_insn "mve_vstrhq_scatter_offset_p_<supf><mode>"
+   [(set (match_operand:<MVE_H_ELEM> 0 "memory_operand" "=Us")
+ 	(unspec:<MVE_H_ELEM>
+ 		[(match_operand:MVE_6 1 "s_register_operand" "w")
+ 		 (match_operand:MVE_6 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRHSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\n\tvstrht.<V_sz_elem>\t%q2, [%m0, %q1]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrhq_scatter_offset_s vstrhq_scatter_offset_u]
+ ;;
+ (define_insn "mve_vstrhq_scatter_offset_<supf><mode>"
+   [(set (match_operand:<MVE_H_ELEM> 0 "memory_operand" "=Us")
+ 	(unspec:<MVE_H_ELEM>
+ 		[(match_operand:MVE_6 1 "s_register_operand" "w")
+ 		 (match_operand:MVE_6 2 "s_register_operand" "w")]
+ 	 VSTRHSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vstrh.<V_sz_elem>\t%q2, [%m0, %q1]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrhq_scatter_shifted_offset_p_s vstrhq_scatter_shifted_offset_p_u]
+ ;;
+ (define_insn "mve_vstrhq_scatter_shifted_offset_p_<supf><mode>"
+   [(set (match_operand:<MVE_H_ELEM> 0 "memory_operand" "=Us")
+ 	(unspec:<MVE_H_ELEM>
+ 		[(match_operand:MVE_6 1 "s_register_operand" "w")
+ 		 (match_operand:MVE_6 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRHSSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\n\tvstrht.<V_sz_elem>\t%q2, [%m0, %q1, uxtw #1]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrhq_scatter_shifted_offset_s vstrhq_scatter_shifted_offset_u]
+ ;;
+ (define_insn "mve_vstrhq_scatter_shifted_offset_<supf><mode>"
+   [(set (match_operand:<MVE_H_ELEM> 0 "memory_operand" "=Us")
+ 	(unspec:<MVE_H_ELEM>
+ 		[(match_operand:MVE_6 1 "s_register_operand" "w")
+ 		 (match_operand:MVE_6 2 "s_register_operand" "w")]
+ 	 VSTRHSSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vstrh.<V_sz_elem>\t%q2, [%m0, %q1, uxtw #1]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrhq_s, vstrhq_u]
+ ;;
+ (define_insn "mve_vstrhq_<supf><mode>"
+   [(set (match_operand:<MVE_H_ELEM> 0 "memory_operand" "=Us")
+ 	(unspec:<MVE_H_ELEM> [(match_operand:MVE_6 1 "s_register_operand" "w")]
+ 	 VSTRHQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[1]);
+    ops[1] = gen_rtx_REG (TImode, regno);
+    ops[0]  = operands[0];
+    output_asm_insn ("vstrh.<V_sz_elem>\t%q1, %E0",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrwq_f]
+ ;;
+ (define_insn "mve_vstrwq_fv4sf"
+   [(set (match_operand:V4SI 0 "memory_operand" "=Us")
+ 	(unspec:V4SI [(match_operand:V4SF 1 "s_register_operand" "w")]
+ 	 VSTRWQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[1]);
+    ops[1] = gen_rtx_REG (TImode, regno);
+    ops[0]  = operands[0];
+    output_asm_insn ("vstrw.32\t%q1, %E0",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrwq_p_f]
+ ;;
+ (define_insn "mve_vstrwq_p_fv4sf"
+   [(set (match_operand:V4SI 0 "memory_operand" "=Us")
+ 	(unspec:V4SI [(match_operand:V4SF 1 "s_register_operand" "w")
+ 		      (match_operand:HI 2 "vpr_register_operand" "Up")]
+ 	 VSTRWQ_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[1]);
+    ops[1] = gen_rtx_REG (TImode, regno);
+    ops[0]  = operands[0];
+    output_asm_insn ("vpst\n\tvstrwt.32\t%q1, %E0",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrwq_p_s vstrwq_p_u]
+ ;;
+ (define_insn "mve_vstrwq_p_<supf>v4si"
+   [(set (match_operand:V4SI 0 "memory_operand" "=Us")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		      (match_operand:HI 2 "vpr_register_operand" "Up")]
+ 	 VSTRWQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[1]);
+    ops[1] = gen_rtx_REG (TImode, regno);
+    ops[0]  = operands[0];
+    output_asm_insn ("vpst\n\tvstrwt.32\t%q1, %E0",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrwq_s vstrwq_u]
+ ;;
+ (define_insn "mve_vstrwq_<supf>v4si"
+   [(set (match_operand:V4SI 0 "memory_operand" "=Us")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w")]
+ 	 VSTRWQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[2];
+    int regno = REGNO (operands[1]);
+    ops[1] = gen_rtx_REG (TImode, regno);
+    ops[0]  = operands[0];
+    output_asm_insn ("vstrw.32\t%q1, %E0",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ (define_expand "mve_vst1q_f<mode>"
+   [(match_operand:<MVE_CNVT> 0 "memory_operand")
+    (unspec:<MVE_CNVT> [(match_operand:MVE_0 1 "s_register_operand")] VST1Q_F)
+   ]
+   "TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT"
+ {
+   emit_insn (gen_mve_vstr<V_sz_elem1>q_f<mode>(operands[0],operands[1]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vst1q_<supf><mode>"
+   [(match_operand:MVE_2 0 "memory_operand")
+    (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand")] VST1Q)
+   ]
+   "TARGET_HAVE_MVE"
+ {
+   emit_insn (gen_mve_vstr<V_sz_elem1>q_<supf><mode>(operands[0],operands[1]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vstrdq_scatter_base_p_s vstrdq_scatter_base_p_u]
+ ;;
+ (define_insn "mve_vstrdq_scatter_base_p_<supf>v2di"
+   [(set (mem:BLK (scratch))
+ 	(unspec:BLK
+ 		[(match_operand:V2DI 0 "s_register_operand" "w")
+ 		 (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+ 		 (match_operand:V2DI 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRDSBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\;\tvstrdt.u64\t%q2, [%q0, %1]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrdq_scatter_base_s vstrdq_scatter_base_u]
+ ;;
+ (define_insn "mve_vstrdq_scatter_base_<supf>v2di"
+   [(set (mem:BLK (scratch))
+ 	(unspec:BLK
+ 		[(match_operand:V2DI 0 "s_register_operand" "=w")
+ 		 (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+ 		 (match_operand:V2DI 2 "s_register_operand" "w")]
+ 	 VSTRDSBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vstrd.u64\t%q2, [%q0, %1]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrdq_scatter_offset_p_s vstrdq_scatter_offset_p_u]
+ ;;
+ (define_insn "mve_vstrdq_scatter_offset_p_<supf>v2di"
+   [(set (match_operand:V2DI 0 "memory_operand" "=Us")
+ 	(unspec:V2DI
+ 		[(match_operand:V2DI 1 "s_register_operand" "w")
+ 		 (match_operand:V2DI 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRDSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\;\tvstrdt.64\t%q2, [%m0, %q1]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrdq_scatter_offset_s vstrdq_scatter_offset_u]
+ ;;
+ (define_insn "mve_vstrdq_scatter_offset_<supf>v2di"
+   [(set (match_operand:V2DI 0 "memory_operand" "=Us")
+ 	(unspec:V2DI
+ 		[(match_operand:V2DI 1 "s_register_operand" "w")
+ 		 (match_operand:V2DI 2 "s_register_operand" "w")]
+ 	 VSTRDSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vstrd.64\t%q2, [%m0, %q1]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrdq_scatter_shifted_offset_p_s vstrdq_scatter_shifted_offset_p_u]
+ ;;
+ (define_insn "mve_vstrdq_scatter_shifted_offset_p_<supf>v2di"
+   [(set (match_operand:V2DI 0 "memory_operand" "=Us")
+ 	(unspec:V2DI
+ 		[(match_operand:V2DI 1 "s_register_operand" "w")
+ 		 (match_operand:V2DI 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRDSSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\;\tvstrdt.64\t%q2, [%m0, %q1, UXTW #3]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrdq_scatter_shifted_offset_s vstrdq_scatter_shifted_offset_u]
+ ;;
+ (define_insn "mve_vstrdq_scatter_shifted_offset_<supf>v2di"
+   [(set (match_operand:V2DI 0 "memory_operand" "=Us")
+ 	(unspec:V2DI
+ 		[(match_operand:V2DI 1 "s_register_operand" "w")
+ 		 (match_operand:V2DI 2 "s_register_operand" "w")]
+ 	 VSTRDSSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vstrd.64\t%q2, [%m0, %q1, UXTW #3]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrhq_scatter_offset_f]
+ ;;
+ (define_insn "mve_vstrhq_scatter_offset_fv8hf"
+   [(set (match_operand:V8HI 0 "memory_operand" "=Us")
+ 	(unspec:V8HI
+ 		[(match_operand:V8HI 1 "s_register_operand" "w")
+ 		 (match_operand:V8HF 2 "s_register_operand" "w")]
+ 	 VSTRHQSO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vstrh.16\t%q2, [%m0, %q1]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrhq_scatter_offset_p_f]
+ ;;
+ (define_insn "mve_vstrhq_scatter_offset_p_fv8hf"
+   [(set (match_operand:V8HI 0 "memory_operand" "=Us")
+ 	(unspec:V8HI
+ 		[(match_operand:V8HI 1 "s_register_operand" "w")
+ 		 (match_operand:V8HF 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRHQSO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\n\tvstrht.16\t%q2, [%m0, %q1]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrhq_scatter_shifted_offset_f]
+ ;;
+ (define_insn "mve_vstrhq_scatter_shifted_offset_fv8hf"
+   [(set (match_operand:V8HI 0 "memory_operand" "=Us")
+ 	(unspec:V8HI
+ 		[(match_operand:V8HI 1 "s_register_operand" "w")
+ 		 (match_operand:V8HF 2 "s_register_operand" "w")]
+ 	 VSTRHQSSO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vstrh.16\t%q2, [%m0, %q1, uxtw #1]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrhq_scatter_shifted_offset_p_f]
+ ;;
+ (define_insn "mve_vstrhq_scatter_shifted_offset_p_fv8hf"
+   [(set (match_operand:V8HI 0 "memory_operand" "=Us")
+ 	(unspec:V8HI
+ 		[(match_operand:V8HI 1 "s_register_operand" "w")
+ 		 (match_operand:V8HF 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRHQSSO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\n\tvstrht.16\t%q2, [%m0, %q1, uxtw #1]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrwq_scatter_base_f]
+ ;;
+ (define_insn "mve_vstrwq_scatter_base_fv4sf"
+   [(set (mem:BLK (scratch))
+ 	(unspec:BLK
+ 		[(match_operand:V4SI 0 "s_register_operand" "w")
+ 		 (match_operand:SI 1 "immediate_operand" "i")
+ 		 (match_operand:V4SF 2 "s_register_operand" "w")]
+ 	 VSTRWQSB_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vstrw.u32\t%q2, [%q0, %1]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrwq_scatter_base_p_f]
+ ;;
+ (define_insn "mve_vstrwq_scatter_base_p_fv4sf"
+   [(set (mem:BLK (scratch))
+ 	(unspec:BLK
+ 		[(match_operand:V4SI 0 "s_register_operand" "w")
+ 		 (match_operand:SI 1 "immediate_operand" "i")
+ 		 (match_operand:V4SF 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRWQSB_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\n\tvstrwt.u32\t%q2, [%q0, %1]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrwq_scatter_offset_f]
+ ;;
+ (define_insn "mve_vstrwq_scatter_offset_fv4sf"
+   [(set (match_operand:V4SI 0 "memory_operand" "=Us")
+ 	(unspec:V4SI
+ 		[(match_operand:V4SI 1 "s_register_operand" "w")
+ 		 (match_operand:V4SF 2 "s_register_operand" "w")]
+ 	 VSTRWQSO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vstrw.32\t%q2, [%m0, %q1]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrwq_scatter_offset_p_f]
+ ;;
+ (define_insn "mve_vstrwq_scatter_offset_p_fv4sf"
+   [(set (match_operand:V4SI 0 "memory_operand" "=Us")
+ 	(unspec:V4SI
+ 		[(match_operand:V4SI 1 "s_register_operand" "w")
+ 		 (match_operand:V4SF 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRWQSO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\n\tvstrwt.32\t%q2, [%m0, %q1]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrwq_scatter_offset_p_s vstrwq_scatter_offset_p_u]
+ ;;
+ (define_insn "mve_vstrwq_scatter_offset_p_<supf>v4si"
+   [(set (match_operand:V4SI 0 "memory_operand" "=Us")
+ 	(unspec:V4SI
+ 		[(match_operand:V4SI 1 "s_register_operand" "w")
+ 		 (match_operand:V4SI 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRWSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\n\tvstrwt.32\t%q2, [%m0, %q1]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrwq_scatter_offset_s vstrwq_scatter_offset_u]
+ ;;
+ (define_insn "mve_vstrwq_scatter_offset_<supf>v4si"
+   [(set (match_operand:V4SI 0 "memory_operand" "=Us")
+ 	(unspec:V4SI
+ 		[(match_operand:V4SI 1 "s_register_operand" "w")
+ 		 (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VSTRWSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vstrw.32\t%q2, [%m0, %q1]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrwq_scatter_shifted_offset_f]
+ ;;
+ (define_insn "mve_vstrwq_scatter_shifted_offset_fv4sf"
+   [(set (match_operand:V4SI 0 "memory_operand" "=Us")
+ 	(unspec:V4SI
+ 		[(match_operand:V4SI 1 "s_register_operand" "w")
+ 		 (match_operand:V4SF 2 "s_register_operand" "w")]
+ 	 VSTRWQSSO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vstrw.32\t%q2, [%m0, %q1, uxtw #2]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vstrwq_scatter_shifted_offset_p_f]
+ ;;
+ (define_insn "mve_vstrwq_scatter_shifted_offset_p_fv4sf"
+   [(set (match_operand:V4SI 0 "memory_operand" "=Us")
+ 	(unspec:V4SI
+ 		[(match_operand:V4SI 1 "s_register_operand" "w")
+ 		 (match_operand:V4SF 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRWQSSO_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\;\tvstrwt.32\t%q2, [%m0, %q1, uxtw #2]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrwq_scatter_shifted_offset_p_s vstrwq_scatter_shifted_offset_p_u]
+ ;;
+ (define_insn "mve_vstrwq_scatter_shifted_offset_p_<supf>v4si"
+   [(set (match_operand:V4SI 0 "memory_operand" "=Us")
+ 	(unspec:V4SI
+ 		[(match_operand:V4SI 1 "s_register_operand" "w")
+ 		 (match_operand:V4SI 2 "s_register_operand" "w")
+ 		 (match_operand:HI 3 "vpr_register_operand" "Up")]
+ 	 VSTRWSSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vpst\;\tvstrwt.32\t%q2, [%m0, %q1, uxtw #2]",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vstrwq_scatter_shifted_offset_s vstrwq_scatter_shifted_offset_u]
+ ;;
+ (define_insn "mve_vstrwq_scatter_shifted_offset_<supf>v4si"
+   [(set (match_operand:V4SI 0 "memory_operand" "=Us")
+ 	(unspec:V4SI
+ 		[(match_operand:V4SI 1 "s_register_operand" "w")
+ 		 (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VSTRWSSOQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[1];
+    ops[2] = operands[2];
+    output_asm_insn ("vstrw.32\t%q2, [%m0, %q1, uxtw #2]",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ ;;
+ ;; [vaddq_s, vaddq_u])
+ ;;
+ (define_insn "mve_vaddq<mode>"
+   [
+    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(plus:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_2 2 "s_register_operand" "w")))
+   ]
+   "TARGET_HAVE_MVE"
+   "vadd.i%#<V_sz_elem>  %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vaddq_f])
+ ;;
+ (define_insn "mve_vaddq_f<mode>"
+   [
+    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
+ 	(plus:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")
+ 		    (match_operand:MVE_0 2 "s_register_operand" "w")))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+   "vadd.f%#<V_sz_elem> %q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+ ])
+ 
+ ;;
+ ;; [vidupq_n_u])
+ ;;
+ (define_expand "mve_vidupq_n_u<mode>"
+  [(match_operand:MVE_2 0 "s_register_operand")
+   (match_operand:SI 1 "s_register_operand")
+   (match_operand:SI 2 "mve_imm_selective_upto_8")]
+  "TARGET_HAVE_MVE"
+ {
+   rtx temp = gen_reg_rtx (SImode);
+   emit_move_insn (temp, operands[1]);
+   rtx inc = gen_int_mode (INTVAL(operands[2]) * <MVE_LANES>, SImode);
+   emit_insn (gen_mve_vidupq_u<mode>_insn (operands[0], temp, operands[1],
+ 					  operands[2], inc));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vidupq_u_insn])
+ ;;
+ (define_insn "mve_vidupq_u<mode>_insn"
+  [(set (match_operand:MVE_2 0 "s_register_operand" "=w")
+        (unspec:MVE_2 [(match_operand:SI 2 "s_register_operand" "1")
+ 		      (match_operand:SI 3 "mve_imm_selective_upto_8" "Rg")]
+ 	 VIDUPQ))
+   (set (match_operand:SI 1 "s_register_operand" "=Te")
+        (plus:SI (match_dup 2)
+ 		(match_operand:SI 4 "immediate_operand" "i")))]
+  "TARGET_HAVE_MVE"
+  "vidup.u%#<V_sz_elem>\t%q0, %1, %3")
+ 
+ ;;
+ ;; [vidupq_m_n_u])
+ ;;
+ (define_expand "mve_vidupq_m_n_u<mode>"
+   [(match_operand:MVE_2 0 "s_register_operand")
+    (match_operand:MVE_2 1 "s_register_operand")
+    (match_operand:SI 2 "s_register_operand")
+    (match_operand:SI 3 "mve_imm_selective_upto_8")
+    (match_operand:HI 4 "vpr_register_operand")]
+   "TARGET_HAVE_MVE"
+ {
+   rtx temp = gen_reg_rtx (SImode);
+   emit_move_insn (temp, operands[2]);
+   rtx inc = gen_int_mode (INTVAL(operands[3]) * <MVE_LANES>, SImode);
+   emit_insn (gen_mve_vidupq_m_wb_u<mode>_insn(operands[0], operands[1], temp,
+ 					     operands[2], operands[3],
+ 					     operands[4], inc));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vidupq_m_wb_u_insn])
+ ;;
+ (define_insn "mve_vidupq_m_wb_u<mode>_insn"
+  [(set (match_operand:MVE_2 0 "s_register_operand" "=w")
+        (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		      (match_operand:SI 3 "s_register_operand" "2")
+ 		      (match_operand:SI 4 "mve_imm_selective_upto_8" "Rg")
+ 		      (match_operand:HI 5 "vpr_register_operand" "Up")]
+ 	VIDUPQ_M))
+   (set (match_operand:SI 2 "s_register_operand" "=Te")
+        (plus:SI (match_dup 3)
+ 		(match_operand:SI 6 "immediate_operand" "i")))]
+  "TARGET_HAVE_MVE"
+  "vpst\;\tvidupt.u%#<V_sz_elem>\t%q0, %2, %4"
+  [(set_attr "length""8")])
+ 
+ ;;
+ ;; [vddupq_n_u])
+ ;;
+ (define_expand "mve_vddupq_n_u<mode>"
+  [(match_operand:MVE_2 0 "s_register_operand")
+   (match_operand:SI 1 "s_register_operand")
+   (match_operand:SI 2 "mve_imm_selective_upto_8")]
+  "TARGET_HAVE_MVE"
+ {
+   rtx temp = gen_reg_rtx (SImode);
+   emit_move_insn (temp, operands[1]);
+   rtx inc = gen_int_mode (INTVAL(operands[2]) * <MVE_LANES>, SImode);
+   emit_insn (gen_mve_vddupq_u<mode>_insn (operands[0], temp, operands[1],
+ 					  operands[2], inc));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vddupq_u_insn])
+ ;;
+ (define_insn "mve_vddupq_u<mode>_insn"
+  [(set (match_operand:MVE_2 0 "s_register_operand" "=w")
+        (unspec:MVE_2 [(match_operand:SI 2 "s_register_operand" "1")
+ 		      (match_operand:SI 3 "immediate_operand" "i")]
+ 	VDDUPQ))
+   (set (match_operand:SI 1 "s_register_operand" "=Te")
+        (minus:SI (match_dup 2)
+ 		 (match_operand:SI 4 "immediate_operand" "i")))]
+  "TARGET_HAVE_MVE"
+  "vddup.u%#<V_sz_elem>  %q0, %1, %3")
+ 
+ ;;
+ ;; [vddupq_m_n_u])
+ ;;
+ (define_expand "mve_vddupq_m_n_u<mode>"
+   [(match_operand:MVE_2 0 "s_register_operand")
+    (match_operand:MVE_2 1 "s_register_operand")
+    (match_operand:SI 2 "s_register_operand")
+    (match_operand:SI 3 "mve_imm_selective_upto_8")
+    (match_operand:HI 4 "vpr_register_operand")]
+   "TARGET_HAVE_MVE"
+ {
+   rtx temp = gen_reg_rtx (SImode);
+   emit_move_insn (temp, operands[2]);
+   rtx inc = gen_int_mode (INTVAL(operands[3]) * <MVE_LANES>, SImode);
+   emit_insn (gen_mve_vddupq_m_wb_u<mode>_insn(operands[0], operands[1], temp,
+ 					     operands[2], operands[3],
+ 					     operands[4], inc));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vddupq_m_wb_u_insn])
+ ;;
+ (define_insn "mve_vddupq_m_wb_u<mode>_insn"
+  [(set (match_operand:MVE_2 0 "s_register_operand" "=w")
+        (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
+ 		      (match_operand:SI 3 "s_register_operand" "2")
+ 		      (match_operand:SI 4 "mve_imm_selective_upto_8" "Rg")
+ 		      (match_operand:HI 5 "vpr_register_operand" "Up")]
+ 	VDDUPQ_M))
+   (set (match_operand:SI 2 "s_register_operand" "=Te")
+        (minus:SI (match_dup 3)
+ 		 (match_operand:SI 6 "immediate_operand" "i")))]
+  "TARGET_HAVE_MVE"
+  "vpst\;\tvddupt.u%#<V_sz_elem>\t%q0, %2, %4"
+  [(set_attr "length""8")])
+ 
+ ;;
+ ;; [vdwdupq_n_u])
+ ;;
+ (define_expand "mve_vdwdupq_n_u<mode>"
+  [(match_operand:MVE_2 0 "s_register_operand")
+   (match_operand:SI 1 "s_register_operand")
+   (match_operand:DI 2 "s_register_operand")
+   (match_operand:SI 3 "mve_imm_selective_upto_8")]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (SImode);
+   emit_insn (gen_mve_vdwdupq_wb_u<mode>_insn (operands[0], ignore_wb,
+ 					      operands[1], operands[2],
+ 					      operands[3]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vdwdupq_wb_u])
+ ;;
+ (define_expand "mve_vdwdupq_wb_u<mode>"
+  [(match_operand:SI 0 "s_register_operand")
+   (match_operand:SI 1 "s_register_operand")
+   (match_operand:DI 2 "s_register_operand")
+   (match_operand:SI 3 "mve_imm_selective_upto_8")
+   (unspec:MVE_2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ignore_vec = gen_reg_rtx (<MODE>mode);
+   emit_insn (gen_mve_vdwdupq_wb_u<mode>_insn (ignore_vec, operands[0],
+ 					      operands[1], operands[2],
+ 					      operands[3]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vdwdupq_wb_u_insn])
+ ;;
+ (define_insn "mve_vdwdupq_wb_u<mode>_insn"
+   [(set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:SI 2 "s_register_operand" "1")
+ 		       (subreg:SI (match_operand:DI 3 "s_register_operand" "r") 4)
+ 		       (match_operand:SI 4 "mve_imm_selective_upto_8" "Rg")]
+ 	 VDWDUPQ))
+    (set (match_operand:SI 1 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_dup 2)
+ 		    (subreg:SI (match_dup 3) 4)
+ 		    (match_dup 4)]
+ 	 VDWDUPQ))]
+   "TARGET_HAVE_MVE"
+   "vdwdup.u%#<V_sz_elem>\t%q0, %2, %R3, %4"
+ )
+ 
+ ;;
+ ;; [vdwdupq_m_n_u])
+ ;;
+ (define_expand "mve_vdwdupq_m_n_u<mode>"
+  [(match_operand:MVE_2 0 "s_register_operand")
+   (match_operand:MVE_2 1 "s_register_operand")
+   (match_operand:SI 2 "s_register_operand")
+   (match_operand:DI 3 "s_register_operand")
+   (match_operand:SI 4 "mve_imm_selective_upto_8")
+   (match_operand:HI 5 "vpr_register_operand")]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (SImode);
+   emit_insn (gen_mve_vdwdupq_m_wb_u<mode>_insn (operands[0], ignore_wb,
+ 						operands[1], operands[2],
+ 						operands[3], operands[4],
+ 						operands[5]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vdwdupq_m_wb_u])
+ ;;
+ (define_expand "mve_vdwdupq_m_wb_u<mode>"
+  [(match_operand:SI 0 "s_register_operand")
+   (match_operand:MVE_2 1 "s_register_operand")
+   (match_operand:SI 2 "s_register_operand")
+   (match_operand:DI 3 "s_register_operand")
+   (match_operand:SI 4 "mve_imm_selective_upto_8")
+   (match_operand:HI 5 "vpr_register_operand")]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ignore_vec = gen_reg_rtx (<MODE>mode);
+   emit_insn (gen_mve_vdwdupq_m_wb_u<mode>_insn (ignore_vec, operands[0],
+ 						operands[1], operands[2],
+ 						operands[3], operands[4],
+ 						operands[5]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vdwdupq_m_wb_u_insn])
+ ;;
+ (define_insn "mve_vdwdupq_m_wb_u<mode>_insn"
+   [(set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 2 "s_register_operand" "0")
+ 		       (match_operand:SI 3 "s_register_operand" "1")
+ 		       (subreg:SI (match_operand:DI 4 "s_register_operand" "r") 4)
+ 		       (match_operand:SI 5 "mve_imm_selective_upto_8" "Rg")
+ 		       (match_operand:HI 6 "vpr_register_operand" "Up")]
+ 	 VDWDUPQ_M))
+    (set (match_operand:SI 1 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_dup 2)
+ 		    (match_dup 3)
+ 		    (subreg:SI (match_dup 4) 4)
+ 		    (match_dup 5)
+ 		    (match_dup 6)]
+ 	 VDWDUPQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;\tvdwdupt.u%#<V_sz_elem>\t%q2, %3, %R4, %5"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ ;;
+ ;; [viwdupq_n_u])
+ ;;
+ (define_expand "mve_viwdupq_n_u<mode>"
+  [(match_operand:MVE_2 0 "s_register_operand")
+   (match_operand:SI 1 "s_register_operand")
+   (match_operand:DI 2 "s_register_operand")
+   (match_operand:SI 3 "mve_imm_selective_upto_8")]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (SImode);
+   emit_insn (gen_mve_viwdupq_wb_u<mode>_insn (operands[0], ignore_wb,
+ 					      operands[1], operands[2],
+ 					      operands[3]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [viwdupq_wb_u])
+ ;;
+ (define_expand "mve_viwdupq_wb_u<mode>"
+  [(match_operand:SI 0 "s_register_operand")
+   (match_operand:SI 1 "s_register_operand")
+   (match_operand:DI 2 "s_register_operand")
+   (match_operand:SI 3 "mve_imm_selective_upto_8")
+   (unspec:MVE_2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ignore_vec = gen_reg_rtx (<MODE>mode);
+   emit_insn (gen_mve_viwdupq_wb_u<mode>_insn (ignore_vec, operands[0],
+ 					      operands[1], operands[2],
+ 					      operands[3]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [viwdupq_wb_u_insn])
+ ;;
+ (define_insn "mve_viwdupq_wb_u<mode>_insn"
+   [(set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:SI 2 "s_register_operand" "1")
+ 		       (subreg:SI (match_operand:DI 3 "s_register_operand" "r") 4)
+ 		       (match_operand:SI 4 "mve_imm_selective_upto_8" "Rg")]
+ 	 VIWDUPQ))
+    (set (match_operand:SI 1 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_dup 2)
+ 		    (subreg:SI (match_dup 3) 4)
+ 		    (match_dup 4)]
+ 	 VIWDUPQ))]
+   "TARGET_HAVE_MVE"
+   "viwdup.u%#<V_sz_elem>\t%q0, %2, %R3, %4"
+ )
+ 
+ ;;
+ ;; [viwdupq_m_n_u])
+ ;;
+ (define_expand "mve_viwdupq_m_n_u<mode>"
+  [(match_operand:MVE_2 0 "s_register_operand")
+   (match_operand:MVE_2 1 "s_register_operand")
+   (match_operand:SI 2 "s_register_operand")
+   (match_operand:DI 3 "s_register_operand")
+   (match_operand:SI 4 "mve_imm_selective_upto_8")
+   (match_operand:HI 5 "vpr_register_operand")]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (SImode);
+   emit_insn (gen_mve_viwdupq_m_wb_u<mode>_insn (operands[0], ignore_wb,
+ 						operands[1], operands[2],
+ 						operands[3], operands[4],
+ 						operands[5]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [viwdupq_m_wb_u])
+ ;;
+ (define_expand "mve_viwdupq_m_wb_u<mode>"
+  [(match_operand:SI 0 "s_register_operand")
+   (match_operand:MVE_2 1 "s_register_operand")
+   (match_operand:SI 2 "s_register_operand")
+   (match_operand:DI 3 "s_register_operand")
+   (match_operand:SI 4 "mve_imm_selective_upto_8")
+   (match_operand:HI 5 "vpr_register_operand")]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ignore_vec = gen_reg_rtx (<MODE>mode);
+   emit_insn (gen_mve_viwdupq_m_wb_u<mode>_insn (ignore_vec, operands[0],
+ 						operands[1], operands[2],
+ 						operands[3], operands[4],
+ 						operands[5]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [viwdupq_m_wb_u_insn])
+ ;;
+ (define_insn "mve_viwdupq_m_wb_u<mode>_insn"
+   [(set (match_operand:MVE_2 0 "s_register_operand" "=w")
+ 	(unspec:MVE_2 [(match_operand:MVE_2 2 "s_register_operand" "0")
+ 		       (match_operand:SI 3 "s_register_operand" "1")
+ 		       (subreg:SI (match_operand:DI 4 "s_register_operand" "r") 4)
+ 		       (match_operand:SI 5 "mve_imm_selective_upto_8" "Rg")
+ 		       (match_operand:HI 6 "vpr_register_operand" "Up")]
+ 	 VIWDUPQ_M))
+    (set (match_operand:SI 1 "s_register_operand" "=Te")
+ 	(unspec:SI [(match_dup 2)
+ 		    (match_dup 3)
+ 		    (subreg:SI (match_dup 4) 4)
+ 		    (match_dup 5)
+ 		    (match_dup 6)]
+ 	 VIWDUPQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;\tviwdupt.u%#<V_sz_elem>\t%q2, %3, %R4, %5"
+   [(set_attr "type" "mve_move")
+    (set_attr "length""8")])
+ 
+ (define_expand "mve_vstrwq_scatter_base_wb_<supf>v4si"
+   [(match_operand:V4SI 0 "s_register_operand" "=w")
+    (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+    (match_operand:V4SI 2 "s_register_operand" "w")
+    (unspec:V4SI [(const_int 0)] VSTRWSBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (V4SImode);
+   emit_insn (
+   gen_mve_vstrwq_scatter_base_wb_<supf>v4si_insn (ignore_wb, operands[0],
+ 						  operands[1], operands[2]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vstrwq_scatter_base_wb_add_<supf>v4si"
+   [(match_operand:V4SI 0 "s_register_operand" "=w")
+    (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+    (match_operand:V4SI 2 "s_register_operand" "0")
+    (unspec:V4SI [(const_int 0)] VSTRWSBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_vec = gen_reg_rtx (V4SImode);
+   emit_insn (
+   gen_mve_vstrwq_scatter_base_wb_<supf>v4si_insn (operands[0], operands[2],
+ 						  operands[1], ignore_vec));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vstrwq_scatter_base_wb_s vstrdq_scatter_base_wb_u]
+ ;;
+ (define_insn "mve_vstrwq_scatter_base_wb_<supf>v4si_insn"
+   [(set (mem:BLK (scratch))
+ 	(unspec:BLK
+ 		[(match_operand:V4SI 1 "s_register_operand" "0")
+ 		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
+ 		 (match_operand:V4SI 3 "s_register_operand" "w")]
+ 	 VSTRWSBWBQ))
+    (set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_dup 1) (match_dup 2)]
+ 	 VSTRWSBWBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[1];
+    ops[1] = operands[2];
+    ops[2] = operands[3];
+    output_asm_insn ("vstrw.u32\t%q2, [%q0, %1]!",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ (define_expand "mve_vstrwq_scatter_base_wb_p_<supf>v4si"
+   [(match_operand:V4SI 0 "s_register_operand" "=w")
+    (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+    (match_operand:V4SI 2 "s_register_operand" "w")
+    (match_operand:HI 3 "vpr_register_operand")
+    (unspec:V4SI [(const_int 0)] VSTRWSBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (V4SImode);
+   emit_insn (
+   gen_mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn (ignore_wb, operands[0],
+ 						    operands[1], operands[2],
+ 						    operands[3]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vstrwq_scatter_base_wb_p_add_<supf>v4si"
+   [(match_operand:V4SI 0 "s_register_operand" "=w")
+    (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+    (match_operand:V4SI 2 "s_register_operand" "0")
+    (match_operand:HI 3 "vpr_register_operand")
+    (unspec:V4SI [(const_int 0)] VSTRWSBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_vec = gen_reg_rtx (V4SImode);
+   emit_insn (
+   gen_mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn (operands[0], operands[2],
+ 						    operands[1], ignore_vec,
+ 						    operands[3]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vstrwq_scatter_base_wb_p_s vstrwq_scatter_base_wb_p_u]
+ ;;
+ (define_insn "mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn"
+  [(set (mem:BLK (scratch))
+        (unspec:BLK
+ 		[(match_operand:V4SI 1 "s_register_operand" "0")
+ 		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
+ 		 (match_operand:V4SI 3 "s_register_operand" "w")
+ 		 (match_operand:HI 4 "vpr_register_operand")]
+ 	VSTRWSBWBQ))
+    (set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_dup 1) (match_dup 2)]
+ 	 VSTRWSBWBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[1];
+    ops[1] = operands[2];
+    ops[2] = operands[3];
+    output_asm_insn ("vpst\;\tvstrwt.u32\t%q2, [%q0, %1]!",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ (define_expand "mve_vstrwq_scatter_base_wb_fv4sf"
+   [(match_operand:V4SI 0 "s_register_operand" "=w")
+    (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+    (match_operand:V4SF 2 "s_register_operand" "w")
+    (unspec:V4SI [(const_int 0)] VSTRWQSBWB_F)]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+   rtx ignore_wb = gen_reg_rtx (V4SImode);
+   emit_insn (
+   gen_mve_vstrwq_scatter_base_wb_fv4sf_insn (ignore_wb,operands[0],
+ 					     operands[1], operands[2]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vstrwq_scatter_base_wb_add_fv4sf"
+   [(match_operand:V4SI 0 "s_register_operand" "=w")
+    (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+    (match_operand:V4SI 2 "s_register_operand" "0")
+    (unspec:V4SI [(const_int 0)] VSTRWQSBWB_F)]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+   rtx ignore_vec = gen_reg_rtx (V4SFmode);
+   emit_insn (
+   gen_mve_vstrwq_scatter_base_wb_fv4sf_insn (operands[0], operands[2],
+ 					     operands[1], ignore_vec));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vstrwq_scatter_base_wb_f]
+ ;;
+ (define_insn "mve_vstrwq_scatter_base_wb_fv4sf_insn"
+  [(set (mem:BLK (scratch))
+        (unspec:BLK
+ 		[(match_operand:V4SI 1 "s_register_operand" "0")
+ 		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
+ 		 (match_operand:V4SF 3 "s_register_operand" "w")]
+ 	 VSTRWQSBWB_F))
+    (set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_dup 1) (match_dup 2)]
+ 	 VSTRWQSBWB_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[1];
+    ops[1] = operands[2];
+    ops[2] = operands[3];
+    output_asm_insn ("vstrw.u32\t%q2, [%q0, %1]!",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ (define_expand "mve_vstrwq_scatter_base_wb_p_fv4sf"
+   [(match_operand:V4SI 0 "s_register_operand" "=w")
+    (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+    (match_operand:V4SF 2 "s_register_operand" "w")
+    (match_operand:HI 3 "vpr_register_operand")
+    (unspec:V4SI [(const_int 0)] VSTRWQSBWB_F)]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+   rtx ignore_wb = gen_reg_rtx (V4SImode);
+   emit_insn (
+   gen_mve_vstrwq_scatter_base_wb_p_fv4sf_insn (ignore_wb, operands[0],
+ 					       operands[1], operands[2],
+ 					       operands[3]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vstrwq_scatter_base_wb_p_add_fv4sf"
+   [(match_operand:V4SI 0 "s_register_operand" "=w")
+    (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+    (match_operand:V4SI 2 "s_register_operand" "0")
+    (match_operand:HI 3 "vpr_register_operand")
+    (unspec:V4SI [(const_int 0)] VSTRWQSBWB_F)]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+   rtx ignore_vec = gen_reg_rtx (V4SFmode);
+   emit_insn (
+   gen_mve_vstrwq_scatter_base_wb_p_fv4sf_insn (operands[0], operands[2],
+ 					       operands[1], ignore_vec,
+ 					       operands[3]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vstrwq_scatter_base_wb_p_f]
+ ;;
+ (define_insn "mve_vstrwq_scatter_base_wb_p_fv4sf_insn"
+  [(set (mem:BLK (scratch))
+        (unspec:BLK
+ 		[(match_operand:V4SI 1 "s_register_operand" "0")
+ 		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
+ 		 (match_operand:V4SF 3 "s_register_operand" "w")
+ 		 (match_operand:HI 4 "vpr_register_operand")]
+ 	VSTRWQSBWB_F))
+    (set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_dup 1) (match_dup 2)]
+ 	 VSTRWQSBWB_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[1];
+    ops[1] = operands[2];
+    ops[2] = operands[3];
+    output_asm_insn ("vpst\;\tvstrwt.u32\t%q2, [%q0, %1]!",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ (define_expand "mve_vstrdq_scatter_base_wb_<supf>v2di"
+   [(match_operand:V2DI 0 "s_register_operand" "=w")
+    (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+    (match_operand:V2DI 2 "s_register_operand" "w")
+    (unspec:V2DI [(const_int 0)] VSTRDSBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (V2DImode);
+   emit_insn (
+   gen_mve_vstrdq_scatter_base_wb_<supf>v2di_insn (ignore_wb, operands[0],
+ 						  operands[1], operands[2]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vstrdq_scatter_base_wb_add_<supf>v2di"
+   [(match_operand:V2DI 0 "s_register_operand" "=w")
+    (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+    (match_operand:V2DI 2 "s_register_operand" "0")
+    (unspec:V2DI [(const_int 0)] VSTRDSBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_vec = gen_reg_rtx (V2DImode);
+   emit_insn (
+   gen_mve_vstrdq_scatter_base_wb_<supf>v2di_insn (operands[0], operands[2],
+ 						  operands[1], ignore_vec));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vstrdq_scatter_base_wb_s vstrdq_scatter_base_wb_u]
+ ;;
+ (define_insn "mve_vstrdq_scatter_base_wb_<supf>v2di_insn"
+   [(set (mem:BLK (scratch))
+ 	(unspec:BLK
+ 		[(match_operand:V2DI 1 "s_register_operand" "0")
+ 		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
+ 		 (match_operand:V2DI 3 "s_register_operand" "w")]
+ 	 VSTRDSBWBQ))
+    (set (match_operand:V2DI 0 "s_register_operand" "=&w")
+ 	(unspec:V2DI [(match_dup 1) (match_dup 2)]
+ 	 VSTRDSBWBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[1];
+    ops[1] = operands[2];
+    ops[2] = operands[3];
+    output_asm_insn ("vstrd.u64\t%q2, [%q0, %1]!",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ (define_expand "mve_vstrdq_scatter_base_wb_p_<supf>v2di"
+   [(match_operand:V2DI 0 "s_register_operand" "=w")
+    (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+    (match_operand:V2DI 2 "s_register_operand" "w")
+    (match_operand:HI 3 "vpr_register_operand")
+    (unspec:V2DI [(const_int 0)] VSTRDSBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (V2DImode);
+   emit_insn (
+   gen_mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn (ignore_wb, operands[0],
+ 						    operands[1], operands[2],
+ 						    operands[3]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vstrdq_scatter_base_wb_p_add_<supf>v2di"
+   [(match_operand:V2DI 0 "s_register_operand" "=w")
+    (match_operand:SI 1 "mve_vldrd_immediate" "Ri")
+    (match_operand:V2DI 2 "s_register_operand" "0")
+    (match_operand:HI 3 "vpr_register_operand")
+    (unspec:V2DI [(const_int 0)] VSTRDSBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_vec = gen_reg_rtx (V2DImode);
+   emit_insn (
+   gen_mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn (operands[0], operands[2],
+ 						    operands[1], ignore_vec,
+ 						    operands[3]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vstrdq_scatter_base_wb_p_s vstrdq_scatter_base_wb_p_u]
+ ;;
+ (define_insn "mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn"
+   [(set (mem:BLK (scratch))
+ 	(unspec:BLK
+ 		[(match_operand:V2DI 1 "s_register_operand" "0")
+ 		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
+ 		 (match_operand:V2DI 3 "s_register_operand" "w")
+ 		 (match_operand:HI 4 "vpr_register_operand")]
+ 	 VSTRDSBWBQ))
+    (set (match_operand:V2DI 0 "s_register_operand" "=w")
+ 	(unspec:V2DI [(match_dup 1) (match_dup 2)]
+ 	 VSTRDSBWBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[1];
+    ops[1] = operands[2];
+    ops[2] = operands[3];
+    output_asm_insn ("vpst\;\tvstrdt.u64\t%q2, [%q0, %1]!",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ (define_expand "mve_vldrwq_gather_base_wb_<supf>v4si"
+   [(match_operand:V4SI 0 "s_register_operand")
+    (match_operand:V4SI 1 "s_register_operand")
+    (match_operand:SI 2 "mve_vldrd_immediate")
+    (unspec:V4SI [(const_int 0)] VLDRWGBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_result = gen_reg_rtx (V4SImode);
+   emit_insn (
+   gen_mve_vldrwq_gather_base_wb_<supf>v4si_insn (ignore_result, operands[0],
+ 						 operands[1], operands[2]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vldrwq_gather_base_nowb_<supf>v4si"
+   [(match_operand:V4SI 0 "s_register_operand")
+    (match_operand:V4SI 1 "s_register_operand")
+    (match_operand:SI 2 "mve_vldrd_immediate")
+    (unspec:V4SI [(const_int 0)] VLDRWGBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (V4SImode);
+   emit_insn (
+   gen_mve_vldrwq_gather_base_wb_<supf>v4si_insn (operands[0], ignore_wb,
+ 						 operands[1], operands[2]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vldrwq_gather_base_wb_s vldrwq_gather_base_wb_u]
+ ;;
+ (define_insn "mve_vldrwq_gather_base_wb_<supf>v4si_insn"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=&w")
+ 	(unspec:V4SI [(match_operand:V4SI 2 "s_register_operand" "1")
+ 		      (match_operand:SI 3 "mve_vldrd_immediate" "Ri")
+ 		      (mem:BLK (scratch))]
+ 	 VLDRWGBWBQ))
+    (set (match_operand:V4SI 1 "s_register_operand" "=&w")
+ 	(unspec:V4SI [(match_dup 2) (match_dup 3)]
+ 	 VLDRWGBWBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[2];
+    ops[2] = operands[3];
+    output_asm_insn ("vldrw.u32\t%q0, [%q1, %2]!",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ (define_expand "mve_vldrwq_gather_base_wb_z_<supf>v4si"
+   [(match_operand:V4SI 0 "s_register_operand")
+    (match_operand:V4SI 1 "s_register_operand")
+    (match_operand:SI 2 "mve_vldrd_immediate")
+    (match_operand:HI 3 "vpr_register_operand")
+    (unspec:V4SI [(const_int 0)] VLDRWGBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_result = gen_reg_rtx (V4SImode);
+   emit_insn (
+   gen_mve_vldrwq_gather_base_wb_z_<supf>v4si_insn (ignore_result, operands[0],
+ 						   operands[1], operands[2],
+ 						   operands[3]));
+   DONE;
+ })
+ (define_expand "mve_vldrwq_gather_base_nowb_z_<supf>v4si"
+   [(match_operand:V4SI 0 "s_register_operand")
+    (match_operand:V4SI 1 "s_register_operand")
+    (match_operand:SI 2 "mve_vldrd_immediate")
+    (match_operand:HI 3 "vpr_register_operand")
+    (unspec:V4SI [(const_int 0)] VLDRWGBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (V4SImode);
+   emit_insn (
+   gen_mve_vldrwq_gather_base_wb_z_<supf>v4si_insn (operands[0], ignore_wb,
+ 						   operands[1], operands[2],
+ 						   operands[3]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vldrwq_gather_base_wb_z_s vldrwq_gather_base_wb_z_u]
+ ;;
+ (define_insn "mve_vldrwq_gather_base_wb_z_<supf>v4si_insn"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=&w")
+ 	(unspec:V4SI [(match_operand:V4SI 2 "s_register_operand" "1")
+ 		      (match_operand:SI 3 "mve_vldrd_immediate" "Ri")
+ 		      (match_operand:HI 4 "vpr_register_operand" "Up")
+ 		      (mem:BLK (scratch))]
+ 	 VLDRWGBWBQ))
+    (set (match_operand:V4SI 1 "s_register_operand" "=&w")
+ 	(unspec:V4SI [(match_dup 2) (match_dup 3)]
+ 	 VLDRWGBWBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[2];
+    ops[2] = operands[3];
+    output_asm_insn ("vpst\;vldrwt.u32\t%q0, [%q1, %2]!",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ (define_expand "mve_vldrwq_gather_base_wb_fv4sf"
+   [(match_operand:V4SI 0 "s_register_operand")
+    (match_operand:V4SI 1 "s_register_operand")
+    (match_operand:SI 2 "mve_vldrd_immediate")
+    (unspec:V4SI [(const_int 0)] VLDRWQGBWB_F)]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+   rtx ignore_result = gen_reg_rtx (V4SFmode);
+   emit_insn (
+   gen_mve_vldrwq_gather_base_wb_fv4sf_insn (ignore_result, operands[0],
+ 					    operands[1], operands[2]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vldrwq_gather_base_nowb_fv4sf"
+   [(match_operand:V4SF 0 "s_register_operand")
+    (match_operand:V4SI 1 "s_register_operand")
+    (match_operand:SI 2 "mve_vldrd_immediate")
+    (unspec:V4SI [(const_int 0)] VLDRWQGBWB_F)]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+   rtx ignore_wb = gen_reg_rtx (V4SImode);
+   emit_insn (
+   gen_mve_vldrwq_gather_base_wb_fv4sf_insn (operands[0], ignore_wb,
+ 					    operands[1], operands[2]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vldrwq_gather_base_wb_f]
+ ;;
+ (define_insn "mve_vldrwq_gather_base_wb_fv4sf_insn"
+   [(set (match_operand:V4SF 0 "s_register_operand" "=&w")
+ 	(unspec:V4SF [(match_operand:V4SI 2 "s_register_operand" "1")
+ 		      (match_operand:SI 3 "mve_vldrd_immediate" "Ri")
+ 		      (mem:BLK (scratch))]
+ 	 VLDRWQGBWB_F))
+    (set (match_operand:V4SI 1 "s_register_operand" "=&w")
+ 	(unspec:V4SI [(match_dup 2) (match_dup 3)]
+ 	 VLDRWQGBWB_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[2];
+    ops[2] = operands[3];
+    output_asm_insn ("vldrw.u32\t%q0, [%q1, %2]!",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ (define_expand "mve_vldrwq_gather_base_wb_z_fv4sf"
+   [(match_operand:V4SI 0 "s_register_operand")
+    (match_operand:V4SI 1 "s_register_operand")
+    (match_operand:SI 2 "mve_vldrd_immediate")
+    (match_operand:HI 3 "vpr_register_operand")
+    (unspec:V4SI [(const_int 0)] VLDRWQGBWB_F)]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+   rtx ignore_result = gen_reg_rtx (V4SFmode);
+   emit_insn (
+   gen_mve_vldrwq_gather_base_wb_z_fv4sf_insn (ignore_result, operands[0],
+ 					      operands[1], operands[2],
+ 					      operands[3]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vldrwq_gather_base_nowb_z_fv4sf"
+   [(match_operand:V4SF 0 "s_register_operand")
+    (match_operand:V4SI 1 "s_register_operand")
+    (match_operand:SI 2 "mve_vldrd_immediate")
+    (match_operand:HI 3 "vpr_register_operand")
+    (unspec:V4SI [(const_int 0)] VLDRWQGBWB_F)]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+   rtx ignore_wb = gen_reg_rtx (V4SImode);
+   emit_insn (
+   gen_mve_vldrwq_gather_base_wb_z_fv4sf_insn (operands[0], ignore_wb,
+ 					      operands[1], operands[2],
+ 					      operands[3]));
+   DONE;
+ })
+ 
+ ;;
+ ;; [vldrwq_gather_base_wb_z_f]
+ ;;
+ (define_insn "mve_vldrwq_gather_base_wb_z_fv4sf_insn"
+   [(set (match_operand:V4SF 0 "s_register_operand" "=&w")
+ 	(unspec:V4SF [(match_operand:V4SI 2 "s_register_operand" "1")
+ 		      (match_operand:SI 3 "mve_vldrd_immediate" "Ri")
+ 		      (match_operand:HI 4 "vpr_register_operand" "Up")
+ 		      (mem:BLK (scratch))]
+ 	 VLDRWQGBWB_F))
+    (set (match_operand:V4SI 1 "s_register_operand" "=&w")
+ 	(unspec:V4SI [(match_dup 2) (match_dup 3)]
+ 	 VLDRWQGBWB_F))
+   ]
+   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[2];
+    ops[2] = operands[3];
+    output_asm_insn ("vpst\;vldrwt.u32\t%q0, [%q1, %2]!",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ (define_expand "mve_vldrdq_gather_base_wb_<supf>v2di"
+   [(match_operand:V2DI 0 "s_register_operand")
+    (match_operand:V2DI 1 "s_register_operand")
+    (match_operand:SI 2 "mve_vldrd_immediate")
+    (unspec:V2DI [(const_int 0)] VLDRDGBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_result = gen_reg_rtx (V2DImode);
+   emit_insn (
+   gen_mve_vldrdq_gather_base_wb_<supf>v2di_insn (ignore_result, operands[0],
+ 						 operands[1], operands[2]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vldrdq_gather_base_nowb_<supf>v2di"
+   [(match_operand:V2DI 0 "s_register_operand")
+    (match_operand:V2DI 1 "s_register_operand")
+    (match_operand:SI 2 "mve_vldrd_immediate")
+    (unspec:V2DI [(const_int 0)] VLDRDGBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (V2DImode);
+   emit_insn (
+   gen_mve_vldrdq_gather_base_wb_<supf>v2di_insn (operands[0], ignore_wb,
+ 						 operands[1], operands[2]));
+   DONE;
+ })
+ 
+ 
+ ;;
+ ;; [vldrdq_gather_base_wb_s vldrdq_gather_base_wb_u]
+ ;;
+ (define_insn "mve_vldrdq_gather_base_wb_<supf>v2di_insn"
+   [(set (match_operand:V2DI 0 "s_register_operand" "=&w")
+ 	(unspec:V2DI [(match_operand:V2DI 2 "s_register_operand" "1")
+ 		      (match_operand:SI 3 "mve_vldrd_immediate" "Ri")
+ 		      (mem:BLK (scratch))]
+ 	 VLDRDGBWBQ))
+    (set (match_operand:V2DI 1 "s_register_operand" "=&w")
+ 	(unspec:V2DI [(match_dup 2) (match_dup 3)]
+ 	 VLDRDGBWBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[2];
+    ops[2] = operands[3];
+    output_asm_insn ("vldrd.64\t%q0, [%q1, %2]!",ops);
+    return "";
+ }
+   [(set_attr "length" "4")])
+ 
+ (define_expand "mve_vldrdq_gather_base_wb_z_<supf>v2di"
+   [(match_operand:V2DI 0 "s_register_operand")
+    (match_operand:V2DI 1 "s_register_operand")
+    (match_operand:SI 2 "mve_vldrd_immediate")
+    (match_operand:HI 3 "vpr_register_operand")
+    (unspec:V2DI [(const_int 0)] VLDRDGBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_result = gen_reg_rtx (V2DImode);
+   emit_insn (
+   gen_mve_vldrdq_gather_base_wb_z_<supf>v2di_insn (ignore_result, operands[0],
+ 						   operands[1], operands[2],
+ 						   operands[3]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vldrdq_gather_base_nowb_z_<supf>v2di"
+   [(match_operand:V2DI 0 "s_register_operand")
+    (match_operand:V2DI 1 "s_register_operand")
+    (match_operand:SI 2 "mve_vldrd_immediate")
+    (match_operand:HI 3 "vpr_register_operand")
+    (unspec:V2DI [(const_int 0)] VLDRDGBWBQ)]
+   "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (V2DImode);
+   emit_insn (
+   gen_mve_vldrdq_gather_base_wb_z_<supf>v2di_insn (operands[0], ignore_wb,
+ 						   operands[1], operands[2],
+ 						   operands[3]));
+   DONE;
+ })
+ 
+ (define_insn "get_fpscr_nzcvqc"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+    (unspec:SI [(reg:SI VFPCC_REGNUM)] UNSPEC_GET_FPSCR_NZCVQC))]
+  "TARGET_HAVE_MVE"
+  "vmrs\\t%0, FPSCR_nzcvqc"
+   [(set_attr "type" "mve_move")])
+ 
+ (define_insn "set_fpscr_nzcvqc"
+  [(set (reg:SI VFPCC_REGNUM)
+    (unspec_volatile:SI [(match_operand:SI 0 "register_operand" "r")]
+     VUNSPEC_SET_FPSCR_NZCVQC))]
+  "TARGET_HAVE_MVE"
+  "vmsr\\tFPSCR_nzcvqc, %0"
+   [(set_attr "type" "mve_move")])
+ 
+ ;;
+ ;; [vldrdq_gather_base_wb_z_s vldrdq_gather_base_wb_z_u]
+ ;;
+ (define_insn "mve_vldrdq_gather_base_wb_z_<supf>v2di_insn"
+   [(set (match_operand:V2DI 0 "s_register_operand" "=&w")
+ 	(unspec:V2DI [(match_operand:V2DI 2 "s_register_operand" "1")
+ 		      (match_operand:SI 3 "mve_vldrd_immediate" "Ri")
+ 		      (match_operand:HI 4 "vpr_register_operand" "Up")
+ 		      (mem:BLK (scratch))]
+ 	 VLDRDGBWBQ))
+    (set (match_operand:V2DI 1 "s_register_operand" "=&w")
+ 	(unspec:V2DI [(match_dup 2) (match_dup 3)]
+ 	 VLDRDGBWBQ))
+   ]
+   "TARGET_HAVE_MVE"
+ {
+    rtx ops[3];
+    ops[0] = operands[0];
+    ops[1] = operands[2];
+    ops[2] = operands[3];
+    output_asm_insn ("vpst\;vldrdt.u64\t%q0, [%q1, %2]!",ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ ;;
+ ;; [vadciq_m_s, vadciq_m_u])
+ ;;
+ (define_insn "mve_vadciq_m_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "0")
+ 		      (match_operand:V4SI 2 "s_register_operand" "w")
+ 		      (match_operand:V4SI 3 "s_register_operand" "w")
+ 		      (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VADCIQ_M))
+    (set (reg:SI VFPCC_REGNUM)
+ 	(unspec:SI [(const_int 0)]
+ 	 VADCIQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vadcit.i32\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length" "8")])
+ 
+ ;;
+ ;; [vadciq_u, vadciq_s])
+ ;;
+ (define_insn "mve_vadciq_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		      (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VADCIQ))
+    (set (reg:SI VFPCC_REGNUM)
+ 	(unspec:SI [(const_int 0)]
+ 	 VADCIQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vadci.i32\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length" "4")])
+ 
+ ;;
+ ;; [vadcq_m_s, vadcq_m_u])
+ ;;
+ (define_insn "mve_vadcq_m_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "0")
+ 		      (match_operand:V4SI 2 "s_register_operand" "w")
+ 		      (match_operand:V4SI 3 "s_register_operand" "w")
+ 		      (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VADCQ_M))
+    (set (reg:SI VFPCC_REGNUM)
+ 	(unspec:SI [(reg:SI VFPCC_REGNUM)]
+ 	 VADCQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vadct.i32\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length" "8")])
+ 
+ ;;
+ ;; [vadcq_u, vadcq_s])
+ ;;
+ (define_insn "mve_vadcq_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		       (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VADCQ))
+    (set (reg:SI VFPCC_REGNUM)
+ 	(unspec:SI [(reg:SI VFPCC_REGNUM)]
+ 	 VADCQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vadc.i32\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length" "4")
+    (set_attr "conds" "set")])
+ 
+ ;;
+ ;; [vsbciq_m_u, vsbciq_m_s])
+ ;;
+ (define_insn "mve_vsbciq_m_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		      (match_operand:V4SI 2 "s_register_operand" "w")
+ 		      (match_operand:V4SI 3 "s_register_operand" "w")
+ 		      (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSBCIQ_M))
+    (set (reg:SI VFPCC_REGNUM)
+ 	(unspec:SI [(const_int 0)]
+ 	 VSBCIQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vsbcit.i32\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length" "8")])
+ 
+ ;;
+ ;; [vsbciq_s, vsbciq_u])
+ ;;
+ (define_insn "mve_vsbciq_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		      (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VSBCIQ))
+    (set (reg:SI VFPCC_REGNUM)
+ 	(unspec:SI [(const_int 0)]
+ 	 VSBCIQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vsbci.i32\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length" "4")])
+ 
+ ;;
+ ;; [vsbcq_m_u, vsbcq_m_s])
+ ;;
+ (define_insn "mve_vsbcq_m_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		      (match_operand:V4SI 2 "s_register_operand" "w")
+ 		      (match_operand:V4SI 3 "s_register_operand" "w")
+ 		      (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 VSBCQ_M))
+    (set (reg:SI VFPCC_REGNUM)
+ 	(unspec:SI [(reg:SI VFPCC_REGNUM)]
+ 	 VSBCQ_M))
+   ]
+   "TARGET_HAVE_MVE"
+   "vpst\;vsbct.i32\t%q0, %q2, %q3"
+   [(set_attr "type" "mve_move")
+    (set_attr "length" "8")])
+ 
+ ;;
+ ;; [vsbcq_s, vsbcq_u])
+ ;;
+ (define_insn "mve_vsbcq_<supf>v4si"
+   [(set (match_operand:V4SI 0 "s_register_operand" "=w")
+ 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w")
+ 		      (match_operand:V4SI 2 "s_register_operand" "w")]
+ 	 VSBCQ))
+    (set (reg:SI VFPCC_REGNUM)
+ 	(unspec:SI [(reg:SI VFPCC_REGNUM)]
+ 	 VSBCQ))
+   ]
+   "TARGET_HAVE_MVE"
+   "vsbc.i32\t%q0, %q1, %q2"
+   [(set_attr "type" "mve_move")
+    (set_attr "length" "4")])
+ 
+ ;;
+ ;; [vst2q])
+ ;;
+ (define_insn "mve_vst2q<mode>"
+   [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
+ 	(unspec:OI [(match_operand:OI 1 "s_register_operand" "w")
+ 		    (unspec:MVE_VLD_ST [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+ 	 VST2Q))
+   ]
+   "(TARGET_HAVE_MVE && VALID_MVE_SI_MODE (<MODE>mode))
+    || (TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE (<MODE>mode))"
+ {
+    rtx ops[4];
+    int regno = REGNO (operands[1]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1] = gen_rtx_REG (TImode, regno + 4);
+    rtx reg  = operands[0];
+    while (reg && !REG_P (reg))
+     reg = XEXP (reg, 0);
+    gcc_assert (REG_P (reg));
+    ops[2] = reg;
+    ops[3] = operands[0];
+    output_asm_insn ("vst20.<V_sz_elem>\t{%q0, %q1}, [%2]\n\t"
+ 		    "vst21.<V_sz_elem>\t{%q0, %q1}, %3", ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vld2q])
+ ;;
+ (define_insn "mve_vld2q<mode>"
+   [(set (match_operand:OI 0 "s_register_operand" "=w")
+ 	(unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um")
+ 		    (unspec:MVE_VLD_ST [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+ 	 VLD2Q))
+   ]
+   "(TARGET_HAVE_MVE && VALID_MVE_SI_MODE (<MODE>mode))
+    || (TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE (<MODE>mode))"
+ {
+    rtx ops[4];
+    int regno = REGNO (operands[0]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1] = gen_rtx_REG (TImode, regno + 4);
+    rtx reg  = operands[1];
+    while (reg && !REG_P (reg))
+     reg = XEXP (reg, 0);
+    gcc_assert (REG_P (reg));
+    ops[2] = reg;
+    ops[3] = operands[1];
+    output_asm_insn ("vld20.<V_sz_elem>\t{%q0, %q1}, [%2]\n\t"
+ 		    "vld21.<V_sz_elem>\t{%q0, %q1}, %3", ops);
+    return "";
+ }
+   [(set_attr "length" "8")])
+ 
+ ;;
+ ;; [vld4q])
+ ;;
+ (define_insn "mve_vld4q<mode>"
+   [(set (match_operand:XI 0 "s_register_operand" "=w")
+ 	(unspec:XI [(match_operand:XI 1 "neon_struct_operand" "Um")
+ 		    (unspec:MVE_VLD_ST [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+ 	 VLD4Q))
+   ]
+   "(TARGET_HAVE_MVE && VALID_MVE_SI_MODE (<MODE>mode))
+    || (TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE (<MODE>mode))"
+ {
+    rtx ops[6];
+    int regno = REGNO (operands[0]);
+    ops[0] = gen_rtx_REG (TImode, regno);
+    ops[1] = gen_rtx_REG (TImode, regno+4);
+    ops[2] = gen_rtx_REG (TImode, regno+8);
+    ops[3] = gen_rtx_REG (TImode, regno + 12);
+    rtx reg  = operands[1];
+    while (reg && !REG_P (reg))
+     reg = XEXP (reg, 0);
+    gcc_assert (REG_P (reg));
+    ops[4] = reg;
+    ops[5] = operands[1];
+    output_asm_insn ("vld40.<V_sz_elem>\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
+ 		    "vld41.<V_sz_elem>\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
+ 		    "vld42.<V_sz_elem>\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
+ 		    "vld43.<V_sz_elem>\t{%q0, %q1, %q2, %q3}, %5", ops);
+    return "";
+ }
+   [(set_attr "length" "16")])
+ ;;
+ ;; [vgetq_lane_u, vgetq_lane_s, vgetq_lane_f])
+ ;;
+ (define_insn "mve_vec_extract<mode><V_elem_l>"
+  [(set (match_operand:<V_elem> 0 "nonimmediate_operand" "=r")
+    (vec_select:<V_elem>
+     (match_operand:MVE_VLD_ST 1 "s_register_operand" "w")
+     (parallel [(match_operand:SI 2 "immediate_operand" "i")])))]
+   "(TARGET_HAVE_MVE && VALID_MVE_SI_MODE (<MODE>mode))
+    || (TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE (<MODE>mode))"
+ {
+   if (BYTES_BIG_ENDIAN)
+     {
+       int elt = INTVAL (operands[2]);
+       elt = GET_MODE_NUNITS (<MODE>mode) - 1 - elt;
+       operands[2] = GEN_INT (elt);
+     }
+   return "vmov.<V_extr_elem>\t%0, %q1[%c2]";
+ }
+  [(set_attr "type" "mve_move")])
+ 
+ (define_insn "mve_vec_extractv2didi"
+  [(set (match_operand:DI 0 "nonimmediate_operand" "=r")
+    (vec_select:DI
+     (match_operand:V2DI 1 "s_register_operand" "w")
+     (parallel [(match_operand:SI 2 "immediate_operand" "i")])))]
+   "TARGET_HAVE_MVE"
+ {
+   int elt = INTVAL (operands[2]);
+   if (BYTES_BIG_ENDIAN)
+     elt = 1 - elt;
+ 
+   if (elt == 0)
+    return "vmov\t%Q0, %R0, %e1";
+   else
+    return "vmov\t%Q0, %R0, %f1";
+ }
+  [(set_attr "type" "mve_move")])
+ 
+ (define_insn "*mve_vec_extract_sext_internal<mode>"
+  [(set (match_operand:SI 0 "s_register_operand" "=r")
+    (sign_extend:SI
+     (vec_select:<V_elem>
+      (match_operand:MVE_2 1 "s_register_operand" "w")
+      (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))]
+   "(TARGET_HAVE_MVE && VALID_MVE_SI_MODE (<MODE>mode))
+    || (TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE (<MODE>mode))"
+ {
+   if (BYTES_BIG_ENDIAN)
+     {
+       int elt = INTVAL (operands[2]);
+       elt = GET_MODE_NUNITS (<MODE>mode) - 1 - elt;
+       operands[2] = GEN_INT (elt);
+     }
+   return "vmov.s<V_sz_elem>\t%0, %q1[%c2]";
+ }
+  [(set_attr "type" "mve_move")])
+ 
+ (define_insn "*mve_vec_extract_zext_internal<mode>"
+  [(set (match_operand:SI 0 "s_register_operand" "=r")
+    (zero_extend:SI
+     (vec_select:<V_elem>
+      (match_operand:MVE_2 1 "s_register_operand" "w")
+      (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))]
+   "(TARGET_HAVE_MVE && VALID_MVE_SI_MODE (<MODE>mode))
+    || (TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE (<MODE>mode))"
+ {
+   if (BYTES_BIG_ENDIAN)
+     {
+       int elt = INTVAL (operands[2]);
+       elt = GET_MODE_NUNITS (<MODE>mode) - 1 - elt;
+       operands[2] = GEN_INT (elt);
+     }
+   return "vmov.u<V_sz_elem>\t%0, %q1[%c2]";
+ }
+  [(set_attr "type" "mve_move")])
+ 
+ ;;
+ ;; [vsetq_lane_u, vsetq_lane_s, vsetq_lane_f])
+ ;;
+ (define_insn "mve_vec_set<mode>_internal"
+  [(set (match_operand:VQ2 0 "s_register_operand" "=w")
+        (vec_merge:VQ2
+ 	(vec_duplicate:VQ2
+ 	  (match_operand:<V_elem> 1 "nonimmediate_operand" "r"))
+ 	(match_operand:VQ2 3 "s_register_operand" "0")
+ 	(match_operand:SI 2 "immediate_operand" "i")))]
+   "(TARGET_HAVE_MVE && VALID_MVE_SI_MODE (<MODE>mode))
+    || (TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE (<MODE>mode))"
+ {
+   int elt = ffs ((int) INTVAL (operands[2])) - 1;
+   if (BYTES_BIG_ENDIAN)
+     elt = GET_MODE_NUNITS (<MODE>mode) - 1 - elt;
+   operands[2] = GEN_INT (elt);
+ 
+   return "vmov.<V_sz_elem>\t%q0[%c2], %1";
+ }
+  [(set_attr "type" "mve_move")])
+ 
+ (define_insn "mve_vec_setv2di_internal"
+  [(set (match_operand:V2DI 0 "s_register_operand" "=w")
+        (vec_merge:V2DI
+ 	(vec_duplicate:V2DI
+ 	  (match_operand:DI 1 "nonimmediate_operand" "r"))
+ 	(match_operand:V2DI 3 "s_register_operand" "0")
+ 	(match_operand:SI 2 "immediate_operand" "i")))]
+  "TARGET_HAVE_MVE"
+ {
+   int elt = ffs ((int) INTVAL (operands[2])) - 1;
+   if (BYTES_BIG_ENDIAN)
+     elt = 1 - elt;
+ 
+   if (elt == 0)
+    return "vmov\t%e0, %Q1, %R1";
+   else
+    return "vmov\t%f0, %J1, %K1";
+ }
+  [(set_attr "type" "mve_move")])
+ 
+ ;;
+ ;; [uqrshll_di]
+ ;;
+ (define_insn "mve_uqrshll_sat<supf>_di"
+   [(set (match_operand:DI 0 "arm_general_register_operand" "+r")
+ 	(unspec:DI [(match_operand:DI 1 "arm_general_register_operand" "r")
+ 		    (match_operand:SI 2 "s_register_operand" "r")]
+ 	 UQRSHLLQ))]
+   "TARGET_HAVE_MVE"
+   "uqrshll%?\\t%Q1, %R1, #<supf>, %2"
+   [(set_attr "predicable" "yes")])
+ 
+ ;;
+ ;; [sqrshrl_di]
+ ;;
+ (define_insn "mve_sqrshrl_sat<supf>_di"
+   [(set (match_operand:DI 0 "arm_general_register_operand" "+r")
+ 	(unspec:DI [(match_operand:DI 1 "arm_general_register_operand" "r")
+ 		    (match_operand:SI 2 "s_register_operand" "r")]
+ 	 SQRSHRLQ))]
+   "TARGET_HAVE_MVE"
+   "sqrshrl%?\\t%Q1, %R1, #<supf>, %2"
+   [(set_attr "predicable" "yes")])
+ 
+ ;;
+ ;; [uqrshl_si]
+ ;;
+ (define_insn "mve_uqrshl_si"
+   [(set (match_operand:SI 0 "arm_general_register_operand" "+r")
+ 	(unspec:SI [(match_operand:SI 1 "arm_general_register_operand" "r")
+ 		    (match_operand:SI 2 "s_register_operand" "r")]
+ 	 UQRSHL))]
+   "TARGET_HAVE_MVE"
+   "uqrshl%?\\t%1, %2"
+   [(set_attr "predicable" "yes")])
+ 
+ ;;
+ ;; [sqrshr_si]
+ ;;
+ (define_insn "mve_sqrshr_si"
+   [(set (match_operand:SI 0 "arm_general_register_operand" "+r")
+ 	(unspec:SI [(match_operand:SI 1 "arm_general_register_operand" "r")
+ 		    (match_operand:SI 2 "s_register_operand" "r")]
+ 	 SQRSHR))]
+   "TARGET_HAVE_MVE"
+   "sqrshr%?\\t%1, %2"
+   [(set_attr "predicable" "yes")])
+ 
+ ;;
+ ;; [uqshll_di]
+ ;;
+ (define_insn "mve_uqshll_di"
+   [(set (match_operand:DI 0 "arm_general_register_operand" "+r")
+ 	(us_ashift:DI (match_operand:DI 1 "arm_general_register_operand" "r")
+ 		      (match_operand:SI 2 "arm_reg_or_long_shift_imm" "rPg")))]
+   "TARGET_HAVE_MVE"
+   "uqshll%?\\t%Q1, %R1, %2"
+   [(set_attr "predicable" "yes")])
+ 
+ ;;
+ ;; [urshrl_di]
+ ;;
+ (define_insn "mve_urshrl_di"
+   [(set (match_operand:DI 0 "arm_general_register_operand" "+r")
+ 	(unspec:DI [(match_operand:DI 1 "arm_general_register_operand" "r")
+ 		    (match_operand:SI 2 "arm_reg_or_long_shift_imm" "rPg")]
+ 	 URSHRL))]
+   "TARGET_HAVE_MVE"
+   "urshrl%?\\t%Q1, %R1, %2"
+   [(set_attr "predicable" "yes")])
+ 
+ ;;
+ ;; [uqshl_si]
+ ;;
+ (define_insn "mve_uqshl_si"
+   [(set (match_operand:SI 0 "arm_general_register_operand" "+r")
+ 	(us_ashift:SI (match_operand:SI 1 "arm_general_register_operand" "r")
+ 		      (match_operand:SI 2 "arm_reg_or_long_shift_imm" "rPg")))]
+   "TARGET_HAVE_MVE"
+   "uqshl%?\\t%1, %2"
+   [(set_attr "predicable" "yes")])
+ 
+ ;;
+ ;; [urshr_si]
+ ;;
+ (define_insn "mve_urshr_si"
+   [(set (match_operand:SI 0 "arm_general_register_operand" "+r")
+ 	(unspec:SI [(match_operand:SI 1 "arm_general_register_operand" "r")
+ 		    (match_operand:SI 2 "arm_reg_or_long_shift_imm" "rPg")]
+ 	 URSHR))]
+   "TARGET_HAVE_MVE"
+   "urshr%?\\t%1, %2"
+   [(set_attr "predicable" "yes")])
+ 
+ ;;
+ ;; [sqshl_si]
+ ;;
+ (define_insn "mve_sqshl_si"
+   [(set (match_operand:SI 0 "arm_general_register_operand" "+r")
+ 	(ss_ashift:SI (match_operand:DI 1 "arm_general_register_operand" "r")
+ 		      (match_operand:SI 2 "arm_reg_or_long_shift_imm" "rPg")))]
+   "TARGET_HAVE_MVE"
+   "sqshl%?\\t%1, %2"
+   [(set_attr "predicable" "yes")])
+ 
+ ;;
+ ;; [srshr_si]
+ ;;
+ (define_insn "mve_srshr_si"
+   [(set (match_operand:SI 0 "arm_general_register_operand" "+r")
+ 	(unspec:SI [(match_operand:DI 1 "arm_general_register_operand" "r")
+ 		    (match_operand:SI 2 "arm_reg_or_long_shift_imm" "rPg")]
+ 	 SRSHR))]
+   "TARGET_HAVE_MVE"
+   "srshr%?\\t%1, %2"
+   [(set_attr "predicable" "yes")])
+ 
+ ;;
+ ;; [srshrl_di]
+ ;;
+ (define_insn "mve_srshrl_di"
+   [(set (match_operand:DI 0 "arm_general_register_operand" "+r")
+ 	(unspec:DI [(match_operand:DI 1 "arm_general_register_operand" "r")
+ 		    (match_operand:SI 2 "arm_reg_or_long_shift_imm" "rPg")]
+ 	 SRSHRL))]
+   "TARGET_HAVE_MVE"
+   "srshrl%?\\t%Q1, %R1, %2"
+   [(set_attr "predicable" "yes")])
+ 
+ ;;
+ ;; [sqshll_di]
+ ;;
+ (define_insn "mve_sqshll_di"
+   [(set (match_operand:DI 0 "arm_general_register_operand" "+r")
+ 	(ss_ashift:DI (match_operand:DI 1 "arm_general_register_operand" "r")
+ 		      (match_operand:SI 2 "arm_reg_or_long_shift_imm" "rPg")))]
+   "TARGET_HAVE_MVE"
+   "sqshll%?\\t%Q1, %R1, %2"
+   [(set_attr "predicable" "yes")])
+ 
+ ;;
+ ;; [vshlcq_m_u vshlcq_m_s]
+ ;;
+ (define_expand "mve_vshlcq_m_vec_<supf><mode>"
+  [(match_operand:MVE_2 0 "s_register_operand")
+   (match_operand:MVE_2 1 "s_register_operand")
+   (match_operand:SI 2 "s_register_operand")
+   (match_operand:SI 3 "mve_imm_32")
+   (match_operand:HI 4 "vpr_register_operand")
+   (unspec:MVE_2 [(const_int 0)] VSHLCQ_M)]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ignore_wb = gen_reg_rtx (SImode);
+   emit_insn (gen_mve_vshlcq_m_<supf><mode> (operands[0], ignore_wb, operands[1],
+ 					    operands[2], operands[3],
+ 					    operands[4]));
+   DONE;
+ })
+ 
+ (define_expand "mve_vshlcq_m_carry_<supf><mode>"
+  [(match_operand:SI 0 "s_register_operand")
+   (match_operand:MVE_2 1 "s_register_operand")
+   (match_operand:SI 2 "s_register_operand")
+   (match_operand:SI 3 "mve_imm_32")
+   (match_operand:HI 4 "vpr_register_operand")
+   (unspec:MVE_2 [(const_int 0)] VSHLCQ_M)]
+  "TARGET_HAVE_MVE"
+ {
+   rtx ignore_vec = gen_reg_rtx (<MODE>mode);
+   emit_insn (gen_mve_vshlcq_m_<supf><mode> (ignore_vec, operands[0],
+ 					    operands[1], operands[2],
+ 					    operands[3], operands[4]));
+   DONE;
+ })
+ 
+ (define_insn "mve_vshlcq_m_<supf><mode>"
+  [(set (match_operand:MVE_2 0 "s_register_operand" "=w")
+        (unspec:MVE_2 [(match_operand:MVE_2 2 "s_register_operand" "0")
+ 		      (match_operand:SI 3 "s_register_operand" "1")
+ 		      (match_operand:SI 4 "mve_imm_32" "Rf")
+ 		      (match_operand:HI 5 "vpr_register_operand" "Up")]
+ 	VSHLCQ_M))
+   (set (match_operand:SI  1 "s_register_operand" "=r")
+        (unspec:SI [(match_dup 2)
+ 		   (match_dup 3)
+ 		   (match_dup 4)
+ 		   (match_dup 5)]
+ 	VSHLCQ_M))
+  ]
+  "TARGET_HAVE_MVE"
+  "vpst\;vshlct\t%q0, %1, %4"
+  [(set_attr "type" "mve_move")
+   (set_attr "length" "8")])
+ 
+ (define_insn "*mve_vec_duplicate<mode>"
+  [(set (match_operand:MVE_VLD_ST 0 "s_register_operand" "=w")
+        (vec_duplicate:MVE_VLD_ST (match_operand:<V_elem> 1 "general_operand" "r")))]
+  "TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT"
+  "vdup.<V_sz_elem>\t%q0, %1"
+  [(set_attr "type" "mve_move")])
+ 
+ ;; CDE instructions on MVE registers.
+ 
+ (define_insn "arm_vcx1qv16qi"
+   [(set (match_operand:V16QI 0 "register_operand" "=t")
+ 	(unspec:V16QI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 			   (match_operand:SI 2 "const_int_mve_cde1_operand" "i")]
+ 	 UNSPEC_VCDE))]
+   "TARGET_CDE && TARGET_HAVE_MVE"
+   "vcx1\\tp%c1, %q0, #%c2"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_vcx1qav16qi"
+   [(set (match_operand:V16QI 0 "register_operand" "=t")
+ 	(unspec:V16QI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 			    (match_operand:V16QI 2 "register_operand" "0")
+ 			    (match_operand:SI 3 "const_int_mve_cde1_operand" "i")]
+ 	 UNSPEC_VCDEA))]
+   "TARGET_CDE && TARGET_HAVE_MVE"
+   "vcx1a\\tp%c1, %q0, #%c3"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_vcx2qv16qi"
+   [(set (match_operand:V16QI 0 "register_operand" "=t")
+ 	(unspec:V16QI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 			  (match_operand:V16QI 2 "register_operand" "t")
+ 			  (match_operand:SI 3 "const_int_mve_cde2_operand" "i")]
+ 	 UNSPEC_VCDE))]
+   "TARGET_CDE && TARGET_HAVE_MVE"
+   "vcx2\\tp%c1, %q0, %q2, #%c3"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_vcx2qav16qi"
+   [(set (match_operand:V16QI 0 "register_operand" "=t")
+ 	(unspec:V16QI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 			  (match_operand:V16QI 2 "register_operand" "0")
+ 			  (match_operand:V16QI 3 "register_operand" "t")
+ 			  (match_operand:SI 4 "const_int_mve_cde2_operand" "i")]
+ 	 UNSPEC_VCDEA))]
+   "TARGET_CDE && TARGET_HAVE_MVE"
+   "vcx2a\\tp%c1, %q0, %q3, #%c4"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_vcx3qv16qi"
+   [(set (match_operand:V16QI 0 "register_operand" "=t")
+ 	(unspec:V16QI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 			  (match_operand:V16QI 2 "register_operand" "t")
+ 			  (match_operand:V16QI 3 "register_operand" "t")
+ 			  (match_operand:SI 4 "const_int_mve_cde3_operand" "i")]
+ 	 UNSPEC_VCDE))]
+   "TARGET_CDE && TARGET_HAVE_MVE"
+   "vcx3\\tp%c1, %q0, %q2, %q3, #%c4"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_vcx3qav16qi"
+   [(set (match_operand:V16QI 0 "register_operand" "=t")
+ 	(unspec:V16QI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 			  (match_operand:V16QI 2 "register_operand" "0")
+ 			  (match_operand:V16QI 3 "register_operand" "t")
+ 			  (match_operand:V16QI 4 "register_operand" "t")
+ 			  (match_operand:SI 5 "const_int_mve_cde3_operand" "i")]
+ 	 UNSPEC_VCDEA))]
+   "TARGET_CDE && TARGET_HAVE_MVE"
+   "vcx3a\\tp%c1, %q0, %q3, %q4, #%c5"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_vcx1q<a>_p_v16qi"
+   [(set (match_operand:V16QI 0 "register_operand" "=t")
+ 	(unspec:V16QI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 			   (match_operand:V16QI 2 "register_operand" "0")
+ 			   (match_operand:SI 3 "const_int_mve_cde1_operand" "i")
+ 			   (match_operand:HI 4 "vpr_register_operand" "Up")]
+ 	 CDE_VCX))]
+   "TARGET_CDE && TARGET_HAVE_MVE"
+   "vpst\;vcx1<a>t\\tp%c1, %q0, #%c3"
+   [(set_attr "type" "coproc")
+    (set_attr "length" "8")]
+ )
+ 
+ (define_insn "arm_vcx2q<a>_p_v16qi"
+   [(set (match_operand:V16QI 0 "register_operand" "=t")
+ 	(unspec:V16QI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 			  (match_operand:V16QI 2 "register_operand" "0")
+ 			  (match_operand:V16QI 3 "register_operand" "t")
+ 			  (match_operand:SI 4 "const_int_mve_cde2_operand" "i")
+ 			  (match_operand:HI 5 "vpr_register_operand" "Up")]
+ 	 CDE_VCX))]
+   "TARGET_CDE && TARGET_HAVE_MVE"
+   "vpst\;vcx2<a>t\\tp%c1, %q0, %q3, #%c4"
+   [(set_attr "type" "coproc")
+    (set_attr "length" "8")]
+ )
+ 
+ (define_insn "arm_vcx3q<a>_p_v16qi"
+   [(set (match_operand:V16QI 0 "register_operand" "=t")
+ 	(unspec:V16QI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 			  (match_operand:V16QI 2 "register_operand" "0")
+ 			  (match_operand:V16QI 3 "register_operand" "t")
+ 			  (match_operand:V16QI 4 "register_operand" "t")
+ 			  (match_operand:SI 5 "const_int_mve_cde3_operand" "i")
+ 			  (match_operand:HI 6 "vpr_register_operand" "Up")]
+ 	 CDE_VCX))]
+   "TARGET_CDE && TARGET_HAVE_MVE"
+   "vpst\;vcx3<a>t\\tp%c1, %q0, %q3, %q4, #%c5"
+   [(set_attr "type" "coproc")
+    (set_attr "length" "8")]
+ )
diff -Nrcpad gcc-9.3.0/gcc/config/arm/neon.md gcc-10.1.0/gcc/config/arm/neon.md
*** gcc-9.3.0/gcc/config/arm/neon.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/neon.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM NEON coprocessor Machine Description
! ;; Copyright (C) 2006-2019 Free Software Foundation, Inc.
  ;; Written by CodeSourcery.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM NEON coprocessor Machine Description
! ;; Copyright (C) 2006-2020 Free Software Foundation, Inc.
  ;; Written by CodeSourcery.
  ;;
  ;; This file is part of GCC.
***************
*** 23,32 ****
  ;; type attribute definitions.
  (define_attr "vqh_mnem" "vadd,vmin,vmax" (const_string "vadd"))
  
  (define_insn "*neon_mov<mode>"
!   [(set (match_operand:VDX 0 "nonimmediate_operand"
  	  "=w,Un,w, w, w,  ?r,?w,?r, ?Us,*r")
! 	(match_operand:VDX 1 "general_operand"
  	  " w,w, Dm,Dn,Uni, w, r, Usi,r,*r"))]
    "TARGET_NEON
     && (register_operand (operands[0], <MODE>mode)
--- 23,42 ----
  ;; type attribute definitions.
  (define_attr "vqh_mnem" "vadd,vmin,vmax" (const_string "vadd"))
  
+ (define_insn "unaligned_storev8qi"
+   [(set (match_operand:V8QI 0 "memory_operand" "=Un")
+ 	(unspec:V8QI [(match_operand:V8QI 1 "s_register_operand" "w")]
+ 		     UNSPEC_UNALIGNED_STORE))]
+   "TARGET_NEON"
+   "*
+   return output_move_neon (operands);
+   "
+   [(set_attr "type" "neon_store1_1reg")])
+ 
  (define_insn "*neon_mov<mode>"
!   [(set (match_operand:VDXMOV 0 "nonimmediate_operand"
  	  "=w,Un,w, w, w,  ?r,?w,?r, ?Us,*r")
! 	(match_operand:VDXMOV 1 "general_operand"
  	  " w,w, Dm,Dn,Uni, w, r, Usi,r,*r"))]
    "TARGET_NEON
     && (register_operand (operands[0], <MODE>mode)
***************
*** 37,43 ****
        int width, is_valid;
        static char templ[40];
  
!       is_valid = neon_immediate_valid_for_move (operands[1], <MODE>mode,
          &operands[1], &width);
  
        gcc_assert (is_valid != 0);
--- 47,53 ----
        int width, is_valid;
        static char templ[40];
  
!       is_valid = simd_immediate_valid_for_move (operands[1], <MODE>mode,
          &operands[1], &width);
  
        gcc_assert (is_valid != 0);
***************
*** 84,90 ****
        int width, is_valid;
        static char templ[40];
  
!       is_valid = neon_immediate_valid_for_move (operands[1], <MODE>mode,
          &operands[1], &width);
  
        gcc_assert (is_valid != 0);
--- 94,100 ----
        int width, is_valid;
        static char templ[40];
  
!       is_valid = simd_immediate_valid_for_move (operands[1], <MODE>mode,
          &operands[1], &width);
  
        gcc_assert (is_valid != 0);
***************
*** 123,132 ****
     sub-reg and may ICE if it can't.  */
  
  (define_expand "movti"
!   [(set (match_operand:TI 0 "nonimmediate_operand" "")
! 	(match_operand:TI 1 "general_operand" ""))]
    "TARGET_NEON"
  {
    if (can_create_pseudo_p ())
      {
        if (!REG_P (operands[0]))
--- 133,144 ----
     sub-reg and may ICE if it can't.  */
  
  (define_expand "movti"
!   [(set (match_operand:TI 0 "nonimmediate_operand")
! 	(match_operand:TI 1 "general_operand"))]
    "TARGET_NEON"
  {
+   gcc_checking_assert (aligned_operand (operands[0], TImode));
+   gcc_checking_assert (aligned_operand (operands[1], TImode));
    if (can_create_pseudo_p ())
      {
        if (!REG_P (operands[0]))
***************
*** 135,144 ****
  })
  
  (define_expand "mov<mode>"
!   [(set (match_operand:VSTRUCT 0 "nonimmediate_operand" "")
! 	(match_operand:VSTRUCT 1 "general_operand" ""))]
!   "TARGET_NEON"
  {
    if (can_create_pseudo_p ())
      {
        if (!REG_P (operands[0]))
--- 147,158 ----
  })
  
  (define_expand "mov<mode>"
!   [(set (match_operand:VSTRUCT 0 "nonimmediate_operand")
! 	(match_operand:VSTRUCT 1 "general_operand"))]
!   "TARGET_NEON || TARGET_HAVE_MVE"
  {
+   gcc_checking_assert (aligned_operand (operands[0], <MODE>mode));
+   gcc_checking_assert (aligned_operand (operands[1], <MODE>mode));
    if (can_create_pseudo_p ())
      {
        if (!REG_P (operands[0]))
***************
*** 146,156 ****
      }
  })
  
  (define_expand "mov<mode>"
!   [(set (match_operand:VH 0 "s_register_operand")
! 	(match_operand:VH 1 "s_register_operand"))]
    "TARGET_NEON"
  {
    if (can_create_pseudo_p ())
      {
        if (!REG_P (operands[0]))
--- 160,176 ----
      }
  })
  
+ ;; The pattern mov<mode> where mode is v8hf, v4hf, v4bf and v8bf are split into
+ ;; two groups.  The pattern movv8hf is common for MVE and NEON, so it is moved
+ ;; into vec-common.md file.  Remaining mov expand patterns with half float and
+ ;; bfloats are implemented below.
  (define_expand "mov<mode>"
!   [(set (match_operand:VHFBF_split 0 "s_register_operand")
! 	(match_operand:VHFBF_split 1 "s_register_operand"))]
    "TARGET_NEON"
  {
+   gcc_checking_assert (aligned_operand (operands[0], <MODE>mode));
+   gcc_checking_assert (aligned_operand (operands[1], <MODE>mode));
    if (can_create_pseudo_p ())
      {
        if (!REG_P (operands[0]))
***************
*** 161,167 ****
  (define_insn "*neon_mov<mode>"
    [(set (match_operand:VSTRUCT 0 "nonimmediate_operand"	"=w,Ut,w")
  	(match_operand:VSTRUCT 1 "general_operand"	" w,w, Ut"))]
!   "TARGET_NEON
     && (register_operand (operands[0], <MODE>mode)
         || register_operand (operands[1], <MODE>mode))"
  {
--- 181,187 ----
  (define_insn "*neon_mov<mode>"
    [(set (match_operand:VSTRUCT 0 "nonimmediate_operand"	"=w,Ut,w")
  	(match_operand:VSTRUCT 1 "general_operand"	" w,w, Ut"))]
!   "(TARGET_NEON || TARGET_HAVE_MVE)
     && (register_operand (operands[0], <MODE>mode)
         || register_operand (operands[1], <MODE>mode))"
  {
***************
*** 197,203 ****
  (define_split
    [(set (match_operand:OI 0 "s_register_operand" "")
  	(match_operand:OI 1 "s_register_operand" ""))]
!   "TARGET_NEON && reload_completed"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2) (match_dup 3))]
  {
--- 217,223 ----
  (define_split
    [(set (match_operand:OI 0 "s_register_operand" "")
  	(match_operand:OI 1 "s_register_operand" ""))]
!   "(TARGET_NEON || TARGET_HAVE_MVE)&& reload_completed"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2) (match_dup 3))]
  {
***************
*** 238,244 ****
  (define_split
    [(set (match_operand:XI 0 "s_register_operand" "")
  	(match_operand:XI 1 "s_register_operand" ""))]
!   "TARGET_NEON && reload_completed"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2) (match_dup 3))
     (set (match_dup 4) (match_dup 5))
--- 258,264 ----
  (define_split
    [(set (match_operand:XI 0 "s_register_operand" "")
  	(match_operand:XI 1 "s_register_operand" ""))]
!   "(TARGET_NEON || TARGET_HAVE_MVE) && reload_completed"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2) (match_dup 3))
     (set (match_dup 4) (match_dup 5))
***************
*** 319,325 ****
    "vld1.<V_sz_elem>\t{%q0}, %A1"
    [(set_attr "type" "neon_load1_1reg<q>")])
  
! (define_insn "vec_set<mode>_internal"
    [(set (match_operand:VD_LANE 0 "s_register_operand" "=w,w")
          (vec_merge:VD_LANE
            (vec_duplicate:VD_LANE
--- 339,345 ----
    "vld1.<V_sz_elem>\t{%q0}, %A1"
    [(set_attr "type" "neon_load1_1reg<q>")])
  
! (define_insn "@vec_set<mode>_internal"
    [(set (match_operand:VD_LANE 0 "s_register_operand" "=w,w")
          (vec_merge:VD_LANE
            (vec_duplicate:VD_LANE
***************
*** 340,346 ****
  }
    [(set_attr "type" "neon_load1_all_lanes<q>,neon_from_gp<q>")])
  
! (define_insn "vec_set<mode>_internal"
    [(set (match_operand:VQ2 0 "s_register_operand" "=w,w")
          (vec_merge:VQ2
            (vec_duplicate:VQ2
--- 360,366 ----
  }
    [(set_attr "type" "neon_load1_all_lanes<q>,neon_from_gp<q>")])
  
! (define_insn "@vec_set<mode>_internal"
    [(set (match_operand:VQ2 0 "s_register_operand" "=w,w")
          (vec_merge:VQ2
            (vec_duplicate:VQ2
***************
*** 369,380 ****
    [(set_attr "type" "neon_load1_all_lanes<q>,neon_from_gp<q>")]
  )
  
! (define_insn "vec_setv2di_internal"
!   [(set (match_operand:V2DI 0 "s_register_operand" "=w,w")
!         (vec_merge:V2DI
!           (vec_duplicate:V2DI
              (match_operand:DI 1 "nonimmediate_operand" "Um,r"))
!           (match_operand:V2DI 3 "s_register_operand" "0,0")
            (match_operand:SI 2 "immediate_operand" "i,i")))]
    "TARGET_NEON"
  {
--- 389,400 ----
    [(set_attr "type" "neon_load1_all_lanes<q>,neon_from_gp<q>")]
  )
  
! (define_insn "@vec_set<mode>_internal"
!   [(set (match_operand:V2DI_ONLY 0 "s_register_operand" "=w,w")
!         (vec_merge:V2DI_ONLY
!           (vec_duplicate:V2DI_ONLY
              (match_operand:DI 1 "nonimmediate_operand" "Um,r"))
!           (match_operand:V2DI_ONLY 3 "s_register_operand" "0,0")
            (match_operand:SI 2 "immediate_operand" "i,i")))]
    "TARGET_NEON"
  {
***************
*** 391,408 ****
    [(set_attr "type" "neon_load1_all_lanes_q,neon_from_gp_q")]
  )
  
- (define_expand "vec_set<mode>"
-   [(match_operand:VDQ 0 "s_register_operand" "")
-    (match_operand:<V_elem> 1 "s_register_operand" "")
-    (match_operand:SI 2 "immediate_operand" "")]
-   "TARGET_NEON"
- {
-   HOST_WIDE_INT elem = HOST_WIDE_INT_1 << INTVAL (operands[2]);
-   emit_insn (gen_vec_set<mode>_internal (operands[0], operands[1],
- 					 GEN_INT (elem), operands[0]));
-   DONE;
- })
- 
  (define_insn "vec_extract<mode><V_elem_l>"
    [(set (match_operand:<V_elem> 0 "nonimmediate_operand" "=Um,r")
          (vec_select:<V_elem>
--- 411,416 ----
***************
*** 425,431 ****
    [(set_attr "type" "neon_store1_one_lane<q>,neon_to_gp<q>")]
  )
  
! (define_insn "vec_extract<mode><V_elem_l>"
    [(set (match_operand:<V_elem> 0 "nonimmediate_operand" "=Um,r")
  	(vec_select:<V_elem>
            (match_operand:VQ2 1 "s_register_operand" "w,w")
--- 433,442 ----
    [(set_attr "type" "neon_store1_one_lane<q>,neon_to_gp<q>")]
  )
  
! ;; This pattern is renamed from "vec_extract<mode><V_elem_l>" to
! ;; "neon_vec_extract<mode><V_elem_l>" and this pattern is called
! ;; by define_expand in vec-common.md file.
! (define_insn "neon_vec_extract<mode><V_elem_l>"
    [(set (match_operand:<V_elem> 0 "nonimmediate_operand" "=Um,r")
  	(vec_select:<V_elem>
            (match_operand:VQ2 1 "s_register_operand" "w,w")
***************
*** 451,457 ****
    [(set_attr "type" "neon_store1_one_lane<q>,neon_to_gp<q>")]
  )
  
! (define_insn "vec_extractv2didi"
    [(set (match_operand:DI 0 "nonimmediate_operand" "=Um,r")
  	(vec_select:DI
            (match_operand:V2DI 1 "s_register_operand" "w,w")
--- 462,470 ----
    [(set_attr "type" "neon_store1_one_lane<q>,neon_to_gp<q>")]
  )
  
! ;; This pattern is renamed from "vec_extractv2didi" to "neon_vec_extractv2didi"
! ;; and this pattern is called by define_expand in vec-common.md file.
! (define_insn "neon_vec_extractv2didi"
    [(set (match_operand:DI 0 "nonimmediate_operand" "=Um,r")
  	(vec_select:DI
            (match_operand:V2DI 1 "s_register_operand" "w,w")
***************
*** 471,479 ****
  )
  
  (define_expand "vec_init<mode><V_elem_l>"
!   [(match_operand:VDQ 0 "s_register_operand" "")
     (match_operand 1 "" "")]
!   "TARGET_NEON"
  {
    neon_expand_vector_init (operands[0], operands[1]);
    DONE;
--- 484,492 ----
  )
  
  (define_expand "vec_init<mode><V_elem_l>"
!   [(match_operand:VDQ 0 "s_register_operand")
     (match_operand 1 "" "")]
!   "TARGET_NEON || TARGET_HAVE_MVE"
  {
    neon_expand_vector_init (operands[0], operands[1]);
    DONE;
***************
*** 499,516 ****
  ;; As with SFmode, full support for HFmode vector arithmetic is only available
  ;; when flag-unsafe-math-optimizations is enabled.
  
! (define_insn "add<mode>3"
    [(set
!     (match_operand:VH 0 "s_register_operand" "=w")
!     (plus:VH
!      (match_operand:VH 1 "s_register_operand" "w")
!      (match_operand:VH 2 "s_register_operand" "w")))]
   "TARGET_NEON_FP16INST && flag_unsafe_math_optimizations"
!  "vadd.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
!  [(set (attr "type")
!    (if_then_else (match_test "<Is_float_mode>")
!     (const_string "neon_fp_addsub_s<q>")
!     (const_string "neon_add<q>")))]
  )
  
  (define_insn "add<mode>3_fp16"
--- 512,541 ----
  ;; As with SFmode, full support for HFmode vector arithmetic is only available
  ;; when flag-unsafe-math-optimizations is enabled.
  
! ;; Add pattern with modes V8HF and V4HF is split into separate patterns to add
! ;; support for standard pattern addv8hf3 in MVE.  Following pattern is called
! ;; from "addv8hf3" standard pattern inside vec-common.md file.
! 
! (define_insn "addv8hf3_neon"
    [(set
!     (match_operand:V8HF 0 "s_register_operand" "=w")
!     (plus:V8HF
!      (match_operand:V8HF 1 "s_register_operand" "w")
!      (match_operand:V8HF 2 "s_register_operand" "w")))]
   "TARGET_NEON_FP16INST && flag_unsafe_math_optimizations"
!  "vadd.f16\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
!  [(set_attr "type" "neon_fp_addsub_s_q")]
! )
! 
! (define_insn "addv4hf3"
!   [(set
!     (match_operand:V4HF 0 "s_register_operand" "=w")
!     (plus:V4HF
!      (match_operand:V4HF 1 "s_register_operand" "w")
!      (match_operand:V4HF 2 "s_register_operand" "w")))]
!  "TARGET_NEON_FP16INST && flag_unsafe_math_optimizations"
!  "vadd.f16\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
!  [(set_attr "type" "neon_fp_addsub_s_q")]
  )
  
  (define_insn "add<mode>3_fp16"
***************
*** 527,558 ****
      (const_string "neon_add<q>")))]
  )
  
- (define_insn "adddi3_neon"
-   [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r,?w,?&r,?&r,?&r")
-         (plus:DI (match_operand:DI 1 "s_register_operand" "%w,0,0,w,r,0,r")
-                  (match_operand:DI 2 "arm_adddi_operand"     "w,r,0,w,r,Dd,Dd")))
-    (clobber (reg:CC CC_REGNUM))]
-   "TARGET_NEON"
- {
-   switch (which_alternative)
-     {
-     case 0: /* fall through */
-     case 3: return "vadd.i64\t%P0, %P1, %P2";
-     case 1: return "#";
-     case 2: return "#";
-     case 4: return "#";
-     case 5: return "#";
-     case 6: return "#";
-     default: gcc_unreachable ();
-     }
- }
-   [(set_attr "type" "neon_add,multiple,multiple,neon_add,\
- 		     multiple,multiple,multiple")
-    (set_attr "conds" "*,clob,clob,*,clob,clob,clob")
-    (set_attr "length" "*,8,8,*,8,8,8")
-    (set_attr "arch" "neon_for_64bits,*,*,avoid_neon_for_64bits,*,*,*")]
- )
- 
  (define_insn "*sub<mode>3_neon"
    [(set (match_operand:VDQ 0 "s_register_operand" "=w")
          (minus:VDQ (match_operand:VDQ 1 "s_register_operand" "w")
--- 552,557 ----
***************
*** 587,615 ****
   [(set_attr "type" "neon_sub<q>")]
  )
  
- (define_insn "subdi3_neon"
-   [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r,?&r,?w")
-         (minus:DI (match_operand:DI 1 "s_register_operand" "w,0,r,0,w")
-                   (match_operand:DI 2 "s_register_operand" "w,r,0,0,w")))
-    (clobber (reg:CC CC_REGNUM))]
-   "TARGET_NEON"
- {
-   switch (which_alternative)
-     {
-     case 0: /* fall through */
-     case 4: return "vsub.i64\t%P0, %P1, %P2";
-     case 1: /* fall through */ 
-     case 2: /* fall through */
-     case 3: return  "subs\\t%Q0, %Q1, %Q2\;sbc\\t%R0, %R1, %R2";
-     default: gcc_unreachable ();
-     }
- }
-   [(set_attr "type" "neon_sub,multiple,multiple,multiple,neon_sub")
-    (set_attr "conds" "*,clob,clob,clob,*")
-    (set_attr "length" "*,8,8,8,*")
-    (set_attr "arch" "neon_for_64bits,*,*,*,avoid_neon_for_64bits")]
- )
- 
  (define_insn "*mul<mode>3_neon"
    [(set (match_operand:VDQW 0 "s_register_operand" "=w")
          (mult:VDQW (match_operand:VDQW 1 "s_register_operand" "w")
--- 586,591 ----
***************
*** 628,636 ****
     and disabled for -Os since it increases code size .  */
  
  (define_expand "div<mode>3"
!   [(set (match_operand:VCVTF 0 "s_register_operand" "=w")
!         (div:VCVTF (match_operand:VCVTF 1 "s_register_operand" "w")
! 		  (match_operand:VCVTF 2 "s_register_operand" "w")))]
    "TARGET_NEON && !optimize_size
     && flag_reciprocal_math"
    {
--- 604,612 ----
     and disabled for -Os since it increases code size .  */
  
  (define_expand "div<mode>3"
!   [(set (match_operand:VCVTF 0 "s_register_operand")
!         (div:VCVTF (match_operand:VCVTF 1 "s_register_operand")
! 		  (match_operand:VCVTF 2 "s_register_operand")))]
    "TARGET_NEON && !optimize_size
     && flag_reciprocal_math"
    {
***************
*** 838,883 ****
    [(set_attr "type" "neon_logic<q>")]
  )
  
- ;; TODO: investigate whether we should disable 
- ;; this and bicdi3_neon for the A8 in line with the other
- ;; changes above. 
- (define_insn_and_split "orndi3_neon"
-   [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r,?&r")
- 	(ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "w,0,0,r"))
- 		(match_operand:DI 1 "s_register_operand" "w,r,r,0")))]
-   "TARGET_NEON"
-   "@
-    vorn\t%P0, %P1, %P2
-    #
-    #
-    #"
-   "reload_completed && 
-    (TARGET_NEON && !(IS_VFP_REGNUM (REGNO (operands[0]))))"
-   [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1)))
-    (set (match_dup 3) (ior:SI (not:SI (match_dup 4)) (match_dup 5)))]
-   "
-   {
-     if (TARGET_THUMB2)
-       {
-         operands[3] = gen_highpart (SImode, operands[0]);
-         operands[0] = gen_lowpart (SImode, operands[0]);
-         operands[4] = gen_highpart (SImode, operands[2]);
-         operands[2] = gen_lowpart (SImode, operands[2]);
-         operands[5] = gen_highpart (SImode, operands[1]);
-         operands[1] = gen_lowpart (SImode, operands[1]);
-       }
-     else
-       {
-         emit_insn (gen_one_cmpldi2 (operands[0], operands[2]));
-         emit_insn (gen_iordi3 (operands[0], operands[1], operands[0]));
-         DONE;
-       }
-   }"
-   [(set_attr "type" "neon_logic,multiple,multiple,multiple")
-    (set_attr "length" "*,16,8,8")
-    (set_attr "arch" "any,a,t2,t2")]
- )
- 
  (define_insn "bic<mode>3_neon"
    [(set (match_operand:VDQ 0 "s_register_operand" "=w")
  	(and:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))
--- 814,819 ----
***************
*** 887,906 ****
    [(set_attr "type" "neon_logic<q>")]
  )
  
- ;; Compare to *anddi_notdi_di.
- (define_insn "bicdi3_neon"
-   [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r")
-         (and:DI (not:DI (match_operand:DI 2 "s_register_operand" "w,r,0"))
- 		(match_operand:DI 1 "s_register_operand" "w,0,r")))]
-   "TARGET_NEON"
-   "@
-    vbic\t%P0, %P1, %P2
-    #
-    #"
-   [(set_attr "type" "neon_logic,multiple,multiple")
-    (set_attr "length" "*,8,8")]
- )
- 
  (define_insn "xor<mode>3"
    [(set (match_operand:VDQ 0 "s_register_operand" "=w")
  	(xor:VDQ (match_operand:VDQ 1 "s_register_operand" "w")
--- 823,828 ----
***************
*** 940,985 ****
                      (const_string "neon_neg<q>")))]
  )
  
- (define_insn "negdi2_neon"
-   [(set (match_operand:DI 0 "s_register_operand"	 "=&w, w,r,&r")
- 	(neg:DI (match_operand:DI 1 "s_register_operand" "  w, w,0, r")))
-    (clobber (match_scratch:DI 2				 "= X,&w,X, X"))
-    (clobber (reg:CC CC_REGNUM))]
-   "TARGET_NEON"
-   "#"
-   [(set_attr "length" "8")
-    (set_attr "type" "multiple")]
- )
- 
- ; Split negdi2_neon for vfp registers
- (define_split
-   [(set (match_operand:DI 0 "s_register_operand" "")
- 	(neg:DI (match_operand:DI 1 "s_register_operand" "")))
-    (clobber (match_scratch:DI 2 ""))
-    (clobber (reg:CC CC_REGNUM))]
-   "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))"
-   [(set (match_dup 2) (const_int 0))
-    (parallel [(set (match_dup 0) (minus:DI (match_dup 2) (match_dup 1)))
- 	      (clobber (reg:CC CC_REGNUM))])]
-   {
-     if (!REG_P (operands[2]))
-       operands[2] = operands[0];
-   }
- )
- 
- ; Split negdi2_neon for core registers
- (define_split
-   [(set (match_operand:DI 0 "s_register_operand" "")
- 	(neg:DI (match_operand:DI 1 "s_register_operand" "")))
-    (clobber (match_scratch:DI 2 ""))
-    (clobber (reg:CC CC_REGNUM))]
-   "TARGET_32BIT && reload_completed
-    && arm_general_register_operand (operands[0], DImode)"
-   [(parallel [(set (match_dup 0) (neg:DI (match_dup 1)))
- 	      (clobber (reg:CC CC_REGNUM))])]
-   ""
- )
- 
  (define_insn "<absneg_str><mode>2"
    [(set (match_operand:VH 0 "s_register_operand" "=w")
      (ABSNEG:VH (match_operand:VH 1 "s_register_operand" "w")))]
--- 862,867 ----
***************
*** 1138,1146 ****
  )
  
  (define_expand "vashr<mode>3"
!   [(set (match_operand:VDQIW 0 "s_register_operand" "")
! 	(ashiftrt:VDQIW (match_operand:VDQIW 1 "s_register_operand" "")
! 			(match_operand:VDQIW 2 "imm_rshift_or_reg_neon" "")))]
    "TARGET_NEON"
  {
    if (s_register_operand (operands[2], <MODE>mode))
--- 1020,1028 ----
  )
  
  (define_expand "vashr<mode>3"
!   [(set (match_operand:VDQIW 0 "s_register_operand")
! 	(ashiftrt:VDQIW (match_operand:VDQIW 1 "s_register_operand")
! 			(match_operand:VDQIW 2 "imm_rshift_or_reg_neon")))]
    "TARGET_NEON"
  {
    if (s_register_operand (operands[2], <MODE>mode))
***************
*** 1155,1163 ****
  })
  
  (define_expand "vlshr<mode>3"
!   [(set (match_operand:VDQIW 0 "s_register_operand" "")
! 	(lshiftrt:VDQIW (match_operand:VDQIW 1 "s_register_operand" "")
! 			(match_operand:VDQIW 2 "imm_rshift_or_reg_neon" "")))]
    "TARGET_NEON"
  {
    if (s_register_operand (operands[2], <MODE>mode))
--- 1037,1045 ----
  })
  
  (define_expand "vlshr<mode>3"
!   [(set (match_operand:VDQIW 0 "s_register_operand")
! 	(lshiftrt:VDQIW (match_operand:VDQIW 1 "s_register_operand")
! 			(match_operand:VDQIW 2 "imm_rshift_or_reg_neon")))]
    "TARGET_NEON"
  {
    if (s_register_operand (operands[2], <MODE>mode))
***************
*** 1189,1369 ****
    [(set_attr "type" "neon_load1_1reg,neon_from_gp")]
  )
  
- (define_insn "ashldi3_neon_noclobber"
-   [(set (match_operand:DI 0 "s_register_operand"	    "=w,w")
- 	(ashift:DI (match_operand:DI 1 "s_register_operand" " w,w")
- 		   (match_operand:DI 2 "reg_or_int_operand" " i,w")))]
-   "TARGET_NEON && reload_completed
-    && (!CONST_INT_P (operands[2])
-        || (INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) < 64))"
-   "@
-    vshl.u64\t%P0, %P1, %2
-    vshl.u64\t%P0, %P1, %P2"
-   [(set_attr "type" "neon_shift_imm, neon_shift_reg")]
- )
- 
- (define_insn_and_split "ashldi3_neon"
-   [(set (match_operand:DI 0 "s_register_operand"	    "= w, w, &r, r, &r, ?w,?w")
- 	(ashift:DI (match_operand:DI 1 "s_register_operand" " 0w, w, 0r, 0,  r, 0w, w")
- 		   (match_operand:SI 2 "general_operand"    "rUm, i,  r, i,  i,rUm, i")))
-    (clobber (match_scratch:SI 3				    "= X, X, &r, X,  X,  X, X"))
-    (clobber (match_scratch:SI 4				    "= X, X, &r, X,  X,  X, X"))
-    (clobber (match_scratch:DI 5				    "=&w, X,  X, X,  X, &w, X"))
-    (clobber (reg:CC_C CC_REGNUM))]
-   "TARGET_NEON"
-   "#"
-   "TARGET_NEON && reload_completed"
-   [(const_int 0)]
-   "
-   {
-     if (IS_VFP_REGNUM (REGNO (operands[0])))
-       {
-         if (CONST_INT_P (operands[2]))
- 	  {
- 	    if (INTVAL (operands[2]) < 1)
- 	      {
- 	        emit_insn (gen_movdi (operands[0], operands[1]));
- 		DONE;
- 	      }
- 	    else if (INTVAL (operands[2]) > 63)
- 	      operands[2] = gen_rtx_CONST_INT (VOIDmode, 63);
- 	  }
- 	else
- 	  {
- 	    emit_insn (gen_neon_load_count (operands[5], operands[2]));
- 	    operands[2] = operands[5];
- 	  }
- 
- 	/* Ditch the unnecessary clobbers.  */
- 	emit_insn (gen_ashldi3_neon_noclobber (operands[0], operands[1],
- 					       operands[2]));
-       }
-     else
-       {
- 	/* The shift expanders support either full overlap or no overlap.  */
- 	gcc_assert (!reg_overlap_mentioned_p (operands[0], operands[1])
- 		    || REGNO (operands[0]) == REGNO (operands[1]));
- 
- 	arm_emit_coreregs_64bit_shift (ASHIFT, operands[0], operands[1],
- 				       operands[2], operands[3], operands[4]);
-       }
-     DONE;
-   }"
-   [(set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,*,avoid_neon_for_64bits,avoid_neon_for_64bits")
-    (set_attr "opt" "*,*,speed,speed,speed,*,*")
-    (set_attr "type" "multiple")]
- )
- 
- ; The shift amount needs to be negated for right-shifts
- (define_insn "signed_shift_di3_neon"
-   [(set (match_operand:DI 0 "s_register_operand"	     "=w")
- 	(unspec:DI [(match_operand:DI 1 "s_register_operand" " w")
- 		    (match_operand:DI 2 "s_register_operand" " w")]
- 		   UNSPEC_ASHIFT_SIGNED))]
-   "TARGET_NEON && reload_completed"
-   "vshl.s64\t%P0, %P1, %P2"
-   [(set_attr "type" "neon_shift_reg")]
- )
- 
- ; The shift amount needs to be negated for right-shifts
- (define_insn "unsigned_shift_di3_neon"
-   [(set (match_operand:DI 0 "s_register_operand"	     "=w")
- 	(unspec:DI [(match_operand:DI 1 "s_register_operand" " w")
- 		    (match_operand:DI 2 "s_register_operand" " w")]
- 		   UNSPEC_ASHIFT_UNSIGNED))]
-   "TARGET_NEON && reload_completed"
-   "vshl.u64\t%P0, %P1, %P2"
-   [(set_attr "type" "neon_shift_reg")]
- )
- 
- (define_insn "ashrdi3_neon_imm_noclobber"
-   [(set (match_operand:DI 0 "s_register_operand"	      "=w")
- 	(ashiftrt:DI (match_operand:DI 1 "s_register_operand" " w")
- 		     (match_operand:DI 2 "const_int_operand"  " i")))]
-   "TARGET_NEON && reload_completed
-    && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 64"
-   "vshr.s64\t%P0, %P1, %2"
-   [(set_attr "type" "neon_shift_imm")]
- )
- 
- (define_insn "lshrdi3_neon_imm_noclobber"
-   [(set (match_operand:DI 0 "s_register_operand"	      "=w")
- 	(lshiftrt:DI (match_operand:DI 1 "s_register_operand" " w")
- 		     (match_operand:DI 2 "const_int_operand"  " i")))]
-   "TARGET_NEON && reload_completed
-    && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 64"
-   "vshr.u64\t%P0, %P1, %2"
-   [(set_attr "type" "neon_shift_imm")]
- )
- 
- ;; ashrdi3_neon
- ;; lshrdi3_neon
- (define_insn_and_split "<shift>di3_neon"
-   [(set (match_operand:DI 0 "s_register_operand"	     "= w, w, &r, r, &r,?w,?w")
- 	(RSHIFTS:DI (match_operand:DI 1 "s_register_operand" " 0w, w, 0r, 0,  r,0w, w")
- 		    (match_operand:SI 2 "reg_or_int_operand" "  r, i,  r, i,  i, r, i")))
-    (clobber (match_scratch:SI 3				     "=2r, X, &r, X,  X,2r, X"))
-    (clobber (match_scratch:SI 4				     "= X, X, &r, X,  X, X, X"))
-    (clobber (match_scratch:DI 5				     "=&w, X,  X, X, X,&w, X"))
-    (clobber (reg:CC CC_REGNUM))]
-   "TARGET_NEON"
-   "#"
-   "TARGET_NEON && reload_completed"
-   [(const_int 0)]
-   "
-   {
-     if (IS_VFP_REGNUM (REGNO (operands[0])))
-       {
- 	if (CONST_INT_P (operands[2]))
- 	  {
- 	    if (INTVAL (operands[2]) < 1)
- 	      {
- 	        emit_insn (gen_movdi (operands[0], operands[1]));
- 		DONE;
- 	      }
- 	    else if (INTVAL (operands[2]) > 64)
- 	      operands[2] = gen_rtx_CONST_INT (VOIDmode, 64);
- 
- 	    /* Ditch the unnecessary clobbers.  */
- 	    emit_insn (gen_<shift>di3_neon_imm_noclobber (operands[0],
- 							  operands[1],
- 							  operands[2]));
- 	  }
- 	else 
- 	  {
- 	    /* We must use a negative left-shift.  */
- 	    emit_insn (gen_negsi2 (operands[3], operands[2]));
- 	    emit_insn (gen_neon_load_count (operands[5], operands[3]));
- 	    emit_insn (gen_<shifttype>_shift_di3_neon (operands[0], operands[1],
- 						       operands[5]));
- 	  }
-       }
-     else
-       {
- 	/* The shift expanders support either full overlap or no overlap.  */
- 	gcc_assert (!reg_overlap_mentioned_p (operands[0], operands[1])
- 		    || REGNO (operands[0]) == REGNO (operands[1]));
- 
- 	/* This clobbers CC (ASHIFTRT by register only).  */
- 	arm_emit_coreregs_64bit_shift (<CODE>, operands[0], operands[1],
- 				       operands[2], operands[3], operands[4]);
-       }
- 
-     DONE;
-   }"
-   [(set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,*,avoid_neon_for_64bits,avoid_neon_for_64bits")
-    (set_attr "opt" "*,*,speed,speed,speed,*,*")
-    (set_attr "type" "multiple")]
- )
- 
  ;; Widening operations
  
  (define_expand "widen_ssum<mode>3"
!   [(set (match_operand:<V_double_width> 0 "s_register_operand" "")
  	(plus:<V_double_width>
  	 (sign_extend:<V_double_width>
! 	  (match_operand:VQI 1 "s_register_operand" ""))
! 	 (match_operand:<V_double_width> 2 "s_register_operand" "")))]
    "TARGET_NEON"
    {
      machine_mode mode = GET_MODE (operands[1]);
--- 1071,1084 ----
    [(set_attr "type" "neon_load1_1reg,neon_from_gp")]
  )
  
  ;; Widening operations
  
  (define_expand "widen_ssum<mode>3"
!   [(set (match_operand:<V_double_width> 0 "s_register_operand")
  	(plus:<V_double_width>
  	 (sign_extend:<V_double_width>
! 	  (match_operand:VQI 1 "s_register_operand"))
! 	 (match_operand:<V_double_width> 2 "s_register_operand")))]
    "TARGET_NEON"
    {
      machine_mode mode = GET_MODE (operands[1]);
***************
*** 1429,1439 ****
  )
  
  (define_expand "widen_usum<mode>3"
!   [(set (match_operand:<V_double_width> 0 "s_register_operand" "")
  	(plus:<V_double_width>
  	 (zero_extend:<V_double_width>
! 	  (match_operand:VQI 1 "s_register_operand" ""))
! 	 (match_operand:<V_double_width> 2 "s_register_operand" "")))]
    "TARGET_NEON"
    {
      machine_mode mode = GET_MODE (operands[1]);
--- 1144,1154 ----
  )
  
  (define_expand "widen_usum<mode>3"
!   [(set (match_operand:<V_double_width> 0 "s_register_operand")
  	(plus:<V_double_width>
  	 (zero_extend:<V_double_width>
! 	  (match_operand:VQI 1 "s_register_operand"))
! 	 (match_operand:<V_double_width> 2 "s_register_operand")))]
    "TARGET_NEON"
    {
      machine_mode mode = GET_MODE (operands[1]);
***************
*** 1564,1571 ****
  )
  
  (define_expand "move_hi_quad_<mode>"
!  [(match_operand:ANY128 0 "s_register_operand" "")
!   (match_operand:<V_HALF> 1 "s_register_operand" "")]
   "TARGET_NEON"
  {
    emit_move_insn (simplify_gen_subreg (<V_HALF>mode, operands[0], <MODE>mode,
--- 1279,1286 ----
  )
  
  (define_expand "move_hi_quad_<mode>"
!  [(match_operand:ANY128 0 "s_register_operand")
!   (match_operand:<V_HALF> 1 "s_register_operand")]
   "TARGET_NEON"
  {
    emit_move_insn (simplify_gen_subreg (<V_HALF>mode, operands[0], <MODE>mode,
***************
*** 1575,1582 ****
  })
  
  (define_expand "move_lo_quad_<mode>"
!  [(match_operand:ANY128 0 "s_register_operand" "")
!   (match_operand:<V_HALF> 1 "s_register_operand" "")]
   "TARGET_NEON"
  {
    emit_move_insn (simplify_gen_subreg (<V_HALF>mode, operands[0],
--- 1290,1297 ----
  })
  
  (define_expand "move_lo_quad_<mode>"
!  [(match_operand:ANY128 0 "s_register_operand")
!   (match_operand:<V_HALF> 1 "s_register_operand")]
   "TARGET_NEON"
  {
    emit_move_insn (simplify_gen_subreg (<V_HALF>mode, operands[0],
***************
*** 1588,1595 ****
  ;; Reduction operations
  
  (define_expand "reduc_plus_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand" "")
!    (match_operand:VD 1 "s_register_operand" "")]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
  {
    rtx vec = gen_reg_rtx (<MODE>mode);
--- 1303,1310 ----
  ;; Reduction operations
  
  (define_expand "reduc_plus_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand")
!    (match_operand:VD 1 "s_register_operand")]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
  {
    rtx vec = gen_reg_rtx (<MODE>mode);
***************
*** 1601,1608 ****
  })
  
  (define_expand "reduc_plus_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand" "")
!    (match_operand:VQ 1 "s_register_operand" "")]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)
     && !BYTES_BIG_ENDIAN"
  {
--- 1316,1323 ----
  })
  
  (define_expand "reduc_plus_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand")
!    (match_operand:VQ 1 "s_register_operand")]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)
     && !BYTES_BIG_ENDIAN"
  {
***************
*** 1615,1622 ****
  })
  
  (define_expand "reduc_plus_scal_v2di"
!   [(match_operand:DI 0 "nonimmediate_operand" "=w")
!    (match_operand:V2DI 1 "s_register_operand" "")]
    "TARGET_NEON && !BYTES_BIG_ENDIAN"
  {
    rtx vec = gen_reg_rtx (V2DImode);
--- 1330,1337 ----
  })
  
  (define_expand "reduc_plus_scal_v2di"
!   [(match_operand:DI 0 "nonimmediate_operand")
!    (match_operand:V2DI 1 "s_register_operand")]
    "TARGET_NEON && !BYTES_BIG_ENDIAN"
  {
    rtx vec = gen_reg_rtx (V2DImode);
***************
*** 1637,1644 ****
  )
  
  (define_expand "reduc_smin_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand" "")
!    (match_operand:VD 1 "s_register_operand" "")]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
  {
    rtx vec = gen_reg_rtx (<MODE>mode);
--- 1352,1359 ----
  )
  
  (define_expand "reduc_smin_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand")
!    (match_operand:VD 1 "s_register_operand")]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
  {
    rtx vec = gen_reg_rtx (<MODE>mode);
***************
*** 1651,1658 ****
  })
  
  (define_expand "reduc_smin_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand" "")
!    (match_operand:VQ 1 "s_register_operand" "")]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)
     && !BYTES_BIG_ENDIAN"
  {
--- 1366,1373 ----
  })
  
  (define_expand "reduc_smin_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand")
!    (match_operand:VQ 1 "s_register_operand")]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)
     && !BYTES_BIG_ENDIAN"
  {
***************
*** 1665,1672 ****
  })
  
  (define_expand "reduc_smax_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand" "")
!    (match_operand:VD 1 "s_register_operand" "")]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
  {
    rtx vec = gen_reg_rtx (<MODE>mode);
--- 1380,1387 ----
  })
  
  (define_expand "reduc_smax_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand")
!    (match_operand:VD 1 "s_register_operand")]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
  {
    rtx vec = gen_reg_rtx (<MODE>mode);
***************
*** 1678,1685 ****
  })
  
  (define_expand "reduc_smax_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand" "")
!    (match_operand:VQ 1 "s_register_operand" "")]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)
     && !BYTES_BIG_ENDIAN"
  {
--- 1393,1400 ----
  })
  
  (define_expand "reduc_smax_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand")
!    (match_operand:VQ 1 "s_register_operand")]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)
     && !BYTES_BIG_ENDIAN"
  {
***************
*** 1692,1699 ****
  })
  
  (define_expand "reduc_umin_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand" "")
!    (match_operand:VDI 1 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx vec = gen_reg_rtx (<MODE>mode);
--- 1407,1414 ----
  })
  
  (define_expand "reduc_umin_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand")
!    (match_operand:VDI 1 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx vec = gen_reg_rtx (<MODE>mode);
***************
*** 1705,1712 ****
  })
  
  (define_expand "reduc_umin_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand" "")
!    (match_operand:VQI 1 "s_register_operand" "")]
    "TARGET_NEON && !BYTES_BIG_ENDIAN"
  {
    rtx step1 = gen_reg_rtx (<V_HALF>mode);
--- 1420,1427 ----
  })
  
  (define_expand "reduc_umin_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand")
!    (match_operand:VQI 1 "s_register_operand")]
    "TARGET_NEON && !BYTES_BIG_ENDIAN"
  {
    rtx step1 = gen_reg_rtx (<V_HALF>mode);
***************
*** 1718,1725 ****
  })
  
  (define_expand "reduc_umax_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand" "")
!    (match_operand:VDI 1 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx vec = gen_reg_rtx (<MODE>mode);
--- 1433,1440 ----
  })
  
  (define_expand "reduc_umax_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand")
!    (match_operand:VDI 1 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx vec = gen_reg_rtx (<MODE>mode);
***************
*** 1731,1738 ****
  })
  
  (define_expand "reduc_umax_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand" "")
!    (match_operand:VQI 1 "s_register_operand" "")]
    "TARGET_NEON && !BYTES_BIG_ENDIAN"
  {
    rtx step1 = gen_reg_rtx (<V_HALF>mode);
--- 1446,1453 ----
  })
  
  (define_expand "reduc_umax_scal_<mode>"
!   [(match_operand:<V_elem> 0 "nonimmediate_operand")
!    (match_operand:VQI 1 "s_register_operand")]
    "TARGET_NEON && !BYTES_BIG_ENDIAN"
  {
    rtx step1 = gen_reg_rtx (<V_HALF>mode);
***************
*** 1867,1879 ****
  ;; element-wise.
  
  (define_expand "vcond<mode><mode>"
!   [(set (match_operand:VDQW 0 "s_register_operand" "")
  	(if_then_else:VDQW
  	  (match_operator 3 "comparison_operator"
! 	    [(match_operand:VDQW 4 "s_register_operand" "")
! 	     (match_operand:VDQW 5 "nonmemory_operand" "")])
! 	  (match_operand:VDQW 1 "s_register_operand" "")
! 	  (match_operand:VDQW 2 "s_register_operand" "")))]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
  {
    int inverse = 0;
--- 1582,1594 ----
  ;; element-wise.
  
  (define_expand "vcond<mode><mode>"
!   [(set (match_operand:VDQW 0 "s_register_operand")
  	(if_then_else:VDQW
  	  (match_operator 3 "comparison_operator"
! 	    [(match_operand:VDQW 4 "s_register_operand")
! 	     (match_operand:VDQW 5 "nonmemory_operand")])
! 	  (match_operand:VDQW 1 "s_register_operand")
! 	  (match_operand:VDQW 2 "s_register_operand")))]
    "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
  {
    int inverse = 0;
***************
*** 2032,2044 ****
  })
  
  (define_expand "vcondu<mode><mode>"
!   [(set (match_operand:VDQIW 0 "s_register_operand" "")
  	(if_then_else:VDQIW
  	  (match_operator 3 "arm_comparison_operator"
! 	    [(match_operand:VDQIW 4 "s_register_operand" "")
! 	     (match_operand:VDQIW 5 "s_register_operand" "")])
! 	  (match_operand:VDQIW 1 "s_register_operand" "")
! 	  (match_operand:VDQIW 2 "s_register_operand" "")))]
    "TARGET_NEON"
  {
    rtx mask;
--- 1747,1759 ----
  })
  
  (define_expand "vcondu<mode><mode>"
!   [(set (match_operand:VDQIW 0 "s_register_operand")
  	(if_then_else:VDQIW
  	  (match_operator 3 "arm_comparison_operator"
! 	    [(match_operand:VDQIW 4 "s_register_operand")
! 	     (match_operand:VDQIW 5 "s_register_operand")])
! 	  (match_operand:VDQIW 1 "s_register_operand")
! 	  (match_operand:VDQIW 2 "s_register_operand")))]
    "TARGET_NEON"
  {
    rtx mask;
***************
*** 2103,2111 ****
  ; good for plain vadd, vaddq.
  
  (define_expand "neon_vadd<mode>"
!   [(match_operand:VCVTF 0 "s_register_operand" "=w")
!    (match_operand:VCVTF 1 "s_register_operand" "w")
!    (match_operand:VCVTF 2 "s_register_operand" "w")]
    "TARGET_NEON"
  {
    if (!<Is_float_mode> || flag_unsafe_math_optimizations)
--- 1818,1826 ----
  ; good for plain vadd, vaddq.
  
  (define_expand "neon_vadd<mode>"
!   [(match_operand:VCVTF 0 "s_register_operand")
!    (match_operand:VCVTF 1 "s_register_operand")
!    (match_operand:VCVTF 2 "s_register_operand")]
    "TARGET_NEON"
  {
    if (!<Is_float_mode> || flag_unsafe_math_optimizations)
***************
*** 2250,2259 ****
  )
  
  (define_expand "neon_vmla<mode>"
!   [(match_operand:VDQW 0 "s_register_operand" "=w")
!    (match_operand:VDQW 1 "s_register_operand" "0")
!    (match_operand:VDQW 2 "s_register_operand" "w")
!    (match_operand:VDQW 3 "s_register_operand" "w")]
    "TARGET_NEON"
  {
    if (!<Is_float_mode> || flag_unsafe_math_optimizations)
--- 1965,1974 ----
  )
  
  (define_expand "neon_vmla<mode>"
!   [(match_operand:VDQW 0 "s_register_operand")
!    (match_operand:VDQW 1 "s_register_operand")
!    (match_operand:VDQW 2 "s_register_operand")
!    (match_operand:VDQW 3 "s_register_operand")]
    "TARGET_NEON"
  {
    if (!<Is_float_mode> || flag_unsafe_math_optimizations)
***************
*** 2741,2750 ****
  )
  
  (define_expand "neon_vmls<mode>"
!   [(match_operand:VDQW 0 "s_register_operand" "=w")
!    (match_operand:VDQW 1 "s_register_operand" "0")
!    (match_operand:VDQW 2 "s_register_operand" "w")
!    (match_operand:VDQW 3 "s_register_operand" "w")]
    "TARGET_NEON"
  {
    if (!<Is_float_mode> || flag_unsafe_math_optimizations)
--- 2456,2465 ----
  )
  
  (define_expand "neon_vmls<mode>"
!   [(match_operand:VDQW 0 "s_register_operand")
!    (match_operand:VDQW 1 "s_register_operand")
!    (match_operand:VDQW 2 "s_register_operand")
!    (match_operand:VDQW 3 "s_register_operand")]
    "TARGET_NEON"
  {
    if (!<Is_float_mode> || flag_unsafe_math_optimizations)
***************
*** 2849,2857 ****
  )
  
  (define_expand "neon_vsub<mode>"
!   [(match_operand:VCVTF 0 "s_register_operand" "=w")
!    (match_operand:VCVTF 1 "s_register_operand" "w")
!    (match_operand:VCVTF 2 "s_register_operand" "w")]
    "TARGET_NEON"
  {
    if (!<Is_float_mode> || flag_unsafe_math_optimizations)
--- 2564,2572 ----
  )
  
  (define_expand "neon_vsub<mode>"
!   [(match_operand:VCVTF 0 "s_register_operand")
!    (match_operand:VCVTF 1 "s_register_operand")
!    (match_operand:VCVTF 2 "s_register_operand")]
    "TARGET_NEON"
  {
    if (!<Is_float_mode> || flag_unsafe_math_optimizations)
***************
*** 2930,2939 ****
  ;; These may expand to an UNSPEC pattern when a floating point mode is used
  ;; without unsafe math optimizations.
  (define_expand "neon_vc<cmp_op><mode>"
!   [(match_operand:<V_cmp_result> 0 "s_register_operand" "=w,w")
       (neg:<V_cmp_result>
!        (COMPARISONS:VDQW (match_operand:VDQW 1 "s_register_operand" "w,w")
!                          (match_operand:VDQW 2 "reg_or_zero_operand" "w,Dz")))]
    "TARGET_NEON"
    {
      /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
--- 2645,2654 ----
  ;; These may expand to an UNSPEC pattern when a floating point mode is used
  ;; without unsafe math optimizations.
  (define_expand "neon_vc<cmp_op><mode>"
!   [(match_operand:<V_cmp_result> 0 "s_register_operand")
       (neg:<V_cmp_result>
!        (COMPARISONS:VDQW (match_operand:VDQW 1 "s_register_operand")
!                          (match_operand:VDQW 2 "reg_or_zero_operand")))]
    "TARGET_NEON"
    {
      /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
***************
*** 3256,3261 ****
--- 2971,3002 ----
    [(set_attr "type" "neon_arith_acc<q>")]
  )
  
+ (define_expand "<sup>sadv16qi"
+   [(use (match_operand:V4SI 0 "register_operand"))
+    (unspec:V16QI [(use (match_operand:V16QI 1 "register_operand"))
+                   (use (match_operand:V16QI 2 "register_operand"))] VABAL)
+    (use (match_operand:V4SI 3 "register_operand"))]
+   "TARGET_NEON"
+   {
+     rtx reduc = gen_reg_rtx (V8HImode);
+     rtx op1_highpart = gen_reg_rtx (V8QImode);
+     rtx op2_highpart = gen_reg_rtx (V8QImode);
+ 
+     emit_insn (gen_neon_vabdl<sup>v8qi (reduc,
+                                         gen_lowpart (V8QImode, operands[1]),
+                                         gen_lowpart (V8QImode, operands[2])));
+ 
+     emit_insn (gen_neon_vget_highv16qi (op1_highpart, operands[1]));
+     emit_insn (gen_neon_vget_highv16qi (op2_highpart, operands[2]));
+     emit_insn (gen_neon_vabal<sup>v8qi (reduc, reduc,
+                                         op1_highpart, op2_highpart));
+     emit_insn (gen_neon_vpadal<sup>v8hi (operands[3], operands[3], reduc));
+ 
+     emit_move_insn (operands[0], operands[3]);
+     DONE;
+   }
+ )
+ 
  (define_insn "neon_v<maxmin><sup><mode>"
    [(set (match_operand:VDQIW 0 "s_register_operand" "=w")
          (unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w")
***************
*** 3333,3341 ****
  )
  
  (define_expand "neon_vpadd<mode>"
!   [(match_operand:VD 0 "s_register_operand" "=w")
!    (match_operand:VD 1 "s_register_operand" "w")
!    (match_operand:VD 2 "s_register_operand" "w")]
    "TARGET_NEON"
  {
    emit_insn (gen_neon_vpadd_internal<mode> (operands[0], operands[1],
--- 3074,3082 ----
  )
  
  (define_expand "neon_vpadd<mode>"
!   [(match_operand:VD 0 "s_register_operand")
!    (match_operand:VD 1 "s_register_operand")
!    (match_operand:VD 2 "s_register_operand")]
    "TARGET_NEON"
  {
    emit_insn (gen_neon_vpadd_internal<mode> (operands[0], operands[1],
***************
*** 3425,3432 ****
  )
  
  (define_expand "neon_vabs<mode>"
!   [(match_operand:VDQW 0 "s_register_operand" "")
!    (match_operand:VDQW 1 "s_register_operand" "")]
    "TARGET_NEON"
  {
    emit_insn (gen_abs<mode>2 (operands[0], operands[1]));
--- 3166,3173 ----
  )
  
  (define_expand "neon_vabs<mode>"
!   [(match_operand:VDQW 0 "s_register_operand")
!    (match_operand:VDQW 1 "s_register_operand")]
    "TARGET_NEON"
  {
    emit_insn (gen_abs<mode>2 (operands[0], operands[1]));
***************
*** 3451,3458 ****
  )
  
  (define_expand "neon_vneg<mode>"
!   [(match_operand:VDQW 0 "s_register_operand" "")
!    (match_operand:VDQW 1 "s_register_operand" "")]
    "TARGET_NEON"
  {
    emit_insn (gen_neg<mode>2 (operands[0], operands[1]));
--- 3192,3199 ----
  )
  
  (define_expand "neon_vneg<mode>"
!   [(match_operand:VDQW 0 "s_register_operand")
!    (match_operand:VDQW 1 "s_register_operand")]
    "TARGET_NEON"
  {
    emit_insn (gen_neg<mode>2 (operands[0], operands[1]));
***************
*** 3547,3552 ****
--- 3288,3307 ----
    [(set_attr "type" "neon_dot<q>")]
  )
  
+ ;; These instructions map to the __builtins for the Dot Product operations.
+ (define_insn "neon_usdot<vsi2qi>"
+   [(set (match_operand:VCVTI 0 "register_operand" "=w")
+ 	(plus:VCVTI
+ 	  (unspec:VCVTI
+ 	    [(match_operand:<VSI2QI> 2 "register_operand" "w")
+ 	    (match_operand:<VSI2QI> 3 "register_operand" "w")]
+ 	    UNSPEC_DOT_US)
+ 	  (match_operand:VCVTI 1 "register_operand" "0")))]
+   "TARGET_I8MM"
+   "vusdot.s8\\t%<V_reg>0, %<V_reg>2, %<V_reg>3"
+   [(set_attr "type" "neon_dot<q>")]
+ )
+ 
  ;; These instructions map to the __builtins for the Dot Product
  ;; indexed operations.
  (define_insn "neon_<sup>dot_lane<vsi2qi>"
***************
*** 3566,3571 ****
--- 3321,3345 ----
    [(set_attr "type" "neon_dot<q>")]
  )
  
+ ;; These instructions map to the __builtins for the Dot Product
+ ;; indexed operations in the v8.6 I8MM extension.
+ (define_insn "neon_<sup>dot_lane<vsi2qi>"
+   [(set (match_operand:VCVTI 0 "register_operand" "=w")
+ 	(plus:VCVTI
+ 	  (unspec:VCVTI
+ 	   [(match_operand:<VSI2QI> 2 "register_operand" "w")
+ 	    (match_operand:V8QI 3 "register_operand" "t")
+ 	    (match_operand:SI 4 "immediate_operand" "i")]
+ 	    DOTPROD_I8MM)
+ 	  (match_operand:VCVTI 1 "register_operand" "0")))]
+   "TARGET_I8MM"
+   {
+     operands[4] = GEN_INT (INTVAL (operands[4]));
+     return "v<sup>dot.<opsuffix>\\t%<V_reg>0, %<V_reg>2, %P3[%c4]";
+   }
+   [(set_attr "type" "neon_dot<q>")]
+ )
+ 
  ;; These expands map to the Dot Product optab the vectorizer checks for.
  ;; The auto-vectorizer expects a dot product builtin that also does an
  ;; accumulation into the provided register.
***************
*** 3652,3659 ****
  )
  
  (define_expand "neon_vclz<mode>"
!   [(match_operand:VDQIW 0 "s_register_operand" "")
!    (match_operand:VDQIW 1 "s_register_operand" "")]
    "TARGET_NEON"
  {
    emit_insn (gen_clz<mode>2 (operands[0], operands[1]));
--- 3426,3433 ----
  )
  
  (define_expand "neon_vclz<mode>"
!   [(match_operand:VDQIW 0 "s_register_operand")
!    (match_operand:VDQIW 1 "s_register_operand")]
    "TARGET_NEON"
  {
    emit_insn (gen_clz<mode>2 (operands[0], operands[1]));
***************
*** 3669,3676 ****
  )
  
  (define_expand "neon_vcnt<mode>"
!   [(match_operand:VE 0 "s_register_operand" "=w")
!    (match_operand:VE 1 "s_register_operand" "w")]
    "TARGET_NEON"
  {
    emit_insn (gen_popcount<mode>2 (operands[0], operands[1]));
--- 3443,3450 ----
  )
  
  (define_expand "neon_vcnt<mode>"
!   [(match_operand:VE 0 "s_register_operand")
!    (match_operand:VE 1 "s_register_operand")]
    "TARGET_NEON"
  {
    emit_insn (gen_popcount<mode>2 (operands[0], operands[1]));
***************
*** 3705,3712 ****
  )
  
  (define_expand "neon_vmvn<mode>"
!   [(match_operand:VDQIW 0 "s_register_operand" "")
!    (match_operand:VDQIW 1 "s_register_operand" "")]
    "TARGET_NEON"
  {
    emit_insn (gen_one_cmpl<mode>2 (operands[0], operands[1]));
--- 3479,3486 ----
  )
  
  (define_expand "neon_vmvn<mode>"
!   [(match_operand:VDQIW 0 "s_register_operand")
!    (match_operand:VDQIW 1 "s_register_operand")]
    "TARGET_NEON"
  {
    emit_insn (gen_one_cmpl<mode>2 (operands[0], operands[1]));
***************
*** 3806,3814 ****
  )
  
  (define_expand "neon_vget_lane<mode>"
!   [(match_operand:<V_ext> 0 "s_register_operand" "")
!    (match_operand:VDQW 1 "s_register_operand" "")
!    (match_operand:SI 2 "immediate_operand" "")]
    "TARGET_NEON"
  {
    if (BYTES_BIG_ENDIAN)
--- 3580,3588 ----
  )
  
  (define_expand "neon_vget_lane<mode>"
!   [(match_operand:<V_ext> 0 "s_register_operand")
!    (match_operand:VDQW 1 "s_register_operand")
!    (match_operand:SI 2 "immediate_operand")]
    "TARGET_NEON"
  {
    if (BYTES_BIG_ENDIAN)
***************
*** 3836,3844 ****
  })
  
  (define_expand "neon_vget_laneu<mode>"
!   [(match_operand:<V_ext> 0 "s_register_operand" "")
!    (match_operand:VDQIW 1 "s_register_operand" "")
!    (match_operand:SI 2 "immediate_operand" "")]
    "TARGET_NEON"
  {
    if (BYTES_BIG_ENDIAN)
--- 3610,3618 ----
  })
  
  (define_expand "neon_vget_laneu<mode>"
!   [(match_operand:<V_ext> 0 "s_register_operand")
!    (match_operand:VDQIW 1 "s_register_operand")
!    (match_operand:SI 2 "immediate_operand")]
    "TARGET_NEON"
  {
    if (BYTES_BIG_ENDIAN)
***************
*** 3866,3874 ****
  })
  
  (define_expand "neon_vget_lanedi"
!   [(match_operand:DI 0 "s_register_operand" "=r")
!    (match_operand:DI 1 "s_register_operand" "w")
!    (match_operand:SI 2 "immediate_operand" "")]
    "TARGET_NEON"
  {
    emit_move_insn (operands[0], operands[1]);
--- 3640,3648 ----
  })
  
  (define_expand "neon_vget_lanedi"
!   [(match_operand:DI 0 "s_register_operand")
!    (match_operand:DI 1 "s_register_operand")
!    (match_operand:SI 2 "immediate_operand")]
    "TARGET_NEON"
  {
    emit_move_insn (operands[0], operands[1]);
***************
*** 3876,3884 ****
  })
  
  (define_expand "neon_vget_lanev2di"
!   [(match_operand:DI 0 "s_register_operand" "")
!    (match_operand:V2DI 1 "s_register_operand" "")
!    (match_operand:SI 2 "immediate_operand" "")]
    "TARGET_NEON"
  {
    int lane;
--- 3650,3658 ----
  })
  
  (define_expand "neon_vget_lanev2di"
!   [(match_operand:DI 0 "s_register_operand")
!    (match_operand:V2DI 1 "s_register_operand")
!    (match_operand:SI 2 "immediate_operand")]
    "TARGET_NEON"
  {
    int lane;
*************** if (BYTES_BIG_ENDIAN)
*** 3905,3914 ****
  })
  
  (define_expand "neon_vset_lane<mode>"
!   [(match_operand:VDQ 0 "s_register_operand" "=w")
!    (match_operand:<V_elem> 1 "s_register_operand" "r")
!    (match_operand:VDQ 2 "s_register_operand" "0")
!    (match_operand:SI 3 "immediate_operand" "i")]
    "TARGET_NEON"
  {
    unsigned int elt = INTVAL (operands[3]);
--- 3679,3688 ----
  })
  
  (define_expand "neon_vset_lane<mode>"
!   [(match_operand:VDQ 0 "s_register_operand")
!    (match_operand:<V_elem> 1 "s_register_operand")
!    (match_operand:VDQ 2 "s_register_operand")
!    (match_operand:SI 3 "immediate_operand")]
    "TARGET_NEON"
  {
    unsigned int elt = INTVAL (operands[3]);
*************** if (BYTES_BIG_ENDIAN)
*** 3928,3937 ****
  ; See neon_vget_lanedi comment for reasons operands 2 & 3 are ignored.
  
  (define_expand "neon_vset_lanedi"
!   [(match_operand:DI 0 "s_register_operand" "=w")
!    (match_operand:DI 1 "s_register_operand" "r")
!    (match_operand:DI 2 "s_register_operand" "0")
!    (match_operand:SI 3 "immediate_operand" "i")]
    "TARGET_NEON"
  {
    emit_move_insn (operands[0], operands[1]);
--- 3702,3711 ----
  ; See neon_vget_lanedi comment for reasons operands 2 & 3 are ignored.
  
  (define_expand "neon_vset_lanedi"
!   [(match_operand:DI 0 "s_register_operand")
!    (match_operand:DI 1 "s_register_operand")
!    (match_operand:DI 2 "s_register_operand")
!    (match_operand:SI 3 "immediate_operand")]
    "TARGET_NEON"
  {
    emit_move_insn (operands[0], operands[1]);
*************** if (BYTES_BIG_ENDIAN)
*** 3939,3946 ****
  })
  
  (define_expand "neon_vcreate<mode>"
!   [(match_operand:VD_RE 0 "s_register_operand" "")
!    (match_operand:DI 1 "general_operand" "")]
    "TARGET_NEON"
  {
    rtx src = gen_lowpart (<MODE>mode, operands[1]);
--- 3713,3720 ----
  })
  
  (define_expand "neon_vcreate<mode>"
!   [(match_operand:VD_RE 0 "s_register_operand")
!    (match_operand:DI 1 "general_operand")]
    "TARGET_NEON"
  {
    rtx src = gen_lowpart (<MODE>mode, operands[1]);
*************** if (BYTES_BIG_ENDIAN)
*** 3972,3977 ****
--- 3746,3767 ----
    [(set_attr "type" "neon_from_gp_q")]
  )
  
+ (define_insn "neon_vdup_nv4bf"
+   [(set (match_operand:V4BF 0 "s_register_operand" "=w")
+         (vec_duplicate:V4BF (match_operand:BF 1 "s_register_operand" "r")))]
+   "TARGET_NEON"
+   "vdup.16\t%P0, %1"
+   [(set_attr "type" "neon_from_gp")]
+ )
+ 
+ (define_insn "neon_vdup_nv8bf"
+   [(set (match_operand:V8BF 0 "s_register_operand" "=w")
+         (vec_duplicate:V8BF (match_operand:BF 1 "s_register_operand" "r")))]
+   "TARGET_NEON"
+   "vdup.16\t%q0, %1"
+   [(set_attr "type" "neon_from_gp_q")]
+ )
+ 
  (define_insn "neon_vdup_n<mode>"
    [(set (match_operand:V32 0 "s_register_operand" "=w,w")
          (vec_duplicate:V32 (match_operand:<V_elem> 1 "s_register_operand" "r,t")))]
*************** if (BYTES_BIG_ENDIAN)
*** 3983,3990 ****
  )
  
  (define_expand "neon_vdup_ndi"
!   [(match_operand:DI 0 "s_register_operand" "=w")
!    (match_operand:DI 1 "s_register_operand" "r")]
    "TARGET_NEON"
  {
    emit_move_insn (operands[0], operands[1]);
--- 3773,3780 ----
  )
  
  (define_expand "neon_vdup_ndi"
!   [(match_operand:DI 0 "s_register_operand")
!    (match_operand:DI 1 "s_register_operand")]
    "TARGET_NEON"
  {
    emit_move_insn (operands[0], operands[1]);
*************** if (BYTES_BIG_ENDIAN)
*** 4026,4037 ****
  )
  
  (define_insn "neon_vdup_lane<mode>_internal"
!  [(set (match_operand:VH 0 "s_register_operand" "=w")
!    (vec_duplicate:VH
      (vec_select:<V_elem>
       (match_operand:<V_double_vector_mode> 1 "s_register_operand" "w")
       (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))]
!  "TARGET_NEON && TARGET_FP16"
  {
    if (BYTES_BIG_ENDIAN)
      {
--- 3816,3827 ----
  )
  
  (define_insn "neon_vdup_lane<mode>_internal"
!  [(set (match_operand:VHFBF 0 "s_register_operand" "=w")
!    (vec_duplicate:VHFBF
      (vec_select:<V_elem>
       (match_operand:<V_double_vector_mode> 1 "s_register_operand" "w")
       (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))]
!  "TARGET_NEON && (TARGET_FP16 || TARGET_BF16_SIMD)"
  {
    if (BYTES_BIG_ENDIAN)
      {
*************** if (BYTES_BIG_ENDIAN)
*** 4048,4056 ****
  )
  
  (define_expand "neon_vdup_lane<mode>"
!   [(match_operand:VDQW 0 "s_register_operand" "=w")
!    (match_operand:<V_double_vector_mode> 1 "s_register_operand" "w")
!    (match_operand:SI 2 "immediate_operand" "i")]
    "TARGET_NEON"
  {
    if (BYTES_BIG_ENDIAN)
--- 3838,3846 ----
  )
  
  (define_expand "neon_vdup_lane<mode>"
!   [(match_operand:VDQW 0 "s_register_operand")
!    (match_operand:<V_double_vector_mode> 1 "s_register_operand")
!    (match_operand:SI 2 "immediate_operand")]
    "TARGET_NEON"
  {
    if (BYTES_BIG_ENDIAN)
*************** if (BYTES_BIG_ENDIAN)
*** 4067,4076 ****
  })
  
  (define_expand "neon_vdup_lane<mode>"
!   [(match_operand:VH 0 "s_register_operand")
     (match_operand:<V_double_vector_mode> 1 "s_register_operand")
     (match_operand:SI 2 "immediate_operand")]
!   "TARGET_NEON && TARGET_FP16"
  {
    if (BYTES_BIG_ENDIAN)
      {
--- 3857,3866 ----
  })
  
  (define_expand "neon_vdup_lane<mode>"
!   [(match_operand:VHFBF 0 "s_register_operand")
     (match_operand:<V_double_vector_mode> 1 "s_register_operand")
     (match_operand:SI 2 "immediate_operand")]
!   "TARGET_NEON && (TARGET_FP16 || TARGET_BF16_SIMD)"
  {
    if (BYTES_BIG_ENDIAN)
      {
*************** if (BYTES_BIG_ENDIAN)
*** 4087,4095 ****
  
  ; Scalar index is ignored, since only zero is valid here.
  (define_expand "neon_vdup_lanedi"
!   [(match_operand:DI 0 "s_register_operand" "=w")
!    (match_operand:DI 1 "s_register_operand" "w")
!    (match_operand:SI 2 "immediate_operand" "i")]
    "TARGET_NEON"
  {
    emit_move_insn (operands[0], operands[1]);
--- 3877,3885 ----
  
  ; Scalar index is ignored, since only zero is valid here.
  (define_expand "neon_vdup_lanedi"
!   [(match_operand:DI 0 "s_register_operand")
!    (match_operand:DI 1 "s_register_operand")
!    (match_operand:SI 2 "immediate_operand")]
    "TARGET_NEON"
  {
    emit_move_insn (operands[0], operands[1]);
*************** if (BYTES_BIG_ENDIAN)
*** 4098,4106 ****
  
  ; Likewise for v2di, as the DImode second operand has only a single element.
  (define_expand "neon_vdup_lanev2di"
!   [(match_operand:V2DI 0 "s_register_operand" "=w")
!    (match_operand:DI 1 "s_register_operand" "w")
!    (match_operand:SI 2 "immediate_operand" "i")]
    "TARGET_NEON"
  {
    emit_insn (gen_neon_vdup_nv2di (operands[0], operands[1]));
--- 3888,3896 ----
  
  ; Likewise for v2di, as the DImode second operand has only a single element.
  (define_expand "neon_vdup_lanev2di"
!   [(match_operand:V2DI 0 "s_register_operand")
!    (match_operand:DI 1 "s_register_operand")
!    (match_operand:SI 2 "immediate_operand")]
    "TARGET_NEON"
  {
    emit_insn (gen_neon_vdup_nv2di (operands[0], operands[1]));
*************** if (BYTES_BIG_ENDIAN)
*** 4143,4149 ****
  
  (define_expand "neon_vget_high<mode>"
    [(match_operand:<V_HALF> 0 "s_register_operand")
!    (match_operand:VQX 1 "s_register_operand")]
    "TARGET_NEON"
  {
    emit_move_insn (operands[0],
--- 3933,3939 ----
  
  (define_expand "neon_vget_high<mode>"
    [(match_operand:<V_HALF> 0 "s_register_operand")
!    (match_operand:VQXBF 1 "s_register_operand")]
    "TARGET_NEON"
  {
    emit_move_insn (operands[0],
*************** if (BYTES_BIG_ENDIAN)
*** 4629,4637 ****
  ; using vld1_lane, but that hasn't been done yet.
  
  (define_expand "neon_vmul_n<mode>"
!   [(match_operand:VMD 0 "s_register_operand" "")
!    (match_operand:VMD 1 "s_register_operand" "")
!    (match_operand:<V_elem> 2 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4419,4427 ----
  ; using vld1_lane, but that hasn't been done yet.
  
  (define_expand "neon_vmul_n<mode>"
!   [(match_operand:VMD 0 "s_register_operand")
!    (match_operand:VMD 1 "s_register_operand")
!    (match_operand:<V_elem> 2 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4642,4650 ****
  })
  
  (define_expand "neon_vmul_n<mode>"
!   [(match_operand:VMQ 0 "s_register_operand" "")
!    (match_operand:VMQ 1 "s_register_operand" "")
!    (match_operand:<V_elem> 2 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<V_HALF>mode);
--- 4432,4440 ----
  })
  
  (define_expand "neon_vmul_n<mode>"
!   [(match_operand:VMQ 0 "s_register_operand")
!    (match_operand:VMQ 1 "s_register_operand")
!    (match_operand:<V_elem> 2 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<V_HALF>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4668,4676 ****
  })
  
  (define_expand "neon_vmulls_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand" "")
!    (match_operand:VMDI 1 "s_register_operand" "")
!    (match_operand:<V_elem> 2 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4458,4466 ----
  })
  
  (define_expand "neon_vmulls_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand")
!    (match_operand:VMDI 1 "s_register_operand")
!    (match_operand:<V_elem> 2 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4681,4689 ****
  })
  
  (define_expand "neon_vmullu_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand" "")
!    (match_operand:VMDI 1 "s_register_operand" "")
!    (match_operand:<V_elem> 2 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4471,4479 ----
  })
  
  (define_expand "neon_vmullu_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand")
!    (match_operand:VMDI 1 "s_register_operand")
!    (match_operand:<V_elem> 2 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4694,4702 ****
  })
  
  (define_expand "neon_vqdmull_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand" "")
!    (match_operand:VMDI 1 "s_register_operand" "")
!    (match_operand:<V_elem> 2 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4484,4492 ----
  })
  
  (define_expand "neon_vqdmull_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand")
!    (match_operand:VMDI 1 "s_register_operand")
!    (match_operand:<V_elem> 2 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4707,4715 ****
  })
  
  (define_expand "neon_vqdmulh_n<mode>"
!   [(match_operand:VMDI 0 "s_register_operand" "")
!    (match_operand:VMDI 1 "s_register_operand" "")
!    (match_operand:<V_elem> 2 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4497,4505 ----
  })
  
  (define_expand "neon_vqdmulh_n<mode>"
!   [(match_operand:VMDI 0 "s_register_operand")
!    (match_operand:VMDI 1 "s_register_operand")
!    (match_operand:<V_elem> 2 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4720,4728 ****
  })
  
  (define_expand "neon_vqrdmulh_n<mode>"
!   [(match_operand:VMDI 0 "s_register_operand" "")
!    (match_operand:VMDI 1 "s_register_operand" "")
!    (match_operand:<V_elem> 2 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4510,4518 ----
  })
  
  (define_expand "neon_vqrdmulh_n<mode>"
!   [(match_operand:VMDI 0 "s_register_operand")
!    (match_operand:VMDI 1 "s_register_operand")
!    (match_operand:<V_elem> 2 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4733,4741 ****
  })
  
  (define_expand "neon_vqdmulh_n<mode>"
!   [(match_operand:VMQI 0 "s_register_operand" "")
!    (match_operand:VMQI 1 "s_register_operand" "")
!    (match_operand:<V_elem> 2 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<V_HALF>mode);
--- 4523,4531 ----
  })
  
  (define_expand "neon_vqdmulh_n<mode>"
!   [(match_operand:VMQI 0 "s_register_operand")
!    (match_operand:VMQI 1 "s_register_operand")
!    (match_operand:<V_elem> 2 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<V_HALF>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4746,4754 ****
  })
  
  (define_expand "neon_vqrdmulh_n<mode>"
!   [(match_operand:VMQI 0 "s_register_operand" "")
!    (match_operand:VMQI 1 "s_register_operand" "")
!    (match_operand:<V_elem> 2 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<V_HALF>mode);
--- 4536,4544 ----
  })
  
  (define_expand "neon_vqrdmulh_n<mode>"
!   [(match_operand:VMQI 0 "s_register_operand")
!    (match_operand:VMQI 1 "s_register_operand")
!    (match_operand:<V_elem> 2 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<V_HALF>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4759,4768 ****
  })
  
  (define_expand "neon_vmla_n<mode>"
!   [(match_operand:VMD 0 "s_register_operand" "")
!    (match_operand:VMD 1 "s_register_operand" "")
!    (match_operand:VMD 2 "s_register_operand" "")
!    (match_operand:<V_elem> 3 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4549,4558 ----
  })
  
  (define_expand "neon_vmla_n<mode>"
!   [(match_operand:VMD 0 "s_register_operand")
!    (match_operand:VMD 1 "s_register_operand")
!    (match_operand:VMD 2 "s_register_operand")
!    (match_operand:<V_elem> 3 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4773,4782 ****
  })
  
  (define_expand "neon_vmla_n<mode>"
!   [(match_operand:VMQ 0 "s_register_operand" "")
!    (match_operand:VMQ 1 "s_register_operand" "")
!    (match_operand:VMQ 2 "s_register_operand" "")
!    (match_operand:<V_elem> 3 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<V_HALF>mode);
--- 4563,4572 ----
  })
  
  (define_expand "neon_vmla_n<mode>"
!   [(match_operand:VMQ 0 "s_register_operand")
!    (match_operand:VMQ 1 "s_register_operand")
!    (match_operand:VMQ 2 "s_register_operand")
!    (match_operand:<V_elem> 3 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<V_HALF>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4787,4796 ****
  })
  
  (define_expand "neon_vmlals_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand" "")
!    (match_operand:<V_widen> 1 "s_register_operand" "")
!    (match_operand:VMDI 2 "s_register_operand" "")
!    (match_operand:<V_elem> 3 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4577,4586 ----
  })
  
  (define_expand "neon_vmlals_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand")
!    (match_operand:<V_widen> 1 "s_register_operand")
!    (match_operand:VMDI 2 "s_register_operand")
!    (match_operand:<V_elem> 3 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4801,4810 ****
  })
  
  (define_expand "neon_vmlalu_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand" "")
!    (match_operand:<V_widen> 1 "s_register_operand" "")
!    (match_operand:VMDI 2 "s_register_operand" "")
!    (match_operand:<V_elem> 3 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4591,4600 ----
  })
  
  (define_expand "neon_vmlalu_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand")
!    (match_operand:<V_widen> 1 "s_register_operand")
!    (match_operand:VMDI 2 "s_register_operand")
!    (match_operand:<V_elem> 3 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4815,4824 ****
  })
  
  (define_expand "neon_vqdmlal_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand" "")
!    (match_operand:<V_widen> 1 "s_register_operand" "")
!    (match_operand:VMDI 2 "s_register_operand" "")
!    (match_operand:<V_elem> 3 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4605,4614 ----
  })
  
  (define_expand "neon_vqdmlal_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand")
!    (match_operand:<V_widen> 1 "s_register_operand")
!    (match_operand:VMDI 2 "s_register_operand")
!    (match_operand:<V_elem> 3 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4829,4838 ****
  })
  
  (define_expand "neon_vmls_n<mode>"
!   [(match_operand:VMD 0 "s_register_operand" "")
!    (match_operand:VMD 1 "s_register_operand" "")
!    (match_operand:VMD 2 "s_register_operand" "")
!    (match_operand:<V_elem> 3 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4619,4628 ----
  })
  
  (define_expand "neon_vmls_n<mode>"
!   [(match_operand:VMD 0 "s_register_operand")
!    (match_operand:VMD 1 "s_register_operand")
!    (match_operand:VMD 2 "s_register_operand")
!    (match_operand:<V_elem> 3 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4843,4852 ****
  })
  
  (define_expand "neon_vmls_n<mode>"
!   [(match_operand:VMQ 0 "s_register_operand" "")
!    (match_operand:VMQ 1 "s_register_operand" "")
!    (match_operand:VMQ 2 "s_register_operand" "")
!    (match_operand:<V_elem> 3 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<V_HALF>mode);
--- 4633,4642 ----
  })
  
  (define_expand "neon_vmls_n<mode>"
!   [(match_operand:VMQ 0 "s_register_operand")
!    (match_operand:VMQ 1 "s_register_operand")
!    (match_operand:VMQ 2 "s_register_operand")
!    (match_operand:<V_elem> 3 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<V_HALF>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4857,4866 ****
  })
  
  (define_expand "neon_vmlsls_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand" "")
!    (match_operand:<V_widen> 1 "s_register_operand" "")
!    (match_operand:VMDI 2 "s_register_operand" "")
!    (match_operand:<V_elem> 3 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4647,4656 ----
  })
  
  (define_expand "neon_vmlsls_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand")
!    (match_operand:<V_widen> 1 "s_register_operand")
!    (match_operand:VMDI 2 "s_register_operand")
!    (match_operand:<V_elem> 3 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4871,4880 ****
  })
  
  (define_expand "neon_vmlslu_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand" "")
!    (match_operand:<V_widen> 1 "s_register_operand" "")
!    (match_operand:VMDI 2 "s_register_operand" "")
!    (match_operand:<V_elem> 3 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4661,4670 ----
  })
  
  (define_expand "neon_vmlslu_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand")
!    (match_operand:<V_widen> 1 "s_register_operand")
!    (match_operand:VMDI 2 "s_register_operand")
!    (match_operand:<V_elem> 3 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4885,4894 ****
  })
  
  (define_expand "neon_vqdmlsl_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand" "")
!    (match_operand:<V_widen> 1 "s_register_operand" "")
!    (match_operand:VMDI 2 "s_register_operand" "")
!    (match_operand:<V_elem> 3 "s_register_operand" "")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
--- 4675,4684 ----
  })
  
  (define_expand "neon_vqdmlsl_n<mode>"
!   [(match_operand:<V_widen> 0 "s_register_operand")
!    (match_operand:<V_widen> 1 "s_register_operand")
!    (match_operand:VMDI 2 "s_register_operand")
!    (match_operand:<V_elem> 3 "s_register_operand")]
    "TARGET_NEON"
  {
    rtx tmp = gen_reg_rtx (<MODE>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 4962,4971 ****
  )
  
  (define_expand "neon_vbsl<mode>"
!   [(set (match_operand:VDQX 0 "s_register_operand" "")
!         (unspec:VDQX [(match_operand:<V_cmp_result> 1 "s_register_operand" "")
!                       (match_operand:VDQX 2 "s_register_operand" "")
!                       (match_operand:VDQX 3 "s_register_operand" "")]
                       UNSPEC_VBSL))]
    "TARGET_NEON"
  {
--- 4752,4761 ----
  )
  
  (define_expand "neon_vbsl<mode>"
!   [(set (match_operand:VDQX 0 "s_register_operand")
!         (unspec:VDQX [(match_operand:<V_cmp_result> 1 "s_register_operand")
!                       (match_operand:VDQX 2 "s_register_operand")
!                       (match_operand:VDQX 3 "s_register_operand")]
                       UNSPEC_VBSL))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 5444,5450 ****
  	  (unspec:VDQWH [(match_operand:VDQWH 1 "s_register_operand")
  			(match_operand:VDQWH 2 "s_register_operand")]
  	   UNSPEC_VUZP1))
!      (set (match_operand:VDQWH 3 "s_register_operand" "")
  	  (unspec:VDQWH [(match_dup 1) (match_dup 2)] UNSPEC_VUZP2))])]
    "TARGET_NEON"
    ""
--- 5234,5240 ----
  	  (unspec:VDQWH [(match_operand:VDQWH 1 "s_register_operand")
  			(match_operand:VDQWH 2 "s_register_operand")]
  	   UNSPEC_VUZP1))
!      (set (match_operand:VDQWH 3 "s_register_operand")
  	  (unspec:VDQWH [(match_dup 1) (match_dup 2)] UNSPEC_VUZP2))])]
    "TARGET_NEON"
    ""
*************** if (BYTES_BIG_ENDIAN)
*** 5540,5547 ****
  
  ;; Special case for DImode.  Treat it exactly like a simple load.
  (define_expand "neon_vld1_dupdi"
!   [(set (match_operand:DI 0 "s_register_operand" "")
!         (unspec:DI [(match_operand:DI 1 "neon_struct_operand" "")]
  		   UNSPEC_VLD1))]
    "TARGET_NEON"
    ""
--- 5330,5337 ----
  
  ;; Special case for DImode.  Treat it exactly like a simple load.
  (define_expand "neon_vld1_dupdi"
!   [(set (match_operand:DI 0 "s_register_operand")
!         (unspec:DI [(match_operand:DI 1 "neon_struct_operand")]
  		   UNSPEC_VLD1))]
    "TARGET_NEON"
    ""
*************** if (BYTES_BIG_ENDIAN)
*** 5647,5653 ****
  (define_insn "neon_vld2<mode>"
    [(set (match_operand:TI 0 "s_register_operand" "=w")
          (unspec:TI [(match_operand:TI 1 "neon_struct_operand" "Um")
!                     (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD2))]
    "TARGET_NEON"
  {
--- 5437,5443 ----
  (define_insn "neon_vld2<mode>"
    [(set (match_operand:TI 0 "s_register_operand" "=w")
          (unspec:TI [(match_operand:TI 1 "neon_struct_operand" "Um")
!                     (unspec:VDXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD2))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 5672,5678 ****
  (define_insn "neon_vld2<mode>"
    [(set (match_operand:OI 0 "s_register_operand" "=w")
          (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um")
!                     (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD2))]
    "TARGET_NEON"
    "vld2.<V_sz_elem>\t%h0, %A1"
--- 5462,5468 ----
  (define_insn "neon_vld2<mode>"
    [(set (match_operand:OI 0 "s_register_operand" "=w")
          (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um")
!                     (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD2))]
    "TARGET_NEON"
    "vld2.<V_sz_elem>\t%h0, %A1"
*************** if (BYTES_BIG_ENDIAN)
*** 5735,5741 ****
  (define_insn "neon_vld2_dup<mode>"
    [(set (match_operand:TI 0 "s_register_operand" "=w")
          (unspec:TI [(match_operand:<V_two_elem> 1 "neon_struct_operand" "Um")
!                     (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD2_DUP))]
    "TARGET_NEON"
  {
--- 5525,5531 ----
  (define_insn "neon_vld2_dup<mode>"
    [(set (match_operand:TI 0 "s_register_operand" "=w")
          (unspec:TI [(match_operand:<V_two_elem> 1 "neon_struct_operand" "Um")
!                     (unspec:VDXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD2_DUP))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 5750,5755 ****
--- 5540,5566 ----
                      (const_string "neon_load1_1reg<q>")))]
  )
  
+ (define_insn "neon_vld2_dupv8bf"
+   [(set (match_operand:OI 0 "s_register_operand" "=w")
+         (unspec:OI [(match_operand:V2BF 1 "neon_struct_operand" "Um")
+                     (unspec:V8BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD2_DUP))]
+   "TARGET_BF16_SIMD"
+   {
+     rtx ops[5];
+     int tabbase = REGNO (operands[0]);
+ 
+     ops[4] = operands[1];
+     ops[0] = gen_rtx_REG (V4BFmode, tabbase);
+     ops[1] = gen_rtx_REG (V4BFmode, tabbase + 2);
+     ops[2] = gen_rtx_REG (V4BFmode, tabbase + 4);
+     ops[3] = gen_rtx_REG (V4BFmode, tabbase + 6);
+     output_asm_insn ("vld2.16\t{%P0, %P1, %P2, %P3}, %A4", ops);
+     return "";
+   }
+   [(set_attr "type" "neon_load2_all_lanes_q")]
+ )
+ 
  (define_expand "vec_store_lanesti<mode>"
    [(set (match_operand:TI 0 "neon_struct_operand")
  	(unspec:TI [(match_operand:TI 1 "s_register_operand")
*************** if (BYTES_BIG_ENDIAN)
*** 5760,5766 ****
  (define_insn "neon_vst2<mode>"
    [(set (match_operand:TI 0 "neon_struct_operand" "=Um")
          (unspec:TI [(match_operand:TI 1 "s_register_operand" "w")
!                     (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST2))]
    "TARGET_NEON"
  {
--- 5571,5577 ----
  (define_insn "neon_vst2<mode>"
    [(set (match_operand:TI 0 "neon_struct_operand" "=Um")
          (unspec:TI [(match_operand:TI 1 "s_register_operand" "w")
!                     (unspec:VDXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST2))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 5785,5791 ****
  (define_insn "neon_vst2<mode>"
    [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
  	(unspec:OI [(match_operand:OI 1 "s_register_operand" "w")
! 		    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
  		   UNSPEC_VST2))]
    "TARGET_NEON"
    "vst2.<V_sz_elem>\t%h1, %A0"
--- 5596,5602 ----
  (define_insn "neon_vst2<mode>"
    [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
  	(unspec:OI [(match_operand:OI 1 "s_register_operand" "w")
! 		    (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
  		   UNSPEC_VST2))]
    "TARGET_NEON"
    "vst2.<V_sz_elem>\t%h1, %A0"
*************** if (BYTES_BIG_ENDIAN)
*** 5856,5862 ****
  (define_insn "neon_vld3<mode>"
    [(set (match_operand:EI 0 "s_register_operand" "=w")
          (unspec:EI [(match_operand:EI 1 "neon_struct_operand" "Um")
!                     (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD3))]
    "TARGET_NEON"
  {
--- 5667,5673 ----
  (define_insn "neon_vld3<mode>"
    [(set (match_operand:EI 0 "s_register_operand" "=w")
          (unspec:EI [(match_operand:EI 1 "neon_struct_operand" "Um")
!                     (unspec:VDXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD3))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 5884,5890 ****
  (define_expand "neon_vld3<mode>"
    [(match_operand:CI 0 "s_register_operand")
     (match_operand:CI 1 "neon_struct_operand")
!    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
    rtx mem;
--- 5695,5701 ----
  (define_expand "neon_vld3<mode>"
    [(match_operand:CI 0 "s_register_operand")
     (match_operand:CI 1 "neon_struct_operand")
!    (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
    rtx mem;
*************** if (BYTES_BIG_ENDIAN)
*** 5899,5905 ****
  (define_insn "neon_vld3qa<mode>"
    [(set (match_operand:CI 0 "s_register_operand" "=w")
          (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um")
!                     (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD3A))]
    "TARGET_NEON"
  {
--- 5710,5716 ----
  (define_insn "neon_vld3qa<mode>"
    [(set (match_operand:CI 0 "s_register_operand" "=w")
          (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um")
!                     (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD3A))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 5919,5925 ****
    [(set (match_operand:CI 0 "s_register_operand" "=w")
          (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um")
                      (match_operand:CI 2 "s_register_operand" "0")
!                     (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD3B))]
    "TARGET_NEON"
  {
--- 5730,5736 ----
    [(set (match_operand:CI 0 "s_register_operand" "=w")
          (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um")
                      (match_operand:CI 2 "s_register_operand" "0")
!                     (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD3B))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 5996,6002 ****
  (define_insn "neon_vld3_dup<mode>"
    [(set (match_operand:EI 0 "s_register_operand" "=w")
          (unspec:EI [(match_operand:<V_three_elem> 1 "neon_struct_operand" "Um")
!                     (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD3_DUP))]
    "TARGET_NEON"
  {
--- 5807,5813 ----
  (define_insn "neon_vld3_dup<mode>"
    [(set (match_operand:EI 0 "s_register_operand" "=w")
          (unspec:EI [(match_operand:<V_three_elem> 1 "neon_struct_operand" "Um")
!                     (unspec:VDXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD3_DUP))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6019,6024 ****
--- 5830,5855 ----
                      (const_string "neon_load3_all_lanes<q>")
                      (const_string "neon_load1_1reg<q>")))])
  
+ (define_insn "neon_vld3_dupv8bf"
+   [(set (match_operand:CI 0 "s_register_operand" "=w")
+         (unspec:CI [(match_operand:V2BF 1 "neon_struct_operand" "Um")
+                     (unspec:V8BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD2_DUP))]
+   "TARGET_BF16_SIMD"
+   {
+     rtx ops[4];
+     int tabbase = REGNO (operands[0]);
+ 
+     ops[3] = operands[1];
+     ops[0] = gen_rtx_REG (V4BFmode, tabbase);
+     ops[1] = gen_rtx_REG (V4BFmode, tabbase + 2);
+     ops[2] = gen_rtx_REG (V4BFmode, tabbase + 4);
+     output_asm_insn ("vld3.16\t{%P0[], %P1[], %P2[]}, %A3", ops);
+     return "";
+   }
+   [(set_attr "type" "neon_load3_all_lanes_q")]
+ )
+ 
  (define_expand "vec_store_lanesei<mode>"
    [(set (match_operand:EI 0 "neon_struct_operand")
  	(unspec:EI [(match_operand:EI 1 "s_register_operand")
*************** if (BYTES_BIG_ENDIAN)
*** 6029,6035 ****
  (define_insn "neon_vst3<mode>"
    [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
          (unspec:EI [(match_operand:EI 1 "s_register_operand" "w")
!                     (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST3))]
    "TARGET_NEON"
  {
--- 5860,5866 ----
  (define_insn "neon_vst3<mode>"
    [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
          (unspec:EI [(match_operand:EI 1 "s_register_operand" "w")
!                     (unspec:VDXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST3))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6056,6062 ****
  (define_expand "neon_vst3<mode>"
    [(match_operand:CI 0 "neon_struct_operand")
     (match_operand:CI 1 "s_register_operand")
!    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
    rtx mem;
--- 5887,5893 ----
  (define_expand "neon_vst3<mode>"
    [(match_operand:CI 0 "neon_struct_operand")
     (match_operand:CI 1 "s_register_operand")
!    (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
    rtx mem;
*************** if (BYTES_BIG_ENDIAN)
*** 6071,6077 ****
  (define_insn "neon_vst3qa<mode>"
    [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
          (unspec:EI [(match_operand:CI 1 "s_register_operand" "w")
!                     (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST3A))]
    "TARGET_NEON"
  {
--- 5902,5908 ----
  (define_insn "neon_vst3qa<mode>"
    [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
          (unspec:EI [(match_operand:CI 1 "s_register_operand" "w")
!                     (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST3A))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6090,6096 ****
  (define_insn "neon_vst3qb<mode>"
    [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
          (unspec:EI [(match_operand:CI 1 "s_register_operand" "w")
!                     (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST3B))]
    "TARGET_NEON"
  {
--- 5921,5927 ----
  (define_insn "neon_vst3qb<mode>"
    [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
          (unspec:EI [(match_operand:CI 1 "s_register_operand" "w")
!                     (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST3B))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6174,6180 ****
  (define_insn "neon_vld4<mode>"
    [(set (match_operand:OI 0 "s_register_operand" "=w")
          (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um")
!                     (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD4))]
    "TARGET_NEON"
  {
--- 6005,6011 ----
  (define_insn "neon_vld4<mode>"
    [(set (match_operand:OI 0 "s_register_operand" "=w")
          (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um")
!                     (unspec:VDXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD4))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6202,6208 ****
  (define_expand "neon_vld4<mode>"
    [(match_operand:XI 0 "s_register_operand")
     (match_operand:XI 1 "neon_struct_operand")
!    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
    rtx mem;
--- 6033,6039 ----
  (define_expand "neon_vld4<mode>"
    [(match_operand:XI 0 "s_register_operand")
     (match_operand:XI 1 "neon_struct_operand")
!    (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
    rtx mem;
*************** if (BYTES_BIG_ENDIAN)
*** 6217,6223 ****
  (define_insn "neon_vld4qa<mode>"
    [(set (match_operand:XI 0 "s_register_operand" "=w")
          (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um")
!                     (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD4A))]
    "TARGET_NEON"
  {
--- 6048,6054 ----
  (define_insn "neon_vld4qa<mode>"
    [(set (match_operand:XI 0 "s_register_operand" "=w")
          (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um")
!                     (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD4A))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6238,6244 ****
    [(set (match_operand:XI 0 "s_register_operand" "=w")
          (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um")
                      (match_operand:XI 2 "s_register_operand" "0")
!                     (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD4B))]
    "TARGET_NEON"
  {
--- 6069,6075 ----
    [(set (match_operand:XI 0 "s_register_operand" "=w")
          (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um")
                      (match_operand:XI 2 "s_register_operand" "0")
!                     (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD4B))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6318,6324 ****
  (define_insn "neon_vld4_dup<mode>"
    [(set (match_operand:OI 0 "s_register_operand" "=w")
          (unspec:OI [(match_operand:<V_four_elem> 1 "neon_struct_operand" "Um")
!                     (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD4_DUP))]
    "TARGET_NEON"
  {
--- 6149,6155 ----
  (define_insn "neon_vld4_dup<mode>"
    [(set (match_operand:OI 0 "s_register_operand" "=w")
          (unspec:OI [(match_operand:<V_four_elem> 1 "neon_struct_operand" "Um")
!                     (unspec:VDXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD4_DUP))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6344,6349 ****
--- 6175,6201 ----
                      (const_string "neon_load1_1reg<q>")))]
  )
  
+ (define_insn "neon_vld4_dupv8bf"
+   [(set (match_operand:XI 0 "s_register_operand" "=w")
+         (unspec:XI [(match_operand:V2BF 1 "neon_struct_operand" "Um")
+                     (unspec:V8BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD2_DUP))]
+   "TARGET_BF16_SIMD"
+   {
+     rtx ops[5];
+     int tabbase = REGNO (operands[0]);
+ 
+     ops[4] = operands[1];
+     ops[0] = gen_rtx_REG (V4BFmode, tabbase);
+     ops[1] = gen_rtx_REG (V4BFmode, tabbase + 2);
+     ops[2] = gen_rtx_REG (V4BFmode, tabbase + 4);
+     ops[3] = gen_rtx_REG (V4BFmode, tabbase + 6);
+     output_asm_insn ("vld4.16\t{%P0[], %P1[], %P2[], %P3[]}, %A4", ops);
+     return "";
+   }
+   [(set_attr "type" "neon_load4_all_lanes_q")]
+ )
+ 
  (define_expand "vec_store_lanesoi<mode>"
    [(set (match_operand:OI 0 "neon_struct_operand")
  	(unspec:OI [(match_operand:OI 1 "s_register_operand")
*************** if (BYTES_BIG_ENDIAN)
*** 6354,6360 ****
  (define_insn "neon_vst4<mode>"
    [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
          (unspec:OI [(match_operand:OI 1 "s_register_operand" "w")
!                     (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST4))]
    "TARGET_NEON"
  {
--- 6206,6212 ----
  (define_insn "neon_vst4<mode>"
    [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
          (unspec:OI [(match_operand:OI 1 "s_register_operand" "w")
!                     (unspec:VDXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST4))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6382,6388 ****
  (define_expand "neon_vst4<mode>"
    [(match_operand:XI 0 "neon_struct_operand")
     (match_operand:XI 1 "s_register_operand")
!    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
    rtx mem;
--- 6234,6240 ----
  (define_expand "neon_vst4<mode>"
    [(match_operand:XI 0 "neon_struct_operand")
     (match_operand:XI 1 "s_register_operand")
!    (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
    rtx mem;
*************** if (BYTES_BIG_ENDIAN)
*** 6397,6403 ****
  (define_insn "neon_vst4qa<mode>"
    [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
          (unspec:OI [(match_operand:XI 1 "s_register_operand" "w")
!                     (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST4A))]
    "TARGET_NEON"
  {
--- 6249,6255 ----
  (define_insn "neon_vst4qa<mode>"
    [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
          (unspec:OI [(match_operand:XI 1 "s_register_operand" "w")
!                     (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST4A))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6417,6423 ****
  (define_insn "neon_vst4qb<mode>"
    [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
          (unspec:OI [(match_operand:XI 1 "s_register_operand" "w")
!                     (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST4B))]
    "TARGET_NEON"
  {
--- 6269,6275 ----
  (define_insn "neon_vst4qb<mode>"
    [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
          (unspec:OI [(match_operand:XI 1 "s_register_operand" "w")
!                     (unspec:VQ2BF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VST4B))]
    "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6515,6521 ****
  )
  
  (define_expand "vec_unpack<US>_hi_<mode>"
!   [(match_operand:<V_unpack> 0 "register_operand" "")
     (SE:<V_unpack> (match_operand:VU 1 "register_operand"))]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
    {
--- 6367,6373 ----
  )
  
  (define_expand "vec_unpack<US>_hi_<mode>"
!   [(match_operand:<V_unpack> 0 "register_operand")
     (SE:<V_unpack> (match_operand:VU 1 "register_operand"))]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
    {
*************** if (BYTES_BIG_ENDIAN)
*** 6534,6541 ****
  )
  
  (define_expand "vec_unpack<US>_lo_<mode>"
!   [(match_operand:<V_unpack> 0 "register_operand" "")
!    (SE:<V_unpack> (match_operand:VU 1 "register_operand" ""))]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
    {
     rtvec v = rtvec_alloc (<V_mode_nunits>/2)  ;
--- 6386,6393 ----
  )
  
  (define_expand "vec_unpack<US>_lo_<mode>"
!   [(match_operand:<V_unpack> 0 "register_operand")
!    (SE:<V_unpack> (match_operand:VU 1 "register_operand"))]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
    {
     rtvec v = rtvec_alloc (<V_mode_nunits>/2)  ;
*************** if (BYTES_BIG_ENDIAN)
*** 6565,6573 ****
  )
  
  (define_expand "vec_widen_<US>mult_lo_<mode>"
!   [(match_operand:<V_unpack> 0 "register_operand" "")
!    (SE:<V_unpack> (match_operand:VU 1 "register_operand" ""))
!    (SE:<V_unpack> (match_operand:VU 2 "register_operand" ""))]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
   {
     rtvec v = rtvec_alloc (<V_mode_nunits>/2)  ;
--- 6417,6425 ----
  )
  
  (define_expand "vec_widen_<US>mult_lo_<mode>"
!   [(match_operand:<V_unpack> 0 "register_operand")
!    (SE:<V_unpack> (match_operand:VU 1 "register_operand"))
!    (SE:<V_unpack> (match_operand:VU 2 "register_operand"))]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
   {
     rtvec v = rtvec_alloc (<V_mode_nunits>/2)  ;
*************** if (BYTES_BIG_ENDIAN)
*** 6599,6607 ****
  )
  
  (define_expand "vec_widen_<US>mult_hi_<mode>"
!   [(match_operand:<V_unpack> 0 "register_operand" "")
!    (SE:<V_unpack> (match_operand:VU 1 "register_operand" ""))
!    (SE:<V_unpack> (match_operand:VU 2 "register_operand" ""))]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
   {
     rtvec v = rtvec_alloc (<V_mode_nunits>/2)  ;
--- 6451,6459 ----
  )
  
  (define_expand "vec_widen_<US>mult_hi_<mode>"
!   [(match_operand:<V_unpack> 0 "register_operand")
!    (SE:<V_unpack> (match_operand:VU 1 "register_operand"))
!    (SE:<V_unpack> (match_operand:VU 2 "register_operand"))]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
   {
     rtvec v = rtvec_alloc (<V_mode_nunits>/2)  ;
*************** if (BYTES_BIG_ENDIAN)
*** 6632,6640 ****
  )
  
  (define_expand "vec_widen_<US>shiftl_lo_<mode>"
!   [(match_operand:<V_unpack> 0 "register_operand" "")
!    (SE:<V_unpack> (match_operand:VU 1 "register_operand" ""))
!    (match_operand:SI 2 "immediate_operand" "i")]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
   {
    emit_insn (gen_neon_vec_<US>shiftl_<V_half> (operands[0],
--- 6484,6492 ----
  )
  
  (define_expand "vec_widen_<US>shiftl_lo_<mode>"
!   [(match_operand:<V_unpack> 0 "register_operand")
!    (SE:<V_unpack> (match_operand:VU 1 "register_operand"))
!    (match_operand:SI 2 "immediate_operand")]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
   {
    emit_insn (gen_neon_vec_<US>shiftl_<V_half> (operands[0],
*************** if (BYTES_BIG_ENDIAN)
*** 6645,6653 ****
  )
  
  (define_expand "vec_widen_<US>shiftl_hi_<mode>"
!   [(match_operand:<V_unpack> 0 "register_operand" "")
!    (SE:<V_unpack> (match_operand:VU 1 "register_operand" ""))
!    (match_operand:SI 2 "immediate_operand" "i")]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
   {
    emit_insn (gen_neon_vec_<US>shiftl_<V_half> (operands[0],
--- 6497,6505 ----
  )
  
  (define_expand "vec_widen_<US>shiftl_hi_<mode>"
!   [(match_operand:<V_unpack> 0 "register_operand")
!    (SE:<V_unpack> (match_operand:VU 1 "register_operand"))
!    (match_operand:SI 2 "immediate_operand")]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
   {
    emit_insn (gen_neon_vec_<US>shiftl_<V_half> (operands[0],
*************** if (BYTES_BIG_ENDIAN)
*** 6668,6674 ****
  )
  
  (define_expand "vec_unpack<US>_lo_<mode>"
!  [(match_operand:<V_double_width> 0 "register_operand" "")
    (SE:<V_double_width>(match_operand:VDI 1 "register_operand"))]
   "TARGET_NEON"
  {
--- 6520,6526 ----
  )
  
  (define_expand "vec_unpack<US>_lo_<mode>"
!  [(match_operand:<V_double_width> 0 "register_operand")
    (SE:<V_double_width>(match_operand:VDI 1 "register_operand"))]
   "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6681,6687 ****
  )
  
  (define_expand "vec_unpack<US>_hi_<mode>"
!  [(match_operand:<V_double_width> 0 "register_operand" "")
    (SE:<V_double_width>(match_operand:VDI 1 "register_operand"))]
   "TARGET_NEON"
  {
--- 6533,6539 ----
  )
  
  (define_expand "vec_unpack<US>_hi_<mode>"
!  [(match_operand:<V_double_width> 0 "register_operand")
    (SE:<V_double_width>(match_operand:VDI 1 "register_operand"))]
   "TARGET_NEON"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6705,6713 ****
  )
  
  (define_expand "vec_widen_<US>mult_hi_<mode>"
!   [(match_operand:<V_double_width> 0 "register_operand" "")
!    (SE:<V_double_width> (match_operand:VDI 1 "register_operand" ""))
!    (SE:<V_double_width> (match_operand:VDI 2 "register_operand" ""))]
   "TARGET_NEON"
   {
     rtx tmpreg = gen_reg_rtx (<V_widen>mode);
--- 6557,6565 ----
  )
  
  (define_expand "vec_widen_<US>mult_hi_<mode>"
!   [(match_operand:<V_double_width> 0 "register_operand")
!    (SE:<V_double_width> (match_operand:VDI 1 "register_operand"))
!    (SE:<V_double_width> (match_operand:VDI 2 "register_operand"))]
   "TARGET_NEON"
   {
     rtx tmpreg = gen_reg_rtx (<V_widen>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 6720,6728 ****
  )
  
  (define_expand "vec_widen_<US>mult_lo_<mode>"
!   [(match_operand:<V_double_width> 0 "register_operand" "")
!    (SE:<V_double_width> (match_operand:VDI 1 "register_operand" ""))
!    (SE:<V_double_width> (match_operand:VDI 2 "register_operand" ""))]
   "TARGET_NEON"
   {
     rtx tmpreg = gen_reg_rtx (<V_widen>mode);
--- 6572,6580 ----
  )
  
  (define_expand "vec_widen_<US>mult_lo_<mode>"
!   [(match_operand:<V_double_width> 0 "register_operand")
!    (SE:<V_double_width> (match_operand:VDI 1 "register_operand"))
!    (SE:<V_double_width> (match_operand:VDI 2 "register_operand"))]
   "TARGET_NEON"
   {
     rtx tmpreg = gen_reg_rtx (<V_widen>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 6735,6743 ****
  )
  
  (define_expand "vec_widen_<US>shiftl_hi_<mode>"
!  [(match_operand:<V_double_width> 0 "register_operand" "")
!    (SE:<V_double_width> (match_operand:VDI 1 "register_operand" ""))
!    (match_operand:SI 2 "immediate_operand" "i")]
   "TARGET_NEON"
   {
     rtx tmpreg = gen_reg_rtx (<V_widen>mode);
--- 6587,6595 ----
  )
  
  (define_expand "vec_widen_<US>shiftl_hi_<mode>"
!  [(match_operand:<V_double_width> 0 "register_operand")
!    (SE:<V_double_width> (match_operand:VDI 1 "register_operand"))
!    (match_operand:SI 2 "immediate_operand")]
   "TARGET_NEON"
   {
     rtx tmpreg = gen_reg_rtx (<V_widen>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 6749,6757 ****
  )
  
  (define_expand "vec_widen_<US>shiftl_lo_<mode>"
!   [(match_operand:<V_double_width> 0 "register_operand" "")
!    (SE:<V_double_width> (match_operand:VDI 1 "register_operand" ""))
!    (match_operand:SI 2 "immediate_operand" "i")]
   "TARGET_NEON"
   {
     rtx tmpreg = gen_reg_rtx (<V_widen>mode);
--- 6601,6609 ----
  )
  
  (define_expand "vec_widen_<US>shiftl_lo_<mode>"
!   [(match_operand:<V_double_width> 0 "register_operand")
!    (SE:<V_double_width> (match_operand:VDI 1 "register_operand"))
!    (match_operand:SI 2 "immediate_operand")]
   "TARGET_NEON"
   {
     rtx tmpreg = gen_reg_rtx (<V_widen>mode);
*************** if (BYTES_BIG_ENDIAN)
*** 6789,6796 ****
  )
  
  (define_expand "vec_pack_trunc_<mode>"
!  [(match_operand:<V_narrow_pack> 0 "register_operand" "")
!   (match_operand:VSHFT 1 "register_operand" "")
    (match_operand:VSHFT 2 "register_operand")]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
  {
--- 6641,6648 ----
  )
  
  (define_expand "vec_pack_trunc_<mode>"
!  [(match_operand:<V_narrow_pack> 0 "register_operand")
!   (match_operand:VSHFT 1 "register_operand")
    (match_operand:VSHFT 2 "register_operand")]
   "TARGET_NEON && !BYTES_BIG_ENDIAN"
  {
*************** if (BYTES_BIG_ENDIAN)
*** 6821,6884 ****
   [(set_attr "type" "neon_fp_abd_s<q>")]
  )
  
! ;; Copy from core-to-neon regs, then extend, not vice-versa
  
! (define_split
!   [(set (match_operand:DI 0 "s_register_operand" "")
! 	(sign_extend:DI (match_operand:SI 1 "s_register_operand" "")))]
!   "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))"
!   [(set (match_dup 2) (vec_duplicate:V2SI (match_dup 1)))
!    (set (match_dup 0) (ashiftrt:DI (match_dup 0) (const_int 32)))]
!   {
!     operands[2] = gen_rtx_REG (V2SImode, REGNO (operands[0]));
!   })
  
! (define_split
!   [(set (match_operand:DI 0 "s_register_operand" "")
! 	(sign_extend:DI (match_operand:HI 1 "s_register_operand" "")))]
!   "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))"
!   [(set (match_dup 2) (vec_duplicate:V4HI (match_dup 1)))
!    (set (match_dup 0) (ashiftrt:DI (match_dup 0) (const_int 48)))]
!   {
!     operands[2] = gen_rtx_REG (V4HImode, REGNO (operands[0]));
!   })
  
! (define_split
!   [(set (match_operand:DI 0 "s_register_operand" "")
! 	(sign_extend:DI (match_operand:QI 1 "s_register_operand" "")))]
!   "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))"
!   [(set (match_dup 2) (vec_duplicate:V8QI (match_dup 1)))
!    (set (match_dup 0) (ashiftrt:DI (match_dup 0) (const_int 56)))]
    {
!     operands[2] = gen_rtx_REG (V8QImode, REGNO (operands[0]));
!   })
  
! (define_split
!   [(set (match_operand:DI 0 "s_register_operand" "")
! 	(zero_extend:DI (match_operand:SI 1 "s_register_operand" "")))]
!   "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))"
!   [(set (match_dup 2) (vec_duplicate:V2SI (match_dup 1)))
!    (set (match_dup 0) (lshiftrt:DI (match_dup 0) (const_int 32)))]
!   {
!     operands[2] = gen_rtx_REG (V2SImode, REGNO (operands[0]));
!   })
  
! (define_split
!   [(set (match_operand:DI 0 "s_register_operand" "")
! 	(zero_extend:DI (match_operand:HI 1 "s_register_operand" "")))]
!   "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))"
!   [(set (match_dup 2) (vec_duplicate:V4HI (match_dup 1)))
!    (set (match_dup 0) (lshiftrt:DI (match_dup 0) (const_int 48)))]
!   {
!     operands[2] = gen_rtx_REG (V4HImode, REGNO (operands[0]));
!   })
  
! (define_split
!   [(set (match_operand:DI 0 "s_register_operand" "")
! 	(zero_extend:DI (match_operand:QI 1 "s_register_operand" "")))]
!   "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))"
!   [(set (match_dup 2) (vec_duplicate:V8QI (match_dup 1)))
!    (set (match_dup 0) (lshiftrt:DI (match_dup 0) (const_int 56)))]
    {
!     operands[2] = gen_rtx_REG (V8QImode, REGNO (operands[0]));
!   })
--- 6673,6871 ----
   [(set_attr "type" "neon_fp_abd_s<q>")]
  )
  
! (define_insn "neon_<sup>mmlav16qi"
!   [(set (match_operand:V4SI 0 "register_operand" "=w")
! 	(plus:V4SI
! 	 (unspec:V4SI [(match_operand:V16QI 2 "register_operand" "w")
! 		       (match_operand:V16QI 3 "register_operand" "w")] MATMUL)
! 	 (match_operand:V4SI 1 "register_operand" "0")))]
!   "TARGET_I8MM"
!   "v<sup>mmla.<mmla_sfx>\t%q0, %q2, %q3"
!   [(set_attr "type" "neon_mla_s_q")]
! )
  
! (define_insn "neon_vbfdot<VCVTF:mode>"
!   [(set (match_operand:VCVTF 0 "register_operand" "=w")
! 	(plus:VCVTF (match_operand:VCVTF 1 "register_operand" "0")
! 		    (unspec:VCVTF [
! 			    (match_operand:<VSF2BF> 2 "register_operand" "w")
! 			    (match_operand:<VSF2BF> 3 "register_operand" "w")]
! 		     UNSPEC_DOT_S)))]
!   "TARGET_BF16_SIMD"
!   "vdot.bf16\\t%<V_reg>0, %<V_reg>2, %<V_reg>3"
!   [(set_attr "type" "neon_dot<q>")]
! )
  
! (define_insn "neon_vbfdot_lanev4bf<VCVTF:mode>"
!   [(set (match_operand:VCVTF 0 "register_operand" "=w")
! 	(plus:VCVTF (match_operand:VCVTF 1 "register_operand" "0")
! 		    (unspec:VCVTF [
! 			    (match_operand:<VSF2BF> 2 "register_operand" "w")
! 			    (match_operand:V4BF 3 "register_operand" "x")
! 			    (match_operand:SI 4 "immediate_operand" "i")]
! 		     UNSPEC_DOT_S)))]
!   "TARGET_BF16_SIMD"
!   "vdot.bf16\\t%<V_reg>0, %<V_reg>2, %P3[%c4]"
!   [(set_attr "type" "neon_dot<q>")]
! )
  
! (define_insn "neon_vbfdot_lanev8bf<VCVTF:mode>"
!   [(set (match_operand:VCVTF 0 "register_operand" "=w")
! 	(plus:VCVTF (match_operand:VCVTF 1 "register_operand" "0")
! 		    (unspec:VCVTF [
! 			    (match_operand:<VSF2BF> 2 "register_operand" "w")
! 			    (match_operand:V8BF 3 "register_operand" "x")
! 			    (match_operand:SI 4 "immediate_operand" "i")]
! 		     UNSPEC_DOT_S)))]
!   "TARGET_BF16_SIMD"
    {
!     int lane = INTVAL (operands[4]);
!     int half = GET_MODE_NUNITS (GET_MODE (operands[3])) / 4;
!     if (lane < half)
!       return "vdot.bf16\\t%<V_reg>0, %<V_reg>2, %e3[%c4]";
!     else
!       {
! 	operands[4] = GEN_INT (lane - half);
! 	return "vdot.bf16\\t%<V_reg>0, %<V_reg>2, %f3[%c4]";
!       }
!   }
!   [(set_attr "type" "neon_dot<q>")]
! )
  
! (define_insn "neon_vbfcvtv4sf<VBFCVT:mode>"
!   [(set (match_operand:VBFCVT 0 "register_operand" "=w")
!        (unspec:VBFCVT [(match_operand:V4SF 1 "register_operand" "w")]
! 	UNSPEC_BFCVT))]
!   "TARGET_BF16_SIMD"
!   "vcvt.bf16.f32\\t%<V_bf_low>0, %q1"
!   [(set_attr "type" "neon_fp_cvt_narrow_s_q")]
! )
  
! (define_insn "neon_vbfcvtv4sf_highv8bf"
!   [(set (match_operand:V8BF 0 "register_operand" "=w")
!        (unspec:V8BF [(match_operand:V8BF 1 "register_operand" "0")
! 		     (match_operand:V4SF 2 "register_operand" "w")]
! 	UNSPEC_BFCVT_HIGH))]
!   "TARGET_BF16_SIMD"
!   "vcvt.bf16.f32\\t%f0, %q2"
!   [(set_attr "type" "neon_fp_cvt_narrow_s_q")]
! )
  
! (define_insn "neon_vbfcvtsf"
!   [(set (match_operand:BF 0 "register_operand" "=t")
!        (unspec:BF [(match_operand:SF 1 "register_operand" "t")]
! 	UNSPEC_BFCVT))]
!   "TARGET_BF16_FP"
!   "vcvtb.bf16.f32\\t%0, %1"
!   [(set_attr "type" "f_cvt")]
! )
! 
! (define_insn "neon_vbfcvt<VBFCVT:mode>"
!   [(set (match_operand:V4SF 0 "register_operand" "=w")
!        (unspec:V4SF [(match_operand:VBFCVT 1 "register_operand" "w")]
! 	UNSPEC_BFCVT))]
!   "TARGET_BF16_SIMD"
!   "vshll.u32\\t%q0, %<V_bf_low>1, #16"
!   [(set_attr "type" "neon_shift_imm_q")]
! )
! 
! (define_insn "neon_vbfcvt_highv8bf"
!   [(set (match_operand:V4SF 0 "register_operand" "=w")
!        (unspec:V4SF [(match_operand:V8BF 1 "register_operand" "w")]
! 	UNSPEC_BFCVT_HIGH))]
!   "TARGET_BF16_SIMD"
!   "vshll.u32\\t%q0, %f1, #16"
!   [(set_attr "type" "neon_shift_imm_q")]
! )
! 
! ;; Convert a BF scalar operand to SF via VSHL.
! ;; VSHL doesn't accept 32-bit registers where the BF and SF scalar operands
! ;; would be allocated, therefore the operands must be converted to intermediate
! ;; vectors (i.e. V2SI) in order to apply 64-bit registers.
! (define_expand "neon_vbfcvtbf"
!   [(match_operand:SF 0 "register_operand")
!    (unspec:SF [(match_operand:BF 1 "register_operand")] UNSPEC_BFCVT)]
!   "TARGET_BF16_FP"
! {
!   rtx op0 = gen_reg_rtx (V2SImode);
!   rtx op1 = gen_reg_rtx (V2SImode);
!   emit_insn (gen_neon_vbfcvtbf_cvtmodev2si (op1, operands[1]));
!   emit_insn (gen_neon_vshl_nv2si (op0, op1, gen_int_mode(16, SImode)));
!   emit_insn (gen_neon_vbfcvtbf_cvtmodesf (operands[0], op0));
!   DONE;
! })
! 
! ;; Convert BF mode to V2SI and V2SI to SF.
! ;; Implement this by allocating a 32-bit operand in the low half of a 64-bit
! ;; register indexed by a 32-bit sub-register number.
! ;; This will generate reloads but compiler can optimize out the moves.
! ;; Use 'x' constraint to guarantee the 32-bit sub-registers in an indexable
! ;; range so that to avoid extra moves.
! (define_insn "neon_vbfcvtbf_cvtmode<mode>"
!   [(set (match_operand:VBFCVTM 0 "register_operand" "=x")
!        (unspec:VBFCVTM [(match_operand:<V_bf_cvt_m> 1 "register_operand" "0")]
! 	UNSPEC_BFCVT))]
!   "TARGET_BF16_FP"
!   ""
! )
! 
! (define_insn "neon_vmmlav8bf"
!   [(set (match_operand:V4SF 0 "register_operand" "=w")
!         (plus:V4SF (match_operand:V4SF 1 "register_operand" "0")
!                    (unspec:V4SF [(match_operand:V8BF 2 "register_operand" "w")
!                                  (match_operand:V8BF 3 "register_operand" "w")]
!                     UNSPEC_BFMMLA)))]
!   "TARGET_BF16_SIMD"
!   "vmmla.bf16\\t%q0, %q2, %q3"
!   [(set_attr "type" "neon_fp_mla_s_q")]
! )
! 
! (define_insn "neon_vfma<bt>v8bf"
!   [(set (match_operand:V4SF 0 "register_operand" "=w")
!         (plus: V4SF (match_operand:V4SF 1 "register_operand" "0")
!                     (unspec:V4SF [(match_operand:V8BF 2 "register_operand" "w")
!                                   (match_operand:V8BF 3 "register_operand" "w")]
!                      BF_MA)))]
!   "TARGET_BF16_SIMD"
!   "vfma<bt>.bf16\\t%q0, %q2, %q3"
!   [(set_attr "type" "neon_fp_mla_s_q")]
! )
! 
! (define_insn "neon_vfma<bt>_lanev8bf"
!   [(set (match_operand:V4SF 0 "register_operand" "=w")
!         (plus: V4SF (match_operand:V4SF 1 "register_operand" "0")
!                     (unspec:V4SF [(match_operand:V8BF 2 "register_operand" "w")
!                                   (match_operand:V4BF 3 "register_operand" "x")
!                                   (match_operand:SI 4 "const_int_operand" "n")]
!                      BF_MA)))]
!   "TARGET_BF16_SIMD"
!   "vfma<bt>.bf16\\t%q0, %q2, %P3[%c4]"
!   [(set_attr "type" "neon_fp_mla_s_scalar_q")]
! )
! 
! (define_expand "neon_vfma<bt>_laneqv8bf"
!   [(set (match_operand:V4SF 0 "register_operand" "=w")
!         (plus: V4SF (match_operand:V4SF 1 "register_operand" "0")
!                     (unspec:V4SF [(match_operand:V8BF 2 "register_operand" "w")
!                                   (match_operand:V8BF 3 "register_operand" "x")
!                                   (match_operand:SI 4 "const_int_operand" "n")]
!                      BF_MA)))]
!   "TARGET_BF16_SIMD"
    {
!     int lane = INTVAL (operands[4]);
!     gcc_assert (IN_RANGE(lane, 0, 7));
!     if (lane < 4)
!     {
! 	emit_insn (gen_neon_vfma<bt>_lanev8bf (operands[0], operands[1], operands[2], operands[3], operands[4]));
!     }
!     else
!       {
! 	rtx op_highpart = gen_reg_rtx (V4BFmode);
! 	emit_insn (gen_neon_vget_highv8bf (op_highpart, operands[3]));
! 	operands[4] = GEN_INT (lane - 4);
! 	emit_insn (gen_neon_vfma<bt>_lanev8bf (operands[0], operands[1], operands[2], op_highpart, operands[4]));
!       }
!     DONE;
!   }
!   [(set_attr "type" "neon_fp_mla_s_scalar_q")]
! )
diff -Nrcpad gcc-9.3.0/gcc/config/arm/netbsd-eabi.h gcc-10.1.0/gcc/config/arm/netbsd-eabi.h
*** gcc-9.3.0/gcc/config/arm/netbsd-eabi.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/arm/netbsd-eabi.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,105 ----
+ /* Definitions of target machine for GNU compiler, NetBSD/arm ELF version.
+    Copyright (C) 2002-2020 Free Software Foundation, Inc.
+    Contributed by Wasabi Systems, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published
+    by the Free Software Foundation; either version 3, or (at your
+    option) any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ /* Run-time Target Specification.  */
+ #undef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS { "mabi=aapcs-linux" }
+ 
+ #define TARGET_LINKER_EABI_SUFFIX_SOFT \
+   "%{!mabi=apcs-gnu:%{!mabi=atpcs:%{mfloat-abi=hard:_eabihf;:_eabi}}}"
+ #define TARGET_LINKER_EABI_SUFFIX_HARD \
+   "%{!mabi=apcs-gnu:%{!mabi=atpcs:%{mfloat-abi=soft:_eabi;:_eabihf}}}"
+ 
+ #define TARGET_LINKER_EABI_SUFFIX			\
+   (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFT	\
+    ? TARGET_LINKER_EABI_SUFFIX_SOFT			\
+    : TARGET_LINKER_EABI_SUFFIX_HARD)
+ 
+ #define TARGET_LINKER_BIG_EMULATION "armelfb_nbsd%(linker_eabi_suffix)"
+ #define TARGET_LINKER_LITTLE_EMULATION "armelf_nbsd%(linker_eabi_suffix)"
+ 
+ /* TARGET_BIG_ENDIAN_DEFAULT is set in
+    config.gcc for big endian configurations.  */
+ #undef  TARGET_LINKER_EMULATION
+ #if TARGET_BIG_ENDIAN_DEFAULT
+ #define TARGET_LINKER_EMULATION TARGET_LINKER_BIG_EMULATION
+ #else
+ #define TARGET_LINKER_EMULATION TARGET_LINKER_LITTLE_EMULATION
+ #endif
+ 
+ #undef ARM_DEFAULT_ABI
+ #define ARM_DEFAULT_ABI ARM_ABI_AAPCS_LINUX
+ 
+ #undef ARM_UNWIND_INFO
+ #define ARM_UNWIND_INFO 0
+ #undef DWARF2_UNWIND_INFO
+ #define DWARF2_UNWIND_INFO 1
+ 
+ #undef TARGET_OS_CPP_BUILTINS
+ #define TARGET_OS_CPP_BUILTINS()		\
+   do						\
+     {						\
+       if (TARGET_AAPCS_BASED)			\
+ 	TARGET_BPABI_CPP_BUILTINS();		\
+       NETBSD_OS_CPP_BUILTINS_ELF();		\
+       if (DWARF2_UNWIND_INFO)			\
+ 	builtin_define ("__ARM_DWARF_EH__");	\
+     }						\
+   while (0)
+ 
+ #undef SUBTARGET_CPP_SPEC
+ #define SUBTARGET_CPP_SPEC NETBSD_CPP_SPEC
+ 
+ /*
+  * Override AAPCS types to remain compatible the existing NetBSD types.
+  */
+ #undef WCHAR_TYPE
+ #define WCHAR_TYPE "int"
+ 
+ #undef SIZE_TYPE
+ #define SIZE_TYPE "long unsigned int"
+ 
+ #undef PTRDIFF_TYPE
+ #define PTRDIFF_TYPE "long int"
+ 
+ #undef SUBTARGET_EXTRA_ASM_SPEC
+ #define SUBTARGET_EXTRA_ASM_SPEC		\
+   "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu} "	\
+   "%{fpic|fpie:-k} "				\
+   "%{fPIC|fPIE:-k}"
+ 
+ #undef SUBTARGET_EXTRA_SPECS
+ #define SUBTARGET_EXTRA_SPECS						\
+   { "subtarget_extra_asm_spec",	SUBTARGET_EXTRA_ASM_SPEC },		\
+   { "linker_eabi_suffix",	TARGET_LINKER_EABI_SUFFIX },		\
+   { "linker_emulation",		TARGET_LINKER_EMULATION },		\
+   { "linker_big_emulation",	TARGET_LINKER_BIG_EMULATION },		\
+   { "linker_little_emulation",	TARGET_LINKER_LITTLE_EMULATION },	\
+   { "target_fix_v4bx_spec",	TARGET_FIX_V4BX_SPEC },			\
+   NETBSD_SUBTARGET_EXTRA_SPECS
+ 
+ #define NETBSD_ENTRY_POINT "__start"
+ 
+ #undef LINK_SPEC
+ #define LINK_SPEC						\
+   "-X %{mbig-endian:-EB -m %(linker_big_emulation)} "		\
+   "%{mlittle-endian:-EL -m %(linker_liitle_emulation)} "	\
+   "%{!mbig-endian:%{!mlittle-endian:-m %(linker_emulation)}} "	\
+   "%(target_fix_v4bx_spec) %(netbsd_link_spec)"
diff -Nrcpad gcc-9.3.0/gcc/config/arm/netbsd-elf.h gcc-10.1.0/gcc/config/arm/netbsd-elf.h
*** gcc-9.3.0/gcc/config/arm/netbsd-elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/netbsd-elf.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, NetBSD/arm ELF version.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
     Contributed by Wasabi Systems, Inc.
  
     This file is part of GCC.
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, NetBSD/arm ELF version.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
     Contributed by Wasabi Systems, Inc.
  
     This file is part of GCC.
***************
*** 43,48 ****
--- 43,49 ----
  #undef ARM_DEFAULT_ABI
  #define ARM_DEFAULT_ABI ARM_ABI_ATPCS
  
+ #undef TARGET_OS_CPP_BUILTINS
  #define TARGET_OS_CPP_BUILTINS()	\
    do					\
      {					\
***************
*** 55,61 ****
  
  #undef SUBTARGET_EXTRA_ASM_SPEC
  #define SUBTARGET_EXTRA_ASM_SPEC	\
!   "-matpcs %{" FPIE_OR_FPIC_SPEC ":-k}"
  
  /* Default to full VFP if -mfloat-abi=hard is specified.  */
  #undef SUBTARGET_ASM_FLOAT_SPEC
--- 56,62 ----
  
  #undef SUBTARGET_EXTRA_ASM_SPEC
  #define SUBTARGET_EXTRA_ASM_SPEC	\
!   "%{" FPIE_OR_FPIC_SPEC ":-k}"
  
  /* Default to full VFP if -mfloat-abi=hard is specified.  */
  #undef SUBTARGET_ASM_FLOAT_SPEC
***************
*** 87,99 ****
  /* We don't have any limit on the length as out debugger is GDB.  */
  #undef DBX_CONTIN_LENGTH
  
! /* NetBSD does its profiling differently to the Acorn compiler. We      
     don't need a word following the mcount call; and to skip it
!    requires either an assembly stub or use of fomit-frame-pointer when  
     compiling the profiling functions.  Since we break Acorn CC
     compatibility below a little more won't hurt.  */
!    
! #undef ARM_FUNCTION_PROFILER                                  
  #define ARM_FUNCTION_PROFILER(STREAM,LABELNO)		\
  {							\
    asm_fprintf (STREAM, "\tmov\t%Rip, %Rlr\n");		\
--- 88,100 ----
  /* We don't have any limit on the length as out debugger is GDB.  */
  #undef DBX_CONTIN_LENGTH
  
! /* NetBSD does its profiling differently to the Acorn compiler. We
     don't need a word following the mcount call; and to skip it
!    requires either an assembly stub or use of fomit-frame-pointer when
     compiling the profiling functions.  Since we break Acorn CC
     compatibility below a little more won't hurt.  */
! 
! #undef ARM_FUNCTION_PROFILER
  #define ARM_FUNCTION_PROFILER(STREAM,LABELNO)		\
  {							\
    asm_fprintf (STREAM, "\tmov\t%Rip, %Rlr\n");		\
***************
*** 110,131 ****
     boundary.  However this causes problems with bugged NetBSD kernel
     code (possibly userland code as well - I have not checked every
     binary).  The nature of this bugged code is to rely on sizeof()
!    returning the correct size of various structures rounded to the  
     nearest byte (SCSI and ether code are two examples, the vm system
     is another).  This code breaks when the structure alignment is 32
!    as sizeof() will report a word=rounded size.  By changing the        
     structure alignment to 8. GCC will conform to what is expected by
     NetBSD.
!    
     This has several side effects that should be considered.
     1. Structures will only be aligned to the size of the largest member.
        i.e. structures containing only bytes will be byte aligned.
!            structures containing shorts will be half word aligned.          
!            structures containing ints will be word aligned.                 
!   
        This means structures should be padded to a word boundary if
        alignment of 32 is required for byte structures etc.
!        
     2. A potential performance penalty may exist if strings are no longer
        word aligned.  GCC will not be able to use word load/stores to copy
        short strings.
--- 111,132 ----
     boundary.  However this causes problems with bugged NetBSD kernel
     code (possibly userland code as well - I have not checked every
     binary).  The nature of this bugged code is to rely on sizeof()
!    returning the correct size of various structures rounded to the
     nearest byte (SCSI and ether code are two examples, the vm system
     is another).  This code breaks when the structure alignment is 32
!    as sizeof() will report a word=rounded size.  By changing the
     structure alignment to 8. GCC will conform to what is expected by
     NetBSD.
! 
     This has several side effects that should be considered.
     1. Structures will only be aligned to the size of the largest member.
        i.e. structures containing only bytes will be byte aligned.
! 	   structures containing shorts will be half word aligned.
! 	   structures containing ints will be word aligned.
! 
        This means structures should be padded to a word boundary if
        alignment of 32 is required for byte structures etc.
! 
     2. A potential performance penalty may exist if strings are no longer
        word aligned.  GCC will not be able to use word load/stores to copy
        short strings.
***************
*** 137,142 ****
--- 138,145 ----
  #undef DEFAULT_STRUCTURE_SIZE_BOUNDARY
  #define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8
  
+ #define SYSARCH_ARM_SYNC_ICACHE	0
+ 
  /* Clear the instruction cache from `BEG' to `END'.  This makes a
     call to the ARM_SYNC_ICACHE architecture specific syscall.  */
  #define CLEAR_INSN_CACHE(BEG, END)					\
*************** do									\
*** 150,155 ****
        } s;								\
      s.addr = (unsigned int)(BEG);					\
      s.len = (END) - (BEG);						\
!     (void) sysarch (0, &s);						\
    }									\
  while (0)
--- 153,158 ----
        } s;								\
      s.addr = (unsigned int)(BEG);					\
      s.len = (END) - (BEG);						\
!     (void) sysarch (SYSARCH_ARM_SYNC_ICACHE, &s);			\
    }									\
  while (0)
diff -Nrcpad gcc-9.3.0/gcc/config/arm/parsecpu.awk gcc-10.1.0/gcc/config/arm/parsecpu.awk
*** gcc-9.3.0/gcc/config/arm/parsecpu.awk	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/parsecpu.awk	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  # Manipulate the CPU, FPU and architecture descriptions for ARM.
! # Copyright (C) 2017-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,5 ----
  # Manipulate the CPU, FPU and architecture descriptions for ARM.
! # Copyright (C) 2017-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
*************** function boilerplate (style) {
*** 62,68 ****
      print cc "Generated automatically by parsecpu.awk from arm-cpus.in."
      print cc "Do not edit."
      print ""
!     print cc "Copyright (C) 2011-2019 Free Software Foundation, Inc."
      print ""
      print cc "This file is part of GCC."
      print ""
--- 62,68 ----
      print cc "Generated automatically by parsecpu.awk from arm-cpus.in."
      print cc "Do not edit."
      print ""
!     print cc "Copyright (C) 2011-2020 Free Software Foundation, Inc."
      print ""
      print cc "This file is part of GCC."
      print ""
diff -Nrcpad gcc-9.3.0/gcc/config/arm/predicates.md gcc-10.1.0/gcc/config/arm/predicates.md
*** gcc-9.3.0/gcc/config/arm/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicate definitions for ARM and Thumb
! ;; Copyright (C) 2004-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Predicate definitions for ARM and Thumb
! ;; Copyright (C) 2004-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  
  ;; This file is part of GCC.
***************
*** 31,36 ****
--- 31,72 ----
  	      || REGNO_REG_CLASS (REGNO (op)) != NO_REGS));
  })
  
+ ;; True for immediates in the range of 1 to 16 for MVE.
+ (define_predicate "mve_imm_16"
+   (match_test "satisfies_constraint_Rd (op)"))
+ 
+ ;; True for immediates in the range of 0 to 7 for MVE.
+ (define_predicate "mve_imm_7"
+   (match_test "satisfies_constraint_Ra (op)"))
+ 
+ ;; True for immediates in the range of 1 to 8 for MVE.
+ (define_predicate "mve_imm_8"
+   (match_test "satisfies_constraint_Rb (op)"))
+ 
+ ;; True for immediates in the range of 0 to 15 for MVE.
+ (define_predicate "mve_imm_15"
+   (match_test "satisfies_constraint_Rc (op)"))
+ 
+ ;; True for immediates in the range of 0 to 31 for MVE.
+ (define_predicate "mve_imm_31"
+   (match_test "satisfies_constraint_Re (op)"))
+ 
+ ;; True for immediates in the range of 1 to 32 for MVE.
+ (define_predicate "mve_imm_32"
+   (match_test "satisfies_constraint_Rf (op)"))
+ 
+ ;; True if the immediate is one among 1, 2, 4 or 8 for MVE.
+ (define_predicate "mve_imm_selective_upto_8"
+   (match_test "satisfies_constraint_Rg (op)"))
+ 
+ ;; True if the immediate is the range +/- 1016 and multiple of 8 for MVE.
+ (define_constraint "Ri"
+   "@internal In Thumb-2 state a constant is multiple of 8 and in range
+    of -/+ 1016 for MVE"
+   (and (match_code "const_int")
+        (match_test "TARGET_HAVE_MVE && (-1016 <= ival) && (ival <= 1016)
+ 		    && ((ival % 8) == 0)")))
+ 
  ; Predicate for stack protector guard's address in
  ; stack_protect_combined_set_insn and stack_protect_combined_test_insn patterns
  (define_predicate "guard_addr_operand"
***************
*** 48,53 ****
--- 84,97 ----
    return guard_addr_operand (XEXP (op, 0), mode);
  })
  
+ (define_predicate "vpr_register_operand"
+   (match_code "reg")
+ {
+   return REG_P (op)
+ 	  && (REGNO (op) >= FIRST_PSEUDO_REGISTER
+ 	      || IS_VPR_REGNUM (REGNO (op)));
+ })
+ 
  (define_predicate "imm_for_neon_inv_logic_operand"
    (match_code "const_vector")
  {
***************
*** 182,187 ****
--- 226,272 ----
    (and (match_operand 0 "const_int_operand")
         (match_test "satisfies_constraint_M (op)")))
  
+ (define_predicate "const_int_coproc_operand"
+   (and (match_operand 0 "const_int_operand")
+        (match_test "IN_RANGE (UINTVAL (op), 0, ARM_CDE_CONST_COPROC)")
+        (match_test "arm_arch_cde_coproc_bits[UINTVAL (op)] & arm_arch_cde_coproc")))
+ 
+ (define_predicate "const_int_ccde1_operand"
+   (and (match_operand 0 "const_int_operand")
+        (match_test "IN_RANGE (UINTVAL (op), 0, ARM_CCDE_CONST_1)")))
+ 
+ (define_predicate "const_int_ccde2_operand"
+   (and (match_operand 0 "const_int_operand")
+        (match_test "IN_RANGE (UINTVAL (op), 0, ARM_CCDE_CONST_2)")))
+ 
+ (define_predicate "const_int_ccde3_operand"
+   (and (match_operand 0 "const_int_operand")
+        (match_test "IN_RANGE (UINTVAL (op), 0, ARM_CCDE_CONST_3)")))
+ 
+ (define_predicate "const_int_vcde1_operand"
+   (and (match_operand 0 "const_int_operand")
+        (match_test "IN_RANGE (UINTVAL (op), 0, ARM_VCDE_CONST_1)")))
+ 
+ (define_predicate "const_int_vcde2_operand"
+   (and (match_operand 0 "const_int_operand")
+        (match_test "IN_RANGE (UINTVAL (op), 0, ARM_VCDE_CONST_2)")))
+ 
+ (define_predicate "const_int_vcde3_operand"
+   (and (match_operand 0 "const_int_operand")
+        (match_test "IN_RANGE (UINTVAL (op), 0, ARM_VCDE_CONST_3)")))
+ 
+ (define_predicate "const_int_mve_cde1_operand"
+   (and (match_operand 0 "const_int_operand")
+        (match_test "IN_RANGE (UINTVAL (op), 0, ARM_MVE_CDE_CONST_1)")))
+ 
+ (define_predicate "const_int_mve_cde2_operand"
+   (and (match_operand 0 "const_int_operand")
+        (match_test "IN_RANGE (UINTVAL (op), 0, ARM_MVE_CDE_CONST_2)")))
+ 
+ (define_predicate "const_int_mve_cde3_operand"
+   (and (match_operand 0 "const_int_operand")
+        (match_test "IN_RANGE (UINTVAL (op), 0, ARM_MVE_CDE_CONST_3)")))
+ 
  ;; This doesn't have to do much because the constant is already checked
  ;; in the shift_operator predicate.
  (define_predicate "shift_amount_operand"
***************
*** 193,198 ****
--- 278,291 ----
    (and (match_code "const_int")
         (match_test "IN_RANGE (UINTVAL (op), 1, GET_MODE_BITSIZE (mode))")))
  
+ (define_predicate "ssat16_imm"
+   (and (match_code "const_int")
+        (match_test "IN_RANGE (INTVAL (op), 1, 16)")))
+ 
+ (define_predicate "usat16_imm"
+   (and (match_code "const_int")
+        (match_test "IN_RANGE (INTVAL (op), 0, 15)")))
+ 
  (define_predicate "ldrd_strd_offset_operand"
    (and (match_operand 0 "const_int_operand")
         (match_test "TARGET_LDRD && offset_ok_for_ldrd_strd (INTVAL (op))")))
***************
*** 201,227 ****
    (ior (match_operand 0 "arm_rhs_operand")
         (match_operand 0 "arm_neg_immediate_operand")))
  
! (define_predicate "arm_anddi_operand_neon"
    (ior (match_operand 0 "s_register_operand")
         (and (match_code "const_int")
! 	    (match_test "const_ok_for_dimode_op (INTVAL (op), AND)"))
!        (match_operand 0 "neon_inv_logic_op2")))
  
! (define_predicate "arm_iordi_operand_neon"
    (ior (match_operand 0 "s_register_operand")
         (and (match_code "const_int")
! 	    (match_test "const_ok_for_dimode_op (INTVAL (op), IOR)"))
!        (match_operand 0 "neon_logic_op2")))
  
! (define_predicate "arm_xordi_operand"
    (ior (match_operand 0 "s_register_operand")
         (and (match_code "const_int")
! 	    (match_test "const_ok_for_dimode_op (INTVAL (op), XOR)"))))
  
! (define_predicate "arm_adddi_operand"
    (ior (match_operand 0 "s_register_operand")
         (and (match_code "const_int")
! 	    (match_test "const_ok_for_dimode_op (INTVAL (op), PLUS)"))))
  
  (define_predicate "arm_addimm_operand"
    (ior (match_operand 0 "arm_immediate_operand")
--- 294,318 ----
    (ior (match_operand 0 "arm_rhs_operand")
         (match_operand 0 "arm_neg_immediate_operand")))
  
! (define_predicate "arm_adddi_operand"
    (ior (match_operand 0 "s_register_operand")
         (and (match_code "const_int")
! 	    (match_test "const_ok_for_dimode_op (INTVAL (op), PLUS)"))))
  
! (define_predicate "arm_anddi_operand"
    (ior (match_operand 0 "s_register_operand")
         (and (match_code "const_int")
! 	    (match_test "const_ok_for_dimode_op (INTVAL (op), AND)"))))
  
! (define_predicate "arm_iordi_operand"
    (ior (match_operand 0 "s_register_operand")
         (and (match_code "const_int")
! 	    (match_test "const_ok_for_dimode_op (INTVAL (op), IOR)"))))
  
! (define_predicate "arm_xordi_operand"
    (ior (match_operand 0 "s_register_operand")
         (and (match_code "const_int")
! 	    (match_test "const_ok_for_dimode_op (INTVAL (op), XOR)"))))
  
  (define_predicate "arm_addimm_operand"
    (ior (match_operand 0 "arm_immediate_operand")
***************
*** 231,236 ****
--- 322,333 ----
    (ior (match_operand 0 "arm_rhs_operand")
         (match_operand 0 "arm_not_immediate_operand")))
  
+ ;; A constant that can be used with ADC(SBC) or SBC(ADC) when bit-wise
+ ;; inverted.  Similar to arm_not_operand, but excludes registers.
+ (define_predicate "arm_adcimm_operand"
+   (ior (match_operand 0 "arm_immediate_operand")
+        (match_operand 0 "arm_not_immediate_operand")))
+ 
  (define_predicate "arm_di_operand"
    (ior (match_operand 0 "s_register_operand")
         (match_operand 0 "arm_immediate_di_operand")))
***************
*** 324,329 ****
--- 421,435 ----
  		              && (UINTVAL (XEXP (op, 1)) < 32)")))
         (match_test "mode == GET_MODE (op)")))
  
+ ;; True for Armv8.1-M Mainline long shift instructions.
+ (define_predicate "long_shift_imm"
+   (match_test "satisfies_constraint_Pg (op)"))
+ 
+ (define_predicate "arm_reg_or_long_shift_imm"
+   (ior (match_test "TARGET_THUMB2
+ 		    && arm_general_register_operand (op, GET_MODE (op))")
+        (match_test "satisfies_constraint_Pg (op)")))
+ 
  ;; True for MULT, to identify which variant of shift_operator is in use.
  (define_special_predicate "mult_operator"
    (match_code "mult"))
***************
*** 358,363 ****
--- 464,490 ----
  (define_special_predicate "lt_ge_comparison_operator"
    (match_code "lt,ge"))
  
+ (define_special_predicate "arm_carry_operation"
+   (match_code "geu,ltu")
+   {
+     if (XEXP (op, 1) != const0_rtx)
+       return false;
+ 
+     rtx op0 = XEXP (op, 0);
+ 
+     if (!REG_P (op0) || REGNO (op0) != CC_REGNUM)
+       return false;
+ 
+     machine_mode ccmode = GET_MODE (op0);
+     if (ccmode == CC_Cmode)
+       return GET_CODE (op) == LTU;
+     else if (ccmode == CCmode || ccmode == CC_RSBmode || ccmode == CC_ADCmode)
+       return GET_CODE (op) == GEU;
+ 
+     return false;
+   }
+ )
+ 
  ;; Match a "borrow" operation for use with SBC.  The precise code will
  ;; depend on the form of the comparison.  This is generally the inverse of
  ;; a carry operation, since the logic of SBC uses "not borrow" in it's
***************
*** 373,379 ****
      machine_mode ccmode = GET_MODE (op0);
      if (ccmode == CC_Cmode)
        return GET_CODE (op) == GEU;
!     else if (ccmode == CCmode)
        return GET_CODE (op) == LTU;
      return false;
    }
--- 500,506 ----
      machine_mode ccmode = GET_MODE (op0);
      if (ccmode == CC_Cmode)
        return GET_CODE (op) == GEU;
!     else if (ccmode == CCmode || ccmode == CC_RSBmode || ccmode == CC_ADCmode)
        return GET_CODE (op) == LTU;
      return false;
    }
***************
*** 397,403 ****
  		     (match_operand 0 "arm_vsel_comparison_operator"))
  		(match_operand 0 "expandable_comparison_operator")))
  
! (define_special_predicate "noov_comparison_operator"
    (match_code "lt,ge,eq,ne"))
  
  (define_special_predicate "minmax_operator"
--- 524,530 ----
  		     (match_operand 0 "arm_vsel_comparison_operator"))
  		(match_operand 0 "expandable_comparison_operator")))
  
! (define_special_predicate "nz_comparison_operator"
    (match_code "lt,ge,eq,ne"))
  
  (define_special_predicate "minmax_operator"
***************
*** 512,517 ****
--- 639,656 ----
  	    (match_test "satisfies_constraint_Dy (op)")
  	    (match_test "satisfies_constraint_G (op)"))))
  
+ (define_special_predicate "clear_multiple_operation"
+   (match_code "parallel")
+ {
+  return clear_operation_p (op, /*vfp*/false);
+ })
+ 
+ (define_special_predicate "clear_vfp_multiple_operation"
+   (match_code "parallel")
+ {
+  return clear_operation_p (op, /*vfp*/true);
+ })
+ 
  (define_special_predicate "load_multiple_operation"
    (match_code "parallel")
  {
***************
*** 634,640 ****
  (define_predicate "imm_for_neon_mov_operand"
    (match_code "const_vector,const_int")
  {
!   return neon_immediate_valid_for_move (op, mode, NULL, NULL);
  })
  
  (define_predicate "imm_for_neon_lshift_operand"
--- 773,779 ----
  (define_predicate "imm_for_neon_mov_operand"
    (match_code "const_vector,const_int")
  {
!   return simd_immediate_valid_for_move (op, mode, NULL, NULL);
  })
  
  (define_predicate "imm_for_neon_lshift_operand"
***************
*** 714,716 ****
--- 853,859 ----
    (ior (and (match_code "symbol_ref")
  	    (match_test "!arm_is_long_call_p (SYMBOL_REF_DECL (op))"))
         (match_operand 0 "s_register_operand")))
+ 
+ (define_special_predicate "aligned_operand"
+   (ior (not (match_code "mem"))
+        (match_test "MEM_ALIGN (op) >= GET_MODE_ALIGNMENT (mode)")))
diff -Nrcpad gcc-9.3.0/gcc/config/arm/rtems.h gcc-10.1.0/gcc/config/arm/rtems.h
*** gcc-9.3.0/gcc/config/arm/rtems.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/rtems.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for RTEMS based ARM systems using EABI.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for RTEMS based ARM systems using EABI.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/arm/semi.h gcc-10.1.0/gcc/config/arm/semi.h
*** gcc-9.3.0/gcc/config/arm/semi.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/semi.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler.  ARM on semi-hosted platform
!    Copyright (C) 1994-2019 Free Software Foundation, Inc.
     Contributed by Richard Earnshaw (richard.earnshaw@arm.com)
  
     This file is part of GCC.
--- 1,5 ----
  /* Definitions of target machine for GNU compiler.  ARM on semi-hosted platform
!    Copyright (C) 1994-2020 Free Software Foundation, Inc.
     Contributed by Richard Earnshaw (richard.earnshaw@arm.com)
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/symbian.h gcc-10.1.0/gcc/config/arm/symbian.h
*** gcc-9.3.0/gcc/config/arm/symbian.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/symbian.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Configuration file for Symbian OS on ARM processors.
!    Copyright (C) 2004-2019 Free Software Foundation, Inc.
     Contributed by CodeSourcery, LLC   
  
     This file is part of GCC.
--- 1,5 ----
  /* Configuration file for Symbian OS on ARM processors.
!    Copyright (C) 2004-2020 Free Software Foundation, Inc.
     Contributed by CodeSourcery, LLC   
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/sync.md gcc-10.1.0/gcc/config/arm/sync.md
*** gcc-9.3.0/gcc/config/arm/sync.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/sync.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description for ARM processor synchronization primitives.
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Written by Marcus Shawcroft (marcus.shawcroft@arm.com)
  ;; 64bit Atomics by Dave Gilbert (david.gilbert@linaro.org)
  ;;
--- 1,5 ----
  ;; Machine description for ARM processor synchronization primitives.
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Written by Marcus Shawcroft (marcus.shawcroft@arm.com)
  ;; 64bit Atomics by Dave Gilbert (david.gilbert@linaro.org)
  ;;
***************
*** 170,180 ****
  })
  
  (define_expand "atomic_compare_and_swap<mode>"
!   [(match_operand:SI 0 "s_register_operand" "")		;; bool out
!    (match_operand:QHSD 1 "s_register_operand" "")	;; val out
!    (match_operand:QHSD 2 "mem_noofs_operand" "")	;; memory
!    (match_operand:QHSD 3 "general_operand" "")		;; expected
!    (match_operand:QHSD 4 "s_register_operand" "")	;; desired
     (match_operand:SI 5 "const_int_operand")		;; is_weak
     (match_operand:SI 6 "const_int_operand")		;; mod_s
     (match_operand:SI 7 "const_int_operand")]		;; mod_f
--- 170,180 ----
  })
  
  (define_expand "atomic_compare_and_swap<mode>"
!   [(match_operand:SI 0 "s_register_operand")		;; bool out
!    (match_operand:QHSD 1 "s_register_operand")		;; val out
!    (match_operand:QHSD 2 "mem_noofs_operand")		;; memory
!    (match_operand:QHSD 3 "general_operand")		;; expected
!    (match_operand:QHSD 4 "s_register_operand")		;; desired
     (match_operand:SI 5 "const_int_operand")		;; is_weak
     (match_operand:SI 6 "const_int_operand")		;; mod_s
     (match_operand:SI 7 "const_int_operand")]		;; mod_f
***************
*** 201,207 ****
  	   (match_operand:SI 7 "const_int_operand")]		;; mod_f
  	  VUNSPEC_ATOMIC_CAS))
     (clobber (match_scratch:SI 8 "=&r,X,X,X"))]
!   "<sync_predtab>"
    "#"
    "&& reload_completed"
    [(const_int 0)]
--- 201,207 ----
  	   (match_operand:SI 7 "const_int_operand")]		;; mod_f
  	  VUNSPEC_ATOMIC_CAS))
     (clobber (match_scratch:SI 8 "=&r,X,X,X"))]
!   "<NARROW:sync_predtab>"
    "#"
    "&& reload_completed"
    [(const_int 0)]
***************
*** 225,238 ****
  	(match_operand:SIDI 2 "mem_noofs_operand" "+Ua,Ua,Ua,Ua"))	;; memory
     (set (match_dup 2)
  	(unspec_volatile:SIDI
! 	  [(match_operand:SIDI 3 "<cas_cmp_operand>" "<cas_cmp_str>,lIL*h,J,*r") ;; expect
  	   (match_operand:SIDI 4 "s_register_operand" "r,r,r,r")	;; desired
  	   (match_operand:SI 5 "const_int_operand")		;; is_weak
  	   (match_operand:SI 6 "const_int_operand")		;; mod_s
  	   (match_operand:SI 7 "const_int_operand")]		;; mod_f
  	  VUNSPEC_ATOMIC_CAS))
     (clobber (match_scratch:SI 8 "=&r,X,X,X"))]
!   "<sync_predtab>"
    "#"
    "&& reload_completed"
    [(const_int 0)]
--- 225,238 ----
  	(match_operand:SIDI 2 "mem_noofs_operand" "+Ua,Ua,Ua,Ua"))	;; memory
     (set (match_dup 2)
  	(unspec_volatile:SIDI
! 	  [(match_operand:SIDI 3 "<SIDI:cas_cmp_operand>" "<SIDI:cas_cmp_str>,lIL*h,J,*r") ;; expect
  	   (match_operand:SIDI 4 "s_register_operand" "r,r,r,r")	;; desired
  	   (match_operand:SI 5 "const_int_operand")		;; is_weak
  	   (match_operand:SI 6 "const_int_operand")		;; mod_s
  	   (match_operand:SI 7 "const_int_operand")]		;; mod_f
  	  VUNSPEC_ATOMIC_CAS))
     (clobber (match_scratch:SI 8 "=&r,X,X,X"))]
!   "<SIDI:sync_predtab>"
    "#"
    "&& reload_completed"
    [(const_int 0)]
diff -Nrcpad gcc-9.3.0/gcc/config/arm/t-aprofile gcc-10.1.0/gcc/config/arm/t-aprofile
*** gcc-9.3.0/gcc/config/arm/t-aprofile	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/t-aprofile	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2012-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2012-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
*************** MULTILIB_MATCHES	+= march?armv8-a=march?
*** 122,127 ****
--- 122,134 ----
  MULTILIB_MATCHES	+= $(foreach ARCH, $(v8_5_a_simd_variants), \
  			     march?armv8-a+simd=march?armv8.5-a$(ARCH))
  
+ # Baseline v8.6-a: map down to baseline v8-a
+ MULTILIB_MATCHES	+= march?armv8-a=march?armv8.6-a
+ 
+ # Map all v8.6-a SIMD variants to v8-a+simd
+ MULTILIB_MATCHES	+= $(foreach ARCH, $(v8_6_a_simd_variants), \
+ 			     march?armv8-a+simd=march?armv8.6-a$(ARCH))
+ 
  # Use Thumb libraries for everything.
  
  MULTILIB_REUSE		+= mthumb/march.armv7-a/mfloat-abi.soft=marm/march.armv7-a/mfloat-abi.soft
diff -Nrcpad gcc-9.3.0/gcc/config/arm/t-arm gcc-10.1.0/gcc/config/arm/t-arm
*** gcc-9.3.0/gcc/config/arm/t-arm	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/t-arm	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  # Rules common to all arm targets
  #
! # Copyright (C) 2004-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,6 ----
  # Rules common to all arm targets
  #
! # Copyright (C) 2004-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
*************** MD_INCLUDES=	$(srcdir)/config/arm/arm102
*** 55,60 ****
--- 55,61 ----
  		$(srcdir)/config/arm/ldmstm.md \
  		$(srcdir)/config/arm/ldrdstrd.md \
  		$(srcdir)/config/arm/marvell-f-iwmmxt.md \
+ 		$(srcdir)/config/arm/mve.md \
  		$(srcdir)/config/arm/neon.md \
  		$(srcdir)/config/arm/predicates.md \
  		$(srcdir)/config/arm/sync.md \
*************** $(srcdir)/config/arm/arm-tune.md: $(srcd
*** 70,82 ****
  	$(srcdir)/config/arm/arm-cpus.in
  	$(AWK) -f $(srcdir)/config/arm/parsecpu.awk -v cmd=md \
  		$(srcdir)/config/arm/arm-cpus.in > arm-tune.new
! 	mv arm-tune.new $(srcdir)/config/arm/arm-tune.md
  
  $(srcdir)/config/arm/arm-tables.opt: $(srcdir)/config/arm/parsecpu.awk \
    $(srcdir)/config/arm/arm-cpus.in
  	$(AWK) -f $(srcdir)/config/arm/parsecpu.awk -v cmd=opt \
  		$(srcdir)/config/arm/arm-cpus.in > arm-tables.new
! 	mv arm-tables.new $(srcdir)/config/arm/arm-tables.opt
  
  arm-cpu.h: s-arm-cpu ; @true
  s-arm-cpu: $(srcdir)/config/arm/parsecpu.awk \
--- 71,85 ----
  	$(srcdir)/config/arm/arm-cpus.in
  	$(AWK) -f $(srcdir)/config/arm/parsecpu.awk -v cmd=md \
  		$(srcdir)/config/arm/arm-cpus.in > arm-tune.new
! 	$(srcdir)/../move-if-change arm-tune.new \
! 				    $(srcdir)/config/arm/arm-tune.md
  
  $(srcdir)/config/arm/arm-tables.opt: $(srcdir)/config/arm/parsecpu.awk \
    $(srcdir)/config/arm/arm-cpus.in
  	$(AWK) -f $(srcdir)/config/arm/parsecpu.awk -v cmd=opt \
  		$(srcdir)/config/arm/arm-cpus.in > arm-tables.new
! 	$(srcdir)/../move-if-change arm-tables.new \
! 				    $(srcdir)/config/arm/arm-tables.opt
  
  arm-cpu.h: s-arm-cpu ; @true
  s-arm-cpu: $(srcdir)/config/arm/parsecpu.awk \
*************** arm.o: $(srcdir)/config/arm/arm.c $(CONF
*** 134,148 ****
    arm-cpu-data.h \
    $(srcdir)/config/arm/arm-protos.h \
    $(srcdir)/config/arm/arm_neon_builtins.def \
!   $(srcdir)/config/arm/arm_vfp_builtins.def
  
  arm-builtins.o: $(srcdir)/config/arm/arm-builtins.c $(CONFIG_H) \
    $(SYSTEM_H) coretypes.h $(TM_H) \
    $(RTL_H) $(TREE_H) expr.h $(TM_P_H) $(RECOG_H) langhooks.h \
    $(DIAGNOSTIC_CORE_H) $(OPTABS_H) \
    $(srcdir)/config/arm/arm-protos.h \
    $(srcdir)/config/arm/arm_neon_builtins.def \
    $(srcdir)/config/arm/arm_vfp_builtins.def \
    $(srcdir)/config/arm/arm-simd-builtin-types.def
  	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
  		$(srcdir)/config/arm/arm-builtins.c
--- 137,154 ----
    arm-cpu-data.h \
    $(srcdir)/config/arm/arm-protos.h \
    $(srcdir)/config/arm/arm_neon_builtins.def \
!   $(srcdir)/config/arm/arm_vfp_builtins.def \
!   $(srcdir)/config/arm/arm_mve_builtins.def
  
  arm-builtins.o: $(srcdir)/config/arm/arm-builtins.c $(CONFIG_H) \
    $(SYSTEM_H) coretypes.h $(TM_H) \
    $(RTL_H) $(TREE_H) expr.h $(TM_P_H) $(RECOG_H) langhooks.h \
    $(DIAGNOSTIC_CORE_H) $(OPTABS_H) \
    $(srcdir)/config/arm/arm-protos.h \
+   $(srcdir)/config/arm/arm_acle_builtins.def \
    $(srcdir)/config/arm/arm_neon_builtins.def \
    $(srcdir)/config/arm/arm_vfp_builtins.def \
+   $(srcdir)/config/arm/arm_mve_builtins.def \
    $(srcdir)/config/arm/arm-simd-builtin-types.def
  	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
  		$(srcdir)/config/arm/arm-builtins.c
diff -Nrcpad gcc-9.3.0/gcc/config/arm/t-arm-elf gcc-10.1.0/gcc/config/arm/t-arm-elf
*** gcc-9.3.0/gcc/config/arm/t-arm-elf	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/t-arm-elf	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 1998-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 1998-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
*************** all_early_arch	:= armv5tej armv6 armv6j
*** 47,53 ****
  all_v7_a_r	:= armv7-a armv7ve armv7-r
  
  all_v8_archs	:= armv8-a armv8-a+crc armv8.1-a armv8.2-a armv8.3-a armv8.4-a \
! 		   armv8.5-a
  
  # No floating point variants, require thumb1 softfp
  all_nofp_t	:= armv6-m armv6s-m armv8-m.base
--- 47,53 ----
  all_v7_a_r	:= armv7-a armv7ve armv7-r
  
  all_v8_archs	:= armv8-a armv8-a+crc armv8.1-a armv8.2-a armv8.3-a armv8.4-a \
! 		   armv8.5-a armv8.6-a
  
  # No floating point variants, require thumb1 softfp
  all_nofp_t	:= armv6-m armv6s-m armv8-m.base
diff -Nrcpad gcc-9.3.0/gcc/config/arm/t-fuchsia gcc-10.1.0/gcc/config/arm/t-fuchsia
*** gcc-9.3.0/gcc/config/arm/t-fuchsia	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/t-fuchsia	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2017-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2017-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/arm/t-linux-eabi gcc-10.1.0/gcc/config/arm/t-linux-eabi
*** gcc-9.3.0/gcc/config/arm/t-linux-eabi	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/t-linux-eabi	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2005-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2005-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/arm/t-multilib gcc-10.1.0/gcc/config/arm/t-multilib
*** gcc-9.3.0/gcc/config/arm/t-multilib	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/t-multilib	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2016-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2016-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
*************** v7ve_vfpv4_simd_variants := +simd
*** 73,81 ****
  v8_a_nosimd_variants	:= +crc
  v8_a_simd_variants	:= $(call all_feat_combs, simd crypto)
  v8_1_a_simd_variants	:= $(call all_feat_combs, simd crypto)
! v8_2_a_simd_variants	:= $(call all_feat_combs, simd fp16 fp16fml crypto dotprod)
! v8_4_a_simd_variants	:= $(call all_feat_combs, simd fp16 crypto)
! v8_5_a_simd_variants	:= $(call all_feat_combs, simd fp16 crypto)
  v8_r_nosimd_variants	:= +crc
  
  ifneq (,$(HAS_APROFILE))
--- 73,82 ----
  v8_a_nosimd_variants	:= +crc
  v8_a_simd_variants	:= $(call all_feat_combs, simd crypto)
  v8_1_a_simd_variants	:= $(call all_feat_combs, simd crypto)
! v8_2_a_simd_variants	:= $(call all_feat_combs, simd fp16 fp16fml crypto dotprod i8mm bf16)
! v8_4_a_simd_variants	:= $(call all_feat_combs, simd fp16 crypto i8mm bf16)
! v8_5_a_simd_variants	:= $(call all_feat_combs, simd fp16 crypto i8mm bf16)
! v8_6_a_simd_variants	:= $(call all_feat_combs, simd fp16 crypto i8mm bf16)
  v8_r_nosimd_variants	:= +crc
  
  ifneq (,$(HAS_APROFILE))
*************** MULTILIB_MATCHES	+= march?armv7=march?ar
*** 194,199 ****
--- 195,207 ----
  MULTILIB_MATCHES	+= $(foreach ARCH, $(v8_5_a_simd_variants), \
  			     march?armv7+fp=march?armv8.5-a$(ARCH))
  
+ # Baseline v8.6-a: map down to baseline v8-a
+ MULTILIB_MATCHES	+= march?armv7=march?armv8.6-a
+ 
+ # Map all v8.6-a SIMD variants
+ MULTILIB_MATCHES	+= $(foreach ARCH, $(v8_6_a_simd_variants), \
+ 			     march?armv7+fp=march?armv8.6-a$(ARCH))
+ 
  endif		# Not APROFILE.
  
  # Use Thumb libraries for everything.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/t-phoenix gcc-10.1.0/gcc/config/arm/t-phoenix
*** gcc-9.3.0/gcc/config/arm/t-phoenix	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/t-phoenix	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2016-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2016-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/arm/t-rmprofile gcc-10.1.0/gcc/config/arm/t-rmprofile
*** gcc-9.3.0/gcc/config/arm/t-rmprofile	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/t-rmprofile	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2016-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2016-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
***************
*** 27,34 ****
  
  # Arch and FPU variants to build libraries with
  
! MULTI_ARCH_OPTS_RM	= march=armv6s-m/march=armv7-m/march=armv7e-m/march=armv7e-m+fp/march=armv7e-m+fp.dp/march=armv8-m.base/march=armv8-m.main/march=armv8-m.main+fp/march=armv8-m.main+fp.dp
! MULTI_ARCH_DIRS_RM	= v6-m v7-m v7e-m v7e-m+fp v7e-m+dp v8-m.base v8-m.main v8-m.main+fp v8-m.main+dp
  
  # Base M-profile (no fp)
  MULTILIB_REQUIRED	+= mthumb/march=armv6s-m/mfloat-abi=soft
--- 27,34 ----
  
  # Arch and FPU variants to build libraries with
  
! MULTI_ARCH_OPTS_RM	= march=armv6s-m/march=armv7-m/march=armv7e-m/march=armv7e-m+fp/march=armv7e-m+fp.dp/march=armv8-m.base/march=armv8-m.main/march=armv8-m.main+fp/march=armv8-m.main+fp.dp/march=armv8.1-m.main+mve
! MULTI_ARCH_DIRS_RM	= v6-m v7-m v7e-m v7e-m+fp v7e-m+dp v8-m.base v8-m.main v8-m.main+fp v8-m.main+dp v8.1-m.main+mve
  
  # Base M-profile (no fp)
  MULTILIB_REQUIRED	+= mthumb/march=armv6s-m/mfloat-abi=soft
*************** MULTILIB_REQUIRED	+= mthumb/march=armv8-
*** 48,60 ****
  MULTILIB_REQUIRED	+= mthumb/march=armv8-m.main+fp/mfloat-abi=softfp
  MULTILIB_REQUIRED	+= mthumb/march=armv8-m.main+fp.dp/mfloat-abi=hard
  MULTILIB_REQUIRED	+= mthumb/march=armv8-m.main+fp.dp/mfloat-abi=softfp
! 
! 
  
  # Arch Matches
  MULTILIB_MATCHES	+= march?armv6s-m=march?armv6-m
  
! # Map all v8-m.main+dsp FP variants down the the variant without DSP.
  MULTILIB_MATCHES	+= march?armv8-m.main=march?armv8-m.main+dsp \
  			   $(foreach FP, +fp +fp.dp, \
  			     march?armv8-m.main$(FP)=march?armv8-m.main+dsp$(FP))
--- 48,59 ----
  MULTILIB_REQUIRED	+= mthumb/march=armv8-m.main+fp/mfloat-abi=softfp
  MULTILIB_REQUIRED	+= mthumb/march=armv8-m.main+fp.dp/mfloat-abi=hard
  MULTILIB_REQUIRED	+= mthumb/march=armv8-m.main+fp.dp/mfloat-abi=softfp
! MULTILIB_REQUIRED	+= mthumb/march=armv8.1-m.main+mve/mfloat-abi=hard
  
  # Arch Matches
  MULTILIB_MATCHES	+= march?armv6s-m=march?armv6-m
  
! # Map all v8-m.main+dsp FP variants down to the variant without DSP.
  MULTILIB_MATCHES	+= march?armv8-m.main=march?armv8-m.main+dsp \
  			   $(foreach FP, +fp +fp.dp, \
  			     march?armv8-m.main$(FP)=march?armv8-m.main+dsp$(FP))
*************** MULTILIB_MATCHES	+= march?armv7e-m+fp=ma
*** 66,68 ****
--- 65,84 ----
  MULTILIB_REUSE		+= $(foreach ARCH, armv6s-m armv7-m armv7e-m armv8-m\.base armv8-m\.main, \
  			     mthumb/march.$(ARCH)/mfloat-abi.soft=mthumb/march.$(ARCH)/mfloat-abi.softfp)
  
+ 
+ # Map v8.1-M to v8-M.
+ MULTILIB_MATCHES	+= march?armv8-m.main=march?armv8.1-m.main
+ MULTILIB_MATCHES	+= march?armv8-m.main=march?armv8.1-m.main+dsp
+ MULTILIB_REUSE		+= mthumb/march.armv8-m\.main/mfloat-abi.soft=mthumb/march.armv8\.1-m\.main+mve/mfloat-abi.soft
+ MULTILIB_REUSE		+= mthumb/march.armv8-m\.main/mfloat-abi.soft=mthumb/march.armv8\.1-m\.main+mve/mfloat-abi.softfp
+ 
+ v8_1m_sp_variants = +fp +dsp+fp +mve.fp +fp+mve
+ v8_1m_dp_variants = +fp.dp +dsp+fp.dp +fp.dp+mve +fp.dp+mve.fp
+ 
+ # Map all v8.1-m.main FP sp variants down to v8-m.
+ MULTILIB_MATCHES += $(foreach FP, $(v8_1m_sp_variants), \
+ 			     march?armv8-m.main+fp=march?armv8.1-m.main$(FP))
+ 
+ # Map all v8.1-m.main FP dp variants down to v8-m.
+ MULTILIB_MATCHES += $(foreach FP, $(v8_1m_dp_variants), \
+ 			     march?armv8-m.main+fp.dp=march?armv8.1-m.main$(FP))
diff -Nrcpad gcc-9.3.0/gcc/config/arm/t-symbian gcc-10.1.0/gcc/config/arm/t-symbian
*** gcc-9.3.0/gcc/config/arm/t-symbian	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/t-symbian	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2004-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2004-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/arm/t-vxworks gcc-10.1.0/gcc/config/arm/t-vxworks
*** gcc-9.3.0/gcc/config/arm/t-vxworks	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/t-vxworks	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2003-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2003-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
***************
*** 16,22 ****
  # along with GCC; see the file COPYING3.  If not see
  # <http://www.gnu.org/licenses/>.
  
! MULTILIB_OPTIONS = mrtp fPIC
  
! # -fPIC alone is not supported, only together with -mrtp
! MULTILIB_EXCEPTIONS = fPIC
--- 16,23 ----
  # along with GCC; see the file COPYING3.  If not see
  # <http://www.gnu.org/licenses/>.
  
! # Multilibs for ARM VxWorks.  With the move to VxWorks 7, we only
! # support -mrtp variation on top of the default settings at this
! # stage, without PIC.
  
! MULTILIB_OPTIONS = mrtp
diff -Nrcpad gcc-9.3.0/gcc/config/arm/thumb1.md gcc-10.1.0/gcc/config/arm/thumb1.md
*** gcc-9.3.0/gcc/config/arm/thumb1.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/thumb1.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Thumb-1 Machine Description
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; ARM Thumb-1 Machine Description
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 831,839 ****
     (set_attr "conds" "clob,nocond,nocond,nocond,nocond,clob,nocond")])
  
  (define_expand "thumb_movhi_clobber"
!   [(set (match_operand:HI     0 "memory_operand"   "")
! 	(match_operand:HI     1 "register_operand" ""))
!    (clobber (match_operand:DI 2 "register_operand" ""))]
    "TARGET_THUMB1"
    "
    if (strict_memory_address_p (HImode, XEXP (operands[0], 0))
--- 831,839 ----
     (set_attr "conds" "clob,nocond,nocond,nocond,nocond,clob,nocond")])
  
  (define_expand "thumb_movhi_clobber"
!   [(set (match_operand:HI     0 "memory_operand")
! 	(match_operand:HI     1 "register_operand"))
!    (clobber (match_operand:DI 2 "register_operand"))]
    "TARGET_THUMB1"
    "
    if (strict_memory_address_p (HImode, XEXP (operands[0], 0))
***************
*** 985,991 ****
  
  ;; Thumb block-move insns
  
! (define_insn "movmem12b"
    [(set (mem:SI (match_operand:SI 2 "register_operand" "0"))
  	(mem:SI (match_operand:SI 3 "register_operand" "1")))
     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
--- 985,991 ----
  
  ;; Thumb block-move insns
  
! (define_insn "cpymem12b"
    [(set (mem:SI (match_operand:SI 2 "register_operand" "0"))
  	(mem:SI (match_operand:SI 3 "register_operand" "1")))
     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
***************
*** 1007,1013 ****
     (set_attr "type" "store_12")]
  )
  
! (define_insn "movmem8b"
    [(set (mem:SI (match_operand:SI 2 "register_operand" "0"))
  	(mem:SI (match_operand:SI 3 "register_operand" "1")))
     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
--- 1007,1013 ----
     (set_attr "type" "store_12")]
  )
  
! (define_insn "cpymem8b"
    [(set (mem:SI (match_operand:SI 2 "register_operand" "0"))
  	(mem:SI (match_operand:SI 3 "register_operand" "1")))
     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
***************
*** 1034,1041 ****
  (define_expand "cbranchqi4"
    [(set (pc) (if_then_else
  	      (match_operator 0 "lt_ge_comparison_operator"
! 	       [(match_operand:QI 1 "memory_operand" "")
! 	        (match_operand:QI 2 "const0_operand" "")])
  	      (label_ref (match_operand 3 "" ""))
  	      (pc)))]
    "TARGET_THUMB1"
--- 1034,1041 ----
  (define_expand "cbranchqi4"
    [(set (pc) (if_then_else
  	      (match_operator 0 "lt_ge_comparison_operator"
! 	       [(match_operand:QI 1 "memory_operand")
! 	        (match_operand:QI 2 "const0_operand")])
  	      (label_ref (match_operand 3 "" ""))
  	      (pc)))]
    "TARGET_THUMB1"
***************
*** 1080,1088 ****
  	  if (!rtx_equal_p (cfun->machine->thumb1_cc_op0, operands[1])
  	      || !rtx_equal_p (cfun->machine->thumb1_cc_op1, operands[2]))
  	    t = NULL_RTX;
! 	  if (cfun->machine->thumb1_cc_mode == CC_NOOVmode)
  	    {
! 	      if (!noov_comparison_operator (operands[0], VOIDmode))
  		t = NULL_RTX;
  	    }
  	  else if (cfun->machine->thumb1_cc_mode != CCmode)
--- 1080,1088 ----
  	  if (!rtx_equal_p (cfun->machine->thumb1_cc_op0, operands[1])
  	      || !rtx_equal_p (cfun->machine->thumb1_cc_op1, operands[2]))
  	    t = NULL_RTX;
! 	  if (cfun->machine->thumb1_cc_mode == CC_NZmode)
  	    {
! 	      if (!nz_comparison_operator (operands[0], VOIDmode))
  		t = NULL_RTX;
  	    }
  	  else if (cfun->machine->thumb1_cc_mode != CCmode)
***************
*** 1154,1162 ****
        if (!rtx_equal_p (cfun->machine->thumb1_cc_op0, operands[1])
  	  || !rtx_equal_p (cfun->machine->thumb1_cc_op1, operands[2]))
  	t = NULL_RTX;
!       if (cfun->machine->thumb1_cc_mode == CC_NOOVmode)
  	{
! 	  if (!noov_comparison_operator (operands[0], VOIDmode))
  	    t = NULL_RTX;
  	}
        else if (cfun->machine->thumb1_cc_mode != CCmode)
--- 1154,1162 ----
        if (!rtx_equal_p (cfun->machine->thumb1_cc_op0, operands[1])
  	  || !rtx_equal_p (cfun->machine->thumb1_cc_op1, operands[2]))
  	t = NULL_RTX;
!       if (cfun->machine->thumb1_cc_mode == CC_NZmode)
  	{
! 	  if (!nz_comparison_operator (operands[0], VOIDmode))
  	    t = NULL_RTX;
  	}
        else if (cfun->machine->thumb1_cc_mode != CCmode)
***************
*** 1673,1680 ****
  
  (define_expand "cstoresi_eq0_thumb1"
    [(parallel
!     [(set (match_operand:SI 0 "s_register_operand" "")
! 	  (eq:SI (match_operand:SI 1 "s_register_operand" "")
  		 (const_int 0)))
       (clobber (match_dup:SI 2))])]
    "TARGET_THUMB1"
--- 1673,1680 ----
  
  (define_expand "cstoresi_eq0_thumb1"
    [(parallel
!     [(set (match_operand:SI 0 "s_register_operand")
! 	  (eq:SI (match_operand:SI 1 "s_register_operand")
  		 (const_int 0)))
       (clobber (match_dup:SI 2))])]
    "TARGET_THUMB1"
***************
*** 1683,1690 ****
  
  (define_expand "cstoresi_ne0_thumb1"
    [(parallel
!     [(set (match_operand:SI 0 "s_register_operand" "")
! 	  (ne:SI (match_operand:SI 1 "s_register_operand" "")
  		 (const_int 0)))
       (clobber (match_dup:SI 2))])]
    "TARGET_THUMB1"
--- 1683,1690 ----
  
  (define_expand "cstoresi_ne0_thumb1"
    [(parallel
!     [(set (match_operand:SI 0 "s_register_operand")
! 	  (ne:SI (match_operand:SI 1 "s_register_operand")
  		 (const_int 0)))
       (clobber (match_dup:SI 2))])]
    "TARGET_THUMB1"
***************
*** 1895,1902 ****
  )
  
  (define_expand "thumb1_casesi_internal_pic"
!   [(match_operand:SI 0 "s_register_operand" "")
!    (match_operand:SI 1 "thumb1_cmp_operand" "")
     (match_operand 2 "" "")
     (match_operand 3 "" "")]
    "TARGET_THUMB1"
--- 1895,1902 ----
  )
  
  (define_expand "thumb1_casesi_internal_pic"
!   [(match_operand:SI 0 "s_register_operand")
!    (match_operand:SI 1 "thumb1_cmp_operand")
     (match_operand 2 "" "")
     (match_operand 3 "" "")]
    "TARGET_THUMB1"
***************
*** 1968,1974 ****
  
  ;; Miscellaneous Thumb patterns
  (define_expand "tablejump"
!   [(parallel [(set (pc) (match_operand:SI 0 "register_operand" ""))
  	      (use (label_ref (match_operand 1 "" "")))])]
    "TARGET_THUMB1"
    "
--- 1968,1974 ----
  
  ;; Miscellaneous Thumb patterns
  (define_expand "tablejump"
!   [(parallel [(set (pc) (match_operand:SI 0 "register_operand"))
  	      (use (label_ref (match_operand 1 "" "")))])]
    "TARGET_THUMB1"
    "
***************
*** 2001,2007 ****
    "TARGET_THUMB1"
    "mov\\t%|pc, %0"
    [(set_attr "length" "2")
!    (set_attr "type" "no_insn")]
  )
  
  (define_insn_and_split "thumb_eh_return"
--- 2001,2007 ----
    "TARGET_THUMB1"
    "mov\\t%|pc, %0"
    [(set_attr "length" "2")
!    (set_attr "type" "branch")]
  )
  
  (define_insn_and_split "thumb_eh_return"
diff -Nrcpad gcc-9.3.0/gcc/config/arm/thumb2.md gcc-10.1.0/gcc/config/arm/thumb2.md
*** gcc-9.3.0/gcc/config/arm/thumb2.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/thumb2.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM Thumb-2 Machine Description
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  ;; Written by CodeSourcery, LLC.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM Thumb-2 Machine Description
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  ;; Written by CodeSourcery, LLC.
  ;;
  ;; This file is part of GCC.
***************
*** 24,43 ****
  ;; changes made in armv5t as "thumb2".  These are considered part
  ;; the 16-bit Thumb-1 instruction set.
  
- ;; Thumb-2 only allows shift by constant on data processing instructions
- (define_insn "*thumb_andsi_not_shiftsi_si"
-   [(set (match_operand:SI 0 "s_register_operand" "=r")
- 	(and:SI (not:SI (match_operator:SI 4 "shift_operator"
- 			 [(match_operand:SI 2 "s_register_operand" "r")
- 			  (match_operand:SI 3 "const_int_operand" "M")]))
- 		(match_operand:SI 1 "s_register_operand" "r")))]
-   "TARGET_THUMB2"
-   "bic%?\\t%0, %1, %2%S4"
-   [(set_attr "predicable" "yes")
-    (set_attr "shift" "2")
-    (set_attr "type" "alu_shift_imm")]
- )
- 
  ;; We use the '0' constraint for operand 1 because reload should
  ;; be smart enough to generate an appropriate move for the r/r/r case.
  (define_insn_and_split "*thumb2_smaxsi3"
--- 24,29 ----
***************
*** 247,254 ****
  ;; regs.  The high register alternatives are not taken into account when
  ;; choosing register preferences in order to reflect their expense.
  (define_insn "*thumb2_movsi_insn"
!   [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,l,r,r,l ,*hk,m,*m")
! 	(match_operand:SI 1 "general_operand"	   "rk,I,Py,K,j,mi,*mi,l,*hk"))]
    "TARGET_THUMB2 && !TARGET_IWMMXT && !TARGET_HARD_FLOAT
     && (   register_operand (operands[0], SImode)
         || register_operand (operands[1], SImode))"
--- 233,240 ----
  ;; regs.  The high register alternatives are not taken into account when
  ;; choosing register preferences in order to reflect their expense.
  (define_insn "*thumb2_movsi_insn"
!   [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,l,r,r,lk*r,m")
! 	(match_operand:SI 1 "general_operand"	   "rk,I,Py,K,j,mi,lk*r"))]
    "TARGET_THUMB2 && !TARGET_IWMMXT && !TARGET_HARD_FLOAT
     && (   register_operand (operands[0], SImode)
         || register_operand (operands[1], SImode))"
***************
*** 262,283 ****
      case 3: return \"mvn%?\\t%0, #%B1\";
      case 4: return \"movw%?\\t%0, %1\";
      case 5:
-     case 6:
        /* Cannot load it directly, split to load it via MOV / MOVT.  */
        if (!MEM_P (operands[1]) && arm_disable_literal_pool)
  	return \"#\";
        return \"ldr%?\\t%0, %1\";
!     case 7:
!     case 8: return \"str%?\\t%1, %0\";
      default: gcc_unreachable ();
      }
  }
!   [(set_attr "type" "mov_reg,mov_imm,mov_imm,mvn_imm,mov_imm,load_4,load_4,store_4,store_4")
!    (set_attr "length" "2,4,2,4,4,4,4,4,4")
     (set_attr "predicable" "yes")
!    (set_attr "predicable_short_it" "yes,no,yes,no,no,no,no,no,no")
!    (set_attr "pool_range" "*,*,*,*,*,1018,4094,*,*")
!    (set_attr "neg_pool_range" "*,*,*,*,*,0,0,*,*")]
  )
  
  (define_insn "tls_load_dot_plus_four"
--- 248,267 ----
      case 3: return \"mvn%?\\t%0, #%B1\";
      case 4: return \"movw%?\\t%0, %1\";
      case 5:
        /* Cannot load it directly, split to load it via MOV / MOVT.  */
        if (!MEM_P (operands[1]) && arm_disable_literal_pool)
  	return \"#\";
        return \"ldr%?\\t%0, %1\";
!     case 6: return \"str%?\\t%1, %0\";
      default: gcc_unreachable ();
      }
  }
!   [(set_attr "type" "mov_reg,mov_imm,mov_imm,mvn_imm,mov_imm,load_4,store_4")
!    (set_attr "length" "2,4,2,4,4,4,4")
     (set_attr "predicable" "yes")
!    (set_attr "predicable_short_it" "yes,no,yes,no,no,no,no")
!    (set_attr "pool_range" "*,*,*,*,*,1018,*")
!    (set_attr "neg_pool_range" "*,*,*,*,*,0,*")]
  )
  
  (define_insn "tls_load_dot_plus_four"
***************
*** 335,353 ****
    [(set_attr "type" "store_8")]
  )
  
- (define_insn "*thumb2_cmpsi_neg_shiftsi"
-   [(set (reg:CC CC_REGNUM)
- 	(compare:CC (match_operand:SI 0 "s_register_operand" "r")
- 		    (neg:SI (match_operator:SI 3 "shift_operator"
- 			     [(match_operand:SI 1 "s_register_operand" "r")
- 			      (match_operand:SI 2 "const_int_operand" "M")]))))]
-   "TARGET_THUMB2"
-   "cmn%?\\t%0, %1%S3"
-   [(set_attr "conds" "set")
-    (set_attr "shift" "1")
-    (set_attr "type" "alus_shift_imm")]
- )
- 
  (define_insn_and_split "*thumb2_mov_scc"
    [(set (match_operand:SI 0 "s_register_operand" "=l,r")
  	(match_operator:SI 1 "arm_comparison_operator_mode"
--- 319,324 ----
***************
*** 370,376 ****
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(neg:SI (match_operator:SI 1 "arm_comparison_operator_mode"
  		 [(match_operand 2 "cc_register" "") (const_int 0)])))]
!   "TARGET_THUMB2 && !arm_restrict_it"
    "#"   ; "ite\\t%D1\;mov%D1\\t%0, #0\;mvn%d1\\t%0, #0"
    "&& true"
    [(set (match_dup 0)
--- 341,349 ----
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(neg:SI (match_operator:SI 1 "arm_comparison_operator_mode"
  		 [(match_operand 2 "cc_register" "") (const_int 0)])))]
!   "TARGET_THUMB2
!    && !arm_restrict_it
!    && !arm_borrow_operation (operands[1], SImode)"
    "#"   ; "ite\\t%D1\;mov%D1\\t%0, #0\;mvn%d1\\t%0, #0"
    "&& true"
    [(set (match_dup 0)
***************
*** 389,395 ****
    [(set (match_operand:SI 0 "low_register_operand" "=l")
  	(neg:SI (match_operator:SI 1 "arm_comparison_operator_mode"
  		 [(match_operand 2 "cc_register" "") (const_int 0)])))]
!   "TARGET_THUMB2 && arm_restrict_it"
    "#"   ; ";mvn\\t%0, #0 ;it\\t%D1\;mov%D1\\t%0, #0\"
    "&& reload_completed"
    [(set (match_dup 0)
--- 362,370 ----
    [(set (match_operand:SI 0 "low_register_operand" "=l")
  	(neg:SI (match_operator:SI 1 "arm_comparison_operator_mode"
  		 [(match_operand 2 "cc_register" "") (const_int 0)])))]
!   "TARGET_THUMB2
!    && arm_restrict_it
!    && !arm_borrow_operation (operands[1], SImode)"
    "#"   ; ";mvn\\t%0, #0 ;it\\t%D1\;mov%D1\\t%0, #0\"
    "&& reload_completed"
    [(set (match_dup 0)
***************
*** 542,548 ****
  			  [(match_operand 4 "cc_register" "") (const_int 0)])
  			 (match_operand:SF 1 "s_register_operand" "0,r")
  			 (match_operand:SF 2 "s_register_operand" "r,0")))]
!   "TARGET_THUMB2 && TARGET_SOFT_FLOAT"
    "@
     it\\t%D3\;mov%D3\\t%0, %2
     it\\t%d3\;mov%d3\\t%0, %1"
--- 517,523 ----
  			  [(match_operand 4 "cc_register" "") (const_int 0)])
  			 (match_operand:SF 1 "s_register_operand" "0,r")
  			 (match_operand:SF 2 "s_register_operand" "r,0")))]
!   "TARGET_THUMB2 && TARGET_SOFT_FLOAT && !TARGET_HAVE_MVE"
    "@
     it\\t%D3\;mov%D3\\t%0, %2
     it\\t%d3\;mov%d3\\t%0, %1"
***************
*** 562,574 ****
  )
  
  (define_insn "*nonsecure_call_reg_thumb2"
!   [(call (unspec:SI [(mem:SI (reg:SI R4_REGNUM))]
  		    UNSPEC_NONSECURE_MEM)
! 	 (match_operand 0 "" ""))
!    (use (match_operand 1 "" ""))
     (clobber (reg:SI LR_REGNUM))]
    "TARGET_THUMB2 && use_cmse"
!   "bl\\t__gnu_cmse_nonsecure_call"
    [(set_attr "length" "4")
     (set_attr "type" "call")]
  )
--- 537,554 ----
  )
  
  (define_insn "*nonsecure_call_reg_thumb2"
!   [(call (unspec:SI [(mem:SI (match_operand:SI 0 "s_register_operand" "l*r"))]
  		    UNSPEC_NONSECURE_MEM)
! 	 (match_operand 1 "" ""))
!    (use (match_operand 2 "" ""))
     (clobber (reg:SI LR_REGNUM))]
    "TARGET_THUMB2 && use_cmse"
!   {
!     if (TARGET_HAVE_FPCXT_CMSE)
!       return "blxns\\t%0";
!     else
!       return "bl\\t__gnu_cmse_nonsecure_call";
!   }
    [(set_attr "length" "4")
     (set_attr "type" "call")]
  )
***************
*** 587,599 ****
  (define_insn "*nonsecure_call_value_reg_thumb2"
    [(set (match_operand 0 "" "")
  	(call
! 	 (unspec:SI [(mem:SI (reg:SI R4_REGNUM))]
  		    UNSPEC_NONSECURE_MEM)
! 	 (match_operand 1 "" "")))
!    (use (match_operand 2 "" ""))
     (clobber (reg:SI LR_REGNUM))]
    "TARGET_THUMB2 && use_cmse"
!   "bl\t__gnu_cmse_nonsecure_call"
    [(set_attr "length" "4")
     (set_attr "type" "call")]
  )
--- 567,584 ----
  (define_insn "*nonsecure_call_value_reg_thumb2"
    [(set (match_operand 0 "" "")
  	(call
! 	 (unspec:SI [(mem:SI (match_operand:SI 1 "register_operand" "l*r"))]
  		    UNSPEC_NONSECURE_MEM)
! 	 (match_operand 2 "" "")))
!    (use (match_operand 3 "" ""))
     (clobber (reg:SI LR_REGNUM))]
    "TARGET_THUMB2 && use_cmse"
!   {
!     if (TARGET_HAVE_FPCXT_CMSE)
!       return "blxns\\t%1";
!     else
!       return "bl\\t__gnu_cmse_nonsecure_call";
!   }
    [(set_attr "length" "4")
     (set_attr "type" "call")]
  )
***************
*** 1312,1319 ****
  )
  
  (define_insn "thumb2_addsi3_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	  (plus:SI (match_operand:SI 1 "s_register_operand" "l,  0, r")
  		   (match_operand:SI 2 "arm_add_operand"    "lPt,Ps,rIL"))
  	  (const_int 0)))
--- 1297,1304 ----
  )
  
  (define_insn "thumb2_addsi3_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	  (plus:SI (match_operand:SI 1 "s_register_operand" "l,  0, r")
  		   (match_operand:SI 2 "arm_add_operand"    "lPt,Ps,rIL"))
  	  (const_int 0)))
***************
*** 1346,1353 ****
  )
  
  (define_insn "*thumb2_addsi3_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
! 	(compare:CC_NOOV
  	  (plus:SI (match_operand:SI 0 "s_register_operand" "l,  r")
  		   (match_operand:SI 1 "arm_add_operand"    "lPv,rIL"))
  	  (const_int 0)))]
--- 1331,1338 ----
  )
  
  (define_insn "*thumb2_addsi3_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
! 	(compare:CC_NZ
  	  (plus:SI (match_operand:SI 0 "s_register_operand" "l,  r")
  		   (match_operand:SI 1 "arm_add_operand"    "lPv,rIL"))
  	  (const_int 0)))]
***************
*** 1384,1391 ****
     (set_attr "type" "muls")])
  
  (define_insn "*thumb2_mulsi_short_compare0"
!   [(set (reg:CC_NOOV CC_REGNUM)
!         (compare:CC_NOOV
           (mult:SI (match_operand:SI 1 "register_operand" "%0")
  	          (match_operand:SI 2 "register_operand" "l"))
           (const_int 0)))
--- 1369,1376 ----
     (set_attr "type" "muls")])
  
  (define_insn "*thumb2_mulsi_short_compare0"
!   [(set (reg:CC_NZ CC_REGNUM)
!         (compare:CC_NZ
           (mult:SI (match_operand:SI 1 "register_operand" "%0")
  	          (match_operand:SI 2 "register_operand" "l"))
           (const_int 0)))
***************
*** 1397,1404 ****
     (set_attr "type" "muls")])
  
  (define_insn "*thumb2_mulsi_short_compare0_scratch"
!   [(set (reg:CC_NOOV CC_REGNUM)
!         (compare:CC_NOOV
           (mult:SI (match_operand:SI 1 "register_operand" "%0")
  	          (match_operand:SI 2 "register_operand" "l"))
           (const_int 0)))
--- 1382,1389 ----
     (set_attr "type" "muls")])
  
  (define_insn "*thumb2_mulsi_short_compare0_scratch"
!   [(set (reg:CC_NZ CC_REGNUM)
!         (compare:CC_NZ
           (mult:SI (match_operand:SI 1 "register_operand" "%0")
  	          (match_operand:SI 2 "register_operand" "l"))
           (const_int 0)))
***************
*** 1478,1580 ****
     (set_attr "type" "alu_sreg")]
  )
  
- ; Constants for op 2 will never be given to these patterns.
- (define_insn_and_split "*iordi_notdi_di"
-   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
- 	(ior:DI (not:DI (match_operand:DI 1 "s_register_operand" "0,r"))
- 		(match_operand:DI 2 "s_register_operand" "r,0")))]
-   "TARGET_THUMB2"
-   "#"
-   "TARGET_THUMB2 && reload_completed"
-   [(set (match_dup 0) (ior:SI (not:SI (match_dup 1)) (match_dup 2)))
-    (set (match_dup 3) (ior:SI (not:SI (match_dup 4)) (match_dup 5)))]
-   "
-   {
-     operands[3] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-     operands[4] = gen_highpart (SImode, operands[1]);
-     operands[1] = gen_lowpart (SImode, operands[1]);
-     operands[5] = gen_highpart (SImode, operands[2]);
-     operands[2] = gen_lowpart (SImode, operands[2]);
-   }"
-   [(set_attr "length" "8")
-    (set_attr "predicable" "yes")
-    (set_attr "predicable_short_it" "no")
-    (set_attr "type" "multiple")]
- )
- 
- (define_insn_and_split "*iordi_notzesidi_di"
-   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
- 	(ior:DI (not:DI (zero_extend:DI
- 			 (match_operand:SI 2 "s_register_operand" "r,r")))
- 		(match_operand:DI 1 "s_register_operand" "0,?r")))]
-   "TARGET_THUMB2"
-   "#"
-   ; (not (zero_extend...)) means operand0 will always be 0xffffffff
-   "TARGET_THUMB2 && reload_completed"
-   [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1)))
-    (set (match_dup 3) (const_int -1))]
-   "
-   {
-     operands[3] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-     operands[1] = gen_lowpart (SImode, operands[1]);
-   }"
-   [(set_attr "length" "4,8")
-    (set_attr "predicable" "yes")
-    (set_attr "predicable_short_it" "no")
-    (set_attr "type" "multiple")]
- )
- 
- (define_insn_and_split "*iordi_notdi_zesidi"
-   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
- 	(ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "0,?r"))
- 		(zero_extend:DI
- 		 (match_operand:SI 1 "s_register_operand" "r,r"))))]
-   "TARGET_THUMB2"
-   "#"
-   "TARGET_THUMB2 && reload_completed"
-   [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1)))
-    (set (match_dup 3) (not:SI (match_dup 4)))]
-   "
-   {
-     operands[3] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-     operands[1] = gen_lowpart (SImode, operands[1]);
-     operands[4] = gen_highpart (SImode, operands[2]);
-     operands[2] = gen_lowpart (SImode, operands[2]);
-   }"
-   [(set_attr "length" "8")
-    (set_attr "predicable" "yes")
-    (set_attr "predicable_short_it" "no")
-    (set_attr "type" "multiple")]
- )
- 
- (define_insn_and_split "*iordi_notsesidi_di"
-   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
- 	(ior:DI (not:DI (sign_extend:DI
- 			 (match_operand:SI 2 "s_register_operand" "r,r")))
- 		(match_operand:DI 1 "s_register_operand" "0,r")))]
-   "TARGET_THUMB2"
-   "#"
-   "TARGET_THUMB2 && reload_completed"
-   [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1)))
-    (set (match_dup 3) (ior:SI (not:SI
- 				(ashiftrt:SI (match_dup 2) (const_int 31)))
- 			       (match_dup 4)))]
-   "
-   {
-     operands[3] = gen_highpart (SImode, operands[0]);
-     operands[0] = gen_lowpart (SImode, operands[0]);
-     operands[4] = gen_highpart (SImode, operands[1]);
-     operands[1] = gen_lowpart (SImode, operands[1]);
-   }"
-   [(set_attr "length" "8")
-    (set_attr "predicable" "yes")
-    (set_attr "predicable_short_it" "no")
-    (set_attr "type" "multiple")]
- )
- 
  (define_insn "*orsi_notsi_si"
    [(set (match_operand:SI 0 "s_register_operand" "=r")
  	(ior:SI (not:SI (match_operand:SI 2 "s_register_operand" "r"))
--- 1463,1468 ----
***************
*** 1599,1613 ****
  )
  
  (define_peephole2
!   [(set (match_operand:CC_NOOV 0 "cc_register" "")
! 	(compare:CC_NOOV (zero_extract:SI
  			  (match_operand:SI 1 "low_register_operand" "")
  			  (const_int 1)
  			  (match_operand:SI 2 "const_int_operand" ""))
  			 (const_int 0)))
     (match_scratch:SI 3 "l")
     (set (pc)
! 	(if_then_else (match_operator:CC_NOOV 4 "equality_operator"
  		       [(match_dup 0) (const_int 0)])
  		      (match_operand 5 "" "")
  		      (match_operand 6 "" "")))]
--- 1487,1501 ----
  )
  
  (define_peephole2
!   [(set (match_operand:CC_NZ 0 "cc_register" "")
! 	(compare:CC_NZ (zero_extract:SI
  			  (match_operand:SI 1 "low_register_operand" "")
  			  (const_int 1)
  			  (match_operand:SI 2 "const_int_operand" ""))
  			 (const_int 0)))
     (match_scratch:SI 3 "l")
     (set (pc)
! 	(if_then_else (match_operator:CC_NZ 4 "equality_operator"
  		       [(match_dup 0) (const_int 0)])
  		      (match_operand 5 "" "")
  		      (match_operand 6 "" "")))]
***************
*** 1615,1621 ****
     && (INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) < 32)
     && peep2_reg_dead_p (2, operands[0])"
    [(parallel [(set (match_dup 0)
! 		   (compare:CC_NOOV (ashift:SI (match_dup 1) (match_dup 2))
  				    (const_int 0)))
  	      (clobber (match_dup 3))])
     (set (pc)
--- 1503,1509 ----
     && (INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) < 32)
     && peep2_reg_dead_p (2, operands[0])"
    [(parallel [(set (match_dup 0)
! 		   (compare:CC_NZ (ashift:SI (match_dup 1) (match_dup 2))
  				    (const_int 0)))
  	      (clobber (match_dup 3))])
     (set (pc)
***************
*** 1628,1642 ****
    ")
  
  (define_peephole2
!   [(set (match_operand:CC_NOOV 0 "cc_register" "")
! 	(compare:CC_NOOV (zero_extract:SI
  			  (match_operand:SI 1 "low_register_operand" "")
  			  (match_operand:SI 2 "const_int_operand" "")
  			  (const_int 0))
  			 (const_int 0)))
     (match_scratch:SI 3 "l")
     (set (pc)
! 	(if_then_else (match_operator:CC_NOOV 4 "equality_operator"
  		       [(match_dup 0) (const_int 0)])
  		      (match_operand 5 "" "")
  		      (match_operand 6 "" "")))]
--- 1516,1530 ----
    ")
  
  (define_peephole2
!   [(set (match_operand:CC_NZ 0 "cc_register" "")
! 	(compare:CC_NZ (zero_extract:SI
  			  (match_operand:SI 1 "low_register_operand" "")
  			  (match_operand:SI 2 "const_int_operand" "")
  			  (const_int 0))
  			 (const_int 0)))
     (match_scratch:SI 3 "l")
     (set (pc)
! 	(if_then_else (match_operator:CC_NZ 4 "equality_operator"
  		       [(match_dup 0) (const_int 0)])
  		      (match_operand 5 "" "")
  		      (match_operand 6 "" "")))]
***************
*** 1644,1651 ****
     && (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 32)
     && peep2_reg_dead_p (2, operands[0])"
    [(parallel [(set (match_dup 0)
! 		   (compare:CC_NOOV (ashift:SI (match_dup 1) (match_dup 2))
! 				    (const_int 0)))
  	      (clobber (match_dup 3))])
     (set (pc)
  	(if_then_else (match_op_dup 4 [(match_dup 0) (const_int 0)])
--- 1532,1539 ----
     && (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 32)
     && peep2_reg_dead_p (2, operands[0])"
    [(parallel [(set (match_dup 0)
! 		   (compare:CC_NZ (ashift:SI (match_dup 1) (match_dup 2))
! 				  (const_int 0)))
  	      (clobber (match_dup 3))])
     (set (pc)
  	(if_then_else (match_op_dup 4 [(match_dup 0) (const_int 0)])
***************
*** 1698,1700 ****
--- 1586,1652 ----
        FAIL;
   }")
  
+ (define_insn "*clear_apsr"
+   [(unspec_volatile:SI [(const_int 0)] VUNSPEC_CLRM_APSR)
+   (clobber (reg:CC CC_REGNUM))]
+   "TARGET_THUMB2 && TARGET_HAVE_FPCXT_CMSE && use_cmse"
+   "clrm%?\\t{APSR}"
+   [(set_attr "predicable" "yes")]
+ )
+ 
+ ;; The operands are validated through the clear_multiple_operation
+ ;; match_parallel predicate rather than through constraints so enable it only
+ ;; after reload.
+ (define_insn "*clear_multiple"
+   [(match_parallel 0 "clear_multiple_operation"
+      [(set (match_operand:SI 1 "register_operand" "")
+ 	   (const_int 0))])]
+   "TARGET_THUMB2 && TARGET_HAVE_FPCXT_CMSE && use_cmse && reload_completed"
+   {
+     char pattern[100];
+     int i, num_saves = XVECLEN (operands[0], 0);
+ 
+     strcpy (pattern, \"clrm%?\\t{\");
+     for (i = 0; i < num_saves; i++)
+       {
+ 	if (GET_CODE (XVECEXP (operands[0], 0, i)) == UNSPEC_VOLATILE)
+ 	  {
+ 	    strcat (pattern, \"APSR\");
+ 	    ++i;
+ 	  }
+ 	else
+ 	  strcat (pattern,
+ 		  reg_names[REGNO (XEXP (XVECEXP (operands[0], 0, i), 0))]);
+ 	if (i < num_saves - 1)
+ 	  strcat (pattern, \", %|\");
+       }
+     strcat (pattern, \"}\");
+     output_asm_insn (pattern, operands);
+     return \"\";
+   }
+   [(set_attr "predicable" "yes")]
+ )
+ 
+ (define_insn "thumb2_asrl"
+   [(set (match_operand:DI 0 "arm_general_register_operand" "+r")
+ 	(ashiftrt:DI (match_dup 0)
+ 		     (match_operand:SI 1 "arm_reg_or_long_shift_imm" "rPg")))]
+   "TARGET_HAVE_MVE"
+   "asrl%?\\t%Q0, %R0, %1"
+   [(set_attr "predicable" "yes")])
+ 
+ (define_insn "thumb2_lsll"
+   [(set (match_operand:DI 0 "arm_general_register_operand" "+r")
+ 	(ashift:DI (match_dup 0)
+ 		   (match_operand:SI 1 "arm_reg_or_long_shift_imm" "rPg")))]
+   "TARGET_HAVE_MVE"
+   "lsll%?\\t%Q0, %R0, %1"
+   [(set_attr "predicable" "yes")])
+ 
+ (define_insn "thumb2_lsrl"
+   [(set (match_operand:DI 0 "arm_general_register_operand" "+r")
+ 	(lshiftrt:DI (match_dup 0)
+ 		     (match_operand:SI 1 "long_shift_imm" "Pg")))]
+   "TARGET_HAVE_MVE"
+   "lsrl%?\\t%Q0, %R0, %1"
+   [(set_attr "predicable" "yes")])
diff -Nrcpad gcc-9.3.0/gcc/config/arm/types.md gcc-10.1.0/gcc/config/arm/types.md
*** gcc-9.3.0/gcc/config/arm/types.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/types.md	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ;; Instruction Classification for ARM for GNU compiler.
  
! ;; Copyright (C) 1991-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  
  ;; This file is part of GCC.
--- 1,6 ----
  ;; Instruction Classification for ARM for GNU compiler.
  
! ;; Copyright (C) 1991-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  
  ;; This file is part of GCC.
***************
*** 546,551 ****
--- 546,560 ----
  ; The classification below is for coprocessor instructions
  ;
  ; coproc
+ ;
+ ; The classification below is for TME instructions
+ ;
+ ; tme
+ ; The classification below is for M-profile Vector Extension instructions
+ ;
+ ; mve_move
+ ; mve_store
+ ; mve_load
  
  (define_attr "type"
   "adc_imm,\
***************
*** 1091,1097 ****
    crypto_sha3,\
    crypto_sm3,\
    crypto_sm4,\
!   coproc"
     (const_string "untyped"))
  
  ; Is this an (integer side) multiply with a 32-bit (or smaller) result?
--- 1100,1111 ----
    crypto_sha3,\
    crypto_sm3,\
    crypto_sm4,\
!   coproc,\
!   tme,\
!   memtag,\
!   mve_move,\
!   mve_store,\
!   mve_load"
     (const_string "untyped"))
  
  ; Is this an (integer side) multiply with a 32-bit (or smaller) result?
***************
*** 1215,1217 ****
--- 1229,1243 ----
            crypto_sha256_fast, crypto_sha256_slow")
          (const_string "yes")
          (const_string "no")))
+ 
+ ;; YES if the "type" attribute assigned to the insn denotes an MVE instruction,
+ ;; No otherwise.
+ (define_attr "is_mve_type" "yes,no"
+         (if_then_else (eq_attr "type"
+         "mve_move, mve_load, mve_store, mrs")
+         (const_string "yes")
+         (const_string "no")))
+ 
+ (define_insn_reservation "no_reservation" 0
+   (eq_attr "type" "no_insn")
+   "nothing")
diff -Nrcpad gcc-9.3.0/gcc/config/arm/uclinux-eabi.h gcc-10.1.0/gcc/config/arm/uclinux-eabi.h
*** gcc-9.3.0/gcc/config/arm/uclinux-eabi.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/uclinux-eabi.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for ARM EABI ucLinux
!    Copyright (C) 2006-2019 Free Software Foundation, Inc.
     Contributed by Paul Brook <paul@codesourcery.com>
  
     This file is part of GCC.
--- 1,5 ----
  /* Definitions for ARM EABI ucLinux
!    Copyright (C) 2006-2020 Free Software Foundation, Inc.
     Contributed by Paul Brook <paul@codesourcery.com>
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/uclinux-elf.h gcc-10.1.0/gcc/config/arm/uclinux-elf.h
*** gcc-9.3.0/gcc/config/arm/uclinux-elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/uclinux-elf.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for ARM running ucLinux using ELF
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
     Contributed by Philip Blundell <pb@nexus.co.uk>
  
     This file is part of GCC.
--- 1,5 ----
  /* Definitions for ARM running ucLinux using ELF
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
     Contributed by Philip Blundell <pb@nexus.co.uk>
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/uclinuxfdpiceabi.h gcc-10.1.0/gcc/config/arm/uclinuxfdpiceabi.h
*** gcc-9.3.0/gcc/config/arm/uclinuxfdpiceabi.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/arm/uclinuxfdpiceabi.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,54 ----
+ /* Configuration file for ARM GNU/Linux FDPIC EABI targets.
+    Copyright (C) 2018-2020 Free Software Foundation, Inc.
+    Contributed by STMicroelectronics.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published
+    by the Free Software Foundation; either version 3, or (at your
+    option) any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ /* On uClibc EABI GNU/Linux, we want to force -mfdpic by default,
+    which also means we produce PIE code by default.  */
+ #undef FDPIC_CC1_SPEC
+ #define FDPIC_CC1_SPEC \
+   "%{!mno-fdpic:-mfdpic %{!fno-PIE:%{!fpie:%{!fPIC:%{!fpic: -fPIE}}}}}"
+ 
+ /* Add --fdpic assembler flag by default.  */
+ #undef TARGET_FDPIC_ASM_SPEC
+ #define TARGET_FDPIC_ASM_SPEC "%{!mno-fdpic: --fdpic}"
+ 
+ /* TARGET_BIG_ENDIAN_DEFAULT is set in
+    config.gcc for big endian configurations.  */
+ #if TARGET_BIG_ENDIAN_DEFAULT
+ #define TARGET_FDPIC_LINKER_EMULATION "armelfb_linux_fdpiceabi"
+ #else
+ #define TARGET_FDPIC_LINKER_EMULATION "armelf_linux_fdpiceabi"
+ #endif
+ 
+ /* Unless we generate a shared library or a relocatable object, we
+    force -pie.  */
+ /* -static is not supported, because we have to define the
+    dynamic-linker, as we have some relocations to resolve at load
+    time. We do not generate an error in case the user explictly passes
+    the -dynamic-linker option to the linker.  */
+ #undef  SUBTARGET_EXTRA_LINK_SPEC
+ #define SUBTARGET_EXTRA_LINK_SPEC			    \
+   "%{!mno-fdpic: -m " TARGET_FDPIC_LINKER_EMULATION	    \
+    "%{!shared:%{!r: -pie}} }"				    \
+   "%{mno-fdpic: -m " TARGET_LINKER_EMULATION "}"	    \
+   "%{!r:%{!mno-fdpic: -z now}}"
+ 
+ #undef	STARTFILE_SPEC
+ #define STARTFILE_SPEC "%{!mno-fdpic:%{!shared:crtreloc.o%s}} " \
+   LINUX_OR_ANDROID_LD (GNU_USER_TARGET_STARTFILE_SPEC, ANDROID_STARTFILE_SPEC)
diff -Nrcpad gcc-9.3.0/gcc/config/arm/unknown-elf.h gcc-10.1.0/gcc/config/arm/unknown-elf.h
*** gcc-9.3.0/gcc/config/arm/unknown-elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/unknown-elf.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for non-Linux based ARM systems using ELF
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
     Contributed by Catherine Moore <clm@cygnus.com>
  
     This file is part of GCC.
--- 1,5 ----
  /* Definitions for non-Linux based ARM systems using ELF
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
     Contributed by Catherine Moore <clm@cygnus.com>
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/unspecs.md gcc-10.1.0/gcc/config/arm/unspecs.md
*** gcc-9.3.0/gcc/config/arm/unspecs.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/unspecs.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Unspec defintions.
! ;; Copyright (C) 2012-2019 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Unspec defintions.
! ;; Copyright (C) 2012-2020 Free Software Foundation, Inc.
  ;; Contributed by ARM Ltd.
  
  ;; This file is part of GCC.
***************
*** 70,75 ****
--- 70,79 ----
  			; that.
    UNSPEC_UNALIGNED_STORE ; Same for str/strh.
    UNSPEC_PIC_UNIFIED    ; Create a common pic addressing form.
+   UNSPEC_Q_SET          ; Represent setting the Q bit.
+   UNSPEC_GE_SET         ; Represent setting the GE bits.
+   UNSPEC_APSR_READ      ; Represent reading the APSR.
+ 
    UNSPEC_LL		; Represent an unpaired load-register-exclusive.
    UNSPEC_VRINTZ         ; Represent a float to integral float rounding
                          ; towards zero.
***************
*** 89,96 ****
--- 93,166 ----
    UNSPEC_SP_SET		; Represent the setting of stack protector's canary
    UNSPEC_SP_TEST	; Represent the testing of stack protector's canary
  			; against the guard.
+   UNSPEC_PIC_RESTORE	; Use to restore fdpic register
+ 
+   UNSPEC_SXTAB16	; Represent the SXTAB16 operation.
+   UNSPEC_UXTAB16	; Represent the UXTAB16 operation.
+   UNSPEC_SXTB16		; Represent the SXTB16 operation.
+   UNSPEC_UXTB16		; Represent the UXTB16 operation.
+   UNSPEC_QADD8		; Represent the QADD8 operation.
+   UNSPEC_QSUB8		; Represent the QSUB8 operation.
+   UNSPEC_SHADD8		; Represent the SHADD8 operation.
+   UNSPEC_SHSUB8		; Represent the SHSUB8 operation.
+   UNSPEC_UHADD8		; Represent the UHADD8 operation.
+   UNSPEC_UHSUB8		; Represent the UHSUB8 operation.
+   UNSPEC_UQADD8		; Represent the UQADD8 operation.
+   UNSPEC_UQSUB8		; Represent the UQSUB8 operation.
+   UNSPEC_QADD16		; Represent the QADD16 operation.
+   UNSPEC_QASX		; Represent the QASX operation.
+   UNSPEC_QSAX		; Represent the QSAX operation.
+   UNSPEC_QSUB16		; Represent the QSUB16 operation.
+   UNSPEC_SHADD16	; Represent the SHADD16 operation.
+   UNSPEC_SHASX		; Represent the SHASX operation.
+   UNSPEC_SHSAX		; Represent the SSAX operation.
+   UNSPEC_SHSUB16	; Represent the SHSUB16 operation.
+   UNSPEC_UHADD16	; Represent the UHADD16 operation.
+   UNSPEC_UHASX		; Represent the UHASX operation.
+   UNSPEC_UHSAX		; Represent the USAX operation.
+   UNSPEC_UHSUB16	; Represent the UHSUB16 operation.
+   UNSPEC_UQADD16	; Represent the UQADD16 operation.
+   UNSPEC_UQASX		; Represent the UQASX operation.
+   UNSPEC_UQSAX		; Represent the UQSAX operation.
+   UNSPEC_UQSUB16	; Represent the UQSUB16 operation.
+   UNSPEC_SMUSD		; Represent the SMUSD operation.
+   UNSPEC_SMUSDX		; Represent the SMUSDX operation.
+   UNSPEC_USAD8		; Represent the USAD8 operation.
+   UNSPEC_USADA8		; Represent the USADA8 operation.
+   UNSPEC_SMLALD		; Represent the SMLALD operation.
+   UNSPEC_SMLALDX	; Represent the SMLALDX operation.
+   UNSPEC_SMLSLD		; Represent the SMLSLD operation.
+   UNSPEC_SMLSLDX	; Represent the SMLSLDX operation.
+   UNSPEC_SMLAWB		; Represent the SMLAWB operation.
+   UNSPEC_SMLAWT		; Represent the SMLAWT operation.
+   UNSPEC_SEL		; Represent the SEL operation.
+   UNSPEC_SADD8		; Represent the SADD8 operation.
+   UNSPEC_SSUB8		; Represent the SSUB8 operation.
+   UNSPEC_UADD8		; Represent the UADD8 operation.
+   UNSPEC_USUB8		; Represent the USUB8 operation.
+   UNSPEC_SADD16		; Represent the SADD16 operation.
+   UNSPEC_SASX		; Represent the SASX operation.
+   UNSPEC_SSAX		; Represent the SSAX operation.
+   UNSPEC_SSUB16		; Represent the SSUB16 operation.
+   UNSPEC_UADD16		; Represent the UADD16 operation.
+   UNSPEC_UASX		; Represent the UASX operation.
+   UNSPEC_USAX		; Represent the USAX operation.
+   UNSPEC_USUB16		; Represent the USUB16 operation.
+   UNSPEC_SMLAD		; Represent the SMLAD operation.
+   UNSPEC_SMLADX		; Represent the SMLADX operation.
+   UNSPEC_SMLSD		; Represent the SMLSD operation.
+   UNSPEC_SMLSDX		; Represent the SMLSDX operation.
+   UNSPEC_SMUAD		; Represent the SMUAD operation.
+   UNSPEC_SMUADX		; Represent the SMUADX operation.
+   UNSPEC_SSAT16		; Represent the SSAT16 operation.
+   UNSPEC_USAT16		; Represent the USAT16 operation.
+   UNSPEC_CDE		; Custom Datapath Extension instruction.
+   UNSPEC_CDEA		; Custom Datapath Extension instruction.
+   UNSPEC_VCDE		; Custom Datapath Extension instruction.
+   UNSPEC_VCDEA		; Custom Datapath Extension instruction.
  ])
  
+ 
  (define_c_enum "unspec" [
    UNSPEC_WADDC		; Used by the intrinsic form of the iWMMXt WADDC instruction.
    UNSPEC_WABS		; Used by the intrinsic form of the iWMMXt WABS instruction.
***************
*** 104,109 ****
--- 174,180 ----
    UNSPEC_TORC		; Used by the intrinsic form of the iWMMXt TORC instruction.
    UNSPEC_TORVSC		; Used by the intrinsic form of the iWMMXt TORVSC instruction.
    UNSPEC_TEXTRC		; Used by the intrinsic form of the iWMMXt TEXTRC instruction.
+   UNSPEC_GET_FPSCR_NZCVQC	; Represent fetch of FPSCR_nzcvqc content.
  ])
  
  
***************
*** 152,157 ****
--- 223,229 ----
    VUNSPEC_STL		; Represent a store-register-release.
    VUNSPEC_GET_FPSCR	; Represent fetch of FPSCR content.
    VUNSPEC_SET_FPSCR	; Represent assign of FPSCR content.
+   VUNSPEC_SET_FPSCR_NZCVQC	; Represent assign of FPSCR_nzcvqc content.
    VUNSPEC_PROBE_STACK_RANGE ; Represent stack range probing.
    VUNSPEC_CDP		; Represent the coprocessor cdp instruction.
    VUNSPEC_CDP2		; Represent the coprocessor cdp2 instruction.
***************
*** 172,177 ****
--- 244,258 ----
    VUNSPEC_MRRC		; Represent the coprocessor mrrc instruction.
    VUNSPEC_MRRC2		; Represent the coprocessor mrrc2 instruction.
    VUNSPEC_SPECULATION_BARRIER ; Represents an unconditional speculation barrier.
+   VUNSPEC_APSR_WRITE     ; Represent writing the APSR.
+   VUNSPEC_VSTR_VLDR	; Represent the vstr/vldr instruction.
+   VUNSPEC_CLRM_APSR	; Represent the clearing of APSR with clrm instruction.
+   VUNSPEC_VSCCLRM_VPR	; Represent the clearing of VPR with vscclrm
+ 			; instruction.
+   VUNSPEC_VLSTM		; Represent the lazy store multiple with vlstm
+ 			; instruction.
+   VUNSPEC_VLLDM		; Represent the lazy load multiple with vlldm
+ 			; instruction.
  ])
  
  ;; Enumerators for NEON unspecs.
***************
*** 200,205 ****
--- 281,288 ----
    UNSPEC_SHA256SU1
    UNSPEC_VMULLP64
    UNSPEC_LOAD_COUNT
+   UNSPEC_VABAL_S
+   UNSPEC_VABAL_U
    UNSPEC_VABD_F
    UNSPEC_VABD_S
    UNSPEC_VABD_U
***************
*** 416,421 ****
--- 499,506 ----
    UNSPEC_VRNDX
    UNSPEC_DOT_S
    UNSPEC_DOT_U
+   UNSPEC_DOT_US
+   UNSPEC_DOT_SU
    UNSPEC_VFML_LO
    UNSPEC_VFML_HI
    UNSPEC_VCADD90
***************
*** 424,427 ****
--- 509,520 ----
    UNSPEC_VCMLA90
    UNSPEC_VCMLA180
    UNSPEC_VCMLA270
+   UNSPEC_MATMUL_S
+   UNSPEC_MATMUL_U
+   UNSPEC_MATMUL_US
+   UNSPEC_BFCVT
+   UNSPEC_BFCVT_HIGH
+   UNSPEC_BFMMLA
+   UNSPEC_BFMAB
+   UNSPEC_BFMAT
  ])
diff -Nrcpad gcc-9.3.0/gcc/config/arm/vec-common.md gcc-10.1.0/gcc/config/arm/vec-common.md
*** gcc-9.3.0/gcc/config/arm/vec-common.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/vec-common.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine Description for shared bits common to IWMMXT and Neon.
! ;; Copyright (C) 2006-2019 Free Software Foundation, Inc.
  ;; Written by CodeSourcery.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Machine Description for shared bits common to IWMMXT and Neon.
! ;; Copyright (C) 2006-2020 Free Software Foundation, Inc.
  ;; Written by CodeSourcery.
  ;;
  ;; This file is part of GCC.
***************
*** 21,31 ****
  ;; Vector Moves
  
  (define_expand "mov<mode>"
!   [(set (match_operand:VALL 0 "nonimmediate_operand" "")
! 	(match_operand:VALL 1 "general_operand" ""))]
    "TARGET_NEON
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
  {
    if (can_create_pseudo_p ())
      {
        if (!REG_P (operands[0]))
--- 21,56 ----
  ;; Vector Moves
  
  (define_expand "mov<mode>"
!   [(set (match_operand:VNIM1 0 "nonimmediate_operand")
! 	(match_operand:VNIM1 1 "general_operand"))]
!   "TARGET_NEON
!    || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))
!    || (TARGET_HAVE_MVE && VALID_MVE_SI_MODE (<MODE>mode))
!    || (TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE (<MODE>mode))"
!    {
!   gcc_checking_assert (aligned_operand (operands[0], <MODE>mode));
!   gcc_checking_assert (aligned_operand (operands[1], <MODE>mode));
!   if (can_create_pseudo_p ())
!     {
!       if (!REG_P (operands[0]))
! 	operands[1] = force_reg (<MODE>mode, operands[1]);
!       else if ((TARGET_NEON || TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT)
! 	       && (CONSTANT_P (operands[1])))
! 	{
! 	  operands[1] = neon_make_constant (operands[1]);
! 	  gcc_assert (operands[1] != NULL_RTX);
! 	}
!     }
! })
! 
! (define_expand "mov<mode>"
!   [(set (match_operand:VNINOTM1 0 "nonimmediate_operand")
! 	(match_operand:VNINOTM1 1 "general_operand"))]
    "TARGET_NEON
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
  {
+   gcc_checking_assert (aligned_operand (operands[0], <MODE>mode));
+   gcc_checking_assert (aligned_operand (operands[1], <MODE>mode));
    if (can_create_pseudo_p ())
      {
        if (!REG_P (operands[0]))
***************
*** 38,60 ****
      }
  })
  
! ;; Vector arithmetic. Expanders are blank, then unnamed insns implement
! ;; patterns separately for IWMMXT and Neon.
  
  (define_expand "add<mode>3"
!   [(set (match_operand:VALL 0 "s_register_operand" "")
!         (plus:VALL (match_operand:VALL 1 "s_register_operand" "")
!                    (match_operand:VALL 2 "s_register_operand" "")))]
    "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
  		    || flag_unsafe_math_optimizations))
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
  {
  })
  
  (define_expand "sub<mode>3"
!   [(set (match_operand:VALL 0 "s_register_operand" "")
!         (minus:VALL (match_operand:VALL 1 "s_register_operand" "")
!                     (match_operand:VALL 2 "s_register_operand" "")))]
    "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
  		    || flag_unsafe_math_optimizations))
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
--- 63,131 ----
      }
  })
  
! (define_expand "movv8hf"
!   [(set (match_operand:V8HF 0 "s_register_operand")
!        (match_operand:V8HF 1 "s_register_operand"))]
!    "TARGET_NEON || TARGET_HAVE_MVE_FLOAT"
! {
!   gcc_checking_assert (aligned_operand (operands[0], E_V8HFmode));
!   gcc_checking_assert (aligned_operand (operands[1], E_V8HFmode));
!    if (can_create_pseudo_p ())
!      {
!        if (!REG_P (operands[0]))
! 	 operands[1] = force_reg (E_V8HFmode, operands[1]);
!      }
! })
! 
! ;; Vector arithmetic.  Expanders are blank, then unnamed insns implement
! ;; patterns separately for Neon, IWMMXT and MVE.
  
  (define_expand "add<mode>3"
!   [(set (match_operand:VNIM 0 "s_register_operand")
! 	(plus:VNIM (match_operand:VNIM 1 "s_register_operand")
! 		   (match_operand:VNIM 2 "s_register_operand")))]
!   "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
! 		    || flag_unsafe_math_optimizations))
!    || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))
!    || (TARGET_HAVE_MVE && VALID_MVE_SI_MODE(<MODE>mode))
!    || (TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE(<MODE>mode))"
! {
! })
! 
! ;; Vector arithmetic.  Expanders are blank, then unnamed insns implement
! ;; patterns separately for Neon and MVE.
! 
! (define_expand "addv8hf3"
!   [(set (match_operand:V8HF 0 "s_register_operand")
! 	(plus:V8HF (match_operand:V8HF 1 "s_register_operand")
! 		   (match_operand:V8HF 2 "s_register_operand")))]
!   "(TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE(V8HFmode))
!    || (TARGET_NEON_FP16INST && flag_unsafe_math_optimizations)"
! {
!   if (TARGET_NEON_FP16INST && flag_unsafe_math_optimizations)
!     emit_insn (gen_addv8hf3_neon (operands[0], operands[1], operands[2]));
! })
! 
! ;; Vector arithmetic.  Expanders are blank, then unnamed insns implement
! ;; patterns separately for Neon and IWMMXT.
! 
! (define_expand "add<mode>3"
!   [(set (match_operand:VNINOTM 0 "s_register_operand")
! 	(plus:VNINOTM (match_operand:VNINOTM 1 "s_register_operand")
! 		      (match_operand:VNINOTM 2 "s_register_operand")))]
    "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
  		    || flag_unsafe_math_optimizations))
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
  {
  })
  
+ ;; Vector arithmetic. Expanders are blank, then unnamed insns implement
+ ;; patterns separately for IWMMXT and Neon.
+ 
  (define_expand "sub<mode>3"
!   [(set (match_operand:VALL 0 "s_register_operand")
!         (minus:VALL (match_operand:VALL 1 "s_register_operand")
!                     (match_operand:VALL 2 "s_register_operand")))]
    "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
  		    || flag_unsafe_math_optimizations))
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
***************
*** 62,70 ****
  })
  
  (define_expand "mul<mode>3"
!   [(set (match_operand:VALLW 0 "s_register_operand" "")
!         (mult:VALLW (match_operand:VALLW 1 "s_register_operand" "")
! 		    (match_operand:VALLW 2 "s_register_operand" "")))]
    "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
  		    || flag_unsafe_math_optimizations))
     || (<MODE>mode == V4HImode && TARGET_REALLY_IWMMXT)"
--- 133,141 ----
  })
  
  (define_expand "mul<mode>3"
!   [(set (match_operand:VALLW 0 "s_register_operand")
!         (mult:VALLW (match_operand:VALLW 1 "s_register_operand")
! 		    (match_operand:VALLW 2 "s_register_operand")))]
    "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
  		    || flag_unsafe_math_optimizations))
     || (<MODE>mode == V4HImode && TARGET_REALLY_IWMMXT)"
***************
*** 72,80 ****
  })
  
  (define_expand "smin<mode>3"
!   [(set (match_operand:VALLW 0 "s_register_operand" "")
! 	(smin:VALLW (match_operand:VALLW 1 "s_register_operand" "")
! 		    (match_operand:VALLW 2 "s_register_operand" "")))]
    "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
  		    || flag_unsafe_math_optimizations))
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
--- 143,151 ----
  })
  
  (define_expand "smin<mode>3"
!   [(set (match_operand:VALLW 0 "s_register_operand")
! 	(smin:VALLW (match_operand:VALLW 1 "s_register_operand")
! 		    (match_operand:VALLW 2 "s_register_operand")))]
    "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
  		    || flag_unsafe_math_optimizations))
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
***************
*** 82,99 ****
  })
  
  (define_expand "umin<mode>3"
!   [(set (match_operand:VINTW 0 "s_register_operand" "")
! 	(umin:VINTW (match_operand:VINTW 1 "s_register_operand" "")
! 		    (match_operand:VINTW 2 "s_register_operand" "")))]
    "TARGET_NEON
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
  {
  })
  
  (define_expand "smax<mode>3"
!   [(set (match_operand:VALLW 0 "s_register_operand" "")
! 	(smax:VALLW (match_operand:VALLW 1 "s_register_operand" "")
! 		    (match_operand:VALLW 2 "s_register_operand" "")))]
    "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
  		    || flag_unsafe_math_optimizations))
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
--- 153,170 ----
  })
  
  (define_expand "umin<mode>3"
!   [(set (match_operand:VINTW 0 "s_register_operand")
! 	(umin:VINTW (match_operand:VINTW 1 "s_register_operand")
! 		    (match_operand:VINTW 2 "s_register_operand")))]
    "TARGET_NEON
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
  {
  })
  
  (define_expand "smax<mode>3"
!   [(set (match_operand:VALLW 0 "s_register_operand")
! 	(smax:VALLW (match_operand:VALLW 1 "s_register_operand")
! 		    (match_operand:VALLW 2 "s_register_operand")))]
    "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
  		    || flag_unsafe_math_optimizations))
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
***************
*** 101,121 ****
  })
  
  (define_expand "umax<mode>3"
!   [(set (match_operand:VINTW 0 "s_register_operand" "")
! 	(umax:VINTW (match_operand:VINTW 1 "s_register_operand" "")
! 		    (match_operand:VINTW 2 "s_register_operand" "")))]
    "TARGET_NEON
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
  {
  })
  
  (define_expand "vec_perm<mode>"
!   [(match_operand:VE 0 "s_register_operand" "")
!    (match_operand:VE 1 "s_register_operand" "")
!    (match_operand:VE 2 "s_register_operand" "")
!    (match_operand:VE 3 "s_register_operand" "")]
    "TARGET_NEON && !BYTES_BIG_ENDIAN"
  {
    arm_expand_vec_perm (operands[0], operands[1], operands[2], operands[3]);
    DONE;
  })
--- 172,225 ----
  })
  
  (define_expand "umax<mode>3"
!   [(set (match_operand:VINTW 0 "s_register_operand")
! 	(umax:VINTW (match_operand:VINTW 1 "s_register_operand")
! 		    (match_operand:VINTW 2 "s_register_operand")))]
    "TARGET_NEON
     || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
  {
  })
  
  (define_expand "vec_perm<mode>"
!   [(match_operand:VE 0 "s_register_operand")
!    (match_operand:VE 1 "s_register_operand")
!    (match_operand:VE 2 "s_register_operand")
!    (match_operand:VE 3 "s_register_operand")]
    "TARGET_NEON && !BYTES_BIG_ENDIAN"
  {
    arm_expand_vec_perm (operands[0], operands[1], operands[2], operands[3]);
    DONE;
  })
+ 
+ (define_expand "vec_extract<mode><V_elem_l>"
+  [(match_operand:<V_elem> 0 "nonimmediate_operand")
+   (match_operand:VQX_NOBF 1 "s_register_operand")
+   (match_operand:SI 2 "immediate_operand")]
+  "TARGET_NEON || TARGET_HAVE_MVE"
+ {
+   if (TARGET_NEON)
+     emit_insn (gen_neon_vec_extract<mode><V_elem_l> (operands[0], operands[1],
+ 						     operands[2]));
+   else if (TARGET_HAVE_MVE)
+     emit_insn (gen_mve_vec_extract<mode><V_elem_l> (operands[0], operands[1],
+ 						     operands[2]));
+   else
+     gcc_unreachable ();
+   DONE;
+ })
+ 
+ (define_expand "vec_set<mode>"
+   [(match_operand:VQX_NOBF 0 "s_register_operand" "")
+    (match_operand:<V_elem> 1 "s_register_operand" "")
+    (match_operand:SI 2 "immediate_operand" "")]
+   "TARGET_NEON || TARGET_HAVE_MVE"
+ {
+   HOST_WIDE_INT elem = HOST_WIDE_INT_1 << INTVAL (operands[2]);
+   if (TARGET_NEON)
+     emit_insn (gen_vec_set<mode>_internal (operands[0], operands[1],
+ 					   GEN_INT (elem), operands[0]));
+   else
+     emit_insn (gen_mve_vec_set<mode>_internal (operands[0], operands[1],
+ 					       GEN_INT (elem), operands[0]));
+   DONE;
+ })
diff -Nrcpad gcc-9.3.0/gcc/config/arm/vfp.md gcc-10.1.0/gcc/config/arm/vfp.md
*** gcc-9.3.0/gcc/config/arm/vfp.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/vfp.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM VFP instruction patterns
! ;; Copyright (C) 2003-2019 Free Software Foundation, Inc.
  ;; Written by CodeSourcery.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM VFP instruction patterns
! ;; Copyright (C) 2003-2020 Free Software Foundation, Inc.
  ;; Written by CodeSourcery.
  ;;
  ;; This file is part of GCC.
***************
*** 74,83 ****
  (define_insn "*thumb2_movhi_vfp"
   [(set
     (match_operand:HI 0 "nonimmediate_operand"
!     "=rk, r, l, r, m, r, *t, r, *t")
     (match_operand:HI 1 "general_operand"
!     "rk, I, Py, n, r, m, r, *t, *t"))]
!  "TARGET_THUMB2 && TARGET_HARD_FLOAT
    && !TARGET_VFP_FP16INST
    && (register_operand (operands[0], HImode)
         || register_operand (operands[1], HImode))"
--- 74,83 ----
  (define_insn "*thumb2_movhi_vfp"
   [(set
     (match_operand:HI 0 "nonimmediate_operand"
!     "=rk, r, l, r, m, r, *t, r, *t, Up, r")
     (match_operand:HI 1 "general_operand"
!     "rk, I, Py, n, r, m, r, *t, *t, r, Up"))]
!  "TARGET_THUMB2 && TARGET_VFP_BASE
    && !TARGET_VFP_FP16INST
    && (register_operand (operands[0], HImode)
         || register_operand (operands[1], HImode))"
***************
*** 99,118 ****
        return "vmov%?\t%0, %1\t%@ int";
      case 8:
        return "vmov%?.f32\t%0, %1\t%@ int";
      default:
        gcc_unreachable ();
      }
  }
   [(set_attr "predicable" "yes")
    (set_attr "predicable_short_it"
!    "yes, no, yes, no, no, no, no, no, no")
    (set_attr "type"
     "mov_reg, mov_imm, mov_imm, mov_imm, store_4, load_4,\
!     f_mcr, f_mrc, fmov")
!   (set_attr "arch" "*, *, *, v6t2, *, *, *, *, *")
!   (set_attr "pool_range" "*, *, *, *, *, 4094, *, *, *")
!   (set_attr "neg_pool_range" "*, *, *, *, *, 250, *, *, *")
!   (set_attr "length" "2, 4, 2, 4, 4, 4, 4, 4, 4")]
  )
  
  ;; Patterns for HI moves which provide more data transfer instructions when FP16
--- 99,122 ----
        return "vmov%?\t%0, %1\t%@ int";
      case 8:
        return "vmov%?.f32\t%0, %1\t%@ int";
+     case 9:
+       return "vmsr%?\t P0, %1\t@ movhi";
+     case 10:
+       return "vmrs%?\t %0, P0\t@ movhi";
      default:
        gcc_unreachable ();
      }
  }
   [(set_attr "predicable" "yes")
    (set_attr "predicable_short_it"
!    "yes, no, yes, no, no, no, no, no, no, no, no")
    (set_attr "type"
     "mov_reg, mov_imm, mov_imm, mov_imm, store_4, load_4,\
!     f_mcr, f_mrc, fmov, mve_move, mve_move")
!   (set_attr "arch" "*, *, *, v6t2, *, *, *, *, *, mve, mve")
!   (set_attr "pool_range" "*, *, *, *, *, 4094, *, *, *, *, *")
!   (set_attr "neg_pool_range" "*, *, *, *, *, 250, *, *, *, *, *")
!   (set_attr "length" "2, 4, 2, 4, 4, 4, 4, 4, 4, 4, 4")]
  )
  
  ;; Patterns for HI moves which provide more data transfer instructions when FP16
***************
*** 170,179 ****
  (define_insn "*thumb2_movhi_fp16"
   [(set
     (match_operand:HI 0 "nonimmediate_operand"
!     "=rk, r, l, r, m, r, *t, r, *t")
     (match_operand:HI 1 "general_operand"
!     "rk, I, Py, n, r, m, r, *t, *t"))]
!  "TARGET_THUMB2 && TARGET_VFP_FP16INST
    && (register_operand (operands[0], HImode)
         || register_operand (operands[1], HImode))"
  {
--- 174,183 ----
  (define_insn "*thumb2_movhi_fp16"
   [(set
     (match_operand:HI 0 "nonimmediate_operand"
!     "=rk, r, l, r, m, r, *t, r, *t, Up, r")
     (match_operand:HI 1 "general_operand"
!     "rk, I, Py, n, r, m, r, *t, *t, r, Up"))]
!  "TARGET_THUMB2 && (TARGET_VFP_FP16INST || TARGET_HAVE_MVE)
    && (register_operand (operands[0], HImode)
         || register_operand (operands[1], HImode))"
  {
***************
*** 194,214 ****
        return "vmov.f16\t%0, %1\t%@ int";
      case 8:
        return "vmov%?.f32\t%0, %1\t%@ int";
      default:
        gcc_unreachable ();
      }
  }
   [(set_attr "predicable"
!    "yes, yes, yes, yes, yes, yes, no, no, yes")
    (set_attr "predicable_short_it"
!    "yes, no, yes, no, no, no, no, no, no")
    (set_attr "type"
     "mov_reg, mov_imm, mov_imm, mov_imm, store_4, load_4,\
!     f_mcr, f_mrc, fmov")
!   (set_attr "arch" "*, *, *, v6t2, *, *, *, *, *")
!   (set_attr "pool_range" "*, *, *, *, *, 4094, *, *, *")
!   (set_attr "neg_pool_range" "*, *, *, *, *, 250, *, *, *")
!   (set_attr "length" "2, 4, 2, 4, 4, 4, 4, 4, 4")]
  )
  
  ;; SImode moves
--- 198,222 ----
        return "vmov.f16\t%0, %1\t%@ int";
      case 8:
        return "vmov%?.f32\t%0, %1\t%@ int";
+     case 9:
+       return "vmsr%?\t P0, %1\t%@ movhi";
+     case 10:
+       return "vmrs%?\t%0, P0\t%@ movhi";
      default:
        gcc_unreachable ();
      }
  }
   [(set_attr "predicable"
!    "yes, yes, yes, yes, yes, yes, no, no, yes, yes, yes")
    (set_attr "predicable_short_it"
!    "yes, no, yes, no, no, no, no, no, no, no, no")
    (set_attr "type"
     "mov_reg, mov_imm, mov_imm, mov_imm, store_4, load_4,\
!     f_mcr, f_mrc, fmov, mve_move, mve_move")
!   (set_attr "arch" "*, *, *, v6t2, *, *, *, *, *, mve, mve")
!   (set_attr "pool_range" "*, *, *, *, *, 4094, *, *, *, *, *")
!   (set_attr "neg_pool_range" "*, *, *, *, *, 250, *, *, *, *, *")
!   (set_attr "length" "2, 4, 2, 4, 4, 4, 4, 4, 4, 4, 4")]
  )
  
  ;; SImode moves
***************
*** 258,266 ****
  ;; is chosen with length 2 when the instruction is predicated for
  ;; arm_restrict_it.
  (define_insn "*thumb2_movsi_vfp"
!   [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,l,r,r, l,*hk,m, *m,*t, r,*t,*t,  *Uv")
! 	(match_operand:SI 1 "general_operand"	   "rk,I,Py,K,j,mi,*mi,l,*hk, r,*t,*t,*UvTu,*t"))]
!   "TARGET_THUMB2 && TARGET_HARD_FLOAT
     && (   s_register_operand (operands[0], SImode)
         || s_register_operand (operands[1], SImode))"
    "*
--- 266,276 ----
  ;; is chosen with length 2 when the instruction is predicated for
  ;; arm_restrict_it.
  (define_insn "*thumb2_movsi_vfp"
!   [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,l,r,r,l,*hk,m,*m,*t,\
! 						    r,*t,*t,*Uv, Up, r,Uf,r")
! 	(match_operand:SI 1 "general_operand" "rk,I,Py,K,j,mi,*mi,l,*hk,r,*t,\
! 					       *t,*UvTu,*t, r, Up,r,Uf"))]
!   "TARGET_THUMB2 && TARGET_VFP_BASE
     && (   s_register_operand (operands[0], SImode)
         || s_register_operand (operands[1], SImode))"
    "*
***************
*** 291,306 ****
        return \"vmov%?.f32\\t%0, %1\\t%@ int\";
      case 12: case 13:
        return output_move_vfp (operands);
      default:
        gcc_unreachable ();
      }
    "
    [(set_attr "predicable" "yes")
!    (set_attr "predicable_short_it" "yes,no,yes,no,no,no,no,no,no,no,no,no,no,no")
!    (set_attr "type" "mov_reg,mov_reg,mov_reg,mvn_reg,mov_imm,load_4,load_4,store_4,store_4,f_mcr,f_mrc,fmov,f_loads,f_stores")
!    (set_attr "length" "2,4,2,4,4,4,4,4,4,4,4,4,4,4")
!    (set_attr "pool_range"     "*,*,*,*,*,1018,4094,*,*,*,*,*,1018,*")
!    (set_attr "neg_pool_range" "*,*,*,*,*,   0,   0,*,*,*,*,*,1008,*")]
  )
  
  
--- 301,328 ----
        return \"vmov%?.f32\\t%0, %1\\t%@ int\";
      case 12: case 13:
        return output_move_vfp (operands);
+     case 14:
+       return \"vmsr\\t P0, %1\";
+     case 15:
+       return \"vmrs\\t %0, P0\";
+     case 16:
+       return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\";
+     case 17:
+       return \"mrc\\tp10, 7, %0, cr1, cr0, 0\\t @GET_FPSCR\";
      default:
        gcc_unreachable ();
      }
    "
    [(set_attr "predicable" "yes")
!    (set_attr "predicable_short_it" "yes,no,yes,no,no,no,no,no,no,no,no,no,no,\
! 	      no,no,no,no,no")
!    (set_attr "type" "mov_reg,mov_reg,mov_reg,mvn_reg,mov_imm,load_4,load_4,\
! 	     store_4,store_4,f_mcr,f_mrc,fmov,f_loads,f_stores,mve_move,\
! 	     mve_move,mrs,mrs")
!    (set_attr "length" "2,4,2,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4")
!    (set_attr "pool_range"     "*,*,*,*,*,1018,4094,*,*,*,*,*,1018,*,*,*,*,*")
!    (set_attr "arch" "*,*,*,*,*,*,*,*,*,*,*,*,*,*,mve,mve,mve,mve")
!    (set_attr "neg_pool_range" "*,*,*,*,*,   0,   0,*,*,*,*,*,1008,*,*,*,*,*")]
  )
  
  
***************
*** 308,319 ****
  
  (define_insn "*movdi_vfp"
    [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,r,r,m,w,!r,w,w, Uv")
! 	(match_operand:DI 1 "di_operand"	      "r,rDa,Db,Dc,mi,mi,r,r,w,w,UvTu,w"))]
!   "TARGET_32BIT && TARGET_HARD_FLOAT
     && (   register_operand (operands[0], DImode)
         || register_operand (operands[1], DImode))
!    && !(TARGET_NEON && CONST_INT_P (operands[1])
!         && neon_immediate_valid_for_move (operands[1], DImode, NULL, NULL))"
    "*
    switch (which_alternative)
      {
--- 330,341 ----
  
  (define_insn "*movdi_vfp"
    [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,r,r,m,w,!r,w,w, Uv")
! 	(match_operand:DI 1 "di_operand"       "r,rDa,Db,Dc,mi,mi,r,r,w,w,UvTu,w"))]
!   "TARGET_32BIT && TARGET_VFP_BASE
     && (   register_operand (operands[0], DImode)
         || register_operand (operands[1], DImode))
!    && !((TARGET_NEON || TARGET_HAVE_MVE) && CONST_INT_P (operands[1])
!        && simd_immediate_valid_for_move (operands[1], DImode, NULL, NULL))"
    "*
    switch (which_alternative)
      {
***************
*** 335,341 ****
      case 8:
        return \"vmov%?\\t%Q0, %R0, %P1\\t%@ int\";
      case 9:
!       if (TARGET_VFP_SINGLE)
  	return \"vmov%?.f32\\t%0, %1\\t%@ int\;vmov%?.f32\\t%p0, %p1\\t%@ int\";
        else
  	return \"vmov%?.f64\\t%P0, %P1\\t%@ int\";
--- 357,363 ----
      case 8:
        return \"vmov%?\\t%Q0, %R0, %P1\\t%@ int\";
      case 9:
!       if (TARGET_VFP_SINGLE || TARGET_HAVE_MVE)
  	return \"vmov%?.f32\\t%0, %1\\t%@ int\;vmov%?.f32\\t%p0, %p1\\t%@ int\";
        else
  	return \"vmov%?.f64\\t%P0, %P1\\t%@ int\";
***************
*** 365,407 ****
     (set_attr "arch"           "t2,any,any,any,a,t2,any,any,any,any,any,any")]
  )
  
! ;; HFmode moves
  
! (define_insn "*movhf_vfp_fp16"
!   [(set (match_operand:HF 0 "nonimmediate_operand"
! 			  "= r,m,t,r,t,r,t,t,Um,r")
! 	(match_operand:HF 1 "general_operand"
! 			  "  m,r,t,r,r,t,Dv,Um,t,F"))]
    "TARGET_32BIT
     && TARGET_VFP_FP16INST
!    && (s_register_operand (operands[0], HFmode)
!        || s_register_operand (operands[1], HFmode))"
   {
    switch (which_alternative)
      {
      case 0: /* ARM register from memory.  */
!       return \"ldrh%?\\t%0, %1\\t%@ __fp16\";
      case 1: /* Memory from ARM register.  */
!       return \"strh%?\\t%1, %0\\t%@ __fp16\";
      case 2: /* S register from S register.  */
!       return \"vmov\\t%0, %1\t%@ __fp16\";
      case 3: /* ARM register from ARM register.  */
!       return \"mov%?\\t%0, %1\\t%@ __fp16\";
      case 4: /* S register from ARM register.  */
      case 5: /* ARM register from S register.  */
      case 6: /* S register from immediate.  */
!       return \"vmov.f16\\t%0, %1\t%@ __fp16\";
      case 7: /* S register from memory.  */
!       return \"vld1.16\\t{%z0}, %A1\";
      case 8: /* Memory from S register.  */
!       return \"vst1.16\\t{%z1}, %A0\";
      case 9: /* ARM register from constant.  */
        {
  	long bits;
  	rtx ops[4];
  
  	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
! 			       HFmode);
  	ops[0] = operands[0];
  	ops[1] = GEN_INT (bits);
  	ops[2] = GEN_INT (bits & 0xff00);
--- 387,435 ----
     (set_attr "arch"           "t2,any,any,any,a,t2,any,any,any,any,any,any")]
  )
  
! ;; HFmode and BFmode moves
  
! (define_insn "*mov<mode>_vfp_<mode>16"
!   [(set (match_operand:HFBF 0 "nonimmediate_operand"
! 			  "= ?r,?m,t,r,t,r,t, t, Um,r")
! 	(match_operand:HFBF 1 "general_operand"
! 			  "  m,r,t,r,r,t,Dv,Um,t, F"))]
    "TARGET_32BIT
     && TARGET_VFP_FP16INST
!    && (s_register_operand (operands[0], <MODE>mode)
!        || s_register_operand (operands[1], <MODE>mode))"
   {
    switch (which_alternative)
      {
      case 0: /* ARM register from memory.  */
!       return \"ldrh%?\\t%0, %1\\t%@ __<fporbf>\";
      case 1: /* Memory from ARM register.  */
!       return \"strh%?\\t%1, %0\\t%@ __<fporbf>\";
      case 2: /* S register from S register.  */
!       return \"vmov\\t%0, %1\t%@ __<fporbf>\";
      case 3: /* ARM register from ARM register.  */
!       return \"mov%?\\t%0, %1\\t%@ __<fporbf>\";
      case 4: /* S register from ARM register.  */
      case 5: /* ARM register from S register.  */
      case 6: /* S register from immediate.  */
!       return \"vmov.f16\\t%0, %1\t%@ __<fporbf>\";
      case 7: /* S register from memory.  */
!       if (TARGET_HAVE_MVE)
! 	return \"vldr.16\\t%0, %A1\";
!       else
! 	return \"vld1.16\\t{%z0}, %A1\";
      case 8: /* Memory from S register.  */
!       if (TARGET_HAVE_MVE)
! 	return \"vstr.16\\t%1, %A0\";
!       else
! 	return \"vst1.16\\t{%z1}, %A0\";
      case 9: /* ARM register from constant.  */
        {
  	long bits;
  	rtx ops[4];
  
  	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
! 			       <MODE>mode);
  	ops[0] = operands[0];
  	ops[1] = GEN_INT (bits);
  	ops[2] = GEN_INT (bits & 0xff00);
***************
*** 444,457 ****
        (const_int 8))])]
  )
  
! (define_insn "*movhf_vfp_neon"
!   [(set (match_operand:HF 0 "nonimmediate_operand" "= t,Um,r,m,t,r,t,r,r")
! 	(match_operand:HF 1 "general_operand"	   " Um, t,m,r,t,r,r,t,F"))]
    "TARGET_32BIT
     && TARGET_HARD_FLOAT && TARGET_NEON_FP16
     && !TARGET_VFP_FP16INST
!    && (   s_register_operand (operands[0], HFmode)
!        || s_register_operand (operands[1], HFmode))"
    "*
    switch (which_alternative)
      {
--- 472,485 ----
        (const_int 8))])]
  )
  
! (define_insn "*mov<mode>_vfp_neon"
!   [(set (match_operand:HFBF 0 "nonimmediate_operand" "= t,Um,?r,?m,t,r,t,r,r")
! 	(match_operand:HFBF 1 "general_operand"	     " Um, t, m, r,t,r,r,t,F"))]
    "TARGET_32BIT
     && TARGET_HARD_FLOAT && TARGET_NEON_FP16
     && !TARGET_VFP_FP16INST
!    && (   s_register_operand (operands[0], <MODE>mode)
!        || s_register_operand (operands[1], <MODE>mode))"
    "*
    switch (which_alternative)
      {
***************
*** 460,472 ****
      case 1:     /* memory from S register */
        return \"vst1.16\\t{%z1}, %A0\";
      case 2:     /* ARM register from memory */
!       return \"ldrh\\t%0, %1\\t%@ __fp16\";
      case 3:     /* memory from ARM register */
!       return \"strh\\t%1, %0\\t%@ __fp16\";
      case 4:	/* S register from S register */
        return \"vmov.f32\\t%0, %1\";
      case 5:	/* ARM register from ARM register */
!       return \"mov\\t%0, %1\\t%@ __fp16\";
      case 6:	/* S register from ARM register */
        return \"vmov\\t%0, %1\";
      case 7:	/* ARM register from S register */
--- 488,500 ----
      case 1:     /* memory from S register */
        return \"vst1.16\\t{%z1}, %A0\";
      case 2:     /* ARM register from memory */
!       return \"ldrh\\t%0, %1\\t%@ __<fporbf>\";
      case 3:     /* memory from ARM register */
!       return \"strh\\t%1, %0\\t%@ __<fporbf>\";
      case 4:	/* S register from S register */
        return \"vmov.f32\\t%0, %1\";
      case 5:	/* ARM register from ARM register */
!       return \"mov\\t%0, %1\\t%@ __<fporbf>\";
      case 6:	/* S register from ARM register */
        return \"vmov\\t%0, %1\";
      case 7:	/* ARM register from S register */
***************
*** 477,483 ****
  	rtx ops[4];
  
  	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
! 			       HFmode);
  	ops[0] = operands[0];
  	ops[1] = GEN_INT (bits);
  	ops[2] = GEN_INT (bits & 0xff00);
--- 505,511 ----
  	rtx ops[4];
  
  	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
! 			       <MODE>mode);
  	ops[0] = operands[0];
  	ops[1] = GEN_INT (bits);
  	ops[2] = GEN_INT (bits & 0xff00);
***************
*** 500,525 ****
  )
  
  ;; FP16 without element load/store instructions.
! (define_insn "*movhf_vfp"
!   [(set (match_operand:HF 0 "nonimmediate_operand" "=r,m,t,r,t,r,r")
! 	(match_operand:HF 1 "general_operand"	   " m,r,t,r,r,t,F"))]
    "TARGET_32BIT
     && TARGET_HARD_FLOAT
     && !TARGET_NEON_FP16
     && !TARGET_VFP_FP16INST
!    && (   s_register_operand (operands[0], HFmode)
!        || s_register_operand (operands[1], HFmode))"
    "*
    switch (which_alternative)
      {
      case 0:     /* ARM register from memory */
!       return \"ldrh\\t%0, %1\\t%@ __fp16\";
      case 1:     /* memory from ARM register */
!       return \"strh\\t%1, %0\\t%@ __fp16\";
      case 2:	/* S register from S register */
        return \"vmov.f32\\t%0, %1\";
      case 3:	/* ARM register from ARM register */
!       return \"mov\\t%0, %1\\t%@ __fp16\";
      case 4:	/* S register from ARM register */
        return \"vmov\\t%0, %1\";
      case 5:	/* ARM register from S register */
--- 528,553 ----
  )
  
  ;; FP16 without element load/store instructions.
! (define_insn "*mov<mode>_vfp"
!   [(set (match_operand:HFBF 0 "nonimmediate_operand" "=r,m,t,r,t,r,r")
! 	(match_operand:HFBF 1 "general_operand"	   " m,r,t,r,r,t,F"))]
    "TARGET_32BIT
     && TARGET_HARD_FLOAT
     && !TARGET_NEON_FP16
     && !TARGET_VFP_FP16INST
!    && (   s_register_operand (operands[0], <MODE>mode)
!        || s_register_operand (operands[1], <MODE>mode))"
    "*
    switch (which_alternative)
      {
      case 0:     /* ARM register from memory */
!       return \"ldrh\\t%0, %1\\t%@ __<fporbf>\";
      case 1:     /* memory from ARM register */
!       return \"strh\\t%1, %0\\t%@ __<fporbf>\";
      case 2:	/* S register from S register */
        return \"vmov.f32\\t%0, %1\";
      case 3:	/* ARM register from ARM register */
!       return \"mov\\t%0, %1\\t%@ __<fporbf>\";
      case 4:	/* S register from ARM register */
        return \"vmov\\t%0, %1\";
      case 5:	/* ARM register from S register */
***************
*** 530,536 ****
  	rtx ops[4];
  
  	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
! 			       HFmode);
  	ops[0] = operands[0];
  	ops[1] = GEN_INT (bits);
  	ops[2] = GEN_INT (bits & 0xff00);
--- 558,564 ----
  	rtx ops[4];
  
  	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
! 			       <MODE>mode);
  	ops[0] = operands[0];
  	ops[1] = GEN_INT (bits);
  	ops[2] = GEN_INT (bits & 0xff00);
***************
*** 595,601 ****
  (define_insn "*thumb2_movsf_vfp"
    [(set (match_operand:SF 0 "nonimmediate_operand" "=t,?r,t, t  ,Uv,r ,m,t,r")
  	(match_operand:SF 1 "hard_sf_operand"	   " ?r,t,Dv,UvHa,t, mHa,r,t,r"))]
!   "TARGET_THUMB2 && TARGET_HARD_FLOAT
     && (   s_register_operand (operands[0], SFmode)
         || s_register_operand (operands[1], SFmode))"
    "*
--- 623,629 ----
  (define_insn "*thumb2_movsf_vfp"
    [(set (match_operand:SF 0 "nonimmediate_operand" "=t,?r,t, t  ,Uv,r ,m,t,r")
  	(match_operand:SF 1 "hard_sf_operand"	   " ?r,t,Dv,UvHa,t, mHa,r,t,r"))]
!   "TARGET_THUMB2 && TARGET_VFP_BASE
     && (   s_register_operand (operands[0], SFmode)
         || s_register_operand (operands[1], SFmode))"
    "*
***************
*** 684,690 ****
  (define_insn "*thumb2_movdf_vfp"
    [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,w,w  ,Uv,r ,m,w,r")
  	(match_operand:DF 1 "hard_df_operand"		   " ?r,w,Dy,G,UvHa,w, mHa,r, w,r"))]
!   "TARGET_THUMB2 && TARGET_HARD_FLOAT
     && (   register_operand (operands[0], DFmode)
         || register_operand (operands[1], DFmode))"
    "*
--- 712,718 ----
  (define_insn "*thumb2_movdf_vfp"
    [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,w,w  ,Uv,r ,m,w,r")
  	(match_operand:DF 1 "hard_df_operand"		   " ?r,w,Dy,G,UvHa,w, mHa,r, w,r"))]
!   "TARGET_THUMB2 && TARGET_VFP_BASE
     && (   register_operand (operands[0], DFmode)
         || register_operand (operands[1], DFmode))"
    "*
***************
*** 762,768 ****
  	    [(match_operand 4 "cc_register" "") (const_int 0)])
  	  (match_operand:SF 1 "s_register_operand" "0,t,t,0,?r,?r,0,t,t")
  	  (match_operand:SF 2 "s_register_operand" "t,0,t,?r,0,?r,t,0,t")))]
!   "TARGET_THUMB2 && TARGET_HARD_FLOAT && !arm_restrict_it"
    "@
     it\\t%D3\;vmov%D3.f32\\t%0, %2
     it\\t%d3\;vmov%d3.f32\\t%0, %1
--- 790,796 ----
  	    [(match_operand 4 "cc_register" "") (const_int 0)])
  	  (match_operand:SF 1 "s_register_operand" "0,t,t,0,?r,?r,0,t,t")
  	  (match_operand:SF 2 "s_register_operand" "t,0,t,?r,0,?r,t,0,t")))]
!   "TARGET_THUMB2 && TARGET_VFP_BASE && !arm_restrict_it"
    "@
     it\\t%D3\;vmov%D3.f32\\t%0, %2
     it\\t%d3\;vmov%d3.f32\\t%0, %1
***************
*** 808,814 ****
  	    [(match_operand 4 "cc_register" "") (const_int 0)])
  	  (match_operand:DF 1 "s_register_operand" "0,w,w,0,?r,?r,0,w,w")
  	  (match_operand:DF 2 "s_register_operand" "w,0,w,?r,0,?r,w,0,w")))]
!   "TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE && !arm_restrict_it"
    "@
     it\\t%D3\;vmov%D3.f64\\t%P0, %P2
     it\\t%d3\;vmov%d3.f64\\t%P0, %P1
--- 836,843 ----
  	    [(match_operand 4 "cc_register" "") (const_int 0)])
  	  (match_operand:DF 1 "s_register_operand" "0,w,w,0,?r,?r,0,w,w")
  	  (match_operand:DF 2 "s_register_operand" "w,0,w,?r,0,?r,w,0,w")))]
!   "TARGET_THUMB2 && TARGET_VFP_BASE && TARGET_VFP_DOUBLE
!    && !arm_restrict_it"
    "@
     it\\t%D3\;vmov%D3.f64\\t%P0, %P2
     it\\t%d3\;vmov%d3.f64\\t%P0, %P1
***************
*** 1323,1329 ****
          (fma:SDF (match_operand:SDF 1 "register_operand" "<F_constraint>")
  		 (match_operand:SDF 2 "register_operand" "<F_constraint>")
  		 (match_operand:SDF 3 "register_operand" "0")))]
!   "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA"
    "vfma%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "ffma<vfp_type>")]
--- 1352,1358 ----
          (fma:SDF (match_operand:SDF 1 "register_operand" "<F_constraint>")
  		 (match_operand:SDF 2 "register_operand" "<F_constraint>")
  		 (match_operand:SDF 3 "register_operand" "0")))]
!   "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA <vfp_double_cond>"
    "vfma%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "ffma<vfp_type>")]
***************
*** 1359,1365 ****
  					     "<F_constraint>"))
  		 (match_operand:SDF 2 "register_operand" "<F_constraint>")
  		 (match_operand:SDF 3 "register_operand" "0")))]
!   "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA"
    "vfms%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "ffma<vfp_type>")]
--- 1388,1394 ----
  					     "<F_constraint>"))
  		 (match_operand:SDF 2 "register_operand" "<F_constraint>")
  		 (match_operand:SDF 3 "register_operand" "0")))]
!   "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA <vfp_double_cond>"
    "vfms%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "ffma<vfp_type>")]
***************
*** 1381,1387 ****
  	(fma:SDF (match_operand:SDF 1 "register_operand" "<F_constraint>")
  		 (match_operand:SDF 2 "register_operand" "<F_constraint>")
  		 (neg:SDF (match_operand:SDF 3 "register_operand" "0"))))]
!   "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA"
    "vfnms%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "ffma<vfp_type>")]
--- 1410,1416 ----
  	(fma:SDF (match_operand:SDF 1 "register_operand" "<F_constraint>")
  		 (match_operand:SDF 2 "register_operand" "<F_constraint>")
  		 (neg:SDF (match_operand:SDF 3 "register_operand" "0"))))]
!   "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA <vfp_double_cond>"
    "vfnms%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "ffma<vfp_type>")]
***************
*** 1404,1410 ****
  					       "<F_constraint>"))
  		 (match_operand:SDF 2 "register_operand" "<F_constraint>")
  		 (neg:SDF (match_operand:SDF 3 "register_operand" "0"))))]
!   "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA"
    "vfnma%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "ffma<vfp_type>")]
--- 1433,1439 ----
  					       "<F_constraint>"))
  		 (match_operand:SDF 2 "register_operand" "<F_constraint>")
  		 (neg:SDF (match_operand:SDF 3 "register_operand" "0"))))]
!   "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA <vfp_double_cond>"
    "vfnma%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
    [(set_attr "predicable" "yes")
     (set_attr "type" "ffma<vfp_type>")]
***************
*** 1601,1606 ****
--- 1630,1732 ----
     (set_attr "type" "f_flag")]
  )
  
+ (define_insn "push_fpsysreg_insn"
+   [(set (mem:SI (post_dec:SI (match_operand:SI 0 "s_register_operand" "+&rk")))
+    (unspec_volatile:SI [(match_operand:SI 1 "const_int_operand" "n")]
+ 		       VUNSPEC_VSTR_VLDR))]
+   "TARGET_HAVE_FPCXT_CMSE && use_cmse"
+   {
+     static char buf[32];
+     int fp_sysreg_enum = INTVAL (operands[1]);
+ 
+     gcc_assert (IN_RANGE (fp_sysreg_enum, 0, NB_FP_SYSREGS - 1));
+ 
+     snprintf (buf, sizeof (buf), \"vstr%%?\\t%s, [%%0, #-4]!\",
+ 	      fp_sysreg_names[fp_sysreg_enum]);
+     return buf;
+   }
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "store_4")]
+ )
+ 
+ (define_insn "pop_fpsysreg_insn"
+   [(set (mem:SI (post_inc:SI (match_operand:SI 0 "s_register_operand" "+&rk")))
+    (unspec_volatile:SI [(match_operand:SI 1 "const_int_operand" "n")]
+ 		       VUNSPEC_VSTR_VLDR))]
+   "TARGET_HAVE_FPCXT_CMSE && use_cmse"
+   {
+     static char buf[32];
+     int fp_sysreg_enum = INTVAL (operands[1]);
+ 
+     gcc_assert (IN_RANGE (fp_sysreg_enum, 0, NB_FP_SYSREGS - 1));
+ 
+     snprintf (buf, sizeof (buf), \"vldr%%?\\t%s, [%%0], #4\",
+ 	      fp_sysreg_names[fp_sysreg_enum]);
+     return buf;
+   }
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "load_4")]
+ )
+ 
+ ;; The operands are validated through the clear_multiple_operation
+ ;; match_parallel predicate rather than through constraints so enable it only
+ ;; after reload.
+ (define_insn "*clear_vfp_multiple"
+   [(match_parallel 0 "clear_vfp_multiple_operation"
+      [(unspec_volatile [(const_int 0)]
+ 		       VUNSPEC_VSCCLRM_VPR)])]
+   "TARGET_HAVE_FPCXT_CMSE && use_cmse && reload_completed"
+   {
+     int num_regs = XVECLEN (operands[0], 0);
+     char pattern[30];
+     rtx reg;
+ 
+     strcpy (pattern, \"vscclrm%?\\t{%|\");
+     if (num_regs > 1)
+       {
+ 	reg = XEXP (XVECEXP (operands[0], 0, 1), 0);
+ 	strcat (pattern, reg_names[REGNO (reg)]);
+ 	if (num_regs > 2)
+ 	  {
+ 	    strcat (pattern, \"-%|\");
+ 	    reg = XEXP (XVECEXP (operands[0], 0, num_regs - 1), 0);
+ 	    strcat (pattern, reg_names[REGNO (reg)]);
+ 	  }
+ 	strcat (pattern, \", \");
+       }
+ 
+     strcat (pattern, \"VPR}\");
+     output_asm_insn (pattern, operands);
+     return \"\";
+   }
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "mov_reg")]
+ )
+ 
+ (define_insn "lazy_store_multiple_insn"
+   [(set (match_operand:SI 0 "s_register_operand" "+&rk")
+ 	(post_dec:SI (match_dup 0)))
+    (unspec_volatile [(const_int 0)
+ 		     (mem:SI (post_dec:SI (match_dup 0)))]
+ 		    VUNSPEC_VLSTM)]
+   "use_cmse && reload_completed"
+   "vlstm%?\\t%0"
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "store_4")]
+ )
+ 
+ (define_insn "lazy_load_multiple_insn"
+   [(set (match_operand:SI 0 "s_register_operand" "+&rk")
+ 	(post_inc:SI (match_dup 0)))
+    (unspec_volatile:SI [(const_int 0)
+ 			(mem:SI (match_dup 0))]
+ 		       VUNSPEC_VLLDM)]
+   "use_cmse && reload_completed"
+   "vlldm%?\\t%0"
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "load_4")]
+ )
+ 
  (define_insn_and_split "*cmpsf_split_vfp"
    [(set (reg:CCFP CC_REGNUM)
  	(compare:CCFP (match_operand:SF 0 "s_register_operand"  "t")
***************
*** 1882,1888 ****
      [(set (match_operand:BLK 0 "memory_operand" "=m")
  	  (unspec:BLK [(match_operand:DF 1 "vfp_register_operand" "")]
  		      UNSPEC_PUSH_MULT))])]
!   "TARGET_32BIT && TARGET_HARD_FLOAT"
    "* return vfp_output_vstmd (operands);"
    [(set_attr "type" "f_stored")]
  )
--- 2008,2014 ----
      [(set (match_operand:BLK 0 "memory_operand" "=m")
  	  (unspec:BLK [(match_operand:DF 1 "vfp_register_operand" "")]
  		      UNSPEC_PUSH_MULT))])]
!   "TARGET_32BIT && TARGET_VFP_BASE"
    "* return vfp_output_vstmd (operands);"
    [(set_attr "type" "f_stored")]
  )
***************
*** 1970,1985 ****
  
  ;; Write Floating-point Status and Control Register.
  (define_insn "set_fpscr"
!   [(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] VUNSPEC_SET_FPSCR)]
!   "TARGET_HARD_FLOAT"
    "mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR"
    [(set_attr "type" "mrs")])
  
  ;; Read Floating-point Status and Control Register.
  (define_insn "get_fpscr"
    [(set (match_operand:SI 0 "register_operand" "=r")
!         (unspec_volatile:SI [(const_int 0)] VUNSPEC_GET_FPSCR))]
!   "TARGET_HARD_FLOAT"
    "mrc\\tp10, 7, %0, cr1, cr0, 0\\t @GET_FPSCR"
    [(set_attr "type" "mrs")])
  
--- 2096,2112 ----
  
  ;; Write Floating-point Status and Control Register.
  (define_insn "set_fpscr"
!   [(unspec_volatile [(match_operand:SI 0 "register_operand" "r")]
!     VUNSPEC_SET_FPSCR)]
!   "TARGET_VFP_BASE"
    "mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR"
    [(set_attr "type" "mrs")])
  
  ;; Read Floating-point Status and Control Register.
  (define_insn "get_fpscr"
    [(set (match_operand:SI 0 "register_operand" "=r")
!     (unspec_volatile:SI [(const_int 0)] VUNSPEC_GET_FPSCR))]
!   "TARGET_VFP_BASE"
    "mrc\\tp10, 7, %0, cr1, cr0, 0\\t @GET_FPSCR"
    [(set_attr "type" "mrs")])
  
***************
*** 2038,2040 ****
--- 2165,2238 ----
    DONE;
  }
  )
+ 
+ ;; CDE instructions using FPU/MVE S/D registers
+ 
+ (define_insn "arm_vcx1<mode>"
+   [(set (match_operand:SIDI 0 "register_operand" "=t")
+ 	(unspec:SIDI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 		      (match_operand:SI 2 "const_int_vcde1_operand" "i")]
+ 	 UNSPEC_VCDE))]
+   "TARGET_CDE && (TARGET_ARM_FP || TARGET_HAVE_MVE)"
+   "vcx1\\tp%c1, %<V_reg>0, #%c2"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_vcx1a<mode>"
+   [(set (match_operand:SIDI 0 "register_operand" "=t")
+ 	(unspec:SIDI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 		      (match_operand:SIDI 2 "register_operand" "0")
+ 		      (match_operand:SI 3 "const_int_vcde1_operand" "i")]
+ 	 UNSPEC_VCDEA))]
+   "TARGET_CDE && (TARGET_ARM_FP || TARGET_HAVE_MVE)"
+   "vcx1a\\tp%c1, %<V_reg>0, #%c3"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_vcx2<mode>"
+   [(set (match_operand:SIDI 0 "register_operand" "=t")
+ 	(unspec:SIDI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 		      (match_operand:SIDI 2 "register_operand" "t")
+ 		      (match_operand:SI 3 "const_int_vcde2_operand" "i")]
+ 	 UNSPEC_VCDE))]
+   "TARGET_CDE && (TARGET_ARM_FP || TARGET_HAVE_MVE)"
+   "vcx2\\tp%c1, %<V_reg>0, %<V_reg>2, #%c3"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_vcx2a<mode>"
+   [(set (match_operand:SIDI 0 "register_operand" "=t")
+ 	(unspec:SIDI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 		      (match_operand:SIDI 2 "register_operand" "0")
+ 		      (match_operand:SIDI 3 "register_operand" "t")
+ 		      (match_operand:SI 4 "const_int_vcde2_operand" "i")]
+ 	 UNSPEC_VCDEA))]
+   "TARGET_CDE && (TARGET_ARM_FP || TARGET_HAVE_MVE)"
+   "vcx2a\\tp%c1, %<V_reg>0, %<V_reg>3, #%c4"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_vcx3<mode>"
+   [(set (match_operand:SIDI 0 "register_operand" "=t")
+ 	(unspec:SIDI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 		      (match_operand:SIDI 2 "register_operand" "t")
+ 		      (match_operand:SIDI 3 "register_operand" "t")
+ 		      (match_operand:SI 4 "const_int_vcde3_operand" "i")]
+ 	 UNSPEC_VCDE))]
+   "TARGET_CDE && (TARGET_ARM_FP || TARGET_HAVE_MVE)"
+   "vcx3\\tp%c1, %<V_reg>0, %<V_reg>2, %<V_reg>3, #%c4"
+   [(set_attr "type" "coproc")]
+ )
+ 
+ (define_insn "arm_vcx3a<mode>"
+   [(set (match_operand:SIDI 0 "register_operand" "=t")
+ 	(unspec:SIDI [(match_operand:SI 1 "const_int_coproc_operand" "i")
+ 		      (match_operand:SIDI 2 "register_operand" "0")
+ 		      (match_operand:SIDI 3 "register_operand" "t")
+ 		      (match_operand:SIDI 4 "register_operand" "t")
+ 		      (match_operand:SI 5 "const_int_vcde3_operand" "i")]
+ 	 UNSPEC_VCDEA))]
+   "TARGET_CDE && (TARGET_ARM_FP || TARGET_HAVE_MVE)"
+   "vcx3a\\tp%c1, %<V_reg>0, %<V_reg>3, %<V_reg>4, #%c5"
+   [(set_attr "type" "coproc")]
+ )
diff -Nrcpad gcc-9.3.0/gcc/config/arm/vfp11.md gcc-10.1.0/gcc/config/arm/vfp11.md
*** gcc-9.3.0/gcc/config/arm/vfp11.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/vfp11.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; ARM VFP11 pipeline description
! ;; Copyright (C) 2003-2019 Free Software Foundation, Inc.
  ;; Written by CodeSourcery.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; ARM VFP11 pipeline description
! ;; Copyright (C) 2003-2020 Free Software Foundation, Inc.
  ;; Written by CodeSourcery.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/arm/vxworks.h gcc-10.1.0/gcc/config/arm/vxworks.h
*** gcc-9.3.0/gcc/config/arm/vxworks.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/vxworks.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for GCC,
     for ARM with targeting the VXWorks run time environment. 
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
  
     Contributed by: Mike Stump <mrs@wrs.com>
     Brought up to date by CodeSourcery, LLC.
--- 1,6 ----
  /* Definitions of target machine for GCC,
     for ARM with targeting the VXWorks run time environment. 
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
  
     Contributed by: Mike Stump <mrs@wrs.com>
     Brought up to date by CodeSourcery, LLC.
*************** see the files COPYING3 and COPYING.RUNTI
*** 35,76 ****
  #endif
  
  #undef TARGET_OS_CPP_BUILTINS
! #define TARGET_OS_CPP_BUILTINS()		\
!   do {						\
!     if (TARGET_BIG_END)				\
!       builtin_define ("ARMEB");			\
!     else					\
!       builtin_define ("ARMEL");			\
! 						\
!     if (arm_arch_xscale)			\
!       builtin_define ("CPU=XSCALE");		\
!     else if (arm_arch7)				\
!       {						\
! 	if (!arm_arch_notm)			\
! 	  builtin_define ("CPU=ARMARCH7M");	\
! 	else if (TARGET_THUMB)			\
! 	  builtin_define ("CPU=ARMARCH7_T2");	\
! 	else					\
! 	  builtin_define ("CPU=ARMARCH7");	\
!       }						\
!     else if (arm_arch6)				\
!       {						\
! 	if (TARGET_THUMB)			\
! 	  builtin_define ("CPU=ARMARCH6_T");	\
! 	else					\
! 	  builtin_define ("CPU=ARMARCH6");	\
!       }						\
      else if (arm_arch5t)				\
! 	builtin_define ("CPU=ARMARCH5_T");	\
!     else if (arm_arch4)				\
!       {						\
! 	if (TARGET_THUMB)			\
! 	  builtin_define ("CPU=ARMARCH4_T");	\
! 	else					\
! 	  builtin_define ("CPU=ARMARCH4");	\
!       }						\
!     VXWORKS_OS_CPP_BUILTINS ();			\
!     MAYBE_TARGET_BPABI_CPP_BUILTINS ();		\
    } while (0)
  
  #undef SUBTARGET_OVERRIDE_OPTIONS
--- 35,78 ----
  #endif
  
  #undef TARGET_OS_CPP_BUILTINS
! #define TARGET_OS_CPP_BUILTINS()			\
!   do {							\
!     if (TARGET_BIG_END)					\
!       builtin_define ("ARMEB");				\
!     else						\
!       builtin_define ("ARMEL");				\
! 							\
!     if (arm_arch_xscale)				\
!       builtin_define ("_VX_CPU=XSCALE");		\
!     if (arm_arch8)					\
!       builtin_define ("_VX_CPU=ARMARCH8A");		\
!     else if (arm_arch7)					\
!       {							\
! 	if (!arm_arch_notm)				\
! 	  builtin_define ("_VX_CPU=ARMARCH7M");		\
! 	else if (TARGET_THUMB)				\
! 	  builtin_define ("_VX_CPU=ARMARCH7_T2");	\
! 	else						\
! 	  builtin_define ("_VX_CPU=ARMARCH7");		\
!       }							\
!     else if (arm_arch6)					\
!       {							\
! 	if (TARGET_THUMB)				\
! 	  builtin_define ("_VX_CPU=ARMARCH6_T");	\
! 	else						\
! 	  builtin_define ("_VX_CPU=ARMARCH6");		\
!       }							\
      else if (arm_arch5t)				\
! 	builtin_define ("_VX_CPU=ARMARCH5_T");		\
!     else if (arm_arch4)					\
!       {							\
! 	if (TARGET_THUMB)				\
! 	  builtin_define ("_VX_CPU=ARMARCH4_T");	\
! 	else						\
! 	  builtin_define ("_VX_CPU=ARMARCH4");		\
!       }							\
!     VXWORKS_OS_CPP_BUILTINS ();				\
!     MAYBE_TARGET_BPABI_CPP_BUILTINS ();			\
    } while (0)
  
  #undef SUBTARGET_OVERRIDE_OPTIONS
*************** see the files COPYING3 and COPYING.RUNTI
*** 82,96 ****
  
  /* .text.hot and .text.unlikely sections are badly handled by the
     VxWorks kernel mode loader for ARM style exceptions.  */
- 
- #if ARM_UNWIND_INFO
- #define EXTRA_CC1_SPEC "%{!mrtp:-fno-reorder-functions}"
- #else
- #define EXTRA_CC1_SPEC
- #endif
- 
  #undef  CC1_SPEC
! #define CC1_SPEC "" EXTRA_CC1_SPEC
  
  /* Translate an explicit -mbig-endian as an explicit -EB to assembler
     and linker, and pass abi options matching the target expectations
--- 84,91 ----
  
  /* .text.hot and .text.unlikely sections are badly handled by the
     VxWorks kernel mode loader for ARM style exceptions.  */
  #undef  CC1_SPEC
! #define CC1_SPEC VXWORKS_CC1_SPEC " %{!mrtp:-fno-reorder-functions}"
  
  /* Translate an explicit -mbig-endian as an explicit -EB to assembler
     and linker, and pass abi options matching the target expectations
*************** see the files COPYING3 and COPYING.RUNTI
*** 119,132 ****
  #undef ENDFILE_SPEC
  #define ENDFILE_SPEC VXWORKS_ENDFILE_SPEC
  
- /* For exceptions, pre VX7 uses DWARF2 info, VX7 uses ARM unwinding.  */
- #undef  DWARF2_UNWIND_INFO
- #define DWARF2_UNWIND_INFO (!TARGET_VXWORKS7)
- 
- #undef ARM_TARGET2_DWARF_FORMAT
- #define ARM_TARGET2_DWARF_FORMAT \
-   (TARGET_VXWORKS_RTP ? (DW_EH_PE_pcrel | DW_EH_PE_indirect) : DW_EH_PE_absptr)
- 
  /* There is no default multilib.  */
  #undef MULTILIB_DEFAULTS
  
--- 114,119 ----
*************** see the files COPYING3 and COPYING.RUNTI
*** 158,160 ****
--- 145,156 ----
  
  /* Unless overridded by the target options, the default is little-endian.  */
  #define TARGET_ENDIAN_DEFAULT 0
+ 
+ /* The VxWorks environment on ARM is llvm based and we need to link
+    against libllvm.a to resolve __aeabi_memcpy4.  */
+ 
+ #undef VXWORKS_PERSONALITY
+ #define VXWORKS_PERSONALITY "llvm"
+ 
+ #undef VXWORKS_EXTRA_LIBS_RTP
+ #define VXWORKS_EXTRA_LIBS_RTP "-lllvm"
diff -Nrcpad gcc-9.3.0/gcc/config/arm/vxworks.opt gcc-10.1.0/gcc/config/arm/vxworks.opt
*** gcc-9.3.0/gcc/config/arm/vxworks.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/vxworks.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; ARM VxWorks options.
  
! ; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; ARM VxWorks options.
  
! ; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/arm/xgene1.md gcc-10.1.0/gcc/config/arm/xgene1.md
*** gcc-9.3.0/gcc/config/arm/xgene1.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/arm/xgene1.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description for AppliedMicro xgene1 core.
! ;; Copyright (C) 2012-2019 Free Software Foundation, Inc.
  ;; Contributed by Theobroma Systems Design und Consulting GmbH.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Machine description for AppliedMicro xgene1 core.
! ;; Copyright (C) 2012-2020 Free Software Foundation, Inc.
  ;; Contributed by Theobroma Systems Design und Consulting GmbH.
  ;;
  ;; This file is part of GCC.
***************
*** 64,74 ****
         (eq_attr "type" "branch"))
    "xgene1_decode1op")
  
- (define_insn_reservation "xgene1_nop" 1
-   (and (eq_attr "tune" "xgene1")
-        (eq_attr "type" "no_insn"))
-   "xgene1_decode1op")
- 
  (define_insn_reservation "xgene1_call" 1
    (and (eq_attr "tune" "xgene1")
         (eq_attr "type" "call"))
--- 64,69 ----
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr-arch.h gcc-10.1.0/gcc/config/avr/avr-arch.h
*** gcc-9.3.0/gcc/config/avr/avr-arch.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr-arch.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of types that are used to store AVR architecture and
     device information.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay (avr@gjlay.de)
  
  This file is part of GCC.
--- 1,6 ----
  /* Definitions of types that are used to store AVR architecture and
     device information.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay (avr@gjlay.de)
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr-c.c gcc-10.1.0/gcc/config/avr/avr-c.c
*** gcc-9.3.0/gcc/config/avr/avr-c.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr-c.c	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by Anatoly Sokolov (aesok@post.ru)
  
     This file is part of GCC.
--- 1,4 ----
! /* Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by Anatoly Sokolov (aesok@post.ru)
  
     This file is part of GCC.
*************** avr_resolve_overloaded_builtin (unsigned
*** 54,60 ****
    location_t loc = (location_t) iloc;
    vec<tree, va_gc> &args = * (vec<tree, va_gc>*) vargs;
  
!   switch (DECL_FUNCTION_CODE (fndecl))
      {
      default:
        break;
--- 54,60 ----
    location_t loc = (location_t) iloc;
    vec<tree, va_gc> &args = * (vec<tree, va_gc>*) vargs;
  
!   switch (DECL_MD_FUNCTION_CODE (fndecl))
      {
      default:
        break;
*************** avr_cpu_cpp_builtins (struct cpp_reader
*** 390,395 ****
--- 390,474 ----
    cpp_define (pfile, "__WITH_AVRLIBC__");
  #endif /* WITH_AVRLIBC */
  
+   // From configure --with-libf7={|libgcc|math|math-symbols|yes|no}
+ 
+ #ifdef WITH_LIBF7_LIBGCC
+   cpp_define (pfile, "__WITH_LIBF7_LIBGCC__");
+ #endif /* WITH_LIBF7_LIBGCC */
+ 
+ #ifdef WITH_LIBF7_MATH
+   cpp_define (pfile, "__WITH_LIBF7_MATH__");
+ #endif /* WITH_LIBF7_MATH */
+ 
+ #ifdef WITH_LIBF7_MATH_SYMBOLS
+   cpp_define (pfile, "__WITH_LIBF7_MATH_SYMBOLS__");
+ #endif /* WITH_LIBF7_MATH_SYMBOLS */
+ 
+   // From configure --with-double={|32|32,64|64,32|64}
+ 
+ #ifdef HAVE_DOUBLE_MULTILIB
+   cpp_define (pfile, "__HAVE_DOUBLE_MULTILIB__");
+ #endif
+ 
+ #ifdef HAVE_DOUBLE64
+   cpp_define (pfile, "__HAVE_DOUBLE64__");
+ #endif
+ 
+ #ifdef HAVE_DOUBLE32
+   cpp_define (pfile, "__HAVE_DOUBLE32__");
+ #endif
+ 
+ #if defined (WITH_DOUBLE64)
+   cpp_define (pfile, "__DEFAULT_DOUBLE__=64");
+ #elif defined (WITH_DOUBLE32)
+   cpp_define (pfile, "__DEFAULT_DOUBLE__=32");
+ #else
+ #error "align this with config.gcc"
+ #endif
+ 
+   // From configure --with-long-double={|32|32,64|64,32|64|double}
+ 
+ #ifdef HAVE_LONG_DOUBLE_MULTILIB
+   cpp_define (pfile, "__HAVE_LONG_DOUBLE_MULTILIB__");
+ #endif
+ 
+ #ifdef HAVE_LONG_DOUBLE64
+   cpp_define (pfile, "__HAVE_LONG_DOUBLE64__");
+ #endif
+ 
+ #ifdef HAVE_LONG_DOUBLE32
+   cpp_define (pfile, "__HAVE_LONG_DOUBLE32__");
+ #endif
+ 
+ #ifdef HAVE_LONG_DOUBLE_IS_DOUBLE
+   cpp_define (pfile, "__HAVE_LONG_DOUBLE_IS_DOUBLE__");
+ #endif
+ 
+ #if defined (WITH_LONG_DOUBLE64)
+   cpp_define (pfile, "__DEFAULT_LONG_DOUBLE__=64");
+ #elif defined (WITH_LONG_DOUBLE32)
+   cpp_define (pfile, "__DEFAULT_LONG_DOUBLE__=32");
+ #else
+ #error "align this with config.gcc"
+ #endif
+ 
+   // From configure --with-double-comparison={2|3} --with-libf7.
+ 
+ #if defined (WITH_DOUBLE_COMPARISON)
+ #if WITH_DOUBLE_COMPARISON == 2 || WITH_DOUBLE_COMPARISON == 3
+   /* The number of states a DFmode comparison libcall might take and
+      reflects what avr.c:FLOAT_LIB_COMPARE_RETURNS_BOOL returns for
+      DFmode.  GCC's default is 3-state, but some libraries like LibF7
+      implement true / false (2-state).  */
+   cpp_define_formatted (pfile, "__WITH_DOUBLE_COMPARISON__=%d",
+ 			WITH_DOUBLE_COMPARISON);
+ #else
+ #error "align this with config.gcc"
+ #endif
+ #else
+ #error "align this with config.gcc"
+ #endif
+ 
    /* Define builtin macros so that the user can easily query whether
       non-generic address spaces (and which) are supported or not.
       This is only supported for C.  For C++, a language extension is needed
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr-devices.c gcc-10.1.0/gcc/config/avr/avr-devices.c
*** gcc-9.3.0/gcc/config/avr/avr-devices.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr-devices.c	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by Anatoly Sokolov (aesok@post.ru)
  
     This file is part of GCC.
--- 1,4 ----
! /* Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by Anatoly Sokolov (aesok@post.ru)
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr-dimode.md gcc-10.1.0/gcc/config/avr/avr-dimode.md
*** gcc-9.3.0/gcc/config/avr/avr-dimode.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr-dimode.md	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ;;   Machine description for GNU compiler,
  ;;   for Atmel AVR micro controllers.
! ;;   Copyright (C) 1998-2019 Free Software Foundation, Inc.
  ;;   Contributed by Georg Lay (avr@gjlay.de)
  ;;
  ;; This file is part of GCC.
--- 1,6 ----
  ;;   Machine description for GNU compiler,
  ;;   for Atmel AVR micro controllers.
! ;;   Copyright (C) 1998-2020 Free Software Foundation, Inc.
  ;;   Contributed by Georg Lay (avr@gjlay.de)
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr-fixed.md gcc-10.1.0/gcc/config/avr/avr-fixed.md
*** gcc-9.3.0/gcc/config/avr/avr-fixed.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr-fixed.md	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ;;   This file contains instructions that support fixed-point operations
  ;;   for Atmel AVR micro controllers.
! ;;   Copyright (C) 2012-2019 Free Software Foundation, Inc.
  ;;
  ;;   Contributed by Sean D'Epagnier  (sean@depagnier.com)
  ;;                  Georg-Johann Lay (avr@gjlay.de)
--- 1,6 ----
  ;;   This file contains instructions that support fixed-point operations
  ;;   for Atmel AVR micro controllers.
! ;;   Copyright (C) 2012-2020 Free Software Foundation, Inc.
  ;;
  ;;   Contributed by Sean D'Epagnier  (sean@depagnier.com)
  ;;                  Georg-Johann Lay (avr@gjlay.de)
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr-log.c gcc-10.1.0/gcc/config/avr/avr-log.c
*** gcc-9.3.0/gcc/config/avr/avr-log.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr-log.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines for log output for Atmel AVR back end.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay (avr@gjlay.de)
  
     This file is part of GCC.
--- 1,5 ----
  /* Subroutines for log output for Atmel AVR back end.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay (avr@gjlay.de)
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr-mcus.def gcc-10.1.0/gcc/config/avr/avr-mcus.def
*** gcc-9.3.0/gcc/config/avr/avr-mcus.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr-mcus.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* AVR MCUs.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* AVR MCUs.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
***************
*** 23,30 ****
  
     This will regenerate / update the following source files:
  
! -  $(srcdir)/config/avr/t-multilib
! -  $(srcdir)/doc/avr-mmcu.texi
  
     After that, rebuild everything and check-in the new sources to the repo.
     The device list below should be kept in sync with AVR-LibC.
--- 23,29 ----
  
     This will regenerate / update the following source files:
  
!    -  $(srcdir)/doc/avr-mmcu.texi
  
     After that, rebuild everything and check-in the new sources to the repo.
     The device list below should be kept in sync with AVR-LibC.
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr-modes.def gcc-10.1.0/gcc/config/avr/avr-modes.def
*** gcc-9.3.0/gcc/config/avr/avr-modes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr-modes.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr-passes.def gcc-10.1.0/gcc/config/avr/avr-passes.def
*** gcc-9.3.0/gcc/config/avr/avr-passes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr-passes.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Description of target passes for AVR.
!    Copyright (C) 2016-2019 Free Software Foundation, Inc. */
  
  /* This file is part of GCC.
  
--- 1,5 ----
  /* Description of target passes for AVR.
!    Copyright (C) 2016-2020 Free Software Foundation, Inc. */
  
  /* This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr-protos.h gcc-10.1.0/gcc/config/avr/avr-protos.h
*** gcc-9.3.0/gcc/config/avr/avr-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Prototypes for exported functions defined in avr.c
     
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
     Contributed by Denis Chertykov (chertykov@gmail.com)
  
     This file is part of GCC.
--- 1,6 ----
  /* Prototypes for exported functions defined in avr.c
     
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
     Contributed by Denis Chertykov (chertykov@gmail.com)
  
     This file is part of GCC.
*************** extern rtx avr_to_int_mode (rtx);
*** 82,88 ****
  
  extern void avr_expand_prologue (void);
  extern void avr_expand_epilogue (bool);
! extern bool avr_emit_movmemhi (rtx*);
  extern int avr_epilogue_uses (int regno);
  
  extern void avr_output_addr_vec (rtx_insn*, rtx);
--- 82,88 ----
  
  extern void avr_expand_prologue (void);
  extern void avr_expand_epilogue (bool);
! extern bool avr_emit_cpymemhi (rtx*);
  extern int avr_epilogue_uses (int regno);
  
  extern void avr_output_addr_vec (rtx_insn*, rtx);
*************** extern const char* avr_out_plus (rtx, rt
*** 92,98 ****
  extern const char* avr_out_round (rtx_insn *, rtx*, int* =NULL);
  extern const char* avr_out_addto_sp (rtx*, int*);
  extern const char* avr_out_xload (rtx_insn *, rtx*, int*);
! extern const char* avr_out_movmem (rtx_insn *, rtx*, int*);
  extern const char* avr_out_insert_bits (rtx*, int*);
  extern bool avr_popcount_each_byte (rtx, int, int);
  extern bool avr_has_nibble_0xf (rtx);
--- 92,98 ----
  extern const char* avr_out_round (rtx_insn *, rtx*, int* =NULL);
  extern const char* avr_out_addto_sp (rtx*, int*);
  extern const char* avr_out_xload (rtx_insn *, rtx*, int*);
! extern const char* avr_out_cpymem (rtx_insn *, rtx*, int*);
  extern const char* avr_out_insert_bits (rtx*, int*);
  extern bool avr_popcount_each_byte (rtx, int, int);
  extern bool avr_has_nibble_0xf (rtx);
*************** extern bool avr_xload_libgcc_p (machine_
*** 128,133 ****
--- 128,135 ----
  extern rtx avr_eval_addr_attrib (rtx x);
  extern bool avr_casei_sequence_check_operands (rtx *xop);
  
+ extern bool avr_float_lib_compare_returns_bool (machine_mode, enum rtx_code);
+ 
  static inline unsigned
  regmask (machine_mode mode, unsigned regno)
  {
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr-stdint.h gcc-10.1.0/gcc/config/avr/avr-stdint.h
*** gcc-9.3.0/gcc/config/avr/avr-stdint.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr-stdint.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for <stdint.h> types on systems using newlib.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for <stdint.h> types on systems using newlib.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr.c gcc-10.1.0/gcc/config/avr/avr.c
*** gcc-9.3.0/gcc/config/avr/avr.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines for insn-output.c for ATMEL AVR micro controllers
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
     Contributed by Denis Chertykov (chertykov@gmail.com)
  
     This file is part of GCC.
--- 1,5 ----
  /* Subroutines for insn-output.c for ATMEL AVR micro controllers
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
     Contributed by Denis Chertykov (chertykov@gmail.com)
  
     This file is part of GCC.
***************
*** 51,57 ****
  #include "expr.h"
  #include "langhooks.h"
  #include "cfgrtl.h"
- #include "params.h"
  #include "builtins.h"
  #include "context.h"
  #include "tree-pass.h"
--- 51,56 ----
*************** avr_option_override (void)
*** 741,755 ****
    if (avr_strict_X)
      flag_caller_saves = 0;
  
-   /* Allow optimizer to introduce store data races. This used to be the
-      default - it was changed because bigger targets did not see any
-      performance decrease. For the AVR though, disallowing data races
-      introduces additional code in LIM and increases reg pressure.  */
- 
-   maybe_set_param_value (PARAM_ALLOW_STORE_DATA_RACES, 1,
-                          global_options.x_param_values,
-                          global_options_set.x_param_values);
- 
    /* Unwind tables currently require a frame pointer for correctness,
       see toplev.c:process_options().  */
  
--- 740,745 ----
*************** avr_option_override (void)
*** 777,782 ****
--- 767,775 ----
    if (!avr_set_core_architecture())
      return;
  
+   /* Sould be set by avr-common.c */
+   gcc_assert (avr_long_double >= avr_double && avr_double >= 32);
+ 
    /* RAM addresses of some SFRs common to all devices in respective arch. */
  
    /* SREG: Status Register containing flags like I (global IRQ) */
*************** avr_regs_to_save (HARD_REG_SET *set)
*** 1183,1191 ****
        if (fixed_regs[reg])
          continue;
  
!       if ((int_or_sig_p && !crtl->is_leaf && call_used_regs[reg])
            || (df_regs_ever_live_p (reg)
!               && (int_or_sig_p || !call_used_regs[reg])
                /* Don't record frame pointer registers here.  They are treated
                   indivitually in prologue.  */
                && !(frame_pointer_needed
--- 1176,1184 ----
        if (fixed_regs[reg])
          continue;
  
!       if ((int_or_sig_p && !crtl->is_leaf && call_used_or_fixed_reg_p (reg))
            || (df_regs_ever_live_p (reg)
!               && (int_or_sig_p || !call_used_or_fixed_reg_p (reg))
                /* Don't record frame pointer registers here.  They are treated
                   indivitually in prologue.  */
                && !(frame_pointer_needed
*************** avr_build_builtin_va_list (void)
*** 1302,1323 ****
  }
  
  
- /* Implement `TARGET_BUILTIN_SETJMP_FRAME_VALUE'.  */
- /* Actual start of frame is virtual_stack_vars_rtx this is offset from
-    frame pointer by +TARGET_STARTING_FRAME_OFFSET.
-    Using saved frame = virtual_stack_vars_rtx - TARGET_STARTING_FRAME_OFFSET
-    avoids creating add/sub of offset in nonlocal goto and setjmp.  */
- 
- static rtx
- avr_builtin_setjmp_frame_value (void)
- {
-   rtx xval = gen_reg_rtx (Pmode);
-   emit_insn (gen_subhi3 (xval, virtual_stack_vars_rtx,
-                          gen_int_mode (avr_starting_frame_offset (), Pmode)));
-   return xval;
- }
- 
- 
  /* Return contents of MEM at frame pointer + stack size + 1 (+2 if 3-byte PC).
     This is return address of function.  */
  
--- 1295,1300 ----
*************** sequent_regs_live (void)
*** 1383,1389 ****
              continue;
          }
  
!       if (!call_used_regs[reg])
          {
            if (df_regs_ever_live_p (reg))
              {
--- 1360,1366 ----
              continue;
          }
  
!       if (!call_used_or_fixed_reg_p (reg))
          {
            if (df_regs_ever_live_p (reg))
              {
*************** avr_num_arg_regs (machine_mode mode, con
*** 3404,3417 ****
     in a register, and which register.  */
  
  static rtx
! avr_function_arg (cumulative_args_t cum_v, machine_mode mode,
!                   const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   int bytes = avr_num_arg_regs (mode, type);
  
    if (cum->nregs && bytes <= cum->nregs)
!     return gen_rtx_REG (mode, cum->regno - bytes);
  
    return NULL_RTX;
  }
--- 3381,3393 ----
     in a register, and which register.  */
  
  static rtx
! avr_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   int bytes = avr_num_arg_regs (arg.mode, arg.type);
  
    if (cum->nregs && bytes <= cum->nregs)
!     return gen_rtx_REG (arg.mode, cum->regno - bytes);
  
    return NULL_RTX;
  }
*************** avr_function_arg (cumulative_args_t cum_
*** 3422,3432 ****
     in the argument list.  */
  
  static void
! avr_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
!                           const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   int bytes = avr_num_arg_regs (mode, type);
  
    cum->nregs -= bytes;
    cum->regno -= bytes;
--- 3398,3408 ----
     in the argument list.  */
  
  static void
! avr_function_arg_advance (cumulative_args_t cum_v,
! 			  const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   int bytes = avr_num_arg_regs (arg.mode, arg.type);
  
    cum->nregs -= bytes;
    cum->regno -= bytes;
*************** avr_function_arg_advance (cumulative_arg
*** 3438,3444 ****
  
    if (cum->regno >= 8
        && cum->nregs >= 0
!       && !call_used_regs[cum->regno])
      {
        /* FIXME: We ship info on failing tail-call in struct machine_function.
           This uses internals of calls.c:expand_call() and the way args_so_far
--- 3414,3420 ----
  
    if (cum->regno >= 8
        && cum->nregs >= 0
!       && !call_used_or_fixed_reg_p (cum->regno))
      {
        /* FIXME: We ship info on failing tail-call in struct machine_function.
           This uses internals of calls.c:expand_call() and the way args_so_far
*************** avr_find_unused_d_reg (rtx_insn *insn, r
*** 3585,3591 ****
            && (TREE_THIS_VOLATILE (current_function_decl)
                || cfun->machine->is_OS_task
                || cfun->machine->is_OS_main
!               || (!isr_p && call_used_regs[regno])))
          {
            return reg;
          }
--- 3561,3567 ----
            && (TREE_THIS_VOLATILE (current_function_decl)
                || cfun->machine->is_OS_task
                || cfun->machine->is_OS_main
!               || (!isr_p && call_used_or_fixed_reg_p (regno))))
          {
            return reg;
          }
*************** avr_adjust_insn_length (rtx_insn *insn,
*** 9421,9427 ****
      case ADJUST_LEN_MOV16: output_movhi (insn, op, &len); break;
      case ADJUST_LEN_MOV24: avr_out_movpsi (insn, op, &len); break;
      case ADJUST_LEN_MOV32: output_movsisf (insn, op, &len); break;
!     case ADJUST_LEN_MOVMEM: avr_out_movmem (insn, op, &len); break;
      case ADJUST_LEN_XLOAD: avr_out_xload (insn, op, &len); break;
      case ADJUST_LEN_SEXT: avr_out_sign_extend (insn, op, &len); break;
  
--- 9397,9403 ----
      case ADJUST_LEN_MOV16: output_movhi (insn, op, &len); break;
      case ADJUST_LEN_MOV24: avr_out_movpsi (insn, op, &len); break;
      case ADJUST_LEN_MOV32: output_movsisf (insn, op, &len); break;
!     case ADJUST_LEN_CPYMEM: avr_out_cpymem (insn, op, &len); break;
      case ADJUST_LEN_XLOAD: avr_out_xload (insn, op, &len); break;
      case ADJUST_LEN_SEXT: avr_out_sign_extend (insn, op, &len); break;
  
*************** _reg_unused_after (rtx_insn *insn, rtx r
*** 9570,9576 ****
  		&& REG_P (XEXP (XEXP (tem, 0), 0))
  		&& reg_overlap_mentioned_p (reg, XEXP (XEXP (tem, 0), 0)))
  	      return 0;
! 	  if (call_used_regs[REGNO (reg)])
  	    return 1;
  	}
  
--- 9546,9552 ----
  		&& REG_P (XEXP (XEXP (tem, 0), 0))
  		&& reg_overlap_mentioned_p (reg, XEXP (XEXP (tem, 0), 0)))
  	      return 0;
! 	  if (call_used_or_fixed_reg_p (REGNO (reg)))
  	    return 1;
  	}
  
*************** avr_asm_output_aligned_decl_common (FILE
*** 10180,10186 ****
        return;
      }
  
!   /* __gnu_lto_v1 etc. are just markers for the linker injected by toplev.c.
       There is no need to trigger __do_clear_bss code for them.  */
  
    if (!STR_PREFIX_P (name, "__gnu_lto"))
--- 10156,10162 ----
        return;
      }
  
!   /* __gnu_lto_slim is just a marker for the linker injected by toplev.c.
       There is no need to trigger __do_clear_bss code for them.  */
  
    if (!STR_PREFIX_P (name, "__gnu_lto"))
*************** avr_hard_regno_mode_ok (unsigned int reg
*** 12182,12189 ****
  /* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED.  */
  
  static bool
! avr_hard_regno_call_part_clobbered (rtx_insn *insn ATTRIBUTE_UNUSED,
! 				    unsigned regno, machine_mode mode)
  {
    /* FIXME: This hook gets called with MODE:REGNO combinations that don't
          represent valid hard registers like, e.g. HI:29.  Returning TRUE
--- 12158,12165 ----
  /* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED.  */
  
  static bool
! avr_hard_regno_call_part_clobbered (unsigned, unsigned regno,
! 				    machine_mode mode)
  {
    /* FIXME: This hook gets called with MODE:REGNO combinations that don't
          represent valid hard registers like, e.g. HI:29.  Returning TRUE
*************** avr_emit3_fix_outputs (rtx (*gen)(rtx,rt
*** 13338,13344 ****
  }
  
  
! /* Worker function for movmemhi expander.
     XOP[0]  Destination as MEM:BLK
     XOP[1]  Source      "     "
     XOP[2]  # Bytes to copy
--- 13314,13320 ----
  }
  
  
! /* Worker function for cpymemhi expander.
     XOP[0]  Destination as MEM:BLK
     XOP[1]  Source      "     "
     XOP[2]  # Bytes to copy
*************** avr_emit3_fix_outputs (rtx (*gen)(rtx,rt
*** 13347,13353 ****
     Return FALSE if the operand compination is not supported.  */
  
  bool
! avr_emit_movmemhi (rtx *xop)
  {
    HOST_WIDE_INT count;
    machine_mode loop_mode;
--- 13323,13329 ----
     Return FALSE if the operand compination is not supported.  */
  
  bool
! avr_emit_cpymemhi (rtx *xop)
  {
    HOST_WIDE_INT count;
    machine_mode loop_mode;
*************** avr_emit_movmemhi (rtx *xop)
*** 13424,13437 ****
           Do the copy-loop inline.  */
  
        rtx (*fun) (rtx, rtx, rtx)
!         = QImode == loop_mode ? gen_movmem_qi : gen_movmem_hi;
  
        insn = fun (xas, loop_reg, loop_reg);
      }
    else
      {
        rtx (*fun) (rtx, rtx)
!         = QImode == loop_mode ? gen_movmemx_qi : gen_movmemx_hi;
  
        emit_move_insn (gen_rtx_REG (QImode, 23), a_hi8);
  
--- 13400,13413 ----
           Do the copy-loop inline.  */
  
        rtx (*fun) (rtx, rtx, rtx)
!         = QImode == loop_mode ? gen_cpymem_qi : gen_cpymem_hi;
  
        insn = fun (xas, loop_reg, loop_reg);
      }
    else
      {
        rtx (*fun) (rtx, rtx)
!         = QImode == loop_mode ? gen_cpymemx_qi : gen_cpymemx_hi;
  
        emit_move_insn (gen_rtx_REG (QImode, 23), a_hi8);
  
*************** avr_emit_movmemhi (rtx *xop)
*** 13445,13451 ****
  }
  
  
! /* Print assembler for movmem_qi, movmem_hi insns...
         $0     : Address Space
         $1, $2 : Loop register
         Z      : Source address
--- 13421,13427 ----
  }
  
  
! /* Print assembler for cpymem_qi, cpymem_hi insns...
         $0     : Address Space
         $1, $2 : Loop register
         Z      : Source address
*************** avr_emit_movmemhi (rtx *xop)
*** 13453,13459 ****
  */
  
  const char*
! avr_out_movmem (rtx_insn *insn ATTRIBUTE_UNUSED, rtx *op, int *plen)
  {
    addr_space_t as = (addr_space_t) INTVAL (op[0]);
    machine_mode loop_mode = GET_MODE (op[1]);
--- 13429,13435 ----
  */
  
  const char*
! avr_out_cpymem (rtx_insn *insn ATTRIBUTE_UNUSED, rtx *op, int *plen)
  {
    addr_space_t as = (addr_space_t) INTVAL (op[0]);
    machine_mode loop_mode = GET_MODE (op[1]);
*************** avr_expand_builtin (tree exp, rtx target
*** 14260,14266 ****
  {
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
    const char *bname = IDENTIFIER_POINTER (DECL_NAME (fndecl));
!   unsigned int id = DECL_FUNCTION_CODE (fndecl);
    const struct avr_builtin_description *d = &avr_bdesc[id];
    tree arg0;
    rtx op0;
--- 14236,14242 ----
  {
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
    const char *bname = IDENTIFIER_POINTER (DECL_NAME (fndecl));
!   unsigned int id = DECL_MD_FUNCTION_CODE (fndecl);
    const struct avr_builtin_description *d = &avr_bdesc[id];
    tree arg0;
    rtx op0;
*************** static tree
*** 14412,14418 ****
  avr_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *arg,
                    bool ignore ATTRIBUTE_UNUSED)
  {
!   unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
    tree val_type = TREE_TYPE (TREE_TYPE (fndecl));
  
    if (!optimize)
--- 14388,14394 ----
  avr_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *arg,
                    bool ignore ATTRIBUTE_UNUSED)
  {
!   unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl);
    tree val_type = TREE_TYPE (TREE_TYPE (fndecl));
  
    if (!optimize)
*************** avr_fold_builtin (tree fndecl, int n_arg
*** 14599,14604 ****
--- 14575,14597 ----
    return NULL_TREE;
  }
  
+ 
+ /* Worker function for `FLOAT_LIB_COMPARE_RETURNS_BOOL'.  */
+ 
+ bool
+ avr_float_lib_compare_returns_bool (machine_mode mode, enum rtx_code)
+ {
+   if (mode == DFmode)
+     {
+ #if WITH_DOUBLE_COMPARISON == 2
+       return true;
+ #endif
+     }
+ 
+   // This is the GCC default and also what AVR-LibC implements.
+   return false;
+ }
+ 
  
  
  /* Initialize the GCC target structure.  */
*************** avr_fold_builtin (tree fndecl, int n_arg
*** 14673,14681 ****
  #undef  TARGET_STRICT_ARGUMENT_NAMING
  #define TARGET_STRICT_ARGUMENT_NAMING hook_bool_CUMULATIVE_ARGS_true
  
- #undef  TARGET_BUILTIN_SETJMP_FRAME_VALUE
- #define TARGET_BUILTIN_SETJMP_FRAME_VALUE avr_builtin_setjmp_frame_value
- 
  #undef TARGET_CONDITIONAL_REGISTER_USAGE
  #define TARGET_CONDITIONAL_REGISTER_USAGE avr_conditional_register_usage
  
--- 14666,14671 ----
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr.h gcc-10.1.0/gcc/config/avr/avr.h
*** gcc-9.3.0/gcc/config/avr/avr.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for GNU compiler,
     for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
     Contributed by Denis Chertykov (chertykov@gmail.com)
  
  This file is part of GCC.
--- 1,6 ----
  /* Definitions of target machine for GNU compiler,
     for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
     Contributed by Denis Chertykov (chertykov@gmail.com)
  
  This file is part of GCC.
*************** FIXME: DRIVER_SELF_SPECS has changed.
*** 107,112 ****
--- 107,115 ----
  #define BYTES_BIG_ENDIAN 0
  #define WORDS_BIG_ENDIAN 0
  
+ #define FLOAT_LIB_COMPARE_RETURNS_BOOL(mode, comparison) \
+   avr_float_lib_compare_returns_bool (mode, comparison)
+ 
  #ifdef IN_LIBGCC2
  /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
  #define UNITS_PER_WORD 4
*************** FIXME: DRIVER_SELF_SPECS has changed.
*** 140,147 ****
  #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
  #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
  #define FLOAT_TYPE_SIZE 32
! #define DOUBLE_TYPE_SIZE 32
! #define LONG_DOUBLE_TYPE_SIZE 32
  #define LONG_LONG_ACCUM_TYPE_SIZE 64
  
  #define DEFAULT_SIGNED_CHAR 1
--- 143,151 ----
  #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
  #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
  #define FLOAT_TYPE_SIZE 32
! #define DOUBLE_TYPE_SIZE (avr_double)
! #define LONG_DOUBLE_TYPE_SIZE (avr_long_double)
! 
  #define LONG_LONG_ACCUM_TYPE_SIZE 64
  
  #define DEFAULT_SIGNED_CHAR 1
*************** typedef struct avr_args
*** 507,514 ****
      (LENGTH = avr_adjust_insn_length (INSN, LENGTH))
  
  extern const char *avr_devicespecs_file (int, const char**);
  
! #define EXTRA_SPEC_FUNCTIONS                                   \
    { "device-specs-file", avr_devicespecs_file },
  
  /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs.
--- 511,520 ----
      (LENGTH = avr_adjust_insn_length (INSN, LENGTH))
  
  extern const char *avr_devicespecs_file (int, const char**);
+ extern const char *avr_double_lib (int, const char**);
  
! #define EXTRA_SPEC_FUNCTIONS                            \
!   { "double-lib", avr_double_lib },                     \
    { "device-specs-file", avr_devicespecs_file },
  
  /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs.
*************** extern const char *avr_devicespecs_file
*** 516,522 ****
     is used to diagnose problems with reading the specs file.  */
  
  #undef  DRIVER_SELF_SPECS
! #define DRIVER_SELF_SPECS                       \
    " %:device-specs-file(device-specs%s %{mmcu=*:%*})"
  
  /* No libstdc++ for now.  Empty string doesn't work.  */
--- 522,529 ----
     is used to diagnose problems with reading the specs file.  */
  
  #undef  DRIVER_SELF_SPECS
! #define DRIVER_SELF_SPECS                               \
!   " %:double-lib(%{m*:m%*})"                            \
    " %:device-specs-file(device-specs%s %{mmcu=*:%*})"
  
  /* No libstdc++ for now.  Empty string doesn't work.  */
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr.md gcc-10.1.0/gcc/config/avr/avr.md
*** gcc-9.3.0/gcc/config/avr/avr.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr.md	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ;;   Machine description for GNU compiler,
  ;;   for ATMEL AVR micro controllers.
! ;;   Copyright (C) 1998-2019 Free Software Foundation, Inc.
  ;;   Contributed by Denis Chertykov (chertykov@gmail.com)
  
  ;; This file is part of GCC.
--- 1,6 ----
  ;;   Machine description for GNU compiler,
  ;;   for ATMEL AVR micro controllers.
! ;;   Copyright (C) 1998-2020 Free Software Foundation, Inc.
  ;;   Contributed by Denis Chertykov (chertykov@gmail.com)
  
  ;; This file is part of GCC.
***************
*** 70,76 ****
  
  (define_c_enum "unspec"
    [UNSPEC_STRLEN
!    UNSPEC_MOVMEM
     UNSPEC_INDEX_JMP
     UNSPEC_FMUL
     UNSPEC_FMULS
--- 70,76 ----
  
  (define_c_enum "unspec"
    [UNSPEC_STRLEN
!    UNSPEC_CPYMEM
     UNSPEC_INDEX_JMP
     UNSPEC_FMUL
     UNSPEC_FMULS
***************
*** 158,164 ****
     tsthi, tstpsi, tstsi, compare, compare64, call,
     mov8, mov16, mov24, mov32, reload_in16, reload_in24, reload_in32,
     ufract, sfract, round,
!    xload, movmem,
     ashlqi, ashrqi, lshrqi,
     ashlhi, ashrhi, lshrhi,
     ashlsi, ashrsi, lshrsi,
--- 158,164 ----
     tsthi, tstpsi, tstsi, compare, compare64, call,
     mov8, mov16, mov24, mov32, reload_in16, reload_in24, reload_in32,
     ufract, sfract, round,
!    xload, cpymem,
     ashlqi, ashrqi, lshrqi,
     ashlhi, ashrhi, lshrhi,
     ashlsi, ashrsi, lshrsi,
***************
*** 344,350 ****
    })
  
  
! ;; Defining nonlocal_goto_receiver means we must also define this.
  ;; even though its function is identical to that in builtins.c
  
  (define_expand "nonlocal_goto"
--- 344,350 ----
    })
  
  
! ;; Defining nonlocal_goto_receiver means we must also define this
  ;; even though its function is identical to that in builtins.c
  
  (define_expand "nonlocal_goto"
***************
*** 399,405 ****
     SI CSI SA USA SQ USQ
     DI CDI DA UDA DQ UDQ
     TA UTA
!    SF SC
     PSI])
  
  (define_expand "push<mode>1"
--- 399,405 ----
     SI CSI SA USA SQ USQ
     DI CDI DA UDA DQ UDQ
     TA UTA
!    SF DF SC DC
     PSI])
  
  (define_expand "push<mode>1"
***************
*** 992,1011 ****
  ;;=========================================================================
  ;; move string (like memcpy)
  
! (define_expand "movmemhi"
    [(parallel [(set (match_operand:BLK 0 "memory_operand" "")
                     (match_operand:BLK 1 "memory_operand" ""))
                (use (match_operand:HI 2 "const_int_operand" ""))
                (use (match_operand:HI 3 "const_int_operand" ""))])]
    ""
    {
!     if (avr_emit_movmemhi (operands))
        DONE;
  
      FAIL;
    })
  
! (define_mode_attr MOVMEM_r_d [(QI "r")
                                (HI "wd")])
  
  ;; $0     : Address Space
--- 992,1011 ----
  ;;=========================================================================
  ;; move string (like memcpy)
  
! (define_expand "cpymemhi"
    [(parallel [(set (match_operand:BLK 0 "memory_operand" "")
                     (match_operand:BLK 1 "memory_operand" ""))
                (use (match_operand:HI 2 "const_int_operand" ""))
                (use (match_operand:HI 3 "const_int_operand" ""))])]
    ""
    {
!     if (avr_emit_cpymemhi (operands))
        DONE;
  
      FAIL;
    })
  
! (define_mode_attr CPYMEM_r_d [(QI "r")
                                (HI "wd")])
  
  ;; $0     : Address Space
***************
*** 1013,1035 ****
  ;; R30    : source address
  ;; R26    : destination address
  
! ;; "movmem_qi"
! ;; "movmem_hi"
! (define_insn "movmem_<mode>"
    [(set (mem:BLK (reg:HI REG_X))
          (mem:BLK (reg:HI REG_Z)))
     (unspec [(match_operand:QI 0 "const_int_operand" "n")]
!            UNSPEC_MOVMEM)
!    (use (match_operand:QIHI 1 "register_operand" "<MOVMEM_r_d>"))
     (clobber (reg:HI REG_X))
     (clobber (reg:HI REG_Z))
     (clobber (reg:QI LPM_REGNO))
     (clobber (match_operand:QIHI 2 "register_operand" "=1"))]
    ""
    {
!     return avr_out_movmem (insn, operands, NULL);
    }
!   [(set_attr "adjust_len" "movmem")
     (set_attr "cc" "clobber")])
  
  
--- 1013,1035 ----
  ;; R30    : source address
  ;; R26    : destination address
  
! ;; "cpymem_qi"
! ;; "cpymem_hi"
! (define_insn "cpymem_<mode>"
    [(set (mem:BLK (reg:HI REG_X))
          (mem:BLK (reg:HI REG_Z)))
     (unspec [(match_operand:QI 0 "const_int_operand" "n")]
!            UNSPEC_CPYMEM)
!    (use (match_operand:QIHI 1 "register_operand" "<CPYMEM_r_d>"))
     (clobber (reg:HI REG_X))
     (clobber (reg:HI REG_Z))
     (clobber (reg:QI LPM_REGNO))
     (clobber (match_operand:QIHI 2 "register_operand" "=1"))]
    ""
    {
!     return avr_out_cpymem (insn, operands, NULL);
    }
!   [(set_attr "adjust_len" "cpymem")
     (set_attr "cc" "clobber")])
  
  
***************
*** 1039,1052 ****
  ;; R23:Z : 24-bit source address
  ;; R26   : 16-bit destination address
  
! ;; "movmemx_qi"
! ;; "movmemx_hi"
! (define_insn "movmemx_<mode>"
    [(set (mem:BLK (reg:HI REG_X))
          (mem:BLK (lo_sum:PSI (reg:QI 23)
                               (reg:HI REG_Z))))
     (unspec [(match_operand:QI 0 "const_int_operand" "n")]
!            UNSPEC_MOVMEM)
     (use (reg:QIHI 24))
     (clobber (reg:HI REG_X))
     (clobber (reg:HI REG_Z))
--- 1039,1052 ----
  ;; R23:Z : 24-bit source address
  ;; R26   : 16-bit destination address
  
! ;; "cpymemx_qi"
! ;; "cpymemx_hi"
! (define_insn "cpymemx_<mode>"
    [(set (mem:BLK (reg:HI REG_X))
          (mem:BLK (lo_sum:PSI (reg:QI 23)
                               (reg:HI REG_Z))))
     (unspec [(match_operand:QI 0 "const_int_operand" "n")]
!            UNSPEC_CPYMEM)
     (use (reg:QIHI 24))
     (clobber (reg:HI REG_X))
     (clobber (reg:HI REG_Z))
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avr.opt gcc-10.1.0/gcc/config/avr/avr.opt
*** gcc-9.3.0/gcc/config/avr/avr.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avr.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the ATMEL AVR port of the compiler.
  
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for the ATMEL AVR port of the compiler.
  
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
*************** mabsdata
*** 115,120 ****
--- 115,128 ----
  Target Report Mask(ABSDATA)
  Assume that all data in static storage can be accessed by LDS / STS.  This option is only useful for reduced Tiny devices.
  
+ mdouble=
+ Target Report Joined RejectNegative Var(avr_double) Init(0) Enum(avr_bits_e)
+ -mdouble=<BITS>	Use <BITS> bits wide double type.
+ 
+ mlong-double=
+ Target Report Joined RejectNegative Var(avr_long_double) Init(0) Enum(avr_bits_e)
+ -mlong-double=<BITS>	Use <BITS> bits wide long double type.
+ 
  nodevicelib
  Driver Target Report RejectNegative
  Do not link against the device-specific library lib<MCU>.a.
*************** Do not link against the device-specific
*** 122,124 ****
--- 130,142 ----
  nodevicespecs
  Driver Target Report RejectNegative
  Do not use the device-specific specs file device-specs/specs-<MCU>.
+ 
+ Enum
+ Name(avr_bits_e) Type(int)
+ Available BITS selections:
+ 
+ EnumValue
+ Enum(avr_bits_e) String(32)  Value(32)
+ 
+ EnumValue
+ Enum(avr_bits_e) String(64) Value(64)
diff -Nrcpad gcc-9.3.0/gcc/config/avr/avrlibc.h gcc-10.1.0/gcc/config/avr/avrlibc.h
*** gcc-9.3.0/gcc/config/avr/avrlibc.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/avrlibc.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for the GNU compiler collection
     for Atmel AVR micro controller if configured for AVR-Libc.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay (avr@gjlay.de)
  
  This file is part of GCC.
--- 1,6 ----
  /* Definitions of target machine for the GNU compiler collection
     for Atmel AVR micro controller if configured for AVR-Libc.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay (avr@gjlay.de)
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/avr/builtins.def gcc-10.1.0/gcc/config/avr/builtins.def
*** gcc-9.3.0/gcc/config/avr/builtins.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/builtins.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/avr/constraints.md gcc-10.1.0/gcc/config/avr/constraints.md
*** gcc-9.3.0/gcc/config/avr/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for ATMEL AVR micro controllers.
! ;; Copyright (C) 2006-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Constraint definitions for ATMEL AVR micro controllers.
! ;; Copyright (C) 2006-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/avr/driver-avr.c gcc-10.1.0/gcc/config/avr/driver-avr.c
*** gcc-9.3.0/gcc/config/avr/driver-avr.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/driver-avr.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines for the gcc driver.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay <avr@gjlay.de>
  
  This file is part of GCC.
--- 1,5 ----
  /* Subroutines for the gcc driver.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay <avr@gjlay.de>
  
  This file is part of GCC.
*************** avr_devicespecs_file (int argc, const ch
*** 103,109 ****
        }
  
    return concat ("%{!nodevicespecs:-specs=device-specs", dir_separator_str,
! 		 "specs-", mmcu, "%s} %<nodevicespecs"
  #if defined (WITH_AVRLIBC)
                   " %{mmcu=avr*:" X_NODEVLIB "} %{!mmcu=*:" X_NODEVLIB "}",
  #else
--- 103,109 ----
        }
  
    return concat ("%{!nodevicespecs:-specs=device-specs", dir_separator_str,
! 				 "specs-", mmcu, "%s} %<nodevicespecs"
  #if defined (WITH_AVRLIBC)
                   " %{mmcu=avr*:" X_NODEVLIB "} %{!mmcu=*:" X_NODEVLIB "}",
  #else
*************** avr_devicespecs_file (int argc, const ch
*** 111,113 ****
--- 111,167 ----
  #endif
                   NULL);
  }
+ 
+ 
+ /* Re-build the -mdouble= and -mlong-double= options.  This is needed
+    because these options are not independent of each other.  */
+ 
+ const char*
+ avr_double_lib (int argc, const char **argv)
+ {
+ #if defined (WITH_DOUBLE64)
+   int dbl = 64;
+ #elif defined (WITH_DOUBLE32)
+   int dbl = 32;
+ #else
+ #error "align this with config.gcc"
+ #endif
+ 
+ #if defined (WITH_LONG_DOUBLE64)
+   int ldb = 64;
+ #elif defined (WITH_LONG_DOUBLE32)
+   int ldb = 32;
+ #else
+ #error "align this with config.gcc"
+ #endif
+ 
+   for (int i = 0; i < argc; i++)
+     {
+       if (strcmp (argv[i], "mdouble=32") == 0)
+         {
+           dbl = 32;
+ #ifdef HAVE_LONG_DOUBLE_IS_DOUBLE
+           ldb = dbl;
+ #endif
+         }
+       else if (strcmp (argv[i], "mdouble=64") == 0)
+         {
+           ldb = dbl = 64;
+         }
+       else if (strcmp (argv[i], "mlong-double=32") == 0)
+         {
+           ldb = dbl = 32;
+         }
+       else if (strcmp (argv[i], "mlong-double=64") == 0)
+         {
+           ldb = 64;
+ #ifdef HAVE_LONG_DOUBLE_IS_DOUBLE
+           dbl = ldb;
+ #endif
+         }
+     }
+ 
+   return concat (" %<mdouble=* -mdouble=", dbl == 32 ? "32" : "64",
+                  " %<mlong-double=* -mlong-double=", ldb == 32 ? "32" : "64",
+                  NULL);
+ }
diff -Nrcpad gcc-9.3.0/gcc/config/avr/elf.h gcc-10.1.0/gcc/config/avr/elf.h
*** gcc-9.3.0/gcc/config/avr/elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/elf.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay (avr@gjlay.de)
  
     This file is part of GCC.
--- 1,4 ----
! /* Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay (avr@gjlay.de)
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/avr/gen-avr-mmcu-specs.c gcc-10.1.0/gcc/config/avr/gen-avr-mmcu-specs.c
*** gcc-9.3.0/gcc/config/avr/gen-avr-mmcu-specs.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/gen-avr-mmcu-specs.c	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 1998-2019 Free Software Foundation, Inc.
     Contributed by Joern Rennecke
  
     This file is part of GCC.
--- 1,4 ----
! /* Copyright (C) 1998-2020 Free Software Foundation, Inc.
     Contributed by Joern Rennecke
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/avr/gen-avr-mmcu-texi.c gcc-10.1.0/gcc/config/avr/gen-avr-mmcu-texi.c
*** gcc-9.3.0/gcc/config/avr/gen-avr-mmcu-texi.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/gen-avr-mmcu-texi.c	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay (avr@gjlay.de)
  
     This file is part of GCC.
--- 1,4 ----
! /* Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay (avr@gjlay.de)
  
     This file is part of GCC.
*************** int main (void)
*** 160,166 ****
    size_t i, n_mcus = 0;
    const avr_mcu_t *mcu;
  
!   printf ("@c Copyright (C) 2012-2019 Free Software Foundation, Inc.\n");
    printf ("@c This is part of the GCC manual.\n");
    printf ("@c For copying conditions, see the file "
  	  "gcc/doc/include/fdl.texi.\n\n");
--- 160,166 ----
    size_t i, n_mcus = 0;
    const avr_mcu_t *mcu;
  
!   printf ("@c Copyright (C) 2012-2020 Free Software Foundation, Inc.\n");
    printf ("@c This is part of the GCC manual.\n");
    printf ("@c For copying conditions, see the file "
  	  "gcc/doc/include/fdl.texi.\n\n");
diff -Nrcpad gcc-9.3.0/gcc/config/avr/genmultilib.awk gcc-10.1.0/gcc/config/avr/genmultilib.awk
*** gcc-9.3.0/gcc/config/avr/genmultilib.awk	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/genmultilib.awk	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2011-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2011-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
*************** BEGIN {
*** 43,52 ****
--- 43,72 ----
      #    m_options     <->    MULTILIB_OPTIONS
      #    m_dirnames    <->    MULTILIB_DIRNAMES
      #    m_required    <->    MULTILIB_REQUIRED
+     #    m_reuse       <->    MULTILIB_REUSE
      m_sep = ""
      m_options    = "\nMULTILIB_OPTIONS = "
      m_dirnames   = "\nMULTILIB_DIRNAMES ="
      m_required   = "\nMULTILIB_REQUIRED ="
+     m_reuse      = "\nMULTILIB_REUSE ="
+ 
+     have_long_double_is_double = (HAVE_LONG_DOUBLE_IS_DOUBLE \
+ 				  == "HAVE_LONG_DOUBLE_IS_DOUBLE")
+     have_double32 = (HAVE_DOUBLE32 == "HAVE_DOUBLE32")
+     have_double64 = (HAVE_DOUBLE64 == "HAVE_DOUBLE64")
+     have_long_double32 = (HAVE_LONG_DOUBLE32 == "HAVE_LONG_DOUBLE32")
+     have_long_double64 = (HAVE_LONG_DOUBLE64 == "HAVE_LONG_DOUBLE64")
+ 
+     have_double_multi = (have_double32 && have_double64)
+     have_long_double_multi = (! have_long_double_is_double \
+ 			      && have_long_double32 && have_long_double64)
+ 
+     # How to switch away from the default.
+     dir_double = "double"   (96 - with_double)
+     opt_double = "mdouble=" (96 - with_double)
+ 
+     dir_long_double = "long-double"   (96 - with_long_double)
+     opt_long_double = "mlong-double=" (96 - with_long_double)
  }
  
  ##################################################################
*************** BEGIN {
*** 75,80 ****
--- 95,120 ----
      # The first empty line stops copy-pasting the GPL comments
      # from this file to the generated file.
  
+     if (comment)
+     {
+ 	print
+ 
+ 	if (have_double_multi)
+ 	{
+ 	    print "# dir_double = " dir_double
+ 	    print "# opt_double = -" opt_double
+ 	}
+ 	else
+ 	    print "# No multilib for double."
+ 
+ 	if (have_long_double_multi)
+ 	{
+ 	    print "# dir_long_double = " dir_long_double
+ 	    print "# opt_long_double = -" opt_long_double
+ 	}
+ 	else
+ 	    print "# No multilib for long double."
+     }
      comment = 0
  }
  
*************** BEGIN {
*** 130,136 ****
--- 170,204 ----
  	# leading "mmcu=avr2/" in order not to confuse genmultilib.
  	gsub (/^mmcu=avr2\//, "", opts)
  	if (opts != "mmcu=avr2")
+ 	{
  	    m_required = m_required " \\\n\t" opts
+ 	    if (have_double_multi && have_long_double_multi)
+ 	    {
+ 		m_required = m_required " \\\n\t" opts "/" opt_double
+ 		m_required = m_required " \\\n\t" opts "/" opt_long_double
+ 
+ 		# We have only 3 different combinations because -mdouble=64
+ 		# implies -mlong-double=64, and -mlong-double=32 implies
+ 		# -mdouble=32, hence add respective reuses.  The reuse is
+ 		# not needed in the case with_double != with_long_double
+ 		# which means with_double=32 with_long_double=64 because
+ 		# the driver will rectify combining -mdouble=64 and
+ 		# -mlong-double=32.
+ 		if (with_double == with_long_double)
+ 		{
+ 		    d_opts = with_double == 32 ? opt_double : opt_long_double
+ 		    d_opts  = opts "/" d_opts
+ 		    d_reuse = opts "/" opt_double "/" opt_long_double
+ 		    gsub (/=/, ".", d_opts)
+ 		    gsub (/=/, ".", d_reuse)
+ 		    m_reuse = m_reuse " \\\n\t" d_opts "=" d_reuse
+ 		}
+ 	    }
+ 	    else if (have_double_multi)
+ 		m_required = m_required " \\\n\t" opts "/" opt_double
+ 	    else if (have_long_double_multi)
+ 		m_required = m_required " \\\n\t" opts "/" opt_long_double
+ 	}
      }
  }
  
*************** END {
*** 143,151 ****
      # Output that Stuff
      ############################################################
  
!     # Intended Target: ./gcc/config/avr/t-multilib
  
-     print m_options  " " opt_tiny " " opt_rcall
-     print m_dirnames " " dir_tiny " " dir_rcall
      print m_required
  }
--- 211,255 ----
      # Output that Stuff
      ############################################################
  
!     # Intended Target: $(top_builddir)/gcc/t-multilib-avr
! 
!     if (have_double_multi && have_long_double_multi)
!     {
! 	print m_options  " " opt_tiny " " opt_rcall " " opt_double "/" opt_long_double
! 	print m_dirnames " " dir_tiny " " dir_rcall " " dir_double " " dir_long_double
! 	# Notice that the ./double* and ./long-double* variants cannot
! 	# be copied by t-avrlibc because the . default multilib is built
! 	# after all the others.
! 	m_required = m_required " \\\n\t" opt_double
! 	m_required = m_required " \\\n\t" opt_long_double
! 	if (with_double == with_long_double)
! 	{
! 	    d_opts  = with_double == 32 ? opt_double : opt_long_double
! 	    d_reuse = opt_double "/" opt_long_double
! 	    gsub (/=/, ".", d_opts)
! 	    gsub (/=/, ".", d_reuse)
! 	    m_reuse = m_reuse " \\\n\t" d_opts "=" d_reuse
! 
! 	}
!     }
!     else if (have_double_multi)
!     {
! 	print m_options  " " opt_tiny " " opt_rcall " " opt_double
! 	print m_dirnames " " dir_tiny " " dir_rcall " " dir_double
! 	m_required = m_required " \\\n\t" opt_double
!     }
!     else if (have_long_double_multi)
!     {
! 	print m_options  " " opt_tiny " " opt_rcall " " opt_long_double
! 	print m_dirnames " " dir_tiny " " dir_rcall " " dir_long_double
! 	m_required = m_required " \\\n\t" opt_long_double
!     }
!     else
!     {
! 	print m_options  " " opt_tiny " " opt_rcall
! 	print m_dirnames " " dir_tiny " " dir_rcall
!     }
  
      print m_required
+     print m_reuse
  }
diff -Nrcpad gcc-9.3.0/gcc/config/avr/predicates.md gcc-10.1.0/gcc/config/avr/predicates.md
*** gcc-9.3.0/gcc/config/avr/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicate definitions for ATMEL AVR micro controllers.
! ;; Copyright (C) 2006-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Predicate definitions for ATMEL AVR micro controllers.
! ;; Copyright (C) 2006-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/avr/specs.h gcc-10.1.0/gcc/config/avr/specs.h
*** gcc-9.3.0/gcc/config/avr/specs.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/specs.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Specs definitions for Atmel AVR back end.
  
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay (avr@gjlay.de)
  
  This file is part of GCC.
--- 1,6 ----
  /* Specs definitions for Atmel AVR back end.
  
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by Georg-Johann Lay (avr@gjlay.de)
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/avr/stdfix.h gcc-10.1.0/gcc/config/avr/stdfix.h
*** gcc-9.3.0/gcc/config/avr/stdfix.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/stdfix.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2007-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2007-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/avr/t-avr gcc-10.1.0/gcc/config/avr/t-avr
*** gcc-9.3.0/gcc/config/avr/t-avr	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/t-avr	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2000-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2000-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
***************
*** 16,21 ****
--- 16,43 ----
  # along with GCC; see the file COPYING3.  If not see
  # <http://www.gnu.org/licenses/>.
  
+ HAVE_DOUBLE32 = $(findstring HAVE_DOUBLE32, $(tm_defines))
+ HAVE_DOUBLE64 = $(findstring HAVE_DOUBLE64, $(tm_defines))
+ HAVE_LONG_DOUBLE32 = $(findstring HAVE_LONG_DOUBLE32, $(tm_defines))
+ HAVE_LONG_DOUBLE64 = $(findstring HAVE_LONG_DOUBLE64, $(tm_defines))
+ HAVE_LONG_DOUBLE_IS_DOUBLE = $(findstring HAVE_LONG_DOUBLE_IS_DOUBLE, $(tm_defines))
+ 
+ ifeq (WITH_DOUBLE32, $(findstring WITH_DOUBLE32, $(tm_defines)))
+ WITH_DOUBLE=32
+ endif
+ 
+ ifeq (WITH_DOUBLE64, $(findstring WITH_DOUBLE64, $(tm_defines)))
+ WITH_DOUBLE=64
+ endif
+ 
+ ifeq (WITH_LONG_DOUBLE32, $(findstring WITH_LONG_DOUBLE32, $(tm_defines)))
+ WITH_LONG_DOUBLE=32
+ endif
+ 
+ ifeq (WITH_LONG_DOUBLE64, $(findstring WITH_LONG_DOUBLE64, $(tm_defines)))
+ WITH_LONG_DOUBLE=64
+ endif
+ 
  PASSES_EXTRA += $(srcdir)/config/avr/avr-passes.def
  
  driver-avr.o: $(srcdir)/config/avr/driver-avr.c \
*************** AVR_MCUS = $(srcdir)/config/avr/avr-mcus
*** 56,63 ****
  
  .PHONY: avr-mcus
  
! avr-mcus: $(srcdir)/config/avr/t-multilib \
! 	  $(srcdir)/doc/avr-mmcu.texi ; @true
  
  # Make sure that native -mmcu= support is in sync with -mmcu= documentation.
  gen-avr-mmcu-texi$(build_exeext): $(srcdir)/config/avr/gen-avr-mmcu-texi.c \
--- 78,84 ----
  
  .PHONY: avr-mcus
  
! avr-mcus: $(srcdir)/doc/avr-mmcu.texi ; @true
  
  # Make sure that native -mmcu= support is in sync with -mmcu= documentation.
  gen-avr-mmcu-texi$(build_exeext): $(srcdir)/config/avr/gen-avr-mmcu-texi.c \
*************** install-device-specs: s-device-specs ins
*** 93,101 ****
  # MULTILIB_OPTIONS
  # MULTILIB_DIRNAMES
  # MULTILIB_REQUIRED
  
! s-mlib: $(srcdir)/config/avr/t-multilib
  
! $(srcdir)/config/avr/t-multilib: $(srcdir)/config/avr/genmultilib.awk \
  				 $(AVR_MCUS)
! 	$(AWK) -f $< $< $(AVR_MCUS) > $@
--- 114,132 ----
  # MULTILIB_OPTIONS
  # MULTILIB_DIRNAMES
  # MULTILIB_REQUIRED
+ # MULTILIB_REUSE
  
! multilib.h Makefile s-mlib: t-multilib-avr
  
! t-multilib-avr: $(srcdir)/config/avr/genmultilib.awk \
  				 $(AVR_MCUS)
! 	$(AWK)	-v HAVE_LONG_DOUBLE_IS_DOUBLE=$(HAVE_LONG_DOUBLE_IS_DOUBLE) \
! 		-v HAVE_DOUBLE32=$(HAVE_DOUBLE32) 			\
! 		-v HAVE_DOUBLE64=$(HAVE_DOUBLE64) 			\
! 		-v HAVE_LONG_DOUBLE32=$(HAVE_LONG_DOUBLE32)		\
! 		-v HAVE_LONG_DOUBLE64=$(HAVE_LONG_DOUBLE64) 		\
! 		-v with_double=$(WITH_DOUBLE) 				\
! 		-v with_long_double=$(WITH_LONG_DOUBLE)			\
! 		-f $< $< $(AVR_MCUS) > $@
! 
! include t-multilib-avr
diff -Nrcpad gcc-9.3.0/gcc/config/avr/t-multilib gcc-10.1.0/gcc/config/avr/t-multilib
*** gcc-9.3.0/gcc/config/avr/t-multilib	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/avr/t-multilib	Thu Jan  1 00:00:00 1970
***************
*** 1,46 ****
- # Auto-generated Makefile Snip
- # Generated by    : ./gcc/config/avr/genmultilib.awk
- # Generated from  : ./gcc/config/avr/avr-mcus.def
- # Used by         : tmake_file from Makefile and genmultilib
- 
- # Copyright (C) 2011-2019 Free Software Foundation, Inc.
- #
- # This file is part of GCC.
- #
- # GCC is free software; you can redistribute it and/or modify it under
- # the terms of the GNU General Public License as published by the Free
- # Software Foundation; either version 3, or (at your option) any later
- # version.
- #
- # GCC is distributed in the hope that it will be useful, but WITHOUT ANY
- # WARRANTY; without even the implied warranty of MERCHANTABILITY or
- # FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- # for more details.
- #
- # You should have received a copy of the GNU General Public License
- # along with GCC; see the file COPYING3.  If not see
- # <http://www.gnu.org/licenses/>.
- 
- MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega2/mmcu=avrxmega3/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7/mmcu=avrtiny msp8 mshort-calls
- 
- MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega2 avrxmega3 avrxmega4 avrxmega5 avrxmega6 avrxmega7 avrtiny tiny-stack short-calls
- 
- MULTILIB_REQUIRED = \
- 	msp8 \
- 	mmcu=avr25 \
- 	mmcu=avr25/msp8 \
- 	mmcu=avr3 \
- 	mmcu=avr31 \
- 	mmcu=avr35 \
- 	mmcu=avr4 \
- 	mmcu=avr5 \
- 	mmcu=avr51 \
- 	mmcu=avr6 \
- 	mmcu=avrxmega2 \
- 	mmcu=avrxmega3/mshort-calls \
- 	mmcu=avrxmega3 \
- 	mmcu=avrxmega4 \
- 	mmcu=avrxmega5 \
- 	mmcu=avrxmega6 \
- 	mmcu=avrxmega7 \
- 	mmcu=avrtiny
--- 0 ----
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/bfin-modes.def gcc-10.1.0/gcc/config/bfin/bfin-modes.def
*** gcc-9.3.0/gcc/config/bfin/bfin-modes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/bfin-modes.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, for Blackfin.
!    Copyright (C) 2005-2019 Free Software Foundation, Inc.
     Contributed by Analog Devices.
  
     This file is part of GCC.
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, for Blackfin.
!    Copyright (C) 2005-2020 Free Software Foundation, Inc.
     Contributed by Analog Devices.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/bfin-opts.h gcc-10.1.0/gcc/config/bfin/bfin-opts.h
*** gcc-9.3.0/gcc/config/bfin/bfin-opts.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/bfin-opts.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for the Blackfin port needed for option handling.
!    Copyright (C) 2005-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for the Blackfin port needed for option handling.
!    Copyright (C) 2005-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/bfin-protos.h gcc-10.1.0/gcc/config/bfin/bfin-protos.h
*** gcc-9.3.0/gcc/config/bfin/bfin-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/bfin-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Prototypes for Blackfin functions used in the md file & elsewhere.
!    Copyright (C) 2005-2019 Free Software Foundation, Inc.
  
     This file is part of GNU CC.
  
--- 1,5 ----
  /* Prototypes for Blackfin functions used in the md file & elsewhere.
!    Copyright (C) 2005-2020 Free Software Foundation, Inc.
  
     This file is part of GNU CC.
  
*************** extern bool expand_move (rtx *, machine_
*** 81,87 ****
  extern void bfin_expand_call (rtx, rtx, rtx, rtx, int);
  extern bool bfin_longcall_p (rtx, int);
  extern bool bfin_dsp_memref_p (rtx);
! extern bool bfin_expand_movmem (rtx, rtx, rtx, rtx);
  
  extern enum reg_class secondary_input_reload_class (enum reg_class,
  						    machine_mode,
--- 81,87 ----
  extern void bfin_expand_call (rtx, rtx, rtx, rtx, int);
  extern bool bfin_longcall_p (rtx, int);
  extern bool bfin_dsp_memref_p (rtx);
! extern bool bfin_expand_cpymem (rtx, rtx, rtx, rtx);
  
  extern enum reg_class secondary_input_reload_class (enum reg_class,
  						    machine_mode,
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/bfin.c gcc-10.1.0/gcc/config/bfin/bfin.c
*** gcc-9.3.0/gcc/config/bfin/bfin.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/bfin.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* The Blackfin code generation auxiliary output file.
!    Copyright (C) 2005-2019 Free Software Foundation, Inc.
     Contributed by Analog Devices.
  
     This file is part of GCC.
--- 1,5 ----
  /* The Blackfin code generation auxiliary output file.
!    Copyright (C) 2005-2020 Free Software Foundation, Inc.
     Contributed by Analog Devices.
  
     This file is part of GCC.
*************** must_save_p (bool is_inthandler, unsigne
*** 235,247 ****
        return (is_eh_return_reg
  	      || (df_regs_ever_live_p (regno)
  		  && !fixed_regs[regno]
! 		  && (is_inthandler || !call_used_regs[regno])));
      }
    else if (P_REGNO_P (regno))
      {
        return ((df_regs_ever_live_p (regno)
  	       && !fixed_regs[regno]
! 	       && (is_inthandler || !call_used_regs[regno]))
  	      || (is_inthandler
  		  && (ENABLE_WA_05000283 || ENABLE_WA_05000315)
  		  && regno == REG_P5)
--- 235,247 ----
        return (is_eh_return_reg
  	      || (df_regs_ever_live_p (regno)
  		  && !fixed_regs[regno]
! 		  && (is_inthandler || !call_used_or_fixed_reg_p (regno))));
      }
    else if (P_REGNO_P (regno))
      {
        return ((df_regs_ever_live_p (regno)
  	       && !fixed_regs[regno]
! 	       && (is_inthandler || !call_used_or_fixed_reg_p (regno)))
  	      || (is_inthandler
  		  && (ENABLE_WA_05000283 || ENABLE_WA_05000315)
  		  && regno == REG_P5)
*************** must_save_p (bool is_inthandler, unsigne
*** 251,259 ****
  		      || (TARGET_ID_SHARED_LIBRARY && !crtl->is_leaf))));
      }
    else
!     return ((is_inthandler || !call_used_regs[regno])
  	    && (df_regs_ever_live_p (regno)
! 		|| (!leaf_function_p () && call_used_regs[regno])));
  
  }
  
--- 251,259 ----
  		      || (TARGET_ID_SHARED_LIBRARY && !crtl->is_leaf))));
      }
    else
!     return ((is_inthandler || !call_used_or_fixed_reg_p (regno))
  	    && (df_regs_ever_live_p (regno)
! 		|| (!leaf_function_p () && call_used_or_fixed_reg_p (regno))));
  
  }
  
*************** expand_prologue_reg_save (rtx spreg, int
*** 419,425 ****
      if (saveall 
  	|| (is_inthandler
  	    && (df_regs_ever_live_p (i)
! 		|| (!leaf_function_p () && call_used_regs[i]))))
        {
  	rtx_insn *insn;
  	if (i == REG_A0 || i == REG_A1)
--- 419,425 ----
      if (saveall 
  	|| (is_inthandler
  	    && (df_regs_ever_live_p (i)
! 		|| (!leaf_function_p () && call_used_or_fixed_reg_p (i)))))
        {
  	rtx_insn *insn;
  	if (i == REG_A0 || i == REG_A1)
*************** expand_epilogue_reg_restore (rtx spreg,
*** 458,464 ****
      if (saveall
  	|| (is_inthandler
  	    && (df_regs_ever_live_p (i)
! 		|| (!leaf_function_p () && call_used_regs[i]))))
        {
  	if (i == REG_A0 || i == REG_A1)
  	  {
--- 458,464 ----
      if (saveall
  	|| (is_inthandler
  	    && (df_regs_ever_live_p (i)
! 		|| (!leaf_function_p () && call_used_or_fixed_reg_p (i)))))
        {
  	if (i == REG_A0 || i == REG_A1)
  	  {
*************** expand_epilogue_reg_restore (rtx spreg,
*** 540,546 ****
  
     CUM is as above.
  
!    MODE and TYPE are the mode and type of the current parameter.
  
     PRETEND_SIZE is a variable that should be set to the amount of stack
     that must be pushed by the prolog to pretend that our caller pushed
--- 540,546 ----
  
     CUM is as above.
  
!    ARG is the last named argument.
  
     PRETEND_SIZE is a variable that should be set to the amount of stack
     that must be pushed by the prolog to pretend that our caller pushed
*************** expand_epilogue_reg_restore (rtx spreg,
*** 559,566 ****
  
  static void
  setup_incoming_varargs (cumulative_args_t cum,
! 			machine_mode mode ATTRIBUTE_UNUSED,
! 			tree type ATTRIBUTE_UNUSED, int *pretend_size,
  			int no_rtl)
  {
    rtx mem;
--- 559,565 ----
  
  static void
  setup_incoming_varargs (cumulative_args_t cum,
! 			const function_arg_info &, int *pretend_size,
  			int no_rtl)
  {
    rtx mem;
*************** n_regs_saved_by_prologue (void)
*** 653,659 ****
      if (all
  	|| (fkind != SUBROUTINE
  	    && (df_regs_ever_live_p (i)
! 		|| (!leaf_function_p () && call_used_regs[i]))))
        n += i == REG_A0 || i == REG_A1 ? 2 : 1;
  
    return n;
--- 652,658 ----
      if (all
  	|| (fkind != SUBROUTINE
  	    && (df_regs_ever_live_p (i)
! 		|| (!leaf_function_p () && call_used_or_fixed_reg_p (i)))))
        n += i == REG_A0 || i == REG_A1 ? 2 : 1;
  
    return n;
*************** add_to_reg (rtx reg, HOST_WIDE_INT value
*** 754,760 ****
  	{
  	  int i;
  	  for (i = REG_P0; i <= REG_P5; i++)
! 	    if ((df_regs_ever_live_p (i) && ! call_used_regs[i])
  		|| (!TARGET_FDPIC
  		    && i == PIC_OFFSET_TABLE_REGNUM
  		    && (crtl->uses_pic_offset_table
--- 753,759 ----
  	{
  	  int i;
  	  for (i = REG_P0; i <= REG_P5; i++)
! 	    if ((df_regs_ever_live_p (i) && ! call_used_or_fixed_reg_p (i))
  		|| (!TARGET_FDPIC
  		    && i == PIC_OFFSET_TABLE_REGNUM
  		    && (crtl->uses_pic_offset_table
*************** expand_interrupt_handler_epilogue (rtx s
*** 1037,1050 ****
  static rtx
  bfin_load_pic_reg (rtx dest)
  {
-   struct cgraph_local_info *i = NULL;
    rtx addr;
!  
!   i = cgraph_node::local_info (current_function_decl);
!  
    /* Functions local to the translation unit don't need to reload the
       pic reg, since the caller always passes a usable one.  */
!   if (i && i->local)
      return pic_offset_table_rtx;
        
    if (global_options_set.x_bfin_library_id)
--- 1036,1049 ----
  static rtx
  bfin_load_pic_reg (rtx dest)
  {
    rtx addr;
! 
!   cgraph_node *local_info_node
!     = cgraph_node::local_info_node (current_function_decl);
! 
    /* Functions local to the translation unit don't need to reload the
       pic reg, since the caller always passes a usable one.  */
!   if (local_info_node && local_info_node->local)
      return pic_offset_table_rtx;
        
    if (global_options_set.x_bfin_library_id)
*************** init_cumulative_args (CUMULATIVE_ARGS *c
*** 1648,1665 ****
    return;
  }
  
! /* Update the data in CUM to advance over an argument
!    of mode MODE and data type TYPE.
!    (TYPE is null for libcalls where that information may not be available.)  */
  
  static void
! bfin_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
! 			   const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    int count, bytes, words;
  
!   bytes = (mode == BLKmode) ? int_size_in_bytes (type) : GET_MODE_SIZE (mode);
    words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
  
    cum->words += words;
--- 1647,1662 ----
    return;
  }
  
! /* Update the data in CUM to advance over argument ARG.  */
  
  static void
! bfin_function_arg_advance (cumulative_args_t cum_v,
! 			   const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    int count, bytes, words;
  
!   bytes = arg.promoted_size_in_bytes ();
    words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
  
    cum->words += words;
*************** bfin_function_arg_advance (cumulative_ar
*** 1683,1706 ****
     Value is zero to push the argument on the stack,
     or a hard register in which to store the argument.
  
-    MODE is the argument's machine mode.
-    TYPE is the data type of the argument (as a tree).
-     This is null for libcalls where that information may
-     not be available.
     CUM is a variable of type CUMULATIVE_ARGS which gives info about
      the preceding args and about the function being called.
!    NAMED is nonzero if this argument is a named parameter
!     (otherwise it is an extra parameter matching an ellipsis).  */
  
  static rtx
! bfin_function_arg (cumulative_args_t cum_v, machine_mode mode,
! 		   const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   int bytes
!     = (mode == BLKmode) ? int_size_in_bytes (type) : GET_MODE_SIZE (mode);
  
!   if (mode == VOIDmode)
      /* Compute operand 2 of the call insn.  */
      return GEN_INT (cum->call_cookie);
  
--- 1680,1696 ----
     Value is zero to push the argument on the stack,
     or a hard register in which to store the argument.
  
     CUM is a variable of type CUMULATIVE_ARGS which gives info about
      the preceding args and about the function being called.
!    ARG is a description of the argument.  */
  
  static rtx
! bfin_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   int bytes = arg.promoted_size_in_bytes ();
  
!   if (arg.end_marker_p ())
      /* Compute operand 2 of the call insn.  */
      return GEN_INT (cum->call_cookie);
  
*************** bfin_function_arg (cumulative_args_t cum
*** 1708,1714 ****
      return NULL_RTX;
  
    if (cum->nregs)
!     return gen_rtx_REG (mode, *(cum->arg_regs));
  
    return NULL_RTX;
  }
--- 1698,1704 ----
      return NULL_RTX;
  
    if (cum->nregs)
!     return gen_rtx_REG (arg.mode, *(cum->arg_regs));
  
    return NULL_RTX;
  }
*************** bfin_function_arg (cumulative_args_t cum
*** 1723,1734 ****
     stack.   */
  
  static int
! bfin_arg_partial_bytes (cumulative_args_t cum, machine_mode mode,
! 			tree type ATTRIBUTE_UNUSED,
! 			bool named ATTRIBUTE_UNUSED)
  {
!   int bytes
!     = (mode == BLKmode) ? int_size_in_bytes (type) : GET_MODE_SIZE (mode);
    int bytes_left = get_cumulative_args (cum)->nregs * UNITS_PER_WORD;
    
    if (bytes == -1)
--- 1713,1721 ----
     stack.   */
  
  static int
! bfin_arg_partial_bytes (cumulative_args_t cum, const function_arg_info &arg)
  {
!   int bytes = arg.promoted_size_in_bytes ();
    int bytes_left = get_cumulative_args (cum)->nregs * UNITS_PER_WORD;
    
    if (bytes == -1)
*************** bfin_arg_partial_bytes (cumulative_args_
*** 1744,1754 ****
  /* Variable sized types are passed by reference.  */
  
  static bool
! bfin_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
! 			machine_mode mode ATTRIBUTE_UNUSED,
! 			const_tree type, bool named ATTRIBUTE_UNUSED)
  {
!   return type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST;
  }
  
  /* Decide whether a type should be returned in memory (true)
--- 1731,1739 ----
  /* Variable sized types are passed by reference.  */
  
  static bool
! bfin_pass_by_reference (cumulative_args_t, const function_arg_info &arg)
  {
!   return arg.type && TREE_CODE (TYPE_SIZE (arg.type)) != INTEGER_CST;
  }
  
  /* Decide whether a type should be returned in memory (true)
*************** static bool
*** 1821,1827 ****
  bfin_function_ok_for_sibcall (tree decl ATTRIBUTE_UNUSED,
  			      tree exp ATTRIBUTE_UNUSED)
  {
!   struct cgraph_local_info *this_func, *called_func;
    e_funkind fkind = funkind (TREE_TYPE (current_function_decl));
    if (fkind != SUBROUTINE)
      return false;
--- 1806,1812 ----
  bfin_function_ok_for_sibcall (tree decl ATTRIBUTE_UNUSED,
  			      tree exp ATTRIBUTE_UNUSED)
  {
!   cgraph_node *this_func, *called_func;
    e_funkind fkind = funkind (TREE_TYPE (current_function_decl));
    if (fkind != SUBROUTINE)
      return false;
*************** bfin_function_ok_for_sibcall (tree decl
*** 1836,1844 ****
    if (!decl)
      /* Not enough information.  */
      return false;
!  
!   this_func = cgraph_node::local_info (current_function_decl);
!   called_func = cgraph_node::local_info (decl);
    if (!called_func)
      return false;
    return !called_func->local || this_func->local;
--- 1821,1829 ----
    if (!decl)
      /* Not enough information.  */
      return false;
! 
!   this_func = cgraph_node::local_info_node (current_function_decl);
!   called_func = cgraph_node::local_info_node (decl);
    if (!called_func)
      return false;
    return !called_func->local || this_func->local;
*************** output_pop_multiple (rtx insn, rtx *oper
*** 3208,3214 ****
  /* Adjust DST and SRC by OFFSET bytes, and generate one move in mode MODE.  */
  
  static void
! single_move_for_movmem (rtx dst, rtx src, machine_mode mode, HOST_WIDE_INT offset)
  {
    rtx scratch = gen_reg_rtx (mode);
    rtx srcmem, dstmem;
--- 3193,3199 ----
  /* Adjust DST and SRC by OFFSET bytes, and generate one move in mode MODE.  */
  
  static void
! single_move_for_cpymem (rtx dst, rtx src, machine_mode mode, HOST_WIDE_INT offset)
  {
    rtx scratch = gen_reg_rtx (mode);
    rtx srcmem, dstmem;
*************** single_move_for_movmem (rtx dst, rtx src
*** 3224,3230 ****
     back on a different method.  */
  
  bool
! bfin_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp)
  {
    rtx srcreg, destreg, countreg;
    HOST_WIDE_INT align = 0;
--- 3209,3215 ----
     back on a different method.  */
  
  bool
! bfin_expand_cpymem (rtx dst, rtx src, rtx count_exp, rtx align_exp)
  {
    rtx srcreg, destreg, countreg;
    HOST_WIDE_INT align = 0;
*************** bfin_expand_movmem (rtx dst, rtx src, rt
*** 3269,3275 ****
  	{
  	  if ((count & ~3) == 4)
  	    {
! 	      single_move_for_movmem (dst, src, SImode, offset);
  	      offset = 4;
  	    }
  	  else if (count & ~3)
--- 3254,3260 ----
  	{
  	  if ((count & ~3) == 4)
  	    {
! 	      single_move_for_cpymem (dst, src, SImode, offset);
  	      offset = 4;
  	    }
  	  else if (count & ~3)
*************** bfin_expand_movmem (rtx dst, rtx src, rt
*** 3282,3288 ****
  	    }
  	  if (count & 2)
  	    {
! 	      single_move_for_movmem (dst, src, HImode, offset);
  	      offset += 2;
  	    }
  	}
--- 3267,3273 ----
  	    }
  	  if (count & 2)
  	    {
! 	      single_move_for_cpymem (dst, src, HImode, offset);
  	      offset += 2;
  	    }
  	}
*************** bfin_expand_movmem (rtx dst, rtx src, rt
*** 3290,3296 ****
  	{
  	  if ((count & ~1) == 2)
  	    {
! 	      single_move_for_movmem (dst, src, HImode, offset);
  	      offset = 2;
  	    }
  	  else if (count & ~1)
--- 3275,3281 ----
  	{
  	  if ((count & ~1) == 2)
  	    {
! 	      single_move_for_cpymem (dst, src, HImode, offset);
  	      offset = 2;
  	    }
  	  else if (count & ~1)
*************** bfin_expand_movmem (rtx dst, rtx src, rt
*** 3304,3310 ****
  	}
        if (count & 1)
  	{
! 	  single_move_for_movmem (dst, src, QImode, offset);
  	}
        return true;
      }
--- 3289,3295 ----
  	}
        if (count & 1)
  	{
! 	  single_move_for_cpymem (dst, src, QImode, offset);
  	}
        return true;
      }
*************** hwloop_optimize (hwloop_info loop)
*** 3497,3503 ****
        for (i = REG_P0; i <= REG_P5; i++)
  	if ((df_regs_ever_live_p (i)
  	     || (funkind (TREE_TYPE (current_function_decl)) == SUBROUTINE
! 		 && call_used_regs[i]))
  	    && !REGNO_REG_SET_P (df_get_live_out (bb_in), i))
  	  {
  	    scratchreg = gen_rtx_REG (SImode, i);
--- 3482,3488 ----
        for (i = REG_P0; i <= REG_P5; i++)
  	if ((df_regs_ever_live_p (i)
  	     || (funkind (TREE_TYPE (current_function_decl)) == SUBROUTINE
! 		 && call_used_or_fixed_reg_p (i)))
  	    && !REGNO_REG_SET_P (df_get_live_out (bb_in), i))
  	  {
  	    scratchreg = gen_rtx_REG (SImode, i);
*************** workaround_speculation (void)
*** 4434,4440 ****
  	     we found earlier.  */
  	  if (recog_memoized (insn) != CODE_FOR_compare_eq)
  	    {
! 	      note_stores (PATTERN (insn), note_np_check_stores, NULL);
  	      if (np_check_regno != -1)
  		{
  		  if (find_regno_note (insn, REG_INC, np_check_regno))
--- 4419,4425 ----
  	     we found earlier.  */
  	  if (recog_memoized (insn) != CODE_FOR_compare_eq)
  	    {
! 	      note_stores (insn, note_np_check_stores, NULL);
  	      if (np_check_regno != -1)
  		{
  		  if (find_regno_note (insn, REG_INC, np_check_regno))
*************** bfin_output_mi_thunk (FILE *file ATTRIBU
*** 4976,4985 ****
--- 4961,4972 ----
  		      tree thunk ATTRIBUTE_UNUSED, HOST_WIDE_INT delta,
  		      HOST_WIDE_INT vcall_offset, tree function)
  {
+   const char *fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunk));
    rtx xops[3];
    /* The this parameter is passed as the first argument.  */
    rtx this_rtx = gen_rtx_REG (Pmode, REG_R0);
  
+   assemble_start_function (thunk, fnname);
    /* Adjust the this parameter by a fixed constant.  */
    if (delta)
      {
*************** bfin_output_mi_thunk (FILE *file ATTRIBU
*** 5034,5039 ****
--- 5021,5027 ----
    xops[0] = XEXP (DECL_RTL (function), 0);
    if (1 || !flag_pic || (*targetm.binds_local_p) (function))
      output_asm_insn ("jump.l\t%P0", xops);
+   assemble_end_function (thunk, fnname);
  }
  
  /* Codes for all the Blackfin builtins.  */
*************** bfin_expand_builtin (tree exp, rtx targe
*** 5495,5501 ****
    enum insn_code icode;
    const struct builtin_description *d;
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
    tree arg0, arg1, arg2;
    rtx op0, op1, op2, accvec, pat, tmp1, tmp2, a0reg, a1reg;
    machine_mode tmode, mode0;
--- 5483,5489 ----
    enum insn_code icode;
    const struct builtin_description *d;
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl);
    tree arg0, arg1, arg2;
    rtx op0, op1, op2, accvec, pat, tmp1, tmp2, a0reg, a1reg;
    machine_mode tmode, mode0;
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/bfin.h gcc-10.1.0/gcc/config/bfin/bfin.h
*** gcc-9.3.0/gcc/config/bfin/bfin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/bfin.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for the Blackfin port.
!    Copyright (C) 2005-2019 Free Software Foundation, Inc.
     Contributed by Analog Devices.
  
     This file is part of GCC.
--- 1,5 ----
  /* Definitions for the Blackfin port.
!    Copyright (C) 2005-2020 Free Software Foundation, Inc.
     Contributed by Analog Devices.
  
     This file is part of GCC.
*************** typedef struct {
*** 793,799 ****
  #define MOVE_MAX UNITS_PER_WORD
  
  /* If a memory-to-memory move would take MOVE_RATIO or more simple
!    move-instruction pairs, we will do a movmem or libcall instead.  */
  
  #define MOVE_RATIO(speed) 5
  
--- 793,799 ----
  #define MOVE_MAX UNITS_PER_WORD
  
  /* If a memory-to-memory move would take MOVE_RATIO or more simple
!    move-instruction pairs, we will do a cpymem or libcall instead.  */
  
  #define MOVE_RATIO(speed) 5
  
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/bfin.md gcc-10.1.0/gcc/config/bfin/bfin.md
*** gcc-9.3.0/gcc/config/bfin/bfin.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/bfin.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;;- Machine description for Blackfin for GNU compiler
! ;;  Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;;  Contributed by Analog Devices.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;;- Machine description for Blackfin for GNU compiler
! ;;  Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;;  Contributed by Analog Devices.
  
  ;; This file is part of GCC.
***************
*** 752,758 ****
    "@
     %d0 = %h1 << 0%!
     %d0 = %1;"
!   [(set_attr "type" "dsp32shiftimm,mvi")])
  
  (define_expand "insv"
    [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "")
--- 752,759 ----
    "@
     %d0 = %h1 << 0%!
     %d0 = %1;"
!   [(set_attr "type" "dsp32shiftimm,mvi")
!    (set_attr "length" "*,4")])
  
  (define_expand "insv"
    [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "")
***************
*** 2316,2329 ****
     (set_attr "length" "16")
     (set_attr "seq_insns" "multi")])
  
! (define_expand "movmemsi"
    [(match_operand:BLK 0 "general_operand" "")
     (match_operand:BLK 1 "general_operand" "")
     (match_operand:SI 2 "const_int_operand" "")
     (match_operand:SI 3 "const_int_operand" "")]
    ""
  {
!   if (bfin_expand_movmem (operands[0], operands[1], operands[2], operands[3]))
      DONE;
    FAIL;
  })
--- 2317,2330 ----
     (set_attr "length" "16")
     (set_attr "seq_insns" "multi")])
  
! (define_expand "cpymemsi"
    [(match_operand:BLK 0 "general_operand" "")
     (match_operand:BLK 1 "general_operand" "")
     (match_operand:SI 2 "const_int_operand" "")
     (match_operand:SI 3 "const_int_operand" "")]
    ""
  {
!   if (bfin_expand_cpymem (operands[0], operands[1], operands[2], operands[3]))
      DONE;
    FAIL;
  })
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/bfin.opt gcc-10.1.0/gcc/config/bfin/bfin.opt
*** gcc-9.3.0/gcc/config/bfin/bfin.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/bfin.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the Blackfin port of the compiler
  ;
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for the Blackfin port of the compiler
  ;
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/constraints.md gcc-10.1.0/gcc/config/bfin/constraints.md
*** gcc-9.3.0/gcc/config/bfin/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for Blackfin
! ;; Copyright (C) 2008-2019 Free Software Foundation, Inc.
  ;; Contributed by Analog Devices
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Constraint definitions for Blackfin
! ;; Copyright (C) 2008-2020 Free Software Foundation, Inc.
  ;; Contributed by Analog Devices
  
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/elf.h gcc-10.1.0/gcc/config/bfin/elf.h
*** gcc-9.3.0/gcc/config/bfin/elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/elf.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2005-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2005-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/linux.h gcc-10.1.0/gcc/config/bfin/linux.h
*** gcc-9.3.0/gcc/config/bfin/linux.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/linux.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2007-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2007-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/predicates.md gcc-10.1.0/gcc/config/bfin/predicates.md
*** gcc-9.3.0/gcc/config/bfin/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicate definitions for the Blackfin.
! ;; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;; Contributed by Analog Devices.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Predicate definitions for the Blackfin.
! ;; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;; Contributed by Analog Devices.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/print-sysroot-suffix.sh gcc-10.1.0/gcc/config/bfin/print-sysroot-suffix.sh
*** gcc-9.3.0/gcc/config/bfin/print-sysroot-suffix.sh	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/print-sysroot-suffix.sh	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  #!/bin/sh
! # Copyright (C) 2007-2019 Free Software Foundation, Inc.
  # This file is part of GCC.
  
  # GCC is free software; you can redistribute it and/or modify
--- 1,5 ----
  #!/bin/sh
! # Copyright (C) 2007-2020 Free Software Foundation, Inc.
  # This file is part of GCC.
  
  # GCC is free software; you can redistribute it and/or modify
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/rtems.h gcc-10.1.0/gcc/config/bfin/rtems.h
*** gcc-9.3.0/gcc/config/bfin/rtems.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/rtems.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for rtems targeting a bfin
!    Copyright (C) 2006-2019 Free Software Foundation, Inc.
     Contributed by Ralf Corsépius (ralf.corsepius@rtems.org).
  
     This file is part of GCC.
--- 1,5 ----
  /* Definitions for rtems targeting a bfin
!    Copyright (C) 2006-2020 Free Software Foundation, Inc.
     Contributed by Ralf Corsépius (ralf.corsepius@rtems.org).
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/sync.md gcc-10.1.0/gcc/config/bfin/sync.md
*** gcc-9.3.0/gcc/config/bfin/sync.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/sync.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; GCC machine description for Blackfin synchronization instructions.
! ;; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;; Contributed by Analog Devices.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; GCC machine description for Blackfin synchronization instructions.
! ;; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;; Contributed by Analog Devices.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/t-bfin-elf gcc-10.1.0/gcc/config/bfin/t-bfin-elf
*** gcc-9.3.0/gcc/config/bfin/t-bfin-elf	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/t-bfin-elf	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2005-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2005-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/t-bfin-linux gcc-10.1.0/gcc/config/bfin/t-bfin-linux
*** gcc-9.3.0/gcc/config/bfin/t-bfin-linux	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/t-bfin-linux	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2007-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2007-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/t-bfin-uclinux gcc-10.1.0/gcc/config/bfin/t-bfin-uclinux
*** gcc-9.3.0/gcc/config/bfin/t-bfin-uclinux	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/t-bfin-uclinux	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2007-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2007-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/bfin/uclinux.h gcc-10.1.0/gcc/config/bfin/uclinux.h
*** gcc-9.3.0/gcc/config/bfin/uclinux.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/bfin/uclinux.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2005-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2005-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/bpf/bpf-helpers.def gcc-10.1.0/gcc/config/bpf/bpf-helpers.def
*** gcc-9.3.0/gcc/config/bpf/bpf-helpers.def	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/bpf/bpf-helpers.def	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,194 ----
+ /* Kernel helpers database.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ /* This file contains the definition of the kernel helpers that are
+    available to eBPF programs.
+ 
+    The primary source for information on kernel helpers is the
+    linux/include/uapi/linux/bpf.h file in the Linux source tree.
+    Please keep this database in sync.
+ 
+    The first column is the first kernel version featuring the helper
+    function.  This should be an enumerate from bpf_kernel_version,
+    defined in bpf-opts.h.  Note that the backend assumes that helpers
+    never get deprecated in the kernel.  If that eventually happens,
+    then we will need to use a bitmask here instead of an enumerate.
+ 
+    The second column is the constant-name for the helper.
+    The third column is the program-name of the helper.
+ 
+    The fourth column is a list of names describing the types of the
+    values returned and accepted by the helper, in one of these forms:
+ 
+      TYPES (type1, type2, ..., 0)
+      VTYPES (type1, type2, ..., 0)
+ 
+    VTYPES should be used should the helper accept a variable number of
+    arguments, TYPES otherwise.  The valid type names are:
+ 
+      `vt' for void.
+      `it' for signed int.
+      `ut' for unsigned int.
+      `pt' for void*.
+      `cpt' for const void*.
+      `st' for short int.
+      `ust' for unsigned short int.
+      `cst' for const char *.
+      `ullt' for unsigned long long.
+      `llt' for long long.
+      `u32t' for uint32.
+      `u64t' for uint64.
+   
+    In types descriptions, the firt entry corresponds to the value
+    returned by the helper.  Subsequent names correspond to the helper
+    arguments.  Finally, a 0 should close the list.
+ 
+    VERY IMPORTANT: the helper entries should be listed in the same
+    order than in the definition of __BPF_FUNC_MAPPER in
+    linux/include/uapi/linux/bpf.h!  */
+ 
+ DEF_HELPER (LINUX_V4_0, MAP_LOOKUP_ELEM, map_lookup_elem, TYPES (pt, pt, pt, 0))
+ DEF_HELPER (LINUX_V4_0, MAP_UPDATE_ELEM, map_update_elem, TYPES (it, pt, pt, pt, ullt, 0))
+ DEF_HELPER (LINUX_V4_0, MAP_DELETE_ELEM, map_delete_elem, TYPES (it, pt, pt, 0))
+ DEF_HELPER (LINUX_V4_1, PROBE_READ, probe_read, TYPES (it, pt, ut, cpt, 0))
+ DEF_HELPER (LINUX_V4_1, KTIME_GET_NS, ktime_get_ns, TYPES (ullt, 0))
+ DEF_HELPER (LINUX_V4_1, TRACE_PRINTK, trace_printk, VTYPES (it, cst, it, 0))
+ DEF_HELPER (LINUX_V4_1, GET_PRANDOM_U32, get_prandom_u32, TYPES (ullt, 0))
+ DEF_HELPER (LINUX_V4_1, GET_SMP_PROCESSOR_ID, get_smp_processor_id, TYPES (ullt, 0))
+ DEF_HELPER (LINUX_V4_1, SKB_STORE_BYTES, skb_store_bytes, TYPES (it, pt, it, pt, it, it, 0))
+ DEF_HELPER (LINUX_V4_1, L3_CSUM_REPLACE, l3_csum_replace, TYPES (it, pt, it, it ,it ,it, 0))
+ DEF_HELPER (LINUX_V4_1, L4_CSUM_REPLACE, l4_csum_replace, TYPES (it, pt, it, it, it, it, 0))
+ DEF_HELPER (LINUX_V4_2, TAIL_CALL, tail_call, TYPES (vt, pt, pt, it, 0))
+ DEF_HELPER (LINUX_V4_2, CLONE_REDIRECT, clone_redirect, TYPES (it, pt, it, it, 0))
+ DEF_HELPER (LINUX_V4_2, GET_CURRENT_PID_TGID, get_current_pid_tgid, TYPES (ullt, 0))
+ DEF_HELPER (LINUX_V4_2, GET_CURRENT_UID_GID, get_current_uid_gid, TYPES (ullt, 0))
+ DEF_HELPER (LINUX_V4_2, GET_CURRENT_COMM, get_current_comm, TYPES (it, pt, it, 0))
+ DEF_HELPER (LINUX_V4_3, GET_CGROUP_CLASSID, get_cgroup_classid, TYPES (it, pt, 0))
+ DEF_HELPER (LINUX_V4_3, SKB_VLAN_PUSH, skb_vlan_push, TYPES (it, pt, st, ust, 0))
+ DEF_HELPER (LINUX_V4_3, SKB_VLAN_POP, skb_vlan_pop, TYPES (it, pt, 0))
+ DEF_HELPER (LINUX_V4_3, SKB_GET_TUNNEL_KEY, skb_get_tunnel_key, TYPES (it, pt, pt, it, it, 0))
+ DEF_HELPER (LINUX_V4_3, SKB_SET_TUNNEL_KEY, skb_set_tunnel_key, TYPES (it, pt, pt, it, it, 0))
+ DEF_HELPER (LINUX_V4_3, PERF_EVENT_READ, perf_event_read, TYPES (ullt, pt, ullt, 0))
+ DEF_HELPER (LINUX_V4_4, REDIRECT, redirect, TYPES (it, it, it, 0))
+ DEF_HELPER (LINUX_V4_4, GET_ROUTE_REALM, get_route_realm, TYPES (ut, pt, 0))
+ DEF_HELPER (LINUX_V4_4, PERF_EVENT_OUTPUT, perf_event_output, \
+ 	    TYPES (it, pt, pt, ullt, pt, it, 0))
+ DEF_HELPER (LINUX_V4_5, SKB_LOAD_BYTES, skb_load_bytes, TYPES (it, pt, it, pt, it, 0))
+ DEF_HELPER (LINUX_V4_6, GET_STACKID, get_stackid, TYPES (it, pt, pt, it, 0))
+ DEF_HELPER (LINUX_V4_6, CSUM_DIFF, csum_diff, TYPES (it, pt, it, pt, it, it, 0))
+ DEF_HELPER (LINUX_V4_6, SKB_GET_TUNNEL_OPT, skb_get_tunnel_opt, TYPES (it, pt, pt, it, 0))
+ DEF_HELPER (LINUX_V4_6, SKB_SET_TUNNEL_OPT, skb_set_tunnel_opt, TYPES (it, pt, pt, it, 0))
+ DEF_HELPER (LINUX_V4_8, SKB_CHANGE_PROTO, skb_change_proto, TYPES (it, pt, st, u64t, 0))
+ DEF_HELPER (LINUX_V4_8, SKB_CHANGE_TYPE, skb_change_type, TYPES (it, pt, u32t, 0))
+ DEF_HELPER (LINUX_V4_8, SKB_UNDER_CGROUP, skb_under_cgroup, TYPES (it, pt, pt, it, 0))
+ DEF_HELPER (LINUX_V4_8, GET_HASH_RECALC, get_hash_recalc, TYPES (ut, pt, 0))
+ DEF_HELPER (LINUX_V4_8, GET_CURRENT_TASK, get_current_task, TYPES (ullt, 0))
+ DEF_HELPER (LINUX_V4_8, PROBE_WRITE_USER, probe_write_user, TYPES (it, pt, cpt, ut, 0))
+ DEF_HELPER (LINUX_V4_9, CURRENT_TASK_UNDER_CGROUP, current_task_under_cgroup, \
+ 	    TYPES (it, pt, it, 0))
+ DEF_HELPER (LINUX_V4_9, SKB_CHANGE_TAIL, skb_change_tail, TYPES (it, pt, ut, u64t, 0))
+ DEF_HELPER (LINUX_V4_9, SKB_PULL_DATA, skb_pull_data, TYPES (it, pt, it, 0))
+ DEF_HELPER (LINUX_V4_9, CSUM_UPDATE, csum_update, TYPES (llt, pt, u32t, 0))
+ DEF_HELPER (LINUX_V4_9, SET_HASH_INVALID, set_hash_invalid, TYPES (vt, pt, 0))
+ DEF_HELPER (LINUX_V4_10, GET_NUMA_NODE_ID, get_numa_node_id, TYPES (it, 0))
+ DEF_HELPER (LINUX_V4_10, SKB_CHANGE_HEAD, skb_change_head, TYPES (it, pt, it, it, 0))
+ DEF_HELPER (LINUX_V4_10, XDP_ADJUST_HEAD, xdp_adjust_head, TYPES (it, pt, it, 0))
+ DEF_HELPER (LINUX_V4_11, PROBE_READ_STR, probe_read_str, TYPES (it, pt, u32t, cpt, 0))
+ DEF_HELPER (LINUX_V4_12, GET_SOCKET_COOKIE, get_socket_cookie, TYPES (it, pt, 0))
+ DEF_HELPER (LINUX_V4_12, GET_SOCKET_UID, get_socket_uid, TYPES (ut, pt, 0))
+ DEF_HELPER (LINUX_V4_13, SET_HASH, set_hash, TYPES (ut, pt, u32t, 0))
+ DEF_HELPER (LINUX_V4_13, SETSOCKOPT, setsockopt, TYPES (it, pt, it, it, pt, it, 0))
+ DEF_HELPER (LINUX_V4_13, SKB_ADJUST_ROOM, skb_adjust_room, TYPES (it, pt, st, u32t, ullt, 0))
+ DEF_HELPER (LINUX_V4_14, REDIRECT_MAP, redirect_map, TYPES (it, pt, it, it, 0))
+ DEF_HELPER (LINUX_V4_14, SK_REDIRECT_MAP, sk_redirect_map, TYPES (it, pt, pt, it, it, 0))
+ DEF_HELPER (LINUX_V4_14, SOCK_MAP_UPDATE, sock_map_update, TYPES (it, pt, pt, pt, ullt, 0))
+ DEF_HELPER (LINUX_V4_15, XDP_ADJUST_META, xdp_adjust_meta, TYPES (it, pt, it, 0))
+ DEF_HELPER (LINUX_V4_15, PERF_EVENT_READ_VALUE, perf_event_read_value,
+ 	    TYPES (it, pt, ullt, pt, ut, 0))
+ DEF_HELPER (LINUX_V4_15, PERF_PROG_READ_VALUE, perf_prog_read_value,
+ 	    TYPES (it, pt, pt, ut, 0))
+ DEF_HELPER (LINUX_V4_15, GETSOCKOPT, getsockopt, TYPES (it, pt, it, it, pt, it, 0))
+ 
+ DEF_HELPER (LINUX_V4_16, OVERRIDE_RETURN, override_return, TYPES (it, pt, ult, 0))
+ DEF_HELPER (LINUX_V4_16, SOCK_OPS_CB_FLAGS_SET, sock_ops_cb_flags_set, TYPES (it, pt, it, 0))
+ DEF_HELPER (LINUX_V4_17, MSG_REDIRECT_MAP, msg_redirect_map, TYPES (it, pt, pt, it, it, 0))
+ DEF_HELPER (LINUX_V4_17, MSG_APPLY_BYTES, msg_apply_bytes, TYPES (it, pt, it, 0))
+ DEF_HELPER (LINUX_V4_17, MSG_CORK_BYTES, msg_cork_bytes, TYPES (it, pt, it, 0))
+ DEF_HELPER (LINUX_V4_17, MSG_PULL_DATA, msg_pull_data, TYPES (it, pt, it, it, it, 0))
+ DEF_HELPER (LINUX_V4_17, BIND, bind, TYPES (it, pt, pt, it, 0))
+ DEF_HELPER (LINUX_V4_18, XDP_ADJUST_TAIL, xdp_adjust_tail, TYPES (it, pt, it, 0))
+ DEF_HELPER (LINUX_V4_18, SKB_GET_XFRM_STATE,
+ 	    skb_get_xfrm_state, TYPES (it, pt, it, pt, it, it, 0))
+ DEF_HELPER (LINUX_V4_18, GET_STACK, get_stack, TYPES (it, pt, pt, it, it, 0))
+ DEF_HELPER (LINUX_V4_18, SKB_LOAD_BYTES_RELATIVE, skb_load_bytes_relative,
+ 	    TYPES (it, pt, it, pt, it, ut, 0))
+ DEF_HELPER (LINUX_V4_18, FIB_LOOKUP, fib_lookup, TYPES (it, pt, pt, it, ut, 0))
+ DEF_HELPER (LINUX_V4_18, SOCK_HASH_UPDATE, sock_hash_update, TYPES (it, pt, pt, pt, ullt, 0))
+ DEF_HELPER (LINUX_V4_18, MSG_REDIRECT_HASH, msg_redirect_hash, TYPES (it, pt, pt, pt, it, 0))
+ DEF_HELPER (LINUX_V4_18, SK_REDIRECT_HASH, sk_redirect_hash, TYPES (it, pt, pt, pt, it, 0))
+ DEF_HELPER (LINUX_V4_18, LWT_PUSH_ENCAP, lwt_push_encap, TYPES (it, pt, ut, pt, ut, 0))
+ DEF_HELPER (LINUX_V4_18, LWT_SEG6_STORE_BYTES, lwt_seg6_store_bytes,
+ 	    TYPES (it, pt, ut, pt, ut, 0))
+ DEF_HELPER (LINUX_V4_18, LWT_SEG6_ADJUST_SRH, lwt_seg6_adjust_srh, TYPES (it, pt, ut, ut, 0))
+ DEF_HELPER (LINUX_V4_18, LWT_SEG6_ACTION, lwt_seg6_action, TYPES (it, pt, ut, pt, ut, 0))
+ DEF_HELPER (LINUX_V4_18, RC_REPEAT, rc_repeat, TYPES (it, pt, 0))
+ DEF_HELPER (LINUX_V4_18, RC_KEYDOWN, rc_keydown, TYPES (it, pt, ut, ullt, ut, 0))
+ DEF_HELPER (LINUX_V4_18, SKB_CGROUP_ID, skb_cgroup_id, TYPES (ullt, pt, 0))
+ DEF_HELPER (LINUX_V4_18, GET_CURRENT_CGROUP_ID, get_current_cgroup_id, TYPES (ullt, 0))
+ DEF_HELPER (LINUX_V4_19, GET_LOCAL_STORAGE, get_local_storage, TYPES (pt, pt, ullt, 0))
+ DEF_HELPER (LINUX_V4_19, SK_SELECT_REUSEPORT, sk_select_reuseport,
+ 	    TYPES (it, pt, pt, pt, ut, 0))
+ DEF_HELPER (LINUX_V4_19, SKB_ANCESTOR_CGROUP_ID, skb_ancestor_cgroup_id,
+ 	    TYPES (ullt, pt, it, 0))
+ DEF_HELPER (LINUX_V4_20, SK_LOOKUP_TCP, sk_lookup_tcp, TYPES (pt, pt, pt, it, ullt, ullt, 0))
+ DEF_HELPER (LINUX_V4_20, SK_LOOKUP_UDP, sk_lookup_udp, TYPES (pt, pt, pt, it, ullt, ullt, 0))
+ DEF_HELPER (LINUX_V4_20, SK_RELEASE, sk_release, TYPES (it, pt, 0))
+ DEF_HELPER (LINUX_V4_20, MAP_PUSH_ELEM, map_push_elem, TYPES (it, pt, pt, ullt, 0))
+ DEF_HELPER (LINUX_V4_20, MAP_POP_ELEM, map_pop_elem, TYPES (it, pt, pt, 0))
+ DEF_HELPER (LINUX_V4_20, MAP_PEEK_ELEM, map_peek_elem, TYPES (it, pt, pt, 0))
+ DEF_HELPER (LINUX_V4_20, MSG_PUSH_DATA, msg_push_data, TYPES (it, pt, it, it, it, 0))
+ DEF_HELPER (LINUX_V5_0, MSG_POP_DATA, msg_pop_data, TYPES (it, pt, it, it, it, 0))
+ DEF_HELPER (LINUX_V5_0, RC_POINTER_REL, rc_pointer_rel, TYPES (it, pt, it, it, 0))
+ DEF_HELPER (LINUX_V5_1, SPIN_LOCK, spin_lock, TYPES (vt, pt, 0))
+ DEF_HELPER (LINUX_V5_1, SPIN_UNLOCK, spin_unlock, TYPES (vt, pt, 0))
+ DEF_HELPER (LINUX_V5_1, SK_FULLSOCK, sk_fullsock, TYPES (pt, pt, 0))
+ DEF_HELPER (LINUX_V5_1, TCP_SOCK, tcp_sock, TYPES (pt, pt, 0))
+ DEF_HELPER (LINUX_V5_1, SKB_ECN_SET_CE, skb_ecn_set_ce, TYPES (it, pt, 0))
+ DEF_HELPER (LINUX_V5_1, GET_LISTENER_SOCK, get_listener_sock, TYPES (pt, pt, 0))
+ DEF_HELPER (LINUX_V5_2, SKC_LOOKUP_TCP, skc_lookup_tcp,
+ 	    TYPES (pt, pt, pt, u32t, u64t, u64t, 0))
+ DEF_HELPER (LINUX_V5_2, TCP_CHECK_SYNCOOKIE, tcp_check_syncookie,
+ 	    TYPES (it, pt, pt, u32t, pt, u32t, 0))
+ DEF_HELPER (LINUX_V5_2, SYSCTL_GET_NAME, sysctl_get_name, TYPES (it, pt, pt, ullt, u64t, 0))
+ DEF_HELPER (LINUX_V5_2, SYSCTL_GET_CURRENT_VALUE, sysctl_get_current_value,
+ 	    TYPES (it, pt, pt, ullt, 0))
+ DEF_HELPER (LINUX_V5_2, SYSCTL_GET_NEW_VALUE, sysctl_get_new_value,
+ 	    TYPES (it, pt, pt, ullt, 0))
+ DEF_HELPER (LINUX_V5_2, SYSCTL_SET_NEW_VALUE, sysctl_set_new_value,
+ 	    TYPES (it, pt, pt, ullt, 0))
+ DEF_HELPER (LINUX_V5_2, STRTOL, strtol, TYPES (it, cst, ullt, u64t, pt, 0))
+ DEF_HELPER (LINUX_V5_2, STRTOUL, strtoul, TYPES (it, pt, ullt, u64t, pt, 0))
+ DEF_HELPER (LINUX_V5_2, SK_STORAGE_GET, sk_storage_get, TYPES (pt, pt, pt, pt, u64t, 0))
+ DEF_HELPER (LINUX_V5_2, SK_STORAGE_DELETE, sk_storage_delete, TYPES (it, pt, pt, 0))
+ 
+ /*
+ Local variables:
+ mode:c
+ End:
+ */
diff -Nrcpad gcc-9.3.0/gcc/config/bpf/bpf-helpers.h gcc-10.1.0/gcc/config/bpf/bpf-helpers.h
*** gcc-9.3.0/gcc/config/bpf/bpf-helpers.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/bpf/bpf-helpers.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,327 ----
+ /* Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+ 
+    Under Section 7 of GPL version 3, you are granted additional
+    permissions described in the GCC Runtime Library Exception, version
+    3.1, as published by the Free Software Foundation.
+ 
+    You should have received a copy of the GNU General Public License and
+    a copy of the GCC Runtime Library Exception along with this program;
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ /* The purpose of this file is to provide a compatiblity layer with
+    the Linux kernel bpf_helpers.h header that is located in
+    linux/tools/testing/selftests/bpf/bpf_helpers.h.  That file is
+    currently llvm-specific.  */
+ 
+ #ifndef __BPF_HELPERS_H
+ #define __BPF_HELPERS_H
+ 
+ #define SEC(NAME) __attribute__((section(NAME), used))
+ 
+ /* Flags used in some kernel helpers.  */
+ 
+ #define BPF_ANY     0
+ #define BPF_NOEXIST 1
+ #define BPF_EXIST   2
+ 
+ #define BPF_F_LOCK 4
+ #define BPF_F_NO_COMMON_LRU (1U << 1)
+ #define BPF_F_NUMA_NODE (1U << 2)
+ 
+ /* Functions to call kernel helpers.  We provide the "standard" bpf_*
+    names as synonyms of the corresponding GCC builtins.  In some
+    cases, where non-void pointers are passed to the helper, inline
+    functions are used to achieve proper type checking.  */
+ 
+ #ifndef KERNEL_VERSION
+ # define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))
+ #endif
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,0,0)
+ 
+ #define bpf_map_lookup_elem	__builtin_bpf_helper_map_lookup_elem
+ #define bpf_map_update_elem	__builtin_bpf_helper_map_update_elem
+ #define bpf_map_delete_elem	__builtin_bpf_helper_map_delete_elem
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,1,0)
+ 
+ #define bpf_probe_read		__builtin_bpf_helper_probe_read
+ #define bpf_ktime_get_ns	__builtin_bpf_helper_ktime_get_ns
+ #define bpf_trace_printk	__builtin_bpf_helper_trace_printk
+ #define bpf_get_prandom_u32	__builtin_bpf_helper_get_prandom_u32
+ #define bpf_get_smp_processor_id __builtin_bpf_helper_get_smp_processor_id
+ #define bpf_skb_store_bytes	__builtin_bpf_helper_skb_store_bytes
+ #define bpf_l3_csum_replace	__builtin_bpf_helper_l3_csum_replace
+ #define bpf_l4_csum_replace	__builtin_bpf_helper_l4_csum_replace
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,2,0)
+ 
+ #define bpf_tail_call		__builtin_bpf_helper_tail_call
+ #define bpf_clone_redirect	__builtin_bpf_helper_clone_redirect
+ #define bpf_get_current_pid_tgid __builtin_bpf_helper_get_current_pid_tgid
+ #define bpf_get_current_uid_gid  __builtin_bpf_helper_get_current_uid_gid
+ #define bpf_get_current_comm	__builtin_bpf_helper_get_current_comm
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,3,0)
+ 
+ #define bpf_get_cgroup_classid	__builtin_bpf_helper_get_cgroup_classid
+ #define bpf_skb_vlan_push	__builtin_bpf_helper_skb_vlan_push
+ #define bpf_skb_vlan_pop	__builtin_bpf_helper_skb_vlan_pop
+ #define bpf_skb_get_tunnel_key	__builtin_bpf_helper_skb_get_tunnel_key
+ #define bpf_skb_set_tunnel_key	__builtin_bpf_helper_skb_set_tunnel_key
+ #define bpf_perf_event_read	__builtin_bpf_helper_perf_event_read
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,4,0)
+ 
+ #define bpf_redirect		__builtin_bpf_helper_redirect
+ #define bpf_get_route_realm	__builtin_bpf_helper_get_route_realm
+ #define bpf_perf_event_output	__builtin_bpf_helper_perf_event_output
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,5,0)
+ 
+ #define bpf_skb_load_bytes	__builtin_bpf_helper_skb_load_bytes
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,6,0)
+ 
+ #define bpf_get_stackid		__builtin_bpf_helper_get_stackid
+ #define bpf_csum_diff		__builtin_bpf_helper_csum_diff
+ #define bpf_skb_get_tunnel_opt	__builtin_bpf_helper_skb_get_tunnel_opt
+ #define bpf_skb_set_tunnel_opt	__builtin_bpf_helper_skb_set_tunnel_opt
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,8,0)
+ 
+ #define bpf_skb_change_proto	__builtin_bpf_helper_skb_change_proto
+ #define bpf_skb_change_type	__builtin_bpf_helper_skb_change_type
+ #define bpf_skb_under_cgroup	__builtin_bpf_helper_skb_under_cgroup
+ #define bpf_get_hash_recalc	__builtin_bpf_helper_get_hash_recalc
+ #define bpf_get_current_task	__builtin_bpf_helper_get_current_task
+ #define bpf_probe_write_user	__builtin_bpf_helper_probe_write_user
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,9,0)
+ 
+ #define bpf_current_task_under_cgroup __builtin_bpf_helper_current_task_under_cgroup
+ #define bpf_skb_change_tail	__builtin_bpf_helper_skb_change_tail
+ #define bpf_skb_pull_data	__builtin_bpf_helper_skb_pull_data
+ #define bpf_csum_update		__builtin_bpf_helper_csum_update
+ #define bpf_set_hash_invalid	__builtin_bpf_helper_set_hash_invalid
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,10,0)
+ 
+ #define bpf_get_numa_node_id	__builtin_bpf_helper_get_numa_node_id
+ #define bpf_skb_change_head	__builtin_bpf_helper_skb_change_head
+ #define bpf_xdp_adjust_head	__builtin_bpf_helper_xdp_adjust_head
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,11,0)
+ 
+ #define bpf_probe_read_str	__builtin_bpf_helper_probe_read_str
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,12,0)
+ 
+ #define bpf_get_socket_cookie	__builtin_bpf_helper_get_socket_cookie
+ #define bpf_get_socket_uid	__builtin_bpf_helper_get_socket_uid
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,13,0)
+ 
+ #define bpf_set_hash		__builtin_bpf_helper_set_hash
+ #define bpf_setsockopt		__builtin_bpf_helper_setsockopt
+ #define bpf_skb_adjust_room	__builtin_bpf_helper_skb_adjust_room
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,14,0)
+ 
+ #define bpf_redirect_map	__builtin_bpf_helper_redirect_map
+ #define bpf_sk_redirect_map	__builtin_bpf_helper_sk_redirect_map
+ #define bpf_sock_map_update	__builtin_bpf_helper_sock_map_update
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,15,0)
+ 
+ #define bpf_perf_event_read_value __builtin_bpf_helper_perf_event_read_value
+ #define bpf_perf_prog_read_value  __builtin_bpf_helper_perf_prog_read_value
+ #define bpf_getsockopt		  __builtin_bpf_helper_getsockopt
+ #define bpf_xdp_adjust_meta	__builtin_bpf_helper_xdp_adjust_meta
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,16,0)
+ 
+ #define bpf_override_return	__builtin_bpf_helper_override_return
+ #define bpf_sock_ops_cb_flags_set __builtin_bpf_helper_sock_ops_cb_flags_set
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,17,0)
+ 
+ #define bpf_msg_redirect_map	__builtin_bpf_helper_msg_redirect_map
+ #define bpf_msg_apply_bytes	__builtin_bpf_helper_msg_apply_bytes
+ #define bpf_msg_cork_bytes	__builtin_bpf_helper_msg_cork_bytes
+ #define bpf_pull_data		__builtin_bpf_helper_pull_data
+ #define bpf_bind		__builtin_bpf_helper_bpf_bind
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,18,0)
+ 
+ #define bpf_xdp_adjust_tail	__builtin_bpf_helper_xdp_adjust_tail
+ #define bpf_skb_get_xfrm_state	__builtin_bpf_helper_skb_get_xfrm_state
+ #define bpf_get_stack		__builtin_bpf_helper_get_stack
+ #define bpf_skb_load_bytes_relative __builtin_bpf_helper_skb_load_bytes_relative
+ #define bpf_sock_hash_update	__builtin_bpf_helper_sock_hash_update
+ #define bpf_msg_redirect_hash	__builtin_bpf_helper_msg_redirect_hash
+ #define bpf_sk_redirect_hash	__builtin_bpf_helper_sk_redirect_hash
+ #define bpf_lwt_push_encap		__builtin_bpf_helper_lwt_push_encap
+ #define bpf_lwt_seg6_store_bytes	__builtin_bpf_helper_lwt_seg6_store_bytes
+ #define bpf_lwt_seg6_adjust_srh		__builtin_bpf_helper_lwt_seg6_adjust_srh
+ #define bpf_lwt_seg6_action		__builtin_bpf_helper_lwt_seg6_action
+ #define bpf_rc_repeat			__builtin_bpf_helper_rc_repeat
+ #define bpf_rc_keydown			__builtin_bpf_helper_rc_keydown
+ #define bpf_skb_cgroup_id		__builtin_bpf_helper_skb_cgroup_id
+ #define bpf_get_current_cgroup_id	__builtin_bpf_helper_get_current_cgroup_id
+ 
+ static inline int
+ bpf_fib_lookup (void *ctx, struct bpf_fib_lookup *param, int plen,
+ 		unsigned int flags)
+ {
+   return __builtin_bpf_helper_fib_lookup (ctx, (void *) param, plen, flags);
+ }
+ 
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,19,0)
+ 
+ #define bpf_get_local_storage	__builtin_bpf_helper_get_local_storage
+ #define bpf_sk_select_reuseport	__builtin_bpf_helper_sk_select_reuseport
+ #define bpf_skb_ancestor_cgroup_id	__builtin_bpf_helper_skb_ancestor_cgroup_id
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (4,20,0)
+ 
+ #define bpf_sk_release		__builtin_bpf_helper_sk_release
+ #define bpf_map_push_elem	__builtin_bpf_helper_map_push_elem
+ #define bpf_map_pop_elem	__builtin_bpf_helper_map_pop_elem
+ #define bpf_map_peek_elem	__builtin_bpf_helper_map_peek_elem
+ #define bpf_msg_push_data	__builtin_bpf_helper_msg_push_data
+ 
+ static inline struct bpf_sock *
+ bpf_sk_lookup_tcp (void *ctx, struct bpf_sock_tuple *tuple,
+ 		   int size, unsigned long long netns_id,
+ 		   unsigned long long flags)
+ {
+   return
+     (struct bpf_sock *) __builtin_bpf_helper_sk_lookup_tcp (ctx,
+ 							    (void *) tuple,
+ 							    size,
+ 							    netns_id, flags);
+ }
+ 
+ static inline struct bpf_sock *
+ bpf_sk_lookup_udp (void *ctx, struct bpf_sock_tuple *tuple,
+ 		   int size, unsigned long long netns_id,
+ 		   unsigned long long flags)
+ {
+   return
+     (struct bpf_sock *) __builtin_bpf_helper_sk_lookup_udp (ctx,
+ 							    (void *) tuple,
+ 							    size,
+ 							    netns_id, flags);
+ }
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (5,0,0)
+ 
+ #define bpf_msg_pop_data	__builtin_bpf_helper_pop_data
+ #define bpf_rc_pointer_rel	__builtin_bpf_helper_rc_pointer_rel
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (5,1,0)
+ 
+ #define bpf_spin_lock		__builtin_bpf_helper_spin_lock
+ #define bpf_spin_unlock		__builtin_bpf_helper_spin_unlock
+ #define bpf_skb_ecn_set_ce	__builtin_bpf_helper_skb_ecn_set_ce
+ 
+ static inline struct bpf_sock *
+ bpf_sk_fullsock (struct bpf_sock *sk)
+ {
+   return
+     (struct bpf_sock *) __builtin_bpf_helper_sk_fullsock ((void *) sk);
+ }
+ 
+ static inline struct bpf_sock *
+ bpf_tcp_sock (struct bpf_sock *sk)
+ {
+   return
+     (struct bpf_sock *) __builtin_bpf_helper_tcp_sock ((void *) sk);
+ }
+ 
+ static inline struct bpf_sock *
+ bpf_get_listener_sock (struct bpf_sock *sk)
+ {
+   return
+     (struct bpf_sock *) __builtin_bpf_helper_get_listener_sock ((void *) sk);
+ }
+ 
+ #if __BPF_KERNEL_VERSION_CODE__ >= KERNEL_VERSION (5,2,0)
+ 
+ 
+ #endif /* 5.2 */
+ #endif /* 5.1 */
+ #endif /* 5.0 */
+ #endif /* 4.20 */
+ #endif /* 4.19 */
+ #endif /* 4.18 */
+ #endif /* 4.17 */
+ #endif /* 4.16 */
+ #endif /* 4.15 */
+ #endif /* 4.14 */
+ #endif /* 4.13 */
+ #endif /* 4.12 */
+ #endif /* 4.11 */
+ #endif /* 4.10 */
+ #endif /* 4.9 */
+ #endif /* 4.8 */
+ #endif /* 4.6 */
+ #endif /* 4.5 */
+ #endif /* 4.4 */
+ #endif /* 4.3 */
+ #endif /* 4.2 */
+ #endif /* 4.1 */
+ #endif /* 4.0 */
+ 
+ /* Functions to emit BPF_LD_ABS and BPF_LD_IND instructions.  We
+    provide the "standard" names as synonyms of the corresponding GCC
+    builtins.  Note how the SKB argument is ignored.  */
+ 
+ static inline long long
+ load_byte (void *skb __attribute__ ((unused)),
+ 	   unsigned long long off)
+ {
+   return __builtin_bpf_load_byte (off);
+ }
+ 
+ static inline long long
+ load_half (void *skb __attribute__ ((unused)),
+ 	   unsigned long long off)
+ {
+   return __builtin_bpf_load_half (off);
+ }
+ 
+ static inline long long
+ load_word (void *skb __attribute__ ((unused)),
+ 	   unsigned long long off)
+ {
+   return __builtin_bpf_load_word (off);
+ }
+ 
+ struct bpf_map_def
+ {
+   unsigned int type;
+   unsigned int key_size;
+   unsigned int value_size;
+   unsigned int max_entries;
+   unsigned int map_flags;
+   unsigned int inner_map_idx;
+   unsigned int numa_node;
+ };
+ 
+ #endif /* ! __BPF_HELPERS_H */
diff -Nrcpad gcc-9.3.0/gcc/config/bpf/bpf-opts.h gcc-10.1.0/gcc/config/bpf/bpf-opts.h
*** gcc-9.3.0/gcc/config/bpf/bpf-opts.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/bpf/bpf-opts.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,56 ----
+ /* Definitions for option handling for eBPF.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef BPF_OPTS_H
+ #define BPF_OPTS_H
+ 
+ /* Supported versions of the Linux kernel.  */
+ enum bpf_kernel_version
+ {
+   /* Linux 4.x */
+   LINUX_V4_0,
+   LINUX_V4_1,
+   LINUX_V4_2,
+   LINUX_V4_3,
+   LINUX_V4_4,
+   LINUX_V4_5,
+   LINUX_V4_6,
+   LINUX_V4_7,
+   LINUX_V4_8,
+   LINUX_V4_9,
+   LINUX_V4_10,
+   LINUX_V4_11,
+   LINUX_V4_12,
+   LINUX_V4_13,
+   LINUX_V4_14,
+   LINUX_V4_15,
+   LINUX_V4_16,
+   LINUX_V4_17,
+   LINUX_V4_18,
+   LINUX_V4_19,
+   LINUX_V4_20,
+   /* Linux 5.x  */
+   LINUX_V5_0,
+   LINUX_V5_1,
+   LINUX_V5_2,
+   LINUX_LATEST = LINUX_V5_2,
+   LINUX_NATIVE,
+ };
+ 
+ #endif /* ! BPF_OPTS_H */
diff -Nrcpad gcc-9.3.0/gcc/config/bpf/bpf-protos.h gcc-10.1.0/gcc/config/bpf/bpf-protos.h
*** gcc-9.3.0/gcc/config/bpf/bpf-protos.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/bpf/bpf-protos.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,33 ----
+ /* Definition of eBPF target for GNU compiler.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_BPF_PROTOS_H
+ #define GCC_BPF_PROTOS_H
+ 
+ /* Routines implemented in bpf.c.  */
+ 
+ extern HOST_WIDE_INT bpf_initial_elimination_offset (int, int);
+ extern const char *bpf_output_call (rtx);
+ extern void bpf_target_macros (cpp_reader *);
+ extern void bpf_print_operand (FILE *, rtx, int);
+ extern void bpf_print_operand_address (FILE *, rtx);
+ extern void bpf_expand_prologue (void);
+ extern void bpf_expand_epilogue (void);
+ 
+ #endif /* ! GCC_BPF_PROTOS_H */
diff -Nrcpad gcc-9.3.0/gcc/config/bpf/bpf.c gcc-10.1.0/gcc/config/bpf/bpf.c
*** gcc-9.3.0/gcc/config/bpf/bpf.c	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/bpf/bpf.c	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,945 ----
+ /* Subroutines used for code generation for eBPF.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #define IN_TARGET_CODE 1
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tm.h"
+ #include "rtl.h"
+ #include "regs.h"
+ #include "insn-config.h"
+ #include "insn-attr.h"
+ #include "recog.h"
+ #include "output.h"
+ #include "alias.h"
+ #include "tree.h"
+ #include "stringpool.h"
+ #include "attribs.h"
+ #include "varasm.h"
+ #include "stor-layout.h"
+ #include "calls.h"
+ #include "function.h"
+ #include "explow.h"
+ #include "memmodel.h"
+ #include "emit-rtl.h"
+ #include "reload.h"
+ #include "tm_p.h"
+ #include "target.h"
+ #include "target-def.h"
+ #include "basic-block.h"
+ #include "expr.h"
+ #include "optabs.h"
+ #include "bitmap.h"
+ #include "df.h"
+ #include "c-family/c-common.h"
+ #include "diagnostic.h"
+ #include "builtins.h"
+ #include "predict.h"
+ #include "langhooks.h"
+ 
+ /* Per-function machine data.  */
+ struct GTY(()) machine_function
+ {
+   /* Number of bytes saved on the stack for local variables.  */
+   int local_vars_size;
+ 
+   /* Number of bytes saved on the stack for callee-saved
+      registers.  */
+   int callee_saved_reg_size;
+ };
+ 
+ /* Data structures for the eBPF specific built-ins.  */
+ 
+ /* Maximum number of arguments taken by a builtin function, plus
+    one.  */
+ #define BPF_BUILTIN_MAX_ARGS 5
+ 
+ enum bpf_builtins
+ {
+   BPF_BUILTIN_UNUSED = 0,
+   /* Built-ins for kernel helpers.  */
+ #define DEF_HELPER(V,D,N,T) BPF_BUILTIN_HELPER_##D,
+ #  include "bpf-helpers.def"
+ #undef DEF_HELPER
+   BPF_BUILTIN_HELPER_MAX,
+   /* Built-ins for non-generic loads and stores.  */
+   BPF_BUILTIN_LOAD_BYTE = BPF_BUILTIN_HELPER_MAX,
+   BPF_BUILTIN_LOAD_HALF,
+   BPF_BUILTIN_LOAD_WORD,
+   BPF_BUILTIN_MAX,
+ };
+ 
+ /* This table is indexed by an enum bpf_builtin.  */
+ static const char *bpf_helper_names[] =
+ {
+   NULL,
+ #define DEF_HELPER(V,D,N,T) #N,
+ #  include "bpf-helpers.def"
+ #undef DEF_HELPER
+   NULL,
+   NULL,
+   NULL,
+   NULL
+ };
+ 
+ /* Return the builtin code corresponding to the kernel helper builtin
+    __builtin_NAME, or 0 if the name doesn't correspond to a kernel
+    helper builtin.  */
+ 
+ static inline int
+ bpf_helper_code (const char *name)
+ {
+   int i;
+ 
+   for (i = 1; i < BPF_BUILTIN_HELPER_MAX; ++i)
+     if (strcmp (name, bpf_helper_names[i]) == 0)
+       return i;
+ 
+   return 0;
+ }
+ 
+ static GTY (()) tree bpf_builtins[(int) BPF_BUILTIN_MAX];
+ 
+ /* Initialize the per-function machine status.  */
+ 
+ static struct machine_function *
+ bpf_init_machine_status (void)
+ {
+   /* Note this initializes all fields to 0, which is just OK for
+      us.  */
+   return ggc_cleared_alloc<machine_function> ();
+ }
+ 
+ /* Override options and do some other initialization.  */
+ 
+ static void
+ bpf_option_override (void)
+ {
+   /* Set the initializer for the per-function status structure.  */
+   init_machine_status = bpf_init_machine_status;
+ }
+ 
+ #undef TARGET_OPTION_OVERRIDE
+ #define TARGET_OPTION_OVERRIDE bpf_option_override
+ 
+ /* Define target-specific CPP macros.  This function in used in the
+    definition of TARGET_CPU_CPP_BUILTINS in bpf.h */
+ 
+ #define builtin_define(TXT) cpp_define (pfile, TXT)
+ 
+ void
+ bpf_target_macros (cpp_reader *pfile)
+ {
+   builtin_define ("__BPF__");
+   
+   if (TARGET_BIG_ENDIAN)
+     builtin_define ("__BPF_BIG_ENDIAN__");
+   else
+     builtin_define ("__BPF_LITTLE_ENDIAN__");
+ 
+   /* Define BPF_KERNEL_VERSION_CODE */
+   {
+     const char *version_code;
+     char *kernel_version_code;
+ 
+     switch (bpf_kernel)
+       {
+       case LINUX_V4_0: version_code = "0x40000"; break;
+       case LINUX_V4_1: version_code = "0x40100"; break;
+       case LINUX_V4_2: version_code = "0x40200"; break;
+       case LINUX_V4_3: version_code = "0x40300"; break;
+       case LINUX_V4_4: version_code = "0x40400"; break;
+       case LINUX_V4_5: version_code = "0x40500"; break;
+       case LINUX_V4_6: version_code = "0x40600"; break;
+       case LINUX_V4_7: version_code = "0x40700"; break;
+       case LINUX_V4_8: version_code = "0x40800"; break;
+       case LINUX_V4_9: version_code = "0x40900"; break;
+       case LINUX_V4_10: version_code = "0x40a00"; break;
+       case LINUX_V4_11: version_code = "0x40b00"; break;
+       case LINUX_V4_12: version_code = "0x40c00"; break;
+       case LINUX_V4_13: version_code = "0x40d00"; break;
+       case LINUX_V4_14: version_code = "0x40e00"; break;
+       case LINUX_V4_15: version_code = "0x40f00"; break;
+       case LINUX_V4_16: version_code = "0x41000"; break;
+       case LINUX_V4_17: version_code = "0x42000"; break;
+       case LINUX_V4_18: version_code = "0x43000"; break;
+       case LINUX_V4_19: version_code = "0x44000"; break;
+       case LINUX_V4_20: version_code = "0x45000"; break;
+       case LINUX_V5_0: version_code = "0x50000"; break;
+       case LINUX_V5_1: version_code = "0x50100"; break;
+       case LINUX_V5_2: version_code = "0x50200"; break;
+       default:
+ 	gcc_unreachable ();      
+       }
+ 
+     kernel_version_code = ACONCAT (("__BPF_KERNEL_VERSION_CODE__=",
+ 				    version_code, NULL));
+     builtin_define (kernel_version_code);
+   }
+ }
+ 
+ /* Output assembly directives to switch to section NAME.  The section
+    should have attributes as specified by FLAGS, which is a bit mask
+    of the 'SECTION_*' flags defined in 'output.h'.  If DECL is
+    non-NULL, it is the 'VAR_DECL' or 'FUNCTION_DECL' with which this
+    section is associated.  */
+ 
+ static void
+ bpf_asm_named_section (const char *name,
+ 		       unsigned int flags ATTRIBUTE_UNUSED,
+ 		       tree decl ATTRIBUTE_UNUSED)
+ {
+   fprintf (asm_out_file, "\t.section\t%s\n", name);
+ }
+ 
+ #undef TARGET_ASM_NAMED_SECTION
+ #define TARGET_ASM_NAMED_SECTION bpf_asm_named_section
+ 
+ /* Return an RTX representing the place where a function returns or
+    receives a value of data type RET_TYPE, a tree node representing a
+    data type.  */
+ 
+ static rtx
+ bpf_function_value (const_tree ret_type,
+ 		    const_tree fntype_or_decl,
+ 		    bool outgoing ATTRIBUTE_UNUSED)
+ {
+   enum machine_mode mode;
+   int unsignedp;
+ 
+   mode = TYPE_MODE (ret_type);
+   if (INTEGRAL_TYPE_P (ret_type))
+     mode = promote_function_mode (ret_type, mode, &unsignedp,
+ 				  fntype_or_decl, 1);
+ 
+   return gen_rtx_REG (mode, BPF_R0);
+ }
+ 
+ #undef TARGET_FUNCTION_VALUE
+ #define TARGET_FUNCTION_VALUE bpf_function_value
+ 
+ /* Return true if REGNO is the number of a hard register in which the
+    values of called function may come back.  */
+ 
+ static bool
+ bpf_function_value_regno_p (const unsigned int regno)
+ {
+   return (regno == BPF_R0);
+ }
+ 
+ #undef TARGET_FUNCTION_VALUE_REGNO_P
+ #define TARGET_FUNCTION_VALUE_REGNO_P bpf_function_value_regno_p
+ 
+ /* Compute the size of the function's stack frame, including the local
+    area and the register-save area.  */
+ 
+ static void
+ bpf_compute_frame_layout (void)
+ {
+   int stack_alignment = STACK_BOUNDARY / BITS_PER_UNIT;
+   int padding_locals, regno;
+ 
+   /* Set the space used in the stack by local variables.  This is
+      rounded up to respect the minimum stack alignment.  */
+   cfun->machine->local_vars_size = get_frame_size ();
+ 
+   padding_locals = cfun->machine->local_vars_size % stack_alignment;
+   if (padding_locals)
+     padding_locals = stack_alignment - padding_locals;
+ 
+   cfun->machine->local_vars_size += padding_locals;
+ 
+   /* Set the space used in the stack by callee-saved used registers in
+      the current function.  There is no need to round up, since the
+      registers are all 8 bytes wide.  */
+   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
+     if ((df_regs_ever_live_p (regno)
+ 	 && !call_used_or_fixed_reg_p (regno))
+ 	|| (cfun->calls_alloca
+ 	    && regno == STACK_POINTER_REGNUM))
+       cfun->machine->callee_saved_reg_size += 8;
+ 
+   /* Check that the total size of the frame doesn't exceed the limit
+      imposed by eBPF.  */
+   if ((cfun->machine->local_vars_size
+        + cfun->machine->callee_saved_reg_size) > bpf_frame_limit)
+     {
+       static int stack_limit_exceeded = 0;
+ 
+       if (!stack_limit_exceeded)
+ 	error ("eBPF stack limit exceeded");
+       stack_limit_exceeded = 1;
+     }
+ }
+ 
+ #undef TARGET_COMPUTE_FRAME_LAYOUT
+ #define TARGET_COMPUTE_FRAME_LAYOUT bpf_compute_frame_layout
+ 
+ /* Expand to the instructions in a function prologue.  This function
+    is called when expanding the 'prologue' pattern in bpf.md.  */
+ 
+ void
+ bpf_expand_prologue (void)
+ {
+   int regno, fp_offset;
+   rtx insn;
+   HOST_WIDE_INT size;
+ 
+   size = (cfun->machine->local_vars_size
+ 	  + cfun->machine->callee_saved_reg_size);
+   fp_offset = -cfun->machine->local_vars_size;
+ 
+   /* Save callee-saved hard registes.  The register-save-area starts
+      right after the local variables.  */
+   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
+     {
+       if ((df_regs_ever_live_p (regno)
+ 	   && !call_used_or_fixed_reg_p (regno))
+ 	  || (cfun->calls_alloca
+ 	      && regno == STACK_POINTER_REGNUM))
+ 	{
+ 	  rtx mem;
+ 
+ 	  if (!IN_RANGE (fp_offset, -1 - 0x7fff, 0x7fff))
+ 	    /* This has been already reported as an error in
+ 	       bpf_compute_frame_layout. */
+ 	    break;
+ 	  else
+ 	    {
+ 	      mem = gen_frame_mem (DImode,
+ 				   plus_constant (DImode,
+ 						  hard_frame_pointer_rtx,
+ 						  fp_offset - 8));
+ 	      insn = emit_move_insn (mem, gen_rtx_REG (DImode, regno));
+ 	      RTX_FRAME_RELATED_P (insn) = 1;
+ 	      fp_offset -= 8;
+ 	    }
+ 	}
+     }
+ 
+   /* Set the stack pointer, if the function allocates space
+      dynamically.  Note that the value of %sp should be directly
+      derived from %fp, for the kernel verifier to track it as a stack
+      accessor.  */
+   if (cfun->calls_alloca)
+     {
+       insn = emit_move_insn (stack_pointer_rtx,
+ 			     hard_frame_pointer_rtx);
+       RTX_FRAME_RELATED_P (insn) = 1;
+       
+       if (size > 0)
+ 	{
+ 	  insn = emit_insn (gen_rtx_SET (stack_pointer_rtx,
+ 					 gen_rtx_PLUS (Pmode,
+ 						       stack_pointer_rtx,
+ 						       GEN_INT (-size))));
+ 	  RTX_FRAME_RELATED_P (insn) = 1;
+ 	}
+     }
+ }
+ 
+ /* Expand to the instructions in a function epilogue.  This function
+    is called when expanding the 'epilogue' pattern in bpf.md.  */
+ 
+ void
+ bpf_expand_epilogue (void)
+ {
+   int regno, fp_offset;
+   rtx insn;
+ 
+   fp_offset = -cfun->machine->local_vars_size;
+ 
+   /* Restore callee-saved hard registes from the stack.  */
+   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
+     {
+       if ((df_regs_ever_live_p (regno)
+ 	   && !call_used_or_fixed_reg_p (regno))
+ 	  || (cfun->calls_alloca
+ 	      && regno == STACK_POINTER_REGNUM))
+ 	{
+ 	  rtx mem;
+ 
+ 	  if (!IN_RANGE (fp_offset, -1 - 0x7fff, 0x7fff))
+ 	    /* This has been already reported as an error in
+ 	       bpf_compute_frame_layout. */
+ 	    break;
+ 	  else
+ 	    {
+ 	      mem = gen_frame_mem (DImode,
+ 				   plus_constant (DImode,
+ 						  hard_frame_pointer_rtx,
+ 						  fp_offset - 8));
+ 	      insn = emit_move_insn (gen_rtx_REG (DImode, regno), mem);
+ 	      RTX_FRAME_RELATED_P (insn) = 1;
+ 	      fp_offset -= 8;
+ 	    }
+ 	}
+     }
+ 
+   emit_jump_insn (gen_exit ());
+ }
+ 
+ /* Return the initial difference between the specified pair of
+    registers.  The registers that can figure in FROM, and TO, are
+    specified by ELIMINABLE_REGS in bpf.h.
+ 
+    This function is used in the definition of
+    INITIAL_ELIMINATION_OFFSET in bpf.h  */
+ 
+ HOST_WIDE_INT
+ bpf_initial_elimination_offset (int from, int to)
+ {
+   HOST_WIDE_INT ret;
+ 
+   if (from == ARG_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
+     ret = (cfun->machine->local_vars_size
+ 	   + cfun->machine->callee_saved_reg_size);
+   else if (from == ARG_POINTER_REGNUM && to == FRAME_POINTER_REGNUM)
+     ret = 0;
+   else
+     gcc_unreachable ();
+ 
+   return ret;
+ }
+ 
+ /* Return the number of consecutive hard registers, starting at
+    register number REGNO, required to hold a value of mode MODE.  */
+ 
+ static unsigned int
+ bpf_hard_regno_nregs (unsigned int regno ATTRIBUTE_UNUSED,
+ 		      enum machine_mode mode)
+ {
+   return CEIL (GET_MODE_SIZE (mode), UNITS_PER_WORD);
+ }
+ 
+ #undef TARGET_HARD_REGNO_NREGS
+ #define TARGET_HARD_REGNO_NREGS bpf_hard_regno_nregs
+ 
+ /* Return true if it is permissible to store a value of mode MODE in
+    hard register number REGNO, or in several registers starting with
+    that one.  */
+ 
+ static bool
+ bpf_hard_regno_mode_ok (unsigned int regno ATTRIBUTE_UNUSED,
+ 			enum machine_mode mode)
+ {
+   switch (mode)
+     {
+     case E_SImode:
+     case E_DImode:
+     case E_HImode:
+     case E_QImode:
+     case E_TImode:
+     case E_SFmode:
+     case E_DFmode:
+       return true;
+     default:
+       return false;
+     }
+ }
+ 
+ #undef TARGET_HARD_REGNO_MODE_OK
+ #define TARGET_HARD_REGNO_MODE_OK bpf_hard_regno_mode_ok
+ 
+ /* Return true if a function must have and use a frame pointer.  */
+ 
+ static bool
+ bpf_frame_pointer_required (void)
+ {
+   /* We do not have a stack pointer, so we absolutely depend on the
+      frame-pointer in order to access the stack... and fishes walk and
+      pigs fly glglgl */
+   return true;
+ }
+ 
+ #undef TARGET_FRAME_POINTER_REQUIRED
+ #define TARGET_FRAME_POINTER_REQUIRED bpf_frame_pointer_required
+ 
+ /* Return `true' if the given RTX X is a valid base for an indirect
+    memory access.  STRICT has the same meaning than in
+    bpf_legitimate_address_p.  */
+ 
+ static inline bool
+ bpf_address_base_p (rtx x, bool strict)
+ {
+   return (GET_CODE (x) == REG
+ 	  && (REGNO (x) < 11
+ 	      || (!strict && REGNO (x) >= FIRST_PSEUDO_REGISTER)));
+ }
+ 
+ /* Return true if X (a RTX) is a legitimate memory address on the
+    target machine for a memory operand of mode MODE.  */
+ 
+ static bool
+ bpf_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED,
+ 			  rtx x,
+ 			  bool strict)
+ {
+   switch (GET_CODE (x))
+     {
+     case REG:
+       return bpf_address_base_p (x, strict);
+ 
+     case PLUS:
+       {
+ 	/* Accept (PLUS ADDR_BASE CONST_INT), provided CONST_INT fits
+ 	   in a signed 16-bit.
+ 
+ 	   Note that LABEL_REF and SYMBOL_REF are not allowed in
+ 	   REG+IMM addresses, because it is almost certain they will
+ 	   overload the offset field.  */
+ 
+ 	rtx x0 = XEXP (x, 0);
+ 	rtx x1 = XEXP (x, 1);
+ 	
+ 	if (bpf_address_base_p (x0, strict) && GET_CODE (x1) == CONST_INT)
+ 	  return IN_RANGE (INTVAL (x1), -1 - 0x7fff, 0x7fff);
+ 
+ 	break;
+       }
+     default:
+       break;
+     }
+ 
+   return false;
+ }
+ 
+ #undef TARGET_LEGITIMATE_ADDRESS_P
+ #define TARGET_LEGITIMATE_ADDRESS_P bpf_legitimate_address_p
+ 
+ /* Describe the relative costs of RTL expressions.  Return true when
+    all subexpressions of X have been processed, and false when
+    `rtx_cost' should recurse.  */
+ 
+ static bool
+ bpf_rtx_costs (rtx x ATTRIBUTE_UNUSED,
+ 	       enum machine_mode mode ATTRIBUTE_UNUSED,
+ 	       int outer_code ATTRIBUTE_UNUSED,
+ 	       int opno ATTRIBUTE_UNUSED,
+                int *total ATTRIBUTE_UNUSED,
+ 	       bool speed ATTRIBUTE_UNUSED)
+ {
+   /* To be written.  */
+   return false;
+ }
+ 
+ #undef TARGET_RTX_COSTS
+ #define TARGET_RTX_COSTS bpf_rtx_costs
+ 
+ /* Return true if an argument at the position indicated by CUM should
+    be passed by reference.  If the hook returns true, a copy of that
+    argument is made in memory and a pointer to the argument is passed
+    instead of the argument itself.  */
+ 
+ static bool
+ bpf_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
+ 		       const function_arg_info &arg)
+ {
+   unsigned num_bytes = arg.type_size_in_bytes ();
+ 
+   /* Pass aggregates and values bigger than 5 words by reference.
+      Everything else is passed by copy.  */
+   return (arg.aggregate_type_p () || (num_bytes > 8*5));
+ }
+ 
+ #undef TARGET_PASS_BY_REFERENCE
+ #define TARGET_PASS_BY_REFERENCE bpf_pass_by_reference
+ 
+ /* Return a RTX indicating whether a function argument is passed in a
+    register and if so, which register.  */
+ 
+ static rtx
+ bpf_function_arg (cumulative_args_t ca, const function_arg_info &arg)
+ {
+   CUMULATIVE_ARGS *cum = get_cumulative_args (ca);
+ 
+   if (*cum < 5)
+     return gen_rtx_REG (arg.mode, *cum + 1);
+   else
+     /* An error will be emitted for this in
+        bpf_function_arg_advance.  */
+     return NULL_RTX;
+ }
+ 
+ #undef TARGET_FUNCTION_ARG
+ #define TARGET_FUNCTION_ARG bpf_function_arg
+ 
+ /* Update the summarizer variable pointed by CA to advance past an
+    argument in the argument list.  */
+ 
+ static void
+ bpf_function_arg_advance (cumulative_args_t ca,
+ 			  const function_arg_info &arg)
+ {
+   CUMULATIVE_ARGS *cum = get_cumulative_args (ca);
+   unsigned num_bytes = arg.type_size_in_bytes ();
+   unsigned num_words = CEIL (num_bytes, UNITS_PER_WORD);
+ 
+   if (*cum <= 5 && *cum + num_words > 5)
+     error ("too many function arguments for eBPF");
+ 
+   *cum += num_words;
+ }
+ 
+ #undef TARGET_FUNCTION_ARG_ADVANCE
+ #define TARGET_FUNCTION_ARG_ADVANCE bpf_function_arg_advance
+ 
+ /* Output the assembly code for a constructor.  Since eBPF doesn't
+    support indirect calls, constructors are not supported.  */
+ 
+ static void
+ bpf_output_constructor (rtx symbol, int priority ATTRIBUTE_UNUSED)
+ {
+   tree decl = SYMBOL_REF_DECL (symbol);
+ 
+   if (decl)
+     sorry_at (DECL_SOURCE_LOCATION (decl),
+ 	      "no constructors");
+   else
+     sorry ("no constructors");
+ }
+ 
+ #undef TARGET_ASM_CONSTRUCTOR
+ #define TARGET_ASM_CONSTRUCTOR bpf_output_constructor
+ 
+ /* Output the assembly code for a destructor.  Since eBPF doesn't
+    support indirect calls, destructors are not supported.  */
+ 
+ static void
+ bpf_output_destructor (rtx symbol, int priority ATTRIBUTE_UNUSED)
+ {
+   tree decl = SYMBOL_REF_DECL (symbol);
+ 
+   if (decl)
+     sorry_at (DECL_SOURCE_LOCATION (decl),
+ 	      "no destructors");
+   else
+     sorry ("no destructors");
+ }
+ 
+ #undef TARGET_ASM_DESTRUCTOR
+ #define TARGET_ASM_DESTRUCTOR bpf_output_destructor
+ 
+ /* Return the appropriate instruction to CALL to a function.  TARGET
+    is an RTX denoting the address of the called function.
+ 
+    The main purposes of this function are:
+    - To reject indirect CALL instructions, which are not supported by
+      eBPF.
+    - To recognize calls to kernel helper functions and emit the
+      corresponding CALL N instruction.
+ 
+    This function is called from the expansion of the 'call' pattern in
+    bpf.md.  */
+ 
+ const char *
+ bpf_output_call (rtx target)
+ {
+   rtx xops[1];
+ 
+   switch (GET_CODE (target))
+     {
+     case CONST_INT:
+       output_asm_insn ("call\t%0", &target);
+       break;
+     case SYMBOL_REF:
+       {
+ 	const char *function_name = XSTR (target, 0);
+ 	int code;
+       
+ 	if (strncmp (function_name, "__builtin_bpf_helper_", 21) == 0
+ 	    && ((code = bpf_helper_code (function_name + 21)) != 0))
+ 	  {
+ 	    xops[0] = GEN_INT (code);
+ 	    output_asm_insn ("call\t%0", xops);
+ 	  }
+ 	else
+ 	  output_asm_insn ("call\t%0", &target);
+ 
+ 	break;
+       }
+     default:
+       error ("indirect call in function, which are not supported by eBPF");
+       output_asm_insn ("call 0", NULL);
+       break;
+     }
+ 
+   return "";
+ }
+ 
+ /* Print an instruction operand.  This function is called in the macro
+    PRINT_OPERAND defined in bpf.h */
+ 
+ void
+ bpf_print_operand (FILE *file, rtx op, int code ATTRIBUTE_UNUSED)
+ {
+   switch (GET_CODE (op))
+     {
+     case REG:
+       fprintf (file, "%s", reg_names[REGNO (op)]);
+       break;
+     case MEM:
+       output_address (GET_MODE (op), XEXP (op, 0));
+       break;
+     case CONST_DOUBLE:
+       if (CONST_DOUBLE_HIGH (op))
+ 	fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
+ 		 CONST_DOUBLE_HIGH (op), CONST_DOUBLE_LOW (op));
+       else if (CONST_DOUBLE_LOW (op) < 0)
+ 	fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (op));
+       else
+ 	fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (op));
+       break;
+     default:
+       output_addr_const (file, op);
+     }
+ }
+ 
+ /* Print an operand which is an address.  This function should handle
+    any legit address, as accepted by bpf_legitimate_address_p, and
+    also addresses that are valid in CALL instructions.
+ 
+    This function is called in the PRINT_OPERAND_ADDRESS macro defined
+    in bpf.h */
+ 
+ void
+ bpf_print_operand_address (FILE *file, rtx addr)
+ {
+   switch (GET_CODE (addr))
+     {
+     case REG:
+       fprintf (file, "[%s+0]", reg_names[REGNO (addr)]);
+       break;
+     case PLUS:
+       {
+ 	rtx op0 = XEXP (addr, 0);
+ 	rtx op1 = XEXP (addr, 1);
+ 
+ 	if (GET_CODE (op0) == REG && GET_CODE (op1) == CONST_INT)
+ 	  {
+ 	    fprintf (file, "[%s+", reg_names[REGNO (op0)]);
+ 	    output_addr_const (file, op1);
+ 	    fputs ("]", file);
+ 	  }
+ 	else
+ 	  fatal_insn ("invalid address in operand", addr);
+ 	break;
+       }
+     case MEM:
+       /* Fallthrough.  */
+     case LABEL_REF:
+       /* Fallthrough.  */
+       fatal_insn ("unsupported operand", addr);
+       break;
+     default:
+       output_addr_const (file, addr);
+       break;
+     }
+ }
+ 
+ /* Add a BPF builtin function with NAME, CODE and TYPE.  Return
+    the function decl or NULL_TREE if the builtin was not added.  */
+ 
+ static tree
+ def_builtin (const char *name, enum bpf_builtins code, tree type)
+ {
+   tree t
+     = add_builtin_function (name, type, code, BUILT_IN_MD, NULL, NULL_TREE);
+ 
+   bpf_builtins[code] = t;
+   return t;
+ }
+ 
+ /* Define machine-specific built-in functions.  */
+ 
+ static void
+ bpf_init_builtins (void)
+ {
+   /* Built-ins for calling kernel helpers.  */
+ 
+   tree pt = build_pointer_type (void_type_node);
+   tree const_void_type
+     = build_qualified_type (void_type_node, TYPE_QUAL_CONST);
+   tree cpt = build_pointer_type (const_void_type);
+   tree st = short_integer_type_node;
+   tree ust = uint16_type_node;
+   tree it = integer_type_node;
+   tree ut = unsigned_type_node;
+   tree const_char_type
+     = build_qualified_type (char_type_node, TYPE_QUAL_CONST);
+   tree cst = build_pointer_type (const_char_type);
+   tree vt = void_type_node;
+   tree ult = long_unsigned_type_node;
+   tree u32t = uint32_type_node;
+   tree u64t = uint64_type_node;
+   tree llt = long_long_integer_type_node;
+   tree ullt = long_long_unsigned_type_node;
+   
+ #define TYPES build_function_type_list
+ #define VTYPES build_varargs_function_type_list
+ #define DEF_HELPER(V,D,N,T)				\
+   do							\
+     {							\
+       if (bpf_kernel >= (V))				\
+ 	def_builtin ("__builtin_bpf_helper_" #N,	\
+ 		     BPF_BUILTIN_HELPER_##D,		\
+ 		     T);				\
+     } while (0);
+ #  include "bpf-helpers.def"
+ #undef TYPES
+ #undef VTYPES
+ #undef DEF_HELPER
+ 
+   /* Built-ins for BPF_LD_ABS and BPF_LD_IND instructions.  */
+ 
+   def_builtin ("__builtin_bpf_load_byte", BPF_BUILTIN_LOAD_BYTE,
+ 	       build_function_type_list (ullt, ullt, 0));
+   def_builtin ("__builtin_bpf_load_half", BPF_BUILTIN_LOAD_HALF,
+ 	       build_function_type_list (ullt, ullt, 0));
+   def_builtin ("__builtin_bpf_load_word", BPF_BUILTIN_LOAD_WORD,
+ 	       build_function_type_list (ullt, ullt, 0));
+ }
+ 
+ #undef TARGET_INIT_BUILTINS
+ #define TARGET_INIT_BUILTINS bpf_init_builtins
+ 
+ /* Expand a call to a BPF-specific built-in function that was set up
+    with bpf_init_builtins.  */
+ 
+ static rtx
+ bpf_expand_builtin (tree exp, rtx target,
+ 		    rtx subtarget ATTRIBUTE_UNUSED,
+ 		    machine_mode mode ATTRIBUTE_UNUSED,
+ 		    int ignore)
+ {
+   tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
+   int code = DECL_MD_FUNCTION_CODE (fndecl);
+ 
+   if (code >= 1 && code < BPF_BUILTIN_HELPER_MAX)
+     {
+       /* This is a builtin to call a kernel helper function.
+ 
+ 	 For these builtins, we just expand the function call normally
+ 	 with expand_call like we would do for a libcall. The function
+ 	 bpf_output_call below will then do The Right Thing (TM),
+ 	 recognizing the name of the called __builtin_helper_* symbol
+ 	 and emitting the corresponding CALL N instruction whenever
+ 	 necessary.  */
+ 
+       return expand_call (exp, target, ignore);
+     }
+   else if (code == BPF_BUILTIN_LOAD_BYTE
+ 	   || code == BPF_BUILTIN_LOAD_HALF
+ 	   || code == BPF_BUILTIN_LOAD_WORD)
+     {
+       /* Expand an indirect load from the sk_buff in the context.
+ 	 There is just one argument to the builtin, which is the
+ 	 offset.
+ 
+ 	 We try first to expand a ldabs* instruction.  In case this
+ 	 fails, we try a ldind* instruction.  */
+ 
+       enum insn_code abs_icode
+ 	= (code == BPF_BUILTIN_LOAD_BYTE ? CODE_FOR_ldabsb
+ 	   : code == BPF_BUILTIN_LOAD_HALF ? CODE_FOR_ldabsh
+ 	   : CODE_FOR_ldabsw);
+ 
+       enum insn_code ind_icode
+ 	= (code == BPF_BUILTIN_LOAD_BYTE ? CODE_FOR_ldindb
+ 	   : code == BPF_BUILTIN_LOAD_HALF ? CODE_FOR_ldindh
+ 	   : CODE_FOR_ldindw);
+ 
+       tree offset_arg = CALL_EXPR_ARG (exp, 0);
+       struct expand_operand ops[2];
+ 
+       create_input_operand (&ops[0], expand_normal (offset_arg),
+ 			    TYPE_MODE (TREE_TYPE (offset_arg)));
+       create_input_operand (&ops[1], const0_rtx, SImode);
+ 
+       if (!maybe_expand_insn (abs_icode, 2, ops)
+ 	  && !maybe_expand_insn (ind_icode, 2, ops))
+ 	{
+ 	  error ("invalid argument to built-in function");
+ 	  return gen_rtx_REG (ops[0].mode, BPF_R0);
+ 	}
+ 
+       /* The result of the load is in R0.  */
+       return gen_rtx_REG (ops[0].mode, BPF_R0);
+     }
+ 
+   gcc_unreachable ();
+ }
+ 
+ #undef TARGET_EXPAND_BUILTIN
+ #define TARGET_EXPAND_BUILTIN bpf_expand_builtin
+ 
+ /* Initialize target-specific function library calls.  This is mainly
+    used to call library-provided soft-fp operations, since eBPF
+    doesn't support floating-point in "hardware".  */
+ 
+ static void
+ bpf_init_libfuncs (void)
+ {
+   set_conv_libfunc (sext_optab, DFmode, SFmode,
+ 		    "__bpf_extendsfdf2");
+   set_conv_libfunc (trunc_optab, SFmode, DFmode,
+ 		    "__bpf_truncdfsf2");
+   set_conv_libfunc (sfix_optab, SImode, DFmode,
+ 		    "__bpf_fix_truncdfsi");
+   set_conv_libfunc (sfloat_optab, DFmode, SImode,
+ 		    "__bpf_floatsidf");
+   set_conv_libfunc (ufloat_optab, DFmode, SImode,
+ 		    "__bpf_floatunsidf");
+ }
+ 
+ #undef TARGET_INIT_LIBFUNCS
+ #define TARGET_INIT_LIBFUNCS bpf_init_libfuncs
+ 
+ /* Define the mechanism that will be used for describing frame unwind
+    information to the debugger.  In eBPF it is not possible to unwind
+    frames.  */
+ 
+ static enum unwind_info_type
+ bpf_debug_unwind_info ()
+ {
+   return UI_NONE;
+ }
+ 
+ #undef TARGET_DEBUG_UNWIND_INFO
+ #define TARGET_DEBUG_UNWIND_INFO bpf_debug_unwind_info
+ 
+ /* Output assembly directives to assemble data of various sized and
+    alignments.  */
+ 
+ #undef TARGET_ASM_BYTE_OP
+ #define TARGET_ASM_BYTE_OP "\t.byte\t"
+ #undef TARGET_ASM_ALIGNED_HI_OP
+ #define TARGET_ASM_ALIGNED_HI_OP "\t.half\t"
+ #undef TARGET_ASM_ALIGNED_SI_OP
+ #define TARGET_ASM_ALIGNED_SI_OP "\t.word\t"
+ #undef TARGET_ASM_ALIGNED_DI_OP
+ #define TARGET_ASM_ALIGNED_DI_OP "\t.dword\t"
+ 
+ /* Finally, build the GCC target.  */
+ 
+ struct gcc_target targetm = TARGET_INITIALIZER;
+ 
+ #include "gt-bpf.h"
diff -Nrcpad gcc-9.3.0/gcc/config/bpf/bpf.h gcc-10.1.0/gcc/config/bpf/bpf.h
*** gcc-9.3.0/gcc/config/bpf/bpf.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/bpf/bpf.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,539 ----
+ /* Definition of the eBPF target for GCC.
+    Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_BPF_H
+ #define GCC_BPF_H
+ 
+ /**** Controlling the Compilation Driver.  */
+ 
+ #define ASM_SPEC "%{mbig-endian:-EB} %{!mbig-endian:-EL}"
+ #define LINK_SPEC "%{mbig-endian:-EB} %{!mbig-endian:-EL}"
+ #define LIB_SPEC ""
+ #define STARTFILE_SPEC ""
+ 
+ /**** Run-time Target Specification.  */
+ 
+ #define TARGET_CPU_CPP_BUILTINS() bpf_target_macros (pfile)
+ 
+ /**** Storage Layout.  */
+ 
+ /* Endianness and word size.  */
+ #define BITS_BIG_ENDIAN 0
+ #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN)
+ #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN)
+ #define BITS_PER_WORD 64
+ #define UNITS_PER_WORD 8
+ 
+ /* When storing an integer whose size is less than 64-bit in a
+    register, promote it to a DImode.  */
+ #define PROMOTE_MODE(M, UNSIGNEDP, TYPE)	\
+   do						\
+     {						\
+       if (GET_MODE_CLASS (M) == MODE_INT	\
+ 	  && GET_MODE_SIZE (M) < 8)		\
+ 	M = DImode;				\
+     } while (0)
+ 
+ /* Biggest alignment supported by the object file format of this
+    machine.  In this case this is ELF.  Use the same definition than
+    in elfos.h */
+ #define MAX_OFILE_ALIGNMENT (((unsigned int) 1 << 28) * 8)
+ 
+ /* Align argument parameters on the stack to 64-bit, at a minimum.  */
+ #define PARM_BOUNDARY 64
+ 
+ /* The hardware enforces that the stack pointer should be aligned to
+    64-bit at any time.  */
+ #define STACK_BOUNDARY 64
+ 
+ /* Function entry points are aligned to 128 bits.  */
+ #define FUNCTION_BOUNDARY 128
+ 
+ /* Maximum alignment required by data of any type.  */
+ #define BIGGEST_ALIGNMENT 64
+ 
+ /* The best alignment to use in cases where we have a choice.  */
+ #define FASTEST_ALIGNMENT 64
+ 
+ /* Use a fast alignment when storing arrays of chars in a local.  */
+ #define LOCAL_ALIGNMENT(TYPE, ALIGN)					\
+   (TREE_CODE (TYPE) == ARRAY_TYPE					\
+    && TYPE_MODE (TREE_TYPE (TYPE)) == QImode				\
+    && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
+ 
+ /* The load and store instructions won't work if the data is not in
+    it's expected alignment.  */
+ #define STRICT_ALIGNMENT 1
+ 
+ /* We use Pmode as the mode of the size increment operand in an
+    `allocate_stack' pattern.  */
+ #define STACK_SIZE_MODE Pmode
+ 
+ /**** Layout of Source Language Data Types.  */
+ 
+ #define INT_TYPE_SIZE         32
+ #define SHORT_TYPE_SIZE       16
+ #define LONG_TYPE_SIZE        64
+ #define LONG_LONG_TYPE_SIZE   64
+ #define CHAR_TYPE_SIZE         8
+ #define FLOAT_TYPE_SIZE       32
+ #define DOUBLE_TYPE_SIZE      64
+ #define LONG_DOUBLE_TYPE_SIZE 64
+ 
+ #define INTPTR_TYPE	"long int"
+ #define UINTPTR_TYPE	"long unsigned int"
+ #define SIZE_TYPE	"long unsigned int"
+ #define PTRDIFF_TYPE "long int"
+ 
+ #define SIG_ATOMIC_TYPE "char"
+ 
+ #define INT8_TYPE "char"
+ #define INT16_TYPE "short int"
+ #define INT32_TYPE "int"
+ #define INT64_TYPE "long int"
+ #define UINT8_TYPE "unsigned char"
+ #define UINT16_TYPE "short unsigned int"
+ #define UINT32_TYPE "unsigned int"
+ #define UINT64_TYPE "long unsigned int"
+ 
+ #define INT_LEAST8_TYPE INT8_TYPE
+ #define INT_LEAST16_TYPE INT16_TYPE
+ #define INT_LEAST32_TYPE INT32_TYPE
+ #define INT_LEAST64_TYPE INT64_TYPE
+ #define UINT_LEAST8_TYPE UINT8_TYPE
+ #define UINT_LEAST16_TYPE UINT16_TYPE
+ #define UINT_LEAST32_TYPE UINT32_TYPE
+ #define UINT_LEAST64_TYPE UINT64_TYPE
+ 
+ #define INT_FAST8_TYPE INT8_TYPE
+ #define INT_FAST16_TYPE INT16_TYPE
+ #define INT_FAST32_TYPE INT32_TYPE
+ #define INT_FAST64_TYPE INT64_TYPE
+ #define UINT_FAST8_TYPE UINT8_TYPE
+ #define UINT_FAST16_TYPE UINT16_TYPE
+ #define UINT_FAST32_TYPE UINT32_TYPE
+ #define UINT_FAST64_TYPE UINT64_TYPE
+ 
+ /* `char' is signed by default, like in x86.  */
+ #define DEFAULT_SIGNED_CHAR 1
+ 
+ /* `wchar_t' is a signed 32-bit type.  The second constant is used by
+    cpp, which can't use WCHAR_TYPE.  */
+ #define WCHAR_TYPE "int"
+ #define WCHAR_TYPE_SIZE 32
+ 
+ /* `wint_t' is a signed 32-bit type.  */
+ #define WINT_TYPE "int"
+ #define WINT_TYPE_SIZE 32
+ 
+ /**** Register Usage.  */
+ 
+ /*** Basic Characteristics of Registers.  */
+ 
+ #define BPF_R0	0
+ #define BPF_R1	1
+ #define BPF_R2	2
+ #define BPF_R3	3
+ #define BPF_R4	4
+ #define BPF_R5	5
+ #define BPF_R6	6
+ #define BPF_CTX BPF_R6
+ #define BPF_R7	7
+ #define BPF_R8	8
+ #define BPF_R9	9
+ #define BPF_SP BPF_R9
+ #define BPF_R10	10
+ #define BPF_FP  BPF_R10
+ /* 11 is not a real eBPF hard register and is eliminated or not used
+    in the final assembler.  See below.  */
+ 
+ #define FIRST_PSEUDO_REGISTER 12
+ 
+ /* The registers %r0..%r8 are available for general allocation.
+    %r9 is the pseudo-stack pointer.
+    %r10 is the stack frame, which is read-only.
+    %r11 (__arg__) is a fake register that always gets eliminated.  */
+ #define FIXED_REGISTERS				\
+   {0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1}
+ 
+ /* %r0..%r5 are clobbered by function calls.  */
+ #define CALL_USED_REGISTERS				\
+   {1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1}
+ 
+ /**** Register Classes.  */
+ 
+ enum reg_class
+ {
+   NO_REGS,		/* no registers in set.  */
+   ALL_REGS,		/* all registers.  */
+   LIM_REG_CLASSES	/* max value + 1.  */
+ };
+ 
+ #define N_REG_CLASSES (int) LIM_REG_CLASSES
+ #define GENERAL_REGS ALL_REGS
+ 
+ /* An initializer containing the names of the register classes as C
+    string constants.  These names are used in writing some of the
+    debugging dumps.  */
+ #define REG_CLASS_NAMES				\
+ {						\
+   "NO_REGS",					\
+   "ALL_REGS"					\
+ }
+ 
+ /* An initializer containing the contents of the register classes, as
+    integers which are bit masks.  The Nth integer specifies the
+    contents of class N.  The way the integer MASK is interpreted is
+    that register R is in the class if `MASK & (1 << R)' is 1.
+ 
+    In eBPF all the hard registers are considered general-purpose
+    integer registers.  */
+ #define REG_CLASS_CONTENTS			\
+ {						\
+    0x00000000, /* NO_REGS */			\
+    0x00000fff, /* ALL_REGS */		        \
+ }
+ 
+ /* A C expression whose value is a register class containing hard
+    register REGNO.  In general there is more that one such class;
+    choose a class which is "minimal", meaning that no smaller class
+    also contains the register.  */
+ #define REGNO_REG_CLASS(REGNO) GENERAL_REGS
+ 
+ /* A macro whose definition is the name of the class to which a
+    valid base register must belong.  A base register is one used in
+    an address which is the register value plus a displacement.  */
+ #define BASE_REG_CLASS GENERAL_REGS
+ 
+ /* A macro whose definition is the name of the class to which a
+    valid index register must belong.  An index register is one used
+    in an address where its value is either multiplied by a scale
+    factor or added to another register (as well as added to a
+    displacement).  */
+ #define INDEX_REG_CLASS NO_REGS
+ 
+ /* C expression which is nonzero if register number REGNO is suitable
+    for use as a base register in operand addresses.  In eBPF every
+    hard register can be used for this purpose.  */
+ #define REGNO_OK_FOR_BASE_P(REGNO) 			\
+   ((REGNO) < FIRST_PSEUDO_REGISTER)
+ 
+ /* C expression which is nonzero if register number REGNO is suitable
+    for use as an index register in operand addresses.  */
+ #define REGNO_OK_FOR_INDEX_P(REGNO) false
+ 
+ /**** Debugging Info ****/
+ 
+ /* We cannot support DWARF2 because of the limitations of eBPF.  */
+ #define DBX_DEBUGGING_INFO
+ 
+ /**** Stack Layout and Calling Conventions.  */
+ 
+ /*** Basic Stack Layout.  */
+ 
+ #define STACK_GROWS_DOWNWARD 1
+ #define FRAME_GROWS_DOWNWARD 1
+ 
+ /* The argument pointer always points to the first argument.  */
+ #define FIRST_PARM_OFFSET(FNDECL) 0
+ 
+ /* Unsupported.  */
+ #define RETURN_ADDR_RTX(count, frame) const0_rtx
+ 
+ /*** Registers That Address the Stack Frame.  */
+ 
+ #define FRAME_POINTER_REGNUM 10
+ #define STACK_POINTER_REGNUM 9
+ #define ARG_POINTER_REGNUM 11
+ #define STATIC_CHAIN_REGNUM 8
+ 
+ /*** Registers elimination.  */
+ 
+ #define ELIMINABLE_REGS					\
+   {{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM },	\
+    { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }}
+ 
+ /* Define the offset between two registers, one to be eliminated, and
+    the other its replacement, at the start of a routine.  */
+ #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)		\
+   do								\
+     {								\
+       (OFFSET) = bpf_initial_elimination_offset ((FROM), (TO));	\
+     } while (0)
+ 
+ /*** Passing Function Arguments on the Stack.  */
+ 
+ /* The eBPF ABI doesn't support passing arguments on the stack.  Only
+    in the first five registers.  Code in bpf.c assures the stack is
+    never used when passing arguments.  However, we still have to
+    define the constants below.  */
+ 
+ /* If nonzero, push insns will be used to pass outgoing arguments.  */
+ #define PUSH_ARGS 0
+ 
+ /* If nonzero, function arguments will be evaluated from last to
+    first, rather than from first to last.  */
+ #define PUSH_ARGS_REVERSED 1
+ 
+ /* Allocate stack space for arguments at the beginning of each
+    function.  */
+ #define ACCUMULATE_OUTGOING_ARGS 1
+ 
+ /*** Passing Arguments in Registers.  */
+ 
+ /* Use an integer in order to keep track of the number of arguments
+    passed to a function in integer registers, up to
+    MAX_ARGS_IN_REGISTERS.  */
+ #define CUMULATIVE_ARGS int
+ 
+ /* INIT_CUMULATIVE_ARGS initializes a variable CUM of type
+    CUMULATIVE_ARGS for a call to a function whose data type is FNTYPE.
+    For a library call, FNTYPE is 0.  */
+ #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \
+   memset (&(CUM), 0, sizeof (CUM))
+ 
+ /* Nonzero if N is the number of a hard register in which function
+    arguments are sometimes passed.  */
+ #define FUNCTION_ARG_REGNO_P(N) ((N) >= 1 && (N) <= 5)
+ 
+ /*** How Scalar Function Values are Returned.  */
+ 
+ /* Define how to find the value returned by a library function
+    assuming the value has mode MODE.  This is always %r0 for eBPF.  */
+ #define LIBCALL_VALUE(MODE)  \
+   gen_rtx_REG ((MODE), 0)
+ 
+ /*** Generating Code for Profiling.  */
+ 
+ /* We do not support profiling yet, so do not call `mcount'.  */
+ #define FUNCTION_PROFILER(FILE, LABELNO) do { } while (0)
+ 
+ /*** Function Entry and Exit.  */
+ 
+ /* We do not require an accurate stack pointer at function return.
+    This is because the stack pointer's original value is initialized
+    from the frame pointer, rather than decreased, to satisfy the
+    kernel's verifier.  Thus, we have to save the stack pointer in
+    function prologue and restore it in function epilogue.  If
+    EXIT_IGNORE_STACK is not set, then superfluous instructions are
+    generated to save and restore the stack pointer after and before
+    the function epilogue, respectively.  */
+ #define EXIT_IGNORE_STACK 1
+ 
+ /**** Support for Nested Functions.  */
+ 
+ /* We have to define TRAMPOLINE_SIZE even if we don't ever generate
+    them.  Set to 64 arbitrarily.  */
+ #define TRAMPOLINE_SIZE 64
+ 
+ /**** Addressing Modes.  */
+ 
+ /* Maximum number of registers that can appear in a valid memory
+    address.  */
+ #define MAX_REGS_PER_ADDRESS 1
+ 
+ /* 1 if X is an rtx for a constant that is a valid address.  */
+ 
+ #define CONSTANT_ADDRESS_P(X) 0
+ 
+ /**** Describing Relative Costs of Operations.  */
+ 
+ /* Cost of a branch instruction.  A value of 1 is the default.  */
+ #define BRANCH_COST(SPEED_P,PREDICTABLE_P) 1
+ 
+ /* The SPARC port says: Nonzero if access to memory by bytes is slow
+    and undesirable.  For RISC chips, it means that access to memory by
+    bytes is no better than access by words when possible, so grab a
+    whole word and maybe make use of that.  */
+ #define SLOW_BYTE_ACCESS 1
+ 
+ /* Threshold of number of scalar memory-to-memory move instructions,
+    _below_ which a sequence of insns should be generated instead of a
+    string move insn or a library call.  */
+ #define MOVE_RATIO(speed) 128
+ 
+ /* Threshold of number of scalar move instructions, _below_ which a
+    sequence of insns should be generated to clear memory instead of a
+    string clear insn or a library call.  */
+ #define CLEAR_RATIO(speed) 128
+ 
+ /* Threshold of number of scalar move instructions, _below_ which a
+    sequence of insns should be generated to set memory to a constant
+    value, instead of a block set insn or a library call.  */
+ #define SET_RATIO(speed) 128
+ 
+ /* True if it is as good or better to call a constant function address
+    than to call an address kept in a register.  */
+ #define NO_FUNCTION_CSE 1
+ 
+ /**** Dividing the Output into Sections.  */
+ 
+ #define TEXT_SECTION_ASM_OP "\t.text"
+ #define DATA_SECTION_ASM_OP "\t.data"
+ #define BSS_SECTION_ASM_OP "\t.bss"
+ #define COMMON_ASM_OP "\t.common\t"
+ 
+ /**** Defining the Output Assembler Language.  */
+ 
+ /*** The Overall Framework of an Assembler File.  */
+ 
+ #define ASM_COMMENT_START ";"
+ 
+ /* Output to assembler file text saying following lines
+    may contain character constants, extra white space, comments, etc.  */
+ 
+ #ifndef ASM_APP_ON
+ #define ASM_APP_ON " #APP\n"
+ #endif
+ 
+ /* Output to assembler file text saying following lines
+    no longer contain unusual constructs.  */
+ 
+ #ifndef ASM_APP_OFF
+ #define ASM_APP_OFF " #NO_APP\n"
+ #endif
+ 
+ /*** Output of Data.  */
+ 
+ /*** Output of Uninitialized Variables.  */
+ 
+ /* How to output an assembler line to define a local common
+    symbol.  */
+ 
+ #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)		\
+   do									\
+     {									\
+       fprintf ((FILE), "%s", COMMON_ASM_OP);				\
+       assemble_name ((FILE), (NAME));					\
+       fprintf ((FILE), ",%u,%u\n", (int)(SIZE), (ALIGN) / (BITS_PER_UNIT)); \
+     }									\
+   while (0)
+ 
+ /* A C statement (sans semicolon) to output to the stdio stream
+    FILE the assembler definition of uninitialized global DECL named
+    NAME whose size is SIZE bytes and alignment is ALIGN bytes.
+    Try to use asm_output_aligned_bss to implement this macro.  */
+ 
+ #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN)	\
+   do {								\
+     ASM_OUTPUT_ALIGNED_LOCAL (FILE, NAME, SIZE, ALIGN);		\
+   } while (0)
+ 
+ /* This says how to output an assembler line to define a local common
+    symbol.  */
+ 
+ #define ASM_OUTPUT_ALIGNED_LOCAL(FILE,NAME,SIZE,ALIGN)			\
+   ( fputs ("\t.lcomm ", (FILE)),					\
+     assemble_name ((FILE), (NAME)),					\
+     fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED "\n",		\
+ 	     (SIZE), ((ALIGN) / BITS_PER_UNIT)))
+ 
+ /*** Output and Generation of Labels.  */
+ 
+ /* Globalizing directive for a label.  */
+ #define GLOBAL_ASM_OP "\t.global\t"
+ 
+ /* This is how to store into the string LABEL
+    the symbol_ref name of an internal numbered label where
+    PREFIX is the class of label and NUM is the number within the class.
+    This is suitable for output with `assemble_name'.  */
+ 
+ #undef ASM_GENERATE_INTERNAL_LABEL
+ #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)			\
+   sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long)(NUM))
+ 
+ /*** Macros Controlling Initialization Routines.  */
+ 
+ #define INIT_SECTION_ASM_OP "\t.init"
+ #define FINI_SECTION_ASM_OP "\t.fini"
+ 
+ /*** Output of Assembler Instructions.  */
+ 
+ #define REGISTER_NAMES						\
+   { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",	\
+     "%r8", "%r9", "%fp", "__arg__" }
+ 
+ #define ADDITIONAL_REGISTER_NAMES		\
+   { { "%a", 0 }, { "%ctx", 6 }, { "%r10" , 10 } }
+ 
+ #define LOCAL_LABEL_PREFIX "."
+ #define USER_LABEL_PREFIX  ""
+ 
+ #define PRINT_OPERAND(STREAM,X,CODE)		\
+   bpf_print_operand ((STREAM),(X),(CODE))
+ 
+ #define PRINT_OPERAND_ADDRESS(STREAM,X)		\
+   bpf_print_operand_address ((STREAM), (X))
+ 
+ /*** Assembler Commands for Alignment.  */
+ 
+ /* This is how to output an assembler line that says to advance the
+    location counter to a multiple of 2**LOG bytes.  */
+ #define ASM_OUTPUT_ALIGN(STREAM,LOG)		\
+   fprintf (STREAM, "\t.align\t%d\n", (LOG))
+ 
+ /* This is how to output an assembler line
+    that says to advance the location counter by SIZE bytes.  */
+ #define ASM_OUTPUT_SKIP(FILE,SIZE)		\
+   fprintf (FILE, "\t.skip\t" HOST_WIDE_INT_PRINT_UNSIGNED "\n", (SIZE))
+ 
+ /**** Miscellaneous Parameters.  */
+ 
+ /* Specify the machine mode that this machine uses for the index in
+    the tablejump instruction.  */
+ #define CASE_VECTOR_MODE DImode
+ 
+ /* Define if operations between registers with integral mode smaller
+    than a word are always performed on the entire register.  */
+ #define WORD_REGISTER_OPERATIONS 1
+ 
+ /* C expression indicating when insns that read memory in MEM_MODE, an
+    integral mode narrower than a word, set the bits outsize of
+    MEM_MODE to be either the sign-extension or the zero-extension of
+    the data read.  */
+ #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
+ 
+ /* The maximum number of bytes that a single instruction can move
+    quickly between memory and registers or between two memory
+    locations.  */
+ #define MOVE_MAX 8
+ 
+ /* An alias for the machine mode for pointers.  */
+ #define Pmode DImode
+ 
+ /* An alias for the machine mode used for memory references to
+    functions being called, in 'call' RTL expressions.  */
+ #define FUNCTION_MODE Pmode
+ 
+ /* No libm on eBPF (for now.)  */
+ #define MATH_LIBRARY ""
+ 
+ /**** libgcc settings.  */
+ 
+ /* Iterating over the global constructors and destructors and
+    executing them requires the ability of doing indirect calls.
+ 
+    eBPF doesn't support indirect calls, so no chance of supporting
+    constructors and destructors.  */
+ #define DO_GLOBAL_CTORS_BODY			\
+   do { } while (0)
+ #define DO_GLOBAL_DTORS_BODY			\
+   do { } while (0)
+ 
+ #endif /* ! GCC_BPF_H */
diff -Nrcpad gcc-9.3.0/gcc/config/bpf/bpf.md gcc-10.1.0/gcc/config/bpf/bpf.md
*** gcc-9.3.0/gcc/config/bpf/bpf.md	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/bpf/bpf.md	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,497 ----
+ ;; Machine description for eBPF.
+ ;; Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+ ;; This file is part of GCC.
+ 
+ ;; GCC is free software; you can redistribute it and/or modify
+ ;; it under the terms of the GNU General Public License as published by
+ ;; the Free Software Foundation; either version 3, or (at your option)
+ ;; any later version.
+ 
+ ;; GCC is distributed in the hope that it will be useful,
+ ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+ ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ ;; GNU General Public License for more details.
+ 
+ ;; You should have received a copy of the GNU General Public License
+ ;; along with GCC; see the file COPYING3.  If not see
+ ;; <http://www.gnu.org/licenses/>.
+ 
+ (include "predicates.md")
+ (include "constraints.md")
+ 
+ ;;;; Unspecs
+ 
+ (define_c_enum "unspec" [
+   UNSPEC_LDINDABS
+   UNSPEC_XADD
+ ])
+ 
+ ;;;; Constants
+ 
+ (define_constants
+   [(R0_REGNUM		0)
+    (R1_REGNUM		1)
+    (R2_REGNUM		2)
+    (R3_REGNUM		3)
+    (R4_REGNUM		4)
+    (R5_REGNUM		5)
+    (R6_REGNUM		6)
+    (R7_REGNUM		7)
+    (R8_REGNUM		8)
+    (R9_REGNUM		9)
+    (R10_REGNUM		10)
+    (R11_REGNUM		11)
+ ])
+ 
+ ;;;; Attributes
+ 
+ ;; Instruction classes.
+ ;; alu		64-bit arithmetic.
+ ;; alu32	32-bit arithmetic.
+ ;; end		endianness conversion instructions.
+ ;; ld		load instructions.
+ ;; lddx		load 64-bit immediate instruction.
+ ;; ldx		generic load instructions.
+ ;; st		generic store instructions for immediates.
+ ;; stx		generic store instructions.
+ ;; jmp		jump instructions.
+ ;; xadd		atomic exchange-and-add instructions.
+ ;; multi	multiword sequence (or user asm statements).
+ 
+ (define_attr "type"
+   "unknown,alu,alu32,end,ld,lddw,ldx,st,stx,jmp,xadd,multi"
+   (const_string "unknown"))
+ 
+ ;; Length of instruction in bytes.
+ (define_attr "length" ""
+   (cond [
+          (eq_attr "type" "lddw") (const_int 16)
+          ] (const_int 8)))
+ 
+ ;; Describe a user's asm statement.
+ (define_asm_attributes
+   [(set_attr "type" "multi")])
+ 
+ ;;;; Mode attributes and iterators
+ 
+ (define_mode_attr mop [(QI "b") (HI "h") (SI "w") (DI "dw")
+                        (SF "w") (DF "dw")])
+ (define_mode_attr mtype [(SI "alu32") (DI "alu")])
+ (define_mode_attr msuffix [(SI "32") (DI "")])
+ 
+ ;;;; NOPs
+ 
+ (define_insn "nop"
+   [(const_int 0)]
+   ""
+   "mov\t%%r0,%%r0"
+   [(set_attr "type" "alu")])
+ 
+ ;;;; Arithmetic/Logical
+ 
+ ;; The arithmetic and logic operations below are defined for SI and DI
+ ;; modes.  The mode iterator AM is used in order to expand to two
+ ;; insns, with the proper modes.
+ ;;
+ ;; 32-bit arithmetic (for SI modes) is implemented using the alu32
+ ;; instructions.
+ 
+ (define_mode_iterator AM [SI DI])
+ 
+ ;;; Addition
+ (define_insn "add<AM:mode>3"
+   [(set (match_operand:AM          0 "register_operand"   "=r,r")
+         (plus:AM (match_operand:AM 1 "register_operand"   " 0,0")
+                  (match_operand:AM 2 "reg_or_imm_operand" " r,I")))]
+   "1"
+   "add<msuffix>\t%0,%2"
+   [(set_attr "type" "<mtype>")])
+ 
+ ;;; Subtraction
+ 
+ ;; Note that subtractions of constants become additions, so there is
+ ;; no need to handle immediate operands in the subMODE3 insns.
+ 
+ (define_insn "sub<AM:mode>3"
+   [(set (match_operand:AM          0 "register_operand" "=r")
+         (minus:AM (match_operand:AM 1 "register_operand" " 0")
+                   (match_operand:AM 2 "register_operand" " r")))]
+   ""
+   "sub<msuffix>\t%0,%2"
+   [(set_attr "type" "<mtype>")])
+ 
+ ;;; Negation
+ (define_insn "neg<AM:mode>2"
+   [(set (match_operand:AM 0 "register_operand" "=r")
+         (neg:AM (match_operand:AM 1 "register_operand" " 0")))]
+   ""
+   "neg<msuffix>\t%0"
+   [(set_attr "type" "<mtype>")])
+ 
+ ;;; Multiplication
+ (define_insn "mul<AM:mode>3"
+   [(set (match_operand:AM          0 "register_operand"   "=r,r")
+         (mult:AM (match_operand:AM 1 "register_operand"   " 0,0")
+                  (match_operand:AM 2 "reg_or_imm_operand" " r,I")))]
+   ""
+   "mul<msuffix>\t%0,%2"
+   [(set_attr "type" "<mtype>")])
+ 
+ (define_insn "*mulsidi3_zeroextend"
+   [(set (match_operand:DI	   0 "register_operand" "=r,r")
+         (zero_extend:DI
+          (mult:SI (match_operand:SI 1 "register_operand" "0,0")
+                   (match_operand:SI 2 "reg_or_imm_operand" "r,I"))))]
+   ""
+   "mul32\t%0,%2"
+   [(set_attr "type" "alu32")])
+ 
+ ;;; Division
+ 
+ ;; Note that eBPF doesn't provide instructions for signed integer
+ ;; division.
+ 
+ (define_insn "udiv<AM:mode>3"
+   [(set (match_operand:AM 0 "register_operand" "=r,r")
+         (udiv:AM (match_operand:AM 1 "register_operand" " 0,0")
+                  (match_operand:AM 2 "reg_or_imm_operand" "r,I")))]
+   ""
+   "div<msuffix>\t%0,%2"
+   [(set_attr "type" "<mtype>")])
+ 
+ ;;; Modulus
+ 
+ ;; Note that eBPF doesn't provide instructions for signed integer
+ ;; remainder.
+ 
+ (define_insn "umod<AM:mode>3"
+   [(set (match_operand:AM 0 "register_operand" "=r,r")
+         (umod:AM (match_operand:AM 1 "register_operand" " 0,0")
+                  (match_operand:AM 2 "reg_or_imm_operand" "r,I")))]
+   ""
+   "mod<msuffix>\t%0,%2"
+   [(set_attr "type" "<mtype>")])
+ 
+ ;;; Logical AND
+ (define_insn "and<AM:mode>3"
+   [(set (match_operand:AM 0 "register_operand" "=r,r")
+         (and:AM (match_operand:AM 1 "register_operand" " 0,0")
+                 (match_operand:AM 2 "reg_or_imm_operand" "r,I")))]
+   ""
+   "and<msuffix>\t%0,%2"
+   [(set_attr "type" "<mtype>")])
+ 
+ ;;; Logical inclusive-OR
+ (define_insn "ior<AM:mode>3"
+   [(set (match_operand:AM 0 "register_operand" "=r,r")
+         (ior:AM (match_operand:AM 1 "register_operand" " 0,0")
+                 (match_operand:AM 2 "reg_or_imm_operand" "r,I")))]
+   ""
+   "or<msuffix>\t%0,%2"
+   [(set_attr "type" "<mtype>")])
+ 
+ ;;; Logical exclusive-OR
+ (define_insn "xor<AM:mode>3"
+   [(set (match_operand:AM 0 "register_operand" "=r,r")
+         (xor:AM (match_operand:AM 1 "register_operand" " 0,0")
+                 (match_operand:AM 2 "reg_or_imm_operand" "r,I")))]
+   ""
+   "xor<msuffix>\t%0,%2"
+   [(set_attr "type" "<mtype>")])
+ 
+ ;;;; Conversions
+ 
+ ;;; Zero-extensions
+ 
+ ;; For register operands smaller than 32-bit zero-extending is
+ ;; achieved ANDing the value in the source register to a suitable
+ ;; mask.
+ ;;
+ ;; For register operands bigger or equal than 32-bit, we generate a
+ ;; mov32 instruction to zero the high 32-bits of the destination
+ ;; register.
+ ;;
+ ;; For memory operands, of any width, zero-extending is achieved using
+ ;; the ldx{bhwdw} instructions to load the values in registers.
+ 
+ (define_insn "zero_extendhidi2"
+   [(set (match_operand:DI 0 "register_operand" "=r,r")
+ 	(zero_extend:DI (match_operand:HI 1 "nonimmediate_operand" "r,m")))]
+   ""
+   "@
+    and\t%0,0xffff
+    ldxh\t%0,%1"
+   [(set_attr "type" "alu,ldx")])
+ 
+ (define_insn "zero_extendqidi2"
+   [(set (match_operand:DI 0 "register_operand" "=r,r")
+ 	(zero_extend:DI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
+   ""
+   "@
+    and\t%0,0xff
+    ldxb\t%0,%1"
+   [(set_attr "type" "alu,ldx")])
+ 
+ (define_insn "zero_extendsidi2"
+   [(set (match_operand:DI 0 "register_operand" "=r,r")
+ 	(zero_extend:DI
+ 	  (match_operand:SI 1 "nonimmediate_operand" "r,m")))]
+   ""
+   "@
+    mov32\t%0,%1
+    ldxw\t%0,%1"
+   [(set_attr "type" "alu,ldx")])
+ 
+ ;;; Sign-extension
+ 
+ ;; Sign-extending a 32-bit value into a 64-bit value is achieved using
+ ;; shifting, with instructions generated by the expand below.
+ 
+ (define_expand "extendsidi2"
+   [(set (match_operand:DI 0 "register_operand")
+ 	(sign_extend:DI (match_operand:SI 1 "register_operand")))]
+   ""
+ {
+   operands[1] = gen_lowpart (DImode, operands[1]);
+   emit_insn (gen_ashldi3 (operands[0], operands[1], GEN_INT (32)));
+   emit_insn (gen_ashrdi3 (operands[0], operands[0], GEN_INT (32)));
+   DONE;
+ })
+ 
+ ;;;; Data movement
+ 
+ (define_mode_iterator MM [QI HI SI DI SF DF])
+ 
+ (define_expand "mov<MM:mode>"
+   [(set (match_operand:MM 0 "general_operand")
+         (match_operand:MM 1 "general_operand"))]
+         ""
+         "
+ {
+   if (!register_operand(operands[0], <MM:MODE>mode)
+       && !register_operand(operands[1], <MM:MODE>mode))
+     operands[1] = force_reg (<MM:MODE>mode, operands[1]); 
+ }")
+ 
+ (define_insn "*mov<MM:mode>"
+   [(set (match_operand:MM 0 "nonimmediate_operand" "=r, r,r,m,m")
+         (match_operand:MM 1 "mov_src_operand"      " m,rI,B,r,I"))]
+   ""
+   "@
+    ldx<mop>\t%0,%1
+    mov\t%0,%1
+    lddw\t%0,%1
+    stx<mop>\t%0,%1
+    st<mop>\t%0,%1"
+ [(set_attr "type" "ldx,alu,alu,stx,st")])
+ 
+ ;;;; Shifts
+ 
+ (define_mode_iterator SIM [SI DI])
+ 
+ (define_insn "ashr<SIM:mode>3"
+   [(set (match_operand:SIM 0 "register_operand"                 "=r,r")
+         (ashiftrt:SIM (match_operand:SIM 1 "register_operand"   " 0,0")
+                       (match_operand:SIM 2 "reg_or_imm_operand" " r,I")))]
+   ""
+   "arsh<msuffix>\t%0,%2"
+   [(set_attr "type" "<mtype>")])
+ 
+ (define_insn "ashl<SIM:mode>3"
+   [(set (match_operand:SIM 0 "register_operand"               "=r,r")
+         (ashift:SIM (match_operand:SIM 1 "register_operand"   " 0,0")
+                     (match_operand:SIM 2 "reg_or_imm_operand" " r,I")))]
+   ""
+   "lsh<msuffix>\t%0,%2"
+   [(set_attr "type" "<mtype>")])
+ 
+ (define_insn "lshr<SIM:mode>3"
+   [(set (match_operand:SIM 0 "register_operand"                 "=r,r")
+         (lshiftrt:SIM (match_operand:SIM 1 "register_operand"   " 0,0")
+                       (match_operand:SIM 2 "reg_or_imm_operand" " r,I")))]
+   ""
+   "rsh<msuffix>\t%0,%2"
+   [(set_attr "type" "<mtype>")])
+ 
+ ;;;; Conditional branches
+ 
+ ;; The eBPF jump instructions use 64-bit arithmetic when evaluating
+ ;; the jump conditions.  Therefore we use DI modes below.
+ 
+ (define_expand "cbranchdi4"
+   [(set (pc)
+ 	(if_then_else (match_operator 0 "comparison_operator"
+ 			[(match_operand:DI 1 "register_operand")
+ 			 (match_operand:DI 2 "reg_or_imm_operand")])
+ 		      (label_ref (match_operand 3 "" ""))
+ 		      (pc)))]
+   ""
+ {
+   if (!ordered_comparison_operator (operands[0], VOIDmode))
+     FAIL;
+ })
+ 
+ (define_insn "*branch_on_di"
+   [(set (pc)
+ 	(if_then_else (match_operator 3 "ordered_comparison_operator"
+ 			 [(match_operand:DI 0 "register_operand" "r")
+ 			  (match_operand:DI 1 "reg_or_imm_operand" "rI")])
+ 		      (label_ref (match_operand 2 "" ""))
+ 		      (pc)))]
+   ""
+ {
+   int code = GET_CODE (operands[3]);
+ 
+   switch (code)
+   {
+   case EQ: return "jeq\t%0,%1,%2"; break;
+   case NE: return "jne\t%0,%1,%2"; break;
+   case LT: return "jslt\t%0,%1,%2"; break;
+   case LE: return "jsle\t%0,%1,%2"; break;
+   case GT: return "jsgt\t%0,%1,%2"; break;
+   case GE: return "jsge\t%0,%1,%2"; break;
+   case LTU: return "jlt\t%0,%1,%2"; break;
+   case LEU: return "jle\t%0,%1,%2"; break;
+   case GTU: return "jgt\t%0,%1,%2"; break;
+   case GEU: return "jge\t%0,%1,%2"; break;
+   default:
+     gcc_unreachable ();
+     return "";
+   }
+ }
+   [(set_attr "type" "jmp")])
+ 
+ ;;;; Unconditional branches
+ 
+ (define_insn "jump"
+   [(set (pc)
+         (label_ref (match_operand 0 "" "")))]
+   ""
+   "ja\t%0"
+ [(set_attr "type" "jmp")])
+ 
+ ;;;; Function prologue/epilogue
+ 
+ (define_insn "exit"
+   [(simple_return)]
+   ""
+   "exit"
+   [(set_attr "type" "jmp")])
+ 
+ (define_expand "prologue"
+   [(const_int 0)]
+   ""
+ {
+   bpf_expand_prologue ();
+   DONE;
+ })
+ 
+ (define_expand "epilogue"
+   [(const_int 0)]
+   ""
+ {
+   bpf_expand_epilogue ();
+   DONE;
+ })
+ 
+ ;;;; Function calls
+ 
+ (define_expand "call"
+   [(parallel [(call (match_operand 0 "")
+ 		    (match_operand 1 ""))
+ 	      (use (match_operand 2 ""))	;; next_arg_reg
+ 	      (use (match_operand 3 ""))])]	;; struct_value_size_rtx
+   ""
+ {
+   rtx target = XEXP (operands[0], 0);
+   emit_call_insn (gen_call_internal (target, operands[1]));
+   DONE;
+ })
+ 
+ (define_insn "call_internal"
+   [(call (mem:DI (match_operand:DI 0 "call_operand" "Sr"))
+          (match_operand:SI 1 "general_operand" ""))]
+   ;; operands[2] is next_arg_register
+   ;; operands[3] is struct_value_size_rtx.
+   ""
+   { return bpf_output_call (operands[0]); }
+   [(set_attr "type" "jmp")])
+ 
+ (define_expand "call_value"
+   [(parallel [(set (match_operand 0 "")
+ 		   (call (match_operand 1 "")
+ 			 (match_operand 2 "")))
+ 	      (use (match_operand 3 ""))])]		;; next_arg_reg
+   ""
+ {
+   rtx target = XEXP (operands[1], 0);
+   emit_call_insn (gen_call_value_internal (operands[0], target,
+                                            operands[2]));
+   DONE;
+ })
+ 
+ (define_insn "call_value_internal"
+   [(set (match_operand 0 "register_operand" "")
+ 	(call (mem:DI (match_operand:DI 1 "call_operand" "Sr"))
+ 	      (match_operand:SI 2 "general_operand" "")))]
+   ;; operands[3] is next_arg_register
+   ;; operands[4] is struct_value_size_rtx.
+   ""
+   { return bpf_output_call (operands[1]); }
+   [(set_attr "type" "jmp")])
+ 
+ (define_insn "sibcall"
+   [(call (label_ref (match_operand 0 "" ""))
+ 	 (match_operand:SI 1 "general_operand" ""))]
+   ;; operands[2] is next_arg_register
+   ;; operands[3] is struct_value_size_rtx.
+   ""
+   "ja\t%0"
+   [(set_attr "type" "jmp")])
+ 
+ ;;;; Non-generic load instructions
+ 
+ (define_mode_iterator LDM [QI HI SI DI])
+ (define_mode_attr ldop [(QI "b") (HI "h") (SI "w") (DI "dw")])
+ 
+ (define_insn "ldind<ldop>"
+   [(set (reg:LDM R0_REGNUM)
+         (unspec:LDM [(match_operand:DI 0 "register_operand" "r")
+                     (match_operand:SI 1 "imm32_operand" "I")]
+                     UNSPEC_LDINDABS))
+    (clobber (reg:DI R1_REGNUM))
+    (clobber (reg:DI R2_REGNUM))
+    (clobber (reg:DI R3_REGNUM))
+    (clobber (reg:DI R4_REGNUM))]
+   ""
+   "ldind<ldop>\t%0,%1"
+   [(set_attr "type" "ld")])
+ 
+ (define_insn "ldabs<ldop>"
+   [(set (reg:LDM R0_REGNUM)
+         (unspec:LDM [(match_operand:SI 0 "imm32_operand" "I")
+                     (match_operand:SI 1 "imm32_operand" "I")]
+                     UNSPEC_LDINDABS))
+    (clobber (reg:DI R1_REGNUM))
+    (clobber (reg:DI R2_REGNUM))
+    (clobber (reg:DI R3_REGNUM))
+    (clobber (reg:DI R4_REGNUM))]
+   ""
+   "ldabs<ldop>\t%0"
+   [(set_attr "type" "ld")])
+ 
+ ;;;; Atomic increments
+ 
+ (define_mode_iterator AMO [SI DI])
+ 
+ (define_insn "atomic_add<AMO:mode>"
+   [(set (match_operand:AMO 0 "memory_operand" "+m")
+         (unspec_volatile:AMO
+          [(plus:AMO (match_dup 0)
+                     (match_operand:AMO 1 "register_operand" "r"))
+           (match_operand:SI 2 "const_int_operand")] ;; Memory model.
+          UNSPEC_XADD))]
+   ""
+   "xadd<mop>\t%0,%1"
+   [(set_attr "type" "xadd")])
diff -Nrcpad gcc-9.3.0/gcc/config/bpf/bpf.opt gcc-10.1.0/gcc/config/bpf/bpf.opt
*** gcc-9.3.0/gcc/config/bpf/bpf.opt	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/bpf/bpf.opt	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,123 ----
+ ; Options for the eBPF compiler port.
+ 
+ ; Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ ;
+ ; This file is part of GCC.
+ ;
+ ; GCC is free software; you can redistribute it and/or modify it under
+ ; the terms of the GNU General Public License as published by the Free
+ ; Software Foundation; either version 3, or (at your option) any later
+ ; version.
+ ;
+ ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+ ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ ; for more details.
+ ;
+ ; You should have received a copy of the GNU General Public License
+ ; along with GCC; see the file COPYING3.  If not see
+ ; <http://www.gnu.org/licenses/>.
+ 
+ HeaderInclude
+ config/bpf/bpf-opts.h
+ 
+ ; Selecting the kind of kernel the eBPF will be running on.
+ 
+ mkernel=
+ Target RejectNegative Joined Var(bpf_kernel) Enum(bpf_kernel) Init(LINUX_LATEST)
+ Generate eBPF for the given Linux kernel version.
+ 
+ Enum
+ Name(bpf_kernel) Type(enum bpf_kernel_version)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(native) Value(LINUX_NATIVE) DriverOnly
+ 
+ EnumValue
+ Enum(bpf_kernel) String(latest) Value(LINUX_LATEST) DriverOnly
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.0) Value(LINUX_V4_0)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.1) Value(LINUX_V4_1)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.2) Value(LINUX_V4_2)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.3) Value(LINUX_V4_3)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.4) Value(LINUX_V4_4)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.5) Value(LINUX_V4_5)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.6) Value(LINUX_V4_6)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.7) Value(LINUX_V4_7)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.8) Value(LINUX_V4_8)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.9) Value(LINUX_V4_9)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.10) Value(LINUX_V4_10)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.11) Value(LINUX_V4_11)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.12) Value(LINUX_V4_12)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.13) Value(LINUX_V4_13)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.14) Value(LINUX_V4_14)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.15) Value(LINUX_V4_15)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.16) Value(LINUX_V4_16)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.17) Value(LINUX_V4_17)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.18) Value(LINUX_V4_18)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.19) Value(LINUX_V4_19)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(4.20) Value(LINUX_V4_20)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(5.0) Value(LINUX_V5_0)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(5.1) Value(LINUX_V5_1)
+ 
+ EnumValue
+ Enum(bpf_kernel) String(5.2) Value(LINUX_V5_2)
+ 
+ ; Selecting big endian or little endian targets.
+ 
+ mbig-endian
+ Target RejectNegative Report Mask(BIG_ENDIAN)
+ Generate big-endian eBPF.
+ 
+ mlittle-endian
+ Target RejectNegative Report InverseMask(BIG_ENDIAN)
+ Generate little-endian eBPF.
+ 
+ mframe-limit=
+ Target Joined RejectNegative UInteger IntegerRange(0, 32767) Var(bpf_frame_limit) Init(512)
+ Set a hard limit for the size of each stack frame, in bytes.
diff -Nrcpad gcc-9.3.0/gcc/config/bpf/constraints.md gcc-10.1.0/gcc/config/bpf/constraints.md
*** gcc-9.3.0/gcc/config/bpf/constraints.md	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/bpf/constraints.md	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,32 ----
+ ;; Constraint definitions for eBPF.
+ ;; Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ ;;
+ ;; This file is part of GCC.
+ ;;
+ ;; GCC is free software; you can redistribute it and/or modify
+ ;; it under the terms of the GNU General Public License as published by
+ ;; the Free Software Foundation; either version 3, or (at your option)
+ ;; any later version.
+ ;;
+ ;; GCC is distributed in the hope that it will be useful,
+ ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+ ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ ;; GNU General Public License for more details.
+ ;;
+ ;; You should have received a copy of the GNU General Public License
+ ;; along with GCC; see the file COPYING3.  If not see
+ ;; <http://www.gnu.org/licenses/>.
+ 
+ (define_constraint "I"
+   "A 32-bit signed immediate."
+   (and (match_code "const_int")
+        (match_test "IN_RANGE (ival, -1 - 0x7fffffff, 0x7fffffff)")))
+ 
+ (define_constraint "B"
+   "A constant argument for LDDW."
+   (match_code "const,symbol_ref,label_ref,const_double,const_int"))
+ 
+ (define_constraint "S"
+   "A constant call address."
+   (match_code "const,symbol_ref,label_ref,const_int"))
+ 
diff -Nrcpad gcc-9.3.0/gcc/config/bpf/predicates.md gcc-10.1.0/gcc/config/bpf/predicates.md
*** gcc-9.3.0/gcc/config/bpf/predicates.md	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/bpf/predicates.md	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,64 ----
+ ;; Predicate definitions for eBPF.
+ ;; Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ ;;
+ ;; This file is part of GCC.
+ ;;
+ ;; GCC is free software; you can redistribute it and/or modify
+ ;; it under the terms of the GNU General Public License as published by
+ ;; the Free Software Foundation; either version 3, or (at your option)
+ ;; any later version.
+ ;;
+ ;; GCC is distributed in the hope that it will be useful,
+ ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+ ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ ;; GNU General Public License for more details.
+ ;;
+ ;; You should have received a copy of the GNU General Public License
+ ;; along with GCC; see the file COPYING3.  If not see
+ ;; <http://www.gnu.org/licenses/>.
+ 
+ (define_predicate "reg_or_imm_operand"
+   (ior (and (match_code "const_int")
+             (match_test "IN_RANGE (INTVAL (op), -1 - 0x7fffffff, 0x7fffffff)"))
+        (match_operand 0 "register_operand")))
+ 
+ (define_predicate "imm32_operand"
+   (ior (and (match_code "const_int")
+             (match_test "IN_RANGE (INTVAL (op), 0, 0xffffffff)"))
+        (match_code "symbol_ref,label_ref,const")))
+ 
+ (define_predicate "lddw_operand"
+   (match_code "symbol_ref,label_ref,const,const_double,const_int"))
+ 
+ (define_predicate "call_operand"
+   (match_code "reg,symbol_ref,const_int,const")
+ {
+   if (GET_CODE (op) == CONST)
+     {
+       op = XEXP (op, 0);
+ 
+       switch (GET_CODE (op))
+ 	{
+ 	case SYMBOL_REF:
+ 	case LABEL_REF:
+ 	case CONST_INT:
+ 	  return true;
+ 	  break;
+ 	default:
+ 	  break;
+ 	}
+ 
+       return false;
+     }
+ 
+   return true;
+ })
+ 
+ (define_predicate "mov_src_operand"
+   (ior (match_operand 0 "memory_operand")
+        (match_operand 0 "reg_or_imm_operand")
+        (match_operand 0 "lddw_operand")))
+ 
+ (define_predicate "register_compare_operator"
+   (match_code "eq,ne,geu,gtu,ge,gt"))
+ 
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x-isas.def gcc-10.1.0/gcc/config/c6x/c6x-isas.def
*** gcc-9.3.0/gcc/config/c6x/c6x-isas.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/c6x-isas.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* C6X ISA names.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* C6X ISA names.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x-modes.def gcc-10.1.0/gcc/config/c6x/c6x-modes.def
*** gcc-9.3.0/gcc/config/c6x/c6x-modes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/c6x-modes.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, for TI C6x.
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, for TI C6x.
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x-mult.md gcc-10.1.0/gcc/config/c6x/c6x-mult.md
*** gcc-9.3.0/gcc/config/c6x/c6x-mult.md	Thu Mar 12 11:08:30 2020
--- gcc-10.1.0/gcc/config/c6x/c6x-mult.md	Thu May  7 10:50:51 2020
***************
*** 3,9 ****
  ;; Multiplication patterns for TI C6X.
  ;; This file is processed by genmult.sh to produce two variants of each
  ;; pattern, a normal one and a real_mult variant for modulo scheduling.
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
--- 3,9 ----
  ;; Multiplication patterns for TI C6X.
  ;; This file is processed by genmult.sh to produce two variants of each
  ;; pattern, a normal one and a real_mult variant for modulo scheduling.
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
***************
*** 424,430 ****
  ;; Multiplication patterns for TI C6X.
  ;; This file is processed by genmult.sh to produce two variants of each
  ;; pattern, a normal one and a real_mult variant for modulo scheduling.
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
--- 424,430 ----
  ;; Multiplication patterns for TI C6X.
  ;; This file is processed by genmult.sh to produce two variants of each
  ;; pattern, a normal one and a real_mult variant for modulo scheduling.
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x-mult.md.in gcc-10.1.0/gcc/config/c6x/c6x-mult.md.in
*** gcc-9.3.0/gcc/config/c6x/c6x-mult.md.in	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/c6x-mult.md.in	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  ;; Multiplication patterns for TI C6X.
  ;; This file is processed by genmult.sh to produce two variants of each
  ;; pattern, a normal one and a real_mult variant for modulo scheduling.
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
--- 1,7 ----
  ;; Multiplication patterns for TI C6X.
  ;; This file is processed by genmult.sh to produce two variants of each
  ;; pattern, a normal one and a real_mult variant for modulo scheduling.
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x-opts.h gcc-10.1.0/gcc/config/c6x/c6x-opts.h
*** gcc-9.3.0/gcc/config/c6x/c6x-opts.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/c6x-opts.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for option handling for TI C6X.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for option handling for TI C6X.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x-protos.h gcc-10.1.0/gcc/config/c6x/c6x-protos.h
*** gcc-9.3.0/gcc/config/c6x/c6x-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/c6x-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Prototypes for exported functions defined in c6x.c.
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
     Contributed by CodeSourcery.
  
     This file is part of GCC.
--- 1,5 ----
  /* Prototypes for exported functions defined in c6x.c.
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
     Contributed by CodeSourcery.
  
     This file is part of GCC.
*************** extern bool c6x_long_call_p (rtx);
*** 35,41 ****
  extern void c6x_expand_call (rtx, rtx, bool);
  extern rtx c6x_expand_compare (rtx, machine_mode);
  extern bool c6x_force_op_for_comparison_p (enum rtx_code, rtx);
! extern bool c6x_expand_movmem (rtx, rtx, rtx, rtx, rtx, rtx);
  
  extern rtx c6x_subword (rtx, bool);
  extern void split_di (rtx *, int, rtx *, rtx *);
--- 35,41 ----
  extern void c6x_expand_call (rtx, rtx, bool);
  extern rtx c6x_expand_compare (rtx, machine_mode);
  extern bool c6x_force_op_for_comparison_p (enum rtx_code, rtx);
! extern bool c6x_expand_cpymem (rtx, rtx, rtx, rtx, rtx, rtx);
  
  extern rtx c6x_subword (rtx, bool);
  extern void split_di (rtx *, int, rtx *, rtx *);
*************** extern void c6x_expand_epilogue (bool);
*** 53,58 ****
--- 53,60 ----
  extern rtx c6x_return_addr_rtx (int);
  
  extern void c6x_set_return_address (rtx, rtx);
+ 
+ enum reg_class c6x_regno_reg_class (int);
  #endif
  
  extern void c6x_override_options (void);
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x-sched.md gcc-10.1.0/gcc/config/c6x/c6x-sched.md
*** gcc-9.3.0/gcc/config/c6x/c6x-sched.md	Thu Mar 12 11:08:30 2020
--- gcc-10.1.0/gcc/config/c6x/c6x-sched.md	Thu May  7 10:50:51 2020
***************
*** 4,10 ****
  ;; Definitions for side 1, cross n
  
  ;; Scheduling description for TI C6X.
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
--- 4,10 ----
  ;; Definitions for side 1, cross n
  
  ;; Scheduling description for TI C6X.
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
***************
*** 237,243 ****
  ;; Definitions for side 2, cross n
  
  ;; Scheduling description for TI C6X.
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
--- 237,243 ----
  ;; Definitions for side 2, cross n
  
  ;; Scheduling description for TI C6X.
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
***************
*** 470,476 ****
  ;; Definitions for side 1, cross y
  
  ;; Scheduling description for TI C6X.
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
--- 470,476 ----
  ;; Definitions for side 1, cross y
  
  ;; Scheduling description for TI C6X.
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
***************
*** 703,709 ****
  ;; Definitions for side 2, cross y
  
  ;; Scheduling description for TI C6X.
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
--- 703,709 ----
  ;; Definitions for side 2, cross y
  
  ;; Scheduling description for TI C6X.
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x-sched.md.in gcc-10.1.0/gcc/config/c6x/c6x-sched.md.in
*** gcc-9.3.0/gcc/config/c6x/c6x-sched.md.in	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/c6x-sched.md.in	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Scheduling description for TI C6X.
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
--- 1,5 ----
  ;; Scheduling description for TI C6X.
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x-tables.opt gcc-10.1.0/gcc/config/c6x/c6x-tables.opt
*** gcc-9.3.0/gcc/config/c6x/c6x-tables.opt	Thu Mar 12 11:08:30 2020
--- gcc-10.1.0/gcc/config/c6x/c6x-tables.opt	Thu May  7 10:50:51 2020
***************
*** 1,7 ****
  ; -*- buffer-read-only: t -*-
  ; Generated automatically by genopt.sh from c6x-isas.def.
  ;
! ; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,7 ----
  ; -*- buffer-read-only: t -*-
  ; Generated automatically by genopt.sh from c6x-isas.def.
  ;
! ; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x.c gcc-10.1.0/gcc/config/c6x/c6x.c
*** gcc-9.3.0/gcc/config/c6x/c6x.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/c6x.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target Code for TI C6X
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
     Contributed by Andrew Jenner <andrew@codesourcery.com>
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
--- 1,5 ----
  /* Target Code for TI C6X
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
     Contributed by Andrew Jenner <andrew@codesourcery.com>
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
***************
*** 55,60 ****
--- 55,61 ----
  #include "sel-sched.h"
  #include "debug.h"
  #include "hw-doloop.h"
+ #include "function-abi.h"
  #include "regrename.h"
  #include "dumpfile.h"
  #include "builtins.h"
*************** c6x_init_cumulative_args (CUMULATIVE_ARG
*** 499,514 ****
      }
  }
  
! /* Implements the macro FUNCTION_ARG defined in c6x.h.  */
  
  static rtx
! c6x_function_arg (cumulative_args_t cum_v, machine_mode mode,
! 		  const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    if (cum->count >= cum->nregs)
      return NULL_RTX;
!   if (type)
      {
        HOST_WIDE_INT size = int_size_in_bytes (type);
        if (TARGET_BIG_ENDIAN && AGGREGATE_TYPE_P (type))
--- 500,514 ----
      }
  }
  
! /* Implement TARGET_FUNCTION_ARG.  */
  
  static rtx
! c6x_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    if (cum->count >= cum->nregs)
      return NULL_RTX;
!   if (tree type = arg.type)
      {
        HOST_WIDE_INT size = int_size_in_bytes (type);
        if (TARGET_BIG_ENDIAN && AGGREGATE_TYPE_P (type))
*************** c6x_function_arg (cumulative_args_t cum_
*** 519,536 ****
  	      rtx reg2 = gen_rtx_REG (SImode, argument_registers[cum->count]);
  	      rtvec vec = gen_rtvec (2, gen_rtx_EXPR_LIST (VOIDmode, reg1, const0_rtx),
  				     gen_rtx_EXPR_LIST (VOIDmode, reg2, GEN_INT (4)));
! 	      return gen_rtx_PARALLEL (mode, vec);
  	    }
  	}
      }
!   return gen_rtx_REG (mode, argument_registers[cum->count]);
  }
  
  static void
! c6x_function_arg_advance (cumulative_args_t cum_v,
! 			  machine_mode mode ATTRIBUTE_UNUSED,
! 			  const_tree type ATTRIBUTE_UNUSED,
! 			  bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    cum->count++;
--- 519,533 ----
  	      rtx reg2 = gen_rtx_REG (SImode, argument_registers[cum->count]);
  	      rtvec vec = gen_rtvec (2, gen_rtx_EXPR_LIST (VOIDmode, reg1, const0_rtx),
  				     gen_rtx_EXPR_LIST (VOIDmode, reg2, GEN_INT (4)));
! 	      return gen_rtx_PARALLEL (arg.mode, vec);
  	    }
  	}
      }
!   return gen_rtx_REG (arg.mode, argument_registers[cum->count]);
  }
  
  static void
! c6x_function_arg_advance (cumulative_args_t cum_v, const function_arg_info &)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    cum->count++;
*************** c6x_function_value_regno_p (const unsign
*** 639,656 ****
  }
  
  /* Types larger than 64 bit, and variable sized types, are passed by
!    reference.  The callee must copy them; see c6x_callee_copies.  */
  
  static bool
! c6x_pass_by_reference (cumulative_args_t cum_v ATTRIBUTE_UNUSED,
! 		       machine_mode mode, const_tree type,
! 		       bool named ATTRIBUTE_UNUSED)
  {
    int size = -1;
!   if (type)
!     size = int_size_in_bytes (type);
!   else if (mode != VOIDmode)
!     size = GET_MODE_SIZE (mode);
    return size > 2 * UNITS_PER_WORD || size == -1;
  }
  
--- 636,651 ----
  }
  
  /* Types larger than 64 bit, and variable sized types, are passed by
!    reference.  The callee must copy them; see TARGET_CALLEE_COPIES.  */
  
  static bool
! c6x_pass_by_reference (cumulative_args_t, const function_arg_info &arg)
  {
    int size = -1;
!   if (arg.type)
!     size = int_size_in_bytes (arg.type);
!   else if (arg.mode != VOIDmode)
!     size = GET_MODE_SIZE (arg.mode);
    return size > 2 * UNITS_PER_WORD || size == -1;
  }
  
*************** c6x_return_in_msb (const_tree valtype)
*** 675,691 ****
    return TARGET_BIG_ENDIAN && AGGREGATE_TYPE_P (valtype) && size == 3;
  }
  
- /* Implement TARGET_CALLEE_COPIES.  */
- 
- static bool
- c6x_callee_copies (cumulative_args_t cum_v ATTRIBUTE_UNUSED,
- 		   machine_mode mode ATTRIBUTE_UNUSED,
- 		   const_tree type ATTRIBUTE_UNUSED,
- 		   bool named ATTRIBUTE_UNUSED)
- {
-   return true;
- }
- 
  /* Return the type to use as __builtin_va_list.  */
  static tree
  c6x_build_builtin_va_list (void)
--- 670,675 ----
*************** c6x_output_mi_thunk (FILE *file ATTRIBUT
*** 769,778 ****
--- 753,764 ----
  		     tree thunk ATTRIBUTE_UNUSED, HOST_WIDE_INT delta,
  		     HOST_WIDE_INT vcall_offset, tree function)
  {
+   const char *fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunk));
    rtx xops[5];
    /* The this parameter is passed as the first argument.  */
    rtx this_rtx = gen_rtx_REG (Pmode, REG_A4);
  
+   assemble_start_function (thunk, fnname);
    c6x_current_insn = NULL;
  
    xops[4] = XEXP (DECL_RTL (function), 0);
*************** c6x_output_mi_thunk (FILE *file ATTRIBUT
*** 851,856 ****
--- 837,843 ----
        output_asm_insn ("nop 4", xops);
        output_asm_insn ("add .d1 %2, %1, %2", xops);
      }
+   assemble_end_function (thunk, fnname);
  }
  
  /* Return true if EXP goes in small data/bss.  */
*************** c6x_section_type_flags (tree decl, const
*** 1080,1085 ****
--- 1067,1080 ----
  
    flags |= default_section_type_flags (decl, name, reloc);
  
+   /* The ".far" section will be declared with @nobits elsewhere.
+      But when declared via this path it will not have the @nobits
+      flag because of SECTION_NOTYPE.  This causes linker warnings
+      due to the mismatched attribute.  Clearing SECTION_NOTYPE
+      for the ".far" section is sufficient to fix this problem.  */
+   if (strcmp (name, ".far") == 0)
+     flags &= ~SECTION_NOTYPE;
+ 
    return flags;
  }
  
*************** c6x_call_saved_register_used (tree call_
*** 1094,1108 ****
    cumulative_args_t cum;
    HARD_REG_SET call_saved_regset;
    tree parameter;
-   machine_mode mode;
-   tree type;
    rtx parm_rtx;
    int i;
  
    INIT_CUMULATIVE_ARGS (cum_v, NULL, NULL, 0, 0);
    cum = pack_cumulative_args (&cum_v);
  
!   COMPL_HARD_REG_SET (call_saved_regset, call_used_reg_set);
    for (i = 0; i < call_expr_nargs (call_expr); i++)
      {
        parameter = CALL_EXPR_ARG (call_expr, i);
--- 1089,1101 ----
    cumulative_args_t cum;
    HARD_REG_SET call_saved_regset;
    tree parameter;
    rtx parm_rtx;
    int i;
  
    INIT_CUMULATIVE_ARGS (cum_v, NULL, NULL, 0, 0);
    cum = pack_cumulative_args (&cum_v);
  
!   call_saved_regset = ~call_used_or_fixed_regs;
    for (i = 0; i < call_expr_nargs (call_expr); i++)
      {
        parameter = CALL_EXPR_ARG (call_expr, i);
*************** c6x_call_saved_register_used (tree call_
*** 1113,1133 ****
        if (TREE_CODE (parameter) == ERROR_MARK)
  	return true;
  
!       type = TREE_TYPE (parameter);
!       gcc_assert (type);
! 
!       mode = TYPE_MODE (type);
!       gcc_assert (mode);
! 
!       if (pass_by_reference (&cum_v, mode, type, true))
!  	{
!  	  mode = Pmode;
!  	  type = build_pointer_type (type);
!  	}
  
!        parm_rtx = c6x_function_arg (cum, mode, type, 0);
  
!        c6x_function_arg_advance (cum, mode, type, 0);
  
         if (!parm_rtx)
  	 continue;
--- 1106,1117 ----
        if (TREE_CODE (parameter) == ERROR_MARK)
  	return true;
  
!       function_arg_info arg (TREE_TYPE (parameter), /*named=*/true);
!       apply_pass_by_reference_rules (&cum_v, arg);
  
!        parm_rtx = c6x_function_arg (cum, arg);
  
!        c6x_function_arg_advance (cum, arg);
  
         if (!parm_rtx)
  	 continue;
*************** c6x_function_ok_for_sibcall (tree decl,
*** 1174,1186 ****
        /* When compiling for DSBT, the calling function must be local,
  	 so that when we reload B14 in the sibcall epilogue, it will
  	 not change its value.  */
-       struct cgraph_local_info *this_func;
  
        if (!decl)
  	/* Not enough information.  */
  	return false;
  
!       this_func = cgraph_node::local_info (current_function_decl);
        return this_func->local;
      }
  
--- 1158,1170 ----
        /* When compiling for DSBT, the calling function must be local,
  	 so that when we reload B14 in the sibcall epilogue, it will
  	 not change its value.  */
  
        if (!decl)
  	/* Not enough information.  */
  	return false;
  
!       cgraph_node *this_func
! 	= cgraph_node::local_info_node (current_function_decl);
        return this_func->local;
      }
  
*************** c6x_valid_mask_p (HOST_WIDE_INT val)
*** 1683,1692 ****
    return true;
  }
  
! /* Expand a block move for a movmemM pattern.  */
  
  bool
! c6x_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp,
  		   rtx expected_align_exp ATTRIBUTE_UNUSED,
  		   rtx expected_size_exp ATTRIBUTE_UNUSED)
  {
--- 1667,1676 ----
    return true;
  }
  
! /* Expand a block move for a cpymemM pattern.  */
  
  bool
! c6x_expand_cpymem (rtx dst, rtx src, rtx count_exp, rtx align_exp,
  		   rtx expected_align_exp ATTRIBUTE_UNUSED,
  		   rtx expected_size_exp ATTRIBUTE_UNUSED)
  {
*************** struct c6x_frame
*** 2532,2545 ****
  static bool
  must_reload_pic_reg_p (void)
  {
-   struct cgraph_local_info *i = NULL;
- 
    if (!TARGET_DSBT)
      return false;
  
!   i = cgraph_node::local_info (current_function_decl);
! 
!   if ((crtl->uses_pic_offset_table || !crtl->is_leaf) && !i->local)
      return true;
    return false;
  }
--- 2516,2528 ----
  static bool
  must_reload_pic_reg_p (void)
  {
    if (!TARGET_DSBT)
      return false;
  
!   cgraph_node *local_info_node
!     = cgraph_node::local_info_node (current_function_decl);
!   if ((crtl->uses_pic_offset_table || !crtl->is_leaf)
!       && !local_info_node->local)
      return true;
    return false;
  }
*************** static int
*** 2549,2556 ****
  c6x_save_reg (unsigned int regno)
  {
    return ((df_regs_ever_live_p (regno)
! 	   && !call_used_regs[regno]
! 	   && !fixed_regs[regno])
  	  || (regno == RETURN_ADDR_REGNO
  	      && (df_regs_ever_live_p (regno)
  		  || !crtl->is_leaf))
--- 2532,2538 ----
  c6x_save_reg (unsigned int regno)
  {
    return ((df_regs_ever_live_p (regno)
! 	   && !call_used_or_fixed_reg_p (regno))
  	  || (regno == RETURN_ADDR_REGNO
  	      && (df_regs_ever_live_p (regno)
  		  || !crtl->is_leaf))
*************** try_rename_operands (rtx_insn *head, rtx
*** 3489,3495 ****
      }
  
    /* If we get here, we can do the renaming.  */
!   COMPL_HARD_REG_SET (unavailable, reg_class_contents[(int) super_class]);
  
    old_reg = this_head->regno;
    best_reg =
--- 3471,3477 ----
      }
  
    /* If we get here, we can do the renaming.  */
!   unavailable = ~reg_class_contents[super_class];
  
    old_reg = this_head->regno;
    best_reg =
*************** clobber_cond_1 (rtx x, const_rtx pat ATT
*** 4325,4331 ****
     only those jumps which are still in flight.  */
  
  static void
! maybe_clobber_cond (rtx insn, int clock_var)
  {
    int n, idx;
    idx = ss.jump_cycle_index;
--- 4307,4313 ----
     only those jumps which are still in flight.  */
  
  static void
! maybe_clobber_cond (rtx_insn *insn, int clock_var)
  {
    int n, idx;
    idx = ss.jump_cycle_index;
*************** maybe_clobber_cond (rtx insn, int clock_
*** 4350,4356 ****
  	  continue;
  	}
  
!       note_stores (PATTERN (insn), clobber_cond_1, ss.jump_cond + idx);
        for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
  	if (REG_NOTE_KIND (link) == REG_INC)
  	  clobber_cond_1 (XEXP (link, 0), NULL_RTX, ss.jump_cond + idx);
--- 4332,4338 ----
  	  continue;
  	}
  
!       note_stores (insn, clobber_cond_1, ss.jump_cond + idx);
        for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
  	if (REG_NOTE_KIND (link) == REG_INC)
  	  clobber_cond_1 (XEXP (link, 0), NULL_RTX, ss.jump_cond + idx);
*************** c6x_expand_builtin (tree exp, rtx target
*** 6650,6656 ****
    size_t i;
    const struct builtin_description *d;
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
  
    for (i = 0, d = bdesc_2arg; i < ARRAY_SIZE (bdesc_2arg); i++, d++)
      if (d->code == fcode)
--- 6632,6638 ----
    size_t i;
    const struct builtin_description *d;
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl);
  
    for (i = 0, d = bdesc_2arg; i < ARRAY_SIZE (bdesc_2arg); i++, d++)
      if (d->code == fcode)
*************** c6x_modes_tieable_p (machine_mode mode1,
*** 6694,6699 ****
--- 6676,6703 ----
  	      && GET_MODE_SIZE (mode2) <= UNITS_PER_WORD));
  }
  
+ /* Implement REGNO_REG_CLASS.  */
+ 
+ enum reg_class
+ c6x_regno_reg_class (int reg)
+ {
+   if (reg >= REG_A1 && reg <= REG_A2)
+     return PREDICATE_A_REGS;
+ 
+   if (reg == REG_A0 && TARGET_INSNS_64)
+     return PREDICATE_A_REGS;
+ 
+   if (reg >= REG_B0 && reg <= REG_B2)
+     return PREDICATE_B_REGS;
+ 
+   if (A_REGNO_P (reg))
+     return NONPREDICATE_A_REGS;
+ 
+   if (call_used_or_fixed_reg_p (reg))
+     return CALL_USED_B_REGS;
+ 
+   return B_REGS;
+ }
  
  /* Target Structure.  */
  
*************** c6x_modes_tieable_p (machine_mode mode1,
*** 6720,6726 ****
  #undef TARGET_PASS_BY_REFERENCE
  #define TARGET_PASS_BY_REFERENCE c6x_pass_by_reference
  #undef TARGET_CALLEE_COPIES
! #define TARGET_CALLEE_COPIES c6x_callee_copies
  #undef TARGET_STRUCT_VALUE_RTX
  #define TARGET_STRUCT_VALUE_RTX c6x_struct_value_rtx
  #undef TARGET_FUNCTION_OK_FOR_SIBCALL
--- 6724,6730 ----
  #undef TARGET_PASS_BY_REFERENCE
  #define TARGET_PASS_BY_REFERENCE c6x_pass_by_reference
  #undef TARGET_CALLEE_COPIES
! #define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_arg_info_true
  #undef TARGET_STRUCT_VALUE_RTX
  #define TARGET_STRUCT_VALUE_RTX c6x_struct_value_rtx
  #undef TARGET_FUNCTION_OK_FOR_SIBCALL
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x.h gcc-10.1.0/gcc/config/c6x/c6x.h
*** gcc-9.3.0/gcc/config/c6x/c6x.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/c6x.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target Definitions for TI C6X.
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
     Contributed by Andrew Jenner <andrew@codesourcery.com>
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
--- 1,5 ----
  /* Target Definitions for TI C6X.
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
     Contributed by Andrew Jenner <andrew@codesourcery.com>
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
*************** enum reg_class
*** 259,270 ****
  #define CROSS_OPERANDS(X0,X1) \
    (A_REG_P (X0) == A_REG_P (X1) ? CROSS_N : CROSS_Y)
  
! #define REGNO_REG_CLASS(reg) \
!     ((reg) >= REG_A1 && (reg) <= REG_A2 ? PREDICATE_A_REGS	\
!      : (reg) == REG_A0 && TARGET_INSNS_64 ? PREDICATE_A_REGS	\
!      : (reg) >= REG_B0 && (reg) <= REG_B2 ? PREDICATE_B_REGS	\
!      : A_REGNO_P (reg) ? NONPREDICATE_A_REGS			\
!      : call_used_regs[reg] ? CALL_USED_B_REGS : B_REGS)
  
  #define BASE_REG_CLASS ALL_REGS
  #define INDEX_REG_CLASS ALL_REGS
--- 259,265 ----
  #define CROSS_OPERANDS(X0,X1) \
    (A_REG_P (X0) == A_REG_P (X1) ? CROSS_N : CROSS_Y)
  
! #define REGNO_REG_CLASS(reg) c6x_regno_reg_class (reg)
  
  #define BASE_REG_CLASS ALL_REGS
  #define INDEX_REG_CLASS ALL_REGS
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x.md gcc-10.1.0/gcc/config/c6x/c6x.md
*** gcc-9.3.0/gcc/config/c6x/c6x.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/c6x.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description for TI C6X.
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by Andrew Jenner <andrew@codesourcery.com>
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
--- 1,5 ----
  ;; Machine description for TI C6X.
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by Andrew Jenner <andrew@codesourcery.com>
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
***************
*** 2844,2850 ****
  ;; Block moves
  ;; -------------------------------------------------------------------------
  
! (define_expand "movmemsi"
    [(use (match_operand:BLK 0 "memory_operand" ""))
     (use (match_operand:BLK 1 "memory_operand" ""))
     (use (match_operand:SI 2 "nonmemory_operand" ""))
--- 2844,2850 ----
  ;; Block moves
  ;; -------------------------------------------------------------------------
  
! (define_expand "cpymemsi"
    [(use (match_operand:BLK 0 "memory_operand" ""))
     (use (match_operand:BLK 1 "memory_operand" ""))
     (use (match_operand:SI 2 "nonmemory_operand" ""))
***************
*** 2853,2859 ****
     (use (match_operand:SI 5 "const_int_operand" ""))]
    ""
  {
!  if (c6x_expand_movmem (operands[0], operands[1], operands[2], operands[3],
  			operands[4], operands[5]))
     DONE;
   else
--- 2853,2859 ----
     (use (match_operand:SI 5 "const_int_operand" ""))]
    ""
  {
!  if (c6x_expand_cpymem (operands[0], operands[1], operands[2], operands[3],
  			operands[4], operands[5]))
     DONE;
   else
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x.opt gcc-10.1.0/gcc/config/c6x/c6x.opt
*** gcc-9.3.0/gcc/config/c6x/c6x.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/c6x.opt	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ; Option definitions for TI C6X.
! ; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ; Contributed by CodeSourcery.
  ;
--- 1,5 ----
  ; Option definitions for TI C6X.
! ; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ; Contributed by CodeSourcery.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/c6x_intrinsics.h gcc-10.1.0/gcc/config/c6x/c6x_intrinsics.h
*** gcc-9.3.0/gcc/config/c6x/c6x_intrinsics.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/c6x_intrinsics.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Intrinsics for TI C6X.
  
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by CodeSourcery.
  
     This file is part of GCC.
--- 1,6 ----
  /* Intrinsics for TI C6X.
  
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by CodeSourcery.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/constraints.md gcc-10.1.0/gcc/config/c6x/constraints.md
*** gcc-9.3.0/gcc/config/c6x/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for TI C6X.
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;; Contributed by Andrew Jenner <andrew@codesourcery.com>
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
--- 1,5 ----
  ;; Constraint definitions for TI C6X.
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;; Contributed by Andrew Jenner <andrew@codesourcery.com>
  ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
  ;; Contributed by CodeSourcery.
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/elf-common.h gcc-10.1.0/gcc/config/c6x/elf-common.h
*** gcc-9.3.0/gcc/config/c6x/elf-common.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/elf-common.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* ELF definitions for TI C6X
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
     Contributed by Andrew Jenner <andrew@codesourcery.com>
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
--- 1,5 ----
  /* ELF definitions for TI C6X
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
     Contributed by Andrew Jenner <andrew@codesourcery.com>
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/elf.h gcc-10.1.0/gcc/config/c6x/elf.h
*** gcc-9.3.0/gcc/config/c6x/elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/elf.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* ELF definitions for TI C6X
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
     Contributed by Andrew Jenner <andrew@codesourcery.com>
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
--- 1,5 ----
  /* ELF definitions for TI C6X
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
     Contributed by Andrew Jenner <andrew@codesourcery.com>
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/genmult.sh gcc-10.1.0/gcc/config/c6x/genmult.sh
*** gcc-9.3.0/gcc/config/c6x/genmult.sh	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/genmult.sh	Thu May  7 10:49:59 2020
***************
*** 2,8 ****
  # Generate c6x-mult.md from c6x-mult.md.in
  # The input file is passed as an argument.
  
! # Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
  #This file is part of GCC.
  
--- 2,8 ----
  # Generate c6x-mult.md from c6x-mult.md.in
  # The input file is passed as an argument.
  
! # Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
  #This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/genopt.sh gcc-10.1.0/gcc/config/c6x/genopt.sh
*** gcc-9.3.0/gcc/config/c6x/genopt.sh	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/genopt.sh	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  #!/bin/sh
  # Generate c6x-tables.opt from the lists in *.def.
! # Copyright (C) 2011-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,6 ----
  #!/bin/sh
  # Generate c6x-tables.opt from the lists in *.def.
! # Copyright (C) 2011-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
*************** cat <<EOF
*** 22,28 ****
  ; -*- buffer-read-only: t -*-
  ; Generated automatically by genopt.sh from c6x-isas.def.
  ;
! ; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 22,28 ----
  ; -*- buffer-read-only: t -*-
  ; Generated automatically by genopt.sh from c6x-isas.def.
  ;
! ; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/gensched.sh gcc-10.1.0/gcc/config/c6x/gensched.sh
*** gcc-9.3.0/gcc/config/c6x/gensched.sh	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/gensched.sh	Thu May  7 10:49:59 2020
***************
*** 2,8 ****
  # Generate c6x-sched.md from c6x-sched.md.in
  # The input file is passed as an argument.
  
! # Copyright (C) 2010-2019 Free Software Foundation, Inc.
  
  #This file is part of GCC.
  
--- 2,8 ----
  # Generate c6x-sched.md from c6x-sched.md.in
  # The input file is passed as an argument.
  
! # Copyright (C) 2010-2020 Free Software Foundation, Inc.
  
  #This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/predicates.md gcc-10.1.0/gcc/config/c6x/predicates.md
*** gcc-9.3.0/gcc/config/c6x/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Predicates for TI C6X
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
     Contributed by Andrew Jenner <andrew@codesourcery.com>
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
--- 1,5 ----
  /* Predicates for TI C6X
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
     Contributed by Andrew Jenner <andrew@codesourcery.com>
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/sync.md gcc-10.1.0/gcc/config/c6x/sync.md
*** gcc-9.3.0/gcc/config/c6x/sync.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/sync.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; GCC machine description for C6X synchronization instructions.
! ;; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; GCC machine description for C6X synchronization instructions.
! ;; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/t-c6x gcc-10.1.0/gcc/config/c6x/t-c6x
*** gcc-9.3.0/gcc/config/c6x/t-c6x	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/t-c6x	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  # Target Makefile Fragment for TI C6X.
! # Copyright (C) 2010-2019 Free Software Foundation, Inc.
  # Contributed by CodeSourcery.
  #
  # This file is part of GCC.
--- 1,5 ----
  # Target Makefile Fragment for TI C6X.
! # Copyright (C) 2010-2020 Free Software Foundation, Inc.
  # Contributed by CodeSourcery.
  #
  # This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/t-c6x-elf gcc-10.1.0/gcc/config/c6x/t-c6x-elf
*** gcc-9.3.0/gcc/config/c6x/t-c6x-elf	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/t-c6x-elf	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  # Target Makefile Fragment for TI C6X using ELF.
! # Copyright (C) 2010-2019 Free Software Foundation, Inc.
  # Contributed by CodeSourcery.
  #
  # This file is part of GCC.
--- 1,5 ----
  # Target Makefile Fragment for TI C6X using ELF.
! # Copyright (C) 2010-2020 Free Software Foundation, Inc.
  # Contributed by CodeSourcery.
  #
  # This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/c6x/uclinux-elf.h gcc-10.1.0/gcc/config/c6x/uclinux-elf.h
*** gcc-9.3.0/gcc/config/c6x/uclinux-elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/c6x/uclinux-elf.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for TI C6X running ucLinux using ELF
!    Copyright (C) 2010-2019 Free Software Foundation, Inc.
     Contributed by Andrew Jenner <andrew@codesourcery.com>
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
--- 1,5 ----
  /* Definitions for TI C6X running ucLinux using ELF
!    Copyright (C) 2010-2020 Free Software Foundation, Inc.
     Contributed by Andrew Jenner <andrew@codesourcery.com>
     Contributed by Bernd Schmidt <bernds@codesourcery.com>
  
diff -Nrcpad gcc-9.3.0/gcc/config/cr16/constraints.md gcc-10.1.0/gcc/config/cr16/constraints.md
*** gcc-9.3.0/gcc/config/cr16/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cr16/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicates of machine description for CR16.
! ;; Copyright (C) 2012-2019 Free Software Foundation, Inc.
  ;; Contributed by KPIT Cummins Infosystems Limited.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Predicates of machine description for CR16.
! ;; Copyright (C) 2012-2020 Free Software Foundation, Inc.
  ;; Contributed by KPIT Cummins Infosystems Limited.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/cr16/cr16-protos.h gcc-10.1.0/gcc/config/cr16/cr16-protos.h
*** gcc-9.3.0/gcc/config/cr16/cr16-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cr16/cr16-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Prototypes for exported functions defined in cr16.c
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by KPIT Cummins Infosystems Limited.
  
     This file is part of GCC.
--- 1,5 ----
  /* Prototypes for exported functions defined in cr16.c
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by KPIT Cummins Infosystems Limited.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/cr16/cr16.c gcc-10.1.0/gcc/config/cr16/cr16.c
*** gcc-9.3.0/gcc/config/cr16/cr16.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cr16/cr16.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Output routines for CR16 processor.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by KPIT Cummins Infosystems Limited.
    
     This file is part of GCC.
--- 1,5 ----
  /* Output routines for CR16 processor.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by KPIT Cummins Infosystems Limited.
    
     This file is part of GCC.
*************** cr16_compute_save_regs (void)
*** 367,373 ****
        /* If this reg is used and not call-used (except RA), save it.  */
        if (cr16_interrupt_function_p ())
  	{
! 	  if (!crtl->is_leaf && call_used_regs[regno])
  	    /* This is a volatile reg in a non-leaf interrupt routine - save 
  	       it for the sake of its sons.  */
  	    current_frame_info.save_regs[regno] = 1;
--- 367,373 ----
        /* If this reg is used and not call-used (except RA), save it.  */
        if (cr16_interrupt_function_p ())
  	{
! 	  if (!crtl->is_leaf && call_used_or_fixed_reg_p (regno))
  	    /* This is a volatile reg in a non-leaf interrupt routine - save 
  	       it for the sake of its sons.  */
  	    current_frame_info.save_regs[regno] = 1;
*************** cr16_compute_save_regs (void)
*** 382,388 ****
  	{
  	  /* If this reg is used and not call-used (except RA), save it.  */
  	  if (df_regs_ever_live_p (regno)
! 	      && (!call_used_regs[regno] || regno == RETURN_ADDRESS_REGNUM))
  	    current_frame_info.save_regs[regno] = 1;
  	  else
  	    current_frame_info.save_regs[regno] = 0;
--- 382,389 ----
  	{
  	  /* If this reg is used and not call-used (except RA), save it.  */
  	  if (df_regs_ever_live_p (regno)
! 	      && (!call_used_or_fixed_reg_p (regno)
! 		  || regno == RETURN_ADDRESS_REGNUM))
  	    current_frame_info.save_regs[regno] = 1;
  	  else
  	    current_frame_info.save_regs[regno] = 0;
*************** enough_regs_for_param (CUMULATIVE_ARGS *
*** 592,601 ****
    return 0;
  }
  
! /* Implements the macro FUNCTION_ARG defined in cr16.h.  */
  static rtx
! cr16_function_arg (cumulative_args_t cum_v, machine_mode mode,
! 		   const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    cum->last_parm_in_reg = 0;
--- 593,601 ----
    return 0;
  }
  
! /* Implement TARGET_FUNCTION_ARG.  */
  static rtx
! cr16_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    cum->last_parm_in_reg = 0;
*************** cr16_function_arg (cumulative_args_t cum
*** 604,623 ****
       had their registers assigned. The rtx that function_arg returns from 
       this type is supposed to pass to 'gen_call' but currently it is not 
       implemented.  */
!   if (type == void_type_node)
      return NULL_RTX;
  
!   if (targetm.calls.must_pass_in_stack (mode, type) || (cum->ints < 0))
      return NULL_RTX;
  
!   if (mode == BLKmode)
      {
        /* Enable structures that need padding bytes at the end to pass to a
           function in registers.  */
!       if (enough_regs_for_param (cum, type, mode) != 0)
  	{
  	  cum->last_parm_in_reg = 1;
! 	  return gen_rtx_REG (mode, MIN_REG_FOR_PASSING_ARGS + cum->ints);
  	}
      }
  
--- 604,623 ----
       had their registers assigned. The rtx that function_arg returns from 
       this type is supposed to pass to 'gen_call' but currently it is not 
       implemented.  */
!   if (arg.end_marker_p ())
      return NULL_RTX;
  
!   if (targetm.calls.must_pass_in_stack (arg) || (cum->ints < 0))
      return NULL_RTX;
  
!   if (arg.mode == BLKmode)
      {
        /* Enable structures that need padding bytes at the end to pass to a
           function in registers.  */
!       if (enough_regs_for_param (cum, arg.type, arg.mode) != 0)
  	{
  	  cum->last_parm_in_reg = 1;
! 	  return gen_rtx_REG (arg.mode, MIN_REG_FOR_PASSING_ARGS + cum->ints);
  	}
      }
  
*************** cr16_function_arg (cumulative_args_t cum
*** 625,634 ****
      return NULL_RTX;
    else
      {
!       if (enough_regs_for_param (cum, type, mode) != 0)
  	{
  	  cum->last_parm_in_reg = 1;
! 	  return gen_rtx_REG (mode, MIN_REG_FOR_PASSING_ARGS + cum->ints);
  	}
      }
  
--- 625,634 ----
      return NULL_RTX;
    else
      {
!       if (enough_regs_for_param (cum, arg.type, arg.mode) != 0)
  	{
  	  cum->last_parm_in_reg = 1;
! 	  return gen_rtx_REG (arg.mode, MIN_REG_FOR_PASSING_ARGS + cum->ints);
  	}
      }
  
*************** cr16_init_cumulative_args (CUMULATIVE_AR
*** 661,694 ****
  
  /* Implements the macro FUNCTION_ARG_ADVANCE defined in cr16.h.  */
  static void
! cr16_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
! 			   const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS * cum = get_cumulative_args (cum_v);
  
    /* l holds the number of registers required.  */
!   int l = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
  
    /* If the parameter isn't passed on a register don't advance cum.  */
    if (!cum->last_parm_in_reg)
      return;
  
!   if (targetm.calls.must_pass_in_stack (mode, type) || (cum->ints < 0))
      return;
  
!   if ((mode == SImode) || (mode == HImode)
!       || (mode == QImode) || (mode == DImode))
      {
        if (l <= 1)
  	cum->ints += 1;
        else
  	cum->ints += l;
      }
!   else if ((mode == SFmode) || (mode == DFmode))
      cum->ints += l;
!   else if ((mode) == BLKmode)
      {
!       if ((l = enough_regs_for_param (cum, type, mode)) != 0)
  	cum->ints += l;
      }
    return;
--- 661,694 ----
  
  /* Implements the macro FUNCTION_ARG_ADVANCE defined in cr16.h.  */
  static void
! cr16_function_arg_advance (cumulative_args_t cum_v,
! 			   const function_arg_info &arg)
  {
    CUMULATIVE_ARGS * cum = get_cumulative_args (cum_v);
  
    /* l holds the number of registers required.  */
!   int l = GET_MODE_BITSIZE (arg.mode) / BITS_PER_WORD;
  
    /* If the parameter isn't passed on a register don't advance cum.  */
    if (!cum->last_parm_in_reg)
      return;
  
!   if (targetm.calls.must_pass_in_stack (arg) || (cum->ints < 0))
      return;
  
!   if ((arg.mode == SImode) || (arg.mode == HImode)
!       || (arg.mode == QImode) || (arg.mode == DImode))
      {
        if (l <= 1)
  	cum->ints += 1;
        else
  	cum->ints += l;
      }
!   else if ((arg.mode == SFmode) || (arg.mode == DFmode))
      cum->ints += l;
!   else if (arg.mode == BLKmode)
      {
!       if ((l = enough_regs_for_param (cum, arg.type, arg.mode)) != 0)
  	cum->ints += l;
      }
    return;
diff -Nrcpad gcc-9.3.0/gcc/config/cr16/cr16.h gcc-10.1.0/gcc/config/cr16/cr16.h
*** gcc-9.3.0/gcc/config/cr16/cr16.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cr16/cr16.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, for CR16.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by KPIT Cummins Infosystems Limited.
  
     This file is part of GCC.
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, for CR16.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by KPIT Cummins Infosystems Limited.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/cr16/cr16.md gcc-10.1.0/gcc/config/cr16/cr16.md
*** gcc-9.3.0/gcc/config/cr16/cr16.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cr16/cr16.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; GCC machine description for CR16.
! ;; Copyright (C) 2012-2019 Free Software Foundation, Inc.
  ;; Contributed by KPIT Cummins Infosystems Limited.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; GCC machine description for CR16.
! ;; Copyright (C) 2012-2020 Free Software Foundation, Inc.
  ;; Contributed by KPIT Cummins Infosystems Limited.
  
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/cr16/cr16.opt gcc-10.1.0/gcc/config/cr16/cr16.opt
*** gcc-9.3.0/gcc/config/cr16/cr16.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cr16/cr16.opt	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ; Options for the National Semiconductor CR16 port of the compiler.
! ; Copyright (C) 2012-2019 Free Software Foundation, Inc.
  ; Contributed by KPIT Cummins Infosystems Limited.
  ;
  ; This file is part of GCC.
--- 1,5 ----
  ; Options for the National Semiconductor CR16 port of the compiler.
! ; Copyright (C) 2012-2020 Free Software Foundation, Inc.
  ; Contributed by KPIT Cummins Infosystems Limited.
  ;
  ; This file is part of GCC.
***************
*** 20,26 ****
  
  msim
  Target
! -msim   Use simulator runtime.
  
  mbit-ops
  Target Report Mask(BIT_OPS)
--- 20,26 ----
  
  msim
  Target
! Use simulator runtime.
  
  mbit-ops
  Target Report Mask(BIT_OPS)
diff -Nrcpad gcc-9.3.0/gcc/config/cr16/predicates.md gcc-10.1.0/gcc/config/cr16/predicates.md
*** gcc-9.3.0/gcc/config/cr16/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cr16/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicates of machine description for CR16.
! ;; Copyright (C) 2012-2019 Free Software Foundation, Inc.
  ;; Contributed by KPIT Cummins Infosystems Limited.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Predicates of machine description for CR16.
! ;; Copyright (C) 2012-2020 Free Software Foundation, Inc.
  ;; Contributed by KPIT Cummins Infosystems Limited.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/cr16/t-cr16 gcc-10.1.0/gcc/config/cr16/t-cr16
*** gcc-9.3.0/gcc/config/cr16/t-cr16	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cr16/t-cr16	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  # CR16 Target Makefile
! # Copyright (C) 2012-2019 Free Software Foundation, Inc.
  # Contributed by KPIT Cummins Infosystems Limited.
  #
  # This file is part of GCC.
--- 1,5 ----
  # CR16 Target Makefile
! # Copyright (C) 2012-2020 Free Software Foundation, Inc.
  # Contributed by KPIT Cummins Infosystems Limited.
  #
  # This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/cris/constraints.md gcc-10.1.0/gcc/config/cris/constraints.md
*** gcc-9.3.0/gcc/config/cris/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cris/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for CRIS.
! ;; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Constraint definitions for CRIS.
! ;; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/cris/cris-protos.h gcc-10.1.0/gcc/config/cris/cris-protos.h
*** gcc-9.3.0/gcc/config/cris/cris-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cris/cris-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for GCC.  Part of the machine description for CRIS.
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
     Contributed by Axis Communications.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for GCC.  Part of the machine description for CRIS.
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
     Contributed by Axis Communications.
  
  This file is part of GCC.
*************** extern bool cris_constant_index_p (const
*** 38,43 ****
--- 38,44 ----
  extern bool cris_base_p (const_rtx, bool);
  extern bool cris_base_or_autoincr_p (const_rtx, bool);
  extern bool cris_bdap_index_p (const_rtx, bool);
+ extern void cris_reduce_compare (rtx *, rtx *, rtx *);
  extern bool cris_biap_index_p (const_rtx, bool);
  extern bool cris_legitimate_address_p (machine_mode, rtx, bool);
  extern bool cris_store_multiple_op_p (rtx);
diff -Nrcpad gcc-9.3.0/gcc/config/cris/cris.c gcc-10.1.0/gcc/config/cris/cris.c
*** gcc-9.3.0/gcc/config/cris/cris.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cris/cris.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for GCC.  Part of the machine description for CRIS.
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
     Contributed by Axis Communications.  Written by Hans-Peter Nilsson.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for GCC.  Part of the machine description for CRIS.
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
     Contributed by Axis Communications.  Written by Hans-Peter Nilsson.
  
  This file is part of GCC.
*************** static struct machine_function * cris_in
*** 108,115 ****
  
  static rtx cris_struct_value_rtx (tree, int);
  
! static void cris_setup_incoming_varargs (cumulative_args_t, machine_mode,
! 					 tree type, int *, int);
  
  static int cris_initial_frame_pointer_offset (void);
  
--- 108,116 ----
  
  static rtx cris_struct_value_rtx (tree, int);
  
! static void cris_setup_incoming_varargs (cumulative_args_t,
! 					 const function_arg_info &,
! 					 int *, int);
  
  static int cris_initial_frame_pointer_offset (void);
  
*************** static int cris_register_move_cost (mach
*** 139,154 ****
  static int cris_memory_move_cost (machine_mode, reg_class_t, bool);
  static bool cris_rtx_costs (rtx, machine_mode, int, int, int *, bool);
  static int cris_address_cost (rtx, machine_mode, addr_space_t, bool);
! static bool cris_pass_by_reference (cumulative_args_t, machine_mode,
! 				    const_tree, bool);
! static int cris_arg_partial_bytes (cumulative_args_t, machine_mode,
! 				   tree, bool);
! static rtx cris_function_arg (cumulative_args_t, machine_mode,
! 			      const_tree, bool);
  static rtx cris_function_incoming_arg (cumulative_args_t,
! 				       machine_mode, const_tree, bool);
! static void cris_function_arg_advance (cumulative_args_t, machine_mode,
! 				       const_tree, bool);
  static rtx_insn *cris_md_asm_adjust (vec<rtx> &, vec<rtx> &,
  				     vec<const char *> &,
  				     vec<rtx> &, HARD_REG_SET &);
--- 140,154 ----
  static int cris_memory_move_cost (machine_mode, reg_class_t, bool);
  static bool cris_rtx_costs (rtx, machine_mode, int, int, int *, bool);
  static int cris_address_cost (rtx, machine_mode, addr_space_t, bool);
! static bool cris_pass_by_reference (cumulative_args_t,
! 				    const function_arg_info &);
! static int cris_arg_partial_bytes (cumulative_args_t,
! 				   const function_arg_info &);
! static rtx cris_function_arg (cumulative_args_t, const function_arg_info &);
  static rtx cris_function_incoming_arg (cumulative_args_t,
! 				       const function_arg_info &);
! static void cris_function_arg_advance (cumulative_args_t,
! 				       const function_arg_info &);
  static rtx_insn *cris_md_asm_adjust (vec<rtx> &, vec<rtx> &,
  				     vec<const char *> &,
  				     vec<rtx> &, HARD_REG_SET &);
*************** cris_reg_saved_in_regsave_area (unsigned
*** 716,728 ****
  {
    return
      (((df_regs_ever_live_p (regno)
!        && !call_used_regs[regno])
        || (regno == PIC_OFFSET_TABLE_REGNUM
  	  && (got_really_used
  	      /* It is saved anyway, if there would be a gap.  */
  	      || (flag_pic
  		  && df_regs_ever_live_p (regno + 1)
! 		  && !call_used_regs[regno + 1]))))
       && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
       && regno != CRIS_SRP_REGNUM)
      || (crtl->calls_eh_return
--- 716,728 ----
  {
    return
      (((df_regs_ever_live_p (regno)
!        && !call_used_or_fixed_reg_p (regno))
        || (regno == PIC_OFFSET_TABLE_REGNUM
  	  && (got_really_used
  	      /* It is saved anyway, if there would be a gap.  */
  	      || (flag_pic
  		  && df_regs_ever_live_p (regno + 1)
! 		  && !call_used_or_fixed_reg_p (regno + 1)))))
       && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
       && regno != CRIS_SRP_REGNUM)
      || (crtl->calls_eh_return
*************** cris_asm_output_mi_thunk (FILE *stream,
*** 2764,2769 ****
--- 2764,2772 ----
  			  HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
  			  tree funcdecl)
  {
+   const char *fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunkdecl));
+ 
+   assemble_start_function (thunkdecl, fnname);
    /* Make sure unwind info is emitted for the thunk if needed.  */
    final_start_function (emit_barrier (), stream, 1);
  
*************** cris_asm_output_mi_thunk (FILE *stream,
*** 2806,2811 ****
--- 2809,2815 ----
      }
  
    final_end_function ();
+   assemble_end_function (thunkdecl, fnname);
  }
  
  /* Boilerplate emitted at start of file.
*************** cris_split_movdx (rtx *operands)
*** 3049,3054 ****
--- 3053,3115 ----
    return val;
  }
  
+ /* Try to change a comparison against a constant to be against zero, and
+    an unsigned compare against zero to be an equality test.  Beware:
+    only valid for compares of integer-type operands.  Also, note that we
+    don't use operand 0 at the moment.  */
+ 
+ void
+ cris_reduce_compare (rtx *relp, rtx *, rtx *op1p)
+ {
+   rtx op1 = *op1p;
+   rtx_code code = GET_CODE (*relp);
+ 
+   /* Code lifted mostly from emit_store_flag_1.  */
+   switch (code)
+     {
+     case LT:
+       if (op1 == const1_rtx)
+ 	code = LE;
+       break;
+     case LE:
+       if (op1 == constm1_rtx)
+ 	code = LT;
+       break;
+     case GE:
+       if (op1 == const1_rtx)
+ 	code = GT;
+       break;
+     case GT:
+       if (op1 == constm1_rtx)
+ 	code = GE;
+       break;
+     case GEU:
+       if (op1 == const1_rtx)
+ 	code = NE;
+       break;
+     case LTU:
+       if (op1 == const1_rtx)
+ 	code = EQ;
+       break;
+     case GTU:
+       if (op1 == const0_rtx)
+ 	code = NE;
+       break;
+     case LEU:
+       if (op1 == const0_rtx)
+ 	code = EQ;
+       break;
+     default:
+       break;
+     }
+ 
+   if (code != GET_CODE (*relp))
+   {
+     *op1p = const0_rtx;
+     PUT_CODE (*relp, code);
+   }
+ }
+ 
  /* The expander for the prologue pattern name.  */
  
  void
*************** cris_struct_value_rtx (tree fntype ATTRI
*** 4017,4024 ****
  
  static void
  cris_setup_incoming_varargs (cumulative_args_t ca_v,
! 			     machine_mode mode ATTRIBUTE_UNUSED,
! 			     tree type ATTRIBUTE_UNUSED,
  			     int *pretend_arg_size,
  			     int second_time)
  {
--- 4078,4084 ----
  
  static void
  cris_setup_incoming_varargs (cumulative_args_t ca_v,
! 			     const function_arg_info &,
  			     int *pretend_arg_size,
  			     int second_time)
  {
*************** cris_setup_incoming_varargs (cumulative_
*** 4037,4052 ****
  	     ca->regs, *pretend_arg_size, second_time);
  }
  
! /* Return true if TYPE must be passed by invisible reference.
     For cris, we pass <= 8 bytes by value, others by reference.  */
  
  static bool
! cris_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED,
! 			machine_mode mode, const_tree type,
! 			bool named ATTRIBUTE_UNUSED)
  {
!   return (targetm.calls.must_pass_in_stack (mode, type)
! 	  || CRIS_FUNCTION_ARG_SIZE (mode, type) > 8);
  }
  
  /* A combination of defining TARGET_PROMOTE_FUNCTION_MODE, promoting arguments
--- 4097,4110 ----
  	     ca->regs, *pretend_arg_size, second_time);
  }
  
! /* Return true if ARG must be passed by invisible reference.
     For cris, we pass <= 8 bytes by value, others by reference.  */
  
  static bool
! cris_pass_by_reference (cumulative_args_t, const function_arg_info &arg)
  {
!   return (targetm.calls.must_pass_in_stack (arg)
! 	  || CRIS_FUNCTION_ARG_SIZE (arg.mode, arg.type) > 8);
  }
  
  /* A combination of defining TARGET_PROMOTE_FUNCTION_MODE, promoting arguments
*************** cris_function_value_regno_p (const unsig
*** 4107,4134 ****
  }
  
  static int
! cris_arg_partial_bytes (cumulative_args_t ca, machine_mode mode,
! 			tree type, bool named ATTRIBUTE_UNUSED)
  {
    if (get_cumulative_args (ca)->regs == CRIS_MAX_ARGS_IN_REGS - 1
!       && !targetm.calls.must_pass_in_stack (mode, type)
!       && CRIS_FUNCTION_ARG_SIZE (mode, type) > 4
!       && CRIS_FUNCTION_ARG_SIZE (mode, type) <= 8)
      return UNITS_PER_WORD;
    else
      return 0;
  }
  
  static rtx
! cris_function_arg_1 (cumulative_args_t ca_v,
! 		     machine_mode mode ATTRIBUTE_UNUSED,
! 		     const_tree type ATTRIBUTE_UNUSED,
! 		     bool named, bool incoming)
  {
    const CUMULATIVE_ARGS *ca = get_cumulative_args (ca_v);
  
!   if ((!incoming || named) && ca->regs < CRIS_MAX_ARGS_IN_REGS)
!     return gen_rtx_REG (mode, CRIS_FIRST_ARG_REG + ca->regs);
    else
      return NULL_RTX;
  }
--- 4165,4189 ----
  }
  
  static int
! cris_arg_partial_bytes (cumulative_args_t ca, const function_arg_info &arg)
  {
    if (get_cumulative_args (ca)->regs == CRIS_MAX_ARGS_IN_REGS - 1
!       && !targetm.calls.must_pass_in_stack (arg)
!       && CRIS_FUNCTION_ARG_SIZE (arg.mode, arg.type) > 4
!       && CRIS_FUNCTION_ARG_SIZE (arg.mode, arg.type) <= 8)
      return UNITS_PER_WORD;
    else
      return 0;
  }
  
  static rtx
! cris_function_arg_1 (cumulative_args_t ca_v, const function_arg_info &arg,
! 		     bool incoming)
  {
    const CUMULATIVE_ARGS *ca = get_cumulative_args (ca_v);
  
!   if ((!incoming || arg.named) && ca->regs < CRIS_MAX_ARGS_IN_REGS)
!     return gen_rtx_REG (arg.mode, CRIS_FIRST_ARG_REG + ca->regs);
    else
      return NULL_RTX;
  }
*************** cris_function_arg_1 (cumulative_args_t c
*** 4137,4146 ****
     The void_type_node is sent as a "closing" call.  */
  
  static rtx
! cris_function_arg (cumulative_args_t ca, machine_mode mode,
! 		   const_tree type, bool named)
  {
!   return cris_function_arg_1 (ca, mode, type, named, false);
  }
  
  /* Worker function for TARGET_FUNCTION_INCOMING_ARG.
--- 4192,4200 ----
     The void_type_node is sent as a "closing" call.  */
  
  static rtx
! cris_function_arg (cumulative_args_t ca, const function_arg_info &arg)
  {
!   return cris_function_arg_1 (ca, arg, false);
  }
  
  /* Worker function for TARGET_FUNCTION_INCOMING_ARG.
*************** cris_function_arg (cumulative_args_t ca,
*** 4148,4171 ****
     The differences between this and the previous, is that this one checks
     that an argument is named, since incoming stdarg/varargs arguments are
     pushed onto the stack, and we don't have to check against the "closing"
!    void_type_node TYPE parameter.  */
  
  static rtx
! cris_function_incoming_arg (cumulative_args_t ca, machine_mode mode,
! 			    const_tree type, bool named)
  {
!   return cris_function_arg_1 (ca, mode, type, named, true);
  }
  
  /* Worker function for TARGET_FUNCTION_ARG_ADVANCE.  */
  
  static void
! cris_function_arg_advance (cumulative_args_t ca_v, machine_mode mode,
! 			   const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *ca = get_cumulative_args (ca_v);
  
!   ca->regs += (3 + CRIS_FUNCTION_ARG_SIZE (mode, type)) / 4;
  }
  
  /* Worker function for TARGET_MD_ASM_ADJUST.  */
--- 4202,4224 ----
     The differences between this and the previous, is that this one checks
     that an argument is named, since incoming stdarg/varargs arguments are
     pushed onto the stack, and we don't have to check against the "closing"
!    function_arg_info::end_marker parameter.  */
  
  static rtx
! cris_function_incoming_arg (cumulative_args_t ca, const function_arg_info &arg)
  {
!   return cris_function_arg_1 (ca, arg, true);
  }
  
  /* Worker function for TARGET_FUNCTION_ARG_ADVANCE.  */
  
  static void
! cris_function_arg_advance (cumulative_args_t ca_v,
! 			   const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *ca = get_cumulative_args (ca_v);
  
!   ca->regs += (3 + CRIS_FUNCTION_ARG_SIZE (arg.mode, arg.type)) / 4;
  }
  
  /* Worker function for TARGET_MD_ASM_ADJUST.  */
diff -Nrcpad gcc-9.3.0/gcc/config/cris/cris.h gcc-10.1.0/gcc/config/cris/cris.h
*** gcc-9.3.0/gcc/config/cris/cris.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cris/cris.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for GCC.  Part of the machine description for CRIS.
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
     Contributed by Axis Communications.  Written by Hans-Peter Nilsson.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for GCC.  Part of the machine description for CRIS.
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
     Contributed by Axis Communications.  Written by Hans-Peter Nilsson.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/cris/cris.md gcc-10.1.0/gcc/config/cris/cris.md
*** gcc-9.3.0/gcc/config/cris/cris.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cris/cris.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; GCC machine description for CRIS cpu cores.
! ;; Copyright (C) 1998-2019 Free Software Foundation, Inc.
  ;; Contributed by Axis Communications.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; GCC machine description for CRIS cpu cores.
! ;; Copyright (C) 1998-2020 Free Software Foundation, Inc.
  ;; Contributed by Axis Communications.
  
  ;; This file is part of GCC.
***************
*** 3539,3545 ****
  		      (label_ref (match_operand 3 "" ""))
  		      (pc)))]
    ""
!   "")
  
  (define_expand "cbranchdi4"
    [(set (cc0)
--- 3539,3545 ----
  		      (label_ref (match_operand 3 "" ""))
  		      (pc)))]
    ""
!   "cris_reduce_compare (&operands[0], &operands[1], &operands[2]);")
  
  (define_expand "cbranchdi4"
    [(set (cc0)
***************
*** 3552,3557 ****
--- 3552,3558 ----
  		      (pc)))]
    ""
  {
+   cris_reduce_compare (&operands[0], &operands[1], &operands[2]);
    if (TARGET_V32 && !REG_P (operands[1]))
      operands[1] = force_reg (DImode, operands[1]);
    if (TARGET_V32 && MEM_P (operands[2]))
***************
*** 3652,3657 ****
--- 3653,3659 ----
  	 [(cc0) (const_int 0)]))]
    ""
  {
+   cris_reduce_compare (&operands[1], &operands[2], &operands[3]);
    if (TARGET_V32 && !REG_P (operands[2]))
      operands[2] = force_reg (DImode, operands[2]);
    if (TARGET_V32 && MEM_P (operands[3]))
***************
*** 3666,3672 ****
  	(match_operator:SI 1 "ordered_comparison_operator"
  	 [(cc0) (const_int 0)]))]
    ""
!   "")
  
  ;; Like bCC, we have to check the overflow bit for
  ;; signed conditions.
--- 3668,3674 ----
  	(match_operator:SI 1 "ordered_comparison_operator"
  	 [(cc0) (const_int 0)]))]
    ""
!   "cris_reduce_compare (&operands[1], &operands[2], &operands[3]);")
  
  ;; Like bCC, we have to check the overflow bit for
  ;; signed conditions.
diff -Nrcpad gcc-9.3.0/gcc/config/cris/cris.opt gcc-10.1.0/gcc/config/cris/cris.opt
*** gcc-9.3.0/gcc/config/cris/cris.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cris/cris.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the CRIS port of the compiler.
  
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for the CRIS port of the compiler.
  
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/cris/elf.opt gcc-10.1.0/gcc/config/cris/elf.opt
*** gcc-9.3.0/gcc/config/cris/elf.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cris/elf.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; ELF-specific options for the CRIS port of the compiler.
  
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; ELF-specific options for the CRIS port of the compiler.
  
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/cris/linux.h gcc-10.1.0/gcc/config/cris/linux.h
*** gcc-9.3.0/gcc/config/cris/linux.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cris/linux.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for GCC.  Part of the machine description for CRIS.
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
     Contributed by Axis Communications.  Written by Hans-Peter Nilsson.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for GCC.  Part of the machine description for CRIS.
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
     Contributed by Axis Communications.  Written by Hans-Peter Nilsson.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/cris/linux.opt gcc-10.1.0/gcc/config/cris/linux.opt
*** gcc-9.3.0/gcc/config/cris/linux.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cris/linux.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; GNU/Linux-specific options for the CRIS port of the compiler.
  
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; GNU/Linux-specific options for the CRIS port of the compiler.
  
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/cris/predicates.md gcc-10.1.0/gcc/config/cris/predicates.md
*** gcc-9.3.0/gcc/config/cris/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cris/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Operand and operator predicates for the GCC CRIS port.
! ;; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Operand and operator predicates for the GCC CRIS port.
! ;; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/cris/sync.md gcc-10.1.0/gcc/config/cris/sync.md
*** gcc-9.3.0/gcc/config/cris/sync.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cris/sync.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; GCC machine description for CRIS atomic memory sequences.
! ;; Copyright (C) 2012-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; GCC machine description for CRIS atomic memory sequences.
! ;; Copyright (C) 2012-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/cris/t-cris gcc-10.1.0/gcc/config/cris/t-cris
*** gcc-9.3.0/gcc/config/cris/t-cris	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cris/t-cris	Thu May  7 10:49:59 2020
***************
*** 3,9 ****
  #
  # The Makefile fragment to include when compiling gcc et al for CRIS.
  #
! # Copyright (C) 2001-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 3,9 ----
  #
  # The Makefile fragment to include when compiling gcc et al for CRIS.
  #
! # Copyright (C) 2001-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/cris/t-elfmulti gcc-10.1.0/gcc/config/cris/t-elfmulti
*** gcc-9.3.0/gcc/config/cris/t-elfmulti	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/cris/t-elfmulti	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2001-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2001-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/csky/constraints.md gcc-10.1.0/gcc/config/csky/constraints.md
*** gcc-9.3.0/gcc/config/csky/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraints for C-SKY.
! ;; Copyright (C) 2018-2019 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Constraints for C-SKY.
! ;; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky-elf.h gcc-10.1.0/gcc/config/csky/csky-elf.h
*** gcc-9.3.0/gcc/config/csky/csky-elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky-elf.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Declarations for bare-metal C-SKY targets.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
--- 1,5 ----
  /* Declarations for bare-metal C-SKY targets.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky-linux-elf.h gcc-10.1.0/gcc/config/csky/csky-linux-elf.h
*** gcc-9.3.0/gcc/config/csky/csky-linux-elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky-linux-elf.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Declarations for C-SKY targets running Linux.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
--- 1,5 ----
  /* Declarations for C-SKY targets running Linux.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky-protos.h gcc-10.1.0/gcc/config/csky/csky-protos.h
*** gcc-9.3.0/gcc/config/csky/csky-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Prototype declarations for the C-SKY back end.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
--- 1,5 ----
  /* Prototype declarations for the C-SKY back end.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky.c gcc-10.1.0/gcc/config/csky/csky.c
*** gcc-9.3.0/gcc/config/csky/csky.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* GCC backend functions for C-SKY targets.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
--- 1,5 ----
  /* GCC backend functions for C-SKY targets.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
***************
*** 58,64 ****
  #include "langhooks.h"
  #include "intl.h"
  #include "libfuncs.h"
- #include "params.h"
  #include "opts.h"
  #include "dumpfile.h"
  #include "target-globals.h"
--- 58,63 ----
*************** get_csky_live_regs (int *count)
*** 1655,1661 ****
  	break;
  
        /* Caller-saved registers marked as used.  */
!       if (df_regs_ever_live_p (reg) && !call_really_used_regs[reg])
  	save = true;
  
        /* Frame pointer marked used.  */
--- 1654,1660 ----
  	break;
  
        /* Caller-saved registers marked as used.  */
!       if (df_regs_ever_live_p (reg) && !call_used_regs[reg])
  	save = true;
  
        /* Frame pointer marked used.  */
*************** csky_initial_elimination_offset (int fro
*** 1784,1806 ****
     Value is zero to push the argument on the stack,
     or a hard register in which to store the argument.
  
-    MODE is the argument's machine mode.
-    TYPE is the data type of the argument (as a tree).
-     This is null for libcalls where that information may
-     not be available.
     CUM is a variable of type CUMULATIVE_ARGS which gives info about
      the preceding args and about the function being called.
!    NAMED is nonzero if this argument is a named parameter
!     (otherwise it is an extra parameter matching an ellipsis).  */
  static rtx
! csky_function_arg (cumulative_args_t pcum_v, machine_mode mode,
! 		   const_tree type ATTRIBUTE_UNUSED,
! 		   bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
  
    if (*pcum < CSKY_NPARM_REGS)
!     return gen_rtx_REG (mode, CSKY_FIRST_PARM_REGNUM + *pcum);
  
    return NULL_RTX;
  }
--- 1783,1798 ----
     Value is zero to push the argument on the stack,
     or a hard register in which to store the argument.
  
     CUM is a variable of type CUMULATIVE_ARGS which gives info about
      the preceding args and about the function being called.
!    ARG is a description of the argument.  */
  static rtx
! csky_function_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
  
    if (*pcum < CSKY_NPARM_REGS)
!     return gen_rtx_REG (arg.mode, CSKY_FIRST_PARM_REGNUM + *pcum);
  
    return NULL_RTX;
  }
*************** csky_num_arg_regs (machine_mode mode, co
*** 1826,1836 ****
  /* Implement TARGET_FUNCTION_ARG_ADVANCE.  */
  
  static void
! csky_function_arg_advance (cumulative_args_t pcum_v, machine_mode mode,
! 			   const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
!   int param_size = csky_num_arg_regs (mode, type);
  
    if (*pcum + param_size > CSKY_NPARM_REGS)
      *pcum = CSKY_NPARM_REGS;
--- 1818,1828 ----
  /* Implement TARGET_FUNCTION_ARG_ADVANCE.  */
  
  static void
! csky_function_arg_advance (cumulative_args_t pcum_v,
! 			   const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
!   int param_size = csky_num_arg_regs (arg.mode, arg.type);
  
    if (*pcum + param_size > CSKY_NPARM_REGS)
      *pcum = CSKY_NPARM_REGS;
*************** csky_return_addr (int count, rtx frame A
*** 1917,1927 ****
     that are passed entirely in registers or
     that are entirely pushed on the stack.  */
  static int
! csky_arg_partial_bytes (cumulative_args_t pcum_v, machine_mode mode,
! 			tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
!   int param_size = csky_num_arg_regs (mode, type);
  
    if (*pcum < CSKY_NPARM_REGS
        && *pcum + param_size > CSKY_NPARM_REGS)
--- 1909,1918 ----
     that are passed entirely in registers or
     that are entirely pushed on the stack.  */
  static int
! csky_arg_partial_bytes (cumulative_args_t pcum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
!   int param_size = csky_num_arg_regs (arg.mode, arg.type);
  
    if (*pcum < CSKY_NPARM_REGS
        && *pcum + param_size > CSKY_NPARM_REGS)
*************** csky_arg_partial_bytes (cumulative_args_
*** 1938,1945 ****
  
  static void
  csky_setup_incoming_varargs (cumulative_args_t pcum_v,
! 			     machine_mode mode,
! 			     tree type,
  			     int *pretend_size,
  			     int second_time ATTRIBUTE_UNUSED)
  {
--- 1929,1935 ----
  
  static void
  csky_setup_incoming_varargs (cumulative_args_t pcum_v,
! 			     const function_arg_info &arg,
  			     int *pretend_size,
  			     int second_time ATTRIBUTE_UNUSED)
  {
*************** csky_setup_incoming_varargs (cumulative_
*** 1950,1956 ****
  
    cfun->machine->uses_anonymous_args = 1;
    local_cum = *pcum;
!   csky_function_arg_advance (local_cum_v, mode, type, true);
    regs_to_push = CSKY_NPARM_REGS - local_cum;
    if (regs_to_push)
      *pretend_size  = regs_to_push * UNITS_PER_WORD;
--- 1940,1946 ----
  
    cfun->machine->uses_anonymous_args = 1;
    local_cum = *pcum;
!   csky_function_arg_advance (local_cum_v, arg);
    regs_to_push = CSKY_NPARM_REGS - local_cum;
    if (regs_to_push)
      *pretend_size  = regs_to_push * UNITS_PER_WORD;
*************** csky_output_mi_thunk (FILE *file, tree t
*** 1967,1977 ****
--- 1957,1969 ----
  		      HOST_WIDE_INT vcall_offset,
  		      tree function)
  {
+   const char *fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunk));
    const char *thiz = "a0";
    const char *reg0 = "t0";
    const char *reg1 = "t1";
    int maxoff = 4096;		/* Constant range for addi/subi.  */
  
+   assemble_start_function (thunk, fnname);
    final_start_function (emit_barrier (), file, 1);
  
    rtx fnaddr = XEXP (DECL_RTL (function), 0);
*************** csky_output_mi_thunk (FILE *file, tree t
*** 2047,2052 ****
--- 2039,2045 ----
    fprintf (file, "\n");
  
    final_end_function ();
+   assemble_end_function (thunk, fnname);
  }
  
  
*************** csky_conditional_register_usage (void)
*** 2080,2086 ****
  	{
  	  fixed_regs[i] = 1;
  	  call_used_regs[i] = 1;
- 	  call_really_used_regs[i] = 1;
  	}
      }
    /* For some targets, the high registers are not supported.
--- 2073,2078 ----
*************** csky_conditional_register_usage (void)
*** 2096,2102 ****
  	{
  	  fixed_regs[i] = 1;
  	  call_used_regs[i] = 1;
- 	  call_really_used_regs[i] = 1;
  	}
     }
  
--- 2088,2093 ----
*************** csky_conditional_register_usage (void)
*** 2109,2116 ****
    if (CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802))
      {
        fixed_regs[CSKY_LR_REGNUM] = 1;
!       call_used_regs[CSKY_LR_REGNUM] = 1;
!       call_really_used_regs[CSKY_LR_REGNUM] = 0;
      }
  
    /* The hi/lo registers are only supported in dsp mode.  */
--- 2100,2106 ----
    if (CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802))
      {
        fixed_regs[CSKY_LR_REGNUM] = 1;
!       call_used_regs[CSKY_LR_REGNUM] = 0;
      }
  
    /* The hi/lo registers are only supported in dsp mode.  */
*************** csky_conditional_register_usage (void)
*** 2118,2128 ****
      {
        fixed_regs[CSKY_HI_REGNUM] = 1;
        call_used_regs[CSKY_HI_REGNUM] = 1;
-       call_really_used_regs[CSKY_HI_REGNUM] = 1;
  
        fixed_regs[CSKY_LO_REGNUM] = 1;
        call_used_regs[CSKY_LO_REGNUM] = 1;
-       call_really_used_regs[CSKY_LO_REGNUM] = 1;
      }
  
    /* The V_REGS are only supported in hard float mode.  */
--- 2108,2116 ----
*************** csky_conditional_register_usage (void)
*** 2135,2152 ****
  	{
  	  fixed_regs[regno] = 1;
  	  call_used_regs[regno] = 1;
- 	  call_really_used_regs[regno] = 1;
  	}
      }
  
    /* In pic mode, the gb register is not available for register
       allocation.  Since gb is not clobbered by function
!      calls, set its call_really_used_regs to 0.  */
    if (flag_pic)
      {
        fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
!       call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
!       call_really_used_regs[PIC_OFFSET_TABLE_REGNUM] = 0;
      }
  }
  
--- 2123,2138 ----
  	{
  	  fixed_regs[regno] = 1;
  	  call_used_regs[regno] = 1;
  	}
      }
  
    /* In pic mode, the gb register is not available for register
       allocation.  Since gb is not clobbered by function
!      calls, set its call_used_regs to 0.  */
    if (flag_pic)
      {
        fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
!       call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 0;
      }
  }
  
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky.h gcc-10.1.0/gcc/config/csky/csky.h
*** gcc-9.3.0/gcc/config/csky/csky.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Declarations for the C-SKY back end.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
--- 1,5 ----
  /* Declarations for the C-SKY back end.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
*************** extern int csky_arch_isa_features[];
*** 425,458 ****
   /*  reserved */							\
       1,	   1,								\
   /*  epc */								\
-      1									\
- }
- 
- /* 1 for registers that is clobbered (in general) by function calls.
-    If a register has 0, the compiler automatically saves it on
-    function entry and restores it on function exit, if the register
-    is used within the function.  */
- #define CALL_USED_REGISTERS \
-  /*  r0	   r1	 r2    r3    r4	   r5	 r6    r7  */			\
- {    1,	   1,	 1,    1,    0,	   0,	 0,    0,			\
-  /*  r8	   r9	 r10   r11   r12   r13	 r14   r15 */			\
-      0,	   0,	 0,    0,    1,	   1,	 1,    0,			\
-  /*  r16   r17	 r18   r19   r20   r21	 r22   r23 */			\
-      0,	   0,	 1,    1,    1,	   1,	 1,    1,			\
-  /*  r24   r25	 r26   r27   r28   r29	 r30   r31 */			\
-      1,	   1,	 1,    1,    1,	   1,	 1,    1,			\
-  /*  reserved	 c     hi    lo */					\
-      1,		 1,    1,    1,						\
-  /*  reserved */							\
-      1,	   1,	 1,    1,    1,	   1,	 1,    1,			\
-      1,	   1,	 1,    1,    1,	   1,	 1,    1,			\
-  /*  vr0   vr1	 vr2   vr3   vr4   vr5	 vr6   vr7 */			\
-      1,	   1,	 1,    1,    1,	   1,	 1,    1,			\
-  /*  vr8   vr9	 vr10  vr11  vr12  vr13	 vr14  vr15 */			\
-      1,	   1,	 1,    1,    1,	   1,	 1,    1,			\
-  /*  reserved */							\
-      1,	   1,								\
-  /*  epc */								\
       1									\
  }
  
--- 425,430 ----
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky.md gcc-10.1.0/gcc/config/csky/csky.md
*** gcc-9.3.0/gcc/config/csky/csky.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description for C-SKY processors.
! ;; Copyright (C) 2018-2019 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Machine description for C-SKY processors.
! ;; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky.opt gcc-10.1.0/gcc/config/csky/csky.opt
*** gcc-9.3.0/gcc/config/csky/csky.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky.opt	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Command-line options for the C-SKY back end.
! ;; Copyright (C) 2018-2019 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Command-line options for the C-SKY back end.
! ;; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky_cores.def gcc-10.1.0/gcc/config/csky/csky_cores.def
*** gcc-9.3.0/gcc/config/csky/csky_cores.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky_cores.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Architecture and core descriptions for the C-SKY back end.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
--- 1,5 ----
  /* Architecture and core descriptions for the C-SKY back end.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky_genopt.sh gcc-10.1.0/gcc/config/csky/csky_genopt.sh
*** gcc-9.3.0/gcc/config/csky/csky_genopt.sh	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky_genopt.sh	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  #!/bin/sh
  # Generate csky_tables.opt from the lists in *.def.
! # Copyright (C) 2018-2019 Free Software Foundation, Inc.
  # Contributed by C-SKY Microsystems and Mentor Graphics.
  #
  # This file is part of GCC.
--- 1,6 ----
  #!/bin/sh
  # Generate csky_tables.opt from the lists in *.def.
! # Copyright (C) 2018-2020 Free Software Foundation, Inc.
  # Contributed by C-SKY Microsystems and Mentor Graphics.
  #
  # This file is part of GCC.
*************** cat <<EOF
*** 23,29 ****
  ; -*- buffer-read-only: t -*-
  ; Generated automatically by csky_genopt.sh from csky_cores.def.
  
! ; Copyright (C) 2018-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 23,29 ----
  ; -*- buffer-read-only: t -*-
  ; Generated automatically by csky_genopt.sh from csky_cores.def.
  
! ; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky_insn_dsp.md gcc-10.1.0/gcc/config/csky/csky_insn_dsp.md
*** gcc-9.3.0/gcc/config/csky/csky_insn_dsp.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky_insn_dsp.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; C-SKY DSP instruction descriptions.
! ;; Copyright (C) 2018-2019 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; C-SKY DSP instruction descriptions.
! ;; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky_insn_fpu.md gcc-10.1.0/gcc/config/csky/csky_insn_fpu.md
*** gcc-9.3.0/gcc/config/csky/csky_insn_fpu.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky_insn_fpu.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; C-SKY FPU instruction descriptions.
! ;; Copyright (C) 2018-2019 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; C-SKY FPU instruction descriptions.
! ;; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky_isa.def gcc-10.1.0/gcc/config/csky/csky_isa.def
*** gcc-9.3.0/gcc/config/csky/csky_isa.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky_isa.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* ISA feature descriptions for the C-SKY back end.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
--- 1,5 ----
  /* ISA feature descriptions for the C-SKY back end.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky_isa.h gcc-10.1.0/gcc/config/csky/csky_isa.h
*** gcc-9.3.0/gcc/config/csky/csky_isa.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky_isa.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* ISA feature enumerations for C-SKY targets.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
--- 1,5 ----
  /* ISA feature enumerations for C-SKY targets.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky_opts.h gcc-10.1.0/gcc/config/csky/csky_opts.h
*** gcc-9.3.0/gcc/config/csky/csky_opts.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky_opts.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Processor and arch enumerations for C-SKY targets.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
--- 1,5 ----
  /* Processor and arch enumerations for C-SKY targets.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
     Contributed by C-SKY Microsystems and Mentor Graphics.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky_pipeline_ck801.md gcc-10.1.0/gcc/config/csky/csky_pipeline_ck801.md
*** gcc-9.3.0/gcc/config/csky/csky_pipeline_ck801.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky_pipeline_ck801.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Scheduler information for C-SKY CK801 processors.
! ;; Copyright (C) 2018-2019 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Scheduler information for C-SKY CK801 processors.
! ;; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky_pipeline_ck802.md gcc-10.1.0/gcc/config/csky/csky_pipeline_ck802.md
*** gcc-9.3.0/gcc/config/csky/csky_pipeline_ck802.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky_pipeline_ck802.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Instruction scheduling information for C-SKY CK802 processors.
! ;; Copyright (C) 2018-2019 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Instruction scheduling information for C-SKY CK802 processors.
! ;; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky_pipeline_ck803.md gcc-10.1.0/gcc/config/csky/csky_pipeline_ck803.md
*** gcc-9.3.0/gcc/config/csky/csky_pipeline_ck803.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky_pipeline_ck803.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Scheduler information for C-SKY CK803 processors.
! ;; Copyright (C) 2018-2019 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Scheduler information for C-SKY CK803 processors.
! ;; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky_pipeline_ck810.md gcc-10.1.0/gcc/config/csky/csky_pipeline_ck810.md
*** gcc-9.3.0/gcc/config/csky/csky_pipeline_ck810.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky_pipeline_ck810.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Instruction scheduling information for C-SKY CK810 processors.
! ;; Copyright (C) 2018-2019 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Instruction scheduling information for C-SKY CK810 processors.
! ;; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/csky_tables.opt gcc-10.1.0/gcc/config/csky/csky_tables.opt
*** gcc-9.3.0/gcc/config/csky/csky_tables.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/csky_tables.opt	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  ; -*- buffer-read-only: t -*-
  ; Generated automatically by csky_genopt.sh from csky_cores.def.
  
! ; Copyright (C) 2018-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,7 ----
  ; -*- buffer-read-only: t -*-
  ; Generated automatically by csky_genopt.sh from csky_cores.def.
  
! ; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/csky/predicates.md gcc-10.1.0/gcc/config/csky/predicates.md
*** gcc-9.3.0/gcc/config/csky/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicates for C-SKY.
! ;; Copyright (C) 2018-2019 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Predicates for C-SKY.
! ;; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;; Contributed by C-SKY Microsystems and Mentor Graphics.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/print-sysroot-suffix.sh gcc-10.1.0/gcc/config/csky/print-sysroot-suffix.sh
*** gcc-9.3.0/gcc/config/csky/print-sysroot-suffix.sh	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/print-sysroot-suffix.sh	Thu May  7 10:49:59 2020
***************
*** 2,8 ****
  # Script to generate SYSROOT_SUFFIX_SPEC equivalent to MULTILIB_OSDIRNAMES
  # Arguments are MULTILIB_OSDIRNAMES, MULTILIB_OPTIONS and MULTILIB_MATCHES.
  
! # Copyright (C) 2018-2019 Free Software Foundation, Inc.
  # Contributed by C-SKY Microsystems and Mentor Graphics.
  
  # This file is part of GCC.
--- 2,8 ----
  # Script to generate SYSROOT_SUFFIX_SPEC equivalent to MULTILIB_OSDIRNAMES
  # Arguments are MULTILIB_OSDIRNAMES, MULTILIB_OPTIONS and MULTILIB_MATCHES.
  
! # Copyright (C) 2018-2020 Free Software Foundation, Inc.
  # Contributed by C-SKY Microsystems and Mentor Graphics.
  
  # This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/t-csky gcc-10.1.0/gcc/config/csky/t-csky
*** gcc-9.3.0/gcc/config/csky/t-csky	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/t-csky	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  # Make rules for all C-SKY targets.
  #
! # Copyright (C) 2018-2019 Free Software Foundation, Inc.
  # Contributed by C-SKY Microsystems and Mentor Graphics.
  #
  # This file is part of GCC.
--- 1,6 ----
  # Make rules for all C-SKY targets.
  #
! # Copyright (C) 2018-2020 Free Software Foundation, Inc.
  # Contributed by C-SKY Microsystems and Mentor Graphics.
  #
  # This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/t-csky-elf gcc-10.1.0/gcc/config/csky/t-csky-elf
*** gcc-9.3.0/gcc/config/csky/t-csky-elf	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/t-csky-elf	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  # Multilib configuration for csky*-elf.
  #
! # Copyright (C) 2018-2019 Free Software Foundation, Inc.
  # Contributed by C-SKY Microsystems and Mentor Graphics.
  #
  # This file is part of GCC.
--- 1,6 ----
  # Multilib configuration for csky*-elf.
  #
! # Copyright (C) 2018-2020 Free Software Foundation, Inc.
  # Contributed by C-SKY Microsystems and Mentor Graphics.
  #
  # This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/t-csky-linux gcc-10.1.0/gcc/config/csky/t-csky-linux
*** gcc-9.3.0/gcc/config/csky/t-csky-linux	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/t-csky-linux	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  # Multilib configuration for csky*-linux-*.
  #
! # Copyright (C) 2018-2019 Free Software Foundation, Inc.
  # Contributed by C-SKY Microsystems and Mentor Graphics.
  #
  # This file is part of GCC.
--- 1,6 ----
  # Multilib configuration for csky*-linux-*.
  #
! # Copyright (C) 2018-2020 Free Software Foundation, Inc.
  # Contributed by C-SKY Microsystems and Mentor Graphics.
  #
  # This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/csky/t-sysroot-suffix gcc-10.1.0/gcc/config/csky/t-sysroot-suffix
*** gcc-9.3.0/gcc/config/csky/t-sysroot-suffix	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/csky/t-sysroot-suffix	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  # Makefile fragment for C-SKY sysroot suffix.
  #
! # Copyright (C) 2018-2019 Free Software Foundation, Inc.
  # Contributed by C-SKY Microsystems and Mentor Graphics.
  #
  # This file is part of GCC.
--- 1,6 ----
  # Makefile fragment for C-SKY sysroot suffix.
  #
! # Copyright (C) 2018-2020 Free Software Foundation, Inc.
  # Contributed by C-SKY Microsystems and Mentor Graphics.
  #
  # This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/darwin-c.c gcc-10.1.0/gcc/config/darwin-c.c
*** gcc-9.3.0/gcc/config/darwin-c.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/darwin-c.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Darwin support needed only by C/C++ frontends.
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
     Contributed by Apple Computer Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Darwin support needed only by C/C++ frontends.
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
     Contributed by Apple Computer Inc.
  
  This file is part of GCC.
*************** pop_field_alignment (void)
*** 79,85 ****
        free (entry);
      }
    else
!     error ("too many #pragma options align=reset");
  }
  
  /* Handlers for Darwin-specific pragmas.  */
--- 79,85 ----
        free (entry);
      }
    else
!     error ("too many %<#pragma options align=reset%>");
  }
  
  /* Handlers for Darwin-specific pragmas.  */
*************** darwin_cfstring_ref_p (const_tree strp)
*** 809,815 ****
      tn = DECL_NAME (tn);
    return (tn 
  	  && IDENTIFIER_POINTER (tn)
! 	  && !strncmp (IDENTIFIER_POINTER (tn), "CFStringRef", 8));
  }
  
  /* At present the behavior of this is undefined and it does nothing.  */
--- 809,816 ----
      tn = DECL_NAME (tn);
    return (tn 
  	  && IDENTIFIER_POINTER (tn)
! 	  && !strncmp (IDENTIFIER_POINTER (tn), "CFStringRef",
! 		       strlen ("CFStringRef")));
  }
  
  /* At present the behavior of this is undefined and it does nothing.  */
diff -Nrcpad gcc-9.3.0/gcc/config/darwin-driver.c gcc-10.1.0/gcc/config/darwin-driver.c
*** gcc-9.3.0/gcc/config/darwin-driver.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/darwin-driver.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Additional functions for the GCC driver on Darwin native.
!    Copyright (C) 2006-2019 Free Software Foundation, Inc.
     Contributed by Apple Computer Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Additional functions for the GCC driver on Darwin native.
!    Copyright (C) 2006-2020 Free Software Foundation, Inc.
     Contributed by Apple Computer Inc.
  
  This file is part of GCC.
*************** darwin_default_min_version (void)
*** 202,208 ****
        const char *checked = validate_macosx_version_min (new_flag);
        if (checked == NULL)
  	{
! 	  warning (0, "couldn%'t understand version %s\n", new_flag);
  	  return NULL;
  	}
        new_flag = xstrndup (checked, strlen (checked));
--- 202,208 ----
        const char *checked = validate_macosx_version_min (new_flag);
        if (checked == NULL)
  	{
! 	  warning (0, "couldn%'t understand version %s", new_flag);
  	  return NULL;
  	}
        new_flag = xstrndup (checked, strlen (checked));
*************** darwin_driver_init (unsigned int *decode
*** 321,327 ****
  	  vers_string =
  	    validate_macosx_version_min ((*decoded_options)[i].arg);
  	  if (vers_string == NULL)
! 	    warning (0, "%qs is not valid for %<mmacosx-version-min%>\n",
  		     (*decoded_options)[i].arg);
  	  else if (vers_string == (*decoded_options)[i].arg)
  	    vers_string = xstrndup ((*decoded_options)[i].arg, 32);
--- 321,327 ----
  	  vers_string =
  	    validate_macosx_version_min ((*decoded_options)[i].arg);
  	  if (vers_string == NULL)
! 	    warning (0, "%qs is not valid for %<mmacosx-version-min%>",
  		     (*decoded_options)[i].arg);
  	  else if (vers_string == (*decoded_options)[i].arg)
  	    vers_string = xstrndup ((*decoded_options)[i].arg, 32);
diff -Nrcpad gcc-9.3.0/gcc/config/darwin-f.c gcc-10.1.0/gcc/config/darwin-f.c
*** gcc-9.3.0/gcc/config/darwin-f.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/darwin-f.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Darwin support needed only by Fortran frontends.
!    Copyright (C) 2008-2019 Free Software Foundation, Inc.
     Contributed by Daniel Franke.
  
  This file is part of GCC.
--- 1,5 ----
  /* Darwin support needed only by Fortran frontends.
!    Copyright (C) 2008-2020 Free Software Foundation, Inc.
     Contributed by Daniel Franke.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/darwin-ppc-ldouble-patch.def gcc-10.1.0/gcc/config/darwin-ppc-ldouble-patch.def
*** gcc-9.3.0/gcc/config/darwin-ppc-ldouble-patch.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/darwin-ppc-ldouble-patch.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2008-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2008-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/darwin-protos.h gcc-10.1.0/gcc/config/darwin-protos.h
*** gcc-9.3.0/gcc/config/darwin-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/darwin-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Prototypes.
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Prototypes.
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** You should have received a copy of the G
*** 17,22 ****
--- 17,25 ----
  along with GCC; see the file COPYING3.  If not see
  <http://www.gnu.org/licenses/>.  */
  
+ #ifndef CONFIG_DARWIN_PROTOS_H
+ #define CONFIG_DARWIN_PROTOS_H
+ 
  extern void darwin_init_sections (void);
  extern int name_needs_quotes (const char *);
  
*************** extern void darwin_override_options (voi
*** 123,125 ****
--- 126,130 ----
  extern void darwin_patch_builtins (void);
  extern void darwin_rename_builtins (void);
  extern bool darwin_libc_has_function (enum function_class fn_class);
+ 
+ #endif /* CONFIG_DARWIN_PROTOS_H */
diff -Nrcpad gcc-9.3.0/gcc/config/darwin-sections.def gcc-10.1.0/gcc/config/darwin-sections.def
*** gcc-9.3.0/gcc/config/darwin-sections.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/darwin-sections.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2005-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2005-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/darwin.c gcc-10.1.0/gcc/config/darwin.c
*** gcc-9.3.0/gcc/config/darwin.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/darwin.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Functions for generic Darwin as target machine for GNU C compiler.
!    Copyright (C) 1989-2019 Free Software Foundation, Inc.
     Contributed by Apple Computer Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Functions for generic Darwin as target machine for GNU C compiler.
!    Copyright (C) 1989-2020 Free Software Foundation, Inc.
     Contributed by Apple Computer Inc.
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 47,65 ****
  #include "toplev.h"
  #include "lto-section-names.h"
  #include "intl.h"
  
! /* Darwin supports a feature called fix-and-continue, which is used
!    for rapid turn around debugging.  When code is compiled with the
!    -mfix-and-continue flag, two changes are made to the generated code
!    that allow the system to do things that it would normally not be
!    able to do easily.  These changes allow gdb to load in
!    recompilation of a translation unit that has been changed into a
!    running program and replace existing functions and methods of that
!    translation unit with versions of those functions and methods
!    from the newly compiled translation unit.  The new functions access
!    the existing static symbols from the old translation unit, if the
!    symbol existed in the unit to be replaced, and from the new
!    translation unit, otherwise.
  
     The changes are to insert 5 nops at the beginning of all functions
     and to use indirection to get at static symbols.  The 5 nops
--- 47,72 ----
  #include "toplev.h"
  #include "lto-section-names.h"
  #include "intl.h"
+ #include "optabs.h"
  
! /* Fix and Continue.
! 
!    NOTES:
!    1) this facility requires suitable support from a modified version
!    of GDB, which is not provided on any system after MacOS 10.7/Darwin11.
!    2) There is no support for this in any X86 version of the FSF compiler.
! 
!    Fix and continue was used on some earlier MacOS systems for rapid turn
!    around debugging.  When code is compiled with the -mfix-and-continue
!    flag, two changes are made to the generated code that allow the system
!    to do things that it would normally not be able to do easily.  These
!    changes allow gdb to load in recompilation of a translation unit that
!    has been changed into a running program and replace existing functions
!    and methods of that translation unit with versions of those functions
!    and methods from the newly compiled translation unit.  The new functions
!    access the existing static symbols from the old translation unit, if the
!    symbol existed in the unit to be replaced, and from the new translation
!    unit, otherwise.
  
     The changes are to insert 5 nops at the beginning of all functions
     and to use indirection to get at static symbols.  The 5 nops
*************** section * darwin_sections[NUM_DARWIN_SEC
*** 108,121 ****
  
  /* While we transition to using in-tests instead of ifdef'd code.  */
  #if !HAVE_lo_sum
! #define gen_macho_high(a,b) (a)
! #define gen_macho_low(a,b,c) (a)
  #endif
  
  /* True if we're setting __attribute__ ((ms_struct)).  */
  int darwin_ms_struct = false;
  
! /* Earlier versions of Darwin as do not recognize an alignment field in 
     .comm directives, this should be set for versions that allow it.  */
  int emit_aligned_common = false;
  
--- 115,128 ----
  
  /* While we transition to using in-tests instead of ifdef'd code.  */
  #if !HAVE_lo_sum
! #define gen_macho_high(m,a,b) (a)
! #define gen_macho_low(m,a,b,c) (a)
  #endif
  
  /* True if we're setting __attribute__ ((ms_struct)).  */
  int darwin_ms_struct = false;
  
! /* Earlier versions of Darwin as do not recognize an alignment field in
     .comm directives, this should be set for versions that allow it.  */
  int emit_aligned_common = false;
  
*************** output_objc_section_asm_op (const void *
*** 127,134 ****
  {
    static bool been_here = false;
  
!   /* The NeXT ObjC Runtime requires these sections to be present and in 
!      order in the object.  The code below implements this by emitting 
       a section header for each ObjC section the first time that an ObjC
       section is requested.  */
    if (! been_here)
--- 134,141 ----
  {
    static bool been_here = false;
  
!   /* The NeXT ObjC Runtime requires these sections to be present and in
!      order in the object.  The code below implements this by emitting
       a section header for each ObjC section the first time that an ObjC
       section is requested.  */
    if (! been_here)
*************** name_needs_quotes (const char *name)
*** 238,244 ****
  {
    int c;
    while ((c = *name++) != '\0')
!     if (! ISIDNUM (c) 
  	  && c != '.' && c != '$' && c != '_' )
        return 1;
    return 0;
--- 245,251 ----
  {
    int c;
    while ((c = *name++) != '\0')
!     if (! ISIDNUM (c)
  	  && c != '.' && c != '$' && c != '_' )
        return 1;
    return 0;
*************** machopic_gen_offset (rtx orig)
*** 374,393 ****
      }
  }
  
! static GTY(()) const char * function_base_func_name;
! static GTY(()) int current_pic_label_num;
! static GTY(()) int emitted_pic_label_num;
  
  static void
  update_pic_label_number_if_needed (void)
  {
-   const char *current_name;
- 
-   /* When we are generating _get_pc thunks within stubs, there is no current
-      function.  */
    if (current_function_decl)
      {
!       current_name =
  	IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (current_function_decl));
        if (function_base_func_name != current_name)
  	{
--- 381,402 ----
      }
  }
  
! static GTY(()) const char * function_base_func_name = NULL;
! static GTY(()) unsigned current_pic_label_num = 0;
! static GTY(()) unsigned emitted_pic_label_num = 0;
  
+ /* We need to keep one picbase label per function, but (when we emit code
+    to reload the picbase for setjump receiver) we might need to check for
+    a second use.  So, only update the picbase label counter when we see a
+    new function.  When there's no function decl, we assume that the call is
+    from the x86 stub generation code.  */
  static void
  update_pic_label_number_if_needed (void)
  {
    if (current_function_decl)
      {
! 
!       const char *current_name =
  	IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (current_function_decl));
        if (function_base_func_name != current_name)
  	{
*************** update_pic_label_number_if_needed (void)
*** 405,415 ****
  void
  machopic_output_function_base_name (FILE *file)
  {
!   /* If dynamic-no-pic is on, we should not get here.  */
!   gcc_assert (!MACHO_DYNAMIC_NO_PIC_P);
  
    update_pic_label_number_if_needed ();
!   fprintf (file, "L%d$pb", current_pic_label_num);
  }
  
  char curr_picbasename[32];
--- 414,424 ----
  void
  machopic_output_function_base_name (FILE *file)
  {
!   /* We should only get here for -fPIC.  */
!   gcc_checking_assert (MACHOPIC_PURE);
  
    update_pic_label_number_if_needed ();
!   fprintf (file, "L%u$pb", current_pic_label_num);
  }
  
  char curr_picbasename[32];
*************** char curr_picbasename[32];
*** 417,427 ****
  const char *
  machopic_get_function_picbase (void)
  {
!   /* If dynamic-no-pic is on, we should not get here.  */
!   gcc_assert (!MACHO_DYNAMIC_NO_PIC_P);
  
    update_pic_label_number_if_needed ();
!   snprintf (curr_picbasename, 32, "L%d$pb", current_pic_label_num);
    return (const char *) curr_picbasename;
  }
  
--- 426,436 ----
  const char *
  machopic_get_function_picbase (void)
  {
!   /* We should only get here for -fPIC.  */
!   gcc_checking_assert (MACHOPIC_PURE);
  
    update_pic_label_number_if_needed ();
!   snprintf (curr_picbasename, 32, "L%u$pb", current_pic_label_num);
    return (const char *) curr_picbasename;
  }
  
*************** machopic_indirection_name (rtx sym_ref,
*** 592,606 ****
    return p->ptr_name;
  }
  
- /* Return the name of the stub for the mcount function.  */
- 
- const char*
- machopic_mcount_stub_name (void)
- {
-   rtx symbol = gen_rtx_SYMBOL_REF (Pmode, "*mcount");
-   return machopic_indirection_name (symbol, /*stub_p=*/true);
- }
- 
  /* If NAME is the name of a stub or a non-lazy pointer , mark the stub
     or non-lazy pointer as used -- and mark the object to which the
     pointer/stub refers as used as well, since the pointer/stub will
--- 601,606 ----
*************** machopic_indirect_data_reference (rtx or
*** 651,658 ****
  	    {
  	  /* Create a new register for CSE opportunities.  */
  	  rtx hi_reg = (!can_create_pseudo_p () ? reg : gen_reg_rtx (Pmode));
!  	  emit_insn (gen_macho_high (hi_reg, orig));
!  	  emit_insn (gen_macho_low (reg, hi_reg, orig));
  	      return reg;
   	    }
  	  else if (DARWIN_X86)
--- 651,658 ----
  	    {
  	  /* Create a new register for CSE opportunities.  */
  	  rtx hi_reg = (!can_create_pseudo_p () ? reg : gen_reg_rtx (Pmode));
! 	  emit_insn (gen_macho_high (Pmode, hi_reg, orig));
! 	  emit_insn (gen_macho_low (Pmode, reg, hi_reg, orig));
  	      return reg;
   	    }
  	  else if (DARWIN_X86)
*************** machopic_indirect_data_reference (rtx or
*** 708,715 ****
        ptr_ref = gen_const_mem (Pmode, ptr_ref);
        machopic_define_symbol (ptr_ref);
  
!       if (DARWIN_X86 
!           && reg 
            && MACHO_DYNAMIC_NO_PIC_P)
  	{
  	    emit_insn (gen_rtx_SET (reg, ptr_ref));
--- 708,715 ----
        ptr_ref = gen_const_mem (Pmode, ptr_ref);
        machopic_define_symbol (ptr_ref);
  
!       if (DARWIN_X86
!           && reg
            && MACHO_DYNAMIC_NO_PIC_P)
  	{
  	    emit_insn (gen_rtx_SET (reg, ptr_ref));
*************** machopic_indirect_data_reference (rtx or
*** 725,757 ****
  	 appropriate.  */
        if (GET_CODE (XEXP (orig, 0)) == PLUS)
  	return machopic_indirect_data_reference (XEXP (orig, 0), reg);
!       else 
  	return orig;
      }
    else if (GET_CODE (orig) == MEM)
      {
!       XEXP (ptr_ref, 0) = 
  		machopic_indirect_data_reference (XEXP (orig, 0), reg);
        return ptr_ref;
      }
    else if (GET_CODE (orig) == PLUS)
      {
        rtx base, result;
-       /* When the target is i386, this code prevents crashes due to the
- 	compiler's ignorance on how to move the PIC base register to
- 	other registers.  (The reload phase sometimes introduces such
- 	insns.)  */
-       if (GET_CODE (XEXP (orig, 0)) == REG
- 	   && REGNO (XEXP (orig, 0)) == PIC_OFFSET_TABLE_REGNUM
- 	   /* Prevent the same register from being erroneously used
- 	      as both the base and index registers.  */
- 	   && (DARWIN_X86 && (GET_CODE (XEXP (orig, 1)) == CONST))
- 	   && reg)
- 	{
- 	  emit_move_insn (reg, XEXP (orig, 0));
- 	  XEXP (ptr_ref, 0) = reg;
- 	  return ptr_ref;
- 	}
  
        /* Legitimize both operands of the PLUS.  */
        base = machopic_indirect_data_reference (XEXP (orig, 0), reg);
--- 725,742 ----
  	 appropriate.  */
        if (GET_CODE (XEXP (orig, 0)) == PLUS)
  	return machopic_indirect_data_reference (XEXP (orig, 0), reg);
!       else
  	return orig;
      }
    else if (GET_CODE (orig) == MEM)
      {
!       XEXP (ptr_ref, 0) =
  		machopic_indirect_data_reference (XEXP (orig, 0), reg);
        return ptr_ref;
      }
    else if (GET_CODE (orig) == PLUS)
      {
        rtx base, result;
  
        /* Legitimize both operands of the PLUS.  */
        base = machopic_indirect_data_reference (XEXP (orig, 0), reg);
*************** machopic_legitimize_pic_address (rtx ori
*** 856,862 ****
  	      rtx asym = XEXP (orig, 0);
  	      rtx mem;
  
! 	      emit_insn (gen_macho_high (temp_reg, asym));
  	      mem = gen_const_mem (GET_MODE (orig),
  				   gen_rtx_LO_SUM (Pmode, temp_reg,
  						   copy_rtx (asym)));
--- 841,847 ----
  	      rtx asym = XEXP (orig, 0);
  	      rtx mem;
  
! 	      emit_insn (gen_macho_high (Pmode, temp_reg, asym));
  	      mem = gen_const_mem (GET_MODE (orig),
  				   gen_rtx_LO_SUM (Pmode, temp_reg,
  						   copy_rtx (asym)));
*************** darwin_encode_section_info (tree decl, r
*** 1295,1300 ****
--- 1280,1296 ----
        || (DECL_WEAK (decl) && ! MACHO_SYMBOL_HIDDEN_VIS_P (sym_ref))
        || lookup_attribute ("weakref", DECL_ATTRIBUTES (decl)))
       SYMBOL_REF_FLAGS (sym_ref) |= MACHO_SYMBOL_FLAG_MUST_INDIRECT;
+ 
+ #if DARWIN_PPC
+   /* Objective C V2 (m64) IVAR offset refs from Apple GCC-4.x have an
+      indirection for m64 code on PPC.  Historically, these indirections
+      also appear in the .data section.  */
+   tree o2meta = lookup_attribute ("OBJC2META", DECL_ATTRIBUTES (decl));
+   o2meta = o2meta ? TREE_VALUE (o2meta) : NULL_TREE;
+ 
+   if (o2meta && strncmp (IDENTIFIER_POINTER (o2meta), "V2_IVRF",7) == 0)
+     SYMBOL_REF_FLAGS (sym_ref) |= MACHO_SYMBOL_FLAG_MUST_INDIRECT;
+ #endif
  }
  
  void
*************** static section *
*** 1324,1331 ****
  darwin_mergeable_string_section (tree exp,
  				 unsigned HOST_WIDE_INT align)
  {
!   /* Darwin's ld expects to see non-writable string literals in the .cstring 
!      section.  Later versions of ld check and complain when CFStrings are 
       enabled.  Therefore we shall force the strings into .cstring since we
       don't support writable ones anyway.  */
    if ((darwin_constant_cfstrings || flag_merge_constants)
--- 1320,1327 ----
  darwin_mergeable_string_section (tree exp,
  				 unsigned HOST_WIDE_INT align)
  {
!   /* Darwin's ld expects to see non-writable string literals in the .cstring
!      section.  Later versions of ld check and complain when CFStrings are
       enabled.  Therefore we shall force the strings into .cstring since we
       don't support writable ones anyway.  */
    if ((darwin_constant_cfstrings || flag_merge_constants)
*************** darwin_mergeable_constant_section (tree
*** 1358,1366 ****
    machine_mode mode = DECL_MODE (exp);
    unsigned int modesize = GET_MODE_BITSIZE (mode);
  
!   if (DARWIN_SECTION_ANCHORS 
!       && flag_section_anchors 
!       && zsize)
      return darwin_sections[zobj_const_section];
  
    if (flag_merge_constants
--- 1354,1360 ----
    machine_mode mode = DECL_MODE (exp);
    unsigned int modesize = GET_MODE_BITSIZE (mode);
  
!   if (zsize)
      return darwin_sections[zobj_const_section];
  
    if (flag_merge_constants
*************** machopic_reloc_rw_mask (void)
*** 1405,1418 ****
  
  /* We have to deal with ObjC/C++ metadata section placement in the common
     code, since it will also be called from LTO.
!    
     Return metadata attributes, if present (searching for ABI=2 first)
     Return NULL_TREE if no such attributes are found.  */
  
  static tree
  is_objc_metadata (tree decl)
  {
!   if (DECL_P (decl) 
        && (TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == CONST_DECL)
        && DECL_ATTRIBUTES (decl))
      {
--- 1399,1412 ----
  
  /* We have to deal with ObjC/C++ metadata section placement in the common
     code, since it will also be called from LTO.
! 
     Return metadata attributes, if present (searching for ABI=2 first)
     Return NULL_TREE if no such attributes are found.  */
  
  static tree
  is_objc_metadata (tree decl)
  {
!   if (DECL_P (decl)
        && (TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == CONST_DECL)
        && DECL_ATTRIBUTES (decl))
      {
*************** machopic_select_section (tree decl,
*** 1590,1601 ****
  	  && DECL_WEAK (decl)
  	  && !lookup_attribute ("weak_import", DECL_ATTRIBUTES (decl)));
  
!   zsize = (DECL_P (decl)
! 	   && (TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == CONST_DECL) 
  	   && tree_to_uhwi (DECL_SIZE_UNIT (decl)) == 0);
  
    one = DECL_P (decl)
! 	&& TREE_CODE (decl) == VAR_DECL 
  	&& DECL_COMDAT_GROUP (decl);
  
    use_coal = (weak || one) && ld_uses_coal_sects;
--- 1584,1610 ----
  	  && DECL_WEAK (decl)
  	  && !lookup_attribute ("weak_import", DECL_ATTRIBUTES (decl)));
  
!   /* Darwin pads zero-sized objects with at least one byte, so that the ld64
!      atom model is preserved (objects must have distinct regions starting with
!      a unique linker-visible symbol).
!      In order to support section anchors, we need to move objects with zero
!      size into sections which are marked as "no section anchors"; the padded
!      objects, obviously, have real sizes that differ from their DECL sizes.  */
!   zsize = DARWIN_SECTION_ANCHORS && flag_section_anchors;
! 
!   /* In the streaming of LTO symbol data, we might have a situation where the
!      var is incomplete or layout not finished (DECL_SIZE_UNIT is NULL_TREE).
!      We cannot tell if it is zero-sized then, but we can get the section
!      category correct so that nm reports the right kind of section
!      (e.g. BSS c.f. data).  */
!   zsize = (zsize
! 	   && DECL_P (decl)
! 	   && (TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == CONST_DECL)
! 	   && DECL_SIZE_UNIT (decl)
  	   && tree_to_uhwi (DECL_SIZE_UNIT (decl)) == 0);
  
    one = DECL_P (decl)
! 	&& TREE_CODE (decl) == VAR_DECL
  	&& DECL_COMDAT_GROUP (decl);
  
    use_coal = (weak || one) && ld_uses_coal_sects;
*************** machopic_select_section (tree decl,
*** 1636,1653 ****
  	{
  	  if (ro)
  	    base_section = darwin_sections[const_data_coal_section];
! 	  else 
  	    base_section = darwin_sections[data_coal_section];
  	}
!       else if (DARWIN_SECTION_ANCHORS 
! 	       && flag_section_anchors
! 	       && zsize)
  	{
  	  /* If we're doing section anchors, then punt zero-sized objects into
  	     their own sections so that they don't interfere with offset
! 	     computation for the remaining vars.  This does not need to be done
! 	     for stuff in mergeable sections, since these are ineligible for 
! 	     anchors.  */
  	  if (ro)
  	    base_section = darwin_sections[zobj_const_data_section];
  	  else
--- 1645,1658 ----
  	{
  	  if (ro)
  	    base_section = darwin_sections[const_data_coal_section];
! 	  else
  	    base_section = darwin_sections[data_coal_section];
  	}
!       else if (zsize)
  	{
  	  /* If we're doing section anchors, then punt zero-sized objects into
  	     their own sections so that they don't interfere with offset
! 	     computation for the remaining vars.  */
  	  if (ro)
  	    base_section = darwin_sections[zobj_const_data_section];
  	  else
*************** machopic_select_section (tree decl,
*** 1678,1687 ****
        gcc_unreachable ();
      }
  
!   /* Darwin weird special cases.  
       a) OBJC Meta-data. */
!   if (DECL_P (decl) 
!       && (TREE_CODE (decl) == VAR_DECL 
  	  || TREE_CODE (decl) == CONST_DECL)
        && DECL_ATTRIBUTES (decl))
      {
--- 1683,1692 ----
        gcc_unreachable ();
      }
  
!   /* Darwin weird special cases.
       a) OBJC Meta-data. */
!   if (DECL_P (decl)
!       && (TREE_CODE (decl) == VAR_DECL
  	  || TREE_CODE (decl) == CONST_DECL)
        && DECL_ATTRIBUTES (decl))
      {
*************** machopic_select_section (tree decl,
*** 1723,1805 ****
        else
  	return base_section;
      }
!   /* c) legacy meta-data selection.  */
!   else if (TREE_CODE (decl) == VAR_DECL
  	   && DECL_NAME (decl)
  	   && TREE_CODE (DECL_NAME (decl)) == IDENTIFIER_NODE
  	   && IDENTIFIER_POINTER (DECL_NAME (decl))
- 	   && flag_next_runtime
  	   && !strncmp (IDENTIFIER_POINTER (DECL_NAME (decl)), "_OBJC_", 6))
!     {
!       const char *name = IDENTIFIER_POINTER (DECL_NAME (decl));
!       static bool warned_objc_46 = false;
!       /* We shall assert that zero-sized objects are an error in ObjC 
!          meta-data.  */
!       gcc_assert (tree_to_uhwi (DECL_SIZE_UNIT (decl)) != 0);
!       
!       /* ??? This mechanism for determining the metadata section is
! 	 broken when LTO is in use, since the frontend that generated
! 	 the data is not identified.  We will keep the capability for
! 	 the short term - in case any non-Objective-C programs are using
! 	 it to place data in specified sections.  */
!       if (!warned_objc_46)
! 	{
! 	  location_t loc = DECL_SOURCE_LOCATION (decl);
! 	  warning_at (loc, 0, "the use of _OBJC_-prefixed variable names"
! 		      " to select meta-data sections is deprecated at 4.6"
! 		      " and will be removed in 4.7");
! 	  warned_objc_46 = true;
! 	}
!       
!       if (!strncmp (name, "_OBJC_CLASS_METHODS_", 20))
!         return darwin_sections[objc_cls_meth_section];
!       else if (!strncmp (name, "_OBJC_INSTANCE_METHODS_", 23))
!         return darwin_sections[objc_inst_meth_section];
!       else if (!strncmp (name, "_OBJC_CATEGORY_CLASS_METHODS_", 29))
!         return darwin_sections[objc_cat_cls_meth_section];
!       else if (!strncmp (name, "_OBJC_CATEGORY_INSTANCE_METHODS_", 32))
!         return darwin_sections[objc_cat_inst_meth_section];
!       else if (!strncmp (name, "_OBJC_CLASS_VARIABLES_", 22))
!         return darwin_sections[objc_class_vars_section];
!       else if (!strncmp (name, "_OBJC_INSTANCE_VARIABLES_", 25))
!         return darwin_sections[objc_instance_vars_section];
!       else if (!strncmp (name, "_OBJC_CLASS_PROTOCOLS_", 22))
!         return darwin_sections[objc_cat_cls_meth_section];
!       else if (!strncmp (name, "_OBJC_CLASS_NAME_", 17))
!         return darwin_sections[objc_class_names_section];
!       else if (!strncmp (name, "_OBJC_METH_VAR_NAME_", 20))
!         return darwin_sections[objc_meth_var_names_section];
!       else if (!strncmp (name, "_OBJC_METH_VAR_TYPE_", 20))
!         return darwin_sections[objc_meth_var_types_section];
!       else if (!strncmp (name, "_OBJC_CLASS_REFERENCES", 22))
!         return darwin_sections[objc_cls_refs_section];
!       else if (!strncmp (name, "_OBJC_CLASS_", 12))
!         return darwin_sections[objc_class_section];
!       else if (!strncmp (name, "_OBJC_METACLASS_", 16))
!         return darwin_sections[objc_meta_class_section];
!       else if (!strncmp (name, "_OBJC_CATEGORY_", 15))
!         return darwin_sections[objc_category_section];
!       else if (!strncmp (name, "_OBJC_SELECTOR_REFERENCES", 25))
!         return darwin_sections[objc_selector_refs_section];
!       else if (!strncmp (name, "_OBJC_SELECTOR_FIXUP", 20))
!         return darwin_sections[objc_selector_fixup_section];
!       else if (!strncmp (name, "_OBJC_SYMBOLS", 13))
!         return darwin_sections[objc_symbols_section];
!       else if (!strncmp (name, "_OBJC_MODULES", 13))
!         return darwin_sections[objc_module_info_section];
!       else if (!strncmp (name, "_OBJC_IMAGE_INFO", 16))
!         return darwin_sections[objc_image_info_section];
!       else if (!strncmp (name, "_OBJC_PROTOCOL_INSTANCE_METHODS_", 32))
!         return darwin_sections[objc_cat_inst_meth_section];
!       else if (!strncmp (name, "_OBJC_PROTOCOL_CLASS_METHODS_", 29))
!         return darwin_sections[objc_cat_cls_meth_section];
!       else if (!strncmp (name, "_OBJC_PROTOCOL_REFS_", 20))
!         return darwin_sections[objc_cat_cls_meth_section];
!       else if (!strncmp (name, "_OBJC_PROTOCOL_", 15))
!         return darwin_sections[objc_protocol_section];
!       else
!         return base_section;
!     }
  
    return base_section;
  }
--- 1728,1741 ----
        else
  	return base_section;
      }
!   else if (flag_next_runtime
! 	   && VAR_P (decl)
  	   && DECL_NAME (decl)
  	   && TREE_CODE (DECL_NAME (decl)) == IDENTIFIER_NODE
  	   && IDENTIFIER_POINTER (DECL_NAME (decl))
  	   && !strncmp (IDENTIFIER_POINTER (DECL_NAME (decl)), "_OBJC_", 6))
!     /* c) legacy meta-data selection was deprecated at 4.6, removed now.  */
!     gcc_unreachable ();
  
    return base_section;
  }
*************** sort_cdtor_records (const void * a, cons
*** 1876,1887 ****
    return 0;
  }
  
! static void 
  finalize_ctors ()
  {
    unsigned int i;
    cdtor_record *elt;
!  
    if (MACHOPIC_INDIRECT)
      switch_to_section (darwin_sections[mod_init_section]);
    else
--- 1812,1823 ----
    return 0;
  }
  
! static void
  finalize_ctors ()
  {
    unsigned int i;
    cdtor_record *elt;
! 
    if (MACHOPIC_INDIRECT)
      switch_to_section (darwin_sections[mod_init_section]);
    else
*************** darwin_globalize_label (FILE *stream, co
*** 1923,1933 ****
      default_globalize_label (stream, name);
  }
  
! /* This routine returns non-zero if 'name' starts with the special objective-c 
!    anonymous file-scope static name.  It accommodates c++'s mangling of such 
     symbols (in this case the symbols will have form _ZL{d}*_OBJC_* d=digit).  */
!    
! int 
  darwin_label_is_anonymous_local_objc_name (const char *name)
  {
    const unsigned char *p = (const unsigned char *) name;
--- 1859,1869 ----
      default_globalize_label (stream, name);
  }
  
! /* This routine returns non-zero if 'name' starts with the special objective-c
!    anonymous file-scope static name.  It accommodates c++'s mangling of such
     symbols (in this case the symbols will have form _ZL{d}*_OBJC_* d=digit).  */
! 
! int
  darwin_label_is_anonymous_local_objc_name (const char *name)
  {
    const unsigned char *p = (const unsigned char *) name;
*************** darwin_emit_unwind_label (FILE *file, tr
*** 2145,2151 ****
    char buf[32];
    static int invok_count = 0;
    static tree last_fun_decl = NULL_TREE;
!   
    /* Modern linkers can produce distinct FDEs without compiler support.  */
    if (! for_eh || ! ld_needs_eh_markers)
      return;
--- 2081,2087 ----
    char buf[32];
    static int invok_count = 0;
    static tree last_fun_decl = NULL_TREE;
! 
    /* Modern linkers can produce distinct FDEs without compiler support.  */
    if (! for_eh || ! ld_needs_eh_markers)
      return;
*************** darwin_emit_unwind_label (FILE *file, tr
*** 2157,2163 ****
       function.  This is of limited use, probably, since we do not currently
       enable partitioning.  */
    strcpy (buf, ".eh");
!   if (decl && TREE_CODE (decl) == FUNCTION_DECL) 
      {
        if (decl == last_fun_decl)
          {
--- 2093,2099 ----
       function.  This is of limited use, probably, since we do not currently
       enable partitioning.  */
    strcpy (buf, ".eh");
!   if (decl && TREE_CODE (decl) == FUNCTION_DECL)
      {
        if (decl == last_fun_decl)
          {
*************** darwin_emit_except_table_label (FILE *fi
*** 2219,2224 ****
--- 2155,2174 ----
  			       except_table_label_num++);
    ASM_OUTPUT_LABEL (file, section_start_label);
  }
+ 
+ /* Return, and mark as used, the name of the stub for the mcount function.
+    Currently, this is only called by X86 code in the expansion of the
+    FUNCTION_PROFILER macro, when stubs are enabled.  */
+ 
+ const char*
+ machopic_mcount_stub_name (void)
+ {
+   rtx symbol = gen_rtx_SYMBOL_REF (Pmode, "*mcount");
+   const char *name = machopic_indirection_name (symbol, /*stub_p=*/true);
+   machopic_validate_stub_or_non_lazy_ptr (name);
+   return name;
+ }
+ 
  /* Generate a PC-relative reference to a Mach-O non-lazy-symbol.  */
  
  void
*************** darwin_non_lazy_pcrel (FILE *file, rtx a
*** 2253,2260 ****
     The machopic_define_symbol calls are telling the machopic subsystem
     that the name *is* defined in this module, so it doesn't need to
     make them indirect.  */
! void 
! darwin_asm_declare_object_name (FILE *file, 
  				const char *nam, tree decl)
  {
    const char *xname = nam;
--- 2203,2210 ----
     The machopic_define_symbol calls are telling the machopic subsystem
     that the name *is* defined in this module, so it doesn't need to
     make them indirect.  */
! void
! darwin_asm_declare_object_name (FILE *file,
  				const char *nam, tree decl)
  {
    const char *xname = nam;
*************** darwin_asm_declare_object_name (FILE *fi
*** 2263,2273 ****
  
    weak = (DECL_P (decl)
  	  && DECL_WEAK (decl)
! 	  && !lookup_attribute ("weak_import", 
  				 DECL_ATTRIBUTES (decl)));
  
!   local_def = DECL_INITIAL (decl) || (TREE_STATIC (decl) 
! 				      && (!DECL_COMMON (decl) 
  					  || !TREE_PUBLIC (decl)));
  
    if (GET_CODE (XEXP (DECL_RTL (decl), 0)) != SYMBOL_REF)
--- 2213,2223 ----
  
    weak = (DECL_P (decl)
  	  && DECL_WEAK (decl)
! 	  && !lookup_attribute ("weak_import",
  				 DECL_ATTRIBUTES (decl)));
  
!   local_def = DECL_INITIAL (decl) || (TREE_STATIC (decl)
! 				      && (!DECL_COMMON (decl)
  					  || !TREE_PUBLIC (decl)));
  
    if (GET_CODE (XEXP (DECL_RTL (decl), 0)) != SYMBOL_REF)
*************** darwin_asm_declare_object_name (FILE *fi
*** 2285,2301 ****
  #ifdef DEBUG_DARWIN_MEM_ALLOCATORS
  fprintf (file, "# dadon: %s %s (%llu, %u) local %d weak %d"
  	       " stat %d com %d pub %d t-const %d t-ro %d init %lx\n",
! 	xname, (TREE_CODE (decl) == VAR_DECL?"var":"const"), 
! 	(unsigned long long)size, DECL_ALIGN (decl), local_def, 
  	DECL_WEAK (decl), TREE_STATIC (decl), DECL_COMMON (decl),
  	TREE_PUBLIC (decl), TREE_CONSTANT (decl), TREE_READONLY (decl),
! 	(unsigned long)DECL_INITIAL (decl)); 
  #endif
  
!   /* Darwin needs help to support local zero-sized objects. 
       They must be made at least one byte, and the section containing must be
       marked as unsuitable for section-anchors (see storage allocators below).
!      
       For non-zero objects this output is handled by varasm.c.
    */
    if (!size)
--- 2235,2251 ----
  #ifdef DEBUG_DARWIN_MEM_ALLOCATORS
  fprintf (file, "# dadon: %s %s (%llu, %u) local %d weak %d"
  	       " stat %d com %d pub %d t-const %d t-ro %d init %lx\n",
! 	xname, (TREE_CODE (decl) == VAR_DECL?"var":"const"),
! 	(unsigned long long)size, DECL_ALIGN (decl), local_def,
  	DECL_WEAK (decl), TREE_STATIC (decl), DECL_COMMON (decl),
  	TREE_PUBLIC (decl), TREE_CONSTANT (decl), TREE_READONLY (decl),
! 	(unsigned long)DECL_INITIAL (decl));
  #endif
  
!   /* Darwin needs help to support local zero-sized objects.
       They must be made at least one byte, and the section containing must be
       marked as unsuitable for section-anchors (see storage allocators below).
! 
       For non-zero objects this output is handled by varasm.c.
    */
    if (!size)
*************** fprintf (file, "# dadon: %s %s (%llu, %u
*** 2316,2322 ****
        /* Check that we've correctly picked up the zero-sized item and placed it
           properly.  */
        gcc_assert ((!DARWIN_SECTION_ANCHORS || !flag_section_anchors)
! 		  || (in_section 
  		      && (in_section->common.flags & SECTION_NO_ANCHOR)));
      }
    else
--- 2266,2272 ----
        /* Check that we've correctly picked up the zero-sized item and placed it
           properly.  */
        gcc_assert ((!DARWIN_SECTION_ANCHORS || !flag_section_anchors)
! 		  || (in_section
  		      && (in_section->common.flags & SECTION_NO_ANCHOR)));
      }
    else
*************** darwin_asm_declare_constant_name (FILE *
*** 2337,2343 ****
        /* Check that we've correctly picked up the zero-sized item and placed it
           properly.  */
        gcc_assert ((!DARWIN_SECTION_ANCHORS || !flag_section_anchors)
! 		  || (in_section 
  		      && (in_section->common.flags & SECTION_NO_ANCHOR)));
      }
  }
--- 2287,2293 ----
        /* Check that we've correctly picked up the zero-sized item and placed it
           properly.  */
        gcc_assert ((!DARWIN_SECTION_ANCHORS || !flag_section_anchors)
! 		  || (in_section
  		      && (in_section->common.flags & SECTION_NO_ANCHOR)));
      }
  }
*************** darwin_asm_declare_constant_name (FILE *
*** 2363,2369 ****
  /* Emit a chunk of data for items coalesced by the linker.  */
  static void
  darwin_emit_weak_or_comdat (FILE *fp, tree decl, const char *name,
! 				  unsigned HOST_WIDE_INT size, 
  				  bool use_coal,
  				  unsigned int align)
  {
--- 2313,2319 ----
  /* Emit a chunk of data for items coalesced by the linker.  */
  static void
  darwin_emit_weak_or_comdat (FILE *fp, tree decl, const char *name,
! 				  unsigned HOST_WIDE_INT size,
  				  bool use_coal,
  				  unsigned int align)
  {
*************** darwin_emit_weak_or_comdat (FILE *fp, tr
*** 2385,2391 ****
    if (TREE_PUBLIC (decl))
      darwin_globalize_label (fp, name);
  
!   /* ... and we let it deal with outputting one byte of zero for them too.  */ 
    darwin_asm_declare_object_name (fp, name, decl);
    if (size)
      assemble_zeros (size);
--- 2335,2341 ----
    if (TREE_PUBLIC (decl))
      darwin_globalize_label (fp, name);
  
!   /* ... and we let it deal with outputting one byte of zero for them too.  */
    darwin_asm_declare_object_name (fp, name, decl);
    if (size)
      assemble_zeros (size);
*************** darwin_emit_weak_or_comdat (FILE *fp, tr
*** 2394,2400 ****
  /* Emit a chunk of data for ObjC meta-data that got placed in BSS erroneously.  */
  static void
  darwin_emit_objc_zeroed (FILE *fp, tree decl, const char *name,
! 				  unsigned HOST_WIDE_INT size, 
  				  unsigned int align, tree meta)
  {
    section *ocs = data_section;
--- 2344,2350 ----
  /* Emit a chunk of data for ObjC meta-data that got placed in BSS erroneously.  */
  static void
  darwin_emit_objc_zeroed (FILE *fp, tree decl, const char *name,
! 				  unsigned HOST_WIDE_INT size,
  				  unsigned int align, tree meta)
  {
    section *ocs = data_section;
*************** darwin_emit_objc_zeroed (FILE *fp, tree
*** 2410,2423 ****
    gcc_assert (size);
    fprintf (fp, "\t.align\t%d\n", floor_log2 (align / BITS_PER_UNIT));
  
!   /* ... and we let it deal with outputting one byte of zero for them too.  */ 
    darwin_asm_declare_object_name (fp, name, decl);
    assemble_zeros (size);
  }
  
  /* This routine emits 'local' storage:
  
!    When Section Anchors are off this routine emits .zerofill commands in 
     sections named for their alignment.
  
     When Section Anchors are on, smaller (non-zero-sized) items are placed in
--- 2360,2373 ----
    gcc_assert (size);
    fprintf (fp, "\t.align\t%d\n", floor_log2 (align / BITS_PER_UNIT));
  
!   /* ... and we let it deal with outputting one byte of zero for them too.  */
    darwin_asm_declare_object_name (fp, name, decl);
    assemble_zeros (size);
  }
  
  /* This routine emits 'local' storage:
  
!    When Section Anchors are off this routine emits .zerofill commands in
     sections named for their alignment.
  
     When Section Anchors are on, smaller (non-zero-sized) items are placed in
*************** darwin_emit_objc_zeroed (FILE *fp, tree
*** 2426,2433 ****
     The routine has no checking - it is all assumed to be done by the caller.
  */
  static void
! darwin_emit_local_bss (FILE *fp, tree decl, const char *name, 
! 			unsigned HOST_WIDE_INT size, 
  			unsigned int l2align)
  {
     /* FIXME: We have a fudge to make this work with Java even when the target does
--- 2376,2383 ----
     The routine has no checking - it is all assumed to be done by the caller.
  */
  static void
! darwin_emit_local_bss (FILE *fp, tree decl, const char *name,
! 			unsigned HOST_WIDE_INT size,
  			unsigned int l2align)
  {
     /* FIXME: We have a fudge to make this work with Java even when the target does
*************** darwin_emit_local_bss (FILE *fp, tree de
*** 2455,2471 ****
        if (l2align)
  	fprintf (fp, "\t.align\t%u\n", l2align);
  
!       assemble_name (fp, name);        
        fprintf (fp, ":\n\t.space\t" HOST_WIDE_INT_PRINT_UNSIGNED"\n", size);
      }
!   else 
      {
        /* When we are on a non-section anchor target, we can get zero-sized
  	 items here.  However, all we need to do is to bump them to one byte
  	 and the section alignment will take care of the rest.  */
        char secnam[64];
        unsigned int flags ;
!       snprintf (secnam, 64, "__DATA,__%sbss%u", ((size)?"":"zo_"), 
  						(unsigned) l2align);
        /* We can't anchor (yet, if ever) in zerofill sections, because we can't
  	 switch to them and emit a label.  */
--- 2405,2421 ----
        if (l2align)
  	fprintf (fp, "\t.align\t%u\n", l2align);
  
!       assemble_name (fp, name);
        fprintf (fp, ":\n\t.space\t" HOST_WIDE_INT_PRINT_UNSIGNED"\n", size);
      }
!   else
      {
        /* When we are on a non-section anchor target, we can get zero-sized
  	 items here.  However, all we need to do is to bump them to one byte
  	 and the section alignment will take care of the rest.  */
        char secnam[64];
        unsigned int flags ;
!       snprintf (secnam, 64, "__DATA,__%sbss%u", ((size)?"":"zo_"),
  						(unsigned) l2align);
        /* We can't anchor (yet, if ever) in zerofill sections, because we can't
  	 switch to them and emit a label.  */
*************** darwin_emit_local_bss (FILE *fp, tree de
*** 2491,2502 ****
  /* Emit a chunk of common.  */
  static void
  darwin_emit_common (FILE *fp, const char *name,
! 		    unsigned HOST_WIDE_INT size, unsigned int align) 
  {
    unsigned HOST_WIDE_INT rounded;
    unsigned int l2align;
  
!   /* Earlier systems complain if the alignment exceeds the page size. 
       The magic number is 4096 * 8 - hard-coded for legacy systems.  */
    if (!emit_aligned_common && (align > 32768UL))
      align = 4096UL; /* In units.  */
--- 2441,2452 ----
  /* Emit a chunk of common.  */
  static void
  darwin_emit_common (FILE *fp, const char *name,
! 		    unsigned HOST_WIDE_INT size, unsigned int align)
  {
    unsigned HOST_WIDE_INT rounded;
    unsigned int l2align;
  
!   /* Earlier systems complain if the alignment exceeds the page size.
       The magic number is 4096 * 8 - hard-coded for legacy systems.  */
    if (!emit_aligned_common && (align > 32768UL))
      align = 4096UL; /* In units.  */
*************** darwin_emit_common (FILE *fp, const char
*** 2507,2515 ****
    if (!align)
      align = 1;
  
!   /* For earlier toolchains, we need to emit the var as a rounded size to 
       tell ld the alignment.  */
!   if (size < align) 
      rounded = align;
    else
      rounded = (size + (align-1)) & ~(align-1);
--- 2457,2465 ----
    if (!align)
      align = 1;
  
!   /* For earlier toolchains, we need to emit the var as a rounded size to
       tell ld the alignment.  */
!   if (size < align)
      rounded = align;
    else
      rounded = (size + (align-1)) & ~(align-1);
*************** darwin_emit_common (FILE *fp, const char
*** 2530,2536 ****
  
    fputs ("\t.comm\t", fp);
    assemble_name (fp, name);
!   fprintf (fp, "," HOST_WIDE_INT_PRINT_UNSIGNED, 
  	   emit_aligned_common?size:rounded);
    if (l2align && emit_aligned_common)
      fprintf (fp, ",%u", l2align);
--- 2480,2486 ----
  
    fputs ("\t.comm\t", fp);
    assemble_name (fp, name);
!   fprintf (fp, "," HOST_WIDE_INT_PRINT_UNSIGNED,
  	   emit_aligned_common?size:rounded);
    if (l2align && emit_aligned_common)
      fprintf (fp, ",%u", l2align);
*************** darwin_output_aligned_bss (FILE *fp, tre
*** 2552,2569 ****
    one = DECL_ONE_ONLY (decl);
    weak = (DECL_P (decl)
  	  && DECL_WEAK (decl)
! 	  && !lookup_attribute ("weak_import", 
  				 DECL_ATTRIBUTES (decl)));
  
  #ifdef DEBUG_DARWIN_MEM_ALLOCATORS
  fprintf (fp, "# albss: %s (%lld,%d) ro %d cst %d stat %d com %d"
  	     " pub %d weak %d one %d init %lx\n",
! 	name, (long long)size, (int)align, TREE_READONLY (decl), 
  	TREE_CONSTANT (decl), TREE_STATIC (decl), DECL_COMMON (decl),
! 	pub, weak, one, (unsigned long)DECL_INITIAL (decl)); 
  #endif
  
!   /* ObjC metadata can get put in BSS because varasm.c decides it's BSS 
       before the target has a chance to comment.  */
    if ((meta = is_objc_metadata (decl)))
      {
--- 2502,2519 ----
    one = DECL_ONE_ONLY (decl);
    weak = (DECL_P (decl)
  	  && DECL_WEAK (decl)
! 	  && !lookup_attribute ("weak_import",
  				 DECL_ATTRIBUTES (decl)));
  
  #ifdef DEBUG_DARWIN_MEM_ALLOCATORS
  fprintf (fp, "# albss: %s (%lld,%d) ro %d cst %d stat %d com %d"
  	     " pub %d weak %d one %d init %lx\n",
! 	name, (long long)size, (int)align, TREE_READONLY (decl),
  	TREE_CONSTANT (decl), TREE_STATIC (decl), DECL_COMMON (decl),
! 	pub, weak, one, (unsigned long)DECL_INITIAL (decl));
  #endif
  
!   /* ObjC metadata can get put in BSS because varasm.c decides it's BSS
       before the target has a chance to comment.  */
    if ((meta = is_objc_metadata (decl)))
      {
*************** fprintf (fp, "# albss: %s (%lld,%d) ro %
*** 2572,2579 ****
      }
  
    /* Check that any initializer is valid.  */
!   gcc_assert ((DECL_INITIAL (decl) == NULL) 
! 	       || (DECL_INITIAL (decl) == error_mark_node) 
  	       || initializer_zerop (DECL_INITIAL (decl)));
  
    gcc_assert (DECL_SECTION_NAME (decl) == NULL);
--- 2522,2529 ----
      }
  
    /* Check that any initializer is valid.  */
!   gcc_assert ((DECL_INITIAL (decl) == NULL)
! 	       || (DECL_INITIAL (decl) == error_mark_node)
  	       || initializer_zerop (DECL_INITIAL (decl)));
  
    gcc_assert (DECL_SECTION_NAME (decl) == NULL);
*************** fprintf (fp, "# albss: %s (%lld,%d) ro %
*** 2585,2591 ****
  
    l2align = floor_log2 (align / BITS_PER_UNIT);
    gcc_assert (l2align <= L2_MAX_OFILE_ALIGNMENT);
!   
    last_assemble_variable_decl = decl;
  
    /* We would rather not have to check this here - but it seems that we might
--- 2535,2541 ----
  
    l2align = floor_log2 (align / BITS_PER_UNIT);
    gcc_assert (l2align <= L2_MAX_OFILE_ALIGNMENT);
! 
    last_assemble_variable_decl = decl;
  
    /* We would rather not have to check this here - but it seems that we might
*************** fprintf (fp, "# albss: %s (%lld,%d) ro %
*** 2593,2616 ****
    if (one || weak)
      {
        /* Weak or COMDAT objects are put in mergeable sections.  */
!       darwin_emit_weak_or_comdat (fp, decl, name, size, 
  				  ld_uses_coal_sects, DECL_ALIGN (decl));
        return;
!     } 
  
    /* If this is not public, then emit according to local rules.  */
    if (!pub)
      {
!       darwin_emit_local_bss (fp, decl, name, size, l2align);	
        return;
      }
  
    /* So we have a public symbol (small item fudge for Java, see above).  */
!   if ((DARWIN_SECTION_ANCHORS && flag_section_anchors && size < BYTES_ZFILL) 
         || (size && size <= 2))
      {
        /* Put smaller objects in data, where the section anchors system can get
! 	 them.  However, if they are zero-sized punt them to yet a different 
  	 section (that is not allowed to participate in anchoring).  */
        if (!size)
  	{
--- 2543,2566 ----
    if (one || weak)
      {
        /* Weak or COMDAT objects are put in mergeable sections.  */
!       darwin_emit_weak_or_comdat (fp, decl, name, size,
  				  ld_uses_coal_sects, DECL_ALIGN (decl));
        return;
!     }
  
    /* If this is not public, then emit according to local rules.  */
    if (!pub)
      {
!       darwin_emit_local_bss (fp, decl, name, size, l2align);
        return;
      }
  
    /* So we have a public symbol (small item fudge for Java, see above).  */
!   if ((DARWIN_SECTION_ANCHORS && flag_section_anchors && size < BYTES_ZFILL)
         || (size && size <= 2))
      {
        /* Put smaller objects in data, where the section anchors system can get
! 	 them.  However, if they are zero-sized punt them to yet a different
  	 section (that is not allowed to participate in anchoring).  */
        if (!size)
  	{
*************** fprintf (fp, "# albss: %s (%lld,%d) ro %
*** 2630,2636 ****
        assemble_name (fp, name);
        fprintf (fp, ":\n\t.space\t" HOST_WIDE_INT_PRINT_UNSIGNED"\n", size);
      }
!   else 
      {
        char secnam[64];
        unsigned int flags ;
--- 2580,2586 ----
        assemble_name (fp, name);
        fprintf (fp, ":\n\t.space\t" HOST_WIDE_INT_PRINT_UNSIGNED"\n", size);
      }
!   else
      {
        char secnam[64];
        unsigned int flags ;
*************** fprintf (fp, "# albss: %s (%lld,%d) ro %
*** 2660,2666 ****
     supports this).  */
  void
  darwin_asm_output_aligned_decl_common (FILE *fp, tree decl, const char *name,
! 				       unsigned HOST_WIDE_INT size, 
  				       unsigned int align)
  {
    unsigned int l2align;
--- 2610,2616 ----
     supports this).  */
  void
  darwin_asm_output_aligned_decl_common (FILE *fp, tree decl, const char *name,
! 				       unsigned HOST_WIDE_INT size,
  				       unsigned int align)
  {
    unsigned int l2align;
*************** darwin_asm_output_aligned_decl_common (F
*** 2671,2677 ****
    if (decl==NULL)
      {
  #ifdef DEBUG_DARWIN_MEM_ALLOCATORS
! fprintf (fp, "# adcom: %s (%d,%d) decl=0x0\n", name, (int)size, (int)align); 
  #endif
        darwin_emit_common (fp, name, size, align);
        return;
--- 2621,2627 ----
    if (decl==NULL)
      {
  #ifdef DEBUG_DARWIN_MEM_ALLOCATORS
! fprintf (fp, "# adcom: %s (%d,%d) decl=0x0\n", name, (int)size, (int)align);
  #endif
        darwin_emit_common (fp, name, size, align);
        return;
*************** fprintf (fp, "# adcom: %s (%d,%d) decl=0
*** 2680,2697 ****
    one = DECL_ONE_ONLY (decl);
    weak = (DECL_P (decl)
  	  && DECL_WEAK (decl)
! 	  && !lookup_attribute ("weak_import", 
  				 DECL_ATTRIBUTES (decl)));
  
  #ifdef DEBUG_DARWIN_MEM_ALLOCATORS
  fprintf (fp, "# adcom: %s (%lld,%d) ro %d cst %d stat %d com %d pub %d"
  	     " weak %d one %d init %lx\n",
! 	name,  (long long)size, (int)align, TREE_READONLY (decl), 
  	TREE_CONSTANT (decl), TREE_STATIC (decl), DECL_COMMON (decl),
! 	TREE_PUBLIC (decl), weak, one, (unsigned long)DECL_INITIAL (decl)); 
  #endif
  
!   /* ObjC metadata can get put in BSS because varasm.c decides it's BSS 
       before the target has a chance to comment.  */
    if ((meta = is_objc_metadata (decl)))
      {
--- 2630,2647 ----
    one = DECL_ONE_ONLY (decl);
    weak = (DECL_P (decl)
  	  && DECL_WEAK (decl)
! 	  && !lookup_attribute ("weak_import",
  				 DECL_ATTRIBUTES (decl)));
  
  #ifdef DEBUG_DARWIN_MEM_ALLOCATORS
  fprintf (fp, "# adcom: %s (%lld,%d) ro %d cst %d stat %d com %d pub %d"
  	     " weak %d one %d init %lx\n",
! 	name,  (long long)size, (int)align, TREE_READONLY (decl),
  	TREE_CONSTANT (decl), TREE_STATIC (decl), DECL_COMMON (decl),
! 	TREE_PUBLIC (decl), weak, one, (unsigned long)DECL_INITIAL (decl));
  #endif
  
!   /* ObjC metadata can get put in BSS because varasm.c decides it's BSS
       before the target has a chance to comment.  */
    if ((meta = is_objc_metadata (decl)))
      {
*************** fprintf (fp, "# adcom: %s (%lld,%d) ro %
*** 2707,2730 ****
    if (one || weak)
      {
        /* Weak or COMDAT objects are put in mergable sections.  */
!       darwin_emit_weak_or_comdat (fp, decl, name, size, 
  				  ld_uses_coal_sects, DECL_ALIGN (decl));
        return;
!     } 
  
!   /* We should only get here for DECL_COMMON, with a zero init (and, in 
       principle, only for public symbols too - although we deal with local
       ones below).  */
  
    /* Check the initializer is OK.  */
!   gcc_assert (DECL_COMMON (decl) 
! 	      && ((DECL_INITIAL (decl) == NULL) 
! 	       || (DECL_INITIAL (decl) == error_mark_node) 
  	       || initializer_zerop (DECL_INITIAL (decl))));
  
    last_assemble_variable_decl = decl;
  
!   if (!size || !align) 
      align = DECL_ALIGN (decl);
  
    l2align = floor_log2 (align / BITS_PER_UNIT);
--- 2657,2680 ----
    if (one || weak)
      {
        /* Weak or COMDAT objects are put in mergable sections.  */
!       darwin_emit_weak_or_comdat (fp, decl, name, size,
  				  ld_uses_coal_sects, DECL_ALIGN (decl));
        return;
!     }
  
!   /* We should only get here for DECL_COMMON, with a zero init (and, in
       principle, only for public symbols too - although we deal with local
       ones below).  */
  
    /* Check the initializer is OK.  */
!   gcc_assert (DECL_COMMON (decl)
! 	      && ((DECL_INITIAL (decl) == NULL)
! 	       || (DECL_INITIAL (decl) == error_mark_node)
  	       || initializer_zerop (DECL_INITIAL (decl))));
  
    last_assemble_variable_decl = decl;
  
!   if (!size || !align)
      align = DECL_ALIGN (decl);
  
    l2align = floor_log2 (align / BITS_PER_UNIT);
*************** fprintf (fp, "# adcom: %s (%lld,%d) ro %
*** 2734,2746 ****
    if (TREE_PUBLIC (decl) != 0)
      darwin_emit_common (fp, name, size, align);
    else
!     darwin_emit_local_bss (fp, decl, name, size, l2align);	
  }
  
  /* Output a chunk of BSS with alignment specfied.  */
  void
! darwin_asm_output_aligned_decl_local (FILE *fp, tree decl, const char *name, 
! 				      unsigned HOST_WIDE_INT size, 
  				      unsigned int align)
  {
    unsigned long l2align;
--- 2684,2696 ----
    if (TREE_PUBLIC (decl) != 0)
      darwin_emit_common (fp, name, size, align);
    else
!     darwin_emit_local_bss (fp, decl, name, size, l2align);
  }
  
  /* Output a chunk of BSS with alignment specfied.  */
  void
! darwin_asm_output_aligned_decl_local (FILE *fp, tree decl, const char *name,
! 				      unsigned HOST_WIDE_INT size,
  				      unsigned int align)
  {
    unsigned long l2align;
*************** darwin_asm_output_aligned_decl_local (FI
*** 2750,2767 ****
    one = DECL_ONE_ONLY (decl);
    weak = (DECL_P (decl)
  	  && DECL_WEAK (decl)
! 	  && !lookup_attribute ("weak_import", 
  				 DECL_ATTRIBUTES (decl)));
  
  #ifdef DEBUG_DARWIN_MEM_ALLOCATORS
  fprintf (fp, "# adloc: %s (%lld,%d) ro %d cst %d stat %d one %d pub %d"
  	     " weak %d init %lx\n",
! 	name, (long long)size, (int)align, TREE_READONLY (decl), 
  	TREE_CONSTANT (decl), TREE_STATIC (decl), one, TREE_PUBLIC (decl),
! 	weak , (unsigned long)DECL_INITIAL (decl)); 
  #endif
  
!   /* ObjC metadata can get put in BSS because varasm.c decides it's BSS 
       before the target has a chance to comment.  */
    if ((meta = is_objc_metadata (decl)))
      {
--- 2700,2717 ----
    one = DECL_ONE_ONLY (decl);
    weak = (DECL_P (decl)
  	  && DECL_WEAK (decl)
! 	  && !lookup_attribute ("weak_import",
  				 DECL_ATTRIBUTES (decl)));
  
  #ifdef DEBUG_DARWIN_MEM_ALLOCATORS
  fprintf (fp, "# adloc: %s (%lld,%d) ro %d cst %d stat %d one %d pub %d"
  	     " weak %d init %lx\n",
! 	name, (long long)size, (int)align, TREE_READONLY (decl),
  	TREE_CONSTANT (decl), TREE_STATIC (decl), one, TREE_PUBLIC (decl),
! 	weak , (unsigned long)DECL_INITIAL (decl));
  #endif
  
!   /* ObjC metadata can get put in BSS because varasm.c decides it's BSS
       before the target has a chance to comment.  */
    if ((meta = is_objc_metadata (decl)))
      {
*************** fprintf (fp, "# adloc: %s (%lld,%d) ro %
*** 2777,2792 ****
    if (one || weak)
      {
        /* Weak or COMDAT objects are put in mergable sections.  */
!       darwin_emit_weak_or_comdat (fp, decl, name, size, 
  				  ld_uses_coal_sects, DECL_ALIGN (decl));
        return;
!     } 
  
    /* .. and it should be suitable for placement in local mem.  */
    gcc_assert(!TREE_PUBLIC (decl) && !DECL_COMMON (decl));
    /* .. and any initializer must be all-zero.  */
!   gcc_assert ((DECL_INITIAL (decl) == NULL) 
! 	       || (DECL_INITIAL (decl) == error_mark_node) 
  	       || initializer_zerop (DECL_INITIAL (decl)));
  
    last_assemble_variable_decl = decl;
--- 2727,2742 ----
    if (one || weak)
      {
        /* Weak or COMDAT objects are put in mergable sections.  */
!       darwin_emit_weak_or_comdat (fp, decl, name, size,
  				  ld_uses_coal_sects, DECL_ALIGN (decl));
        return;
!     }
  
    /* .. and it should be suitable for placement in local mem.  */
    gcc_assert(!TREE_PUBLIC (decl) && !DECL_COMMON (decl));
    /* .. and any initializer must be all-zero.  */
!   gcc_assert ((DECL_INITIAL (decl) == NULL)
! 	       || (DECL_INITIAL (decl) == error_mark_node)
  	       || initializer_zerop (DECL_INITIAL (decl)));
  
    last_assemble_variable_decl = decl;
*************** darwin_assemble_visibility (tree decl, i
*** 2825,2831 ****
  
  /* vec used by darwin_asm_dwarf_section.
     Maybe a hash tab would be better here - but the intention is that this is
!    a very short list (fewer than 16 items) and each entry should (ideally, 
     eventually) only be presented once.
  
     A structure to hold a dwarf debug section used entry.  */
--- 2775,2781 ----
  
  /* vec used by darwin_asm_dwarf_section.
     Maybe a hash tab would be better here - but the intention is that this is
!    a very short list (fewer than 16 items) and each entry should (ideally,
     eventually) only be presented once.
  
     A structure to hold a dwarf debug section used entry.  */
*************** dwarf_sect_used_entry;
*** 2840,2846 ****
  /* A list of used __DWARF sections.  */
  static GTY (()) vec<dwarf_sect_used_entry, va_gc> *dwarf_sect_names_table;
  
! /* This is called when we are asked to assemble a named section and the 
     name begins with __DWARF,.  We keep a list of the section names (without
     the __DWARF, prefix) and use this to emit our required start label on the
     first switch to each section.  */
--- 2790,2796 ----
  /* A list of used __DWARF sections.  */
  static GTY (()) vec<dwarf_sect_used_entry, va_gc> *dwarf_sect_names_table;
  
! /* This is called when we are asked to assemble a named section and the
     name begins with __DWARF,.  We keep a list of the section names (without
     the __DWARF, prefix) and use this to emit our required start label on the
     first switch to each section.  */
*************** darwin_asm_dwarf_section (const char *na
*** 2881,2887 ****
    if (dwarf_sect_names_table == NULL)
      vec_alloc (dwarf_sect_names_table, 16);
    else
!     for (i = 0; 
  	 dwarf_sect_names_table->iterate (i, &ref);
  	 i++)
        {
--- 2831,2837 ----
    if (dwarf_sect_names_table == NULL)
      vec_alloc (dwarf_sect_names_table, 16);
    else
!     for (i = 0;
  	 dwarf_sect_names_table->iterate (i, &ref);
  	 i++)
        {
*************** darwin_file_end (void)
*** 3014,3021 ****
       }
  
    machopic_finish (asm_out_file);
!   if (lang_GNU_CXX ())
      {
        switch_to_section (darwin_sections[constructor_section]);
        switch_to_section (darwin_sections[destructor_section]);
        ASM_OUTPUT_ALIGN (asm_out_file, 1);
--- 2964,2972 ----
       }
  
    machopic_finish (asm_out_file);
!   if (flag_apple_kext)
      {
+       /* These sections are only used for kernel code.  */
        switch_to_section (darwin_sections[constructor_section]);
        switch_to_section (darwin_sections[destructor_section]);
        ASM_OUTPUT_ALIGN (asm_out_file, 1);
*************** darwin_file_end (void)
*** 3118,3125 ****
  bool
  darwin_binds_local_p (const_tree decl)
  {
!   return default_binds_local_p_1 (decl,
! 				  TARGET_KEXTABI && DARWIN_VTABLE_P (decl));
  }
  
  /* The Darwin's implementation of TARGET_ASM_OUTPUT_ANCHOR.  Define the
--- 3069,3082 ----
  bool
  darwin_binds_local_p (const_tree decl)
  {
!   /* We use the "shlib" input to indicate that a symbol should be
!      considered overridable; only relevant for vtables in kernel modules
!      on earlier system versions, and with a TODO to complete.  */
!   bool force_overridable = TARGET_KEXTABI && DARWIN_VTABLE_P (decl);
!   return default_binds_local_p_3 (decl, force_overridable /* shlib */,
! 				  false /* weak dominate */,
! 				  false /* extern_protected_data */,
! 				  false /* common_local_p */);
  }
  
  /* The Darwin's implementation of TARGET_ASM_OUTPUT_ANCHOR.  Define the
*************** darwin_override_options (void)
*** 3223,3231 ****
  		  global_options.x_flag_objc_abi);
      }
  
!   /* Don't emit DWARF3/4 unless specifically selected.  This is a 
       workaround for tool bugs.  */
!   if (!global_options_set.x_dwarf_strict) 
      dwarf_strict = 1;
    if (!global_options_set.x_dwarf_version)
      dwarf_version = 2;
--- 3180,3188 ----
  		  global_options.x_flag_objc_abi);
      }
  
!   /* Don't emit DWARF3/4 unless specifically selected.  This is a
       workaround for tool bugs.  */
!   if (!global_options_set.x_dwarf_strict)
      dwarf_strict = 1;
    if (!global_options_set.x_dwarf_version)
      dwarf_version = 2;
*************** darwin_override_options (void)
*** 3238,3244 ****
        global_options_set.x_dwarf_split_debug_info = 0;
      }
  
!   /* Do not allow unwind tables to be generated by default for m32.  
       fnon-call-exceptions will override this, regardless of what we do.  */
    if (generating_for_darwin_version < 10
        && !global_options_set.x_flag_asynchronous_unwind_tables
--- 3195,3201 ----
        global_options_set.x_dwarf_split_debug_info = 0;
      }
  
!   /* Do not allow unwind tables to be generated by default for m32.
       fnon-call-exceptions will override this, regardless of what we do.  */
    if (generating_for_darwin_version < 10
        && !global_options_set.x_flag_asynchronous_unwind_tables
*************** darwin_override_options (void)
*** 3272,3278 ****
      /* FIXME: flag_objc_sjlj_exceptions is no longer needed since there is only
         one valid choice of exception scheme for each runtime.  */
      if (!global_options_set.x_flag_objc_sjlj_exceptions)
!       global_options.x_flag_objc_sjlj_exceptions = 
  				flag_next_runtime && !TARGET_64BIT;
  
      /* FIXME: and this could be eliminated then too.  */
--- 3229,3235 ----
      /* FIXME: flag_objc_sjlj_exceptions is no longer needed since there is only
         one valid choice of exception scheme for each runtime.  */
      if (!global_options_set.x_flag_objc_sjlj_exceptions)
!       global_options.x_flag_objc_sjlj_exceptions =
  				flag_next_runtime && !TARGET_64BIT;
  
      /* FIXME: and this could be eliminated then too.  */
*************** darwin_override_options (void)
*** 3354,3360 ****
    else if (DARWIN_X86 && darwin_symbol_stubs && TARGET_64BIT)
      {
        inform (input_location,
! 	      "%<-msymbol-stubs%> is not required for 64b code (ignored)");
        darwin_symbol_stubs = false;
      }
  
--- 3311,3318 ----
    else if (DARWIN_X86 && darwin_symbol_stubs && TARGET_64BIT)
      {
        inform (input_location,
! 	      "%<-mpic-symbol-stubs%> is not required for 64-bit code "
! 	      "(ignored)");
        darwin_symbol_stubs = false;
      }
  
*************** static GTY (()) hash_table<cfstring_hash
*** 3441,3447 ****
  static tree
  add_builtin_field_decl (tree type, const char *name, tree **chain)
  {
!   tree field = build_decl (BUILTINS_LOCATION, FIELD_DECL, 
  			    get_identifier (name), type);
  
    if (*chain != NULL)
--- 3399,3405 ----
  static tree
  add_builtin_field_decl (tree type, const char *name, tree **chain)
  {
!   tree field = build_decl (BUILTINS_LOCATION, FIELD_DECL,
  			    get_identifier (name), type);
  
    if (*chain != NULL)
*************** darwin_init_cfstring_builtins (unsigned
*** 3457,3465 ****
    tree cfsfun, fields, pccfstring_ftype_pcchar;
    tree *chain = NULL;
  
!   darwin_builtin_cfstring = 
      (enum built_in_function) builtin_cfstring;
!   
    /* struct __builtin_CFString {
         const int *isa;		(will point at
         int flags;		 __CFConstantStringClassReference)
--- 3415,3423 ----
    tree cfsfun, fields, pccfstring_ftype_pcchar;
    tree *chain = NULL;
  
!   darwin_builtin_cfstring =
      (enum built_in_function) builtin_cfstring;
! 
    /* struct __builtin_CFString {
         const int *isa;		(will point at
         int flags;		 __CFConstantStringClassReference)
*************** darwin_init_cfstring_builtins (unsigned
*** 3467,3476 ****
         long length;
       };  */
  
!   pcint_type_node = build_pointer_type 
  		   (build_qualified_type (integer_type_node, TYPE_QUAL_CONST));
  
!   pcchar_type_node = build_pointer_type 
  		   (build_qualified_type (char_type_node, TYPE_QUAL_CONST));
  
    cfstring_type_node = (*lang_hooks.types.make_type) (RECORD_TYPE);
--- 3425,3434 ----
         long length;
       };  */
  
!   pcint_type_node = build_pointer_type
  		   (build_qualified_type (integer_type_node, TYPE_QUAL_CONST));
  
!   pcchar_type_node = build_pointer_type
  		   (build_qualified_type (char_type_node, TYPE_QUAL_CONST));
  
    cfstring_type_node = (*lang_hooks.types.make_type) (RECORD_TYPE);
*************** darwin_init_cfstring_builtins (unsigned
*** 3486,3498 ****
    /* const struct __builtin_CFstring *
       __builtin___CFStringMakeConstantString (const char *); */
  
!   ccfstring_type_node = build_qualified_type 
  			(cfstring_type_node, TYPE_QUAL_CONST);
    pccfstring_type_node = build_pointer_type (ccfstring_type_node);
!   pccfstring_ftype_pcchar = build_function_type_list 
  			(pccfstring_type_node, pcchar_type_node, NULL_TREE);
  
!   cfsfun  = build_decl (BUILTINS_LOCATION, FUNCTION_DECL, 
  			get_identifier ("__builtin___CFStringMakeConstantString"),
  			pccfstring_ftype_pcchar);
  
--- 3444,3456 ----
    /* const struct __builtin_CFstring *
       __builtin___CFStringMakeConstantString (const char *); */
  
!   ccfstring_type_node = build_qualified_type
  			(cfstring_type_node, TYPE_QUAL_CONST);
    pccfstring_type_node = build_pointer_type (ccfstring_type_node);
!   pccfstring_ftype_pcchar = build_function_type_list
  			(pccfstring_type_node, pcchar_type_node, NULL_TREE);
  
!   cfsfun  = build_decl (BUILTINS_LOCATION, FUNCTION_DECL,
  			get_identifier ("__builtin___CFStringMakeConstantString"),
  			pccfstring_ftype_pcchar);
  
*************** darwin_init_cfstring_builtins (unsigned
*** 3503,3510 ****
       in place of the existing, which may be NULL.  */
    DECL_LANG_SPECIFIC (cfsfun) = NULL;
    (*lang_hooks.dup_lang_specific_decl) (cfsfun);
!   DECL_BUILT_IN_CLASS (cfsfun) = BUILT_IN_MD;
!   DECL_FUNCTION_CODE (cfsfun) = darwin_builtin_cfstring;
    lang_hooks.builtin_function (cfsfun);
  
    /* extern int __CFConstantStringClassReference[];  */
--- 3461,3467 ----
       in place of the existing, which may be NULL.  */
    DECL_LANG_SPECIFIC (cfsfun) = NULL;
    (*lang_hooks.dup_lang_specific_decl) (cfsfun);
!   set_decl_built_in_function (cfsfun, BUILT_IN_MD, darwin_builtin_cfstring);
    lang_hooks.builtin_function (cfsfun);
  
    /* extern int __CFConstantStringClassReference[];  */
*************** darwin_init_cfstring_builtins (unsigned
*** 3517,3523 ****
    (*lang_hooks.decls.pushdecl) (cfstring_class_reference);
    DECL_EXTERNAL (cfstring_class_reference) = 1;
    rest_of_decl_compilation (cfstring_class_reference, 0, 0);
!   
    /* Initialize the hash table used to hold the constant CFString objects.  */
    cfstring_htab = hash_table<cfstring_hasher>::create_ggc (31);
  
--- 3474,3480 ----
    (*lang_hooks.decls.pushdecl) (cfstring_class_reference);
    DECL_EXTERNAL (cfstring_class_reference) = 1;
    rest_of_decl_compilation (cfstring_class_reference, 0, 0);
! 
    /* Initialize the hash table used to hold the constant CFString objects.  */
    cfstring_htab = hash_table<cfstring_hasher>::create_ggc (31);
  
*************** darwin_init_cfstring_builtins (unsigned
*** 3525,3540 ****
  }
  
  tree
! darwin_fold_builtin (tree fndecl, int n_args, tree *argp, 
  		     bool ARG_UNUSED (ignore))
  {
!   unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
!   
    if (fcode == darwin_builtin_cfstring)
      {
        if (!darwin_constant_cfstrings)
  	{
! 	  error ("built-in function %qD requires the" 
  		 " %<-mconstant-cfstrings%> flag", fndecl);
  	  return error_mark_node;
  	}
--- 3482,3497 ----
  }
  
  tree
! darwin_fold_builtin (tree fndecl, int n_args, tree *argp,
  		     bool ARG_UNUSED (ignore))
  {
!   unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl);
! 
    if (fcode == darwin_builtin_cfstring)
      {
        if (!darwin_constant_cfstrings)
  	{
! 	  error ("built-in function %qD requires the"
  		 " %<-mconstant-cfstrings%> flag", fndecl);
  	  return error_mark_node;
  	}
*************** darwin_build_constant_cfstring (tree str
*** 3673,3684 ****
  
        /* isa *. */
        field = TYPE_FIELDS (ccfstring_type_node);
!       CONSTRUCTOR_APPEND_ELT(v, NULL_TREE, 
! 			     build1 (ADDR_EXPR,  TREE_TYPE (field),  
  				     cfstring_class_reference));
        /* flags */
        field = DECL_CHAIN (field);
!       CONSTRUCTOR_APPEND_ELT(v, NULL_TREE, 
  			     build_int_cst (TREE_TYPE (field), 0x000007c8));
        /* string *. */
        field = DECL_CHAIN (field);
--- 3630,3641 ----
  
        /* isa *. */
        field = TYPE_FIELDS (ccfstring_type_node);
!       CONSTRUCTOR_APPEND_ELT(v, NULL_TREE,
! 			     build1 (ADDR_EXPR,  TREE_TYPE (field),
  				     cfstring_class_reference));
        /* flags */
        field = DECL_CHAIN (field);
!       CONSTRUCTOR_APPEND_ELT(v, NULL_TREE,
  			     build_int_cst (TREE_TYPE (field), 0x000007c8));
        /* string *. */
        field = DECL_CHAIN (field);
*************** darwin_build_constant_cfstring (tree str
*** 3702,3708 ****
  	TREE_LANG_FLAG_4 (constructor) = 1;  /* TREE_HAS_CONSTRUCTOR  */
  
        /* Create an anonymous global variable for this CFString.  */
!       var = build_decl (input_location, CONST_DECL, 
  			NULL, TREE_TYPE (constructor));
        DECL_ARTIFICIAL (var) = 1;
        TREE_STATIC (var) = 1;
--- 3659,3665 ----
  	TREE_LANG_FLAG_4 (constructor) = 1;  /* TREE_HAS_CONSTRUCTOR  */
  
        /* Create an anonymous global variable for this CFString.  */
!       var = build_decl (input_location, CONST_DECL,
  			NULL, TREE_TYPE (constructor));
        DECL_ARTIFICIAL (var) = 1;
        TREE_STATIC (var) = 1;
*************** darwin_cfstring_p (tree str)
*** 3736,3742 ****
  
    key.literal = str;
    cfstring_descriptor **loc = cfstring_htab->find_slot (&key, NO_INSERT);
!   
    if (loc)
      return true;
  
--- 3693,3699 ----
  
    key.literal = str;
    cfstring_descriptor **loc = cfstring_htab->find_slot (&key, NO_INSERT);
! 
    if (loc)
      return true;
  
*************** darwin_function_section (tree decl, enum
*** 3768,3774 ****
    bool weak = (decl
  	       && DECL_WEAK (decl)
  	       && (!DECL_ATTRIBUTES (decl)
! 		   || !lookup_attribute ("weak_import", 
  					  DECL_ATTRIBUTES (decl))));
  
    bool use_coal = weak && ld_uses_coal_sects;
--- 3725,3731 ----
    bool weak = (decl
  	       && DECL_WEAK (decl)
  	       && (!DECL_ATTRIBUTES (decl)
! 		   || !lookup_attribute ("weak_import",
  					  DECL_ATTRIBUTES (decl))));
  
    bool use_coal = weak && ld_uses_coal_sects;
diff -Nrcpad gcc-9.3.0/gcc/config/darwin.h gcc-10.1.0/gcc/config/darwin.h
*** gcc-9.3.0/gcc/config/darwin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/darwin.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target definitions for Darwin (Mac OS X) systems.
!    Copyright (C) 1989-2019 Free Software Foundation, Inc.
     Contributed by Apple Computer Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Target definitions for Darwin (Mac OS X) systems.
!    Copyright (C) 1989-2020 Free Software Foundation, Inc.
     Contributed by Apple Computer Inc.
  
  This file is part of GCC.
*************** see the files COPYING3 and COPYING.RUNTI
*** 118,130 ****
  /* True if pragma ms_struct is in effect.  */
  extern GTY(()) int darwin_ms_struct;
  
! #define DRIVER_SELF_SPECS					\
!   "%{gfull:-g -fno-eliminate-unused-debug-symbols} %<gfull",	\
!   "%{gused:-g -feliminate-unused-debug-symbols} %<gused",	\
!   "%{fapple-kext|mkernel:-static}",				\
!   "%{shared:-Zdynamiclib} %<shared",                            \
!   "%{gsplit-dwarf:%ngsplit-dwarf is not supported on this platform} \
!      %<gsplit-dwarf"
  
  #if LD64_HAS_EXPORT_DYNAMIC
  #define DARWIN_RDYNAMIC "%{rdynamic:-export_dynamic}"
--- 118,141 ----
  /* True if pragma ms_struct is in effect.  */
  extern GTY(()) int darwin_ms_struct;
  
! /* The majority of Darwin's special driver opts are direct access to ld flags
!    (to save the user typing -Wl,xxxxx or Xlinker xxxxx) but we can't process
!    them here, since doing so will make it appear that there are linker infiles
!    and the linker will invoked even when it is not necessary.
! 
!    However, a few can be handled and we can elide options that are silently-
!    ignored defaults, plus warn on obsolete ones that no longer function.  */
! #undef SUBTARGET_DRIVER_SELF_SPECS
! #define SUBTARGET_DRIVER_SELF_SPECS					\
! "%{fapple-kext|mkernel:-static}",					\
! "%{gfull:-g -fno-eliminate-unused-debug-symbols} %<gfull",		\
! "%{gsplit-dwarf:%ngsplit-dwarf is not supported on this platform} \
!    %<gsplit-dwarf",							\
! "%{gused:-g -feliminate-unused-debug-symbols} %<gused",			\
! "%{shared:-Zdynamiclib} %<shared",					\
! "%{static:%{Zdynamic:%e conflicting code gen style switches are used}}",\
! "%{y*:%nthe y option is obsolete and ignored} %<y*",			\
! "%<Mach %<X"
  
  #if LD64_HAS_EXPORT_DYNAMIC
  #define DARWIN_RDYNAMIC "%{rdynamic:-export_dynamic}"
*************** extern GTY(()) int darwin_ms_struct;
*** 342,354 ****
     %{Zunexported_symbols_list*:-unexported_symbols_list %*} \
     %{Zweak_reference_mismatches*:-weak_reference_mismatches %*} \
     %{!Zweak_reference_mismatches*:-weak_reference_mismatches non-weak} \
-    %{X} \
-    %{y*} \
     %{w} \
     %{pagezero_size*} %{segs_read_*} %{seglinkedit} %{noseglinkedit}  \
     %{sectalign*} %{sectobjectsymbols*} %{segcreate*} %{whyload} \
     %{whatsloaded} %{dylinker_install_name*} \
!    %{dylinker} %{Mach} "
  
  
  /* Machine dependent libraries.  */
--- 353,363 ----
     %{Zunexported_symbols_list*:-unexported_symbols_list %*} \
     %{Zweak_reference_mismatches*:-weak_reference_mismatches %*} \
     %{!Zweak_reference_mismatches*:-weak_reference_mismatches non-weak} \
     %{w} \
     %{pagezero_size*} %{segs_read_*} %{seglinkedit} %{noseglinkedit}  \
     %{sectalign*} %{sectobjectsymbols*} %{segcreate*} %{whyload} \
     %{whatsloaded} %{dylinker_install_name*} \
!    %{dylinker} "
  
  
  /* Machine dependent libraries.  */
*************** extern GTY(()) section * darwin_sections
*** 837,842 ****
--- 846,858 ----
  #define MACHO_SYMBOL_HIDDEN_VIS_P(RTX) \
    ((SYMBOL_REF_FLAGS (RTX) & MACHO_SYMBOL_FLAG_HIDDEN_VIS) != 0)
  
+ /* Set on a symbol that should be made visible to the linker (overriding
+    'L' symbol prefixes).  */
+ 
+ #define MACHO_SYMBOL_FLAG_LINKER_VIS ((SYMBOL_FLAG_SUBT_DEP) << 4)
+ #define MACHO_SYMBOL_LINKER_VIS_P(RTX) \
+   ((SYMBOL_REF_FLAGS (RTX) & MACHO_SYMBOL_FLAG_LINKER_VIS) != 0)
+ 
  /* Set on a symbol that is a pic stub or symbol indirection (i.e. the
     L_xxxxx${stub,non_lazy_ptr,lazy_ptr}.  */
  
*************** extern void darwin_driver_init (unsigned
*** 1046,1052 ****
  
  /* From at least version 62.1, ld64 can build symbol indirection stubs as
     needed, and there is no need for the compiler to emit them.  */
! #define MIN_LD64_OMIT_STUBS "85.2"
  
  #ifndef LD64_VERSION
  #define LD64_VERSION "62.1"
--- 1062,1068 ----
  
  /* From at least version 62.1, ld64 can build symbol indirection stubs as
     needed, and there is no need for the compiler to emit them.  */
! #define MIN_LD64_OMIT_STUBS "62.1"
  
  #ifndef LD64_VERSION
  #define LD64_VERSION "62.1"
diff -Nrcpad gcc-9.3.0/gcc/config/darwin.opt gcc-10.1.0/gcc/config/darwin.opt
*** gcc-9.3.0/gcc/config/darwin.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/darwin.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Processor-independent options for Darwin.
  
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Processor-independent options for Darwin.
  
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
*************** Generate code for the kernel or loadable
*** 68,74 ****
  ; Init is never used.
  mmacosx-version-min=
  Target RejectNegative Joined Report Var(darwin_macosx_version_min) Init(DEF_MIN_OSX_VERSION)
! The earliest MacOS X version on which this program will run.
  
  ; Really, only relevant to PowerPC which has a 4 byte bool by default.
  mone-byte-bool
--- 68,74 ----
  ; Init is never used.
  mmacosx-version-min=
  Target RejectNegative Joined Report Var(darwin_macosx_version_min) Init(DEF_MIN_OSX_VERSION)
! The earliest macOS version on which this program will run.
  
  ; Really, only relevant to PowerPC which has a 4 byte bool by default.
  mone-byte-bool
*************** Target RejectNegative Joined Report Alia
*** 85,141 ****
  
  mtarget-linker
  Target RejectNegative Joined Separate Report Var(darwin_target_linker) Init(LD64_VERSION)
! The version of ld64 in use for this toolchain.
  
  ; Driver options.
  
  all_load
  Driver RejectNegative Alias(Zall_load)
! Loads all members of archive libraries
  
  allowable_client
  Driver RejectNegative Separate Alias(Zallowable_client)
! -allowable_client <name>	The output dylib is private to the client(s) named
  
  arch
  Driver RejectNegative Separate
! -arch <name>	Specify that the output file should be generated for architecture  \"name\"
  
  arch_errors_fatal
  Driver RejectNegative Alias(Zarch_errors_fatal)
! Mismatches between file architecture and the \"-arch\" are errors instead of warnings
  
  asm_macosx_version_min=
  Driver RejectNegative Joined
! The earliest MacOS X version on which this program will run (formatted for the assembler)
  
  bind_at_load
  Driver RejectNegative Alias(Zbind_at_load)
! Produce an output file that will bind symbols on load, rather than lazily.
  
  bundle
  Driver RejectNegative Alias(Zbundle)
! Produce a Mach-O bundle (file type MH_BUNDLE)
  
  bundle_loader
  Driver RejectNegative Separate Alias(Zbundle_loader)
! -bundle_loader <executable>	Treat \"executable\" (that will be loading this bundle) as if it was one of the dynamic libraries the bundle is linked against for symbol resolution
  
  client_name
  Driver RejectNegative Separate
! -client_name <name>	Enable the executable being built to link against a private dylib (using allowable_client)
  
  compatibility_version
  Driver RejectNegative Separate
! -compatibility_version <number>	Set the minimum version for the client interface.  Clients must record a greater number than this or the binding will fail at runtime
  
  current_version
  Driver RejectNegative Separate
! -current_version <number>	Set the current version for the library.
  
  dead_strip
  Driver RejectNegative Alias(Zdead_strip)
! Remove code and data that is unreachable from any exported symbol (including the entry point)
  
  dylib_file
  Driver Separate Alias(Zdylib_file)
--- 85,141 ----
  
  mtarget-linker
  Target RejectNegative Joined Separate Report Var(darwin_target_linker) Init(LD64_VERSION)
! -mtarget-linker <version>	Specify that ld64 <version> is the toolchain linker for the current invocation.
  
  ; Driver options.
  
  all_load
  Driver RejectNegative Alias(Zall_load)
! Load all members of archive libraries, rather than only those that satisfy undefined symbols.
  
  allowable_client
  Driver RejectNegative Separate Alias(Zallowable_client)
! -allowable_client <name>	The output dylib is private to the client <name>.
  
  arch
  Driver RejectNegative Separate
! -arch <name>	Generate output for architecture <name>.
  
  arch_errors_fatal
  Driver RejectNegative Alias(Zarch_errors_fatal)
! Mismatches between file architecture and one specified by \"-arch\" are errors instead of warnings.
  
  asm_macosx_version_min=
  Driver RejectNegative Joined
! The earliest macOS version on which this program will run (formatted for the assembler).
  
  bind_at_load
  Driver RejectNegative Alias(Zbind_at_load)
! Generate an output executable that binds symbols on load, rather than lazily.
  
  bundle
  Driver RejectNegative Alias(Zbundle)
! Generate a Mach-O bundle (file type MH_BUNDLE).
  
  bundle_loader
  Driver RejectNegative Separate Alias(Zbundle_loader)
! -bundle_loader <executable>	Treat <executable> (that will be loading this bundle) as if it was one of the dynamic libraries the bundle is linked against for symbol resolution.
  
  client_name
  Driver RejectNegative Separate
! -client_name <name>	Enable the executable being built to link against a private dylib (using allowable_client).
  
  compatibility_version
  Driver RejectNegative Separate
! -compatibility_version <number>	Set the version for the client interface.  Client programs must record a value less than or equal to <number>, or the binding will fail at runtime.
  
  current_version
  Driver RejectNegative Separate
! -current_version <number>	Set the current version for the library to <number>.
  
  dead_strip
  Driver RejectNegative Alias(Zdead_strip)
! Remove code and data that is unreachable from any exported symbol (including the entry point).
  
  dylib_file
  Driver Separate Alias(Zdylib_file)
*************** The default (and opposite of -static), i
*** 154,168 ****
  
  dynamiclib
  Driver RejectNegative Alias(Zdynamiclib)
! Produce a Mach-O shared library (file type MH_DYLIB), synonym for -shared
  
  exported_symbols_list
  Driver RejectNegative Separate Alias(Zexported_symbols_list)
! -exported_symbols_list <filename>	Global symbols in \"filename\" will be exported from the linked output file, any symbols not mentioned will be treated as hidden.
  
  filelist
  Driver RejectNegative Separate
! Supply a list of objects to be linked from a file, rather than the command line
  
  findirect-virtual-calls
  Driver RejectNegative
--- 154,168 ----
  
  dynamiclib
  Driver RejectNegative Alias(Zdynamiclib)
! Produce a Mach-O shared library (file type MH_DYLIB), synonym for \"-shared\".
  
  exported_symbols_list
  Driver RejectNegative Separate Alias(Zexported_symbols_list)
! -exported_symbols_list <filename>	Export global symbols in <filename> in linked output file; any symbols not mentioned will be treated as \"hidden\".
  
  filelist
  Driver RejectNegative Separate
! Supply a list of objects to be linked from a file, rather than the command line.
  
  findirect-virtual-calls
  Driver RejectNegative
*************** For the assembler (and linker) permit an
*** 178,188 ****
  
  force_flat_namespace
  Driver RejectNegative Alias(Zforce_flat_namespace)
! Set the output object such that, on loading, dyld  will ignore any two-level information and resolve symbols in the discovery order for loaded libs.
  
  framework
  Driver RejectNegative Separate
! -framework <name>	The linker should search for the named framework in the framework search path.
  
  fterminated-vtables
  Driver RejectNegative
--- 178,188 ----
  
  force_flat_namespace
  Driver RejectNegative Alias(Zforce_flat_namespace)
! Set the output object such that, on loading, dyld will ignore any two-level namespace information and resolve symbols in the discovery order for loaded libs.
  
  framework
  Driver RejectNegative Separate
! -framework <name>	The linker should search for the framework <name> in the framework search path.
  
  fterminated-vtables
  Driver RejectNegative
*************** Used for generating code for some older
*** 190,212 ****
  
  gfull
  Driver RejectNegative
! Abbreviation for \"-g -fno-eliminate-unused-debug-symbols\"
  
  gused
  Driver RejectNegative
! Abbreviation for \"-g -feliminate-unused-debug-symbols\"
  
  headerpad_max_install_names
  Driver RejectNegative
! Automatically adds space for longer path names in load commands (up to MAXPATHLEN)
  
  image_base
  Driver RejectNegative Separate Alias(Zimage_base)
! -image_base <address>	Choose a base address for a dylib or bundle.
  
  init
  Driver RejectNegative Separate Alias(Zinit)
! -init <symbol_name>	The symbol \"symbol_name\" will be used as the first initialiser for a dylib.
  
  install_name
  Driver RejectNegative Separate Alias(Zinstall_name)
--- 190,212 ----
  
  gfull
  Driver RejectNegative
! Abbreviation for \"-g -fno-eliminate-unused-debug-symbols\".
  
  gused
  Driver RejectNegative
! Abbreviation for \"-g -feliminate-unused-debug-symbols\".
  
  headerpad_max_install_names
  Driver RejectNegative
! Automatically adds space for longer path names in load commands (up to MAXPATHLEN).
  
  image_base
  Driver RejectNegative Separate Alias(Zimage_base)
! -image_base <address>	Specify <address> as the base address for a dylib or bundle.
  
  init
  Driver RejectNegative Separate Alias(Zinit)
! -init <symbol_name>	The symbol <symbol_name> will be used as the first initialiser for a dylib.
  
  install_name
  Driver RejectNegative Separate Alias(Zinstall_name)
*************** Usually \"private extern\" (hidden) symb
*** 218,228 ****
  
  multi_module
  Driver RejectNegative Alias(Zmulti_module)
! (Obsolete after 10.4) Multi modules are ignored at runtime since MacOS 10.4
  
  multiply_defined
  Driver RejectNegative Separate Alias(Zmultiply_defined)
! (Obsolete after 10.4) -multiply_defined <treatment> Provided a mechanism for warning about symbols defined in multiple dylibs.
  
  multiply_defined_unused
  Driver RejectNegative Separate Alias(Zmultiplydefinedunused)
--- 218,228 ----
  
  multi_module
  Driver RejectNegative Alias(Zmulti_module)
! (Obsolete after 10.4) Multi modules are ignored at runtime since macOS 10.4.
  
  multiply_defined
  Driver RejectNegative Separate Alias(Zmultiply_defined)
! (Obsolete after 10.4) -multiply_defined <treatment>	Provided a mechanism for warning about symbols defined in multiple dylibs.
  
  multiply_defined_unused
  Driver RejectNegative Separate Alias(Zmultiplydefinedunused)
*************** Driver RejectNegative Separate Alias(Zmu
*** 230,240 ****
  
  no_dead_strip_inits_and_terms
  Driver RejectNegative Alias(Zno_dead_strip_inits_and_terms)
! (Obsolete) The linker never dead strips these items, so the option is not needed.
  
  nofixprebinding
  Driver RejectNegative
! (Obsolete after 10.3.9) Set MH_NOPREFIXBINDING, in an exectuable.
  
  nomultidefs
  Driver RejectNegative
--- 230,240 ----
  
  no_dead_strip_inits_and_terms
  Driver RejectNegative Alias(Zno_dead_strip_inits_and_terms)
! (Obsolete) Current linkers never dead-strip these items, so the option is not needed.
  
  nofixprebinding
  Driver RejectNegative
! (Obsolete after 10.3.9) Set MH_NOPREFIXBINDING, in an executable.
  
  nomultidefs
  Driver RejectNegative
*************** Driver RejectNegative
*** 253,259 ****
  
  pagezero_size
  Driver RejectNegative Separate
! -pagezero_size size	Allows setting the page 0 size to 4kb for certain special cases.
  
  prebind
  Driver RejectNegative Negative(noprebind)
--- 253,259 ----
  
  pagezero_size
  Driver RejectNegative Separate
! -pagezero_size <size>	Allows setting the page 0 size to 4kb when required.
  
  prebind
  Driver RejectNegative Negative(noprebind)
*************** Synonym for \"-export-dynamic\" for link
*** 280,294 ****
  
  read_only_relocs
  Driver RejectNegative Separate
! -read_only_relocs <treatment>	This will allow relocs in read-only pages (not advisable).
  
  sectalign
  Driver RejectNegative Separate Args(3)
! -sectalign <segname> <sectname> <value>	Set section \"sectname\" in segment \"segname\" to have alignment \"value\" which must be an integral power of two expressed in hexadecimal form.
  
  sectcreate
  Driver RejectNegative Separate Args(3)
! -sectcreate <segname> <sectname> <file>	Create section \"sectname\" in segment \"segname\" from the contents of \"file\".
  
  sectobjectsymbols
  Driver RejectNegative Separate Args(2)
--- 280,294 ----
  
  read_only_relocs
  Driver RejectNegative Separate
! -read_only_relocs <treatment>	Allow relocations in read-only pages (not recommended).
  
  sectalign
  Driver RejectNegative Separate Args(3)
! -sectalign <segname> <sectname> <value>	Set section <sectname> in segment <segname> to have alignment <value> which must be an integral power of two expressed in hexadecimal form.
  
  sectcreate
  Driver RejectNegative Separate Args(3)
! -sectcreate <segname> <sectname> <file>	Create section <sectname> in segment <segname> from the contents of <file>.
  
  sectobjectsymbols
  Driver RejectNegative Separate Args(2)
*************** Driver RejectNegative Separate Args(2)
*** 296,324 ****
  
  sectorder
  Driver RejectNegative Separate Args(3)
! (Obsolete) -sectorder <segname> <sectname> orderfile	Replaced by a more general option \"-order_file\".
  
  seg_addr_table
  Driver RejectNegative Separate Alias(Zseg_addr_table)
! -seg_addr_table <file>	Specify the base addresses for dynamic libraries, \"file\" contains a line for each library.
  
  ; This is only usable by the ld_classic linker.
  seg_addr_table_filename
  Driver RejectNegative Separate Alias(Zfn_seg_addr_table_filename)
! (Obsolete, ld_classic only) -seg_addr_table_filename <path>
  
  seg1addr
  Driver RejectNegative Separate
! Synonym for \"image_base\"
  
  segaddr
  Driver RejectNegative Separate Args(2) Alias(Zsegaddr)
! -segaddr <name> <address>	Set the base address of segment \"name\" to \"address\" which must be aligned to a page boundary (currently 4kb).
  
  ; This is only usable by the ld_classic linker.
  segcreate
  Driver RejectNegative Separate Args(3)
! (Obsolete, ld_classic only) -sectcreate segname sectname file
  
  seglinkedit
  Driver RejectNegative Negative(noseglinkedit)
--- 296,324 ----
  
  sectorder
  Driver RejectNegative Separate Args(3)
! (Obsolete) -sectorder <segname> <sectname> <orderfile>	Replaced by a more general option \"-order_file\".
  
  seg_addr_table
  Driver RejectNegative Separate Alias(Zseg_addr_table)
! -seg_addr_table <file>	Specify the base addresses for dynamic libraries; <file> contains a line for each library.
  
  ; This is only usable by the ld_classic linker.
  seg_addr_table_filename
  Driver RejectNegative Separate Alias(Zfn_seg_addr_table_filename)
! (Obsolete, ld_classic only) -seg_addr_table_filename <path>.
  
  seg1addr
  Driver RejectNegative Separate
! Synonym for \"image_base\".
  
  segaddr
  Driver RejectNegative Separate Args(2) Alias(Zsegaddr)
! -segaddr <name> <address>	Set the base address of segment <name> to <address> which must be aligned to a page boundary (currently 4kb).
  
  ; This is only usable by the ld_classic linker.
  segcreate
  Driver RejectNegative Separate Args(3)
! (Obsolete, ld_classic only) -sectcreate <segname> <sectname> <file>	Allowed creation of a section from a file.
  
  seglinkedit
  Driver RejectNegative Negative(noseglinkedit)
*************** Driver RejectNegative Negative(noseglink
*** 326,340 ****
  
  segprot
  Driver RejectNegative Separate Args(3)
! -segprot <segname> max_prot init_prot	The protection values are \"r\", \"w\", \"x\" or \"-\" the latter meaning \"no access\".
  
  segs_read_only_addr
  Driver RejectNegative Separate Alias(Zsegs_read_only_addr)
! -segs_read_only_addr address 	Allows specifying the address of the read only portion of a dylib.
  
  segs_read_write_addr
  Driver RejectNegative Separate Alias(Zsegs_read_write_addr)
! -segs_read_write_addr address 	Allows specifying the address of the read/write portion of a dylib.
  
  single_module
  Driver RejectNegative Alias(Zsingle_module)
--- 326,340 ----
  
  segprot
  Driver RejectNegative Separate Args(3)
! -segprot <segname> <max_prot> <init_prot>	The virtual memory protections for segment <segname> have maximum and initial values <max_prot> and <init_prot> respectively.  The specified values may contain \"r\", \"w\", \"x\" or \"-\" the latter meaning \"no access\".
  
  segs_read_only_addr
  Driver RejectNegative Separate Alias(Zsegs_read_only_addr)
! -segs_read_only_addr <address>	Specify that <address> is the base address of the read-only segments of a dylib.
  
  segs_read_write_addr
  Driver RejectNegative Separate Alias(Zsegs_read_write_addr)
! -segs_read_write_addr <address>	Specify that <address> is the base address address of the read-write segments of a dylib.
  
  single_module
  Driver RejectNegative Alias(Zsingle_module)
*************** Driver RejectNegative Alias(Zsingle_modu
*** 342,360 ****
  
  sub_library
  Driver RejectNegative Separate
! -sub_library <name>	Library named \"name\" will be re-exported (only useful for dylibs).
  
  sub_umbrella
  Driver RejectNegative Separate
! -sub_umbrella <name>	Framework named \"name\" will be re-exported (only useful for dylibs).
  
  twolevel_namespace
  Driver RejectNegative
! This is the default
  
  twolevel_namespace_hints
  Driver RejectNegative
! Specifies content that can speed up dynamic loading when the binaries are unchanged.
  
  umbrella
  Driver RejectNegative Separate Alias(Zumbrella)
--- 342,360 ----
  
  sub_library
  Driver RejectNegative Separate
! -sub_library <name>	Library named <name> will be re-exported (only useful for dylibs).
  
  sub_umbrella
  Driver RejectNegative Separate
! -sub_umbrella <name>	Framework named <name> will be re-exported (only useful for dylibs).
  
  twolevel_namespace
  Driver RejectNegative
! This is the default.
  
  twolevel_namespace_hints
  Driver RejectNegative
! Add extra information to the executable that can speed up dynamic loading (provided that dependent libraries are unchanged).
  
  umbrella
  Driver RejectNegative Separate Alias(Zumbrella)
*************** Driver RejectNegative Separate
*** 366,372 ****
  
  unexported_symbols_list
  Driver RejectNegative Separate Alias(Zunexported_symbols_list)
! -unexported_symbols_list <filename>	Don't export global symbols listed in filename.
  
  weak_reference_mismatches
  Driver RejectNegative Separate Alias(Zweak_reference_mismatches)
--- 366,372 ----
  
  unexported_symbols_list
  Driver RejectNegative Separate Alias(Zunexported_symbols_list)
! -unexported_symbols_list <filename>	Do not export the global symbols listed in <filename>.
  
  weak_reference_mismatches
  Driver RejectNegative Separate Alias(Zweak_reference_mismatches)
*************** Driver RejectNegative Separate Alias(Zwe
*** 374,380 ****
  
  whatsloaded
  Driver RejectNegative
! Logs the object files the linker loads
  
  whyload
  Driver RejectNegative
--- 374,380 ----
  
  whatsloaded
  Driver RejectNegative
! Logs which object files the linker loads.
  
  whyload
  Driver RejectNegative
*************** Driver RejectNegative
*** 386,392 ****
  
  y
  Driver RejectNegative Joined
! (Obsolete, ignored)	Old support similar to whyload.
  
  Mach
  Driver RejectNegative
--- 386,392 ----
  
  y
  Driver RejectNegative Joined
! (Obsolete, ignored)	Old support similar to \"-whyload\".
  
  Mach
  Driver RejectNegative
diff -Nrcpad gcc-9.3.0/gcc/config/darwin10.h gcc-10.1.0/gcc/config/darwin10.h
*** gcc-9.3.0/gcc/config/darwin10.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/darwin10.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target definitions for Darwin (Mac OS X) systems.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by Jack Howarth <howarth@bromo.med.uc.edu>.
  
  This file is part of GCC.
--- 1,5 ----
  /* Target definitions for Darwin (Mac OS X) systems.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by Jack Howarth <howarth@bromo.med.uc.edu>.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/darwin12.h gcc-10.1.0/gcc/config/darwin12.h
*** gcc-9.3.0/gcc/config/darwin12.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/darwin12.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target definitions for Darwin (Mac OS X) systems.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by Jack Howarth <howarth.at.gcc@gmail.com>.
  
  This file is part of GCC.
--- 1,5 ----
  /* Target definitions for Darwin (Mac OS X) systems.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by Jack Howarth <howarth.at.gcc@gmail.com>.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/darwin9.h gcc-10.1.0/gcc/config/darwin9.h
*** gcc-9.3.0/gcc/config/darwin9.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/darwin9.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target definitions for Darwin (Mac OS X) systems.
!    Copyright (C) 2006-2019 Free Software Foundation, Inc.
     Contributed by Apple Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Target definitions for Darwin (Mac OS X) systems.
!    Copyright (C) 2006-2020 Free Software Foundation, Inc.
     Contributed by Apple Inc.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/dbx.h gcc-10.1.0/gcc/config/dbx.h
*** gcc-9.3.0/gcc/config/dbx.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/dbx.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Prefer DBX (stabs) debugging information.
!    Copyright (C) 1996-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Prefer DBX (stabs) debugging information.
!    Copyright (C) 1996-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/dbxcoff.h gcc-10.1.0/gcc/config/dbxcoff.h
*** gcc-9.3.0/gcc/config/dbxcoff.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/dbxcoff.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions needed when using stabs embedded in COFF sections.
!    Copyright (C) 1996-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions needed when using stabs embedded in COFF sections.
!    Copyright (C) 1996-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/dbxelf.h gcc-10.1.0/gcc/config/dbxelf.h
*** gcc-9.3.0/gcc/config/dbxelf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/dbxelf.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions needed when using stabs embedded in ELF sections.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions needed when using stabs embedded in ELF sections.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/default-c.c gcc-10.1.0/gcc/config/default-c.c
*** gcc-9.3.0/gcc/config/default-c.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/default-c.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Default C-family target hooks initializer.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Default C-family target hooks initializer.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/default-d.c gcc-10.1.0/gcc/config/default-d.c
*** gcc-9.3.0/gcc/config/default-d.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/default-d.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Default D language target hooks initializer.
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
  GCC is free software; you can redistribute it and/or modify it under
  the terms of the GNU General Public License as published by the Free
--- 1,5 ----
  /* Default D language target hooks initializer.
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
  GCC is free software; you can redistribute it and/or modify it under
  the terms of the GNU General Public License as published by the Free
diff -Nrcpad gcc-9.3.0/gcc/config/dragonfly-stdint.h gcc-10.1.0/gcc/config/dragonfly-stdint.h
*** gcc-9.3.0/gcc/config/dragonfly-stdint.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/dragonfly-stdint.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for <stdint.h> types for DragonFly systems.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
     Contributed by John Marino <gnugcc@marino.st>
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for <stdint.h> types for DragonFly systems.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
     Contributed by John Marino <gnugcc@marino.st>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/dragonfly.h gcc-10.1.0/gcc/config/dragonfly.h
*** gcc-9.3.0/gcc/config/dragonfly.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/dragonfly.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Base configuration file for all DragonFly targets.
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
     Contributed by John Marino <gnugcc@marino.st>
  
  This file is part of GCC.
--- 1,5 ----
  /* Base configuration file for all DragonFly targets.
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
     Contributed by John Marino <gnugcc@marino.st>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/dragonfly.opt gcc-10.1.0/gcc/config/dragonfly.opt
*** gcc-9.3.0/gcc/config/dragonfly.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/dragonfly.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; DragonFly BSD options.
  
! ; Copyright (C) 2014-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; DragonFly BSD options.
  
! ; Copyright (C) 2014-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/elfos.h gcc-10.1.0/gcc/config/elfos.h
*** gcc-9.3.0/gcc/config/elfos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/elfos.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* elfos.h  --  operating system specific defines to be used when
     targeting GCC for some generic ELF system
!    Copyright (C) 1991-2019 Free Software Foundation, Inc.
     Based on svr4.h contributed by Ron Guilmette (rfg@netcom.com).
  
  This file is part of GCC.
--- 1,6 ----
  /* elfos.h  --  operating system specific defines to be used when
     targeting GCC for some generic ELF system
!    Copyright (C) 1991-2020 Free Software Foundation, Inc.
     Based on svr4.h contributed by Ron Guilmette (rfg@netcom.com).
  
  This file is part of GCC.
*************** see the files COPYING3 and COPYING.RUNTI
*** 248,253 ****
--- 248,264 ----
      }					\
    while (0)
  
+ #define ASM_OUTPUT_SYMVER_DIRECTIVE(FILE, NAME, NAME2)		\
+   do								\
+     {								\
+       fputs ("\t.symver\t", (FILE));				\
+       assemble_name ((FILE), (NAME));				\
+       fputs (", ", (FILE));					\
+       assemble_name ((FILE), (NAME2));				\
+       fputc ('\n', (FILE));					\
+     }								\
+   while (0)
+ 
  /* The following macro defines the format used to output the second
     operand of the .type assembler directive.  Different svr4 assemblers
     expect various different forms for this operand.  The one given here
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/constraints.md gcc-10.1.0/gcc/config/epiphany/constraints.md
*** gcc-9.3.0/gcc/config/epiphany/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for Adaptiva epiphany
! ;; Copyright (C) 2007-2019 Free Software Foundation, Inc.
  ;; Contributed by Embecosm on behalf of Adapteva, Inc.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Constraint definitions for Adaptiva epiphany
! ;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
  ;; Contributed by Embecosm on behalf of Adapteva, Inc.
  
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/epiphany-modes.def gcc-10.1.0/gcc/config/epiphany/epiphany-modes.def
*** gcc-9.3.0/gcc/config/epiphany/epiphany-modes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/epiphany-modes.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, Adapteva Epiphany cpu.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, Adapteva Epiphany cpu.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/epiphany-protos.h gcc-10.1.0/gcc/config/epiphany/epiphany-protos.h
*** gcc-9.3.0/gcc/config/epiphany/epiphany-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/epiphany-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, EPIPHANY cpu.
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, EPIPHANY cpu.
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/epiphany-sched.md gcc-10.1.0/gcc/config/epiphany/epiphany-sched.md
*** gcc-9.3.0/gcc/config/epiphany/epiphany-sched.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/epiphany-sched.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; DFA scheduling description for EPIPHANY
! ;; Copyright (C) 2004-2019 Free Software Foundation, Inc.
  ;; Contributed by Embecosm on behalf of Adapteva, Inc.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; DFA scheduling description for EPIPHANY
! ;; Copyright (C) 2004-2020 Free Software Foundation, Inc.
  ;; Contributed by Embecosm on behalf of Adapteva, Inc.
  
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/epiphany.c gcc-10.1.0/gcc/config/epiphany/epiphany.c
*** gcc-9.3.0/gcc/config/epiphany/epiphany.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/epiphany.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines used for code generation on the EPIPHANY cpu.
!    Copyright (C) 1994-2019 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Subroutines used for code generation on the EPIPHANY cpu.
!    Copyright (C) 1994-2020 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
*************** static int get_epiphany_condition_code (
*** 71,78 ****
  static tree epiphany_handle_interrupt_attribute (tree *, tree, tree, int, bool *);
  static tree epiphany_handle_forwarder_attribute (tree *, tree, tree, int,
  						 bool *);
! static bool epiphany_pass_by_reference (cumulative_args_t, machine_mode,
! 					const_tree, bool);
  static rtx_insn *frame_insn (rtx);
  
  /* defines for the initialization of the GCC target structure.  */
--- 71,78 ----
  static tree epiphany_handle_interrupt_attribute (tree *, tree, tree, int, bool *);
  static tree epiphany_handle_forwarder_attribute (tree *, tree, tree, int,
  						 bool *);
! static bool epiphany_pass_by_reference (cumulative_args_t,
! 					const function_arg_info &);
  static rtx_insn *frame_insn (rtx);
  
  /* defines for the initialization of the GCC target structure.  */
*************** static rtx_insn *frame_insn (rtx);
*** 90,96 ****
  
  #define TARGET_RETURN_IN_MEMORY epiphany_return_in_memory
  #define TARGET_PASS_BY_REFERENCE epiphany_pass_by_reference
! #define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
  #define TARGET_FUNCTION_VALUE epiphany_function_value
  #define TARGET_LIBCALL_VALUE epiphany_libcall_value
  #define TARGET_FUNCTION_VALUE_REGNO_P epiphany_function_value_regno_p
--- 90,96 ----
  
  #define TARGET_RETURN_IN_MEMORY epiphany_return_in_memory
  #define TARGET_PASS_BY_REFERENCE epiphany_pass_by_reference
! #define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_arg_info_true
  #define TARGET_FUNCTION_VALUE epiphany_function_value
  #define TARGET_LIBCALL_VALUE epiphany_libcall_value
  #define TARGET_FUNCTION_VALUE_REGNO_P epiphany_function_value_regno_p
*************** epiphany_init_reg_tables (void)
*** 434,440 ****
  	epiphany_regno_reg_class[i] = LR_REGS;
        else if (i <= 7 && TARGET_PREFER_SHORT_INSN_REGS)
  	epiphany_regno_reg_class[i] = SHORT_INSN_REGS;
!       else if (call_used_regs[i]
  	       && TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i))
  	epiphany_regno_reg_class[i] = SIBCALL_REGS;
        else if (i >= CORE_CONTROL_FIRST && i <= CORE_CONTROL_LAST)
--- 434,440 ----
  	epiphany_regno_reg_class[i] = LR_REGS;
        else if (i <= 7 && TARGET_PREFER_SHORT_INSN_REGS)
  	epiphany_regno_reg_class[i] = SHORT_INSN_REGS;
!       else if (call_used_or_fixed_reg_p (i)
  	       && TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i))
  	epiphany_regno_reg_class[i] = SIBCALL_REGS;
        else if (i >= CORE_CONTROL_FIRST && i <= CORE_CONTROL_LAST)
*************** epiphany_function_arg_boundary (machine_
*** 711,734 ****
  /* Do any needed setup for a variadic function.  For the EPIPHANY, we
     actually emit the code in epiphany_expand_prologue.
  
!    CUM has not been updated for the last named argument which has type TYPE
!    and mode MODE, and we rely on this fact.  */
  
  
  static void
! epiphany_setup_incoming_varargs (cumulative_args_t cum, machine_mode mode,
! 				 tree type, int *pretend_size, int no_rtl)
  {
    int first_anon_arg;
    CUMULATIVE_ARGS next_cum;
    machine_function_t *mf = MACHINE_FUNCTION (cfun);
  
    /* All BLKmode values are passed by reference.  */
!   gcc_assert (mode != BLKmode);
  
    next_cum = *get_cumulative_args (cum);
!   next_cum
!     = ROUND_ADVANCE_CUM (next_cum, mode, type) + ROUND_ADVANCE_ARG (mode, type);
    first_anon_arg = next_cum;
  
    if (first_anon_arg < MAX_EPIPHANY_PARM_REGS && !no_rtl)
--- 711,735 ----
  /* Do any needed setup for a variadic function.  For the EPIPHANY, we
     actually emit the code in epiphany_expand_prologue.
  
!    CUM has not been updated for the last named argument (which is given
!    by ARG), and we rely on this fact.  */
  
  
  static void
! epiphany_setup_incoming_varargs (cumulative_args_t cum,
! 				 const function_arg_info &arg,
! 				 int *pretend_size, int no_rtl)
  {
    int first_anon_arg;
    CUMULATIVE_ARGS next_cum;
    machine_function_t *mf = MACHINE_FUNCTION (cfun);
  
    /* All BLKmode values are passed by reference.  */
!   gcc_assert (arg.mode != BLKmode);
  
    next_cum = *get_cumulative_args (cum);
!   next_cum = (ROUND_ADVANCE_CUM (next_cum, arg.mode, arg.type)
! 	      + ROUND_ADVANCE_ARG (arg.mode, arg.type));
    first_anon_arg = next_cum;
  
    if (first_anon_arg < MAX_EPIPHANY_PARM_REGS && !no_rtl)
*************** epiphany_setup_incoming_varargs (cumulat
*** 744,761 ****
  }
  
  static int
! epiphany_arg_partial_bytes (cumulative_args_t cum, machine_mode mode,
! 			    tree type, bool named ATTRIBUTE_UNUSED)
  {
    int words = 0, rounded_cum;
  
!   gcc_assert (!epiphany_pass_by_reference (cum, mode, type, /* named */ true));
  
!   rounded_cum = ROUND_ADVANCE_CUM (*get_cumulative_args (cum), mode, type);
    if (rounded_cum < MAX_EPIPHANY_PARM_REGS)
      {
        words = MAX_EPIPHANY_PARM_REGS - rounded_cum;
!       if (words >= ROUND_ADVANCE_ARG (mode, type))
  	words = 0;
      }
    return words * UNITS_PER_WORD;
--- 745,763 ----
  }
  
  static int
! epiphany_arg_partial_bytes (cumulative_args_t cum,
! 			    const function_arg_info &arg)
  {
    int words = 0, rounded_cum;
  
!   gcc_assert (!epiphany_pass_by_reference (cum, arg));
  
!   rounded_cum = ROUND_ADVANCE_CUM (*get_cumulative_args (cum),
! 				   arg.mode, arg.type);
    if (rounded_cum < MAX_EPIPHANY_PARM_REGS)
      {
        words = MAX_EPIPHANY_PARM_REGS - rounded_cum;
!       if (words >= ROUND_ADVANCE_ARG (arg.mode, arg.type))
  	words = 0;
      }
    return words * UNITS_PER_WORD;
*************** epiphany_compute_function_type (tree dec
*** 1064,1071 ****
  #define MUST_SAVE_REGISTER(regno, interrupt_p) \
    ((df_regs_ever_live_p (regno) \
      || (interrupt_p && !crtl->is_leaf \
! 	&& call_used_regs[regno] && !fixed_regs[regno])) \
!    && (!call_used_regs[regno] || regno == GPR_LR \
         || (interrupt_p && regno != GPR_SP)))
  
  #define MUST_SAVE_RETURN_ADDR 0
--- 1066,1073 ----
  #define MUST_SAVE_REGISTER(regno, interrupt_p) \
    ((df_regs_ever_live_p (regno) \
      || (interrupt_p && !crtl->is_leaf \
! 	&& call_used_or_fixed_reg_p (regno) && !fixed_regs[regno])) \
!    && (!call_used_or_fixed_reg_p (regno) || regno == GPR_LR \
         || (interrupt_p && regno != GPR_SP)))
  
  #define MUST_SAVE_RETURN_ADDR 0
*************** epiphany_compute_frame_size (int size /*
*** 1246,1252 ****
    current_frame_info.var_size     = var_size;
    current_frame_info.args_size    = args_size;
    current_frame_info.reg_size	  = reg_size;
!   COPY_HARD_REG_SET (current_frame_info.gmask, gmask);
    current_frame_info.first_slot		= first_slot;
    current_frame_info.last_slot		= last_slot;
    current_frame_info.first_slot_offset	= first_slot_offset;
--- 1248,1254 ----
    current_frame_info.var_size     = var_size;
    current_frame_info.args_size    = args_size;
    current_frame_info.reg_size	  = reg_size;
!   current_frame_info.gmask	  = gmask;
    current_frame_info.first_slot		= first_slot;
    current_frame_info.last_slot		= last_slot;
    current_frame_info.first_slot_offset	= first_slot_offset;
*************** epiphany_return_in_memory (const_tree ty
*** 1485,1498 ****
     passed by reference.  */
  
  static bool
! epiphany_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED,
! 		       machine_mode mode, const_tree type,
! 		       bool named ATTRIBUTE_UNUSED)
  {
!   if (type)
      {
        if (AGGREGATE_TYPE_P (type)
! 	  && (mode == BLKmode || TYPE_NEEDS_CONSTRUCTING (type)))
  	return true;
      }
    return false;
--- 1487,1498 ----
     passed by reference.  */
  
  static bool
! epiphany_pass_by_reference (cumulative_args_t, const function_arg_info &arg)
  {
!   if (tree type = arg.type)
      {
        if (AGGREGATE_TYPE_P (type)
! 	  && (arg.mode == BLKmode || TYPE_NEEDS_CONSTRUCTING (type)))
  	return true;
      }
    return false;
*************** epiphany_conditional_register_usage (voi
*** 2240,2249 ****
      }
    if (!TARGET_PREFER_SHORT_INSN_REGS)
      CLEAR_HARD_REG_SET (reg_class_contents[SHORT_INSN_REGS]);
!   COPY_HARD_REG_SET (reg_class_contents[SIBCALL_REGS],
! 		     reg_class_contents[GENERAL_REGS]);
    /* It would be simpler and quicker if we could just use
!      AND_COMPL_HARD_REG_SET, alas, call_used_reg_set is yet uninitialized;
       it is set up later by our caller.  */
    for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
      if (!call_used_regs[i])
--- 2240,2248 ----
      }
    if (!TARGET_PREFER_SHORT_INSN_REGS)
      CLEAR_HARD_REG_SET (reg_class_contents[SHORT_INSN_REGS]);
!   reg_class_contents[SIBCALL_REGS] = reg_class_contents[GENERAL_REGS];
    /* It would be simpler and quicker if we could just use
!      &~, alas, call_used_or_fixed_regs is yet uninitialized;
       it is set up later by our caller.  */
    for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
      if (!call_used_regs[i])
*************** epiphany_conditional_register_usage (voi
*** 2254,2290 ****
     Value is zero to push the argument on the stack,
     or a hard register in which to store the argument.
  
-    MODE is the argument's machine mode.
-    TYPE is the data type of the argument (as a tree).
-     This is null for libcalls where that information may
-     not be available.
     CUM is a variable of type CUMULATIVE_ARGS which gives info about
      the preceding args and about the function being called.
!    NAMED is nonzero if this argument is a named parameter
!     (otherwise it is an extra parameter matching an ellipsis).  */
  /* On the EPIPHANY the first MAX_EPIPHANY_PARM_REGS args are normally in
     registers and the rest are pushed.  */
  static rtx
! epiphany_function_arg (cumulative_args_t cum_v, machine_mode mode,
! 		       const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS cum = *get_cumulative_args (cum_v);
  
!   if (PASS_IN_REG_P (cum, mode, type))
!     return gen_rtx_REG (mode, ROUND_ADVANCE_CUM (cum, mode, type));
    return 0;
  }
  
! /* Update the data in CUM to advance over an argument
!    of mode MODE and data type TYPE.
!    (TYPE is null for libcalls where that information may not be available.)  */
  static void
! epiphany_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
! 			       const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
!   *cum = ROUND_ADVANCE_CUM (*cum, mode, type) + ROUND_ADVANCE_ARG (mode, type);
  }
  
  /* Nested function support.
--- 2253,2282 ----
     Value is zero to push the argument on the stack,
     or a hard register in which to store the argument.
  
     CUM is a variable of type CUMULATIVE_ARGS which gives info about
      the preceding args and about the function being called.
!    ARG is a description of the argument.  */
  /* On the EPIPHANY the first MAX_EPIPHANY_PARM_REGS args are normally in
     registers and the rest are pushed.  */
  static rtx
! epiphany_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS cum = *get_cumulative_args (cum_v);
  
!   if (PASS_IN_REG_P (cum, arg.mode, arg.type))
!     return gen_rtx_REG (arg.mode, ROUND_ADVANCE_CUM (cum, arg.mode, arg.type));
    return 0;
  }
  
! /* Update the data in CUM to advance over argument ARG.  */
  static void
! epiphany_function_arg_advance (cumulative_args_t cum_v,
! 			       const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
!   *cum = (ROUND_ADVANCE_CUM (*cum, arg.mode, arg.type)
! 	  + ROUND_ADVANCE_ARG (arg.mode, arg.type));
  }
  
  /* Nested function support.
*************** epiphany_output_mi_thunk (FILE *file, tr
*** 2892,2905 ****
  			  HOST_WIDE_INT vcall_offset,
  			  tree function)
  {
    int this_regno
      = aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function) ? 1 : 0;
    const char *this_name = reg_names[this_regno];
    const char *fname;
  
    /* We use IP and R16 as a scratch registers.  */
!   gcc_assert (call_used_regs [GPR_IP]);
!   gcc_assert (call_used_regs [GPR_16]);
  
    /* Add DELTA.  When possible use a plain add, otherwise load it into
       a register first. */
--- 2884,2899 ----
  			  HOST_WIDE_INT vcall_offset,
  			  tree function)
  {
+   const char *fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunk));
    int this_regno
      = aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function) ? 1 : 0;
    const char *this_name = reg_names[this_regno];
    const char *fname;
  
+   assemble_start_function (thunk, fnname);
    /* We use IP and R16 as a scratch registers.  */
!   gcc_assert (call_used_or_fixed_reg_p (GPR_IP));
!   gcc_assert (call_used_or_fixed_reg_p (GPR_16));
  
    /* Add DELTA.  When possible use a plain add, otherwise load it into
       a register first. */
*************** epiphany_output_mi_thunk (FILE *file, tr
*** 2954,2959 ****
--- 2948,2954 ----
        assemble_name (file, fname);
        fputc ('\n', file);
      }
+   assemble_end_function (thunk, fnname);
  }
  
  void
*************** epiphany_start_function (FILE *file, con
*** 3004,3010 ****
  	    fputs ("\tstrd r0,[sp,-1]\n", file);
  	  else
  	    tmp = GPR_16;
! 	  gcc_assert (call_used_regs[tmp]);
  	  fprintf (file, "\tmov r%d,%%low(", tmp);
  	  assemble_name (file, dst_name);
  	  fprintf (file, ")\n"
--- 2999,3005 ----
  	    fputs ("\tstrd r0,[sp,-1]\n", file);
  	  else
  	    tmp = GPR_16;
! 	  gcc_assert (call_used_or_fixed_reg_p (tmp));
  	  fprintf (file, "\tmov r%d,%%low(", tmp);
  	  assemble_name (file, dst_name);
  	  fprintf (file, ")\n"
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/epiphany.h gcc-10.1.0/gcc/config/epiphany/epiphany.h
*** gcc-9.3.0/gcc/config/epiphany/epiphany.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/epiphany.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler, Argonaut EPIPHANY cpu.
!    Copyright (C) 1994-2019 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions of target machine for GNU compiler, Argonaut EPIPHANY cpu.
!    Copyright (C) 1994-2020 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/epiphany.md gcc-10.1.0/gcc/config/epiphany/epiphany.md
*** gcc-9.3.0/gcc/config/epiphany/epiphany.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/epiphany.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description of the Adaptiva epiphany cpu for GNU C compiler
! ;; Copyright (C) 1994-2019 Free Software Foundation, Inc.
  ;; Contributed by Embecosm on behalf of Adapteva, Inc.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Machine description of the Adaptiva epiphany cpu for GNU C compiler
! ;; Copyright (C) 1994-2020 Free Software Foundation, Inc.
  ;; Contributed by Embecosm on behalf of Adapteva, Inc.
  
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/epiphany.opt gcc-10.1.0/gcc/config/epiphany/epiphany.opt
*** gcc-9.3.0/gcc/config/epiphany/epiphany.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/epiphany.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the Adapteva EPIPHANY port of the compiler
  ;
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ; Contributed by Embecosm on behalf of Adapteva, Inc.
  ;
  ; This file is part of GCC.
--- 1,6 ----
  ; Options for the Adapteva EPIPHANY port of the compiler
  ;
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ; Contributed by Embecosm on behalf of Adapteva, Inc.
  ;
  ; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/epiphany_intrinsics.h gcc-10.1.0/gcc/config/epiphany/epiphany_intrinsics.h
*** gcc-9.3.0/gcc/config/epiphany/epiphany_intrinsics.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/epiphany_intrinsics.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Epiphany intrinsic functions
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Epiphany intrinsic functions
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/mode-switch-use.c gcc-10.1.0/gcc/config/epiphany/mode-switch-use.c
*** gcc-9.3.0/gcc/config/epiphany/mode-switch-use.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/mode-switch-use.c	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Insert USEs in instructions that require mode switching.
     This should probably be merged into mode-switching.c .
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
--- 1,6 ----
  /* Insert USEs in instructions that require mode switching.
     This should probably be merged into mode-switching.c .
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/predicates.md gcc-10.1.0/gcc/config/epiphany/predicates.md
*** gcc-9.3.0/gcc/config/epiphany/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicate definitions for code generation on the EPIPHANY cpu.
! ;; Copyright (C) 1994-2019 Free Software Foundation, Inc.
  ;; Contributed by Embecosm on behalf of Adapteva, Inc.
  ;;
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Predicate definitions for code generation on the EPIPHANY cpu.
! ;; Copyright (C) 1994-2020 Free Software Foundation, Inc.
  ;; Contributed by Embecosm on behalf of Adapteva, Inc.
  ;;
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/resolve-sw-modes.c gcc-10.1.0/gcc/config/epiphany/resolve-sw-modes.c
*** gcc-9.3.0/gcc/config/epiphany/resolve-sw-modes.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/resolve-sw-modes.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Mode switching cleanup pass for the EPIPHANY cpu.
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Mode switching cleanup pass for the EPIPHANY cpu.
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
     Contributed by Embecosm on behalf of Adapteva, Inc.
  
  This file is part of GCC.
*************** pass_resolve_sw_modes::execute (function
*** 167,173 ****
  	    }
  	  start_sequence ();
  	  emit_set_fp_mode (EPIPHANY_MSW_ENTITY_ROUND_UNKNOWN,
! 			    jilted_mode, FP_MODE_NONE, NULL);
  	  seq = get_insns ();
  	  end_sequence ();
  	  need_commit = true;
--- 167,174 ----
  	    }
  	  start_sequence ();
  	  emit_set_fp_mode (EPIPHANY_MSW_ENTITY_ROUND_UNKNOWN,
! 			    jilted_mode, FP_MODE_NONE,
! 			    reg_class_contents[NO_REGS]);
  	  seq = get_insns ();
  	  end_sequence ();
  	  need_commit = true;
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/rtems.h gcc-10.1.0/gcc/config/epiphany/rtems.h
*** gcc-9.3.0/gcc/config/epiphany/rtems.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/rtems.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for RTEMS based EPIPHANY systems.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for RTEMS based EPIPHANY systems.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/epiphany/t-epiphany gcc-10.1.0/gcc/config/epiphany/t-epiphany
*** gcc-9.3.0/gcc/config/epiphany/t-epiphany	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/epiphany/t-epiphany	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 1997-2019 Free Software Foundation, Inc.
  # Contributed by Embecosm on behalf of Adapteva, Inc.
  #
  # This file is part of GCC.
--- 1,4 ----
! # Copyright (C) 1997-2020 Free Software Foundation, Inc.
  # Contributed by Embecosm on behalf of Adapteva, Inc.
  #
  # This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/flat.h gcc-10.1.0/gcc/config/flat.h
*** gcc-9.3.0/gcc/config/flat.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/flat.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Defines to be used for targets that support flat executables.
!    Copyright (C) 2006-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Defines to be used for targets that support flat executables.
!    Copyright (C) 2006-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/fr30/constraints.md gcc-10.1.0/gcc/config/fr30/constraints.md
*** gcc-9.3.0/gcc/config/fr30/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/fr30/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for the FR30.
! ;; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
  ;; This file is part of GCC.
  
--- 1,5 ----
  ;; Constraint definitions for the FR30.
! ;; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
  ;; This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/fr30/fr30-protos.h gcc-10.1.0/gcc/config/fr30/fr30-protos.h
*** gcc-9.3.0/gcc/config/fr30/fr30-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/fr30/fr30-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Prototypes for fr30.c functions used in the md file & elsewhere.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Prototypes for fr30.c functions used in the md file & elsewhere.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/fr30/fr30.c gcc-10.1.0/gcc/config/fr30/fr30.c
*** gcc-9.3.0/gcc/config/fr30/fr30.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/fr30/fr30.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* FR30 specific functions.
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
     Contributed by Cygnus Solutions.
  
     This file is part of GCC.
--- 1,5 ----
  /* FR30 specific functions.
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
     Contributed by Cygnus Solutions.
  
     This file is part of GCC.
***************
*** 39,44 ****
--- 39,45 ----
  #include "output.h"
  #include "expr.h"
  #include "builtins.h"
+ #include "calls.h"
  
  /* This file should be included last.  */
  #include "target-def.h"
*************** static struct fr30_frame_info 	current_f
*** 112,126 ****
  /* Zero structure to initialize current_frame_info.  */
  static struct fr30_frame_info 	zero_frame_info;
  
! static void fr30_setup_incoming_varargs (cumulative_args_t, machine_mode,
! 					 tree, int *, int);
! static bool fr30_must_pass_in_stack (machine_mode, const_tree);
! static int fr30_arg_partial_bytes (cumulative_args_t, machine_mode,
! 				   tree, bool);
! static rtx fr30_function_arg (cumulative_args_t, machine_mode,
! 			      const_tree, bool);
! static void fr30_function_arg_advance (cumulative_args_t, machine_mode,
! 				       const_tree, bool);
  static bool fr30_frame_pointer_required (void);
  static rtx fr30_function_value (const_tree, const_tree, bool);
  static rtx fr30_libcall_value (machine_mode, const_rtx);
--- 113,127 ----
  /* Zero structure to initialize current_frame_info.  */
  static struct fr30_frame_info 	zero_frame_info;
  
! static void fr30_setup_incoming_varargs (cumulative_args_t,
! 					 const function_arg_info &,
! 					 int *, int);
! static bool fr30_must_pass_in_stack (const function_arg_info &);
! static int fr30_arg_partial_bytes (cumulative_args_t,
! 				   const function_arg_info &);
! static rtx fr30_function_arg (cumulative_args_t, const function_arg_info &);
! static void fr30_function_arg_advance (cumulative_args_t,
! 				       const function_arg_info &);
  static bool fr30_frame_pointer_required (void);
  static rtx fr30_function_value (const_tree, const_tree, bool);
  static rtx fr30_libcall_value (machine_mode, const_rtx);
*************** static bool fr30_function_value_regno_p
*** 128,134 ****
  static bool fr30_can_eliminate (const int, const int);
  static void fr30_asm_trampoline_template (FILE *);
  static void fr30_trampoline_init (rtx, tree, rtx);
! static int fr30_num_arg_regs (machine_mode, const_tree);
  
  #define FRAME_POINTER_MASK 	(1 << (FRAME_POINTER_REGNUM))
  #define RETURN_POINTER_MASK 	(1 << (RETURN_POINTER_REGNUM))
--- 129,135 ----
  static bool fr30_can_eliminate (const int, const int);
  static void fr30_asm_trampoline_template (FILE *);
  static void fr30_trampoline_init (rtx, tree, rtx);
! static int fr30_num_arg_regs (const function_arg_info &);
  
  #define FRAME_POINTER_MASK 	(1 << (FRAME_POINTER_REGNUM))
  #define RETURN_POINTER_MASK 	(1 << (RETURN_POINTER_REGNUM))
*************** static int fr30_num_arg_regs (machine_mo
*** 140,146 ****
    (   (regno) != RETURN_POINTER_REGNUM \
     && (regno) != FRAME_POINTER_REGNUM  \
     && df_regs_ever_live_p (regno)      \
!    && ! call_used_regs [regno]         )
  
  #define MUST_SAVE_FRAME_POINTER	 (df_regs_ever_live_p (FRAME_POINTER_REGNUM)  || frame_pointer_needed)
  #define MUST_SAVE_RETURN_POINTER (df_regs_ever_live_p (RETURN_POINTER_REGNUM) || crtl->profile)
--- 141,147 ----
    (   (regno) != RETURN_POINTER_REGNUM \
     && (regno) != FRAME_POINTER_REGNUM  \
     && df_regs_ever_live_p (regno)      \
!    && ! call_used_or_fixed_reg_p (regno))
  
  #define MUST_SAVE_FRAME_POINTER	 (df_regs_ever_live_p (FRAME_POINTER_REGNUM)  || frame_pointer_needed)
  #define MUST_SAVE_RETURN_POINTER (df_regs_ever_live_p (RETURN_POINTER_REGNUM) || crtl->profile)
*************** fr30_expand_epilogue (void)
*** 458,469 ****
     named argument, from registers into memory.  * copying actually done in
     fr30_expand_prologue().
  
!    ARG_REGS_USED_SO_FAR has *not* been updated for the last named argument
!    which has type TYPE and mode MODE, and we rely on this fact.  */
  void
  fr30_setup_incoming_varargs (cumulative_args_t arg_regs_used_so_far_v,
! 			     machine_mode mode,
! 			     tree type ATTRIBUTE_UNUSED,
  			     int *pretend_size,
  			     int second_time ATTRIBUTE_UNUSED)
  {
--- 459,469 ----
     named argument, from registers into memory.  * copying actually done in
     fr30_expand_prologue().
  
!    CUM has not been updated for the last named argument which has type TYPE
!    and mode MODE, and we rely on this fact.  */
  void
  fr30_setup_incoming_varargs (cumulative_args_t arg_regs_used_so_far_v,
! 			     const function_arg_info &arg,
  			     int *pretend_size,
  			     int second_time ATTRIBUTE_UNUSED)
  {
*************** fr30_setup_incoming_varargs (cumulative_
*** 472,478 ****
    int size;
  
    /* All BLKmode values are passed by reference.  */
!   gcc_assert (mode != BLKmode);
  
    /* ??? This run-time test as well as the code inside the if
       statement is probably unnecessary.  */
--- 472,478 ----
    int size;
  
    /* All BLKmode values are passed by reference.  */
!   gcc_assert (arg.mode != BLKmode);
  
    /* ??? This run-time test as well as the code inside the if
       statement is probably unnecessary.  */
*************** fr30_setup_incoming_varargs (cumulative_
*** 480,486 ****
      /* If TARGET_STRICT_ARGUMENT_NAMING returns true, then the last named
         arg must not be treated as an anonymous arg.  */
      /* ??? This is a pointer increment, which makes no sense.  */
!     arg_regs_used_so_far += fr30_num_arg_regs (mode, type);
  
    size = FR30_NUM_ARG_REGS - (* arg_regs_used_so_far);
  
--- 480,486 ----
      /* If TARGET_STRICT_ARGUMENT_NAMING returns true, then the last named
         arg must not be treated as an anonymous arg.  */
      /* ??? This is a pointer increment, which makes no sense.  */
!     arg_regs_used_so_far += fr30_num_arg_regs (arg);
  
    size = FR30_NUM_ARG_REGS - (* arg_regs_used_so_far);
  
*************** fr30_function_value_regno_p (const unsig
*** 743,792 ****
     in registers.  */
  
  static bool
! fr30_must_pass_in_stack (machine_mode mode, const_tree type)
  {
!   if (mode == BLKmode)
!     return true;
!   if (type == NULL)
!     return false;
!   return AGGREGATE_TYPE_P (type);
  }
  
! /* Compute the number of word sized registers needed to hold a
!    function argument of mode INT_MODE and tree type TYPE.  */
  static int
! fr30_num_arg_regs (machine_mode mode, const_tree type)
  {
!   int size;
! 
!   if (targetm.calls.must_pass_in_stack (mode, type))
      return 0;
  
!   if (type && mode == BLKmode)
!     size = int_size_in_bytes (type);
!   else
!     size = GET_MODE_SIZE (mode);
! 
    return (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
  }
  
! /* Returns the number of bytes in which *part* of a parameter of machine
!    mode MODE and tree type TYPE (which may be NULL if the type is not known).
!    If the argument fits entirely in the argument registers, or entirely on
!    the stack, then 0 is returned.
!    CUM is the number of argument registers already used by earlier
!    parameters to the function.  */
  
  static int
! fr30_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode,
! 			tree type, bool named)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
    /* Unnamed arguments, i.e. those that are prototyped as ...
       are always passed on the stack.
       Also check here to see if all the argument registers are full.  */
!   if (named == 0 || *cum >= FR30_NUM_ARG_REGS)
      return 0;
  
    /* Work out how many argument registers would be needed if this
--- 743,779 ----
     in registers.  */
  
  static bool
! fr30_must_pass_in_stack (const function_arg_info &arg)
  {
!   return arg.mode == BLKmode || arg.aggregate_type_p ();
  }
  
! /* Compute the number of word sized registers needed to hold function
!    argument ARG.  */
  static int
! fr30_num_arg_regs (const function_arg_info &arg)
  {
!   if (targetm.calls.must_pass_in_stack (arg))
      return 0;
  
!   int size = arg.promoted_size_in_bytes ();
    return (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
  }
  
! /* Returns the number of bytes of argument registers required to hold *part*
!    of argument ARG.  If the argument fits entirely in the argument registers,
!    or entirely on the stack, then 0 is returned.  CUM is the number of
!    argument registers already used by earlier parameters to the function.  */
  
  static int
! fr30_arg_partial_bytes (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
    /* Unnamed arguments, i.e. those that are prototyped as ...
       are always passed on the stack.
       Also check here to see if all the argument registers are full.  */
!   if (!arg.named || *cum >= FR30_NUM_ARG_REGS)
      return 0;
  
    /* Work out how many argument registers would be needed if this
*************** fr30_arg_partial_bytes (cumulative_args_
*** 794,833 ****
       are sufficient argument registers available (or if no registers
       are needed because the parameter must be passed on the stack)
       then return zero, as this parameter does not require partial
!      register, partial stack stack space.  */
!   if (*cum + fr30_num_arg_regs (mode, type) <= FR30_NUM_ARG_REGS)
      return 0;
    
    return (FR30_NUM_ARG_REGS - *cum) * UNITS_PER_WORD;
  }
  
  static rtx
! fr30_function_arg (cumulative_args_t cum_v, machine_mode mode,
! 		   const_tree type, bool named)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
!   if (!named
!       || fr30_must_pass_in_stack (mode, type)
        || *cum >= FR30_NUM_ARG_REGS)
      return NULL_RTX;
    else
!     return gen_rtx_REG (mode, *cum + FIRST_ARG_REGNUM);
  }
  
! /* A C statement (sans semicolon) to update the summarizer variable CUM to
!    advance past an argument in the argument list.  The values MODE, TYPE and
!    NAMED describe that argument.  Once this is done, the variable CUM is
!    suitable for analyzing the *following* argument with `FUNCTION_ARG', etc.
! 
!    This macro need not do anything if the argument in question was passed on
!    the stack.  The compiler knows how to track the amount of stack space used
!    for arguments without any special help.  */
  static void
! fr30_function_arg_advance (cumulative_args_t cum, machine_mode mode,
! 			   const_tree type, bool named)
  {
!   *get_cumulative_args (cum) += named * fr30_num_arg_regs (mode, type);
  }
  
  /*}}}*/
--- 781,813 ----
       are sufficient argument registers available (or if no registers
       are needed because the parameter must be passed on the stack)
       then return zero, as this parameter does not require partial
!      register, partial stack space.  */
!   if (*cum + fr30_num_arg_regs (arg) <= FR30_NUM_ARG_REGS)
      return 0;
    
    return (FR30_NUM_ARG_REGS - *cum) * UNITS_PER_WORD;
  }
  
  static rtx
! fr30_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
!   if (!arg.named
!       || fr30_must_pass_in_stack (arg)
        || *cum >= FR30_NUM_ARG_REGS)
      return NULL_RTX;
    else
!     return gen_rtx_REG (arg.mode, *cum + FIRST_ARG_REGNUM);
  }
  
! /* Implement TARGET_FUNCTION_ARG_ADVANCE.  */
  static void
! fr30_function_arg_advance (cumulative_args_t cum,
! 			   const function_arg_info &arg)
  {
!   if (arg.named)
!     *get_cumulative_args (cum) += fr30_num_arg_regs (arg);
  }
  
  /*}}}*/
diff -Nrcpad gcc-9.3.0/gcc/config/fr30/fr30.h gcc-10.1.0/gcc/config/fr30/fr30.h
*** gcc-9.3.0/gcc/config/fr30/fr30.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/fr30/fr30.h	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /*{{{  Comment.  */ 
  
  /* Definitions of FR30 target. 
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
     Contributed by Cygnus Solutions.
  
  This file is part of GCC.
--- 1,7 ----
  /*{{{  Comment.  */ 
  
  /* Definitions of FR30 target. 
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
     Contributed by Cygnus Solutions.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/fr30/fr30.md gcc-10.1.0/gcc/config/fr30/fr30.md
*** gcc-9.3.0/gcc/config/fr30/fr30.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/fr30/fr30.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; FR30 machine description.
! ;; Copyright (C) 1998-2019 Free Software Foundation, Inc.
  ;; Contributed by Cygnus Solutions.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; FR30 machine description.
! ;; Copyright (C) 1998-2020 Free Software Foundation, Inc.
  ;; Contributed by Cygnus Solutions.
  
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/fr30/fr30.opt gcc-10.1.0/gcc/config/fr30/fr30.opt
*** gcc-9.3.0/gcc/config/fr30/fr30.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/fr30/fr30.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the FR30 port of the compiler.
  
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for the FR30 port of the compiler.
  
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/fr30/predicates.md gcc-10.1.0/gcc/config/fr30/predicates.md
*** gcc-9.3.0/gcc/config/fr30/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/fr30/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicate definitions for FR30.
! ;; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Predicate definitions for FR30.
! ;; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/freebsd-nthr.h gcc-10.1.0/gcc/config/freebsd-nthr.h
*** gcc-9.3.0/gcc/config/freebsd-nthr.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/freebsd-nthr.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* FreeBSD configuration setting for FreeBSD systems.
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
     Contributed by Loren J. Rittle <ljrittle@acm.org>
  
  This file is part of GCC.
--- 1,5 ----
  /* FreeBSD configuration setting for FreeBSD systems.
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
     Contributed by Loren J. Rittle <ljrittle@acm.org>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/freebsd-spec.h gcc-10.1.0/gcc/config/freebsd-spec.h
*** gcc-9.3.0/gcc/config/freebsd-spec.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/freebsd-spec.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Base configuration file for all FreeBSD targets.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Base configuration file for all FreeBSD targets.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/freebsd-stdint.h gcc-10.1.0/gcc/config/freebsd-stdint.h
*** gcc-9.3.0/gcc/config/freebsd-stdint.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/freebsd-stdint.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for <stdint.h> types for FreeBSD systems.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by Gerald Pfeifer <gerald@pfeifer.com>.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for <stdint.h> types for FreeBSD systems.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by Gerald Pfeifer <gerald@pfeifer.com>.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/freebsd.h gcc-10.1.0/gcc/config/freebsd.h
*** gcc-9.3.0/gcc/config/freebsd.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/freebsd.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Base configuration file for all FreeBSD targets.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Base configuration file for all FreeBSD targets.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/freebsd.opt gcc-10.1.0/gcc/config/freebsd.opt
*** gcc-9.3.0/gcc/config/freebsd.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/freebsd.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; FreeBSD options.
  
! ; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; FreeBSD options.
  
! ; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/frv/constraints.md gcc-10.1.0/gcc/config/frv/constraints.md
*** gcc-9.3.0/gcc/config/frv/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/frv/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for FRV.
! ;; Copyright (C) 2001-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Constraint definitions for FRV.
! ;; Copyright (C) 2001-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/frv/frv-asm.h gcc-10.1.0/gcc/config/frv/frv-asm.h
*** gcc-9.3.0/gcc/config/frv/frv-asm.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/frv/frv-asm.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Assembler Support.
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
     Contributed by Red Hat, Inc.
  
     This file is part of GCC.
--- 1,5 ----
  /* Assembler Support.
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
     Contributed by Red Hat, Inc.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/frv/frv-modes.def gcc-10.1.0/gcc/config/frv/frv-modes.def
*** gcc-9.3.0/gcc/config/frv/frv-modes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/frv/frv-modes.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GNU compiler for FRV.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions of target machine for GNU compiler for FRV.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/frv/frv-opts.h gcc-10.1.0/gcc/config/frv/frv-opts.h
*** gcc-9.3.0/gcc/config/frv/frv-opts.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/frv/frv-opts.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Frv option-handling defitions.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Frv option-handling defitions.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/frv/frv-protos.h gcc-10.1.0/gcc/config/frv/frv-protos.h
*** gcc-9.3.0/gcc/config/frv/frv-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/frv/frv-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Frv prototypes.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
     Contributed by Red Hat, Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Frv prototypes.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
     Contributed by Red Hat, Inc.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/frv/frv.c gcc-10.1.0/gcc/config/frv/frv.c
*** gcc-9.3.0/gcc/config/frv/frv.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/frv/frv.c	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 1997-2019 Free Software Foundation, Inc.
     Contributed by Red Hat, Inc.
  
  This file is part of GCC.
--- 1,4 ----
! /* Copyright (C) 1997-2020 Free Software Foundation, Inc.
     Contributed by Red Hat, Inc.
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 49,54 ****
--- 49,55 ----
  #include "builtins.h"
  #include "ifcvt.h"
  #include "rtl-iter.h"
+ #include "calls.h"
  
  /* This file should be included last.  */
  #include "target-def.h"
*************** static bool frv_in_small_data_p			(const
*** 358,365 ****
  static void frv_asm_output_mi_thunk
    (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
  static void frv_setup_incoming_varargs		(cumulative_args_t,
! 						 machine_mode,
! 						 tree, int *, int);
  static rtx frv_expand_builtin_saveregs		(void);
  static void frv_expand_builtin_va_start		(tree, rtx);
  static bool frv_rtx_costs			(rtx, machine_mode, int, int,
--- 359,366 ----
  static void frv_asm_output_mi_thunk
    (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
  static void frv_setup_incoming_varargs		(cumulative_args_t,
! 						 const function_arg_info &,
! 						 int *, int);
  static rtx frv_expand_builtin_saveregs		(void);
  static void frv_expand_builtin_va_start		(tree, rtx);
  static bool frv_rtx_costs			(rtx, machine_mode, int, int,
*************** static void frv_output_const_unspec		(FI
*** 378,392 ****
  						 const struct frv_unspec *);
  static bool frv_function_ok_for_sibcall		(tree, tree);
  static rtx frv_struct_value_rtx			(tree, int);
! static bool frv_must_pass_in_stack (machine_mode mode, const_tree type);
! static int frv_arg_partial_bytes (cumulative_args_t, machine_mode,
! 				  tree, bool);
! static rtx frv_function_arg (cumulative_args_t, machine_mode,
! 			     const_tree, bool);
! static rtx frv_function_incoming_arg (cumulative_args_t, machine_mode,
! 				      const_tree, bool);
! static void frv_function_arg_advance (cumulative_args_t, machine_mode,
! 				       const_tree, bool);
  static unsigned int frv_function_arg_boundary	(machine_mode,
  						 const_tree);
  static void frv_output_dwarf_dtprel		(FILE *, int, rtx)
--- 379,392 ----
  						 const struct frv_unspec *);
  static bool frv_function_ok_for_sibcall		(tree, tree);
  static rtx frv_struct_value_rtx			(tree, int);
! static bool frv_must_pass_in_stack (const function_arg_info &);
! static int frv_arg_partial_bytes (cumulative_args_t,
! 				  const function_arg_info &);
! static rtx frv_function_arg (cumulative_args_t, const function_arg_info &);
! static rtx frv_function_incoming_arg (cumulative_args_t,
! 				      const function_arg_info &);
! static void frv_function_arg_advance (cumulative_args_t,
! 				      const function_arg_info &);
  static unsigned int frv_function_arg_boundary	(machine_mode,
  						 const_tree);
  static void frv_output_dwarf_dtprel		(FILE *, int, rtx)
*************** frv_stack_info (void)
*** 1101,1107 ****
  	default:
  	  for (regno = first; regno <= last; regno++)
  	    {
! 	      if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
  		  || (crtl->calls_eh_return
  		      && (regno >= FIRST_EH_REGNUM && regno <= LAST_EH_REGNUM))
  		  || (!TARGET_FDPIC && flag_pic
--- 1101,1108 ----
  	default:
  	  for (regno = first; regno <= last; regno++)
  	    {
! 	      if ((df_regs_ever_live_p (regno)
! 		   && !call_used_or_fixed_reg_p (regno))
  		  || (crtl->calls_eh_return
  		      && (regno >= FIRST_EH_REGNUM && regno <= LAST_EH_REGNUM))
  		  || (!TARGET_FDPIC && flag_pic
*************** frv_asm_output_mi_thunk (FILE *file,
*** 1938,1948 ****
--- 1939,1952 ----
                           HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
                           tree function)
  {
+   const char *fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunk_fndecl));
    const char *name_func = XSTR (XEXP (DECL_RTL (function), 0), 0);
    const char *name_arg0 = reg_names[FIRST_ARG_REGNUM];
    const char *name_jmp = reg_names[JUMP_REGNO];
    const char *parallel = (frv_issue_rate () > 1 ? ".p" : "");
  
+   assemble_start_function (thunk_fndecl, fnname);
+ 
    /* Do the add using an addi if possible.  */
    if (IN_RANGE (delta, -2048, 2047))
      fprintf (file, "\taddi %s,#%d,%s\n", name_arg0, (int) delta, name_arg0);
*************** frv_asm_output_mi_thunk (FILE *file,
*** 2018,2023 ****
--- 2022,2028 ----
  
    /* Jump to the function address.  */
    fprintf (file, "\tjmpl @(%s,%s)\n", name_jmp, reg_names[GPR_FIRST+0]);
+   assemble_end_function (thunk_fndecl, fnname);
  }
  
  
*************** frv_initial_elimination_offset (int from
*** 2104,2120 ****
  
  static void
  frv_setup_incoming_varargs (cumulative_args_t cum_v,
!                             machine_mode mode,
!                             tree type ATTRIBUTE_UNUSED,
!                             int *pretend_size,
!                             int second_time)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
    if (TARGET_DEBUG_ARG)
      fprintf (stderr,
  	     "setup_vararg: words = %2d, mode = %4s, pretend_size = %d, second_time = %d\n",
! 	     *cum, GET_MODE_NAME (mode), *pretend_size, second_time);
  }
  
  
--- 2109,2124 ----
  
  static void
  frv_setup_incoming_varargs (cumulative_args_t cum_v,
! 			    const function_arg_info &arg,
! 			    int *pretend_size,
! 			    int second_time)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
    if (TARGET_DEBUG_ARG)
      fprintf (stderr,
  	     "setup_vararg: words = %2d, mode = %4s, pretend_size = %d, second_time = %d\n",
! 	     *cum, GET_MODE_NAME (arg.mode), *pretend_size, second_time);
  }
  
  
*************** frv_init_cumulative_args (CUMULATIVE_ARG
*** 3074,3086 ****
     in registers.  */
  
  static bool
! frv_must_pass_in_stack (machine_mode mode, const_tree type)
  {
!   if (mode == BLKmode)
!     return true;
!   if (type == NULL)
!     return false;
!   return AGGREGATE_TYPE_P (type);
  }
  
  /* If defined, a C expression that gives the alignment boundary, in bits, of an
--- 3078,3086 ----
     in registers.  */
  
  static bool
! frv_must_pass_in_stack (const function_arg_info &arg)
  {
!   return arg.mode == BLKmode || arg.aggregate_type_p ();
  }
  
  /* If defined, a C expression that gives the alignment boundary, in bits, of an
*************** frv_function_arg_boundary (machine_mode
*** 3095,3107 ****
  }
  
  static rtx
! frv_function_arg_1 (cumulative_args_t cum_v, machine_mode mode,
! 		    const_tree type ATTRIBUTE_UNUSED, bool named,
  		    bool incoming ATTRIBUTE_UNUSED)
  {
    const CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
!   machine_mode xmode = (mode == BLKmode) ? SImode : mode;
    int arg_num = *cum;
    rtx ret;
    const char *debstr;
--- 3095,3106 ----
  }
  
  static rtx
! frv_function_arg_1 (cumulative_args_t cum_v, const function_arg_info &arg,
  		    bool incoming ATTRIBUTE_UNUSED)
  {
    const CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
!   machine_mode xmode = (arg.mode == BLKmode) ? SImode : arg.mode;
    int arg_num = *cum;
    rtx ret;
    const char *debstr;
*************** frv_function_arg_1 (cumulative_args_t cu
*** 3128,3171 ****
    if (TARGET_DEBUG_ARG)
      fprintf (stderr,
  	     "function_arg: words = %2d, mode = %4s, named = %d, size = %3d, arg = %s\n",
! 	     arg_num, GET_MODE_NAME (mode), named, GET_MODE_SIZE (mode), debstr);
  
    return ret;
  }
  
  static rtx
! frv_function_arg (cumulative_args_t cum, machine_mode mode,
! 		  const_tree type, bool named)
  {
!   return frv_function_arg_1 (cum, mode, type, named, false);
  }
  
  static rtx
! frv_function_incoming_arg (cumulative_args_t cum, machine_mode mode,
! 			   const_tree type, bool named)
  {
!   return frv_function_arg_1 (cum, mode, type, named, true);
  }
  
  
! /* A C statement (sans semicolon) to update the summarizer variable CUM to
!    advance past an argument in the argument list.  The values MODE, TYPE and
!    NAMED describe that argument.  Once this is done, the variable CUM is
!    suitable for analyzing the *following* argument with `FUNCTION_ARG', etc.
! 
!    This macro need not do anything if the argument in question was passed on
!    the stack.  The compiler knows how to track the amount of stack space used
!    for arguments without any special help.  */
  
  static void
  frv_function_arg_advance (cumulative_args_t cum_v,
!                           machine_mode mode,
!                           const_tree type ATTRIBUTE_UNUSED,
!                           bool named)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
!   machine_mode xmode = (mode == BLKmode) ? SImode : mode;
    int bytes = GET_MODE_SIZE (xmode);
    int words = (bytes + UNITS_PER_WORD  - 1) / UNITS_PER_WORD;
    int arg_num = *cum;
--- 3127,3160 ----
    if (TARGET_DEBUG_ARG)
      fprintf (stderr,
  	     "function_arg: words = %2d, mode = %4s, named = %d, size = %3d, arg = %s\n",
! 	     arg_num, GET_MODE_NAME (arg.mode), arg.named,
! 	     GET_MODE_SIZE (arg.mode), debstr);
  
    return ret;
  }
  
  static rtx
! frv_function_arg (cumulative_args_t cum, const function_arg_info &arg)
  {
!   return frv_function_arg_1 (cum, arg, false);
  }
  
  static rtx
! frv_function_incoming_arg (cumulative_args_t cum, const function_arg_info &arg)
  {
!   return frv_function_arg_1 (cum, arg, true);
  }
  
  
! /* Implement TARGET_FUNCTION_ARG_ADVANCE.  */
  
  static void
  frv_function_arg_advance (cumulative_args_t cum_v,
! 			  const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
!   machine_mode xmode = (arg.mode == BLKmode) ? SImode : arg.mode;
    int bytes = GET_MODE_SIZE (xmode);
    int words = (bytes + UNITS_PER_WORD  - 1) / UNITS_PER_WORD;
    int arg_num = *cum;
*************** frv_function_arg_advance (cumulative_arg
*** 3175,3206 ****
    if (TARGET_DEBUG_ARG)
      fprintf (stderr,
  	     "function_adv: words = %2d, mode = %4s, named = %d, size = %3d\n",
! 	     arg_num, GET_MODE_NAME (mode), named, words * UNITS_PER_WORD);
  }
  
  
! /* A C expression for the number of words, at the beginning of an argument,
!    must be put in registers.  The value must be zero for arguments that are
!    passed entirely in registers or that are entirely pushed on the stack.
! 
!    On some machines, certain arguments must be passed partially in registers
!    and partially in memory.  On these machines, typically the first N words of
!    arguments are passed in registers, and the rest on the stack.  If a
!    multi-word argument (a `double' or a structure) crosses that boundary, its
!    first few words must be passed in registers and the rest must be pushed.
!    This macro tells the compiler when this occurs, and how many of the words
!    should go in registers.
! 
!    `FUNCTION_ARG' for these arguments should return the first register to be
!    used by the caller for this argument; likewise `FUNCTION_INCOMING_ARG', for
!    the called function.  */
  
  static int
! frv_arg_partial_bytes (cumulative_args_t cum, machine_mode mode,
! 		       tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED)
  {
! 
!   machine_mode xmode = (mode == BLKmode) ? SImode : mode;
    int bytes = GET_MODE_SIZE (xmode);
    int words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
    int arg_num = *get_cumulative_args (cum);
--- 3164,3180 ----
    if (TARGET_DEBUG_ARG)
      fprintf (stderr,
  	     "function_adv: words = %2d, mode = %4s, named = %d, size = %3d\n",
! 	     arg_num, GET_MODE_NAME (arg.mode), arg.named,
! 	     words * UNITS_PER_WORD);
  }
  
  
! /* Implement TARGET_ARG_PARTIAL_BYTES.  */
  
  static int
! frv_arg_partial_bytes (cumulative_args_t cum, const function_arg_info &arg)
  {
!   machine_mode xmode = (arg.mode == BLKmode) ? SImode : arg.mode;
    int bytes = GET_MODE_SIZE (xmode);
    int words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
    int arg_num = *get_cumulative_args (cum);
*************** frv_ifcvt_modify_tests (ce_if_block *ce_
*** 5228,5235 ****
       not fixed.  However, allow the ICC/ICR temporary registers to be allocated
       if we did not need to use them in reloading other registers.  */
    memset (&tmp_reg->regs, 0, sizeof (tmp_reg->regs));
!   COPY_HARD_REG_SET (tmp_reg->regs, call_used_reg_set);
!   AND_COMPL_HARD_REG_SET (tmp_reg->regs, fixed_reg_set);
    SET_HARD_REG_BIT (tmp_reg->regs, ICC_TEMP);
    SET_HARD_REG_BIT (tmp_reg->regs, ICR_TEMP);
  
--- 5202,5208 ----
       not fixed.  However, allow the ICC/ICR temporary registers to be allocated
       if we did not need to use them in reloading other registers.  */
    memset (&tmp_reg->regs, 0, sizeof (tmp_reg->regs));
!   tmp_reg->regs = regs_invalidated_by_call & ~fixed_reg_set;
    SET_HARD_REG_BIT (tmp_reg->regs, ICC_TEMP);
    SET_HARD_REG_BIT (tmp_reg->regs, ICR_TEMP);
  
*************** frv_ifcvt_modify_tests (ce_if_block *ce_
*** 5338,5344 ****
  
  	      CLEAR_HARD_REG_SET (mentioned_regs);
  	      find_all_hard_regs (PATTERN (insn), &mentioned_regs);
! 	      AND_COMPL_HARD_REG_SET (tmp_reg->regs, mentioned_regs);
  
  	      pattern = PATTERN (insn);
  	      if (GET_CODE (pattern) == COND_EXEC)
--- 5311,5317 ----
  
  	      CLEAR_HARD_REG_SET (mentioned_regs);
  	      find_all_hard_regs (PATTERN (insn), &mentioned_regs);
! 	      tmp_reg->regs &= ~mentioned_regs;
  
  	      pattern = PATTERN (insn);
  	      if (GET_CODE (pattern) == COND_EXEC)
*************** frv_ifcvt_modify_tests (ce_if_block *ce_
*** 5374,5381 ****
  		}
  
  	      if (! skip_nested_if)
! 		AND_COMPL_HARD_REG_SET (frv_ifcvt.nested_cc_ok_rewrite,
! 					mentioned_regs);
  	    }
  
  	  if (insn == last_insn)
--- 5347,5353 ----
  		}
  
  	      if (! skip_nested_if)
! 		frv_ifcvt.nested_cc_ok_rewrite &= ~mentioned_regs;
  	    }
  
  	  if (insn == last_insn)
*************** frv_register_move_cost (machine_mode mod
*** 6714,6720 ****
      case FDPIC_REGS:
      case FDPIC_FPTR_REGS:
      case FDPIC_CALL_REGS:
- 
        switch (to)
  	{
  	default:
--- 6686,6691 ----
*************** frv_register_move_cost (machine_mode mod
*** 6728,6734 ****
  	case FDPIC_REGS:
  	case FDPIC_FPTR_REGS:
  	case FDPIC_CALL_REGS:
- 
  	  return LOW_COST;
  
  	case FPR_REGS:
--- 6699,6704 ----
*************** frv_register_move_cost (machine_mode mod
*** 6739,6744 ****
--- 6709,6715 ----
  	case SPR_REGS:
  	  return LOW_COST;
  	}
+       break;
  
      case QUAD_FPR_REGS:
        switch (to)
*************** frv_register_move_cost (machine_mode mod
*** 6762,6767 ****
--- 6733,6739 ----
  	case QUAD_FPR_REGS:
  	  return LOW_COST;
  	}
+       break;
  
      case LCR_REG:
      case LR_REG:
*************** frv_register_move_cost (machine_mode mod
*** 6779,6787 ****
  	case FDPIC_REGS:
  	case FDPIC_FPTR_REGS:
  	case FDPIC_CALL_REGS:
- 
  	  return MEDIUM_COST;
  	}
  
      case QUAD_ACC_REGS:
      case ACCG_REGS:
--- 6751,6759 ----
  	case FDPIC_REGS:
  	case FDPIC_FPTR_REGS:
  	case FDPIC_CALL_REGS:
  	  return MEDIUM_COST;
  	}
+       break;
  
      case QUAD_ACC_REGS:
      case ACCG_REGS:
*************** frv_register_move_cost (machine_mode mod
*** 6792,6799 ****
  
  	case QUAD_FPR_REGS:
  	  return MEDIUM_COST;
- 
  	}
      }
  
    return HIGH_COST;
--- 6764,6771 ----
  
  	case QUAD_FPR_REGS:
  	  return MEDIUM_COST;
  	}
+       break;
      }
  
    return HIGH_COST;
*************** frv_registers_update (rtx x)
*** 7163,7169 ****
        flags |= frv_cond_flags (XEXP (x, 0));
        x = XEXP (x, 1);
      }
!   note_stores (x, frv_registers_update_1, &flags);
  }
  
  
--- 7135,7141 ----
        flags |= frv_cond_flags (XEXP (x, 0));
        x = XEXP (x, 1);
      }
!   note_pattern_stores (x, frv_registers_update_1, &flags);
  }
  
  
*************** frv_optimize_membar_local (basic_block b
*** 7797,7804 ****
  	  /* Invalidate NEXT_IO's address if it depends on something that
  	     is clobbered by INSN.  */
  	  if (next_io->var_address)
! 	    note_stores (PATTERN (insn), frv_io_check_address,
! 			 &next_io->var_address);
  
  	  /* If the next membar is associated with a __builtin_read,
  	     see if INSN reads from that address.  If it does, and if
--- 7769,7775 ----
  	  /* Invalidate NEXT_IO's address if it depends on something that
  	     is clobbered by INSN.  */
  	  if (next_io->var_address)
! 	    note_stores (insn, frv_io_check_address, &next_io->var_address);
  
  	  /* If the next membar is associated with a __builtin_read,
  	     see if INSN reads from that address.  If it does, and if
*************** frv_optimize_membar_local (basic_block b
*** 7841,7847 ****
  	  if (volatile_refs_p (PATTERN (insn)))
  	    CLEAR_HARD_REG_SET (used_regs);
  	  else
! 	    note_stores (PATTERN (insn), frv_io_handle_set, &used_regs);
  
  	  note_uses (&PATTERN (insn), frv_io_handle_use, &used_regs);
  	  break;
--- 7812,7818 ----
  	  if (volatile_refs_p (PATTERN (insn)))
  	    CLEAR_HARD_REG_SET (used_regs);
  	  else
! 	    note_stores (insn, frv_io_handle_set, &used_regs);
  
  	  note_uses (&PATTERN (insn), frv_io_handle_use, &used_regs);
  	  break;
*************** frv_expand_builtin (tree exp,
*** 9109,9115 ****
                      int ignore ATTRIBUTE_UNUSED)
  {
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   unsigned fcode = (unsigned)DECL_FUNCTION_CODE (fndecl);
    unsigned i;
    struct builtin_description *d;
  
--- 9080,9086 ----
                      int ignore ATTRIBUTE_UNUSED)
  {
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   unsigned fcode = DECL_MD_FUNCTION_CODE (fndecl);
    unsigned i;
    struct builtin_description *d;
  
diff -Nrcpad gcc-9.3.0/gcc/config/frv/frv.h gcc-10.1.0/gcc/config/frv/frv.h
*** gcc-9.3.0/gcc/config/frv/frv.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/frv/frv.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target macros for the FRV port of GCC.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
     Contributed by Red Hat Inc.
  
     This file is part of GCC.
--- 1,5 ----
  /* Target macros for the FRV port of GCC.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
     Contributed by Red Hat Inc.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/frv/frv.md gcc-10.1.0/gcc/config/frv/frv.md
*** gcc-9.3.0/gcc/config/frv/frv.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/frv/frv.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Frv Machine Description
! ;; Copyright (C) 1999-2019 Free Software Foundation, Inc.
  ;; Contributed by Red Hat, Inc.
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Frv Machine Description
! ;; Copyright (C) 1999-2020 Free Software Foundation, Inc.
  ;; Contributed by Red Hat, Inc.
  
  ;; This file is part of GCC.
***************
*** 1887,1893 ****
  ;; Argument 2 is the length
  ;; Argument 3 is the alignment
  
! (define_expand "movmemsi"
    [(parallel [(set (match_operand:BLK 0 "" "")
  		   (match_operand:BLK 1 "" ""))
  	      (use (match_operand:SI 2 "" ""))
--- 1887,1893 ----
  ;; Argument 2 is the length
  ;; Argument 3 is the alignment
  
! (define_expand "cpymemsi"
    [(parallel [(set (match_operand:BLK 0 "" "")
  		   (match_operand:BLK 1 "" ""))
  	      (use (match_operand:SI 2 "" ""))
diff -Nrcpad gcc-9.3.0/gcc/config/frv/frv.opt gcc-10.1.0/gcc/config/frv/frv.opt
*** gcc-9.3.0/gcc/config/frv/frv.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/frv/frv.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the FR-V port of the compiler.
  
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for the FR-V port of the compiler.
  
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/frv/linux.h gcc-10.1.0/gcc/config/frv/linux.h
*** gcc-9.3.0/gcc/config/frv/linux.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/frv/linux.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target macros for the FRV Linux port of GCC.
!    Copyright (C) 1999-2019 Free Software Foundation, Inc.
     Contributed by Red Hat Inc.
  
     This file is part of GCC.
--- 1,5 ----
  /* Target macros for the FRV Linux port of GCC.
!    Copyright (C) 1999-2020 Free Software Foundation, Inc.
     Contributed by Red Hat Inc.
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/frv/predicates.md gcc-10.1.0/gcc/config/frv/predicates.md
*** gcc-9.3.0/gcc/config/frv/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/frv/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicate definitions for Frv.
! ;; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Predicate definitions for Frv.
! ;; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/frv/t-frv gcc-10.1.0/gcc/config/frv/t-frv
*** gcc-9.3.0/gcc/config/frv/t-frv	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/frv/t-frv	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2002-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2002-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/frv/t-linux gcc-10.1.0/gcc/config/frv/t-linux
*** gcc-9.3.0/gcc/config/frv/t-linux	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/frv/t-linux	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2004-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2004-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/ft32/constraints.md gcc-10.1.0/gcc/config/ft32/constraints.md
*** gcc-9.3.0/gcc/config/ft32/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/ft32/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for FT32
! ;; Copyright (C) 2015-2019 Free Software Foundation, Inc.
  ;; Contributed by FTDI <support@ftdi.com>
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Constraint definitions for FT32
! ;; Copyright (C) 2015-2020 Free Software Foundation, Inc.
  ;; Contributed by FTDI <support@ftdi.com>
  
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/ft32/ft32-protos.h gcc-10.1.0/gcc/config/ft32/ft32-protos.h
*** gcc-9.3.0/gcc/config/ft32/ft32-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/ft32/ft32-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Prototypes for ft32.c functions used in the md file & elsewhere.
!    Copyright (C) 2015-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Prototypes for ft32.c functions used in the md file & elsewhere.
!    Copyright (C) 2015-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/ft32/ft32.c gcc-10.1.0/gcc/config/ft32/ft32.c
*** gcc-9.3.0/gcc/config/ft32/ft32.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/ft32/ft32.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target Code for ft32
!    Copyright (C) 2015-2019 Free Software Foundation, Inc.
     Contributed by FTDI <support@ftdi.com>
  
     This file is part of GCC.
--- 1,5 ----
  /* Target Code for ft32
!    Copyright (C) 2015-2020 Free Software Foundation, Inc.
     Contributed by FTDI <support@ftdi.com>
  
     This file is part of GCC.
*************** ft32_compute_frame (void)
*** 411,417 ****
  
    /* Save callee-saved registers.  */
    for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
!     if (df_regs_ever_live_p (regno) && (!call_used_regs[regno]))
        cfun->machine->callee_saved_reg_size += 4;
  
    cfun->machine->size_for_adjusting_sp =
--- 411,417 ----
  
    /* Save callee-saved registers.  */
    for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
!     if (df_regs_ever_live_p (regno) && !call_used_or_fixed_reg_p (regno))
        cfun->machine->callee_saved_reg_size += 4;
  
    cfun->machine->size_for_adjusting_sp =
*************** ft32_expand_prologue (void)
*** 475,481 ****
      {
        for (regno = FIRST_PSEUDO_REGISTER; regno-- > 0;)
  	{
! 	  if (!fixed_regs[regno] && !call_used_regs[regno]
  	      && df_regs_ever_live_p (regno))
  	    {
  	      rtx preg = gen_rtx_REG (Pmode, regno);
--- 475,481 ----
      {
        for (regno = FIRST_PSEUDO_REGISTER; regno-- > 0;)
  	{
! 	  if (!call_used_or_fixed_reg_p (regno)
  	      && df_regs_ever_live_p (regno))
  	    {
  	      rtx preg = gen_rtx_REG (Pmode, regno);
*************** ft32_expand_prologue (void)
*** 488,495 ****
      {
        for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
  	{
! 	  if (!fixed_regs[regno] && df_regs_ever_live_p (regno)
! 	      && !call_used_regs[regno])
  	    {
  	      insn = emit_insn (gen_movsi_push (gen_rtx_REG (Pmode, regno)));
  	      RTX_FRAME_RELATED_P (insn) = 1;
--- 488,495 ----
      {
        for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
  	{
! 	  if (df_regs_ever_live_p (regno)
! 	      && !call_used_or_fixed_reg_p (regno))
  	    {
  	      insn = emit_insn (gen_movsi_push (gen_rtx_REG (Pmode, regno)));
  	      RTX_FRAME_RELATED_P (insn) = 1;
*************** ft32_expand_epilogue (void)
*** 554,560 ****
      {
        for (regno = FIRST_PSEUDO_REGISTER; regno-- > 0;)
          {
!           if (!fixed_regs[regno] && !call_used_regs[regno]
                && df_regs_ever_live_p (regno))
              {
                rtx preg = gen_rtx_REG (Pmode, regno);
--- 554,560 ----
      {
        for (regno = FIRST_PSEUDO_REGISTER; regno-- > 0;)
          {
!           if (!call_used_or_fixed_reg_p (regno)
                && df_regs_ever_live_p (regno))
              {
                rtx preg = gen_rtx_REG (Pmode, regno);
*************** ft32_initial_elimination_offset (int fro
*** 630,642 ****
  
  static void
  ft32_setup_incoming_varargs (cumulative_args_t cum_v,
! 			     machine_mode mode,
! 			     tree type ATTRIBUTE_UNUSED,
  			     int *pretend_size, int no_rtl ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    int named_size =
!     GET_MODE_SIZE (SImode) * (*cum - FT32_R0) + GET_MODE_SIZE (mode);
  
    if (named_size < 24)
      *pretend_size = 24 - named_size;
--- 630,641 ----
  
  static void
  ft32_setup_incoming_varargs (cumulative_args_t cum_v,
! 			     const function_arg_info &arg,
  			     int *pretend_size, int no_rtl ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    int named_size =
!     GET_MODE_SIZE (SImode) * (*cum - FT32_R0) + GET_MODE_SIZE (arg.mode);
  
    if (named_size < 24)
      *pretend_size = 24 - named_size;
*************** ft32_fixed_condition_code_regs (unsigned
*** 658,671 ****
     NULL_RTX if there's no more space.  */
  
  static rtx
! ft32_function_arg (cumulative_args_t cum_v, machine_mode mode,
!                    const_tree type ATTRIBUTE_UNUSED,
!                    bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
    if (*cum < 8)
!     return gen_rtx_REG (mode, *cum);
    else
      return NULL_RTX;
  }
--- 657,668 ----
     NULL_RTX if there's no more space.  */
  
  static rtx
! ft32_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
    if (*cum < 8)
!     return gen_rtx_REG (arg.mode, *cum);
    else
      return NULL_RTX;
  }
*************** ft32_function_arg (cumulative_args_t cum
*** 675,708 ****
     : (unsigned) int_size_in_bytes (TYPE))
  
  static void
! ft32_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
!                            const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
    *cum = (*cum < FT32_R6
!           ? *cum + ((3 + FT32_FUNCTION_ARG_SIZE (mode, type)) / 4) : *cum);
  }
  
! /* Return non-zero if the function argument described by TYPE is to be
     passed by reference.  */
  
  static bool
! ft32_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
!                         machine_mode mode, const_tree type,
!                         bool named ATTRIBUTE_UNUSED)
  {
!   unsigned HOST_WIDE_INT size;
! 
!   if (type)
!     {
!       if (AGGREGATE_TYPE_P (type))
!         return true;
!       size = int_size_in_bytes (type);
!     }
!   else
!     size = GET_MODE_SIZE (mode);
! 
    return size > 4 * 6;
  }
  
--- 672,696 ----
     : (unsigned) int_size_in_bytes (TYPE))
  
  static void
! ft32_function_arg_advance (cumulative_args_t cum_v,
! 			   const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
    *cum = (*cum < FT32_R6
! 	  ? *cum + ((3 + FT32_FUNCTION_ARG_SIZE (arg.mode, arg.type)) / 4)
! 	  : *cum);
  }
  
! /* Return non-zero if the function argument described by ARG is to be
     passed by reference.  */
  
  static bool
! ft32_pass_by_reference (cumulative_args_t, const function_arg_info &arg)
  {
!   if (arg.aggregate_type_p ())
!     return true;
!   unsigned HOST_WIDE_INT size = arg.type_size_in_bytes ();
    return size > 4 * 6;
  }
  
*************** ft32_pass_by_reference (cumulative_args_
*** 711,718 ****
     that fit in argument passing registers.  */
  
  static int
! ft32_arg_partial_bytes (cumulative_args_t cum_v,
!                         machine_mode mode, tree type, bool named)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    int bytes_left, size;
--- 699,705 ----
     that fit in argument passing registers.  */
  
  static int
! ft32_arg_partial_bytes (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    int bytes_left, size;
*************** ft32_arg_partial_bytes (cumulative_args_
*** 720,735 ****
    if (*cum >= 8)
      return 0;
  
!   if (ft32_pass_by_reference (cum_v, mode, type, named))
      size = 4;
!   else if (type)
      {
!       if (AGGREGATE_TYPE_P (type))
          return 0;
!       size = int_size_in_bytes (type);
      }
    else
!     size = GET_MODE_SIZE (mode);
  
    bytes_left = (4 * 6) - ((*cum - 2) * 4);
  
--- 707,722 ----
    if (*cum >= 8)
      return 0;
  
!   if (ft32_pass_by_reference (cum_v, arg))
      size = 4;
!   else if (arg.type)
      {
!       if (AGGREGATE_TYPE_P (arg.type))
          return 0;
!       size = int_size_in_bytes (arg.type);
      }
    else
!     size = GET_MODE_SIZE (arg.mode);
  
    bytes_left = (4 * 6) - ((*cum - 2) * 4);
  
diff -Nrcpad gcc-9.3.0/gcc/config/ft32/ft32.h gcc-10.1.0/gcc/config/ft32/ft32.h
*** gcc-9.3.0/gcc/config/ft32/ft32.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/ft32/ft32.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target Definitions for ft32.
!    Copyright (C) 2015-2019 Free Software Foundation, Inc.
     Contributed by FTDI <support@ftdi.com>
  
     This file is part of GCC.
--- 1,5 ----
  /* Target Definitions for ft32.
!    Copyright (C) 2015-2020 Free Software Foundation, Inc.
     Contributed by FTDI <support@ftdi.com>
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/ft32/ft32.md gcc-10.1.0/gcc/config/ft32/ft32.md
*** gcc-9.3.0/gcc/config/ft32/ft32.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/ft32/ft32.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Machine description for FT32
! ;; Copyright (C) 2015-2019 Free Software Foundation, Inc.
  ;; Contributed by FTDI <support@ftdi.com>
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Machine description for FT32
! ;; Copyright (C) 2015-2020 Free Software Foundation, Inc.
  ;; Contributed by FTDI <support@ftdi.com>
  
  ;; This file is part of GCC.
***************
*** 851,857 ****
  "stpcpy %b1,%b2 # %0 %b1 %b2"
  )
  
! (define_insn "movmemsi"
    [(set (match_operand:BLK 0 "memory_operand" "=W,BW")
          (match_operand:BLK 1 "memory_operand" "W,BW"))
          (use (match_operand:SI 2 "ft32_imm_operand" "KA,KA"))
--- 851,857 ----
  "stpcpy %b1,%b2 # %0 %b1 %b2"
  )
  
! (define_insn "cpymemsi"
    [(set (match_operand:BLK 0 "memory_operand" "=W,BW")
          (match_operand:BLK 1 "memory_operand" "W,BW"))
          (use (match_operand:SI 2 "ft32_imm_operand" "KA,KA"))
diff -Nrcpad gcc-9.3.0/gcc/config/ft32/ft32.opt gcc-10.1.0/gcc/config/ft32/ft32.opt
*** gcc-9.3.0/gcc/config/ft32/ft32.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/ft32/ft32.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the FT32 port of the compiler.
  
! ; Copyright (C) 2015-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for the FT32 port of the compiler.
  
! ; Copyright (C) 2015-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/ft32/predicates.md gcc-10.1.0/gcc/config/ft32/predicates.md
*** gcc-9.3.0/gcc/config/ft32/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/ft32/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicate definitions for FT32
! ;; Copyright (C) 2015-2019 Free Software Foundation, Inc.
  ;; Contributed by FTDI <support@ftdi.com>
  
  ;; This file is part of GCC.
--- 1,5 ----
  ;; Predicate definitions for FT32
! ;; Copyright (C) 2015-2020 Free Software Foundation, Inc.
  ;; Contributed by FTDI <support@ftdi.com>
  
  ;; This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/ft32/t-ft32 gcc-10.1.0/gcc/config/ft32/t-ft32
*** gcc-9.3.0/gcc/config/ft32/t-ft32	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/ft32/t-ft32	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  # Target Makefile Fragment for ft32
! # Copyright (C) 2015-2019 Free Software Foundation, Inc.
  # Contributed by FTDI <support@ftdi.com>
  #
  # This file is part of GCC.
--- 1,5 ----
  # Target Makefile Fragment for ft32
! # Copyright (C) 2015-2020 Free Software Foundation, Inc.
  # Contributed by FTDI <support@ftdi.com>
  #
  # This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/fuchsia.h gcc-10.1.0/gcc/config/fuchsia.h
*** gcc-9.3.0/gcc/config/fuchsia.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/fuchsia.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Base configuration file for all Fuchsia targets.
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
     Contributed by Google.
  
  This file is part of GCC.
--- 1,5 ----
  /* Base configuration file for all Fuchsia targets.
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
     Contributed by Google.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/fused-madd.opt gcc-10.1.0/gcc/config/fused-madd.opt
*** gcc-9.3.0/gcc/config/fused-madd.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/fused-madd.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; -mfused-madd option (some targets only).
  ;
! ; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; -mfused-madd option (some targets only).
  ;
! ; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/g.opt gcc-10.1.0/gcc/config/g.opt
*** gcc-9.3.0/gcc/config/g.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/g.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; -G option (small data, some targets only).
  
! ; Copyright (C) 2003-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; -G option (small data, some targets only).
  
! ; Copyright (C) 2003-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/constraints.md gcc-10.1.0/gcc/config/gcn/constraints.md
*** gcc-9.3.0/gcc/config/gcn/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for GCN.
! ;; Copyright (C) 2016-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Constraint definitions for GCN.
! ;; Copyright (C) 2016-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 53,64 ****
  	(match_test "gcn_constant64_p (op)")))
  
  (define_constraint "DA"
!   "Splittable inline immediate 64-bit parameter"
    (and (match_code "const_int,const_double,const_vector")
!        (match_test "gcn_inline_constant64_p (op)")))
  
  (define_constraint "DB"
!   "Splittable immediate 64-bit parameter"
    (match_code "const_int,const_double,const_vector"))
  
  (define_constraint "U"
--- 53,69 ----
  	(match_test "gcn_constant64_p (op)")))
  
  (define_constraint "DA"
!   "Immediate 64-bit parameter, low and high part match 'A'"
    (and (match_code "const_int,const_double,const_vector")
!        (match_test "gcn_inline_constant64_p (op, 0)")))
! 
! (define_constraint "Db"
!   "Immediate 64-bit parameter, low part matches 'B', high part matches 'A'"
!   (and (match_code "const_int,const_double,const_vector")
!        (match_test "gcn_inline_constant64_p (op, 1)")))
  
  (define_constraint "DB"
!   "Immediate 64-bit parameter, low and high part match 'B'"
    (match_code "const_int,const_double,const_vector"))
  
  (define_constraint "U"
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/driver-gcn.c gcc-10.1.0/gcc/config/gcn/driver-gcn.c
*** gcc-9.3.0/gcc/config/gcn/driver-gcn.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/driver-gcn.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines for the gcc driver.
!    Copyright (C) 2018-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Subroutines for the gcc driver.
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/gcn-builtins.def gcc-10.1.0/gcc/config/gcn/gcn-builtins.def
*** gcc-9.3.0/gcc/config/gcn/gcn-builtins.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/gcn-builtins.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
--- 1,4 ----
! /* Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/gcn-hsa.h gcc-10.1.0/gcc/config/gcn/gcn-hsa.h
*** gcc-9.3.0/gcc/config/gcn/gcn-hsa.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/gcn-hsa.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
--- 1,4 ----
! /* Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
*************** extern unsigned int gcn_local_sym_hash (
*** 76,82 ****
  #define GOMP_SELF_SPECS ""
  
  /* Use LLVM assembler and linker options.  */
! #define ASM_SPEC  "-triple=amdgcn--amdhsa "	     \
  		  "%:last_arg(%{march=*:-mcpu=%*}) " \
  		  "-filetype=obj"
  /* Add -mlocal-symbol-id=<source-file-basename> unless the user (or mkoffload)
--- 76,82 ----
  #define GOMP_SELF_SPECS ""
  
  /* Use LLVM assembler and linker options.  */
! #define ASM_SPEC  "-triple=amdgcn--amdhsa -mattr=-code-object-v3 "  \
  		  "%:last_arg(%{march=*:-mcpu=%*}) " \
  		  "-filetype=obj"
  /* Add -mlocal-symbol-id=<source-file-basename> unless the user (or mkoffload)
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/gcn-modes.def gcc-10.1.0/gcc/config/gcn/gcn-modes.def
*** gcc-9.3.0/gcc/config/gcn/gcn-modes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/gcn-modes.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
--- 1,4 ----
! /* Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/gcn-opts.h gcc-10.1.0/gcc/config/gcn/gcn-opts.h
*** gcc-9.3.0/gcc/config/gcn/gcn-opts.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/gcn-opts.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
--- 1,4 ----
! /* Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
***************
*** 20,26 ****
  /* Which processor to generate code or schedule for.  */
  enum processor_type
  {
-   PROCESSOR_CARRIZO,
    PROCESSOR_FIJI,
    PROCESSOR_VEGA
  };
--- 20,25 ----
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/gcn-passes.def gcc-10.1.0/gcc/config/gcn/gcn-passes.def
*** gcc-9.3.0/gcc/config/gcn/gcn-passes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/gcn-passes.def	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
     
--- 1,4 ----
! /* Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
     
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/gcn-protos.h gcc-10.1.0/gcc/config/gcn/gcn-protos.h
*** gcc-9.3.0/gcc/config/gcn/gcn-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/gcn-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
--- 1,4 ----
! /* Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
*************** extern int gcn_hard_regno_nregs (int reg
*** 51,57 ****
  extern void gcn_hsa_declare_function_name (FILE *file, const char *name,
  					   tree decl);
  extern HOST_WIDE_INT gcn_initial_elimination_offset (int, int);
! extern bool gcn_inline_constant64_p (rtx);
  extern bool gcn_inline_constant_p (rtx);
  extern int gcn_inline_fp_constant_p (rtx, bool);
  extern reg_class gcn_mode_code_base_reg_class (machine_mode, addr_space_t,
--- 51,57 ----
  extern void gcn_hsa_declare_function_name (FILE *file, const char *name,
  					   tree decl);
  extern HOST_WIDE_INT gcn_initial_elimination_offset (int, int);
! extern bool gcn_inline_constant64_p (rtx, bool);
  extern bool gcn_inline_constant_p (rtx);
  extern int gcn_inline_fp_constant_p (rtx, bool);
  extern reg_class gcn_mode_code_base_reg_class (machine_mode, addr_space_t,
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/gcn-run.c gcc-10.1.0/gcc/config/gcn/gcn-run.c
*** gcc-9.3.0/gcc/config/gcn/gcn-run.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/gcn-run.c	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Run a stand-alone AMD GCN kernel.
  
     Copyright 2017 Mentor Graphics Corporation
!    Copyright 2018-2019 Free Software Foundation, Inc.
  
     This program is free software: you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
--- 1,7 ----
  /* Run a stand-alone AMD GCN kernel.
  
     Copyright 2017 Mentor Graphics Corporation
!    Copyright (C) 2018-2020 Free Software Foundation, Inc.
  
     This program is free software: you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
*************** bool debug = false;
*** 66,75 ****
  
  hsa_agent_t device = { 0 };
  hsa_queue_t *queue = NULL;
! uint64_t kernel = 0;
  hsa_executable_t executable = { 0 };
  
  hsa_region_t kernargs_region = { 0 };
  uint32_t kernarg_segment_size = 0;
  uint32_t group_segment_size = 0;
  uint32_t private_segment_size = 0;
--- 66,78 ----
  
  hsa_agent_t device = { 0 };
  hsa_queue_t *queue = NULL;
! uint64_t init_array_kernel = 0;
! uint64_t fini_array_kernel = 0;
! uint64_t main_kernel = 0;
  hsa_executable_t executable = { 0 };
  
  hsa_region_t kernargs_region = { 0 };
+ hsa_region_t heap_region = { 0 };
  uint32_t kernarg_segment_size = 0;
  uint32_t group_segment_size = 0;
  uint32_t private_segment_size = 0;
*************** struct hsa_runtime_fn_info
*** 133,138 ****
--- 136,143 ----
  					hsa_signal_t *signal);
    hsa_status_t (*hsa_memory_allocate_fn) (hsa_region_t region, size_t size,
  					  void **ptr);
+   hsa_status_t (*hsa_memory_assign_agent_fn) (void *ptr, hsa_agent_t agent,
+ 					      hsa_access_permission_t access);
    hsa_status_t (*hsa_memory_copy_fn) (void *dst, const void *src,
  				      size_t size);
    hsa_status_t (*hsa_memory_free_fn) (void *ptr);
*************** init_hsa_runtime_functions (void)
*** 202,207 ****
--- 207,213 ----
    DLSYM_FN (hsa_executable_freeze)
    DLSYM_FN (hsa_signal_create)
    DLSYM_FN (hsa_memory_allocate)
+   DLSYM_FN (hsa_memory_assign_agent)
    DLSYM_FN (hsa_memory_copy)
    DLSYM_FN (hsa_memory_free)
    DLSYM_FN (hsa_signal_destroy)
*************** get_gpu_agent (hsa_agent_t agent, void *
*** 280,286 ****
     suitable one has been found.  */
  
  static hsa_status_t
! get_kernarg_region (hsa_region_t region, void *data __attribute__ ((unused)))
  {
    /* Reject non-global regions.  */
    hsa_region_segment_t segment;
--- 286,293 ----
     suitable one has been found.  */
  
  static hsa_status_t
! get_memory_region (hsa_region_t region, hsa_region_t *retval,
! 		   hsa_region_global_flag_t kind)
  {
    /* Reject non-global regions.  */
    hsa_region_segment_t segment;
*************** get_kernarg_region (hsa_region_t region,
*** 292,300 ****
    hsa_region_global_flag_t flags;
    hsa_fns.hsa_region_get_info_fn (region, HSA_REGION_INFO_GLOBAL_FLAGS,
  				  &flags);
!   if (flags & HSA_REGION_GLOBAL_FLAG_KERNARG)
      {
!       kernargs_region = region;
        return HSA_STATUS_INFO_BREAK;
      }
  
--- 299,307 ----
    hsa_region_global_flag_t flags;
    hsa_fns.hsa_region_get_info_fn (region, HSA_REGION_INFO_GLOBAL_FLAGS,
  				  &flags);
!   if (flags & kind)
      {
!       *retval = region;
        return HSA_STATUS_INFO_BREAK;
      }
  
*************** get_kernarg_region (hsa_region_t region,
*** 302,307 ****
--- 309,328 ----
    return HSA_STATUS_SUCCESS;
  }
  
+ static hsa_status_t
+ get_kernarg_region (hsa_region_t region, void *data __attribute__((unused)))
+ {
+   return get_memory_region (region, &kernargs_region,
+ 			    HSA_REGION_GLOBAL_FLAG_KERNARG);
+ }
+ 
+ static hsa_status_t
+ get_heap_region (hsa_region_t region, void *data __attribute__((unused)))
+ {
+   return get_memory_region (region, &heap_region,
+ 			    HSA_REGION_GLOBAL_FLAG_COARSE_GRAINED);
+ }
+ 
  /* Initialize the HSA Runtime library and GPU device.  */
  
  static void
*************** init_device ()
*** 336,341 ****
--- 357,369 ----
  						  NULL),
  	    status == HSA_STATUS_SUCCESS || status == HSA_STATUS_INFO_BREAK,
  	    "Locate kernargs memory");
+ 
+   /* Select a memory region for the kernel heap.
+      The call-back function, get_heap_region, does the selection.  */
+   XHSA_CMP (hsa_fns.hsa_agent_iterate_regions_fn (device, get_heap_region,
+ 						  NULL),
+ 	    status == HSA_STATUS_SUCCESS || status == HSA_STATUS_INFO_BREAK,
+ 	    "Locate device memory");
  }
  
  
*************** load_image (const char *filename)
*** 427,440 ****
    XHSA (hsa_fns.hsa_executable_freeze_fn (executable, ""),
  	"Freeze GCN executable");
  
!   /* Locate the "main" function, and read the kernel's properties.  */
    hsa_executable_symbol_t symbol;
    XHSA (hsa_fns.hsa_executable_get_symbol_fn (executable, NULL, "main",
  					      device, 0, &symbol),
  	"Find 'main' function");
    XHSA (hsa_fns.hsa_executable_symbol_get_info_fn
! 	    (symbol, HSA_EXECUTABLE_SYMBOL_INFO_KERNEL_OBJECT, &kernel),
! 	"Extract kernel object");
    XHSA (hsa_fns.hsa_executable_symbol_get_info_fn
  	    (symbol, HSA_EXECUTABLE_SYMBOL_INFO_KERNEL_KERNARG_SEGMENT_SIZE,
  	     &kernarg_segment_size),
--- 455,484 ----
    XHSA (hsa_fns.hsa_executable_freeze_fn (executable, ""),
  	"Freeze GCN executable");
  
!   /* Locate the "_init_array" function, and read the kernel's properties.  */
    hsa_executable_symbol_t symbol;
+   XHSA (hsa_fns.hsa_executable_get_symbol_fn (executable, NULL, "_init_array",
+ 					      device, 0, &symbol),
+ 	"Find '_init_array' function");
+   XHSA (hsa_fns.hsa_executable_symbol_get_info_fn
+ 	    (symbol, HSA_EXECUTABLE_SYMBOL_INFO_KERNEL_OBJECT, &init_array_kernel),
+ 	"Extract '_init_array' kernel object kernel object");
+ 
+   /* Locate the "_fini_array" function, and read the kernel's properties.  */
+   XHSA (hsa_fns.hsa_executable_get_symbol_fn (executable, NULL, "_fini_array",
+ 					      device, 0, &symbol),
+ 	"Find '_fini_array' function");
+   XHSA (hsa_fns.hsa_executable_symbol_get_info_fn
+ 	    (symbol, HSA_EXECUTABLE_SYMBOL_INFO_KERNEL_OBJECT, &fini_array_kernel),
+ 	"Extract '_fini_array' kernel object kernel object");
+ 
+   /* Locate the "main" function, and read the kernel's properties.  */
    XHSA (hsa_fns.hsa_executable_get_symbol_fn (executable, NULL, "main",
  					      device, 0, &symbol),
  	"Find 'main' function");
    XHSA (hsa_fns.hsa_executable_symbol_get_info_fn
! 	    (symbol, HSA_EXECUTABLE_SYMBOL_INFO_KERNEL_OBJECT, &main_kernel),
! 	"Extract 'main' kernel object");
    XHSA (hsa_fns.hsa_executable_symbol_get_info_fn
  	    (symbol, HSA_EXECUTABLE_SYMBOL_INFO_KERNEL_KERNARG_SEGMENT_SIZE,
  	     &kernarg_segment_size),
*************** found_main:;
*** 531,537 ****
  		break;
  	      case R_AMDGPU_REL64:
  		/* FIXME
! 		   LLD seems to emit REL64 where the the assembler has ABS64.
  		   This is clearly wrong because it's not what the compiler
  		   is expecting.  Let's assume, for now, that it's a bug.
  		   In any case, GCN kernels are always self contained and
--- 575,581 ----
  		break;
  	      case R_AMDGPU_REL64:
  		/* FIXME
! 		   LLD seems to emit REL64 where the assembler has ABS64.
  		   This is clearly wrong because it's not what the compiler
  		   is expecting.  Let's assume, for now, that it's a bug.
  		   In any case, GCN kernels are always self contained and
*************** found_main:;
*** 575,584 ****
     __flat_scalar GCN address space).  */
  
  static void *
! device_malloc (size_t size)
  {
    void *result;
!   XHSA (hsa_fns.hsa_memory_allocate_fn (kernargs_region, size, &result),
  	"Allocate device memory");
    return result;
  }
--- 619,628 ----
     __flat_scalar GCN address space).  */
  
  static void *
! device_malloc (size_t size, hsa_region_t region)
  {
    void *result;
!   XHSA (hsa_fns.hsa_memory_allocate_fn (region, size, &result),
  	"Allocate device memory");
    return result;
  }
*************** struct kernargs
*** 616,629 ****
      } queue[1024];
      unsigned int consumed;
    } output_data;
- 
-   struct heap
-   {
-     int64_t size;
-     char data[0];
-   } heap;
  };
  
  /* Print any console output from the kernel.
     We print all entries from "consumed" to the next entry without a "written"
     flag, or "next_output" is reached.  The buffer is circular, but the
--- 660,673 ----
      } queue[1024];
      unsigned int consumed;
    } output_data;
  };
  
+ struct heap
+ {
+   int64_t size;
+   char data[0];
+ } heap;
+ 
  /* Print any console output from the kernel.
     We print all entries from "consumed" to the next entry without a "written"
     flag, or "next_output" is reached.  The buffer is circular, but the
*************** gomp_print_output (struct kernargs *kern
*** 684,690 ****
  /* Execute an already-loaded kernel on the device.  */
  
  static void
! run (void *kernargs)
  {
    /* A "signal" is used to launch and monitor the kernel.  */
    hsa_signal_t signal;
--- 728,734 ----
  /* Execute an already-loaded kernel on the device.  */
  
  static void
! run (uint64_t kernel, void *kernargs)
  {
    /* A "signal" is used to launch and monitor the kernel.  */
    hsa_signal_t signal;
*************** main (int argc, char *argv[])
*** 793,805 ****
  
    /* Allocate device memory for both function parameters and the argv
       data.  */
!   size_t heap_size = 10 * 1024 * 1024;	/* 10MB.  */
!   struct kernargs *kernargs = device_malloc (sizeof (*kernargs) + heap_size);
    struct argdata
    {
      int64_t argv_data[kernel_argc];
      char strings[args_size];
!   } *args = device_malloc (sizeof (struct argdata));
  
    /* Write the data to the target.  */
    kernargs->argc = kernel_argc;
--- 837,855 ----
  
    /* Allocate device memory for both function parameters and the argv
       data.  */
!   struct kernargs *kernargs = device_malloc (sizeof (*kernargs),
! 					     kernargs_region);
    struct argdata
    {
      int64_t argv_data[kernel_argc];
      char strings[args_size];
!   } *args = device_malloc (sizeof (struct argdata), kernargs_region);
! 
!   size_t heap_size = 10 * 1024 * 1024;	/* 10MB.  */
!   struct heap *heap = device_malloc (heap_size, heap_region);
!   XHSA (hsa_fns.hsa_memory_assign_agent_fn (heap, device,
! 					    HSA_ACCESS_PERMISSION_RW),
! 	"Assign heap to device agent");
  
    /* Write the data to the target.  */
    kernargs->argc = kernel_argc;
*************** main (int argc, char *argv[])
*** 819,832 ****
        memcpy (&args->strings[offset], kernel_argv[i], arg_len + 1);
        offset += arg_len;
      }
!   kernargs->heap_ptr = (int64_t) &kernargs->heap;
!   kernargs->heap.size = heap_size;
  
    /* Run the kernel on the GPU.  */
!   run (kernargs);
    unsigned int return_value =
      (unsigned int) kernargs->output_data.return_value;
  
    unsigned int upper = (return_value & ~0xffff) >> 16;
    if (upper == 0xcafe)
      {
--- 869,888 ----
        memcpy (&args->strings[offset], kernel_argv[i], arg_len + 1);
        offset += arg_len;
      }
!   kernargs->heap_ptr = (int64_t) heap;
!   hsa_fns.hsa_memory_copy_fn (&heap->size, &heap_size, sizeof (heap_size));
! 
!   /* Run constructors on the GPU.  */
!   run (init_array_kernel, kernargs);
  
    /* Run the kernel on the GPU.  */
!   run (main_kernel, kernargs);
    unsigned int return_value =
      (unsigned int) kernargs->output_data.return_value;
  
+   /* Run destructors on the GPU.  */
+   run (fini_array_kernel, kernargs);
+ 
    unsigned int upper = (return_value & ~0xffff) >> 16;
    if (upper == 0xcafe)
      {
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/gcn-tree.c gcc-10.1.0/gcc/config/gcn/gcn-tree.c
*** gcc-9.3.0/gcc/config/gcn/gcn-tree.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/gcn-tree.c	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
     
--- 1,4 ----
! /* Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
     
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/gcn-valu.md gcc-10.1.0/gcc/config/gcn/gcn-valu.md
*** gcc-9.3.0/gcc/config/gcn/gcn-valu.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/gcn-valu.md	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! ;; Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
  ;; This file is free software; you can redistribute it and/or modify it under
  ;; the terms of the GNU General Public License as published by the Free
--- 1,4 ----
! ;; Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
  ;; This file is free software; you can redistribute it and/or modify it under
  ;; the terms of the GNU General Public License as published by the Free
***************
*** 16,40 ****
  
  ;; {{{ Vector iterators
  
  ; Vector modes for one vector register
! (define_mode_iterator VEC_1REG_MODE
! 		      [V64QI V64HI V64SI V64HF V64SF])
! (define_mode_iterator VEC_1REG_ALT
  		      [V64QI V64HI V64SI V64HF V64SF])
  
! (define_mode_iterator VEC_1REG_INT_MODE
  		      [V64QI V64HI V64SI])
! (define_mode_iterator VEC_1REG_INT_ALT
  		      [V64QI V64HI V64SI])
  
  ; Vector modes for two vector registers
! (define_mode_iterator VEC_2REG_MODE
  		      [V64DI V64DF])
  
  ; All of above
! (define_mode_iterator VEC_REG_MODE
! 		      [V64QI V64HI V64SI V64HF V64SF    ; Single reg
! 		       V64DI V64DF])		        ; Double reg
  
  (define_mode_attr scalar_mode
    [(V64QI "qi") (V64HI "hi") (V64SI "si")
--- 16,76 ----
  
  ;; {{{ Vector iterators
  
+ ; Vector modes for specific types
+ ; (This will make more sense when there are multiple vector sizes)
+ (define_mode_iterator V_QI
+ 		      [V64QI])
+ (define_mode_iterator V_HI
+ 		      [V64HI])
+ (define_mode_iterator V_HF
+ 		      [V64HF])
+ (define_mode_iterator V_SI
+ 		      [V64SI])
+ (define_mode_iterator V_SF
+ 		      [V64SF])
+ (define_mode_iterator V_DI
+ 		      [V64DI])
+ (define_mode_iterator V_DF
+ 		      [V64DF])
+ 
+ ; Vector modes for sub-dword modes
+ (define_mode_iterator V_QIHI
+ 		      [V64QI V64HI])
+ 
  ; Vector modes for one vector register
! (define_mode_iterator V_1REG
  		      [V64QI V64HI V64SI V64HF V64SF])
  
! (define_mode_iterator V_INT_1REG
  		      [V64QI V64HI V64SI])
! (define_mode_iterator V_INT_1REG_ALT
  		      [V64QI V64HI V64SI])
+ (define_mode_iterator V_FP_1REG
+ 		      [V64HF V64SF])
  
  ; Vector modes for two vector registers
! (define_mode_iterator V_2REG
  		      [V64DI V64DF])
  
+ ; Vector modes with native support
+ (define_mode_iterator V_noQI
+ 		      [V64HI V64HF V64SI V64SF V64DI V64DF])
+ (define_mode_iterator V_noHI
+ 		      [V64HF V64SI V64SF V64DI V64DF])
+ 
+ (define_mode_iterator V_INT_noQI
+ 		      [V64HI V64SI V64DI])
+ 
  ; All of above
! (define_mode_iterator V_ALL
! 		      [V64QI V64HI V64HF V64SI V64SF V64DI V64DF])
! (define_mode_iterator V_ALL_ALT
! 		      [V64QI V64HI V64HF V64SI V64SF V64DI V64DF])
! 
! (define_mode_iterator V_INT
! 		      [V64QI V64HI V64SI V64DI])
! (define_mode_iterator V_FP
! 		      [V64HF V64SF V64DF])
  
  (define_mode_attr scalar_mode
    [(V64QI "qi") (V64HI "hi") (V64SI "si")
***************
*** 44,49 ****
--- 80,103 ----
    [(V64QI "QI") (V64HI "HI") (V64SI "SI")
     (V64HF "HF") (V64SF "SF") (V64DI "DI") (V64DF "DF")])
  
+ (define_mode_attr vnsi
+   [(V64QI "v64si") (V64HI "v64si") (V64HF "v64si") (V64SI "v64si")
+    (V64SF "v64si") (V64DI "v64si") (V64DF "v64si")])
+ 
+ (define_mode_attr VnSI
+   [(V64QI "V64SI") (V64HI "V64SI") (V64HF "V64SI") (V64SI "V64SI")
+    (V64SF "V64SI") (V64DI "V64SI") (V64DF "V64SI")])
+ 
+ (define_mode_attr vndi
+   [(V64QI "v64di") (V64HI "v64di") (V64HF "v64di") (V64SI "v64di")
+    (V64SF "v64di") (V64DI "v64di") (V64DF "v64di")])
+ 
+ (define_mode_attr VnDI
+   [(V64QI "V64DI") (V64HI "V64DI") (V64HF "V64DI") (V64SI "V64DI")
+    (V64SF "V64DI") (V64DI "V64DI") (V64DF "V64DI")])
+ 
+ (define_mode_attr sdwa [(V64QI "BYTE_0") (V64HI "WORD_0") (V64SI "DWORD")])
+ 
  ;; }}}
  ;; {{{ Substitutions
  
***************
*** 57,95 ****
  		   "" "_exec")
  
  (define_subst "vec_merge"
!   [(set (match_operand:VEC_REG_MODE 0)
! 	(match_operand:VEC_REG_MODE 1))]
    ""
    [(set (match_dup 0)
! 	(vec_merge:VEC_REG_MODE
  	  (match_dup 1)
! 	  (match_operand:VEC_REG_MODE 3 "gcn_register_or_unspec_operand" "U0")
  	  (match_operand:DI 4 "gcn_exec_reg_operand" "e")))])
  
  (define_subst "vec_merge_with_clobber"
!   [(set (match_operand:VEC_REG_MODE 0)
! 	(match_operand:VEC_REG_MODE 1))
     (clobber (match_operand 2))]
    ""
    [(set (match_dup 0)
! 	(vec_merge:VEC_REG_MODE
  	  (match_dup 1)
! 	  (match_operand:VEC_REG_MODE 3 "gcn_register_or_unspec_operand" "U0")
  	  (match_operand:DI 4 "gcn_exec_reg_operand" "e")))
     (clobber (match_dup 2))])
  
  (define_subst "vec_merge_with_vcc"
!   [(set (match_operand:VEC_REG_MODE 0)
! 	(match_operand:VEC_REG_MODE 1))
     (set (match_operand:DI 2)
  	(match_operand:DI 3))]
    ""
    [(parallel
       [(set (match_dup 0)
! 	   (vec_merge:VEC_REG_MODE
  	     (match_dup 1)
! 	     (match_operand:VEC_REG_MODE 4
! 					 "gcn_register_or_unspec_operand" "U0")
  	     (match_operand:DI 5 "gcn_exec_reg_operand" "e")))
        (set (match_dup 2)
  	   (and:DI (match_dup 3)
--- 111,148 ----
  		   "" "_exec")
  
  (define_subst "vec_merge"
!   [(set (match_operand:V_ALL 0)
! 	(match_operand:V_ALL 1))]
    ""
    [(set (match_dup 0)
! 	(vec_merge:V_ALL
  	  (match_dup 1)
! 	  (match_operand:V_ALL 3 "gcn_register_or_unspec_operand" "U0")
  	  (match_operand:DI 4 "gcn_exec_reg_operand" "e")))])
  
  (define_subst "vec_merge_with_clobber"
!   [(set (match_operand:V_ALL 0)
! 	(match_operand:V_ALL 1))
     (clobber (match_operand 2))]
    ""
    [(set (match_dup 0)
! 	(vec_merge:V_ALL
  	  (match_dup 1)
! 	  (match_operand:V_ALL 3 "gcn_register_or_unspec_operand" "U0")
  	  (match_operand:DI 4 "gcn_exec_reg_operand" "e")))
     (clobber (match_dup 2))])
  
  (define_subst "vec_merge_with_vcc"
!   [(set (match_operand:V_ALL 0)
! 	(match_operand:V_ALL 1))
     (set (match_operand:DI 2)
  	(match_operand:DI 3))]
    ""
    [(parallel
       [(set (match_dup 0)
! 	   (vec_merge:V_ALL
  	     (match_dup 1)
! 	     (match_operand:V_ALL 4 "gcn_register_or_unspec_operand" "U0")
  	     (match_operand:DI 5 "gcn_exec_reg_operand" "e")))
        (set (match_dup 2)
  	   (and:DI (match_dup 3)
***************
*** 121,134 ****
  ; gather/scatter, maskload/store, etc.
  
  (define_expand "mov<mode>"
!   [(set (match_operand:VEC_REG_MODE 0 "nonimmediate_operand")
! 	(match_operand:VEC_REG_MODE 1 "general_operand"))]
    ""
    {
      if (MEM_P (operands[0]) && !lra_in_progress && !reload_completed)
        {
  	operands[1] = force_reg (<MODE>mode, operands[1]);
! 	rtx scratch = gen_rtx_SCRATCH (V64DImode);
  	rtx a = gen_rtx_CONST_INT (VOIDmode, MEM_ADDR_SPACE (operands[0]));
  	rtx v = gen_rtx_CONST_INT (VOIDmode, MEM_VOLATILE_P (operands[0]));
  	rtx expr = gcn_expand_scalar_to_vector_address (<MODE>mode, NULL,
--- 174,187 ----
  ; gather/scatter, maskload/store, etc.
  
  (define_expand "mov<mode>"
!   [(set (match_operand:V_ALL 0 "nonimmediate_operand")
! 	(match_operand:V_ALL 1 "general_operand"))]
    ""
    {
      if (MEM_P (operands[0]) && !lra_in_progress && !reload_completed)
        {
  	operands[1] = force_reg (<MODE>mode, operands[1]);
! 	rtx scratch = gen_rtx_SCRATCH (<VnDI>mode);
  	rtx a = gen_rtx_CONST_INT (VOIDmode, MEM_ADDR_SPACE (operands[0]));
  	rtx v = gen_rtx_CONST_INT (VOIDmode, MEM_VOLATILE_P (operands[0]));
  	rtx expr = gcn_expand_scalar_to_vector_address (<MODE>mode, NULL,
***************
*** 139,145 ****
        }
      else if (MEM_P (operands[1]) && !lra_in_progress && !reload_completed)
        {
! 	rtx scratch = gen_rtx_SCRATCH (V64DImode);
  	rtx a = gen_rtx_CONST_INT (VOIDmode, MEM_ADDR_SPACE (operands[1]));
  	rtx v = gen_rtx_CONST_INT (VOIDmode, MEM_VOLATILE_P (operands[1]));
  	rtx expr = gcn_expand_scalar_to_vector_address (<MODE>mode, NULL,
--- 192,198 ----
        }
      else if (MEM_P (operands[1]) && !lra_in_progress && !reload_completed)
        {
! 	rtx scratch = gen_rtx_SCRATCH (<VnDI>mode);
  	rtx a = gen_rtx_CONST_INT (VOIDmode, MEM_ADDR_SPACE (operands[1]));
  	rtx v = gen_rtx_CONST_INT (VOIDmode, MEM_VOLATILE_P (operands[1]));
  	rtx expr = gcn_expand_scalar_to_vector_address (<MODE>mode, NULL,
***************
*** 151,157 ****
      else if ((MEM_P (operands[0]) || MEM_P (operands[1])))
        {
          gcc_assert (!reload_completed);
! 	rtx scratch = gen_reg_rtx (V64DImode);
  	emit_insn (gen_mov<mode>_sgprbase (operands[0], operands[1], scratch));
  	DONE;
        }
--- 204,210 ----
      else if ((MEM_P (operands[0]) || MEM_P (operands[1])))
        {
          gcc_assert (!reload_completed);
! 	rtx scratch = gen_reg_rtx (<VnDI>mode);
  	emit_insn (gen_mov<mode>_sgprbase (operands[0], operands[1], scratch));
  	DONE;
        }
***************
*** 160,196 ****
  ; A pseudo instruction that helps LRA use the "U0" constraint.
  
  (define_insn "mov<mode>_unspec"
!   [(set (match_operand:VEC_REG_MODE 0 "nonimmediate_operand" "=v")
! 	(match_operand:VEC_REG_MODE 1 "gcn_unspec_operand"   " U"))]
    ""
    ""
    [(set_attr "type" "unknown")
     (set_attr "length" "0")])
  
  (define_insn "*mov<mode>"
!   [(set (match_operand:VEC_1REG_MODE 0 "nonimmediate_operand" "=v,v")
! 	(match_operand:VEC_1REG_MODE 1 "general_operand"      "vA,B"))]
    ""
    "v_mov_b32\t%0, %1"
    [(set_attr "type" "vop1,vop1")
     (set_attr "length" "4,8")])
  
  (define_insn "mov<mode>_exec"
!   [(set (match_operand:VEC_1REG_MODE 0 "nonimmediate_operand"
! 							 "=v, v, v, v, v, m")
! 	(vec_merge:VEC_1REG_MODE
! 	  (match_operand:VEC_1REG_MODE 1 "general_operand"
! 							 "vA, B, v,vA, m, v")
! 	  (match_operand:VEC_1REG_MODE 3 "gcn_alu_or_unspec_operand"
  							 "U0,U0,vA,vA,U0,U0")
! 	  (match_operand:DI 2 "register_operand"	 " e, e,cV,Sv, e, e")))
!    (clobber (match_scratch:V64DI 4			 "=X, X, X, X,&v,&v"))]
    "!MEM_P (operands[0]) || REG_P (operands[1])"
    "@
     v_mov_b32\t%0, %1
     v_mov_b32\t%0, %1
!    v_cndmask_b32\t%0, %3, %1, vcc
!    v_cndmask_b32\t%0, %3, %1, %2
     #
     #"
    [(set_attr "type" "vop1,vop1,vop2,vop3a,*,*")
--- 213,247 ----
  ; A pseudo instruction that helps LRA use the "U0" constraint.
  
  (define_insn "mov<mode>_unspec"
!   [(set (match_operand:V_ALL 0 "nonimmediate_operand" "=v")
! 	(match_operand:V_ALL 1 "gcn_unspec_operand"   " U"))]
    ""
    ""
    [(set_attr "type" "unknown")
     (set_attr "length" "0")])
  
  (define_insn "*mov<mode>"
!   [(set (match_operand:V_1REG 0 "nonimmediate_operand" "=v,v")
! 	(match_operand:V_1REG 1 "general_operand"      "vA,B"))]
    ""
    "v_mov_b32\t%0, %1"
    [(set_attr "type" "vop1,vop1")
     (set_attr "length" "4,8")])
  
  (define_insn "mov<mode>_exec"
!   [(set (match_operand:V_1REG 0 "nonimmediate_operand"	 "=v, v, v, v, v, m")
! 	(vec_merge:V_1REG
! 	  (match_operand:V_1REG 1 "general_operand"	 "vA, B, v,vA, m, v")
! 	  (match_operand:V_1REG 2 "gcn_alu_or_unspec_operand"
  							 "U0,U0,vA,vA,U0,U0")
! 	  (match_operand:DI 3 "register_operand"	 " e, e,cV,Sv, e, e")))
!    (clobber (match_scratch:<VnDI> 4			 "=X, X, X, X,&v,&v"))]
    "!MEM_P (operands[0]) || REG_P (operands[1])"
    "@
     v_mov_b32\t%0, %1
     v_mov_b32\t%0, %1
!    v_cndmask_b32\t%0, %2, %1, vcc
!    v_cndmask_b32\t%0, %2, %1, %3
     #
     #"
    [(set_attr "type" "vop1,vop1,vop2,vop3a,*,*")
***************
*** 200,211 ****
  ; read/modify/write which is necessary for maskstore.
  
  ;(define_insn "*mov<mode>_exec_match"
! ;  [(set (match_operand:VEC_1REG_MODE 0 "nonimmediate_operand" "=v,v, v, m")
! ;	(vec_merge:VEC_1REG_MODE
! ;	  (match_operand:VEC_1REG_MODE 1 "general_operand"    "vA,B, m, v")
  ;	  (match_dup 0)
! ;	  (match_operand:DI 2 "gcn_exec_reg_operand"	      " e,e, e, e")))
! ;   (clobber (match_scratch:V64DI 3			      "=X,X,&v,&v"))]
  ;  "!MEM_P (operands[0]) || REG_P (operands[1])"
  ;  "@
  ;  v_mov_b32\t%0, %1
--- 251,262 ----
  ; read/modify/write which is necessary for maskstore.
  
  ;(define_insn "*mov<mode>_exec_match"
! ;  [(set (match_operand:V_1REG 0 "nonimmediate_operand" "=v,v, v, m")
! ;	(vec_merge:V_1REG
! ;	  (match_operand:V_1REG 1 "general_operand"	"vA,B, m, v")
  ;	  (match_dup 0)
! ;	  (match_operand:DI 2 "gcn_exec_reg_operand"	" e,e, e, e")))
! ;   (clobber (match_scratch:<VnDI> 3			"=X,X,&v,&v"))]
  ;  "!MEM_P (operands[0]) || REG_P (operands[1])"
  ;  "@
  ;  v_mov_b32\t%0, %1
***************
*** 216,223 ****
  ;   (set_attr "length" "4,8,16,16")])
  
  (define_insn "*mov<mode>"
!   [(set (match_operand:VEC_2REG_MODE 0 "nonimmediate_operand"  "=v")
! 	(match_operand:VEC_2REG_MODE 1 "general_operand"      "vDB"))]
    ""
    {
      if (!REG_P (operands[1]) || REGNO (operands[0]) <= REGNO (operands[1]))
--- 267,274 ----
  ;   (set_attr "length" "4,8,16,16")])
  
  (define_insn "*mov<mode>"
!   [(set (match_operand:V_2REG 0 "nonimmediate_operand" "=v")
! 	(match_operand:V_2REG 1 "general_operand"      "vDB"))]
    ""
    {
      if (!REG_P (operands[1]) || REGNO (operands[0]) <= REGNO (operands[1]))
***************
*** 229,243 ****
     (set_attr "length" "16")])
  
  (define_insn "mov<mode>_exec"
!   [(set (match_operand:VEC_2REG_MODE 0 "nonimmediate_operand"
! 						       "= v,   v,   v, v, m")
! 	(vec_merge:VEC_2REG_MODE
! 	  (match_operand:VEC_2REG_MODE 1 "general_operand"
! 						       "vDB,  v0,  v0, m, v")
! 	  (match_operand:VEC_2REG_MODE 3 "gcn_alu_or_unspec_operand"
  						       " U0,vDA0,vDA0,U0,U0")
! 	  (match_operand:DI 2 "register_operand"       "  e,  cV,  Sv, e, e")))
!    (clobber (match_scratch:V64DI 4		       "= X,   X,   X,&v,&v"))]
    "!MEM_P (operands[0]) || REG_P (operands[1])"
    {
      if (!REG_P (operands[1]) || REGNO (operands[0]) <= REGNO (operands[1]))
--- 280,292 ----
     (set_attr "length" "16")])
  
  (define_insn "mov<mode>_exec"
!   [(set (match_operand:V_2REG 0 "nonimmediate_operand" "= v,   v,   v, v, m")
! 	(vec_merge:V_2REG
! 	  (match_operand:V_2REG 1 "general_operand"    "vDB,  v0,  v0, m, v")
! 	  (match_operand:V_2REG 2 "gcn_alu_or_unspec_operand"
  						       " U0,vDA0,vDA0,U0,U0")
! 	  (match_operand:DI 3 "register_operand"       "  e,  cV,  Sv, e, e")))
!    (clobber (match_scratch:<VnDI> 4		       "= X,   X,   X,&v,&v"))]
    "!MEM_P (operands[0]) || REG_P (operands[1])"
    {
      if (!REG_P (operands[1]) || REGNO (operands[0]) <= REGNO (operands[1]))
***************
*** 246,256 ****
  	case 0:
  	  return "v_mov_b32\t%L0, %L1\;v_mov_b32\t%H0, %H1";
  	case 1:
! 	  return "v_cndmask_b32\t%L0, %L3, %L1, vcc\;"
! 		 "v_cndmask_b32\t%H0, %H3, %H1, vcc";
  	case 2:
! 	  return "v_cndmask_b32\t%L0, %L3, %L1, %2\;"
! 		 "v_cndmask_b32\t%H0, %H3, %H1, %2";
  	}
      else
        switch (which_alternative)
--- 295,305 ----
  	case 0:
  	  return "v_mov_b32\t%L0, %L1\;v_mov_b32\t%H0, %H1";
  	case 1:
! 	  return "v_cndmask_b32\t%L0, %L2, %L1, vcc\;"
! 		 "v_cndmask_b32\t%H0, %H2, %H1, vcc";
  	case 2:
! 	  return "v_cndmask_b32\t%L0, %L2, %L1, %3\;"
! 		 "v_cndmask_b32\t%H0, %H2, %H1, %3";
  	}
      else
        switch (which_alternative)
***************
*** 258,268 ****
  	case 0:
  	  return "v_mov_b32\t%H0, %H1\;v_mov_b32\t%L0, %L1";
  	case 1:
! 	  return "v_cndmask_b32\t%H0, %H3, %H1, vcc\;"
! 		 "v_cndmask_b32\t%L0, %L3, %L1, vcc";
  	case 2:
! 	  return "v_cndmask_b32\t%H0, %H3, %H1, %2\;"
! 		 "v_cndmask_b32\t%L0, %L3, %L1, %2";
  	}
  
      return "#";
--- 307,317 ----
  	case 0:
  	  return "v_mov_b32\t%H0, %H1\;v_mov_b32\t%L0, %L1";
  	case 1:
! 	  return "v_cndmask_b32\t%H0, %H2, %H1, vcc\;"
! 		 "v_cndmask_b32\t%L0, %L2, %L1, vcc";
  	case 2:
! 	  return "v_cndmask_b32\t%H0, %H2, %H1, %3\;"
! 		 "v_cndmask_b32\t%L0, %L2, %L1, %3";
  	}
  
      return "#";
***************
*** 274,285 ****
  ; read/modify/write which is necessary for maskstore.
  
  ;(define_insn "*mov<mode>_exec_match"
! ;  [(set (match_operand:VEC_2REG_MODE 0 "nonimmediate_operand" "=v, v, m")
! ;	(vec_merge:VEC_2REG_MODE
! ;	  (match_operand:VEC_2REG_MODE 1 "general_operand"   "vDB, m, v")
  ;	  (match_dup 0)
! ;	  (match_operand:DI 2 "gcn_exec_reg_operand"	      " e, e, e")))
! ;   (clobber (match_scratch:V64DI 3			      "=X,&v,&v"))]
  ;  "!MEM_P (operands[0]) || REG_P (operands[1])"
  ;  "@
  ;   * if (!REG_P (operands[1]) || REGNO (operands[0]) <= REGNO (operands[1])) \
--- 323,334 ----
  ; read/modify/write which is necessary for maskstore.
  
  ;(define_insn "*mov<mode>_exec_match"
! ;  [(set (match_operand:V_2REG 0 "nonimmediate_operand" "=v, v, m")
! ;	(vec_merge:V_2REG
! ;	  (match_operand:V_2REG 1 "general_operand"	"vDB, m, v")
  ;	  (match_dup 0)
! ;	  (match_operand:DI 2 "gcn_exec_reg_operand"	" e, e, e")))
! ;   (clobber (match_scratch:<VnDI> 3			"=X,&v,&v"))]
  ;  "!MEM_P (operands[0]) || REG_P (operands[1])"
  ;  "@
  ;   * if (!REG_P (operands[1]) || REGNO (operands[0]) <= REGNO (operands[1])) \
***************
*** 304,314 ****
  ;   flat_load v, vT
  
  (define_insn "mov<mode>_sgprbase"
!   [(set (match_operand:VEC_1REG_MODE 0 "nonimmediate_operand" "= v, v, v, m")
! 	(unspec:VEC_1REG_MODE
! 	  [(match_operand:VEC_1REG_MODE 1 "general_operand"   " vA,vB, m, v")]
  	  UNSPEC_SGPRBASE))
!    (clobber (match_operand:V64DI 2 "register_operand"	      "=&v,&v,&v,&v"))]
    "lra_in_progress || reload_completed"
    "@
     v_mov_b32\t%0, %1
--- 353,363 ----
  ;   flat_load v, vT
  
  (define_insn "mov<mode>_sgprbase"
!   [(set (match_operand:V_1REG 0 "nonimmediate_operand" "= v, v, v, m")
! 	(unspec:V_1REG
! 	  [(match_operand:V_1REG 1 "general_operand"   " vA,vB, m, v")]
  	  UNSPEC_SGPRBASE))
!    (clobber (match_operand:<VnDI> 2 "register_operand"  "=&v,&v,&v,&v"))]
    "lra_in_progress || reload_completed"
    "@
     v_mov_b32\t%0, %1
***************
*** 319,329 ****
     (set_attr "length" "4,8,12,12")])
  
  (define_insn "mov<mode>_sgprbase"
!   [(set (match_operand:VEC_2REG_MODE 0 "nonimmediate_operand" "= v, v, m")
! 	(unspec:VEC_2REG_MODE
! 	  [(match_operand:VEC_2REG_MODE 1 "general_operand"   "vDB, m, v")]
  	  UNSPEC_SGPRBASE))
!    (clobber (match_operand:V64DI 2 "register_operand"	      "=&v,&v,&v"))]
    "lra_in_progress || reload_completed"
    "@
     * if (!REG_P (operands[1]) || REGNO (operands[0]) <= REGNO (operands[1])) \
--- 368,378 ----
     (set_attr "length" "4,8,12,12")])
  
  (define_insn "mov<mode>_sgprbase"
!   [(set (match_operand:V_2REG 0 "nonimmediate_operand" "= v, v, m")
! 	(unspec:V_2REG
! 	  [(match_operand:V_2REG 1 "general_operand"   "vDB, m, v")]
  	  UNSPEC_SGPRBASE))
!    (clobber (match_operand:<VnDI> 2 "register_operand"  "=&v,&v,&v"))]
    "lra_in_progress || reload_completed"
    "@
     * if (!REG_P (operands[1]) || REGNO (operands[0]) <= REGNO (operands[1])) \
***************
*** 339,347 ****
  ; gcn_secondary_reload.  It allows a reload with a scratch register.
  
  (define_expand "reload_in<mode>"
!   [(set (match_operand:VEC_REG_MODE 0 "register_operand" "= v")
! 	(match_operand:VEC_REG_MODE 1 "memory_operand"   "  m"))
!    (clobber (match_operand:V64DI 2 "register_operand"    "=&v"))]
    ""
    {
      emit_insn (gen_mov<mode>_sgprbase (operands[0], operands[1], operands[2]));
--- 388,396 ----
  ; gcn_secondary_reload.  It allows a reload with a scratch register.
  
  (define_expand "reload_in<mode>"
!   [(set (match_operand:V_ALL 0 "register_operand"     "= v")
! 	(match_operand:V_ALL 1 "memory_operand"	      "  m"))
!    (clobber (match_operand:<VnDI> 2 "register_operand" "=&v"))]
    ""
    {
      emit_insn (gen_mov<mode>_sgprbase (operands[0], operands[1], operands[2]));
***************
*** 351,359 ****
  ; reload_out is similar to reload_in, above.
  
  (define_expand "reload_out<mode>"
!   [(set (match_operand:VEC_REG_MODE 0 "memory_operand"   "= m")
! 	(match_operand:VEC_REG_MODE 1 "register_operand" "  v"))
!    (clobber (match_operand:V64DI 2 "register_operand"    "=&v"))]
    ""
    {
      emit_insn (gen_mov<mode>_sgprbase (operands[0], operands[1], operands[2]));
--- 400,408 ----
  ; reload_out is similar to reload_in, above.
  
  (define_expand "reload_out<mode>"
!   [(set (match_operand:V_ALL 0 "memory_operand"	      "= m")
! 	(match_operand:V_ALL 1 "register_operand"     "  v"))
!    (clobber (match_operand:<VnDI> 2 "register_operand" "=&v"))]
    ""
    {
      emit_insn (gen_mov<mode>_sgprbase (operands[0], operands[1], operands[2]));
***************
*** 363,373 ****
  ; Expand scalar addresses into gather/scatter patterns
  
  (define_split
!   [(set (match_operand:VEC_REG_MODE 0 "memory_operand")
! 	(unspec:VEC_REG_MODE
! 	  [(match_operand:VEC_REG_MODE 1 "general_operand")]
  	  UNSPEC_SGPRBASE))
!    (clobber (match_scratch:V64DI 2))]
    ""
    [(set (mem:BLK (scratch))
  	(unspec:BLK [(match_dup 5) (match_dup 1) (match_dup 6) (match_dup 7)]
--- 412,422 ----
  ; Expand scalar addresses into gather/scatter patterns
  
  (define_split
!   [(set (match_operand:V_ALL 0 "memory_operand")
! 	(unspec:V_ALL
! 	  [(match_operand:V_ALL 1 "general_operand")]
  	  UNSPEC_SGPRBASE))
!    (clobber (match_scratch:<VnDI> 2))]
    ""
    [(set (mem:BLK (scratch))
  	(unspec:BLK [(match_dup 5) (match_dup 1) (match_dup 6) (match_dup 7)]
***************
*** 381,392 ****
    })
  
  (define_split
!   [(set (match_operand:VEC_REG_MODE 0 "memory_operand")
! 	(vec_merge:VEC_REG_MODE
! 	  (match_operand:VEC_REG_MODE 1 "general_operand")
! 	  (match_operand:VEC_REG_MODE 2 "")
  	  (match_operand:DI 3 "gcn_exec_reg_operand")))
!    (clobber (match_scratch:V64DI 4))]
    ""
    [(set (mem:BLK (scratch))
  	(unspec:BLK [(match_dup 5) (match_dup 1)
--- 430,441 ----
    })
  
  (define_split
!   [(set (match_operand:V_ALL 0 "memory_operand")
! 	(vec_merge:V_ALL
! 	  (match_operand:V_ALL 1 "general_operand")
! 	  (match_operand:V_ALL 2 "")
  	  (match_operand:DI 3 "gcn_exec_reg_operand")))
!    (clobber (match_scratch:<VnDI> 4))]
    ""
    [(set (mem:BLK (scratch))
  	(unspec:BLK [(match_dup 5) (match_dup 1)
***************
*** 402,417 ****
    })
  
  (define_split
!   [(set (match_operand:VEC_REG_MODE 0 "nonimmediate_operand")
! 	(unspec:VEC_REG_MODE
! 	  [(match_operand:VEC_REG_MODE 1 "memory_operand")]
  	  UNSPEC_SGPRBASE))
!    (clobber (match_scratch:V64DI 2))]
    ""
    [(set (match_dup 0)
! 	(unspec:VEC_REG_MODE [(match_dup 5) (match_dup 6) (match_dup 7)
! 			      (mem:BLK (scratch))]
! 			     UNSPEC_GATHER))]
    {
      operands[5] = gcn_expand_scalar_to_vector_address (<MODE>mode, NULL,
  						       operands[1],
--- 451,466 ----
    })
  
  (define_split
!   [(set (match_operand:V_ALL 0 "nonimmediate_operand")
! 	(unspec:V_ALL
! 	  [(match_operand:V_ALL 1 "memory_operand")]
  	  UNSPEC_SGPRBASE))
!    (clobber (match_scratch:<VnDI> 2))]
    ""
    [(set (match_dup 0)
! 	(unspec:V_ALL [(match_dup 5) (match_dup 6) (match_dup 7)
! 		       (mem:BLK (scratch))]
! 		      UNSPEC_GATHER))]
    {
      operands[5] = gcn_expand_scalar_to_vector_address (<MODE>mode, NULL,
  						       operands[1],
***************
*** 421,438 ****
    })
  
  (define_split
!   [(set (match_operand:VEC_REG_MODE 0 "nonimmediate_operand")
! 	(vec_merge:VEC_REG_MODE
! 	  (match_operand:VEC_REG_MODE 1 "memory_operand")
! 	  (match_operand:VEC_REG_MODE 2 "")
  	  (match_operand:DI 3 "gcn_exec_reg_operand")))
!    (clobber (match_scratch:V64DI 4))]
    ""
    [(set (match_dup 0)
! 	(vec_merge:VEC_REG_MODE
! 	  (unspec:VEC_REG_MODE [(match_dup 5) (match_dup 6) (match_dup 7)
! 				(mem:BLK (scratch))]
! 			       UNSPEC_GATHER)
  	  (match_dup 2)
  	  (match_dup 3)))]
    {
--- 470,487 ----
    })
  
  (define_split
!   [(set (match_operand:V_ALL 0 "nonimmediate_operand")
! 	(vec_merge:V_ALL
! 	  (match_operand:V_ALL 1 "memory_operand")
! 	  (match_operand:V_ALL 2 "")
  	  (match_operand:DI 3 "gcn_exec_reg_operand")))
!    (clobber (match_scratch:<VnDI> 4))]
    ""
    [(set (match_dup 0)
! 	(vec_merge:V_ALL
! 	  (unspec:V_ALL [(match_dup 5) (match_dup 6) (match_dup 7)
! 			 (mem:BLK (scratch))]
! 			 UNSPEC_GATHER)
  	  (match_dup 2)
  	  (match_dup 3)))]
    {
***************
*** 455,468 ****
  ; FIXME these should take A immediates
  
  (define_insn "*vec_set<mode>"
!   [(set (match_operand:VEC_1REG_MODE 0 "register_operand"            "= v")
! 	(vec_merge:VEC_1REG_MODE
! 	  (vec_duplicate:VEC_1REG_MODE
! 	    (match_operand:<SCALAR_MODE> 1 "register_operand"	     " Sv"))
! 	  (match_operand:VEC_1REG_MODE 3 "gcn_register_or_unspec_operand"
! 								     " U0")
  	  (ashift (const_int 1)
! 		  (match_operand:SI 2 "gcn_alu_operand"		     "SvB"))))]
    ""
    "v_writelane_b32 %0, %1, %2"
    [(set_attr "type" "vop3a")
--- 504,516 ----
  ; FIXME these should take A immediates
  
  (define_insn "*vec_set<mode>"
!   [(set (match_operand:V_1REG 0 "register_operand"		   "= v")
! 	(vec_merge:V_1REG
! 	  (vec_duplicate:V_1REG
! 	    (match_operand:<SCALAR_MODE> 1 "register_operand"	   " Sv"))
! 	  (match_operand:V_1REG 3 "gcn_register_or_unspec_operand" " U0")
  	  (ashift (const_int 1)
! 		  (match_operand:SI 2 "gcn_alu_operand"		   "SvB"))))]
    ""
    "v_writelane_b32 %0, %1, %2"
    [(set_attr "type" "vop3a")
***************
*** 473,486 ****
  ; FIXME: 64bit operations really should be splitters, but I am not sure how
  ; to represent vertical subregs.
  (define_insn "*vec_set<mode>"
!   [(set (match_operand:VEC_2REG_MODE 0 "register_operand"	     "= v")
! 	(vec_merge:VEC_2REG_MODE
! 	  (vec_duplicate:VEC_2REG_MODE
! 	    (match_operand:<SCALAR_MODE> 1 "register_operand"	     " Sv"))
! 	  (match_operand:VEC_2REG_MODE 3 "gcn_register_or_unspec_operand"
! 								     " U0")
  	  (ashift (const_int 1)
! 		  (match_operand:SI 2 "gcn_alu_operand"		     "SvB"))))]
    ""
    "v_writelane_b32 %L0, %L1, %2\;v_writelane_b32 %H0, %H1, %2"
    [(set_attr "type" "vmult")
--- 521,533 ----
  ; FIXME: 64bit operations really should be splitters, but I am not sure how
  ; to represent vertical subregs.
  (define_insn "*vec_set<mode>"
!   [(set (match_operand:V_2REG 0 "register_operand"		   "= v")
! 	(vec_merge:V_2REG
! 	  (vec_duplicate:V_2REG
! 	    (match_operand:<SCALAR_MODE> 1 "register_operand"	   " Sv"))
! 	  (match_operand:V_2REG 3 "gcn_register_or_unspec_operand" " U0")
  	  (ashift (const_int 1)
! 		  (match_operand:SI 2 "gcn_alu_operand"		   "SvB"))))]
    ""
    "v_writelane_b32 %L0, %L1, %2\;v_writelane_b32 %H0, %H1, %2"
    [(set_attr "type" "vmult")
***************
*** 489,511 ****
     (set_attr "laneselect" "yes")])
  
  (define_expand "vec_set<mode>"
!   [(set (match_operand:VEC_REG_MODE 0 "register_operand")
! 	(vec_merge:VEC_REG_MODE
! 	  (vec_duplicate:VEC_REG_MODE
  	    (match_operand:<SCALAR_MODE> 1 "register_operand"))
  	  (match_dup 0)
  	  (ashift (const_int 1) (match_operand:SI 2 "gcn_alu_operand"))))]
    "")
  
  (define_insn "*vec_set<mode>_1"
!   [(set (match_operand:VEC_1REG_MODE 0 "register_operand"	       "=v")
! 	(vec_merge:VEC_1REG_MODE
! 	  (vec_duplicate:VEC_1REG_MODE
! 	    (match_operand:<SCALAR_MODE> 1 "register_operand"	       "Sv"))
! 	  (match_operand:VEC_1REG_MODE 3 "gcn_register_or_unspec_operand"
! 								       "U0")
! 	  (match_operand:SI 2 "const_int_operand"	               " i")))]
!   "((unsigned) exact_log2 (INTVAL (operands[2])) < 64)"
    {
      operands[2] = GEN_INT (exact_log2 (INTVAL (operands[2])));
      return "v_writelane_b32 %0, %1, %2";
--- 536,557 ----
     (set_attr "laneselect" "yes")])
  
  (define_expand "vec_set<mode>"
!   [(set (match_operand:V_ALL 0 "register_operand")
! 	(vec_merge:V_ALL
! 	  (vec_duplicate:V_ALL
  	    (match_operand:<SCALAR_MODE> 1 "register_operand"))
  	  (match_dup 0)
  	  (ashift (const_int 1) (match_operand:SI 2 "gcn_alu_operand"))))]
    "")
  
  (define_insn "*vec_set<mode>_1"
!   [(set (match_operand:V_1REG 0 "register_operand"		   "=v")
! 	(vec_merge:V_1REG
! 	  (vec_duplicate:V_1REG
! 	    (match_operand:<SCALAR_MODE> 1 "register_operand"	   "Sv"))
! 	  (match_operand:V_1REG 3 "gcn_register_or_unspec_operand" "U0")
! 	  (match_operand:SI 2 "const_int_operand"		   " i")))]
!   "((unsigned) exact_log2 (INTVAL (operands[2])) < GET_MODE_NUNITS (<MODE>mode))"
    {
      operands[2] = GEN_INT (exact_log2 (INTVAL (operands[2])));
      return "v_writelane_b32 %0, %1, %2";
***************
*** 516,529 ****
     (set_attr "laneselect" "yes")])
  
  (define_insn "*vec_set<mode>_1"
!   [(set (match_operand:VEC_2REG_MODE 0 "register_operand"	       "=v")
! 	(vec_merge:VEC_2REG_MODE
! 	  (vec_duplicate:VEC_2REG_MODE
! 	    (match_operand:<SCALAR_MODE> 1 "register_operand"	       "Sv"))
! 	  (match_operand:VEC_2REG_MODE 3 "gcn_register_or_unspec_operand"
! 								       "U0")
! 	  (match_operand:SI 2 "const_int_operand"		       " i")))]
!   "((unsigned) exact_log2 (INTVAL (operands[2])) < 64)"
    {
      operands[2] = GEN_INT (exact_log2 (INTVAL (operands[2])));
      return "v_writelane_b32 %L0, %L1, %2\;v_writelane_b32 %H0, %H1, %2";
--- 562,574 ----
     (set_attr "laneselect" "yes")])
  
  (define_insn "*vec_set<mode>_1"
!   [(set (match_operand:V_2REG 0 "register_operand"		   "=v")
! 	(vec_merge:V_2REG
! 	  (vec_duplicate:V_2REG
! 	    (match_operand:<SCALAR_MODE> 1 "register_operand"	   "Sv"))
! 	  (match_operand:V_2REG 3 "gcn_register_or_unspec_operand" "U0")
! 	  (match_operand:SI 2 "const_int_operand"		   " i")))]
!   "((unsigned) exact_log2 (INTVAL (operands[2])) < GET_MODE_NUNITS (<MODE>mode))"
    {
      operands[2] = GEN_INT (exact_log2 (INTVAL (operands[2])));
      return "v_writelane_b32 %L0, %L1, %2\;v_writelane_b32 %H0, %H1, %2";
***************
*** 534,541 ****
     (set_attr "laneselect" "yes")])
  
  (define_insn "vec_duplicate<mode><exec>"
!   [(set (match_operand:VEC_1REG_MODE 0 "register_operand"  "=v")
! 	(vec_duplicate:VEC_1REG_MODE
  	  (match_operand:<SCALAR_MODE> 1 "gcn_alu_operand" "SvB")))]
    ""
    "v_mov_b32\t%0, %1"
--- 579,586 ----
     (set_attr "laneselect" "yes")])
  
  (define_insn "vec_duplicate<mode><exec>"
!   [(set (match_operand:V_1REG 0 "register_operand"	   "=v")
! 	(vec_duplicate:V_1REG
  	  (match_operand:<SCALAR_MODE> 1 "gcn_alu_operand" "SvB")))]
    ""
    "v_mov_b32\t%0, %1"
***************
*** 543,550 ****
     (set_attr "length" "8")])
  
  (define_insn "vec_duplicate<mode><exec>"
!   [(set (match_operand:VEC_2REG_MODE 0 "register_operand"  "=  v")
! 	(vec_duplicate:VEC_2REG_MODE
  	  (match_operand:<SCALAR_MODE> 1 "gcn_alu_operand" "SvDB")))]
    ""
    "v_mov_b32\t%L0, %L1\;v_mov_b32\t%H0, %H1"
--- 588,595 ----
     (set_attr "length" "8")])
  
  (define_insn "vec_duplicate<mode><exec>"
!   [(set (match_operand:V_2REG 0 "register_operand"	   "=  v")
! 	(vec_duplicate:V_2REG
  	  (match_operand:<SCALAR_MODE> 1 "gcn_alu_operand" "SvDB")))]
    ""
    "v_mov_b32\t%L0, %L1\;v_mov_b32\t%H0, %H1"
***************
*** 552,561 ****
     (set_attr "length" "16")])
  
  (define_insn "vec_extract<mode><scalar_mode>"
!   [(set (match_operand:<SCALAR_MODE> 0 "register_operand"   "=Sg")
  	(vec_select:<SCALAR_MODE>
! 	  (match_operand:VEC_1REG_MODE 1 "register_operand" "  v")
! 	  (parallel [(match_operand:SI 2 "gcn_alu_operand"  "SvB")])))]
    ""
    "v_readlane_b32 %0, %1, %2"
    [(set_attr "type" "vop3a")
--- 597,606 ----
     (set_attr "length" "16")])
  
  (define_insn "vec_extract<mode><scalar_mode>"
!   [(set (match_operand:<SCALAR_MODE> 0 "register_operand"  "=Sg")
  	(vec_select:<SCALAR_MODE>
! 	  (match_operand:V_1REG 1 "register_operand"	   "  v")
! 	  (parallel [(match_operand:SI 2 "gcn_alu_operand" "SvB")])))]
    ""
    "v_readlane_b32 %0, %1, %2"
    [(set_attr "type" "vop3a")
***************
*** 564,573 ****
     (set_attr "laneselect" "yes")])
  
  (define_insn "vec_extract<mode><scalar_mode>"
!   [(set (match_operand:<SCALAR_MODE> 0 "register_operand"   "=Sg")
  	(vec_select:<SCALAR_MODE>
! 	  (match_operand:VEC_2REG_MODE 1 "register_operand" "  v")
! 	  (parallel [(match_operand:SI 2 "gcn_alu_operand"  "SvB")])))]
    ""
    "v_readlane_b32 %L0, %L1, %2\;v_readlane_b32 %H0, %H1, %2"
    [(set_attr "type" "vmult")
--- 609,618 ----
     (set_attr "laneselect" "yes")])
  
  (define_insn "vec_extract<mode><scalar_mode>"
!   [(set (match_operand:<SCALAR_MODE> 0 "register_operand"  "=&Sg")
  	(vec_select:<SCALAR_MODE>
! 	  (match_operand:V_2REG 1 "register_operand"	   "   v")
! 	  (parallel [(match_operand:SI 2 "gcn_alu_operand" " SvB")])))]
    ""
    "v_readlane_b32 %L0, %L1, %2\;v_readlane_b32 %H0, %H1, %2"
    [(set_attr "type" "vmult")
***************
*** 575,582 ****
     (set_attr "exec" "none")
     (set_attr "laneselect" "yes")])
  
  (define_expand "vec_init<mode><scalar_mode>"
!   [(match_operand:VEC_REG_MODE 0 "register_operand")
     (match_operand 1)]
    ""
    {
--- 620,669 ----
     (set_attr "exec" "none")
     (set_attr "laneselect" "yes")])
  
+ (define_expand "extract_last_<mode>"
+   [(match_operand:<SCALAR_MODE> 0 "register_operand")
+    (match_operand:DI 1 "gcn_alu_operand")
+    (match_operand:V_ALL 2 "register_operand")]
+   "can_create_pseudo_p ()"
+   {
+     rtx dst = operands[0];
+     rtx mask = operands[1];
+     rtx vect = operands[2];
+     rtx tmpreg = gen_reg_rtx (SImode);
+ 
+     emit_insn (gen_clzdi2 (tmpreg, mask));
+     emit_insn (gen_subsi3 (tmpreg, GEN_INT (63), tmpreg));
+     emit_insn (gen_vec_extract<mode><scalar_mode> (dst, vect, tmpreg));
+     DONE;
+   })
+ 
+ (define_expand "fold_extract_last_<mode>"
+   [(match_operand:<SCALAR_MODE> 0 "register_operand")
+    (match_operand:<SCALAR_MODE> 1 "gcn_alu_operand")
+    (match_operand:DI 2 "gcn_alu_operand")
+    (match_operand:V_ALL 3 "register_operand")]
+   "can_create_pseudo_p ()"
+   {
+     rtx dst = operands[0];
+     rtx default_value = operands[1];
+     rtx mask = operands[2];
+     rtx vect = operands[3];
+     rtx else_label = gen_label_rtx ();
+     rtx end_label = gen_label_rtx ();
+ 
+     rtx cond = gen_rtx_EQ (VOIDmode, mask, const0_rtx);
+     emit_jump_insn (gen_cbranchdi4 (cond, mask, const0_rtx, else_label));
+     emit_insn (gen_extract_last_<mode> (dst, mask, vect));
+     emit_jump_insn (gen_jump (end_label));
+     emit_barrier ();
+     emit_label (else_label);
+     emit_move_insn (dst, default_value);
+     emit_label (end_label);
+     DONE;
+   })
+ 
  (define_expand "vec_init<mode><scalar_mode>"
!   [(match_operand:V_ALL 0 "register_operand")
     (match_operand 1)]
    ""
    {
***************
*** 594,600 ****
  ;; GCC does not permit MEM to hold vectors of addresses, so we must use an
  ;; unspec.  The unspec formats are as follows:
  ;;
! ;;     (unspec:V64??
  ;;	 [(<address expression>)
  ;;	  (<addr_space_t>)
  ;;	  (<use_glc>)
--- 681,687 ----
  ;; GCC does not permit MEM to hold vectors of addresses, so we must use an
  ;; unspec.  The unspec formats are as follows:
  ;;
! ;;     (unspec:V??
  ;;	 [(<address expression>)
  ;;	  (<addr_space_t>)
  ;;	  (<use_glc>)
***************
*** 617,626 ****
  ;;   fields normally found in a MEM.
  ;; - Multiple forms of address expression are supported, below.
  
! (define_expand "gather_load<mode>"
!   [(match_operand:VEC_REG_MODE 0 "register_operand")
     (match_operand:DI 1 "register_operand")
!    (match_operand 2 "register_operand")
     (match_operand 3 "immediate_operand")
     (match_operand:SI 4 "gcn_alu_operand")]
    ""
--- 704,713 ----
  ;;   fields normally found in a MEM.
  ;; - Multiple forms of address expression are supported, below.
  
! (define_expand "gather_load<mode><vnsi>"
!   [(match_operand:V_ALL 0 "register_operand")
     (match_operand:DI 1 "register_operand")
!    (match_operand:<VnSI> 2 "register_operand")
     (match_operand 3 "immediate_operand")
     (match_operand:SI 4 "gcn_alu_operand")]
    ""
***************
*** 629,635 ****
  					  operands[2], operands[4],
  					  INTVAL (operands[3]), NULL);
  
!     if (GET_MODE (addr) == V64DImode)
        emit_insn (gen_gather<mode>_insn_1offset (operands[0], addr, const0_rtx,
  						const0_rtx, const0_rtx));
      else
--- 716,722 ----
  					  operands[2], operands[4],
  					  INTVAL (operands[3]), NULL);
  
!     if (GET_MODE (addr) == <VnDI>mode)
        emit_insn (gen_gather<mode>_insn_1offset (operands[0], addr, const0_rtx,
  						const0_rtx, const0_rtx));
      else
***************
*** 639,676 ****
      DONE;
    })
  
- (define_expand "gather<mode>_exec"
-   [(match_operand:VEC_REG_MODE 0 "register_operand")
-    (match_operand:DI 1 "register_operand")
-    (match_operand:V64SI 2 "register_operand")
-    (match_operand 3 "immediate_operand")
-    (match_operand:SI 4 "gcn_alu_operand")
-    (match_operand:DI 5 "gcn_exec_reg_operand")]
-   ""
-   {
-     rtx undefmode = gcn_gen_undef (<MODE>mode);
- 
-     rtx addr = gcn_expand_scaled_offsets (DEFAULT_ADDR_SPACE, operands[1],
- 					  operands[2], operands[4],
- 					  INTVAL (operands[3]), operands[5]);
- 
-     if (GET_MODE (addr) == V64DImode)
-       emit_insn (gen_gather<mode>_insn_1offset_exec (operands[0], addr,
- 						     const0_rtx, const0_rtx,
- 						     const0_rtx, undefmode,
- 						     operands[5]));
-     else
-       emit_insn (gen_gather<mode>_insn_2offsets_exec (operands[0], operands[1],
- 						      addr, const0_rtx,
- 						      const0_rtx, const0_rtx,
- 						      undefmode, operands[5]));
-     DONE;
-   })
- 
  ; Allow any address expression
  (define_expand "gather<mode>_expr<exec>"
!   [(set (match_operand:VEC_REG_MODE 0 "register_operand")
! 	(unspec:VEC_REG_MODE
  	  [(match_operand 1 "")
  	   (match_operand 2 "immediate_operand")
  	   (match_operand 3 "immediate_operand")
--- 726,735 ----
      DONE;
    })
  
  ; Allow any address expression
  (define_expand "gather<mode>_expr<exec>"
!   [(set (match_operand:V_ALL 0 "register_operand")
! 	(unspec:V_ALL
  	  [(match_operand 1 "")
  	   (match_operand 2 "immediate_operand")
  	   (match_operand 3 "immediate_operand")
***************
*** 680,692 ****
      {})
  
  (define_insn "gather<mode>_insn_1offset<exec>"
!   [(set (match_operand:VEC_REG_MODE 0 "register_operand"	 "=v")
! 	(unspec:VEC_REG_MODE
! 	  [(plus:V64DI (match_operand:V64DI 1 "register_operand" " v")
! 		       (vec_duplicate:V64DI
! 			 (match_operand 2 "immediate_operand"	 " n")))
! 	   (match_operand 3 "immediate_operand"			 " n")
! 	   (match_operand 4 "immediate_operand"			 " n")
  	   (mem:BLK (scratch))]
  	  UNSPEC_GATHER))]
    "(AS_FLAT_P (INTVAL (operands[3]))
--- 739,751 ----
      {})
  
  (define_insn "gather<mode>_insn_1offset<exec>"
!   [(set (match_operand:V_ALL 0 "register_operand"		   "=v")
! 	(unspec:V_ALL
! 	  [(plus:<VnDI> (match_operand:<VnDI> 1 "register_operand" " v")
! 			(vec_duplicate:<VnDI>
! 			  (match_operand 2 "immediate_operand"	   " n")))
! 	   (match_operand 3 "immediate_operand"			   " n")
! 	   (match_operand 4 "immediate_operand"			   " n")
  	   (mem:BLK (scratch))]
  	  UNSPEC_GATHER))]
    "(AS_FLAT_P (INTVAL (operands[3]))
***************
*** 702,714 ****
      if (AS_FLAT_P (as))
        {
  	if (TARGET_GCN5_PLUS)
! 	  sprintf (buf, "flat_load%%s0\t%%0, %%1 offset:%%2%s\;s_waitcnt\t0",
  		   glc);
  	else
! 	  sprintf (buf, "flat_load%%s0\t%%0, %%1%s\;s_waitcnt\t0", glc);
        }
      else if (AS_GLOBAL_P (as))
!       sprintf (buf, "global_load%%s0\t%%0, %%1, off offset:%%2%s\;"
  	       "s_waitcnt\tvmcnt(0)", glc);
      else
        gcc_unreachable ();
--- 761,773 ----
      if (AS_FLAT_P (as))
        {
  	if (TARGET_GCN5_PLUS)
! 	  sprintf (buf, "flat_load%%o0\t%%0, %%1 offset:%%2%s\;s_waitcnt\t0",
  		   glc);
  	else
! 	  sprintf (buf, "flat_load%%o0\t%%0, %%1%s\;s_waitcnt\t0", glc);
        }
      else if (AS_GLOBAL_P (as))
!       sprintf (buf, "global_load%%o0\t%%0, %%1, off offset:%%2%s\;"
  	       "s_waitcnt\tvmcnt(0)", glc);
      else
        gcc_unreachable ();
***************
*** 719,731 ****
     (set_attr "length" "12")])
  
  (define_insn "gather<mode>_insn_1offset_ds<exec>"
!   [(set (match_operand:VEC_REG_MODE 0 "register_operand"	 "=v")
! 	(unspec:VEC_REG_MODE
! 	  [(plus:V64SI (match_operand:V64SI 1 "register_operand" " v")
! 		       (vec_duplicate:V64SI
! 			 (match_operand 2 "immediate_operand"	 " n")))
! 	   (match_operand 3 "immediate_operand"			 " n")
! 	   (match_operand 4 "immediate_operand"			 " n")
  	   (mem:BLK (scratch))]
  	  UNSPEC_GATHER))]
    "(AS_ANY_DS_P (INTVAL (operands[3]))
--- 778,790 ----
     (set_attr "length" "12")])
  
  (define_insn "gather<mode>_insn_1offset_ds<exec>"
!   [(set (match_operand:V_ALL 0 "register_operand"		   "=v")
! 	(unspec:V_ALL
! 	  [(plus:<VnSI> (match_operand:<VnSI> 1 "register_operand" " v")
! 			(vec_duplicate:<VnSI>
! 			  (match_operand 2 "immediate_operand"	   " n")))
! 	   (match_operand 3 "immediate_operand"			   " n")
! 	   (match_operand 4 "immediate_operand"			   " n")
  	   (mem:BLK (scratch))]
  	  UNSPEC_GATHER))]
    "(AS_ANY_DS_P (INTVAL (operands[3]))
***************
*** 741,757 ****
     (set_attr "length" "12")])
  
  (define_insn "gather<mode>_insn_2offsets<exec>"
!   [(set (match_operand:VEC_REG_MODE 0 "register_operand"	       "=v")
! 	(unspec:VEC_REG_MODE
! 	  [(plus:V64DI
! 	     (plus:V64DI
! 	       (vec_duplicate:V64DI
! 		 (match_operand:DI 1 "register_operand"		       "Sv"))
! 	       (sign_extend:V64DI
! 		 (match_operand:V64SI 2 "register_operand"	       " v")))
! 	     (vec_duplicate:V64DI (match_operand 3 "immediate_operand" " n")))
! 	   (match_operand 4 "immediate_operand"			       " n")
! 	   (match_operand 5 "immediate_operand"			       " n")
  	   (mem:BLK (scratch))]
  	  UNSPEC_GATHER))]
    "(AS_GLOBAL_P (INTVAL (operands[4]))
--- 800,816 ----
     (set_attr "length" "12")])
  
  (define_insn "gather<mode>_insn_2offsets<exec>"
!   [(set (match_operand:V_ALL 0 "register_operand"			"=v")
! 	(unspec:V_ALL
! 	  [(plus:<VnDI>
! 	     (plus:<VnDI>
! 	       (vec_duplicate:<VnDI>
! 		 (match_operand:DI 1 "register_operand"			"Sv"))
! 	       (sign_extend:<VnDI>
! 		 (match_operand:<VnSI> 2 "register_operand"		" v")))
! 	     (vec_duplicate:<VnDI> (match_operand 3 "immediate_operand" " n")))
! 	   (match_operand 4 "immediate_operand"				" n")
! 	   (match_operand 5 "immediate_operand"				" n")
  	   (mem:BLK (scratch))]
  	  UNSPEC_GATHER))]
    "(AS_GLOBAL_P (INTVAL (operands[4]))
***************
*** 766,772 ****
  	/* Work around assembler bug in which a 64-bit register is expected,
  	but a 32-bit value would be correct.  */
  	int reg = REGNO (operands[2]) - FIRST_VGPR_REG;
! 	sprintf (buf, "global_load%%s0\t%%0, v[%d:%d], %%1 offset:%%3%s\;"
  		      "s_waitcnt\tvmcnt(0)", reg, reg + 1, glc);
        }
      else
--- 825,831 ----
  	/* Work around assembler bug in which a 64-bit register is expected,
  	but a 32-bit value would be correct.  */
  	int reg = REGNO (operands[2]) - FIRST_VGPR_REG;
! 	sprintf (buf, "global_load%%o0\t%%0, v[%d:%d], %%1 offset:%%3%s\;"
  		      "s_waitcnt\tvmcnt(0)", reg, reg + 1, glc);
        }
      else
***************
*** 777,795 ****
    [(set_attr "type" "flat")
     (set_attr "length" "12")])
  
! (define_expand "scatter_store<mode>"
    [(match_operand:DI 0 "register_operand")
!    (match_operand 1 "register_operand")
     (match_operand 2 "immediate_operand")
     (match_operand:SI 3 "gcn_alu_operand")
!    (match_operand:VEC_REG_MODE 4 "register_operand")]
    ""
    {
      rtx addr = gcn_expand_scaled_offsets (DEFAULT_ADDR_SPACE, operands[0],
  					  operands[1], operands[3],
  					  INTVAL (operands[2]), NULL);
  
!     if (GET_MODE (addr) == V64DImode)
        emit_insn (gen_scatter<mode>_insn_1offset (addr, const0_rtx, operands[4],
  						 const0_rtx, const0_rtx));
      else
--- 836,854 ----
    [(set_attr "type" "flat")
     (set_attr "length" "12")])
  
! (define_expand "scatter_store<mode><vnsi>"
    [(match_operand:DI 0 "register_operand")
!    (match_operand:<VnSI> 1 "register_operand")
     (match_operand 2 "immediate_operand")
     (match_operand:SI 3 "gcn_alu_operand")
!    (match_operand:V_ALL 4 "register_operand")]
    ""
    {
      rtx addr = gcn_expand_scaled_offsets (DEFAULT_ADDR_SPACE, operands[0],
  					  operands[1], operands[3],
  					  INTVAL (operands[2]), NULL);
  
!     if (GET_MODE (addr) == <VnDI>mode)
        emit_insn (gen_scatter<mode>_insn_1offset (addr, const0_rtx, operands[4],
  						 const0_rtx, const0_rtx));
      else
***************
*** 799,838 ****
      DONE;
    })
  
- (define_expand "scatter<mode>_exec"
-   [(match_operand:DI 0 "register_operand")
-    (match_operand 1 "register_operand")
-    (match_operand 2 "immediate_operand")
-    (match_operand:SI 3 "gcn_alu_operand")
-    (match_operand:VEC_REG_MODE 4 "register_operand")
-    (match_operand:DI 5 "gcn_exec_reg_operand")]
-   ""
-   {
-     operands[5] = force_reg (DImode, operands[5]);
- 
-     rtx addr = gcn_expand_scaled_offsets (DEFAULT_ADDR_SPACE, operands[0],
- 					  operands[1], operands[3],
- 					  INTVAL (operands[2]), operands[5]);
- 
-     if (GET_MODE (addr) == V64DImode)
-       emit_insn (gen_scatter<mode>_insn_1offset_exec (addr, const0_rtx,
- 						      operands[4], const0_rtx,
- 						      const0_rtx,
- 						      operands[5]));
-     else
-       emit_insn (gen_scatter<mode>_insn_2offsets_exec (operands[0], addr,
- 						       const0_rtx, operands[4],
- 						       const0_rtx, const0_rtx,
- 						       operands[5]));
-     DONE;
-   })
- 
  ; Allow any address expression
  (define_expand "scatter<mode>_expr<exec_scatter>"
    [(set (mem:BLK (scratch))
  	(unspec:BLK
! 	  [(match_operand:V64DI 0 "")
! 	   (match_operand:VEC_REG_MODE 1 "register_operand")
  	   (match_operand 2 "immediate_operand")
  	   (match_operand 3 "immediate_operand")]
  	  UNSPEC_SCATTER))]
--- 858,869 ----
      DONE;
    })
  
  ; Allow any address expression
  (define_expand "scatter<mode>_expr<exec_scatter>"
    [(set (mem:BLK (scratch))
  	(unspec:BLK
! 	  [(match_operand:<VnDI> 0 "")
! 	   (match_operand:V_ALL 1 "register_operand")
  	   (match_operand 2 "immediate_operand")
  	   (match_operand 3 "immediate_operand")]
  	  UNSPEC_SCATTER))]
***************
*** 842,853 ****
  (define_insn "scatter<mode>_insn_1offset<exec_scatter>"
    [(set (mem:BLK (scratch))
  	(unspec:BLK
! 	  [(plus:V64DI (match_operand:V64DI 0 "register_operand" "v")
! 		       (vec_duplicate:V64DI
! 			 (match_operand 1 "immediate_operand"	 "n")))
! 	   (match_operand:VEC_REG_MODE 2 "register_operand"	 "v")
! 	   (match_operand 3 "immediate_operand"			 "n")
! 	   (match_operand 4 "immediate_operand"			 "n")]
  	  UNSPEC_SCATTER))]
    "(AS_FLAT_P (INTVAL (operands[3]))
      && (INTVAL(operands[1]) == 0
--- 873,884 ----
  (define_insn "scatter<mode>_insn_1offset<exec_scatter>"
    [(set (mem:BLK (scratch))
  	(unspec:BLK
! 	  [(plus:<VnDI> (match_operand:<VnDI> 0 "register_operand" "v")
! 			(vec_duplicate:<VnDI>
! 			  (match_operand 1 "immediate_operand"	   "n")))
! 	   (match_operand:V_ALL 2 "register_operand"		   "v")
! 	   (match_operand 3 "immediate_operand"			   "n")
! 	   (match_operand 4 "immediate_operand"			   "n")]
  	  UNSPEC_SCATTER))]
    "(AS_FLAT_P (INTVAL (operands[3]))
      && (INTVAL(operands[1]) == 0
***************
*** 863,877 ****
      if (AS_FLAT_P (as))
        {
  	if (TARGET_GCN5_PLUS)
! 	  sprintf (buf, "flat_store%%s2\t%%0, %%2 offset:%%1%s\;"
! 		   "s_waitcnt\texpcnt(0)", glc);
  	else
! 	  sprintf (buf, "flat_store%%s2\t%%0, %%2%s\;s_waitcnt\texpcnt(0)",
! 		   glc);
        }
      else if (AS_GLOBAL_P (as))
!       sprintf (buf, "global_store%%s2\t%%0, %%2, off offset:%%1%s\;"
! 	       "s_waitcnt\texpcnt(0)", glc);
      else
        gcc_unreachable ();
  
--- 894,905 ----
      if (AS_FLAT_P (as))
        {
  	if (TARGET_GCN5_PLUS)
! 	  sprintf (buf, "flat_store%%s2\t%%0, %%2 offset:%%1%s", glc);
  	else
! 	  sprintf (buf, "flat_store%%s2\t%%0, %%2%s", glc);
        }
      else if (AS_GLOBAL_P (as))
!       sprintf (buf, "global_store%%s2\t%%0, %%2, off offset:%%1%s", glc);
      else
        gcc_unreachable ();
  
***************
*** 883,901 ****
  (define_insn "scatter<mode>_insn_1offset_ds<exec_scatter>"
    [(set (mem:BLK (scratch))
  	(unspec:BLK
! 	  [(plus:V64SI (match_operand:V64SI 0 "register_operand" "v")
! 		       (vec_duplicate:V64SI
! 			 (match_operand 1 "immediate_operand"	 "n")))
! 	   (match_operand:VEC_REG_MODE 2 "register_operand"	 "v")
! 	   (match_operand 3 "immediate_operand"			 "n")
! 	   (match_operand 4 "immediate_operand"			 "n")]
  	  UNSPEC_SCATTER))]
    "(AS_ANY_DS_P (INTVAL (operands[3]))
      && ((unsigned HOST_WIDE_INT)INTVAL(operands[1]) < 0x10000))"
    {
      addr_space_t as = INTVAL (operands[3]);
      static char buf[200];
!     sprintf (buf, "ds_write%%b2\t%%0, %%2 offset:%%1%s\;s_waitcnt\texpcnt(0)",
  	     (AS_GDS_P (as) ? " gds" : ""));
      return buf;
    }
--- 911,929 ----
  (define_insn "scatter<mode>_insn_1offset_ds<exec_scatter>"
    [(set (mem:BLK (scratch))
  	(unspec:BLK
! 	  [(plus:<VnSI> (match_operand:<VnSI> 0 "register_operand" "v")
! 			(vec_duplicate:<VnSI>
! 			  (match_operand 1 "immediate_operand"	   "n")))
! 	   (match_operand:V_ALL 2 "register_operand"		   "v")
! 	   (match_operand 3 "immediate_operand"			   "n")
! 	   (match_operand 4 "immediate_operand"			   "n")]
  	  UNSPEC_SCATTER))]
    "(AS_ANY_DS_P (INTVAL (operands[3]))
      && ((unsigned HOST_WIDE_INT)INTVAL(operands[1]) < 0x10000))"
    {
      addr_space_t as = INTVAL (operands[3]);
      static char buf[200];
!     sprintf (buf, "ds_write%%b2\t%%0, %%2 offset:%%1%s",
  	     (AS_GDS_P (as) ? " gds" : ""));
      return buf;
    }
***************
*** 905,921 ****
  (define_insn "scatter<mode>_insn_2offsets<exec_scatter>"
    [(set (mem:BLK (scratch))
  	(unspec:BLK
! 	  [(plus:V64DI
! 	     (plus:V64DI
! 	       (vec_duplicate:V64DI
! 		 (match_operand:DI 0 "register_operand"		    "Sv"))
! 	       (sign_extend:V64DI
! 		 (match_operand:V64SI 1 "register_operand"	    " v")))
! 	     (vec_duplicate:V64DI (match_operand 2 "immediate_operand"
! 								    " n")))
! 	   (match_operand:VEC_REG_MODE 3 "register_operand"	    " v")
! 	   (match_operand 4 "immediate_operand"			    " n")
! 	   (match_operand 5 "immediate_operand"			    " n")]
  	  UNSPEC_SCATTER))]
    "(AS_GLOBAL_P (INTVAL (operands[4]))
      && (((unsigned HOST_WIDE_INT)INTVAL(operands[2]) + 0x1000) < 0x2000))"
--- 933,948 ----
  (define_insn "scatter<mode>_insn_2offsets<exec_scatter>"
    [(set (mem:BLK (scratch))
  	(unspec:BLK
! 	  [(plus:<VnDI>
! 	     (plus:<VnDI>
! 	       (vec_duplicate:<VnDI>
! 		 (match_operand:DI 0 "register_operand"			"Sv"))
! 	       (sign_extend:<VnDI>
! 		 (match_operand:<VnSI> 1 "register_operand"		" v")))
! 	     (vec_duplicate:<VnDI> (match_operand 2 "immediate_operand" " n")))
! 	   (match_operand:V_ALL 3 "register_operand"			" v")
! 	   (match_operand 4 "immediate_operand"				" n")
! 	   (match_operand 5 "immediate_operand"				" n")]
  	  UNSPEC_SCATTER))]
    "(AS_GLOBAL_P (INTVAL (operands[4]))
      && (((unsigned HOST_WIDE_INT)INTVAL(operands[2]) + 0x1000) < 0x2000))"
***************
*** 929,936 ****
  	/* Work around assembler bug in which a 64-bit register is expected,
  	but a 32-bit value would be correct.  */
  	int reg = REGNO (operands[1]) - FIRST_VGPR_REG;
! 	sprintf (buf, "global_store%%s3\tv[%d:%d], %%3, %%0 offset:%%2%s\;"
! 		      "s_waitcnt\texpcnt(0)", reg, reg + 1, glc);
        }
      else
        gcc_unreachable ();
--- 956,963 ----
  	/* Work around assembler bug in which a 64-bit register is expected,
  	but a 32-bit value would be correct.  */
  	int reg = REGNO (operands[1]) - FIRST_VGPR_REG;
! 	sprintf (buf, "global_store%%s3\tv[%d:%d], %%3, %%0 offset:%%2%s",
! 		 reg, reg + 1, glc);
        }
      else
        gcc_unreachable ();
***************
*** 944,954 ****
  ;; {{{ Permutations
  
  (define_insn "ds_bpermute<mode>"
!   [(set (match_operand:VEC_1REG_MODE 0 "register_operand"    "=v")
! 	(unspec:VEC_1REG_MODE
! 	  [(match_operand:VEC_1REG_MODE 2 "register_operand" " v")
! 	   (match_operand:V64SI 1 "register_operand"	     " v")
! 	   (match_operand:DI 3 "gcn_exec_reg_operand"	     " e")]
  	  UNSPEC_BPERMUTE))]
    ""
    "ds_bpermute_b32\t%0, %1, %2\;s_waitcnt\tlgkmcnt(0)"
--- 971,981 ----
  ;; {{{ Permutations
  
  (define_insn "ds_bpermute<mode>"
!   [(set (match_operand:V_1REG 0 "register_operand"    "=v")
! 	(unspec:V_1REG
! 	  [(match_operand:V_1REG 2 "register_operand" " v")
! 	   (match_operand:<VnSI> 1 "register_operand" " v")
! 	   (match_operand:DI 3 "gcn_exec_reg_operand" " e")]
  	  UNSPEC_BPERMUTE))]
    ""
    "ds_bpermute_b32\t%0, %1, %2\;s_waitcnt\tlgkmcnt(0)"
***************
*** 956,974 ****
     (set_attr "length" "12")])
  
  (define_insn_and_split "ds_bpermute<mode>"
!   [(set (match_operand:VEC_2REG_MODE 0 "register_operand"    "=&v")
! 	(unspec:VEC_2REG_MODE
! 	  [(match_operand:VEC_2REG_MODE 2 "register_operand" " v0")
! 	   (match_operand:V64SI 1 "register_operand"	     "  v")
! 	   (match_operand:DI 3 "gcn_exec_reg_operand"	     "  e")]
  	  UNSPEC_BPERMUTE))]
    ""
    "#"
    "reload_completed"
!   [(set (match_dup 4) (unspec:V64SI [(match_dup 6) (match_dup 1) (match_dup 3)]
! 				    UNSPEC_BPERMUTE))
!    (set (match_dup 5) (unspec:V64SI [(match_dup 7) (match_dup 1) (match_dup 3)]
! 				    UNSPEC_BPERMUTE))]
    {
      operands[4] = gcn_operand_part (<MODE>mode, operands[0], 0);
      operands[5] = gcn_operand_part (<MODE>mode, operands[0], 1);
--- 983,1003 ----
     (set_attr "length" "12")])
  
  (define_insn_and_split "ds_bpermute<mode>"
!   [(set (match_operand:V_2REG 0 "register_operand"    "=&v")
! 	(unspec:V_2REG
! 	  [(match_operand:V_2REG 2 "register_operand" " v0")
! 	   (match_operand:<VnSI> 1 "register_operand" "  v")
! 	   (match_operand:DI 3 "gcn_exec_reg_operand" "  e")]
  	  UNSPEC_BPERMUTE))]
    ""
    "#"
    "reload_completed"
!   [(set (match_dup 4) (unspec:<VnSI>
! 			[(match_dup 6) (match_dup 1) (match_dup 3)]
! 			UNSPEC_BPERMUTE))
!    (set (match_dup 5) (unspec:<VnSI>
! 			[(match_dup 7) (match_dup 1) (match_dup 3)]
! 			UNSPEC_BPERMUTE))]
    {
      operands[4] = gcn_operand_part (<MODE>mode, operands[0], 0);
      operands[5] = gcn_operand_part (<MODE>mode, operands[0], 1);
***************
*** 978,1016 ****
    [(set_attr "type" "vmult")
     (set_attr "length" "24")])
  
  ;; }}}
  ;; {{{ ALU special case: add/sub
  
! (define_insn "addv64si3<exec_clobber>"
!   [(set (match_operand:V64SI 0 "register_operand"   "=  v")
! 	(plus:V64SI
! 	  (match_operand:V64SI 1 "register_operand" "%  v")
! 	  (match_operand:V64SI 2 "gcn_alu_operand"  "vSvB")))
     (clobber (reg:DI VCC_REG))]
    ""
    "v_add%^_u32\t%0, vcc, %2, %1"
    [(set_attr "type" "vop2")
     (set_attr "length" "8")])
  
! (define_insn "addv64si3_dup<exec_clobber>"
!   [(set (match_operand:V64SI 0 "register_operand"   "= v")
! 	(plus:V64SI
! 	  (vec_duplicate:V64SI
! 	    (match_operand:SI 2 "gcn_alu_operand"   "SvB"))
! 	  (match_operand:V64SI 1 "register_operand" "  v")))
     (clobber (reg:DI VCC_REG))]
    ""
    "v_add%^_u32\t%0, vcc, %2, %1"
    [(set_attr "type" "vop2")
     (set_attr "length" "8")])
  
! (define_insn "addv64si3_vcc<exec_vcc>"
!   [(set (match_operand:V64SI 0 "register_operand"   "=  v,   v")
! 	(plus:V64SI
! 	  (match_operand:V64SI 1 "register_operand" "%  v,   v")
! 	  (match_operand:V64SI 2 "gcn_alu_operand"  "vSvB,vSvB")))
!    (set (match_operand:DI 3 "register_operand"	    "= cV,  Sg")
! 	(ltu:DI (plus:V64SI (match_dup 1) (match_dup 2))
  		(match_dup 1)))]
    ""
    "v_add%^_u32\t%0, %3, %2, %1"
--- 1007,1059 ----
    [(set_attr "type" "vmult")
     (set_attr "length" "24")])
  
+ (define_insn "@dpp_move<mode>"
+   [(set (match_operand:V_noHI 0 "register_operand"    "=v")
+ 	(unspec:V_noHI
+ 	  [(match_operand:V_noHI 1 "register_operand" " v")
+ 	   (match_operand:SI 2 "const_int_operand"    " n")]
+ 	  UNSPEC_MOV_DPP_SHR))]
+   ""
+   {
+     return gcn_expand_dpp_shr_insn (<MODE>mode, "v_mov_b32",
+ 				    UNSPEC_MOV_DPP_SHR, INTVAL (operands[2]));
+   }
+   [(set_attr "type" "vop_dpp")
+    (set_attr "length" "16")])
+ 
  ;; }}}
  ;; {{{ ALU special case: add/sub
  
! (define_insn "add<mode>3<exec_clobber>"
!   [(set (match_operand:V_INT_1REG 0 "register_operand"   "=  v")
! 	(plus:V_INT_1REG
! 	  (match_operand:V_INT_1REG 1 "register_operand" "%  v")
! 	  (match_operand:V_INT_1REG 2 "gcn_alu_operand"  "vSvB")))
     (clobber (reg:DI VCC_REG))]
    ""
    "v_add%^_u32\t%0, vcc, %2, %1"
    [(set_attr "type" "vop2")
     (set_attr "length" "8")])
  
! (define_insn "add<mode>3_dup<exec_clobber>"
!   [(set (match_operand:V_INT_1REG 0 "register_operand"	     "= v")
! 	(plus:V_INT_1REG
! 	  (vec_duplicate:V_INT_1REG
! 	    (match_operand:<SCALAR_MODE> 2 "gcn_alu_operand" "SvB"))
! 	  (match_operand:V_INT_1REG 1 "register_operand"     "  v")))
     (clobber (reg:DI VCC_REG))]
    ""
    "v_add%^_u32\t%0, vcc, %2, %1"
    [(set_attr "type" "vop2")
     (set_attr "length" "8")])
  
! (define_insn "add<mode>3_vcc<exec_vcc>"
!   [(set (match_operand:V_SI 0 "register_operand"   "=  v,   v")
! 	(plus:V_SI
! 	  (match_operand:V_SI 1 "register_operand" "%  v,   v")
! 	  (match_operand:V_SI 2 "gcn_alu_operand"  "vSvB,vSvB")))
!    (set (match_operand:DI 3 "register_operand"	   "= cV,  Sg")
! 	(ltu:DI (plus:V_SI (match_dup 1) (match_dup 2))
  		(match_dup 1)))]
    ""
    "v_add%^_u32\t%0, %3, %2, %1"
***************
*** 1020,1113 ****
  ; This pattern only changes the VCC bits when the corresponding lane is
  ; enabled, so the set must be described as an ior.
  
! (define_insn "addv64si3_vcc_dup<exec_vcc>"
!   [(set (match_operand:V64SI 0 "register_operand"   "= v,  v")
! 	(plus:V64SI
! 	  (vec_duplicate:V64SI
! 	    (match_operand:SI 1 "gcn_alu_operand"   "SvB,SvB"))
! 	  (match_operand:V64SI 2 "register_operand" "  v,  v")))
!    (set (match_operand:DI 3 "register_operand"	    "=cV, Sg")
! 	(ltu:DI (plus:V64SI (vec_duplicate:V64SI (match_dup 2))
! 			    (match_dup 1))
! 		(vec_duplicate:V64SI (match_dup 2))))]
    ""
    "v_add%^_u32\t%0, %3, %2, %1"
    [(set_attr "type" "vop2,vop3b")
     (set_attr "length" "8,8")])
  
! ; This pattern does not accept SGPR because VCC read already counts as an
! ; SGPR use and number of SGPR operands is limited to 1.
  
! (define_insn "addcv64si3<exec_vcc>"
!   [(set (match_operand:V64SI 0 "register_operand" "=v,v")
! 	(plus:V64SI
! 	  (plus:V64SI
! 	    (vec_merge:V64SI
! 	      (vec_duplicate:V64SI (const_int 1))
! 	      (vec_duplicate:V64SI (const_int 0))
! 	      (match_operand:DI 3 "register_operand" " cV,Sv"))
! 	    (match_operand:V64SI 1 "gcn_alu_operand" "%vA,vA"))
! 	  (match_operand:V64SI 2 "gcn_alu_operand"   " vB,vB")))
!    (set (match_operand:DI 4 "register_operand"	     "=cV,Sg")
! 	(ior:DI (ltu:DI (plus:V64SI
! 			  (plus:V64SI
! 			    (vec_merge:V64SI
! 			      (vec_duplicate:V64SI (const_int 1))
! 			      (vec_duplicate:V64SI (const_int 0))
  			      (match_dup 3))
  			    (match_dup 1))
  			  (match_dup 2))
  			(match_dup 2))
! 		(ltu:DI (plus:V64SI
! 			  (vec_merge:V64SI
! 			    (vec_duplicate:V64SI (const_int 1))
! 			    (vec_duplicate:V64SI (const_int 0))
  			    (match_dup 3))
  			  (match_dup 1))
  			(match_dup 1))))]
    ""
!   "v_addc%^_u32\t%0, %4, %1, %2, %3"
!   [(set_attr "type" "vop2,vop3b")
!    (set_attr "length" "4,8")])
! 
! (define_insn "addcv64si3_dup<exec_vcc>"
!   [(set (match_operand:V64SI 0 "register_operand" "=v,v")
! 	(plus:V64SI
! 	  (plus:V64SI
! 	    (vec_merge:V64SI
! 	      (vec_duplicate:V64SI (const_int 1))
! 	      (vec_duplicate:V64SI (const_int 0))
! 	      (match_operand:DI 3 "register_operand" " cV, Sv"))
! 	    (match_operand:V64SI 1 "gcn_alu_operand" "%vA, vA"))
! 	  (vec_duplicate:V64SI
! 	    (match_operand:SI 2 "gcn_alu_operand"    "SvB,SvB"))))
!    (set (match_operand:DI 4 "register_operand"  "=cV, Sg")
! 	(ior:DI (ltu:DI (plus:V64SI (plus:V64SI
! 				      (vec_merge:V64SI
! 					(vec_duplicate:V64SI (const_int 1))
! 					(vec_duplicate:V64SI (const_int 0))
! 					(match_dup 3))
! 				      (match_dup 1))
! 				    (vec_duplicate:V64SI
! 				      (match_dup 2)))
! 			(vec_duplicate:V64SI
! 			  (match_dup 2)))
! 		(ltu:DI (plus:V64SI (vec_merge:V64SI
! 				      (vec_duplicate:V64SI (const_int 1))
! 				      (vec_duplicate:V64SI (const_int 0))
! 				      (match_dup 3))
! 				    (match_dup 1))
! 			(match_dup 1))))]
!   ""
!   "v_addc%^_u32\t%0, %4, %1, %2, %3"
    [(set_attr "type" "vop2,vop3b")
     (set_attr "length" "4,8")])
  
! (define_insn "subv64si3<exec_clobber>"
!   [(set (match_operand:V64SI 0 "register_operand"  "=  v,   v")
! 	(minus:V64SI
! 	  (match_operand:V64SI 1 "gcn_alu_operand" "vSvB,   v")
! 	  (match_operand:V64SI 2 "gcn_alu_operand" "   v,vSvB")))
     (clobber (reg:DI VCC_REG))]
    ""
    "@
--- 1063,1124 ----
  ; This pattern only changes the VCC bits when the corresponding lane is
  ; enabled, so the set must be described as an ior.
  
! (define_insn "add<mode>3_vcc_dup<exec_vcc>"
!   [(set (match_operand:V_SI 0 "register_operand"   "= v,  v")
! 	(plus:V_SI
! 	  (vec_duplicate:V_SI
! 	    (match_operand:SI 1 "gcn_alu_operand"  "SvB,SvB"))
! 	  (match_operand:V_SI 2 "register_operand" "  v,  v")))
!    (set (match_operand:DI 3 "register_operand"	   "=cV, Sg")
! 	(ltu:DI (plus:V_SI (vec_duplicate:V_SI (match_dup 2))
! 			   (match_dup 1))
! 		(vec_duplicate:V_SI (match_dup 2))))]
    ""
    "v_add%^_u32\t%0, %3, %2, %1"
    [(set_attr "type" "vop2,vop3b")
     (set_attr "length" "8,8")])
  
! ; v_addc does not accept an SGPR because the VCC read already counts as an
! ; SGPR use and the number of SGPR operands is limited to 1.  It does not
! ; accept "B" immediate constants due to a related bus conflict.
  
! (define_insn "addc<mode>3<exec_vcc>"
!   [(set (match_operand:V_SI 0 "register_operand"     "=v,   v")
! 	(plus:V_SI
! 	  (plus:V_SI
! 	    (vec_merge:V_SI
! 	      (vec_duplicate:V_SI (const_int 1))
! 	      (vec_duplicate:V_SI (const_int 0))
! 	      (match_operand:DI 3 "register_operand" " cV,cVSv"))
! 	    (match_operand:V_SI 1 "gcn_alu_operand"  "% v,  vA"))
! 	  (match_operand:V_SI 2 "gcn_alu_operand"    " vA,  vA")))
!    (set (match_operand:DI 4 "register_operand"	     "=cV,cVSg")
! 	(ior:DI (ltu:DI (plus:V_SI
! 			  (plus:V_SI
! 			    (vec_merge:V_SI
! 			      (vec_duplicate:V_SI (const_int 1))
! 			      (vec_duplicate:V_SI (const_int 0))
  			      (match_dup 3))
  			    (match_dup 1))
  			  (match_dup 2))
  			(match_dup 2))
! 		(ltu:DI (plus:V_SI
! 			  (vec_merge:V_SI
! 			    (vec_duplicate:V_SI (const_int 1))
! 			    (vec_duplicate:V_SI (const_int 0))
  			    (match_dup 3))
  			  (match_dup 1))
  			(match_dup 1))))]
    ""
!   "v_addc%^_u32\t%0, %4, %2, %1, %3"
    [(set_attr "type" "vop2,vop3b")
     (set_attr "length" "4,8")])
  
! (define_insn "sub<mode>3<exec_clobber>"
!   [(set (match_operand:V_INT_1REG 0 "register_operand"  "=  v,   v")
! 	(minus:V_INT_1REG
! 	  (match_operand:V_INT_1REG 1 "gcn_alu_operand" "vSvB,   v")
! 	  (match_operand:V_INT_1REG 2 "gcn_alu_operand" "   v,vSvB")))
     (clobber (reg:DI VCC_REG))]
    ""
    "@
***************
*** 1116,1128 ****
    [(set_attr "type" "vop2")
     (set_attr "length" "8,8")])
  
! (define_insn "subv64si3_vcc<exec_vcc>"
!   [(set (match_operand:V64SI 0 "register_operand"  "=  v,   v,   v,   v")
! 	(minus:V64SI
! 	  (match_operand:V64SI 1 "gcn_alu_operand" "vSvB,vSvB,   v,   v")
! 	  (match_operand:V64SI 2 "gcn_alu_operand" "   v,   v,vSvB,vSvB")))
!    (set (match_operand:DI 3 "register_operand"	   "= cV,  Sg,  cV,  Sg")
! 	(gtu:DI (minus:V64SI (match_dup 1) (match_dup 2))
  		(match_dup 1)))]
    ""
    "@
--- 1127,1139 ----
    [(set_attr "type" "vop2")
     (set_attr "length" "8,8")])
  
! (define_insn "sub<mode>3_vcc<exec_vcc>"
!   [(set (match_operand:V_SI 0 "register_operand"  "=  v,   v,   v,   v")
! 	(minus:V_SI
! 	  (match_operand:V_SI 1 "gcn_alu_operand" "vSvB,vSvB,   v,   v")
! 	  (match_operand:V_SI 2 "gcn_alu_operand" "   v,   v,vSvB,vSvB")))
!    (set (match_operand:DI 3 "register_operand"	  "= cV,  Sg,  cV,  Sg")
! 	(gtu:DI (minus:V_SI (match_dup 1) (match_dup 2))
  		(match_dup 1)))]
    ""
    "@
***************
*** 1133,1165 ****
    [(set_attr "type" "vop2,vop3b,vop2,vop3b")
     (set_attr "length" "8")])
  
! ; This pattern does not accept SGPR because VCC read already counts
! ; as a SGPR use and number of SGPR operands is limited to 1.
  
! (define_insn "subcv64si3<exec_vcc>"
!   [(set (match_operand:V64SI 0 "register_operand"    "= v, v, v, v")
! 	(minus:V64SI
! 	  (minus:V64SI
! 	    (vec_merge:V64SI
! 	      (vec_duplicate:V64SI (const_int 1))
! 	      (vec_duplicate:V64SI (const_int 0))
! 	      (match_operand:DI 3 "gcn_alu_operand"  " cV,Sv,cV,Sv"))
! 	    (match_operand:V64SI 1 "gcn_alu_operand" " vA,vA,vB,vB"))
! 	  (match_operand:V64SI 2 "gcn_alu_operand"   " vB,vB,vA,vA")))
!    (set (match_operand:DI 4 "register_operand"	     "=cV,Sg,cV,Sg")
! 	(ior:DI (gtu:DI (minus:V64SI (minus:V64SI
! 				       (vec_merge:V64SI
! 					 (vec_duplicate:V64SI (const_int 1))
! 					 (vec_duplicate:V64SI (const_int 0))
! 					 (match_dup 3))
  				       (match_dup 1))
  				     (match_dup 2))
  			(match_dup 2))
! 		(ltu:DI (minus:V64SI (vec_merge:V64SI
! 				       (vec_duplicate:V64SI (const_int 1))
! 				       (vec_duplicate:V64SI (const_int 0))
! 				       (match_dup 3))
! 				     (match_dup 1))
  			(match_dup 1))))]
    ""
    "@
--- 1144,1177 ----
    [(set_attr "type" "vop2,vop3b,vop2,vop3b")
     (set_attr "length" "8")])
  
! ; v_subb does not accept an SGPR because the VCC read already counts as an
! ; SGPR use and the number of SGPR operands is limited to 1.  It does not
! ; accept "B" immediate constants due to a related bus conflict.
  
! (define_insn "subc<mode>3<exec_vcc>"
!   [(set (match_operand:V_SI 0 "register_operand"    "= v, v, v, v")
! 	(minus:V_SI
! 	  (minus:V_SI
! 	    (vec_merge:V_SI
! 	      (vec_duplicate:V_SI (const_int 1))
! 	      (vec_duplicate:V_SI (const_int 0))
! 	      (match_operand:DI 3 "gcn_alu_operand" " cV,cVSv,cV,cVSv"))
! 	    (match_operand:V_SI 1 "gcn_alu_operand" " vA,  vA, v,  vA"))
! 	  (match_operand:V_SI 2 "gcn_alu_operand"   "  v,  vA,vA,  vA")))
!    (set (match_operand:DI 4 "register_operand"	    "=cV,cVSg,cV,cVSg")
! 	(ior:DI (gtu:DI (minus:V_SI (minus:V_SI
! 				      (vec_merge:V_SI
! 					(vec_duplicate:V_SI (const_int 1))
! 					(vec_duplicate:V_SI (const_int 0))
! 					(match_dup 3))
  				       (match_dup 1))
  				     (match_dup 2))
  			(match_dup 2))
! 		(ltu:DI (minus:V_SI (vec_merge:V_SI
! 				      (vec_duplicate:V_SI (const_int 1))
! 				      (vec_duplicate:V_SI (const_int 0))
! 				      (match_dup 3))
! 				    (match_dup 1))
  			(match_dup 1))))]
    ""
    "@
***************
*** 1168,1632 ****
     v_subbrev%^_u32\t%0, %4, %2, %1, %3
     v_subbrev%^_u32\t%0, %4, %2, %1, %3"
    [(set_attr "type" "vop2,vop3b,vop2,vop3b")
!    (set_attr "length" "8")])
  
! (define_insn_and_split "addv64di3"
!   [(set (match_operand:V64DI 0 "register_operand"   "=  &v")
! 	(plus:V64DI
! 	  (match_operand:V64DI 1 "register_operand" "%  v0")
! 	  (match_operand:V64DI 2 "gcn_alu_operand"  "vSvB0")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (V64DImode, operands[0])
!    && gcn_can_split_p (V64DImode, operands[1])
!    && gcn_can_split_p (V64DImode, operands[2])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_addv64si3_vcc
! 		(gcn_operand_part (V64DImode, operands[0], 0),
! 		 gcn_operand_part (V64DImode, operands[1], 0),
! 		 gcn_operand_part (V64DImode, operands[2], 0),
  		 vcc));
!     emit_insn (gen_addcv64si3
! 		(gcn_operand_part (V64DImode, operands[0], 1),
! 		 gcn_operand_part (V64DImode, operands[1], 1),
! 		 gcn_operand_part (V64DImode, operands[2], 1),
  		 vcc, vcc));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "addv64di3_exec"
!   [(set (match_operand:V64DI 0 "register_operand"		  "=  &v")
! 	(vec_merge:V64DI
! 	  (plus:V64DI
! 	    (match_operand:V64DI 1 "register_operand"		  "%  v0")
! 	    (match_operand:V64DI 2 "gcn_alu_operand"		  "vSvB0"))
! 	  (match_operand:V64DI 3 "gcn_register_or_unspec_operand" "   U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		  "    e")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (V64DImode, operands[0])
!    && gcn_can_split_p (V64DImode, operands[1])
!    && gcn_can_split_p (V64DImode, operands[2])
!    && gcn_can_split_p (V64DImode, operands[4])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_addv64si3_vcc_exec
! 		(gcn_operand_part (V64DImode, operands[0], 0),
! 		 gcn_operand_part (V64DImode, operands[1], 0),
! 		 gcn_operand_part (V64DImode, operands[2], 0),
  		 vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 0),
  		 operands[4]));
!     emit_insn (gen_addcv64si3_exec
! 		(gcn_operand_part (V64DImode, operands[0], 1),
! 		 gcn_operand_part (V64DImode, operands[1], 1),
! 		 gcn_operand_part (V64DImode, operands[2], 1),
  		 vcc, vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 1),
  		 operands[4]));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "subv64di3"
!   [(set (match_operand:V64DI 0 "register_operand"  "=  &v,   &v")
! 	(minus:V64DI
! 	  (match_operand:V64DI 1 "gcn_alu_operand" "vSvB0,   v0")
! 	  (match_operand:V64DI 2 "gcn_alu_operand" "   v0,vSvB0")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (V64DImode, operands[0])
!    && gcn_can_split_p (V64DImode, operands[1])
!    && gcn_can_split_p (V64DImode, operands[2])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_subv64si3_vcc
! 		(gcn_operand_part (V64DImode, operands[0], 0),
! 		 gcn_operand_part (V64DImode, operands[1], 0),
! 		 gcn_operand_part (V64DImode, operands[2], 0),
  		 vcc));
!     emit_insn (gen_subcv64si3
! 		(gcn_operand_part (V64DImode, operands[0], 1),
! 		 gcn_operand_part (V64DImode, operands[1], 1),
! 		 gcn_operand_part (V64DImode, operands[2], 1),
  		 vcc, vcc));
      DONE;
    }
    [(set_attr "type" "vmult")
!    (set_attr "length" "8,8")])
  
! (define_insn_and_split "subv64di3_exec"
!   [(set (match_operand:V64DI 0 "register_operand"	       "=  &v,   &v")
! 	(vec_merge:V64DI
! 	  (minus:V64DI
! 	    (match_operand:V64DI 1 "gcn_alu_operand"	       "vSvB0,   v0")
! 	    (match_operand:V64DI 2 "gcn_alu_operand"	       "   v0,vSvB0"))
! 	  (match_operand:V64DI 3 "gcn_register_or_unspec_operand"
! 							       "   U0,   U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"	       "    e,    e")))
     (clobber (reg:DI VCC_REG))]
    "register_operand (operands[1], VOIDmode)
     || register_operand (operands[2], VOIDmode)"
    "#"
!   "gcn_can_split_p  (V64DImode, operands[0])
!    && gcn_can_split_p (V64DImode, operands[1])
!    && gcn_can_split_p (V64DImode, operands[2])
!    && gcn_can_split_p (V64DImode, operands[3])"
!   [(const_int 0)]
!   {
!     rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_subv64si3_vcc_exec
! 		(gcn_operand_part (V64DImode, operands[0], 0),
! 		 gcn_operand_part (V64DImode, operands[1], 0),
! 		 gcn_operand_part (V64DImode, operands[2], 0),
! 		 vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 0),
! 		 operands[4]));
!     emit_insn (gen_subcv64si3_exec
! 		(gcn_operand_part (V64DImode, operands[0], 1),
! 		 gcn_operand_part (V64DImode, operands[1], 1),
! 		 gcn_operand_part (V64DImode, operands[2], 1),
! 		 vcc, vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 1),
! 		 operands[4]));
!     DONE;
!   }
!   [(set_attr "type" "vmult")
!    (set_attr "length" "8,8")])
! 
! (define_insn_and_split "addv64di3_dup"
!   [(set (match_operand:V64DI 0 "register_operand"   "= &v")
! 	(plus:V64DI
! 	  (match_operand:V64DI 1 "register_operand" "  v0")
! 	  (vec_duplicate:V64DI
! 	    (match_operand:DI 2 "gcn_alu_operand"   "SvDB"))))
!    (clobber (reg:DI VCC_REG))]
!   ""
!   "#"
!   "gcn_can_split_p  (V64DImode, operands[0])
!    && gcn_can_split_p (V64DImode, operands[1])
!    && gcn_can_split_p (V64DImode, operands[2])"
!   [(const_int 0)]
!   {
!     rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_addv64si3_vcc_dup
! 		(gcn_operand_part (V64DImode, operands[0], 0),
! 		 gcn_operand_part (DImode, operands[2], 0),
! 		 gcn_operand_part (V64DImode, operands[1], 0),
! 		 vcc));
!     emit_insn (gen_addcv64si3_dup
! 		(gcn_operand_part (V64DImode, operands[0], 1),
! 		 gcn_operand_part (V64DImode, operands[1], 1),
! 		 gcn_operand_part (DImode, operands[2], 1),
! 		 vcc, vcc));
!     DONE;
!   }
!   [(set_attr "type" "vmult")
!    (set_attr "length" "8")])
! 
! (define_insn_and_split "addv64di3_dup_exec"
!   [(set (match_operand:V64DI 0 "register_operand"		  "= &v")
! 	(vec_merge:V64DI
! 	  (plus:V64DI
! 	    (match_operand:V64DI 1 "register_operand"		  "  v0")
! 	    (vec_duplicate:V64DI
! 	      (match_operand:DI 2 "gcn_alu_operand"		  "SvDB")))
! 	  (match_operand:V64DI 3 "gcn_register_or_unspec_operand" "  U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		  "   e")))
!    (clobber (reg:DI VCC_REG))]
!   ""
!   "#"
!   "gcn_can_split_p  (V64DImode, operands[0])
!    && gcn_can_split_p (V64DImode, operands[1])
!    && gcn_can_split_p (V64DImode, operands[2])
!    && gcn_can_split_p (V64DImode, operands[3])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_addv64si3_vcc_dup_exec
! 		(gcn_operand_part (V64DImode, operands[0], 0),
! 		 gcn_operand_part (DImode, operands[2], 0),
! 		 gcn_operand_part (V64DImode, operands[1], 0),
  		 vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 0),
  		 operands[4]));
!     emit_insn (gen_addcv64si3_dup_exec
! 		(gcn_operand_part (V64DImode, operands[0], 1),
! 		 gcn_operand_part (V64DImode, operands[1], 1),
! 		 gcn_operand_part (DImode, operands[2], 1),
  		 vcc, vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 1),
  		 operands[4]));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "addv64di3_zext"
!   [(set (match_operand:V64DI 0 "register_operand"    "=&v,&v")
! 	(plus:V64DI
! 	  (zero_extend:V64DI
! 	    (match_operand:V64SI 1 "gcn_alu_operand" "0vA,0vB"))
! 	  (match_operand:V64DI 2 "gcn_alu_operand"   "0vB,0vA")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (V64DImode, operands[0])
!    && gcn_can_split_p (V64DImode, operands[2])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_addv64si3_vcc
! 		(gcn_operand_part (V64DImode, operands[0], 0),
  		 operands[1],
! 		 gcn_operand_part (V64DImode, operands[2], 0),
  		 vcc));
!     emit_insn (gen_addcv64si3
! 		(gcn_operand_part (V64DImode, operands[0], 1),
! 		 gcn_operand_part (V64DImode, operands[2], 1),
  		 const0_rtx, vcc, vcc));
      DONE;
    }
    [(set_attr "type" "vmult")
!    (set_attr "length" "8,8")])
  
! (define_insn_and_split "addv64di3_zext_exec"
!   [(set (match_operand:V64DI 0 "register_operand"		  "=&v,&v")
! 	(vec_merge:V64DI
! 	  (plus:V64DI
! 	    (zero_extend:V64DI
! 	      (match_operand:V64SI 1 "gcn_alu_operand"		  "0vA,0vB"))
! 	    (match_operand:V64DI 2 "gcn_alu_operand"		  "0vB,0vA"))
! 	  (match_operand:V64DI 3 "gcn_register_or_unspec_operand" " U0, U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		  "  e,  e")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (V64DImode, operands[0])
!    && gcn_can_split_p (V64DImode, operands[2])
!    && gcn_can_split_p (V64DImode, operands[3])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_addv64si3_vcc_exec
! 		(gcn_operand_part (V64DImode, operands[0], 0),
  		 operands[1],
! 		 gcn_operand_part (V64DImode, operands[2], 0),
  		 vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 0),
  		 operands[4]));
!     emit_insn (gen_addcv64si3_exec
! 		(gcn_operand_part (V64DImode, operands[0], 1),
! 		 gcn_operand_part (V64DImode, operands[2], 1),
  		 const0_rtx, vcc, vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 1),
  		 operands[4]));
      DONE;
    }
    [(set_attr "type" "vmult")
!    (set_attr "length" "8,8")])
  
! (define_insn_and_split "addv64di3_zext_dup"
!   [(set (match_operand:V64DI 0 "register_operand"   "=&v")
! 	(plus:V64DI
! 	  (zero_extend:V64DI
! 	    (vec_duplicate:V64SI
! 	      (match_operand:SI 1 "gcn_alu_operand" "BSv")))
! 	  (match_operand:V64DI 2 "gcn_alu_operand"  "vA0")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (V64DImode, operands[0])
!    && gcn_can_split_p (V64DImode, operands[2])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_addv64si3_vcc_dup
! 		(gcn_operand_part (V64DImode, operands[0], 0),
  		 gcn_operand_part (DImode, operands[1], 0),
! 		 gcn_operand_part (V64DImode, operands[2], 0),
  		 vcc));
!     emit_insn (gen_addcv64si3
! 		(gcn_operand_part (V64DImode, operands[0], 1),
! 		 gcn_operand_part (V64DImode, operands[2], 1),
  		 const0_rtx, vcc, vcc));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "addv64di3_zext_dup_exec"
!   [(set (match_operand:V64DI 0 "register_operand"		  "=&v")
! 	(vec_merge:V64DI
! 	  (plus:V64DI
! 	    (zero_extend:V64DI
! 	      (vec_duplicate:V64SI
! 		(match_operand:SI 1 "gcn_alu_operand"		  "BSv")))
! 	    (match_operand:V64DI 2 "gcn_alu_operand"		  "vA0"))
! 	  (match_operand:V64DI 3 "gcn_register_or_unspec_operand" " U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		  "  e")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (V64DImode, operands[0])
!    && gcn_can_split_p (V64DImode, operands[2])
!    && gcn_can_split_p (V64DImode, operands[3])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_addv64si3_vcc_dup_exec
! 		(gcn_operand_part (V64DImode, operands[0], 0),
  		 gcn_operand_part (DImode, operands[1], 0),
! 		 gcn_operand_part (V64DImode, operands[2], 0),
  		 vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 0),
  		 operands[4]));
!     emit_insn (gen_addcv64si3_exec
! 		(gcn_operand_part (V64DImode, operands[0], 1),
! 		 gcn_operand_part (V64DImode, operands[2], 1),
  		 const0_rtx, vcc, vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 1),
  		 operands[4]));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "addv64di3_zext_dup2"
!   [(set (match_operand:V64DI 0 "register_operand"		      "= v")
! 	(plus:V64DI
! 	  (zero_extend:V64DI (match_operand:V64SI 1 "gcn_alu_operand" " vA"))
! 	  (vec_duplicate:V64DI (match_operand:DI 2 "gcn_alu_operand"  "BSv"))))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (V64DImode, operands[0])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_addv64si3_vcc_dup
! 		(gcn_operand_part (V64DImode, operands[0], 0),
  		 gcn_operand_part (DImode, operands[2], 0),
  		 operands[1],
  		 vcc));
!     rtx dsthi = gcn_operand_part (V64DImode, operands[0], 1);
!     emit_insn (gen_vec_duplicatev64si
  		(dsthi, gcn_operand_part (DImode, operands[2], 1)));
!     emit_insn (gen_addcv64si3 (dsthi, dsthi, const0_rtx, vcc, vcc));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "addv64di3_zext_dup2_exec"
!   [(set (match_operand:V64DI 0 "register_operand"		       "= v")
! 	(vec_merge:V64DI
! 	  (plus:V64DI
! 	    (zero_extend:V64DI (match_operand:V64SI 1 "gcn_alu_operand"
! 								       " vA"))
! 	    (vec_duplicate:V64DI (match_operand:DI 2 "gcn_alu_operand" "BSv")))
! 	  (match_operand:V64DI 3 "gcn_register_or_unspec_operand"      " U0")
  	  (match_operand:DI 4 "gcn_exec_reg_operand"		       "  e")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (V64DImode, operands[0])
!    && gcn_can_split_p (V64DImode, operands[3])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_addv64si3_vcc_dup_exec
! 		(gcn_operand_part (V64DImode, operands[0], 0),
  		 gcn_operand_part (DImode, operands[2], 0),
  		 operands[1],
  		 vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 0),
  		 operands[4]));
!     rtx dsthi = gcn_operand_part (V64DImode, operands[0], 1);
!     emit_insn (gen_vec_duplicatev64si_exec
  		(dsthi, gcn_operand_part (DImode, operands[2], 1),
! 		 gcn_gen_undef (V64SImode), operands[4]));
!     emit_insn (gen_addcv64si3_exec
  		(dsthi, dsthi, const0_rtx, vcc, vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 1),
  		 operands[4]));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "addv64di3_sext_dup2"
!   [(set (match_operand:V64DI 0 "register_operand"		      "= v")
! 	(plus:V64DI
! 	  (sign_extend:V64DI (match_operand:V64SI 1 "gcn_alu_operand" " vA"))
! 	  (vec_duplicate:V64DI (match_operand:DI 2 "gcn_alu_operand"  "BSv"))))
!    (clobber (match_scratch:V64SI 3				      "=&v"))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (V64DImode, operands[0])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_ashrv64si3 (operands[3], operands[1], GEN_INT (31)));
!     emit_insn (gen_addv64si3_vcc_dup
! 		(gcn_operand_part (V64DImode, operands[0], 0),
  		 gcn_operand_part (DImode, operands[2], 0),
  		 operands[1],
  		 vcc));
!     rtx dsthi = gcn_operand_part (V64DImode, operands[0], 1);
!     emit_insn (gen_vec_duplicatev64si
  		(dsthi, gcn_operand_part (DImode, operands[2], 1)));
!     emit_insn (gen_addcv64si3 (dsthi, dsthi, operands[3], vcc, vcc));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "addv64di3_sext_dup2_exec"
!   [(set (match_operand:V64DI 0 "register_operand"		       "= v")
! 	(vec_merge:V64DI
! 	  (plus:V64DI
! 	    (sign_extend:V64DI (match_operand:V64SI 1 "gcn_alu_operand"
! 								       " vA"))
! 	    (vec_duplicate:V64DI (match_operand:DI 2 "gcn_alu_operand" "BSv")))
! 	  (match_operand:V64DI 3 "gcn_register_or_unspec_operand"      " U0")
  	  (match_operand:DI 4 "gcn_exec_reg_operand"		       "  e")))
!    (clobber (match_scratch:V64SI 5				       "=&v"))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (V64DImode, operands[0])
!    && gcn_can_split_p (V64DImode, operands[3])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_ashrv64si3_exec (operands[5], operands[1], GEN_INT (31),
! 				    gcn_gen_undef (V64SImode), operands[4]));
!     emit_insn (gen_addv64si3_vcc_dup_exec
! 		(gcn_operand_part (V64DImode, operands[0], 0),
  		 gcn_operand_part (DImode, operands[2], 0),
  		 operands[1],
  		 vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 0),
  		 operands[4]));
!     rtx dsthi = gcn_operand_part (V64DImode, operands[0], 1);
!     emit_insn (gen_vec_duplicatev64si_exec
  		(dsthi, gcn_operand_part (DImode, operands[2], 1),
! 		 gcn_gen_undef (V64SImode), operands[4]));
!     emit_insn (gen_addcv64si3_exec
  		(dsthi, dsthi, operands[5], vcc, vcc,
! 		 gcn_operand_part (V64DImode, operands[3], 1),
  		 operands[4]));
      DONE;
    }
--- 1180,1575 ----
     v_subbrev%^_u32\t%0, %4, %2, %1, %3
     v_subbrev%^_u32\t%0, %4, %2, %1, %3"
    [(set_attr "type" "vop2,vop3b,vop2,vop3b")
!    (set_attr "length" "4,8,4,8")])
  
! (define_insn_and_split "add<mode>3"
!   [(set (match_operand:V_DI 0 "register_operand"   "=  v")
! 	(plus:V_DI
! 	  (match_operand:V_DI 1 "register_operand" "%vDb")
! 	  (match_operand:V_DI 2 "gcn_alu_operand"  " vDb")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (<MODE>mode, operands[0])
!    && gcn_can_split_p (<MODE>mode, operands[1])
!    && gcn_can_split_p (<MODE>mode, operands[2])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_add<vnsi>3_vcc
! 		(gcn_operand_part (<MODE>mode, operands[0], 0),
! 		 gcn_operand_part (<MODE>mode, operands[1], 0),
! 		 gcn_operand_part (<MODE>mode, operands[2], 0),
  		 vcc));
!     emit_insn (gen_addc<vnsi>3
! 		(gcn_operand_part (<MODE>mode, operands[0], 1),
! 		 gcn_operand_part (<MODE>mode, operands[1], 1),
! 		 gcn_operand_part (<MODE>mode, operands[2], 1),
  		 vcc, vcc));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "add<mode>3_exec"
!   [(set (match_operand:V_DI 0 "register_operand"		 "=  v")
! 	(vec_merge:V_DI
! 	  (plus:V_DI
! 	    (match_operand:V_DI 1 "register_operand"		 "%vDb")
! 	    (match_operand:V_DI 2 "gcn_alu_operand"		 " vDb"))
! 	  (match_operand:V_DI 3 "gcn_register_or_unspec_operand" "  U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		 "   e")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (<MODE>mode, operands[0])
!    && gcn_can_split_p (<MODE>mode, operands[1])
!    && gcn_can_split_p (<MODE>mode, operands[2])
!    && gcn_can_split_p (<MODE>mode, operands[4])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_add<vnsi>3_vcc_exec
! 		(gcn_operand_part (<MODE>mode, operands[0], 0),
! 		 gcn_operand_part (<MODE>mode, operands[1], 0),
! 		 gcn_operand_part (<MODE>mode, operands[2], 0),
  		 vcc,
! 		 gcn_operand_part (<MODE>mode, operands[3], 0),
  		 operands[4]));
!     emit_insn (gen_addc<vnsi>3_exec
! 		(gcn_operand_part (<MODE>mode, operands[0], 1),
! 		 gcn_operand_part (<MODE>mode, operands[1], 1),
! 		 gcn_operand_part (<MODE>mode, operands[2], 1),
  		 vcc, vcc,
! 		 gcn_operand_part (<MODE>mode, operands[3], 1),
  		 operands[4]));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "sub<mode>3"
!   [(set (match_operand:V_DI 0 "register_operand"  "= v,  v")
! 	(minus:V_DI                                        
! 	  (match_operand:V_DI 1 "gcn_alu_operand" "vDb,  v")
! 	  (match_operand:V_DI 2 "gcn_alu_operand" "  v,vDb")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (<MODE>mode, operands[0])
!    && gcn_can_split_p (<MODE>mode, operands[1])
!    && gcn_can_split_p (<MODE>mode, operands[2])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_sub<vnsi>3_vcc
! 		(gcn_operand_part (<MODE>mode, operands[0], 0),
! 		 gcn_operand_part (<MODE>mode, operands[1], 0),
! 		 gcn_operand_part (<MODE>mode, operands[2], 0),
  		 vcc));
!     emit_insn (gen_subc<vnsi>3
! 		(gcn_operand_part (<MODE>mode, operands[0], 1),
! 		 gcn_operand_part (<MODE>mode, operands[1], 1),
! 		 gcn_operand_part (<MODE>mode, operands[2], 1),
  		 vcc, vcc));
      DONE;
    }
    [(set_attr "type" "vmult")
!    (set_attr "length" "8")])
  
! (define_insn_and_split "sub<mode>3_exec"
!   [(set (match_operand:V_DI 0 "register_operand"		 "=  v,   v")
! 	(vec_merge:V_DI                                                         
! 	  (minus:V_DI                                                           
! 	    (match_operand:V_DI 1 "gcn_alu_operand"		 "vSvB,   v")
! 	    (match_operand:V_DI 2 "gcn_alu_operand"		 "   v,vSvB"))
! 	  (match_operand:V_DI 3 "gcn_register_or_unspec_operand" " U0,  U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		 "   e,   e")))
     (clobber (reg:DI VCC_REG))]
    "register_operand (operands[1], VOIDmode)
     || register_operand (operands[2], VOIDmode)"
    "#"
!   "gcn_can_split_p  (<MODE>mode, operands[0])
!    && gcn_can_split_p (<MODE>mode, operands[1])
!    && gcn_can_split_p (<MODE>mode, operands[2])
!    && gcn_can_split_p (<MODE>mode, operands[3])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_sub<vnsi>3_vcc_exec
! 		(gcn_operand_part (<MODE>mode, operands[0], 0),
! 		 gcn_operand_part (<MODE>mode, operands[1], 0),
! 		 gcn_operand_part (<MODE>mode, operands[2], 0),
  		 vcc,
! 		 gcn_operand_part (<MODE>mode, operands[3], 0),
  		 operands[4]));
!     emit_insn (gen_subc<vnsi>3_exec
! 		(gcn_operand_part (<MODE>mode, operands[0], 1),
! 		 gcn_operand_part (<MODE>mode, operands[1], 1),
! 		 gcn_operand_part (<MODE>mode, operands[2], 1),
  		 vcc, vcc,
! 		 gcn_operand_part (<MODE>mode, operands[3], 1),
  		 operands[4]));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "add<mode>3_zext"
!   [(set (match_operand:V_DI 0 "register_operand"      "= v,  v")
! 	(plus:V_DI
! 	  (zero_extend:V_DI
! 	    (match_operand:<VnSI> 1 "gcn_alu_operand" " vA, vB"))
! 	  (match_operand:V_DI 2 "gcn_alu_operand"     "vDb,vDA")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (<MODE>mode, operands[0])
!    && gcn_can_split_p (<MODE>mode, operands[2])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_add<vnsi>3_vcc
! 		(gcn_operand_part (<MODE>mode, operands[0], 0),
  		 operands[1],
! 		 gcn_operand_part (<MODE>mode, operands[2], 0),
  		 vcc));
!     emit_insn (gen_addc<vnsi>3
! 		(gcn_operand_part (<MODE>mode, operands[0], 1),
! 		 gcn_operand_part (<MODE>mode, operands[2], 1),
  		 const0_rtx, vcc, vcc));
      DONE;
    }
    [(set_attr "type" "vmult")
!    (set_attr "length" "8")])
  
! (define_insn_and_split "add<mode>3_zext_exec"
!   [(set (match_operand:V_DI 0 "register_operand"		 "= v,  v")
! 	(vec_merge:V_DI
! 	  (plus:V_DI
! 	    (zero_extend:V_DI
! 	      (match_operand:<VnSI> 1 "gcn_alu_operand"		 " vA, vB"))
! 	    (match_operand:V_DI 2 "gcn_alu_operand"		 "vDb,vDA"))
! 	  (match_operand:V_DI 3 "gcn_register_or_unspec_operand" " U0, U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		 "  e,  e")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (<MODE>mode, operands[0])
!    && gcn_can_split_p (<MODE>mode, operands[2])
!    && gcn_can_split_p (<MODE>mode, operands[3])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_add<vnsi>3_vcc_exec
! 		(gcn_operand_part (<MODE>mode, operands[0], 0),
  		 operands[1],
! 		 gcn_operand_part (<MODE>mode, operands[2], 0),
  		 vcc,
! 		 gcn_operand_part (<MODE>mode, operands[3], 0),
  		 operands[4]));
!     emit_insn (gen_addc<vnsi>3_exec
! 		(gcn_operand_part (<MODE>mode, operands[0], 1),
! 		 gcn_operand_part (<MODE>mode, operands[2], 1),
  		 const0_rtx, vcc, vcc,
! 		 gcn_operand_part (<MODE>mode, operands[3], 1),
  		 operands[4]));
      DONE;
    }
    [(set_attr "type" "vmult")
!    (set_attr "length" "8")])
  
! (define_insn_and_split "add<mode>3_zext_dup"
!   [(set (match_operand:V_DI 0 "register_operand"    "= v,  v")
! 	(plus:V_DI
! 	  (zero_extend:V_DI
! 	    (vec_duplicate:<VnSI>
! 	      (match_operand:SI 1 "gcn_alu_operand" "BSv,ASv")))
! 	  (match_operand:V_DI 2 "gcn_alu_operand"   "vDA,vDb")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (<MODE>mode, operands[0])
!    && gcn_can_split_p (<MODE>mode, operands[2])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_add<vnsi>3_vcc_dup
! 		(gcn_operand_part (<MODE>mode, operands[0], 0),
  		 gcn_operand_part (DImode, operands[1], 0),
! 		 gcn_operand_part (<MODE>mode, operands[2], 0),
  		 vcc));
!     emit_insn (gen_addc<vnsi>3
! 		(gcn_operand_part (<MODE>mode, operands[0], 1),
! 		 gcn_operand_part (<MODE>mode, operands[2], 1),
  		 const0_rtx, vcc, vcc));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "add<mode>3_zext_dup_exec"
!   [(set (match_operand:V_DI 0 "register_operand"		 "= v,  v")
! 	(vec_merge:V_DI
! 	  (plus:V_DI
! 	    (zero_extend:V_DI
! 	      (vec_duplicate:<VnSI>
! 		(match_operand:SI 1 "gcn_alu_operand"		 "ASv,BSv")))
! 	    (match_operand:V_DI 2 "gcn_alu_operand"		 "vDb,vDA"))
! 	  (match_operand:V_DI 3 "gcn_register_or_unspec_operand" " U0, U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		 "  e,  e")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (<MODE>mode, operands[0])
!    && gcn_can_split_p (<MODE>mode, operands[2])
!    && gcn_can_split_p (<MODE>mode, operands[3])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_add<vnsi>3_vcc_dup_exec
! 		(gcn_operand_part (<MODE>mode, operands[0], 0),
  		 gcn_operand_part (DImode, operands[1], 0),
! 		 gcn_operand_part (<MODE>mode, operands[2], 0),
  		 vcc,
! 		 gcn_operand_part (<MODE>mode, operands[3], 0),
  		 operands[4]));
!     emit_insn (gen_addc<vnsi>3_exec
! 		(gcn_operand_part (<MODE>mode, operands[0], 1),
! 		 gcn_operand_part (<MODE>mode, operands[2], 1),
  		 const0_rtx, vcc, vcc,
! 		 gcn_operand_part (<MODE>mode, operands[3], 1),
  		 operands[4]));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "add<mode>3_zext_dup2"
!   [(set (match_operand:V_DI 0 "register_operand"		      "=  v")
! 	(plus:V_DI
! 	  (zero_extend:V_DI (match_operand:<VnSI> 1 "gcn_alu_operand" " vA"))
! 	  (vec_duplicate:V_DI (match_operand:DI 2 "gcn_alu_operand"   "DbSv"))))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p (<MODE>mode, operands[0])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_add<vnsi>3_vcc_dup
! 		(gcn_operand_part (<MODE>mode, operands[0], 0),
  		 gcn_operand_part (DImode, operands[2], 0),
  		 operands[1],
  		 vcc));
!     rtx dsthi = gcn_operand_part (<MODE>mode, operands[0], 1);
!     emit_insn (gen_vec_duplicate<vnsi>
  		(dsthi, gcn_operand_part (DImode, operands[2], 1)));
!     emit_insn (gen_addc<vnsi>3 (dsthi, dsthi, const0_rtx, vcc, vcc));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "add<mode>3_zext_dup2_exec"
!   [(set (match_operand:V_DI 0 "register_operand"		       "= v")
! 	(vec_merge:V_DI
! 	  (plus:V_DI
! 	    (zero_extend:V_DI (match_operand:<VnSI> 1 "gcn_alu_operand" "vA"))
! 	    (vec_duplicate:V_DI (match_operand:DI 2 "gcn_alu_operand"  "BSv")))
! 	  (match_operand:V_DI 3 "gcn_register_or_unspec_operand"       " U0")
  	  (match_operand:DI 4 "gcn_exec_reg_operand"		       "  e")))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (<MODE>mode, operands[0])
!    && gcn_can_split_p (<MODE>mode, operands[3])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_add<vnsi>3_vcc_dup_exec
! 		(gcn_operand_part (<MODE>mode, operands[0], 0),
  		 gcn_operand_part (DImode, operands[2], 0),
  		 operands[1],
  		 vcc,
! 		 gcn_operand_part (<MODE>mode, operands[3], 0),
  		 operands[4]));
!     rtx dsthi = gcn_operand_part (<MODE>mode, operands[0], 1);
!     emit_insn (gen_vec_duplicate<vnsi>_exec
  		(dsthi, gcn_operand_part (DImode, operands[2], 1),
! 		 gcn_operand_part (<MODE>mode, operands[3], 1),
! 		 operands[4]));
!     emit_insn (gen_addc<vnsi>3_exec
  		(dsthi, dsthi, const0_rtx, vcc, vcc,
! 		 gcn_operand_part (<MODE>mode, operands[3], 1),
  		 operands[4]));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "add<mode>3_sext_dup2"
!   [(set (match_operand:V_DI 0 "register_operand"		      "= v")
! 	(plus:V_DI
! 	  (sign_extend:V_DI (match_operand:<VnSI> 1 "gcn_alu_operand" " vA"))
! 	  (vec_duplicate:V_DI (match_operand:DI 2 "gcn_alu_operand"   "BSv"))))
!    (clobber (match_scratch:<VnSI> 3				      "=&v"))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (<MODE>mode, operands[0])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_ashr<vnsi>3 (operands[3], operands[1], GEN_INT (31)));
!     emit_insn (gen_add<vnsi>3_vcc_dup
! 		(gcn_operand_part (<MODE>mode, operands[0], 0),
  		 gcn_operand_part (DImode, operands[2], 0),
  		 operands[1],
  		 vcc));
!     rtx dsthi = gcn_operand_part (<MODE>mode, operands[0], 1);
!     emit_insn (gen_vec_duplicate<vnsi>
  		(dsthi, gcn_operand_part (DImode, operands[2], 1)));
!     emit_insn (gen_addc<vnsi>3 (dsthi, dsthi, operands[3], vcc, vcc));
      DONE;
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "8")])
  
! (define_insn_and_split "add<mode>3_sext_dup2_exec"
!   [(set (match_operand:V_DI 0 "register_operand"		       "= v")
! 	(vec_merge:V_DI
! 	  (plus:V_DI
! 	    (sign_extend:V_DI (match_operand:<VnSI> 1 "gcn_alu_operand" "vA"))
! 	    (vec_duplicate:V_DI (match_operand:DI 2 "gcn_alu_operand"  "BSv")))
! 	  (match_operand:V_DI 3 "gcn_register_or_unspec_operand"       " U0")
  	  (match_operand:DI 4 "gcn_exec_reg_operand"		       "  e")))
!    (clobber (match_scratch:<VnSI> 5				       "=&v"))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
!   "gcn_can_split_p  (<MODE>mode, operands[0])
!    && gcn_can_split_p (<MODE>mode, operands[3])"
    [(const_int 0)]
    {
      rtx vcc = gen_rtx_REG (DImode, VCC_REG);
!     emit_insn (gen_ashr<vnsi>3_exec (operands[5], operands[1], GEN_INT (31),
! 				     gcn_gen_undef (<VnSI>mode), operands[4]));
!     emit_insn (gen_add<vnsi>3_vcc_dup_exec
! 		(gcn_operand_part (<MODE>mode, operands[0], 0),
  		 gcn_operand_part (DImode, operands[2], 0),
  		 operands[1],
  		 vcc,
! 		 gcn_operand_part (<MODE>mode, operands[3], 0),
  		 operands[4]));
!     rtx dsthi = gcn_operand_part (<MODE>mode, operands[0], 1);
!     emit_insn (gen_vec_duplicate<vnsi>_exec
  		(dsthi, gcn_operand_part (DImode, operands[2], 1),
! 		gcn_operand_part (<MODE>mode, operands[3], 1),
! 		operands[4]));
!     emit_insn (gen_addc<vnsi>3_exec
  		(dsthi, dsthi, operands[5], vcc, vcc,
! 		 gcn_operand_part (<MODE>mode, operands[3], 1),
  		 operands[4]));
      DONE;
    }
***************
*** 1712,1998 ****
  ;; }}}
  ;; {{{ ALU special case: mult
  
! (define_insn "<su>mulv64si3_highpart<exec>"
!   [(set (match_operand:V64SI 0 "register_operand"	 "=  v")
! 	(truncate:V64SI
! 	  (lshiftrt:V64DI
! 	    (mult:V64DI
! 	      (any_extend:V64DI
! 		(match_operand:V64SI 1 "gcn_alu_operand" "  %v"))
! 	      (any_extend:V64DI
! 		(match_operand:V64SI 2 "gcn_alu_operand" "vSvA")))
  	    (const_int 32))))]
    ""
    "v_mul_hi<sgnsuffix>0\t%0, %2, %1"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
! (define_insn "mulv64si3<exec>"
!   [(set (match_operand:V64SI 0 "register_operand"  "=   v")
! 	(mult:V64SI
! 	  (match_operand:V64SI 1 "gcn_alu_operand" "%vSvA")
! 	  (match_operand:V64SI 2 "gcn_alu_operand" " vSvA")))]
    ""
    "v_mul_lo_u32\t%0, %1, %2"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
! (define_insn "mulv64si3_dup<exec>"
!   [(set (match_operand:V64SI 0 "register_operand"  "=   v")
! 	(mult:V64SI
! 	  (match_operand:V64SI 1 "gcn_alu_operand" "%vSvA")
! 	  (vec_duplicate:V64SI
! 	    (match_operand:SI 2 "gcn_alu_operand"  "  SvA"))))]
    ""
    "v_mul_lo_u32\t%0, %1, %2"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
! (define_insn_and_split "mulv64di3"
!   [(set (match_operand:V64DI 0 "register_operand"  "=&v")
! 	(mult:V64DI
! 	  (match_operand:V64DI 1 "gcn_alu_operand" "% v")
! 	  (match_operand:V64DI 2 "gcn_alu_operand" "vDA")))
!    (clobber (match_scratch:V64SI 3		   "=&v"))]
    ""
    "#"
    "reload_completed"
    [(const_int 0)]
    {
!     rtx out_lo = gcn_operand_part (V64DImode, operands[0], 0);
!     rtx out_hi = gcn_operand_part (V64DImode, operands[0], 1);
!     rtx left_lo = gcn_operand_part (V64DImode, operands[1], 0);
!     rtx left_hi = gcn_operand_part (V64DImode, operands[1], 1);
!     rtx right_lo = gcn_operand_part (V64DImode, operands[2], 0);
!     rtx right_hi = gcn_operand_part (V64DImode, operands[2], 1);
      rtx tmp = operands[3];
  
!     emit_insn (gen_mulv64si3 (out_lo, left_lo, right_lo));
!     emit_insn (gen_umulv64si3_highpart (out_hi, left_lo, right_lo));
!     emit_insn (gen_mulv64si3 (tmp, left_hi, right_lo));
!     emit_insn (gen_addv64si3 (out_hi, out_hi, tmp));
!     emit_insn (gen_mulv64si3 (tmp, left_lo, right_hi));
!     emit_insn (gen_addv64si3 (out_hi, out_hi, tmp));
!     emit_insn (gen_mulv64si3 (tmp, left_hi, right_hi));
!     emit_insn (gen_addv64si3 (out_hi, out_hi, tmp));
      DONE;
    })
  
! (define_insn_and_split "mulv64di3_exec"
!   [(set (match_operand:V64DI 0 "register_operand"		  "=&v")
! 	(vec_merge:V64DI
! 	  (mult:V64DI
! 	    (match_operand:V64DI 1 "gcn_alu_operand"		  "% v")
! 	    (match_operand:V64DI 2 "gcn_alu_operand"		  "vDA"))
! 	  (match_operand:V64DI 3 "gcn_register_or_unspec_operand" " U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		  "  e")))
!    (clobber (match_scratch:V64SI 5                                "=&v"))]
    ""
    "#"
    "reload_completed"
    [(const_int 0)]
    {
!     rtx out_lo = gcn_operand_part (V64DImode, operands[0], 0);
!     rtx out_hi = gcn_operand_part (V64DImode, operands[0], 1);
!     rtx left_lo = gcn_operand_part (V64DImode, operands[1], 0);
!     rtx left_hi = gcn_operand_part (V64DImode, operands[1], 1);
!     rtx right_lo = gcn_operand_part (V64DImode, operands[2], 0);
!     rtx right_hi = gcn_operand_part (V64DImode, operands[2], 1);
      rtx exec = operands[4];
      rtx tmp = operands[5];
  
      rtx old_lo, old_hi;
      if (GET_CODE (operands[3]) == UNSPEC)
        {
! 	old_lo = old_hi = gcn_gen_undef (V64SImode);
        }
      else
        {
! 	old_lo = gcn_operand_part (V64DImode, operands[3], 0);
! 	old_hi = gcn_operand_part (V64DImode, operands[3], 1);
        }
  
!     rtx undef = gcn_gen_undef (V64SImode);
  
!     emit_insn (gen_mulv64si3_exec (out_lo, left_lo, right_lo, old_lo, exec));
!     emit_insn (gen_umulv64si3_highpart_exec (out_hi, left_lo, right_lo,
! 					     old_hi, exec));
!     emit_insn (gen_mulv64si3_exec (tmp, left_hi, right_lo, undef, exec));
!     emit_insn (gen_addv64si3_exec (out_hi, out_hi, tmp, out_hi, exec));
!     emit_insn (gen_mulv64si3_exec (tmp, left_lo, right_hi, undef, exec));
!     emit_insn (gen_addv64si3_exec (out_hi, out_hi, tmp, out_hi, exec));
!     emit_insn (gen_mulv64si3_exec (tmp, left_hi, right_hi, undef, exec));
!     emit_insn (gen_addv64si3_exec (out_hi, out_hi, tmp, out_hi, exec));
      DONE;
    })
  
! (define_insn_and_split "mulv64di3_zext"
!   [(set (match_operand:V64DI 0 "register_operand"    "=&v")
! 	(mult:V64DI
! 	  (zero_extend:V64DI
! 	    (match_operand:V64SI 1 "gcn_alu_operand" "  v"))
! 	  (match_operand:V64DI 2 "gcn_alu_operand"   "vDA")))
!    (clobber (match_scratch:V64SI 3		     "=&v"))]
    ""
    "#"
    "reload_completed"
    [(const_int 0)]
    {
!     rtx out_lo = gcn_operand_part (V64DImode, operands[0], 0);
!     rtx out_hi = gcn_operand_part (V64DImode, operands[0], 1);
      rtx left = operands[1];
!     rtx right_lo = gcn_operand_part (V64DImode, operands[2], 0);
!     rtx right_hi = gcn_operand_part (V64DImode, operands[2], 1);
      rtx tmp = operands[3];
  
!     emit_insn (gen_mulv64si3 (out_lo, left, right_lo));
!     emit_insn (gen_umulv64si3_highpart (out_hi, left, right_lo));
!     emit_insn (gen_mulv64si3 (tmp, left, right_hi));
!     emit_insn (gen_addv64si3 (out_hi, out_hi, tmp));
      DONE;
    })
  
! (define_insn_and_split "mulv64di3_zext_exec"
!   [(set (match_operand:V64DI 0 "register_operand"		  "=&v")
! 	(vec_merge:V64DI
! 	  (mult:V64DI
! 	    (zero_extend:V64DI
! 	      (match_operand:V64SI 1 "gcn_alu_operand"		  "  v"))
! 	    (match_operand:V64DI 2 "gcn_alu_operand"		  "vDA"))
! 	  (match_operand:V64DI 3 "gcn_register_or_unspec_operand" " U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		  "  e")))
!    (clobber (match_scratch:V64SI 5                                "=&v"))]
    ""
    "#"
    "reload_completed"
    [(const_int 0)]
    {
!     rtx out_lo = gcn_operand_part (V64DImode, operands[0], 0);
!     rtx out_hi = gcn_operand_part (V64DImode, operands[0], 1);
      rtx left = operands[1];
!     rtx right_lo = gcn_operand_part (V64DImode, operands[2], 0);
!     rtx right_hi = gcn_operand_part (V64DImode, operands[2], 1);
      rtx exec = operands[4];
      rtx tmp = operands[5];
  
      rtx old_lo, old_hi;
      if (GET_CODE (operands[3]) == UNSPEC)
        {
! 	old_lo = old_hi = gcn_gen_undef (V64SImode);
        }
      else
        {
! 	old_lo = gcn_operand_part (V64DImode, operands[3], 0);
! 	old_hi = gcn_operand_part (V64DImode, operands[3], 1);
        }
  
!     rtx undef = gcn_gen_undef (V64SImode);
  
!     emit_insn (gen_mulv64si3_exec (out_lo, left, right_lo, old_lo, exec));
!     emit_insn (gen_umulv64si3_highpart_exec (out_hi, left, right_lo,
! 					     old_hi, exec));
!     emit_insn (gen_mulv64si3_exec (tmp, left, right_hi, undef, exec));
!     emit_insn (gen_addv64si3_exec (out_hi, out_hi, tmp, out_hi, exec));
      DONE;
    })
  
! (define_insn_and_split "mulv64di3_zext_dup2"
!   [(set (match_operand:V64DI 0 "register_operand"    "= &v")
! 	(mult:V64DI
! 	  (zero_extend:V64DI
! 	    (match_operand:V64SI 1 "gcn_alu_operand" "   v"))
! 	  (vec_duplicate:V64DI
! 	    (match_operand:DI 2 "gcn_alu_operand"    "SvDA"))))
!    (clobber (match_scratch:V64SI 3		     "= &v"))]
    ""
    "#"
    "reload_completed"
    [(const_int 0)]
    {
!     rtx out_lo = gcn_operand_part (V64DImode, operands[0], 0);
!     rtx out_hi = gcn_operand_part (V64DImode, operands[0], 1);
      rtx left = operands[1];
!     rtx right_lo = gcn_operand_part (V64DImode, operands[2], 0);
!     rtx right_hi = gcn_operand_part (V64DImode, operands[2], 1);
      rtx tmp = operands[3];
  
!     emit_insn (gen_mulv64si3 (out_lo, left, right_lo));
!     emit_insn (gen_umulv64si3_highpart (out_hi, left, right_lo));
!     emit_insn (gen_mulv64si3 (tmp, left, right_hi));
!     emit_insn (gen_addv64si3 (out_hi, out_hi, tmp));
      DONE;
    })
  
! (define_insn_and_split "mulv64di3_zext_dup2_exec"
!   [(set (match_operand:V64DI 0 "register_operand"		  "= &v")
! 	(vec_merge:V64DI
! 	  (mult:V64DI
! 	    (zero_extend:V64DI
! 	      (match_operand:V64SI 1 "gcn_alu_operand"		  "   v"))
! 	    (vec_duplicate:V64DI
! 	      (match_operand:DI 2 "gcn_alu_operand"		  "SvDA")))
! 	  (match_operand:V64DI 3 "gcn_register_or_unspec_operand" "  U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		  "   e")))
!    (clobber (match_scratch:V64SI 5                                "= &v"))]
    ""
    "#"
    "reload_completed"
    [(const_int 0)]
    {
!     rtx out_lo = gcn_operand_part (V64DImode, operands[0], 0);
!     rtx out_hi = gcn_operand_part (V64DImode, operands[0], 1);
      rtx left = operands[1];
!     rtx right_lo = gcn_operand_part (V64DImode, operands[2], 0);
!     rtx right_hi = gcn_operand_part (V64DImode, operands[2], 1);
      rtx exec = operands[4];
      rtx tmp = operands[5];
  
      rtx old_lo, old_hi;
      if (GET_CODE (operands[3]) == UNSPEC)
        {
! 	old_lo = old_hi = gcn_gen_undef (V64SImode);
        }
      else
        {
! 	old_lo = gcn_operand_part (V64DImode, operands[3], 0);
! 	old_hi = gcn_operand_part (V64DImode, operands[3], 1);
        }
  
!     rtx undef = gcn_gen_undef (V64SImode);
  
!     emit_insn (gen_mulv64si3_exec (out_lo, left, right_lo, old_lo, exec));
!     emit_insn (gen_umulv64si3_highpart_exec (out_hi, left, right_lo,
! 					     old_hi, exec));
!     emit_insn (gen_mulv64si3_exec (tmp, left, right_hi, undef, exec));
!     emit_insn (gen_addv64si3_exec (out_hi, out_hi, tmp, out_hi, exec));
      DONE;
    })
  
  ;; }}}
  ;; {{{ ALU generic case
  
- (define_mode_iterator VEC_INT_MODE [V64QI V64HI V64SI V64DI])
- 
  (define_code_iterator bitop [and ior xor])
  (define_code_iterator shiftop [ashift lshiftrt ashiftrt])
  (define_code_iterator minmaxop [smin smax umin umax])
  
  (define_insn "<expander><mode>2<exec>"
!   [(set (match_operand:VEC_1REG_INT_MODE 0 "gcn_valu_dst_operand"    "=  v")
! 	(bitunop:VEC_1REG_INT_MODE
! 	  (match_operand:VEC_1REG_INT_MODE 1 "gcn_valu_src0_operand" "vSvB")))]
    ""
    "v_<mnemonic>0\t%0, %1"
    [(set_attr "type" "vop1")
     (set_attr "length" "8")])
  
  (define_insn "<expander><mode>3<exec>"
!   [(set (match_operand:VEC_1REG_INT_MODE 0 "gcn_valu_dst_operand" "=  v,RD")
! 	(bitop:VEC_1REG_INT_MODE
! 	  (match_operand:VEC_1REG_INT_MODE 1 "gcn_valu_src0_operand"
! 								  "%  v, 0")
! 	  (match_operand:VEC_1REG_INT_MODE 2 "gcn_valu_src1com_operand"
! 								  "vSvB, v")))]
    ""
    "@
     v_<mnemonic>0\t%0, %2, %1
--- 1655,1937 ----
  ;; }}}
  ;; {{{ ALU special case: mult
  
! (define_insn "<su>mul<mode>3_highpart<exec>"
!   [(set (match_operand:V_SI 0 "register_operand"        "=  v")
! 	(truncate:V_SI
! 	  (lshiftrt:<VnDI>
! 	    (mult:<VnDI>
! 	      (any_extend:<VnDI>
! 		(match_operand:V_SI 1 "gcn_alu_operand" "  %v"))
! 	      (any_extend:<VnDI>
! 		(match_operand:V_SI 2 "gcn_alu_operand" "vSvA")))
  	    (const_int 32))))]
    ""
    "v_mul_hi<sgnsuffix>0\t%0, %2, %1"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
! (define_insn "mul<mode>3<exec>"
!   [(set (match_operand:V_INT_1REG 0 "register_operand"  "=   v")
! 	(mult:V_INT_1REG
! 	  (match_operand:V_INT_1REG 1 "gcn_alu_operand" "%vSvA")
! 	  (match_operand:V_INT_1REG 2 "gcn_alu_operand" " vSvA")))]
    ""
    "v_mul_lo_u32\t%0, %1, %2"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
! (define_insn "mul<mode>3_dup<exec>"
!   [(set (match_operand:V_INT_1REG 0 "register_operand"	     "=   v")
! 	(mult:V_INT_1REG
! 	  (match_operand:V_INT_1REG 1 "gcn_alu_operand"	     "%vSvA")
! 	  (vec_duplicate:V_INT_1REG
! 	    (match_operand:<SCALAR_MODE> 2 "gcn_alu_operand" "  SvA"))))]
    ""
    "v_mul_lo_u32\t%0, %1, %2"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
! (define_insn_and_split "mul<mode>3"
!   [(set (match_operand:V_DI 0 "register_operand"  "=&v")
! 	(mult:V_DI
! 	  (match_operand:V_DI 1 "gcn_alu_operand" "% v")
! 	  (match_operand:V_DI 2 "gcn_alu_operand" "vDA")))
!    (clobber (match_scratch:<VnSI> 3		  "=&v"))]
    ""
    "#"
    "reload_completed"
    [(const_int 0)]
    {
!     rtx out_lo = gcn_operand_part (<MODE>mode, operands[0], 0);
!     rtx out_hi = gcn_operand_part (<MODE>mode, operands[0], 1);
!     rtx left_lo = gcn_operand_part (<MODE>mode, operands[1], 0);
!     rtx left_hi = gcn_operand_part (<MODE>mode, operands[1], 1);
!     rtx right_lo = gcn_operand_part (<MODE>mode, operands[2], 0);
!     rtx right_hi = gcn_operand_part (<MODE>mode, operands[2], 1);
      rtx tmp = operands[3];
  
!     emit_insn (gen_mul<vnsi>3 (out_lo, left_lo, right_lo));
!     emit_insn (gen_umul<vnsi>3_highpart (out_hi, left_lo, right_lo));
!     emit_insn (gen_mul<vnsi>3 (tmp, left_hi, right_lo));
!     emit_insn (gen_add<vnsi>3 (out_hi, out_hi, tmp));
!     emit_insn (gen_mul<vnsi>3 (tmp, left_lo, right_hi));
!     emit_insn (gen_add<vnsi>3 (out_hi, out_hi, tmp));
!     emit_insn (gen_mul<vnsi>3 (tmp, left_hi, right_hi));
!     emit_insn (gen_add<vnsi>3 (out_hi, out_hi, tmp));
      DONE;
    })
  
! (define_insn_and_split "mul<mode>3_exec"
!   [(set (match_operand:V_DI 0 "register_operand"		 "=&v")
! 	(vec_merge:V_DI
! 	  (mult:V_DI
! 	    (match_operand:V_DI 1 "gcn_alu_operand"		 "% v")
! 	    (match_operand:V_DI 2 "gcn_alu_operand"		 "vDA"))
! 	  (match_operand:V_DI 3 "gcn_register_or_unspec_operand" " U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		 "  e")))
!    (clobber (match_scratch:<VnSI> 5				 "=&v"))]
    ""
    "#"
    "reload_completed"
    [(const_int 0)]
    {
!     rtx out_lo = gcn_operand_part (<MODE>mode, operands[0], 0);
!     rtx out_hi = gcn_operand_part (<MODE>mode, operands[0], 1);
!     rtx left_lo = gcn_operand_part (<MODE>mode, operands[1], 0);
!     rtx left_hi = gcn_operand_part (<MODE>mode, operands[1], 1);
!     rtx right_lo = gcn_operand_part (<MODE>mode, operands[2], 0);
!     rtx right_hi = gcn_operand_part (<MODE>mode, operands[2], 1);
      rtx exec = operands[4];
      rtx tmp = operands[5];
  
      rtx old_lo, old_hi;
      if (GET_CODE (operands[3]) == UNSPEC)
        {
! 	old_lo = old_hi = gcn_gen_undef (<VnSI>mode);
        }
      else
        {
! 	old_lo = gcn_operand_part (<MODE>mode, operands[3], 0);
! 	old_hi = gcn_operand_part (<MODE>mode, operands[3], 1);
        }
  
!     rtx undef = gcn_gen_undef (<VnSI>mode);
  
!     emit_insn (gen_mul<vnsi>3_exec (out_lo, left_lo, right_lo, old_lo, exec));
!     emit_insn (gen_umul<vnsi>3_highpart_exec (out_hi, left_lo, right_lo,
! 					      old_hi, exec));
!     emit_insn (gen_mul<vnsi>3_exec (tmp, left_hi, right_lo, undef, exec));
!     emit_insn (gen_add<vnsi>3_exec (out_hi, out_hi, tmp, out_hi, exec));
!     emit_insn (gen_mul<vnsi>3_exec (tmp, left_lo, right_hi, undef, exec));
!     emit_insn (gen_add<vnsi>3_exec (out_hi, out_hi, tmp, out_hi, exec));
!     emit_insn (gen_mul<vnsi>3_exec (tmp, left_hi, right_hi, undef, exec));
!     emit_insn (gen_add<vnsi>3_exec (out_hi, out_hi, tmp, out_hi, exec));
      DONE;
    })
  
! (define_insn_and_split "mul<mode>3_zext"
!   [(set (match_operand:V_DI 0 "register_operand"      "=&v")
! 	(mult:V_DI
! 	  (zero_extend:V_DI
! 	    (match_operand:<VnSI> 1 "gcn_alu_operand" "  v"))
! 	  (match_operand:V_DI 2 "gcn_alu_operand"     "vDA")))
!    (clobber (match_scratch:<VnSI> 3		      "=&v"))]
    ""
    "#"
    "reload_completed"
    [(const_int 0)]
    {
!     rtx out_lo = gcn_operand_part (<MODE>mode, operands[0], 0);
!     rtx out_hi = gcn_operand_part (<MODE>mode, operands[0], 1);
      rtx left = operands[1];
!     rtx right_lo = gcn_operand_part (<MODE>mode, operands[2], 0);
!     rtx right_hi = gcn_operand_part (<MODE>mode, operands[2], 1);
      rtx tmp = operands[3];
  
!     emit_insn (gen_mul<vnsi>3 (out_lo, left, right_lo));
!     emit_insn (gen_umul<vnsi>3_highpart (out_hi, left, right_lo));
!     emit_insn (gen_mul<vnsi>3 (tmp, left, right_hi));
!     emit_insn (gen_add<vnsi>3 (out_hi, out_hi, tmp));
      DONE;
    })
  
! (define_insn_and_split "mul<mode>3_zext_exec"
!   [(set (match_operand:V_DI 0 "register_operand"		 "=&v")
! 	(vec_merge:V_DI
! 	  (mult:V_DI
! 	    (zero_extend:V_DI
! 	      (match_operand:<VnSI> 1 "gcn_alu_operand"		 "  v"))
! 	    (match_operand:V_DI 2 "gcn_alu_operand"		 "vDA"))
! 	  (match_operand:V_DI 3 "gcn_register_or_unspec_operand" " U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		 "  e")))
!    (clobber (match_scratch:<VnSI> 5				 "=&v"))]
    ""
    "#"
    "reload_completed"
    [(const_int 0)]
    {
!     rtx out_lo = gcn_operand_part (<MODE>mode, operands[0], 0);
!     rtx out_hi = gcn_operand_part (<MODE>mode, operands[0], 1);
      rtx left = operands[1];
!     rtx right_lo = gcn_operand_part (<MODE>mode, operands[2], 0);
!     rtx right_hi = gcn_operand_part (<MODE>mode, operands[2], 1);
      rtx exec = operands[4];
      rtx tmp = operands[5];
  
      rtx old_lo, old_hi;
      if (GET_CODE (operands[3]) == UNSPEC)
        {
! 	old_lo = old_hi = gcn_gen_undef (<VnSI>mode);
        }
      else
        {
! 	old_lo = gcn_operand_part (<MODE>mode, operands[3], 0);
! 	old_hi = gcn_operand_part (<MODE>mode, operands[3], 1);
        }
  
!     rtx undef = gcn_gen_undef (<VnSI>mode);
  
!     emit_insn (gen_mul<vnsi>3_exec (out_lo, left, right_lo, old_lo, exec));
!     emit_insn (gen_umul<vnsi>3_highpart_exec (out_hi, left, right_lo,
! 					      old_hi, exec));
!     emit_insn (gen_mul<vnsi>3_exec (tmp, left, right_hi, undef, exec));
!     emit_insn (gen_add<vnsi>3_exec (out_hi, out_hi, tmp, out_hi, exec));
      DONE;
    })
  
! (define_insn_and_split "mul<mode>3_zext_dup2"
!   [(set (match_operand:V_DI 0 "register_operand"      "= &v")
! 	(mult:V_DI
! 	  (zero_extend:V_DI
! 	    (match_operand:<VnSI> 1 "gcn_alu_operand" "   v"))
! 	  (vec_duplicate:V_DI
! 	    (match_operand:DI 2 "gcn_alu_operand"     "SvDA"))))
!    (clobber (match_scratch:<VnSI> 3		      "= &v"))]
    ""
    "#"
    "reload_completed"
    [(const_int 0)]
    {
!     rtx out_lo = gcn_operand_part (<MODE>mode, operands[0], 0);
!     rtx out_hi = gcn_operand_part (<MODE>mode, operands[0], 1);
      rtx left = operands[1];
!     rtx right_lo = gcn_operand_part (<MODE>mode, operands[2], 0);
!     rtx right_hi = gcn_operand_part (<MODE>mode, operands[2], 1);
      rtx tmp = operands[3];
  
!     emit_insn (gen_mul<vnsi>3 (out_lo, left, right_lo));
!     emit_insn (gen_umul<vnsi>3_highpart (out_hi, left, right_lo));
!     emit_insn (gen_mul<vnsi>3 (tmp, left, right_hi));
!     emit_insn (gen_add<vnsi>3 (out_hi, out_hi, tmp));
      DONE;
    })
  
! (define_insn_and_split "mul<mode>3_zext_dup2_exec"
!   [(set (match_operand:V_DI 0 "register_operand"		 "= &v")
! 	(vec_merge:V_DI
! 	  (mult:V_DI
! 	    (zero_extend:V_DI
! 	      (match_operand:<VnSI> 1 "gcn_alu_operand"		 "   v"))
! 	    (vec_duplicate:V_DI
! 	      (match_operand:DI 2 "gcn_alu_operand"		 "SvDA")))
! 	  (match_operand:V_DI 3 "gcn_register_or_unspec_operand" "  U0")
! 	  (match_operand:DI 4 "gcn_exec_reg_operand"		 "   e")))
!    (clobber (match_scratch:<VnSI> 5				 "= &v"))]
    ""
    "#"
    "reload_completed"
    [(const_int 0)]
    {
!     rtx out_lo = gcn_operand_part (<MODE>mode, operands[0], 0);
!     rtx out_hi = gcn_operand_part (<MODE>mode, operands[0], 1);
      rtx left = operands[1];
!     rtx right_lo = gcn_operand_part (<MODE>mode, operands[2], 0);
!     rtx right_hi = gcn_operand_part (<MODE>mode, operands[2], 1);
      rtx exec = operands[4];
      rtx tmp = operands[5];
  
      rtx old_lo, old_hi;
      if (GET_CODE (operands[3]) == UNSPEC)
        {
! 	old_lo = old_hi = gcn_gen_undef (<VnSI>mode);
        }
      else
        {
! 	old_lo = gcn_operand_part (<MODE>mode, operands[3], 0);
! 	old_hi = gcn_operand_part (<MODE>mode, operands[3], 1);
        }
  
!     rtx undef = gcn_gen_undef (<VnSI>mode);
  
!     emit_insn (gen_mul<vnsi>3_exec (out_lo, left, right_lo, old_lo, exec));
!     emit_insn (gen_umul<vnsi>3_highpart_exec (out_hi, left, right_lo,
! 					      old_hi, exec));
!     emit_insn (gen_mul<vnsi>3_exec (tmp, left, right_hi, undef, exec));
!     emit_insn (gen_add<vnsi>3_exec (out_hi, out_hi, tmp, out_hi, exec));
      DONE;
    })
  
  ;; }}}
  ;; {{{ ALU generic case
  
  (define_code_iterator bitop [and ior xor])
  (define_code_iterator shiftop [ashift lshiftrt ashiftrt])
  (define_code_iterator minmaxop [smin smax umin umax])
  
  (define_insn "<expander><mode>2<exec>"
!   [(set (match_operand:V_INT_1REG 0 "gcn_valu_dst_operand"    "=  v")
! 	(bitunop:V_INT_1REG
! 	  (match_operand:V_INT_1REG 1 "gcn_valu_src0_operand" "vSvB")))]
    ""
    "v_<mnemonic>0\t%0, %1"
    [(set_attr "type" "vop1")
     (set_attr "length" "8")])
  
  (define_insn "<expander><mode>3<exec>"
!   [(set (match_operand:V_INT_1REG 0 "gcn_valu_dst_operand"	 "=  v,RD")
! 	(bitop:V_INT_1REG
! 	  (match_operand:V_INT_1REG 1 "gcn_valu_src0_operand"	 "%  v, 0")
! 	  (match_operand:V_INT_1REG 2 "gcn_valu_src1com_operand" "vSvB, v")))]
    ""
    "@
     v_<mnemonic>0\t%0, %2, %1
***************
*** 2000,2038 ****
    [(set_attr "type" "vop2,ds")
     (set_attr "length" "8,8")])
  
! (define_insn_and_split "<expander>v64di3"
!   [(set (match_operand:V64DI 0 "gcn_valu_dst_operand" "=&v,RD")
! 	(bitop:V64DI
! 	  (match_operand:V64DI 1 "gcn_valu_src0_operand"	  "%  v,RD")
! 	  (match_operand:V64DI 2 "gcn_valu_src1com_operand"	  "vSvB, v")))]
    ""
    "@
     #
     ds_<mnemonic>0\t%A0, %2%O0"
!   "(reload_completed && !gcn_ds_memory_operand (operands[0], V64DImode))"
    [(set (match_dup 3)
! 	(bitop:V64SI (match_dup 5) (match_dup 7)))
     (set (match_dup 4)
! 	(bitop:V64SI (match_dup 6) (match_dup 8)))]
    {
!     operands[3] = gcn_operand_part (V64DImode, operands[0], 0);
!     operands[4] = gcn_operand_part (V64DImode, operands[0], 1);
!     operands[5] = gcn_operand_part (V64DImode, operands[1], 0);
!     operands[6] = gcn_operand_part (V64DImode, operands[1], 1);
!     operands[7] = gcn_operand_part (V64DImode, operands[2], 0);
!     operands[8] = gcn_operand_part (V64DImode, operands[2], 1);
    }
    [(set_attr "type" "vmult,ds")
     (set_attr "length" "16,8")])
  
! (define_insn_and_split "<expander>v64di3_exec"
!   [(set (match_operand:V64DI 0 "gcn_valu_dst_operand" "=&v,RD")
! 	(vec_merge:V64DI
! 	  (bitop:V64DI
! 	    (match_operand:V64DI 1 "gcn_valu_src0_operand"	  "%  v,RD")
! 	    (match_operand:V64DI 2 "gcn_valu_src1com_operand"	  "vSvB, v"))
! 	  (match_operand:V64DI 3 "gcn_register_ds_or_unspec_operand"
! 								  "  U0,U0")
  	  (match_operand:DI 4 "gcn_exec_reg_operand"		  "   e, e")))]
    "!memory_operand (operands[0], VOIDmode)
     || (rtx_equal_p (operands[0], operands[1])
--- 1939,1976 ----
    [(set_attr "type" "vop2,ds")
     (set_attr "length" "8,8")])
  
! (define_insn_and_split "<expander><mode>3"
!   [(set (match_operand:V_DI 0 "gcn_valu_dst_operand"	   "=  v,RD")
! 	(bitop:V_DI
! 	  (match_operand:V_DI 1 "gcn_valu_src0_operand"    "%  v,RD")
! 	  (match_operand:V_DI 2 "gcn_valu_src1com_operand" "vSvB, v")))]
    ""
    "@
     #
     ds_<mnemonic>0\t%A0, %2%O0"
!   "(reload_completed && !gcn_ds_memory_operand (operands[0], <MODE>mode))"
    [(set (match_dup 3)
! 	(bitop:<VnSI> (match_dup 5) (match_dup 7)))
     (set (match_dup 4)
! 	(bitop:<VnSI> (match_dup 6) (match_dup 8)))]
    {
!     operands[3] = gcn_operand_part (<MODE>mode, operands[0], 0);
!     operands[4] = gcn_operand_part (<MODE>mode, operands[0], 1);
!     operands[5] = gcn_operand_part (<MODE>mode, operands[1], 0);
!     operands[6] = gcn_operand_part (<MODE>mode, operands[1], 1);
!     operands[7] = gcn_operand_part (<MODE>mode, operands[2], 0);
!     operands[8] = gcn_operand_part (<MODE>mode, operands[2], 1);
    }
    [(set_attr "type" "vmult,ds")
     (set_attr "length" "16,8")])
  
! (define_insn_and_split "<expander><mode>3_exec"
!   [(set (match_operand:V_DI 0 "gcn_valu_dst_operand"		  "=  v,RD")
! 	(vec_merge:V_DI
! 	  (bitop:V_DI
! 	    (match_operand:V_DI 1 "gcn_valu_src0_operand"	  "%  v,RD")
! 	    (match_operand:V_DI 2 "gcn_valu_src1com_operand"	  "vSvB, v"))
! 	  (match_operand:V_DI 3 "gcn_register_ds_or_unspec_operand" "U0,U0")
  	  (match_operand:DI 4 "gcn_exec_reg_operand"		  "   e, e")))]
    "!memory_operand (operands[0], VOIDmode)
     || (rtx_equal_p (operands[0], operands[1])
***************
*** 2040,2097 ****
    "@
     #
     ds_<mnemonic>0\t%A0, %2%O0"
!   "(reload_completed && !gcn_ds_memory_operand (operands[0], V64DImode))"
    [(set (match_dup 5)
! 	(vec_merge:V64SI
! 	  (bitop:V64SI (match_dup 7) (match_dup 9))
  	  (match_dup 11)
  	  (match_dup 4)))
     (set (match_dup 6)
! 	(vec_merge:V64SI
! 	  (bitop:V64SI (match_dup 8) (match_dup 10))
  	  (match_dup 12)
  	  (match_dup 4)))]
    {
!     operands[5] = gcn_operand_part (V64DImode, operands[0], 0);
!     operands[6] = gcn_operand_part (V64DImode, operands[0], 1);
!     operands[7] = gcn_operand_part (V64DImode, operands[1], 0);
!     operands[8] = gcn_operand_part (V64DImode, operands[1], 1);
!     operands[9] = gcn_operand_part (V64DImode, operands[2], 0);
!     operands[10] = gcn_operand_part (V64DImode, operands[2], 1);
!     operands[11] = gcn_operand_part (V64DImode, operands[3], 0);
!     operands[12] = gcn_operand_part (V64DImode, operands[3], 1);
    }
    [(set_attr "type" "vmult,ds")
     (set_attr "length" "16,8")])
  
! (define_insn "<expander>v64si3<exec>"
!   [(set (match_operand:V64SI 0 "register_operand"  "= v")
! 	(shiftop:V64SI
! 	  (match_operand:V64SI 1 "gcn_alu_operand" "  v")
! 	  (vec_duplicate:V64SI
  	    (match_operand:SI 2 "gcn_alu_operand"  "SvB"))))]
    ""
    "v_<revmnemonic>0\t%0, %2, %1"
    [(set_attr "type" "vop2")
     (set_attr "length" "8")])
  
! (define_insn "v<expander>v64si3<exec>"
!   [(set (match_operand:V64SI 0 "register_operand"  "=v")
! 	(shiftop:V64SI
! 	  (match_operand:V64SI 1 "gcn_alu_operand" " v")
! 	  (match_operand:V64SI 2 "gcn_alu_operand" "vB")))]
    ""
    "v_<revmnemonic>0\t%0, %2, %1"
    [(set_attr "type" "vop2")
     (set_attr "length" "8")])
  
! (define_insn "<expander><mode>3<exec>"
!   [(set (match_operand:VEC_1REG_INT_MODE 0 "gcn_valu_dst_operand" "=  v,RD")
! 	(minmaxop:VEC_1REG_INT_MODE
! 	  (match_operand:VEC_1REG_INT_MODE 1 "gcn_valu_src0_operand"
! 								  "%  v, 0")
! 	  (match_operand:VEC_1REG_INT_MODE 2 "gcn_valu_src1com_operand"
! 								  "vSvB, v")))]
    ""
    "@
     v_<mnemonic>0\t%0, %2, %1
--- 1978,2094 ----
    "@
     #
     ds_<mnemonic>0\t%A0, %2%O0"
!   "(reload_completed && !gcn_ds_memory_operand (operands[0], <MODE>mode))"
    [(set (match_dup 5)
! 	(vec_merge:<VnSI>
! 	  (bitop:<VnSI> (match_dup 7) (match_dup 9))
  	  (match_dup 11)
  	  (match_dup 4)))
     (set (match_dup 6)
! 	(vec_merge:<VnSI>
! 	  (bitop:<VnSI> (match_dup 8) (match_dup 10))
  	  (match_dup 12)
  	  (match_dup 4)))]
    {
!     operands[5] = gcn_operand_part (<MODE>mode, operands[0], 0);
!     operands[6] = gcn_operand_part (<MODE>mode, operands[0], 1);
!     operands[7] = gcn_operand_part (<MODE>mode, operands[1], 0);
!     operands[8] = gcn_operand_part (<MODE>mode, operands[1], 1);
!     operands[9] = gcn_operand_part (<MODE>mode, operands[2], 0);
!     operands[10] = gcn_operand_part (<MODE>mode, operands[2], 1);
!     operands[11] = gcn_operand_part (<MODE>mode, operands[3], 0);
!     operands[12] = gcn_operand_part (<MODE>mode, operands[3], 1);
    }
    [(set_attr "type" "vmult,ds")
     (set_attr "length" "16,8")])
  
! (define_expand "<expander><mode>3"
!   [(set (match_operand:V_QIHI 0 "register_operand"  "= v")
! 	(shiftop:V_QIHI
! 	  (match_operand:V_QIHI 1 "gcn_alu_operand" "  v")
! 	  (vec_duplicate:V_QIHI
! 	    (match_operand:SI 2 "gcn_alu_operand"   "SvB"))))]
!   ""
!   {
!     enum {ashift, lshiftrt, ashiftrt};
!     bool unsignedp = (<code> == lshiftrt);
!     rtx insi1 = gen_reg_rtx (<VnSI>mode);
!     rtx insi2 = gen_reg_rtx (SImode);
!     rtx outsi = gen_reg_rtx (<VnSI>mode);
! 
!     convert_move (insi1, operands[1], unsignedp);
!     convert_move (insi2, operands[2], unsignedp);
!     emit_insn (gen_<expander><vnsi>3 (outsi, insi1, insi2));
!     convert_move (operands[0], outsi, unsignedp);
!     DONE;
!   })
! 
! (define_insn "<expander><mode>3<exec>"
!   [(set (match_operand:V_SI 0 "register_operand"  "= v")
! 	(shiftop:V_SI
! 	  (match_operand:V_SI 1 "gcn_alu_operand" "  v")
! 	  (vec_duplicate:V_SI
  	    (match_operand:SI 2 "gcn_alu_operand"  "SvB"))))]
    ""
    "v_<revmnemonic>0\t%0, %2, %1"
    [(set_attr "type" "vop2")
     (set_attr "length" "8")])
  
! (define_expand "v<expander><mode>3"
!   [(set (match_operand:V_QIHI 0 "register_operand"  "=v")
! 	(shiftop:V_QIHI
! 	  (match_operand:V_QIHI 1 "gcn_alu_operand" " v")
! 	  (match_operand:V_QIHI 2 "gcn_alu_operand" "vB")))]
!   ""
!   {
!     enum {ashift, lshiftrt, ashiftrt};
!     bool unsignedp = (<code> == ashift || <code> == ashiftrt);
!     rtx insi1 = gen_reg_rtx (<VnSI>mode);
!     rtx insi2 = gen_reg_rtx (<VnSI>mode);
!     rtx outsi = gen_reg_rtx (<VnSI>mode);
! 
!     convert_move (insi1, operands[1], unsignedp);
!     convert_move (insi2, operands[2], unsignedp);
!     emit_insn (gen_v<expander><vnsi>3 (outsi, insi1, insi2));
!     convert_move (operands[0], outsi, unsignedp);
!     DONE;
!   })
! 
! (define_insn "v<expander><mode>3<exec>"
!   [(set (match_operand:V_SI 0 "register_operand"  "=v")
! 	(shiftop:V_SI
! 	  (match_operand:V_SI 1 "gcn_alu_operand" " v")
! 	  (match_operand:V_SI 2 "gcn_alu_operand" "vB")))]
    ""
    "v_<revmnemonic>0\t%0, %2, %1"
    [(set_attr "type" "vop2")
     (set_attr "length" "8")])
  
! (define_expand "<expander><mode>3"
!   [(set (match_operand:V_QIHI 0 "gcn_valu_dst_operand")
! 	(minmaxop:V_QIHI
! 	  (match_operand:V_QIHI 1 "gcn_valu_src0_operand")
! 	  (match_operand:V_QIHI 2 "gcn_valu_src1com_operand")))]
!   ""
!   {
!     enum {smin, umin, smax, umax};
!     bool unsignedp = (<code> == umax || <code> == umin);
!     rtx insi1 = gen_reg_rtx (<VnSI>mode);
!     rtx insi2 = gen_reg_rtx (<VnSI>mode);
!     rtx outsi = gen_reg_rtx (<VnSI>mode);
! 
!     convert_move (insi1, operands[1], unsignedp);
!     convert_move (insi2, operands[2], unsignedp);
!     emit_insn (gen_<code><vnsi>3 (outsi, insi1, insi2));
!     convert_move (operands[0], outsi, unsignedp);
!     DONE;
!   })
! 
! (define_insn "<expander><vnsi>3<exec>"
!   [(set (match_operand:V_SI 0 "gcn_valu_dst_operand"	   "=  v,RD")
! 	(minmaxop:V_SI
! 	  (match_operand:V_SI 1 "gcn_valu_src0_operand"    "%  v, 0")
! 	  (match_operand:V_SI 2 "gcn_valu_src1com_operand" "vSvB, v")))]
    ""
    "@
     v_<mnemonic>0\t%0, %2, %1
***************
*** 2105,2115 ****
  ; GCN does not directly provide a DFmode subtract instruction, so we do it by
  ; adding the negated second operand to the first.
  
! (define_insn "subv64df3<exec>"
!   [(set (match_operand:V64DF 0 "register_operand"  "=  v,   v")
! 	(minus:V64DF
! 	  (match_operand:V64DF 1 "gcn_alu_operand" "vSvB,   v")
! 	  (match_operand:V64DF 2 "gcn_alu_operand" "   v,vSvB")))]
    ""
    "@
     v_add_f64\t%0, %1, -%2
--- 2102,2112 ----
  ; GCN does not directly provide a DFmode subtract instruction, so we do it by
  ; adding the negated second operand to the first.
  
! (define_insn "sub<mode>3<exec>"
!   [(set (match_operand:V_DF 0 "register_operand"  "=  v,   v")
! 	(minus:V_DF
! 	  (match_operand:V_DF 1 "gcn_alu_operand" "vSvB,   v")
! 	  (match_operand:V_DF 2 "gcn_alu_operand" "   v,vSvB")))]
    ""
    "@
     v_add_f64\t%0, %1, -%2
***************
*** 2132,2161 ****
  ;; }}}
  ;; {{{ FP binops - generic
  
- (define_mode_iterator VEC_FP_MODE [V64HF V64SF V64DF])
- (define_mode_iterator VEC_FP_1REG_MODE [V64HF V64SF])
- (define_mode_iterator FP_MODE [HF SF DF])
- (define_mode_iterator FP_1REG_MODE [HF SF])
- 
  (define_code_iterator comm_fp [plus mult smin smax])
  (define_code_iterator nocomm_fp [minus])
  (define_code_iterator all_fp [plus mult minus smin smax])
  
  (define_insn "<expander><mode>3<exec>"
!   [(set (match_operand:VEC_FP_MODE 0 "register_operand"  "=  v")
! 	(comm_fp:VEC_FP_MODE
! 	  (match_operand:VEC_FP_MODE 1 "gcn_alu_operand" "%  v")
! 	  (match_operand:VEC_FP_MODE 2 "gcn_alu_operand" "vSvB")))]
    ""
    "v_<mnemonic>0\t%0, %2, %1"
    [(set_attr "type" "vop2")
     (set_attr "length" "8")])
  
  (define_insn "<expander><mode>3"
!   [(set (match_operand:FP_MODE 0 "gcn_valu_dst_operand"    "=  v,  RL")
! 	(comm_fp:FP_MODE
! 	  (match_operand:FP_MODE 1 "gcn_valu_src0_operand" "%  v,   0")
! 	  (match_operand:FP_MODE 2 "gcn_valu_src1_operand" "vSvB,vSvB")))]
    ""
    "@
    v_<mnemonic>0\t%0, %2, %1
--- 2129,2153 ----
  ;; }}}
  ;; {{{ FP binops - generic
  
  (define_code_iterator comm_fp [plus mult smin smax])
  (define_code_iterator nocomm_fp [minus])
  (define_code_iterator all_fp [plus mult minus smin smax])
  
  (define_insn "<expander><mode>3<exec>"
!   [(set (match_operand:V_FP 0 "register_operand"  "=  v")
! 	(comm_fp:V_FP
! 	  (match_operand:V_FP 1 "gcn_alu_operand" "%  v")
! 	  (match_operand:V_FP 2 "gcn_alu_operand" "vSvB")))]
    ""
    "v_<mnemonic>0\t%0, %2, %1"
    [(set_attr "type" "vop2")
     (set_attr "length" "8")])
  
  (define_insn "<expander><mode>3"
!   [(set (match_operand:FP 0 "gcn_valu_dst_operand"    "=  v,  RL")
! 	(comm_fp:FP
! 	  (match_operand:FP 1 "gcn_valu_src0_operand" "%  v,   0")
! 	  (match_operand:FP 2 "gcn_valu_src1_operand" "vSvB,vSvB")))]
    ""
    "@
    v_<mnemonic>0\t%0, %2, %1
***************
*** 2164,2173 ****
     (set_attr "length" "8")])
  
  (define_insn "<expander><mode>3<exec>"
!   [(set (match_operand:VEC_FP_1REG_MODE 0 "register_operand"  "=  v,   v")
! 	(nocomm_fp:VEC_FP_1REG_MODE
! 	  (match_operand:VEC_FP_1REG_MODE 1 "gcn_alu_operand" "vSvB,   v")
! 	  (match_operand:VEC_FP_1REG_MODE 2 "gcn_alu_operand" "   v,vSvB")))]
    ""
    "@
     v_<mnemonic>0\t%0, %1, %2
--- 2156,2165 ----
     (set_attr "length" "8")])
  
  (define_insn "<expander><mode>3<exec>"
!   [(set (match_operand:V_FP_1REG 0 "register_operand"  "=  v,   v")
! 	(nocomm_fp:V_FP_1REG
! 	  (match_operand:V_FP_1REG 1 "gcn_alu_operand" "vSvB,   v")
! 	  (match_operand:V_FP_1REG 2 "gcn_alu_operand" "   v,vSvB")))]
    ""
    "@
     v_<mnemonic>0\t%0, %1, %2
***************
*** 2176,2185 ****
     (set_attr "length" "8,8")])
  
  (define_insn "<expander><mode>3"
!   [(set (match_operand:FP_1REG_MODE 0 "register_operand"  "=  v,   v")
! 	(nocomm_fp:FP_1REG_MODE
! 	  (match_operand:FP_1REG_MODE 1 "gcn_alu_operand" "vSvB,   v")
! 	  (match_operand:FP_1REG_MODE 2 "gcn_alu_operand" "   v,vSvB")))]
    ""
    "@
     v_<mnemonic>0\t%0, %1, %2
--- 2168,2177 ----
     (set_attr "length" "8,8")])
  
  (define_insn "<expander><mode>3"
!   [(set (match_operand:FP_1REG 0 "register_operand"  "=  v,   v")
! 	(nocomm_fp:FP_1REG
! 	  (match_operand:FP_1REG 1 "gcn_alu_operand" "vSvB,   v")
! 	  (match_operand:FP_1REG 2 "gcn_alu_operand" "   v,vSvB")))]
    ""
    "@
     v_<mnemonic>0\t%0, %1, %2
***************
*** 2191,2234 ****
  ;; {{{ FP unops
  
  (define_insn "abs<mode>2"
!   [(set (match_operand:FP_MODE 0 "register_operand"		 "=v")
! 	(abs:FP_MODE (match_operand:FP_MODE 1 "register_operand" " v")))]
    ""
    "v_add%i0\t%0, 0, |%1|"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
  (define_insn "abs<mode>2<exec>"
!   [(set (match_operand:VEC_FP_MODE 0 "register_operand"	  "=v")
! 	(abs:VEC_FP_MODE
! 	  (match_operand:VEC_FP_MODE 1 "register_operand" " v")))]
    ""
    "v_add%i0\t%0, 0, |%1|"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
  (define_insn "neg<mode>2<exec>"
!   [(set (match_operand:VEC_FP_MODE 0 "register_operand"	  "=v")
! 	(neg:VEC_FP_MODE
! 	  (match_operand:VEC_FP_MODE 1 "register_operand" " v")))]
    ""
    "v_add%i0\t%0, 0, -%1"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
  (define_insn "sqrt<mode>2<exec>"
!   [(set (match_operand:VEC_FP_MODE 0 "register_operand"	 "=  v")
! 	(sqrt:VEC_FP_MODE
! 	  (match_operand:VEC_FP_MODE 1 "gcn_alu_operand" "vSvB")))]
    "flag_unsafe_math_optimizations"
    "v_sqrt%i0\t%0, %1"
    [(set_attr "type" "vop1")
     (set_attr "length" "8")])
  
  (define_insn "sqrt<mode>2"
!   [(set (match_operand:FP_MODE 0 "register_operand"  "=  v")
! 	(sqrt:FP_MODE
! 	  (match_operand:FP_MODE 1 "gcn_alu_operand" "vSvB")))]
    "flag_unsafe_math_optimizations"
    "v_sqrt%i0\t%0, %1"
    [(set_attr "type" "vop1")
--- 2183,2226 ----
  ;; {{{ FP unops
  
  (define_insn "abs<mode>2"
!   [(set (match_operand:FP 0 "register_operand"		 "=v")
! 	(abs:FP (match_operand:FP 1 "register_operand" " v")))]
    ""
    "v_add%i0\t%0, 0, |%1|"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
  (define_insn "abs<mode>2<exec>"
!   [(set (match_operand:V_FP 0 "register_operand"   "=v")
! 	(abs:V_FP
! 	  (match_operand:V_FP 1 "register_operand" " v")))]
    ""
    "v_add%i0\t%0, 0, |%1|"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
  (define_insn "neg<mode>2<exec>"
!   [(set (match_operand:V_FP 0 "register_operand"   "=v")
! 	(neg:V_FP
! 	  (match_operand:V_FP 1 "register_operand" " v")))]
    ""
    "v_add%i0\t%0, 0, -%1"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
  (define_insn "sqrt<mode>2<exec>"
!   [(set (match_operand:V_FP 0 "register_operand"  "=  v")
! 	(sqrt:V_FP
! 	  (match_operand:V_FP 1 "gcn_alu_operand" "vSvB")))]
    "flag_unsafe_math_optimizations"
    "v_sqrt%i0\t%0, %1"
    [(set_attr "type" "vop1")
     (set_attr "length" "8")])
  
  (define_insn "sqrt<mode>2"
!   [(set (match_operand:FP 0 "register_operand"  "=  v")
! 	(sqrt:FP
! 	  (match_operand:FP 1 "gcn_alu_operand" "vSvB")))]
    "flag_unsafe_math_optimizations"
    "v_sqrt%i0\t%0, %1"
    [(set_attr "type" "vop1")
***************
*** 2238,2283 ****
  ;; {{{ FP fused multiply and add
  
  (define_insn "fma<mode>4<exec>"
!   [(set (match_operand:VEC_FP_MODE 0 "register_operand"	 "=  v,   v")
! 	(fma:VEC_FP_MODE
! 	  (match_operand:VEC_FP_MODE 1 "gcn_alu_operand" "% vA,  vA")
! 	  (match_operand:VEC_FP_MODE 2 "gcn_alu_operand" "  vA,vSvA")
! 	  (match_operand:VEC_FP_MODE 3 "gcn_alu_operand" "vSvA,  vA")))]
    ""
    "v_fma%i0\t%0, %1, %2, %3"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
  (define_insn "fma<mode>4_negop2<exec>"
!   [(set (match_operand:VEC_FP_MODE 0 "register_operand"	   "=  v,   v,   v")
! 	(fma:VEC_FP_MODE
! 	  (match_operand:VEC_FP_MODE 1 "gcn_alu_operand"   "  vA,  vA,vSvA")
! 	  (neg:VEC_FP_MODE
! 	    (match_operand:VEC_FP_MODE 2 "gcn_alu_operand" "  vA,vSvA,  vA"))
! 	  (match_operand:VEC_FP_MODE 3 "gcn_alu_operand"   "vSvA,  vA,  vA")))]
    ""
    "v_fma%i0\t%0, %1, -%2, %3"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
  (define_insn "fma<mode>4"
!   [(set (match_operand:FP_MODE 0 "register_operand"  "=  v,   v")
! 	(fma:FP_MODE
! 	  (match_operand:FP_MODE 1 "gcn_alu_operand" "% vA,  vA")
! 	  (match_operand:FP_MODE 2 "gcn_alu_operand" "  vA,vSvA")
! 	  (match_operand:FP_MODE 3 "gcn_alu_operand" "vSvA,  vA")))]
    ""
    "v_fma%i0\t%0, %1, %2, %3"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
  (define_insn "fma<mode>4_negop2"
!   [(set (match_operand:FP_MODE 0 "register_operand"    "=  v,   v,   v")
! 	(fma:FP_MODE
! 	  (match_operand:FP_MODE 1 "gcn_alu_operand"   "  vA,  vA,vSvA")
! 	  (neg:FP_MODE
! 	    (match_operand:FP_MODE 2 "gcn_alu_operand" "  vA,vSvA,  vA"))
! 	  (match_operand:FP_MODE 3 "gcn_alu_operand"   "vSvA,  vA,  vA")))]
    ""
    "v_fma%i0\t%0, %1, -%2, %3"
    [(set_attr "type" "vop3a")
--- 2230,2275 ----
  ;; {{{ FP fused multiply and add
  
  (define_insn "fma<mode>4<exec>"
!   [(set (match_operand:V_FP 0 "register_operand"  "=  v,   v")
! 	(fma:V_FP
! 	  (match_operand:V_FP 1 "gcn_alu_operand" "% vA,  vA")
! 	  (match_operand:V_FP 2 "gcn_alu_operand" "  vA,vSvA")
! 	  (match_operand:V_FP 3 "gcn_alu_operand" "vSvA,  vA")))]
    ""
    "v_fma%i0\t%0, %1, %2, %3"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
  (define_insn "fma<mode>4_negop2<exec>"
!   [(set (match_operand:V_FP 0 "register_operand"    "=  v,   v,   v")
! 	(fma:V_FP
! 	  (match_operand:V_FP 1 "gcn_alu_operand"   "  vA,  vA,vSvA")
! 	  (neg:V_FP
! 	    (match_operand:V_FP 2 "gcn_alu_operand" "  vA,vSvA,  vA"))
! 	  (match_operand:V_FP 3 "gcn_alu_operand"   "vSvA,  vA,  vA")))]
    ""
    "v_fma%i0\t%0, %1, -%2, %3"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
  (define_insn "fma<mode>4"
!   [(set (match_operand:FP 0 "register_operand"  "=  v,   v")
! 	(fma:FP
! 	  (match_operand:FP 1 "gcn_alu_operand" "% vA,  vA")
! 	  (match_operand:FP 2 "gcn_alu_operand" "  vA,vSvA")
! 	  (match_operand:FP 3 "gcn_alu_operand" "vSvA,  vA")))]
    ""
    "v_fma%i0\t%0, %1, %2, %3"
    [(set_attr "type" "vop3a")
     (set_attr "length" "8")])
  
  (define_insn "fma<mode>4_negop2"
!   [(set (match_operand:FP 0 "register_operand"    "=  v,   v,   v")
! 	(fma:FP
! 	  (match_operand:FP 1 "gcn_alu_operand"   "  vA,  vA,vSvA")
! 	  (neg:FP
! 	    (match_operand:FP 2 "gcn_alu_operand" "  vA,vSvA,  vA"))
! 	  (match_operand:FP 3 "gcn_alu_operand"   "vSvA,  vA,  vA")))]
    ""
    "v_fma%i0\t%0, %1, -%2, %3"
    [(set_attr "type" "vop3a")
***************
*** 2287,2306 ****
  ;; {{{ FP division
  
  (define_insn "recip<mode>2<exec>"
!   [(set (match_operand:VEC_FP_MODE 0 "register_operand"	   "=  v")
! 	(div:VEC_FP_MODE
! 	  (vec_duplicate:VEC_FP_MODE (float:<SCALAR_MODE> (const_int 1)))
! 	  (match_operand:VEC_FP_MODE 1 "gcn_alu_operand"   "vSvB")))]
    ""
    "v_rcp%i0\t%0, %1"
    [(set_attr "type" "vop1")
     (set_attr "length" "8")])
  
  (define_insn "recip<mode>2"
!   [(set (match_operand:FP_MODE 0 "register_operand"	 "=  v")
! 	(div:FP_MODE
! 	  (float:FP_MODE (const_int 1))
! 	  (match_operand:FP_MODE 1 "gcn_alu_operand"	 "vSvB")))]
    ""
    "v_rcp%i0\t%0, %1"
    [(set_attr "type" "vop1")
--- 2279,2298 ----
  ;; {{{ FP division
  
  (define_insn "recip<mode>2<exec>"
!   [(set (match_operand:V_FP 0 "register_operand"  "=  v")
! 	(div:V_FP
! 	  (vec_duplicate:V_FP (float:<SCALAR_MODE> (const_int 1)))
! 	  (match_operand:V_FP 1 "gcn_alu_operand" "vSvB")))]
    ""
    "v_rcp%i0\t%0, %1"
    [(set_attr "type" "vop1")
     (set_attr "length" "8")])
  
  (define_insn "recip<mode>2"
!   [(set (match_operand:FP 0 "register_operand"	 "=  v")
! 	(div:FP
! 	  (float:FP (const_int 1))
! 	  (match_operand:FP 1 "gcn_alu_operand"	 "vSvB")))]
    ""
    "v_rcp%i0\t%0, %1"
    [(set_attr "type" "vop1")
***************
*** 2314,2322 ****
  ;; FIXME: This does not handle denormals, NaNs, division-by-zero etc.
  
  (define_expand "div<mode>3"
!   [(match_operand:VEC_FP_MODE 0 "gcn_valu_dst_operand")
!    (match_operand:VEC_FP_MODE 1 "gcn_valu_src0_operand")
!    (match_operand:VEC_FP_MODE 2 "gcn_valu_src0_operand")]
    "flag_reciprocal_math"
    {
      rtx two = gcn_vec_constant (<MODE>mode,
--- 2306,2314 ----
  ;; FIXME: This does not handle denormals, NaNs, division-by-zero etc.
  
  (define_expand "div<mode>3"
!   [(match_operand:V_FP 0 "gcn_valu_dst_operand")
!    (match_operand:V_FP 1 "gcn_valu_src0_operand")
!    (match_operand:V_FP 2 "gcn_valu_src0_operand")]
    "flag_reciprocal_math"
    {
      rtx two = gcn_vec_constant (<MODE>mode,
***************
*** 2346,2354 ****
    })
  
  (define_expand "div<mode>3"
!   [(match_operand:FP_MODE 0 "gcn_valu_dst_operand")
!    (match_operand:FP_MODE 1 "gcn_valu_src0_operand")
!    (match_operand:FP_MODE 2 "gcn_valu_src0_operand")]
    "flag_reciprocal_math"
    {
      rtx two = const_double_from_real_value (dconst2, <MODE>mode);
--- 2338,2346 ----
    })
  
  (define_expand "div<mode>3"
!   [(match_operand:FP 0 "gcn_valu_dst_operand")
!    (match_operand:FP 1 "gcn_valu_src0_operand")
!    (match_operand:FP 2 "gcn_valu_src0_operand")]
    "flag_reciprocal_math"
    {
      rtx two = const_double_from_real_value (dconst2, <MODE>mode);
***************
*** 2381,2388 ****
  (define_mode_iterator CVT_FROM_MODE [HI SI HF SF DF])
  (define_mode_iterator CVT_TO_MODE [HI SI HF SF DF])
  
! (define_mode_iterator VCVT_FROM_MODE [V64HI V64SI V64HF V64SF V64DF])
! (define_mode_iterator VCVT_TO_MODE [V64HI V64SI V64HF V64SF V64DF])
  
  (define_code_iterator cvt_op [fix unsigned_fix
  			      float unsigned_float
--- 2373,2381 ----
  (define_mode_iterator CVT_FROM_MODE [HI SI HF SF DF])
  (define_mode_iterator CVT_TO_MODE [HI SI HF SF DF])
  
! (define_mode_iterator VCVT_MODE [V64HI V64SI V64HF V64SF V64DF])
! (define_mode_iterator VCVT_FMODE [V64HF V64SF V64DF])
! (define_mode_iterator VCVT_IMODE [V64HI V64SI])
  
  (define_code_iterator cvt_op [fix unsigned_fix
  			      float unsigned_float
***************
*** 2405,2415 ****
    [(set_attr "type" "vop1")
     (set_attr "length" "8")])
  
! (define_insn "<cvt_name><VCVT_FROM_MODE:mode><VCVT_TO_MODE:mode>2<exec>"
!   [(set (match_operand:VCVT_TO_MODE 0 "register_operand"    "=  v")
! 	(cvt_op:VCVT_TO_MODE
! 	  (match_operand:VCVT_FROM_MODE 1 "gcn_alu_operand" "vSvB")))]
!   "gcn_valid_cvt_p (<VCVT_FROM_MODE:MODE>mode, <VCVT_TO_MODE:MODE>mode,
  		    <cvt_name>_cvt)"
    "v_cvt<cvt_operands>\t%0, %1"
    [(set_attr "type" "vop1")
--- 2398,2418 ----
    [(set_attr "type" "vop1")
     (set_attr "length" "8")])
  
! (define_insn "<cvt_name><VCVT_MODE:mode><VCVT_FMODE:mode>2<exec>"
!   [(set (match_operand:VCVT_FMODE 0 "register_operand" "=  v")
! 	(cvt_op:VCVT_FMODE
! 	  (match_operand:VCVT_MODE 1 "gcn_alu_operand" "vSvB")))]
!   "gcn_valid_cvt_p (<VCVT_MODE:MODE>mode, <VCVT_FMODE:MODE>mode,
! 		    <cvt_name>_cvt)"
!   "v_cvt<cvt_operands>\t%0, %1"
!   [(set_attr "type" "vop1")
!    (set_attr "length" "8")])
! 
! (define_insn "<cvt_name><VCVT_FMODE:mode><VCVT_IMODE:mode>2<exec>"
!   [(set (match_operand:VCVT_IMODE 0 "register_operand"  "=  v")
! 	(cvt_op:VCVT_IMODE
! 	  (match_operand:VCVT_FMODE 1 "gcn_alu_operand" "vSvB")))]
!   "gcn_valid_cvt_p (<VCVT_FMODE:MODE>mode, <VCVT_IMODE:MODE>mode,
  		    <cvt_name>_cvt)"
    "v_cvt<cvt_operands>\t%0, %1"
    [(set_attr "type" "vop1")
***************
*** 2418,2470 ****
  ;; }}}
  ;; {{{ Int/int conversions
  
  ;; GCC can already do these for scalar types, but not for vector types.
  ;; Unfortunately you can't just do SUBREG on a vector to select the low part,
  ;; so there must be a few tricks here.
  
! (define_insn_and_split "vec_truncatev64div64si"
!   [(set (match_operand:V64SI 0 "register_operand"   "=v,&v")
! 	(truncate:V64SI
! 	  (match_operand:V64DI 1 "register_operand" " 0, v")))]
    ""
    "#"
    "reload_completed"
!   [(set (match_dup 0) (match_dup 1))]
    {
!     operands[1] = gcn_operand_part (V64SImode, operands[1], 0);
    }
    [(set_attr "type" "vop2")
!    (set_attr "length" "0,4")])
  
! (define_insn_and_split "vec_truncatev64div64si_exec"
!   [(set (match_operand:V64SI 0 "register_operand"	     "=v,&v")
! 	(vec_merge:V64SI
! 	  (truncate:V64SI
! 	    (match_operand:V64DI 1 "register_operand"        " 0, v"))
! 	  (match_operand:V64SI 2 "gcn_alu_or_unspec_operand" "U0,U0")
! 	  (match_operand:DI 3 "gcn_exec_operand"	     " e, e")))]
    ""
    "#"
    "reload_completed"
!   [(parallel [(set (match_dup 0)
! 		   (vec_merge:V64SI (match_dup 1) (match_dup 2) (match_dup 3)))
! 	      (clobber (scratch:V64DI))])]
    {
!     operands[1] = gcn_operand_part (V64SImode, operands[1], 0);
    }
    [(set_attr "type" "vop2")
!    (set_attr "length" "0,4")])
  
  ;; }}}
  ;; {{{ Vector comparison/merge
  
  (define_insn "vec_cmp<mode>di"
    [(set (match_operand:DI 0 "register_operand"	      "=cV,cV,  e, e,Sg,Sg")
! 	(match_operator 1 "comparison_operator"
! 	  [(match_operand:VEC_1REG_MODE 2 "gcn_alu_operand"
! 						      "vSv, B,vSv, B, v,vA")
! 	   (match_operand:VEC_1REG_MODE 3 "gcn_vop3_operand"
! 						      "  v, v,  v, v,vA, v")]))
     (clobber (match_scratch:DI 4			      "= X, X, cV,cV, X, X"))]
    ""
    "@
--- 2421,2565 ----
  ;; }}}
  ;; {{{ Int/int conversions
  
+ (define_code_iterator zero_convert [truncate zero_extend])
+ (define_code_attr convop [
+ 	(sign_extend "extend")
+ 	(zero_extend "zero_extend")
+ 	(truncate "trunc")])
+ 
+ (define_insn "<convop><V_INT_1REG_ALT:mode><V_INT_1REG:mode>2<exec>"
+   [(set (match_operand:V_INT_1REG 0 "register_operand"      "=v")
+         (zero_convert:V_INT_1REG
+ 	  (match_operand:V_INT_1REG_ALT 1 "gcn_alu_operand" " v")))]
+   ""
+   "v_mov_b32_sdwa\t%0, %1 dst_sel:<V_INT_1REG:sdwa> dst_unused:UNUSED_PAD src0_sel:<V_INT_1REG_ALT:sdwa>"
+   [(set_attr "type" "vop_sdwa")
+    (set_attr "length" "8")])
+ 
+ (define_insn "extend<V_INT_1REG_ALT:mode><V_INT_1REG:mode>2<exec>"
+   [(set (match_operand:V_INT_1REG 0 "register_operand"	    "=v")
+         (sign_extend:V_INT_1REG
+ 	  (match_operand:V_INT_1REG_ALT 1 "gcn_alu_operand" " v")))]
+   ""
+   "v_mov_b32_sdwa\t%0, sext(%1) src0_sel:<V_INT_1REG_ALT:sdwa>"
+   [(set_attr "type" "vop_sdwa")
+    (set_attr "length" "8")])
+ 
  ;; GCC can already do these for scalar types, but not for vector types.
  ;; Unfortunately you can't just do SUBREG on a vector to select the low part,
  ;; so there must be a few tricks here.
  
! (define_insn_and_split "trunc<vndi><mode>2"
!   [(set (match_operand:V_INT_1REG 0 "register_operand" "=v")
! 	(truncate:V_INT_1REG
! 	  (match_operand:<VnDI> 1 "gcn_alu_operand"     " v")))]
    ""
    "#"
    "reload_completed"
!   [(const_int 0)]
    {
!     rtx inlo = gcn_operand_part (<VnDI>mode, operands[1], 0);
!     rtx out = operands[0];
! 
!     if (<MODE>mode != <VnSI>mode)
!       emit_insn (gen_trunc<vnsi><mode>2 (out, inlo));
!     else
!       emit_move_insn (out, inlo);
    }
    [(set_attr "type" "vop2")
!    (set_attr "length" "4")])
  
! (define_insn_and_split "trunc<vndi><mode>2_exec"
!   [(set (match_operand:V_INT_1REG 0 "register_operand"		  "=v")
! 	(vec_merge:V_INT_1REG
! 	  (truncate:V_INT_1REG
! 	    (match_operand:<VnDI> 1 "gcn_alu_operand"		  " v"))
! 	  (match_operand:V_INT_1REG 2 "gcn_alu_or_unspec_operand" "U0")
! 	  (match_operand:DI 3 "gcn_exec_operand"		  " e")))]
    ""
    "#"
    "reload_completed"
!   [(const_int 0)]
    {
!     rtx out = operands[0];
!     rtx inlo = gcn_operand_part (<VnDI>mode, operands[1], 0);
!     rtx merge = operands[2];
!     rtx exec = operands[3];
! 
!     if (<MODE>mode != <VnSI>mode)
!       emit_insn (gen_trunc<vnsi><mode>2_exec (out, inlo, merge, exec));
!     else
!       emit_insn (gen_mov<mode>_exec (out, inlo, merge, exec));
    }
    [(set_attr "type" "vop2")
!    (set_attr "length" "4")])
! 
! (define_insn_and_split "<convop><mode><vndi>2"
!   [(set (match_operand:<VnDI> 0 "register_operand"	"=v")
! 	(any_extend:<VnDI>
! 	  (match_operand:V_INT_1REG 1 "gcn_alu_operand" " v")))]
!   ""
!   "#"
!   "reload_completed"
!   [(const_int 0)]
!   {
!     rtx outlo = gcn_operand_part (<VnDI>mode, operands[0], 0);
!     rtx outhi = gcn_operand_part (<VnDI>mode, operands[0], 1);
!     rtx in = operands[1];
!       
!     if (<MODE>mode != <VnSI>mode)
!       emit_insn (gen_<convop><mode><vnsi>2 (outlo, in));
!     else
!       emit_move_insn (outlo, in);
!     if ('<su>' == 's')
!       emit_insn (gen_ashr<vnsi>3 (outhi, outlo, GEN_INT (31)));
!     else
!       emit_insn (gen_vec_duplicate<vnsi> (outhi, const0_rtx));
!   }
!   [(set_attr "type" "mult")
!    (set_attr "length" "12")])
! 
! (define_insn_and_split "<convop><mode><vndi>2_exec"
!   [(set (match_operand:<VnDI> 0 "register_operand"	     "=v")
! 	(vec_merge:<VnDI>
! 	  (any_extend:<VnDI>
! 	    (match_operand:V_INT_1REG 1 "gcn_alu_operand"    " v"))
! 	  (match_operand:<VnDI> 2 "gcn_alu_or_unspec_operand" "U0")
! 	  (match_operand:DI 3 "gcn_exec_operand"	     " e")))]
!   ""
!   "#"
!   "reload_completed"
!   [(const_int 0)]
!   {
!     rtx outlo = gcn_operand_part (<VnDI>mode, operands[0], 0);
!     rtx outhi = gcn_operand_part (<VnDI>mode, operands[0], 1);
!     rtx in = operands[1];
!     rtx mergelo = gcn_operand_part (<VnDI>mode, operands[2], 0);
!     rtx mergehi = gcn_operand_part (<VnDI>mode, operands[2], 1);
!     rtx exec = operands[3];
!       
!     if (<MODE>mode != <VnSI>mode)
!       emit_insn (gen_<convop><mode><vnsi>2_exec (outlo, in, mergelo, exec));
!     else
!       emit_insn (gen_mov<mode>_exec (outlo, in, mergelo, exec));
!     if ('<su>' == 's')
!       emit_insn (gen_ashr<vnsi>3_exec (outhi, outlo, GEN_INT (31), mergehi,
! 				       exec));
!     else
!       emit_insn (gen_vec_duplicate<vnsi>_exec (outhi, const0_rtx, mergehi,
! 					       exec));
!   }
!   [(set_attr "type" "mult")
!    (set_attr "length" "12")])
  
  ;; }}}
  ;; {{{ Vector comparison/merge
  
  (define_insn "vec_cmp<mode>di"
    [(set (match_operand:DI 0 "register_operand"	      "=cV,cV,  e, e,Sg,Sg")
! 	(match_operator:DI 1 "gcn_fp_compare_operator"
! 	  [(match_operand:V_noQI 2 "gcn_alu_operand"  "vSv, B,vSv, B, v,vA")
! 	   (match_operand:V_noQI 3 "gcn_vop3_operand" "  v, v,  v, v,vA, v")]))
     (clobber (match_scratch:DI 4			      "= X, X, cV,cV, X, X"))]
    ""
    "@
***************
*** 2479,2487 ****
  
  (define_expand "vec_cmpu<mode>di"
    [(match_operand:DI 0 "register_operand")
!    (match_operator 1 "comparison_operator"
!      [(match_operand:VEC_1REG_INT_MODE 2 "gcn_alu_operand")
!       (match_operand:VEC_1REG_INT_MODE 3 "gcn_vop3_operand")])]
    ""
    {
      /* Unsigned comparisons use the same patterns as signed comparisons,
--- 2574,2582 ----
  
  (define_expand "vec_cmpu<mode>di"
    [(match_operand:DI 0 "register_operand")
!    (match_operator 1 "gcn_compare_operator"
!      [(match_operand:V_INT_noQI 2 "gcn_alu_operand")
!       (match_operand:V_INT_noQI 3 "gcn_vop3_operand")])]
    ""
    {
      /* Unsigned comparisons use the same patterns as signed comparisons,
***************
*** 2492,2505 ****
      DONE;
    })
  
  (define_insn "vec_cmp<mode>di_exec"
    [(set (match_operand:DI 0 "register_operand"	       "=cV,cV,  e, e,Sg,Sg")
  	(and:DI
! 	  (match_operator 1 "comparison_operator"
! 	    [(match_operand:VEC_1REG_MODE 2 "gcn_alu_operand"
! 						       "vSv, B,vSv, B, v,vA")
! 	     (match_operand:VEC_1REG_MODE 3 "gcn_vop3_operand"
! 						       "  v, v,  v, v,vA, v")])
  	  (match_operand:DI 4 "gcn_exec_reg_operand"   "  e, e,  e, e, e, e")))
     (clobber (match_scratch:DI 5			       "= X, X, cV,cV, X, X"))]
    ""
--- 2587,2615 ----
      DONE;
    })
  
+ ; There's no instruction for 8-bit vector comparison, so we need to extend.
+ (define_expand "vec_cmp<u><mode>di"
+   [(match_operand:DI 0 "register_operand")
+    (match_operator 1 "gcn_compare_operator"
+      [(any_extend:<VnSI> (match_operand:V_QI 2 "gcn_alu_operand"))
+       (any_extend:<VnSI> (match_operand:V_QI 3 "gcn_vop3_operand"))])]
+   "can_create_pseudo_p ()"
+   {
+     rtx sitmp1 = gen_reg_rtx (<VnSI>mode);
+     rtx sitmp2 = gen_reg_rtx (<VnSI>mode);
+ 
+     emit_insn (gen_<expander><mode><vnsi>2 (sitmp1, operands[2]));
+     emit_insn (gen_<expander><mode><vnsi>2 (sitmp2, operands[3]));
+     emit_insn (gen_vec_cmp<vnsi>di (operands[0], operands[1], sitmp1, sitmp2));
+     DONE;
+   })
+ 
  (define_insn "vec_cmp<mode>di_exec"
    [(set (match_operand:DI 0 "register_operand"	       "=cV,cV,  e, e,Sg,Sg")
  	(and:DI
! 	  (match_operator 1 "gcn_fp_compare_operator"
! 	    [(match_operand:V_noQI 2 "gcn_alu_operand" "vSv, B,vSv, B, v,vA")
! 	     (match_operand:V_noQI 3 "gcn_vop3_operand" " v, v,  v, v,vA, v")])
  	  (match_operand:DI 4 "gcn_exec_reg_operand"   "  e, e,  e, e, e, e")))
     (clobber (match_scratch:DI 5			       "= X, X, cV,cV, X, X"))]
    ""
***************
*** 2513,2526 ****
    [(set_attr "type" "vopc,vopc,vopc,vopc,vop3a,vop3a")
     (set_attr "length" "4,8,4,8,8,8")])
  
  (define_insn "vec_cmp<mode>di_dup"
    [(set (match_operand:DI 0 "register_operand"		   "=cV,cV, e,e,Sg")
! 	(match_operator 1 "comparison_operator"
! 	  [(vec_duplicate:VEC_1REG_MODE
  	     (match_operand:<SCALAR_MODE> 2 "gcn_alu_operand"
  							   " Sv, B,Sv,B, A"))
! 	   (match_operand:VEC_1REG_MODE 3 "gcn_vop3_operand"
! 							   "  v, v, v,v, v")]))
     (clobber (match_scratch:DI 4				   "= X,X,cV,cV, X"))]
    ""
    "@
--- 2623,2672 ----
    [(set_attr "type" "vopc,vopc,vopc,vopc,vop3a,vop3a")
     (set_attr "length" "4,8,4,8,8,8")])
  
+ (define_expand "vec_cmpu<mode>di_exec"
+   [(match_operand:DI 0 "register_operand")
+    (match_operator 1 "gcn_compare_operator"
+      [(match_operand:V_INT_noQI 2 "gcn_alu_operand")
+       (match_operand:V_INT_noQI 3 "gcn_vop3_operand")])
+    (match_operand:DI 4 "gcn_exec_reg_operand")]
+   ""
+   {
+     /* Unsigned comparisons use the same patterns as signed comparisons,
+        except that they use unsigned operators (e.g. LTU vs LT).
+        The '%E1' directive then does the Right Thing.  */
+     emit_insn (gen_vec_cmpu<mode>di_exec (operands[0], operands[1],
+ 					  operands[2], operands[3],
+ 					  operands[4]));
+     DONE;
+   })
+ 
+ (define_expand "vec_cmp<u><mode>di_exec"
+   [(match_operand:DI 0 "register_operand")
+    (match_operator 1 "gcn_compare_operator"
+      [(any_extend:<VnSI> (match_operand:V_QI 2 "gcn_alu_operand"))
+       (any_extend:<VnSI> (match_operand:V_QI 3 "gcn_vop3_operand"))])
+    (match_operand:DI 4 "gcn_exec_reg_operand")]
+   "can_create_pseudo_p ()"
+   {
+     rtx sitmp1 = gen_reg_rtx (<VnSI>mode);
+     rtx sitmp2 = gen_reg_rtx (<VnSI>mode);
+ 
+     emit_insn (gen_<expander><mode><vnsi>2_exec (sitmp1, operands[2],
+ 						 operands[2], operands[4]));
+     emit_insn (gen_<expander><mode><vnsi>2_exec (sitmp2, operands[3],
+ 						 operands[3], operands[4]));
+     emit_insn (gen_vec_cmp<vnsi>di_exec (operands[0], operands[1], sitmp1,
+ 					 sitmp2, operands[4]));
+     DONE;
+   })
+ 
  (define_insn "vec_cmp<mode>di_dup"
    [(set (match_operand:DI 0 "register_operand"		   "=cV,cV, e,e,Sg")
! 	(match_operator:DI 1 "gcn_fp_compare_operator"
! 	  [(vec_duplicate:V_noQI
  	     (match_operand:<SCALAR_MODE> 2 "gcn_alu_operand"
  							   " Sv, B,Sv,B, A"))
! 	   (match_operand:V_noQI 3 "gcn_vop3_operand"	   "  v, v, v,v, v")]))
     (clobber (match_scratch:DI 4				   "= X,X,cV,cV, X"))]
    ""
    "@
***************
*** 2535,2546 ****
  (define_insn "vec_cmp<mode>di_dup_exec"
    [(set (match_operand:DI 0 "register_operand"		    "=cV,cV, e,e,Sg")
  	(and:DI
! 	  (match_operator 1 "comparison_operator"
! 	    [(vec_duplicate:VEC_1REG_MODE
  	       (match_operand:<SCALAR_MODE> 2 "gcn_alu_operand"
  							    " Sv, B,Sv,B, A"))
! 	     (match_operand:VEC_1REG_MODE 3 "gcn_vop3_operand"
! 							    "  v, v, v,v, v")])
  	  (match_operand:DI 4 "gcn_exec_reg_operand"	    "  e, e, e,e, e")))
     (clobber (match_scratch:DI 5				    "= X,X,cV,cV, X"))]
    ""
--- 2681,2691 ----
  (define_insn "vec_cmp<mode>di_dup_exec"
    [(set (match_operand:DI 0 "register_operand"		    "=cV,cV, e,e,Sg")
  	(and:DI
! 	  (match_operator 1 "gcn_fp_compare_operator"
! 	    [(vec_duplicate:V_noQI
  	       (match_operand:<SCALAR_MODE> 2 "gcn_alu_operand"
  							    " Sv, B,Sv,B, A"))
! 	     (match_operand:V_noQI 3 "gcn_vop3_operand"	    "  v, v, v,v, v")])
  	  (match_operand:DI 4 "gcn_exec_reg_operand"	    "  e, e, e,e, e")))
     (clobber (match_scratch:DI 5				    "= X,X,cV,cV, X"))]
    ""
***************
*** 2555,2636 ****
  
  (define_expand "vcond_mask_<mode>di"
    [(parallel
!     [(set (match_operand:VEC_REG_MODE 0 "register_operand" "")
! 	  (vec_merge:VEC_REG_MODE
! 	    (match_operand:VEC_REG_MODE 1 "gcn_vop3_operand" "")
! 	    (match_operand:VEC_REG_MODE 2 "gcn_alu_operand" "")
! 	    (match_operand:DI 3 "register_operand" "")))
!      (clobber (scratch:V64DI))])]
    ""
    "")
  
! (define_expand "vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>"
!   [(match_operand:VEC_1REG_MODE 0 "register_operand")
!    (match_operand:VEC_1REG_MODE 1 "gcn_vop3_operand")
!    (match_operand:VEC_1REG_MODE 2 "gcn_alu_operand")
!    (match_operator 3 "comparison_operator"
!      [(match_operand:VEC_1REG_ALT 4 "gcn_alu_operand")
!       (match_operand:VEC_1REG_ALT 5 "gcn_vop3_operand")])]
    ""
    {
      rtx tmp = gen_reg_rtx (DImode);
!     emit_insn (gen_vec_cmp<mode>di (tmp, operands[3], operands[4],
! 				    operands[5]));
!     emit_insn (gen_vcond_mask_<mode>di (operands[0], operands[1], operands[2],
! 					tmp));
      DONE;
    })
  
! (define_expand "vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>_exec"
!   [(match_operand:VEC_1REG_MODE 0 "register_operand")
!    (match_operand:VEC_1REG_MODE 1 "gcn_vop3_operand")
!    (match_operand:VEC_1REG_MODE 2 "gcn_alu_operand")
!    (match_operator 3 "comparison_operator"
!      [(match_operand:VEC_1REG_ALT 4 "gcn_alu_operand")
!       (match_operand:VEC_1REG_ALT 5 "gcn_vop3_operand")])
     (match_operand:DI 6 "gcn_exec_reg_operand" "e")]
    ""
    {
      rtx tmp = gen_reg_rtx (DImode);
!     emit_insn (gen_vec_cmp<mode>di_exec (tmp, operands[3], operands[4],
! 					 operands[5], operands[6]));
!     emit_insn (gen_vcond_mask_<mode>di (operands[0], operands[1], operands[2],
! 					tmp));
      DONE;
    })
  
! (define_expand "vcondu<VEC_1REG_INT_MODE:mode><VEC_1REG_INT_ALT:mode>"
!   [(match_operand:VEC_1REG_INT_MODE 0 "register_operand")
!    (match_operand:VEC_1REG_INT_MODE 1 "gcn_vop3_operand")
!    (match_operand:VEC_1REG_INT_MODE 2 "gcn_alu_operand")
!    (match_operator 3 "comparison_operator"
!      [(match_operand:VEC_1REG_INT_ALT 4 "gcn_alu_operand")
!       (match_operand:VEC_1REG_INT_ALT 5 "gcn_vop3_operand")])]
    ""
    {
      rtx tmp = gen_reg_rtx (DImode);
!     emit_insn (gen_vec_cmp<mode>di (tmp, operands[3], operands[4],
! 				    operands[5]));
!     emit_insn (gen_vcond_mask_<mode>di (operands[0], operands[1], operands[2],
! 				        tmp));
      DONE;
    })
  
! (define_expand "vcondu<VEC_1REG_INT_MODE:mode><VEC_1REG_INT_ALT:mode>_exec"
!   [(match_operand:VEC_1REG_INT_MODE 0 "register_operand")
!    (match_operand:VEC_1REG_INT_MODE 1 "gcn_vop3_operand")
!    (match_operand:VEC_1REG_INT_MODE 2 "gcn_alu_operand")
!    (match_operator 3 "comparison_operator"
!      [(match_operand:VEC_1REG_INT_ALT 4 "gcn_alu_operand")
!       (match_operand:VEC_1REG_INT_ALT 5 "gcn_vop3_operand")])
     (match_operand:DI 6 "gcn_exec_reg_operand" "e")]
    ""
    {
      rtx tmp = gen_reg_rtx (DImode);
!     emit_insn (gen_vec_cmp<mode>di_exec (tmp, operands[3], operands[4],
! 					 operands[5], operands[6]));
!     emit_insn (gen_vcond_mask_<mode>di (operands[0], operands[1], operands[2],
! 				        tmp));
      DONE;
    })
  
--- 2700,2781 ----
  
  (define_expand "vcond_mask_<mode>di"
    [(parallel
!     [(set (match_operand:V_ALL 0   "register_operand" "")
! 	  (vec_merge:V_ALL
! 	    (match_operand:V_ALL 1 "gcn_vop3_operand" "")
! 	    (match_operand:V_ALL 2 "gcn_alu_operand" "")
! 	    (match_operand:DI 3		     "register_operand" "")))
!      (clobber (scratch:<VnDI>))])]
    ""
    "")
  
! (define_expand "vcond<V_ALL:mode><V_ALL_ALT:mode>"
!   [(match_operand:V_ALL 0 "register_operand")
!    (match_operand:V_ALL 1 "gcn_vop3_operand")
!    (match_operand:V_ALL 2 "gcn_alu_operand")
!    (match_operator 3 "gcn_fp_compare_operator"
!      [(match_operand:V_ALL_ALT 4 "gcn_alu_operand")
!       (match_operand:V_ALL_ALT 5 "gcn_vop3_operand")])]
    ""
    {
      rtx tmp = gen_reg_rtx (DImode);
!     emit_insn (gen_vec_cmp<V_ALL_ALT:mode>di
! 	       (tmp, operands[3], operands[4], operands[5]));
!     emit_insn (gen_vcond_mask_<V_ALL:mode>di
! 	       (operands[0], operands[1], operands[2], tmp));
      DONE;
    })
  
! (define_expand "vcond<V_ALL:mode><V_ALL_ALT:mode>_exec"
!   [(match_operand:V_ALL 0 "register_operand")
!    (match_operand:V_ALL 1 "gcn_vop3_operand")
!    (match_operand:V_ALL 2 "gcn_alu_operand")
!    (match_operator 3 "gcn_fp_compare_operator"
!      [(match_operand:V_ALL_ALT 4 "gcn_alu_operand")
!       (match_operand:V_ALL_ALT 5 "gcn_vop3_operand")])
     (match_operand:DI 6 "gcn_exec_reg_operand" "e")]
    ""
    {
      rtx tmp = gen_reg_rtx (DImode);
!     emit_insn (gen_vec_cmp<V_ALL_ALT:mode>di_exec
! 	       (tmp, operands[3], operands[4], operands[5], operands[6]));
!     emit_insn (gen_vcond_mask_<V_ALL:mode>di
! 	       (operands[0], operands[1], operands[2], tmp));
      DONE;
    })
  
! (define_expand "vcondu<V_ALL:mode><V_INT:mode>"
!   [(match_operand:V_ALL 0 "register_operand")
!    (match_operand:V_ALL 1 "gcn_vop3_operand")
!    (match_operand:V_ALL 2 "gcn_alu_operand")
!    (match_operator 3 "gcn_fp_compare_operator"
!      [(match_operand:V_INT 4 "gcn_alu_operand")
!       (match_operand:V_INT 5 "gcn_vop3_operand")])]
    ""
    {
      rtx tmp = gen_reg_rtx (DImode);
!     emit_insn (gen_vec_cmpu<V_INT:mode>di
! 	       (tmp, operands[3], operands[4], operands[5]));
!     emit_insn (gen_vcond_mask_<V_ALL:mode>di
! 	       (operands[0], operands[1], operands[2], tmp));
      DONE;
    })
  
! (define_expand "vcondu<V_ALL:mode><V_INT:mode>_exec"
!   [(match_operand:V_ALL 0 "register_operand")
!    (match_operand:V_ALL 1 "gcn_vop3_operand")
!    (match_operand:V_ALL 2 "gcn_alu_operand")
!    (match_operator 3 "gcn_fp_compare_operator"
!      [(match_operand:V_INT 4 "gcn_alu_operand")
!       (match_operand:V_INT 5 "gcn_vop3_operand")])
     (match_operand:DI 6 "gcn_exec_reg_operand" "e")]
    ""
    {
      rtx tmp = gen_reg_rtx (DImode);
!     emit_insn (gen_vec_cmpu<V_INT:mode>di_exec
! 	       (tmp, operands[3], operands[4], operands[5], operands[6]));
!     emit_insn (gen_vcond_mask_<V_ALL:mode>di
! 	       (operands[0], operands[1], operands[2], tmp));
      DONE;
    })
  
***************
*** 2669,2709 ****
    })
  
  (define_expand "maskload<mode>di"
!   [(match_operand:VEC_REG_MODE 0 "register_operand")
!    (match_operand:VEC_REG_MODE 1 "memory_operand")
     (match_operand 2 "")]
    ""
    {
      rtx exec = force_reg (DImode, operands[2]);
      rtx addr = gcn_expand_scalar_to_vector_address
! 		(<MODE>mode, exec, operands[1], gen_rtx_SCRATCH (V64DImode));
      rtx as = gen_rtx_CONST_INT (VOIDmode, MEM_ADDR_SPACE (operands[1]));
      rtx v = gen_rtx_CONST_INT (VOIDmode, MEM_VOLATILE_P (operands[1]));
!     rtx undef = gcn_gen_undef (<MODE>mode);
!     emit_insn (gen_gather<mode>_expr_exec (operands[0], addr, as, v, undef,
! 					   exec));
      DONE;
    })
  
  (define_expand "maskstore<mode>di"
!   [(match_operand:VEC_REG_MODE 0 "memory_operand")
!    (match_operand:VEC_REG_MODE 1 "register_operand")
     (match_operand 2 "")]
    ""
    {
      rtx exec = force_reg (DImode, operands[2]);
      rtx addr = gcn_expand_scalar_to_vector_address
! 		(<MODE>mode, exec, operands[0], gen_rtx_SCRATCH (V64DImode));
      rtx as = gen_rtx_CONST_INT (VOIDmode, MEM_ADDR_SPACE (operands[0]));
      rtx v = gen_rtx_CONST_INT (VOIDmode, MEM_VOLATILE_P (operands[0]));
      emit_insn (gen_scatter<mode>_expr_exec (addr, operands[1], as, v, exec));
      DONE;
    })
  
! (define_expand "mask_gather_load<mode>"
!   [(match_operand:VEC_REG_MODE 0 "register_operand")
     (match_operand:DI 1 "register_operand")
!    (match_operand 2 "register_operand")
     (match_operand 3 "immediate_operand")
     (match_operand:SI 4 "gcn_alu_operand")
     (match_operand:DI 5 "")]
--- 2814,2857 ----
    })
  
  (define_expand "maskload<mode>di"
!   [(match_operand:V_ALL 0 "register_operand")
!    (match_operand:V_ALL 1 "memory_operand")
     (match_operand 2 "")]
    ""
    {
      rtx exec = force_reg (DImode, operands[2]);
      rtx addr = gcn_expand_scalar_to_vector_address
! 		(<MODE>mode, exec, operands[1], gen_rtx_SCRATCH (<VnDI>mode));
      rtx as = gen_rtx_CONST_INT (VOIDmode, MEM_ADDR_SPACE (operands[1]));
      rtx v = gen_rtx_CONST_INT (VOIDmode, MEM_VOLATILE_P (operands[1]));
! 
!     /* Masked lanes are required to hold zero.  */
!     emit_move_insn (operands[0], gcn_vec_constant (<MODE>mode, 0));
! 
!     emit_insn (gen_gather<mode>_expr_exec (operands[0], addr, as, v,
! 					   operands[0], exec));
      DONE;
    })
  
  (define_expand "maskstore<mode>di"
!   [(match_operand:V_ALL 0 "memory_operand")
!    (match_operand:V_ALL 1 "register_operand")
     (match_operand 2 "")]
    ""
    {
      rtx exec = force_reg (DImode, operands[2]);
      rtx addr = gcn_expand_scalar_to_vector_address
! 		(<MODE>mode, exec, operands[0], gen_rtx_SCRATCH (<VnDI>mode));
      rtx as = gen_rtx_CONST_INT (VOIDmode, MEM_ADDR_SPACE (operands[0]));
      rtx v = gen_rtx_CONST_INT (VOIDmode, MEM_VOLATILE_P (operands[0]));
      emit_insn (gen_scatter<mode>_expr_exec (addr, operands[1], as, v, exec));
      DONE;
    })
  
! (define_expand "mask_gather_load<mode><vnsi>"
!   [(match_operand:V_ALL 0 "register_operand")
     (match_operand:DI 1 "register_operand")
!    (match_operand:<VnSI> 2 "register_operand")
     (match_operand 3 "immediate_operand")
     (match_operand:SI 4 "gcn_alu_operand")
     (match_operand:DI 5 "")]
***************
*** 2711,2770 ****
    {
      rtx exec = force_reg (DImode, operands[5]);
  
!     /* TODO: more conversions will be needed when more types are vectorized. */
!     if (GET_MODE (operands[2]) == V64DImode)
!       {
! 	rtx tmp = gen_reg_rtx (V64SImode);
! 	emit_insn (gen_vec_truncatev64div64si_exec (tmp, operands[2],
! 						    gcn_gen_undef (V64SImode),
! 						    exec));
! 	operands[2] = tmp;
!       }
  
!     emit_insn (gen_gather<mode>_exec (operands[0], operands[1], operands[2],
! 				      operands[3], operands[4], exec));
      DONE;
    })
  
! (define_expand "mask_scatter_store<mode>"
    [(match_operand:DI 0 "register_operand")
!    (match_operand 1 "register_operand")
     (match_operand 2 "immediate_operand")
     (match_operand:SI 3 "gcn_alu_operand")
!    (match_operand:VEC_REG_MODE 4 "register_operand")
     (match_operand:DI 5 "")]
    ""
    {
      rtx exec = force_reg (DImode, operands[5]);
  
!     /* TODO: more conversions will be needed when more types are vectorized. */
!     if (GET_MODE (operands[1]) == V64DImode)
!       {
! 	rtx tmp = gen_reg_rtx (V64SImode);
! 	emit_insn (gen_vec_truncatev64div64si_exec (tmp, operands[1],
! 						    gcn_gen_undef (V64SImode),
! 						    exec));
! 	operands[1] = tmp;
!       }
  
!     emit_insn (gen_scatter<mode>_exec (operands[0], operands[1], operands[2],
! 				       operands[3], operands[4], exec));
      DONE;
    })
  
! ; FIXME this should be VEC_REG_MODE, but not all dependencies are implemented.
! (define_mode_iterator COND_MODE [V64SI V64DI V64SF V64DF])
! (define_mode_iterator COND_INT_MODE [V64SI V64DI])
! 
! (define_code_iterator cond_op [plus minus])
  
  (define_expand "cond_<expander><mode>"
!   [(match_operand:COND_MODE 0 "register_operand")
     (match_operand:DI 1 "register_operand")
!    (cond_op:COND_MODE
!      (match_operand:COND_MODE 2 "gcn_alu_operand")
!      (match_operand:COND_MODE 3 "gcn_alu_operand"))
!    (match_operand:COND_MODE 4 "register_operand")]
    ""
    {
      operands[1] = force_reg (DImode, operands[1]);
--- 2859,2921 ----
    {
      rtx exec = force_reg (DImode, operands[5]);
  
!     rtx addr = gcn_expand_scaled_offsets (DEFAULT_ADDR_SPACE, operands[1],
! 					  operands[2], operands[4],
! 					  INTVAL (operands[3]), exec);
  
!     /* Masked lanes are required to hold zero.  */
!     emit_move_insn (operands[0], gcn_vec_constant (<MODE>mode, 0));
! 
!     if (GET_MODE (addr) == <VnDI>mode)
!       emit_insn (gen_gather<mode>_insn_1offset_exec (operands[0], addr,
! 						     const0_rtx, const0_rtx,
! 						     const0_rtx, operands[0],
! 						     exec));
!     else
!       emit_insn (gen_gather<mode>_insn_2offsets_exec (operands[0], operands[1],
! 						      addr, const0_rtx,
! 						      const0_rtx, const0_rtx,
! 						      operands[0], exec));
      DONE;
    })
  
! (define_expand "mask_scatter_store<mode><vnsi>"
    [(match_operand:DI 0 "register_operand")
!    (match_operand:<VnSI> 1 "register_operand")
     (match_operand 2 "immediate_operand")
     (match_operand:SI 3 "gcn_alu_operand")
!    (match_operand:V_ALL 4 "register_operand")
     (match_operand:DI 5 "")]
    ""
    {
      rtx exec = force_reg (DImode, operands[5]);
  
!     rtx addr = gcn_expand_scaled_offsets (DEFAULT_ADDR_SPACE, operands[0],
! 					  operands[1], operands[3],
! 					  INTVAL (operands[2]), exec);
  
!     if (GET_MODE (addr) == <VnDI>mode)
!       emit_insn (gen_scatter<mode>_insn_1offset_exec (addr, const0_rtx,
! 						      operands[4], const0_rtx,
! 						      const0_rtx,
! 						      exec));
!     else
!       emit_insn (gen_scatter<mode>_insn_2offsets_exec (operands[0], addr,
! 						       const0_rtx, operands[4],
! 						       const0_rtx, const0_rtx,
! 						       exec));
      DONE;
    })
  
! (define_code_iterator cond_op [plus minus mult])
  
  (define_expand "cond_<expander><mode>"
!   [(match_operand:V_ALL 0 "register_operand")
     (match_operand:DI 1 "register_operand")
!    (cond_op:V_ALL
!      (match_operand:V_ALL 2 "gcn_alu_operand")
!      (match_operand:V_ALL 3 "gcn_alu_operand"))
!    (match_operand:V_ALL 4 "register_operand")]
    ""
    {
      operands[1] = force_reg (DImode, operands[1]);
***************
*** 2776,2790 ****
      DONE;
    })
  
  (define_code_iterator cond_bitop [and ior xor])
  
  (define_expand "cond_<expander><mode>"
!   [(match_operand:COND_INT_MODE 0 "register_operand")
     (match_operand:DI 1 "register_operand")
!    (cond_bitop:COND_INT_MODE
!      (match_operand:COND_INT_MODE 2 "gcn_alu_operand")
!      (match_operand:COND_INT_MODE 3 "gcn_alu_operand"))
!    (match_operand:COND_INT_MODE 4 "register_operand")]
    ""
    {
      operands[1] = force_reg (DImode, operands[1]);
--- 2927,2942 ----
      DONE;
    })
  
+ ;; TODO smin umin smax umax
  (define_code_iterator cond_bitop [and ior xor])
  
  (define_expand "cond_<expander><mode>"
!   [(match_operand:V_INT 0 "register_operand")
     (match_operand:DI 1 "register_operand")
!    (cond_bitop:V_INT
!      (match_operand:V_INT 2 "gcn_alu_operand")
!      (match_operand:V_INT 3 "gcn_alu_operand"))
!    (match_operand:V_INT 4 "register_operand")]
    ""
    {
      operands[1] = force_reg (DImode, operands[1]);
***************
*** 2832,2846 ****
  			     (UNSPEC_SMAX_DPP_SHR "v_max%i0")
  			     (UNSPEC_UMIN_DPP_SHR "v_min%u0")
  			     (UNSPEC_UMAX_DPP_SHR "v_max%u0")
! 			     (UNSPEC_PLUS_DPP_SHR "v_add%u0")
! 			     (UNSPEC_AND_DPP_SHR  "v_and%b0")
! 			     (UNSPEC_IOR_DPP_SHR  "v_or%b0")
! 			     (UNSPEC_XOR_DPP_SHR  "v_xor%b0")])
  
  (define_expand "reduc_<reduc_op>_scal_<mode>"
    [(set (match_operand:<SCALAR_MODE> 0 "register_operand")
  	(unspec:<SCALAR_MODE>
! 	  [(match_operand:VEC_1REG_MODE 1 "register_operand")]
  	  REDUC_UNSPEC))]
    ""
    {
--- 2984,2998 ----
  			     (UNSPEC_SMAX_DPP_SHR "v_max%i0")
  			     (UNSPEC_UMIN_DPP_SHR "v_min%u0")
  			     (UNSPEC_UMAX_DPP_SHR "v_max%u0")
! 			     (UNSPEC_PLUS_DPP_SHR "v_add%U0")
! 			     (UNSPEC_AND_DPP_SHR  "v_and%B0")
! 			     (UNSPEC_IOR_DPP_SHR  "v_or%B0")
! 			     (UNSPEC_XOR_DPP_SHR  "v_xor%B0")])
  
  (define_expand "reduc_<reduc_op>_scal_<mode>"
    [(set (match_operand:<SCALAR_MODE> 0 "register_operand")
  	(unspec:<SCALAR_MODE>
! 	  [(match_operand:V_ALL 1 "register_operand")]
  	  REDUC_UNSPEC))]
    ""
    {
***************
*** 2853,2881 ****
      DONE;
    })
  
- (define_expand "reduc_<reduc_op>_scal_v64di"
-   [(set (match_operand:DI 0 "register_operand")
- 	(unspec:DI
- 	  [(match_operand:V64DI 1 "register_operand")]
- 	  REDUC_2REG_UNSPEC))]
-   ""
-   {
-     rtx tmp = gcn_expand_reduc_scalar (V64DImode, operands[1],
- 				       <reduc_unspec>);
- 
-     /* The result of the reduction is in lane 63 of tmp.  */
-     emit_insn (gen_mov_from_lane63_v64di (operands[0], tmp));
- 
-     DONE;
-   })
  
  (define_insn "*<reduc_op>_dpp_shr_<mode>"
!   [(set (match_operand:VEC_1REG_MODE 0 "register_operand"   "=v")
! 	(unspec:VEC_1REG_MODE
! 	  [(match_operand:VEC_1REG_MODE 1 "register_operand" "v")
! 	   (match_operand:VEC_1REG_MODE 2 "register_operand" "v")
! 	   (match_operand:SI 3 "const_int_operand"	     "n")]
  	  REDUC_UNSPEC))]
    "!(TARGET_GCN3 && SCALAR_INT_MODE_P (<SCALAR_MODE>mode)
       && <reduc_unspec> == UNSPEC_PLUS_DPP_SHR)"
    {
--- 3005,3019 ----
      DONE;
    })
  
  
  (define_insn "*<reduc_op>_dpp_shr_<mode>"
!   [(set (match_operand:V_1REG 0 "register_operand"   "=v")
! 	(unspec:V_1REG
! 	  [(match_operand:V_1REG 1 "register_operand" "v")
! 	   (match_operand:V_1REG 2 "register_operand" "v")
! 	   (match_operand:SI 3 "const_int_operand"    "n")]
  	  REDUC_UNSPEC))]
+   ; GCN3 requires a carry out, GCN5 not
    "!(TARGET_GCN3 && SCALAR_INT_MODE_P (<SCALAR_MODE>mode)
       && <reduc_unspec> == UNSPEC_PLUS_DPP_SHR)"
    {
***************
*** 2885,2913 ****
    [(set_attr "type" "vop_dpp")
     (set_attr "length" "8")])
  
! (define_insn_and_split "*<reduc_op>_dpp_shr_v64di"
!   [(set (match_operand:V64DI 0 "register_operand"   "=&v")
! 	(unspec:V64DI
! 	  [(match_operand:V64DI 1 "register_operand" "v0")
! 	   (match_operand:V64DI 2 "register_operand" "v0")
! 	   (match_operand:SI 3 "const_int_operand"    "n")]
  	  REDUC_2REG_UNSPEC))]
    ""
    "#"
    "reload_completed"
    [(set (match_dup 4)
! 	(unspec:V64SI
  	  [(match_dup 6) (match_dup 8) (match_dup 3)] REDUC_2REG_UNSPEC))
     (set (match_dup 5)
! 	(unspec:V64SI
  	  [(match_dup 7) (match_dup 9) (match_dup 3)] REDUC_2REG_UNSPEC))]
    {
!     operands[4] = gcn_operand_part (V64DImode, operands[0], 0);
!     operands[5] = gcn_operand_part (V64DImode, operands[0], 1);
!     operands[6] = gcn_operand_part (V64DImode, operands[1], 0);
!     operands[7] = gcn_operand_part (V64DImode, operands[1], 1);
!     operands[8] = gcn_operand_part (V64DImode, operands[2], 0);
!     operands[9] = gcn_operand_part (V64DImode, operands[2], 1);
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "16")])
--- 3023,3051 ----
    [(set_attr "type" "vop_dpp")
     (set_attr "length" "8")])
  
! (define_insn_and_split "*<reduc_op>_dpp_shr_<mode>"
!   [(set (match_operand:V_DI 0 "register_operand"    "=v")
! 	(unspec:V_DI
! 	  [(match_operand:V_DI 1 "register_operand" "v")
! 	   (match_operand:V_DI 2 "register_operand" "v")
! 	   (match_operand:SI 3 "const_int_operand"  "n")]
  	  REDUC_2REG_UNSPEC))]
    ""
    "#"
    "reload_completed"
    [(set (match_dup 4)
! 	(unspec:<VnSI>
  	  [(match_dup 6) (match_dup 8) (match_dup 3)] REDUC_2REG_UNSPEC))
     (set (match_dup 5)
! 	(unspec:<VnSI>
  	  [(match_dup 7) (match_dup 9) (match_dup 3)] REDUC_2REG_UNSPEC))]
    {
!     operands[4] = gcn_operand_part (<MODE>mode, operands[0], 0);
!     operands[5] = gcn_operand_part (<MODE>mode, operands[0], 1);
!     operands[6] = gcn_operand_part (<MODE>mode, operands[1], 0);
!     operands[7] = gcn_operand_part (<MODE>mode, operands[1], 1);
!     operands[8] = gcn_operand_part (<MODE>mode, operands[2], 0);
!     operands[9] = gcn_operand_part (<MODE>mode, operands[2], 1);
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "16")])
***************
*** 2915,2993 ****
  ; Special cases for addition.
  
  (define_insn "*plus_carry_dpp_shr_<mode>"
!   [(set (match_operand:VEC_1REG_INT_MODE 0 "register_operand"   "=v")
! 	(unspec:VEC_1REG_INT_MODE
! 	  [(match_operand:VEC_1REG_INT_MODE 1 "register_operand" "v")
! 	   (match_operand:VEC_1REG_INT_MODE 2 "register_operand" "v")
! 	   (match_operand:SI 3 "const_int_operand"		 "n")]
  	  UNSPEC_PLUS_CARRY_DPP_SHR))
     (clobber (reg:DI VCC_REG))]
    ""
    {
!     const char *insn = TARGET_GCN3 ? "v_add%u0" : "v_add_co%u0";
!     return gcn_expand_dpp_shr_insn (<MODE>mode, insn,
  				    UNSPEC_PLUS_CARRY_DPP_SHR,
  				    INTVAL (operands[3]));
    }
    [(set_attr "type" "vop_dpp")
     (set_attr "length" "8")])
  
! (define_insn "*plus_carry_in_dpp_shr_v64si"
!   [(set (match_operand:V64SI 0 "register_operand"   "=v")
! 	(unspec:V64SI
! 	  [(match_operand:V64SI 1 "register_operand" "v")
! 	   (match_operand:V64SI 2 "register_operand" "v")
! 	   (match_operand:SI 3 "const_int_operand"   "n")
  	   (match_operand:DI 4 "register_operand"   "cV")]
  	  UNSPEC_PLUS_CARRY_IN_DPP_SHR))
     (clobber (reg:DI VCC_REG))]
    ""
    {
!     const char *insn = TARGET_GCN3 ? "v_addc%u0" : "v_addc_co%u0";
!     return gcn_expand_dpp_shr_insn (V64SImode, insn,
  				    UNSPEC_PLUS_CARRY_IN_DPP_SHR,
  				    INTVAL (operands[3]));
    }
    [(set_attr "type" "vop_dpp")
     (set_attr "length" "8")])
  
! (define_insn_and_split "*plus_carry_dpp_shr_v64di"
!   [(set (match_operand:V64DI 0 "register_operand"   "=&v")
! 	(unspec:V64DI
! 	  [(match_operand:V64DI 1 "register_operand" "v0")
! 	   (match_operand:V64DI 2 "register_operand" "v0")
! 	   (match_operand:SI 3 "const_int_operand"    "n")]
  	  UNSPEC_PLUS_CARRY_DPP_SHR))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
    "reload_completed"
    [(parallel [(set (match_dup 4)
! 		(unspec:V64SI
  		  [(match_dup 6) (match_dup 8) (match_dup 3)]
  		  UNSPEC_PLUS_CARRY_DPP_SHR))
  	      (clobber (reg:DI VCC_REG))])
     (parallel [(set (match_dup 5)
! 		(unspec:V64SI
  		  [(match_dup 7) (match_dup 9) (match_dup 3) (reg:DI VCC_REG)]
  		  UNSPEC_PLUS_CARRY_IN_DPP_SHR))
  	      (clobber (reg:DI VCC_REG))])]
    {
!     operands[4] = gcn_operand_part (V64DImode, operands[0], 0);
!     operands[5] = gcn_operand_part (V64DImode, operands[0], 1);
!     operands[6] = gcn_operand_part (V64DImode, operands[1], 0);
!     operands[7] = gcn_operand_part (V64DImode, operands[1], 1);
!     operands[8] = gcn_operand_part (V64DImode, operands[2], 0);
!     operands[9] = gcn_operand_part (V64DImode, operands[2], 1);
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "16")])
  
  ; Instructions to move a scalar value from lane 63 of a vector register.
  (define_insn "mov_from_lane63_<mode>"
!   [(set (match_operand:<SCALAR_MODE> 0 "register_operand"  "=Sg,v")
  	(unspec:<SCALAR_MODE>
! 	  [(match_operand:VEC_1REG_MODE 1 "register_operand" "v,v")]
  	  UNSPEC_MOV_FROM_LANE63))]
    ""
    "@
--- 3053,3129 ----
  ; Special cases for addition.
  
  (define_insn "*plus_carry_dpp_shr_<mode>"
!   [(set (match_operand:V_INT_1REG 0 "register_operand"   "=v")
! 	(unspec:V_INT_1REG
! 	  [(match_operand:V_INT_1REG 1 "register_operand" "v")
! 	   (match_operand:V_INT_1REG 2 "register_operand" "v")
! 	   (match_operand:SI 3 "const_int_operand"	  "n")]
  	  UNSPEC_PLUS_CARRY_DPP_SHR))
     (clobber (reg:DI VCC_REG))]
    ""
    {
!     return gcn_expand_dpp_shr_insn (<VnSI>mode, "v_add%^_u32",
  				    UNSPEC_PLUS_CARRY_DPP_SHR,
  				    INTVAL (operands[3]));
    }
    [(set_attr "type" "vop_dpp")
     (set_attr "length" "8")])
  
! (define_insn "*plus_carry_in_dpp_shr_<mode>"
!   [(set (match_operand:V_SI 0 "register_operand"    "=v")
! 	(unspec:V_SI
! 	  [(match_operand:V_SI 1 "register_operand" "v")
! 	   (match_operand:V_SI 2 "register_operand" "v")
! 	   (match_operand:SI 3 "const_int_operand"  "n")
  	   (match_operand:DI 4 "register_operand"   "cV")]
  	  UNSPEC_PLUS_CARRY_IN_DPP_SHR))
     (clobber (reg:DI VCC_REG))]
    ""
    {
!     return gcn_expand_dpp_shr_insn (<MODE>mode, "v_addc%^_u32",
  				    UNSPEC_PLUS_CARRY_IN_DPP_SHR,
  				    INTVAL (operands[3]));
    }
    [(set_attr "type" "vop_dpp")
     (set_attr "length" "8")])
  
! (define_insn_and_split "*plus_carry_dpp_shr_<mode>"
!   [(set (match_operand:V_DI 0 "register_operand"    "=v")
! 	(unspec:V_DI
! 	  [(match_operand:V_DI 1 "register_operand" "v")
! 	   (match_operand:V_DI 2 "register_operand" "v")
! 	   (match_operand:SI 3 "const_int_operand"  "n")]
  	  UNSPEC_PLUS_CARRY_DPP_SHR))
     (clobber (reg:DI VCC_REG))]
    ""
    "#"
    "reload_completed"
    [(parallel [(set (match_dup 4)
! 		(unspec:<VnSI>
  		  [(match_dup 6) (match_dup 8) (match_dup 3)]
  		  UNSPEC_PLUS_CARRY_DPP_SHR))
  	      (clobber (reg:DI VCC_REG))])
     (parallel [(set (match_dup 5)
! 		(unspec:<VnSI>
  		  [(match_dup 7) (match_dup 9) (match_dup 3) (reg:DI VCC_REG)]
  		  UNSPEC_PLUS_CARRY_IN_DPP_SHR))
  	      (clobber (reg:DI VCC_REG))])]
    {
!     operands[4] = gcn_operand_part (<MODE>mode, operands[0], 0);
!     operands[5] = gcn_operand_part (<MODE>mode, operands[0], 1);
!     operands[6] = gcn_operand_part (<MODE>mode, operands[1], 0);
!     operands[7] = gcn_operand_part (<MODE>mode, operands[1], 1);
!     operands[8] = gcn_operand_part (<MODE>mode, operands[2], 0);
!     operands[9] = gcn_operand_part (<MODE>mode, operands[2], 1);
    }
    [(set_attr "type" "vmult")
     (set_attr "length" "16")])
  
  ; Instructions to move a scalar value from lane 63 of a vector register.
  (define_insn "mov_from_lane63_<mode>"
!   [(set (match_operand:<SCALAR_MODE> 0 "register_operand" "=Sg,v")
  	(unspec:<SCALAR_MODE>
! 	  [(match_operand:V_1REG 1 "register_operand"	  "  v,v")]
  	  UNSPEC_MOV_FROM_LANE63))]
    ""
    "@
***************
*** 2997,3006 ****
     (set_attr "exec" "none,*")
     (set_attr "length" "8")])
  
! (define_insn "mov_from_lane63_v64di"
!   [(set (match_operand:DI 0 "register_operand"	     "=Sg,v")
! 	(unspec:DI
! 	  [(match_operand:V64DI 1 "register_operand"   "v,v")]
  	  UNSPEC_MOV_FROM_LANE63))]
    ""
    "@
--- 3133,3142 ----
     (set_attr "exec" "none,*")
     (set_attr "length" "8")])
  
! (define_insn "mov_from_lane63_<mode>"
!   [(set (match_operand:<SCALAR_MODE> 0 "register_operand" "=Sg,v")
! 	(unspec:<SCALAR_MODE>
! 	  [(match_operand:V_2REG 1 "register_operand"	  "  v,v")]
  	  UNSPEC_MOV_FROM_LANE63))]
    ""
    "@
***************
*** 3018,3048 ****
  ;; }}}
  ;; {{{ Miscellaneous
  
! (define_expand "vec_seriesv64si"
!   [(match_operand:V64SI 0 "register_operand")
     (match_operand:SI 1 "gcn_alu_operand")
     (match_operand:SI 2 "gcn_alu_operand")]
    ""
    {
!     rtx tmp = gen_reg_rtx (V64SImode);
!     rtx v1 = gen_rtx_REG (V64SImode, VGPR_REGNO (1));
  
!     emit_insn (gen_mulv64si3_dup (tmp, v1, operands[2]));
!     emit_insn (gen_addv64si3_dup (operands[0], tmp, operands[1]));
      DONE;
    })
  
! (define_expand "vec_seriesv64di"
!   [(match_operand:V64DI 0 "register_operand")
     (match_operand:DI 1 "gcn_alu_operand")
     (match_operand:DI 2 "gcn_alu_operand")]
    ""
    {
!     rtx tmp = gen_reg_rtx (V64DImode);
!     rtx v1 = gen_rtx_REG (V64SImode, VGPR_REGNO (1));
  
!     emit_insn (gen_mulv64di3_zext_dup2 (tmp, v1, operands[2]));
!     emit_insn (gen_addv64di3_dup (operands[0], tmp, operands[1]));
      DONE;
    })
  
--- 3154,3186 ----
  ;; }}}
  ;; {{{ Miscellaneous
  
! (define_expand "vec_series<mode>"
!   [(match_operand:V_SI 0 "register_operand")
     (match_operand:SI 1 "gcn_alu_operand")
     (match_operand:SI 2 "gcn_alu_operand")]
    ""
    {
!     rtx tmp = gen_reg_rtx (<MODE>mode);
!     rtx v1 = gen_rtx_REG (<MODE>mode, VGPR_REGNO (1));
  
!     emit_insn (gen_mul<mode>3_dup (tmp, v1, operands[2]));
!     emit_insn (gen_add<mode>3_dup (operands[0], tmp, operands[1]));
      DONE;
    })
  
! (define_expand "vec_series<mode>"
!   [(match_operand:V_DI 0 "register_operand")
     (match_operand:DI 1 "gcn_alu_operand")
     (match_operand:DI 2 "gcn_alu_operand")]
    ""
    {
!     rtx tmp = gen_reg_rtx (<MODE>mode);
!     rtx v1 = gen_rtx_REG (<VnSI>mode, VGPR_REGNO (1));
!     rtx op1vec = gen_reg_rtx (<MODE>mode);
  
!     emit_insn (gen_mul<mode>3_zext_dup2 (tmp, v1, operands[2]));
!     emit_insn (gen_vec_duplicate<mode> (op1vec, operands[1]));
!     emit_insn (gen_add<mode>3 (operands[0], tmp, op1vec));
      DONE;
    })
  
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/gcn.c gcc-10.1.0/gcc/config/gcn/gcn.c
*** gcc-9.3.0/gcc/config/gcn/gcn.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/gcn.c	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
--- 1,4 ----
! /* Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
*************** int gcn_isa = 3;		/* Default to GCN3.  *
*** 70,79 ****
     worker-single mode to worker-partitioned mode), per workgroup.  Global
     analysis could calculate an exact bound, but we don't do that yet.
   
!    We reserve the whole LDS, which also prevents any other workgroup
!    sharing the Compute Unit.  */
  
! #define LDS_SIZE 65536
  
  /* }}}  */
  /* {{{ Initialization and options.  */
--- 70,90 ----
     worker-single mode to worker-partitioned mode), per workgroup.  Global
     analysis could calculate an exact bound, but we don't do that yet.
   
!    We want to permit full occupancy, so size accordingly.  */
  
! #define OMP_LDS_SIZE 0x600    /* 0x600 is 1/40 total, rounded down.  */
! #define ACC_LDS_SIZE 32768    /* Half of the total should be fine.  */
! #define OTHER_LDS_SIZE 65536  /* If in doubt, reserve all of it.  */
! 
! #define LDS_SIZE (flag_openacc ? ACC_LDS_SIZE \
! 		  : flag_openmp ? OMP_LDS_SIZE \
! 		  : OTHER_LDS_SIZE)
! 
! /* The number of registers usable by normal non-kernel functions.
!    The SGPR count includes any special extra registers such as VCC.  */
! 
! #define MAX_NORMAL_SGPR_COUNT	64
! #define MAX_NORMAL_VGPR_COUNT	24
  
  /* }}}  */
  /* {{{ Initialization and options.  */
*************** static const struct gcn_kernel_arg_type
*** 191,196 ****
--- 202,218 ----
    {"work_item_id_Z", NULL, V64SImode, FIRST_VGPR_REG + 2}
  };
  
+ static const long default_requested_args
+ 	= (1 << PRIVATE_SEGMENT_BUFFER_ARG)
+ 	  | (1 << DISPATCH_PTR_ARG)
+ 	  | (1 << QUEUE_PTR_ARG)
+ 	  | (1 << KERNARG_SEGMENT_PTR_ARG)
+ 	  | (1 << PRIVATE_SEGMENT_WAVE_OFFSET_ARG)
+ 	  | (1 << WORKGROUP_ID_X_ARG)
+ 	  | (1 << WORK_ITEM_ID_X_ARG)
+ 	  | (1 << WORK_ITEM_ID_Y_ARG)
+ 	  | (1 << WORK_ITEM_ID_Z_ARG);
+ 
  /* Extract parameter settings from __attribute__((amdgpu_hsa_kernel ())).
     This function also sets the default values for some arguments.
   
*************** gcn_parse_amdgpu_hsa_kernel_attribute (s
*** 201,210 ****
  				       tree list)
  {
    bool err = false;
!   args->requested = ((1 << PRIVATE_SEGMENT_BUFFER_ARG)
! 		     | (1 << QUEUE_PTR_ARG)
! 		     | (1 << KERNARG_SEGMENT_PTR_ARG)
! 		     | (1 << PRIVATE_SEGMENT_WAVE_OFFSET_ARG));
    args->nargs = 0;
  
    for (int a = 0; a < GCN_KERNEL_ARG_TYPES; a++)
--- 223,229 ----
  				       tree list)
  {
    bool err = false;
!   args->requested = default_requested_args;
    args->nargs = 0;
  
    for (int a = 0; a < GCN_KERNEL_ARG_TYPES; a++)
*************** gcn_parse_amdgpu_hsa_kernel_attribute (s
*** 242,249 ****
        args->requested |= (1 << a);
        args->order[args->nargs++] = a;
      }
-   args->requested |= (1 << WORKGROUP_ID_X_ARG);
-   args->requested |= (1 << WORK_ITEM_ID_Z_ARG);
  
    /* Requesting WORK_ITEM_ID_Z_ARG implies requesting WORK_ITEM_ID_X_ARG and
       WORK_ITEM_ID_Y_ARG.  Similarly, requesting WORK_ITEM_ID_Y_ARG implies
--- 261,266 ----
*************** gcn_parse_amdgpu_hsa_kernel_attribute (s
*** 253,262 ****
    if (args->requested & (1 << WORK_ITEM_ID_Y_ARG))
      args->requested |= (1 << WORK_ITEM_ID_X_ARG);
  
-   /* Always enable this so that kernargs is in a predictable place for
-      gomp_print, etc.  */
-   args->requested |= (1 << DISPATCH_PTR_ARG);
- 
    int sgpr_regno = FIRST_SGPR_REG;
    args->nsgprs = 0;
    for (int a = 0; a < GCN_KERNEL_ARG_TYPES; a++)
--- 270,275 ----
*************** static tree
*** 305,313 ****
  gcn_handle_amdgpu_hsa_kernel_attribute (tree *node, tree name,
  					tree args, int, bool *no_add_attrs)
  {
!   if (FUNC_OR_METHOD_TYPE_P (*node)
!       && TREE_CODE (*node) != FIELD_DECL
!       && TREE_CODE (*node) != TYPE_DECL)
      {
        warning (OPT_Wattributes, "%qE attribute only applies to functions",
  	       name);
--- 318,324 ----
  gcn_handle_amdgpu_hsa_kernel_attribute (tree *node, tree name,
  					tree args, int, bool *no_add_attrs)
  {
!   if (!FUNC_OR_METHOD_TYPE_P (*node))
      {
        warning (OPT_Wattributes, "%qE attribute only applies to functions",
  	       name);
*************** gcn_hard_regno_mode_ok (unsigned int reg
*** 447,453 ****
  	    || (!((regno - FIRST_SGPR_REG) & 1) && sgpr_2reg_mode_p (mode))
  	    || (((regno - FIRST_SGPR_REG) & 3) == 0 && mode == TImode));
    if (VGPR_REGNO_P (regno))
!     return (vgpr_1reg_mode_p (mode) || vgpr_2reg_mode_p (mode)
  	    /* TImode is used by DImode compare_and_swap.  */
  	    || mode == TImode);
    return false;
--- 458,472 ----
  	    || (!((regno - FIRST_SGPR_REG) & 1) && sgpr_2reg_mode_p (mode))
  	    || (((regno - FIRST_SGPR_REG) & 3) == 0 && mode == TImode));
    if (VGPR_REGNO_P (regno))
!     /* Vector instructions do not care about the alignment of register
!        pairs, but where there is no 64-bit instruction, many of the
!        define_split do not work if the input and output registers partially
!        overlap.  We tried to fix this with early clobber and match
!        constraints, but it was bug prone, added complexity, and conflicts
!        with the 'U0' constraints on vec_merge.
!        Therefore, we restrict ourselved to aligned registers.  */
!     return (vgpr_1reg_mode_p (mode)
! 	    || (!((regno - FIRST_VGPR_REG) & 1) && vgpr_2reg_mode_p (mode))
  	    /* TImode is used by DImode compare_and_swap.  */
  	    || mode == TImode);
    return false;
*************** gcn_regno_reg_class (int regno)
*** 464,469 ****
--- 483,491 ----
      {
      case SCC_REG:
        return SCC_CONDITIONAL_REG;
+     case VCC_LO_REG:
+     case VCC_HI_REG:
+       return VCC_CONDITIONAL_REG;
      case VCCZ_REG:
        return VCCZ_CONDITIONAL_REG;
      case EXECZ_REG:
*************** gcn_can_split_p (machine_mode, rtx op)
*** 631,637 ****
  static reg_class_t
  gcn_spill_class (reg_class_t c, machine_mode /*mode */ )
  {
!   if (reg_classes_intersect_p (ALL_CONDITIONAL_REGS, c))
      return SGPR_REGS;
    else
      return NO_REGS;
--- 653,660 ----
  static reg_class_t
  gcn_spill_class (reg_class_t c, machine_mode /*mode */ )
  {
!   if (reg_classes_intersect_p (ALL_CONDITIONAL_REGS, c)
!       || c == VCC_CONDITIONAL_REG)
      return SGPR_REGS;
    else
      return NO_REGS;
*************** bool
*** 827,833 ****
  gcn_inline_constant_p (rtx x)
  {
    if (GET_CODE (x) == CONST_INT)
!     return INTVAL (x) >= -16 && INTVAL (x) < 64;
    if (GET_CODE (x) == CONST_DOUBLE)
      return gcn_inline_fp_constant_p (x, false);
    if (GET_CODE (x) == CONST_VECTOR)
--- 850,856 ----
  gcn_inline_constant_p (rtx x)
  {
    if (GET_CODE (x) == CONST_INT)
!     return INTVAL (x) >= -16 && INTVAL (x) <= 64;
    if (GET_CODE (x) == CONST_DOUBLE)
      return gcn_inline_fp_constant_p (x, false);
    if (GET_CODE (x) == CONST_VECTOR)
*************** gcn_constant_p (rtx x)
*** 887,902 ****
  
  /* Return true if X is a constant representable as two inline immediate
     constants in a 64-bit instruction that is split into two 32-bit
!    instructions.  */
  
  bool
! gcn_inline_constant64_p (rtx x)
  {
    if (GET_CODE (x) == CONST_VECTOR)
      {
        if (!vgpr_vector_mode_p (GET_MODE (x)))
  	return false;
!       if (!gcn_inline_constant64_p (CONST_VECTOR_ELT (x, 0)))
  	return false;
        for (int i = 1; i < 64; i++)
  	if (CONST_VECTOR_ELT (x, i) != CONST_VECTOR_ELT (x, 0))
--- 910,926 ----
  
  /* Return true if X is a constant representable as two inline immediate
     constants in a 64-bit instruction that is split into two 32-bit
!    instructions.
!    When MIXED is set, the low-part is permitted to use the full 32-bits.  */
  
  bool
! gcn_inline_constant64_p (rtx x, bool mixed)
  {
    if (GET_CODE (x) == CONST_VECTOR)
      {
        if (!vgpr_vector_mode_p (GET_MODE (x)))
  	return false;
!       if (!gcn_inline_constant64_p (CONST_VECTOR_ELT (x, 0), mixed))
  	return false;
        for (int i = 1; i < 64; i++)
  	if (CONST_VECTOR_ELT (x, i) != CONST_VECTOR_ELT (x, 0))
*************** gcn_inline_constant64_p (rtx x)
*** 910,916 ****
  
    rtx val_lo = gcn_operand_part (DImode, x, 0);
    rtx val_hi = gcn_operand_part (DImode, x, 1);
!   return gcn_inline_constant_p (val_lo) && gcn_inline_constant_p (val_hi);
  }
  
  /* Return true if X is a constant representable as an immediate constant
--- 934,941 ----
  
    rtx val_lo = gcn_operand_part (DImode, x, 0);
    rtx val_hi = gcn_operand_part (DImode, x, 1);
!   return ((mixed || gcn_inline_constant_p (val_lo))
! 	  && gcn_inline_constant_p (val_hi));
  }
  
  /* Return true if X is a constant representable as an immediate constant
*************** gcn_vec_constant (machine_mode mode, int
*** 975,983 ****
      return CONST2_RTX (mode);*/
  
    int units = GET_MODE_NUNITS (mode);
!   rtx tem = gen_int_mode (a, GET_MODE_INNER (mode));
!   rtvec v = rtvec_alloc (units);
  
    for (int i = 0; i < units; ++i)
      RTVEC_ELT (v, i) = tem;
  
--- 1000,1018 ----
      return CONST2_RTX (mode);*/
  
    int units = GET_MODE_NUNITS (mode);
!   machine_mode innermode = GET_MODE_INNER (mode);
  
+   rtx tem;
+   if (FLOAT_MODE_P (innermode))
+     {
+       REAL_VALUE_TYPE rv;
+       real_from_integer (&rv, NULL, a, SIGNED);
+       tem = const_double_from_real_value (rv, innermode);
+     }
+   else
+     tem = gen_int_mode (a, innermode);
+ 
+   rtvec v = rtvec_alloc (units);
    for (int i = 0; i < units; ++i)
      RTVEC_ELT (v, i) = tem;
  
*************** gcn_expand_scalar_to_vector_address (mac
*** 1768,1774 ****
  	  /* tmp[:] += zext (mem_base)  */
  	  if (exec)
  	    {
- 	      rtx undef_di = gcn_gen_undef (DImode);
  	      emit_insn (gen_addv64si3_vcc_dup_exec (tmplo, mem_base_lo, tmplo,
  						     vcc, undef_v64si, exec));
  	      emit_insn (gen_addcv64si3_exec (tmphi, tmphi, const0_rtx,
--- 1803,1808 ----
*************** rtx
*** 1827,1841 ****
  gcn_expand_scaled_offsets (addr_space_t as, rtx base, rtx offsets, rtx scale,
  			   bool unsigned_p, rtx exec)
  {
-   /* Convert the offsets to V64SImode.
-      TODO: more conversions will be needed when more types are vectorized. */
-   if (GET_MODE (offsets) == V64DImode)
-     {
-       rtx tmp = gen_reg_rtx (V64SImode);
-       emit_insn (gen_vec_truncatev64div64si (tmp, offsets));
-       offsets = tmp;
-     }
- 
    rtx tmpsi = gen_reg_rtx (V64SImode);
    rtx tmpdi = gen_reg_rtx (V64DImode);
    rtx undefsi = exec ? gcn_gen_undef (V64SImode) : NULL;
--- 1861,1866 ----
*************** gcn_secondary_reload (bool in_p, rtx x,
*** 2043,2069 ****
  static void
  gcn_conditional_register_usage (void)
  {
!   int i;
  
!   /* FIXME: Do we need to reset fixed_regs?  */
  
! /* Limit ourselves to 1/16 the register file for maximimum sized workgroups.
!    There are enough SGPRs not to limit those.
!    TODO: Adjust this more dynamically.  */
!   for (i = FIRST_VGPR_REG + 64; i <= LAST_VGPR_REG; i++)
!     fixed_regs[i] = 1, call_used_regs[i] = 1;
  
-   if (!cfun || !cfun->machine || cfun->machine->normal_function)
-     {
-       /* Normal functions can't know what kernel argument registers are
-          live, so just fix the bottom 16 SGPRs, and bottom 3 VGPRs.  */
-       for (i = 0; i < 16; i++)
- 	fixed_regs[FIRST_SGPR_REG + i] = 1;
-       for (i = 0; i < 3; i++)
- 	fixed_regs[FIRST_VGPR_REG + i] = 1;
        return;
      }
  
    /* Fix the runtime argument register containing values that may be
       needed later.  DISPATCH_PTR_ARG and FLAT_SCRATCH_* should not be
       needed after the prologue so there's no need to fix them.  */
--- 2068,2103 ----
  static void
  gcn_conditional_register_usage (void)
  {
!   if (!cfun || !cfun->machine)
!     return;
  
!   if (cfun->machine->normal_function)
!     {
!       /* Restrict the set of SGPRs and VGPRs used by non-kernel functions.  */
!       for (int i = SGPR_REGNO (MAX_NORMAL_SGPR_COUNT - 2);
! 	   i <= LAST_SGPR_REG; i++)
! 	fixed_regs[i] = 1, call_used_regs[i] = 1;
  
!       for (int i = VGPR_REGNO (MAX_NORMAL_VGPR_COUNT);
! 	   i <= LAST_VGPR_REG; i++)
! 	fixed_regs[i] = 1, call_used_regs[i] = 1;
  
        return;
      }
  
+   /* If the set of requested args is the default set, nothing more needs to
+      be done.  */
+   if (cfun->machine->args.requested == default_requested_args)
+     return;
+ 
+   /* Requesting a set of args different from the default violates the ABI.  */
+   if (!leaf_function_p ())
+     warning (0, "A non-default set of initial values has been requested, "
+ 		"which violates the ABI!");
+ 
+   for (int i = SGPR_REGNO (0); i < SGPR_REGNO (14); i++)
+     fixed_regs[i] = 0;
+ 
    /* Fix the runtime argument register containing values that may be
       needed later.  DISPATCH_PTR_ARG and FLAT_SCRATCH_* should not be
       needed after the prologue so there's no need to fix them.  */
*************** gcn_conditional_register_usage (void)
*** 2071,2080 ****
      fixed_regs[cfun->machine->args.reg[PRIVATE_SEGMENT_WAVE_OFFSET_ARG]] = 1;
    if (cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG] >= 0)
      {
        fixed_regs[cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG]] = 1;
        fixed_regs[cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG] + 1] = 1;
-       fixed_regs[cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG] + 2] = 1;
-       fixed_regs[cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG] + 3] = 1;
      }
    if (cfun->machine->args.reg[KERNARG_SEGMENT_PTR_ARG] >= 0)
      {
--- 2105,2114 ----
      fixed_regs[cfun->machine->args.reg[PRIVATE_SEGMENT_WAVE_OFFSET_ARG]] = 1;
    if (cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG] >= 0)
      {
+       /* The upper 32-bits of the 64-bit descriptor are not used, so allow
+ 	the containing registers to be used for other purposes.  */
        fixed_regs[cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG]] = 1;
        fixed_regs[cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG] + 1] = 1;
      }
    if (cfun->machine->args.reg[KERNARG_SEGMENT_PTR_ARG] >= 0)
      {
*************** gcn_function_value_regno_p (const unsign
*** 2202,2223 ****
    return n == RETURN_VALUE_REG;
  }
  
! /* Calculate the number of registers required to hold a function argument
!    of MODE and TYPE.  */
  
  static int
! num_arg_regs (machine_mode mode, const_tree type)
  {
!   int size;
! 
!   if (targetm.calls.must_pass_in_stack (mode, type))
      return 0;
  
!   if (type && mode == BLKmode)
!     size = int_size_in_bytes (type);
!   else
!     size = GET_MODE_SIZE (mode);
! 
    return (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
  }
  
--- 2236,2251 ----
    return n == RETURN_VALUE_REG;
  }
  
! /* Calculate the number of registers required to hold function argument
!    ARG.  */
  
  static int
! num_arg_regs (const function_arg_info &arg)
  {
!   if (targetm.calls.must_pass_in_stack (arg))
      return 0;
  
!   int size = arg.promoted_size_in_bytes ();
    return (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
  }
  
*************** gcn_pretend_outgoing_varargs_named (cumu
*** 2257,2305 ****
     and if so, which register.  */
  
  static rtx
! gcn_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type,
! 		  bool named)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    if (cum->normal_function)
      {
!       if (!named || mode == VOIDmode)
  	return 0;
  
!       if (targetm.calls.must_pass_in_stack (mode, type))
  	return 0;
  
        int reg_num = FIRST_PARM_REG + cum->num;
!       int num_regs = num_arg_regs (mode, type);
        if (num_regs > 0)
  	while (reg_num % num_regs != 0)
  	  reg_num++;
        if (reg_num + num_regs <= FIRST_PARM_REG + NUM_PARM_REGS)
! 	return gen_rtx_REG (mode, reg_num);
      }
    else
      {
        if (cum->num >= cum->args.nargs)
  	{
! 	  cum->offset = (cum->offset + TYPE_ALIGN (type) / 8 - 1)
! 	    & -(TYPE_ALIGN (type) / 8);
  	  cfun->machine->kernarg_segment_alignment
  	    = MAX ((unsigned) cfun->machine->kernarg_segment_alignment,
! 		   TYPE_ALIGN (type) / 8);
  	  rtx addr = gen_rtx_REG (DImode,
  				  cum->args.reg[KERNARG_SEGMENT_PTR_ARG]);
  	  if (cum->offset)
  	    addr = gen_rtx_PLUS (DImode, addr,
  				 gen_int_mode (cum->offset, DImode));
! 	  rtx mem = gen_rtx_MEM (mode, addr);
! 	  set_mem_attributes (mem, const_cast<tree>(type), 1);
  	  set_mem_addr_space (mem, ADDR_SPACE_SCALAR_FLAT);
  	  MEM_READONLY_P (mem) = 1;
  	  return mem;
  	}
  
        int a = cum->args.order[cum->num];
!       if (mode != gcn_kernel_arg_types[a].mode)
  	{
  	  error ("wrong type of argument %s", gcn_kernel_arg_types[a].name);
  	  return 0;
--- 2285,2332 ----
     and if so, which register.  */
  
  static rtx
! gcn_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    if (cum->normal_function)
      {
!       if (!arg.named || arg.end_marker_p ())
  	return 0;
  
!       if (targetm.calls.must_pass_in_stack (arg))
  	return 0;
  
        int reg_num = FIRST_PARM_REG + cum->num;
!       int num_regs = num_arg_regs (arg);
        if (num_regs > 0)
  	while (reg_num % num_regs != 0)
  	  reg_num++;
        if (reg_num + num_regs <= FIRST_PARM_REG + NUM_PARM_REGS)
! 	return gen_rtx_REG (arg.mode, reg_num);
      }
    else
      {
        if (cum->num >= cum->args.nargs)
  	{
! 	  cum->offset = (cum->offset + TYPE_ALIGN (arg.type) / 8 - 1)
! 	    & -(TYPE_ALIGN (arg.type) / 8);
  	  cfun->machine->kernarg_segment_alignment
  	    = MAX ((unsigned) cfun->machine->kernarg_segment_alignment,
! 		   TYPE_ALIGN (arg.type) / 8);
  	  rtx addr = gen_rtx_REG (DImode,
  				  cum->args.reg[KERNARG_SEGMENT_PTR_ARG]);
  	  if (cum->offset)
  	    addr = gen_rtx_PLUS (DImode, addr,
  				 gen_int_mode (cum->offset, DImode));
! 	  rtx mem = gen_rtx_MEM (arg.mode, addr);
! 	  set_mem_attributes (mem, arg.type, 1);
  	  set_mem_addr_space (mem, ADDR_SPACE_SCALAR_FLAT);
  	  MEM_READONLY_P (mem) = 1;
  	  return mem;
  	}
  
        int a = cum->args.order[cum->num];
!       if (arg.mode != gcn_kernel_arg_types[a].mode)
  	{
  	  error ("wrong type of argument %s", gcn_kernel_arg_types[a].name);
  	  return 0;
*************** gcn_function_arg (cumulative_args_t cum_
*** 2316,2332 ****
     argument in the argument list.  */
  
  static void
! gcn_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
! 			  const_tree type, bool named)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
    if (cum->normal_function)
      {
!       if (!named)
  	return;
  
!       int num_regs = num_arg_regs (mode, type);
        if (num_regs > 0)
  	while ((FIRST_PARM_REG + cum->num) % num_regs != 0)
  	  cum->num++;
--- 2343,2359 ----
     argument in the argument list.  */
  
  static void
! gcn_function_arg_advance (cumulative_args_t cum_v,
! 			  const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
    if (cum->normal_function)
      {
!       if (!arg.named)
  	return;
  
!       int num_regs = num_arg_regs (arg);
        if (num_regs > 0)
  	while ((FIRST_PARM_REG + cum->num) % num_regs != 0)
  	  cum->num++;
*************** gcn_function_arg_advance (cumulative_arg
*** 2338,2344 ****
  	cum->num++;
        else
  	{
! 	  cum->offset += tree_to_uhwi (TYPE_SIZE_UNIT (type));
  	  cfun->machine->kernarg_segment_byte_size = cum->offset;
  	}
      }
--- 2365,2371 ----
  	cum->num++;
        else
  	{
! 	  cum->offset += tree_to_uhwi (TYPE_SIZE_UNIT (arg.type));
  	  cfun->machine->kernarg_segment_byte_size = cum->offset;
  	}
      }
*************** gcn_function_arg_advance (cumulative_arg
*** 2351,2372 ****
     in registers or that are entirely pushed on the stack.  */
  
  static int
! gcn_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, tree type,
! 		       bool named)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
!   if (!named)
      return 0;
  
!   if (targetm.calls.must_pass_in_stack (mode, type))
      return 0;
  
    if (cum->num >= NUM_PARM_REGS)
      return 0;
  
    /* If the argument fits entirely in registers, return 0.  */
!   if (cum->num + num_arg_regs (mode, type) <= NUM_PARM_REGS)
      return 0;
  
    return (NUM_PARM_REGS - cum->num) * UNITS_PER_WORD;
--- 2378,2398 ----
     in registers or that are entirely pushed on the stack.  */
  
  static int
! gcn_arg_partial_bytes (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
!   if (!arg.named)
      return 0;
  
!   if (targetm.calls.must_pass_in_stack (arg))
      return 0;
  
    if (cum->num >= NUM_PARM_REGS)
      return 0;
  
    /* If the argument fits entirely in registers, return 0.  */
!   if (cum->num + num_arg_regs (arg) <= NUM_PARM_REGS)
      return 0;
  
    return (NUM_PARM_REGS - cum->num) * UNITS_PER_WORD;
*************** gcn_init_cumulative_args (CUMULATIVE_ARG
*** 2444,2449 ****
--- 2470,2477 ----
    cfun->machine->args = cum->args;
    if (!caller && cfun->machine->normal_function)
      gcn_detect_incoming_pointer_arg (fndecl);
+ 
+   reinit_regs ();
  }
  
  static bool
*************** gcn_gimplify_va_arg_expr (tree valist, t
*** 2495,2501 ****
    tree t, u;
    bool indirect;
  
!   indirect = pass_by_reference (NULL, TYPE_MODE (type), type, 0);
    if (indirect)
      {
        type = ptr;
--- 2523,2529 ----
    tree t, u;
    bool indirect;
  
!   indirect = pass_va_arg_by_reference (type);
    if (indirect)
      {
        type = ptr;
*************** gcn_gimplify_va_arg_expr (tree valist, t
*** 2526,2531 ****
--- 2554,2587 ----
    return t;
  }
  
+ /* Return 1 if TRAIT NAME is present in the OpenMP context's
+    device trait set, return 0 if not present in any OpenMP context in the
+    whole translation unit, or -1 if not present in the current OpenMP context
+    but might be present in another OpenMP context in the same TU.  */
+ 
+ int
+ gcn_omp_device_kind_arch_isa (enum omp_device_kind_arch_isa trait,
+ 			      const char *name)
+ {
+   switch (trait)
+     {
+     case omp_device_kind:
+       return strcmp (name, "gpu") == 0;
+     case omp_device_arch:
+       return strcmp (name, "gcn") == 0;
+     case omp_device_isa:
+       if (strcmp (name, "fiji") == 0)
+ 	return gcn_arch == PROCESSOR_FIJI;
+       if (strcmp (name, "gfx900") == 0)
+ 	return gcn_arch == PROCESSOR_VEGA;
+       if (strcmp (name, "gfx906") == 0)
+ 	return gcn_arch == PROCESSOR_VEGA;
+       return 0;
+     default:
+       gcc_unreachable ();
+     }
+ }
+ 
  /* Calculate stack offsets needed to create prologues and epilogues.  */
  
  static struct machine_function *
*************** gcn_compute_frame_offsets (void)
*** 2550,2556 ****
    offsets->callee_saves = offsets->lr_needs_saving ? 8 : 0;
  
    for (int regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
!     if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
  	|| ((regno & ~1) == HARD_FRAME_POINTER_REGNUM
  	    && frame_pointer_needed))
        offsets->callee_saves += (VGPR_REGNO_P (regno) ? 256 : 4);
--- 2606,2612 ----
    offsets->callee_saves = offsets->lr_needs_saving ? 8 : 0;
  
    for (int regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
!     if ((df_regs_ever_live_p (regno) && !call_used_or_fixed_reg_p (regno))
  	|| ((regno & ~1) == HARD_FRAME_POINTER_REGNUM
  	    && frame_pointer_needed))
        offsets->callee_saves += (VGPR_REGNO_P (regno) ? 256 : 4);
*************** move_callee_saved_registers (rtx sp, mac
*** 2582,2588 ****
  
    /* Move scalars into two vector registers.  */
    for (regno = 0, saved_scalars = 0; regno < FIRST_VGPR_REG; regno++)
!     if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
  	|| ((regno & ~1) == LINK_REGNUM && offsets->lr_needs_saving)
  	|| ((regno & ~1) == HARD_FRAME_POINTER_REGNUM
  	    && offsets->need_frame_pointer))
--- 2638,2644 ----
  
    /* Move scalars into two vector registers.  */
    for (regno = 0, saved_scalars = 0; regno < FIRST_VGPR_REG; regno++)
!     if ((df_regs_ever_live_p (regno) && !call_used_or_fixed_reg_p (regno))
  	|| ((regno & ~1) == LINK_REGNUM && offsets->lr_needs_saving)
  	|| ((regno & ~1) == HARD_FRAME_POINTER_REGNUM
  	    && offsets->need_frame_pointer))
*************** move_callee_saved_registers (rtx sp, mac
*** 2628,2634 ****
    /* Move vectors.  */
    for (regno = FIRST_VGPR_REG, offset = offsets->pretend_size;
         regno < FIRST_PSEUDO_REGISTER; regno++)
!     if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
  	|| (regno == VGPR_REGNO (6) && saved_scalars > 0)
  	|| (regno == VGPR_REGNO (7) && saved_scalars > 63))
        {
--- 2684,2690 ----
    /* Move vectors.  */
    for (regno = FIRST_VGPR_REG, offset = offsets->pretend_size;
         regno < FIRST_PSEUDO_REGISTER; regno++)
!     if ((df_regs_ever_live_p (regno) && !call_used_or_fixed_reg_p (regno))
  	|| (regno == VGPR_REGNO (6) && saved_scalars > 0)
  	|| (regno == VGPR_REGNO (7) && saved_scalars > 63))
        {
*************** gcn_expand_prologue ()
*** 2779,2793 ****
  				     cfun->machine->args.
  				     reg[PRIVATE_SEGMENT_WAVE_OFFSET_ARG]);
  
-       if (TARGET_GCN5_PLUS)
- 	{
- 	  /* v0 is reserved for constant zero so that "global"
- 	     memory instructions can have a nul-offset without
- 	     causing reloads.  */
- 	  emit_insn (gen_vec_duplicatev64si
- 		     (gen_rtx_REG (V64SImode, VGPR_REGNO (0)), const0_rtx));
- 	}
- 
        if (cfun->machine->args.requested & (1 << FLAT_SCRATCH_INIT_ARG))
  	{
  	  rtx fs_init_lo =
--- 2835,2840 ----
*************** gcn_expand_prologue ()
*** 2842,2853 ****
    /* Ensure that the scheduler doesn't do anything unexpected.  */
    emit_insn (gen_blockage ());
  
    emit_move_insn (gen_rtx_REG (SImode, M0_REG),
! 		  gen_int_mode (LDS_SIZE, SImode));
  
    emit_insn (gen_prologue_use (gen_rtx_REG (SImode, M0_REG)));
-   if (TARGET_GCN5_PLUS)
-     emit_insn (gen_prologue_use (gen_rtx_REG (SImode, VGPR_REGNO (0))));
  
    if (cfun && cfun->machine && !cfun->machine->normal_function && flag_openmp)
      {
--- 2889,2901 ----
    /* Ensure that the scheduler doesn't do anything unexpected.  */
    emit_insn (gen_blockage ());
  
+   /* m0 is initialized for the usual LDS DS and FLAT memory case.
+      The low-part is the address of the topmost addressable byte, which is
+      size-1.  The high-part is an offset and should be zero.  */
    emit_move_insn (gen_rtx_REG (SImode, M0_REG),
! 		  gen_int_mode (LDS_SIZE-1, SImode));
  
    emit_insn (gen_prologue_use (gen_rtx_REG (SImode, M0_REG)));
  
    if (cfun && cfun->machine && !cfun->machine->normal_function && flag_openmp)
      {
*************** machine_mode
*** 3027,3033 ****
  gcn_hard_regno_caller_save_mode (unsigned int regno, unsigned int nregs,
  				 machine_mode regmode)
  {
!   machine_mode result = choose_hard_reg_mode (regno, nregs, false);
  
    if (VECTOR_MODE_P (result) && !VECTOR_MODE_P (regmode))
      result = (nregs == 1 ? SImode : DImode);
--- 3075,3081 ----
  gcn_hard_regno_caller_save_mode (unsigned int regno, unsigned int nregs,
  				 machine_mode regmode)
  {
!   machine_mode result = choose_hard_reg_mode (regno, nregs, NULL);
  
    if (VECTOR_MODE_P (result) && !VECTOR_MODE_P (regmode))
      result = (nregs == 1 ? SImode : DImode);
*************** gcn_valid_cvt_p (machine_mode from, mach
*** 3165,3182 ****
  	  || (to == DFmode && (from == SImode || from == SFmode)));
  }
  
! /* Implement both TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR.
  
!    The current loader does not support running code outside "main".  This
!    hook implementation can be replaced or removed when that changes.  */
  
! void
! gcn_disable_constructors (rtx symbol, int priority __attribute__ ((unused)))
  {
!   tree d = SYMBOL_REF_DECL (symbol);
!   location_t l = d ? DECL_SOURCE_LOCATION (d) : UNKNOWN_LOCATION;
! 
!   sorry_at (l, "GCN does not support static constructors or destructors");
  }
  
  /* }}}  */
--- 3213,3227 ----
  	  || (to == DFmode && (from == SImode || from == SFmode)));
  }
  
! /* Implement TARGET_EMUTLS_VAR_INIT.
  
!    Disable emutls (gthr-gcn.h does not support it, yet).  */
  
! tree
! gcn_emutls_var_init (tree, tree decl, tree)
  {
!   sorry_at (DECL_SOURCE_LOCATION (decl), "TLS is not implemented for GCN.");
!   return NULL_TREE;
  }
  
  /* }}}  */
*************** gcn_expand_builtin_1 (tree exp, rtx targ
*** 3552,3558 ****
  		      struct gcn_builtin_description *)
  {
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   switch (DECL_FUNCTION_CODE (fndecl))
      {
      case GCN_BUILTIN_FLAT_LOAD_INT32:
        {
--- 3597,3603 ----
  		      struct gcn_builtin_description *)
  {
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   switch (DECL_MD_FUNCTION_CODE (fndecl))
      {
      case GCN_BUILTIN_FLAT_LOAD_INT32:
        {
*************** gcn_expand_builtin (tree exp, rtx target
*** 3779,3785 ****
  		    int ignore)
  {
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
    struct gcn_builtin_description *d;
  
    gcc_assert (fcode < GCN_BUILTIN_MAX);
--- 3824,3830 ----
  		    int ignore)
  {
    tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl);
    struct gcn_builtin_description *d;
  
    gcc_assert (fcode < GCN_BUILTIN_MAX);
*************** gcn_expand_builtin (tree exp, rtx target
*** 3800,3807 ****
     a vector.  */
  
  opt_machine_mode
! gcn_vectorize_get_mask_mode (poly_uint64 ARG_UNUSED (nunits),
! 			     poly_uint64 ARG_UNUSED (length))
  {
    /* GCN uses a DImode bit-mask.  */
    return DImode;
--- 3845,3851 ----
     a vector.  */
  
  opt_machine_mode
! gcn_vectorize_get_mask_mode (machine_mode)
  {
    /* GCN uses a DImode bit-mask.  */
    return DImode;
*************** gcn_vectorize_vec_perm_const (machine_mo
*** 3962,3973 ****
  static bool
  gcn_vector_mode_supported_p (machine_mode mode)
  {
!   /* FIXME: Enable V64QImode and V64HImode.
! 	    We should support these modes, but vector operations are usually
! 	    assumed to automatically truncate types, and GCN does not.  We
! 	    need to add explicit truncates and/or use SDWA for QI/HI insns.  */
!   return (/* mode == V64QImode || mode == V64HImode
! 	  ||*/ mode == V64SImode || mode == V64DImode
  	  || mode == V64SFmode || mode == V64DFmode);
  }
  
--- 4006,4013 ----
  static bool
  gcn_vector_mode_supported_p (machine_mode mode)
  {
!   return (mode == V64QImode || mode == V64HImode
! 	  || mode == V64SImode || mode == V64DImode
  	  || mode == V64SFmode || mode == V64DFmode);
  }
  
*************** gcn_vectorize_preferred_simd_mode (scala
*** 3997,4002 ****
--- 4037,4061 ----
      }
  }
  
+ /* Implement TARGET_VECTORIZE_RELATED_MODE.
+ 
+    All GCN vectors are 64-lane, so this is simpler than other architectures.
+    In particular, we do *not* want to match vector bit-size.  */
+ 
+ static opt_machine_mode
+ gcn_related_vector_mode (machine_mode vector_mode, scalar_mode element_mode,
+ 			 poly_uint64 nunits)
+ {
+   if (known_ne (nunits, 0U) && known_ne (nunits, 64U))
+     return VOIDmode;
+ 
+   machine_mode pref_mode = gcn_vectorize_preferred_simd_mode (element_mode);
+   if (!VECTOR_MODE_P (pref_mode))
+     return VOIDmode;
+ 
+   return pref_mode;
+ }
+ 
  /* Implement TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT.
  
     Returns the preferred alignment in bits for accesses to vectors of type type
*************** char *
*** 4062,4068 ****
  gcn_expand_dpp_shr_insn (machine_mode mode, const char *insn,
  			 int unspec, int shift)
  {
!   static char buf[64];
    const char *dpp;
    const char *vcc_in = "";
    const char *vcc_out = "";
--- 4121,4127 ----
  gcn_expand_dpp_shr_insn (machine_mode mode, const char *insn,
  			 int unspec, int shift)
  {
!   static char buf[128];
    const char *dpp;
    const char *vcc_in = "";
    const char *vcc_out = "";
*************** gcn_expand_dpp_shr_insn (machine_mode mo
*** 4103,4109 ****
        gcc_unreachable ();
      }
  
!   sprintf (buf, "%s\t%%0%s, %%1, %%2%s %s", insn, vcc_out, vcc_in, dpp);
  
    return buf;
  }
--- 4162,4174 ----
        gcc_unreachable ();
      }
  
!   if (unspec == UNSPEC_MOV_DPP_SHR && vgpr_2reg_mode_p (mode))
!     sprintf (buf, "%s\t%%L0, %%L1 %s\n\t%s\t%%H0, %%H1 %s",
! 	     insn, dpp, insn, dpp);
!   else if (unspec == UNSPEC_MOV_DPP_SHR)
!     sprintf (buf, "%s\t%%0, %%1 %s", insn, dpp);
!   else
!     sprintf (buf, "%s\t%%0%s, %%1, %%2%s %s", insn, vcc_out, vcc_in, dpp);
  
    return buf;
  }
*************** gcn_expand_dpp_shr_insn (machine_mode mo
*** 4117,4123 ****
  rtx
  gcn_expand_reduc_scalar (machine_mode mode, rtx src, int unspec)
  {
!   rtx tmp = gen_reg_rtx (mode);
    bool use_plus_carry = unspec == UNSPEC_PLUS_DPP_SHR
  			&& GET_MODE_CLASS (mode) == MODE_VECTOR_INT
  			&& (TARGET_GCN3 || mode == V64DImode);
--- 4182,4209 ----
  rtx
  gcn_expand_reduc_scalar (machine_mode mode, rtx src, int unspec)
  {
!   machine_mode orig_mode = mode;
!   bool use_moves = (((unspec == UNSPEC_SMIN_DPP_SHR
! 		      || unspec == UNSPEC_SMAX_DPP_SHR
! 		      || unspec == UNSPEC_UMIN_DPP_SHR
! 		      || unspec == UNSPEC_UMAX_DPP_SHR)
! 		     && mode == V64DImode)
! 		    || (unspec == UNSPEC_PLUS_DPP_SHR
! 			&& mode == V64DFmode));
!   rtx_code code = (unspec == UNSPEC_SMIN_DPP_SHR ? SMIN
! 		   : unspec == UNSPEC_SMAX_DPP_SHR ? SMAX
! 		   : unspec == UNSPEC_UMIN_DPP_SHR ? UMIN
! 		   : unspec == UNSPEC_UMAX_DPP_SHR ? UMAX
! 		   : unspec == UNSPEC_PLUS_DPP_SHR ? PLUS
! 		   : UNKNOWN);
!   bool use_extends = ((unspec == UNSPEC_SMIN_DPP_SHR
! 		       || unspec == UNSPEC_SMAX_DPP_SHR
! 		       || unspec == UNSPEC_UMIN_DPP_SHR
! 		       || unspec == UNSPEC_UMAX_DPP_SHR)
! 		      && (mode == V64QImode
! 			  || mode == V64HImode));
!   bool unsignedp = (unspec == UNSPEC_UMIN_DPP_SHR
! 		    || unspec == UNSPEC_UMAX_DPP_SHR);
    bool use_plus_carry = unspec == UNSPEC_PLUS_DPP_SHR
  			&& GET_MODE_CLASS (mode) == MODE_VECTOR_INT
  			&& (TARGET_GCN3 || mode == V64DImode);
*************** gcn_expand_reduc_scalar (machine_mode mo
*** 4125,4160 ****
    if (use_plus_carry)
      unspec = UNSPEC_PLUS_CARRY_DPP_SHR;
  
    /* Perform reduction by first performing the reduction operation on every
       pair of lanes, then on every pair of results from the previous
       iteration (thereby effectively reducing every 4 lanes) and so on until
       all lanes are reduced.  */
    for (int i = 0, shift = 1; i < 6; i++, shift <<= 1)
      {
        rtx shift_val = gen_rtx_CONST_INT (VOIDmode, shift);
!       rtx insn = gen_rtx_SET (tmp,
! 			      gen_rtx_UNSPEC (mode,
! 					      gen_rtvec (3,
! 							 src, src, shift_val),
! 					      unspec));
  
!       /* Add clobber for instructions that set the carry flags.  */
!       if (use_plus_carry)
  	{
! 	  rtx clobber = gen_rtx_CLOBBER (VOIDmode,
! 					 gen_rtx_REG (DImode, VCC_REG));
! 	  insn = gen_rtx_PARALLEL (VOIDmode,
! 				   gen_rtvec (2, insn, clobber));
  	}
  
!       emit_insn (insn);
  
!       /* The source operands for every iteration after the first
! 	   should be TMP.  */
!       src = tmp;
      }
  
!   return tmp;
  }
  
  /* Implement TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST.  */
--- 4211,4270 ----
    if (use_plus_carry)
      unspec = UNSPEC_PLUS_CARRY_DPP_SHR;
  
+   if (use_extends)
+     {
+       rtx tmp = gen_reg_rtx (V64SImode);
+       convert_move (tmp, src, unsignedp);
+       src = tmp;
+       mode = V64SImode;
+     }
+ 
    /* Perform reduction by first performing the reduction operation on every
       pair of lanes, then on every pair of results from the previous
       iteration (thereby effectively reducing every 4 lanes) and so on until
       all lanes are reduced.  */
+   rtx in, out = src;
    for (int i = 0, shift = 1; i < 6; i++, shift <<= 1)
      {
        rtx shift_val = gen_rtx_CONST_INT (VOIDmode, shift);
!       in = out;
!       out = gen_reg_rtx (mode);
  
!       if (use_moves)
  	{
! 	  rtx tmp = gen_reg_rtx (mode);
! 	  emit_insn (gen_dpp_move (mode, tmp, in, shift_val));
! 	  emit_insn (gen_rtx_SET (out, gen_rtx_fmt_ee (code, mode, tmp, in)));
  	}
+       else
+ 	{
+ 	  rtx insn = gen_rtx_SET (out,
+ 				  gen_rtx_UNSPEC (mode,
+ 						  gen_rtvec (3, in, in,
+ 							     shift_val),
+ 						  unspec));
  
! 	  /* Add clobber for instructions that set the carry flags.  */
! 	  if (use_plus_carry)
! 	    {
! 	      rtx clobber = gen_rtx_CLOBBER (VOIDmode,
! 					     gen_rtx_REG (DImode, VCC_REG));
! 	      insn = gen_rtx_PARALLEL (VOIDmode,
! 				       gen_rtvec (2, insn, clobber));
! 	    }
  
! 	  emit_insn (insn);
! 	}
      }
  
!   if (use_extends)
!     {
!       rtx tmp = gen_reg_rtx (orig_mode);
!       convert_move (tmp, out, unsignedp);
!       out = tmp;
!     }
! 
!   return out;
  }
  
  /* Implement TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST.  */
*************** gcn_md_reorg (void)
*** 4305,4312 ****
  {
    basic_block bb;
    rtx exec_reg = gen_rtx_REG (DImode, EXEC_REG);
-   rtx exec_lo_reg = gen_rtx_REG (SImode, EXEC_LO_REG);
-   rtx exec_hi_reg = gen_rtx_REG (SImode, EXEC_HI_REG);
    regset_head live;
  
    INIT_REG_SET (&live);
--- 4415,4420 ----
*************** gcn_md_reorg (void)
*** 4359,4365 ****
  	  HARD_REG_SET defs, uses;
  	  CLEAR_HARD_REG_SET (defs);
  	  CLEAR_HARD_REG_SET (uses);
! 	  note_stores (PATTERN (insn), record_hard_reg_sets, &defs);
  	  note_uses (&PATTERN (insn), record_hard_reg_uses, &uses);
  
  	  bool exec_lo_def_p = TEST_HARD_REG_BIT (defs, EXEC_LO_REG);
--- 4467,4473 ----
  	  HARD_REG_SET defs, uses;
  	  CLEAR_HARD_REG_SET (defs);
  	  CLEAR_HARD_REG_SET (uses);
! 	  note_stores (insn, record_hard_reg_sets, &defs);
  	  note_uses (&PATTERN (insn), record_hard_reg_uses, &uses);
  
  	  bool exec_lo_def_p = TEST_HARD_REG_BIT (defs, EXEC_LO_REG);
*************** gcn_md_reorg (void)
*** 4522,4528 ****
--- 4630,4638 ----
    {
      rtx_insn *insn;
      attr_unit unit;
+     attr_delayeduse delayeduse;
      HARD_REG_SET writes;
+     HARD_REG_SET reads;
      int age;
    } back[max_waits];
    int oldest = 0;
*************** gcn_md_reorg (void)
*** 4541,4550 ****
  
        attr_type itype = get_attr_type (insn);
        attr_unit iunit = get_attr_unit (insn);
        HARD_REG_SET ireads, iwrites;
        CLEAR_HARD_REG_SET (ireads);
        CLEAR_HARD_REG_SET (iwrites);
!       note_stores (PATTERN (insn), record_hard_reg_sets, &iwrites);
        note_uses (&PATTERN (insn), record_hard_reg_uses, &ireads);
  
        /* Scan recent previous instructions for dependencies not handled in
--- 4651,4661 ----
  
        attr_type itype = get_attr_type (insn);
        attr_unit iunit = get_attr_unit (insn);
+       attr_delayeduse idelayeduse = get_attr_delayeduse (insn);
        HARD_REG_SET ireads, iwrites;
        CLEAR_HARD_REG_SET (ireads);
        CLEAR_HARD_REG_SET (iwrites);
!       note_stores (insn, record_hard_reg_sets, &iwrites);
        note_uses (&PATTERN (insn), record_hard_reg_uses, &ireads);
  
        /* Scan recent previous instructions for dependencies not handled in
*************** gcn_md_reorg (void)
*** 4563,4571 ****
  	      && prev_insn->unit == UNIT_VECTOR
  	      && gcn_vmem_insn_p (itype))
  	    {
! 	      HARD_REG_SET regs;
! 	      COPY_HARD_REG_SET (regs, prev_insn->writes);
! 	      AND_HARD_REG_SET (regs, ireads);
  	      if (hard_reg_set_intersect_p
  		  (regs, reg_class_contents[(int) SGPR_REGS]))
  		nops_rqd = 5 - prev_insn->age;
--- 4674,4680 ----
  	      && prev_insn->unit == UNIT_VECTOR
  	      && gcn_vmem_insn_p (itype))
  	    {
! 	      HARD_REG_SET regs = prev_insn->writes & ireads;
  	      if (hard_reg_set_intersect_p
  		  (regs, reg_class_contents[(int) SGPR_REGS]))
  		nops_rqd = 5 - prev_insn->age;
*************** gcn_md_reorg (void)
*** 4593,4601 ****
  	      && prev_insn->unit == UNIT_VECTOR
  	      && get_attr_laneselect (insn) == LANESELECT_YES)
  	    {
! 	      HARD_REG_SET regs;
! 	      COPY_HARD_REG_SET (regs, prev_insn->writes);
! 	      AND_HARD_REG_SET (regs, ireads);
  	      if (hard_reg_set_intersect_p
  		  (regs, reg_class_contents[(int) SGPR_REGS])
  		  || hard_reg_set_intersect_p
--- 4702,4708 ----
  	      && prev_insn->unit == UNIT_VECTOR
  	      && get_attr_laneselect (insn) == LANESELECT_YES)
  	    {
! 	      HARD_REG_SET regs = prev_insn->writes & ireads;
  	      if (hard_reg_set_intersect_p
  		  (regs, reg_class_contents[(int) SGPR_REGS])
  		  || hard_reg_set_intersect_p
*************** gcn_md_reorg (void)
*** 4609,4621 ****
  	      && prev_insn->unit == UNIT_VECTOR
  	      && itype == TYPE_VOP_DPP)
  	    {
! 	      HARD_REG_SET regs;
! 	      COPY_HARD_REG_SET (regs, prev_insn->writes);
! 	      AND_HARD_REG_SET (regs, ireads);
  	      if (hard_reg_set_intersect_p
  		  (regs, reg_class_contents[(int) VGPR_REGS]))
  		nops_rqd = 2 - prev_insn->age;
  	    }
  	}
  
        /* Insert the required number of NOPs.  */
--- 4716,4734 ----
  	      && prev_insn->unit == UNIT_VECTOR
  	      && itype == TYPE_VOP_DPP)
  	    {
! 	      HARD_REG_SET regs = prev_insn->writes & ireads;
  	      if (hard_reg_set_intersect_p
  		  (regs, reg_class_contents[(int) VGPR_REGS]))
  		nops_rqd = 2 - prev_insn->age;
  	    }
+ 
+ 	  /* Store that requires input registers are not overwritten by
+ 	     following instruction.  */
+ 	  if ((prev_insn->age + nops_rqd) < 1
+ 	      && prev_insn->delayeduse == DELAYEDUSE_YES
+ 	      && ((hard_reg_set_intersect_p
+ 		   (prev_insn->reads, iwrites))))
+ 	    nops_rqd = 1 - prev_insn->age;
  	}
  
        /* Insert the required number of NOPs.  */
*************** gcn_md_reorg (void)
*** 4636,4649 ****
  	     not publish the cycle times for instructions.  */
  	  prev_insn->age += 1 + nops_rqd;
  
! 	  IOR_HARD_REG_SET (written, iwrites);
! 	  AND_COMPL_HARD_REG_SET (prev_insn->writes, written);
  	}
  
        /* Track the current instruction as a previous instruction.  */
        back[oldest].insn = insn;
        back[oldest].unit = iunit;
!       COPY_HARD_REG_SET (back[oldest].writes, iwrites);
        back[oldest].age = 0;
        oldest = (oldest + 1) % max_waits;
  
--- 4749,4764 ----
  	     not publish the cycle times for instructions.  */
  	  prev_insn->age += 1 + nops_rqd;
  
! 	  written |= iwrites;
! 	  prev_insn->writes &= ~written;
  	}
  
        /* Track the current instruction as a previous instruction.  */
        back[oldest].insn = insn;
        back[oldest].unit = iunit;
!       back[oldest].delayeduse = idelayeduse;
!       back[oldest].writes = iwrites;
!       back[oldest].reads = ireads;
        back[oldest].age = 0;
        oldest = (oldest + 1) % max_waits;
  
*************** gcn_goacc_validate_dims (tree decl, int
*** 4672,4677 ****
--- 4787,4794 ----
    /* FIXME: remove -facc-experimental-workers when they're ready.  */
    int max_workers = flag_worker_partitioning ? 16 : 1;
  
+   gcc_assert (!flag_worker_partitioning);
+ 
    /* The vector size must appear to be 64, to the user, unless this is a
       SEQ routine.  The real, internal value is always 1, which means use
       autovectorization, but the user should not see that.  */
*************** gcn_hsa_declare_function_name (FILE *fil
*** 4880,4891 ****
    if (!leaf_function_p ())
      {
        /* We can't know how many registers function calls might use.  */
!       if (vgpr < 64)
! 	vgpr = 64;
!       if (sgpr + extra_regs < 102)
! 	sgpr = 102 - extra_regs;
      }
  
    fputs ("\t.align\t256\n", file);
    fputs ("\t.type\t", file);
    assemble_name (file, name);
--- 4997,5018 ----
    if (!leaf_function_p ())
      {
        /* We can't know how many registers function calls might use.  */
!       if (vgpr < MAX_NORMAL_VGPR_COUNT)
! 	vgpr = MAX_NORMAL_VGPR_COUNT;
!       if (sgpr + extra_regs < MAX_NORMAL_SGPR_COUNT)
! 	sgpr = MAX_NORMAL_SGPR_COUNT - extra_regs;
      }
  
+   /* GFX8 allocates SGPRs in blocks of 8.
+      GFX9 uses blocks of 16.  */
+   int granulated_sgprs;
+   if (TARGET_GCN3)
+     granulated_sgprs = (sgpr + extra_regs + 7) / 8 - 1;
+   else if (TARGET_GCN5)
+     granulated_sgprs = 2 * ((sgpr + extra_regs + 15) / 16 - 1);
+   else
+     gcc_unreachable ();
+ 
    fputs ("\t.align\t256\n", file);
    fputs ("\t.type\t", file);
    assemble_name (file, name);
*************** gcn_hsa_declare_function_name (FILE *fil
*** 4924,4930 ****
  	   "\t\tcompute_pgm_rsrc2_excp_en = 0\n",
  	   (vgpr - 1) / 4,
  	   /* Must match wavefront_sgpr_count */
! 	   (sgpr + extra_regs + 7) / 8 - 1,
  	   /* The total number of SGPR user data registers requested.  This
  	      number must match the number of user data registers enabled.  */
  	   cfun->machine->args.nsgprs);
--- 5051,5057 ----
  	   "\t\tcompute_pgm_rsrc2_excp_en = 0\n",
  	   (vgpr - 1) / 4,
  	   /* Must match wavefront_sgpr_count */
! 	   granulated_sgprs,
  	   /* The total number of SGPR user data registers requested.  This
  	      number must match the number of user data registers enabled.  */
  	   cfun->machine->args.nsgprs);
*************** void
*** 5179,5185 ****
  gcn_asm_output_symbol_ref (FILE *file, rtx x)
  {
    tree decl;
!   if ((decl = SYMBOL_REF_DECL (x)) != 0
        && TREE_CODE (decl) == VAR_DECL
        && AS_LDS_P (TYPE_ADDR_SPACE (TREE_TYPE (decl))))
      {
--- 5306,5313 ----
  gcn_asm_output_symbol_ref (FILE *file, rtx x)
  {
    tree decl;
!   if (cfun
!       && (decl = SYMBOL_REF_DECL (x)) != 0
        && TREE_CODE (decl) == VAR_DECL
        && AS_LDS_P (TYPE_ADDR_SPACE (TREE_TYPE (decl))))
      {
*************** gcn_asm_output_symbol_ref (FILE *file, r
*** 5194,5200 ****
      {
        assemble_name (file, XSTR (x, 0));
        /* FIXME: See above -- this condition is unreachable.  */
!       if ((decl = SYMBOL_REF_DECL (x)) != 0
  	  && TREE_CODE (decl) == VAR_DECL
  	  && AS_LDS_P (TYPE_ADDR_SPACE (TREE_TYPE (decl))))
  	fputs ("@abs32", file);
--- 5322,5329 ----
      {
        assemble_name (file, XSTR (x, 0));
        /* FIXME: See above -- this condition is unreachable.  */
!       if (cfun
! 	  && (decl = SYMBOL_REF_DECL (x)) != 0
  	  && TREE_CODE (decl) == VAR_DECL
  	  && AS_LDS_P (TYPE_ADDR_SPACE (TREE_TYPE (decl))))
  	fputs ("@abs32", file);
*************** print_operand_address (FILE *file, rtx m
*** 5299,5307 ****
  	      /* The assembler requires a 64-bit VGPR pair here, even though
  	         the offset should be only 32-bit.  */
  	      if (vgpr_offset == NULL_RTX)
! 		/* In this case, the vector offset is zero, so we use v0,
! 		   which is initialized by the kernel prologue to zero.  */
! 		fprintf (file, "v[0:1]");
  	      else if (REG_P (vgpr_offset)
  		       && VGPR_REGNO_P (REGNO (vgpr_offset)))
  		{
--- 5428,5436 ----
  	      /* The assembler requires a 64-bit VGPR pair here, even though
  	         the offset should be only 32-bit.  */
  	      if (vgpr_offset == NULL_RTX)
! 		/* In this case, the vector offset is zero, so we use the first
! 		   lane of v1, which is initialized to zero.  */
! 		fprintf (file, "v[1:2]");
  	      else if (REG_P (vgpr_offset)
  		       && VGPR_REGNO_P (REGNO (vgpr_offset)))
  		{
*************** print_operand_address (FILE *file, rtx m
*** 5364,5370 ****
--- 5493,5501 ----
     b - print operand size as untyped operand (b8/b16/b32/b64)
     B - print operand size as SI/DI untyped operand (b32/b32/b32/b64)
     i - print operand size as untyped operand (i16/b32/i64)
+    I - print operand size as SI/DI untyped operand(i32/b32/i64)
     u - print operand size as untyped operand (u16/u32/u64)
+    U - print operand size as SI/DI untyped operand(u32/u64)
     o - print operand size as memory access size for loads
         (ubyte/ushort/dword/dwordx2/wordx3/dwordx4)
     s - print operand size as memory access size for stores
*************** print_operand (FILE *file, rtx x, int co
*** 5459,5467 ****
--- 5590,5601 ----
        fputs (")", file);
        return;
      case 'i':
+     case 'I':
      case 'u':
+     case 'U':
        {
  	bool signed_p = code == 'i';
+ 	bool min32_p = code == 'I' || code == 'U';
  	const char *s = "";
  	machine_mode mode = GET_MODE (x);
  	if (VECTOR_MODE_P (mode))
*************** print_operand (FILE *file, rtx x, int co
*** 5495,5500 ****
--- 5629,5649 ----
  	      output_operand_lossage ("invalid operand %%xn code");
  	      return;
  	    }
+ 	else if (min32_p)
+ 	  switch (GET_MODE_SIZE (mode))
+ 	    {
+ 	    case 1:
+ 	    case 2:
+ 	    case 4:
+ 	      s = signed_p ? "_i32" : "_u32";
+ 	      break;
+ 	    case 8:
+ 	      s = signed_p ? "_i64" : "_u64";
+ 	      break;
+ 	    default:
+ 	      output_operand_lossage ("invalid operand %%xn code");
+ 	      return;
+ 	    }
  	else
  	  switch (GET_MODE_SIZE (mode))
  	    {
*************** print_operand (FILE *file, rtx x, int co
*** 5858,5863 ****
--- 6007,6030 ----
  	  case UNORDERED:
  	    s = "_u_";
  	    break;
+ 	  case UNEQ:
+ 	    s = "_nlg_";
+ 	    break;
+ 	  case UNGE:
+ 	    s = "_nlt_";
+ 	    break;
+ 	  case UNGT:
+ 	    s = "_nle_";
+ 	    break;
+ 	  case UNLE:
+ 	    s = "_ngt_";
+ 	    break;
+ 	  case UNLT:
+ 	    s = "_nge_";
+ 	    break;
+ 	  case LTGT:
+ 	    s = "_lg_";
+ 	    break;
  	  default:
  	    output_operand_lossage ("invalid %%xn code");
  	    return;
*************** print_operand (FILE *file, rtx x, int co
*** 5868,5877 ****
  	switch (GET_MODE_SIZE (mode))
  	  {
  	  case 1:
! 	    s = "32";
! 	    break;
  	  case 2:
! 	    s = float_p ? "16" : "32";
  	    break;
  	  case 4:
  	    s = "32";
--- 6035,6044 ----
  	switch (GET_MODE_SIZE (mode))
  	  {
  	  case 1:
! 	    output_operand_lossage ("operand %%xn code invalid for QImode");
! 	    return;
  	  case 2:
! 	    s = "16";
  	    break;
  	  case 4:
  	    s = "32";
*************** print_operand (FILE *file, rtx x, int co
*** 5995,6004 ****
  #define TARGET_ARG_PARTIAL_BYTES gcn_arg_partial_bytes
  #undef  TARGET_ASM_ALIGNED_DI_OP
  #define TARGET_ASM_ALIGNED_DI_OP "\t.8byte\t"
- #undef  TARGET_ASM_CONSTRUCTOR
- #define TARGET_ASM_CONSTRUCTOR gcn_disable_constructors
- #undef  TARGET_ASM_DESTRUCTOR
- #define TARGET_ASM_DESTRUCTOR gcn_disable_constructors
  #undef  TARGET_ASM_FILE_START
  #define TARGET_ASM_FILE_START output_file_start
  #undef  TARGET_ASM_FUNCTION_PROLOGUE
--- 6162,6167 ----
*************** print_operand (FILE *file, rtx x, int co
*** 6027,6032 ****
--- 6190,6197 ----
  #define TARGET_CONSTANT_ALIGNMENT gcn_constant_alignment
  #undef  TARGET_DEBUG_UNWIND_INFO
  #define TARGET_DEBUG_UNWIND_INFO gcn_debug_unwind_info
+ #undef  TARGET_EMUTLS_VAR_INIT
+ #define TARGET_EMUTLS_VAR_INIT gcn_emutls_var_init
  #undef  TARGET_EXPAND_BUILTIN
  #define TARGET_EXPAND_BUILTIN gcn_expand_builtin
  #undef  TARGET_FUNCTION_ARG
*************** print_operand (FILE *file, rtx x, int co
*** 6039,6044 ****
--- 6204,6211 ----
  #define TARGET_FUNCTION_VALUE_REGNO_P gcn_function_value_regno_p
  #undef  TARGET_GIMPLIFY_VA_ARG_EXPR
  #define TARGET_GIMPLIFY_VA_ARG_EXPR gcn_gimplify_va_arg_expr
+ #undef TARGET_OMP_DEVICE_KIND_ARCH_ISA
+ #define TARGET_OMP_DEVICE_KIND_ARCH_ISA gcn_omp_device_kind_arch_isa
  #undef  TARGET_GOACC_ADJUST_PROPAGATION_RECORD
  #define TARGET_GOACC_ADJUST_PROPAGATION_RECORD \
    gcn_goacc_adjust_propagation_record
*************** print_operand (FILE *file, rtx x, int co
*** 6050,6057 ****
  #define TARGET_GOACC_REDUCTION gcn_goacc_reduction
  #undef  TARGET_GOACC_VALIDATE_DIMS
  #define TARGET_GOACC_VALIDATE_DIMS gcn_goacc_validate_dims
- #undef  TARGET_GOACC_WORKER_PARTITIONING
- #define TARGET_GOACC_WORKER_PARTITIONING true
  #undef  TARGET_HARD_REGNO_MODE_OK
  #define TARGET_HARD_REGNO_MODE_OK gcn_hard_regno_mode_ok
  #undef  TARGET_HARD_REGNO_NREGS
--- 6217,6222 ----
*************** print_operand (FILE *file, rtx x, int co
*** 6110,6115 ****
--- 6275,6282 ----
  #undef  TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT
  #define TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT \
    gcn_preferred_vector_alignment
+ #undef  TARGET_VECTORIZE_RELATED_MODE
+ #define TARGET_VECTORIZE_RELATED_MODE gcn_related_vector_mode
  #undef  TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT
  #define TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT \
    gcn_vectorize_support_vector_misalignment
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/gcn.h gcc-10.1.0/gcc/config/gcn/gcn.h
*** gcc-9.3.0/gcc/config/gcn/gcn.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/gcn.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
--- 1,4 ----
! /* Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License as published by the Free
***************
*** 160,168 ****
  
  #define FIXED_REGISTERS {			    \
      /* Scalars.  */				    \
!     0, 0, 0, 0, 0, 0, 0, 0, 0, 0,		    \
  /*		fp    sp    lr.  */		    \
!     0, 0, 0, 0, 1, 1, 1, 1, 0, 0,		    \
  /*  exec_save, cc_save */			    \
      1, 1, 1, 1, 0, 0, 0, 0, 0, 0,		    \
      0, 0, 0, 0, 0, 0, 0, 0, 0, 0,		    \
--- 160,168 ----
  
  #define FIXED_REGISTERS {			    \
      /* Scalars.  */				    \
!     1, 1, 0, 0, 1, 1, 1, 1, 1, 1,		    \
  /*		fp    sp    lr.  */		    \
!     1, 1, 0, 0, 0, 0, 1, 1, 0, 0,		    \
  /*  exec_save, cc_save */			    \
      1, 1, 1, 1, 0, 0, 0, 0, 0, 0,		    \
      0, 0, 0, 0, 0, 0, 0, 0, 0, 0,		    \
***************
*** 180,186 ****
      1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
      1, 1, 1, 1, 1, 1, 1, 1, 1, 1,		    \
      /* VGRPs */					    \
!     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
--- 180,186 ----
      1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
      1, 1, 1, 1, 1, 1, 1, 1, 1, 1,		    \
      /* VGRPs */					    \
!     0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
***************
*** 203,209 ****
  #define CALL_USED_REGISTERS {			    \
      /* Scalars.  */				    \
      1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 		    \
!     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 		    \
      1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 		    \
      1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 		    \
      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 		    \
--- 203,209 ----
  #define CALL_USED_REGISTERS {			    \
      /* Scalars.  */				    \
      1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 		    \
!     1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 		    \
      1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 		    \
      1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 		    \
      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 		    \
*************** enum gcn_builtin_codes
*** 607,612 ****
--- 607,616 ----
  #define SLOW_BYTE_ACCESS 0
  #define WORD_REGISTER_OPERATIONS 1
  
+ /* Flag values are either BImode or DImode, but either way the compiler
+    should assume that all the bits are live.  */
+ #define STORE_FLAG_VALUE -1
+ 
  /* Definitions for register eliminations.
  
     This is an array of structures.  Each structure initializes one pair
*************** enum gcn_builtin_codes
*** 644,649 ****
--- 648,657 ----
  /* This needs to match gcn_function_value.  */
  #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, SGPR_REGNO (RETURN_VALUE_REG))
  
+ /* The s_ff0 and s_flbit instructions return -1 if no input bits are set.  */
+ #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = -1, 2)
+ #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = -1, 2)
+ 
  
  /* Costs.  */
  
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/gcn.md gcc-10.1.0/gcc/config/gcn/gcn.md
*** gcc-9.3.0/gcc/config/gcn/gcn.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/gcn.md	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! ;; Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
  ;; This file is free software; you can redistribute it and/or modify it under
  ;; the terms of the GNU General Public License as published by the Free
--- 1,4 ----
! ;; Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
  ;; This file is free software; you can redistribute it and/or modify it under
  ;; the terms of the GNU General Public License as published by the Free
***************
*** 76,81 ****
--- 76,82 ----
    UNSPEC_PLUS_DPP_SHR
    UNSPEC_PLUS_CARRY_DPP_SHR UNSPEC_PLUS_CARRY_IN_DPP_SHR
    UNSPEC_AND_DPP_SHR UNSPEC_IOR_DPP_SHR UNSPEC_XOR_DPP_SHR
+   UNSPEC_MOV_DPP_SHR
    UNSPEC_MOV_FROM_LANE63
    UNSPEC_GATHER
    UNSPEC_SCATTER])
***************
*** 285,290 ****
--- 286,296 ----
  
  (define_attr "laneselect" "yes,no" (const_string "no"))
  
+ ; Identify instructions that require a "Manually Inserted Wait State" if
+ ; their inputs are overwritten by subsequent instructions.
+ 
+ (define_attr "delayeduse" "yes,no" (const_string "no"))
+ 
  ;; }}}
  ;; {{{ Iterators useful across the wole machine description
  
***************
*** 293,298 ****
--- 299,306 ----
  (define_mode_iterator SISF [SI SF])
  (define_mode_iterator QIHI [QI HI])
  (define_mode_iterator DIDF [DI DF])
+ (define_mode_iterator FP [HF SF DF])
+ (define_mode_iterator FP_1REG [HF SF])
  
  ;; }}}
  ;; {{{ Attributes.
***************
*** 314,320 ****
     (smax "max%i")
     (umin "min%u")
     (umax "max%u")
!    (not "not%b")
     (popcount "bcnt_u32%b")])
  
  (define_code_attr bare_mnemonic
--- 322,328 ----
     (smax "max%i")
     (umin "min%u")
     (umax "max%u")
!    (not "not%B")
     (popcount "bcnt_u32%b")])
  
  (define_code_attr bare_mnemonic
***************
*** 326,332 ****
  
  (define_code_attr s_mnemonic
    [(not "not%b")
!    (popcount "bcnt1_i32%b")])
  
  (define_code_attr revmnemonic
    [(minus "subrev%i")
--- 334,342 ----
  
  (define_code_attr s_mnemonic
    [(not "not%b")
!    (popcount "bcnt1_i32%b")
!    (clz "flbit_i32%b")
!    (ctz "ff1_i32%b")])
  
  (define_code_attr revmnemonic
    [(minus "subrev%i")
***************
*** 351,357 ****
     (umin "umin")
     (umax "umax")
     (not "one_cmpl")
!    (popcount "popcount")])
  
  ;; }}}
  ;; {{{ Miscellaneous instructions
--- 361,371 ----
     (umin "umin")
     (umax "umax")
     (not "one_cmpl")
!    (popcount "popcount")
!    (clz "clz")
!    (ctz "ctz")
!    (sign_extend "extend")
!    (zero_extend "zero_extend")])
  
  ;; }}}
  ;; {{{ Miscellaneous instructions
***************
*** 384,389 ****
--- 398,428 ----
  	(match_operand:MOV_MODE 1 "general_operand"))]
    ""
    {
+     if (SUBREG_P (operands[1])
+ 	&& GET_MODE (operands[1]) == SImode
+ 	&& GET_MODE (SUBREG_REG (operands[1])) == BImode)
+     {
+       /* (reg:BI VCC) has nregs==2 to ensure it gets clobbered as a whole,
+ 	 but (subreg:SI (reg:BI VCC)) doesn't, which causes the LRA liveness
+ 	 checks to assert.  Transform this:
+ 	   (set (reg:SI) (subreg:SI (reg:BI)))
+ 	 to this:
+ 	   (set (subreg:BI (reg:SI)) (reg:BI))  */
+       operands[0] = gen_rtx_SUBREG (BImode, operands[0], 0);
+       operands[1] = SUBREG_REG (operands[1]);
+     }
+     if (SUBREG_P (operands[0])
+ 	&& GET_MODE (operands[0]) == SImode
+ 	&& GET_MODE (SUBREG_REG (operands[0])) == BImode)
+       {
+ 	/* Likewise, transform this:
+ 	     (set (subreg:SI (reg:BI)) (reg:SI))
+ 	   to this:
+ 	     (set (reg:BI) (subreg:BI (reg:SI))) */
+ 	operands[0] = SUBREG_REG (operands[0]);
+ 	operands[1] = gen_rtx_SUBREG (BImode, operands[1], 0);
+       }
+ 
      if (MEM_P (operands[0]))
        operands[1] = force_reg (<MODE>mode, operands[1]);
  
***************
*** 475,489 ****
      case 6:
        return "s_load_dword\t%0, %A1\;s_waitcnt\tlgkmcnt(0)";
      case 7:
!       return "s_store_dword\t%1, %A0\;s_waitcnt\texpcnt(0)";
      case 8:
        return "flat_load_dword\t%0, %A1%O1%g1\;s_waitcnt\t0";
      case 9:
!       return "flat_store_dword\t%A0, %1%O0%g0\;s_waitcnt\texpcnt(0)";
      case 10:
        return "global_load_dword\t%0, %A1%O1%g1\;s_waitcnt\tvmcnt(0)";
      case 11:
!       return "global_store_dword\t%A0, %1%O0%g0\;s_waitcnt\texpcnt(0)";
      default:
        gcc_unreachable ();
      }
--- 514,528 ----
      case 6:
        return "s_load_dword\t%0, %A1\;s_waitcnt\tlgkmcnt(0)";
      case 7:
!       return "s_store_dword\t%1, %A0";
      case 8:
        return "flat_load_dword\t%0, %A1%O1%g1\;s_waitcnt\t0";
      case 9:
!       return "flat_store_dword\t%A0, %1%O0%g0";
      case 10:
        return "global_load_dword\t%0, %A1%O1%g1\;s_waitcnt\tvmcnt(0)";
      case 11:
!       return "global_store_dword\t%A0, %1%O0%g0";
      default:
        gcc_unreachable ();
      }
***************
*** 506,525 ****
    s_movk_i32\t%0, %1
    s_mov_b32\t%0, %1
    s_buffer_load%s0\t%0, s[0:3], %1\;s_waitcnt\tlgkmcnt(0)
!   s_buffer_store%s1\t%1, s[0:3], %0\;s_waitcnt\texpcnt(0)
    s_load_dword\t%0, %A1\;s_waitcnt\tlgkmcnt(0)
!   s_store_dword\t%1, %A0\;s_waitcnt\texpcnt(0)
    v_mov_b32\t%0, %1
    v_readlane_b32\t%0, %1, 0
    v_writelane_b32\t%0, %1, 0
    flat_load_dword\t%0, %A1%O1%g1\;s_waitcnt\t0
!   flat_store_dword\t%A0, %1%O0%g0\;s_waitcnt\texpcnt(0)
    v_mov_b32\t%0, %1
!   ds_write_b32\t%A0, %1%O0\;s_waitcnt\texpcnt(0)
    ds_read_b32\t%0, %A1%O1\;s_waitcnt\tlgkmcnt(0)
    s_mov_b32\t%0, %1
    global_load_dword\t%0, %A1%O1%g1\;s_waitcnt\tvmcnt(0)
!   global_store_dword\t%A0, %1%O0%g0\;s_waitcnt\texpcnt(0)"
    [(set_attr "type" "sop1,sopk,sop1,smem,smem,smem,smem,vop1,vop3a,vop3a,flat,
  		     flat,vop1,ds,ds,sop1,flat,flat")
     (set_attr "exec" "*,*,*,*,*,*,*,*,none,none,*,*,*,*,*,*,*,*")
--- 545,564 ----
    s_movk_i32\t%0, %1
    s_mov_b32\t%0, %1
    s_buffer_load%s0\t%0, s[0:3], %1\;s_waitcnt\tlgkmcnt(0)
!   s_buffer_store%s1\t%1, s[0:3], %0
    s_load_dword\t%0, %A1\;s_waitcnt\tlgkmcnt(0)
!   s_store_dword\t%1, %A0
    v_mov_b32\t%0, %1
    v_readlane_b32\t%0, %1, 0
    v_writelane_b32\t%0, %1, 0
    flat_load_dword\t%0, %A1%O1%g1\;s_waitcnt\t0
!   flat_store_dword\t%A0, %1%O0%g0
    v_mov_b32\t%0, %1
!   ds_write_b32\t%A0, %1%O0
    ds_read_b32\t%0, %A1%O1\;s_waitcnt\tlgkmcnt(0)
    s_mov_b32\t%0, %1
    global_load_dword\t%0, %A1%O1%g1\;s_waitcnt\tvmcnt(0)
!   global_store_dword\t%A0, %1%O0%g0"
    [(set_attr "type" "sop1,sopk,sop1,smem,smem,smem,smem,vop1,vop3a,vop3a,flat,
  		     flat,vop1,ds,ds,sop1,flat,flat")
     (set_attr "exec" "*,*,*,*,*,*,*,*,none,none,*,*,*,*,*,*,*,*")
***************
*** 541,552 ****
    v_readlane_b32\t%0, %1, 0
    v_writelane_b32\t%0, %1, 0
    flat_load%o1\t%0, %A1%O1%g1\;s_waitcnt\t0
!   flat_store%s0\t%A0, %1%O0%g0\;s_waitcnt\texpcnt(0)
    v_mov_b32\t%0, %1
!   ds_write%b0\t%A0, %1%O0\;s_waitcnt\texpcnt(0)
    ds_read%u1\t%0, %A1%O1\;s_waitcnt\tlgkmcnt(0)
    global_load%o1\t%0, %A1%O1%g1\;s_waitcnt\tvmcnt(0)
!   global_store%s0\t%A0, %1%O0%g0\;s_waitcnt\texpcnt(0)"
    [(set_attr "type"
  	     "sop1,sopk,sop1,vop1,vop3a,vop3a,flat,flat,vop1,ds,ds,flat,flat")
     (set_attr "exec" "*,*,*,*,none,none,*,*,*,*,*,*,*")
--- 580,591 ----
    v_readlane_b32\t%0, %1, 0
    v_writelane_b32\t%0, %1, 0
    flat_load%o1\t%0, %A1%O1%g1\;s_waitcnt\t0
!   flat_store%s0\t%A0, %1%O0%g0
    v_mov_b32\t%0, %1
!   ds_write%b0\t%A0, %1%O0
    ds_read%u1\t%0, %A1%O1\;s_waitcnt\tlgkmcnt(0)
    global_load%o1\t%0, %A1%O1%g1\;s_waitcnt\tvmcnt(0)
!   global_store%s0\t%A0, %1%O0%g0"
    [(set_attr "type"
  	     "sop1,sopk,sop1,vop1,vop3a,vop3a,flat,flat,vop1,ds,ds,flat,flat")
     (set_attr "exec" "*,*,*,*,none,none,*,*,*,*,*,*,*")
***************
*** 564,584 ****
    s_mov_b64\t%0, %1
    s_mov_b64\t%0, %1
    #
!   s_store_dwordx2\t%1, %A0\;s_waitcnt\texpcnt(0)
    s_load_dwordx2\t%0, %A1\;s_waitcnt\tlgkmcnt(0)
    #
    #
    #
    #
    flat_load_dwordx2\t%0, %A1%O1%g1\;s_waitcnt\t0
!   flat_store_dwordx2\t%A0, %1%O0%g0\;s_waitcnt\texpcnt(0)
!   ds_write_b64\t%A0, %1%O0\;s_waitcnt\texpcnt(0)
    ds_read_b64\t%0, %A1%O1\;s_waitcnt\tlgkmcnt(0)
    global_load_dwordx2\t%0, %A1%O1%g1\;s_waitcnt\tvmcnt(0)
!   global_store_dwordx2\t%A0, %1%O0%g0\;s_waitcnt\texpcnt(0)"
!   "(reload_completed && !MEM_P (operands[0]) && !MEM_P (operands[1])
!     && !gcn_sgpr_move_p (operands[0], operands[1]))
!    || (GET_CODE (operands[1]) == CONST_INT && !gcn_constant64_p (operands[1]))"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2) (match_dup 3))]
    {
--- 603,625 ----
    s_mov_b64\t%0, %1
    s_mov_b64\t%0, %1
    #
!   s_store_dwordx2\t%1, %A0
    s_load_dwordx2\t%0, %A1\;s_waitcnt\tlgkmcnt(0)
    #
    #
    #
    #
    flat_load_dwordx2\t%0, %A1%O1%g1\;s_waitcnt\t0
!   flat_store_dwordx2\t%A0, %1%O0%g0
!   ds_write_b64\t%A0, %1%O0
    ds_read_b64\t%0, %A1%O1\;s_waitcnt\tlgkmcnt(0)
    global_load_dwordx2\t%0, %A1%O1%g1\;s_waitcnt\tvmcnt(0)
!   global_store_dwordx2\t%A0, %1%O0%g0"
!   "reload_completed
!    && ((!MEM_P (operands[0]) && !MEM_P (operands[1])
!         && !gcn_sgpr_move_p (operands[0], operands[1]))
!        || (GET_CODE (operands[1]) == CONST_INT
! 	   && !gcn_constant64_p (operands[1])))"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2) (match_dup 3))]
    {
***************
*** 588,594 ****
      rtx outhi = gen_highpart_mode (SImode, <MODE>mode, operands[0]);
  
      /* Ensure that overlapping registers aren't corrupted.  */
!     if (REGNO (outlo) == REGNO (inhi))
        {
  	operands[0] = outhi;
  	operands[1] = inhi;
--- 629,635 ----
      rtx outhi = gen_highpart_mode (SImode, <MODE>mode, operands[0]);
  
      /* Ensure that overlapping registers aren't corrupted.  */
!     if (reg_overlap_mentioned_p (outlo, inhi))
        {
  	operands[0] = outhi;
  	operands[1] = inhi;
***************
*** 617,632 ****
    ""
    "@
    #
!   s_store_dwordx4\t%1, %A0\;s_waitcnt\texpcnt(0)
    s_load_dwordx4\t%0, %A1\;s_waitcnt\tlgkmcnt(0)
!   flat_store_dwordx4\t%A0, %1%O0%g0\;s_waitcnt\texpcnt(0)
    flat_load_dwordx4\t%0, %A1%O1%g1\;s_waitcnt\t0
    #
    #
    #
!   global_store_dwordx4\t%A0, %1%O0%g0\;s_waitcnt\texpcnt(0)
    global_load_dwordx4\t%0, %A1%O1%g1\;s_waitcnt\tvmcnt(0)
!   ds_write_b128\t%A0, %1%O0\;s_waitcnt\texpcnt(0)
    ds_read_b128\t%0, %A1%O1\;s_waitcnt\tlgkmcnt(0)"
    "reload_completed
     && REG_P (operands[0])
--- 658,673 ----
    ""
    "@
    #
!   s_store_dwordx4\t%1, %A0
    s_load_dwordx4\t%0, %A1\;s_waitcnt\tlgkmcnt(0)
!   flat_store_dwordx4\t%A0, %1%O0%g0
    flat_load_dwordx4\t%0, %A1%O1%g1\;s_waitcnt\t0
    #
    #
    #
!   global_store_dwordx4\t%A0, %1%O0%g0
    global_load_dwordx4\t%0, %A1%O1%g1\;s_waitcnt\tvmcnt(0)
!   ds_write_b128\t%A0, %1%O0
    ds_read_b128\t%0, %A1%O1\;s_waitcnt\tlgkmcnt(0)"
    "reload_completed
     && REG_P (operands[0])
***************
*** 647,652 ****
--- 688,694 ----
    }
    [(set_attr "type" "mult,smem,smem,flat,flat,vmult,vmult,vmult,flat,flat,\
  		     ds,ds")
+    (set_attr "delayeduse" "*,*,yes,*,*,*,*,*,yes,*,*,*")
     (set_attr "length" "*,12,12,12,12,*,*,*,12,12,12,12")])
  
  ;; }}}
***************
*** 1053,1074 ****
  ; through some RTL optimisation passes, and means the CC reg we set isn't
  ; dependent on the constraint alternative (which doesn't seem to work well).
  
- ; There's an early clobber in the case where "v[0:1]=v[1:2]+?" but
- ; "v[0:1]=v[0:1]+?" is fine (as is "v[1:2]=v[0:1]+?", but that's trickier).
- 
  ; If v_addc_u32 is used to add with carry, a 32-bit literal constant cannot be
  ; used as an operand due to the read of VCC, so we restrict constants to the
  ; inlinable range for that alternative.
  
  (define_insn_and_split "adddi3"
!   [(set (match_operand:DI 0 "register_operand"		
! 					      "=&Sg,&Sg,&Sg,&Sg,&v,&v,&v,&v")
! 	(plus:DI (match_operand:DI 1 "register_operand" 
! 					      "  Sg,  0,  0, Sg, v, 0, 0, v")
! 		 (match_operand:DI 2 "nonmemory_operand"
! 					      "   0,SgB,  0,SgB, 0,vA, 0,vA")))
!    (clobber (match_scratch:BI 3		      "= cs, cs, cs, cs, X, X, X, X"))
!    (clobber (match_scratch:DI 4		      "=  X,  X,  X,  X,cV,cV,cV,cV"))]
    ""
    "#"
    "&& reload_completed"
--- 1095,1110 ----
  ; through some RTL optimisation passes, and means the CC reg we set isn't
  ; dependent on the constraint alternative (which doesn't seem to work well).
  
  ; If v_addc_u32 is used to add with carry, a 32-bit literal constant cannot be
  ; used as an operand due to the read of VCC, so we restrict constants to the
  ; inlinable range for that alternative.
  
  (define_insn_and_split "adddi3"
!   [(set (match_operand:DI 0 "register_operand"		 "=Sg, v")
! 	(plus:DI (match_operand:DI 1 "register_operand"  " Sg, v")
! 		 (match_operand:DI 2 "nonmemory_operand" "SgB,vA")))
!    (clobber (match_scratch:BI 3				 "=cs, X"))
!    (clobber (match_scratch:DI 4				 "= X,cV"))]
    ""
    "#"
    "&& reload_completed"
***************
*** 1097,1103 ****
  		  cc));
      DONE;
    }
!   [(set_attr "type" "mult,mult,mult,mult,vmult,vmult,vmult,vmult")
     (set_attr "length" "8")])
  
  (define_expand "adddi3_scc"
--- 1133,1139 ----
  		  cc));
      DONE;
    }
!   [(set_attr "type" "mult,vmult")
     (set_attr "length" "8")])
  
  (define_expand "adddi3_scc"
***************
*** 1184,1194 ****
  ; for this, so we use a custom VOP3 add with CC_SAVE_REG as a temp.
  ; Note that it is not safe to save/clobber/restore SCC because doing so will
  ; break data-flow analysis, so this must use vector registers.
  
  (define_insn "addptrdi3"
!   [(set (match_operand:DI 0 "register_operand"		 "= &v")
! 	(plus:DI (match_operand:DI 1 "register_operand"	 "  v0")
! 		 (match_operand:DI 2 "nonmemory_operand" "vDA0")))]
    ""
    {
      rtx new_operands[4] = { operands[0], operands[1], operands[2],
--- 1220,1233 ----
  ; for this, so we use a custom VOP3 add with CC_SAVE_REG as a temp.
  ; Note that it is not safe to save/clobber/restore SCC because doing so will
  ; break data-flow analysis, so this must use vector registers.
+ ;
+ ; The "v0" should be just "v", but somehow the "0" helps LRA not loop forever
+ ; on testcase pr54713-2.c with -O0. It's only an optimization hint anyway.
  
  (define_insn "addptrdi3"
!   [(set (match_operand:DI 0 "register_operand"		 "= v")
! 	(plus:DI (match_operand:DI 1 "register_operand"	 " v0")
! 		 (match_operand:DI 2 "nonmemory_operand" "vDA")))]
    ""
    {
      rtx new_operands[4] = { operands[0], operands[1], operands[2],
***************
*** 1383,1388 ****
--- 1422,1449 ----
    [(set_attr "type" "sop1,vop1")
     (set_attr "length" "8")])
  
+ (define_code_iterator countzeros [clz ctz])
+ 
+ (define_insn "<expander>si2"
+   [(set (match_operand:SI 0 "register_operand"  "=Sg,Sg")
+         (countzeros:SI
+ 	  (match_operand:SI 1 "gcn_alu_operand" "SgA, B")))]
+   ""
+   "s_<s_mnemonic>1\t%0, %1"
+   [(set_attr "type" "sop1")
+    (set_attr "length" "4,8")])
+ 
+ ; The truncate ensures that a constant passed to operand 1 is treated as DImode
+ (define_insn "<expander>di2"
+   [(set (match_operand:SI 0 "register_operand"    "=Sg,Sg")
+ 	(truncate:SI
+ 	  (countzeros:DI
+ 	    (match_operand:DI 1 "gcn_alu_operand" "SgA, B"))))]
+   ""
+   "s_<s_mnemonic>1\t%0, %1"
+   [(set_attr "type" "sop1")
+    (set_attr "length" "4,8")])
+ 
  ;; }}}
  ;; {{{ ALU: generic 32-bit binop
  
***************
*** 1436,1450 ****
  (define_code_iterator vec_and_scalar64_com [and ior xor])
  
  (define_insn_and_split "<expander>di3"
!    [(set (match_operand:DI 0 "register_operand"  "= Sg,   &v,   &v")
  	 (vec_and_scalar64_com:DI
! 	  (match_operand:DI 1 "gcn_alu_operand"  "%SgA,vSvDB,vSvDB")
! 	   (match_operand:DI 2 "gcn_alu_operand" " SgC,    v,    0")))
!    (clobber (match_scratch:BI 3			 "= cs,    X,    X"))]
    ""
    "@
     s_<mnemonic>0\t%0, %1, %2
-    #
     #"
    "reload_completed && gcn_vgpr_register_operand (operands[0], DImode)"
    [(parallel [(set (match_dup 4)
--- 1497,1510 ----
  (define_code_iterator vec_and_scalar64_com [and ior xor])
  
  (define_insn_and_split "<expander>di3"
!    [(set (match_operand:DI 0 "register_operand"  "= Sg,    v")
  	 (vec_and_scalar64_com:DI
! 	  (match_operand:DI 1 "gcn_alu_operand"  "%SgA,vSvDB")
! 	   (match_operand:DI 2 "gcn_alu_operand" " SgC,    v")))
!    (clobber (match_scratch:BI 3			 "= cs,    X"))]
    ""
    "@
     s_<mnemonic>0\t%0, %1, %2
     #"
    "reload_completed && gcn_vgpr_register_operand (operands[0], DImode)"
    [(parallel [(set (match_dup 4)
***************
*** 1461,1467 ****
      operands[8] = gcn_operand_part (DImode, operands[1], 1);
      operands[9] = gcn_operand_part (DImode, operands[2], 1);
    }
!   [(set_attr "type" "sop2,vop2,vop2")
     (set_attr "length" "8")])
  
  (define_insn "<expander>di3"
--- 1521,1527 ----
      operands[8] = gcn_operand_part (DImode, operands[1], 1);
      operands[9] = gcn_operand_part (DImode, operands[2], 1);
    }
!   [(set_attr "type" "sop2,vop2")
     (set_attr "length" "8")])
  
  (define_insn "<expander>di3"
***************
*** 1612,1618 ****
     global_atomic_cmpswap<X>\t%0, %A1, %2%O1 glc\;s_waitcnt\tvmcnt(0)"
    [(set_attr "type" "smem,flat,flat")
     (set_attr "length" "12")
!    (set_attr "gcn_version" "gcn5,*,gcn5")])
  
  (define_insn "sync_compare_and_swap<mode>_lds_insn"
    [(set (match_operand:SIDI 0 "register_operand"    "= v")
--- 1672,1679 ----
     global_atomic_cmpswap<X>\t%0, %A1, %2%O1 glc\;s_waitcnt\tvmcnt(0)"
    [(set_attr "type" "smem,flat,flat")
     (set_attr "length" "12")
!    (set_attr "gcn_version" "gcn5,*,gcn5")
!    (set_attr "delayeduse" "*,yes,yes")])
  
  (define_insn "sync_compare_and_swap<mode>_lds_insn"
    [(set (match_operand:SIDI 0 "register_operand"    "= v")
***************
*** 1715,1728 ****
  	switch (which_alternative)
  	  {
  	  case 0:
! 	    return "s_dcache_wb_vol\;s_store%o1\t%1, %A0 glc\;"
! 		   "s_waitcnt\texpcnt(0)";
  	  case 1:
! 	    return "buffer_wbinvl1_vol\;flat_store%o1\t%A0, %1%O0 glc\;"
! 		   "s_waitcnt\texpcnt(0)";
  	  case 2:
! 	    return "buffer_wbinvl1_vol\;global_store%o1\t%A0, %1%O0 glc\;"
! 	           "s_waitcnt\texpcnt(0)";
  	  }
  	break;
        case MEMMODEL_ACQ_REL:
--- 1776,1786 ----
  	switch (which_alternative)
  	  {
  	  case 0:
! 	    return "s_dcache_wb_vol\;s_store%o1\t%1, %A0 glc";
  	  case 1:
! 	    return "buffer_wbinvl1_vol\;flat_store%o1\t%A0, %1%O0 glc";
  	  case 2:
! 	    return "buffer_wbinvl1_vol\;global_store%o1\t%A0, %1%O0 glc";
  	  }
  	break;
        case MEMMODEL_ACQ_REL:
***************
*** 1732,1744 ****
  	  {
  	  case 0:
  	    return "s_dcache_wb_vol\;s_store%o1\t%1, %A0 glc\;"
! 		   "s_waitcnt\texpcnt(0)\;s_dcache_inv_vol";
  	  case 1:
  	    return "buffer_wbinvl1_vol\;flat_store%o1\t%A0, %1%O0 glc\;"
! 		   "s_waitcnt\texpcnt(0)\;buffer_wbinvl1_vol";
  	  case 2:
  	    return "buffer_wbinvl1_vol\;global_store%o1\t%A0, %1%O0 glc\;"
! 		   "s_waitcnt\texpcnt(0)\;buffer_wbinvl1_vol";
  	  }
  	break;
        }
--- 1790,1802 ----
  	  {
  	  case 0:
  	    return "s_dcache_wb_vol\;s_store%o1\t%1, %A0 glc\;"
! 		   "s_waitcnt\tlgkmcnt(0)\;s_dcache_inv_vol";
  	  case 1:
  	    return "buffer_wbinvl1_vol\;flat_store%o1\t%A0, %1%O0 glc\;"
! 		   "s_waitcnt\t0\;buffer_wbinvl1_vol";
  	  case 2:
  	    return "buffer_wbinvl1_vol\;global_store%o1\t%A0, %1%O0 glc\;"
! 		   "s_waitcnt\tvmcnt(0)\;buffer_wbinvl1_vol";
  	  }
  	break;
        }
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/gcn.opt gcc-10.1.0/gcc/config/gcn/gcn.opt
*** gcc-9.3.0/gcc/config/gcn/gcn.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/gcn.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the GCN port of the compiler.
  
! ; Copyright (C) 2016-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for the GCN port of the compiler.
  
! ; Copyright (C) 2016-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
*************** Name(gpu_type) Type(enum processor_type)
*** 26,45 ****
  GCN GPU type to use:
  
  EnumValue
- Enum(gpu_type) String(carrizo) Value(PROCESSOR_CARRIZO)
- 
- EnumValue
  Enum(gpu_type) String(fiji) Value(PROCESSOR_FIJI)
  
  EnumValue
  Enum(gpu_type) String(gfx900) Value(PROCESSOR_VEGA)
  
  march=
! Target RejectNegative Joined ToLower Enum(gpu_type) Var(gcn_arch) Init(PROCESSOR_CARRIZO)
  Specify the name of the target GPU.
  
  mtune=
! Target RejectNegative Joined ToLower Enum(gpu_type) Var(gcn_tune) Init(PROCESSOR_CARRIZO)
  Specify the name of the target GPU.
  
  m32
--- 26,45 ----
  GCN GPU type to use:
  
  EnumValue
  Enum(gpu_type) String(fiji) Value(PROCESSOR_FIJI)
  
  EnumValue
  Enum(gpu_type) String(gfx900) Value(PROCESSOR_VEGA)
  
+ EnumValue
+ Enum(gpu_type) String(gfx906) Value(PROCESSOR_VEGA)
+ 
  march=
! Target RejectNegative Joined ToLower Enum(gpu_type) Var(gcn_arch) Init(PROCESSOR_FIJI)
  Specify the name of the target GPU.
  
  mtune=
! Target RejectNegative Joined ToLower Enum(gpu_type) Var(gcn_tune) Init(PROCESSOR_FIJI)
  Specify the name of the target GPU.
  
  m32
*************** Target Report RejectNegative Var(flag_by
*** 62,68 ****
  bool flag_worker_partitioning = false
  
  macc-experimental-workers
! Target Report Var(flag_worker_partitioning) Init(1)
  
  int stack_size_opt = -1
  
--- 62,68 ----
  bool flag_worker_partitioning = false
  
  macc-experimental-workers
! Target Report Var(flag_worker_partitioning) Init(0)
  
  int stack_size_opt = -1
  
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/mkoffload.c gcc-10.1.0/gcc/config/gcn/mkoffload.c
*** gcc-9.3.0/gcc/config/gcn/mkoffload.c	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/gcn/mkoffload.c	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,738 ----
+ /* Offload image generation tool for AMD GCN.
+ 
+    Copyright (C) 2014-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published
+    by the Free Software Foundation; either version 3, or (at your
+    option) any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ /* Munges GCN assembly into a C source file defining the GCN code as a
+    string.
+ 
+    This is not a complete assembler.  We presume the source is well
+    formed from the compiler and can die horribly if it is not.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "obstack.h"
+ #include "diagnostic.h"
+ #include "intl.h"
+ #include <libgen.h>
+ #include "collect-utils.h"
+ #include "gomp-constants.h"
+ 
+ const char tool_name[] = "gcn mkoffload";
+ 
+ /* Files to unlink.  */
+ static const char *gcn_s1_name;
+ static const char *gcn_s2_name;
+ static const char *gcn_o_name;
+ static const char *gcn_cfile_name;
+ 
+ enum offload_abi offload_abi = OFFLOAD_ABI_UNSET;
+ 
+ /* Delete tempfiles.  */
+ 
+ void
+ tool_cleanup (bool from_signal ATTRIBUTE_UNUSED)
+ {
+   if (gcn_cfile_name)
+     maybe_unlink (gcn_cfile_name);
+   if (gcn_s1_name)
+     maybe_unlink (gcn_s1_name);
+   if (gcn_s2_name)
+     maybe_unlink (gcn_s2_name);
+   if (gcn_o_name)
+     maybe_unlink (gcn_o_name);
+ }
+ 
+ static void
+ mkoffload_cleanup (void)
+ {
+   tool_cleanup (false);
+ }
+ 
+ /* Unlink FILE unless requested otherwise.  */
+ 
+ void
+ maybe_unlink (const char *file)
+ {
+   if (!save_temps)
+     {
+       if (unlink_if_ordinary (file) && errno != ENOENT)
+ 	fatal_error (input_location, "deleting file %s: %m", file);
+     }
+   else if (verbose)
+     fprintf (stderr, "[Leaving %s]\n", file);
+ }
+ 
+ /* Add or change the value of an environment variable, outputting the
+    change to standard error if in verbose mode.  */
+ 
+ static void
+ xputenv (const char *string)
+ {
+   if (verbose)
+     fprintf (stderr, "%s\n", string);
+   putenv (CONST_CAST (char *, string));
+ }
+ 
+ /* Read the whole input file.  It will be NUL terminated (but
+    remember, there could be a NUL in the file itself.  */
+ 
+ static const char *
+ read_file (FILE *stream, size_t *plen)
+ {
+   size_t alloc = 16384;
+   size_t base = 0;
+   char *buffer;
+ 
+   if (!fseek (stream, 0, SEEK_END))
+     {
+       /* Get the file size.  */
+       long s = ftell (stream);
+       if (s >= 0)
+ 	alloc = s + 100;
+       fseek (stream, 0, SEEK_SET);
+     }
+   buffer = XNEWVEC (char, alloc);
+ 
+   for (;;)
+     {
+       size_t n = fread (buffer + base, 1, alloc - base - 1, stream);
+ 
+       if (!n)
+ 	break;
+       base += n;
+       if (base + 1 == alloc)
+ 	{
+ 	  alloc *= 2;
+ 	  buffer = XRESIZEVEC (char, buffer, alloc);
+ 	}
+     }
+   buffer[base] = 0;
+   *plen = base;
+   return buffer;
+ }
+ 
+ /* Parse STR, saving found tokens into PVALUES and return their number.
+    Tokens are assumed to be delimited by ':'.  */
+ 
+ static unsigned
+ parse_env_var (const char *str, char ***pvalues)
+ {
+   const char *curval, *nextval;
+   char **values;
+   unsigned num = 1, i;
+ 
+   curval = strchr (str, ':');
+   while (curval)
+     {
+       num++;
+       curval = strchr (curval + 1, ':');
+     }
+ 
+   values = (char **) xmalloc (num * sizeof (char *));
+   curval = str;
+   nextval = strchr (curval, ':');
+   if (nextval == NULL)
+     nextval = strchr (curval, '\0');
+ 
+   for (i = 0; i < num; i++)
+     {
+       int l = nextval - curval;
+       values[i] = (char *) xmalloc (l + 1);
+       memcpy (values[i], curval, l);
+       values[i][l] = 0;
+       curval = nextval + 1;
+       nextval = strchr (curval, ':');
+       if (nextval == NULL)
+ 	nextval = strchr (curval, '\0');
+     }
+   *pvalues = values;
+   return num;
+ }
+ 
+ /* Auxiliary function that frees elements of PTR and PTR itself.
+    N is number of elements to be freed.  If PTR is NULL, nothing is freed.
+    If an element is NULL, subsequent elements are not freed.  */
+ 
+ static void
+ free_array_of_ptrs (void **ptr, unsigned n)
+ {
+   unsigned i;
+   if (!ptr)
+     return;
+   for (i = 0; i < n; i++)
+     {
+       if (!ptr[i])
+ 	break;
+       free (ptr[i]);
+     }
+   free (ptr);
+   return;
+ }
+ 
+ /* Check whether NAME can be accessed in MODE.  This is like access,
+    except that it never considers directories to be executable.  */
+ 
+ static int
+ access_check (const char *name, int mode)
+ {
+   if (mode == X_OK)
+     {
+       struct stat st;
+ 
+       if (stat (name, &st) < 0 || S_ISDIR (st.st_mode))
+ 	return -1;
+     }
+ 
+   return access (name, mode);
+ }
+ 
+ /* Parse an input assembler file, extract the offload tables etc.,
+    and output (1) the assembler code, minus the tables (which can contain
+    problematic relocations), and (2) a C file with the offload tables
+    encoded as structured data.  */
+ 
+ static void
+ process_asm (FILE *in, FILE *out, FILE *cfile)
+ {
+   int fn_count = 0, var_count = 0, dims_count = 0, regcount_count = 0;
+   struct obstack fns_os, vars_os, varsizes_os, dims_os, regcounts_os;
+   obstack_init (&fns_os);
+   obstack_init (&vars_os);
+   obstack_init (&varsizes_os);
+   obstack_init (&dims_os);
+   obstack_init (&regcounts_os);
+ 
+   struct oaccdims
+   {
+     int d[3];
+     char *name;
+   } dim;
+ 
+   struct regcount
+   {
+     int sgpr_count;
+     int vgpr_count;
+     char *kernel_name;
+   } regcount;
+ 
+   /* Always add _init_array and _fini_array as kernels.  */
+   obstack_ptr_grow (&fns_os, xstrdup ("_init_array"));
+   obstack_ptr_grow (&fns_os, xstrdup ("_fini_array"));
+   fn_count += 2;
+ 
+   char buf[1000];
+   enum { IN_CODE, IN_AMD_KERNEL_CODE_T, IN_VARS, IN_FUNCS } state = IN_CODE;
+   while (fgets (buf, sizeof (buf), in))
+     {
+       switch (state)
+ 	{
+ 	case IN_CODE:
+ 	  {
+ 	    if (sscanf (buf, " ;; OPENACC-DIMS: %d, %d, %d : %ms\n",
+ 			&dim.d[0], &dim.d[1], &dim.d[2], &dim.name) == 4)
+ 	      {
+ 		obstack_grow (&dims_os, &dim, sizeof (dim));
+ 		dims_count++;
+ 	      }
+ 	    else if (sscanf (buf, " .amdgpu_hsa_kernel %ms\n",
+ 			     &regcount.kernel_name) == 1)
+ 	      break;
+ 
+ 	    break;
+ 	  }
+ 	case IN_AMD_KERNEL_CODE_T:
+ 	  {
+ 	    gcc_assert (regcount.kernel_name);
+ 	    if (sscanf (buf, " wavefront_sgpr_count = %d\n",
+ 			&regcount.sgpr_count) == 1)
+ 	      break;
+ 	    else if (sscanf (buf, " workitem_vgpr_count = %d\n",
+ 			     &regcount.vgpr_count) == 1)
+ 	      break;
+ 
+ 	    break;
+ 	  }
+ 	case IN_VARS:
+ 	  {
+ 	    char *varname;
+ 	    unsigned varsize;
+ 	    if (sscanf (buf, " .8byte %ms\n", &varname))
+ 	      {
+ 		obstack_ptr_grow (&vars_os, varname);
+ 		fgets (buf, sizeof (buf), in);
+ 		if (!sscanf (buf, " .8byte %u\n", &varsize))
+ 		  abort ();
+ 		obstack_int_grow (&varsizes_os, varsize);
+ 		var_count++;
+ 
+ 		/* The HSA Runtime cannot locate the symbol if it is not
+ 		   exported from the kernel.  */
+ 		fprintf (out, "\t.global %s\n", varname);
+ 	      }
+ 	    break;
+ 	  }
+ 	case IN_FUNCS:
+ 	  {
+ 	    char *funcname;
+ 	    if (sscanf (buf, "\t.8byte\t%ms\n", &funcname))
+ 	      {
+ 		obstack_ptr_grow (&fns_os, funcname);
+ 		fn_count++;
+ 		continue;
+ 	      }
+ 	    break;
+ 	  }
+ 	}
+ 
+       char dummy;
+       if (sscanf (buf, " .section .gnu.offload_vars%c", &dummy) > 0)
+ 	state = IN_VARS;
+       else if (sscanf (buf, " .section .gnu.offload_funcs%c", &dummy) > 0)
+ 	state = IN_FUNCS;
+       else if (sscanf (buf, " .amd_kernel_code_%c", &dummy) > 0)
+ 	{
+ 	  state = IN_AMD_KERNEL_CODE_T;
+ 	  regcount.sgpr_count = regcount.vgpr_count = -1;
+ 	}
+       else if (sscanf (buf, " .section %c", &dummy) > 0
+ 	       || sscanf (buf, " .text%c", &dummy) > 0
+ 	       || sscanf (buf, " .bss%c", &dummy) > 0
+ 	       || sscanf (buf, " .data%c", &dummy) > 0
+ 	       || sscanf (buf, " .ident %c", &dummy) > 0)
+ 	state = IN_CODE;
+       else if (sscanf (buf, " .end_amd_kernel_code_%c", &dummy) > 0)
+ 	{
+ 	  state = IN_CODE;
+ 	  gcc_assert (regcount.kernel_name != NULL
+ 		      && regcount.sgpr_count >= 0
+ 		      && regcount.vgpr_count >= 0);
+ 	  obstack_grow (&regcounts_os, &regcount, sizeof (regcount));
+ 	  regcount_count++;
+ 	  regcount.kernel_name = NULL;
+ 	  regcount.sgpr_count = regcount.vgpr_count = -1;
+ 	}
+ 
+       if (state == IN_CODE || state == IN_AMD_KERNEL_CODE_T)
+ 	fputs (buf, out);
+     }
+ 
+   char **fns = XOBFINISH (&fns_os, char **);
+   struct oaccdims *dims = XOBFINISH (&dims_os, struct oaccdims *);
+   struct regcount *regcounts = XOBFINISH (&regcounts_os, struct regcount *);
+ 
+   fprintf (cfile, "#include <stdlib.h>\n");
+   fprintf (cfile, "#include <stdbool.h>\n\n");
+ 
+   char **vars = XOBFINISH (&vars_os, char **);
+   unsigned *varsizes = XOBFINISH (&varsizes_os, unsigned *);
+   fprintf (cfile,
+ 	   "static const struct global_var_info {\n"
+ 	   "  const char *name;\n"
+ 	   "  void *address;\n"
+ 	   "} vars[] = {\n");
+   int i;
+   for (i = 0; i < var_count; ++i)
+     {
+       const char *sep = i < var_count - 1 ? "," : " ";
+       fprintf (cfile, "  { \"%s\", NULL }%s /* size: %u */\n", vars[i], sep,
+ 	       varsizes[i]);
+     }
+   fprintf (cfile, "};\n\n");
+ 
+   obstack_free (&vars_os, NULL);
+   obstack_free (&varsizes_os, NULL);
+ 
+   /* Dump out function idents.  */
+   fprintf (cfile, "static const struct hsa_kernel_description {\n"
+ 	   "  const char *name;\n"
+ 	   "  int oacc_dims[3];\n"
+ 	   "  int sgpr_count;\n"
+ 	   "  int vgpr_count;\n"
+ 	   "} gcn_kernels[] = {\n  ");
+   dim.d[0] = dim.d[1] = dim.d[2] = 0;
+   const char *comma;
+   for (comma = "", i = 0; i < fn_count; comma = ",\n  ", i++)
+     {
+       /* Find if we recorded dimensions for this function.  */
+       int *d = dim.d;		/* Previously zeroed.  */
+       int sgpr_count = 0;
+       int vgpr_count = 0;
+       for (int j = 0; j < dims_count; j++)
+ 	if (strcmp (fns[i], dims[j].name) == 0)
+ 	  {
+ 	    d = dims[j].d;
+ 	    break;
+ 	  }
+       for (int j = 0; j < regcount_count; j++)
+ 	if (strcmp (fns[i], regcounts[j].kernel_name) == 0)
+ 	  {
+ 	    sgpr_count = regcounts[j].sgpr_count;
+ 	    vgpr_count = regcounts[j].vgpr_count;
+ 	    break;
+ 	  }
+ 
+       fprintf (cfile, "%s{\"%s\", {%d, %d, %d}, %d, %d}", comma,
+ 	       fns[i], d[0], d[1], d[2], sgpr_count, vgpr_count);
+ 
+       free (fns[i]);
+     }
+   fprintf (cfile, "\n};\n\n");
+ 
+   obstack_free (&fns_os, NULL);
+   for (i = 0; i < dims_count; i++)
+     free (dims[i].name);
+   for (i = 0; i < regcount_count; i++)
+     free (regcounts[i].kernel_name);
+   obstack_free (&dims_os, NULL);
+   obstack_free (&regcounts_os, NULL);
+ }
+ 
+ /* Embed an object file into a C source file.  */
+ 
+ static void
+ process_obj (FILE *in, FILE *cfile)
+ {
+   size_t len = 0;
+   const char *input = read_file (in, &len);
+ 
+   /* Dump out an array containing the binary.
+      FIXME: do this with objcopy.  */
+   fprintf (cfile, "static unsigned char gcn_code[] = {");
+   for (size_t i = 0; i < len; i += 17)
+     {
+       fprintf (cfile, "\n\t");
+       for (size_t j = i; j < i + 17 && j < len; j++)
+ 	fprintf (cfile, "%3u,", (unsigned char) input[j]);
+     }
+   fprintf (cfile, "\n};\n\n");
+ 
+   fprintf (cfile,
+ 	   "static const struct gcn_image {\n"
+ 	   "  size_t size;\n"
+ 	   "  void *image;\n"
+ 	   "} gcn_image = {\n"
+ 	   "  %zu,\n"
+ 	   "  gcn_code\n"
+ 	   "};\n\n",
+ 	   len);
+ 
+   fprintf (cfile,
+ 	   "static const struct gcn_image_desc {\n"
+ 	   "  const struct gcn_image *gcn_image;\n"
+ 	   "  unsigned kernel_count;\n"
+ 	   "  const struct hsa_kernel_description *kernel_infos;\n"
+ 	   "  unsigned global_variable_count;\n"
+ 	   "  const struct global_var_info *global_variables;\n"
+ 	   "} target_data = {\n"
+ 	   "  &gcn_image,\n"
+ 	   "  sizeof (gcn_kernels) / sizeof (gcn_kernels[0]),\n"
+ 	   "  gcn_kernels,\n"
+ 	   "  sizeof (vars) / sizeof (vars[0]),\n"
+ 	   "  vars\n"
+ 	   "};\n\n");
+ 
+   fprintf (cfile,
+ 	   "#ifdef __cplusplus\n"
+ 	   "extern \"C\" {\n"
+ 	   "#endif\n"
+ 	   "extern void GOMP_offload_register_ver"
+ 	   " (unsigned, const void *, int, const void *);\n"
+ 	   "extern void GOMP_offload_unregister_ver"
+ 	   " (unsigned, const void *, int, const void *);\n"
+ 	   "#ifdef __cplusplus\n"
+ 	   "}\n"
+ 	   "#endif\n\n");
+ 
+   fprintf (cfile, "extern const void *const __OFFLOAD_TABLE__[];\n\n");
+ 
+   fprintf (cfile, "static __attribute__((constructor)) void init (void)\n"
+ 	   "{\n"
+ 	   "  GOMP_offload_register_ver (%#x, __OFFLOAD_TABLE__,"
+ 	   " %d/*GCN*/, &target_data);\n"
+ 	   "};\n",
+ 	   GOMP_VERSION_PACK (GOMP_VERSION, GOMP_VERSION_GCN),
+ 	   GOMP_DEVICE_GCN);
+ 
+   fprintf (cfile, "static __attribute__((destructor)) void fini (void)\n"
+ 	   "{\n"
+ 	   "  GOMP_offload_unregister_ver (%#x, __OFFLOAD_TABLE__,"
+ 	   " %d/*GCN*/, &target_data);\n"
+ 	   "};\n",
+ 	   GOMP_VERSION_PACK (GOMP_VERSION, GOMP_VERSION_GCN),
+ 	   GOMP_DEVICE_GCN);
+ }
+ 
+ /* Compile a C file using the host compiler.  */
+ 
+ static void
+ compile_native (const char *infile, const char *outfile, const char *compiler)
+ {
+   const char *collect_gcc_options = getenv ("COLLECT_GCC_OPTIONS");
+   if (!collect_gcc_options)
+     fatal_error (input_location,
+ 		 "environment variable COLLECT_GCC_OPTIONS must be set");
+ 
+   struct obstack argv_obstack;
+   obstack_init (&argv_obstack);
+   obstack_ptr_grow (&argv_obstack, compiler);
+   if (save_temps)
+     obstack_ptr_grow (&argv_obstack, "-save-temps");
+   if (verbose)
+     obstack_ptr_grow (&argv_obstack, "-v");
+   switch (offload_abi)
+     {
+     case OFFLOAD_ABI_LP64:
+       obstack_ptr_grow (&argv_obstack, "-m64");
+       break;
+     case OFFLOAD_ABI_ILP32:
+       obstack_ptr_grow (&argv_obstack, "-m32");
+       break;
+     default:
+       gcc_unreachable ();
+     }
+   obstack_ptr_grow (&argv_obstack, infile);
+   obstack_ptr_grow (&argv_obstack, "-c");
+   obstack_ptr_grow (&argv_obstack, "-o");
+   obstack_ptr_grow (&argv_obstack, outfile);
+   obstack_ptr_grow (&argv_obstack, NULL);
+ 
+   const char **new_argv = XOBFINISH (&argv_obstack, const char **);
+   fork_execute (new_argv[0], CONST_CAST (char **, new_argv), true);
+   obstack_free (&argv_obstack, NULL);
+ }
+ 
+ int
+ main (int argc, char **argv)
+ {
+   FILE *in = stdin;
+   FILE *out = stdout;
+   FILE *cfile = stdout;
+   const char *outname = 0, *offloadsrc = 0;
+ 
+   progname = "mkoffload";
+   diagnostic_initialize (global_dc, 0);
+ 
+   if (atexit (mkoffload_cleanup) != 0)
+     fatal_error (input_location, "atexit failed");
+ 
+   char *collect_gcc = getenv ("COLLECT_GCC");
+   if (collect_gcc == NULL)
+     fatal_error (input_location, "COLLECT_GCC must be set.");
+   const char *gcc_path = dirname (ASTRDUP (collect_gcc));
+   const char *gcc_exec = basename (ASTRDUP (collect_gcc));
+ 
+   size_t len = (strlen (gcc_path) + 1 + strlen (GCC_INSTALL_NAME) + 1);
+   char *driver = XALLOCAVEC (char, len);
+ 
+   if (strcmp (gcc_exec, collect_gcc) == 0)
+     /* collect_gcc has no path, so it was found in PATH.  Make sure we also
+        find accel-gcc in PATH.  */
+     gcc_path = NULL;
+ 
+   int driver_used = 0;
+   if (gcc_path != NULL)
+     driver_used = sprintf (driver, "%s/", gcc_path);
+   sprintf (driver + driver_used, "%s", GCC_INSTALL_NAME);
+ 
+   bool found = false;
+   if (gcc_path == NULL)
+     found = true;
+   else if (access_check (driver, X_OK) == 0)
+     found = true;
+   else
+     {
+       /* Don't use alloca pointer with XRESIZEVEC.  */
+       driver = NULL;
+       /* Look in all COMPILER_PATHs for GCC_INSTALL_NAME.  */
+       char **paths = NULL;
+       unsigned n_paths;
+       n_paths = parse_env_var (getenv ("COMPILER_PATH"), &paths);
+       for (unsigned i = 0; i < n_paths; i++)
+ 	{
+ 	  len = strlen (paths[i]) + 1 + strlen (GCC_INSTALL_NAME) + 1;
+ 	  driver = XRESIZEVEC (char, driver, len);
+ 	  sprintf (driver, "%s/%s", paths[i], GCC_INSTALL_NAME);
+ 	  if (access_check (driver, X_OK) == 0)
+ 	    {
+ 	      found = true;
+ 	      break;
+ 	    }
+ 	}
+       free_array_of_ptrs ((void **) paths, n_paths);
+     }
+ 
+   if (!found)
+     fatal_error (input_location,
+ 		 "offload compiler %s not found", GCC_INSTALL_NAME);
+ 
+   /* We may be called with all the arguments stored in some file and
+      passed with @file.  Expand them into argv before processing.  */
+   expandargv (&argc, &argv);
+ 
+   /* Scan the argument vector.  */
+   bool fopenmp = false;
+   bool fopenacc = false;
+   for (int i = 1; i < argc; i++)
+     {
+ #define STR "-foffload-abi="
+       if (strncmp (argv[i], STR, strlen (STR)) == 0)
+ 	{
+ 	  if (strcmp (argv[i] + strlen (STR), "lp64") == 0)
+ 	    offload_abi = OFFLOAD_ABI_LP64;
+ 	  else if (strcmp (argv[i] + strlen (STR), "ilp32") == 0)
+ 	    offload_abi = OFFLOAD_ABI_ILP32;
+ 	  else
+ 	    fatal_error (input_location,
+ 			 "unrecognizable argument of option " STR);
+ 	}
+ #undef STR
+       else if (strcmp (argv[i], "-fopenmp") == 0)
+ 	fopenmp = true;
+       else if (strcmp (argv[i], "-fopenacc") == 0)
+ 	fopenacc = true;
+       else if (strcmp (argv[i], "-save-temps") == 0)
+ 	save_temps = true;
+       else if (strcmp (argv[i], "-v") == 0)
+ 	verbose = true;
+     }
+   if (!(fopenacc ^ fopenmp))
+     fatal_error (input_location, "either -fopenacc or -fopenmp must be set");
+ 
+   const char *abi;
+   switch (offload_abi)
+     {
+     case OFFLOAD_ABI_LP64:
+       abi = "-m64";
+       break;
+     case OFFLOAD_ABI_ILP32:
+       abi = "-m32";
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   gcn_s1_name = make_temp_file (".mkoffload.1.s");
+   gcn_s2_name = make_temp_file (".mkoffload.2.s");
+   gcn_o_name = make_temp_file (".mkoffload.hsaco");
+   gcn_cfile_name = make_temp_file (".c");
+ 
+   /* Build arguments for compiler pass.  */
+   struct obstack cc_argv_obstack;
+   obstack_init (&cc_argv_obstack);
+   obstack_ptr_grow (&cc_argv_obstack, driver);
+   obstack_ptr_grow (&cc_argv_obstack, "-S");
+ 
+   if (save_temps)
+     obstack_ptr_grow (&cc_argv_obstack, "-save-temps");
+   if (verbose)
+     obstack_ptr_grow (&cc_argv_obstack, "-v");
+   obstack_ptr_grow (&cc_argv_obstack, abi);
+   obstack_ptr_grow (&cc_argv_obstack, "-xlto");
+   if (fopenmp)
+     obstack_ptr_grow (&cc_argv_obstack, "-mgomp");
+ 
+   for (int ix = 1; ix != argc; ix++)
+     {
+       if (!strcmp (argv[ix], "-o") && ix + 1 != argc)
+ 	outname = argv[++ix];
+       else
+ 	{
+ 	  obstack_ptr_grow (&cc_argv_obstack, argv[ix]);
+ 
+ 	  if (argv[ix][0] != '-')
+ 	    offloadsrc = argv[ix];
+ 	}
+     }
+ 
+   obstack_ptr_grow (&cc_argv_obstack, "-o");
+   obstack_ptr_grow (&cc_argv_obstack, gcn_s1_name);
+   obstack_ptr_grow (&cc_argv_obstack,
+ 		    concat ("-mlocal-symbol-id=", offloadsrc, NULL));
+   obstack_ptr_grow (&cc_argv_obstack, NULL);
+   const char **cc_argv = XOBFINISH (&cc_argv_obstack, const char **);
+ 
+   /* Build arguments for assemble/link pass.  */
+   struct obstack ld_argv_obstack;
+   obstack_init (&ld_argv_obstack);
+   obstack_ptr_grow (&ld_argv_obstack, driver);
+   obstack_ptr_grow (&ld_argv_obstack, gcn_s2_name);
+   obstack_ptr_grow (&ld_argv_obstack, "-lgomp");
+ 
+   for (int i = 1; i < argc; i++)
+     if (strncmp (argv[i], "-l", 2) == 0
+ 	|| strncmp (argv[i], "-Wl", 3) == 0
+ 	|| strncmp (argv[i], "-march", 6) == 0)
+       obstack_ptr_grow (&ld_argv_obstack, argv[i]);
+ 
+   obstack_ptr_grow (&ld_argv_obstack, "-o");
+   obstack_ptr_grow (&ld_argv_obstack, gcn_o_name);
+   obstack_ptr_grow (&ld_argv_obstack, NULL);
+   const char **ld_argv = XOBFINISH (&ld_argv_obstack, const char **);
+ 
+   /* Clean up unhelpful environment variables.  */
+   char *execpath = getenv ("GCC_EXEC_PREFIX");
+   char *cpath = getenv ("COMPILER_PATH");
+   char *lpath = getenv ("LIBRARY_PATH");
+   unsetenv ("GCC_EXEC_PREFIX");
+   unsetenv ("COMPILER_PATH");
+   unsetenv ("LIBRARY_PATH");
+ 
+   /* Run the compiler pass.  */
+   fork_execute (cc_argv[0], CONST_CAST (char **, cc_argv), true);
+   obstack_free (&cc_argv_obstack, NULL);
+ 
+   in = fopen (gcn_s1_name, "r");
+   if (!in)
+     fatal_error (input_location, "cannot open intermediate gcn asm file");
+ 
+   out = fopen (gcn_s2_name, "w");
+   if (!out)
+     fatal_error (input_location, "cannot open '%s'", gcn_s2_name);
+ 
+   cfile = fopen (gcn_cfile_name, "w");
+   if (!cfile)
+     fatal_error (input_location, "cannot open '%s'", gcn_cfile_name);
+ 
+   process_asm (in, out, cfile);
+ 
+   fclose (in);
+   fclose (out);
+ 
+   /* Run the assemble/link pass.  */
+   fork_execute (ld_argv[0], CONST_CAST (char **, ld_argv), true);
+   obstack_free (&ld_argv_obstack, NULL);
+ 
+   in = fopen (gcn_o_name, "r");
+   if (!in)
+     fatal_error (input_location, "cannot open intermediate gcn obj file");
+ 
+   process_obj (in, cfile);
+ 
+   fclose (in);
+   fclose (cfile);
+ 
+   xputenv (concat ("GCC_EXEC_PREFIX=", execpath, NULL));
+   xputenv (concat ("COMPILER_PATH=", cpath, NULL));
+   xputenv (concat ("LIBRARY_PATH=", lpath, NULL));
+ 
+   compile_native (gcn_cfile_name, outname, collect_gcc);
+ 
+   return 0;
+ }
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/offload.h gcc-10.1.0/gcc/config/gcn/offload.h
*** gcc-9.3.0/gcc/config/gcn/offload.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/gcn/offload.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,35 ----
+ /* Support for AMD GCN offloading.
+ 
+    Copyright (C) 2014-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+ 
+    Under Section 7 of GPL version 3, you are granted additional
+    permissions described in the GCC Runtime Library Exception, version
+    3.1, as published by the Free Software Foundation.
+ 
+    You should have received a copy of the GNU General Public License and
+    a copy of the GCC Runtime Library Exception along with this program;
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_GCN_OFFLOAD_H
+ #define GCC_GCN_OFFLOAD_H
+ 
+ /* Support for OpenACC acc_on_device.  */
+ 
+ #include "gomp-constants.h"
+ 
+ #define ACCEL_COMPILER_acc_device GOMP_DEVICE_GCN
+ 
+ #endif
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/predicates.md gcc-10.1.0/gcc/config/gcn/predicates.md
*** gcc-9.3.0/gcc/config/gcn/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicate definitions for GCN.
! ;; Copyright (C) 2016-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Predicate definitions for GCN.
! ;; Copyright (C) 2016-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 165,171 ****
    (match_code "eq,ne,gt,ge,lt,le,gtu,geu,ltu,leu"))
  
  (define_predicate "gcn_fp_compare_operator"
!   (match_code "eq,ne,gt,ge,lt,le,gtu,geu,ltu,leu,ordered,unordered"))
  
  (define_predicate "unary_operator"
    (match_code "not,popcount"))
--- 165,171 ----
    (match_code "eq,ne,gt,ge,lt,le,gtu,geu,ltu,leu"))
  
  (define_predicate "gcn_fp_compare_operator"
!   (match_code "eq,ne,gt,ge,lt,le,gtu,geu,ltu,leu,ordered,unordered,uneq,unge,ungt,unle,unlt,ltgt"))
  
  (define_predicate "unary_operator"
    (match_code "not,popcount"))
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/t-gcn-hsa gcc-10.1.0/gcc/config/gcn/t-gcn-hsa
*** gcc-9.3.0/gcc/config/gcn/t-gcn-hsa	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gcn/t-gcn-hsa	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! #  Copyright (C) 2016-2019 Free Software Foundation, Inc.
  #
  #  This file is free software; you can redistribute it and/or modify it under
  #  the terms of the GNU General Public License as published by the Free
--- 1,4 ----
! #  Copyright (C) 2016-2020 Free Software Foundation, Inc.
  #
  #  This file is free software; you can redistribute it and/or modify it under
  #  the terms of the GNU General Public License as published by the Free
*************** ALL_HOST_OBJS += gcn-run.o
*** 42,49 ****
  gcn-run$(exeext): gcn-run.o
  	+$(LINKER) $(ALL_LINKERFLAGS) $(LDFLAGS) -o $@ $< -ldl
  
! MULTILIB_OPTIONS = march=gfx900
! MULTILIB_DIRNAMES = gcn5
  
  PASSES_EXTRA += $(srcdir)/config/gcn/gcn-passes.def
  gcn-tree.o: $(srcdir)/config/gcn/gcn-tree.c
--- 42,49 ----
  gcn-run$(exeext): gcn-run.o
  	+$(LINKER) $(ALL_LINKERFLAGS) $(LDFLAGS) -o $@ $< -ldl
  
! MULTILIB_OPTIONS = march=gfx900/march=gfx906
! MULTILIB_DIRNAMES = gfx900 gfx906
  
  PASSES_EXTRA += $(srcdir)/config/gcn/gcn-passes.def
  gcn-tree.o: $(srcdir)/config/gcn/gcn-tree.c
diff -Nrcpad gcc-9.3.0/gcc/config/gcn/t-omp-device gcc-10.1.0/gcc/config/gcn/t-omp-device
*** gcc-9.3.0/gcc/config/gcn/t-omp-device	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/gcn/t-omp-device	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,4 ----
+ omp-device-properties-gcn: $(srcdir)/config/gcn/gcn.c
+ 	echo kind: gpu > $@
+ 	echo arch: gcn >> $@
+ 	echo isa: fiji gfx900 gfx906 >> $@
diff -Nrcpad gcc-9.3.0/gcc/config/glibc-c.c gcc-10.1.0/gcc/config/glibc-c.c
*** gcc-9.3.0/gcc/config/glibc-c.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/glibc-c.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* C-family target hooks initializer for targets possibly using glibc.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* C-family target hooks initializer for targets possibly using glibc.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/glibc-d.c gcc-10.1.0/gcc/config/glibc-d.c
*** gcc-9.3.0/gcc/config/glibc-d.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/glibc-d.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Glibc support needed only by D front-end.
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
  GCC is free software; you can redistribute it and/or modify it under
  the terms of the GNU General Public License as published by the Free
--- 1,5 ----
  /* Glibc support needed only by D front-end.
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
  GCC is free software; you can redistribute it and/or modify it under
  the terms of the GNU General Public License as published by the Free
diff -Nrcpad gcc-9.3.0/gcc/config/glibc-stdint.h gcc-10.1.0/gcc/config/glibc-stdint.h
*** gcc-9.3.0/gcc/config/glibc-stdint.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/glibc-stdint.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for <stdint.h> types on systems using GNU libc or uClibc.
!    Copyright (C) 2008-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for <stdint.h> types on systems using GNU libc or uClibc.
!    Copyright (C) 2008-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/gnu-user.h gcc-10.1.0/gcc/config/gnu-user.h
*** gcc-9.3.0/gcc/config/gnu-user.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gnu-user.h	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Definitions for systems using, at least optionally, a GNU
     (glibc-based) userspace or other userspace with libc derived from
     glibc (e.g. uClibc) or for which similar specs are appropriate.
!    Copyright (C) 1995-2019 Free Software Foundation, Inc.
     Contributed by Eric Youngdale.
     Modified for stabs-in-ELF by H.J. Lu (hjl@lucon.org).
  
--- 1,7 ----
  /* Definitions for systems using, at least optionally, a GNU
     (glibc-based) userspace or other userspace with libc derived from
     glibc (e.g. uClibc) or for which similar specs are appropriate.
!    Copyright (C) 1995-2020 Free Software Foundation, Inc.
     Contributed by Eric Youngdale.
     Modified for stabs-in-ELF by H.J. Lu (hjl@lucon.org).
  
*************** see the files COPYING3 and COPYING.RUNTI
*** 73,81 ****
     GNU userspace "finalizer" file, `crtn.o'.  */
  
  #define GNU_USER_TARGET_ENDFILE_SPEC \
!   "%{fvtable-verify=none:%s; \
       fvtable-verify=preinit:vtv_end_preinit.o%s; \
!      fvtable-verify=std:vtv_end.o%s} \
     %{static:crtend.o%s; \
       shared|static-pie|" PIE_SPEC ":crtendS.o%s; \
       :crtend.o%s} " \
--- 73,81 ----
     GNU userspace "finalizer" file, `crtn.o'.  */
  
  #define GNU_USER_TARGET_ENDFILE_SPEC \
!   "%{!static:%{fvtable-verify=none:%s; \
       fvtable-verify=preinit:vtv_end_preinit.o%s; \
!      fvtable-verify=std:vtv_end.o%s}} \
     %{static:crtend.o%s; \
       shared|static-pie|" PIE_SPEC ":crtendS.o%s; \
       :crtend.o%s} " \
diff -Nrcpad gcc-9.3.0/gcc/config/gnu-user.opt gcc-10.1.0/gcc/config/gnu-user.opt
*** gcc-9.3.0/gcc/config/gnu-user.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gnu-user.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for systems using gnu-user.h.
  
! ; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for systems using gnu-user.h.
  
! ; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/gnu.h gcc-10.1.0/gcc/config/gnu.h
*** gcc-9.3.0/gcc/config/gnu.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/gnu.h	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Configuration common to all targets running the GNU system.  */
  
  /*
! Copyright (C) 1994-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,7 ----
  /* Configuration common to all targets running the GNU system.  */
  
  /*
! Copyright (C) 1994-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/h8300/constraints.md gcc-10.1.0/gcc/config/h8300/constraints.md
*** gcc-9.3.0/gcc/config/h8300/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/h8300/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for Renesas H8/300.
! ;; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Constraint definitions for Renesas H8/300.
! ;; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/h8300/elf.h gcc-10.1.0/gcc/config/h8300/elf.h
*** gcc-9.3.0/gcc/config/h8300/elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/h8300/elf.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for GNU compiler.
     Renesas H8/300 version generating elf
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
     Contributed by Steve Chamberlain (sac@cygnus.com),
     Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
  
--- 1,6 ----
  /* Definitions of target machine for GNU compiler.
     Renesas H8/300 version generating elf
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
     Contributed by Steve Chamberlain (sac@cygnus.com),
     Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
  
diff -Nrcpad gcc-9.3.0/gcc/config/h8300/genmova.sh gcc-10.1.0/gcc/config/h8300/genmova.sh
*** gcc-9.3.0/gcc/config/h8300/genmova.sh	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/h8300/genmova.sh	Thu May  7 10:49:59 2020
***************
*** 2,8 ****
  # Generate mova.md, a file containing patterns that can be implemented
  # using the h8sx mova instruction.
  
! # Copyright (C) 2004-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 2,8 ----
  # Generate mova.md, a file containing patterns that can be implemented
  # using the h8sx mova instruction.
  
! # Copyright (C) 2004-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
***************
*** 22,28 ****
  
  echo ";; -*- buffer-read-only: t -*-"
  echo ";; Generated automatically from genmova.sh"
! echo ";; Copyright (C) 2004-2019 Free Software Foundation, Inc."
  echo ";;"
  echo ";; This file is part of GCC."
  echo ";;"
--- 22,28 ----
  
  echo ";; -*- buffer-read-only: t -*-"
  echo ";; Generated automatically from genmova.sh"
! echo ";; Copyright (C) 2004-2020 Free Software Foundation, Inc."
  echo ";;"
  echo ";; This file is part of GCC."
  echo ";;"
diff -Nrcpad gcc-9.3.0/gcc/config/h8300/h8300-protos.h gcc-10.1.0/gcc/config/h8300/h8300-protos.h
*** gcc-9.3.0/gcc/config/h8300/h8300-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/h8300/h8300-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for GNU compiler.
     Renesas H8/300 version
!    Copyright (C) 2000-2019 Free Software Foundation, Inc.
     Contributed by Steve Chamberlain (sac@cygnus.com),
     Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
  
--- 1,6 ----
  /* Definitions of target machine for GNU compiler.
     Renesas H8/300 version
!    Copyright (C) 2000-2020 Free Software Foundation, Inc.
     Contributed by Steve Chamberlain (sac@cygnus.com),
     Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
  
*************** extern unsigned int    h8300_insn_length
*** 109,117 ****
  extern const char *    output_h8sx_shift (rtx *, int, int);
  extern bool            h8300_operands_match_p (rtx *);
  extern bool            h8sx_mergeable_memrefs_p (rtx, rtx);
- extern bool            h8sx_emit_movmd (rtx, rtx, rtx, HOST_WIDE_INT);
- extern void            h8300_swap_into_er6 (rtx);
- extern void            h8300_swap_out_of_er6 (rtx);
  extern poly_int64      h8300_push_rounding (poly_int64);
  
  #endif /* ! GCC_H8300_PROTOS_H */
--- 109,114 ----
diff -Nrcpad gcc-9.3.0/gcc/config/h8300/h8300.c gcc-10.1.0/gcc/config/h8300/h8300.c
*** gcc-9.3.0/gcc/config/h8300/h8300.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/h8300/h8300.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines for insn-output.c for Renesas H8/300.
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
     Contributed by Steve Chamberlain (sac@cygnus.com),
     Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
  
--- 1,5 ----
  /* Subroutines for insn-output.c for Renesas H8/300.
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
     Contributed by Steve Chamberlain (sac@cygnus.com),
     Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
  
*************** h8300_option_override (void)
*** 378,385 ****
  
   if ((!TARGET_H8300S  &&  TARGET_NEXR) && (!TARGET_H8300SX && TARGET_NEXR))
     {
!       warning (OPT_mno_exr, "%<-mno-exr%> valid only with %<-ms%> or "
! 	       "%<-msx%> - Option ignored!");
     }
  
  #ifdef H8300_LINUX 
--- 378,385 ----
  
   if ((!TARGET_H8300S  &&  TARGET_NEXR) && (!TARGET_H8300SX && TARGET_NEXR))
     {
!       warning (OPT_mno_exr, "%<-mno-exr%> is valid only with %<-ms%> or "
! 	       "%<-msx%> - option ignored");
     }
  
  #ifdef H8300_LINUX 
*************** byte_reg (rtx x, int b)
*** 485,491 ****
     && ! TREE_THIS_VOLATILE (current_function_decl)			\
     && (h8300_saveall_function_p (current_function_decl)			\
         /* Save any call saved register that was used.  */		\
!        || (df_regs_ever_live_p (regno) && !call_used_regs[regno])	\
         /* Save the frame pointer if it was used.  */			\
         || (regno == HARD_FRAME_POINTER_REGNUM && df_regs_ever_live_p (regno)) \
         /* Save any register used in an interrupt handler.  */		\
--- 485,492 ----
     && ! TREE_THIS_VOLATILE (current_function_decl)			\
     && (h8300_saveall_function_p (current_function_decl)			\
         /* Save any call saved register that was used.  */		\
!        || (df_regs_ever_live_p (regno)					\
! 	   && !call_used_or_fixed_reg_p (regno))			\
         /* Save the frame pointer if it was used.  */			\
         || (regno == HARD_FRAME_POINTER_REGNUM && df_regs_ever_live_p (regno)) \
         /* Save any register used in an interrupt handler.  */		\
*************** byte_reg (rtx x, int b)
*** 494,500 ****
         /* Save call clobbered registers in non-leaf interrupt		\
  	  handlers.  */							\
         || (h8300_current_function_interrupt_function_p ()		\
! 	   && call_used_regs[regno]					\
  	   && !crtl->is_leaf)))
  
  /* We use this to wrap all emitted insns in the prologue.  */
--- 495,501 ----
         /* Save call clobbered registers in non-leaf interrupt		\
  	  handlers.  */							\
         || (h8300_current_function_interrupt_function_p ()		\
! 	   && call_used_or_fixed_reg_p (regno)				\
  	   && !crtl->is_leaf)))
  
  /* We use this to wrap all emitted insns in the prologue.  */
*************** h8300_pr_saveall (struct cpp_reader *pfi
*** 1081,1097 ****
    pragma_saveall = 1;
  }
  
! /* If the next function argument with MODE and TYPE is to be passed in
!    a register, return a reg RTX for the hard register in which to pass
!    the argument.  CUM represents the state after the last argument.
!    If the argument is to be pushed, NULL_RTX is returned.
  
     On the H8/300 all normal args are pushed, unless -mquickcall in which
     case the first 3 arguments are passed in registers.  */
  
  static rtx
! h8300_function_arg (cumulative_args_t cum_v, machine_mode mode,
! 		    const_tree type, bool named)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
--- 1082,1097 ----
    pragma_saveall = 1;
  }
  
! /* If the next function argument ARG is to be passed in a register, return
!    a reg RTX for the hard register in which to pass the argument.  CUM
!    represents the state after the last argument.  If the argument is to
!    be pushed, NULL_RTX is returned.
  
     On the H8/300 all normal args are pushed, unless -mquickcall in which
     case the first 3 arguments are passed in registers.  */
  
  static rtx
! h8300_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
*************** h8300_function_arg (cumulative_args_t cu
*** 1119,1125 ****
    int regpass = 0;
  
    /* Never pass unnamed arguments in registers.  */
!   if (!named)
      return NULL_RTX;
  
    /* Pass 3 regs worth of data in regs when user asked on the command line.  */
--- 1119,1125 ----
    int regpass = 0;
  
    /* Never pass unnamed arguments in registers.  */
!   if (!arg.named)
      return NULL_RTX;
  
    /* Pass 3 regs worth of data in regs when user asked on the command line.  */
*************** h8300_function_arg (cumulative_args_t cu
*** 1143,1176 ****
  
    if (regpass)
      {
!       int size;
! 
!       if (mode == BLKmode)
! 	size = int_size_in_bytes (type);
!       else
! 	size = GET_MODE_SIZE (mode);
! 
        if (size + cum->nbytes <= regpass * UNITS_PER_WORD
  	  && cum->nbytes / UNITS_PER_WORD <= 3)
! 	result = gen_rtx_REG (mode, cum->nbytes / UNITS_PER_WORD);
      }
  
    return result;
  }
  
! /* Update the data in CUM to advance over an argument
!    of mode MODE and data type TYPE.
!    (TYPE is null for libcalls where that information may not be available.)  */
  
  static void
! h8300_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
! 			    const_tree type, bool named ATTRIBUTE_UNUSED)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
!   cum->nbytes += (mode != BLKmode
! 		  ? (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD
! 		  : (int_size_in_bytes (type) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD);
  }
  
  
--- 1143,1167 ----
  
    if (regpass)
      {
!       int size = arg.promoted_size_in_bytes ();
        if (size + cum->nbytes <= regpass * UNITS_PER_WORD
  	  && cum->nbytes / UNITS_PER_WORD <= 3)
! 	result = gen_rtx_REG (arg.mode, cum->nbytes / UNITS_PER_WORD);
      }
  
    return result;
  }
  
! /* Update the data in CUM to advance over argument ARG.  */
  
  static void
! h8300_function_arg_advance (cumulative_args_t cum_v,
! 			    const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
!   cum->nbytes += ((arg.promoted_size_in_bytes () + UNITS_PER_WORD - 1)
! 		  & -UNITS_PER_WORD);
  }
  
  
*************** h8300_print_operand (FILE *file, rtx x,
*** 1656,1695 ****
      case 's':
        if (GET_CODE (x) == CONST_INT)
  	fprintf (file, "#%ld", (INTVAL (x)) & 0xff);
!       else
  	fprintf (file, "%s", byte_reg (x, 0));
        break;
      case 't':
        if (GET_CODE (x) == CONST_INT)
  	fprintf (file, "#%ld", (INTVAL (x) >> 8) & 0xff);
!       else
  	fprintf (file, "%s", byte_reg (x, 1));
        break;
      case 'w':
        if (GET_CODE (x) == CONST_INT)
  	fprintf (file, "#%ld", INTVAL (x) & 0xff);
!       else
  	fprintf (file, "%s",
  		 byte_reg (x, TARGET_H8300 ? 2 : 0));
        break;
      case 'x':
        if (GET_CODE (x) == CONST_INT)
  	fprintf (file, "#%ld", (INTVAL (x) >> 8) & 0xff);
!       else
  	fprintf (file, "%s",
  		 byte_reg (x, TARGET_H8300 ? 3 : 1));
        break;
      case 'y':
        if (GET_CODE (x) == CONST_INT)
  	fprintf (file, "#%ld", (INTVAL (x) >> 16) & 0xff);
!       else
  	fprintf (file, "%s", byte_reg (x, 0));
        break;
      case 'z':
        if (GET_CODE (x) == CONST_INT)
  	fprintf (file, "#%ld", (INTVAL (x) >> 24) & 0xff);
!       else
  	fprintf (file, "%s", byte_reg (x, 1));
        break;
  
      default:
--- 1647,1698 ----
      case 's':
        if (GET_CODE (x) == CONST_INT)
  	fprintf (file, "#%ld", (INTVAL (x)) & 0xff);
!       else if (GET_CODE (x) == REG)
  	fprintf (file, "%s", byte_reg (x, 0));
+       else
+ 	output_operand_lossage ("Expected register or constant integer.");
        break;
      case 't':
        if (GET_CODE (x) == CONST_INT)
  	fprintf (file, "#%ld", (INTVAL (x) >> 8) & 0xff);
!       else if (GET_CODE (x) == REG)
  	fprintf (file, "%s", byte_reg (x, 1));
+       else
+ 	output_operand_lossage ("Expected register or constant integer.");
        break;
      case 'w':
        if (GET_CODE (x) == CONST_INT)
  	fprintf (file, "#%ld", INTVAL (x) & 0xff);
!       else if (GET_CODE (x) == REG)
  	fprintf (file, "%s",
  		 byte_reg (x, TARGET_H8300 ? 2 : 0));
+       else
+ 	output_operand_lossage ("Expected register or constant integer.");
        break;
      case 'x':
        if (GET_CODE (x) == CONST_INT)
  	fprintf (file, "#%ld", (INTVAL (x) >> 8) & 0xff);
!       else if (GET_CODE (x) == REG)
  	fprintf (file, "%s",
  		 byte_reg (x, TARGET_H8300 ? 3 : 1));
+       else
+ 	output_operand_lossage ("Expected register or constant integer.");
        break;
      case 'y':
        if (GET_CODE (x) == CONST_INT)
  	fprintf (file, "#%ld", (INTVAL (x) >> 16) & 0xff);
!       else if (GET_CODE (x) == REG)
  	fprintf (file, "%s", byte_reg (x, 0));
+       else
+ 	output_operand_lossage ("Expected register or constant integer.");
        break;
      case 'z':
        if (GET_CODE (x) == CONST_INT)
  	fprintf (file, "#%ld", (INTVAL (x) >> 24) & 0xff);
!       else if (GET_CODE (x) == REG)
  	fprintf (file, "%s", byte_reg (x, 1));
+       else
+ 	output_operand_lossage ("Expected register or constant integer.");
        break;
  
      default:
*************** h8300_operands_match_p (rtx *operands)
*** 2644,2788 ****
    return false;
  }
  
- /* Try using movmd to move LENGTH bytes from memory region SRC to memory
-    region DEST.  The two regions do not overlap and have the common
-    alignment given by ALIGNMENT.  Return true on success.
- 
-    Using movmd for variable-length moves seems to involve some
-    complex trade-offs.  For instance:
- 
-       - Preparing for a movmd instruction is similar to preparing
- 	for a memcpy.  The main difference is that the arguments
- 	are moved into er4, er5 and er6 rather than er0, er1 and er2.
- 
-       - Since movmd clobbers the frame pointer, we need to save
- 	and restore it somehow when frame_pointer_needed.  This can
- 	sometimes make movmd sequences longer than calls to memcpy().
- 
-       - The counter register is 16 bits, so the instruction is only
- 	suitable for variable-length moves when sizeof (size_t) == 2.
- 	That's only true in normal mode.
- 
-       - We will often lack static alignment information.  Falling back
- 	on movmd.b would likely be slower than calling memcpy(), at least
- 	for big moves.
- 
-    This function therefore only uses movmd when the length is a
-    known constant, and only then if -fomit-frame-pointer is in
-    effect or if we're not optimizing for size.
- 
-    At the moment the function uses movmd for all in-range constants,
-    but it might be better to fall back on memcpy() for large moves
-    if ALIGNMENT == 1.  */
- 
- bool
- h8sx_emit_movmd (rtx dest, rtx src, rtx length,
- 		 HOST_WIDE_INT alignment)
- {
-   if (!flag_omit_frame_pointer && optimize_size)
-     return false;
- 
-   if (GET_CODE (length) == CONST_INT)
-     {
-       rtx dest_reg, src_reg, first_dest, first_src;
-       HOST_WIDE_INT n;
-       int factor;
- 
-       /* Use movmd.l if the alignment allows it, otherwise fall back
- 	 on movmd.b.  */
-       factor = (alignment >= 2 ? 4 : 1);
- 
-       /* Make sure the length is within range.  We can handle counter
- 	 values up to 65536, although HImode truncation will make
- 	 the count appear negative in rtl dumps.  */
-       n = INTVAL (length);
-       if (n <= 0 || n / factor > 65536)
- 	return false;
- 
-       /* Create temporary registers for the source and destination
- 	 pointers.  Initialize them to the start of each region.  */
-       dest_reg = copy_addr_to_reg (XEXP (dest, 0));
-       src_reg = copy_addr_to_reg (XEXP (src, 0));
- 
-       /* Create references to the movmd source and destination blocks.  */
-       first_dest = replace_equiv_address (dest, dest_reg);
-       first_src = replace_equiv_address (src, src_reg);
- 
-       set_mem_size (first_dest, n & -factor);
-       set_mem_size (first_src, n & -factor);
- 
-       length = copy_to_mode_reg (HImode, gen_int_mode (n / factor, HImode));
-       emit_insn (gen_movmd (first_dest, first_src, length, GEN_INT (factor)));
- 
-       if ((n & -factor) != n)
- 	{
- 	  /* Move SRC and DEST past the region we just copied.
- 	     This is done to update the memory attributes.  */
- 	  dest = adjust_address (dest, BLKmode, n & -factor);
- 	  src = adjust_address (src, BLKmode, n & -factor);
- 
- 	  /* Replace the addresses with the source and destination
- 	     registers, which movmd has left with the right values.  */
- 	  dest = replace_equiv_address (dest, dest_reg);
- 	  src = replace_equiv_address (src, src_reg);
- 
- 	  /* Mop up the left-over bytes.  */
- 	  if (n & 2)
- 	    emit_move_insn (adjust_address (dest, HImode, 0),
- 			    adjust_address (src, HImode, 0));
- 	  if (n & 1)
- 	    emit_move_insn (adjust_address (dest, QImode, n & 2),
- 			    adjust_address (src, QImode, n & 2));
- 	}
-       return true;
-     }
-   return false;
- }
- 
- /* Move ADDR into er6 after pushing its old value onto the stack.  */
- 
- void
- h8300_swap_into_er6 (rtx addr)
- {
-   rtx insn = push (HARD_FRAME_POINTER_REGNUM, false);
-   if (frame_pointer_needed)
-     add_reg_note (insn, REG_CFA_DEF_CFA,
- 		  plus_constant (Pmode, gen_rtx_MEM (Pmode, stack_pointer_rtx),
- 				 2 * UNITS_PER_WORD));
-   else
-     add_reg_note (insn, REG_CFA_ADJUST_CFA,
- 		  gen_rtx_SET (stack_pointer_rtx,
- 			       plus_constant (Pmode, stack_pointer_rtx, 4)));
- 
-   emit_move_insn (hard_frame_pointer_rtx, addr);
-   if (REGNO (addr) == SP_REG)
-     emit_move_insn (hard_frame_pointer_rtx,
- 		    plus_constant (Pmode, hard_frame_pointer_rtx,
- 				   GET_MODE_SIZE (word_mode)));
- }
- 
- /* Move the current value of er6 into ADDR and pop its old value
-    from the stack.  */
- 
- void
- h8300_swap_out_of_er6 (rtx addr)
- {
-   rtx insn;
- 
-   if (REGNO (addr) != SP_REG)
-     emit_move_insn (addr, hard_frame_pointer_rtx);
- 
-   insn = pop (HARD_FRAME_POINTER_REGNUM);
-   if (frame_pointer_needed)
-     add_reg_note (insn, REG_CFA_DEF_CFA,
- 		  plus_constant (Pmode, hard_frame_pointer_rtx,
- 				 2 * UNITS_PER_WORD));
-   else
-     add_reg_note (insn, REG_CFA_ADJUST_CFA,
- 		  gen_rtx_SET (stack_pointer_rtx,
- 			       plus_constant (Pmode, stack_pointer_rtx, -4)));
- }
- 
  /* Return the length of mov instruction.  */
  
  unsigned int
--- 2647,2652 ----
diff -Nrcpad gcc-9.3.0/gcc/config/h8300/h8300.h gcc-10.1.0/gcc/config/h8300/h8300.h
*** gcc-9.3.0/gcc/config/h8300/h8300.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/h8300/h8300.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for GNU compiler.
     Renesas H8/300 (generic)
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
     Contributed by Steve Chamberlain (sac@cygnus.com),
     Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
  
--- 1,6 ----
  /* Definitions of target machine for GNU compiler.
     Renesas H8/300 (generic)
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
     Contributed by Steve Chamberlain (sac@cygnus.com),
     Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
  
*************** struct cum_arg
*** 434,440 ****
     for profiling a function entry.  */
  
  #define FUNCTION_PROFILER(FILE, LABELNO)  \
!   fprintf (FILE, "\t%s\t#LP%d,%s\n\tjsr @mcount\n", \
  	   h8_mov_op, (LABELNO), h8_reg_names[0]);
  
  /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
--- 434,440 ----
     for profiling a function entry.  */
  
  #define FUNCTION_PROFILER(FILE, LABELNO)  \
!   fprintf (FILE, "\t%s\t#.LP%d,%s\n\tjsr @mcount\n", \
  	   h8_mov_op, (LABELNO), h8_reg_names[0]);
  
  /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
diff -Nrcpad gcc-9.3.0/gcc/config/h8300/h8300.md gcc-10.1.0/gcc/config/h8300/h8300.md
*** gcc-9.3.0/gcc/config/h8300/h8300.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/h8300/h8300.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; GCC machine description for Renesas H8/300
! ;; Copyright (C) 1992-2019 Free Software Foundation, Inc.
  
  ;;   Contributed by Steve Chamberlain (sac@cygnus.com),
  ;;   Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
--- 1,5 ----
  ;; GCC machine description for Renesas H8/300
! ;; Copyright (C) 1992-2020 Free Software Foundation, Inc.
  
  ;;   Contributed by Steve Chamberlain (sac@cygnus.com),
  ;;   Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
***************
*** 474,645 ****
     (set_attr "length_table" "*,movl")
     (set_attr "cc" "set_zn,set_znv")])
  
- ;; Implement block moves using movmd.  Defining movmemsi allows the full
- ;; range of constant lengths (up to 0x40000 bytes when using movmd.l).
- ;; See h8sx_emit_movmd for details.
- 
- (define_expand "movmemsi"
-   [(use (match_operand:BLK 0 "memory_operand" ""))
-    (use (match_operand:BLK 1 "memory_operand" ""))
-    (use (match_operand:SI 2 "" ""))
-    (use (match_operand:SI 3 "const_int_operand" ""))]
-   "TARGET_H8300SX"
-   {
-     if (h8sx_emit_movmd (operands[0], operands[1], operands[2], INTVAL (operands[3])))
-       DONE;
-     else
-       FAIL;
-   })
- 
- ;; Expander for generating movmd insns.  Operand 0 is the destination
- ;; memory region, operand 1 is the source, operand 2 is the counter
- ;; register and operand 3 is the chunk size (1, 2 or 4).
- 
- (define_expand "movmd"
-   [(parallel
-     [(set (match_operand:BLK 0 "memory_operand" "")
- 	  (match_operand:BLK 1 "memory_operand" ""))
-      (unspec [(match_operand:HI 2 "register_operand" "")
- 	      (match_operand:HI 3 "const_int_operand" "")] UNSPEC_MOVMD)
-      (clobber (match_dup 4))
-      (clobber (match_dup 5))
-      (set (match_dup 2)
- 	  (const_int 0))])]
-   "TARGET_H8300SX"
-   {
-     operands[4] = copy_rtx (XEXP (operands[0], 0));
-     operands[5] = copy_rtx (XEXP (operands[1], 0));
-   })
- 
- ;; This is a difficult instruction to reload since operand 0 must be the
- ;; frame pointer.  See h8300_reg_class_from_letter for an explanation.
- 
- (define_insn "movmd_internal_<mode>"
-   [(set (mem:BLK (match_operand:P 3 "register_operand" "0,r"))
- 	(mem:BLK (match_operand:P 4 "register_operand" "1,1")))
-    (unspec [(match_operand:HI 5 "register_operand" "2,2")
- 	    (match_operand:HI 6 "const_int_operand" "n,n")] UNSPEC_MOVMD)
-    (clobber (match_operand:P 0 "register_operand" "=d,??D"))
-    (clobber (match_operand:P 1 "register_operand" "=f,f"))
-    (set (match_operand:HI 2 "register_operand" "=c,c")
- 	(const_int 0))]
-   "TARGET_H8300SX"
-   "@
-     movmd%m6
-     #"
-   [(set_attr "length" "2,14")
-    (set_attr "can_delay" "no")
-    (set_attr "cc" "none,clobber")])
- 
- ;; Split the above instruction if the destination register isn't er6.
- ;; We need a sequence like:
- ;;
- ;;	mov.l	er6,@-er7
- ;;	mov.l	<dest>,er6
- ;;	movmd.sz
- ;;	mov.l	er6,<dest>
- ;;	mov.l	@er7+,er6
- ;;
- ;; where <dest> is the current destination register (operand 4).
- ;; The fourth instruction will be deleted if <dest> dies here.
- 
- (define_split
-   [(set (match_operand:BLK 0 "memory_operand" "")
- 	(match_operand:BLK 1 "memory_operand" ""))
-    (unspec [(match_operand:HI 2 "register_operand" "")
- 	    (match_operand:HI 3 "const_int_operand" "")] UNSPEC_MOVMD)
-    (clobber (match_operand:P 4 "register_operand" ""))
-    (clobber (match_operand:P 5 "register_operand" ""))
-    (set (match_dup 2)
- 	(const_int 0))]
-   "TARGET_H8300SX && reload_completed
-    && REGNO (operands[4]) != DESTINATION_REG"
-   [(const_int 0)]
-   {
-     rtx dest;
- 
-     h8300_swap_into_er6 (XEXP (operands[0], 0));
-     dest = replace_equiv_address (operands[0], hard_frame_pointer_rtx);
-     emit_insn (gen_movmd (dest, operands[1], operands[2], operands[3]));
-     h8300_swap_out_of_er6 (operands[4]);
-     DONE;
-   })
- 
- ;; Expand a call to stpcpy() using movsd.  Operand 0 should point to
- ;; the final character, but movsd leaves it pointing to the character
- ;; after that.
- 
- (define_expand "movstr"
-   [(use (match_operand 0 "register_operand" ""))
-    (use (match_operand:BLK 1 "memory_operand" ""))
-    (use (match_operand:BLK 2 "memory_operand" ""))]
-   "TARGET_H8300SX"
-   {
-     operands[1] = replace_equiv_address
-       (operands[1], copy_to_mode_reg (Pmode, XEXP (operands[1], 0)));
-     operands[2] = replace_equiv_address
-       (operands[2], copy_to_mode_reg (Pmode, XEXP (operands[2], 0)));
-     emit_insn (gen_movsd (operands[1], operands[2], gen_reg_rtx (Pmode)));
-     emit_insn (gen_add3_insn (operands[0], XEXP (operands[1], 0), constm1_rtx));
-     DONE;
-   })
- 
- ;; Expander for generating a movsd instruction.  Operand 0 is the
- ;; destination string, operand 1 is the source string and operand 2
- ;; is a scratch register.
- 
- (define_expand "movsd"
-   [(parallel
-     [(set (match_operand:BLK 0 "memory_operand" "")
- 	  (unspec:BLK [(match_operand:BLK 1 "memory_operand" "")]
- 	  UNSPEC_STPCPY))
-      (clobber (match_dup 3))
-      (clobber (match_dup 4))
-      (clobber (match_operand 2 "register_operand" ""))])]
-   "TARGET_H8300SX"
-   {
-     operands[3] = copy_rtx (XEXP (operands[0], 0));
-     operands[4] = copy_rtx (XEXP (operands[1], 0));
-   })
- 
- ;; See comments above memcpy_internal().
- 
- (define_insn "stpcpy_internal_<mode>"
-   [(set (mem:BLK (match_operand:P 3 "register_operand" "0,r"))
- 	(unspec:BLK [(mem:BLK (match_operand:P 4 "register_operand" "1,1"))]
- 	UNSPEC_STPCPY))
-    (clobber (match_operand:P 0 "register_operand" "=d,??D"))
-    (clobber (match_operand:P 1 "register_operand" "=f,f"))
-    (clobber (match_operand:P 2 "register_operand" "=c,c"))]
-   "TARGET_H8300SX"
-   "@
-     \n1:\tmovsd\t2f\;bra\t1b\n2:
-     #"
-   [(set_attr "length" "6,18")
-    (set_attr "cc" "none,clobber")])
- 
- ;; Split the above instruction if the destination isn't er6.  This works
- ;; in the same way as the movmd splitter.
- 
- (define_split
-   [(set (match_operand:BLK 0 "memory_operand" "")
- 	(unspec:BLK [(match_operand:BLK 1 "memory_operand" "")] UNSPEC_STPCPY))
-    (clobber (match_operand:P 2 "register_operand" ""))
-    (clobber (match_operand:P 3 "register_operand" ""))
-    (clobber (match_operand:P 4 "register_operand" ""))]
-   "TARGET_H8300SX &&  reload_completed
-    && REGNO (operands[2]) != DESTINATION_REG"
-   [(const_int 0)]
-   {
-     rtx dest;
- 
-     h8300_swap_into_er6 (XEXP (operands[0], 0));
-     dest = replace_equiv_address (operands[0], hard_frame_pointer_rtx);
-     emit_insn (gen_movsd (dest, operands[1], operands[4]));
-     h8300_swap_out_of_er6 (operands[2]);
-     DONE;
-   })
- 
  (include "mova.md")
  
  (define_insn "*movsf_h8300"
--- 474,479 ----
***************
*** 728,734 ****
    "mov.w\\t%T0,@-r7"
    [(set_attr "length" "2")])
  
! (define_insn "*push1_h8300hs_<mode>"
    [(set (mem:QHI
  	(pre_modify:P
  	  (reg:P SP_REG)
--- 562,568 ----
    "mov.w\\t%T0,@-r7"
    [(set_attr "length" "2")])
  
! (define_insn "*push1_h8300hs_<QHI:mode>"
    [(set (mem:QHI
  	(pre_modify:P
  	  (reg:P SP_REG)
***************
*** 1312,1318 ****
  		  (match_operand:HSI 2 "reg_or_nibble_operand" "r IP4>X")))]
    "TARGET_H8300SX"
    { return <MODE>mode == HImode ? "muls.w\\t%T2,%T0" : "muls.l\\t%S2,%S0"; }
!   [(set_attr "length" "2")
     (set_attr "cc" "set_zn")])
  
  (define_insn "smulsi3_highpart"
--- 1146,1152 ----
  		  (match_operand:HSI 2 "reg_or_nibble_operand" "r IP4>X")))]
    "TARGET_H8300SX"
    { return <MODE>mode == HImode ? "muls.w\\t%T2,%T0" : "muls.l\\t%S2,%S0"; }
!   [(set_attr "length" "4")
     (set_attr "cc" "set_zn")])
  
  (define_insn "smulsi3_highpart"
***************
*** 1325,1331 ****
  	  (const_int 32))))]
    "TARGET_H8300SXMUL"
    "muls/u.l\\t%S2,%S0"
!   [(set_attr "length" "2")
     (set_attr "cc" "set_zn")])
  
  (define_insn "umulsi3_highpart"
--- 1159,1165 ----
  	  (const_int 32))))]
    "TARGET_H8300SXMUL"
    "muls/u.l\\t%S2,%S0"
!   [(set_attr "length" "4")
     (set_attr "cc" "set_zn")])
  
  (define_insn "umulsi3_highpart"
***************
*** 1338,1344 ****
  	    (const_int 32))))]
    "TARGET_H8300SX"
    "mulu/u.l\\t%S2,%S0"
!   [(set_attr "length" "2")
     (set_attr "cc" "none_0hit")])
  
  ;; This is a "bridge" instruction.  Combine can't cram enough insns
--- 1172,1178 ----
  	    (const_int 32))))]
    "TARGET_H8300SX"
    "mulu/u.l\\t%S2,%S0"
!   [(set_attr "length" "4")
     (set_attr "cc" "none_0hit")])
  
  ;; This is a "bridge" instruction.  Combine can't cram enough insns
***************
*** 1384,1390 ****
  		  (match_operand:HSI 2 "reg_or_nibble_operand" "r IP4>X")))]
    "TARGET_H8300SX"
    { return <MODE>mode == HImode ? "divu.w\\t%T2,%T0" : "divu.l\\t%S2,%S0"; }
!   [(set_attr "length" "2")])
  
  (define_insn "div<mode>3"
    [(set (match_operand:HSI 0 "register_operand" "=r")
--- 1218,1224 ----
  		  (match_operand:HSI 2 "reg_or_nibble_operand" "r IP4>X")))]
    "TARGET_H8300SX"
    { return <MODE>mode == HImode ? "divu.w\\t%T2,%T0" : "divu.l\\t%S2,%S0"; }
!   [(set_attr "length" "4")])
  
  (define_insn "div<mode>3"
    [(set (match_operand:HSI 0 "register_operand" "=r")
***************
*** 1392,1398 ****
  		 (match_operand:HSI 2 "reg_or_nibble_operand" "r IP4>X")))]
    "TARGET_H8300SX"
    { return <MODE>mode == HImode ? "divs.w\\t%T2,%T0" : "divs.l\\t%S2,%S0"; }
!   [(set_attr "length" "2")])
  
  (define_insn "udivmodqi4"
    [(set (match_operand:QI 0 "register_operand" "=r")
--- 1226,1232 ----
  		 (match_operand:HSI 2 "reg_or_nibble_operand" "r IP4>X")))]
    "TARGET_H8300SX"
    { return <MODE>mode == HImode ? "divs.w\\t%T2,%T0" : "divs.l\\t%S2,%S0"; }
!   [(set_attr "length" "4")])
  
  (define_insn "udivmodqi4"
    [(set (match_operand:QI 0 "register_operand" "=r")
***************
*** 4246,4305 ****
  	      (clobber (match_dup 2))])]
    "")
  
- ;; Convert a QImode push into an SImode push so that the
- ;; define_peephole2 below can cram multiple pushes into one stm.l.
- 
- (define_peephole2
-   [(parallel [(set (reg:SI SP_REG)
-                    (plus:SI (reg:SI SP_REG) (const_int -4)))
-               (set (mem:QI (plus:SI (reg:SI SP_REG) (const_int -3)))
-                    (match_operand:QI 0 "register_operand" ""))])]
-   "TARGET_H8300S && !TARGET_NORMAL_MODE && REGNO (operands[0]) != SP_REG"
-   [(set (mem:SI (pre_dec:SI (reg:SI SP_REG)))
- 	(match_dup 0))]
-   {
-     operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));
-   })
- 
- (define_peephole2
-   [(parallel [(set (reg:HI SP_REG)
-                    (plus:HI (reg:HI SP_REG) (const_int -4)))
-               (set (mem:QI (plus:HI (reg:HI SP_REG) (const_int -3)))
-                    (match_operand:QI 0 "register_operand" ""))])]
-   "TARGET_H8300S && TARGET_NORMAL_MODE && REGNO (operands[0]) != SP_REG"
-   [(set (mem:SI (pre_dec:HI (reg:HI SP_REG)))
- 	(match_dup 0))]
-   {
-     operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));
-   })
- 
- ;; Convert a HImode push into an SImode push so that the
- ;; define_peephole2 below can cram multiple pushes into one stm.l.
- 
- (define_peephole2
-   [(parallel [(set (reg:SI SP_REG)
-                    (plus:SI (reg:SI SP_REG) (const_int -4)))
-               (set (mem:HI (plus:SI (reg:SI SP_REG) (const_int -2)))
-                    (match_operand:HI 0 "register_operand" ""))])]
-   "TARGET_H8300S && !TARGET_NORMAL_MODE && REGNO (operands[0]) != SP_REG"
-   [(set (mem:SI (pre_dec:SI (reg:SI SP_REG)))
- 	(match_dup 0))]
-   {
-     operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));
-   })
- 
- (define_peephole2
-   [(parallel [(set (reg:HI SP_REG)
-                    (plus:HI (reg:HI SP_REG) (const_int -4)))
-               (set (mem:HI (plus:HI (reg:HI SP_REG) (const_int -2)))
-                    (match_operand:HI 0 "register_operand" ""))])]
-   "TARGET_H8300S && TARGET_NORMAL_MODE && REGNO (operands[0]) != SP_REG"
-   [(set (mem:SI (pre_dec:HI (reg:HI SP_REG)))
- 	(match_dup 0))]
-   {
-     operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));
-   })
- 
  ;; Cram four pushes into stm.l.
  
  (define_peephole2
--- 4080,4085 ----
***************
*** 4519,4524 ****
--- 4299,4305 ----
  	(plus:SI (match_dup 0)
  		 (match_operand:SI 2 "const_int_operand" "")))]
    "(TARGET_H8300H || TARGET_H8300S)
+     && operands[0] != stack_pointer_rtx
      && REG_P (operands[0]) && REG_P (operands[1])
      && REGNO (operands[0]) != REGNO (operands[1])
      && !satisfies_constraint_L (operands[2])
***************
*** 5586,5649 ****
    {
      operands[5] = GEN_INT (- INTVAL (operands[1]));
    })
- ;; Narrow the mode of testing if possible.
- 
- (define_peephole2
-   [(set (match_operand:HI 0 "register_operand" "")
- 	(and:HI (match_dup 0)
- 		(match_operand:HI 1 "const_int_qi_operand" "")))
-    (set (cc0) (compare (match_dup 0)
- 		       (const_int 0)))
-    (set (pc)
- 	(if_then_else (match_operator 3 "eqne_operator"
- 		       [(cc0) (const_int 0)])
- 		      (label_ref (match_operand 2 "" ""))
- 		      (pc)))]
-   "peep2_reg_dead_p (2, operands[0])"
-   [(set (match_dup 4)
- 	(and:QI (match_dup 4)
- 		(match_dup 5)))
-    (set (cc0) (compare (match_dup 4)
- 		       (const_int 0)))
-    (set (pc)
- 	(if_then_else (match_op_dup 3 [(cc0) (const_int 0)])
- 		      (label_ref (match_dup 2))
- 		      (pc)))]
-   {
-     operands[4] = gen_rtx_REG (QImode, REGNO (operands[0]));
-     operands[5] = gen_int_mode (INTVAL (operands[1]), QImode);
-   })
  
! (define_peephole2
!   [(set (match_operand:SI 0 "register_operand" "")
! 	(and:SI (match_dup 0)
! 		(match_operand:SI 1 "const_int_qi_operand" "")))
!    (set (cc0) (compare (match_dup 0)
! 		       (const_int 0)))
!    (set (pc)
! 	(if_then_else (match_operator 3 "eqne_operator"
! 		       [(cc0) (const_int 0)])
! 		      (label_ref (match_operand 2 "" ""))
! 		      (pc)))]
!   "peep2_reg_dead_p (2, operands[0])"
!   [(set (match_dup 4)
! 	(and:QI (match_dup 4)
! 		(match_dup 5)))
!    (set (cc0) (compare (match_dup 4)
! 		       (const_int 0)))
!    (set (pc)
! 	(if_then_else (match_op_dup 3 [(cc0) (const_int 0)])
! 		      (label_ref (match_dup 2))
! 		      (pc)))]
!   {
!     operands[4] = gen_rtx_REG (QImode, REGNO (operands[0]));
!     operands[5] = gen_int_mode (INTVAL (operands[1]), QImode);
!   })
  
  (define_peephole2
!   [(set (match_operand:SI 0 "register_operand" "")
! 	(and:SI (match_dup 0)
! 		(match_operand:SI 1 "const_int_hi_operand" "")))
     (set (cc0) (compare (match_dup 0)
  		       (const_int 0)))
     (set (pc)
--- 5367,5379 ----
    {
      operands[5] = GEN_INT (- INTVAL (operands[1]));
    })
  
! ;; Narrow the mode of testing if possible.
  
  (define_peephole2
!   [(set (match_operand:HSI 0 "register_operand" "")
! 	(and:HSI (match_dup 0)
! 		 (match_operand:HSI 1 "const_int_operand" "")))
     (set (cc0) (compare (match_dup 0)
  		       (const_int 0)))
     (set (pc)
***************
*** 5651,5660 ****
  		       [(cc0) (const_int 0)])
  		      (label_ref (match_operand 2 "" ""))
  		      (pc)))]
!   "peep2_reg_dead_p (2, operands[0])"
!   [(set (match_dup 4)
! 	(and:HI (match_dup 4)
! 		(match_dup 5)))
     (set (cc0) (compare (match_dup 4)
  		       (const_int 0)))
     (set (pc)
--- 5381,5391 ----
  		       [(cc0) (const_int 0)])
  		      (label_ref (match_operand 2 "" ""))
  		      (pc)))]
!   "((const_int_qi_operand (operands[1], QImode)
!      || (GET_MODE (operands[0]) == SImode
! 	 && const_int_hi_operand (operands[1], HImode)))
!     && peep2_reg_dead_p (2, operands[0]))"
!   [(set (match_dup 4) (match_dup 6))
     (set (cc0) (compare (match_dup 4)
  		       (const_int 0)))
     (set (pc)
***************
*** 5662,5703 ****
  		      (label_ref (match_dup 2))
  		      (pc)))]
    {
!     operands[4] = gen_rtx_REG (HImode, REGNO (operands[0]));
!     operands[5] = gen_int_mode (INTVAL (operands[1]), HImode);
!   })
  
! (define_peephole2
!   [(set (match_operand:SI 0 "register_operand" "")
! 	(and:SI (match_dup 0)
! 		(match_operand:SI 1 "const_int_qi_operand" "")))
!    (set (match_dup 0)
! 	(xor:SI (match_dup 0)
! 		(match_operand:SI 2 "const_int_qi_operand" "")))
!    (set (cc0) (compare (match_dup 0)
! 		       (const_int 0)))
!    (set (pc)
! 	(if_then_else (match_operator 4 "eqne_operator"
! 		       [(cc0) (const_int 0)])
! 		      (label_ref (match_operand 3 "" ""))
! 		      (pc)))]
!   "peep2_reg_dead_p (3, operands[0])
!    && (~INTVAL (operands[1]) & INTVAL (operands[2])) == 0"
!   [(set (match_dup 5)
! 	(and:QI (match_dup 5)
! 		(match_dup 6)))
!    (set (match_dup 5)
! 	(xor:QI (match_dup 5)
! 		(match_dup 7)))
!    (set (cc0) (compare (match_dup 5)
! 		       (const_int 0)))
!    (set (pc)
! 	(if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
! 		      (label_ref (match_dup 3))
! 		      (pc)))]
!   {
!     operands[5] = gen_rtx_REG (QImode, REGNO (operands[0]));
!     operands[6] = gen_int_mode (INTVAL (operands[1]), QImode);
!     operands[7] = gen_int_mode (INTVAL (operands[2]), QImode);
    })
  
  ;; These triggers right at the end of allocation of locals in the
--- 5393,5404 ----
  		      (label_ref (match_dup 2))
  		      (pc)))]
    {
!     enum machine_mode mode;
  
!     mode = const_int_qi_operand (operands[1], QImode) ? QImode : HImode;
!     operands[4] = gen_rtx_REG (mode, REGNO (operands[0]));
!     operands[5] = gen_int_mode (INTVAL (operands[1]), mode);
!     operands[6] = gen_rtx_AND (mode, operands[4], operands[5]);
    })
  
  ;; These triggers right at the end of allocation of locals in the
***************
*** 5745,5813 ****
  
  ;; Transform
  ;;
- ;;	mov	dst,reg
- ;;	op	src,reg
- ;;	mov	reg,dst
- ;;
- ;; into
- ;;
- ;;	op	src,dst
- ;;
- ;; if "reg" dies at the end of the sequence.
- 
- (define_peephole2
-   [(set (match_operand 0 "register_operand" "")
- 	(match_operand 1 "memory_operand" ""))
-    (set (match_dup 0)
- 	(match_operator 2 "h8sx_binary_memory_operator"
- 	 [(match_dup 0)
- 	  (match_operand 3 "h8300_src_operand" "")]))
-    (set (match_operand 4 "memory_operand" "")
- 	(match_dup 0))]
-   "0 /* Disable because it breaks compiling fp-bit.c.  */
-    && TARGET_H8300SX
-    && peep2_reg_dead_p (3, operands[0])
-    && !reg_overlap_mentioned_p (operands[0], operands[3])
-    && !reg_overlap_mentioned_p (operands[0], operands[4])
-    && h8sx_mergeable_memrefs_p (operands[4], operands[1])"
-   [(set (match_dup 4)
- 	(match_dup 5))]
-   {
-     operands[5] = shallow_copy_rtx (operands[2]);
-     XEXP (operands[5], 0) = operands[1];
-   })
- 
- ;; Transform
- ;;
- ;;	mov	src,reg
- ;;	op	reg,dst
- ;;
- ;; into
- ;;
- ;;	op	src,dst
- ;;
- ;; if "reg" dies in the second insn.
- 
- (define_peephole2
-   [(set (match_operand 0 "register_operand" "")
- 	(match_operand 1 "h8300_src_operand" ""))
-    (set (match_operand 2 "h8300_dst_operand" "")
- 	(match_operator 3 "h8sx_binary_memory_operator"
- 	 [(match_operand 4 "h8300_dst_operand" "")
- 	  (match_dup 0)]))]
-   "0 /* Disable because it breaks compiling fp-bit.c.  */
-    && TARGET_H8300SX
-    && peep2_reg_dead_p (2, operands[0])
-    && !reg_overlap_mentioned_p (operands[0], operands[4])"
-   [(set (match_dup 2)
- 	(match_dup 5))]
-   {
-     operands[5] = shallow_copy_rtx (operands[3]);
-     XEXP (operands[5], 1) = operands[1];
-   })
- 
- ;; Transform
- ;;
  ;;	mov	dst,reg
  ;;	op	reg
  ;;	mov	reg,dst
--- 5446,5451 ----
diff -Nrcpad gcc-9.3.0/gcc/config/h8300/h8300.opt gcc-10.1.0/gcc/config/h8300/h8300.opt
*** gcc-9.3.0/gcc/config/h8300/h8300.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/h8300/h8300.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the Renesas H8/300 port of the compiler
  ;
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for the Renesas H8/300 port of the compiler
  ;
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/h8300/linux.h gcc-10.1.0/gcc/config/h8300/linux.h
*** gcc-9.3.0/gcc/config/h8300/linux.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/h8300/linux.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for GNU compiler.
     Renesas H8/300 (linux variant)
!    Copyright (C) 2015-2019 Free Software Foundation, Inc.
     Contributed by Yoshinori Sato <ysato@users.sourceforge.jp>
  
  This file is part of GCC.
--- 1,6 ----
  /* Definitions of target machine for GNU compiler.
     Renesas H8/300 (linux variant)
!    Copyright (C) 2015-2020 Free Software Foundation, Inc.
     Contributed by Yoshinori Sato <ysato@users.sourceforge.jp>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/h8300/mova.md gcc-10.1.0/gcc/config/h8300/mova.md
*** gcc-9.3.0/gcc/config/h8300/mova.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/h8300/mova.md	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ;; -*- buffer-read-only: t -*-
  ;; Generated automatically from genmova.sh
! ;; Copyright (C) 2004-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,6 ----
  ;; -*- buffer-read-only: t -*-
  ;; Generated automatically from genmova.sh
! ;; Copyright (C) 2004-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/h8300/predicates.md gcc-10.1.0/gcc/config/h8300/predicates.md
*** gcc-9.3.0/gcc/config/h8300/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/h8300/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicate definitions for Renesas H8/300.
! ;; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Predicate definitions for Renesas H8/300.
! ;; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/h8300/t-h8300 gcc-10.1.0/gcc/config/h8300/t-h8300
*** gcc-9.3.0/gcc/config/h8300/t-h8300	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/h8300/t-h8300	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 1993-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 1993-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/h8300/t-linux gcc-10.1.0/gcc/config/h8300/t-linux
*** gcc-9.3.0/gcc/config/h8300/t-linux	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/h8300/t-linux	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! # Copyright (C) 2015-2019 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
--- 1,4 ----
! # Copyright (C) 2015-2020 Free Software Foundation, Inc.
  #
  # This file is part of GCC.
  #
diff -Nrcpad gcc-9.3.0/gcc/config/host-darwin.c gcc-10.1.0/gcc/config/host-darwin.c
*** gcc-9.3.0/gcc/config/host-darwin.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/host-darwin.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Darwin host-specific hook definitions.
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Darwin host-specific hook definitions.
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/host-darwin.h gcc-10.1.0/gcc/config/host-darwin.h
*** gcc-9.3.0/gcc/config/host-darwin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/host-darwin.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Darwin host-specific hook definitions.
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Darwin host-specific hook definitions.
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/host-hpux.c gcc-10.1.0/gcc/config/host-hpux.c
*** gcc-9.3.0/gcc/config/host-hpux.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/host-hpux.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* HP-UX host-specific hook definitions.
!    Copyright (C) 2004-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* HP-UX host-specific hook definitions.
!    Copyright (C) 2004-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/host-linux.c gcc-10.1.0/gcc/config/host-linux.c
*** gcc-9.3.0/gcc/config/host-linux.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/host-linux.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Linux host-specific hook definitions.
!    Copyright (C) 2004-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Linux host-specific hook definitions.
!    Copyright (C) 2004-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
***************
*** 96,101 ****
--- 96,103 ----
  # define TRY_EMPTY_VM_SPACE	0x8000000000
  #elif defined(__mips__)
  # define TRY_EMPTY_VM_SPACE	0x60000000
+ #elif defined(__riscv) && defined (__LP64__)
+ # define TRY_EMPTY_VM_SPACE	0x1000000000
  #else
  # define TRY_EMPTY_VM_SPACE	0
  #endif
diff -Nrcpad gcc-9.3.0/gcc/config/host-netbsd.c gcc-10.1.0/gcc/config/host-netbsd.c
*** gcc-9.3.0/gcc/config/host-netbsd.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/host-netbsd.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* NetBSD host-specific hook definitions.
!    Copyright (C) 2004-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* NetBSD host-specific hook definitions.
!    Copyright (C) 2004-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/host-openbsd.c gcc-10.1.0/gcc/config/host-openbsd.c
*** gcc-9.3.0/gcc/config/host-openbsd.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/host-openbsd.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* OpenBSD host-specific hook definitions.
!    Copyright (C) 2004-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* OpenBSD host-specific hook definitions.
!    Copyright (C) 2004-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/host-solaris.c gcc-10.1.0/gcc/config/host-solaris.c
*** gcc-9.3.0/gcc/config/host-solaris.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/host-solaris.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Solaris host-specific hook definitions.
!    Copyright (C) 2004-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Solaris host-specific hook definitions.
!    Copyright (C) 2004-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/hpux11.opt gcc-10.1.0/gcc/config/hpux11.opt
*** gcc-9.3.0/gcc/config/hpux11.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/hpux11.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; HP-UX 11 options.
  
! ; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; HP-UX 11 options.
  
! ; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/adxintrin.h gcc-10.1.0/gcc/config/i386/adxintrin.h
*** gcc-9.3.0/gcc/config/i386/adxintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/adxintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/ammintrin.h gcc-10.1.0/gcc/config/i386/ammintrin.h
*** gcc-9.3.0/gcc/config/i386/ammintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/ammintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2007-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2007-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/athlon.md gcc-10.1.0/gcc/config/i386/athlon.md
*** gcc-9.3.0/gcc/config/i386/athlon.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/athlon.md	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! ;; Copyright (C) 2002-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,4 ----
! ;; Copyright (C) 2002-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/atom.md gcc-10.1.0/gcc/config/i386/atom.md
*** gcc-9.3.0/gcc/config/i386/atom.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/atom.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Atom Scheduling
! ;; Copyright (C) 2009-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Atom Scheduling
! ;; Copyright (C) 2009-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/att.h gcc-10.1.0/gcc/config/i386/att.h
*** gcc-9.3.0/gcc/config/i386/att.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/att.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for AT&T assembler syntax for the Intel 80386.
!    Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for AT&T assembler syntax for the Intel 80386.
!    Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx2intrin.h gcc-10.1.0/gcc/config/i386/avx2intrin.h
*** gcc-9.3.0/gcc/config/i386/avx2intrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx2intrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** _mm256_mask_i64gather_epi32 (__m128i __s
*** 1670,1903 ****
  #else /* __OPTIMIZE__ */
  #define _mm_i32gather_pd(BASE, INDEX, SCALE)				\
    (__m128d) __builtin_ia32_gathersiv2df ((__v2df) _mm_setzero_pd (),	\
! 					 (double const *)BASE,		\
! 					 (__v4si)(__m128i)INDEX,	\
! 					 (__v2df)_mm_set1_pd(		\
! 					   (double)(long long int) -1), \
! 					 (int)SCALE)
  
! #define _mm_mask_i32gather_pd(SRC, BASE, INDEX, MASK, SCALE)	 \
!   (__m128d) __builtin_ia32_gathersiv2df ((__v2df)(__m128d)SRC,	 \
! 					 (double const *)BASE,	 \
! 					 (__v4si)(__m128i)INDEX, \
! 					 (__v2df)(__m128d)MASK,	 \
! 					 (int)SCALE)
  
  #define _mm256_i32gather_pd(BASE, INDEX, SCALE)				\
    (__m256d) __builtin_ia32_gathersiv4df ((__v4df) _mm256_setzero_pd (),	\
! 					 (double const *)BASE,		\
! 					 (__v4si)(__m128i)INDEX,	\
! 					 (__v4df)_mm256_set1_pd(	\
! 					   (double)(long long int) -1), \
! 					 (int)SCALE)
  
! #define _mm256_mask_i32gather_pd(SRC, BASE, INDEX, MASK, SCALE)	 \
!   (__m256d) __builtin_ia32_gathersiv4df ((__v4df)(__m256d)SRC,	 \
! 					 (double const *)BASE,	 \
! 					 (__v4si)(__m128i)INDEX, \
! 					 (__v4df)(__m256d)MASK,	 \
! 					 (int)SCALE)
  
  #define _mm_i64gather_pd(BASE, INDEX, SCALE)				\
    (__m128d) __builtin_ia32_gatherdiv2df ((__v2df) _mm_setzero_pd (),	\
! 					 (double const *)BASE,		\
! 					 (__v2di)(__m128i)INDEX,	\
! 					 (__v2df)_mm_set1_pd(		\
! 					   (double)(long long int) -1), \
! 					 (int)SCALE)
  
! #define _mm_mask_i64gather_pd(SRC, BASE, INDEX, MASK, SCALE)	 \
!   (__m128d) __builtin_ia32_gatherdiv2df ((__v2df)(__m128d)SRC,	 \
! 					 (double const *)BASE,	 \
! 					 (__v2di)(__m128i)INDEX, \
! 					 (__v2df)(__m128d)MASK,	 \
! 					 (int)SCALE)
  
  #define _mm256_i64gather_pd(BASE, INDEX, SCALE)				\
    (__m256d) __builtin_ia32_gatherdiv4df ((__v4df) _mm256_setzero_pd (),	\
! 					 (double const *)BASE,		\
! 					 (__v4di)(__m256i)INDEX,	\
! 					 (__v4df)_mm256_set1_pd(	\
! 					   (double)(long long int) -1), \
! 					 (int)SCALE)
  
! #define _mm256_mask_i64gather_pd(SRC, BASE, INDEX, MASK, SCALE)	 \
!   (__m256d) __builtin_ia32_gatherdiv4df ((__v4df)(__m256d)SRC,	 \
! 					 (double const *)BASE,	 \
! 					 (__v4di)(__m256i)INDEX, \
! 					 (__v4df)(__m256d)MASK,	 \
! 					 (int)SCALE)
  
  #define _mm_i32gather_ps(BASE, INDEX, SCALE)				\
    (__m128) __builtin_ia32_gathersiv4sf ((__v4sf) _mm_setzero_ps (),	\
! 					(float const *)BASE,		\
! 					(__v4si)(__m128i)INDEX,		\
! 					_mm_set1_ps ((float)(int) -1),	\
! 					(int)SCALE)
  
! #define _mm_mask_i32gather_ps(SRC, BASE, INDEX, MASK, SCALE)	 \
!   (__m128) __builtin_ia32_gathersiv4sf ((__v4sf)(__m128)SRC,	 \
! 					(float const *)BASE,	 \
! 					(__v4si)(__m128i)INDEX,	 \
! 					(__v4sf)(__m128)MASK,	 \
! 					(int)SCALE)
  
! #define _mm256_i32gather_ps(BASE, INDEX, SCALE)			       \
!   (__m256) __builtin_ia32_gathersiv8sf ((__v8sf) _mm256_setzero_ps (), \
! 					(float const *)BASE,	       \
! 					(__v8si)(__m256i)INDEX,	       \
! 					(__v8sf)_mm256_set1_ps (       \
! 					  (float)(int) -1),	       \
! 					(int)SCALE)
  
! #define _mm256_mask_i32gather_ps(SRC, BASE, INDEX, MASK, SCALE) \
!   (__m256) __builtin_ia32_gathersiv8sf ((__v8sf)(__m256)SRC,	\
! 					(float const *)BASE,	\
! 					(__v8si)(__m256i)INDEX, \
! 					(__v8sf)(__m256)MASK,	\
! 					(int)SCALE)
  
  #define _mm_i64gather_ps(BASE, INDEX, SCALE)				\
    (__m128) __builtin_ia32_gatherdiv4sf ((__v4sf) _mm_setzero_pd (),	\
! 					(float const *)BASE,		\
! 					(__v2di)(__m128i)INDEX,		\
! 					(__v4sf)_mm_set1_ps (		\
! 					  (float)(int) -1),		\
! 					(int)SCALE)
  
! #define _mm_mask_i64gather_ps(SRC, BASE, INDEX, MASK, SCALE)	 \
!   (__m128) __builtin_ia32_gatherdiv4sf ((__v4sf)(__m128)SRC,	 \
! 					(float const *)BASE,	 \
! 					(__v2di)(__m128i)INDEX,	 \
! 					(__v4sf)(__m128)MASK,	 \
! 					(int)SCALE)
  
  #define _mm256_i64gather_ps(BASE, INDEX, SCALE)				\
    (__m128) __builtin_ia32_gatherdiv4sf256 ((__v4sf) _mm_setzero_ps (),	\
! 					   (float const *)BASE,		\
! 					   (__v4di)(__m256i)INDEX,	\
! 					   (__v4sf)_mm_set1_ps(		\
! 					     (float)(int) -1),		\
! 					   (int)SCALE)
  
! #define _mm256_mask_i64gather_ps(SRC, BASE, INDEX, MASK, SCALE)	   \
!   (__m128) __builtin_ia32_gatherdiv4sf256 ((__v4sf)(__m128)SRC,	   \
! 					   (float const *)BASE,	   \
! 					   (__v4di)(__m256i)INDEX, \
! 					   (__v4sf)(__m128)MASK,   \
! 					   (int)SCALE)
  
  #define _mm_i32gather_epi64(BASE, INDEX, SCALE)				\
    (__m128i) __builtin_ia32_gathersiv2di ((__v2di) _mm_setzero_si128 (), \
! 					 (long long const *)BASE,	\
! 					 (__v4si)(__m128i)INDEX,	\
  					 (__v2di)_mm_set1_epi64x (-1),	\
! 					 (int)SCALE)
  
! #define _mm_mask_i32gather_epi64(SRC, BASE, INDEX, MASK, SCALE)	  \
!   (__m128i) __builtin_ia32_gathersiv2di ((__v2di)(__m128i)SRC,	  \
! 					 (long long const *)BASE, \
! 					 (__v4si)(__m128i)INDEX,  \
! 					 (__v2di)(__m128i)MASK,	  \
! 					 (int)SCALE)
  
  #define _mm256_i32gather_epi64(BASE, INDEX, SCALE)			   \
    (__m256i) __builtin_ia32_gathersiv4di ((__v4di) _mm256_setzero_si256 (), \
! 					 (long long const *)BASE,	   \
! 					 (__v4si)(__m128i)INDEX,	   \
  					 (__v4di)_mm256_set1_epi64x (-1),  \
! 					 (int)SCALE)
  
! #define _mm256_mask_i32gather_epi64(SRC, BASE, INDEX, MASK, SCALE) \
!   (__m256i) __builtin_ia32_gathersiv4di ((__v4di)(__m256i)SRC,	   \
! 					 (long long const *)BASE,  \
! 					 (__v4si)(__m128i)INDEX,   \
! 					 (__v4di)(__m256i)MASK,	   \
! 					 (int)SCALE)
  
  #define _mm_i64gather_epi64(BASE, INDEX, SCALE)				\
    (__m128i) __builtin_ia32_gatherdiv2di ((__v2di) _mm_setzero_si128 (), \
! 					 (long long const *)BASE,	\
! 					 (__v2di)(__m128i)INDEX,	\
  					 (__v2di)_mm_set1_epi64x (-1),	\
! 					 (int)SCALE)
  
! #define _mm_mask_i64gather_epi64(SRC, BASE, INDEX, MASK, SCALE)	  \
!   (__m128i) __builtin_ia32_gatherdiv2di ((__v2di)(__m128i)SRC,	  \
! 					 (long long const *)BASE, \
! 					 (__v2di)(__m128i)INDEX,  \
! 					 (__v2di)(__m128i)MASK,	  \
! 					 (int)SCALE)
  
  #define _mm256_i64gather_epi64(BASE, INDEX, SCALE)			   \
    (__m256i) __builtin_ia32_gatherdiv4di ((__v4di) _mm256_setzero_si256 (), \
! 					 (long long const *)BASE,	   \
! 					 (__v4di)(__m256i)INDEX,	   \
  					 (__v4di)_mm256_set1_epi64x (-1),  \
! 					 (int)SCALE)
  
! #define _mm256_mask_i64gather_epi64(SRC, BASE, INDEX, MASK, SCALE) \
!   (__m256i) __builtin_ia32_gatherdiv4di ((__v4di)(__m256i)SRC,	   \
! 					 (long long const *)BASE,  \
! 					 (__v4di)(__m256i)INDEX,   \
! 					 (__v4di)(__m256i)MASK,	   \
! 					 (int)SCALE)
  
  #define _mm_i32gather_epi32(BASE, INDEX, SCALE)				\
    (__m128i) __builtin_ia32_gathersiv4si ((__v4si) _mm_setzero_si128 (),	\
! 					 (int const *)BASE,		\
! 					 (__v4si)(__m128i)INDEX,	\
  					 (__v4si)_mm_set1_epi32 (-1),	\
! 					 (int)SCALE)
  
! #define _mm_mask_i32gather_epi32(SRC, BASE, INDEX, MASK, SCALE) \
!   (__m128i) __builtin_ia32_gathersiv4si ((__v4si)(__m128i)SRC,	\
! 					(int const *)BASE,	\
! 					(__v4si)(__m128i)INDEX, \
! 					(__v4si)(__m128i)MASK,	\
! 					(int)SCALE)
  
  #define _mm256_i32gather_epi32(BASE, INDEX, SCALE)			   \
    (__m256i) __builtin_ia32_gathersiv8si ((__v8si) _mm256_setzero_si256 (), \
! 					 (int const *)BASE,		   \
! 					 (__v8si)(__m256i)INDEX,	   \
  					 (__v8si)_mm256_set1_epi32 (-1),   \
! 					 (int)SCALE)
  
! #define _mm256_mask_i32gather_epi32(SRC, BASE, INDEX, MASK, SCALE) \
!   (__m256i) __builtin_ia32_gathersiv8si ((__v8si)(__m256i)SRC,	   \
! 					(int const *)BASE,	   \
! 					(__v8si)(__m256i)INDEX,	   \
! 					(__v8si)(__m256i)MASK,	   \
! 					(int)SCALE)
  
  #define _mm_i64gather_epi32(BASE, INDEX, SCALE)				\
    (__m128i) __builtin_ia32_gatherdiv4si ((__v4si) _mm_setzero_si128 (),	\
! 					 (int const *)BASE,		\
! 					 (__v2di)(__m128i)INDEX,	\
  					 (__v4si)_mm_set1_epi32 (-1),	\
! 					 (int)SCALE)
  
! #define _mm_mask_i64gather_epi32(SRC, BASE, INDEX, MASK, SCALE) \
!   (__m128i) __builtin_ia32_gatherdiv4si ((__v4si)(__m128i)SRC,	\
! 					(int const *)BASE,	\
! 					(__v2di)(__m128i)INDEX, \
! 					(__v4si)(__m128i)MASK,	\
! 					(int)SCALE)
  
  #define _mm256_i64gather_epi32(BASE, INDEX, SCALE)			   \
    (__m128i) __builtin_ia32_gatherdiv4si256 ((__v4si) _mm_setzero_si128 (), \
! 					    (int const *)BASE,		   \
! 					    (__v4di)(__m256i)INDEX,	   \
  					    (__v4si)_mm_set1_epi32(-1),	   \
! 					    (int)SCALE)
  
! #define _mm256_mask_i64gather_epi32(SRC, BASE, INDEX, MASK, SCALE) \
!   (__m128i) __builtin_ia32_gatherdiv4si256 ((__v4si)(__m128i)SRC,  \
! 					   (int const *)BASE,	   \
! 					   (__v4di)(__m256i)INDEX, \
! 					   (__v4si)(__m128i)MASK,  \
! 					   (int)SCALE)
  #endif  /* __OPTIMIZE__ */
  
  #ifdef __DISABLE_AVX2__
--- 1670,1915 ----
  #else /* __OPTIMIZE__ */
  #define _mm_i32gather_pd(BASE, INDEX, SCALE)				\
    (__m128d) __builtin_ia32_gathersiv2df ((__v2df) _mm_setzero_pd (),	\
! 					 (double const *) (BASE),	\
! 					 (__v4si)(__m128i) (INDEX),	\
! 					 (__v2df)			\
! 					 _mm_cmpeq_pd (_mm_setzero_pd (),\
! 						       _mm_setzero_pd ()),\
! 					 (int) (SCALE))
  
! #define _mm_mask_i32gather_pd(SRC, BASE, INDEX, MASK, SCALE)	 	\
!   (__m128d) __builtin_ia32_gathersiv2df ((__v2df)(__m128d) (SRC),	\
! 					 (double const *) (BASE),	\
! 					 (__v4si)(__m128i) (INDEX),	\
! 					 (__v2df)(__m128d) (MASK),	\
! 					 (int) (SCALE))
  
  #define _mm256_i32gather_pd(BASE, INDEX, SCALE)				\
    (__m256d) __builtin_ia32_gathersiv4df ((__v4df) _mm256_setzero_pd (),	\
! 					 (double const *) (BASE),	\
! 					 (__v4si)(__m128i) (INDEX),	\
! 					 (__v4df)			\
! 					 _mm256_cmp_pd (_mm256_setzero_pd (),\
! 							_mm256_setzero_pd (),\
! 							_CMP_EQ_OQ),	\
! 					 (int) (SCALE))
  
! #define _mm256_mask_i32gather_pd(SRC, BASE, INDEX, MASK, SCALE)		\
!   (__m256d) __builtin_ia32_gathersiv4df ((__v4df)(__m256d) (SRC),	\
! 					 (double const *) (BASE),	\
! 					 (__v4si)(__m128i) (INDEX),	\
! 					 (__v4df)(__m256d) (MASK),	\
! 					 (int) (SCALE))
  
  #define _mm_i64gather_pd(BASE, INDEX, SCALE)				\
    (__m128d) __builtin_ia32_gatherdiv2df ((__v2df) _mm_setzero_pd (),	\
! 					 (double const *) (BASE),	\
! 					 (__v2di)(__m128i) (INDEX),	\
! 					 (__v2df)			\
! 					 _mm_cmpeq_pd (_mm_setzero_pd (),\
! 						       _mm_setzero_pd ()),\
! 					 (int) (SCALE))
  
! #define _mm_mask_i64gather_pd(SRC, BASE, INDEX, MASK, SCALE)		\
!   (__m128d) __builtin_ia32_gatherdiv2df ((__v2df)(__m128d) (SRC),	\
! 					 (double const *) (BASE),	\
! 					 (__v2di)(__m128i) (INDEX),	\
! 					 (__v2df)(__m128d) (MASK),	\
! 					 (int) (SCALE))
  
  #define _mm256_i64gather_pd(BASE, INDEX, SCALE)				\
    (__m256d) __builtin_ia32_gatherdiv4df ((__v4df) _mm256_setzero_pd (),	\
! 					 (double const *) (BASE),	\
! 					 (__v4di)(__m256i) (INDEX),	\
! 					 (__v4df)			\
! 					 _mm256_cmp_pd (_mm256_setzero_pd (),\
! 							_mm256_setzero_pd (),\
! 							_CMP_EQ_OQ),	\
! 					 (int) (SCALE))
  
! #define _mm256_mask_i64gather_pd(SRC, BASE, INDEX, MASK, SCALE)	 	\
!   (__m256d) __builtin_ia32_gatherdiv4df ((__v4df)(__m256d) (SRC),	\
! 					 (double const *) (BASE),	\
! 					 (__v4di)(__m256i) (INDEX),	\
! 					 (__v4df)(__m256d) (MASK),	\
! 					 (int) (SCALE))
  
  #define _mm_i32gather_ps(BASE, INDEX, SCALE)				\
    (__m128) __builtin_ia32_gathersiv4sf ((__v4sf) _mm_setzero_ps (),	\
! 					(float const *) (BASE),		\
! 					(__v4si)(__m128i) (INDEX),	\
! 					(__v4sf)			\
! 					_mm_cmpeq_ps (_mm_setzero_ps (),\
! 						      _mm_setzero_ps ()),\
! 					(int) (SCALE))
  
! #define _mm_mask_i32gather_ps(SRC, BASE, INDEX, MASK, SCALE)	 	\
!   (__m128) __builtin_ia32_gathersiv4sf ((__v4sf)(__m128) (SRC),		\
! 					(float const *) (BASE),		\
! 					(__v4si)(__m128i) (INDEX),	\
! 					(__v4sf)(__m128) (MASK),	\
! 					(int) (SCALE))
  
! #define _mm256_i32gather_ps(BASE, INDEX, SCALE)				\
!   (__m256) __builtin_ia32_gathersiv8sf ((__v8sf) _mm256_setzero_ps (),	\
! 					(float const *) (BASE),		\
! 					(__v8si)(__m256i) (INDEX),	\
! 					(__v8sf)			\
! 					_mm256_cmp_ps (_mm256_setzero_ps (),\
! 						       _mm256_setzero_ps (),\
! 						       _CMP_EQ_OQ),	\
! 					(int) (SCALE))
  
! #define _mm256_mask_i32gather_ps(SRC, BASE, INDEX, MASK, SCALE)		\
!   (__m256) __builtin_ia32_gathersiv8sf ((__v8sf)(__m256) (SRC),		\
! 					(float const *) (BASE),		\
! 					(__v8si)(__m256i) (INDEX),	\
! 					(__v8sf)(__m256) (MASK),	\
! 					(int) (SCALE))
  
  #define _mm_i64gather_ps(BASE, INDEX, SCALE)				\
    (__m128) __builtin_ia32_gatherdiv4sf ((__v4sf) _mm_setzero_pd (),	\
! 					(float const *) (BASE),		\
! 					(__v2di)(__m128i) (INDEX),	\
! 					(__v4sf)			\
! 					_mm_cmpeq_ps (_mm_setzero_ps (),\
! 						      _mm_setzero_ps ()),\
! 					(int) (SCALE))
  
! #define _mm_mask_i64gather_ps(SRC, BASE, INDEX, MASK, SCALE)		\
!   (__m128) __builtin_ia32_gatherdiv4sf ((__v4sf)(__m128) (SRC),		\
! 					(float const *) (BASE),		\
! 					(__v2di)(__m128i) (INDEX),	\
! 					(__v4sf)(__m128) (MASK),	\
! 					(int) (SCALE))
  
  #define _mm256_i64gather_ps(BASE, INDEX, SCALE)				\
    (__m128) __builtin_ia32_gatherdiv4sf256 ((__v4sf) _mm_setzero_ps (),	\
! 					   (float const *) (BASE),	\
! 					   (__v4di)(__m256i) (INDEX),	\
! 					   (__v4sf)			\
! 					   _mm_cmpeq_ps (_mm_setzero_ps (),\
! 							 _mm_setzero_ps ()),\
! 					   (int) (SCALE))
  
! #define _mm256_mask_i64gather_ps(SRC, BASE, INDEX, MASK, SCALE)	   	\
!   (__m128) __builtin_ia32_gatherdiv4sf256 ((__v4sf)(__m128) (SRC),	\
! 					   (float const *) (BASE),	\
! 					   (__v4di)(__m256i) (INDEX),	\
! 					   (__v4sf)(__m128) (MASK),	\
! 					   (int) (SCALE))
  
  #define _mm_i32gather_epi64(BASE, INDEX, SCALE)				\
    (__m128i) __builtin_ia32_gathersiv2di ((__v2di) _mm_setzero_si128 (), \
! 					 (long long const *) (BASE),	\
! 					 (__v4si)(__m128i) (INDEX),	\
  					 (__v2di)_mm_set1_epi64x (-1),	\
! 					 (int) (SCALE))
  
! #define _mm_mask_i32gather_epi64(SRC, BASE, INDEX, MASK, SCALE)	  	\
!   (__m128i) __builtin_ia32_gathersiv2di ((__v2di)(__m128i) (SRC),	\
! 					 (long long const *) (BASE),	\
! 					 (__v4si)(__m128i) (INDEX),	\
! 					 (__v2di)(__m128i) (MASK),	\
! 					 (int) (SCALE))
  
  #define _mm256_i32gather_epi64(BASE, INDEX, SCALE)			   \
    (__m256i) __builtin_ia32_gathersiv4di ((__v4di) _mm256_setzero_si256 (), \
! 					 (long long const *) (BASE),	   \
! 					 (__v4si)(__m128i) (INDEX),	   \
  					 (__v4di)_mm256_set1_epi64x (-1),  \
! 					 (int) (SCALE))
  
! #define _mm256_mask_i32gather_epi64(SRC, BASE, INDEX, MASK, SCALE)	\
!   (__m256i) __builtin_ia32_gathersiv4di ((__v4di)(__m256i) (SRC),	\
! 					 (long long const *) (BASE),	\
! 					 (__v4si)(__m128i) (INDEX),	\
! 					 (__v4di)(__m256i) (MASK),	\
! 					 (int) (SCALE))
  
  #define _mm_i64gather_epi64(BASE, INDEX, SCALE)				\
    (__m128i) __builtin_ia32_gatherdiv2di ((__v2di) _mm_setzero_si128 (), \
! 					 (long long const *) (BASE),	\
! 					 (__v2di)(__m128i) (INDEX),	\
  					 (__v2di)_mm_set1_epi64x (-1),	\
! 					 (int) (SCALE))
  
! #define _mm_mask_i64gather_epi64(SRC, BASE, INDEX, MASK, SCALE)		\
!   (__m128i) __builtin_ia32_gatherdiv2di ((__v2di)(__m128i) (SRC),	\
! 					 (long long const *) (BASE),	\
! 					 (__v2di)(__m128i) (INDEX),	\
! 					 (__v2di)(__m128i) (MASK),	\
! 					 (int) (SCALE))
  
  #define _mm256_i64gather_epi64(BASE, INDEX, SCALE)			   \
    (__m256i) __builtin_ia32_gatherdiv4di ((__v4di) _mm256_setzero_si256 (), \
! 					 (long long const *) (BASE),	   \
! 					 (__v4di)(__m256i) (INDEX),	   \
  					 (__v4di)_mm256_set1_epi64x (-1),  \
! 					 (int) (SCALE))
  
! #define _mm256_mask_i64gather_epi64(SRC, BASE, INDEX, MASK, SCALE) 	\
!   (__m256i) __builtin_ia32_gatherdiv4di ((__v4di)(__m256i) (SRC),	\
! 					 (long long const *) (BASE),	\
! 					 (__v4di)(__m256i) (INDEX),	\
! 					 (__v4di)(__m256i) (MASK),	\
! 					 (int) (SCALE))
  
  #define _mm_i32gather_epi32(BASE, INDEX, SCALE)				\
    (__m128i) __builtin_ia32_gathersiv4si ((__v4si) _mm_setzero_si128 (),	\
! 					 (int const *) (BASE),		\
! 					 (__v4si)(__m128i) (INDEX),	\
  					 (__v4si)_mm_set1_epi32 (-1),	\
! 					 (int) (SCALE))
  
! #define _mm_mask_i32gather_epi32(SRC, BASE, INDEX, MASK, SCALE)		\
!   (__m128i) __builtin_ia32_gathersiv4si ((__v4si)(__m128i) (SRC),	\
! 					(int const *) (BASE),		\
! 					(__v4si)(__m128i) (INDEX),	\
! 					(__v4si)(__m128i) (MASK),	\
! 					(int) (SCALE))
  
  #define _mm256_i32gather_epi32(BASE, INDEX, SCALE)			   \
    (__m256i) __builtin_ia32_gathersiv8si ((__v8si) _mm256_setzero_si256 (), \
! 					 (int const *) (BASE),		   \
! 					 (__v8si)(__m256i) (INDEX),	   \
  					 (__v8si)_mm256_set1_epi32 (-1),   \
! 					 (int) (SCALE))
  
! #define _mm256_mask_i32gather_epi32(SRC, BASE, INDEX, MASK, SCALE)	\
!   (__m256i) __builtin_ia32_gathersiv8si ((__v8si)(__m256i) (SRC),	\
! 					(int const *) (BASE),	   	\
! 					(__v8si)(__m256i) (INDEX),	\
! 					(__v8si)(__m256i) (MASK),	\
! 					(int) (SCALE))
  
  #define _mm_i64gather_epi32(BASE, INDEX, SCALE)				\
    (__m128i) __builtin_ia32_gatherdiv4si ((__v4si) _mm_setzero_si128 (),	\
! 					 (int const *) (BASE),		\
! 					 (__v2di)(__m128i) (INDEX),	\
  					 (__v4si)_mm_set1_epi32 (-1),	\
! 					 (int) (SCALE))
  
! #define _mm_mask_i64gather_epi32(SRC, BASE, INDEX, MASK, SCALE)		\
!   (__m128i) __builtin_ia32_gatherdiv4si ((__v4si)(__m128i) (SRC),	\
! 					(int const *) (BASE),		\
! 					(__v2di)(__m128i) (INDEX),	\
! 					(__v4si)(__m128i) (MASK),	\
! 					(int) (SCALE))
  
  #define _mm256_i64gather_epi32(BASE, INDEX, SCALE)			   \
    (__m128i) __builtin_ia32_gatherdiv4si256 ((__v4si) _mm_setzero_si128 (), \
! 					    (int const *) (BASE),	   \
! 					    (__v4di)(__m256i) (INDEX),	   \
  					    (__v4si)_mm_set1_epi32(-1),	   \
! 					    (int) (SCALE))
  
! #define _mm256_mask_i64gather_epi32(SRC, BASE, INDEX, MASK, SCALE)	\
!   (__m128i) __builtin_ia32_gatherdiv4si256 ((__v4si)(__m128i) (SRC),	\
! 					   (int const *) (BASE),	\
! 					   (__v4di)(__m256i) (INDEX),	\
! 					   (__v4si)(__m128i) (MASK),	\
! 					   (int) (SCALE))
  #endif  /* __OPTIMIZE__ */
  
  #ifdef __DISABLE_AVX2__
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx5124fmapsintrin.h gcc-10.1.0/gcc/config/i386/avx5124fmapsintrin.h
*** gcc-9.3.0/gcc/config/i386/avx5124fmapsintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx5124fmapsintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2015-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2015-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx5124vnniwintrin.h gcc-10.1.0/gcc/config/i386/avx5124vnniwintrin.h
*** gcc-9.3.0/gcc/config/i386/avx5124vnniwintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx5124vnniwintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2015-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2015-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512bf16intrin.h gcc-10.1.0/gcc/config/i386/avx512bf16intrin.h
*** gcc-9.3.0/gcc/config/i386/avx512bf16intrin.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/i386/avx512bf16intrin.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,118 ----
+ /* Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+ 
+    Under Section 7 of GPL version 3, you are granted additional
+    permissions described in the GCC Runtime Library Exception, version
+    3.1, as published by the Free Software Foundation.
+ 
+    You should have received a copy of the GNU General Public License and
+    a copy of the GCC Runtime Library Exception along with this program;
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef _IMMINTRIN_H_INCLUDED
+ #error "Never use <avx512bf16intrin.h> directly; include <immintrin.h> instead."
+ #endif
+ 
+ #ifndef _AVX512BF16INTRIN_H_INCLUDED
+ #define _AVX512BF16INTRIN_H_INCLUDED
+ 
+ #ifndef __AVX512BF16__
+ #pragma GCC push_options
+ #pragma GCC target("avx512bf16")
+ #define __DISABLE_AVX512BF16__
+ #endif /* __AVX512BF16__ */
+ 
+ /* Internal data types for implementing the intrinsics.  */
+ typedef short __v32bh __attribute__ ((__vector_size__ (64)));
+ 
+ /* The Intel API is flexible enough that we must allow aliasing with other
+    vector types, and their scalar components.  */
+ typedef short __m512bh __attribute__ ((__vector_size__ (64), __may_alias__));
+ 
+ /* vcvtne2ps2bf16 */
+ 
+ extern __inline __m512bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_cvtne2ps_pbh (__m512 __A, __m512 __B)
+ {
+   return (__m512bh)__builtin_ia32_cvtne2ps2bf16_v32hi(__A, __B);
+ }
+ 
+ extern __inline __m512bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_mask_cvtne2ps_pbh (__m512bh __A, __mmask32 __B, __m512 __C, __m512 __D)
+ {
+   return (__m512bh)__builtin_ia32_cvtne2ps2bf16_v32hi_mask(__C, __D, __A, __B);
+ }
+ 
+ extern __inline __m512bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_maskz_cvtne2ps_pbh (__mmask32 __A, __m512 __B, __m512 __C)
+ {
+   return (__m512bh)__builtin_ia32_cvtne2ps2bf16_v32hi_maskz(__B, __C, __A);
+ }
+ 
+ /* vcvtneps2bf16 */
+ 
+ extern __inline __m256bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_cvtneps_pbh (__m512 __A)
+ {
+   return (__m256bh)__builtin_ia32_cvtneps2bf16_v16sf(__A);
+ }
+ 
+ extern __inline __m256bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_mask_cvtneps_pbh (__m256bh __A, __mmask16 __B, __m512 __C)
+ {
+   return (__m256bh)__builtin_ia32_cvtneps2bf16_v16sf_mask(__C, __A, __B);
+ }
+ 
+ extern __inline __m256bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_maskz_cvtneps_pbh (__mmask16 __A, __m512 __B)
+ {
+   return (__m256bh)__builtin_ia32_cvtneps2bf16_v16sf_maskz(__B, __A);
+ }
+ 
+ /* vdpbf16ps */
+ 
+ extern __inline __m512
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_dpbf16_ps (__m512 __A, __m512bh __B, __m512bh __C)
+ {
+   return (__m512)__builtin_ia32_dpbf16ps_v16sf(__A, __B, __C);
+ }
+ 
+ extern __inline __m512
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_mask_dpbf16_ps (__m512 __A, __mmask16 __B, __m512bh __C, __m512bh __D)
+ {
+   return (__m512)__builtin_ia32_dpbf16ps_v16sf_mask(__A, __C, __D, __B);
+ }
+ 
+ extern __inline __m512
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_maskz_dpbf16_ps (__mmask16 __A, __m512 __B, __m512bh __C, __m512bh __D)
+ {
+   return (__m512)__builtin_ia32_dpbf16ps_v16sf_maskz(__B, __C, __D, __A);
+ }
+ 
+ #ifdef __DISABLE_AVX512BF16__
+ #undef __DISABLE_AVX512BF16__
+ #pragma GCC pop_options
+ #endif /* __DISABLE_AVX512BF16__ */
+ 
+ #endif /* _AVX512BF16INTRIN_H_INCLUDED */
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512bf16vlintrin.h gcc-10.1.0/gcc/config/i386/avx512bf16vlintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512bf16vlintrin.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/i386/avx512bf16vlintrin.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,183 ----
+ /* Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+ 
+    Under Section 7 of GPL version 3, you are granted additional
+    permissions described in the GCC Runtime Library Exception, version
+    3.1, as published by the Free Software Foundation.
+ 
+    You should have received a copy of the GNU General Public License and
+    a copy of the GCC Runtime Library Exception along with this program;
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef _IMMINTRIN_H_INCLUDED
+ #error "Never use <avx512bf16vlintrin.h> directly; include <immintrin.h> instead."
+ #endif
+ 
+ #ifndef _AVX512BF16VLINTRIN_H_INCLUDED
+ #define _AVX512BF16VLINTRIN_H_INCLUDED
+ 
+ #if !defined(__AVX512VL__) || !defined(__AVX512BF16__)
+ #pragma GCC push_options
+ #pragma GCC target("avx512bf16,avx512vl")
+ #define __DISABLE_AVX512BF16VL__
+ #endif /* __AVX512BF16__ */
+ 
+ /* Internal data types for implementing the intrinsics.  */
+ typedef short __v16bh __attribute__ ((__vector_size__ (32)));
+ typedef short __v8bh __attribute__ ((__vector_size__ (16)));
+ 
+ /* The Intel API is flexible enough that we must allow aliasing with other
+    vector types, and their scalar components.  */
+ typedef short __m256bh __attribute__ ((__vector_size__ (32), __may_alias__));
+ typedef short __m128bh __attribute__ ((__vector_size__ (16), __may_alias__));
+ 
+ /* vcvtne2ps2bf16 */
+ 
+ extern __inline __m256bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_cvtne2ps_pbh (__m256 __A, __m256 __B)
+ {
+   return (__m256bh)__builtin_ia32_cvtne2ps2bf16_v16hi(__A, __B);
+ }
+ 
+ extern __inline __m256bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_mask_cvtne2ps_pbh (__m256bh __A, __mmask16 __B, __m256 __C, __m256 __D)
+ {
+   return (__m256bh)__builtin_ia32_cvtne2ps2bf16_v16hi_mask(__C, __D, __A, __B);
+ }
+ 
+ extern __inline __m256bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_maskz_cvtne2ps_pbh (__mmask16 __A, __m256 __B, __m256 __C)
+ {
+   return (__m256bh)__builtin_ia32_cvtne2ps2bf16_v16hi_maskz(__B, __C, __A);
+ }
+ 
+ extern __inline __m128bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm_cvtne2ps_pbh (__m128 __A, __m128 __B)
+ {
+   return (__m128bh)__builtin_ia32_cvtne2ps2bf16_v8hi(__A, __B);
+ }
+ 
+ extern __inline __m128bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm_mask_cvtne2ps_pbh (__m128bh __A, __mmask8 __B, __m128 __C, __m128 __D)
+ {
+   return (__m128bh)__builtin_ia32_cvtne2ps2bf16_v8hi_mask(__C, __D, __A, __B);
+ }
+ 
+ extern __inline __m128bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm_maskz_cvtne2ps_pbh (__mmask8 __A, __m128 __B, __m128 __C)
+ {
+   return (__m128bh)__builtin_ia32_cvtne2ps2bf16_v8hi_maskz(__B, __C, __A);
+ }
+ 
+ /* vcvtneps2bf16 */
+ 
+ extern __inline __m128bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_cvtneps_pbh (__m256 __A)
+ {
+   return (__m128bh)__builtin_ia32_cvtneps2bf16_v8sf(__A);
+ }
+ 
+ extern __inline __m128bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_mask_cvtneps_pbh (__m128bh __A, __mmask8 __B, __m256 __C)
+ {
+   return (__m128bh)__builtin_ia32_cvtneps2bf16_v8sf_mask(__C, __A, __B);
+ }
+ 
+ extern __inline __m128bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_maskz_cvtneps_pbh (__mmask8 __A, __m256 __B)
+ {
+   return (__m128bh)__builtin_ia32_cvtneps2bf16_v8sf_maskz(__B, __A);
+ }
+ 
+ extern __inline __m128bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm_cvtneps_pbh (__m128 __A)
+ {
+   return (__m128bh)__builtin_ia32_cvtneps2bf16_v4sf(__A);
+ }
+ 
+ extern __inline __m128bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm_mask_cvtneps_pbh (__m128bh __A, __mmask8 __B, __m128 __C)
+ {
+   return (__m128bh)__builtin_ia32_cvtneps2bf16_v4sf_mask(__C, __A, __B);
+ }
+ 
+ extern __inline __m128bh
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm_maskz_cvtneps_pbh (__mmask8 __A, __m128 __B)
+ {
+   return (__m128bh)__builtin_ia32_cvtneps2bf16_v4sf_maskz(__B, __A);
+ }
+ 
+ /* vdpbf16ps */
+ 
+ extern __inline __m256
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_dpbf16_ps (__m256 __A, __m256bh __B, __m256bh __C)
+ {
+   return (__m256)__builtin_ia32_dpbf16ps_v8sf(__A, __B, __C);
+ }
+ 
+ extern __inline __m256
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_mask_dpbf16_ps (__m256 __A, __mmask8 __B, __m256bh __C, __m256bh __D)
+ {
+   return (__m256)__builtin_ia32_dpbf16ps_v8sf_mask(__A, __C, __D, __B);
+ }
+ 
+ extern __inline __m256
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_maskz_dpbf16_ps (__mmask8 __A, __m256 __B, __m256bh __C, __m256bh __D)
+ {
+   return (__m256)__builtin_ia32_dpbf16ps_v8sf_maskz(__B, __C, __D, __A);
+ }
+ 
+ extern __inline __m128
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm_dpbf16_ps (__m128 __A, __m128bh __B, __m128bh __C)
+ {
+   return (__m128)__builtin_ia32_dpbf16ps_v4sf(__A, __B, __C);
+ }
+ 
+ extern __inline __m128
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm_mask_dpbf16_ps (__m128 __A, __mmask8 __B, __m128bh __C, __m128bh __D)
+ {
+   return (__m128)__builtin_ia32_dpbf16ps_v4sf_mask(__A, __C, __D, __B);
+ }
+ 
+ extern __inline __m128
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm_maskz_dpbf16_ps (__mmask8 __A, __m128 __B, __m128bh __C, __m128bh __D)
+ {
+   return (__m128)__builtin_ia32_dpbf16ps_v4sf_maskz(__B, __C, __D, __A);
+ }
+ 
+ #ifdef __DISABLE_AVX512BF16VL__
+ #undef __DISABLE_AVX512BF16VL__
+ #pragma GCC pop_options
+ #endif /* __DISABLE_AVX512BF16VL__ */
+ 
+ #endif /* _AVX512BF16VLINTRIN_H_INCLUDED */
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512bitalgintrin.h gcc-10.1.0/gcc/config/i386/avx512bitalgintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512bitalgintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512bitalgintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512bwintrin.h gcc-10.1.0/gcc/config/i386/avx512bwintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512bwintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512bwintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** _mm512_bsrli_epi128 (__m512i __A, const
*** 3128,3143 ****
  #define _mm512_alignr_epi8(X, Y, N)						    \
    ((__m512i) __builtin_ia32_palignr512 ((__v8di)(__m512i)(X),			    \
  					(__v8di)(__m512i)(Y),			    \
! 					(int)(N * 8)))
  
  #define _mm512_mask_alignr_epi8(W, U, X, Y, N)					    \
    ((__m512i) __builtin_ia32_palignr512_mask ((__v8di)(__m512i)(X),		    \
! 					    (__v8di)(__m512i)(Y), (int)(N * 8),	    \
  					    (__v8di)(__m512i)(W), (__mmask64)(U)))
  
  #define _mm512_maskz_alignr_epi8(U, X, Y, N)					    \
    ((__m512i) __builtin_ia32_palignr512_mask ((__v8di)(__m512i)(X),		    \
! 					     (__v8di)(__m512i)(Y), (int)(N * 8),    \
  					     (__v8di)(__m512i)			    \
  					     _mm512_setzero_si512 (),		    \
  					     (__mmask64)(U)))
--- 3128,3143 ----
  #define _mm512_alignr_epi8(X, Y, N)						    \
    ((__m512i) __builtin_ia32_palignr512 ((__v8di)(__m512i)(X),			    \
  					(__v8di)(__m512i)(Y),			    \
! 					(int)((N) * 8)))
  
  #define _mm512_mask_alignr_epi8(W, U, X, Y, N)					    \
    ((__m512i) __builtin_ia32_palignr512_mask ((__v8di)(__m512i)(X),		    \
! 					    (__v8di)(__m512i)(Y), (int)((N) * 8),   \
  					    (__v8di)(__m512i)(W), (__mmask64)(U)))
  
  #define _mm512_maskz_alignr_epi8(U, X, Y, N)					    \
    ((__m512i) __builtin_ia32_palignr512_mask ((__v8di)(__m512i)(X),		    \
! 					     (__v8di)(__m512i)(Y), (int)((N) * 8),  \
  					     (__v8di)(__m512i)			    \
  					     _mm512_setzero_si512 (),		    \
  					     (__mmask64)(U)))
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512cdintrin.h gcc-10.1.0/gcc/config/i386/avx512cdintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512cdintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512cdintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512dqintrin.h gcc-10.1.0/gcc/config/i386/avx512dqintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512dqintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512dqintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** extern __inline __mmask8
*** 1362,1375 ****
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm_fpclass_ss_mask (__m128 __A, const int __imm)
  {
!   return (__mmask8) __builtin_ia32_fpclassss ((__v4sf) __A, __imm);
  }
  
  extern __inline __mmask8
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm_fpclass_sd_mask (__m128d __A, const int __imm)
  {
!   return (__mmask8) __builtin_ia32_fpclasssd ((__v2df) __A, __imm);
  }
  
  extern __inline __m512i
--- 1362,1391 ----
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm_fpclass_ss_mask (__m128 __A, const int __imm)
  {
!   return (__mmask8) __builtin_ia32_fpclassss_mask ((__v4sf) __A, __imm,
! 						   (__mmask8) -1);
  }
  
  extern __inline __mmask8
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm_fpclass_sd_mask (__m128d __A, const int __imm)
  {
!   return (__mmask8) __builtin_ia32_fpclasssd_mask ((__v2df) __A, __imm,
! 						   (__mmask8) -1);
! }
! 
! extern __inline __mmask8
! __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
! _mm_mask_fpclass_ss_mask (__mmask8 __U, __m128 __A, const int __imm)
! {
!   return (__mmask8) __builtin_ia32_fpclassss_mask ((__v4sf) __A, __imm, __U);
! }
! 
! extern __inline __mmask8
! __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
! _mm_mask_fpclass_sd_mask (__mmask8 __U, __m128d __A, const int __imm)
! {
!   return (__mmask8) __builtin_ia32_fpclasssd_mask ((__v2df) __A, __imm, __U);
  }
  
  extern __inline __m512i
*************** _mm512_fpclass_ps_mask (__m512 __A, cons
*** 2617,2627 ****
      (__v16si)(__m512i)_mm512_setzero_si512 (),\
      (__mmask16)(U)))
  
! #define _mm_fpclass_ss_mask(X, C)						\
!   ((__mmask8) __builtin_ia32_fpclassss ((__v4sf) (__m128) (X), (int) (C)))  \
  
! #define _mm_fpclass_sd_mask(X, C)						\
!   ((__mmask8) __builtin_ia32_fpclasssd ((__v2df) (__m128d) (X), (int) (C))) \
  
  #define _mm512_mask_fpclass_pd_mask(u, X, C)                            \
    ((__mmask8) __builtin_ia32_fpclasspd512_mask ((__v8df) (__m512d) (X), \
--- 2633,2653 ----
      (__v16si)(__m512i)_mm512_setzero_si512 (),\
      (__mmask16)(U)))
  
! #define _mm_fpclass_ss_mask(X, C)					\
!   ((__mmask8) __builtin_ia32_fpclassss_mask ((__v4sf) (__m128) (X),	\
! 					     (int) (C), (__mmask8) (-1))) \
  
! #define _mm_fpclass_sd_mask(X, C)					\
!   ((__mmask8) __builtin_ia32_fpclasssd_mask ((__v2df) (__m128d) (X),	\
! 					     (int) (C), (__mmask8) (-1))) \
! 
! #define _mm_mask_fpclass_ss_mask(X, C, U)				\
!   ((__mmask8) __builtin_ia32_fpclassss_mask ((__v4sf) (__m128) (X),	\
! 					     (int) (C), (__mmask8) (U)))
! 
! #define _mm_mask_fpclass_sd_mask(X, C, U)				\
!   ((__mmask8) __builtin_ia32_fpclasssd_mask ((__v2df) (__m128d) (X),	\
! 					     (int) (C), (__mmask8) (U)))
  
  #define _mm512_mask_fpclass_pd_mask(u, X, C)                            \
    ((__mmask8) __builtin_ia32_fpclasspd512_mask ((__v8df) (__m512d) (X), \
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512erintrin.h gcc-10.1.0/gcc/config/i386/avx512erintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512erintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512erintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512fintrin.h gcc-10.1.0/gcc/config/i386/avx512fintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512fintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512fintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** _mm_mask_store_sd (double *__P, __mmask8
*** 6352,6357 ****
--- 6352,6364 ----
  
  extern __inline __m512i
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_loadu_epi64 (void const *__P)
+ {
+   return *(__m512i_u *) __P;
+ }
+ 
+ extern __inline __m512i
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm512_mask_loadu_epi64 (__m512i __W, __mmask8 __U, void const *__P)
  {
    return (__m512i) __builtin_ia32_loaddqudi512_mask ((const long long *) __P,
*************** _mm512_maskz_loadu_epi64 (__mmask8 __U,
*** 6371,6376 ****
--- 6378,6390 ----
  
  extern __inline void
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_storeu_epi64 (void *__P, __m512i __A)
+ {
+   *(__m512i_u *) __P = (__m512i_u) __A;
+ }
+ 
+ extern __inline void
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm512_mask_storeu_epi64 (void *__P, __mmask8 __U, __m512i __A)
  {
    __builtin_ia32_storedqudi512_mask ((long long *) __P, (__v8di) __A,
*************** _mm512_loadu_si512 (void const *__P)
*** 6386,6391 ****
--- 6400,6412 ----
  
  extern __inline __m512i
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_loadu_epi32 (void const *__P)
+ {
+   return *(__m512i_u *) __P;
+ }
+ 
+ extern __inline __m512i
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm512_mask_loadu_epi32 (__m512i __W, __mmask16 __U, void const *__P)
  {
    return (__m512i) __builtin_ia32_loaddqusi512_mask ((const int *) __P,
*************** _mm512_storeu_si512 (void *__P, __m512i
*** 6412,6417 ****
--- 6433,6445 ----
  
  extern __inline void
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_storeu_epi32 (void *__P, __m512i __A)
+ {
+   *(__m512i_u *) __P = (__m512i_u) __A;
+ }
+ 
+ extern __inline void
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm512_mask_storeu_epi32 (void *__P, __mmask16 __U, __m512i __A)
  {
    __builtin_ia32_storedqusi512_mask ((int *) __P, (__v16si) __A,
*************** _mm512_maskz_cvtps_ph (__mmask16 __W, __
*** 8542,8563 ****
      (__m512)__builtin_ia32_vcvtph2ps512_mask((__v16hi)(A), (__v16sf)_mm512_setzero_ps(), U, B)
  
  #define _mm512_cvt_roundps_ph(A, I)						 \
!   ((__m256i) __builtin_ia32_vcvtps2ph512_mask ((__v16sf)(__m512) A, (int) (I),\
      (__v16hi)_mm256_undefined_si256 (), -1))
  #define _mm512_cvtps_ph(A, I)						 \
!   ((__m256i) __builtin_ia32_vcvtps2ph512_mask ((__v16sf)(__m512) A, (int) (I),\
      (__v16hi)_mm256_undefined_si256 (), -1))
  #define _mm512_mask_cvt_roundps_ph(U, W, A, I)				 \
!   ((__m256i) __builtin_ia32_vcvtps2ph512_mask ((__v16sf)(__m512) A, (int) (I),\
      (__v16hi)(__m256i)(U), (__mmask16) (W)))
  #define _mm512_mask_cvtps_ph(U, W, A, I)				 \
!   ((__m256i) __builtin_ia32_vcvtps2ph512_mask ((__v16sf)(__m512) A, (int) (I),\
      (__v16hi)(__m256i)(U), (__mmask16) (W)))
  #define _mm512_maskz_cvt_roundps_ph(W, A, I)					 \
!   ((__m256i) __builtin_ia32_vcvtps2ph512_mask ((__v16sf)(__m512) A, (int) (I),\
      (__v16hi)_mm256_setzero_si256 (), (__mmask16) (W)))
  #define _mm512_maskz_cvtps_ph(W, A, I)					 \
!   ((__m256i) __builtin_ia32_vcvtps2ph512_mask ((__v16sf)(__m512) A, (int) (I),\
      (__v16hi)_mm256_setzero_si256 (), (__mmask16) (W)))
  #endif
  
--- 8570,8591 ----
      (__m512)__builtin_ia32_vcvtph2ps512_mask((__v16hi)(A), (__v16sf)_mm512_setzero_ps(), U, B)
  
  #define _mm512_cvt_roundps_ph(A, I)						 \
!   ((__m256i) __builtin_ia32_vcvtps2ph512_mask ((__v16sf)(__m512) (A), (int) (I),\
      (__v16hi)_mm256_undefined_si256 (), -1))
  #define _mm512_cvtps_ph(A, I)						 \
!   ((__m256i) __builtin_ia32_vcvtps2ph512_mask ((__v16sf)(__m512) (A), (int) (I),\
      (__v16hi)_mm256_undefined_si256 (), -1))
  #define _mm512_mask_cvt_roundps_ph(U, W, A, I)				 \
!   ((__m256i) __builtin_ia32_vcvtps2ph512_mask ((__v16sf)(__m512) (A), (int) (I),\
      (__v16hi)(__m256i)(U), (__mmask16) (W)))
  #define _mm512_mask_cvtps_ph(U, W, A, I)				 \
!   ((__m256i) __builtin_ia32_vcvtps2ph512_mask ((__v16sf)(__m512) (A), (int) (I),\
      (__v16hi)(__m256i)(U), (__mmask16) (W)))
  #define _mm512_maskz_cvt_roundps_ph(W, A, I)					 \
!   ((__m256i) __builtin_ia32_vcvtps2ph512_mask ((__v16sf)(__m512) (A), (int) (I),\
      (__v16hi)_mm256_setzero_si256 (), (__mmask16) (W)))
  #define _mm512_maskz_cvtps_ph(W, A, I)					 \
!   ((__m256i) __builtin_ia32_vcvtps2ph512_mask ((__v16sf)(__m512) (A), (int) (I),\
      (__v16hi)_mm256_setzero_si256 (), (__mmask16) (W)))
  #endif
  
*************** _mm512_maskz_roundscale_round_pd (__mmas
*** 9141,9150 ****
  
  extern __inline __m128
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
! _mm_roundscale_round_ss (__m128 __A, __m128 __B, const int __imm, const int __R)
  {
!   return (__m128) __builtin_ia32_rndscaless_round ((__v4sf) __A,
! 						   (__v4sf) __B, __imm, __R);
  }
  
  extern __inline __m128d
--- 9169,9211 ----
  
  extern __inline __m128
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
! _mm_roundscale_round_ss (__m128 __A, __m128 __B, const int __imm,
! 			 const int __R)
  {
!   return (__m128)
!     __builtin_ia32_rndscaless_mask_round ((__v4sf) __A,
! 					  (__v4sf) __B, __imm,
! 					  (__v4sf)
! 					  _mm_setzero_ps (),
! 					  (__mmask8) -1,
! 					  __R);
! }
! 
! extern __inline __m128
! __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
! _mm_mask_roundscale_round_ss (__m128 __A, __mmask8 __B, __m128 __C,
! 			      __m128 __D, const int __imm, const int __R)
! {
!   return (__m128)
!     __builtin_ia32_rndscaless_mask_round ((__v4sf) __C,
! 					  (__v4sf) __D, __imm,
! 					  (__v4sf) __A,
! 					  (__mmask8) __B,
! 					  __R);
! }
! 
! extern __inline __m128
! __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
! _mm_maskz_roundscale_round_ss (__mmask8 __A, __m128 __B, __m128 __C,
! 			       const int __imm, const int __R)
! {
!   return (__m128)
!     __builtin_ia32_rndscaless_mask_round ((__v4sf) __B,
! 					  (__v4sf) __C, __imm,
! 					  (__v4sf)
! 					  _mm_setzero_ps (),
! 					  (__mmask8) __A,
! 					  __R);
  }
  
  extern __inline __m128d
*************** __attribute__ ((__gnu_inline__, __always
*** 9152,9159 ****
  _mm_roundscale_round_sd (__m128d __A, __m128d __B, const int __imm,
  			 const int __R)
  {
!   return (__m128d) __builtin_ia32_rndscalesd_round ((__v2df) __A,
! 						    (__v2df) __B, __imm, __R);
  }
  
  #else
--- 9213,9252 ----
  _mm_roundscale_round_sd (__m128d __A, __m128d __B, const int __imm,
  			 const int __R)
  {
!   return (__m128d)
!     __builtin_ia32_rndscalesd_mask_round ((__v2df) __A,
! 					  (__v2df) __B, __imm,
! 					  (__v2df)
! 					  _mm_setzero_pd (),
! 					  (__mmask8) -1,
! 					  __R);
! }
! 
! extern __inline __m128d
! __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
! _mm_mask_roundscale_round_sd (__m128d __A, __mmask8 __B, __m128d __C,
! 			      __m128d __D, const int __imm, const int __R)
! {
!   return (__m128d)
!     __builtin_ia32_rndscalesd_mask_round ((__v2df) __C,
! 					  (__v2df) __D, __imm,
! 					  (__v2df) __A,
! 					  (__mmask8) __B,
! 					  __R);
! }
! 
! extern __inline __m128d
! __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
! _mm_maskz_roundscale_round_sd (__mmask8 __A, __m128d __B, __m128d __C,
! 			       const int __imm, const int __R)
! {
!   return (__m128d)
!     __builtin_ia32_rndscalesd_mask_round ((__v2df) __B,
! 					  (__v2df) __C, __imm,
! 					  (__v2df)
! 					  _mm_setzero_pd (),
! 					  (__mmask8) __A,
! 					  __R);
  }
  
  #else
*************** _mm_roundscale_round_sd (__m128d __A, __
*** 9183,9194 ****
  					     (int)(C),			\
  					     (__v8df)_mm512_setzero_pd(),\
  					     (__mmask8)(A), R))
! #define _mm_roundscale_round_ss(A, B, C, R)					\
!   ((__m128) __builtin_ia32_rndscaless_round ((__v4sf)(__m128)(A),	\
!     (__v4sf)(__m128)(B), (int)(C), R))
! #define _mm_roundscale_round_sd(A, B, C, R)					\
!   ((__m128d) __builtin_ia32_rndscalesd_round ((__v2df)(__m128d)(A),	\
!     (__v2df)(__m128d)(B), (int)(C), R))
  #endif
  
  extern __inline __m512
--- 9276,9329 ----
  					     (int)(C),			\
  					     (__v8df)_mm512_setzero_pd(),\
  					     (__mmask8)(A), R))
! #define _mm_roundscale_round_ss(A, B, I, R)				\
!   ((__m128)								\
!    __builtin_ia32_rndscaless_mask_round ((__v4sf) (__m128) (A),		\
! 					 (__v4sf) (__m128) (B),		\
! 					 (int) (I),			\
! 					 (__v4sf) _mm_setzero_ps (),	\
! 					 (__mmask8) (-1),		\
! 					 (int) (R)))
! #define _mm_mask_roundscale_round_ss(A, U, B, C, I, R)		\
!   ((__m128)							\
!    __builtin_ia32_rndscaless_mask_round ((__v4sf) (__m128) (B),	\
! 					 (__v4sf) (__m128) (C),	\
! 					 (int) (I),		\
! 					 (__v4sf) (__m128) (A),	\
! 					 (__mmask8) (U),	\
! 					 (int) (R)))
! #define _mm_maskz_roundscale_round_ss(U, A, B, I, R)			\
!   ((__m128)								\
!    __builtin_ia32_rndscaless_mask_round ((__v4sf) (__m128) (A),		\
! 					 (__v4sf) (__m128) (B),		\
! 					 (int) (I),			\
! 					 (__v4sf) _mm_setzero_ps (),	\
! 					 (__mmask8) (U),		\
! 					 (int) (R)))
! #define _mm_roundscale_round_sd(A, B, I, R)				\
!   ((__m128d)								\
!    __builtin_ia32_rndscalesd_mask_round ((__v2df) (__m128d) (A),	\
! 					 (__v2df) (__m128d) (B),	\
! 					 (int) (I),			\
! 					 (__v2df) _mm_setzero_pd (),	\
! 					 (__mmask8) (-1),		\
! 					 (int) (R)))
! #define _mm_mask_roundscale_round_sd(A, U, B, C, I, R)			\
!   ((__m128d)								\
!    __builtin_ia32_rndscalesd_mask_round ((__v2df) (__m128d) (B),	\
! 					 (__v2df) (__m128d) (C),	\
! 					 (int) (I),			\
! 					 (__v2df) (__m128d) (A),	\
! 					 (__mmask8) (U),		\
! 					 (int) (R)))
! #define _mm_maskz_roundscale_round_sd(U, A, B, I, R)			\
!   ((__m128d)								\
!    __builtin_ia32_rndscalesd_mask_round ((__v2df) (__m128d) (A),	\
! 					 (__v2df) (__m128d) (B),	\
! 					 (int) (I),			\
! 					 (__v2df) _mm_setzero_pd (),	\
! 					 (__mmask8) (U),		\
! 					 (int) (R)))
  #endif
  
  extern __inline __m512
*************** _mm_mask_cmp_round_ss_mask (__mmask8 __M
*** 9946,9977 ****
  #define _mm512_mask_cmp_epi64_mask(M, X, Y, P)				\
    ((__mmask8) __builtin_ia32_cmpq512_mask ((__v8di)(__m512i)(X),	\
  					   (__v8di)(__m512i)(Y), (int)(P),\
! 					   (__mmask8)M))
  
  #define _mm512_mask_cmp_epi32_mask(M, X, Y, P)				\
    ((__mmask16) __builtin_ia32_cmpd512_mask ((__v16si)(__m512i)(X),	\
  					    (__v16si)(__m512i)(Y), (int)(P), \
! 					    (__mmask16)M))
  
  #define _mm512_mask_cmp_epu64_mask(M, X, Y, P)				\
    ((__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di)(__m512i)(X),	\
  					    (__v8di)(__m512i)(Y), (int)(P),\
! 					    (__mmask8)M))
  
  #define _mm512_mask_cmp_epu32_mask(M, X, Y, P)				\
    ((__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si)(__m512i)(X),	\
  					     (__v16si)(__m512i)(Y), (int)(P), \
! 					     (__mmask16)M))
  
  #define _mm512_mask_cmp_round_pd_mask(M, X, Y, P, R)			\
    ((__mmask8) __builtin_ia32_cmppd512_mask ((__v8df)(__m512d)(X),	\
  					    (__v8df)(__m512d)(Y), (int)(P),\
! 					    (__mmask8)M, R))
  
  #define _mm512_mask_cmp_round_ps_mask(M, X, Y, P, R)			\
    ((__mmask16) __builtin_ia32_cmpps512_mask ((__v16sf)(__m512)(X),	\
  					     (__v16sf)(__m512)(Y), (int)(P),\
! 					     (__mmask16)M, R))
  
  #define _mm_cmp_round_sd_mask(X, Y, P, R)				\
    ((__mmask8) __builtin_ia32_cmpsd_mask ((__v2df)(__m128d)(X),		\
--- 10081,10112 ----
  #define _mm512_mask_cmp_epi64_mask(M, X, Y, P)				\
    ((__mmask8) __builtin_ia32_cmpq512_mask ((__v8di)(__m512i)(X),	\
  					   (__v8di)(__m512i)(Y), (int)(P),\
! 					   (__mmask8)(M)))
  
  #define _mm512_mask_cmp_epi32_mask(M, X, Y, P)				\
    ((__mmask16) __builtin_ia32_cmpd512_mask ((__v16si)(__m512i)(X),	\
  					    (__v16si)(__m512i)(Y), (int)(P), \
! 					    (__mmask16)(M)))
  
  #define _mm512_mask_cmp_epu64_mask(M, X, Y, P)				\
    ((__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di)(__m512i)(X),	\
  					    (__v8di)(__m512i)(Y), (int)(P),\
! 					    (__mmask8)(M)))
  
  #define _mm512_mask_cmp_epu32_mask(M, X, Y, P)				\
    ((__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si)(__m512i)(X),	\
  					     (__v16si)(__m512i)(Y), (int)(P), \
! 					     (__mmask16)(M)))
  
  #define _mm512_mask_cmp_round_pd_mask(M, X, Y, P, R)			\
    ((__mmask8) __builtin_ia32_cmppd512_mask ((__v8df)(__m512d)(X),	\
  					    (__v8df)(__m512d)(Y), (int)(P),\
! 					    (__mmask8)(M), R))
  
  #define _mm512_mask_cmp_round_ps_mask(M, X, Y, P, R)			\
    ((__mmask16) __builtin_ia32_cmpps512_mask ((__v16sf)(__m512)(X),	\
  					     (__v16sf)(__m512)(Y), (int)(P),\
! 					     (__mmask16)(M), R))
  
  #define _mm_cmp_round_sd_mask(X, Y, P, R)				\
    ((__mmask8) __builtin_ia32_cmpsd_mask ((__v2df)(__m128d)(X),		\
*************** _mm512_mask_i64scatter_epi64 (void *__ad
*** 10333,10511 ****
  #else
  #define _mm512_i32gather_ps(INDEX, ADDR, SCALE)				\
    (__m512) __builtin_ia32_gathersiv16sf ((__v16sf)_mm512_undefined_ps(),\
! 					 (void const *)ADDR,		\
! 					 (__v16si)(__m512i)INDEX,	\
! 					 (__mmask16)0xFFFF, (int)SCALE)
  
  #define _mm512_mask_i32gather_ps(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m512) __builtin_ia32_gathersiv16sf ((__v16sf)(__m512)V1OLD,	\
! 					 (void const *)ADDR,		\
! 					 (__v16si)(__m512i)INDEX,	\
! 					 (__mmask16)MASK, (int)SCALE)
  
  #define _mm512_i32gather_pd(INDEX, ADDR, SCALE)				\
    (__m512d) __builtin_ia32_gathersiv8df ((__v8df)_mm512_undefined_pd(),	\
! 					 (void const *)ADDR,		\
! 					 (__v8si)(__m256i)INDEX,	\
! 					 (__mmask8)0xFF, (int)SCALE)
  
  #define _mm512_mask_i32gather_pd(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m512d) __builtin_ia32_gathersiv8df ((__v8df)(__m512d)V1OLD,	\
! 					 (void const *)ADDR,		\
! 					 (__v8si)(__m256i)INDEX,	\
! 					 (__mmask8)MASK, (int)SCALE)
  
  #define _mm512_i64gather_ps(INDEX, ADDR, SCALE)				\
    (__m256) __builtin_ia32_gatherdiv16sf ((__v8sf)_mm256_undefined_ps(),	\
! 					 (void const *)ADDR,		\
! 					 (__v8di)(__m512i)INDEX,	\
! 					 (__mmask8)0xFF, (int)SCALE)
  
  #define _mm512_mask_i64gather_ps(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256) __builtin_ia32_gatherdiv16sf ((__v8sf)(__m256)V1OLD,		\
! 					 (void const *)ADDR,		\
! 					 (__v8di)(__m512i)INDEX,	\
! 					 (__mmask8)MASK, (int)SCALE)
  
  #define _mm512_i64gather_pd(INDEX, ADDR, SCALE)				\
    (__m512d) __builtin_ia32_gatherdiv8df ((__v8df)_mm512_undefined_pd(),	\
! 					 (void const *)ADDR,		\
! 					 (__v8di)(__m512i)INDEX,	\
! 					 (__mmask8)0xFF, (int)SCALE)
  
  #define _mm512_mask_i64gather_pd(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m512d) __builtin_ia32_gatherdiv8df ((__v8df)(__m512d)V1OLD,	\
! 					 (void const *)ADDR,		\
! 					 (__v8di)(__m512i)INDEX,	\
! 					 (__mmask8)MASK, (int)SCALE)
  
  #define _mm512_i32gather_epi32(INDEX, ADDR, SCALE)			\
!   (__m512i) __builtin_ia32_gathersiv16si ((__v16si)_mm512_undefined_epi32 (),	\
! 					  (void const *)ADDR,		\
! 					  (__v16si)(__m512i)INDEX,	\
! 					  (__mmask16)0xFFFF, (int)SCALE)
  
  #define _mm512_mask_i32gather_epi32(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m512i) __builtin_ia32_gathersiv16si ((__v16si)(__m512i)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v16si)(__m512i)INDEX,	\
! 					  (__mmask16)MASK, (int)SCALE)
  
  #define _mm512_i32gather_epi64(INDEX, ADDR, SCALE)			\
!   (__m512i) __builtin_ia32_gathersiv8di ((__v8di)_mm512_undefined_epi32 (),	\
! 					 (void const *)ADDR,		\
! 					 (__v8si)(__m256i)INDEX,	\
! 					 (__mmask8)0xFF, (int)SCALE)
  
  #define _mm512_mask_i32gather_epi64(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m512i) __builtin_ia32_gathersiv8di ((__v8di)(__m512i)V1OLD,	\
! 					 (void const *)ADDR,		\
! 					 (__v8si)(__m256i)INDEX,	\
! 					 (__mmask8)MASK, (int)SCALE)
  
! #define _mm512_i64gather_epi32(INDEX, ADDR, SCALE)			  \
!   (__m256i) __builtin_ia32_gatherdiv16si ((__v8si)_mm256_undefined_si256(), \
! 					  (void const *)ADDR,		  \
! 					  (__v8di)(__m512i)INDEX,	  \
! 					  (__mmask8)0xFF, (int)SCALE)
  
  #define _mm512_mask_i64gather_epi32(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256i) __builtin_ia32_gatherdiv16si ((__v8si)(__m256i)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v8di)(__m512i)INDEX,	\
! 					  (__mmask8)MASK, (int)SCALE)
  
  #define _mm512_i64gather_epi64(INDEX, ADDR, SCALE)			\
!   (__m512i) __builtin_ia32_gatherdiv8di ((__v8di)_mm512_undefined_epi32 (),	\
! 					 (void const *)ADDR,		\
! 					 (__v8di)(__m512i)INDEX,	\
! 					 (__mmask8)0xFF, (int)SCALE)
  
  #define _mm512_mask_i64gather_epi64(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m512i) __builtin_ia32_gatherdiv8di ((__v8di)(__m512i)V1OLD,	\
! 					 (void const *)ADDR,		\
! 					 (__v8di)(__m512i)INDEX,	\
! 					 (__mmask8)MASK, (int)SCALE)
  
  #define _mm512_i32scatter_ps(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv16sf ((void *)ADDR, (__mmask16)0xFFFF,	\
! 				 (__v16si)(__m512i)INDEX,		\
! 				 (__v16sf)(__m512)V1, (int)SCALE)
  
  #define _mm512_mask_i32scatter_ps(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv16sf ((void *)ADDR, (__mmask16)MASK,		\
! 				 (__v16si)(__m512i)INDEX,		\
! 				 (__v16sf)(__m512)V1, (int)SCALE)
  
  #define _mm512_i32scatter_pd(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv8df ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v8si)(__m256i)INDEX,			\
! 				(__v8df)(__m512d)V1, (int)SCALE)
  
  #define _mm512_mask_i32scatter_pd(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv8df ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v8si)(__m256i)INDEX,			\
! 				(__v8df)(__m512d)V1, (int)SCALE)
  
  #define _mm512_i64scatter_ps(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv16sf ((void *)ADDR, (__mmask8)0xFF,		\
! 				 (__v8di)(__m512i)INDEX,		\
! 				 (__v8sf)(__m256)V1, (int)SCALE)
  
  #define _mm512_mask_i64scatter_ps(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv16sf ((void *)ADDR, (__mmask16)MASK,		\
! 				 (__v8di)(__m512i)INDEX,		\
! 				 (__v8sf)(__m256)V1, (int)SCALE)
  
  #define _mm512_i64scatter_pd(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv8df ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v8di)(__m512i)INDEX,			\
! 				(__v8df)(__m512d)V1, (int)SCALE)
  
  #define _mm512_mask_i64scatter_pd(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv8df ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v8di)(__m512i)INDEX,			\
! 				(__v8df)(__m512d)V1, (int)SCALE)
  
  #define _mm512_i32scatter_epi32(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv16si ((void *)ADDR, (__mmask16)0xFFFF,	\
! 				 (__v16si)(__m512i)INDEX,		\
! 				 (__v16si)(__m512i)V1, (int)SCALE)
  
  #define _mm512_mask_i32scatter_epi32(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scattersiv16si ((void *)ADDR, (__mmask16)MASK,		\
! 				 (__v16si)(__m512i)INDEX,		\
! 				 (__v16si)(__m512i)V1, (int)SCALE)
  
  #define _mm512_i32scatter_epi64(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv8di ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v8si)(__m256i)INDEX,			\
! 				(__v8di)(__m512i)V1, (int)SCALE)
  
  #define _mm512_mask_i32scatter_epi64(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scattersiv8di ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v8si)(__m256i)INDEX,			\
! 				(__v8di)(__m512i)V1, (int)SCALE)
  
  #define _mm512_i64scatter_epi32(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv16si ((void *)ADDR, (__mmask8)0xFF,		\
! 				 (__v8di)(__m512i)INDEX,		\
! 				 (__v8si)(__m256i)V1, (int)SCALE)
  
  #define _mm512_mask_i64scatter_epi32(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scatterdiv16si ((void *)ADDR, (__mmask8)MASK,		\
! 				 (__v8di)(__m512i)INDEX,		\
! 				 (__v8si)(__m256i)V1, (int)SCALE)
  
  #define _mm512_i64scatter_epi64(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv8di ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v8di)(__m512i)INDEX,			\
! 				(__v8di)(__m512i)V1, (int)SCALE)
  
  #define _mm512_mask_i64scatter_epi64(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scatterdiv8di ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v8di)(__m512i)INDEX,			\
! 				(__v8di)(__m512i)V1, (int)SCALE)
  #endif
  
  extern __inline __m512d
--- 10468,10656 ----
  #else
  #define _mm512_i32gather_ps(INDEX, ADDR, SCALE)				\
    (__m512) __builtin_ia32_gathersiv16sf ((__v16sf)_mm512_undefined_ps(),\
! 					 (void const *) (ADDR),		\
! 					 (__v16si)(__m512i) (INDEX),	\
! 					 (__mmask16)0xFFFF,		\
! 					 (int) (SCALE))
  
  #define _mm512_mask_i32gather_ps(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m512) __builtin_ia32_gathersiv16sf ((__v16sf)(__m512) (V1OLD),	\
! 					 (void const *) (ADDR),		\
! 					 (__v16si)(__m512i) (INDEX),	\
! 					 (__mmask16) (MASK),		\
! 					 (int) (SCALE))
  
  #define _mm512_i32gather_pd(INDEX, ADDR, SCALE)				\
    (__m512d) __builtin_ia32_gathersiv8df ((__v8df)_mm512_undefined_pd(),	\
! 					 (void const *) (ADDR),		\
! 					 (__v8si)(__m256i) (INDEX),	\
! 					 (__mmask8)0xFF, (int) (SCALE))
  
  #define _mm512_mask_i32gather_pd(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m512d) __builtin_ia32_gathersiv8df ((__v8df)(__m512d) (V1OLD),	\
! 					 (void const *) (ADDR),		\
! 					 (__v8si)(__m256i) (INDEX),	\
! 					 (__mmask8) (MASK),		\
! 					 (int) (SCALE))
  
  #define _mm512_i64gather_ps(INDEX, ADDR, SCALE)				\
    (__m256) __builtin_ia32_gatherdiv16sf ((__v8sf)_mm256_undefined_ps(),	\
! 					 (void const *) (ADDR),		\
! 					 (__v8di)(__m512i) (INDEX),	\
! 					 (__mmask8)0xFF, (int) (SCALE))
  
  #define _mm512_mask_i64gather_ps(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256) __builtin_ia32_gatherdiv16sf ((__v8sf)(__m256) (V1OLD),	\
! 					 (void const *) (ADDR),		\
! 					 (__v8di)(__m512i) (INDEX),	\
! 					 (__mmask8) (MASK),		\
! 					 (int) (SCALE))
  
  #define _mm512_i64gather_pd(INDEX, ADDR, SCALE)				\
    (__m512d) __builtin_ia32_gatherdiv8df ((__v8df)_mm512_undefined_pd(),	\
! 					 (void const *) (ADDR),		\
! 					 (__v8di)(__m512i) (INDEX),	\
! 					 (__mmask8)0xFF, (int) (SCALE))
  
  #define _mm512_mask_i64gather_pd(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m512d) __builtin_ia32_gatherdiv8df ((__v8df)(__m512d) (V1OLD),	\
! 					 (void const *) (ADDR),		\
! 					 (__v8di)(__m512i) (INDEX),	\
! 					 (__mmask8) (MASK),		\
! 					 (int) (SCALE))
  
  #define _mm512_i32gather_epi32(INDEX, ADDR, SCALE)			\
!   (__m512i) __builtin_ia32_gathersiv16si ((__v16si)_mm512_undefined_epi32 (),\
! 					  (void const *) (ADDR),	\
! 					  (__v16si)(__m512i) (INDEX),	\
! 					  (__mmask16)0xFFFF,		\
! 					  (int) (SCALE))
  
  #define _mm512_mask_i32gather_epi32(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m512i) __builtin_ia32_gathersiv16si ((__v16si)(__m512i) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v16si)(__m512i) (INDEX),	\
! 					  (__mmask16) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm512_i32gather_epi64(INDEX, ADDR, SCALE)			\
!   (__m512i) __builtin_ia32_gathersiv8di ((__v8di)_mm512_undefined_epi32 (),\
! 					 (void const *) (ADDR),		\
! 					 (__v8si)(__m256i) (INDEX),	\
! 					 (__mmask8)0xFF, (int) (SCALE))
  
  #define _mm512_mask_i32gather_epi64(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m512i) __builtin_ia32_gathersiv8di ((__v8di)(__m512i) (V1OLD),	\
! 					 (void const *) (ADDR),		\
! 					 (__v8si)(__m256i) (INDEX),	\
! 					 (__mmask8) (MASK),		\
! 					 (int) (SCALE))
  
! #define _mm512_i64gather_epi32(INDEX, ADDR, SCALE)			   \
!   (__m256i) __builtin_ia32_gatherdiv16si ((__v8si)_mm256_undefined_si256(),\
! 					  (void const *) (ADDR),	   \
! 					  (__v8di)(__m512i) (INDEX),	   \
! 					  (__mmask8)0xFF, (int) (SCALE))
  
  #define _mm512_mask_i64gather_epi32(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256i) __builtin_ia32_gatherdiv16si ((__v8si)(__m256i) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v8di)(__m512i) (INDEX),	\
! 					  (__mmask8) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm512_i64gather_epi64(INDEX, ADDR, SCALE)			\
!   (__m512i) __builtin_ia32_gatherdiv8di ((__v8di)_mm512_undefined_epi32 (),\
! 					 (void const *) (ADDR),		\
! 					 (__v8di)(__m512i) (INDEX),	\
! 					 (__mmask8)0xFF, (int) (SCALE))
  
  #define _mm512_mask_i64gather_epi64(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m512i) __builtin_ia32_gatherdiv8di ((__v8di)(__m512i) (V1OLD),	\
! 					 (void const *) (ADDR),		\
! 					 (__v8di)(__m512i) (INDEX),	\
! 					 (__mmask8) (MASK),		\
! 					 (int) (SCALE))
  
  #define _mm512_i32scatter_ps(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv16sf ((void *) (ADDR), (__mmask16)0xFFFF,	\
! 				 (__v16si)(__m512i) (INDEX),		\
! 				 (__v16sf)(__m512) (V1), (int) (SCALE))
  
  #define _mm512_mask_i32scatter_ps(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv16sf ((void *) (ADDR), (__mmask16) (MASK),	\
! 				 (__v16si)(__m512i) (INDEX),		\
! 				 (__v16sf)(__m512) (V1), (int) (SCALE))
  
  #define _mm512_i32scatter_pd(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv8df ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v8si)(__m256i) (INDEX),		\
! 				(__v8df)(__m512d) (V1), (int) (SCALE))
  
  #define _mm512_mask_i32scatter_pd(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv8df ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v8si)(__m256i) (INDEX),		\
! 				(__v8df)(__m512d) (V1), (int) (SCALE))
  
  #define _mm512_i64scatter_ps(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv16sf ((void *) (ADDR), (__mmask8)0xFF,	\
! 				 (__v8di)(__m512i) (INDEX),		\
! 				 (__v8sf)(__m256) (V1), (int) (SCALE))
  
  #define _mm512_mask_i64scatter_ps(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv16sf ((void *) (ADDR), (__mmask16) (MASK),	\
! 				 (__v8di)(__m512i) (INDEX),		\
! 				 (__v8sf)(__m256) (V1), (int) (SCALE))
  
  #define _mm512_i64scatter_pd(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv8df ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v8di)(__m512i) (INDEX),		\
! 				(__v8df)(__m512d) (V1), (int) (SCALE))
  
  #define _mm512_mask_i64scatter_pd(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv8df ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v8di)(__m512i) (INDEX),		\
! 				(__v8df)(__m512d) (V1), (int) (SCALE))
  
  #define _mm512_i32scatter_epi32(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv16si ((void *) (ADDR), (__mmask16)0xFFFF,	\
! 				 (__v16si)(__m512i) (INDEX),		\
! 				 (__v16si)(__m512i) (V1), (int) (SCALE))
  
  #define _mm512_mask_i32scatter_epi32(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scattersiv16si ((void *) (ADDR), (__mmask16) (MASK),	\
! 				 (__v16si)(__m512i) (INDEX),		\
! 				 (__v16si)(__m512i) (V1), (int) (SCALE))
  
  #define _mm512_i32scatter_epi64(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv8di ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v8si)(__m256i) (INDEX),		\
! 				(__v8di)(__m512i) (V1), (int) (SCALE))
  
  #define _mm512_mask_i32scatter_epi64(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scattersiv8di ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v8si)(__m256i) (INDEX),		\
! 				(__v8di)(__m512i) (V1), (int) (SCALE))
  
  #define _mm512_i64scatter_epi32(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv16si ((void *) (ADDR), (__mmask8)0xFF,	\
! 				 (__v8di)(__m512i) (INDEX),		\
! 				 (__v8si)(__m256i) (V1), (int) (SCALE))
  
  #define _mm512_mask_i64scatter_epi32(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scatterdiv16si ((void *) (ADDR), (__mmask8) (MASK),	\
! 				 (__v8di)(__m512i) (INDEX),		\
! 				 (__v8si)(__m256i) (V1), (int) (SCALE))
  
  #define _mm512_i64scatter_epi64(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv8di ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v8di)(__m512i) (INDEX),		\
! 				(__v8di)(__m512i) (V1), (int) (SCALE))
  
  #define _mm512_mask_i64scatter_epi64(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scatterdiv8di ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v8di)(__m512i) (INDEX),		\
! 				(__v8di)(__m512i) (V1), (int) (SCALE))
  #endif
  
  extern __inline __m512d
*************** extern __inline __m128
*** 14784,14801 ****
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm_roundscale_ss (__m128 __A, __m128 __B, const int __imm)
  {
!   return (__m128) __builtin_ia32_rndscaless_round ((__v4sf) __A,
! 						   (__v4sf) __B, __imm,
! 						   _MM_FROUND_CUR_DIRECTION);
  }
  
  extern __inline __m128d
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm_roundscale_sd (__m128d __A, __m128d __B, const int __imm)
  {
!   return (__m128d) __builtin_ia32_rndscalesd_round ((__v2df) __A,
! 						    (__v2df) __B, __imm,
! 						   _MM_FROUND_CUR_DIRECTION);
  }
  
  #else
--- 14929,15009 ----
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm_roundscale_ss (__m128 __A, __m128 __B, const int __imm)
  {
!   return (__m128)
!     __builtin_ia32_rndscaless_mask_round ((__v4sf) __A,
! 					  (__v4sf) __B, __imm,
! 					  (__v4sf)
! 					  _mm_setzero_ps (),
! 					  (__mmask8) -1,
! 					  _MM_FROUND_CUR_DIRECTION);
! }
! 
! 
! extern __inline __m128
! __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
! _mm_mask_roundscale_ss (__m128 __A, __mmask8 __B, __m128 __C, __m128 __D,
! 			const int __imm)
! {
!   return (__m128)
!     __builtin_ia32_rndscaless_mask_round ((__v4sf) __C,
! 					  (__v4sf) __D, __imm,
! 					  (__v4sf) __A,
! 					  (__mmask8) __B,
! 					  _MM_FROUND_CUR_DIRECTION);
! }
! 
! extern __inline __m128
! __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
! _mm_maskz_roundscale_ss (__mmask8 __A, __m128 __B, __m128 __C,
! 			 const int __imm)
! {
!   return (__m128)
!     __builtin_ia32_rndscaless_mask_round ((__v4sf) __B,
! 					  (__v4sf) __C, __imm,
! 					  (__v4sf)
! 					  _mm_setzero_ps (),
! 					  (__mmask8) __A,
! 					  _MM_FROUND_CUR_DIRECTION);
  }
  
  extern __inline __m128d
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm_roundscale_sd (__m128d __A, __m128d __B, const int __imm)
  {
!   return (__m128d)
!     __builtin_ia32_rndscalesd_mask_round ((__v2df) __A,
! 					  (__v2df) __B, __imm,
! 					  (__v2df)
! 					  _mm_setzero_pd (),
! 					  (__mmask8) -1,
! 					  _MM_FROUND_CUR_DIRECTION);
! }
! 
! extern __inline __m128d
! __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
! _mm_mask_roundscale_sd (__m128d __A, __mmask8 __B, __m128d __C, __m128d __D,
! 			const int __imm)
! {
!   return (__m128d)
!     __builtin_ia32_rndscalesd_mask_round ((__v2df) __C,
! 					  (__v2df) __D, __imm,
! 					  (__v2df) __A,
! 					  (__mmask8) __B,
! 					  _MM_FROUND_CUR_DIRECTION);
! }
! 
! extern __inline __m128d
! __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
! _mm_maskz_roundscale_sd (__mmask8 __A, __m128d __B, __m128d __C,
! 			 const int __imm)
! {
!   return (__m128d)
!     __builtin_ia32_rndscalesd_mask_round ((__v2df) __B,
! 					  (__v2df) __C, __imm,
! 					  (__v2df)
! 					  _mm_setzero_pd (),
! 					  (__mmask8) __A,
! 					  _MM_FROUND_CUR_DIRECTION);
  }
  
  #else
*************** _mm_roundscale_sd (__m128d __A, __m128d
*** 14825,14836 ****
  					     (int)(C),			\
  					     (__v8df)_mm512_setzero_pd(),\
  					     (__mmask8)(A), _MM_FROUND_CUR_DIRECTION))
! #define _mm_roundscale_ss(A, B, C)					\
!   ((__m128) __builtin_ia32_rndscaless_round ((__v4sf)(__m128)(A),	\
!   (__v4sf)(__m128)(B), (int)(C), _MM_FROUND_CUR_DIRECTION))
! #define _mm_roundscale_sd(A, B, C)					\
!   ((__m128d) __builtin_ia32_rndscalesd_round ((__v2df)(__m128d)(A),	\
!     (__v2df)(__m128d)(B), (int)(C), _MM_FROUND_CUR_DIRECTION))
  #endif
  
  #ifdef __OPTIMIZE__
--- 15033,15086 ----
  					     (int)(C),			\
  					     (__v8df)_mm512_setzero_pd(),\
  					     (__mmask8)(A), _MM_FROUND_CUR_DIRECTION))
! #define _mm_roundscale_ss(A, B, I)					\
!   ((__m128)								\
!    __builtin_ia32_rndscaless_mask_round ((__v4sf) (__m128) (A),		\
! 					 (__v4sf) (__m128) (B),		\
! 					 (int) (I),			\
! 					 (__v4sf) _mm_setzero_ps (),	\
! 					 (__mmask8) (-1),		\
! 					 _MM_FROUND_CUR_DIRECTION))
! #define _mm_mask_roundscale_ss(A, U, B, C, I)				\
!   ((__m128)								\
!    __builtin_ia32_rndscaless_mask_round ((__v4sf) (__m128) (B),		\
! 					 (__v4sf) (__m128) (C),		\
! 					 (int) (I),			\
! 					 (__v4sf) (__m128) (A),		\
! 					 (__mmask8) (U),		\
! 					 _MM_FROUND_CUR_DIRECTION))
! #define _mm_maskz_roundscale_ss(U, A, B, I)				\
!   ((__m128)								\
!    __builtin_ia32_rndscaless_mask_round ((__v4sf) (__m128) (A),		\
! 					 (__v4sf) (__m128) (B),		\
! 					 (int) (I),			\
! 					 (__v4sf) _mm_setzero_ps (),	\
! 					 (__mmask8) (U),		\
! 					 _MM_FROUND_CUR_DIRECTION))
! #define _mm_roundscale_sd(A, B, I)					\
!   ((__m128d)								\
!    __builtin_ia32_rndscalesd_mask_round ((__v2df) (__m128d) (A),	\
! 					 (__v2df) (__m128d) (B),	\
! 					 (int) (I),			\
! 					 (__v2df) _mm_setzero_pd (),	\
! 					 (__mmask8) (-1),		\
! 					 _MM_FROUND_CUR_DIRECTION))
! #define _mm_mask_roundscale_sd(A, U, B, C, I)				\
!   ((__m128d)								\
!    __builtin_ia32_rndscalesd_mask_round ((__v2df) (__m128d) (B),	\
! 					 (__v2df) (__m128d) (C),	\
! 					 (int) (I),			\
! 					 (__v2df) (__m128d) (A),	\
! 					 (__mmask8) (U),		\
! 					 _MM_FROUND_CUR_DIRECTION))
! #define _mm_maskz_roundscale_sd(U, A, B, I)				\
!   ((__m128d)								\
!    __builtin_ia32_rndscalesd_mask_round ((__v2df) (__m128d) (A),	\
! 					 (__v2df) (__m128d) (B),	\
! 					 (int) (I),			\
! 					 (__v2df) _mm_setzero_pd (),	\
! 					 (__mmask8) (U),		\
! 					 _MM_FROUND_CUR_DIRECTION))
  #endif
  
  #ifdef __OPTIMIZE__
*************** _mm_mask_cmp_ss_mask (__mmask8 __M, __m1
*** 15248,15259 ****
  #define _mm512_mask_cmp_pd_mask(M, X, Y, P)					\
    ((__mmask8) __builtin_ia32_cmppd512_mask ((__v8df)(__m512d)(X),	\
  					    (__v8df)(__m512d)(Y), (int)(P),\
! 					    (__mmask8)M, _MM_FROUND_CUR_DIRECTION))
  
  #define _mm512_mask_cmp_ps_mask(M, X, Y, P)					\
    ((__mmask16) __builtin_ia32_cmpps512_mask ((__v16sf)(__m512)(X),	\
  					     (__v16sf)(__m512)(Y), (int)(P),\
! 					     (__mmask16)M,_MM_FROUND_CUR_DIRECTION))
  
  #define _mm_cmp_sd_mask(X, Y, P)					\
    ((__mmask8) __builtin_ia32_cmpsd_mask ((__v2df)(__m128d)(X),		\
--- 15498,15509 ----
  #define _mm512_mask_cmp_pd_mask(M, X, Y, P)					\
    ((__mmask8) __builtin_ia32_cmppd512_mask ((__v8df)(__m512d)(X),	\
  					    (__v8df)(__m512d)(Y), (int)(P),\
! 					    (__mmask8)(M), _MM_FROUND_CUR_DIRECTION))
  
  #define _mm512_mask_cmp_ps_mask(M, X, Y, P)					\
    ((__mmask16) __builtin_ia32_cmpps512_mask ((__v16sf)(__m512)(X),	\
  					     (__v16sf)(__m512)(Y), (int)(P),\
! 					     (__mmask16)(M),_MM_FROUND_CUR_DIRECTION))
  
  #define _mm_cmp_sd_mask(X, Y, P)					\
    ((__mmask8) __builtin_ia32_cmpsd_mask ((__v2df)(__m128d)(X),		\
*************** _mm512_castsi256_si512 (__m256i __A)
*** 15409,15414 ****
--- 15659,15706 ----
    return (__m512i)__builtin_ia32_si512_256si ((__v8si)__A);
  }
  
+ extern __inline __m512d
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_zextpd128_pd512 (__m128d __A)
+ {
+   return (__m512d) _mm512_insertf32x4 (_mm512_setzero_ps (), (__m128) __A, 0);
+ }
+ 
+ extern __inline __m512
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_zextps128_ps512 (__m128 __A)
+ {
+   return _mm512_insertf32x4 (_mm512_setzero_ps (), __A, 0);
+ }
+ 
+ extern __inline __m512i
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_zextsi128_si512 (__m128i __A)
+ {
+   return _mm512_inserti32x4 (_mm512_setzero_si512 (), __A, 0);
+ }
+ 
+ extern __inline __m512d
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_zextpd256_pd512 (__m256d __A)
+ {
+   return _mm512_insertf64x4 (_mm512_setzero_pd (), __A, 0);
+ }
+ 
+ extern __inline __m512
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_zextps256_ps512 (__m256 __A)
+ {
+   return (__m512) _mm512_insertf64x4 (_mm512_setzero_pd (), (__m256d) __A, 0);
+ }
+ 
+ extern __inline __m512i
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_zextsi256_si512 (__m256i __A)
+ {
+   return _mm512_inserti64x4 (_mm512_setzero_si512 (), __A, 0);
+ }
+ 
  extern __inline __mmask16
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm512_cmpeq_epu32_mask (__m512i __A, __m512i __B)
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512ifmaintrin.h gcc-10.1.0/gcc/config/i386/avx512ifmaintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512ifmaintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512ifmaintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512ifmavlintrin.h gcc-10.1.0/gcc/config/i386/avx512ifmavlintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512ifmavlintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512ifmavlintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512pfintrin.h gcc-10.1.0/gcc/config/i386/avx512pfintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512pfintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512pfintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** _mm512_mask_prefetch_i64scatter_ps (void
*** 192,259 ****
  
  #else
  #define _mm512_prefetch_i32gather_pd(INDEX, ADDR, SCALE, HINT)		     \
!   __builtin_ia32_gatherpfdpd ((__mmask8)0xFF, (__v8si)(__m256i)INDEX,	     \
! 			      (void const *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_prefetch_i32gather_ps(INDEX, ADDR, SCALE, HINT)		     \
!   __builtin_ia32_gatherpfdps ((__mmask16)0xFFFF, (__v16si)(__m512i)INDEX,    \
! 			      (void const *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_mask_prefetch_i32gather_pd(INDEX, MASK, ADDR, SCALE, HINT)    \
!   __builtin_ia32_gatherpfdpd ((__mmask8)MASK, (__v8si)(__m256i)INDEX,	     \
! 			      (void const *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_mask_prefetch_i32gather_ps(INDEX, MASK, ADDR, SCALE, HINT)    \
!   __builtin_ia32_gatherpfdps ((__mmask16)MASK, (__v16si)(__m512i)INDEX,      \
! 			      (void const *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_prefetch_i64gather_pd(INDEX, ADDR, SCALE, HINT)		     \
!   __builtin_ia32_gatherpfqpd ((__mmask8)0xFF, (__v8di)(__m512i)INDEX,	     \
! 			      (void *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_prefetch_i64gather_ps(INDEX, ADDR, SCALE, HINT)		     \
!   __builtin_ia32_gatherpfqps ((__mmask8)0xFF, (__v8di)(__m512i)INDEX,	     \
! 			      (void *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_mask_prefetch_i64gather_pd(INDEX, MASK, ADDR, SCALE, HINT)    \
!   __builtin_ia32_gatherpfqpd ((__mmask8)MASK, (__v8di)(__m512i)INDEX,	     \
! 			      (void *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_mask_prefetch_i64gather_ps(INDEX, MASK, ADDR, SCALE, HINT)    \
!   __builtin_ia32_gatherpfqps ((__mmask8)MASK, (__v8di)(__m512i)INDEX,	     \
! 			      (void *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_prefetch_i32scatter_pd(ADDR, INDEX, SCALE, HINT)              \
!   __builtin_ia32_scatterpfdpd ((__mmask8)0xFF, (__v8si)(__m256i)INDEX,       \
! 			       (void *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_prefetch_i32scatter_ps(ADDR, INDEX, SCALE, HINT)              \
!   __builtin_ia32_scatterpfdps ((__mmask16)0xFFFF, (__v16si)(__m512i)INDEX,   \
! 			       (void *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_mask_prefetch_i32scatter_pd(ADDR, MASK, INDEX, SCALE, HINT)   \
!   __builtin_ia32_scatterpfdpd ((__mmask8)MASK, (__v8si)(__m256i)INDEX,       \
! 			       (void *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_mask_prefetch_i32scatter_ps(ADDR, MASK, INDEX, SCALE, HINT)   \
!   __builtin_ia32_scatterpfdps ((__mmask16)MASK, (__v16si)(__m512i)INDEX,     \
! 			       (void *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_prefetch_i64scatter_pd(ADDR, INDEX, SCALE, HINT)              \
!   __builtin_ia32_scatterpfqpd ((__mmask8)0xFF, (__v8di)(__m512i)INDEX,	     \
! 			       (void *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_prefetch_i64scatter_ps(ADDR, INDEX, SCALE, HINT)              \
!   __builtin_ia32_scatterpfqps ((__mmask8)0xFF, (__v8di)(__m512i)INDEX,	     \
! 			       (void *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_mask_prefetch_i64scatter_pd(ADDR, MASK, INDEX, SCALE, HINT)   \
!   __builtin_ia32_scatterpfqpd ((__mmask8)MASK, (__v8di)(__m512i)INDEX,	     \
! 			       (void *)ADDR, (int)SCALE, (int)HINT)
  
  #define _mm512_mask_prefetch_i64scatter_ps(ADDR, MASK, INDEX, SCALE, HINT)   \
!   __builtin_ia32_scatterpfqps ((__mmask8)MASK, (__v8di)(__m512i)INDEX,	     \
! 			       (void *)ADDR, (int)SCALE, (int)HINT)
  #endif
  
  #ifdef __DISABLE_AVX512PF__
--- 192,264 ----
  
  #else
  #define _mm512_prefetch_i32gather_pd(INDEX, ADDR, SCALE, HINT)		     \
!   __builtin_ia32_gatherpfdpd ((__mmask8)0xFF, (__v8si)(__m256i) (INDEX),     \
! 			      (void const *) (ADDR), (int) (SCALE),	     \
! 			      (int) (HINT))
  
  #define _mm512_prefetch_i32gather_ps(INDEX, ADDR, SCALE, HINT)		     \
!   __builtin_ia32_gatherpfdps ((__mmask16)0xFFFF, (__v16si)(__m512i) (INDEX), \
! 			      (void const *) (ADDR), (int) (SCALE),	     \
! 			      (int) (HINT))
  
  #define _mm512_mask_prefetch_i32gather_pd(INDEX, MASK, ADDR, SCALE, HINT)    \
!   __builtin_ia32_gatherpfdpd ((__mmask8) (MASK), (__v8si)(__m256i) (INDEX),  \
! 			      (void const *) (ADDR), (int) (SCALE),	     \
! 			      (int) (HINT))
  
  #define _mm512_mask_prefetch_i32gather_ps(INDEX, MASK, ADDR, SCALE, HINT)    \
!   __builtin_ia32_gatherpfdps ((__mmask16) (MASK), (__v16si)(__m512i) (INDEX),\
! 			      (void const *) (ADDR), (int) (SCALE),	     \
! 			      (int) (HINT))
  
  #define _mm512_prefetch_i64gather_pd(INDEX, ADDR, SCALE, HINT)		     \
!   __builtin_ia32_gatherpfqpd ((__mmask8)0xFF, (__v8di)(__m512i) (INDEX),     \
! 			      (void *) (ADDR), (int) (SCALE), (int) (HINT))
  
  #define _mm512_prefetch_i64gather_ps(INDEX, ADDR, SCALE, HINT)		     \
!   __builtin_ia32_gatherpfqps ((__mmask8)0xFF, (__v8di)(__m512i) (INDEX),     \
! 			      (void *) (ADDR), (int) (SCALE), (int) (HINT))
  
  #define _mm512_mask_prefetch_i64gather_pd(INDEX, MASK, ADDR, SCALE, HINT)    \
!   __builtin_ia32_gatherpfqpd ((__mmask8) (MASK), (__v8di)(__m512i) (INDEX),  \
! 			      (void *) (ADDR), (int) (SCALE), (int) (HINT))
  
  #define _mm512_mask_prefetch_i64gather_ps(INDEX, MASK, ADDR, SCALE, HINT)    \
!   __builtin_ia32_gatherpfqps ((__mmask8) (MASK), (__v8di)(__m512i) (INDEX),  \
! 			      (void *) (ADDR), (int) (SCALE), (int) (HINT))
  
  #define _mm512_prefetch_i32scatter_pd(ADDR, INDEX, SCALE, HINT)              \
!   __builtin_ia32_scatterpfdpd ((__mmask8)0xFF, (__v8si)(__m256i) (INDEX),    \
! 			       (void *) (ADDR), (int) (SCALE), (int) (HINT))
  
  #define _mm512_prefetch_i32scatter_ps(ADDR, INDEX, SCALE, HINT)              \
!   __builtin_ia32_scatterpfdps ((__mmask16)0xFFFF, (__v16si)(__m512i) (INDEX),\
! 			       (void *) (ADDR), (int) (SCALE), (int) (HINT))
  
  #define _mm512_mask_prefetch_i32scatter_pd(ADDR, MASK, INDEX, SCALE, HINT)   \
!   __builtin_ia32_scatterpfdpd ((__mmask8) (MASK), (__v8si)(__m256i) (INDEX), \
! 			       (void *) (ADDR), (int) (SCALE), (int) (HINT))
  
  #define _mm512_mask_prefetch_i32scatter_ps(ADDR, MASK, INDEX, SCALE, HINT)   \
!   __builtin_ia32_scatterpfdps ((__mmask16) (MASK),			     \
! 			       (__v16si)(__m512i) (INDEX),		     \
! 			       (void *) (ADDR), (int) (SCALE), (int) (HINT))
  
  #define _mm512_prefetch_i64scatter_pd(ADDR, INDEX, SCALE, HINT)              \
!   __builtin_ia32_scatterpfqpd ((__mmask8)0xFF, (__v8di)(__m512i) (INDEX),    \
! 			       (void *) (ADDR), (int) (SCALE), (int) (HINT))
  
  #define _mm512_prefetch_i64scatter_ps(ADDR, INDEX, SCALE, HINT)              \
!   __builtin_ia32_scatterpfqps ((__mmask8)0xFF, (__v8di)(__m512i) (INDEX),    \
! 			       (void *) (ADDR), (int) (SCALE), (int) (HINT))
  
  #define _mm512_mask_prefetch_i64scatter_pd(ADDR, MASK, INDEX, SCALE, HINT)   \
!   __builtin_ia32_scatterpfqpd ((__mmask8) (MASK), (__v8di)(__m512i) (INDEX), \
! 			       (void *) (ADDR), (int) (SCALE), (int) (HINT))
  
  #define _mm512_mask_prefetch_i64scatter_ps(ADDR, MASK, INDEX, SCALE, HINT)   \
!   __builtin_ia32_scatterpfqps ((__mmask8) (MASK), (__v8di)(__m512i) (INDEX), \
! 			       (void *) (ADDR), (int) (SCALE), (int) (HINT))
  #endif
  
  #ifdef __DISABLE_AVX512PF__
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512vbmi2intrin.h gcc-10.1.0/gcc/config/i386/avx512vbmi2intrin.h
*** gcc-9.3.0/gcc/config/i386/avx512vbmi2intrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512vbmi2intrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512vbmi2vlintrin.h gcc-10.1.0/gcc/config/i386/avx512vbmi2vlintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512vbmi2vlintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512vbmi2vlintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512vbmiintrin.h gcc-10.1.0/gcc/config/i386/avx512vbmiintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512vbmiintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512vbmiintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512vbmivlintrin.h gcc-10.1.0/gcc/config/i386/avx512vbmivlintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512vbmivlintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512vbmivlintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512vlbwintrin.h gcc-10.1.0/gcc/config/i386/avx512vlbwintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512vlbwintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512vlbwintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** _mm_maskz_slli_epi16 (__mmask8 __U, __m1
*** 1787,1793 ****
  #else
  #define _mm256_mask_alignr_epi8(W, U, X, Y, N)					    \
    ((__m256i) __builtin_ia32_palignr256_mask ((__v4di)(__m256i)(X),		    \
! 					    (__v4di)(__m256i)(Y), (int)(N * 8),	    \
  					    (__v4di)(__m256i)(X), (__mmask32)(U)))
  
  #define _mm256_mask_srli_epi16(W, U, A, B)                              \
--- 1787,1793 ----
  #else
  #define _mm256_mask_alignr_epi8(W, U, X, Y, N)					    \
    ((__m256i) __builtin_ia32_palignr256_mask ((__v4di)(__m256i)(X),		    \
! 					    (__v4di)(__m256i)(Y), (int)((N) * 8),   \
  					    (__v4di)(__m256i)(X), (__mmask32)(U)))
  
  #define _mm256_mask_srli_epi16(W, U, A, B)                              \
*************** _mm_maskz_slli_epi16 (__mmask8 __U, __m1
*** 1864,1881 ****
  
  #define _mm256_maskz_alignr_epi8(U, X, Y, N)					    \
    ((__m256i) __builtin_ia32_palignr256_mask ((__v4di)(__m256i)(X),		    \
! 					    (__v4di)(__m256i)(Y), (int)(N * 8),	    \
  					    (__v4di)(__m256i)_mm256_setzero_si256 (),   \
  					    (__mmask32)(U)))
  
  #define _mm_mask_alignr_epi8(W, U, X, Y, N)					    \
    ((__m128i) __builtin_ia32_palignr128_mask ((__v2di)(__m128i)(X),		    \
! 					    (__v2di)(__m128i)(Y), (int)(N * 8),	    \
  					    (__v2di)(__m128i)(X), (__mmask16)(U)))
  
  #define _mm_maskz_alignr_epi8(U, X, Y, N)					    \
    ((__m128i) __builtin_ia32_palignr128_mask ((__v2di)(__m128i)(X),		    \
! 					    (__v2di)(__m128i)(Y), (int)(N * 8),	    \
  					    (__v2di)(__m128i)_mm_setzero_si128 (),  \
  					    (__mmask16)(U)))
  
--- 1864,1881 ----
  
  #define _mm256_maskz_alignr_epi8(U, X, Y, N)					    \
    ((__m256i) __builtin_ia32_palignr256_mask ((__v4di)(__m256i)(X),		    \
! 					    (__v4di)(__m256i)(Y), (int)((N) * 8),   \
  					    (__v4di)(__m256i)_mm256_setzero_si256 (),   \
  					    (__mmask32)(U)))
  
  #define _mm_mask_alignr_epi8(W, U, X, Y, N)					    \
    ((__m128i) __builtin_ia32_palignr128_mask ((__v2di)(__m128i)(X),		    \
! 					    (__v2di)(__m128i)(Y), (int)((N) * 8),   \
  					    (__v2di)(__m128i)(X), (__mmask16)(U)))
  
  #define _mm_maskz_alignr_epi8(U, X, Y, N)					    \
    ((__m128i) __builtin_ia32_palignr128_mask ((__v2di)(__m128i)(X),		    \
! 					    (__v2di)(__m128i)(Y), (int)((N) * 8),   \
  					    (__v2di)(__m128i)_mm_setzero_si128 (),  \
  					    (__mmask16)(U)))
  
*************** _mm_maskz_slli_epi16 (__mmask8 __U, __m1
*** 2033,2039 ****
  #define _mm256_mask_cmp_epu8_mask(M, X, Y, P)				\
    ((__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi)(__m256i)(X),	\
  					    (__v32qi)(__m256i)(Y), (int)(P),\
! 					    (__mmask32)M))
  #endif
  
  extern __inline __mmask32
--- 2033,2039 ----
  #define _mm256_mask_cmp_epu8_mask(M, X, Y, P)				\
    ((__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi)(__m256i)(X),	\
  					    (__v32qi)(__m256i)(Y), (int)(P),\
! 					    (__mmask32)(M)))
  #endif
  
  extern __inline __mmask32
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512vldqintrin.h gcc-10.1.0/gcc/config/i386/avx512vldqintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512vldqintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512vldqintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512vlintrin.h gcc-10.1.0/gcc/config/i386/avx512vlintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512vlintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512vlintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** _mm_maskz_loadu_epi64 (__mmask8 __U, voi
*** 757,762 ****
--- 757,769 ----
  
  extern __inline void
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_storeu_epi64 (void *__P, __m256i __A)
+ {
+   *(__m256i_u *) __P = (__m256i_u) __A;
+ }
+ 
+ extern __inline void
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm256_mask_storeu_epi64 (void *__P, __mmask8 __U, __m256i __A)
  {
    __builtin_ia32_storedqudi256_mask ((long long *) __P,
*************** _mm256_mask_storeu_epi64 (void *__P, __m
*** 766,771 ****
--- 773,785 ----
  
  extern __inline void
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm_storeu_epi64 (void *__P, __m128i __A)
+ {
+   *(__m128i_u *) __P = (__m128i_u) __A;
+ }
+ 
+ extern __inline void
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm_mask_storeu_epi64 (void *__P, __mmask8 __U, __m128i __A)
  {
    __builtin_ia32_storedqudi128_mask ((long long *) __P,
*************** _mm_maskz_loadu_epi32 (__mmask8 __U, voi
*** 813,818 ****
--- 827,839 ----
  
  extern __inline void
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_storeu_epi32 (void *__P, __m256i __A)
+ {
+   *(__m256i_u *) __P = (__m256i_u) __A;
+ }
+ 
+ extern __inline void
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm256_mask_storeu_epi32 (void *__P, __mmask8 __U, __m256i __A)
  {
    __builtin_ia32_storedqusi256_mask ((int *) __P,
*************** _mm256_mask_storeu_epi32 (void *__P, __m
*** 822,827 ****
--- 843,855 ----
  
  extern __inline void
  __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm_storeu_epi32 (void *__P, __m128i __A)
+ {
+   *(__m128i_u *) __P = (__m128i_u) __A;
+ }
+ 
+ extern __inline void
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
  _mm_mask_storeu_epi32 (void *__P, __mmask8 __U, __m128i __A)
  {
    __builtin_ia32_storedqusi128_mask ((int *) __P,
*************** _mm256_permutex_pd (__m256d __X, const i
*** 12972,13231 ****
                                            (__mmask8)(U)))
  
  #define _mm256_mmask_i32gather_ps(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256) __builtin_ia32_gather3siv8sf ((__v8sf)(__m256)V1OLD,		\
! 					 (void const *)ADDR,		\
! 					 (__v8si)(__m256i)INDEX,	\
! 					 (__mmask8)MASK, (int)SCALE)
  
  #define _mm_mmask_i32gather_ps(V1OLD, MASK, INDEX, ADDR, SCALE)		\
!   (__m128) __builtin_ia32_gather3siv4sf ((__v4sf)(__m128)V1OLD,		\
! 					 (void const *)ADDR,		\
! 					 (__v4si)(__m128i)INDEX,	\
! 					 (__mmask8)MASK, (int)SCALE)
  
  #define _mm256_mmask_i32gather_pd(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256d) __builtin_ia32_gather3siv4df ((__v4df)(__m256d)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v4si)(__m128i)INDEX,	\
! 					  (__mmask8)MASK, (int)SCALE)
  
  #define _mm_mmask_i32gather_pd(V1OLD, MASK, INDEX, ADDR, SCALE)		\
!   (__m128d) __builtin_ia32_gather3siv2df ((__v2df)(__m128d)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v4si)(__m128i)INDEX,	\
! 					  (__mmask8)MASK, (int)SCALE)
  
  #define _mm256_mmask_i64gather_ps(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m128) __builtin_ia32_gather3div8sf ((__v4sf)(__m128)V1OLD,		\
! 					 (void const *)ADDR,		\
! 					 (__v4di)(__m256i)INDEX,	\
! 					 (__mmask8)MASK, (int)SCALE)
  
  #define _mm_mmask_i64gather_ps(V1OLD, MASK, INDEX, ADDR, SCALE)		\
!   (__m128) __builtin_ia32_gather3div4sf ((__v4sf)(__m128)V1OLD,		\
! 					 (void const *)ADDR,		\
! 					 (__v2di)(__m128i)INDEX,	\
! 					 (__mmask8)MASK, (int)SCALE)
  
  #define _mm256_mmask_i64gather_pd(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256d) __builtin_ia32_gather3div4df ((__v4df)(__m256d)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v4di)(__m256i)INDEX,	\
! 					  (__mmask8)MASK, (int)SCALE)
  
  #define _mm_mmask_i64gather_pd(V1OLD, MASK, INDEX, ADDR, SCALE)		\
!   (__m128d) __builtin_ia32_gather3div2df ((__v2df)(__m128d)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v2di)(__m128i)INDEX,	\
! 					  (__mmask8)MASK, (int)SCALE)
  
  #define _mm256_mmask_i32gather_epi32(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256i) __builtin_ia32_gather3siv8si ((__v8si)(__m256i)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v8si)(__m256i)INDEX,	\
! 					  (__mmask8)MASK, (int)SCALE)
  
  #define _mm_mmask_i32gather_epi32(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m128i) __builtin_ia32_gather3siv4si ((__v4si)(__m128i)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v4si)(__m128i)INDEX,	\
! 					  (__mmask8)MASK, (int)SCALE)
  
  #define _mm256_mmask_i32gather_epi64(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256i) __builtin_ia32_gather3siv4di ((__v4di)(__m256i)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v4si)(__m128i)INDEX,	\
! 					  (__mmask8)MASK, (int)SCALE)
  
  #define _mm_mmask_i32gather_epi64(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m128i) __builtin_ia32_gather3siv2di ((__v2di)(__m128i)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v4si)(__m128i)INDEX,	\
! 					  (__mmask8)MASK, (int)SCALE)
  
  #define _mm256_mmask_i64gather_epi32(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m128i) __builtin_ia32_gather3div8si ((__v4si)(__m128i)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v4di)(__m256i)INDEX,	\
! 					  (__mmask8)MASK, (int)SCALE)
  
  #define _mm_mmask_i64gather_epi32(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m128i) __builtin_ia32_gather3div4si ((__v4si)(__m128i)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v2di)(__m128i)INDEX,	\
! 					  (__mmask8)MASK, (int)SCALE)
  
  #define _mm256_mmask_i64gather_epi64(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256i) __builtin_ia32_gather3div4di ((__v4di)(__m256i)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v4di)(__m256i)INDEX,	\
! 					  (__mmask8)MASK, (int)SCALE)
  
  #define _mm_mmask_i64gather_epi64(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m128i) __builtin_ia32_gather3div2di ((__v2di)(__m128i)V1OLD,	\
! 					  (void const *)ADDR,		\
! 					  (__v2di)(__m128i)INDEX,	\
! 					  (__mmask8)MASK, (int)SCALE)
  
  #define _mm256_i32scatter_ps(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv8sf ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v8si)(__m256i)INDEX,			\
! 				(__v8sf)(__m256)V1, (int)SCALE)
  
  #define _mm256_mask_i32scatter_ps(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv8sf ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v8si)(__m256i)INDEX,			\
! 				(__v8sf)(__m256)V1, (int)SCALE)
  
  #define _mm_i32scatter_ps(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv4sf ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v4si)(__m128i)INDEX,			\
! 				(__v4sf)(__m128)V1, (int)SCALE)
  
  #define _mm_mask_i32scatter_ps(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv4sf ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v4si)(__m128i)INDEX,			\
! 				(__v4sf)(__m128)V1, (int)SCALE)
  
  #define _mm256_i32scatter_pd(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv4df ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v4si)(__m128i)INDEX,			\
! 				(__v4df)(__m256d)V1, (int)SCALE)
  
  #define _mm256_mask_i32scatter_pd(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv4df ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v4si)(__m128i)INDEX,			\
! 				(__v4df)(__m256d)V1, (int)SCALE)
  
  #define _mm_i32scatter_pd(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv2df ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v4si)(__m128i)INDEX,			\
! 				(__v2df)(__m128d)V1, (int)SCALE)
  
  #define _mm_mask_i32scatter_pd(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv2df ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v4si)(__m128i)INDEX,			\
! 				(__v2df)(__m128d)V1, (int)SCALE)
  
  #define _mm256_i64scatter_ps(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv8sf ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v4di)(__m256i)INDEX,			\
! 				(__v4sf)(__m128)V1, (int)SCALE)
  
  #define _mm256_mask_i64scatter_ps(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv8sf ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v4di)(__m256i)INDEX,			\
! 				(__v4sf)(__m128)V1, (int)SCALE)
  
  #define _mm_i64scatter_ps(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv4sf ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v2di)(__m128i)INDEX,			\
! 				(__v4sf)(__m128)V1, (int)SCALE)
  
  #define _mm_mask_i64scatter_ps(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv4sf ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v2di)(__m128i)INDEX,			\
! 				(__v4sf)(__m128)V1, (int)SCALE)
  
  #define _mm256_i64scatter_pd(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv4df ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v4di)(__m256i)INDEX,			\
! 				(__v4df)(__m256d)V1, (int)SCALE)
  
  #define _mm256_mask_i64scatter_pd(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv4df ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v4di)(__m256i)INDEX,			\
! 				(__v4df)(__m256d)V1, (int)SCALE)
  
  #define _mm_i64scatter_pd(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv2df ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v2di)(__m128i)INDEX,			\
! 				(__v2df)(__m128d)V1, (int)SCALE)
  
  #define _mm_mask_i64scatter_pd(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv2df ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v2di)(__m128i)INDEX,			\
! 				(__v2df)(__m128d)V1, (int)SCALE)
  
  #define _mm256_i32scatter_epi32(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv8si ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v8si)(__m256i)INDEX,			\
! 				(__v8si)(__m256i)V1, (int)SCALE)
  
  #define _mm256_mask_i32scatter_epi32(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scattersiv8si ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v8si)(__m256i)INDEX,			\
! 				(__v8si)(__m256i)V1, (int)SCALE)
  
  #define _mm_i32scatter_epi32(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv4si ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v4si)(__m128i)INDEX,			\
! 				(__v4si)(__m128i)V1, (int)SCALE)
  
  #define _mm_mask_i32scatter_epi32(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv4si ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v4si)(__m128i)INDEX,			\
! 				(__v4si)(__m128i)V1, (int)SCALE)
  
  #define _mm256_i32scatter_epi64(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv4di ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v4si)(__m128i)INDEX,			\
! 				(__v4di)(__m256i)V1, (int)SCALE)
  
  #define _mm256_mask_i32scatter_epi64(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scattersiv4di ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v4si)(__m128i)INDEX,			\
! 				(__v4di)(__m256i)V1, (int)SCALE)
  
  #define _mm_i32scatter_epi64(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv2di ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v4si)(__m128i)INDEX,			\
! 				(__v2di)(__m128i)V1, (int)SCALE)
  
  #define _mm_mask_i32scatter_epi64(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv2di ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v4si)(__m128i)INDEX,			\
! 				(__v2di)(__m128i)V1, (int)SCALE)
  
  #define _mm256_i64scatter_epi32(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv8si ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v4di)(__m256i)INDEX,			\
! 				(__v4si)(__m128i)V1, (int)SCALE)
  
  #define _mm256_mask_i64scatter_epi32(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scatterdiv8si ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v4di)(__m256i)INDEX,			\
! 				(__v4si)(__m128i)V1, (int)SCALE)
  
  #define _mm_i64scatter_epi32(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv4si ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v2di)(__m128i)INDEX,			\
! 				(__v4si)(__m128i)V1, (int)SCALE)
  
  #define _mm_mask_i64scatter_epi32(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv4si ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v2di)(__m128i)INDEX,			\
! 				(__v4si)(__m128i)V1, (int)SCALE)
  
  #define _mm256_i64scatter_epi64(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv4di ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v4di)(__m256i)INDEX,			\
! 				(__v4di)(__m256i)V1, (int)SCALE)
  
  #define _mm256_mask_i64scatter_epi64(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scatterdiv4di ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v4di)(__m256i)INDEX,			\
! 				(__v4di)(__m256i)V1, (int)SCALE)
  
  #define _mm_i64scatter_epi64(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv2di ((void *)ADDR, (__mmask8)0xFF,		\
! 				(__v2di)(__m128i)INDEX,			\
! 				(__v2di)(__m128i)V1, (int)SCALE)
  
  #define _mm_mask_i64scatter_epi64(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv2di ((void *)ADDR, (__mmask8)MASK,		\
! 				(__v2di)(__m128i)INDEX,			\
! 				(__v2di)(__m128i)V1, (int)SCALE)
  
  #define _mm256_mask_shuffle_epi32(W, U, X, C)                                       \
    ((__m256i)  __builtin_ia32_pshufd256_mask ((__v8si)(__m256i)(X), (int)(C),        \
--- 13000,13275 ----
                                            (__mmask8)(U)))
  
  #define _mm256_mmask_i32gather_ps(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256) __builtin_ia32_gather3siv8sf ((__v8sf)(__m256) (V1OLD),	\
! 					 (void const *) (ADDR),		\
! 					 (__v8si)(__m256i) (INDEX),	\
! 					 (__mmask8) (MASK),		\
! 					 (int) (SCALE))
  
  #define _mm_mmask_i32gather_ps(V1OLD, MASK, INDEX, ADDR, SCALE)		\
!   (__m128) __builtin_ia32_gather3siv4sf ((__v4sf)(__m128) (V1OLD),	\
! 					 (void const *) (ADDR),		\
! 					 (__v4si)(__m128i) (INDEX),	\
! 					 (__mmask8) (MASK),		\
! 					 (int) (SCALE))
  
  #define _mm256_mmask_i32gather_pd(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256d) __builtin_ia32_gather3siv4df ((__v4df)(__m256d) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v4si)(__m128i) (INDEX),	\
! 					  (__mmask8) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm_mmask_i32gather_pd(V1OLD, MASK, INDEX, ADDR, SCALE)		\
!   (__m128d) __builtin_ia32_gather3siv2df ((__v2df)(__m128d) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v4si)(__m128i) (INDEX),	\
! 					  (__mmask8) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm256_mmask_i64gather_ps(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m128) __builtin_ia32_gather3div8sf ((__v4sf)(__m128) (V1OLD),	\
! 					 (void const *) (ADDR),		\
! 					 (__v4di)(__m256i) (INDEX),	\
! 					 (__mmask8) (MASK),		\
! 					 (int) (SCALE))
  
  #define _mm_mmask_i64gather_ps(V1OLD, MASK, INDEX, ADDR, SCALE)		\
!   (__m128) __builtin_ia32_gather3div4sf ((__v4sf)(__m128) (V1OLD),	\
! 					 (void const *) (ADDR),		\
! 					 (__v2di)(__m128i) (INDEX),	\
! 					 (__mmask8) (MASK),		\
! 					 (int) (SCALE))
  
  #define _mm256_mmask_i64gather_pd(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256d) __builtin_ia32_gather3div4df ((__v4df)(__m256d) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v4di)(__m256i) (INDEX),	\
! 					  (__mmask8) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm_mmask_i64gather_pd(V1OLD, MASK, INDEX, ADDR, SCALE)		\
!   (__m128d) __builtin_ia32_gather3div2df ((__v2df)(__m128d) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v2di)(__m128i) (INDEX),	\
! 					  (__mmask8) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm256_mmask_i32gather_epi32(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256i) __builtin_ia32_gather3siv8si ((__v8si)(__m256i) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v8si)(__m256i) (INDEX),	\
! 					  (__mmask8) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm_mmask_i32gather_epi32(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m128i) __builtin_ia32_gather3siv4si ((__v4si)(__m128i) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v4si)(__m128i) (INDEX),	\
! 					  (__mmask8) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm256_mmask_i32gather_epi64(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256i) __builtin_ia32_gather3siv4di ((__v4di)(__m256i) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v4si)(__m128i) (INDEX),	\
! 					  (__mmask8) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm_mmask_i32gather_epi64(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m128i) __builtin_ia32_gather3siv2di ((__v2di)(__m128i) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v4si)(__m128i) (INDEX),	\
! 					  (__mmask8) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm256_mmask_i64gather_epi32(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m128i) __builtin_ia32_gather3div8si ((__v4si)(__m128i) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v4di)(__m256i) (INDEX),	\
! 					  (__mmask8) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm_mmask_i64gather_epi32(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m128i) __builtin_ia32_gather3div4si ((__v4si)(__m128i) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v2di)(__m128i) (INDEX),	\
! 					  (__mmask8) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm256_mmask_i64gather_epi64(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m256i) __builtin_ia32_gather3div4di ((__v4di)(__m256i) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v4di)(__m256i) (INDEX),	\
! 					  (__mmask8) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm_mmask_i64gather_epi64(V1OLD, MASK, INDEX, ADDR, SCALE)	\
!   (__m128i) __builtin_ia32_gather3div2di ((__v2di)(__m128i) (V1OLD),	\
! 					  (void const *) (ADDR),	\
! 					  (__v2di)(__m128i) (INDEX),	\
! 					  (__mmask8) (MASK),		\
! 					  (int) (SCALE))
  
  #define _mm256_i32scatter_ps(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv8sf ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v8si)(__m256i) (INDEX),		\
! 				(__v8sf)(__m256) (V1), (int) (SCALE))
  
  #define _mm256_mask_i32scatter_ps(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv8sf ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v8si)(__m256i) (INDEX),		\
! 				(__v8sf)(__m256) (V1), (int) (SCALE))
  
  #define _mm_i32scatter_ps(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv4sf ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v4si)(__m128i) (INDEX),		\
! 				(__v4sf)(__m128) (V1), (int) (SCALE))
  
  #define _mm_mask_i32scatter_ps(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv4sf ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v4si)(__m128i) (INDEX),		\
! 				(__v4sf)(__m128) (V1), (int) (SCALE))
  
  #define _mm256_i32scatter_pd(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv4df ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v4si)(__m128i) (INDEX),		\
! 				(__v4df)(__m256d) (V1), (int) (SCALE))
  
  #define _mm256_mask_i32scatter_pd(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv4df ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v4si)(__m128i) (INDEX),		\
! 				(__v4df)(__m256d) (V1), (int) (SCALE))
  
  #define _mm_i32scatter_pd(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv2df ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v4si)(__m128i) (INDEX),		\
! 				(__v2df)(__m128d) (V1), (int) (SCALE))
  
  #define _mm_mask_i32scatter_pd(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv2df ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v4si)(__m128i) (INDEX),		\
! 				(__v2df)(__m128d) (V1), (int) (SCALE))
  
  #define _mm256_i64scatter_ps(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv8sf ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v4di)(__m256i) (INDEX),		\
! 				(__v4sf)(__m128) (V1), (int) (SCALE))
  
  #define _mm256_mask_i64scatter_ps(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv8sf ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v4di)(__m256i) (INDEX),		\
! 				(__v4sf)(__m128) (V1), (int) (SCALE))
  
  #define _mm_i64scatter_ps(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv4sf ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v2di)(__m128i) (INDEX),		\
! 				(__v4sf)(__m128) (V1), (int) (SCALE))
  
  #define _mm_mask_i64scatter_ps(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv4sf ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v2di)(__m128i) (INDEX),		\
! 				(__v4sf)(__m128) (V1), (int) (SCALE))
  
  #define _mm256_i64scatter_pd(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv4df ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v4di)(__m256i) (INDEX),		\
! 				(__v4df)(__m256d) (V1), (int) (SCALE))
  
  #define _mm256_mask_i64scatter_pd(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv4df ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v4di)(__m256i) (INDEX),		\
! 				(__v4df)(__m256d) (V1), (int) (SCALE))
  
  #define _mm_i64scatter_pd(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv2df ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v2di)(__m128i) (INDEX),		\
! 				(__v2df)(__m128d) (V1), (int) (SCALE))
  
  #define _mm_mask_i64scatter_pd(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv2df ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v2di)(__m128i) (INDEX),		\
! 				(__v2df)(__m128d) (V1), (int) (SCALE))
  
  #define _mm256_i32scatter_epi32(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv8si ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v8si)(__m256i) (INDEX),		\
! 				(__v8si)(__m256i) (V1), (int) (SCALE))
  
  #define _mm256_mask_i32scatter_epi32(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scattersiv8si ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v8si)(__m256i) (INDEX),		\
! 				(__v8si)(__m256i) (V1), (int) (SCALE))
  
  #define _mm_i32scatter_epi32(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv4si ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v4si)(__m128i) (INDEX),		\
! 				(__v4si)(__m128i) (V1), (int) (SCALE))
  
  #define _mm_mask_i32scatter_epi32(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv4si ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v4si)(__m128i) (INDEX),		\
! 				(__v4si)(__m128i) (V1), (int) (SCALE))
  
  #define _mm256_i32scatter_epi64(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv4di ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v4si)(__m128i) (INDEX),		\
! 				(__v4di)(__m256i) (V1), (int) (SCALE))
  
  #define _mm256_mask_i32scatter_epi64(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scattersiv4di ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v4si)(__m128i) (INDEX),		\
! 				(__v4di)(__m256i) (V1), (int) (SCALE))
  
  #define _mm_i32scatter_epi64(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scattersiv2di ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v4si)(__m128i) (INDEX),		\
! 				(__v2di)(__m128i) (V1), (int) (SCALE))
  
  #define _mm_mask_i32scatter_epi64(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scattersiv2di ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v4si)(__m128i) (INDEX),		\
! 				(__v2di)(__m128i) (V1), (int) (SCALE))
  
  #define _mm256_i64scatter_epi32(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv8si ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v4di)(__m256i) (INDEX),		\
! 				(__v4si)(__m128i) (V1), (int) (SCALE))
  
  #define _mm256_mask_i64scatter_epi32(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scatterdiv8si ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v4di)(__m256i) (INDEX),		\
! 				(__v4si)(__m128i) (V1), (int) (SCALE))
  
  #define _mm_i64scatter_epi32(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv4si ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v2di)(__m128i) (INDEX),		\
! 				(__v4si)(__m128i) (V1), (int) (SCALE))
  
  #define _mm_mask_i64scatter_epi32(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv4si ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v2di)(__m128i) (INDEX),		\
! 				(__v4si)(__m128i) (V1), (int) (SCALE))
  
  #define _mm256_i64scatter_epi64(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv4di ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v4di)(__m256i) (INDEX),		\
! 				(__v4di)(__m256i) (V1), (int) (SCALE))
  
  #define _mm256_mask_i64scatter_epi64(ADDR, MASK, INDEX, V1, SCALE)	\
!   __builtin_ia32_scatterdiv4di ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v4di)(__m256i) (INDEX),		\
! 				(__v4di)(__m256i) (V1), (int) (SCALE))
  
  #define _mm_i64scatter_epi64(ADDR, INDEX, V1, SCALE)			\
!   __builtin_ia32_scatterdiv2di ((void *) (ADDR), (__mmask8)0xFF,	\
! 				(__v2di)(__m128i) (INDEX),		\
! 				(__v2di)(__m128i) (V1), (int) (SCALE))
  
  #define _mm_mask_i64scatter_epi64(ADDR, MASK, INDEX, V1, SCALE)		\
!   __builtin_ia32_scatterdiv2di ((void *) (ADDR), (__mmask8) (MASK),	\
! 				(__v2di)(__m128i) (INDEX),		\
! 				(__v2di)(__m128i) (V1), (int) (SCALE))
  
  #define _mm256_mask_shuffle_epi32(W, U, X, C)                                       \
    ((__m256i)  __builtin_ia32_pshufd256_mask ((__v8si)(__m256i)(X), (int)(C),        \
*************** _mm256_permutex_pd (__m256d __X, const i
*** 13422,13440 ****
          (__mmask8)(U)))
  
  #define _mm_mask_cvtps_ph(W, U, A, I)						\
!   ((__m128i) __builtin_ia32_vcvtps2ph_mask ((__v4sf)(__m128) A, (int) (I),      \
        (__v8hi)(__m128i) (W), (__mmask8) (U)))
  
  #define _mm_maskz_cvtps_ph(U, A, I)						\
!   ((__m128i) __builtin_ia32_vcvtps2ph_mask ((__v4sf)(__m128) A, (int) (I),      \
        (__v8hi)(__m128i) _mm_setzero_si128 (), (__mmask8) (U)))
  
  #define _mm256_mask_cvtps_ph(W, U, A, I)					\
!   ((__m128i) __builtin_ia32_vcvtps2ph256_mask ((__v8sf)(__m256) A, (int) (I),	\
        (__v8hi)(__m128i) (W), (__mmask8) (U)))
  
  #define _mm256_maskz_cvtps_ph(U, A, I)						\
!   ((__m128i) __builtin_ia32_vcvtps2ph256_mask ((__v8sf)(__m256) A, (int) (I),   \
        (__v8hi)(__m128i) _mm_setzero_si128 (), (__mmask8) (U)))
  
  #define _mm256_mask_srai_epi32(W, U, A, B)				\
--- 13466,13484 ----
          (__mmask8)(U)))
  
  #define _mm_mask_cvtps_ph(W, U, A, I)						\
!   ((__m128i) __builtin_ia32_vcvtps2ph_mask ((__v4sf)(__m128) (A), (int) (I),	\
        (__v8hi)(__m128i) (W), (__mmask8) (U)))
  
  #define _mm_maskz_cvtps_ph(U, A, I)						\
!   ((__m128i) __builtin_ia32_vcvtps2ph_mask ((__v4sf)(__m128) (A), (int) (I),	\
        (__v8hi)(__m128i) _mm_setzero_si128 (), (__mmask8) (U)))
  
  #define _mm256_mask_cvtps_ph(W, U, A, I)					\
!   ((__m128i) __builtin_ia32_vcvtps2ph256_mask ((__v8sf)(__m256) (A), (int) (I),	\
        (__v8hi)(__m128i) (W), (__mmask8) (U)))
  
  #define _mm256_maskz_cvtps_ph(U, A, I)						\
!   ((__m128i) __builtin_ia32_vcvtps2ph256_mask ((__v8sf)(__m256) (A), (int) (I),	\
        (__v8hi)(__m128i) _mm_setzero_si128 (), (__mmask8) (U)))
  
  #define _mm256_mask_srai_epi32(W, U, A, B)				\
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512vnniintrin.h gcc-10.1.0/gcc/config/i386/avx512vnniintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512vnniintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512vnniintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512vnnivlintrin.h gcc-10.1.0/gcc/config/i386/avx512vnnivlintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512vnnivlintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512vnnivlintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512vp2intersectintrin.h gcc-10.1.0/gcc/config/i386/avx512vp2intersectintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512vp2intersectintrin.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/i386/avx512vp2intersectintrin.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,35 ----
+ #if !defined _IMMINTRIN_H_INCLUDED
+ #error "Never use <avx512vp2intersectintrin.h> directly; include <immintrin.h> instead."
+ #endif
+ 
+ #ifndef _AVX512VP2INTERSECTINTRIN_H_INCLUDED
+ #define _AVX512VP2INTERSECTINTRIN_H_INCLUDED
+ 
+ #if !defined(__AVX512VP2INTERSECT__)
+ #pragma GCC push_options
+ #pragma GCC target("avx512vp2intersect")
+ #define __DISABLE_AVX512VP2INTERSECT__
+ #endif /* __AVX512VP2INTERSECT__ */
+ 
+ extern __inline void
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_2intersect_epi32 (__m512i __A, __m512i __B, __mmask16 *__U,
+ 			 __mmask16 *__M)
+ {
+   __builtin_ia32_2intersectd512 (__U, __M, (__v16si) __A, (__v16si) __B);
+ }
+ 
+ extern __inline void
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_2intersect_epi64 (__m512i __A, __m512i __B, __mmask8 *__U,
+ 			 __mmask8 *__M)
+ {
+   __builtin_ia32_2intersectq512 (__U, __M, (__v8di) __A, (__v8di) __B);
+ }
+ 
+ #ifdef __DISABLE_AVX512VP2INTERSECT__
+ #undef __DISABLE_AVX512VP2INTERSECT__
+ #pragma GCC pop_options
+ #endif /* __DISABLE_AVX512VP2INTERSECT__ */
+ 
+ #endif /* _AVX512VP2INTERSECTINTRIN_H_INCLUDED */
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512vp2intersectvlintrin.h gcc-10.1.0/gcc/config/i386/avx512vp2intersectvlintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512vp2intersectvlintrin.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/i386/avx512vp2intersectvlintrin.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,49 ----
+ #if !defined _IMMINTRIN_H_INCLUDED
+ #error "Never use <avx512vp2intersectintrin.h> directly; include <immintrin.h> instead."
+ #endif
+ 
+ #ifndef _AVX512VP2INTERSECTVLINTRIN_H_INCLUDED
+ #define _AVX512VP2INTERSECTVLINTRIN_H_INCLUDED
+ 
+ #if !defined(__AVX512VP2INTERSECT__) || !defined(__AVX512VL__)
+ #pragma GCC push_options
+ #pragma GCC target("avx512vp2intersect,avx512vl")
+ #define __DISABLE_AVX512VP2INTERSECTVL__
+ #endif /* __AVX512VP2INTERSECTVL__ */
+ 
+ extern __inline void
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm_2intersect_epi32 (__m128i __A, __m128i __B, __mmask8 *__U, __mmask8 *__M)
+ {
+   __builtin_ia32_2intersectd128 (__U, __M, (__v4si) __A, (__v4si) __B);
+ }
+ 
+ extern __inline void
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_2intersect_epi32 (__m256i __A, __m256i __B, __mmask8 *__U,
+ 			 __mmask8 *__M)
+ {
+   __builtin_ia32_2intersectd256 (__U, __M, (__v8si) __A, (__v8si) __B);
+ }
+ 
+ extern __inline void
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm_2intersect_epi64 (__m128i __A, __m128i __B, __mmask8 *__U, __mmask8 *__M)
+ {
+   __builtin_ia32_2intersectq128 (__U, __M, (__v2di) __A, (__v2di) __B);
+ }
+ 
+ extern __inline void
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_2intersect_epi64 (__m256i __A, __m256i __B, __mmask8 *__U,
+ 			 __mmask8 *__M)
+ {
+   __builtin_ia32_2intersectq256 (__U, __M, (__v4di) __A, (__v4di) __B);
+ }
+ 
+ #ifdef __DISABLE_AVX512VP2INTERSECTVL__
+ #undef __DISABLE_AVX512VP2INTERSECTVL__
+ #pragma GCC pop_options
+ #endif /* __DISABLE_AVX512VP2INTERSECTVL__ */
+ 
+ #endif /* _AVX512VP2INTERSECTVLINTRIN_H_INCLUDED */
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512vpopcntdqintrin.h gcc-10.1.0/gcc/config/i386/avx512vpopcntdqintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512vpopcntdqintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512vpopcntdqintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avx512vpopcntdqvlintrin.h gcc-10.1.0/gcc/config/i386/avx512vpopcntdqvlintrin.h
*** gcc-9.3.0/gcc/config/i386/avx512vpopcntdqvlintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avx512vpopcntdqvlintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avxintrin.h gcc-10.1.0/gcc/config/i386/avxintrin.h
*** gcc-9.3.0/gcc/config/i386/avxintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avxintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2008-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2008-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** _mm256_castsi128_si256 (__m128i __A)
*** 1485,1490 ****
--- 1485,1510 ----
    return (__m256i) __builtin_ia32_si256_si ((__v4si)__A);
  }
  
+ /* Similarly, but with zero extension instead of undefined values.  */
+ 
+ extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_zextpd128_pd256 (__m128d __A)
+ {
+   return _mm256_insertf128_pd (_mm256_setzero_pd (), __A, 0);
+ }
+ 
+ extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_zextps128_ps256 (__m128 __A)
+ {
+   return _mm256_insertf128_ps (_mm256_setzero_ps (), __A, 0);
+ }
+ 
+ extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_zextsi128_si256 (__m128i __A)
+ {
+   return _mm256_insertf128_si256 (_mm256_setzero_si256 (), __A, 0);
+ }
+ 
  extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  _mm256_set_m128 ( __m128 __H, __m128 __L)
  {
*************** _mm256_setr_m128i (__m128i __L, __m128i
*** 1521,1526 ****
--- 1541,1588 ----
    return _mm256_set_m128i (__H, __L);
  }
  
+ extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_loadu2_m128 (float const *__PH, float const *__PL)
+ {
+   return _mm256_insertf128_ps (_mm256_castps128_ps256 (_mm_loadu_ps (__PL)),
+ 			       _mm_loadu_ps (__PH), 1);
+ }
+ 
+ extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_storeu2_m128 (float *__PH, float *__PL, __m256 __A)
+ {
+   _mm_storeu_ps (__PL, _mm256_castps256_ps128 (__A));
+   _mm_storeu_ps (__PH, _mm256_extractf128_ps (__A, 1));
+ }
+ 
+ extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_loadu2_m128d (double const *__PH, double const *__PL)
+ {
+   return _mm256_insertf128_pd (_mm256_castpd128_pd256 (_mm_loadu_pd (__PL)),
+ 			       _mm_loadu_pd (__PH), 1);
+ }
+ 
+ extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_storeu2_m128d (double *__PH, double *__PL, __m256d __A)
+ {
+   _mm_storeu_pd (__PL, _mm256_castpd256_pd128 (__A));
+   _mm_storeu_pd (__PH, _mm256_extractf128_pd (__A, 1));
+ }
+ 
+ extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_loadu2_m128i (__m128i_u const *__PH, __m128i_u const *__PL)
+ {
+   return _mm256_insertf128_si256 (_mm256_castsi128_si256 (_mm_loadu_si128 (__PL)),
+ 				  _mm_loadu_si128 (__PH), 1);
+ }
+ 
+ extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _mm256_storeu2_m128i (__m128i_u *__PH, __m128i_u *__PL, __m256i __A)
+ {
+   _mm_storeu_si128 (__PL, _mm256_castsi256_si128 (__A));
+   _mm_storeu_si128 (__PH, _mm256_extractf128_si256 (__A, 1));
+ }
+ 
  #ifdef __DISABLE_AVX__
  #undef __DISABLE_AVX__
  #pragma GCC pop_options
diff -Nrcpad gcc-9.3.0/gcc/config/i386/avxmath.h gcc-10.1.0/gcc/config/i386/avxmath.h
*** gcc-9.3.0/gcc/config/i386/avxmath.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/avxmath.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2010-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2010-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/bdver1.md gcc-10.1.0/gcc/config/i386/bdver1.md
*** gcc-9.3.0/gcc/config/i386/bdver1.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/bdver1.md	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! ;; Copyright (C) 2010-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,4 ----
! ;; Copyright (C) 2010-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/bdver3.md gcc-10.1.0/gcc/config/i386/bdver3.md
*** gcc-9.3.0/gcc/config/i386/bdver3.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/bdver3.md	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! ;; Copyright (C) 2012-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,4 ----
! ;; Copyright (C) 2012-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/biarch64.h gcc-10.1.0/gcc/config/i386/biarch64.h
*** gcc-9.3.0/gcc/config/i386/biarch64.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/biarch64.h	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Make configure files to produce biarch compiler defaulting to 64bit mode.
     This file must be included very first, while the OS specific file later
     to overwrite otherwise wrong defaults. 
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
     Contributed by Bo Thorsen <bo@suse.de>.
  
  This file is part of GCC.
--- 1,7 ----
  /* Make configure files to produce biarch compiler defaulting to 64bit mode.
     This file must be included very first, while the OS specific file later
     to overwrite otherwise wrong defaults. 
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
     Contributed by Bo Thorsen <bo@suse.de>.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/biarchx32.h gcc-10.1.0/gcc/config/i386/biarchx32.h
*** gcc-9.3.0/gcc/config/i386/biarchx32.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/biarchx32.h	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Make configure files to produce biarch compiler defaulting to x32 mode.
     This file must be included very first, while the OS specific file later
     to overwrite otherwise wrong defaults.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,7 ----
  /* Make configure files to produce biarch compiler defaulting to x32 mode.
     This file must be included very first, while the OS specific file later
     to overwrite otherwise wrong defaults.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/bmi2intrin.h gcc-10.1.0/gcc/config/i386/bmi2intrin.h
*** gcc-9.3.0/gcc/config/i386/bmi2intrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/bmi2intrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/bmiintrin.h gcc-10.1.0/gcc/config/i386/bmiintrin.h
*** gcc-9.3.0/gcc/config/i386/bmiintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/bmiintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2010-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2010-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/bmmintrin.h gcc-10.1.0/gcc/config/i386/bmmintrin.h
*** gcc-9.3.0/gcc/config/i386/bmmintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/bmmintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2007-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2007-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/bsd.h gcc-10.1.0/gcc/config/i386/bsd.h
*** gcc-9.3.0/gcc/config/i386/bsd.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/bsd.h	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Definitions for BSD assembler syntax for Intel 386
     (actually AT&T syntax for insns and operands,
     adapted to BSD conventions for symbol names and debugging.)
!    Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,7 ----
  /* Definitions for BSD assembler syntax for Intel 386
     (actually AT&T syntax for insns and operands,
     adapted to BSD conventions for symbol names and debugging.)
!    Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/btver2.md gcc-10.1.0/gcc/config/i386/btver2.md
*** gcc-9.3.0/gcc/config/i386/btver2.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/btver2.md	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! ;; Copyright (C) 2012-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,4 ----
! ;; Copyright (C) 2012-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/cet.c gcc-10.1.0/gcc/config/i386/cet.c
*** gcc-9.3.0/gcc/config/i386/cet.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/cet.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Functions for CET/x86.
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Functions for CET/x86.
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/cet.h gcc-10.1.0/gcc/config/i386/cet.h
*** gcc-9.3.0/gcc/config/i386/cet.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/cet.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* ELF program property for Intel CET.
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
--- 1,5 ----
  /* ELF program property for Intel CET.
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
     This file is free software; you can redistribute it and/or modify it
     under the terms of the GNU General Public License as published by the
diff -Nrcpad gcc-9.3.0/gcc/config/i386/cetintrin.h gcc-10.1.0/gcc/config/i386/cetintrin.h
*** gcc-9.3.0/gcc/config/i386/cetintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/cetintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2015-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2015-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/cldemoteintrin.h gcc-10.1.0/gcc/config/i386/cldemoteintrin.h
*** gcc-9.3.0/gcc/config/i386/cldemoteintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/cldemoteintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2018-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2018-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/clflushoptintrin.h gcc-10.1.0/gcc/config/i386/clflushoptintrin.h
*** gcc-9.3.0/gcc/config/i386/clflushoptintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/clflushoptintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/clwbintrin.h gcc-10.1.0/gcc/config/i386/clwbintrin.h
*** gcc-9.3.0/gcc/config/i386/clwbintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/clwbintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/clzerointrin.h gcc-10.1.0/gcc/config/i386/clzerointrin.h
*** gcc-9.3.0/gcc/config/i386/clzerointrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/clzerointrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/constraints.md gcc-10.1.0/gcc/config/i386/constraints.md
*** gcc-9.3.0/gcc/config/i386/constraints.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/constraints.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Constraint definitions for IA-32 and x86-64.
! ;; Copyright (C) 2006-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Constraint definitions for IA-32 and x86-64.
! ;; Copyright (C) 2006-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 109,115 ****
  ;;	and all SSE regs otherwise
  ;;  v	any EVEX encodable SSE register for AVX512VL target,
  ;;	otherwise any SSE register
! ;;  h	EVEX encodable SSE register with number factor of four
  
  (define_register_constraint "Yz" "TARGET_SSE ? SSE_FIRST_REG : NO_REGS"
   "First SSE register (@code{%xmm0}).")
--- 109,116 ----
  ;;	and all SSE regs otherwise
  ;;  v	any EVEX encodable SSE register for AVX512VL target,
  ;;	otherwise any SSE register
! ;;  w	any EVEX encodable SSE register for AVX512BW with TARGET_AVX512VL
! ;;	target.
  
  (define_register_constraint "Yz" "TARGET_SSE ? SSE_FIRST_REG : NO_REGS"
   "First SSE register (@code{%xmm0}).")
***************
*** 146,151 ****
--- 147,156 ----
   "TARGET_AVX512VL ? ALL_SSE_REGS : TARGET_SSE ? SSE_REGS : NO_REGS"
   "@internal For AVX512VL, any EVEX encodable SSE register (@code{%xmm0-%xmm31}), otherwise any SSE register.")
  
+ (define_register_constraint "Yw"
+  "TARGET_AVX512BW && TARGET_AVX512VL ? ALL_SSE_REGS : NO_REGS"
+  "@internal Any EVEX encodable SSE register (@code{%xmm0-%xmm31}) for AVX512BW with TARGET_AVX512VL target.")
+ 
  ;; We use the B prefix to denote any number of internal operands:
  ;;  f  FLAGS_REG
  ;;  g  GOT memory operand.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/core2.md gcc-10.1.0/gcc/config/i386/core2.md
*** gcc-9.3.0/gcc/config/i386/core2.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/core2.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Scheduling for Core 2 and derived processors.
! ;; Copyright (C) 2004-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Scheduling for Core 2 and derived processors.
! ;; Copyright (C) 2004-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/cpuid.h gcc-10.1.0/gcc/config/i386/cpuid.h
*** gcc-9.3.0/gcc/config/i386/cpuid.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/cpuid.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /*
!  * Copyright (C) 2007-2019 Free Software Foundation, Inc.
   *
   * This file is free software; you can redistribute it and/or modify it
   * under the terms of the GNU General Public License as published by the
--- 1,5 ----
  /*
!  * Copyright (C) 2007-2020 Free Software Foundation, Inc.
   *
   * This file is free software; you can redistribute it and/or modify it
   * under the terms of the GNU General Public License as published by the
***************
*** 21,26 ****
--- 21,29 ----
   * <http://www.gnu.org/licenses/>.
   */
  
+ /* %eax */
+ #define bit_AVX512BF16	(1 << 5)
+ 
  /* %ecx */
  #define bit_SSE3	(1 << 0)
  #define bit_PCLMUL	(1 << 1)
***************
*** 110,120 ****
--- 113,125 ----
  #define bit_RDPID	(1 << 22)
  #define bit_MOVDIRI	(1 << 27)
  #define bit_MOVDIR64B	(1 << 28)
+ #define bit_ENQCMD	(1 << 29)
  #define bit_CLDEMOTE	(1 << 25)
  
  /* %edx */
  #define bit_AVX5124VNNIW (1 << 2)
  #define bit_AVX5124FMAPS (1 << 3)
+ #define bit_AVX512VP2INTERSECT	(1 << 8)
  #define bit_IBT	(1 << 20)
  #define bit_PCONFIG	(1 << 18)
  /* XFEATURE_ENABLED_MASK register bits (%eax == 13, %ecx == 0) */
diff -Nrcpad gcc-9.3.0/gcc/config/i386/cross-stdarg.h gcc-10.1.0/gcc/config/i386/cross-stdarg.h
*** gcc-9.3.0/gcc/config/i386/cross-stdarg.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/cross-stdarg.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2002-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2002-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/crtdll.h gcc-10.1.0/gcc/config/i386/crtdll.h
*** gcc-9.3.0/gcc/config/i386/crtdll.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/crtdll.h	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Operating system specific defines to be used when targeting GCC for
     hosting on Windows32, using GNU tools and the Windows32 API Library.
     This variant uses CRTDLL.DLL instead of MSVCRTDLL.DLL.
!    Copyright (C) 1998-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,7 ----
  /* Operating system specific defines to be used when targeting GCC for
     hosting on Windows32, using GNU tools and the Windows32 API Library.
     This variant uses CRTDLL.DLL instead of MSVCRTDLL.DLL.
!    Copyright (C) 1998-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/cygming.h gcc-10.1.0/gcc/config/i386/cygming.h
*** gcc-9.3.0/gcc/config/i386/cygming.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/cygming.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Operating system specific defines to be used when targeting GCC for
     hosting on Windows32, using a Unix style C library and tools.
!    Copyright (C) 1995-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,6 ----
  /* Operating system specific defines to be used when targeting GCC for
     hosting on Windows32, using a Unix style C library and tools.
!    Copyright (C) 1995-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** do {						\
*** 385,398 ****
  	const0_rtx));							\
      }
  
- /* Java Native Interface (JNI) methods on Win32 are invoked using the
-    stdcall calling convention.  */
- #undef MODIFY_JNI_METHOD_CALL
- #define MODIFY_JNI_METHOD_CALL(MDECL)					      \
-   build_type_attribute_variant ((MDECL),				      \
- 			       build_tree_list (get_identifier ("stdcall"),   \
- 						NULL))
- 
  /* For Win32 ABI compatibility */
  #undef DEFAULT_PCC_STRUCT_RETURN
  #define DEFAULT_PCC_STRUCT_RETURN 0
--- 385,390 ----
diff -Nrcpad gcc-9.3.0/gcc/config/i386/cygming.opt gcc-10.1.0/gcc/config/i386/cygming.opt
*** gcc-9.3.0/gcc/config/i386/cygming.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/cygming.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Cygwin- and MinGW-specific options.
  
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Cygwin- and MinGW-specific options.
  
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/cygwin-stdint.h gcc-10.1.0/gcc/config/i386/cygwin-stdint.h
*** gcc-9.3.0/gcc/config/i386/cygwin-stdint.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/cygwin-stdint.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for <stdint.h> types on systems using Cygwin.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for <stdint.h> types on systems using Cygwin.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/cygwin-w64.h gcc-10.1.0/gcc/config/i386/cygwin-w64.h
*** gcc-9.3.0/gcc/config/i386/cygwin-w64.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/cygwin-w64.h	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Operating system specific defines to be used when targeting GCC for
     hosting on Windows 32/64 via Cygwin runtime, using GNU tools and
     the Windows API Library.
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,7 ----
  /* Operating system specific defines to be used when targeting GCC for
     hosting on Windows 32/64 via Cygwin runtime, using GNU tools and
     the Windows API Library.
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/cygwin.h gcc-10.1.0/gcc/config/i386/cygwin.h
*** gcc-9.3.0/gcc/config/i386/cygwin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/cygwin.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Operating system specific defines to be used when targeting GCC for
     hosting on Windows32, using a Unix style C library and tools.
!    Copyright (C) 1995-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,6 ----
  /* Operating system specific defines to be used when targeting GCC for
     hosting on Windows32, using a Unix style C library and tools.
!    Copyright (C) 1995-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/cygwin.opt gcc-10.1.0/gcc/config/i386/cygwin.opt
*** gcc-9.3.0/gcc/config/i386/cygwin.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/cygwin.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Cygwin-specific options.
  
! ; Copyright (C) 2013-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Cygwin-specific options.
  
! ; Copyright (C) 2013-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/darwin.h gcc-10.1.0/gcc/config/i386/darwin.h
*** gcc-9.3.0/gcc/config/i386/darwin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/darwin.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target definitions for x86 running Darwin.
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
     Contributed by Apple Computer Inc.
  
  This file is part of GCC.
--- 1,5 ----
  /* Target definitions for x86 running Darwin.
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
     Contributed by Apple Computer Inc.
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 239,245 ****
  #undef TARGET_ASM_OUTPUT_IDENT
  #define TARGET_ASM_OUTPUT_IDENT default_asm_output_ident_directive
  
! /* Darwin profiling -- call mcount.  */
  #undef FUNCTION_PROFILER
  #define FUNCTION_PROFILER(FILE, LABELNO)				\
    do {									\
--- 239,256 ----
  #undef TARGET_ASM_OUTPUT_IDENT
  #define TARGET_ASM_OUTPUT_IDENT default_asm_output_ident_directive
  
! /* We always want jump tables in the text section:
!    * for PIC code, we need the subtracted symbol to be defined at
!      assembly-time.
!    * for mdynamic-no-pic, we cannot support jump tables in the .const
!      section for weak functions, this looks to ld64 like direct access
!      to the weak symbol from an anonymous atom.  */
! 
! #undef JUMP_TABLES_IN_TEXT_SECTION
! #define JUMP_TABLES_IN_TEXT_SECTION 1
! 
! /* Darwin profiling -- call mcount.
!    If we need a stub, then we unconditionally mark it as used.  */
  #undef FUNCTION_PROFILER
  #define FUNCTION_PROFILER(FILE, LABELNO)				\
    do {									\
*************** along with GCC; see the file COPYING3.
*** 248,254 ****
        {									\
  	const char *name = machopic_mcount_stub_name ();		\
  	fprintf (FILE, "\tcall %s\n", name+1);  /*  skip '&'  */	\
- 	machopic_validate_stub_or_non_lazy_ptr (name);			\
        }									\
      else fprintf (FILE, "\tcall mcount\n");				\
    } while (0)
--- 259,264 ----
diff -Nrcpad gcc-9.3.0/gcc/config/i386/darwin32-biarch.h gcc-10.1.0/gcc/config/i386/darwin32-biarch.h
*** gcc-9.3.0/gcc/config/i386/darwin32-biarch.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/darwin32-biarch.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Target definitions for i386 running Darwin with a 32b host and supporting
     a 64b multilib.
!    Copyright (C) 2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,6 ----
  /* Target definitions for i386 running Darwin with a 32b host and supporting
     a 64b multilib.
!    Copyright (C) 2019-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/darwin64-biarch.h gcc-10.1.0/gcc/config/i386/darwin64-biarch.h
*** gcc-9.3.0/gcc/config/i386/darwin64-biarch.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/darwin64-biarch.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Target definitions for x86_64 running Darwin with a 64b host supporting a
     32b multilib.
!    Copyright (C) 2006-2019 Free Software Foundation, Inc.
     Contributed by Apple Computer Inc.
  
  This file is part of GCC.
--- 1,6 ----
  /* Target definitions for x86_64 running Darwin with a 64b host supporting a
     32b multilib.
!    Copyright (C) 2006-2020 Free Software Foundation, Inc.
     Contributed by Apple Computer Inc.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/djgpp-stdint.h gcc-10.1.0/gcc/config/i386/djgpp-stdint.h
*** gcc-9.3.0/gcc/config/i386/djgpp-stdint.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/djgpp-stdint.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for <stdint.h> types on systems using DJGPP.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for <stdint.h> types on systems using DJGPP.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/djgpp.c gcc-10.1.0/gcc/config/i386/djgpp.c
*** gcc-9.3.0/gcc/config/i386/djgpp.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/djgpp.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines for DJGPP.
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Subroutines for DJGPP.
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/djgpp.h gcc-10.1.0/gcc/config/i386/djgpp.h
*** gcc-9.3.0/gcc/config/i386/djgpp.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/djgpp.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Configuration for an i386 running MS-DOS with DJGPP.
!    Copyright (C) 1997-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Configuration for an i386 running MS-DOS with DJGPP.
!    Copyright (C) 1997-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/djgpp.opt gcc-10.1.0/gcc/config/i386/djgpp.opt
*** gcc-9.3.0/gcc/config/i386/djgpp.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/djgpp.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; DJGPP-specific options.
  
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; DJGPP-specific options.
  
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/dragonfly.h gcc-10.1.0/gcc/config/i386/dragonfly.h
*** gcc-9.3.0/gcc/config/i386/dragonfly.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/dragonfly.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for Intel 386 running DragonFly with ELF format
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
     Contributed by John Marino <gnugcc@marino.st>
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for Intel 386 running DragonFly with ELF format
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
     Contributed by John Marino <gnugcc@marino.st>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/driver-i386.c gcc-10.1.0/gcc/config/i386/driver-i386.c
*** gcc-9.3.0/gcc/config/i386/driver-i386.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/driver-i386.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines for the gcc driver.
!    Copyright (C) 2006-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Subroutines for the gcc driver.
!    Copyright (C) 2006-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** const char *host_detect_local_cpu (int a
*** 423,431 ****
--- 423,434 ----
    unsigned int has_shstk = 0;
    unsigned int has_avx512vnni = 0, has_vaes = 0;
    unsigned int has_vpclmulqdq = 0;
+   unsigned int has_avx512vp2intersect = 0;
    unsigned int has_movdiri = 0, has_movdir64b = 0;
+   unsigned int has_enqcmd = 0;
    unsigned int has_waitpkg = 0;
    unsigned int has_cldemote = 0;
+   unsigned int has_avx512bf16 = 0;
  
    unsigned int has_ptwrite = 0;
  
*************** const char *host_detect_local_cpu (int a
*** 525,538 ****
--- 528,546 ----
        has_avx512bitalg = ecx & bit_AVX512BITALG;
        has_movdiri = ecx & bit_MOVDIRI;
        has_movdir64b = ecx & bit_MOVDIR64B;
+       has_enqcmd = ecx & bit_ENQCMD;
        has_cldemote = ecx & bit_CLDEMOTE;
  
        has_avx5124vnniw = edx & bit_AVX5124VNNIW;
        has_avx5124fmaps = edx & bit_AVX5124FMAPS;
+       has_avx512vp2intersect = edx & bit_AVX512VP2INTERSECT;
  
        has_shstk = ecx & bit_SHSTK;
        has_pconfig = edx & bit_PCONFIG;
        has_waitpkg = ecx & bit_WAITPKG;
+ 
+       __cpuid_count (7, 1, eax, ebx, ecx, edx);
+       has_avx512bf16 = eax & bit_AVX512BF16;
      }
  
    if (max_level >= 13)
*************** const char *host_detect_local_cpu (int a
*** 855,890 ****
  	  if (arch)
  	    {
  	      /* This is unknown family 0x6 CPU.  */
! 	      /* Assume Ice Lake Server.  */
! 	      if (has_wbnoinvd)
! 		cpu = "icelake-server";
! 	      /* Assume Ice Lake.  */
! 	      else if (has_gfni)
! 		cpu = "icelake-client";
! 	      /* Assume Cannon Lake.  */
! 	      else if (has_avx512vbmi)
! 		cpu = "cannonlake";
! 	      /* Assume Knights Mill.  */
! 	      else if (has_avx5124vnniw)
! 		cpu = "knm";
! 	      /* Assume Knights Landing.  */
! 	      else if (has_avx512er)
! 		cpu = "knl";
! 	      /* Assume Skylake with AVX-512.  */
! 	      else if (has_avx512f)
! 		cpu = "skylake-avx512";
! 	      /* Assume Skylake.  */
! 	      else if (has_clflushopt)
! 		cpu = "skylake";
! 	      /* Assume Broadwell.  */
! 	      else if (has_adx)
! 		cpu = "broadwell";
! 	      else if (has_avx2)
  		/* Assume Haswell.  */
! 		cpu = "haswell";
! 	      else if (has_avx)
  		/* Assume Sandy Bridge.  */
! 		cpu = "sandybridge";
  	      else if (has_sse4_2)
  		{
  		  if (has_gfni)
--- 863,907 ----
  	  if (arch)
  	    {
  	      /* This is unknown family 0x6 CPU.  */
! 	      if (has_avx)
! 	      {
! 		/* Assume Tiger Lake */
! 		if (has_avx512vp2intersect)
! 		  cpu = "tigerlake";
! 		/* Assume Cooper Lake */
! 		else if (has_avx512bf16)
! 		  cpu = "cooperlake";
! 		/* Assume Ice Lake Server.  */
! 		else if (has_wbnoinvd)
! 		  cpu = "icelake-server";
! 		/* Assume Ice Lake.  */
! 		else if (has_avx512bitalg)
! 		  cpu = "icelake-client";
! 		/* Assume Cannon Lake.  */
! 		else if (has_avx512vbmi)
! 		  cpu = "cannonlake";
! 		/* Assume Knights Mill.  */
! 		else if (has_avx5124vnniw)
! 		  cpu = "knm";
! 		/* Assume Knights Landing.  */
! 		else if (has_avx512er)
! 		  cpu = "knl";
! 		/* Assume Skylake with AVX-512.  */
! 		else if (has_avx512f)
! 		  cpu = "skylake-avx512";
! 		/* Assume Skylake.  */
! 		else if (has_clflushopt)
! 		  cpu = "skylake";
! 		/* Assume Broadwell.  */
! 		else if (has_adx)
! 		  cpu = "broadwell";
! 		else if (has_avx2)
  		/* Assume Haswell.  */
! 		  cpu = "haswell";
! 		else
  		/* Assume Sandy Bridge.  */
! 		  cpu = "sandybridge";	      
! 	      }
  	      else if (has_sse4_2)
  		{
  		  if (has_gfni)
*************** const char *host_detect_local_cpu (int a
*** 1137,1148 ****
--- 1154,1168 ----
        const char *shstk = has_shstk ? " -mshstk" : " -mno-shstk";
        const char *vaes = has_vaes ? " -mvaes" : " -mno-vaes";
        const char *vpclmulqdq = has_vpclmulqdq ? " -mvpclmulqdq" : " -mno-vpclmulqdq";
+       const char *avx512vp2intersect = has_avx512vp2intersect ? " -mavx512vp2intersect" : " -mno-avx512vp2intersect";
        const char *avx512bitalg = has_avx512bitalg ? " -mavx512bitalg" : " -mno-avx512bitalg";
        const char *movdiri = has_movdiri ? " -mmovdiri" : " -mno-movdiri";
        const char *movdir64b = has_movdir64b ? " -mmovdir64b" : " -mno-movdir64b";
+       const char *enqcmd = has_enqcmd ? " -menqcmd" : " -mno-enqcmd";
        const char *waitpkg = has_waitpkg ? " -mwaitpkg" : " -mno-waitpkg";
        const char *cldemote = has_cldemote ? " -mcldemote" : " -mno-cldemote";
        const char *ptwrite = has_ptwrite ? " -mptwrite" : " -mno-ptwrite";
+       const char *avx512bf16 = has_avx512bf16 ? " -mavx512bf16" : " -mno-avx512bf16";
  
        options = concat (options, mmx, mmx3dnow, sse, sse2, sse3, ssse3,
  			sse4a, cx16, sahf, movbe, aes, sha, pclmul,
*************** const char *host_detect_local_cpu (int a
*** 1157,1163 ****
  			clwb, mwaitx, clzero, pku, rdpid, gfni, shstk,
  			avx512vbmi2, avx512vnni, vaes, vpclmulqdq,
  			avx512bitalg, movdiri, movdir64b, waitpkg, cldemote,
! 			ptwrite,
  			NULL);
      }
  
--- 1177,1183 ----
  			clwb, mwaitx, clzero, pku, rdpid, gfni, shstk,
  			avx512vbmi2, avx512vnni, vaes, vpclmulqdq,
  			avx512bitalg, movdiri, movdir64b, waitpkg, cldemote,
! 			ptwrite, avx512bf16, enqcmd, avx512vp2intersect,
  			NULL);
      }
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/driver-mingw32.c gcc-10.1.0/gcc/config/i386/driver-mingw32.c
*** gcc-9.3.0/gcc/config/i386/driver-mingw32.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/driver-mingw32.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Host OS specific configuration for the gcc driver.
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Host OS specific configuration for the gcc driver.
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/emmintrin.h gcc-10.1.0/gcc/config/i386/emmintrin.h
*** gcc-9.3.0/gcc/config/i386/emmintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/emmintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2003-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2003-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/enqcmdintrin.h gcc-10.1.0/gcc/config/i386/enqcmdintrin.h
*** gcc-9.3.0/gcc/config/i386/enqcmdintrin.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/i386/enqcmdintrin.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,55 ----
+ /* Copyright (C) 2019-2020 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+ 
+    Under Section 7 of GPL version 3, you are granted additional
+    permissions described in the GCC Runtime Library Exception, version
+    3.1, as published by the Free Software Foundation.
+ 
+    You should have received a copy of the GNU General Public License and
+    a copy of the GCC Runtime Library Exception along with this program;
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #if !defined _IMMINTRIN_H_INCLUDED
+ # error "Never use <enqcmdntrin.h> directly; include <x86intrin.h> instead."
+ #endif
+ 
+ #ifndef _ENQCMDNTRIN_H_INCLUDED
+ #define _ENQCMDNTRIN_H_INCLUDED
+ 
+ #ifndef __ENQCMD__
+ #pragma GCC push_options
+ #pragma GCC target ("enqcmd")
+ #define __DISABLE_ENQCMD__
+ #endif /* __ENQCMD__ */
+ 
+ extern __inline int
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _enqcmd (void * __P, const void * __Q)
+ {
+   return __builtin_ia32_enqcmd (__P, __Q);
+ }
+ 
+ extern __inline int
+ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _enqcmds (void * __P, const void * __Q)
+ {
+   return __builtin_ia32_enqcmds (__P, __Q);
+ }
+ 
+ #ifdef __DISABLE_ENQCMD__
+ #undef __DISABLE_ENQCMD__
+ #pragma GCC pop_options
+ #endif /* __DISABLE_ENQCMD__ */
+ #endif /* _ENQCMDNTRIN_H_INCLUDED.  */
diff -Nrcpad gcc-9.3.0/gcc/config/i386/f16cintrin.h gcc-10.1.0/gcc/config/i386/f16cintrin.h
*** gcc-9.3.0/gcc/config/i386/f16cintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/f16cintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** _mm256_cvtps_ph (__m256 __A, const int _
*** 84,93 ****
      }))
  
  #define _mm_cvtps_ph(A, I) \
!   ((__m128i) __builtin_ia32_vcvtps2ph ((__v4sf)(__m128) A, (int) (I)))
  
  #define _mm256_cvtps_ph(A, I) \
!   ((__m128i) __builtin_ia32_vcvtps2ph256 ((__v8sf)(__m256) A, (int) (I)))
  #endif /* __OPTIMIZE */
  
  #ifdef __DISABLE_F16C__
--- 84,93 ----
      }))
  
  #define _mm_cvtps_ph(A, I) \
!   ((__m128i) __builtin_ia32_vcvtps2ph ((__v4sf)(__m128) (A), (int) (I)))
  
  #define _mm256_cvtps_ph(A, I) \
!   ((__m128i) __builtin_ia32_vcvtps2ph256 ((__v8sf)(__m256) (A), (int) (I)))
  #endif /* __OPTIMIZE */
  
  #ifdef __DISABLE_F16C__
diff -Nrcpad gcc-9.3.0/gcc/config/i386/fma4intrin.h gcc-10.1.0/gcc/config/i386/fma4intrin.h
*** gcc-9.3.0/gcc/config/i386/fma4intrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/fma4intrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2007-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2007-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/fmaintrin.h gcc-10.1.0/gcc/config/i386/fmaintrin.h
*** gcc-9.3.0/gcc/config/i386/fmaintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/fmaintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/freebsd.h gcc-10.1.0/gcc/config/i386/freebsd.h
*** gcc-9.3.0/gcc/config/i386/freebsd.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/freebsd.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for Intel 386 running FreeBSD with ELF format
!    Copyright (C) 1996-2019 Free Software Foundation, Inc.
     Contributed by Eric Youngdale.
     Modified for stabs-in-ELF by H.J. Lu.
     Adapted from GNU/Linux version by John Polstra.
--- 1,5 ----
  /* Definitions for Intel 386 running FreeBSD with ELF format
!    Copyright (C) 1996-2020 Free Software Foundation, Inc.
     Contributed by Eric Youngdale.
     Modified for stabs-in-ELF by H.J. Lu.
     Adapted from GNU/Linux version by John Polstra.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/freebsd64.h gcc-10.1.0/gcc/config/i386/freebsd64.h
*** gcc-9.3.0/gcc/config/i386/freebsd64.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/freebsd64.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for AMD x86-64 running FreeBSD with ELF format
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
     Contributed by David O'Brien <obrien@FreeBSD.org>
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for AMD x86-64 running FreeBSD with ELF format
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
     Contributed by David O'Brien <obrien@FreeBSD.org>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/fxsrintrin.h gcc-10.1.0/gcc/config/i386/fxsrintrin.h
*** gcc-9.3.0/gcc/config/i386/fxsrintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/fxsrintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/gas.h gcc-10.1.0/gcc/config/i386/gas.h
*** gcc-9.3.0/gcc/config/i386/gas.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/gas.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for Intel 386 using GAS.
!    Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for Intel 386 using GAS.
!    Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/geode.md gcc-10.1.0/gcc/config/i386/geode.md
*** gcc-9.3.0/gcc/config/i386/geode.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/geode.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Geode Scheduling
! ;; Copyright (C) 2006-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Geode Scheduling
! ;; Copyright (C) 2006-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/gfniintrin.h gcc-10.1.0/gcc/config/i386/gfniintrin.h
*** gcc-9.3.0/gcc/config/i386/gfniintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/gfniintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/glm.md gcc-10.1.0/gcc/config/i386/glm.md
*** gcc-9.3.0/gcc/config/i386/glm.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/glm.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Goldmont(GLM) Scheduling
! ;; Copyright (C) 2018-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Goldmont(GLM) Scheduling
! ;; Copyright (C) 2018-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/gmm_malloc.h gcc-10.1.0/gcc/config/i386/gmm_malloc.h
*** gcc-9.3.0/gcc/config/i386/gmm_malloc.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/gmm_malloc.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2004-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2004-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
***************
*** 25,31 ****
--- 25,33 ----
  #define _MM_MALLOC_H_INCLUDED
  
  #include <stdlib.h>
+ #if __STDC_HOSTED__
  #include <errno.h>
+ #endif
  
  static __inline__ void * 
  _mm_malloc (size_t __size, size_t __align)
*************** _mm_malloc (size_t __size, size_t __alig
*** 36,42 ****
--- 38,46 ----
    /* Error if align is not a power of two.  */
    if (__align & (__align - 1))
      {
+ #if __STDC_HOSTED__
        errno = EINVAL;
+ #endif
        return ((void *) 0);
      }
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/gnu-user-common.h gcc-10.1.0/gcc/config/i386/gnu-user-common.h
*** gcc-9.3.0/gcc/config/i386/gnu-user-common.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/gnu-user-common.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Common definitions for Intel 386 and AMD x86-64 systems using
!    GNU userspace.  Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by Ilya Enkovich.
  
  This file is part of GCC.
--- 1,5 ----
  /* Common definitions for Intel 386 and AMD x86-64 systems using
!    GNU userspace.  Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by Ilya Enkovich.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/gnu-user.h gcc-10.1.0/gcc/config/i386/gnu-user.h
*** gcc-9.3.0/gcc/config/i386/gnu-user.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/gnu-user.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for Intel 386 systems using GNU userspace.
!    Copyright (C) 1994-2019 Free Software Foundation, Inc.
     Contributed by Eric Youngdale.
     Modified for stabs-in-ELF by H.J. Lu.
  
--- 1,5 ----
  /* Definitions for Intel 386 systems using GNU userspace.
!    Copyright (C) 1994-2020 Free Software Foundation, Inc.
     Contributed by Eric Youngdale.
     Modified for stabs-in-ELF by H.J. Lu.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/gnu-user64.h gcc-10.1.0/gcc/config/i386/gnu-user64.h
*** gcc-9.3.0/gcc/config/i386/gnu-user64.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/gnu-user64.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for AMD x86-64 using GNU userspace.
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
     Contributed by Jan Hubicka <jh@suse.cz>, based on linux.h.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for AMD x86-64 using GNU userspace.
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
     Contributed by Jan Hubicka <jh@suse.cz>, based on linux.h.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/gnu.h gcc-10.1.0/gcc/config/i386/gnu.h
*** gcc-9.3.0/gcc/config/i386/gnu.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/gnu.h	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Configuration for an i386 running GNU with ELF as the target machine.  */
  
  /*
! Copyright (C) 1994-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,7 ----
  /* Configuration for an i386 running GNU with ELF as the target machine.  */
  
  /*
! Copyright (C) 1994-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/haswell.md gcc-10.1.0/gcc/config/i386/haswell.md
*** gcc-9.3.0/gcc/config/i386/haswell.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/haswell.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Scheduling for Haswell and derived processors.
! ;; Copyright (C) 2004-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Scheduling for Haswell and derived processors.
! ;; Copyright (C) 2004-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/host-cygwin.c gcc-10.1.0/gcc/config/i386/host-cygwin.c
*** gcc-9.3.0/gcc/config/i386/host-cygwin.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/host-cygwin.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Cygwin host-specific hook definitions.
!  Copyright (C) 2004-2019 Free Software Foundation, Inc.
  
   This file is part of GCC.
  
--- 1,5 ----
  /* Cygwin host-specific hook definitions.
!  Copyright (C) 2004-2020 Free Software Foundation, Inc.
  
   This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/host-i386-darwin.c gcc-10.1.0/gcc/config/i386/host-i386-darwin.c
*** gcc-9.3.0/gcc/config/i386/host-i386-darwin.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/host-i386-darwin.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* i386-darwin host-specific hook definitions.
!    Copyright (C) 2003-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* i386-darwin host-specific hook definitions.
!    Copyright (C) 2003-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/host-mingw32.c gcc-10.1.0/gcc/config/i386/host-mingw32.c
*** gcc-9.3.0/gcc/config/i386/host-mingw32.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/host-mingw32.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* mingw32 host-specific hook definitions.
!    Copyright (C) 2004-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* mingw32 host-specific hook definitions.
!    Copyright (C) 2004-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** mingw32_gt_pch_use_address (void *addr,
*** 157,166 ****
    /* Determine the version of Windows we are running on and use a
       uniquely-named local object if running > 4.  */
    GetVersionEx (&version_info);
    if (version_info.dwMajorVersion > 4)
      {
-       char local_object_name [sizeof (OBJECT_NAME_FMT)
- 			      + sizeof (DWORD) * 2];
        snprintf (local_object_name, sizeof (local_object_name),
  		OBJECT_NAME_FMT "%lx", GetCurrentProcessId());
        object_name = local_object_name;
--- 157,166 ----
    /* Determine the version of Windows we are running on and use a
       uniquely-named local object if running > 4.  */
    GetVersionEx (&version_info);
+ 
+   char local_object_name[sizeof (OBJECT_NAME_FMT) + sizeof (DWORD) * 2];
    if (version_info.dwMajorVersion > 4)
      {
        snprintf (local_object_name, sizeof (local_object_name),
  		OBJECT_NAME_FMT "%lx", GetCurrentProcessId());
        object_name = local_object_name;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-builtin-types.awk gcc-10.1.0/gcc/config/i386/i386-builtin-types.awk
*** gcc-9.3.0/gcc/config/i386/i386-builtin-types.awk	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386-builtin-types.awk	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! #  Copyright (C) 2009-2019 Free Software Foundation, Inc.
  #
  # This program is free software; you can redistribute it and/or modify it
  # under the terms of the GNU General Public License as published by the
--- 1,4 ----
! #  Copyright (C) 2009-2020 Free Software Foundation, Inc.
  #
  # This program is free software; you can redistribute it and/or modify it
  # under the terms of the GNU General Public License as published by the
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-builtin-types.def gcc-10.1.0/gcc/config/i386/i386-builtin-types.def
*** gcc-9.3.0/gcc/config/i386/i386-builtin-types.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386-builtin-types.def	Thu May  7 10:49:59 2020
*************** DEF_FUNCTION_TYPE (VOID, PFLOAT, V16SF)
*** 533,538 ****
--- 533,539 ----
  DEF_FUNCTION_TYPE (VOID, PINT, INT)
  DEF_FUNCTION_TYPE (VOID, PUNSIGNED, UNSIGNED)
  DEF_FUNCTION_TYPE (VOID, PVOID, PCVOID)
+ DEF_FUNCTION_TYPE (INT, PVOID, PCVOID)
  DEF_FUNCTION_TYPE (VOID, PLONGLONG, LONGLONG)
  DEF_FUNCTION_TYPE (VOID, PULONGLONG, ULONGLONG)
  DEF_FUNCTION_TYPE (VOID, PV2SI, V2SI)
*************** DEF_FUNCTION_TYPE (V4DI, V4DI, V2DI, V4D
*** 963,973 ****
  DEF_FUNCTION_TYPE (QI, V8DF, INT)
  DEF_FUNCTION_TYPE (QI, V4DF, INT)
  DEF_FUNCTION_TYPE (QI, V4DF, V4DF, INT, UQI)
- DEF_FUNCTION_TYPE (QI, V2DF, INT)
  DEF_FUNCTION_TYPE (HI, V16SF, INT)
  DEF_FUNCTION_TYPE (QI, V8SF, INT)
  DEF_FUNCTION_TYPE (QI, V8SF, V8SF, INT, UQI)
- DEF_FUNCTION_TYPE (QI, V4SF, INT)
  DEF_FUNCTION_TYPE (QI, V8DF, INT, UQI)
  DEF_FUNCTION_TYPE (QI, V4DF, INT, UQI)
  DEF_FUNCTION_TYPE (QI, V2DF, INT, UQI)
--- 964,972 ----
*************** DEF_FUNCTION_TYPE (QI, V8SF, INT, UQI)
*** 976,981 ****
--- 975,987 ----
  DEF_FUNCTION_TYPE (QI, V4SF, INT, UQI)
  DEF_FUNCTION_TYPE (VOID, PV32QI, V32HI, USI)
  
+ DEF_FUNCTION_TYPE (VOID, PUHI, PUHI, V16SI, V16SI)
+ DEF_FUNCTION_TYPE (VOID, PUQI, PUQI, V8SI, V8SI)
+ DEF_FUNCTION_TYPE (VOID, PUQI, PUQI, V4SI, V4SI)
+ DEF_FUNCTION_TYPE (VOID, PUQI, PUQI, V8DI, V8DI)
+ DEF_FUNCTION_TYPE (VOID, PUQI, PUQI, V4DI, V4DI)
+ DEF_FUNCTION_TYPE (VOID, PUQI, PUQI, V2DI, V2DI)
+ 
  DEF_FUNCTION_TYPE (V2DI, V2DI, V2DI, UINT, UINT)
  DEF_FUNCTION_TYPE (V4HI, HI, HI, HI, HI)
  
*************** DEF_FUNCTION_TYPE (V8HI, V8HI, V8HI, INT
*** 1246,1264 ****
  DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, INT, V4SI, INT)
  DEF_FUNCTION_TYPE (V2DI, V2DI, V2DI, INT, V2DI, INT)
  DEF_FUNCTION_TYPE (V32HI, V32HI, V32HI, V32HI)
- DEF_FUNCTION_TYPE (V32HI, V32HI, V32HI, V32HI, INT)
- DEF_FUNCTION_TYPE (V16HI, V16HI, V16HI, V16HI, INT)
- DEF_FUNCTION_TYPE (V8HI, V8HI, V8HI, V8HI, INT)
- DEF_FUNCTION_TYPE (V8SI, V8SI, V8SI, V8SI, INT)
- DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT)
  DEF_FUNCTION_TYPE (V8DI, V8DI, V8DI, V8DI)
- DEF_FUNCTION_TYPE (V8DI, V8DI, V8DI, V8DI, INT)
- DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V4DI, INT)
  DEF_FUNCTION_TYPE (V16SI, V16SI, V16SI, V16SI)
- DEF_FUNCTION_TYPE (V16SI, V16SI, V16SI, V16SI, INT)
- DEF_FUNCTION_TYPE (V2DI, V2DI, V2DI, V2DI, INT)
  
  # BITALG builtins
  DEF_FUNCTION_TYPE (V4DI, V4DI)
  DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, UHI)
  DEF_FUNCTION_TYPE (V8SI, V8SI, V8SI, UHI)
--- 1252,1287 ----
  DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, INT, V4SI, INT)
  DEF_FUNCTION_TYPE (V2DI, V2DI, V2DI, INT, V2DI, INT)
  DEF_FUNCTION_TYPE (V32HI, V32HI, V32HI, V32HI)
  DEF_FUNCTION_TYPE (V8DI, V8DI, V8DI, V8DI)
  DEF_FUNCTION_TYPE (V16SI, V16SI, V16SI, V16SI)
  
  # BITALG builtins
  DEF_FUNCTION_TYPE (V4DI, V4DI)
  DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, UHI)
  DEF_FUNCTION_TYPE (V8SI, V8SI, V8SI, UHI)
+ 
+ # BF16 builtins
+ DEF_FUNCTION_TYPE (V32HI, V16SF, V16SF)
+ DEF_FUNCTION_TYPE (V32HI, V16SF, V16SF, V32HI, USI)
+ DEF_FUNCTION_TYPE (V32HI, V16SF, V16SF, USI)
+ DEF_FUNCTION_TYPE (V16HI, V8SF, V8SF)
+ DEF_FUNCTION_TYPE (V16HI, V8SF, V8SF, V16HI, UHI)
+ DEF_FUNCTION_TYPE (V16HI, V8SF, V8SF, UHI)
+ DEF_FUNCTION_TYPE (V8HI, V4SF, V4SF)
+ DEF_FUNCTION_TYPE (V8HI, V4SF, V4SF, V8HI, UQI)
+ DEF_FUNCTION_TYPE (V8HI, V4SF, V4SF, UQI)
+ DEF_FUNCTION_TYPE (V16HI, V16SF)
+ DEF_FUNCTION_TYPE (V16HI, V16SF, V16HI, UHI)
+ DEF_FUNCTION_TYPE (V16HI, V16SF, UHI)
+ DEF_FUNCTION_TYPE (V8HI, V8SF)
+ DEF_FUNCTION_TYPE (V8HI, V8SF, V8HI, UQI)
+ DEF_FUNCTION_TYPE (V8HI, V8SF, UQI)
+ DEF_FUNCTION_TYPE (V8HI, V4SF)
+ DEF_FUNCTION_TYPE (V8HI, V4SF, V8HI, UQI)
+ DEF_FUNCTION_TYPE (V8HI, V4SF, UQI)
+ DEF_FUNCTION_TYPE (V16SF, V16SF, V32HI, V32HI)
+ DEF_FUNCTION_TYPE (V16SF, V16SF, V32HI, V32HI, UHI)
+ DEF_FUNCTION_TYPE (V8SF, V8SF, V16HI, V16HI)
+ DEF_FUNCTION_TYPE (V8SF, V8SF, V16HI, V16HI, UQI)
+ DEF_FUNCTION_TYPE (V4SF, V4SF, V8HI, V8HI)
+ DEF_FUNCTION_TYPE (V4SF, V4SF, V8HI, V8HI, UQI)
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-builtin.def gcc-10.1.0/gcc/config/i386/i386-builtin.def
*** gcc-9.3.0/gcc/config/i386/i386-builtin.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386-builtin.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Builtin functions for ia32.
!    Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,5 ----
  /* Builtin functions for ia32.
!    Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE
*** 288,293 ****
--- 288,301 ----
  BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_avx512bw_storev32hi_mask, "__builtin_ia32_storedquhi512_mask", IX86_BUILTIN_STOREDQUHI512_MASK, UNKNOWN, (int) VOID_FTYPE_PSHORT_V32HI_USI)
  BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_avx512bw_storev64qi_mask, "__builtin_ia32_storedquqi512_mask", IX86_BUILTIN_STOREDQUQI512_MASK, UNKNOWN, (int) VOID_FTYPE_PCHAR_V64QI_UDI)
  
+ /* AVX512VP2INTERSECT */
+ BDESC (0, OPTION_MASK_ISA2_AVX512VP2INTERSECT, CODE_FOR_nothing, "__builtin_ia32_2intersectd512", IX86_BUILTIN_2INTERSECTD512, UNKNOWN, (int) VOID_FTYPE_PUHI_PUHI_V16SI_V16SI)
+ BDESC (0, OPTION_MASK_ISA2_AVX512VP2INTERSECT, CODE_FOR_nothing, "__builtin_ia32_2intersectq512", IX86_BUILTIN_2INTERSECTQ512, UNKNOWN, (int) VOID_FTYPE_PUQI_PUQI_V8DI_V8DI)
+ BDESC (0, OPTION_MASK_ISA2_AVX512VP2INTERSECT, CODE_FOR_nothing, "__builtin_ia32_2intersectd256", IX86_BUILTIN_2INTERSECTD256, UNKNOWN, (int) VOID_FTYPE_PUQI_PUQI_V8SI_V8SI)
+ BDESC (0, OPTION_MASK_ISA2_AVX512VP2INTERSECT, CODE_FOR_nothing, "__builtin_ia32_2intersectq256", IX86_BUILTIN_2INTERSECTQ256, UNKNOWN, (int) VOID_FTYPE_PUQI_PUQI_V4DI_V4DI)
+ BDESC (0, OPTION_MASK_ISA2_AVX512VP2INTERSECT, CODE_FOR_nothing, "__builtin_ia32_2intersectd128", IX86_BUILTIN_2INTERSECTD128, UNKNOWN, (int) VOID_FTYPE_PUQI_PUQI_V4SI_V4SI)
+ BDESC (0, OPTION_MASK_ISA2_AVX512VP2INTERSECT, CODE_FOR_nothing, "__builtin_ia32_2intersectq128", IX86_BUILTIN_2INTERSECTQ128, UNKNOWN, (int) VOID_FTYPE_PUQI_PUQI_V2DI_V2DI)
+ 
  /* AVX512VL */
  BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_loadv16hi_mask, "__builtin_ia32_loaddquhi256_mask", IX86_BUILTIN_LOADDQUHI256_MASK, UNKNOWN, (int) V16HI_FTYPE_PCSHORT_V16HI_UHI)
  BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_loadv8hi_mask, "__builtin_ia32_loaddquhi128_mask", IX86_BUILTIN_LOADDQUHI128_MASK, UNKNOWN, (int) V8HI_FTYPE_PCSHORT_V8HI_UQI)
*************** BDESC (OPTION_MASK_ISA_MOVDIRI, 0, CODE_
*** 427,438 ****
  BDESC (OPTION_MASK_ISA_MOVDIRI | OPTION_MASK_ISA_64BIT, 0, CODE_FOR_movdiridi, "__builtin_ia32_directstoreu_u64", IX86_BUILTIN_MOVDIRIDI64, UNKNOWN, (int) VOID_FTYPE_PULONGLONG_ULONGLONG)
  
  /* MASK2.  */
! BDESC (0, OPTION_MASK_ISA_WBNOINVD, CODE_FOR_wbnoinvd, "__builtin_ia32_wbnoinvd", IX86_BUILTIN_WBNOINVD, UNKNOWN, (int) VOID_FTYPE_VOID)
! BDESC (0, OPTION_MASK_ISA_MOVDIR64B, CODE_FOR_nothing, "__builtin_ia32_movdir64b", IX86_BUILTIN_MOVDIR64B, UNKNOWN, (int) VOID_FTYPE_PVOID_PCVOID)
  
  /* PTWRITE.  */
! BDESC (0, OPTION_MASK_ISA_PTWRITE, CODE_FOR_ptwritesi, "__builtin_ia32_ptwrite32", IX86_BUILTIN_PTWRITE32, UNKNOWN, (int) VOID_FTYPE_UNSIGNED)
! BDESC (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA_PTWRITE, CODE_FOR_ptwritedi, "__builtin_ia32_ptwrite64", IX86_BUILTIN_PTWRITE64, UNKNOWN, (int) VOID_FTYPE_UINT64)
  
  BDESC_END (SPECIAL_ARGS, ARGS)
  
--- 435,450 ----
  BDESC (OPTION_MASK_ISA_MOVDIRI | OPTION_MASK_ISA_64BIT, 0, CODE_FOR_movdiridi, "__builtin_ia32_directstoreu_u64", IX86_BUILTIN_MOVDIRIDI64, UNKNOWN, (int) VOID_FTYPE_PULONGLONG_ULONGLONG)
  
  /* MASK2.  */
! BDESC (0, OPTION_MASK_ISA2_WBNOINVD, CODE_FOR_wbnoinvd, "__builtin_ia32_wbnoinvd", IX86_BUILTIN_WBNOINVD, UNKNOWN, (int) VOID_FTYPE_VOID)
! BDESC (0, OPTION_MASK_ISA2_MOVDIR64B, CODE_FOR_nothing, "__builtin_ia32_movdir64b", IX86_BUILTIN_MOVDIR64B, UNKNOWN, (int) VOID_FTYPE_PVOID_PCVOID)
  
  /* PTWRITE.  */
! BDESC (0, OPTION_MASK_ISA2_PTWRITE, CODE_FOR_ptwritesi, "__builtin_ia32_ptwrite32", IX86_BUILTIN_PTWRITE32, UNKNOWN, (int) VOID_FTYPE_UNSIGNED)
! BDESC (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_PTWRITE, CODE_FOR_ptwritedi, "__builtin_ia32_ptwrite64", IX86_BUILTIN_PTWRITE64, UNKNOWN, (int) VOID_FTYPE_UINT64)
! 
! /* ENQCMD */
! BDESC (0, OPTION_MASK_ISA2_ENQCMD, CODE_FOR_nothing, "__builtin_ia32_enqcmd", IX86_BUILTIN_ENQCMD, UNKNOWN, (int) INT_FTYPE_PVOID_PCVOID)
! BDESC (0, OPTION_MASK_ISA2_ENQCMD, CODE_FOR_nothing, "__builtin_ia32_enqcmds", IX86_BUILTIN_ENQCMDS, UNKNOWN, (int) INT_FTYPE_PVOID_PCVOID)
  
  BDESC_END (SPECIAL_ARGS, ARGS)
  
*************** BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR
*** 799,805 ****
  
  BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR_sse2_vmsqrtv2df2, "__builtin_ia32_sqrtsd", IX86_BUILTIN_SQRTSD, UNKNOWN, (int) V2DF_FTYPE_V2DF_VEC_MERGE)
  
! BDESC (OPTION_MASK_ISA_SSE, 0, CODE_FOR_sse2_movq128, "__builtin_ia32_movq128", IX86_BUILTIN_MOVQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI)
  
  /* SSE2 MMX */
  BDESC (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_MMX, 0, CODE_FOR_mmx_addv1di3, "__builtin_ia32_paddq", IX86_BUILTIN_PADDQ, UNKNOWN, (int) V1DI_FTYPE_V1DI_V1DI)
--- 811,817 ----
  
  BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR_sse2_vmsqrtv2df2, "__builtin_ia32_sqrtsd", IX86_BUILTIN_SQRTSD, UNKNOWN, (int) V2DF_FTYPE_V2DF_VEC_MERGE)
  
! BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR_sse2_movq128, "__builtin_ia32_movq128", IX86_BUILTIN_MOVQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI)
  
  /* SSE2 MMX */
  BDESC (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_MMX, 0, CODE_FOR_mmx_addv1di3, "__builtin_ia32_paddq", IX86_BUILTIN_PADDQ, UNKNOWN, (int) V1DI_FTYPE_V1DI_V1DI)
*************** BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_F
*** 901,907 ****
  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundpd, "__builtin_ia32_floorpd", IX86_BUILTIN_FLOORPD, (enum rtx_code) ROUND_FLOOR, (int) V2DF_FTYPE_V2DF_ROUND)
  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundpd, "__builtin_ia32_ceilpd", IX86_BUILTIN_CEILPD, (enum rtx_code) ROUND_CEIL, (int) V2DF_FTYPE_V2DF_ROUND)
  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundpd, "__builtin_ia32_truncpd", IX86_BUILTIN_TRUNCPD, (enum rtx_code) ROUND_TRUNC, (int) V2DF_FTYPE_V2DF_ROUND)
- BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundpd, "__builtin_ia32_rintpd", IX86_BUILTIN_RINTPD, (enum rtx_code) ROUND_MXCSR, (int) V2DF_FTYPE_V2DF_ROUND)
  
  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundpd_vec_pack_sfix, "__builtin_ia32_floorpd_vec_pack_sfix", IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX, (enum rtx_code) ROUND_FLOOR, (int) V4SI_FTYPE_V2DF_V2DF_ROUND)
  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundpd_vec_pack_sfix, "__builtin_ia32_ceilpd_vec_pack_sfix", IX86_BUILTIN_CEILPD_VEC_PACK_SFIX, (enum rtx_code) ROUND_CEIL, (int) V4SI_FTYPE_V2DF_V2DF_ROUND)
--- 913,918 ----
*************** BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_F
*** 912,918 ****
  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundps, "__builtin_ia32_floorps", IX86_BUILTIN_FLOORPS, (enum rtx_code) ROUND_FLOOR, (int) V4SF_FTYPE_V4SF_ROUND)
  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundps, "__builtin_ia32_ceilps", IX86_BUILTIN_CEILPS, (enum rtx_code) ROUND_CEIL, (int) V4SF_FTYPE_V4SF_ROUND)
  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundps, "__builtin_ia32_truncps", IX86_BUILTIN_TRUNCPS, (enum rtx_code) ROUND_TRUNC, (int) V4SF_FTYPE_V4SF_ROUND)
- BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundps, "__builtin_ia32_rintps", IX86_BUILTIN_RINTPS, (enum rtx_code) ROUND_MXCSR, (int) V4SF_FTYPE_V4SF_ROUND)
  
  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundps_sfix, "__builtin_ia32_floorps_sfix", IX86_BUILTIN_FLOORPS_SFIX, (enum rtx_code) ROUND_FLOOR, (int) V4SI_FTYPE_V4SF_ROUND)
  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundps_sfix, "__builtin_ia32_ceilps_sfix", IX86_BUILTIN_CEILPS_SFIX, (enum rtx_code) ROUND_CEIL, (int) V4SI_FTYPE_V4SF_ROUND)
--- 923,928 ----
*************** BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_
*** 1035,1041 ****
  BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundpd256, "__builtin_ia32_floorpd256", IX86_BUILTIN_FLOORPD256, (enum rtx_code) ROUND_FLOOR, (int) V4DF_FTYPE_V4DF_ROUND)
  BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundpd256, "__builtin_ia32_ceilpd256", IX86_BUILTIN_CEILPD256, (enum rtx_code) ROUND_CEIL, (int) V4DF_FTYPE_V4DF_ROUND)
  BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundpd256, "__builtin_ia32_truncpd256", IX86_BUILTIN_TRUNCPD256, (enum rtx_code) ROUND_TRUNC, (int) V4DF_FTYPE_V4DF_ROUND)
- BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundpd256, "__builtin_ia32_rintpd256", IX86_BUILTIN_RINTPD256, (enum rtx_code) ROUND_MXCSR, (int) V4DF_FTYPE_V4DF_ROUND)
  
  BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_roundv4df2, "__builtin_ia32_roundpd_az256", IX86_BUILTIN_ROUNDPD_AZ256, UNKNOWN, (int) V4DF_FTYPE_V4DF)
  BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_roundv4df2_vec_pack_sfix, "__builtin_ia32_roundpd_az_vec_pack_sfix256", IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX256, UNKNOWN, (int) V8SI_FTYPE_V4DF_V4DF)
--- 1045,1050 ----
*************** BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_
*** 1046,1052 ****
  BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundps256, "__builtin_ia32_floorps256", IX86_BUILTIN_FLOORPS256, (enum rtx_code) ROUND_FLOOR, (int) V8SF_FTYPE_V8SF_ROUND)
  BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundps256, "__builtin_ia32_ceilps256", IX86_BUILTIN_CEILPS256, (enum rtx_code) ROUND_CEIL, (int) V8SF_FTYPE_V8SF_ROUND)
  BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundps256, "__builtin_ia32_truncps256", IX86_BUILTIN_TRUNCPS256, (enum rtx_code) ROUND_TRUNC, (int) V8SF_FTYPE_V8SF_ROUND)
- BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundps256, "__builtin_ia32_rintps256", IX86_BUILTIN_RINTPS256, (enum rtx_code) ROUND_MXCSR, (int) V8SF_FTYPE_V8SF_ROUND)
  
  BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundps_sfix256, "__builtin_ia32_floorps_sfix256", IX86_BUILTIN_FLOORPS_SFIX256, (enum rtx_code) ROUND_FLOOR, (int) V8SI_FTYPE_V8SF_ROUND)
  BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundps_sfix256, "__builtin_ia32_ceilps_sfix256", IX86_BUILTIN_CEILPS_SFIX256, (enum rtx_code) ROUND_CEIL, (int) V8SI_FTYPE_V8SF_ROUND)
--- 1055,1060 ----
*************** BDESC (OPTION_MASK_ISA_AVX512VL, 0, CODE
*** 2081,2090 ****
  BDESC (OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_rolv4si_mask, "__builtin_ia32_prold128_mask", IX86_BUILTIN_PROLD128, UNKNOWN, (int) V4SI_FTYPE_V4SI_INT_V4SI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512dq_fpclassv4df_mask, "__builtin_ia32_fpclasspd256_mask", IX86_BUILTIN_FPCLASSPD256, UNKNOWN, (int) QI_FTYPE_V4DF_INT_UQI)
  BDESC (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512dq_fpclassv2df_mask, "__builtin_ia32_fpclasspd128_mask", IX86_BUILTIN_FPCLASSPD128, UNKNOWN, (int) QI_FTYPE_V2DF_INT_UQI)
! BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_avx512dq_vmfpclassv2df, "__builtin_ia32_fpclasssd", IX86_BUILTIN_FPCLASSSD, UNKNOWN, (int) QI_FTYPE_V2DF_INT)
  BDESC (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512dq_fpclassv8sf_mask, "__builtin_ia32_fpclassps256_mask", IX86_BUILTIN_FPCLASSPS256, UNKNOWN, (int) QI_FTYPE_V8SF_INT_UQI)
  BDESC (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512dq_fpclassv4sf_mask, "__builtin_ia32_fpclassps128_mask", IX86_BUILTIN_FPCLASSPS128, UNKNOWN, (int) QI_FTYPE_V4SF_INT_UQI)
! BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_avx512dq_vmfpclassv4sf, "__builtin_ia32_fpclassss", IX86_BUILTIN_FPCLASSSS, UNKNOWN, (int) QI_FTYPE_V4SF_INT)
  BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_cvtb2maskv16qi, "__builtin_ia32_cvtb2mask128", IX86_BUILTIN_CVTB2MASK128, UNKNOWN, (int) UHI_FTYPE_V16QI)
  BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_cvtb2maskv32qi, "__builtin_ia32_cvtb2mask256", IX86_BUILTIN_CVTB2MASK256, UNKNOWN, (int) USI_FTYPE_V32QI)
  BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_cvtw2maskv8hi, "__builtin_ia32_cvtw2mask128", IX86_BUILTIN_CVTW2MASK128, UNKNOWN, (int) UQI_FTYPE_V8HI)
--- 2089,2098 ----
  BDESC (OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_rolv4si_mask, "__builtin_ia32_prold128_mask", IX86_BUILTIN_PROLD128, UNKNOWN, (int) V4SI_FTYPE_V4SI_INT_V4SI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512dq_fpclassv4df_mask, "__builtin_ia32_fpclasspd256_mask", IX86_BUILTIN_FPCLASSPD256, UNKNOWN, (int) QI_FTYPE_V4DF_INT_UQI)
  BDESC (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512dq_fpclassv2df_mask, "__builtin_ia32_fpclasspd128_mask", IX86_BUILTIN_FPCLASSPD128, UNKNOWN, (int) QI_FTYPE_V2DF_INT_UQI)
! BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_avx512dq_vmfpclassv2df_mask, "__builtin_ia32_fpclasssd_mask", IX86_BUILTIN_FPCLASSSD_MASK, UNKNOWN, (int) QI_FTYPE_V2DF_INT_UQI)
  BDESC (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512dq_fpclassv8sf_mask, "__builtin_ia32_fpclassps256_mask", IX86_BUILTIN_FPCLASSPS256, UNKNOWN, (int) QI_FTYPE_V8SF_INT_UQI)
  BDESC (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512dq_fpclassv4sf_mask, "__builtin_ia32_fpclassps128_mask", IX86_BUILTIN_FPCLASSPS128, UNKNOWN, (int) QI_FTYPE_V4SF_INT_UQI)
! BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_avx512dq_vmfpclassv4sf_mask, "__builtin_ia32_fpclassss_mask", IX86_BUILTIN_FPCLASSSS_MASK, UNKNOWN, (int) QI_FTYPE_V4SF_INT_UQI)
  BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_cvtb2maskv16qi, "__builtin_ia32_cvtb2mask128", IX86_BUILTIN_CVTB2MASK128, UNKNOWN, (int) UHI_FTYPE_V16QI)
  BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_cvtb2maskv32qi, "__builtin_ia32_cvtb2mask256", IX86_BUILTIN_CVTB2MASK256, UNKNOWN, (int) USI_FTYPE_V32QI)
  BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_cvtw2maskv8hi, "__builtin_ia32_cvtw2mask128", IX86_BUILTIN_CVTW2MASK128, UNKNOWN, (int) UQI_FTYPE_V8HI)
*************** BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPT
*** 2516,2575 ****
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v2di_mask, "__builtin_ia32_vpshld_v2di_mask", IX86_BUILTIN_VPSHLDV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
  
  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi, "__builtin_ia32_vpshrdv_v32hi", IX86_BUILTIN_VPSHRDVV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrdv_v32hi_mask, "__builtin_ia32_vpshrdv_v32hi_mask", IX86_BUILTIN_VPSHRDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrdv_v32hi_maskz, "__builtin_ia32_vpshrdv_v32hi_maskz", IX86_BUILTIN_VPSHRDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi, "__builtin_ia32_vpshrdv_v16hi", IX86_BUILTIN_VPSHRDVV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi_mask, "__builtin_ia32_vpshrdv_v16hi_mask", IX86_BUILTIN_VPSHRDVV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi_maskz, "__builtin_ia32_vpshrdv_v16hi_maskz", IX86_BUILTIN_VPSHRDVV16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v8hi, "__builtin_ia32_vpshrdv_v8hi", IX86_BUILTIN_VPSHRDVV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v8hi_mask, "__builtin_ia32_vpshrdv_v8hi_mask", IX86_BUILTIN_VPSHRDVV8HI_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v8hi_maskz, "__builtin_ia32_vpshrdv_v8hi_maskz", IX86_BUILTIN_VPSHRDVV8HI_MASKZ, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v16si, "__builtin_ia32_vpshrdv_v16si", IX86_BUILTIN_VPSHRDVV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v16si_mask, "__builtin_ia32_vpshrdv_v16si_mask", IX86_BUILTIN_VPSHRDVV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v16si_maskz, "__builtin_ia32_vpshrdv_v16si_maskz", IX86_BUILTIN_VPSHRDVV16SI_MASKZ, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v8si, "__builtin_ia32_vpshrdv_v8si", IX86_BUILTIN_VPSHRDVV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v8si_mask, "__builtin_ia32_vpshrdv_v8si_mask", IX86_BUILTIN_VPSHRDVV8SI_MASK, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v8si_maskz, "__builtin_ia32_vpshrdv_v8si_maskz", IX86_BUILTIN_VPSHRDVV8SI_MASKZ, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v4si, "__builtin_ia32_vpshrdv_v4si", IX86_BUILTIN_VPSHRDVV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v4si_mask, "__builtin_ia32_vpshrdv_v4si_mask", IX86_BUILTIN_VPSHRDVV4SI_MASK, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v4si_maskz, "__builtin_ia32_vpshrdv_v4si_maskz", IX86_BUILTIN_VPSHRDVV4SI_MASKZ, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v8di, "__builtin_ia32_vpshrdv_v8di", IX86_BUILTIN_VPSHRDVV8DI, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v8di_mask, "__builtin_ia32_vpshrdv_v8di_mask", IX86_BUILTIN_VPSHRDVV8DI_MASK, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v8di_maskz, "__builtin_ia32_vpshrdv_v8di_maskz", IX86_BUILTIN_VPSHRDVV8DI_MASKZ, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v4di, "__builtin_ia32_vpshrdv_v4di", IX86_BUILTIN_VPSHRDVV4DI, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v4di_mask, "__builtin_ia32_vpshrdv_v4di_mask", IX86_BUILTIN_VPSHRDVV4DI_MASK, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v4di_maskz, "__builtin_ia32_vpshrdv_v4di_maskz", IX86_BUILTIN_VPSHRDVV4DI_MASKZ, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v2di, "__builtin_ia32_vpshrdv_v2di", IX86_BUILTIN_VPSHRDVV2DI, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v2di_mask, "__builtin_ia32_vpshrdv_v2di_mask", IX86_BUILTIN_VPSHRDVV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v2di_maskz, "__builtin_ia32_vpshrdv_v2di_maskz", IX86_BUILTIN_VPSHRDVV2DI_MASKZ, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_INT)
  
  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi, "__builtin_ia32_vpshldv_v32hi", IX86_BUILTIN_VPSHLDVV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshldv_v32hi_mask, "__builtin_ia32_vpshldv_v32hi_mask", IX86_BUILTIN_VPSHLDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshldv_v32hi_maskz, "__builtin_ia32_vpshldv_v32hi_maskz", IX86_BUILTIN_VPSHLDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi, "__builtin_ia32_vpshldv_v16hi", IX86_BUILTIN_VPSHLDVV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi_mask, "__builtin_ia32_vpshldv_v16hi_mask", IX86_BUILTIN_VPSHLDVV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi_maskz, "__builtin_ia32_vpshldv_v16hi_maskz", IX86_BUILTIN_VPSHLDVV16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v8hi, "__builtin_ia32_vpshldv_v8hi", IX86_BUILTIN_VPSHLDVV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v8hi_mask, "__builtin_ia32_vpshldv_v8hi_mask", IX86_BUILTIN_VPSHLDVV8HI_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v8hi_maskz, "__builtin_ia32_vpshldv_v8hi_maskz", IX86_BUILTIN_VPSHLDVV8HI_MASKZ, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v16si, "__builtin_ia32_vpshldv_v16si", IX86_BUILTIN_VPSHLDVV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v16si_mask, "__builtin_ia32_vpshldv_v16si_mask", IX86_BUILTIN_VPSHLDVV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v16si_maskz, "__builtin_ia32_vpshldv_v16si_maskz", IX86_BUILTIN_VPSHLDVV16SI_MASKZ, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v8si, "__builtin_ia32_vpshldv_v8si", IX86_BUILTIN_VPSHLDVV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v8si_mask, "__builtin_ia32_vpshldv_v8si_mask", IX86_BUILTIN_VPSHLDVV8SI_MASK, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v8si_maskz, "__builtin_ia32_vpshldv_v8si_maskz", IX86_BUILTIN_VPSHLDVV8SI_MASKZ, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v4si, "__builtin_ia32_vpshldv_v4si", IX86_BUILTIN_VPSHLDVV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v4si_mask, "__builtin_ia32_vpshldv_v4si_mask", IX86_BUILTIN_VPSHLDVV4SI_MASK, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v4si_maskz, "__builtin_ia32_vpshldv_v4si_maskz", IX86_BUILTIN_VPSHLDVV4SI_MASKZ, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v8di, "__builtin_ia32_vpshldv_v8di", IX86_BUILTIN_VPSHLDVV8DI, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v8di_mask, "__builtin_ia32_vpshldv_v8di_mask", IX86_BUILTIN_VPSHLDVV8DI_MASK, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v8di_maskz, "__builtin_ia32_vpshldv_v8di_maskz", IX86_BUILTIN_VPSHLDVV8DI_MASKZ, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v4di, "__builtin_ia32_vpshldv_v4di", IX86_BUILTIN_VPSHLDVV4DI, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v4di_mask, "__builtin_ia32_vpshldv_v4di_mask", IX86_BUILTIN_VPSHLDVV4DI_MASK, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v4di_maskz, "__builtin_ia32_vpshldv_v4di_maskz", IX86_BUILTIN_VPSHLDVV4DI_MASKZ, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v2di, "__builtin_ia32_vpshldv_v2di", IX86_BUILTIN_VPSHLDVV2DI, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v2di_mask, "__builtin_ia32_vpshldv_v2di_mask", IX86_BUILTIN_VPSHLDVV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v2di_maskz, "__builtin_ia32_vpshldv_v2di_maskz", IX86_BUILTIN_VPSHLDVV2DI_MASKZ, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_INT)
  
  /* GFNI */
  BDESC (OPTION_MASK_ISA_GFNI | OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_vgf2p8affineinvqb_v64qi, "__builtin_ia32_vgf2p8affineinvqb_v64qi", IX86_BUILTIN_VGF2P8AFFINEINVQB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_INT)
--- 2524,2583 ----
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v2di_mask, "__builtin_ia32_vpshld_v2di_mask", IX86_BUILTIN_VPSHLDV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
  
  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi, "__builtin_ia32_vpshrdv_v32hi", IX86_BUILTIN_VPSHRDVV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrdv_v32hi_mask, "__builtin_ia32_vpshrdv_v32hi_mask", IX86_BUILTIN_VPSHRDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrdv_v32hi_maskz, "__builtin_ia32_vpshrdv_v32hi_maskz", IX86_BUILTIN_VPSHRDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi, "__builtin_ia32_vpshrdv_v16hi", IX86_BUILTIN_VPSHRDVV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi_mask, "__builtin_ia32_vpshrdv_v16hi_mask", IX86_BUILTIN_VPSHRDVV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi_maskz, "__builtin_ia32_vpshrdv_v16hi_maskz", IX86_BUILTIN_VPSHRDVV16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v8hi, "__builtin_ia32_vpshrdv_v8hi", IX86_BUILTIN_VPSHRDVV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v8hi_mask, "__builtin_ia32_vpshrdv_v8hi_mask", IX86_BUILTIN_VPSHRDVV8HI_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v8hi_maskz, "__builtin_ia32_vpshrdv_v8hi_maskz", IX86_BUILTIN_VPSHRDVV8HI_MASKZ, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v16si, "__builtin_ia32_vpshrdv_v16si", IX86_BUILTIN_VPSHRDVV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v16si_mask, "__builtin_ia32_vpshrdv_v16si_mask", IX86_BUILTIN_VPSHRDVV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v16si_maskz, "__builtin_ia32_vpshrdv_v16si_maskz", IX86_BUILTIN_VPSHRDVV16SI_MASKZ, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v8si, "__builtin_ia32_vpshrdv_v8si", IX86_BUILTIN_VPSHRDVV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v8si_mask, "__builtin_ia32_vpshrdv_v8si_mask", IX86_BUILTIN_VPSHRDVV8SI_MASK, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v8si_maskz, "__builtin_ia32_vpshrdv_v8si_maskz", IX86_BUILTIN_VPSHRDVV8SI_MASKZ, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v4si, "__builtin_ia32_vpshrdv_v4si", IX86_BUILTIN_VPSHRDVV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v4si_mask, "__builtin_ia32_vpshrdv_v4si_mask", IX86_BUILTIN_VPSHRDVV4SI_MASK, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v4si_maskz, "__builtin_ia32_vpshrdv_v4si_maskz", IX86_BUILTIN_VPSHRDVV4SI_MASKZ, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v8di, "__builtin_ia32_vpshrdv_v8di", IX86_BUILTIN_VPSHRDVV8DI, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v8di_mask, "__builtin_ia32_vpshrdv_v8di_mask", IX86_BUILTIN_VPSHRDVV8DI_MASK, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v8di_maskz, "__builtin_ia32_vpshrdv_v8di_maskz", IX86_BUILTIN_VPSHRDVV8DI_MASKZ, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v4di, "__builtin_ia32_vpshrdv_v4di", IX86_BUILTIN_VPSHRDVV4DI, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v4di_mask, "__builtin_ia32_vpshrdv_v4di_mask", IX86_BUILTIN_VPSHRDVV4DI_MASK, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v4di_maskz, "__builtin_ia32_vpshrdv_v4di_maskz", IX86_BUILTIN_VPSHRDVV4DI_MASKZ, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v2di, "__builtin_ia32_vpshrdv_v2di", IX86_BUILTIN_VPSHRDVV2DI, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v2di_mask, "__builtin_ia32_vpshrdv_v2di_mask", IX86_BUILTIN_VPSHRDVV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v2di_maskz, "__builtin_ia32_vpshrdv_v2di_maskz", IX86_BUILTIN_VPSHRDVV2DI_MASKZ, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI)
  
  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi, "__builtin_ia32_vpshldv_v32hi", IX86_BUILTIN_VPSHLDVV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshldv_v32hi_mask, "__builtin_ia32_vpshldv_v32hi_mask", IX86_BUILTIN_VPSHLDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshldv_v32hi_maskz, "__builtin_ia32_vpshldv_v32hi_maskz", IX86_BUILTIN_VPSHLDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi, "__builtin_ia32_vpshldv_v16hi", IX86_BUILTIN_VPSHLDVV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi_mask, "__builtin_ia32_vpshldv_v16hi_mask", IX86_BUILTIN_VPSHLDVV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi_maskz, "__builtin_ia32_vpshldv_v16hi_maskz", IX86_BUILTIN_VPSHLDVV16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v8hi, "__builtin_ia32_vpshldv_v8hi", IX86_BUILTIN_VPSHLDVV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v8hi_mask, "__builtin_ia32_vpshldv_v8hi_mask", IX86_BUILTIN_VPSHLDVV8HI_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v8hi_maskz, "__builtin_ia32_vpshldv_v8hi_maskz", IX86_BUILTIN_VPSHLDVV8HI_MASKZ, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v16si, "__builtin_ia32_vpshldv_v16si", IX86_BUILTIN_VPSHLDVV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v16si_mask, "__builtin_ia32_vpshldv_v16si_mask", IX86_BUILTIN_VPSHLDVV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v16si_maskz, "__builtin_ia32_vpshldv_v16si_maskz", IX86_BUILTIN_VPSHLDVV16SI_MASKZ, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v8si, "__builtin_ia32_vpshldv_v8si", IX86_BUILTIN_VPSHLDVV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v8si_mask, "__builtin_ia32_vpshldv_v8si_mask", IX86_BUILTIN_VPSHLDVV8SI_MASK, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v8si_maskz, "__builtin_ia32_vpshldv_v8si_maskz", IX86_BUILTIN_VPSHLDVV8SI_MASKZ, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v4si, "__builtin_ia32_vpshldv_v4si", IX86_BUILTIN_VPSHLDVV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v4si_mask, "__builtin_ia32_vpshldv_v4si_mask", IX86_BUILTIN_VPSHLDVV4SI_MASK, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v4si_maskz, "__builtin_ia32_vpshldv_v4si_maskz", IX86_BUILTIN_VPSHLDVV4SI_MASKZ, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v8di, "__builtin_ia32_vpshldv_v8di", IX86_BUILTIN_VPSHLDVV8DI, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v8di_mask, "__builtin_ia32_vpshldv_v8di_mask", IX86_BUILTIN_VPSHLDVV8DI_MASK, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v8di_maskz, "__builtin_ia32_vpshldv_v8di_maskz", IX86_BUILTIN_VPSHLDVV8DI_MASKZ, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v4di, "__builtin_ia32_vpshldv_v4di", IX86_BUILTIN_VPSHLDVV4DI, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v4di_mask, "__builtin_ia32_vpshldv_v4di_mask", IX86_BUILTIN_VPSHLDVV4DI_MASK, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v4di_maskz, "__builtin_ia32_vpshldv_v4di_maskz", IX86_BUILTIN_VPSHLDVV4DI_MASKZ, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v2di, "__builtin_ia32_vpshldv_v2di", IX86_BUILTIN_VPSHLDVV2DI, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v2di_mask, "__builtin_ia32_vpshldv_v2di_mask", IX86_BUILTIN_VPSHLDVV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v2di_maskz, "__builtin_ia32_vpshldv_v2di_maskz", IX86_BUILTIN_VPSHLDVV2DI_MASKZ, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI)
  
  /* GFNI */
  BDESC (OPTION_MASK_ISA_GFNI | OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_vgf2p8affineinvqb_v64qi, "__builtin_ia32_vgf2p8affineinvqb_v64qi", IX86_BUILTIN_VGF2P8AFFINEINVQB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_INT)
*************** BDESC (OPTION_MASK_ISA_GFNI | OPTION_MAS
*** 2594,2637 ****
  /* VNNI */
  
  BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpbusd_v16si, "__builtin_ia32_vpdpbusd_v16si", IX86_BUILTIN_VPDPBUSDV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpbusd_v16si_mask, "__builtin_ia32_vpdpbusd_v16si_mask", IX86_BUILTIN_VPDPBUSDV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpbusd_v16si_maskz, "__builtin_ia32_vpdpbusd_v16si_maskz", IX86_BUILTIN_VPDPBUSDV16SI_MASKZ, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusd_v8si, "__builtin_ia32_vpdpbusd_v8si", IX86_BUILTIN_VPDPBUSDV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusd_v8si_mask, "__builtin_ia32_vpdpbusd_v8si_mask", IX86_BUILTIN_VPDPBUSDV8SI_MASK, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusd_v8si_maskz, "__builtin_ia32_vpdpbusd_v8si_maskz", IX86_BUILTIN_VPDPBUSDV8SI_MASKZ, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusd_v4si, "__builtin_ia32_vpdpbusd_v4si", IX86_BUILTIN_VPDPBUSDV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusd_v4si_mask, "__builtin_ia32_vpdpbusd_v4si_mask", IX86_BUILTIN_VPDPBUSDV4SI_MASK, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusd_v4si_maskz, "__builtin_ia32_vpdpbusd_v4si_maskz", IX86_BUILTIN_VPDPBUSDV4SI_MASKZ, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
  
  BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpbusds_v16si, "__builtin_ia32_vpdpbusds_v16si", IX86_BUILTIN_VPDPBUSDSV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpbusds_v16si_mask, "__builtin_ia32_vpdpbusds_v16si_mask", IX86_BUILTIN_VPDPBUSDSV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpbusds_v16si_maskz, "__builtin_ia32_vpdpbusds_v16si_maskz", IX86_BUILTIN_VPDPBUSDSV16SI_MASKZ, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusds_v8si, "__builtin_ia32_vpdpbusds_v8si", IX86_BUILTIN_VPDPBUSDSV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusds_v8si_mask, "__builtin_ia32_vpdpbusds_v8si_mask", IX86_BUILTIN_VPDPBUSDSV8SI_MASK, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusds_v8si_maskz, "__builtin_ia32_vpdpbusds_v8si_maskz", IX86_BUILTIN_VPDPBUSDSV8SI_MASKZ, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusds_v4si, "__builtin_ia32_vpdpbusds_v4si", IX86_BUILTIN_VPDPBUSDSV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusds_v4si_mask, "__builtin_ia32_vpdpbusds_v4si_mask", IX86_BUILTIN_VPDPBUSDSV4SI_MASK, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusds_v4si_maskz, "__builtin_ia32_vpdpbusds_v4si_maskz", IX86_BUILTIN_VPDPBUSDSV4SI_MASKZ, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
  
  BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpwssd_v16si, "__builtin_ia32_vpdpwssd_v16si", IX86_BUILTIN_VPDPWSSDV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpwssd_v16si_mask, "__builtin_ia32_vpdpwssd_v16si_mask", IX86_BUILTIN_VPDPWSSDV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpwssd_v16si_maskz, "__builtin_ia32_vpdpwssd_v16si_maskz", IX86_BUILTIN_VPDPWSSDV16SI_MASKZ, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssd_v8si, "__builtin_ia32_vpdpwssd_v8si", IX86_BUILTIN_VPDPWSSDV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssd_v8si_mask, "__builtin_ia32_vpdpwssd_v8si_mask", IX86_BUILTIN_VPDPWSSDV8SI_MASK, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssd_v8si_maskz, "__builtin_ia32_vpdpwssd_v8si_maskz", IX86_BUILTIN_VPDPWSSDV8SI_MASKZ, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssd_v4si, "__builtin_ia32_vpdpwssd_v4si", IX86_BUILTIN_VPDPWSSDV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssd_v4si_mask, "__builtin_ia32_vpdpwssd_v4si_mask", IX86_BUILTIN_VPDPWSSDV4SI_MASK, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssd_v4si_maskz, "__builtin_ia32_vpdpwssd_v4si_maskz", IX86_BUILTIN_VPDPWSSDV4SI_MASKZ, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
  
  BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpwssds_v16si, "__builtin_ia32_vpdpwssds_v16si", IX86_BUILTIN_VPDPWSSDSV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpwssds_v16si_mask, "__builtin_ia32_vpdpwssds_v16si_mask", IX86_BUILTIN_VPDPWSSDSV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpwssds_v16si_maskz, "__builtin_ia32_vpdpwssds_v16si_maskz", IX86_BUILTIN_VPDPWSSDSV16SI_MASKZ, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v8si, "__builtin_ia32_vpdpwssds_v8si", IX86_BUILTIN_VPDPWSSDSV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v8si_mask, "__builtin_ia32_vpdpwssds_v8si_mask", IX86_BUILTIN_VPDPWSSDSV8SI_MASK, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v8si_maskz, "__builtin_ia32_vpdpwssds_v8si_maskz", IX86_BUILTIN_VPDPWSSDSV8SI_MASKZ, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v4si, "__builtin_ia32_vpdpwssds_v4si", IX86_BUILTIN_VPDPWSSDSV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v4si_mask, "__builtin_ia32_vpdpwssds_v4si_mask", IX86_BUILTIN_VPDPWSSDSV4SI_MASK, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v4si_maskz, "__builtin_ia32_vpdpwssds_v4si_maskz", IX86_BUILTIN_VPDPWSSDSV4SI_MASKZ, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
  
  /* VPCLMULQDQ */
  BDESC (OPTION_MASK_ISA_VPCLMULQDQ | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpclmulqdq_v2di, "__builtin_ia32_vpclmulqdq_v2di", IX86_BUILTIN_VPCLMULQDQ2, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT)
--- 2602,2645 ----
  /* VNNI */
  
  BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpbusd_v16si, "__builtin_ia32_vpdpbusd_v16si", IX86_BUILTIN_VPDPBUSDV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpbusd_v16si_mask, "__builtin_ia32_vpdpbusd_v16si_mask", IX86_BUILTIN_VPDPBUSDV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpbusd_v16si_maskz, "__builtin_ia32_vpdpbusd_v16si_maskz", IX86_BUILTIN_VPDPBUSDV16SI_MASKZ, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusd_v8si, "__builtin_ia32_vpdpbusd_v8si", IX86_BUILTIN_VPDPBUSDV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusd_v8si_mask, "__builtin_ia32_vpdpbusd_v8si_mask", IX86_BUILTIN_VPDPBUSDV8SI_MASK, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusd_v8si_maskz, "__builtin_ia32_vpdpbusd_v8si_maskz", IX86_BUILTIN_VPDPBUSDV8SI_MASKZ, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusd_v4si, "__builtin_ia32_vpdpbusd_v4si", IX86_BUILTIN_VPDPBUSDV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusd_v4si_mask, "__builtin_ia32_vpdpbusd_v4si_mask", IX86_BUILTIN_VPDPBUSDV4SI_MASK, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusd_v4si_maskz, "__builtin_ia32_vpdpbusd_v4si_maskz", IX86_BUILTIN_VPDPBUSDV4SI_MASKZ, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
  
  BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpbusds_v16si, "__builtin_ia32_vpdpbusds_v16si", IX86_BUILTIN_VPDPBUSDSV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpbusds_v16si_mask, "__builtin_ia32_vpdpbusds_v16si_mask", IX86_BUILTIN_VPDPBUSDSV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpbusds_v16si_maskz, "__builtin_ia32_vpdpbusds_v16si_maskz", IX86_BUILTIN_VPDPBUSDSV16SI_MASKZ, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusds_v8si, "__builtin_ia32_vpdpbusds_v8si", IX86_BUILTIN_VPDPBUSDSV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusds_v8si_mask, "__builtin_ia32_vpdpbusds_v8si_mask", IX86_BUILTIN_VPDPBUSDSV8SI_MASK, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusds_v8si_maskz, "__builtin_ia32_vpdpbusds_v8si_maskz", IX86_BUILTIN_VPDPBUSDSV8SI_MASKZ, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusds_v4si, "__builtin_ia32_vpdpbusds_v4si", IX86_BUILTIN_VPDPBUSDSV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusds_v4si_mask, "__builtin_ia32_vpdpbusds_v4si_mask", IX86_BUILTIN_VPDPBUSDSV4SI_MASK, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpbusds_v4si_maskz, "__builtin_ia32_vpdpbusds_v4si_maskz", IX86_BUILTIN_VPDPBUSDSV4SI_MASKZ, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
  
  BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpwssd_v16si, "__builtin_ia32_vpdpwssd_v16si", IX86_BUILTIN_VPDPWSSDV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpwssd_v16si_mask, "__builtin_ia32_vpdpwssd_v16si_mask", IX86_BUILTIN_VPDPWSSDV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpwssd_v16si_maskz, "__builtin_ia32_vpdpwssd_v16si_maskz", IX86_BUILTIN_VPDPWSSDV16SI_MASKZ, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssd_v8si, "__builtin_ia32_vpdpwssd_v8si", IX86_BUILTIN_VPDPWSSDV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssd_v8si_mask, "__builtin_ia32_vpdpwssd_v8si_mask", IX86_BUILTIN_VPDPWSSDV8SI_MASK, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssd_v8si_maskz, "__builtin_ia32_vpdpwssd_v8si_maskz", IX86_BUILTIN_VPDPWSSDV8SI_MASKZ, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssd_v4si, "__builtin_ia32_vpdpwssd_v4si", IX86_BUILTIN_VPDPWSSDV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssd_v4si_mask, "__builtin_ia32_vpdpwssd_v4si_mask", IX86_BUILTIN_VPDPWSSDV4SI_MASK, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssd_v4si_maskz, "__builtin_ia32_vpdpwssd_v4si_maskz", IX86_BUILTIN_VPDPWSSDV4SI_MASKZ, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
  
  BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpwssds_v16si, "__builtin_ia32_vpdpwssds_v16si", IX86_BUILTIN_VPDPWSSDSV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpwssds_v16si_mask, "__builtin_ia32_vpdpwssds_v16si_mask", IX86_BUILTIN_VPDPWSSDSV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI, 0, CODE_FOR_vpdpwssds_v16si_maskz, "__builtin_ia32_vpdpwssds_v16si_maskz", IX86_BUILTIN_VPDPWSSDSV16SI_MASKZ, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v8si, "__builtin_ia32_vpdpwssds_v8si", IX86_BUILTIN_VPDPWSSDSV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v8si_mask, "__builtin_ia32_vpdpwssds_v8si_mask", IX86_BUILTIN_VPDPWSSDSV8SI_MASK, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v8si_maskz, "__builtin_ia32_vpdpwssds_v8si_maskz", IX86_BUILTIN_VPDPWSSDSV8SI_MASKZ, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
  BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v4si, "__builtin_ia32_vpdpwssds_v4si", IX86_BUILTIN_VPDPWSSDSV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v4si_mask, "__builtin_ia32_vpdpwssds_v4si_mask", IX86_BUILTIN_VPDPWSSDSV4SI_MASK, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
! BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v4si_maskz, "__builtin_ia32_vpdpwssds_v4si_maskz", IX86_BUILTIN_VPDPWSSDSV4SI_MASKZ, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
  
  /* VPCLMULQDQ */
  BDESC (OPTION_MASK_ISA_VPCLMULQDQ | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpclmulqdq_v2di, "__builtin_ia32_vpclmulqdq_v2di", IX86_BUILTIN_VPCLMULQDQ2, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT)
*************** BDESC (OPTION_MASK_ISA_AVX512BITALG | OP
*** 2673,2707 ****
  BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_vpshufbitqmbv16qi_mask, "__builtin_ia32_vpshufbitqmb128_mask", IX86_BUILTIN_VPSHUFBITQMB128_MASK, UNKNOWN, (int) UHI_FTYPE_V16QI_V16QI_UHI)
  
  /* AVX512_4FMAPS and AVX512_4VNNIW builtins with variable number of arguments. Defined in additional ix86_isa_flags2.  */
! BDESC (0, OPTION_MASK_ISA_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fmaddps_mask, "__builtin_ia32_4fmaddps_mask", IX86_BUILTIN_4FMAPS_MASK, UNKNOWN, (int) V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF_V16SF_UHI)
! BDESC (0, OPTION_MASK_ISA_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fmaddps, "__builtin_ia32_4fmaddps", IX86_BUILTIN_4FMAPS, UNKNOWN, (int) V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF)
! BDESC (0, OPTION_MASK_ISA_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fmaddss, "__builtin_ia32_4fmaddss", IX86_BUILTIN_4FMASS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF)
! BDESC (0, OPTION_MASK_ISA_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fmaddss_mask, "__builtin_ia32_4fmaddss_mask", IX86_BUILTIN_4FMASS_MASK, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF_V4SF_UQI)
! BDESC (0, OPTION_MASK_ISA_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fnmaddps_mask, "__builtin_ia32_4fnmaddps_mask", IX86_BUILTIN_4FNMAPS_MASK, UNKNOWN, (int) V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF_V16SF_UHI)
! BDESC (0, OPTION_MASK_ISA_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fnmaddps, "__builtin_ia32_4fnmaddps", IX86_BUILTIN_4FNMAPS, UNKNOWN, (int) V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF)
! BDESC (0, OPTION_MASK_ISA_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fnmaddss, "__builtin_ia32_4fnmaddss", IX86_BUILTIN_4FNMASS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF)
! BDESC (0, OPTION_MASK_ISA_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fnmaddss_mask, "__builtin_ia32_4fnmaddss_mask", IX86_BUILTIN_4FNMASS_MASK, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF_V4SF_UQI)
! BDESC (0, OPTION_MASK_ISA_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssd, "__builtin_ia32_vp4dpwssd", IX86_BUILTIN_4DPWSSD, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI)
! BDESC (0, OPTION_MASK_ISA_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssd_mask, "__builtin_ia32_vp4dpwssd_mask", IX86_BUILTIN_4DPWSSD_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI_V16SI_UHI)
! BDESC (0, OPTION_MASK_ISA_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssds, "__builtin_ia32_vp4dpwssds", IX86_BUILTIN_4DPWSSDS, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI)
! BDESC (0, OPTION_MASK_ISA_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssds_mask, "__builtin_ia32_vp4dpwssds_mask", IX86_BUILTIN_4DPWSSDS_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI_V16SI_UHI)
  
  /* RDPID.  */
! BDESC (0, OPTION_MASK_ISA_RDPID, CODE_FOR_rdpid, "__builtin_ia32_rdpid", IX86_BUILTIN_RDPID, UNKNOWN, (int) UNSIGNED_FTYPE_VOID)
  
  /* VAES.  */
! BDESC (0, OPTION_MASK_ISA_VAES, CODE_FOR_vaesdec_v16qi, "__builtin_ia32_vaesdec_v16qi", IX86_BUILTIN_VAESDEC16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI)
! BDESC (0, OPTION_MASK_ISA_VAES, CODE_FOR_vaesdec_v32qi, "__builtin_ia32_vaesdec_v32qi", IX86_BUILTIN_VAESDEC32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI)
! BDESC (0, OPTION_MASK_ISA_VAES, CODE_FOR_vaesdec_v64qi, "__builtin_ia32_vaesdec_v64qi", IX86_BUILTIN_VAESDEC64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI)
! BDESC (0, OPTION_MASK_ISA_VAES, CODE_FOR_vaesdeclast_v16qi, "__builtin_ia32_vaesdeclast_v16qi", IX86_BUILTIN_VAESDECLAST16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI)
! BDESC (0, OPTION_MASK_ISA_VAES, CODE_FOR_vaesdeclast_v32qi, "__builtin_ia32_vaesdeclast_v32qi", IX86_BUILTIN_VAESDECLAST32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI)
! BDESC (0, OPTION_MASK_ISA_VAES, CODE_FOR_vaesdeclast_v64qi, "__builtin_ia32_vaesdeclast_v64qi", IX86_BUILTIN_VAESDECLAST64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI)
! BDESC (0, OPTION_MASK_ISA_VAES, CODE_FOR_vaesenc_v16qi, "__builtin_ia32_vaesenc_v16qi", IX86_BUILTIN_VAESENC16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI)
! BDESC (0, OPTION_MASK_ISA_VAES, CODE_FOR_vaesenc_v32qi, "__builtin_ia32_vaesenc_v32qi", IX86_BUILTIN_VAESENC32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI)
! BDESC (0, OPTION_MASK_ISA_VAES, CODE_FOR_vaesenc_v64qi, "__builtin_ia32_vaesenc_v64qi", IX86_BUILTIN_VAESENC64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI)
! BDESC (0, OPTION_MASK_ISA_VAES, CODE_FOR_vaesenclast_v16qi, "__builtin_ia32_vaesenclast_v16qi", IX86_BUILTIN_VAESENCLAST16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI)
! BDESC (0, OPTION_MASK_ISA_VAES, CODE_FOR_vaesenclast_v32qi, "__builtin_ia32_vaesenclast_v32qi", IX86_BUILTIN_VAESENCLAST32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI)
! BDESC (0, OPTION_MASK_ISA_VAES, CODE_FOR_vaesenclast_v64qi, "__builtin_ia32_vaesenclast_v64qi", IX86_BUILTIN_VAESENCLAST64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI)
  
  /* Builtins with rounding support.  */
  BDESC_END (ARGS, ROUND_ARGS)
--- 2681,2744 ----
  BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_vpshufbitqmbv16qi_mask, "__builtin_ia32_vpshufbitqmb128_mask", IX86_BUILTIN_VPSHUFBITQMB128_MASK, UNKNOWN, (int) UHI_FTYPE_V16QI_V16QI_UHI)
  
  /* AVX512_4FMAPS and AVX512_4VNNIW builtins with variable number of arguments. Defined in additional ix86_isa_flags2.  */
! BDESC (0, OPTION_MASK_ISA2_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fmaddps_mask, "__builtin_ia32_4fmaddps_mask", IX86_BUILTIN_4FMAPS_MASK, UNKNOWN, (int) V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF_V16SF_UHI)
! BDESC (0, OPTION_MASK_ISA2_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fmaddps, "__builtin_ia32_4fmaddps", IX86_BUILTIN_4FMAPS, UNKNOWN, (int) V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF)
! BDESC (0, OPTION_MASK_ISA2_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fmaddss, "__builtin_ia32_4fmaddss", IX86_BUILTIN_4FMASS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF)
! BDESC (0, OPTION_MASK_ISA2_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fmaddss_mask, "__builtin_ia32_4fmaddss_mask", IX86_BUILTIN_4FMASS_MASK, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF_V4SF_UQI)
! BDESC (0, OPTION_MASK_ISA2_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fnmaddps_mask, "__builtin_ia32_4fnmaddps_mask", IX86_BUILTIN_4FNMAPS_MASK, UNKNOWN, (int) V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF_V16SF_UHI)
! BDESC (0, OPTION_MASK_ISA2_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fnmaddps, "__builtin_ia32_4fnmaddps", IX86_BUILTIN_4FNMAPS, UNKNOWN, (int) V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF)
! BDESC (0, OPTION_MASK_ISA2_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fnmaddss, "__builtin_ia32_4fnmaddss", IX86_BUILTIN_4FNMASS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF)
! BDESC (0, OPTION_MASK_ISA2_AVX5124FMAPS, CODE_FOR_avx5124fmaddps_4fnmaddss_mask, "__builtin_ia32_4fnmaddss_mask", IX86_BUILTIN_4FNMASS_MASK, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF_V4SF_UQI)
! BDESC (0, OPTION_MASK_ISA2_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssd, "__builtin_ia32_vp4dpwssd", IX86_BUILTIN_4DPWSSD, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI)
! BDESC (0, OPTION_MASK_ISA2_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssd_mask, "__builtin_ia32_vp4dpwssd_mask", IX86_BUILTIN_4DPWSSD_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI_V16SI_UHI)
! BDESC (0, OPTION_MASK_ISA2_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssds, "__builtin_ia32_vp4dpwssds", IX86_BUILTIN_4DPWSSDS, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI)
! BDESC (0, OPTION_MASK_ISA2_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssds_mask, "__builtin_ia32_vp4dpwssds_mask", IX86_BUILTIN_4DPWSSDS_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI_V16SI_UHI)
  
  /* RDPID.  */
! BDESC (0, OPTION_MASK_ISA2_RDPID, CODE_FOR_rdpid, "__builtin_ia32_rdpid", IX86_BUILTIN_RDPID, UNKNOWN, (int) UNSIGNED_FTYPE_VOID)
  
  /* VAES.  */
! BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdec_v16qi, "__builtin_ia32_vaesdec_v16qi", IX86_BUILTIN_VAESDEC16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI)
! BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdec_v32qi, "__builtin_ia32_vaesdec_v32qi", IX86_BUILTIN_VAESDEC32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI)
! BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdec_v64qi, "__builtin_ia32_vaesdec_v64qi", IX86_BUILTIN_VAESDEC64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI)
! BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdeclast_v16qi, "__builtin_ia32_vaesdeclast_v16qi", IX86_BUILTIN_VAESDECLAST16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI)
! BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdeclast_v32qi, "__builtin_ia32_vaesdeclast_v32qi", IX86_BUILTIN_VAESDECLAST32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI)
! BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesdeclast_v64qi, "__builtin_ia32_vaesdeclast_v64qi", IX86_BUILTIN_VAESDECLAST64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI)
! BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenc_v16qi, "__builtin_ia32_vaesenc_v16qi", IX86_BUILTIN_VAESENC16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI)
! BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenc_v32qi, "__builtin_ia32_vaesenc_v32qi", IX86_BUILTIN_VAESENC32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI)
! BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenc_v64qi, "__builtin_ia32_vaesenc_v64qi", IX86_BUILTIN_VAESENC64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI)
! BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenclast_v16qi, "__builtin_ia32_vaesenclast_v16qi", IX86_BUILTIN_VAESENCLAST16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI)
! BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenclast_v32qi, "__builtin_ia32_vaesenclast_v32qi", IX86_BUILTIN_VAESENCLAST32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI)
! BDESC (0, OPTION_MASK_ISA2_VAES, CODE_FOR_vaesenclast_v64qi, "__builtin_ia32_vaesenclast_v64qi", IX86_BUILTIN_VAESENCLAST64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI)
! 
! /* BF16 */
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v32hi, "__builtin_ia32_cvtne2ps2bf16_v32hi", IX86_BUILTIN_CVTNE2PS2HI16_V32HI, UNKNOWN, (int) V32HI_FTYPE_V16SF_V16SF)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v32hi_mask, "__builtin_ia32_cvtne2ps2bf16_v32hi_mask", IX86_BUILTIN_CVTNE2PS2HI16_V32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V16SF_V16SF_V32HI_USI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v32hi_maskz, "__builtin_ia32_cvtne2ps2bf16_v32hi_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V16SF_V16SF_USI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v16hi, "__builtin_ia32_cvtne2ps2bf16_v16hi", IX86_BUILTIN_CVTNE2PS2HI16_V16HI, UNKNOWN, (int) V16HI_FTYPE_V8SF_V8SF)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v16hi_mask, "__builtin_ia32_cvtne2ps2bf16_v16hi_mask", IX86_BUILTIN_CVTNE2PS2HI16_V16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V8SF_V8SF_V16HI_UHI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v16hi_maskz, "__builtin_ia32_cvtne2ps2bf16_v16hi_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V8SF_V8SF_UHI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v8hi, "__builtin_ia32_cvtne2ps2bf16_v8hi", IX86_BUILTIN_CVTNE2PS2HI16_V8HI, UNKNOWN, (int) V8HI_FTYPE_V4SF_V4SF)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v8hi_mask, "__builtin_ia32_cvtne2ps2bf16_v8hi_mask", IX86_BUILTIN_CVTNE2PS2HI16_V8HI_MASK, UNKNOWN, (int) V8HI_FTYPE_V4SF_V4SF_V8HI_UQI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtne2ps2bf16_v8hi_maskz, "__builtin_ia32_cvtne2ps2bf16_v8hi_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V8HI_MASKZ, UNKNOWN, (int) V8HI_FTYPE_V4SF_V4SF_UQI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v16sf, "__builtin_ia32_cvtneps2bf16_v16sf", IX86_BUILTIN_CVTNEPS2HI16_V16SF, UNKNOWN, (int) V16HI_FTYPE_V16SF)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v16sf_mask, "__builtin_ia32_cvtneps2bf16_v16sf_mask", IX86_BUILTIN_CVTNEPS2HI16_V16SF_MASK, UNKNOWN, (int) V16HI_FTYPE_V16SF_V16HI_UHI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v16sf_maskz, "__builtin_ia32_cvtneps2bf16_v16sf_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V16SF_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16SF_UHI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v8sf, "__builtin_ia32_cvtneps2bf16_v8sf", IX86_BUILTIN_CVTNEPS2HI16_V8SF, UNKNOWN, (int) V8HI_FTYPE_V8SF)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v8sf_mask, "__builtin_ia32_cvtneps2bf16_v8sf_mask", IX86_BUILTIN_CVTNEPS2HI16_V8SF_MASK, UNKNOWN, (int) V8HI_FTYPE_V8SF_V8HI_UQI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v8sf_maskz, "__builtin_ia32_cvtneps2bf16_v8sf_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V8SF_MASKZ, UNKNOWN, (int) V8HI_FTYPE_V8SF_UQI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v4sf, "__builtin_ia32_cvtneps2bf16_v4sf", IX86_BUILTIN_CVTNEPS2HI16_V4SF, UNKNOWN, (int) V8HI_FTYPE_V4SF)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v4sf_mask, "__builtin_ia32_cvtneps2bf16_v4sf_mask", IX86_BUILTIN_CVTNEPS2HI16_V4SF_MASK, UNKNOWN, (int) V8HI_FTYPE_V4SF_V8HI_UQI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_cvtneps2bf16_v4sf_maskz, "__builtin_ia32_cvtneps2bf16_v4sf_maskz", IX86_BUILTIN_CVTNE2PS2HI16_V4SF_MASKZ, UNKNOWN, (int) V8HI_FTYPE_V4SF_UQI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v16sf, "__builtin_ia32_dpbf16ps_v16sf", IX86_BUILTIN_DPHI16PS_V16SF, UNKNOWN, (int) V16SF_FTYPE_V16SF_V32HI_V32HI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v16sf_mask, "__builtin_ia32_dpbf16ps_v16sf_mask", IX86_BUILTIN_DPHI16PS_V16SF_MASK, UNKNOWN, (int) V16SF_FTYPE_V16SF_V32HI_V32HI_UHI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v16sf_maskz, "__builtin_ia32_dpbf16ps_v16sf_maskz", IX86_BUILTIN_DPHI16PS_V16SF_MASKZ, UNKNOWN, (int) V16SF_FTYPE_V16SF_V32HI_V32HI_UHI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v8sf, "__builtin_ia32_dpbf16ps_v8sf", IX86_BUILTIN_DPHI16PS_V8SF, UNKNOWN, (int) V8SF_FTYPE_V8SF_V16HI_V16HI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v8sf_mask, "__builtin_ia32_dpbf16ps_v8sf_mask", IX86_BUILTIN_DPHI16PS_V8SF_MASK, UNKNOWN, (int) V8SF_FTYPE_V8SF_V16HI_V16HI_UQI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v8sf_maskz, "__builtin_ia32_dpbf16ps_v8sf_maskz", IX86_BUILTIN_DPHI16PS_V8SF_MASKZ, UNKNOWN, (int) V8SF_FTYPE_V8SF_V16HI_V16HI_UQI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v4sf, "__builtin_ia32_dpbf16ps_v4sf", IX86_BUILTIN_DPHI16PS_V4SF, UNKNOWN, (int) V4SF_FTYPE_V4SF_V8HI_V8HI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v4sf_mask, "__builtin_ia32_dpbf16ps_v4sf_mask", IX86_BUILTIN_DPHI16PS_V4SF_MASK, UNKNOWN, (int) V4SF_FTYPE_V4SF_V8HI_V8HI_UQI)
! BDESC (0, OPTION_MASK_ISA2_AVX512BF16, CODE_FOR_avx512f_dpbf16ps_v4sf_maskz, "__builtin_ia32_dpbf16ps_v4sf_maskz", IX86_BUILTIN_DPHI16PS_V4SF_MASKZ, UNKNOWN, (int) V4SF_FTYPE_V4SF_V8HI_V8HI_UQI)
  
  /* Builtins with rounding support.  */
  BDESC_END (ARGS, ROUND_ARGS)
*************** BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_
*** 2787,2794 ****
  BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_sse_vmmulv4sf3_mask_round, "__builtin_ia32_mulss_mask_round", IX86_BUILTIN_MULSS_MASK_ROUND, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF_UQI_INT)
  BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_rndscalev8df_mask_round, "__builtin_ia32_rndscalepd_mask", IX86_BUILTIN_RNDSCALEPD, UNKNOWN, (int) V8DF_FTYPE_V8DF_INT_V8DF_QI_INT)
  BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_rndscalev16sf_mask_round, "__builtin_ia32_rndscaleps_mask", IX86_BUILTIN_RNDSCALEPS, UNKNOWN, (int) V16SF_FTYPE_V16SF_INT_V16SF_HI_INT)
! BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_rndscalev2df_round, "__builtin_ia32_rndscalesd_round", IX86_BUILTIN_RNDSCALESD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT_INT)
! BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_rndscalev4sf_round, "__builtin_ia32_rndscaless_round", IX86_BUILTIN_RNDSCALESS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT_INT)
  BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_scalefv8df_mask_round, "__builtin_ia32_scalefpd512_mask", IX86_BUILTIN_SCALEFPD512, UNKNOWN, (int) V8DF_FTYPE_V8DF_V8DF_V8DF_UQI_INT)
  BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_scalefv16sf_mask_round, "__builtin_ia32_scalefps512_mask", IX86_BUILTIN_SCALEFPS512, UNKNOWN, (int) V16SF_FTYPE_V16SF_V16SF_V16SF_HI_INT)
  BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_vmscalefv2df_mask_round, "__builtin_ia32_scalefsd_mask_round", IX86_BUILTIN_SCALEFSD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DF_UQI_INT)
--- 2824,2831 ----
  BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_sse_vmmulv4sf3_mask_round, "__builtin_ia32_mulss_mask_round", IX86_BUILTIN_MULSS_MASK_ROUND, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF_UQI_INT)
  BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_rndscalev8df_mask_round, "__builtin_ia32_rndscalepd_mask", IX86_BUILTIN_RNDSCALEPD, UNKNOWN, (int) V8DF_FTYPE_V8DF_INT_V8DF_QI_INT)
  BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_rndscalev16sf_mask_round, "__builtin_ia32_rndscaleps_mask", IX86_BUILTIN_RNDSCALEPS, UNKNOWN, (int) V16SF_FTYPE_V16SF_INT_V16SF_HI_INT)
! BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_rndscalev2df_mask_round, "__builtin_ia32_rndscalesd_mask_round", IX86_BUILTIN_RNDSCALESD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT_V2DF_UQI_INT)
! BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_rndscalev4sf_mask_round, "__builtin_ia32_rndscaless_mask_round", IX86_BUILTIN_RNDSCALESS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT_V4SF_UQI_INT)
  BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_scalefv8df_mask_round, "__builtin_ia32_scalefpd512_mask", IX86_BUILTIN_SCALEFPD512, UNKNOWN, (int) V8DF_FTYPE_V8DF_V8DF_V8DF_UQI_INT)
  BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_scalefv16sf_mask_round, "__builtin_ia32_scalefps512_mask", IX86_BUILTIN_SCALEFPS512, UNKNOWN, (int) V16SF_FTYPE_V16SF_V16SF_V16SF_HI_INT)
  BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_avx512f_vmscalefv2df_mask_round, "__builtin_ia32_scalefsd_mask_round", IX86_BUILTIN_SCALEFSD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DF_UQI_INT)
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-builtins.c gcc-10.1.0/gcc/config/i386/i386-builtins.c
*** gcc-9.3.0/gcc/config/i386/i386-builtins.c	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/i386/i386-builtins.c	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,2546 ----
+ /* Copyright (C) 1988-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #define IN_TARGET_CODE 1
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "backend.h"
+ #include "rtl.h"
+ #include "tree.h"
+ #include "memmodel.h"
+ #include "gimple.h"
+ #include "cfghooks.h"
+ #include "cfgloop.h"
+ #include "df.h"
+ #include "tm_p.h"
+ #include "stringpool.h"
+ #include "expmed.h"
+ #include "optabs.h"
+ #include "regs.h"
+ #include "emit-rtl.h"
+ #include "recog.h"
+ #include "cgraph.h"
+ #include "diagnostic.h"
+ #include "cfgbuild.h"
+ #include "alias.h"
+ #include "fold-const.h"
+ #include "attribs.h"
+ #include "calls.h"
+ #include "stor-layout.h"
+ #include "varasm.h"
+ #include "output.h"
+ #include "insn-attr.h"
+ #include "flags.h"
+ #include "except.h"
+ #include "explow.h"
+ #include "expr.h"
+ #include "cfgrtl.h"
+ #include "common/common-target.h"
+ #include "langhooks.h"
+ #include "reload.h"
+ #include "gimplify.h"
+ #include "dwarf2.h"
+ #include "tm-constrs.h"
+ #include "cselib.h"
+ #include "sched-int.h"
+ #include "opts.h"
+ #include "tree-pass.h"
+ #include "context.h"
+ #include "pass_manager.h"
+ #include "target-globals.h"
+ #include "gimple-iterator.h"
+ #include "tree-vectorizer.h"
+ #include "shrink-wrap.h"
+ #include "builtins.h"
+ #include "rtl-iter.h"
+ #include "tree-iterator.h"
+ #include "dbgcnt.h"
+ #include "case-cfn-macros.h"
+ #include "dojump.h"
+ #include "fold-const-call.h"
+ #include "tree-vrp.h"
+ #include "tree-ssanames.h"
+ #include "selftest.h"
+ #include "selftest-rtl.h"
+ #include "print-rtl.h"
+ #include "intl.h"
+ #include "ifcvt.h"
+ #include "symbol-summary.h"
+ #include "ipa-prop.h"
+ #include "ipa-fnsummary.h"
+ #include "wide-int-bitmask.h"
+ #include "tree-vector-builder.h"
+ #include "debug.h"
+ #include "dwarf2out.h"
+ #include "i386-builtins.h"
+ 
+ #undef BDESC
+ #undef BDESC_FIRST
+ #undef BDESC_END
+ 
+ /* Macros for verification of enum ix86_builtins order.  */
+ #define BDESC_VERIFY(x, y, z) \
+   gcc_checking_assert ((x) == (enum ix86_builtins) ((y) + (z)))
+ #define BDESC_VERIFYS(x, y, z) \
+   STATIC_ASSERT ((x) == (enum ix86_builtins) ((y) + (z)))
+ 
+ BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
+ 	       IX86_BUILTIN__BDESC_COMI_LAST, 1);
+ BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
+ 	       IX86_BUILTIN__BDESC_PCMPESTR_LAST, 1);
+ BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
+ 	       IX86_BUILTIN__BDESC_PCMPISTR_LAST, 1);
+ BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_FIRST,
+ 	       IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST, 1);
+ BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
+ 	       IX86_BUILTIN__BDESC_ARGS_LAST, 1);
+ BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
+ 	       IX86_BUILTIN__BDESC_ROUND_ARGS_LAST, 1);
+ BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_FIRST,
+ 	       IX86_BUILTIN__BDESC_MULTI_ARG_LAST, 1);
+ BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_NORMAL_FIRST,
+ 	       IX86_BUILTIN__BDESC_CET_LAST, 1);
+ BDESC_VERIFYS (IX86_BUILTIN_MAX,
+ 	       IX86_BUILTIN__BDESC_CET_NORMAL_LAST, 1);
+ 
+ 
+ /* Table for the ix86 builtin non-function types.  */
+ static GTY(()) tree ix86_builtin_type_tab[(int) IX86_BT_LAST_CPTR + 1];
+ 
+ /* Retrieve an element from the above table, building some of
+    the types lazily.  */
+ 
+ static tree
+ ix86_get_builtin_type (enum ix86_builtin_type tcode)
+ {
+   unsigned int index;
+   tree type, itype;
+ 
+   gcc_assert ((unsigned)tcode < ARRAY_SIZE(ix86_builtin_type_tab));
+ 
+   type = ix86_builtin_type_tab[(int) tcode];
+   if (type != NULL)
+     return type;
+ 
+   gcc_assert (tcode > IX86_BT_LAST_PRIM);
+   if (tcode <= IX86_BT_LAST_VECT)
+     {
+       machine_mode mode;
+ 
+       index = tcode - IX86_BT_LAST_PRIM - 1;
+       itype = ix86_get_builtin_type (ix86_builtin_type_vect_base[index]);
+       mode = ix86_builtin_type_vect_mode[index];
+ 
+       type = build_vector_type_for_mode (itype, mode);
+     }
+   else
+     {
+       int quals;
+ 
+       index = tcode - IX86_BT_LAST_VECT - 1;
+       if (tcode <= IX86_BT_LAST_PTR)
+ 	quals = TYPE_UNQUALIFIED;
+       else
+ 	quals = TYPE_QUAL_CONST;
+ 
+       itype = ix86_get_builtin_type (ix86_builtin_type_ptr_base[index]);
+       if (quals != TYPE_UNQUALIFIED)
+ 	itype = build_qualified_type (itype, quals);
+ 
+       type = build_pointer_type (itype);
+     }
+ 
+   ix86_builtin_type_tab[(int) tcode] = type;
+   return type;
+ }
+ 
+ /* Table for the ix86 builtin function types.  */
+ static GTY(()) tree ix86_builtin_func_type_tab[(int) IX86_BT_LAST_ALIAS + 1];
+ 
+ /* Retrieve an element from the above table, building some of
+    the types lazily.  */
+ 
+ static tree
+ ix86_get_builtin_func_type (enum ix86_builtin_func_type tcode)
+ {
+   tree type;
+ 
+   gcc_assert ((unsigned)tcode < ARRAY_SIZE (ix86_builtin_func_type_tab));
+ 
+   type = ix86_builtin_func_type_tab[(int) tcode];
+   if (type != NULL)
+     return type;
+ 
+   if (tcode <= IX86_BT_LAST_FUNC)
+     {
+       unsigned start = ix86_builtin_func_start[(int) tcode];
+       unsigned after = ix86_builtin_func_start[(int) tcode + 1];
+       tree rtype, atype, args = void_list_node;
+       unsigned i;
+ 
+       rtype = ix86_get_builtin_type (ix86_builtin_func_args[start]);
+       for (i = after - 1; i > start; --i)
+ 	{
+ 	  atype = ix86_get_builtin_type (ix86_builtin_func_args[i]);
+ 	  args = tree_cons (NULL, atype, args);
+ 	}
+ 
+       type = build_function_type (rtype, args);
+     }
+   else
+     {
+       unsigned index = tcode - IX86_BT_LAST_FUNC - 1;
+       enum ix86_builtin_func_type icode;
+ 
+       icode = ix86_builtin_func_alias_base[index];
+       type = ix86_get_builtin_func_type (icode);
+     }
+ 
+   ix86_builtin_func_type_tab[(int) tcode] = type;
+   return type;
+ }
+ 
+ /* Table for the ix86 builtin decls.  */
+ static GTY(()) tree ix86_builtins[(int) IX86_BUILTIN_MAX];
+ 
+ struct builtin_isa ix86_builtins_isa[(int) IX86_BUILTIN_MAX];
+ 
+ tree get_ix86_builtin (enum ix86_builtins c)
+ {
+   return ix86_builtins[c];
+ }
+ 
+ /* Bits that can still enable any inclusion of a builtin.  */
+ HOST_WIDE_INT deferred_isa_values = 0;
+ HOST_WIDE_INT deferred_isa_values2 = 0;
+ 
+ /* Add an ix86 target builtin function with CODE, NAME and TYPE.  Save the
+    MASK and MASK2 of which isa_flags and ix86_isa_flags2 to use in the
+    ix86_builtins_isa array.  Stores the function decl in the ix86_builtins
+    array.  Returns the function decl or NULL_TREE, if the builtin was not
+    added.
+ 
+    If the front end has a special hook for builtin functions, delay adding
+    builtin functions that aren't in the current ISA until the ISA is changed
+    with function specific optimization.  Doing so, can save about 300K for the
+    default compiler.  When the builtin is expanded, check at that time whether
+    it is valid.
+ 
+    If the front end doesn't have a special hook, record all builtins, even if
+    it isn't an instruction set in the current ISA in case the user uses
+    function specific options for a different ISA, so that we don't get scope
+    errors if a builtin is added in the middle of a function scope.  */
+ 
+ static inline tree
+ def_builtin (HOST_WIDE_INT mask, HOST_WIDE_INT mask2,
+ 	     const char *name,
+ 	     enum ix86_builtin_func_type tcode,
+ 	     enum ix86_builtins code)
+ {
+   tree decl = NULL_TREE;
+ 
+   /* An instruction may be 64bit only regardless of ISAs.  */
+   if (!(mask & OPTION_MASK_ISA_64BIT) || TARGET_64BIT)
+     {
+       ix86_builtins_isa[(int) code].isa = mask;
+       ix86_builtins_isa[(int) code].isa2 = mask2;
+ 
+       mask &= ~OPTION_MASK_ISA_64BIT;
+ 
+       /* Filter out the masks most often ored together with others.  */
+       if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512VL)
+ 	  && mask != OPTION_MASK_ISA_AVX512VL)
+ 	mask &= ~OPTION_MASK_ISA_AVX512VL;
+       if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512BW)
+ 	  && mask != OPTION_MASK_ISA_AVX512BW)
+ 	mask &= ~OPTION_MASK_ISA_AVX512BW;
+ 
+       if (((mask2 == 0 || (mask2 & ix86_isa_flags2) != 0)
+ 	   && (mask == 0 || (mask & ix86_isa_flags) != 0))
+ 	  || ((mask & OPTION_MASK_ISA_MMX) != 0 && TARGET_MMX_WITH_SSE)
+ 	  || (lang_hooks.builtin_function
+ 	      == lang_hooks.builtin_function_ext_scope))
+ 	{
+ 	  tree type = ix86_get_builtin_func_type (tcode);
+ 	  decl = add_builtin_function (name, type, code, BUILT_IN_MD,
+ 				       NULL, NULL_TREE);
+ 	  ix86_builtins[(int) code] = decl;
+ 	  ix86_builtins_isa[(int) code].set_and_not_built_p = false;
+ 	}
+       else
+ 	{
+ 	  /* Just MASK and MASK2 where set_and_not_built_p == true can potentially
+ 	     include a builtin.  */
+ 	  deferred_isa_values |= mask;
+ 	  deferred_isa_values2 |= mask2;
+ 	  ix86_builtins[(int) code] = NULL_TREE;
+ 	  ix86_builtins_isa[(int) code].tcode = tcode;
+ 	  ix86_builtins_isa[(int) code].name = name;
+ 	  ix86_builtins_isa[(int) code].const_p = false;
+ 	  ix86_builtins_isa[(int) code].pure_p = false;
+ 	  ix86_builtins_isa[(int) code].set_and_not_built_p = true;
+ 	}
+     }
+ 
+   return decl;
+ }
+ 
+ /* Like def_builtin, but also marks the function decl "const".  */
+ 
+ static inline tree
+ def_builtin_const (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
+ 		   enum ix86_builtin_func_type tcode, enum ix86_builtins code)
+ {
+   tree decl = def_builtin (mask, mask2, name, tcode, code);
+   if (decl)
+     TREE_READONLY (decl) = 1;
+   else
+     ix86_builtins_isa[(int) code].const_p = true;
+ 
+   return decl;
+ }
+ 
+ /* Like def_builtin, but also marks the function decl "pure".  */
+ 
+ static inline tree
+ def_builtin_pure (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
+ 		  enum ix86_builtin_func_type tcode, enum ix86_builtins code)
+ {
+   tree decl = def_builtin (mask, mask2, name, tcode, code);
+   if (decl)
+     DECL_PURE_P (decl) = 1;
+   else
+     ix86_builtins_isa[(int) code].pure_p = true;
+ 
+   return decl;
+ }
+ 
+ /* Add any new builtin functions for a given ISA that may not have been
+    declared.  This saves a bit of space compared to adding all of the
+    declarations to the tree, even if we didn't use them.  */
+ 
+ void
+ ix86_add_new_builtins (HOST_WIDE_INT isa, HOST_WIDE_INT isa2)
+ {
+   isa &= ~OPTION_MASK_ISA_64BIT;
+ 
+   if ((isa & deferred_isa_values) == 0
+       && (isa2 & deferred_isa_values2) == 0
+       && ((deferred_isa_values & OPTION_MASK_ISA_MMX) == 0
+ 	  || !(TARGET_64BIT && (isa & OPTION_MASK_ISA_SSE2) != 0)))
+     return;
+ 
+   /* Bits in ISA value can be removed from potential isa values.  */
+   deferred_isa_values &= ~isa;
+   deferred_isa_values2 &= ~isa2;
+   if (TARGET_64BIT && (isa & OPTION_MASK_ISA_SSE2) != 0)
+     deferred_isa_values &= ~OPTION_MASK_ISA_MMX;
+ 
+   int i;
+   tree saved_current_target_pragma = current_target_pragma;
+   current_target_pragma = NULL_TREE;
+ 
+   for (i = 0; i < (int)IX86_BUILTIN_MAX; i++)
+     {
+       if (((ix86_builtins_isa[i].isa & isa) != 0
+ 	   || (ix86_builtins_isa[i].isa2 & isa2) != 0
+ 	   || ((ix86_builtins_isa[i].isa & OPTION_MASK_ISA_MMX) != 0
+ 	       && TARGET_64BIT
+ 	       && (isa & OPTION_MASK_ISA_SSE2) != 0))
+ 	  && ix86_builtins_isa[i].set_and_not_built_p)
+ 	{
+ 	  tree decl, type;
+ 
+ 	  /* Don't define the builtin again.  */
+ 	  ix86_builtins_isa[i].set_and_not_built_p = false;
+ 
+ 	  type = ix86_get_builtin_func_type (ix86_builtins_isa[i].tcode);
+ 	  decl = add_builtin_function_ext_scope (ix86_builtins_isa[i].name,
+ 						 type, i, BUILT_IN_MD, NULL,
+ 						 NULL_TREE);
+ 
+ 	  ix86_builtins[i] = decl;
+ 	  if (ix86_builtins_isa[i].const_p)
+ 	    TREE_READONLY (decl) = 1;
+ 	}
+     }
+ 
+   current_target_pragma = saved_current_target_pragma;
+ }
+ 
+ /* TM vector builtins.  */
+ 
+ /* Reuse the existing x86-specific `struct builtin_description' cause
+    we're lazy.  Add casts to make them fit.  */
+ static const struct builtin_description bdesc_tm[] =
+ {
+   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WM64", (enum ix86_builtins) BUILT_IN_TM_STORE_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
+   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM64", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
+   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM64", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
+   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
+   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
+   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
+   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
+ 
+   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WM128", (enum ix86_builtins) BUILT_IN_TM_STORE_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
+   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM128", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
+   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM128", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
+   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
+   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
+   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
+   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
+ 
+   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WM256", (enum ix86_builtins) BUILT_IN_TM_STORE_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
+   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM256", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
+   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM256", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
+   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
+   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
+   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
+   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
+ 
+   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_LM64", (enum ix86_builtins) BUILT_IN_TM_LOG_M64, UNKNOWN, VOID_FTYPE_PCVOID },
+   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_LM128", (enum ix86_builtins) BUILT_IN_TM_LOG_M128, UNKNOWN, VOID_FTYPE_PCVOID },
+   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_LM256", (enum ix86_builtins) BUILT_IN_TM_LOG_M256, UNKNOWN, VOID_FTYPE_PCVOID },
+ };
+ 
+ /* Initialize the transactional memory vector load/store builtins.  */
+ 
+ static void
+ ix86_init_tm_builtins (void)
+ {
+   enum ix86_builtin_func_type ftype;
+   const struct builtin_description *d;
+   size_t i;
+   tree decl;
+   tree attrs_load, attrs_type_load, attrs_store, attrs_type_store;
+   tree attrs_log, attrs_type_log;
+ 
+   if (!flag_tm)
+     return;
+ 
+   /* If there are no builtins defined, we must be compiling in a
+      language without trans-mem support.  */
+   if (!builtin_decl_explicit_p (BUILT_IN_TM_LOAD_1))
+     return;
+ 
+   /* Use whatever attributes a normal TM load has.  */
+   decl = builtin_decl_explicit (BUILT_IN_TM_LOAD_1);
+   attrs_load = DECL_ATTRIBUTES (decl);
+   attrs_type_load = TYPE_ATTRIBUTES (TREE_TYPE (decl));
+   /* Use whatever attributes a normal TM store has.  */
+   decl = builtin_decl_explicit (BUILT_IN_TM_STORE_1);
+   attrs_store = DECL_ATTRIBUTES (decl);
+   attrs_type_store = TYPE_ATTRIBUTES (TREE_TYPE (decl));
+   /* Use whatever attributes a normal TM log has.  */
+   decl = builtin_decl_explicit (BUILT_IN_TM_LOG);
+   attrs_log = DECL_ATTRIBUTES (decl);
+   attrs_type_log = TYPE_ATTRIBUTES (TREE_TYPE (decl));
+ 
+   for (i = 0, d = bdesc_tm;
+        i < ARRAY_SIZE (bdesc_tm);
+        i++, d++)
+     {
+       if ((d->mask & ix86_isa_flags) != 0
+ 	  || ((d->mask & OPTION_MASK_ISA_MMX) != 0 && TARGET_MMX_WITH_SSE)
+ 	  || (lang_hooks.builtin_function
+ 	      == lang_hooks.builtin_function_ext_scope))
+ 	{
+ 	  tree type, attrs, attrs_type;
+ 	  enum built_in_function code = (enum built_in_function) d->code;
+ 
+ 	  ftype = (enum ix86_builtin_func_type) d->flag;
+ 	  type = ix86_get_builtin_func_type (ftype);
+ 
+ 	  if (BUILTIN_TM_LOAD_P (code))
+ 	    {
+ 	      attrs = attrs_load;
+ 	      attrs_type = attrs_type_load;
+ 	    }
+ 	  else if (BUILTIN_TM_STORE_P (code))
+ 	    {
+ 	      attrs = attrs_store;
+ 	      attrs_type = attrs_type_store;
+ 	    }
+ 	  else
+ 	    {
+ 	      attrs = attrs_log;
+ 	      attrs_type = attrs_type_log;
+ 	    }
+ 	  decl = add_builtin_function (d->name, type, code, BUILT_IN_NORMAL,
+ 				       /* The builtin without the prefix for
+ 					  calling it directly.  */
+ 				       d->name + strlen ("__builtin_"),
+ 				       attrs);
+ 	  /* add_builtin_function() will set the DECL_ATTRIBUTES, now
+ 	     set the TYPE_ATTRIBUTES.  */
+ 	  decl_attributes (&TREE_TYPE (decl), attrs_type, ATTR_FLAG_BUILT_IN);
+ 
+ 	  set_builtin_decl (code, decl, false);
+ 	}
+     }
+ }
+ 
+ /* Set up all the MMX/SSE builtins, even builtins for instructions that are not
+    in the current target ISA to allow the user to compile particular modules
+    with different target specific options that differ from the command line
+    options.  */
+ static void
+ ix86_init_mmx_sse_builtins (void)
+ {
+   const struct builtin_description * d;
+   enum ix86_builtin_func_type ftype;
+   size_t i;
+ 
+   /* Add all special builtins with variable number of operands.  */
+   for (i = 0, d = bdesc_special_args;
+        i < ARRAY_SIZE (bdesc_special_args);
+        i++, d++)
+     {
+       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST, i);
+       if (d->name == 0)
+ 	continue;
+ 
+       ftype = (enum ix86_builtin_func_type) d->flag;
+       def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
+     }
+   BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST,
+ 		 IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
+ 		 ARRAY_SIZE (bdesc_special_args) - 1);
+ 
+   /* Add all builtins with variable number of operands.  */
+   for (i = 0, d = bdesc_args;
+        i < ARRAY_SIZE (bdesc_args);
+        i++, d++)
+     {
+       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ARGS_FIRST, i);
+       if (d->name == 0)
+ 	continue;
+ 
+       ftype = (enum ix86_builtin_func_type) d->flag;
+       def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
+     }
+   BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_LAST,
+ 		 IX86_BUILTIN__BDESC_ARGS_FIRST,
+ 		 ARRAY_SIZE (bdesc_args) - 1);
+ 
+   /* Add all builtins with rounding.  */
+   for (i = 0, d = bdesc_round_args;
+        i < ARRAY_SIZE (bdesc_round_args);
+        i++, d++)
+     {
+       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST, i);
+       if (d->name == 0)
+ 	continue;
+ 
+       ftype = (enum ix86_builtin_func_type) d->flag;
+       def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
+     }
+   BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_LAST,
+ 		 IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
+ 		 ARRAY_SIZE (bdesc_round_args) - 1);
+ 
+   /* pcmpestr[im] insns.  */
+   for (i = 0, d = bdesc_pcmpestr;
+        i < ARRAY_SIZE (bdesc_pcmpestr);
+        i++, d++)
+     {
+       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPESTR_FIRST, i);
+       if (d->code == IX86_BUILTIN_PCMPESTRM128)
+ 	ftype = V16QI_FTYPE_V16QI_INT_V16QI_INT_INT;
+       else
+ 	ftype = INT_FTYPE_V16QI_INT_V16QI_INT_INT;
+       def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
+     }
+   BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_LAST,
+ 		 IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
+ 		 ARRAY_SIZE (bdesc_pcmpestr) - 1);
+ 
+   /* pcmpistr[im] insns.  */
+   for (i = 0, d = bdesc_pcmpistr;
+        i < ARRAY_SIZE (bdesc_pcmpistr);
+        i++, d++)
+     {
+       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPISTR_FIRST, i);
+       if (d->code == IX86_BUILTIN_PCMPISTRM128)
+ 	ftype = V16QI_FTYPE_V16QI_V16QI_INT;
+       else
+ 	ftype = INT_FTYPE_V16QI_V16QI_INT;
+       def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
+     }
+   BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_LAST,
+ 		 IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
+ 		 ARRAY_SIZE (bdesc_pcmpistr) - 1);
+ 
+   /* comi/ucomi insns.  */
+   for (i = 0, d = bdesc_comi; i < ARRAY_SIZE (bdesc_comi); i++, d++)
+     {
+       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_COMI_FIRST, i);
+       if (d->mask == OPTION_MASK_ISA_SSE2)
+ 	ftype = INT_FTYPE_V2DF_V2DF;
+       else
+ 	ftype = INT_FTYPE_V4SF_V4SF;
+       def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
+     }
+   BDESC_VERIFYS (IX86_BUILTIN__BDESC_COMI_LAST,
+ 		 IX86_BUILTIN__BDESC_COMI_FIRST,
+ 		 ARRAY_SIZE (bdesc_comi) - 1);
+ 
+   /* SSE */
+   def_builtin (OPTION_MASK_ISA_SSE, 0,  "__builtin_ia32_ldmxcsr",
+ 	       VOID_FTYPE_UNSIGNED, IX86_BUILTIN_LDMXCSR);
+   def_builtin_pure (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_stmxcsr",
+ 		    UNSIGNED_FTYPE_VOID, IX86_BUILTIN_STMXCSR);
+ 
+   /* SSE or 3DNow!A */
+   def_builtin (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
+ 	       /* As it uses V4HImode, we have to require -mmmx too.  */
+ 	       | OPTION_MASK_ISA_MMX, 0,
+ 	       "__builtin_ia32_maskmovq", VOID_FTYPE_V8QI_V8QI_PCHAR,
+ 	       IX86_BUILTIN_MASKMOVQ);
+ 
+   /* SSE2 */
+   def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_maskmovdqu",
+ 	       VOID_FTYPE_V16QI_V16QI_PCHAR, IX86_BUILTIN_MASKMOVDQU);
+ 
+   def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_clflush",
+ 	       VOID_FTYPE_PCVOID, IX86_BUILTIN_CLFLUSH);
+   x86_mfence = def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_mfence",
+ 			    VOID_FTYPE_VOID, IX86_BUILTIN_MFENCE);
+ 
+   /* SSE3.  */
+   def_builtin (OPTION_MASK_ISA_SSE3, 0, "__builtin_ia32_monitor",
+ 	       VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITOR);
+   def_builtin (OPTION_MASK_ISA_SSE3, 0, "__builtin_ia32_mwait",
+ 	       VOID_FTYPE_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAIT);
+ 
+   /* AES */
+   def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
+ 		     "__builtin_ia32_aesenc128",
+ 		     V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENC128);
+   def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
+ 		     "__builtin_ia32_aesenclast128",
+ 		     V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENCLAST128);
+   def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
+ 		     "__builtin_ia32_aesdec128",
+ 		     V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDEC128);
+   def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
+ 		     "__builtin_ia32_aesdeclast128",
+ 		     V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDECLAST128);
+   def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
+ 		     "__builtin_ia32_aesimc128",
+ 		     V2DI_FTYPE_V2DI, IX86_BUILTIN_AESIMC128);
+   def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
+ 		     "__builtin_ia32_aeskeygenassist128",
+ 		     V2DI_FTYPE_V2DI_INT, IX86_BUILTIN_AESKEYGENASSIST128);
+ 
+   /* PCLMUL */
+   def_builtin_const (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2, 0,
+ 		     "__builtin_ia32_pclmulqdq128",
+ 		     V2DI_FTYPE_V2DI_V2DI_INT, IX86_BUILTIN_PCLMULQDQ128);
+ 
+   /* RDRND */
+   def_builtin (OPTION_MASK_ISA_RDRND, 0, "__builtin_ia32_rdrand16_step",
+ 	       INT_FTYPE_PUSHORT, IX86_BUILTIN_RDRAND16_STEP);
+   def_builtin (OPTION_MASK_ISA_RDRND, 0,  "__builtin_ia32_rdrand32_step",
+ 	       INT_FTYPE_PUNSIGNED, IX86_BUILTIN_RDRAND32_STEP);
+   def_builtin (OPTION_MASK_ISA_RDRND | OPTION_MASK_ISA_64BIT, 0,
+ 	       "__builtin_ia32_rdrand64_step", INT_FTYPE_PULONGLONG,
+ 	       IX86_BUILTIN_RDRAND64_STEP);
+ 
+   /* AVX2 */
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv2df",
+ 		    V2DF_FTYPE_V2DF_PCDOUBLE_V4SI_V2DF_INT,
+ 		    IX86_BUILTIN_GATHERSIV2DF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4df",
+ 		    V4DF_FTYPE_V4DF_PCDOUBLE_V4SI_V4DF_INT,
+ 		    IX86_BUILTIN_GATHERSIV4DF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv2df",
+ 		    V2DF_FTYPE_V2DF_PCDOUBLE_V2DI_V2DF_INT,
+ 		    IX86_BUILTIN_GATHERDIV2DF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4df",
+ 		    V4DF_FTYPE_V4DF_PCDOUBLE_V4DI_V4DF_INT,
+ 		    IX86_BUILTIN_GATHERDIV4DF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4sf",
+ 		    V4SF_FTYPE_V4SF_PCFLOAT_V4SI_V4SF_INT,
+ 		    IX86_BUILTIN_GATHERSIV4SF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv8sf",
+ 		    V8SF_FTYPE_V8SF_PCFLOAT_V8SI_V8SF_INT,
+ 		    IX86_BUILTIN_GATHERSIV8SF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4sf",
+ 		    V4SF_FTYPE_V4SF_PCFLOAT_V2DI_V4SF_INT,
+ 		    IX86_BUILTIN_GATHERDIV4SF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4sf256",
+ 		    V4SF_FTYPE_V4SF_PCFLOAT_V4DI_V4SF_INT,
+ 		    IX86_BUILTIN_GATHERDIV8SF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv2di",
+ 		    V2DI_FTYPE_V2DI_PCINT64_V4SI_V2DI_INT,
+ 		    IX86_BUILTIN_GATHERSIV2DI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4di",
+ 		    V4DI_FTYPE_V4DI_PCINT64_V4SI_V4DI_INT,
+ 		    IX86_BUILTIN_GATHERSIV4DI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv2di",
+ 		    V2DI_FTYPE_V2DI_PCINT64_V2DI_V2DI_INT,
+ 		    IX86_BUILTIN_GATHERDIV2DI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4di",
+ 		    V4DI_FTYPE_V4DI_PCINT64_V4DI_V4DI_INT,
+ 		    IX86_BUILTIN_GATHERDIV4DI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4si",
+ 		    V4SI_FTYPE_V4SI_PCINT_V4SI_V4SI_INT,
+ 		    IX86_BUILTIN_GATHERSIV4SI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv8si",
+ 		    V8SI_FTYPE_V8SI_PCINT_V8SI_V8SI_INT,
+ 		    IX86_BUILTIN_GATHERSIV8SI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4si",
+ 		    V4SI_FTYPE_V4SI_PCINT_V2DI_V4SI_INT,
+ 		    IX86_BUILTIN_GATHERDIV4SI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4si256",
+ 		    V4SI_FTYPE_V4SI_PCINT_V4DI_V4SI_INT,
+ 		    IX86_BUILTIN_GATHERDIV8SI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltsiv4df ",
+ 		    V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_V4DF_INT,
+ 		    IX86_BUILTIN_GATHERALTSIV4DF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltdiv8sf ",
+ 		    V8SF_FTYPE_V8SF_PCFLOAT_V4DI_V8SF_INT,
+ 		    IX86_BUILTIN_GATHERALTDIV8SF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltsiv4di ",
+ 		    V4DI_FTYPE_V4DI_PCINT64_V8SI_V4DI_INT,
+ 		    IX86_BUILTIN_GATHERALTSIV4DI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltdiv8si ",
+ 		    V8SI_FTYPE_V8SI_PCINT_V4DI_V8SI_INT,
+ 		    IX86_BUILTIN_GATHERALTDIV8SI);
+ 
+   /* AVX512F */
+   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv16sf",
+ 		    V16SF_FTYPE_V16SF_PCVOID_V16SI_HI_INT,
+ 		    IX86_BUILTIN_GATHER3SIV16SF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv8df",
+ 		    V8DF_FTYPE_V8DF_PCVOID_V8SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3SIV8DF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv16sf",
+ 		    V8SF_FTYPE_V8SF_PCVOID_V8DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3DIV16SF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv8df",
+ 		    V8DF_FTYPE_V8DF_PCVOID_V8DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3DIV8DF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv16si",
+ 		    V16SI_FTYPE_V16SI_PCVOID_V16SI_HI_INT,
+ 		    IX86_BUILTIN_GATHER3SIV16SI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv8di",
+ 		    V8DI_FTYPE_V8DI_PCVOID_V8SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3SIV8DI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv16si",
+ 		    V8SI_FTYPE_V8SI_PCVOID_V8DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3DIV16SI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv8di",
+ 		    V8DI_FTYPE_V8DI_PCVOID_V8DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3DIV8DI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altsiv8df ",
+ 		    V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3ALTSIV8DF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altdiv16sf ",
+ 		    V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT,
+ 		    IX86_BUILTIN_GATHER3ALTDIV16SF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altsiv8di ",
+ 		    V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3ALTSIV8DI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altdiv16si ",
+ 		    V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT,
+ 		    IX86_BUILTIN_GATHER3ALTDIV16SI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv16sf",
+ 	       VOID_FTYPE_PVOID_HI_V16SI_V16SF_INT,
+ 	       IX86_BUILTIN_SCATTERSIV16SF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv8df",
+ 	       VOID_FTYPE_PVOID_QI_V8SI_V8DF_INT,
+ 	       IX86_BUILTIN_SCATTERSIV8DF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv16sf",
+ 	       VOID_FTYPE_PVOID_QI_V8DI_V8SF_INT,
+ 	       IX86_BUILTIN_SCATTERDIV16SF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv8df",
+ 	       VOID_FTYPE_PVOID_QI_V8DI_V8DF_INT,
+ 	       IX86_BUILTIN_SCATTERDIV8DF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv16si",
+ 	       VOID_FTYPE_PVOID_HI_V16SI_V16SI_INT,
+ 	       IX86_BUILTIN_SCATTERSIV16SI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv8di",
+ 	       VOID_FTYPE_PVOID_QI_V8SI_V8DI_INT,
+ 	       IX86_BUILTIN_SCATTERSIV8DI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv16si",
+ 	       VOID_FTYPE_PVOID_QI_V8DI_V8SI_INT,
+ 	       IX86_BUILTIN_SCATTERDIV16SI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv8di",
+ 	       VOID_FTYPE_PVOID_QI_V8DI_V8DI_INT,
+ 	       IX86_BUILTIN_SCATTERDIV8DI);
+ 
+   /* AVX512VL */
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv2df",
+ 		    V2DF_FTYPE_V2DF_PCVOID_V4SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3SIV2DF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4df",
+ 		    V4DF_FTYPE_V4DF_PCVOID_V4SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3SIV4DF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div2df",
+ 		    V2DF_FTYPE_V2DF_PCVOID_V2DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3DIV2DF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4df",
+ 		    V4DF_FTYPE_V4DF_PCVOID_V4DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3DIV4DF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4sf",
+ 		    V4SF_FTYPE_V4SF_PCVOID_V4SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3SIV4SF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv8sf",
+ 		    V8SF_FTYPE_V8SF_PCVOID_V8SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3SIV8SF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4sf",
+ 		    V4SF_FTYPE_V4SF_PCVOID_V2DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3DIV4SF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div8sf",
+ 		    V4SF_FTYPE_V4SF_PCVOID_V4DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3DIV8SF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv2di",
+ 		    V2DI_FTYPE_V2DI_PCVOID_V4SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3SIV2DI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4di",
+ 		    V4DI_FTYPE_V4DI_PCVOID_V4SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3SIV4DI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div2di",
+ 		    V2DI_FTYPE_V2DI_PCVOID_V2DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3DIV2DI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4di",
+ 		    V4DI_FTYPE_V4DI_PCVOID_V4DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3DIV4DI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4si",
+ 		    V4SI_FTYPE_V4SI_PCVOID_V4SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3SIV4SI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv8si",
+ 		    V8SI_FTYPE_V8SI_PCVOID_V8SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3SIV8SI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4si",
+ 		    V4SI_FTYPE_V4SI_PCVOID_V2DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3DIV4SI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div8si",
+ 		    V4SI_FTYPE_V4SI_PCVOID_V4DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3DIV8SI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altsiv4df ",
+ 		    V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3ALTSIV4DF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altdiv8sf ",
+ 		    V8SF_FTYPE_V8SF_PCFLOAT_V4DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3ALTDIV8SF);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altsiv4di ",
+ 		    V4DI_FTYPE_V4DI_PCINT64_V8SI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3ALTSIV4DI);
+ 
+   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altdiv8si ",
+ 		    V8SI_FTYPE_V8SI_PCINT_V4DI_QI_INT,
+ 		    IX86_BUILTIN_GATHER3ALTDIV8SI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv8sf",
+ 	       VOID_FTYPE_PVOID_QI_V8SI_V8SF_INT,
+ 	       IX86_BUILTIN_SCATTERSIV8SF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4sf",
+ 	       VOID_FTYPE_PVOID_QI_V4SI_V4SF_INT,
+ 	       IX86_BUILTIN_SCATTERSIV4SF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4df",
+ 	       VOID_FTYPE_PVOID_QI_V4SI_V4DF_INT,
+ 	       IX86_BUILTIN_SCATTERSIV4DF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv2df",
+ 	       VOID_FTYPE_PVOID_QI_V4SI_V2DF_INT,
+ 	       IX86_BUILTIN_SCATTERSIV2DF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv8sf",
+ 	       VOID_FTYPE_PVOID_QI_V4DI_V4SF_INT,
+ 	       IX86_BUILTIN_SCATTERDIV8SF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4sf",
+ 	       VOID_FTYPE_PVOID_QI_V2DI_V4SF_INT,
+ 	       IX86_BUILTIN_SCATTERDIV4SF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4df",
+ 	       VOID_FTYPE_PVOID_QI_V4DI_V4DF_INT,
+ 	       IX86_BUILTIN_SCATTERDIV4DF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv2df",
+ 	       VOID_FTYPE_PVOID_QI_V2DI_V2DF_INT,
+ 	       IX86_BUILTIN_SCATTERDIV2DF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv8si",
+ 	       VOID_FTYPE_PVOID_QI_V8SI_V8SI_INT,
+ 	       IX86_BUILTIN_SCATTERSIV8SI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4si",
+ 	       VOID_FTYPE_PVOID_QI_V4SI_V4SI_INT,
+ 	       IX86_BUILTIN_SCATTERSIV4SI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4di",
+ 	       VOID_FTYPE_PVOID_QI_V4SI_V4DI_INT,
+ 	       IX86_BUILTIN_SCATTERSIV4DI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv2di",
+ 	       VOID_FTYPE_PVOID_QI_V4SI_V2DI_INT,
+ 	       IX86_BUILTIN_SCATTERSIV2DI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv8si",
+ 	       VOID_FTYPE_PVOID_QI_V4DI_V4SI_INT,
+ 	       IX86_BUILTIN_SCATTERDIV8SI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4si",
+ 	       VOID_FTYPE_PVOID_QI_V2DI_V4SI_INT,
+ 	       IX86_BUILTIN_SCATTERDIV4SI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4di",
+ 	       VOID_FTYPE_PVOID_QI_V4DI_V4DI_INT,
+ 	       IX86_BUILTIN_SCATTERDIV4DI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv2di",
+ 	       VOID_FTYPE_PVOID_QI_V2DI_V2DI_INT,
+ 	       IX86_BUILTIN_SCATTERDIV2DI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltsiv8df ",
+ 	       VOID_FTYPE_PDOUBLE_QI_V16SI_V8DF_INT,
+ 	       IX86_BUILTIN_SCATTERALTSIV8DF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltdiv16sf ",
+ 	       VOID_FTYPE_PFLOAT_HI_V8DI_V16SF_INT,
+ 	       IX86_BUILTIN_SCATTERALTDIV16SF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltsiv8di ",
+ 	       VOID_FTYPE_PLONGLONG_QI_V16SI_V8DI_INT,
+ 	       IX86_BUILTIN_SCATTERALTSIV8DI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltdiv16si ",
+ 	       VOID_FTYPE_PINT_HI_V8DI_V16SI_INT,
+ 	       IX86_BUILTIN_SCATTERALTDIV16SI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv4df ",
+ 	       VOID_FTYPE_PDOUBLE_QI_V8SI_V4DF_INT,
+ 	       IX86_BUILTIN_SCATTERALTSIV4DF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv8sf ",
+ 	       VOID_FTYPE_PFLOAT_QI_V4DI_V8SF_INT,
+ 	       IX86_BUILTIN_SCATTERALTDIV8SF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv4di ",
+ 	       VOID_FTYPE_PLONGLONG_QI_V8SI_V4DI_INT,
+ 	       IX86_BUILTIN_SCATTERALTSIV4DI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv8si ",
+ 	       VOID_FTYPE_PINT_QI_V4DI_V8SI_INT,
+ 	       IX86_BUILTIN_SCATTERALTDIV8SI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv2df ",
+ 	       VOID_FTYPE_PDOUBLE_QI_V4SI_V2DF_INT,
+ 	       IX86_BUILTIN_SCATTERALTSIV2DF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv4sf ",
+ 	       VOID_FTYPE_PFLOAT_QI_V2DI_V4SF_INT,
+ 	       IX86_BUILTIN_SCATTERALTDIV4SF);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv2di ",
+ 	       VOID_FTYPE_PLONGLONG_QI_V4SI_V2DI_INT,
+ 	       IX86_BUILTIN_SCATTERALTSIV2DI);
+ 
+   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv4si ",
+ 	       VOID_FTYPE_PINT_QI_V2DI_V4SI_INT,
+ 	       IX86_BUILTIN_SCATTERALTDIV4SI);
+ 
+   /* AVX512PF */
+   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfdpd",
+ 	       VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
+ 	       IX86_BUILTIN_GATHERPFDPD);
+   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfdps",
+ 	       VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
+ 	       IX86_BUILTIN_GATHERPFDPS);
+   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfqpd",
+ 	       VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
+ 	       IX86_BUILTIN_GATHERPFQPD);
+   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfqps",
+ 	       VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
+ 	       IX86_BUILTIN_GATHERPFQPS);
+   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfdpd",
+ 	       VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
+ 	       IX86_BUILTIN_SCATTERPFDPD);
+   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfdps",
+ 	       VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
+ 	       IX86_BUILTIN_SCATTERPFDPS);
+   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfqpd",
+ 	       VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
+ 	       IX86_BUILTIN_SCATTERPFQPD);
+   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfqps",
+ 	       VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
+ 	       IX86_BUILTIN_SCATTERPFQPS);
+ 
+   /* SHA */
+   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1msg1",
+ 		     V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1MSG1);
+   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1msg2",
+ 		     V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1MSG2);
+   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1nexte",
+ 		     V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1NEXTE);
+   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1rnds4",
+ 		     V4SI_FTYPE_V4SI_V4SI_INT, IX86_BUILTIN_SHA1RNDS4);
+   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256msg1",
+ 		     V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA256MSG1);
+   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256msg2",
+ 		     V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA256MSG2);
+   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256rnds2",
+ 		     V4SI_FTYPE_V4SI_V4SI_V4SI, IX86_BUILTIN_SHA256RNDS2);
+ 
+   /* RTM.  */
+   def_builtin (OPTION_MASK_ISA_RTM, 0, "__builtin_ia32_xabort",
+ 	       VOID_FTYPE_UNSIGNED, IX86_BUILTIN_XABORT);
+ 
+   /* MMX access to the vec_init patterns.  */
+   def_builtin_const (OPTION_MASK_ISA_MMX, 0,
+ 		     "__builtin_ia32_vec_init_v2si",
+ 		     V2SI_FTYPE_INT_INT, IX86_BUILTIN_VEC_INIT_V2SI);
+ 
+   def_builtin_const (OPTION_MASK_ISA_MMX, 0,
+ 		     "__builtin_ia32_vec_init_v4hi",
+ 		     V4HI_FTYPE_HI_HI_HI_HI,
+ 		     IX86_BUILTIN_VEC_INIT_V4HI);
+ 
+   def_builtin_const (OPTION_MASK_ISA_MMX, 0,
+ 		     "__builtin_ia32_vec_init_v8qi",
+ 		     V8QI_FTYPE_QI_QI_QI_QI_QI_QI_QI_QI,
+ 		     IX86_BUILTIN_VEC_INIT_V8QI);
+ 
+   /* Access to the vec_extract patterns.  */
+   def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v2df",
+ 		     DOUBLE_FTYPE_V2DF_INT, IX86_BUILTIN_VEC_EXT_V2DF);
+   def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v2di",
+ 		     DI_FTYPE_V2DI_INT, IX86_BUILTIN_VEC_EXT_V2DI);
+   def_builtin_const (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_vec_ext_v4sf",
+ 		     FLOAT_FTYPE_V4SF_INT, IX86_BUILTIN_VEC_EXT_V4SF);
+   def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v4si",
+ 		     SI_FTYPE_V4SI_INT, IX86_BUILTIN_VEC_EXT_V4SI);
+   def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v8hi",
+ 		     HI_FTYPE_V8HI_INT, IX86_BUILTIN_VEC_EXT_V8HI);
+ 
+   def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
+ 		     /* As it uses V4HImode, we have to require -mmmx too.  */
+ 		     | OPTION_MASK_ISA_MMX, 0,
+ 		     "__builtin_ia32_vec_ext_v4hi",
+ 		     HI_FTYPE_V4HI_INT, IX86_BUILTIN_VEC_EXT_V4HI);
+ 
+   def_builtin_const (OPTION_MASK_ISA_MMX, 0,
+ 		     "__builtin_ia32_vec_ext_v2si",
+ 		     SI_FTYPE_V2SI_INT, IX86_BUILTIN_VEC_EXT_V2SI);
+ 
+   def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v16qi",
+ 		     QI_FTYPE_V16QI_INT, IX86_BUILTIN_VEC_EXT_V16QI);
+ 
+   /* Access to the vec_set patterns.  */
+   def_builtin_const (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_64BIT, 0,
+ 		     "__builtin_ia32_vec_set_v2di",
+ 		     V2DI_FTYPE_V2DI_DI_INT, IX86_BUILTIN_VEC_SET_V2DI);
+ 
+   def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v4sf",
+ 		     V4SF_FTYPE_V4SF_FLOAT_INT, IX86_BUILTIN_VEC_SET_V4SF);
+ 
+   def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v4si",
+ 		     V4SI_FTYPE_V4SI_SI_INT, IX86_BUILTIN_VEC_SET_V4SI);
+ 
+   def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_set_v8hi",
+ 		     V8HI_FTYPE_V8HI_HI_INT, IX86_BUILTIN_VEC_SET_V8HI);
+ 
+   def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
+ 		     /* As it uses V4HImode, we have to require -mmmx too.  */
+ 		     | OPTION_MASK_ISA_MMX, 0,
+ 		     "__builtin_ia32_vec_set_v4hi",
+ 		     V4HI_FTYPE_V4HI_HI_INT, IX86_BUILTIN_VEC_SET_V4HI);
+ 
+   def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v16qi",
+ 		     V16QI_FTYPE_V16QI_QI_INT, IX86_BUILTIN_VEC_SET_V16QI);
+ 
+   /* RDSEED */
+   def_builtin (OPTION_MASK_ISA_RDSEED, 0, "__builtin_ia32_rdseed_hi_step",
+ 	       INT_FTYPE_PUSHORT, IX86_BUILTIN_RDSEED16_STEP);
+   def_builtin (OPTION_MASK_ISA_RDSEED, 0, "__builtin_ia32_rdseed_si_step",
+ 	       INT_FTYPE_PUNSIGNED, IX86_BUILTIN_RDSEED32_STEP);
+   def_builtin (OPTION_MASK_ISA_RDSEED | OPTION_MASK_ISA_64BIT, 0,
+ 	       "__builtin_ia32_rdseed_di_step",
+ 	       INT_FTYPE_PULONGLONG, IX86_BUILTIN_RDSEED64_STEP);
+ 
+   /* ADCX */
+   def_builtin (0, 0, "__builtin_ia32_addcarryx_u32",
+ 	       UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, IX86_BUILTIN_ADDCARRYX32);
+   def_builtin (OPTION_MASK_ISA_64BIT, 0,
+ 	       "__builtin_ia32_addcarryx_u64",
+ 	       UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
+ 	       IX86_BUILTIN_ADDCARRYX64);
+ 
+   /* SBB */
+   def_builtin (0, 0, "__builtin_ia32_sbb_u32",
+ 	       UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, IX86_BUILTIN_SBB32);
+   def_builtin (OPTION_MASK_ISA_64BIT, 0,
+ 	       "__builtin_ia32_sbb_u64",
+ 	       UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
+ 	       IX86_BUILTIN_SBB64);
+ 
+   /* Read/write FLAGS.  */
+   if (TARGET_64BIT)
+     {
+       def_builtin (OPTION_MASK_ISA_64BIT, 0, "__builtin_ia32_readeflags_u64",
+ 		   UINT64_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS);
+       def_builtin (OPTION_MASK_ISA_64BIT, 0, "__builtin_ia32_writeeflags_u64",
+ 		   VOID_FTYPE_UINT64, IX86_BUILTIN_WRITE_FLAGS);
+     }
+   else
+     {
+       def_builtin (0, 0, "__builtin_ia32_readeflags_u32",
+ 		   UNSIGNED_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS);
+       def_builtin (0, 0, "__builtin_ia32_writeeflags_u32",
+ 		   VOID_FTYPE_UNSIGNED, IX86_BUILTIN_WRITE_FLAGS);
+     }
+ 
+   /* CLFLUSHOPT.  */
+   def_builtin (OPTION_MASK_ISA_CLFLUSHOPT, 0, "__builtin_ia32_clflushopt",
+ 	       VOID_FTYPE_PCVOID, IX86_BUILTIN_CLFLUSHOPT);
+ 
+   /* CLWB.  */
+   def_builtin (OPTION_MASK_ISA_CLWB, 0, "__builtin_ia32_clwb",
+ 	       VOID_FTYPE_PCVOID, IX86_BUILTIN_CLWB);
+ 
+   /* MONITORX and MWAITX.  */
+   def_builtin (0, OPTION_MASK_ISA2_MWAITX, "__builtin_ia32_monitorx",
+ 		VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITORX);
+   def_builtin (0, OPTION_MASK_ISA2_MWAITX, "__builtin_ia32_mwaitx",
+ 		VOID_FTYPE_UNSIGNED_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAITX);
+ 
+   /* CLZERO.  */
+   def_builtin (0, OPTION_MASK_ISA2_CLZERO, "__builtin_ia32_clzero",
+ 		VOID_FTYPE_PCVOID, IX86_BUILTIN_CLZERO);
+ 
+   /* WAITPKG.  */
+   def_builtin (0, OPTION_MASK_ISA2_WAITPKG, "__builtin_ia32_umonitor",
+ 	       VOID_FTYPE_PVOID, IX86_BUILTIN_UMONITOR);
+   def_builtin (0, OPTION_MASK_ISA2_WAITPKG, "__builtin_ia32_umwait",
+ 	       UINT8_FTYPE_UNSIGNED_UINT64, IX86_BUILTIN_UMWAIT);
+   def_builtin (0, OPTION_MASK_ISA2_WAITPKG, "__builtin_ia32_tpause",
+ 	       UINT8_FTYPE_UNSIGNED_UINT64, IX86_BUILTIN_TPAUSE);
+ 
+   /* CLDEMOTE.  */
+   def_builtin (0, OPTION_MASK_ISA2_CLDEMOTE, "__builtin_ia32_cldemote",
+ 	       VOID_FTYPE_PCVOID, IX86_BUILTIN_CLDEMOTE);
+ 
+   /* Add FMA4 multi-arg argument instructions */
+   for (i = 0, d = bdesc_multi_arg; i < ARRAY_SIZE (bdesc_multi_arg); i++, d++)
+     {
+       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_MULTI_ARG_FIRST, i);
+       if (d->name == 0)
+ 	continue;
+ 
+       ftype = (enum ix86_builtin_func_type) d->flag;
+       def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
+     }
+   BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_LAST,
+ 		 IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
+ 		 ARRAY_SIZE (bdesc_multi_arg) - 1);
+ 
+   /* Add CET inrinsics.  */
+   for (i = 0, d = bdesc_cet; i < ARRAY_SIZE (bdesc_cet); i++, d++)
+     {
+       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_CET_FIRST, i);
+       if (d->name == 0)
+ 	continue;
+ 
+       ftype = (enum ix86_builtin_func_type) d->flag;
+       def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
+     }
+   BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_LAST,
+ 		 IX86_BUILTIN__BDESC_CET_FIRST,
+ 		 ARRAY_SIZE (bdesc_cet) - 1);
+ 
+   for (i = 0, d = bdesc_cet_rdssp;
+        i < ARRAY_SIZE (bdesc_cet_rdssp);
+        i++, d++)
+     {
+       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_CET_NORMAL_FIRST, i);
+       if (d->name == 0)
+ 	continue;
+ 
+       ftype = (enum ix86_builtin_func_type) d->flag;
+       def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
+     }
+   BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_NORMAL_LAST,
+ 		 IX86_BUILTIN__BDESC_CET_NORMAL_FIRST,
+ 		 ARRAY_SIZE (bdesc_cet_rdssp) - 1);
+ }
+ 
+ #undef BDESC_VERIFY
+ #undef BDESC_VERIFYS
+ 
+ /* Make builtins to detect cpu type and features supported.  NAME is
+    the builtin name, CODE is the builtin code, and FTYPE is the function
+    type of the builtin.  */
+ 
+ static void
+ make_cpu_type_builtin (const char* name, int code,
+ 		       enum ix86_builtin_func_type ftype, bool is_const)
+ {
+   tree decl;
+   tree type;
+ 
+   type = ix86_get_builtin_func_type (ftype);
+   decl = add_builtin_function (name, type, code, BUILT_IN_MD,
+ 			       NULL, NULL_TREE);
+   gcc_assert (decl != NULL_TREE);
+   ix86_builtins[(int) code] = decl;
+   TREE_READONLY (decl) = is_const;
+ }
+ 
+ /* Make builtins to get CPU type and features supported.  The created
+    builtins are :
+ 
+    __builtin_cpu_init (), to detect cpu type and features,
+    __builtin_cpu_is ("<CPUNAME>"), to check if cpu is of type <CPUNAME>,
+    __builtin_cpu_supports ("<FEATURE>"), to check if cpu supports <FEATURE>
+    */
+ 
+ static void
+ ix86_init_platform_type_builtins (void)
+ {
+   make_cpu_type_builtin ("__builtin_cpu_init", IX86_BUILTIN_CPU_INIT,
+ 			 INT_FTYPE_VOID, false);
+   make_cpu_type_builtin ("__builtin_cpu_is", IX86_BUILTIN_CPU_IS,
+ 			 INT_FTYPE_PCCHAR, true);
+   make_cpu_type_builtin ("__builtin_cpu_supports", IX86_BUILTIN_CPU_SUPPORTS,
+ 			 INT_FTYPE_PCCHAR, true);
+ }
+ 
+ /* Internal method for ix86_init_builtins.  */
+ 
+ static void
+ ix86_init_builtins_va_builtins_abi (void)
+ {
+   tree ms_va_ref, sysv_va_ref;
+   tree fnvoid_va_end_ms, fnvoid_va_end_sysv;
+   tree fnvoid_va_start_ms, fnvoid_va_start_sysv;
+   tree fnvoid_va_copy_ms, fnvoid_va_copy_sysv;
+   tree fnattr_ms = NULL_TREE, fnattr_sysv = NULL_TREE;
+ 
+   if (!TARGET_64BIT)
+     return;
+   fnattr_ms = build_tree_list (get_identifier ("ms_abi"), NULL_TREE);
+   fnattr_sysv = build_tree_list (get_identifier ("sysv_abi"), NULL_TREE);
+   ms_va_ref = build_reference_type (ms_va_list_type_node);
+   sysv_va_ref = build_pointer_type (TREE_TYPE (sysv_va_list_type_node));
+ 
+   fnvoid_va_end_ms = build_function_type_list (void_type_node, ms_va_ref,
+ 					       NULL_TREE);
+   fnvoid_va_start_ms
+     = build_varargs_function_type_list (void_type_node, ms_va_ref, NULL_TREE);
+   fnvoid_va_end_sysv
+     = build_function_type_list (void_type_node, sysv_va_ref, NULL_TREE);
+   fnvoid_va_start_sysv
+     = build_varargs_function_type_list (void_type_node, sysv_va_ref,
+ 					NULL_TREE);
+   fnvoid_va_copy_ms
+     = build_function_type_list (void_type_node, ms_va_ref,
+ 				ms_va_list_type_node, NULL_TREE);
+   fnvoid_va_copy_sysv
+     = build_function_type_list (void_type_node, sysv_va_ref,
+ 				sysv_va_ref, NULL_TREE);
+ 
+   add_builtin_function ("__builtin_ms_va_start", fnvoid_va_start_ms,
+   			BUILT_IN_VA_START, BUILT_IN_NORMAL, NULL, fnattr_ms);
+   add_builtin_function ("__builtin_ms_va_end", fnvoid_va_end_ms,
+   			BUILT_IN_VA_END, BUILT_IN_NORMAL, NULL, fnattr_ms);
+   add_builtin_function ("__builtin_ms_va_copy", fnvoid_va_copy_ms,
+ 			BUILT_IN_VA_COPY, BUILT_IN_NORMAL, NULL, fnattr_ms);
+   add_builtin_function ("__builtin_sysv_va_start", fnvoid_va_start_sysv,
+   			BUILT_IN_VA_START, BUILT_IN_NORMAL, NULL, fnattr_sysv);
+   add_builtin_function ("__builtin_sysv_va_end", fnvoid_va_end_sysv,
+   			BUILT_IN_VA_END, BUILT_IN_NORMAL, NULL, fnattr_sysv);
+   add_builtin_function ("__builtin_sysv_va_copy", fnvoid_va_copy_sysv,
+ 			BUILT_IN_VA_COPY, BUILT_IN_NORMAL, NULL, fnattr_sysv);
+ }
+ 
+ static void
+ ix86_init_builtin_types (void)
+ {
+   tree float80_type_node, const_string_type_node;
+ 
+   /* The __float80 type.  */
+   float80_type_node = long_double_type_node;
+   if (TYPE_MODE (float80_type_node) != XFmode)
+     {
+       if (float64x_type_node != NULL_TREE
+ 	  && TYPE_MODE (float64x_type_node) == XFmode)
+ 	float80_type_node = float64x_type_node;
+       else
+ 	{
+ 	  /* The __float80 type.  */
+ 	  float80_type_node = make_node (REAL_TYPE);
+ 
+ 	  TYPE_PRECISION (float80_type_node) = 80;
+ 	  layout_type (float80_type_node);
+ 	}
+     }
+   lang_hooks.types.register_builtin_type (float80_type_node, "__float80");
+ 
+   /* The __float128 type.  The node has already been created as
+      _Float128, so we only need to register the __float128 name for
+      it.  */
+   lang_hooks.types.register_builtin_type (float128_type_node, "__float128");
+ 
+   const_string_type_node
+     = build_pointer_type (build_qualified_type
+ 			  (char_type_node, TYPE_QUAL_CONST));
+ 
+   /* This macro is built by i386-builtin-types.awk.  */
+   DEFINE_BUILTIN_PRIMITIVE_TYPES;
+ }
+ 
+ void
+ ix86_init_builtins (void)
+ {
+   tree ftype, decl;
+ 
+   ix86_init_builtin_types ();
+ 
+   /* Builtins to get CPU type and features. */
+   ix86_init_platform_type_builtins ();
+ 
+   /* TFmode support builtins.  */
+   def_builtin_const (0, 0, "__builtin_infq",
+ 		     FLOAT128_FTYPE_VOID, IX86_BUILTIN_INFQ);
+   def_builtin_const (0, 0, "__builtin_huge_valq",
+ 		     FLOAT128_FTYPE_VOID, IX86_BUILTIN_HUGE_VALQ);
+ 
+   ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_CONST_STRING);
+   decl = add_builtin_function ("__builtin_nanq", ftype, IX86_BUILTIN_NANQ,
+ 			       BUILT_IN_MD, "nanq", NULL_TREE);
+   TREE_READONLY (decl) = 1;
+   ix86_builtins[(int) IX86_BUILTIN_NANQ] = decl;
+ 
+   decl = add_builtin_function ("__builtin_nansq", ftype, IX86_BUILTIN_NANSQ,
+ 			       BUILT_IN_MD, "nansq", NULL_TREE);
+   TREE_READONLY (decl) = 1;
+   ix86_builtins[(int) IX86_BUILTIN_NANSQ] = decl;
+ 
+   /* We will expand them to normal call if SSE isn't available since
+      they are used by libgcc. */
+   ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128);
+   decl = add_builtin_function ("__builtin_fabsq", ftype, IX86_BUILTIN_FABSQ,
+ 			       BUILT_IN_MD, "__fabstf2", NULL_TREE);
+   TREE_READONLY (decl) = 1;
+   ix86_builtins[(int) IX86_BUILTIN_FABSQ] = decl;
+ 
+   ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128_FLOAT128);
+   decl = add_builtin_function ("__builtin_copysignq", ftype,
+ 			       IX86_BUILTIN_COPYSIGNQ, BUILT_IN_MD,
+ 			       "__copysigntf3", NULL_TREE);
+   TREE_READONLY (decl) = 1;
+   ix86_builtins[(int) IX86_BUILTIN_COPYSIGNQ] = decl;
+ 
+   ix86_init_tm_builtins ();
+   ix86_init_mmx_sse_builtins ();
+ 
+   if (TARGET_LP64)
+     ix86_init_builtins_va_builtins_abi ();
+ 
+ #ifdef SUBTARGET_INIT_BUILTINS
+   SUBTARGET_INIT_BUILTINS;
+ #endif
+ }
+ 
+ /* Return the ix86 builtin for CODE.  */
+ 
+ tree
+ ix86_builtin_decl (unsigned code, bool)
+ {
+   if (code >= IX86_BUILTIN_MAX)
+     return error_mark_node;
+ 
+   return ix86_builtins[code];
+ }
+ 
+ /* This returns the target-specific builtin with code CODE if
+    current_function_decl has visibility on this builtin, which is checked
+    using isa flags.  Returns NULL_TREE otherwise.  */
+ 
+ static tree ix86_get_builtin (enum ix86_builtins code)
+ {
+   struct cl_target_option *opts;
+   tree target_tree = NULL_TREE;
+ 
+   /* Determine the isa flags of current_function_decl.  */
+ 
+   if (current_function_decl)
+     target_tree = DECL_FUNCTION_SPECIFIC_TARGET (current_function_decl);
+ 
+   if (target_tree == NULL)
+     target_tree = target_option_default_node;
+ 
+   opts = TREE_TARGET_OPTION (target_tree);
+ 
+   if ((ix86_builtins_isa[(int) code].isa & opts->x_ix86_isa_flags)
+       || (ix86_builtins_isa[(int) code].isa2 & opts->x_ix86_isa_flags2))
+     return ix86_builtin_decl (code, true);
+   else
+     return NULL_TREE;
+ }
+ 
+ /* Vectorization library interface and handlers.  */
+ tree (*ix86_veclib_handler) (combined_fn, tree, tree);
+ 
+ /* Returns a function decl for a vectorized version of the combined function
+    with combined_fn code FN and the result vector type TYPE, or NULL_TREE
+    if it is not available.  */
+ 
+ tree
+ ix86_builtin_vectorized_function (unsigned int fn, tree type_out,
+ 				  tree type_in)
+ {
+   machine_mode in_mode, out_mode;
+   int in_n, out_n;
+ 
+   if (TREE_CODE (type_out) != VECTOR_TYPE
+       || TREE_CODE (type_in) != VECTOR_TYPE)
+     return NULL_TREE;
+ 
+   out_mode = TYPE_MODE (TREE_TYPE (type_out));
+   out_n = TYPE_VECTOR_SUBPARTS (type_out);
+   in_mode = TYPE_MODE (TREE_TYPE (type_in));
+   in_n = TYPE_VECTOR_SUBPARTS (type_in);
+ 
+   switch (fn)
+     {
+     CASE_CFN_EXP2:
+       if (out_mode == SFmode && in_mode == SFmode)
+ 	{
+ 	  if (out_n == 16 && in_n == 16)
+ 	    return ix86_get_builtin (IX86_BUILTIN_EXP2PS);
+ 	}
+       break;
+ 
+     CASE_CFN_IFLOOR:
+     CASE_CFN_LFLOOR:
+     CASE_CFN_LLFLOOR:
+       /* The round insn does not trap on denormals.  */
+       if (flag_trapping_math || !TARGET_SSE4_1)
+ 	break;
+ 
+       if (out_mode == SImode && in_mode == DFmode)
+ 	{
+ 	  if (out_n == 4 && in_n == 2)
+ 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX);
+ 	  else if (out_n == 8 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX256);
+ 	  else if (out_n == 16 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512);
+ 	}
+       if (out_mode == SImode && in_mode == SFmode)
+ 	{
+ 	  if (out_n == 4 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX);
+ 	  else if (out_n == 8 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX256);
+ 	  else if (out_n == 16 && in_n == 16)
+ 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX512);
+ 	}
+       break;
+ 
+     CASE_CFN_ICEIL:
+     CASE_CFN_LCEIL:
+     CASE_CFN_LLCEIL:
+       /* The round insn does not trap on denormals.  */
+       if (flag_trapping_math || !TARGET_SSE4_1)
+ 	break;
+ 
+       if (out_mode == SImode && in_mode == DFmode)
+ 	{
+ 	  if (out_n == 4 && in_n == 2)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX);
+ 	  else if (out_n == 8 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX256);
+ 	  else if (out_n == 16 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512);
+ 	}
+       if (out_mode == SImode && in_mode == SFmode)
+ 	{
+ 	  if (out_n == 4 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX);
+ 	  else if (out_n == 8 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX256);
+ 	  else if (out_n == 16 && in_n == 16)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX512);
+ 	}
+       break;
+ 
+     CASE_CFN_IRINT:
+     CASE_CFN_LRINT:
+     CASE_CFN_LLRINT:
+       if (out_mode == SImode && in_mode == DFmode)
+ 	{
+ 	  if (out_n == 4 && in_n == 2)
+ 	    return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX);
+ 	  else if (out_n == 8 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX256);
+ 	  else if (out_n == 16 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX512);
+ 	}
+       if (out_mode == SImode && in_mode == SFmode)
+ 	{
+ 	  if (out_n == 4 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ);
+ 	  else if (out_n == 8 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ256);
+ 	  else if (out_n == 16 && in_n == 16)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ512);
+ 	}
+       break;
+ 
+     CASE_CFN_IROUND:
+     CASE_CFN_LROUND:
+     CASE_CFN_LLROUND:
+       /* The round insn does not trap on denormals.  */
+       if (flag_trapping_math || !TARGET_SSE4_1)
+ 	break;
+ 
+       if (out_mode == SImode && in_mode == DFmode)
+ 	{
+ 	  if (out_n == 4 && in_n == 2)
+ 	    return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX);
+ 	  else if (out_n == 8 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX256);
+ 	  else if (out_n == 16 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512);
+ 	}
+       if (out_mode == SImode && in_mode == SFmode)
+ 	{
+ 	  if (out_n == 4 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX);
+ 	  else if (out_n == 8 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX256);
+ 	  else if (out_n == 16 && in_n == 16)
+ 	    return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX512);
+ 	}
+       break;
+ 
+     CASE_CFN_FLOOR:
+       /* The round insn does not trap on denormals.  */
+       if (flag_trapping_math || !TARGET_SSE4_1)
+ 	break;
+ 
+       if (out_mode == DFmode && in_mode == DFmode)
+ 	{
+ 	  if (out_n == 2 && in_n == 2)
+ 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPD);
+ 	  else if (out_n == 4 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPD256);
+ 	  else if (out_n == 8 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPD512);
+ 	}
+       if (out_mode == SFmode && in_mode == SFmode)
+ 	{
+ 	  if (out_n == 4 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPS);
+ 	  else if (out_n == 8 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPS256);
+ 	  else if (out_n == 16 && in_n == 16)
+ 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPS512);
+ 	}
+       break;
+ 
+     CASE_CFN_CEIL:
+       /* The round insn does not trap on denormals.  */
+       if (flag_trapping_math || !TARGET_SSE4_1)
+ 	break;
+ 
+       if (out_mode == DFmode && in_mode == DFmode)
+ 	{
+ 	  if (out_n == 2 && in_n == 2)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CEILPD);
+ 	  else if (out_n == 4 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CEILPD256);
+ 	  else if (out_n == 8 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CEILPD512);
+ 	}
+       if (out_mode == SFmode && in_mode == SFmode)
+ 	{
+ 	  if (out_n == 4 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CEILPS);
+ 	  else if (out_n == 8 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CEILPS256);
+ 	  else if (out_n == 16 && in_n == 16)
+ 	    return ix86_get_builtin (IX86_BUILTIN_CEILPS512);
+ 	}
+       break;
+ 
+     CASE_CFN_TRUNC:
+       /* The round insn does not trap on denormals.  */
+       if (flag_trapping_math || !TARGET_SSE4_1)
+ 	break;
+ 
+       if (out_mode == DFmode && in_mode == DFmode)
+ 	{
+ 	  if (out_n == 2 && in_n == 2)
+ 	    return ix86_get_builtin (IX86_BUILTIN_TRUNCPD);
+ 	  else if (out_n == 4 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_TRUNCPD256);
+ 	  else if (out_n == 8 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_TRUNCPD512);
+ 	}
+       if (out_mode == SFmode && in_mode == SFmode)
+ 	{
+ 	  if (out_n == 4 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_TRUNCPS);
+ 	  else if (out_n == 8 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_TRUNCPS256);
+ 	  else if (out_n == 16 && in_n == 16)
+ 	    return ix86_get_builtin (IX86_BUILTIN_TRUNCPS512);
+ 	}
+       break;
+ 
+     CASE_CFN_FMA:
+       if (out_mode == DFmode && in_mode == DFmode)
+ 	{
+ 	  if (out_n == 2 && in_n == 2)
+ 	    return ix86_get_builtin (IX86_BUILTIN_VFMADDPD);
+ 	  if (out_n == 4 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_VFMADDPD256);
+ 	}
+       if (out_mode == SFmode && in_mode == SFmode)
+ 	{
+ 	  if (out_n == 4 && in_n == 4)
+ 	    return ix86_get_builtin (IX86_BUILTIN_VFMADDPS);
+ 	  if (out_n == 8 && in_n == 8)
+ 	    return ix86_get_builtin (IX86_BUILTIN_VFMADDPS256);
+ 	}
+       break;
+ 
+     default:
+       break;
+     }
+ 
+   /* Dispatch to a handler for a vectorization library.  */
+   if (ix86_veclib_handler)
+     return ix86_veclib_handler (combined_fn (fn), type_out, type_in);
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Returns a decl of a function that implements gather load with
+    memory type MEM_VECTYPE and index type INDEX_VECTYPE and SCALE.
+    Return NULL_TREE if it is not available.  */
+ 
+ tree
+ ix86_vectorize_builtin_gather (const_tree mem_vectype,
+ 			       const_tree index_type, int scale)
+ {
+   bool si;
+   enum ix86_builtins code;
+ 
+   if (! TARGET_AVX2 || !TARGET_USE_GATHER)
+     return NULL_TREE;
+ 
+   if ((TREE_CODE (index_type) != INTEGER_TYPE
+        && !POINTER_TYPE_P (index_type))
+       || (TYPE_MODE (index_type) != SImode
+ 	  && TYPE_MODE (index_type) != DImode))
+     return NULL_TREE;
+ 
+   if (TYPE_PRECISION (index_type) > POINTER_SIZE)
+     return NULL_TREE;
+ 
+   /* v*gather* insn sign extends index to pointer mode.  */
+   if (TYPE_PRECISION (index_type) < POINTER_SIZE
+       && TYPE_UNSIGNED (index_type))
+     return NULL_TREE;
+ 
+   if (scale <= 0
+       || scale > 8
+       || (scale & (scale - 1)) != 0)
+     return NULL_TREE;
+ 
+   si = TYPE_MODE (index_type) == SImode;
+   switch (TYPE_MODE (mem_vectype))
+     {
+     case E_V2DFmode:
+       if (TARGET_AVX512VL)
+ 	code = si ? IX86_BUILTIN_GATHER3SIV2DF : IX86_BUILTIN_GATHER3DIV2DF;
+       else
+ 	code = si ? IX86_BUILTIN_GATHERSIV2DF : IX86_BUILTIN_GATHERDIV2DF;
+       break;
+     case E_V4DFmode:
+       if (TARGET_AVX512VL)
+ 	code = si ? IX86_BUILTIN_GATHER3ALTSIV4DF : IX86_BUILTIN_GATHER3DIV4DF;
+       else
+ 	code = si ? IX86_BUILTIN_GATHERALTSIV4DF : IX86_BUILTIN_GATHERDIV4DF;
+       break;
+     case E_V2DImode:
+       if (TARGET_AVX512VL)
+ 	code = si ? IX86_BUILTIN_GATHER3SIV2DI : IX86_BUILTIN_GATHER3DIV2DI;
+       else
+ 	code = si ? IX86_BUILTIN_GATHERSIV2DI : IX86_BUILTIN_GATHERDIV2DI;
+       break;
+     case E_V4DImode:
+       if (TARGET_AVX512VL)
+ 	code = si ? IX86_BUILTIN_GATHER3ALTSIV4DI : IX86_BUILTIN_GATHER3DIV4DI;
+       else
+ 	code = si ? IX86_BUILTIN_GATHERALTSIV4DI : IX86_BUILTIN_GATHERDIV4DI;
+       break;
+     case E_V4SFmode:
+       if (TARGET_AVX512VL)
+ 	code = si ? IX86_BUILTIN_GATHER3SIV4SF : IX86_BUILTIN_GATHER3DIV4SF;
+       else
+ 	code = si ? IX86_BUILTIN_GATHERSIV4SF : IX86_BUILTIN_GATHERDIV4SF;
+       break;
+     case E_V8SFmode:
+       if (TARGET_AVX512VL)
+ 	code = si ? IX86_BUILTIN_GATHER3SIV8SF : IX86_BUILTIN_GATHER3ALTDIV8SF;
+       else
+ 	code = si ? IX86_BUILTIN_GATHERSIV8SF : IX86_BUILTIN_GATHERALTDIV8SF;
+       break;
+     case E_V4SImode:
+       if (TARGET_AVX512VL)
+ 	code = si ? IX86_BUILTIN_GATHER3SIV4SI : IX86_BUILTIN_GATHER3DIV4SI;
+       else
+ 	code = si ? IX86_BUILTIN_GATHERSIV4SI : IX86_BUILTIN_GATHERDIV4SI;
+       break;
+     case E_V8SImode:
+       if (TARGET_AVX512VL)
+ 	code = si ? IX86_BUILTIN_GATHER3SIV8SI : IX86_BUILTIN_GATHER3ALTDIV8SI;
+       else
+ 	code = si ? IX86_BUILTIN_GATHERSIV8SI : IX86_BUILTIN_GATHERALTDIV8SI;
+       break;
+     case E_V8DFmode:
+       if (TARGET_AVX512F)
+ 	code = si ? IX86_BUILTIN_GATHER3ALTSIV8DF : IX86_BUILTIN_GATHER3DIV8DF;
+       else
+ 	return NULL_TREE;
+       break;
+     case E_V8DImode:
+       if (TARGET_AVX512F)
+ 	code = si ? IX86_BUILTIN_GATHER3ALTSIV8DI : IX86_BUILTIN_GATHER3DIV8DI;
+       else
+ 	return NULL_TREE;
+       break;
+     case E_V16SFmode:
+       if (TARGET_AVX512F)
+ 	code = si ? IX86_BUILTIN_GATHER3SIV16SF : IX86_BUILTIN_GATHER3ALTDIV16SF;
+       else
+ 	return NULL_TREE;
+       break;
+     case E_V16SImode:
+       if (TARGET_AVX512F)
+ 	code = si ? IX86_BUILTIN_GATHER3SIV16SI : IX86_BUILTIN_GATHER3ALTDIV16SI;
+       else
+ 	return NULL_TREE;
+       break;
+     default:
+       return NULL_TREE;
+     }
+ 
+   return ix86_get_builtin (code);
+ }
+ 
+ /* Returns a code for a target-specific builtin that implements
+    reciprocal of the function, or NULL_TREE if not available.  */
+ 
+ tree
+ ix86_builtin_reciprocal (tree fndecl)
+ {
+   enum ix86_builtins fn_code
+     = (enum ix86_builtins) DECL_MD_FUNCTION_CODE (fndecl);
+   switch (fn_code)
+     {
+       /* Vectorized version of sqrt to rsqrt conversion.  */
+     case IX86_BUILTIN_SQRTPS_NR:
+       return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR);
+ 
+     case IX86_BUILTIN_SQRTPS_NR256:
+       return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR256);
+ 
+     default:
+       return NULL_TREE;
+     }
+ }
+ 
+ /* Priority of i386 features, greater value is higher priority.   This is
+    used to decide the order in which function dispatch must happen.  For
+    instance, a version specialized for SSE4.2 should be checked for dispatch
+    before a version for SSE3, as SSE4.2 implies SSE3.  */
+ enum feature_priority
+ {
+   P_ZERO = 0,
+   P_MMX,
+   P_SSE,
+   P_SSE2,
+   P_SSE3,
+   P_SSSE3,
+   P_PROC_SSSE3,
+   P_SSE4_A,
+   P_PROC_SSE4_A,
+   P_SSE4_1,
+   P_SSE4_2,
+   P_PROC_SSE4_2,
+   P_POPCNT,
+   P_AES,
+   P_PCLMUL,
+   P_AVX,
+   P_PROC_AVX,
+   P_BMI,
+   P_PROC_BMI,
+   P_FMA4,
+   P_XOP,
+   P_PROC_XOP,
+   P_FMA,
+   P_PROC_FMA,
+   P_BMI2,
+   P_AVX2,
+   P_PROC_AVX2,
+   P_AVX512F,
+   P_PROC_AVX512F
+ };
+ 
+ /* This is the order of bit-fields in __processor_features in cpuinfo.c */
+ enum processor_features
+ {
+   F_CMOV = 0,
+   F_MMX,
+   F_POPCNT,
+   F_SSE,
+   F_SSE2,
+   F_SSE3,
+   F_SSSE3,
+   F_SSE4_1,
+   F_SSE4_2,
+   F_AVX,
+   F_AVX2,
+   F_SSE4_A,
+   F_FMA4,
+   F_XOP,
+   F_FMA,
+   F_AVX512F,
+   F_BMI,
+   F_BMI2,
+   F_AES,
+   F_PCLMUL,
+   F_AVX512VL,
+   F_AVX512BW,
+   F_AVX512DQ,
+   F_AVX512CD,
+   F_AVX512ER,
+   F_AVX512PF,
+   F_AVX512VBMI,
+   F_AVX512IFMA,
+   F_AVX5124VNNIW,
+   F_AVX5124FMAPS,
+   F_AVX512VPOPCNTDQ,
+   F_AVX512VBMI2,
+   F_GFNI,
+   F_VPCLMULQDQ,
+   F_AVX512VNNI,
+   F_AVX512BITALG,
+   F_AVX512VP2INTERSECT,
+   F_AVX512BF16,
+   F_MAX
+ };
+ 
+ /* These are the values for vendor types and cpu types  and subtypes
+    in cpuinfo.c.  Cpu types and subtypes should be subtracted by
+    the corresponding start value.  */
+ enum processor_model
+ {
+   M_INTEL = 1,
+   M_AMD,
+   M_CPU_TYPE_START,
+   M_INTEL_BONNELL,
+   M_INTEL_CORE2,
+   M_INTEL_COREI7,
+   M_AMDFAM10H,
+   M_AMDFAM15H,
+   M_INTEL_SILVERMONT,
+   M_INTEL_KNL,
+   M_AMD_BTVER1,
+   M_AMD_BTVER2,
+   M_AMDFAM17H,
+   M_INTEL_KNM,
+   M_INTEL_GOLDMONT,
+   M_INTEL_GOLDMONT_PLUS,
+   M_INTEL_TREMONT,
+   M_CPU_SUBTYPE_START,
+   M_INTEL_COREI7_NEHALEM,
+   M_INTEL_COREI7_WESTMERE,
+   M_INTEL_COREI7_SANDYBRIDGE,
+   M_AMDFAM10H_BARCELONA,
+   M_AMDFAM10H_SHANGHAI,
+   M_AMDFAM10H_ISTANBUL,
+   M_AMDFAM15H_BDVER1,
+   M_AMDFAM15H_BDVER2,
+   M_AMDFAM15H_BDVER3,
+   M_AMDFAM15H_BDVER4,
+   M_AMDFAM17H_ZNVER1,
+   M_INTEL_COREI7_IVYBRIDGE,
+   M_INTEL_COREI7_HASWELL,
+   M_INTEL_COREI7_BROADWELL,
+   M_INTEL_COREI7_SKYLAKE,
+   M_INTEL_COREI7_SKYLAKE_AVX512,
+   M_INTEL_COREI7_CANNONLAKE,
+   M_INTEL_COREI7_ICELAKE_CLIENT,
+   M_INTEL_COREI7_ICELAKE_SERVER,
+   M_AMDFAM17H_ZNVER2,
+   M_INTEL_COREI7_CASCADELAKE,
+   M_INTEL_COREI7_TIGERLAKE,
+   M_INTEL_COREI7_COOPERLAKE
+ };
+ 
+ struct _arch_names_table
+ {
+   const char *const name;
+   const enum processor_model model;
+ };
+ 
+ static const _arch_names_table arch_names_table[] =
+ {
+   {"amd", M_AMD},
+   {"intel", M_INTEL},
+   {"atom", M_INTEL_BONNELL},
+   {"slm", M_INTEL_SILVERMONT},
+   {"core2", M_INTEL_CORE2},
+   {"corei7", M_INTEL_COREI7},
+   {"nehalem", M_INTEL_COREI7_NEHALEM},
+   {"westmere", M_INTEL_COREI7_WESTMERE},
+   {"sandybridge", M_INTEL_COREI7_SANDYBRIDGE},
+   {"ivybridge", M_INTEL_COREI7_IVYBRIDGE},
+   {"haswell", M_INTEL_COREI7_HASWELL},
+   {"broadwell", M_INTEL_COREI7_BROADWELL},
+   {"skylake", M_INTEL_COREI7_SKYLAKE},
+   {"skylake-avx512", M_INTEL_COREI7_SKYLAKE_AVX512},
+   {"cannonlake", M_INTEL_COREI7_CANNONLAKE},
+   {"icelake-client", M_INTEL_COREI7_ICELAKE_CLIENT},
+   {"icelake-server", M_INTEL_COREI7_ICELAKE_SERVER},
+   {"cascadelake", M_INTEL_COREI7_CASCADELAKE},
+   {"tigerlake", M_INTEL_COREI7_TIGERLAKE},
+   {"cooperlake", M_INTEL_COREI7_COOPERLAKE},
+   {"bonnell", M_INTEL_BONNELL},
+   {"silvermont", M_INTEL_SILVERMONT},
+   {"goldmont", M_INTEL_GOLDMONT},
+   {"goldmont-plus", M_INTEL_GOLDMONT_PLUS},
+   {"tremont", M_INTEL_TREMONT},
+   {"knl", M_INTEL_KNL},
+   {"knm", M_INTEL_KNM},
+   {"amdfam10h", M_AMDFAM10H},
+   {"barcelona", M_AMDFAM10H_BARCELONA},
+   {"shanghai", M_AMDFAM10H_SHANGHAI},
+   {"istanbul", M_AMDFAM10H_ISTANBUL},
+   {"btver1", M_AMD_BTVER1},
+   {"amdfam15h", M_AMDFAM15H},
+   {"bdver1", M_AMDFAM15H_BDVER1},
+   {"bdver2", M_AMDFAM15H_BDVER2},
+   {"bdver3", M_AMDFAM15H_BDVER3},
+   {"bdver4", M_AMDFAM15H_BDVER4},
+   {"btver2", M_AMD_BTVER2},
+   {"amdfam17h", M_AMDFAM17H},
+   {"znver1", M_AMDFAM17H_ZNVER1},
+   {"znver2", M_AMDFAM17H_ZNVER2},
+ };
+ 
+ /* These are the target attribute strings for which a dispatcher is
+    available, from fold_builtin_cpu.  */
+ struct _isa_names_table
+ {
+   const char *const name;
+   const enum processor_features feature;
+   const enum feature_priority priority;
+ };
+ 
+ static const _isa_names_table isa_names_table[] =
+ {
+   {"cmov",    F_CMOV,	P_ZERO},
+   {"mmx",     F_MMX,	P_MMX},
+   {"popcnt",  F_POPCNT,	P_POPCNT},
+   {"sse",     F_SSE,	P_SSE},
+   {"sse2",    F_SSE2,	P_SSE2},
+   {"sse3",    F_SSE3,	P_SSE3},
+   {"ssse3",   F_SSSE3,	P_SSSE3},
+   {"sse4a",   F_SSE4_A,	P_SSE4_A},
+   {"sse4.1",  F_SSE4_1,	P_SSE4_1},
+   {"sse4.2",  F_SSE4_2,	P_SSE4_2},
+   {"avx",     F_AVX,	P_AVX},
+   {"fma4",    F_FMA4,	P_FMA4},
+   {"xop",     F_XOP,	P_XOP},
+   {"fma",     F_FMA,	P_FMA},
+   {"avx2",    F_AVX2,	P_AVX2},
+   {"avx512f", F_AVX512F, P_AVX512F},
+   {"bmi",     F_BMI,	P_BMI},
+   {"bmi2",    F_BMI2,	P_BMI2},
+   {"aes",     F_AES,	P_AES},
+   {"pclmul",  F_PCLMUL,	P_PCLMUL},
+   {"avx512vl",F_AVX512VL, P_ZERO},
+   {"avx512bw",F_AVX512BW, P_ZERO},
+   {"avx512dq",F_AVX512DQ, P_ZERO},
+   {"avx512cd",F_AVX512CD, P_ZERO},
+   {"avx512er",F_AVX512ER, P_ZERO},
+   {"avx512pf",F_AVX512PF, P_ZERO},
+   {"avx512vbmi",F_AVX512VBMI, P_ZERO},
+   {"avx512ifma",F_AVX512IFMA, P_ZERO},
+   {"avx5124vnniw",F_AVX5124VNNIW, P_ZERO},
+   {"avx5124fmaps",F_AVX5124FMAPS, P_ZERO},
+   {"avx512vpopcntdq",F_AVX512VPOPCNTDQ,	P_ZERO},
+   {"avx512vbmi2", F_AVX512VBMI2, P_ZERO},
+   {"gfni",	F_GFNI,	P_ZERO},
+   {"vpclmulqdq", F_VPCLMULQDQ, P_ZERO},
+   {"avx512vnni", F_AVX512VNNI, P_ZERO},
+   {"avx512bitalg", F_AVX512BITALG, P_ZERO},
+   {"avx512vp2intersect",F_AVX512VP2INTERSECT, P_ZERO},
+   {"avx512bf16", F_AVX512BF16, P_ZERO}
+ };
+ 
+ /* This parses the attribute arguments to target in DECL and determines
+    the right builtin to use to match the platform specification.
+    It returns the priority value for this version decl.  If PREDICATE_LIST
+    is not NULL, it stores the list of cpu features that need to be checked
+    before dispatching this function.  */
+ 
+ unsigned int
+ get_builtin_code_for_version (tree decl, tree *predicate_list)
+ {
+   tree attrs;
+   struct cl_target_option cur_target;
+   tree target_node;
+   struct cl_target_option *new_target;
+   const char *arg_str = NULL;
+   const char *attrs_str = NULL;
+   char *tok_str = NULL;
+   char *token;
+ 
+   enum feature_priority priority = P_ZERO;
+ 
+   static unsigned int NUM_FEATURES
+     = sizeof (isa_names_table) / sizeof (_isa_names_table);
+ 
+   unsigned int i;
+ 
+   tree predicate_chain = NULL_TREE;
+   tree predicate_decl, predicate_arg;
+ 
+   attrs = lookup_attribute ("target", DECL_ATTRIBUTES (decl));
+   gcc_assert (attrs != NULL);
+ 
+   attrs = TREE_VALUE (TREE_VALUE (attrs));
+ 
+   gcc_assert (TREE_CODE (attrs) == STRING_CST);
+   attrs_str = TREE_STRING_POINTER (attrs);
+ 
+   /* Return priority zero for default function.  */
+   if (strcmp (attrs_str, "default") == 0)
+     return 0;
+ 
+   /* Handle arch= if specified.  For priority, set it to be 1 more than
+      the best instruction set the processor can handle.  For instance, if
+      there is a version for atom and a version for ssse3 (the highest ISA
+      priority for atom), the atom version must be checked for dispatch
+      before the ssse3 version. */
+   if (strstr (attrs_str, "arch=") != NULL)
+     {
+       cl_target_option_save (&cur_target, &global_options);
+       target_node
+ 	= ix86_valid_target_attribute_tree (decl, attrs, &global_options,
+ 					    &global_options_set, 0);
+     
+       gcc_assert (target_node);
+       if (target_node == error_mark_node)
+ 	return 0;
+       new_target = TREE_TARGET_OPTION (target_node);
+       gcc_assert (new_target);
+       
+       if (new_target->arch_specified && new_target->arch > 0)
+ 	{
+ 	  switch (new_target->arch)
+ 	    {
+ 	    case PROCESSOR_CORE2:
+ 	      arg_str = "core2";
+ 	      priority = P_PROC_SSSE3;
+ 	      break;
+ 	    case PROCESSOR_NEHALEM:
+ 	      if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_PCLMUL)
+ 		{
+ 		  arg_str = "westmere";
+ 		  priority = P_PCLMUL;
+ 		}
+ 	      else
+ 		{
+ 		  /* We translate "arch=corei7" and "arch=nehalem" to
+ 		     "corei7" so that it will be mapped to M_INTEL_COREI7
+ 		     as cpu type to cover all M_INTEL_COREI7_XXXs.  */
+ 		  arg_str = "corei7";
+ 		  priority = P_PROC_SSE4_2;
+ 		}
+ 	      break;
+ 	    case PROCESSOR_SANDYBRIDGE:
+ 	      if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_F16C)
+ 		arg_str = "ivybridge";
+ 	      else
+ 		arg_str = "sandybridge";
+ 	      priority = P_PROC_AVX;
+ 	      break;
+ 	    case PROCESSOR_HASWELL:
+ 	      if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_ADX)
+ 		arg_str = "broadwell";
+ 	      else
+ 		arg_str = "haswell";
+ 	      priority = P_PROC_AVX2;
+ 	      break;
+ 	    case PROCESSOR_SKYLAKE:
+ 	      arg_str = "skylake";
+ 	      priority = P_PROC_AVX2;
+ 	      break;
+ 	    case PROCESSOR_SKYLAKE_AVX512:
+ 	      arg_str = "skylake-avx512";
+ 	      priority = P_PROC_AVX512F;
+ 	      break;
+ 	    case PROCESSOR_CANNONLAKE:
+ 	      arg_str = "cannonlake";
+ 	      priority = P_PROC_AVX512F;
+ 	      break;
+ 	    case PROCESSOR_ICELAKE_CLIENT:
+ 	      arg_str = "icelake-client";
+ 	      priority = P_PROC_AVX512F;
+ 	      break;
+ 	    case PROCESSOR_ICELAKE_SERVER:
+ 	      arg_str = "icelake-server";
+ 	      priority = P_PROC_AVX512F;
+ 	      break;
+ 	    case PROCESSOR_CASCADELAKE:
+ 	      arg_str = "cascadelake";
+ 	      priority = P_PROC_AVX512F;
+ 	      break;
+ 	    case PROCESSOR_TIGERLAKE:
+ 	      arg_str = "tigerlake";
+ 	      priority = P_PROC_AVX512F;
+ 	      break;
+ 	    case PROCESSOR_COOPERLAKE:
+ 	      arg_str = "cooperlake";
+ 	      priority = P_PROC_AVX512F;
+ 	      break;
+ 	    case PROCESSOR_BONNELL:
+ 	      arg_str = "bonnell";
+ 	      priority = P_PROC_SSSE3;
+ 	      break;
+ 	    case PROCESSOR_KNL:
+ 	      arg_str = "knl";
+ 	      priority = P_PROC_AVX512F;
+ 	      break;
+ 	    case PROCESSOR_KNM:
+ 	      arg_str = "knm";
+ 	      priority = P_PROC_AVX512F;
+ 	      break;
+ 	    case PROCESSOR_SILVERMONT:
+ 	      arg_str = "silvermont";
+ 	      priority = P_PROC_SSE4_2;
+ 	      break;
+ 	    case PROCESSOR_GOLDMONT:
+ 	      arg_str = "goldmont";
+ 	      priority = P_PROC_SSE4_2;
+ 	      break;
+ 	    case PROCESSOR_GOLDMONT_PLUS:
+ 	      arg_str = "goldmont-plus";
+ 	      priority = P_PROC_SSE4_2;
+ 	      break;
+ 	    case PROCESSOR_TREMONT:
+ 	      arg_str = "tremont";
+ 	      priority = P_PROC_SSE4_2;
+ 	      break;
+ 	    case PROCESSOR_AMDFAM10:
+ 	      arg_str = "amdfam10h";
+ 	      priority = P_PROC_SSE4_A;
+ 	      break;
+ 	    case PROCESSOR_BTVER1:
+ 	      arg_str = "btver1";
+ 	      priority = P_PROC_SSE4_A;
+ 	      break;
+ 	    case PROCESSOR_BTVER2:
+ 	      arg_str = "btver2";
+ 	      priority = P_PROC_BMI;
+ 	      break;
+ 	    case PROCESSOR_BDVER1:
+ 	      arg_str = "bdver1";
+ 	      priority = P_PROC_XOP;
+ 	      break;
+ 	    case PROCESSOR_BDVER2:
+ 	      arg_str = "bdver2";
+ 	      priority = P_PROC_FMA;
+ 	      break;
+ 	    case PROCESSOR_BDVER3:
+ 	      arg_str = "bdver3";
+ 	      priority = P_PROC_FMA;
+ 	      break;
+ 	    case PROCESSOR_BDVER4:
+ 	      arg_str = "bdver4";
+ 	      priority = P_PROC_AVX2;
+ 	      break;
+ 	    case PROCESSOR_ZNVER1:
+ 	      arg_str = "znver1";
+ 	      priority = P_PROC_AVX2;
+ 	      break;
+ 	    case PROCESSOR_ZNVER2:
+ 	      arg_str = "znver2";
+ 	      priority = P_PROC_AVX2;
+ 	      break;
+ 	    }
+ 	}
+ 
+       cl_target_option_restore (&global_options, &cur_target);
+ 	
+       if (predicate_list && arg_str == NULL)
+ 	{
+ 	  error_at (DECL_SOURCE_LOCATION (decl),
+ 		    "no dispatcher found for the versioning attributes");
+ 	  return 0;
+ 	}
+     
+       if (predicate_list)
+ 	{
+           predicate_decl = ix86_builtins [(int) IX86_BUILTIN_CPU_IS];
+           /* For a C string literal the length includes the trailing NULL.  */
+           predicate_arg = build_string_literal (strlen (arg_str) + 1, arg_str);
+           predicate_chain = tree_cons (predicate_decl, predicate_arg,
+ 				       predicate_chain);
+ 	}
+     }
+ 
+   /* Process feature name.  */
+   tok_str =  (char *) xmalloc (strlen (attrs_str) + 1);
+   strcpy (tok_str, attrs_str);
+   token = strtok (tok_str, ",");
+   predicate_decl = ix86_builtins [(int) IX86_BUILTIN_CPU_SUPPORTS];
+ 
+   while (token != NULL)
+     {
+       /* Do not process "arch="  */
+       if (strncmp (token, "arch=", 5) == 0)
+ 	{
+ 	  token = strtok (NULL, ",");
+ 	  continue;
+ 	}
+       for (i = 0; i < NUM_FEATURES; ++i)
+ 	{
+ 	  if (strcmp (token, isa_names_table[i].name) == 0)
+ 	    {
+ 	      if (predicate_list)
+ 		{
+ 		  predicate_arg = build_string_literal (
+ 				  strlen (isa_names_table[i].name) + 1,
+ 				  isa_names_table[i].name);
+ 		  predicate_chain = tree_cons (predicate_decl, predicate_arg,
+ 					       predicate_chain);
+ 		}
+ 	      /* Find the maximum priority feature.  */
+ 	      if (isa_names_table[i].priority > priority)
+ 		priority = isa_names_table[i].priority;
+ 
+ 	      break;
+ 	    }
+ 	}
+       if (predicate_list && priority == P_ZERO)
+ 	{
+ 	  error_at (DECL_SOURCE_LOCATION (decl),
+ 		    "ISA %qs is not supported in %<target%> attribute, "
+ 		    "use %<arch=%> syntax", token);
+ 	  return 0;
+ 	}
+       token = strtok (NULL, ",");
+     }
+   free (tok_str);
+ 
+   if (predicate_list && predicate_chain == NULL_TREE)
+     {
+       error_at (DECL_SOURCE_LOCATION (decl),
+ 	        "no dispatcher found for the versioning attributes: %s",
+ 	        attrs_str);
+       return 0;
+     }
+   else if (predicate_list)
+     {
+       predicate_chain = nreverse (predicate_chain);
+       *predicate_list = predicate_chain;
+     }
+ 
+   return priority; 
+ }
+ 
+ /* This builds the processor_model struct type defined in
+    libgcc/config/i386/cpuinfo.c  */
+ 
+ static tree
+ build_processor_model_struct (void)
+ {
+   const char *field_name[] = {"__cpu_vendor", "__cpu_type", "__cpu_subtype",
+ 			      "__cpu_features"};
+   tree field = NULL_TREE, field_chain = NULL_TREE;
+   int i;
+   tree type = make_node (RECORD_TYPE);
+ 
+   /* The first 3 fields are unsigned int.  */
+   for (i = 0; i < 3; ++i)
+     {
+       field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
+ 			  get_identifier (field_name[i]), unsigned_type_node);
+       if (field_chain != NULL_TREE)
+ 	DECL_CHAIN (field) = field_chain;
+       field_chain = field;
+     }
+ 
+   /* The last field is an array of unsigned integers of size one.  */
+   field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
+ 		      get_identifier (field_name[3]),
+ 		      build_array_type (unsigned_type_node,
+ 					build_index_type (size_one_node)));
+   if (field_chain != NULL_TREE)
+     DECL_CHAIN (field) = field_chain;
+   field_chain = field;
+ 
+   finish_builtin_struct (type, "__processor_model", field_chain, NULL_TREE);
+   return type;
+ }
+ 
+ /* Returns a extern, comdat VAR_DECL of type TYPE and name NAME. */
+ 
+ static tree
+ make_var_decl (tree type, const char *name)
+ {
+   tree new_decl;
+ 
+   new_decl = build_decl (UNKNOWN_LOCATION,
+ 	                 VAR_DECL,
+ 	  	         get_identifier(name),
+ 		         type);
+ 
+   DECL_EXTERNAL (new_decl) = 1;
+   TREE_STATIC (new_decl) = 1;
+   TREE_PUBLIC (new_decl) = 1;
+   DECL_INITIAL (new_decl) = 0;
+   DECL_ARTIFICIAL (new_decl) = 0;
+   DECL_PRESERVE_P (new_decl) = 1;
+ 
+   make_decl_one_only (new_decl, DECL_ASSEMBLER_NAME (new_decl));
+   assemble_variable (new_decl, 0, 0, 0);
+ 
+   return new_decl;
+ }
+ 
+ /* FNDECL is a __builtin_cpu_is or a __builtin_cpu_supports call that is folded
+    into an integer defined in libgcc/config/i386/cpuinfo.c */
+ 
+ tree
+ fold_builtin_cpu (tree fndecl, tree *args)
+ {
+   unsigned int i;
+   enum ix86_builtins fn_code
+     = (enum ix86_builtins) DECL_MD_FUNCTION_CODE (fndecl);
+   tree param_string_cst = NULL;
+ 
+   tree __processor_model_type = build_processor_model_struct ();
+   tree __cpu_model_var = make_var_decl (__processor_model_type,
+ 					"__cpu_model");
+ 
+ 
+   varpool_node::add (__cpu_model_var);
+ 
+   gcc_assert ((args != NULL) && (*args != NULL));
+ 
+   param_string_cst = *args;
+   while (param_string_cst
+ 	 && TREE_CODE (param_string_cst) !=  STRING_CST)
+     {
+       /* *args must be a expr that can contain other EXPRS leading to a
+ 	 STRING_CST.   */
+       if (!EXPR_P (param_string_cst))
+  	{
+ 	  error ("parameter to builtin must be a string constant or literal");
+ 	  return integer_zero_node;
+ 	}
+       param_string_cst = TREE_OPERAND (EXPR_CHECK (param_string_cst), 0);
+     }
+ 
+   gcc_assert (param_string_cst);
+ 
+   if (fn_code == IX86_BUILTIN_CPU_IS)
+     {
+       tree ref;
+       tree field;
+       tree final;
+ 
+       unsigned int field_val = 0;
+       unsigned int NUM_ARCH_NAMES
+ 	= sizeof (arch_names_table) / sizeof (struct _arch_names_table);
+ 
+       for (i = 0; i < NUM_ARCH_NAMES; i++)
+ 	if (strcmp (arch_names_table[i].name,
+ 	    TREE_STRING_POINTER (param_string_cst)) == 0)
+ 	  break;
+ 
+       if (i == NUM_ARCH_NAMES)
+ 	{
+ 	  error ("parameter to builtin not valid: %s",
+ 	         TREE_STRING_POINTER (param_string_cst));
+ 	  return integer_zero_node;
+ 	}
+ 
+       field = TYPE_FIELDS (__processor_model_type);
+       field_val = arch_names_table[i].model;
+ 
+       /* CPU types are stored in the next field.  */
+       if (field_val > M_CPU_TYPE_START
+ 	  && field_val < M_CPU_SUBTYPE_START)
+ 	{
+ 	  field = DECL_CHAIN (field);
+ 	  field_val -= M_CPU_TYPE_START;
+ 	}
+ 
+       /* CPU subtypes are stored in the next field.  */
+       if (field_val > M_CPU_SUBTYPE_START)
+ 	{
+ 	  field = DECL_CHAIN ( DECL_CHAIN (field));
+ 	  field_val -= M_CPU_SUBTYPE_START;
+ 	}
+ 
+       /* Get the appropriate field in __cpu_model.  */
+       ref = build3 (COMPONENT_REF, TREE_TYPE (field), __cpu_model_var,
+ 		    field, NULL_TREE);
+ 
+       /* Check the value.  */
+       final = build2 (EQ_EXPR, unsigned_type_node, ref,
+ 		      build_int_cstu (unsigned_type_node, field_val));
+       return build1 (CONVERT_EXPR, integer_type_node, final);
+     }
+   else if (fn_code == IX86_BUILTIN_CPU_SUPPORTS)
+     {
+       tree ref;
+       tree array_elt;
+       tree field;
+       tree final;
+ 
+       unsigned int field_val = 0;
+       unsigned int NUM_ISA_NAMES
+ 	= sizeof (isa_names_table) / sizeof (struct _isa_names_table);
+ 
+       for (i = 0; i < NUM_ISA_NAMES; i++)
+ 	if (strcmp (isa_names_table[i].name,
+ 	    TREE_STRING_POINTER (param_string_cst)) == 0)
+ 	  break;
+ 
+       if (i == NUM_ISA_NAMES)
+ 	{
+ 	  error ("parameter to builtin not valid: %s",
+ 	       	 TREE_STRING_POINTER (param_string_cst));
+ 	  return integer_zero_node;
+ 	}
+ 
+       if (isa_names_table[i].feature >= 32)
+ 	{
+ 	  tree __cpu_features2_var = make_var_decl (unsigned_type_node,
+ 						    "__cpu_features2");
+ 
+ 	  varpool_node::add (__cpu_features2_var);
+ 	  field_val = (1U << (isa_names_table[i].feature - 32));
+ 	  /* Return __cpu_features2 & field_val  */
+ 	  final = build2 (BIT_AND_EXPR, unsigned_type_node,
+ 			  __cpu_features2_var,
+ 			  build_int_cstu (unsigned_type_node, field_val));
+ 	  return build1 (CONVERT_EXPR, integer_type_node, final);
+ 	}
+ 
+       field = TYPE_FIELDS (__processor_model_type);
+       /* Get the last field, which is __cpu_features.  */
+       while (DECL_CHAIN (field))
+         field = DECL_CHAIN (field);
+ 
+       /* Get the appropriate field: __cpu_model.__cpu_features  */
+       ref = build3 (COMPONENT_REF, TREE_TYPE (field), __cpu_model_var,
+ 		    field, NULL_TREE);
+ 
+       /* Access the 0th element of __cpu_features array.  */
+       array_elt = build4 (ARRAY_REF, unsigned_type_node, ref,
+ 			  integer_zero_node, NULL_TREE, NULL_TREE);
+ 
+       field_val = (1U << isa_names_table[i].feature);
+       /* Return __cpu_model.__cpu_features[0] & field_val  */
+       final = build2 (BIT_AND_EXPR, unsigned_type_node, array_elt,
+ 		      build_int_cstu (unsigned_type_node, field_val));
+       return build1 (CONVERT_EXPR, integer_type_node, final);
+     }
+   gcc_unreachable ();
+ }
+ 
+ #include "gt-i386-builtins.h"
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-builtins.h gcc-10.1.0/gcc/config/i386/i386-builtins.h
*** gcc-9.3.0/gcc/config/i386/i386-builtins.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/i386/i386-builtins.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,330 ----
+ /* Copyright (C) 1988-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_I386_BUILTINS_H
+ #define GCC_I386_BUILTINS_H
+ 
+ /* The following file contains several enumerations and data structures
+    built from the definitions in i386-builtin-types.def.  */
+ 
+ #include "i386-builtin-types.inc"
+ 
+ /* Codes for all the SSE/MMX builtins.  Builtins not mentioned in any
+    bdesc_* arrays below should come first, then builtins for each bdesc_*
+    array in ascending order, so that we can use direct array accesses.  */
+ enum ix86_builtins
+ {
+   IX86_BUILTIN_MASKMOVQ,
+   IX86_BUILTIN_LDMXCSR,
+   IX86_BUILTIN_STMXCSR,
+   IX86_BUILTIN_MASKMOVDQU,
+   IX86_BUILTIN_PSLLDQ128,
+   IX86_BUILTIN_CLFLUSH,
+   IX86_BUILTIN_MONITOR,
+   IX86_BUILTIN_MWAIT,
+   IX86_BUILTIN_UMONITOR,
+   IX86_BUILTIN_UMWAIT,
+   IX86_BUILTIN_TPAUSE,
+   IX86_BUILTIN_CLZERO,
+   IX86_BUILTIN_CLDEMOTE,
+   IX86_BUILTIN_VEC_INIT_V2SI,
+   IX86_BUILTIN_VEC_INIT_V4HI,
+   IX86_BUILTIN_VEC_INIT_V8QI,
+   IX86_BUILTIN_VEC_EXT_V2DF,
+   IX86_BUILTIN_VEC_EXT_V2DI,
+   IX86_BUILTIN_VEC_EXT_V4SF,
+   IX86_BUILTIN_VEC_EXT_V4SI,
+   IX86_BUILTIN_VEC_EXT_V8HI,
+   IX86_BUILTIN_VEC_EXT_V2SI,
+   IX86_BUILTIN_VEC_EXT_V4HI,
+   IX86_BUILTIN_VEC_EXT_V16QI,
+   IX86_BUILTIN_VEC_SET_V2DI,
+   IX86_BUILTIN_VEC_SET_V4SF,
+   IX86_BUILTIN_VEC_SET_V4SI,
+   IX86_BUILTIN_VEC_SET_V8HI,
+   IX86_BUILTIN_VEC_SET_V4HI,
+   IX86_BUILTIN_VEC_SET_V16QI,
+   IX86_BUILTIN_GATHERSIV2DF,
+   IX86_BUILTIN_GATHERSIV4DF,
+   IX86_BUILTIN_GATHERDIV2DF,
+   IX86_BUILTIN_GATHERDIV4DF,
+   IX86_BUILTIN_GATHERSIV4SF,
+   IX86_BUILTIN_GATHERSIV8SF,
+   IX86_BUILTIN_GATHERDIV4SF,
+   IX86_BUILTIN_GATHERDIV8SF,
+   IX86_BUILTIN_GATHERSIV2DI,
+   IX86_BUILTIN_GATHERSIV4DI,
+   IX86_BUILTIN_GATHERDIV2DI,
+   IX86_BUILTIN_GATHERDIV4DI,
+   IX86_BUILTIN_GATHERSIV4SI,
+   IX86_BUILTIN_GATHERSIV8SI,
+   IX86_BUILTIN_GATHERDIV4SI,
+   IX86_BUILTIN_GATHERDIV8SI,
+   IX86_BUILTIN_GATHER3SIV8SF,
+   IX86_BUILTIN_GATHER3SIV4SF,
+   IX86_BUILTIN_GATHER3SIV4DF,
+   IX86_BUILTIN_GATHER3SIV2DF,
+   IX86_BUILTIN_GATHER3DIV8SF,
+   IX86_BUILTIN_GATHER3DIV4SF,
+   IX86_BUILTIN_GATHER3DIV4DF,
+   IX86_BUILTIN_GATHER3DIV2DF,
+   IX86_BUILTIN_GATHER3SIV8SI,
+   IX86_BUILTIN_GATHER3SIV4SI,
+   IX86_BUILTIN_GATHER3SIV4DI,
+   IX86_BUILTIN_GATHER3SIV2DI,
+   IX86_BUILTIN_GATHER3DIV8SI,
+   IX86_BUILTIN_GATHER3DIV4SI,
+   IX86_BUILTIN_GATHER3DIV4DI,
+   IX86_BUILTIN_GATHER3DIV2DI,
+   IX86_BUILTIN_SCATTERSIV8SF,
+   IX86_BUILTIN_SCATTERSIV4SF,
+   IX86_BUILTIN_SCATTERSIV4DF,
+   IX86_BUILTIN_SCATTERSIV2DF,
+   IX86_BUILTIN_SCATTERDIV8SF,
+   IX86_BUILTIN_SCATTERDIV4SF,
+   IX86_BUILTIN_SCATTERDIV4DF,
+   IX86_BUILTIN_SCATTERDIV2DF,
+   IX86_BUILTIN_SCATTERSIV8SI,
+   IX86_BUILTIN_SCATTERSIV4SI,
+   IX86_BUILTIN_SCATTERSIV4DI,
+   IX86_BUILTIN_SCATTERSIV2DI,
+   IX86_BUILTIN_SCATTERDIV8SI,
+   IX86_BUILTIN_SCATTERDIV4SI,
+   IX86_BUILTIN_SCATTERDIV4DI,
+   IX86_BUILTIN_SCATTERDIV2DI,
+   /* Alternate 4 and 8 element gather/scatter for the vectorizer
+      where all operands are 32-byte or 64-byte wide respectively.  */
+   IX86_BUILTIN_GATHERALTSIV4DF,
+   IX86_BUILTIN_GATHERALTDIV8SF,
+   IX86_BUILTIN_GATHERALTSIV4DI,
+   IX86_BUILTIN_GATHERALTDIV8SI,
+   IX86_BUILTIN_GATHER3ALTDIV16SF,
+   IX86_BUILTIN_GATHER3ALTDIV16SI,
+   IX86_BUILTIN_GATHER3ALTSIV4DF,
+   IX86_BUILTIN_GATHER3ALTDIV8SF,
+   IX86_BUILTIN_GATHER3ALTSIV4DI,
+   IX86_BUILTIN_GATHER3ALTDIV8SI,
+   IX86_BUILTIN_GATHER3ALTSIV8DF,
+   IX86_BUILTIN_GATHER3ALTSIV8DI,
+   IX86_BUILTIN_GATHER3DIV16SF,
+   IX86_BUILTIN_GATHER3DIV16SI,
+   IX86_BUILTIN_GATHER3DIV8DF,
+   IX86_BUILTIN_GATHER3DIV8DI,
+   IX86_BUILTIN_GATHER3SIV16SF,
+   IX86_BUILTIN_GATHER3SIV16SI,
+   IX86_BUILTIN_GATHER3SIV8DF,
+   IX86_BUILTIN_GATHER3SIV8DI,
+   IX86_BUILTIN_SCATTERALTSIV8DF,
+   IX86_BUILTIN_SCATTERALTDIV16SF,
+   IX86_BUILTIN_SCATTERALTSIV8DI,
+   IX86_BUILTIN_SCATTERALTDIV16SI,
+   IX86_BUILTIN_SCATTERALTSIV4DF,
+   IX86_BUILTIN_SCATTERALTDIV8SF,
+   IX86_BUILTIN_SCATTERALTSIV4DI,
+   IX86_BUILTIN_SCATTERALTDIV8SI,
+   IX86_BUILTIN_SCATTERALTSIV2DF,
+   IX86_BUILTIN_SCATTERALTDIV4SF,
+   IX86_BUILTIN_SCATTERALTSIV2DI,
+   IX86_BUILTIN_SCATTERALTDIV4SI,
+   IX86_BUILTIN_SCATTERDIV16SF,
+   IX86_BUILTIN_SCATTERDIV16SI,
+   IX86_BUILTIN_SCATTERDIV8DF,
+   IX86_BUILTIN_SCATTERDIV8DI,
+   IX86_BUILTIN_SCATTERSIV16SF,
+   IX86_BUILTIN_SCATTERSIV16SI,
+   IX86_BUILTIN_SCATTERSIV8DF,
+   IX86_BUILTIN_SCATTERSIV8DI,
+   IX86_BUILTIN_GATHERPFQPD,
+   IX86_BUILTIN_GATHERPFDPS,
+   IX86_BUILTIN_GATHERPFDPD,
+   IX86_BUILTIN_GATHERPFQPS,
+   IX86_BUILTIN_SCATTERPFDPD,
+   IX86_BUILTIN_SCATTERPFDPS,
+   IX86_BUILTIN_SCATTERPFQPD,
+   IX86_BUILTIN_SCATTERPFQPS,
+   IX86_BUILTIN_CLWB,
+   IX86_BUILTIN_CLFLUSHOPT,
+   IX86_BUILTIN_INFQ,
+   IX86_BUILTIN_HUGE_VALQ,
+   IX86_BUILTIN_NANQ,
+   IX86_BUILTIN_NANSQ,
+   IX86_BUILTIN_XABORT,
+   IX86_BUILTIN_ADDCARRYX32,
+   IX86_BUILTIN_ADDCARRYX64,
+   IX86_BUILTIN_SBB32,
+   IX86_BUILTIN_SBB64,
+   IX86_BUILTIN_RDRAND16_STEP,
+   IX86_BUILTIN_RDRAND32_STEP,
+   IX86_BUILTIN_RDRAND64_STEP,
+   IX86_BUILTIN_RDSEED16_STEP,
+   IX86_BUILTIN_RDSEED32_STEP,
+   IX86_BUILTIN_RDSEED64_STEP,
+   IX86_BUILTIN_MONITORX,
+   IX86_BUILTIN_MWAITX,
+   IX86_BUILTIN_CFSTRING,
+   IX86_BUILTIN_CPU_INIT,
+   IX86_BUILTIN_CPU_IS,
+   IX86_BUILTIN_CPU_SUPPORTS,
+   IX86_BUILTIN_READ_FLAGS,
+   IX86_BUILTIN_WRITE_FLAGS,
+ 
+   /* All the remaining builtins are tracked in bdesc_* arrays in
+      i386-builtin.def.  Don't add any IX86_BUILTIN_* enumerators after
+      this point.  */
+ #define BDESC(mask, mask2, icode, name, code, comparison, flag)	\
+   code,
+ #define BDESC_FIRST(kind, kindu, mask, mask2, icode, name, code, comparison, flag) \
+   code,									\
+   IX86_BUILTIN__BDESC_##kindu##_FIRST = code,
+ #define BDESC_END(kind, next_kind)
+ 
+ #include "i386-builtin.def"
+ 
+ #undef BDESC
+ #undef BDESC_FIRST
+ #undef BDESC_END
+ 
+   IX86_BUILTIN_MAX,
+ 
+   IX86_BUILTIN__BDESC_MAX_FIRST = IX86_BUILTIN_MAX,
+ 
+   /* Now just the aliases for bdesc_* start/end.  */
+ #define BDESC(mask, mask2, icode, name, code, comparison, flag)
+ #define BDESC_FIRST(kind, kindu, mask, mask2, icode, name, code, comparison, flag)
+ #define BDESC_END(kind, next_kind) \
+   IX86_BUILTIN__BDESC_##kind##_LAST					    \
+     = IX86_BUILTIN__BDESC_##next_kind##_FIRST - 1,
+ 
+ #include "i386-builtin.def"
+ 
+ #undef BDESC
+ #undef BDESC_FIRST
+ #undef BDESC_END
+ 
+   /* Just to make sure there is no comma after the last enumerator.  */
+   IX86_BUILTIN__BDESC_MAX_LAST = IX86_BUILTIN__BDESC_MAX_FIRST
+ };
+ 
+ /* Table of all of the builtin functions that are possible with different ISA's
+    but are waiting to be built until a function is declared to use that
+    ISA.  */
+ struct builtin_isa {
+   HOST_WIDE_INT isa;		/* isa_flags this builtin is defined for */
+   HOST_WIDE_INT isa2;		/* additional isa_flags this builtin is defined for */
+   const char *name;		/* function name */
+   enum ix86_builtin_func_type tcode; /* type to use in the declaration */
+   unsigned char const_p:1;	/* true if the declaration is constant */
+   unsigned char pure_p:1;	/* true if the declaration has pure attribute */
+   bool set_and_not_built_p;
+ };
+ 
+ /* Bits for builtin_description.flag.  */
+ 
+ /* Set when we don't support the comparison natively, and should
+    swap_comparison in order to support it.  */
+ #define BUILTIN_DESC_SWAP_OPERANDS	1
+ 
+ struct builtin_description
+ {
+   const HOST_WIDE_INT mask;
+   const HOST_WIDE_INT mask2;
+   const enum insn_code icode;
+   const char *const name;
+   const enum ix86_builtins code;
+   const enum rtx_code comparison;
+   const int flag;
+ };
+ 
+ #define MULTI_ARG_4_DF2_DI_I	V2DF_FTYPE_V2DF_V2DF_V2DI_INT
+ #define MULTI_ARG_4_DF2_DI_I1	V4DF_FTYPE_V4DF_V4DF_V4DI_INT
+ #define MULTI_ARG_4_SF2_SI_I	V4SF_FTYPE_V4SF_V4SF_V4SI_INT
+ #define MULTI_ARG_4_SF2_SI_I1	V8SF_FTYPE_V8SF_V8SF_V8SI_INT
+ #define MULTI_ARG_3_SF		V4SF_FTYPE_V4SF_V4SF_V4SF
+ #define MULTI_ARG_3_DF		V2DF_FTYPE_V2DF_V2DF_V2DF
+ #define MULTI_ARG_3_SF2		V8SF_FTYPE_V8SF_V8SF_V8SF
+ #define MULTI_ARG_3_DF2		V4DF_FTYPE_V4DF_V4DF_V4DF
+ #define MULTI_ARG_3_DI		V2DI_FTYPE_V2DI_V2DI_V2DI
+ #define MULTI_ARG_3_SI		V4SI_FTYPE_V4SI_V4SI_V4SI
+ #define MULTI_ARG_3_SI_DI	V4SI_FTYPE_V4SI_V4SI_V2DI
+ #define MULTI_ARG_3_HI		V8HI_FTYPE_V8HI_V8HI_V8HI
+ #define MULTI_ARG_3_HI_SI	V8HI_FTYPE_V8HI_V8HI_V4SI
+ #define MULTI_ARG_3_QI		V16QI_FTYPE_V16QI_V16QI_V16QI
+ #define MULTI_ARG_3_DI2		V4DI_FTYPE_V4DI_V4DI_V4DI
+ #define MULTI_ARG_3_SI2		V8SI_FTYPE_V8SI_V8SI_V8SI
+ #define MULTI_ARG_3_HI2		V16HI_FTYPE_V16HI_V16HI_V16HI
+ #define MULTI_ARG_3_QI2		V32QI_FTYPE_V32QI_V32QI_V32QI
+ #define MULTI_ARG_2_SF		V4SF_FTYPE_V4SF_V4SF
+ #define MULTI_ARG_2_DF		V2DF_FTYPE_V2DF_V2DF
+ #define MULTI_ARG_2_DI		V2DI_FTYPE_V2DI_V2DI
+ #define MULTI_ARG_2_SI		V4SI_FTYPE_V4SI_V4SI
+ #define MULTI_ARG_2_HI		V8HI_FTYPE_V8HI_V8HI
+ #define MULTI_ARG_2_QI		V16QI_FTYPE_V16QI_V16QI
+ #define MULTI_ARG_2_DI_IMM	V2DI_FTYPE_V2DI_SI
+ #define MULTI_ARG_2_SI_IMM	V4SI_FTYPE_V4SI_SI
+ #define MULTI_ARG_2_HI_IMM	V8HI_FTYPE_V8HI_SI
+ #define MULTI_ARG_2_QI_IMM	V16QI_FTYPE_V16QI_SI
+ #define MULTI_ARG_2_DI_CMP	V2DI_FTYPE_V2DI_V2DI_CMP
+ #define MULTI_ARG_2_SI_CMP	V4SI_FTYPE_V4SI_V4SI_CMP
+ #define MULTI_ARG_2_HI_CMP	V8HI_FTYPE_V8HI_V8HI_CMP
+ #define MULTI_ARG_2_QI_CMP	V16QI_FTYPE_V16QI_V16QI_CMP
+ #define MULTI_ARG_2_SF_TF	V4SF_FTYPE_V4SF_V4SF_TF
+ #define MULTI_ARG_2_DF_TF	V2DF_FTYPE_V2DF_V2DF_TF
+ #define MULTI_ARG_2_DI_TF	V2DI_FTYPE_V2DI_V2DI_TF
+ #define MULTI_ARG_2_SI_TF	V4SI_FTYPE_V4SI_V4SI_TF
+ #define MULTI_ARG_2_HI_TF	V8HI_FTYPE_V8HI_V8HI_TF
+ #define MULTI_ARG_2_QI_TF	V16QI_FTYPE_V16QI_V16QI_TF
+ #define MULTI_ARG_1_SF		V4SF_FTYPE_V4SF
+ #define MULTI_ARG_1_DF		V2DF_FTYPE_V2DF
+ #define MULTI_ARG_1_SF2		V8SF_FTYPE_V8SF
+ #define MULTI_ARG_1_DF2		V4DF_FTYPE_V4DF
+ #define MULTI_ARG_1_DI		V2DI_FTYPE_V2DI
+ #define MULTI_ARG_1_SI		V4SI_FTYPE_V4SI
+ #define MULTI_ARG_1_HI		V8HI_FTYPE_V8HI
+ #define MULTI_ARG_1_QI		V16QI_FTYPE_V16QI
+ #define MULTI_ARG_1_SI_DI	V2DI_FTYPE_V4SI
+ #define MULTI_ARG_1_HI_DI	V2DI_FTYPE_V8HI
+ #define MULTI_ARG_1_HI_SI	V4SI_FTYPE_V8HI
+ #define MULTI_ARG_1_QI_DI	V2DI_FTYPE_V16QI
+ #define MULTI_ARG_1_QI_SI	V4SI_FTYPE_V16QI
+ #define MULTI_ARG_1_QI_HI	V8HI_FTYPE_V16QI
+ 
+ #define BDESC(mask, mask2, icode, name, code, comparison, flag)	\
+   { mask, mask2, icode, name, code, comparison, flag },
+ #define BDESC_FIRST(kind, kindu, mask, mask2, icode, name, code, comparison, flag) \
+ static const struct builtin_description bdesc_##kind[] =		    \
+ {									    \
+   BDESC (mask, mask2, icode, name, code, comparison, flag)
+ #define BDESC_END(kind, next_kind) \
+ };
+ 
+ #include "i386-builtin.def"
+ 
+ extern builtin_isa ix86_builtins_isa[(int) IX86_BUILTIN_MAX];
+ 
+ tree ix86_builtin_vectorized_function (unsigned int fn, tree type_out,
+ 					      tree type_in);
+ void ix86_init_builtins (void);
+ tree ix86_vectorize_builtin_gather (const_tree mem_vectype,
+ 					   const_tree index_type, int scale);
+ tree ix86_builtin_decl (unsigned code, bool);
+ tree ix86_builtin_reciprocal (tree fndecl);
+ unsigned int get_builtin_code_for_version (tree decl, tree *predicate_list);
+ tree fold_builtin_cpu (tree fndecl, tree *args);
+ tree get_ix86_builtin (enum ix86_builtins c);
+ 
+ #endif  /* GCC_I386_BUILTINS_H */
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-c.c gcc-10.1.0/gcc/config/i386/i386-c.c
*** gcc-9.3.0/gcc/config/i386/i386-c.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386-c.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines used for macro/preprocessor support on the ia-32.
!    Copyright (C) 2008-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Subroutines used for macro/preprocessor support on the ia-32.
!    Copyright (C) 2008-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** ix86_target_macros_internal (HOST_WIDE_I
*** 222,227 ****
--- 222,234 ----
        def_or_undef (parse_in, "__cascadelake");
        def_or_undef (parse_in, "__cascadelake__");
        break;
+     case PROCESSOR_TIGERLAKE:
+       def_or_undef (parse_in, "__tigerlake");
+       def_or_undef (parse_in, "__tigerlake__");
+       break;
+     case PROCESSOR_COOPERLAKE:
+       def_or_undef (parse_in, "__cooperlake");
+       def_or_undef (parse_in, "__cooperlake__");
      /* use PROCESSOR_max to not set/unset the arch macro.  */
      case PROCESSOR_max:
        break;
*************** ix86_target_macros_internal (HOST_WIDE_I
*** 370,375 ****
--- 377,388 ----
      case PROCESSOR_CASCADELAKE:
        def_or_undef (parse_in, "__tune_cascadelake__");
        break;
+     case PROCESSOR_TIGERLAKE:
+       def_or_undef (parse_in, "__tune_tigerlake__");
+       break;
+     case PROCESSOR_COOPERLAKE:
+       def_or_undef (parse_in, "__tune_cooperlake__");
+       break;
      case PROCESSOR_INTEL:
      case PROCESSOR_GENERIC:
        break;
*************** ix86_target_macros_internal (HOST_WIDE_I
*** 402,409 ****
        ;
      }
  
!   if (isa_flag2 & OPTION_MASK_ISA_WBNOINVD)
      def_or_undef (parse_in, "__WBNOINVD__");
    if (isa_flag & OPTION_MASK_ISA_MMX)
      def_or_undef (parse_in, "__MMX__");
    if (isa_flag & OPTION_MASK_ISA_3DNOW)
--- 415,424 ----
        ;
      }
  
!   if (isa_flag2 & OPTION_MASK_ISA2_WBNOINVD)
      def_or_undef (parse_in, "__WBNOINVD__");
+   if (isa_flag2 & OPTION_MASK_ISA2_AVX512VP2INTERSECT)
+     def_or_undef (parse_in, "__AVX512VP2INTERSECT__");
    if (isa_flag & OPTION_MASK_ISA_MMX)
      def_or_undef (parse_in, "__MMX__");
    if (isa_flag & OPTION_MASK_ISA_3DNOW)
*************** ix86_target_macros_internal (HOST_WIDE_I
*** 450,466 ****
      def_or_undef (parse_in, "__AVX512VBMI__");
    if (isa_flag & OPTION_MASK_ISA_AVX512IFMA)
      def_or_undef (parse_in, "__AVX512IFMA__");
!   if (isa_flag2 & OPTION_MASK_ISA_AVX5124VNNIW)
      def_or_undef (parse_in, "__AVX5124VNNIW__");
    if (isa_flag & OPTION_MASK_ISA_AVX512VBMI2)
      def_or_undef (parse_in, "__AVX512VBMI2__");
    if (isa_flag & OPTION_MASK_ISA_AVX512VNNI)
      def_or_undef (parse_in, "__AVX512VNNI__");
!   if (isa_flag2 & OPTION_MASK_ISA_PCONFIG)
      def_or_undef (parse_in, "__PCONFIG__");
!   if (isa_flag2 & OPTION_MASK_ISA_SGX)
      def_or_undef (parse_in, "__SGX__");
!   if (isa_flag2 & OPTION_MASK_ISA_AVX5124FMAPS)
      def_or_undef (parse_in, "__AVX5124FMAPS__");
    if (isa_flag & OPTION_MASK_ISA_AVX512BITALG)
      def_or_undef (parse_in, "__AVX512BITALG__");
--- 465,481 ----
      def_or_undef (parse_in, "__AVX512VBMI__");
    if (isa_flag & OPTION_MASK_ISA_AVX512IFMA)
      def_or_undef (parse_in, "__AVX512IFMA__");
!   if (isa_flag2 & OPTION_MASK_ISA2_AVX5124VNNIW)
      def_or_undef (parse_in, "__AVX5124VNNIW__");
    if (isa_flag & OPTION_MASK_ISA_AVX512VBMI2)
      def_or_undef (parse_in, "__AVX512VBMI2__");
    if (isa_flag & OPTION_MASK_ISA_AVX512VNNI)
      def_or_undef (parse_in, "__AVX512VNNI__");
!   if (isa_flag2 & OPTION_MASK_ISA2_PCONFIG)
      def_or_undef (parse_in, "__PCONFIG__");
!   if (isa_flag2 & OPTION_MASK_ISA2_SGX)
      def_or_undef (parse_in, "__SGX__");
!   if (isa_flag2 & OPTION_MASK_ISA2_AVX5124FMAPS)
      def_or_undef (parse_in, "__AVX5124FMAPS__");
    if (isa_flag & OPTION_MASK_ISA_AVX512BITALG)
      def_or_undef (parse_in, "__AVX512BITALG__");
*************** ix86_target_macros_internal (HOST_WIDE_I
*** 516,522 ****
      def_or_undef (parse_in, "__SSE2_MATH__");
    if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT)
      def_or_undef (parse_in, "__CLFLUSHOPT__");
!   if (isa_flag2 & OPTION_MASK_ISA_CLZERO)
      def_or_undef (parse_in, "__CLZERO__");
    if (isa_flag & OPTION_MASK_ISA_XSAVEC)
      def_or_undef (parse_in, "__XSAVEC__");
--- 531,537 ----
      def_or_undef (parse_in, "__SSE2_MATH__");
    if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT)
      def_or_undef (parse_in, "__CLFLUSHOPT__");
!   if (isa_flag2 & OPTION_MASK_ISA2_CLZERO)
      def_or_undef (parse_in, "__CLZERO__");
    if (isa_flag & OPTION_MASK_ISA_XSAVEC)
      def_or_undef (parse_in, "__XSAVEC__");
*************** ix86_target_macros_internal (HOST_WIDE_I
*** 524,553 ****
      def_or_undef (parse_in, "__XSAVES__");
    if (isa_flag & OPTION_MASK_ISA_CLWB)
      def_or_undef (parse_in, "__CLWB__");
!   if (isa_flag2 & OPTION_MASK_ISA_MWAITX)
      def_or_undef (parse_in, "__MWAITX__");
    if (isa_flag & OPTION_MASK_ISA_PKU)
      def_or_undef (parse_in, "__PKU__");
!   if (isa_flag2 & OPTION_MASK_ISA_RDPID)
      def_or_undef (parse_in, "__RDPID__");
    if (isa_flag & OPTION_MASK_ISA_GFNI)
      def_or_undef (parse_in, "__GFNI__");
    if ((isa_flag & OPTION_MASK_ISA_SHSTK))
      def_or_undef (parse_in, "__SHSTK__");
!   if (isa_flag2 & OPTION_MASK_ISA_VAES)
      def_or_undef (parse_in, "__VAES__");
    if (isa_flag & OPTION_MASK_ISA_VPCLMULQDQ)
      def_or_undef (parse_in, "__VPCLMULQDQ__");
    if (isa_flag & OPTION_MASK_ISA_MOVDIRI)
      def_or_undef (parse_in, "__MOVDIRI__");
!   if (isa_flag2 & OPTION_MASK_ISA_MOVDIR64B)
      def_or_undef (parse_in, "__MOVDIR64B__");
!   if (isa_flag2 & OPTION_MASK_ISA_WAITPKG)
      def_or_undef (parse_in, "__WAITPKG__");
!   if (isa_flag2 & OPTION_MASK_ISA_CLDEMOTE)
      def_or_undef (parse_in, "__CLDEMOTE__");
!   if (isa_flag2 & OPTION_MASK_ISA_PTWRITE)
      def_or_undef (parse_in, "__PTWRITE__");
    if (TARGET_IAMCU)
      {
        def_or_undef (parse_in, "__iamcu");
--- 539,574 ----
      def_or_undef (parse_in, "__XSAVES__");
    if (isa_flag & OPTION_MASK_ISA_CLWB)
      def_or_undef (parse_in, "__CLWB__");
!   if (isa_flag2 & OPTION_MASK_ISA2_MWAITX)
      def_or_undef (parse_in, "__MWAITX__");
    if (isa_flag & OPTION_MASK_ISA_PKU)
      def_or_undef (parse_in, "__PKU__");
!   if (isa_flag2 & OPTION_MASK_ISA2_RDPID)
      def_or_undef (parse_in, "__RDPID__");
    if (isa_flag & OPTION_MASK_ISA_GFNI)
      def_or_undef (parse_in, "__GFNI__");
    if ((isa_flag & OPTION_MASK_ISA_SHSTK))
      def_or_undef (parse_in, "__SHSTK__");
!   if (isa_flag2 & OPTION_MASK_ISA2_VAES)
      def_or_undef (parse_in, "__VAES__");
    if (isa_flag & OPTION_MASK_ISA_VPCLMULQDQ)
      def_or_undef (parse_in, "__VPCLMULQDQ__");
    if (isa_flag & OPTION_MASK_ISA_MOVDIRI)
      def_or_undef (parse_in, "__MOVDIRI__");
!   if (isa_flag2 & OPTION_MASK_ISA2_MOVDIR64B)
      def_or_undef (parse_in, "__MOVDIR64B__");
!   if (isa_flag2 & OPTION_MASK_ISA2_WAITPKG)
      def_or_undef (parse_in, "__WAITPKG__");
!   if (isa_flag2 & OPTION_MASK_ISA2_CLDEMOTE)
      def_or_undef (parse_in, "__CLDEMOTE__");
!   if (isa_flag2 & OPTION_MASK_ISA2_PTWRITE)
      def_or_undef (parse_in, "__PTWRITE__");
+   if (isa_flag2 & OPTION_MASK_ISA2_AVX512BF16)
+     def_or_undef (parse_in, "__AVX512BF16__");
+   if (TARGET_MMX_WITH_SSE)
+     def_or_undef (parse_in, "__MMX_WITH_SSE__");
+   if (isa_flag2 & OPTION_MASK_ISA2_ENQCMD)
+     def_or_undef (parse_in, "__ENQCMD__");
    if (TARGET_IAMCU)
      {
        def_or_undef (parse_in, "__iamcu");
*************** ix86_pragma_target_parse (tree args, tre
*** 586,593 ****
      }
    else
      {
!       cur_tree = ix86_valid_target_attribute_tree (args, &global_options,
! 						   &global_options_set);
        if (!cur_tree || cur_tree == error_mark_node)
         {
           cl_target_option_restore (&global_options,
--- 607,615 ----
      }
    else
      {
!       cur_tree = ix86_valid_target_attribute_tree (NULL_TREE, args,
! 						   &global_options,
! 						   &global_options_set, 0);
        if (!cur_tree || cur_tree == error_mark_node)
         {
           cl_target_option_restore (&global_options,
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-d.c gcc-10.1.0/gcc/config/i386/i386-d.c
*** gcc-9.3.0/gcc/config/i386/i386-d.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386-d.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines for the D front end on the x86 architecture.
!    Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
  GCC is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
--- 1,5 ----
  /* Subroutines for the D front end on the x86 architecture.
!    Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
  GCC is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-expand.c gcc-10.1.0/gcc/config/i386/i386-expand.c
*** gcc-9.3.0/gcc/config/i386/i386-expand.c	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/i386/i386-expand.c	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,20271 ----
+ /* Copyright (C) 1988-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #define IN_TARGET_CODE 1
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "backend.h"
+ #include "rtl.h"
+ #include "tree.h"
+ #include "memmodel.h"
+ #include "gimple.h"
+ #include "cfghooks.h"
+ #include "cfgloop.h"
+ #include "df.h"
+ #include "tm_p.h"
+ #include "stringpool.h"
+ #include "expmed.h"
+ #include "optabs.h"
+ #include "regs.h"
+ #include "emit-rtl.h"
+ #include "recog.h"
+ #include "cgraph.h"
+ #include "diagnostic.h"
+ #include "cfgbuild.h"
+ #include "alias.h"
+ #include "fold-const.h"
+ #include "attribs.h"
+ #include "calls.h"
+ #include "stor-layout.h"
+ #include "varasm.h"
+ #include "output.h"
+ #include "insn-attr.h"
+ #include "flags.h"
+ #include "except.h"
+ #include "explow.h"
+ #include "expr.h"
+ #include "cfgrtl.h"
+ #include "common/common-target.h"
+ #include "langhooks.h"
+ #include "reload.h"
+ #include "gimplify.h"
+ #include "dwarf2.h"
+ #include "tm-constrs.h"
+ #include "cselib.h"
+ #include "sched-int.h"
+ #include "opts.h"
+ #include "tree-pass.h"
+ #include "context.h"
+ #include "pass_manager.h"
+ #include "target-globals.h"
+ #include "gimple-iterator.h"
+ #include "tree-vectorizer.h"
+ #include "shrink-wrap.h"
+ #include "builtins.h"
+ #include "rtl-iter.h"
+ #include "tree-iterator.h"
+ #include "dbgcnt.h"
+ #include "case-cfn-macros.h"
+ #include "dojump.h"
+ #include "fold-const-call.h"
+ #include "tree-vrp.h"
+ #include "tree-ssanames.h"
+ #include "selftest.h"
+ #include "selftest-rtl.h"
+ #include "print-rtl.h"
+ #include "intl.h"
+ #include "ifcvt.h"
+ #include "symbol-summary.h"
+ #include "ipa-prop.h"
+ #include "ipa-fnsummary.h"
+ #include "wide-int-bitmask.h"
+ #include "tree-vector-builder.h"
+ #include "debug.h"
+ #include "dwarf2out.h"
+ #include "i386-options.h"
+ #include "i386-builtins.h"
+ #include "i386-expand.h"
+ 
+ /* Split one or more double-mode RTL references into pairs of half-mode
+    references.  The RTL can be REG, offsettable MEM, integer constant, or
+    CONST_DOUBLE.  "operands" is a pointer to an array of double-mode RTLs to
+    split and "num" is its length.  lo_half and hi_half are output arrays
+    that parallel "operands".  */
+ 
+ void
+ split_double_mode (machine_mode mode, rtx operands[],
+ 		   int num, rtx lo_half[], rtx hi_half[])
+ {
+   machine_mode half_mode;
+   unsigned int byte;
+   rtx mem_op = NULL_RTX;
+   int mem_num = 0;
+ 
+   switch (mode)
+     {
+     case E_TImode:
+       half_mode = DImode;
+       break;
+     case E_DImode:
+       half_mode = SImode;
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   byte = GET_MODE_SIZE (half_mode);
+ 
+   while (num--)
+     {
+       rtx op = operands[num];
+ 
+       /* simplify_subreg refuse to split volatile memory addresses,
+          but we still have to handle it.  */
+       if (MEM_P (op))
+ 	{
+ 	  if (mem_op && rtx_equal_p (op, mem_op))
+ 	    {
+ 	      lo_half[num] = lo_half[mem_num];
+ 	      hi_half[num] = hi_half[mem_num];
+ 	    }
+ 	  else
+ 	    {
+ 	      mem_op = op;
+ 	      mem_num = num;
+ 	      lo_half[num] = adjust_address (op, half_mode, 0);
+ 	      hi_half[num] = adjust_address (op, half_mode, byte);
+ 	    }
+ 	}
+       else
+ 	{
+ 	  lo_half[num] = simplify_gen_subreg (half_mode, op,
+ 					      GET_MODE (op) == VOIDmode
+ 					      ? mode : GET_MODE (op), 0);
+ 	  hi_half[num] = simplify_gen_subreg (half_mode, op,
+ 					      GET_MODE (op) == VOIDmode
+ 					      ? mode : GET_MODE (op), byte);
+ 	}
+     }
+ }
+ 
+ /* Generate either "mov $0, reg" or "xor reg, reg", as appropriate
+    for the target.  */
+ 
+ void
+ ix86_expand_clear (rtx dest)
+ {
+   rtx tmp;
+ 
+   /* We play register width games, which are only valid after reload.  */
+   gcc_assert (reload_completed);
+ 
+   /* Avoid HImode and its attendant prefix byte.  */
+   if (GET_MODE_SIZE (GET_MODE (dest)) < 4)
+     dest = gen_rtx_REG (SImode, REGNO (dest));
+   tmp = gen_rtx_SET (dest, const0_rtx);
+ 
+   if (!TARGET_USE_MOV0 || optimize_insn_for_size_p ())
+     {
+       rtx clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
+       tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, tmp, clob));
+     }
+ 
+   emit_insn (tmp);
+ }
+ 
+ void
+ ix86_expand_move (machine_mode mode, rtx operands[])
+ {
+   rtx op0, op1;
+   rtx tmp, addend = NULL_RTX;
+   enum tls_model model;
+ 
+   op0 = operands[0];
+   op1 = operands[1];
+ 
+   switch (GET_CODE (op1))
+     {
+     case CONST:
+       tmp = XEXP (op1, 0);
+ 
+       if (GET_CODE (tmp) != PLUS
+ 	  || GET_CODE (XEXP (tmp, 0)) != SYMBOL_REF)
+ 	break;
+ 
+       op1 = XEXP (tmp, 0);
+       addend = XEXP (tmp, 1);
+       /* FALLTHRU */
+ 
+     case SYMBOL_REF:
+       model = SYMBOL_REF_TLS_MODEL (op1);
+ 
+       if (model)
+ 	op1 = legitimize_tls_address (op1, model, true);
+       else if (ix86_force_load_from_GOT_p (op1))
+ 	{
+ 	  /* Load the external function address via GOT slot to avoid PLT.  */
+ 	  op1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op1),
+ 				(TARGET_64BIT
+ 				 ? UNSPEC_GOTPCREL
+ 				 : UNSPEC_GOT));
+ 	  op1 = gen_rtx_CONST (Pmode, op1);
+ 	  op1 = gen_const_mem (Pmode, op1);
+ 	  set_mem_alias_set (op1, ix86_GOT_alias_set ());
+ 	}
+       else
+ 	{
+ 	  tmp = legitimize_pe_coff_symbol (op1, addend != NULL_RTX);
+ 	  if (tmp)
+ 	    {
+ 	      op1 = tmp;
+ 	      if (!addend)
+ 		break;
+ 	    }
+ 	  else
+ 	    {
+ 	      op1 = operands[1];
+ 	      break;
+ 	    }
+ 	}
+ 
+       if (addend)
+ 	{
+ 	  op1 = force_operand (op1, NULL_RTX);
+ 	  op1 = expand_simple_binop (Pmode, PLUS, op1, addend,
+ 				     op0, 1, OPTAB_DIRECT);
+ 	}
+       else
+ 	op1 = force_operand (op1, op0);
+ 
+       if (op1 == op0)
+ 	return;
+ 
+       op1 = convert_to_mode (mode, op1, 1);
+ 
+     default:
+       break;
+     }
+ 
+   if ((flag_pic || MACHOPIC_INDIRECT)
+       && symbolic_operand (op1, mode))
+     {
+       if (TARGET_MACHO && !TARGET_64BIT)
+ 	{
+ #if TARGET_MACHO
+ 	  /* dynamic-no-pic */
+ 	  if (MACHOPIC_INDIRECT)
+ 	    {
+ 	      rtx temp = (op0 && REG_P (op0) && mode == Pmode)
+ 			 ? op0 : gen_reg_rtx (Pmode);
+ 	      op1 = machopic_indirect_data_reference (op1, temp);
+ 	      if (MACHOPIC_PURE)
+ 		op1 = machopic_legitimize_pic_address (op1, mode,
+ 						       temp == op1 ? 0 : temp);
+ 	    }
+ 	  if (op0 != op1 && GET_CODE (op0) != MEM)
+ 	    {
+ 	      rtx insn = gen_rtx_SET (op0, op1);
+ 	      emit_insn (insn);
+ 	      return;
+ 	    }
+ 	  if (GET_CODE (op0) == MEM)
+ 	    op1 = force_reg (Pmode, op1);
+ 	  else
+ 	    {
+ 	      rtx temp = op0;
+ 	      if (GET_CODE (temp) != REG)
+ 		temp = gen_reg_rtx (Pmode);
+ 	      temp = legitimize_pic_address (op1, temp);
+ 	      if (temp == op0)
+ 	    return;
+ 	      op1 = temp;
+ 	    }
+       /* dynamic-no-pic */
+ #endif
+ 	}
+       else
+ 	{
+ 	  if (MEM_P (op0))
+ 	    op1 = force_reg (mode, op1);
+ 	  else if (!(TARGET_64BIT && x86_64_movabs_operand (op1, DImode)))
+ 	    {
+ 	      rtx reg = can_create_pseudo_p () ? NULL_RTX : op0;
+ 	      op1 = legitimize_pic_address (op1, reg);
+ 	      if (op0 == op1)
+ 		return;
+ 	      op1 = convert_to_mode (mode, op1, 1);
+ 	    }
+ 	}
+     }
+   else
+     {
+       if (MEM_P (op0)
+ 	  && (PUSH_ROUNDING (GET_MODE_SIZE (mode)) != GET_MODE_SIZE (mode)
+ 	      || !push_operand (op0, mode))
+ 	  && MEM_P (op1))
+ 	op1 = force_reg (mode, op1);
+ 
+       if (push_operand (op0, mode)
+ 	  && ! general_no_elim_operand (op1, mode))
+ 	op1 = copy_to_mode_reg (mode, op1);
+ 
+       /* Force large constants in 64bit compilation into register
+ 	 to get them CSEed.  */
+       if (can_create_pseudo_p ()
+ 	  && (mode == DImode) && TARGET_64BIT
+ 	  && immediate_operand (op1, mode)
+ 	  && !x86_64_zext_immediate_operand (op1, VOIDmode)
+ 	  && !register_operand (op0, mode)
+ 	  && optimize)
+ 	op1 = copy_to_mode_reg (mode, op1);
+ 
+       if (can_create_pseudo_p ()
+ 	  && CONST_DOUBLE_P (op1))
+ 	{
+ 	  /* If we are loading a floating point constant to a register,
+ 	     force the value to memory now, since we'll get better code
+ 	     out the back end.  */
+ 
+ 	  op1 = validize_mem (force_const_mem (mode, op1));
+ 	  if (!register_operand (op0, mode))
+ 	    {
+ 	      rtx temp = gen_reg_rtx (mode);
+ 	      emit_insn (gen_rtx_SET (temp, op1));
+ 	      emit_move_insn (op0, temp);
+ 	      return;
+ 	    }
+ 	}
+     }
+ 
+   emit_insn (gen_rtx_SET (op0, op1));
+ }
+ 
+ void
+ ix86_expand_vector_move (machine_mode mode, rtx operands[])
+ {
+   rtx op0 = operands[0], op1 = operands[1];
+   /* Use GET_MODE_BITSIZE instead of GET_MODE_ALIGNMENT for IA MCU
+      psABI since the biggest alignment is 4 byte for IA MCU psABI.  */
+   unsigned int align = (TARGET_IAMCU
+ 			? GET_MODE_BITSIZE (mode)
+ 			: GET_MODE_ALIGNMENT (mode));
+ 
+   if (push_operand (op0, VOIDmode))
+     op0 = emit_move_resolve_push (mode, op0);
+ 
+   /* Force constants other than zero into memory.  We do not know how
+      the instructions used to build constants modify the upper 64 bits
+      of the register, once we have that information we may be able
+      to handle some of them more efficiently.  */
+   if (can_create_pseudo_p ()
+       && (CONSTANT_P (op1)
+ 	  || (SUBREG_P (op1)
+ 	      && CONSTANT_P (SUBREG_REG (op1))))
+       && ((register_operand (op0, mode)
+ 	   && !standard_sse_constant_p (op1, mode))
+ 	  /* ix86_expand_vector_move_misalign() does not like constants.  */
+ 	  || (SSE_REG_MODE_P (mode)
+ 	      && MEM_P (op0)
+ 	      && MEM_ALIGN (op0) < align)))
+     {
+       if (SUBREG_P (op1))
+ 	{
+ 	  machine_mode imode = GET_MODE (SUBREG_REG (op1));
+ 	  rtx r = force_const_mem (imode, SUBREG_REG (op1));
+ 	  if (r)
+ 	    r = validize_mem (r);
+ 	  else
+ 	    r = force_reg (imode, SUBREG_REG (op1));
+ 	  op1 = simplify_gen_subreg (mode, r, imode, SUBREG_BYTE (op1));
+ 	}
+       else
+ 	op1 = validize_mem (force_const_mem (mode, op1));
+     }
+ 
+   /* We need to check memory alignment for SSE mode since attribute
+      can make operands unaligned.  */
+   if (can_create_pseudo_p ()
+       && SSE_REG_MODE_P (mode)
+       && ((MEM_P (op0) && (MEM_ALIGN (op0) < align))
+ 	  || (MEM_P (op1) && (MEM_ALIGN (op1) < align))))
+     {
+       rtx tmp[2];
+ 
+       /* ix86_expand_vector_move_misalign() does not like both
+ 	 arguments in memory.  */
+       if (!register_operand (op0, mode)
+ 	  && !register_operand (op1, mode))
+ 	op1 = force_reg (mode, op1);
+ 
+       tmp[0] = op0; tmp[1] = op1;
+       ix86_expand_vector_move_misalign (mode, tmp);
+       return;
+     }
+ 
+   /* Make operand1 a register if it isn't already.  */
+   if (can_create_pseudo_p ()
+       && !register_operand (op0, mode)
+       && !register_operand (op1, mode))
+     {
+       emit_move_insn (op0, force_reg (GET_MODE (op0), op1));
+       return;
+     }
+ 
+   emit_insn (gen_rtx_SET (op0, op1));
+ }
+ 
+ /* Split 32-byte AVX unaligned load and store if needed.  */
+ 
+ static void
+ ix86_avx256_split_vector_move_misalign (rtx op0, rtx op1)
+ {
+   rtx m;
+   rtx (*extract) (rtx, rtx, rtx);
+   machine_mode mode;
+ 
+   if ((MEM_P (op1) && !TARGET_AVX256_SPLIT_UNALIGNED_LOAD)
+       || (MEM_P (op0) && !TARGET_AVX256_SPLIT_UNALIGNED_STORE))
+     {
+       emit_insn (gen_rtx_SET (op0, op1));
+       return;
+     }
+ 
+   rtx orig_op0 = NULL_RTX;
+   mode = GET_MODE (op0);
+   switch (GET_MODE_CLASS (mode))
+     {
+     case MODE_VECTOR_INT:
+     case MODE_INT:
+       if (mode != V32QImode)
+ 	{
+ 	  if (!MEM_P (op0))
+ 	    {
+ 	      orig_op0 = op0;
+ 	      op0 = gen_reg_rtx (V32QImode);
+ 	    }
+ 	  else
+ 	    op0 = gen_lowpart (V32QImode, op0);
+ 	  op1 = gen_lowpart (V32QImode, op1);
+ 	  mode = V32QImode;
+ 	}
+       break;
+     case MODE_VECTOR_FLOAT:
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   switch (mode)
+     {
+     default:
+       gcc_unreachable ();
+     case E_V32QImode:
+       extract = gen_avx_vextractf128v32qi;
+       mode = V16QImode;
+       break;
+     case E_V8SFmode:
+       extract = gen_avx_vextractf128v8sf;
+       mode = V4SFmode;
+       break;
+     case E_V4DFmode:
+       extract = gen_avx_vextractf128v4df;
+       mode = V2DFmode;
+       break;
+     }
+ 
+   if (MEM_P (op1))
+     {
+       rtx r = gen_reg_rtx (mode);
+       m = adjust_address (op1, mode, 0);
+       emit_move_insn (r, m);
+       m = adjust_address (op1, mode, 16);
+       r = gen_rtx_VEC_CONCAT (GET_MODE (op0), r, m);
+       emit_move_insn (op0, r);
+     }
+   else if (MEM_P (op0))
+     {
+       m = adjust_address (op0, mode, 0);
+       emit_insn (extract (m, op1, const0_rtx));
+       m = adjust_address (op0, mode, 16);
+       emit_insn (extract (m, copy_rtx (op1), const1_rtx));
+     }
+   else
+     gcc_unreachable ();
+ 
+   if (orig_op0)
+     emit_move_insn (orig_op0, gen_lowpart (GET_MODE (orig_op0), op0));
+ }
+ 
+ /* Implement the movmisalign patterns for SSE.  Non-SSE modes go
+    straight to ix86_expand_vector_move.  */
+ /* Code generation for scalar reg-reg moves of single and double precision data:
+      if (x86_sse_partial_reg_dependency == true | x86_sse_split_regs == true)
+        movaps reg, reg
+      else
+        movss reg, reg
+      if (x86_sse_partial_reg_dependency == true)
+        movapd reg, reg
+      else
+        movsd reg, reg
+ 
+    Code generation for scalar loads of double precision data:
+      if (x86_sse_split_regs == true)
+        movlpd mem, reg      (gas syntax)
+      else
+        movsd mem, reg
+ 
+    Code generation for unaligned packed loads of single precision data
+    (x86_sse_unaligned_move_optimal overrides x86_sse_partial_reg_dependency):
+      if (x86_sse_unaligned_move_optimal)
+        movups mem, reg
+ 
+      if (x86_sse_partial_reg_dependency == true)
+        {
+          xorps  reg, reg
+          movlps mem, reg
+          movhps mem+8, reg
+        }
+      else
+        {
+          movlps mem, reg
+          movhps mem+8, reg
+        }
+ 
+    Code generation for unaligned packed loads of double precision data
+    (x86_sse_unaligned_move_optimal overrides x86_sse_split_regs):
+      if (x86_sse_unaligned_move_optimal)
+        movupd mem, reg
+ 
+      if (x86_sse_split_regs == true)
+        {
+          movlpd mem, reg
+          movhpd mem+8, reg
+        }
+      else
+        {
+          movsd  mem, reg
+          movhpd mem+8, reg
+        }
+  */
+ 
+ void
+ ix86_expand_vector_move_misalign (machine_mode mode, rtx operands[])
+ {
+   rtx op0, op1, m;
+ 
+   op0 = operands[0];
+   op1 = operands[1];
+ 
+   /* Use unaligned load/store for AVX512 or when optimizing for size.  */
+   if (GET_MODE_SIZE (mode) == 64 || optimize_insn_for_size_p ())
+     {
+       emit_insn (gen_rtx_SET (op0, op1));
+       return;
+     }
+ 
+   if (TARGET_AVX)
+     {
+       if (GET_MODE_SIZE (mode) == 32)
+ 	ix86_avx256_split_vector_move_misalign (op0, op1);
+       else
+ 	/* Always use 128-bit mov<mode>_internal pattern for AVX.  */
+ 	emit_insn (gen_rtx_SET (op0, op1));
+       return;
+     }
+ 
+   if (TARGET_SSE_UNALIGNED_LOAD_OPTIMAL
+       || TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL)
+     {
+       emit_insn (gen_rtx_SET (op0, op1));
+       return;
+     }
+ 
+   /* ??? If we have typed data, then it would appear that using
+      movdqu is the only way to get unaligned data loaded with
+      integer type.  */
+   if (TARGET_SSE2 && GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
+     {
+       emit_insn (gen_rtx_SET (op0, op1));
+       return;
+     }
+ 
+   if (MEM_P (op1))
+     {
+       if (TARGET_SSE2 && mode == V2DFmode)
+         {
+           rtx zero;
+ 
+ 	  /* When SSE registers are split into halves, we can avoid
+ 	     writing to the top half twice.  */
+ 	  if (TARGET_SSE_SPLIT_REGS)
+ 	    {
+ 	      emit_clobber (op0);
+ 	      zero = op0;
+ 	    }
+ 	  else
+ 	    {
+ 	      /* ??? Not sure about the best option for the Intel chips.
+ 		 The following would seem to satisfy; the register is
+ 		 entirely cleared, breaking the dependency chain.  We
+ 		 then store to the upper half, with a dependency depth
+ 		 of one.  A rumor has it that Intel recommends two movsd
+ 		 followed by an unpacklpd, but this is unconfirmed.  And
+ 		 given that the dependency depth of the unpacklpd would
+ 		 still be one, I'm not sure why this would be better.  */
+ 	      zero = CONST0_RTX (V2DFmode);
+ 	    }
+ 
+ 	  m = adjust_address (op1, DFmode, 0);
+ 	  emit_insn (gen_sse2_loadlpd (op0, zero, m));
+ 	  m = adjust_address (op1, DFmode, 8);
+ 	  emit_insn (gen_sse2_loadhpd (op0, op0, m));
+ 	}
+       else
+         {
+ 	  rtx t;
+ 
+ 	  if (mode != V4SFmode)
+ 	    t = gen_reg_rtx (V4SFmode);
+ 	  else
+ 	    t = op0;
+ 	    
+ 	  if (TARGET_SSE_PARTIAL_REG_DEPENDENCY)
+ 	    emit_move_insn (t, CONST0_RTX (V4SFmode));
+ 	  else
+ 	    emit_clobber (t);
+ 
+ 	  m = adjust_address (op1, V2SFmode, 0);
+ 	  emit_insn (gen_sse_loadlps (t, t, m));
+ 	  m = adjust_address (op1, V2SFmode, 8);
+ 	  emit_insn (gen_sse_loadhps (t, t, m));
+ 	  if (mode != V4SFmode)
+ 	    emit_move_insn (op0, gen_lowpart (mode, t));
+ 	}
+     }
+   else if (MEM_P (op0))
+     {
+       if (TARGET_SSE2 && mode == V2DFmode)
+ 	{
+ 	  m = adjust_address (op0, DFmode, 0);
+ 	  emit_insn (gen_sse2_storelpd (m, op1));
+ 	  m = adjust_address (op0, DFmode, 8);
+ 	  emit_insn (gen_sse2_storehpd (m, op1));
+ 	}
+       else
+ 	{
+ 	  if (mode != V4SFmode)
+ 	    op1 = gen_lowpart (V4SFmode, op1);
+ 
+ 	  m = adjust_address (op0, V2SFmode, 0);
+ 	  emit_insn (gen_sse_storelps (m, op1));
+ 	  m = adjust_address (op0, V2SFmode, 8);
+ 	  emit_insn (gen_sse_storehps (m, copy_rtx (op1)));
+ 	}
+     }
+   else
+     gcc_unreachable ();
+ }
+ 
+ /* Move bits 64:95 to bits 32:63.  */
+ 
+ void
+ ix86_move_vector_high_sse_to_mmx (rtx op)
+ {
+   rtx mask = gen_rtx_PARALLEL (VOIDmode,
+ 			       gen_rtvec (4, GEN_INT (0), GEN_INT (2),
+ 					  GEN_INT (0), GEN_INT (0)));
+   rtx dest = lowpart_subreg (V4SImode, op, GET_MODE (op));
+   op = gen_rtx_VEC_SELECT (V4SImode, dest, mask);
+   rtx insn = gen_rtx_SET (dest, op);
+   emit_insn (insn);
+ }
+ 
+ /* Split MMX pack with signed/unsigned saturation with SSE/SSE2.  */
+ 
+ void
+ ix86_split_mmx_pack (rtx operands[], enum rtx_code code)
+ {
+   rtx op0 = operands[0];
+   rtx op1 = operands[1];
+   rtx op2 = operands[2];
+ 
+   machine_mode dmode = GET_MODE (op0);
+   machine_mode smode = GET_MODE (op1);
+   machine_mode inner_dmode = GET_MODE_INNER (dmode);
+   machine_mode inner_smode = GET_MODE_INNER (smode);
+ 
+   /* Get the corresponding SSE mode for destination.  */
+   int nunits = 16 / GET_MODE_SIZE (inner_dmode);
+   machine_mode sse_dmode = mode_for_vector (GET_MODE_INNER (dmode),
+ 					    nunits).require ();
+   machine_mode sse_half_dmode = mode_for_vector (GET_MODE_INNER (dmode),
+ 						 nunits / 2).require ();
+ 
+   /* Get the corresponding SSE mode for source.  */
+   nunits = 16 / GET_MODE_SIZE (inner_smode);
+   machine_mode sse_smode = mode_for_vector (GET_MODE_INNER (smode),
+ 					    nunits).require ();
+ 
+   /* Generate SSE pack with signed/unsigned saturation.  */
+   rtx dest = lowpart_subreg (sse_dmode, op0, GET_MODE (op0));
+   op1 = lowpart_subreg (sse_smode, op1, GET_MODE (op1));
+   op2 = lowpart_subreg (sse_smode, op2, GET_MODE (op2));
+ 
+   op1 = gen_rtx_fmt_e (code, sse_half_dmode, op1);
+   op2 = gen_rtx_fmt_e (code, sse_half_dmode, op2);
+   rtx insn = gen_rtx_SET (dest, gen_rtx_VEC_CONCAT (sse_dmode,
+ 						    op1, op2));
+   emit_insn (insn);
+ 
+   ix86_move_vector_high_sse_to_mmx (op0);
+ }
+ 
+ /* Split MMX punpcklXX/punpckhXX with SSE punpcklXX.  */
+ 
+ void
+ ix86_split_mmx_punpck (rtx operands[], bool high_p)
+ {
+   rtx op0 = operands[0];
+   rtx op1 = operands[1];
+   rtx op2 = operands[2];
+   machine_mode mode = GET_MODE (op0);
+   rtx mask;
+   /* The corresponding SSE mode.  */
+   machine_mode sse_mode, double_sse_mode;
+ 
+   switch (mode)
+     {
+     case E_V8QImode:
+       sse_mode = V16QImode;
+       double_sse_mode = V32QImode;
+       mask = gen_rtx_PARALLEL (VOIDmode,
+ 			       gen_rtvec (16,
+ 					  GEN_INT (0), GEN_INT (16),
+ 					  GEN_INT (1), GEN_INT (17),
+ 					  GEN_INT (2), GEN_INT (18),
+ 					  GEN_INT (3), GEN_INT (19),
+ 					  GEN_INT (4), GEN_INT (20),
+ 					  GEN_INT (5), GEN_INT (21),
+ 					  GEN_INT (6), GEN_INT (22),
+ 					  GEN_INT (7), GEN_INT (23)));
+       break;
+ 
+     case E_V4HImode:
+       sse_mode = V8HImode;
+       double_sse_mode = V16HImode;
+       mask = gen_rtx_PARALLEL (VOIDmode,
+ 			       gen_rtvec (8,
+ 					  GEN_INT (0), GEN_INT (8),
+ 					  GEN_INT (1), GEN_INT (9),
+ 					  GEN_INT (2), GEN_INT (10),
+ 					  GEN_INT (3), GEN_INT (11)));
+       break;
+ 
+     case E_V2SImode:
+       sse_mode = V4SImode;
+       double_sse_mode = V8SImode;
+       mask = gen_rtx_PARALLEL (VOIDmode,
+ 			       gen_rtvec (4,
+ 					  GEN_INT (0), GEN_INT (4),
+ 					  GEN_INT (1), GEN_INT (5)));
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   /* Generate SSE punpcklXX.  */
+   rtx dest = lowpart_subreg (sse_mode, op0, GET_MODE (op0));
+   op1 = lowpart_subreg (sse_mode, op1, GET_MODE (op1));
+   op2 = lowpart_subreg (sse_mode, op2, GET_MODE (op2));
+ 
+   op1 = gen_rtx_VEC_CONCAT (double_sse_mode, op1, op2);
+   op2 = gen_rtx_VEC_SELECT (sse_mode, op1, mask);
+   rtx insn = gen_rtx_SET (dest, op2);
+   emit_insn (insn);
+ 
+   if (high_p)
+     {
+       /* Move bits 64:127 to bits 0:63.  */
+       mask = gen_rtx_PARALLEL (VOIDmode,
+ 			       gen_rtvec (4, GEN_INT (2), GEN_INT (3),
+ 					  GEN_INT (0), GEN_INT (0)));
+       dest = lowpart_subreg (V4SImode, dest, GET_MODE (dest));
+       op1 = gen_rtx_VEC_SELECT (V4SImode, dest, mask);
+       insn = gen_rtx_SET (dest, op1);
+       emit_insn (insn);
+     }
+ }
+ 
+ /* Helper function of ix86_fixup_binary_operands to canonicalize
+    operand order.  Returns true if the operands should be swapped.  */
+ 
+ static bool
+ ix86_swap_binary_operands_p (enum rtx_code code, machine_mode mode,
+ 			     rtx operands[])
+ {
+   rtx dst = operands[0];
+   rtx src1 = operands[1];
+   rtx src2 = operands[2];
+ 
+   /* If the operation is not commutative, we can't do anything.  */
+   if (GET_RTX_CLASS (code) != RTX_COMM_ARITH
+       && GET_RTX_CLASS (code) != RTX_COMM_COMPARE)
+     return false;
+ 
+   /* Highest priority is that src1 should match dst.  */
+   if (rtx_equal_p (dst, src1))
+     return false;
+   if (rtx_equal_p (dst, src2))
+     return true;
+ 
+   /* Next highest priority is that immediate constants come second.  */
+   if (immediate_operand (src2, mode))
+     return false;
+   if (immediate_operand (src1, mode))
+     return true;
+ 
+   /* Lowest priority is that memory references should come second.  */
+   if (MEM_P (src2))
+     return false;
+   if (MEM_P (src1))
+     return true;
+ 
+   return false;
+ }
+ 
+ 
+ /* Fix up OPERANDS to satisfy ix86_binary_operator_ok.  Return the
+    destination to use for the operation.  If different from the true
+    destination in operands[0], a copy operation will be required.  */
+ 
+ rtx
+ ix86_fixup_binary_operands (enum rtx_code code, machine_mode mode,
+ 			    rtx operands[])
+ {
+   rtx dst = operands[0];
+   rtx src1 = operands[1];
+   rtx src2 = operands[2];
+ 
+   /* Canonicalize operand order.  */
+   if (ix86_swap_binary_operands_p (code, mode, operands))
+     {
+       /* It is invalid to swap operands of different modes.  */
+       gcc_assert (GET_MODE (src1) == GET_MODE (src2));
+ 
+       std::swap (src1, src2);
+     }
+ 
+   /* Both source operands cannot be in memory.  */
+   if (MEM_P (src1) && MEM_P (src2))
+     {
+       /* Optimization: Only read from memory once.  */
+       if (rtx_equal_p (src1, src2))
+ 	{
+ 	  src2 = force_reg (mode, src2);
+ 	  src1 = src2;
+ 	}
+       else if (rtx_equal_p (dst, src1))
+ 	src2 = force_reg (mode, src2);
+       else
+ 	src1 = force_reg (mode, src1);
+     }
+ 
+   /* If the destination is memory, and we do not have matching source
+      operands, do things in registers.  */
+   if (MEM_P (dst) && !rtx_equal_p (dst, src1))
+     dst = gen_reg_rtx (mode);
+ 
+   /* Source 1 cannot be a constant.  */
+   if (CONSTANT_P (src1))
+     src1 = force_reg (mode, src1);
+ 
+   /* Source 1 cannot be a non-matching memory.  */
+   if (MEM_P (src1) && !rtx_equal_p (dst, src1))
+     src1 = force_reg (mode, src1);
+ 
+   /* Improve address combine.  */
+   if (code == PLUS
+       && GET_MODE_CLASS (mode) == MODE_INT
+       && MEM_P (src2))
+     src2 = force_reg (mode, src2);
+ 
+   operands[1] = src1;
+   operands[2] = src2;
+   return dst;
+ }
+ 
+ /* Similarly, but assume that the destination has already been
+    set up properly.  */
+ 
+ void
+ ix86_fixup_binary_operands_no_copy (enum rtx_code code,
+ 				    machine_mode mode, rtx operands[])
+ {
+   rtx dst = ix86_fixup_binary_operands (code, mode, operands);
+   gcc_assert (dst == operands[0]);
+ }
+ 
+ /* Attempt to expand a binary operator.  Make the expansion closer to the
+    actual machine, then just general_operand, which will allow 3 separate
+    memory references (one output, two input) in a single insn.  */
+ 
+ void
+ ix86_expand_binary_operator (enum rtx_code code, machine_mode mode,
+ 			     rtx operands[])
+ {
+   rtx src1, src2, dst, op, clob;
+ 
+   dst = ix86_fixup_binary_operands (code, mode, operands);
+   src1 = operands[1];
+   src2 = operands[2];
+ 
+  /* Emit the instruction.  */
+ 
+   op = gen_rtx_SET (dst, gen_rtx_fmt_ee (code, mode, src1, src2));
+ 
+   if (reload_completed
+       && code == PLUS
+       && !rtx_equal_p (dst, src1))
+     {
+       /* This is going to be an LEA; avoid splitting it later.  */
+       emit_insn (op);
+     }
+   else
+     {
+       clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
+       emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, op, clob)));
+     }
+ 
+   /* Fix up the destination if needed.  */
+   if (dst != operands[0])
+     emit_move_insn (operands[0], dst);
+ }
+ 
+ /* Expand vector logical operation CODE (AND, IOR, XOR) in MODE with
+    the given OPERANDS.  */
+ 
+ void
+ ix86_expand_vector_logical_operator (enum rtx_code code, machine_mode mode,
+ 				     rtx operands[])
+ {
+   rtx op1 = NULL_RTX, op2 = NULL_RTX;
+   if (SUBREG_P (operands[1]))
+     {
+       op1 = operands[1];
+       op2 = operands[2];
+     }
+   else if (SUBREG_P (operands[2]))
+     {
+       op1 = operands[2];
+       op2 = operands[1];
+     }
+   /* Optimize (__m128i) d | (__m128i) e and similar code
+      when d and e are float vectors into float vector logical
+      insn.  In C/C++ without using intrinsics there is no other way
+      to express vector logical operation on float vectors than
+      to cast them temporarily to integer vectors.  */
+   if (op1
+       && !TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL
+       && (SUBREG_P (op2) || GET_CODE (op2) == CONST_VECTOR)
+       && GET_MODE_CLASS (GET_MODE (SUBREG_REG (op1))) == MODE_VECTOR_FLOAT
+       && GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))) == GET_MODE_SIZE (mode)
+       && SUBREG_BYTE (op1) == 0
+       && (GET_CODE (op2) == CONST_VECTOR
+ 	  || (GET_MODE (SUBREG_REG (op1)) == GET_MODE (SUBREG_REG (op2))
+ 	      && SUBREG_BYTE (op2) == 0))
+       && can_create_pseudo_p ())
+     {
+       rtx dst;
+       switch (GET_MODE (SUBREG_REG (op1)))
+ 	{
+ 	case E_V4SFmode:
+ 	case E_V8SFmode:
+ 	case E_V16SFmode:
+ 	case E_V2DFmode:
+ 	case E_V4DFmode:
+ 	case E_V8DFmode:
+ 	  dst = gen_reg_rtx (GET_MODE (SUBREG_REG (op1)));
+ 	  if (GET_CODE (op2) == CONST_VECTOR)
+ 	    {
+ 	      op2 = gen_lowpart (GET_MODE (dst), op2);
+ 	      op2 = force_reg (GET_MODE (dst), op2);
+ 	    }
+ 	  else
+ 	    {
+ 	      op1 = operands[1];
+ 	      op2 = SUBREG_REG (operands[2]);
+ 	      if (!vector_operand (op2, GET_MODE (dst)))
+ 		op2 = force_reg (GET_MODE (dst), op2);
+ 	    }
+ 	  op1 = SUBREG_REG (op1);
+ 	  if (!vector_operand (op1, GET_MODE (dst)))
+ 	    op1 = force_reg (GET_MODE (dst), op1);
+ 	  emit_insn (gen_rtx_SET (dst,
+ 				  gen_rtx_fmt_ee (code, GET_MODE (dst),
+ 						  op1, op2)));
+ 	  emit_move_insn (operands[0], gen_lowpart (mode, dst));
+ 	  return;
+ 	default:
+ 	  break;
+ 	}
+     }
+   if (!vector_operand (operands[1], mode))
+     operands[1] = force_reg (mode, operands[1]);
+   if (!vector_operand (operands[2], mode))
+     operands[2] = force_reg (mode, operands[2]);
+   ix86_fixup_binary_operands_no_copy (code, mode, operands);
+   emit_insn (gen_rtx_SET (operands[0],
+ 			  gen_rtx_fmt_ee (code, mode, operands[1],
+ 					  operands[2])));
+ }
+ 
+ /* Return TRUE or FALSE depending on whether the binary operator meets the
+    appropriate constraints.  */
+ 
+ bool
+ ix86_binary_operator_ok (enum rtx_code code, machine_mode mode,
+ 			 rtx operands[3])
+ {
+   rtx dst = operands[0];
+   rtx src1 = operands[1];
+   rtx src2 = operands[2];
+ 
+   /* Both source operands cannot be in memory.  */
+   if (MEM_P (src1) && MEM_P (src2))
+     return false;
+ 
+   /* Canonicalize operand order for commutative operators.  */
+   if (ix86_swap_binary_operands_p (code, mode, operands))
+     std::swap (src1, src2);
+ 
+   /* If the destination is memory, we must have a matching source operand.  */
+   if (MEM_P (dst) && !rtx_equal_p (dst, src1))
+     return false;
+ 
+   /* Source 1 cannot be a constant.  */
+   if (CONSTANT_P (src1))
+     return false;
+ 
+   /* Source 1 cannot be a non-matching memory.  */
+   if (MEM_P (src1) && !rtx_equal_p (dst, src1))
+     /* Support "andhi/andsi/anddi" as a zero-extending move.  */
+     return (code == AND
+ 	    && (mode == HImode
+ 		|| mode == SImode
+ 		|| (TARGET_64BIT && mode == DImode))
+ 	    && satisfies_constraint_L (src2));
+ 
+   return true;
+ }
+ 
+ /* Attempt to expand a unary operator.  Make the expansion closer to the
+    actual machine, then just general_operand, which will allow 2 separate
+    memory references (one output, one input) in a single insn.  */
+ 
+ void
+ ix86_expand_unary_operator (enum rtx_code code, machine_mode mode,
+ 			    rtx operands[])
+ {
+   bool matching_memory = false;
+   rtx src, dst, op, clob;
+ 
+   dst = operands[0];
+   src = operands[1];
+ 
+   /* If the destination is memory, and we do not have matching source
+      operands, do things in registers.  */
+   if (MEM_P (dst))
+     {
+       if (rtx_equal_p (dst, src))
+ 	matching_memory = true;
+       else
+ 	dst = gen_reg_rtx (mode);
+     }
+ 
+   /* When source operand is memory, destination must match.  */
+   if (MEM_P (src) && !matching_memory)
+     src = force_reg (mode, src);
+ 
+   /* Emit the instruction.  */
+ 
+   op = gen_rtx_SET (dst, gen_rtx_fmt_e (code, mode, src));
+ 
+   if (code == NOT)
+     emit_insn (op);
+   else
+     {
+       clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
+       emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, op, clob)));
+     }
+ 
+   /* Fix up the destination if needed.  */
+   if (dst != operands[0])
+     emit_move_insn (operands[0], dst);
+ }
+ 
+ /* Predict just emitted jump instruction to be taken with probability PROB.  */
+ 
+ static void
+ predict_jump (int prob)
+ {
+   rtx_insn *insn = get_last_insn ();
+   gcc_assert (JUMP_P (insn));
+   add_reg_br_prob_note (insn, profile_probability::from_reg_br_prob_base (prob));
+ }
+ 
+ /* Split 32bit/64bit divmod with 8bit unsigned divmod if dividend and
+    divisor are within the range [0-255].  */
+ 
+ void
+ ix86_split_idivmod (machine_mode mode, rtx operands[],
+ 		    bool unsigned_p)
+ {
+   rtx_code_label *end_label, *qimode_label;
+   rtx div, mod;
+   rtx_insn *insn;
+   rtx scratch, tmp0, tmp1, tmp2;
+   rtx (*gen_divmod4_1) (rtx, rtx, rtx, rtx);
+ 
+   switch (mode)
+     {
+     case E_SImode:
+       if (GET_MODE (operands[0]) == SImode)
+ 	{
+ 	  if (GET_MODE (operands[1]) == SImode)
+ 	    gen_divmod4_1 = unsigned_p ? gen_udivmodsi4_1 : gen_divmodsi4_1;
+ 	  else
+ 	    gen_divmod4_1
+ 	      = unsigned_p ? gen_udivmodsi4_zext_2 : gen_divmodsi4_zext_2;
+ 	}
+       else
+ 	gen_divmod4_1
+ 	  = unsigned_p ? gen_udivmodsi4_zext_1 : gen_divmodsi4_zext_1;
+       break;
+ 
+     case E_DImode:
+       gen_divmod4_1 = unsigned_p ? gen_udivmoddi4_1 : gen_divmoddi4_1;
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   end_label = gen_label_rtx ();
+   qimode_label = gen_label_rtx ();
+ 
+   scratch = gen_reg_rtx (mode);
+ 
+   /* Use 8bit unsigned divimod if dividend and divisor are within
+      the range [0-255].  */
+   emit_move_insn (scratch, operands[2]);
+   scratch = expand_simple_binop (mode, IOR, scratch, operands[3],
+ 				 scratch, 1, OPTAB_DIRECT);
+   emit_insn (gen_test_ccno_1 (mode, scratch, GEN_INT (-0x100)));
+   tmp0 = gen_rtx_REG (CCNOmode, FLAGS_REG);
+   tmp0 = gen_rtx_EQ (VOIDmode, tmp0, const0_rtx);
+   tmp0 = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp0,
+ 			       gen_rtx_LABEL_REF (VOIDmode, qimode_label),
+ 			       pc_rtx);
+   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp0));
+   predict_jump (REG_BR_PROB_BASE * 50 / 100);
+   JUMP_LABEL (insn) = qimode_label;
+ 
+   /* Generate original signed/unsigned divimod.  */
+   div = gen_divmod4_1 (operands[0], operands[1],
+ 		       operands[2], operands[3]);
+   emit_insn (div);
+ 
+   /* Branch to the end.  */
+   emit_jump_insn (gen_jump (end_label));
+   emit_barrier ();
+ 
+   /* Generate 8bit unsigned divide.  */
+   emit_label (qimode_label);
+   /* Don't use operands[0] for result of 8bit divide since not all
+      registers support QImode ZERO_EXTRACT.  */
+   tmp0 = lowpart_subreg (HImode, scratch, mode);
+   tmp1 = lowpart_subreg (HImode, operands[2], mode);
+   tmp2 = lowpart_subreg (QImode, operands[3], mode);
+   emit_insn (gen_udivmodhiqi3 (tmp0, tmp1, tmp2));
+ 
+   if (unsigned_p)
+     {
+       div = gen_rtx_UDIV (mode, operands[2], operands[3]);
+       mod = gen_rtx_UMOD (mode, operands[2], operands[3]);
+     }
+   else
+     {
+       div = gen_rtx_DIV (mode, operands[2], operands[3]);
+       mod = gen_rtx_MOD (mode, operands[2], operands[3]);
+     }
+   if (mode == SImode)
+     {
+       if (GET_MODE (operands[0]) != SImode)
+ 	div = gen_rtx_ZERO_EXTEND (DImode, div);
+       if (GET_MODE (operands[1]) != SImode)
+ 	mod = gen_rtx_ZERO_EXTEND (DImode, mod);
+     }
+ 
+   /* Extract remainder from AH.  */
+   tmp1 = gen_rtx_ZERO_EXTRACT (GET_MODE (operands[1]),
+ 			       tmp0, GEN_INT (8), GEN_INT (8));
+   if (REG_P (operands[1]))
+     insn = emit_move_insn (operands[1], tmp1);
+   else
+     {
+       /* Need a new scratch register since the old one has result
+ 	 of 8bit divide.  */
+       scratch = gen_reg_rtx (GET_MODE (operands[1]));
+       emit_move_insn (scratch, tmp1);
+       insn = emit_move_insn (operands[1], scratch);
+     }
+   set_unique_reg_note (insn, REG_EQUAL, mod);
+ 
+   /* Zero extend quotient from AL.  */
+   tmp1 = gen_lowpart (QImode, tmp0);
+   insn = emit_insn (gen_extend_insn
+ 		    (operands[0], tmp1,
+ 		     GET_MODE (operands[0]), QImode, 1));
+   set_unique_reg_note (insn, REG_EQUAL, div);
+ 
+   emit_label (end_label);
+ }
+ 
+ /* Emit x86 binary operand CODE in mode MODE, where the first operand
+    matches destination.  RTX includes clobber of FLAGS_REG.  */
+ 
+ void
+ ix86_emit_binop (enum rtx_code code, machine_mode mode,
+ 		 rtx dst, rtx src)
+ {
+   rtx op, clob;
+ 
+   op = gen_rtx_SET (dst, gen_rtx_fmt_ee (code, mode, dst, src));
+   clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
+   
+   emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, op, clob)));
+ }
+ 
+ /* Return true if regno1 def is nearest to the insn.  */
+ 
+ static bool
+ find_nearest_reg_def (rtx_insn *insn, int regno1, int regno2)
+ {
+   rtx_insn *prev = insn;
+   rtx_insn *start = BB_HEAD (BLOCK_FOR_INSN (insn));
+ 
+   if (insn == start)
+     return false;
+   while (prev && prev != start)
+     {
+       if (!INSN_P (prev) || !NONDEBUG_INSN_P (prev))
+ 	{
+ 	  prev = PREV_INSN (prev);
+ 	  continue;
+ 	}
+       if (insn_defines_reg (regno1, INVALID_REGNUM, prev))
+ 	return true;
+       else if (insn_defines_reg (regno2, INVALID_REGNUM, prev))
+ 	return false;
+       prev = PREV_INSN (prev);
+     }
+ 
+   /* None of the regs is defined in the bb.  */
+   return false;
+ }
+ 
+ /* Split lea instructions into a sequence of instructions
+    which are executed on ALU to avoid AGU stalls.
+    It is assumed that it is allowed to clobber flags register
+    at lea position.  */
+ 
+ void
+ ix86_split_lea_for_addr (rtx_insn *insn, rtx operands[], machine_mode mode)
+ {
+   unsigned int regno0, regno1, regno2;
+   struct ix86_address parts;
+   rtx target, tmp;
+   int ok, adds;
+ 
+   ok = ix86_decompose_address (operands[1], &parts);
+   gcc_assert (ok);
+ 
+   target = gen_lowpart (mode, operands[0]);
+ 
+   regno0 = true_regnum (target);
+   regno1 = INVALID_REGNUM;
+   regno2 = INVALID_REGNUM;
+ 
+   if (parts.base)
+     {
+       parts.base = gen_lowpart (mode, parts.base);
+       regno1 = true_regnum (parts.base);
+     }
+ 
+   if (parts.index)
+     {
+       parts.index = gen_lowpart (mode, parts.index);
+       regno2 = true_regnum (parts.index);
+     }
+ 
+   if (parts.disp)
+     parts.disp = gen_lowpart (mode, parts.disp);
+ 
+   if (parts.scale > 1)
+     {
+       /* Case r1 = r1 + ...  */
+       if (regno1 == regno0)
+ 	{
+ 	  /* If we have a case r1 = r1 + C * r2 then we
+ 	     should use multiplication which is very
+ 	     expensive.  Assume cost model is wrong if we
+ 	     have such case here.  */
+ 	  gcc_assert (regno2 != regno0);
+ 
+ 	  for (adds = parts.scale; adds > 0; adds--)
+ 	    ix86_emit_binop (PLUS, mode, target, parts.index);
+ 	}
+       else
+ 	{
+ 	  /* r1 = r2 + r3 * C case.  Need to move r3 into r1.  */
+ 	  if (regno0 != regno2)
+ 	    emit_insn (gen_rtx_SET (target, parts.index));
+ 
+ 	  /* Use shift for scaling.  */
+ 	  ix86_emit_binop (ASHIFT, mode, target,
+ 			   GEN_INT (exact_log2 (parts.scale)));
+ 
+ 	  if (parts.base)
+ 	    ix86_emit_binop (PLUS, mode, target, parts.base);
+ 
+ 	  if (parts.disp && parts.disp != const0_rtx)
+ 	    ix86_emit_binop (PLUS, mode, target, parts.disp);
+ 	}
+     }
+   else if (!parts.base && !parts.index)
+     {
+       gcc_assert(parts.disp);
+       emit_insn (gen_rtx_SET (target, parts.disp));
+     }
+   else
+     {
+       if (!parts.base)
+ 	{
+ 	  if (regno0 != regno2)
+ 	    emit_insn (gen_rtx_SET (target, parts.index));
+ 	}
+       else if (!parts.index)
+ 	{
+ 	  if (regno0 != regno1)
+ 	    emit_insn (gen_rtx_SET (target, parts.base));
+ 	}
+       else
+ 	{
+ 	  if (regno0 == regno1)
+ 	    tmp = parts.index;
+ 	  else if (regno0 == regno2)
+ 	    tmp = parts.base;
+ 	  else
+ 	    {
+ 	      rtx tmp1;
+ 
+ 	      /* Find better operand for SET instruction, depending
+ 		 on which definition is farther from the insn.  */
+ 	      if (find_nearest_reg_def (insn, regno1, regno2))
+ 		tmp = parts.index, tmp1 = parts.base;
+ 	      else
+ 		tmp = parts.base, tmp1 = parts.index;
+ 
+ 	      emit_insn (gen_rtx_SET (target, tmp));
+ 
+ 	      if (parts.disp && parts.disp != const0_rtx)
+ 		ix86_emit_binop (PLUS, mode, target, parts.disp);
+ 
+ 	      ix86_emit_binop (PLUS, mode, target, tmp1);
+ 	      return;
+ 	    }
+ 
+ 	  ix86_emit_binop (PLUS, mode, target, tmp);
+ 	}
+ 
+       if (parts.disp && parts.disp != const0_rtx)
+ 	ix86_emit_binop (PLUS, mode, target, parts.disp);
+     }
+ }
+ 
+ /* Post-reload splitter for converting an SF or DFmode value in an
+    SSE register into an unsigned SImode.  */
+ 
+ void
+ ix86_split_convert_uns_si_sse (rtx operands[])
+ {
+   machine_mode vecmode;
+   rtx value, large, zero_or_two31, input, two31, x;
+ 
+   large = operands[1];
+   zero_or_two31 = operands[2];
+   input = operands[3];
+   two31 = operands[4];
+   vecmode = GET_MODE (large);
+   value = gen_rtx_REG (vecmode, REGNO (operands[0]));
+ 
+   /* Load up the value into the low element.  We must ensure that the other
+      elements are valid floats -- zero is the easiest such value.  */
+   if (MEM_P (input))
+     {
+       if (vecmode == V4SFmode)
+ 	emit_insn (gen_vec_setv4sf_0 (value, CONST0_RTX (V4SFmode), input));
+       else
+ 	emit_insn (gen_sse2_loadlpd (value, CONST0_RTX (V2DFmode), input));
+     }
+   else
+     {
+       input = gen_rtx_REG (vecmode, REGNO (input));
+       emit_move_insn (value, CONST0_RTX (vecmode));
+       if (vecmode == V4SFmode)
+ 	emit_insn (gen_sse_movss (value, value, input));
+       else
+ 	emit_insn (gen_sse2_movsd (value, value, input));
+     }
+ 
+   emit_move_insn (large, two31);
+   emit_move_insn (zero_or_two31, MEM_P (two31) ? large : two31);
+ 
+   x = gen_rtx_fmt_ee (LE, vecmode, large, value);
+   emit_insn (gen_rtx_SET (large, x));
+ 
+   x = gen_rtx_AND (vecmode, zero_or_two31, large);
+   emit_insn (gen_rtx_SET (zero_or_two31, x));
+ 
+   x = gen_rtx_MINUS (vecmode, value, zero_or_two31);
+   emit_insn (gen_rtx_SET (value, x));
+ 
+   large = gen_rtx_REG (V4SImode, REGNO (large));
+   emit_insn (gen_ashlv4si3 (large, large, GEN_INT (31)));
+ 
+   x = gen_rtx_REG (V4SImode, REGNO (value));
+   if (vecmode == V4SFmode)
+     emit_insn (gen_fix_truncv4sfv4si2 (x, value));
+   else
+     emit_insn (gen_sse2_cvttpd2dq (x, value));
+   value = x;
+ 
+   emit_insn (gen_xorv4si3 (value, value, large));
+ }
+ 
+ static bool ix86_expand_vector_init_one_nonzero (bool mmx_ok,
+ 						 machine_mode mode, rtx target,
+ 						 rtx var, int one_var);
+ 
+ /* Convert an unsigned DImode value into a DFmode, using only SSE.
+    Expects the 64-bit DImode to be supplied in a pair of integral
+    registers.  Requires SSE2; will use SSE3 if available.  For x86_32,
+    -mfpmath=sse, !optimize_size only.  */
+ 
+ void
+ ix86_expand_convert_uns_didf_sse (rtx target, rtx input)
+ {
+   REAL_VALUE_TYPE bias_lo_rvt, bias_hi_rvt;
+   rtx int_xmm, fp_xmm;
+   rtx biases, exponents;
+   rtx x;
+ 
+   int_xmm = gen_reg_rtx (V4SImode);
+   if (TARGET_INTER_UNIT_MOVES_TO_VEC)
+     emit_insn (gen_movdi_to_sse (int_xmm, input));
+   else if (TARGET_SSE_SPLIT_REGS)
+     {
+       emit_clobber (int_xmm);
+       emit_move_insn (gen_lowpart (DImode, int_xmm), input);
+     }
+   else
+     {
+       x = gen_reg_rtx (V2DImode);
+       ix86_expand_vector_init_one_nonzero (false, V2DImode, x, input, 0);
+       emit_move_insn (int_xmm, gen_lowpart (V4SImode, x));
+     }
+ 
+   x = gen_rtx_CONST_VECTOR (V4SImode,
+ 			    gen_rtvec (4, GEN_INT (0x43300000UL),
+ 				       GEN_INT (0x45300000UL),
+ 				       const0_rtx, const0_rtx));
+   exponents = validize_mem (force_const_mem (V4SImode, x));
+ 
+   /* int_xmm = {0x45300000UL, fp_xmm/hi, 0x43300000, fp_xmm/lo } */
+   emit_insn (gen_vec_interleave_lowv4si (int_xmm, int_xmm, exponents));
+ 
+   /* Concatenating (juxtaposing) (0x43300000UL ## fp_value_low_xmm)
+      yields a valid DF value equal to (0x1.0p52 + double(fp_value_lo_xmm)).
+      Similarly (0x45300000UL ## fp_value_hi_xmm) yields
+      (0x1.0p84 + double(fp_value_hi_xmm)).
+      Note these exponents differ by 32.  */
+ 
+   fp_xmm = copy_to_mode_reg (V2DFmode, gen_lowpart (V2DFmode, int_xmm));
+ 
+   /* Subtract off those 0x1.0p52 and 0x1.0p84 biases, to produce values
+      in [0,2**32-1] and [0]+[2**32,2**64-1] respectively.  */
+   real_ldexp (&bias_lo_rvt, &dconst1, 52);
+   real_ldexp (&bias_hi_rvt, &dconst1, 84);
+   biases = const_double_from_real_value (bias_lo_rvt, DFmode);
+   x = const_double_from_real_value (bias_hi_rvt, DFmode);
+   biases = gen_rtx_CONST_VECTOR (V2DFmode, gen_rtvec (2, biases, x));
+   biases = validize_mem (force_const_mem (V2DFmode, biases));
+   emit_insn (gen_subv2df3 (fp_xmm, fp_xmm, biases));
+ 
+   /* Add the upper and lower DFmode values together.  */
+   if (TARGET_SSE3)
+     emit_insn (gen_sse3_haddv2df3 (fp_xmm, fp_xmm, fp_xmm));
+   else
+     {
+       x = copy_to_mode_reg (V2DFmode, fp_xmm);
+       emit_insn (gen_vec_interleave_highv2df (fp_xmm, fp_xmm, fp_xmm));
+       emit_insn (gen_addv2df3 (fp_xmm, fp_xmm, x));
+     }
+ 
+   ix86_expand_vector_extract (false, target, fp_xmm, 0);
+ }
+ 
+ /* Not used, but eases macroization of patterns.  */
+ void
+ ix86_expand_convert_uns_sixf_sse (rtx, rtx)
+ {
+   gcc_unreachable ();
+ }
+ 
+ /* Convert an unsigned SImode value into a DFmode.  Only currently used
+    for SSE, but applicable anywhere.  */
+ 
+ void
+ ix86_expand_convert_uns_sidf_sse (rtx target, rtx input)
+ {
+   REAL_VALUE_TYPE TWO31r;
+   rtx x, fp;
+ 
+   x = expand_simple_binop (SImode, PLUS, input, GEN_INT (-2147483647 - 1),
+ 			   NULL, 1, OPTAB_DIRECT);
+ 
+   fp = gen_reg_rtx (DFmode);
+   emit_insn (gen_floatsidf2 (fp, x));
+ 
+   real_ldexp (&TWO31r, &dconst1, 31);
+   x = const_double_from_real_value (TWO31r, DFmode);
+ 
+   x = expand_simple_binop (DFmode, PLUS, fp, x, target, 0, OPTAB_DIRECT);
+   if (x != target)
+     emit_move_insn (target, x);
+ }
+ 
+ /* Convert a signed DImode value into a DFmode.  Only used for SSE in
+    32-bit mode; otherwise we have a direct convert instruction.  */
+ 
+ void
+ ix86_expand_convert_sign_didf_sse (rtx target, rtx input)
+ {
+   REAL_VALUE_TYPE TWO32r;
+   rtx fp_lo, fp_hi, x;
+ 
+   fp_lo = gen_reg_rtx (DFmode);
+   fp_hi = gen_reg_rtx (DFmode);
+ 
+   emit_insn (gen_floatsidf2 (fp_hi, gen_highpart (SImode, input)));
+ 
+   real_ldexp (&TWO32r, &dconst1, 32);
+   x = const_double_from_real_value (TWO32r, DFmode);
+   fp_hi = expand_simple_binop (DFmode, MULT, fp_hi, x, fp_hi, 0, OPTAB_DIRECT);
+ 
+   ix86_expand_convert_uns_sidf_sse (fp_lo, gen_lowpart (SImode, input));
+ 
+   x = expand_simple_binop (DFmode, PLUS, fp_hi, fp_lo, target,
+ 			   0, OPTAB_DIRECT);
+   if (x != target)
+     emit_move_insn (target, x);
+ }
+ 
+ /* Convert an unsigned SImode value into a SFmode, using only SSE.
+    For x86_32, -mfpmath=sse, !optimize_size only.  */
+ void
+ ix86_expand_convert_uns_sisf_sse (rtx target, rtx input)
+ {
+   REAL_VALUE_TYPE ONE16r;
+   rtx fp_hi, fp_lo, int_hi, int_lo, x;
+ 
+   real_ldexp (&ONE16r, &dconst1, 16);
+   x = const_double_from_real_value (ONE16r, SFmode);
+   int_lo = expand_simple_binop (SImode, AND, input, GEN_INT(0xffff),
+ 				      NULL, 0, OPTAB_DIRECT);
+   int_hi = expand_simple_binop (SImode, LSHIFTRT, input, GEN_INT(16),
+ 				      NULL, 0, OPTAB_DIRECT);
+   fp_hi = gen_reg_rtx (SFmode);
+   fp_lo = gen_reg_rtx (SFmode);
+   emit_insn (gen_floatsisf2 (fp_hi, int_hi));
+   emit_insn (gen_floatsisf2 (fp_lo, int_lo));
+   fp_hi = expand_simple_binop (SFmode, MULT, fp_hi, x, fp_hi,
+ 			       0, OPTAB_DIRECT);
+   fp_hi = expand_simple_binop (SFmode, PLUS, fp_hi, fp_lo, target,
+ 			       0, OPTAB_DIRECT);
+   if (!rtx_equal_p (target, fp_hi))
+     emit_move_insn (target, fp_hi);
+ }
+ 
+ /* floatunsv{4,8}siv{4,8}sf2 expander.  Expand code to convert
+    a vector of unsigned ints VAL to vector of floats TARGET.  */
+ 
+ void
+ ix86_expand_vector_convert_uns_vsivsf (rtx target, rtx val)
+ {
+   rtx tmp[8];
+   REAL_VALUE_TYPE TWO16r;
+   machine_mode intmode = GET_MODE (val);
+   machine_mode fltmode = GET_MODE (target);
+   rtx (*cvt) (rtx, rtx);
+ 
+   if (intmode == V4SImode)
+     cvt = gen_floatv4siv4sf2;
+   else
+     cvt = gen_floatv8siv8sf2;
+   tmp[0] = ix86_build_const_vector (intmode, 1, GEN_INT (0xffff));
+   tmp[0] = force_reg (intmode, tmp[0]);
+   tmp[1] = expand_simple_binop (intmode, AND, val, tmp[0], NULL_RTX, 1,
+ 				OPTAB_DIRECT);
+   tmp[2] = expand_simple_binop (intmode, LSHIFTRT, val, GEN_INT (16),
+ 				NULL_RTX, 1, OPTAB_DIRECT);
+   tmp[3] = gen_reg_rtx (fltmode);
+   emit_insn (cvt (tmp[3], tmp[1]));
+   tmp[4] = gen_reg_rtx (fltmode);
+   emit_insn (cvt (tmp[4], tmp[2]));
+   real_ldexp (&TWO16r, &dconst1, 16);
+   tmp[5] = const_double_from_real_value (TWO16r, SFmode);
+   tmp[5] = force_reg (fltmode, ix86_build_const_vector (fltmode, 1, tmp[5]));
+   tmp[6] = expand_simple_binop (fltmode, MULT, tmp[4], tmp[5], NULL_RTX, 1,
+ 				OPTAB_DIRECT);
+   tmp[7] = expand_simple_binop (fltmode, PLUS, tmp[3], tmp[6], target, 1,
+ 				OPTAB_DIRECT);
+   if (tmp[7] != target)
+     emit_move_insn (target, tmp[7]);
+ }
+ 
+ /* Adjust a V*SFmode/V*DFmode value VAL so that *sfix_trunc* resp. fix_trunc*
+    pattern can be used on it instead of *ufix_trunc* resp. fixuns_trunc*.
+    This is done by doing just signed conversion if < 0x1p31, and otherwise by
+    subtracting 0x1p31 first and xoring in 0x80000000 from *XORP afterwards.  */
+ 
+ rtx
+ ix86_expand_adjust_ufix_to_sfix_si (rtx val, rtx *xorp)
+ {
+   REAL_VALUE_TYPE TWO31r;
+   rtx two31r, tmp[4];
+   machine_mode mode = GET_MODE (val);
+   machine_mode scalarmode = GET_MODE_INNER (mode);
+   machine_mode intmode = GET_MODE_SIZE (mode) == 32 ? V8SImode : V4SImode;
+   rtx (*cmp) (rtx, rtx, rtx, rtx);
+   int i;
+ 
+   for (i = 0; i < 3; i++)
+     tmp[i] = gen_reg_rtx (mode);
+   real_ldexp (&TWO31r, &dconst1, 31);
+   two31r = const_double_from_real_value (TWO31r, scalarmode);
+   two31r = ix86_build_const_vector (mode, 1, two31r);
+   two31r = force_reg (mode, two31r);
+   switch (mode)
+     {
+     case E_V8SFmode: cmp = gen_avx_maskcmpv8sf3; break;
+     case E_V4SFmode: cmp = gen_sse_maskcmpv4sf3; break;
+     case E_V4DFmode: cmp = gen_avx_maskcmpv4df3; break;
+     case E_V2DFmode: cmp = gen_sse2_maskcmpv2df3; break;
+     default: gcc_unreachable ();
+     }
+   tmp[3] = gen_rtx_LE (mode, two31r, val);
+   emit_insn (cmp (tmp[0], two31r, val, tmp[3]));
+   tmp[1] = expand_simple_binop (mode, AND, tmp[0], two31r, tmp[1],
+ 				0, OPTAB_DIRECT);
+   if (intmode == V4SImode || TARGET_AVX2)
+     *xorp = expand_simple_binop (intmode, ASHIFT,
+ 				 gen_lowpart (intmode, tmp[0]),
+ 				 GEN_INT (31), NULL_RTX, 0,
+ 				 OPTAB_DIRECT);
+   else
+     {
+       rtx two31 = gen_int_mode (HOST_WIDE_INT_1U << 31, SImode);
+       two31 = ix86_build_const_vector (intmode, 1, two31);
+       *xorp = expand_simple_binop (intmode, AND,
+ 				   gen_lowpart (intmode, tmp[0]),
+ 				   two31, NULL_RTX, 0,
+ 				   OPTAB_DIRECT);
+     }
+   return expand_simple_binop (mode, MINUS, val, tmp[1], tmp[2],
+ 			      0, OPTAB_DIRECT);
+ }
+ 
+ /* Generate code for floating point ABS or NEG.  */
+ 
+ void
+ ix86_expand_fp_absneg_operator (enum rtx_code code, machine_mode mode,
+ 				rtx operands[])
+ {
+   rtx set, dst, src;
+   bool use_sse = false;
+   bool vector_mode = VECTOR_MODE_P (mode);
+   machine_mode vmode = mode;
+   rtvec par;
+ 
+   if (vector_mode)
+     use_sse = true;
+   else if (mode == TFmode)
+     use_sse = true;
+   else if (TARGET_SSE_MATH)
+     {
+       use_sse = SSE_FLOAT_MODE_P (mode);
+       if (mode == SFmode)
+ 	vmode = V4SFmode;
+       else if (mode == DFmode)
+ 	vmode = V2DFmode;
+     }
+ 
+   dst = operands[0];
+   src = operands[1];
+ 
+   set = gen_rtx_fmt_e (code, mode, src);
+   set = gen_rtx_SET (dst, set);
+ 
+   if (use_sse)
+     {
+       rtx mask, use, clob;
+ 
+       /* NEG and ABS performed with SSE use bitwise mask operations.
+ 	 Create the appropriate mask now.  */
+       mask = ix86_build_signbit_mask (vmode, vector_mode, code == ABS);
+       use = gen_rtx_USE (VOIDmode, mask);
+       if (vector_mode)
+ 	par = gen_rtvec (2, set, use);
+       else
+ 	{
+           clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
+ 	  par = gen_rtvec (3, set, use, clob);
+         }
+     }
+   else
+     {
+       rtx clob;
+ 
+       /* Changing of sign for FP values is doable using integer unit too.  */
+       clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
+       par = gen_rtvec (2, set, clob);
+     }
+ 
+   emit_insn (gen_rtx_PARALLEL (VOIDmode, par));
+ }
+ 
+ /* Deconstruct a floating point ABS or NEG operation
+    with integer registers into integer operations.  */
+ 
+ void
+ ix86_split_fp_absneg_operator (enum rtx_code code, machine_mode mode,
+ 			       rtx operands[])
+ {
+   enum rtx_code absneg_op;
+   rtx dst, set;
+ 
+   gcc_assert (operands_match_p (operands[0], operands[1]));
+ 
+   switch (mode)
+     {
+     case E_SFmode:
+       dst = gen_lowpart (SImode, operands[0]);
+ 
+       if (code == ABS)
+ 	{
+ 	  set = gen_int_mode (0x7fffffff, SImode);
+ 	  absneg_op = AND;
+ 	}
+       else
+ 	{
+ 	  set = gen_int_mode (0x80000000, SImode);
+ 	  absneg_op = XOR;
+ 	}
+       set = gen_rtx_fmt_ee (absneg_op, SImode, dst, set);
+       break;
+ 
+     case E_DFmode:
+       if (TARGET_64BIT)
+ 	{
+ 	  dst = gen_lowpart (DImode, operands[0]);
+ 	  dst = gen_rtx_ZERO_EXTRACT (DImode, dst, const1_rtx, GEN_INT (63));
+ 
+ 	  if (code == ABS)
+ 	    set = const0_rtx;
+ 	  else
+ 	    set = gen_rtx_NOT (DImode, dst);
+ 	}
+       else
+ 	{
+ 	  dst = gen_highpart (SImode, operands[0]);
+ 
+ 	  if (code == ABS)
+ 	    {
+ 	      set = gen_int_mode (0x7fffffff, SImode);
+ 	      absneg_op = AND;
+ 	    }
+ 	  else
+ 	    {
+ 	      set = gen_int_mode (0x80000000, SImode);
+ 	      absneg_op = XOR;
+ 	    }
+ 	  set = gen_rtx_fmt_ee (absneg_op, SImode, dst, set);
+ 	}
+       break;
+ 
+     case E_XFmode:
+       dst = gen_rtx_REG (SImode,
+ 			 REGNO (operands[0]) + (TARGET_64BIT ? 1 : 2));
+       if (code == ABS)
+ 	{
+ 	  set = GEN_INT (0x7fff);
+ 	  absneg_op = AND;
+ 	}
+       else
+ 	{
+ 	  set = GEN_INT (0x8000);
+ 	  absneg_op = XOR;
+ 	}
+       set = gen_rtx_fmt_ee (absneg_op, SImode, dst, set);
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   set = gen_rtx_SET (dst, set);
+ 
+   rtx clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
+   rtvec par = gen_rtvec (2, set, clob);
+ 
+   emit_insn (gen_rtx_PARALLEL (VOIDmode, par));
+ }
+ 
+ /* Expand a copysign operation.  Special case operand 0 being a constant.  */
+ 
+ void
+ ix86_expand_copysign (rtx operands[])
+ {
+   machine_mode mode, vmode;
+   rtx dest, op0, op1, mask;
+ 
+   dest = operands[0];
+   op0 = operands[1];
+   op1 = operands[2];
+ 
+   mode = GET_MODE (dest);
+ 
+   if (mode == SFmode)
+     vmode = V4SFmode;
+   else if (mode == DFmode)
+     vmode = V2DFmode;
+   else if (mode == TFmode)
+     vmode = mode;
+   else
+     gcc_unreachable ();
+ 
+   mask = ix86_build_signbit_mask (vmode, 0, 0);
+ 
+   if (CONST_DOUBLE_P (op0))
+     {
+       if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0)))
+ 	op0 = simplify_unary_operation (ABS, mode, op0, mode);
+ 
+       if (mode == SFmode || mode == DFmode)
+ 	{
+ 	  if (op0 == CONST0_RTX (mode))
+ 	    op0 = CONST0_RTX (vmode);
+ 	  else
+ 	    {
+ 	      rtx v = ix86_build_const_vector (vmode, false, op0);
+ 
+ 	      op0 = force_reg (vmode, v);
+ 	    }
+ 	}
+       else if (op0 != CONST0_RTX (mode))
+ 	op0 = force_reg (mode, op0);
+ 
+       emit_insn (gen_copysign3_const (mode, dest, op0, op1, mask));
+     }
+   else
+     {
+       rtx nmask = ix86_build_signbit_mask (vmode, 0, 1);
+ 
+       emit_insn (gen_copysign3_var
+ 		 (mode, dest, NULL_RTX, op0, op1, nmask, mask));
+     }
+ }
+ 
+ /* Deconstruct a copysign operation into bit masks.  Operand 0 is known to
+    be a constant, and so has already been expanded into a vector constant.  */
+ 
+ void
+ ix86_split_copysign_const (rtx operands[])
+ {
+   machine_mode mode, vmode;
+   rtx dest, op0, mask, x;
+ 
+   dest = operands[0];
+   op0 = operands[1];
+   mask = operands[3];
+ 
+   mode = GET_MODE (dest);
+   vmode = GET_MODE (mask);
+ 
+   dest = lowpart_subreg (vmode, dest, mode);
+   x = gen_rtx_AND (vmode, dest, mask);
+   emit_insn (gen_rtx_SET (dest, x));
+ 
+   if (op0 != CONST0_RTX (vmode))
+     {
+       x = gen_rtx_IOR (vmode, dest, op0);
+       emit_insn (gen_rtx_SET (dest, x));
+     }
+ }
+ 
+ /* Deconstruct a copysign operation into bit masks.  Operand 0 is variable,
+    so we have to do two masks.  */
+ 
+ void
+ ix86_split_copysign_var (rtx operands[])
+ {
+   machine_mode mode, vmode;
+   rtx dest, scratch, op0, op1, mask, nmask, x;
+ 
+   dest = operands[0];
+   scratch = operands[1];
+   op0 = operands[2];
+   op1 = operands[3];
+   nmask = operands[4];
+   mask = operands[5];
+ 
+   mode = GET_MODE (dest);
+   vmode = GET_MODE (mask);
+ 
+   if (rtx_equal_p (op0, op1))
+     {
+       /* Shouldn't happen often (it's useless, obviously), but when it does
+ 	 we'd generate incorrect code if we continue below.  */
+       emit_move_insn (dest, op0);
+       return;
+     }
+ 
+   if (REG_P (mask) && REGNO (dest) == REGNO (mask))	/* alternative 0 */
+     {
+       gcc_assert (REGNO (op1) == REGNO (scratch));
+ 
+       x = gen_rtx_AND (vmode, scratch, mask);
+       emit_insn (gen_rtx_SET (scratch, x));
+ 
+       dest = mask;
+       op0 = lowpart_subreg (vmode, op0, mode);
+       x = gen_rtx_NOT (vmode, dest);
+       x = gen_rtx_AND (vmode, x, op0);
+       emit_insn (gen_rtx_SET (dest, x));
+     }
+   else
+     {
+       if (REGNO (op1) == REGNO (scratch))		/* alternative 1,3 */
+ 	{
+ 	  x = gen_rtx_AND (vmode, scratch, mask);
+ 	}
+       else						/* alternative 2,4 */
+ 	{
+           gcc_assert (REGNO (mask) == REGNO (scratch));
+           op1 = lowpart_subreg (vmode, op1, mode);
+ 	  x = gen_rtx_AND (vmode, scratch, op1);
+ 	}
+       emit_insn (gen_rtx_SET (scratch, x));
+ 
+       if (REGNO (op0) == REGNO (dest))			/* alternative 1,2 */
+ 	{
+ 	  dest = lowpart_subreg (vmode, op0, mode);
+ 	  x = gen_rtx_AND (vmode, dest, nmask);
+ 	}
+       else						/* alternative 3,4 */
+ 	{
+           gcc_assert (REGNO (nmask) == REGNO (dest));
+ 	  dest = nmask;
+ 	  op0 = lowpart_subreg (vmode, op0, mode);
+ 	  x = gen_rtx_AND (vmode, dest, op0);
+ 	}
+       emit_insn (gen_rtx_SET (dest, x));
+     }
+ 
+   x = gen_rtx_IOR (vmode, dest, scratch);
+   emit_insn (gen_rtx_SET (dest, x));
+ }
+ 
+ /* Expand an xorsign operation.  */
+ 
+ void
+ ix86_expand_xorsign (rtx operands[])
+ {
+   machine_mode mode, vmode;
+   rtx dest, op0, op1, mask;
+ 
+   dest = operands[0];
+   op0 = operands[1];
+   op1 = operands[2];
+ 
+   mode = GET_MODE (dest);
+ 
+   if (mode == SFmode)
+     vmode = V4SFmode;
+   else if (mode == DFmode)
+     vmode = V2DFmode;
+   else
+     gcc_unreachable ();
+ 
+   mask = ix86_build_signbit_mask (vmode, 0, 0);
+ 
+   emit_insn (gen_xorsign3_1 (mode, dest, op0, op1, mask));
+ }
+ 
+ /* Deconstruct an xorsign operation into bit masks.  */
+ 
+ void
+ ix86_split_xorsign (rtx operands[])
+ {
+   machine_mode mode, vmode;
+   rtx dest, op0, mask, x;
+ 
+   dest = operands[0];
+   op0 = operands[1];
+   mask = operands[3];
+ 
+   mode = GET_MODE (dest);
+   vmode = GET_MODE (mask);
+ 
+   dest = lowpart_subreg (vmode, dest, mode);
+   x = gen_rtx_AND (vmode, dest, mask);
+   emit_insn (gen_rtx_SET (dest, x));
+ 
+   op0 = lowpart_subreg (vmode, op0, mode);
+   x = gen_rtx_XOR (vmode, dest, op0);
+   emit_insn (gen_rtx_SET (dest, x));
+ }
+ 
+ static rtx ix86_expand_compare (enum rtx_code code, rtx op0, rtx op1);
+ 
+ void
+ ix86_expand_branch (enum rtx_code code, rtx op0, rtx op1, rtx label)
+ {
+   machine_mode mode = GET_MODE (op0);
+   rtx tmp;
+ 
+   /* Handle special case - vector comparsion with boolean result, transform
+      it using ptest instruction.  */
+   if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
+     {
+       rtx flag = gen_rtx_REG (CCZmode, FLAGS_REG);
+       machine_mode p_mode = GET_MODE_SIZE (mode) == 32 ? V4DImode : V2DImode;
+ 
+       gcc_assert (code == EQ || code == NE);
+       /* Generate XOR since we can't check that one operand is zero vector.  */
+       tmp = gen_reg_rtx (mode);
+       emit_insn (gen_rtx_SET (tmp, gen_rtx_XOR (mode, op0, op1)));
+       tmp = gen_lowpart (p_mode, tmp);
+       emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode, FLAGS_REG),
+ 			      gen_rtx_UNSPEC (CCmode,
+ 					      gen_rtvec (2, tmp, tmp),
+ 					      UNSPEC_PTEST)));
+       tmp = gen_rtx_fmt_ee (code, VOIDmode, flag, const0_rtx);
+       tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp,
+ 				  gen_rtx_LABEL_REF (VOIDmode, label),
+ 				  pc_rtx);
+       emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
+       return;
+     }
+ 
+   switch (mode)
+     {
+     case E_SFmode:
+     case E_DFmode:
+     case E_XFmode:
+     case E_QImode:
+     case E_HImode:
+     case E_SImode:
+       simple:
+       tmp = ix86_expand_compare (code, op0, op1);
+       tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp,
+ 				  gen_rtx_LABEL_REF (VOIDmode, label),
+ 				  pc_rtx);
+       emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
+       return;
+ 
+     case E_DImode:
+       if (TARGET_64BIT)
+ 	goto simple;
+       /* For 32-bit target DI comparison may be performed on
+ 	 SSE registers.  To allow this we should avoid split
+ 	 to SI mode which is achieved by doing xor in DI mode
+ 	 and then comparing with zero (which is recognized by
+ 	 STV pass).  We don't compare using xor when optimizing
+ 	 for size.  */
+       if (!optimize_insn_for_size_p ()
+ 	  && TARGET_STV
+ 	  && (code == EQ || code == NE))
+ 	{
+ 	  op0 = force_reg (mode, gen_rtx_XOR (mode, op0, op1));
+ 	  op1 = const0_rtx;
+ 	}
+       /* FALLTHRU */
+     case E_TImode:
+       /* Expand DImode branch into multiple compare+branch.  */
+       {
+ 	rtx lo[2], hi[2];
+ 	rtx_code_label *label2;
+ 	enum rtx_code code1, code2, code3;
+ 	machine_mode submode;
+ 
+ 	if (CONSTANT_P (op0) && !CONSTANT_P (op1))
+ 	  {
+ 	    std::swap (op0, op1);
+ 	    code = swap_condition (code);
+ 	  }
+ 
+ 	split_double_mode (mode, &op0, 1, lo+0, hi+0);
+ 	split_double_mode (mode, &op1, 1, lo+1, hi+1);
+ 
+ 	submode = mode == DImode ? SImode : DImode;
+ 
+ 	/* When comparing for equality, we can use (hi0^hi1)|(lo0^lo1) to
+ 	   avoid two branches.  This costs one extra insn, so disable when
+ 	   optimizing for size.  */
+ 
+ 	if ((code == EQ || code == NE)
+ 	    && (!optimize_insn_for_size_p ()
+ 	        || hi[1] == const0_rtx || lo[1] == const0_rtx))
+ 	  {
+ 	    rtx xor0, xor1;
+ 
+ 	    xor1 = hi[0];
+ 	    if (hi[1] != const0_rtx)
+ 	      xor1 = expand_binop (submode, xor_optab, xor1, hi[1],
+ 				   NULL_RTX, 0, OPTAB_WIDEN);
+ 
+ 	    xor0 = lo[0];
+ 	    if (lo[1] != const0_rtx)
+ 	      xor0 = expand_binop (submode, xor_optab, xor0, lo[1],
+ 				   NULL_RTX, 0, OPTAB_WIDEN);
+ 
+ 	    tmp = expand_binop (submode, ior_optab, xor1, xor0,
+ 				NULL_RTX, 0, OPTAB_WIDEN);
+ 
+ 	    ix86_expand_branch (code, tmp, const0_rtx, label);
+ 	    return;
+ 	  }
+ 
+ 	/* Otherwise, if we are doing less-than or greater-or-equal-than,
+ 	   op1 is a constant and the low word is zero, then we can just
+ 	   examine the high word.  Similarly for low word -1 and
+ 	   less-or-equal-than or greater-than.  */
+ 
+ 	if (CONST_INT_P (hi[1]))
+ 	  switch (code)
+ 	    {
+ 	    case LT: case LTU: case GE: case GEU:
+ 	      if (lo[1] == const0_rtx)
+ 		{
+ 		  ix86_expand_branch (code, hi[0], hi[1], label);
+ 		  return;
+ 		}
+ 	      break;
+ 	    case LE: case LEU: case GT: case GTU:
+ 	      if (lo[1] == constm1_rtx)
+ 		{
+ 		  ix86_expand_branch (code, hi[0], hi[1], label);
+ 		  return;
+ 		}
+ 	      break;
+ 	    default:
+ 	      break;
+ 	    }
+ 
+ 	/* Emulate comparisons that do not depend on Zero flag with
+ 	   double-word subtraction.  Note that only Overflow, Sign
+ 	   and Carry flags are valid, so swap arguments and condition
+ 	   of comparisons that would otherwise test Zero flag.  */
+ 
+ 	switch (code)
+ 	  {
+ 	  case LE: case LEU: case GT: case GTU:
+ 	    std::swap (lo[0], lo[1]);
+ 	    std::swap (hi[0], hi[1]);
+ 	    code = swap_condition (code);
+ 	    /* FALLTHRU */
+ 
+ 	  case LT: case LTU: case GE: case GEU:
+ 	    {
+ 	      bool uns = (code == LTU || code == GEU);
+ 	      rtx (*sbb_insn) (machine_mode, rtx, rtx, rtx)
+ 		= uns ? gen_sub3_carry_ccc : gen_sub3_carry_ccgz;
+ 
+ 	      if (!nonimmediate_operand (lo[0], submode))
+ 		lo[0] = force_reg (submode, lo[0]);
+ 	      if (!x86_64_general_operand (lo[1], submode))
+ 		lo[1] = force_reg (submode, lo[1]);
+ 
+ 	      if (!register_operand (hi[0], submode))
+ 		hi[0] = force_reg (submode, hi[0]);
+ 	      if ((uns && !nonimmediate_operand (hi[1], submode))
+ 		  || (!uns && !x86_64_general_operand (hi[1], submode)))
+ 		hi[1] = force_reg (submode, hi[1]);
+ 
+ 	      emit_insn (gen_cmp_1 (submode, lo[0], lo[1]));
+ 
+ 	      tmp = gen_rtx_SCRATCH (submode);
+ 	      emit_insn (sbb_insn (submode, tmp, hi[0], hi[1]));
+ 
+ 	      tmp = gen_rtx_REG (uns ? CCCmode : CCGZmode, FLAGS_REG);
+ 	      ix86_expand_branch (code, tmp, const0_rtx, label);
+ 	      return;
+ 	    }
+ 
+ 	  default:
+ 	    break;
+ 	  }
+ 
+ 	/* Otherwise, we need two or three jumps.  */
+ 
+ 	label2 = gen_label_rtx ();
+ 
+ 	code1 = code;
+ 	code2 = swap_condition (code);
+ 	code3 = unsigned_condition (code);
+ 
+ 	switch (code)
+ 	  {
+ 	  case LT: case GT: case LTU: case GTU:
+ 	    break;
+ 
+ 	  case LE:   code1 = LT;  code2 = GT;  break;
+ 	  case GE:   code1 = GT;  code2 = LT;  break;
+ 	  case LEU:  code1 = LTU; code2 = GTU; break;
+ 	  case GEU:  code1 = GTU; code2 = LTU; break;
+ 
+ 	  case EQ:   code1 = UNKNOWN; code2 = NE;  break;
+ 	  case NE:   code2 = UNKNOWN; break;
+ 
+ 	  default:
+ 	    gcc_unreachable ();
+ 	  }
+ 
+ 	/*
+ 	 * a < b =>
+ 	 *    if (hi(a) < hi(b)) goto true;
+ 	 *    if (hi(a) > hi(b)) goto false;
+ 	 *    if (lo(a) < lo(b)) goto true;
+ 	 *  false:
+ 	 */
+ 
+ 	if (code1 != UNKNOWN)
+ 	  ix86_expand_branch (code1, hi[0], hi[1], label);
+ 	if (code2 != UNKNOWN)
+ 	  ix86_expand_branch (code2, hi[0], hi[1], label2);
+ 
+ 	ix86_expand_branch (code3, lo[0], lo[1], label);
+ 
+ 	if (code2 != UNKNOWN)
+ 	  emit_label (label2);
+ 	return;
+       }
+ 
+     default:
+       gcc_assert (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC);
+       goto simple;
+     }
+ }
+ 
+ /* Figure out whether to use unordered fp comparisons.  */
+ 
+ static bool
+ ix86_unordered_fp_compare (enum rtx_code code)
+ {
+   if (!TARGET_IEEE_FP)
+     return false;
+ 
+   switch (code)
+     {
+     case LT:
+     case LE:
+     case GT:
+     case GE:
+     case LTGT:
+       return false;
+ 
+     case EQ:
+     case NE:
+ 
+     case UNORDERED:
+     case ORDERED:
+     case UNLT:
+     case UNLE:
+     case UNGT:
+     case UNGE:
+     case UNEQ:
+       return true;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ }
+ 
+ /* Return a comparison we can do and that it is equivalent to
+    swap_condition (code) apart possibly from orderedness.
+    But, never change orderedness if TARGET_IEEE_FP, returning
+    UNKNOWN in that case if necessary.  */
+ 
+ static enum rtx_code
+ ix86_fp_swap_condition (enum rtx_code code)
+ {
+   switch (code)
+     {
+     case GT:                   /* GTU - CF=0 & ZF=0 */
+       return TARGET_IEEE_FP ? UNKNOWN : UNLT;
+     case GE:                   /* GEU - CF=0 */
+       return TARGET_IEEE_FP ? UNKNOWN : UNLE;
+     case UNLT:                 /* LTU - CF=1 */
+       return TARGET_IEEE_FP ? UNKNOWN : GT;
+     case UNLE:                 /* LEU - CF=1 | ZF=1 */
+       return TARGET_IEEE_FP ? UNKNOWN : GE;
+     default:
+       return swap_condition (code);
+     }
+ }
+ 
+ /* Return cost of comparison CODE using the best strategy for performance.
+    All following functions do use number of instructions as a cost metrics.
+    In future this should be tweaked to compute bytes for optimize_size and
+    take into account performance of various instructions on various CPUs.  */
+ 
+ static int
+ ix86_fp_comparison_cost (enum rtx_code code)
+ {
+   int arith_cost;
+ 
+   /* The cost of code using bit-twiddling on %ah.  */
+   switch (code)
+     {
+     case UNLE:
+     case UNLT:
+     case LTGT:
+     case GT:
+     case GE:
+     case UNORDERED:
+     case ORDERED:
+     case UNEQ:
+       arith_cost = 4;
+       break;
+     case LT:
+     case NE:
+     case EQ:
+     case UNGE:
+       arith_cost = TARGET_IEEE_FP ? 5 : 4;
+       break;
+     case LE:
+     case UNGT:
+       arith_cost = TARGET_IEEE_FP ? 6 : 4;
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   switch (ix86_fp_comparison_strategy (code))
+     {
+     case IX86_FPCMP_COMI:
+       return arith_cost > 4 ? 3 : 2;
+     case IX86_FPCMP_SAHF:
+       return arith_cost > 4 ? 4 : 3;
+     default:
+       return arith_cost;
+     }
+ }
+ 
+ /* Swap, force into registers, or otherwise massage the two operands
+    to a fp comparison.  The operands are updated in place; the new
+    comparison code is returned.  */
+ 
+ static enum rtx_code
+ ix86_prepare_fp_compare_args (enum rtx_code code, rtx *pop0, rtx *pop1)
+ {
+   bool unordered_compare = ix86_unordered_fp_compare (code);
+   rtx op0 = *pop0, op1 = *pop1;
+   machine_mode op_mode = GET_MODE (op0);
+   bool is_sse = TARGET_SSE_MATH && SSE_FLOAT_MODE_P (op_mode);
+ 
+   /* All of the unordered compare instructions only work on registers.
+      The same is true of the fcomi compare instructions.  The XFmode
+      compare instructions require registers except when comparing
+      against zero or when converting operand 1 from fixed point to
+      floating point.  */
+ 
+   if (!is_sse
+       && (unordered_compare
+ 	  || (op_mode == XFmode
+ 	      && ! (standard_80387_constant_p (op0) == 1
+ 		    || standard_80387_constant_p (op1) == 1)
+ 	      && GET_CODE (op1) != FLOAT)
+ 	  || ix86_fp_comparison_strategy (code) == IX86_FPCMP_COMI))
+     {
+       op0 = force_reg (op_mode, op0);
+       op1 = force_reg (op_mode, op1);
+     }
+   else
+     {
+       /* %%% We only allow op1 in memory; op0 must be st(0).  So swap
+ 	 things around if they appear profitable, otherwise force op0
+ 	 into a register.  */
+ 
+       if (standard_80387_constant_p (op0) == 0
+ 	  || (MEM_P (op0)
+ 	      && ! (standard_80387_constant_p (op1) == 0
+ 		    || MEM_P (op1))))
+ 	{
+ 	  enum rtx_code new_code = ix86_fp_swap_condition (code);
+ 	  if (new_code != UNKNOWN)
+ 	    {
+ 	      std::swap (op0, op1);
+ 	      code = new_code;
+ 	    }
+ 	}
+ 
+       if (!REG_P (op0))
+ 	op0 = force_reg (op_mode, op0);
+ 
+       if (CONSTANT_P (op1))
+ 	{
+ 	  int tmp = standard_80387_constant_p (op1);
+ 	  if (tmp == 0)
+ 	    op1 = validize_mem (force_const_mem (op_mode, op1));
+ 	  else if (tmp == 1)
+ 	    {
+ 	      if (TARGET_CMOVE)
+ 		op1 = force_reg (op_mode, op1);
+ 	    }
+ 	  else
+ 	    op1 = force_reg (op_mode, op1);
+ 	}
+     }
+ 
+   /* Try to rearrange the comparison to make it cheaper.  */
+   if (ix86_fp_comparison_cost (code)
+       > ix86_fp_comparison_cost (swap_condition (code))
+       && (REG_P (op1) || can_create_pseudo_p ()))
+     {
+       std::swap (op0, op1);
+       code = swap_condition (code);
+       if (!REG_P (op0))
+ 	op0 = force_reg (op_mode, op0);
+     }
+ 
+   *pop0 = op0;
+   *pop1 = op1;
+   return code;
+ }
+ 
+ /* Generate insn patterns to do a floating point compare of OPERANDS.  */
+ 
+ static rtx
+ ix86_expand_fp_compare (enum rtx_code code, rtx op0, rtx op1)
+ {
+   bool unordered_compare = ix86_unordered_fp_compare (code);
+   machine_mode cmp_mode;
+   rtx tmp, scratch;
+ 
+   code = ix86_prepare_fp_compare_args (code, &op0, &op1);
+ 
+   tmp = gen_rtx_COMPARE (CCFPmode, op0, op1);
+   if (unordered_compare)
+     tmp = gen_rtx_UNSPEC (CCFPmode, gen_rtvec (1, tmp), UNSPEC_NOTRAP);
+ 
+   /* Do fcomi/sahf based test when profitable.  */
+   switch (ix86_fp_comparison_strategy (code))
+     {
+     case IX86_FPCMP_COMI:
+       cmp_mode = CCFPmode;
+       emit_insn (gen_rtx_SET (gen_rtx_REG (CCFPmode, FLAGS_REG), tmp));
+       break;
+ 
+     case IX86_FPCMP_SAHF:
+       cmp_mode = CCFPmode;
+       tmp = gen_rtx_UNSPEC (HImode, gen_rtvec (1, tmp), UNSPEC_FNSTSW);
+       scratch = gen_reg_rtx (HImode);
+       emit_insn (gen_rtx_SET (scratch, tmp));
+       emit_insn (gen_x86_sahf_1 (scratch));
+       break;
+ 
+     case IX86_FPCMP_ARITH:
+       cmp_mode = CCNOmode;
+       tmp = gen_rtx_UNSPEC (HImode, gen_rtvec (1, tmp), UNSPEC_FNSTSW);
+       scratch = gen_reg_rtx (HImode);
+       emit_insn (gen_rtx_SET (scratch, tmp));
+ 
+       /* In the unordered case, we have to check C2 for NaN's, which
+ 	 doesn't happen to work out to anything nice combination-wise.
+ 	 So do some bit twiddling on the value we've got in AH to come
+ 	 up with an appropriate set of condition codes.  */
+ 
+       switch (code)
+ 	{
+ 	case GT:
+ 	case UNGT:
+ 	  if (code == GT || !TARGET_IEEE_FP)
+ 	    {
+ 	      emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x45)));
+ 	      code = EQ;
+ 	    }
+ 	  else
+ 	    {
+ 	      emit_insn (gen_andqi_ext_1 (scratch, scratch, GEN_INT (0x45)));
+ 	      emit_insn (gen_addqi_ext_1 (scratch, scratch, constm1_rtx));
+ 	      emit_insn (gen_cmpqi_ext_3 (scratch, GEN_INT (0x44)));
+ 	      cmp_mode = CCmode;
+ 	      code = GEU;
+ 	    }
+ 	  break;
+ 	case LT:
+ 	case UNLT:
+ 	  if (code == LT && TARGET_IEEE_FP)
+ 	    {
+ 	      emit_insn (gen_andqi_ext_1 (scratch, scratch, GEN_INT (0x45)));
+ 	      emit_insn (gen_cmpqi_ext_3 (scratch, const1_rtx));
+ 	      cmp_mode = CCmode;
+ 	      code = EQ;
+ 	    }
+ 	  else
+ 	    {
+ 	      emit_insn (gen_testqi_ext_1_ccno (scratch, const1_rtx));
+ 	      code = NE;
+ 	    }
+ 	  break;
+ 	case GE:
+ 	case UNGE:
+ 	  if (code == GE || !TARGET_IEEE_FP)
+ 	    {
+ 	      emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x05)));
+ 	      code = EQ;
+ 	    }
+ 	  else
+ 	    {
+ 	      emit_insn (gen_andqi_ext_1 (scratch, scratch, GEN_INT (0x45)));
+ 	      emit_insn (gen_xorqi_ext_1_cc (scratch, scratch, const1_rtx));
+ 	      code = NE;
+ 	    }
+ 	  break;
+ 	case LE:
+ 	case UNLE:
+ 	  if (code == LE && TARGET_IEEE_FP)
+ 	    {
+ 	      emit_insn (gen_andqi_ext_1 (scratch, scratch, GEN_INT (0x45)));
+ 	      emit_insn (gen_addqi_ext_1 (scratch, scratch, constm1_rtx));
+ 	      emit_insn (gen_cmpqi_ext_3 (scratch, GEN_INT (0x40)));
+ 	      cmp_mode = CCmode;
+ 	      code = LTU;
+ 	    }
+ 	  else
+ 	    {
+ 	      emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x45)));
+ 	      code = NE;
+ 	    }
+ 	  break;
+ 	case EQ:
+ 	case UNEQ:
+ 	  if (code == EQ && TARGET_IEEE_FP)
+ 	    {
+ 	      emit_insn (gen_andqi_ext_1 (scratch, scratch, GEN_INT (0x45)));
+ 	      emit_insn (gen_cmpqi_ext_3 (scratch, GEN_INT (0x40)));
+ 	      cmp_mode = CCmode;
+ 	      code = EQ;
+ 	    }
+ 	  else
+ 	    {
+ 	      emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x40)));
+ 	      code = NE;
+ 	    }
+ 	  break;
+ 	case NE:
+ 	case LTGT:
+ 	  if (code == NE && TARGET_IEEE_FP)
+ 	    {
+ 	      emit_insn (gen_andqi_ext_1 (scratch, scratch, GEN_INT (0x45)));
+ 	      emit_insn (gen_xorqi_ext_1_cc (scratch, scratch,
+ 					     GEN_INT (0x40)));
+ 	      code = NE;
+ 	    }
+ 	  else
+ 	    {
+ 	      emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x40)));
+ 	      code = EQ;
+ 	    }
+ 	  break;
+ 
+ 	case UNORDERED:
+ 	  emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x04)));
+ 	  code = NE;
+ 	  break;
+ 	case ORDERED:
+ 	  emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x04)));
+ 	  code = EQ;
+ 	  break;
+ 
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+ 	break;
+ 
+     default:
+       gcc_unreachable();
+     }
+ 
+   /* Return the test that should be put into the flags user, i.e.
+      the bcc, scc, or cmov instruction.  */
+   return gen_rtx_fmt_ee (code, VOIDmode,
+ 			 gen_rtx_REG (cmp_mode, FLAGS_REG),
+ 			 const0_rtx);
+ }
+ 
+ /* Generate insn patterns to do an integer compare of OPERANDS.  */
+ 
+ static rtx
+ ix86_expand_int_compare (enum rtx_code code, rtx op0, rtx op1)
+ {
+   machine_mode cmpmode;
+   rtx tmp, flags;
+ 
+   cmpmode = SELECT_CC_MODE (code, op0, op1);
+   flags = gen_rtx_REG (cmpmode, FLAGS_REG);
+ 
+   /* This is very simple, but making the interface the same as in the
+      FP case makes the rest of the code easier.  */
+   tmp = gen_rtx_COMPARE (cmpmode, op0, op1);
+   emit_insn (gen_rtx_SET (flags, tmp));
+ 
+   /* Return the test that should be put into the flags user, i.e.
+      the bcc, scc, or cmov instruction.  */
+   return gen_rtx_fmt_ee (code, VOIDmode, flags, const0_rtx);
+ }
+ 
+ static rtx
+ ix86_expand_compare (enum rtx_code code, rtx op0, rtx op1)
+ {
+   rtx ret;
+ 
+   if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
+     ret = gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
+ 
+   else if (SCALAR_FLOAT_MODE_P (GET_MODE (op0)))
+     {
+       gcc_assert (!DECIMAL_FLOAT_MODE_P (GET_MODE (op0)));
+       ret = ix86_expand_fp_compare (code, op0, op1);
+     }
+   else
+     ret = ix86_expand_int_compare (code, op0, op1);
+ 
+   return ret;
+ }
+ 
+ void
+ ix86_expand_setcc (rtx dest, enum rtx_code code, rtx op0, rtx op1)
+ {
+   rtx ret;
+ 
+   gcc_assert (GET_MODE (dest) == QImode);
+ 
+   ret = ix86_expand_compare (code, op0, op1);
+   PUT_MODE (ret, QImode);
+   emit_insn (gen_rtx_SET (dest, ret));
+ }
+ 
+ /* Expand comparison setting or clearing carry flag.  Return true when
+    successful and set pop for the operation.  */
+ static bool
+ ix86_expand_carry_flag_compare (enum rtx_code code, rtx op0, rtx op1, rtx *pop)
+ {
+   machine_mode mode
+     = GET_MODE (op0) != VOIDmode ? GET_MODE (op0) : GET_MODE (op1);
+ 
+   /* Do not handle double-mode compares that go through special path.  */
+   if (mode == (TARGET_64BIT ? TImode : DImode))
+     return false;
+ 
+   if (SCALAR_FLOAT_MODE_P (mode))
+     {
+       rtx compare_op;
+       rtx_insn *compare_seq;
+ 
+       gcc_assert (!DECIMAL_FLOAT_MODE_P (mode));
+ 
+       /* Shortcut:  following common codes never translate
+ 	 into carry flag compares.  */
+       if (code == EQ || code == NE || code == UNEQ || code == LTGT
+ 	  || code == ORDERED || code == UNORDERED)
+ 	return false;
+ 
+       /* These comparisons require zero flag; swap operands so they won't.  */
+       if ((code == GT || code == UNLE || code == LE || code == UNGT)
+ 	  && !TARGET_IEEE_FP)
+ 	{
+ 	  std::swap (op0, op1);
+ 	  code = swap_condition (code);
+ 	}
+ 
+       /* Try to expand the comparison and verify that we end up with
+ 	 carry flag based comparison.  This fails to be true only when
+ 	 we decide to expand comparison using arithmetic that is not
+ 	 too common scenario.  */
+       start_sequence ();
+       compare_op = ix86_expand_fp_compare (code, op0, op1);
+       compare_seq = get_insns ();
+       end_sequence ();
+ 
+       if (GET_MODE (XEXP (compare_op, 0)) == CCFPmode)
+         code = ix86_fp_compare_code_to_integer (GET_CODE (compare_op));
+       else
+ 	code = GET_CODE (compare_op);
+ 
+       if (code != LTU && code != GEU)
+ 	return false;
+ 
+       emit_insn (compare_seq);
+       *pop = compare_op;
+       return true;
+     }
+ 
+   if (!INTEGRAL_MODE_P (mode))
+     return false;
+ 
+   switch (code)
+     {
+     case LTU:
+     case GEU:
+       break;
+ 
+     /* Convert a==0 into (unsigned)a<1.  */
+     case EQ:
+     case NE:
+       if (op1 != const0_rtx)
+ 	return false;
+       op1 = const1_rtx;
+       code = (code == EQ ? LTU : GEU);
+       break;
+ 
+     /* Convert a>b into b<a or a>=b-1.  */
+     case GTU:
+     case LEU:
+       if (CONST_INT_P (op1))
+ 	{
+ 	  op1 = gen_int_mode (INTVAL (op1) + 1, GET_MODE (op0));
+ 	  /* Bail out on overflow.  We still can swap operands but that
+ 	     would force loading of the constant into register.  */
+ 	  if (op1 == const0_rtx
+ 	      || !x86_64_immediate_operand (op1, GET_MODE (op1)))
+ 	    return false;
+ 	  code = (code == GTU ? GEU : LTU);
+ 	}
+       else
+ 	{
+ 	  std::swap (op0, op1);
+ 	  code = (code == GTU ? LTU : GEU);
+ 	}
+       break;
+ 
+     /* Convert a>=0 into (unsigned)a<0x80000000.  */
+     case LT:
+     case GE:
+       if (mode == DImode || op1 != const0_rtx)
+ 	return false;
+       op1 = gen_int_mode (1 << (GET_MODE_BITSIZE (mode) - 1), mode);
+       code = (code == LT ? GEU : LTU);
+       break;
+     case LE:
+     case GT:
+       if (mode == DImode || op1 != constm1_rtx)
+ 	return false;
+       op1 = gen_int_mode (1 << (GET_MODE_BITSIZE (mode) - 1), mode);
+       code = (code == LE ? GEU : LTU);
+       break;
+ 
+     default:
+       return false;
+     }
+   /* Swapping operands may cause constant to appear as first operand.  */
+   if (!nonimmediate_operand (op0, VOIDmode))
+     {
+       if (!can_create_pseudo_p ())
+ 	return false;
+       op0 = force_reg (mode, op0);
+     }
+   *pop = ix86_expand_compare (code, op0, op1);
+   gcc_assert (GET_CODE (*pop) == LTU || GET_CODE (*pop) == GEU);
+   return true;
+ }
+ 
+ /* Expand conditional increment or decrement using adb/sbb instructions.
+    The default case using setcc followed by the conditional move can be
+    done by generic code.  */
+ bool
+ ix86_expand_int_addcc (rtx operands[])
+ {
+   enum rtx_code code = GET_CODE (operands[1]);
+   rtx flags;
+   rtx (*insn) (machine_mode, rtx, rtx, rtx, rtx, rtx);
+   rtx compare_op;
+   rtx val = const0_rtx;
+   bool fpcmp = false;
+   machine_mode mode;
+   rtx op0 = XEXP (operands[1], 0);
+   rtx op1 = XEXP (operands[1], 1);
+ 
+   if (operands[3] != const1_rtx
+       && operands[3] != constm1_rtx)
+     return false;
+   if (!ix86_expand_carry_flag_compare (code, op0, op1, &compare_op))
+      return false;
+   code = GET_CODE (compare_op);
+ 
+   flags = XEXP (compare_op, 0);
+ 
+   if (GET_MODE (flags) == CCFPmode)
+     {
+       fpcmp = true;
+       code = ix86_fp_compare_code_to_integer (code);
+     }
+ 
+   if (code != LTU)
+     {
+       val = constm1_rtx;
+       if (fpcmp)
+ 	PUT_CODE (compare_op,
+ 		  reverse_condition_maybe_unordered
+ 		    (GET_CODE (compare_op)));
+       else
+ 	PUT_CODE (compare_op, reverse_condition (GET_CODE (compare_op)));
+     }
+ 
+   mode = GET_MODE (operands[0]);
+ 
+   /* Construct either adc or sbb insn.  */
+   if ((code == LTU) == (operands[3] == constm1_rtx))
+     insn = gen_sub3_carry;
+   else
+     insn = gen_add3_carry;
+ 
+   emit_insn (insn (mode, operands[0], operands[2], val, flags, compare_op));
+ 
+   return true;
+ }
+ 
+ bool
+ ix86_expand_int_movcc (rtx operands[])
+ {
+   enum rtx_code code = GET_CODE (operands[1]), compare_code;
+   rtx_insn *compare_seq;
+   rtx compare_op;
+   machine_mode mode = GET_MODE (operands[0]);
+   bool sign_bit_compare_p = false;
+   rtx op0 = XEXP (operands[1], 0);
+   rtx op1 = XEXP (operands[1], 1);
+ 
+   if (GET_MODE (op0) == TImode
+       || (GET_MODE (op0) == DImode
+ 	  && !TARGET_64BIT))
+     return false;
+ 
+   start_sequence ();
+   compare_op = ix86_expand_compare (code, op0, op1);
+   compare_seq = get_insns ();
+   end_sequence ();
+ 
+   compare_code = GET_CODE (compare_op);
+ 
+   if ((op1 == const0_rtx && (code == GE || code == LT))
+       || (op1 == constm1_rtx && (code == GT || code == LE)))
+     sign_bit_compare_p = true;
+ 
+   /* Don't attempt mode expansion here -- if we had to expand 5 or 6
+      HImode insns, we'd be swallowed in word prefix ops.  */
+ 
+   if ((mode != HImode || TARGET_FAST_PREFIX)
+       && (mode != (TARGET_64BIT ? TImode : DImode))
+       && CONST_INT_P (operands[2])
+       && CONST_INT_P (operands[3]))
+     {
+       rtx out = operands[0];
+       HOST_WIDE_INT ct = INTVAL (operands[2]);
+       HOST_WIDE_INT cf = INTVAL (operands[3]);
+       HOST_WIDE_INT diff;
+ 
+       diff = ct - cf;
+       /*  Sign bit compares are better done using shifts than we do by using
+ 	  sbb.  */
+       if (sign_bit_compare_p
+ 	  || ix86_expand_carry_flag_compare (code, op0, op1, &compare_op))
+ 	{
+ 	  /* Detect overlap between destination and compare sources.  */
+ 	  rtx tmp = out;
+ 
+           if (!sign_bit_compare_p)
+ 	    {
+ 	      rtx flags;
+ 	      bool fpcmp = false;
+ 
+ 	      compare_code = GET_CODE (compare_op);
+ 
+ 	      flags = XEXP (compare_op, 0);
+ 
+ 	      if (GET_MODE (flags) == CCFPmode)
+ 		{
+ 		  fpcmp = true;
+ 		  compare_code
+ 		    = ix86_fp_compare_code_to_integer (compare_code);
+ 		}
+ 
+ 	      /* To simplify rest of code, restrict to the GEU case.  */
+ 	      if (compare_code == LTU)
+ 		{
+ 		  std::swap (ct, cf);
+ 		  compare_code = reverse_condition (compare_code);
+ 		  code = reverse_condition (code);
+ 		}
+ 	      else
+ 		{
+ 		  if (fpcmp)
+ 		    PUT_CODE (compare_op,
+ 			      reverse_condition_maybe_unordered
+ 			        (GET_CODE (compare_op)));
+ 		  else
+ 		    PUT_CODE (compare_op,
+ 			      reverse_condition (GET_CODE (compare_op)));
+ 		}
+ 	      diff = ct - cf;
+ 
+ 	      if (reg_overlap_mentioned_p (out, op0)
+ 		  || reg_overlap_mentioned_p (out, op1))
+ 		tmp = gen_reg_rtx (mode);
+ 
+ 	      if (mode == DImode)
+ 		emit_insn (gen_x86_movdicc_0_m1 (tmp, flags, compare_op));
+ 	      else
+ 		emit_insn (gen_x86_movsicc_0_m1	(gen_lowpart (SImode, tmp),
+ 						 flags, compare_op));
+ 	    }
+ 	  else
+ 	    {
+ 	      if (code == GT || code == GE)
+ 		code = reverse_condition (code);
+ 	      else
+ 		{
+ 		  std::swap (ct, cf);
+ 		  diff = ct - cf;
+ 		}
+ 	      tmp = emit_store_flag (tmp, code, op0, op1, VOIDmode, 0, -1);
+ 	    }
+ 
+ 	  if (diff == 1)
+ 	    {
+ 	      /*
+ 	       * cmpl op0,op1
+ 	       * sbbl dest,dest
+ 	       * [addl dest, ct]
+ 	       *
+ 	       * Size 5 - 8.
+ 	       */
+ 	      if (ct)
+ 		tmp = expand_simple_binop (mode, PLUS,
+ 					   tmp, GEN_INT (ct),
+ 					   copy_rtx (tmp), 1, OPTAB_DIRECT);
+ 	    }
+ 	  else if (cf == -1)
+ 	    {
+ 	      /*
+ 	       * cmpl op0,op1
+ 	       * sbbl dest,dest
+ 	       * orl $ct, dest
+ 	       *
+ 	       * Size 8.
+ 	       */
+ 	      tmp = expand_simple_binop (mode, IOR,
+ 					 tmp, GEN_INT (ct),
+ 					 copy_rtx (tmp), 1, OPTAB_DIRECT);
+ 	    }
+ 	  else if (diff == -1 && ct)
+ 	    {
+ 	      /*
+ 	       * cmpl op0,op1
+ 	       * sbbl dest,dest
+ 	       * notl dest
+ 	       * [addl dest, cf]
+ 	       *
+ 	       * Size 8 - 11.
+ 	       */
+ 	      tmp = expand_simple_unop (mode, NOT, tmp, copy_rtx (tmp), 1);
+ 	      if (cf)
+ 		tmp = expand_simple_binop (mode, PLUS,
+ 					   copy_rtx (tmp), GEN_INT (cf),
+ 					   copy_rtx (tmp), 1, OPTAB_DIRECT);
+ 	    }
+ 	  else
+ 	    {
+ 	      /*
+ 	       * cmpl op0,op1
+ 	       * sbbl dest,dest
+ 	       * [notl dest]
+ 	       * andl cf - ct, dest
+ 	       * [addl dest, ct]
+ 	       *
+ 	       * Size 8 - 11.
+ 	       */
+ 
+ 	      if (cf == 0)
+ 		{
+ 		  cf = ct;
+ 		  ct = 0;
+ 		  tmp = expand_simple_unop (mode, NOT, tmp, copy_rtx (tmp), 1);
+ 		}
+ 
+ 	      tmp = expand_simple_binop (mode, AND,
+ 					 copy_rtx (tmp),
+ 					 gen_int_mode (cf - ct, mode),
+ 					 copy_rtx (tmp), 1, OPTAB_DIRECT);
+ 	      if (ct)
+ 		tmp = expand_simple_binop (mode, PLUS,
+ 					   copy_rtx (tmp), GEN_INT (ct),
+ 					   copy_rtx (tmp), 1, OPTAB_DIRECT);
+ 	    }
+ 
+ 	  if (!rtx_equal_p (tmp, out))
+ 	    emit_move_insn (copy_rtx (out), copy_rtx (tmp));
+ 
+ 	  return true;
+ 	}
+ 
+       if (diff < 0)
+ 	{
+ 	  machine_mode cmp_mode = GET_MODE (op0);
+ 	  enum rtx_code new_code;
+ 
+ 	  if (SCALAR_FLOAT_MODE_P (cmp_mode))
+ 	    {
+ 	      gcc_assert (!DECIMAL_FLOAT_MODE_P (cmp_mode));
+ 
+ 	      /* We may be reversing unordered compare to normal compare, that
+ 		 is not valid in general (we may convert non-trapping condition
+ 		 to trapping one), however on i386 we currently emit all
+ 		 comparisons unordered.  */
+ 	      new_code = reverse_condition_maybe_unordered (code);
+ 	    }
+ 	  else
+ 	    new_code = ix86_reverse_condition (code, cmp_mode);
+ 	  if (new_code != UNKNOWN)
+ 	    {
+ 	      std::swap (ct, cf);
+ 	      diff = -diff;
+ 	      code = new_code;
+ 	    }
+ 	}
+ 
+       compare_code = UNKNOWN;
+       if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
+ 	  && CONST_INT_P (op1))
+ 	{
+ 	  if (op1 == const0_rtx
+ 	      && (code == LT || code == GE))
+ 	    compare_code = code;
+ 	  else if (op1 == constm1_rtx)
+ 	    {
+ 	      if (code == LE)
+ 		compare_code = LT;
+ 	      else if (code == GT)
+ 		compare_code = GE;
+ 	    }
+ 	}
+ 
+       /* Optimize dest = (op0 < 0) ? -1 : cf.  */
+       if (compare_code != UNKNOWN
+ 	  && GET_MODE (op0) == GET_MODE (out)
+ 	  && (cf == -1 || ct == -1))
+ 	{
+ 	  /* If lea code below could be used, only optimize
+ 	     if it results in a 2 insn sequence.  */
+ 
+ 	  if (! (diff == 1 || diff == 2 || diff == 4 || diff == 8
+ 		 || diff == 3 || diff == 5 || diff == 9)
+ 	      || (compare_code == LT && ct == -1)
+ 	      || (compare_code == GE && cf == -1))
+ 	    {
+ 	      /*
+ 	       * notl op1	(if necessary)
+ 	       * sarl $31, op1
+ 	       * orl cf, op1
+ 	       */
+ 	      if (ct != -1)
+ 		{
+ 		  cf = ct;
+ 		  ct = -1;
+ 		  code = reverse_condition (code);
+ 		}
+ 
+ 	      out = emit_store_flag (out, code, op0, op1, VOIDmode, 0, -1);
+ 
+ 	      out = expand_simple_binop (mode, IOR,
+ 					 out, GEN_INT (cf),
+ 					 out, 1, OPTAB_DIRECT);
+ 	      if (out != operands[0])
+ 		emit_move_insn (operands[0], out);
+ 
+ 	      return true;
+ 	    }
+ 	}
+ 
+ 
+       if ((diff == 1 || diff == 2 || diff == 4 || diff == 8
+ 	   || diff == 3 || diff == 5 || diff == 9)
+ 	  && ((mode != QImode && mode != HImode) || !TARGET_PARTIAL_REG_STALL)
+ 	  && (mode != DImode
+ 	      || x86_64_immediate_operand (GEN_INT (cf), VOIDmode)))
+ 	{
+ 	  /*
+ 	   * xorl dest,dest
+ 	   * cmpl op1,op2
+ 	   * setcc dest
+ 	   * lea cf(dest*(ct-cf)),dest
+ 	   *
+ 	   * Size 14.
+ 	   *
+ 	   * This also catches the degenerate setcc-only case.
+ 	   */
+ 
+ 	  rtx tmp;
+ 	  int nops;
+ 
+ 	  out = emit_store_flag (out, code, op0, op1, VOIDmode, 0, 1);
+ 
+ 	  nops = 0;
+ 	  /* On x86_64 the lea instruction operates on Pmode, so we need
+ 	     to get arithmetics done in proper mode to match.  */
+ 	  if (diff == 1)
+ 	    tmp = copy_rtx (out);
+ 	  else
+ 	    {
+ 	      rtx out1;
+ 	      out1 = copy_rtx (out);
+ 	      tmp = gen_rtx_MULT (mode, out1, GEN_INT (diff & ~1));
+ 	      nops++;
+ 	      if (diff & 1)
+ 		{
+ 		  tmp = gen_rtx_PLUS (mode, tmp, out1);
+ 		  nops++;
+ 		}
+ 	    }
+ 	  if (cf != 0)
+ 	    {
+ 	      tmp = gen_rtx_PLUS (mode, tmp, GEN_INT (cf));
+ 	      nops++;
+ 	    }
+ 	  if (!rtx_equal_p (tmp, out))
+ 	    {
+ 	      if (nops == 1)
+ 		out = force_operand (tmp, copy_rtx (out));
+ 	      else
+ 		emit_insn (gen_rtx_SET (copy_rtx (out), copy_rtx (tmp)));
+ 	    }
+ 	  if (!rtx_equal_p (out, operands[0]))
+ 	    emit_move_insn (operands[0], copy_rtx (out));
+ 
+ 	  return true;
+ 	}
+ 
+       /*
+        * General case:			Jumpful:
+        *   xorl dest,dest		cmpl op1, op2
+        *   cmpl op1, op2		movl ct, dest
+        *   setcc dest			jcc 1f
+        *   decl dest			movl cf, dest
+        *   andl (cf-ct),dest		1:
+        *   addl ct,dest
+        *
+        * Size 20.			Size 14.
+        *
+        * This is reasonably steep, but branch mispredict costs are
+        * high on modern cpus, so consider failing only if optimizing
+        * for space.
+        */
+ 
+       if ((!TARGET_CMOVE || (mode == QImode && TARGET_PARTIAL_REG_STALL))
+ 	  && BRANCH_COST (optimize_insn_for_speed_p (),
+ 		  	  false) >= 2)
+ 	{
+ 	  if (cf == 0)
+ 	    {
+ 	      machine_mode cmp_mode = GET_MODE (op0);
+ 	      enum rtx_code new_code;
+ 
+ 	      if (SCALAR_FLOAT_MODE_P (cmp_mode))
+ 		{
+ 		  gcc_assert (!DECIMAL_FLOAT_MODE_P (cmp_mode));
+ 
+ 		  /* We may be reversing unordered compare to normal compare,
+ 		     that is not valid in general (we may convert non-trapping
+ 		     condition to trapping one), however on i386 we currently
+ 		     emit all comparisons unordered.  */
+ 		  new_code = reverse_condition_maybe_unordered (code);
+ 		}
+ 	      else
+ 		{
+ 		  new_code = ix86_reverse_condition (code, cmp_mode);
+ 		  if (compare_code != UNKNOWN && new_code != UNKNOWN)
+ 		    compare_code = reverse_condition (compare_code);
+ 		}
+ 
+ 	      if (new_code != UNKNOWN)
+ 		{
+ 		  cf = ct;
+ 		  ct = 0;
+ 		  code = new_code;
+ 		}
+ 	    }
+ 
+ 	  if (compare_code != UNKNOWN)
+ 	    {
+ 	      /* notl op1	(if needed)
+ 		 sarl $31, op1
+ 		 andl (cf-ct), op1
+ 		 addl ct, op1
+ 
+ 		 For x < 0 (resp. x <= -1) there will be no notl,
+ 		 so if possible swap the constants to get rid of the
+ 		 complement.
+ 		 True/false will be -1/0 while code below (store flag
+ 		 followed by decrement) is 0/-1, so the constants need
+ 		 to be exchanged once more.  */
+ 
+ 	      if (compare_code == GE || !cf)
+ 		{
+ 		  code = reverse_condition (code);
+ 		  compare_code = LT;
+ 		}
+ 	      else
+ 		std::swap (ct, cf);
+ 
+ 	      out = emit_store_flag (out, code, op0, op1, VOIDmode, 0, -1);
+ 	    }
+ 	  else
+ 	    {
+ 	      out = emit_store_flag (out, code, op0, op1, VOIDmode, 0, 1);
+ 
+ 	      out = expand_simple_binop (mode, PLUS, copy_rtx (out),
+ 					 constm1_rtx,
+ 					 copy_rtx (out), 1, OPTAB_DIRECT);
+ 	    }
+ 
+ 	  out = expand_simple_binop (mode, AND, copy_rtx (out),
+ 				     gen_int_mode (cf - ct, mode),
+ 				     copy_rtx (out), 1, OPTAB_DIRECT);
+ 	  if (ct)
+ 	    out = expand_simple_binop (mode, PLUS, copy_rtx (out), GEN_INT (ct),
+ 				       copy_rtx (out), 1, OPTAB_DIRECT);
+ 	  if (!rtx_equal_p (out, operands[0]))
+ 	    emit_move_insn (operands[0], copy_rtx (out));
+ 
+ 	  return true;
+ 	}
+     }
+ 
+   if (!TARGET_CMOVE || (mode == QImode && TARGET_PARTIAL_REG_STALL))
+     {
+       /* Try a few things more with specific constants and a variable.  */
+ 
+       optab op;
+       rtx var, orig_out, out, tmp;
+ 
+       if (BRANCH_COST (optimize_insn_for_speed_p (), false) <= 2)
+ 	return false;
+ 
+       /* If one of the two operands is an interesting constant, load a
+ 	 constant with the above and mask it in with a logical operation.  */
+ 
+       if (CONST_INT_P (operands[2]))
+ 	{
+ 	  var = operands[3];
+ 	  if (INTVAL (operands[2]) == 0 && operands[3] != constm1_rtx)
+ 	    operands[3] = constm1_rtx, op = and_optab;
+ 	  else if (INTVAL (operands[2]) == -1 && operands[3] != const0_rtx)
+ 	    operands[3] = const0_rtx, op = ior_optab;
+ 	  else
+ 	    return false;
+ 	}
+       else if (CONST_INT_P (operands[3]))
+ 	{
+ 	  var = operands[2];
+ 	  if (INTVAL (operands[3]) == 0 && operands[2] != constm1_rtx)
+ 	    operands[2] = constm1_rtx, op = and_optab;
+ 	  else if (INTVAL (operands[3]) == -1 && operands[3] != const0_rtx)
+ 	    operands[2] = const0_rtx, op = ior_optab;
+ 	  else
+ 	    return false;
+ 	}
+       else
+         return false;
+ 
+       orig_out = operands[0];
+       tmp = gen_reg_rtx (mode);
+       operands[0] = tmp;
+ 
+       /* Recurse to get the constant loaded.  */
+       if (!ix86_expand_int_movcc (operands))
+         return false;
+ 
+       /* Mask in the interesting variable.  */
+       out = expand_binop (mode, op, var, tmp, orig_out, 0,
+ 			  OPTAB_WIDEN);
+       if (!rtx_equal_p (out, orig_out))
+ 	emit_move_insn (copy_rtx (orig_out), copy_rtx (out));
+ 
+       return true;
+     }
+ 
+   /*
+    * For comparison with above,
+    *
+    * movl cf,dest
+    * movl ct,tmp
+    * cmpl op1,op2
+    * cmovcc tmp,dest
+    *
+    * Size 15.
+    */
+ 
+   if (! nonimmediate_operand (operands[2], mode))
+     operands[2] = force_reg (mode, operands[2]);
+   if (! nonimmediate_operand (operands[3], mode))
+     operands[3] = force_reg (mode, operands[3]);
+ 
+   if (! register_operand (operands[2], VOIDmode)
+       && (mode == QImode
+           || ! register_operand (operands[3], VOIDmode)))
+     operands[2] = force_reg (mode, operands[2]);
+ 
+   if (mode == QImode
+       && ! register_operand (operands[3], VOIDmode))
+     operands[3] = force_reg (mode, operands[3]);
+ 
+   emit_insn (compare_seq);
+   emit_insn (gen_rtx_SET (operands[0],
+ 			  gen_rtx_IF_THEN_ELSE (mode,
+ 						compare_op, operands[2],
+ 						operands[3])));
+   return true;
+ }
+ 
+ /* Detect conditional moves that exactly match min/max operational
+    semantics.  Note that this is IEEE safe, as long as we don't
+    interchange the operands.
+ 
+    Returns FALSE if this conditional move doesn't match a MIN/MAX,
+    and TRUE if the operation is successful and instructions are emitted.  */
+ 
+ static bool
+ ix86_expand_sse_fp_minmax (rtx dest, enum rtx_code code, rtx cmp_op0,
+ 			   rtx cmp_op1, rtx if_true, rtx if_false)
+ {
+   machine_mode mode;
+   bool is_min;
+   rtx tmp;
+ 
+   if (code == LT)
+     ;
+   else if (code == UNGE)
+     std::swap (if_true, if_false);
+   else
+     return false;
+ 
+   if (rtx_equal_p (cmp_op0, if_true) && rtx_equal_p (cmp_op1, if_false))
+     is_min = true;
+   else if (rtx_equal_p (cmp_op1, if_true) && rtx_equal_p (cmp_op0, if_false))
+     is_min = false;
+   else
+     return false;
+ 
+   mode = GET_MODE (dest);
+ 
+   /* We want to check HONOR_NANS and HONOR_SIGNED_ZEROS here,
+      but MODE may be a vector mode and thus not appropriate.  */
+   if (!flag_finite_math_only || flag_signed_zeros)
+     {
+       int u = is_min ? UNSPEC_IEEE_MIN : UNSPEC_IEEE_MAX;
+       rtvec v;
+ 
+       if_true = force_reg (mode, if_true);
+       v = gen_rtvec (2, if_true, if_false);
+       tmp = gen_rtx_UNSPEC (mode, v, u);
+     }
+   else
+     {
+       code = is_min ? SMIN : SMAX;
+       if (MEM_P (if_true) && MEM_P (if_false))
+ 	if_true = force_reg (mode, if_true);
+       tmp = gen_rtx_fmt_ee (code, mode, if_true, if_false);
+     }
+ 
+   emit_insn (gen_rtx_SET (dest, tmp));
+   return true;
+ }
+ 
+ /* Return true if MODE is valid for vector compare to mask register,
+    Same result for conditionl vector move with mask register.  */
+ static bool
+ ix86_valid_mask_cmp_mode (machine_mode mode)
+ {
+   /* XOP has its own vector conditional movement.  */
+   if (TARGET_XOP && !TARGET_AVX512F)
+     return false;
+ 
+   /* AVX512F is needed for mask operation.  */
+   if (!(TARGET_AVX512F && VECTOR_MODE_P (mode)))
+     return false;
+ 
+   /* AVX512BW is needed for vector QI/HImode,
+      AVX512VL is needed for 128/256-bit vector.  */
+   machine_mode inner_mode = GET_MODE_INNER (mode);
+   int vector_size = GET_MODE_SIZE (mode);
+   if ((inner_mode == QImode || inner_mode == HImode) && !TARGET_AVX512BW)
+     return false;
+ 
+   return vector_size == 64 || TARGET_AVX512VL;
+ }
+ 
+ /* Expand an SSE comparison.  Return the register with the result.  */
+ 
+ static rtx
+ ix86_expand_sse_cmp (rtx dest, enum rtx_code code, rtx cmp_op0, rtx cmp_op1,
+ 		     rtx op_true, rtx op_false)
+ {
+   machine_mode mode = GET_MODE (dest);
+   machine_mode cmp_ops_mode = GET_MODE (cmp_op0);
+ 
+   /* In general case result of comparison can differ from operands' type.  */
+   machine_mode cmp_mode;
+ 
+   /* In AVX512F the result of comparison is an integer mask.  */
+   bool maskcmp = false;
+   rtx x;
+ 
+   if (ix86_valid_mask_cmp_mode (cmp_ops_mode))
+     {
+       unsigned int nbits = GET_MODE_NUNITS (cmp_ops_mode);
+       maskcmp = true;
+       cmp_mode = nbits > 8 ? int_mode_for_size (nbits, 0).require () : E_QImode;
+     }
+   else
+     cmp_mode = cmp_ops_mode;
+ 
+   cmp_op0 = force_reg (cmp_ops_mode, cmp_op0);
+ 
+   int (*op1_predicate)(rtx, machine_mode)
+     = VECTOR_MODE_P (cmp_ops_mode) ? vector_operand : nonimmediate_operand;
+ 
+   if (!op1_predicate (cmp_op1, cmp_ops_mode))
+     cmp_op1 = force_reg (cmp_ops_mode, cmp_op1);
+ 
+   if (optimize
+       || (maskcmp && cmp_mode != mode)
+       || (op_true && reg_overlap_mentioned_p (dest, op_true))
+       || (op_false && reg_overlap_mentioned_p (dest, op_false)))
+     dest = gen_reg_rtx (maskcmp ? cmp_mode : mode);
+ 
+   x = gen_rtx_fmt_ee (code, cmp_mode, cmp_op0, cmp_op1);
+ 
+   if (cmp_mode != mode && !maskcmp)
+     {
+       x = force_reg (cmp_ops_mode, x);
+       convert_move (dest, x, false);
+     }
+   else
+     emit_insn (gen_rtx_SET (dest, x));
+ 
+   return dest;
+ }
+ 
+ /* Expand DEST = CMP ? OP_TRUE : OP_FALSE into a sequence of logical
+    operations.  This is used for both scalar and vector conditional moves.  */
+ 
+ void
+ ix86_expand_sse_movcc (rtx dest, rtx cmp, rtx op_true, rtx op_false)
+ {
+   machine_mode mode = GET_MODE (dest);
+   machine_mode cmpmode = GET_MODE (cmp);
+ 
+   /* In AVX512F the result of comparison is an integer mask.  */
+   bool maskcmp = mode != cmpmode && ix86_valid_mask_cmp_mode (mode);
+ 
+   rtx t2, t3, x;
+ 
+   /* If we have an integer mask and FP value then we need
+      to cast mask to FP mode.  */
+   if (mode != cmpmode && VECTOR_MODE_P (cmpmode))
+     {
+       cmp = force_reg (cmpmode, cmp);
+       cmp = gen_rtx_SUBREG (mode, cmp, 0);
+     }
+ 
+   if (maskcmp)
+     {
+       /* Using vector move with mask register.  */
+       cmp = force_reg (cmpmode, cmp);
+       /* Optimize for mask zero.  */
+       op_true = (op_true != CONST0_RTX (mode)
+ 		 ? force_reg (mode, op_true) : op_true);
+       op_false = (op_false != CONST0_RTX (mode)
+ 		  ? force_reg (mode, op_false) : op_false);
+       if (op_true == CONST0_RTX (mode))
+ 	{
+ 	  rtx (*gen_not) (rtx, rtx);
+ 	  switch (cmpmode)
+ 	    {
+ 	    case E_QImode: gen_not = gen_knotqi; break;
+ 	    case E_HImode: gen_not = gen_knothi; break;
+ 	    case E_SImode: gen_not = gen_knotsi; break;
+ 	    case E_DImode: gen_not = gen_knotdi; break;
+ 	    default: gcc_unreachable ();
+ 	    }
+ 	  rtx n = gen_reg_rtx (cmpmode);
+ 	  emit_insn (gen_not (n, cmp));
+ 	  cmp = n;
+ 	  /* Reverse op_true op_false.  */
+ 	  std::swap (op_true, op_false);
+ 	}
+ 
+       rtx vec_merge = gen_rtx_VEC_MERGE (mode, op_true, op_false, cmp);
+       emit_insn (gen_rtx_SET (dest, vec_merge));
+       return;
+     }
+   else if (vector_all_ones_operand (op_true, mode)
+ 	   && op_false == CONST0_RTX (mode))
+     {
+       emit_insn (gen_rtx_SET (dest, cmp));
+       return;
+     }
+   else if (op_false == CONST0_RTX (mode))
+     {
+       op_true = force_reg (mode, op_true);
+       x = gen_rtx_AND (mode, cmp, op_true);
+       emit_insn (gen_rtx_SET (dest, x));
+       return;
+     }
+   else if (op_true == CONST0_RTX (mode))
+     {
+       op_false = force_reg (mode, op_false);
+       x = gen_rtx_NOT (mode, cmp);
+       x = gen_rtx_AND (mode, x, op_false);
+       emit_insn (gen_rtx_SET (dest, x));
+       return;
+     }
+   else if (INTEGRAL_MODE_P (mode) && op_true == CONSTM1_RTX (mode))
+     {
+       op_false = force_reg (mode, op_false);
+       x = gen_rtx_IOR (mode, cmp, op_false);
+       emit_insn (gen_rtx_SET (dest, x));
+       return;
+     }
+   else if (TARGET_XOP)
+     {
+       op_true = force_reg (mode, op_true);
+ 
+       if (!nonimmediate_operand (op_false, mode))
+ 	op_false = force_reg (mode, op_false);
+ 
+       emit_insn (gen_rtx_SET (dest, gen_rtx_IF_THEN_ELSE (mode, cmp,
+ 							  op_true,
+ 							  op_false)));
+       return;
+     }
+ 
+   rtx (*gen) (rtx, rtx, rtx, rtx) = NULL;
+   rtx d = dest;
+ 
+   if (!vector_operand (op_true, mode))
+     op_true = force_reg (mode, op_true);
+ 
+   op_false = force_reg (mode, op_false);
+ 
+   switch (mode)
+     {
+     case E_V4SFmode:
+       if (TARGET_SSE4_1)
+ 	gen = gen_sse4_1_blendvps;
+       break;
+     case E_V2DFmode:
+       if (TARGET_SSE4_1)
+ 	gen = gen_sse4_1_blendvpd;
+       break;
+     case E_SFmode:
+       if (TARGET_SSE4_1)
+ 	{
+ 	  gen = gen_sse4_1_blendvss;
+ 	  op_true = force_reg (mode, op_true);
+ 	}
+       break;
+     case E_DFmode:
+       if (TARGET_SSE4_1)
+ 	{
+ 	  gen = gen_sse4_1_blendvsd;
+ 	  op_true = force_reg (mode, op_true);
+ 	}
+       break;
+     case E_V16QImode:
+     case E_V8HImode:
+     case E_V4SImode:
+     case E_V2DImode:
+       if (TARGET_SSE4_1)
+ 	{
+ 	  gen = gen_sse4_1_pblendvb;
+ 	  if (mode != V16QImode)
+ 	    d = gen_reg_rtx (V16QImode);
+ 	  op_false = gen_lowpart (V16QImode, op_false);
+ 	  op_true = gen_lowpart (V16QImode, op_true);
+ 	  cmp = gen_lowpart (V16QImode, cmp);
+ 	}
+       break;
+     case E_V8SFmode:
+       if (TARGET_AVX)
+ 	gen = gen_avx_blendvps256;
+       break;
+     case E_V4DFmode:
+       if (TARGET_AVX)
+ 	gen = gen_avx_blendvpd256;
+       break;
+     case E_V32QImode:
+     case E_V16HImode:
+     case E_V8SImode:
+     case E_V4DImode:
+       if (TARGET_AVX2)
+ 	{
+ 	  gen = gen_avx2_pblendvb;
+ 	  if (mode != V32QImode)
+ 	    d = gen_reg_rtx (V32QImode);
+ 	  op_false = gen_lowpart (V32QImode, op_false);
+ 	  op_true = gen_lowpart (V32QImode, op_true);
+ 	  cmp = gen_lowpart (V32QImode, cmp);
+ 	}
+       break;
+ 
+     case E_V64QImode:
+       gen = gen_avx512bw_blendmv64qi;
+       break;
+     case E_V32HImode:
+       gen = gen_avx512bw_blendmv32hi;
+       break;
+     case E_V16SImode:
+       gen = gen_avx512f_blendmv16si;
+       break;
+     case E_V8DImode:
+       gen = gen_avx512f_blendmv8di;
+       break;
+     case E_V8DFmode:
+       gen = gen_avx512f_blendmv8df;
+       break;
+     case E_V16SFmode:
+       gen = gen_avx512f_blendmv16sf;
+       break;
+ 
+     default:
+       break;
+     }
+ 
+   if (gen != NULL)
+     {
+       emit_insn (gen (d, op_false, op_true, cmp));
+       if (d != dest)
+ 	emit_move_insn (dest, gen_lowpart (GET_MODE (dest), d));
+     }
+   else
+     {
+       op_true = force_reg (mode, op_true);
+ 
+       t2 = gen_reg_rtx (mode);
+       if (optimize)
+ 	t3 = gen_reg_rtx (mode);
+       else
+ 	t3 = dest;
+ 
+       x = gen_rtx_AND (mode, op_true, cmp);
+       emit_insn (gen_rtx_SET (t2, x));
+ 
+       x = gen_rtx_NOT (mode, cmp);
+       x = gen_rtx_AND (mode, x, op_false);
+       emit_insn (gen_rtx_SET (t3, x));
+ 
+       x = gen_rtx_IOR (mode, t3, t2);
+       emit_insn (gen_rtx_SET (dest, x));
+     }
+ }
+ 
+ /* Swap, force into registers, or otherwise massage the two operands
+    to an sse comparison with a mask result.  Thus we differ a bit from
+    ix86_prepare_fp_compare_args which expects to produce a flags result.
+ 
+    The DEST operand exists to help determine whether to commute commutative
+    operators.  The POP0/POP1 operands are updated in place.  The new
+    comparison code is returned, or UNKNOWN if not implementable.  */
+ 
+ static enum rtx_code
+ ix86_prepare_sse_fp_compare_args (rtx dest, enum rtx_code code,
+ 				  rtx *pop0, rtx *pop1)
+ {
+   switch (code)
+     {
+     case LTGT:
+     case UNEQ:
+       /* AVX supports all the needed comparisons.  */
+       if (TARGET_AVX)
+ 	break;
+       /* We have no LTGT as an operator.  We could implement it with
+ 	 NE & ORDERED, but this requires an extra temporary.  It's
+ 	 not clear that it's worth it.  */
+       return UNKNOWN;
+ 
+     case LT:
+     case LE:
+     case UNGT:
+     case UNGE:
+       /* These are supported directly.  */
+       break;
+ 
+     case EQ:
+     case NE:
+     case UNORDERED:
+     case ORDERED:
+       /* AVX has 3 operand comparisons, no need to swap anything.  */
+       if (TARGET_AVX)
+ 	break;
+       /* For commutative operators, try to canonicalize the destination
+ 	 operand to be first in the comparison - this helps reload to
+ 	 avoid extra moves.  */
+       if (!dest || !rtx_equal_p (dest, *pop1))
+ 	break;
+       /* FALLTHRU */
+ 
+     case GE:
+     case GT:
+     case UNLE:
+     case UNLT:
+       /* These are not supported directly before AVX, and furthermore
+ 	 ix86_expand_sse_fp_minmax only optimizes LT/UNGE.  Swap the
+ 	 comparison operands to transform into something that is
+ 	 supported.  */
+       std::swap (*pop0, *pop1);
+       code = swap_condition (code);
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   return code;
+ }
+ 
+ /* Expand a floating-point conditional move.  Return true if successful.  */
+ 
+ bool
+ ix86_expand_fp_movcc (rtx operands[])
+ {
+   machine_mode mode = GET_MODE (operands[0]);
+   enum rtx_code code = GET_CODE (operands[1]);
+   rtx tmp, compare_op;
+   rtx op0 = XEXP (operands[1], 0);
+   rtx op1 = XEXP (operands[1], 1);
+ 
+   if (TARGET_SSE_MATH && SSE_FLOAT_MODE_P (mode))
+     {
+       machine_mode cmode;
+ 
+       /* Since we've no cmove for sse registers, don't force bad register
+ 	 allocation just to gain access to it.  Deny movcc when the
+ 	 comparison mode doesn't match the move mode.  */
+       cmode = GET_MODE (op0);
+       if (cmode == VOIDmode)
+ 	cmode = GET_MODE (op1);
+       if (cmode != mode)
+ 	return false;
+ 
+       code = ix86_prepare_sse_fp_compare_args (operands[0], code, &op0, &op1);
+       if (code == UNKNOWN)
+ 	return false;
+ 
+       if (ix86_expand_sse_fp_minmax (operands[0], code, op0, op1,
+ 				     operands[2], operands[3]))
+ 	return true;
+ 
+       tmp = ix86_expand_sse_cmp (operands[0], code, op0, op1,
+ 				 operands[2], operands[3]);
+       ix86_expand_sse_movcc (operands[0], tmp, operands[2], operands[3]);
+       return true;
+     }
+ 
+   if (GET_MODE (op0) == TImode
+       || (GET_MODE (op0) == DImode
+ 	  && !TARGET_64BIT))
+     return false;
+ 
+   /* The floating point conditional move instructions don't directly
+      support conditions resulting from a signed integer comparison.  */
+ 
+   compare_op = ix86_expand_compare (code, op0, op1);
+   if (!fcmov_comparison_operator (compare_op, VOIDmode))
+     {
+       tmp = gen_reg_rtx (QImode);
+       ix86_expand_setcc (tmp, code, op0, op1);
+ 
+       compare_op = ix86_expand_compare (NE, tmp, const0_rtx);
+     }
+ 
+   emit_insn (gen_rtx_SET (operands[0],
+ 			  gen_rtx_IF_THEN_ELSE (mode, compare_op,
+ 						operands[2], operands[3])));
+ 
+   return true;
+ }
+ 
+ /* Helper for ix86_cmp_code_to_pcmp_immediate for int modes.  */
+ 
+ static int
+ ix86_int_cmp_code_to_pcmp_immediate (enum rtx_code code)
+ {
+   switch (code)
+     {
+     case EQ:
+       return 0;
+     case LT:
+     case LTU:
+       return 1;
+     case LE:
+     case LEU:
+       return 2;
+     case NE:
+       return 4;
+     case GE:
+     case GEU:
+       return 5;
+     case GT:
+     case GTU:
+       return 6;
+     default:
+       gcc_unreachable ();
+     }
+ }
+ 
+ /* Helper for ix86_cmp_code_to_pcmp_immediate for fp modes.  */
+ 
+ static int
+ ix86_fp_cmp_code_to_pcmp_immediate (enum rtx_code code)
+ {
+   switch (code)
+     {
+     case EQ:
+       return 0x00;
+     case NE:
+       return 0x04;
+     case GT:
+       return 0x0e;
+     case LE:
+       return 0x02;
+     case GE:
+       return 0x0d;
+     case LT:
+       return 0x01;
+     case UNLE:
+       return 0x0a;
+     case UNLT:
+       return 0x09;
+     case UNGE:
+       return 0x05;
+     case UNGT:
+       return 0x06;
+     case UNEQ:
+       return 0x18;
+     case LTGT:
+       return 0x0c;
+     case ORDERED:
+       return 0x07;
+     case UNORDERED:
+       return 0x03;
+     default:
+       gcc_unreachable ();
+     }
+ }
+ 
+ /* Return immediate value to be used in UNSPEC_PCMP
+    for comparison CODE in MODE.  */
+ 
+ static int
+ ix86_cmp_code_to_pcmp_immediate (enum rtx_code code, machine_mode mode)
+ {
+   if (FLOAT_MODE_P (mode))
+     return ix86_fp_cmp_code_to_pcmp_immediate (code);
+   return ix86_int_cmp_code_to_pcmp_immediate (code);
+ }
+ 
+ /* Expand AVX-512 vector comparison.  */
+ 
+ bool
+ ix86_expand_mask_vec_cmp (rtx operands[])
+ {
+   machine_mode mask_mode = GET_MODE (operands[0]);
+   machine_mode cmp_mode = GET_MODE (operands[2]);
+   enum rtx_code code = GET_CODE (operands[1]);
+   rtx imm = GEN_INT (ix86_cmp_code_to_pcmp_immediate (code, cmp_mode));
+   int unspec_code;
+   rtx unspec;
+ 
+   switch (code)
+     {
+     case LEU:
+     case GTU:
+     case GEU:
+     case LTU:
+       unspec_code = UNSPEC_UNSIGNED_PCMP;
+       break;
+ 
+     default:
+       unspec_code = UNSPEC_PCMP;
+     }
+ 
+   unspec = gen_rtx_UNSPEC (mask_mode, gen_rtvec (3, operands[2],
+ 						 operands[3], imm),
+ 			   unspec_code);
+   emit_insn (gen_rtx_SET (operands[0], unspec));
+ 
+   return true;
+ }
+ 
+ /* Expand fp vector comparison.  */
+ 
+ bool
+ ix86_expand_fp_vec_cmp (rtx operands[])
+ {
+   enum rtx_code code = GET_CODE (operands[1]);
+   rtx cmp;
+ 
+   code = ix86_prepare_sse_fp_compare_args (operands[0], code,
+ 					   &operands[2], &operands[3]);
+   if (code == UNKNOWN)
+     {
+       rtx temp;
+       switch (GET_CODE (operands[1]))
+ 	{
+ 	case LTGT:
+ 	  temp = ix86_expand_sse_cmp (operands[0], ORDERED, operands[2],
+ 				      operands[3], NULL, NULL);
+ 	  cmp = ix86_expand_sse_cmp (operands[0], NE, operands[2],
+ 				     operands[3], NULL, NULL);
+ 	  code = AND;
+ 	  break;
+ 	case UNEQ:
+ 	  temp = ix86_expand_sse_cmp (operands[0], UNORDERED, operands[2],
+ 				      operands[3], NULL, NULL);
+ 	  cmp = ix86_expand_sse_cmp (operands[0], EQ, operands[2],
+ 				     operands[3], NULL, NULL);
+ 	  code = IOR;
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+       cmp = expand_simple_binop (GET_MODE (cmp), code, temp, cmp, cmp, 1,
+ 				 OPTAB_DIRECT);
+     }
+   else
+     cmp = ix86_expand_sse_cmp (operands[0], code, operands[2], operands[3],
+ 			       operands[1], operands[2]);
+ 
+   if (operands[0] != cmp)
+     emit_move_insn (operands[0], cmp);
+ 
+   return true;
+ }
+ 
+ static rtx
+ ix86_expand_int_sse_cmp (rtx dest, enum rtx_code code, rtx cop0, rtx cop1,
+ 			 rtx op_true, rtx op_false, bool *negate)
+ {
+   machine_mode data_mode = GET_MODE (dest);
+   machine_mode mode = GET_MODE (cop0);
+   rtx x;
+ 
+   *negate = false;
+ 
+   /* XOP supports all of the comparisons on all 128-bit vector int types.  */
+   if (TARGET_XOP
+       && (mode == V16QImode || mode == V8HImode
+ 	  || mode == V4SImode || mode == V2DImode))
+     ;
+   /* AVX512F supports all of the comparsions
+      on all 128/256/512-bit vector int types.  */
+   else if (ix86_valid_mask_cmp_mode (mode))
+     ;
+   else
+     {
+       /* Canonicalize the comparison to EQ, GT, GTU.  */
+       switch (code)
+ 	{
+ 	case EQ:
+ 	case GT:
+ 	case GTU:
+ 	  break;
+ 
+ 	case NE:
+ 	case LE:
+ 	case LEU:
+ 	  code = reverse_condition (code);
+ 	  *negate = true;
+ 	  break;
+ 
+ 	case GE:
+ 	case GEU:
+ 	  code = reverse_condition (code);
+ 	  *negate = true;
+ 	  /* FALLTHRU */
+ 
+ 	case LT:
+ 	case LTU:
+ 	  std::swap (cop0, cop1);
+ 	  code = swap_condition (code);
+ 	  break;
+ 
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+ 
+       /* Only SSE4.1/SSE4.2 supports V2DImode.  */
+       if (mode == V2DImode)
+ 	{
+ 	  switch (code)
+ 	    {
+ 	    case EQ:
+ 	      /* SSE4.1 supports EQ.  */
+ 	      if (!TARGET_SSE4_1)
+ 		return NULL;
+ 	      break;
+ 
+ 	    case GT:
+ 	    case GTU:
+ 	      /* SSE4.2 supports GT/GTU.  */
+ 	      if (!TARGET_SSE4_2)
+ 		return NULL;
+ 	      break;
+ 
+ 	    default:
+ 	      gcc_unreachable ();
+ 	    }
+ 	}
+ 
+       rtx optrue = op_true ? op_true : CONSTM1_RTX (data_mode);
+       rtx opfalse = op_false ? op_false : CONST0_RTX (data_mode);
+       if (*negate)
+ 	std::swap (optrue, opfalse);
+ 
+       /* Transform x > y ? 0 : -1 (i.e. x <= y ? -1 : 0 or x <= y) when
+ 	 not using integer masks into min (x, y) == x ? -1 : 0 (i.e.
+ 	 min (x, y) == x).  While we add one instruction (the minimum),
+ 	 we remove the need for two instructions in the negation, as the
+ 	 result is done this way.
+ 	 When using masks, do it for SI/DImode element types, as it is shorter
+ 	 than the two subtractions.  */
+       if ((code != EQ
+ 	   && GET_MODE_SIZE (mode) != 64
+ 	   && vector_all_ones_operand (opfalse, data_mode)
+ 	   && optrue == CONST0_RTX (data_mode))
+ 	  || (code == GTU
+ 	      && GET_MODE_SIZE (GET_MODE_INNER (mode)) >= 4
+ 	      /* Don't do it if not using integer masks and we'd end up with
+ 		 the right values in the registers though.  */
+ 	      && (GET_MODE_SIZE (mode) == 64
+ 		  || !vector_all_ones_operand (optrue, data_mode)
+ 		  || opfalse != CONST0_RTX (data_mode))))
+ 	{
+ 	  rtx (*gen) (rtx, rtx, rtx) = NULL;
+ 
+ 	  switch (mode)
+ 	    {
+ 	    case E_V16SImode:
+ 	      gen = (code == GTU) ? gen_uminv16si3 : gen_sminv16si3;
+ 	      break;
+ 	    case E_V8DImode:
+ 	      gen = (code == GTU) ? gen_uminv8di3 : gen_sminv8di3;
+ 	      cop0 = force_reg (mode, cop0);
+ 	      cop1 = force_reg (mode, cop1);
+ 	      break;
+ 	    case E_V32QImode:
+ 	      if (TARGET_AVX2)
+ 		gen = (code == GTU) ? gen_uminv32qi3 : gen_sminv32qi3;
+ 	      break;
+ 	    case E_V16HImode:
+ 	      if (TARGET_AVX2)
+ 		gen = (code == GTU) ? gen_uminv16hi3 : gen_sminv16hi3;
+ 	      break;
+ 	    case E_V8SImode:
+ 	      if (TARGET_AVX2)
+ 		gen = (code == GTU) ? gen_uminv8si3 : gen_sminv8si3;
+ 	      break;
+ 	    case E_V4DImode:
+ 	      if (TARGET_AVX512VL)
+ 		{
+ 		  gen = (code == GTU) ? gen_uminv4di3 : gen_sminv4di3;
+ 		  cop0 = force_reg (mode, cop0);
+ 		  cop1 = force_reg (mode, cop1);
+ 		}
+ 	      break;
+ 	    case E_V16QImode:
+ 	      if (code == GTU && TARGET_SSE2)
+ 		gen = gen_uminv16qi3;
+ 	      else if (code == GT && TARGET_SSE4_1)
+ 		gen = gen_sminv16qi3;
+ 	      break;
+ 	    case E_V8HImode:
+ 	      if (code == GTU && TARGET_SSE4_1)
+ 		gen = gen_uminv8hi3;
+ 	      else if (code == GT && TARGET_SSE2)
+ 		gen = gen_sminv8hi3;
+ 	      break;
+ 	    case E_V4SImode:
+ 	      if (TARGET_SSE4_1)
+ 		gen = (code == GTU) ? gen_uminv4si3 : gen_sminv4si3;
+ 	      break;
+ 	    case E_V2DImode:
+ 	      if (TARGET_AVX512VL)
+ 		{
+ 		  gen = (code == GTU) ? gen_uminv2di3 : gen_sminv2di3;
+ 		  cop0 = force_reg (mode, cop0);
+ 		  cop1 = force_reg (mode, cop1);
+ 		}
+ 	      break;
+ 	    default:
+ 	      break;
+ 	    }
+ 
+ 	  if (gen)
+ 	    {
+ 	      rtx tem = gen_reg_rtx (mode);
+ 	      if (!vector_operand (cop0, mode))
+ 		cop0 = force_reg (mode, cop0);
+ 	      if (!vector_operand (cop1, mode))
+ 		cop1 = force_reg (mode, cop1);
+ 	      *negate = !*negate;
+ 	      emit_insn (gen (tem, cop0, cop1));
+ 	      cop1 = tem;
+ 	      code = EQ;
+ 	    }
+ 	}
+ 
+       /* Unsigned parallel compare is not supported by the hardware.
+ 	 Play some tricks to turn this into a signed comparison
+ 	 against 0.  */
+       if (code == GTU)
+ 	{
+ 	  cop0 = force_reg (mode, cop0);
+ 
+ 	  switch (mode)
+ 	    {
+ 	    case E_V16SImode:
+ 	    case E_V8DImode:
+ 	    case E_V8SImode:
+ 	    case E_V4DImode:
+ 	    case E_V4SImode:
+ 	    case E_V2DImode:
+ 		{
+ 		  rtx t1, t2, mask;
+ 
+ 		  /* Subtract (-(INT MAX) - 1) from both operands to make
+ 		     them signed.  */
+ 		  mask = ix86_build_signbit_mask (mode, true, false);
+ 		  t1 = gen_reg_rtx (mode);
+ 		  emit_insn (gen_sub3_insn (t1, cop0, mask));
+ 
+ 		  t2 = gen_reg_rtx (mode);
+ 		  emit_insn (gen_sub3_insn (t2, cop1, mask));
+ 
+ 		  cop0 = t1;
+ 		  cop1 = t2;
+ 		  code = GT;
+ 		}
+ 	      break;
+ 
+ 	    case E_V64QImode:
+ 	    case E_V32HImode:
+ 	    case E_V32QImode:
+ 	    case E_V16HImode:
+ 	    case E_V16QImode:
+ 	    case E_V8HImode:
+ 	      /* Perform a parallel unsigned saturating subtraction.  */
+ 	      x = gen_reg_rtx (mode);
+ 	      emit_insn (gen_rtx_SET
+ 			 (x, gen_rtx_US_MINUS (mode, cop0, cop1)));
+ 	      cop0 = x;
+ 	      cop1 = CONST0_RTX (mode);
+ 	      code = EQ;
+ 	      *negate = !*negate;
+ 	      break;
+ 
+ 	    default:
+ 	      gcc_unreachable ();
+ 	    }
+ 	}
+     }
+ 
+   if (*negate)
+     std::swap (op_true, op_false);
+ 
+   /* Allow the comparison to be done in one mode, but the movcc to
+      happen in another mode.  */
+   if (data_mode == mode)
+     {
+       x = ix86_expand_sse_cmp (dest, code, cop0, cop1,
+ 			       op_true, op_false);
+     }
+   else
+     {
+       gcc_assert (GET_MODE_SIZE (data_mode) == GET_MODE_SIZE (mode));
+       x = ix86_expand_sse_cmp (gen_reg_rtx (mode), code, cop0, cop1,
+ 			       op_true, op_false);
+       if (GET_MODE (x) == mode)
+ 	x = gen_lowpart (data_mode, x);
+     }
+ 
+   return x;
+ }
+ 
+ /* Expand integer vector comparison.  */
+ 
+ bool
+ ix86_expand_int_vec_cmp (rtx operands[])
+ {
+   rtx_code code = GET_CODE (operands[1]);
+   bool negate = false;
+   rtx cmp = ix86_expand_int_sse_cmp (operands[0], code, operands[2],
+ 				     operands[3], NULL, NULL, &negate);
+ 
+   if (!cmp)
+     return false;
+ 
+   if (negate)
+     cmp = ix86_expand_int_sse_cmp (operands[0], EQ, cmp,
+ 				   CONST0_RTX (GET_MODE (cmp)),
+ 				   NULL, NULL, &negate);
+ 
+   gcc_assert (!negate);
+ 
+   if (operands[0] != cmp)
+     emit_move_insn (operands[0], cmp);
+ 
+   return true;
+ }
+ 
+ /* Expand a floating-point vector conditional move; a vcond operation
+    rather than a movcc operation.  */
+ 
+ bool
+ ix86_expand_fp_vcond (rtx operands[])
+ {
+   enum rtx_code code = GET_CODE (operands[3]);
+   rtx cmp;
+ 
+   code = ix86_prepare_sse_fp_compare_args (operands[0], code,
+ 					   &operands[4], &operands[5]);
+   if (code == UNKNOWN)
+     {
+       rtx temp;
+       switch (GET_CODE (operands[3]))
+ 	{
+ 	case LTGT:
+ 	  temp = ix86_expand_sse_cmp (operands[0], ORDERED, operands[4],
+ 				      operands[5], operands[0], operands[0]);
+ 	  cmp = ix86_expand_sse_cmp (operands[0], NE, operands[4],
+ 				     operands[5], operands[1], operands[2]);
+ 	  code = AND;
+ 	  break;
+ 	case UNEQ:
+ 	  temp = ix86_expand_sse_cmp (operands[0], UNORDERED, operands[4],
+ 				      operands[5], operands[0], operands[0]);
+ 	  cmp = ix86_expand_sse_cmp (operands[0], EQ, operands[4],
+ 				     operands[5], operands[1], operands[2]);
+ 	  code = IOR;
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+       cmp = expand_simple_binop (GET_MODE (cmp), code, temp, cmp, cmp, 1,
+ 				 OPTAB_DIRECT);
+       ix86_expand_sse_movcc (operands[0], cmp, operands[1], operands[2]);
+       return true;
+     }
+ 
+   if (ix86_expand_sse_fp_minmax (operands[0], code, operands[4],
+ 				 operands[5], operands[1], operands[2]))
+     return true;
+ 
+   cmp = ix86_expand_sse_cmp (operands[0], code, operands[4], operands[5],
+ 			     operands[1], operands[2]);
+   ix86_expand_sse_movcc (operands[0], cmp, operands[1], operands[2]);
+   return true;
+ }
+ 
+ /* Expand a signed/unsigned integral vector conditional move.  */
+ 
+ bool
+ ix86_expand_int_vcond (rtx operands[])
+ {
+   machine_mode data_mode = GET_MODE (operands[0]);
+   machine_mode mode = GET_MODE (operands[4]);
+   enum rtx_code code = GET_CODE (operands[3]);
+   bool negate = false;
+   rtx x, cop0, cop1;
+ 
+   cop0 = operands[4];
+   cop1 = operands[5];
+ 
+   /* Try to optimize x < 0 ? -1 : 0 into (signed) x >> 31
+      and x < 0 ? 1 : 0 into (unsigned) x >> 31.  */
+   if ((code == LT || code == GE)
+       && data_mode == mode
+       && cop1 == CONST0_RTX (mode)
+       && operands[1 + (code == LT)] == CONST0_RTX (data_mode)
+       && GET_MODE_UNIT_SIZE (data_mode) > 1
+       && GET_MODE_UNIT_SIZE (data_mode) <= 8
+       && (GET_MODE_SIZE (data_mode) == 16
+ 	  || (TARGET_AVX2 && GET_MODE_SIZE (data_mode) == 32)))
+     {
+       rtx negop = operands[2 - (code == LT)];
+       int shift = GET_MODE_UNIT_BITSIZE (data_mode) - 1;
+       if (negop == CONST1_RTX (data_mode))
+ 	{
+ 	  rtx res = expand_simple_binop (mode, LSHIFTRT, cop0, GEN_INT (shift),
+ 					 operands[0], 1, OPTAB_DIRECT);
+ 	  if (res != operands[0])
+ 	    emit_move_insn (operands[0], res);
+ 	  return true;
+ 	}
+       else if (GET_MODE_INNER (data_mode) != DImode
+ 	       && vector_all_ones_operand (negop, data_mode))
+ 	{
+ 	  rtx res = expand_simple_binop (mode, ASHIFTRT, cop0, GEN_INT (shift),
+ 					 operands[0], 0, OPTAB_DIRECT);
+ 	  if (res != operands[0])
+ 	    emit_move_insn (operands[0], res);
+ 	  return true;
+ 	}
+     }
+ 
+   if (!nonimmediate_operand (cop1, mode))
+     cop1 = force_reg (mode, cop1);
+   if (!general_operand (operands[1], data_mode))
+     operands[1] = force_reg (data_mode, operands[1]);
+   if (!general_operand (operands[2], data_mode))
+     operands[2] = force_reg (data_mode, operands[2]);
+ 
+   x = ix86_expand_int_sse_cmp (operands[0], code, cop0, cop1,
+ 			       operands[1], operands[2], &negate);
+ 
+   if (!x)
+     return false;
+ 
+   ix86_expand_sse_movcc (operands[0], x, operands[1+negate],
+ 			 operands[2-negate]);
+   return true;
+ }
+ 
+ static bool
+ ix86_expand_vec_perm_vpermt2 (rtx target, rtx mask, rtx op0, rtx op1,
+ 			      struct expand_vec_perm_d *d)
+ {
+   /* ix86_expand_vec_perm_vpermt2 is called from both const and non-const
+      expander, so args are either in d, or in op0, op1 etc.  */
+   machine_mode mode = GET_MODE (d ? d->op0 : op0);
+   machine_mode maskmode = mode;
+   rtx (*gen) (rtx, rtx, rtx, rtx) = NULL;
+ 
+   switch (mode)
+     {
+     case E_V8HImode:
+       if (TARGET_AVX512VL && TARGET_AVX512BW)
+ 	gen = gen_avx512vl_vpermt2varv8hi3;
+       break;
+     case E_V16HImode:
+       if (TARGET_AVX512VL && TARGET_AVX512BW)
+ 	gen = gen_avx512vl_vpermt2varv16hi3;
+       break;
+     case E_V64QImode:
+       if (TARGET_AVX512VBMI)
+ 	gen = gen_avx512bw_vpermt2varv64qi3;
+       break;
+     case E_V32HImode:
+       if (TARGET_AVX512BW)
+ 	gen = gen_avx512bw_vpermt2varv32hi3;
+       break;
+     case E_V4SImode:
+       if (TARGET_AVX512VL)
+ 	gen = gen_avx512vl_vpermt2varv4si3;
+       break;
+     case E_V8SImode:
+       if (TARGET_AVX512VL)
+ 	gen = gen_avx512vl_vpermt2varv8si3;
+       break;
+     case E_V16SImode:
+       if (TARGET_AVX512F)
+ 	gen = gen_avx512f_vpermt2varv16si3;
+       break;
+     case E_V4SFmode:
+       if (TARGET_AVX512VL)
+ 	{
+ 	  gen = gen_avx512vl_vpermt2varv4sf3;
+ 	  maskmode = V4SImode;
+ 	}
+       break;
+     case E_V8SFmode:
+       if (TARGET_AVX512VL)
+ 	{
+ 	  gen = gen_avx512vl_vpermt2varv8sf3;
+ 	  maskmode = V8SImode;
+ 	}
+       break;
+     case E_V16SFmode:
+       if (TARGET_AVX512F)
+ 	{
+ 	  gen = gen_avx512f_vpermt2varv16sf3;
+ 	  maskmode = V16SImode;
+ 	}
+       break;
+     case E_V2DImode:
+       if (TARGET_AVX512VL)
+ 	gen = gen_avx512vl_vpermt2varv2di3;
+       break;
+     case E_V4DImode:
+       if (TARGET_AVX512VL)
+ 	gen = gen_avx512vl_vpermt2varv4di3;
+       break;
+     case E_V8DImode:
+       if (TARGET_AVX512F)
+ 	gen = gen_avx512f_vpermt2varv8di3;
+       break;
+     case E_V2DFmode:
+       if (TARGET_AVX512VL)
+ 	{
+ 	  gen = gen_avx512vl_vpermt2varv2df3;
+ 	  maskmode = V2DImode;
+ 	}
+       break;
+     case E_V4DFmode:
+       if (TARGET_AVX512VL)
+ 	{
+ 	  gen = gen_avx512vl_vpermt2varv4df3;
+ 	  maskmode = V4DImode;
+ 	}
+       break;
+     case E_V8DFmode:
+       if (TARGET_AVX512F)
+ 	{
+ 	  gen = gen_avx512f_vpermt2varv8df3;
+ 	  maskmode = V8DImode;
+ 	}
+       break;
+     default:
+       break;
+     }
+ 
+   if (gen == NULL)
+     return false;
+ 
+   /* ix86_expand_vec_perm_vpermt2 is called from both const and non-const
+      expander, so args are either in d, or in op0, op1 etc.  */
+   if (d)
+     {
+       rtx vec[64];
+       target = d->target;
+       op0 = d->op0;
+       op1 = d->op1;
+       for (int i = 0; i < d->nelt; ++i)
+ 	vec[i] = GEN_INT (d->perm[i]);
+       mask = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (d->nelt, vec));
+     }
+ 
+   emit_insn (gen (target, force_reg (maskmode, mask), op0, op1));
+   return true;
+ }
+ 
+ /* Expand a variable vector permutation.  */
+ 
+ void
+ ix86_expand_vec_perm (rtx operands[])
+ {
+   rtx target = operands[0];
+   rtx op0 = operands[1];
+   rtx op1 = operands[2];
+   rtx mask = operands[3];
+   rtx t1, t2, t3, t4, t5, t6, t7, t8, vt, vt2, vec[32];
+   machine_mode mode = GET_MODE (op0);
+   machine_mode maskmode = GET_MODE (mask);
+   int w, e, i;
+   bool one_operand_shuffle = rtx_equal_p (op0, op1);
+ 
+   /* Number of elements in the vector.  */
+   w = GET_MODE_NUNITS (mode);
+   e = GET_MODE_UNIT_SIZE (mode);
+   gcc_assert (w <= 64);
+ 
+   if (TARGET_AVX512F && one_operand_shuffle)
+     {
+       rtx (*gen) (rtx, rtx, rtx) = NULL;
+       switch (mode)
+ 	{
+ 	case E_V16SImode:
+ 	  gen =gen_avx512f_permvarv16si;
+ 	  break;
+ 	case E_V16SFmode:
+ 	  gen = gen_avx512f_permvarv16sf;
+ 	  break;
+ 	case E_V8DImode:
+ 	  gen = gen_avx512f_permvarv8di;
+ 	  break;
+ 	case E_V8DFmode:
+ 	  gen = gen_avx512f_permvarv8df;
+ 	  break;
+ 	default:
+ 	  break;
+ 	}
+       if (gen != NULL)
+ 	{
+ 	  emit_insn (gen (target, op0, mask));
+ 	  return;
+ 	}
+     }
+ 
+   if (ix86_expand_vec_perm_vpermt2 (target, mask, op0, op1, NULL))
+     return;
+ 
+   if (TARGET_AVX2)
+     {
+       if (mode == V4DImode || mode == V4DFmode || mode == V16HImode)
+ 	{
+ 	  /* Unfortunately, the VPERMQ and VPERMPD instructions only support
+ 	     an constant shuffle operand.  With a tiny bit of effort we can
+ 	     use VPERMD instead.  A re-interpretation stall for V4DFmode is
+ 	     unfortunate but there's no avoiding it.
+ 	     Similarly for V16HImode we don't have instructions for variable
+ 	     shuffling, while for V32QImode we can use after preparing suitable
+ 	     masks vpshufb; vpshufb; vpermq; vpor.  */
+ 
+ 	  if (mode == V16HImode)
+ 	    {
+ 	      maskmode = mode = V32QImode;
+ 	      w = 32;
+ 	      e = 1;
+ 	    }
+ 	  else
+ 	    {
+ 	      maskmode = mode = V8SImode;
+ 	      w = 8;
+ 	      e = 4;
+ 	    }
+ 	  t1 = gen_reg_rtx (maskmode);
+ 
+ 	  /* Replicate the low bits of the V4DImode mask into V8SImode:
+ 	       mask = { A B C D }
+ 	       t1 = { A A B B C C D D }.  */
+ 	  for (i = 0; i < w / 2; ++i)
+ 	    vec[i*2 + 1] = vec[i*2] = GEN_INT (i * 2);
+ 	  vt = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (w, vec));
+ 	  vt = force_reg (maskmode, vt);
+ 	  mask = gen_lowpart (maskmode, mask);
+ 	  if (maskmode == V8SImode)
+ 	    emit_insn (gen_avx2_permvarv8si (t1, mask, vt));
+ 	  else
+ 	    emit_insn (gen_avx2_pshufbv32qi3 (t1, mask, vt));
+ 
+ 	  /* Multiply the shuffle indicies by two.  */
+ 	  t1 = expand_simple_binop (maskmode, PLUS, t1, t1, t1, 1,
+ 				    OPTAB_DIRECT);
+ 
+ 	  /* Add one to the odd shuffle indicies:
+ 		t1 = { A*2, A*2+1, B*2, B*2+1, ... }.  */
+ 	  for (i = 0; i < w / 2; ++i)
+ 	    {
+ 	      vec[i * 2] = const0_rtx;
+ 	      vec[i * 2 + 1] = const1_rtx;
+ 	    }
+ 	  vt = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (w, vec));
+ 	  vt = validize_mem (force_const_mem (maskmode, vt));
+ 	  t1 = expand_simple_binop (maskmode, PLUS, t1, vt, t1, 1,
+ 				    OPTAB_DIRECT);
+ 
+ 	  /* Continue as if V8SImode (resp. V32QImode) was used initially.  */
+ 	  operands[3] = mask = t1;
+ 	  target = gen_reg_rtx (mode);
+ 	  op0 = gen_lowpart (mode, op0);
+ 	  op1 = gen_lowpart (mode, op1);
+ 	}
+ 
+       switch (mode)
+ 	{
+ 	case E_V8SImode:
+ 	  /* The VPERMD and VPERMPS instructions already properly ignore
+ 	     the high bits of the shuffle elements.  No need for us to
+ 	     perform an AND ourselves.  */
+ 	  if (one_operand_shuffle)
+ 	    {
+ 	      emit_insn (gen_avx2_permvarv8si (target, op0, mask));
+ 	      if (target != operands[0])
+ 		emit_move_insn (operands[0],
+ 				gen_lowpart (GET_MODE (operands[0]), target));
+ 	    }
+ 	  else
+ 	    {
+ 	      t1 = gen_reg_rtx (V8SImode);
+ 	      t2 = gen_reg_rtx (V8SImode);
+ 	      emit_insn (gen_avx2_permvarv8si (t1, op0, mask));
+ 	      emit_insn (gen_avx2_permvarv8si (t2, op1, mask));
+ 	      goto merge_two;
+ 	    }
+ 	  return;
+ 
+ 	case E_V8SFmode:
+ 	  mask = gen_lowpart (V8SImode, mask);
+ 	  if (one_operand_shuffle)
+ 	    emit_insn (gen_avx2_permvarv8sf (target, op0, mask));
+ 	  else
+ 	    {
+ 	      t1 = gen_reg_rtx (V8SFmode);
+ 	      t2 = gen_reg_rtx (V8SFmode);
+ 	      emit_insn (gen_avx2_permvarv8sf (t1, op0, mask));
+ 	      emit_insn (gen_avx2_permvarv8sf (t2, op1, mask));
+ 	      goto merge_two;
+ 	    }
+ 	  return;
+ 
+         case E_V4SImode:
+ 	  /* By combining the two 128-bit input vectors into one 256-bit
+ 	     input vector, we can use VPERMD and VPERMPS for the full
+ 	     two-operand shuffle.  */
+ 	  t1 = gen_reg_rtx (V8SImode);
+ 	  t2 = gen_reg_rtx (V8SImode);
+ 	  emit_insn (gen_avx_vec_concatv8si (t1, op0, op1));
+ 	  emit_insn (gen_avx_vec_concatv8si (t2, mask, mask));
+ 	  emit_insn (gen_avx2_permvarv8si (t1, t1, t2));
+ 	  emit_insn (gen_avx_vextractf128v8si (target, t1, const0_rtx));
+ 	  return;
+ 
+         case E_V4SFmode:
+ 	  t1 = gen_reg_rtx (V8SFmode);
+ 	  t2 = gen_reg_rtx (V8SImode);
+ 	  mask = gen_lowpart (V4SImode, mask);
+ 	  emit_insn (gen_avx_vec_concatv8sf (t1, op0, op1));
+ 	  emit_insn (gen_avx_vec_concatv8si (t2, mask, mask));
+ 	  emit_insn (gen_avx2_permvarv8sf (t1, t1, t2));
+ 	  emit_insn (gen_avx_vextractf128v8sf (target, t1, const0_rtx));
+ 	  return;
+ 
+ 	case E_V32QImode:
+ 	  t1 = gen_reg_rtx (V32QImode);
+ 	  t2 = gen_reg_rtx (V32QImode);
+ 	  t3 = gen_reg_rtx (V32QImode);
+ 	  vt2 = GEN_INT (-128);
+ 	  vt = gen_const_vec_duplicate (V32QImode, vt2);
+ 	  vt = force_reg (V32QImode, vt);
+ 	  for (i = 0; i < 32; i++)
+ 	    vec[i] = i < 16 ? vt2 : const0_rtx;
+ 	  vt2 = gen_rtx_CONST_VECTOR (V32QImode, gen_rtvec_v (32, vec));
+ 	  vt2 = force_reg (V32QImode, vt2);
+ 	  /* From mask create two adjusted masks, which contain the same
+ 	     bits as mask in the low 7 bits of each vector element.
+ 	     The first mask will have the most significant bit clear
+ 	     if it requests element from the same 128-bit lane
+ 	     and MSB set if it requests element from the other 128-bit lane.
+ 	     The second mask will have the opposite values of the MSB,
+ 	     and additionally will have its 128-bit lanes swapped.
+ 	     E.g. { 07 12 1e 09 ... | 17 19 05 1f ... } mask vector will have
+ 	     t1   { 07 92 9e 09 ... | 17 19 85 1f ... } and
+ 	     t3   { 97 99 05 9f ... | 87 12 1e 89 ... } where each ...
+ 	     stands for other 12 bytes.  */
+ 	  /* The bit whether element is from the same lane or the other
+ 	     lane is bit 4, so shift it up by 3 to the MSB position.  */
+ 	  t5 = gen_reg_rtx (V4DImode);
+ 	  emit_insn (gen_ashlv4di3 (t5, gen_lowpart (V4DImode, mask),
+ 				    GEN_INT (3)));
+ 	  /* Clear MSB bits from the mask just in case it had them set.  */
+ 	  emit_insn (gen_avx2_andnotv32qi3 (t2, vt, mask));
+ 	  /* After this t1 will have MSB set for elements from other lane.  */
+ 	  emit_insn (gen_xorv32qi3 (t1, gen_lowpart (V32QImode, t5), vt2));
+ 	  /* Clear bits other than MSB.  */
+ 	  emit_insn (gen_andv32qi3 (t1, t1, vt));
+ 	  /* Or in the lower bits from mask into t3.  */
+ 	  emit_insn (gen_iorv32qi3 (t3, t1, t2));
+ 	  /* And invert MSB bits in t1, so MSB is set for elements from the same
+ 	     lane.  */
+ 	  emit_insn (gen_xorv32qi3 (t1, t1, vt));
+ 	  /* Swap 128-bit lanes in t3.  */
+ 	  t6 = gen_reg_rtx (V4DImode);
+ 	  emit_insn (gen_avx2_permv4di_1 (t6, gen_lowpart (V4DImode, t3),
+ 					  const2_rtx, GEN_INT (3),
+ 					  const0_rtx, const1_rtx));
+ 	  /* And or in the lower bits from mask into t1.  */
+ 	  emit_insn (gen_iorv32qi3 (t1, t1, t2));
+ 	  if (one_operand_shuffle)
+ 	    {
+ 	      /* Each of these shuffles will put 0s in places where
+ 		 element from the other 128-bit lane is needed, otherwise
+ 		 will shuffle in the requested value.  */
+ 	      emit_insn (gen_avx2_pshufbv32qi3 (t3, op0,
+ 						gen_lowpart (V32QImode, t6)));
+ 	      emit_insn (gen_avx2_pshufbv32qi3 (t1, op0, t1));
+ 	      /* For t3 the 128-bit lanes are swapped again.  */
+ 	      t7 = gen_reg_rtx (V4DImode);
+ 	      emit_insn (gen_avx2_permv4di_1 (t7, gen_lowpart (V4DImode, t3),
+ 					      const2_rtx, GEN_INT (3),
+ 					      const0_rtx, const1_rtx));
+ 	      /* And oring both together leads to the result.  */
+ 	      emit_insn (gen_iorv32qi3 (target, t1,
+ 					gen_lowpart (V32QImode, t7)));
+ 	      if (target != operands[0])
+ 		emit_move_insn (operands[0],
+ 				gen_lowpart (GET_MODE (operands[0]), target));
+ 	      return;
+ 	    }
+ 
+ 	  t4 = gen_reg_rtx (V32QImode);
+ 	  /* Similarly to the above one_operand_shuffle code,
+ 	     just for repeated twice for each operand.  merge_two:
+ 	     code will merge the two results together.  */
+ 	  emit_insn (gen_avx2_pshufbv32qi3 (t4, op0,
+ 					    gen_lowpart (V32QImode, t6)));
+ 	  emit_insn (gen_avx2_pshufbv32qi3 (t3, op1,
+ 					    gen_lowpart (V32QImode, t6)));
+ 	  emit_insn (gen_avx2_pshufbv32qi3 (t2, op0, t1));
+ 	  emit_insn (gen_avx2_pshufbv32qi3 (t1, op1, t1));
+ 	  t7 = gen_reg_rtx (V4DImode);
+ 	  emit_insn (gen_avx2_permv4di_1 (t7, gen_lowpart (V4DImode, t4),
+ 					  const2_rtx, GEN_INT (3),
+ 					  const0_rtx, const1_rtx));
+ 	  t8 = gen_reg_rtx (V4DImode);
+ 	  emit_insn (gen_avx2_permv4di_1 (t8, gen_lowpart (V4DImode, t3),
+ 					  const2_rtx, GEN_INT (3),
+ 					  const0_rtx, const1_rtx));
+ 	  emit_insn (gen_iorv32qi3 (t4, t2, gen_lowpart (V32QImode, t7)));
+ 	  emit_insn (gen_iorv32qi3 (t3, t1, gen_lowpart (V32QImode, t8)));
+ 	  t1 = t4;
+ 	  t2 = t3;
+ 	  goto merge_two;
+ 
+ 	default:
+ 	  gcc_assert (GET_MODE_SIZE (mode) <= 16);
+ 	  break;
+ 	}
+     }
+ 
+   if (TARGET_XOP)
+     {
+       /* The XOP VPPERM insn supports three inputs.  By ignoring the 
+ 	 one_operand_shuffle special case, we avoid creating another
+ 	 set of constant vectors in memory.  */
+       one_operand_shuffle = false;
+ 
+       /* mask = mask & {2*w-1, ...} */
+       vt = GEN_INT (2*w - 1);
+     }
+   else
+     {
+       /* mask = mask & {w-1, ...} */
+       vt = GEN_INT (w - 1);
+     }
+ 
+   vt = gen_const_vec_duplicate (maskmode, vt);
+   mask = expand_simple_binop (maskmode, AND, mask, vt,
+ 			      NULL_RTX, 0, OPTAB_DIRECT);
+ 
+   /* For non-QImode operations, convert the word permutation control
+      into a byte permutation control.  */
+   if (mode != V16QImode)
+     {
+       mask = expand_simple_binop (maskmode, ASHIFT, mask,
+ 				  GEN_INT (exact_log2 (e)),
+ 				  NULL_RTX, 0, OPTAB_DIRECT);
+ 
+       /* Convert mask to vector of chars.  */
+       mask = force_reg (V16QImode, gen_lowpart (V16QImode, mask));
+ 
+       /* Replicate each of the input bytes into byte positions:
+ 	 (v2di) --> {0,0,0,0,0,0,0,0, 8,8,8,8,8,8,8,8}
+ 	 (v4si) --> {0,0,0,0, 4,4,4,4, 8,8,8,8, 12,12,12,12}
+ 	 (v8hi) --> {0,0, 2,2, 4,4, 6,6, ...}.  */
+       for (i = 0; i < 16; ++i)
+ 	vec[i] = GEN_INT (i/e * e);
+       vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec));
+       vt = validize_mem (force_const_mem (V16QImode, vt));
+       if (TARGET_XOP)
+ 	emit_insn (gen_xop_pperm (mask, mask, mask, vt));
+       else
+ 	emit_insn (gen_ssse3_pshufbv16qi3 (mask, mask, vt));
+ 
+       /* Convert it into the byte positions by doing
+ 	 mask = mask + {0,1,..,16/w, 0,1,..,16/w, ...}  */
+       for (i = 0; i < 16; ++i)
+ 	vec[i] = GEN_INT (i % e);
+       vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec));
+       vt = validize_mem (force_const_mem (V16QImode, vt));
+       emit_insn (gen_addv16qi3 (mask, mask, vt));
+     }
+ 
+   /* The actual shuffle operations all operate on V16QImode.  */
+   op0 = gen_lowpart (V16QImode, op0);
+   op1 = gen_lowpart (V16QImode, op1);
+ 
+   if (TARGET_XOP)
+     {
+       if (GET_MODE (target) != V16QImode)
+ 	target = gen_reg_rtx (V16QImode);
+       emit_insn (gen_xop_pperm (target, op0, op1, mask));
+       if (target != operands[0])
+ 	emit_move_insn (operands[0],
+ 			gen_lowpart (GET_MODE (operands[0]), target));
+     }
+   else if (one_operand_shuffle)
+     {
+       if (GET_MODE (target) != V16QImode)
+ 	target = gen_reg_rtx (V16QImode);
+       emit_insn (gen_ssse3_pshufbv16qi3 (target, op0, mask));
+       if (target != operands[0])
+ 	emit_move_insn (operands[0],
+ 			gen_lowpart (GET_MODE (operands[0]), target));
+     }
+   else
+     {
+       rtx xops[6];
+       bool ok;
+ 
+       /* Shuffle the two input vectors independently.  */
+       t1 = gen_reg_rtx (V16QImode);
+       t2 = gen_reg_rtx (V16QImode);
+       emit_insn (gen_ssse3_pshufbv16qi3 (t1, op0, mask));
+       emit_insn (gen_ssse3_pshufbv16qi3 (t2, op1, mask));
+ 
+  merge_two:
+       /* Then merge them together.  The key is whether any given control
+          element contained a bit set that indicates the second word.  */
+       mask = operands[3];
+       vt = GEN_INT (w);
+       if (maskmode == V2DImode && !TARGET_SSE4_1)
+ 	{
+ 	  /* Without SSE4.1, we don't have V2DImode EQ.  Perform one
+ 	     more shuffle to convert the V2DI input mask into a V4SI
+ 	     input mask.  At which point the masking that expand_int_vcond
+ 	     will work as desired.  */
+ 	  rtx t3 = gen_reg_rtx (V4SImode);
+ 	  emit_insn (gen_sse2_pshufd_1 (t3, gen_lowpart (V4SImode, mask),
+ 				        const0_rtx, const0_rtx,
+ 				        const2_rtx, const2_rtx));
+ 	  mask = t3;
+ 	  maskmode = V4SImode;
+ 	  e = w = 4;
+ 	}
+ 
+       vt = gen_const_vec_duplicate (maskmode, vt);
+       vt = force_reg (maskmode, vt);
+       mask = expand_simple_binop (maskmode, AND, mask, vt,
+ 				  NULL_RTX, 0, OPTAB_DIRECT);
+ 
+       if (GET_MODE (target) != mode)
+ 	target = gen_reg_rtx (mode);
+       xops[0] = target;
+       xops[1] = gen_lowpart (mode, t2);
+       xops[2] = gen_lowpart (mode, t1);
+       xops[3] = gen_rtx_EQ (maskmode, mask, vt);
+       xops[4] = mask;
+       xops[5] = vt;
+       ok = ix86_expand_int_vcond (xops);
+       gcc_assert (ok);
+       if (target != operands[0])
+ 	emit_move_insn (operands[0],
+ 			gen_lowpart (GET_MODE (operands[0]), target));
+     }
+ }
+ 
+ /* Unpack OP[1] into the next wider integer vector type.  UNSIGNED_P is
+    true if we should do zero extension, else sign extension.  HIGH_P is
+    true if we want the N/2 high elements, else the low elements.  */
+ 
+ void
+ ix86_expand_sse_unpack (rtx dest, rtx src, bool unsigned_p, bool high_p)
+ {
+   machine_mode imode = GET_MODE (src);
+   rtx tmp;
+ 
+   if (TARGET_SSE4_1)
+     {
+       rtx (*unpack)(rtx, rtx);
+       rtx (*extract)(rtx, rtx) = NULL;
+       machine_mode halfmode = BLKmode;
+ 
+       switch (imode)
+ 	{
+ 	case E_V64QImode:
+ 	  if (unsigned_p)
+ 	    unpack = gen_avx512bw_zero_extendv32qiv32hi2;
+ 	  else
+ 	    unpack = gen_avx512bw_sign_extendv32qiv32hi2;
+ 	  halfmode = V32QImode;
+ 	  extract
+ 	    = high_p ? gen_vec_extract_hi_v64qi : gen_vec_extract_lo_v64qi;
+ 	  break;
+ 	case E_V32QImode:
+ 	  if (unsigned_p)
+ 	    unpack = gen_avx2_zero_extendv16qiv16hi2;
+ 	  else
+ 	    unpack = gen_avx2_sign_extendv16qiv16hi2;
+ 	  halfmode = V16QImode;
+ 	  extract
+ 	    = high_p ? gen_vec_extract_hi_v32qi : gen_vec_extract_lo_v32qi;
+ 	  break;
+ 	case E_V32HImode:
+ 	  if (unsigned_p)
+ 	    unpack = gen_avx512f_zero_extendv16hiv16si2;
+ 	  else
+ 	    unpack = gen_avx512f_sign_extendv16hiv16si2;
+ 	  halfmode = V16HImode;
+ 	  extract
+ 	    = high_p ? gen_vec_extract_hi_v32hi : gen_vec_extract_lo_v32hi;
+ 	  break;
+ 	case E_V16HImode:
+ 	  if (unsigned_p)
+ 	    unpack = gen_avx2_zero_extendv8hiv8si2;
+ 	  else
+ 	    unpack = gen_avx2_sign_extendv8hiv8si2;
+ 	  halfmode = V8HImode;
+ 	  extract
+ 	    = high_p ? gen_vec_extract_hi_v16hi : gen_vec_extract_lo_v16hi;
+ 	  break;
+ 	case E_V16SImode:
+ 	  if (unsigned_p)
+ 	    unpack = gen_avx512f_zero_extendv8siv8di2;
+ 	  else
+ 	    unpack = gen_avx512f_sign_extendv8siv8di2;
+ 	  halfmode = V8SImode;
+ 	  extract
+ 	    = high_p ? gen_vec_extract_hi_v16si : gen_vec_extract_lo_v16si;
+ 	  break;
+ 	case E_V8SImode:
+ 	  if (unsigned_p)
+ 	    unpack = gen_avx2_zero_extendv4siv4di2;
+ 	  else
+ 	    unpack = gen_avx2_sign_extendv4siv4di2;
+ 	  halfmode = V4SImode;
+ 	  extract
+ 	    = high_p ? gen_vec_extract_hi_v8si : gen_vec_extract_lo_v8si;
+ 	  break;
+ 	case E_V16QImode:
+ 	  if (unsigned_p)
+ 	    unpack = gen_sse4_1_zero_extendv8qiv8hi2;
+ 	  else
+ 	    unpack = gen_sse4_1_sign_extendv8qiv8hi2;
+ 	  break;
+ 	case E_V8HImode:
+ 	  if (unsigned_p)
+ 	    unpack = gen_sse4_1_zero_extendv4hiv4si2;
+ 	  else
+ 	    unpack = gen_sse4_1_sign_extendv4hiv4si2;
+ 	  break;
+ 	case E_V4SImode:
+ 	  if (unsigned_p)
+ 	    unpack = gen_sse4_1_zero_extendv2siv2di2;
+ 	  else
+ 	    unpack = gen_sse4_1_sign_extendv2siv2di2;
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+ 
+       if (GET_MODE_SIZE (imode) >= 32)
+ 	{
+ 	  tmp = gen_reg_rtx (halfmode);
+ 	  emit_insn (extract (tmp, src));
+ 	}
+       else if (high_p)
+ 	{
+ 	  /* Shift higher 8 bytes to lower 8 bytes.  */
+ 	  tmp = gen_reg_rtx (V1TImode);
+ 	  emit_insn (gen_sse2_lshrv1ti3 (tmp, gen_lowpart (V1TImode, src),
+ 					 GEN_INT (64)));
+ 	  tmp = gen_lowpart (imode, tmp);
+ 	}
+       else
+ 	tmp = src;
+ 
+       emit_insn (unpack (dest, tmp));
+     }
+   else
+     {
+       rtx (*unpack)(rtx, rtx, rtx);
+ 
+       switch (imode)
+ 	{
+ 	case E_V16QImode:
+ 	  if (high_p)
+ 	    unpack = gen_vec_interleave_highv16qi;
+ 	  else
+ 	    unpack = gen_vec_interleave_lowv16qi;
+ 	  break;
+ 	case E_V8HImode:
+ 	  if (high_p)
+ 	    unpack = gen_vec_interleave_highv8hi;
+ 	  else
+ 	    unpack = gen_vec_interleave_lowv8hi;
+ 	  break;
+ 	case E_V4SImode:
+ 	  if (high_p)
+ 	    unpack = gen_vec_interleave_highv4si;
+ 	  else
+ 	    unpack = gen_vec_interleave_lowv4si;
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+ 
+       if (unsigned_p)
+ 	tmp = force_reg (imode, CONST0_RTX (imode));
+       else
+ 	tmp = ix86_expand_sse_cmp (gen_reg_rtx (imode), GT, CONST0_RTX (imode),
+ 				   src, pc_rtx, pc_rtx);
+ 
+       rtx tmp2 = gen_reg_rtx (imode);
+       emit_insn (unpack (tmp2, src, tmp));
+       emit_move_insn (dest, gen_lowpart (GET_MODE (dest), tmp2));
+     }
+ }
+ 
+ /* Split operands 0 and 1 into half-mode parts.  Similar to split_double_mode,
+    but works for floating pointer parameters and nonoffsetable memories.
+    For pushes, it returns just stack offsets; the values will be saved
+    in the right order.  Maximally three parts are generated.  */
+ 
+ static int
+ ix86_split_to_parts (rtx operand, rtx *parts, machine_mode mode)
+ {
+   int size;
+ 
+   if (!TARGET_64BIT)
+     size = mode==XFmode ? 3 : GET_MODE_SIZE (mode) / 4;
+   else
+     size = (GET_MODE_SIZE (mode) + 4) / 8;
+ 
+   gcc_assert (!REG_P (operand) || !MMX_REGNO_P (REGNO (operand)));
+   gcc_assert (size >= 2 && size <= 4);
+ 
+   /* Optimize constant pool reference to immediates.  This is used by fp
+      moves, that force all constants to memory to allow combining.  */
+   if (MEM_P (operand) && MEM_READONLY_P (operand))
+     operand = avoid_constant_pool_reference (operand);
+ 
+   if (MEM_P (operand) && !offsettable_memref_p (operand))
+     {
+       /* The only non-offsetable memories we handle are pushes.  */
+       int ok = push_operand (operand, VOIDmode);
+ 
+       gcc_assert (ok);
+ 
+       operand = copy_rtx (operand);
+       PUT_MODE (operand, word_mode);
+       parts[0] = parts[1] = parts[2] = parts[3] = operand;
+       return size;
+     }
+ 
+   if (GET_CODE (operand) == CONST_VECTOR)
+     {
+       scalar_int_mode imode = int_mode_for_mode (mode).require ();
+       /* Caution: if we looked through a constant pool memory above,
+ 	 the operand may actually have a different mode now.  That's
+ 	 ok, since we want to pun this all the way back to an integer.  */
+       operand = simplify_subreg (imode, operand, GET_MODE (operand), 0);
+       gcc_assert (operand != NULL);
+       mode = imode;
+     }
+ 
+   if (!TARGET_64BIT)
+     {
+       if (mode == DImode)
+ 	split_double_mode (mode, &operand, 1, &parts[0], &parts[1]);
+       else
+ 	{
+ 	  int i;
+ 
+ 	  if (REG_P (operand))
+ 	    {
+ 	      gcc_assert (reload_completed);
+ 	      for (i = 0; i < size; i++)
+ 		parts[i] = gen_rtx_REG (SImode, REGNO (operand) + i);
+ 	    }
+ 	  else if (offsettable_memref_p (operand))
+ 	    {
+ 	      operand = adjust_address (operand, SImode, 0);
+ 	      parts[0] = operand;
+ 	      for (i = 1; i < size; i++)
+ 		parts[i] = adjust_address (operand, SImode, 4 * i);
+ 	    }
+ 	  else if (CONST_DOUBLE_P (operand))
+ 	    {
+ 	      const REAL_VALUE_TYPE *r;
+ 	      long l[4];
+ 
+ 	      r = CONST_DOUBLE_REAL_VALUE (operand);
+ 	      switch (mode)
+ 		{
+ 		case E_TFmode:
+ 		  real_to_target (l, r, mode);
+ 		  parts[3] = gen_int_mode (l[3], SImode);
+ 		  parts[2] = gen_int_mode (l[2], SImode);
+ 		  break;
+ 		case E_XFmode:
+ 		  /* We can't use REAL_VALUE_TO_TARGET_LONG_DOUBLE since
+ 		     long double may not be 80-bit.  */
+ 		  real_to_target (l, r, mode);
+ 		  parts[2] = gen_int_mode (l[2], SImode);
+ 		  break;
+ 		case E_DFmode:
+ 		  REAL_VALUE_TO_TARGET_DOUBLE (*r, l);
+ 		  break;
+ 		default:
+ 		  gcc_unreachable ();
+ 		}
+ 	      parts[1] = gen_int_mode (l[1], SImode);
+ 	      parts[0] = gen_int_mode (l[0], SImode);
+ 	    }
+ 	  else
+ 	    gcc_unreachable ();
+ 	}
+     }
+   else
+     {
+       if (mode == TImode)
+ 	split_double_mode (mode, &operand, 1, &parts[0], &parts[1]);
+       if (mode == XFmode || mode == TFmode)
+ 	{
+ 	  machine_mode upper_mode = mode==XFmode ? SImode : DImode;
+ 	  if (REG_P (operand))
+ 	    {
+ 	      gcc_assert (reload_completed);
+ 	      parts[0] = gen_rtx_REG (DImode, REGNO (operand) + 0);
+ 	      parts[1] = gen_rtx_REG (upper_mode, REGNO (operand) + 1);
+ 	    }
+ 	  else if (offsettable_memref_p (operand))
+ 	    {
+ 	      operand = adjust_address (operand, DImode, 0);
+ 	      parts[0] = operand;
+ 	      parts[1] = adjust_address (operand, upper_mode, 8);
+ 	    }
+ 	  else if (CONST_DOUBLE_P (operand))
+ 	    {
+ 	      long l[4];
+ 
+ 	      real_to_target (l, CONST_DOUBLE_REAL_VALUE (operand), mode);
+ 
+ 	      /* real_to_target puts 32-bit pieces in each long.  */
+ 	      parts[0] = gen_int_mode ((l[0] & HOST_WIDE_INT_C (0xffffffff))
+ 				       | ((l[1] & HOST_WIDE_INT_C (0xffffffff))
+ 					  << 32), DImode);
+ 
+ 	      if (upper_mode == SImode)
+ 	        parts[1] = gen_int_mode (l[2], SImode);
+ 	      else
+ 	        parts[1]
+ 		  = gen_int_mode ((l[2] & HOST_WIDE_INT_C (0xffffffff))
+ 				  | ((l[3] & HOST_WIDE_INT_C (0xffffffff))
+ 				     << 32), DImode);
+ 	    }
+ 	  else
+ 	    gcc_unreachable ();
+ 	}
+     }
+ 
+   return size;
+ }
+ 
+ /* Emit insns to perform a move or push of DI, DF, XF, and TF values.
+    Return false when normal moves are needed; true when all required
+    insns have been emitted.  Operands 2-4 contain the input values
+    int the correct order; operands 5-7 contain the output values.  */
+ 
+ void
+ ix86_split_long_move (rtx operands[])
+ {
+   rtx part[2][4];
+   int nparts, i, j;
+   int push = 0;
+   int collisions = 0;
+   machine_mode mode = GET_MODE (operands[0]);
+   bool collisionparts[4];
+ 
+   /* The DFmode expanders may ask us to move double.
+      For 64bit target this is single move.  By hiding the fact
+      here we simplify i386.md splitters.  */
+   if (TARGET_64BIT && GET_MODE_SIZE (GET_MODE (operands[0])) == 8)
+     {
+       /* Optimize constant pool reference to immediates.  This is used by
+ 	 fp moves, that force all constants to memory to allow combining.  */
+ 
+       if (MEM_P (operands[1])
+ 	  && GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF
+ 	  && CONSTANT_POOL_ADDRESS_P (XEXP (operands[1], 0)))
+ 	operands[1] = get_pool_constant (XEXP (operands[1], 0));
+       if (push_operand (operands[0], VOIDmode))
+ 	{
+ 	  operands[0] = copy_rtx (operands[0]);
+ 	  PUT_MODE (operands[0], word_mode);
+ 	}
+       else
+         operands[0] = gen_lowpart (DImode, operands[0]);
+       operands[1] = gen_lowpart (DImode, operands[1]);
+       emit_move_insn (operands[0], operands[1]);
+       return;
+     }
+ 
+   /* The only non-offsettable memory we handle is push.  */
+   if (push_operand (operands[0], VOIDmode))
+     push = 1;
+   else
+     gcc_assert (!MEM_P (operands[0])
+ 		|| offsettable_memref_p (operands[0]));
+ 
+   nparts = ix86_split_to_parts (operands[1], part[1], GET_MODE (operands[0]));
+   ix86_split_to_parts (operands[0], part[0], GET_MODE (operands[0]));
+ 
+   /* When emitting push, take care for source operands on the stack.  */
+   if (push && MEM_P (operands[1])
+       && reg_overlap_mentioned_p (stack_pointer_rtx, operands[1]))
+     {
+       rtx src_base = XEXP (part[1][nparts - 1], 0);
+ 
+       /* Compensate for the stack decrement by 4.  */
+       if (!TARGET_64BIT && nparts == 3
+ 	  && mode == XFmode && TARGET_128BIT_LONG_DOUBLE)
+ 	src_base = plus_constant (Pmode, src_base, 4);
+ 
+       /* src_base refers to the stack pointer and is
+ 	 automatically decreased by emitted push.  */
+       for (i = 0; i < nparts; i++)
+ 	part[1][i] = change_address (part[1][i],
+ 				     GET_MODE (part[1][i]), src_base);
+     }
+ 
+   /* We need to do copy in the right order in case an address register
+      of the source overlaps the destination.  */
+   if (REG_P (part[0][0]) && MEM_P (part[1][0]))
+     {
+       rtx tmp;
+ 
+       for (i = 0; i < nparts; i++)
+ 	{
+ 	  collisionparts[i]
+ 	    = reg_overlap_mentioned_p (part[0][i], XEXP (part[1][0], 0));
+ 	  if (collisionparts[i])
+ 	    collisions++;
+ 	}
+ 
+       /* Collision in the middle part can be handled by reordering.  */
+       if (collisions == 1 && nparts == 3 && collisionparts [1])
+ 	{
+ 	  std::swap (part[0][1], part[0][2]);
+ 	  std::swap (part[1][1], part[1][2]);
+ 	}
+       else if (collisions == 1
+ 	       && nparts == 4
+ 	       && (collisionparts [1] || collisionparts [2]))
+ 	{
+ 	  if (collisionparts [1])
+ 	    {
+ 	      std::swap (part[0][1], part[0][2]);
+ 	      std::swap (part[1][1], part[1][2]);
+ 	    }
+ 	  else
+ 	    {
+ 	      std::swap (part[0][2], part[0][3]);
+ 	      std::swap (part[1][2], part[1][3]);
+ 	    }
+ 	}
+ 
+       /* If there are more collisions, we can't handle it by reordering.
+ 	 Do an lea to the last part and use only one colliding move.  */
+       else if (collisions > 1)
+ 	{
+ 	  rtx base, addr;
+ 
+ 	  collisions = 1;
+ 
+ 	  base = part[0][nparts - 1];
+ 
+ 	  /* Handle the case when the last part isn't valid for lea.
+ 	     Happens in 64-bit mode storing the 12-byte XFmode.  */
+ 	  if (GET_MODE (base) != Pmode)
+ 	    base = gen_rtx_REG (Pmode, REGNO (base));
+ 
+ 	  addr = XEXP (part[1][0], 0);
+ 	  if (TARGET_TLS_DIRECT_SEG_REFS)
+ 	    {
+ 	      struct ix86_address parts;
+ 	      int ok = ix86_decompose_address (addr, &parts);
+ 	      gcc_assert (ok);
+ 	      /* It is not valid to use %gs: or %fs: in lea.  */
+ 	      gcc_assert (parts.seg == ADDR_SPACE_GENERIC);
+ 	    }
+ 	  emit_insn (gen_rtx_SET (base, addr));
+ 	  part[1][0] = replace_equiv_address (part[1][0], base);
+ 	  for (i = 1; i < nparts; i++)
+ 	    {
+ 	      tmp = plus_constant (Pmode, base, UNITS_PER_WORD * i);
+ 	      part[1][i] = replace_equiv_address (part[1][i], tmp);
+ 	    }
+ 	}
+     }
+ 
+   if (push)
+     {
+       if (!TARGET_64BIT)
+ 	{
+ 	  if (nparts == 3)
+ 	    {
+ 	      if (TARGET_128BIT_LONG_DOUBLE && mode == XFmode)
+                 emit_insn (gen_add2_insn (stack_pointer_rtx, GEN_INT (-4)));
+ 	      emit_move_insn (part[0][2], part[1][2]);
+ 	    }
+ 	  else if (nparts == 4)
+ 	    {
+ 	      emit_move_insn (part[0][3], part[1][3]);
+ 	      emit_move_insn (part[0][2], part[1][2]);
+ 	    }
+ 	}
+       else
+ 	{
+ 	  /* In 64bit mode we don't have 32bit push available.  In case this is
+ 	     register, it is OK - we will just use larger counterpart.  We also
+ 	     retype memory - these comes from attempt to avoid REX prefix on
+ 	     moving of second half of TFmode value.  */
+ 	  if (GET_MODE (part[1][1]) == SImode)
+ 	    {
+ 	      switch (GET_CODE (part[1][1]))
+ 		{
+ 		case MEM:
+ 		  part[1][1] = adjust_address (part[1][1], DImode, 0);
+ 		  break;
+ 
+ 		case REG:
+ 		  part[1][1] = gen_rtx_REG (DImode, REGNO (part[1][1]));
+ 		  break;
+ 
+ 		default:
+ 		  gcc_unreachable ();
+ 		}
+ 
+ 	      if (GET_MODE (part[1][0]) == SImode)
+ 		part[1][0] = part[1][1];
+ 	    }
+ 	}
+       emit_move_insn (part[0][1], part[1][1]);
+       emit_move_insn (part[0][0], part[1][0]);
+       return;
+     }
+ 
+   /* Choose correct order to not overwrite the source before it is copied.  */
+   if ((REG_P (part[0][0])
+        && REG_P (part[1][1])
+        && (REGNO (part[0][0]) == REGNO (part[1][1])
+ 	   || (nparts == 3
+ 	       && REGNO (part[0][0]) == REGNO (part[1][2]))
+ 	   || (nparts == 4
+ 	       && REGNO (part[0][0]) == REGNO (part[1][3]))))
+       || (collisions > 0
+ 	  && reg_overlap_mentioned_p (part[0][0], XEXP (part[1][0], 0))))
+     {
+       for (i = 0, j = nparts - 1; i < nparts; i++, j--)
+ 	{
+ 	  operands[2 + i] = part[0][j];
+ 	  operands[6 + i] = part[1][j];
+ 	}
+     }
+   else
+     {
+       for (i = 0; i < nparts; i++)
+ 	{
+ 	  operands[2 + i] = part[0][i];
+ 	  operands[6 + i] = part[1][i];
+ 	}
+     }
+ 
+   /* If optimizing for size, attempt to locally unCSE nonzero constants.  */
+   if (optimize_insn_for_size_p ())
+     {
+       for (j = 0; j < nparts - 1; j++)
+ 	if (CONST_INT_P (operands[6 + j])
+ 	    && operands[6 + j] != const0_rtx
+ 	    && REG_P (operands[2 + j]))
+ 	  for (i = j; i < nparts - 1; i++)
+ 	    if (CONST_INT_P (operands[7 + i])
+ 		&& INTVAL (operands[7 + i]) == INTVAL (operands[6 + j]))
+ 	      operands[7 + i] = operands[2 + j];
+     }
+ 
+   for (i = 0; i < nparts; i++)
+     emit_move_insn (operands[2 + i], operands[6 + i]);
+ 
+   return;
+ }
+ 
+ /* Helper function of ix86_split_ashl used to generate an SImode/DImode
+    left shift by a constant, either using a single shift or
+    a sequence of add instructions.  */
+ 
+ static void
+ ix86_expand_ashl_const (rtx operand, int count, machine_mode mode)
+ {
+   if (count == 1
+       || (count * ix86_cost->add <= ix86_cost->shift_const
+ 	  && !optimize_insn_for_size_p ()))
+     {
+       while (count-- > 0)
+ 	emit_insn (gen_add2_insn (operand, operand));
+     }
+   else
+     {
+       rtx (*insn)(rtx, rtx, rtx);
+ 
+       insn = mode == DImode ? gen_ashlsi3 : gen_ashldi3;
+       emit_insn (insn (operand, operand, GEN_INT (count)));
+     }
+ }
+ 
+ void
+ ix86_split_ashl (rtx *operands, rtx scratch, machine_mode mode)
+ {
+   rtx (*gen_ashl3)(rtx, rtx, rtx);
+   rtx (*gen_shld)(rtx, rtx, rtx);
+   int half_width = GET_MODE_BITSIZE (mode) >> 1;
+   machine_mode half_mode;
+ 
+   rtx low[2], high[2];
+   int count;
+ 
+   if (CONST_INT_P (operands[2]))
+     {
+       split_double_mode (mode, operands, 2, low, high);
+       count = INTVAL (operands[2]) & (GET_MODE_BITSIZE (mode) - 1);
+ 
+       if (count >= half_width)
+ 	{
+ 	  emit_move_insn (high[0], low[1]);
+ 	  emit_move_insn (low[0], const0_rtx);
+ 
+ 	  if (count > half_width)
+ 	    ix86_expand_ashl_const (high[0], count - half_width, mode);
+ 	}
+       else
+ 	{
+ 	  gen_shld = mode == DImode ? gen_x86_shld : gen_x86_64_shld;
+ 
+ 	  if (!rtx_equal_p (operands[0], operands[1]))
+ 	    emit_move_insn (operands[0], operands[1]);
+ 
+ 	  emit_insn (gen_shld (high[0], low[0], GEN_INT (count)));
+ 	  ix86_expand_ashl_const (low[0], count, mode);
+ 	}
+       return;
+     }
+ 
+   split_double_mode (mode, operands, 1, low, high);
+   half_mode = mode == DImode ? SImode : DImode;
+ 
+   gen_ashl3 = mode == DImode ? gen_ashlsi3 : gen_ashldi3;
+ 
+   if (operands[1] == const1_rtx)
+     {
+       /* Assuming we've chosen a QImode capable registers, then 1 << N
+ 	 can be done with two 32/64-bit shifts, no branches, no cmoves.  */
+       if (ANY_QI_REG_P (low[0]) && ANY_QI_REG_P (high[0]))
+ 	{
+ 	  rtx s, d, flags = gen_rtx_REG (CCZmode, FLAGS_REG);
+ 
+ 	  ix86_expand_clear (low[0]);
+ 	  ix86_expand_clear (high[0]);
+ 	  emit_insn (gen_testqi_ccz_1 (operands[2], GEN_INT (half_width)));
+ 
+ 	  d = gen_lowpart (QImode, low[0]);
+ 	  d = gen_rtx_STRICT_LOW_PART (VOIDmode, d);
+ 	  s = gen_rtx_EQ (QImode, flags, const0_rtx);
+ 	  emit_insn (gen_rtx_SET (d, s));
+ 
+ 	  d = gen_lowpart (QImode, high[0]);
+ 	  d = gen_rtx_STRICT_LOW_PART (VOIDmode, d);
+ 	  s = gen_rtx_NE (QImode, flags, const0_rtx);
+ 	  emit_insn (gen_rtx_SET (d, s));
+ 	}
+ 
+       /* Otherwise, we can get the same results by manually performing
+ 	 a bit extract operation on bit 5/6, and then performing the two
+ 	 shifts.  The two methods of getting 0/1 into low/high are exactly
+ 	 the same size.  Avoiding the shift in the bit extract case helps
+ 	 pentium4 a bit; no one else seems to care much either way.  */
+       else
+ 	{
+ 	  rtx (*gen_lshr3)(rtx, rtx, rtx);
+ 	  rtx (*gen_and3)(rtx, rtx, rtx);
+ 	  rtx (*gen_xor3)(rtx, rtx, rtx);
+ 	  HOST_WIDE_INT bits;
+ 	  rtx x;
+ 
+ 	  if (mode == DImode)
+ 	    {
+ 	      gen_lshr3 = gen_lshrsi3;
+ 	      gen_and3 = gen_andsi3;
+ 	      gen_xor3 = gen_xorsi3;
+ 	      bits = 5;
+ 	    }
+ 	  else
+ 	    {
+ 	      gen_lshr3 = gen_lshrdi3;
+ 	      gen_and3 = gen_anddi3;
+ 	      gen_xor3 = gen_xordi3;
+ 	      bits = 6;
+ 	    }
+ 
+ 	  if (TARGET_PARTIAL_REG_STALL && !optimize_insn_for_size_p ())
+ 	    x = gen_rtx_ZERO_EXTEND (half_mode, operands[2]);
+ 	  else
+ 	    x = gen_lowpart (half_mode, operands[2]);
+ 	  emit_insn (gen_rtx_SET (high[0], x));
+ 
+ 	  emit_insn (gen_lshr3 (high[0], high[0], GEN_INT (bits)));
+ 	  emit_insn (gen_and3 (high[0], high[0], const1_rtx));
+ 	  emit_move_insn (low[0], high[0]);
+ 	  emit_insn (gen_xor3 (low[0], low[0], const1_rtx));
+ 	}
+ 
+       emit_insn (gen_ashl3 (low[0], low[0], operands[2]));
+       emit_insn (gen_ashl3 (high[0], high[0], operands[2]));
+       return;
+     }
+ 
+   if (operands[1] == constm1_rtx)
+     {
+       /* For -1 << N, we can avoid the shld instruction, because we
+ 	 know that we're shifting 0...31/63 ones into a -1.  */
+       emit_move_insn (low[0], constm1_rtx);
+       if (optimize_insn_for_size_p ())
+ 	emit_move_insn (high[0], low[0]);
+       else
+ 	emit_move_insn (high[0], constm1_rtx);
+     }
+   else
+     {
+       gen_shld = mode == DImode ? gen_x86_shld : gen_x86_64_shld;
+ 
+       if (!rtx_equal_p (operands[0], operands[1]))
+ 	emit_move_insn (operands[0], operands[1]);
+ 
+       split_double_mode (mode, operands, 1, low, high);
+       emit_insn (gen_shld (high[0], low[0], operands[2]));
+     }
+ 
+   emit_insn (gen_ashl3 (low[0], low[0], operands[2]));
+ 
+   if (TARGET_CMOVE && scratch)
+     {
+       ix86_expand_clear (scratch);
+       emit_insn (gen_x86_shift_adj_1
+ 		 (half_mode, high[0], low[0], operands[2], scratch));
+     }
+   else
+     emit_insn (gen_x86_shift_adj_2 (half_mode, high[0], low[0], operands[2]));
+ }
+ 
+ void
+ ix86_split_ashr (rtx *operands, rtx scratch, machine_mode mode)
+ {
+   rtx (*gen_ashr3)(rtx, rtx, rtx)
+     = mode == DImode ? gen_ashrsi3 : gen_ashrdi3;
+   rtx (*gen_shrd)(rtx, rtx, rtx);
+   int half_width = GET_MODE_BITSIZE (mode) >> 1;
+ 
+   rtx low[2], high[2];
+   int count;
+ 
+   if (CONST_INT_P (operands[2]))
+     {
+       split_double_mode (mode, operands, 2, low, high);
+       count = INTVAL (operands[2]) & (GET_MODE_BITSIZE (mode) - 1);
+ 
+       if (count == GET_MODE_BITSIZE (mode) - 1)
+ 	{
+ 	  emit_move_insn (high[0], high[1]);
+ 	  emit_insn (gen_ashr3 (high[0], high[0],
+ 				GEN_INT (half_width - 1)));
+ 	  emit_move_insn (low[0], high[0]);
+ 
+ 	}
+       else if (count >= half_width)
+ 	{
+ 	  emit_move_insn (low[0], high[1]);
+ 	  emit_move_insn (high[0], low[0]);
+ 	  emit_insn (gen_ashr3 (high[0], high[0],
+ 				GEN_INT (half_width - 1)));
+ 
+ 	  if (count > half_width)
+ 	    emit_insn (gen_ashr3 (low[0], low[0],
+ 				  GEN_INT (count - half_width)));
+ 	}
+       else
+ 	{
+ 	  gen_shrd = mode == DImode ? gen_x86_shrd : gen_x86_64_shrd;
+ 
+ 	  if (!rtx_equal_p (operands[0], operands[1]))
+ 	    emit_move_insn (operands[0], operands[1]);
+ 
+ 	  emit_insn (gen_shrd (low[0], high[0], GEN_INT (count)));
+ 	  emit_insn (gen_ashr3 (high[0], high[0], GEN_INT (count)));
+ 	}
+     }
+   else
+     {
+       machine_mode half_mode;
+ 
+       gen_shrd = mode == DImode ? gen_x86_shrd : gen_x86_64_shrd;
+ 
+      if (!rtx_equal_p (operands[0], operands[1]))
+ 	emit_move_insn (operands[0], operands[1]);
+ 
+       split_double_mode (mode, operands, 1, low, high);
+       half_mode = mode == DImode ? SImode : DImode;
+ 
+       emit_insn (gen_shrd (low[0], high[0], operands[2]));
+       emit_insn (gen_ashr3 (high[0], high[0], operands[2]));
+ 
+       if (TARGET_CMOVE && scratch)
+ 	{
+ 	  emit_move_insn (scratch, high[0]);
+ 	  emit_insn (gen_ashr3 (scratch, scratch,
+ 				GEN_INT (half_width - 1)));
+ 	  emit_insn (gen_x86_shift_adj_1
+ 		     (half_mode, low[0], high[0], operands[2], scratch));
+ 	}
+       else
+ 	emit_insn (gen_x86_shift_adj_3
+ 		   (half_mode, low[0], high[0], operands[2]));
+     }
+ }
+ 
+ void
+ ix86_split_lshr (rtx *operands, rtx scratch, machine_mode mode)
+ {
+   rtx (*gen_lshr3)(rtx, rtx, rtx)
+     = mode == DImode ? gen_lshrsi3 : gen_lshrdi3;
+   rtx (*gen_shrd)(rtx, rtx, rtx);
+   int half_width = GET_MODE_BITSIZE (mode) >> 1;
+ 
+   rtx low[2], high[2];
+   int count;
+ 
+   if (CONST_INT_P (operands[2]))
+     {
+       split_double_mode (mode, operands, 2, low, high);
+       count = INTVAL (operands[2]) & (GET_MODE_BITSIZE (mode) - 1);
+ 
+       if (count >= half_width)
+ 	{
+ 	  emit_move_insn (low[0], high[1]);
+ 	  ix86_expand_clear (high[0]);
+ 
+ 	  if (count > half_width)
+ 	    emit_insn (gen_lshr3 (low[0], low[0],
+ 				  GEN_INT (count - half_width)));
+ 	}
+       else
+ 	{
+ 	  gen_shrd = mode == DImode ? gen_x86_shrd : gen_x86_64_shrd;
+ 
+ 	  if (!rtx_equal_p (operands[0], operands[1]))
+ 	    emit_move_insn (operands[0], operands[1]);
+ 
+ 	  emit_insn (gen_shrd (low[0], high[0], GEN_INT (count)));
+ 	  emit_insn (gen_lshr3 (high[0], high[0], GEN_INT (count)));
+ 	}
+     }
+   else
+     {
+       machine_mode half_mode;
+ 
+       gen_shrd = mode == DImode ? gen_x86_shrd : gen_x86_64_shrd;
+ 
+       if (!rtx_equal_p (operands[0], operands[1]))
+ 	emit_move_insn (operands[0], operands[1]);
+ 
+       split_double_mode (mode, operands, 1, low, high);
+       half_mode = mode == DImode ? SImode : DImode;
+ 
+       emit_insn (gen_shrd (low[0], high[0], operands[2]));
+       emit_insn (gen_lshr3 (high[0], high[0], operands[2]));
+ 
+       if (TARGET_CMOVE && scratch)
+ 	{
+ 	  ix86_expand_clear (scratch);
+ 	  emit_insn (gen_x86_shift_adj_1
+ 		     (half_mode, low[0], high[0], operands[2], scratch));
+ 	}
+       else
+ 	emit_insn (gen_x86_shift_adj_2
+ 		   (half_mode, low[0], high[0], operands[2]));
+     }
+ }
+ 
+ /* Return mode for the memcpy/memset loop counter.  Prefer SImode over
+    DImode for constant loop counts.  */
+ 
+ static machine_mode
+ counter_mode (rtx count_exp)
+ {
+   if (GET_MODE (count_exp) != VOIDmode)
+     return GET_MODE (count_exp);
+   if (!CONST_INT_P (count_exp))
+     return Pmode;
+   if (TARGET_64BIT && (INTVAL (count_exp) & ~0xffffffff))
+     return DImode;
+   return SImode;
+ }
+ 
+ /* When ISSETMEM is FALSE, output simple loop to move memory pointer to SRCPTR
+    to DESTPTR via chunks of MODE unrolled UNROLL times, overall size is COUNT
+    specified in bytes.  When ISSETMEM is TRUE, output the equivalent loop to set
+    memory by VALUE (supposed to be in MODE).
+ 
+    The size is rounded down to whole number of chunk size moved at once.
+    SRCMEM and DESTMEM provide MEMrtx to feed proper aliasing info.  */
+ 
+ 
+ static void
+ expand_set_or_cpymem_via_loop (rtx destmem, rtx srcmem,
+ 			       rtx destptr, rtx srcptr, rtx value,
+ 			       rtx count, machine_mode mode, int unroll,
+ 			       int expected_size, bool issetmem)
+ {
+   rtx_code_label *out_label, *top_label;
+   rtx iter, tmp;
+   machine_mode iter_mode = counter_mode (count);
+   int piece_size_n = GET_MODE_SIZE (mode) * unroll;
+   rtx piece_size = GEN_INT (piece_size_n);
+   rtx piece_size_mask = GEN_INT (~((GET_MODE_SIZE (mode) * unroll) - 1));
+   rtx size;
+   int i;
+ 
+   top_label = gen_label_rtx ();
+   out_label = gen_label_rtx ();
+   iter = gen_reg_rtx (iter_mode);
+ 
+   size = expand_simple_binop (iter_mode, AND, count, piece_size_mask,
+ 			      NULL, 1, OPTAB_DIRECT);
+   /* Those two should combine.  */
+   if (piece_size == const1_rtx)
+     {
+       emit_cmp_and_jump_insns (size, const0_rtx, EQ, NULL_RTX, iter_mode,
+ 			       true, out_label);
+       predict_jump (REG_BR_PROB_BASE * 10 / 100);
+     }
+   emit_move_insn (iter, const0_rtx);
+ 
+   emit_label (top_label);
+ 
+   tmp = convert_modes (Pmode, iter_mode, iter, true);
+ 
+   /* This assert could be relaxed - in this case we'll need to compute
+      smallest power of two, containing in PIECE_SIZE_N and pass it to
+      offset_address.  */
+   gcc_assert ((piece_size_n & (piece_size_n - 1)) == 0);
+   destmem = offset_address (destmem, tmp, piece_size_n);
+   destmem = adjust_address (destmem, mode, 0);
+ 
+   if (!issetmem)
+     {
+       srcmem = offset_address (srcmem, copy_rtx (tmp), piece_size_n);
+       srcmem = adjust_address (srcmem, mode, 0);
+ 
+       /* When unrolling for chips that reorder memory reads and writes,
+ 	 we can save registers by using single temporary.
+ 	 Also using 4 temporaries is overkill in 32bit mode.  */
+       if (!TARGET_64BIT && 0)
+ 	{
+ 	  for (i = 0; i < unroll; i++)
+ 	    {
+ 	      if (i)
+ 		{
+ 		  destmem = adjust_address (copy_rtx (destmem), mode,
+ 					    GET_MODE_SIZE (mode));
+ 		  srcmem = adjust_address (copy_rtx (srcmem), mode,
+ 					   GET_MODE_SIZE (mode));
+ 		}
+ 	      emit_move_insn (destmem, srcmem);
+ 	    }
+ 	}
+       else
+ 	{
+ 	  rtx tmpreg[4];
+ 	  gcc_assert (unroll <= 4);
+ 	  for (i = 0; i < unroll; i++)
+ 	    {
+ 	      tmpreg[i] = gen_reg_rtx (mode);
+ 	      if (i)
+ 		srcmem = adjust_address (copy_rtx (srcmem), mode,
+ 					 GET_MODE_SIZE (mode));
+ 	      emit_move_insn (tmpreg[i], srcmem);
+ 	    }
+ 	  for (i = 0; i < unroll; i++)
+ 	    {
+ 	      if (i)
+ 		destmem = adjust_address (copy_rtx (destmem), mode,
+ 					  GET_MODE_SIZE (mode));
+ 	      emit_move_insn (destmem, tmpreg[i]);
+ 	    }
+ 	}
+     }
+   else
+     for (i = 0; i < unroll; i++)
+       {
+ 	if (i)
+ 	  destmem = adjust_address (copy_rtx (destmem), mode,
+ 				    GET_MODE_SIZE (mode));
+ 	emit_move_insn (destmem, value);
+       }
+ 
+   tmp = expand_simple_binop (iter_mode, PLUS, iter, piece_size, iter,
+ 			     true, OPTAB_LIB_WIDEN);
+   if (tmp != iter)
+     emit_move_insn (iter, tmp);
+ 
+   emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
+ 			   true, top_label);
+   if (expected_size != -1)
+     {
+       expected_size /= GET_MODE_SIZE (mode) * unroll;
+       if (expected_size == 0)
+ 	predict_jump (0);
+       else if (expected_size > REG_BR_PROB_BASE)
+ 	predict_jump (REG_BR_PROB_BASE - 1);
+       else
+         predict_jump (REG_BR_PROB_BASE - (REG_BR_PROB_BASE + expected_size / 2)
+ 		      / expected_size);
+     }
+   else
+     predict_jump (REG_BR_PROB_BASE * 80 / 100);
+   iter = ix86_zero_extend_to_Pmode (iter);
+   tmp = expand_simple_binop (Pmode, PLUS, destptr, iter, destptr,
+ 			     true, OPTAB_LIB_WIDEN);
+   if (tmp != destptr)
+     emit_move_insn (destptr, tmp);
+   if (!issetmem)
+     {
+       tmp = expand_simple_binop (Pmode, PLUS, srcptr, iter, srcptr,
+ 				 true, OPTAB_LIB_WIDEN);
+       if (tmp != srcptr)
+ 	emit_move_insn (srcptr, tmp);
+     }
+   emit_label (out_label);
+ }
+ 
+ /* Divide COUNTREG by SCALE.  */
+ static rtx
+ scale_counter (rtx countreg, int scale)
+ {
+   rtx sc;
+ 
+   if (scale == 1)
+     return countreg;
+   if (CONST_INT_P (countreg))
+     return GEN_INT (INTVAL (countreg) / scale);
+   gcc_assert (REG_P (countreg));
+ 
+   sc = expand_simple_binop (GET_MODE (countreg), LSHIFTRT, countreg,
+ 			    GEN_INT (exact_log2 (scale)),
+ 			    NULL, 1, OPTAB_DIRECT);
+   return sc;
+ }
+ 
+ /* Output "rep; mov" or "rep; stos" instruction depending on ISSETMEM argument.
+    When ISSETMEM is true, arguments SRCMEM and SRCPTR are ignored.
+    When ISSETMEM is false, arguments VALUE and ORIG_VALUE are ignored.
+    For setmem case, VALUE is a promoted to a wider size ORIG_VALUE.
+    ORIG_VALUE is the original value passed to memset to fill the memory with.
+    Other arguments have same meaning as for previous function.  */
+ 
+ static void
+ expand_set_or_cpymem_via_rep (rtx destmem, rtx srcmem,
+ 			   rtx destptr, rtx srcptr, rtx value, rtx orig_value,
+ 			   rtx count,
+ 			   machine_mode mode, bool issetmem)
+ {
+   rtx destexp;
+   rtx srcexp;
+   rtx countreg;
+   HOST_WIDE_INT rounded_count;
+ 
+   /* If possible, it is shorter to use rep movs.
+      TODO: Maybe it is better to move this logic to decide_alg.  */
+   if (mode == QImode && CONST_INT_P (count) && !(INTVAL (count) & 3)
+       && (!issetmem || orig_value == const0_rtx))
+     mode = SImode;
+ 
+   if (destptr != XEXP (destmem, 0) || GET_MODE (destmem) != BLKmode)
+     destmem = adjust_automodify_address_nv (destmem, BLKmode, destptr, 0);
+ 
+   countreg = ix86_zero_extend_to_Pmode (scale_counter (count,
+ 						       GET_MODE_SIZE (mode)));
+   if (mode != QImode)
+     {
+       destexp = gen_rtx_ASHIFT (Pmode, countreg,
+ 				GEN_INT (exact_log2 (GET_MODE_SIZE (mode))));
+       destexp = gen_rtx_PLUS (Pmode, destexp, destptr);
+     }
+   else
+     destexp = gen_rtx_PLUS (Pmode, destptr, countreg);
+   if ((!issetmem || orig_value == const0_rtx) && CONST_INT_P (count))
+     {
+       rounded_count
+ 	= ROUND_DOWN (INTVAL (count), (HOST_WIDE_INT) GET_MODE_SIZE (mode));
+       destmem = shallow_copy_rtx (destmem);
+       set_mem_size (destmem, rounded_count);
+     }
+   else if (MEM_SIZE_KNOWN_P (destmem))
+     clear_mem_size (destmem);
+ 
+   if (issetmem)
+     {
+       value = force_reg (mode, gen_lowpart (mode, value));
+       emit_insn (gen_rep_stos (destptr, countreg, destmem, value, destexp));
+     }
+   else
+     {
+       if (srcptr != XEXP (srcmem, 0) || GET_MODE (srcmem) != BLKmode)
+ 	srcmem = adjust_automodify_address_nv (srcmem, BLKmode, srcptr, 0);
+       if (mode != QImode)
+ 	{
+ 	  srcexp = gen_rtx_ASHIFT (Pmode, countreg,
+ 				   GEN_INT (exact_log2 (GET_MODE_SIZE (mode))));
+ 	  srcexp = gen_rtx_PLUS (Pmode, srcexp, srcptr);
+ 	}
+       else
+ 	srcexp = gen_rtx_PLUS (Pmode, srcptr, countreg);
+       if (CONST_INT_P (count))
+ 	{
+ 	  rounded_count
+ 	    = ROUND_DOWN (INTVAL (count), (HOST_WIDE_INT) GET_MODE_SIZE (mode));
+ 	  srcmem = shallow_copy_rtx (srcmem);
+ 	  set_mem_size (srcmem, rounded_count);
+ 	}
+       else
+ 	{
+ 	  if (MEM_SIZE_KNOWN_P (srcmem))
+ 	    clear_mem_size (srcmem);
+ 	}
+       emit_insn (gen_rep_mov (destptr, destmem, srcptr, srcmem, countreg,
+ 			      destexp, srcexp));
+     }
+ }
+ 
+ /* This function emits moves to copy SIZE_TO_MOVE bytes from SRCMEM to
+    DESTMEM.
+    SRC is passed by pointer to be updated on return.
+    Return value is updated DST.  */
+ static rtx
+ emit_memmov (rtx destmem, rtx *srcmem, rtx destptr, rtx srcptr,
+ 	     HOST_WIDE_INT size_to_move)
+ {
+   rtx dst = destmem, src = *srcmem, adjust, tempreg;
+   enum insn_code code;
+   machine_mode move_mode;
+   int piece_size, i;
+ 
+   /* Find the widest mode in which we could perform moves.
+      Start with the biggest power of 2 less than SIZE_TO_MOVE and half
+      it until move of such size is supported.  */
+   piece_size = 1 << floor_log2 (size_to_move);
+   while (!int_mode_for_size (piece_size * BITS_PER_UNIT, 0).exists (&move_mode)
+ 	 || (code = optab_handler (mov_optab, move_mode)) == CODE_FOR_nothing)
+     {
+       gcc_assert (piece_size > 1);
+       piece_size >>= 1;
+     }
+ 
+   /* Find the corresponding vector mode with the same size as MOVE_MODE.
+      MOVE_MODE is an integer mode at the moment (SI, DI, TI, etc.).  */
+   if (GET_MODE_SIZE (move_mode) > GET_MODE_SIZE (word_mode))
+     {
+       int nunits = GET_MODE_SIZE (move_mode) / GET_MODE_SIZE (word_mode);
+       if (!mode_for_vector (word_mode, nunits).exists (&move_mode)
+ 	  || (code = optab_handler (mov_optab, move_mode)) == CODE_FOR_nothing)
+ 	{
+ 	  move_mode = word_mode;
+ 	  piece_size = GET_MODE_SIZE (move_mode);
+ 	  code = optab_handler (mov_optab, move_mode);
+ 	}
+     }
+   gcc_assert (code != CODE_FOR_nothing);
+ 
+   dst = adjust_automodify_address_nv (dst, move_mode, destptr, 0);
+   src = adjust_automodify_address_nv (src, move_mode, srcptr, 0);
+ 
+   /* Emit moves.  We'll need SIZE_TO_MOVE/PIECE_SIZES moves.  */
+   gcc_assert (size_to_move % piece_size == 0);
+   adjust = GEN_INT (piece_size);
+   for (i = 0; i < size_to_move; i += piece_size)
+     {
+       /* We move from memory to memory, so we'll need to do it via
+ 	 a temporary register.  */
+       tempreg = gen_reg_rtx (move_mode);
+       emit_insn (GEN_FCN (code) (tempreg, src));
+       emit_insn (GEN_FCN (code) (dst, tempreg));
+ 
+       emit_move_insn (destptr,
+ 		      gen_rtx_PLUS (Pmode, copy_rtx (destptr), adjust));
+       emit_move_insn (srcptr,
+ 		      gen_rtx_PLUS (Pmode, copy_rtx (srcptr), adjust));
+ 
+       dst = adjust_automodify_address_nv (dst, move_mode, destptr,
+ 					  piece_size);
+       src = adjust_automodify_address_nv (src, move_mode, srcptr,
+ 					  piece_size);
+     }
+ 
+   /* Update DST and SRC rtx.  */
+   *srcmem = src;
+   return dst;
+ }
+ 
+ /* Helper function for the string operations below.  Dest VARIABLE whether
+    it is aligned to VALUE bytes.  If true, jump to the label.  */
+ 
+ static rtx_code_label *
+ ix86_expand_aligntest (rtx variable, int value, bool epilogue)
+ {
+   rtx_code_label *label = gen_label_rtx ();
+   rtx tmpcount = gen_reg_rtx (GET_MODE (variable));
+   if (GET_MODE (variable) == DImode)
+     emit_insn (gen_anddi3 (tmpcount, variable, GEN_INT (value)));
+   else
+     emit_insn (gen_andsi3 (tmpcount, variable, GEN_INT (value)));
+   emit_cmp_and_jump_insns (tmpcount, const0_rtx, EQ, 0, GET_MODE (variable),
+ 			   1, label);
+   if (epilogue)
+     predict_jump (REG_BR_PROB_BASE * 50 / 100);
+   else
+     predict_jump (REG_BR_PROB_BASE * 90 / 100);
+   return label;
+ }
+ 
+ 
+ /* Output code to copy at most count & (max_size - 1) bytes from SRC to DEST.  */
+ 
+ static void
+ expand_cpymem_epilogue (rtx destmem, rtx srcmem,
+ 			rtx destptr, rtx srcptr, rtx count, int max_size)
+ {
+   rtx src, dest;
+   if (CONST_INT_P (count))
+     {
+       HOST_WIDE_INT countval = INTVAL (count);
+       HOST_WIDE_INT epilogue_size = countval % max_size;
+       int i;
+ 
+       /* For now MAX_SIZE should be a power of 2.  This assert could be
+ 	 relaxed, but it'll require a bit more complicated epilogue
+ 	 expanding.  */
+       gcc_assert ((max_size & (max_size - 1)) == 0);
+       for (i = max_size; i >= 1; i >>= 1)
+ 	{
+ 	  if (epilogue_size & i)
+ 	    destmem = emit_memmov (destmem, &srcmem, destptr, srcptr, i);
+ 	}
+       return;
+     }
+   if (max_size > 8)
+     {
+       count = expand_simple_binop (GET_MODE (count), AND, count, GEN_INT (max_size - 1),
+ 				    count, 1, OPTAB_DIRECT);
+       expand_set_or_cpymem_via_loop (destmem, srcmem, destptr, srcptr, NULL,
+ 				     count, QImode, 1, 4, false);
+       return;
+     }
+ 
+   /* When there are stringops, we can cheaply increase dest and src pointers.
+      Otherwise we save code size by maintaining offset (zero is readily
+      available from preceding rep operation) and using x86 addressing modes.
+    */
+   if (TARGET_SINGLE_STRINGOP)
+     {
+       if (max_size > 4)
+ 	{
+ 	  rtx_code_label *label = ix86_expand_aligntest (count, 4, true);
+ 	  src = change_address (srcmem, SImode, srcptr);
+ 	  dest = change_address (destmem, SImode, destptr);
+ 	  emit_insn (gen_strmov (destptr, dest, srcptr, src));
+ 	  emit_label (label);
+ 	  LABEL_NUSES (label) = 1;
+ 	}
+       if (max_size > 2)
+ 	{
+ 	  rtx_code_label *label = ix86_expand_aligntest (count, 2, true);
+ 	  src = change_address (srcmem, HImode, srcptr);
+ 	  dest = change_address (destmem, HImode, destptr);
+ 	  emit_insn (gen_strmov (destptr, dest, srcptr, src));
+ 	  emit_label (label);
+ 	  LABEL_NUSES (label) = 1;
+ 	}
+       if (max_size > 1)
+ 	{
+ 	  rtx_code_label *label = ix86_expand_aligntest (count, 1, true);
+ 	  src = change_address (srcmem, QImode, srcptr);
+ 	  dest = change_address (destmem, QImode, destptr);
+ 	  emit_insn (gen_strmov (destptr, dest, srcptr, src));
+ 	  emit_label (label);
+ 	  LABEL_NUSES (label) = 1;
+ 	}
+     }
+   else
+     {
+       rtx offset = force_reg (Pmode, const0_rtx);
+       rtx tmp;
+ 
+       if (max_size > 4)
+ 	{
+ 	  rtx_code_label *label = ix86_expand_aligntest (count, 4, true);
+ 	  src = change_address (srcmem, SImode, srcptr);
+ 	  dest = change_address (destmem, SImode, destptr);
+ 	  emit_move_insn (dest, src);
+ 	  tmp = expand_simple_binop (Pmode, PLUS, offset, GEN_INT (4), NULL,
+ 				     true, OPTAB_LIB_WIDEN);
+ 	  if (tmp != offset)
+ 	    emit_move_insn (offset, tmp);
+ 	  emit_label (label);
+ 	  LABEL_NUSES (label) = 1;
+ 	}
+       if (max_size > 2)
+ 	{
+ 	  rtx_code_label *label = ix86_expand_aligntest (count, 2, true);
+ 	  tmp = gen_rtx_PLUS (Pmode, srcptr, offset);
+ 	  src = change_address (srcmem, HImode, tmp);
+ 	  tmp = gen_rtx_PLUS (Pmode, destptr, offset);
+ 	  dest = change_address (destmem, HImode, tmp);
+ 	  emit_move_insn (dest, src);
+ 	  tmp = expand_simple_binop (Pmode, PLUS, offset, GEN_INT (2), tmp,
+ 				     true, OPTAB_LIB_WIDEN);
+ 	  if (tmp != offset)
+ 	    emit_move_insn (offset, tmp);
+ 	  emit_label (label);
+ 	  LABEL_NUSES (label) = 1;
+ 	}
+       if (max_size > 1)
+ 	{
+ 	  rtx_code_label *label = ix86_expand_aligntest (count, 1, true);
+ 	  tmp = gen_rtx_PLUS (Pmode, srcptr, offset);
+ 	  src = change_address (srcmem, QImode, tmp);
+ 	  tmp = gen_rtx_PLUS (Pmode, destptr, offset);
+ 	  dest = change_address (destmem, QImode, tmp);
+ 	  emit_move_insn (dest, src);
+ 	  emit_label (label);
+ 	  LABEL_NUSES (label) = 1;
+ 	}
+     }
+ }
+ 
+ /* This function emits moves to fill SIZE_TO_MOVE bytes starting from DESTMEM
+    with value PROMOTED_VAL.
+    SRC is passed by pointer to be updated on return.
+    Return value is updated DST.  */
+ static rtx
+ emit_memset (rtx destmem, rtx destptr, rtx promoted_val,
+ 	     HOST_WIDE_INT size_to_move)
+ {
+   rtx dst = destmem, adjust;
+   enum insn_code code;
+   machine_mode move_mode;
+   int piece_size, i;
+ 
+   /* Find the widest mode in which we could perform moves.
+      Start with the biggest power of 2 less than SIZE_TO_MOVE and half
+      it until move of such size is supported.  */
+   move_mode = GET_MODE (promoted_val);
+   if (move_mode == VOIDmode)
+     move_mode = QImode;
+   if (size_to_move < GET_MODE_SIZE (move_mode))
+     {
+       unsigned int move_bits = size_to_move * BITS_PER_UNIT;
+       move_mode = int_mode_for_size (move_bits, 0).require ();
+       promoted_val = gen_lowpart (move_mode, promoted_val);
+     }
+   piece_size = GET_MODE_SIZE (move_mode);
+   code = optab_handler (mov_optab, move_mode);
+   gcc_assert (code != CODE_FOR_nothing && promoted_val != NULL_RTX);
+ 
+   dst = adjust_automodify_address_nv (dst, move_mode, destptr, 0);
+ 
+   /* Emit moves.  We'll need SIZE_TO_MOVE/PIECE_SIZES moves.  */
+   gcc_assert (size_to_move % piece_size == 0);
+   adjust = GEN_INT (piece_size);
+   for (i = 0; i < size_to_move; i += piece_size)
+     {
+       if (piece_size <= GET_MODE_SIZE (word_mode))
+ 	{
+ 	  emit_insn (gen_strset (destptr, dst, promoted_val));
+ 	  dst = adjust_automodify_address_nv (dst, move_mode, destptr,
+ 					      piece_size);
+ 	  continue;
+ 	}
+ 
+       emit_insn (GEN_FCN (code) (dst, promoted_val));
+ 
+       emit_move_insn (destptr,
+ 		      gen_rtx_PLUS (Pmode, copy_rtx (destptr), adjust));
+ 
+       dst = adjust_automodify_address_nv (dst, move_mode, destptr,
+ 					  piece_size);
+     }
+ 
+   /* Update DST rtx.  */
+   return dst;
+ }
+ /* Output code to set at most count & (max_size - 1) bytes starting by DEST.  */
+ static void
+ expand_setmem_epilogue_via_loop (rtx destmem, rtx destptr, rtx value,
+ 				 rtx count, int max_size)
+ {
+   count = expand_simple_binop (counter_mode (count), AND, count,
+ 			       GEN_INT (max_size - 1), count, 1, OPTAB_DIRECT);
+   expand_set_or_cpymem_via_loop (destmem, NULL, destptr, NULL,
+ 				 gen_lowpart (QImode, value), count, QImode,
+ 				 1, max_size / 2, true);
+ }
+ 
+ /* Output code to set at most count & (max_size - 1) bytes starting by DEST.  */
+ static void
+ expand_setmem_epilogue (rtx destmem, rtx destptr, rtx value, rtx vec_value,
+ 			rtx count, int max_size)
+ {
+   rtx dest;
+ 
+   if (CONST_INT_P (count))
+     {
+       HOST_WIDE_INT countval = INTVAL (count);
+       HOST_WIDE_INT epilogue_size = countval % max_size;
+       int i;
+ 
+       /* For now MAX_SIZE should be a power of 2.  This assert could be
+ 	 relaxed, but it'll require a bit more complicated epilogue
+ 	 expanding.  */
+       gcc_assert ((max_size & (max_size - 1)) == 0);
+       for (i = max_size; i >= 1; i >>= 1)
+ 	{
+ 	  if (epilogue_size & i)
+ 	    {
+ 	      if (vec_value && i > GET_MODE_SIZE (GET_MODE (value)))
+ 		destmem = emit_memset (destmem, destptr, vec_value, i);
+ 	      else
+ 		destmem = emit_memset (destmem, destptr, value, i);
+ 	    }
+ 	}
+       return;
+     }
+   if (max_size > 32)
+     {
+       expand_setmem_epilogue_via_loop (destmem, destptr, value, count, max_size);
+       return;
+     }
+   if (max_size > 16)
+     {
+       rtx_code_label *label = ix86_expand_aligntest (count, 16, true);
+       if (TARGET_64BIT)
+ 	{
+ 	  dest = change_address (destmem, DImode, destptr);
+ 	  emit_insn (gen_strset (destptr, dest, value));
+ 	  dest = adjust_automodify_address_nv (dest, DImode, destptr, 8);
+ 	  emit_insn (gen_strset (destptr, dest, value));
+ 	}
+       else
+ 	{
+ 	  dest = change_address (destmem, SImode, destptr);
+ 	  emit_insn (gen_strset (destptr, dest, value));
+ 	  dest = adjust_automodify_address_nv (dest, SImode, destptr, 4);
+ 	  emit_insn (gen_strset (destptr, dest, value));
+ 	  dest = adjust_automodify_address_nv (dest, SImode, destptr, 8);
+ 	  emit_insn (gen_strset (destptr, dest, value));
+ 	  dest = adjust_automodify_address_nv (dest, SImode, destptr, 12);
+ 	  emit_insn (gen_strset (destptr, dest, value));
+ 	}
+       emit_label (label);
+       LABEL_NUSES (label) = 1;
+     }
+   if (max_size > 8)
+     {
+       rtx_code_label *label = ix86_expand_aligntest (count, 8, true);
+       if (TARGET_64BIT)
+ 	{
+ 	  dest = change_address (destmem, DImode, destptr);
+ 	  emit_insn (gen_strset (destptr, dest, value));
+ 	}
+       else
+ 	{
+ 	  dest = change_address (destmem, SImode, destptr);
+ 	  emit_insn (gen_strset (destptr, dest, value));
+ 	  dest = adjust_automodify_address_nv (dest, SImode, destptr, 4);
+ 	  emit_insn (gen_strset (destptr, dest, value));
+ 	}
+       emit_label (label);
+       LABEL_NUSES (label) = 1;
+     }
+   if (max_size > 4)
+     {
+       rtx_code_label *label = ix86_expand_aligntest (count, 4, true);
+       dest = change_address (destmem, SImode, destptr);
+       emit_insn (gen_strset (destptr, dest, gen_lowpart (SImode, value)));
+       emit_label (label);
+       LABEL_NUSES (label) = 1;
+     }
+   if (max_size > 2)
+     {
+       rtx_code_label *label = ix86_expand_aligntest (count, 2, true);
+       dest = change_address (destmem, HImode, destptr);
+       emit_insn (gen_strset (destptr, dest, gen_lowpart (HImode, value)));
+       emit_label (label);
+       LABEL_NUSES (label) = 1;
+     }
+   if (max_size > 1)
+     {
+       rtx_code_label *label = ix86_expand_aligntest (count, 1, true);
+       dest = change_address (destmem, QImode, destptr);
+       emit_insn (gen_strset (destptr, dest, gen_lowpart (QImode, value)));
+       emit_label (label);
+       LABEL_NUSES (label) = 1;
+     }
+ }
+ 
+ /* Adjust COUNTER by the VALUE.  */
+ static void
+ ix86_adjust_counter (rtx countreg, HOST_WIDE_INT value)
+ {
+   emit_insn (gen_add2_insn (countreg, GEN_INT (-value)));
+ }
+ 
+ /* Depending on ISSETMEM, copy enough from SRCMEM to DESTMEM or set enough to
+    DESTMEM to align it to DESIRED_ALIGNMENT.  Original alignment is ALIGN.
+    Depending on ISSETMEM, either arguments SRCMEM/SRCPTR or VALUE/VEC_VALUE are
+    ignored.
+    Return value is updated DESTMEM.  */
+ 
+ static rtx
+ expand_set_or_cpymem_prologue (rtx destmem, rtx srcmem,
+ 				  rtx destptr, rtx srcptr, rtx value,
+ 				  rtx vec_value, rtx count, int align,
+ 				  int desired_alignment, bool issetmem)
+ {
+   int i;
+   for (i = 1; i < desired_alignment; i <<= 1)
+     {
+       if (align <= i)
+ 	{
+ 	  rtx_code_label *label = ix86_expand_aligntest (destptr, i, false);
+ 	  if (issetmem)
+ 	    {
+ 	      if (vec_value && i > GET_MODE_SIZE (GET_MODE (value)))
+ 		destmem = emit_memset (destmem, destptr, vec_value, i);
+ 	      else
+ 		destmem = emit_memset (destmem, destptr, value, i);
+ 	    }
+ 	  else
+ 	    destmem = emit_memmov (destmem, &srcmem, destptr, srcptr, i);
+ 	  ix86_adjust_counter (count, i);
+ 	  emit_label (label);
+ 	  LABEL_NUSES (label) = 1;
+ 	  set_mem_align (destmem, i * 2 * BITS_PER_UNIT);
+ 	}
+     }
+   return destmem;
+ }
+ 
+ /* Test if COUNT&SIZE is nonzero and if so, expand movme
+    or setmem sequence that is valid for SIZE..2*SIZE-1 bytes
+    and jump to DONE_LABEL.  */
+ static void
+ expand_small_cpymem_or_setmem (rtx destmem, rtx srcmem,
+ 			       rtx destptr, rtx srcptr,
+ 			       rtx value, rtx vec_value,
+ 			       rtx count, int size,
+ 			       rtx done_label, bool issetmem)
+ {
+   rtx_code_label *label = ix86_expand_aligntest (count, size, false);
+   machine_mode mode = int_mode_for_size (size * BITS_PER_UNIT, 1).else_blk ();
+   rtx modesize;
+   int n;
+ 
+   /* If we do not have vector value to copy, we must reduce size.  */
+   if (issetmem)
+     {
+       if (!vec_value)
+ 	{
+ 	  if (GET_MODE (value) == VOIDmode && size > 8)
+ 	    mode = Pmode;
+ 	  else if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (value)))
+ 	    mode = GET_MODE (value);
+ 	}
+       else
+ 	mode = GET_MODE (vec_value), value = vec_value;
+     }
+   else
+     {
+       /* Choose appropriate vector mode.  */
+       if (size >= 32)
+ 	mode = TARGET_AVX ? V32QImode : TARGET_SSE ? V16QImode : DImode;
+       else if (size >= 16)
+ 	mode = TARGET_SSE ? V16QImode : DImode;
+       srcmem = change_address (srcmem, mode, srcptr);
+     }
+   destmem = change_address (destmem, mode, destptr);
+   modesize = GEN_INT (GET_MODE_SIZE (mode));
+   gcc_assert (GET_MODE_SIZE (mode) <= size);
+   for (n = 0; n * GET_MODE_SIZE (mode) < size; n++)
+     {
+       if (issetmem)
+ 	emit_move_insn (destmem, gen_lowpart (mode, value));
+       else
+ 	{
+           emit_move_insn (destmem, srcmem);
+           srcmem = offset_address (srcmem, modesize, GET_MODE_SIZE (mode));
+ 	}
+       destmem = offset_address (destmem, modesize, GET_MODE_SIZE (mode));
+     }
+ 
+   destmem = offset_address (destmem, count, 1);
+   destmem = offset_address (destmem, GEN_INT (-2 * size),
+ 			    GET_MODE_SIZE (mode));
+   if (!issetmem)
+     {
+       srcmem = offset_address (srcmem, count, 1);
+       srcmem = offset_address (srcmem, GEN_INT (-2 * size),
+ 			       GET_MODE_SIZE (mode));
+     }
+   for (n = 0; n * GET_MODE_SIZE (mode) < size; n++)
+     {
+       if (issetmem)
+ 	emit_move_insn (destmem, gen_lowpart (mode, value));
+       else
+ 	{
+ 	  emit_move_insn (destmem, srcmem);
+ 	  srcmem = offset_address (srcmem, modesize, GET_MODE_SIZE (mode));
+ 	}
+       destmem = offset_address (destmem, modesize, GET_MODE_SIZE (mode));
+     }
+   emit_jump_insn (gen_jump (done_label));
+   emit_barrier ();
+ 
+   emit_label (label);
+   LABEL_NUSES (label) = 1;
+ }
+ 
+ /* Handle small memcpy (up to SIZE that is supposed to be small power of 2.
+    and get ready for the main memcpy loop by copying iniital DESIRED_ALIGN-ALIGN
+    bytes and last SIZE bytes adjusitng DESTPTR/SRCPTR/COUNT in a way we can
+    proceed with an loop copying SIZE bytes at once. Do moves in MODE.
+    DONE_LABEL is a label after the whole copying sequence. The label is created
+    on demand if *DONE_LABEL is NULL.
+    MIN_SIZE is minimal size of block copied.  This value gets adjusted for new
+    bounds after the initial copies. 
+ 
+    DESTMEM/SRCMEM are memory expressions pointing to the copies block,
+    DESTPTR/SRCPTR are pointers to the block. DYNAMIC_CHECK indicate whether
+    we will dispatch to a library call for large blocks.
+ 
+    In pseudocode we do:
+ 
+    if (COUNT < SIZE)
+      {
+        Assume that SIZE is 4. Bigger sizes are handled analogously
+        if (COUNT & 4)
+ 	 {
+ 	    copy 4 bytes from SRCPTR to DESTPTR
+ 	    copy 4 bytes from SRCPTR + COUNT - 4 to DESTPTR + COUNT - 4
+ 	    goto done_label
+ 	 }
+        if (!COUNT)
+ 	 goto done_label;
+        copy 1 byte from SRCPTR to DESTPTR
+        if (COUNT & 2)
+ 	 {
+ 	    copy 2 bytes from SRCPTR to DESTPTR
+ 	    copy 2 bytes from SRCPTR + COUNT - 2 to DESTPTR + COUNT - 2
+ 	 }
+      }
+    else
+      {
+        copy at least DESIRED_ALIGN-ALIGN bytes from SRCPTR to DESTPTR
+        copy SIZE bytes from SRCPTR + COUNT - SIZE to DESTPTR + COUNT -SIZE
+ 
+        OLD_DESPTR = DESTPTR;
+        Align DESTPTR up to DESIRED_ALIGN
+        SRCPTR += DESTPTR - OLD_DESTPTR
+        COUNT -= DEST_PTR - OLD_DESTPTR
+        if (DYNAMIC_CHECK)
+ 	 Round COUNT down to multiple of SIZE
+        << optional caller supplied zero size guard is here >>
+        << optional caller supplied dynamic check is here >>
+        << caller supplied main copy loop is here >>
+      }
+    done_label:
+   */
+ static void
+ expand_set_or_cpymem_prologue_epilogue_by_misaligned_moves (rtx destmem, rtx srcmem,
+ 							    rtx *destptr, rtx *srcptr,
+ 							    machine_mode mode,
+ 							    rtx value, rtx vec_value,
+ 							    rtx *count,
+ 							    rtx_code_label **done_label,
+ 							    int size,
+ 							    int desired_align,
+ 							    int align,
+ 							    unsigned HOST_WIDE_INT *min_size,
+ 							    bool dynamic_check,
+ 							    bool issetmem)
+ {
+   rtx_code_label *loop_label = NULL, *label;
+   int n;
+   rtx modesize;
+   int prolog_size = 0;
+   rtx mode_value;
+ 
+   /* Chose proper value to copy.  */
+   if (issetmem && VECTOR_MODE_P (mode))
+     mode_value = vec_value;
+   else
+     mode_value = value;
+   gcc_assert (GET_MODE_SIZE (mode) <= size);
+ 
+   /* See if block is big or small, handle small blocks.  */
+   if (!CONST_INT_P (*count) && *min_size < (unsigned HOST_WIDE_INT)size)
+     {
+       int size2 = size;
+       loop_label = gen_label_rtx ();
+ 
+       if (!*done_label)
+ 	*done_label = gen_label_rtx ();
+ 
+       emit_cmp_and_jump_insns (*count, GEN_INT (size2), GE, 0, GET_MODE (*count),
+ 			       1, loop_label);
+       size2 >>= 1;
+ 
+       /* Handle sizes > 3.  */
+       for (;size2 > 2; size2 >>= 1)
+ 	expand_small_cpymem_or_setmem (destmem, srcmem,
+ 				       *destptr, *srcptr,
+ 				       value, vec_value,
+ 				       *count,
+ 				       size2, *done_label, issetmem);
+       /* Nothing to copy?  Jump to DONE_LABEL if so */
+       emit_cmp_and_jump_insns (*count, const0_rtx, EQ, 0, GET_MODE (*count),
+ 			       1, *done_label);
+ 
+       /* Do a byte copy.  */
+       destmem = change_address (destmem, QImode, *destptr);
+       if (issetmem)
+ 	emit_move_insn (destmem, gen_lowpart (QImode, value));
+       else
+ 	{
+           srcmem = change_address (srcmem, QImode, *srcptr);
+           emit_move_insn (destmem, srcmem);
+ 	}
+ 
+       /* Handle sizes 2 and 3.  */
+       label = ix86_expand_aligntest (*count, 2, false);
+       destmem = change_address (destmem, HImode, *destptr);
+       destmem = offset_address (destmem, *count, 1);
+       destmem = offset_address (destmem, GEN_INT (-2), 2);
+       if (issetmem)
+         emit_move_insn (destmem, gen_lowpart (HImode, value));
+       else
+ 	{
+ 	  srcmem = change_address (srcmem, HImode, *srcptr);
+ 	  srcmem = offset_address (srcmem, *count, 1);
+ 	  srcmem = offset_address (srcmem, GEN_INT (-2), 2);
+ 	  emit_move_insn (destmem, srcmem);
+ 	}
+ 
+       emit_label (label);
+       LABEL_NUSES (label) = 1;
+       emit_jump_insn (gen_jump (*done_label));
+       emit_barrier ();
+     }
+   else
+     gcc_assert (*min_size >= (unsigned HOST_WIDE_INT)size
+ 		|| UINTVAL (*count) >= (unsigned HOST_WIDE_INT)size);
+ 
+   /* Start memcpy for COUNT >= SIZE.  */
+   if (loop_label)
+     {
+        emit_label (loop_label);
+        LABEL_NUSES (loop_label) = 1;
+     }
+ 
+   /* Copy first desired_align bytes.  */
+   if (!issetmem)
+     srcmem = change_address (srcmem, mode, *srcptr);
+   destmem = change_address (destmem, mode, *destptr);
+   modesize = GEN_INT (GET_MODE_SIZE (mode));
+   for (n = 0; prolog_size < desired_align - align; n++)
+     {
+       if (issetmem)
+         emit_move_insn (destmem, mode_value);
+       else
+ 	{
+           emit_move_insn (destmem, srcmem);
+           srcmem = offset_address (srcmem, modesize, GET_MODE_SIZE (mode));
+ 	}
+       destmem = offset_address (destmem, modesize, GET_MODE_SIZE (mode));
+       prolog_size += GET_MODE_SIZE (mode);
+     }
+ 
+ 
+   /* Copy last SIZE bytes.  */
+   destmem = offset_address (destmem, *count, 1);
+   destmem = offset_address (destmem,
+ 			    GEN_INT (-size - prolog_size),
+ 			    1);
+   if (issetmem)
+     emit_move_insn (destmem, mode_value);
+   else
+     {
+       srcmem = offset_address (srcmem, *count, 1);
+       srcmem = offset_address (srcmem,
+ 			       GEN_INT (-size - prolog_size),
+ 			       1);
+       emit_move_insn (destmem, srcmem);
+     }
+   for (n = 1; n * GET_MODE_SIZE (mode) < size; n++)
+     {
+       destmem = offset_address (destmem, modesize, 1);
+       if (issetmem)
+ 	emit_move_insn (destmem, mode_value);
+       else
+ 	{
+           srcmem = offset_address (srcmem, modesize, 1);
+           emit_move_insn (destmem, srcmem);
+ 	}
+     }
+ 
+   /* Align destination.  */
+   if (desired_align > 1 && desired_align > align)
+     {
+       rtx saveddest = *destptr;
+ 
+       gcc_assert (desired_align <= size);
+       /* Align destptr up, place it to new register.  */
+       *destptr = expand_simple_binop (GET_MODE (*destptr), PLUS, *destptr,
+ 				      GEN_INT (prolog_size),
+ 				      NULL_RTX, 1, OPTAB_DIRECT);
+       if (REG_P (*destptr) && REG_P (saveddest) && REG_POINTER (saveddest))
+ 	REG_POINTER (*destptr) = 1;
+       *destptr = expand_simple_binop (GET_MODE (*destptr), AND, *destptr,
+ 				      GEN_INT (-desired_align),
+ 				      *destptr, 1, OPTAB_DIRECT);
+       /* See how many bytes we skipped.  */
+       saveddest = expand_simple_binop (GET_MODE (*destptr), MINUS, saveddest,
+ 				       *destptr,
+ 				       saveddest, 1, OPTAB_DIRECT);
+       /* Adjust srcptr and count.  */
+       if (!issetmem)
+ 	*srcptr = expand_simple_binop (GET_MODE (*srcptr), MINUS, *srcptr,
+ 				       saveddest, *srcptr, 1, OPTAB_DIRECT);
+       *count = expand_simple_binop (GET_MODE (*count), PLUS, *count,
+ 				    saveddest, *count, 1, OPTAB_DIRECT);
+       /* We copied at most size + prolog_size.  */
+       if (*min_size > (unsigned HOST_WIDE_INT)(size + prolog_size))
+ 	*min_size
+ 	  = ROUND_DOWN (*min_size - size, (unsigned HOST_WIDE_INT)size);
+       else
+ 	*min_size = 0;
+ 
+       /* Our loops always round down the block size, but for dispatch to
+          library we need precise value.  */
+       if (dynamic_check)
+ 	*count = expand_simple_binop (GET_MODE (*count), AND, *count,
+ 				      GEN_INT (-size), *count, 1, OPTAB_DIRECT);
+     }
+   else
+     {
+       gcc_assert (prolog_size == 0);
+       /* Decrease count, so we won't end up copying last word twice.  */
+       if (!CONST_INT_P (*count))
+ 	*count = expand_simple_binop (GET_MODE (*count), PLUS, *count,
+ 				      constm1_rtx, *count, 1, OPTAB_DIRECT);
+       else
+ 	*count = GEN_INT (ROUND_DOWN (UINTVAL (*count) - 1,
+ 				      (unsigned HOST_WIDE_INT)size));
+       if (*min_size)
+ 	*min_size = ROUND_DOWN (*min_size - 1, (unsigned HOST_WIDE_INT)size);
+     }
+ }
+ 
+ 
+ /* This function is like the previous one, except here we know how many bytes
+    need to be copied.  That allows us to update alignment not only of DST, which
+    is returned, but also of SRC, which is passed as a pointer for that
+    reason.  */
+ static rtx
+ expand_set_or_cpymem_constant_prologue (rtx dst, rtx *srcp, rtx destreg,
+ 					   rtx srcreg, rtx value, rtx vec_value,
+ 					   int desired_align, int align_bytes,
+ 					   bool issetmem)
+ {
+   rtx src = NULL;
+   rtx orig_dst = dst;
+   rtx orig_src = NULL;
+   int piece_size = 1;
+   int copied_bytes = 0;
+ 
+   if (!issetmem)
+     {
+       gcc_assert (srcp != NULL);
+       src = *srcp;
+       orig_src = src;
+     }
+ 
+   for (piece_size = 1;
+        piece_size <= desired_align && copied_bytes < align_bytes;
+        piece_size <<= 1)
+     {
+       if (align_bytes & piece_size)
+ 	{
+ 	  if (issetmem)
+ 	    {
+ 	      if (vec_value && piece_size > GET_MODE_SIZE (GET_MODE (value)))
+ 		dst = emit_memset (dst, destreg, vec_value, piece_size);
+ 	      else
+ 		dst = emit_memset (dst, destreg, value, piece_size);
+ 	    }
+ 	  else
+ 	    dst = emit_memmov (dst, &src, destreg, srcreg, piece_size);
+ 	  copied_bytes += piece_size;
+ 	}
+     }
+   if (MEM_ALIGN (dst) < (unsigned int) desired_align * BITS_PER_UNIT)
+     set_mem_align (dst, desired_align * BITS_PER_UNIT);
+   if (MEM_SIZE_KNOWN_P (orig_dst))
+     set_mem_size (dst, MEM_SIZE (orig_dst) - align_bytes);
+ 
+   if (!issetmem)
+     {
+       int src_align_bytes = get_mem_align_offset (src, desired_align
+ 						       * BITS_PER_UNIT);
+       if (src_align_bytes >= 0)
+ 	src_align_bytes = desired_align - src_align_bytes;
+       if (src_align_bytes >= 0)
+ 	{
+ 	  unsigned int src_align;
+ 	  for (src_align = desired_align; src_align >= 2; src_align >>= 1)
+ 	    {
+ 	      if ((src_align_bytes & (src_align - 1))
+ 		   == (align_bytes & (src_align - 1)))
+ 		break;
+ 	    }
+ 	  if (src_align > (unsigned int) desired_align)
+ 	    src_align = desired_align;
+ 	  if (MEM_ALIGN (src) < src_align * BITS_PER_UNIT)
+ 	    set_mem_align (src, src_align * BITS_PER_UNIT);
+ 	}
+       if (MEM_SIZE_KNOWN_P (orig_src))
+ 	set_mem_size (src, MEM_SIZE (orig_src) - align_bytes);
+       *srcp = src;
+     }
+ 
+   return dst;
+ }
+ 
+ /* Return true if ALG can be used in current context.  
+    Assume we expand memset if MEMSET is true.  */
+ static bool
+ alg_usable_p (enum stringop_alg alg, bool memset, bool have_as)
+ {
+   if (alg == no_stringop)
+     return false;
+   if (alg == vector_loop)
+     return TARGET_SSE || TARGET_AVX;
+   /* Algorithms using the rep prefix want at least edi and ecx;
+      additionally, memset wants eax and memcpy wants esi.  Don't
+      consider such algorithms if the user has appropriated those
+      registers for their own purposes, or if we have a non-default
+      address space, since some string insns cannot override the segment.  */
+   if (alg == rep_prefix_1_byte
+       || alg == rep_prefix_4_byte
+       || alg == rep_prefix_8_byte)
+     {
+       if (have_as)
+ 	return false;
+       if (fixed_regs[CX_REG]
+ 	  || fixed_regs[DI_REG]
+ 	  || (memset ? fixed_regs[AX_REG] : fixed_regs[SI_REG]))
+ 	return false;
+     }
+   return true;
+ }
+ 
+ /* Given COUNT and EXPECTED_SIZE, decide on codegen of string operation.  */
+ static enum stringop_alg
+ decide_alg (HOST_WIDE_INT count, HOST_WIDE_INT expected_size,
+ 	    unsigned HOST_WIDE_INT min_size, unsigned HOST_WIDE_INT max_size,
+ 	    bool memset, bool zero_memset, bool have_as,
+ 	    int *dynamic_check, bool *noalign, bool recur)
+ {
+   const struct stringop_algs *algs;
+   bool optimize_for_speed;
+   int max = 0;
+   const struct processor_costs *cost;
+   int i;
+   bool any_alg_usable_p = false;
+ 
+   *noalign = false;
+   *dynamic_check = -1;
+ 
+   /* Even if the string operation call is cold, we still might spend a lot
+      of time processing large blocks.  */
+   if (optimize_function_for_size_p (cfun)
+       || (optimize_insn_for_size_p ()
+  	  && (max_size < 256
+               || (expected_size != -1 && expected_size < 256))))
+     optimize_for_speed = false;
+   else
+     optimize_for_speed = true;
+ 
+   cost = optimize_for_speed ? ix86_cost : &ix86_size_cost;
+   if (memset)
+     algs = &cost->memset[TARGET_64BIT != 0];
+   else
+     algs = &cost->memcpy[TARGET_64BIT != 0];
+ 
+   /* See maximal size for user defined algorithm.  */
+   for (i = 0; i < MAX_STRINGOP_ALGS; i++)
+     {
+       enum stringop_alg candidate = algs->size[i].alg;
+       bool usable = alg_usable_p (candidate, memset, have_as);
+       any_alg_usable_p |= usable;
+ 
+       if (candidate != libcall && candidate && usable)
+ 	max = algs->size[i].max;
+     }
+ 
+   /* If expected size is not known but max size is small enough
+      so inline version is a win, set expected size into
+      the range.  */
+   if (((max > 1 && (unsigned HOST_WIDE_INT) max >= max_size) || max == -1)
+       && expected_size == -1)
+     expected_size = min_size / 2 + max_size / 2;
+ 
+   /* If user specified the algorithm, honor it if possible.  */
+   if (ix86_stringop_alg != no_stringop
+       && alg_usable_p (ix86_stringop_alg, memset, have_as))
+     return ix86_stringop_alg;
+   /* rep; movq or rep; movl is the smallest variant.  */
+   else if (!optimize_for_speed)
+     {
+       *noalign = true;
+       if (!count || (count & 3) || (memset && !zero_memset))
+ 	return alg_usable_p (rep_prefix_1_byte, memset, have_as)
+ 	       ? rep_prefix_1_byte : loop_1_byte;
+       else
+ 	return alg_usable_p (rep_prefix_4_byte, memset, have_as)
+ 	       ? rep_prefix_4_byte : loop;
+     }
+   /* Very tiny blocks are best handled via the loop, REP is expensive to
+      setup.  */
+   else if (expected_size != -1 && expected_size < 4)
+     return loop_1_byte;
+   else if (expected_size != -1)
+     {
+       enum stringop_alg alg = libcall;
+       bool alg_noalign = false;
+       for (i = 0; i < MAX_STRINGOP_ALGS; i++)
+ 	{
+ 	  /* We get here if the algorithms that were not libcall-based
+ 	     were rep-prefix based and we are unable to use rep prefixes
+ 	     based on global register usage.  Break out of the loop and
+ 	     use the heuristic below.  */
+ 	  if (algs->size[i].max == 0)
+ 	    break;
+ 	  if (algs->size[i].max >= expected_size || algs->size[i].max == -1)
+ 	    {
+ 	      enum stringop_alg candidate = algs->size[i].alg;
+ 
+ 	      if (candidate != libcall
+ 		  && alg_usable_p (candidate, memset, have_as))
+ 		{
+ 		  alg = candidate;
+ 		  alg_noalign = algs->size[i].noalign;
+ 		}
+ 	      /* Honor TARGET_INLINE_ALL_STRINGOPS by picking
+ 		 last non-libcall inline algorithm.  */
+ 	      if (TARGET_INLINE_ALL_STRINGOPS)
+ 		{
+ 		  /* When the current size is best to be copied by a libcall,
+ 		     but we are still forced to inline, run the heuristic below
+ 		     that will pick code for medium sized blocks.  */
+ 		  if (alg != libcall)
+ 		    {
+ 		      *noalign = alg_noalign;
+ 		      return alg;
+ 		    }
+ 		  else if (!any_alg_usable_p)
+ 		    break;
+ 		}
+ 	      else if (alg_usable_p (candidate, memset, have_as))
+ 		{
+ 		  *noalign = algs->size[i].noalign;
+ 		  return candidate;
+ 		}
+ 	    }
+ 	}
+     }
+   /* When asked to inline the call anyway, try to pick meaningful choice.
+      We look for maximal size of block that is faster to copy by hand and
+      take blocks of at most of that size guessing that average size will
+      be roughly half of the block.
+ 
+      If this turns out to be bad, we might simply specify the preferred
+      choice in ix86_costs.  */
+   if ((TARGET_INLINE_ALL_STRINGOPS || TARGET_INLINE_STRINGOPS_DYNAMICALLY)
+       && (algs->unknown_size == libcall
+ 	  || !alg_usable_p (algs->unknown_size, memset, have_as)))
+     {
+       enum stringop_alg alg;
+       HOST_WIDE_INT new_expected_size = (max > 0 ? max : 4096) / 2;
+ 
+       /* If there aren't any usable algorithms or if recursing already,
+ 	 then recursing on smaller sizes or same size isn't going to
+ 	 find anything.  Just return the simple byte-at-a-time copy loop.  */
+       if (!any_alg_usable_p || recur)
+ 	{
+ 	  /* Pick something reasonable.  */
+ 	  if (TARGET_INLINE_STRINGOPS_DYNAMICALLY && !recur)
+ 	    *dynamic_check = 128;
+ 	  return loop_1_byte;
+ 	}
+       alg = decide_alg (count, new_expected_size, min_size, max_size, memset,
+ 			zero_memset, have_as, dynamic_check, noalign, true);
+       gcc_assert (*dynamic_check == -1);
+       if (TARGET_INLINE_STRINGOPS_DYNAMICALLY)
+ 	*dynamic_check = max;
+       else
+ 	gcc_assert (alg != libcall);
+       return alg;
+     }
+   return (alg_usable_p (algs->unknown_size, memset, have_as)
+ 	  ? algs->unknown_size : libcall);
+ }
+ 
+ /* Decide on alignment.  We know that the operand is already aligned to ALIGN
+    (ALIGN can be based on profile feedback and thus it is not 100% guaranteed).  */
+ static int
+ decide_alignment (int align,
+ 		  enum stringop_alg alg,
+ 		  int expected_size,
+ 		  machine_mode move_mode)
+ {
+   int desired_align = 0;
+ 
+   gcc_assert (alg != no_stringop);
+ 
+   if (alg == libcall)
+     return 0;
+   if (move_mode == VOIDmode)
+     return 0;
+ 
+   desired_align = GET_MODE_SIZE (move_mode);
+   /* PentiumPro has special logic triggering for 8 byte aligned blocks.
+      copying whole cacheline at once.  */
+   if (TARGET_PENTIUMPRO
+       && (alg == rep_prefix_4_byte || alg == rep_prefix_1_byte))
+     desired_align = 8;
+ 
+   if (optimize_size)
+     desired_align = 1;
+   if (desired_align < align)
+     desired_align = align;
+   if (expected_size != -1 && expected_size < 4)
+     desired_align = align;
+ 
+   return desired_align;
+ }
+ 
+ 
+ /* Helper function for memcpy.  For QImode value 0xXY produce
+    0xXYXYXYXY of wide specified by MODE.  This is essentially
+    a * 0x10101010, but we can do slightly better than
+    synth_mult by unwinding the sequence by hand on CPUs with
+    slow multiply.  */
+ static rtx
+ promote_duplicated_reg (machine_mode mode, rtx val)
+ {
+   machine_mode valmode = GET_MODE (val);
+   rtx tmp;
+   int nops = mode == DImode ? 3 : 2;
+ 
+   gcc_assert (mode == SImode || mode == DImode || val == const0_rtx);
+   if (val == const0_rtx)
+     return copy_to_mode_reg (mode, CONST0_RTX (mode));
+   if (CONST_INT_P (val))
+     {
+       HOST_WIDE_INT v = INTVAL (val) & 255;
+ 
+       v |= v << 8;
+       v |= v << 16;
+       if (mode == DImode)
+         v |= (v << 16) << 16;
+       return copy_to_mode_reg (mode, gen_int_mode (v, mode));
+     }
+ 
+   if (valmode == VOIDmode)
+     valmode = QImode;
+   if (valmode != QImode)
+     val = gen_lowpart (QImode, val);
+   if (mode == QImode)
+     return val;
+   if (!TARGET_PARTIAL_REG_STALL)
+     nops--;
+   if (ix86_cost->mult_init[mode == DImode ? 3 : 2]
+       + ix86_cost->mult_bit * (mode == DImode ? 8 : 4)
+       <= (ix86_cost->shift_const + ix86_cost->add) * nops
+           + (COSTS_N_INSNS (TARGET_PARTIAL_REG_STALL == 0)))
+     {
+       rtx reg = convert_modes (mode, QImode, val, true);
+       tmp = promote_duplicated_reg (mode, const1_rtx);
+       return expand_simple_binop (mode, MULT, reg, tmp, NULL, 1,
+ 				  OPTAB_DIRECT);
+     }
+   else
+     {
+       rtx reg = convert_modes (mode, QImode, val, true);
+ 
+       if (!TARGET_PARTIAL_REG_STALL)
+ 	if (mode == SImode)
+ 	  emit_insn (gen_insvsi_1 (reg, reg));
+ 	else
+ 	  emit_insn (gen_insvdi_1 (reg, reg));
+       else
+ 	{
+ 	  tmp = expand_simple_binop (mode, ASHIFT, reg, GEN_INT (8),
+ 				     NULL, 1, OPTAB_DIRECT);
+ 	  reg = expand_simple_binop (mode, IOR, reg, tmp, reg, 1,
+ 				     OPTAB_DIRECT);
+ 	}
+       tmp = expand_simple_binop (mode, ASHIFT, reg, GEN_INT (16),
+ 			         NULL, 1, OPTAB_DIRECT);
+       reg = expand_simple_binop (mode, IOR, reg, tmp, reg, 1, OPTAB_DIRECT);
+       if (mode == SImode)
+ 	return reg;
+       tmp = expand_simple_binop (mode, ASHIFT, reg, GEN_INT (32),
+ 				 NULL, 1, OPTAB_DIRECT);
+       reg = expand_simple_binop (mode, IOR, reg, tmp, reg, 1, OPTAB_DIRECT);
+       return reg;
+     }
+ }
+ 
+ /* Duplicate value VAL using promote_duplicated_reg into maximal size that will
+    be needed by main loop copying SIZE_NEEDED chunks and prologue getting
+    alignment from ALIGN to DESIRED_ALIGN.  */
+ static rtx
+ promote_duplicated_reg_to_size (rtx val, int size_needed, int desired_align,
+ 				int align)
+ {
+   rtx promoted_val;
+ 
+   if (TARGET_64BIT
+       && (size_needed > 4 || (desired_align > align && desired_align > 4)))
+     promoted_val = promote_duplicated_reg (DImode, val);
+   else if (size_needed > 2 || (desired_align > align && desired_align > 2))
+     promoted_val = promote_duplicated_reg (SImode, val);
+   else if (size_needed > 1 || (desired_align > align && desired_align > 1))
+     promoted_val = promote_duplicated_reg (HImode, val);
+   else
+     promoted_val = val;
+ 
+   return promoted_val;
+ }
+ 
+ /* Copy the address to a Pmode register.  This is used for x32 to
+    truncate DImode TLS address to a SImode register. */
+ 
+ static rtx
+ ix86_copy_addr_to_reg (rtx addr)
+ {
+   rtx reg;
+   if (GET_MODE (addr) == Pmode || GET_MODE (addr) == VOIDmode)
+     {
+       reg = copy_addr_to_reg (addr);
+       REG_POINTER (reg) = 1;
+       return reg;
+     }
+   else
+     {
+       gcc_assert (GET_MODE (addr) == DImode && Pmode == SImode);
+       reg = copy_to_mode_reg (DImode, addr);
+       REG_POINTER (reg) = 1;
+       return gen_rtx_SUBREG (SImode, reg, 0);
+     }
+ }
+ 
+ /* Expand string move (memcpy) ot store (memset) operation.  Use i386 string
+    operations when profitable.  The code depends upon architecture, block size
+    and alignment, but always has one of the following overall structures:
+ 
+    Aligned move sequence:
+ 
+      1) Prologue guard: Conditional that jumps up to epilogues for small
+ 	blocks that can be handled by epilogue alone.  This is faster
+ 	but also needed for correctness, since prologue assume the block
+ 	is larger than the desired alignment.
+ 
+ 	Optional dynamic check for size and libcall for large
+ 	blocks is emitted here too, with -minline-stringops-dynamically.
+ 
+      2) Prologue: copy first few bytes in order to get destination
+ 	aligned to DESIRED_ALIGN.  It is emitted only when ALIGN is less
+ 	than DESIRED_ALIGN and up to DESIRED_ALIGN - ALIGN bytes can be
+ 	copied.  We emit either a jump tree on power of two sized
+ 	blocks, or a byte loop.
+ 
+      3) Main body: the copying loop itself, copying in SIZE_NEEDED chunks
+ 	with specified algorithm.
+ 
+      4) Epilogue: code copying tail of the block that is too small to be
+ 	handled by main body (or up to size guarded by prologue guard). 
+ 
+   Misaligned move sequence
+ 
+      1) missaligned move prologue/epilogue containing:
+         a) Prologue handling small memory blocks and jumping to done_label
+ 	   (skipped if blocks are known to be large enough)
+ 	b) Signle move copying first DESIRED_ALIGN-ALIGN bytes if alignment is
+            needed by single possibly misaligned move
+ 	   (skipped if alignment is not needed)
+         c) Copy of last SIZE_NEEDED bytes by possibly misaligned moves
+ 
+      2) Zero size guard dispatching to done_label, if needed
+ 
+      3) dispatch to library call, if needed,
+ 
+      3) Main body: the copying loop itself, copying in SIZE_NEEDED chunks
+ 	with specified algorithm.  */
+ bool
+ ix86_expand_set_or_cpymem (rtx dst, rtx src, rtx count_exp, rtx val_exp,
+ 			   rtx align_exp, rtx expected_align_exp,
+ 			   rtx expected_size_exp, rtx min_size_exp,
+ 			   rtx max_size_exp, rtx probable_max_size_exp,
+ 			   bool issetmem)
+ {
+   rtx destreg;
+   rtx srcreg = NULL;
+   rtx_code_label *label = NULL;
+   rtx tmp;
+   rtx_code_label *jump_around_label = NULL;
+   HOST_WIDE_INT align = 1;
+   unsigned HOST_WIDE_INT count = 0;
+   HOST_WIDE_INT expected_size = -1;
+   int size_needed = 0, epilogue_size_needed;
+   int desired_align = 0, align_bytes = 0;
+   enum stringop_alg alg;
+   rtx promoted_val = NULL;
+   rtx vec_promoted_val = NULL;
+   bool force_loopy_epilogue = false;
+   int dynamic_check;
+   bool need_zero_guard = false;
+   bool noalign;
+   machine_mode move_mode = VOIDmode;
+   machine_mode wider_mode;
+   int unroll_factor = 1;
+   /* TODO: Once value ranges are available, fill in proper data.  */
+   unsigned HOST_WIDE_INT min_size = 0;
+   unsigned HOST_WIDE_INT max_size = -1;
+   unsigned HOST_WIDE_INT probable_max_size = -1;
+   bool misaligned_prologue_used = false;
+   bool have_as;
+ 
+   if (CONST_INT_P (align_exp))
+     align = INTVAL (align_exp);
+   /* i386 can do misaligned access on reasonably increased cost.  */
+   if (CONST_INT_P (expected_align_exp)
+       && INTVAL (expected_align_exp) > align)
+     align = INTVAL (expected_align_exp);
+   /* ALIGN is the minimum of destination and source alignment, but we care here
+      just about destination alignment.  */
+   else if (!issetmem
+ 	   && MEM_ALIGN (dst) > (unsigned HOST_WIDE_INT) align * BITS_PER_UNIT)
+     align = MEM_ALIGN (dst) / BITS_PER_UNIT;
+ 
+   if (CONST_INT_P (count_exp))
+     {
+       min_size = max_size = probable_max_size = count = expected_size
+ 	= INTVAL (count_exp);
+       /* When COUNT is 0, there is nothing to do.  */
+       if (!count)
+ 	return true;
+     }
+   else
+     {
+       if (min_size_exp)
+ 	min_size = INTVAL (min_size_exp);
+       if (max_size_exp)
+ 	max_size = INTVAL (max_size_exp);
+       if (probable_max_size_exp)
+ 	probable_max_size = INTVAL (probable_max_size_exp);
+       if (CONST_INT_P (expected_size_exp))
+ 	expected_size = INTVAL (expected_size_exp);
+      }
+ 
+   /* Make sure we don't need to care about overflow later on.  */
+   if (count > (HOST_WIDE_INT_1U << 30))
+     return false;
+ 
+   have_as = !ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (dst));
+   if (!issetmem)
+     have_as |= !ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (src));
+ 
+   /* Step 0: Decide on preferred algorithm, desired alignment and
+      size of chunks to be copied by main loop.  */
+   alg = decide_alg (count, expected_size, min_size, probable_max_size,
+ 		    issetmem,
+ 		    issetmem && val_exp == const0_rtx, have_as,
+ 		    &dynamic_check, &noalign, false);
+ 
+   if (dump_file)
+     fprintf (dump_file, "Selected stringop expansion strategy: %s\n",
+ 	     stringop_alg_names[alg]);
+ 
+   if (alg == libcall)
+     return false;
+   gcc_assert (alg != no_stringop);
+ 
+   /* For now vector-version of memset is generated only for memory zeroing, as
+      creating of promoted vector value is very cheap in this case.  */
+   if (issetmem && alg == vector_loop && val_exp != const0_rtx)
+     alg = unrolled_loop;
+ 
+   if (!count)
+     count_exp = copy_to_mode_reg (GET_MODE (count_exp), count_exp);
+   destreg = ix86_copy_addr_to_reg (XEXP (dst, 0));
+   if (!issetmem)
+     srcreg = ix86_copy_addr_to_reg (XEXP (src, 0));
+ 
+   unroll_factor = 1;
+   move_mode = word_mode;
+   switch (alg)
+     {
+     case libcall:
+     case no_stringop:
+     case last_alg:
+       gcc_unreachable ();
+     case loop_1_byte:
+       need_zero_guard = true;
+       move_mode = QImode;
+       break;
+     case loop:
+       need_zero_guard = true;
+       break;
+     case unrolled_loop:
+       need_zero_guard = true;
+       unroll_factor = (TARGET_64BIT ? 4 : 2);
+       break;
+     case vector_loop:
+       need_zero_guard = true;
+       unroll_factor = 4;
+       /* Find the widest supported mode.  */
+       move_mode = word_mode;
+       while (GET_MODE_WIDER_MODE (move_mode).exists (&wider_mode)
+ 	     && optab_handler (mov_optab, wider_mode) != CODE_FOR_nothing)
+ 	move_mode = wider_mode;
+ 
+       if (TARGET_AVX256_SPLIT_REGS && GET_MODE_BITSIZE (move_mode) > 128)
+ 	move_mode = TImode;
+ 
+       /* Find the corresponding vector mode with the same size as MOVE_MODE.
+ 	 MOVE_MODE is an integer mode at the moment (SI, DI, TI, etc.).  */
+       if (GET_MODE_SIZE (move_mode) > GET_MODE_SIZE (word_mode))
+ 	{
+ 	  int nunits = GET_MODE_SIZE (move_mode) / GET_MODE_SIZE (word_mode);
+ 	  if (!mode_for_vector (word_mode, nunits).exists (&move_mode)
+ 	      || optab_handler (mov_optab, move_mode) == CODE_FOR_nothing)
+ 	    move_mode = word_mode;
+ 	}
+       gcc_assert (optab_handler (mov_optab, move_mode) != CODE_FOR_nothing);
+       break;
+     case rep_prefix_8_byte:
+       move_mode = DImode;
+       break;
+     case rep_prefix_4_byte:
+       move_mode = SImode;
+       break;
+     case rep_prefix_1_byte:
+       move_mode = QImode;
+       break;
+     }
+   size_needed = GET_MODE_SIZE (move_mode) * unroll_factor;
+   epilogue_size_needed = size_needed;
+ 
+   /* If we are going to call any library calls conditionally, make sure any
+      pending stack adjustment happen before the first conditional branch,
+      otherwise they will be emitted before the library call only and won't
+      happen from the other branches.  */
+   if (dynamic_check != -1)
+     do_pending_stack_adjust ();
+ 
+   desired_align = decide_alignment (align, alg, expected_size, move_mode);
+   if (!TARGET_ALIGN_STRINGOPS || noalign)
+     align = desired_align;
+ 
+   /* Step 1: Prologue guard.  */
+ 
+   /* Alignment code needs count to be in register.  */
+   if (CONST_INT_P (count_exp) && desired_align > align)
+     {
+       if (INTVAL (count_exp) > desired_align
+ 	  && INTVAL (count_exp) > size_needed)
+ 	{
+ 	  align_bytes
+ 	    = get_mem_align_offset (dst, desired_align * BITS_PER_UNIT);
+ 	  if (align_bytes <= 0)
+ 	    align_bytes = 0;
+ 	  else
+ 	    align_bytes = desired_align - align_bytes;
+ 	}
+       if (align_bytes == 0)
+ 	count_exp = force_reg (counter_mode (count_exp), count_exp);
+     }
+   gcc_assert (desired_align >= 1 && align >= 1);
+ 
+   /* Misaligned move sequences handle both prologue and epilogue at once.
+      Default code generation results in a smaller code for large alignments
+      and also avoids redundant job when sizes are known precisely.  */
+   misaligned_prologue_used
+     = (TARGET_MISALIGNED_MOVE_STRING_PRO_EPILOGUES
+        && MAX (desired_align, epilogue_size_needed) <= 32
+        && desired_align <= epilogue_size_needed
+        && ((desired_align > align && !align_bytes)
+ 	   || (!count && epilogue_size_needed > 1)));
+ 
+   /* Do the cheap promotion to allow better CSE across the
+      main loop and epilogue (ie one load of the big constant in the
+      front of all code.  
+      For now the misaligned move sequences do not have fast path
+      without broadcasting.  */
+   if (issetmem && ((CONST_INT_P (val_exp) || misaligned_prologue_used)))
+     {
+       if (alg == vector_loop)
+ 	{
+ 	  gcc_assert (val_exp == const0_rtx);
+ 	  vec_promoted_val = promote_duplicated_reg (move_mode, val_exp);
+ 	  promoted_val = promote_duplicated_reg_to_size (val_exp,
+ 							 GET_MODE_SIZE (word_mode),
+ 							 desired_align, align);
+ 	}
+       else
+ 	{
+ 	  promoted_val = promote_duplicated_reg_to_size (val_exp, size_needed,
+ 							 desired_align, align);
+ 	}
+     }
+   /* Misaligned move sequences handles both prologues and epilogues at once.
+      Default code generation results in smaller code for large alignments and
+      also avoids redundant job when sizes are known precisely.  */
+   if (misaligned_prologue_used)
+     {
+       /* Misaligned move prologue handled small blocks by itself.  */
+       expand_set_or_cpymem_prologue_epilogue_by_misaligned_moves
+ 	   (dst, src, &destreg, &srcreg,
+ 	    move_mode, promoted_val, vec_promoted_val,
+ 	    &count_exp,
+ 	    &jump_around_label,
+             desired_align < align
+ 	    ? MAX (desired_align, epilogue_size_needed) : epilogue_size_needed,
+ 	    desired_align, align, &min_size, dynamic_check, issetmem);
+       if (!issetmem)
+         src = change_address (src, BLKmode, srcreg);
+       dst = change_address (dst, BLKmode, destreg);
+       set_mem_align (dst, desired_align * BITS_PER_UNIT);
+       epilogue_size_needed = 0;
+       if (need_zero_guard
+ 	  && min_size < (unsigned HOST_WIDE_INT) size_needed)
+ 	{
+ 	  /* It is possible that we copied enough so the main loop will not
+ 	     execute.  */
+ 	  gcc_assert (size_needed > 1);
+ 	  if (jump_around_label == NULL_RTX)
+ 	    jump_around_label = gen_label_rtx ();
+ 	  emit_cmp_and_jump_insns (count_exp,
+ 				   GEN_INT (size_needed),
+ 				   LTU, 0, counter_mode (count_exp), 1, jump_around_label);
+ 	  if (expected_size == -1
+ 	      || expected_size < (desired_align - align) / 2 + size_needed)
+ 	    predict_jump (REG_BR_PROB_BASE * 20 / 100);
+ 	  else
+ 	    predict_jump (REG_BR_PROB_BASE * 60 / 100);
+ 	}
+     }
+   /* Ensure that alignment prologue won't copy past end of block.  */
+   else if (size_needed > 1 || (desired_align > 1 && desired_align > align))
+     {
+       epilogue_size_needed = MAX (size_needed - 1, desired_align - align);
+       /* Epilogue always copies COUNT_EXP & EPILOGUE_SIZE_NEEDED bytes.
+ 	 Make sure it is power of 2.  */
+       epilogue_size_needed = 1 << (floor_log2 (epilogue_size_needed) + 1);
+ 
+       /* To improve performance of small blocks, we jump around the VAL
+ 	 promoting mode.  This mean that if the promoted VAL is not constant,
+ 	 we might not use it in the epilogue and have to use byte
+ 	 loop variant.  */
+       if (issetmem && epilogue_size_needed > 2 && !promoted_val)
+ 	force_loopy_epilogue = true;
+       if ((count && count < (unsigned HOST_WIDE_INT) epilogue_size_needed)
+ 	  || max_size < (unsigned HOST_WIDE_INT) epilogue_size_needed)
+ 	{
+ 	  /* If main algorithm works on QImode, no epilogue is needed.
+ 	     For small sizes just don't align anything.  */
+ 	  if (size_needed == 1)
+ 	    desired_align = align;
+ 	  else
+ 	    goto epilogue;
+ 	}
+       else if (!count
+ 	       && min_size < (unsigned HOST_WIDE_INT) epilogue_size_needed)
+ 	{
+ 	  label = gen_label_rtx ();
+ 	  emit_cmp_and_jump_insns (count_exp,
+ 				   GEN_INT (epilogue_size_needed),
+ 				   LTU, 0, counter_mode (count_exp), 1, label);
+ 	  if (expected_size == -1 || expected_size < epilogue_size_needed)
+ 	    predict_jump (REG_BR_PROB_BASE * 60 / 100);
+ 	  else
+ 	    predict_jump (REG_BR_PROB_BASE * 20 / 100);
+ 	}
+     }
+ 
+   /* Emit code to decide on runtime whether library call or inline should be
+      used.  */
+   if (dynamic_check != -1)
+     {
+       if (!issetmem && CONST_INT_P (count_exp))
+ 	{
+ 	  if (UINTVAL (count_exp) >= (unsigned HOST_WIDE_INT)dynamic_check)
+ 	    {
+ 	      emit_block_copy_via_libcall (dst, src, count_exp);
+ 	      count_exp = const0_rtx;
+ 	      goto epilogue;
+ 	    }
+ 	}
+       else
+ 	{
+ 	  rtx_code_label *hot_label = gen_label_rtx ();
+ 	  if (jump_around_label == NULL_RTX)
+ 	    jump_around_label = gen_label_rtx ();
+ 	  emit_cmp_and_jump_insns (count_exp, GEN_INT (dynamic_check - 1),
+ 				   LEU, 0, counter_mode (count_exp),
+ 				   1, hot_label);
+ 	  predict_jump (REG_BR_PROB_BASE * 90 / 100);
+ 	  if (issetmem)
+ 	    set_storage_via_libcall (dst, count_exp, val_exp);
+ 	  else
+ 	    emit_block_copy_via_libcall (dst, src, count_exp);
+ 	  emit_jump (jump_around_label);
+ 	  emit_label (hot_label);
+ 	}
+     }
+ 
+   /* Step 2: Alignment prologue.  */
+   /* Do the expensive promotion once we branched off the small blocks.  */
+   if (issetmem && !promoted_val)
+     promoted_val = promote_duplicated_reg_to_size (val_exp, size_needed,
+ 						   desired_align, align);
+ 
+   if (desired_align > align && !misaligned_prologue_used)
+     {
+       if (align_bytes == 0)
+ 	{
+ 	  /* Except for the first move in prologue, we no longer know
+ 	     constant offset in aliasing info.  It don't seems to worth
+ 	     the pain to maintain it for the first move, so throw away
+ 	     the info early.  */
+ 	  dst = change_address (dst, BLKmode, destreg);
+ 	  if (!issetmem)
+ 	    src = change_address (src, BLKmode, srcreg);
+ 	  dst = expand_set_or_cpymem_prologue (dst, src, destreg, srcreg,
+ 					    promoted_val, vec_promoted_val,
+ 					    count_exp, align, desired_align,
+ 					    issetmem);
+ 	  /* At most desired_align - align bytes are copied.  */
+ 	  if (min_size < (unsigned)(desired_align - align))
+ 	    min_size = 0;
+ 	  else
+ 	    min_size -= desired_align - align;
+ 	}
+       else
+ 	{
+ 	  /* If we know how many bytes need to be stored before dst is
+ 	     sufficiently aligned, maintain aliasing info accurately.  */
+ 	  dst = expand_set_or_cpymem_constant_prologue (dst, &src, destreg,
+ 							   srcreg,
+ 							   promoted_val,
+ 							   vec_promoted_val,
+ 							   desired_align,
+ 							   align_bytes,
+ 							   issetmem);
+ 
+ 	  count_exp = plus_constant (counter_mode (count_exp),
+ 				     count_exp, -align_bytes);
+ 	  count -= align_bytes;
+ 	  min_size -= align_bytes;
+ 	  max_size -= align_bytes;
+ 	}
+       if (need_zero_guard
+ 	  && min_size < (unsigned HOST_WIDE_INT) size_needed
+ 	  && (count < (unsigned HOST_WIDE_INT) size_needed
+ 	      || (align_bytes == 0
+ 		  && count < ((unsigned HOST_WIDE_INT) size_needed
+ 			      + desired_align - align))))
+ 	{
+ 	  /* It is possible that we copied enough so the main loop will not
+ 	     execute.  */
+ 	  gcc_assert (size_needed > 1);
+ 	  if (label == NULL_RTX)
+ 	    label = gen_label_rtx ();
+ 	  emit_cmp_and_jump_insns (count_exp,
+ 				   GEN_INT (size_needed),
+ 				   LTU, 0, counter_mode (count_exp), 1, label);
+ 	  if (expected_size == -1
+ 	      || expected_size < (desired_align - align) / 2 + size_needed)
+ 	    predict_jump (REG_BR_PROB_BASE * 20 / 100);
+ 	  else
+ 	    predict_jump (REG_BR_PROB_BASE * 60 / 100);
+ 	}
+     }
+   if (label && size_needed == 1)
+     {
+       emit_label (label);
+       LABEL_NUSES (label) = 1;
+       label = NULL;
+       epilogue_size_needed = 1;
+       if (issetmem)
+ 	promoted_val = val_exp;
+     }
+   else if (label == NULL_RTX && !misaligned_prologue_used)
+     epilogue_size_needed = size_needed;
+ 
+   /* Step 3: Main loop.  */
+ 
+   switch (alg)
+     {
+     case libcall:
+     case no_stringop:
+     case last_alg:
+       gcc_unreachable ();
+     case loop_1_byte:
+     case loop:
+     case unrolled_loop:
+       expand_set_or_cpymem_via_loop (dst, src, destreg, srcreg, promoted_val,
+ 				     count_exp, move_mode, unroll_factor,
+ 				     expected_size, issetmem);
+       break;
+     case vector_loop:
+       expand_set_or_cpymem_via_loop (dst, src, destreg, srcreg,
+ 				     vec_promoted_val, count_exp, move_mode,
+ 				     unroll_factor, expected_size, issetmem);
+       break;
+     case rep_prefix_8_byte:
+     case rep_prefix_4_byte:
+     case rep_prefix_1_byte:
+       expand_set_or_cpymem_via_rep (dst, src, destreg, srcreg, promoted_val,
+ 				       val_exp, count_exp, move_mode, issetmem);
+       break;
+     }
+   /* Adjust properly the offset of src and dest memory for aliasing.  */
+   if (CONST_INT_P (count_exp))
+     {
+       if (!issetmem)
+ 	src = adjust_automodify_address_nv (src, BLKmode, srcreg,
+ 					    (count / size_needed) * size_needed);
+       dst = adjust_automodify_address_nv (dst, BLKmode, destreg,
+ 					  (count / size_needed) * size_needed);
+     }
+   else
+     {
+       if (!issetmem)
+ 	src = change_address (src, BLKmode, srcreg);
+       dst = change_address (dst, BLKmode, destreg);
+     }
+ 
+   /* Step 4: Epilogue to copy the remaining bytes.  */
+  epilogue:
+   if (label)
+     {
+       /* When the main loop is done, COUNT_EXP might hold original count,
+ 	 while we want to copy only COUNT_EXP & SIZE_NEEDED bytes.
+ 	 Epilogue code will actually copy COUNT_EXP & EPILOGUE_SIZE_NEEDED
+ 	 bytes. Compensate if needed.  */
+ 
+       if (size_needed < epilogue_size_needed)
+ 	{
+ 	  tmp = expand_simple_binop (counter_mode (count_exp), AND, count_exp,
+ 				     GEN_INT (size_needed - 1), count_exp, 1,
+ 				     OPTAB_DIRECT);
+ 	  if (tmp != count_exp)
+ 	    emit_move_insn (count_exp, tmp);
+ 	}
+       emit_label (label);
+       LABEL_NUSES (label) = 1;
+     }
+ 
+   if (count_exp != const0_rtx && epilogue_size_needed > 1)
+     {
+       if (force_loopy_epilogue)
+ 	expand_setmem_epilogue_via_loop (dst, destreg, val_exp, count_exp,
+ 					 epilogue_size_needed);
+       else
+ 	{
+ 	  if (issetmem)
+ 	    expand_setmem_epilogue (dst, destreg, promoted_val,
+ 				    vec_promoted_val, count_exp,
+ 				    epilogue_size_needed);
+ 	  else
+ 	    expand_cpymem_epilogue (dst, src, destreg, srcreg, count_exp,
+ 				    epilogue_size_needed);
+ 	}
+     }
+   if (jump_around_label)
+     emit_label (jump_around_label);
+   return true;
+ }
+ 
+ 
+ /* Expand the appropriate insns for doing strlen if not just doing
+    repnz; scasb
+ 
+    out = result, initialized with the start address
+    align_rtx = alignment of the address.
+    scratch = scratch register, initialized with the startaddress when
+ 	not aligned, otherwise undefined
+ 
+    This is just the body. It needs the initializations mentioned above and
+    some address computing at the end.  These things are done in i386.md.  */
+ 
+ static void
+ ix86_expand_strlensi_unroll_1 (rtx out, rtx src, rtx align_rtx)
+ {
+   int align;
+   rtx tmp;
+   rtx_code_label *align_2_label = NULL;
+   rtx_code_label *align_3_label = NULL;
+   rtx_code_label *align_4_label = gen_label_rtx ();
+   rtx_code_label *end_0_label = gen_label_rtx ();
+   rtx mem;
+   rtx tmpreg = gen_reg_rtx (SImode);
+   rtx scratch = gen_reg_rtx (SImode);
+   rtx cmp;
+ 
+   align = 0;
+   if (CONST_INT_P (align_rtx))
+     align = INTVAL (align_rtx);
+ 
+   /* Loop to check 1..3 bytes for null to get an aligned pointer.  */
+ 
+   /* Is there a known alignment and is it less than 4?  */
+   if (align < 4)
+     {
+       rtx scratch1 = gen_reg_rtx (Pmode);
+       emit_move_insn (scratch1, out);
+       /* Is there a known alignment and is it not 2? */
+       if (align != 2)
+ 	{
+ 	  align_3_label = gen_label_rtx (); /* Label when aligned to 3-byte */
+ 	  align_2_label = gen_label_rtx (); /* Label when aligned to 2-byte */
+ 
+ 	  /* Leave just the 3 lower bits.  */
+ 	  align_rtx = expand_binop (Pmode, and_optab, scratch1, GEN_INT (3),
+ 				    NULL_RTX, 0, OPTAB_WIDEN);
+ 
+ 	  emit_cmp_and_jump_insns (align_rtx, const0_rtx, EQ, NULL,
+ 				   Pmode, 1, align_4_label);
+ 	  emit_cmp_and_jump_insns (align_rtx, const2_rtx, EQ, NULL,
+ 				   Pmode, 1, align_2_label);
+ 	  emit_cmp_and_jump_insns (align_rtx, const2_rtx, GTU, NULL,
+ 				   Pmode, 1, align_3_label);
+ 	}
+       else
+         {
+ 	  /* Since the alignment is 2, we have to check 2 or 0 bytes;
+ 	     check if is aligned to 4 - byte.  */
+ 
+ 	  align_rtx = expand_binop (Pmode, and_optab, scratch1, const2_rtx,
+ 				    NULL_RTX, 0, OPTAB_WIDEN);
+ 
+ 	  emit_cmp_and_jump_insns (align_rtx, const0_rtx, EQ, NULL,
+ 				   Pmode, 1, align_4_label);
+         }
+ 
+       mem = change_address (src, QImode, out);
+ 
+       /* Now compare the bytes.  */
+ 
+       /* Compare the first n unaligned byte on a byte per byte basis.  */
+       emit_cmp_and_jump_insns (mem, const0_rtx, EQ, NULL,
+ 			       QImode, 1, end_0_label);
+ 
+       /* Increment the address.  */
+       emit_insn (gen_add2_insn (out, const1_rtx));
+ 
+       /* Not needed with an alignment of 2 */
+       if (align != 2)
+ 	{
+ 	  emit_label (align_2_label);
+ 
+ 	  emit_cmp_and_jump_insns (mem, const0_rtx, EQ, NULL, QImode, 1,
+ 				   end_0_label);
+ 
+ 	  emit_insn (gen_add2_insn (out, const1_rtx));
+ 
+ 	  emit_label (align_3_label);
+ 	}
+ 
+       emit_cmp_and_jump_insns (mem, const0_rtx, EQ, NULL, QImode, 1,
+ 			       end_0_label);
+ 
+       emit_insn (gen_add2_insn (out, const1_rtx));
+     }
+ 
+   /* Generate loop to check 4 bytes at a time.  It is not a good idea to
+      align this loop.  It gives only huge programs, but does not help to
+      speed up.  */
+   emit_label (align_4_label);
+ 
+   mem = change_address (src, SImode, out);
+   emit_move_insn (scratch, mem);
+   emit_insn (gen_add2_insn (out, GEN_INT (4)));
+ 
+   /* This formula yields a nonzero result iff one of the bytes is zero.
+      This saves three branches inside loop and many cycles.  */
+ 
+   emit_insn (gen_addsi3 (tmpreg, scratch, GEN_INT (-0x01010101)));
+   emit_insn (gen_one_cmplsi2 (scratch, scratch));
+   emit_insn (gen_andsi3 (tmpreg, tmpreg, scratch));
+   emit_insn (gen_andsi3 (tmpreg, tmpreg,
+ 			 gen_int_mode (0x80808080, SImode)));
+   emit_cmp_and_jump_insns (tmpreg, const0_rtx, EQ, 0, SImode, 1,
+ 			   align_4_label);
+ 
+   if (TARGET_CMOVE)
+     {
+        rtx reg = gen_reg_rtx (SImode);
+        rtx reg2 = gen_reg_rtx (Pmode);
+        emit_move_insn (reg, tmpreg);
+        emit_insn (gen_lshrsi3 (reg, reg, GEN_INT (16)));
+ 
+        /* If zero is not in the first two bytes, move two bytes forward.  */
+        emit_insn (gen_testsi_ccno_1 (tmpreg, GEN_INT (0x8080)));
+        tmp = gen_rtx_REG (CCNOmode, FLAGS_REG);
+        tmp = gen_rtx_EQ (VOIDmode, tmp, const0_rtx);
+        emit_insn (gen_rtx_SET (tmpreg,
+ 			       gen_rtx_IF_THEN_ELSE (SImode, tmp,
+ 						     reg,
+ 						     tmpreg)));
+        /* Emit lea manually to avoid clobbering of flags.  */
+        emit_insn (gen_rtx_SET (reg2, gen_rtx_PLUS (Pmode, out, const2_rtx)));
+ 
+        tmp = gen_rtx_REG (CCNOmode, FLAGS_REG);
+        tmp = gen_rtx_EQ (VOIDmode, tmp, const0_rtx);
+        emit_insn (gen_rtx_SET (out,
+ 			       gen_rtx_IF_THEN_ELSE (Pmode, tmp,
+ 						     reg2,
+ 						     out)));
+     }
+   else
+     {
+        rtx_code_label *end_2_label = gen_label_rtx ();
+        /* Is zero in the first two bytes? */
+ 
+        emit_insn (gen_testsi_ccno_1 (tmpreg, GEN_INT (0x8080)));
+        tmp = gen_rtx_REG (CCNOmode, FLAGS_REG);
+        tmp = gen_rtx_NE (VOIDmode, tmp, const0_rtx);
+        tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp,
+                             gen_rtx_LABEL_REF (VOIDmode, end_2_label),
+                             pc_rtx);
+        tmp = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
+        JUMP_LABEL (tmp) = end_2_label;
+ 
+        /* Not in the first two.  Move two bytes forward.  */
+        emit_insn (gen_lshrsi3 (tmpreg, tmpreg, GEN_INT (16)));
+        emit_insn (gen_add2_insn (out, const2_rtx));
+ 
+        emit_label (end_2_label);
+ 
+     }
+ 
+   /* Avoid branch in fixing the byte.  */
+   tmpreg = gen_lowpart (QImode, tmpreg);
+   emit_insn (gen_addqi3_cconly_overflow (tmpreg, tmpreg));
+   tmp = gen_rtx_REG (CCmode, FLAGS_REG);
+   cmp = gen_rtx_LTU (VOIDmode, tmp, const0_rtx);
+   emit_insn (gen_sub3_carry (Pmode, out, out, GEN_INT (3), tmp, cmp));
+ 
+   emit_label (end_0_label);
+ }
+ 
+ /* Expand strlen.  */
+ 
+ bool
+ ix86_expand_strlen (rtx out, rtx src, rtx eoschar, rtx align)
+ {
+ if (TARGET_UNROLL_STRLEN
+ 	   && TARGET_INLINE_ALL_STRINGOPS
+ 	   && eoschar == const0_rtx
+ 	   && optimize > 1)
+     {
+       /* The generic case of strlen expander is long.  Avoid it's
+ 	 expanding unless TARGET_INLINE_ALL_STRINGOPS.  */
+       rtx addr = force_reg (Pmode, XEXP (src, 0));
+       /* Well it seems that some optimizer does not combine a call like
+ 	 foo(strlen(bar), strlen(bar));
+ 	 when the move and the subtraction is done here.  It does calculate
+ 	 the length just once when these instructions are done inside of
+ 	 output_strlen_unroll().  But I think since &bar[strlen(bar)] is
+ 	 often used and I use one fewer register for the lifetime of
+ 	 output_strlen_unroll() this is better.  */
+ 
+       emit_move_insn (out, addr);
+ 
+       ix86_expand_strlensi_unroll_1 (out, src, align);
+ 
+       /* strlensi_unroll_1 returns the address of the zero at the end of
+ 	 the string, like memchr(), so compute the length by subtracting
+ 	 the start address.  */
+       emit_insn (gen_sub2_insn (out, addr));
+       return true;
+     }
+   else
+     return false;
+ }
+ 
+ /* For given symbol (function) construct code to compute address of it's PLT
+    entry in large x86-64 PIC model.  */
+ 
+ static rtx
+ construct_plt_address (rtx symbol)
+ {
+   rtx tmp, unspec;
+ 
+   gcc_assert (GET_CODE (symbol) == SYMBOL_REF);
+   gcc_assert (ix86_cmodel == CM_LARGE_PIC && !TARGET_PECOFF);
+   gcc_assert (Pmode == DImode);
+ 
+   tmp = gen_reg_rtx (Pmode);
+   unspec = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, symbol), UNSPEC_PLTOFF);
+ 
+   emit_move_insn (tmp, gen_rtx_CONST (Pmode, unspec));
+   emit_insn (gen_add2_insn (tmp, pic_offset_table_rtx));
+   return tmp;
+ }
+ 
+ /* Additional registers that are clobbered by SYSV calls.  */
+ 
+ static int const x86_64_ms_sysv_extra_clobbered_registers
+ 		 [NUM_X86_64_MS_CLOBBERED_REGS] =
+ {
+   SI_REG, DI_REG,
+   XMM6_REG, XMM7_REG,
+   XMM8_REG, XMM9_REG, XMM10_REG, XMM11_REG,
+   XMM12_REG, XMM13_REG, XMM14_REG, XMM15_REG
+ };
+ 
+ rtx_insn *
+ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1,
+ 		  rtx callarg2,
+ 		  rtx pop, bool sibcall)
+ {
+   rtx vec[3];
+   rtx use = NULL, call;
+   unsigned int vec_len = 0;
+   tree fndecl;
+ 
+   if (GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF)
+     {
+       fndecl = SYMBOL_REF_DECL (XEXP (fnaddr, 0));
+       if (fndecl
+ 	  && (lookup_attribute ("interrupt",
+ 				TYPE_ATTRIBUTES (TREE_TYPE (fndecl)))))
+ 	error ("interrupt service routine cannot be called directly");
+     }
+   else
+     fndecl = NULL_TREE;
+ 
+   if (pop == const0_rtx)
+     pop = NULL;
+   gcc_assert (!TARGET_64BIT || !pop);
+ 
+   if (TARGET_MACHO && !TARGET_64BIT)
+     {
+ #if TARGET_MACHO
+       if (flag_pic && GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF)
+ 	fnaddr = machopic_indirect_call_target (fnaddr);
+ #endif
+     }
+   else
+     {
+       /* Static functions and indirect calls don't need the pic register.  Also,
+ 	 check if PLT was explicitly avoided via no-plt or "noplt" attribute, making
+ 	 it an indirect call.  */
+       rtx addr = XEXP (fnaddr, 0);
+       if (flag_pic
+ 	  && GET_CODE (addr) == SYMBOL_REF
+ 	  && !SYMBOL_REF_LOCAL_P (addr))
+ 	{
+ 	  if (flag_plt
+ 	      && (SYMBOL_REF_DECL (addr) == NULL_TREE
+ 		  || !lookup_attribute ("noplt",
+ 					DECL_ATTRIBUTES (SYMBOL_REF_DECL (addr)))))
+ 	    {
+ 	      if (!TARGET_64BIT
+ 		  || (ix86_cmodel == CM_LARGE_PIC
+ 		      && DEFAULT_ABI != MS_ABI))
+ 		{
+ 		  use_reg (&use, gen_rtx_REG (Pmode,
+ 					      REAL_PIC_OFFSET_TABLE_REGNUM));
+ 		  if (ix86_use_pseudo_pic_reg ())
+ 		    emit_move_insn (gen_rtx_REG (Pmode,
+ 						 REAL_PIC_OFFSET_TABLE_REGNUM),
+ 				    pic_offset_table_rtx);
+ 		}
+ 	    }
+ 	  else if (!TARGET_PECOFF && !TARGET_MACHO)
+ 	    {
+ 	      if (TARGET_64BIT)
+ 		{
+ 		  fnaddr = gen_rtx_UNSPEC (Pmode,
+ 					   gen_rtvec (1, addr),
+ 					   UNSPEC_GOTPCREL);
+ 		  fnaddr = gen_rtx_CONST (Pmode, fnaddr);
+ 		}
+ 	      else
+ 		{
+ 		  fnaddr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
+ 					   UNSPEC_GOT);
+ 		  fnaddr = gen_rtx_CONST (Pmode, fnaddr);
+ 		  fnaddr = gen_rtx_PLUS (Pmode, pic_offset_table_rtx,
+ 					 fnaddr);
+ 		}
+ 	      fnaddr = gen_const_mem (Pmode, fnaddr);
+ 	      /* Pmode may not be the same as word_mode for x32, which
+ 		 doesn't support indirect branch via 32-bit memory slot.
+ 		 Since x32 GOT slot is 64 bit with zero upper 32 bits,
+ 		 indirect branch via x32 GOT slot is OK.  */
+ 	      if (GET_MODE (fnaddr) != word_mode)
+ 		fnaddr = gen_rtx_ZERO_EXTEND (word_mode, fnaddr);
+ 	      fnaddr = gen_rtx_MEM (QImode, fnaddr);
+ 	    }
+ 	}
+     }
+ 
+   /* Skip setting up RAX register for -mskip-rax-setup when there are no
+      parameters passed in vector registers.  */
+   if (TARGET_64BIT
+       && (INTVAL (callarg2) > 0
+ 	  || (INTVAL (callarg2) == 0
+ 	      && (TARGET_SSE || !flag_skip_rax_setup))))
+     {
+       rtx al = gen_rtx_REG (QImode, AX_REG);
+       emit_move_insn (al, callarg2);
+       use_reg (&use, al);
+     }
+ 
+   if (ix86_cmodel == CM_LARGE_PIC
+       && !TARGET_PECOFF
+       && MEM_P (fnaddr)
+       && GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF
+       && !local_symbolic_operand (XEXP (fnaddr, 0), VOIDmode))
+     fnaddr = gen_rtx_MEM (QImode, construct_plt_address (XEXP (fnaddr, 0)));
+   /* Since x32 GOT slot is 64 bit with zero upper 32 bits, indirect
+      branch via x32 GOT slot is OK.  */
+   else if (!(TARGET_X32
+ 	     && MEM_P (fnaddr)
+ 	     && GET_CODE (XEXP (fnaddr, 0)) == ZERO_EXTEND
+ 	     && GOT_memory_operand (XEXP (XEXP (fnaddr, 0), 0), Pmode))
+ 	   && (sibcall
+ 	       ? !sibcall_insn_operand (XEXP (fnaddr, 0), word_mode)
+ 	       : !call_insn_operand (XEXP (fnaddr, 0), word_mode)))
+     {
+       fnaddr = convert_to_mode (word_mode, XEXP (fnaddr, 0), 1);
+       fnaddr = gen_rtx_MEM (QImode, copy_to_mode_reg (word_mode, fnaddr));
+     }
+ 
+   call = gen_rtx_CALL (VOIDmode, fnaddr, callarg1);
+ 
+   if (retval)
+     call = gen_rtx_SET (retval, call);
+   vec[vec_len++] = call;
+ 
+   if (pop)
+     {
+       pop = gen_rtx_PLUS (Pmode, stack_pointer_rtx, pop);
+       pop = gen_rtx_SET (stack_pointer_rtx, pop);
+       vec[vec_len++] = pop;
+     }
+ 
+   if (cfun->machine->no_caller_saved_registers
+       && (!fndecl
+ 	  || (!TREE_THIS_VOLATILE (fndecl)
+ 	      && !lookup_attribute ("no_caller_saved_registers",
+ 				    TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))))
+     {
+       static const char ix86_call_used_regs[] = CALL_USED_REGISTERS;
+       bool is_64bit_ms_abi = (TARGET_64BIT
+ 			      && ix86_function_abi (fndecl) == MS_ABI);
+       char c_mask = CALL_USED_REGISTERS_MASK (is_64bit_ms_abi);
+ 
+       /* If there are no caller-saved registers, add all registers
+ 	 that are clobbered by the call which returns.  */
+       for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+ 	if (!fixed_regs[i]
+ 	    && (ix86_call_used_regs[i] == 1
+ 		|| (ix86_call_used_regs[i] & c_mask))
+ 	    && !STACK_REGNO_P (i)
+ 	    && !MMX_REGNO_P (i))
+ 	  clobber_reg (&use,
+ 		       gen_rtx_REG (GET_MODE (regno_reg_rtx[i]), i));
+     }
+   else if (TARGET_64BIT_MS_ABI
+ 	   && (!callarg2 || INTVAL (callarg2) != -2))
+     {
+       unsigned i;
+ 
+       for (i = 0; i < NUM_X86_64_MS_CLOBBERED_REGS; i++)
+ 	{
+ 	  int regno = x86_64_ms_sysv_extra_clobbered_registers[i];
+ 	  machine_mode mode = SSE_REGNO_P (regno) ? TImode : DImode;
+ 
+ 	  clobber_reg (&use, gen_rtx_REG (mode, regno));
+ 	}
+ 
+       /* Set here, but it may get cleared later.  */
+       if (TARGET_CALL_MS2SYSV_XLOGUES)
+ 	{
+ 	  if (!TARGET_SSE)
+ 	    ;
+ 
+ 	  /* Don't break hot-patched functions.  */
+ 	  else if (ix86_function_ms_hook_prologue (current_function_decl))
+ 	    ;
+ 
+ 	  /* TODO: Cases not yet examined.  */
+ 	  else if (flag_split_stack)
+ 	    warn_once_call_ms2sysv_xlogues ("-fsplit-stack");
+ 
+ 	  else
+ 	    {
+ 	      gcc_assert (!reload_completed);
+ 	      cfun->machine->call_ms2sysv = true;
+ 	    }
+ 	}
+     }
+ 
+   if (vec_len > 1)
+     call = gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (vec_len, vec));
+   rtx_insn *call_insn = emit_call_insn (call);
+   if (use)
+     CALL_INSN_FUNCTION_USAGE (call_insn) = use;
+ 
+   return call_insn;
+ }
+ 
+ /* Split simple return with popping POPC bytes from stack to indirect
+    branch with stack adjustment .  */
+ 
+ void
+ ix86_split_simple_return_pop_internal (rtx popc)
+ {
+   struct machine_function *m = cfun->machine;
+   rtx ecx = gen_rtx_REG (SImode, CX_REG);
+   rtx_insn *insn;
+ 
+   /* There is no "pascal" calling convention in any 64bit ABI.  */
+   gcc_assert (!TARGET_64BIT);
+ 
+   insn = emit_insn (gen_pop (ecx));
+   m->fs.cfa_offset -= UNITS_PER_WORD;
+   m->fs.sp_offset -= UNITS_PER_WORD;
+ 
+   rtx x = plus_constant (Pmode, stack_pointer_rtx, UNITS_PER_WORD);
+   x = gen_rtx_SET (stack_pointer_rtx, x);
+   add_reg_note (insn, REG_CFA_ADJUST_CFA, x);
+   add_reg_note (insn, REG_CFA_REGISTER, gen_rtx_SET (ecx, pc_rtx));
+   RTX_FRAME_RELATED_P (insn) = 1;
+ 
+   x = gen_rtx_PLUS (Pmode, stack_pointer_rtx, popc);
+   x = gen_rtx_SET (stack_pointer_rtx, x);
+   insn = emit_insn (x);
+   add_reg_note (insn, REG_CFA_ADJUST_CFA, x);
+   RTX_FRAME_RELATED_P (insn) = 1;
+ 
+   /* Now return address is in ECX.  */
+   emit_jump_insn (gen_simple_return_indirect_internal (ecx));
+ }
+ 
+ /* Errors in the source file can cause expand_expr to return const0_rtx
+    where we expect a vector.  To avoid crashing, use one of the vector
+    clear instructions.  */
+ 
+ static rtx
+ safe_vector_operand (rtx x, machine_mode mode)
+ {
+   if (x == const0_rtx)
+     x = CONST0_RTX (mode);
+   return x;
+ }
+ 
+ /* Subroutine of ix86_expand_builtin to take care of binop insns.  */
+ 
+ static rtx
+ ix86_expand_binop_builtin (enum insn_code icode, tree exp, rtx target)
+ {
+   rtx pat;
+   tree arg0 = CALL_EXPR_ARG (exp, 0);
+   tree arg1 = CALL_EXPR_ARG (exp, 1);
+   rtx op0 = expand_normal (arg0);
+   rtx op1 = expand_normal (arg1);
+   machine_mode tmode = insn_data[icode].operand[0].mode;
+   machine_mode mode0 = insn_data[icode].operand[1].mode;
+   machine_mode mode1 = insn_data[icode].operand[2].mode;
+ 
+   if (VECTOR_MODE_P (mode0))
+     op0 = safe_vector_operand (op0, mode0);
+   if (VECTOR_MODE_P (mode1))
+     op1 = safe_vector_operand (op1, mode1);
+ 
+   if (optimize || !target
+       || GET_MODE (target) != tmode
+       || !insn_data[icode].operand[0].predicate (target, tmode))
+     target = gen_reg_rtx (tmode);
+ 
+   if (GET_MODE (op1) == SImode && mode1 == TImode)
+     {
+       rtx x = gen_reg_rtx (V4SImode);
+       emit_insn (gen_sse2_loadd (x, op1));
+       op1 = gen_lowpart (TImode, x);
+     }
+ 
+   if (!insn_data[icode].operand[1].predicate (op0, mode0))
+     op0 = copy_to_mode_reg (mode0, op0);
+   if (!insn_data[icode].operand[2].predicate (op1, mode1))
+     op1 = copy_to_mode_reg (mode1, op1);
+ 
+   pat = GEN_FCN (icode) (target, op0, op1);
+   if (! pat)
+     return 0;
+ 
+   emit_insn (pat);
+ 
+   return target;
+ }
+ 
+ /* Subroutine of ix86_expand_builtin to take care of 2-4 argument insns.  */
+ 
+ static rtx
+ ix86_expand_multi_arg_builtin (enum insn_code icode, tree exp, rtx target,
+ 			       enum ix86_builtin_func_type m_type,
+ 			       enum rtx_code sub_code)
+ {
+   rtx pat;
+   int i;
+   int nargs;
+   bool comparison_p = false;
+   bool tf_p = false;
+   bool last_arg_constant = false;
+   int num_memory = 0;
+   struct {
+     rtx op;
+     machine_mode mode;
+   } args[4];
+ 
+   machine_mode tmode = insn_data[icode].operand[0].mode;
+ 
+   switch (m_type)
+     {
+     case MULTI_ARG_4_DF2_DI_I:
+     case MULTI_ARG_4_DF2_DI_I1:
+     case MULTI_ARG_4_SF2_SI_I:
+     case MULTI_ARG_4_SF2_SI_I1:
+       nargs = 4;
+       last_arg_constant = true;
+       break;
+ 
+     case MULTI_ARG_3_SF:
+     case MULTI_ARG_3_DF:
+     case MULTI_ARG_3_SF2:
+     case MULTI_ARG_3_DF2:
+     case MULTI_ARG_3_DI:
+     case MULTI_ARG_3_SI:
+     case MULTI_ARG_3_SI_DI:
+     case MULTI_ARG_3_HI:
+     case MULTI_ARG_3_HI_SI:
+     case MULTI_ARG_3_QI:
+     case MULTI_ARG_3_DI2:
+     case MULTI_ARG_3_SI2:
+     case MULTI_ARG_3_HI2:
+     case MULTI_ARG_3_QI2:
+       nargs = 3;
+       break;
+ 
+     case MULTI_ARG_2_SF:
+     case MULTI_ARG_2_DF:
+     case MULTI_ARG_2_DI:
+     case MULTI_ARG_2_SI:
+     case MULTI_ARG_2_HI:
+     case MULTI_ARG_2_QI:
+       nargs = 2;
+       break;
+ 
+     case MULTI_ARG_2_DI_IMM:
+     case MULTI_ARG_2_SI_IMM:
+     case MULTI_ARG_2_HI_IMM:
+     case MULTI_ARG_2_QI_IMM:
+       nargs = 2;
+       last_arg_constant = true;
+       break;
+ 
+     case MULTI_ARG_1_SF:
+     case MULTI_ARG_1_DF:
+     case MULTI_ARG_1_SF2:
+     case MULTI_ARG_1_DF2:
+     case MULTI_ARG_1_DI:
+     case MULTI_ARG_1_SI:
+     case MULTI_ARG_1_HI:
+     case MULTI_ARG_1_QI:
+     case MULTI_ARG_1_SI_DI:
+     case MULTI_ARG_1_HI_DI:
+     case MULTI_ARG_1_HI_SI:
+     case MULTI_ARG_1_QI_DI:
+     case MULTI_ARG_1_QI_SI:
+     case MULTI_ARG_1_QI_HI:
+       nargs = 1;
+       break;
+ 
+     case MULTI_ARG_2_DI_CMP:
+     case MULTI_ARG_2_SI_CMP:
+     case MULTI_ARG_2_HI_CMP:
+     case MULTI_ARG_2_QI_CMP:
+       nargs = 2;
+       comparison_p = true;
+       break;
+ 
+     case MULTI_ARG_2_SF_TF:
+     case MULTI_ARG_2_DF_TF:
+     case MULTI_ARG_2_DI_TF:
+     case MULTI_ARG_2_SI_TF:
+     case MULTI_ARG_2_HI_TF:
+     case MULTI_ARG_2_QI_TF:
+       nargs = 2;
+       tf_p = true;
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   if (optimize || !target
+       || GET_MODE (target) != tmode
+       || !insn_data[icode].operand[0].predicate (target, tmode))
+     target = gen_reg_rtx (tmode);
+   else if (memory_operand (target, tmode))
+     num_memory++;
+ 
+   gcc_assert (nargs <= 4);
+ 
+   for (i = 0; i < nargs; i++)
+     {
+       tree arg = CALL_EXPR_ARG (exp, i);
+       rtx op = expand_normal (arg);
+       int adjust = (comparison_p) ? 1 : 0;
+       machine_mode mode = insn_data[icode].operand[i+adjust+1].mode;
+ 
+       if (last_arg_constant && i == nargs - 1)
+ 	{
+ 	  if (!insn_data[icode].operand[i + 1].predicate (op, mode))
+ 	    {
+ 	      enum insn_code new_icode = icode;
+ 	      switch (icode)
+ 		{
+ 		case CODE_FOR_xop_vpermil2v2df3:
+ 		case CODE_FOR_xop_vpermil2v4sf3:
+ 		case CODE_FOR_xop_vpermil2v4df3:
+ 		case CODE_FOR_xop_vpermil2v8sf3:
+ 		  error ("the last argument must be a 2-bit immediate");
+ 		  return gen_reg_rtx (tmode);
+ 		case CODE_FOR_xop_rotlv2di3:
+ 		  new_icode = CODE_FOR_rotlv2di3;
+ 		  goto xop_rotl;
+ 		case CODE_FOR_xop_rotlv4si3:
+ 		  new_icode = CODE_FOR_rotlv4si3;
+ 		  goto xop_rotl;
+ 		case CODE_FOR_xop_rotlv8hi3:
+ 		  new_icode = CODE_FOR_rotlv8hi3;
+ 		  goto xop_rotl;
+ 		case CODE_FOR_xop_rotlv16qi3:
+ 		  new_icode = CODE_FOR_rotlv16qi3;
+ 		xop_rotl:
+ 		  if (CONST_INT_P (op))
+ 		    {
+ 		      int mask = GET_MODE_UNIT_BITSIZE (tmode) - 1;
+ 		      op = GEN_INT (INTVAL (op) & mask);
+ 		      gcc_checking_assert
+ 			(insn_data[icode].operand[i + 1].predicate (op, mode));
+ 		    }
+ 		  else
+ 		    {
+ 		      gcc_checking_assert
+ 			(nargs == 2
+ 			 && insn_data[new_icode].operand[0].mode == tmode
+ 			 && insn_data[new_icode].operand[1].mode == tmode
+ 			 && insn_data[new_icode].operand[2].mode == mode
+ 			 && insn_data[new_icode].operand[0].predicate
+ 			    == insn_data[icode].operand[0].predicate
+ 			 && insn_data[new_icode].operand[1].predicate
+ 			    == insn_data[icode].operand[1].predicate);
+ 		      icode = new_icode;
+ 		      goto non_constant;
+ 		    }
+ 		  break;
+ 		default:
+ 		  gcc_unreachable ();
+ 		}
+ 	    }
+ 	}
+       else
+ 	{
+ 	non_constant:
+ 	  if (VECTOR_MODE_P (mode))
+ 	    op = safe_vector_operand (op, mode);
+ 
+ 	  /* If we aren't optimizing, only allow one memory operand to be
+ 	     generated.  */
+ 	  if (memory_operand (op, mode))
+ 	    num_memory++;
+ 
+ 	  gcc_assert (GET_MODE (op) == mode || GET_MODE (op) == VOIDmode);
+ 
+ 	  if (optimize
+ 	      || !insn_data[icode].operand[i+adjust+1].predicate (op, mode)
+ 	      || num_memory > 1)
+ 	    op = force_reg (mode, op);
+ 	}
+ 
+       args[i].op = op;
+       args[i].mode = mode;
+     }
+ 
+   switch (nargs)
+     {
+     case 1:
+       pat = GEN_FCN (icode) (target, args[0].op);
+       break;
+ 
+     case 2:
+       if (tf_p)
+ 	pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
+ 			       GEN_INT ((int)sub_code));
+       else if (! comparison_p)
+ 	pat = GEN_FCN (icode) (target, args[0].op, args[1].op);
+       else
+ 	{
+ 	  rtx cmp_op = gen_rtx_fmt_ee (sub_code, GET_MODE (target),
+ 				       args[0].op,
+ 				       args[1].op);
+ 
+ 	  pat = GEN_FCN (icode) (target, cmp_op, args[0].op, args[1].op);
+ 	}
+       break;
+ 
+     case 3:
+       pat = GEN_FCN (icode) (target, args[0].op, args[1].op, args[2].op);
+       break;
+ 
+     case 4:
+       pat = GEN_FCN (icode) (target, args[0].op, args[1].op, args[2].op, args[3].op);
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   if (! pat)
+     return 0;
+ 
+   emit_insn (pat);
+   return target;
+ }
+ 
+ /* Subroutine of ix86_expand_args_builtin to take care of scalar unop
+    insns with vec_merge.  */
+ 
+ static rtx
+ ix86_expand_unop_vec_merge_builtin (enum insn_code icode, tree exp,
+ 				    rtx target)
+ {
+   rtx pat;
+   tree arg0 = CALL_EXPR_ARG (exp, 0);
+   rtx op1, op0 = expand_normal (arg0);
+   machine_mode tmode = insn_data[icode].operand[0].mode;
+   machine_mode mode0 = insn_data[icode].operand[1].mode;
+ 
+   if (optimize || !target
+       || GET_MODE (target) != tmode
+       || !insn_data[icode].operand[0].predicate (target, tmode))
+     target = gen_reg_rtx (tmode);
+ 
+   if (VECTOR_MODE_P (mode0))
+     op0 = safe_vector_operand (op0, mode0);
+ 
+   if ((optimize && !register_operand (op0, mode0))
+       || !insn_data[icode].operand[1].predicate (op0, mode0))
+     op0 = copy_to_mode_reg (mode0, op0);
+ 
+   op1 = op0;
+   if (!insn_data[icode].operand[2].predicate (op1, mode0))
+     op1 = copy_to_mode_reg (mode0, op1);
+ 
+   pat = GEN_FCN (icode) (target, op0, op1);
+   if (! pat)
+     return 0;
+   emit_insn (pat);
+   return target;
+ }
+ 
+ /* Subroutine of ix86_expand_builtin to take care of comparison insns.  */
+ 
+ static rtx
+ ix86_expand_sse_compare (const struct builtin_description *d,
+ 			 tree exp, rtx target, bool swap)
+ {
+   rtx pat;
+   tree arg0 = CALL_EXPR_ARG (exp, 0);
+   tree arg1 = CALL_EXPR_ARG (exp, 1);
+   rtx op0 = expand_normal (arg0);
+   rtx op1 = expand_normal (arg1);
+   rtx op2;
+   machine_mode tmode = insn_data[d->icode].operand[0].mode;
+   machine_mode mode0 = insn_data[d->icode].operand[1].mode;
+   machine_mode mode1 = insn_data[d->icode].operand[2].mode;
+   enum rtx_code comparison = d->comparison;
+ 
+   if (VECTOR_MODE_P (mode0))
+     op0 = safe_vector_operand (op0, mode0);
+   if (VECTOR_MODE_P (mode1))
+     op1 = safe_vector_operand (op1, mode1);
+ 
+   /* Swap operands if we have a comparison that isn't available in
+      hardware.  */
+   if (swap)
+     std::swap (op0, op1);
+ 
+   if (optimize || !target
+       || GET_MODE (target) != tmode
+       || !insn_data[d->icode].operand[0].predicate (target, tmode))
+     target = gen_reg_rtx (tmode);
+ 
+   if ((optimize && !register_operand (op0, mode0))
+       || !insn_data[d->icode].operand[1].predicate (op0, mode0))
+     op0 = copy_to_mode_reg (mode0, op0);
+   if ((optimize && !register_operand (op1, mode1))
+       || !insn_data[d->icode].operand[2].predicate (op1, mode1))
+     op1 = copy_to_mode_reg (mode1, op1);
+ 
+   op2 = gen_rtx_fmt_ee (comparison, mode0, op0, op1);
+   pat = GEN_FCN (d->icode) (target, op0, op1, op2);
+   if (! pat)
+     return 0;
+   emit_insn (pat);
+   return target;
+ }
+ 
+ /* Subroutine of ix86_expand_builtin to take care of comi insns.  */
+ 
+ static rtx
+ ix86_expand_sse_comi (const struct builtin_description *d, tree exp,
+ 		      rtx target)
+ {
+   rtx pat;
+   tree arg0 = CALL_EXPR_ARG (exp, 0);
+   tree arg1 = CALL_EXPR_ARG (exp, 1);
+   rtx op0 = expand_normal (arg0);
+   rtx op1 = expand_normal (arg1);
+   machine_mode mode0 = insn_data[d->icode].operand[0].mode;
+   machine_mode mode1 = insn_data[d->icode].operand[1].mode;
+   enum rtx_code comparison = d->comparison;
+ 
+   if (VECTOR_MODE_P (mode0))
+     op0 = safe_vector_operand (op0, mode0);
+   if (VECTOR_MODE_P (mode1))
+     op1 = safe_vector_operand (op1, mode1);
+ 
+   /* Swap operands if we have a comparison that isn't available in
+      hardware.  */
+   if (d->flag & BUILTIN_DESC_SWAP_OPERANDS)
+     std::swap (op0, op1);
+ 
+   target = gen_reg_rtx (SImode);
+   emit_move_insn (target, const0_rtx);
+   target = gen_rtx_SUBREG (QImode, target, 0);
+ 
+   if ((optimize && !register_operand (op0, mode0))
+       || !insn_data[d->icode].operand[0].predicate (op0, mode0))
+     op0 = copy_to_mode_reg (mode0, op0);
+   if ((optimize && !register_operand (op1, mode1))
+       || !insn_data[d->icode].operand[1].predicate (op1, mode1))
+     op1 = copy_to_mode_reg (mode1, op1);
+ 
+   pat = GEN_FCN (d->icode) (op0, op1);
+   if (! pat)
+     return 0;
+   emit_insn (pat);
+   emit_insn (gen_rtx_SET (gen_rtx_STRICT_LOW_PART (VOIDmode, target),
+ 			  gen_rtx_fmt_ee (comparison, QImode,
+ 					  SET_DEST (pat),
+ 					  const0_rtx)));
+ 
+   return SUBREG_REG (target);
+ }
+ 
+ /* Subroutines of ix86_expand_args_builtin to take care of round insns.  */
+ 
+ static rtx
+ ix86_expand_sse_round (const struct builtin_description *d, tree exp,
+ 		       rtx target)
+ {
+   rtx pat;
+   tree arg0 = CALL_EXPR_ARG (exp, 0);
+   rtx op1, op0 = expand_normal (arg0);
+   machine_mode tmode = insn_data[d->icode].operand[0].mode;
+   machine_mode mode0 = insn_data[d->icode].operand[1].mode;
+ 
+   if (optimize || target == 0
+       || GET_MODE (target) != tmode
+       || !insn_data[d->icode].operand[0].predicate (target, tmode))
+     target = gen_reg_rtx (tmode);
+ 
+   if (VECTOR_MODE_P (mode0))
+     op0 = safe_vector_operand (op0, mode0);
+ 
+   if ((optimize && !register_operand (op0, mode0))
+       || !insn_data[d->icode].operand[0].predicate (op0, mode0))
+     op0 = copy_to_mode_reg (mode0, op0);
+ 
+   op1 = GEN_INT (d->comparison);
+ 
+   pat = GEN_FCN (d->icode) (target, op0, op1);
+   if (! pat)
+     return 0;
+   emit_insn (pat);
+   return target;
+ }
+ 
+ static rtx
+ ix86_expand_sse_round_vec_pack_sfix (const struct builtin_description *d,
+ 				     tree exp, rtx target)
+ {
+   rtx pat;
+   tree arg0 = CALL_EXPR_ARG (exp, 0);
+   tree arg1 = CALL_EXPR_ARG (exp, 1);
+   rtx op0 = expand_normal (arg0);
+   rtx op1 = expand_normal (arg1);
+   rtx op2;
+   machine_mode tmode = insn_data[d->icode].operand[0].mode;
+   machine_mode mode0 = insn_data[d->icode].operand[1].mode;
+   machine_mode mode1 = insn_data[d->icode].operand[2].mode;
+ 
+   if (optimize || target == 0
+       || GET_MODE (target) != tmode
+       || !insn_data[d->icode].operand[0].predicate (target, tmode))
+     target = gen_reg_rtx (tmode);
+ 
+   op0 = safe_vector_operand (op0, mode0);
+   op1 = safe_vector_operand (op1, mode1);
+ 
+   if ((optimize && !register_operand (op0, mode0))
+       || !insn_data[d->icode].operand[0].predicate (op0, mode0))
+     op0 = copy_to_mode_reg (mode0, op0);
+   if ((optimize && !register_operand (op1, mode1))
+       || !insn_data[d->icode].operand[1].predicate (op1, mode1))
+     op1 = copy_to_mode_reg (mode1, op1);
+ 
+   op2 = GEN_INT (d->comparison);
+ 
+   pat = GEN_FCN (d->icode) (target, op0, op1, op2);
+   if (! pat)
+     return 0;
+   emit_insn (pat);
+   return target;
+ }
+ 
+ /* Subroutine of ix86_expand_builtin to take care of ptest insns.  */
+ 
+ static rtx
+ ix86_expand_sse_ptest (const struct builtin_description *d, tree exp,
+ 		       rtx target)
+ {
+   rtx pat;
+   tree arg0 = CALL_EXPR_ARG (exp, 0);
+   tree arg1 = CALL_EXPR_ARG (exp, 1);
+   rtx op0 = expand_normal (arg0);
+   rtx op1 = expand_normal (arg1);
+   machine_mode mode0 = insn_data[d->icode].operand[0].mode;
+   machine_mode mode1 = insn_data[d->icode].operand[1].mode;
+   enum rtx_code comparison = d->comparison;
+ 
+   if (VECTOR_MODE_P (mode0))
+     op0 = safe_vector_operand (op0, mode0);
+   if (VECTOR_MODE_P (mode1))
+     op1 = safe_vector_operand (op1, mode1);
+ 
+   target = gen_reg_rtx (SImode);
+   emit_move_insn (target, const0_rtx);
+   target = gen_rtx_SUBREG (QImode, target, 0);
+ 
+   if ((optimize && !register_operand (op0, mode0))
+       || !insn_data[d->icode].operand[0].predicate (op0, mode0))
+     op0 = copy_to_mode_reg (mode0, op0);
+   if ((optimize && !register_operand (op1, mode1))
+       || !insn_data[d->icode].operand[1].predicate (op1, mode1))
+     op1 = copy_to_mode_reg (mode1, op1);
+ 
+   pat = GEN_FCN (d->icode) (op0, op1);
+   if (! pat)
+     return 0;
+   emit_insn (pat);
+   emit_insn (gen_rtx_SET (gen_rtx_STRICT_LOW_PART (VOIDmode, target),
+ 			  gen_rtx_fmt_ee (comparison, QImode,
+ 					  SET_DEST (pat),
+ 					  const0_rtx)));
+ 
+   return SUBREG_REG (target);
+ }
+ 
+ /* Subroutine of ix86_expand_builtin to take care of pcmpestr[im] insns.  */
+ 
+ static rtx
+ ix86_expand_sse_pcmpestr (const struct builtin_description *d,
+ 			  tree exp, rtx target)
+ {
+   rtx pat;
+   tree arg0 = CALL_EXPR_ARG (exp, 0);
+   tree arg1 = CALL_EXPR_ARG (exp, 1);
+   tree arg2 = CALL_EXPR_ARG (exp, 2);
+   tree arg3 = CALL_EXPR_ARG (exp, 3);
+   tree arg4 = CALL_EXPR_ARG (exp, 4);
+   rtx scratch0, scratch1;
+   rtx op0 = expand_normal (arg0);
+   rtx op1 = expand_normal (arg1);
+   rtx op2 = expand_normal (arg2);
+   rtx op3 = expand_normal (arg3);
+   rtx op4 = expand_normal (arg4);
+   machine_mode tmode0, tmode1, modev2, modei3, modev4, modei5, modeimm;
+ 
+   tmode0 = insn_data[d->icode].operand[0].mode;
+   tmode1 = insn_data[d->icode].operand[1].mode;
+   modev2 = insn_data[d->icode].operand[2].mode;
+   modei3 = insn_data[d->icode].operand[3].mode;
+   modev4 = insn_data[d->icode].operand[4].mode;
+   modei5 = insn_data[d->icode].operand[5].mode;
+   modeimm = insn_data[d->icode].operand[6].mode;
+ 
+   if (VECTOR_MODE_P (modev2))
+     op0 = safe_vector_operand (op0, modev2);
+   if (VECTOR_MODE_P (modev4))
+     op2 = safe_vector_operand (op2, modev4);
+ 
+   if (!insn_data[d->icode].operand[2].predicate (op0, modev2))
+     op0 = copy_to_mode_reg (modev2, op0);
+   if (!insn_data[d->icode].operand[3].predicate (op1, modei3))
+     op1 = copy_to_mode_reg (modei3, op1);
+   if ((optimize && !register_operand (op2, modev4))
+       || !insn_data[d->icode].operand[4].predicate (op2, modev4))
+     op2 = copy_to_mode_reg (modev4, op2);
+   if (!insn_data[d->icode].operand[5].predicate (op3, modei5))
+     op3 = copy_to_mode_reg (modei5, op3);
+ 
+   if (!insn_data[d->icode].operand[6].predicate (op4, modeimm))
+     {
+       error ("the fifth argument must be an 8-bit immediate");
+       return const0_rtx;
+     }
+ 
+   if (d->code == IX86_BUILTIN_PCMPESTRI128)
+     {
+       if (optimize || !target
+ 	  || GET_MODE (target) != tmode0
+ 	  || !insn_data[d->icode].operand[0].predicate (target, tmode0))
+ 	target = gen_reg_rtx (tmode0);
+ 
+       scratch1 = gen_reg_rtx (tmode1);
+ 
+       pat = GEN_FCN (d->icode) (target, scratch1, op0, op1, op2, op3, op4);
+     }
+   else if (d->code == IX86_BUILTIN_PCMPESTRM128)
+     {
+       if (optimize || !target
+ 	  || GET_MODE (target) != tmode1
+ 	  || !insn_data[d->icode].operand[1].predicate (target, tmode1))
+ 	target = gen_reg_rtx (tmode1);
+ 
+       scratch0 = gen_reg_rtx (tmode0);
+ 
+       pat = GEN_FCN (d->icode) (scratch0, target, op0, op1, op2, op3, op4);
+     }
+   else
+     {
+       gcc_assert (d->flag);
+ 
+       scratch0 = gen_reg_rtx (tmode0);
+       scratch1 = gen_reg_rtx (tmode1);
+ 
+       pat = GEN_FCN (d->icode) (scratch0, scratch1, op0, op1, op2, op3, op4);
+     }
+ 
+   if (! pat)
+     return 0;
+ 
+   emit_insn (pat);
+ 
+   if (d->flag)
+     {
+       target = gen_reg_rtx (SImode);
+       emit_move_insn (target, const0_rtx);
+       target = gen_rtx_SUBREG (QImode, target, 0);
+ 
+       emit_insn
+ 	(gen_rtx_SET (gen_rtx_STRICT_LOW_PART (VOIDmode, target),
+ 		      gen_rtx_fmt_ee (EQ, QImode,
+ 				      gen_rtx_REG ((machine_mode) d->flag,
+ 						   FLAGS_REG),
+ 				      const0_rtx)));
+       return SUBREG_REG (target);
+     }
+   else
+     return target;
+ }
+ 
+ 
+ /* Subroutine of ix86_expand_builtin to take care of pcmpistr[im] insns.  */
+ 
+ static rtx
+ ix86_expand_sse_pcmpistr (const struct builtin_description *d,
+ 			  tree exp, rtx target)
+ {
+   rtx pat;
+   tree arg0 = CALL_EXPR_ARG (exp, 0);
+   tree arg1 = CALL_EXPR_ARG (exp, 1);
+   tree arg2 = CALL_EXPR_ARG (exp, 2);
+   rtx scratch0, scratch1;
+   rtx op0 = expand_normal (arg0);
+   rtx op1 = expand_normal (arg1);
+   rtx op2 = expand_normal (arg2);
+   machine_mode tmode0, tmode1, modev2, modev3, modeimm;
+ 
+   tmode0 = insn_data[d->icode].operand[0].mode;
+   tmode1 = insn_data[d->icode].operand[1].mode;
+   modev2 = insn_data[d->icode].operand[2].mode;
+   modev3 = insn_data[d->icode].operand[3].mode;
+   modeimm = insn_data[d->icode].operand[4].mode;
+ 
+   if (VECTOR_MODE_P (modev2))
+     op0 = safe_vector_operand (op0, modev2);
+   if (VECTOR_MODE_P (modev3))
+     op1 = safe_vector_operand (op1, modev3);
+ 
+   if (!insn_data[d->icode].operand[2].predicate (op0, modev2))
+     op0 = copy_to_mode_reg (modev2, op0);
+   if ((optimize && !register_operand (op1, modev3))
+       || !insn_data[d->icode].operand[3].predicate (op1, modev3))
+     op1 = copy_to_mode_reg (modev3, op1);
+ 
+   if (!insn_data[d->icode].operand[4].predicate (op2, modeimm))
+     {
+       error ("the third argument must be an 8-bit immediate");
+       return const0_rtx;
+     }
+ 
+   if (d->code == IX86_BUILTIN_PCMPISTRI128)
+     {
+       if (optimize || !target
+ 	  || GET_MODE (target) != tmode0
+ 	  || !insn_data[d->icode].operand[0].predicate (target, tmode0))
+ 	target = gen_reg_rtx (tmode0);
+ 
+       scratch1 = gen_reg_rtx (tmode1);
+ 
+       pat = GEN_FCN (d->icode) (target, scratch1, op0, op1, op2);
+     }
+   else if (d->code == IX86_BUILTIN_PCMPISTRM128)
+     {
+       if (optimize || !target
+ 	  || GET_MODE (target) != tmode1
+ 	  || !insn_data[d->icode].operand[1].predicate (target, tmode1))
+ 	target = gen_reg_rtx (tmode1);
+ 
+       scratch0 = gen_reg_rtx (tmode0);
+ 
+       pat = GEN_FCN (d->icode) (scratch0, target, op0, op1, op2);
+     }
+   else
+     {
+       gcc_assert (d->flag);
+ 
+       scratch0 = gen_reg_rtx (tmode0);
+       scratch1 = gen_reg_rtx (tmode1);
+ 
+       pat = GEN_FCN (d->icode) (scratch0, scratch1, op0, op1, op2);
+     }
+ 
+   if (! pat)
+     return 0;
+ 
+   emit_insn (pat);
+ 
+   if (d->flag)
+     {
+       target = gen_reg_rtx (SImode);
+       emit_move_insn (target, const0_rtx);
+       target = gen_rtx_SUBREG (QImode, target, 0);
+ 
+       emit_insn
+ 	(gen_rtx_SET (gen_rtx_STRICT_LOW_PART (VOIDmode, target),
+ 		      gen_rtx_fmt_ee (EQ, QImode,
+ 				      gen_rtx_REG ((machine_mode) d->flag,
+ 						   FLAGS_REG),
+ 				      const0_rtx)));
+       return SUBREG_REG (target);
+     }
+   else
+     return target;
+ }
+ 
+ /* Fixup modeless constants to fit required mode.  */
+ 
+ static rtx
+ fixup_modeless_constant (rtx x, machine_mode mode)
+ {
+   if (GET_MODE (x) == VOIDmode)
+     x = convert_to_mode (mode, x, 1);
+   return x;
+ }
+ 
+ /* Subroutine of ix86_expand_builtin to take care of insns with
+    variable number of operands.  */
+ 
+ static rtx
+ ix86_expand_args_builtin (const struct builtin_description *d,
+ 			  tree exp, rtx target)
+ {
+   rtx pat, real_target;
+   unsigned int i, nargs;
+   unsigned int nargs_constant = 0;
+   unsigned int mask_pos = 0;
+   int num_memory = 0;
+   struct
+     {
+       rtx op;
+       machine_mode mode;
+     } args[6];
+   bool second_arg_count = false;
+   enum insn_code icode = d->icode;
+   const struct insn_data_d *insn_p = &insn_data[icode];
+   machine_mode tmode = insn_p->operand[0].mode;
+   machine_mode rmode = VOIDmode;
+   bool swap = false;
+   enum rtx_code comparison = d->comparison;
+ 
+   switch ((enum ix86_builtin_func_type) d->flag)
+     {
+     case V2DF_FTYPE_V2DF_ROUND:
+     case V4DF_FTYPE_V4DF_ROUND:
+     case V8DF_FTYPE_V8DF_ROUND:
+     case V4SF_FTYPE_V4SF_ROUND:
+     case V8SF_FTYPE_V8SF_ROUND:
+     case V16SF_FTYPE_V16SF_ROUND:
+     case V4SI_FTYPE_V4SF_ROUND:
+     case V8SI_FTYPE_V8SF_ROUND:
+     case V16SI_FTYPE_V16SF_ROUND:
+       return ix86_expand_sse_round (d, exp, target);
+     case V4SI_FTYPE_V2DF_V2DF_ROUND:
+     case V8SI_FTYPE_V4DF_V4DF_ROUND:
+     case V16SI_FTYPE_V8DF_V8DF_ROUND:
+       return ix86_expand_sse_round_vec_pack_sfix (d, exp, target);
+     case INT_FTYPE_V8SF_V8SF_PTEST:
+     case INT_FTYPE_V4DI_V4DI_PTEST:
+     case INT_FTYPE_V4DF_V4DF_PTEST:
+     case INT_FTYPE_V4SF_V4SF_PTEST:
+     case INT_FTYPE_V2DI_V2DI_PTEST:
+     case INT_FTYPE_V2DF_V2DF_PTEST:
+       return ix86_expand_sse_ptest (d, exp, target);
+     case FLOAT128_FTYPE_FLOAT128:
+     case FLOAT_FTYPE_FLOAT:
+     case INT_FTYPE_INT:
+     case UINT_FTYPE_UINT:
+     case UINT16_FTYPE_UINT16:
+     case UINT64_FTYPE_INT:
+     case UINT64_FTYPE_UINT64:
+     case INT64_FTYPE_INT64:
+     case INT64_FTYPE_V4SF:
+     case INT64_FTYPE_V2DF:
+     case INT_FTYPE_V16QI:
+     case INT_FTYPE_V8QI:
+     case INT_FTYPE_V8SF:
+     case INT_FTYPE_V4DF:
+     case INT_FTYPE_V4SF:
+     case INT_FTYPE_V2DF:
+     case INT_FTYPE_V32QI:
+     case V16QI_FTYPE_V16QI:
+     case V8SI_FTYPE_V8SF:
+     case V8SI_FTYPE_V4SI:
+     case V8HI_FTYPE_V8HI:
+     case V8HI_FTYPE_V16QI:
+     case V8QI_FTYPE_V8QI:
+     case V8SF_FTYPE_V8SF:
+     case V8SF_FTYPE_V8SI:
+     case V8SF_FTYPE_V4SF:
+     case V8SF_FTYPE_V8HI:
+     case V4SI_FTYPE_V4SI:
+     case V4SI_FTYPE_V16QI:
+     case V4SI_FTYPE_V4SF:
+     case V4SI_FTYPE_V8SI:
+     case V4SI_FTYPE_V8HI:
+     case V4SI_FTYPE_V4DF:
+     case V4SI_FTYPE_V2DF:
+     case V4HI_FTYPE_V4HI:
+     case V4DF_FTYPE_V4DF:
+     case V4DF_FTYPE_V4SI:
+     case V4DF_FTYPE_V4SF:
+     case V4DF_FTYPE_V2DF:
+     case V4SF_FTYPE_V4SF:
+     case V4SF_FTYPE_V4SI:
+     case V4SF_FTYPE_V8SF:
+     case V4SF_FTYPE_V4DF:
+     case V4SF_FTYPE_V8HI:
+     case V4SF_FTYPE_V2DF:
+     case V2DI_FTYPE_V2DI:
+     case V2DI_FTYPE_V16QI:
+     case V2DI_FTYPE_V8HI:
+     case V2DI_FTYPE_V4SI:
+     case V2DF_FTYPE_V2DF:
+     case V2DF_FTYPE_V4SI:
+     case V2DF_FTYPE_V4DF:
+     case V2DF_FTYPE_V4SF:
+     case V2DF_FTYPE_V2SI:
+     case V2SI_FTYPE_V2SI:
+     case V2SI_FTYPE_V4SF:
+     case V2SI_FTYPE_V2SF:
+     case V2SI_FTYPE_V2DF:
+     case V2SF_FTYPE_V2SF:
+     case V2SF_FTYPE_V2SI:
+     case V32QI_FTYPE_V32QI:
+     case V32QI_FTYPE_V16QI:
+     case V16HI_FTYPE_V16HI:
+     case V16HI_FTYPE_V8HI:
+     case V8SI_FTYPE_V8SI:
+     case V16HI_FTYPE_V16QI:
+     case V8SI_FTYPE_V16QI:
+     case V4DI_FTYPE_V16QI:
+     case V8SI_FTYPE_V8HI:
+     case V4DI_FTYPE_V8HI:
+     case V4DI_FTYPE_V4SI:
+     case V4DI_FTYPE_V2DI:
+     case UQI_FTYPE_UQI:
+     case UHI_FTYPE_UHI:
+     case USI_FTYPE_USI:
+     case USI_FTYPE_UQI:
+     case USI_FTYPE_UHI:
+     case UDI_FTYPE_UDI:
+     case UHI_FTYPE_V16QI:
+     case USI_FTYPE_V32QI:
+     case UDI_FTYPE_V64QI:
+     case V16QI_FTYPE_UHI:
+     case V32QI_FTYPE_USI:
+     case V64QI_FTYPE_UDI:
+     case V8HI_FTYPE_UQI:
+     case V16HI_FTYPE_UHI:
+     case V32HI_FTYPE_USI:
+     case V4SI_FTYPE_UQI:
+     case V8SI_FTYPE_UQI:
+     case V4SI_FTYPE_UHI:
+     case V8SI_FTYPE_UHI:
+     case UQI_FTYPE_V8HI:
+     case UHI_FTYPE_V16HI:
+     case USI_FTYPE_V32HI:
+     case UQI_FTYPE_V4SI:
+     case UQI_FTYPE_V8SI:
+     case UHI_FTYPE_V16SI:
+     case UQI_FTYPE_V2DI:
+     case UQI_FTYPE_V4DI:
+     case UQI_FTYPE_V8DI:
+     case V16SI_FTYPE_UHI:
+     case V2DI_FTYPE_UQI:
+     case V4DI_FTYPE_UQI:
+     case V16SI_FTYPE_INT:
+     case V16SF_FTYPE_V8SF:
+     case V16SI_FTYPE_V8SI:
+     case V16SF_FTYPE_V4SF:
+     case V16SI_FTYPE_V4SI:
+     case V16SI_FTYPE_V16SF:
+     case V16SI_FTYPE_V16SI:
+     case V64QI_FTYPE_V64QI:
+     case V32HI_FTYPE_V32HI:
+     case V16SF_FTYPE_V16SF:
+     case V8DI_FTYPE_UQI:
+     case V8DI_FTYPE_V8DI:
+     case V8DF_FTYPE_V4DF:
+     case V8DF_FTYPE_V2DF:
+     case V8DF_FTYPE_V8DF:
+     case V4DI_FTYPE_V4DI:
+     case V16HI_FTYPE_V16SF:
+     case V8HI_FTYPE_V8SF:
+     case V8HI_FTYPE_V4SF:
+       nargs = 1;
+       break;
+     case V4SF_FTYPE_V4SF_VEC_MERGE:
+     case V2DF_FTYPE_V2DF_VEC_MERGE:
+       return ix86_expand_unop_vec_merge_builtin (icode, exp, target);
+     case FLOAT128_FTYPE_FLOAT128_FLOAT128:
+     case V16QI_FTYPE_V16QI_V16QI:
+     case V16QI_FTYPE_V8HI_V8HI:
+     case V16SF_FTYPE_V16SF_V16SF:
+     case V8QI_FTYPE_V8QI_V8QI:
+     case V8QI_FTYPE_V4HI_V4HI:
+     case V8HI_FTYPE_V8HI_V8HI:
+     case V8HI_FTYPE_V16QI_V16QI:
+     case V8HI_FTYPE_V4SI_V4SI:
+     case V8SF_FTYPE_V8SF_V8SF:
+     case V8SF_FTYPE_V8SF_V8SI:
+     case V8DF_FTYPE_V8DF_V8DF:
+     case V4SI_FTYPE_V4SI_V4SI:
+     case V4SI_FTYPE_V8HI_V8HI:
+     case V4SI_FTYPE_V2DF_V2DF:
+     case V4HI_FTYPE_V4HI_V4HI:
+     case V4HI_FTYPE_V8QI_V8QI:
+     case V4HI_FTYPE_V2SI_V2SI:
+     case V4DF_FTYPE_V4DF_V4DF:
+     case V4DF_FTYPE_V4DF_V4DI:
+     case V4SF_FTYPE_V4SF_V4SF:
+     case V4SF_FTYPE_V4SF_V4SI:
+     case V4SF_FTYPE_V4SF_V2SI:
+     case V4SF_FTYPE_V4SF_V2DF:
+     case V4SF_FTYPE_V4SF_UINT:
+     case V4SF_FTYPE_V4SF_DI:
+     case V4SF_FTYPE_V4SF_SI:
+     case V2DI_FTYPE_V2DI_V2DI:
+     case V2DI_FTYPE_V16QI_V16QI:
+     case V2DI_FTYPE_V4SI_V4SI:
+     case V2DI_FTYPE_V2DI_V16QI:
+     case V2SI_FTYPE_V2SI_V2SI:
+     case V2SI_FTYPE_V4HI_V4HI:
+     case V2SI_FTYPE_V2SF_V2SF:
+     case V2DF_FTYPE_V2DF_V2DF:
+     case V2DF_FTYPE_V2DF_V4SF:
+     case V2DF_FTYPE_V2DF_V2DI:
+     case V2DF_FTYPE_V2DF_DI:
+     case V2DF_FTYPE_V2DF_SI:
+     case V2DF_FTYPE_V2DF_UINT:
+     case V2SF_FTYPE_V2SF_V2SF:
+     case V1DI_FTYPE_V1DI_V1DI:
+     case V1DI_FTYPE_V8QI_V8QI:
+     case V1DI_FTYPE_V2SI_V2SI:
+     case V32QI_FTYPE_V16HI_V16HI:
+     case V16HI_FTYPE_V8SI_V8SI:
+     case V64QI_FTYPE_V64QI_V64QI:
+     case V32QI_FTYPE_V32QI_V32QI:
+     case V16HI_FTYPE_V32QI_V32QI:
+     case V16HI_FTYPE_V16HI_V16HI:
+     case V8SI_FTYPE_V4DF_V4DF:
+     case V8SI_FTYPE_V8SI_V8SI:
+     case V8SI_FTYPE_V16HI_V16HI:
+     case V4DI_FTYPE_V4DI_V4DI:
+     case V4DI_FTYPE_V8SI_V8SI:
+     case V8DI_FTYPE_V64QI_V64QI:
+       if (comparison == UNKNOWN)
+ 	return ix86_expand_binop_builtin (icode, exp, target);
+       nargs = 2;
+       break;
+     case V4SF_FTYPE_V4SF_V4SF_SWAP:
+     case V2DF_FTYPE_V2DF_V2DF_SWAP:
+       gcc_assert (comparison != UNKNOWN);
+       nargs = 2;
+       swap = true;
+       break;
+     case V16HI_FTYPE_V16HI_V8HI_COUNT:
+     case V16HI_FTYPE_V16HI_SI_COUNT:
+     case V8SI_FTYPE_V8SI_V4SI_COUNT:
+     case V8SI_FTYPE_V8SI_SI_COUNT:
+     case V4DI_FTYPE_V4DI_V2DI_COUNT:
+     case V4DI_FTYPE_V4DI_INT_COUNT:
+     case V8HI_FTYPE_V8HI_V8HI_COUNT:
+     case V8HI_FTYPE_V8HI_SI_COUNT:
+     case V4SI_FTYPE_V4SI_V4SI_COUNT:
+     case V4SI_FTYPE_V4SI_SI_COUNT:
+     case V4HI_FTYPE_V4HI_V4HI_COUNT:
+     case V4HI_FTYPE_V4HI_SI_COUNT:
+     case V2DI_FTYPE_V2DI_V2DI_COUNT:
+     case V2DI_FTYPE_V2DI_SI_COUNT:
+     case V2SI_FTYPE_V2SI_V2SI_COUNT:
+     case V2SI_FTYPE_V2SI_SI_COUNT:
+     case V1DI_FTYPE_V1DI_V1DI_COUNT:
+     case V1DI_FTYPE_V1DI_SI_COUNT:
+       nargs = 2;
+       second_arg_count = true;
+       break;
+     case V16HI_FTYPE_V16HI_INT_V16HI_UHI_COUNT:
+     case V16HI_FTYPE_V16HI_V8HI_V16HI_UHI_COUNT:
+     case V16SI_FTYPE_V16SI_INT_V16SI_UHI_COUNT:
+     case V16SI_FTYPE_V16SI_V4SI_V16SI_UHI_COUNT:
+     case V2DI_FTYPE_V2DI_INT_V2DI_UQI_COUNT:
+     case V2DI_FTYPE_V2DI_V2DI_V2DI_UQI_COUNT:
+     case V32HI_FTYPE_V32HI_INT_V32HI_USI_COUNT:
+     case V32HI_FTYPE_V32HI_V8HI_V32HI_USI_COUNT:
+     case V4DI_FTYPE_V4DI_INT_V4DI_UQI_COUNT:
+     case V4DI_FTYPE_V4DI_V2DI_V4DI_UQI_COUNT:
+     case V4SI_FTYPE_V4SI_INT_V4SI_UQI_COUNT:
+     case V4SI_FTYPE_V4SI_V4SI_V4SI_UQI_COUNT:
+     case V8DI_FTYPE_V8DI_INT_V8DI_UQI_COUNT:
+     case V8DI_FTYPE_V8DI_V2DI_V8DI_UQI_COUNT:
+     case V8HI_FTYPE_V8HI_INT_V8HI_UQI_COUNT:
+     case V8HI_FTYPE_V8HI_V8HI_V8HI_UQI_COUNT:
+     case V8SI_FTYPE_V8SI_INT_V8SI_UQI_COUNT:
+     case V8SI_FTYPE_V8SI_V4SI_V8SI_UQI_COUNT:
+       nargs = 4;
+       second_arg_count = true;
+       break;
+     case UINT64_FTYPE_UINT64_UINT64:
+     case UINT_FTYPE_UINT_UINT:
+     case UINT_FTYPE_UINT_USHORT:
+     case UINT_FTYPE_UINT_UCHAR:
+     case UINT16_FTYPE_UINT16_INT:
+     case UINT8_FTYPE_UINT8_INT:
+     case UQI_FTYPE_UQI_UQI:
+     case UHI_FTYPE_UHI_UHI:
+     case USI_FTYPE_USI_USI:
+     case UDI_FTYPE_UDI_UDI:
+     case V16SI_FTYPE_V8DF_V8DF:
+     case V32HI_FTYPE_V16SF_V16SF:
+     case V16HI_FTYPE_V8SF_V8SF:
+     case V8HI_FTYPE_V4SF_V4SF:
+     case V16HI_FTYPE_V16SF_UHI:
+     case V8HI_FTYPE_V8SF_UQI:
+     case V8HI_FTYPE_V4SF_UQI:
+       nargs = 2;
+       break;
+     case V2DI_FTYPE_V2DI_INT_CONVERT:
+       nargs = 2;
+       rmode = V1TImode;
+       nargs_constant = 1;
+       break;
+     case V4DI_FTYPE_V4DI_INT_CONVERT:
+       nargs = 2;
+       rmode = V2TImode;
+       nargs_constant = 1;
+       break;
+     case V8DI_FTYPE_V8DI_INT_CONVERT:
+       nargs = 2;
+       rmode = V4TImode;
+       nargs_constant = 1;
+       break;
+     case V8HI_FTYPE_V8HI_INT:
+     case V8HI_FTYPE_V8SF_INT:
+     case V16HI_FTYPE_V16SF_INT:
+     case V8HI_FTYPE_V4SF_INT:
+     case V8SF_FTYPE_V8SF_INT:
+     case V4SF_FTYPE_V16SF_INT:
+     case V16SF_FTYPE_V16SF_INT:
+     case V4SI_FTYPE_V4SI_INT:
+     case V4SI_FTYPE_V8SI_INT:
+     case V4HI_FTYPE_V4HI_INT:
+     case V4DF_FTYPE_V4DF_INT:
+     case V4DF_FTYPE_V8DF_INT:
+     case V4SF_FTYPE_V4SF_INT:
+     case V4SF_FTYPE_V8SF_INT:
+     case V2DI_FTYPE_V2DI_INT:
+     case V2DF_FTYPE_V2DF_INT:
+     case V2DF_FTYPE_V4DF_INT:
+     case V16HI_FTYPE_V16HI_INT:
+     case V8SI_FTYPE_V8SI_INT:
+     case V16SI_FTYPE_V16SI_INT:
+     case V4SI_FTYPE_V16SI_INT:
+     case V4DI_FTYPE_V4DI_INT:
+     case V2DI_FTYPE_V4DI_INT:
+     case V4DI_FTYPE_V8DI_INT:
+     case UQI_FTYPE_UQI_UQI_CONST:
+     case UHI_FTYPE_UHI_UQI:
+     case USI_FTYPE_USI_UQI:
+     case UDI_FTYPE_UDI_UQI:
+       nargs = 2;
+       nargs_constant = 1;
+       break;
+     case V16QI_FTYPE_V16QI_V16QI_V16QI:
+     case V8SF_FTYPE_V8SF_V8SF_V8SF:
+     case V4DF_FTYPE_V4DF_V4DF_V4DF:
+     case V4SF_FTYPE_V4SF_V4SF_V4SF:
+     case V2DF_FTYPE_V2DF_V2DF_V2DF:
+     case V32QI_FTYPE_V32QI_V32QI_V32QI:
+     case UHI_FTYPE_V16SI_V16SI_UHI:
+     case UQI_FTYPE_V8DI_V8DI_UQI:
+     case V16HI_FTYPE_V16SI_V16HI_UHI:
+     case V16QI_FTYPE_V16SI_V16QI_UHI:
+     case V16QI_FTYPE_V8DI_V16QI_UQI:
+     case V16SF_FTYPE_V16SF_V16SF_UHI:
+     case V16SF_FTYPE_V4SF_V16SF_UHI:
+     case V16SI_FTYPE_SI_V16SI_UHI:
+     case V16SI_FTYPE_V16HI_V16SI_UHI:
+     case V16SI_FTYPE_V16QI_V16SI_UHI:
+     case V8SF_FTYPE_V4SF_V8SF_UQI:
+     case V4DF_FTYPE_V2DF_V4DF_UQI:
+     case V8SI_FTYPE_V4SI_V8SI_UQI:
+     case V8SI_FTYPE_SI_V8SI_UQI:
+     case V4SI_FTYPE_V4SI_V4SI_UQI:
+     case V4SI_FTYPE_SI_V4SI_UQI:
+     case V4DI_FTYPE_V2DI_V4DI_UQI:
+     case V4DI_FTYPE_DI_V4DI_UQI:
+     case V2DI_FTYPE_V2DI_V2DI_UQI:
+     case V2DI_FTYPE_DI_V2DI_UQI:
+     case V64QI_FTYPE_V64QI_V64QI_UDI:
+     case V64QI_FTYPE_V16QI_V64QI_UDI:
+     case V64QI_FTYPE_QI_V64QI_UDI:
+     case V32QI_FTYPE_V32QI_V32QI_USI:
+     case V32QI_FTYPE_V16QI_V32QI_USI:
+     case V32QI_FTYPE_QI_V32QI_USI:
+     case V16QI_FTYPE_V16QI_V16QI_UHI:
+     case V16QI_FTYPE_QI_V16QI_UHI:
+     case V32HI_FTYPE_V8HI_V32HI_USI:
+     case V32HI_FTYPE_HI_V32HI_USI:
+     case V16HI_FTYPE_V8HI_V16HI_UHI:
+     case V16HI_FTYPE_HI_V16HI_UHI:
+     case V8HI_FTYPE_V8HI_V8HI_UQI:
+     case V8HI_FTYPE_HI_V8HI_UQI:
+     case V8SF_FTYPE_V8HI_V8SF_UQI:
+     case V4SF_FTYPE_V8HI_V4SF_UQI:
+     case V8SI_FTYPE_V8SF_V8SI_UQI:
+     case V4SI_FTYPE_V4SF_V4SI_UQI:
+     case V4DI_FTYPE_V4SF_V4DI_UQI:
+     case V2DI_FTYPE_V4SF_V2DI_UQI:
+     case V4SF_FTYPE_V4DI_V4SF_UQI:
+     case V4SF_FTYPE_V2DI_V4SF_UQI:
+     case V4DF_FTYPE_V4DI_V4DF_UQI:
+     case V2DF_FTYPE_V2DI_V2DF_UQI:
+     case V16QI_FTYPE_V8HI_V16QI_UQI:
+     case V16QI_FTYPE_V16HI_V16QI_UHI:
+     case V16QI_FTYPE_V4SI_V16QI_UQI:
+     case V16QI_FTYPE_V8SI_V16QI_UQI:
+     case V8HI_FTYPE_V4SI_V8HI_UQI:
+     case V8HI_FTYPE_V8SI_V8HI_UQI:
+     case V16QI_FTYPE_V2DI_V16QI_UQI:
+     case V16QI_FTYPE_V4DI_V16QI_UQI:
+     case V8HI_FTYPE_V2DI_V8HI_UQI:
+     case V8HI_FTYPE_V4DI_V8HI_UQI:
+     case V4SI_FTYPE_V2DI_V4SI_UQI:
+     case V4SI_FTYPE_V4DI_V4SI_UQI:
+     case V32QI_FTYPE_V32HI_V32QI_USI:
+     case UHI_FTYPE_V16QI_V16QI_UHI:
+     case USI_FTYPE_V32QI_V32QI_USI:
+     case UDI_FTYPE_V64QI_V64QI_UDI:
+     case UQI_FTYPE_V8HI_V8HI_UQI:
+     case UHI_FTYPE_V16HI_V16HI_UHI:
+     case USI_FTYPE_V32HI_V32HI_USI:
+     case UQI_FTYPE_V4SI_V4SI_UQI:
+     case UQI_FTYPE_V8SI_V8SI_UQI:
+     case UQI_FTYPE_V2DI_V2DI_UQI:
+     case UQI_FTYPE_V4DI_V4DI_UQI:
+     case V4SF_FTYPE_V2DF_V4SF_UQI:
+     case V4SF_FTYPE_V4DF_V4SF_UQI:
+     case V16SI_FTYPE_V16SI_V16SI_UHI:
+     case V16SI_FTYPE_V4SI_V16SI_UHI:
+     case V2DI_FTYPE_V4SI_V2DI_UQI:
+     case V2DI_FTYPE_V8HI_V2DI_UQI:
+     case V2DI_FTYPE_V16QI_V2DI_UQI:
+     case V4DI_FTYPE_V4DI_V4DI_UQI:
+     case V4DI_FTYPE_V4SI_V4DI_UQI:
+     case V4DI_FTYPE_V8HI_V4DI_UQI:
+     case V4DI_FTYPE_V16QI_V4DI_UQI:
+     case V4DI_FTYPE_V4DF_V4DI_UQI:
+     case V2DI_FTYPE_V2DF_V2DI_UQI:
+     case V4SI_FTYPE_V4DF_V4SI_UQI:
+     case V4SI_FTYPE_V2DF_V4SI_UQI:
+     case V4SI_FTYPE_V8HI_V4SI_UQI:
+     case V4SI_FTYPE_V16QI_V4SI_UQI:
+     case V4DI_FTYPE_V4DI_V4DI_V4DI:
+     case V8DF_FTYPE_V2DF_V8DF_UQI:
+     case V8DF_FTYPE_V4DF_V8DF_UQI:
+     case V8DF_FTYPE_V8DF_V8DF_UQI:
+     case V8SF_FTYPE_V8SF_V8SF_UQI:
+     case V8SF_FTYPE_V8SI_V8SF_UQI:
+     case V4DF_FTYPE_V4DF_V4DF_UQI:
+     case V4SF_FTYPE_V4SF_V4SF_UQI:
+     case V2DF_FTYPE_V2DF_V2DF_UQI:
+     case V2DF_FTYPE_V4SF_V2DF_UQI:
+     case V2DF_FTYPE_V4SI_V2DF_UQI:
+     case V4SF_FTYPE_V4SI_V4SF_UQI:
+     case V4DF_FTYPE_V4SF_V4DF_UQI:
+     case V4DF_FTYPE_V4SI_V4DF_UQI:
+     case V8SI_FTYPE_V8SI_V8SI_UQI:
+     case V8SI_FTYPE_V8HI_V8SI_UQI:
+     case V8SI_FTYPE_V16QI_V8SI_UQI:
+     case V8DF_FTYPE_V8SI_V8DF_UQI:
+     case V8DI_FTYPE_DI_V8DI_UQI:
+     case V16SF_FTYPE_V8SF_V16SF_UHI:
+     case V16SI_FTYPE_V8SI_V16SI_UHI:
+     case V16HI_FTYPE_V16HI_V16HI_UHI:
+     case V8HI_FTYPE_V16QI_V8HI_UQI:
+     case V16HI_FTYPE_V16QI_V16HI_UHI:
+     case V32HI_FTYPE_V32HI_V32HI_USI:
+     case V32HI_FTYPE_V32QI_V32HI_USI:
+     case V8DI_FTYPE_V16QI_V8DI_UQI:
+     case V8DI_FTYPE_V2DI_V8DI_UQI:
+     case V8DI_FTYPE_V4DI_V8DI_UQI:
+     case V8DI_FTYPE_V8DI_V8DI_UQI:
+     case V8DI_FTYPE_V8HI_V8DI_UQI:
+     case V8DI_FTYPE_V8SI_V8DI_UQI:
+     case V8HI_FTYPE_V8DI_V8HI_UQI:
+     case V8SI_FTYPE_V8DI_V8SI_UQI:
+     case V4SI_FTYPE_V4SI_V4SI_V4SI:
+     case V16SI_FTYPE_V16SI_V16SI_V16SI:
+     case V8DI_FTYPE_V8DI_V8DI_V8DI:
+     case V32HI_FTYPE_V32HI_V32HI_V32HI:
+     case V2DI_FTYPE_V2DI_V2DI_V2DI:
+     case V16HI_FTYPE_V16HI_V16HI_V16HI:
+     case V8SI_FTYPE_V8SI_V8SI_V8SI:
+     case V8HI_FTYPE_V8HI_V8HI_V8HI:
+     case V32HI_FTYPE_V16SF_V16SF_USI:
+     case V16HI_FTYPE_V8SF_V8SF_UHI:
+     case V8HI_FTYPE_V4SF_V4SF_UQI:
+     case V16HI_FTYPE_V16SF_V16HI_UHI:
+     case V8HI_FTYPE_V8SF_V8HI_UQI:
+     case V8HI_FTYPE_V4SF_V8HI_UQI:
+     case V16SF_FTYPE_V16SF_V32HI_V32HI:
+     case V8SF_FTYPE_V8SF_V16HI_V16HI:
+     case V4SF_FTYPE_V4SF_V8HI_V8HI:
+       nargs = 3;
+       break;
+     case V32QI_FTYPE_V32QI_V32QI_INT:
+     case V16HI_FTYPE_V16HI_V16HI_INT:
+     case V16QI_FTYPE_V16QI_V16QI_INT:
+     case V4DI_FTYPE_V4DI_V4DI_INT:
+     case V8HI_FTYPE_V8HI_V8HI_INT:
+     case V8SI_FTYPE_V8SI_V8SI_INT:
+     case V8SI_FTYPE_V8SI_V4SI_INT:
+     case V8SF_FTYPE_V8SF_V8SF_INT:
+     case V8SF_FTYPE_V8SF_V4SF_INT:
+     case V4SI_FTYPE_V4SI_V4SI_INT:
+     case V4DF_FTYPE_V4DF_V4DF_INT:
+     case V16SF_FTYPE_V16SF_V16SF_INT:
+     case V16SF_FTYPE_V16SF_V4SF_INT:
+     case V16SI_FTYPE_V16SI_V4SI_INT:
+     case V4DF_FTYPE_V4DF_V2DF_INT:
+     case V4SF_FTYPE_V4SF_V4SF_INT:
+     case V2DI_FTYPE_V2DI_V2DI_INT:
+     case V4DI_FTYPE_V4DI_V2DI_INT:
+     case V2DF_FTYPE_V2DF_V2DF_INT:
+     case UQI_FTYPE_V8DI_V8UDI_INT:
+     case UQI_FTYPE_V8DF_V8DF_INT:
+     case UQI_FTYPE_V2DF_V2DF_INT:
+     case UQI_FTYPE_V4SF_V4SF_INT:
+     case UHI_FTYPE_V16SI_V16SI_INT:
+     case UHI_FTYPE_V16SF_V16SF_INT:
+     case V64QI_FTYPE_V64QI_V64QI_INT:
+     case V32HI_FTYPE_V32HI_V32HI_INT:
+     case V16SI_FTYPE_V16SI_V16SI_INT:
+     case V8DI_FTYPE_V8DI_V8DI_INT:
+       nargs = 3;
+       nargs_constant = 1;
+       break;
+     case V4DI_FTYPE_V4DI_V4DI_INT_CONVERT:
+       nargs = 3;
+       rmode = V4DImode;
+       nargs_constant = 1;
+       break;
+     case V2DI_FTYPE_V2DI_V2DI_INT_CONVERT:
+       nargs = 3;
+       rmode = V2DImode;
+       nargs_constant = 1;
+       break;
+     case V1DI_FTYPE_V1DI_V1DI_INT_CONVERT:
+       nargs = 3;
+       rmode = DImode;
+       nargs_constant = 1;
+       break;
+     case V2DI_FTYPE_V2DI_UINT_UINT:
+       nargs = 3;
+       nargs_constant = 2;
+       break;
+     case V8DI_FTYPE_V8DI_V8DI_INT_CONVERT:
+       nargs = 3;
+       rmode = V8DImode;
+       nargs_constant = 1;
+       break;
+     case V8DI_FTYPE_V8DI_V8DI_INT_V8DI_UDI_CONVERT:
+       nargs = 5;
+       rmode = V8DImode;
+       mask_pos = 2;
+       nargs_constant = 1;
+       break;
+     case QI_FTYPE_V8DF_INT_UQI:
+     case QI_FTYPE_V4DF_INT_UQI:
+     case QI_FTYPE_V2DF_INT_UQI:
+     case HI_FTYPE_V16SF_INT_UHI:
+     case QI_FTYPE_V8SF_INT_UQI:
+     case QI_FTYPE_V4SF_INT_UQI:
+     case V4SI_FTYPE_V4SI_V4SI_UHI:
+     case V8SI_FTYPE_V8SI_V8SI_UHI:
+       nargs = 3;
+       mask_pos = 1;
+       nargs_constant = 1;
+       break;
+     case V4DI_FTYPE_V4DI_V4DI_INT_V4DI_USI_CONVERT:
+       nargs = 5;
+       rmode = V4DImode;
+       mask_pos = 2;
+       nargs_constant = 1;
+       break;
+     case V2DI_FTYPE_V2DI_V2DI_INT_V2DI_UHI_CONVERT:
+       nargs = 5;
+       rmode = V2DImode;
+       mask_pos = 2;
+       nargs_constant = 1;
+       break;
+     case V32QI_FTYPE_V32QI_V32QI_V32QI_USI:
+     case V32HI_FTYPE_V32HI_V32HI_V32HI_USI:
+     case V32HI_FTYPE_V64QI_V64QI_V32HI_USI:
+     case V16SI_FTYPE_V32HI_V32HI_V16SI_UHI:
+     case V64QI_FTYPE_V64QI_V64QI_V64QI_UDI:
+     case V32HI_FTYPE_V32HI_V8HI_V32HI_USI:
+     case V16HI_FTYPE_V16HI_V8HI_V16HI_UHI:
+     case V8SI_FTYPE_V8SI_V4SI_V8SI_UQI:
+     case V4DI_FTYPE_V4DI_V2DI_V4DI_UQI:
+     case V64QI_FTYPE_V32HI_V32HI_V64QI_UDI:
+     case V32QI_FTYPE_V16HI_V16HI_V32QI_USI:
+     case V16QI_FTYPE_V8HI_V8HI_V16QI_UHI:
+     case V32HI_FTYPE_V16SI_V16SI_V32HI_USI:
+     case V16HI_FTYPE_V8SI_V8SI_V16HI_UHI:
+     case V8HI_FTYPE_V4SI_V4SI_V8HI_UQI:
+     case V4DF_FTYPE_V4DF_V4DI_V4DF_UQI:
+     case V8SF_FTYPE_V8SF_V8SI_V8SF_UQI:
+     case V4SF_FTYPE_V4SF_V4SI_V4SF_UQI:
+     case V2DF_FTYPE_V2DF_V2DI_V2DF_UQI:
+     case V2DI_FTYPE_V4SI_V4SI_V2DI_UQI:
+     case V4DI_FTYPE_V8SI_V8SI_V4DI_UQI:
+     case V4DF_FTYPE_V4DI_V4DF_V4DF_UQI:
+     case V8SF_FTYPE_V8SI_V8SF_V8SF_UQI:
+     case V2DF_FTYPE_V2DI_V2DF_V2DF_UQI:
+     case V4SF_FTYPE_V4SI_V4SF_V4SF_UQI:
+     case V16SF_FTYPE_V16SF_V16SF_V16SF_UHI:
+     case V16SF_FTYPE_V16SF_V16SI_V16SF_UHI:
+     case V16SF_FTYPE_V16SI_V16SF_V16SF_UHI:
+     case V16SI_FTYPE_V16SI_V16SI_V16SI_UHI:
+     case V16SI_FTYPE_V16SI_V4SI_V16SI_UHI:
+     case V8HI_FTYPE_V8HI_V8HI_V8HI_UQI:
+     case V8SI_FTYPE_V8SI_V8SI_V8SI_UQI:
+     case V4SI_FTYPE_V4SI_V4SI_V4SI_UQI:
+     case V8SF_FTYPE_V8SF_V8SF_V8SF_UQI:
+     case V16QI_FTYPE_V16QI_V16QI_V16QI_UHI:
+     case V16HI_FTYPE_V16HI_V16HI_V16HI_UHI:
+     case V2DI_FTYPE_V2DI_V2DI_V2DI_UQI:
+     case V2DF_FTYPE_V2DF_V2DF_V2DF_UQI:
+     case V4DI_FTYPE_V4DI_V4DI_V4DI_UQI:
+     case V4DF_FTYPE_V4DF_V4DF_V4DF_UQI:
+     case V4SF_FTYPE_V4SF_V4SF_V4SF_UQI:
+     case V8DF_FTYPE_V8DF_V8DF_V8DF_UQI:
+     case V8DF_FTYPE_V8DF_V8DI_V8DF_UQI:
+     case V8DF_FTYPE_V8DI_V8DF_V8DF_UQI:
+     case V8DI_FTYPE_V16SI_V16SI_V8DI_UQI:
+     case V8DI_FTYPE_V8DI_V2DI_V8DI_UQI:
+     case V8DI_FTYPE_V8DI_V8DI_V8DI_UQI:
+     case V8HI_FTYPE_V16QI_V16QI_V8HI_UQI:
+     case V16HI_FTYPE_V32QI_V32QI_V16HI_UHI:
+     case V8SI_FTYPE_V16HI_V16HI_V8SI_UQI:
+     case V4SI_FTYPE_V8HI_V8HI_V4SI_UQI:
+     case V32HI_FTYPE_V16SF_V16SF_V32HI_USI:
+     case V16HI_FTYPE_V8SF_V8SF_V16HI_UHI:
+     case V8HI_FTYPE_V4SF_V4SF_V8HI_UQI:
+       nargs = 4;
+       break;
+     case V2DF_FTYPE_V2DF_V2DF_V2DI_INT:
+     case V4DF_FTYPE_V4DF_V4DF_V4DI_INT:
+     case V4SF_FTYPE_V4SF_V4SF_V4SI_INT:
+     case V8SF_FTYPE_V8SF_V8SF_V8SI_INT:
+     case V16SF_FTYPE_V16SF_V16SF_V16SI_INT:
+       nargs = 4;
+       nargs_constant = 1;
+       break;
+     case UQI_FTYPE_V4DI_V4DI_INT_UQI:
+     case UQI_FTYPE_V8SI_V8SI_INT_UQI:
+     case QI_FTYPE_V4DF_V4DF_INT_UQI:
+     case QI_FTYPE_V8SF_V8SF_INT_UQI:
+     case UQI_FTYPE_V2DI_V2DI_INT_UQI:
+     case UQI_FTYPE_V4SI_V4SI_INT_UQI:
+     case UQI_FTYPE_V2DF_V2DF_INT_UQI:
+     case UQI_FTYPE_V4SF_V4SF_INT_UQI:
+     case UDI_FTYPE_V64QI_V64QI_INT_UDI:
+     case USI_FTYPE_V32QI_V32QI_INT_USI:
+     case UHI_FTYPE_V16QI_V16QI_INT_UHI:
+     case USI_FTYPE_V32HI_V32HI_INT_USI:
+     case UHI_FTYPE_V16HI_V16HI_INT_UHI:
+     case UQI_FTYPE_V8HI_V8HI_INT_UQI:
+       nargs = 4;
+       mask_pos = 1;
+       nargs_constant = 1;
+       break;
+     case V2DI_FTYPE_V2DI_V2DI_UINT_UINT:
+       nargs = 4;
+       nargs_constant = 2;
+       break;
+     case UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED:
+     case UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG:
+     case V16SF_FTYPE_V16SF_V32HI_V32HI_UHI:
+     case V8SF_FTYPE_V8SF_V16HI_V16HI_UQI:
+     case V4SF_FTYPE_V4SF_V8HI_V8HI_UQI:
+       nargs = 4;
+       break;
+     case UQI_FTYPE_V8DI_V8DI_INT_UQI:
+     case UHI_FTYPE_V16SI_V16SI_INT_UHI:
+       mask_pos = 1;
+       nargs = 4;
+       nargs_constant = 1;
+       break;
+     case V8SF_FTYPE_V8SF_INT_V8SF_UQI:
+     case V4SF_FTYPE_V4SF_INT_V4SF_UQI:
+     case V2DF_FTYPE_V4DF_INT_V2DF_UQI:
+     case V2DI_FTYPE_V4DI_INT_V2DI_UQI:
+     case V8SF_FTYPE_V16SF_INT_V8SF_UQI:
+     case V8SI_FTYPE_V16SI_INT_V8SI_UQI:
+     case V2DF_FTYPE_V8DF_INT_V2DF_UQI:
+     case V2DI_FTYPE_V8DI_INT_V2DI_UQI:
+     case V4SF_FTYPE_V8SF_INT_V4SF_UQI:
+     case V4SI_FTYPE_V8SI_INT_V4SI_UQI:
+     case V8HI_FTYPE_V8SF_INT_V8HI_UQI:
+     case V8HI_FTYPE_V4SF_INT_V8HI_UQI:
+     case V32HI_FTYPE_V32HI_INT_V32HI_USI:
+     case V16HI_FTYPE_V16HI_INT_V16HI_UHI:
+     case V8HI_FTYPE_V8HI_INT_V8HI_UQI:
+     case V4DI_FTYPE_V4DI_INT_V4DI_UQI:
+     case V2DI_FTYPE_V2DI_INT_V2DI_UQI:
+     case V8SI_FTYPE_V8SI_INT_V8SI_UQI:
+     case V4SI_FTYPE_V4SI_INT_V4SI_UQI:
+     case V4DF_FTYPE_V4DF_INT_V4DF_UQI:
+     case V2DF_FTYPE_V2DF_INT_V2DF_UQI:
+     case V8DF_FTYPE_V8DF_INT_V8DF_UQI:
+     case V16SF_FTYPE_V16SF_INT_V16SF_UHI:
+     case V16HI_FTYPE_V16SF_INT_V16HI_UHI:
+     case V16SI_FTYPE_V16SI_INT_V16SI_UHI:
+     case V4SI_FTYPE_V16SI_INT_V4SI_UQI:
+     case V4DI_FTYPE_V8DI_INT_V4DI_UQI:
+     case V4DF_FTYPE_V8DF_INT_V4DF_UQI:
+     case V4SF_FTYPE_V16SF_INT_V4SF_UQI:
+     case V8DI_FTYPE_V8DI_INT_V8DI_UQI:
+       nargs = 4;
+       mask_pos = 2;
+       nargs_constant = 1;
+       break;
+     case V16SF_FTYPE_V16SF_V4SF_INT_V16SF_UHI:
+     case V16SI_FTYPE_V16SI_V4SI_INT_V16SI_UHI:
+     case V8DF_FTYPE_V8DF_V8DF_INT_V8DF_UQI:
+     case V8DI_FTYPE_V8DI_V8DI_INT_V8DI_UQI:
+     case V16SF_FTYPE_V16SF_V16SF_INT_V16SF_UHI:
+     case V16SI_FTYPE_V16SI_V16SI_INT_V16SI_UHI:
+     case V4SF_FTYPE_V4SF_V4SF_INT_V4SF_UQI:
+     case V2DF_FTYPE_V2DF_V2DF_INT_V2DF_UQI:
+     case V8DF_FTYPE_V8DF_V4DF_INT_V8DF_UQI:
+     case V8DI_FTYPE_V8DI_V4DI_INT_V8DI_UQI:
+     case V4DF_FTYPE_V4DF_V4DF_INT_V4DF_UQI:
+     case V8SF_FTYPE_V8SF_V8SF_INT_V8SF_UQI:
+     case V8DF_FTYPE_V8DF_V2DF_INT_V8DF_UQI:
+     case V8DI_FTYPE_V8DI_V2DI_INT_V8DI_UQI:
+     case V8SI_FTYPE_V8SI_V8SI_INT_V8SI_UQI:
+     case V4DI_FTYPE_V4DI_V4DI_INT_V4DI_UQI:
+     case V4SI_FTYPE_V4SI_V4SI_INT_V4SI_UQI:
+     case V2DI_FTYPE_V2DI_V2DI_INT_V2DI_UQI:
+     case V32HI_FTYPE_V64QI_V64QI_INT_V32HI_USI:
+     case V16HI_FTYPE_V32QI_V32QI_INT_V16HI_UHI:
+     case V8HI_FTYPE_V16QI_V16QI_INT_V8HI_UQI:
+     case V16SF_FTYPE_V16SF_V8SF_INT_V16SF_UHI:
+     case V16SI_FTYPE_V16SI_V8SI_INT_V16SI_UHI:
+     case V8SF_FTYPE_V8SF_V4SF_INT_V8SF_UQI:
+     case V8SI_FTYPE_V8SI_V4SI_INT_V8SI_UQI:
+     case V4DI_FTYPE_V4DI_V2DI_INT_V4DI_UQI:
+     case V4DF_FTYPE_V4DF_V2DF_INT_V4DF_UQI:
+       nargs = 5;
+       mask_pos = 2;
+       nargs_constant = 1;
+       break;
+     case V8DI_FTYPE_V8DI_V8DI_V8DI_INT_UQI:
+     case V16SI_FTYPE_V16SI_V16SI_V16SI_INT_UHI:
+     case V2DF_FTYPE_V2DF_V2DF_V2DI_INT_UQI:
+     case V4SF_FTYPE_V4SF_V4SF_V4SI_INT_UQI:
+     case V8SF_FTYPE_V8SF_V8SF_V8SI_INT_UQI:
+     case V8SI_FTYPE_V8SI_V8SI_V8SI_INT_UQI:
+     case V4DF_FTYPE_V4DF_V4DF_V4DI_INT_UQI:
+     case V4DI_FTYPE_V4DI_V4DI_V4DI_INT_UQI:
+     case V4SI_FTYPE_V4SI_V4SI_V4SI_INT_UQI:
+     case V2DI_FTYPE_V2DI_V2DI_V2DI_INT_UQI:
+       nargs = 5;
+       mask_pos = 1;
+       nargs_constant = 1;
+       break;
+     case V64QI_FTYPE_V64QI_V64QI_INT_V64QI_UDI:
+     case V32QI_FTYPE_V32QI_V32QI_INT_V32QI_USI:
+     case V16QI_FTYPE_V16QI_V16QI_INT_V16QI_UHI:
+     case V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT:
+     case V16SI_FTYPE_V16SI_V16SI_INT_V16SI_INT:
+     case V8DI_FTYPE_V8DI_V8DI_INT_V8DI_INT:
+     case V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT:
+     case V8SI_FTYPE_V8SI_V8SI_INT_V8SI_INT:
+     case V4DI_FTYPE_V4DI_V4DI_INT_V4DI_INT:
+     case V8HI_FTYPE_V8HI_V8HI_INT_V8HI_INT:
+     case V4SI_FTYPE_V4SI_V4SI_INT_V4SI_INT:
+     case V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT:
+       nargs = 5;
+       mask_pos = 1;
+       nargs_constant = 2;
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   gcc_assert (nargs <= ARRAY_SIZE (args));
+ 
+   if (comparison != UNKNOWN)
+     {
+       gcc_assert (nargs == 2);
+       return ix86_expand_sse_compare (d, exp, target, swap);
+     }
+ 
+   if (rmode == VOIDmode || rmode == tmode)
+     {
+       if (optimize
+ 	  || target == 0
+ 	  || GET_MODE (target) != tmode
+ 	  || !insn_p->operand[0].predicate (target, tmode))
+ 	target = gen_reg_rtx (tmode);
+       else if (memory_operand (target, tmode))
+ 	num_memory++;
+       real_target = target;
+     }
+   else
+     {
+       real_target = gen_reg_rtx (tmode);
+       target = lowpart_subreg (rmode, real_target, tmode);
+     }
+ 
+   for (i = 0; i < nargs; i++)
+     {
+       tree arg = CALL_EXPR_ARG (exp, i);
+       rtx op = expand_normal (arg);
+       machine_mode mode = insn_p->operand[i + 1].mode;
+       bool match = insn_p->operand[i + 1].predicate (op, mode);
+ 
+       if (second_arg_count && i == 1)
+ 	{
+ 	  /* SIMD shift insns take either an 8-bit immediate or
+ 	     register as count.  But builtin functions take int as
+ 	     count.  If count doesn't match, we put it in register.
+ 	     The instructions are using 64-bit count, if op is just
+ 	     32-bit, zero-extend it, as negative shift counts
+ 	     are undefined behavior and zero-extension is more
+ 	     efficient.  */
+ 	  if (!match)
+ 	    {
+ 	      if (SCALAR_INT_MODE_P (GET_MODE (op)))
+ 		op = convert_modes (mode, GET_MODE (op), op, 1);
+ 	      else
+ 		op = lowpart_subreg (mode, op, GET_MODE (op));
+ 	      if (!insn_p->operand[i + 1].predicate (op, mode))
+ 		op = copy_to_reg (op);
+ 	    }
+ 	}
+       else if ((mask_pos && (nargs - i - mask_pos) == nargs_constant) ||
+ 	       (!mask_pos && (nargs - i) <= nargs_constant))
+ 	{
+ 	  if (!match)
+ 	    switch (icode)
+ 	      {
+ 	      case CODE_FOR_avx_vinsertf128v4di:
+ 	      case CODE_FOR_avx_vextractf128v4di:
+ 		error ("the last argument must be an 1-bit immediate");
+ 		return const0_rtx;
+ 
+ 	      case CODE_FOR_avx512f_cmpv8di3_mask:
+ 	      case CODE_FOR_avx512f_cmpv16si3_mask:
+ 	      case CODE_FOR_avx512f_ucmpv8di3_mask:
+ 	      case CODE_FOR_avx512f_ucmpv16si3_mask:
+ 	      case CODE_FOR_avx512vl_cmpv4di3_mask:
+ 	      case CODE_FOR_avx512vl_cmpv8si3_mask:
+ 	      case CODE_FOR_avx512vl_ucmpv4di3_mask:
+ 	      case CODE_FOR_avx512vl_ucmpv8si3_mask:
+ 	      case CODE_FOR_avx512vl_cmpv2di3_mask:
+ 	      case CODE_FOR_avx512vl_cmpv4si3_mask:
+ 	      case CODE_FOR_avx512vl_ucmpv2di3_mask:
+ 	      case CODE_FOR_avx512vl_ucmpv4si3_mask:
+ 		error ("the last argument must be a 3-bit immediate");
+ 		return const0_rtx;
+ 
+ 	      case CODE_FOR_sse4_1_roundsd:
+ 	      case CODE_FOR_sse4_1_roundss:
+ 
+ 	      case CODE_FOR_sse4_1_roundpd:
+ 	      case CODE_FOR_sse4_1_roundps:
+ 	      case CODE_FOR_avx_roundpd256:
+ 	      case CODE_FOR_avx_roundps256:
+ 
+ 	      case CODE_FOR_sse4_1_roundpd_vec_pack_sfix:
+ 	      case CODE_FOR_sse4_1_roundps_sfix:
+ 	      case CODE_FOR_avx_roundpd_vec_pack_sfix256:
+ 	      case CODE_FOR_avx_roundps_sfix256:
+ 
+ 	      case CODE_FOR_sse4_1_blendps:
+ 	      case CODE_FOR_avx_blendpd256:
+ 	      case CODE_FOR_avx_vpermilv4df:
+ 	      case CODE_FOR_avx_vpermilv4df_mask:
+ 	      case CODE_FOR_avx512f_getmantv8df_mask:
+ 	      case CODE_FOR_avx512f_getmantv16sf_mask:
+ 	      case CODE_FOR_avx512vl_getmantv8sf_mask:
+ 	      case CODE_FOR_avx512vl_getmantv4df_mask:
+ 	      case CODE_FOR_avx512vl_getmantv4sf_mask:
+ 	      case CODE_FOR_avx512vl_getmantv2df_mask:
+ 	      case CODE_FOR_avx512dq_rangepv8df_mask_round:
+ 	      case CODE_FOR_avx512dq_rangepv16sf_mask_round:
+ 	      case CODE_FOR_avx512dq_rangepv4df_mask:
+ 	      case CODE_FOR_avx512dq_rangepv8sf_mask:
+ 	      case CODE_FOR_avx512dq_rangepv2df_mask:
+ 	      case CODE_FOR_avx512dq_rangepv4sf_mask:
+ 	      case CODE_FOR_avx_shufpd256_mask:
+ 		error ("the last argument must be a 4-bit immediate");
+ 		return const0_rtx;
+ 
+ 	      case CODE_FOR_sha1rnds4:
+ 	      case CODE_FOR_sse4_1_blendpd:
+ 	      case CODE_FOR_avx_vpermilv2df:
+ 	      case CODE_FOR_avx_vpermilv2df_mask:
+ 	      case CODE_FOR_xop_vpermil2v2df3:
+ 	      case CODE_FOR_xop_vpermil2v4sf3:
+ 	      case CODE_FOR_xop_vpermil2v4df3:
+ 	      case CODE_FOR_xop_vpermil2v8sf3:
+ 	      case CODE_FOR_avx512f_vinsertf32x4_mask:
+ 	      case CODE_FOR_avx512f_vinserti32x4_mask:
+ 	      case CODE_FOR_avx512f_vextractf32x4_mask:
+ 	      case CODE_FOR_avx512f_vextracti32x4_mask:
+ 	      case CODE_FOR_sse2_shufpd:
+ 	      case CODE_FOR_sse2_shufpd_mask:
+ 	      case CODE_FOR_avx512dq_shuf_f64x2_mask:
+ 	      case CODE_FOR_avx512dq_shuf_i64x2_mask:
+ 	      case CODE_FOR_avx512vl_shuf_i32x4_mask:
+ 	      case CODE_FOR_avx512vl_shuf_f32x4_mask:
+ 		error ("the last argument must be a 2-bit immediate");
+ 		return const0_rtx;
+ 
+ 	      case CODE_FOR_avx_vextractf128v4df:
+ 	      case CODE_FOR_avx_vextractf128v8sf:
+ 	      case CODE_FOR_avx_vextractf128v8si:
+ 	      case CODE_FOR_avx_vinsertf128v4df:
+ 	      case CODE_FOR_avx_vinsertf128v8sf:
+ 	      case CODE_FOR_avx_vinsertf128v8si:
+ 	      case CODE_FOR_avx512f_vinsertf64x4_mask:
+ 	      case CODE_FOR_avx512f_vinserti64x4_mask:
+ 	      case CODE_FOR_avx512f_vextractf64x4_mask:
+ 	      case CODE_FOR_avx512f_vextracti64x4_mask:
+ 	      case CODE_FOR_avx512dq_vinsertf32x8_mask:
+ 	      case CODE_FOR_avx512dq_vinserti32x8_mask:
+ 	      case CODE_FOR_avx512vl_vinsertv4df:
+ 	      case CODE_FOR_avx512vl_vinsertv4di:
+ 	      case CODE_FOR_avx512vl_vinsertv8sf:
+ 	      case CODE_FOR_avx512vl_vinsertv8si:
+ 		error ("the last argument must be a 1-bit immediate");
+ 		return const0_rtx;
+ 
+ 	      case CODE_FOR_avx_vmcmpv2df3:
+ 	      case CODE_FOR_avx_vmcmpv4sf3:
+ 	      case CODE_FOR_avx_cmpv2df3:
+ 	      case CODE_FOR_avx_cmpv4sf3:
+ 	      case CODE_FOR_avx_cmpv4df3:
+ 	      case CODE_FOR_avx_cmpv8sf3:
+ 	      case CODE_FOR_avx512f_cmpv8df3_mask:
+ 	      case CODE_FOR_avx512f_cmpv16sf3_mask:
+ 	      case CODE_FOR_avx512f_vmcmpv2df3_mask:
+ 	      case CODE_FOR_avx512f_vmcmpv4sf3_mask:
+ 		error ("the last argument must be a 5-bit immediate");
+ 		return const0_rtx;
+ 
+ 	      default:
+ 		switch (nargs_constant)
+ 		  {
+ 		  case 2:
+ 		    if ((mask_pos && (nargs - i - mask_pos) == nargs_constant) ||
+ 			(!mask_pos && (nargs - i) == nargs_constant))
+ 		      {
+ 			error ("the next to last argument must be an 8-bit immediate");
+ 			break;
+ 		      }
+ 		    /* FALLTHRU */
+ 		  case 1:
+ 		    error ("the last argument must be an 8-bit immediate");
+ 		    break;
+ 		  default:
+ 		    gcc_unreachable ();
+ 		  }
+ 		return const0_rtx;
+ 	      }
+ 	}
+       else
+ 	{
+ 	  if (VECTOR_MODE_P (mode))
+ 	    op = safe_vector_operand (op, mode);
+ 
+ 	  /* If we aren't optimizing, only allow one memory operand to
+ 	     be generated.  */
+ 	  if (memory_operand (op, mode))
+ 	    num_memory++;
+ 
+ 	  op = fixup_modeless_constant (op, mode);
+ 
+ 	  if (GET_MODE (op) == mode || GET_MODE (op) == VOIDmode)
+ 	    {
+ 	      if (optimize || !match || num_memory > 1)
+ 		op = copy_to_mode_reg (mode, op);
+ 	    }
+ 	  else
+ 	    {
+ 	      op = copy_to_reg (op);
+ 	      op = lowpart_subreg (mode, op, GET_MODE (op));
+ 	    }
+ 	}
+ 
+       args[i].op = op;
+       args[i].mode = mode;
+     }
+ 
+   switch (nargs)
+     {
+     case 1:
+       pat = GEN_FCN (icode) (real_target, args[0].op);
+       break;
+     case 2:
+       pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op);
+       break;
+     case 3:
+       pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
+ 			     args[2].op);
+       break;
+     case 4:
+       pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
+ 			     args[2].op, args[3].op);
+       break;
+     case 5:
+       pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
+ 			     args[2].op, args[3].op, args[4].op);
+       break;
+     case 6:
+       pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
+ 			     args[2].op, args[3].op, args[4].op,
+ 			     args[5].op);
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   if (! pat)
+     return 0;
+ 
+   emit_insn (pat);
+   return target;
+ }
+ 
+ /* Transform pattern of following layout:
+      (set A
+        (unspec [B C] UNSPEC_EMBEDDED_ROUNDING))
+      )
+    into:
+      (set (A B)) */
+ 
+ static rtx
+ ix86_erase_embedded_rounding (rtx pat)
+ {
+   if (GET_CODE (pat) == INSN)
+     pat = PATTERN (pat);
+ 
+   gcc_assert (GET_CODE (pat) == SET);
+   rtx src = SET_SRC (pat);
+   gcc_assert (XVECLEN (src, 0) == 2);
+   rtx p0 = XVECEXP (src, 0, 0);
+   gcc_assert (GET_CODE (src) == UNSPEC
+ 	      && XINT (src, 1) == UNSPEC_EMBEDDED_ROUNDING);
+   rtx res = gen_rtx_SET (SET_DEST (pat), p0);
+   return res;
+ }
+ 
+ /* Subroutine of ix86_expand_round_builtin to take care of comi insns
+    with rounding.  */
+ static rtx
+ ix86_expand_sse_comi_round (const struct builtin_description *d,
+ 			    tree exp, rtx target)
+ {
+   rtx pat, set_dst;
+   tree arg0 = CALL_EXPR_ARG (exp, 0);
+   tree arg1 = CALL_EXPR_ARG (exp, 1);
+   tree arg2 = CALL_EXPR_ARG (exp, 2);
+   tree arg3 = CALL_EXPR_ARG (exp, 3);
+   rtx op0 = expand_normal (arg0);
+   rtx op1 = expand_normal (arg1);
+   rtx op2 = expand_normal (arg2);
+   rtx op3 = expand_normal (arg3);
+   enum insn_code icode = d->icode;
+   const struct insn_data_d *insn_p = &insn_data[icode];
+   machine_mode mode0 = insn_p->operand[0].mode;
+   machine_mode mode1 = insn_p->operand[1].mode;
+ 
+   /* See avxintrin.h for values.  */
+   static const enum rtx_code comparisons[32] =
+     {
+       EQ, LT, LE, UNORDERED, NE, UNGE, UNGT, ORDERED,
+       UNEQ, UNLT, UNLE, UNORDERED, LTGT, GE, GT, ORDERED,
+       EQ, LT, LE, UNORDERED, NE, UNGE, UNGT, ORDERED,
+       UNEQ, UNLT, UNLE, UNORDERED, LTGT, GE, GT, ORDERED
+     };
+   static const bool ordereds[32] =
+     {
+       true,  true,  true,  false, false, false, false, true,
+       false, false, false, true,  true,  true,  true,  false,
+       true,  true,  true,  false, false, false, false, true,
+       false, false, false, true,  true,  true,  true,  false
+     };
+   static const bool non_signalings[32] =
+     {
+       true,  false, false, true,  true,  false, false, true,
+       true,  false, false, true,  true,  false, false, true,
+       false, true,  true,  false, false, true,  true,  false,
+       false, true,  true,  false, false, true,  true,  false
+     };
+ 
+   if (!CONST_INT_P (op2))
+     {
+       error ("the third argument must be comparison constant");
+       return const0_rtx;
+     }
+   if (INTVAL (op2) < 0 || INTVAL (op2) >= 32)
+     {
+       error ("incorrect comparison mode");
+       return const0_rtx;
+     }
+ 
+   if (!insn_p->operand[2].predicate (op3, SImode))
+     {
+       error ("incorrect rounding operand");
+       return const0_rtx;
+     }
+ 
+   if (VECTOR_MODE_P (mode0))
+     op0 = safe_vector_operand (op0, mode0);
+   if (VECTOR_MODE_P (mode1))
+     op1 = safe_vector_operand (op1, mode1);
+ 
+   enum rtx_code comparison = comparisons[INTVAL (op2)];
+   bool ordered = ordereds[INTVAL (op2)];
+   bool non_signaling = non_signalings[INTVAL (op2)];
+   rtx const_val = const0_rtx;
+ 
+   bool check_unordered = false;
+   machine_mode mode = CCFPmode;
+   switch (comparison)
+     {
+     case ORDERED:
+       if (!ordered)
+ 	{
+ 	  /* NB: Use CCSmode/NE for _CMP_TRUE_UQ/_CMP_TRUE_US.  */
+ 	  if (!non_signaling)
+ 	    ordered = true;
+ 	  mode = CCSmode;
+ 	}
+       else
+ 	{
+ 	  /* NB: Use CCPmode/NE for _CMP_ORD_Q/_CMP_ORD_S.  */
+ 	  if (non_signaling)
+ 	    ordered = false;
+ 	  mode = CCPmode;
+ 	}
+       comparison = NE;
+       break;
+     case UNORDERED:
+       if (ordered)
+ 	{
+ 	  /* NB: Use CCSmode/EQ for _CMP_FALSE_OQ/_CMP_FALSE_OS.  */
+ 	  if (non_signaling)
+ 	    ordered = false;
+ 	  mode = CCSmode;
+ 	}
+       else
+ 	{
+ 	  /* NB: Use CCPmode/NE for _CMP_UNORD_Q/_CMP_UNORD_S.  */
+ 	  if (!non_signaling)
+ 	    ordered = true;
+ 	  mode = CCPmode;
+ 	}
+       comparison = EQ;
+       break;
+ 
+     case LE:	/* -> GE  */
+     case LT:	/* -> GT  */
+     case UNGE:	/* -> UNLE  */
+     case UNGT:	/* -> UNLT  */
+       std::swap (op0, op1);
+       comparison = swap_condition (comparison);
+       /* FALLTHRU */
+     case GT:
+     case GE:
+     case UNEQ:
+     case UNLT:
+     case UNLE:
+     case LTGT:
+       /* These are supported by CCFPmode.  NB: Use ordered/signaling
+ 	 COMI or unordered/non-signaling UCOMI.  Both set ZF, PF, CF
+ 	 with NAN operands.  */
+       if (ordered == non_signaling)
+ 	ordered = !ordered;
+       break;
+     case EQ:
+       /* NB: COMI/UCOMI will set ZF with NAN operands.  Use CCZmode for
+ 	 _CMP_EQ_OQ/_CMP_EQ_OS.  */
+       check_unordered = true;
+       mode = CCZmode;
+       break;
+     case NE:
+       /* NB: COMI/UCOMI will set ZF with NAN operands.  Use CCZmode for
+ 	 _CMP_NEQ_UQ/_CMP_NEQ_US.  */
+       gcc_assert (!ordered);
+       check_unordered = true;
+       mode = CCZmode;
+       const_val = const1_rtx;
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   target = gen_reg_rtx (SImode);
+   emit_move_insn (target, const_val);
+   target = gen_rtx_SUBREG (QImode, target, 0);
+ 
+   if ((optimize && !register_operand (op0, mode0))
+       || !insn_p->operand[0].predicate (op0, mode0))
+     op0 = copy_to_mode_reg (mode0, op0);
+   if ((optimize && !register_operand (op1, mode1))
+       || !insn_p->operand[1].predicate (op1, mode1))
+     op1 = copy_to_mode_reg (mode1, op1);
+ 
+   /*
+      1. COMI: ordered and signaling.
+      2. UCOMI: unordered and non-signaling.
+    */
+   if (non_signaling)
+     icode = (icode == CODE_FOR_sse_comi_round
+ 	     ? CODE_FOR_sse_ucomi_round
+ 	     : CODE_FOR_sse2_ucomi_round);
+ 
+   pat = GEN_FCN (icode) (op0, op1, op3);
+   if (! pat)
+     return 0;
+ 
+   /* Rounding operand can be either NO_ROUND or ROUND_SAE at this point.  */
+   if (INTVAL (op3) == NO_ROUND)
+     {
+       pat = ix86_erase_embedded_rounding (pat);
+       if (! pat)
+ 	return 0;
+ 
+       set_dst = SET_DEST (pat);
+     }
+   else
+     {
+       gcc_assert (GET_CODE (pat) == SET);
+       set_dst = SET_DEST (pat);
+     }
+ 
+   emit_insn (pat);
+ 
+   rtx_code_label *label = NULL;
+ 
+   /* NB: For ordered EQ or unordered NE, check ZF alone isn't sufficient
+      with NAN operands.  */
+   if (check_unordered)
+     {
+       gcc_assert (comparison == EQ || comparison == NE);
+ 
+       rtx flag = gen_rtx_REG (CCFPmode, FLAGS_REG);
+       label = gen_label_rtx ();
+       rtx tmp = gen_rtx_fmt_ee (UNORDERED, VOIDmode, flag, const0_rtx);
+       tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp,
+ 				  gen_rtx_LABEL_REF (VOIDmode, label),
+ 				  pc_rtx);
+       emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
+     }
+ 
+   /* NB: Set CCFPmode and check a different CCmode which is in subset
+      of CCFPmode.  */
+   if (GET_MODE (set_dst) != mode)
+     {
+       gcc_assert (mode == CCAmode || mode == CCCmode
+ 		  || mode == CCOmode || mode == CCPmode
+ 		  || mode == CCSmode || mode == CCZmode);
+       set_dst = gen_rtx_REG (mode, FLAGS_REG);
+     }
+ 
+   emit_insn (gen_rtx_SET (gen_rtx_STRICT_LOW_PART (VOIDmode, target),
+ 			  gen_rtx_fmt_ee (comparison, QImode,
+ 					  set_dst,
+ 					  const0_rtx)));
+ 
+   if (label)
+     emit_label (label);
+ 
+   return SUBREG_REG (target);
+ }
+ 
+ static rtx
+ ix86_expand_round_builtin (const struct builtin_description *d,
+ 			   tree exp, rtx target)
+ {
+   rtx pat;
+   unsigned int i, nargs;
+   struct
+     {
+       rtx op;
+       machine_mode mode;
+     } args[6];
+   enum insn_code icode = d->icode;
+   const struct insn_data_d *insn_p = &insn_data[icode];
+   machine_mode tmode = insn_p->operand[0].mode;
+   unsigned int nargs_constant = 0;
+   unsigned int redundant_embed_rnd = 0;
+ 
+   switch ((enum ix86_builtin_func_type) d->flag)
+     {
+     case UINT64_FTYPE_V2DF_INT:
+     case UINT64_FTYPE_V4SF_INT:
+     case UINT_FTYPE_V2DF_INT:
+     case UINT_FTYPE_V4SF_INT:
+     case INT64_FTYPE_V2DF_INT:
+     case INT64_FTYPE_V4SF_INT:
+     case INT_FTYPE_V2DF_INT:
+     case INT_FTYPE_V4SF_INT:
+       nargs = 2;
+       break;
+     case V4SF_FTYPE_V4SF_UINT_INT:
+     case V4SF_FTYPE_V4SF_UINT64_INT:
+     case V2DF_FTYPE_V2DF_UINT64_INT:
+     case V4SF_FTYPE_V4SF_INT_INT:
+     case V4SF_FTYPE_V4SF_INT64_INT:
+     case V2DF_FTYPE_V2DF_INT64_INT:
+     case V4SF_FTYPE_V4SF_V4SF_INT:
+     case V2DF_FTYPE_V2DF_V2DF_INT:
+     case V4SF_FTYPE_V4SF_V2DF_INT:
+     case V2DF_FTYPE_V2DF_V4SF_INT:
+       nargs = 3;
+       break;
+     case V8SF_FTYPE_V8DF_V8SF_QI_INT:
+     case V8DF_FTYPE_V8DF_V8DF_QI_INT:
+     case V8SI_FTYPE_V8DF_V8SI_QI_INT:
+     case V8DI_FTYPE_V8DF_V8DI_QI_INT:
+     case V8SF_FTYPE_V8DI_V8SF_QI_INT:
+     case V8DF_FTYPE_V8DI_V8DF_QI_INT:
+     case V16SF_FTYPE_V16SF_V16SF_HI_INT:
+     case V8DI_FTYPE_V8SF_V8DI_QI_INT:
+     case V16SF_FTYPE_V16SI_V16SF_HI_INT:
+     case V16SI_FTYPE_V16SF_V16SI_HI_INT:
+     case V8DF_FTYPE_V8SF_V8DF_QI_INT:
+     case V16SF_FTYPE_V16HI_V16SF_HI_INT:
+     case V2DF_FTYPE_V2DF_V2DF_V2DF_INT:
+     case V4SF_FTYPE_V4SF_V4SF_V4SF_INT:
+       nargs = 4;
+       break;
+     case V4SF_FTYPE_V4SF_V4SF_INT_INT:
+     case V2DF_FTYPE_V2DF_V2DF_INT_INT:
+       nargs_constant = 2;
+       nargs = 4;
+       break;
+     case INT_FTYPE_V4SF_V4SF_INT_INT:
+     case INT_FTYPE_V2DF_V2DF_INT_INT:
+       return ix86_expand_sse_comi_round (d, exp, target);
+     case V8DF_FTYPE_V8DF_V8DF_V8DF_UQI_INT:
+     case V2DF_FTYPE_V2DF_V2DF_V2DF_UQI_INT:
+     case V4SF_FTYPE_V4SF_V4SF_V4SF_UQI_INT:
+     case V16SF_FTYPE_V16SF_V16SF_V16SF_HI_INT:
+     case V2DF_FTYPE_V2DF_V2DF_V2DF_QI_INT:
+     case V2DF_FTYPE_V2DF_V4SF_V2DF_QI_INT:
+     case V4SF_FTYPE_V4SF_V4SF_V4SF_QI_INT:
+     case V4SF_FTYPE_V4SF_V2DF_V4SF_QI_INT:
+       nargs = 5;
+       break;
+     case V16SF_FTYPE_V16SF_INT_V16SF_HI_INT:
+     case V8DF_FTYPE_V8DF_INT_V8DF_QI_INT:
+       nargs_constant = 4;
+       nargs = 5;
+       break;
+     case UQI_FTYPE_V8DF_V8DF_INT_UQI_INT:
+     case UQI_FTYPE_V2DF_V2DF_INT_UQI_INT:
+     case UHI_FTYPE_V16SF_V16SF_INT_UHI_INT:
+     case UQI_FTYPE_V4SF_V4SF_INT_UQI_INT:
+       nargs_constant = 3;
+       nargs = 5;
+       break;
+     case V16SF_FTYPE_V16SF_V16SF_INT_V16SF_HI_INT:
+     case V8DF_FTYPE_V8DF_V8DF_INT_V8DF_QI_INT:
+     case V4SF_FTYPE_V4SF_V4SF_INT_V4SF_QI_INT:
+     case V2DF_FTYPE_V2DF_V2DF_INT_V2DF_QI_INT:
+     case V2DF_FTYPE_V2DF_V2DF_INT_V2DF_UQI_INT:
+     case V4SF_FTYPE_V4SF_V4SF_INT_V4SF_UQI_INT:
+       nargs = 6;
+       nargs_constant = 4;
+       break;
+     case V8DF_FTYPE_V8DF_V8DF_V8DI_INT_QI_INT:
+     case V16SF_FTYPE_V16SF_V16SF_V16SI_INT_HI_INT:
+     case V2DF_FTYPE_V2DF_V2DF_V2DI_INT_QI_INT:
+     case V4SF_FTYPE_V4SF_V4SF_V4SI_INT_QI_INT:
+       nargs = 6;
+       nargs_constant = 3;
+       break;
+     default:
+       gcc_unreachable ();
+     }
+   gcc_assert (nargs <= ARRAY_SIZE (args));
+ 
+   if (optimize
+       || target == 0
+       || GET_MODE (target) != tmode
+       || !insn_p->operand[0].predicate (target, tmode))
+     target = gen_reg_rtx (tmode);
+ 
+   for (i = 0; i < nargs; i++)
+     {
+       tree arg = CALL_EXPR_ARG (exp, i);
+       rtx op = expand_normal (arg);
+       machine_mode mode = insn_p->operand[i + 1].mode;
+       bool match = insn_p->operand[i + 1].predicate (op, mode);
+ 
+       if (i == nargs - nargs_constant)
+ 	{
+ 	  if (!match)
+ 	    {
+ 	      switch (icode)
+ 		{
+ 		case CODE_FOR_avx512f_getmantv8df_mask_round:
+ 		case CODE_FOR_avx512f_getmantv16sf_mask_round:
+ 		case CODE_FOR_avx512f_vgetmantv2df_round:
+ 		case CODE_FOR_avx512f_vgetmantv2df_mask_round:
+ 		case CODE_FOR_avx512f_vgetmantv4sf_round:
+ 		case CODE_FOR_avx512f_vgetmantv4sf_mask_round:
+ 		  error ("the immediate argument must be a 4-bit immediate");
+ 		  return const0_rtx;
+ 		case CODE_FOR_avx512f_cmpv8df3_mask_round:
+ 		case CODE_FOR_avx512f_cmpv16sf3_mask_round:
+ 		case CODE_FOR_avx512f_vmcmpv2df3_mask_round:
+ 		case CODE_FOR_avx512f_vmcmpv4sf3_mask_round:
+ 		  error ("the immediate argument must be a 5-bit immediate");
+ 		  return const0_rtx;
+ 		default:
+ 		  error ("the immediate argument must be an 8-bit immediate");
+ 		  return const0_rtx;
+ 		}
+ 	    }
+ 	}
+       else if (i == nargs-1)
+ 	{
+ 	  if (!insn_p->operand[nargs].predicate (op, SImode))
+ 	    {
+ 	      error ("incorrect rounding operand");
+ 	      return const0_rtx;
+ 	    }
+ 
+ 	  /* If there is no rounding use normal version of the pattern.  */
+ 	  if (INTVAL (op) == NO_ROUND)
+ 	    redundant_embed_rnd = 1;
+ 	}
+       else
+ 	{
+ 	  if (VECTOR_MODE_P (mode))
+ 	    op = safe_vector_operand (op, mode);
+ 
+ 	  op = fixup_modeless_constant (op, mode);
+ 
+ 	  if (GET_MODE (op) == mode || GET_MODE (op) == VOIDmode)
+ 	    {
+ 	      if (optimize || !match)
+ 		op = copy_to_mode_reg (mode, op);
+ 	    }
+ 	  else
+ 	    {
+ 	      op = copy_to_reg (op);
+ 	      op = lowpart_subreg (mode, op, GET_MODE (op));
+ 	    }
+ 	}
+ 
+       args[i].op = op;
+       args[i].mode = mode;
+     }
+ 
+   switch (nargs)
+     {
+     case 1:
+       pat = GEN_FCN (icode) (target, args[0].op);
+       break;
+     case 2:
+       pat = GEN_FCN (icode) (target, args[0].op, args[1].op);
+       break;
+     case 3:
+       pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
+ 			     args[2].op);
+       break;
+     case 4:
+       pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
+ 			     args[2].op, args[3].op);
+       break;
+     case 5:
+       pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
+ 			     args[2].op, args[3].op, args[4].op);
+       break;
+     case 6:
+       pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
+ 			     args[2].op, args[3].op, args[4].op,
+ 			     args[5].op);
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   if (!pat)
+     return 0;
+ 
+   if (redundant_embed_rnd)
+     pat = ix86_erase_embedded_rounding (pat);
+ 
+   emit_insn (pat);
+   return target;
+ }
+ 
+ /* Subroutine of ix86_expand_builtin to take care of special insns
+    with variable number of operands.  */
+ 
+ static rtx
+ ix86_expand_special_args_builtin (const struct builtin_description *d,
+ 				  tree exp, rtx target)
+ {
+   tree arg;
+   rtx pat, op;
+   unsigned int i, nargs, arg_adjust, memory;
+   bool aligned_mem = false;
+   struct
+     {
+       rtx op;
+       machine_mode mode;
+     } args[3];
+   enum insn_code icode = d->icode;
+   bool last_arg_constant = false;
+   const struct insn_data_d *insn_p = &insn_data[icode];
+   machine_mode tmode = insn_p->operand[0].mode;
+   enum { load, store } klass;
+ 
+   switch ((enum ix86_builtin_func_type) d->flag)
+     {
+     case VOID_FTYPE_VOID:
+       emit_insn (GEN_FCN (icode) (target));
+       return 0;
+     case VOID_FTYPE_UINT64:
+     case VOID_FTYPE_UNSIGNED:
+       nargs = 0;
+       klass = store;
+       memory = 0;
+       break;
+ 
+     case INT_FTYPE_VOID:
+     case USHORT_FTYPE_VOID:
+     case UINT64_FTYPE_VOID:
+     case UINT_FTYPE_VOID:
+     case UNSIGNED_FTYPE_VOID:
+       nargs = 0;
+       klass = load;
+       memory = 0;
+       break;
+     case UINT64_FTYPE_PUNSIGNED:
+     case V2DI_FTYPE_PV2DI:
+     case V4DI_FTYPE_PV4DI:
+     case V32QI_FTYPE_PCCHAR:
+     case V16QI_FTYPE_PCCHAR:
+     case V8SF_FTYPE_PCV4SF:
+     case V8SF_FTYPE_PCFLOAT:
+     case V4SF_FTYPE_PCFLOAT:
+     case V4DF_FTYPE_PCV2DF:
+     case V4DF_FTYPE_PCDOUBLE:
+     case V2DF_FTYPE_PCDOUBLE:
+     case VOID_FTYPE_PVOID:
+     case V8DI_FTYPE_PV8DI:
+       nargs = 1;
+       klass = load;
+       memory = 0;
+       switch (icode)
+ 	{
+ 	case CODE_FOR_sse4_1_movntdqa:
+ 	case CODE_FOR_avx2_movntdqa:
+ 	case CODE_FOR_avx512f_movntdqa:
+ 	  aligned_mem = true;
+ 	  break;
+ 	default:
+ 	  break;
+ 	}
+       break;
+     case VOID_FTYPE_PV2SF_V4SF:
+     case VOID_FTYPE_PV8DI_V8DI:
+     case VOID_FTYPE_PV4DI_V4DI:
+     case VOID_FTYPE_PV2DI_V2DI:
+     case VOID_FTYPE_PCHAR_V32QI:
+     case VOID_FTYPE_PCHAR_V16QI:
+     case VOID_FTYPE_PFLOAT_V16SF:
+     case VOID_FTYPE_PFLOAT_V8SF:
+     case VOID_FTYPE_PFLOAT_V4SF:
+     case VOID_FTYPE_PDOUBLE_V8DF:
+     case VOID_FTYPE_PDOUBLE_V4DF:
+     case VOID_FTYPE_PDOUBLE_V2DF:
+     case VOID_FTYPE_PLONGLONG_LONGLONG:
+     case VOID_FTYPE_PULONGLONG_ULONGLONG:
+     case VOID_FTYPE_PUNSIGNED_UNSIGNED:
+     case VOID_FTYPE_PINT_INT:
+       nargs = 1;
+       klass = store;
+       /* Reserve memory operand for target.  */
+       memory = ARRAY_SIZE (args);
+       switch (icode)
+ 	{
+ 	/* These builtins and instructions require the memory
+ 	   to be properly aligned.  */
+ 	case CODE_FOR_avx_movntv4di:
+ 	case CODE_FOR_sse2_movntv2di:
+ 	case CODE_FOR_avx_movntv8sf:
+ 	case CODE_FOR_sse_movntv4sf:
+ 	case CODE_FOR_sse4a_vmmovntv4sf:
+ 	case CODE_FOR_avx_movntv4df:
+ 	case CODE_FOR_sse2_movntv2df:
+ 	case CODE_FOR_sse4a_vmmovntv2df:
+ 	case CODE_FOR_sse2_movntidi:
+ 	case CODE_FOR_sse_movntq:
+ 	case CODE_FOR_sse2_movntisi:
+ 	case CODE_FOR_avx512f_movntv16sf:
+ 	case CODE_FOR_avx512f_movntv8df:
+ 	case CODE_FOR_avx512f_movntv8di:
+ 	  aligned_mem = true;
+ 	  break;
+ 	default:
+ 	  break;
+ 	}
+       break;
+     case VOID_FTYPE_PVOID_PCVOID:
+ 	nargs = 1;
+ 	klass = store;
+ 	memory = 0;
+ 
+ 	break;
+     case V4SF_FTYPE_V4SF_PCV2SF:
+     case V2DF_FTYPE_V2DF_PCDOUBLE:
+       nargs = 2;
+       klass = load;
+       memory = 1;
+       break;
+     case V8SF_FTYPE_PCV8SF_V8SI:
+     case V4DF_FTYPE_PCV4DF_V4DI:
+     case V4SF_FTYPE_PCV4SF_V4SI:
+     case V2DF_FTYPE_PCV2DF_V2DI:
+     case V8SI_FTYPE_PCV8SI_V8SI:
+     case V4DI_FTYPE_PCV4DI_V4DI:
+     case V4SI_FTYPE_PCV4SI_V4SI:
+     case V2DI_FTYPE_PCV2DI_V2DI:
+     case VOID_FTYPE_INT_INT64:
+       nargs = 2;
+       klass = load;
+       memory = 0;
+       break;
+     case VOID_FTYPE_PV8DF_V8DF_UQI:
+     case VOID_FTYPE_PV4DF_V4DF_UQI:
+     case VOID_FTYPE_PV2DF_V2DF_UQI:
+     case VOID_FTYPE_PV16SF_V16SF_UHI:
+     case VOID_FTYPE_PV8SF_V8SF_UQI:
+     case VOID_FTYPE_PV4SF_V4SF_UQI:
+     case VOID_FTYPE_PV8DI_V8DI_UQI:
+     case VOID_FTYPE_PV4DI_V4DI_UQI:
+     case VOID_FTYPE_PV2DI_V2DI_UQI:
+     case VOID_FTYPE_PV16SI_V16SI_UHI:
+     case VOID_FTYPE_PV8SI_V8SI_UQI:
+     case VOID_FTYPE_PV4SI_V4SI_UQI:
+     case VOID_FTYPE_PV64QI_V64QI_UDI:
+     case VOID_FTYPE_PV32HI_V32HI_USI:
+     case VOID_FTYPE_PV32QI_V32QI_USI:
+     case VOID_FTYPE_PV16QI_V16QI_UHI:
+     case VOID_FTYPE_PV16HI_V16HI_UHI:
+     case VOID_FTYPE_PV8HI_V8HI_UQI:
+       switch (icode)
+ 	{
+ 	/* These builtins and instructions require the memory
+ 	   to be properly aligned.  */
+ 	case CODE_FOR_avx512f_storev16sf_mask:
+ 	case CODE_FOR_avx512f_storev16si_mask:
+ 	case CODE_FOR_avx512f_storev8df_mask:
+ 	case CODE_FOR_avx512f_storev8di_mask:
+ 	case CODE_FOR_avx512vl_storev8sf_mask:
+ 	case CODE_FOR_avx512vl_storev8si_mask:
+ 	case CODE_FOR_avx512vl_storev4df_mask:
+ 	case CODE_FOR_avx512vl_storev4di_mask:
+ 	case CODE_FOR_avx512vl_storev4sf_mask:
+ 	case CODE_FOR_avx512vl_storev4si_mask:
+ 	case CODE_FOR_avx512vl_storev2df_mask:
+ 	case CODE_FOR_avx512vl_storev2di_mask:
+ 	  aligned_mem = true;
+ 	  break;
+ 	default:
+ 	  break;
+ 	}
+       /* FALLTHRU */
+     case VOID_FTYPE_PV8SF_V8SI_V8SF:
+     case VOID_FTYPE_PV4DF_V4DI_V4DF:
+     case VOID_FTYPE_PV4SF_V4SI_V4SF:
+     case VOID_FTYPE_PV2DF_V2DI_V2DF:
+     case VOID_FTYPE_PV8SI_V8SI_V8SI:
+     case VOID_FTYPE_PV4DI_V4DI_V4DI:
+     case VOID_FTYPE_PV4SI_V4SI_V4SI:
+     case VOID_FTYPE_PV2DI_V2DI_V2DI:
+     case VOID_FTYPE_PV8SI_V8DI_UQI:
+     case VOID_FTYPE_PV8HI_V8DI_UQI:
+     case VOID_FTYPE_PV16HI_V16SI_UHI:
+     case VOID_FTYPE_PV16QI_V8DI_UQI:
+     case VOID_FTYPE_PV16QI_V16SI_UHI:
+     case VOID_FTYPE_PV4SI_V4DI_UQI:
+     case VOID_FTYPE_PV4SI_V2DI_UQI:
+     case VOID_FTYPE_PV8HI_V4DI_UQI:
+     case VOID_FTYPE_PV8HI_V2DI_UQI:
+     case VOID_FTYPE_PV8HI_V8SI_UQI:
+     case VOID_FTYPE_PV8HI_V4SI_UQI:
+     case VOID_FTYPE_PV16QI_V4DI_UQI:
+     case VOID_FTYPE_PV16QI_V2DI_UQI:
+     case VOID_FTYPE_PV16QI_V8SI_UQI:
+     case VOID_FTYPE_PV16QI_V4SI_UQI:
+     case VOID_FTYPE_PCHAR_V64QI_UDI:
+     case VOID_FTYPE_PCHAR_V32QI_USI:
+     case VOID_FTYPE_PCHAR_V16QI_UHI:
+     case VOID_FTYPE_PSHORT_V32HI_USI:
+     case VOID_FTYPE_PSHORT_V16HI_UHI:
+     case VOID_FTYPE_PSHORT_V8HI_UQI:
+     case VOID_FTYPE_PINT_V16SI_UHI:
+     case VOID_FTYPE_PINT_V8SI_UQI:
+     case VOID_FTYPE_PINT_V4SI_UQI:
+     case VOID_FTYPE_PINT64_V8DI_UQI:
+     case VOID_FTYPE_PINT64_V4DI_UQI:
+     case VOID_FTYPE_PINT64_V2DI_UQI:
+     case VOID_FTYPE_PDOUBLE_V8DF_UQI:
+     case VOID_FTYPE_PDOUBLE_V4DF_UQI:
+     case VOID_FTYPE_PDOUBLE_V2DF_UQI:
+     case VOID_FTYPE_PFLOAT_V16SF_UHI:
+     case VOID_FTYPE_PFLOAT_V8SF_UQI:
+     case VOID_FTYPE_PFLOAT_V4SF_UQI:
+     case VOID_FTYPE_PV32QI_V32HI_USI:
+     case VOID_FTYPE_PV16QI_V16HI_UHI:
+     case VOID_FTYPE_PV8QI_V8HI_UQI:
+       nargs = 2;
+       klass = store;
+       /* Reserve memory operand for target.  */
+       memory = ARRAY_SIZE (args);
+       break;
+     case V4SF_FTYPE_PCV4SF_V4SF_UQI:
+     case V8SF_FTYPE_PCV8SF_V8SF_UQI:
+     case V16SF_FTYPE_PCV16SF_V16SF_UHI:
+     case V4SI_FTYPE_PCV4SI_V4SI_UQI:
+     case V8SI_FTYPE_PCV8SI_V8SI_UQI:
+     case V16SI_FTYPE_PCV16SI_V16SI_UHI:
+     case V2DF_FTYPE_PCV2DF_V2DF_UQI:
+     case V4DF_FTYPE_PCV4DF_V4DF_UQI:
+     case V8DF_FTYPE_PCV8DF_V8DF_UQI:
+     case V2DI_FTYPE_PCV2DI_V2DI_UQI:
+     case V4DI_FTYPE_PCV4DI_V4DI_UQI:
+     case V8DI_FTYPE_PCV8DI_V8DI_UQI:
+     case V64QI_FTYPE_PCV64QI_V64QI_UDI:
+     case V32HI_FTYPE_PCV32HI_V32HI_USI:
+     case V32QI_FTYPE_PCV32QI_V32QI_USI:
+     case V16QI_FTYPE_PCV16QI_V16QI_UHI:
+     case V16HI_FTYPE_PCV16HI_V16HI_UHI:
+     case V8HI_FTYPE_PCV8HI_V8HI_UQI:
+       switch (icode)
+ 	{
+ 	/* These builtins and instructions require the memory
+ 	   to be properly aligned.  */
+ 	case CODE_FOR_avx512f_loadv16sf_mask:
+ 	case CODE_FOR_avx512f_loadv16si_mask:
+ 	case CODE_FOR_avx512f_loadv8df_mask:
+ 	case CODE_FOR_avx512f_loadv8di_mask:
+ 	case CODE_FOR_avx512vl_loadv8sf_mask:
+ 	case CODE_FOR_avx512vl_loadv8si_mask:
+ 	case CODE_FOR_avx512vl_loadv4df_mask:
+ 	case CODE_FOR_avx512vl_loadv4di_mask:
+ 	case CODE_FOR_avx512vl_loadv4sf_mask:
+ 	case CODE_FOR_avx512vl_loadv4si_mask:
+ 	case CODE_FOR_avx512vl_loadv2df_mask:
+ 	case CODE_FOR_avx512vl_loadv2di_mask:
+ 	case CODE_FOR_avx512bw_loadv64qi_mask:
+ 	case CODE_FOR_avx512vl_loadv32qi_mask:
+ 	case CODE_FOR_avx512vl_loadv16qi_mask:
+ 	case CODE_FOR_avx512bw_loadv32hi_mask:
+ 	case CODE_FOR_avx512vl_loadv16hi_mask:
+ 	case CODE_FOR_avx512vl_loadv8hi_mask:
+ 	  aligned_mem = true;
+ 	  break;
+ 	default:
+ 	  break;
+ 	}
+       /* FALLTHRU */
+     case V64QI_FTYPE_PCCHAR_V64QI_UDI:
+     case V32QI_FTYPE_PCCHAR_V32QI_USI:
+     case V16QI_FTYPE_PCCHAR_V16QI_UHI:
+     case V32HI_FTYPE_PCSHORT_V32HI_USI:
+     case V16HI_FTYPE_PCSHORT_V16HI_UHI:
+     case V8HI_FTYPE_PCSHORT_V8HI_UQI:
+     case V16SI_FTYPE_PCINT_V16SI_UHI:
+     case V8SI_FTYPE_PCINT_V8SI_UQI:
+     case V4SI_FTYPE_PCINT_V4SI_UQI:
+     case V8DI_FTYPE_PCINT64_V8DI_UQI:
+     case V4DI_FTYPE_PCINT64_V4DI_UQI:
+     case V2DI_FTYPE_PCINT64_V2DI_UQI:
+     case V8DF_FTYPE_PCDOUBLE_V8DF_UQI:
+     case V4DF_FTYPE_PCDOUBLE_V4DF_UQI:
+     case V2DF_FTYPE_PCDOUBLE_V2DF_UQI:
+     case V16SF_FTYPE_PCFLOAT_V16SF_UHI:
+     case V8SF_FTYPE_PCFLOAT_V8SF_UQI:
+     case V4SF_FTYPE_PCFLOAT_V4SF_UQI:
+       nargs = 3;
+       klass = load;
+       memory = 0;
+       break;
+     case VOID_FTYPE_UINT_UINT_UINT:
+     case VOID_FTYPE_UINT64_UINT_UINT:
+     case UCHAR_FTYPE_UINT_UINT_UINT:
+     case UCHAR_FTYPE_UINT64_UINT_UINT:
+       nargs = 3;
+       klass = load;
+       memory = ARRAY_SIZE (args);
+       last_arg_constant = true;
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   gcc_assert (nargs <= ARRAY_SIZE (args));
+ 
+   if (klass == store)
+     {
+       arg = CALL_EXPR_ARG (exp, 0);
+       op = expand_normal (arg);
+       gcc_assert (target == 0);
+       if (memory)
+ 	{
+ 	  op = ix86_zero_extend_to_Pmode (op);
+ 	  target = gen_rtx_MEM (tmode, op);
+ 	  /* target at this point has just BITS_PER_UNIT MEM_ALIGN
+ 	     on it.  Try to improve it using get_pointer_alignment,
+ 	     and if the special builtin is one that requires strict
+ 	     mode alignment, also from it's GET_MODE_ALIGNMENT.
+ 	     Failure to do so could lead to ix86_legitimate_combined_insn
+ 	     rejecting all changes to such insns.  */
+ 	  unsigned int align = get_pointer_alignment (arg);
+ 	  if (aligned_mem && align < GET_MODE_ALIGNMENT (tmode))
+ 	    align = GET_MODE_ALIGNMENT (tmode);
+ 	  if (MEM_ALIGN (target) < align)
+ 	    set_mem_align (target, align);
+ 	}
+       else
+ 	target = force_reg (tmode, op);
+       arg_adjust = 1;
+     }
+   else
+     {
+       arg_adjust = 0;
+       if (optimize
+ 	  || target == 0
+ 	  || !register_operand (target, tmode)
+ 	  || GET_MODE (target) != tmode)
+ 	target = gen_reg_rtx (tmode);
+     }
+ 
+   for (i = 0; i < nargs; i++)
+     {
+       machine_mode mode = insn_p->operand[i + 1].mode;
+       bool match;
+ 
+       arg = CALL_EXPR_ARG (exp, i + arg_adjust);
+       op = expand_normal (arg);
+       match = insn_p->operand[i + 1].predicate (op, mode);
+ 
+       if (last_arg_constant && (i + 1) == nargs)
+ 	{
+ 	  if (!match)
+ 	    {
+ 	      if (icode == CODE_FOR_lwp_lwpvalsi3
+ 		  || icode == CODE_FOR_lwp_lwpinssi3
+ 		  || icode == CODE_FOR_lwp_lwpvaldi3
+ 		  || icode == CODE_FOR_lwp_lwpinsdi3)
+ 		error ("the last argument must be a 32-bit immediate");
+ 	      else
+ 		error ("the last argument must be an 8-bit immediate");
+ 	      return const0_rtx;
+ 	    }
+ 	}
+       else
+ 	{
+ 	  if (i == memory)
+ 	    {
+ 	      /* This must be the memory operand.  */
+ 	      op = ix86_zero_extend_to_Pmode (op);
+ 	      op = gen_rtx_MEM (mode, op);
+ 	      /* op at this point has just BITS_PER_UNIT MEM_ALIGN
+ 		 on it.  Try to improve it using get_pointer_alignment,
+ 		 and if the special builtin is one that requires strict
+ 		 mode alignment, also from it's GET_MODE_ALIGNMENT.
+ 		 Failure to do so could lead to ix86_legitimate_combined_insn
+ 		 rejecting all changes to such insns.  */
+ 	      unsigned int align = get_pointer_alignment (arg);
+ 	      if (aligned_mem && align < GET_MODE_ALIGNMENT (mode))
+ 		align = GET_MODE_ALIGNMENT (mode);
+ 	      if (MEM_ALIGN (op) < align)
+ 		set_mem_align (op, align);
+ 	    }
+ 	  else
+ 	    {
+ 	      /* This must be register.  */
+ 	      if (VECTOR_MODE_P (mode))
+ 		op = safe_vector_operand (op, mode);
+ 
+ 	      op = fixup_modeless_constant (op, mode);
+ 
+ 	      if (GET_MODE (op) == mode || GET_MODE (op) == VOIDmode)
+ 		op = copy_to_mode_reg (mode, op);
+ 	      else
+ 	        {
+ 	          op = copy_to_reg (op);
+ 	          op = lowpart_subreg (mode, op, GET_MODE (op));
+ 	        }
+ 	    }
+ 	}
+ 
+       args[i].op = op;
+       args[i].mode = mode;
+     }
+ 
+   switch (nargs)
+     {
+     case 0:
+       pat = GEN_FCN (icode) (target);
+       break;
+     case 1:
+       pat = GEN_FCN (icode) (target, args[0].op);
+       break;
+     case 2:
+       pat = GEN_FCN (icode) (target, args[0].op, args[1].op);
+       break;
+     case 3:
+       pat = GEN_FCN (icode) (target, args[0].op, args[1].op, args[2].op);
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   if (! pat)
+     return 0;
+   emit_insn (pat);
+   return klass == store ? 0 : target;
+ }
+ 
+ /* Return the integer constant in ARG.  Constrain it to be in the range
+    of the subparts of VEC_TYPE; issue an error if not.  */
+ 
+ static int
+ get_element_number (tree vec_type, tree arg)
+ {
+   unsigned HOST_WIDE_INT elt, max = TYPE_VECTOR_SUBPARTS (vec_type) - 1;
+ 
+   if (!tree_fits_uhwi_p (arg)
+       || (elt = tree_to_uhwi (arg), elt > max))
+     {
+       error ("selector must be an integer constant in the range "
+ 	     "[0, %wi]", max);
+       return 0;
+     }
+ 
+   return elt;
+ }
+ 
+ /* A subroutine of ix86_expand_builtin.  These builtins are a wrapper around
+    ix86_expand_vector_init.  We DO have language-level syntax for this, in
+    the form of  (type){ init-list }.  Except that since we can't place emms
+    instructions from inside the compiler, we can't allow the use of MMX
+    registers unless the user explicitly asks for it.  So we do *not* define
+    vec_set/vec_extract/vec_init patterns for MMX modes in mmx.md.  Instead
+    we have builtins invoked by mmintrin.h that gives us license to emit
+    these sorts of instructions.  */
+ 
+ static rtx
+ ix86_expand_vec_init_builtin (tree type, tree exp, rtx target)
+ {
+   machine_mode tmode = TYPE_MODE (type);
+   machine_mode inner_mode = GET_MODE_INNER (tmode);
+   int i, n_elt = GET_MODE_NUNITS (tmode);
+   rtvec v = rtvec_alloc (n_elt);
+ 
+   gcc_assert (VECTOR_MODE_P (tmode));
+   gcc_assert (call_expr_nargs (exp) == n_elt);
+ 
+   for (i = 0; i < n_elt; ++i)
+     {
+       rtx x = expand_normal (CALL_EXPR_ARG (exp, i));
+       RTVEC_ELT (v, i) = gen_lowpart (inner_mode, x);
+     }
+ 
+   if (!target || !register_operand (target, tmode))
+     target = gen_reg_rtx (tmode);
+ 
+   ix86_expand_vector_init (true, target, gen_rtx_PARALLEL (tmode, v));
+   return target;
+ }
+ 
+ /* A subroutine of ix86_expand_builtin.  These builtins are a wrapper around
+    ix86_expand_vector_extract.  They would be redundant (for non-MMX) if we
+    had a language-level syntax for referencing vector elements.  */
+ 
+ static rtx
+ ix86_expand_vec_ext_builtin (tree exp, rtx target)
+ {
+   machine_mode tmode, mode0;
+   tree arg0, arg1;
+   int elt;
+   rtx op0;
+ 
+   arg0 = CALL_EXPR_ARG (exp, 0);
+   arg1 = CALL_EXPR_ARG (exp, 1);
+ 
+   op0 = expand_normal (arg0);
+   elt = get_element_number (TREE_TYPE (arg0), arg1);
+ 
+   tmode = TYPE_MODE (TREE_TYPE (TREE_TYPE (arg0)));
+   mode0 = TYPE_MODE (TREE_TYPE (arg0));
+   gcc_assert (VECTOR_MODE_P (mode0));
+ 
+   op0 = force_reg (mode0, op0);
+ 
+   if (optimize || !target || !register_operand (target, tmode))
+     target = gen_reg_rtx (tmode);
+ 
+   ix86_expand_vector_extract (true, target, op0, elt);
+ 
+   return target;
+ }
+ 
+ /* A subroutine of ix86_expand_builtin.  These builtins are a wrapper around
+    ix86_expand_vector_set.  They would be redundant (for non-MMX) if we had
+    a language-level syntax for referencing vector elements.  */
+ 
+ static rtx
+ ix86_expand_vec_set_builtin (tree exp)
+ {
+   machine_mode tmode, mode1;
+   tree arg0, arg1, arg2;
+   int elt;
+   rtx op0, op1, target;
+ 
+   arg0 = CALL_EXPR_ARG (exp, 0);
+   arg1 = CALL_EXPR_ARG (exp, 1);
+   arg2 = CALL_EXPR_ARG (exp, 2);
+ 
+   tmode = TYPE_MODE (TREE_TYPE (arg0));
+   mode1 = TYPE_MODE (TREE_TYPE (TREE_TYPE (arg0)));
+   gcc_assert (VECTOR_MODE_P (tmode));
+ 
+   op0 = expand_expr (arg0, NULL_RTX, tmode, EXPAND_NORMAL);
+   op1 = expand_expr (arg1, NULL_RTX, mode1, EXPAND_NORMAL);
+   elt = get_element_number (TREE_TYPE (arg0), arg2);
+ 
+   if (GET_MODE (op1) != mode1 && GET_MODE (op1) != VOIDmode)
+     op1 = convert_modes (mode1, GET_MODE (op1), op1, true);
+ 
+   op0 = force_reg (tmode, op0);
+   op1 = force_reg (mode1, op1);
+ 
+   /* OP0 is the source of these builtin functions and shouldn't be
+      modified.  Create a copy, use it and return it as target.  */
+   target = gen_reg_rtx (tmode);
+   emit_move_insn (target, op0);
+   ix86_expand_vector_set (true, target, op1, elt);
+ 
+   return target;
+ }
+ 
+ /* Expand an expression EXP that calls a built-in function,
+    with result going to TARGET if that's convenient
+    (and in mode MODE if that's convenient).
+    SUBTARGET may be used as the target for computing one of EXP's operands.
+    IGNORE is nonzero if the value is to be ignored.  */
+ 
+ rtx
+ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
+ 		     machine_mode mode, int ignore)
+ {
+   size_t i;
+   enum insn_code icode, icode2;
+   tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
+   tree arg0, arg1, arg2, arg3, arg4;
+   rtx op0, op1, op2, op3, op4, pat, pat2, insn;
+   machine_mode mode0, mode1, mode2, mode3, mode4;
+   unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl);
+ 
+   /* For CPU builtins that can be folded, fold first and expand the fold.  */
+   switch (fcode)
+     {
+     case IX86_BUILTIN_CPU_INIT:
+       {
+ 	/* Make it call __cpu_indicator_init in libgcc. */
+ 	tree call_expr, fndecl, type;
+         type = build_function_type_list (integer_type_node, NULL_TREE); 
+ 	fndecl = build_fn_decl ("__cpu_indicator_init", type);
+ 	call_expr = build_call_expr (fndecl, 0); 
+ 	return expand_expr (call_expr, target, mode, EXPAND_NORMAL);
+       }
+     case IX86_BUILTIN_CPU_IS:
+     case IX86_BUILTIN_CPU_SUPPORTS:
+       {
+ 	tree arg0 = CALL_EXPR_ARG (exp, 0);
+ 	tree fold_expr = fold_builtin_cpu (fndecl, &arg0);
+ 	gcc_assert (fold_expr != NULL_TREE);
+ 	return expand_expr (fold_expr, target, mode, EXPAND_NORMAL);
+       }
+     }
+ 
+   HOST_WIDE_INT isa = ix86_isa_flags;
+   HOST_WIDE_INT isa2 = ix86_isa_flags2;
+   HOST_WIDE_INT bisa = ix86_builtins_isa[fcode].isa;
+   HOST_WIDE_INT bisa2 = ix86_builtins_isa[fcode].isa2;
+   /* The general case is we require all the ISAs specified in bisa{,2}
+      to be enabled.
+      The exceptions are:
+      OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
+      OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32
+      OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4
+      where for each such pair it is sufficient if either of the ISAs is
+      enabled, plus if it is ored with other options also those others.
+      OPTION_MASK_ISA_MMX in bisa is satisfied also if TARGET_MMX_WITH_SSE.  */
+   if (((bisa & (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A))
+        == (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A))
+       && (isa & (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A)) != 0)
+     isa |= (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A);
+   if (((bisa & (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32))
+        == (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32))
+       && (isa & (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32)) != 0)
+     isa |= (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32);
+   if (((bisa & (OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4))
+        == (OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4))
+       && (isa & (OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4)) != 0)
+     isa |= (OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4);
+   if ((bisa & OPTION_MASK_ISA_MMX) && !TARGET_MMX && TARGET_MMX_WITH_SSE)
+     {
+       bisa &= ~OPTION_MASK_ISA_MMX;
+       bisa |= OPTION_MASK_ISA_SSE2;
+     }
+   if ((bisa & isa) != bisa || (bisa2 & isa2) != bisa2)
+     {
+       bool add_abi_p = bisa & OPTION_MASK_ISA_64BIT;
+       if (TARGET_ABI_X32)
+ 	bisa |= OPTION_MASK_ABI_X32;
+       else
+ 	bisa |= OPTION_MASK_ABI_64;
+       char *opts = ix86_target_string (bisa, bisa2, 0, 0, NULL, NULL,
+ 				       (enum fpmath_unit) 0,
+ 				       (enum prefer_vector_width) 0,
+ 				       false, add_abi_p);
+       if (!opts)
+ 	error ("%qE needs unknown isa option", fndecl);
+       else
+ 	{
+ 	  gcc_assert (opts != NULL);
+ 	  error ("%qE needs isa option %s", fndecl, opts);
+ 	  free (opts);
+ 	}
+       return expand_call (exp, target, ignore);
+     }
+ 
+   switch (fcode)
+     {
+     case IX86_BUILTIN_MASKMOVQ:
+     case IX86_BUILTIN_MASKMOVDQU:
+       icode = (fcode == IX86_BUILTIN_MASKMOVQ
+ 	       ? CODE_FOR_mmx_maskmovq
+ 	       : CODE_FOR_sse2_maskmovdqu);
+       /* Note the arg order is different from the operand order.  */
+       arg1 = CALL_EXPR_ARG (exp, 0);
+       arg2 = CALL_EXPR_ARG (exp, 1);
+       arg0 = CALL_EXPR_ARG (exp, 2);
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+       op2 = expand_normal (arg2);
+       mode0 = insn_data[icode].operand[0].mode;
+       mode1 = insn_data[icode].operand[1].mode;
+       mode2 = insn_data[icode].operand[2].mode;
+ 
+       op0 = ix86_zero_extend_to_Pmode (op0);
+       op0 = gen_rtx_MEM (mode1, op0);
+ 
+       if (!insn_data[icode].operand[0].predicate (op0, mode0))
+ 	op0 = copy_to_mode_reg (mode0, op0);
+       if (!insn_data[icode].operand[1].predicate (op1, mode1))
+ 	op1 = copy_to_mode_reg (mode1, op1);
+       if (!insn_data[icode].operand[2].predicate (op2, mode2))
+ 	op2 = copy_to_mode_reg (mode2, op2);
+       pat = GEN_FCN (icode) (op0, op1, op2);
+       if (! pat)
+ 	return 0;
+       emit_insn (pat);
+       return 0;
+ 
+     case IX86_BUILTIN_LDMXCSR:
+       op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
+       target = assign_386_stack_local (SImode, SLOT_TEMP);
+       emit_move_insn (target, op0);
+       emit_insn (gen_sse_ldmxcsr (target));
+       return 0;
+ 
+     case IX86_BUILTIN_STMXCSR:
+       target = assign_386_stack_local (SImode, SLOT_TEMP);
+       emit_insn (gen_sse_stmxcsr (target));
+       return copy_to_mode_reg (SImode, target);
+ 
+     case IX86_BUILTIN_CLFLUSH:
+ 	arg0 = CALL_EXPR_ARG (exp, 0);
+ 	op0 = expand_normal (arg0);
+ 	icode = CODE_FOR_sse2_clflush;
+ 	if (!insn_data[icode].operand[0].predicate (op0, Pmode))
+ 	  op0 = ix86_zero_extend_to_Pmode (op0);
+ 
+ 	emit_insn (gen_sse2_clflush (op0));
+ 	return 0;
+ 
+     case IX86_BUILTIN_CLWB:
+ 	arg0 = CALL_EXPR_ARG (exp, 0);
+ 	op0 = expand_normal (arg0);
+ 	icode = CODE_FOR_clwb;
+ 	if (!insn_data[icode].operand[0].predicate (op0, Pmode))
+ 	  op0 = ix86_zero_extend_to_Pmode (op0);
+ 
+ 	emit_insn (gen_clwb (op0));
+ 	return 0;
+ 
+     case IX86_BUILTIN_CLFLUSHOPT:
+ 	arg0 = CALL_EXPR_ARG (exp, 0);
+ 	op0 = expand_normal (arg0);
+ 	icode = CODE_FOR_clflushopt;
+ 	if (!insn_data[icode].operand[0].predicate (op0, Pmode))
+ 	  op0 = ix86_zero_extend_to_Pmode (op0);
+ 
+ 	emit_insn (gen_clflushopt (op0));
+ 	return 0;
+ 
+     case IX86_BUILTIN_MONITOR:
+     case IX86_BUILTIN_MONITORX:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       arg1 = CALL_EXPR_ARG (exp, 1);
+       arg2 = CALL_EXPR_ARG (exp, 2);
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+       op2 = expand_normal (arg2);
+       if (!REG_P (op0))
+ 	op0 = ix86_zero_extend_to_Pmode (op0);
+       if (!REG_P (op1))
+ 	op1 = copy_to_mode_reg (SImode, op1);
+       if (!REG_P (op2))
+ 	op2 = copy_to_mode_reg (SImode, op2);
+ 
+       emit_insn (fcode == IX86_BUILTIN_MONITOR 
+ 		 ? gen_sse3_monitor (Pmode, op0, op1, op2)
+ 		 : gen_monitorx (Pmode, op0, op1, op2));
+       return 0;
+ 
+     case IX86_BUILTIN_MWAIT:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       arg1 = CALL_EXPR_ARG (exp, 1);
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+       if (!REG_P (op0))
+ 	op0 = copy_to_mode_reg (SImode, op0);
+       if (!REG_P (op1))
+ 	op1 = copy_to_mode_reg (SImode, op1);
+       emit_insn (gen_sse3_mwait (op0, op1));
+       return 0;
+ 
+     case IX86_BUILTIN_MWAITX:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       arg1 = CALL_EXPR_ARG (exp, 1);
+       arg2 = CALL_EXPR_ARG (exp, 2);
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+       op2 = expand_normal (arg2);
+       if (!REG_P (op0))
+ 	op0 = copy_to_mode_reg (SImode, op0);
+       if (!REG_P (op1))
+ 	op1 = copy_to_mode_reg (SImode, op1);
+       if (!REG_P (op2))
+ 	op2 = copy_to_mode_reg (SImode, op2);
+       emit_insn (gen_mwaitx (op0, op1, op2));
+       return 0;
+ 
+     case IX86_BUILTIN_UMONITOR:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op0 = expand_normal (arg0);
+ 
+       op0 = ix86_zero_extend_to_Pmode (op0);
+       emit_insn (gen_umonitor (Pmode, op0));
+       return 0;
+ 
+     case IX86_BUILTIN_UMWAIT:
+     case IX86_BUILTIN_TPAUSE:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       arg1 = CALL_EXPR_ARG (exp, 1);
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+ 
+       if (!REG_P (op0))
+ 	op0 = copy_to_mode_reg (SImode, op0);
+ 
+       op1 = force_reg (DImode, op1);
+ 
+       if (TARGET_64BIT)
+ 	{
+ 	  op2 = expand_simple_binop (DImode, LSHIFTRT, op1, GEN_INT (32),
+ 				     NULL, 1, OPTAB_DIRECT);
+ 	  switch (fcode)
+ 	    {
+ 	    case IX86_BUILTIN_UMWAIT:
+ 	      icode = CODE_FOR_umwait_rex64;
+ 	      break;
+ 	    case IX86_BUILTIN_TPAUSE:
+ 	      icode = CODE_FOR_tpause_rex64;
+ 	      break;
+ 	    default:
+ 	      gcc_unreachable ();
+ 	    }
+ 
+ 	  op2 = gen_lowpart (SImode, op2);
+ 	  op1 = gen_lowpart (SImode, op1);
+ 	  pat = GEN_FCN (icode) (op0, op1, op2);
+ 	}
+       else
+ 	{
+ 	  switch (fcode)
+ 	    {
+ 	    case IX86_BUILTIN_UMWAIT:
+ 	      icode = CODE_FOR_umwait;
+ 	      break;
+ 	    case IX86_BUILTIN_TPAUSE:
+ 	      icode = CODE_FOR_tpause;
+ 	      break;
+ 	    default:
+ 	      gcc_unreachable ();
+ 	    }
+ 	  pat = GEN_FCN (icode) (op0, op1);
+ 	}
+ 
+       if (!pat)
+ 	return 0;
+ 
+       emit_insn (pat);
+ 
+       if (target == 0
+ 	  || !register_operand (target, QImode))
+ 	target = gen_reg_rtx (QImode);
+ 
+       pat = gen_rtx_EQ (QImode, gen_rtx_REG (CCCmode, FLAGS_REG),
+ 			const0_rtx);
+       emit_insn (gen_rtx_SET (target, pat));
+ 
+       return target;
+ 
+     case IX86_BUILTIN_CLZERO:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op0 = expand_normal (arg0);
+       if (!REG_P (op0))
+ 	op0 = ix86_zero_extend_to_Pmode (op0);
+       emit_insn (gen_clzero (Pmode, op0));
+       return 0;
+ 
+     case IX86_BUILTIN_CLDEMOTE:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op0 = expand_normal (arg0);
+       icode = CODE_FOR_cldemote;
+       if (!insn_data[icode].operand[0].predicate (op0, Pmode))
+ 	op0 = ix86_zero_extend_to_Pmode (op0);
+ 
+       emit_insn (gen_cldemote (op0));
+       return 0;
+ 
+     case IX86_BUILTIN_VEC_INIT_V2SI:
+     case IX86_BUILTIN_VEC_INIT_V4HI:
+     case IX86_BUILTIN_VEC_INIT_V8QI:
+       return ix86_expand_vec_init_builtin (TREE_TYPE (exp), exp, target);
+ 
+     case IX86_BUILTIN_VEC_EXT_V2DF:
+     case IX86_BUILTIN_VEC_EXT_V2DI:
+     case IX86_BUILTIN_VEC_EXT_V4SF:
+     case IX86_BUILTIN_VEC_EXT_V4SI:
+     case IX86_BUILTIN_VEC_EXT_V8HI:
+     case IX86_BUILTIN_VEC_EXT_V2SI:
+     case IX86_BUILTIN_VEC_EXT_V4HI:
+     case IX86_BUILTIN_VEC_EXT_V16QI:
+       return ix86_expand_vec_ext_builtin (exp, target);
+ 
+     case IX86_BUILTIN_VEC_SET_V2DI:
+     case IX86_BUILTIN_VEC_SET_V4SF:
+     case IX86_BUILTIN_VEC_SET_V4SI:
+     case IX86_BUILTIN_VEC_SET_V8HI:
+     case IX86_BUILTIN_VEC_SET_V4HI:
+     case IX86_BUILTIN_VEC_SET_V16QI:
+       return ix86_expand_vec_set_builtin (exp);
+ 
+     case IX86_BUILTIN_NANQ:
+     case IX86_BUILTIN_NANSQ:
+       return expand_call (exp, target, ignore);
+ 
+     case IX86_BUILTIN_RDPID:
+ 
+       op0 = gen_reg_rtx (word_mode);
+ 
+       if (TARGET_64BIT)
+ 	{
+ 	  insn = gen_rdpid_rex64 (op0);
+ 	  op0 = convert_to_mode (SImode, op0, 1);
+ 	}
+       else
+ 	insn = gen_rdpid (op0);
+ 
+       emit_insn (insn);
+ 
+       if (target == 0
+ 	  || !register_operand (target, SImode))
+ 	target = gen_reg_rtx (SImode);
+ 
+       emit_move_insn (target, op0);
+       return target;
+ 
+     case IX86_BUILTIN_2INTERSECTD512:
+     case IX86_BUILTIN_2INTERSECTQ512:
+     case IX86_BUILTIN_2INTERSECTD256:
+     case IX86_BUILTIN_2INTERSECTQ256:
+     case IX86_BUILTIN_2INTERSECTD128:
+     case IX86_BUILTIN_2INTERSECTQ128:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       arg1 = CALL_EXPR_ARG (exp, 1);
+       arg2 = CALL_EXPR_ARG (exp, 2);
+       arg3 = CALL_EXPR_ARG (exp, 3);
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+       op2 = expand_normal (arg2);
+       op3 = expand_normal (arg3);
+ 
+       if (!address_operand (op0, VOIDmode))
+ 	{
+ 	  op0 = convert_memory_address (Pmode, op0);
+ 	  op0 = copy_addr_to_reg (op0);
+ 	}
+       if (!address_operand (op1, VOIDmode))
+ 	{
+ 	  op1 = convert_memory_address (Pmode, op1);
+ 	  op1 = copy_addr_to_reg (op1);
+ 	}
+ 
+       switch (fcode)
+ 	{
+ 	case IX86_BUILTIN_2INTERSECTD512:
+ 	  mode4 = P2HImode;
+ 	  icode = CODE_FOR_avx512vp2intersect_2intersectv16si;
+ 	  break;
+ 	case IX86_BUILTIN_2INTERSECTQ512:
+ 	  mode4 = P2QImode;
+ 	  icode = CODE_FOR_avx512vp2intersect_2intersectv8di;
+ 	  break;
+ 	case IX86_BUILTIN_2INTERSECTD256:
+ 	  mode4 = P2QImode;
+ 	  icode = CODE_FOR_avx512vp2intersect_2intersectv8si;
+ 	  break;
+ 	case IX86_BUILTIN_2INTERSECTQ256:
+ 	  mode4 = P2QImode;
+ 	  icode = CODE_FOR_avx512vp2intersect_2intersectv4di;
+ 	  break;
+ 	case IX86_BUILTIN_2INTERSECTD128:
+ 	  mode4 = P2QImode;
+ 	  icode = CODE_FOR_avx512vp2intersect_2intersectv4si;
+ 	  break;
+ 	case IX86_BUILTIN_2INTERSECTQ128:
+ 	  mode4 = P2QImode;
+ 	  icode = CODE_FOR_avx512vp2intersect_2intersectv2di;
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+ 
+       mode2 = insn_data[icode].operand[1].mode;
+       mode3 = insn_data[icode].operand[2].mode;
+       if (!insn_data[icode].operand[1].predicate (op2, mode2))
+ 	op2 = copy_to_mode_reg (mode2, op2);
+       if (!insn_data[icode].operand[2].predicate (op3, mode3))
+ 	op3 = copy_to_mode_reg (mode3, op3);
+ 
+       op4 = gen_reg_rtx (mode4);
+       emit_insn (GEN_FCN (icode) (op4, op2, op3));
+       mode0 = mode4 == P2HImode ? HImode : QImode;
+       emit_move_insn (gen_rtx_MEM (mode0, op0),
+ 		      gen_lowpart (mode0, op4));
+       emit_move_insn (gen_rtx_MEM (mode0, op1),
+ 		      gen_highpart (mode0, op4));
+ 
+       return 0;
+ 
+     case IX86_BUILTIN_RDPMC:
+     case IX86_BUILTIN_RDTSC:
+     case IX86_BUILTIN_RDTSCP:
+     case IX86_BUILTIN_XGETBV:
+ 
+       op0 = gen_reg_rtx (DImode);
+       op1 = gen_reg_rtx (DImode);
+ 
+       if (fcode == IX86_BUILTIN_RDPMC)
+ 	{
+ 	  arg0 = CALL_EXPR_ARG (exp, 0);
+ 	  op2 = expand_normal (arg0);
+ 	  if (!register_operand (op2, SImode))
+ 	    op2 = copy_to_mode_reg (SImode, op2);
+ 
+ 	  insn = (TARGET_64BIT
+ 		  ? gen_rdpmc_rex64 (op0, op1, op2)
+ 		  : gen_rdpmc (op0, op2));
+ 	  emit_insn (insn);
+ 	}
+       else if (fcode == IX86_BUILTIN_XGETBV)
+ 	{
+ 	  arg0 = CALL_EXPR_ARG (exp, 0);
+ 	  op2 = expand_normal (arg0);
+ 	  if (!register_operand (op2, SImode))
+ 	    op2 = copy_to_mode_reg (SImode, op2);
+ 
+ 	  insn = (TARGET_64BIT
+ 		  ? gen_xgetbv_rex64 (op0, op1, op2)
+ 		  : gen_xgetbv (op0, op2));
+ 	  emit_insn (insn);
+ 	}
+       else if (fcode == IX86_BUILTIN_RDTSC)
+ 	{
+ 	  insn = (TARGET_64BIT
+ 		  ? gen_rdtsc_rex64 (op0, op1)
+ 		  : gen_rdtsc (op0));
+ 	  emit_insn (insn);
+ 	}
+       else
+ 	{
+ 	  op2 = gen_reg_rtx (SImode);
+ 
+ 	  insn = (TARGET_64BIT
+ 		  ? gen_rdtscp_rex64 (op0, op1, op2)
+ 		  : gen_rdtscp (op0, op2));
+ 	  emit_insn (insn);
+ 
+ 	  arg0 = CALL_EXPR_ARG (exp, 0);
+ 	  op4 = expand_normal (arg0);
+ 	  if (!address_operand (op4, VOIDmode))
+ 	    {
+ 	      op4 = convert_memory_address (Pmode, op4);
+ 	      op4 = copy_addr_to_reg (op4);
+ 	    }
+ 	  emit_move_insn (gen_rtx_MEM (SImode, op4), op2);
+ 	}
+ 
+       if (target == 0
+ 	  || !register_operand (target, DImode))
+         target = gen_reg_rtx (DImode);
+ 
+       if (TARGET_64BIT)
+ 	{
+ 	  op1 = expand_simple_binop (DImode, ASHIFT, op1, GEN_INT (32),
+ 				     op1, 1, OPTAB_DIRECT);
+ 	  op0 = expand_simple_binop (DImode, IOR, op0, op1,
+ 				     op0, 1, OPTAB_DIRECT);
+ 	}
+ 
+       emit_move_insn (target, op0);
+       return target;
+ 
+     case IX86_BUILTIN_ENQCMD:
+     case IX86_BUILTIN_ENQCMDS:
+     case IX86_BUILTIN_MOVDIR64B:
+ 
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       arg1 = CALL_EXPR_ARG (exp, 1);
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+ 
+       op0 = ix86_zero_extend_to_Pmode (op0);
+       if (!address_operand (op1, VOIDmode))
+       {
+ 	op1 = convert_memory_address (Pmode, op1);
+ 	op1 = copy_addr_to_reg (op1);
+       }
+       op1 = gen_rtx_MEM (XImode, op1);
+ 
+       if (fcode == IX86_BUILTIN_MOVDIR64B)
+ 	{
+ 	  emit_insn (gen_movdir64b (Pmode, op0, op1));
+ 	  return 0;
+ 	}
+       else
+ 	{
+ 	  rtx pat;
+ 
+ 	  target = gen_reg_rtx (SImode);
+ 	  emit_move_insn (target, const0_rtx);
+ 	  target = gen_rtx_SUBREG (QImode, target, 0);
+ 
+ 	  if (fcode == IX86_BUILTIN_ENQCMD)
+ 	    pat = gen_enqcmd (UNSPECV_ENQCMD, Pmode, op0, op1);
+ 	  else
+ 	    pat = gen_enqcmd (UNSPECV_ENQCMDS, Pmode, op0, op1);
+ 
+ 	  emit_insn (pat);
+ 
+ 	  emit_insn (gen_rtx_SET (gen_rtx_STRICT_LOW_PART (VOIDmode, target),
+ 				  gen_rtx_fmt_ee (EQ, QImode,
+ 						  SET_DEST (pat),
+ 						  const0_rtx)));
+ 
+ 	  return SUBREG_REG (target);
+ 	}
+ 
+     case IX86_BUILTIN_FXSAVE:
+     case IX86_BUILTIN_FXRSTOR:
+     case IX86_BUILTIN_FXSAVE64:
+     case IX86_BUILTIN_FXRSTOR64:
+     case IX86_BUILTIN_FNSTENV:
+     case IX86_BUILTIN_FLDENV:
+       mode0 = BLKmode;
+       switch (fcode)
+ 	{
+ 	case IX86_BUILTIN_FXSAVE:
+ 	  icode = CODE_FOR_fxsave;
+ 	  break;
+ 	case IX86_BUILTIN_FXRSTOR:
+ 	  icode = CODE_FOR_fxrstor;
+ 	  break;
+ 	case IX86_BUILTIN_FXSAVE64:
+ 	  icode = CODE_FOR_fxsave64;
+ 	  break;
+ 	case IX86_BUILTIN_FXRSTOR64:
+ 	  icode = CODE_FOR_fxrstor64;
+ 	  break;
+ 	case IX86_BUILTIN_FNSTENV:
+ 	  icode = CODE_FOR_fnstenv;
+ 	  break;
+ 	case IX86_BUILTIN_FLDENV:
+ 	  icode = CODE_FOR_fldenv;
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+ 
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op0 = expand_normal (arg0);
+ 
+       if (!address_operand (op0, VOIDmode))
+ 	{
+ 	  op0 = convert_memory_address (Pmode, op0);
+ 	  op0 = copy_addr_to_reg (op0);
+ 	}
+       op0 = gen_rtx_MEM (mode0, op0);
+ 
+       pat = GEN_FCN (icode) (op0);
+       if (pat)
+ 	emit_insn (pat);
+       return 0;
+ 
+     case IX86_BUILTIN_XSETBV:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       arg1 = CALL_EXPR_ARG (exp, 1);
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+ 
+       if (!REG_P (op0))
+ 	op0 = copy_to_mode_reg (SImode, op0);
+ 
+       op1 = force_reg (DImode, op1);
+ 
+       if (TARGET_64BIT)
+ 	{
+ 	  op2 = expand_simple_binop (DImode, LSHIFTRT, op1, GEN_INT (32),
+ 				     NULL, 1, OPTAB_DIRECT);
+ 
+ 	  icode = CODE_FOR_xsetbv_rex64;
+ 
+ 	  op2 = gen_lowpart (SImode, op2);
+ 	  op1 = gen_lowpart (SImode, op1);
+ 	  pat = GEN_FCN (icode) (op0, op1, op2);
+ 	}
+       else
+ 	{
+ 	  icode = CODE_FOR_xsetbv;
+ 
+ 	  pat = GEN_FCN (icode) (op0, op1);
+ 	}
+       if (pat)
+ 	emit_insn (pat);
+       return 0;
+ 
+     case IX86_BUILTIN_XSAVE:
+     case IX86_BUILTIN_XRSTOR:
+     case IX86_BUILTIN_XSAVE64:
+     case IX86_BUILTIN_XRSTOR64:
+     case IX86_BUILTIN_XSAVEOPT:
+     case IX86_BUILTIN_XSAVEOPT64:
+     case IX86_BUILTIN_XSAVES:
+     case IX86_BUILTIN_XRSTORS:
+     case IX86_BUILTIN_XSAVES64:
+     case IX86_BUILTIN_XRSTORS64:
+     case IX86_BUILTIN_XSAVEC:
+     case IX86_BUILTIN_XSAVEC64:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       arg1 = CALL_EXPR_ARG (exp, 1);
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+ 
+       if (!address_operand (op0, VOIDmode))
+ 	{
+ 	  op0 = convert_memory_address (Pmode, op0);
+ 	  op0 = copy_addr_to_reg (op0);
+ 	}
+       op0 = gen_rtx_MEM (BLKmode, op0);
+ 
+       op1 = force_reg (DImode, op1);
+ 
+       if (TARGET_64BIT)
+ 	{
+ 	  op2 = expand_simple_binop (DImode, LSHIFTRT, op1, GEN_INT (32),
+ 				     NULL, 1, OPTAB_DIRECT);
+ 	  switch (fcode)
+ 	    {
+ 	    case IX86_BUILTIN_XSAVE:
+ 	      icode = CODE_FOR_xsave_rex64;
+ 	      break;
+ 	    case IX86_BUILTIN_XRSTOR:
+ 	      icode = CODE_FOR_xrstor_rex64;
+ 	      break;
+ 	    case IX86_BUILTIN_XSAVE64:
+ 	      icode = CODE_FOR_xsave64;
+ 	      break;
+ 	    case IX86_BUILTIN_XRSTOR64:
+ 	      icode = CODE_FOR_xrstor64;
+ 	      break;
+ 	    case IX86_BUILTIN_XSAVEOPT:
+ 	      icode = CODE_FOR_xsaveopt_rex64;
+ 	      break;
+ 	    case IX86_BUILTIN_XSAVEOPT64:
+ 	      icode = CODE_FOR_xsaveopt64;
+ 	      break;
+ 	    case IX86_BUILTIN_XSAVES:
+ 	      icode = CODE_FOR_xsaves_rex64;
+ 	      break;
+ 	    case IX86_BUILTIN_XRSTORS:
+ 	      icode = CODE_FOR_xrstors_rex64;
+ 	      break;
+ 	    case IX86_BUILTIN_XSAVES64:
+ 	      icode = CODE_FOR_xsaves64;
+ 	      break;
+ 	    case IX86_BUILTIN_XRSTORS64:
+ 	      icode = CODE_FOR_xrstors64;
+ 	      break;
+ 	    case IX86_BUILTIN_XSAVEC:
+ 	      icode = CODE_FOR_xsavec_rex64;
+ 	      break;
+ 	    case IX86_BUILTIN_XSAVEC64:
+ 	      icode = CODE_FOR_xsavec64;
+ 	      break;
+ 	    default:
+ 	      gcc_unreachable ();
+ 	    }
+ 
+ 	  op2 = gen_lowpart (SImode, op2);
+ 	  op1 = gen_lowpart (SImode, op1);
+ 	  pat = GEN_FCN (icode) (op0, op1, op2);
+ 	}
+       else
+ 	{
+ 	  switch (fcode)
+ 	    {
+ 	    case IX86_BUILTIN_XSAVE:
+ 	      icode = CODE_FOR_xsave;
+ 	      break;
+ 	    case IX86_BUILTIN_XRSTOR:
+ 	      icode = CODE_FOR_xrstor;
+ 	      break;
+ 	    case IX86_BUILTIN_XSAVEOPT:
+ 	      icode = CODE_FOR_xsaveopt;
+ 	      break;
+ 	    case IX86_BUILTIN_XSAVES:
+ 	      icode = CODE_FOR_xsaves;
+ 	      break;
+ 	    case IX86_BUILTIN_XRSTORS:
+ 	      icode = CODE_FOR_xrstors;
+ 	      break;
+ 	    case IX86_BUILTIN_XSAVEC:
+ 	      icode = CODE_FOR_xsavec;
+ 	      break;
+ 	    default:
+ 	      gcc_unreachable ();
+ 	    }
+ 	  pat = GEN_FCN (icode) (op0, op1);
+ 	}
+ 
+       if (pat)
+ 	emit_insn (pat);
+       return 0;
+ 
+     case IX86_BUILTIN_LLWPCB:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op0 = expand_normal (arg0);
+       icode = CODE_FOR_lwp_llwpcb;
+       if (!insn_data[icode].operand[0].predicate (op0, Pmode))
+ 	op0 = ix86_zero_extend_to_Pmode (op0);
+       emit_insn (gen_lwp_llwpcb (op0));
+       return 0;
+ 
+     case IX86_BUILTIN_SLWPCB:
+       icode = CODE_FOR_lwp_slwpcb;
+       if (!target
+ 	  || !insn_data[icode].operand[0].predicate (target, Pmode))
+ 	target = gen_reg_rtx (Pmode);
+       emit_insn (gen_lwp_slwpcb (target));
+       return target;
+ 
+     case IX86_BUILTIN_BEXTRI32:
+     case IX86_BUILTIN_BEXTRI64:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       arg1 = CALL_EXPR_ARG (exp, 1);
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+       icode = (fcode == IX86_BUILTIN_BEXTRI32
+ 	  ? CODE_FOR_tbm_bextri_si
+ 	  : CODE_FOR_tbm_bextri_di);
+       if (!CONST_INT_P (op1))
+         {
+           error ("last argument must be an immediate");
+           return const0_rtx;
+         }
+       else
+         {
+           unsigned char length = (INTVAL (op1) >> 8) & 0xFF;
+           unsigned char lsb_index = INTVAL (op1) & 0xFF;
+           op1 = GEN_INT (length);
+           op2 = GEN_INT (lsb_index);
+ 
+ 	  mode1 = insn_data[icode].operand[1].mode;
+ 	  if (!insn_data[icode].operand[1].predicate (op0, mode1))
+ 	    op0 = copy_to_mode_reg (mode1, op0);
+ 
+ 	  mode0 = insn_data[icode].operand[0].mode;
+ 	  if (target == 0
+ 	      || !register_operand (target, mode0))
+ 	    target = gen_reg_rtx (mode0);
+ 
+           pat = GEN_FCN (icode) (target, op0, op1, op2);
+           if (pat)
+             emit_insn (pat);
+           return target;
+         }
+ 
+     case IX86_BUILTIN_RDRAND16_STEP:
+       icode = CODE_FOR_rdrandhi_1;
+       mode0 = HImode;
+       goto rdrand_step;
+ 
+     case IX86_BUILTIN_RDRAND32_STEP:
+       icode = CODE_FOR_rdrandsi_1;
+       mode0 = SImode;
+       goto rdrand_step;
+ 
+     case IX86_BUILTIN_RDRAND64_STEP:
+       icode = CODE_FOR_rdranddi_1;
+       mode0 = DImode;
+ 
+ rdrand_step:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op1 = expand_normal (arg0);
+       if (!address_operand (op1, VOIDmode))
+ 	{
+ 	  op1 = convert_memory_address (Pmode, op1);
+ 	  op1 = copy_addr_to_reg (op1);
+ 	}
+ 
+       op0 = gen_reg_rtx (mode0);
+       emit_insn (GEN_FCN (icode) (op0));
+ 
+       emit_move_insn (gen_rtx_MEM (mode0, op1), op0);
+ 
+       op1 = gen_reg_rtx (SImode);
+       emit_move_insn (op1, CONST1_RTX (SImode));
+ 
+       /* Emit SImode conditional move.  */
+       if (mode0 == HImode)
+ 	{
+ 	  if (TARGET_ZERO_EXTEND_WITH_AND
+ 	      && optimize_function_for_speed_p (cfun))
+ 	    {
+ 	      op2 = force_reg (SImode, const0_rtx);
+ 
+ 	      emit_insn (gen_movstricthi
+ 			 (gen_lowpart (HImode, op2), op0));
+ 	    }
+ 	  else
+ 	    {
+ 	      op2 = gen_reg_rtx (SImode);
+ 
+ 	      emit_insn (gen_zero_extendhisi2 (op2, op0));
+ 	    }
+ 	}
+       else if (mode0 == SImode)
+ 	op2 = op0;
+       else
+ 	op2 = gen_rtx_SUBREG (SImode, op0, 0);
+ 
+       if (target == 0
+ 	  || !register_operand (target, SImode))
+ 	target = gen_reg_rtx (SImode);
+ 
+       pat = gen_rtx_GEU (VOIDmode, gen_rtx_REG (CCCmode, FLAGS_REG),
+ 			 const0_rtx);
+       emit_insn (gen_rtx_SET (target,
+ 			      gen_rtx_IF_THEN_ELSE (SImode, pat, op2, op1)));
+       return target;
+ 
+     case IX86_BUILTIN_RDSEED16_STEP:
+       icode = CODE_FOR_rdseedhi_1;
+       mode0 = HImode;
+       goto rdseed_step;
+ 
+     case IX86_BUILTIN_RDSEED32_STEP:
+       icode = CODE_FOR_rdseedsi_1;
+       mode0 = SImode;
+       goto rdseed_step;
+ 
+     case IX86_BUILTIN_RDSEED64_STEP:
+       icode = CODE_FOR_rdseeddi_1;
+       mode0 = DImode;
+ 
+ rdseed_step:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op1 = expand_normal (arg0);
+       if (!address_operand (op1, VOIDmode))
+ 	{
+ 	  op1 = convert_memory_address (Pmode, op1);
+ 	  op1 = copy_addr_to_reg (op1);
+ 	}
+ 
+       op0 = gen_reg_rtx (mode0);
+       emit_insn (GEN_FCN (icode) (op0));
+ 
+       emit_move_insn (gen_rtx_MEM (mode0, op1), op0);
+ 
+       op2 = gen_reg_rtx (QImode);
+ 
+       pat = gen_rtx_LTU (QImode, gen_rtx_REG (CCCmode, FLAGS_REG),
+                          const0_rtx);
+       emit_insn (gen_rtx_SET (op2, pat));
+ 
+       if (target == 0
+ 	  || !register_operand (target, SImode))
+         target = gen_reg_rtx (SImode);
+ 
+       emit_insn (gen_zero_extendqisi2 (target, op2));
+       return target;
+ 
+     case IX86_BUILTIN_SBB32:
+       icode = CODE_FOR_subborrowsi;
+       icode2 = CODE_FOR_subborrowsi_0;
+       mode0 = SImode;
+       mode1 = DImode;
+       mode2 = CCmode;
+       goto handlecarry;
+ 
+     case IX86_BUILTIN_SBB64:
+       icode = CODE_FOR_subborrowdi;
+       icode2 = CODE_FOR_subborrowdi_0;
+       mode0 = DImode;
+       mode1 = TImode;
+       mode2 = CCmode;
+       goto handlecarry;
+ 
+     case IX86_BUILTIN_ADDCARRYX32:
+       icode = CODE_FOR_addcarrysi;
+       icode2 = CODE_FOR_addcarrysi_0;
+       mode0 = SImode;
+       mode1 = DImode;
+       mode2 = CCCmode;
+       goto handlecarry;
+ 
+     case IX86_BUILTIN_ADDCARRYX64:
+       icode = CODE_FOR_addcarrydi;
+       icode2 = CODE_FOR_addcarrydi_0;
+       mode0 = DImode;
+       mode1 = TImode;
+       mode2 = CCCmode;
+ 
+     handlecarry:
+       arg0 = CALL_EXPR_ARG (exp, 0); /* unsigned char c_in.  */
+       arg1 = CALL_EXPR_ARG (exp, 1); /* unsigned int src1.  */
+       arg2 = CALL_EXPR_ARG (exp, 2); /* unsigned int src2.  */
+       arg3 = CALL_EXPR_ARG (exp, 3); /* unsigned int *sum_out.  */
+ 
+       op1 = expand_normal (arg0);
+       if (!integer_zerop (arg0))
+ 	op1 = copy_to_mode_reg (QImode, convert_to_mode (QImode, op1, 1));
+ 
+       op2 = expand_normal (arg1);
+       if (!register_operand (op2, mode0))
+ 	op2 = copy_to_mode_reg (mode0, op2);
+ 
+       op3 = expand_normal (arg2);
+       if (!register_operand (op3, mode0))
+ 	op3 = copy_to_mode_reg (mode0, op3);
+ 
+       op4 = expand_normal (arg3);
+       if (!address_operand (op4, VOIDmode))
+ 	{
+ 	  op4 = convert_memory_address (Pmode, op4);
+ 	  op4 = copy_addr_to_reg (op4);
+ 	}
+ 
+       op0 = gen_reg_rtx (mode0);
+       if (integer_zerop (arg0))
+ 	{
+ 	  /* If arg0 is 0, optimize right away into add or sub
+ 	     instruction that sets CCCmode flags.  */
+ 	  op1 = gen_rtx_REG (mode2, FLAGS_REG);
+ 	  emit_insn (GEN_FCN (icode2) (op0, op2, op3));
+ 	}
+       else
+ 	{
+ 	  /* Generate CF from input operand.  */
+ 	  emit_insn (gen_addqi3_cconly_overflow (op1, constm1_rtx));
+ 
+ 	  /* Generate instruction that consumes CF.  */
+ 	  op1 = gen_rtx_REG (CCCmode, FLAGS_REG);
+ 	  pat = gen_rtx_LTU (mode1, op1, const0_rtx);
+ 	  pat2 = gen_rtx_LTU (mode0, op1, const0_rtx);
+ 	  emit_insn (GEN_FCN (icode) (op0, op2, op3, op1, pat, pat2));
+ 	}
+ 
+       /* Return current CF value.  */
+       if (target == 0)
+         target = gen_reg_rtx (QImode);
+ 
+       pat = gen_rtx_LTU (QImode, op1, const0_rtx);
+       emit_insn (gen_rtx_SET (target, pat));
+ 
+       /* Store the result.  */
+       emit_move_insn (gen_rtx_MEM (mode0, op4), op0);
+ 
+       return target;
+ 
+     case IX86_BUILTIN_READ_FLAGS:
+       emit_insn (gen_push (gen_rtx_REG (word_mode, FLAGS_REG)));
+ 
+       if (optimize
+ 	  || target == NULL_RTX
+ 	  || !nonimmediate_operand (target, word_mode)
+ 	  || GET_MODE (target) != word_mode)
+ 	target = gen_reg_rtx (word_mode);
+ 
+       emit_insn (gen_pop (target));
+       return target;
+ 
+     case IX86_BUILTIN_WRITE_FLAGS:
+ 
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op0 = expand_normal (arg0);
+       if (!general_no_elim_operand (op0, word_mode))
+ 	op0 = copy_to_mode_reg (word_mode, op0);
+ 
+       emit_insn (gen_push (op0));
+       emit_insn (gen_pop (gen_rtx_REG (word_mode, FLAGS_REG)));
+       return 0;
+ 
+     case IX86_BUILTIN_KTESTC8:
+       icode = CODE_FOR_ktestqi;
+       mode3 = CCCmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KTESTZ8:
+       icode = CODE_FOR_ktestqi;
+       mode3 = CCZmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KTESTC16:
+       icode = CODE_FOR_ktesthi;
+       mode3 = CCCmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KTESTZ16:
+       icode = CODE_FOR_ktesthi;
+       mode3 = CCZmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KTESTC32:
+       icode = CODE_FOR_ktestsi;
+       mode3 = CCCmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KTESTZ32:
+       icode = CODE_FOR_ktestsi;
+       mode3 = CCZmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KTESTC64:
+       icode = CODE_FOR_ktestdi;
+       mode3 = CCCmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KTESTZ64:
+       icode = CODE_FOR_ktestdi;
+       mode3 = CCZmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KORTESTC8:
+       icode = CODE_FOR_kortestqi;
+       mode3 = CCCmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KORTESTZ8:
+       icode = CODE_FOR_kortestqi;
+       mode3 = CCZmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KORTESTC16:
+       icode = CODE_FOR_kortesthi;
+       mode3 = CCCmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KORTESTZ16:
+       icode = CODE_FOR_kortesthi;
+       mode3 = CCZmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KORTESTC32:
+       icode = CODE_FOR_kortestsi;
+       mode3 = CCCmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KORTESTZ32:
+       icode = CODE_FOR_kortestsi;
+       mode3 = CCZmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KORTESTC64:
+       icode = CODE_FOR_kortestdi;
+       mode3 = CCCmode;
+       goto kortest;
+ 
+     case IX86_BUILTIN_KORTESTZ64:
+       icode = CODE_FOR_kortestdi;
+       mode3 = CCZmode;
+ 
+     kortest:
+       arg0 = CALL_EXPR_ARG (exp, 0); /* Mask reg src1.  */
+       arg1 = CALL_EXPR_ARG (exp, 1); /* Mask reg src2.  */
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+ 
+       mode0 = insn_data[icode].operand[0].mode;
+       mode1 = insn_data[icode].operand[1].mode;
+ 
+       if (GET_MODE (op0) != VOIDmode)
+ 	op0 = force_reg (GET_MODE (op0), op0);
+ 
+       op0 = gen_lowpart (mode0, op0);
+ 
+       if (!insn_data[icode].operand[0].predicate (op0, mode0))
+ 	op0 = copy_to_mode_reg (mode0, op0);
+ 
+       if (GET_MODE (op1) != VOIDmode)
+ 	op1 = force_reg (GET_MODE (op1), op1);
+ 
+       op1 = gen_lowpart (mode1, op1);
+ 
+       if (!insn_data[icode].operand[1].predicate (op1, mode1))
+ 	op1 = copy_to_mode_reg (mode1, op1);
+ 
+       target = gen_reg_rtx (QImode);
+ 
+       /* Emit kortest.  */
+       emit_insn (GEN_FCN (icode) (op0, op1));
+       /* And use setcc to return result from flags.  */
+       ix86_expand_setcc (target, EQ,
+ 			 gen_rtx_REG (mode3, FLAGS_REG), const0_rtx);
+       return target;
+ 
+     case IX86_BUILTIN_GATHERSIV2DF:
+       icode = CODE_FOR_avx2_gathersiv2df;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERSIV4DF:
+       icode = CODE_FOR_avx2_gathersiv4df;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERDIV2DF:
+       icode = CODE_FOR_avx2_gatherdiv2df;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERDIV4DF:
+       icode = CODE_FOR_avx2_gatherdiv4df;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERSIV4SF:
+       icode = CODE_FOR_avx2_gathersiv4sf;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERSIV8SF:
+       icode = CODE_FOR_avx2_gathersiv8sf;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERDIV4SF:
+       icode = CODE_FOR_avx2_gatherdiv4sf;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERDIV8SF:
+       icode = CODE_FOR_avx2_gatherdiv8sf;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERSIV2DI:
+       icode = CODE_FOR_avx2_gathersiv2di;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERSIV4DI:
+       icode = CODE_FOR_avx2_gathersiv4di;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERDIV2DI:
+       icode = CODE_FOR_avx2_gatherdiv2di;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERDIV4DI:
+       icode = CODE_FOR_avx2_gatherdiv4di;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERSIV4SI:
+       icode = CODE_FOR_avx2_gathersiv4si;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERSIV8SI:
+       icode = CODE_FOR_avx2_gathersiv8si;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERDIV4SI:
+       icode = CODE_FOR_avx2_gatherdiv4si;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERDIV8SI:
+       icode = CODE_FOR_avx2_gatherdiv8si;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERALTSIV4DF:
+       icode = CODE_FOR_avx2_gathersiv4df;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERALTDIV8SF:
+       icode = CODE_FOR_avx2_gatherdiv8sf;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERALTSIV4DI:
+       icode = CODE_FOR_avx2_gathersiv4di;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHERALTDIV8SI:
+       icode = CODE_FOR_avx2_gatherdiv8si;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3SIV16SF:
+       icode = CODE_FOR_avx512f_gathersiv16sf;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3SIV8DF:
+       icode = CODE_FOR_avx512f_gathersiv8df;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3DIV16SF:
+       icode = CODE_FOR_avx512f_gatherdiv16sf;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3DIV8DF:
+       icode = CODE_FOR_avx512f_gatherdiv8df;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3SIV16SI:
+       icode = CODE_FOR_avx512f_gathersiv16si;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3SIV8DI:
+       icode = CODE_FOR_avx512f_gathersiv8di;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3DIV16SI:
+       icode = CODE_FOR_avx512f_gatherdiv16si;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3DIV8DI:
+       icode = CODE_FOR_avx512f_gatherdiv8di;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3ALTSIV8DF:
+       icode = CODE_FOR_avx512f_gathersiv8df;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3ALTDIV16SF:
+       icode = CODE_FOR_avx512f_gatherdiv16sf;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3ALTSIV8DI:
+       icode = CODE_FOR_avx512f_gathersiv8di;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3ALTDIV16SI:
+       icode = CODE_FOR_avx512f_gatherdiv16si;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3SIV2DF:
+       icode = CODE_FOR_avx512vl_gathersiv2df;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3SIV4DF:
+       icode = CODE_FOR_avx512vl_gathersiv4df;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3DIV2DF:
+       icode = CODE_FOR_avx512vl_gatherdiv2df;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3DIV4DF:
+       icode = CODE_FOR_avx512vl_gatherdiv4df;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3SIV4SF:
+       icode = CODE_FOR_avx512vl_gathersiv4sf;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3SIV8SF:
+       icode = CODE_FOR_avx512vl_gathersiv8sf;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3DIV4SF:
+       icode = CODE_FOR_avx512vl_gatherdiv4sf;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3DIV8SF:
+       icode = CODE_FOR_avx512vl_gatherdiv8sf;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3SIV2DI:
+       icode = CODE_FOR_avx512vl_gathersiv2di;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3SIV4DI:
+       icode = CODE_FOR_avx512vl_gathersiv4di;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3DIV2DI:
+       icode = CODE_FOR_avx512vl_gatherdiv2di;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3DIV4DI:
+       icode = CODE_FOR_avx512vl_gatherdiv4di;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3SIV4SI:
+       icode = CODE_FOR_avx512vl_gathersiv4si;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3SIV8SI:
+       icode = CODE_FOR_avx512vl_gathersiv8si;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3DIV4SI:
+       icode = CODE_FOR_avx512vl_gatherdiv4si;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3DIV8SI:
+       icode = CODE_FOR_avx512vl_gatherdiv8si;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3ALTSIV4DF:
+       icode = CODE_FOR_avx512vl_gathersiv4df;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3ALTDIV8SF:
+       icode = CODE_FOR_avx512vl_gatherdiv8sf;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3ALTSIV4DI:
+       icode = CODE_FOR_avx512vl_gathersiv4di;
+       goto gather_gen;
+     case IX86_BUILTIN_GATHER3ALTDIV8SI:
+       icode = CODE_FOR_avx512vl_gatherdiv8si;
+       goto gather_gen;
+     case IX86_BUILTIN_SCATTERSIV16SF:
+       icode = CODE_FOR_avx512f_scattersiv16sf;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERSIV8DF:
+       icode = CODE_FOR_avx512f_scattersiv8df;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERDIV16SF:
+       icode = CODE_FOR_avx512f_scatterdiv16sf;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERDIV8DF:
+       icode = CODE_FOR_avx512f_scatterdiv8df;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERSIV16SI:
+       icode = CODE_FOR_avx512f_scattersiv16si;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERSIV8DI:
+       icode = CODE_FOR_avx512f_scattersiv8di;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERDIV16SI:
+       icode = CODE_FOR_avx512f_scatterdiv16si;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERDIV8DI:
+       icode = CODE_FOR_avx512f_scatterdiv8di;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERSIV8SF:
+       icode = CODE_FOR_avx512vl_scattersiv8sf;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERSIV4SF:
+       icode = CODE_FOR_avx512vl_scattersiv4sf;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERSIV4DF:
+       icode = CODE_FOR_avx512vl_scattersiv4df;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERSIV2DF:
+       icode = CODE_FOR_avx512vl_scattersiv2df;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERDIV8SF:
+       icode = CODE_FOR_avx512vl_scatterdiv8sf;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERDIV4SF:
+       icode = CODE_FOR_avx512vl_scatterdiv4sf;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERDIV4DF:
+       icode = CODE_FOR_avx512vl_scatterdiv4df;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERDIV2DF:
+       icode = CODE_FOR_avx512vl_scatterdiv2df;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERSIV8SI:
+       icode = CODE_FOR_avx512vl_scattersiv8si;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERSIV4SI:
+       icode = CODE_FOR_avx512vl_scattersiv4si;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERSIV4DI:
+       icode = CODE_FOR_avx512vl_scattersiv4di;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERSIV2DI:
+       icode = CODE_FOR_avx512vl_scattersiv2di;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERDIV8SI:
+       icode = CODE_FOR_avx512vl_scatterdiv8si;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERDIV4SI:
+       icode = CODE_FOR_avx512vl_scatterdiv4si;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERDIV4DI:
+       icode = CODE_FOR_avx512vl_scatterdiv4di;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERDIV2DI:
+       icode = CODE_FOR_avx512vl_scatterdiv2di;
+       goto scatter_gen;
+     case IX86_BUILTIN_GATHERPFDPD:
+       icode = CODE_FOR_avx512pf_gatherpfv8sidf;
+       goto vec_prefetch_gen;
+     case IX86_BUILTIN_SCATTERALTSIV8DF:
+       icode = CODE_FOR_avx512f_scattersiv8df;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERALTDIV16SF:
+       icode = CODE_FOR_avx512f_scatterdiv16sf;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERALTSIV8DI:
+       icode = CODE_FOR_avx512f_scattersiv8di;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERALTDIV16SI:
+       icode = CODE_FOR_avx512f_scatterdiv16si;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERALTSIV4DF:
+       icode = CODE_FOR_avx512vl_scattersiv4df;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERALTDIV8SF:
+       icode = CODE_FOR_avx512vl_scatterdiv8sf;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERALTSIV4DI:
+       icode = CODE_FOR_avx512vl_scattersiv4di;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERALTDIV8SI:
+       icode = CODE_FOR_avx512vl_scatterdiv8si;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERALTSIV2DF:
+       icode = CODE_FOR_avx512vl_scattersiv2df;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERALTDIV4SF:
+       icode = CODE_FOR_avx512vl_scatterdiv4sf;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERALTSIV2DI:
+       icode = CODE_FOR_avx512vl_scattersiv2di;
+       goto scatter_gen;
+     case IX86_BUILTIN_SCATTERALTDIV4SI:
+       icode = CODE_FOR_avx512vl_scatterdiv4si;
+       goto scatter_gen;
+     case IX86_BUILTIN_GATHERPFDPS:
+       icode = CODE_FOR_avx512pf_gatherpfv16sisf;
+       goto vec_prefetch_gen;
+     case IX86_BUILTIN_GATHERPFQPD:
+       icode = CODE_FOR_avx512pf_gatherpfv8didf;
+       goto vec_prefetch_gen;
+     case IX86_BUILTIN_GATHERPFQPS:
+       icode = CODE_FOR_avx512pf_gatherpfv8disf;
+       goto vec_prefetch_gen;
+     case IX86_BUILTIN_SCATTERPFDPD:
+       icode = CODE_FOR_avx512pf_scatterpfv8sidf;
+       goto vec_prefetch_gen;
+     case IX86_BUILTIN_SCATTERPFDPS:
+       icode = CODE_FOR_avx512pf_scatterpfv16sisf;
+       goto vec_prefetch_gen;
+     case IX86_BUILTIN_SCATTERPFQPD:
+       icode = CODE_FOR_avx512pf_scatterpfv8didf;
+       goto vec_prefetch_gen;
+     case IX86_BUILTIN_SCATTERPFQPS:
+       icode = CODE_FOR_avx512pf_scatterpfv8disf;
+       goto vec_prefetch_gen;
+ 
+     gather_gen:
+       rtx half;
+       rtx (*gen) (rtx, rtx);
+ 
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       arg1 = CALL_EXPR_ARG (exp, 1);
+       arg2 = CALL_EXPR_ARG (exp, 2);
+       arg3 = CALL_EXPR_ARG (exp, 3);
+       arg4 = CALL_EXPR_ARG (exp, 4);
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+       op2 = expand_normal (arg2);
+       op3 = expand_normal (arg3);
+       op4 = expand_normal (arg4);
+       /* Note the arg order is different from the operand order.  */
+       mode0 = insn_data[icode].operand[1].mode;
+       mode2 = insn_data[icode].operand[3].mode;
+       mode3 = insn_data[icode].operand[4].mode;
+       mode4 = insn_data[icode].operand[5].mode;
+ 
+       if (target == NULL_RTX
+ 	  || GET_MODE (target) != insn_data[icode].operand[0].mode
+ 	  || !insn_data[icode].operand[0].predicate (target,
+ 						     GET_MODE (target)))
+ 	subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
+       else
+ 	subtarget = target;
+ 
+       switch (fcode)
+ 	{
+ 	case IX86_BUILTIN_GATHER3ALTSIV8DF:
+ 	case IX86_BUILTIN_GATHER3ALTSIV8DI:
+ 	  half = gen_reg_rtx (V8SImode);
+ 	  if (!nonimmediate_operand (op2, V16SImode))
+ 	    op2 = copy_to_mode_reg (V16SImode, op2);
+ 	  emit_insn (gen_vec_extract_lo_v16si (half, op2));
+ 	  op2 = half;
+ 	  break;
+ 	case IX86_BUILTIN_GATHER3ALTSIV4DF:
+ 	case IX86_BUILTIN_GATHER3ALTSIV4DI:
+ 	case IX86_BUILTIN_GATHERALTSIV4DF:
+ 	case IX86_BUILTIN_GATHERALTSIV4DI:
+ 	  half = gen_reg_rtx (V4SImode);
+ 	  if (!nonimmediate_operand (op2, V8SImode))
+ 	    op2 = copy_to_mode_reg (V8SImode, op2);
+ 	  emit_insn (gen_vec_extract_lo_v8si (half, op2));
+ 	  op2 = half;
+ 	  break;
+ 	case IX86_BUILTIN_GATHER3ALTDIV16SF:
+ 	case IX86_BUILTIN_GATHER3ALTDIV16SI:
+ 	  half = gen_reg_rtx (mode0);
+ 	  if (mode0 == V8SFmode)
+ 	    gen = gen_vec_extract_lo_v16sf;
+ 	  else
+ 	    gen = gen_vec_extract_lo_v16si;
+ 	  if (!nonimmediate_operand (op0, GET_MODE (op0)))
+ 	    op0 = copy_to_mode_reg (GET_MODE (op0), op0);
+ 	  emit_insn (gen (half, op0));
+ 	  op0 = half;
+ 	  op3 = lowpart_subreg (QImode, op3, HImode);
+ 	  break;
+ 	case IX86_BUILTIN_GATHER3ALTDIV8SF:
+ 	case IX86_BUILTIN_GATHER3ALTDIV8SI:
+ 	case IX86_BUILTIN_GATHERALTDIV8SF:
+ 	case IX86_BUILTIN_GATHERALTDIV8SI:
+ 	  half = gen_reg_rtx (mode0);
+ 	  if (mode0 == V4SFmode)
+ 	    gen = gen_vec_extract_lo_v8sf;
+ 	  else
+ 	    gen = gen_vec_extract_lo_v8si;
+ 	  if (!nonimmediate_operand (op0, GET_MODE (op0)))
+ 	    op0 = copy_to_mode_reg (GET_MODE (op0), op0);
+ 	  emit_insn (gen (half, op0));
+ 	  op0 = half;
+ 	  if (VECTOR_MODE_P (GET_MODE (op3)))
+ 	    {
+ 	      half = gen_reg_rtx (mode0);
+ 	      if (!nonimmediate_operand (op3, GET_MODE (op3)))
+ 		op3 = copy_to_mode_reg (GET_MODE (op3), op3);
+ 	      emit_insn (gen (half, op3));
+ 	      op3 = half;
+ 	    }
+ 	  break;
+ 	default:
+ 	  break;
+ 	}
+ 
+       /* Force memory operand only with base register here.  But we
+ 	 don't want to do it on memory operand for other builtin
+ 	 functions.  */
+       op1 = ix86_zero_extend_to_Pmode (op1);
+ 
+       if (!insn_data[icode].operand[1].predicate (op0, mode0))
+ 	op0 = copy_to_mode_reg (mode0, op0);
+       if (!insn_data[icode].operand[2].predicate (op1, Pmode))
+ 	op1 = copy_to_mode_reg (Pmode, op1);
+       if (!insn_data[icode].operand[3].predicate (op2, mode2))
+ 	op2 = copy_to_mode_reg (mode2, op2);
+ 
+       op3 = fixup_modeless_constant (op3, mode3);
+ 
+       if (GET_MODE (op3) == mode3 || GET_MODE (op3) == VOIDmode)
+ 	{
+ 	  if (!insn_data[icode].operand[4].predicate (op3, mode3))
+ 	    op3 = copy_to_mode_reg (mode3, op3);
+ 	}
+       else
+ 	{
+ 	  op3 = copy_to_reg (op3);
+ 	  op3 = lowpart_subreg (mode3, op3, GET_MODE (op3));
+ 	}
+       if (!insn_data[icode].operand[5].predicate (op4, mode4))
+ 	{
+           error ("the last argument must be scale 1, 2, 4, 8");
+           return const0_rtx;
+ 	}
+ 
+       /* Optimize.  If mask is known to have all high bits set,
+ 	 replace op0 with pc_rtx to signal that the instruction
+ 	 overwrites the whole destination and doesn't use its
+ 	 previous contents.  */
+       if (optimize)
+ 	{
+ 	  if (TREE_CODE (arg3) == INTEGER_CST)
+ 	    {
+ 	      if (integer_all_onesp (arg3))
+ 		op0 = pc_rtx;
+ 	    }
+ 	  else if (TREE_CODE (arg3) == VECTOR_CST)
+ 	    {
+ 	      unsigned int negative = 0;
+ 	      for (i = 0; i < VECTOR_CST_NELTS (arg3); ++i)
+ 		{
+ 		  tree cst = VECTOR_CST_ELT (arg3, i);
+ 		  if (TREE_CODE (cst) == INTEGER_CST
+ 		      && tree_int_cst_sign_bit (cst))
+ 		    negative++;
+ 		  else if (TREE_CODE (cst) == REAL_CST
+ 			   && REAL_VALUE_NEGATIVE (TREE_REAL_CST (cst)))
+ 		    negative++;
+ 		}
+ 	      if (negative == TYPE_VECTOR_SUBPARTS (TREE_TYPE (arg3)))
+ 		op0 = pc_rtx;
+ 	    }
+ 	  else if (TREE_CODE (arg3) == SSA_NAME
+ 		   && TREE_CODE (TREE_TYPE (arg3)) == VECTOR_TYPE)
+ 	    {
+ 	      /* Recognize also when mask is like:
+ 		 __v2df src = _mm_setzero_pd ();
+ 		 __v2df mask = _mm_cmpeq_pd (src, src);
+ 		 or
+ 		 __v8sf src = _mm256_setzero_ps ();
+ 		 __v8sf mask = _mm256_cmp_ps (src, src, _CMP_EQ_OQ);
+ 		 as that is a cheaper way to load all ones into
+ 		 a register than having to load a constant from
+ 		 memory.  */
+ 	      gimple *def_stmt = SSA_NAME_DEF_STMT (arg3);
+ 	      if (is_gimple_call (def_stmt))
+ 		{
+ 		  tree fndecl = gimple_call_fndecl (def_stmt);
+ 		  if (fndecl
+ 		      && fndecl_built_in_p (fndecl, BUILT_IN_MD))
+ 		    switch (DECL_MD_FUNCTION_CODE (fndecl))
+ 		      {
+ 		      case IX86_BUILTIN_CMPPD:
+ 		      case IX86_BUILTIN_CMPPS:
+ 		      case IX86_BUILTIN_CMPPD256:
+ 		      case IX86_BUILTIN_CMPPS256:
+ 			if (!integer_zerop (gimple_call_arg (def_stmt, 2)))
+ 			  break;
+ 			/* FALLTHRU */
+ 		      case IX86_BUILTIN_CMPEQPD:
+ 		      case IX86_BUILTIN_CMPEQPS:
+ 			if (initializer_zerop (gimple_call_arg (def_stmt, 0))
+ 			    && initializer_zerop (gimple_call_arg (def_stmt,
+ 								   1)))
+ 			  op0 = pc_rtx;
+ 			break;
+ 		      default:
+ 			break;
+ 		      }
+ 		}
+ 	    }
+ 	}
+ 
+       pat = GEN_FCN (icode) (subtarget, op0, op1, op2, op3, op4);
+       if (! pat)
+ 	return const0_rtx;
+       emit_insn (pat);
+ 
+       switch (fcode)
+ 	{
+ 	case IX86_BUILTIN_GATHER3DIV16SF:
+ 	  if (target == NULL_RTX)
+ 	    target = gen_reg_rtx (V8SFmode);
+ 	  emit_insn (gen_vec_extract_lo_v16sf (target, subtarget));
+ 	  break;
+ 	case IX86_BUILTIN_GATHER3DIV16SI:
+ 	  if (target == NULL_RTX)
+ 	    target = gen_reg_rtx (V8SImode);
+ 	  emit_insn (gen_vec_extract_lo_v16si (target, subtarget));
+ 	  break;
+ 	case IX86_BUILTIN_GATHER3DIV8SF:
+ 	case IX86_BUILTIN_GATHERDIV8SF:
+ 	  if (target == NULL_RTX)
+ 	    target = gen_reg_rtx (V4SFmode);
+ 	  emit_insn (gen_vec_extract_lo_v8sf (target, subtarget));
+ 	  break;
+ 	case IX86_BUILTIN_GATHER3DIV8SI:
+ 	case IX86_BUILTIN_GATHERDIV8SI:
+ 	  if (target == NULL_RTX)
+ 	    target = gen_reg_rtx (V4SImode);
+ 	  emit_insn (gen_vec_extract_lo_v8si (target, subtarget));
+ 	  break;
+ 	default:
+ 	  target = subtarget;
+ 	  break;
+ 	}
+       return target;
+ 
+     scatter_gen:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       arg1 = CALL_EXPR_ARG (exp, 1);
+       arg2 = CALL_EXPR_ARG (exp, 2);
+       arg3 = CALL_EXPR_ARG (exp, 3);
+       arg4 = CALL_EXPR_ARG (exp, 4);
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+       op2 = expand_normal (arg2);
+       op3 = expand_normal (arg3);
+       op4 = expand_normal (arg4);
+       mode1 = insn_data[icode].operand[1].mode;
+       mode2 = insn_data[icode].operand[2].mode;
+       mode3 = insn_data[icode].operand[3].mode;
+       mode4 = insn_data[icode].operand[4].mode;
+ 
+       /* Scatter instruction stores operand op3 to memory with
+ 	 indices from op2 and scale from op4 under writemask op1.
+ 	 If index operand op2 has more elements then source operand
+ 	 op3 one need to use only its low half. And vice versa.  */
+       switch (fcode)
+ 	{
+ 	case IX86_BUILTIN_SCATTERALTSIV8DF:
+ 	case IX86_BUILTIN_SCATTERALTSIV8DI:
+ 	  half = gen_reg_rtx (V8SImode);
+ 	  if (!nonimmediate_operand (op2, V16SImode))
+ 	    op2 = copy_to_mode_reg (V16SImode, op2);
+ 	  emit_insn (gen_vec_extract_lo_v16si (half, op2));
+ 	  op2 = half;
+ 	  break;
+ 	case IX86_BUILTIN_SCATTERALTDIV16SF:
+ 	case IX86_BUILTIN_SCATTERALTDIV16SI:
+ 	  half = gen_reg_rtx (mode3);
+ 	  if (mode3 == V8SFmode)
+ 	    gen = gen_vec_extract_lo_v16sf;
+ 	  else
+ 	    gen = gen_vec_extract_lo_v16si;
+ 	  if (!nonimmediate_operand (op3, GET_MODE (op3)))
+ 	    op3 = copy_to_mode_reg (GET_MODE (op3), op3);
+ 	  emit_insn (gen (half, op3));
+ 	  op3 = half;
+ 	  break;
+ 	case IX86_BUILTIN_SCATTERALTSIV4DF:
+ 	case IX86_BUILTIN_SCATTERALTSIV4DI:
+ 	  half = gen_reg_rtx (V4SImode);
+ 	  if (!nonimmediate_operand (op2, V8SImode))
+ 	    op2 = copy_to_mode_reg (V8SImode, op2);
+ 	  emit_insn (gen_vec_extract_lo_v8si (half, op2));
+ 	  op2 = half;
+ 	  break;
+ 	case IX86_BUILTIN_SCATTERALTDIV8SF:
+ 	case IX86_BUILTIN_SCATTERALTDIV8SI:
+ 	  half = gen_reg_rtx (mode3);
+ 	  if (mode3 == V4SFmode)
+ 	    gen = gen_vec_extract_lo_v8sf;
+ 	  else
+ 	    gen = gen_vec_extract_lo_v8si;
+ 	  if (!nonimmediate_operand (op3, GET_MODE (op3)))
+ 	    op3 = copy_to_mode_reg (GET_MODE (op3), op3);
+ 	  emit_insn (gen (half, op3));
+ 	  op3 = half;
+ 	  break;
+ 	case IX86_BUILTIN_SCATTERALTSIV2DF:
+ 	case IX86_BUILTIN_SCATTERALTSIV2DI:
+ 	  if (!nonimmediate_operand (op2, V4SImode))
+ 	    op2 = copy_to_mode_reg (V4SImode, op2);
+ 	  break;
+ 	case IX86_BUILTIN_SCATTERALTDIV4SF:
+ 	case IX86_BUILTIN_SCATTERALTDIV4SI:
+ 	  if (!nonimmediate_operand (op3, GET_MODE (op3)))
+ 	    op3 = copy_to_mode_reg (GET_MODE (op3), op3);
+ 	  break;
+ 	default:
+ 	  break;
+ 	}
+ 
+       /* Force memory operand only with base register here.  But we
+ 	 don't want to do it on memory operand for other builtin
+ 	 functions.  */
+       op0 = force_reg (Pmode, convert_to_mode (Pmode, op0, 1));
+ 
+       if (!insn_data[icode].operand[0].predicate (op0, Pmode))
+ 	op0 = copy_to_mode_reg (Pmode, op0);
+ 
+       op1 = fixup_modeless_constant (op1, mode1);
+ 
+       if (GET_MODE (op1) == mode1 || GET_MODE (op1) == VOIDmode)
+ 	{
+ 	  if (!insn_data[icode].operand[1].predicate (op1, mode1))
+ 	    op1 = copy_to_mode_reg (mode1, op1);
+ 	}
+       else
+ 	{
+ 	  op1 = copy_to_reg (op1);
+ 	  op1 = lowpart_subreg (mode1, op1, GET_MODE (op1));
+ 	}
+ 
+       if (!insn_data[icode].operand[2].predicate (op2, mode2))
+ 	op2 = copy_to_mode_reg (mode2, op2);
+ 
+       if (!insn_data[icode].operand[3].predicate (op3, mode3))
+ 	op3 = copy_to_mode_reg (mode3, op3);
+ 
+       if (!insn_data[icode].operand[4].predicate (op4, mode4))
+ 	{
+ 	  error ("the last argument must be scale 1, 2, 4, 8");
+ 	  return const0_rtx;
+ 	}
+ 
+       pat = GEN_FCN (icode) (op0, op1, op2, op3, op4);
+       if (! pat)
+ 	return const0_rtx;
+ 
+       emit_insn (pat);
+       return 0;
+ 
+     vec_prefetch_gen:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       arg1 = CALL_EXPR_ARG (exp, 1);
+       arg2 = CALL_EXPR_ARG (exp, 2);
+       arg3 = CALL_EXPR_ARG (exp, 3);
+       arg4 = CALL_EXPR_ARG (exp, 4);
+       op0 = expand_normal (arg0);
+       op1 = expand_normal (arg1);
+       op2 = expand_normal (arg2);
+       op3 = expand_normal (arg3);
+       op4 = expand_normal (arg4);
+       mode0 = insn_data[icode].operand[0].mode;
+       mode1 = insn_data[icode].operand[1].mode;
+       mode3 = insn_data[icode].operand[3].mode;
+       mode4 = insn_data[icode].operand[4].mode;
+ 
+       op0 = fixup_modeless_constant (op0, mode0);
+ 
+       if (GET_MODE (op0) == mode0 || GET_MODE (op0) == VOIDmode)
+ 	{
+ 	  if (!insn_data[icode].operand[0].predicate (op0, mode0))
+ 	    op0 = copy_to_mode_reg (mode0, op0);
+ 	}
+       else
+ 	{
+ 	  op0 = copy_to_reg (op0);
+ 	  op0 = lowpart_subreg (mode0, op0, GET_MODE (op0));
+ 	}
+ 
+       if (!insn_data[icode].operand[1].predicate (op1, mode1))
+ 	op1 = copy_to_mode_reg (mode1, op1);
+ 
+       /* Force memory operand only with base register here.  But we
+ 	 don't want to do it on memory operand for other builtin
+ 	 functions.  */
+       op2 = force_reg (Pmode, convert_to_mode (Pmode, op2, 1));
+ 
+       if (!insn_data[icode].operand[2].predicate (op2, Pmode))
+ 	op2 = copy_to_mode_reg (Pmode, op2);
+ 
+       if (!insn_data[icode].operand[3].predicate (op3, mode3))
+ 	{
+ 	  error ("the forth argument must be scale 1, 2, 4, 8");
+ 	  return const0_rtx;
+ 	}
+ 
+       if (!insn_data[icode].operand[4].predicate (op4, mode4))
+ 	{
+ 	  error ("incorrect hint operand");
+ 	  return const0_rtx;
+ 	}
+ 
+       pat = GEN_FCN (icode) (op0, op1, op2, op3, op4);
+       if (! pat)
+ 	return const0_rtx;
+ 
+       emit_insn (pat);
+ 
+       return 0;
+ 
+     case IX86_BUILTIN_XABORT:
+       icode = CODE_FOR_xabort;
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op0 = expand_normal (arg0);
+       mode0 = insn_data[icode].operand[0].mode;
+       if (!insn_data[icode].operand[0].predicate (op0, mode0))
+ 	{
+ 	  error ("the argument to %<xabort%> intrinsic must "
+ 		 "be an 8-bit immediate");
+ 	  return const0_rtx;
+ 	}
+       emit_insn (gen_xabort (op0));
+       return 0;
+ 
+     case IX86_BUILTIN_RSTORSSP:
+     case IX86_BUILTIN_CLRSSBSY:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op0 = expand_normal (arg0);
+       icode = (fcode == IX86_BUILTIN_RSTORSSP
+ 	  ? CODE_FOR_rstorssp
+ 	  : CODE_FOR_clrssbsy);
+       if (!address_operand (op0, VOIDmode))
+ 	{
+ 	  op1 = convert_memory_address (Pmode, op0);
+ 	  op0 = copy_addr_to_reg (op1);
+ 	}
+       emit_insn (GEN_FCN (icode) (gen_rtx_MEM (Pmode, op0)));
+       return 0;
+ 
+     case IX86_BUILTIN_WRSSD:
+     case IX86_BUILTIN_WRSSQ:
+     case IX86_BUILTIN_WRUSSD:
+     case IX86_BUILTIN_WRUSSQ:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op0 = expand_normal (arg0);
+       arg1 = CALL_EXPR_ARG (exp, 1);
+       op1 = expand_normal (arg1);
+       switch (fcode)
+ 	{
+ 	case IX86_BUILTIN_WRSSD:
+ 	  icode = CODE_FOR_wrsssi;
+ 	  mode = SImode;
+ 	  break;
+ 	case IX86_BUILTIN_WRSSQ:
+ 	  icode = CODE_FOR_wrssdi;
+ 	  mode = DImode;
+ 	  break;
+ 	case IX86_BUILTIN_WRUSSD:
+ 	  icode = CODE_FOR_wrusssi;
+ 	  mode = SImode;
+ 	  break;
+ 	case IX86_BUILTIN_WRUSSQ:
+ 	  icode = CODE_FOR_wrussdi;
+ 	  mode = DImode;
+ 	  break;
+ 	}
+       op0 = force_reg (mode, op0);
+       if (!address_operand (op1, VOIDmode))
+ 	{
+ 	  op2 = convert_memory_address (Pmode, op1);
+ 	  op1 = copy_addr_to_reg (op2);
+ 	}
+       emit_insn (GEN_FCN (icode) (op0, gen_rtx_MEM (mode, op1)));
+       return 0;
+ 
+     default:
+       break;
+     }
+ 
+   if (fcode >= IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST
+       && fcode <= IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST)
+     {
+       i = fcode - IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST;
+       return ix86_expand_special_args_builtin (bdesc_special_args + i, exp,
+ 					       target);
+     }
+ 
+   if (fcode >= IX86_BUILTIN__BDESC_ARGS_FIRST
+       && fcode <= IX86_BUILTIN__BDESC_ARGS_LAST)
+     {
+       i = fcode - IX86_BUILTIN__BDESC_ARGS_FIRST;
+       rtx (*fcn) (rtx, rtx, rtx, rtx) = NULL;
+       rtx (*fcn_mask) (rtx, rtx, rtx, rtx, rtx);
+       rtx (*fcn_maskz) (rtx, rtx, rtx, rtx, rtx, rtx);
+       int masked = 1;
+       machine_mode mode, wide_mode, nar_mode;
+ 
+       nar_mode  = V4SFmode;
+       mode      = V16SFmode;
+       wide_mode = V64SFmode;
+       fcn_mask  = gen_avx5124fmaddps_4fmaddps_mask;
+       fcn_maskz = gen_avx5124fmaddps_4fmaddps_maskz;
+ 
+       switch (fcode)
+ 	{
+ 	case IX86_BUILTIN_4FMAPS:
+ 	  fcn = gen_avx5124fmaddps_4fmaddps;
+ 	  masked = 0;
+ 	  goto v4fma_expand;
+ 
+ 	case IX86_BUILTIN_4DPWSSD:
+ 	  nar_mode  = V4SImode;
+ 	  mode      = V16SImode;
+ 	  wide_mode = V64SImode;
+ 	  fcn = gen_avx5124vnniw_vp4dpwssd;
+ 	  masked = 0;
+ 	  goto v4fma_expand;
+ 
+ 	case IX86_BUILTIN_4DPWSSDS:
+ 	  nar_mode  = V4SImode;
+ 	  mode      = V16SImode;
+ 	  wide_mode = V64SImode;
+ 	  fcn = gen_avx5124vnniw_vp4dpwssds;
+ 	  masked = 0;
+ 	  goto v4fma_expand;
+ 
+ 	case IX86_BUILTIN_4FNMAPS:
+ 	  fcn = gen_avx5124fmaddps_4fnmaddps;
+ 	  masked = 0;
+ 	  goto v4fma_expand;
+ 
+ 	case IX86_BUILTIN_4FNMAPS_MASK:
+ 	  fcn_mask  = gen_avx5124fmaddps_4fnmaddps_mask;
+ 	  fcn_maskz = gen_avx5124fmaddps_4fnmaddps_maskz;
+ 	  goto v4fma_expand;
+ 
+ 	case IX86_BUILTIN_4DPWSSD_MASK:
+ 	  nar_mode  = V4SImode;
+ 	  mode      = V16SImode;
+ 	  wide_mode = V64SImode;
+ 	  fcn_mask  = gen_avx5124vnniw_vp4dpwssd_mask;
+ 	  fcn_maskz = gen_avx5124vnniw_vp4dpwssd_maskz;
+ 	  goto v4fma_expand;
+ 
+ 	case IX86_BUILTIN_4DPWSSDS_MASK:
+ 	  nar_mode  = V4SImode;
+ 	  mode      = V16SImode;
+ 	  wide_mode = V64SImode;
+ 	  fcn_mask  = gen_avx5124vnniw_vp4dpwssds_mask;
+ 	  fcn_maskz = gen_avx5124vnniw_vp4dpwssds_maskz;
+ 	  goto v4fma_expand;
+ 
+ 	case IX86_BUILTIN_4FMAPS_MASK:
+ 	  {
+ 	    tree args[4];
+ 	    rtx ops[4];
+ 	    rtx wide_reg;
+ 	    rtx accum;
+ 	    rtx addr;
+ 	    rtx mem;
+ 
+ v4fma_expand:
+ 	    wide_reg = gen_reg_rtx (wide_mode);
+ 	    for (i = 0; i < 4; i++)
+ 	      {
+ 		args[i] = CALL_EXPR_ARG (exp, i);
+ 		ops[i] = expand_normal (args[i]);
+ 
+ 		emit_move_insn (gen_rtx_SUBREG (mode, wide_reg, i * 64),
+ 				ops[i]);
+ 	      }
+ 
+ 	    accum = expand_normal (CALL_EXPR_ARG (exp, 4));
+ 	    accum = force_reg (mode, accum);
+ 
+ 	    addr = expand_normal (CALL_EXPR_ARG (exp, 5));
+ 	    addr = force_reg (Pmode, addr);
+ 
+ 	    mem = gen_rtx_MEM (nar_mode, addr);
+ 
+ 	    target = gen_reg_rtx (mode);
+ 
+ 	    emit_move_insn (target, accum);
+ 
+ 	    if (! masked)
+ 	      emit_insn (fcn (target, accum, wide_reg, mem));
+ 	    else
+ 	      {
+ 		rtx merge, mask;
+ 		merge = expand_normal (CALL_EXPR_ARG (exp, 6));
+ 
+ 		mask = expand_normal (CALL_EXPR_ARG (exp, 7));
+ 
+ 		if (CONST_INT_P (mask))
+ 		  mask = fixup_modeless_constant (mask, HImode);
+ 
+ 		mask = force_reg (HImode, mask);
+ 
+ 		if (GET_MODE (mask) != HImode)
+ 		  mask = gen_rtx_SUBREG (HImode, mask, 0);
+ 
+ 		/* If merge is 0 then we're about to emit z-masked variant.  */
+ 		if (const0_operand (merge, mode))
+ 		  emit_insn (fcn_maskz (target, accum, wide_reg, mem, merge, mask));
+ 		/* If merge is the same as accum then emit merge-masked variant.  */
+ 		else if (CALL_EXPR_ARG (exp, 6) == CALL_EXPR_ARG (exp, 4))
+ 		  {
+ 		    merge = force_reg (mode, merge);
+ 		    emit_insn (fcn_mask (target, wide_reg, mem, merge, mask));
+ 		  }
+ 		/* Merge with something unknown might happen if we z-mask w/ -O0.  */
+ 		else
+ 		  {
+ 		    target = gen_reg_rtx (mode);
+ 		    emit_move_insn (target, merge);
+ 		    emit_insn (fcn_mask (target, wide_reg, mem, target, mask));
+ 		  }
+ 	      }
+ 	    return target;
+ 	  }
+ 
+ 	case IX86_BUILTIN_4FNMASS:
+ 	  fcn = gen_avx5124fmaddps_4fnmaddss;
+ 	  masked = 0;
+ 	  goto s4fma_expand;
+ 
+ 	case IX86_BUILTIN_4FMASS:
+ 	  fcn = gen_avx5124fmaddps_4fmaddss;
+ 	  masked = 0;
+ 	  goto s4fma_expand;
+ 
+ 	case IX86_BUILTIN_4FNMASS_MASK:
+ 	  fcn_mask = gen_avx5124fmaddps_4fnmaddss_mask;
+ 	  fcn_maskz = gen_avx5124fmaddps_4fnmaddss_maskz;
+ 	  goto s4fma_expand;
+ 
+ 	case IX86_BUILTIN_4FMASS_MASK:
+ 	  {
+ 	    tree args[4];
+ 	    rtx ops[4];
+ 	    rtx wide_reg;
+ 	    rtx accum;
+ 	    rtx addr;
+ 	    rtx mem;
+ 
+ 	    fcn_mask = gen_avx5124fmaddps_4fmaddss_mask;
+ 	    fcn_maskz = gen_avx5124fmaddps_4fmaddss_maskz;
+ 
+ s4fma_expand:
+ 	    mode = V4SFmode;
+ 	    wide_reg = gen_reg_rtx (V64SFmode);
+ 	    for (i = 0; i < 4; i++)
+ 	      {
+ 		rtx tmp;
+ 		args[i] = CALL_EXPR_ARG (exp, i);
+ 		ops[i] = expand_normal (args[i]);
+ 
+ 		tmp = gen_reg_rtx (SFmode);
+ 		emit_move_insn (tmp, gen_rtx_SUBREG (SFmode, ops[i], 0));
+ 
+ 		emit_move_insn (gen_rtx_SUBREG (V16SFmode, wide_reg, i * 64),
+ 				gen_rtx_SUBREG (V16SFmode, tmp, 0));
+ 	      }
+ 
+ 	    accum = expand_normal (CALL_EXPR_ARG (exp, 4));
+ 	    accum = force_reg (V4SFmode, accum);
+ 
+ 	    addr = expand_normal (CALL_EXPR_ARG (exp, 5));
+ 	    addr = force_reg (Pmode, addr);
+ 
+ 	    mem = gen_rtx_MEM (V4SFmode, addr);
+ 
+ 	    target = gen_reg_rtx (V4SFmode);
+ 
+ 	    emit_move_insn (target, accum);
+ 
+ 	    if (! masked)
+ 	      emit_insn (fcn (target, accum, wide_reg, mem));
+ 	    else
+ 	      {
+ 		rtx merge, mask;
+ 		merge = expand_normal (CALL_EXPR_ARG (exp, 6));
+ 
+ 		mask = expand_normal (CALL_EXPR_ARG (exp, 7));
+ 
+ 		if (CONST_INT_P (mask))
+ 		  mask = fixup_modeless_constant (mask, QImode);
+ 
+ 		mask = force_reg (QImode, mask);
+ 
+ 		if (GET_MODE (mask) != QImode)
+ 		  mask = gen_rtx_SUBREG (QImode, mask, 0);
+ 
+ 		/* If merge is 0 then we're about to emit z-masked variant.  */
+ 		if (const0_operand (merge, mode))
+ 		  emit_insn (fcn_maskz (target, accum, wide_reg, mem, merge, mask));
+ 		/* If merge is the same as accum then emit merge-masked
+ 		   variant.  */
+ 		else if (CALL_EXPR_ARG (exp, 6) == CALL_EXPR_ARG (exp, 4))
+ 		  {
+ 		    merge = force_reg (mode, merge);
+ 		    emit_insn (fcn_mask (target, wide_reg, mem, merge, mask));
+ 		  }
+ 		/* Merge with something unknown might happen if we z-mask
+ 		   w/ -O0.  */
+ 		else
+ 		  {
+ 		    target = gen_reg_rtx (mode);
+ 		    emit_move_insn (target, merge);
+ 		    emit_insn (fcn_mask (target, wide_reg, mem, target, mask));
+ 		  }
+ 		}
+ 	      return target;
+ 	    }
+ 	  case IX86_BUILTIN_RDPID:
+ 	    return ix86_expand_special_args_builtin (bdesc_args + i, exp,
+ 						     target);
+ 	  case IX86_BUILTIN_FABSQ:
+ 	  case IX86_BUILTIN_COPYSIGNQ:
+ 	    if (!TARGET_SSE)
+ 	      /* Emit a normal call if SSE isn't available.  */
+ 	      return expand_call (exp, target, ignore);
+ 	    /* FALLTHRU */
+ 	  default:
+ 	    return ix86_expand_args_builtin (bdesc_args + i, exp, target);
+ 	  }
+     }
+ 
+   if (fcode >= IX86_BUILTIN__BDESC_COMI_FIRST
+       && fcode <= IX86_BUILTIN__BDESC_COMI_LAST)
+     {
+       i = fcode - IX86_BUILTIN__BDESC_COMI_FIRST;
+       return ix86_expand_sse_comi (bdesc_comi + i, exp, target);
+     }
+ 
+   if (fcode >= IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST
+       && fcode <= IX86_BUILTIN__BDESC_ROUND_ARGS_LAST)
+     {
+       i = fcode - IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST;
+       return ix86_expand_round_builtin (bdesc_round_args + i, exp, target);
+     }
+ 
+   if (fcode >= IX86_BUILTIN__BDESC_PCMPESTR_FIRST
+       && fcode <= IX86_BUILTIN__BDESC_PCMPESTR_LAST)
+     {
+       i = fcode - IX86_BUILTIN__BDESC_PCMPESTR_FIRST;
+       return ix86_expand_sse_pcmpestr (bdesc_pcmpestr + i, exp, target);
+     }
+ 
+   if (fcode >= IX86_BUILTIN__BDESC_PCMPISTR_FIRST
+       && fcode <= IX86_BUILTIN__BDESC_PCMPISTR_LAST)
+     {
+       i = fcode - IX86_BUILTIN__BDESC_PCMPISTR_FIRST;
+       return ix86_expand_sse_pcmpistr (bdesc_pcmpistr + i, exp, target);
+     }
+ 
+   if (fcode >= IX86_BUILTIN__BDESC_MULTI_ARG_FIRST
+       && fcode <= IX86_BUILTIN__BDESC_MULTI_ARG_LAST)
+     {
+       i = fcode - IX86_BUILTIN__BDESC_MULTI_ARG_FIRST;
+       const struct builtin_description *d = bdesc_multi_arg + i;
+       return ix86_expand_multi_arg_builtin (d->icode, exp, target,
+ 					    (enum ix86_builtin_func_type)
+ 					    d->flag, d->comparison);
+     }
+ 
+   if (fcode >= IX86_BUILTIN__BDESC_CET_FIRST
+       && fcode <= IX86_BUILTIN__BDESC_CET_LAST)
+     {
+       i = fcode - IX86_BUILTIN__BDESC_CET_FIRST;
+       return ix86_expand_special_args_builtin (bdesc_cet + i, exp,
+ 					       target);
+     }
+ 
+   if (fcode >= IX86_BUILTIN__BDESC_CET_NORMAL_FIRST
+       && fcode <= IX86_BUILTIN__BDESC_CET_NORMAL_LAST)
+     {
+       i = fcode - IX86_BUILTIN__BDESC_CET_NORMAL_FIRST;
+       return ix86_expand_special_args_builtin (bdesc_cet_rdssp + i, exp,
+ 				       target);
+     }
+ 
+   gcc_unreachable ();
+ }
+ 
+ /* A subroutine of ix86_expand_vector_init_duplicate.  Tries to
+    fill target with val via vec_duplicate.  */
+ 
+ static bool
+ ix86_vector_duplicate_value (machine_mode mode, rtx target, rtx val)
+ {
+   bool ok;
+   rtx_insn *insn;
+   rtx dup;
+ 
+   /* First attempt to recognize VAL as-is.  */
+   dup = gen_vec_duplicate (mode, val);
+   insn = emit_insn (gen_rtx_SET (target, dup));
+   if (recog_memoized (insn) < 0)
+     {
+       rtx_insn *seq;
+       machine_mode innermode = GET_MODE_INNER (mode);
+       rtx reg;
+ 
+       /* If that fails, force VAL into a register.  */
+ 
+       start_sequence ();
+       reg = force_reg (innermode, val);
+       if (GET_MODE (reg) != innermode)
+ 	reg = gen_lowpart (innermode, reg);
+       SET_SRC (PATTERN (insn)) = gen_vec_duplicate (mode, reg);
+       seq = get_insns ();
+       end_sequence ();
+       if (seq)
+ 	emit_insn_before (seq, insn);
+ 
+       ok = recog_memoized (insn) >= 0;
+       gcc_assert (ok);
+     }
+   return true;
+ }
+ 
+ /* Get a vector mode of the same size as the original but with elements
+    twice as wide.  This is only guaranteed to apply to integral vectors.  */
+ 
+ static machine_mode
+ get_mode_wider_vector (machine_mode o)
+ {
+   /* ??? Rely on the ordering that genmodes.c gives to vectors.  */
+   machine_mode n = GET_MODE_WIDER_MODE (o).require ();
+   gcc_assert (GET_MODE_NUNITS (o) == GET_MODE_NUNITS (n) * 2);
+   gcc_assert (GET_MODE_SIZE (o) == GET_MODE_SIZE (n));
+   return n;
+ }
+ 
+ static bool expand_vec_perm_broadcast_1 (struct expand_vec_perm_d *d);
+ static bool expand_vec_perm_1 (struct expand_vec_perm_d *d);
+ 
+ /* A subroutine of ix86_expand_vector_init.  Store into TARGET a vector
+    with all elements equal to VAR.  Return true if successful.  */
+ 
+ static bool
+ ix86_expand_vector_init_duplicate (bool mmx_ok, machine_mode mode,
+ 				   rtx target, rtx val)
+ {
+   bool ok;
+ 
+   switch (mode)
+     {
+     case E_V2SImode:
+     case E_V2SFmode:
+       if (!mmx_ok)
+ 	return false;
+       /* FALLTHRU */
+ 
+     case E_V4DFmode:
+     case E_V4DImode:
+     case E_V8SFmode:
+     case E_V8SImode:
+     case E_V2DFmode:
+     case E_V2DImode:
+     case E_V4SFmode:
+     case E_V4SImode:
+     case E_V16SImode:
+     case E_V8DImode:
+     case E_V16SFmode:
+     case E_V8DFmode:
+       return ix86_vector_duplicate_value (mode, target, val);
+ 
+     case E_V4HImode:
+       if (!mmx_ok)
+ 	return false;
+       if (TARGET_SSE || TARGET_3DNOW_A)
+ 	{
+ 	  rtx x;
+ 
+ 	  val = gen_lowpart (SImode, val);
+ 	  x = gen_rtx_TRUNCATE (HImode, val);
+ 	  x = gen_rtx_VEC_DUPLICATE (mode, x);
+ 	  emit_insn (gen_rtx_SET (target, x));
+ 	  return true;
+ 	}
+       goto widen;
+ 
+     case E_V8QImode:
+       if (!mmx_ok)
+ 	return false;
+       goto widen;
+ 
+     case E_V8HImode:
+       if (TARGET_AVX2)
+ 	return ix86_vector_duplicate_value (mode, target, val);
+ 
+       if (TARGET_SSE2)
+ 	{
+ 	  struct expand_vec_perm_d dperm;
+ 	  rtx tmp1, tmp2;
+ 
+ 	permute:
+ 	  memset (&dperm, 0, sizeof (dperm));
+ 	  dperm.target = target;
+ 	  dperm.vmode = mode;
+ 	  dperm.nelt = GET_MODE_NUNITS (mode);
+ 	  dperm.op0 = dperm.op1 = gen_reg_rtx (mode);
+ 	  dperm.one_operand_p = true;
+ 
+ 	  /* Extend to SImode using a paradoxical SUBREG.  */
+ 	  tmp1 = gen_reg_rtx (SImode);
+ 	  emit_move_insn (tmp1, gen_lowpart (SImode, val));
+ 
+ 	  /* Insert the SImode value as low element of a V4SImode vector. */
+ 	  tmp2 = gen_reg_rtx (V4SImode);
+ 	  emit_insn (gen_vec_setv4si_0 (tmp2, CONST0_RTX (V4SImode), tmp1));
+ 	  emit_move_insn (dperm.op0, gen_lowpart (mode, tmp2));
+ 
+ 	  ok = (expand_vec_perm_1 (&dperm)
+ 		|| expand_vec_perm_broadcast_1 (&dperm));
+ 	  gcc_assert (ok);
+ 	  return ok;
+ 	}
+       goto widen;
+ 
+     case E_V16QImode:
+       if (TARGET_AVX2)
+ 	return ix86_vector_duplicate_value (mode, target, val);
+ 
+       if (TARGET_SSE2)
+ 	goto permute;
+       goto widen;
+ 
+     widen:
+       /* Replicate the value once into the next wider mode and recurse.  */
+       {
+ 	machine_mode smode, wsmode, wvmode;
+ 	rtx x;
+ 
+ 	smode = GET_MODE_INNER (mode);
+ 	wvmode = get_mode_wider_vector (mode);
+ 	wsmode = GET_MODE_INNER (wvmode);
+ 
+ 	val = convert_modes (wsmode, smode, val, true);
+ 	x = expand_simple_binop (wsmode, ASHIFT, val,
+ 				 GEN_INT (GET_MODE_BITSIZE (smode)),
+ 				 NULL_RTX, 1, OPTAB_LIB_WIDEN);
+ 	val = expand_simple_binop (wsmode, IOR, val, x, x, 1, OPTAB_LIB_WIDEN);
+ 
+ 	x = gen_reg_rtx (wvmode);
+ 	ok = ix86_expand_vector_init_duplicate (mmx_ok, wvmode, x, val);
+ 	gcc_assert (ok);
+ 	emit_move_insn (target, gen_lowpart (GET_MODE (target), x));
+ 	return ok;
+       }
+ 
+     case E_V16HImode:
+     case E_V32QImode:
+       if (TARGET_AVX2)
+ 	return ix86_vector_duplicate_value (mode, target, val);
+       else
+ 	{
+ 	  machine_mode hvmode = (mode == V16HImode ? V8HImode : V16QImode);
+ 	  rtx x = gen_reg_rtx (hvmode);
+ 
+ 	  ok = ix86_expand_vector_init_duplicate (false, hvmode, x, val);
+ 	  gcc_assert (ok);
+ 
+ 	  x = gen_rtx_VEC_CONCAT (mode, x, x);
+ 	  emit_insn (gen_rtx_SET (target, x));
+ 	}
+       return true;
+ 
+     case E_V64QImode:
+     case E_V32HImode:
+       if (TARGET_AVX512BW)
+ 	return ix86_vector_duplicate_value (mode, target, val);
+       else
+ 	{
+ 	  machine_mode hvmode = (mode == V32HImode ? V16HImode : V32QImode);
+ 	  rtx x = gen_reg_rtx (hvmode);
+ 
+ 	  ok = ix86_expand_vector_init_duplicate (false, hvmode, x, val);
+ 	  gcc_assert (ok);
+ 
+ 	  x = gen_rtx_VEC_CONCAT (mode, x, x);
+ 	  emit_insn (gen_rtx_SET (target, x));
+ 	}
+       return true;
+ 
+     default:
+       return false;
+     }
+ }
+ 
+ /* A subroutine of ix86_expand_vector_init.  Store into TARGET a vector
+    whose ONE_VAR element is VAR, and other elements are zero.  Return true
+    if successful.  */
+ 
+ static bool
+ ix86_expand_vector_init_one_nonzero (bool mmx_ok, machine_mode mode,
+ 				     rtx target, rtx var, int one_var)
+ {
+   machine_mode vsimode;
+   rtx new_target;
+   rtx x, tmp;
+   bool use_vector_set = false;
+   rtx (*gen_vec_set_0) (rtx, rtx, rtx) = NULL;
+ 
+   switch (mode)
+     {
+     case E_V2DImode:
+       /* For SSE4.1, we normally use vector set.  But if the second
+ 	 element is zero and inter-unit moves are OK, we use movq
+ 	 instead.  */
+       use_vector_set = (TARGET_64BIT && TARGET_SSE4_1
+ 			&& !(TARGET_INTER_UNIT_MOVES_TO_VEC
+ 			     && one_var == 0));
+       break;
+     case E_V16QImode:
+     case E_V4SImode:
+     case E_V4SFmode:
+       use_vector_set = TARGET_SSE4_1;
+       break;
+     case E_V8HImode:
+       use_vector_set = TARGET_SSE2;
+       break;
+     case E_V8QImode:
+       use_vector_set = TARGET_MMX_WITH_SSE && TARGET_SSE4_1;
+       break;
+     case E_V4HImode:
+       use_vector_set = TARGET_SSE || TARGET_3DNOW_A;
+       break;
+     case E_V32QImode:
+     case E_V16HImode:
+       use_vector_set = TARGET_AVX;
+       break;
+     case E_V8SImode:
+       use_vector_set = TARGET_AVX;
+       gen_vec_set_0 = gen_vec_setv8si_0;
+       break;
+     case E_V8SFmode:
+       use_vector_set = TARGET_AVX;
+       gen_vec_set_0 = gen_vec_setv8sf_0;
+       break;
+     case E_V4DFmode:
+       use_vector_set = TARGET_AVX;
+       gen_vec_set_0 = gen_vec_setv4df_0;
+       break;
+     case E_V4DImode:
+       /* Use ix86_expand_vector_set in 64bit mode only.  */
+       use_vector_set = TARGET_AVX && TARGET_64BIT;
+       gen_vec_set_0 = gen_vec_setv4di_0;
+       break;
+     case E_V16SImode:
+       use_vector_set = TARGET_AVX512F && one_var == 0;
+       gen_vec_set_0 = gen_vec_setv16si_0;
+       break;
+     case E_V16SFmode:
+       use_vector_set = TARGET_AVX512F && one_var == 0;
+       gen_vec_set_0 = gen_vec_setv16sf_0;
+       break;
+     case E_V8DFmode:
+       use_vector_set = TARGET_AVX512F && one_var == 0;
+       gen_vec_set_0 = gen_vec_setv8df_0;
+       break;
+     case E_V8DImode:
+       /* Use ix86_expand_vector_set in 64bit mode only.  */
+       use_vector_set = TARGET_AVX512F && TARGET_64BIT && one_var == 0;
+       gen_vec_set_0 = gen_vec_setv8di_0;
+       break;
+     default:
+       break;
+     }
+ 
+   if (use_vector_set)
+     {
+       if (gen_vec_set_0 && one_var == 0)
+ 	{
+ 	  var = force_reg (GET_MODE_INNER (mode), var);
+ 	  emit_insn (gen_vec_set_0 (target, CONST0_RTX (mode), var));
+ 	  return true;
+ 	}
+       emit_insn (gen_rtx_SET (target, CONST0_RTX (mode)));
+       var = force_reg (GET_MODE_INNER (mode), var);
+       ix86_expand_vector_set (mmx_ok, target, var, one_var);
+       return true;
+     }
+ 
+   switch (mode)
+     {
+     case E_V2SFmode:
+     case E_V2SImode:
+       if (!mmx_ok)
+ 	return false;
+       /* FALLTHRU */
+ 
+     case E_V2DFmode:
+     case E_V2DImode:
+       if (one_var != 0)
+ 	return false;
+       var = force_reg (GET_MODE_INNER (mode), var);
+       x = gen_rtx_VEC_CONCAT (mode, var, CONST0_RTX (GET_MODE_INNER (mode)));
+       emit_insn (gen_rtx_SET (target, x));
+       return true;
+ 
+     case E_V4SFmode:
+     case E_V4SImode:
+       if (!REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER)
+ 	new_target = gen_reg_rtx (mode);
+       else
+ 	new_target = target;
+       var = force_reg (GET_MODE_INNER (mode), var);
+       x = gen_rtx_VEC_DUPLICATE (mode, var);
+       x = gen_rtx_VEC_MERGE (mode, x, CONST0_RTX (mode), const1_rtx);
+       emit_insn (gen_rtx_SET (new_target, x));
+       if (one_var != 0)
+ 	{
+ 	  /* We need to shuffle the value to the correct position, so
+ 	     create a new pseudo to store the intermediate result.  */
+ 
+ 	  /* With SSE2, we can use the integer shuffle insns.  */
+ 	  if (mode != V4SFmode && TARGET_SSE2)
+ 	    {
+ 	      emit_insn (gen_sse2_pshufd_1 (new_target, new_target,
+ 					    const1_rtx,
+ 					    GEN_INT (one_var == 1 ? 0 : 1),
+ 					    GEN_INT (one_var == 2 ? 0 : 1),
+ 					    GEN_INT (one_var == 3 ? 0 : 1)));
+ 	      if (target != new_target)
+ 		emit_move_insn (target, new_target);
+ 	      return true;
+ 	    }
+ 
+ 	  /* Otherwise convert the intermediate result to V4SFmode and
+ 	     use the SSE1 shuffle instructions.  */
+ 	  if (mode != V4SFmode)
+ 	    {
+ 	      tmp = gen_reg_rtx (V4SFmode);
+ 	      emit_move_insn (tmp, gen_lowpart (V4SFmode, new_target));
+ 	    }
+ 	  else
+ 	    tmp = new_target;
+ 
+ 	  emit_insn (gen_sse_shufps_v4sf (tmp, tmp, tmp,
+ 				       const1_rtx,
+ 				       GEN_INT (one_var == 1 ? 0 : 1),
+ 				       GEN_INT (one_var == 2 ? 0+4 : 1+4),
+ 				       GEN_INT (one_var == 3 ? 0+4 : 1+4)));
+ 
+ 	  if (mode != V4SFmode)
+ 	    emit_move_insn (target, gen_lowpart (V4SImode, tmp));
+ 	  else if (tmp != target)
+ 	    emit_move_insn (target, tmp);
+ 	}
+       else if (target != new_target)
+ 	emit_move_insn (target, new_target);
+       return true;
+ 
+     case E_V8HImode:
+     case E_V16QImode:
+       vsimode = V4SImode;
+       goto widen;
+     case E_V4HImode:
+     case E_V8QImode:
+       if (!mmx_ok)
+ 	return false;
+       vsimode = V2SImode;
+       goto widen;
+     widen:
+       if (one_var != 0)
+ 	return false;
+ 
+       /* Zero extend the variable element to SImode and recurse.  */
+       var = convert_modes (SImode, GET_MODE_INNER (mode), var, true);
+ 
+       x = gen_reg_rtx (vsimode);
+       if (!ix86_expand_vector_init_one_nonzero (mmx_ok, vsimode, x,
+ 						var, one_var))
+ 	gcc_unreachable ();
+ 
+       emit_move_insn (target, gen_lowpart (mode, x));
+       return true;
+ 
+     default:
+       return false;
+     }
+ }
+ 
+ /* A subroutine of ix86_expand_vector_init.  Store into TARGET a vector
+    consisting of the values in VALS.  It is known that all elements
+    except ONE_VAR are constants.  Return true if successful.  */
+ 
+ static bool
+ ix86_expand_vector_init_one_var (bool mmx_ok, machine_mode mode,
+ 				 rtx target, rtx vals, int one_var)
+ {
+   rtx var = XVECEXP (vals, 0, one_var);
+   machine_mode wmode;
+   rtx const_vec, x;
+ 
+   const_vec = copy_rtx (vals);
+   XVECEXP (const_vec, 0, one_var) = CONST0_RTX (GET_MODE_INNER (mode));
+   const_vec = gen_rtx_CONST_VECTOR (mode, XVEC (const_vec, 0));
+ 
+   switch (mode)
+     {
+     case E_V2DFmode:
+     case E_V2DImode:
+     case E_V2SFmode:
+     case E_V2SImode:
+       /* For the two element vectors, it's just as easy to use
+ 	 the general case.  */
+       return false;
+ 
+     case E_V4DImode:
+       /* Use ix86_expand_vector_set in 64bit mode only.  */
+       if (!TARGET_64BIT)
+ 	return false;
+       /* FALLTHRU */
+     case E_V4DFmode:
+     case E_V8SFmode:
+     case E_V8SImode:
+     case E_V16HImode:
+     case E_V32QImode:
+     case E_V4SFmode:
+     case E_V4SImode:
+     case E_V8HImode:
+     case E_V4HImode:
+       break;
+ 
+     case E_V16QImode:
+       if (TARGET_SSE4_1)
+ 	break;
+       wmode = V8HImode;
+       goto widen;
+     case E_V8QImode:
+       if (TARGET_MMX_WITH_SSE && TARGET_SSE4_1)
+ 	break;
+       wmode = V4HImode;
+       goto widen;
+     widen:
+       /* There's no way to set one QImode entry easily.  Combine
+ 	 the variable value with its adjacent constant value, and
+ 	 promote to an HImode set.  */
+       x = XVECEXP (vals, 0, one_var ^ 1);
+       if (one_var & 1)
+ 	{
+ 	  var = convert_modes (HImode, QImode, var, true);
+ 	  var = expand_simple_binop (HImode, ASHIFT, var, GEN_INT (8),
+ 				     NULL_RTX, 1, OPTAB_LIB_WIDEN);
+ 	  x = GEN_INT (INTVAL (x) & 0xff);
+ 	}
+       else
+ 	{
+ 	  var = convert_modes (HImode, QImode, var, true);
+ 	  x = gen_int_mode (UINTVAL (x) << 8, HImode);
+ 	}
+       if (x != const0_rtx)
+ 	var = expand_simple_binop (HImode, IOR, var, x, var,
+ 				   1, OPTAB_LIB_WIDEN);
+ 
+       x = gen_reg_rtx (wmode);
+       emit_move_insn (x, gen_lowpart (wmode, const_vec));
+       ix86_expand_vector_set (mmx_ok, x, var, one_var >> 1);
+ 
+       emit_move_insn (target, gen_lowpart (mode, x));
+       return true;
+ 
+     default:
+       return false;
+     }
+ 
+   emit_move_insn (target, const_vec);
+   ix86_expand_vector_set (mmx_ok, target, var, one_var);
+   return true;
+ }
+ 
+ /* A subroutine of ix86_expand_vector_init_general.  Use vector
+    concatenate to handle the most general case: all values variable,
+    and none identical.  */
+ 
+ static void
+ ix86_expand_vector_init_concat (machine_mode mode,
+ 				rtx target, rtx *ops, int n)
+ {
+   machine_mode half_mode = VOIDmode;
+   rtx half[2];
+   rtvec v;
+   int i, j;
+ 
+   switch (n)
+     {
+     case 2:
+       switch (mode)
+ 	{
+ 	case E_V16SImode:
+ 	  half_mode = V8SImode;
+ 	  break;
+ 	case E_V16SFmode:
+ 	  half_mode = V8SFmode;
+ 	  break;
+ 	case E_V8DImode:
+ 	  half_mode = V4DImode;
+ 	  break;
+ 	case E_V8DFmode:
+ 	  half_mode = V4DFmode;
+ 	  break;
+ 	case E_V8SImode:
+ 	  half_mode = V4SImode;
+ 	  break;
+ 	case E_V8SFmode:
+ 	  half_mode = V4SFmode;
+ 	  break;
+ 	case E_V4DImode:
+ 	  half_mode = V2DImode;
+ 	  break;
+ 	case E_V4DFmode:
+ 	  half_mode = V2DFmode;
+ 	  break;
+ 	case E_V4SImode:
+ 	  half_mode = V2SImode;
+ 	  break;
+ 	case E_V4SFmode:
+ 	  half_mode = V2SFmode;
+ 	  break;
+ 	case E_V2DImode:
+ 	  half_mode = DImode;
+ 	  break;
+ 	case E_V2SImode:
+ 	  half_mode = SImode;
+ 	  break;
+ 	case E_V2DFmode:
+ 	  half_mode = DFmode;
+ 	  break;
+ 	case E_V2SFmode:
+ 	  half_mode = SFmode;
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+ 
+       if (!register_operand (ops[1], half_mode))
+ 	ops[1] = force_reg (half_mode, ops[1]);
+       if (!register_operand (ops[0], half_mode))
+ 	ops[0] = force_reg (half_mode, ops[0]);
+       emit_insn (gen_rtx_SET (target, gen_rtx_VEC_CONCAT (mode, ops[0],
+ 							  ops[1])));
+       break;
+ 
+     case 4:
+       switch (mode)
+ 	{
+ 	case E_V4DImode:
+ 	  half_mode = V2DImode;
+ 	  break;
+ 	case E_V4DFmode:
+ 	  half_mode = V2DFmode;
+ 	  break;
+ 	case E_V4SImode:
+ 	  half_mode = V2SImode;
+ 	  break;
+ 	case E_V4SFmode:
+ 	  half_mode = V2SFmode;
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+       goto half;
+ 
+     case 8:
+       switch (mode)
+ 	{
+ 	case E_V8DImode:
+ 	  half_mode = V4DImode;
+ 	  break;
+ 	case E_V8DFmode:
+ 	  half_mode = V4DFmode;
+ 	  break;
+ 	case E_V8SImode:
+ 	  half_mode = V4SImode;
+ 	  break;
+ 	case E_V8SFmode:
+ 	  half_mode = V4SFmode;
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+       goto half;
+ 
+     case 16:
+       switch (mode)
+ 	{
+ 	case E_V16SImode:
+ 	  half_mode = V8SImode;
+ 	  break;
+ 	case E_V16SFmode:
+ 	  half_mode = V8SFmode;
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+       goto half;
+ 
+ half:
+       /* FIXME: We process inputs backward to help RA.  PR 36222.  */
+       i = n - 1;
+       for (j = 1; j != -1; j--)
+ 	{
+ 	  half[j] = gen_reg_rtx (half_mode);
+ 	  switch (n >> 1)
+ 	    {
+ 	    case 2:
+ 	      v = gen_rtvec (2, ops[i-1], ops[i]);
+ 	      i -= 2;
+ 	      break;
+ 	    case 4:
+ 	      v = gen_rtvec (4, ops[i-3], ops[i-2], ops[i-1], ops[i]);
+ 	      i -= 4;
+ 	      break;
+ 	    case 8:
+ 	      v = gen_rtvec (8, ops[i-7], ops[i-6], ops[i-5], ops[i-4],
+ 			     ops[i-3], ops[i-2], ops[i-1], ops[i]);
+ 	      i -= 8;
+ 	      break;
+ 	    default:
+ 	      gcc_unreachable ();
+ 	    }
+ 	  ix86_expand_vector_init (false, half[j],
+ 				   gen_rtx_PARALLEL (half_mode, v));
+ 	}
+ 
+       ix86_expand_vector_init_concat (mode, target, half, 2);
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ }
+ 
+ /* A subroutine of ix86_expand_vector_init_general.  Use vector
+    interleave to handle the most general case: all values variable,
+    and none identical.  */
+ 
+ static void
+ ix86_expand_vector_init_interleave (machine_mode mode,
+ 				    rtx target, rtx *ops, int n)
+ {
+   machine_mode first_imode, second_imode, third_imode, inner_mode;
+   int i, j;
+   rtx op0, op1;
+   rtx (*gen_load_even) (rtx, rtx, rtx);
+   rtx (*gen_interleave_first_low) (rtx, rtx, rtx);
+   rtx (*gen_interleave_second_low) (rtx, rtx, rtx);
+ 
+   switch (mode)
+     {
+     case E_V8HImode:
+       gen_load_even = gen_vec_setv8hi;
+       gen_interleave_first_low = gen_vec_interleave_lowv4si;
+       gen_interleave_second_low = gen_vec_interleave_lowv2di;
+       inner_mode = HImode;
+       first_imode = V4SImode;
+       second_imode = V2DImode;
+       third_imode = VOIDmode;
+       break;
+     case E_V16QImode:
+       gen_load_even = gen_vec_setv16qi;
+       gen_interleave_first_low = gen_vec_interleave_lowv8hi;
+       gen_interleave_second_low = gen_vec_interleave_lowv4si;
+       inner_mode = QImode;
+       first_imode = V8HImode;
+       second_imode = V4SImode;
+       third_imode = V2DImode;
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   for (i = 0; i < n; i++)
+     {
+       /* Extend the odd elment to SImode using a paradoxical SUBREG.  */
+       op0 = gen_reg_rtx (SImode);
+       emit_move_insn (op0, gen_lowpart (SImode, ops [i + i]));
+ 
+       /* Insert the SImode value as low element of V4SImode vector. */
+       op1 = gen_reg_rtx (V4SImode);
+       op0 = gen_rtx_VEC_MERGE (V4SImode,
+ 			       gen_rtx_VEC_DUPLICATE (V4SImode,
+ 						      op0),
+ 			       CONST0_RTX (V4SImode),
+ 			       const1_rtx);
+       emit_insn (gen_rtx_SET (op1, op0));
+ 
+       /* Cast the V4SImode vector back to a vector in orignal mode.  */
+       op0 = gen_reg_rtx (mode);
+       emit_move_insn (op0, gen_lowpart (mode, op1));
+ 
+       /* Load even elements into the second position.  */
+       emit_insn (gen_load_even (op0,
+ 				force_reg (inner_mode,
+ 					   ops [i + i + 1]),
+ 				const1_rtx));
+ 
+       /* Cast vector to FIRST_IMODE vector.  */
+       ops[i] = gen_reg_rtx (first_imode);
+       emit_move_insn (ops[i], gen_lowpart (first_imode, op0));
+     }
+ 
+   /* Interleave low FIRST_IMODE vectors.  */
+   for (i = j = 0; i < n; i += 2, j++)
+     {
+       op0 = gen_reg_rtx (first_imode);
+       emit_insn (gen_interleave_first_low (op0, ops[i], ops[i + 1]));
+ 
+       /* Cast FIRST_IMODE vector to SECOND_IMODE vector.  */
+       ops[j] = gen_reg_rtx (second_imode);
+       emit_move_insn (ops[j], gen_lowpart (second_imode, op0));
+     }
+ 
+   /* Interleave low SECOND_IMODE vectors.  */
+   switch (second_imode)
+     {
+     case E_V4SImode:
+       for (i = j = 0; i < n / 2; i += 2, j++)
+ 	{
+ 	  op0 = gen_reg_rtx (second_imode);
+ 	  emit_insn (gen_interleave_second_low (op0, ops[i],
+ 						ops[i + 1]));
+ 
+ 	  /* Cast the SECOND_IMODE vector to the THIRD_IMODE
+ 	     vector.  */
+ 	  ops[j] = gen_reg_rtx (third_imode);
+ 	  emit_move_insn (ops[j], gen_lowpart (third_imode, op0));
+ 	}
+       second_imode = V2DImode;
+       gen_interleave_second_low = gen_vec_interleave_lowv2di;
+       /* FALLTHRU */
+ 
+     case E_V2DImode:
+       op0 = gen_reg_rtx (second_imode);
+       emit_insn (gen_interleave_second_low (op0, ops[0],
+ 					    ops[1]));
+ 
+       /* Cast the SECOND_IMODE vector back to a vector on original
+ 	 mode.  */
+       emit_insn (gen_rtx_SET (target, gen_lowpart (mode, op0)));
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ }
+ 
+ /* A subroutine of ix86_expand_vector_init.  Handle the most general case:
+    all values variable, and none identical.  */
+ 
+ static void
+ ix86_expand_vector_init_general (bool mmx_ok, machine_mode mode,
+ 				 rtx target, rtx vals)
+ {
+   rtx ops[64], op0, op1, op2, op3, op4, op5;
+   machine_mode half_mode = VOIDmode;
+   machine_mode quarter_mode = VOIDmode;
+   int n, i;
+ 
+   switch (mode)
+     {
+     case E_V2SFmode:
+     case E_V2SImode:
+       if (!mmx_ok && !TARGET_SSE)
+ 	break;
+       /* FALLTHRU */
+ 
+     case E_V16SImode:
+     case E_V16SFmode:
+     case E_V8DFmode:
+     case E_V8DImode:
+     case E_V8SFmode:
+     case E_V8SImode:
+     case E_V4DFmode:
+     case E_V4DImode:
+     case E_V4SFmode:
+     case E_V4SImode:
+     case E_V2DFmode:
+     case E_V2DImode:
+       n = GET_MODE_NUNITS (mode);
+       for (i = 0; i < n; i++)
+ 	ops[i] = XVECEXP (vals, 0, i);
+       ix86_expand_vector_init_concat (mode, target, ops, n);
+       return;
+ 
+     case E_V2TImode:
+       for (i = 0; i < 2; i++)
+ 	ops[i] = gen_lowpart (V2DImode, XVECEXP (vals, 0, i));
+       op0 = gen_reg_rtx (V4DImode);
+       ix86_expand_vector_init_concat (V4DImode, op0, ops, 2);
+       emit_move_insn (target, gen_lowpart (GET_MODE (target), op0));
+       return;
+ 
+     case E_V4TImode:
+       for (i = 0; i < 4; i++)
+ 	ops[i] = gen_lowpart (V2DImode, XVECEXP (vals, 0, i));
+       ops[4] = gen_reg_rtx (V4DImode);
+       ix86_expand_vector_init_concat (V4DImode, ops[4], ops, 2);
+       ops[5] = gen_reg_rtx (V4DImode);
+       ix86_expand_vector_init_concat (V4DImode, ops[5], ops + 2, 2);
+       op0 = gen_reg_rtx (V8DImode);
+       ix86_expand_vector_init_concat (V8DImode, op0, ops + 4, 2);
+       emit_move_insn (target, gen_lowpart (GET_MODE (target), op0));
+       return;
+ 
+     case E_V32QImode:
+       half_mode = V16QImode;
+       goto half;
+ 
+     case E_V16HImode:
+       half_mode = V8HImode;
+       goto half;
+ 
+ half:
+       n = GET_MODE_NUNITS (mode);
+       for (i = 0; i < n; i++)
+ 	ops[i] = XVECEXP (vals, 0, i);
+       op0 = gen_reg_rtx (half_mode);
+       op1 = gen_reg_rtx (half_mode);
+       ix86_expand_vector_init_interleave (half_mode, op0, ops,
+ 					  n >> 2);
+       ix86_expand_vector_init_interleave (half_mode, op1,
+ 					  &ops [n >> 1], n >> 2);
+       emit_insn (gen_rtx_SET (target, gen_rtx_VEC_CONCAT (mode, op0, op1)));
+       return;
+ 
+     case E_V64QImode:
+       quarter_mode = V16QImode;
+       half_mode = V32QImode;
+       goto quarter;
+ 
+     case E_V32HImode:
+       quarter_mode = V8HImode;
+       half_mode = V16HImode;
+       goto quarter;
+ 
+ quarter:
+       n = GET_MODE_NUNITS (mode);
+       for (i = 0; i < n; i++)
+ 	ops[i] = XVECEXP (vals, 0, i);
+       op0 = gen_reg_rtx (quarter_mode);
+       op1 = gen_reg_rtx (quarter_mode);
+       op2 = gen_reg_rtx (quarter_mode);
+       op3 = gen_reg_rtx (quarter_mode);
+       op4 = gen_reg_rtx (half_mode);
+       op5 = gen_reg_rtx (half_mode);
+       ix86_expand_vector_init_interleave (quarter_mode, op0, ops,
+ 					  n >> 3);
+       ix86_expand_vector_init_interleave (quarter_mode, op1,
+ 					  &ops [n >> 2], n >> 3);
+       ix86_expand_vector_init_interleave (quarter_mode, op2,
+ 					  &ops [n >> 1], n >> 3);
+       ix86_expand_vector_init_interleave (quarter_mode, op3,
+ 					  &ops [(n >> 1) | (n >> 2)], n >> 3);
+       emit_insn (gen_rtx_SET (op4, gen_rtx_VEC_CONCAT (half_mode, op0, op1)));
+       emit_insn (gen_rtx_SET (op5, gen_rtx_VEC_CONCAT (half_mode, op2, op3)));
+       emit_insn (gen_rtx_SET (target, gen_rtx_VEC_CONCAT (mode, op4, op5)));
+       return;
+ 
+     case E_V16QImode:
+       if (!TARGET_SSE4_1)
+ 	break;
+       /* FALLTHRU */
+ 
+     case E_V8HImode:
+       if (!TARGET_SSE2)
+ 	break;
+ 
+       /* Don't use ix86_expand_vector_init_interleave if we can't
+ 	 move from GPR to SSE register directly.  */
+       if (!TARGET_INTER_UNIT_MOVES_TO_VEC)
+ 	break;
+ 
+       n = GET_MODE_NUNITS (mode);
+       for (i = 0; i < n; i++)
+ 	ops[i] = XVECEXP (vals, 0, i);
+       ix86_expand_vector_init_interleave (mode, target, ops, n >> 1);
+       return;
+ 
+     case E_V4HImode:
+     case E_V8QImode:
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+     {
+       int i, j, n_elts, n_words, n_elt_per_word;
+       machine_mode inner_mode;
+       rtx words[4], shift;
+ 
+       inner_mode = GET_MODE_INNER (mode);
+       n_elts = GET_MODE_NUNITS (mode);
+       n_words = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
+       n_elt_per_word = n_elts / n_words;
+       shift = GEN_INT (GET_MODE_BITSIZE (inner_mode));
+ 
+       for (i = 0; i < n_words; ++i)
+ 	{
+ 	  rtx word = NULL_RTX;
+ 
+ 	  for (j = 0; j < n_elt_per_word; ++j)
+ 	    {
+ 	      rtx elt = XVECEXP (vals, 0, (i+1)*n_elt_per_word - j - 1);
+ 	      elt = convert_modes (word_mode, inner_mode, elt, true);
+ 
+ 	      if (j == 0)
+ 		word = elt;
+ 	      else
+ 		{
+ 		  word = expand_simple_binop (word_mode, ASHIFT, word, shift,
+ 					      word, 1, OPTAB_LIB_WIDEN);
+ 		  word = expand_simple_binop (word_mode, IOR, word, elt,
+ 					      word, 1, OPTAB_LIB_WIDEN);
+ 		}
+ 	    }
+ 
+ 	  words[i] = word;
+ 	}
+ 
+       if (n_words == 1)
+ 	emit_move_insn (target, gen_lowpart (mode, words[0]));
+       else if (n_words == 2)
+ 	{
+ 	  rtx tmp = gen_reg_rtx (mode);
+ 	  emit_clobber (tmp);
+ 	  emit_move_insn (gen_lowpart (word_mode, tmp), words[0]);
+ 	  emit_move_insn (gen_highpart (word_mode, tmp), words[1]);
+ 	  emit_move_insn (target, tmp);
+ 	}
+       else if (n_words == 4)
+ 	{
+ 	  rtx tmp = gen_reg_rtx (V4SImode);
+ 	  gcc_assert (word_mode == SImode);
+ 	  vals = gen_rtx_PARALLEL (V4SImode, gen_rtvec_v (4, words));
+ 	  ix86_expand_vector_init_general (false, V4SImode, tmp, vals);
+ 	  emit_move_insn (target, gen_lowpart (mode, tmp));
+ 	}
+       else
+ 	gcc_unreachable ();
+     }
+ }
+ 
+ /* Initialize vector TARGET via VALS.  Suppress the use of MMX
+    instructions unless MMX_OK is true.  */
+ 
+ void
+ ix86_expand_vector_init (bool mmx_ok, rtx target, rtx vals)
+ {
+   machine_mode mode = GET_MODE (target);
+   machine_mode inner_mode = GET_MODE_INNER (mode);
+   int n_elts = GET_MODE_NUNITS (mode);
+   int n_var = 0, one_var = -1;
+   bool all_same = true, all_const_zero = true;
+   int i;
+   rtx x;
+ 
+   /* Handle first initialization from vector elts.  */
+   if (n_elts != XVECLEN (vals, 0))
+     {
+       rtx subtarget = target;
+       x = XVECEXP (vals, 0, 0);
+       gcc_assert (GET_MODE_INNER (GET_MODE (x)) == inner_mode);
+       if (GET_MODE_NUNITS (GET_MODE (x)) * 2 == n_elts)
+ 	{
+ 	  rtx ops[2] = { XVECEXP (vals, 0, 0), XVECEXP (vals, 0, 1) };
+ 	  if (inner_mode == QImode || inner_mode == HImode)
+ 	    {
+ 	      unsigned int n_bits = n_elts * GET_MODE_SIZE (inner_mode);
+ 	      mode = mode_for_vector (SImode, n_bits / 4).require ();
+ 	      inner_mode = mode_for_vector (SImode, n_bits / 8).require ();
+ 	      ops[0] = gen_lowpart (inner_mode, ops[0]);
+ 	      ops[1] = gen_lowpart (inner_mode, ops[1]);
+ 	      subtarget = gen_reg_rtx (mode);
+ 	    }
+ 	  ix86_expand_vector_init_concat (mode, subtarget, ops, 2);
+ 	  if (subtarget != target)
+ 	    emit_move_insn (target, gen_lowpart (GET_MODE (target), subtarget));
+ 	  return;
+ 	}
+       gcc_unreachable ();
+     }
+ 
+   for (i = 0; i < n_elts; ++i)
+     {
+       x = XVECEXP (vals, 0, i);
+       if (!(CONST_SCALAR_INT_P (x)
+ 	    || CONST_DOUBLE_P (x)
+ 	    || CONST_FIXED_P (x)))
+ 	n_var++, one_var = i;
+       else if (x != CONST0_RTX (inner_mode))
+ 	all_const_zero = false;
+       if (i > 0 && !rtx_equal_p (x, XVECEXP (vals, 0, 0)))
+ 	all_same = false;
+     }
+ 
+   /* Constants are best loaded from the constant pool.  */
+   if (n_var == 0)
+     {
+       emit_move_insn (target, gen_rtx_CONST_VECTOR (mode, XVEC (vals, 0)));
+       return;
+     }
+ 
+   /* If all values are identical, broadcast the value.  */
+   if (all_same
+       && ix86_expand_vector_init_duplicate (mmx_ok, mode, target,
+ 					    XVECEXP (vals, 0, 0)))
+     return;
+ 
+   /* Values where only one field is non-constant are best loaded from
+      the pool and overwritten via move later.  */
+   if (n_var == 1)
+     {
+       if (all_const_zero
+ 	  && ix86_expand_vector_init_one_nonzero (mmx_ok, mode, target,
+ 						  XVECEXP (vals, 0, one_var),
+ 						  one_var))
+ 	return;
+ 
+       if (ix86_expand_vector_init_one_var (mmx_ok, mode, target, vals, one_var))
+ 	return;
+     }
+ 
+   ix86_expand_vector_init_general (mmx_ok, mode, target, vals);
+ }
+ 
+ void
+ ix86_expand_vector_set (bool mmx_ok, rtx target, rtx val, int elt)
+ {
+   machine_mode mode = GET_MODE (target);
+   machine_mode inner_mode = GET_MODE_INNER (mode);
+   machine_mode half_mode;
+   bool use_vec_merge = false;
+   rtx tmp;
+   static rtx (*gen_extract[6][2]) (rtx, rtx)
+     = {
+ 	{ gen_vec_extract_lo_v32qi, gen_vec_extract_hi_v32qi },
+ 	{ gen_vec_extract_lo_v16hi, gen_vec_extract_hi_v16hi },
+ 	{ gen_vec_extract_lo_v8si, gen_vec_extract_hi_v8si },
+ 	{ gen_vec_extract_lo_v4di, gen_vec_extract_hi_v4di },
+ 	{ gen_vec_extract_lo_v8sf, gen_vec_extract_hi_v8sf },
+ 	{ gen_vec_extract_lo_v4df, gen_vec_extract_hi_v4df }
+       };
+   static rtx (*gen_insert[6][2]) (rtx, rtx, rtx)
+     = {
+ 	{ gen_vec_set_lo_v32qi, gen_vec_set_hi_v32qi },
+ 	{ gen_vec_set_lo_v16hi, gen_vec_set_hi_v16hi },
+ 	{ gen_vec_set_lo_v8si, gen_vec_set_hi_v8si },
+ 	{ gen_vec_set_lo_v4di, gen_vec_set_hi_v4di },
+ 	{ gen_vec_set_lo_v8sf, gen_vec_set_hi_v8sf },
+ 	{ gen_vec_set_lo_v4df, gen_vec_set_hi_v4df }
+       };
+   int i, j, n;
+   machine_mode mmode = VOIDmode;
+   rtx (*gen_blendm) (rtx, rtx, rtx, rtx);
+ 
+   switch (mode)
+     {
+     case E_V2SImode:
+       use_vec_merge = TARGET_MMX_WITH_SSE && TARGET_SSE4_1;
+       if (use_vec_merge)
+ 	break;
+       /* FALLTHRU */
+ 
+     case E_V2SFmode:
+       if (mmx_ok)
+ 	{
+ 	  tmp = gen_reg_rtx (GET_MODE_INNER (mode));
+ 	  ix86_expand_vector_extract (true, tmp, target, 1 - elt);
+ 	  if (elt == 0)
+ 	    tmp = gen_rtx_VEC_CONCAT (mode, val, tmp);
+ 	  else
+ 	    tmp = gen_rtx_VEC_CONCAT (mode, tmp, val);
+ 	  emit_insn (gen_rtx_SET (target, tmp));
+ 	  return;
+ 	}
+       break;
+ 
+     case E_V2DImode:
+       use_vec_merge = TARGET_SSE4_1 && TARGET_64BIT;
+       if (use_vec_merge)
+ 	break;
+ 
+       tmp = gen_reg_rtx (GET_MODE_INNER (mode));
+       ix86_expand_vector_extract (false, tmp, target, 1 - elt);
+       if (elt == 0)
+ 	tmp = gen_rtx_VEC_CONCAT (mode, val, tmp);
+       else
+ 	tmp = gen_rtx_VEC_CONCAT (mode, tmp, val);
+       emit_insn (gen_rtx_SET (target, tmp));
+       return;
+ 
+     case E_V2DFmode:
+       /* NB: For ELT == 0, use standard scalar operation patterns which
+ 	 preserve the rest of the vector for combiner:
+ 
+ 	 (vec_merge:V2DF
+ 	   (vec_duplicate:V2DF (reg:DF))
+ 	   (reg:V2DF)
+ 	   (const_int 1))
+        */
+       if (elt == 0)
+ 	goto do_vec_merge;
+ 
+       {
+ 	rtx op0, op1;
+ 
+ 	/* For the two element vectors, we implement a VEC_CONCAT with
+ 	   the extraction of the other element.  */
+ 
+ 	tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, GEN_INT (1 - elt)));
+ 	tmp = gen_rtx_VEC_SELECT (inner_mode, target, tmp);
+ 
+ 	if (elt == 0)
+ 	  op0 = val, op1 = tmp;
+ 	else
+ 	  op0 = tmp, op1 = val;
+ 
+ 	tmp = gen_rtx_VEC_CONCAT (mode, op0, op1);
+ 	emit_insn (gen_rtx_SET (target, tmp));
+       }
+       return;
+ 
+     case E_V4SFmode:
+       use_vec_merge = TARGET_SSE4_1;
+       if (use_vec_merge)
+ 	break;
+ 
+       switch (elt)
+ 	{
+ 	case 0:
+ 	  use_vec_merge = true;
+ 	  break;
+ 
+ 	case 1:
+ 	  /* tmp = target = A B C D */
+ 	  tmp = copy_to_reg (target);
+ 	  /* target = A A B B */
+ 	  emit_insn (gen_vec_interleave_lowv4sf (target, target, target));
+ 	  /* target = X A B B */
+ 	  ix86_expand_vector_set (false, target, val, 0);
+ 	  /* target = A X C D  */
+ 	  emit_insn (gen_sse_shufps_v4sf (target, target, tmp,
+ 					  const1_rtx, const0_rtx,
+ 					  GEN_INT (2+4), GEN_INT (3+4)));
+ 	  return;
+ 
+ 	case 2:
+ 	  /* tmp = target = A B C D */
+ 	  tmp = copy_to_reg (target);
+ 	  /* tmp = X B C D */
+ 	  ix86_expand_vector_set (false, tmp, val, 0);
+ 	  /* target = A B X D */
+ 	  emit_insn (gen_sse_shufps_v4sf (target, target, tmp,
+ 					  const0_rtx, const1_rtx,
+ 					  GEN_INT (0+4), GEN_INT (3+4)));
+ 	  return;
+ 
+ 	case 3:
+ 	  /* tmp = target = A B C D */
+ 	  tmp = copy_to_reg (target);
+ 	  /* tmp = X B C D */
+ 	  ix86_expand_vector_set (false, tmp, val, 0);
+ 	  /* target = A B X D */
+ 	  emit_insn (gen_sse_shufps_v4sf (target, target, tmp,
+ 					  const0_rtx, const1_rtx,
+ 					  GEN_INT (2+4), GEN_INT (0+4)));
+ 	  return;
+ 
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+       break;
+ 
+     case E_V4SImode:
+       use_vec_merge = TARGET_SSE4_1;
+       if (use_vec_merge)
+ 	break;
+ 
+       /* Element 0 handled by vec_merge below.  */
+       if (elt == 0)
+ 	{
+ 	  use_vec_merge = true;
+ 	  break;
+ 	}
+ 
+       if (TARGET_SSE2)
+ 	{
+ 	  /* With SSE2, use integer shuffles to swap element 0 and ELT,
+ 	     store into element 0, then shuffle them back.  */
+ 
+ 	  rtx order[4];
+ 
+ 	  order[0] = GEN_INT (elt);
+ 	  order[1] = const1_rtx;
+ 	  order[2] = const2_rtx;
+ 	  order[3] = GEN_INT (3);
+ 	  order[elt] = const0_rtx;
+ 
+ 	  emit_insn (gen_sse2_pshufd_1 (target, target, order[0],
+ 					order[1], order[2], order[3]));
+ 
+ 	  ix86_expand_vector_set (false, target, val, 0);
+ 
+ 	  emit_insn (gen_sse2_pshufd_1 (target, target, order[0],
+ 					order[1], order[2], order[3]));
+ 	}
+       else
+ 	{
+ 	  /* For SSE1, we have to reuse the V4SF code.  */
+ 	  rtx t = gen_reg_rtx (V4SFmode);
+ 	  emit_move_insn (t, gen_lowpart (V4SFmode, target));
+ 	  ix86_expand_vector_set (false, t, gen_lowpart (SFmode, val), elt);
+ 	  emit_move_insn (target, gen_lowpart (mode, t));
+ 	}
+       return;
+ 
+     case E_V8HImode:
+       use_vec_merge = TARGET_SSE2;
+       break;
+     case E_V4HImode:
+       use_vec_merge = mmx_ok && (TARGET_SSE || TARGET_3DNOW_A);
+       break;
+ 
+     case E_V16QImode:
+       use_vec_merge = TARGET_SSE4_1;
+       break;
+ 
+     case E_V8QImode:
+       use_vec_merge = TARGET_MMX_WITH_SSE && TARGET_SSE4_1;
+       break;
+ 
+     case E_V32QImode:
+       half_mode = V16QImode;
+       j = 0;
+       n = 16;
+       goto half;
+ 
+     case E_V16HImode:
+       half_mode = V8HImode;
+       j = 1;
+       n = 8;
+       goto half;
+ 
+     case E_V8SImode:
+       half_mode = V4SImode;
+       j = 2;
+       n = 4;
+       goto half;
+ 
+     case E_V4DImode:
+       half_mode = V2DImode;
+       j = 3;
+       n = 2;
+       goto half;
+ 
+     case E_V8SFmode:
+       half_mode = V4SFmode;
+       j = 4;
+       n = 4;
+       goto half;
+ 
+     case E_V4DFmode:
+       half_mode = V2DFmode;
+       j = 5;
+       n = 2;
+       goto half;
+ 
+ half:
+       /* Compute offset.  */
+       i = elt / n;
+       elt %= n;
+ 
+       gcc_assert (i <= 1);
+ 
+       /* Extract the half.  */
+       tmp = gen_reg_rtx (half_mode);
+       emit_insn (gen_extract[j][i] (tmp, target));
+ 
+       /* Put val in tmp at elt.  */
+       ix86_expand_vector_set (false, tmp, val, elt);
+ 
+       /* Put it back.  */
+       emit_insn (gen_insert[j][i] (target, target, tmp));
+       return;
+ 
+     case E_V8DFmode:
+       if (TARGET_AVX512F)
+ 	{
+ 	  mmode = QImode;
+ 	  gen_blendm = gen_avx512f_blendmv8df;
+ 	}
+       break;
+ 
+     case E_V8DImode:
+       if (TARGET_AVX512F)
+ 	{
+ 	  mmode = QImode;
+ 	  gen_blendm = gen_avx512f_blendmv8di;
+ 	}
+       break;
+ 
+     case E_V16SFmode:
+       if (TARGET_AVX512F)
+ 	{
+ 	  mmode = HImode;
+ 	  gen_blendm = gen_avx512f_blendmv16sf;
+ 	}
+       break;
+ 
+     case E_V16SImode:
+       if (TARGET_AVX512F)
+ 	{
+ 	  mmode = HImode;
+ 	  gen_blendm = gen_avx512f_blendmv16si;
+ 	}
+       break;
+ 
+     case E_V32HImode:
+       if (TARGET_AVX512BW)
+ 	{
+ 	  mmode = SImode;
+ 	  gen_blendm = gen_avx512bw_blendmv32hi;
+ 	}
+       else if (TARGET_AVX512F)
+ 	{
+ 	  half_mode = E_V8HImode;
+ 	  n = 8;
+ 	  goto quarter;
+ 	}
+       break;
+ 
+     case E_V64QImode:
+       if (TARGET_AVX512BW)
+ 	{
+ 	  mmode = DImode;
+ 	  gen_blendm = gen_avx512bw_blendmv64qi;
+ 	}
+       else if (TARGET_AVX512F)
+ 	{
+ 	  half_mode = E_V16QImode;
+ 	  n = 16;
+ 	  goto quarter;
+ 	}
+       break;
+ 
+ quarter:
+       /* Compute offset.  */
+       i = elt / n;
+       elt %= n;
+ 
+       gcc_assert (i <= 3);
+ 
+       {
+ 	/* Extract the quarter.  */
+ 	tmp = gen_reg_rtx (V4SImode);
+ 	rtx tmp2 = gen_lowpart (V16SImode, target);
+ 	rtx mask = gen_reg_rtx (QImode);
+ 
+ 	emit_move_insn (mask, constm1_rtx);
+ 	emit_insn (gen_avx512f_vextracti32x4_mask (tmp, tmp2, GEN_INT (i),
+ 						   tmp, mask));
+ 
+ 	tmp2 = gen_reg_rtx (half_mode);
+ 	emit_move_insn (tmp2, gen_lowpart (half_mode, tmp));
+ 	tmp = tmp2;
+ 
+ 	/* Put val in tmp at elt.  */
+ 	ix86_expand_vector_set (false, tmp, val, elt);
+ 
+ 	/* Put it back.  */
+ 	tmp2 = gen_reg_rtx (V16SImode);
+ 	rtx tmp3 = gen_lowpart (V16SImode, target);
+ 	mask = gen_reg_rtx (HImode);
+ 	emit_move_insn (mask, constm1_rtx);
+ 	tmp = gen_lowpart (V4SImode, tmp);
+ 	emit_insn (gen_avx512f_vinserti32x4_mask (tmp2, tmp3, tmp, GEN_INT (i),
+ 						  tmp3, mask));
+ 	emit_move_insn (target, gen_lowpart (mode, tmp2));
+       }
+       return;
+ 
+     default:
+       break;
+     }
+ 
+   if (mmode != VOIDmode)
+     {
+       tmp = gen_reg_rtx (mode);
+       emit_insn (gen_rtx_SET (tmp, gen_rtx_VEC_DUPLICATE (mode, val)));
+       /* The avx512*_blendm<mode> expanders have different operand order
+ 	 from VEC_MERGE.  In VEC_MERGE, the first input operand is used for
+ 	 elements where the mask is set and second input operand otherwise,
+ 	 in {sse,avx}*_*blend* the first input operand is used for elements
+ 	 where the mask is clear and second input operand otherwise.  */
+       emit_insn (gen_blendm (target, target, tmp,
+ 			     force_reg (mmode,
+ 					gen_int_mode (HOST_WIDE_INT_1U << elt,
+ 						      mmode))));
+     }
+   else if (use_vec_merge)
+     {
+ do_vec_merge:
+       tmp = gen_rtx_VEC_DUPLICATE (mode, val);
+       tmp = gen_rtx_VEC_MERGE (mode, tmp, target,
+ 			       GEN_INT (HOST_WIDE_INT_1U << elt));
+       emit_insn (gen_rtx_SET (target, tmp));
+     }
+   else
+     {
+       rtx mem = assign_stack_temp (mode, GET_MODE_SIZE (mode));
+ 
+       emit_move_insn (mem, target);
+ 
+       tmp = adjust_address (mem, inner_mode, elt * GET_MODE_SIZE (inner_mode));
+       emit_move_insn (tmp, val);
+ 
+       emit_move_insn (target, mem);
+     }
+ }
+ 
+ void
+ ix86_expand_vector_extract (bool mmx_ok, rtx target, rtx vec, int elt)
+ {
+   machine_mode mode = GET_MODE (vec);
+   machine_mode inner_mode = GET_MODE_INNER (mode);
+   bool use_vec_extr = false;
+   rtx tmp;
+ 
+   switch (mode)
+     {
+     case E_V2SImode:
+       use_vec_extr = TARGET_MMX_WITH_SSE && TARGET_SSE4_1;
+       if (use_vec_extr)
+ 	break;
+       /* FALLTHRU */
+ 
+     case E_V2SFmode:
+       if (!mmx_ok)
+ 	break;
+       /* FALLTHRU */
+ 
+     case E_V2DFmode:
+     case E_V2DImode:
+     case E_V2TImode:
+     case E_V4TImode:
+       use_vec_extr = true;
+       break;
+ 
+     case E_V4SFmode:
+       use_vec_extr = TARGET_SSE4_1;
+       if (use_vec_extr)
+ 	break;
+ 
+       switch (elt)
+ 	{
+ 	case 0:
+ 	  tmp = vec;
+ 	  break;
+ 
+ 	case 1:
+ 	case 3:
+ 	  tmp = gen_reg_rtx (mode);
+ 	  emit_insn (gen_sse_shufps_v4sf (tmp, vec, vec,
+ 				       GEN_INT (elt), GEN_INT (elt),
+ 				       GEN_INT (elt+4), GEN_INT (elt+4)));
+ 	  break;
+ 
+ 	case 2:
+ 	  tmp = gen_reg_rtx (mode);
+ 	  emit_insn (gen_vec_interleave_highv4sf (tmp, vec, vec));
+ 	  break;
+ 
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+       vec = tmp;
+       use_vec_extr = true;
+       elt = 0;
+       break;
+ 
+     case E_V4SImode:
+       use_vec_extr = TARGET_SSE4_1;
+       if (use_vec_extr)
+ 	break;
+ 
+       if (TARGET_SSE2)
+ 	{
+ 	  switch (elt)
+ 	    {
+ 	    case 0:
+ 	      tmp = vec;
+ 	      break;
+ 
+ 	    case 1:
+ 	    case 3:
+ 	      tmp = gen_reg_rtx (mode);
+ 	      emit_insn (gen_sse2_pshufd_1 (tmp, vec,
+ 					    GEN_INT (elt), GEN_INT (elt),
+ 					    GEN_INT (elt), GEN_INT (elt)));
+ 	      break;
+ 
+ 	    case 2:
+ 	      tmp = gen_reg_rtx (mode);
+ 	      emit_insn (gen_vec_interleave_highv4si (tmp, vec, vec));
+ 	      break;
+ 
+ 	    default:
+ 	      gcc_unreachable ();
+ 	    }
+ 	  vec = tmp;
+ 	  use_vec_extr = true;
+ 	  elt = 0;
+ 	}
+       else
+ 	{
+ 	  /* For SSE1, we have to reuse the V4SF code.  */
+ 	  ix86_expand_vector_extract (false, gen_lowpart (SFmode, target),
+ 				      gen_lowpart (V4SFmode, vec), elt);
+ 	  return;
+ 	}
+       break;
+ 
+     case E_V8HImode:
+       use_vec_extr = TARGET_SSE2;
+       break;
+     case E_V4HImode:
+       use_vec_extr = mmx_ok && (TARGET_SSE || TARGET_3DNOW_A);
+       break;
+ 
+     case E_V16QImode:
+       use_vec_extr = TARGET_SSE4_1;
+       if (!use_vec_extr
+ 	  && TARGET_SSE2
+ 	  && elt == 0
+ 	  && (optimize_insn_for_size_p () || TARGET_INTER_UNIT_MOVES_FROM_VEC))
+ 	{
+ 	  tmp = gen_reg_rtx (SImode);
+ 	  ix86_expand_vector_extract (false, tmp, gen_lowpart (V4SImode, vec),
+ 				      0);
+ 	  emit_insn (gen_rtx_SET (target, gen_lowpart (QImode, tmp)));
+ 	  return;
+ 	}
+       break;
+ 
+     case E_V8SFmode:
+       if (TARGET_AVX)
+ 	{
+ 	  tmp = gen_reg_rtx (V4SFmode);
+ 	  if (elt < 4)
+ 	    emit_insn (gen_vec_extract_lo_v8sf (tmp, vec));
+ 	  else
+ 	    emit_insn (gen_vec_extract_hi_v8sf (tmp, vec));
+ 	  ix86_expand_vector_extract (false, target, tmp, elt & 3);
+ 	  return;
+ 	}
+       break;
+ 
+     case E_V4DFmode:
+       if (TARGET_AVX)
+ 	{
+ 	  tmp = gen_reg_rtx (V2DFmode);
+ 	  if (elt < 2)
+ 	    emit_insn (gen_vec_extract_lo_v4df (tmp, vec));
+ 	  else
+ 	    emit_insn (gen_vec_extract_hi_v4df (tmp, vec));
+ 	  ix86_expand_vector_extract (false, target, tmp, elt & 1);
+ 	  return;
+ 	}
+       break;
+ 
+     case E_V32QImode:
+       if (TARGET_AVX)
+ 	{
+ 	  tmp = gen_reg_rtx (V16QImode);
+ 	  if (elt < 16)
+ 	    emit_insn (gen_vec_extract_lo_v32qi (tmp, vec));
+ 	  else
+ 	    emit_insn (gen_vec_extract_hi_v32qi (tmp, vec));
+ 	  ix86_expand_vector_extract (false, target, tmp, elt & 15);
+ 	  return;
+ 	}
+       break;
+ 
+     case E_V16HImode:
+       if (TARGET_AVX)
+ 	{
+ 	  tmp = gen_reg_rtx (V8HImode);
+ 	  if (elt < 8)
+ 	    emit_insn (gen_vec_extract_lo_v16hi (tmp, vec));
+ 	  else
+ 	    emit_insn (gen_vec_extract_hi_v16hi (tmp, vec));
+ 	  ix86_expand_vector_extract (false, target, tmp, elt & 7);
+ 	  return;
+ 	}
+       break;
+ 
+     case E_V8SImode:
+       if (TARGET_AVX)
+ 	{
+ 	  tmp = gen_reg_rtx (V4SImode);
+ 	  if (elt < 4)
+ 	    emit_insn (gen_vec_extract_lo_v8si (tmp, vec));
+ 	  else
+ 	    emit_insn (gen_vec_extract_hi_v8si (tmp, vec));
+ 	  ix86_expand_vector_extract (false, target, tmp, elt & 3);
+ 	  return;
+ 	}
+       break;
+ 
+     case E_V4DImode:
+       if (TARGET_AVX)
+ 	{
+ 	  tmp = gen_reg_rtx (V2DImode);
+ 	  if (elt < 2)
+ 	    emit_insn (gen_vec_extract_lo_v4di (tmp, vec));
+ 	  else
+ 	    emit_insn (gen_vec_extract_hi_v4di (tmp, vec));
+ 	  ix86_expand_vector_extract (false, target, tmp, elt & 1);
+ 	  return;
+ 	}
+       break;
+ 
+     case E_V32HImode:
+       if (TARGET_AVX512BW)
+ 	{
+ 	  tmp = gen_reg_rtx (V16HImode);
+ 	  if (elt < 16)
+ 	    emit_insn (gen_vec_extract_lo_v32hi (tmp, vec));
+ 	  else
+ 	    emit_insn (gen_vec_extract_hi_v32hi (tmp, vec));
+ 	  ix86_expand_vector_extract (false, target, tmp, elt & 15);
+ 	  return;
+ 	}
+       break;
+ 
+     case E_V64QImode:
+       if (TARGET_AVX512BW)
+ 	{
+ 	  tmp = gen_reg_rtx (V32QImode);
+ 	  if (elt < 32)
+ 	    emit_insn (gen_vec_extract_lo_v64qi (tmp, vec));
+ 	  else
+ 	    emit_insn (gen_vec_extract_hi_v64qi (tmp, vec));
+ 	  ix86_expand_vector_extract (false, target, tmp, elt & 31);
+ 	  return;
+ 	}
+       break;
+ 
+     case E_V16SFmode:
+       tmp = gen_reg_rtx (V8SFmode);
+       if (elt < 8)
+ 	emit_insn (gen_vec_extract_lo_v16sf (tmp, vec));
+       else
+ 	emit_insn (gen_vec_extract_hi_v16sf (tmp, vec));
+       ix86_expand_vector_extract (false, target, tmp, elt & 7);
+       return;
+ 
+     case E_V8DFmode:
+       tmp = gen_reg_rtx (V4DFmode);
+       if (elt < 4)
+ 	emit_insn (gen_vec_extract_lo_v8df (tmp, vec));
+       else
+ 	emit_insn (gen_vec_extract_hi_v8df (tmp, vec));
+       ix86_expand_vector_extract (false, target, tmp, elt & 3);
+       return;
+ 
+     case E_V16SImode:
+       tmp = gen_reg_rtx (V8SImode);
+       if (elt < 8)
+ 	emit_insn (gen_vec_extract_lo_v16si (tmp, vec));
+       else
+ 	emit_insn (gen_vec_extract_hi_v16si (tmp, vec));
+       ix86_expand_vector_extract (false, target, tmp, elt & 7);
+       return;
+ 
+     case E_V8DImode:
+       tmp = gen_reg_rtx (V4DImode);
+       if (elt < 4)
+ 	emit_insn (gen_vec_extract_lo_v8di (tmp, vec));
+       else
+ 	emit_insn (gen_vec_extract_hi_v8di (tmp, vec));
+       ix86_expand_vector_extract (false, target, tmp, elt & 3);
+       return;
+ 
+     case E_V8QImode:
+       use_vec_extr = TARGET_MMX_WITH_SSE && TARGET_SSE4_1;
+       /* ??? Could extract the appropriate HImode element and shift.  */
+       break;
+ 
+     default:
+       break;
+     }
+ 
+   if (use_vec_extr)
+     {
+       tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, GEN_INT (elt)));
+       tmp = gen_rtx_VEC_SELECT (inner_mode, vec, tmp);
+ 
+       /* Let the rtl optimizers know about the zero extension performed.  */
+       if (inner_mode == QImode || inner_mode == HImode)
+ 	{
+ 	  tmp = gen_rtx_ZERO_EXTEND (SImode, tmp);
+ 	  target = gen_lowpart (SImode, target);
+ 	}
+ 
+       emit_insn (gen_rtx_SET (target, tmp));
+     }
+   else
+     {
+       rtx mem = assign_stack_temp (mode, GET_MODE_SIZE (mode));
+ 
+       emit_move_insn (mem, vec);
+ 
+       tmp = adjust_address (mem, inner_mode, elt*GET_MODE_SIZE (inner_mode));
+       emit_move_insn (target, tmp);
+     }
+ }
+ 
+ /* Generate code to copy vector bits i / 2 ... i - 1 from vector SRC
+    to bits 0 ... i / 2 - 1 of vector DEST, which has the same mode.
+    The upper bits of DEST are undefined, though they shouldn't cause
+    exceptions (some bits from src or all zeros are ok).  */
+ 
+ static void
+ emit_reduc_half (rtx dest, rtx src, int i)
+ {
+   rtx tem, d = dest;
+   switch (GET_MODE (src))
+     {
+     case E_V4SFmode:
+       if (i == 128)
+ 	tem = gen_sse_movhlps (dest, src, src);
+       else
+ 	tem = gen_sse_shufps_v4sf (dest, src, src, const1_rtx, const1_rtx,
+ 				   GEN_INT (1 + 4), GEN_INT (1 + 4));
+       break;
+     case E_V2DFmode:
+       tem = gen_vec_interleave_highv2df (dest, src, src);
+       break;
+     case E_V16QImode:
+     case E_V8HImode:
+     case E_V4SImode:
+     case E_V2DImode:
+       d = gen_reg_rtx (V1TImode);
+       tem = gen_sse2_lshrv1ti3 (d, gen_lowpart (V1TImode, src),
+ 				GEN_INT (i / 2));
+       break;
+     case E_V8SFmode:
+       if (i == 256)
+ 	tem = gen_avx_vperm2f128v8sf3 (dest, src, src, const1_rtx);
+       else
+ 	tem = gen_avx_shufps256 (dest, src, src,
+ 				 GEN_INT (i == 128 ? 2 + (3 << 2) : 1));
+       break;
+     case E_V4DFmode:
+       if (i == 256)
+ 	tem = gen_avx_vperm2f128v4df3 (dest, src, src, const1_rtx);
+       else
+ 	tem = gen_avx_shufpd256 (dest, src, src, const1_rtx);
+       break;
+     case E_V32QImode:
+     case E_V16HImode:
+     case E_V8SImode:
+     case E_V4DImode:
+       if (i == 256)
+ 	{
+ 	  if (GET_MODE (dest) != V4DImode)
+ 	    d = gen_reg_rtx (V4DImode);
+ 	  tem = gen_avx2_permv2ti (d, gen_lowpart (V4DImode, src),
+ 				   gen_lowpart (V4DImode, src),
+ 				   const1_rtx);
+ 	}
+       else
+ 	{
+ 	  d = gen_reg_rtx (V2TImode);
+ 	  tem = gen_avx2_lshrv2ti3 (d, gen_lowpart (V2TImode, src),
+ 				    GEN_INT (i / 2));
+ 	}
+       break;
+     case E_V64QImode:
+     case E_V32HImode:
+       if (i < 64)
+ 	{
+ 	  d = gen_reg_rtx (V4TImode);
+ 	  tem = gen_avx512bw_lshrv4ti3 (d, gen_lowpart (V4TImode, src),
+ 					GEN_INT (i / 2));
+ 	  break;
+ 	}
+       /* FALLTHRU */
+     case E_V16SImode:
+     case E_V16SFmode:
+     case E_V8DImode:
+     case E_V8DFmode:
+       if (i > 128)
+ 	tem = gen_avx512f_shuf_i32x4_1 (gen_lowpart (V16SImode, dest),
+ 					gen_lowpart (V16SImode, src),
+ 					gen_lowpart (V16SImode, src),
+ 					GEN_INT (0x4 + (i == 512 ? 4 : 0)),
+ 					GEN_INT (0x5 + (i == 512 ? 4 : 0)),
+ 					GEN_INT (0x6 + (i == 512 ? 4 : 0)),
+ 					GEN_INT (0x7 + (i == 512 ? 4 : 0)),
+ 					GEN_INT (0xC), GEN_INT (0xD),
+ 					GEN_INT (0xE), GEN_INT (0xF),
+ 					GEN_INT (0x10), GEN_INT (0x11),
+ 					GEN_INT (0x12), GEN_INT (0x13),
+ 					GEN_INT (0x14), GEN_INT (0x15),
+ 					GEN_INT (0x16), GEN_INT (0x17));
+       else
+ 	tem = gen_avx512f_pshufd_1 (gen_lowpart (V16SImode, dest),
+ 				    gen_lowpart (V16SImode, src),
+ 				    GEN_INT (i == 128 ? 0x2 : 0x1),
+ 				    GEN_INT (0x3),
+ 				    GEN_INT (0x3),
+ 				    GEN_INT (0x3),
+ 				    GEN_INT (i == 128 ? 0x6 : 0x5),
+ 				    GEN_INT (0x7),
+ 				    GEN_INT (0x7),
+ 				    GEN_INT (0x7),
+ 				    GEN_INT (i == 128 ? 0xA : 0x9),
+ 				    GEN_INT (0xB),
+ 				    GEN_INT (0xB),
+ 				    GEN_INT (0xB),
+ 				    GEN_INT (i == 128 ? 0xE : 0xD),
+ 				    GEN_INT (0xF),
+ 				    GEN_INT (0xF),
+ 				    GEN_INT (0xF));
+       break;
+     default:
+       gcc_unreachable ();
+     }
+   emit_insn (tem);
+   if (d != dest)
+     emit_move_insn (dest, gen_lowpart (GET_MODE (dest), d));
+ }
+ 
+ /* Expand a vector reduction.  FN is the binary pattern to reduce;
+    DEST is the destination; IN is the input vector.  */
+ 
+ void
+ ix86_expand_reduc (rtx (*fn) (rtx, rtx, rtx), rtx dest, rtx in)
+ {
+   rtx half, dst, vec = in;
+   machine_mode mode = GET_MODE (in);
+   int i;
+ 
+   /* SSE4 has a special instruction for V8HImode UMIN reduction.  */
+   if (TARGET_SSE4_1
+       && mode == V8HImode
+       && fn == gen_uminv8hi3)
+     {
+       emit_insn (gen_sse4_1_phminposuw (dest, in));
+       return;
+     }
+ 
+   for (i = GET_MODE_BITSIZE (mode);
+        i > GET_MODE_UNIT_BITSIZE (mode);
+        i >>= 1)
+     {
+       half = gen_reg_rtx (mode);
+       emit_reduc_half (half, vec, i);
+       if (i == GET_MODE_UNIT_BITSIZE (mode) * 2)
+ 	dst = dest;
+       else
+ 	dst = gen_reg_rtx (mode);
+       emit_insn (fn (dst, half, vec));
+       vec = dst;
+     }
+ }
+ 
+ /* Output code to perform a conditional jump to LABEL, if C2 flag in
+    FP status register is set.  */
+ 
+ void
+ ix86_emit_fp_unordered_jump (rtx label)
+ {
+   rtx reg = gen_reg_rtx (HImode);
+   rtx_insn *insn;
+   rtx temp;
+ 
+   emit_insn (gen_x86_fnstsw_1 (reg));
+ 
+   if (TARGET_SAHF && (TARGET_USE_SAHF || optimize_insn_for_size_p ()))
+     {
+       emit_insn (gen_x86_sahf_1 (reg));
+ 
+       temp = gen_rtx_REG (CCmode, FLAGS_REG);
+       temp = gen_rtx_UNORDERED (VOIDmode, temp, const0_rtx);
+     }
+   else
+     {
+       emit_insn (gen_testqi_ext_1_ccno (reg, GEN_INT (0x04)));
+ 
+       temp = gen_rtx_REG (CCNOmode, FLAGS_REG);
+       temp = gen_rtx_NE (VOIDmode, temp, const0_rtx);
+     }
+ 
+   temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
+ 			      gen_rtx_LABEL_REF (VOIDmode, label),
+ 			      pc_rtx);
+   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, temp));
+   predict_jump (REG_BR_PROB_BASE * 10 / 100);
+   JUMP_LABEL (insn) = label;
+ }
+ 
+ /* Output code to perform an sinh XFmode calculation.  */
+ 
+ void ix86_emit_i387_sinh (rtx op0, rtx op1)
+ {
+   rtx e1 = gen_reg_rtx (XFmode);
+   rtx e2 = gen_reg_rtx (XFmode);
+   rtx scratch = gen_reg_rtx (HImode);
+   rtx flags = gen_rtx_REG (CCNOmode, FLAGS_REG);
+   rtx half = const_double_from_real_value (dconsthalf, XFmode);
+   rtx cst1, tmp;
+   rtx_code_label *jump_label = gen_label_rtx ();
+   rtx_insn *insn;
+ 
+   /* scratch = fxam (op1) */
+   emit_insn (gen_fxamxf2_i387 (scratch, op1));
+ 
+   /* e1 = expm1 (|op1|) */
+   emit_insn (gen_absxf2 (e2, op1));
+   emit_insn (gen_expm1xf2 (e1, e2));
+ 
+   /* e2 = e1 / (e1 + 1.0) + e1 */
+   cst1 = force_reg (XFmode, CONST1_RTX (XFmode));
+   emit_insn (gen_addxf3 (e2, e1, cst1));
+   emit_insn (gen_divxf3 (e2, e1, e2));
+   emit_insn (gen_addxf3 (e2, e2, e1));
+ 
+   /* flags = signbit (op1) */
+   emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x02)));
+ 
+   /* if (flags) then e2 = -e2 */
+   tmp = gen_rtx_IF_THEN_ELSE (VOIDmode,
+ 			      gen_rtx_EQ (VOIDmode, flags, const0_rtx),
+ 			      gen_rtx_LABEL_REF (VOIDmode, jump_label),
+ 			      pc_rtx);
+   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
+   predict_jump (REG_BR_PROB_BASE * 50 / 100);
+   JUMP_LABEL (insn) = jump_label;
+ 
+   emit_insn (gen_negxf2 (e2, e2));
+ 
+   emit_label (jump_label);
+   LABEL_NUSES (jump_label) = 1;
+ 
+   /* op0 = 0.5 * e2 */
+   half = force_reg (XFmode, half);
+   emit_insn (gen_mulxf3 (op0, e2, half));
+ }
+ 
+ /* Output code to perform an cosh XFmode calculation.  */
+ 
+ void ix86_emit_i387_cosh (rtx op0, rtx op1)
+ {
+   rtx e1 = gen_reg_rtx (XFmode);
+   rtx e2 = gen_reg_rtx (XFmode);
+   rtx half = const_double_from_real_value (dconsthalf, XFmode);
+   rtx cst1;
+ 
+   /* e1 = exp (op1) */
+   emit_insn (gen_expxf2 (e1, op1));
+ 
+   /* e2 = e1 + 1.0 / e1 */
+   cst1 = force_reg (XFmode, CONST1_RTX (XFmode));
+   emit_insn (gen_divxf3 (e2, cst1, e1));
+   emit_insn (gen_addxf3 (e2, e1, e2));
+ 
+   /* op0 = 0.5 * e2 */
+   half = force_reg (XFmode, half);
+   emit_insn (gen_mulxf3 (op0, e2, half));
+ }
+ 
+ /* Output code to perform an tanh XFmode calculation.  */
+ 
+ void ix86_emit_i387_tanh (rtx op0, rtx op1)
+ {
+   rtx e1 = gen_reg_rtx (XFmode);
+   rtx e2 = gen_reg_rtx (XFmode);
+   rtx scratch = gen_reg_rtx (HImode);
+   rtx flags = gen_rtx_REG (CCNOmode, FLAGS_REG);
+   rtx cst2, tmp;
+   rtx_code_label *jump_label = gen_label_rtx ();
+   rtx_insn *insn;
+ 
+   /* scratch = fxam (op1) */
+   emit_insn (gen_fxamxf2_i387 (scratch, op1));
+ 
+   /* e1 = expm1 (-|2 * op1|) */
+   emit_insn (gen_addxf3 (e2, op1, op1));
+   emit_insn (gen_absxf2 (e2, e2));
+   emit_insn (gen_negxf2 (e2, e2));
+   emit_insn (gen_expm1xf2 (e1, e2));
+ 
+   /* e2 = e1 / (e1 + 2.0) */
+   cst2 = force_reg (XFmode, CONST2_RTX (XFmode));
+   emit_insn (gen_addxf3 (e2, e1, cst2));
+   emit_insn (gen_divxf3 (e2, e1, e2));
+ 
+   /* flags = signbit (op1) */
+   emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x02)));
+ 
+   /* if (!flags) then e2 = -e2 */
+   tmp = gen_rtx_IF_THEN_ELSE (VOIDmode,
+ 			      gen_rtx_NE (VOIDmode, flags, const0_rtx),
+ 			      gen_rtx_LABEL_REF (VOIDmode, jump_label),
+ 			      pc_rtx);
+   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
+   predict_jump (REG_BR_PROB_BASE * 50 / 100);
+   JUMP_LABEL (insn) = jump_label;
+ 
+   emit_insn (gen_negxf2 (e2, e2));
+ 
+   emit_label (jump_label);
+   LABEL_NUSES (jump_label) = 1;
+ 
+   emit_move_insn (op0, e2);
+ }
+ 
+ /* Output code to perform an asinh XFmode calculation.  */
+ 
+ void ix86_emit_i387_asinh (rtx op0, rtx op1)
+ {
+   rtx e1 = gen_reg_rtx (XFmode);
+   rtx e2 = gen_reg_rtx (XFmode);
+   rtx scratch = gen_reg_rtx (HImode);
+   rtx flags = gen_rtx_REG (CCNOmode, FLAGS_REG);
+   rtx cst1, tmp;
+   rtx_code_label *jump_label = gen_label_rtx ();
+   rtx_insn *insn;
+ 
+   /* e2 = sqrt (op1^2 + 1.0) + 1.0 */
+   emit_insn (gen_mulxf3 (e1, op1, op1));
+   cst1 = force_reg (XFmode, CONST1_RTX (XFmode));
+   emit_insn (gen_addxf3 (e2, e1, cst1));
+   emit_insn (gen_sqrtxf2 (e2, e2));
+   emit_insn (gen_addxf3 (e2, e2, cst1));
+ 
+   /* e1 = e1 / e2 */
+   emit_insn (gen_divxf3 (e1, e1, e2));
+ 
+   /* scratch = fxam (op1) */
+   emit_insn (gen_fxamxf2_i387 (scratch, op1));
+ 
+   /* e1 = e1 + |op1| */
+   emit_insn (gen_absxf2 (e2, op1));
+   emit_insn (gen_addxf3 (e1, e1, e2));
+ 
+   /* e2 = log1p (e1) */
+   ix86_emit_i387_log1p (e2, e1);
+ 
+   /* flags = signbit (op1) */
+   emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x02)));
+ 
+   /* if (flags) then e2 = -e2 */
+   tmp = gen_rtx_IF_THEN_ELSE (VOIDmode,
+ 			      gen_rtx_EQ (VOIDmode, flags, const0_rtx),
+ 			      gen_rtx_LABEL_REF (VOIDmode, jump_label),
+ 			      pc_rtx);
+   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
+   predict_jump (REG_BR_PROB_BASE * 50 / 100);
+   JUMP_LABEL (insn) = jump_label;
+ 
+   emit_insn (gen_negxf2 (e2, e2));
+ 
+   emit_label (jump_label);
+   LABEL_NUSES (jump_label) = 1;
+ 
+   emit_move_insn (op0, e2);
+ }
+ 
+ /* Output code to perform an acosh XFmode calculation.  */
+ 
+ void ix86_emit_i387_acosh (rtx op0, rtx op1)
+ {
+   rtx e1 = gen_reg_rtx (XFmode);
+   rtx e2 = gen_reg_rtx (XFmode);
+   rtx cst1 = force_reg (XFmode, CONST1_RTX (XFmode));
+ 
+   /* e2 = sqrt (op1 + 1.0) */
+   emit_insn (gen_addxf3 (e2, op1, cst1));
+   emit_insn (gen_sqrtxf2 (e2, e2));
+ 
+   /* e1 = sqrt (op1 - 1.0) */
+   emit_insn (gen_subxf3 (e1, op1, cst1));
+   emit_insn (gen_sqrtxf2 (e1, e1));
+ 
+   /* e1 = e1 * e2 */
+   emit_insn (gen_mulxf3 (e1, e1, e2));
+ 
+   /* e1 = e1 + op1 */
+   emit_insn (gen_addxf3 (e1, e1, op1));
+ 
+   /* op0 = log (e1) */
+   emit_insn (gen_logxf2 (op0, e1));
+ }
+ 
+ /* Output code to perform an atanh XFmode calculation.  */
+ 
+ void ix86_emit_i387_atanh (rtx op0, rtx op1)
+ {
+   rtx e1 = gen_reg_rtx (XFmode);
+   rtx e2 = gen_reg_rtx (XFmode);
+   rtx scratch = gen_reg_rtx (HImode);
+   rtx flags = gen_rtx_REG (CCNOmode, FLAGS_REG);
+   rtx half = const_double_from_real_value (dconsthalf, XFmode);
+   rtx cst1, tmp;
+   rtx_code_label *jump_label = gen_label_rtx ();
+   rtx_insn *insn;
+ 
+   /* scratch = fxam (op1) */
+   emit_insn (gen_fxamxf2_i387 (scratch, op1));
+ 
+   /* e2 = |op1| */
+   emit_insn (gen_absxf2 (e2, op1));
+ 
+   /* e1 = -(e2 + e2) / (e2 + 1.0) */
+   cst1 = force_reg (XFmode, CONST1_RTX (XFmode));
+   emit_insn (gen_addxf3 (e1, e2, cst1));
+   emit_insn (gen_addxf3 (e2, e2, e2));
+   emit_insn (gen_negxf2 (e2, e2));
+   emit_insn (gen_divxf3 (e1, e2, e1));
+ 
+   /* e2 = log1p (e1) */
+   ix86_emit_i387_log1p (e2, e1);
+ 
+   /* flags = signbit (op1) */
+   emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x02)));
+ 
+   /* if (!flags) then e2 = -e2 */
+   tmp = gen_rtx_IF_THEN_ELSE (VOIDmode,
+ 			      gen_rtx_NE (VOIDmode, flags, const0_rtx),
+ 			      gen_rtx_LABEL_REF (VOIDmode, jump_label),
+ 			      pc_rtx);
+   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
+   predict_jump (REG_BR_PROB_BASE * 50 / 100);
+   JUMP_LABEL (insn) = jump_label;
+ 
+   emit_insn (gen_negxf2 (e2, e2));
+ 
+   emit_label (jump_label);
+   LABEL_NUSES (jump_label) = 1;
+ 
+   /* op0 = 0.5 * e2 */
+   half = force_reg (XFmode, half);
+   emit_insn (gen_mulxf3 (op0, e2, half));
+ }
+ 
+ /* Output code to perform a log1p XFmode calculation.  */
+ 
+ void ix86_emit_i387_log1p (rtx op0, rtx op1)
+ {
+   rtx_code_label *label1 = gen_label_rtx ();
+   rtx_code_label *label2 = gen_label_rtx ();
+ 
+   rtx tmp = gen_reg_rtx (XFmode);
+   rtx res = gen_reg_rtx (XFmode);
+   rtx cst, cstln2, cst1;
+   rtx_insn *insn;
+ 
+   cst = const_double_from_real_value
+     (REAL_VALUE_ATOF ("0.29289321881345247561810596348408353", XFmode), XFmode);
+   cstln2 = force_reg (XFmode, standard_80387_constant_rtx (4)); /* fldln2 */
+ 
+   emit_insn (gen_absxf2 (tmp, op1));
+ 
+   cst = force_reg (XFmode, cst);
+   ix86_expand_branch (GE, tmp, cst, label1);
+   predict_jump (REG_BR_PROB_BASE * 10 / 100);
+   insn = get_last_insn ();
+   JUMP_LABEL (insn) = label1;
+ 
+   emit_insn (gen_fyl2xp1xf3_i387 (res, op1, cstln2));
+   emit_jump (label2);
+ 
+   emit_label (label1);
+   LABEL_NUSES (label1) = 1;
+ 
+   cst1 = force_reg (XFmode, CONST1_RTX (XFmode));
+   emit_insn (gen_rtx_SET (tmp, gen_rtx_PLUS (XFmode, op1, cst1)));
+   emit_insn (gen_fyl2xxf3_i387 (res, tmp, cstln2));
+ 
+   emit_label (label2);
+   LABEL_NUSES (label2) = 1;
+ 
+   emit_move_insn (op0, res);
+ }
+ 
+ /* Emit code for round calculation.  */
+ void ix86_emit_i387_round (rtx op0, rtx op1)
+ {
+   machine_mode inmode = GET_MODE (op1);
+   machine_mode outmode = GET_MODE (op0);
+   rtx e1 = gen_reg_rtx (XFmode);
+   rtx e2 = gen_reg_rtx (XFmode);
+   rtx scratch = gen_reg_rtx (HImode);
+   rtx flags = gen_rtx_REG (CCNOmode, FLAGS_REG);
+   rtx half = const_double_from_real_value (dconsthalf, XFmode);
+   rtx res = gen_reg_rtx (outmode);
+   rtx_code_label *jump_label = gen_label_rtx ();
+   rtx (*floor_insn) (rtx, rtx);
+   rtx (*neg_insn) (rtx, rtx);
+   rtx_insn *insn;
+   rtx tmp;
+ 
+   switch (inmode)
+     {
+     case E_SFmode:
+     case E_DFmode:
+       tmp = gen_reg_rtx (XFmode);
+ 
+       emit_insn (gen_rtx_SET (tmp, gen_rtx_FLOAT_EXTEND (XFmode, op1)));
+       op1 = tmp;
+       break;
+     case E_XFmode:
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   switch (outmode)
+     {
+     case E_SFmode:
+       floor_insn = gen_frndintxf2_floor;
+       neg_insn = gen_negsf2;
+       break;
+     case E_DFmode:
+       floor_insn = gen_frndintxf2_floor;
+       neg_insn = gen_negdf2;
+       break;
+     case E_XFmode:
+       floor_insn = gen_frndintxf2_floor;
+       neg_insn = gen_negxf2;
+       break;
+     case E_HImode:
+       floor_insn = gen_lfloorxfhi2;
+       neg_insn = gen_neghi2;
+       break;
+     case E_SImode:
+       floor_insn = gen_lfloorxfsi2;
+       neg_insn = gen_negsi2;
+       break;
+     case E_DImode:
+       floor_insn = gen_lfloorxfdi2;
+       neg_insn = gen_negdi2;
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   /* round(a) = sgn(a) * floor(fabs(a) + 0.5) */
+ 
+   /* scratch = fxam(op1) */
+   emit_insn (gen_fxamxf2_i387 (scratch, op1));
+ 
+   /* e1 = fabs(op1) */
+   emit_insn (gen_absxf2 (e1, op1));
+ 
+   /* e2 = e1 + 0.5 */
+   half = force_reg (XFmode, half);
+   emit_insn (gen_rtx_SET (e2, gen_rtx_PLUS (XFmode, e1, half)));
+ 
+   /* res = floor(e2) */
+   switch (outmode)
+     {
+     case E_SFmode:
+     case E_DFmode:
+       {
+ 	tmp = gen_reg_rtx (XFmode);
+ 
+ 	emit_insn (floor_insn (tmp, e2));
+ 	emit_insn (gen_rtx_SET (res,
+ 				gen_rtx_UNSPEC (outmode, gen_rtvec (1, tmp),
+ 						UNSPEC_TRUNC_NOOP)));
+       }
+       break;
+     default:
+       emit_insn (floor_insn (res, e2));
+     }
+ 
+   /* flags = signbit(a) */
+   emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x02)));
+ 
+   /* if (flags) then res = -res */
+   tmp = gen_rtx_IF_THEN_ELSE (VOIDmode,
+ 			      gen_rtx_EQ (VOIDmode, flags, const0_rtx),
+ 			      gen_rtx_LABEL_REF (VOIDmode, jump_label),
+ 			      pc_rtx);
+   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
+   predict_jump (REG_BR_PROB_BASE * 50 / 100);
+   JUMP_LABEL (insn) = jump_label;
+ 
+   emit_insn (neg_insn (res, res));
+ 
+   emit_label (jump_label);
+   LABEL_NUSES (jump_label) = 1;
+ 
+   emit_move_insn (op0, res);
+ }
+ 
+ /* Output code to perform a Newton-Rhapson approximation of a single precision
+    floating point divide [http://en.wikipedia.org/wiki/N-th_root_algorithm].  */
+ 
+ void ix86_emit_swdivsf (rtx res, rtx a, rtx b, machine_mode mode)
+ {
+   rtx x0, x1, e0, e1;
+ 
+   x0 = gen_reg_rtx (mode);
+   e0 = gen_reg_rtx (mode);
+   e1 = gen_reg_rtx (mode);
+   x1 = gen_reg_rtx (mode);
+ 
+   /* a / b = a * ((rcp(b) + rcp(b)) - (b * rcp(b) * rcp (b))) */
+ 
+   b = force_reg (mode, b);
+ 
+   /* x0 = rcp(b) estimate */
+   if (mode == V16SFmode || mode == V8DFmode)
+     {
+       if (TARGET_AVX512ER)
+ 	{
+ 	  emit_insn (gen_rtx_SET (x0, gen_rtx_UNSPEC (mode, gen_rtvec (1, b),
+ 						      UNSPEC_RCP28)));
+ 	  /* res = a * x0 */
+ 	  emit_insn (gen_rtx_SET (res, gen_rtx_MULT (mode, a, x0)));
+ 	  return;
+ 	}
+       else
+ 	emit_insn (gen_rtx_SET (x0, gen_rtx_UNSPEC (mode, gen_rtvec (1, b),
+ 						    UNSPEC_RCP14)));
+     }
+   else
+     emit_insn (gen_rtx_SET (x0, gen_rtx_UNSPEC (mode, gen_rtvec (1, b),
+ 						UNSPEC_RCP)));
+ 
+   /* e0 = x0 * b */
+   emit_insn (gen_rtx_SET (e0, gen_rtx_MULT (mode, x0, b)));
+ 
+   /* e0 = x0 * e0 */
+   emit_insn (gen_rtx_SET (e0, gen_rtx_MULT (mode, x0, e0)));
+ 
+   /* e1 = x0 + x0 */
+   emit_insn (gen_rtx_SET (e1, gen_rtx_PLUS (mode, x0, x0)));
+ 
+   /* x1 = e1 - e0 */
+   emit_insn (gen_rtx_SET (x1, gen_rtx_MINUS (mode, e1, e0)));
+ 
+   /* res = a * x1 */
+   emit_insn (gen_rtx_SET (res, gen_rtx_MULT (mode, a, x1)));
+ }
+ 
+ /* Output code to perform a Newton-Rhapson approximation of a
+    single precision floating point [reciprocal] square root.  */
+ 
+ void ix86_emit_swsqrtsf (rtx res, rtx a, machine_mode mode, bool recip)
+ {
+   rtx x0, e0, e1, e2, e3, mthree, mhalf;
+   REAL_VALUE_TYPE r;
+   int unspec;
+ 
+   x0 = gen_reg_rtx (mode);
+   e0 = gen_reg_rtx (mode);
+   e1 = gen_reg_rtx (mode);
+   e2 = gen_reg_rtx (mode);
+   e3 = gen_reg_rtx (mode);
+ 
+   if (TARGET_AVX512ER && mode == V16SFmode)
+     {
+       if (recip)
+ 	/* res = rsqrt28(a) estimate */
+ 	emit_insn (gen_rtx_SET (res, gen_rtx_UNSPEC (mode, gen_rtvec (1, a),
+ 						     UNSPEC_RSQRT28)));
+       else
+ 	{
+ 	  /* x0 = rsqrt28(a) estimate */
+ 	  emit_insn (gen_rtx_SET (x0, gen_rtx_UNSPEC (mode, gen_rtvec (1, a),
+ 						      UNSPEC_RSQRT28)));
+ 	  /* res = rcp28(x0) estimate */
+ 	  emit_insn (gen_rtx_SET (res, gen_rtx_UNSPEC (mode, gen_rtvec (1, x0),
+ 						       UNSPEC_RCP28)));
+ 	}
+       return;
+     }
+ 
+   real_from_integer (&r, VOIDmode, -3, SIGNED);
+   mthree = const_double_from_real_value (r, SFmode);
+ 
+   real_arithmetic (&r, NEGATE_EXPR, &dconsthalf, NULL);
+   mhalf = const_double_from_real_value (r, SFmode);
+   unspec = UNSPEC_RSQRT;
+ 
+   if (VECTOR_MODE_P (mode))
+     {
+       mthree = ix86_build_const_vector (mode, true, mthree);
+       mhalf = ix86_build_const_vector (mode, true, mhalf);
+       /* There is no 512-bit rsqrt.  There is however rsqrt14.  */
+       if (GET_MODE_SIZE (mode) == 64)
+ 	unspec = UNSPEC_RSQRT14;
+     }
+ 
+   /* sqrt(a)  = -0.5 * a * rsqrtss(a) * (a * rsqrtss(a) * rsqrtss(a) - 3.0)
+      rsqrt(a) = -0.5     * rsqrtss(a) * (a * rsqrtss(a) * rsqrtss(a) - 3.0) */
+ 
+   a = force_reg (mode, a);
+ 
+   /* x0 = rsqrt(a) estimate */
+   emit_insn (gen_rtx_SET (x0, gen_rtx_UNSPEC (mode, gen_rtvec (1, a),
+ 					      unspec)));
+ 
+   /* If (a == 0.0) Filter out infinity to prevent NaN for sqrt(0.0).  */
+   if (!recip)
+     {
+       rtx zero = force_reg (mode, CONST0_RTX(mode));
+       rtx mask;
+ 
+       /* Handle masked compare.  */
+       if (VECTOR_MODE_P (mode) && GET_MODE_SIZE (mode) == 64)
+ 	{
+ 	  mask = gen_reg_rtx (HImode);
+ 	  /* Imm value 0x4 corresponds to not-equal comparison.  */
+ 	  emit_insn (gen_avx512f_cmpv16sf3 (mask, zero, a, GEN_INT (0x4)));
+ 	  emit_insn (gen_avx512f_blendmv16sf (x0, zero, x0, mask));
+ 	}
+       else
+ 	{
+ 	  mask = gen_reg_rtx (mode);
+ 	  emit_insn (gen_rtx_SET (mask, gen_rtx_NE (mode, zero, a)));
+ 	  emit_insn (gen_rtx_SET (x0, gen_rtx_AND (mode, x0, mask)));
+ 	}
+     }
+ 
+   /* e0 = x0 * a */
+   emit_insn (gen_rtx_SET (e0, gen_rtx_MULT (mode, x0, a)));
+   /* e1 = e0 * x0 */
+   emit_insn (gen_rtx_SET (e1, gen_rtx_MULT (mode, e0, x0)));
+ 
+   /* e2 = e1 - 3. */
+   mthree = force_reg (mode, mthree);
+   emit_insn (gen_rtx_SET (e2, gen_rtx_PLUS (mode, e1, mthree)));
+ 
+   mhalf = force_reg (mode, mhalf);
+   if (recip)
+     /* e3 = -.5 * x0 */
+     emit_insn (gen_rtx_SET (e3, gen_rtx_MULT (mode, x0, mhalf)));
+   else
+     /* e3 = -.5 * e0 */
+     emit_insn (gen_rtx_SET (e3, gen_rtx_MULT (mode, e0, mhalf)));
+   /* ret = e2 * e3 */
+   emit_insn (gen_rtx_SET (res, gen_rtx_MULT (mode, e2, e3)));
+ }
+ 
+ /* Expand fabs (OP0) and return a new rtx that holds the result.  The
+    mask for masking out the sign-bit is stored in *SMASK, if that is
+    non-null.  */
+ 
+ static rtx
+ ix86_expand_sse_fabs (rtx op0, rtx *smask)
+ {
+   machine_mode vmode, mode = GET_MODE (op0);
+   rtx xa, mask;
+ 
+   xa = gen_reg_rtx (mode);
+   if (mode == SFmode)
+     vmode = V4SFmode;
+   else if (mode == DFmode)
+     vmode = V2DFmode;
+   else
+     vmode = mode;
+   mask = ix86_build_signbit_mask (vmode, VECTOR_MODE_P (mode), true);
+   if (!VECTOR_MODE_P (mode))
+     {
+       /* We need to generate a scalar mode mask in this case.  */
+       rtx tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, const0_rtx));
+       tmp = gen_rtx_VEC_SELECT (mode, mask, tmp);
+       mask = gen_reg_rtx (mode);
+       emit_insn (gen_rtx_SET (mask, tmp));
+     }
+   emit_insn (gen_rtx_SET (xa, gen_rtx_AND (mode, op0, mask)));
+ 
+   if (smask)
+     *smask = mask;
+ 
+   return xa;
+ }
+ 
+ /* Expands a comparison of OP0 with OP1 using comparison code CODE,
+    swapping the operands if SWAP_OPERANDS is true.  The expanded
+    code is a forward jump to a newly created label in case the
+    comparison is true.  The generated label rtx is returned.  */
+ static rtx_code_label *
+ ix86_expand_sse_compare_and_jump (enum rtx_code code, rtx op0, rtx op1,
+                                   bool swap_operands)
+ {
+   bool unordered_compare = ix86_unordered_fp_compare (code);
+   rtx_code_label *label;
+   rtx tmp, reg;
+ 
+   if (swap_operands)
+     std::swap (op0, op1);
+ 
+   label = gen_label_rtx ();
+   tmp = gen_rtx_COMPARE (CCFPmode, op0, op1);
+   if (unordered_compare)
+     tmp = gen_rtx_UNSPEC (CCFPmode, gen_rtvec (1, tmp), UNSPEC_NOTRAP);
+   reg = gen_rtx_REG (CCFPmode, FLAGS_REG);
+   emit_insn (gen_rtx_SET (reg, tmp));
+   tmp = gen_rtx_fmt_ee (code, VOIDmode, reg, const0_rtx);
+   tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp,
+ 			      gen_rtx_LABEL_REF (VOIDmode, label), pc_rtx);
+   tmp = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
+   JUMP_LABEL (tmp) = label;
+ 
+   return label;
+ }
+ 
+ /* Expand a mask generating SSE comparison instruction comparing OP0 with OP1
+    using comparison code CODE.  Operands are swapped for the comparison if
+    SWAP_OPERANDS is true.  Returns a rtx for the generated mask.  */
+ static rtx
+ ix86_expand_sse_compare_mask (enum rtx_code code, rtx op0, rtx op1,
+ 			      bool swap_operands)
+ {
+   rtx (*insn)(rtx, rtx, rtx, rtx);
+   machine_mode mode = GET_MODE (op0);
+   rtx mask = gen_reg_rtx (mode);
+ 
+   if (swap_operands)
+     std::swap (op0, op1);
+ 
+   insn = mode == DFmode ? gen_setcc_df_sse : gen_setcc_sf_sse;
+ 
+   emit_insn (insn (mask, op0, op1,
+ 		   gen_rtx_fmt_ee (code, mode, op0, op1)));
+   return mask;
+ }
+ 
+ /* Expand copysign from SIGN to the positive value ABS_VALUE
+    storing in RESULT.  If MASK is non-null, it shall be a mask to mask out
+    the sign-bit.  */
+ 
+ static void
+ ix86_sse_copysign_to_positive (rtx result, rtx abs_value, rtx sign, rtx mask)
+ {
+   machine_mode mode = GET_MODE (sign);
+   rtx sgn = gen_reg_rtx (mode);
+   if (mask == NULL_RTX)
+     {
+       machine_mode vmode;
+ 
+       if (mode == SFmode)
+ 	vmode = V4SFmode;
+       else if (mode == DFmode)
+ 	vmode = V2DFmode;
+       else
+ 	vmode = mode;
+ 
+       mask = ix86_build_signbit_mask (vmode, VECTOR_MODE_P (mode), false);
+       if (!VECTOR_MODE_P (mode))
+ 	{
+ 	  /* We need to generate a scalar mode mask in this case.  */
+ 	  rtx tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, const0_rtx));
+ 	  tmp = gen_rtx_VEC_SELECT (mode, mask, tmp);
+ 	  mask = gen_reg_rtx (mode);
+ 	  emit_insn (gen_rtx_SET (mask, tmp));
+ 	}
+     }
+   else
+     mask = gen_rtx_NOT (mode, mask);
+   emit_insn (gen_rtx_SET (sgn, gen_rtx_AND (mode, mask, sign)));
+   emit_insn (gen_rtx_SET (result, gen_rtx_IOR (mode, abs_value, sgn)));
+ }
+ 
+ /* Expand SSE sequence for computing lround from OP1 storing
+    into OP0.  */
+ 
+ void
+ ix86_expand_lround (rtx op0, rtx op1)
+ {
+   /* C code for the stuff we're doing below:
+        tmp = op1 + copysign (nextafter (0.5, 0.0), op1)
+        return (long)tmp;
+    */
+   machine_mode mode = GET_MODE (op1);
+   const struct real_format *fmt;
+   REAL_VALUE_TYPE pred_half, half_minus_pred_half;
+   rtx adj;
+ 
+   /* load nextafter (0.5, 0.0) */
+   fmt = REAL_MODE_FORMAT (mode);
+   real_2expN (&half_minus_pred_half, -(fmt->p) - 1, mode);
+   real_arithmetic (&pred_half, MINUS_EXPR, &dconsthalf, &half_minus_pred_half);
+ 
+   /* adj = copysign (0.5, op1) */
+   adj = force_reg (mode, const_double_from_real_value (pred_half, mode));
+   ix86_sse_copysign_to_positive (adj, adj, force_reg (mode, op1), NULL_RTX);
+ 
+   /* adj = op1 + adj */
+   adj = expand_simple_binop (mode, PLUS, adj, op1, NULL_RTX, 0, OPTAB_DIRECT);
+ 
+   /* op0 = (imode)adj */
+   expand_fix (op0, adj, 0);
+ }
+ 
+ /* Expand SSE2 sequence for computing lround from OPERAND1 storing
+    into OPERAND0.  */
+ 
+ void
+ ix86_expand_lfloorceil (rtx op0, rtx op1, bool do_floor)
+ {
+   /* C code for the stuff we're doing below (for do_floor):
+ 	xi = (long)op1;
+         xi -= (double)xi > op1 ? 1 : 0;
+         return xi;
+    */
+   machine_mode fmode = GET_MODE (op1);
+   machine_mode imode = GET_MODE (op0);
+   rtx ireg, freg, tmp;
+   rtx_code_label *label;
+ 
+   /* reg = (long)op1 */
+   ireg = gen_reg_rtx (imode);
+   expand_fix (ireg, op1, 0);
+ 
+   /* freg = (double)reg */
+   freg = gen_reg_rtx (fmode);
+   expand_float (freg, ireg, 0);
+ 
+   /* ireg = (freg > op1) ? ireg - 1 : ireg */
+   label = ix86_expand_sse_compare_and_jump (UNLE,
+ 					    freg, op1, !do_floor);
+   tmp = expand_simple_binop (imode, do_floor ? MINUS : PLUS,
+ 			     ireg, const1_rtx, NULL_RTX, 0, OPTAB_DIRECT);
+   emit_move_insn (ireg, tmp);
+ 
+   emit_label (label);
+   LABEL_NUSES (label) = 1;
+ 
+   emit_move_insn (op0, ireg);
+ }
+ 
+ /* Generate and return a rtx of mode MODE for 2**n where n is the number
+    of bits of the mantissa of MODE, which must be one of DFmode or SFmode.  */
+ 
+ static rtx
+ ix86_gen_TWO52 (machine_mode mode)
+ {
+   REAL_VALUE_TYPE TWO52r;
+   rtx TWO52;
+ 
+   real_ldexp (&TWO52r, &dconst1, mode == DFmode ? 52 : 23);
+   TWO52 = const_double_from_real_value (TWO52r, mode);
+   TWO52 = force_reg (mode, TWO52);
+ 
+   return TWO52;
+ }
+ 
+ /* Expand rint rounding OPERAND1 and storing the result in OPERAND0.  */
+ 
+ void
+ ix86_expand_rint (rtx operand0, rtx operand1)
+ {
+   /* C code for the stuff we're doing below:
+ 	xa = fabs (operand1);
+         if (!isless (xa, 2**52))
+ 	  return operand1;
+         two52 = 2**52;
+         if (flag_rounding_math)
+ 	  {
+ 	    two52 = copysign (two52, operand1);
+ 	    xa = operand1;
+ 	  }
+         xa = xa + two52 - two52;
+         return copysign (xa, operand1);
+    */
+   machine_mode mode = GET_MODE (operand0);
+   rtx res, xa, TWO52, two52, mask;
+   rtx_code_label *label;
+ 
+   res = gen_reg_rtx (mode);
+   emit_move_insn (res, operand1);
+ 
+   /* xa = abs (operand1) */
+   xa = ix86_expand_sse_fabs (res, &mask);
+ 
+   /* if (!isless (xa, TWO52)) goto label; */
+   TWO52 = ix86_gen_TWO52 (mode);
+   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
+ 
+   two52 = TWO52;
+   if (flag_rounding_math)
+     {
+       two52 = gen_reg_rtx (mode);
+       ix86_sse_copysign_to_positive (two52, TWO52, res, mask);
+       xa = res;
+     }
+ 
+   xa = expand_simple_binop (mode, PLUS, xa, two52, NULL_RTX, 0, OPTAB_DIRECT);
+   xa = expand_simple_binop (mode, MINUS, xa, two52, xa, 0, OPTAB_DIRECT);
+ 
+   ix86_sse_copysign_to_positive (res, xa, res, mask);
+ 
+   emit_label (label);
+   LABEL_NUSES (label) = 1;
+ 
+   emit_move_insn (operand0, res);
+ }
+ 
+ /* Expand SSE2 sequence for computing floor or ceil
+    from OPERAND1 storing into OPERAND0.  */
+ void
+ ix86_expand_floorceil (rtx operand0, rtx operand1, bool do_floor)
+ {
+   /* C code for the stuff we expand below.
+ 	double xa = fabs (x), x2;
+         if (!isless (xa, TWO52))
+           return x;
+ 	x2 = (double)(long)x;
+      Compensate.  Floor:
+ 	if (x2 > x)
+ 	  x2 -= 1;
+      Compensate.  Ceil:
+ 	if (x2 < x)
+ 	  x2 += 1;
+ 	if (HONOR_SIGNED_ZEROS (mode))
+ 	  return copysign (x2, x);
+ 	return x2;
+    */
+   machine_mode mode = GET_MODE (operand0);
+   rtx xa, xi, TWO52, tmp, one, res, mask;
+   rtx_code_label *label;
+ 
+   TWO52 = ix86_gen_TWO52 (mode);
+ 
+   /* Temporary for holding the result, initialized to the input
+      operand to ease control flow.  */
+   res = gen_reg_rtx (mode);
+   emit_move_insn (res, operand1);
+ 
+   /* xa = abs (operand1) */
+   xa = ix86_expand_sse_fabs (res, &mask);
+ 
+   /* if (!isless (xa, TWO52)) goto label; */
+   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
+ 
+   /* xa = (double)(long)x */
+   xi = gen_reg_rtx (mode == DFmode ? DImode : SImode);
+   expand_fix (xi, res, 0);
+   expand_float (xa, xi, 0);
+ 
+   /* generate 1.0 */
+   one = force_reg (mode, const_double_from_real_value (dconst1, mode));
+ 
+   /* Compensate: xa = xa - (xa > operand1 ? 1 : 0) */
+   tmp = ix86_expand_sse_compare_mask (UNGT, xa, res, !do_floor);
+   emit_insn (gen_rtx_SET (tmp, gen_rtx_AND (mode, one, tmp)));
+   tmp = expand_simple_binop (mode, do_floor ? MINUS : PLUS,
+ 			     xa, tmp, NULL_RTX, 0, OPTAB_DIRECT);
+   emit_move_insn (res, tmp);
+ 
+   if (HONOR_SIGNED_ZEROS (mode))
+     ix86_sse_copysign_to_positive (res, res, force_reg (mode, operand1), mask);
+ 
+   emit_label (label);
+   LABEL_NUSES (label) = 1;
+ 
+   emit_move_insn (operand0, res);
+ }
+ 
+ /* Expand SSE2 sequence for computing floor or ceil from OPERAND1 storing
+    into OPERAND0 without relying on DImode truncation via cvttsd2siq
+    that is only available on 64bit targets.  */
+ void
+ ix86_expand_floorceildf_32 (rtx operand0, rtx operand1, bool do_floor)
+ {
+   /* C code for the stuff we expand below.
+         double xa = fabs (x), x2;
+         if (!isless (xa, TWO52))
+           return x;
+         xa = xa + TWO52 - TWO52;
+         x2 = copysign (xa, x);
+      Compensate.  Floor:
+         if (x2 > x)
+           x2 -= 1;
+      Compensate.  Ceil:
+         if (x2 < x)
+           x2 += 1;
+ 	if (HONOR_SIGNED_ZEROS (mode))
+ 	  x2 = copysign (x2, x);
+ 	return x2;
+    */
+   machine_mode mode = GET_MODE (operand0);
+   rtx xa, TWO52, tmp, one, res, mask;
+   rtx_code_label *label;
+ 
+   TWO52 = ix86_gen_TWO52 (mode);
+ 
+   /* Temporary for holding the result, initialized to the input
+      operand to ease control flow.  */
+   res = gen_reg_rtx (mode);
+   emit_move_insn (res, operand1);
+ 
+   /* xa = abs (operand1) */
+   xa = ix86_expand_sse_fabs (res, &mask);
+ 
+   /* if (!isless (xa, TWO52)) goto label; */
+   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
+ 
+   /* xa = xa + TWO52 - TWO52; */
+   xa = expand_simple_binop (mode, PLUS, xa, TWO52, NULL_RTX, 0, OPTAB_DIRECT);
+   xa = expand_simple_binop (mode, MINUS, xa, TWO52, xa, 0, OPTAB_DIRECT);
+ 
+   /* xa = copysign (xa, operand1) */
+   ix86_sse_copysign_to_positive (xa, xa, res, mask);
+ 
+   /* generate 1.0 */
+   one = force_reg (mode, const_double_from_real_value (dconst1, mode));
+ 
+   /* Compensate: xa = xa - (xa > operand1 ? 1 : 0) */
+   tmp = ix86_expand_sse_compare_mask (UNGT, xa, res, !do_floor);
+   emit_insn (gen_rtx_SET (tmp, gen_rtx_AND (mode, one, tmp)));
+   tmp = expand_simple_binop (mode, do_floor ? MINUS : PLUS,
+ 			     xa, tmp, NULL_RTX, 0, OPTAB_DIRECT);
+   if (!do_floor && HONOR_SIGNED_ZEROS (mode))
+     ix86_sse_copysign_to_positive (tmp, tmp, res, mask);
+   emit_move_insn (res, tmp);
+ 
+   emit_label (label);
+   LABEL_NUSES (label) = 1;
+ 
+   emit_move_insn (operand0, res);
+ }
+ 
+ /* Expand SSE sequence for computing trunc
+    from OPERAND1 storing into OPERAND0.  */
+ void
+ ix86_expand_trunc (rtx operand0, rtx operand1)
+ {
+   /* C code for SSE variant we expand below.
+         double xa = fabs (x), x2;
+         if (!isless (xa, TWO52))
+           return x;
+         x2 = (double)(long)x;
+ 	if (HONOR_SIGNED_ZEROS (mode))
+ 	  return copysign (x2, x);
+ 	return x2;
+    */
+   machine_mode mode = GET_MODE (operand0);
+   rtx xa, xi, TWO52, res, mask;
+   rtx_code_label *label;
+ 
+   TWO52 = ix86_gen_TWO52 (mode);
+ 
+   /* Temporary for holding the result, initialized to the input
+      operand to ease control flow.  */
+   res = gen_reg_rtx (mode);
+   emit_move_insn (res, operand1);
+ 
+   /* xa = abs (operand1) */
+   xa = ix86_expand_sse_fabs (res, &mask);
+ 
+   /* if (!isless (xa, TWO52)) goto label; */
+   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
+ 
+   /* x = (double)(long)x */
+   xi = gen_reg_rtx (mode == DFmode ? DImode : SImode);
+   expand_fix (xi, res, 0);
+   expand_float (res, xi, 0);
+ 
+   if (HONOR_SIGNED_ZEROS (mode))
+     ix86_sse_copysign_to_positive (res, res, force_reg (mode, operand1), mask);
+ 
+   emit_label (label);
+   LABEL_NUSES (label) = 1;
+ 
+   emit_move_insn (operand0, res);
+ }
+ 
+ /* Expand SSE sequence for computing trunc from OPERAND1 storing
+    into OPERAND0 without relying on DImode truncation via cvttsd2siq
+    that is only available on 64bit targets.  */
+ void
+ ix86_expand_truncdf_32 (rtx operand0, rtx operand1)
+ {
+   machine_mode mode = GET_MODE (operand0);
+   rtx xa, mask, TWO52, one, res, smask, tmp;
+   rtx_code_label *label;
+ 
+   /* C code for SSE variant we expand below.
+         double xa = fabs (x), x2;
+         if (!isless (xa, TWO52))
+           return x;
+         xa2 = xa + TWO52 - TWO52;
+      Compensate:
+         if (xa2 > xa)
+           xa2 -= 1.0;
+         x2 = copysign (xa2, x);
+         return x2;
+    */
+ 
+   TWO52 = ix86_gen_TWO52 (mode);
+ 
+   /* Temporary for holding the result, initialized to the input
+      operand to ease control flow.  */
+   res = gen_reg_rtx (mode);
+   emit_move_insn (res, operand1);
+ 
+   /* xa = abs (operand1) */
+   xa = ix86_expand_sse_fabs (res, &smask);
+ 
+   /* if (!isless (xa, TWO52)) goto label; */
+   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
+ 
+   /* res = xa + TWO52 - TWO52; */
+   tmp = expand_simple_binop (mode, PLUS, xa, TWO52, NULL_RTX, 0, OPTAB_DIRECT);
+   tmp = expand_simple_binop (mode, MINUS, tmp, TWO52, tmp, 0, OPTAB_DIRECT);
+   emit_move_insn (res, tmp);
+ 
+   /* generate 1.0 */
+   one = force_reg (mode, const_double_from_real_value (dconst1, mode));
+ 
+   /* Compensate: res = xa2 - (res > xa ? 1 : 0)  */
+   mask = ix86_expand_sse_compare_mask (UNGT, res, xa, false);
+   emit_insn (gen_rtx_SET (mask, gen_rtx_AND (mode, mask, one)));
+   tmp = expand_simple_binop (mode, MINUS,
+ 			     res, mask, NULL_RTX, 0, OPTAB_DIRECT);
+   emit_move_insn (res, tmp);
+ 
+   /* res = copysign (res, operand1) */
+   ix86_sse_copysign_to_positive (res, res, force_reg (mode, operand1), smask);
+ 
+   emit_label (label);
+   LABEL_NUSES (label) = 1;
+ 
+   emit_move_insn (operand0, res);
+ }
+ 
+ /* Expand SSE sequence for computing round
+    from OPERAND1 storing into OPERAND0.  */
+ void
+ ix86_expand_round (rtx operand0, rtx operand1)
+ {
+   /* C code for the stuff we're doing below:
+         double xa = fabs (x);
+         if (!isless (xa, TWO52))
+           return x;
+         xa = (double)(long)(xa + nextafter (0.5, 0.0));
+         return copysign (xa, x);
+    */
+   machine_mode mode = GET_MODE (operand0);
+   rtx res, TWO52, xa, xi, half, mask;
+   rtx_code_label *label;
+   const struct real_format *fmt;
+   REAL_VALUE_TYPE pred_half, half_minus_pred_half;
+ 
+   /* Temporary for holding the result, initialized to the input
+      operand to ease control flow.  */
+   res = gen_reg_rtx (mode);
+   emit_move_insn (res, operand1);
+ 
+   TWO52 = ix86_gen_TWO52 (mode);
+   xa = ix86_expand_sse_fabs (res, &mask);
+   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
+ 
+   /* load nextafter (0.5, 0.0) */
+   fmt = REAL_MODE_FORMAT (mode);
+   real_2expN (&half_minus_pred_half, -(fmt->p) - 1, mode);
+   real_arithmetic (&pred_half, MINUS_EXPR, &dconsthalf, &half_minus_pred_half);
+ 
+   /* xa = xa + 0.5 */
+   half = force_reg (mode, const_double_from_real_value (pred_half, mode));
+   xa = expand_simple_binop (mode, PLUS, xa, half, NULL_RTX, 0, OPTAB_DIRECT);
+ 
+   /* xa = (double)(int64_t)xa */
+   xi = gen_reg_rtx (mode == DFmode ? DImode : SImode);
+   expand_fix (xi, xa, 0);
+   expand_float (xa, xi, 0);
+ 
+   /* res = copysign (xa, operand1) */
+   ix86_sse_copysign_to_positive (res, xa, force_reg (mode, operand1), mask);
+ 
+   emit_label (label);
+   LABEL_NUSES (label) = 1;
+ 
+   emit_move_insn (operand0, res);
+ }
+ 
+ /* Expand SSE sequence for computing round from OPERAND1 storing
+    into OPERAND0 without relying on DImode truncation via cvttsd2siq
+    that is only available on 64bit targets.  */
+ void
+ ix86_expand_rounddf_32 (rtx operand0, rtx operand1)
+ {
+   /* C code for the stuff we expand below.
+         double xa = fabs (x), xa2, x2;
+         if (!isless (xa, TWO52))
+           return x;
+      Using the absolute value and copying back sign makes
+      -0.0 -> -0.0 correct.
+         xa2 = xa + TWO52 - TWO52;
+      Compensate.
+ 	dxa = xa2 - xa;
+         if (dxa <= -0.5)
+           xa2 += 1;
+         else if (dxa > 0.5)
+           xa2 -= 1;
+         x2 = copysign (xa2, x);
+         return x2;
+    */
+   machine_mode mode = GET_MODE (operand0);
+   rtx xa, xa2, dxa, TWO52, tmp, half, mhalf, one, res, mask;
+   rtx_code_label *label;
+ 
+   TWO52 = ix86_gen_TWO52 (mode);
+ 
+   /* Temporary for holding the result, initialized to the input
+      operand to ease control flow.  */
+   res = gen_reg_rtx (mode);
+   emit_move_insn (res, operand1);
+ 
+   /* xa = abs (operand1) */
+   xa = ix86_expand_sse_fabs (res, &mask);
+ 
+   /* if (!isless (xa, TWO52)) goto label; */
+   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
+ 
+   /* xa2 = xa + TWO52 - TWO52; */
+   xa2 = expand_simple_binop (mode, PLUS, xa, TWO52, NULL_RTX, 0, OPTAB_DIRECT);
+   xa2 = expand_simple_binop (mode, MINUS, xa2, TWO52, xa2, 0, OPTAB_DIRECT);
+ 
+   /* dxa = xa2 - xa; */
+   dxa = expand_simple_binop (mode, MINUS, xa2, xa, NULL_RTX, 0, OPTAB_DIRECT);
+ 
+   /* generate 0.5, 1.0 and -0.5 */
+   half = force_reg (mode, const_double_from_real_value (dconsthalf, mode));
+   one = expand_simple_binop (mode, PLUS, half, half, NULL_RTX, 0, OPTAB_DIRECT);
+   mhalf = expand_simple_binop (mode, MINUS, half, one, NULL_RTX,
+ 			       0, OPTAB_DIRECT);
+ 
+   /* Compensate.  */
+   /* xa2 = xa2 - (dxa > 0.5 ? 1 : 0) */
+   tmp = ix86_expand_sse_compare_mask (UNGT, dxa, half, false);
+   emit_insn (gen_rtx_SET (tmp, gen_rtx_AND (mode, tmp, one)));
+   xa2 = expand_simple_binop (mode, MINUS, xa2, tmp, NULL_RTX, 0, OPTAB_DIRECT);
+   /* xa2 = xa2 + (dxa <= -0.5 ? 1 : 0) */
+   tmp = ix86_expand_sse_compare_mask (UNGE, mhalf, dxa, false);
+   emit_insn (gen_rtx_SET (tmp, gen_rtx_AND (mode, tmp, one)));
+   xa2 = expand_simple_binop (mode, PLUS, xa2, tmp, NULL_RTX, 0, OPTAB_DIRECT);
+ 
+   /* res = copysign (xa2, operand1) */
+   ix86_sse_copysign_to_positive (res, xa2, force_reg (mode, operand1), mask);
+ 
+   emit_label (label);
+   LABEL_NUSES (label) = 1;
+ 
+   emit_move_insn (operand0, res);
+ }
+ 
+ /* Expand SSE sequence for computing round
+    from OP1 storing into OP0 using sse4 round insn.  */
+ void
+ ix86_expand_round_sse4 (rtx op0, rtx op1)
+ {
+   machine_mode mode = GET_MODE (op0);
+   rtx e1, e2, res, half;
+   const struct real_format *fmt;
+   REAL_VALUE_TYPE pred_half, half_minus_pred_half;
+   rtx (*gen_copysign) (rtx, rtx, rtx);
+   rtx (*gen_round) (rtx, rtx, rtx);
+ 
+   switch (mode)
+     {
+     case E_SFmode:
+       gen_copysign = gen_copysignsf3;
+       gen_round = gen_sse4_1_roundsf2;
+       break;
+     case E_DFmode:
+       gen_copysign = gen_copysigndf3;
+       gen_round = gen_sse4_1_rounddf2;
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   /* round (a) = trunc (a + copysign (0.5, a)) */
+ 
+   /* load nextafter (0.5, 0.0) */
+   fmt = REAL_MODE_FORMAT (mode);
+   real_2expN (&half_minus_pred_half, -(fmt->p) - 1, mode);
+   real_arithmetic (&pred_half, MINUS_EXPR, &dconsthalf, &half_minus_pred_half);
+   half = const_double_from_real_value (pred_half, mode);
+ 
+   /* e1 = copysign (0.5, op1) */
+   e1 = gen_reg_rtx (mode);
+   emit_insn (gen_copysign (e1, half, op1));
+ 
+   /* e2 = op1 + e1 */
+   e2 = expand_simple_binop (mode, PLUS, op1, e1, NULL_RTX, 0, OPTAB_DIRECT);
+ 
+   /* res = trunc (e2) */
+   res = gen_reg_rtx (mode);
+   emit_insn (gen_round (res, e2, GEN_INT (ROUND_TRUNC)));
+ 
+   emit_move_insn (op0, res);
+ }
+ 
+ /* A cached (set (nil) (vselect (vconcat (nil) (nil)) (parallel [])))
+    insn, so that expand_vselect{,_vconcat} doesn't have to create a fresh
+    insn every time.  */
+ 
+ static GTY(()) rtx_insn *vselect_insn;
+ 
+ /* Initialize vselect_insn.  */
+ 
+ static void
+ init_vselect_insn (void)
+ {
+   unsigned i;
+   rtx x;
+ 
+   x = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (MAX_VECT_LEN));
+   for (i = 0; i < MAX_VECT_LEN; ++i)
+     XVECEXP (x, 0, i) = const0_rtx;
+   x = gen_rtx_VEC_SELECT (V2DFmode, gen_rtx_VEC_CONCAT (V4DFmode, const0_rtx,
+ 							const0_rtx), x);
+   x = gen_rtx_SET (const0_rtx, x);
+   start_sequence ();
+   vselect_insn = emit_insn (x);
+   end_sequence ();
+ }
+ 
+ /* Construct (set target (vec_select op0 (parallel perm))) and
+    return true if that's a valid instruction in the active ISA.  */
+ 
+ static bool
+ expand_vselect (rtx target, rtx op0, const unsigned char *perm,
+ 		unsigned nelt, bool testing_p)
+ {
+   unsigned int i;
+   rtx x, save_vconcat;
+   int icode;
+ 
+   if (vselect_insn == NULL_RTX)
+     init_vselect_insn ();
+ 
+   x = XEXP (SET_SRC (PATTERN (vselect_insn)), 1);
+   PUT_NUM_ELEM (XVEC (x, 0), nelt);
+   for (i = 0; i < nelt; ++i)
+     XVECEXP (x, 0, i) = GEN_INT (perm[i]);
+   save_vconcat = XEXP (SET_SRC (PATTERN (vselect_insn)), 0);
+   XEXP (SET_SRC (PATTERN (vselect_insn)), 0) = op0;
+   PUT_MODE (SET_SRC (PATTERN (vselect_insn)), GET_MODE (target));
+   SET_DEST (PATTERN (vselect_insn)) = target;
+   icode = recog_memoized (vselect_insn);
+ 
+   if (icode >= 0 && !testing_p)
+     emit_insn (copy_rtx (PATTERN (vselect_insn)));
+ 
+   SET_DEST (PATTERN (vselect_insn)) = const0_rtx;
+   XEXP (SET_SRC (PATTERN (vselect_insn)), 0) = save_vconcat;
+   INSN_CODE (vselect_insn) = -1;
+ 
+   return icode >= 0;
+ }
+ 
+ /* Similar, but generate a vec_concat from op0 and op1 as well.  */
+ 
+ static bool
+ expand_vselect_vconcat (rtx target, rtx op0, rtx op1,
+ 			const unsigned char *perm, unsigned nelt,
+ 			bool testing_p)
+ {
+   machine_mode v2mode;
+   rtx x;
+   bool ok;
+ 
+   if (vselect_insn == NULL_RTX)
+     init_vselect_insn ();
+ 
+   if (!GET_MODE_2XWIDER_MODE (GET_MODE (op0)).exists (&v2mode))
+     return false;
+   x = XEXP (SET_SRC (PATTERN (vselect_insn)), 0);
+   PUT_MODE (x, v2mode);
+   XEXP (x, 0) = op0;
+   XEXP (x, 1) = op1;
+   ok = expand_vselect (target, x, perm, nelt, testing_p);
+   XEXP (x, 0) = const0_rtx;
+   XEXP (x, 1) = const0_rtx;
+   return ok;
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to implement D
+    using movss or movsd.  */
+ static bool
+ expand_vec_perm_movs (struct expand_vec_perm_d *d)
+ {
+   machine_mode vmode = d->vmode;
+   unsigned i, nelt = d->nelt;
+   rtx x;
+ 
+   if (d->one_operand_p)
+     return false;
+ 
+   if (!(TARGET_SSE && vmode == V4SFmode)
+       && !(TARGET_SSE2 && vmode == V2DFmode))
+     return false;
+ 
+   /* Only the first element is changed.  */
+   if (d->perm[0] != nelt && d->perm[0] != 0)
+     return false;
+   for (i = 1; i < nelt; ++i)
+     if (d->perm[i] != i + nelt - d->perm[0])
+       return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+   if (d->perm[0] == nelt)
+     x = gen_rtx_VEC_MERGE (vmode, d->op1, d->op0, GEN_INT (1));
+   else
+     x = gen_rtx_VEC_MERGE (vmode, d->op0, d->op1, GEN_INT (1));
+ 
+   emit_insn (gen_rtx_SET (d->target, x));
+ 
+   return true;
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to implement D
+    in terms of blendp[sd] / pblendw / pblendvb / vpblendd.  */
+ 
+ static bool
+ expand_vec_perm_blend (struct expand_vec_perm_d *d)
+ {
+   machine_mode mmode, vmode = d->vmode;
+   unsigned i, nelt = d->nelt;
+   unsigned HOST_WIDE_INT mask;
+   rtx target, op0, op1, maskop, x;
+   rtx rperm[32], vperm;
+ 
+   if (d->one_operand_p)
+     return false;
+   if (TARGET_AVX512F && GET_MODE_SIZE (vmode) == 64
+       && (TARGET_AVX512BW
+ 	  || GET_MODE_UNIT_SIZE (vmode) >= 4))
+     ;
+   else if (TARGET_AVX2 && GET_MODE_SIZE (vmode) == 32)
+     ;
+   else if (TARGET_AVX && (vmode == V4DFmode || vmode == V8SFmode))
+     ;
+   else if (TARGET_SSE4_1 && GET_MODE_SIZE (vmode) == 16)
+     ;
+   else
+     return false;
+ 
+   /* This is a blend, not a permute.  Elements must stay in their
+      respective lanes.  */
+   for (i = 0; i < nelt; ++i)
+     {
+       unsigned e = d->perm[i];
+       if (!(e == i || e == i + nelt))
+ 	return false;
+     }
+ 
+   if (d->testing_p)
+     return true;
+ 
+   /* ??? Without SSE4.1, we could implement this with and/andn/or.  This
+      decision should be extracted elsewhere, so that we only try that
+      sequence once all budget==3 options have been tried.  */
+   target = d->target;
+   op0 = d->op0;
+   op1 = d->op1;
+   mask = 0;
+ 
+   switch (vmode)
+     {
+     case E_V8DFmode:
+     case E_V16SFmode:
+     case E_V4DFmode:
+     case E_V8SFmode:
+     case E_V2DFmode:
+     case E_V4SFmode:
+     case E_V8HImode:
+     case E_V8SImode:
+     case E_V32HImode:
+     case E_V64QImode:
+     case E_V16SImode:
+     case E_V8DImode:
+       for (i = 0; i < nelt; ++i)
+ 	mask |= ((unsigned HOST_WIDE_INT) (d->perm[i] >= nelt)) << i;
+       break;
+ 
+     case E_V2DImode:
+       for (i = 0; i < 2; ++i)
+ 	mask |= (d->perm[i] >= 2 ? 15 : 0) << (i * 4);
+       vmode = V8HImode;
+       goto do_subreg;
+ 
+     case E_V4SImode:
+       for (i = 0; i < 4; ++i)
+ 	mask |= (d->perm[i] >= 4 ? 3 : 0) << (i * 2);
+       vmode = V8HImode;
+       goto do_subreg;
+ 
+     case E_V16QImode:
+       /* See if bytes move in pairs so we can use pblendw with
+ 	 an immediate argument, rather than pblendvb with a vector
+ 	 argument.  */
+       for (i = 0; i < 16; i += 2)
+ 	if (d->perm[i] + 1 != d->perm[i + 1])
+ 	  {
+ 	  use_pblendvb:
+ 	    for (i = 0; i < nelt; ++i)
+ 	      rperm[i] = (d->perm[i] < nelt ? const0_rtx : constm1_rtx);
+ 
+ 	  finish_pblendvb:
+ 	    vperm = gen_rtx_CONST_VECTOR (vmode, gen_rtvec_v (nelt, rperm));
+ 	    vperm = force_reg (vmode, vperm);
+ 
+ 	    if (GET_MODE_SIZE (vmode) == 16)
+ 	      emit_insn (gen_sse4_1_pblendvb (target, op0, op1, vperm));
+ 	    else
+ 	      emit_insn (gen_avx2_pblendvb (target, op0, op1, vperm));
+ 	    if (target != d->target)
+ 	      emit_move_insn (d->target, gen_lowpart (d->vmode, target));
+ 	    return true;
+ 	  }
+ 
+       for (i = 0; i < 8; ++i)
+ 	mask |= (d->perm[i * 2] >= 16) << i;
+       vmode = V8HImode;
+       /* FALLTHRU */
+ 
+     do_subreg:
+       target = gen_reg_rtx (vmode);
+       op0 = gen_lowpart (vmode, op0);
+       op1 = gen_lowpart (vmode, op1);
+       break;
+ 
+     case E_V32QImode:
+       /* See if bytes move in pairs.  If not, vpblendvb must be used.  */
+       for (i = 0; i < 32; i += 2)
+ 	if (d->perm[i] + 1 != d->perm[i + 1])
+ 	  goto use_pblendvb;
+       /* See if bytes move in quadruplets.  If yes, vpblendd
+ 	 with immediate can be used.  */
+       for (i = 0; i < 32; i += 4)
+ 	if (d->perm[i] + 2 != d->perm[i + 2])
+ 	  break;
+       if (i < 32)
+ 	{
+ 	  /* See if bytes move the same in both lanes.  If yes,
+ 	     vpblendw with immediate can be used.  */
+ 	  for (i = 0; i < 16; i += 2)
+ 	    if (d->perm[i] + 16 != d->perm[i + 16])
+ 	      goto use_pblendvb;
+ 
+ 	  /* Use vpblendw.  */
+ 	  for (i = 0; i < 16; ++i)
+ 	    mask |= (d->perm[i * 2] >= 32) << i;
+ 	  vmode = V16HImode;
+ 	  goto do_subreg;
+ 	}
+ 
+       /* Use vpblendd.  */
+       for (i = 0; i < 8; ++i)
+ 	mask |= (d->perm[i * 4] >= 32) << i;
+       vmode = V8SImode;
+       goto do_subreg;
+ 
+     case E_V16HImode:
+       /* See if words move in pairs.  If yes, vpblendd can be used.  */
+       for (i = 0; i < 16; i += 2)
+ 	if (d->perm[i] + 1 != d->perm[i + 1])
+ 	  break;
+       if (i < 16)
+ 	{
+ 	  /* See if words move the same in both lanes.  If not,
+ 	     vpblendvb must be used.  */
+ 	  for (i = 0; i < 8; i++)
+ 	    if (d->perm[i] + 8 != d->perm[i + 8])
+ 	      {
+ 		/* Use vpblendvb.  */
+ 		for (i = 0; i < 32; ++i)
+ 		  rperm[i] = (d->perm[i / 2] < 16 ? const0_rtx : constm1_rtx);
+ 
+ 		vmode = V32QImode;
+ 		nelt = 32;
+ 		target = gen_reg_rtx (vmode);
+ 		op0 = gen_lowpart (vmode, op0);
+ 		op1 = gen_lowpart (vmode, op1);
+ 		goto finish_pblendvb;
+ 	      }
+ 
+ 	  /* Use vpblendw.  */
+ 	  for (i = 0; i < 16; ++i)
+ 	    mask |= (d->perm[i] >= 16) << i;
+ 	  break;
+ 	}
+ 
+       /* Use vpblendd.  */
+       for (i = 0; i < 8; ++i)
+ 	mask |= (d->perm[i * 2] >= 16) << i;
+       vmode = V8SImode;
+       goto do_subreg;
+ 
+     case E_V4DImode:
+       /* Use vpblendd.  */
+       for (i = 0; i < 4; ++i)
+ 	mask |= (d->perm[i] >= 4 ? 3 : 0) << (i * 2);
+       vmode = V8SImode;
+       goto do_subreg;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   switch (vmode)
+     {
+     case E_V8DFmode:
+     case E_V8DImode:
+       mmode = QImode;
+       break;
+     case E_V16SFmode:
+     case E_V16SImode:
+       mmode = HImode;
+       break;
+     case E_V32HImode:
+       mmode = SImode;
+       break;
+     case E_V64QImode:
+       mmode = DImode;
+       break;
+     default:
+       mmode = VOIDmode;
+     }
+ 
+   if (mmode != VOIDmode)
+     maskop = force_reg (mmode, gen_int_mode (mask, mmode));
+   else
+     maskop = GEN_INT (mask);
+ 
+   /* This matches five different patterns with the different modes.  */
+   x = gen_rtx_VEC_MERGE (vmode, op1, op0, maskop);
+   x = gen_rtx_SET (target, x);
+   emit_insn (x);
+   if (target != d->target)
+     emit_move_insn (d->target, gen_lowpart (d->vmode, target));
+ 
+   return true;
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to implement D
+    in terms of the variable form of vpermilps.
+ 
+    Note that we will have already failed the immediate input vpermilps,
+    which requires that the high and low part shuffle be identical; the
+    variable form doesn't require that.  */
+ 
+ static bool
+ expand_vec_perm_vpermil (struct expand_vec_perm_d *d)
+ {
+   rtx rperm[8], vperm;
+   unsigned i;
+ 
+   if (!TARGET_AVX || d->vmode != V8SFmode || !d->one_operand_p)
+     return false;
+ 
+   /* We can only permute within the 128-bit lane.  */
+   for (i = 0; i < 8; ++i)
+     {
+       unsigned e = d->perm[i];
+       if (i < 4 ? e >= 4 : e < 4)
+ 	return false;
+     }
+ 
+   if (d->testing_p)
+     return true;
+ 
+   for (i = 0; i < 8; ++i)
+     {
+       unsigned e = d->perm[i];
+ 
+       /* Within each 128-bit lane, the elements of op0 are numbered
+ 	 from 0 and the elements of op1 are numbered from 4.  */
+       if (e >= 8 + 4)
+ 	e -= 8;
+       else if (e >= 4)
+ 	e -= 4;
+ 
+       rperm[i] = GEN_INT (e);
+     }
+ 
+   vperm = gen_rtx_CONST_VECTOR (V8SImode, gen_rtvec_v (8, rperm));
+   vperm = force_reg (V8SImode, vperm);
+   emit_insn (gen_avx_vpermilvarv8sf3 (d->target, d->op0, vperm));
+ 
+   return true;
+ }
+ 
+ /* Return true if permutation D can be performed as VMODE permutation
+    instead.  */
+ 
+ static bool
+ valid_perm_using_mode_p (machine_mode vmode, struct expand_vec_perm_d *d)
+ {
+   unsigned int i, j, chunk;
+ 
+   if (GET_MODE_CLASS (vmode) != MODE_VECTOR_INT
+       || GET_MODE_CLASS (d->vmode) != MODE_VECTOR_INT
+       || GET_MODE_SIZE (vmode) != GET_MODE_SIZE (d->vmode))
+     return false;
+ 
+   if (GET_MODE_NUNITS (vmode) >= d->nelt)
+     return true;
+ 
+   chunk = d->nelt / GET_MODE_NUNITS (vmode);
+   for (i = 0; i < d->nelt; i += chunk)
+     if (d->perm[i] & (chunk - 1))
+       return false;
+     else
+       for (j = 1; j < chunk; ++j)
+ 	if (d->perm[i] + j != d->perm[i + j])
+ 	  return false;
+ 
+   return true;
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to implement D
+    in terms of pshufb, vpperm, vpermq, vpermd, vpermps or vperm2i128.  */
+ 
+ static bool
+ expand_vec_perm_pshufb (struct expand_vec_perm_d *d)
+ {
+   unsigned i, nelt, eltsz, mask;
+   unsigned char perm[64];
+   machine_mode vmode = V16QImode;
+   rtx rperm[64], vperm, target, op0, op1;
+ 
+   nelt = d->nelt;
+ 
+   if (!d->one_operand_p)
+     {
+       if (!TARGET_XOP || GET_MODE_SIZE (d->vmode) != 16)
+ 	{
+ 	  if (TARGET_AVX2
+ 	      && valid_perm_using_mode_p (V2TImode, d))
+ 	    {
+ 	      if (d->testing_p)
+ 		return true;
+ 
+ 	      /* Use vperm2i128 insn.  The pattern uses
+ 		 V4DImode instead of V2TImode.  */
+ 	      target = d->target;
+ 	      if (d->vmode != V4DImode)
+ 		target = gen_reg_rtx (V4DImode);
+ 	      op0 = gen_lowpart (V4DImode, d->op0);
+ 	      op1 = gen_lowpart (V4DImode, d->op1);
+ 	      rperm[0]
+ 		= GEN_INT ((d->perm[0] / (nelt / 2))
+ 			   | ((d->perm[nelt / 2] / (nelt / 2)) * 16));
+ 	      emit_insn (gen_avx2_permv2ti (target, op0, op1, rperm[0]));
+ 	      if (target != d->target)
+ 		emit_move_insn (d->target, gen_lowpart (d->vmode, target));
+ 	      return true;
+ 	    }
+ 	  return false;
+ 	}
+     }
+   else
+     {
+       if (GET_MODE_SIZE (d->vmode) == 16)
+ 	{
+ 	  if (!TARGET_SSSE3)
+ 	    return false;
+ 	}
+       else if (GET_MODE_SIZE (d->vmode) == 32)
+ 	{
+ 	  if (!TARGET_AVX2)
+ 	    return false;
+ 
+ 	  /* V4DImode should be already handled through
+ 	     expand_vselect by vpermq instruction.  */
+ 	  gcc_assert (d->vmode != V4DImode);
+ 
+ 	  vmode = V32QImode;
+ 	  if (d->vmode == V8SImode
+ 	      || d->vmode == V16HImode
+ 	      || d->vmode == V32QImode)
+ 	    {
+ 	      /* First see if vpermq can be used for
+ 		 V8SImode/V16HImode/V32QImode.  */
+ 	      if (valid_perm_using_mode_p (V4DImode, d))
+ 		{
+ 		  for (i = 0; i < 4; i++)
+ 		    perm[i] = (d->perm[i * nelt / 4] * 4 / nelt) & 3;
+ 		  if (d->testing_p)
+ 		    return true;
+ 		  target = gen_reg_rtx (V4DImode);
+ 		  if (expand_vselect (target, gen_lowpart (V4DImode, d->op0),
+ 				      perm, 4, false))
+ 		    {
+ 		      emit_move_insn (d->target,
+ 				      gen_lowpart (d->vmode, target));
+ 		      return true;
+ 		    }
+ 		  return false;
+ 		}
+ 
+ 	      /* Next see if vpermd can be used.  */
+ 	      if (valid_perm_using_mode_p (V8SImode, d))
+ 		vmode = V8SImode;
+ 	    }
+ 	  /* Or if vpermps can be used.  */
+ 	  else if (d->vmode == V8SFmode)
+ 	    vmode = V8SImode;
+ 
+ 	  if (vmode == V32QImode)
+ 	    {
+ 	      /* vpshufb only works intra lanes, it is not
+ 		 possible to shuffle bytes in between the lanes.  */
+ 	      for (i = 0; i < nelt; ++i)
+ 		if ((d->perm[i] ^ i) & (nelt / 2))
+ 		  return false;
+ 	    }
+ 	}
+       else if (GET_MODE_SIZE (d->vmode) == 64)
+ 	{
+ 	  if (!TARGET_AVX512BW)
+ 	    return false;
+ 
+ 	  /* If vpermq didn't work, vpshufb won't work either.  */
+ 	  if (d->vmode == V8DFmode || d->vmode == V8DImode)
+ 	    return false;
+ 
+ 	  vmode = V64QImode;
+ 	  if (d->vmode == V16SImode
+ 	      || d->vmode == V32HImode
+ 	      || d->vmode == V64QImode)
+ 	    {
+ 	      /* First see if vpermq can be used for
+ 		 V16SImode/V32HImode/V64QImode.  */
+ 	      if (valid_perm_using_mode_p (V8DImode, d))
+ 		{
+ 		  for (i = 0; i < 8; i++)
+ 		    perm[i] = (d->perm[i * nelt / 8] * 8 / nelt) & 7;
+ 		  if (d->testing_p)
+ 		    return true;
+ 		  target = gen_reg_rtx (V8DImode);
+ 		  if (expand_vselect (target, gen_lowpart (V8DImode, d->op0),
+ 				      perm, 8, false))
+ 		    {
+ 		      emit_move_insn (d->target,
+ 				      gen_lowpart (d->vmode, target));
+ 		      return true;
+ 		    }
+ 		  return false;
+ 		}
+ 
+ 	      /* Next see if vpermd can be used.  */
+ 	      if (valid_perm_using_mode_p (V16SImode, d))
+ 		vmode = V16SImode;
+ 	    }
+ 	  /* Or if vpermps can be used.  */
+ 	  else if (d->vmode == V16SFmode)
+ 	    vmode = V16SImode;
+ 	  if (vmode == V64QImode)
+ 	    {
+ 	      /* vpshufb only works intra lanes, it is not
+ 		 possible to shuffle bytes in between the lanes.  */
+ 	      for (i = 0; i < nelt; ++i)
+ 		if ((d->perm[i] ^ i) & (3 * nelt / 4))
+ 		  return false;
+ 	    }
+ 	}
+       else
+ 	return false;
+     }
+ 
+   if (d->testing_p)
+     return true;
+ 
+   if (vmode == V8SImode)
+     for (i = 0; i < 8; ++i)
+       rperm[i] = GEN_INT ((d->perm[i * nelt / 8] * 8 / nelt) & 7);
+   else if (vmode == V16SImode)
+     for (i = 0; i < 16; ++i)
+       rperm[i] = GEN_INT ((d->perm[i * nelt / 16] * 16 / nelt) & 15);
+   else
+     {
+       eltsz = GET_MODE_UNIT_SIZE (d->vmode);
+       if (!d->one_operand_p)
+ 	mask = 2 * nelt - 1;
+       else if (vmode == V16QImode)
+ 	mask = nelt - 1;
+       else if (vmode == V64QImode)
+ 	mask = nelt / 4 - 1;
+       else
+ 	mask = nelt / 2 - 1;
+ 
+       for (i = 0; i < nelt; ++i)
+ 	{
+ 	  unsigned j, e = d->perm[i] & mask;
+ 	  for (j = 0; j < eltsz; ++j)
+ 	    rperm[i * eltsz + j] = GEN_INT (e * eltsz + j);
+ 	}
+     }
+ 
+   vperm = gen_rtx_CONST_VECTOR (vmode,
+ 				gen_rtvec_v (GET_MODE_NUNITS (vmode), rperm));
+   vperm = force_reg (vmode, vperm);
+ 
+   target = d->target;
+   if (d->vmode != vmode)
+     target = gen_reg_rtx (vmode);
+   op0 = gen_lowpart (vmode, d->op0);
+   if (d->one_operand_p)
+     {
+       if (vmode == V16QImode)
+ 	emit_insn (gen_ssse3_pshufbv16qi3 (target, op0, vperm));
+       else if (vmode == V32QImode)
+ 	emit_insn (gen_avx2_pshufbv32qi3 (target, op0, vperm));
+       else if (vmode == V64QImode)
+ 	emit_insn (gen_avx512bw_pshufbv64qi3 (target, op0, vperm));
+       else if (vmode == V8SFmode)
+ 	emit_insn (gen_avx2_permvarv8sf (target, op0, vperm));
+       else if (vmode == V8SImode)
+ 	emit_insn (gen_avx2_permvarv8si (target, op0, vperm));
+       else if (vmode == V16SFmode)
+ 	emit_insn (gen_avx512f_permvarv16sf (target, op0, vperm));
+       else if (vmode == V16SImode)
+ 	emit_insn (gen_avx512f_permvarv16si (target, op0, vperm));
+       else
+ 	gcc_unreachable ();
+     }
+   else
+     {
+       op1 = gen_lowpart (vmode, d->op1);
+       emit_insn (gen_xop_pperm (target, op0, op1, vperm));
+     }
+   if (target != d->target)
+     emit_move_insn (d->target, gen_lowpart (d->vmode, target));
+ 
+   return true;
+ }
+ 
+ /* For V*[QHS]Imode permutations, check if the same permutation
+    can't be performed in a 2x, 4x or 8x wider inner mode.  */
+ 
+ static bool
+ canonicalize_vector_int_perm (const struct expand_vec_perm_d *d,
+ 			      struct expand_vec_perm_d *nd)
+ {
+   int i;
+   machine_mode mode = VOIDmode;
+ 
+   switch (d->vmode)
+     {
+     case E_V16QImode: mode = V8HImode; break;
+     case E_V32QImode: mode = V16HImode; break;
+     case E_V64QImode: mode = V32HImode; break;
+     case E_V8HImode: mode = V4SImode; break;
+     case E_V16HImode: mode = V8SImode; break;
+     case E_V32HImode: mode = V16SImode; break;
+     case E_V4SImode: mode = V2DImode; break;
+     case E_V8SImode: mode = V4DImode; break;
+     case E_V16SImode: mode = V8DImode; break;
+     default: return false;
+     }
+   for (i = 0; i < d->nelt; i += 2)
+     if ((d->perm[i] & 1) || d->perm[i + 1] != d->perm[i] + 1)
+       return false;
+   nd->vmode = mode;
+   nd->nelt = d->nelt / 2;
+   for (i = 0; i < nd->nelt; i++)
+     nd->perm[i] = d->perm[2 * i] / 2;
+   if (GET_MODE_INNER (mode) != DImode)
+     canonicalize_vector_int_perm (nd, nd);
+   if (nd != d)
+     {
+       nd->one_operand_p = d->one_operand_p;
+       nd->testing_p = d->testing_p;
+       if (d->op0 == d->op1)
+ 	nd->op0 = nd->op1 = gen_lowpart (nd->vmode, d->op0);
+       else
+ 	{
+ 	  nd->op0 = gen_lowpart (nd->vmode, d->op0);
+ 	  nd->op1 = gen_lowpart (nd->vmode, d->op1);
+ 	}
+       if (d->testing_p)
+ 	nd->target = gen_raw_REG (nd->vmode, LAST_VIRTUAL_REGISTER + 1);
+       else
+ 	nd->target = gen_reg_rtx (nd->vmode);
+     }
+   return true;
+ }
+ 
+ /* Try to expand one-operand permutation with constant mask.  */
+ 
+ static bool
+ ix86_expand_vec_one_operand_perm_avx512 (struct expand_vec_perm_d *d)
+ {
+   machine_mode mode = GET_MODE (d->op0);
+   machine_mode maskmode = mode;
+   rtx (*gen) (rtx, rtx, rtx) = NULL;
+   rtx target, op0, mask;
+   rtx vec[64];
+ 
+   if (!rtx_equal_p (d->op0, d->op1))
+     return false;
+ 
+   if (!TARGET_AVX512F)
+     return false;
+ 
+   switch (mode)
+     {
+     case E_V16SImode:
+       gen = gen_avx512f_permvarv16si;
+       break;
+     case E_V16SFmode:
+       gen = gen_avx512f_permvarv16sf;
+       maskmode = V16SImode;
+       break;
+     case E_V8DImode:
+       gen = gen_avx512f_permvarv8di;
+       break;
+     case E_V8DFmode:
+       gen = gen_avx512f_permvarv8df;
+       maskmode = V8DImode;
+       break;
+     default:
+       return false;
+     }
+ 
+   target = d->target;
+   op0 = d->op0;
+   for (int i = 0; i < d->nelt; ++i)
+     vec[i] = GEN_INT (d->perm[i]);
+   mask = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (d->nelt, vec));
+   emit_insn (gen (target, op0, force_reg (maskmode, mask)));
+   return true;
+ }
+ 
+ static bool expand_vec_perm_palignr (struct expand_vec_perm_d *d, bool);
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to instantiate D
+    in a single instruction.  */
+ 
+ static bool
+ expand_vec_perm_1 (struct expand_vec_perm_d *d)
+ {
+   unsigned i, nelt = d->nelt;
+   struct expand_vec_perm_d nd;
+ 
+   /* Check plain VEC_SELECT first, because AVX has instructions that could
+      match both SEL and SEL+CONCAT, but the plain SEL will allow a memory
+      input where SEL+CONCAT may not.  */
+   if (d->one_operand_p)
+     {
+       int mask = nelt - 1;
+       bool identity_perm = true;
+       bool broadcast_perm = true;
+ 
+       for (i = 0; i < nelt; i++)
+ 	{
+ 	  nd.perm[i] = d->perm[i] & mask;
+ 	  if (nd.perm[i] != i)
+ 	    identity_perm = false;
+ 	  if (nd.perm[i])
+ 	    broadcast_perm = false;
+ 	}
+ 
+       if (identity_perm)
+ 	{
+ 	  if (!d->testing_p)
+ 	    emit_move_insn (d->target, d->op0);
+ 	  return true;
+ 	}
+       else if (broadcast_perm && TARGET_AVX2)
+ 	{
+ 	  /* Use vpbroadcast{b,w,d}.  */
+ 	  rtx (*gen) (rtx, rtx) = NULL;
+ 	  switch (d->vmode)
+ 	    {
+ 	    case E_V64QImode:
+ 	      if (TARGET_AVX512BW)
+ 		gen = gen_avx512bw_vec_dupv64qi_1;
+ 	      break;
+ 	    case E_V32QImode:
+ 	      gen = gen_avx2_pbroadcastv32qi_1;
+ 	      break;
+ 	    case E_V32HImode:
+ 	      if (TARGET_AVX512BW)
+ 		gen = gen_avx512bw_vec_dupv32hi_1;
+ 	      break;
+ 	    case E_V16HImode:
+ 	      gen = gen_avx2_pbroadcastv16hi_1;
+ 	      break;
+ 	    case E_V16SImode:
+ 	      if (TARGET_AVX512F)
+ 		gen = gen_avx512f_vec_dupv16si_1;
+ 	      break;
+ 	    case E_V8SImode:
+ 	      gen = gen_avx2_pbroadcastv8si_1;
+ 	      break;
+ 	    case E_V16QImode:
+ 	      gen = gen_avx2_pbroadcastv16qi;
+ 	      break;
+ 	    case E_V8HImode:
+ 	      gen = gen_avx2_pbroadcastv8hi;
+ 	      break;
+ 	    case E_V16SFmode:
+ 	      if (TARGET_AVX512F)
+ 		gen = gen_avx512f_vec_dupv16sf_1;
+ 	      break;
+ 	    case E_V8SFmode:
+ 	      gen = gen_avx2_vec_dupv8sf_1;
+ 	      break;
+ 	    case E_V8DFmode:
+ 	      if (TARGET_AVX512F)
+ 		gen = gen_avx512f_vec_dupv8df_1;
+ 	      break;
+ 	    case E_V8DImode:
+ 	      if (TARGET_AVX512F)
+ 		gen = gen_avx512f_vec_dupv8di_1;
+ 	      break;
+ 	    /* For other modes prefer other shuffles this function creates.  */
+ 	    default: break;
+ 	    }
+ 	  if (gen != NULL)
+ 	    {
+ 	      if (!d->testing_p)
+ 		emit_insn (gen (d->target, d->op0));
+ 	      return true;
+ 	    }
+ 	}
+ 
+       if (expand_vselect (d->target, d->op0, nd.perm, nelt, d->testing_p))
+ 	return true;
+ 
+       /* There are plenty of patterns in sse.md that are written for
+ 	 SEL+CONCAT and are not replicated for a single op.  Perhaps
+ 	 that should be changed, to avoid the nastiness here.  */
+ 
+       /* Recognize interleave style patterns, which means incrementing
+ 	 every other permutation operand.  */
+       for (i = 0; i < nelt; i += 2)
+ 	{
+ 	  nd.perm[i] = d->perm[i] & mask;
+ 	  nd.perm[i + 1] = (d->perm[i + 1] & mask) + nelt;
+ 	}
+       if (expand_vselect_vconcat (d->target, d->op0, d->op0, nd.perm, nelt,
+ 				  d->testing_p))
+ 	return true;
+ 
+       /* Recognize shufps, which means adding {0, 0, nelt, nelt}.  */
+       if (nelt >= 4)
+ 	{
+ 	  for (i = 0; i < nelt; i += 4)
+ 	    {
+ 	      nd.perm[i + 0] = d->perm[i + 0] & mask;
+ 	      nd.perm[i + 1] = d->perm[i + 1] & mask;
+ 	      nd.perm[i + 2] = (d->perm[i + 2] & mask) + nelt;
+ 	      nd.perm[i + 3] = (d->perm[i + 3] & mask) + nelt;
+ 	    }
+ 
+ 	  if (expand_vselect_vconcat (d->target, d->op0, d->op0, nd.perm, nelt,
+ 				      d->testing_p))
+ 	    return true;
+ 	}
+     }
+ 
+   /* Try movss/movsd instructions.  */
+   if (expand_vec_perm_movs (d))
+     return true;
+ 
+   /* Finally, try the fully general two operand permute.  */
+   if (expand_vselect_vconcat (d->target, d->op0, d->op1, d->perm, nelt,
+ 			      d->testing_p))
+     return true;
+ 
+   /* Recognize interleave style patterns with reversed operands.  */
+   if (!d->one_operand_p)
+     {
+       for (i = 0; i < nelt; ++i)
+ 	{
+ 	  unsigned e = d->perm[i];
+ 	  if (e >= nelt)
+ 	    e -= nelt;
+ 	  else
+ 	    e += nelt;
+ 	  nd.perm[i] = e;
+ 	}
+ 
+       if (expand_vselect_vconcat (d->target, d->op1, d->op0, nd.perm, nelt,
+ 				  d->testing_p))
+ 	return true;
+     }
+ 
+   /* Try the SSE4.1 blend variable merge instructions.  */
+   if (expand_vec_perm_blend (d))
+     return true;
+ 
+   /* Try one of the AVX vpermil variable permutations.  */
+   if (expand_vec_perm_vpermil (d))
+     return true;
+ 
+   /* Try the SSSE3 pshufb or XOP vpperm or AVX2 vperm2i128,
+      vpshufb, vpermd, vpermps or vpermq variable permutation.  */
+   if (expand_vec_perm_pshufb (d))
+     return true;
+ 
+   /* Try the AVX2 vpalignr instruction.  */
+   if (expand_vec_perm_palignr (d, true))
+     return true;
+ 
+   /* Try the AVX512F vperm{s,d} instructions.  */
+   if (ix86_expand_vec_one_operand_perm_avx512 (d))
+     return true;
+ 
+   /* Try the AVX512F vpermt2/vpermi2 instructions.  */
+   if (ix86_expand_vec_perm_vpermt2 (NULL_RTX, NULL_RTX, NULL_RTX, NULL_RTX, d))
+     return true;
+ 
+   /* See if we can get the same permutation in different vector integer
+      mode.  */
+   if (canonicalize_vector_int_perm (d, &nd) && expand_vec_perm_1 (&nd))
+     {
+       if (!d->testing_p)
+ 	emit_move_insn (d->target, gen_lowpart (d->vmode, nd.target));
+       return true;
+     }
+   return false;
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to implement D
+    in terms of a pair of pshuflw + pshufhw instructions.  */
+ 
+ static bool
+ expand_vec_perm_pshuflw_pshufhw (struct expand_vec_perm_d *d)
+ {
+   unsigned char perm2[MAX_VECT_LEN];
+   unsigned i;
+   bool ok;
+ 
+   if (d->vmode != V8HImode || !d->one_operand_p)
+     return false;
+ 
+   /* The two permutations only operate in 64-bit lanes.  */
+   for (i = 0; i < 4; ++i)
+     if (d->perm[i] >= 4)
+       return false;
+   for (i = 4; i < 8; ++i)
+     if (d->perm[i] < 4)
+       return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+   /* Emit the pshuflw.  */
+   memcpy (perm2, d->perm, 4);
+   for (i = 4; i < 8; ++i)
+     perm2[i] = i;
+   ok = expand_vselect (d->target, d->op0, perm2, 8, d->testing_p);
+   gcc_assert (ok);
+ 
+   /* Emit the pshufhw.  */
+   memcpy (perm2 + 4, d->perm + 4, 4);
+   for (i = 0; i < 4; ++i)
+     perm2[i] = i;
+   ok = expand_vselect (d->target, d->target, perm2, 8, d->testing_p);
+   gcc_assert (ok);
+ 
+   return true;
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to simplify
+    the permutation using the SSSE3 palignr instruction.  This succeeds
+    when all of the elements in PERM fit within one vector and we merely
+    need to shift them down so that a single vector permutation has a
+    chance to succeed.  If SINGLE_INSN_ONLY_P, succeed if only
+    the vpalignr instruction itself can perform the requested permutation.  */
+ 
+ static bool
+ expand_vec_perm_palignr (struct expand_vec_perm_d *d, bool single_insn_only_p)
+ {
+   unsigned i, nelt = d->nelt;
+   unsigned min, max, minswap, maxswap;
+   bool in_order, ok, swap = false;
+   rtx shift, target;
+   struct expand_vec_perm_d dcopy;
+ 
+   /* Even with AVX, palignr only operates on 128-bit vectors,
+      in AVX2 palignr operates on both 128-bit lanes.  */
+   if ((!TARGET_SSSE3 || GET_MODE_SIZE (d->vmode) != 16)
+       && (!TARGET_AVX2 || GET_MODE_SIZE (d->vmode) != 32))
+     return false;
+ 
+   min = 2 * nelt;
+   max = 0;
+   minswap = 2 * nelt;
+   maxswap = 0;
+   for (i = 0; i < nelt; ++i)
+     {
+       unsigned e = d->perm[i];
+       unsigned eswap = d->perm[i] ^ nelt;
+       if (GET_MODE_SIZE (d->vmode) == 32)
+ 	{
+ 	  e = (e & ((nelt / 2) - 1)) | ((e & nelt) >> 1);
+ 	  eswap = e ^ (nelt / 2);
+ 	}
+       if (e < min)
+ 	min = e;
+       if (e > max)
+ 	max = e;
+       if (eswap < minswap)
+ 	minswap = eswap;
+       if (eswap > maxswap)
+ 	maxswap = eswap;
+     }
+   if (min == 0
+       || max - min >= (GET_MODE_SIZE (d->vmode) == 32 ? nelt / 2 : nelt))
+     {
+       if (d->one_operand_p
+ 	  || minswap == 0
+ 	  || maxswap - minswap >= (GET_MODE_SIZE (d->vmode) == 32
+ 				   ? nelt / 2 : nelt))
+ 	return false;
+       swap = true;
+       min = minswap;
+       max = maxswap;
+     }
+ 
+   /* Given that we have SSSE3, we know we'll be able to implement the
+      single operand permutation after the palignr with pshufb for
+      128-bit vectors.  If SINGLE_INSN_ONLY_P, in_order has to be computed
+      first.  */
+   if (d->testing_p && GET_MODE_SIZE (d->vmode) == 16 && !single_insn_only_p)
+     return true;
+ 
+   dcopy = *d;
+   if (swap)
+     {
+       dcopy.op0 = d->op1;
+       dcopy.op1 = d->op0;
+       for (i = 0; i < nelt; ++i)
+ 	dcopy.perm[i] ^= nelt;
+     }
+ 
+   in_order = true;
+   for (i = 0; i < nelt; ++i)
+     {
+       unsigned e = dcopy.perm[i];
+       if (GET_MODE_SIZE (d->vmode) == 32
+ 	  && e >= nelt
+ 	  && (e & (nelt / 2 - 1)) < min)
+ 	e = e - min - (nelt / 2);
+       else
+ 	e = e - min;
+       if (e != i)
+ 	in_order = false;
+       dcopy.perm[i] = e;
+     }
+   dcopy.one_operand_p = true;
+ 
+   if (single_insn_only_p && !in_order)
+     return false;
+ 
+   /* For AVX2, test whether we can permute the result in one instruction.  */
+   if (d->testing_p)
+     {
+       if (in_order)
+ 	return true;
+       dcopy.op1 = dcopy.op0;
+       return expand_vec_perm_1 (&dcopy);
+     }
+ 
+   shift = GEN_INT (min * GET_MODE_UNIT_BITSIZE (d->vmode));
+   if (GET_MODE_SIZE (d->vmode) == 16)
+     {
+       target = gen_reg_rtx (TImode);
+       emit_insn (gen_ssse3_palignrti (target, gen_lowpart (TImode, dcopy.op1),
+ 				      gen_lowpart (TImode, dcopy.op0), shift));
+     }
+   else
+     {
+       target = gen_reg_rtx (V2TImode);
+       emit_insn (gen_avx2_palignrv2ti (target,
+ 				       gen_lowpart (V2TImode, dcopy.op1),
+ 				       gen_lowpart (V2TImode, dcopy.op0),
+ 				       shift));
+     }
+ 
+   dcopy.op0 = dcopy.op1 = gen_lowpart (d->vmode, target);
+ 
+   /* Test for the degenerate case where the alignment by itself
+      produces the desired permutation.  */
+   if (in_order)
+     {
+       emit_move_insn (d->target, dcopy.op0);
+       return true;
+     }
+ 
+   ok = expand_vec_perm_1 (&dcopy);
+   gcc_assert (ok || GET_MODE_SIZE (d->vmode) == 32);
+ 
+   return ok;
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to simplify
+    the permutation using the SSE4_1 pblendv instruction.  Potentially
+    reduces permutation from 2 pshufb and or to 1 pshufb and pblendv.  */
+ 
+ static bool
+ expand_vec_perm_pblendv (struct expand_vec_perm_d *d)
+ {
+   unsigned i, which, nelt = d->nelt;
+   struct expand_vec_perm_d dcopy, dcopy1;
+   machine_mode vmode = d->vmode;
+   bool ok;
+ 
+   /* Use the same checks as in expand_vec_perm_blend.  */
+   if (d->one_operand_p)
+     return false;
+   if (TARGET_AVX2 && GET_MODE_SIZE (vmode) == 32)
+     ;
+   else if (TARGET_AVX && (vmode == V4DFmode || vmode == V8SFmode))
+     ;
+   else if (TARGET_SSE4_1 && GET_MODE_SIZE (vmode) == 16)
+     ;
+   else
+     return false;
+ 
+   /* Figure out where permutation elements stay not in their
+      respective lanes.  */
+   for (i = 0, which = 0; i < nelt; ++i)
+     {
+       unsigned e = d->perm[i];
+       if (e != i)
+ 	which |= (e < nelt ? 1 : 2);
+     }
+   /* We can pblend the part where elements stay not in their
+      respective lanes only when these elements are all in one
+      half of a permutation.
+      {0 1 8 3 4 5 9 7} is ok as 8, 9 are at not at their respective
+      lanes, but both 8 and 9 >= 8
+      {0 1 8 3 4 5 2 7} is not ok as 2 and 8 are not at their
+      respective lanes and 8 >= 8, but 2 not.  */
+   if (which != 1 && which != 2)
+     return false;
+   if (d->testing_p && GET_MODE_SIZE (vmode) == 16)
+     return true;
+ 
+   /* First we apply one operand permutation to the part where
+      elements stay not in their respective lanes.  */
+   dcopy = *d;
+   if (which == 2)
+     dcopy.op0 = dcopy.op1 = d->op1;
+   else
+     dcopy.op0 = dcopy.op1 = d->op0;
+   if (!d->testing_p)
+     dcopy.target = gen_reg_rtx (vmode);
+   dcopy.one_operand_p = true;
+ 
+   for (i = 0; i < nelt; ++i)
+     dcopy.perm[i] = d->perm[i] & (nelt - 1);
+ 
+   ok = expand_vec_perm_1 (&dcopy);
+   if (GET_MODE_SIZE (vmode) != 16 && !ok)
+     return false;
+   else
+     gcc_assert (ok);
+   if (d->testing_p)
+     return true;
+ 
+   /* Next we put permuted elements into their positions.  */
+   dcopy1 = *d;
+   if (which == 2)
+     dcopy1.op1 = dcopy.target;
+   else
+     dcopy1.op0 = dcopy.target;
+ 
+   for (i = 0; i < nelt; ++i)
+     dcopy1.perm[i] = ((d->perm[i] >= nelt) ? (nelt + i) : i);
+ 
+   ok = expand_vec_perm_blend (&dcopy1);
+   gcc_assert (ok);
+ 
+   return true;
+ }
+ 
+ static bool expand_vec_perm_interleave3 (struct expand_vec_perm_d *d);
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to simplify
+    a two vector permutation into a single vector permutation by using
+    an interleave operation to merge the vectors.  */
+ 
+ static bool
+ expand_vec_perm_interleave2 (struct expand_vec_perm_d *d)
+ {
+   struct expand_vec_perm_d dremap, dfinal;
+   unsigned i, nelt = d->nelt, nelt2 = nelt / 2;
+   unsigned HOST_WIDE_INT contents;
+   unsigned char remap[2 * MAX_VECT_LEN];
+   rtx_insn *seq;
+   bool ok, same_halves = false;
+ 
+   if (GET_MODE_SIZE (d->vmode) == 16)
+     {
+       if (d->one_operand_p)
+ 	return false;
+     }
+   else if (GET_MODE_SIZE (d->vmode) == 32)
+     {
+       if (!TARGET_AVX)
+ 	return false;
+       /* For 32-byte modes allow even d->one_operand_p.
+ 	 The lack of cross-lane shuffling in some instructions
+ 	 might prevent a single insn shuffle.  */
+       dfinal = *d;
+       dfinal.testing_p = true;
+       /* If expand_vec_perm_interleave3 can expand this into
+ 	 a 3 insn sequence, give up and let it be expanded as
+ 	 3 insn sequence.  While that is one insn longer,
+ 	 it doesn't need a memory operand and in the common
+ 	 case that both interleave low and high permutations
+ 	 with the same operands are adjacent needs 4 insns
+ 	 for both after CSE.  */
+       if (expand_vec_perm_interleave3 (&dfinal))
+ 	return false;
+     }
+   else
+     return false;
+ 
+   /* Examine from whence the elements come.  */
+   contents = 0;
+   for (i = 0; i < nelt; ++i)
+     contents |= HOST_WIDE_INT_1U << d->perm[i];
+ 
+   memset (remap, 0xff, sizeof (remap));
+   dremap = *d;
+ 
+   if (GET_MODE_SIZE (d->vmode) == 16)
+     {
+       unsigned HOST_WIDE_INT h1, h2, h3, h4;
+ 
+       /* Split the two input vectors into 4 halves.  */
+       h1 = (HOST_WIDE_INT_1U << nelt2) - 1;
+       h2 = h1 << nelt2;
+       h3 = h2 << nelt2;
+       h4 = h3 << nelt2;
+ 
+       /* If the elements from the low halves use interleave low, and similarly
+ 	 for interleave high.  If the elements are from mis-matched halves, we
+ 	 can use shufps for V4SF/V4SI or do a DImode shuffle.  */
+       if ((contents & (h1 | h3)) == contents)
+ 	{
+ 	  /* punpckl* */
+ 	  for (i = 0; i < nelt2; ++i)
+ 	    {
+ 	      remap[i] = i * 2;
+ 	      remap[i + nelt] = i * 2 + 1;
+ 	      dremap.perm[i * 2] = i;
+ 	      dremap.perm[i * 2 + 1] = i + nelt;
+ 	    }
+ 	  if (!TARGET_SSE2 && d->vmode == V4SImode)
+ 	    dremap.vmode = V4SFmode;
+ 	}
+       else if ((contents & (h2 | h4)) == contents)
+ 	{
+ 	  /* punpckh* */
+ 	  for (i = 0; i < nelt2; ++i)
+ 	    {
+ 	      remap[i + nelt2] = i * 2;
+ 	      remap[i + nelt + nelt2] = i * 2 + 1;
+ 	      dremap.perm[i * 2] = i + nelt2;
+ 	      dremap.perm[i * 2 + 1] = i + nelt + nelt2;
+ 	    }
+ 	  if (!TARGET_SSE2 && d->vmode == V4SImode)
+ 	    dremap.vmode = V4SFmode;
+ 	}
+       else if ((contents & (h1 | h4)) == contents)
+ 	{
+ 	  /* shufps */
+ 	  for (i = 0; i < nelt2; ++i)
+ 	    {
+ 	      remap[i] = i;
+ 	      remap[i + nelt + nelt2] = i + nelt2;
+ 	      dremap.perm[i] = i;
+ 	      dremap.perm[i + nelt2] = i + nelt + nelt2;
+ 	    }
+ 	  if (nelt != 4)
+ 	    {
+ 	      /* shufpd */
+ 	      dremap.vmode = V2DImode;
+ 	      dremap.nelt = 2;
+ 	      dremap.perm[0] = 0;
+ 	      dremap.perm[1] = 3;
+ 	    }
+ 	}
+       else if ((contents & (h2 | h3)) == contents)
+ 	{
+ 	  /* shufps */
+ 	  for (i = 0; i < nelt2; ++i)
+ 	    {
+ 	      remap[i + nelt2] = i;
+ 	      remap[i + nelt] = i + nelt2;
+ 	      dremap.perm[i] = i + nelt2;
+ 	      dremap.perm[i + nelt2] = i + nelt;
+ 	    }
+ 	  if (nelt != 4)
+ 	    {
+ 	      /* shufpd */
+ 	      dremap.vmode = V2DImode;
+ 	      dremap.nelt = 2;
+ 	      dremap.perm[0] = 1;
+ 	      dremap.perm[1] = 2;
+ 	    }
+ 	}
+       else
+ 	return false;
+     }
+   else
+     {
+       unsigned int nelt4 = nelt / 4, nzcnt = 0;
+       unsigned HOST_WIDE_INT q[8];
+       unsigned int nonzero_halves[4];
+ 
+       /* Split the two input vectors into 8 quarters.  */
+       q[0] = (HOST_WIDE_INT_1U << nelt4) - 1;
+       for (i = 1; i < 8; ++i)
+ 	q[i] = q[0] << (nelt4 * i);
+       for (i = 0; i < 4; ++i)
+ 	if (((q[2 * i] | q[2 * i + 1]) & contents) != 0)
+ 	  {
+ 	    nonzero_halves[nzcnt] = i;
+ 	    ++nzcnt;
+ 	  }
+ 
+       if (nzcnt == 1)
+ 	{
+ 	  gcc_assert (d->one_operand_p);
+ 	  nonzero_halves[1] = nonzero_halves[0];
+ 	  same_halves = true;
+ 	}
+       else if (d->one_operand_p)
+ 	{
+ 	  gcc_assert (nonzero_halves[0] == 0);
+ 	  gcc_assert (nonzero_halves[1] == 1);
+ 	}
+ 
+       if (nzcnt <= 2)
+ 	{
+ 	  if (d->perm[0] / nelt2 == nonzero_halves[1])
+ 	    {
+ 	      /* Attempt to increase the likelihood that dfinal
+ 		 shuffle will be intra-lane.  */
+ 	      std::swap (nonzero_halves[0], nonzero_halves[1]);
+ 	    }
+ 
+ 	  /* vperm2f128 or vperm2i128.  */
+ 	  for (i = 0; i < nelt2; ++i)
+ 	    {
+ 	      remap[i + nonzero_halves[1] * nelt2] = i + nelt2;
+ 	      remap[i + nonzero_halves[0] * nelt2] = i;
+ 	      dremap.perm[i + nelt2] = i + nonzero_halves[1] * nelt2;
+ 	      dremap.perm[i] = i + nonzero_halves[0] * nelt2;
+ 	    }
+ 
+ 	  if (d->vmode != V8SFmode
+ 	      && d->vmode != V4DFmode
+ 	      && d->vmode != V8SImode)
+ 	    {
+ 	      dremap.vmode = V8SImode;
+ 	      dremap.nelt = 8;
+ 	      for (i = 0; i < 4; ++i)
+ 		{
+ 		  dremap.perm[i] = i + nonzero_halves[0] * 4;
+ 		  dremap.perm[i + 4] = i + nonzero_halves[1] * 4;
+ 		}
+ 	    }
+ 	}
+       else if (d->one_operand_p)
+ 	return false;
+       else if (TARGET_AVX2
+ 	       && (contents & (q[0] | q[2] | q[4] | q[6])) == contents)
+ 	{
+ 	  /* vpunpckl* */
+ 	  for (i = 0; i < nelt4; ++i)
+ 	    {
+ 	      remap[i] = i * 2;
+ 	      remap[i + nelt] = i * 2 + 1;
+ 	      remap[i + nelt2] = i * 2 + nelt2;
+ 	      remap[i + nelt + nelt2] = i * 2 + nelt2 + 1;
+ 	      dremap.perm[i * 2] = i;
+ 	      dremap.perm[i * 2 + 1] = i + nelt;
+ 	      dremap.perm[i * 2 + nelt2] = i + nelt2;
+ 	      dremap.perm[i * 2 + nelt2 + 1] = i + nelt + nelt2;
+ 	    }
+ 	}
+       else if (TARGET_AVX2
+ 	       && (contents & (q[1] | q[3] | q[5] | q[7])) == contents)
+ 	{
+ 	  /* vpunpckh* */
+ 	  for (i = 0; i < nelt4; ++i)
+ 	    {
+ 	      remap[i + nelt4] = i * 2;
+ 	      remap[i + nelt + nelt4] = i * 2 + 1;
+ 	      remap[i + nelt2 + nelt4] = i * 2 + nelt2;
+ 	      remap[i + nelt + nelt2 + nelt4] = i * 2 + nelt2 + 1;
+ 	      dremap.perm[i * 2] = i + nelt4;
+ 	      dremap.perm[i * 2 + 1] = i + nelt + nelt4;
+ 	      dremap.perm[i * 2 + nelt2] = i + nelt2 + nelt4;
+ 	      dremap.perm[i * 2 + nelt2 + 1] = i + nelt + nelt2 + nelt4;
+ 	    }
+ 	}
+       else
+ 	return false;
+     }
+ 
+   /* Use the remapping array set up above to move the elements from their
+      swizzled locations into their final destinations.  */
+   dfinal = *d;
+   for (i = 0; i < nelt; ++i)
+     {
+       unsigned e = remap[d->perm[i]];
+       gcc_assert (e < nelt);
+       /* If same_halves is true, both halves of the remapped vector are the
+ 	 same.  Avoid cross-lane accesses if possible.  */
+       if (same_halves && i >= nelt2)
+ 	{
+ 	  gcc_assert (e < nelt2);
+ 	  dfinal.perm[i] = e + nelt2;
+ 	}
+       else
+ 	dfinal.perm[i] = e;
+     }
+   if (!d->testing_p)
+     {
+       dremap.target = gen_reg_rtx (dremap.vmode);
+       dfinal.op0 = gen_lowpart (dfinal.vmode, dremap.target);
+     }
+   dfinal.op1 = dfinal.op0;
+   dfinal.one_operand_p = true;
+ 
+   /* Test if the final remap can be done with a single insn.  For V4SFmode or
+      V4SImode this *will* succeed.  For V8HImode or V16QImode it may not.  */
+   start_sequence ();
+   ok = expand_vec_perm_1 (&dfinal);
+   seq = get_insns ();
+   end_sequence ();
+ 
+   if (!ok)
+     return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+   if (dremap.vmode != dfinal.vmode)
+     {
+       dremap.op0 = gen_lowpart (dremap.vmode, dremap.op0);
+       dremap.op1 = gen_lowpart (dremap.vmode, dremap.op1);
+     }
+ 
+   ok = expand_vec_perm_1 (&dremap);
+   gcc_assert (ok);
+ 
+   emit_insn (seq);
+   return true;
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to simplify
+    a single vector cross-lane permutation into vpermq followed
+    by any of the single insn permutations.  */
+ 
+ static bool
+ expand_vec_perm_vpermq_perm_1 (struct expand_vec_perm_d *d)
+ {
+   struct expand_vec_perm_d dremap, dfinal;
+   unsigned i, j, nelt = d->nelt, nelt2 = nelt / 2, nelt4 = nelt / 4;
+   unsigned contents[2];
+   bool ok;
+ 
+   if (!(TARGET_AVX2
+ 	&& (d->vmode == V32QImode || d->vmode == V16HImode)
+ 	&& d->one_operand_p))
+     return false;
+ 
+   contents[0] = 0;
+   contents[1] = 0;
+   for (i = 0; i < nelt2; ++i)
+     {
+       contents[0] |= 1u << (d->perm[i] / nelt4);
+       contents[1] |= 1u << (d->perm[i + nelt2] / nelt4);
+     }
+ 
+   for (i = 0; i < 2; ++i)
+     {
+       unsigned int cnt = 0;
+       for (j = 0; j < 4; ++j)
+ 	if ((contents[i] & (1u << j)) != 0 && ++cnt > 2)
+ 	  return false;
+     }
+ 
+   if (d->testing_p)
+     return true;
+ 
+   dremap = *d;
+   dremap.vmode = V4DImode;
+   dremap.nelt = 4;
+   dremap.target = gen_reg_rtx (V4DImode);
+   dremap.op0 = gen_lowpart (V4DImode, d->op0);
+   dremap.op1 = dremap.op0;
+   dremap.one_operand_p = true;
+   for (i = 0; i < 2; ++i)
+     {
+       unsigned int cnt = 0;
+       for (j = 0; j < 4; ++j)
+ 	if ((contents[i] & (1u << j)) != 0)
+ 	  dremap.perm[2 * i + cnt++] = j;
+       for (; cnt < 2; ++cnt)
+ 	dremap.perm[2 * i + cnt] = 0;
+     }
+ 
+   dfinal = *d;
+   dfinal.op0 = gen_lowpart (dfinal.vmode, dremap.target);
+   dfinal.op1 = dfinal.op0;
+   dfinal.one_operand_p = true;
+   for (i = 0, j = 0; i < nelt; ++i)
+     {
+       if (i == nelt2)
+ 	j = 2;
+       dfinal.perm[i] = (d->perm[i] & (nelt4 - 1)) | (j ? nelt2 : 0);
+       if ((d->perm[i] / nelt4) == dremap.perm[j])
+ 	;
+       else if ((d->perm[i] / nelt4) == dremap.perm[j + 1])
+ 	dfinal.perm[i] |= nelt4;
+       else
+ 	gcc_unreachable ();
+     }
+ 
+   ok = expand_vec_perm_1 (&dremap);
+   gcc_assert (ok);
+ 
+   ok = expand_vec_perm_1 (&dfinal);
+   gcc_assert (ok);
+ 
+   return true;
+ }
+ 
+ static bool canonicalize_perm (struct expand_vec_perm_d *d);
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to expand
+    a vector permutation using two instructions, vperm2f128 resp.
+    vperm2i128 followed by any single in-lane permutation.  */
+ 
+ static bool
+ expand_vec_perm_vperm2f128 (struct expand_vec_perm_d *d)
+ {
+   struct expand_vec_perm_d dfirst, dsecond;
+   unsigned i, j, nelt = d->nelt, nelt2 = nelt / 2, perm;
+   bool ok;
+ 
+   if (!TARGET_AVX
+       || GET_MODE_SIZE (d->vmode) != 32
+       || (d->vmode != V8SFmode && d->vmode != V4DFmode && !TARGET_AVX2))
+     return false;
+ 
+   dsecond = *d;
+   dsecond.one_operand_p = false;
+   dsecond.testing_p = true;
+ 
+   /* ((perm << 2)|perm) & 0x33 is the vperm2[fi]128
+      immediate.  For perm < 16 the second permutation uses
+      d->op0 as first operand, for perm >= 16 it uses d->op1
+      as first operand.  The second operand is the result of
+      vperm2[fi]128.  */
+   for (perm = 0; perm < 32; perm++)
+     {
+       /* Ignore permutations which do not move anything cross-lane.  */
+       if (perm < 16)
+ 	{
+ 	  /* The second shuffle for e.g. V4DFmode has
+ 	     0123 and ABCD operands.
+ 	     Ignore AB23, as 23 is already in the second lane
+ 	     of the first operand.  */
+ 	  if ((perm & 0xc) == (1 << 2)) continue;
+ 	  /* And 01CD, as 01 is in the first lane of the first
+ 	     operand.  */
+ 	  if ((perm & 3) == 0) continue;
+ 	  /* And 4567, as then the vperm2[fi]128 doesn't change
+ 	     anything on the original 4567 second operand.  */
+ 	  if ((perm & 0xf) == ((3 << 2) | 2)) continue;
+ 	}
+       else
+ 	{
+ 	  /* The second shuffle for e.g. V4DFmode has
+ 	     4567 and ABCD operands.
+ 	     Ignore AB67, as 67 is already in the second lane
+ 	     of the first operand.  */
+ 	  if ((perm & 0xc) == (3 << 2)) continue;
+ 	  /* And 45CD, as 45 is in the first lane of the first
+ 	     operand.  */
+ 	  if ((perm & 3) == 2) continue;
+ 	  /* And 0123, as then the vperm2[fi]128 doesn't change
+ 	     anything on the original 0123 first operand.  */
+ 	  if ((perm & 0xf) == (1 << 2)) continue;
+ 	}
+ 
+       for (i = 0; i < nelt; i++)
+ 	{
+ 	  j = d->perm[i] / nelt2;
+ 	  if (j == ((perm >> (2 * (i >= nelt2))) & 3))
+ 	    dsecond.perm[i] = nelt + (i & nelt2) + (d->perm[i] & (nelt2 - 1));
+ 	  else if (j == (unsigned) (i >= nelt2) + 2 * (perm >= 16))
+ 	    dsecond.perm[i] = d->perm[i] & (nelt - 1);
+ 	  else
+ 	    break;
+ 	}
+ 
+       if (i == nelt)
+ 	{
+ 	  start_sequence ();
+ 	  ok = expand_vec_perm_1 (&dsecond);
+ 	  end_sequence ();
+ 	}
+       else
+ 	ok = false;
+ 
+       if (ok)
+ 	{
+ 	  if (d->testing_p)
+ 	    return true;
+ 
+ 	  /* Found a usable second shuffle.  dfirst will be
+ 	     vperm2f128 on d->op0 and d->op1.  */
+ 	  dsecond.testing_p = false;
+ 	  dfirst = *d;
+ 	  dfirst.target = gen_reg_rtx (d->vmode);
+ 	  for (i = 0; i < nelt; i++)
+ 	    dfirst.perm[i] = (i & (nelt2 - 1))
+ 			     + ((perm >> (2 * (i >= nelt2))) & 3) * nelt2;
+ 
+ 	  canonicalize_perm (&dfirst);
+ 	  ok = expand_vec_perm_1 (&dfirst);
+ 	  gcc_assert (ok);
+ 
+ 	  /* And dsecond is some single insn shuffle, taking
+ 	     d->op0 and result of vperm2f128 (if perm < 16) or
+ 	     d->op1 and result of vperm2f128 (otherwise).  */
+ 	  if (perm >= 16)
+ 	    dsecond.op0 = dsecond.op1;
+ 	  dsecond.op1 = dfirst.target;
+ 
+ 	  ok = expand_vec_perm_1 (&dsecond);
+ 	  gcc_assert (ok);
+ 
+ 	  return true;
+ 	}
+ 
+       /* For one operand, the only useful vperm2f128 permutation is 0x01
+ 	 aka lanes swap.  */
+       if (d->one_operand_p)
+ 	return false;
+     }
+ 
+   return false;
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to simplify
+    a two vector permutation using 2 intra-lane interleave insns
+    and cross-lane shuffle for 32-byte vectors.  */
+ 
+ static bool
+ expand_vec_perm_interleave3 (struct expand_vec_perm_d *d)
+ {
+   unsigned i, nelt;
+   rtx (*gen) (rtx, rtx, rtx);
+ 
+   if (d->one_operand_p)
+     return false;
+   if (TARGET_AVX2 && GET_MODE_SIZE (d->vmode) == 32)
+     ;
+   else if (TARGET_AVX && (d->vmode == V8SFmode || d->vmode == V4DFmode))
+     ;
+   else
+     return false;
+ 
+   nelt = d->nelt;
+   if (d->perm[0] != 0 && d->perm[0] != nelt / 2)
+     return false;
+   for (i = 0; i < nelt; i += 2)
+     if (d->perm[i] != d->perm[0] + i / 2
+ 	|| d->perm[i + 1] != d->perm[0] + i / 2 + nelt)
+       return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+   switch (d->vmode)
+     {
+     case E_V32QImode:
+       if (d->perm[0])
+ 	gen = gen_vec_interleave_highv32qi;
+       else
+ 	gen = gen_vec_interleave_lowv32qi;
+       break;
+     case E_V16HImode:
+       if (d->perm[0])
+ 	gen = gen_vec_interleave_highv16hi;
+       else
+ 	gen = gen_vec_interleave_lowv16hi;
+       break;
+     case E_V8SImode:
+       if (d->perm[0])
+ 	gen = gen_vec_interleave_highv8si;
+       else
+ 	gen = gen_vec_interleave_lowv8si;
+       break;
+     case E_V4DImode:
+       if (d->perm[0])
+ 	gen = gen_vec_interleave_highv4di;
+       else
+ 	gen = gen_vec_interleave_lowv4di;
+       break;
+     case E_V8SFmode:
+       if (d->perm[0])
+ 	gen = gen_vec_interleave_highv8sf;
+       else
+ 	gen = gen_vec_interleave_lowv8sf;
+       break;
+     case E_V4DFmode:
+       if (d->perm[0])
+ 	gen = gen_vec_interleave_highv4df;
+       else
+ 	gen = gen_vec_interleave_lowv4df;
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   emit_insn (gen (d->target, d->op0, d->op1));
+   return true;
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to implement
+    a single vector permutation using a single intra-lane vector
+    permutation, vperm2f128 swapping the lanes and vblend* insn blending
+    the non-swapped and swapped vectors together.  */
+ 
+ static bool
+ expand_vec_perm_vperm2f128_vblend (struct expand_vec_perm_d *d)
+ {
+   struct expand_vec_perm_d dfirst, dsecond;
+   unsigned i, j, msk, nelt = d->nelt, nelt2 = nelt / 2;
+   rtx_insn *seq;
+   bool ok;
+   rtx (*blend) (rtx, rtx, rtx, rtx) = NULL;
+ 
+   if (!TARGET_AVX
+       || TARGET_AVX2
+       || (d->vmode != V8SFmode && d->vmode != V4DFmode)
+       || !d->one_operand_p)
+     return false;
+ 
+   dfirst = *d;
+   for (i = 0; i < nelt; i++)
+     dfirst.perm[i] = 0xff;
+   for (i = 0, msk = 0; i < nelt; i++)
+     {
+       j = (d->perm[i] & nelt2) ? i | nelt2 : i & ~nelt2;
+       if (dfirst.perm[j] != 0xff && dfirst.perm[j] != d->perm[i])
+ 	return false;
+       dfirst.perm[j] = d->perm[i];
+       if (j != i)
+ 	msk |= (1 << i);
+     }
+   for (i = 0; i < nelt; i++)
+     if (dfirst.perm[i] == 0xff)
+       dfirst.perm[i] = i;
+ 
+   if (!d->testing_p)
+     dfirst.target = gen_reg_rtx (dfirst.vmode);
+ 
+   start_sequence ();
+   ok = expand_vec_perm_1 (&dfirst);
+   seq = get_insns ();
+   end_sequence ();
+ 
+   if (!ok)
+     return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+   emit_insn (seq);
+ 
+   dsecond = *d;
+   dsecond.op0 = dfirst.target;
+   dsecond.op1 = dfirst.target;
+   dsecond.one_operand_p = true;
+   dsecond.target = gen_reg_rtx (dsecond.vmode);
+   for (i = 0; i < nelt; i++)
+     dsecond.perm[i] = i ^ nelt2;
+ 
+   ok = expand_vec_perm_1 (&dsecond);
+   gcc_assert (ok);
+ 
+   blend = d->vmode == V8SFmode ? gen_avx_blendps256 : gen_avx_blendpd256;
+   emit_insn (blend (d->target, dfirst.target, dsecond.target, GEN_INT (msk)));
+   return true;
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Implement a V4DF
+    permutation using two vperm2f128, followed by a vshufpd insn blending
+    the two vectors together.  */
+ 
+ static bool
+ expand_vec_perm_2vperm2f128_vshuf (struct expand_vec_perm_d *d)
+ {
+   struct expand_vec_perm_d dfirst, dsecond, dthird;
+   bool ok;
+ 
+   if (!TARGET_AVX || (d->vmode != V4DFmode))
+     return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+   dfirst = *d;
+   dsecond = *d;
+   dthird = *d;
+ 
+   dfirst.perm[0] = (d->perm[0] & ~1);
+   dfirst.perm[1] = (d->perm[0] & ~1) + 1;
+   dfirst.perm[2] = (d->perm[2] & ~1);
+   dfirst.perm[3] = (d->perm[2] & ~1) + 1;
+   dsecond.perm[0] = (d->perm[1] & ~1);
+   dsecond.perm[1] = (d->perm[1] & ~1) + 1;
+   dsecond.perm[2] = (d->perm[3] & ~1);
+   dsecond.perm[3] = (d->perm[3] & ~1) + 1;
+   dthird.perm[0] = (d->perm[0] % 2);
+   dthird.perm[1] = (d->perm[1] % 2) + 4;
+   dthird.perm[2] = (d->perm[2] % 2) + 2;
+   dthird.perm[3] = (d->perm[3] % 2) + 6;
+ 
+   dfirst.target = gen_reg_rtx (dfirst.vmode);
+   dsecond.target = gen_reg_rtx (dsecond.vmode);
+   dthird.op0 = dfirst.target;
+   dthird.op1 = dsecond.target;
+   dthird.one_operand_p = false;
+ 
+   canonicalize_perm (&dfirst);
+   canonicalize_perm (&dsecond);
+ 
+   ok = expand_vec_perm_1 (&dfirst)
+        && expand_vec_perm_1 (&dsecond)
+        && expand_vec_perm_1 (&dthird);
+ 
+   gcc_assert (ok);
+ 
+   return true;
+ }
+ 
+ static bool ix86_expand_vec_perm_const_1 (struct expand_vec_perm_d *);
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Try to implement
+    a two vector permutation using two intra-lane vector
+    permutations, vperm2f128 swapping the lanes and vblend* insn blending
+    the non-swapped and swapped vectors together.  */
+ 
+ static bool
+ expand_vec_perm2_vperm2f128_vblend (struct expand_vec_perm_d *d)
+ {
+   struct expand_vec_perm_d dfirst, dsecond, dthird;
+   unsigned i, j, msk, nelt = d->nelt, nelt2 = nelt / 2, which1 = 0, which2 = 0;
+   rtx_insn *seq1, *seq2;
+   bool ok;
+   rtx (*blend) (rtx, rtx, rtx, rtx) = NULL;
+ 
+   if (!TARGET_AVX
+       || TARGET_AVX2
+       || (d->vmode != V8SFmode && d->vmode != V4DFmode)
+       || d->one_operand_p)
+     return false;
+ 
+   dfirst = *d;
+   dsecond = *d;
+   for (i = 0; i < nelt; i++)
+     {
+       dfirst.perm[i] = 0xff;
+       dsecond.perm[i] = 0xff;
+     }
+   for (i = 0, msk = 0; i < nelt; i++)
+     {
+       j = (d->perm[i] & nelt2) ? i | nelt2 : i & ~nelt2;
+       if (j == i)
+ 	{
+ 	  dfirst.perm[j] = d->perm[i];
+ 	  which1 |= (d->perm[i] < nelt ? 1 : 2);
+ 	}
+       else
+ 	{
+ 	  dsecond.perm[j] = d->perm[i];
+ 	  which2 |= (d->perm[i] < nelt ? 1 : 2);
+ 	  msk |= (1U << i);
+ 	}
+     }
+   if (msk == 0 || msk == (1U << nelt) - 1)
+     return false;
+ 
+   if (!d->testing_p)
+     {
+       dfirst.target = gen_reg_rtx (dfirst.vmode);
+       dsecond.target = gen_reg_rtx (dsecond.vmode);
+     }
+ 
+   for (i = 0; i < nelt; i++)
+     {
+       if (dfirst.perm[i] == 0xff)
+ 	dfirst.perm[i] = (which1 == 2 ? i + nelt : i);
+       if (dsecond.perm[i] == 0xff)
+ 	dsecond.perm[i] = (which2 == 2 ? i + nelt : i);
+     }
+   canonicalize_perm (&dfirst);
+   start_sequence ();
+   ok = ix86_expand_vec_perm_const_1 (&dfirst);
+   seq1 = get_insns ();
+   end_sequence ();
+ 
+   if (!ok)
+     return false;
+ 
+   canonicalize_perm (&dsecond);
+   start_sequence ();
+   ok = ix86_expand_vec_perm_const_1 (&dsecond);
+   seq2 = get_insns ();
+   end_sequence ();
+ 
+   if (!ok)
+     return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+   emit_insn (seq1);
+   emit_insn (seq2);
+ 
+   dthird = *d;
+   dthird.op0 = dsecond.target;
+   dthird.op1 = dsecond.target;
+   dthird.one_operand_p = true;
+   dthird.target = gen_reg_rtx (dthird.vmode);
+   for (i = 0; i < nelt; i++)
+     dthird.perm[i] = i ^ nelt2;
+ 
+   ok = expand_vec_perm_1 (&dthird);
+   gcc_assert (ok);
+ 
+   blend = d->vmode == V8SFmode ? gen_avx_blendps256 : gen_avx_blendpd256;
+   emit_insn (blend (d->target, dfirst.target, dthird.target, GEN_INT (msk)));
+   return true;
+ }
+ 
+ /* A subroutine of expand_vec_perm_even_odd_1.  Implement the double-word
+    permutation with two pshufb insns and an ior.  We should have already
+    failed all two instruction sequences.  */
+ 
+ static bool
+ expand_vec_perm_pshufb2 (struct expand_vec_perm_d *d)
+ {
+   rtx rperm[2][16], vperm, l, h, op, m128;
+   unsigned int i, nelt, eltsz;
+ 
+   if (!TARGET_SSSE3 || GET_MODE_SIZE (d->vmode) != 16)
+     return false;
+   gcc_assert (!d->one_operand_p);
+ 
+   if (d->testing_p)
+     return true;
+ 
+   nelt = d->nelt;
+   eltsz = GET_MODE_UNIT_SIZE (d->vmode);
+ 
+   /* Generate two permutation masks.  If the required element is within
+      the given vector it is shuffled into the proper lane.  If the required
+      element is in the other vector, force a zero into the lane by setting
+      bit 7 in the permutation mask.  */
+   m128 = GEN_INT (-128);
+   for (i = 0; i < nelt; ++i)
+     {
+       unsigned j, e = d->perm[i];
+       unsigned which = (e >= nelt);
+       if (e >= nelt)
+ 	e -= nelt;
+ 
+       for (j = 0; j < eltsz; ++j)
+ 	{
+ 	  rperm[which][i*eltsz + j] = GEN_INT (e*eltsz + j);
+ 	  rperm[1-which][i*eltsz + j] = m128;
+ 	}
+     }
+ 
+   vperm = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, rperm[0]));
+   vperm = force_reg (V16QImode, vperm);
+ 
+   l = gen_reg_rtx (V16QImode);
+   op = gen_lowpart (V16QImode, d->op0);
+   emit_insn (gen_ssse3_pshufbv16qi3 (l, op, vperm));
+ 
+   vperm = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, rperm[1]));
+   vperm = force_reg (V16QImode, vperm);
+ 
+   h = gen_reg_rtx (V16QImode);
+   op = gen_lowpart (V16QImode, d->op1);
+   emit_insn (gen_ssse3_pshufbv16qi3 (h, op, vperm));
+ 
+   op = d->target;
+   if (d->vmode != V16QImode)
+     op = gen_reg_rtx (V16QImode);
+   emit_insn (gen_iorv16qi3 (op, l, h));
+   if (op != d->target)
+     emit_move_insn (d->target, gen_lowpart (d->vmode, op));
+ 
+   return true;
+ }
+ 
+ /* Implement arbitrary permutation of one V32QImode and V16QImode operand
+    with two vpshufb insns, vpermq and vpor.  We should have already failed
+    all two or three instruction sequences.  */
+ 
+ static bool
+ expand_vec_perm_vpshufb2_vpermq (struct expand_vec_perm_d *d)
+ {
+   rtx rperm[2][32], vperm, l, h, hp, op, m128;
+   unsigned int i, nelt, eltsz;
+ 
+   if (!TARGET_AVX2
+       || !d->one_operand_p
+       || (d->vmode != V32QImode && d->vmode != V16HImode))
+     return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+   nelt = d->nelt;
+   eltsz = GET_MODE_UNIT_SIZE (d->vmode);
+ 
+   /* Generate two permutation masks.  If the required element is within
+      the same lane, it is shuffled in.  If the required element from the
+      other lane, force a zero by setting bit 7 in the permutation mask.
+      In the other mask the mask has non-negative elements if element
+      is requested from the other lane, but also moved to the other lane,
+      so that the result of vpshufb can have the two V2TImode halves
+      swapped.  */
+   m128 = GEN_INT (-128);
+   for (i = 0; i < nelt; ++i)
+     {
+       unsigned j, e = d->perm[i] & (nelt / 2 - 1);
+       unsigned which = ((d->perm[i] ^ i) & (nelt / 2)) * eltsz;
+ 
+       for (j = 0; j < eltsz; ++j)
+ 	{
+ 	  rperm[!!which][(i * eltsz + j) ^ which] = GEN_INT (e * eltsz + j);
+ 	  rperm[!which][(i * eltsz + j) ^ (which ^ 16)] = m128;
+ 	}
+     }
+ 
+   vperm = gen_rtx_CONST_VECTOR (V32QImode, gen_rtvec_v (32, rperm[1]));
+   vperm = force_reg (V32QImode, vperm);
+ 
+   h = gen_reg_rtx (V32QImode);
+   op = gen_lowpart (V32QImode, d->op0);
+   emit_insn (gen_avx2_pshufbv32qi3 (h, op, vperm));
+ 
+   /* Swap the 128-byte lanes of h into hp.  */
+   hp = gen_reg_rtx (V4DImode);
+   op = gen_lowpart (V4DImode, h);
+   emit_insn (gen_avx2_permv4di_1 (hp, op, const2_rtx, GEN_INT (3), const0_rtx,
+ 				  const1_rtx));
+ 
+   vperm = gen_rtx_CONST_VECTOR (V32QImode, gen_rtvec_v (32, rperm[0]));
+   vperm = force_reg (V32QImode, vperm);
+ 
+   l = gen_reg_rtx (V32QImode);
+   op = gen_lowpart (V32QImode, d->op0);
+   emit_insn (gen_avx2_pshufbv32qi3 (l, op, vperm));
+ 
+   op = d->target;
+   if (d->vmode != V32QImode)
+     op = gen_reg_rtx (V32QImode);
+   emit_insn (gen_iorv32qi3 (op, l, gen_lowpart (V32QImode, hp)));
+   if (op != d->target)
+     emit_move_insn (d->target, gen_lowpart (d->vmode, op));
+ 
+   return true;
+ }
+ 
+ /* A subroutine of expand_vec_perm_even_odd_1.  Implement extract-even
+    and extract-odd permutations of two V32QImode and V16QImode operand
+    with two vpshufb insns, vpor and vpermq.  We should have already
+    failed all two or three instruction sequences.  */
+ 
+ static bool
+ expand_vec_perm_vpshufb2_vpermq_even_odd (struct expand_vec_perm_d *d)
+ {
+   rtx rperm[2][32], vperm, l, h, ior, op, m128;
+   unsigned int i, nelt, eltsz;
+ 
+   if (!TARGET_AVX2
+       || d->one_operand_p
+       || (d->vmode != V32QImode && d->vmode != V16HImode))
+     return false;
+ 
+   for (i = 0; i < d->nelt; ++i)
+     if ((d->perm[i] ^ (i * 2)) & (3 * d->nelt / 2))
+       return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+   nelt = d->nelt;
+   eltsz = GET_MODE_UNIT_SIZE (d->vmode);
+ 
+   /* Generate two permutation masks.  In the first permutation mask
+      the first quarter will contain indexes for the first half
+      of the op0, the second quarter will contain bit 7 set, third quarter
+      will contain indexes for the second half of the op0 and the
+      last quarter bit 7 set.  In the second permutation mask
+      the first quarter will contain bit 7 set, the second quarter
+      indexes for the first half of the op1, the third quarter bit 7 set
+      and last quarter indexes for the second half of the op1.
+      I.e. the first mask e.g. for V32QImode extract even will be:
+      0, 2, ..., 0xe, -128, ..., -128, 0, 2, ..., 0xe, -128, ..., -128
+      (all values masked with 0xf except for -128) and second mask
+      for extract even will be
+      -128, ..., -128, 0, 2, ..., 0xe, -128, ..., -128, 0, 2, ..., 0xe.  */
+   m128 = GEN_INT (-128);
+   for (i = 0; i < nelt; ++i)
+     {
+       unsigned j, e = d->perm[i] & (nelt / 2 - 1);
+       unsigned which = d->perm[i] >= nelt;
+       unsigned xorv = (i >= nelt / 4 && i < 3 * nelt / 4) ? 24 : 0;
+ 
+       for (j = 0; j < eltsz; ++j)
+ 	{
+ 	  rperm[which][(i * eltsz + j) ^ xorv] = GEN_INT (e * eltsz + j);
+ 	  rperm[1 - which][(i * eltsz + j) ^ xorv] = m128;
+ 	}
+     }
+ 
+   vperm = gen_rtx_CONST_VECTOR (V32QImode, gen_rtvec_v (32, rperm[0]));
+   vperm = force_reg (V32QImode, vperm);
+ 
+   l = gen_reg_rtx (V32QImode);
+   op = gen_lowpart (V32QImode, d->op0);
+   emit_insn (gen_avx2_pshufbv32qi3 (l, op, vperm));
+ 
+   vperm = gen_rtx_CONST_VECTOR (V32QImode, gen_rtvec_v (32, rperm[1]));
+   vperm = force_reg (V32QImode, vperm);
+ 
+   h = gen_reg_rtx (V32QImode);
+   op = gen_lowpart (V32QImode, d->op1);
+   emit_insn (gen_avx2_pshufbv32qi3 (h, op, vperm));
+ 
+   ior = gen_reg_rtx (V32QImode);
+   emit_insn (gen_iorv32qi3 (ior, l, h));
+ 
+   /* Permute the V4DImode quarters using { 0, 2, 1, 3 } permutation.  */
+   op = gen_reg_rtx (V4DImode);
+   ior = gen_lowpart (V4DImode, ior);
+   emit_insn (gen_avx2_permv4di_1 (op, ior, const0_rtx, const2_rtx,
+ 				  const1_rtx, GEN_INT (3)));
+   emit_move_insn (d->target, gen_lowpart (d->vmode, op));
+ 
+   return true;
+ }
+ 
+ /* A subroutine of expand_vec_perm_even_odd_1.  Implement extract-even
+    and extract-odd permutations of two V16QI, V8HI, V16HI or V32QI operands
+    with two "and" and "pack" or two "shift" and "pack" insns.  We should
+    have already failed all two instruction sequences.  */
+ 
+ static bool
+ expand_vec_perm_even_odd_pack (struct expand_vec_perm_d *d)
+ {
+   rtx op, dop0, dop1, t;
+   unsigned i, odd, c, s, nelt = d->nelt;
+   bool end_perm = false;
+   machine_mode half_mode;
+   rtx (*gen_and) (rtx, rtx, rtx);
+   rtx (*gen_pack) (rtx, rtx, rtx);
+   rtx (*gen_shift) (rtx, rtx, rtx);
+ 
+   if (d->one_operand_p)
+     return false;
+ 
+   switch (d->vmode)
+     {
+     case E_V8HImode:
+       /* Required for "pack".  */
+       if (!TARGET_SSE4_1)
+         return false;
+       c = 0xffff;
+       s = 16;
+       half_mode = V4SImode;
+       gen_and = gen_andv4si3;
+       gen_pack = gen_sse4_1_packusdw;
+       gen_shift = gen_lshrv4si3;
+       break;
+     case E_V16QImode:
+       /* No check as all instructions are SSE2.  */
+       c = 0xff;
+       s = 8;
+       half_mode = V8HImode;
+       gen_and = gen_andv8hi3;
+       gen_pack = gen_sse2_packuswb;
+       gen_shift = gen_lshrv8hi3;
+       break;
+     case E_V16HImode:
+       if (!TARGET_AVX2)
+         return false;
+       c = 0xffff;
+       s = 16;
+       half_mode = V8SImode;
+       gen_and = gen_andv8si3;
+       gen_pack = gen_avx2_packusdw;
+       gen_shift = gen_lshrv8si3;
+       end_perm = true;
+       break;
+     case E_V32QImode:
+       if (!TARGET_AVX2)
+         return false;
+       c = 0xff;
+       s = 8;
+       half_mode = V16HImode;
+       gen_and = gen_andv16hi3;
+       gen_pack = gen_avx2_packuswb;
+       gen_shift = gen_lshrv16hi3;
+       end_perm = true;
+       break;
+     default:
+       /* Only V8HI, V16QI, V16HI and V32QI modes are more profitable than
+ 	 general shuffles.  */
+       return false;
+     }
+ 
+   /* Check that permutation is even or odd.  */
+   odd = d->perm[0];
+   if (odd > 1)
+     return false;
+ 
+   for (i = 1; i < nelt; ++i)
+     if (d->perm[i] != 2 * i + odd)
+       return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+   dop0 = gen_reg_rtx (half_mode);
+   dop1 = gen_reg_rtx (half_mode);
+   if (odd == 0)
+     {
+       t = gen_const_vec_duplicate (half_mode, GEN_INT (c));
+       t = force_reg (half_mode, t);
+       emit_insn (gen_and (dop0, t, gen_lowpart (half_mode, d->op0)));
+       emit_insn (gen_and (dop1, t, gen_lowpart (half_mode, d->op1)));
+     }
+   else
+     {
+       emit_insn (gen_shift (dop0,
+ 			    gen_lowpart (half_mode, d->op0),
+ 			    GEN_INT (s)));
+       emit_insn (gen_shift (dop1,
+ 			    gen_lowpart (half_mode, d->op1),
+ 			    GEN_INT (s)));
+     }
+   /* In AVX2 for 256 bit case we need to permute pack result.  */
+   if (TARGET_AVX2 && end_perm)
+     {
+       op = gen_reg_rtx (d->vmode);
+       t = gen_reg_rtx (V4DImode);
+       emit_insn (gen_pack (op, dop0, dop1));
+       emit_insn (gen_avx2_permv4di_1 (t,
+ 				      gen_lowpart (V4DImode, op),
+ 				      const0_rtx,
+ 				      const2_rtx,
+ 				      const1_rtx,
+ 				      GEN_INT (3)));
+       emit_move_insn (d->target, gen_lowpart (d->vmode, t));
+     }
+   else
+     emit_insn (gen_pack (d->target, dop0, dop1));
+ 
+   return true;
+ }
+ 
+ /* A subroutine of expand_vec_perm_even_odd_1.  Implement extract-even
+    and extract-odd permutations of two V64QI operands
+    with two "shifts", two "truncs" and one "concat" insns for "odd"
+    and two "truncs" and one concat insn for "even."
+    Have already failed all two instruction sequences.  */
+ 
+ static bool
+ expand_vec_perm_even_odd_trunc (struct expand_vec_perm_d *d)
+ {
+   rtx t1, t2, t3, t4;
+   unsigned i, odd, nelt = d->nelt;
+ 
+   if (!TARGET_AVX512BW
+       || d->one_operand_p
+       || d->vmode != V64QImode)
+     return false;
+ 
+   /* Check that permutation is even or odd.  */
+   odd = d->perm[0];
+   if (odd > 1)
+     return false;
+ 
+   for (i = 1; i < nelt; ++i)
+     if (d->perm[i] != 2 * i + odd)
+       return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+ 
+   if (odd)
+     {
+       t1 = gen_reg_rtx (V32HImode);
+       t2 = gen_reg_rtx (V32HImode);
+       emit_insn (gen_lshrv32hi3 (t1,
+ 				 gen_lowpart (V32HImode, d->op0),
+ 				 GEN_INT (8)));
+       emit_insn (gen_lshrv32hi3 (t2,
+ 				 gen_lowpart (V32HImode, d->op1),
+ 				 GEN_INT (8)));
+     }
+   else
+     {
+       t1 = gen_lowpart (V32HImode, d->op0);
+       t2 = gen_lowpart (V32HImode, d->op1);
+     }
+ 
+   t3 = gen_reg_rtx (V32QImode);
+   t4 = gen_reg_rtx (V32QImode);
+   emit_insn (gen_avx512bw_truncatev32hiv32qi2 (t3, t1));
+   emit_insn (gen_avx512bw_truncatev32hiv32qi2 (t4, t2));
+   emit_insn (gen_avx_vec_concatv64qi (d->target, t3, t4));
+ 
+   return true;
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Implement extract-even
+    and extract-odd permutations.  */
+ 
+ static bool
+ expand_vec_perm_even_odd_1 (struct expand_vec_perm_d *d, unsigned odd)
+ {
+   rtx t1, t2, t3, t4, t5;
+ 
+   switch (d->vmode)
+     {
+     case E_V4DFmode:
+       if (d->testing_p)
+ 	break;
+       t1 = gen_reg_rtx (V4DFmode);
+       t2 = gen_reg_rtx (V4DFmode);
+ 
+       /* Shuffle the lanes around into { 0 1 4 5 } and { 2 3 6 7 }.  */
+       emit_insn (gen_avx_vperm2f128v4df3 (t1, d->op0, d->op1, GEN_INT (0x20)));
+       emit_insn (gen_avx_vperm2f128v4df3 (t2, d->op0, d->op1, GEN_INT (0x31)));
+ 
+       /* Now an unpck[lh]pd will produce the result required.  */
+       if (odd)
+ 	t3 = gen_avx_unpckhpd256 (d->target, t1, t2);
+       else
+ 	t3 = gen_avx_unpcklpd256 (d->target, t1, t2);
+       emit_insn (t3);
+       break;
+ 
+     case E_V8SFmode:
+       {
+ 	int mask = odd ? 0xdd : 0x88;
+ 
+ 	if (d->testing_p)
+ 	  break;
+ 	t1 = gen_reg_rtx (V8SFmode);
+ 	t2 = gen_reg_rtx (V8SFmode);
+ 	t3 = gen_reg_rtx (V8SFmode);
+ 
+ 	/* Shuffle within the 128-bit lanes to produce:
+ 	   { 0 2 8 a 4 6 c e } | { 1 3 9 b 5 7 d f }.  */
+ 	emit_insn (gen_avx_shufps256 (t1, d->op0, d->op1,
+ 				      GEN_INT (mask)));
+ 
+ 	/* Shuffle the lanes around to produce:
+ 	   { 4 6 c e 0 2 8 a } and { 5 7 d f 1 3 9 b }.  */
+ 	emit_insn (gen_avx_vperm2f128v8sf3 (t2, t1, t1,
+ 					    GEN_INT (0x3)));
+ 
+ 	/* Shuffle within the 128-bit lanes to produce:
+ 	   { 0 2 4 6 4 6 0 2 } | { 1 3 5 7 5 7 1 3 }.  */
+ 	emit_insn (gen_avx_shufps256 (t3, t1, t2, GEN_INT (0x44)));
+ 
+ 	/* Shuffle within the 128-bit lanes to produce:
+ 	   { 8 a c e c e 8 a } | { 9 b d f d f 9 b }.  */
+ 	emit_insn (gen_avx_shufps256 (t2, t1, t2, GEN_INT (0xee)));
+ 
+ 	/* Shuffle the lanes around to produce:
+ 	   { 0 2 4 6 8 a c e } | { 1 3 5 7 9 b d f }.  */
+ 	emit_insn (gen_avx_vperm2f128v8sf3 (d->target, t3, t2,
+ 					    GEN_INT (0x20)));
+       }
+       break;
+ 
+     case E_V2DFmode:
+     case E_V4SFmode:
+     case E_V2DImode:
+     case E_V4SImode:
+       /* These are always directly implementable by expand_vec_perm_1.  */
+       gcc_unreachable ();
+ 
+     case E_V8HImode:
+       if (TARGET_SSE4_1)
+ 	return expand_vec_perm_even_odd_pack (d);
+       else if (TARGET_SSSE3 && !TARGET_SLOW_PSHUFB)
+ 	return expand_vec_perm_pshufb2 (d);
+       else
+ 	{
+ 	  if (d->testing_p)
+ 	    break;
+ 	  /* We need 2*log2(N)-1 operations to achieve odd/even
+ 	     with interleave. */
+ 	  t1 = gen_reg_rtx (V8HImode);
+ 	  t2 = gen_reg_rtx (V8HImode);
+ 	  emit_insn (gen_vec_interleave_highv8hi (t1, d->op0, d->op1));
+ 	  emit_insn (gen_vec_interleave_lowv8hi (d->target, d->op0, d->op1));
+ 	  emit_insn (gen_vec_interleave_highv8hi (t2, d->target, t1));
+ 	  emit_insn (gen_vec_interleave_lowv8hi (d->target, d->target, t1));
+ 	  if (odd)
+ 	    t3 = gen_vec_interleave_highv8hi (d->target, d->target, t2);
+ 	  else
+ 	    t3 = gen_vec_interleave_lowv8hi (d->target, d->target, t2);
+ 	  emit_insn (t3);
+ 	}
+       break;
+ 
+     case E_V16QImode:
+       return expand_vec_perm_even_odd_pack (d);
+ 
+     case E_V16HImode:
+     case E_V32QImode:
+       return expand_vec_perm_even_odd_pack (d);
+ 
+     case E_V64QImode:
+       return expand_vec_perm_even_odd_trunc (d);
+ 
+     case E_V4DImode:
+       if (!TARGET_AVX2)
+ 	{
+ 	  struct expand_vec_perm_d d_copy = *d;
+ 	  d_copy.vmode = V4DFmode;
+ 	  if (d->testing_p)
+ 	    d_copy.target = gen_raw_REG (V4DFmode, LAST_VIRTUAL_REGISTER + 1);
+ 	  else
+ 	    d_copy.target = gen_reg_rtx (V4DFmode);
+ 	  d_copy.op0 = gen_lowpart (V4DFmode, d->op0);
+ 	  d_copy.op1 = gen_lowpart (V4DFmode, d->op1);
+ 	  if (expand_vec_perm_even_odd_1 (&d_copy, odd))
+ 	    {
+ 	      if (!d->testing_p)
+ 		emit_move_insn (d->target,
+ 				gen_lowpart (V4DImode, d_copy.target));
+ 	      return true;
+ 	    }
+ 	  return false;
+ 	}
+ 
+       if (d->testing_p)
+ 	break;
+ 
+       t1 = gen_reg_rtx (V4DImode);
+       t2 = gen_reg_rtx (V4DImode);
+ 
+       /* Shuffle the lanes around into { 0 1 4 5 } and { 2 3 6 7 }.  */
+       emit_insn (gen_avx2_permv2ti (t1, d->op0, d->op1, GEN_INT (0x20)));
+       emit_insn (gen_avx2_permv2ti (t2, d->op0, d->op1, GEN_INT (0x31)));
+ 
+       /* Now an vpunpck[lh]qdq will produce the result required.  */
+       if (odd)
+ 	t3 = gen_avx2_interleave_highv4di (d->target, t1, t2);
+       else
+ 	t3 = gen_avx2_interleave_lowv4di (d->target, t1, t2);
+       emit_insn (t3);
+       break;
+ 
+     case E_V8SImode:
+       if (!TARGET_AVX2)
+ 	{
+ 	  struct expand_vec_perm_d d_copy = *d;
+ 	  d_copy.vmode = V8SFmode;
+ 	  if (d->testing_p)
+ 	    d_copy.target = gen_raw_REG (V8SFmode, LAST_VIRTUAL_REGISTER + 1);
+ 	  else
+ 	    d_copy.target = gen_reg_rtx (V8SFmode);
+ 	  d_copy.op0 = gen_lowpart (V8SFmode, d->op0);
+ 	  d_copy.op1 = gen_lowpart (V8SFmode, d->op1);
+ 	  if (expand_vec_perm_even_odd_1 (&d_copy, odd))
+ 	    {
+ 	      if (!d->testing_p)
+ 		emit_move_insn (d->target,
+ 				gen_lowpart (V8SImode, d_copy.target));
+ 	      return true;
+ 	    }
+ 	  return false;
+ 	}
+ 
+       if (d->testing_p)
+ 	break;
+ 
+       t1 = gen_reg_rtx (V8SImode);
+       t2 = gen_reg_rtx (V8SImode);
+       t3 = gen_reg_rtx (V4DImode);
+       t4 = gen_reg_rtx (V4DImode);
+       t5 = gen_reg_rtx (V4DImode);
+ 
+       /* Shuffle the lanes around into
+ 	 { 0 1 2 3 8 9 a b } and { 4 5 6 7 c d e f }.  */
+       emit_insn (gen_avx2_permv2ti (t3, gen_lowpart (V4DImode, d->op0),
+ 				    gen_lowpart (V4DImode, d->op1),
+ 				    GEN_INT (0x20)));
+       emit_insn (gen_avx2_permv2ti (t4, gen_lowpart (V4DImode, d->op0),
+ 				    gen_lowpart (V4DImode, d->op1),
+ 				    GEN_INT (0x31)));
+ 
+       /* Swap the 2nd and 3rd position in each lane into
+ 	 { 0 2 1 3 8 a 9 b } and { 4 6 5 7 c e d f }.  */
+       emit_insn (gen_avx2_pshufdv3 (t1, gen_lowpart (V8SImode, t3),
+ 				    GEN_INT (2 * 4 + 1 * 16 + 3 * 64)));
+       emit_insn (gen_avx2_pshufdv3 (t2, gen_lowpart (V8SImode, t4),
+ 				    GEN_INT (2 * 4 + 1 * 16 + 3 * 64)));
+ 
+       /* Now an vpunpck[lh]qdq will produce
+ 	 { 0 2 4 6 8 a c e } resp. { 1 3 5 7 9 b d f }.  */
+       if (odd)
+ 	t3 = gen_avx2_interleave_highv4di (t5, gen_lowpart (V4DImode, t1),
+ 					   gen_lowpart (V4DImode, t2));
+       else
+ 	t3 = gen_avx2_interleave_lowv4di (t5, gen_lowpart (V4DImode, t1),
+ 					  gen_lowpart (V4DImode, t2));
+       emit_insn (t3);
+       emit_move_insn (d->target, gen_lowpart (V8SImode, t5));
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   return true;
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Pattern match
+    extract-even and extract-odd permutations.  */
+ 
+ static bool
+ expand_vec_perm_even_odd (struct expand_vec_perm_d *d)
+ {
+   unsigned i, odd, nelt = d->nelt;
+ 
+   odd = d->perm[0];
+   if (odd != 0 && odd != 1)
+     return false;
+ 
+   for (i = 1; i < nelt; ++i)
+     if (d->perm[i] != 2 * i + odd)
+       return false;
+ 
+   return expand_vec_perm_even_odd_1 (d, odd);
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Implement broadcast
+    permutations.  We assume that expand_vec_perm_1 has already failed.  */
+ 
+ static bool
+ expand_vec_perm_broadcast_1 (struct expand_vec_perm_d *d)
+ {
+   unsigned elt = d->perm[0], nelt2 = d->nelt / 2;
+   machine_mode vmode = d->vmode;
+   unsigned char perm2[4];
+   rtx op0 = d->op0, dest;
+   bool ok;
+ 
+   switch (vmode)
+     {
+     case E_V4DFmode:
+     case E_V8SFmode:
+       /* These are special-cased in sse.md so that we can optionally
+ 	 use the vbroadcast instruction.  They expand to two insns
+ 	 if the input happens to be in a register.  */
+       gcc_unreachable ();
+ 
+     case E_V2DFmode:
+     case E_V2DImode:
+     case E_V4SFmode:
+     case E_V4SImode:
+       /* These are always implementable using standard shuffle patterns.  */
+       gcc_unreachable ();
+ 
+     case E_V8HImode:
+     case E_V16QImode:
+       /* These can be implemented via interleave.  We save one insn by
+ 	 stopping once we have promoted to V4SImode and then use pshufd.  */
+       if (d->testing_p)
+ 	return true;
+       do
+ 	{
+ 	  rtx dest;
+ 	  rtx (*gen) (rtx, rtx, rtx)
+ 	    = vmode == V16QImode ? gen_vec_interleave_lowv16qi
+ 				 : gen_vec_interleave_lowv8hi;
+ 
+ 	  if (elt >= nelt2)
+ 	    {
+ 	      gen = vmode == V16QImode ? gen_vec_interleave_highv16qi
+ 				       : gen_vec_interleave_highv8hi;
+ 	      elt -= nelt2;
+ 	    }
+ 	  nelt2 /= 2;
+ 
+ 	  dest = gen_reg_rtx (vmode);
+ 	  emit_insn (gen (dest, op0, op0));
+ 	  vmode = get_mode_wider_vector (vmode);
+ 	  op0 = gen_lowpart (vmode, dest);
+ 	}
+       while (vmode != V4SImode);
+ 
+       memset (perm2, elt, 4);
+       dest = gen_reg_rtx (V4SImode);
+       ok = expand_vselect (dest, op0, perm2, 4, d->testing_p);
+       gcc_assert (ok);
+       if (!d->testing_p)
+ 	emit_move_insn (d->target, gen_lowpart (d->vmode, dest));
+       return true;
+ 
+     case E_V64QImode:
+     case E_V32QImode:
+     case E_V16HImode:
+     case E_V8SImode:
+     case E_V4DImode:
+       /* For AVX2 broadcasts of the first element vpbroadcast* or
+ 	 vpermq should be used by expand_vec_perm_1.  */
+       gcc_assert (!TARGET_AVX2 || d->perm[0]);
+       return false;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ }
+ 
+ /* A subroutine of ix86_expand_vec_perm_const_1.  Pattern match
+    broadcast permutations.  */
+ 
+ static bool
+ expand_vec_perm_broadcast (struct expand_vec_perm_d *d)
+ {
+   unsigned i, elt, nelt = d->nelt;
+ 
+   if (!d->one_operand_p)
+     return false;
+ 
+   elt = d->perm[0];
+   for (i = 1; i < nelt; ++i)
+     if (d->perm[i] != elt)
+       return false;
+ 
+   return expand_vec_perm_broadcast_1 (d);
+ }
+ 
+ /* Implement arbitrary permutations of two V64QImode operands
+    with 2 vperm[it]2w, 2 vpshufb and one vpor instruction.  */
+ static bool
+ expand_vec_perm_vpermt2_vpshub2 (struct expand_vec_perm_d *d)
+ {
+   if (!TARGET_AVX512BW || !(d->vmode == V64QImode))
+     return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+   struct expand_vec_perm_d ds[2];
+   rtx rperm[128], vperm, target0, target1;
+   unsigned int i, nelt;
+   machine_mode vmode;
+ 
+   nelt = d->nelt;
+   vmode = V64QImode;
+ 
+   for (i = 0; i < 2; i++)
+     {
+       ds[i] = *d;
+       ds[i].vmode = V32HImode;
+       ds[i].nelt = 32;
+       ds[i].target = gen_reg_rtx (V32HImode);
+       ds[i].op0 = gen_lowpart (V32HImode, d->op0);
+       ds[i].op1 = gen_lowpart (V32HImode, d->op1);
+     }
+ 
+   /* Prepare permutations such that the first one takes care of
+      putting the even bytes into the right positions or one higher
+      positions (ds[0]) and the second one takes care of
+      putting the odd bytes into the right positions or one below
+      (ds[1]).  */
+ 
+   for (i = 0; i < nelt; i++)
+     {
+       ds[i & 1].perm[i / 2] = d->perm[i] / 2;
+       if (i & 1)
+ 	{
+ 	  rperm[i] = constm1_rtx;
+ 	  rperm[i + 64] = GEN_INT ((i & 14) + (d->perm[i] & 1));
+ 	}
+       else
+ 	{
+ 	  rperm[i] = GEN_INT ((i & 14) + (d->perm[i] & 1));
+ 	  rperm[i + 64] = constm1_rtx;
+ 	}
+     }
+ 
+   bool ok = expand_vec_perm_1 (&ds[0]);
+   gcc_assert (ok);
+   ds[0].target = gen_lowpart (V64QImode, ds[0].target);
+ 
+   ok = expand_vec_perm_1 (&ds[1]);
+   gcc_assert (ok);
+   ds[1].target = gen_lowpart (V64QImode, ds[1].target);
+ 
+   vperm = gen_rtx_CONST_VECTOR (V64QImode, gen_rtvec_v (64, rperm));
+   vperm = force_reg (vmode, vperm);
+   target0 = gen_reg_rtx (V64QImode);
+   emit_insn (gen_avx512bw_pshufbv64qi3 (target0, ds[0].target, vperm));
+ 
+   vperm = gen_rtx_CONST_VECTOR (V64QImode, gen_rtvec_v (64, rperm + 64));
+   vperm = force_reg (vmode, vperm);
+   target1 = gen_reg_rtx (V64QImode);
+   emit_insn (gen_avx512bw_pshufbv64qi3 (target1, ds[1].target, vperm));
+ 
+   emit_insn (gen_iorv64qi3 (d->target, target0, target1));
+   return true;
+ }
+ 
+ /* Implement arbitrary permutation of two V32QImode and V16QImode operands
+    with 4 vpshufb insns, 2 vpermq and 3 vpor.  We should have already failed
+    all the shorter instruction sequences.  */
+ 
+ static bool
+ expand_vec_perm_vpshufb4_vpermq2 (struct expand_vec_perm_d *d)
+ {
+   rtx rperm[4][32], vperm, l[2], h[2], op, m128;
+   unsigned int i, nelt, eltsz;
+   bool used[4];
+ 
+   if (!TARGET_AVX2
+       || d->one_operand_p
+       || (d->vmode != V32QImode && d->vmode != V16HImode))
+     return false;
+ 
+   if (d->testing_p)
+     return true;
+ 
+   nelt = d->nelt;
+   eltsz = GET_MODE_UNIT_SIZE (d->vmode);
+ 
+   /* Generate 4 permutation masks.  If the required element is within
+      the same lane, it is shuffled in.  If the required element from the
+      other lane, force a zero by setting bit 7 in the permutation mask.
+      In the other mask the mask has non-negative elements if element
+      is requested from the other lane, but also moved to the other lane,
+      so that the result of vpshufb can have the two V2TImode halves
+      swapped.  */
+   m128 = GEN_INT (-128);
+   for (i = 0; i < 32; ++i)
+     {
+       rperm[0][i] = m128;
+       rperm[1][i] = m128;
+       rperm[2][i] = m128;
+       rperm[3][i] = m128;
+     }
+   used[0] = false;
+   used[1] = false;
+   used[2] = false;
+   used[3] = false;
+   for (i = 0; i < nelt; ++i)
+     {
+       unsigned j, e = d->perm[i] & (nelt / 2 - 1);
+       unsigned xlane = ((d->perm[i] ^ i) & (nelt / 2)) * eltsz;
+       unsigned int which = ((d->perm[i] & nelt) ? 2 : 0) + (xlane ? 1 : 0);
+ 
+       for (j = 0; j < eltsz; ++j)
+ 	rperm[which][(i * eltsz + j) ^ xlane] = GEN_INT (e * eltsz + j);
+       used[which] = true;
+     }
+ 
+   for (i = 0; i < 2; ++i)
+     {
+       if (!used[2 * i + 1])
+ 	{
+ 	  h[i] = NULL_RTX;
+ 	  continue;
+ 	}
+       vperm = gen_rtx_CONST_VECTOR (V32QImode,
+ 				    gen_rtvec_v (32, rperm[2 * i + 1]));
+       vperm = force_reg (V32QImode, vperm);
+       h[i] = gen_reg_rtx (V32QImode);
+       op = gen_lowpart (V32QImode, i ? d->op1 : d->op0);
+       emit_insn (gen_avx2_pshufbv32qi3 (h[i], op, vperm));
+     }
+ 
+   /* Swap the 128-byte lanes of h[X].  */
+   for (i = 0; i < 2; ++i)
+    {
+      if (h[i] == NULL_RTX)
+        continue;
+      op = gen_reg_rtx (V4DImode);
+      emit_insn (gen_avx2_permv4di_1 (op, gen_lowpart (V4DImode, h[i]),
+ 				     const2_rtx, GEN_INT (3), const0_rtx,
+ 				     const1_rtx));
+      h[i] = gen_lowpart (V32QImode, op);
+    }
+ 
+   for (i = 0; i < 2; ++i)
+     {
+       if (!used[2 * i])
+ 	{
+ 	  l[i] = NULL_RTX;
+ 	  continue;
+ 	}
+       vperm = gen_rtx_CONST_VECTOR (V32QImode, gen_rtvec_v (32, rperm[2 * i]));
+       vperm = force_reg (V32QImode, vperm);
+       l[i] = gen_reg_rtx (V32QImode);
+       op = gen_lowpart (V32QImode, i ? d->op1 : d->op0);
+       emit_insn (gen_avx2_pshufbv32qi3 (l[i], op, vperm));
+     }
+ 
+   for (i = 0; i < 2; ++i)
+     {
+       if (h[i] && l[i])
+ 	{
+ 	  op = gen_reg_rtx (V32QImode);
+ 	  emit_insn (gen_iorv32qi3 (op, l[i], h[i]));
+ 	  l[i] = op;
+ 	}
+       else if (h[i])
+ 	l[i] = h[i];
+     }
+ 
+   gcc_assert (l[0] && l[1]);
+   op = d->target;
+   if (d->vmode != V32QImode)
+     op = gen_reg_rtx (V32QImode);
+   emit_insn (gen_iorv32qi3 (op, l[0], l[1]));
+   if (op != d->target)
+     emit_move_insn (d->target, gen_lowpart (d->vmode, op));
+   return true;
+ }
+ 
+ /* The guts of ix86_vectorize_vec_perm_const.  With all of the interface bits
+    taken care of, perform the expansion in D and return true on success.  */
+ 
+ static bool
+ ix86_expand_vec_perm_const_1 (struct expand_vec_perm_d *d)
+ {
+   /* Try a single instruction expansion.  */
+   if (expand_vec_perm_1 (d))
+     return true;
+ 
+   /* Try sequences of two instructions.  */
+ 
+   if (expand_vec_perm_pshuflw_pshufhw (d))
+     return true;
+ 
+   if (expand_vec_perm_palignr (d, false))
+     return true;
+ 
+   if (expand_vec_perm_interleave2 (d))
+     return true;
+ 
+   if (expand_vec_perm_broadcast (d))
+     return true;
+ 
+   if (expand_vec_perm_vpermq_perm_1 (d))
+     return true;
+ 
+   if (expand_vec_perm_vperm2f128 (d))
+     return true;
+ 
+   if (expand_vec_perm_pblendv (d))
+     return true;
+ 
+   /* Try sequences of three instructions.  */
+ 
+   if (expand_vec_perm_even_odd_pack (d))
+     return true;
+ 
+   if (expand_vec_perm_2vperm2f128_vshuf (d))
+     return true;
+ 
+   if (expand_vec_perm_pshufb2 (d))
+     return true;
+ 
+   if (expand_vec_perm_interleave3 (d))
+     return true;
+ 
+   if (expand_vec_perm_vperm2f128_vblend (d))
+     return true;
+ 
+   /* Try sequences of four instructions.  */
+ 
+   if (expand_vec_perm_even_odd_trunc (d))
+     return true;
+   if (expand_vec_perm_vpshufb2_vpermq (d))
+     return true;
+ 
+   if (expand_vec_perm_vpshufb2_vpermq_even_odd (d))
+     return true;
+ 
+   if (expand_vec_perm_vpermt2_vpshub2 (d))
+     return true;
+ 
+   /* ??? Look for narrow permutations whose element orderings would
+      allow the promotion to a wider mode.  */
+ 
+   /* ??? Look for sequences of interleave or a wider permute that place
+      the data into the correct lanes for a half-vector shuffle like
+      pshuf[lh]w or vpermilps.  */
+ 
+   /* ??? Look for sequences of interleave that produce the desired results.
+      The combinatorics of punpck[lh] get pretty ugly... */
+ 
+   if (expand_vec_perm_even_odd (d))
+     return true;
+ 
+   /* Even longer sequences.  */
+   if (expand_vec_perm_vpshufb4_vpermq2 (d))
+     return true;
+ 
+   /* See if we can get the same permutation in different vector integer
+      mode.  */
+   struct expand_vec_perm_d nd;
+   if (canonicalize_vector_int_perm (d, &nd) && expand_vec_perm_1 (&nd))
+     {
+       if (!d->testing_p)
+ 	emit_move_insn (d->target, gen_lowpart (d->vmode, nd.target));
+       return true;
+     }
+ 
+   /* Even longer, including recursion to ix86_expand_vec_perm_const_1.  */
+   if (expand_vec_perm2_vperm2f128_vblend (d))
+     return true;
+ 
+   return false;
+ }
+ 
+ /* If a permutation only uses one operand, make it clear. Returns true
+    if the permutation references both operands.  */
+ 
+ static bool
+ canonicalize_perm (struct expand_vec_perm_d *d)
+ {
+   int i, which, nelt = d->nelt;
+ 
+   for (i = which = 0; i < nelt; ++i)
+     which |= (d->perm[i] < nelt ? 1 : 2);
+ 
+   d->one_operand_p = true;
+   switch (which)
+     {
+     default:
+       gcc_unreachable();
+ 
+     case 3:
+       if (!rtx_equal_p (d->op0, d->op1))
+         {
+ 	  d->one_operand_p = false;
+ 	  break;
+         }
+       /* The elements of PERM do not suggest that only the first operand
+ 	 is used, but both operands are identical.  Allow easier matching
+ 	 of the permutation by folding the permutation into the single
+ 	 input vector.  */
+       /* FALLTHRU */
+ 
+     case 2:
+       for (i = 0; i < nelt; ++i)
+         d->perm[i] &= nelt - 1;
+       d->op0 = d->op1;
+       break;
+ 
+     case 1:
+       d->op1 = d->op0;
+       break;
+     }
+ 
+   return (which == 3);
+ }
+ 
+ /* Implement TARGET_VECTORIZE_VEC_PERM_CONST.  */
+ 
+ bool
+ ix86_vectorize_vec_perm_const (machine_mode vmode, rtx target, rtx op0,
+ 			       rtx op1, const vec_perm_indices &sel)
+ {
+   struct expand_vec_perm_d d;
+   unsigned char perm[MAX_VECT_LEN];
+   unsigned int i, nelt, which;
+   bool two_args;
+ 
+   d.target = target;
+   d.op0 = op0;
+   d.op1 = op1;
+ 
+   d.vmode = vmode;
+   gcc_assert (VECTOR_MODE_P (d.vmode));
+   d.nelt = nelt = GET_MODE_NUNITS (d.vmode);
+   d.testing_p = !target;
+ 
+   gcc_assert (sel.length () == nelt);
+   gcc_checking_assert (sizeof (d.perm) == sizeof (perm));
+ 
+   /* Given sufficient ISA support we can just return true here
+      for selected vector modes.  */
+   switch (d.vmode)
+     {
+     case E_V16SFmode:
+     case E_V16SImode:
+     case E_V8DImode:
+     case E_V8DFmode:
+       if (!TARGET_AVX512F)
+ 	return false;
+       /* All implementable with a single vperm[it]2 insn.  */
+       if (d.testing_p)
+ 	return true;
+       break;
+     case E_V32HImode:
+       if (!TARGET_AVX512BW)
+ 	return false;
+       if (d.testing_p)
+ 	/* All implementable with a single vperm[it]2 insn.  */
+ 	return true;
+       break;
+     case E_V64QImode:
+       if (!TARGET_AVX512BW)
+ 	return false;
+       if (d.testing_p)
+ 	/* Implementable with 2 vperm[it]2, 2 vpshufb and 1 or insn.  */
+ 	return true;
+       break;
+     case E_V8SImode:
+     case E_V8SFmode:
+     case E_V4DFmode:
+     case E_V4DImode:
+       if (!TARGET_AVX)
+ 	return false;
+       if (d.testing_p && TARGET_AVX512VL)
+ 	/* All implementable with a single vperm[it]2 insn.  */
+ 	return true;
+       break;
+     case E_V16HImode:
+       if (!TARGET_SSE2)
+ 	return false;
+       if (d.testing_p && TARGET_AVX2)
+ 	/* Implementable with 4 vpshufb insns, 2 vpermq and 3 vpor insns.  */
+ 	return true;
+       break;
+     case E_V32QImode:
+       if (!TARGET_SSE2)
+ 	return false;
+       if (d.testing_p && TARGET_AVX2)
+ 	/* Implementable with 4 vpshufb insns, 2 vpermq and 3 vpor insns.  */
+ 	return true;
+       break;
+     case E_V8HImode:
+     case E_V16QImode:
+       if (!TARGET_SSE2)
+ 	return false;
+       /* Fall through.  */
+     case E_V4SImode:
+     case E_V4SFmode:
+       if (!TARGET_SSE)
+ 	return false;
+       /* All implementable with a single vpperm insn.  */
+       if (d.testing_p && TARGET_XOP)
+ 	return true;
+       /* All implementable with 2 pshufb + 1 ior.  */
+       if (d.testing_p && TARGET_SSSE3)
+ 	return true;
+       break;
+     case E_V2DImode:
+     case E_V2DFmode:
+       if (!TARGET_SSE)
+ 	return false;
+       /* All implementable with shufpd or unpck[lh]pd.  */
+       if (d.testing_p)
+ 	return true;
+       break;
+     default:
+       return false;
+     }
+ 
+   for (i = which = 0; i < nelt; ++i)
+     {
+       unsigned char e = sel[i];
+       gcc_assert (e < 2 * nelt);
+       d.perm[i] = e;
+       perm[i] = e;
+       which |= (e < nelt ? 1 : 2);
+     }
+ 
+   if (d.testing_p)
+     {
+       /* For all elements from second vector, fold the elements to first.  */
+       if (which == 2)
+ 	for (i = 0; i < nelt; ++i)
+ 	  d.perm[i] -= nelt;
+ 
+       /* Check whether the mask can be applied to the vector type.  */
+       d.one_operand_p = (which != 3);
+ 
+       /* Implementable with shufps or pshufd.  */
+       if (d.one_operand_p && (d.vmode == V4SFmode || d.vmode == V4SImode))
+ 	return true;
+ 
+       /* Otherwise we have to go through the motions and see if we can
+ 	 figure out how to generate the requested permutation.  */
+       d.target = gen_raw_REG (d.vmode, LAST_VIRTUAL_REGISTER + 1);
+       d.op1 = d.op0 = gen_raw_REG (d.vmode, LAST_VIRTUAL_REGISTER + 2);
+       if (!d.one_operand_p)
+ 	d.op1 = gen_raw_REG (d.vmode, LAST_VIRTUAL_REGISTER + 3);
+ 
+       start_sequence ();
+       bool ret = ix86_expand_vec_perm_const_1 (&d);
+       end_sequence ();
+ 
+       return ret;
+     }
+ 
+   two_args = canonicalize_perm (&d);
+ 
+   if (ix86_expand_vec_perm_const_1 (&d))
+     return true;
+ 
+   /* If the selector says both arguments are needed, but the operands are the
+      same, the above tried to expand with one_operand_p and flattened selector.
+      If that didn't work, retry without one_operand_p; we succeeded with that
+      during testing.  */
+   if (two_args && d.one_operand_p)
+     {
+       d.one_operand_p = false;
+       memcpy (d.perm, perm, sizeof (perm));
+       return ix86_expand_vec_perm_const_1 (&d);
+     }
+ 
+   return false;
+ }
+ 
+ void
+ ix86_expand_vec_extract_even_odd (rtx targ, rtx op0, rtx op1, unsigned odd)
+ {
+   struct expand_vec_perm_d d;
+   unsigned i, nelt;
+ 
+   d.target = targ;
+   d.op0 = op0;
+   d.op1 = op1;
+   d.vmode = GET_MODE (targ);
+   d.nelt = nelt = GET_MODE_NUNITS (d.vmode);
+   d.one_operand_p = false;
+   d.testing_p = false;
+ 
+   for (i = 0; i < nelt; ++i)
+     d.perm[i] = i * 2 + odd;
+ 
+   /* We'll either be able to implement the permutation directly...  */
+   if (expand_vec_perm_1 (&d))
+     return;
+ 
+   /* ... or we use the special-case patterns.  */
+   expand_vec_perm_even_odd_1 (&d, odd);
+ }
+ 
+ static void
+ ix86_expand_vec_interleave (rtx targ, rtx op0, rtx op1, bool high_p)
+ {
+   struct expand_vec_perm_d d;
+   unsigned i, nelt, base;
+   bool ok;
+ 
+   d.target = targ;
+   d.op0 = op0;
+   d.op1 = op1;
+   d.vmode = GET_MODE (targ);
+   d.nelt = nelt = GET_MODE_NUNITS (d.vmode);
+   d.one_operand_p = false;
+   d.testing_p = false;
+ 
+   base = high_p ? nelt / 2 : 0;
+   for (i = 0; i < nelt / 2; ++i)
+     {
+       d.perm[i * 2] = i + base;
+       d.perm[i * 2 + 1] = i + base + nelt;
+     }
+ 
+   /* Note that for AVX this isn't one instruction.  */
+   ok = ix86_expand_vec_perm_const_1 (&d);
+   gcc_assert (ok);
+ }
+ 
+ 
+ /* Expand a vector operation CODE for a V*QImode in terms of the
+    same operation on V*HImode.  */
+ 
+ void
+ ix86_expand_vecop_qihi (enum rtx_code code, rtx dest, rtx op1, rtx op2)
+ {
+   machine_mode qimode = GET_MODE (dest);
+   machine_mode himode;
+   rtx (*gen_il) (rtx, rtx, rtx);
+   rtx (*gen_ih) (rtx, rtx, rtx);
+   rtx op1_l, op1_h, op2_l, op2_h, res_l, res_h;
+   struct expand_vec_perm_d d;
+   bool ok, full_interleave;
+   bool uns_p = false;
+   int i;
+ 
+   switch (qimode)
+     {
+     case E_V16QImode:
+       himode = V8HImode;
+       gen_il = gen_vec_interleave_lowv16qi;
+       gen_ih = gen_vec_interleave_highv16qi;
+       break;
+     case E_V32QImode:
+       himode = V16HImode;
+       gen_il = gen_avx2_interleave_lowv32qi;
+       gen_ih = gen_avx2_interleave_highv32qi;
+       break;
+     case E_V64QImode:
+       himode = V32HImode;
+       gen_il = gen_avx512bw_interleave_lowv64qi;
+       gen_ih = gen_avx512bw_interleave_highv64qi;
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   op2_l = op2_h = op2;
+   switch (code)
+     {
+     case MULT:
+       /* Unpack data such that we've got a source byte in each low byte of
+ 	 each word.  We don't care what goes into the high byte of each word.
+ 	 Rather than trying to get zero in there, most convenient is to let
+ 	 it be a copy of the low byte.  */
+       op2_l = gen_reg_rtx (qimode);
+       op2_h = gen_reg_rtx (qimode);
+       emit_insn (gen_il (op2_l, op2, op2));
+       emit_insn (gen_ih (op2_h, op2, op2));
+ 
+       op1_l = gen_reg_rtx (qimode);
+       op1_h = gen_reg_rtx (qimode);
+       emit_insn (gen_il (op1_l, op1, op1));
+       emit_insn (gen_ih (op1_h, op1, op1));
+       full_interleave = qimode == V16QImode;
+       break;
+ 
+     case ASHIFT:
+     case LSHIFTRT:
+       uns_p = true;
+       /* FALLTHRU */
+     case ASHIFTRT:
+       op1_l = gen_reg_rtx (himode);
+       op1_h = gen_reg_rtx (himode);
+       ix86_expand_sse_unpack (op1_l, op1, uns_p, false);
+       ix86_expand_sse_unpack (op1_h, op1, uns_p, true);
+       full_interleave = true;
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   /* Perform the operation.  */
+   res_l = expand_simple_binop (himode, code, op1_l, op2_l, NULL_RTX,
+ 			       1, OPTAB_DIRECT);
+   res_h = expand_simple_binop (himode, code, op1_h, op2_h, NULL_RTX,
+ 			       1, OPTAB_DIRECT);
+   gcc_assert (res_l && res_h);
+ 
+   /* Merge the data back into the right place.  */
+   d.target = dest;
+   d.op0 = gen_lowpart (qimode, res_l);
+   d.op1 = gen_lowpart (qimode, res_h);
+   d.vmode = qimode;
+   d.nelt = GET_MODE_NUNITS (qimode);
+   d.one_operand_p = false;
+   d.testing_p = false;
+ 
+   if (full_interleave)
+     {
+       /* For SSE2, we used an full interleave, so the desired
+ 	 results are in the even elements.  */
+       for (i = 0; i < d.nelt; ++i)
+ 	d.perm[i] = i * 2;
+     }
+   else
+     {
+       /* For AVX, the interleave used above was not cross-lane.  So the
+ 	 extraction is evens but with the second and third quarter swapped.
+ 	 Happily, that is even one insn shorter than even extraction.
+ 	 For AVX512BW we have 4 lanes.  We extract evens from within a lane,
+ 	 always first from the first and then from the second source operand,
+ 	 the index bits above the low 4 bits remains the same.
+ 	 Thus, for d.nelt == 32 we want permutation
+ 	 0,2,4,..14, 32,34,36,..46, 16,18,20,..30, 48,50,52,..62
+ 	 and for d.nelt == 64 we want permutation
+ 	 0,2,4,..14, 64,66,68,..78, 16,18,20,..30, 80,82,84,..94,
+ 	 32,34,36,..46, 96,98,100,..110, 48,50,52,..62, 112,114,116,..126.  */
+       for (i = 0; i < d.nelt; ++i)
+ 	d.perm[i] = ((i * 2) & 14) + ((i & 8) ? d.nelt : 0) + (i & ~15);
+     }
+ 
+   ok = ix86_expand_vec_perm_const_1 (&d);
+   gcc_assert (ok);
+ 
+   set_unique_reg_note (get_last_insn (), REG_EQUAL,
+ 		       gen_rtx_fmt_ee (code, qimode, op1, op2));
+ }
+ 
+ /* Helper function of ix86_expand_mul_widen_evenodd.  Return true
+    if op is CONST_VECTOR with all odd elements equal to their
+    preceding element.  */
+ 
+ static bool
+ const_vector_equal_evenodd_p (rtx op)
+ {
+   machine_mode mode = GET_MODE (op);
+   int i, nunits = GET_MODE_NUNITS (mode);
+   if (GET_CODE (op) != CONST_VECTOR
+       || nunits != CONST_VECTOR_NUNITS (op))
+     return false;
+   for (i = 0; i < nunits; i += 2)
+     if (CONST_VECTOR_ELT (op, i) != CONST_VECTOR_ELT (op, i + 1))
+       return false;
+   return true;
+ }
+ 
+ void
+ ix86_expand_mul_widen_evenodd (rtx dest, rtx op1, rtx op2,
+ 			       bool uns_p, bool odd_p)
+ {
+   machine_mode mode = GET_MODE (op1);
+   machine_mode wmode = GET_MODE (dest);
+   rtx x;
+   rtx orig_op1 = op1, orig_op2 = op2;
+ 
+   if (!nonimmediate_operand (op1, mode))
+     op1 = force_reg (mode, op1);
+   if (!nonimmediate_operand (op2, mode))
+     op2 = force_reg (mode, op2);
+ 
+   /* We only play even/odd games with vectors of SImode.  */
+   gcc_assert (mode == V4SImode || mode == V8SImode || mode == V16SImode);
+ 
+   /* If we're looking for the odd results, shift those members down to
+      the even slots.  For some cpus this is faster than a PSHUFD.  */
+   if (odd_p)
+     {
+       /* For XOP use vpmacsdqh, but only for smult, as it is only
+ 	 signed.  */
+       if (TARGET_XOP && mode == V4SImode && !uns_p)
+ 	{
+ 	  x = force_reg (wmode, CONST0_RTX (wmode));
+ 	  emit_insn (gen_xop_pmacsdqh (dest, op1, op2, x));
+ 	  return;
+ 	}
+ 
+       x = GEN_INT (GET_MODE_UNIT_BITSIZE (mode));
+       if (!const_vector_equal_evenodd_p (orig_op1))
+ 	op1 = expand_binop (wmode, lshr_optab, gen_lowpart (wmode, op1),
+ 			    x, NULL, 1, OPTAB_DIRECT);
+       if (!const_vector_equal_evenodd_p (orig_op2))
+ 	op2 = expand_binop (wmode, lshr_optab, gen_lowpart (wmode, op2),
+ 			    x, NULL, 1, OPTAB_DIRECT);
+       op1 = gen_lowpart (mode, op1);
+       op2 = gen_lowpart (mode, op2);
+     }
+ 
+   if (mode == V16SImode)
+     {
+       if (uns_p)
+ 	x = gen_vec_widen_umult_even_v16si (dest, op1, op2);
+       else
+ 	x = gen_vec_widen_smult_even_v16si (dest, op1, op2);
+     }
+   else if (mode == V8SImode)
+     {
+       if (uns_p)
+ 	x = gen_vec_widen_umult_even_v8si (dest, op1, op2);
+       else
+ 	x = gen_vec_widen_smult_even_v8si (dest, op1, op2);
+     }
+   else if (uns_p)
+     x = gen_vec_widen_umult_even_v4si (dest, op1, op2);
+   else if (TARGET_SSE4_1)
+     x = gen_sse4_1_mulv2siv2di3 (dest, op1, op2);
+   else
+     {
+       rtx s1, s2, t0, t1, t2;
+ 
+       /* The easiest way to implement this without PMULDQ is to go through
+ 	 the motions as if we are performing a full 64-bit multiply.  With
+ 	 the exception that we need to do less shuffling of the elements.  */
+ 
+       /* Compute the sign-extension, aka highparts, of the two operands.  */
+       s1 = ix86_expand_sse_cmp (gen_reg_rtx (mode), GT, CONST0_RTX (mode),
+ 				op1, pc_rtx, pc_rtx);
+       s2 = ix86_expand_sse_cmp (gen_reg_rtx (mode), GT, CONST0_RTX (mode),
+ 				op2, pc_rtx, pc_rtx);
+ 
+       /* Multiply LO(A) * HI(B), and vice-versa.  */
+       t1 = gen_reg_rtx (wmode);
+       t2 = gen_reg_rtx (wmode);
+       emit_insn (gen_vec_widen_umult_even_v4si (t1, s1, op2));
+       emit_insn (gen_vec_widen_umult_even_v4si (t2, s2, op1));
+ 
+       /* Multiply LO(A) * LO(B).  */
+       t0 = gen_reg_rtx (wmode);
+       emit_insn (gen_vec_widen_umult_even_v4si (t0, op1, op2));
+ 
+       /* Combine and shift the highparts into place.  */
+       t1 = expand_binop (wmode, add_optab, t1, t2, t1, 1, OPTAB_DIRECT);
+       t1 = expand_binop (wmode, ashl_optab, t1, GEN_INT (32), t1,
+ 			 1, OPTAB_DIRECT);
+ 
+       /* Combine high and low parts.  */
+       force_expand_binop (wmode, add_optab, t0, t1, dest, 1, OPTAB_DIRECT);
+       return;
+     }
+   emit_insn (x);
+ }
+ 
+ void
+ ix86_expand_mul_widen_hilo (rtx dest, rtx op1, rtx op2,
+ 			    bool uns_p, bool high_p)
+ {
+   machine_mode wmode = GET_MODE (dest);
+   machine_mode mode = GET_MODE (op1);
+   rtx t1, t2, t3, t4, mask;
+ 
+   switch (mode)
+     {
+     case E_V4SImode:
+       t1 = gen_reg_rtx (mode);
+       t2 = gen_reg_rtx (mode);
+       if (TARGET_XOP && !uns_p)
+ 	{
+ 	  /* With XOP, we have pmacsdqh, aka mul_widen_odd.  In this case,
+ 	     shuffle the elements once so that all elements are in the right
+ 	     place for immediate use: { A C B D }.  */
+ 	  emit_insn (gen_sse2_pshufd_1 (t1, op1, const0_rtx, const2_rtx,
+ 					const1_rtx, GEN_INT (3)));
+ 	  emit_insn (gen_sse2_pshufd_1 (t2, op2, const0_rtx, const2_rtx,
+ 					const1_rtx, GEN_INT (3)));
+ 	}
+       else
+ 	{
+ 	  /* Put the elements into place for the multiply.  */
+ 	  ix86_expand_vec_interleave (t1, op1, op1, high_p);
+ 	  ix86_expand_vec_interleave (t2, op2, op2, high_p);
+ 	  high_p = false;
+ 	}
+       ix86_expand_mul_widen_evenodd (dest, t1, t2, uns_p, high_p);
+       break;
+ 
+     case E_V8SImode:
+       /* Shuffle the elements between the lanes.  After this we
+ 	 have { A B E F | C D G H } for each operand.  */
+       t1 = gen_reg_rtx (V4DImode);
+       t2 = gen_reg_rtx (V4DImode);
+       emit_insn (gen_avx2_permv4di_1 (t1, gen_lowpart (V4DImode, op1),
+ 				      const0_rtx, const2_rtx,
+ 				      const1_rtx, GEN_INT (3)));
+       emit_insn (gen_avx2_permv4di_1 (t2, gen_lowpart (V4DImode, op2),
+ 				      const0_rtx, const2_rtx,
+ 				      const1_rtx, GEN_INT (3)));
+ 
+       /* Shuffle the elements within the lanes.  After this we
+ 	 have { A A B B | C C D D } or { E E F F | G G H H }.  */
+       t3 = gen_reg_rtx (V8SImode);
+       t4 = gen_reg_rtx (V8SImode);
+       mask = GEN_INT (high_p
+ 		      ? 2 + (2 << 2) + (3 << 4) + (3 << 6)
+ 		      : 0 + (0 << 2) + (1 << 4) + (1 << 6));
+       emit_insn (gen_avx2_pshufdv3 (t3, gen_lowpart (V8SImode, t1), mask));
+       emit_insn (gen_avx2_pshufdv3 (t4, gen_lowpart (V8SImode, t2), mask));
+ 
+       ix86_expand_mul_widen_evenodd (dest, t3, t4, uns_p, false);
+       break;
+ 
+     case E_V8HImode:
+     case E_V16HImode:
+       t1 = expand_binop (mode, smul_optab, op1, op2, NULL_RTX,
+ 			 uns_p, OPTAB_DIRECT);
+       t2 = expand_binop (mode,
+ 			 uns_p ? umul_highpart_optab : smul_highpart_optab,
+ 			 op1, op2, NULL_RTX, uns_p, OPTAB_DIRECT);
+       gcc_assert (t1 && t2);
+ 
+       t3 = gen_reg_rtx (mode);
+       ix86_expand_vec_interleave (t3, t1, t2, high_p);
+       emit_move_insn (dest, gen_lowpart (wmode, t3));
+       break;
+ 
+     case E_V16QImode:
+     case E_V32QImode:
+     case E_V32HImode:
+     case E_V16SImode:
+     case E_V64QImode:
+       t1 = gen_reg_rtx (wmode);
+       t2 = gen_reg_rtx (wmode);
+       ix86_expand_sse_unpack (t1, op1, uns_p, high_p);
+       ix86_expand_sse_unpack (t2, op2, uns_p, high_p);
+ 
+       emit_insn (gen_rtx_SET (dest, gen_rtx_MULT (wmode, t1, t2)));
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ }
+ 
+ void
+ ix86_expand_sse2_mulv4si3 (rtx op0, rtx op1, rtx op2)
+ {
+   rtx res_1, res_2, res_3, res_4;
+ 
+   res_1 = gen_reg_rtx (V4SImode);
+   res_2 = gen_reg_rtx (V4SImode);
+   res_3 = gen_reg_rtx (V2DImode);
+   res_4 = gen_reg_rtx (V2DImode);
+   ix86_expand_mul_widen_evenodd (res_3, op1, op2, true, false);
+   ix86_expand_mul_widen_evenodd (res_4, op1, op2, true, true);
+ 
+   /* Move the results in element 2 down to element 1; we don't care
+      what goes in elements 2 and 3.  Then we can merge the parts
+      back together with an interleave.
+ 
+      Note that two other sequences were tried:
+      (1) Use interleaves at the start instead of psrldq, which allows
+      us to use a single shufps to merge things back at the end.
+      (2) Use shufps here to combine the two vectors, then pshufd to
+      put the elements in the correct order.
+      In both cases the cost of the reformatting stall was too high
+      and the overall sequence slower.  */
+ 
+   emit_insn (gen_sse2_pshufd_1 (res_1, gen_lowpart (V4SImode, res_3),
+ 				const0_rtx, const2_rtx,
+ 				const0_rtx, const0_rtx));
+   emit_insn (gen_sse2_pshufd_1 (res_2, gen_lowpart (V4SImode, res_4),
+ 				const0_rtx, const2_rtx,
+ 				const0_rtx, const0_rtx));
+   res_1 = emit_insn (gen_vec_interleave_lowv4si (op0, res_1, res_2));
+ 
+   set_unique_reg_note (res_1, REG_EQUAL, gen_rtx_MULT (V4SImode, op1, op2));
+ }
+ 
+ void
+ ix86_expand_sse2_mulvxdi3 (rtx op0, rtx op1, rtx op2)
+ {
+   machine_mode mode = GET_MODE (op0);
+   rtx t1, t2, t3, t4, t5, t6;
+ 
+   if (TARGET_AVX512DQ && mode == V8DImode)
+     emit_insn (gen_avx512dq_mulv8di3 (op0, op1, op2));
+   else if (TARGET_AVX512DQ && TARGET_AVX512VL && mode == V4DImode)
+     emit_insn (gen_avx512dq_mulv4di3 (op0, op1, op2));
+   else if (TARGET_AVX512DQ && TARGET_AVX512VL && mode == V2DImode)
+     emit_insn (gen_avx512dq_mulv2di3 (op0, op1, op2));
+   else if (TARGET_XOP && mode == V2DImode)
+     {
+       /* op1: A,B,C,D, op2: E,F,G,H */
+       op1 = gen_lowpart (V4SImode, op1);
+       op2 = gen_lowpart (V4SImode, op2);
+ 
+       t1 = gen_reg_rtx (V4SImode);
+       t2 = gen_reg_rtx (V4SImode);
+       t3 = gen_reg_rtx (V2DImode);
+       t4 = gen_reg_rtx (V2DImode);
+ 
+       /* t1: B,A,D,C */
+       emit_insn (gen_sse2_pshufd_1 (t1, op1,
+ 				    GEN_INT (1),
+ 				    GEN_INT (0),
+ 				    GEN_INT (3),
+ 				    GEN_INT (2)));
+ 
+       /* t2: (B*E),(A*F),(D*G),(C*H) */
+       emit_insn (gen_mulv4si3 (t2, t1, op2));
+ 
+       /* t3: (B*E)+(A*F), (D*G)+(C*H) */
+       emit_insn (gen_xop_phadddq (t3, t2));
+ 
+       /* t4: ((B*E)+(A*F))<<32, ((D*G)+(C*H))<<32 */
+       emit_insn (gen_ashlv2di3 (t4, t3, GEN_INT (32)));
+ 
+       /* Multiply lower parts and add all */
+       t5 = gen_reg_rtx (V2DImode);
+       emit_insn (gen_vec_widen_umult_even_v4si (t5, 
+ 					gen_lowpart (V4SImode, op1),
+ 					gen_lowpart (V4SImode, op2)));
+       force_expand_binop (mode, add_optab, t5, t4, op0, 1, OPTAB_DIRECT);
+     }
+   else
+     {
+       machine_mode nmode;
+       rtx (*umul) (rtx, rtx, rtx);
+ 
+       if (mode == V2DImode)
+ 	{
+ 	  umul = gen_vec_widen_umult_even_v4si;
+ 	  nmode = V4SImode;
+ 	}
+       else if (mode == V4DImode)
+ 	{
+ 	  umul = gen_vec_widen_umult_even_v8si;
+ 	  nmode = V8SImode;
+ 	}
+       else if (mode == V8DImode)
+ 	{
+ 	  umul = gen_vec_widen_umult_even_v16si;
+ 	  nmode = V16SImode;
+ 	}
+       else
+ 	gcc_unreachable ();
+ 
+ 
+       /* Multiply low parts.  */
+       t1 = gen_reg_rtx (mode);
+       emit_insn (umul (t1, gen_lowpart (nmode, op1), gen_lowpart (nmode, op2)));
+ 
+       /* Shift input vectors right 32 bits so we can multiply high parts.  */
+       t6 = GEN_INT (32);
+       t2 = expand_binop (mode, lshr_optab, op1, t6, NULL, 1, OPTAB_DIRECT);
+       t3 = expand_binop (mode, lshr_optab, op2, t6, NULL, 1, OPTAB_DIRECT);
+ 
+       /* Multiply high parts by low parts.  */
+       t4 = gen_reg_rtx (mode);
+       t5 = gen_reg_rtx (mode);
+       emit_insn (umul (t4, gen_lowpart (nmode, t2), gen_lowpart (nmode, op2)));
+       emit_insn (umul (t5, gen_lowpart (nmode, t3), gen_lowpart (nmode, op1)));
+ 
+       /* Combine and shift the highparts back.  */
+       t4 = expand_binop (mode, add_optab, t4, t5, t4, 1, OPTAB_DIRECT);
+       t4 = expand_binop (mode, ashl_optab, t4, t6, t4, 1, OPTAB_DIRECT);
+ 
+       /* Combine high and low parts.  */
+       force_expand_binop (mode, add_optab, t1, t4, op0, 1, OPTAB_DIRECT);
+     }
+ 
+   set_unique_reg_note (get_last_insn (), REG_EQUAL,
+ 		       gen_rtx_MULT (mode, op1, op2));
+ }
+ 
+ /* Return 1 if control tansfer instruction INSN
+    should be encoded with notrack prefix.  */
+ 
+ bool
+ ix86_notrack_prefixed_insn_p (rtx_insn *insn)
+ {
+   if (!insn || !((flag_cf_protection & CF_BRANCH)))
+     return false;
+ 
+   if (CALL_P (insn))
+     {
+       rtx call = get_call_rtx_from (insn);
+       gcc_assert (call != NULL_RTX);
+       rtx addr = XEXP (call, 0);
+ 
+       /* Do not emit 'notrack' if it's not an indirect call.  */
+       if (MEM_P (addr)
+ 	  && GET_CODE (XEXP (addr, 0)) == SYMBOL_REF)
+ 	return false;
+       else
+ 	return find_reg_note (insn, REG_CALL_NOCF_CHECK, 0);
+     }
+ 
+   if (JUMP_P (insn) && !flag_cet_switch)
+     {
+       rtx target = JUMP_LABEL (insn);
+       if (target == NULL_RTX || ANY_RETURN_P (target))
+ 	return false;
+ 
+       /* Check the jump is a switch table.  */
+       rtx_insn *label = as_a<rtx_insn *> (target);
+       rtx_insn *table = next_insn (label);
+       if (table == NULL_RTX || !JUMP_TABLE_DATA_P (table))
+ 	return false;
+       else
+ 	return true;
+     }
+   return false;
+ }
+ 
+ /* Calculate integer abs() using only SSE2 instructions.  */
+ 
+ void
+ ix86_expand_sse2_abs (rtx target, rtx input)
+ {
+   machine_mode mode = GET_MODE (target);
+   rtx tmp0, tmp1, x;
+ 
+   switch (mode)
+     {
+     case E_V2DImode:
+     case E_V4DImode:
+       /* For 64-bit signed integer X, with SSE4.2 use
+ 	 pxor t0, t0; pcmpgtq X, t0; pxor t0, X; psubq t0, X.
+ 	 Otherwise handle it similarly to V4SImode, except use 64 as W instead of
+ 	 32 and use logical instead of arithmetic right shift (which is
+ 	 unimplemented) and subtract.  */
+       if (TARGET_SSE4_2)
+ 	{
+ 	  tmp0 = gen_reg_rtx (mode);
+ 	  tmp1 = gen_reg_rtx (mode);
+ 	  emit_move_insn (tmp1, CONST0_RTX (mode));
+ 	  if (mode == E_V2DImode)
+ 	    emit_insn (gen_sse4_2_gtv2di3 (tmp0, tmp1, input));
+ 	  else
+ 	    emit_insn (gen_avx2_gtv4di3 (tmp0, tmp1, input));
+ 	}
+       else
+ 	{
+ 	  tmp0 = expand_simple_binop (mode, LSHIFTRT, input,
+ 				      GEN_INT (GET_MODE_UNIT_BITSIZE (mode)
+ 					       - 1), NULL, 0, OPTAB_DIRECT);
+ 	  tmp0 = expand_simple_unop (mode, NEG, tmp0, NULL, false);
+ 	}
+ 
+       tmp1 = expand_simple_binop (mode, XOR, tmp0, input,
+ 				  NULL, 0, OPTAB_DIRECT);
+       x = expand_simple_binop (mode, MINUS, tmp1, tmp0,
+ 			       target, 0, OPTAB_DIRECT);
+       break;
+ 
+     case E_V4SImode:
+       /* For 32-bit signed integer X, the best way to calculate the absolute
+ 	 value of X is (((signed) X >> (W-1)) ^ X) - ((signed) X >> (W-1)).  */
+       tmp0 = expand_simple_binop (mode, ASHIFTRT, input,
+ 				  GEN_INT (GET_MODE_UNIT_BITSIZE (mode) - 1),
+ 				  NULL, 0, OPTAB_DIRECT);
+       tmp1 = expand_simple_binop (mode, XOR, tmp0, input,
+ 				  NULL, 0, OPTAB_DIRECT);
+       x = expand_simple_binop (mode, MINUS, tmp1, tmp0,
+ 			       target, 0, OPTAB_DIRECT);
+       break;
+ 
+     case E_V8HImode:
+       /* For 16-bit signed integer X, the best way to calculate the absolute
+ 	 value of X is max (X, -X), as SSE2 provides the PMAXSW insn.  */
+       tmp0 = expand_unop (mode, neg_optab, input, NULL_RTX, 0);
+ 
+       x = expand_simple_binop (mode, SMAX, tmp0, input,
+ 			       target, 0, OPTAB_DIRECT);
+       break;
+ 
+     case E_V16QImode:
+       /* For 8-bit signed integer X, the best way to calculate the absolute
+ 	 value of X is min ((unsigned char) X, (unsigned char) (-X)),
+ 	 as SSE2 provides the PMINUB insn.  */
+       tmp0 = expand_unop (mode, neg_optab, input, NULL_RTX, 0);
+ 
+       x = expand_simple_binop (V16QImode, UMIN, tmp0, input,
+ 			       target, 0, OPTAB_DIRECT);
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   if (x != target)
+     emit_move_insn (target, x);
+ }
+ 
+ /* Expand an extract from a vector register through pextr insn.
+    Return true if successful.  */
+ 
+ bool
+ ix86_expand_pextr (rtx *operands)
+ {
+   rtx dst = operands[0];
+   rtx src = operands[1];
+ 
+   unsigned int size = INTVAL (operands[2]);
+   unsigned int pos = INTVAL (operands[3]);
+ 
+   if (SUBREG_P (dst))
+     {
+       /* Reject non-lowpart subregs.  */
+       if (SUBREG_BYTE (dst) > 0)
+ 	return false;
+       dst = SUBREG_REG (dst);
+     }
+ 	
+   if (SUBREG_P (src))
+     {
+       pos += SUBREG_BYTE (src) * BITS_PER_UNIT;
+       src = SUBREG_REG (src);
+     }
+ 
+   switch (GET_MODE (src))
+     {
+     case E_V16QImode:
+     case E_V8HImode:
+     case E_V4SImode:
+     case E_V2DImode:
+     case E_V1TImode:
+     case E_TImode:
+       {
+ 	machine_mode srcmode, dstmode;
+ 	rtx d, pat;
+ 
+ 	if (!int_mode_for_size (size, 0).exists (&dstmode))
+ 	  return false;
+ 
+ 	switch (dstmode)
+ 	  {
+ 	  case E_QImode:
+ 	    if (!TARGET_SSE4_1)
+ 	      return false;
+ 	    srcmode = V16QImode;
+ 	    break;
+ 
+ 	  case E_HImode:
+ 	    if (!TARGET_SSE2)
+ 	      return false;
+ 	    srcmode = V8HImode;
+ 	    break;
+ 
+ 	  case E_SImode:
+ 	    if (!TARGET_SSE4_1)
+ 	      return false;
+ 	    srcmode = V4SImode;
+ 	    break;
+ 
+ 	  case E_DImode:
+ 	    gcc_assert (TARGET_64BIT);
+ 	    if (!TARGET_SSE4_1)
+ 	      return false;
+ 	    srcmode = V2DImode;
+ 	    break;
+ 
+ 	  default:
+ 	    return false;
+ 	  }
+ 
+ 	/* Reject extractions from misaligned positions.  */
+ 	if (pos & (size-1))
+ 	  return false;
+ 
+ 	if (GET_MODE (dst) == dstmode)
+ 	  d = dst;
+ 	else
+ 	  d = gen_reg_rtx (dstmode);
+ 
+ 	/* Construct insn pattern.  */
+ 	pat = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, GEN_INT (pos / size)));
+ 	pat = gen_rtx_VEC_SELECT (dstmode, gen_lowpart (srcmode, src), pat);
+ 
+ 	/* Let the rtl optimizers know about the zero extension performed.  */
+ 	if (dstmode == QImode || dstmode == HImode)
+ 	  {
+ 	    pat = gen_rtx_ZERO_EXTEND (SImode, pat);
+ 	    d = gen_lowpart (SImode, d);
+ 	  }
+ 
+ 	emit_insn (gen_rtx_SET (d, pat));
+ 
+ 	if (d != dst)
+ 	  emit_move_insn (dst, gen_lowpart (GET_MODE (dst), d));
+ 	return true;
+       }
+ 
+     default:
+       return false;
+     }
+ }
+ 
+ /* Expand an insert into a vector register through pinsr insn.
+    Return true if successful.  */
+ 
+ bool
+ ix86_expand_pinsr (rtx *operands)
+ {
+   rtx dst = operands[0];
+   rtx src = operands[3];
+ 
+   unsigned int size = INTVAL (operands[1]);
+   unsigned int pos = INTVAL (operands[2]);
+ 
+   if (SUBREG_P (dst))
+     {
+       pos += SUBREG_BYTE (dst) * BITS_PER_UNIT;
+       dst = SUBREG_REG (dst);
+     }
+ 
+   switch (GET_MODE (dst))
+     {
+     case E_V16QImode:
+     case E_V8HImode:
+     case E_V4SImode:
+     case E_V2DImode:
+     case E_V1TImode:
+     case E_TImode:
+       {
+ 	machine_mode srcmode, dstmode;
+ 	rtx (*pinsr)(rtx, rtx, rtx, rtx);
+ 	rtx d;
+ 
+ 	if (!int_mode_for_size (size, 0).exists (&srcmode))
+ 	  return false;
+ 
+ 	switch (srcmode)
+ 	  {
+ 	  case E_QImode:
+ 	    if (!TARGET_SSE4_1)
+ 	      return false;
+ 	    dstmode = V16QImode;
+ 	    pinsr = gen_sse4_1_pinsrb;
+ 	    break;
+ 
+ 	  case E_HImode:
+ 	    if (!TARGET_SSE2)
+ 	      return false;
+ 	    dstmode = V8HImode;
+ 	    pinsr = gen_sse2_pinsrw;
+ 	    break;
+ 
+ 	  case E_SImode:
+ 	    if (!TARGET_SSE4_1)
+ 	      return false;
+ 	    dstmode = V4SImode;
+ 	    pinsr = gen_sse4_1_pinsrd;
+ 	    break;
+ 
+ 	  case E_DImode:
+ 	    gcc_assert (TARGET_64BIT);
+ 	    if (!TARGET_SSE4_1)
+ 	      return false;
+ 	    dstmode = V2DImode;
+ 	    pinsr = gen_sse4_1_pinsrq;
+ 	    break;
+ 
+ 	  default:
+ 	    return false;
+ 	  }
+ 
+ 	/* Reject insertions to misaligned positions.  */
+ 	if (pos & (size-1))
+ 	  return false;
+ 
+ 	if (SUBREG_P (src))
+ 	  {
+ 	    unsigned int srcpos = SUBREG_BYTE (src);
+ 
+ 	    if (srcpos > 0)
+ 	      {
+ 		rtx extr_ops[4];
+ 
+ 		extr_ops[0] = gen_reg_rtx (srcmode);
+ 		extr_ops[1] = gen_lowpart (srcmode, SUBREG_REG (src));
+ 		extr_ops[2] = GEN_INT (size);
+ 		extr_ops[3] = GEN_INT (srcpos * BITS_PER_UNIT);
+ 
+ 		if (!ix86_expand_pextr (extr_ops))
+ 		  return false;
+ 
+ 		src = extr_ops[0];
+ 	      }
+ 	    else
+ 	      src = gen_lowpart (srcmode, SUBREG_REG (src));
+ 	  }
+ 
+ 	if (GET_MODE (dst) == dstmode)
+ 	  d = dst;
+ 	else
+ 	  d = gen_reg_rtx (dstmode);
+ 
+ 	emit_insn (pinsr (d, gen_lowpart (dstmode, dst),
+ 			  gen_lowpart (srcmode, src),
+ 			  GEN_INT (1 << (pos / size))));
+ 	if (d != dst)
+ 	  emit_move_insn (dst, gen_lowpart (GET_MODE (dst), d));
+ 	return true;
+       }
+ 
+     default:
+       return false;
+     }
+ }
+ 
+ /* All CPUs prefer to avoid cross-lane operations so perform reductions
+    upper against lower halves up to SSE reg size.  */
+ 
+ machine_mode
+ ix86_split_reduction (machine_mode mode)
+ {
+   /* Reduce lowpart against highpart until we reach SSE reg width to
+      avoid cross-lane operations.  */
+   switch (mode)
+     {
+     case E_V8DImode:
+     case E_V4DImode:
+       return V2DImode;
+     case E_V16SImode:
+     case E_V8SImode:
+       return V4SImode;
+     case E_V32HImode:
+     case E_V16HImode:
+       return V8HImode;
+     case E_V64QImode:
+     case E_V32QImode:
+       return V16QImode;
+     case E_V16SFmode:
+     case E_V8SFmode:
+       return V4SFmode;
+     case E_V8DFmode:
+     case E_V4DFmode:
+       return V2DFmode;
+     default:
+       return mode;
+     }
+ }
+ 
+ /* Generate call to __divmoddi4.  */
+ 
+ void
+ ix86_expand_divmod_libfunc (rtx libfunc, machine_mode mode,
+ 			    rtx op0, rtx op1,
+ 			    rtx *quot_p, rtx *rem_p)
+ {
+   rtx rem = assign_386_stack_local (mode, SLOT_TEMP);
+ 
+   rtx quot = emit_library_call_value (libfunc, NULL_RTX, LCT_NORMAL,
+ 				      mode, op0, mode, op1, mode,
+ 				      XEXP (rem, 0), Pmode);
+   *quot_p = quot;
+   *rem_p = rem;
+ }
+ 
+ #include "gt-i386-expand.h"
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-expand.h gcc-10.1.0/gcc/config/i386/i386-expand.h
*** gcc-9.3.0/gcc/config/i386/i386-expand.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/i386/i386-expand.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,58 ----
+ /* Copyright (C) 1988-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_I386_EXPAND_H
+ #define GCC_I386_EXPAND_H
+ 
+ /* AVX512F does support 64-byte integer vector operations,
+    thus the longest vector we are faced with is V64QImode.  */
+ #define MAX_VECT_LEN	64
+ 
+ struct expand_vec_perm_d
+ {
+   rtx target, op0, op1;
+   unsigned char perm[MAX_VECT_LEN];
+   machine_mode vmode;
+   unsigned char nelt;
+   bool one_operand_p;
+   bool testing_p;
+ };
+ 
+ rtx legitimize_tls_address (rtx x, enum tls_model model, bool for_mov);
+ alias_set_type ix86_GOT_alias_set (void);
+ rtx legitimize_pic_address (rtx orig, rtx reg);
+ rtx legitimize_pe_coff_symbol (rtx addr, bool inreg);
+ 
+ bool insn_defines_reg (unsigned int regno1, unsigned int regno2,
+ 		       rtx_insn *insn);
+ void ix86_emit_binop (enum rtx_code code, machine_mode mode, rtx dst, rtx src);
+ enum calling_abi ix86_function_abi (const_tree fndecl);
+ bool ix86_function_ms_hook_prologue (const_tree fn);
+ void warn_once_call_ms2sysv_xlogues (const char *feature);
+ rtx gen_push (rtx arg);
+ rtx gen_pop (rtx arg);
+ rtx ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
+ 			 machine_mode mode, int ignore);
+ bool ix86_vectorize_vec_perm_const (machine_mode vmode, rtx target, rtx op0,
+ 				    rtx op1, const vec_perm_indices &sel);
+ bool ix86_notrack_prefixed_insn_p (rtx_insn *);
+ machine_mode ix86_split_reduction (machine_mode mode);
+ void ix86_expand_divmod_libfunc (rtx libfunc, machine_mode mode, rtx op0,
+ 				 rtx op1, rtx *quot_p, rtx *rem_p);
+ 
+ #endif  /* GCC_I386_EXPAND_H */
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-features.c gcc-10.1.0/gcc/config/i386/i386-features.c
*** gcc-9.3.0/gcc/config/i386/i386-features.c	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/i386/i386-features.c	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,2879 ----
+ /* Copyright (C) 1988-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #define IN_TARGET_CODE 1
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "backend.h"
+ #include "rtl.h"
+ #include "tree.h"
+ #include "memmodel.h"
+ #include "gimple.h"
+ #include "cfghooks.h"
+ #include "cfgloop.h"
+ #include "df.h"
+ #include "tm_p.h"
+ #include "stringpool.h"
+ #include "expmed.h"
+ #include "optabs.h"
+ #include "regs.h"
+ #include "emit-rtl.h"
+ #include "recog.h"
+ #include "cgraph.h"
+ #include "diagnostic.h"
+ #include "cfgbuild.h"
+ #include "alias.h"
+ #include "fold-const.h"
+ #include "attribs.h"
+ #include "calls.h"
+ #include "stor-layout.h"
+ #include "varasm.h"
+ #include "output.h"
+ #include "insn-attr.h"
+ #include "flags.h"
+ #include "except.h"
+ #include "explow.h"
+ #include "expr.h"
+ #include "cfgrtl.h"
+ #include "common/common-target.h"
+ #include "langhooks.h"
+ #include "reload.h"
+ #include "gimplify.h"
+ #include "dwarf2.h"
+ #include "tm-constrs.h"
+ #include "cselib.h"
+ #include "sched-int.h"
+ #include "opts.h"
+ #include "tree-pass.h"
+ #include "context.h"
+ #include "pass_manager.h"
+ #include "target-globals.h"
+ #include "gimple-iterator.h"
+ #include "tree-vectorizer.h"
+ #include "shrink-wrap.h"
+ #include "builtins.h"
+ #include "rtl-iter.h"
+ #include "tree-iterator.h"
+ #include "dbgcnt.h"
+ #include "case-cfn-macros.h"
+ #include "dojump.h"
+ #include "fold-const-call.h"
+ #include "tree-vrp.h"
+ #include "tree-ssanames.h"
+ #include "selftest.h"
+ #include "selftest-rtl.h"
+ #include "print-rtl.h"
+ #include "intl.h"
+ #include "ifcvt.h"
+ #include "symbol-summary.h"
+ #include "ipa-prop.h"
+ #include "ipa-fnsummary.h"
+ #include "wide-int-bitmask.h"
+ #include "tree-vector-builder.h"
+ #include "debug.h"
+ #include "dwarf2out.h"
+ #include "i386-builtins.h"
+ #include "i386-features.h"
+ 
+ const char * const xlogue_layout::STUB_BASE_NAMES[XLOGUE_STUB_COUNT] = {
+   "savms64",
+   "resms64",
+   "resms64x",
+   "savms64f",
+   "resms64f",
+   "resms64fx"
+ };
+ 
+ const unsigned xlogue_layout::REG_ORDER[xlogue_layout::MAX_REGS] = {
+ /* The below offset values are where each register is stored for the layout
+    relative to incoming stack pointer.  The value of each m_regs[].offset will
+    be relative to the incoming base pointer (rax or rsi) used by the stub.
+ 
+     s_instances:   0		1		2		3
+     Offset:					realigned or	aligned + 8
+     Register	   aligned	aligned + 8	aligned w/HFP	w/HFP	*/
+     XMM15_REG,	/* 0x10		0x18		0x10		0x18	*/
+     XMM14_REG,	/* 0x20		0x28		0x20		0x28	*/
+     XMM13_REG,	/* 0x30		0x38		0x30		0x38	*/
+     XMM12_REG,	/* 0x40		0x48		0x40		0x48	*/
+     XMM11_REG,	/* 0x50		0x58		0x50		0x58	*/
+     XMM10_REG,	/* 0x60		0x68		0x60		0x68	*/
+     XMM9_REG,	/* 0x70		0x78		0x70		0x78	*/
+     XMM8_REG,	/* 0x80		0x88		0x80		0x88	*/
+     XMM7_REG,	/* 0x90		0x98		0x90		0x98	*/
+     XMM6_REG,	/* 0xa0		0xa8		0xa0		0xa8	*/
+     SI_REG,	/* 0xa8		0xb0		0xa8		0xb0	*/
+     DI_REG,	/* 0xb0		0xb8		0xb0		0xb8	*/
+     BX_REG,	/* 0xb8		0xc0		0xb8		0xc0	*/
+     BP_REG,	/* 0xc0		0xc8		N/A		N/A	*/
+     R12_REG,	/* 0xc8		0xd0		0xc0		0xc8	*/
+     R13_REG,	/* 0xd0		0xd8		0xc8		0xd0	*/
+     R14_REG,	/* 0xd8		0xe0		0xd0		0xd8	*/
+     R15_REG,	/* 0xe0		0xe8		0xd8		0xe0	*/
+ };
+ 
+ /* Instantiate static const values.  */
+ const HOST_WIDE_INT xlogue_layout::STUB_INDEX_OFFSET;
+ const unsigned xlogue_layout::MIN_REGS;
+ const unsigned xlogue_layout::MAX_REGS;
+ const unsigned xlogue_layout::MAX_EXTRA_REGS;
+ const unsigned xlogue_layout::VARIANT_COUNT;
+ const unsigned xlogue_layout::STUB_NAME_MAX_LEN;
+ 
+ /* Initialize xlogue_layout::s_stub_names to zero.  */
+ char xlogue_layout::s_stub_names[2][XLOGUE_STUB_COUNT][VARIANT_COUNT]
+ 				[STUB_NAME_MAX_LEN];
+ 
+ /* Instantiates all xlogue_layout instances.  */
+ const xlogue_layout xlogue_layout::s_instances[XLOGUE_SET_COUNT] = {
+   xlogue_layout (0, false),
+   xlogue_layout (8, false),
+   xlogue_layout (0, true),
+   xlogue_layout (8, true)
+ };
+ 
+ /* Return an appropriate const instance of xlogue_layout based upon values
+    in cfun->machine and crtl.  */
+ const class xlogue_layout &
+ xlogue_layout::get_instance ()
+ {
+   enum xlogue_stub_sets stub_set;
+   bool aligned_plus_8 = cfun->machine->call_ms2sysv_pad_in;
+ 
+   if (stack_realign_fp)
+     stub_set = XLOGUE_SET_HFP_ALIGNED_OR_REALIGN;
+   else if (frame_pointer_needed)
+     stub_set = aligned_plus_8
+ 	      ? XLOGUE_SET_HFP_ALIGNED_PLUS_8
+ 	      : XLOGUE_SET_HFP_ALIGNED_OR_REALIGN;
+   else
+     stub_set = aligned_plus_8 ? XLOGUE_SET_ALIGNED_PLUS_8 : XLOGUE_SET_ALIGNED;
+ 
+   return s_instances[stub_set];
+ }
+ 
+ /* Determine how many clobbered registers can be saved by the stub.
+    Returns the count of registers the stub will save and restore.  */
+ unsigned
+ xlogue_layout::count_stub_managed_regs ()
+ {
+   bool hfp = frame_pointer_needed || stack_realign_fp;
+   unsigned i, count;
+   unsigned regno;
+ 
+   for (count = i = MIN_REGS; i < MAX_REGS; ++i)
+     {
+       regno = REG_ORDER[i];
+       if (regno == BP_REG && hfp)
+ 	continue;
+       if (!ix86_save_reg (regno, false, false))
+ 	break;
+       ++count;
+     }
+   return count;
+ }
+ 
+ /* Determine if register REGNO is a stub managed register given the
+    total COUNT of stub managed registers.  */
+ bool
+ xlogue_layout::is_stub_managed_reg (unsigned regno, unsigned count)
+ {
+   bool hfp = frame_pointer_needed || stack_realign_fp;
+   unsigned i;
+ 
+   for (i = 0; i < count; ++i)
+     {
+       gcc_assert (i < MAX_REGS);
+       if (REG_ORDER[i] == BP_REG && hfp)
+ 	++count;
+       else if (REG_ORDER[i] == regno)
+ 	return true;
+     }
+   return false;
+ }
+ 
+ /* Constructor for xlogue_layout.  */
+ xlogue_layout::xlogue_layout (HOST_WIDE_INT stack_align_off_in, bool hfp)
+   : m_hfp (hfp) , m_nregs (hfp ? 17 : 18),
+     m_stack_align_off_in (stack_align_off_in)
+ {
+   HOST_WIDE_INT offset = stack_align_off_in;
+   unsigned i, j;
+ 
+   for (i = j = 0; i < MAX_REGS; ++i)
+     {
+       unsigned regno = REG_ORDER[i];
+ 
+       if (regno == BP_REG && hfp)
+ 	continue;
+       if (SSE_REGNO_P (regno))
+ 	{
+ 	  offset += 16;
+ 	  /* Verify that SSE regs are always aligned.  */
+ 	  gcc_assert (!((stack_align_off_in + offset) & 15));
+ 	}
+       else
+ 	offset += 8;
+ 
+       m_regs[j].regno    = regno;
+       m_regs[j++].offset = offset - STUB_INDEX_OFFSET;
+     }
+   gcc_assert (j == m_nregs);
+ }
+ 
+ const char *
+ xlogue_layout::get_stub_name (enum xlogue_stub stub,
+ 			      unsigned n_extra_regs)
+ {
+   const int have_avx = TARGET_AVX;
+   char *name = s_stub_names[!!have_avx][stub][n_extra_regs];
+ 
+   /* Lazy init */
+   if (!*name)
+     {
+       int res = snprintf (name, STUB_NAME_MAX_LEN, "__%s_%s_%u",
+ 			  (have_avx ? "avx" : "sse"),
+ 			  STUB_BASE_NAMES[stub],
+ 			  MIN_REGS + n_extra_regs);
+       gcc_checking_assert (res < (int)STUB_NAME_MAX_LEN);
+     }
+ 
+   return name;
+ }
+ 
+ /* Return rtx of a symbol ref for the entry point (based upon
+    cfun->machine->call_ms2sysv_extra_regs) of the specified stub.  */
+ rtx
+ xlogue_layout::get_stub_rtx (enum xlogue_stub stub)
+ {
+   const unsigned n_extra_regs = cfun->machine->call_ms2sysv_extra_regs;
+   gcc_checking_assert (n_extra_regs <= MAX_EXTRA_REGS);
+   gcc_assert (stub < XLOGUE_STUB_COUNT);
+   gcc_assert (crtl->stack_realign_finalized);
+ 
+   return gen_rtx_SYMBOL_REF (Pmode, get_stub_name (stub, n_extra_regs));
+ }
+ 
+ unsigned scalar_chain::max_id = 0;
+ 
+ namespace {
+ 
+ /* Initialize new chain.  */
+ 
+ scalar_chain::scalar_chain (enum machine_mode smode_, enum machine_mode vmode_)
+ {
+   smode = smode_;
+   vmode = vmode_;
+ 
+   chain_id = ++max_id;
+ 
+    if (dump_file)
+     fprintf (dump_file, "Created a new instruction chain #%d\n", chain_id);
+ 
+   bitmap_obstack_initialize (NULL);
+   insns = BITMAP_ALLOC (NULL);
+   defs = BITMAP_ALLOC (NULL);
+   defs_conv = BITMAP_ALLOC (NULL);
+   queue = NULL;
+ }
+ 
+ /* Free chain's data.  */
+ 
+ scalar_chain::~scalar_chain ()
+ {
+   BITMAP_FREE (insns);
+   BITMAP_FREE (defs);
+   BITMAP_FREE (defs_conv);
+   bitmap_obstack_release (NULL);
+ }
+ 
+ /* Add instruction into chains' queue.  */
+ 
+ void
+ scalar_chain::add_to_queue (unsigned insn_uid)
+ {
+   if (bitmap_bit_p (insns, insn_uid)
+       || bitmap_bit_p (queue, insn_uid))
+     return;
+ 
+   if (dump_file)
+     fprintf (dump_file, "  Adding insn %d into chain's #%d queue\n",
+ 	     insn_uid, chain_id);
+   bitmap_set_bit (queue, insn_uid);
+ }
+ 
+ general_scalar_chain::general_scalar_chain (enum machine_mode smode_,
+ 					    enum machine_mode vmode_)
+      : scalar_chain (smode_, vmode_)
+ {
+   insns_conv = BITMAP_ALLOC (NULL);
+   n_sse_to_integer = 0;
+   n_integer_to_sse = 0;
+ }
+ 
+ general_scalar_chain::~general_scalar_chain ()
+ {
+   BITMAP_FREE (insns_conv);
+ }
+ 
+ /* For DImode conversion, mark register defined by DEF as requiring
+    conversion.  */
+ 
+ void
+ general_scalar_chain::mark_dual_mode_def (df_ref def)
+ {
+   gcc_assert (DF_REF_REG_DEF_P (def));
+ 
+   /* Record the def/insn pair so we can later efficiently iterate over
+      the defs to convert on insns not in the chain.  */
+   bool reg_new = bitmap_set_bit (defs_conv, DF_REF_REGNO (def));
+   if (!bitmap_bit_p (insns, DF_REF_INSN_UID (def)))
+     {
+       if (!bitmap_set_bit (insns_conv, DF_REF_INSN_UID (def))
+ 	  && !reg_new)
+ 	return;
+       n_integer_to_sse++;
+     }
+   else
+     {
+       if (!reg_new)
+ 	return;
+       n_sse_to_integer++;
+     }
+  
+   if (dump_file)
+     fprintf (dump_file,
+ 	     "  Mark r%d def in insn %d as requiring both modes in chain #%d\n",
+ 	     DF_REF_REGNO (def), DF_REF_INSN_UID (def), chain_id);
+ }
+ 
+ /* For TImode conversion, it is unused.  */
+ 
+ void
+ timode_scalar_chain::mark_dual_mode_def (df_ref)
+ {
+   gcc_unreachable ();
+ }
+ 
+ /* Check REF's chain to add new insns into a queue
+    and find registers requiring conversion.  */
+ 
+ void
+ scalar_chain::analyze_register_chain (bitmap candidates, df_ref ref)
+ {
+   df_link *chain;
+ 
+   gcc_assert (bitmap_bit_p (insns, DF_REF_INSN_UID (ref))
+ 	      || bitmap_bit_p (candidates, DF_REF_INSN_UID (ref)));
+   add_to_queue (DF_REF_INSN_UID (ref));
+ 
+   for (chain = DF_REF_CHAIN (ref); chain; chain = chain->next)
+     {
+       unsigned uid = DF_REF_INSN_UID (chain->ref);
+ 
+       if (!NONDEBUG_INSN_P (DF_REF_INSN (chain->ref)))
+ 	continue;
+ 
+       if (!DF_REF_REG_MEM_P (chain->ref))
+ 	{
+ 	  if (bitmap_bit_p (insns, uid))
+ 	    continue;
+ 
+ 	  if (bitmap_bit_p (candidates, uid))
+ 	    {
+ 	      add_to_queue (uid);
+ 	      continue;
+ 	    }
+ 	}
+ 
+       if (DF_REF_REG_DEF_P (chain->ref))
+ 	{
+ 	  if (dump_file)
+ 	    fprintf (dump_file, "  r%d def in insn %d isn't convertible\n",
+ 		     DF_REF_REGNO (chain->ref), uid);
+ 	  mark_dual_mode_def (chain->ref);
+ 	}
+       else
+ 	{
+ 	  if (dump_file)
+ 	    fprintf (dump_file, "  r%d use in insn %d isn't convertible\n",
+ 		     DF_REF_REGNO (chain->ref), uid);
+ 	  mark_dual_mode_def (ref);
+ 	}
+     }
+ }
+ 
+ /* Add instruction into a chain.  */
+ 
+ void
+ scalar_chain::add_insn (bitmap candidates, unsigned int insn_uid)
+ {
+   if (bitmap_bit_p (insns, insn_uid))
+     return;
+ 
+   if (dump_file)
+     fprintf (dump_file, "  Adding insn %d to chain #%d\n", insn_uid, chain_id);
+ 
+   bitmap_set_bit (insns, insn_uid);
+ 
+   rtx_insn *insn = DF_INSN_UID_GET (insn_uid)->insn;
+   rtx def_set = single_set (insn);
+   if (def_set && REG_P (SET_DEST (def_set))
+       && !HARD_REGISTER_P (SET_DEST (def_set)))
+     bitmap_set_bit (defs, REGNO (SET_DEST (def_set)));
+ 
+   /* ???  The following is quadratic since analyze_register_chain
+      iterates over all refs to look for dual-mode regs.  Instead this
+      should be done separately for all regs mentioned in the chain once.  */
+   df_ref ref;
+   for (ref = DF_INSN_UID_DEFS (insn_uid); ref; ref = DF_REF_NEXT_LOC (ref))
+     if (!HARD_REGISTER_P (DF_REF_REG (ref)))
+       analyze_register_chain (candidates, ref);
+   for (ref = DF_INSN_UID_USES (insn_uid); ref; ref = DF_REF_NEXT_LOC (ref))
+     if (!DF_REF_REG_MEM_P (ref))
+       analyze_register_chain (candidates, ref);
+ }
+ 
+ /* Build new chain starting from insn INSN_UID recursively
+    adding all dependent uses and definitions.  */
+ 
+ void
+ scalar_chain::build (bitmap candidates, unsigned insn_uid)
+ {
+   queue = BITMAP_ALLOC (NULL);
+   bitmap_set_bit (queue, insn_uid);
+ 
+   if (dump_file)
+     fprintf (dump_file, "Building chain #%d...\n", chain_id);
+ 
+   while (!bitmap_empty_p (queue))
+     {
+       insn_uid = bitmap_first_set_bit (queue);
+       bitmap_clear_bit (queue, insn_uid);
+       bitmap_clear_bit (candidates, insn_uid);
+       add_insn (candidates, insn_uid);
+     }
+ 
+   if (dump_file)
+     {
+       fprintf (dump_file, "Collected chain #%d...\n", chain_id);
+       fprintf (dump_file, "  insns: ");
+       dump_bitmap (dump_file, insns);
+       if (!bitmap_empty_p (defs_conv))
+ 	{
+ 	  bitmap_iterator bi;
+ 	  unsigned id;
+ 	  const char *comma = "";
+ 	  fprintf (dump_file, "  defs to convert: ");
+ 	  EXECUTE_IF_SET_IN_BITMAP (defs_conv, 0, id, bi)
+ 	    {
+ 	      fprintf (dump_file, "%sr%d", comma, id);
+ 	      comma = ", ";
+ 	    }
+ 	  fprintf (dump_file, "\n");
+ 	}
+     }
+ 
+   BITMAP_FREE (queue);
+ }
+ 
+ /* Return a cost of building a vector costant
+    instead of using a scalar one.  */
+ 
+ int
+ general_scalar_chain::vector_const_cost (rtx exp)
+ {
+   gcc_assert (CONST_INT_P (exp));
+ 
+   if (standard_sse_constant_p (exp, vmode))
+     return ix86_cost->sse_op;
+   /* We have separate costs for SImode and DImode, use SImode costs
+      for smaller modes.  */
+   return ix86_cost->sse_load[smode == DImode ? 1 : 0];
+ }
+ 
+ /* Compute a gain for chain conversion.  */
+ 
+ int
+ general_scalar_chain::compute_convert_gain ()
+ {
+   bitmap_iterator bi;
+   unsigned insn_uid;
+   int gain = 0;
+   int cost = 0;
+ 
+   if (dump_file)
+     fprintf (dump_file, "Computing gain for chain #%d...\n", chain_id);
+ 
+   /* SSE costs distinguish between SImode and DImode loads/stores, for
+      int costs factor in the number of GPRs involved.  When supporting
+      smaller modes than SImode the int load/store costs need to be
+      adjusted as well.  */
+   unsigned sse_cost_idx = smode == DImode ? 1 : 0;
+   unsigned m = smode == DImode ? (TARGET_64BIT ? 1 : 2) : 1;
+ 
+   EXECUTE_IF_SET_IN_BITMAP (insns, 0, insn_uid, bi)
+     {
+       rtx_insn *insn = DF_INSN_UID_GET (insn_uid)->insn;
+       rtx def_set = single_set (insn);
+       rtx src = SET_SRC (def_set);
+       rtx dst = SET_DEST (def_set);
+       int igain = 0;
+ 
+       if (REG_P (src) && REG_P (dst))
+ 	igain += 2 * m - ix86_cost->xmm_move;
+       else if (REG_P (src) && MEM_P (dst))
+ 	igain
+ 	  += m * ix86_cost->int_store[2] - ix86_cost->sse_store[sse_cost_idx];
+       else if (MEM_P (src) && REG_P (dst))
+ 	igain += m * ix86_cost->int_load[2] - ix86_cost->sse_load[sse_cost_idx];
+       else if (GET_CODE (src) == ASHIFT
+ 	       || GET_CODE (src) == ASHIFTRT
+ 	       || GET_CODE (src) == LSHIFTRT)
+ 	{
+ 	  if (m == 2)
+ 	    {
+ 	      if (INTVAL (XEXP (src, 1)) >= 32)
+ 		igain += ix86_cost->add;
+ 	      else
+ 		igain += ix86_cost->shift_const;
+ 	    }
+ 
+ 	  igain += ix86_cost->shift_const - ix86_cost->sse_op;
+ 
+ 	  if (CONST_INT_P (XEXP (src, 0)))
+ 	    igain -= vector_const_cost (XEXP (src, 0));
+ 	}
+       else if (GET_CODE (src) == PLUS
+ 	       || GET_CODE (src) == MINUS
+ 	       || GET_CODE (src) == IOR
+ 	       || GET_CODE (src) == XOR
+ 	       || GET_CODE (src) == AND)
+ 	{
+ 	  igain += m * ix86_cost->add - ix86_cost->sse_op;
+ 	  /* Additional gain for andnot for targets without BMI.  */
+ 	  if (GET_CODE (XEXP (src, 0)) == NOT
+ 	      && !TARGET_BMI)
+ 	    igain += m * ix86_cost->add;
+ 
+ 	  if (CONST_INT_P (XEXP (src, 0)))
+ 	    igain -= vector_const_cost (XEXP (src, 0));
+ 	  if (CONST_INT_P (XEXP (src, 1)))
+ 	    igain -= vector_const_cost (XEXP (src, 1));
+ 	}
+       else if (GET_CODE (src) == NEG
+ 	       || GET_CODE (src) == NOT)
+ 	igain += m * ix86_cost->add - ix86_cost->sse_op - COSTS_N_INSNS (1);
+       else if (GET_CODE (src) == SMAX
+ 	       || GET_CODE (src) == SMIN
+ 	       || GET_CODE (src) == UMAX
+ 	       || GET_CODE (src) == UMIN)
+ 	{
+ 	  /* We do not have any conditional move cost, estimate it as a
+ 	     reg-reg move.  Comparisons are costed as adds.  */
+ 	  igain += m * (COSTS_N_INSNS (2) + ix86_cost->add);
+ 	  /* Integer SSE ops are all costed the same.  */
+ 	  igain -= ix86_cost->sse_op;
+ 	}
+       else if (GET_CODE (src) == COMPARE)
+ 	{
+ 	  /* Assume comparison cost is the same.  */
+ 	}
+       else if (CONST_INT_P (src))
+ 	{
+ 	  if (REG_P (dst))
+ 	    /* DImode can be immediate for TARGET_64BIT and SImode always.  */
+ 	    igain += m * COSTS_N_INSNS (1);
+ 	  else if (MEM_P (dst))
+ 	    igain += (m * ix86_cost->int_store[2]
+ 		     - ix86_cost->sse_store[sse_cost_idx]);
+ 	  igain -= vector_const_cost (src);
+ 	}
+       else
+ 	gcc_unreachable ();
+ 
+       if (igain != 0 && dump_file)
+ 	{
+ 	  fprintf (dump_file, "  Instruction gain %d for ", igain);
+ 	  dump_insn_slim (dump_file, insn);
+ 	}
+       gain += igain;
+     }
+ 
+   if (dump_file)
+     fprintf (dump_file, "  Instruction conversion gain: %d\n", gain);
+ 
+   /* Cost the integer to sse and sse to integer moves.  */
+   cost += n_sse_to_integer * ix86_cost->sse_to_integer;
+   /* ???  integer_to_sse but we only have that in the RA cost table.
+      Assume sse_to_integer/integer_to_sse are the same which they
+      are at the moment.  */
+   cost += n_integer_to_sse * ix86_cost->sse_to_integer;
+ 
+   if (dump_file)
+     fprintf (dump_file, "  Registers conversion cost: %d\n", cost);
+ 
+   gain -= cost;
+ 
+   if (dump_file)
+     fprintf (dump_file, "  Total gain: %d\n", gain);
+ 
+   return gain;
+ }
+ 
+ /* Insert generated conversion instruction sequence INSNS
+    after instruction AFTER.  New BB may be required in case
+    instruction has EH region attached.  */
+ 
+ void
+ scalar_chain::emit_conversion_insns (rtx insns, rtx_insn *after)
+ {
+   if (!control_flow_insn_p (after))
+     {
+       emit_insn_after (insns, after);
+       return;
+     }
+ 
+   basic_block bb = BLOCK_FOR_INSN (after);
+   edge e = find_fallthru_edge (bb->succs);
+   gcc_assert (e);
+ 
+   basic_block new_bb = split_edge (e);
+   emit_insn_after (insns, BB_HEAD (new_bb));
+ }
+ 
+ } // anon namespace
+ 
+ /* Generate the canonical SET_SRC to move GPR to a VMODE vector register,
+    zeroing the upper parts.  */
+ 
+ static rtx
+ gen_gpr_to_xmm_move_src (enum machine_mode vmode, rtx gpr)
+ {
+   switch (GET_MODE_NUNITS (vmode))
+     {
+     case 1:
+       /* We are not using this case currently.  */
+       gcc_unreachable ();
+     case 2:
+       return gen_rtx_VEC_CONCAT (vmode, gpr,
+ 				 CONST0_RTX (GET_MODE_INNER (vmode)));
+     default:
+       return gen_rtx_VEC_MERGE (vmode, gen_rtx_VEC_DUPLICATE (vmode, gpr),
+ 				CONST0_RTX (vmode), GEN_INT (HOST_WIDE_INT_1U));
+     }
+ }
+ 
+ /* Make vector copies for all register REGNO definitions
+    and replace its uses in a chain.  */
+ 
+ void
+ general_scalar_chain::make_vector_copies (rtx_insn *insn, rtx reg)
+ {
+   rtx vreg = *defs_map.get (reg);
+ 
+   start_sequence ();
+   if (!TARGET_INTER_UNIT_MOVES_TO_VEC)
+     {
+       rtx tmp = assign_386_stack_local (smode, SLOT_STV_TEMP);
+       if (smode == DImode && !TARGET_64BIT)
+ 	{
+ 	  emit_move_insn (adjust_address (tmp, SImode, 0),
+ 			  gen_rtx_SUBREG (SImode, reg, 0));
+ 	  emit_move_insn (adjust_address (tmp, SImode, 4),
+ 			  gen_rtx_SUBREG (SImode, reg, 4));
+ 	}
+       else
+ 	emit_move_insn (copy_rtx (tmp), reg);
+       emit_insn (gen_rtx_SET (gen_rtx_SUBREG (vmode, vreg, 0),
+ 			      gen_gpr_to_xmm_move_src (vmode, tmp)));
+     }
+   else if (!TARGET_64BIT && smode == DImode)
+     {
+       if (TARGET_SSE4_1)
+ 	{
+ 	  emit_insn (gen_sse2_loadld (gen_rtx_SUBREG (V4SImode, vreg, 0),
+ 				      CONST0_RTX (V4SImode),
+ 				      gen_rtx_SUBREG (SImode, reg, 0)));
+ 	  emit_insn (gen_sse4_1_pinsrd (gen_rtx_SUBREG (V4SImode, vreg, 0),
+ 					gen_rtx_SUBREG (V4SImode, vreg, 0),
+ 					gen_rtx_SUBREG (SImode, reg, 4),
+ 					GEN_INT (2)));
+ 	}
+       else
+ 	{
+ 	  rtx tmp = gen_reg_rtx (DImode);
+ 	  emit_insn (gen_sse2_loadld (gen_rtx_SUBREG (V4SImode, vreg, 0),
+ 				      CONST0_RTX (V4SImode),
+ 				      gen_rtx_SUBREG (SImode, reg, 0)));
+ 	  emit_insn (gen_sse2_loadld (gen_rtx_SUBREG (V4SImode, tmp, 0),
+ 				      CONST0_RTX (V4SImode),
+ 				      gen_rtx_SUBREG (SImode, reg, 4)));
+ 	  emit_insn (gen_vec_interleave_lowv4si
+ 		     (gen_rtx_SUBREG (V4SImode, vreg, 0),
+ 		      gen_rtx_SUBREG (V4SImode, vreg, 0),
+ 		      gen_rtx_SUBREG (V4SImode, tmp, 0)));
+ 	}
+     }
+   else
+     emit_insn (gen_rtx_SET (gen_rtx_SUBREG (vmode, vreg, 0),
+ 			    gen_gpr_to_xmm_move_src (vmode, reg)));
+   rtx_insn *seq = get_insns ();
+   end_sequence ();
+   emit_conversion_insns (seq, insn);
+ 
+   if (dump_file)
+     fprintf (dump_file,
+ 	     "  Copied r%d to a vector register r%d for insn %d\n",
+ 	     REGNO (reg), REGNO (vreg), INSN_UID (insn));
+ }
+ 
+ /* Copy the definition SRC of INSN inside the chain to DST for
+    scalar uses outside of the chain.  */
+ 
+ void
+ general_scalar_chain::convert_reg (rtx_insn *insn, rtx dst, rtx src)
+ {
+   start_sequence ();
+   if (!TARGET_INTER_UNIT_MOVES_FROM_VEC)
+     {
+       rtx tmp = assign_386_stack_local (smode, SLOT_STV_TEMP);
+       emit_move_insn (tmp, src);
+       if (!TARGET_64BIT && smode == DImode)
+ 	{
+ 	  emit_move_insn (gen_rtx_SUBREG (SImode, dst, 0),
+ 			  adjust_address (tmp, SImode, 0));
+ 	  emit_move_insn (gen_rtx_SUBREG (SImode, dst, 4),
+ 			  adjust_address (tmp, SImode, 4));
+ 	}
+       else
+ 	emit_move_insn (dst, copy_rtx (tmp));
+     }
+   else if (!TARGET_64BIT && smode == DImode)
+     {
+       if (TARGET_SSE4_1)
+ 	{
+ 	  rtx tmp = gen_rtx_PARALLEL (VOIDmode,
+ 				      gen_rtvec (1, const0_rtx));
+ 	  emit_insn
+ 	      (gen_rtx_SET
+ 	       (gen_rtx_SUBREG (SImode, dst, 0),
+ 		gen_rtx_VEC_SELECT (SImode,
+ 				    gen_rtx_SUBREG (V4SImode, src, 0),
+ 				    tmp)));
+ 
+ 	  tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, const1_rtx));
+ 	  emit_insn
+ 	      (gen_rtx_SET
+ 	       (gen_rtx_SUBREG (SImode, dst, 4),
+ 		gen_rtx_VEC_SELECT (SImode,
+ 				    gen_rtx_SUBREG (V4SImode, src, 0),
+ 				    tmp)));
+ 	}
+       else
+ 	{
+ 	  rtx vcopy = gen_reg_rtx (V2DImode);
+ 	  emit_move_insn (vcopy, gen_rtx_SUBREG (V2DImode, src, 0));
+ 	  emit_move_insn (gen_rtx_SUBREG (SImode, dst, 0),
+ 			  gen_rtx_SUBREG (SImode, vcopy, 0));
+ 	  emit_move_insn (vcopy,
+ 			  gen_rtx_LSHIFTRT (V2DImode,
+ 					    vcopy, GEN_INT (32)));
+ 	  emit_move_insn (gen_rtx_SUBREG (SImode, dst, 4),
+ 			  gen_rtx_SUBREG (SImode, vcopy, 0));
+ 	}
+     }
+   else
+     emit_move_insn (dst, src);
+ 
+   rtx_insn *seq = get_insns ();
+   end_sequence ();
+   emit_conversion_insns (seq, insn);
+ 
+   if (dump_file)
+     fprintf (dump_file,
+ 	     "  Copied r%d to a scalar register r%d for insn %d\n",
+ 	     REGNO (src), REGNO (dst), INSN_UID (insn));
+ }
+ 
+ /* Convert operand OP in INSN.  We should handle
+    memory operands and uninitialized registers.
+    All other register uses are converted during
+    registers conversion.  */
+ 
+ void
+ general_scalar_chain::convert_op (rtx *op, rtx_insn *insn)
+ {
+   *op = copy_rtx_if_shared (*op);
+ 
+   if (GET_CODE (*op) == NOT)
+     {
+       convert_op (&XEXP (*op, 0), insn);
+       PUT_MODE (*op, vmode);
+     }
+   else if (MEM_P (*op))
+     {
+       rtx tmp = gen_reg_rtx (GET_MODE (*op));
+ 
+       /* Handle movabs.  */
+       if (!memory_operand (*op, GET_MODE (*op)))
+ 	{
+ 	  rtx tmp2 = gen_reg_rtx (GET_MODE (*op));
+ 
+ 	  emit_insn_before (gen_rtx_SET (tmp2, *op), insn);
+ 	  *op = tmp2;
+ 	}
+ 
+       emit_insn_before (gen_rtx_SET (gen_rtx_SUBREG (vmode, tmp, 0),
+ 				     gen_gpr_to_xmm_move_src (vmode, *op)),
+ 			insn);
+       *op = gen_rtx_SUBREG (vmode, tmp, 0);
+ 
+       if (dump_file)
+ 	fprintf (dump_file, "  Preloading operand for insn %d into r%d\n",
+ 		 INSN_UID (insn), REGNO (tmp));
+     }
+   else if (REG_P (*op))
+     {
+       *op = gen_rtx_SUBREG (vmode, *op, 0);
+     }
+   else if (CONST_INT_P (*op))
+     {
+       rtx vec_cst;
+       rtx tmp = gen_rtx_SUBREG (vmode, gen_reg_rtx (smode), 0);
+ 
+       /* Prefer all ones vector in case of -1.  */
+       if (constm1_operand (*op, GET_MODE (*op)))
+ 	vec_cst = CONSTM1_RTX (vmode);
+       else
+ 	{
+ 	  unsigned n = GET_MODE_NUNITS (vmode);
+ 	  rtx *v = XALLOCAVEC (rtx, n);
+ 	  v[0] = *op;
+ 	  for (unsigned i = 1; i < n; ++i)
+ 	    v[i] = const0_rtx;
+ 	  vec_cst = gen_rtx_CONST_VECTOR (vmode, gen_rtvec_v (n, v));
+ 	}
+ 
+       if (!standard_sse_constant_p (vec_cst, vmode))
+ 	{
+ 	  start_sequence ();
+ 	  vec_cst = validize_mem (force_const_mem (vmode, vec_cst));
+ 	  rtx_insn *seq = get_insns ();
+ 	  end_sequence ();
+ 	  emit_insn_before (seq, insn);
+ 	}
+ 
+       emit_insn_before (gen_move_insn (copy_rtx (tmp), vec_cst), insn);
+       *op = tmp;
+     }
+   else
+     {
+       gcc_assert (SUBREG_P (*op));
+       gcc_assert (GET_MODE (*op) == vmode);
+     }
+ }
+ 
+ /* Convert INSN to vector mode.  */
+ 
+ void
+ general_scalar_chain::convert_insn (rtx_insn *insn)
+ {
+   /* Generate copies for out-of-chain uses of defs and adjust debug uses.  */
+   for (df_ref ref = DF_INSN_DEFS (insn); ref; ref = DF_REF_NEXT_LOC (ref))
+     if (bitmap_bit_p (defs_conv, DF_REF_REGNO (ref)))
+       {
+ 	df_link *use;
+ 	for (use = DF_REF_CHAIN (ref); use; use = use->next)
+ 	  if (NONDEBUG_INSN_P (DF_REF_INSN (use->ref))
+ 	      && (DF_REF_REG_MEM_P (use->ref)
+ 		  || !bitmap_bit_p (insns, DF_REF_INSN_UID (use->ref))))
+ 	    break;
+ 	if (use)
+ 	  convert_reg (insn, DF_REF_REG (ref),
+ 		       *defs_map.get (regno_reg_rtx [DF_REF_REGNO (ref)]));
+ 	else if (MAY_HAVE_DEBUG_BIND_INSNS)
+ 	  {
+ 	    /* If we generated a scalar copy we can leave debug-insns
+ 	       as-is, if not, we have to adjust them.  */
+ 	    auto_vec<rtx_insn *, 5> to_reset_debug_insns;
+ 	    for (use = DF_REF_CHAIN (ref); use; use = use->next)
+ 	      if (DEBUG_INSN_P (DF_REF_INSN (use->ref)))
+ 		{
+ 		  rtx_insn *debug_insn = DF_REF_INSN (use->ref);
+ 		  /* If there's a reaching definition outside of the
+ 		     chain we have to reset.  */
+ 		  df_link *def;
+ 		  for (def = DF_REF_CHAIN (use->ref); def; def = def->next)
+ 		    if (!bitmap_bit_p (insns, DF_REF_INSN_UID (def->ref)))
+ 		      break;
+ 		  if (def)
+ 		    to_reset_debug_insns.safe_push (debug_insn);
+ 		  else
+ 		    {
+ 		      *DF_REF_REAL_LOC (use->ref)
+ 			= *defs_map.get (regno_reg_rtx [DF_REF_REGNO (ref)]);
+ 		      df_insn_rescan (debug_insn);
+ 		    }
+ 		}
+ 	    /* Have to do the reset outside of the DF_CHAIN walk to not
+ 	       disrupt it.  */
+ 	    while (!to_reset_debug_insns.is_empty ())
+ 	      {
+ 		rtx_insn *debug_insn = to_reset_debug_insns.pop ();
+ 		INSN_VAR_LOCATION_LOC (debug_insn) = gen_rtx_UNKNOWN_VAR_LOC ();
+ 		df_insn_rescan_debug_internal (debug_insn);
+ 	      }
+ 	  }
+       }
+ 
+   /* Replace uses in this insn with the defs we use in the chain.  */
+   for (df_ref ref = DF_INSN_USES (insn); ref; ref = DF_REF_NEXT_LOC (ref))
+     if (!DF_REF_REG_MEM_P (ref))
+       if (rtx *vreg = defs_map.get (regno_reg_rtx[DF_REF_REGNO (ref)]))
+ 	{
+ 	  /* Also update a corresponding REG_DEAD note.  */
+ 	  rtx note = find_reg_note (insn, REG_DEAD, DF_REF_REG (ref));
+ 	  if (note)
+ 	    XEXP (note, 0) = *vreg;
+ 	  *DF_REF_REAL_LOC (ref) = *vreg;
+ 	}
+ 
+   rtx def_set = single_set (insn);
+   rtx src = SET_SRC (def_set);
+   rtx dst = SET_DEST (def_set);
+   rtx subreg;
+ 
+   if (MEM_P (dst) && !REG_P (src))
+     {
+       /* There are no scalar integer instructions and therefore
+ 	 temporary register usage is required.  */
+       rtx tmp = gen_reg_rtx (smode);
+       emit_conversion_insns (gen_move_insn (dst, tmp), insn);
+       dst = gen_rtx_SUBREG (vmode, tmp, 0);
+     }
+   else if (REG_P (dst))
+     {
+       /* Replace the definition with a SUBREG to the definition we
+          use inside the chain.  */
+       rtx *vdef = defs_map.get (dst);
+       if (vdef)
+ 	dst = *vdef;
+       dst = gen_rtx_SUBREG (vmode, dst, 0);
+       /* IRA doesn't like to have REG_EQUAL/EQUIV notes when the SET_DEST
+          is a non-REG_P.  So kill those off.  */
+       rtx note = find_reg_equal_equiv_note (insn);
+       if (note)
+ 	remove_note (insn, note);
+     }
+ 
+   switch (GET_CODE (src))
+     {
+     case ASHIFT:
+     case ASHIFTRT:
+     case LSHIFTRT:
+       convert_op (&XEXP (src, 0), insn);
+       PUT_MODE (src, vmode);
+       break;
+ 
+     case PLUS:
+     case MINUS:
+     case IOR:
+     case XOR:
+     case AND:
+     case SMAX:
+     case SMIN:
+     case UMAX:
+     case UMIN:
+       convert_op (&XEXP (src, 0), insn);
+       convert_op (&XEXP (src, 1), insn);
+       PUT_MODE (src, vmode);
+       break;
+ 
+     case NEG:
+       src = XEXP (src, 0);
+       convert_op (&src, insn);
+       subreg = gen_reg_rtx (vmode);
+       emit_insn_before (gen_move_insn (subreg, CONST0_RTX (vmode)), insn);
+       src = gen_rtx_MINUS (vmode, subreg, src);
+       break;
+ 
+     case NOT:
+       src = XEXP (src, 0);
+       convert_op (&src, insn);
+       subreg = gen_reg_rtx (vmode);
+       emit_insn_before (gen_move_insn (subreg, CONSTM1_RTX (vmode)), insn);
+       src = gen_rtx_XOR (vmode, src, subreg);
+       break;
+ 
+     case MEM:
+       if (!REG_P (dst))
+ 	convert_op (&src, insn);
+       break;
+ 
+     case REG:
+       if (!MEM_P (dst))
+ 	convert_op (&src, insn);
+       break;
+ 
+     case SUBREG:
+       gcc_assert (GET_MODE (src) == vmode);
+       break;
+ 
+     case COMPARE:
+       src = SUBREG_REG (XEXP (XEXP (src, 0), 0));
+ 
+       gcc_assert (REG_P (src) && GET_MODE (src) == DImode);
+       subreg = gen_rtx_SUBREG (V2DImode, src, 0);
+       emit_insn_before (gen_vec_interleave_lowv2di (copy_rtx_if_shared (subreg),
+ 						    copy_rtx_if_shared (subreg),
+ 						    copy_rtx_if_shared (subreg)),
+ 			insn);
+       dst = gen_rtx_REG (CCmode, FLAGS_REG);
+       src = gen_rtx_UNSPEC (CCmode, gen_rtvec (2, copy_rtx_if_shared (subreg),
+ 					       copy_rtx_if_shared (subreg)),
+ 			    UNSPEC_PTEST);
+       break;
+ 
+     case CONST_INT:
+       convert_op (&src, insn);
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   SET_SRC (def_set) = src;
+   SET_DEST (def_set) = dst;
+ 
+   /* Drop possible dead definitions.  */
+   PATTERN (insn) = def_set;
+ 
+   INSN_CODE (insn) = -1;
+   int patt = recog_memoized (insn);
+   if  (patt == -1)
+     fatal_insn_not_found (insn);
+   df_insn_rescan (insn);
+ }
+ 
+ /* Fix uses of converted REG in debug insns.  */
+ 
+ void
+ timode_scalar_chain::fix_debug_reg_uses (rtx reg)
+ {
+   if (!flag_var_tracking)
+     return;
+ 
+   df_ref ref, next;
+   for (ref = DF_REG_USE_CHAIN (REGNO (reg)); ref; ref = next)
+     {
+       rtx_insn *insn = DF_REF_INSN (ref);
+       /* Make sure the next ref is for a different instruction,
+          so that we're not affected by the rescan.  */
+       next = DF_REF_NEXT_REG (ref);
+       while (next && DF_REF_INSN (next) == insn)
+ 	next = DF_REF_NEXT_REG (next);
+ 
+       if (DEBUG_INSN_P (insn))
+ 	{
+ 	  /* It may be a debug insn with a TImode variable in
+ 	     register.  */
+ 	  bool changed = false;
+ 	  for (; ref != next; ref = DF_REF_NEXT_REG (ref))
+ 	    {
+ 	      rtx *loc = DF_REF_LOC (ref);
+ 	      if (REG_P (*loc) && GET_MODE (*loc) == V1TImode)
+ 		{
+ 		  *loc = gen_rtx_SUBREG (TImode, *loc, 0);
+ 		  changed = true;
+ 		}
+ 	    }
+ 	  if (changed)
+ 	    df_insn_rescan (insn);
+ 	}
+     }
+ }
+ 
+ /* Convert INSN from TImode to V1T1mode.  */
+ 
+ void
+ timode_scalar_chain::convert_insn (rtx_insn *insn)
+ {
+   rtx def_set = single_set (insn);
+   rtx src = SET_SRC (def_set);
+   rtx dst = SET_DEST (def_set);
+ 
+   switch (GET_CODE (dst))
+     {
+     case REG:
+       {
+ 	rtx tmp = find_reg_equal_equiv_note (insn);
+ 	if (tmp)
+ 	  PUT_MODE (XEXP (tmp, 0), V1TImode);
+ 	PUT_MODE (dst, V1TImode);
+ 	fix_debug_reg_uses (dst);
+       }
+       break;
+     case MEM:
+       PUT_MODE (dst, V1TImode);
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   switch (GET_CODE (src))
+     {
+     case REG:
+       PUT_MODE (src, V1TImode);
+       /* Call fix_debug_reg_uses only if SRC is never defined.  */
+       if (!DF_REG_DEF_CHAIN (REGNO (src)))
+ 	fix_debug_reg_uses (src);
+       break;
+ 
+     case MEM:
+       PUT_MODE (src, V1TImode);
+       break;
+ 
+     case CONST_WIDE_INT:
+       if (NONDEBUG_INSN_P (insn))
+ 	{
+ 	  /* Since there are no instructions to store 128-bit constant,
+ 	     temporary register usage is required.  */
+ 	  rtx tmp = gen_reg_rtx (V1TImode);
+ 	  start_sequence ();
+ 	  src = gen_rtx_CONST_VECTOR (V1TImode, gen_rtvec (1, src));
+ 	  src = validize_mem (force_const_mem (V1TImode, src));
+ 	  rtx_insn *seq = get_insns ();
+ 	  end_sequence ();
+ 	  if (seq)
+ 	    emit_insn_before (seq, insn);
+ 	  emit_conversion_insns (gen_rtx_SET (dst, tmp), insn);
+ 	  dst = tmp;
+ 	}
+       break;
+ 
+     case CONST_INT:
+       switch (standard_sse_constant_p (src, TImode))
+ 	{
+ 	case 1:
+ 	  src = CONST0_RTX (GET_MODE (dst));
+ 	  break;
+ 	case 2:
+ 	  src = CONSTM1_RTX (GET_MODE (dst));
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+       if (NONDEBUG_INSN_P (insn))
+ 	{
+ 	  rtx tmp = gen_reg_rtx (V1TImode);
+ 	  /* Since there are no instructions to store standard SSE
+ 	     constant, temporary register usage is required.  */
+ 	  emit_conversion_insns (gen_rtx_SET (dst, tmp), insn);
+ 	  dst = tmp;
+ 	}
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   SET_SRC (def_set) = src;
+   SET_DEST (def_set) = dst;
+ 
+   /* Drop possible dead definitions.  */
+   PATTERN (insn) = def_set;
+ 
+   INSN_CODE (insn) = -1;
+   recog_memoized (insn);
+   df_insn_rescan (insn);
+ }
+ 
+ /* Generate copies from defs used by the chain but not defined therein.
+    Also populates defs_map which is used later by convert_insn.  */
+ 
+ void
+ general_scalar_chain::convert_registers ()
+ {
+   bitmap_iterator bi;
+   unsigned id;
+   EXECUTE_IF_SET_IN_BITMAP (defs_conv, 0, id, bi)
+     {
+       rtx chain_reg = gen_reg_rtx (smode);
+       defs_map.put (regno_reg_rtx[id], chain_reg);
+     }
+   EXECUTE_IF_SET_IN_BITMAP (insns_conv, 0, id, bi)
+     for (df_ref ref = DF_INSN_UID_DEFS (id); ref; ref = DF_REF_NEXT_LOC (ref))
+       if (bitmap_bit_p (defs_conv, DF_REF_REGNO (ref)))
+ 	make_vector_copies (DF_REF_INSN (ref), DF_REF_REAL_REG (ref));
+ }
+ 
+ /* Convert whole chain creating required register
+    conversions and copies.  */
+ 
+ int
+ scalar_chain::convert ()
+ {
+   bitmap_iterator bi;
+   unsigned id;
+   int converted_insns = 0;
+ 
+   if (!dbg_cnt (stv_conversion))
+     return 0;
+ 
+   if (dump_file)
+     fprintf (dump_file, "Converting chain #%d...\n", chain_id);
+ 
+   convert_registers ();
+ 
+   EXECUTE_IF_SET_IN_BITMAP (insns, 0, id, bi)
+     {
+       convert_insn (DF_INSN_UID_GET (id)->insn);
+       converted_insns++;
+     }
+ 
+   return converted_insns;
+ }
+ 
+ /* Return 1 if INSN uses or defines a hard register.
+    Hard register uses in a memory address are ignored.
+    Clobbers and flags definitions are ignored.  */
+ 
+ static bool
+ has_non_address_hard_reg (rtx_insn *insn)
+ {
+   df_ref ref;
+   FOR_EACH_INSN_DEF (ref, insn)
+     if (HARD_REGISTER_P (DF_REF_REAL_REG (ref))
+ 	&& !DF_REF_FLAGS_IS_SET (ref, DF_REF_MUST_CLOBBER)
+ 	&& DF_REF_REGNO (ref) != FLAGS_REG)
+       return true;
+ 
+   FOR_EACH_INSN_USE (ref, insn)
+     if (!DF_REF_REG_MEM_P (ref) && HARD_REGISTER_P (DF_REF_REAL_REG (ref)))
+       return true;
+ 
+   return false;
+ }
+ 
+ /* Check if comparison INSN may be transformed
+    into vector comparison.  Currently we transform
+    zero checks only which look like:
+ 
+    (set (reg:CCZ 17 flags)
+         (compare:CCZ (ior:SI (subreg:SI (reg:DI x) 4)
+                              (subreg:SI (reg:DI x) 0))
+ 		     (const_int 0 [0])))  */
+ 
+ static bool
+ convertible_comparison_p (rtx_insn *insn, enum machine_mode mode)
+ {
+   /* ??? Currently convertible for double-word DImode chain only.  */
+   if (TARGET_64BIT || mode != DImode)
+     return false;
+ 
+   if (!TARGET_SSE4_1)
+     return false;
+ 
+   rtx def_set = single_set (insn);
+ 
+   gcc_assert (def_set);
+ 
+   rtx src = SET_SRC (def_set);
+   rtx dst = SET_DEST (def_set);
+ 
+   gcc_assert (GET_CODE (src) == COMPARE);
+ 
+   if (GET_CODE (dst) != REG
+       || REGNO (dst) != FLAGS_REG
+       || GET_MODE (dst) != CCZmode)
+     return false;
+ 
+   rtx op1 = XEXP (src, 0);
+   rtx op2 = XEXP (src, 1);
+ 
+   if (op2 != CONST0_RTX (GET_MODE (op2)))
+     return false;
+ 
+   if (GET_CODE (op1) != IOR)
+     return false;
+ 
+   op2 = XEXP (op1, 1);
+   op1 = XEXP (op1, 0);
+ 
+   if (!SUBREG_P (op1)
+       || !SUBREG_P (op2)
+       || GET_MODE (op1) != SImode
+       || GET_MODE (op2) != SImode
+       || ((SUBREG_BYTE (op1) != 0
+ 	   || SUBREG_BYTE (op2) != GET_MODE_SIZE (SImode))
+ 	  && (SUBREG_BYTE (op2) != 0
+ 	      || SUBREG_BYTE (op1) != GET_MODE_SIZE (SImode))))
+     return false;
+ 
+   op1 = SUBREG_REG (op1);
+   op2 = SUBREG_REG (op2);
+ 
+   if (op1 != op2
+       || !REG_P (op1)
+       || GET_MODE (op1) != DImode)
+     return false;
+ 
+   return true;
+ }
+ 
+ /* The general version of scalar_to_vector_candidate_p.  */
+ 
+ static bool
+ general_scalar_to_vector_candidate_p (rtx_insn *insn, enum machine_mode mode)
+ {
+   rtx def_set = single_set (insn);
+ 
+   if (!def_set)
+     return false;
+ 
+   if (has_non_address_hard_reg (insn))
+     return false;
+ 
+   rtx src = SET_SRC (def_set);
+   rtx dst = SET_DEST (def_set);
+ 
+   if (GET_CODE (src) == COMPARE)
+     return convertible_comparison_p (insn, mode);
+ 
+   /* We are interested in "mode" only.  */
+   if ((GET_MODE (src) != mode
+        && !CONST_INT_P (src))
+       || GET_MODE (dst) != mode)
+     return false;
+ 
+   if (!REG_P (dst) && !MEM_P (dst))
+     return false;
+ 
+   switch (GET_CODE (src))
+     {
+     case ASHIFTRT:
+       if (!TARGET_AVX512VL)
+ 	return false;
+       /* FALLTHRU */
+ 
+     case ASHIFT:
+     case LSHIFTRT:
+       if (!CONST_INT_P (XEXP (src, 1))
+ 	  || !IN_RANGE (INTVAL (XEXP (src, 1)), 0, GET_MODE_BITSIZE (mode)-1))
+ 	return false;
+       break;
+ 
+     case SMAX:
+     case SMIN:
+     case UMAX:
+     case UMIN:
+       if ((mode == DImode && !TARGET_AVX512VL)
+ 	  || (mode == SImode && !TARGET_SSE4_1))
+ 	return false;
+       /* Fallthru.  */
+ 
+     case PLUS:
+     case MINUS:
+     case IOR:
+     case XOR:
+     case AND:
+       if (!REG_P (XEXP (src, 1))
+ 	  && !MEM_P (XEXP (src, 1))
+ 	  && !CONST_INT_P (XEXP (src, 1)))
+ 	return false;
+ 
+       if (GET_MODE (XEXP (src, 1)) != mode
+ 	  && !CONST_INT_P (XEXP (src, 1)))
+ 	return false;
+       break;
+ 
+     case NEG:
+     case NOT:
+       break;
+ 
+     case REG:
+       return true;
+ 
+     case MEM:
+     case CONST_INT:
+       return REG_P (dst);
+ 
+     default:
+       return false;
+     }
+ 
+   if (!REG_P (XEXP (src, 0))
+       && !MEM_P (XEXP (src, 0))
+       && !CONST_INT_P (XEXP (src, 0))
+       /* Check for andnot case.  */
+       && (GET_CODE (src) != AND
+ 	  || GET_CODE (XEXP (src, 0)) != NOT
+ 	  || !REG_P (XEXP (XEXP (src, 0), 0))))
+       return false;
+ 
+   if (GET_MODE (XEXP (src, 0)) != mode
+       && !CONST_INT_P (XEXP (src, 0)))
+     return false;
+ 
+   return true;
+ }
+ 
+ /* The TImode version of scalar_to_vector_candidate_p.  */
+ 
+ static bool
+ timode_scalar_to_vector_candidate_p (rtx_insn *insn)
+ {
+   rtx def_set = single_set (insn);
+ 
+   if (!def_set)
+     return false;
+ 
+   if (has_non_address_hard_reg (insn))
+     return false;
+ 
+   rtx src = SET_SRC (def_set);
+   rtx dst = SET_DEST (def_set);
+ 
+   /* Only TImode load and store are allowed.  */
+   if (GET_MODE (dst) != TImode)
+     return false;
+ 
+   if (MEM_P (dst))
+     {
+       /* Check for store.  Memory must be aligned or unaligned store
+ 	 is optimal.  Only support store from register, standard SSE
+ 	 constant or CONST_WIDE_INT generated from piecewise store.
+ 
+ 	 ??? Verify performance impact before enabling CONST_INT for
+ 	 __int128 store.  */
+       if (misaligned_operand (dst, TImode)
+ 	  && !TARGET_SSE_UNALIGNED_STORE_OPTIMAL)
+ 	return false;
+ 
+       switch (GET_CODE (src))
+ 	{
+ 	default:
+ 	  return false;
+ 
+ 	case REG:
+ 	case CONST_WIDE_INT:
+ 	  return true;
+ 
+ 	case CONST_INT:
+ 	  return standard_sse_constant_p (src, TImode);
+ 	}
+     }
+   else if (MEM_P (src))
+     {
+       /* Check for load.  Memory must be aligned or unaligned load is
+ 	 optimal.  */
+       return (REG_P (dst)
+ 	      && (!misaligned_operand (src, TImode)
+ 		  || TARGET_SSE_UNALIGNED_LOAD_OPTIMAL));
+     }
+ 
+   return false;
+ }
+ 
+ /* For a register REGNO, scan instructions for its defs and uses.
+    Put REGNO in REGS if a def or use isn't in CANDIDATES.  */
+ 
+ static void
+ timode_check_non_convertible_regs (bitmap candidates, bitmap regs,
+ 				   unsigned int regno)
+ {
+   for (df_ref def = DF_REG_DEF_CHAIN (regno);
+        def;
+        def = DF_REF_NEXT_REG (def))
+     {
+       if (!bitmap_bit_p (candidates, DF_REF_INSN_UID (def)))
+ 	{
+ 	  if (dump_file)
+ 	    fprintf (dump_file,
+ 		     "r%d has non convertible def in insn %d\n",
+ 		     regno, DF_REF_INSN_UID (def));
+ 
+ 	  bitmap_set_bit (regs, regno);
+ 	  break;
+ 	}
+     }
+ 
+   for (df_ref ref = DF_REG_USE_CHAIN (regno);
+        ref;
+        ref = DF_REF_NEXT_REG (ref))
+     {
+       /* Debug instructions are skipped.  */
+       if (NONDEBUG_INSN_P (DF_REF_INSN (ref))
+ 	  && !bitmap_bit_p (candidates, DF_REF_INSN_UID (ref)))
+ 	{
+ 	  if (dump_file)
+ 	    fprintf (dump_file,
+ 		     "r%d has non convertible use in insn %d\n",
+ 		     regno, DF_REF_INSN_UID (ref));
+ 
+ 	  bitmap_set_bit (regs, regno);
+ 	  break;
+ 	}
+     }
+ }
+ 
+ /* The TImode version of remove_non_convertible_regs.  */
+ 
+ static void
+ timode_remove_non_convertible_regs (bitmap candidates)
+ {
+   bitmap_iterator bi;
+   unsigned id;
+   bitmap regs = BITMAP_ALLOC (NULL);
+ 
+   EXECUTE_IF_SET_IN_BITMAP (candidates, 0, id, bi)
+     {
+       rtx def_set = single_set (DF_INSN_UID_GET (id)->insn);
+       rtx dest = SET_DEST (def_set);
+       rtx src = SET_SRC (def_set);
+ 
+       if ((!REG_P (dest)
+ 	   || bitmap_bit_p (regs, REGNO (dest))
+ 	   || HARD_REGISTER_P (dest))
+ 	  && (!REG_P (src)
+ 	      || bitmap_bit_p (regs, REGNO (src))
+ 	      || HARD_REGISTER_P (src)))
+ 	continue;
+ 
+       if (REG_P (dest))
+ 	timode_check_non_convertible_regs (candidates, regs,
+ 					   REGNO (dest));
+ 
+       if (REG_P (src))
+ 	timode_check_non_convertible_regs (candidates, regs,
+ 					   REGNO (src));
+     }
+ 
+   EXECUTE_IF_SET_IN_BITMAP (regs, 0, id, bi)
+     {
+       for (df_ref def = DF_REG_DEF_CHAIN (id);
+ 	   def;
+ 	   def = DF_REF_NEXT_REG (def))
+ 	if (bitmap_bit_p (candidates, DF_REF_INSN_UID (def)))
+ 	  {
+ 	    if (dump_file)
+ 	      fprintf (dump_file, "Removing insn %d from candidates list\n",
+ 		       DF_REF_INSN_UID (def));
+ 
+ 	    bitmap_clear_bit (candidates, DF_REF_INSN_UID (def));
+ 	  }
+ 
+       for (df_ref ref = DF_REG_USE_CHAIN (id);
+ 	   ref;
+ 	   ref = DF_REF_NEXT_REG (ref))
+ 	if (bitmap_bit_p (candidates, DF_REF_INSN_UID (ref)))
+ 	  {
+ 	    if (dump_file)
+ 	      fprintf (dump_file, "Removing insn %d from candidates list\n",
+ 		       DF_REF_INSN_UID (ref));
+ 
+ 	    bitmap_clear_bit (candidates, DF_REF_INSN_UID (ref));
+ 	  }
+     }
+ 
+   BITMAP_FREE (regs);
+ }
+ 
+ /* Main STV pass function.  Find and convert scalar
+    instructions into vector mode when profitable.  */
+ 
+ static unsigned int
+ convert_scalars_to_vector (bool timode_p)
+ {
+   basic_block bb;
+   int converted_insns = 0;
+ 
+   bitmap_obstack_initialize (NULL);
+   const machine_mode cand_mode[3] = { SImode, DImode, TImode };
+   const machine_mode cand_vmode[3] = { V4SImode, V2DImode, V1TImode };
+   bitmap_head candidates[3];  /* { SImode, DImode, TImode } */
+   for (unsigned i = 0; i < 3; ++i)
+     bitmap_initialize (&candidates[i], &bitmap_default_obstack);
+ 
+   calculate_dominance_info (CDI_DOMINATORS);
+   df_set_flags (DF_DEFER_INSN_RESCAN);
+   df_chain_add_problem (DF_DU_CHAIN | DF_UD_CHAIN);
+   df_analyze ();
+ 
+   /* Find all instructions we want to convert into vector mode.  */
+   if (dump_file)
+     fprintf (dump_file, "Searching for mode conversion candidates...\n");
+ 
+   FOR_EACH_BB_FN (bb, cfun)
+     {
+       rtx_insn *insn;
+       FOR_BB_INSNS (bb, insn)
+ 	if (timode_p
+ 	    && timode_scalar_to_vector_candidate_p (insn))
+ 	  {
+ 	    if (dump_file)
+ 	      fprintf (dump_file, "  insn %d is marked as a TImode candidate\n",
+ 		       INSN_UID (insn));
+ 
+ 	    bitmap_set_bit (&candidates[2], INSN_UID (insn));
+ 	  }
+ 	else if (!timode_p)
+ 	  {
+ 	    /* Check {SI,DI}mode.  */
+ 	    for (unsigned i = 0; i <= 1; ++i)
+ 	      if (general_scalar_to_vector_candidate_p (insn, cand_mode[i]))
+ 		{
+ 		  if (dump_file)
+ 		    fprintf (dump_file, "  insn %d is marked as a %s candidate\n",
+ 			     INSN_UID (insn), i == 0 ? "SImode" : "DImode");
+ 
+ 		  bitmap_set_bit (&candidates[i], INSN_UID (insn));
+ 		  break;
+ 		}
+ 	  }
+     }
+ 
+   if (timode_p)
+     timode_remove_non_convertible_regs (&candidates[2]);
+ 
+   for (unsigned i = 0; i <= 2; ++i)
+     if (!bitmap_empty_p (&candidates[i]))
+       break;
+     else if (i == 2 && dump_file)
+       fprintf (dump_file, "There are no candidates for optimization.\n");
+ 
+   for (unsigned i = 0; i <= 2; ++i)
+     while (!bitmap_empty_p (&candidates[i]))
+       {
+ 	unsigned uid = bitmap_first_set_bit (&candidates[i]);
+ 	scalar_chain *chain;
+ 
+ 	if (cand_mode[i] == TImode)
+ 	  chain = new timode_scalar_chain;
+ 	else
+ 	  chain = new general_scalar_chain (cand_mode[i], cand_vmode[i]);
+ 
+ 	/* Find instructions chain we want to convert to vector mode.
+ 	   Check all uses and definitions to estimate all required
+ 	   conversions.  */
+ 	chain->build (&candidates[i], uid);
+ 
+ 	if (chain->compute_convert_gain () > 0)
+ 	  converted_insns += chain->convert ();
+ 	else
+ 	  if (dump_file)
+ 	    fprintf (dump_file, "Chain #%d conversion is not profitable\n",
+ 		     chain->chain_id);
+ 
+ 	delete chain;
+       }
+ 
+   if (dump_file)
+     fprintf (dump_file, "Total insns converted: %d\n", converted_insns);
+ 
+   for (unsigned i = 0; i <= 2; ++i)
+     bitmap_release (&candidates[i]);
+   bitmap_obstack_release (NULL);
+   df_process_deferred_rescans ();
+ 
+   /* Conversion means we may have 128bit register spills/fills
+      which require aligned stack.  */
+   if (converted_insns)
+     {
+       if (crtl->stack_alignment_needed < 128)
+ 	crtl->stack_alignment_needed = 128;
+       if (crtl->stack_alignment_estimated < 128)
+ 	crtl->stack_alignment_estimated = 128;
+ 
+       crtl->stack_realign_needed
+ 	= INCOMING_STACK_BOUNDARY < crtl->stack_alignment_estimated;
+       crtl->stack_realign_tried = crtl->stack_realign_needed;
+ 
+       crtl->stack_realign_processed = true;
+ 
+       if (!crtl->drap_reg)
+ 	{
+ 	  rtx drap_rtx = targetm.calls.get_drap_rtx ();
+ 
+ 	  /* stack_realign_drap and drap_rtx must match.  */
+ 	  gcc_assert ((stack_realign_drap != 0) == (drap_rtx != NULL));
+ 
+ 	  /* Do nothing if NULL is returned,
+ 	     which means DRAP is not needed.  */
+ 	  if (drap_rtx != NULL)
+ 	    {
+ 	      crtl->args.internal_arg_pointer = drap_rtx;
+ 
+ 	      /* Call fixup_tail_calls to clean up
+ 		 REG_EQUIV note if DRAP is needed. */
+ 	      fixup_tail_calls ();
+ 	    }
+ 	}
+ 
+       /* Fix up DECL_RTL/DECL_INCOMING_RTL of arguments.  */
+       if (TARGET_64BIT)
+ 	for (tree parm = DECL_ARGUMENTS (current_function_decl);
+ 	     parm; parm = DECL_CHAIN (parm))
+ 	  {
+ 	    if (TYPE_MODE (TREE_TYPE (parm)) != TImode)
+ 	      continue;
+ 	    if (DECL_RTL_SET_P (parm)
+ 		&& GET_MODE (DECL_RTL (parm)) == V1TImode)
+ 	      {
+ 		rtx r = DECL_RTL (parm);
+ 		if (REG_P (r))
+ 		  SET_DECL_RTL (parm, gen_rtx_SUBREG (TImode, r, 0));
+ 	      }
+ 	    if (DECL_INCOMING_RTL (parm)
+ 		&& GET_MODE (DECL_INCOMING_RTL (parm)) == V1TImode)
+ 	      {
+ 		rtx r = DECL_INCOMING_RTL (parm);
+ 		if (REG_P (r))
+ 		  DECL_INCOMING_RTL (parm) = gen_rtx_SUBREG (TImode, r, 0);
+ 	      }
+ 	  }
+     }
+ 
+   return 0;
+ }
+ 
+ /* Modify the vzeroupper pattern in INSN so that it describes the effect
+    that the instruction has on the SSE registers.  LIVE_REGS are the set
+    of registers that are live across the instruction.
+ 
+    For a live register R we use:
+ 
+      (set (reg:V2DF R) (reg:V2DF R))
+ 
+    which preserves the low 128 bits but clobbers the upper bits.  */
+ 
+ static void
+ ix86_add_reg_usage_to_vzeroupper (rtx_insn *insn, bitmap live_regs)
+ {
+   rtx pattern = PATTERN (insn);
+   unsigned int nregs = TARGET_64BIT ? 16 : 8;
+   unsigned int npats = nregs;
+   for (unsigned int i = 0; i < nregs; ++i)
+     {
+       unsigned int regno = GET_SSE_REGNO (i);
+       if (!bitmap_bit_p (live_regs, regno))
+ 	npats--;
+     }
+   if (npats == 0)
+     return;
+   rtvec vec = rtvec_alloc (npats + 1);
+   RTVEC_ELT (vec, 0) = XVECEXP (pattern, 0, 0);
+   for (unsigned int i = 0, j = 0; i < nregs; ++i)
+     {
+       unsigned int regno = GET_SSE_REGNO (i);
+       if (!bitmap_bit_p (live_regs, regno))
+ 	continue;
+       rtx reg = gen_rtx_REG (V2DImode, regno);
+       ++j;
+       RTVEC_ELT (vec, j) = gen_rtx_SET (reg, reg);
+     }
+   XVEC (pattern, 0) = vec;
+   INSN_CODE (insn) = -1;
+   df_insn_rescan (insn);
+ }
+ 
+ /* Walk the vzeroupper instructions in the function and annotate them
+    with the effect that they have on the SSE registers.  */
+ 
+ static void
+ ix86_add_reg_usage_to_vzerouppers (void)
+ {
+   basic_block bb;
+   rtx_insn *insn;
+   auto_bitmap live_regs;
+ 
+   df_analyze ();
+   FOR_EACH_BB_FN (bb, cfun)
+     {
+       bitmap_copy (live_regs, df_get_live_out (bb));
+       df_simulate_initialize_backwards (bb, live_regs);
+       FOR_BB_INSNS_REVERSE (bb, insn)
+ 	{
+ 	  if (!NONDEBUG_INSN_P (insn))
+ 	    continue;
+ 	  if (vzeroupper_pattern (PATTERN (insn), VOIDmode))
+ 	    ix86_add_reg_usage_to_vzeroupper (insn, live_regs);
+ 	  df_simulate_one_insn_backwards (bb, insn, live_regs);
+ 	}
+     }
+ }
+ 
+ static unsigned int
+ rest_of_handle_insert_vzeroupper (void)
+ {
+   int i;
+ 
+   /* vzeroupper instructions are inserted immediately after reload to
+      account for possible spills from 256bit or 512bit registers.  The pass
+      reuses mode switching infrastructure by re-running mode insertion
+      pass, so disable entities that have already been processed.  */
+   for (i = 0; i < MAX_386_ENTITIES; i++)
+     ix86_optimize_mode_switching[i] = 0;
+ 
+   ix86_optimize_mode_switching[AVX_U128] = 1;
+ 
+   /* Call optimize_mode_switching.  */
+   g->get_passes ()->execute_pass_mode_switching ();
+   ix86_add_reg_usage_to_vzerouppers ();
+   return 0;
+ }
+ 
+ namespace {
+ 
+ const pass_data pass_data_insert_vzeroupper =
+ {
+   RTL_PASS, /* type */
+   "vzeroupper", /* name */
+   OPTGROUP_NONE, /* optinfo_flags */
+   TV_MACH_DEP, /* tv_id */
+   0, /* properties_required */
+   0, /* properties_provided */
+   0, /* properties_destroyed */
+   0, /* todo_flags_start */
+   TODO_df_finish, /* todo_flags_finish */
+ };
+ 
+ class pass_insert_vzeroupper : public rtl_opt_pass
+ {
+ public:
+   pass_insert_vzeroupper(gcc::context *ctxt)
+     : rtl_opt_pass(pass_data_insert_vzeroupper, ctxt)
+   {}
+ 
+   /* opt_pass methods: */
+   virtual bool gate (function *)
+     {
+       return TARGET_AVX
+ 	     && TARGET_VZEROUPPER && flag_expensive_optimizations
+ 	     && !optimize_size;
+     }
+ 
+   virtual unsigned int execute (function *)
+     {
+       return rest_of_handle_insert_vzeroupper ();
+     }
+ 
+ }; // class pass_insert_vzeroupper
+ 
+ const pass_data pass_data_stv =
+ {
+   RTL_PASS, /* type */
+   "stv", /* name */
+   OPTGROUP_NONE, /* optinfo_flags */
+   TV_MACH_DEP, /* tv_id */
+   0, /* properties_required */
+   0, /* properties_provided */
+   0, /* properties_destroyed */
+   0, /* todo_flags_start */
+   TODO_df_finish, /* todo_flags_finish */
+ };
+ 
+ class pass_stv : public rtl_opt_pass
+ {
+ public:
+   pass_stv (gcc::context *ctxt)
+     : rtl_opt_pass (pass_data_stv, ctxt),
+       timode_p (false)
+   {}
+ 
+   /* opt_pass methods: */
+   virtual bool gate (function *)
+     {
+       return ((!timode_p || TARGET_64BIT)
+ 	      && TARGET_STV && TARGET_SSE2 && optimize > 1);
+     }
+ 
+   virtual unsigned int execute (function *)
+     {
+       return convert_scalars_to_vector (timode_p);
+     }
+ 
+   opt_pass *clone ()
+     {
+       return new pass_stv (m_ctxt);
+     }
+ 
+   void set_pass_param (unsigned int n, bool param)
+     {
+       gcc_assert (n == 0);
+       timode_p = param;
+     }
+ 
+ private:
+   bool timode_p;
+ }; // class pass_stv
+ 
+ } // anon namespace
+ 
+ rtl_opt_pass *
+ make_pass_insert_vzeroupper (gcc::context *ctxt)
+ {
+   return new pass_insert_vzeroupper (ctxt);
+ }
+ 
+ rtl_opt_pass *
+ make_pass_stv (gcc::context *ctxt)
+ {
+   return new pass_stv (ctxt);
+ }
+ 
+ /* Inserting ENDBRANCH instructions.  */
+ 
+ static unsigned int
+ rest_of_insert_endbranch (void)
+ {
+   timevar_push (TV_MACH_DEP);
+ 
+   rtx cet_eb;
+   rtx_insn *insn;
+   basic_block bb;
+ 
+   /* Currently emit EB if it's a tracking function, i.e. 'nocf_check' is
+      absent among function attributes.  Later an optimization will be
+      introduced to make analysis if an address of a static function is
+      taken.  A static function whose address is not taken will get a
+      nocf_check attribute.  This will allow to reduce the number of EB.  */
+ 
+   if (!lookup_attribute ("nocf_check",
+ 			 TYPE_ATTRIBUTES (TREE_TYPE (cfun->decl)))
+       && (!flag_manual_endbr
+ 	  || lookup_attribute ("cf_check",
+ 			       DECL_ATTRIBUTES (cfun->decl)))
+       && (!cgraph_node::get (cfun->decl)->only_called_directly_p ()
+ 	  || ix86_cmodel == CM_LARGE
+ 	  || ix86_cmodel == CM_LARGE_PIC
+ 	  || flag_force_indirect_call
+ 	  || (TARGET_DLLIMPORT_DECL_ATTRIBUTES
+ 	      && DECL_DLLIMPORT_P (cfun->decl))))
+     {
+       /* Queue ENDBR insertion to x86_function_profiler.  */
+       if (crtl->profile && flag_fentry)
+ 	cfun->machine->endbr_queued_at_entrance = true;
+       else
+ 	{
+ 	  cet_eb = gen_nop_endbr ();
+ 
+ 	  bb = ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb;
+ 	  insn = BB_HEAD (bb);
+ 	  emit_insn_before (cet_eb, insn);
+ 	}
+     }
+ 
+   bb = 0;
+   FOR_EACH_BB_FN (bb, cfun)
+     {
+       for (insn = BB_HEAD (bb); insn != NEXT_INSN (BB_END (bb));
+ 	   insn = NEXT_INSN (insn))
+ 	{
+ 	  if (CALL_P (insn))
+ 	    {
+ 	      bool need_endbr;
+ 	      need_endbr = find_reg_note (insn, REG_SETJMP, NULL) != NULL;
+ 	      if (!need_endbr && !SIBLING_CALL_P (insn))
+ 		{
+ 		  rtx call = get_call_rtx_from (insn);
+ 		  rtx fnaddr = XEXP (call, 0);
+ 		  tree fndecl = NULL_TREE;
+ 
+ 		  /* Also generate ENDBRANCH for non-tail call which
+ 		     may return via indirect branch.  */
+ 		  if (GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF)
+ 		    fndecl = SYMBOL_REF_DECL (XEXP (fnaddr, 0));
+ 		  if (fndecl == NULL_TREE)
+ 		    fndecl = MEM_EXPR (fnaddr);
+ 		  if (fndecl
+ 		      && TREE_CODE (TREE_TYPE (fndecl)) != FUNCTION_TYPE
+ 		      && TREE_CODE (TREE_TYPE (fndecl)) != METHOD_TYPE)
+ 		    fndecl = NULL_TREE;
+ 		  if (fndecl && TYPE_ARG_TYPES (TREE_TYPE (fndecl)))
+ 		    {
+ 		      tree fntype = TREE_TYPE (fndecl);
+ 		      if (lookup_attribute ("indirect_return",
+ 					    TYPE_ATTRIBUTES (fntype)))
+ 			need_endbr = true;
+ 		    }
+ 		}
+ 	      if (!need_endbr)
+ 		continue;
+ 	      /* Generate ENDBRANCH after CALL, which can return more than
+ 		 twice, setjmp-like functions.  */
+ 
+ 	      cet_eb = gen_nop_endbr ();
+ 	      emit_insn_after_setloc (cet_eb, insn, INSN_LOCATION (insn));
+ 	      continue;
+ 	    }
+ 
+ 	  if (JUMP_P (insn) && flag_cet_switch)
+ 	    {
+ 	      rtx target = JUMP_LABEL (insn);
+ 	      if (target == NULL_RTX || ANY_RETURN_P (target))
+ 		continue;
+ 
+ 	      /* Check the jump is a switch table.  */
+ 	      rtx_insn *label = as_a<rtx_insn *> (target);
+ 	      rtx_insn *table = next_insn (label);
+ 	      if (table == NULL_RTX || !JUMP_TABLE_DATA_P (table))
+ 		continue;
+ 
+ 	      /* For the indirect jump find out all places it jumps and insert
+ 		 ENDBRANCH there.  It should be done under a special flag to
+ 		 control ENDBRANCH generation for switch stmts.  */
+ 	      edge_iterator ei;
+ 	      edge e;
+ 	      basic_block dest_blk;
+ 
+ 	      FOR_EACH_EDGE (e, ei, bb->succs)
+ 		{
+ 		  rtx_insn *insn;
+ 
+ 		  dest_blk = e->dest;
+ 		  insn = BB_HEAD (dest_blk);
+ 		  gcc_assert (LABEL_P (insn));
+ 		  cet_eb = gen_nop_endbr ();
+ 		  emit_insn_after (cet_eb, insn);
+ 		}
+ 	      continue;
+ 	    }
+ 
+ 	  if (LABEL_P (insn) && LABEL_PRESERVE_P (insn))
+ 	    {
+ 	      cet_eb = gen_nop_endbr ();
+ 	      emit_insn_after (cet_eb, insn);
+ 	      continue;
+ 	    }
+ 	}
+     }
+ 
+   timevar_pop (TV_MACH_DEP);
+   return 0;
+ }
+ 
+ namespace {
+ 
+ const pass_data pass_data_insert_endbranch =
+ {
+   RTL_PASS, /* type.  */
+   "cet", /* name.  */
+   OPTGROUP_NONE, /* optinfo_flags.  */
+   TV_MACH_DEP, /* tv_id.  */
+   0, /* properties_required.  */
+   0, /* properties_provided.  */
+   0, /* properties_destroyed.  */
+   0, /* todo_flags_start.  */
+   0, /* todo_flags_finish.  */
+ };
+ 
+ class pass_insert_endbranch : public rtl_opt_pass
+ {
+ public:
+   pass_insert_endbranch (gcc::context *ctxt)
+     : rtl_opt_pass (pass_data_insert_endbranch, ctxt)
+   {}
+ 
+   /* opt_pass methods: */
+   virtual bool gate (function *)
+     {
+       return ((flag_cf_protection & CF_BRANCH));
+     }
+ 
+   virtual unsigned int execute (function *)
+     {
+       return rest_of_insert_endbranch ();
+     }
+ 
+ }; // class pass_insert_endbranch
+ 
+ } // anon namespace
+ 
+ rtl_opt_pass *
+ make_pass_insert_endbranch (gcc::context *ctxt)
+ {
+   return new pass_insert_endbranch (ctxt);
+ }
+ 
+ /* At entry of the nearest common dominator for basic blocks with
+    conversions, generate a single
+ 	vxorps %xmmN, %xmmN, %xmmN
+    for all
+ 	vcvtss2sd  op, %xmmN, %xmmX
+ 	vcvtsd2ss  op, %xmmN, %xmmX
+ 	vcvtsi2ss  op, %xmmN, %xmmX
+ 	vcvtsi2sd  op, %xmmN, %xmmX
+ 
+    NB: We want to generate only a single vxorps to cover the whole
+    function.  The LCM algorithm isn't appropriate here since it may
+    place a vxorps inside the loop.  */
+ 
+ static unsigned int
+ remove_partial_avx_dependency (void)
+ {
+   timevar_push (TV_MACH_DEP);
+ 
+   bitmap_obstack_initialize (NULL);
+   bitmap convert_bbs = BITMAP_ALLOC (NULL);
+ 
+   basic_block bb;
+   rtx_insn *insn, *set_insn;
+   rtx set;
+   rtx v4sf_const0 = NULL_RTX;
+ 
+   auto_vec<rtx_insn *> control_flow_insns;
+ 
+   FOR_EACH_BB_FN (bb, cfun)
+     {
+       FOR_BB_INSNS (bb, insn)
+ 	{
+ 	  if (!NONDEBUG_INSN_P (insn))
+ 	    continue;
+ 
+ 	  set = single_set (insn);
+ 	  if (!set)
+ 	    continue;
+ 
+ 	  if (get_attr_avx_partial_xmm_update (insn)
+ 	      != AVX_PARTIAL_XMM_UPDATE_TRUE)
+ 	    continue;
+ 
+ 	  if (!v4sf_const0)
+ 	    {
+ 	      calculate_dominance_info (CDI_DOMINATORS);
+ 	      df_set_flags (DF_DEFER_INSN_RESCAN);
+ 	      df_chain_add_problem (DF_DU_CHAIN | DF_UD_CHAIN);
+ 	      df_md_add_problem ();
+ 	      df_analyze ();
+ 	      v4sf_const0 = gen_reg_rtx (V4SFmode);
+ 	    }
+ 
+ 	  /* Convert PARTIAL_XMM_UPDATE_TRUE insns, DF -> SF, SF -> DF,
+ 	     SI -> SF, SI -> DF, DI -> SF, DI -> DF, to vec_dup and
+ 	     vec_merge with subreg.  */
+ 	  rtx src = SET_SRC (set);
+ 	  rtx dest = SET_DEST (set);
+ 	  machine_mode dest_mode = GET_MODE (dest);
+ 
+ 	  rtx zero;
+ 	  machine_mode dest_vecmode;
+ 	  if (dest_mode == E_SFmode)
+ 	    {
+ 	      dest_vecmode = V4SFmode;
+ 	      zero = v4sf_const0;
+ 	    }
+ 	  else
+ 	    {
+ 	      dest_vecmode = V2DFmode;
+ 	      zero = gen_rtx_SUBREG (V2DFmode, v4sf_const0, 0);
+ 	    }
+ 
+ 	  /* Change source to vector mode.  */
+ 	  src = gen_rtx_VEC_DUPLICATE (dest_vecmode, src);
+ 	  src = gen_rtx_VEC_MERGE (dest_vecmode, src, zero,
+ 				   GEN_INT (HOST_WIDE_INT_1U));
+ 	  /* Change destination to vector mode.  */
+ 	  rtx vec = gen_reg_rtx (dest_vecmode);
+ 	  /* Generate an XMM vector SET.  */
+ 	  set = gen_rtx_SET (vec, src);
+ 	  set_insn = emit_insn_before (set, insn);
+ 	  df_insn_rescan (set_insn);
+ 
+ 	  if (cfun->can_throw_non_call_exceptions)
+ 	    {
+ 	      /* Handle REG_EH_REGION note.  */
+ 	      rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
+ 	      if (note)
+ 		{
+ 		  control_flow_insns.safe_push (set_insn);
+ 		  add_reg_note (set_insn, REG_EH_REGION, XEXP (note, 0));
+ 		}
+ 	    }
+ 
+ 	  src = gen_rtx_SUBREG (dest_mode, vec, 0);
+ 	  set = gen_rtx_SET (dest, src);
+ 
+ 	  /* Drop possible dead definitions.  */
+ 	  PATTERN (insn) = set;
+ 
+ 	  INSN_CODE (insn) = -1;
+ 	  recog_memoized (insn);
+ 	  df_insn_rescan (insn);
+ 	  bitmap_set_bit (convert_bbs, bb->index);
+ 	}
+     }
+ 
+   if (v4sf_const0)
+     {
+       /* (Re-)discover loops so that bb->loop_father can be used in the
+ 	 analysis below.  */
+       loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
+ 
+       /* Generate a vxorps at entry of the nearest dominator for basic
+ 	 blocks with conversions, which is in the fake loop that
+ 	 contains the whole function, so that there is only a single
+ 	 vxorps in the whole function.   */
+       bb = nearest_common_dominator_for_set (CDI_DOMINATORS,
+ 					     convert_bbs);
+       while (bb->loop_father->latch
+ 	     != EXIT_BLOCK_PTR_FOR_FN (cfun))
+ 	bb = get_immediate_dominator (CDI_DOMINATORS,
+ 				      bb->loop_father->header);
+ 
+       set = gen_rtx_SET (v4sf_const0, CONST0_RTX (V4SFmode));
+ 
+       insn = BB_HEAD (bb);
+       while (insn && !NONDEBUG_INSN_P (insn))
+ 	{
+ 	  if (insn == BB_END (bb))
+ 	    {
+ 	      insn = NULL;
+ 	      break;
+ 	    }
+ 	  insn = NEXT_INSN (insn);
+ 	}
+       if (insn == BB_HEAD (bb))
+         set_insn = emit_insn_before (set, insn);
+       else
+ 	set_insn = emit_insn_after (set,
+ 				    insn ? PREV_INSN (insn) : BB_END (bb));
+       df_insn_rescan (set_insn);
+       df_process_deferred_rescans ();
+       loop_optimizer_finalize ();
+ 
+       if (!control_flow_insns.is_empty ())
+ 	{
+ 	  free_dominance_info (CDI_DOMINATORS);
+ 
+ 	  unsigned int i;
+ 	  FOR_EACH_VEC_ELT (control_flow_insns, i, insn)
+ 	    if (control_flow_insn_p (insn))
+ 	      {
+ 		/* Split the block after insn.  There will be a fallthru
+ 		   edge, which is OK so we keep it.  We have to create
+ 		   the exception edges ourselves.  */
+ 		bb = BLOCK_FOR_INSN (insn);
+ 		split_block (bb, insn);
+ 		rtl_make_eh_edge (NULL, bb, BB_END (bb));
+ 	      }
+ 	}
+     }
+ 
+   bitmap_obstack_release (NULL);
+   BITMAP_FREE (convert_bbs);
+ 
+   timevar_pop (TV_MACH_DEP);
+   return 0;
+ }
+ 
+ namespace {
+ 
+ const pass_data pass_data_remove_partial_avx_dependency =
+ {
+   RTL_PASS, /* type */
+   "rpad", /* name */
+   OPTGROUP_NONE, /* optinfo_flags */
+   TV_MACH_DEP, /* tv_id */
+   0, /* properties_required */
+   0, /* properties_provided */
+   0, /* properties_destroyed */
+   0, /* todo_flags_start */
+   TODO_df_finish, /* todo_flags_finish */
+ };
+ 
+ class pass_remove_partial_avx_dependency : public rtl_opt_pass
+ {
+ public:
+   pass_remove_partial_avx_dependency (gcc::context *ctxt)
+     : rtl_opt_pass (pass_data_remove_partial_avx_dependency, ctxt)
+   {}
+ 
+   /* opt_pass methods: */
+   virtual bool gate (function *)
+     {
+       return (TARGET_AVX
+ 	      && TARGET_SSE_PARTIAL_REG_DEPENDENCY
+ 	      && TARGET_SSE_MATH
+ 	      && optimize
+ 	      && optimize_function_for_speed_p (cfun));
+     }
+ 
+   virtual unsigned int execute (function *)
+     {
+       return remove_partial_avx_dependency ();
+     }
+ }; // class pass_rpad
+ 
+ } // anon namespace
+ 
+ rtl_opt_pass *
+ make_pass_remove_partial_avx_dependency (gcc::context *ctxt)
+ {
+   return new pass_remove_partial_avx_dependency (ctxt);
+ }
+ 
+ /* This compares the priority of target features in function DECL1
+    and DECL2.  It returns positive value if DECL1 is higher priority,
+    negative value if DECL2 is higher priority and 0 if they are the
+    same.  */
+ 
+ int
+ ix86_compare_version_priority (tree decl1, tree decl2)
+ {
+   unsigned int priority1 = get_builtin_code_for_version (decl1, NULL);
+   unsigned int priority2 = get_builtin_code_for_version (decl2, NULL);
+ 
+   return (int)priority1 - (int)priority2;
+ }
+ 
+ /* V1 and V2 point to function versions with different priorities
+    based on the target ISA.  This function compares their priorities.  */
+  
+ static int
+ feature_compare (const void *v1, const void *v2)
+ {
+   typedef struct _function_version_info
+     {
+       tree version_decl;
+       tree predicate_chain;
+       unsigned int dispatch_priority;
+     } function_version_info;
+ 
+   const function_version_info c1 = *(const function_version_info *)v1;
+   const function_version_info c2 = *(const function_version_info *)v2;
+   return (c2.dispatch_priority - c1.dispatch_priority);
+ }
+ 
+ /* This adds a condition to the basic_block NEW_BB in function FUNCTION_DECL
+    to return a pointer to VERSION_DECL if the outcome of the expression
+    formed by PREDICATE_CHAIN is true.  This function will be called during
+    version dispatch to decide which function version to execute.  It returns
+    the basic block at the end, to which more conditions can be added.  */
+ 
+ static basic_block
+ add_condition_to_bb (tree function_decl, tree version_decl,
+ 		     tree predicate_chain, basic_block new_bb)
+ {
+   gimple *return_stmt;
+   tree convert_expr, result_var;
+   gimple *convert_stmt;
+   gimple *call_cond_stmt;
+   gimple *if_else_stmt;
+ 
+   basic_block bb1, bb2, bb3;
+   edge e12, e23;
+ 
+   tree cond_var, and_expr_var = NULL_TREE;
+   gimple_seq gseq;
+ 
+   tree predicate_decl, predicate_arg;
+ 
+   push_cfun (DECL_STRUCT_FUNCTION (function_decl));
+ 
+   gcc_assert (new_bb != NULL);
+   gseq = bb_seq (new_bb);
+ 
+ 
+   convert_expr = build1 (CONVERT_EXPR, ptr_type_node,
+ 	     		 build_fold_addr_expr (version_decl));
+   result_var = create_tmp_var (ptr_type_node);
+   convert_stmt = gimple_build_assign (result_var, convert_expr); 
+   return_stmt = gimple_build_return (result_var);
+ 
+   if (predicate_chain == NULL_TREE)
+     {
+       gimple_seq_add_stmt (&gseq, convert_stmt);
+       gimple_seq_add_stmt (&gseq, return_stmt);
+       set_bb_seq (new_bb, gseq);
+       gimple_set_bb (convert_stmt, new_bb);
+       gimple_set_bb (return_stmt, new_bb);
+       pop_cfun ();
+       return new_bb;
+     }
+ 
+   while (predicate_chain != NULL)
+     {
+       cond_var = create_tmp_var (integer_type_node);
+       predicate_decl = TREE_PURPOSE (predicate_chain);
+       predicate_arg = TREE_VALUE (predicate_chain);
+       call_cond_stmt = gimple_build_call (predicate_decl, 1, predicate_arg);
+       gimple_call_set_lhs (call_cond_stmt, cond_var);
+ 
+       gimple_set_block (call_cond_stmt, DECL_INITIAL (function_decl));
+       gimple_set_bb (call_cond_stmt, new_bb);
+       gimple_seq_add_stmt (&gseq, call_cond_stmt);
+ 
+       predicate_chain = TREE_CHAIN (predicate_chain);
+       
+       if (and_expr_var == NULL)
+         and_expr_var = cond_var;
+       else
+ 	{
+ 	  gimple *assign_stmt;
+ 	  /* Use MIN_EXPR to check if any integer is zero?.
+ 	     and_expr_var = min_expr <cond_var, and_expr_var>  */
+ 	  assign_stmt = gimple_build_assign (and_expr_var,
+ 			  build2 (MIN_EXPR, integer_type_node,
+ 				  cond_var, and_expr_var));
+ 
+ 	  gimple_set_block (assign_stmt, DECL_INITIAL (function_decl));
+ 	  gimple_set_bb (assign_stmt, new_bb);
+ 	  gimple_seq_add_stmt (&gseq, assign_stmt);
+ 	}
+     }
+ 
+   if_else_stmt = gimple_build_cond (GT_EXPR, and_expr_var,
+ 	  		            integer_zero_node,
+ 				    NULL_TREE, NULL_TREE);
+   gimple_set_block (if_else_stmt, DECL_INITIAL (function_decl));
+   gimple_set_bb (if_else_stmt, new_bb);
+   gimple_seq_add_stmt (&gseq, if_else_stmt);
+ 
+   gimple_seq_add_stmt (&gseq, convert_stmt);
+   gimple_seq_add_stmt (&gseq, return_stmt);
+   set_bb_seq (new_bb, gseq);
+ 
+   bb1 = new_bb;
+   e12 = split_block (bb1, if_else_stmt);
+   bb2 = e12->dest;
+   e12->flags &= ~EDGE_FALLTHRU;
+   e12->flags |= EDGE_TRUE_VALUE;
+ 
+   e23 = split_block (bb2, return_stmt);
+ 
+   gimple_set_bb (convert_stmt, bb2);
+   gimple_set_bb (return_stmt, bb2);
+ 
+   bb3 = e23->dest;
+   make_edge (bb1, bb3, EDGE_FALSE_VALUE); 
+ 
+   remove_edge (e23);
+   make_edge (bb2, EXIT_BLOCK_PTR_FOR_FN (cfun), 0);
+ 
+   pop_cfun ();
+ 
+   return bb3;
+ }
+ 
+ /* This function generates the dispatch function for
+    multi-versioned functions.  DISPATCH_DECL is the function which will
+    contain the dispatch logic.  FNDECLS are the function choices for
+    dispatch, and is a tree chain.  EMPTY_BB is the basic block pointer
+    in DISPATCH_DECL in which the dispatch code is generated.  */
+ 
+ static int
+ dispatch_function_versions (tree dispatch_decl,
+ 			    void *fndecls_p,
+ 			    basic_block *empty_bb)
+ {
+   tree default_decl;
+   gimple *ifunc_cpu_init_stmt;
+   gimple_seq gseq;
+   int ix;
+   tree ele;
+   vec<tree> *fndecls;
+   unsigned int num_versions = 0;
+   unsigned int actual_versions = 0;
+   unsigned int i;
+ 
+   struct _function_version_info
+     {
+       tree version_decl;
+       tree predicate_chain;
+       unsigned int dispatch_priority;
+     }*function_version_info;
+ 
+   gcc_assert (dispatch_decl != NULL
+ 	      && fndecls_p != NULL
+ 	      && empty_bb != NULL);
+ 
+   /*fndecls_p is actually a vector.  */
+   fndecls = static_cast<vec<tree> *> (fndecls_p);
+ 
+   /* At least one more version other than the default.  */
+   num_versions = fndecls->length ();
+   gcc_assert (num_versions >= 2);
+ 
+   function_version_info = (struct _function_version_info *)
+     XNEWVEC (struct _function_version_info, (num_versions - 1));
+ 
+   /* The first version in the vector is the default decl.  */
+   default_decl = (*fndecls)[0];
+ 
+   push_cfun (DECL_STRUCT_FUNCTION (dispatch_decl));
+ 
+   gseq = bb_seq (*empty_bb);
+   /* Function version dispatch is via IFUNC.  IFUNC resolvers fire before
+      constructors, so explicity call __builtin_cpu_init here.  */
+   ifunc_cpu_init_stmt
+     = gimple_build_call_vec (get_ix86_builtin (IX86_BUILTIN_CPU_INIT), vNULL);
+   gimple_seq_add_stmt (&gseq, ifunc_cpu_init_stmt);
+   gimple_set_bb (ifunc_cpu_init_stmt, *empty_bb);
+   set_bb_seq (*empty_bb, gseq);
+ 
+   pop_cfun ();
+ 
+ 
+   for (ix = 1; fndecls->iterate (ix, &ele); ++ix)
+     {
+       tree version_decl = ele;
+       tree predicate_chain = NULL_TREE;
+       unsigned int priority;
+       /* Get attribute string, parse it and find the right predicate decl.
+          The predicate function could be a lengthy combination of many
+ 	 features, like arch-type and various isa-variants.  */
+       priority = get_builtin_code_for_version (version_decl,
+ 	 			               &predicate_chain);
+ 
+       if (predicate_chain == NULL_TREE)
+ 	continue;
+ 
+       function_version_info [actual_versions].version_decl = version_decl;
+       function_version_info [actual_versions].predicate_chain
+ 	 = predicate_chain;
+       function_version_info [actual_versions].dispatch_priority = priority;
+       actual_versions++;
+     }
+ 
+   /* Sort the versions according to descending order of dispatch priority.  The
+      priority is based on the ISA.  This is not a perfect solution.  There
+      could still be ambiguity.  If more than one function version is suitable
+      to execute,  which one should be dispatched?  In future, allow the user
+      to specify a dispatch  priority next to the version.  */
+   qsort (function_version_info, actual_versions,
+          sizeof (struct _function_version_info), feature_compare);
+ 
+   for  (i = 0; i < actual_versions; ++i)
+     *empty_bb = add_condition_to_bb (dispatch_decl,
+ 				     function_version_info[i].version_decl,
+ 				     function_version_info[i].predicate_chain,
+ 				     *empty_bb);
+ 
+   /* dispatch default version at the end.  */
+   *empty_bb = add_condition_to_bb (dispatch_decl, default_decl,
+ 				   NULL, *empty_bb);
+ 
+   free (function_version_info);
+   return 0;
+ }
+ 
+ /* This function changes the assembler name for functions that are
+    versions.  If DECL is a function version and has a "target"
+    attribute, it appends the attribute string to its assembler name.  */
+ 
+ static tree
+ ix86_mangle_function_version_assembler_name (tree decl, tree id)
+ {
+   tree version_attr;
+   const char *orig_name, *version_string;
+   char *attr_str, *assembler_name;
+ 
+   if (DECL_DECLARED_INLINE_P (decl)
+       && lookup_attribute ("gnu_inline",
+ 			   DECL_ATTRIBUTES (decl)))
+     error_at (DECL_SOURCE_LOCATION (decl),
+ 	      "function versions cannot be marked as %<gnu_inline%>,"
+ 	      " bodies have to be generated");
+ 
+   if (DECL_VIRTUAL_P (decl)
+       || DECL_VINDEX (decl))
+     sorry ("virtual function multiversioning not supported");
+ 
+   version_attr = lookup_attribute ("target", DECL_ATTRIBUTES (decl));
+ 
+   /* target attribute string cannot be NULL.  */
+   gcc_assert (version_attr != NULL_TREE);
+ 
+   orig_name = IDENTIFIER_POINTER (id);
+   version_string
+     = TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (version_attr)));
+ 
+   if (strcmp (version_string, "default") == 0)
+     return id;
+ 
+   attr_str = sorted_attr_string (TREE_VALUE (version_attr));
+   assembler_name = XNEWVEC (char, strlen (orig_name) + strlen (attr_str) + 2);
+ 
+   sprintf (assembler_name, "%s.%s", orig_name, attr_str);
+ 
+   /* Allow assembler name to be modified if already set.  */
+   if (DECL_ASSEMBLER_NAME_SET_P (decl))
+     SET_DECL_RTL (decl, NULL);
+ 
+   tree ret = get_identifier (assembler_name);
+   XDELETEVEC (attr_str);
+   XDELETEVEC (assembler_name);
+   return ret;
+ }
+ 
+ tree 
+ ix86_mangle_decl_assembler_name (tree decl, tree id)
+ {
+   /* For function version, add the target suffix to the assembler name.  */
+   if (TREE_CODE (decl) == FUNCTION_DECL
+       && DECL_FUNCTION_VERSIONED (decl))
+     id = ix86_mangle_function_version_assembler_name (decl, id);
+ #ifdef SUBTARGET_MANGLE_DECL_ASSEMBLER_NAME
+   id = SUBTARGET_MANGLE_DECL_ASSEMBLER_NAME (decl, id);
+ #endif
+ 
+   return id;
+ }
+ 
+ /* Make a dispatcher declaration for the multi-versioned function DECL.
+    Calls to DECL function will be replaced with calls to the dispatcher
+    by the front-end.  Returns the decl of the dispatcher function.  */
+ 
+ tree
+ ix86_get_function_versions_dispatcher (void *decl)
+ {
+   tree fn = (tree) decl;
+   struct cgraph_node *node = NULL;
+   struct cgraph_node *default_node = NULL;
+   struct cgraph_function_version_info *node_v = NULL;
+   struct cgraph_function_version_info *first_v = NULL;
+ 
+   tree dispatch_decl = NULL;
+ 
+   struct cgraph_function_version_info *default_version_info = NULL;
+  
+   gcc_assert (fn != NULL && DECL_FUNCTION_VERSIONED (fn));
+ 
+   node = cgraph_node::get (fn);
+   gcc_assert (node != NULL);
+ 
+   node_v = node->function_version ();
+   gcc_assert (node_v != NULL);
+  
+   if (node_v->dispatcher_resolver != NULL)
+     return node_v->dispatcher_resolver;
+ 
+   /* Find the default version and make it the first node.  */
+   first_v = node_v;
+   /* Go to the beginning of the chain.  */
+   while (first_v->prev != NULL)
+     first_v = first_v->prev;
+   default_version_info = first_v;
+   while (default_version_info != NULL)
+     {
+       if (is_function_default_version
+ 	    (default_version_info->this_node->decl))
+         break;
+       default_version_info = default_version_info->next;
+     }
+ 
+   /* If there is no default node, just return NULL.  */
+   if (default_version_info == NULL)
+     return NULL;
+ 
+   /* Make default info the first node.  */
+   if (first_v != default_version_info)
+     {
+       default_version_info->prev->next = default_version_info->next;
+       if (default_version_info->next)
+         default_version_info->next->prev = default_version_info->prev;
+       first_v->prev = default_version_info;
+       default_version_info->next = first_v;
+       default_version_info->prev = NULL;
+     }
+ 
+   default_node = default_version_info->this_node;
+ 
+ #if defined (ASM_OUTPUT_TYPE_DIRECTIVE)
+   if (targetm.has_ifunc_p ())
+     {
+       struct cgraph_function_version_info *it_v = NULL;
+       struct cgraph_node *dispatcher_node = NULL;
+       struct cgraph_function_version_info *dispatcher_version_info = NULL;
+ 
+       /* Right now, the dispatching is done via ifunc.  */
+       dispatch_decl = make_dispatcher_decl (default_node->decl);
+ 
+       dispatcher_node = cgraph_node::get_create (dispatch_decl);
+       gcc_assert (dispatcher_node != NULL);
+       dispatcher_node->dispatcher_function = 1;
+       dispatcher_version_info
+ 	= dispatcher_node->insert_new_function_version ();
+       dispatcher_version_info->next = default_version_info;
+       dispatcher_node->definition = 1;
+ 
+       /* Set the dispatcher for all the versions.  */
+       it_v = default_version_info;
+       while (it_v != NULL)
+ 	{
+ 	  it_v->dispatcher_resolver = dispatch_decl;
+ 	  it_v = it_v->next;
+ 	}
+     }
+   else
+ #endif
+     {
+       error_at (DECL_SOURCE_LOCATION (default_node->decl),
+ 		"multiversioning needs %<ifunc%> which is not supported "
+ 		"on this target");
+     }
+ 
+   return dispatch_decl;
+ }
+ 
+ /* Make the resolver function decl to dispatch the versions of
+    a multi-versioned function,  DEFAULT_DECL.  IFUNC_ALIAS_DECL is
+    ifunc alias that will point to the created resolver.  Create an
+    empty basic block in the resolver and store the pointer in
+    EMPTY_BB.  Return the decl of the resolver function.  */
+ 
+ static tree
+ make_resolver_func (const tree default_decl,
+ 		    const tree ifunc_alias_decl,
+ 		    basic_block *empty_bb)
+ {
+   tree decl, type, t;
+ 
+   /* Create resolver function name based on default_decl.  */
+   tree decl_name = clone_function_name (default_decl, "resolver");
+   const char *resolver_name = IDENTIFIER_POINTER (decl_name);
+ 
+   /* The resolver function should return a (void *). */
+   type = build_function_type_list (ptr_type_node, NULL_TREE);
+ 
+   decl = build_fn_decl (resolver_name, type);
+   SET_DECL_ASSEMBLER_NAME (decl, decl_name);
+ 
+   DECL_NAME (decl) = decl_name;
+   TREE_USED (decl) = 1;
+   DECL_ARTIFICIAL (decl) = 1;
+   DECL_IGNORED_P (decl) = 1;
+   TREE_PUBLIC (decl) = 0;
+   DECL_UNINLINABLE (decl) = 1;
+ 
+   /* Resolver is not external, body is generated.  */
+   DECL_EXTERNAL (decl) = 0;
+   DECL_EXTERNAL (ifunc_alias_decl) = 0;
+ 
+   DECL_CONTEXT (decl) = NULL_TREE;
+   DECL_INITIAL (decl) = make_node (BLOCK);
+   DECL_STATIC_CONSTRUCTOR (decl) = 0;
+ 
+   if (DECL_COMDAT_GROUP (default_decl)
+       || TREE_PUBLIC (default_decl))
+     {
+       /* In this case, each translation unit with a call to this
+ 	 versioned function will put out a resolver.  Ensure it
+ 	 is comdat to keep just one copy.  */
+       DECL_COMDAT (decl) = 1;
+       make_decl_one_only (decl, DECL_ASSEMBLER_NAME (decl));
+     }
+   else
+     TREE_PUBLIC (ifunc_alias_decl) = 0;
+ 
+   /* Build result decl and add to function_decl. */
+   t = build_decl (UNKNOWN_LOCATION, RESULT_DECL, NULL_TREE, ptr_type_node);
+   DECL_CONTEXT (t) = decl;
+   DECL_ARTIFICIAL (t) = 1;
+   DECL_IGNORED_P (t) = 1;
+   DECL_RESULT (decl) = t;
+ 
+   gimplify_function_tree (decl);
+   push_cfun (DECL_STRUCT_FUNCTION (decl));
+   *empty_bb = init_lowered_empty_function (decl, false,
+ 					   profile_count::uninitialized ());
+ 
+   cgraph_node::add_new_function (decl, true);
+   symtab->call_cgraph_insertion_hooks (cgraph_node::get_create (decl));
+ 
+   pop_cfun ();
+ 
+   gcc_assert (ifunc_alias_decl != NULL);
+   /* Mark ifunc_alias_decl as "ifunc" with resolver as resolver_name.  */
+   DECL_ATTRIBUTES (ifunc_alias_decl)
+     = make_attribute ("ifunc", resolver_name,
+ 		      DECL_ATTRIBUTES (ifunc_alias_decl));
+ 
+   /* Create the alias for dispatch to resolver here.  */
+   cgraph_node::create_same_body_alias (ifunc_alias_decl, decl);
+   return decl;
+ }
+ 
+ /* Generate the dispatching code body to dispatch multi-versioned function
+    DECL.  The target hook is called to process the "target" attributes and
+    provide the code to dispatch the right function at run-time.  NODE points
+    to the dispatcher decl whose body will be created.  */
+ 
+ tree 
+ ix86_generate_version_dispatcher_body (void *node_p)
+ {
+   tree resolver_decl;
+   basic_block empty_bb;
+   tree default_ver_decl;
+   struct cgraph_node *versn;
+   struct cgraph_node *node;
+ 
+   struct cgraph_function_version_info *node_version_info = NULL;
+   struct cgraph_function_version_info *versn_info = NULL;
+ 
+   node = (cgraph_node *)node_p;
+ 
+   node_version_info = node->function_version ();
+   gcc_assert (node->dispatcher_function
+ 	      && node_version_info != NULL);
+ 
+   if (node_version_info->dispatcher_resolver)
+     return node_version_info->dispatcher_resolver;
+ 
+   /* The first version in the chain corresponds to the default version.  */
+   default_ver_decl = node_version_info->next->this_node->decl;
+ 
+   /* node is going to be an alias, so remove the finalized bit.  */
+   node->definition = false;
+ 
+   resolver_decl = make_resolver_func (default_ver_decl,
+ 				      node->decl, &empty_bb);
+ 
+   node_version_info->dispatcher_resolver = resolver_decl;
+ 
+   push_cfun (DECL_STRUCT_FUNCTION (resolver_decl));
+ 
+   auto_vec<tree, 2> fn_ver_vec;
+ 
+   for (versn_info = node_version_info->next; versn_info;
+        versn_info = versn_info->next)
+     {
+       versn = versn_info->this_node;
+       /* Check for virtual functions here again, as by this time it should
+ 	 have been determined if this function needs a vtable index or
+ 	 not.  This happens for methods in derived classes that override
+ 	 virtual methods in base classes but are not explicitly marked as
+ 	 virtual.  */
+       if (DECL_VINDEX (versn->decl))
+ 	sorry ("virtual function multiversioning not supported");
+ 
+       fn_ver_vec.safe_push (versn->decl);
+     }
+ 
+   dispatch_function_versions (resolver_decl, &fn_ver_vec, &empty_bb);
+   cgraph_edge::rebuild_edges ();
+   pop_cfun ();
+   return resolver_decl;
+ }
+ 
+ 
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-features.h gcc-10.1.0/gcc/config/i386/i386-features.h
*** gcc-9.3.0/gcc/config/i386/i386-features.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/i386/i386-features.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,212 ----
+ /* Copyright (C) 1988-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_I386_FEATURES_H
+ #define GCC_I386_FEATURES_H
+ 
+ enum xlogue_stub {
+   XLOGUE_STUB_SAVE,
+   XLOGUE_STUB_RESTORE,
+   XLOGUE_STUB_RESTORE_TAIL,
+   XLOGUE_STUB_SAVE_HFP,
+   XLOGUE_STUB_RESTORE_HFP,
+   XLOGUE_STUB_RESTORE_HFP_TAIL,
+ 
+   XLOGUE_STUB_COUNT
+ };
+ 
+ enum xlogue_stub_sets {
+   XLOGUE_SET_ALIGNED,
+   XLOGUE_SET_ALIGNED_PLUS_8,
+   XLOGUE_SET_HFP_ALIGNED_OR_REALIGN,
+   XLOGUE_SET_HFP_ALIGNED_PLUS_8,
+ 
+   XLOGUE_SET_COUNT
+ };
+ 
+ /* Register save/restore layout used by out-of-line stubs.  */
+ class xlogue_layout {
+ public:
+   struct reginfo
+   {
+     unsigned regno;
+     HOST_WIDE_INT offset;	/* Offset used by stub base pointer (rax or
+ 				   rsi) to where each register is stored.  */
+   };
+ 
+   unsigned get_nregs () const			{return m_nregs;}
+   HOST_WIDE_INT get_stack_align_off_in () const	{return m_stack_align_off_in;}
+ 
+   const reginfo &get_reginfo (unsigned reg) const
+   {
+     gcc_assert (reg < m_nregs);
+     return m_regs[reg];
+   }
+ 
+   static const char *get_stub_name (enum xlogue_stub stub,
+ 				    unsigned n_extra_args);
+ 
+   /* Returns an rtx for the stub's symbol based upon
+        1.) the specified stub (save, restore or restore_ret) and
+        2.) the value of cfun->machine->call_ms2sysv_extra_regs and
+        3.) rather or not stack alignment is being performed.  */
+   static rtx get_stub_rtx (enum xlogue_stub stub);
+ 
+   /* Returns the amount of stack space (including padding) that the stub
+      needs to store registers based upon data in the machine_function.  */
+   HOST_WIDE_INT get_stack_space_used () const
+   {
+     const struct machine_function *m = cfun->machine;
+     unsigned last_reg = m->call_ms2sysv_extra_regs + MIN_REGS - 1;
+ 
+     gcc_assert (m->call_ms2sysv_extra_regs <= MAX_EXTRA_REGS);
+     return m_regs[last_reg].offset + STUB_INDEX_OFFSET;
+   }
+ 
+   /* Returns the offset for the base pointer used by the stub.  */
+   HOST_WIDE_INT get_stub_ptr_offset () const
+   {
+     return STUB_INDEX_OFFSET + m_stack_align_off_in;
+   }
+ 
+   static const class xlogue_layout &get_instance ();
+   static unsigned count_stub_managed_regs ();
+   static bool is_stub_managed_reg (unsigned regno, unsigned count);
+ 
+   static const HOST_WIDE_INT STUB_INDEX_OFFSET = 0x70;
+   static const unsigned MIN_REGS = NUM_X86_64_MS_CLOBBERED_REGS;
+   static const unsigned MAX_REGS = 18;
+   static const unsigned MAX_EXTRA_REGS = MAX_REGS - MIN_REGS;
+   static const unsigned VARIANT_COUNT = MAX_EXTRA_REGS + 1;
+   static const unsigned STUB_NAME_MAX_LEN = 20;
+   static const char * const STUB_BASE_NAMES[XLOGUE_STUB_COUNT];
+   static const unsigned REG_ORDER[MAX_REGS];
+   static const unsigned REG_ORDER_REALIGN[MAX_REGS];
+ 
+ private:
+   xlogue_layout ();
+   xlogue_layout (HOST_WIDE_INT stack_align_off_in, bool hfp);
+   xlogue_layout (const xlogue_layout &);
+ 
+   /* True if hard frame pointer is used.  */
+   bool m_hfp;
+ 
+   /* Max number of register this layout manages.  */
+   unsigned m_nregs;
+ 
+   /* Incoming offset from 16-byte alignment.  */
+   HOST_WIDE_INT m_stack_align_off_in;
+ 
+   /* Register order and offsets.  */
+   struct reginfo m_regs[MAX_REGS];
+ 
+   /* Lazy-inited cache of symbol names for stubs.  */
+   static char s_stub_names[2][XLOGUE_STUB_COUNT][VARIANT_COUNT]
+ 			  [STUB_NAME_MAX_LEN];
+ 
+   static const xlogue_layout s_instances[XLOGUE_SET_COUNT];
+ };
+ 
+ namespace {
+ 
+ class scalar_chain
+ {
+  public:
+   scalar_chain (enum machine_mode, enum machine_mode);
+   virtual ~scalar_chain ();
+ 
+   static unsigned max_id;
+ 
+   /* Scalar mode.  */
+   enum machine_mode smode;
+   /* Vector mode.  */
+   enum machine_mode vmode;
+ 
+   /* ID of a chain.  */
+   unsigned int chain_id;
+   /* A queue of instructions to be included into a chain.  */
+   bitmap queue;
+   /* Instructions included into a chain.  */
+   bitmap insns;
+   /* All registers defined by a chain.  */
+   bitmap defs;
+   /* Registers used in both vector and sclar modes.  */
+   bitmap defs_conv;
+ 
+   void build (bitmap candidates, unsigned insn_uid);
+   virtual int compute_convert_gain () = 0;
+   int convert ();
+ 
+  protected:
+   void add_to_queue (unsigned insn_uid);
+   void emit_conversion_insns (rtx insns, rtx_insn *pos);
+ 
+  private:
+   void add_insn (bitmap candidates, unsigned insn_uid);
+   void analyze_register_chain (bitmap candidates, df_ref ref);
+   virtual void mark_dual_mode_def (df_ref def) = 0;
+   virtual void convert_insn (rtx_insn *insn) = 0;
+   virtual void convert_registers () = 0;
+ };
+ 
+ class general_scalar_chain : public scalar_chain
+ {
+  public:
+   general_scalar_chain (enum machine_mode smode_, enum machine_mode vmode_);
+   ~general_scalar_chain ();
+   int compute_convert_gain ();
+  private:
+   hash_map<rtx, rtx> defs_map;
+   bitmap insns_conv;
+   unsigned n_sse_to_integer;
+   unsigned n_integer_to_sse;
+   void mark_dual_mode_def (df_ref def);
+   void convert_insn (rtx_insn *insn);
+   void convert_op (rtx *op, rtx_insn *insn);
+   void convert_reg (rtx_insn *insn, rtx dst, rtx src);
+   void make_vector_copies (rtx_insn *, rtx);
+   void convert_registers ();
+   int vector_const_cost (rtx exp);
+ };
+ 
+ class timode_scalar_chain : public scalar_chain
+ {
+  public:
+   timode_scalar_chain () : scalar_chain (TImode, V1TImode) {}
+ 
+   /* Convert from TImode to V1TImode is always faster.  */
+   int compute_convert_gain () { return 1; }
+ 
+  private:
+   void mark_dual_mode_def (df_ref def);
+   void fix_debug_reg_uses (rtx reg);
+   void convert_insn (rtx_insn *insn);
+   /* We don't convert registers to difference size.  */
+   void convert_registers () {}
+ };
+ 
+ } // anon namespace
+ 
+ bool ix86_save_reg (unsigned int regno, bool maybe_eh_return, bool ignore_outlined);
+ int ix86_compare_version_priority (tree decl1, tree decl2);
+ tree ix86_generate_version_dispatcher_body (void *node_p);
+ tree ix86_get_function_versions_dispatcher (void *decl);
+ tree ix86_mangle_decl_assembler_name (tree decl, tree id);
+ 
+ 
+ #endif  /* GCC_I386_FEATURES_H */
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-modes.def gcc-10.1.0/gcc/config/i386/i386-modes.def
*** gcc-9.3.0/gcc/config/i386/i386-modes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386-modes.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GCC for IA-32.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions of target machine for GCC for IA-32.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** VECTOR_MODE (INT, SI, 64);    /* 		  V64
*** 101,110 ****
  INT_MODE (OI, 32);
  INT_MODE (XI, 64);
  
  /* Keep the OI and XI modes from confusing the compiler into thinking
     that these modes could actually be used for computation.  They are
!    only holders for vectors during data movement.  */
! #define MAX_BITSIZE_MODE_ANY_INT (128)
  
  /* The symbol Pmode stands for one of the above machine modes (usually SImode).
     The tm.h file specifies which one.  It is not a distinct mode.  */
--- 101,125 ----
  INT_MODE (OI, 32);
  INT_MODE (XI, 64);
  
+ /* Modes needs a consecutive register pair.
+    Note that Using PARTIAL_INT_MODE but not INT_MODE is to avoid mode promotion
+    issues.  */
+ PARTIAL_INT_MODE (HI, 16, P2QI);
+ PARTIAL_INT_MODE (SI, 32, P2HI);
+ 
+ /* Mode used for signed overflow checking of TImode.  As
+    MAX_BITSIZE_MODE_ANY_INT is only 160, wide-int.h reserves only that
+    rounded up to multiple of HOST_BITS_PER_WIDE_INT bits in wide_int etc.,
+    so OImode is too large.  For the overflow checking we actually need
+    just 1 or 2 bits beyond TImode precision.  Use 160 bits to have
+    a multiple of 32.  */
+ PARTIAL_INT_MODE (OI, 160, POI);
+ 
  /* Keep the OI and XI modes from confusing the compiler into thinking
     that these modes could actually be used for computation.  They are
!    only holders for vectors during data movement.  Include POImode precision
!    though.  */
! #define MAX_BITSIZE_MODE_ANY_INT (160)
  
  /* The symbol Pmode stands for one of the above machine modes (usually SImode).
     The tm.h file specifies which one.  It is not a distinct mode.  */
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-options.c gcc-10.1.0/gcc/config/i386/i386-options.c
*** gcc-9.3.0/gcc/config/i386/i386-options.c	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/i386/i386-options.c	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,3795 ----
+ /* Copyright (C) 1988-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #define IN_TARGET_CODE 1
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "backend.h"
+ #include "rtl.h"
+ #include "tree.h"
+ #include "memmodel.h"
+ #include "gimple.h"
+ #include "cfghooks.h"
+ #include "cfgloop.h"
+ #include "df.h"
+ #include "tm_p.h"
+ #include "stringpool.h"
+ #include "expmed.h"
+ #include "optabs.h"
+ #include "regs.h"
+ #include "emit-rtl.h"
+ #include "recog.h"
+ #include "cgraph.h"
+ #include "diagnostic.h"
+ #include "cfgbuild.h"
+ #include "alias.h"
+ #include "fold-const.h"
+ #include "attribs.h"
+ #include "calls.h"
+ #include "stor-layout.h"
+ #include "varasm.h"
+ #include "output.h"
+ #include "insn-attr.h"
+ #include "flags.h"
+ #include "except.h"
+ #include "explow.h"
+ #include "expr.h"
+ #include "cfgrtl.h"
+ #include "common/common-target.h"
+ #include "langhooks.h"
+ #include "reload.h"
+ #include "gimplify.h"
+ #include "dwarf2.h"
+ #include "tm-constrs.h"
+ #include "cselib.h"
+ #include "sched-int.h"
+ #include "opts.h"
+ #include "tree-pass.h"
+ #include "context.h"
+ #include "pass_manager.h"
+ #include "target-globals.h"
+ #include "gimple-iterator.h"
+ #include "tree-vectorizer.h"
+ #include "shrink-wrap.h"
+ #include "builtins.h"
+ #include "rtl-iter.h"
+ #include "tree-iterator.h"
+ #include "dbgcnt.h"
+ #include "case-cfn-macros.h"
+ #include "dojump.h"
+ #include "fold-const-call.h"
+ #include "tree-vrp.h"
+ #include "tree-ssanames.h"
+ #include "selftest.h"
+ #include "selftest-rtl.h"
+ #include "print-rtl.h"
+ #include "intl.h"
+ #include "ifcvt.h"
+ #include "symbol-summary.h"
+ #include "ipa-prop.h"
+ #include "ipa-fnsummary.h"
+ #include "wide-int-bitmask.h"
+ #include "tree-vector-builder.h"
+ #include "debug.h"
+ #include "dwarf2out.h"
+ #include "i386-options.h"
+ 
+ #include "x86-tune-costs.h"
+ 
+ #ifndef SUBTARGET32_DEFAULT_CPU
+ #define SUBTARGET32_DEFAULT_CPU "i386"
+ #endif
+ 
+ /* Processor feature/optimization bitmasks.  */
+ #define m_386 (HOST_WIDE_INT_1U<<PROCESSOR_I386)
+ #define m_486 (HOST_WIDE_INT_1U<<PROCESSOR_I486)
+ #define m_PENT (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUM)
+ #define m_LAKEMONT (HOST_WIDE_INT_1U<<PROCESSOR_LAKEMONT)
+ #define m_PPRO (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUMPRO)
+ #define m_PENT4 (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUM4)
+ #define m_NOCONA (HOST_WIDE_INT_1U<<PROCESSOR_NOCONA)
+ #define m_P4_NOCONA (m_PENT4 | m_NOCONA)
+ #define m_CORE2 (HOST_WIDE_INT_1U<<PROCESSOR_CORE2)
+ #define m_NEHALEM (HOST_WIDE_INT_1U<<PROCESSOR_NEHALEM)
+ #define m_SANDYBRIDGE (HOST_WIDE_INT_1U<<PROCESSOR_SANDYBRIDGE)
+ #define m_HASWELL (HOST_WIDE_INT_1U<<PROCESSOR_HASWELL)
+ #define m_BONNELL (HOST_WIDE_INT_1U<<PROCESSOR_BONNELL)
+ #define m_SILVERMONT (HOST_WIDE_INT_1U<<PROCESSOR_SILVERMONT)
+ #define m_KNL (HOST_WIDE_INT_1U<<PROCESSOR_KNL)
+ #define m_KNM (HOST_WIDE_INT_1U<<PROCESSOR_KNM)
+ #define m_SKYLAKE (HOST_WIDE_INT_1U<<PROCESSOR_SKYLAKE)
+ #define m_SKYLAKE_AVX512 (HOST_WIDE_INT_1U<<PROCESSOR_SKYLAKE_AVX512)
+ #define m_CANNONLAKE (HOST_WIDE_INT_1U<<PROCESSOR_CANNONLAKE)
+ #define m_ICELAKE_CLIENT (HOST_WIDE_INT_1U<<PROCESSOR_ICELAKE_CLIENT)
+ #define m_ICELAKE_SERVER (HOST_WIDE_INT_1U<<PROCESSOR_ICELAKE_SERVER)
+ #define m_CASCADELAKE (HOST_WIDE_INT_1U<<PROCESSOR_CASCADELAKE)
+ #define m_TIGERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_TIGERLAKE)
+ #define m_COOPERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_COOPERLAKE)
+ #define m_CORE_AVX512 (m_SKYLAKE_AVX512 | m_CANNONLAKE \
+ 		       | m_ICELAKE_CLIENT | m_ICELAKE_SERVER | m_CASCADELAKE \
+ 		       | m_TIGERLAKE | m_COOPERLAKE)
+ #define m_CORE_AVX2 (m_HASWELL | m_SKYLAKE | m_CORE_AVX512)
+ #define m_CORE_ALL (m_CORE2 | m_NEHALEM  | m_SANDYBRIDGE | m_CORE_AVX2)
+ #define m_GOLDMONT (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT)
+ #define m_GOLDMONT_PLUS (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT_PLUS)
+ #define m_TREMONT (HOST_WIDE_INT_1U<<PROCESSOR_TREMONT)
+ #define m_INTEL (HOST_WIDE_INT_1U<<PROCESSOR_INTEL)
+ 
+ #define m_GEODE (HOST_WIDE_INT_1U<<PROCESSOR_GEODE)
+ #define m_K6 (HOST_WIDE_INT_1U<<PROCESSOR_K6)
+ #define m_K6_GEODE (m_K6 | m_GEODE)
+ #define m_K8 (HOST_WIDE_INT_1U<<PROCESSOR_K8)
+ #define m_ATHLON (HOST_WIDE_INT_1U<<PROCESSOR_ATHLON)
+ #define m_ATHLON_K8 (m_K8 | m_ATHLON)
+ #define m_AMDFAM10 (HOST_WIDE_INT_1U<<PROCESSOR_AMDFAM10)
+ #define m_BDVER1 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER1)
+ #define m_BDVER2 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER2)
+ #define m_BDVER3 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER3)
+ #define m_BDVER4 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER4)
+ #define m_ZNVER1 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER1)
+ #define m_ZNVER2 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER2)
+ #define m_BTVER1 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER1)
+ #define m_BTVER2 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER2)
+ #define m_BDVER	(m_BDVER1 | m_BDVER2 | m_BDVER3 | m_BDVER4)
+ #define m_BTVER (m_BTVER1 | m_BTVER2)
+ #define m_ZNVER	(m_ZNVER1 | m_ZNVER2)
+ #define m_AMD_MULTIPLE (m_ATHLON_K8 | m_AMDFAM10 | m_BDVER | m_BTVER \
+ 			| m_ZNVER)
+ 
+ #define m_GENERIC (HOST_WIDE_INT_1U<<PROCESSOR_GENERIC)
+ 
+ const char* ix86_tune_feature_names[X86_TUNE_LAST] = {
+ #undef DEF_TUNE
+ #define DEF_TUNE(tune, name, selector) name,
+ #include "x86-tune.def"
+ #undef DEF_TUNE
+ };
+ 
+ /* Feature tests against the various tunings.  */
+ unsigned char ix86_tune_features[X86_TUNE_LAST];
+ 
+ /* Feature tests against the various tunings used to create ix86_tune_features
+    based on the processor mask.  */
+ static unsigned HOST_WIDE_INT initial_ix86_tune_features[X86_TUNE_LAST] = {
+ #undef DEF_TUNE
+ #define DEF_TUNE(tune, name, selector) selector,
+ #include "x86-tune.def"
+ #undef DEF_TUNE
+ };
+ 
+ /* Feature tests against the various architecture variations.  */
+ unsigned char ix86_arch_features[X86_ARCH_LAST];
+ 
+ struct ix86_target_opts
+ {
+   const char *option;		/* option string */
+   HOST_WIDE_INT mask;		/* isa mask options */
+ };
+ 
+ /* This table is ordered so that options like -msse4.2 that imply other
+    ISAs come first.  Target string will be displayed in the same order.  */
+ static struct ix86_target_opts isa2_opts[] =
+ {
+   { "-mcx16",		OPTION_MASK_ISA2_CX16 },
+   { "-mvaes",		OPTION_MASK_ISA2_VAES },
+   { "-mrdpid",		OPTION_MASK_ISA2_RDPID },
+   { "-mpconfig",	OPTION_MASK_ISA2_PCONFIG },
+   { "-mwbnoinvd",	OPTION_MASK_ISA2_WBNOINVD },
+   { "-mavx512vp2intersect", OPTION_MASK_ISA2_AVX512VP2INTERSECT },
+   { "-msgx",		OPTION_MASK_ISA2_SGX },
+   { "-mavx5124vnniw",	OPTION_MASK_ISA2_AVX5124VNNIW },
+   { "-mavx5124fmaps",	OPTION_MASK_ISA2_AVX5124FMAPS },
+   { "-mhle",		OPTION_MASK_ISA2_HLE },
+   { "-mmovbe",		OPTION_MASK_ISA2_MOVBE },
+   { "-mclzero",		OPTION_MASK_ISA2_CLZERO },
+   { "-mmwaitx",		OPTION_MASK_ISA2_MWAITX },
+   { "-mmovdir64b",	OPTION_MASK_ISA2_MOVDIR64B },
+   { "-mwaitpkg",	OPTION_MASK_ISA2_WAITPKG },
+   { "-mcldemote",	OPTION_MASK_ISA2_CLDEMOTE },
+   { "-mptwrite",	OPTION_MASK_ISA2_PTWRITE },
+   { "-mavx512bf16",	OPTION_MASK_ISA2_AVX512BF16 },
+   { "-menqcmd",		OPTION_MASK_ISA2_ENQCMD }
+ };
+ static struct ix86_target_opts isa_opts[] =
+ {
+   { "-mavx512vpopcntdq", OPTION_MASK_ISA_AVX512VPOPCNTDQ },
+   { "-mavx512bitalg",	OPTION_MASK_ISA_AVX512BITALG },
+   { "-mvpclmulqdq",	OPTION_MASK_ISA_VPCLMULQDQ },
+   { "-mgfni",		OPTION_MASK_ISA_GFNI },
+   { "-mavx512vnni",	OPTION_MASK_ISA_AVX512VNNI },
+   { "-mavx512vbmi2",	OPTION_MASK_ISA_AVX512VBMI2 },
+   { "-mavx512vbmi",	OPTION_MASK_ISA_AVX512VBMI },
+   { "-mavx512ifma",	OPTION_MASK_ISA_AVX512IFMA },
+   { "-mavx512vl",	OPTION_MASK_ISA_AVX512VL },
+   { "-mavx512bw",	OPTION_MASK_ISA_AVX512BW },
+   { "-mavx512dq",	OPTION_MASK_ISA_AVX512DQ },
+   { "-mavx512er",	OPTION_MASK_ISA_AVX512ER },
+   { "-mavx512pf",	OPTION_MASK_ISA_AVX512PF },
+   { "-mavx512cd",	OPTION_MASK_ISA_AVX512CD },
+   { "-mavx512f",	OPTION_MASK_ISA_AVX512F },
+   { "-mavx2",		OPTION_MASK_ISA_AVX2 },
+   { "-mfma",		OPTION_MASK_ISA_FMA },
+   { "-mxop",		OPTION_MASK_ISA_XOP },
+   { "-mfma4",		OPTION_MASK_ISA_FMA4 },
+   { "-mf16c",		OPTION_MASK_ISA_F16C },
+   { "-mavx",		OPTION_MASK_ISA_AVX },
+ /*{ "-msse4"		OPTION_MASK_ISA_SSE4 }, */
+   { "-msse4.2",		OPTION_MASK_ISA_SSE4_2 },
+   { "-msse4.1",		OPTION_MASK_ISA_SSE4_1 },
+   { "-msse4a",		OPTION_MASK_ISA_SSE4A },
+   { "-mssse3",		OPTION_MASK_ISA_SSSE3 },
+   { "-msse3",		OPTION_MASK_ISA_SSE3 },
+   { "-maes",		OPTION_MASK_ISA_AES },
+   { "-msha",		OPTION_MASK_ISA_SHA },
+   { "-mpclmul",		OPTION_MASK_ISA_PCLMUL },
+   { "-msse2",		OPTION_MASK_ISA_SSE2 },
+   { "-msse",		OPTION_MASK_ISA_SSE },
+   { "-m3dnowa",		OPTION_MASK_ISA_3DNOW_A },
+   { "-m3dnow",		OPTION_MASK_ISA_3DNOW },
+   { "-mmmx",		OPTION_MASK_ISA_MMX },
+   { "-mrtm",		OPTION_MASK_ISA_RTM },
+   { "-mprfchw",		OPTION_MASK_ISA_PRFCHW },
+   { "-mrdseed",		OPTION_MASK_ISA_RDSEED },
+   { "-madx",		OPTION_MASK_ISA_ADX },
+   { "-mprefetchwt1",	OPTION_MASK_ISA_PREFETCHWT1 },
+   { "-mclflushopt",	OPTION_MASK_ISA_CLFLUSHOPT },
+   { "-mxsaves",		OPTION_MASK_ISA_XSAVES },
+   { "-mxsavec",		OPTION_MASK_ISA_XSAVEC },
+   { "-mxsaveopt",	OPTION_MASK_ISA_XSAVEOPT },
+   { "-mxsave",		OPTION_MASK_ISA_XSAVE },
+   { "-mabm",		OPTION_MASK_ISA_ABM },
+   { "-mbmi",		OPTION_MASK_ISA_BMI },
+   { "-mbmi2",		OPTION_MASK_ISA_BMI2 },
+   { "-mlzcnt",		OPTION_MASK_ISA_LZCNT },
+   { "-mtbm",		OPTION_MASK_ISA_TBM },
+   { "-mpopcnt",		OPTION_MASK_ISA_POPCNT },
+   { "-msahf",		OPTION_MASK_ISA_SAHF },
+   { "-mcrc32",		OPTION_MASK_ISA_CRC32 },
+   { "-mfsgsbase",	OPTION_MASK_ISA_FSGSBASE },
+   { "-mrdrnd",		OPTION_MASK_ISA_RDRND },
+   { "-mpku",		OPTION_MASK_ISA_PKU },
+   { "-mlwp",		OPTION_MASK_ISA_LWP },
+   { "-mfxsr",		OPTION_MASK_ISA_FXSR },
+   { "-mclwb",		OPTION_MASK_ISA_CLWB },
+   { "-mshstk",		OPTION_MASK_ISA_SHSTK },
+   { "-mmovdiri",	OPTION_MASK_ISA_MOVDIRI }
+ };
+ 
+ /* Return 1 if TRAIT NAME is present in the OpenMP context's
+    device trait set, return 0 if not present in any OpenMP context in the
+    whole translation unit, or -1 if not present in the current OpenMP context
+    but might be present in another OpenMP context in the same TU.  */
+ 
+ int
+ ix86_omp_device_kind_arch_isa (enum omp_device_kind_arch_isa trait,
+ 			       const char *name)
+ {
+   switch (trait)
+     {
+     case omp_device_kind:
+       return strcmp (name, "cpu") == 0;
+     case omp_device_arch:
+       if (strcmp (name, "x86") == 0)
+ 	return 1;
+       if (TARGET_64BIT)
+ 	{
+ 	  if (TARGET_X32)
+ 	    return strcmp (name, "x32") == 0;
+ 	  else
+ 	    return strcmp (name, "x86_64") == 0;
+ 	}
+       if (strcmp (name, "ia32") == 0 || strcmp (name, "i386") == 0)
+ 	return 1;
+       if (strcmp (name, "i486") == 0)
+ 	return ix86_arch != PROCESSOR_I386 ? 1 : -1;
+       if (strcmp (name, "i586") == 0)
+ 	return (ix86_arch != PROCESSOR_I386
+ 		&& ix86_arch != PROCESSOR_I486) ? 1 : -1;
+       if (strcmp (name, "i686") == 0)
+ 	return (ix86_arch != PROCESSOR_I386
+ 		&& ix86_arch != PROCESSOR_I486
+ 		&& ix86_arch != PROCESSOR_LAKEMONT
+ 		&& ix86_arch != PROCESSOR_PENTIUM) ? 1 : -1;
+       return 0;
+     case omp_device_isa:
+       for (int i = 0; i < 2; i++)
+ 	{
+ 	  struct ix86_target_opts *opts = i ? isa2_opts : isa_opts;
+ 	  size_t nopts = i ? ARRAY_SIZE (isa2_opts) : ARRAY_SIZE (isa_opts);
+ 	  HOST_WIDE_INT mask = i ? ix86_isa_flags2 : ix86_isa_flags;
+ 	  for (size_t n = 0; n < nopts; n++)
+ 	    {
+ 	      /* Handle sse4 as an alias to sse4.2.  */
+ 	      if (opts[n].mask == OPTION_MASK_ISA_SSE4_2)
+ 		{
+ 		  if (strcmp (name, "sse4") == 0)
+ 		    return (mask & opts[n].mask) != 0 ? 1 : -1;
+ 		}
+ 	      if (strcmp (name, opts[n].option + 2) == 0)
+ 		return (mask & opts[n].mask) != 0 ? 1 : -1;
+ 	    }
+ 	}
+       return 0;
+     default:
+       gcc_unreachable ();
+     }
+ }
+ 
+ /* Return a string that documents the current -m options.  The caller is
+    responsible for freeing the string.  */
+ 
+ char *
+ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
+ 		    int flags, int flags2,
+ 		    const char *arch, const char *tune,
+ 		    enum fpmath_unit fpmath,
+ 		    enum prefer_vector_width pvw,
+ 		    bool add_nl_p, bool add_abi_p)
+ {
+   /* Flag options.  */
+   static struct ix86_target_opts flag_opts[] =
+   {
+     { "-m128bit-long-double",		MASK_128BIT_LONG_DOUBLE },
+     { "-mlong-double-128",		MASK_LONG_DOUBLE_128 },
+     { "-mlong-double-64",		MASK_LONG_DOUBLE_64 },
+     { "-m80387",			MASK_80387 },
+     { "-maccumulate-outgoing-args",	MASK_ACCUMULATE_OUTGOING_ARGS },
+     { "-malign-double",			MASK_ALIGN_DOUBLE },
+     { "-mcld",				MASK_CLD },
+     { "-mfp-ret-in-387",		MASK_FLOAT_RETURNS },
+     { "-mieee-fp",			MASK_IEEE_FP },
+     { "-minline-all-stringops",		MASK_INLINE_ALL_STRINGOPS },
+     { "-minline-stringops-dynamically",	MASK_INLINE_STRINGOPS_DYNAMICALLY },
+     { "-mms-bitfields",			MASK_MS_BITFIELD_LAYOUT },
+     { "-mno-align-stringops",		MASK_NO_ALIGN_STRINGOPS },
+     { "-mno-fancy-math-387",		MASK_NO_FANCY_MATH_387 },
+     { "-mno-push-args",			MASK_NO_PUSH_ARGS },
+     { "-mno-red-zone",			MASK_NO_RED_ZONE },
+     { "-momit-leaf-frame-pointer",	MASK_OMIT_LEAF_FRAME_POINTER },
+     { "-mrecip",			MASK_RECIP },
+     { "-mrtd",				MASK_RTD },
+     { "-msseregparm",			MASK_SSEREGPARM },
+     { "-mstack-arg-probe",		MASK_STACK_PROBE },
+     { "-mtls-direct-seg-refs",		MASK_TLS_DIRECT_SEG_REFS },
+     { "-mvect8-ret-in-mem",		MASK_VECT8_RETURNS },
+     { "-m8bit-idiv",			MASK_USE_8BIT_IDIV },
+     { "-mvzeroupper",			MASK_VZEROUPPER },
+     { "-mstv",				MASK_STV },
+     { "-mavx256-split-unaligned-load",	MASK_AVX256_SPLIT_UNALIGNED_LOAD },
+     { "-mavx256-split-unaligned-store",	MASK_AVX256_SPLIT_UNALIGNED_STORE },
+     { "-mcall-ms2sysv-xlogues",		MASK_CALL_MS2SYSV_XLOGUES }
+   };
+ 
+   /* Additional flag options.  */
+   static struct ix86_target_opts flag2_opts[] =
+   {
+     { "-mgeneral-regs-only",		OPTION_MASK_GENERAL_REGS_ONLY }
+   };
+ 
+   const char *opts[ARRAY_SIZE (isa_opts) + ARRAY_SIZE (isa2_opts)
+ 		   + ARRAY_SIZE (flag_opts) + ARRAY_SIZE (flag2_opts) + 6][2];
+ 
+   char isa_other[40];
+   char isa2_other[40];
+   char flags_other[40];
+   char flags2_other[40];
+   unsigned num = 0;
+   unsigned i, j;
+   char *ret;
+   char *ptr;
+   size_t len;
+   size_t line_len;
+   size_t sep_len;
+   const char *abi;
+ 
+   memset (opts, '\0', sizeof (opts));
+ 
+   /* Add -march= option.  */
+   if (arch)
+     {
+       opts[num][0] = "-march=";
+       opts[num++][1] = arch;
+     }
+ 
+   /* Add -mtune= option.  */
+   if (tune)
+     {
+       opts[num][0] = "-mtune=";
+       opts[num++][1] = tune;
+     }
+ 
+   /* Add -m32/-m64/-mx32.  */
+   if (add_abi_p)
+     {
+       if ((isa & OPTION_MASK_ISA_64BIT) != 0)
+ 	{
+ 	  if ((isa & OPTION_MASK_ABI_64) != 0)
+ 	    abi = "-m64";
+ 	  else
+ 	    abi = "-mx32";
+ 	}
+       else
+ 	abi = "-m32";
+       opts[num++][0] = abi;
+     }
+   isa &= ~(OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32);
+ 
+   /* Pick out the options in isa2 options.  */
+   for (i = 0; i < ARRAY_SIZE (isa2_opts); i++)
+     {
+       if ((isa2 & isa2_opts[i].mask) != 0)
+ 	{
+ 	  opts[num++][0] = isa2_opts[i].option;
+ 	  isa2 &= ~ isa2_opts[i].mask;
+ 	}
+     }
+ 
+   if (isa2 && add_nl_p)
+     {
+       opts[num++][0] = isa2_other;
+       sprintf (isa2_other, "(other isa2: %#" HOST_WIDE_INT_PRINT "x)", isa2);
+     }
+ 
+   /* Pick out the options in isa options.  */
+   for (i = 0; i < ARRAY_SIZE (isa_opts); i++)
+     {
+       if ((isa & isa_opts[i].mask) != 0)
+ 	{
+ 	  opts[num++][0] = isa_opts[i].option;
+ 	  isa &= ~ isa_opts[i].mask;
+ 	}
+     }
+ 
+   if (isa && add_nl_p)
+     {
+       opts[num++][0] = isa_other;
+       sprintf (isa_other, "(other isa: %#" HOST_WIDE_INT_PRINT "x)", isa);
+     }
+ 
+   /* Add flag options.  */
+   for (i = 0; i < ARRAY_SIZE (flag_opts); i++)
+     {
+       if ((flags & flag_opts[i].mask) != 0)
+ 	{
+ 	  opts[num++][0] = flag_opts[i].option;
+ 	  flags &= ~ flag_opts[i].mask;
+ 	}
+     }
+ 
+   if (flags && add_nl_p)
+     {
+       opts[num++][0] = flags_other;
+       sprintf (flags_other, "(other flags: %#x)", flags);
+     }
+ 
+     /* Add additional flag options.  */
+   for (i = 0; i < ARRAY_SIZE (flag2_opts); i++)
+     {
+       if ((flags2 & flag2_opts[i].mask) != 0)
+ 	{
+ 	  opts[num++][0] = flag2_opts[i].option;
+ 	  flags2 &= ~ flag2_opts[i].mask;
+ 	}
+     }
+ 
+   if (flags2 && add_nl_p)
+     {
+       opts[num++][0] = flags2_other;
+       sprintf (flags2_other, "(other flags2: %#x)", flags2);
+     }
+ 
+   /* Add -mfpmath= option.  */
+   if (fpmath)
+     {
+       opts[num][0] = "-mfpmath=";
+       switch ((int) fpmath)
+ 	{
+ 	case FPMATH_387:
+ 	  opts[num++][1] = "387";
+ 	  break;
+ 
+ 	case FPMATH_SSE:
+ 	  opts[num++][1] = "sse";
+ 	  break;
+ 
+ 	case FPMATH_387 | FPMATH_SSE:
+ 	  opts[num++][1] = "sse+387";
+ 	  break;
+ 
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+     }
+ 
+   /* Add -mprefer-vector-width= option.  */
+   if (pvw)
+     {
+       opts[num][0] = "-mprefer-vector-width=";
+       switch ((int) pvw)
+ 	{
+ 	case PVW_AVX128:
+ 	  opts[num++][1] = "128";
+ 	  break;
+ 
+ 	case PVW_AVX256:
+ 	  opts[num++][1] = "256";
+ 	  break;
+ 
+ 	case PVW_AVX512:
+ 	  opts[num++][1] = "512";
+ 	  break;
+ 
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+     }
+ 
+   /* Any options?  */
+   if (num == 0)
+     return NULL;
+ 
+   gcc_assert (num < ARRAY_SIZE (opts));
+ 
+   /* Size the string.  */
+   len = 0;
+   sep_len = (add_nl_p) ? 3 : 1;
+   for (i = 0; i < num; i++)
+     {
+       len += sep_len;
+       for (j = 0; j < 2; j++)
+ 	if (opts[i][j])
+ 	  len += strlen (opts[i][j]);
+     }
+ 
+   /* Build the string.  */
+   ret = ptr = (char *) xmalloc (len);
+   line_len = 0;
+ 
+   for (i = 0; i < num; i++)
+     {
+       size_t len2[2];
+ 
+       for (j = 0; j < 2; j++)
+ 	len2[j] = (opts[i][j]) ? strlen (opts[i][j]) : 0;
+ 
+       if (i != 0)
+ 	{
+ 	  *ptr++ = ' ';
+ 	  line_len++;
+ 
+ 	  if (add_nl_p && line_len + len2[0] + len2[1] > 70)
+ 	    {
+ 	      *ptr++ = '\\';
+ 	      *ptr++ = '\n';
+ 	      line_len = 0;
+ 	    }
+ 	}
+ 
+       for (j = 0; j < 2; j++)
+ 	if (opts[i][j])
+ 	  {
+ 	    memcpy (ptr, opts[i][j], len2[j]);
+ 	    ptr += len2[j];
+ 	    line_len += len2[j];
+ 	  }
+     }
+ 
+   *ptr = '\0';
+   gcc_assert (ret + len >= ptr);
+ 
+   return ret;
+ }
+ 
+ /* Function that is callable from the debugger to print the current
+    options.  */
+ void ATTRIBUTE_UNUSED
+ ix86_debug_options (void)
+ {
+   char *opts = ix86_target_string (ix86_isa_flags, ix86_isa_flags2,
+ 				   target_flags, ix86_target_flags,
+ 				   ix86_arch_string, ix86_tune_string,
+ 				   ix86_fpmath, prefer_vector_width_type,
+ 				   true, true);
+ 
+   if (opts)
+     {
+       fprintf (stderr, "%s\n\n", opts);
+       free (opts);
+     }
+   else
+     fputs ("<no options>\n\n", stderr);
+ 
+   return;
+ }
+ 
+ /* Save the current options */
+ 
+ void
+ ix86_function_specific_save (struct cl_target_option *ptr,
+ 			     struct gcc_options *opts)
+ {
+   ptr->arch = ix86_arch;
+   ptr->schedule = ix86_schedule;
+   ptr->prefetch_sse = x86_prefetch_sse;
+   ptr->tune = ix86_tune;
+   ptr->branch_cost = ix86_branch_cost;
+   ptr->tune_defaulted = ix86_tune_defaulted;
+   ptr->arch_specified = ix86_arch_specified;
+   ptr->x_ix86_isa_flags_explicit = opts->x_ix86_isa_flags_explicit;
+   ptr->x_ix86_isa_flags2_explicit = opts->x_ix86_isa_flags2_explicit;
+   ptr->x_recip_mask_explicit = opts->x_recip_mask_explicit;
+   ptr->x_ix86_arch_string = opts->x_ix86_arch_string;
+   ptr->x_ix86_tune_string = opts->x_ix86_tune_string;
+   ptr->x_ix86_cmodel = opts->x_ix86_cmodel;
+   ptr->x_ix86_abi = opts->x_ix86_abi;
+   ptr->x_ix86_asm_dialect = opts->x_ix86_asm_dialect;
+   ptr->x_ix86_branch_cost = opts->x_ix86_branch_cost;
+   ptr->x_ix86_dump_tunes = opts->x_ix86_dump_tunes;
+   ptr->x_ix86_force_align_arg_pointer = opts->x_ix86_force_align_arg_pointer;
+   ptr->x_ix86_force_drap = opts->x_ix86_force_drap;
+   ptr->x_ix86_incoming_stack_boundary_arg = opts->x_ix86_incoming_stack_boundary_arg;
+   ptr->x_ix86_pmode = opts->x_ix86_pmode;
+   ptr->x_ix86_preferred_stack_boundary_arg = opts->x_ix86_preferred_stack_boundary_arg;
+   ptr->x_ix86_recip_name = opts->x_ix86_recip_name;
+   ptr->x_ix86_regparm = opts->x_ix86_regparm;
+   ptr->x_ix86_section_threshold = opts->x_ix86_section_threshold;
+   ptr->x_ix86_sse2avx = opts->x_ix86_sse2avx;
+   ptr->x_ix86_stack_protector_guard = opts->x_ix86_stack_protector_guard;
+   ptr->x_ix86_stringop_alg = opts->x_ix86_stringop_alg;
+   ptr->x_ix86_tls_dialect = opts->x_ix86_tls_dialect;
+   ptr->x_ix86_tune_ctrl_string = opts->x_ix86_tune_ctrl_string;
+   ptr->x_ix86_tune_memcpy_strategy = opts->x_ix86_tune_memcpy_strategy;
+   ptr->x_ix86_tune_memset_strategy = opts->x_ix86_tune_memset_strategy;
+   ptr->x_ix86_tune_no_default = opts->x_ix86_tune_no_default;
+   ptr->x_ix86_veclibabi_type = opts->x_ix86_veclibabi_type;
+ 
+   /* The fields are char but the variables are not; make sure the
+      values fit in the fields.  */
+   gcc_assert (ptr->arch == ix86_arch);
+   gcc_assert (ptr->schedule == ix86_schedule);
+   gcc_assert (ptr->tune == ix86_tune);
+   gcc_assert (ptr->branch_cost == ix86_branch_cost);
+ }
+ 
+ /* Feature tests against the various architecture variations, used to create
+    ix86_arch_features based on the processor mask.  */
+ static unsigned HOST_WIDE_INT initial_ix86_arch_features[X86_ARCH_LAST] = {
+   /* X86_ARCH_CMOV: Conditional move was added for pentiumpro.  */
+   ~(m_386 | m_486 | m_PENT | m_LAKEMONT | m_K6),
+ 
+   /* X86_ARCH_CMPXCHG: Compare and exchange was added for 80486.  */
+   ~m_386,
+ 
+   /* X86_ARCH_CMPXCHG8B: Compare and exchange 8 bytes was added for pentium. */
+   ~(m_386 | m_486),
+ 
+   /* X86_ARCH_XADD: Exchange and add was added for 80486.  */
+   ~m_386,
+ 
+   /* X86_ARCH_BSWAP: Byteswap was added for 80486.  */
+   ~m_386,
+ };
+ 
+ /* This table must be in sync with enum processor_type in i386.h.  */ 
+ static const struct processor_costs *processor_cost_table[] =
+ {
+   &generic_cost,
+   &i386_cost,
+   &i486_cost,
+   &pentium_cost,
+   &lakemont_cost,
+   &pentiumpro_cost,
+   &pentium4_cost,
+   &nocona_cost,
+   &core_cost,
+   &core_cost,
+   &core_cost,
+   &core_cost,
+   &atom_cost,
+   &slm_cost,
+   &slm_cost,
+   &slm_cost,
+   &slm_cost,
+   &slm_cost,
+   &slm_cost,
+   &skylake_cost,
+   &skylake_cost,
+   &skylake_cost,
+   &skylake_cost,
+   &skylake_cost,
+   &skylake_cost,
+   &skylake_cost,
+   &skylake_cost,
+   &intel_cost,
+   &geode_cost,
+   &k6_cost,
+   &athlon_cost,
+   &k8_cost,
+   &amdfam10_cost,
+   &bdver_cost,
+   &bdver_cost,
+   &bdver_cost,
+   &bdver_cost,
+   &btver1_cost,
+   &btver2_cost,
+   &znver1_cost,
+   &znver2_cost
+ };
+ 
+ /* Guarantee that the array is aligned with enum processor_type.  */
+ STATIC_ASSERT (ARRAY_SIZE (processor_cost_table) == PROCESSOR_max);
+ 
+ static bool
+ ix86_option_override_internal (bool main_args_p,
+ 			       struct gcc_options *opts,
+ 			       struct gcc_options *opts_set);
+ static void
+ set_ix86_tune_features (struct gcc_options *opts,
+ 			enum processor_type ix86_tune, bool dump);
+ 
+ /* Restore the current options */
+ 
+ void
+ ix86_function_specific_restore (struct gcc_options *opts,
+ 				struct cl_target_option *ptr)
+ {
+   enum processor_type old_tune = ix86_tune;
+   enum processor_type old_arch = ix86_arch;
+   unsigned HOST_WIDE_INT ix86_arch_mask;
+   int i;
+ 
+   /* We don't change -fPIC.  */
+   opts->x_flag_pic = flag_pic;
+ 
+   ix86_arch = (enum processor_type) ptr->arch;
+   ix86_schedule = (enum attr_cpu) ptr->schedule;
+   ix86_tune = (enum processor_type) ptr->tune;
+   x86_prefetch_sse = ptr->prefetch_sse;
+   opts->x_ix86_branch_cost = ptr->branch_cost;
+   ix86_tune_defaulted = ptr->tune_defaulted;
+   ix86_arch_specified = ptr->arch_specified;
+   opts->x_ix86_isa_flags_explicit = ptr->x_ix86_isa_flags_explicit;
+   opts->x_ix86_isa_flags2_explicit = ptr->x_ix86_isa_flags2_explicit;
+   opts->x_recip_mask_explicit = ptr->x_recip_mask_explicit;
+   opts->x_ix86_arch_string = ptr->x_ix86_arch_string;
+   opts->x_ix86_tune_string = ptr->x_ix86_tune_string;
+   opts->x_ix86_cmodel = ptr->x_ix86_cmodel;
+   opts->x_ix86_abi = ptr->x_ix86_abi;
+   opts->x_ix86_asm_dialect = ptr->x_ix86_asm_dialect;
+   opts->x_ix86_branch_cost = ptr->x_ix86_branch_cost;
+   opts->x_ix86_dump_tunes = ptr->x_ix86_dump_tunes;
+   opts->x_ix86_force_align_arg_pointer = ptr->x_ix86_force_align_arg_pointer;
+   opts->x_ix86_force_drap = ptr->x_ix86_force_drap;
+   opts->x_ix86_incoming_stack_boundary_arg = ptr->x_ix86_incoming_stack_boundary_arg;
+   opts->x_ix86_pmode = ptr->x_ix86_pmode;
+   opts->x_ix86_preferred_stack_boundary_arg = ptr->x_ix86_preferred_stack_boundary_arg;
+   opts->x_ix86_recip_name = ptr->x_ix86_recip_name;
+   opts->x_ix86_regparm = ptr->x_ix86_regparm;
+   opts->x_ix86_section_threshold = ptr->x_ix86_section_threshold;
+   opts->x_ix86_sse2avx = ptr->x_ix86_sse2avx;
+   opts->x_ix86_stack_protector_guard = ptr->x_ix86_stack_protector_guard;
+   opts->x_ix86_stringop_alg = ptr->x_ix86_stringop_alg;
+   opts->x_ix86_tls_dialect = ptr->x_ix86_tls_dialect;
+   opts->x_ix86_tune_ctrl_string = ptr->x_ix86_tune_ctrl_string;
+   opts->x_ix86_tune_memcpy_strategy = ptr->x_ix86_tune_memcpy_strategy;
+   opts->x_ix86_tune_memset_strategy = ptr->x_ix86_tune_memset_strategy;
+   opts->x_ix86_tune_no_default = ptr->x_ix86_tune_no_default;
+   opts->x_ix86_veclibabi_type = ptr->x_ix86_veclibabi_type;
+   ix86_tune_cost = processor_cost_table[ix86_tune];
+   /* TODO: ix86_cost should be chosen at instruction or function granuality
+      so for cold code we use size_cost even in !optimize_size compilation.  */
+   if (opts->x_optimize_size)
+     ix86_cost = &ix86_size_cost;
+   else
+     ix86_cost = ix86_tune_cost;
+ 
+   /* Recreate the arch feature tests if the arch changed */
+   if (old_arch != ix86_arch)
+     {
+       ix86_arch_mask = HOST_WIDE_INT_1U << ix86_arch;
+       for (i = 0; i < X86_ARCH_LAST; ++i)
+ 	ix86_arch_features[i]
+ 	  = !!(initial_ix86_arch_features[i] & ix86_arch_mask);
+     }
+ 
+   /* Recreate the tune optimization tests */
+   if (old_tune != ix86_tune)
+     set_ix86_tune_features (opts, ix86_tune, false);
+ }
+ 
+ /* Adjust target options after streaming them in.  This is mainly about
+    reconciling them with global options.  */
+ 
+ void
+ ix86_function_specific_post_stream_in (struct cl_target_option *ptr)
+ {
+   /* flag_pic is a global option, but ix86_cmodel is target saved option
+      partly computed from flag_pic.  If flag_pic is on, adjust x_ix86_cmodel
+      for PIC, or error out.  */
+   if (flag_pic)
+     switch (ptr->x_ix86_cmodel)
+       {
+       case CM_SMALL:
+ 	ptr->x_ix86_cmodel = CM_SMALL_PIC;
+ 	break;
+ 
+       case CM_MEDIUM:
+ 	ptr->x_ix86_cmodel = CM_MEDIUM_PIC;
+ 	break;
+ 
+       case CM_LARGE:
+ 	ptr->x_ix86_cmodel = CM_LARGE_PIC;
+ 	break;
+ 
+       case CM_KERNEL:
+ 	error ("code model %s does not support PIC mode", "kernel");
+ 	break;
+ 
+       default:
+ 	break;
+       }
+   else
+     switch (ptr->x_ix86_cmodel)
+       {
+       case CM_SMALL_PIC:
+ 	ptr->x_ix86_cmodel = CM_SMALL;
+ 	break;
+ 
+       case CM_MEDIUM_PIC:
+ 	ptr->x_ix86_cmodel = CM_MEDIUM;
+ 	break;
+ 
+       case CM_LARGE_PIC:
+ 	ptr->x_ix86_cmodel = CM_LARGE;
+ 	break;
+ 
+       default:
+ 	break;
+       }
+ }
+ 
+ /* Print the current options */
+ 
+ void
+ ix86_function_specific_print (FILE *file, int indent,
+ 			      struct cl_target_option *ptr)
+ {
+   char *target_string
+     = ix86_target_string (ptr->x_ix86_isa_flags, ptr->x_ix86_isa_flags2,
+ 			  ptr->x_target_flags, ptr->x_ix86_target_flags,
+ 			  NULL, NULL, ptr->x_ix86_fpmath,
+ 			  ptr->x_prefer_vector_width_type, false, true);
+ 
+   gcc_assert (ptr->arch < PROCESSOR_max);
+   fprintf (file, "%*sarch = %d (%s)\n",
+ 	   indent, "",
+ 	   ptr->arch, processor_names[ptr->arch]);
+ 
+   gcc_assert (ptr->tune < PROCESSOR_max);
+   fprintf (file, "%*stune = %d (%s)\n",
+ 	   indent, "",
+ 	   ptr->tune, processor_names[ptr->tune]);
+ 
+   fprintf (file, "%*sbranch_cost = %d\n", indent, "", ptr->branch_cost);
+ 
+   if (target_string)
+     {
+       fprintf (file, "%*s%s\n", indent, "", target_string);
+       free (target_string);
+     }
+ }
+ 
+ 
+ /* Inner function to process the attribute((target(...))), take an argument and
+    set the current options from the argument. If we have a list, recursively go
+    over the list.  */
+ 
+ static bool
+ ix86_valid_target_attribute_inner_p (tree fndecl, tree args, char *p_strings[],
+ 				     struct gcc_options *opts,
+ 				     struct gcc_options *opts_set,
+ 				     struct gcc_options *enum_opts_set,
+ 				     bool target_clone_attr)
+ {
+   char *next_optstr;
+   bool ret = true;
+ 
+ #define IX86_ATTR_ISA(S,O)   { S, sizeof (S)-1, ix86_opt_isa, O, 0 }
+ #define IX86_ATTR_STR(S,O)   { S, sizeof (S)-1, ix86_opt_str, O, 0 }
+ #define IX86_ATTR_ENUM(S,O)  { S, sizeof (S)-1, ix86_opt_enum, O, 0 }
+ #define IX86_ATTR_YES(S,O,M) { S, sizeof (S)-1, ix86_opt_yes, O, M }
+ #define IX86_ATTR_NO(S,O,M)  { S, sizeof (S)-1, ix86_opt_no,  O, M }
+ 
+   enum ix86_opt_type
+   {
+     ix86_opt_unknown,
+     ix86_opt_yes,
+     ix86_opt_no,
+     ix86_opt_str,
+     ix86_opt_enum,
+     ix86_opt_isa
+   };
+ 
+   static const struct
+   {
+     const char *string;
+     size_t len;
+     enum ix86_opt_type type;
+     int opt;
+     int mask;
+   } attrs[] = {
+     /* isa options */
+     IX86_ATTR_ISA ("pconfig",	OPT_mpconfig),
+     IX86_ATTR_ISA ("wbnoinvd",	OPT_mwbnoinvd),
+     IX86_ATTR_ISA ("sgx",	OPT_msgx),
+     IX86_ATTR_ISA ("avx5124fmaps", OPT_mavx5124fmaps),
+     IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw),
+     IX86_ATTR_ISA ("avx512vpopcntdq", OPT_mavx512vpopcntdq),
+     IX86_ATTR_ISA ("avx512vbmi2", OPT_mavx512vbmi2),
+     IX86_ATTR_ISA ("avx512vnni", OPT_mavx512vnni),
+     IX86_ATTR_ISA ("avx512bitalg", OPT_mavx512bitalg),
+     IX86_ATTR_ISA ("avx512vp2intersect", OPT_mavx512vp2intersect),
+ 
+     IX86_ATTR_ISA ("avx512vbmi", OPT_mavx512vbmi),
+     IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma),
+     IX86_ATTR_ISA ("avx512vl",	OPT_mavx512vl),
+     IX86_ATTR_ISA ("avx512bw",	OPT_mavx512bw),
+     IX86_ATTR_ISA ("avx512dq",	OPT_mavx512dq),
+     IX86_ATTR_ISA ("avx512er",	OPT_mavx512er),
+     IX86_ATTR_ISA ("avx512pf",	OPT_mavx512pf),
+     IX86_ATTR_ISA ("avx512cd",	OPT_mavx512cd),
+     IX86_ATTR_ISA ("avx512f",	OPT_mavx512f),
+     IX86_ATTR_ISA ("avx2",	OPT_mavx2),
+     IX86_ATTR_ISA ("fma",	OPT_mfma),
+     IX86_ATTR_ISA ("xop",	OPT_mxop),
+     IX86_ATTR_ISA ("fma4",	OPT_mfma4),
+     IX86_ATTR_ISA ("f16c",	OPT_mf16c),
+     IX86_ATTR_ISA ("avx",	OPT_mavx),
+     IX86_ATTR_ISA ("sse4",	OPT_msse4),
+     IX86_ATTR_ISA ("sse4.2",	OPT_msse4_2),
+     IX86_ATTR_ISA ("sse4.1",	OPT_msse4_1),
+     IX86_ATTR_ISA ("sse4a",	OPT_msse4a),
+     IX86_ATTR_ISA ("ssse3",	OPT_mssse3),
+     IX86_ATTR_ISA ("sse3",	OPT_msse3),
+     IX86_ATTR_ISA ("aes",	OPT_maes),
+     IX86_ATTR_ISA ("sha",	OPT_msha),
+     IX86_ATTR_ISA ("pclmul",	OPT_mpclmul),
+     IX86_ATTR_ISA ("sse2",	OPT_msse2),
+     IX86_ATTR_ISA ("sse",	OPT_msse),
+     IX86_ATTR_ISA ("3dnowa",	OPT_m3dnowa),
+     IX86_ATTR_ISA ("3dnow",	OPT_m3dnow),
+     IX86_ATTR_ISA ("mmx",	OPT_mmmx),
+     IX86_ATTR_ISA ("rtm",	OPT_mrtm),
+     IX86_ATTR_ISA ("prfchw",	OPT_mprfchw),
+     IX86_ATTR_ISA ("rdseed",	OPT_mrdseed),
+     IX86_ATTR_ISA ("adx",	OPT_madx),
+     IX86_ATTR_ISA ("prefetchwt1", OPT_mprefetchwt1),
+     IX86_ATTR_ISA ("clflushopt", OPT_mclflushopt),
+     IX86_ATTR_ISA ("xsaves",	OPT_mxsaves),
+     IX86_ATTR_ISA ("xsavec",	OPT_mxsavec),
+     IX86_ATTR_ISA ("xsaveopt",	OPT_mxsaveopt),
+     IX86_ATTR_ISA ("xsave",	OPT_mxsave),
+     IX86_ATTR_ISA ("abm",	OPT_mabm),
+     IX86_ATTR_ISA ("bmi",	OPT_mbmi),
+     IX86_ATTR_ISA ("bmi2",	OPT_mbmi2),
+     IX86_ATTR_ISA ("lzcnt",	OPT_mlzcnt),
+     IX86_ATTR_ISA ("tbm",	OPT_mtbm),
+     IX86_ATTR_ISA ("popcnt",	OPT_mpopcnt),
+     IX86_ATTR_ISA ("cx16",	OPT_mcx16),
+     IX86_ATTR_ISA ("sahf",	OPT_msahf),
+     IX86_ATTR_ISA ("movbe",	OPT_mmovbe),
+     IX86_ATTR_ISA ("crc32",	OPT_mcrc32),
+     IX86_ATTR_ISA ("fsgsbase",	OPT_mfsgsbase),
+     IX86_ATTR_ISA ("rdrnd",	OPT_mrdrnd),
+     IX86_ATTR_ISA ("mwaitx",	OPT_mmwaitx),
+     IX86_ATTR_ISA ("clzero",	OPT_mclzero),
+     IX86_ATTR_ISA ("pku",	OPT_mpku),
+     IX86_ATTR_ISA ("lwp",	OPT_mlwp),
+     IX86_ATTR_ISA ("hle",	OPT_mhle),
+     IX86_ATTR_ISA ("fxsr",	OPT_mfxsr),
+     IX86_ATTR_ISA ("clwb",	OPT_mclwb),
+     IX86_ATTR_ISA ("rdpid",	OPT_mrdpid),
+     IX86_ATTR_ISA ("gfni",	OPT_mgfni),
+     IX86_ATTR_ISA ("shstk",	OPT_mshstk),
+     IX86_ATTR_ISA ("vaes",	OPT_mvaes),
+     IX86_ATTR_ISA ("vpclmulqdq", OPT_mvpclmulqdq),
+     IX86_ATTR_ISA ("movdiri", OPT_mmovdiri),
+     IX86_ATTR_ISA ("movdir64b", OPT_mmovdir64b),
+     IX86_ATTR_ISA ("waitpkg", OPT_mwaitpkg),
+     IX86_ATTR_ISA ("cldemote", OPT_mcldemote),
+     IX86_ATTR_ISA ("ptwrite",   OPT_mptwrite),
+     IX86_ATTR_ISA ("avx512bf16",   OPT_mavx512bf16),
+     IX86_ATTR_ISA ("enqcmd", OPT_menqcmd),
+ 
+     /* enum options */
+     IX86_ATTR_ENUM ("fpmath=",	OPT_mfpmath_),
+     IX86_ATTR_ENUM ("prefer-vector-width=", OPT_mprefer_vector_width_),
+ 
+     /* string options */
+     IX86_ATTR_STR ("arch=",	IX86_FUNCTION_SPECIFIC_ARCH),
+     IX86_ATTR_STR ("tune=",	IX86_FUNCTION_SPECIFIC_TUNE),
+ 
+     /* flag options */
+     IX86_ATTR_YES ("cld",
+ 		   OPT_mcld,
+ 		   MASK_CLD),
+ 
+     IX86_ATTR_NO ("fancy-math-387",
+ 		  OPT_mfancy_math_387,
+ 		  MASK_NO_FANCY_MATH_387),
+ 
+     IX86_ATTR_YES ("ieee-fp",
+ 		   OPT_mieee_fp,
+ 		   MASK_IEEE_FP),
+ 
+     IX86_ATTR_YES ("inline-all-stringops",
+ 		   OPT_minline_all_stringops,
+ 		   MASK_INLINE_ALL_STRINGOPS),
+ 
+     IX86_ATTR_YES ("inline-stringops-dynamically",
+ 		   OPT_minline_stringops_dynamically,
+ 		   MASK_INLINE_STRINGOPS_DYNAMICALLY),
+ 
+     IX86_ATTR_NO ("align-stringops",
+ 		  OPT_mno_align_stringops,
+ 		  MASK_NO_ALIGN_STRINGOPS),
+ 
+     IX86_ATTR_YES ("recip",
+ 		   OPT_mrecip,
+ 		   MASK_RECIP),
+   };
+ 
+   location_t loc
+     = fndecl == NULL ? UNKNOWN_LOCATION : DECL_SOURCE_LOCATION (fndecl);
+   const char *attr_name = target_clone_attr ? "target_clone" : "target";
+ 
+   /* If this is a list, recurse to get the options.  */
+   if (TREE_CODE (args) == TREE_LIST)
+     {
+       bool ret = true;
+ 
+       for (; args; args = TREE_CHAIN (args))
+ 	if (TREE_VALUE (args)
+ 	    && !ix86_valid_target_attribute_inner_p (fndecl, TREE_VALUE (args),
+ 						     p_strings, opts, opts_set,
+ 						     enum_opts_set,
+ 						     target_clone_attr))
+ 	  ret = false;
+ 
+       return ret;
+     }
+ 
+   else if (TREE_CODE (args) != STRING_CST)
+     {
+       error_at (loc, "attribute %qs argument is not a string", attr_name);
+       return false;
+     }
+ 
+   /* Handle multiple arguments separated by commas.  */
+   next_optstr = ASTRDUP (TREE_STRING_POINTER (args));
+ 
+   while (next_optstr && *next_optstr != '\0')
+     {
+       char *p = next_optstr;
+       char *orig_p = p;
+       char *comma = strchr (next_optstr, ',');
+       size_t len, opt_len;
+       int opt;
+       bool opt_set_p;
+       char ch;
+       unsigned i;
+       enum ix86_opt_type type = ix86_opt_unknown;
+       int mask = 0;
+ 
+       if (comma)
+ 	{
+ 	  *comma = '\0';
+ 	  len = comma - next_optstr;
+ 	  next_optstr = comma + 1;
+ 	}
+       else
+ 	{
+ 	  len = strlen (p);
+ 	  next_optstr = NULL;
+ 	}
+ 
+       /* Recognize no-xxx.  */
+       if (len > 3 && p[0] == 'n' && p[1] == 'o' && p[2] == '-')
+ 	{
+ 	  opt_set_p = false;
+ 	  p += 3;
+ 	  len -= 3;
+ 	}
+       else
+ 	opt_set_p = true;
+ 
+       /* Find the option.  */
+       ch = *p;
+       opt = N_OPTS;
+       for (i = 0; i < ARRAY_SIZE (attrs); i++)
+ 	{
+ 	  type = attrs[i].type;
+ 	  opt_len = attrs[i].len;
+ 	  if (ch == attrs[i].string[0]
+ 	      && ((type != ix86_opt_str && type != ix86_opt_enum)
+ 		  ? len == opt_len
+ 		  : len > opt_len)
+ 	      && memcmp (p, attrs[i].string, opt_len) == 0)
+ 	    {
+ 	      opt = attrs[i].opt;
+ 	      mask = attrs[i].mask;
+ 	      break;
+ 	    }
+ 	}
+ 
+       /* Process the option.  */
+       if (opt == N_OPTS)
+ 	{
+ 	  error_at (loc, "attribute %qs argument %qs is unknown",
+ 		    orig_p, attr_name);
+ 	  ret = false;
+ 	}
+ 
+       else if (type == ix86_opt_isa)
+ 	{
+ 	  struct cl_decoded_option decoded;
+ 
+ 	  generate_option (opt, NULL, opt_set_p, CL_TARGET, &decoded);
+ 	  ix86_handle_option (opts, opts_set,
+ 			      &decoded, input_location);
+ 	}
+ 
+       else if (type == ix86_opt_yes || type == ix86_opt_no)
+ 	{
+ 	  if (type == ix86_opt_no)
+ 	    opt_set_p = !opt_set_p;
+ 
+ 	  if (opt_set_p)
+ 	    opts->x_target_flags |= mask;
+ 	  else
+ 	    opts->x_target_flags &= ~mask;
+ 	}
+ 
+       else if (type == ix86_opt_str)
+ 	{
+ 	  if (p_strings[opt])
+ 	    {
+ 	      error_at (loc, "attribute value %qs was already specified "
+ 			"in %qs attribute", orig_p, attr_name);
+ 	      ret = false;
+ 	    }
+ 	  else
+ 	    {
+ 	      p_strings[opt] = xstrdup (p + opt_len);
+ 	      if (opt == IX86_FUNCTION_SPECIFIC_ARCH)
+ 		{
+ 		  /* If arch= is set,  clear all bits in x_ix86_isa_flags,
+ 		     except for ISA_64BIT, ABI_64, ABI_X32, and CODE16
+ 		     and all bits in x_ix86_isa_flags2.  */
+ 		  opts->x_ix86_isa_flags &= (OPTION_MASK_ISA_64BIT
+ 					     | OPTION_MASK_ABI_64
+ 					     | OPTION_MASK_ABI_X32
+ 					     | OPTION_MASK_CODE16);
+ 		  opts->x_ix86_isa_flags_explicit &= (OPTION_MASK_ISA_64BIT
+ 						      | OPTION_MASK_ABI_64
+ 						      | OPTION_MASK_ABI_X32
+ 						      | OPTION_MASK_CODE16);
+ 		  opts->x_ix86_isa_flags2 = 0;
+ 		  opts->x_ix86_isa_flags2_explicit = 0;
+ 		}
+ 	    }
+ 	}
+ 
+       else if (type == ix86_opt_enum)
+ 	{
+ 	  bool arg_ok;
+ 	  int value;
+ 
+ 	  arg_ok = opt_enum_arg_to_value (opt, p + opt_len, &value, CL_TARGET);
+ 	  if (arg_ok)
+ 	    set_option (opts, enum_opts_set, opt, value,
+ 			p + opt_len, DK_UNSPECIFIED, input_location,
+ 			global_dc);
+ 	  else
+ 	    {
+ 	      error_at (loc, "attribute value %qs is unknown in %qs attribute",
+ 			orig_p, attr_name);
+ 	      ret = false;
+ 	    }
+ 	}
+ 
+       else
+ 	gcc_unreachable ();
+     }
+ 
+   return ret;
+ }
+ 
+ /* Release allocated strings.  */
+ static void
+ release_options_strings (char **option_strings)
+ {
+   /* Free up memory allocated to hold the strings */
+   for (unsigned i = 0; i < IX86_FUNCTION_SPECIFIC_MAX; i++)
+     free (option_strings[i]);
+ }
+ 
+ /* Return a TARGET_OPTION_NODE tree of the target options listed or NULL.  */
+ 
+ tree
+ ix86_valid_target_attribute_tree (tree fndecl, tree args,
+ 				  struct gcc_options *opts,
+ 				  struct gcc_options *opts_set,
+ 				  bool target_clone_attr)
+ {
+   const char *orig_arch_string = opts->x_ix86_arch_string;
+   const char *orig_tune_string = opts->x_ix86_tune_string;
+   enum fpmath_unit orig_fpmath_set = opts_set->x_ix86_fpmath;
+   enum prefer_vector_width orig_pvw_set = opts_set->x_prefer_vector_width_type;
+   int orig_tune_defaulted = ix86_tune_defaulted;
+   int orig_arch_specified = ix86_arch_specified;
+   char *option_strings[IX86_FUNCTION_SPECIFIC_MAX] = { NULL, NULL };
+   tree t = NULL_TREE;
+   struct cl_target_option *def
+     = TREE_TARGET_OPTION (target_option_default_node);
+   struct gcc_options enum_opts_set;
+ 
+   memset (&enum_opts_set, 0, sizeof (enum_opts_set));
+ 
+   /* Process each of the options on the chain.  */
+   if (!ix86_valid_target_attribute_inner_p (fndecl, args, option_strings, opts,
+ 					    opts_set, &enum_opts_set,
+ 					    target_clone_attr))
+     return error_mark_node;
+ 
+   /* If the changed options are different from the default, rerun
+      ix86_option_override_internal, and then save the options away.
+      The string options are attribute options, and will be undone
+      when we copy the save structure.  */
+   if (opts->x_ix86_isa_flags != def->x_ix86_isa_flags
+       || opts->x_ix86_isa_flags2 != def->x_ix86_isa_flags2
+       || opts->x_target_flags != def->x_target_flags
+       || option_strings[IX86_FUNCTION_SPECIFIC_ARCH]
+       || option_strings[IX86_FUNCTION_SPECIFIC_TUNE]
+       || enum_opts_set.x_ix86_fpmath
+       || enum_opts_set.x_prefer_vector_width_type)
+     {
+       /* If we are using the default tune= or arch=, undo the string assigned,
+ 	 and use the default.  */
+       if (option_strings[IX86_FUNCTION_SPECIFIC_ARCH])
+ 	opts->x_ix86_arch_string
+ 	  = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_ARCH]);
+       else if (!orig_arch_specified)
+ 	opts->x_ix86_arch_string = NULL;
+ 
+       if (option_strings[IX86_FUNCTION_SPECIFIC_TUNE])
+ 	opts->x_ix86_tune_string
+ 	  = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_TUNE]);
+       else if (orig_tune_defaulted)
+ 	opts->x_ix86_tune_string = NULL;
+ 
+       /* If fpmath= is not set, and we now have sse2 on 32-bit, use it.  */
+       if (enum_opts_set.x_ix86_fpmath)
+ 	opts_set->x_ix86_fpmath = (enum fpmath_unit) 1;
+       if (enum_opts_set.x_prefer_vector_width_type)
+ 	opts_set->x_prefer_vector_width_type = (enum prefer_vector_width) 1;
+ 
+       /* Do any overrides, such as arch=xxx, or tune=xxx support.  */
+       bool r = ix86_option_override_internal (false, opts, opts_set);
+       if (!r)
+ 	{
+ 	  release_options_strings (option_strings);
+ 	  return error_mark_node;
+ 	}
+ 
+       /* Add any builtin functions with the new isa if any.  */
+       ix86_add_new_builtins (opts->x_ix86_isa_flags, opts->x_ix86_isa_flags2);
+ 
+       /* Save the current options unless we are validating options for
+ 	 #pragma.  */
+       t = build_target_option_node (opts);
+ 
+       opts->x_ix86_arch_string = orig_arch_string;
+       opts->x_ix86_tune_string = orig_tune_string;
+       opts_set->x_ix86_fpmath = orig_fpmath_set;
+       opts_set->x_prefer_vector_width_type = orig_pvw_set;
+ 
+       release_options_strings (option_strings);
+     }
+ 
+   return t;
+ }
+ 
+ /* Hook to validate attribute((target("string"))).  */
+ 
+ bool
+ ix86_valid_target_attribute_p (tree fndecl,
+ 			       tree ARG_UNUSED (name),
+ 			       tree args,
+ 			       int flags)
+ {
+   struct gcc_options func_options;
+   tree new_target, new_optimize;
+   bool ret = true;
+ 
+   /* attribute((target("default"))) does nothing, beyond
+      affecting multi-versioning.  */
+   if (TREE_VALUE (args)
+       && TREE_CODE (TREE_VALUE (args)) == STRING_CST
+       && TREE_CHAIN (args) == NULL_TREE
+       && strcmp (TREE_STRING_POINTER (TREE_VALUE (args)), "default") == 0)
+     return true;
+ 
+   tree old_optimize = build_optimization_node (&global_options);
+ 
+   /* Get the optimization options of the current function.  */  
+   tree func_optimize = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);
+  
+   if (!func_optimize)
+     func_optimize = old_optimize;
+ 
+   /* Init func_options.  */
+   memset (&func_options, 0, sizeof (func_options));
+   init_options_struct (&func_options, NULL);
+   lang_hooks.init_options_struct (&func_options);
+  
+   cl_optimization_restore (&func_options,
+ 			   TREE_OPTIMIZATION (func_optimize));
+ 
+   /* Initialize func_options to the default before its target options can
+      be set.  */
+   cl_target_option_restore (&func_options,
+ 			    TREE_TARGET_OPTION (target_option_default_node));
+ 
+   /* FLAGS == 1 is used for target_clones attribute.  */
+   new_target
+     = ix86_valid_target_attribute_tree (fndecl, args, &func_options,
+ 					&global_options_set, flags == 1);
+ 
+   new_optimize = build_optimization_node (&func_options);
+ 
+   if (new_target == error_mark_node)
+     ret = false;
+ 
+   else if (fndecl && new_target)
+     {
+       DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = new_target;
+ 
+       if (old_optimize != new_optimize)
+ 	DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl) = new_optimize;
+     }
+ 
+   return ret;
+ }
+ 
+ const char *stringop_alg_names[] = {
+ #define DEF_ENUM
+ #define DEF_ALG(alg, name) #name,
+ #include "stringop.def"
+ #undef DEF_ENUM
+ #undef DEF_ALG
+ };
+ 
+ /* Parse parameter string passed to -mmemcpy-strategy= or -mmemset-strategy=.
+    The string is of the following form (or comma separated list of it):
+ 
+      strategy_alg:max_size:[align|noalign]
+ 
+    where the full size range for the strategy is either [0, max_size] or
+    [min_size, max_size], in which min_size is the max_size + 1 of the
+    preceding range.  The last size range must have max_size == -1.
+ 
+    Examples:
+ 
+     1.
+        -mmemcpy-strategy=libcall:-1:noalign
+ 
+       this is equivalent to (for known size memcpy) -mstringop-strategy=libcall
+ 
+ 
+    2.
+       -mmemset-strategy=rep_8byte:16:noalign,vector_loop:2048:align,libcall:-1:noalign
+ 
+       This is to tell the compiler to use the following strategy for memset
+       1) when the expected size is between [1, 16], use rep_8byte strategy;
+       2) when the size is between [17, 2048], use vector_loop;
+       3) when the size is > 2048, use libcall.  */
+ 
+ struct stringop_size_range
+ {
+   int max;
+   stringop_alg alg;
+   bool noalign;
+ };
+ 
+ static void
+ ix86_parse_stringop_strategy_string (char *strategy_str, bool is_memset)
+ {
+   const struct stringop_algs *default_algs;
+   stringop_size_range input_ranges[MAX_STRINGOP_ALGS];
+   char *curr_range_str, *next_range_str;
+   const char *opt = is_memset ? "-mmemset_strategy=" : "-mmemcpy_strategy=";
+   int i = 0, n = 0;
+ 
+   if (is_memset)
+     default_algs = &ix86_cost->memset[TARGET_64BIT != 0];
+   else
+     default_algs = &ix86_cost->memcpy[TARGET_64BIT != 0];
+ 
+   curr_range_str = strategy_str;
+ 
+   do
+     {
+       int maxs;
+       char alg_name[128];
+       char align[16];
+       next_range_str = strchr (curr_range_str, ',');
+       if (next_range_str)
+         *next_range_str++ = '\0';
+ 
+       if (sscanf (curr_range_str, "%20[^:]:%d:%10s", alg_name, &maxs,
+ 		  align) != 3)
+         {
+ 	  error ("wrong argument %qs to option %qs", curr_range_str, opt);
+           return;
+         }
+ 
+       if (n > 0 && (maxs < (input_ranges[n - 1].max + 1) && maxs != -1))
+         {
+ 	  error ("size ranges of option %qs should be increasing", opt);
+           return;
+         }
+ 
+       for (i = 0; i < last_alg; i++)
+ 	if (!strcmp (alg_name, stringop_alg_names[i]))
+ 	  break;
+ 
+       if (i == last_alg)
+         {
+ 	  error ("wrong strategy name %qs specified for option %qs",
+ 		 alg_name, opt);
+ 
+ 	  auto_vec <const char *> candidates;
+ 	  for (i = 0; i < last_alg; i++)
+ 	    if ((stringop_alg) i != rep_prefix_8_byte || TARGET_64BIT)
+ 	      candidates.safe_push (stringop_alg_names[i]);
+ 
+ 	  char *s;
+ 	  const char *hint
+ 	    = candidates_list_and_hint (alg_name, s, candidates);
+ 	  if (hint)
+ 	    inform (input_location,
+ 		    "valid arguments to %qs are: %s; did you mean %qs?",
+ 		    opt, s, hint);
+ 	  else
+ 	    inform (input_location, "valid arguments to %qs are: %s",
+ 		    opt, s);
+ 	  XDELETEVEC (s);
+           return;
+         }
+ 
+       if ((stringop_alg) i == rep_prefix_8_byte
+ 	  && !TARGET_64BIT)
+ 	{
+ 	  /* rep; movq isn't available in 32-bit code.  */
+ 	  error ("strategy name %qs specified for option %qs "
+ 		 "not supported for 32-bit code", alg_name, opt);
+ 	  return;
+ 	}
+ 
+       input_ranges[n].max = maxs;
+       input_ranges[n].alg = (stringop_alg) i;
+       if (!strcmp (align, "align"))
+         input_ranges[n].noalign = false;
+       else if (!strcmp (align, "noalign"))
+         input_ranges[n].noalign = true;
+       else
+         {
+ 	  error ("unknown alignment %qs specified for option %qs", align, opt);
+           return;
+         }
+       n++;
+       curr_range_str = next_range_str;
+     }
+   while (curr_range_str);
+ 
+   if (input_ranges[n - 1].max != -1)
+     {
+       error ("the max value for the last size range should be -1"
+              " for option %qs", opt);
+       return;
+     }
+ 
+   if (n > MAX_STRINGOP_ALGS)
+     {
+       error ("too many size ranges specified in option %qs", opt);
+       return;
+     }
+ 
+   /* Now override the default algs array.  */
+   for (i = 0; i < n; i++)
+     {
+       *const_cast<int *>(&default_algs->size[i].max) = input_ranges[i].max;
+       *const_cast<stringop_alg *>(&default_algs->size[i].alg)
+           = input_ranges[i].alg;
+       *const_cast<int *>(&default_algs->size[i].noalign)
+           = input_ranges[i].noalign;
+     }
+ }
+ 
+ 
+ /* parse -mtune-ctrl= option. When DUMP is true,
+    print the features that are explicitly set.  */
+ 
+ static void
+ parse_mtune_ctrl_str (struct gcc_options *opts, bool dump)
+ {
+   if (!opts->x_ix86_tune_ctrl_string)
+     return;
+ 
+   char *next_feature_string = NULL;
+   char *curr_feature_string = xstrdup (opts->x_ix86_tune_ctrl_string);
+   char *orig = curr_feature_string;
+   int i;
+   do
+     {
+       bool clear = false;
+ 
+       next_feature_string = strchr (curr_feature_string, ',');
+       if (next_feature_string)
+         *next_feature_string++ = '\0';
+       if (*curr_feature_string == '^')
+         {
+           curr_feature_string++;
+           clear = true;
+         }
+       for (i = 0; i < X86_TUNE_LAST; i++)
+         {
+           if (!strcmp (curr_feature_string, ix86_tune_feature_names[i]))
+             {
+               ix86_tune_features[i] = !clear;
+               if (dump)
+                 fprintf (stderr, "Explicitly %s feature %s\n",
+                          clear ? "clear" : "set", ix86_tune_feature_names[i]);
+               break;
+             }
+         }
+       if (i == X86_TUNE_LAST)
+ 	error ("unknown parameter to option %<-mtune-ctrl%>: %s",
+ 	       clear ? curr_feature_string - 1 : curr_feature_string);
+       curr_feature_string = next_feature_string;
+     }
+   while (curr_feature_string);
+   free (orig);
+ }
+ 
+ /* Helper function to set ix86_tune_features. IX86_TUNE is the
+    processor type.  */
+ 
+ static void
+ set_ix86_tune_features (struct gcc_options *opts,
+ 			enum processor_type ix86_tune, bool dump)
+ {
+   unsigned HOST_WIDE_INT ix86_tune_mask = HOST_WIDE_INT_1U << ix86_tune;
+   int i;
+ 
+   for (i = 0; i < X86_TUNE_LAST; ++i)
+     {
+       if (ix86_tune_no_default)
+         ix86_tune_features[i] = 0;
+       else
+ 	ix86_tune_features[i]
+ 	  = !!(initial_ix86_tune_features[i] & ix86_tune_mask);
+     }
+ 
+   if (dump)
+     {
+       fprintf (stderr, "List of x86 specific tuning parameter names:\n");
+       for (i = 0; i < X86_TUNE_LAST; i++)
+         fprintf (stderr, "%s : %s\n", ix86_tune_feature_names[i],
+                  ix86_tune_features[i] ? "on" : "off");
+     }
+ 
+   parse_mtune_ctrl_str (opts, dump);
+ }
+ 
+ 
+ /* Default align_* from the processor table.  */
+ 
+ static void
+ ix86_default_align (struct gcc_options *opts)
+ {
+   /* -falign-foo without argument: supply one.  */
+   if (opts->x_flag_align_loops && !opts->x_str_align_loops)
+     opts->x_str_align_loops = processor_cost_table[ix86_tune]->align_loop;
+   if (opts->x_flag_align_jumps && !opts->x_str_align_jumps)
+     opts->x_str_align_jumps = processor_cost_table[ix86_tune]->align_jump;
+   if (opts->x_flag_align_labels && !opts->x_str_align_labels)
+     opts->x_str_align_labels = processor_cost_table[ix86_tune]->align_label;
+   if (opts->x_flag_align_functions && !opts->x_str_align_functions)
+     opts->x_str_align_functions = processor_cost_table[ix86_tune]->align_func;
+ }
+ 
+ #ifndef USE_IX86_FRAME_POINTER
+ #define USE_IX86_FRAME_POINTER 0
+ #endif
+ 
+ /* (Re)compute option overrides affected by optimization levels in
+    target-specific ways.  */
+ 
+ static void
+ ix86_recompute_optlev_based_flags (struct gcc_options *opts,
+ 				   struct gcc_options *opts_set)
+ {
+   /* Set the default values for switches whose default depends on TARGET_64BIT
+      in case they weren't overwritten by command line options.  */
+   if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
+     {
+       if (opts->x_optimize >= 1)
+ 	SET_OPTION_IF_UNSET (opts, opts_set, flag_omit_frame_pointer,
+ 			     !USE_IX86_FRAME_POINTER);
+       if (opts->x_flag_asynchronous_unwind_tables
+ 	  && TARGET_64BIT_MS_ABI)
+ 	SET_OPTION_IF_UNSET (opts, opts_set, flag_unwind_tables, 1);
+       if (opts->x_flag_asynchronous_unwind_tables == 2)
+ 	opts->x_flag_unwind_tables
+ 	  = opts->x_flag_asynchronous_unwind_tables = 1;
+       if (opts->x_flag_pcc_struct_return == 2)
+ 	opts->x_flag_pcc_struct_return = 0;
+     }
+   else
+     {
+       if (opts->x_optimize >= 1)
+ 	  SET_OPTION_IF_UNSET (opts, opts_set, flag_omit_frame_pointer,
+ 			       !(USE_IX86_FRAME_POINTER || opts->x_optimize_size));
+       if (opts->x_flag_asynchronous_unwind_tables == 2)
+ 	opts->x_flag_asynchronous_unwind_tables = !USE_IX86_FRAME_POINTER;
+       if (opts->x_flag_pcc_struct_return == 2)
+ 	{
+ 	  /* Intel MCU psABI specifies that -freg-struct-return should
+ 	     be on.  Instead of setting DEFAULT_PCC_STRUCT_RETURN to 1,
+ 	     we check -miamcu so that -freg-struct-return is always
+ 	     turned on if -miamcu is used.  */
+ 	  if (TARGET_IAMCU_P (opts->x_target_flags))
+ 	    opts->x_flag_pcc_struct_return = 0;
+ 	  else
+ 	    opts->x_flag_pcc_struct_return = DEFAULT_PCC_STRUCT_RETURN;
+ 	}
+     }
+ }
+ 
+ /* Implement TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE hook.  */
+ 
+ void
+ ix86_override_options_after_change (void)
+ {
+   ix86_default_align (&global_options);
+   ix86_recompute_optlev_based_flags (&global_options, &global_options_set);
+ }
+ 
+ /* Clear stack slot assignments remembered from previous functions.
+    This is called from INIT_EXPANDERS once before RTL is emitted for each
+    function.  */
+ 
+ static struct machine_function *
+ ix86_init_machine_status (void)
+ {
+   struct machine_function *f;
+ 
+   f = ggc_cleared_alloc<machine_function> ();
+   f->call_abi = ix86_abi;
+   f->stack_frame_required = true;
+ 
+   return f;
+ }
+ 
+ /* Override various settings based on options.  If MAIN_ARGS_P, the
+    options are from the command line, otherwise they are from
+    attributes.  Return true if there's an error related to march
+    option.  */
+ 
+ static bool
+ ix86_option_override_internal (bool main_args_p,
+ 			       struct gcc_options *opts,
+ 			       struct gcc_options *opts_set)
+ {
+   int i;
+   unsigned HOST_WIDE_INT ix86_arch_mask;
+   const bool ix86_tune_specified = (opts->x_ix86_tune_string != NULL);
+ 
+   /* -mrecip options.  */
+   static struct
+     {
+       const char *string;           /* option name */
+       unsigned int mask;            /* mask bits to set */
+     }
+   const recip_options[] =
+     {
+       { "all",       RECIP_MASK_ALL },
+       { "none",      RECIP_MASK_NONE },
+       { "div",       RECIP_MASK_DIV },
+       { "sqrt",      RECIP_MASK_SQRT },
+       { "vec-div",   RECIP_MASK_VEC_DIV },
+       { "vec-sqrt",  RECIP_MASK_VEC_SQRT },
+     };
+ 
+ 
+   /* Turn off both OPTION_MASK_ABI_64 and OPTION_MASK_ABI_X32 if
+      TARGET_64BIT_DEFAULT is true and TARGET_64BIT is false.  */
+   if (TARGET_64BIT_DEFAULT && !TARGET_64BIT_P (opts->x_ix86_isa_flags))
+     opts->x_ix86_isa_flags &= ~(OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32);
+ #ifdef TARGET_BI_ARCH
+   else
+     {
+ #if TARGET_BI_ARCH == 1
+       /* When TARGET_BI_ARCH == 1, by default, OPTION_MASK_ABI_64
+ 	 is on and OPTION_MASK_ABI_X32 is off.  We turn off
+ 	 OPTION_MASK_ABI_64 if OPTION_MASK_ABI_X32 is turned on by
+ 	 -mx32.  */
+       if (TARGET_X32_P (opts->x_ix86_isa_flags))
+ 	opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_64;
+ #else
+       /* When TARGET_BI_ARCH == 2, by default, OPTION_MASK_ABI_X32 is
+ 	 on and OPTION_MASK_ABI_64 is off.  We turn off
+ 	 OPTION_MASK_ABI_X32 if OPTION_MASK_ABI_64 is turned on by
+ 	 -m64 or OPTION_MASK_CODE16 is turned on by -m16.  */
+       if (TARGET_LP64_P (opts->x_ix86_isa_flags)
+ 	  || TARGET_16BIT_P (opts->x_ix86_isa_flags))
+ 	opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
+ #endif
+       if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
+ 	  && TARGET_IAMCU_P (opts->x_target_flags))
+ 	sorry ("Intel MCU psABI isn%'t supported in %s mode",
+ 	       TARGET_X32_P (opts->x_ix86_isa_flags) ? "x32" : "64-bit");
+     }
+ #endif
+ 
+   if (TARGET_X32_P (opts->x_ix86_isa_flags))
+     {
+       /* Always turn on OPTION_MASK_ISA_64BIT and turn off
+ 	 OPTION_MASK_ABI_64 for TARGET_X32.  */
+       opts->x_ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
+       opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_64;
+     }
+   else if (TARGET_16BIT_P (opts->x_ix86_isa_flags))
+     opts->x_ix86_isa_flags &= ~(OPTION_MASK_ISA_64BIT
+ 				| OPTION_MASK_ABI_X32
+ 				| OPTION_MASK_ABI_64);
+   else if (TARGET_LP64_P (opts->x_ix86_isa_flags))
+     {
+       /* Always turn on OPTION_MASK_ISA_64BIT and turn off
+ 	 OPTION_MASK_ABI_X32 for TARGET_LP64.  */
+       opts->x_ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
+       opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
+     }
+ 
+ #ifdef SUBTARGET_OVERRIDE_OPTIONS
+   SUBTARGET_OVERRIDE_OPTIONS;
+ #endif
+ 
+ #ifdef SUBSUBTARGET_OVERRIDE_OPTIONS
+   SUBSUBTARGET_OVERRIDE_OPTIONS;
+ #endif
+ 
+   /* -fPIC is the default for x86_64.  */
+   if (TARGET_MACHO && TARGET_64BIT_P (opts->x_ix86_isa_flags))
+     opts->x_flag_pic = 2;
+ 
+   /* Need to check -mtune=generic first.  */
+   if (opts->x_ix86_tune_string)
+     {
+       /* As special support for cross compilers we read -mtune=native
+ 	     as -mtune=generic.  With native compilers we won't see the
+ 	     -mtune=native, as it was changed by the driver.  */
+       if (!strcmp (opts->x_ix86_tune_string, "native"))
+ 	{
+ 	  opts->x_ix86_tune_string = "generic";
+ 	}
+       else if (!strcmp (opts->x_ix86_tune_string, "x86-64"))
+         warning (OPT_Wdeprecated,
+ 		 main_args_p
+ 		 ? G_("%<-mtune=x86-64%> is deprecated; use %<-mtune=k8%> "
+ 		      "or %<-mtune=generic%> instead as appropriate")
+ 		 : G_("%<target(\"tune=x86-64\")%> is deprecated; use "
+ 		      "%<target(\"tune=k8\")%> or %<target(\"tune=generic\")%>"
+ 		      " instead as appropriate"));
+     }
+   else
+     {
+       if (opts->x_ix86_arch_string)
+ 	opts->x_ix86_tune_string = opts->x_ix86_arch_string;
+       if (!opts->x_ix86_tune_string)
+ 	{
+ 	  opts->x_ix86_tune_string = processor_names[TARGET_CPU_DEFAULT];
+ 	  ix86_tune_defaulted = 1;
+ 	}
+ 
+       /* opts->x_ix86_tune_string is set to opts->x_ix86_arch_string
+ 	 or defaulted.  We need to use a sensible tune option.  */
+       if (!strcmp (opts->x_ix86_tune_string, "x86-64"))
+ 	{
+ 	  opts->x_ix86_tune_string = "generic";
+ 	}
+     }
+ 
+   if (opts->x_ix86_stringop_alg == rep_prefix_8_byte
+       && !TARGET_64BIT_P (opts->x_ix86_isa_flags))
+     {
+       /* rep; movq isn't available in 32-bit code.  */
+       error ("%<-mstringop-strategy=rep_8byte%> not supported for 32-bit code");
+       opts->x_ix86_stringop_alg = no_stringop;
+     }
+ 
+   if (!opts->x_ix86_arch_string)
+     opts->x_ix86_arch_string
+       = TARGET_64BIT_P (opts->x_ix86_isa_flags)
+ 	? "x86-64" : SUBTARGET32_DEFAULT_CPU;
+   else
+     ix86_arch_specified = 1;
+ 
+   if (opts_set->x_ix86_pmode)
+     {
+       if ((TARGET_LP64_P (opts->x_ix86_isa_flags)
+ 	   && opts->x_ix86_pmode == PMODE_SI)
+ 	  || (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
+ 	       && opts->x_ix86_pmode == PMODE_DI))
+ 	error ("address mode %qs not supported in the %s bit mode",
+ 	       TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "short" : "long",
+ 	       TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "64" : "32");
+     }
+   else
+     opts->x_ix86_pmode = TARGET_LP64_P (opts->x_ix86_isa_flags)
+ 			 ? PMODE_DI : PMODE_SI;
+ 
+   SET_OPTION_IF_UNSET (opts, opts_set, ix86_abi, DEFAULT_ABI);
+ 
+   if (opts->x_ix86_abi == MS_ABI && TARGET_X32_P (opts->x_ix86_isa_flags))
+     error ("%<-mabi=ms%> not supported with X32 ABI");
+   gcc_assert (opts->x_ix86_abi == SYSV_ABI || opts->x_ix86_abi == MS_ABI);
+ 
+   const char *abi_name = opts->x_ix86_abi == MS_ABI ? "ms" : "sysv";
+   if ((opts->x_flag_sanitize & SANITIZE_USER_ADDRESS)
+       && opts->x_ix86_abi != DEFAULT_ABI)
+     error ("%<-mabi=%s%> not supported with %<-fsanitize=address%>", abi_name);
+   if ((opts->x_flag_sanitize & SANITIZE_KERNEL_ADDRESS)
+       && opts->x_ix86_abi != DEFAULT_ABI)
+     error ("%<-mabi=%s%> not supported with %<-fsanitize=kernel-address%>",
+ 	   abi_name);
+   if ((opts->x_flag_sanitize & SANITIZE_THREAD)
+       && opts->x_ix86_abi != DEFAULT_ABI)
+     error ("%<-mabi=%s%> not supported with %<-fsanitize=thread%>", abi_name);
+ 
+   /* For targets using ms ABI enable ms-extensions, if not
+      explicit turned off.  For non-ms ABI we turn off this
+      option.  */
+   SET_OPTION_IF_UNSET (opts, opts_set, flag_ms_extensions,
+ 		       (MS_ABI == DEFAULT_ABI));
+ 
+   if (opts_set->x_ix86_cmodel)
+     {
+       switch (opts->x_ix86_cmodel)
+ 	{
+ 	case CM_SMALL:
+ 	case CM_SMALL_PIC:
+ 	  if (opts->x_flag_pic)
+ 	    opts->x_ix86_cmodel = CM_SMALL_PIC;
+ 	  if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
+ 	    error ("code model %qs not supported in the %s bit mode",
+ 		   "small", "32");
+ 	  break;
+ 
+ 	case CM_MEDIUM:
+ 	case CM_MEDIUM_PIC:
+ 	  if (opts->x_flag_pic)
+ 	    opts->x_ix86_cmodel = CM_MEDIUM_PIC;
+ 	  if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
+ 	    error ("code model %qs not supported in the %s bit mode",
+ 		   "medium", "32");
+ 	  else if (TARGET_X32_P (opts->x_ix86_isa_flags))
+ 	    error ("code model %qs not supported in x32 mode",
+ 		   "medium");
+ 	  break;
+ 
+ 	case CM_LARGE:
+ 	case CM_LARGE_PIC:
+ 	  if (opts->x_flag_pic)
+ 	    opts->x_ix86_cmodel = CM_LARGE_PIC;
+ 	  if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
+ 	    error ("code model %qs not supported in the %s bit mode",
+ 		   "large", "32");
+ 	  else if (TARGET_X32_P (opts->x_ix86_isa_flags))
+ 	    error ("code model %qs not supported in x32 mode",
+ 		   "large");
+ 	  break;
+ 
+ 	case CM_32:
+ 	  if (opts->x_flag_pic)
+ 	    error ("code model %s does not support PIC mode", "32");
+ 	  if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
+ 	    error ("code model %qs not supported in the %s bit mode",
+ 		   "32", "64");
+ 	  break;
+ 
+ 	case CM_KERNEL:
+ 	  if (opts->x_flag_pic)
+ 	    {
+ 	      error ("code model %s does not support PIC mode", "kernel");
+ 	      opts->x_ix86_cmodel = CM_32;
+ 	    }
+ 	  if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
+ 	    error ("code model %qs not supported in the %s bit mode",
+ 		   "kernel", "32");
+ 	  break;
+ 
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+     }
+   else
+     {
+       /* For TARGET_64BIT and MS_ABI, force pic on, in order to enable the
+ 	 use of rip-relative addressing.  This eliminates fixups that
+ 	 would otherwise be needed if this object is to be placed in a
+ 	 DLL, and is essentially just as efficient as direct addressing.  */
+       if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
+ 	  && (TARGET_RDOS || TARGET_PECOFF))
+ 	opts->x_ix86_cmodel = CM_MEDIUM_PIC, opts->x_flag_pic = 1;
+       else if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
+ 	opts->x_ix86_cmodel = opts->x_flag_pic ? CM_SMALL_PIC : CM_SMALL;
+       else
+ 	opts->x_ix86_cmodel = CM_32;
+     }
+   if (TARGET_MACHO && opts->x_ix86_asm_dialect == ASM_INTEL)
+     {
+       error ("%<-masm=intel%> not supported in this configuration");
+       opts->x_ix86_asm_dialect = ASM_ATT;
+     }
+   if ((TARGET_64BIT_P (opts->x_ix86_isa_flags) != 0)
+       != ((opts->x_ix86_isa_flags & OPTION_MASK_ISA_64BIT) != 0))
+     sorry ("%i-bit mode not compiled in",
+ 	   (opts->x_ix86_isa_flags & OPTION_MASK_ISA_64BIT) ? 64 : 32);
+ 
+   for (i = 0; i < pta_size; i++)
+     if (! strcmp (opts->x_ix86_arch_string, processor_alias_table[i].name))
+       {
+ 	if (!strcmp (opts->x_ix86_arch_string, "generic"))
+ 	  {
+ 	    error (main_args_p
+ 		   ? G_("%<generic%> CPU can be used only for %<-mtune=%> "
+ 			"switch")
+ 		   : G_("%<generic%> CPU can be used only for "
+ 			"%<target(\"tune=\")%> attribute"));
+ 	    return false;
+ 	  }
+ 	else if (!strcmp (opts->x_ix86_arch_string, "intel"))
+ 	  {
+ 	    error (main_args_p
+ 		   ? G_("%<intel%> CPU can be used only for %<-mtune=%> "
+ 			"switch")
+ 		   : G_("%<intel%> CPU can be used only for "
+ 			"%<target(\"tune=\")%> attribute"));
+ 	    return false;
+ 	  }
+ 
+ 	if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
+ 	    && !((processor_alias_table[i].flags & PTA_64BIT) != 0))
+ 	  {
+ 	    error ("CPU you selected does not support x86-64 "
+ 		   "instruction set");
+ 	    return false;
+ 	  }
+ 
+ 	ix86_schedule = processor_alias_table[i].schedule;
+ 	ix86_arch = processor_alias_table[i].processor;
+ 	/* Default cpu tuning to the architecture.  */
+ 	ix86_tune = ix86_arch;
+ 
+ 	if (((processor_alias_table[i].flags & PTA_MMX) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_MMX))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MMX;
+ 	if (((processor_alias_table[i].flags & PTA_3DNOW) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_3DNOW))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW;
+ 	if (((processor_alias_table[i].flags & PTA_3DNOW_A) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_3DNOW_A))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW_A;
+ 	if (((processor_alias_table[i].flags & PTA_SSE) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE;
+ 	if (((processor_alias_table[i].flags & PTA_SSE2) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE2))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE2;
+ 	if (((processor_alias_table[i].flags & PTA_SSE3) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE3))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE3;
+ 	if (((processor_alias_table[i].flags & PTA_SSSE3) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSSE3))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSSE3;
+ 	if (((processor_alias_table[i].flags & PTA_SSE4_1) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4_1))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_1;
+ 	if (((processor_alias_table[i].flags & PTA_SSE4_2) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4_2))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_2;
+ 	if (((processor_alias_table[i].flags & PTA_AVX) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX;
+ 	if (((processor_alias_table[i].flags & PTA_AVX2) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX2))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2;
+ 	if (((processor_alias_table[i].flags & PTA_FMA) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FMA))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA;
+ 	if (((processor_alias_table[i].flags & PTA_SSE4A) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4A))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4A;
+ 	if (((processor_alias_table[i].flags & PTA_FMA4) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FMA4))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA4;
+ 	if (((processor_alias_table[i].flags & PTA_XOP) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XOP))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XOP;
+ 	if (((processor_alias_table[i].flags & PTA_LWP) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_LWP))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LWP;
+ 	if (((processor_alias_table[i].flags & PTA_ABM) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_ABM))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ABM;
+ 	if (((processor_alias_table[i].flags & PTA_BMI) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_BMI))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI;
+ 	if (((processor_alias_table[i].flags & (PTA_LZCNT | PTA_ABM)) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_LZCNT))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LZCNT;
+ 	if (((processor_alias_table[i].flags & PTA_TBM) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_TBM))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_TBM;
+ 	if (((processor_alias_table[i].flags & PTA_BMI2) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_BMI2))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI2;
+ 	if (((processor_alias_table[i].flags & PTA_CX16) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_CX16))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_CX16;
+ 	if (((processor_alias_table[i].flags & (PTA_POPCNT | PTA_ABM)) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_POPCNT))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_POPCNT;
+ 	if (!(TARGET_64BIT_P (opts->x_ix86_isa_flags)
+ 	    && ((processor_alias_table[i].flags & PTA_NO_SAHF) != 0))
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SAHF))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SAHF;
+ 	if (((processor_alias_table[i].flags & PTA_MOVBE) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_MOVBE))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_MOVBE;
+ 	if (((processor_alias_table[i].flags & PTA_AES) != 0)
+ 	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_AES))
+ 	  ix86_isa_flags |= OPTION_MASK_ISA_AES;
+ 	if (((processor_alias_table[i].flags & PTA_SHA) != 0)
+ 	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_SHA))
+ 	  ix86_isa_flags |= OPTION_MASK_ISA_SHA;
+ 	if (((processor_alias_table[i].flags & PTA_PCLMUL) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PCLMUL))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PCLMUL;
+ 	if (((processor_alias_table[i].flags & PTA_FSGSBASE) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FSGSBASE))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FSGSBASE;
+ 	if (((processor_alias_table[i].flags & PTA_RDRND) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_RDRND))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDRND;
+ 	if (((processor_alias_table[i].flags & PTA_F16C) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_F16C))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_F16C;
+ 	if (((processor_alias_table[i].flags & PTA_RTM) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_RTM))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RTM;
+ 	if (((processor_alias_table[i].flags & PTA_HLE) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_HLE))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_HLE;
+ 	if (((processor_alias_table[i].flags & PTA_PRFCHW) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PRFCHW))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PRFCHW;
+ 	if (((processor_alias_table[i].flags & PTA_RDSEED) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_RDSEED))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDSEED;
+ 	if (((processor_alias_table[i].flags & PTA_ADX) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_ADX))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ADX;
+ 	if (((processor_alias_table[i].flags & PTA_FXSR) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FXSR))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FXSR;
+ 	if (((processor_alias_table[i].flags & PTA_XSAVE) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVE))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVE;
+ 	if (((processor_alias_table[i].flags & PTA_XSAVEOPT) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVEOPT))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEOPT;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512F) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512F))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512ER) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512ER))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512ER;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512PF) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512PF))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512PF;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512CD) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512CD))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512CD;
+ 	if (((processor_alias_table[i].flags & PTA_PREFETCHWT1) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PREFETCHWT1))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PREFETCHWT1;
+ 	if (((processor_alias_table[i].flags & PTA_CLWB) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_CLWB))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLWB;
+ 	if (((processor_alias_table[i].flags & PTA_CLFLUSHOPT) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_CLFLUSHOPT))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLFLUSHOPT;
+ 	if (((processor_alias_table[i].flags & PTA_CLZERO) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_CLZERO))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_CLZERO;
+ 	if (((processor_alias_table[i].flags & PTA_XSAVEC) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVEC))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEC;
+ 	if (((processor_alias_table[i].flags & PTA_XSAVES) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVES))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVES;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512DQ) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512DQ))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512DQ;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512BW) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512BW))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BW;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512VL) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512VL))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VL;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512VBMI) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512VBMI))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512IFMA) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512IFMA))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512IFMA;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512VNNI) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512VNNI))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VNNI;
+ 	if (((processor_alias_table[i].flags & PTA_GFNI) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_GFNI))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_GFNI;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512VBMI2) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit
+ 	    & OPTION_MASK_ISA_AVX512VBMI2))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI2;
+ 	if (((processor_alias_table[i].flags & PTA_VPCLMULQDQ) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_VPCLMULQDQ))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_VPCLMULQDQ;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512BITALG) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit
+ 	    & OPTION_MASK_ISA_AVX512BITALG))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BITALG;
+ 
+ 	if (((processor_alias_table[i].flags & PTA_AVX512VP2INTERSECT) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit
+ 		 & OPTION_MASK_ISA2_AVX512VP2INTERSECT))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX512VP2INTERSECT;
+ 	if (((processor_alias_table[i].flags & PTA_AVX5124VNNIW) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit
+ 		 & OPTION_MASK_ISA2_AVX5124VNNIW))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX5124VNNIW;
+ 	if (((processor_alias_table[i].flags & PTA_AVX5124FMAPS) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit
+ 		 & OPTION_MASK_ISA2_AVX5124FMAPS))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX5124FMAPS;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512VPOPCNTDQ) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit
+ 		 & OPTION_MASK_ISA_AVX512VPOPCNTDQ))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VPOPCNTDQ;
+ 	if (((processor_alias_table[i].flags & PTA_AVX512BF16) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit
+ 		 & OPTION_MASK_ISA2_AVX512BF16))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX512BF16;
+         if (((processor_alias_table[i].flags & PTA_MOVDIRI) != 0)
+             && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_MOVDIRI))
+           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MOVDIRI;
+         if (((processor_alias_table[i].flags & PTA_MOVDIR64B) != 0)
+             && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_MOVDIR64B))
+           opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_MOVDIR64B;
+ 	if (((processor_alias_table[i].flags & PTA_SGX) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_SGX))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_SGX;
+ 	if (((processor_alias_table[i].flags & PTA_VAES) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_VAES))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_VAES;
+ 	if (((processor_alias_table[i].flags & PTA_RDPID) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_RDPID))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_RDPID;
+ 	if (((processor_alias_table[i].flags & PTA_PCONFIG) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_PCONFIG))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_PCONFIG;
+ 	if (((processor_alias_table[i].flags & PTA_WBNOINVD) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_WBNOINVD))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_WBNOINVD;
+ 	if (((processor_alias_table[i].flags & PTA_PTWRITE) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_PTWRITE))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_PTWRITE;
+ 
+ 	if ((processor_alias_table[i].flags
+ 	   & (PTA_PREFETCH_SSE | PTA_SSE)) != 0)
+ 	  x86_prefetch_sse = true;
+ 	if (((processor_alias_table[i].flags & PTA_MWAITX) != 0)
+ 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_MWAITX))
+ 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_MWAITX;
+ 	if (((processor_alias_table[i].flags & PTA_PKU) != 0)
+ 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PKU))
+ 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PKU;
+ 
+ 	/* Don't enable x87 instructions if only
+ 	   general registers are allowed.  */
+ 	if (!(opts_set->x_ix86_target_flags & OPTION_MASK_GENERAL_REGS_ONLY)
+ 	    && !(opts_set->x_target_flags & MASK_80387))
+ 	  {
+ 	    if (((processor_alias_table[i].flags & PTA_NO_80387) != 0))
+ 	      opts->x_target_flags &= ~MASK_80387;
+ 	    else
+ 	      opts->x_target_flags |= MASK_80387;
+ 	  }
+ 	break;
+       }
+ 
+   if (i == pta_size)
+     {
+       error (main_args_p
+ 	     ? G_("bad value (%qs) for %<-march=%> switch")
+ 	     : G_("bad value (%qs) for %<target(\"arch=\")%> attribute"),
+ 	     opts->x_ix86_arch_string);
+ 
+       auto_vec <const char *> candidates;
+       for (i = 0; i < pta_size; i++)
+ 	if (strcmp (processor_alias_table[i].name, "generic")
+ 	    && strcmp (processor_alias_table[i].name, "intel")
+ 	    && (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
+ 		|| ((processor_alias_table[i].flags & PTA_64BIT) != 0)))
+ 	  candidates.safe_push (processor_alias_table[i].name);
+ 
+ #ifdef HAVE_LOCAL_CPU_DETECT
+       /* Add also "native" as possible value.  */
+       candidates.safe_push ("native");
+ #endif
+ 
+       char *s;
+       const char *hint
+ 	= candidates_list_and_hint (opts->x_ix86_arch_string, s, candidates);
+       if (hint)
+ 	inform (input_location,
+ 		main_args_p
+ 		? G_("valid arguments to %<-march=%> switch are: "
+ 		     "%s; did you mean %qs?")
+ 		: G_("valid arguments to %<target(\"arch=\")%> attribute are: "
+ 		     "%s; did you mean %qs?"), s, hint);
+       else
+ 	inform (input_location,
+ 		main_args_p
+ 		? G_("valid arguments to %<-march=%> switch are: %s")
+ 		: G_("valid arguments to %<target(\"arch=\")%> attribute "
+ 		     "are: %s"), s);
+       XDELETEVEC (s);
+     }
+ 
+   ix86_arch_mask = HOST_WIDE_INT_1U << ix86_arch;
+   for (i = 0; i < X86_ARCH_LAST; ++i)
+     ix86_arch_features[i] = !!(initial_ix86_arch_features[i] & ix86_arch_mask);
+ 
+   for (i = 0; i < pta_size; i++)
+     if (! strcmp (opts->x_ix86_tune_string, processor_alias_table[i].name))
+       {
+ 	ix86_schedule = processor_alias_table[i].schedule;
+ 	ix86_tune = processor_alias_table[i].processor;
+ 	if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
+ 	  {
+ 	    if (!((processor_alias_table[i].flags & PTA_64BIT) != 0))
+ 	      {
+ 		if (ix86_tune_defaulted)
+ 		  {
+ 		    opts->x_ix86_tune_string = "x86-64";
+ 		    for (i = 0; i < pta_size; i++)
+ 		      if (! strcmp (opts->x_ix86_tune_string,
+ 				    processor_alias_table[i].name))
+ 			break;
+ 		    ix86_schedule = processor_alias_table[i].schedule;
+ 		    ix86_tune = processor_alias_table[i].processor;
+ 		  }
+ 		else
+ 		  error ("CPU you selected does not support x86-64 "
+ 			 "instruction set");
+ 	      }
+ 	  }
+ 	/* Intel CPUs have always interpreted SSE prefetch instructions as
+ 	   NOPs; so, we can enable SSE prefetch instructions even when
+ 	   -mtune (rather than -march) points us to a processor that has them.
+ 	   However, the VIA C3 gives a SIGILL, so we only do that for i686 and
+ 	   higher processors.  */
+ 	if (TARGET_CMOV
+ 	    && ((processor_alias_table[i].flags
+ 	      & (PTA_PREFETCH_SSE | PTA_SSE)) != 0))
+ 	  x86_prefetch_sse = true;
+ 	break;
+       }
+ 
+   if (ix86_tune_specified && i == pta_size)
+     {
+       error (main_args_p
+ 	     ? G_("bad value (%qs) for %<-mtune=%> switch")
+ 	     : G_("bad value (%qs) for %<target(\"tune=\")%> attribute"),
+ 	     opts->x_ix86_tune_string);
+ 
+       auto_vec <const char *> candidates;
+       for (i = 0; i < pta_size; i++)
+ 	if (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
+ 	    || ((processor_alias_table[i].flags & PTA_64BIT) != 0))
+ 	  candidates.safe_push (processor_alias_table[i].name);
+ 
+ #ifdef HAVE_LOCAL_CPU_DETECT
+       /* Add also "native" as possible value.  */
+       candidates.safe_push ("native");
+ #endif
+ 
+       char *s;
+       const char *hint
+ 	= candidates_list_and_hint (opts->x_ix86_tune_string, s, candidates);
+       if (hint)
+ 	inform (input_location,
+ 		main_args_p
+ 		? G_("valid arguments to %<-mtune=%> switch are: "
+ 		     "%s; did you mean %qs?")
+ 		: G_("valid arguments to %<target(\"tune=\")%> attribute are: "
+ 		     "%s; did you mean %qs?"), s, hint);
+       else
+ 	inform (input_location,
+ 		main_args_p
+ 		? G_("valid arguments to %<-mtune=%> switch are: %s")
+ 		: G_("valid arguments to %<target(\"tune=\")%> attribute "
+ 		     "are: %s"), s);
+       XDELETEVEC (s);
+     }
+ 
+   set_ix86_tune_features (opts, ix86_tune, opts->x_ix86_dump_tunes);
+ 
+   ix86_recompute_optlev_based_flags (opts, opts_set);
+ 
+   ix86_tune_cost = processor_cost_table[ix86_tune];
+   /* TODO: ix86_cost should be chosen at instruction or function granuality
+      so for cold code we use size_cost even in !optimize_size compilation.  */
+   if (opts->x_optimize_size)
+     ix86_cost = &ix86_size_cost;
+   else
+     ix86_cost = ix86_tune_cost;
+ 
+   /* Arrange to set up i386_stack_locals for all functions.  */
+   init_machine_status = ix86_init_machine_status;
+ 
+   /* Validate -mregparm= value.  */
+   if (opts_set->x_ix86_regparm)
+     {
+       if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
+ 	warning (0, "%<-mregparm%> is ignored in 64-bit mode");
+       else if (TARGET_IAMCU_P (opts->x_target_flags))
+ 	warning (0, "%<-mregparm%> is ignored for Intel MCU psABI");
+       if (opts->x_ix86_regparm > REGPARM_MAX)
+ 	{
+ 	  error ("%<-mregparm=%d%> is not between 0 and %d",
+ 		 opts->x_ix86_regparm, REGPARM_MAX);
+ 	  opts->x_ix86_regparm = 0;
+ 	}
+     }
+   if (TARGET_IAMCU_P (opts->x_target_flags)
+       || TARGET_64BIT_P (opts->x_ix86_isa_flags))
+     opts->x_ix86_regparm = REGPARM_MAX;
+ 
+   /* Default align_* from the processor table.  */
+   ix86_default_align (opts);
+ 
+   /* Provide default for -mbranch-cost= value.  */
+   SET_OPTION_IF_UNSET (opts, opts_set, ix86_branch_cost,
+ 		       ix86_tune_cost->branch_cost);
+ 
+   if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
+     {
+       opts->x_target_flags
+ 	|= TARGET_SUBTARGET64_DEFAULT & ~opts_set->x_target_flags;
+ 
+       if (!ix86_arch_specified)
+ 	opts->x_ix86_isa_flags
+ 	  |= TARGET_SUBTARGET64_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit;
+ 
+       if (TARGET_RTD_P (opts->x_target_flags))
+ 	warning (0,
+ 		 main_args_p
+ 		 ? G_("%<-mrtd%> is ignored in 64bit mode")
+ 		 : G_("%<target(\"rtd\")%> is ignored in 64bit mode"));
+     }
+   else
+     {
+       opts->x_target_flags
+ 	|= TARGET_SUBTARGET32_DEFAULT & ~opts_set->x_target_flags;
+ 
+       if (!ix86_arch_specified)
+         opts->x_ix86_isa_flags
+ 	  |= TARGET_SUBTARGET32_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit;
+ 
+       /* i386 ABI does not specify red zone.  It still makes sense to use it
+          when programmer takes care to stack from being destroyed.  */
+       if (!(opts_set->x_target_flags & MASK_NO_RED_ZONE))
+         opts->x_target_flags |= MASK_NO_RED_ZONE;
+     }
+ 
+   /* Keep nonleaf frame pointers.  */
+   if (opts->x_flag_omit_frame_pointer)
+     opts->x_target_flags &= ~MASK_OMIT_LEAF_FRAME_POINTER;
+   else if (TARGET_OMIT_LEAF_FRAME_POINTER_P (opts->x_target_flags))
+     opts->x_flag_omit_frame_pointer = 1;
+ 
+   /* If we're doing fast math, we don't care about comparison order
+      wrt NaNs.  This lets us use a shorter comparison sequence.  */
+   if (opts->x_flag_finite_math_only)
+     opts->x_target_flags &= ~MASK_IEEE_FP;
+ 
+   /* If the architecture always has an FPU, turn off NO_FANCY_MATH_387,
+      since the insns won't need emulation.  */
+   if (ix86_tune_features [X86_TUNE_ALWAYS_FANCY_MATH_387])
+     opts->x_target_flags &= ~MASK_NO_FANCY_MATH_387;
+ 
+   /* Likewise, if the target doesn't have a 387, or we've specified
+      software floating point, don't use 387 inline intrinsics.  */
+   if (!TARGET_80387_P (opts->x_target_flags))
+     opts->x_target_flags |= MASK_NO_FANCY_MATH_387;
+ 
+   /* Turn on MMX builtins for -msse.  */
+   if (TARGET_SSE_P (opts->x_ix86_isa_flags))
+     opts->x_ix86_isa_flags
+       |= OPTION_MASK_ISA_MMX & ~opts->x_ix86_isa_flags_explicit;
+ 
+   /* Enable SSE prefetch.  */
+   if (TARGET_SSE_P (opts->x_ix86_isa_flags)
+       || (TARGET_PRFCHW_P (opts->x_ix86_isa_flags)
+ 	  && !TARGET_3DNOW_P (opts->x_ix86_isa_flags))
+       || TARGET_PREFETCHWT1_P (opts->x_ix86_isa_flags))
+     x86_prefetch_sse = true;
+ 
+   /* Enable popcnt instruction for -msse4.2 or -mabm.  */
+   if (TARGET_SSE4_2_P (opts->x_ix86_isa_flags)
+       || TARGET_ABM_P (opts->x_ix86_isa_flags))
+     opts->x_ix86_isa_flags
+       |= OPTION_MASK_ISA_POPCNT & ~opts->x_ix86_isa_flags_explicit;
+ 
+   /* Enable lzcnt instruction for -mabm.  */
+   if (TARGET_ABM_P(opts->x_ix86_isa_flags))
+     opts->x_ix86_isa_flags
+       |= OPTION_MASK_ISA_LZCNT & ~opts->x_ix86_isa_flags_explicit;
+ 
+   /* Disable BMI, BMI2 and TBM instructions for -m16.  */
+   if (TARGET_16BIT_P(opts->x_ix86_isa_flags))
+     opts->x_ix86_isa_flags
+       &= ~((OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_TBM)
+ 	   & ~opts->x_ix86_isa_flags_explicit);
+ 
+   /* Validate -mpreferred-stack-boundary= value or default it to
+      PREFERRED_STACK_BOUNDARY_DEFAULT.  */
+   ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT;
+   if (opts_set->x_ix86_preferred_stack_boundary_arg)
+     {
+       int min = TARGET_64BIT_P (opts->x_ix86_isa_flags)? 3 : 2;
+       int max = TARGET_SEH ? 4 : 12;
+ 
+       if (opts->x_ix86_preferred_stack_boundary_arg < min
+ 	  || opts->x_ix86_preferred_stack_boundary_arg > max)
+ 	{
+ 	  if (min == max)
+ 	    error ("%<-mpreferred-stack-boundary%> is not supported "
+ 		   "for this target");
+ 	  else
+ 	    error ("%<-mpreferred-stack-boundary=%d%> is not between %d and %d",
+ 		   opts->x_ix86_preferred_stack_boundary_arg, min, max);
+ 	}
+       else
+ 	ix86_preferred_stack_boundary
+ 	  = (1 << opts->x_ix86_preferred_stack_boundary_arg) * BITS_PER_UNIT;
+     }
+ 
+   /* Set the default value for -mstackrealign.  */
+   SET_OPTION_IF_UNSET (opts, opts_set, ix86_force_align_arg_pointer,
+ 		       STACK_REALIGN_DEFAULT);
+ 
+   ix86_default_incoming_stack_boundary = PREFERRED_STACK_BOUNDARY;
+ 
+   /* Validate -mincoming-stack-boundary= value or default it to
+      MIN_STACK_BOUNDARY/PREFERRED_STACK_BOUNDARY.  */
+   ix86_incoming_stack_boundary = ix86_default_incoming_stack_boundary;
+   if (opts_set->x_ix86_incoming_stack_boundary_arg)
+     {
+       int min = TARGET_64BIT_P (opts->x_ix86_isa_flags) ? 3 : 2;
+ 
+       if (opts->x_ix86_incoming_stack_boundary_arg < min
+ 	  || opts->x_ix86_incoming_stack_boundary_arg > 12)
+ 	error ("%<-mincoming-stack-boundary=%d%> is not between %d and 12",
+ 	       opts->x_ix86_incoming_stack_boundary_arg, min);
+       else
+ 	{
+ 	  ix86_user_incoming_stack_boundary
+ 	    = (1 << opts->x_ix86_incoming_stack_boundary_arg) * BITS_PER_UNIT;
+ 	  ix86_incoming_stack_boundary
+ 	    = ix86_user_incoming_stack_boundary;
+ 	}
+     }
+ 
+ #ifndef NO_PROFILE_COUNTERS
+   if (flag_nop_mcount)
+     error ("%<-mnop-mcount%> is not compatible with this target");
+ #endif
+   if (flag_nop_mcount && flag_pic)
+     error ("%<-mnop-mcount%> is not implemented for %<-fPIC%>");
+ 
+   /* Accept -msseregparm only if at least SSE support is enabled.  */
+   if (TARGET_SSEREGPARM_P (opts->x_target_flags)
+       && ! TARGET_SSE_P (opts->x_ix86_isa_flags))
+     error (main_args_p
+ 	   ? G_("%<-msseregparm%> used without SSE enabled")
+ 	   : G_("%<target(\"sseregparm\")%> used without SSE enabled"));
+ 
+   if (opts_set->x_ix86_fpmath)
+     {
+       if (opts->x_ix86_fpmath & FPMATH_SSE)
+ 	{
+ 	  if (!TARGET_SSE_P (opts->x_ix86_isa_flags))
+ 	    {
+ 	      if (TARGET_80387_P (opts->x_target_flags))
+ 		{
+ 		  warning (0, "SSE instruction set disabled, using 387 arithmetics");
+ 		  opts->x_ix86_fpmath = FPMATH_387;
+ 		}
+ 	    }
+ 	  else if ((opts->x_ix86_fpmath & FPMATH_387)
+ 		   && !TARGET_80387_P (opts->x_target_flags))
+ 	    {
+ 	      warning (0, "387 instruction set disabled, using SSE arithmetics");
+ 	      opts->x_ix86_fpmath = FPMATH_SSE;
+ 	    }
+ 	}
+     }
+   /* For all chips supporting SSE2, -mfpmath=sse performs better than
+      fpmath=387.  The second is however default at many targets since the
+      extra 80bit precision of temporaries is considered to be part of ABI.
+      Overwrite the default at least for -ffast-math. 
+      TODO: -mfpmath=both seems to produce same performing code with bit
+      smaller binaries.  It is however not clear if register allocation is
+      ready for this setting.
+      Also -mfpmath=387 is overall a lot more compact (bout 4-5%) than SSE
+      codegen.  We may switch to 387 with -ffast-math for size optimized
+      functions. */
+   else if (fast_math_flags_set_p (&global_options)
+ 	   && TARGET_SSE2_P (opts->x_ix86_isa_flags))
+     opts->x_ix86_fpmath = FPMATH_SSE;
+   else
+     opts->x_ix86_fpmath = TARGET_FPMATH_DEFAULT_P (opts->x_ix86_isa_flags);
+ 
+   /* Use external vectorized library in vectorizing intrinsics.  */
+   if (opts_set->x_ix86_veclibabi_type)
+     switch (opts->x_ix86_veclibabi_type)
+       {
+       case ix86_veclibabi_type_svml:
+ 	ix86_veclib_handler = &ix86_veclibabi_svml;
+ 	break;
+ 
+       case ix86_veclibabi_type_acml:
+ 	ix86_veclib_handler = &ix86_veclibabi_acml;
+ 	break;
+ 
+       default:
+ 	gcc_unreachable ();
+       }
+ 
+   if (ix86_tune_features [X86_TUNE_ACCUMULATE_OUTGOING_ARGS]
+       && !(opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
+     opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
+ 
+   /* If stack probes are required, the space used for large function
+      arguments on the stack must also be probed, so enable
+      -maccumulate-outgoing-args so this happens in the prologue.  */
+   if (TARGET_STACK_PROBE_P (opts->x_target_flags)
+       && !(opts->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
+     {
+       if (opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
+ 	warning (0,
+ 		 main_args_p
+ 		 ? G_("stack probing requires %<-maccumulate-outgoing-args%> "
+ 		      "for correctness")
+ 		 : G_("stack probing requires "
+ 		      "%<target(\"accumulate-outgoing-args\")%> for "
+ 		      "correctness"));
+       opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
+     }
+ 
+   /* Stack realignment without -maccumulate-outgoing-args requires %ebp,
+      so enable -maccumulate-outgoing-args when %ebp is fixed.  */
+   if (fixed_regs[BP_REG]
+       && !(opts->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
+     {
+       if (opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
+ 	warning (0,
+ 		 main_args_p
+ 		 ? G_("fixed ebp register requires "
+ 		      "%<-maccumulate-outgoing-args%>")
+ 		 : G_("fixed ebp register requires "
+ 		      "%<target(\"accumulate-outgoing-args\")%>"));
+       opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
+     }
+ 
+   /* Figure out what ASM_GENERATE_INTERNAL_LABEL builds as a prefix.  */
+   {
+     char *p;
+     ASM_GENERATE_INTERNAL_LABEL (internal_label_prefix, "LX", 0);
+     p = strchr (internal_label_prefix, 'X');
+     internal_label_prefix_len = p - internal_label_prefix;
+     *p = '\0';
+   }
+ 
+   /* When scheduling description is not available, disable scheduler pass
+      so it won't slow down the compilation and make x87 code slower.  */
+   if (!TARGET_SCHEDULE)
+     opts->x_flag_schedule_insns_after_reload = opts->x_flag_schedule_insns = 0;
+ 
+   SET_OPTION_IF_UNSET (opts, opts_set, param_simultaneous_prefetches,
+ 		       ix86_tune_cost->simultaneous_prefetches);
+   SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_line_size,
+ 		       ix86_tune_cost->prefetch_block);
+   SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_size,
+ 		       ix86_tune_cost->l1_cache_size);
+   SET_OPTION_IF_UNSET (opts, opts_set, param_l2_cache_size,
+ 		       ix86_tune_cost->l2_cache_size);
+ 
+   /* Enable sw prefetching at -O3 for CPUS that prefetching is helpful.  */
+   if (opts->x_flag_prefetch_loop_arrays < 0
+       && HAVE_prefetch
+       && (opts->x_optimize >= 3 || opts->x_flag_profile_use)
+       && !opts->x_optimize_size
+       && TARGET_SOFTWARE_PREFETCHING_BENEFICIAL)
+     opts->x_flag_prefetch_loop_arrays = 1;
+ 
+   /* If using typedef char *va_list, signal that __builtin_va_start (&ap, 0)
+      can be opts->x_optimized to ap = __builtin_next_arg (0).  */
+   if (!TARGET_64BIT_P (opts->x_ix86_isa_flags) && !opts->x_flag_split_stack)
+     targetm.expand_builtin_va_start = NULL;
+ 
+ #ifdef USE_IX86_CLD
+   /* Use -mcld by default for 32-bit code if configured with --enable-cld.  */
+   if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
+     opts->x_target_flags |= MASK_CLD & ~opts_set->x_target_flags;
+ #endif
+ 
+   /* Set the default value for -mfentry.  */
+   if (!opts_set->x_flag_fentry)
+     opts->x_flag_fentry = TARGET_SEH;
+   else
+     {
+       if (!TARGET_64BIT_P (opts->x_ix86_isa_flags) && opts->x_flag_pic
+ 	  && opts->x_flag_fentry)
+ 	sorry ("%<-mfentry%> isn%'t supported for 32-bit in combination "
+ 	       "with %<-fpic%>");
+       else if (TARGET_SEH && !opts->x_flag_fentry)
+ 	sorry ("%<-mno-fentry%> isn%'t compatible with SEH");
+     }
+ 
+   if (TARGET_SEH && TARGET_CALL_MS2SYSV_XLOGUES)
+     sorry ("%<-mcall-ms2sysv-xlogues%> isn%'t currently supported with SEH");
+ 
+   if (!(opts_set->x_target_flags & MASK_VZEROUPPER)
+       && TARGET_EMIT_VZEROUPPER)
+     opts->x_target_flags |= MASK_VZEROUPPER;
+   if (!(opts_set->x_target_flags & MASK_STV))
+     opts->x_target_flags |= MASK_STV;
+   /* Disable STV if -mpreferred-stack-boundary={2,3} or
+      -mincoming-stack-boundary={2,3} or -mstackrealign - the needed
+      stack realignment will be extra cost the pass doesn't take into
+      account and the pass can't realign the stack.  */
+   if (ix86_preferred_stack_boundary < 128
+       || ix86_incoming_stack_boundary < 128
+       || opts->x_ix86_force_align_arg_pointer)
+     opts->x_target_flags &= ~MASK_STV;
+   if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL]
+       && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_LOAD))
+     opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_LOAD;
+   if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL]
+       && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_STORE))
+     opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_STORE;
+ 
+   /* Enable 128-bit AVX instruction generation
+      for the auto-vectorizer.  */
+   if (ix86_tune_features[X86_TUNE_AVX128_OPTIMAL]
+       && (opts_set->x_prefer_vector_width_type == PVW_NONE))
+     opts->x_prefer_vector_width_type = PVW_AVX128;
+ 
+   /* Use 256-bit AVX instruction generation
+      in the auto-vectorizer.  */
+   if (ix86_tune_features[X86_TUNE_AVX256_OPTIMAL]
+       && (opts_set->x_prefer_vector_width_type == PVW_NONE))
+     opts->x_prefer_vector_width_type = PVW_AVX256;
+ 
+   if (opts->x_ix86_recip_name)
+     {
+       char *p = ASTRDUP (opts->x_ix86_recip_name);
+       char *q;
+       unsigned int mask, i;
+       bool invert;
+ 
+       while ((q = strtok (p, ",")) != NULL)
+ 	{
+ 	  p = NULL;
+ 	  if (*q == '!')
+ 	    {
+ 	      invert = true;
+ 	      q++;
+ 	    }
+ 	  else
+ 	    invert = false;
+ 
+ 	  if (!strcmp (q, "default"))
+ 	    mask = RECIP_MASK_ALL;
+ 	  else
+ 	    {
+ 	      for (i = 0; i < ARRAY_SIZE (recip_options); i++)
+ 		if (!strcmp (q, recip_options[i].string))
+ 		  {
+ 		    mask = recip_options[i].mask;
+ 		    break;
+ 		  }
+ 
+ 	      if (i == ARRAY_SIZE (recip_options))
+ 		{
+ 		  error ("unknown option for %<-mrecip=%s%>", q);
+ 		  invert = false;
+ 		  mask = RECIP_MASK_NONE;
+ 		}
+ 	    }
+ 
+ 	  opts->x_recip_mask_explicit |= mask;
+ 	  if (invert)
+ 	    opts->x_recip_mask &= ~mask;
+ 	  else
+ 	    opts->x_recip_mask |= mask;
+ 	}
+     }
+ 
+   if (TARGET_RECIP_P (opts->x_target_flags))
+     opts->x_recip_mask |= RECIP_MASK_ALL & ~opts->x_recip_mask_explicit;
+   else if (opts_set->x_target_flags & MASK_RECIP)
+     opts->x_recip_mask &= ~(RECIP_MASK_ALL & ~opts->x_recip_mask_explicit);
+ 
+   /* Default long double to 64-bit for 32-bit Bionic and to __float128
+      for 64-bit Bionic.  Also default long double to 64-bit for Intel
+      MCU psABI.  */
+   if ((TARGET_HAS_BIONIC || TARGET_IAMCU)
+       && !(opts_set->x_target_flags
+ 	   & (MASK_LONG_DOUBLE_64 | MASK_LONG_DOUBLE_128)))
+     opts->x_target_flags |= (TARGET_64BIT
+ 			     ? MASK_LONG_DOUBLE_128
+ 			     : MASK_LONG_DOUBLE_64);
+ 
+   /* Only one of them can be active.  */
+   gcc_assert ((opts->x_target_flags & MASK_LONG_DOUBLE_64) == 0
+ 	      || (opts->x_target_flags & MASK_LONG_DOUBLE_128) == 0);
+ 
+   /* Handle stack protector */
+   if (!opts_set->x_ix86_stack_protector_guard)
+     {
+ #ifdef TARGET_THREAD_SSP_OFFSET
+       if (!TARGET_HAS_BIONIC)
+ 	opts->x_ix86_stack_protector_guard = SSP_TLS;
+       else
+ #endif
+ 	opts->x_ix86_stack_protector_guard = SSP_GLOBAL;
+     }
+ 
+   if (opts_set->x_ix86_stack_protector_guard_offset_str)
+     {
+       char *endp;
+       const char *str = opts->x_ix86_stack_protector_guard_offset_str;
+ 
+       errno = 0;
+       int64_t offset;
+ 
+ #if defined(INT64_T_IS_LONG)
+       offset = strtol (str, &endp, 0);
+ #else
+       offset = strtoll (str, &endp, 0);
+ #endif
+ 
+       if (!*str || *endp || errno)
+ 	error ("%qs is not a valid number "
+ 	       "in %<-mstack-protector-guard-offset=%>", str);
+ 
+       if (!IN_RANGE (offset, HOST_WIDE_INT_C (-0x80000000),
+ 		     HOST_WIDE_INT_C (0x7fffffff)))
+ 	error ("%qs is not a valid offset "
+ 	       "in %<-mstack-protector-guard-offset=%>", str);
+ 
+       opts->x_ix86_stack_protector_guard_offset = offset;
+     }
+ #ifdef TARGET_THREAD_SSP_OFFSET
+   else
+     opts->x_ix86_stack_protector_guard_offset = TARGET_THREAD_SSP_OFFSET;
+ #endif
+ 
+   if (opts_set->x_ix86_stack_protector_guard_reg_str)
+     {
+       const char *str = opts->x_ix86_stack_protector_guard_reg_str;
+       addr_space_t seg = ADDR_SPACE_GENERIC;
+ 
+       /* Discard optional register prefix.  */
+       if (str[0] == '%')
+ 	str++;
+ 
+       if (strlen (str) == 2 && str[1] == 's')
+ 	{
+ 	  if (str[0] == 'f')
+ 	    seg = ADDR_SPACE_SEG_FS;
+ 	  else if (str[0] == 'g')
+ 	    seg = ADDR_SPACE_SEG_GS;
+ 	}
+ 
+       if (seg == ADDR_SPACE_GENERIC)
+ 	error ("%qs is not a valid base register "
+ 	       "in %<-mstack-protector-guard-reg=%>",
+ 	       opts->x_ix86_stack_protector_guard_reg_str);
+ 
+       opts->x_ix86_stack_protector_guard_reg = seg;
+     }
+   else
+     {
+       opts->x_ix86_stack_protector_guard_reg = DEFAULT_TLS_SEG_REG;
+ 
+       /* The kernel uses a different segment register for performance
+ 	 reasons; a system call would not have to trash the userspace
+ 	 segment register, which would be expensive.  */
+       if (opts->x_ix86_cmodel == CM_KERNEL)
+ 	opts->x_ix86_stack_protector_guard_reg = ADDR_SPACE_SEG_GS;
+     }
+ 
+   /* Handle -mmemcpy-strategy= and -mmemset-strategy=  */
+   if (opts->x_ix86_tune_memcpy_strategy)
+     {
+       char *str = xstrdup (opts->x_ix86_tune_memcpy_strategy);
+       ix86_parse_stringop_strategy_string (str, false);
+       free (str);
+     }
+ 
+   if (opts->x_ix86_tune_memset_strategy)
+     {
+       char *str = xstrdup (opts->x_ix86_tune_memset_strategy);
+       ix86_parse_stringop_strategy_string (str, true);
+       free (str);
+     }
+ 
+   /* Save the initial options in case the user does function specific
+      options.  */
+   if (main_args_p)
+     target_option_default_node = target_option_current_node
+       = build_target_option_node (opts);
+ 
+   if (opts->x_flag_cf_protection != CF_NONE)
+     opts->x_flag_cf_protection
+       = (cf_protection_level) (opts->x_flag_cf_protection | CF_SET);
+ 
+   if (ix86_tune_features [X86_TUNE_AVOID_256FMA_CHAINS])
+     SET_OPTION_IF_UNSET (opts, opts_set, param_avoid_fma_max_bits, 256);
+   else if (ix86_tune_features [X86_TUNE_AVOID_128FMA_CHAINS])
+     SET_OPTION_IF_UNSET (opts, opts_set, param_avoid_fma_max_bits, 128);
+ 
+   /* PR86952: jump table usage with retpolines is slow.
+      The PR provides some numbers about the slowness.  */
+   if (ix86_indirect_branch != indirect_branch_keep)
+     SET_OPTION_IF_UNSET (opts, opts_set, flag_jump_tables, 0);
+ 
+   return true;
+ }
+ 
+ /* Implement the TARGET_OPTION_OVERRIDE hook.  */
+ 
+ void
+ ix86_option_override (void)
+ {
+   ix86_option_override_internal (true, &global_options, &global_options_set);
+ }
+ 
+ /* Remember the last target of ix86_set_current_function.  */
+ static GTY(()) tree ix86_previous_fndecl;
+ 
+ /* Set targets globals to the default (or current #pragma GCC target
+    if active).  Invalidate ix86_previous_fndecl cache.  */
+ 
+ void
+ ix86_reset_previous_fndecl (void)
+ {
+   tree new_tree = target_option_current_node;
+   cl_target_option_restore (&global_options, TREE_TARGET_OPTION (new_tree));
+   if (TREE_TARGET_GLOBALS (new_tree))
+     restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
+   else if (new_tree == target_option_default_node)
+     restore_target_globals (&default_target_globals);
+   else
+     TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
+   ix86_previous_fndecl = NULL_TREE;
+ }
+ 
+ /* Add target attribute to SIMD clone NODE if needed.  */
+ 
+ void
+ ix86_simd_clone_adjust (struct cgraph_node *node)
+ {
+   const char *str = NULL;
+ 
+   /* Attributes need to be adjusted for definitions, not declarations.  */
+   if (!node->definition)
+     return;
+ 
+   gcc_assert (node->decl == cfun->decl);
+   switch (node->simdclone->vecsize_mangle)
+     {
+     case 'b':
+       if (!TARGET_SSE2)
+ 	str = "sse2";
+       break;
+     case 'c':
+       if (TARGET_PREFER_AVX128)
+ 	{
+ 	  if (!TARGET_AVX)
+ 	    str = "avx,prefer-vector-width=256";
+ 	  else
+ 	    str = "prefer-vector-width=256";
+ 	}
+       else if (!TARGET_AVX)
+ 	str = "avx";
+       break;
+     case 'd':
+       if (TARGET_PREFER_AVX128)
+ 	{
+ 	  if (!TARGET_AVX2)
+ 	    str = "avx2,prefer-vector-width=256";
+ 	  else
+ 	    str = "prefer-vector-width=256";
+ 	}
+       else if (!TARGET_AVX2)
+ 	str = "avx2";
+       break;
+     case 'e':
+       if (TARGET_PREFER_AVX256)
+ 	{
+ 	  if (!TARGET_AVX512F)
+ 	    str = "avx512f,prefer-vector-width=512";
+ 	  else
+ 	    str = "prefer-vector-width=512";
+ 	}
+       else if (!TARGET_AVX512F)
+ 	str = "avx512f";
+       break;
+     default:
+       gcc_unreachable ();
+     }
+   if (str == NULL)
+     return;
+   push_cfun (NULL);
+   tree args = build_tree_list (NULL_TREE, build_string (strlen (str), str));
+   bool ok = ix86_valid_target_attribute_p (node->decl, NULL, args, 0);
+   gcc_assert (ok);
+   pop_cfun ();
+   ix86_reset_previous_fndecl ();
+   ix86_set_current_function (node->decl);
+ }
+ 
+ 
+ 
+ /* Set the func_type field from the function FNDECL.  */
+ 
+ static void
+ ix86_set_func_type (tree fndecl)
+ {
+   if (cfun->machine->func_type == TYPE_UNKNOWN)
+     {
+       if (lookup_attribute ("interrupt",
+ 			    TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))
+ 	{
+ 	  if (ix86_function_naked (fndecl))
+ 	    error_at (DECL_SOURCE_LOCATION (fndecl),
+ 		      "interrupt and naked attributes are not compatible");
+ 
+ 	  int nargs = 0;
+ 	  for (tree arg = DECL_ARGUMENTS (fndecl);
+ 	       arg;
+ 	       arg = TREE_CHAIN (arg))
+ 	    nargs++;
+ 	  cfun->machine->no_caller_saved_registers = true;
+ 	  cfun->machine->func_type
+ 	    = nargs == 2 ? TYPE_EXCEPTION : TYPE_INTERRUPT;
+ 
+ 	  ix86_optimize_mode_switching[X86_DIRFLAG] = 1;
+ 
+ 	  /* Only dwarf2out.c can handle -WORD(AP) as a pointer argument.  */
+ 	  if (write_symbols != NO_DEBUG && write_symbols != DWARF2_DEBUG)
+ 	    sorry ("only DWARF debug format is supported for interrupt "
+ 		   "service routine");
+ 	}
+       else
+ 	{
+ 	  cfun->machine->func_type = TYPE_NORMAL;
+ 	  if (lookup_attribute ("no_caller_saved_registers",
+ 				TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))
+ 	    cfun->machine->no_caller_saved_registers = true;
+ 	}
+     }
+ }
+ 
+ /* Set the indirect_branch_type field from the function FNDECL.  */
+ 
+ static void
+ ix86_set_indirect_branch_type (tree fndecl)
+ {
+   if (cfun->machine->indirect_branch_type == indirect_branch_unset)
+     {
+       tree attr = lookup_attribute ("indirect_branch",
+ 				    DECL_ATTRIBUTES (fndecl));
+       if (attr != NULL)
+ 	{
+ 	  tree args = TREE_VALUE (attr);
+ 	  if (args == NULL)
+ 	    gcc_unreachable ();
+ 	  tree cst = TREE_VALUE (args);
+ 	  if (strcmp (TREE_STRING_POINTER (cst), "keep") == 0)
+ 	    cfun->machine->indirect_branch_type = indirect_branch_keep;
+ 	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk") == 0)
+ 	    cfun->machine->indirect_branch_type = indirect_branch_thunk;
+ 	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk-inline") == 0)
+ 	    cfun->machine->indirect_branch_type = indirect_branch_thunk_inline;
+ 	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk-extern") == 0)
+ 	    cfun->machine->indirect_branch_type = indirect_branch_thunk_extern;
+ 	  else
+ 	    gcc_unreachable ();
+ 	}
+       else
+ 	cfun->machine->indirect_branch_type = ix86_indirect_branch;
+ 
+       /* -mcmodel=large is not compatible with -mindirect-branch=thunk
+ 	 nor -mindirect-branch=thunk-extern.  */
+       if ((ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
+ 	  && ((cfun->machine->indirect_branch_type
+ 	       == indirect_branch_thunk_extern)
+ 	      || (cfun->machine->indirect_branch_type
+ 		  == indirect_branch_thunk)))
+ 	error ("%<-mindirect-branch=%s%> and %<-mcmodel=large%> are not "
+ 	       "compatible",
+ 	       ((cfun->machine->indirect_branch_type
+ 		 == indirect_branch_thunk_extern)
+ 		? "thunk-extern" : "thunk"));
+ 
+       if (cfun->machine->indirect_branch_type != indirect_branch_keep
+ 	  && (cfun->machine->indirect_branch_type
+ 	      != indirect_branch_thunk_extern)
+ 	  && (flag_cf_protection & CF_RETURN))
+ 	error ("%<-mindirect-branch%> and %<-fcf-protection%> are not "
+ 	       "compatible");
+     }
+ 
+   if (cfun->machine->function_return_type == indirect_branch_unset)
+     {
+       tree attr = lookup_attribute ("function_return",
+ 				    DECL_ATTRIBUTES (fndecl));
+       if (attr != NULL)
+ 	{
+ 	  tree args = TREE_VALUE (attr);
+ 	  if (args == NULL)
+ 	    gcc_unreachable ();
+ 	  tree cst = TREE_VALUE (args);
+ 	  if (strcmp (TREE_STRING_POINTER (cst), "keep") == 0)
+ 	    cfun->machine->function_return_type = indirect_branch_keep;
+ 	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk") == 0)
+ 	    cfun->machine->function_return_type = indirect_branch_thunk;
+ 	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk-inline") == 0)
+ 	    cfun->machine->function_return_type = indirect_branch_thunk_inline;
+ 	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk-extern") == 0)
+ 	    cfun->machine->function_return_type = indirect_branch_thunk_extern;
+ 	  else
+ 	    gcc_unreachable ();
+ 	}
+       else
+ 	cfun->machine->function_return_type = ix86_function_return;
+ 
+       /* -mcmodel=large is not compatible with -mfunction-return=thunk
+ 	 nor -mfunction-return=thunk-extern.  */
+       if ((ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
+ 	  && ((cfun->machine->function_return_type
+ 	       == indirect_branch_thunk_extern)
+ 	      || (cfun->machine->function_return_type
+ 		  == indirect_branch_thunk)))
+ 	error ("%<-mfunction-return=%s%> and %<-mcmodel=large%> are not "
+ 	       "compatible",
+ 	       ((cfun->machine->function_return_type
+ 		 == indirect_branch_thunk_extern)
+ 		? "thunk-extern" : "thunk"));
+ 
+       if (cfun->machine->function_return_type != indirect_branch_keep
+ 	  && (cfun->machine->function_return_type
+ 	      != indirect_branch_thunk_extern)
+ 	  && (flag_cf_protection & CF_RETURN))
+ 	error ("%<-mfunction-return%> and %<-fcf-protection%> are not "
+ 	       "compatible");
+     }
+ }
+ 
+ /* Establish appropriate back-end context for processing the function
+    FNDECL.  The argument might be NULL to indicate processing at top
+    level, outside of any function scope.  */
+ void
+ ix86_set_current_function (tree fndecl)
+ {
+   /* Only change the context if the function changes.  This hook is called
+      several times in the course of compiling a function, and we don't want to
+      slow things down too much or call target_reinit when it isn't safe.  */
+   if (fndecl == ix86_previous_fndecl)
+     {
+       /* There may be 2 function bodies for the same function FNDECL,
+ 	 one is extern inline and one isn't.  Call ix86_set_func_type
+ 	 to set the func_type field.  */
+       if (fndecl != NULL_TREE)
+ 	{
+ 	  ix86_set_func_type (fndecl);
+ 	  ix86_set_indirect_branch_type (fndecl);
+ 	}
+       return;
+     }
+ 
+   tree old_tree;
+   if (ix86_previous_fndecl == NULL_TREE)
+     old_tree = target_option_current_node;
+   else if (DECL_FUNCTION_SPECIFIC_TARGET (ix86_previous_fndecl))
+     old_tree = DECL_FUNCTION_SPECIFIC_TARGET (ix86_previous_fndecl);
+   else
+     old_tree = target_option_default_node;
+ 
+   if (fndecl == NULL_TREE)
+     {
+       if (old_tree != target_option_current_node)
+ 	ix86_reset_previous_fndecl ();
+       return;
+     }
+ 
+   ix86_set_func_type (fndecl);
+   ix86_set_indirect_branch_type (fndecl);
+ 
+   tree new_tree = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
+   if (new_tree == NULL_TREE)
+     new_tree = target_option_default_node;
+ 
+   if (old_tree != new_tree)
+     {
+       cl_target_option_restore (&global_options, TREE_TARGET_OPTION (new_tree));
+       if (TREE_TARGET_GLOBALS (new_tree))
+ 	restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
+       else if (new_tree == target_option_default_node)
+ 	restore_target_globals (&default_target_globals);
+       else
+ 	TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
+     }
+   ix86_previous_fndecl = fndecl;
+ 
+   static bool prev_no_caller_saved_registers;
+ 
+   /* 64-bit MS and SYSV ABI have different set of call used registers.
+      Avoid expensive re-initialization of init_regs each time we switch
+      function context.  */
+   if (TARGET_64BIT
+       && (call_used_or_fixed_reg_p (SI_REG)
+ 	  == (cfun->machine->call_abi == MS_ABI)))
+     reinit_regs ();
+   /* Need to re-initialize init_regs if caller-saved registers are
+      changed.  */
+   else if (prev_no_caller_saved_registers
+ 	   != cfun->machine->no_caller_saved_registers)
+     reinit_regs ();
+ 
+   if (cfun->machine->func_type != TYPE_NORMAL
+       || cfun->machine->no_caller_saved_registers)
+     {
+       /* Don't allow SSE, MMX nor x87 instructions since they
+ 	 may change processor state.  */
+       const char *isa;
+       if (TARGET_SSE)
+ 	isa = "SSE";
+       else if (TARGET_MMX)
+ 	isa = "MMX/3Dnow";
+       else if (TARGET_80387)
+ 	isa = "80387";
+       else
+ 	isa = NULL;
+       if (isa != NULL)
+ 	{
+ 	  if (cfun->machine->func_type != TYPE_NORMAL)
+ 	    sorry (cfun->machine->func_type == TYPE_EXCEPTION
+ 		   ? G_("%s instructions aren%'t allowed in an"
+ 			" exception service routine")
+ 		   : G_("%s instructions aren%'t allowed in an"
+ 			" interrupt service routine"),
+ 		   isa);
+ 	  else
+ 	    sorry ("%s instructions aren%'t allowed in a function with "
+ 		   "the %<no_caller_saved_registers%> attribute", isa);
+ 	  /* Don't issue the same error twice.  */
+ 	  cfun->machine->func_type = TYPE_NORMAL;
+ 	  cfun->machine->no_caller_saved_registers = false;
+ 	}
+     }
+ 
+   prev_no_caller_saved_registers
+     = cfun->machine->no_caller_saved_registers;
+ }
+ 
+ /* Implement the TARGET_OFFLOAD_OPTIONS hook.  */
+ char *
+ ix86_offload_options (void)
+ {
+   if (TARGET_LP64)
+     return xstrdup ("-foffload-abi=lp64");
+   return xstrdup ("-foffload-abi=ilp32");
+ }
+ 
+ /* Handle "cdecl", "stdcall", "fastcall", "regparm", "thiscall",
+    and "sseregparm" calling convention attributes;
+    arguments as in struct attribute_spec.handler.  */
+ 
+ static tree
+ ix86_handle_cconv_attribute (tree *node, tree name, tree args, int,
+ 			     bool *no_add_attrs)
+ {
+   if (TREE_CODE (*node) != FUNCTION_TYPE
+       && TREE_CODE (*node) != METHOD_TYPE
+       && TREE_CODE (*node) != FIELD_DECL
+       && TREE_CODE (*node) != TYPE_DECL)
+     {
+       warning (OPT_Wattributes, "%qE attribute only applies to functions",
+ 	       name);
+       *no_add_attrs = true;
+       return NULL_TREE;
+     }
+ 
+   /* Can combine regparm with all attributes but fastcall, and thiscall.  */
+   if (is_attribute_p ("regparm", name))
+     {
+       tree cst;
+ 
+       if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
+         {
+ 	  error ("fastcall and regparm attributes are not compatible");
+ 	}
+ 
+       if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
+ 	{
+ 	  error ("regparam and thiscall attributes are not compatible");
+ 	}
+ 
+       cst = TREE_VALUE (args);
+       if (TREE_CODE (cst) != INTEGER_CST)
+ 	{
+ 	  warning (OPT_Wattributes,
+ 		   "%qE attribute requires an integer constant argument",
+ 		   name);
+ 	  *no_add_attrs = true;
+ 	}
+       else if (compare_tree_int (cst, REGPARM_MAX) > 0)
+ 	{
+ 	  warning (OPT_Wattributes, "argument to %qE attribute larger than %d",
+ 		   name, REGPARM_MAX);
+ 	  *no_add_attrs = true;
+ 	}
+ 
+       return NULL_TREE;
+     }
+ 
+   if (TARGET_64BIT)
+     {
+       /* Do not warn when emulating the MS ABI.  */
+       if ((TREE_CODE (*node) != FUNCTION_TYPE
+ 	   && TREE_CODE (*node) != METHOD_TYPE)
+ 	  || ix86_function_type_abi (*node) != MS_ABI)
+ 	warning (OPT_Wattributes, "%qE attribute ignored",
+ 	         name);
+       *no_add_attrs = true;
+       return NULL_TREE;
+     }
+ 
+   /* Can combine fastcall with stdcall (redundant) and sseregparm.  */
+   if (is_attribute_p ("fastcall", name))
+     {
+       if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
+         {
+ 	  error ("fastcall and cdecl attributes are not compatible");
+ 	}
+       if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
+         {
+ 	  error ("fastcall and stdcall attributes are not compatible");
+ 	}
+       if (lookup_attribute ("regparm", TYPE_ATTRIBUTES (*node)))
+         {
+ 	  error ("fastcall and regparm attributes are not compatible");
+ 	}
+       if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
+ 	{
+ 	  error ("fastcall and thiscall attributes are not compatible");
+ 	}
+     }
+ 
+   /* Can combine stdcall with fastcall (redundant), regparm and
+      sseregparm.  */
+   else if (is_attribute_p ("stdcall", name))
+     {
+       if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
+         {
+ 	  error ("stdcall and cdecl attributes are not compatible");
+ 	}
+       if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
+         {
+ 	  error ("stdcall and fastcall attributes are not compatible");
+ 	}
+       if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
+ 	{
+ 	  error ("stdcall and thiscall attributes are not compatible");
+ 	}
+     }
+ 
+   /* Can combine cdecl with regparm and sseregparm.  */
+   else if (is_attribute_p ("cdecl", name))
+     {
+       if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
+         {
+ 	  error ("stdcall and cdecl attributes are not compatible");
+ 	}
+       if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
+         {
+ 	  error ("fastcall and cdecl attributes are not compatible");
+ 	}
+       if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
+ 	{
+ 	  error ("cdecl and thiscall attributes are not compatible");
+ 	}
+     }
+   else if (is_attribute_p ("thiscall", name))
+     {
+       if (TREE_CODE (*node) != METHOD_TYPE && pedantic)
+ 	warning (OPT_Wattributes, "%qE attribute is used for non-class method",
+ 	         name);
+       if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
+ 	{
+ 	  error ("stdcall and thiscall attributes are not compatible");
+ 	}
+       if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
+ 	{
+ 	  error ("fastcall and thiscall attributes are not compatible");
+ 	}
+       if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
+ 	{
+ 	  error ("cdecl and thiscall attributes are not compatible");
+ 	}
+     }
+ 
+   /* Can combine sseregparm with all attributes.  */
+ 
+   return NULL_TREE;
+ }
+ 
+ #ifndef CHECK_STACK_LIMIT
+ #define CHECK_STACK_LIMIT (-1)
+ #endif
+ 
+ /* The transactional memory builtins are implicitly regparm or fastcall
+    depending on the ABI.  Override the generic do-nothing attribute that
+    these builtins were declared with, and replace it with one of the two
+    attributes that we expect elsewhere.  */
+ 
+ static tree
+ ix86_handle_tm_regparm_attribute (tree *node, tree, tree,
+ 				  int flags, bool *no_add_attrs)
+ {
+   tree alt;
+ 
+   /* In no case do we want to add the placeholder attribute.  */
+   *no_add_attrs = true;
+ 
+   /* The 64-bit ABI is unchanged for transactional memory.  */
+   if (TARGET_64BIT)
+     return NULL_TREE;
+ 
+   /* ??? Is there a better way to validate 32-bit windows?  We have
+      cfun->machine->call_abi, but that seems to be set only for 64-bit.  */
+   if (CHECK_STACK_LIMIT > 0)
+     alt = tree_cons (get_identifier ("fastcall"), NULL, NULL);
+   else
+     {
+       alt = tree_cons (NULL, build_int_cst (NULL, 2), NULL);
+       alt = tree_cons (get_identifier ("regparm"), alt, NULL);
+     }
+   decl_attributes (node, alt, flags);
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Handle a "force_align_arg_pointer" attribute.  */
+ 
+ static tree
+ ix86_handle_force_align_arg_pointer_attribute (tree *node, tree name,
+ 					       tree, int, bool *no_add_attrs)
+ {
+   if (TREE_CODE (*node) != FUNCTION_TYPE
+       && TREE_CODE (*node) != METHOD_TYPE
+       && TREE_CODE (*node) != FIELD_DECL
+       && TREE_CODE (*node) != TYPE_DECL)
+     {
+       warning (OPT_Wattributes, "%qE attribute only applies to functions",
+ 	       name);
+       *no_add_attrs = true;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Handle a "ms_struct" or "gcc_struct" attribute; arguments as in
+    struct attribute_spec.handler.  */
+ 
+ static tree
+ ix86_handle_struct_attribute (tree *node, tree name, tree, int,
+ 			      bool *no_add_attrs)
+ {
+   tree *type = NULL;
+   if (DECL_P (*node))
+     {
+       if (TREE_CODE (*node) == TYPE_DECL)
+ 	type = &TREE_TYPE (*node);
+     }
+   else
+     type = node;
+ 
+   if (!(type && RECORD_OR_UNION_TYPE_P (*type)))
+     {
+       warning (OPT_Wattributes, "%qE attribute ignored",
+ 	       name);
+       *no_add_attrs = true;
+     }
+ 
+   else if ((is_attribute_p ("ms_struct", name)
+ 	    && lookup_attribute ("gcc_struct", TYPE_ATTRIBUTES (*type)))
+ 	   || ((is_attribute_p ("gcc_struct", name)
+ 		&& lookup_attribute ("ms_struct", TYPE_ATTRIBUTES (*type)))))
+     {
+       warning (OPT_Wattributes, "%qE incompatible attribute ignored",
+                name);
+       *no_add_attrs = true;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Handle a "callee_pop_aggregate_return" attribute; arguments as
+    in struct attribute_spec handler.  */
+ 
+ static tree
+ ix86_handle_callee_pop_aggregate_return (tree *node, tree name, tree args, int,
+ 					 bool *no_add_attrs)
+ {
+   if (TREE_CODE (*node) != FUNCTION_TYPE
+       && TREE_CODE (*node) != METHOD_TYPE
+       && TREE_CODE (*node) != FIELD_DECL
+       && TREE_CODE (*node) != TYPE_DECL)
+     {
+       warning (OPT_Wattributes, "%qE attribute only applies to functions",
+ 	       name);
+       *no_add_attrs = true;
+       return NULL_TREE;
+     }
+   if (TARGET_64BIT)
+     {
+       warning (OPT_Wattributes, "%qE attribute only available for 32-bit",
+ 	       name);
+       *no_add_attrs = true;
+       return NULL_TREE;
+     }
+   if (is_attribute_p ("callee_pop_aggregate_return", name))
+     {
+       tree cst;
+ 
+       cst = TREE_VALUE (args);
+       if (TREE_CODE (cst) != INTEGER_CST)
+ 	{
+ 	  warning (OPT_Wattributes,
+ 		   "%qE attribute requires an integer constant argument",
+ 		   name);
+ 	  *no_add_attrs = true;
+ 	}
+       else if (compare_tree_int (cst, 0) != 0
+ 	       && compare_tree_int (cst, 1) != 0)
+ 	{
+ 	  warning (OPT_Wattributes,
+ 		   "argument to %qE attribute is neither zero, nor one",
+ 		   name);
+ 	  *no_add_attrs = true;
+ 	}
+ 
+       return NULL_TREE;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Handle a "ms_abi" or "sysv" attribute; arguments as in
+    struct attribute_spec.handler.  */
+ 
+ static tree
+ ix86_handle_abi_attribute (tree *node, tree name, tree, int,
+ 			   bool *no_add_attrs)
+ {
+   if (TREE_CODE (*node) != FUNCTION_TYPE
+       && TREE_CODE (*node) != METHOD_TYPE
+       && TREE_CODE (*node) != FIELD_DECL
+       && TREE_CODE (*node) != TYPE_DECL)
+     {
+       warning (OPT_Wattributes, "%qE attribute only applies to functions",
+ 	       name);
+       *no_add_attrs = true;
+       return NULL_TREE;
+     }
+ 
+   /* Can combine regparm with all attributes but fastcall.  */
+   if (is_attribute_p ("ms_abi", name))
+     {
+       if (lookup_attribute ("sysv_abi", TYPE_ATTRIBUTES (*node)))
+         {
+ 	  error ("%qs and %qs attributes are not compatible",
+ 		 "ms_abi", "sysv_abi");
+ 	}
+ 
+       return NULL_TREE;
+     }
+   else if (is_attribute_p ("sysv_abi", name))
+     {
+       if (lookup_attribute ("ms_abi", TYPE_ATTRIBUTES (*node)))
+         {
+ 	  error ("%qs and %qs attributes are not compatible",
+ 		 "ms_abi", "sysv_abi");
+ 	}
+ 
+       return NULL_TREE;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ static tree
+ ix86_handle_fndecl_attribute (tree *node, tree name, tree args, int,
+ 			      bool *no_add_attrs)
+ {
+   if (TREE_CODE (*node) != FUNCTION_DECL)
+     {
+       warning (OPT_Wattributes, "%qE attribute only applies to functions",
+                name);
+       *no_add_attrs = true;
+     }
+ 
+   if (is_attribute_p ("indirect_branch", name))
+     {
+       tree cst = TREE_VALUE (args);
+       if (TREE_CODE (cst) != STRING_CST)
+ 	{
+ 	  warning (OPT_Wattributes,
+ 		   "%qE attribute requires a string constant argument",
+ 		   name);
+ 	  *no_add_attrs = true;
+ 	}
+       else if (strcmp (TREE_STRING_POINTER (cst), "keep") != 0
+ 	       && strcmp (TREE_STRING_POINTER (cst), "thunk") != 0
+ 	       && strcmp (TREE_STRING_POINTER (cst), "thunk-inline") != 0
+ 	       && strcmp (TREE_STRING_POINTER (cst), "thunk-extern") != 0)
+ 	{
+ 	  warning (OPT_Wattributes,
+ 		   "argument to %qE attribute is not "
+ 		   "(keep|thunk|thunk-inline|thunk-extern)", name);
+ 	  *no_add_attrs = true;
+ 	}
+     }
+ 
+   if (is_attribute_p ("function_return", name))
+     {
+       tree cst = TREE_VALUE (args);
+       if (TREE_CODE (cst) != STRING_CST)
+ 	{
+ 	  warning (OPT_Wattributes,
+ 		   "%qE attribute requires a string constant argument",
+ 		   name);
+ 	  *no_add_attrs = true;
+ 	}
+       else if (strcmp (TREE_STRING_POINTER (cst), "keep") != 0
+ 	       && strcmp (TREE_STRING_POINTER (cst), "thunk") != 0
+ 	       && strcmp (TREE_STRING_POINTER (cst), "thunk-inline") != 0
+ 	       && strcmp (TREE_STRING_POINTER (cst), "thunk-extern") != 0)
+ 	{
+ 	  warning (OPT_Wattributes,
+ 		   "argument to %qE attribute is not "
+ 		   "(keep|thunk|thunk-inline|thunk-extern)", name);
+ 	  *no_add_attrs = true;
+ 	}
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ static tree
+ ix86_handle_no_caller_saved_registers_attribute (tree *, tree, tree,
+ 						 int, bool *)
+ {
+   return NULL_TREE;
+ }
+ 
+ static tree
+ ix86_handle_interrupt_attribute (tree *node, tree, tree, int, bool *)
+ {
+   /* DECL_RESULT and DECL_ARGUMENTS do not exist there yet,
+      but the function type contains args and return type data.  */
+   tree func_type = *node;
+   tree return_type = TREE_TYPE (func_type);
+ 
+   int nargs = 0;
+   tree current_arg_type = TYPE_ARG_TYPES (func_type);
+   while (current_arg_type
+ 	 && ! VOID_TYPE_P (TREE_VALUE (current_arg_type)))
+     {
+       if (nargs == 0)
+ 	{
+ 	  if (! POINTER_TYPE_P (TREE_VALUE (current_arg_type)))
+ 	    error ("interrupt service routine should have a pointer "
+ 		   "as the first argument");
+ 	}
+       else if (nargs == 1)
+ 	{
+ 	  if (TREE_CODE (TREE_VALUE (current_arg_type)) != INTEGER_TYPE
+ 	      || TYPE_MODE (TREE_VALUE (current_arg_type)) != word_mode)
+ 	    error ("interrupt service routine should have %qs "
+ 		   "as the second argument",
+ 		   TARGET_64BIT
+ 		   ? (TARGET_X32 ? "unsigned long long int"
+ 				 : "unsigned long int")
+ 		   : "unsigned int");
+ 	}
+       nargs++;
+       current_arg_type = TREE_CHAIN (current_arg_type);
+     }
+   if (!nargs || nargs > 2)
+     error ("interrupt service routine can only have a pointer argument "
+ 	   "and an optional integer argument");
+   if (! VOID_TYPE_P (return_type))
+     error ("interrupt service routine must return %<void%>");
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Handle fentry_name / fentry_section attribute.  */
+ 
+ static tree
+ ix86_handle_fentry_name (tree *node, tree name, tree args,
+ 			 int, bool *no_add_attrs)
+ {
+   if (TREE_CODE (*node) == FUNCTION_DECL
+       && TREE_CODE (TREE_VALUE (args)) == STRING_CST)
+     /* Do nothing else, just set the attribute.  We'll get at
+        it later with lookup_attribute.  */
+     ;
+   else
+     {
+       warning (OPT_Wattributes, "%qE attribute ignored", name);
+       *no_add_attrs = true;
+     }
+ 
+   return NULL_TREE;
+ }
+ 
+ /* Table of valid machine attributes.  */
+ const struct attribute_spec ix86_attribute_table[] =
+ {
+   /* { name, min_len, max_len, decl_req, type_req, fn_type_req,
+        affects_type_identity, handler, exclude } */
+   /* Stdcall attribute says callee is responsible for popping arguments
+      if they are not variable.  */
+   { "stdcall",   0, 0, false, true,  true,  true, ix86_handle_cconv_attribute,
+     NULL },
+   /* Fastcall attribute says callee is responsible for popping arguments
+      if they are not variable.  */
+   { "fastcall",  0, 0, false, true,  true,  true, ix86_handle_cconv_attribute,
+     NULL },
+   /* Thiscall attribute says callee is responsible for popping arguments
+      if they are not variable.  */
+   { "thiscall",  0, 0, false, true,  true,  true, ix86_handle_cconv_attribute,
+     NULL },
+   /* Cdecl attribute says the callee is a normal C declaration */
+   { "cdecl",     0, 0, false, true,  true,  true, ix86_handle_cconv_attribute,
+     NULL },
+   /* Regparm attribute specifies how many integer arguments are to be
+      passed in registers.  */
+   { "regparm",   1, 1, false, true,  true,  true, ix86_handle_cconv_attribute,
+     NULL },
+   /* Sseregparm attribute says we are using x86_64 calling conventions
+      for FP arguments.  */
+   { "sseregparm", 0, 0, false, true, true,  true, ix86_handle_cconv_attribute,
+     NULL },
+   /* The transactional memory builtins are implicitly regparm or fastcall
+      depending on the ABI.  Override the generic do-nothing attribute that
+      these builtins were declared with.  */
+   { "*tm regparm", 0, 0, false, true, true, true,
+     ix86_handle_tm_regparm_attribute, NULL },
+   /* force_align_arg_pointer says this function realigns the stack at entry.  */
+   { "force_align_arg_pointer", 0, 0,
+     false, true,  true, false, ix86_handle_force_align_arg_pointer_attribute,
+     NULL },
+ #if TARGET_DLLIMPORT_DECL_ATTRIBUTES
+   { "dllimport", 0, 0, false, false, false, false, handle_dll_attribute,
+     NULL },
+   { "dllexport", 0, 0, false, false, false, false, handle_dll_attribute,
+     NULL },
+   { "shared",    0, 0, true,  false, false, false,
+     ix86_handle_shared_attribute, NULL },
+ #endif
+   { "ms_struct", 0, 0, false, false,  false, false,
+     ix86_handle_struct_attribute, NULL },
+   { "gcc_struct", 0, 0, false, false,  false, false,
+     ix86_handle_struct_attribute, NULL },
+ #ifdef SUBTARGET_ATTRIBUTE_TABLE
+   SUBTARGET_ATTRIBUTE_TABLE,
+ #endif
+   /* ms_abi and sysv_abi calling convention function attributes.  */
+   { "ms_abi", 0, 0, false, true, true, true, ix86_handle_abi_attribute, NULL },
+   { "sysv_abi", 0, 0, false, true, true, true, ix86_handle_abi_attribute,
+     NULL },
+   { "ms_abi va_list", 0, 0, false, false, false, false, NULL, NULL },
+   { "sysv_abi va_list", 0, 0, false, false, false, false, NULL, NULL },
+   { "ms_hook_prologue", 0, 0, true, false, false, false,
+     ix86_handle_fndecl_attribute, NULL },
+   { "callee_pop_aggregate_return", 1, 1, false, true, true, true,
+     ix86_handle_callee_pop_aggregate_return, NULL },
+   { "interrupt", 0, 0, false, true, true, false,
+     ix86_handle_interrupt_attribute, NULL },
+   { "no_caller_saved_registers", 0, 0, false, true, true, false,
+     ix86_handle_no_caller_saved_registers_attribute, NULL },
+   { "naked", 0, 0, true, false, false, false,
+     ix86_handle_fndecl_attribute, NULL },
+   { "indirect_branch", 1, 1, true, false, false, false,
+     ix86_handle_fndecl_attribute, NULL },
+   { "function_return", 1, 1, true, false, false, false,
+     ix86_handle_fndecl_attribute, NULL },
+   { "indirect_return", 0, 0, false, true, true, false,
+     NULL, NULL },
+   { "fentry_name", 1, 1, true, false, false, false,
+     ix86_handle_fentry_name, NULL },
+   { "fentry_section", 1, 1, true, false, false, false,
+     ix86_handle_fentry_name, NULL },
+   { "cf_check", 0, 0, true, false, false, false,
+     ix86_handle_fndecl_attribute, NULL },
+ 
+   /* End element.  */
+   { NULL, 0, 0, false, false, false, false, NULL, NULL }
+ };
+ 
+ #include "gt-i386-options.h"
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-options.h gcc-10.1.0/gcc/config/i386/i386-options.h
*** gcc-9.3.0/gcc/config/i386/i386-options.h	Thu Jan  1 00:00:00 1970
--- gcc-10.1.0/gcc/config/i386/i386-options.h	Thu May  7 10:49:59 2020
***************
*** 0 ****
--- 1,84 ----
+ /* Copyright (C) 1988-2020 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_I386_OPTIONS_H
+ #define GCC_I386_OPTIONS_H
+ 
+ extern int ix86_omp_device_kind_arch_isa (enum omp_device_kind_arch_isa trait,
+ 					  const char *name);
+ 
+ char *ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
+ 			  int flags, int flags2,
+ 			  const char *arch, const char *tune,
+ 			  enum fpmath_unit fpmath,
+ 			  enum prefer_vector_width pvw, bool add_nl_p,
+ 			  bool add_abi_p);
+ 
+ extern enum attr_cpu ix86_schedule;
+ 
+ extern enum processor_type ix86_tune;
+ extern enum processor_type ix86_arch;
+ extern unsigned char x86_prefetch_sse;
+ extern const struct processor_costs *ix86_tune_cost;
+ 
+ extern int ix86_tune_defaulted;
+ extern int ix86_arch_specified;
+ 
+ extern unsigned int ix86_default_incoming_stack_boundary;
+ extern HOST_WIDE_INT deferred_isa_values;
+ extern HOST_WIDE_INT deferred_isa_values2;
+ 
+ extern unsigned int ix86_preferred_stack_boundary;
+ extern unsigned int ix86_user_incoming_stack_boundary;
+ extern unsigned int ix86_default_incoming_stack_boundary;
+ extern unsigned int ix86_incoming_stack_boundary;
+ 
+ extern char *ix86_offload_options (void);
+ extern void ix86_option_override (void);
+ extern void ix86_override_options_after_change (void);
+ void ix86_set_current_function (tree fndecl);
+ bool ix86_function_naked (const_tree fn);
+ void ix86_simd_clone_adjust (struct cgraph_node *node);
+ 
+ extern tree (*ix86_veclib_handler) (combined_fn, tree, tree);
+ extern tree ix86_veclibabi_svml (combined_fn, tree, tree);
+ extern tree ix86_veclibabi_acml (combined_fn, tree, tree);
+ 
+ enum ix86_function_specific_strings
+ {
+   IX86_FUNCTION_SPECIFIC_ARCH,
+   IX86_FUNCTION_SPECIFIC_TUNE,
+   IX86_FUNCTION_SPECIFIC_MAX
+ };
+ 
+ extern const char *stringop_alg_names[];
+ 
+ void ix86_add_new_builtins (HOST_WIDE_INT isa, HOST_WIDE_INT isa2);
+ void ix86_function_specific_save (struct cl_target_option *,
+ 				  struct gcc_options *opts);
+ void ix86_function_specific_restore (struct gcc_options *opts,
+ 				     struct cl_target_option *);
+ void ix86_function_specific_post_stream_in (struct cl_target_option *);
+ void ix86_function_specific_print (FILE *, int,
+ 				   struct cl_target_option *);
+ bool ix86_valid_target_attribute_p (tree, tree, tree, int);
+ 
+ extern const struct attribute_spec ix86_attribute_table[];
+ 
+ 
+ #endif  /* GCC_I386_OPTIONS_H */
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-opts.h gcc-10.1.0/gcc/config/i386/i386-opts.h
*** gcc-9.3.0/gcc/config/i386/i386-opts.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386-opts.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for option handling for IA-32.
!    Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for option handling for IA-32.
!    Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-passes.def gcc-10.1.0/gcc/config/i386/i386-passes.def
*** gcc-9.3.0/gcc/config/i386/i386-passes.def	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386-passes.def	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Description of target passes for IA-32 
!    Copyright (C) 2016-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Description of target passes for IA-32 
!    Copyright (C) 2016-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386-protos.h gcc-10.1.0/gcc/config/i386/i386-protos.h
*** gcc-9.3.0/gcc/config/i386/i386-protos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386-protos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GCC for IA-32.
!    Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions of target machine for GCC for IA-32.
!    Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** extern void ix86_expand_split_stack_prol
*** 38,43 ****
--- 38,45 ----
  extern void ix86_output_addr_vec_elt (FILE *, int);
  extern void ix86_output_addr_diff_elt (FILE *, int, int);
  
+ extern const char *ix86_output_ssemov (rtx_insn *, rtx *);
+ 
  extern enum calling_abi ix86_cfun_abi (void);
  extern enum calling_abi ix86_function_type_abi (const_tree);
  
*************** extern void ix86_reset_previous_fndecl (
*** 47,52 ****
--- 49,55 ----
  
  extern bool ix86_using_red_zone (void);
  
+ extern unsigned int ix86_regmode_natural_size (machine_mode);
  #ifdef RTX_CODE
  extern int standard_80387_constant_p (rtx);
  extern const char *standard_80387_constant_opcode (rtx);
*************** extern rtx standard_80387_constant_rtx (
*** 54,59 ****
--- 57,63 ----
  extern int standard_sse_constant_p (rtx, machine_mode);
  extern const char *standard_sse_constant_opcode (rtx_insn *, rtx *);
  extern bool ix86_standard_x87sse_constant_load_p (const rtx_insn *, rtx);
+ extern bool ix86_pre_reload_split (void);
  extern bool symbolic_reference_mentioned_p (rtx);
  extern bool extended_reg_mentioned_p (rtx);
  extern bool x86_extended_QIreg_mentioned_p (rtx_insn *);
*************** extern int avx_vpermilp_parallel (rtx pa
*** 65,71 ****
  extern int avx_vperm2f128_parallel (rtx par, machine_mode mode);
  
  extern bool ix86_expand_strlen (rtx, rtx, rtx, rtx);
! extern bool ix86_expand_set_or_movmem (rtx, rtx, rtx, rtx, rtx, rtx,
  				       rtx, rtx, rtx, rtx, bool);
  
  extern bool constant_address_p (rtx);
--- 69,75 ----
  extern int avx_vperm2f128_parallel (rtx par, machine_mode mode);
  
  extern bool ix86_expand_strlen (rtx, rtx, rtx, rtx);
! extern bool ix86_expand_set_or_cpymem (rtx, rtx, rtx, rtx, rtx, rtx,
  				       rtx, rtx, rtx, rtx, bool);
  
  extern bool constant_address_p (rtx);
*************** extern rtx ix86_expand_adjust_ufix_to_sf
*** 121,126 ****
--- 125,132 ----
  extern enum ix86_fpcmp_strategy ix86_fp_comparison_strategy (enum rtx_code);
  extern void ix86_expand_fp_absneg_operator (enum rtx_code, machine_mode,
  					    rtx[]);
+ extern void ix86_split_fp_absneg_operator (enum rtx_code, machine_mode,
+ 					   rtx[]);
  extern void ix86_expand_copysign (rtx []);
  extern void ix86_split_copysign_const (rtx []);
  extern void ix86_split_copysign_var (rtx []);
*************** extern void ix86_expand_lfloorceil (rtx,
*** 190,205 ****
  extern void ix86_expand_rint (rtx, rtx);
  extern void ix86_expand_floorceil (rtx, rtx, bool);
  extern void ix86_expand_floorceildf_32 (rtx, rtx, bool);
- extern void ix86_expand_round_sse4 (rtx, rtx);
- extern void ix86_expand_round (rtx, rtx);
- extern void ix86_expand_rounddf_32 (rtx, rtx);
  extern void ix86_expand_trunc (rtx, rtx);
  extern void ix86_expand_truncdf_32 (rtx, rtx);
  
  extern void ix86_expand_vecop_qihi (enum rtx_code, rtx, rtx, rtx);
  
  extern rtx ix86_split_stack_guard (void);
  
  #ifdef TREE_CODE
  extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int);
  #endif	/* TREE_CODE  */
--- 196,215 ----
  extern void ix86_expand_rint (rtx, rtx);
  extern void ix86_expand_floorceil (rtx, rtx, bool);
  extern void ix86_expand_floorceildf_32 (rtx, rtx, bool);
  extern void ix86_expand_trunc (rtx, rtx);
  extern void ix86_expand_truncdf_32 (rtx, rtx);
+ extern void ix86_expand_round (rtx, rtx);
+ extern void ix86_expand_rounddf_32 (rtx, rtx);
+ extern void ix86_expand_round_sse4 (rtx, rtx);
  
  extern void ix86_expand_vecop_qihi (enum rtx_code, rtx, rtx, rtx);
  
  extern rtx ix86_split_stack_guard (void);
  
+ extern void ix86_move_vector_high_sse_to_mmx (rtx);
+ extern void ix86_split_mmx_pack (rtx[], enum rtx_code);
+ extern void ix86_split_mmx_punpck (rtx[], bool);
+ 
  #ifdef TREE_CODE
  extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int);
  #endif	/* TREE_CODE  */
*************** extern void init_cumulative_args (CUMULA
*** 207,213 ****
  #endif	/* RTX_CODE  */
  
  #ifdef TREE_CODE
! extern int ix86_data_alignment (tree, int, bool);
  extern unsigned int ix86_local_alignment (tree, machine_mode,
  					  unsigned int);
  extern unsigned int ix86_minimum_alignment (tree, machine_mode,
--- 217,223 ----
  #endif	/* RTX_CODE  */
  
  #ifdef TREE_CODE
! extern int ix86_data_alignment (tree, unsigned int, bool);
  extern unsigned int ix86_local_alignment (tree, machine_mode,
  					  unsigned int);
  extern unsigned int ix86_minimum_alignment (tree, machine_mode,
*************** extern unsigned int ix86_minimum_alignme
*** 215,223 ****
  extern tree ix86_handle_shared_attribute (tree *, tree, tree, int, bool *);
  extern tree ix86_handle_selectany_attribute (tree *, tree, tree, int, bool *);
  extern int x86_field_alignment (tree, int);
! extern tree ix86_valid_target_attribute_tree (tree,
  					      struct gcc_options *,
! 					      struct gcc_options *);
  extern unsigned int ix86_get_callcvt (const_tree);
  
  #endif
--- 225,233 ----
  extern tree ix86_handle_shared_attribute (tree *, tree, tree, int, bool *);
  extern tree ix86_handle_selectany_attribute (tree *, tree, tree, int, bool *);
  extern int x86_field_alignment (tree, int);
! extern tree ix86_valid_target_attribute_tree (tree, tree,
  					      struct gcc_options *,
! 					      struct gcc_options *, bool);
  extern unsigned int ix86_get_callcvt (const_tree);
  
  #endif
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386.c gcc-10.1.0/gcc/config/i386/i386.c
*** gcc-9.3.0/gcc/config/i386/i386.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Subroutines used for code generation on IA-32.
!    Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Subroutines used for code generation on IA-32.
!    Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** along with GCC; see the file COPYING3.
*** 59,65 ****
  #include "gimplify.h"
  #include "dwarf2.h"
  #include "tm-constrs.h"
- #include "params.h"
  #include "cselib.h"
  #include "sched-int.h"
  #include "opts.h"
--- 59,64 ----
*************** along with GCC; see the file COPYING3.
*** 91,109 ****
  #include "tree-vector-builder.h"
  #include "debug.h"
  #include "dwarf2out.h"
  
  /* This file should be included last.  */
  #include "target-def.h"
  
- #include "x86-tune-costs.h"
- 
  static rtx legitimize_dllimport_symbol (rtx, bool);
  static rtx legitimize_pe_coff_extern_decl (rtx, bool);
- static rtx legitimize_pe_coff_symbol (rtx, bool);
  static void ix86_print_operand_address_as (FILE *, rtx, addr_space_t, bool);
- static bool ix86_save_reg (unsigned int, bool, bool);
- static bool ix86_function_naked (const_tree);
- static bool ix86_notrack_prefixed_insn_p (rtx);
  static void ix86_emit_restore_reg_using_pop (rtx);
  
  
--- 90,107 ----
  #include "tree-vector-builder.h"
  #include "debug.h"
  #include "dwarf2out.h"
+ #include "i386-options.h"
+ #include "i386-builtins.h"
+ #include "i386-expand.h"
+ #include "i386-features.h"
+ #include "function-abi.h"
  
  /* This file should be included last.  */
  #include "target-def.h"
  
  static rtx legitimize_dllimport_symbol (rtx, bool);
  static rtx legitimize_pe_coff_extern_decl (rtx, bool);
  static void ix86_print_operand_address_as (FILE *, rtx, addr_space_t, bool);
  static void ix86_emit_restore_reg_using_pop (rtx);
  
  
*************** const struct processor_costs *ix86_tune_
*** 126,227 ****
  /* Set by -mtune or -Os.  */
  const struct processor_costs *ix86_cost = NULL;
  
- /* Processor feature/optimization bitmasks.  */
- #define m_386 (HOST_WIDE_INT_1U<<PROCESSOR_I386)
- #define m_486 (HOST_WIDE_INT_1U<<PROCESSOR_I486)
- #define m_PENT (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUM)
- #define m_LAKEMONT (HOST_WIDE_INT_1U<<PROCESSOR_LAKEMONT)
- #define m_PPRO (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUMPRO)
- #define m_PENT4 (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUM4)
- #define m_NOCONA (HOST_WIDE_INT_1U<<PROCESSOR_NOCONA)
- #define m_P4_NOCONA (m_PENT4 | m_NOCONA)
- #define m_CORE2 (HOST_WIDE_INT_1U<<PROCESSOR_CORE2)
- #define m_NEHALEM (HOST_WIDE_INT_1U<<PROCESSOR_NEHALEM)
- #define m_SANDYBRIDGE (HOST_WIDE_INT_1U<<PROCESSOR_SANDYBRIDGE)
- #define m_HASWELL (HOST_WIDE_INT_1U<<PROCESSOR_HASWELL)
- #define m_BONNELL (HOST_WIDE_INT_1U<<PROCESSOR_BONNELL)
- #define m_SILVERMONT (HOST_WIDE_INT_1U<<PROCESSOR_SILVERMONT)
- #define m_KNL (HOST_WIDE_INT_1U<<PROCESSOR_KNL)
- #define m_KNM (HOST_WIDE_INT_1U<<PROCESSOR_KNM)
- #define m_SKYLAKE (HOST_WIDE_INT_1U<<PROCESSOR_SKYLAKE)
- #define m_SKYLAKE_AVX512 (HOST_WIDE_INT_1U<<PROCESSOR_SKYLAKE_AVX512)
- #define m_CANNONLAKE (HOST_WIDE_INT_1U<<PROCESSOR_CANNONLAKE)
- #define m_ICELAKE_CLIENT (HOST_WIDE_INT_1U<<PROCESSOR_ICELAKE_CLIENT)
- #define m_ICELAKE_SERVER (HOST_WIDE_INT_1U<<PROCESSOR_ICELAKE_SERVER)
- #define m_CASCADELAKE (HOST_WIDE_INT_1U<<PROCESSOR_CASCADELAKE)
- #define m_CORE_AVX512 (m_SKYLAKE_AVX512 | m_CANNONLAKE \
- 		       | m_ICELAKE_CLIENT | m_ICELAKE_SERVER | m_CASCADELAKE)
- #define m_CORE_AVX2 (m_HASWELL | m_SKYLAKE | m_CORE_AVX512)
- #define m_CORE_ALL (m_CORE2 | m_NEHALEM  | m_SANDYBRIDGE | m_CORE_AVX2)
- #define m_GOLDMONT (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT)
- #define m_GOLDMONT_PLUS (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT_PLUS)
- #define m_TREMONT (HOST_WIDE_INT_1U<<PROCESSOR_TREMONT)
- #define m_INTEL (HOST_WIDE_INT_1U<<PROCESSOR_INTEL)
- 
- #define m_GEODE (HOST_WIDE_INT_1U<<PROCESSOR_GEODE)
- #define m_K6 (HOST_WIDE_INT_1U<<PROCESSOR_K6)
- #define m_K6_GEODE (m_K6 | m_GEODE)
- #define m_K8 (HOST_WIDE_INT_1U<<PROCESSOR_K8)
- #define m_ATHLON (HOST_WIDE_INT_1U<<PROCESSOR_ATHLON)
- #define m_ATHLON_K8 (m_K8 | m_ATHLON)
- #define m_AMDFAM10 (HOST_WIDE_INT_1U<<PROCESSOR_AMDFAM10)
- #define m_BDVER1 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER1)
- #define m_BDVER2 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER2)
- #define m_BDVER3 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER3)
- #define m_BDVER4 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER4)
- #define m_ZNVER1 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER1)
- #define m_ZNVER2 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER2)
- #define m_BTVER1 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER1)
- #define m_BTVER2 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER2)
- #define m_BDVER	(m_BDVER1 | m_BDVER2 | m_BDVER3 | m_BDVER4)
- #define m_BTVER (m_BTVER1 | m_BTVER2)
- #define m_ZNVER	(m_ZNVER1 | m_ZNVER2)
- #define m_AMD_MULTIPLE (m_ATHLON_K8 | m_AMDFAM10 | m_BDVER | m_BTVER \
- 			| m_ZNVER)
- 
- #define m_GENERIC (HOST_WIDE_INT_1U<<PROCESSOR_GENERIC)
- 
- const char* ix86_tune_feature_names[X86_TUNE_LAST] = {
- #undef DEF_TUNE
- #define DEF_TUNE(tune, name, selector) name,
- #include "x86-tune.def"
- #undef DEF_TUNE
- };
- 
- /* Feature tests against the various tunings.  */
- unsigned char ix86_tune_features[X86_TUNE_LAST];
- 
- /* Feature tests against the various tunings used to create ix86_tune_features
-    based on the processor mask.  */
- static unsigned HOST_WIDE_INT initial_ix86_tune_features[X86_TUNE_LAST] = {
- #undef DEF_TUNE
- #define DEF_TUNE(tune, name, selector) selector,
- #include "x86-tune.def"
- #undef DEF_TUNE
- };
- 
- /* Feature tests against the various architecture variations.  */
- unsigned char ix86_arch_features[X86_ARCH_LAST];
- 
- /* Feature tests against the various architecture variations, used to create
-    ix86_arch_features based on the processor mask.  */
- static unsigned HOST_WIDE_INT initial_ix86_arch_features[X86_ARCH_LAST] = {
-   /* X86_ARCH_CMOV: Conditional move was added for pentiumpro.  */
-   ~(m_386 | m_486 | m_PENT | m_LAKEMONT | m_K6),
- 
-   /* X86_ARCH_CMPXCHG: Compare and exchange was added for 80486.  */
-   ~m_386,
- 
-   /* X86_ARCH_CMPXCHG8B: Compare and exchange 8 bytes was added for pentium. */
-   ~(m_386 | m_486),
- 
-   /* X86_ARCH_XADD: Exchange and add was added for 80486.  */
-   ~m_386,
- 
-   /* X86_ARCH_BSWAP: Byteswap was added for 80486.  */
-   ~m_386,
- };
- 
  /* In case the average insn count for single function invocation is
     lower than this constant, emit fast (but longer) prologue and
     epilogue code.  */
--- 124,129 ----
*************** static int const x86_64_int_return_regis
*** 426,725 ****
    AX_REG, DX_REG, DI_REG, SI_REG
  };
  
- /* Additional registers that are clobbered by SYSV calls.  */
- 
- #define NUM_X86_64_MS_CLOBBERED_REGS 12
- static int const x86_64_ms_sysv_extra_clobbered_registers
- 		 [NUM_X86_64_MS_CLOBBERED_REGS] =
- {
-   SI_REG, DI_REG,
-   XMM6_REG, XMM7_REG,
-   XMM8_REG, XMM9_REG, XMM10_REG, XMM11_REG,
-   XMM12_REG, XMM13_REG, XMM14_REG, XMM15_REG
- };
- 
- enum xlogue_stub {
-   XLOGUE_STUB_SAVE,
-   XLOGUE_STUB_RESTORE,
-   XLOGUE_STUB_RESTORE_TAIL,
-   XLOGUE_STUB_SAVE_HFP,
-   XLOGUE_STUB_RESTORE_HFP,
-   XLOGUE_STUB_RESTORE_HFP_TAIL,
- 
-   XLOGUE_STUB_COUNT
- };
- 
- enum xlogue_stub_sets {
-   XLOGUE_SET_ALIGNED,
-   XLOGUE_SET_ALIGNED_PLUS_8,
-   XLOGUE_SET_HFP_ALIGNED_OR_REALIGN,
-   XLOGUE_SET_HFP_ALIGNED_PLUS_8,
- 
-   XLOGUE_SET_COUNT
- };
- 
- /* Register save/restore layout used by out-of-line stubs.  */
- class xlogue_layout {
- public:
-   struct reginfo
-   {
-     unsigned regno;
-     HOST_WIDE_INT offset;	/* Offset used by stub base pointer (rax or
- 				   rsi) to where each register is stored.  */
-   };
- 
-   unsigned get_nregs () const			{return m_nregs;}
-   HOST_WIDE_INT get_stack_align_off_in () const	{return m_stack_align_off_in;}
- 
-   const reginfo &get_reginfo (unsigned reg) const
-   {
-     gcc_assert (reg < m_nregs);
-     return m_regs[reg];
-   }
- 
-   static const char *get_stub_name (enum xlogue_stub stub,
- 				    unsigned n_extra_args);
- 
-   /* Returns an rtx for the stub's symbol based upon
-        1.) the specified stub (save, restore or restore_ret) and
-        2.) the value of cfun->machine->call_ms2sysv_extra_regs and
-        3.) rather or not stack alignment is being performed.  */
-   static rtx get_stub_rtx (enum xlogue_stub stub);
- 
-   /* Returns the amount of stack space (including padding) that the stub
-      needs to store registers based upon data in the machine_function.  */
-   HOST_WIDE_INT get_stack_space_used () const
-   {
-     const struct machine_function *m = cfun->machine;
-     unsigned last_reg = m->call_ms2sysv_extra_regs + MIN_REGS - 1;
- 
-     gcc_assert (m->call_ms2sysv_extra_regs <= MAX_EXTRA_REGS);
-     return m_regs[last_reg].offset + STUB_INDEX_OFFSET;
-   }
- 
-   /* Returns the offset for the base pointer used by the stub.  */
-   HOST_WIDE_INT get_stub_ptr_offset () const
-   {
-     return STUB_INDEX_OFFSET + m_stack_align_off_in;
-   }
- 
-   static const struct xlogue_layout &get_instance ();
-   static unsigned count_stub_managed_regs ();
-   static bool is_stub_managed_reg (unsigned regno, unsigned count);
- 
-   static const HOST_WIDE_INT STUB_INDEX_OFFSET = 0x70;
-   static const unsigned MIN_REGS = NUM_X86_64_MS_CLOBBERED_REGS;
-   static const unsigned MAX_REGS = 18;
-   static const unsigned MAX_EXTRA_REGS = MAX_REGS - MIN_REGS;
-   static const unsigned VARIANT_COUNT = MAX_EXTRA_REGS + 1;
-   static const unsigned STUB_NAME_MAX_LEN = 20;
-   static const char * const STUB_BASE_NAMES[XLOGUE_STUB_COUNT];
-   static const unsigned REG_ORDER[MAX_REGS];
-   static const unsigned REG_ORDER_REALIGN[MAX_REGS];
- 
- private:
-   xlogue_layout ();
-   xlogue_layout (HOST_WIDE_INT stack_align_off_in, bool hfp);
-   xlogue_layout (const xlogue_layout &);
- 
-   /* True if hard frame pointer is used.  */
-   bool m_hfp;
- 
-   /* Max number of register this layout manages.  */
-   unsigned m_nregs;
- 
-   /* Incoming offset from 16-byte alignment.  */
-   HOST_WIDE_INT m_stack_align_off_in;
- 
-   /* Register order and offsets.  */
-   struct reginfo m_regs[MAX_REGS];
- 
-   /* Lazy-inited cache of symbol names for stubs.  */
-   static char s_stub_names[2][XLOGUE_STUB_COUNT][VARIANT_COUNT]
- 			  [STUB_NAME_MAX_LEN];
- 
-   static const xlogue_layout s_instances[XLOGUE_SET_COUNT];
- };
- 
- const char * const xlogue_layout::STUB_BASE_NAMES[XLOGUE_STUB_COUNT] = {
-   "savms64",
-   "resms64",
-   "resms64x",
-   "savms64f",
-   "resms64f",
-   "resms64fx"
- };
- 
- const unsigned xlogue_layout::REG_ORDER[xlogue_layout::MAX_REGS] = {
- /* The below offset values are where each register is stored for the layout
-    relative to incoming stack pointer.  The value of each m_regs[].offset will
-    be relative to the incoming base pointer (rax or rsi) used by the stub.
- 
-     s_instances:   0		1		2		3
-     Offset:					realigned or	aligned + 8
-     Register	   aligned	aligned + 8	aligned w/HFP	w/HFP	*/
-     XMM15_REG,	/* 0x10		0x18		0x10		0x18	*/
-     XMM14_REG,	/* 0x20		0x28		0x20		0x28	*/
-     XMM13_REG,	/* 0x30		0x38		0x30		0x38	*/
-     XMM12_REG,	/* 0x40		0x48		0x40		0x48	*/
-     XMM11_REG,	/* 0x50		0x58		0x50		0x58	*/
-     XMM10_REG,	/* 0x60		0x68		0x60		0x68	*/
-     XMM9_REG,	/* 0x70		0x78		0x70		0x78	*/
-     XMM8_REG,	/* 0x80		0x88		0x80		0x88	*/
-     XMM7_REG,	/* 0x90		0x98		0x90		0x98	*/
-     XMM6_REG,	/* 0xa0		0xa8		0xa0		0xa8	*/
-     SI_REG,	/* 0xa8		0xb0		0xa8		0xb0	*/
-     DI_REG,	/* 0xb0		0xb8		0xb0		0xb8	*/
-     BX_REG,	/* 0xb8		0xc0		0xb8		0xc0	*/
-     BP_REG,	/* 0xc0		0xc8		N/A		N/A	*/
-     R12_REG,	/* 0xc8		0xd0		0xc0		0xc8	*/
-     R13_REG,	/* 0xd0		0xd8		0xc8		0xd0	*/
-     R14_REG,	/* 0xd8		0xe0		0xd0		0xd8	*/
-     R15_REG,	/* 0xe0		0xe8		0xd8		0xe0	*/
- };
- 
- /* Instantiate static const values.  */
- const HOST_WIDE_INT xlogue_layout::STUB_INDEX_OFFSET;
- const unsigned xlogue_layout::MIN_REGS;
- const unsigned xlogue_layout::MAX_REGS;
- const unsigned xlogue_layout::MAX_EXTRA_REGS;
- const unsigned xlogue_layout::VARIANT_COUNT;
- const unsigned xlogue_layout::STUB_NAME_MAX_LEN;
- 
- /* Initialize xlogue_layout::s_stub_names to zero.  */
- char xlogue_layout::s_stub_names[2][XLOGUE_STUB_COUNT][VARIANT_COUNT]
- 				[STUB_NAME_MAX_LEN];
- 
- /* Instantiates all xlogue_layout instances.  */
- const xlogue_layout xlogue_layout::s_instances[XLOGUE_SET_COUNT] = {
-   xlogue_layout (0, false),
-   xlogue_layout (8, false),
-   xlogue_layout (0, true),
-   xlogue_layout (8, true)
- };
- 
- /* Return an appropriate const instance of xlogue_layout based upon values
-    in cfun->machine and crtl.  */
- const struct xlogue_layout &
- xlogue_layout::get_instance ()
- {
-   enum xlogue_stub_sets stub_set;
-   bool aligned_plus_8 = cfun->machine->call_ms2sysv_pad_in;
- 
-   if (stack_realign_fp)
-     stub_set = XLOGUE_SET_HFP_ALIGNED_OR_REALIGN;
-   else if (frame_pointer_needed)
-     stub_set = aligned_plus_8
- 	      ? XLOGUE_SET_HFP_ALIGNED_PLUS_8
- 	      : XLOGUE_SET_HFP_ALIGNED_OR_REALIGN;
-   else
-     stub_set = aligned_plus_8 ? XLOGUE_SET_ALIGNED_PLUS_8 : XLOGUE_SET_ALIGNED;
- 
-   return s_instances[stub_set];
- }
- 
- /* Determine how many clobbered registers can be saved by the stub.
-    Returns the count of registers the stub will save and restore.  */
- unsigned
- xlogue_layout::count_stub_managed_regs ()
- {
-   bool hfp = frame_pointer_needed || stack_realign_fp;
-   unsigned i, count;
-   unsigned regno;
- 
-   for (count = i = MIN_REGS; i < MAX_REGS; ++i)
-     {
-       regno = REG_ORDER[i];
-       if (regno == BP_REG && hfp)
- 	continue;
-       if (!ix86_save_reg (regno, false, false))
- 	break;
-       ++count;
-     }
-   return count;
- }
- 
- /* Determine if register REGNO is a stub managed register given the
-    total COUNT of stub managed registers.  */
- bool
- xlogue_layout::is_stub_managed_reg (unsigned regno, unsigned count)
- {
-   bool hfp = frame_pointer_needed || stack_realign_fp;
-   unsigned i;
- 
-   for (i = 0; i < count; ++i)
-     {
-       gcc_assert (i < MAX_REGS);
-       if (REG_ORDER[i] == BP_REG && hfp)
- 	++count;
-       else if (REG_ORDER[i] == regno)
- 	return true;
-     }
-   return false;
- }
- 
- /* Constructor for xlogue_layout.  */
- xlogue_layout::xlogue_layout (HOST_WIDE_INT stack_align_off_in, bool hfp)
-   : m_hfp (hfp) , m_nregs (hfp ? 17 : 18),
-     m_stack_align_off_in (stack_align_off_in)
- {
-   HOST_WIDE_INT offset = stack_align_off_in;
-   unsigned i, j;
- 
-   for (i = j = 0; i < MAX_REGS; ++i)
-     {
-       unsigned regno = REG_ORDER[i];
- 
-       if (regno == BP_REG && hfp)
- 	continue;
-       if (SSE_REGNO_P (regno))
- 	{
- 	  offset += 16;
- 	  /* Verify that SSE regs are always aligned.  */
- 	  gcc_assert (!((stack_align_off_in + offset) & 15));
- 	}
-       else
- 	offset += 8;
- 
-       m_regs[j].regno    = regno;
-       m_regs[j++].offset = offset - STUB_INDEX_OFFSET;
-     }
-   gcc_assert (j == m_nregs);
- }
- 
- const char *
- xlogue_layout::get_stub_name (enum xlogue_stub stub,
- 			      unsigned n_extra_regs)
- {
-   const int have_avx = TARGET_AVX;
-   char *name = s_stub_names[!!have_avx][stub][n_extra_regs];
- 
-   /* Lazy init */
-   if (!*name)
-     {
-       int res = snprintf (name, STUB_NAME_MAX_LEN, "__%s_%s_%u",
- 			  (have_avx ? "avx" : "sse"),
- 			  STUB_BASE_NAMES[stub],
- 			  MIN_REGS + n_extra_regs);
-       gcc_checking_assert (res < (int)STUB_NAME_MAX_LEN);
-     }
- 
-   return name;
- }
- 
- /* Return rtx of a symbol ref for the entry point (based upon
-    cfun->machine->call_ms2sysv_extra_regs) of the specified stub.  */
- rtx
- xlogue_layout::get_stub_rtx (enum xlogue_stub stub)
- {
-   const unsigned n_extra_regs = cfun->machine->call_ms2sysv_extra_regs;
-   gcc_checking_assert (n_extra_regs <= MAX_EXTRA_REGS);
-   gcc_assert (stub < XLOGUE_STUB_COUNT);
-   gcc_assert (crtl->stack_realign_finalized);
- 
-   return gen_rtx_SYMBOL_REF (Pmode, get_stub_name (stub, n_extra_regs));
- }
- 
  /* Define the structure for the machine field in struct function.  */
  
  struct GTY(()) stack_local_entry {
--- 328,333 ----
*************** enum processor_type ix86_arch;
*** 741,781 ****
  /* True if processor has SSE prefetch instruction.  */
  unsigned char x86_prefetch_sse;
  
- /* -mstackrealign option */
- static const char ix86_force_align_arg_pointer_string[]
-   = "force_align_arg_pointer";
- 
- static rtx (*ix86_gen_leave) (void);
- static rtx (*ix86_gen_add3) (rtx, rtx, rtx);
- static rtx (*ix86_gen_sub3) (rtx, rtx, rtx);
- static rtx (*ix86_gen_sub3_carry) (rtx, rtx, rtx, rtx, rtx);
- static rtx (*ix86_gen_one_cmpl2) (rtx, rtx);
- static rtx (*ix86_gen_monitor) (rtx, rtx, rtx);
- static rtx (*ix86_gen_monitorx) (rtx, rtx, rtx);
- static rtx (*ix86_gen_clzero) (rtx);
- static rtx (*ix86_gen_andsp) (rtx, rtx, rtx);
- static rtx (*ix86_gen_allocate_stack_worker) (rtx, rtx);
- static rtx (*ix86_gen_adjust_stack_and_probe) (rtx, rtx, rtx);
- static rtx (*ix86_gen_probe_stack_range) (rtx, rtx, rtx);
- static rtx (*ix86_gen_tls_global_dynamic_64) (rtx, rtx, rtx);
- static rtx (*ix86_gen_tls_local_dynamic_base_64) (rtx, rtx);
- 
  /* Preferred alignment for stack boundary in bits.  */
  unsigned int ix86_preferred_stack_boundary;
  
  /* Alignment for incoming stack boundary in bits specified at
     command line.  */
! static unsigned int ix86_user_incoming_stack_boundary;
  
  /* Default alignment for incoming stack boundary in bits.  */
! static unsigned int ix86_default_incoming_stack_boundary;
  
  /* Alignment for incoming stack boundary in bits.  */
  unsigned int ix86_incoming_stack_boundary;
  
  /* Calling abi specific va_list type nodes.  */
! static GTY(()) tree sysv_va_list_type_node;
! static GTY(()) tree ms_va_list_type_node;
  
  /* Prefix built by ASM_GENERATE_INTERNAL_LABEL.  */
  char internal_label_prefix[16];
--- 349,370 ----
  /* True if processor has SSE prefetch instruction.  */
  unsigned char x86_prefetch_sse;
  
  /* Preferred alignment for stack boundary in bits.  */
  unsigned int ix86_preferred_stack_boundary;
  
  /* Alignment for incoming stack boundary in bits specified at
     command line.  */
! unsigned int ix86_user_incoming_stack_boundary;
  
  /* Default alignment for incoming stack boundary in bits.  */
! unsigned int ix86_default_incoming_stack_boundary;
  
  /* Alignment for incoming stack boundary in bits.  */
  unsigned int ix86_incoming_stack_boundary;
  
  /* Calling abi specific va_list type nodes.  */
! tree sysv_va_list_type_node;
! tree ms_va_list_type_node;
  
  /* Prefix built by ASM_GENERATE_INTERNAL_LABEL.  */
  char internal_label_prefix[16];
*************** static REAL_VALUE_TYPE ext_80387_constan
*** 813,819 ****
  static bool ext_80387_constants_init;
  
  
- static struct machine_function * ix86_init_machine_status (void);
  static rtx ix86_function_value (const_tree, const_tree, bool);
  static bool ix86_function_value_regno_p (const unsigned int);
  static unsigned int ix86_function_arg_boundary (machine_mode,
--- 402,407 ----
*************** static unsigned int ix86_function_arg_bo
*** 821,2907 ****
  static rtx ix86_static_chain (const_tree, bool);
  static int ix86_function_regparm (const_tree, const_tree);
  static void ix86_compute_frame_layout (void);
- static bool ix86_expand_vector_init_one_nonzero (bool, machine_mode,
- 						 rtx, rtx, int);
- static void ix86_add_new_builtins (HOST_WIDE_INT, HOST_WIDE_INT);
  static tree ix86_canonical_va_list_type (tree);
- static void predict_jump (int);
  static unsigned int split_stack_prologue_scratch_regno (void);
  static bool i386_asm_output_addr_const_extra (FILE *, rtx);
  
- enum ix86_function_specific_strings
- {
-   IX86_FUNCTION_SPECIFIC_ARCH,
-   IX86_FUNCTION_SPECIFIC_TUNE,
-   IX86_FUNCTION_SPECIFIC_MAX
- };
- 
- static char *ix86_target_string (HOST_WIDE_INT, HOST_WIDE_INT, int, int,
- 				 const char *, const char *, enum fpmath_unit,
- 				 bool, bool);
- static void ix86_function_specific_save (struct cl_target_option *,
- 					 struct gcc_options *opts);
- static void ix86_function_specific_restore (struct gcc_options *opts,
- 					    struct cl_target_option *);
- static void ix86_function_specific_post_stream_in (struct cl_target_option *);
- static void ix86_function_specific_print (FILE *, int,
- 					  struct cl_target_option *);
- static bool ix86_valid_target_attribute_p (tree, tree, tree, int);
- static bool ix86_valid_target_attribute_inner_p (tree, char *[],
- 						 struct gcc_options *,
- 						 struct gcc_options *,
- 						 struct gcc_options *);
  static bool ix86_can_inline_p (tree, tree);
- static void ix86_set_current_function (tree);
  static unsigned int ix86_minimum_incoming_stack_boundary (bool);
  
- static enum calling_abi ix86_function_abi (const_tree);
- 
  
- #ifndef SUBTARGET32_DEFAULT_CPU
- #define SUBTARGET32_DEFAULT_CPU "i386"
- #endif
- 
  /* Whether -mtune= or -march= were specified */
! static int ix86_tune_defaulted;
! static int ix86_arch_specified;
! 
! /* Vectorization library interface and handlers.  */
! static tree (*ix86_veclib_handler) (combined_fn, tree, tree);
! 
! static tree ix86_veclibabi_svml (combined_fn, tree, tree);
! static tree ix86_veclibabi_acml (combined_fn, tree, tree);
! 
! /* This table must be in sync with enum processor_type in i386.h.  */ 
! static const struct processor_costs *processor_cost_table[] =
! {
!   &generic_cost,
!   &i386_cost,
!   &i486_cost,
!   &pentium_cost,
!   &lakemont_cost,
!   &pentiumpro_cost,
!   &pentium4_cost,
!   &nocona_cost,
!   &core_cost,
!   &core_cost,
!   &core_cost,
!   &core_cost,
!   &atom_cost,
!   &slm_cost,
!   &slm_cost,
!   &slm_cost,
!   &slm_cost,
!   &slm_cost,
!   &slm_cost,
!   &skylake_cost,
!   &skylake_cost,
!   &skylake_cost,
!   &skylake_cost,
!   &skylake_cost,
!   &skylake_cost,
!   &intel_cost,
!   &geode_cost,
!   &k6_cost,
!   &athlon_cost,
!   &k8_cost,
!   &amdfam10_cost,
!   &bdver_cost,
!   &bdver_cost,
!   &bdver_cost,
!   &bdver_cost,
!   &btver1_cost,
!   &btver2_cost,
!   &znver1_cost,
!   &znver2_cost
! };
! 
! /* Guarantee that the array is aligned with enum processor_type.  */
! STATIC_ASSERT (ARRAY_SIZE (processor_cost_table) == PROCESSOR_max);
  
- static unsigned int
- rest_of_handle_insert_vzeroupper (void)
- {
-   int i;
- 
-   /* vzeroupper instructions are inserted immediately after reload to
-      account for possible spills from 256bit or 512bit registers.  The pass
-      reuses mode switching infrastructure by re-running mode insertion
-      pass, so disable entities that have already been processed.  */
-   for (i = 0; i < MAX_386_ENTITIES; i++)
-     ix86_optimize_mode_switching[i] = 0;
- 
-   ix86_optimize_mode_switching[AVX_U128] = 1;
- 
-   /* Call optimize_mode_switching.  */
-   g->get_passes ()->execute_pass_mode_switching ();
-   return 0;
- }
- 
- /* Return 1 if INSN uses or defines a hard register.
-    Hard register uses in a memory address are ignored.
-    Clobbers and flags definitions are ignored.  */
- 
- static bool
- has_non_address_hard_reg (rtx_insn *insn)
- {
-   df_ref ref;
-   FOR_EACH_INSN_DEF (ref, insn)
-     if (HARD_REGISTER_P (DF_REF_REAL_REG (ref))
- 	&& !DF_REF_FLAGS_IS_SET (ref, DF_REF_MUST_CLOBBER)
- 	&& DF_REF_REGNO (ref) != FLAGS_REG)
-       return true;
- 
-   FOR_EACH_INSN_USE (ref, insn)
-     if (!DF_REF_REG_MEM_P (ref) && HARD_REGISTER_P (DF_REF_REAL_REG (ref)))
-       return true;
- 
-   return false;
- }
- 
- /* Check if comparison INSN may be transformed
-    into vector comparison.  Currently we transform
-    zero checks only which look like:
- 
-    (set (reg:CCZ 17 flags)
-         (compare:CCZ (ior:SI (subreg:SI (reg:DI x) 4)
-                              (subreg:SI (reg:DI x) 0))
- 		     (const_int 0 [0])))  */
- 
- static bool
- convertible_comparison_p (rtx_insn *insn)
- {
-   if (!TARGET_SSE4_1)
-     return false;
- 
-   rtx def_set = single_set (insn);
- 
-   gcc_assert (def_set);
- 
-   rtx src = SET_SRC (def_set);
-   rtx dst = SET_DEST (def_set);
- 
-   gcc_assert (GET_CODE (src) == COMPARE);
- 
-   if (GET_CODE (dst) != REG
-       || REGNO (dst) != FLAGS_REG
-       || GET_MODE (dst) != CCZmode)
-     return false;
- 
-   rtx op1 = XEXP (src, 0);
-   rtx op2 = XEXP (src, 1);
- 
-   if (op2 != CONST0_RTX (GET_MODE (op2)))
-     return false;
- 
-   if (GET_CODE (op1) != IOR)
-     return false;
- 
-   op2 = XEXP (op1, 1);
-   op1 = XEXP (op1, 0);
- 
-   if (!SUBREG_P (op1)
-       || !SUBREG_P (op2)
-       || GET_MODE (op1) != SImode
-       || GET_MODE (op2) != SImode
-       || ((SUBREG_BYTE (op1) != 0
- 	   || SUBREG_BYTE (op2) != GET_MODE_SIZE (SImode))
- 	  && (SUBREG_BYTE (op2) != 0
- 	      || SUBREG_BYTE (op1) != GET_MODE_SIZE (SImode))))
-     return false;
- 
-   op1 = SUBREG_REG (op1);
-   op2 = SUBREG_REG (op2);
- 
-   if (op1 != op2
-       || !REG_P (op1)
-       || GET_MODE (op1) != DImode)
-     return false;
- 
-   return true;
- }
- 
- /* The DImode version of scalar_to_vector_candidate_p.  */
- 
- static bool
- dimode_scalar_to_vector_candidate_p (rtx_insn *insn)
- {
-   rtx def_set = single_set (insn);
- 
-   if (!def_set)
-     return false;
- 
-   if (has_non_address_hard_reg (insn))
-     return false;
- 
-   rtx src = SET_SRC (def_set);
-   rtx dst = SET_DEST (def_set);
- 
-   if (GET_CODE (src) == COMPARE)
-     return convertible_comparison_p (insn);
- 
-   /* We are interested in DImode promotion only.  */
-   if ((GET_MODE (src) != DImode
-        && !CONST_INT_P (src))
-       || GET_MODE (dst) != DImode)
-     return false;
- 
-   if (!REG_P (dst) && !MEM_P (dst))
-     return false;
- 
-   switch (GET_CODE (src))
-     {
-     case ASHIFTRT:
-       if (!TARGET_AVX512VL)
- 	return false;
-       /* FALLTHRU */
- 
-     case ASHIFT:
-     case LSHIFTRT:
-       if (!CONST_INT_P (XEXP (src, 1))
- 	  || !IN_RANGE (INTVAL (XEXP (src, 1)), 0, 63))
- 	return false;
-       break;
- 
-     case PLUS:
-     case MINUS:
-     case IOR:
-     case XOR:
-     case AND:
-       if (!REG_P (XEXP (src, 1))
- 	  && !MEM_P (XEXP (src, 1))
- 	  && !CONST_INT_P (XEXP (src, 1)))
- 	return false;
- 
-       if (GET_MODE (XEXP (src, 1)) != DImode
- 	  && !CONST_INT_P (XEXP (src, 1)))
- 	return false;
-       break;
- 
-     case NEG:
-     case NOT:
-       break;
- 
-     case REG:
-       return true;
- 
-     case MEM:
-     case CONST_INT:
-       return REG_P (dst);
- 
-     default:
-       return false;
-     }
- 
-   if (!REG_P (XEXP (src, 0))
-       && !MEM_P (XEXP (src, 0))
-       && !CONST_INT_P (XEXP (src, 0))
-       /* Check for andnot case.  */
-       && (GET_CODE (src) != AND
- 	  || GET_CODE (XEXP (src, 0)) != NOT
- 	  || !REG_P (XEXP (XEXP (src, 0), 0))))
-       return false;
- 
-   if (GET_MODE (XEXP (src, 0)) != DImode
-       && !CONST_INT_P (XEXP (src, 0)))
-     return false;
- 
-   return true;
- }
- 
- /* The TImode version of scalar_to_vector_candidate_p.  */
- 
- static bool
- timode_scalar_to_vector_candidate_p (rtx_insn *insn)
- {
-   rtx def_set = single_set (insn);
- 
-   if (!def_set)
-     return false;
- 
-   if (has_non_address_hard_reg (insn))
-     return false;
- 
-   rtx src = SET_SRC (def_set);
-   rtx dst = SET_DEST (def_set);
- 
-   /* Only TImode load and store are allowed.  */
-   if (GET_MODE (dst) != TImode)
-     return false;
- 
-   if (MEM_P (dst))
-     {
-       /* Check for store.  Memory must be aligned or unaligned store
- 	 is optimal.  Only support store from register, standard SSE
- 	 constant or CONST_WIDE_INT generated from piecewise store.
- 
- 	 ??? Verify performance impact before enabling CONST_INT for
- 	 __int128 store.  */
-       if (misaligned_operand (dst, TImode)
- 	  && !TARGET_SSE_UNALIGNED_STORE_OPTIMAL)
- 	return false;
- 
-       switch (GET_CODE (src))
- 	{
- 	default:
- 	  return false;
- 
- 	case REG:
- 	case CONST_WIDE_INT:
- 	  return true;
- 
- 	case CONST_INT:
- 	  return standard_sse_constant_p (src, TImode);
- 	}
-     }
-   else if (MEM_P (src))
-     {
-       /* Check for load.  Memory must be aligned or unaligned load is
- 	 optimal.  */
-       return (REG_P (dst)
- 	      && (!misaligned_operand (src, TImode)
- 		  || TARGET_SSE_UNALIGNED_LOAD_OPTIMAL));
-     }
- 
-   return false;
- }
- 
- /* Return 1 if INSN may be converted into vector
-    instruction.  */
- 
- static bool
- scalar_to_vector_candidate_p (rtx_insn *insn)
- {
-   if (TARGET_64BIT)
-     return timode_scalar_to_vector_candidate_p (insn);
-   else
-     return dimode_scalar_to_vector_candidate_p (insn);
- }
- 
- /* The DImode version of remove_non_convertible_regs.  */
- 
- static void
- dimode_remove_non_convertible_regs (bitmap candidates)
- {
-   bitmap_iterator bi;
-   unsigned id;
-   bitmap regs = BITMAP_ALLOC (NULL);
- 
-   EXECUTE_IF_SET_IN_BITMAP (candidates, 0, id, bi)
-     {
-       rtx def_set = single_set (DF_INSN_UID_GET (id)->insn);
-       rtx reg = SET_DEST (def_set);
- 
-       if (!REG_P (reg)
- 	  || bitmap_bit_p (regs, REGNO (reg))
- 	  || HARD_REGISTER_P (reg))
- 	continue;
- 
-       for (df_ref def = DF_REG_DEF_CHAIN (REGNO (reg));
- 	   def;
- 	   def = DF_REF_NEXT_REG (def))
- 	{
- 	  if (!bitmap_bit_p (candidates, DF_REF_INSN_UID (def)))
- 	    {
- 	      if (dump_file)
- 		fprintf (dump_file,
- 			 "r%d has non convertible definition in insn %d\n",
- 			 REGNO (reg), DF_REF_INSN_UID (def));
- 
- 	      bitmap_set_bit (regs, REGNO (reg));
- 	      break;
- 	    }
- 	}
-     }
- 
-   EXECUTE_IF_SET_IN_BITMAP (regs, 0, id, bi)
-     {
-       for (df_ref def = DF_REG_DEF_CHAIN (id);
- 	   def;
- 	   def = DF_REF_NEXT_REG (def))
- 	if (bitmap_bit_p (candidates, DF_REF_INSN_UID (def)))
- 	  {
- 	    if (dump_file)
- 	      fprintf (dump_file, "Removing insn %d from candidates list\n",
- 		       DF_REF_INSN_UID (def));
- 
- 	    bitmap_clear_bit (candidates, DF_REF_INSN_UID (def));
- 	  }
-     }
- 
-   BITMAP_FREE (regs);
- }
- 
- /* For a register REGNO, scan instructions for its defs and uses.
-    Put REGNO in REGS if a def or use isn't in CANDIDATES.  */
- 
- static void
- timode_check_non_convertible_regs (bitmap candidates, bitmap regs,
- 				   unsigned int regno)
- {
-   for (df_ref def = DF_REG_DEF_CHAIN (regno);
-        def;
-        def = DF_REF_NEXT_REG (def))
-     {
-       if (!bitmap_bit_p (candidates, DF_REF_INSN_UID (def)))
- 	{
- 	  if (dump_file)
- 	    fprintf (dump_file,
- 		     "r%d has non convertible def in insn %d\n",
- 		     regno, DF_REF_INSN_UID (def));
- 
- 	  bitmap_set_bit (regs, regno);
- 	  break;
- 	}
-     }
- 
-   for (df_ref ref = DF_REG_USE_CHAIN (regno);
-        ref;
-        ref = DF_REF_NEXT_REG (ref))
-     {
-       /* Debug instructions are skipped.  */
-       if (NONDEBUG_INSN_P (DF_REF_INSN (ref))
- 	  && !bitmap_bit_p (candidates, DF_REF_INSN_UID (ref)))
- 	{
- 	  if (dump_file)
- 	    fprintf (dump_file,
- 		     "r%d has non convertible use in insn %d\n",
- 		     regno, DF_REF_INSN_UID (ref));
- 
- 	  bitmap_set_bit (regs, regno);
- 	  break;
- 	}
-     }
- }
- 
- /* The TImode version of remove_non_convertible_regs.  */
- 
- static void
- timode_remove_non_convertible_regs (bitmap candidates)
- {
-   bitmap_iterator bi;
-   unsigned id;
-   bitmap regs = BITMAP_ALLOC (NULL);
- 
-   EXECUTE_IF_SET_IN_BITMAP (candidates, 0, id, bi)
-     {
-       rtx def_set = single_set (DF_INSN_UID_GET (id)->insn);
-       rtx dest = SET_DEST (def_set);
-       rtx src = SET_SRC (def_set);
- 
-       if ((!REG_P (dest)
- 	   || bitmap_bit_p (regs, REGNO (dest))
- 	   || HARD_REGISTER_P (dest))
- 	  && (!REG_P (src)
- 	      || bitmap_bit_p (regs, REGNO (src))
- 	      || HARD_REGISTER_P (src)))
- 	continue;
- 
-       if (REG_P (dest))
- 	timode_check_non_convertible_regs (candidates, regs,
- 					   REGNO (dest));
- 
-       if (REG_P (src))
- 	timode_check_non_convertible_regs (candidates, regs,
- 					   REGNO (src));
-     }
- 
-   EXECUTE_IF_SET_IN_BITMAP (regs, 0, id, bi)
-     {
-       for (df_ref def = DF_REG_DEF_CHAIN (id);
- 	   def;
- 	   def = DF_REF_NEXT_REG (def))
- 	if (bitmap_bit_p (candidates, DF_REF_INSN_UID (def)))
- 	  {
- 	    if (dump_file)
- 	      fprintf (dump_file, "Removing insn %d from candidates list\n",
- 		       DF_REF_INSN_UID (def));
- 
- 	    bitmap_clear_bit (candidates, DF_REF_INSN_UID (def));
- 	  }
- 
-       for (df_ref ref = DF_REG_USE_CHAIN (id);
- 	   ref;
- 	   ref = DF_REF_NEXT_REG (ref))
- 	if (bitmap_bit_p (candidates, DF_REF_INSN_UID (ref)))
- 	  {
- 	    if (dump_file)
- 	      fprintf (dump_file, "Removing insn %d from candidates list\n",
- 		       DF_REF_INSN_UID (ref));
- 
- 	    bitmap_clear_bit (candidates, DF_REF_INSN_UID (ref));
- 	  }
-     }
- 
-   BITMAP_FREE (regs);
- }
- 
- /* For a given bitmap of insn UIDs scans all instruction and
-    remove insn from CANDIDATES in case it has both convertible
-    and not convertible definitions.
- 
-    All insns in a bitmap are conversion candidates according to
-    scalar_to_vector_candidate_p.  Currently it implies all insns
-    are single_set.  */
- 
- static void
- remove_non_convertible_regs (bitmap candidates)
- {
-   if (TARGET_64BIT)
-     timode_remove_non_convertible_regs (candidates);
-   else
-     dimode_remove_non_convertible_regs (candidates);
- }
- 
- class scalar_chain
- {
-  public:
-   scalar_chain ();
-   virtual ~scalar_chain ();
- 
-   static unsigned max_id;
- 
-   /* ID of a chain.  */
-   unsigned int chain_id;
-   /* A queue of instructions to be included into a chain.  */
-   bitmap queue;
-   /* Instructions included into a chain.  */
-   bitmap insns;
-   /* All registers defined by a chain.  */
-   bitmap defs;
-   /* Registers used in both vector and sclar modes.  */
-   bitmap defs_conv;
- 
-   void build (bitmap candidates, unsigned insn_uid);
-   virtual int compute_convert_gain () = 0;
-   int convert ();
- 
-  protected:
-   void add_to_queue (unsigned insn_uid);
-   void emit_conversion_insns (rtx insns, rtx_insn *pos);
- 
-  private:
-   void add_insn (bitmap candidates, unsigned insn_uid);
-   void analyze_register_chain (bitmap candidates, df_ref ref);
-   virtual void mark_dual_mode_def (df_ref def) = 0;
-   virtual void convert_insn (rtx_insn *insn) = 0;
-   virtual void convert_registers () = 0;
- };
- 
- class dimode_scalar_chain : public scalar_chain
- {
-  public:
-   int compute_convert_gain ();
-  private:
-   void mark_dual_mode_def (df_ref def);
-   rtx replace_with_subreg (rtx x, rtx reg, rtx subreg);
-   void replace_with_subreg_in_insn (rtx_insn *insn, rtx reg, rtx subreg);
-   void convert_insn (rtx_insn *insn);
-   void convert_op (rtx *op, rtx_insn *insn);
-   void convert_reg (unsigned regno);
-   void make_vector_copies (unsigned regno);
-   void convert_registers ();
-   int vector_const_cost (rtx exp);
- };
- 
- class timode_scalar_chain : public scalar_chain
- {
-  public:
-   /* Convert from TImode to V1TImode is always faster.  */
-   int compute_convert_gain () { return 1; }
- 
-  private:
-   void mark_dual_mode_def (df_ref def);
-   void fix_debug_reg_uses (rtx reg);
-   void convert_insn (rtx_insn *insn);
-   /* We don't convert registers to difference size.  */
-   void convert_registers () {}
- };
- 
- unsigned scalar_chain::max_id = 0;
- 
- /* Initialize new chain.  */
- 
- scalar_chain::scalar_chain ()
- {
-   chain_id = ++max_id;
- 
-    if (dump_file)
-     fprintf (dump_file, "Created a new instruction chain #%d\n", chain_id);
- 
-   bitmap_obstack_initialize (NULL);
-   insns = BITMAP_ALLOC (NULL);
-   defs = BITMAP_ALLOC (NULL);
-   defs_conv = BITMAP_ALLOC (NULL);
-   queue = NULL;
- }
- 
- /* Free chain's data.  */
- 
- scalar_chain::~scalar_chain ()
- {
-   BITMAP_FREE (insns);
-   BITMAP_FREE (defs);
-   BITMAP_FREE (defs_conv);
-   bitmap_obstack_release (NULL);
- }
- 
- /* Add instruction into chains' queue.  */
- 
- void
- scalar_chain::add_to_queue (unsigned insn_uid)
- {
-   if (bitmap_bit_p (insns, insn_uid)
-       || bitmap_bit_p (queue, insn_uid))
-     return;
- 
-   if (dump_file)
-     fprintf (dump_file, "  Adding insn %d into chain's #%d queue\n",
- 	     insn_uid, chain_id);
-   bitmap_set_bit (queue, insn_uid);
- }
- 
- /* For DImode conversion, mark register defined by DEF as requiring
-    conversion.  */
- 
- void
- dimode_scalar_chain::mark_dual_mode_def (df_ref def)
- {
-   gcc_assert (DF_REF_REG_DEF_P (def));
- 
-   if (bitmap_bit_p (defs_conv, DF_REF_REGNO (def)))
-     return;
- 
-   if (dump_file)
-     fprintf (dump_file,
- 	     "  Mark r%d def in insn %d as requiring both modes in chain #%d\n",
- 	     DF_REF_REGNO (def), DF_REF_INSN_UID (def), chain_id);
- 
-   bitmap_set_bit (defs_conv, DF_REF_REGNO (def));
- }
- 
- /* For TImode conversion, it is unused.  */
- 
- void
- timode_scalar_chain::mark_dual_mode_def (df_ref)
- {
-   gcc_unreachable ();
- }
- 
- /* Check REF's chain to add new insns into a queue
-    and find registers requiring conversion.  */
- 
- void
- scalar_chain::analyze_register_chain (bitmap candidates, df_ref ref)
- {
-   df_link *chain;
- 
-   gcc_assert (bitmap_bit_p (insns, DF_REF_INSN_UID (ref))
- 	      || bitmap_bit_p (candidates, DF_REF_INSN_UID (ref)));
-   add_to_queue (DF_REF_INSN_UID (ref));
- 
-   for (chain = DF_REF_CHAIN (ref); chain; chain = chain->next)
-     {
-       unsigned uid = DF_REF_INSN_UID (chain->ref);
- 
-       if (!NONDEBUG_INSN_P (DF_REF_INSN (chain->ref)))
- 	continue;
- 
-       if (!DF_REF_REG_MEM_P (chain->ref))
- 	{
- 	  if (bitmap_bit_p (insns, uid))
- 	    continue;
- 
- 	  if (bitmap_bit_p (candidates, uid))
- 	    {
- 	      add_to_queue (uid);
- 	      continue;
- 	    }
- 	}
- 
-       if (DF_REF_REG_DEF_P (chain->ref))
- 	{
- 	  if (dump_file)
- 	    fprintf (dump_file, "  r%d def in insn %d isn't convertible\n",
- 		     DF_REF_REGNO (chain->ref), uid);
- 	  mark_dual_mode_def (chain->ref);
- 	}
-       else
- 	{
- 	  if (dump_file)
- 	    fprintf (dump_file, "  r%d use in insn %d isn't convertible\n",
- 		     DF_REF_REGNO (chain->ref), uid);
- 	  mark_dual_mode_def (ref);
- 	}
-     }
- }
- 
- /* Add instruction into a chain.  */
- 
- void
- scalar_chain::add_insn (bitmap candidates, unsigned int insn_uid)
- {
-   if (bitmap_bit_p (insns, insn_uid))
-     return;
- 
-   if (dump_file)
-     fprintf (dump_file, "  Adding insn %d to chain #%d\n", insn_uid, chain_id);
- 
-   bitmap_set_bit (insns, insn_uid);
- 
-   rtx_insn *insn = DF_INSN_UID_GET (insn_uid)->insn;
-   rtx def_set = single_set (insn);
-   if (def_set && REG_P (SET_DEST (def_set))
-       && !HARD_REGISTER_P (SET_DEST (def_set)))
-     bitmap_set_bit (defs, REGNO (SET_DEST (def_set)));
- 
-   df_ref ref;
-   df_ref def;
-   for (ref = DF_INSN_UID_DEFS (insn_uid); ref; ref = DF_REF_NEXT_LOC (ref))
-     if (!HARD_REGISTER_P (DF_REF_REG (ref)))
-       for (def = DF_REG_DEF_CHAIN (DF_REF_REGNO (ref));
- 	   def;
- 	   def = DF_REF_NEXT_REG (def))
- 	analyze_register_chain (candidates, def);
-   for (ref = DF_INSN_UID_USES (insn_uid); ref; ref = DF_REF_NEXT_LOC (ref))
-     if (!DF_REF_REG_MEM_P (ref))
-       analyze_register_chain (candidates, ref);
- }
- 
- /* Build new chain starting from insn INSN_UID recursively
-    adding all dependent uses and definitions.  */
- 
- void
- scalar_chain::build (bitmap candidates, unsigned insn_uid)
- {
-   queue = BITMAP_ALLOC (NULL);
-   bitmap_set_bit (queue, insn_uid);
- 
-   if (dump_file)
-     fprintf (dump_file, "Building chain #%d...\n", chain_id);
- 
-   while (!bitmap_empty_p (queue))
-     {
-       insn_uid = bitmap_first_set_bit (queue);
-       bitmap_clear_bit (queue, insn_uid);
-       bitmap_clear_bit (candidates, insn_uid);
-       add_insn (candidates, insn_uid);
-     }
- 
-   if (dump_file)
-     {
-       fprintf (dump_file, "Collected chain #%d...\n", chain_id);
-       fprintf (dump_file, "  insns: ");
-       dump_bitmap (dump_file, insns);
-       if (!bitmap_empty_p (defs_conv))
- 	{
- 	  bitmap_iterator bi;
- 	  unsigned id;
- 	  const char *comma = "";
- 	  fprintf (dump_file, "  defs to convert: ");
- 	  EXECUTE_IF_SET_IN_BITMAP (defs_conv, 0, id, bi)
- 	    {
- 	      fprintf (dump_file, "%sr%d", comma, id);
- 	      comma = ", ";
- 	    }
- 	  fprintf (dump_file, "\n");
- 	}
-     }
- 
-   BITMAP_FREE (queue);
- }
- 
- /* Return a cost of building a vector costant
-    instead of using a scalar one.  */
- 
- int
- dimode_scalar_chain::vector_const_cost (rtx exp)
- {
-   gcc_assert (CONST_INT_P (exp));
- 
-   if (standard_sse_constant_p (exp, V2DImode))
-     return COSTS_N_INSNS (1);
-   return ix86_cost->sse_load[1];
- }
- 
- /* Compute a gain for chain conversion.  */
- 
- int
- dimode_scalar_chain::compute_convert_gain ()
- {
-   bitmap_iterator bi;
-   unsigned insn_uid;
-   int gain = 0;
-   int cost = 0;
- 
-   if (dump_file)
-     fprintf (dump_file, "Computing gain for chain #%d...\n", chain_id);
- 
-   EXECUTE_IF_SET_IN_BITMAP (insns, 0, insn_uid, bi)
-     {
-       rtx_insn *insn = DF_INSN_UID_GET (insn_uid)->insn;
-       rtx def_set = single_set (insn);
-       rtx src = SET_SRC (def_set);
-       rtx dst = SET_DEST (def_set);
- 
-       if (REG_P (src) && REG_P (dst))
- 	gain += COSTS_N_INSNS (2) - ix86_cost->xmm_move;
-       else if (REG_P (src) && MEM_P (dst))
- 	gain += 2 * ix86_cost->int_store[2] - ix86_cost->sse_store[1];
-       else if (MEM_P (src) && REG_P (dst))
- 	gain += 2 * ix86_cost->int_load[2] - ix86_cost->sse_load[1];
-       else if (GET_CODE (src) == ASHIFT
- 	       || GET_CODE (src) == ASHIFTRT
- 	       || GET_CODE (src) == LSHIFTRT)
- 	{
-     	  if (CONST_INT_P (XEXP (src, 0)))
- 	    gain -= vector_const_cost (XEXP (src, 0));
- 
- 	  gain += ix86_cost->shift_const;
- 	  if (INTVAL (XEXP (src, 1)) >= 32)
- 	    gain -= COSTS_N_INSNS (1);
- 	}
-       else if (GET_CODE (src) == PLUS
- 	       || GET_CODE (src) == MINUS
- 	       || GET_CODE (src) == IOR
- 	       || GET_CODE (src) == XOR
- 	       || GET_CODE (src) == AND)
- 	{
- 	  gain += ix86_cost->add;
- 	  /* Additional gain for andnot for targets without BMI.  */
- 	  if (GET_CODE (XEXP (src, 0)) == NOT
- 	      && !TARGET_BMI)
- 	    gain += 2 * ix86_cost->add;
- 
- 	  if (CONST_INT_P (XEXP (src, 0)))
- 	    gain -= vector_const_cost (XEXP (src, 0));
- 	  if (CONST_INT_P (XEXP (src, 1)))
- 	    gain -= vector_const_cost (XEXP (src, 1));
- 	}
-       else if (GET_CODE (src) == NEG
- 	       || GET_CODE (src) == NOT)
- 	gain += ix86_cost->add - COSTS_N_INSNS (1);
-       else if (GET_CODE (src) == COMPARE)
- 	{
- 	  /* Assume comparison cost is the same.  */
- 	}
-       else if (CONST_INT_P (src))
- 	{
- 	  if (REG_P (dst))
- 	    gain += COSTS_N_INSNS (2);
- 	  else if (MEM_P (dst))
- 	    gain += 2 * ix86_cost->int_store[2] - ix86_cost->sse_store[1];
- 	  gain -= vector_const_cost (src);
- 	}
-       else
- 	gcc_unreachable ();
-     }
- 
-   if (dump_file)
-     fprintf (dump_file, "  Instruction conversion gain: %d\n", gain);
- 
-   EXECUTE_IF_SET_IN_BITMAP (defs_conv, 0, insn_uid, bi)
-     cost += DF_REG_DEF_COUNT (insn_uid) * ix86_cost->mmxsse_to_integer;
- 
-   if (dump_file)
-     fprintf (dump_file, "  Registers conversion cost: %d\n", cost);
- 
-   gain -= cost;
- 
-   if (dump_file)
-     fprintf (dump_file, "  Total gain: %d\n", gain);
- 
-   return gain;
- }
- 
- /* Replace REG in X with a V2DI subreg of NEW_REG.  */
- 
- rtx
- dimode_scalar_chain::replace_with_subreg (rtx x, rtx reg, rtx new_reg)
- {
-   if (x == reg)
-     return gen_rtx_SUBREG (V2DImode, new_reg, 0);
- 
-   const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
-   int i, j;
-   for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
-     {
-       if (fmt[i] == 'e')
- 	XEXP (x, i) = replace_with_subreg (XEXP (x, i), reg, new_reg);
-       else if (fmt[i] == 'E')
- 	for (j = XVECLEN (x, i) - 1; j >= 0; j--)
- 	  XVECEXP (x, i, j) = replace_with_subreg (XVECEXP (x, i, j),
- 						   reg, new_reg);
-     }
- 
-   return x;
- }
- 
- /* Replace REG in INSN with a V2DI subreg of NEW_REG.  */
- 
- void
- dimode_scalar_chain::replace_with_subreg_in_insn (rtx_insn *insn,
- 						  rtx reg, rtx new_reg)
- {
-   replace_with_subreg (single_set (insn), reg, new_reg);
- }
- 
- /* Insert generated conversion instruction sequence INSNS
-    after instruction AFTER.  New BB may be required in case
-    instruction has EH region attached.  */
- 
- void
- scalar_chain::emit_conversion_insns (rtx insns, rtx_insn *after)
- {
-   if (!control_flow_insn_p (after))
-     {
-       emit_insn_after (insns, after);
-       return;
-     }
- 
-   basic_block bb = BLOCK_FOR_INSN (after);
-   edge e = find_fallthru_edge (bb->succs);
-   gcc_assert (e);
- 
-   basic_block new_bb = split_edge (e);
-   emit_insn_after (insns, BB_HEAD (new_bb));
- }
- 
- /* Make vector copies for all register REGNO definitions
-    and replace its uses in a chain.  */
- 
- void
- dimode_scalar_chain::make_vector_copies (unsigned regno)
- {
-   rtx reg = regno_reg_rtx[regno];
-   rtx vreg = gen_reg_rtx (DImode);
-   df_ref ref;
- 
-   for (ref = DF_REG_DEF_CHAIN (regno); ref; ref = DF_REF_NEXT_REG (ref))
-     if (!bitmap_bit_p (insns, DF_REF_INSN_UID (ref)))
-       {
- 	start_sequence ();
- 
- 	if (!TARGET_INTER_UNIT_MOVES_TO_VEC)
- 	  {
- 	    rtx tmp = assign_386_stack_local (DImode, SLOT_STV_TEMP);
- 	    emit_move_insn (adjust_address (tmp, SImode, 0),
- 			    gen_rtx_SUBREG (SImode, reg, 0));
- 	    emit_move_insn (adjust_address (tmp, SImode, 4),
- 			    gen_rtx_SUBREG (SImode, reg, 4));
- 	    emit_move_insn (vreg, tmp);
- 	  }
- 	else if (TARGET_SSE4_1)
- 	  {
- 	    emit_insn (gen_sse2_loadld (gen_rtx_SUBREG (V4SImode, vreg, 0),
- 					CONST0_RTX (V4SImode),
- 					gen_rtx_SUBREG (SImode, reg, 0)));
- 	    emit_insn (gen_sse4_1_pinsrd (gen_rtx_SUBREG (V4SImode, vreg, 0),
- 					  gen_rtx_SUBREG (V4SImode, vreg, 0),
- 					  gen_rtx_SUBREG (SImode, reg, 4),
- 					  GEN_INT (2)));
- 	  }
- 	else
- 	  {
- 	    rtx tmp = gen_reg_rtx (DImode);
- 	    emit_insn (gen_sse2_loadld (gen_rtx_SUBREG (V4SImode, vreg, 0),
- 					CONST0_RTX (V4SImode),
- 					gen_rtx_SUBREG (SImode, reg, 0)));
- 	    emit_insn (gen_sse2_loadld (gen_rtx_SUBREG (V4SImode, tmp, 0),
- 					CONST0_RTX (V4SImode),
- 					gen_rtx_SUBREG (SImode, reg, 4)));
- 	    emit_insn (gen_vec_interleave_lowv4si
- 		       (gen_rtx_SUBREG (V4SImode, vreg, 0),
- 			gen_rtx_SUBREG (V4SImode, vreg, 0),
- 			gen_rtx_SUBREG (V4SImode, tmp, 0)));
- 	  }
- 	rtx_insn *seq = get_insns ();
- 	end_sequence ();
- 	rtx_insn *insn = DF_REF_INSN (ref);
- 	emit_conversion_insns (seq, insn);
- 
- 	if (dump_file)
- 	  fprintf (dump_file,
- 		   "  Copied r%d to a vector register r%d for insn %d\n",
- 		   regno, REGNO (vreg), INSN_UID (insn));
-       }
- 
-   for (ref = DF_REG_USE_CHAIN (regno); ref; ref = DF_REF_NEXT_REG (ref))
-     if (bitmap_bit_p (insns, DF_REF_INSN_UID (ref)))
-       {
- 	rtx_insn *insn = DF_REF_INSN (ref);
- 
- 	replace_with_subreg_in_insn (insn, reg, vreg);
- 
- 	if (dump_file)
- 	  fprintf (dump_file, "  Replaced r%d with r%d in insn %d\n",
- 		   regno, REGNO (vreg), INSN_UID (insn));
-       }
- }
- 
- /* Convert all definitions of register REGNO
-    and fix its uses.  Scalar copies may be created
-    in case register is used in not convertible insn.  */
- 
- void
- dimode_scalar_chain::convert_reg (unsigned regno)
- {
-   bool scalar_copy = bitmap_bit_p (defs_conv, regno);
-   rtx reg = regno_reg_rtx[regno];
-   rtx scopy = NULL_RTX;
-   df_ref ref;
-   bitmap conv;
- 
-   conv = BITMAP_ALLOC (NULL);
-   bitmap_copy (conv, insns);
- 
-   if (scalar_copy)
-     scopy = gen_reg_rtx (DImode);
- 
-   for (ref = DF_REG_DEF_CHAIN (regno); ref; ref = DF_REF_NEXT_REG (ref))
-     {
-       rtx_insn *insn = DF_REF_INSN (ref);
-       rtx def_set = single_set (insn);
-       rtx src = SET_SRC (def_set);
-       rtx reg = DF_REF_REG (ref);
- 
-       if (!MEM_P (src))
- 	{
- 	  replace_with_subreg_in_insn (insn, reg, reg);
- 	  bitmap_clear_bit (conv, INSN_UID (insn));
- 	}
- 
-       if (scalar_copy)
- 	{
- 	  start_sequence ();
- 	  if (!TARGET_INTER_UNIT_MOVES_FROM_VEC)
- 	    {
- 	      rtx tmp = assign_386_stack_local (DImode, SLOT_STV_TEMP);
- 	      emit_move_insn (tmp, reg);
- 	      emit_move_insn (gen_rtx_SUBREG (SImode, scopy, 0),
- 			      adjust_address (tmp, SImode, 0));
- 	      emit_move_insn (gen_rtx_SUBREG (SImode, scopy, 4),
- 			      adjust_address (tmp, SImode, 4));
- 	    }
- 	  else if (TARGET_SSE4_1)
- 	    {
- 	      rtx tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, const0_rtx));
- 	      emit_insn
- 		(gen_rtx_SET
- 		 (gen_rtx_SUBREG (SImode, scopy, 0),
- 		  gen_rtx_VEC_SELECT (SImode,
- 				      gen_rtx_SUBREG (V4SImode, reg, 0), tmp)));
- 
- 	      tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, const1_rtx));
- 	      emit_insn
- 		(gen_rtx_SET
- 		 (gen_rtx_SUBREG (SImode, scopy, 4),
- 		  gen_rtx_VEC_SELECT (SImode,
- 				      gen_rtx_SUBREG (V4SImode, reg, 0), tmp)));
- 	    }
- 	  else
- 	    {
- 	      rtx vcopy = gen_reg_rtx (V2DImode);
- 	      emit_move_insn (vcopy, gen_rtx_SUBREG (V2DImode, reg, 0));
- 	      emit_move_insn (gen_rtx_SUBREG (SImode, scopy, 0),
- 			      gen_rtx_SUBREG (SImode, vcopy, 0));
- 	      emit_move_insn (vcopy,
- 			      gen_rtx_LSHIFTRT (V2DImode, vcopy, GEN_INT (32)));
- 	      emit_move_insn (gen_rtx_SUBREG (SImode, scopy, 4),
- 			      gen_rtx_SUBREG (SImode, vcopy, 0));
- 	    }
- 	  rtx_insn *seq = get_insns ();
- 	  end_sequence ();
- 	  emit_conversion_insns (seq, insn);
- 
- 	  if (dump_file)
- 	    fprintf (dump_file,
- 		     "  Copied r%d to a scalar register r%d for insn %d\n",
- 		     regno, REGNO (scopy), INSN_UID (insn));
- 	}
-     }
- 
-   for (ref = DF_REG_USE_CHAIN (regno); ref; ref = DF_REF_NEXT_REG (ref))
-     if (bitmap_bit_p (insns, DF_REF_INSN_UID (ref)))
-       {
- 	if (bitmap_bit_p (conv, DF_REF_INSN_UID (ref)))
- 	  {
- 	    rtx_insn *insn = DF_REF_INSN (ref);
- 
- 	    rtx def_set = single_set (insn);
- 	    gcc_assert (def_set);
- 
- 	    rtx src = SET_SRC (def_set);
- 	    rtx dst = SET_DEST (def_set);
- 
- 	    if (!MEM_P (dst) || !REG_P (src))
- 	      replace_with_subreg_in_insn (insn, reg, reg);
- 
- 	    bitmap_clear_bit (conv, INSN_UID (insn));
- 	  }
-       }
-     /* Skip debug insns and uninitialized uses.  */
-     else if (DF_REF_CHAIN (ref)
- 	     && NONDEBUG_INSN_P (DF_REF_INSN (ref)))
-       {
- 	gcc_assert (scopy);
- 	replace_rtx (DF_REF_INSN (ref), reg, scopy);
- 	df_insn_rescan (DF_REF_INSN (ref));
-       }
- 
-   BITMAP_FREE (conv);
- }
- 
- /* Convert operand OP in INSN.  We should handle
-    memory operands and uninitialized registers.
-    All other register uses are converted during
-    registers conversion.  */
- 
- void
- dimode_scalar_chain::convert_op (rtx *op, rtx_insn *insn)
- {
-   *op = copy_rtx_if_shared (*op);
- 
-   if (GET_CODE (*op) == NOT)
-     {
-       convert_op (&XEXP (*op, 0), insn);
-       PUT_MODE (*op, V2DImode);
-     }
-   else if (MEM_P (*op))
-     {
-       rtx tmp = gen_reg_rtx (DImode);
- 
-       emit_insn_before (gen_move_insn (tmp, *op), insn);
-       *op = gen_rtx_SUBREG (V2DImode, tmp, 0);
- 
-       if (dump_file)
- 	fprintf (dump_file, "  Preloading operand for insn %d into r%d\n",
- 		 INSN_UID (insn), REGNO (tmp));
-     }
-   else if (REG_P (*op))
-     {
-       /* We may have not converted register usage in case
- 	 this register has no definition.  Otherwise it
- 	 should be converted in convert_reg.  */
-       df_ref ref;
-       FOR_EACH_INSN_USE (ref, insn)
- 	if (DF_REF_REGNO (ref) == REGNO (*op))
- 	  {
- 	    gcc_assert (!DF_REF_CHAIN (ref));
- 	    break;
- 	  }
-       *op = gen_rtx_SUBREG (V2DImode, *op, 0);
-     }
-   else if (CONST_INT_P (*op))
-     {
-       rtx vec_cst;
-       rtx tmp = gen_rtx_SUBREG (V2DImode, gen_reg_rtx (DImode), 0);
- 
-       /* Prefer all ones vector in case of -1.  */
-       if (constm1_operand (*op, GET_MODE (*op)))
- 	vec_cst = CONSTM1_RTX (V2DImode);
-       else
- 	vec_cst = gen_rtx_CONST_VECTOR (V2DImode,
- 					gen_rtvec (2, *op, const0_rtx));
- 
-       if (!standard_sse_constant_p (vec_cst, V2DImode))
- 	{
- 	  start_sequence ();
- 	  vec_cst = validize_mem (force_const_mem (V2DImode, vec_cst));
- 	  rtx_insn *seq = get_insns ();
- 	  end_sequence ();
- 	  emit_insn_before (seq, insn);
- 	}
- 
-       emit_insn_before (gen_move_insn (copy_rtx (tmp), vec_cst), insn);
-       *op = tmp;
-     }
-   else
-     {
-       gcc_assert (SUBREG_P (*op));
-       gcc_assert (GET_MODE (*op) == V2DImode);
-     }
- }
- 
- /* Convert INSN to vector mode.  */
- 
- void
- dimode_scalar_chain::convert_insn (rtx_insn *insn)
- {
-   rtx def_set = single_set (insn);
-   rtx src = SET_SRC (def_set);
-   rtx dst = SET_DEST (def_set);
-   rtx subreg;
- 
-   if (MEM_P (dst) && !REG_P (src))
-     {
-       /* There are no scalar integer instructions and therefore
- 	 temporary register usage is required.  */
-       rtx tmp = gen_reg_rtx (DImode);
-       emit_conversion_insns (gen_move_insn (dst, tmp), insn);
-       dst = gen_rtx_SUBREG (V2DImode, tmp, 0);
-     }
- 
-   switch (GET_CODE (src))
-     {
-     case ASHIFT:
-     case ASHIFTRT:
-     case LSHIFTRT:
-       convert_op (&XEXP (src, 0), insn);
-       PUT_MODE (src, V2DImode);
-       break;
- 
-     case PLUS:
-     case MINUS:
-     case IOR:
-     case XOR:
-     case AND:
-       convert_op (&XEXP (src, 0), insn);
-       convert_op (&XEXP (src, 1), insn);
-       PUT_MODE (src, V2DImode);
-       break;
- 
-     case NEG:
-       src = XEXP (src, 0);
-       convert_op (&src, insn);
-       subreg = gen_reg_rtx (V2DImode);
-       emit_insn_before (gen_move_insn (subreg, CONST0_RTX (V2DImode)), insn);
-       src = gen_rtx_MINUS (V2DImode, subreg, src);
-       break;
- 
-     case NOT:
-       src = XEXP (src, 0);
-       convert_op (&src, insn);
-       subreg = gen_reg_rtx (V2DImode);
-       emit_insn_before (gen_move_insn (subreg, CONSTM1_RTX (V2DImode)), insn);
-       src = gen_rtx_XOR (V2DImode, src, subreg);
-       break;
- 
-     case MEM:
-       if (!REG_P (dst))
- 	convert_op (&src, insn);
-       break;
- 
-     case REG:
-       if (!MEM_P (dst))
- 	convert_op (&src, insn);
-       break;
- 
-     case SUBREG:
-       gcc_assert (GET_MODE (src) == V2DImode);
-       break;
- 
-     case COMPARE:
-       src = SUBREG_REG (XEXP (XEXP (src, 0), 0));
- 
-       gcc_assert ((REG_P (src) && GET_MODE (src) == DImode)
- 		  || (SUBREG_P (src) && GET_MODE (src) == V2DImode));
- 
-       if (REG_P (src))
- 	subreg = gen_rtx_SUBREG (V2DImode, src, 0);
-       else
- 	subreg = copy_rtx_if_shared (src);
-       emit_insn_before (gen_vec_interleave_lowv2di (copy_rtx_if_shared (subreg),
- 						    copy_rtx_if_shared (subreg),
- 						    copy_rtx_if_shared (subreg)),
- 			insn);
-       dst = gen_rtx_REG (CCmode, FLAGS_REG);
-       src = gen_rtx_UNSPEC (CCmode, gen_rtvec (2, copy_rtx_if_shared (src),
- 					       copy_rtx_if_shared (src)),
- 			    UNSPEC_PTEST);
-       break;
- 
-     case CONST_INT:
-       convert_op (&src, insn);
-       break;
- 
-     default:
-       gcc_unreachable ();
-     }
- 
-   SET_SRC (def_set) = src;
-   SET_DEST (def_set) = dst;
- 
-   /* Drop possible dead definitions.  */
-   PATTERN (insn) = def_set;
- 
-   INSN_CODE (insn) = -1;
-   recog_memoized (insn);
-   df_insn_rescan (insn);
- }
- 
- /* Fix uses of converted REG in debug insns.  */
- 
- void
- timode_scalar_chain::fix_debug_reg_uses (rtx reg)
- {
-   if (!flag_var_tracking)
-     return;
- 
-   df_ref ref, next;
-   for (ref = DF_REG_USE_CHAIN (REGNO (reg)); ref; ref = next)
-     {
-       rtx_insn *insn = DF_REF_INSN (ref);
-       /* Make sure the next ref is for a different instruction,
-          so that we're not affected by the rescan.  */
-       next = DF_REF_NEXT_REG (ref);
-       while (next && DF_REF_INSN (next) == insn)
- 	next = DF_REF_NEXT_REG (next);
- 
-       if (DEBUG_INSN_P (insn))
- 	{
- 	  /* It may be a debug insn with a TImode variable in
- 	     register.  */
- 	  bool changed = false;
- 	  for (; ref != next; ref = DF_REF_NEXT_REG (ref))
- 	    {
- 	      rtx *loc = DF_REF_LOC (ref);
- 	      if (REG_P (*loc) && GET_MODE (*loc) == V1TImode)
- 		{
- 		  *loc = gen_rtx_SUBREG (TImode, *loc, 0);
- 		  changed = true;
- 		}
- 	    }
- 	  if (changed)
- 	    df_insn_rescan (insn);
- 	}
-     }
- }
- 
- /* Convert INSN from TImode to V1T1mode.  */
- 
- void
- timode_scalar_chain::convert_insn (rtx_insn *insn)
- {
-   rtx def_set = single_set (insn);
-   rtx src = SET_SRC (def_set);
-   rtx dst = SET_DEST (def_set);
- 
-   switch (GET_CODE (dst))
-     {
-     case REG:
-       {
- 	rtx tmp = find_reg_equal_equiv_note (insn);
- 	if (tmp)
- 	  PUT_MODE (XEXP (tmp, 0), V1TImode);
- 	PUT_MODE (dst, V1TImode);
- 	fix_debug_reg_uses (dst);
-       }
-       break;
-     case MEM:
-       PUT_MODE (dst, V1TImode);
-       break;
- 
-     default:
-       gcc_unreachable ();
-     }
- 
-   switch (GET_CODE (src))
-     {
-     case REG:
-       PUT_MODE (src, V1TImode);
-       /* Call fix_debug_reg_uses only if SRC is never defined.  */
-       if (!DF_REG_DEF_CHAIN (REGNO (src)))
- 	fix_debug_reg_uses (src);
-       break;
- 
-     case MEM:
-       PUT_MODE (src, V1TImode);
-       break;
- 
-     case CONST_WIDE_INT:
-       if (NONDEBUG_INSN_P (insn))
- 	{
- 	  /* Since there are no instructions to store 128-bit constant,
- 	     temporary register usage is required.  */
- 	  rtx tmp = gen_reg_rtx (V1TImode);
- 	  start_sequence ();
- 	  src = gen_rtx_CONST_VECTOR (V1TImode, gen_rtvec (1, src));
- 	  src = validize_mem (force_const_mem (V1TImode, src));
- 	  rtx_insn *seq = get_insns ();
- 	  end_sequence ();
- 	  if (seq)
- 	    emit_insn_before (seq, insn);
- 	  emit_conversion_insns (gen_rtx_SET (dst, tmp), insn);
- 	  dst = tmp;
- 	}
-       break;
- 
-     case CONST_INT:
-       switch (standard_sse_constant_p (src, TImode))
- 	{
- 	case 1:
- 	  src = CONST0_RTX (GET_MODE (dst));
- 	  break;
- 	case 2:
- 	  src = CONSTM1_RTX (GET_MODE (dst));
- 	  break;
- 	default:
- 	  gcc_unreachable ();
- 	}
-       if (NONDEBUG_INSN_P (insn))
- 	{
- 	  rtx tmp = gen_reg_rtx (V1TImode);
- 	  /* Since there are no instructions to store standard SSE
- 	     constant, temporary register usage is required.  */
- 	  emit_conversion_insns (gen_rtx_SET (dst, tmp), insn);
- 	  dst = tmp;
- 	}
-       break;
- 
-     default:
-       gcc_unreachable ();
-     }
- 
-   SET_SRC (def_set) = src;
-   SET_DEST (def_set) = dst;
- 
-   /* Drop possible dead definitions.  */
-   PATTERN (insn) = def_set;
- 
-   INSN_CODE (insn) = -1;
-   recog_memoized (insn);
-   df_insn_rescan (insn);
- }
- 
- void
- dimode_scalar_chain::convert_registers ()
- {
-   bitmap_iterator bi;
-   unsigned id;
- 
-   EXECUTE_IF_SET_IN_BITMAP (defs, 0, id, bi)
-     convert_reg (id);
- 
-   EXECUTE_IF_AND_COMPL_IN_BITMAP (defs_conv, defs, 0, id, bi)
-     make_vector_copies (id);
- }
- 
- /* Convert whole chain creating required register
-    conversions and copies.  */
- 
- int
- scalar_chain::convert ()
- {
-   bitmap_iterator bi;
-   unsigned id;
-   int converted_insns = 0;
- 
-   if (!dbg_cnt (stv_conversion))
-     return 0;
- 
-   if (dump_file)
-     fprintf (dump_file, "Converting chain #%d...\n", chain_id);
- 
-   convert_registers ();
- 
-   EXECUTE_IF_SET_IN_BITMAP (insns, 0, id, bi)
-     {
-       convert_insn (DF_INSN_UID_GET (id)->insn);
-       converted_insns++;
-     }
- 
-   return converted_insns;
- }
- 
- /* Main STV pass function.  Find and convert scalar
-    instructions into vector mode when profitable.  */
- 
- static unsigned int
- convert_scalars_to_vector ()
- {
-   basic_block bb;
-   bitmap candidates;
-   int converted_insns = 0;
- 
-   bitmap_obstack_initialize (NULL);
-   candidates = BITMAP_ALLOC (NULL);
- 
-   calculate_dominance_info (CDI_DOMINATORS);
-   df_set_flags (DF_DEFER_INSN_RESCAN);
-   df_chain_add_problem (DF_DU_CHAIN | DF_UD_CHAIN);
-   df_md_add_problem ();
-   df_analyze ();
- 
-   /* Find all instructions we want to convert into vector mode.  */
-   if (dump_file)
-     fprintf (dump_file, "Searching for mode conversion candidates...\n");
- 
-   FOR_EACH_BB_FN (bb, cfun)
-     {
-       rtx_insn *insn;
-       FOR_BB_INSNS (bb, insn)
- 	if (scalar_to_vector_candidate_p (insn))
- 	  {
- 	    if (dump_file)
- 	      fprintf (dump_file, "  insn %d is marked as a candidate\n",
- 		       INSN_UID (insn));
- 
- 	    bitmap_set_bit (candidates, INSN_UID (insn));
- 	  }
-     }
- 
-   remove_non_convertible_regs (candidates);
- 
-   if (bitmap_empty_p (candidates))
-     if (dump_file)
-       fprintf (dump_file, "There are no candidates for optimization.\n");
- 
-   while (!bitmap_empty_p (candidates))
-     {
-       unsigned uid = bitmap_first_set_bit (candidates);
-       scalar_chain *chain;
- 
-       if (TARGET_64BIT)
- 	chain = new timode_scalar_chain;
-       else
- 	chain = new dimode_scalar_chain;
- 
-       /* Find instructions chain we want to convert to vector mode.
- 	 Check all uses and definitions to estimate all required
- 	 conversions.  */
-       chain->build (candidates, uid);
- 
-       if (chain->compute_convert_gain () > 0)
- 	converted_insns += chain->convert ();
-       else
- 	if (dump_file)
- 	  fprintf (dump_file, "Chain #%d conversion is not profitable\n",
- 		   chain->chain_id);
- 
-       delete chain;
-     }
- 
-   if (dump_file)
-     fprintf (dump_file, "Total insns converted: %d\n", converted_insns);
- 
-   BITMAP_FREE (candidates);
-   bitmap_obstack_release (NULL);
-   df_process_deferred_rescans ();
- 
-   /* Conversion means we may have 128bit register spills/fills
-      which require aligned stack.  */
-   if (converted_insns)
-     {
-       if (crtl->stack_alignment_needed < 128)
- 	crtl->stack_alignment_needed = 128;
-       if (crtl->stack_alignment_estimated < 128)
- 	crtl->stack_alignment_estimated = 128;
-       /* Fix up DECL_RTL/DECL_INCOMING_RTL of arguments.  */
-       if (TARGET_64BIT)
- 	for (tree parm = DECL_ARGUMENTS (current_function_decl);
- 	     parm; parm = DECL_CHAIN (parm))
- 	  {
- 	    if (TYPE_MODE (TREE_TYPE (parm)) != TImode)
- 	      continue;
- 	    if (DECL_RTL_SET_P (parm)
- 		&& GET_MODE (DECL_RTL (parm)) == V1TImode)
- 	      {
- 		rtx r = DECL_RTL (parm);
- 		if (REG_P (r))
- 		  SET_DECL_RTL (parm, gen_rtx_SUBREG (TImode, r, 0));
- 	      }
- 	    if (DECL_INCOMING_RTL (parm)
- 		&& GET_MODE (DECL_INCOMING_RTL (parm)) == V1TImode)
- 	      {
- 		rtx r = DECL_INCOMING_RTL (parm);
- 		if (REG_P (r))
- 		  DECL_INCOMING_RTL (parm) = gen_rtx_SUBREG (TImode, r, 0);
- 	      }
- 	  }
-     }
- 
-   return 0;
- }
- 
- namespace {
- 
- const pass_data pass_data_insert_vzeroupper =
- {
-   RTL_PASS, /* type */
-   "vzeroupper", /* name */
-   OPTGROUP_NONE, /* optinfo_flags */
-   TV_MACH_DEP, /* tv_id */
-   0, /* properties_required */
-   0, /* properties_provided */
-   0, /* properties_destroyed */
-   0, /* todo_flags_start */
-   TODO_df_finish, /* todo_flags_finish */
- };
- 
- class pass_insert_vzeroupper : public rtl_opt_pass
- {
- public:
-   pass_insert_vzeroupper(gcc::context *ctxt)
-     : rtl_opt_pass(pass_data_insert_vzeroupper, ctxt)
-   {}
- 
-   /* opt_pass methods: */
-   virtual bool gate (function *)
-     {
-       return TARGET_AVX
- 	     && TARGET_VZEROUPPER && flag_expensive_optimizations
- 	     && !optimize_size;
-     }
- 
-   virtual unsigned int execute (function *)
-     {
-       return rest_of_handle_insert_vzeroupper ();
-     }
- 
- }; // class pass_insert_vzeroupper
- 
- const pass_data pass_data_stv =
- {
-   RTL_PASS, /* type */
-   "stv", /* name */
-   OPTGROUP_NONE, /* optinfo_flags */
-   TV_MACH_DEP, /* tv_id */
-   0, /* properties_required */
-   0, /* properties_provided */
-   0, /* properties_destroyed */
-   0, /* todo_flags_start */
-   TODO_df_finish, /* todo_flags_finish */
- };
- 
- class pass_stv : public rtl_opt_pass
- {
- public:
-   pass_stv (gcc::context *ctxt)
-     : rtl_opt_pass (pass_data_stv, ctxt),
-       timode_p (false)
-   {}
- 
-   /* opt_pass methods: */
-   virtual bool gate (function *)
-     {
-       return (timode_p == !!TARGET_64BIT
- 	      && TARGET_STV && TARGET_SSE2 && optimize > 1);
-     }
- 
-   virtual unsigned int execute (function *)
-     {
-       return convert_scalars_to_vector ();
-     }
- 
-   opt_pass *clone ()
-     {
-       return new pass_stv (m_ctxt);
-     }
- 
-   void set_pass_param (unsigned int n, bool param)
-     {
-       gcc_assert (n == 0);
-       timode_p = param;
-     }
- 
- private:
-   bool timode_p;
- }; // class pass_stv
- 
- } // anon namespace
- 
- rtl_opt_pass *
- make_pass_insert_vzeroupper (gcc::context *ctxt)
- {
-   return new pass_insert_vzeroupper (ctxt);
- }
- 
- rtl_opt_pass *
- make_pass_stv (gcc::context *ctxt)
- {
-   return new pass_stv (ctxt);
- }
- 
- /* Inserting ENDBRANCH instructions.  */
- 
- static unsigned int
- rest_of_insert_endbranch (void)
- {
-   timevar_push (TV_MACH_DEP);
- 
-   rtx cet_eb;
-   rtx_insn *insn;
-   basic_block bb;
- 
-   /* Currently emit EB if it's a tracking function, i.e. 'nocf_check' is
-      absent among function attributes.  Later an optimization will be
-      introduced to make analysis if an address of a static function is
-      taken.  A static function whose address is not taken will get a
-      nocf_check attribute.  This will allow to reduce the number of EB.  */
- 
-   if (!lookup_attribute ("nocf_check",
- 			 TYPE_ATTRIBUTES (TREE_TYPE (cfun->decl)))
-       && (!flag_manual_endbr
- 	  || lookup_attribute ("cf_check",
- 			       DECL_ATTRIBUTES (cfun->decl)))
-       && !cgraph_node::get (cfun->decl)->only_called_directly_p ())
-     {
-       /* Queue ENDBR insertion to x86_function_profiler.  */
-       if (crtl->profile && flag_fentry)
- 	cfun->machine->endbr_queued_at_entrance = true;
-       else
- 	{
- 	  cet_eb = gen_nop_endbr ();
- 
- 	  bb = ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb;
- 	  insn = BB_HEAD (bb);
- 	  emit_insn_before (cet_eb, insn);
- 	}
-     }
- 
-   bb = 0;
-   FOR_EACH_BB_FN (bb, cfun)
-     {
-       for (insn = BB_HEAD (bb); insn != NEXT_INSN (BB_END (bb));
- 	   insn = NEXT_INSN (insn))
- 	{
- 	  if (CALL_P (insn))
- 	    {
- 	      bool need_endbr;
- 	      need_endbr = find_reg_note (insn, REG_SETJMP, NULL) != NULL;
- 	      if (!need_endbr && !SIBLING_CALL_P (insn))
- 		{
- 		  rtx call = get_call_rtx_from (insn);
- 		  rtx fnaddr = XEXP (call, 0);
- 		  tree fndecl = NULL_TREE;
- 
- 		  /* Also generate ENDBRANCH for non-tail call which
- 		     may return via indirect branch.  */
- 		  if (GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF)
- 		    fndecl = SYMBOL_REF_DECL (XEXP (fnaddr, 0));
- 		  if (fndecl == NULL_TREE)
- 		    fndecl = MEM_EXPR (fnaddr);
- 		  if (fndecl
- 		      && TREE_CODE (TREE_TYPE (fndecl)) != FUNCTION_TYPE
- 		      && TREE_CODE (TREE_TYPE (fndecl)) != METHOD_TYPE)
- 		    fndecl = NULL_TREE;
- 		  if (fndecl && TYPE_ARG_TYPES (TREE_TYPE (fndecl)))
- 		    {
- 		      tree fntype = TREE_TYPE (fndecl);
- 		      if (lookup_attribute ("indirect_return",
- 					    TYPE_ATTRIBUTES (fntype)))
- 			need_endbr = true;
- 		    }
- 		}
- 	      if (!need_endbr)
- 		continue;
- 	      /* Generate ENDBRANCH after CALL, which can return more than
- 		 twice, setjmp-like functions.  */
- 
- 	      cet_eb = gen_nop_endbr ();
- 	      emit_insn_after_setloc (cet_eb, insn, INSN_LOCATION (insn));
- 	      continue;
- 	    }
- 
- 	  if (JUMP_P (insn) && flag_cet_switch)
- 	    {
- 	      rtx target = JUMP_LABEL (insn);
- 	      if (target == NULL_RTX || ANY_RETURN_P (target))
- 		continue;
- 
- 	      /* Check the jump is a switch table.  */
- 	      rtx_insn *label = as_a<rtx_insn *> (target);
- 	      rtx_insn *table = next_insn (label);
- 	      if (table == NULL_RTX || !JUMP_TABLE_DATA_P (table))
- 		continue;
- 
- 	      /* For the indirect jump find out all places it jumps and insert
- 		 ENDBRANCH there.  It should be done under a special flag to
- 		 control ENDBRANCH generation for switch stmts.  */
- 	      edge_iterator ei;
- 	      edge e;
- 	      basic_block dest_blk;
- 
- 	      FOR_EACH_EDGE (e, ei, bb->succs)
- 		{
- 		  rtx_insn *insn;
- 
- 		  dest_blk = e->dest;
- 		  insn = BB_HEAD (dest_blk);
- 		  gcc_assert (LABEL_P (insn));
- 		  cet_eb = gen_nop_endbr ();
- 		  emit_insn_after (cet_eb, insn);
- 		}
- 	      continue;
- 	    }
- 
- 	  if ((LABEL_P (insn) && LABEL_PRESERVE_P (insn))
- 	      || (NOTE_P (insn)
- 		  && NOTE_KIND (insn) == NOTE_INSN_DELETED_LABEL))
- 	    /* TODO.  Check /s bit also.  */
- 	    {
- 	      cet_eb = gen_nop_endbr ();
- 	      emit_insn_after (cet_eb, insn);
- 	      continue;
- 	    }
- 	}
-     }
- 
-   timevar_pop (TV_MACH_DEP);
-   return 0;
- }
- 
- namespace {
- 
- const pass_data pass_data_insert_endbranch =
- {
-   RTL_PASS, /* type.  */
-   "cet", /* name.  */
-   OPTGROUP_NONE, /* optinfo_flags.  */
-   TV_MACH_DEP, /* tv_id.  */
-   0, /* properties_required.  */
-   0, /* properties_provided.  */
-   0, /* properties_destroyed.  */
-   0, /* todo_flags_start.  */
-   0, /* todo_flags_finish.  */
- };
- 
- class pass_insert_endbranch : public rtl_opt_pass
- {
- public:
-   pass_insert_endbranch (gcc::context *ctxt)
-     : rtl_opt_pass (pass_data_insert_endbranch, ctxt)
-   {}
- 
-   /* opt_pass methods: */
-   virtual bool gate (function *)
-     {
-       return ((flag_cf_protection & CF_BRANCH));
-     }
- 
-   virtual unsigned int execute (function *)
-     {
-       return rest_of_insert_endbranch ();
-     }
- 
- }; // class pass_insert_endbranch
- 
- } // anon namespace
- 
- rtl_opt_pass *
- make_pass_insert_endbranch (gcc::context *ctxt)
- {
-   return new pass_insert_endbranch (ctxt);
- }
- 
- /* At entry of the nearest common dominator for basic blocks with
-    conversions, generate a single
- 	vxorps %xmmN, %xmmN, %xmmN
-    for all
- 	vcvtss2sd  op, %xmmN, %xmmX
- 	vcvtsd2ss  op, %xmmN, %xmmX
- 	vcvtsi2ss  op, %xmmN, %xmmX
- 	vcvtsi2sd  op, %xmmN, %xmmX
- 
-    NB: We want to generate only a single vxorps to cover the whole
-    function.  The LCM algorithm isn't appropriate here since it may
-    place a vxorps inside the loop.  */
- 
- static unsigned int
- remove_partial_avx_dependency (void)
- {
-   timevar_push (TV_MACH_DEP);
- 
-   bitmap_obstack_initialize (NULL);
-   bitmap convert_bbs = BITMAP_ALLOC (NULL);
- 
-   basic_block bb;
-   rtx_insn *insn, *set_insn;
-   rtx set;
-   rtx v4sf_const0 = NULL_RTX;
- 
-   auto_vec<rtx_insn *> control_flow_insns;
- 
-   FOR_EACH_BB_FN (bb, cfun)
-     {
-       FOR_BB_INSNS (bb, insn)
- 	{
- 	  if (!NONDEBUG_INSN_P (insn))
- 	    continue;
- 
- 	  set = single_set (insn);
- 	  if (!set)
- 	    continue;
- 
- 	  if (get_attr_avx_partial_xmm_update (insn)
- 	      != AVX_PARTIAL_XMM_UPDATE_TRUE)
- 	    continue;
- 
- 	  if (!v4sf_const0)
- 	    {
- 	      calculate_dominance_info (CDI_DOMINATORS);
- 	      df_set_flags (DF_DEFER_INSN_RESCAN);
- 	      df_chain_add_problem (DF_DU_CHAIN | DF_UD_CHAIN);
- 	      df_md_add_problem ();
- 	      df_analyze ();
- 	      v4sf_const0 = gen_reg_rtx (V4SFmode);
- 	    }
- 
- 	  /* Convert PARTIAL_XMM_UPDATE_TRUE insns, DF -> SF, SF -> DF,
- 	     SI -> SF, SI -> DF, DI -> SF, DI -> DF, to vec_dup and
- 	     vec_merge with subreg.  */
- 	  rtx src = SET_SRC (set);
- 	  rtx dest = SET_DEST (set);
- 	  machine_mode dest_mode = GET_MODE (dest);
- 
- 	  rtx zero;
- 	  machine_mode dest_vecmode;
- 	  if (dest_mode == E_SFmode)
- 	    {
- 	      dest_vecmode = V4SFmode;
- 	      zero = v4sf_const0;
- 	    }
- 	  else
- 	    {
- 	      dest_vecmode = V2DFmode;
- 	      zero = gen_rtx_SUBREG (V2DFmode, v4sf_const0, 0);
- 	    }
- 
- 	  /* Change source to vector mode.  */
- 	  src = gen_rtx_VEC_DUPLICATE (dest_vecmode, src);
- 	  src = gen_rtx_VEC_MERGE (dest_vecmode, src, zero,
- 				   GEN_INT (HOST_WIDE_INT_1U));
- 	  /* Change destination to vector mode.  */
- 	  rtx vec = gen_reg_rtx (dest_vecmode);
- 	  /* Generate an XMM vector SET.  */
- 	  set = gen_rtx_SET (vec, src);
- 	  set_insn = emit_insn_before (set, insn);
- 	  df_insn_rescan (set_insn);
- 
- 	  if (cfun->can_throw_non_call_exceptions)
- 	    {
- 	      /* Handle REG_EH_REGION note.  */
- 	      rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
- 	      if (note)
- 		{
- 		  control_flow_insns.safe_push (set_insn);
- 		  add_reg_note (set_insn, REG_EH_REGION, XEXP (note, 0));
- 		}
- 	    }
- 
- 	  src = gen_rtx_SUBREG (dest_mode, vec, 0);
- 	  set = gen_rtx_SET (dest, src);
- 
- 	  /* Drop possible dead definitions.  */
- 	  PATTERN (insn) = set;
- 
- 	  INSN_CODE (insn) = -1;
- 	  recog_memoized (insn);
- 	  df_insn_rescan (insn);
- 	  bitmap_set_bit (convert_bbs, bb->index);
- 	}
-     }
- 
-   if (v4sf_const0)
-     {
-       /* (Re-)discover loops so that bb->loop_father can be used in the
- 	 analysis below.  */
-       loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
- 
-       /* Generate a vxorps at entry of the nearest dominator for basic
- 	 blocks with conversions, which is in the the fake loop that
- 	 contains the whole function, so that there is only a single
- 	 vxorps in the whole function.   */
-       bb = nearest_common_dominator_for_set (CDI_DOMINATORS,
- 					     convert_bbs);
-       while (bb->loop_father->latch
- 	     != EXIT_BLOCK_PTR_FOR_FN (cfun))
- 	bb = get_immediate_dominator (CDI_DOMINATORS,
- 				      bb->loop_father->header);
- 
-       set = gen_rtx_SET (v4sf_const0, CONST0_RTX (V4SFmode));
- 
-       insn = BB_HEAD (bb);
-       while (insn && !NONDEBUG_INSN_P (insn))
- 	{
- 	  if (insn == BB_END (bb))
- 	    {
- 	      insn = NULL;
- 	      break;
- 	    }
- 	  insn = NEXT_INSN (insn);
- 	}
-       if (insn == BB_HEAD (bb))
-         set_insn = emit_insn_before (set, insn);
-       else
- 	set_insn = emit_insn_after (set,
- 				    insn ? PREV_INSN (insn) : BB_END (bb));
-       df_insn_rescan (set_insn);
-       df_process_deferred_rescans ();
-       loop_optimizer_finalize ();
- 
-       if (!control_flow_insns.is_empty ())
- 	{
- 	  free_dominance_info (CDI_DOMINATORS);
- 
- 	  unsigned int i;
- 	  FOR_EACH_VEC_ELT (control_flow_insns, i, insn)
- 	    if (control_flow_insn_p (insn))
- 	      {
- 		/* Split the block after insn.  There will be a fallthru
- 		   edge, which is OK so we keep it.  We have to create
- 		   the exception edges ourselves.  */
- 		bb = BLOCK_FOR_INSN (insn);
- 		split_block (bb, insn);
- 		rtl_make_eh_edge (NULL, bb, BB_END (bb));
- 	      }
- 	}
-     }
- 
-   bitmap_obstack_release (NULL);
-   BITMAP_FREE (convert_bbs);
- 
-   timevar_pop (TV_MACH_DEP);
-   return 0;
- }
- 
- namespace {
- 
- const pass_data pass_data_remove_partial_avx_dependency =
- {
-   RTL_PASS, /* type */
-   "rpad", /* name */
-   OPTGROUP_NONE, /* optinfo_flags */
-   TV_MACH_DEP, /* tv_id */
-   0, /* properties_required */
-   0, /* properties_provided */
-   0, /* properties_destroyed */
-   0, /* todo_flags_start */
-   TODO_df_finish, /* todo_flags_finish */
- };
- 
- class pass_remove_partial_avx_dependency : public rtl_opt_pass
- {
- public:
-   pass_remove_partial_avx_dependency (gcc::context *ctxt)
-     : rtl_opt_pass (pass_data_remove_partial_avx_dependency, ctxt)
-   {}
- 
-   /* opt_pass methods: */
-   virtual bool gate (function *)
-     {
-       return (TARGET_AVX
- 	      && TARGET_SSE_PARTIAL_REG_DEPENDENCY
- 	      && TARGET_SSE_MATH
- 	      && optimize
- 	      && optimize_function_for_speed_p (cfun));
-     }
- 
-   virtual unsigned int execute (function *)
-     {
-       return remove_partial_avx_dependency ();
-     }
- }; // class pass_rpad
- 
- } // anon namespace
- 
- rtl_opt_pass *
- make_pass_remove_partial_avx_dependency (gcc::context *ctxt)
- {
-   return new pass_remove_partial_avx_dependency (ctxt);
- }
- 
  /* Return true if a red-zone is in use.  We can't use red-zone when
     there are local indirect jumps, like "indirect_jump" or "tablejump",
     which jumps to another place in the function, since "call" in the
--- 409,426 ----
  static rtx ix86_static_chain (const_tree, bool);
  static int ix86_function_regparm (const_tree, const_tree);
  static void ix86_compute_frame_layout (void);
  static tree ix86_canonical_va_list_type (tree);
  static unsigned int split_stack_prologue_scratch_regno (void);
  static bool i386_asm_output_addr_const_extra (FILE *, rtx);
  
  static bool ix86_can_inline_p (tree, tree);
  static unsigned int ix86_minimum_incoming_stack_boundary (bool);
  
  
  /* Whether -mtune= or -march= were specified */
! int ix86_tune_defaulted;
! int ix86_arch_specified;
  
  /* Return true if a red-zone is in use.  We can't use red-zone when
     there are local indirect jumps, like "indirect_jump" or "tablejump",
     which jumps to another place in the function, since "call" in the
*************** ix86_using_red_zone (void)
*** 2921,3258 ****
  	      || cfun->machine->indirect_branch_type == indirect_branch_keep));
  }
  
- /* Return a string that documents the current -m options.  The caller is
-    responsible for freeing the string.  */
- 
- static char *
- ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
- 		    int flags, int flags2,
- 		    const char *arch, const char *tune,
- 		    enum fpmath_unit fpmath, bool add_nl_p, bool add_abi_p)
- {
-   struct ix86_target_opts
-   {
-     const char *option;		/* option string */
-     HOST_WIDE_INT mask;		/* isa mask options */
-   };
- 
-   /* This table is ordered so that options like -msse4.2 that imply other
-      ISAs come first.  Target string will be displayed in the same order.  */
-   static struct ix86_target_opts isa2_opts[] =
-   {
-     { "-mcx16",		OPTION_MASK_ISA_CX16 },
-     { "-mvaes",		OPTION_MASK_ISA_VAES },
-     { "-mrdpid",	OPTION_MASK_ISA_RDPID },
-     { "-mpconfig",	OPTION_MASK_ISA_PCONFIG },
-     { "-mwbnoinvd",     OPTION_MASK_ISA_WBNOINVD },
-     { "-msgx",		OPTION_MASK_ISA_SGX },
-     { "-mavx5124vnniw", OPTION_MASK_ISA_AVX5124VNNIW },
-     { "-mavx5124fmaps", OPTION_MASK_ISA_AVX5124FMAPS },
-     { "-mhle",		OPTION_MASK_ISA_HLE },
-     { "-mmovbe",	OPTION_MASK_ISA_MOVBE },
-     { "-mclzero",	OPTION_MASK_ISA_CLZERO },
-     { "-mmwaitx",	OPTION_MASK_ISA_MWAITX },
-     { "-mmovdir64b",	OPTION_MASK_ISA_MOVDIR64B },
-     { "-mwaitpkg",	OPTION_MASK_ISA_WAITPKG },
-     { "-mcldemote",	OPTION_MASK_ISA_CLDEMOTE },
-     { "-mptwrite",	OPTION_MASK_ISA_PTWRITE }
-   };
-   static struct ix86_target_opts isa_opts[] =
-   {
-     { "-mavx512vpopcntdq", OPTION_MASK_ISA_AVX512VPOPCNTDQ },
-     { "-mavx512bitalg", OPTION_MASK_ISA_AVX512BITALG },
-     { "-mvpclmulqdq",	OPTION_MASK_ISA_VPCLMULQDQ },
-     { "-mgfni",		OPTION_MASK_ISA_GFNI },
-     { "-mavx512vnni",	OPTION_MASK_ISA_AVX512VNNI },
-     { "-mavx512vbmi2",	OPTION_MASK_ISA_AVX512VBMI2 },
-     { "-mavx512vbmi",	OPTION_MASK_ISA_AVX512VBMI },
-     { "-mavx512ifma",	OPTION_MASK_ISA_AVX512IFMA },
-     { "-mavx512vl",	OPTION_MASK_ISA_AVX512VL },
-     { "-mavx512bw",	OPTION_MASK_ISA_AVX512BW },
-     { "-mavx512dq",	OPTION_MASK_ISA_AVX512DQ },
-     { "-mavx512er",	OPTION_MASK_ISA_AVX512ER },
-     { "-mavx512pf",	OPTION_MASK_ISA_AVX512PF },
-     { "-mavx512cd",	OPTION_MASK_ISA_AVX512CD },
-     { "-mavx512f",	OPTION_MASK_ISA_AVX512F },
-     { "-mavx2",		OPTION_MASK_ISA_AVX2 },
-     { "-mfma",		OPTION_MASK_ISA_FMA },
-     { "-mxop",		OPTION_MASK_ISA_XOP },
-     { "-mfma4",		OPTION_MASK_ISA_FMA4 },
-     { "-mf16c",		OPTION_MASK_ISA_F16C },
-     { "-mavx",		OPTION_MASK_ISA_AVX },
- /*  { "-msse4"		OPTION_MASK_ISA_SSE4 }, */
-     { "-msse4.2",	OPTION_MASK_ISA_SSE4_2 },
-     { "-msse4.1",	OPTION_MASK_ISA_SSE4_1 },
-     { "-msse4a",	OPTION_MASK_ISA_SSE4A },
-     { "-mssse3",	OPTION_MASK_ISA_SSSE3 },
-     { "-msse3",		OPTION_MASK_ISA_SSE3 },
-     { "-maes",		OPTION_MASK_ISA_AES },
-     { "-msha",		OPTION_MASK_ISA_SHA },
-     { "-mpclmul",	OPTION_MASK_ISA_PCLMUL },
-     { "-msse2",		OPTION_MASK_ISA_SSE2 },
-     { "-msse",		OPTION_MASK_ISA_SSE },
-     { "-m3dnowa",	OPTION_MASK_ISA_3DNOW_A },
-     { "-m3dnow",	OPTION_MASK_ISA_3DNOW },
-     { "-mmmx",		OPTION_MASK_ISA_MMX },
-     { "-mrtm",		OPTION_MASK_ISA_RTM },
-     { "-mprfchw",	OPTION_MASK_ISA_PRFCHW },
-     { "-mrdseed",	OPTION_MASK_ISA_RDSEED },
-     { "-madx",		OPTION_MASK_ISA_ADX },
-     { "-mprefetchwt1",	OPTION_MASK_ISA_PREFETCHWT1 },
-     { "-mclflushopt",	OPTION_MASK_ISA_CLFLUSHOPT },
-     { "-mxsaves",	OPTION_MASK_ISA_XSAVES },
-     { "-mxsavec",	OPTION_MASK_ISA_XSAVEC },
-     { "-mxsaveopt",	OPTION_MASK_ISA_XSAVEOPT },
-     { "-mxsave",	OPTION_MASK_ISA_XSAVE },
-     { "-mabm",		OPTION_MASK_ISA_ABM },
-     { "-mbmi",		OPTION_MASK_ISA_BMI },
-     { "-mbmi2",		OPTION_MASK_ISA_BMI2 },
-     { "-mlzcnt",	OPTION_MASK_ISA_LZCNT },
-     { "-mtbm",		OPTION_MASK_ISA_TBM },
-     { "-mpopcnt",	OPTION_MASK_ISA_POPCNT },
-     { "-msahf",		OPTION_MASK_ISA_SAHF },
-     { "-mcrc32",	OPTION_MASK_ISA_CRC32 },
-     { "-mfsgsbase",	OPTION_MASK_ISA_FSGSBASE },
-     { "-mrdrnd",	OPTION_MASK_ISA_RDRND },
-     { "-mpku",		OPTION_MASK_ISA_PKU },
-     { "-mlwp",		OPTION_MASK_ISA_LWP },
-     { "-mfxsr",		OPTION_MASK_ISA_FXSR },
-     { "-mclwb",		OPTION_MASK_ISA_CLWB },
-     { "-mshstk",	OPTION_MASK_ISA_SHSTK },
-     { "-mmovdiri",	OPTION_MASK_ISA_MOVDIRI }
-   };
- 
-   /* Flag options.  */
-   static struct ix86_target_opts flag_opts[] =
-   {
-     { "-m128bit-long-double",		MASK_128BIT_LONG_DOUBLE },
-     { "-mlong-double-128",		MASK_LONG_DOUBLE_128 },
-     { "-mlong-double-64",		MASK_LONG_DOUBLE_64 },
-     { "-m80387",			MASK_80387 },
-     { "-maccumulate-outgoing-args",	MASK_ACCUMULATE_OUTGOING_ARGS },
-     { "-malign-double",			MASK_ALIGN_DOUBLE },
-     { "-mcld",				MASK_CLD },
-     { "-mfp-ret-in-387",		MASK_FLOAT_RETURNS },
-     { "-mieee-fp",			MASK_IEEE_FP },
-     { "-minline-all-stringops",		MASK_INLINE_ALL_STRINGOPS },
-     { "-minline-stringops-dynamically",	MASK_INLINE_STRINGOPS_DYNAMICALLY },
-     { "-mms-bitfields",			MASK_MS_BITFIELD_LAYOUT },
-     { "-mno-align-stringops",		MASK_NO_ALIGN_STRINGOPS },
-     { "-mno-fancy-math-387",		MASK_NO_FANCY_MATH_387 },
-     { "-mno-push-args",			MASK_NO_PUSH_ARGS },
-     { "-mno-red-zone",			MASK_NO_RED_ZONE },
-     { "-momit-leaf-frame-pointer",	MASK_OMIT_LEAF_FRAME_POINTER },
-     { "-mrecip",			MASK_RECIP },
-     { "-mrtd",				MASK_RTD },
-     { "-msseregparm",			MASK_SSEREGPARM },
-     { "-mstack-arg-probe",		MASK_STACK_PROBE },
-     { "-mtls-direct-seg-refs",		MASK_TLS_DIRECT_SEG_REFS },
-     { "-mvect8-ret-in-mem",		MASK_VECT8_RETURNS },
-     { "-m8bit-idiv",			MASK_USE_8BIT_IDIV },
-     { "-mvzeroupper",			MASK_VZEROUPPER },
-     { "-mstv",				MASK_STV },
-     { "-mavx256-split-unaligned-load",	MASK_AVX256_SPLIT_UNALIGNED_LOAD },
-     { "-mavx256-split-unaligned-store",	MASK_AVX256_SPLIT_UNALIGNED_STORE },
-     { "-mcall-ms2sysv-xlogues",		MASK_CALL_MS2SYSV_XLOGUES }
-   };
- 
-   /* Additional flag options.  */
-   static struct ix86_target_opts flag2_opts[] =
-   {
-     { "-mgeneral-regs-only",		OPTION_MASK_GENERAL_REGS_ONLY }
-   };
- 
-   const char *opts[ARRAY_SIZE (isa_opts) + ARRAY_SIZE (isa2_opts)
- 		   + ARRAY_SIZE (flag_opts) + ARRAY_SIZE (flag2_opts) + 6][2];
- 
-   char isa_other[40];
-   char isa2_other[40];
-   char flags_other[40];
-   char flags2_other[40];
-   unsigned num = 0;
-   unsigned i, j;
-   char *ret;
-   char *ptr;
-   size_t len;
-   size_t line_len;
-   size_t sep_len;
-   const char *abi;
- 
-   memset (opts, '\0', sizeof (opts));
- 
-   /* Add -march= option.  */
-   if (arch)
-     {
-       opts[num][0] = "-march=";
-       opts[num++][1] = arch;
-     }
- 
-   /* Add -mtune= option.  */
-   if (tune)
-     {
-       opts[num][0] = "-mtune=";
-       opts[num++][1] = tune;
-     }
- 
-   /* Add -m32/-m64/-mx32.  */
-   if (add_abi_p)
-     {
-       if ((isa & OPTION_MASK_ISA_64BIT) != 0)
- 	{
- 	  if ((isa & OPTION_MASK_ABI_64) != 0)
- 	    abi = "-m64";
- 	  else
- 	    abi = "-mx32";
- 	}
-       else
- 	abi = "-m32";
-       opts[num++][0] = abi;
-     }
-   isa &= ~(OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32);
- 
-   /* Pick out the options in isa2 options.  */
-   for (i = 0; i < ARRAY_SIZE (isa2_opts); i++)
-     {
-       if ((isa2 & isa2_opts[i].mask) != 0)
- 	{
- 	  opts[num++][0] = isa2_opts[i].option;
- 	  isa2 &= ~ isa2_opts[i].mask;
- 	}
-     }
- 
-   if (isa2 && add_nl_p)
-     {
-       opts[num++][0] = isa2_other;
-       sprintf (isa2_other, "(other isa2: %#" HOST_WIDE_INT_PRINT "x)", isa2);
-     }
- 
-   /* Pick out the options in isa options.  */
-   for (i = 0; i < ARRAY_SIZE (isa_opts); i++)
-     {
-       if ((isa & isa_opts[i].mask) != 0)
- 	{
- 	  opts[num++][0] = isa_opts[i].option;
- 	  isa &= ~ isa_opts[i].mask;
- 	}
-     }
- 
-   if (isa && add_nl_p)
-     {
-       opts[num++][0] = isa_other;
-       sprintf (isa_other, "(other isa: %#" HOST_WIDE_INT_PRINT "x)", isa);
-     }
- 
-   /* Add flag options.  */
-   for (i = 0; i < ARRAY_SIZE (flag_opts); i++)
-     {
-       if ((flags & flag_opts[i].mask) != 0)
- 	{
- 	  opts[num++][0] = flag_opts[i].option;
- 	  flags &= ~ flag_opts[i].mask;
- 	}
-     }
- 
-   if (flags && add_nl_p)
-     {
-       opts[num++][0] = flags_other;
-       sprintf (flags_other, "(other flags: %#x)", flags);
-     }
- 
-     /* Add additional flag options.  */
-   for (i = 0; i < ARRAY_SIZE (flag2_opts); i++)
-     {
-       if ((flags2 & flag2_opts[i].mask) != 0)
- 	{
- 	  opts[num++][0] = flag2_opts[i].option;
- 	  flags2 &= ~ flag2_opts[i].mask;
- 	}
-     }
- 
-   if (flags2 && add_nl_p)
-     {
-       opts[num++][0] = flags2_other;
-       sprintf (flags2_other, "(other flags2: %#x)", flags2);
-     }
- 
-   /* Add -fpmath= option.  */
-   if (fpmath)
-     {
-       opts[num][0] = "-mfpmath=";
-       switch ((int) fpmath)
- 	{
- 	case FPMATH_387:
- 	  opts[num++][1] = "387";
- 	  break;
- 
- 	case FPMATH_SSE:
- 	  opts[num++][1] = "sse";
- 	  break;
- 
- 	case FPMATH_387 | FPMATH_SSE:
- 	  opts[num++][1] = "sse+387";
- 	  break;
- 
- 	default:
- 	  gcc_unreachable ();
- 	}
-     }
- 
-   /* Any options?  */
-   if (num == 0)
-     return NULL;
- 
-   gcc_assert (num < ARRAY_SIZE (opts));
- 
-   /* Size the string.  */
-   len = 0;
-   sep_len = (add_nl_p) ? 3 : 1;
-   for (i = 0; i < num; i++)
-     {
-       len += sep_len;
-       for (j = 0; j < 2; j++)
- 	if (opts[i][j])
- 	  len += strlen (opts[i][j]);
-     }
- 
-   /* Build the string.  */
-   ret = ptr = (char *) xmalloc (len);
-   line_len = 0;
- 
-   for (i = 0; i < num; i++)
-     {
-       size_t len2[2];
- 
-       for (j = 0; j < 2; j++)
- 	len2[j] = (opts[i][j]) ? strlen (opts[i][j]) : 0;
- 
-       if (i != 0)
- 	{
- 	  *ptr++ = ' ';
- 	  line_len++;
- 
- 	  if (add_nl_p && line_len + len2[0] + len2[1] > 70)
- 	    {
- 	      *ptr++ = '\\';
- 	      *ptr++ = '\n';
- 	      line_len = 0;
- 	    }
- 	}
- 
-       for (j = 0; j < 2; j++)
- 	if (opts[i][j])
- 	  {
- 	    memcpy (ptr, opts[i][j], len2[j]);
- 	    ptr += len2[j];
- 	    line_len += len2[j];
- 	  }
-     }
- 
-   *ptr = '\0';
-   gcc_assert (ret + len >= ptr);
- 
-   return ret;
- }
- 
  /* Return true, if profiling code should be emitted before
     prologue. Otherwise it returns false.
     Note: For x86 with "hotfix" it is sorried.  */
--- 440,445 ----
*************** ix86_profile_before_prologue (void)
*** 3262,4857 ****
    return flag_fentry != 0;
  }
  
- /* Function that is callable from the debugger to print the current
-    options.  */
- void ATTRIBUTE_UNUSED
- ix86_debug_options (void)
- {
-   char *opts = ix86_target_string (ix86_isa_flags, ix86_isa_flags2,
- 				   target_flags, ix86_target_flags,
- 				   ix86_arch_string,ix86_tune_string,
- 				   ix86_fpmath, true, true);
- 
-   if (opts)
-     {
-       fprintf (stderr, "%s\n\n", opts);
-       free (opts);
-     }
-   else
-     fputs ("<no options>\n\n", stderr);
- 
-   return;
- }
- 
- static const char *stringop_alg_names[] = {
- #define DEF_ENUM
- #define DEF_ALG(alg, name) #name,
- #include "stringop.def"
- #undef DEF_ENUM
- #undef DEF_ALG
- };
- 
- /* Parse parameter string passed to -mmemcpy-strategy= or -mmemset-strategy=.
-    The string is of the following form (or comma separated list of it):
- 
-      strategy_alg:max_size:[align|noalign]
- 
-    where the full size range for the strategy is either [0, max_size] or
-    [min_size, max_size], in which min_size is the max_size + 1 of the
-    preceding range.  The last size range must have max_size == -1.
- 
-    Examples:
- 
-     1.
-        -mmemcpy-strategy=libcall:-1:noalign
- 
-       this is equivalent to (for known size memcpy) -mstringop-strategy=libcall
- 
- 
-    2.
-       -mmemset-strategy=rep_8byte:16:noalign,vector_loop:2048:align,libcall:-1:noalign
- 
-       This is to tell the compiler to use the following strategy for memset
-       1) when the expected size is between [1, 16], use rep_8byte strategy;
-       2) when the size is between [17, 2048], use vector_loop;
-       3) when the size is > 2048, use libcall.  */
- 
- struct stringop_size_range
- {
-   int max;
-   stringop_alg alg;
-   bool noalign;
- };
- 
- static void
- ix86_parse_stringop_strategy_string (char *strategy_str, bool is_memset)
- {
-   const struct stringop_algs *default_algs;
-   stringop_size_range input_ranges[MAX_STRINGOP_ALGS];
-   char *curr_range_str, *next_range_str;
-   const char *opt = is_memset ? "-mmemset_strategy=" : "-mmemcpy_strategy=";
-   int i = 0, n = 0;
- 
-   if (is_memset)
-     default_algs = &ix86_cost->memset[TARGET_64BIT != 0];
-   else
-     default_algs = &ix86_cost->memcpy[TARGET_64BIT != 0];
- 
-   curr_range_str = strategy_str;
- 
-   do
-     {
-       int maxs;
-       char alg_name[128];
-       char align[16];
-       next_range_str = strchr (curr_range_str, ',');
-       if (next_range_str)
-         *next_range_str++ = '\0';
- 
-       if (sscanf (curr_range_str, "%20[^:]:%d:%10s", alg_name, &maxs,
- 		  align) != 3)
-         {
- 	  error ("wrong argument %qs to option %qs", curr_range_str, opt);
-           return;
-         }
- 
-       if (n > 0 && (maxs < (input_ranges[n - 1].max + 1) && maxs != -1))
-         {
- 	  error ("size ranges of option %qs should be increasing", opt);
-           return;
-         }
- 
-       for (i = 0; i < last_alg; i++)
- 	if (!strcmp (alg_name, stringop_alg_names[i]))
- 	  break;
- 
-       if (i == last_alg)
-         {
- 	  error ("wrong strategy name %qs specified for option %qs",
- 		 alg_name, opt);
- 
- 	  auto_vec <const char *> candidates;
- 	  for (i = 0; i < last_alg; i++)
- 	    if ((stringop_alg) i != rep_prefix_8_byte || TARGET_64BIT)
- 	      candidates.safe_push (stringop_alg_names[i]);
- 
- 	  char *s;
- 	  const char *hint
- 	    = candidates_list_and_hint (alg_name, s, candidates);
- 	  if (hint)
- 	    inform (input_location,
- 		    "valid arguments to %qs are: %s; did you mean %qs?",
- 		    opt, s, hint);
- 	  else
- 	    inform (input_location, "valid arguments to %qs are: %s",
- 		    opt, s);
- 	  XDELETEVEC (s);
-           return;
-         }
- 
-       if ((stringop_alg) i == rep_prefix_8_byte
- 	  && !TARGET_64BIT)
- 	{
- 	  /* rep; movq isn't available in 32-bit code.  */
- 	  error ("strategy name %qs specified for option %qs "
- 		 "not supported for 32-bit code", alg_name, opt);
- 	  return;
- 	}
- 
-       input_ranges[n].max = maxs;
-       input_ranges[n].alg = (stringop_alg) i;
-       if (!strcmp (align, "align"))
-         input_ranges[n].noalign = false;
-       else if (!strcmp (align, "noalign"))
-         input_ranges[n].noalign = true;
-       else
-         {
- 	  error ("unknown alignment %qs specified for option %qs", align, opt);
-           return;
-         }
-       n++;
-       curr_range_str = next_range_str;
-     }
-   while (curr_range_str);
- 
-   if (input_ranges[n - 1].max != -1)
-     {
-       error ("the max value for the last size range should be -1"
-              " for option %qs", opt);
-       return;
-     }
- 
-   if (n > MAX_STRINGOP_ALGS)
-     {
-       error ("too many size ranges specified in option %qs", opt);
-       return;
-     }
- 
-   /* Now override the default algs array.  */
-   for (i = 0; i < n; i++)
-     {
-       *const_cast<int *>(&default_algs->size[i].max) = input_ranges[i].max;
-       *const_cast<stringop_alg *>(&default_algs->size[i].alg)
-           = input_ranges[i].alg;
-       *const_cast<int *>(&default_algs->size[i].noalign)
-           = input_ranges[i].noalign;
-     }
- }
- 
- 
- /* parse -mtune-ctrl= option. When DUMP is true,
-    print the features that are explicitly set.  */
- 
- static void
- parse_mtune_ctrl_str (bool dump)
- {
-   if (!ix86_tune_ctrl_string)
-     return;
- 
-   char *next_feature_string = NULL;
-   char *curr_feature_string = xstrdup (ix86_tune_ctrl_string);
-   char *orig = curr_feature_string;
-   int i;
-   do
-     {
-       bool clear = false;
- 
-       next_feature_string = strchr (curr_feature_string, ',');
-       if (next_feature_string)
-         *next_feature_string++ = '\0';
-       if (*curr_feature_string == '^')
-         {
-           curr_feature_string++;
-           clear = true;
-         }
-       for (i = 0; i < X86_TUNE_LAST; i++)
-         {
-           if (!strcmp (curr_feature_string, ix86_tune_feature_names[i]))
-             {
-               ix86_tune_features[i] = !clear;
-               if (dump)
-                 fprintf (stderr, "Explicitly %s feature %s\n",
-                          clear ? "clear" : "set", ix86_tune_feature_names[i]);
-               break;
-             }
-         }
-       if (i == X86_TUNE_LAST)
- 	error ("unknown parameter to option %<-mtune-ctrl%>: %s",
- 	       clear ? curr_feature_string - 1 : curr_feature_string);
-       curr_feature_string = next_feature_string;
-     }
-   while (curr_feature_string);
-   free (orig);
- }
- 
- /* Helper function to set ix86_tune_features. IX86_TUNE is the
-    processor type.  */
- 
- static void
- set_ix86_tune_features (enum processor_type ix86_tune, bool dump)
- {
-   unsigned HOST_WIDE_INT ix86_tune_mask = HOST_WIDE_INT_1U << ix86_tune;
-   int i;
- 
-   for (i = 0; i < X86_TUNE_LAST; ++i)
-     {
-       if (ix86_tune_no_default)
-         ix86_tune_features[i] = 0;
-       else
- 	ix86_tune_features[i]
- 	  = !!(initial_ix86_tune_features[i] & ix86_tune_mask);
-     }
- 
-   if (dump)
-     {
-       fprintf (stderr, "List of x86 specific tuning parameter names:\n");
-       for (i = 0; i < X86_TUNE_LAST; i++)
-         fprintf (stderr, "%s : %s\n", ix86_tune_feature_names[i],
-                  ix86_tune_features[i] ? "on" : "off");
-     }
- 
-   parse_mtune_ctrl_str (dump);
- }
- 
- 
- /* Default align_* from the processor table.  */
- 
- static void
- ix86_default_align (struct gcc_options *opts)
- {
-   /* -falign-foo without argument: supply one.  */
-   if (opts->x_flag_align_loops && !opts->x_str_align_loops)
-     opts->x_str_align_loops = processor_cost_table[ix86_tune]->align_loop;
-   if (opts->x_flag_align_jumps && !opts->x_str_align_jumps)
-     opts->x_str_align_jumps = processor_cost_table[ix86_tune]->align_jump;
-   if (opts->x_flag_align_labels && !opts->x_str_align_labels)
-     opts->x_str_align_labels = processor_cost_table[ix86_tune]->align_label;
-   if (opts->x_flag_align_functions && !opts->x_str_align_functions)
-     opts->x_str_align_functions = processor_cost_table[ix86_tune]->align_func;
- }
- 
- /* Implement TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE hook.  */
- 
- static void
- ix86_override_options_after_change (void)
- {
-   ix86_default_align (&global_options);
- }
- 
- 
- 
- /* Override various settings based on options.  If MAIN_ARGS_P, the
-    options are from the command line, otherwise they are from
-    attributes.  Return true if there's an error related to march
-    option.  */
- 
- static bool
- ix86_option_override_internal (bool main_args_p,
- 			       struct gcc_options *opts,
- 			       struct gcc_options *opts_set)
- {
-   int i;
-   unsigned HOST_WIDE_INT ix86_arch_mask;
-   const bool ix86_tune_specified = (opts->x_ix86_tune_string != NULL);
- 
-   /* -mrecip options.  */
-   static struct
-     {
-       const char *string;           /* option name */
-       unsigned int mask;            /* mask bits to set */
-     }
-   const recip_options[] =
-     {
-       { "all",       RECIP_MASK_ALL },
-       { "none",      RECIP_MASK_NONE },
-       { "div",       RECIP_MASK_DIV },
-       { "sqrt",      RECIP_MASK_SQRT },
-       { "vec-div",   RECIP_MASK_VEC_DIV },
-       { "vec-sqrt",  RECIP_MASK_VEC_SQRT },
-     };
- 
- 
-   /* Turn off both OPTION_MASK_ABI_64 and OPTION_MASK_ABI_X32 if
-      TARGET_64BIT_DEFAULT is true and TARGET_64BIT is false.  */
-   if (TARGET_64BIT_DEFAULT && !TARGET_64BIT_P (opts->x_ix86_isa_flags))
-     opts->x_ix86_isa_flags &= ~(OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32);
- #ifdef TARGET_BI_ARCH
-   else
-     {
- #if TARGET_BI_ARCH == 1
-       /* When TARGET_BI_ARCH == 1, by default, OPTION_MASK_ABI_64
- 	 is on and OPTION_MASK_ABI_X32 is off.  We turn off
- 	 OPTION_MASK_ABI_64 if OPTION_MASK_ABI_X32 is turned on by
- 	 -mx32.  */
-       if (TARGET_X32_P (opts->x_ix86_isa_flags))
- 	opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_64;
- #else
-       /* When TARGET_BI_ARCH == 2, by default, OPTION_MASK_ABI_X32 is
- 	 on and OPTION_MASK_ABI_64 is off.  We turn off
- 	 OPTION_MASK_ABI_X32 if OPTION_MASK_ABI_64 is turned on by
- 	 -m64 or OPTION_MASK_CODE16 is turned on by -m16.  */
-       if (TARGET_LP64_P (opts->x_ix86_isa_flags)
- 	  || TARGET_16BIT_P (opts->x_ix86_isa_flags))
- 	opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
- #endif
-       if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
- 	  && TARGET_IAMCU_P (opts->x_target_flags))
- 	sorry ("Intel MCU psABI isn%'t supported in %s mode",
- 	       TARGET_X32_P (opts->x_ix86_isa_flags) ? "x32" : "64-bit");
-     }
- #endif
- 
-   if (TARGET_X32_P (opts->x_ix86_isa_flags))
-     {
-       /* Always turn on OPTION_MASK_ISA_64BIT and turn off
- 	 OPTION_MASK_ABI_64 for TARGET_X32.  */
-       opts->x_ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
-       opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_64;
-     }
-   else if (TARGET_16BIT_P (opts->x_ix86_isa_flags))
-     opts->x_ix86_isa_flags &= ~(OPTION_MASK_ISA_64BIT
- 				| OPTION_MASK_ABI_X32
- 				| OPTION_MASK_ABI_64);
-   else if (TARGET_LP64_P (opts->x_ix86_isa_flags))
-     {
-       /* Always turn on OPTION_MASK_ISA_64BIT and turn off
- 	 OPTION_MASK_ABI_X32 for TARGET_LP64.  */
-       opts->x_ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
-       opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
-     }
- 
- #ifdef SUBTARGET_OVERRIDE_OPTIONS
-   SUBTARGET_OVERRIDE_OPTIONS;
- #endif
- 
- #ifdef SUBSUBTARGET_OVERRIDE_OPTIONS
-   SUBSUBTARGET_OVERRIDE_OPTIONS;
- #endif
- 
-   /* -fPIC is the default for x86_64.  */
-   if (TARGET_MACHO && TARGET_64BIT_P (opts->x_ix86_isa_flags))
-     opts->x_flag_pic = 2;
- 
-   /* Need to check -mtune=generic first.  */
-   if (opts->x_ix86_tune_string)
-     {
-       /* As special support for cross compilers we read -mtune=native
- 	     as -mtune=generic.  With native compilers we won't see the
- 	     -mtune=native, as it was changed by the driver.  */
-       if (!strcmp (opts->x_ix86_tune_string, "native"))
- 	{
- 	  opts->x_ix86_tune_string = "generic";
- 	}
-       else if (!strcmp (opts->x_ix86_tune_string, "x86-64"))
-         warning (OPT_Wdeprecated,
- 		 main_args_p
- 		 ? G_("%<-mtune=x86-64%> is deprecated; use %<-mtune=k8%> "
- 		      "or %<-mtune=generic%> instead as appropriate")
- 		 : G_("%<target(\"tune=x86-64\")%> is deprecated; use "
- 		      "%<target(\"tune=k8\")%> or %<target(\"tune=generic\")%>"
- 		      " instead as appropriate"));
-     }
-   else
-     {
-       if (opts->x_ix86_arch_string)
- 	opts->x_ix86_tune_string = opts->x_ix86_arch_string;
-       if (!opts->x_ix86_tune_string)
- 	{
- 	  opts->x_ix86_tune_string = processor_names[TARGET_CPU_DEFAULT];
- 	  ix86_tune_defaulted = 1;
- 	}
- 
-       /* opts->x_ix86_tune_string is set to opts->x_ix86_arch_string
- 	 or defaulted.  We need to use a sensible tune option.  */
-       if (!strcmp (opts->x_ix86_tune_string, "x86-64"))
- 	{
- 	  opts->x_ix86_tune_string = "generic";
- 	}
-     }
- 
-   if (opts->x_ix86_stringop_alg == rep_prefix_8_byte
-       && !TARGET_64BIT_P (opts->x_ix86_isa_flags))
-     {
-       /* rep; movq isn't available in 32-bit code.  */
-       error ("%<-mstringop-strategy=rep_8byte%> not supported for 32-bit code");
-       opts->x_ix86_stringop_alg = no_stringop;
-     }
- 
-   if (!opts->x_ix86_arch_string)
-     opts->x_ix86_arch_string
-       = TARGET_64BIT_P (opts->x_ix86_isa_flags)
- 	? "x86-64" : SUBTARGET32_DEFAULT_CPU;
-   else
-     ix86_arch_specified = 1;
- 
-   if (opts_set->x_ix86_pmode)
-     {
-       if ((TARGET_LP64_P (opts->x_ix86_isa_flags)
- 	   && opts->x_ix86_pmode == PMODE_SI)
- 	  || (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
- 	       && opts->x_ix86_pmode == PMODE_DI))
- 	error ("address mode %qs not supported in the %s bit mode",
- 	       TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "short" : "long",
- 	       TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "64" : "32");
-     }
-   else
-     opts->x_ix86_pmode = TARGET_LP64_P (opts->x_ix86_isa_flags)
- 			 ? PMODE_DI : PMODE_SI;
- 
-   if (!opts_set->x_ix86_abi)
-     opts->x_ix86_abi = DEFAULT_ABI;
- 
-   if (opts->x_ix86_abi == MS_ABI && TARGET_X32_P (opts->x_ix86_isa_flags))
-     error ("%<-mabi=ms%> not supported with X32 ABI");
-   gcc_assert (opts->x_ix86_abi == SYSV_ABI || opts->x_ix86_abi == MS_ABI);
- 
-   const char *abi_name = opts->x_ix86_abi == MS_ABI ? "ms" : "sysv";
-   if ((opts->x_flag_sanitize & SANITIZE_USER_ADDRESS)
-       && opts->x_ix86_abi != DEFAULT_ABI)
-     error ("%<-mabi=%s%> not supported with %<-fsanitize=address%>", abi_name);
-   if ((opts->x_flag_sanitize & SANITIZE_KERNEL_ADDRESS)
-       && opts->x_ix86_abi != DEFAULT_ABI)
-     error ("%<-mabi=%s%> not supported with %<-fsanitize=kernel-address%>",
- 	   abi_name);
-   if ((opts->x_flag_sanitize & SANITIZE_THREAD)
-       && opts->x_ix86_abi != DEFAULT_ABI)
-     error ("%<-mabi=%s%> not supported with %<-fsanitize=thread%>", abi_name);
- 
-   /* For targets using ms ABI enable ms-extensions, if not
-      explicit turned off.  For non-ms ABI we turn off this
-      option.  */
-   if (!opts_set->x_flag_ms_extensions)
-     opts->x_flag_ms_extensions = (MS_ABI == DEFAULT_ABI);
- 
-   if (opts_set->x_ix86_cmodel)
-     {
-       switch (opts->x_ix86_cmodel)
- 	{
- 	case CM_SMALL:
- 	case CM_SMALL_PIC:
- 	  if (opts->x_flag_pic)
- 	    opts->x_ix86_cmodel = CM_SMALL_PIC;
- 	  if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
- 	    error ("code model %qs not supported in the %s bit mode",
- 		   "small", "32");
- 	  break;
- 
- 	case CM_MEDIUM:
- 	case CM_MEDIUM_PIC:
- 	  if (opts->x_flag_pic)
- 	    opts->x_ix86_cmodel = CM_MEDIUM_PIC;
- 	  if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
- 	    error ("code model %qs not supported in the %s bit mode",
- 		   "medium", "32");
- 	  else if (TARGET_X32_P (opts->x_ix86_isa_flags))
- 	    error ("code model %qs not supported in x32 mode",
- 		   "medium");
- 	  break;
- 
- 	case CM_LARGE:
- 	case CM_LARGE_PIC:
- 	  if (opts->x_flag_pic)
- 	    opts->x_ix86_cmodel = CM_LARGE_PIC;
- 	  if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
- 	    error ("code model %qs not supported in the %s bit mode",
- 		   "large", "32");
- 	  else if (TARGET_X32_P (opts->x_ix86_isa_flags))
- 	    error ("code model %qs not supported in x32 mode",
- 		   "large");
- 	  break;
- 
- 	case CM_32:
- 	  if (opts->x_flag_pic)
- 	    error ("code model %s does not support PIC mode", "32");
- 	  if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
- 	    error ("code model %qs not supported in the %s bit mode",
- 		   "32", "64");
- 	  break;
- 
- 	case CM_KERNEL:
- 	  if (opts->x_flag_pic)
- 	    {
- 	      error ("code model %s does not support PIC mode", "kernel");
- 	      opts->x_ix86_cmodel = CM_32;
- 	    }
- 	  if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
- 	    error ("code model %qs not supported in the %s bit mode",
- 		   "kernel", "32");
- 	  break;
- 
- 	default:
- 	  gcc_unreachable ();
- 	}
-     }
-   else
-     {
-       /* For TARGET_64BIT and MS_ABI, force pic on, in order to enable the
- 	 use of rip-relative addressing.  This eliminates fixups that
- 	 would otherwise be needed if this object is to be placed in a
- 	 DLL, and is essentially just as efficient as direct addressing.  */
-       if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
- 	  && (TARGET_RDOS || TARGET_PECOFF))
- 	opts->x_ix86_cmodel = CM_MEDIUM_PIC, opts->x_flag_pic = 1;
-       else if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
- 	opts->x_ix86_cmodel = opts->x_flag_pic ? CM_SMALL_PIC : CM_SMALL;
-       else
- 	opts->x_ix86_cmodel = CM_32;
-     }
-   if (TARGET_MACHO && opts->x_ix86_asm_dialect == ASM_INTEL)
-     {
-       error ("%<-masm=intel%> not supported in this configuration");
-       opts->x_ix86_asm_dialect = ASM_ATT;
-     }
-   if ((TARGET_64BIT_P (opts->x_ix86_isa_flags) != 0)
-       != ((opts->x_ix86_isa_flags & OPTION_MASK_ISA_64BIT) != 0))
-     sorry ("%i-bit mode not compiled in",
- 	   (opts->x_ix86_isa_flags & OPTION_MASK_ISA_64BIT) ? 64 : 32);
- 
-   for (i = 0; i < pta_size; i++)
-     if (! strcmp (opts->x_ix86_arch_string, processor_alias_table[i].name))
-       {
- 	if (!strcmp (opts->x_ix86_arch_string, "generic"))
- 	  {
- 	    error (main_args_p
- 		   ? G_("%<generic%> CPU can be used only for %<-mtune=%> "
- 			"switch")
- 		   : G_("%<generic%> CPU can be used only for "
- 			"%<target(\"tune=\")%> attribute"));
- 	    return false;
- 	  }
- 	else if (!strcmp (opts->x_ix86_arch_string, "intel"))
- 	  {
- 	    error (main_args_p
- 		   ? G_("%<intel%> CPU can be used only for %<-mtune=%> "
- 			"switch")
- 		   : G_("%<intel%> CPU can be used only for "
- 			"%<target(\"tune=\")%> attribute"));
- 	    return false;
- 	  }
- 
- 	if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
- 	    && !((processor_alias_table[i].flags & PTA_64BIT) != 0))
- 	  {
- 	    error ("CPU you selected does not support x86-64 "
- 		   "instruction set");
- 	    return false;
- 	  }
- 
- 	ix86_schedule = processor_alias_table[i].schedule;
- 	ix86_arch = processor_alias_table[i].processor;
- 	/* Default cpu tuning to the architecture.  */
- 	ix86_tune = ix86_arch;
- 
- 	if (((processor_alias_table[i].flags & PTA_MMX) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_MMX))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MMX;
- 	if (((processor_alias_table[i].flags & PTA_3DNOW) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_3DNOW))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW;
- 	if (((processor_alias_table[i].flags & PTA_3DNOW_A) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_3DNOW_A))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW_A;
- 	if (((processor_alias_table[i].flags & PTA_SSE) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE;
- 	if (((processor_alias_table[i].flags & PTA_SSE2) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE2))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE2;
- 	if (((processor_alias_table[i].flags & PTA_SSE3) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE3))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE3;
- 	if (((processor_alias_table[i].flags & PTA_SSSE3) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSSE3))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSSE3;
- 	if (((processor_alias_table[i].flags & PTA_SSE4_1) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4_1))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_1;
- 	if (((processor_alias_table[i].flags & PTA_SSE4_2) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4_2))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_2;
- 	if (((processor_alias_table[i].flags & PTA_AVX) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX;
- 	if (((processor_alias_table[i].flags & PTA_AVX2) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX2))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2;
- 	if (((processor_alias_table[i].flags & PTA_FMA) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FMA))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA;
- 	if (((processor_alias_table[i].flags & PTA_SSE4A) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4A))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4A;
- 	if (((processor_alias_table[i].flags & PTA_FMA4) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FMA4))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA4;
- 	if (((processor_alias_table[i].flags & PTA_XOP) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XOP))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XOP;
- 	if (((processor_alias_table[i].flags & PTA_LWP) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_LWP))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LWP;
- 	if (((processor_alias_table[i].flags & PTA_ABM) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_ABM))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ABM;
- 	if (((processor_alias_table[i].flags & PTA_BMI) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_BMI))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI;
- 	if (((processor_alias_table[i].flags & (PTA_LZCNT | PTA_ABM)) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_LZCNT))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LZCNT;
- 	if (((processor_alias_table[i].flags & PTA_TBM) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_TBM))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_TBM;
- 	if (((processor_alias_table[i].flags & PTA_BMI2) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_BMI2))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI2;
- 	if (((processor_alias_table[i].flags & PTA_CX16) != 0)
- 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_CX16))
- 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_CX16;
- 	if (((processor_alias_table[i].flags & (PTA_POPCNT | PTA_ABM)) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_POPCNT))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_POPCNT;
- 	if (!(TARGET_64BIT_P (opts->x_ix86_isa_flags)
- 	    && ((processor_alias_table[i].flags & PTA_NO_SAHF) != 0))
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SAHF))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SAHF;
- 	if (((processor_alias_table[i].flags & PTA_MOVBE) != 0)
- 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_MOVBE))
- 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_MOVBE;
- 	if (((processor_alias_table[i].flags & PTA_AES) != 0)
- 	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_AES))
- 	  ix86_isa_flags |= OPTION_MASK_ISA_AES;
- 	if (((processor_alias_table[i].flags & PTA_SHA) != 0)
- 	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_SHA))
- 	  ix86_isa_flags |= OPTION_MASK_ISA_SHA;
- 	if (((processor_alias_table[i].flags & PTA_PCLMUL) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PCLMUL))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PCLMUL;
- 	if (((processor_alias_table[i].flags & PTA_FSGSBASE) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FSGSBASE))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FSGSBASE;
- 	if (((processor_alias_table[i].flags & PTA_RDRND) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_RDRND))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDRND;
- 	if (((processor_alias_table[i].flags & PTA_F16C) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_F16C))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_F16C;
- 	if (((processor_alias_table[i].flags & PTA_RTM) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_RTM))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RTM;
- 	if (((processor_alias_table[i].flags & PTA_HLE) != 0)
- 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_HLE))
- 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_HLE;
- 	if (((processor_alias_table[i].flags & PTA_PRFCHW) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PRFCHW))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PRFCHW;
- 	if (((processor_alias_table[i].flags & PTA_RDSEED) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_RDSEED))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDSEED;
- 	if (((processor_alias_table[i].flags & PTA_ADX) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_ADX))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ADX;
- 	if (((processor_alias_table[i].flags & PTA_FXSR) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FXSR))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FXSR;
- 	if (((processor_alias_table[i].flags & PTA_XSAVE) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVE))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVE;
- 	if (((processor_alias_table[i].flags & PTA_XSAVEOPT) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVEOPT))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEOPT;
- 	if (((processor_alias_table[i].flags & PTA_AVX512F) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512F))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F;
- 	if (((processor_alias_table[i].flags & PTA_AVX512ER) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512ER))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512ER;
- 	if (((processor_alias_table[i].flags & PTA_AVX512PF) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512PF))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512PF;
- 	if (((processor_alias_table[i].flags & PTA_AVX512CD) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512CD))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512CD;
- 	if (((processor_alias_table[i].flags & PTA_PREFETCHWT1) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PREFETCHWT1))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PREFETCHWT1;
- 	if (((processor_alias_table[i].flags & PTA_CLWB) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_CLWB))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLWB;
- 	if (((processor_alias_table[i].flags & PTA_CLFLUSHOPT) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_CLFLUSHOPT))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLFLUSHOPT;
- 	if (((processor_alias_table[i].flags & PTA_CLZERO) != 0)
- 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_CLZERO))
- 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_CLZERO;
- 	if (((processor_alias_table[i].flags & PTA_XSAVEC) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVEC))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEC;
- 	if (((processor_alias_table[i].flags & PTA_XSAVES) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVES))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVES;
- 	if (((processor_alias_table[i].flags & PTA_AVX512DQ) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512DQ))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512DQ;
- 	if (((processor_alias_table[i].flags & PTA_AVX512BW) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512BW))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BW;
- 	if (((processor_alias_table[i].flags & PTA_AVX512VL) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512VL))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VL;
- 	if (((processor_alias_table[i].flags & PTA_AVX512VBMI) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512VBMI))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI;
- 	if (((processor_alias_table[i].flags & PTA_AVX512IFMA) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512IFMA))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512IFMA;
- 	if (((processor_alias_table[i].flags & PTA_AVX512VNNI) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512VNNI))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VNNI;
- 	if (((processor_alias_table[i].flags & PTA_GFNI) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_GFNI))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_GFNI;
- 	if (((processor_alias_table[i].flags & PTA_AVX512VBMI2) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit
- 	    & OPTION_MASK_ISA_AVX512VBMI2))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI2;
- 	if (((processor_alias_table[i].flags & PTA_VPCLMULQDQ) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_VPCLMULQDQ))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_VPCLMULQDQ;
- 	if (((processor_alias_table[i].flags & PTA_AVX512BITALG) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit
- 	    & OPTION_MASK_ISA_AVX512BITALG))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BITALG;
- 
- 	if (((processor_alias_table[i].flags & PTA_AVX5124VNNIW) != 0)
- 	    && !(opts->x_ix86_isa_flags2_explicit
- 		 & OPTION_MASK_ISA_AVX5124VNNIW))
- 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX5124VNNIW;
- 	if (((processor_alias_table[i].flags & PTA_AVX5124FMAPS) != 0)
- 	    && !(opts->x_ix86_isa_flags2_explicit
- 		 & OPTION_MASK_ISA_AVX5124FMAPS))
- 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX5124FMAPS;
- 	if (((processor_alias_table[i].flags & PTA_AVX512VPOPCNTDQ) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit
- 		 & OPTION_MASK_ISA_AVX512VPOPCNTDQ))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VPOPCNTDQ;
- 	if (((processor_alias_table[i].flags & PTA_SGX) != 0)
- 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_SGX))
- 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_SGX;
- 	if (((processor_alias_table[i].flags & PTA_VAES) != 0)
- 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_VAES))
- 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_VAES;
- 	if (((processor_alias_table[i].flags & PTA_RDPID) != 0)
- 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_RDPID))
- 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_RDPID;
- 	if (((processor_alias_table[i].flags & PTA_PCONFIG) != 0)
- 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_PCONFIG))
- 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_PCONFIG;
- 	if (((processor_alias_table[i].flags & PTA_WBNOINVD) != 0)
- 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_WBNOINVD))
- 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_WBNOINVD;
- 	if (((processor_alias_table[i].flags & PTA_PTWRITE) != 0)
- 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_PTWRITE))
- 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_PTWRITE;
- 
- 	if ((processor_alias_table[i].flags
- 	   & (PTA_PREFETCH_SSE | PTA_SSE)) != 0)
- 	  x86_prefetch_sse = true;
- 	if (((processor_alias_table[i].flags & PTA_MWAITX) != 0)
- 	    && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_MWAITX))
- 	  opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_MWAITX;
- 	if (((processor_alias_table[i].flags & PTA_PKU) != 0)
- 	    && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PKU))
- 	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PKU;
- 
- 	/* Don't enable x87 instructions if only
- 	   general registers are allowed.  */
- 	if (!(opts_set->x_ix86_target_flags & OPTION_MASK_GENERAL_REGS_ONLY)
- 	    && !(opts_set->x_target_flags & MASK_80387))
- 	  {
- 	    if (((processor_alias_table[i].flags & PTA_NO_80387) != 0))
- 	      opts->x_target_flags &= ~MASK_80387;
- 	    else
- 	      opts->x_target_flags |= MASK_80387;
- 	  }
- 	break;
-       }
- 
-   if (i == pta_size)
-     {
-       error (main_args_p
- 	     ? G_("bad value (%qs) for %<-march=%> switch")
- 	     : G_("bad value (%qs) for %<target(\"arch=\")%> attribute"),
- 	     opts->x_ix86_arch_string);
- 
-       auto_vec <const char *> candidates;
-       for (i = 0; i < pta_size; i++)
- 	if (strcmp (processor_alias_table[i].name, "generic")
- 	    && strcmp (processor_alias_table[i].name, "intel")
- 	    && (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
- 		|| ((processor_alias_table[i].flags & PTA_64BIT) != 0)))
- 	  candidates.safe_push (processor_alias_table[i].name);
- 
- #ifdef HAVE_LOCAL_CPU_DETECT
-       /* Add also "native" as possible value.  */
-       candidates.safe_push ("native");
- #endif
- 
-       char *s;
-       const char *hint
- 	= candidates_list_and_hint (opts->x_ix86_arch_string, s, candidates);
-       if (hint)
- 	inform (input_location,
- 		main_args_p
- 		? G_("valid arguments to %<-march=%> switch are: "
- 		     "%s; did you mean %qs?")
- 		: G_("valid arguments to %<target(\"arch=\")%> attribute are: "
- 		     "%s; did you mean %qs?"), s, hint);
-       else
- 	inform (input_location,
- 		main_args_p
- 		? G_("valid arguments to %<-march=%> switch are: %s")
- 		: G_("valid arguments to %<target(\"arch=\")%> attribute "
- 		     "are: %s"), s);
-       XDELETEVEC (s);
-     }
- 
-   ix86_arch_mask = HOST_WIDE_INT_1U << ix86_arch;
-   for (i = 0; i < X86_ARCH_LAST; ++i)
-     ix86_arch_features[i] = !!(initial_ix86_arch_features[i] & ix86_arch_mask);
- 
-   for (i = 0; i < pta_size; i++)
-     if (! strcmp (opts->x_ix86_tune_string, processor_alias_table[i].name))
-       {
- 	ix86_schedule = processor_alias_table[i].schedule;
- 	ix86_tune = processor_alias_table[i].processor;
- 	if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
- 	  {
- 	    if (!((processor_alias_table[i].flags & PTA_64BIT) != 0))
- 	      {
- 		if (ix86_tune_defaulted)
- 		  {
- 		    opts->x_ix86_tune_string = "x86-64";
- 		    for (i = 0; i < pta_size; i++)
- 		      if (! strcmp (opts->x_ix86_tune_string,
- 				    processor_alias_table[i].name))
- 			break;
- 		    ix86_schedule = processor_alias_table[i].schedule;
- 		    ix86_tune = processor_alias_table[i].processor;
- 		  }
- 		else
- 		  error ("CPU you selected does not support x86-64 "
- 			 "instruction set");
- 	      }
- 	  }
- 	/* Intel CPUs have always interpreted SSE prefetch instructions as
- 	   NOPs; so, we can enable SSE prefetch instructions even when
- 	   -mtune (rather than -march) points us to a processor that has them.
- 	   However, the VIA C3 gives a SIGILL, so we only do that for i686 and
- 	   higher processors.  */
- 	if (TARGET_CMOV
- 	    && ((processor_alias_table[i].flags
- 	      & (PTA_PREFETCH_SSE | PTA_SSE)) != 0))
- 	  x86_prefetch_sse = true;
- 	break;
-       }
- 
-   if (ix86_tune_specified && i == pta_size)
-     {
-       error (main_args_p
- 	     ? G_("bad value (%qs) for %<-mtune=%> switch")
- 	     : G_("bad value (%qs) for %<target(\"tune=\")%> attribute"),
- 	     opts->x_ix86_tune_string);
- 
-       auto_vec <const char *> candidates;
-       for (i = 0; i < pta_size; i++)
- 	if (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
- 	    || ((processor_alias_table[i].flags & PTA_64BIT) != 0))
- 	  candidates.safe_push (processor_alias_table[i].name);
- 
- #ifdef HAVE_LOCAL_CPU_DETECT
-       /* Add also "native" as possible value.  */
-       candidates.safe_push ("native");
- #endif
- 
-       char *s;
-       const char *hint
- 	= candidates_list_and_hint (opts->x_ix86_tune_string, s, candidates);
-       if (hint)
- 	inform (input_location,
- 		main_args_p
- 		? G_("valid arguments to %<-mtune=%> switch are: "
- 		     "%s; did you mean %qs?")
- 		: G_("valid arguments to %<target(\"tune=\")%> attribute are: "
- 		     "%s; did you mean %qs?"), s, hint);
-       else
- 	inform (input_location,
- 		main_args_p
- 		? G_("valid arguments to %<-mtune=%> switch are: %s")
- 		: G_("valid arguments to %<target(\"tune=\")%> attribute "
- 		     "are: %s"), s);
-       XDELETEVEC (s);
-     }
- 
-   set_ix86_tune_features (ix86_tune, opts->x_ix86_dump_tunes);
- 
- #ifndef USE_IX86_FRAME_POINTER
- #define USE_IX86_FRAME_POINTER 0
- #endif
- 
- #ifndef USE_X86_64_FRAME_POINTER
- #define USE_X86_64_FRAME_POINTER 0
- #endif
- 
-   /* Set the default values for switches whose default depends on TARGET_64BIT
-      in case they weren't overwritten by command line options.  */
-   if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
-     {
-       if (opts->x_optimize >= 1 && !opts_set->x_flag_omit_frame_pointer)
- 	opts->x_flag_omit_frame_pointer = !USE_X86_64_FRAME_POINTER;
-       if (opts->x_flag_asynchronous_unwind_tables
- 	  && !opts_set->x_flag_unwind_tables
- 	  && TARGET_64BIT_MS_ABI)
- 	opts->x_flag_unwind_tables = 1;
-       if (opts->x_flag_asynchronous_unwind_tables == 2)
- 	opts->x_flag_unwind_tables
- 	  = opts->x_flag_asynchronous_unwind_tables = 1;
-       if (opts->x_flag_pcc_struct_return == 2)
- 	opts->x_flag_pcc_struct_return = 0;
-     }
-   else
-     {
-       if (opts->x_optimize >= 1 && !opts_set->x_flag_omit_frame_pointer)
- 	opts->x_flag_omit_frame_pointer
- 	  = !(USE_IX86_FRAME_POINTER || opts->x_optimize_size);
-       if (opts->x_flag_asynchronous_unwind_tables == 2)
- 	opts->x_flag_asynchronous_unwind_tables = !USE_IX86_FRAME_POINTER;
-       if (opts->x_flag_pcc_struct_return == 2)
- 	{
- 	  /* Intel MCU psABI specifies that -freg-struct-return should
- 	     be on.  Instead of setting DEFAULT_PCC_STRUCT_RETURN to 1,
- 	     we check -miamcu so that -freg-struct-return is always
- 	     turned on if -miamcu is used.  */
- 	  if (TARGET_IAMCU_P (opts->x_target_flags))
- 	    opts->x_flag_pcc_struct_return = 0;
- 	  else
- 	    opts->x_flag_pcc_struct_return = DEFAULT_PCC_STRUCT_RETURN;
- 	}
-     }
- 
-   ix86_tune_cost = processor_cost_table[ix86_tune];
-   /* TODO: ix86_cost should be chosen at instruction or function granuality
-      so for cold code we use size_cost even in !optimize_size compilation.  */
-   if (opts->x_optimize_size)
-     ix86_cost = &ix86_size_cost;
-   else
-     ix86_cost = ix86_tune_cost;
- 
-   /* Arrange to set up i386_stack_locals for all functions.  */
-   init_machine_status = ix86_init_machine_status;
- 
-   /* Validate -mregparm= value.  */
-   if (opts_set->x_ix86_regparm)
-     {
-       if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
- 	warning (0, "%<-mregparm%> is ignored in 64-bit mode");
-       else if (TARGET_IAMCU_P (opts->x_target_flags))
- 	warning (0, "%<-mregparm%> is ignored for Intel MCU psABI");
-       if (opts->x_ix86_regparm > REGPARM_MAX)
- 	{
- 	  error ("%<-mregparm=%d%> is not between 0 and %d",
- 		 opts->x_ix86_regparm, REGPARM_MAX);
- 	  opts->x_ix86_regparm = 0;
- 	}
-     }
-   if (TARGET_IAMCU_P (opts->x_target_flags)
-       || TARGET_64BIT_P (opts->x_ix86_isa_flags))
-     opts->x_ix86_regparm = REGPARM_MAX;
- 
-   /* Default align_* from the processor table.  */
-   ix86_default_align (opts);
- 
-   /* Provide default for -mbranch-cost= value.  */
-   if (!opts_set->x_ix86_branch_cost)
-     opts->x_ix86_branch_cost = ix86_tune_cost->branch_cost;
- 
-   if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
-     {
-       opts->x_target_flags
- 	|= TARGET_SUBTARGET64_DEFAULT & ~opts_set->x_target_flags;
- 
-       if (!ix86_arch_specified)
- 	opts->x_ix86_isa_flags
- 	  |= TARGET_SUBTARGET64_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit;
- 
-       if (TARGET_RTD_P (opts->x_target_flags))
- 	warning (0,
- 		 main_args_p
- 		 ? G_("%<-mrtd%> is ignored in 64bit mode")
- 		 : G_("%<target(\"rtd\")%> is ignored in 64bit mode"));
-     }
-   else
-     {
-       opts->x_target_flags
- 	|= TARGET_SUBTARGET32_DEFAULT & ~opts_set->x_target_flags;
- 
-       if (!ix86_arch_specified)
-         opts->x_ix86_isa_flags
- 	  |= TARGET_SUBTARGET32_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit;
- 
-       /* i386 ABI does not specify red zone.  It still makes sense to use it
-          when programmer takes care to stack from being destroyed.  */
-       if (!(opts_set->x_target_flags & MASK_NO_RED_ZONE))
-         opts->x_target_flags |= MASK_NO_RED_ZONE;
-     }
- 
-   /* Keep nonleaf frame pointers.  */
-   if (opts->x_flag_omit_frame_pointer)
-     opts->x_target_flags &= ~MASK_OMIT_LEAF_FRAME_POINTER;
-   else if (TARGET_OMIT_LEAF_FRAME_POINTER_P (opts->x_target_flags))
-     opts->x_flag_omit_frame_pointer = 1;
- 
-   /* If we're doing fast math, we don't care about comparison order
-      wrt NaNs.  This lets us use a shorter comparison sequence.  */
-   if (opts->x_flag_finite_math_only)
-     opts->x_target_flags &= ~MASK_IEEE_FP;
- 
-   /* If the architecture always has an FPU, turn off NO_FANCY_MATH_387,
-      since the insns won't need emulation.  */
-   if (ix86_tune_features [X86_TUNE_ALWAYS_FANCY_MATH_387])
-     opts->x_target_flags &= ~MASK_NO_FANCY_MATH_387;
- 
-   /* Likewise, if the target doesn't have a 387, or we've specified
-      software floating point, don't use 387 inline intrinsics.  */
-   if (!TARGET_80387_P (opts->x_target_flags))
-     opts->x_target_flags |= MASK_NO_FANCY_MATH_387;
- 
-   /* Turn on MMX builtins for -msse.  */
-   if (TARGET_SSE_P (opts->x_ix86_isa_flags))
-     opts->x_ix86_isa_flags
-       |= OPTION_MASK_ISA_MMX & ~opts->x_ix86_isa_flags_explicit;
- 
-   /* Enable SSE prefetch.  */
-   if (TARGET_SSE_P (opts->x_ix86_isa_flags)
-       || (TARGET_PRFCHW_P (opts->x_ix86_isa_flags)
- 	  && !TARGET_3DNOW_P (opts->x_ix86_isa_flags))
-       || TARGET_PREFETCHWT1_P (opts->x_ix86_isa_flags))
-     x86_prefetch_sse = true;
- 
-   /* Enable popcnt instruction for -msse4.2 or -mabm.  */
-   if (TARGET_SSE4_2_P (opts->x_ix86_isa_flags)
-       || TARGET_ABM_P (opts->x_ix86_isa_flags))
-     opts->x_ix86_isa_flags
-       |= OPTION_MASK_ISA_POPCNT & ~opts->x_ix86_isa_flags_explicit;
- 
-   /* Enable lzcnt instruction for -mabm.  */
-   if (TARGET_ABM_P(opts->x_ix86_isa_flags))
-     opts->x_ix86_isa_flags
-       |= OPTION_MASK_ISA_LZCNT & ~opts->x_ix86_isa_flags_explicit;
- 
-   /* Disable BMI, BMI2 and TBM instructions for -m16.  */
-   if (TARGET_16BIT_P(opts->x_ix86_isa_flags))
-     opts->x_ix86_isa_flags
-       &= ~((OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_TBM)
- 	   & ~opts->x_ix86_isa_flags_explicit);
- 
-   /* Validate -mpreferred-stack-boundary= value or default it to
-      PREFERRED_STACK_BOUNDARY_DEFAULT.  */
-   ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT;
-   if (opts_set->x_ix86_preferred_stack_boundary_arg)
-     {
-       int min = TARGET_64BIT_P (opts->x_ix86_isa_flags)? 3 : 2;
-       int max = TARGET_SEH ? 4 : 12;
- 
-       if (opts->x_ix86_preferred_stack_boundary_arg < min
- 	  || opts->x_ix86_preferred_stack_boundary_arg > max)
- 	{
- 	  if (min == max)
- 	    error ("%<-mpreferred-stack-boundary%> is not supported "
- 		   "for this target");
- 	  else
- 	    error ("%<-mpreferred-stack-boundary=%d%> is not between %d and %d",
- 		   opts->x_ix86_preferred_stack_boundary_arg, min, max);
- 	}
-       else
- 	ix86_preferred_stack_boundary
- 	  = (1 << opts->x_ix86_preferred_stack_boundary_arg) * BITS_PER_UNIT;
-     }
- 
-   /* Set the default value for -mstackrealign.  */
-   if (!opts_set->x_ix86_force_align_arg_pointer)
-     opts->x_ix86_force_align_arg_pointer = STACK_REALIGN_DEFAULT;
- 
-   ix86_default_incoming_stack_boundary = PREFERRED_STACK_BOUNDARY;
- 
-   /* Validate -mincoming-stack-boundary= value or default it to
-      MIN_STACK_BOUNDARY/PREFERRED_STACK_BOUNDARY.  */
-   ix86_incoming_stack_boundary = ix86_default_incoming_stack_boundary;
-   if (opts_set->x_ix86_incoming_stack_boundary_arg)
-     {
-       int min = TARGET_64BIT_P (opts->x_ix86_isa_flags) ? 3 : 2;
- 
-       if (opts->x_ix86_incoming_stack_boundary_arg < min
- 	  || opts->x_ix86_incoming_stack_boundary_arg > 12)
- 	error ("%<-mincoming-stack-boundary=%d%> is not between %d and 12",
- 	       opts->x_ix86_incoming_stack_boundary_arg, min);
-       else
- 	{
- 	  ix86_user_incoming_stack_boundary
- 	    = (1 << opts->x_ix86_incoming_stack_boundary_arg) * BITS_PER_UNIT;
- 	  ix86_incoming_stack_boundary
- 	    = ix86_user_incoming_stack_boundary;
- 	}
-     }
- 
- #ifndef NO_PROFILE_COUNTERS
-   if (flag_nop_mcount)
-     error ("%<-mnop-mcount%> is not compatible with this target");
- #endif
-   if (flag_nop_mcount && flag_pic)
-     error ("%<-mnop-mcount%> is not implemented for %<-fPIC%>");
- 
-   /* Accept -msseregparm only if at least SSE support is enabled.  */
-   if (TARGET_SSEREGPARM_P (opts->x_target_flags)
-       && ! TARGET_SSE_P (opts->x_ix86_isa_flags))
-     error (main_args_p
- 	   ? G_("%<-msseregparm%> used without SSE enabled")
- 	   : G_("%<target(\"sseregparm\")%> used without SSE enabled"));
- 
-   if (opts_set->x_ix86_fpmath)
-     {
-       if (opts->x_ix86_fpmath & FPMATH_SSE)
- 	{
- 	  if (!TARGET_SSE_P (opts->x_ix86_isa_flags))
- 	    {
- 	      if (TARGET_80387_P (opts->x_target_flags))
- 		{
- 		  warning (0, "SSE instruction set disabled, using 387 arithmetics");
- 		  opts->x_ix86_fpmath = FPMATH_387;
- 		}
- 	    }
- 	  else if ((opts->x_ix86_fpmath & FPMATH_387)
- 		   && !TARGET_80387_P (opts->x_target_flags))
- 	    {
- 	      warning (0, "387 instruction set disabled, using SSE arithmetics");
- 	      opts->x_ix86_fpmath = FPMATH_SSE;
- 	    }
- 	}
-     }
-   /* For all chips supporting SSE2, -mfpmath=sse performs better than
-      fpmath=387.  The second is however default at many targets since the
-      extra 80bit precision of temporaries is considered to be part of ABI.
-      Overwrite the default at least for -ffast-math. 
-      TODO: -mfpmath=both seems to produce same performing code with bit
-      smaller binaries.  It is however not clear if register allocation is
-      ready for this setting.
-      Also -mfpmath=387 is overall a lot more compact (bout 4-5%) than SSE
-      codegen.  We may switch to 387 with -ffast-math for size optimized
-      functions. */
-   else if (fast_math_flags_set_p (&global_options)
- 	   && TARGET_SSE2_P (opts->x_ix86_isa_flags))
-     opts->x_ix86_fpmath = FPMATH_SSE;
-   else
-     opts->x_ix86_fpmath = TARGET_FPMATH_DEFAULT_P (opts->x_ix86_isa_flags);
- 
-   /* Use external vectorized library in vectorizing intrinsics.  */
-   if (opts_set->x_ix86_veclibabi_type)
-     switch (opts->x_ix86_veclibabi_type)
-       {
-       case ix86_veclibabi_type_svml:
- 	ix86_veclib_handler = ix86_veclibabi_svml;
- 	break;
- 
-       case ix86_veclibabi_type_acml:
- 	ix86_veclib_handler = ix86_veclibabi_acml;
- 	break;
- 
-       default:
- 	gcc_unreachable ();
-       }
- 
-   if (ix86_tune_features [X86_TUNE_ACCUMULATE_OUTGOING_ARGS]
-       && !(opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
-     opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
- 
-   /* If stack probes are required, the space used for large function
-      arguments on the stack must also be probed, so enable
-      -maccumulate-outgoing-args so this happens in the prologue.  */
-   if (TARGET_STACK_PROBE_P (opts->x_target_flags)
-       && !(opts->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
-     {
-       if (opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
- 	warning (0,
- 		 main_args_p
- 		 ? G_("stack probing requires %<-maccumulate-outgoing-args%> "
- 		      "for correctness")
- 		 : G_("stack probing requires "
- 		      "%<target(\"accumulate-outgoing-args\")%> for "
- 		      "correctness"));
-       opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
-     }
- 
-   /* Stack realignment without -maccumulate-outgoing-args requires %ebp,
-      so enable -maccumulate-outgoing-args when %ebp is fixed.  */
-   if (fixed_regs[BP_REG]
-       && !(opts->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
-     {
-       if (opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
- 	warning (0,
- 		 main_args_p
- 		 ? G_("fixed ebp register requires "
- 		      "%<-maccumulate-outgoing-args%>")
- 		 : G_("fixed ebp register requires "
- 		      "%<target(\"accumulate-outgoing-args\")%>"));
-       opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
-     }
- 
-   /* Figure out what ASM_GENERATE_INTERNAL_LABEL builds as a prefix.  */
-   {
-     char *p;
-     ASM_GENERATE_INTERNAL_LABEL (internal_label_prefix, "LX", 0);
-     p = strchr (internal_label_prefix, 'X');
-     internal_label_prefix_len = p - internal_label_prefix;
-     *p = '\0';
-   }
- 
-   /* When scheduling description is not available, disable scheduler pass
-      so it won't slow down the compilation and make x87 code slower.  */
-   if (!TARGET_SCHEDULE)
-     opts->x_flag_schedule_insns_after_reload = opts->x_flag_schedule_insns = 0;
- 
-   maybe_set_param_value (PARAM_SIMULTANEOUS_PREFETCHES,
- 			 ix86_tune_cost->simultaneous_prefetches,
- 			 opts->x_param_values,
- 			 opts_set->x_param_values);
-   maybe_set_param_value (PARAM_L1_CACHE_LINE_SIZE,
- 			 ix86_tune_cost->prefetch_block,
- 			 opts->x_param_values,
- 			 opts_set->x_param_values);
-   maybe_set_param_value (PARAM_L1_CACHE_SIZE,
- 			 ix86_tune_cost->l1_cache_size,
- 			 opts->x_param_values,
- 			 opts_set->x_param_values);
-   maybe_set_param_value (PARAM_L2_CACHE_SIZE,
- 			 ix86_tune_cost->l2_cache_size,
- 			 opts->x_param_values,
- 			 opts_set->x_param_values);
- 
-   /* Enable sw prefetching at -O3 for CPUS that prefetching is helpful.  */
-   if (opts->x_flag_prefetch_loop_arrays < 0
-       && HAVE_prefetch
-       && (opts->x_optimize >= 3 || opts->x_flag_profile_use)
-       && !opts->x_optimize_size
-       && TARGET_SOFTWARE_PREFETCHING_BENEFICIAL)
-     opts->x_flag_prefetch_loop_arrays = 1;
- 
-   /* If using typedef char *va_list, signal that __builtin_va_start (&ap, 0)
-      can be opts->x_optimized to ap = __builtin_next_arg (0).  */
-   if (!TARGET_64BIT_P (opts->x_ix86_isa_flags) && !opts->x_flag_split_stack)
-     targetm.expand_builtin_va_start = NULL;
- 
-   if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
-     {
-       ix86_gen_leave = gen_leave_rex64;
-       if (Pmode == DImode)
- 	{
- 	  ix86_gen_tls_global_dynamic_64 = gen_tls_global_dynamic_64_di;
- 	  ix86_gen_tls_local_dynamic_base_64
- 	    = gen_tls_local_dynamic_base_64_di;
- 	}
-       else
- 	{
- 	  ix86_gen_tls_global_dynamic_64 = gen_tls_global_dynamic_64_si;
- 	  ix86_gen_tls_local_dynamic_base_64
- 	    = gen_tls_local_dynamic_base_64_si;
- 	}
-     }
-   else
-     ix86_gen_leave = gen_leave;
- 
-   if (Pmode == DImode)
-     {
-       ix86_gen_add3 = gen_adddi3;
-       ix86_gen_sub3 = gen_subdi3;
-       ix86_gen_sub3_carry = gen_subdi3_carry;
-       ix86_gen_one_cmpl2 = gen_one_cmpldi2;
-       ix86_gen_andsp = gen_anddi3;
-       ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_di;
-       ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probedi;
-       ix86_gen_probe_stack_range = gen_probe_stack_rangedi;
-       ix86_gen_monitor = gen_sse3_monitor_di;
-       ix86_gen_monitorx = gen_monitorx_di;
-       ix86_gen_clzero = gen_clzero_di;
-     }
-   else
-     {
-       ix86_gen_add3 = gen_addsi3;
-       ix86_gen_sub3 = gen_subsi3;
-       ix86_gen_sub3_carry = gen_subsi3_carry;
-       ix86_gen_one_cmpl2 = gen_one_cmplsi2;
-       ix86_gen_andsp = gen_andsi3;
-       ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_si;
-       ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probesi;
-       ix86_gen_probe_stack_range = gen_probe_stack_rangesi;
-       ix86_gen_monitor = gen_sse3_monitor_si;
-       ix86_gen_monitorx = gen_monitorx_si;
-       ix86_gen_clzero = gen_clzero_si;
-     }
- 
- #ifdef USE_IX86_CLD
-   /* Use -mcld by default for 32-bit code if configured with --enable-cld.  */
-   if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
-     opts->x_target_flags |= MASK_CLD & ~opts_set->x_target_flags;
- #endif
- 
-   /* Set the default value for -mfentry.  */
-   if (!opts_set->x_flag_fentry)
-     opts->x_flag_fentry = TARGET_SEH;
-   else
-     {
-       if (!TARGET_64BIT_P (opts->x_ix86_isa_flags) && opts->x_flag_pic
- 	  && opts->x_flag_fentry)
- 	sorry ("%<-mfentry%> isn%'t supported for 32-bit in combination "
- 	       "with %<-fpic%>");
-       else if (TARGET_SEH && !opts->x_flag_fentry)
- 	sorry ("%<-mno-fentry%> isn%'t compatible with SEH");
-     }
- 
-   if (TARGET_SEH && TARGET_CALL_MS2SYSV_XLOGUES)
-     sorry ("%<-mcall-ms2sysv-xlogues%> isn%'t currently supported with SEH");
- 
-   if (!(opts_set->x_target_flags & MASK_VZEROUPPER)
-       && TARGET_EMIT_VZEROUPPER)
-     opts->x_target_flags |= MASK_VZEROUPPER;
-   if (!(opts_set->x_target_flags & MASK_STV))
-     opts->x_target_flags |= MASK_STV;
-   /* Disable STV if -mpreferred-stack-boundary={2,3} or
-      -mincoming-stack-boundary={2,3} or -mstackrealign - the needed
-      stack realignment will be extra cost the pass doesn't take into
-      account and the pass can't realign the stack.  */
-   if (ix86_preferred_stack_boundary < 128
-       || ix86_incoming_stack_boundary < 128
-       || opts->x_ix86_force_align_arg_pointer)
-     opts->x_target_flags &= ~MASK_STV;
-   if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL]
-       && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_LOAD))
-     opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_LOAD;
-   if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL]
-       && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_STORE))
-     opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_STORE;
- 
-   /* Enable 128-bit AVX instruction generation
-      for the auto-vectorizer.  */
-   if (TARGET_AVX128_OPTIMAL
-       && (opts_set->x_prefer_vector_width_type == PVW_NONE))
-     opts->x_prefer_vector_width_type = PVW_AVX128;
- 
-   /* Use 256-bit AVX instruction generation
-      in the auto-vectorizer.  */
-   if (ix86_tune_features[X86_TUNE_AVX256_OPTIMAL]
-       && (opts_set->x_prefer_vector_width_type == PVW_NONE))
-     opts->x_prefer_vector_width_type = PVW_AVX256;
- 
-   if (opts->x_ix86_recip_name)
-     {
-       char *p = ASTRDUP (opts->x_ix86_recip_name);
-       char *q;
-       unsigned int mask, i;
-       bool invert;
- 
-       while ((q = strtok (p, ",")) != NULL)
- 	{
- 	  p = NULL;
- 	  if (*q == '!')
- 	    {
- 	      invert = true;
- 	      q++;
- 	    }
- 	  else
- 	    invert = false;
- 
- 	  if (!strcmp (q, "default"))
- 	    mask = RECIP_MASK_ALL;
- 	  else
- 	    {
- 	      for (i = 0; i < ARRAY_SIZE (recip_options); i++)
- 		if (!strcmp (q, recip_options[i].string))
- 		  {
- 		    mask = recip_options[i].mask;
- 		    break;
- 		  }
- 
- 	      if (i == ARRAY_SIZE (recip_options))
- 		{
- 		  error ("unknown option for %<-mrecip=%s%>", q);
- 		  invert = false;
- 		  mask = RECIP_MASK_NONE;
- 		}
- 	    }
- 
- 	  opts->x_recip_mask_explicit |= mask;
- 	  if (invert)
- 	    opts->x_recip_mask &= ~mask;
- 	  else
- 	    opts->x_recip_mask |= mask;
- 	}
-     }
- 
-   if (TARGET_RECIP_P (opts->x_target_flags))
-     opts->x_recip_mask |= RECIP_MASK_ALL & ~opts->x_recip_mask_explicit;
-   else if (opts_set->x_target_flags & MASK_RECIP)
-     opts->x_recip_mask &= ~(RECIP_MASK_ALL & ~opts->x_recip_mask_explicit);
- 
-   /* Default long double to 64-bit for 32-bit Bionic and to __float128
-      for 64-bit Bionic.  Also default long double to 64-bit for Intel
-      MCU psABI.  */
-   if ((TARGET_HAS_BIONIC || TARGET_IAMCU)
-       && !(opts_set->x_target_flags
- 	   & (MASK_LONG_DOUBLE_64 | MASK_LONG_DOUBLE_128)))
-     opts->x_target_flags |= (TARGET_64BIT
- 			     ? MASK_LONG_DOUBLE_128
- 			     : MASK_LONG_DOUBLE_64);
- 
-   /* Only one of them can be active.  */
-   gcc_assert ((opts->x_target_flags & MASK_LONG_DOUBLE_64) == 0
- 	      || (opts->x_target_flags & MASK_LONG_DOUBLE_128) == 0);
- 
-   /* Handle stack protector */
-   if (!opts_set->x_ix86_stack_protector_guard)
-     {
- #ifdef TARGET_THREAD_SSP_OFFSET
-       if (!TARGET_HAS_BIONIC)
- 	opts->x_ix86_stack_protector_guard = SSP_TLS;
-       else
- #endif
- 	opts->x_ix86_stack_protector_guard = SSP_GLOBAL;
-     }
- 
-   if (opts_set->x_ix86_stack_protector_guard_offset_str)
-     {
-       char *endp;
-       const char *str = opts->x_ix86_stack_protector_guard_offset_str;
- 
-       errno = 0;
-       int64_t offset;
- 
- #if defined(INT64_T_IS_LONG)
-       offset = strtol (str, &endp, 0);
- #else
-       offset = strtoll (str, &endp, 0);
- #endif
- 
-       if (!*str || *endp || errno)
- 	error ("%qs is not a valid number "
- 	       "in %<-mstack-protector-guard-offset=%>", str);
- 
-       if (!IN_RANGE (offset, HOST_WIDE_INT_C (-0x80000000),
- 		     HOST_WIDE_INT_C (0x7fffffff)))
- 	error ("%qs is not a valid offset "
- 	       "in %<-mstack-protector-guard-offset=%>", str);
- 
-       opts->x_ix86_stack_protector_guard_offset = offset;
-     }
- #ifdef TARGET_THREAD_SSP_OFFSET
-   else
-     opts->x_ix86_stack_protector_guard_offset = TARGET_THREAD_SSP_OFFSET;
- #endif
- 
-   if (opts_set->x_ix86_stack_protector_guard_reg_str)
-     {
-       const char *str = opts->x_ix86_stack_protector_guard_reg_str;
-       addr_space_t seg = ADDR_SPACE_GENERIC;
- 
-       /* Discard optional register prefix.  */
-       if (str[0] == '%')
- 	str++;
- 
-       if (strlen (str) == 2 && str[1] == 's')
- 	{
- 	  if (str[0] == 'f')
- 	    seg = ADDR_SPACE_SEG_FS;
- 	  else if (str[0] == 'g')
- 	    seg = ADDR_SPACE_SEG_GS;
- 	}
- 
-       if (seg == ADDR_SPACE_GENERIC)
- 	error ("%qs is not a valid base register "
- 	       "in %<-mstack-protector-guard-reg=%>",
- 	       opts->x_ix86_stack_protector_guard_reg_str);
- 
-       opts->x_ix86_stack_protector_guard_reg = seg;
-     }
-   else
-     {
-       opts->x_ix86_stack_protector_guard_reg = DEFAULT_TLS_SEG_REG;
- 
-       /* The kernel uses a different segment register for performance
- 	 reasons; a system call would not have to trash the userspace
- 	 segment register, which would be expensive.  */
-       if (opts->x_ix86_cmodel == CM_KERNEL)
- 	opts->x_ix86_stack_protector_guard_reg = ADDR_SPACE_SEG_GS;
-     }
- 
-   /* Handle -mmemcpy-strategy= and -mmemset-strategy=  */
-   if (opts->x_ix86_tune_memcpy_strategy)
-     {
-       char *str = xstrdup (opts->x_ix86_tune_memcpy_strategy);
-       ix86_parse_stringop_strategy_string (str, false);
-       free (str);
-     }
- 
-   if (opts->x_ix86_tune_memset_strategy)
-     {
-       char *str = xstrdup (opts->x_ix86_tune_memset_strategy);
-       ix86_parse_stringop_strategy_string (str, true);
-       free (str);
-     }
- 
-   /* Save the initial options in case the user does function specific
-      options.  */
-   if (main_args_p)
-     target_option_default_node = target_option_current_node
-       = build_target_option_node (opts);
- 
-   if (opts->x_flag_cf_protection != CF_NONE)
-     opts->x_flag_cf_protection
-       = (cf_protection_level) (opts->x_flag_cf_protection | CF_SET);
- 
-   if (ix86_tune_features [X86_TUNE_AVOID_256FMA_CHAINS])
-     maybe_set_param_value (PARAM_AVOID_FMA_MAX_BITS, 256,
- 			   opts->x_param_values,
- 			   opts_set->x_param_values);
-   else if (ix86_tune_features [X86_TUNE_AVOID_128FMA_CHAINS])
-     maybe_set_param_value (PARAM_AVOID_FMA_MAX_BITS, 128,
- 			   opts->x_param_values,
- 			   opts_set->x_param_values);
- 
-   /* PR86952: jump table usage with retpolines is slow.
-      The PR provides some numbers about the slowness.  */
-   if (ix86_indirect_branch != indirect_branch_keep
-       && !opts_set->x_flag_jump_tables)
-     opts->x_flag_jump_tables = 0;
- 
-   return true;
- }
- 
- /* Implement the TARGET_OPTION_OVERRIDE hook.  */
- 
- static void
- ix86_option_override (void)
- {
-   ix86_option_override_internal (true, &global_options, &global_options_set);
- }
- 
- /* Implement the TARGET_OFFLOAD_OPTIONS hook.  */
- static char *
- ix86_offload_options (void)
- {
-   if (TARGET_LP64)
-     return xstrdup ("-foffload-abi=lp64");
-   return xstrdup ("-foffload-abi=ilp32");
- }
- 
  /* Update register usage after having seen the compiler flags.  */
  
  static void
--- 449,454 ----
*************** ix86_conditional_register_usage (void)
*** 4868,4882 ****
        if (!fixed_regs[i] && !ix86_function_value_regno_p (i))
  	call_used_regs[i] = 0;
  
!   /* For 32-bit targets, squash the REX registers.  */
    if (! TARGET_64BIT)
      {
        for (i = FIRST_REX_INT_REG; i <= LAST_REX_INT_REG; i++)
! 	fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = "";
        for (i = FIRST_REX_SSE_REG; i <= LAST_REX_SSE_REG; i++)
! 	fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = "";
        for (i = FIRST_EXT_REX_SSE_REG; i <= LAST_EXT_REX_SSE_REG; i++)
! 	fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = "";
      }
  
    /*  See the definition of CALL_USED_REGISTERS in i386.h.  */
--- 465,479 ----
        if (!fixed_regs[i] && !ix86_function_value_regno_p (i))
  	call_used_regs[i] = 0;
  
!   /* For 32-bit targets, disable the REX registers.  */
    if (! TARGET_64BIT)
      {
        for (i = FIRST_REX_INT_REG; i <= LAST_REX_INT_REG; i++)
! 	CLEAR_HARD_REG_BIT (accessible_reg_set, i);
        for (i = FIRST_REX_SSE_REG; i <= LAST_REX_SSE_REG; i++)
! 	CLEAR_HARD_REG_BIT (accessible_reg_set, i);
        for (i = FIRST_EXT_REX_SSE_REG; i <= LAST_EXT_REX_SSE_REG; i++)
! 	CLEAR_HARD_REG_BIT (accessible_reg_set, i);
      }
  
    /*  See the definition of CALL_USED_REGISTERS in i386.h.  */
*************** ix86_conditional_register_usage (void)
*** 4898,4929 ****
  	SET_HARD_REG_BIT (reg_class_contents[(int)CLOBBERED_REGS], i);
      }
  
!   /* If MMX is disabled, squash the registers.  */
    if (! TARGET_MMX)
!     for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
!       if (TEST_HARD_REG_BIT (reg_class_contents[(int)MMX_REGS], i))
! 	fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = "";
  
!   /* If SSE is disabled, squash the registers.  */
    if (! TARGET_SSE)
!     for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
!       if (TEST_HARD_REG_BIT (reg_class_contents[(int)SSE_REGS], i))
! 	fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = "";
  
!   /* If the FPU is disabled, squash the registers.  */
    if (! (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387))
!     for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
!       if (TEST_HARD_REG_BIT (reg_class_contents[(int)FLOAT_REGS], i))
! 	fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = "";
  
!   /* If AVX512F is disabled, squash the registers.  */
    if (! TARGET_AVX512F)
      {
        for (i = FIRST_EXT_REX_SSE_REG; i <= LAST_EXT_REX_SSE_REG; i++)
! 	fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = "";
  
!       for (i = FIRST_MASK_REG; i <= LAST_MASK_REG; i++)
! 	fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = "";
      }
  }
  
--- 495,519 ----
  	SET_HARD_REG_BIT (reg_class_contents[(int)CLOBBERED_REGS], i);
      }
  
!   /* If MMX is disabled, disable the registers.  */
    if (! TARGET_MMX)
!     accessible_reg_set &= ~reg_class_contents[MMX_REGS];
  
!   /* If SSE is disabled, disable the registers.  */
    if (! TARGET_SSE)
!     accessible_reg_set &= ~reg_class_contents[ALL_SSE_REGS];
  
!   /* If the FPU is disabled, disable the registers.  */
    if (! (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387))
!     accessible_reg_set &= ~reg_class_contents[FLOAT_REGS];
  
!   /* If AVX512F is disabled, disable the registers.  */
    if (! TARGET_AVX512F)
      {
        for (i = FIRST_EXT_REX_SSE_REG; i <= LAST_EXT_REX_SSE_REG; i++)
! 	CLEAR_HARD_REG_BIT (accessible_reg_set, i);
  
!       accessible_reg_set &= ~reg_class_contents[ALL_MASK_REGS];
      }
  }
  
*************** ix86_canonicalize_comparison (int *code,
*** 4952,5623 ****
      }
  }
  
- /* Save the current options */
- 
- static void
- ix86_function_specific_save (struct cl_target_option *ptr,
- 			     struct gcc_options *opts)
- {
-   ptr->arch = ix86_arch;
-   ptr->schedule = ix86_schedule;
-   ptr->prefetch_sse = x86_prefetch_sse;
-   ptr->tune = ix86_tune;
-   ptr->branch_cost = ix86_branch_cost;
-   ptr->tune_defaulted = ix86_tune_defaulted;
-   ptr->arch_specified = ix86_arch_specified;
-   ptr->x_ix86_isa_flags_explicit = opts->x_ix86_isa_flags_explicit;
-   ptr->x_ix86_isa_flags2_explicit = opts->x_ix86_isa_flags2_explicit;
-   ptr->x_recip_mask_explicit = opts->x_recip_mask_explicit;
-   ptr->x_ix86_arch_string = opts->x_ix86_arch_string;
-   ptr->x_ix86_tune_string = opts->x_ix86_tune_string;
-   ptr->x_ix86_cmodel = opts->x_ix86_cmodel;
-   ptr->x_ix86_abi = opts->x_ix86_abi;
-   ptr->x_ix86_asm_dialect = opts->x_ix86_asm_dialect;
-   ptr->x_ix86_branch_cost = opts->x_ix86_branch_cost;
-   ptr->x_ix86_dump_tunes = opts->x_ix86_dump_tunes;
-   ptr->x_ix86_force_align_arg_pointer = opts->x_ix86_force_align_arg_pointer;
-   ptr->x_ix86_force_drap = opts->x_ix86_force_drap;
-   ptr->x_ix86_incoming_stack_boundary_arg = opts->x_ix86_incoming_stack_boundary_arg;
-   ptr->x_ix86_pmode = opts->x_ix86_pmode;
-   ptr->x_ix86_preferred_stack_boundary_arg = opts->x_ix86_preferred_stack_boundary_arg;
-   ptr->x_ix86_recip_name = opts->x_ix86_recip_name;
-   ptr->x_ix86_regparm = opts->x_ix86_regparm;
-   ptr->x_ix86_section_threshold = opts->x_ix86_section_threshold;
-   ptr->x_ix86_sse2avx = opts->x_ix86_sse2avx;
-   ptr->x_ix86_stack_protector_guard = opts->x_ix86_stack_protector_guard;
-   ptr->x_ix86_stringop_alg = opts->x_ix86_stringop_alg;
-   ptr->x_ix86_tls_dialect = opts->x_ix86_tls_dialect;
-   ptr->x_ix86_tune_ctrl_string = opts->x_ix86_tune_ctrl_string;
-   ptr->x_ix86_tune_memcpy_strategy = opts->x_ix86_tune_memcpy_strategy;
-   ptr->x_ix86_tune_memset_strategy = opts->x_ix86_tune_memset_strategy;
-   ptr->x_ix86_tune_no_default = opts->x_ix86_tune_no_default;
-   ptr->x_ix86_veclibabi_type = opts->x_ix86_veclibabi_type;
- 
-   /* The fields are char but the variables are not; make sure the
-      values fit in the fields.  */
-   gcc_assert (ptr->arch == ix86_arch);
-   gcc_assert (ptr->schedule == ix86_schedule);
-   gcc_assert (ptr->tune == ix86_tune);
-   gcc_assert (ptr->branch_cost == ix86_branch_cost);
- }
- 
- /* Restore the current options */
- 
- static void
- ix86_function_specific_restore (struct gcc_options *opts,
- 				struct cl_target_option *ptr)
- {
-   enum processor_type old_tune = ix86_tune;
-   enum processor_type old_arch = ix86_arch;
-   unsigned HOST_WIDE_INT ix86_arch_mask;
-   int i;
- 
-   /* We don't change -fPIC.  */
-   opts->x_flag_pic = flag_pic;
- 
-   ix86_arch = (enum processor_type) ptr->arch;
-   ix86_schedule = (enum attr_cpu) ptr->schedule;
-   ix86_tune = (enum processor_type) ptr->tune;
-   x86_prefetch_sse = ptr->prefetch_sse;
-   opts->x_ix86_branch_cost = ptr->branch_cost;
-   ix86_tune_defaulted = ptr->tune_defaulted;
-   ix86_arch_specified = ptr->arch_specified;
-   opts->x_ix86_isa_flags_explicit = ptr->x_ix86_isa_flags_explicit;
-   opts->x_ix86_isa_flags2_explicit = ptr->x_ix86_isa_flags2_explicit;
-   opts->x_recip_mask_explicit = ptr->x_recip_mask_explicit;
-   opts->x_ix86_arch_string = ptr->x_ix86_arch_string;
-   opts->x_ix86_tune_string = ptr->x_ix86_tune_string;
-   opts->x_ix86_cmodel = ptr->x_ix86_cmodel;
-   opts->x_ix86_abi = ptr->x_ix86_abi;
-   opts->x_ix86_asm_dialect = ptr->x_ix86_asm_dialect;
-   opts->x_ix86_branch_cost = ptr->x_ix86_branch_cost;
-   opts->x_ix86_dump_tunes = ptr->x_ix86_dump_tunes;
-   opts->x_ix86_force_align_arg_pointer = ptr->x_ix86_force_align_arg_pointer;
-   opts->x_ix86_force_drap = ptr->x_ix86_force_drap;
-   opts->x_ix86_incoming_stack_boundary_arg = ptr->x_ix86_incoming_stack_boundary_arg;
-   opts->x_ix86_pmode = ptr->x_ix86_pmode;
-   opts->x_ix86_preferred_stack_boundary_arg = ptr->x_ix86_preferred_stack_boundary_arg;
-   opts->x_ix86_recip_name = ptr->x_ix86_recip_name;
-   opts->x_ix86_regparm = ptr->x_ix86_regparm;
-   opts->x_ix86_section_threshold = ptr->x_ix86_section_threshold;
-   opts->x_ix86_sse2avx = ptr->x_ix86_sse2avx;
-   opts->x_ix86_stack_protector_guard = ptr->x_ix86_stack_protector_guard;
-   opts->x_ix86_stringop_alg = ptr->x_ix86_stringop_alg;
-   opts->x_ix86_tls_dialect = ptr->x_ix86_tls_dialect;
-   opts->x_ix86_tune_ctrl_string = ptr->x_ix86_tune_ctrl_string;
-   opts->x_ix86_tune_memcpy_strategy = ptr->x_ix86_tune_memcpy_strategy;
-   opts->x_ix86_tune_memset_strategy = ptr->x_ix86_tune_memset_strategy;
-   opts->x_ix86_tune_no_default = ptr->x_ix86_tune_no_default;
-   opts->x_ix86_veclibabi_type = ptr->x_ix86_veclibabi_type;
-   ix86_tune_cost = processor_cost_table[ix86_tune];
-   /* TODO: ix86_cost should be chosen at instruction or function granuality
-      so for cold code we use size_cost even in !optimize_size compilation.  */
-   if (opts->x_optimize_size)
-     ix86_cost = &ix86_size_cost;
-   else
-     ix86_cost = ix86_tune_cost;
- 
-   /* Recreate the arch feature tests if the arch changed */
-   if (old_arch != ix86_arch)
-     {
-       ix86_arch_mask = HOST_WIDE_INT_1U << ix86_arch;
-       for (i = 0; i < X86_ARCH_LAST; ++i)
- 	ix86_arch_features[i]
- 	  = !!(initial_ix86_arch_features[i] & ix86_arch_mask);
-     }
- 
-   /* Recreate the tune optimization tests */
-   if (old_tune != ix86_tune)
-     set_ix86_tune_features (ix86_tune, false);
- }
- 
- /* Adjust target options after streaming them in.  This is mainly about
-    reconciling them with global options.  */
- 
- static void
- ix86_function_specific_post_stream_in (struct cl_target_option *ptr)
- {
-   /* flag_pic is a global option, but ix86_cmodel is target saved option
-      partly computed from flag_pic.  If flag_pic is on, adjust x_ix86_cmodel
-      for PIC, or error out.  */
-   if (flag_pic)
-     switch (ptr->x_ix86_cmodel)
-       {
-       case CM_SMALL:
- 	ptr->x_ix86_cmodel = CM_SMALL_PIC;
- 	break;
- 
-       case CM_MEDIUM:
- 	ptr->x_ix86_cmodel = CM_MEDIUM_PIC;
- 	break;
- 
-       case CM_LARGE:
- 	ptr->x_ix86_cmodel = CM_LARGE_PIC;
- 	break;
- 
-       case CM_KERNEL:
- 	error ("code model %s does not support PIC mode", "kernel");
- 	break;
- 
-       default:
- 	break;
-       }
-   else
-     switch (ptr->x_ix86_cmodel)
-       {
-       case CM_SMALL_PIC:
- 	ptr->x_ix86_cmodel = CM_SMALL;
- 	break;
- 
-       case CM_MEDIUM_PIC:
- 	ptr->x_ix86_cmodel = CM_MEDIUM;
- 	break;
- 
-       case CM_LARGE_PIC:
- 	ptr->x_ix86_cmodel = CM_LARGE;
- 	break;
- 
-       default:
- 	break;
-       }
- }
- 
- /* Print the current options */
- 
- static void
- ix86_function_specific_print (FILE *file, int indent,
- 			      struct cl_target_option *ptr)
- {
-   char *target_string
-     = ix86_target_string (ptr->x_ix86_isa_flags, ptr->x_ix86_isa_flags2,
- 			  ptr->x_target_flags, ptr->x_ix86_target_flags,
- 			  NULL, NULL, ptr->x_ix86_fpmath, false, true);
- 
-   gcc_assert (ptr->arch < PROCESSOR_max);
-   fprintf (file, "%*sarch = %d (%s)\n",
- 	   indent, "",
- 	   ptr->arch, processor_names[ptr->arch]);
- 
-   gcc_assert (ptr->tune < PROCESSOR_max);
-   fprintf (file, "%*stune = %d (%s)\n",
- 	   indent, "",
- 	   ptr->tune, processor_names[ptr->tune]);
- 
-   fprintf (file, "%*sbranch_cost = %d\n", indent, "", ptr->branch_cost);
- 
-   if (target_string)
-     {
-       fprintf (file, "%*s%s\n", indent, "", target_string);
-       free (target_string);
-     }
- }
- 
- 
- /* Inner function to process the attribute((target(...))), take an argument and
-    set the current options from the argument. If we have a list, recursively go
-    over the list.  */
- 
- static bool
- ix86_valid_target_attribute_inner_p (tree args, char *p_strings[],
- 				     struct gcc_options *opts,
- 				     struct gcc_options *opts_set,
- 				     struct gcc_options *enum_opts_set)
- {
-   char *next_optstr;
-   bool ret = true;
- 
- #define IX86_ATTR_ISA(S,O)   { S, sizeof (S)-1, ix86_opt_isa, O, 0 }
- #define IX86_ATTR_STR(S,O)   { S, sizeof (S)-1, ix86_opt_str, O, 0 }
- #define IX86_ATTR_ENUM(S,O)  { S, sizeof (S)-1, ix86_opt_enum, O, 0 }
- #define IX86_ATTR_YES(S,O,M) { S, sizeof (S)-1, ix86_opt_yes, O, M }
- #define IX86_ATTR_NO(S,O,M)  { S, sizeof (S)-1, ix86_opt_no,  O, M }
- 
-   enum ix86_opt_type
-   {
-     ix86_opt_unknown,
-     ix86_opt_yes,
-     ix86_opt_no,
-     ix86_opt_str,
-     ix86_opt_enum,
-     ix86_opt_isa
-   };
- 
-   static const struct
-   {
-     const char *string;
-     size_t len;
-     enum ix86_opt_type type;
-     int opt;
-     int mask;
-   } attrs[] = {
-     /* isa options */
-     IX86_ATTR_ISA ("pconfig",	OPT_mpconfig),
-     IX86_ATTR_ISA ("wbnoinvd",	OPT_mwbnoinvd),
-     IX86_ATTR_ISA ("sgx",	OPT_msgx),
-     IX86_ATTR_ISA ("avx5124fmaps", OPT_mavx5124fmaps),
-     IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw),
-     IX86_ATTR_ISA ("avx512vpopcntdq", OPT_mavx512vpopcntdq),
-     IX86_ATTR_ISA ("avx512vbmi2", OPT_mavx512vbmi2),
-     IX86_ATTR_ISA ("avx512vnni", OPT_mavx512vnni),
-     IX86_ATTR_ISA ("avx512bitalg", OPT_mavx512bitalg),
- 
-     IX86_ATTR_ISA ("avx512vbmi", OPT_mavx512vbmi),
-     IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma),
-     IX86_ATTR_ISA ("avx512vl",	OPT_mavx512vl),
-     IX86_ATTR_ISA ("avx512bw",	OPT_mavx512bw),
-     IX86_ATTR_ISA ("avx512dq",	OPT_mavx512dq),
-     IX86_ATTR_ISA ("avx512er",	OPT_mavx512er),
-     IX86_ATTR_ISA ("avx512pf",	OPT_mavx512pf),
-     IX86_ATTR_ISA ("avx512cd",	OPT_mavx512cd),
-     IX86_ATTR_ISA ("avx512f",	OPT_mavx512f),
-     IX86_ATTR_ISA ("avx2",	OPT_mavx2),
-     IX86_ATTR_ISA ("fma",	OPT_mfma),
-     IX86_ATTR_ISA ("xop",	OPT_mxop),
-     IX86_ATTR_ISA ("fma4",	OPT_mfma4),
-     IX86_ATTR_ISA ("f16c",	OPT_mf16c),
-     IX86_ATTR_ISA ("avx",	OPT_mavx),
-     IX86_ATTR_ISA ("sse4",	OPT_msse4),
-     IX86_ATTR_ISA ("sse4.2",	OPT_msse4_2),
-     IX86_ATTR_ISA ("sse4.1",	OPT_msse4_1),
-     IX86_ATTR_ISA ("sse4a",	OPT_msse4a),
-     IX86_ATTR_ISA ("ssse3",	OPT_mssse3),
-     IX86_ATTR_ISA ("sse3",	OPT_msse3),
-     IX86_ATTR_ISA ("aes",	OPT_maes),
-     IX86_ATTR_ISA ("sha",	OPT_msha),
-     IX86_ATTR_ISA ("pclmul",	OPT_mpclmul),
-     IX86_ATTR_ISA ("sse2",	OPT_msse2),
-     IX86_ATTR_ISA ("sse",	OPT_msse),
-     IX86_ATTR_ISA ("3dnowa",	OPT_m3dnowa),
-     IX86_ATTR_ISA ("3dnow",	OPT_m3dnow),
-     IX86_ATTR_ISA ("mmx",	OPT_mmmx),
-     IX86_ATTR_ISA ("rtm",	OPT_mrtm),
-     IX86_ATTR_ISA ("prfchw",	OPT_mprfchw),
-     IX86_ATTR_ISA ("rdseed",	OPT_mrdseed),
-     IX86_ATTR_ISA ("adx",	OPT_madx),
-     IX86_ATTR_ISA ("prefetchwt1", OPT_mprefetchwt1),
-     IX86_ATTR_ISA ("clflushopt", OPT_mclflushopt),
-     IX86_ATTR_ISA ("xsaves",	OPT_mxsaves),
-     IX86_ATTR_ISA ("xsavec",	OPT_mxsavec),
-     IX86_ATTR_ISA ("xsaveopt",	OPT_mxsaveopt),
-     IX86_ATTR_ISA ("xsave",	OPT_mxsave),
-     IX86_ATTR_ISA ("abm",	OPT_mabm),
-     IX86_ATTR_ISA ("bmi",	OPT_mbmi),
-     IX86_ATTR_ISA ("bmi2",	OPT_mbmi2),
-     IX86_ATTR_ISA ("lzcnt",	OPT_mlzcnt),
-     IX86_ATTR_ISA ("tbm",	OPT_mtbm),
-     IX86_ATTR_ISA ("popcnt",	OPT_mpopcnt),
-     IX86_ATTR_ISA ("cx16",	OPT_mcx16),
-     IX86_ATTR_ISA ("sahf",	OPT_msahf),
-     IX86_ATTR_ISA ("movbe",	OPT_mmovbe),
-     IX86_ATTR_ISA ("crc32",	OPT_mcrc32),
-     IX86_ATTR_ISA ("fsgsbase",	OPT_mfsgsbase),
-     IX86_ATTR_ISA ("rdrnd",	OPT_mrdrnd),
-     IX86_ATTR_ISA ("mwaitx",	OPT_mmwaitx),
-     IX86_ATTR_ISA ("clzero",	OPT_mclzero),
-     IX86_ATTR_ISA ("pku",	OPT_mpku),
-     IX86_ATTR_ISA ("lwp",	OPT_mlwp),
-     IX86_ATTR_ISA ("hle",	OPT_mhle),
-     IX86_ATTR_ISA ("fxsr",	OPT_mfxsr),
-     IX86_ATTR_ISA ("clwb",	OPT_mclwb),
-     IX86_ATTR_ISA ("rdpid",	OPT_mrdpid),
-     IX86_ATTR_ISA ("gfni",	OPT_mgfni),
-     IX86_ATTR_ISA ("shstk",	OPT_mshstk),
-     IX86_ATTR_ISA ("vaes",	OPT_mvaes),
-     IX86_ATTR_ISA ("vpclmulqdq", OPT_mvpclmulqdq),
-     IX86_ATTR_ISA ("movdiri", OPT_mmovdiri),
-     IX86_ATTR_ISA ("movdir64b", OPT_mmovdir64b),
-     IX86_ATTR_ISA ("waitpkg", OPT_mwaitpkg),
-     IX86_ATTR_ISA ("cldemote", OPT_mcldemote),
-     IX86_ATTR_ISA ("ptwrite",   OPT_mptwrite),
- 
-     /* enum options */
-     IX86_ATTR_ENUM ("fpmath=",	OPT_mfpmath_),
- 
-     /* string options */
-     IX86_ATTR_STR ("arch=",	IX86_FUNCTION_SPECIFIC_ARCH),
-     IX86_ATTR_STR ("tune=",	IX86_FUNCTION_SPECIFIC_TUNE),
- 
-     /* flag options */
-     IX86_ATTR_YES ("cld",
- 		   OPT_mcld,
- 		   MASK_CLD),
- 
-     IX86_ATTR_NO ("fancy-math-387",
- 		  OPT_mfancy_math_387,
- 		  MASK_NO_FANCY_MATH_387),
- 
-     IX86_ATTR_YES ("ieee-fp",
- 		   OPT_mieee_fp,
- 		   MASK_IEEE_FP),
- 
-     IX86_ATTR_YES ("inline-all-stringops",
- 		   OPT_minline_all_stringops,
- 		   MASK_INLINE_ALL_STRINGOPS),
- 
-     IX86_ATTR_YES ("inline-stringops-dynamically",
- 		   OPT_minline_stringops_dynamically,
- 		   MASK_INLINE_STRINGOPS_DYNAMICALLY),
- 
-     IX86_ATTR_NO ("align-stringops",
- 		  OPT_mno_align_stringops,
- 		  MASK_NO_ALIGN_STRINGOPS),
- 
-     IX86_ATTR_YES ("recip",
- 		   OPT_mrecip,
- 		   MASK_RECIP),
- 
-   };
- 
-   /* If this is a list, recurse to get the options.  */
-   if (TREE_CODE (args) == TREE_LIST)
-     {
-       bool ret = true;
- 
-       for (; args; args = TREE_CHAIN (args))
- 	if (TREE_VALUE (args)
- 	    && !ix86_valid_target_attribute_inner_p (TREE_VALUE (args),
- 						     p_strings, opts, opts_set,
- 						     enum_opts_set))
- 	  ret = false;
- 
-       return ret;
-     }
- 
-   else if (TREE_CODE (args) != STRING_CST)
-     {
-       error ("attribute %<target%> argument not a string");
-       return false;
-     }
- 
-   /* Handle multiple arguments separated by commas.  */
-   next_optstr = ASTRDUP (TREE_STRING_POINTER (args));
- 
-   while (next_optstr && *next_optstr != '\0')
-     {
-       char *p = next_optstr;
-       char *orig_p = p;
-       char *comma = strchr (next_optstr, ',');
-       const char *opt_string;
-       size_t len, opt_len;
-       int opt;
-       bool opt_set_p;
-       char ch;
-       unsigned i;
-       enum ix86_opt_type type = ix86_opt_unknown;
-       int mask = 0;
- 
-       if (comma)
- 	{
- 	  *comma = '\0';
- 	  len = comma - next_optstr;
- 	  next_optstr = comma + 1;
- 	}
-       else
- 	{
- 	  len = strlen (p);
- 	  next_optstr = NULL;
- 	}
- 
-       /* Recognize no-xxx.  */
-       if (len > 3 && p[0] == 'n' && p[1] == 'o' && p[2] == '-')
- 	{
- 	  opt_set_p = false;
- 	  p += 3;
- 	  len -= 3;
- 	}
-       else
- 	opt_set_p = true;
- 
-       /* Find the option.  */
-       ch = *p;
-       opt = N_OPTS;
-       for (i = 0; i < ARRAY_SIZE (attrs); i++)
- 	{
- 	  type = attrs[i].type;
- 	  opt_len = attrs[i].len;
- 	  if (ch == attrs[i].string[0]
- 	      && ((type != ix86_opt_str && type != ix86_opt_enum)
- 		  ? len == opt_len
- 		  : len > opt_len)
- 	      && memcmp (p, attrs[i].string, opt_len) == 0)
- 	    {
- 	      opt = attrs[i].opt;
- 	      mask = attrs[i].mask;
- 	      opt_string = attrs[i].string;
- 	      break;
- 	    }
- 	}
- 
-       /* Process the option.  */
-       if (opt == N_OPTS)
- 	{
- 	  error ("attribute(target(\"%s\")) is unknown", orig_p);
- 	  ret = false;
- 	}
- 
-       else if (type == ix86_opt_isa)
- 	{
- 	  struct cl_decoded_option decoded;
- 
- 	  generate_option (opt, NULL, opt_set_p, CL_TARGET, &decoded);
- 	  ix86_handle_option (opts, opts_set,
- 			      &decoded, input_location);
- 	}
- 
-       else if (type == ix86_opt_yes || type == ix86_opt_no)
- 	{
- 	  if (type == ix86_opt_no)
- 	    opt_set_p = !opt_set_p;
- 
- 	  if (opt_set_p)
- 	    opts->x_target_flags |= mask;
- 	  else
- 	    opts->x_target_flags &= ~mask;
- 	}
- 
-       else if (type == ix86_opt_str)
- 	{
- 	  if (p_strings[opt])
- 	    {
- 	      error ("option(\"%s\") was already specified", opt_string);
- 	      ret = false;
- 	    }
- 	  else
- 	    {
- 	      p_strings[opt] = xstrdup (p + opt_len);
- 	      if (opt == IX86_FUNCTION_SPECIFIC_ARCH)
- 		{
- 		  /* If arch= is set,  clear all bits in x_ix86_isa_flags,
- 		     except for ISA_64BIT, ABI_64, ABI_X32, and CODE16
- 		     and all bits in x_ix86_isa_flags2.  */
- 		  opts->x_ix86_isa_flags &= (OPTION_MASK_ISA_64BIT
- 					     | OPTION_MASK_ABI_64
- 					     | OPTION_MASK_ABI_X32
- 					     | OPTION_MASK_CODE16);
- 		  opts->x_ix86_isa_flags_explicit &= (OPTION_MASK_ISA_64BIT
- 						      | OPTION_MASK_ABI_64
- 						      | OPTION_MASK_ABI_X32
- 						      | OPTION_MASK_CODE16);
- 		  opts->x_ix86_isa_flags2 = 0;
- 		  opts->x_ix86_isa_flags2_explicit = 0;
- 		}
- 	    }
- 	}
- 
-       else if (type == ix86_opt_enum)
- 	{
- 	  bool arg_ok;
- 	  int value;
- 
- 	  arg_ok = opt_enum_arg_to_value (opt, p + opt_len, &value, CL_TARGET);
- 	  if (arg_ok)
- 	    set_option (opts, enum_opts_set, opt, value,
- 			p + opt_len, DK_UNSPECIFIED, input_location,
- 			global_dc);
- 	  else
- 	    {
- 	      error ("attribute(target(\"%s\")) is unknown", orig_p);
- 	      ret = false;
- 	    }
- 	}
- 
-       else
- 	gcc_unreachable ();
-     }
- 
-   return ret;
- }
- 
- /* Release allocated strings.  */
- static void
- release_options_strings (char **option_strings)
- {
-   /* Free up memory allocated to hold the strings */
-   for (unsigned i = 0; i < IX86_FUNCTION_SPECIFIC_MAX; i++)
-     free (option_strings[i]);
- }
- 
- /* Return a TARGET_OPTION_NODE tree of the target options listed or NULL.  */
- 
- tree
- ix86_valid_target_attribute_tree (tree args,
- 				  struct gcc_options *opts,
- 				  struct gcc_options *opts_set)
- {
-   const char *orig_arch_string = opts->x_ix86_arch_string;
-   const char *orig_tune_string = opts->x_ix86_tune_string;
-   enum fpmath_unit orig_fpmath_set = opts_set->x_ix86_fpmath;
-   int orig_tune_defaulted = ix86_tune_defaulted;
-   int orig_arch_specified = ix86_arch_specified;
-   char *option_strings[IX86_FUNCTION_SPECIFIC_MAX] = { NULL, NULL };
-   tree t = NULL_TREE;
-   struct cl_target_option *def
-     = TREE_TARGET_OPTION (target_option_default_node);
-   struct gcc_options enum_opts_set;
- 
-   memset (&enum_opts_set, 0, sizeof (enum_opts_set));
- 
-   /* Process each of the options on the chain.  */
-   if (! ix86_valid_target_attribute_inner_p (args, option_strings, opts,
- 					     opts_set, &enum_opts_set))
-     return error_mark_node;
- 
-   /* If the changed options are different from the default, rerun
-      ix86_option_override_internal, and then save the options away.
-      The string options are attribute options, and will be undone
-      when we copy the save structure.  */
-   if (opts->x_ix86_isa_flags != def->x_ix86_isa_flags
-       || opts->x_ix86_isa_flags2 != def->x_ix86_isa_flags2
-       || opts->x_target_flags != def->x_target_flags
-       || option_strings[IX86_FUNCTION_SPECIFIC_ARCH]
-       || option_strings[IX86_FUNCTION_SPECIFIC_TUNE]
-       || enum_opts_set.x_ix86_fpmath)
-     {
-       /* If we are using the default tune= or arch=, undo the string assigned,
- 	 and use the default.  */
-       if (option_strings[IX86_FUNCTION_SPECIFIC_ARCH])
- 	opts->x_ix86_arch_string
- 	  = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_ARCH]);
-       else if (!orig_arch_specified)
- 	opts->x_ix86_arch_string = NULL;
- 
-       if (option_strings[IX86_FUNCTION_SPECIFIC_TUNE])
- 	opts->x_ix86_tune_string
- 	  = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_TUNE]);
-       else if (orig_tune_defaulted)
- 	opts->x_ix86_tune_string = NULL;
- 
-       /* If fpmath= is not set, and we now have sse2 on 32-bit, use it.  */
-       if (enum_opts_set.x_ix86_fpmath)
- 	opts_set->x_ix86_fpmath = (enum fpmath_unit) 1;
- 
-       /* Do any overrides, such as arch=xxx, or tune=xxx support.  */
-       bool r = ix86_option_override_internal (false, opts, opts_set);
-       if (!r)
- 	{
- 	  release_options_strings (option_strings);
- 	  return error_mark_node;
- 	}
- 
-       /* Add any builtin functions with the new isa if any.  */
-       ix86_add_new_builtins (opts->x_ix86_isa_flags, opts->x_ix86_isa_flags2);
- 
-       /* Save the current options unless we are validating options for
- 	 #pragma.  */
-       t = build_target_option_node (opts);
- 
-       opts->x_ix86_arch_string = orig_arch_string;
-       opts->x_ix86_tune_string = orig_tune_string;
-       opts_set->x_ix86_fpmath = orig_fpmath_set;
- 
-       release_options_strings (option_strings);
-     }
- 
-   return t;
- }
- 
- /* Hook to validate attribute((target("string"))).  */
- 
- static bool
- ix86_valid_target_attribute_p (tree fndecl,
- 			       tree ARG_UNUSED (name),
- 			       tree args,
- 			       int ARG_UNUSED (flags))
- {
-   struct gcc_options func_options;
-   tree new_target, new_optimize;
-   bool ret = true;
- 
-   /* attribute((target("default"))) does nothing, beyond
-      affecting multi-versioning.  */
-   if (TREE_VALUE (args)
-       && TREE_CODE (TREE_VALUE (args)) == STRING_CST
-       && TREE_CHAIN (args) == NULL_TREE
-       && strcmp (TREE_STRING_POINTER (TREE_VALUE (args)), "default") == 0)
-     return true;
- 
-   tree old_optimize = build_optimization_node (&global_options);
- 
-   /* Get the optimization options of the current function.  */  
-   tree func_optimize = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);
-  
-   if (!func_optimize)
-     func_optimize = old_optimize;
- 
-   /* Init func_options.  */
-   memset (&func_options, 0, sizeof (func_options));
-   init_options_struct (&func_options, NULL);
-   lang_hooks.init_options_struct (&func_options);
-  
-   cl_optimization_restore (&func_options,
- 			   TREE_OPTIMIZATION (func_optimize));
- 
-   /* Initialize func_options to the default before its target options can
-      be set.  */
-   cl_target_option_restore (&func_options,
- 			    TREE_TARGET_OPTION (target_option_default_node));
- 
-   new_target = ix86_valid_target_attribute_tree (args, &func_options,
- 						 &global_options_set);
- 
-   new_optimize = build_optimization_node (&func_options);
- 
-   if (new_target == error_mark_node)
-     ret = false;
- 
-   else if (fndecl && new_target)
-     {
-       DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = new_target;
- 
-       if (old_optimize != new_optimize)
- 	DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl) = new_optimize;
-     }
- 
-   finalize_options_struct (&func_options);
- 
-   return ret;
- }
- 
  
  /* Hook to determine if one function can safely inline another.  */
  
--- 542,547 ----
*************** ix86_can_inline_p (tree caller, tree cal
*** 5697,5963 ****
  
    return ret;
  }
- 
- 
- /* Remember the last target of ix86_set_current_function.  */
- static GTY(()) tree ix86_previous_fndecl;
- 
- /* Set targets globals to the default (or current #pragma GCC target
-    if active).  Invalidate ix86_previous_fndecl cache.  */
- 
- void
- ix86_reset_previous_fndecl (void)
- {
-   tree new_tree = target_option_current_node;
-   cl_target_option_restore (&global_options, TREE_TARGET_OPTION (new_tree));
-   if (TREE_TARGET_GLOBALS (new_tree))
-     restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
-   else if (new_tree == target_option_default_node)
-     restore_target_globals (&default_target_globals);
-   else
-     TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
-   ix86_previous_fndecl = NULL_TREE;
- }
- 
- /* Set the func_type field from the function FNDECL.  */
- 
- static void
- ix86_set_func_type (tree fndecl)
- {
-   if (cfun->machine->func_type == TYPE_UNKNOWN)
-     {
-       if (lookup_attribute ("interrupt",
- 			    TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))
- 	{
- 	  if (ix86_function_naked (fndecl))
- 	    error_at (DECL_SOURCE_LOCATION (fndecl),
- 		      "interrupt and naked attributes are not compatible");
- 
- 	  int nargs = 0;
- 	  for (tree arg = DECL_ARGUMENTS (fndecl);
- 	       arg;
- 	       arg = TREE_CHAIN (arg))
- 	    nargs++;
- 	  cfun->machine->no_caller_saved_registers = true;
- 	  cfun->machine->func_type
- 	    = nargs == 2 ? TYPE_EXCEPTION : TYPE_INTERRUPT;
- 
- 	  ix86_optimize_mode_switching[X86_DIRFLAG] = 1;
- 
- 	  /* Only dwarf2out.c can handle -WORD(AP) as a pointer argument.  */
- 	  if (write_symbols != NO_DEBUG && write_symbols != DWARF2_DEBUG)
- 	    sorry ("only DWARF debug format is supported for interrupt "
- 		   "service routine");
- 	}
-       else
- 	{
- 	  cfun->machine->func_type = TYPE_NORMAL;
- 	  if (lookup_attribute ("no_caller_saved_registers",
- 				TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))
- 	    cfun->machine->no_caller_saved_registers = true;
- 	}
-     }
- }
- 
- /* Set the indirect_branch_type field from the function FNDECL.  */
- 
- static void
- ix86_set_indirect_branch_type (tree fndecl)
- {
-   if (cfun->machine->indirect_branch_type == indirect_branch_unset)
-     {
-       tree attr = lookup_attribute ("indirect_branch",
- 				    DECL_ATTRIBUTES (fndecl));
-       if (attr != NULL)
- 	{
- 	  tree args = TREE_VALUE (attr);
- 	  if (args == NULL)
- 	    gcc_unreachable ();
- 	  tree cst = TREE_VALUE (args);
- 	  if (strcmp (TREE_STRING_POINTER (cst), "keep") == 0)
- 	    cfun->machine->indirect_branch_type = indirect_branch_keep;
- 	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk") == 0)
- 	    cfun->machine->indirect_branch_type = indirect_branch_thunk;
- 	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk-inline") == 0)
- 	    cfun->machine->indirect_branch_type = indirect_branch_thunk_inline;
- 	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk-extern") == 0)
- 	    cfun->machine->indirect_branch_type = indirect_branch_thunk_extern;
- 	  else
- 	    gcc_unreachable ();
- 	}
-       else
- 	cfun->machine->indirect_branch_type = ix86_indirect_branch;
- 
-       /* -mcmodel=large is not compatible with -mindirect-branch=thunk
- 	 nor -mindirect-branch=thunk-extern.  */
-       if ((ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
- 	  && ((cfun->machine->indirect_branch_type
- 	       == indirect_branch_thunk_extern)
- 	      || (cfun->machine->indirect_branch_type
- 		  == indirect_branch_thunk)))
- 	error ("%<-mindirect-branch=%s%> and %<-mcmodel=large%> are not "
- 	       "compatible",
- 	       ((cfun->machine->indirect_branch_type
- 		 == indirect_branch_thunk_extern)
- 		? "thunk-extern" : "thunk"));
- 
-       if (cfun->machine->indirect_branch_type != indirect_branch_keep
- 	  && (flag_cf_protection & CF_RETURN))
- 	error ("%<-mindirect-branch%> and %<-fcf-protection%> are not "
- 	       "compatible");
-     }
- 
-   if (cfun->machine->function_return_type == indirect_branch_unset)
-     {
-       tree attr = lookup_attribute ("function_return",
- 				    DECL_ATTRIBUTES (fndecl));
-       if (attr != NULL)
- 	{
- 	  tree args = TREE_VALUE (attr);
- 	  if (args == NULL)
- 	    gcc_unreachable ();
- 	  tree cst = TREE_VALUE (args);
- 	  if (strcmp (TREE_STRING_POINTER (cst), "keep") == 0)
- 	    cfun->machine->function_return_type = indirect_branch_keep;
- 	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk") == 0)
- 	    cfun->machine->function_return_type = indirect_branch_thunk;
- 	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk-inline") == 0)
- 	    cfun->machine->function_return_type = indirect_branch_thunk_inline;
- 	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk-extern") == 0)
- 	    cfun->machine->function_return_type = indirect_branch_thunk_extern;
- 	  else
- 	    gcc_unreachable ();
- 	}
-       else
- 	cfun->machine->function_return_type = ix86_function_return;
- 
-       /* -mcmodel=large is not compatible with -mfunction-return=thunk
- 	 nor -mfunction-return=thunk-extern.  */
-       if ((ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
- 	  && ((cfun->machine->function_return_type
- 	       == indirect_branch_thunk_extern)
- 	      || (cfun->machine->function_return_type
- 		  == indirect_branch_thunk)))
- 	error ("%<-mfunction-return=%s%> and %<-mcmodel=large%> are not "
- 	       "compatible",
- 	       ((cfun->machine->function_return_type
- 		 == indirect_branch_thunk_extern)
- 		? "thunk-extern" : "thunk"));
- 
-       if (cfun->machine->function_return_type != indirect_branch_keep
- 	  && (flag_cf_protection & CF_RETURN))
- 	error ("%<-mfunction-return%> and %<-fcf-protection%> are not "
- 	       "compatible");
-     }
- }
- 
- /* Establish appropriate back-end context for processing the function
-    FNDECL.  The argument might be NULL to indicate processing at top
-    level, outside of any function scope.  */
- static void
- ix86_set_current_function (tree fndecl)
- {
-   /* Only change the context if the function changes.  This hook is called
-      several times in the course of compiling a function, and we don't want to
-      slow things down too much or call target_reinit when it isn't safe.  */
-   if (fndecl == ix86_previous_fndecl)
-     {
-       /* There may be 2 function bodies for the same function FNDECL,
- 	 one is extern inline and one isn't.  Call ix86_set_func_type
- 	 to set the func_type field.  */
-       if (fndecl != NULL_TREE)
- 	{
- 	  ix86_set_func_type (fndecl);
- 	  ix86_set_indirect_branch_type (fndecl);
- 	}
-       return;
-     }
- 
-   tree old_tree;
-   if (ix86_previous_fndecl == NULL_TREE)
-     old_tree = target_option_current_node;
-   else if (DECL_FUNCTION_SPECIFIC_TARGET (ix86_previous_fndecl))
-     old_tree = DECL_FUNCTION_SPECIFIC_TARGET (ix86_previous_fndecl);
-   else
-     old_tree = target_option_default_node;
- 
-   if (fndecl == NULL_TREE)
-     {
-       if (old_tree != target_option_current_node)
- 	ix86_reset_previous_fndecl ();
-       return;
-     }
- 
-   ix86_set_func_type (fndecl);
-   ix86_set_indirect_branch_type (fndecl);
- 
-   tree new_tree = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
-   if (new_tree == NULL_TREE)
-     new_tree = target_option_default_node;
- 
-   if (old_tree != new_tree)
-     {
-       cl_target_option_restore (&global_options, TREE_TARGET_OPTION (new_tree));
-       if (TREE_TARGET_GLOBALS (new_tree))
- 	restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
-       else if (new_tree == target_option_default_node)
- 	restore_target_globals (&default_target_globals);
-       else
- 	TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
-     }
-   ix86_previous_fndecl = fndecl;
- 
-   static bool prev_no_caller_saved_registers;
- 
-   /* 64-bit MS and SYSV ABI have different set of call used registers.
-      Avoid expensive re-initialization of init_regs each time we switch
-      function context.  */
-   if (TARGET_64BIT
-       && (call_used_regs[SI_REG]
- 	  == (cfun->machine->call_abi == MS_ABI)))
-     reinit_regs ();
-   /* Need to re-initialize init_regs if caller-saved registers are
-      changed.  */
-   else if (prev_no_caller_saved_registers
- 	   != cfun->machine->no_caller_saved_registers)
-     reinit_regs ();
- 
-   if (cfun->machine->func_type != TYPE_NORMAL
-       || cfun->machine->no_caller_saved_registers)
-     {
-       /* Don't allow SSE, MMX nor x87 instructions since they
- 	 may change processor state.  */
-       const char *isa;
-       if (TARGET_SSE)
- 	isa = "SSE";
-       else if (TARGET_MMX)
- 	isa = "MMX/3Dnow";
-       else if (TARGET_80387)
- 	isa = "80387";
-       else
- 	isa = NULL;
-       if (isa != NULL)
- 	{
- 	  if (cfun->machine->func_type != TYPE_NORMAL)
- 	    sorry (cfun->machine->func_type == TYPE_EXCEPTION
- 		   ? G_("%s instructions aren%'t allowed in an"
- 			" exception service routine")
- 		   : G_("%s instructions aren%'t allowed in an"
- 			" interrupt service routine"),
- 		   isa);
- 	  else
- 	    sorry ("%s instructions aren%'t allowed in a function with "
- 		   "the %<no_caller_saved_registers%> attribute", isa);
- 	  /* Don't issue the same error twice.  */
- 	  cfun->machine->func_type = TYPE_NORMAL;
- 	  cfun->machine->no_caller_saved_registers = false;
- 	}
-     }
- 
-   prev_no_caller_saved_registers
-     = cfun->machine->no_caller_saved_registers;
- }
- 
  
  /* Return true if this goes in large data/bss.  */
  
--- 621,626 ----
*************** x86_64_elf_section_type_flags (tree decl
*** 6088,6095 ****
      flags |= SECTION_RELRO;
  
    if (strcmp (name, ".lbss") == 0
!       || strncmp (name, ".lbss.", 5) == 0
!       || strncmp (name, ".gnu.linkonce.lb.", 16) == 0)
      flags |= SECTION_BSS;
  
    return flags;
--- 751,759 ----
      flags |= SECTION_RELRO;
  
    if (strcmp (name, ".lbss") == 0
!       || strncmp (name, ".lbss.", sizeof (".lbss.") - 1) == 0
!       || strncmp (name, ".gnu.linkonce.lb.",
! 		  sizeof (".gnu.linkonce.lb.") - 1) == 0)
      flags |= SECTION_BSS;
  
    return flags;
*************** ix86_function_ok_for_sibcall (tree decl,
*** 6334,6514 ****
    return true;
  }
  
- /* Handle "cdecl", "stdcall", "fastcall", "regparm", "thiscall",
-    and "sseregparm" calling convention attributes;
-    arguments as in struct attribute_spec.handler.  */
- 
- static tree
- ix86_handle_cconv_attribute (tree *node, tree name, tree args, int,
- 			     bool *no_add_attrs)
- {
-   if (TREE_CODE (*node) != FUNCTION_TYPE
-       && TREE_CODE (*node) != METHOD_TYPE
-       && TREE_CODE (*node) != FIELD_DECL
-       && TREE_CODE (*node) != TYPE_DECL)
-     {
-       warning (OPT_Wattributes, "%qE attribute only applies to functions",
- 	       name);
-       *no_add_attrs = true;
-       return NULL_TREE;
-     }
- 
-   /* Can combine regparm with all attributes but fastcall, and thiscall.  */
-   if (is_attribute_p ("regparm", name))
-     {
-       tree cst;
- 
-       if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
-         {
- 	  error ("fastcall and regparm attributes are not compatible");
- 	}
- 
-       if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
- 	{
- 	  error ("regparam and thiscall attributes are not compatible");
- 	}
- 
-       cst = TREE_VALUE (args);
-       if (TREE_CODE (cst) != INTEGER_CST)
- 	{
- 	  warning (OPT_Wattributes,
- 		   "%qE attribute requires an integer constant argument",
- 		   name);
- 	  *no_add_attrs = true;
- 	}
-       else if (compare_tree_int (cst, REGPARM_MAX) > 0)
- 	{
- 	  warning (OPT_Wattributes, "argument to %qE attribute larger than %d",
- 		   name, REGPARM_MAX);
- 	  *no_add_attrs = true;
- 	}
- 
-       return NULL_TREE;
-     }
- 
-   if (TARGET_64BIT)
-     {
-       /* Do not warn when emulating the MS ABI.  */
-       if ((TREE_CODE (*node) != FUNCTION_TYPE
- 	   && TREE_CODE (*node) != METHOD_TYPE)
- 	  || ix86_function_type_abi (*node) != MS_ABI)
- 	warning (OPT_Wattributes, "%qE attribute ignored",
- 	         name);
-       *no_add_attrs = true;
-       return NULL_TREE;
-     }
- 
-   /* Can combine fastcall with stdcall (redundant) and sseregparm.  */
-   if (is_attribute_p ("fastcall", name))
-     {
-       if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
-         {
- 	  error ("fastcall and cdecl attributes are not compatible");
- 	}
-       if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
-         {
- 	  error ("fastcall and stdcall attributes are not compatible");
- 	}
-       if (lookup_attribute ("regparm", TYPE_ATTRIBUTES (*node)))
-         {
- 	  error ("fastcall and regparm attributes are not compatible");
- 	}
-       if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
- 	{
- 	  error ("fastcall and thiscall attributes are not compatible");
- 	}
-     }
- 
-   /* Can combine stdcall with fastcall (redundant), regparm and
-      sseregparm.  */
-   else if (is_attribute_p ("stdcall", name))
-     {
-       if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
-         {
- 	  error ("stdcall and cdecl attributes are not compatible");
- 	}
-       if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
-         {
- 	  error ("stdcall and fastcall attributes are not compatible");
- 	}
-       if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
- 	{
- 	  error ("stdcall and thiscall attributes are not compatible");
- 	}
-     }
- 
-   /* Can combine cdecl with regparm and sseregparm.  */
-   else if (is_attribute_p ("cdecl", name))
-     {
-       if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
-         {
- 	  error ("stdcall and cdecl attributes are not compatible");
- 	}
-       if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
-         {
- 	  error ("fastcall and cdecl attributes are not compatible");
- 	}
-       if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
- 	{
- 	  error ("cdecl and thiscall attributes are not compatible");
- 	}
-     }
-   else if (is_attribute_p ("thiscall", name))
-     {
-       if (TREE_CODE (*node) != METHOD_TYPE && pedantic)
- 	warning (OPT_Wattributes, "%qE attribute is used for non-class method",
- 	         name);
-       if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
- 	{
- 	  error ("stdcall and thiscall attributes are not compatible");
- 	}
-       if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
- 	{
- 	  error ("fastcall and thiscall attributes are not compatible");
- 	}
-       if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
- 	{
- 	  error ("cdecl and thiscall attributes are not compatible");
- 	}
-     }
- 
-   /* Can combine sseregparm with all attributes.  */
- 
-   return NULL_TREE;
- }
- 
- /* The transactional memory builtins are implicitly regparm or fastcall
-    depending on the ABI.  Override the generic do-nothing attribute that
-    these builtins were declared with, and replace it with one of the two
-    attributes that we expect elsewhere.  */
- 
- static tree
- ix86_handle_tm_regparm_attribute (tree *node, tree, tree,
- 				  int flags, bool *no_add_attrs)
- {
-   tree alt;
- 
-   /* In no case do we want to add the placeholder attribute.  */
-   *no_add_attrs = true;
- 
-   /* The 64-bit ABI is unchanged for transactional memory.  */
-   if (TARGET_64BIT)
-     return NULL_TREE;
- 
-   /* ??? Is there a better way to validate 32-bit windows?  We have
-      cfun->machine->call_abi, but that seems to be set only for 64-bit.  */
-   if (CHECK_STACK_LIMIT > 0)
-     alt = tree_cons (get_identifier ("fastcall"), NULL, NULL);
-   else
-     {
-       alt = tree_cons (NULL, build_int_cst (NULL, 2), NULL);
-       alt = tree_cons (get_identifier ("regparm"), alt, NULL);
-     }
-   decl_attributes (node, alt, flags);
- 
-   return NULL_TREE;
- }
- 
  /* This function determines from TYPE the calling-convention.  */
  
  unsigned int
--- 998,1003 ----
*************** ix86_function_regparm (const_tree type,
*** 6630,6637 ****
        if (target && opt_for_fn (target->decl, optimize)
  	  && !(profile_flag && !flag_fentry))
  	{
! 	  cgraph_local_info *i = &target->local;
! 	  if (i && i->local && i->can_change_signature)
  	    {
  	      int local_regparm, globals = 0, regno;
  
--- 1119,1125 ----
        if (target && opt_for_fn (target->decl, optimize)
  	  && !(profile_flag && !flag_fentry))
  	{
! 	  if (target->local && target->can_change_signature)
  	    {
  	      int local_regparm, globals = 0, regno;
  
*************** ix86_function_sseregparm (const_tree typ
*** 6727,6734 ****
        && opt_for_fn (target->decl, optimize)
        && !(profile_flag && !flag_fentry))
      {
!       cgraph_local_info *i = &target->local;
!       if (i && i->local && i->can_change_signature)
  	{
  	  /* Refuse to produce wrong code when local function with SSE enabled
  	     is called from SSE disabled function.
--- 1215,1221 ----
        && opt_for_fn (target->decl, optimize)
        && !(profile_flag && !flag_fentry))
      {
!       if (target->local && target->can_change_signature)
  	{
  	  /* Refuse to produce wrong code when local function with SSE enabled
  	     is called from SSE disabled function.
*************** ix86_function_arg_regno_p (int regno)
*** 6963,6981 ****
    return false;
  }
  
! /* Return if we do not know how to pass TYPE solely in registers.  */
  
  static bool
! ix86_must_pass_in_stack (machine_mode mode, const_tree type)
  {
!   if (must_pass_in_stack_var_size_or_pad (mode, type))
      return true;
  
    /* For 32-bit, we want TImode aggregates to go on the stack.  But watch out!
       The layout_type routine is crafty and tries to trick us into passing
       currently unsupported vector types on the stack by using TImode.  */
!   return (!TARGET_64BIT && mode == TImode
! 	  && type && TREE_CODE (type) != VECTOR_TYPE);
  }
  
  /* It returns the size, in bytes, of the area reserved for arguments passed
--- 1450,1468 ----
    return false;
  }
  
! /* Return if we do not know how to pass ARG solely in registers.  */
  
  static bool
! ix86_must_pass_in_stack (const function_arg_info &arg)
  {
!   if (must_pass_in_stack_var_size_or_pad (arg))
      return true;
  
    /* For 32-bit, we want TImode aggregates to go on the stack.  But watch out!
       The layout_type routine is crafty and tries to trick us into passing
       currently unsupported vector types on the stack by using TImode.  */
!   return (!TARGET_64BIT && arg.mode == TImode
! 	  && arg.type && TREE_CODE (arg.type) != VECTOR_TYPE);
  }
  
  /* It returns the size, in bytes, of the area reserved for arguments passed
*************** ix86_function_type_abi (const_tree fntyp
*** 7018,7024 ****
        static int warned;
        if (TARGET_X32 && !warned)
  	{
! 	  error ("X32 does not support ms_abi attribute");
  	  warned = 1;
  	}
  
--- 1505,1511 ----
        static int warned;
        if (TARGET_X32 && !warned)
  	{
! 	  error ("X32 does not support %<ms_abi%> attribute");
  	  warned = 1;
  	}
  
*************** ix86_function_type_abi (const_tree fntyp
*** 7031,7037 ****
    return abi;
  }
  
! static enum calling_abi
  ix86_function_abi (const_tree fndecl)
  {
    return fndecl ? ix86_function_type_abi (TREE_TYPE (fndecl)) : ix86_abi;
--- 1518,1524 ----
    return abi;
  }
  
! enum calling_abi
  ix86_function_abi (const_tree fndecl)
  {
    return fndecl ? ix86_function_type_abi (TREE_TYPE (fndecl)) : ix86_abi;
*************** ix86_cfun_abi (void)
*** 7045,7065 ****
    return cfun ? cfun->machine->call_abi : ix86_abi;
  }
  
! static bool
  ix86_function_ms_hook_prologue (const_tree fn)
  {
    if (fn && lookup_attribute ("ms_hook_prologue", DECL_ATTRIBUTES (fn)))
      {
        if (decl_function_context (fn) != NULL_TREE)
  	error_at (DECL_SOURCE_LOCATION (fn),
! 		  "ms_hook_prologue is not compatible with nested function");
        else
          return true;
      }
    return false;
  }
  
! static bool
  ix86_function_naked (const_tree fn)
  {
    if (fn && lookup_attribute ("naked", DECL_ATTRIBUTES (fn)))
--- 1532,1553 ----
    return cfun ? cfun->machine->call_abi : ix86_abi;
  }
  
! bool
  ix86_function_ms_hook_prologue (const_tree fn)
  {
    if (fn && lookup_attribute ("ms_hook_prologue", DECL_ATTRIBUTES (fn)))
      {
        if (decl_function_context (fn) != NULL_TREE)
  	error_at (DECL_SOURCE_LOCATION (fn),
! 		  "%<ms_hook_prologue%> attribute is not compatible "
! 		  "with nested function");
        else
          return true;
      }
    return false;
  }
  
! bool
  ix86_function_naked (const_tree fn)
  {
    if (fn && lookup_attribute ("naked", DECL_ATTRIBUTES (fn)))
*************** ix86_init_large_pic_reg (unsigned int tm
*** 7149,7156 ****
    emit_insn (gen_set_rip_rex64 (pic_offset_table_rtx,
  				label));
    emit_insn (gen_set_got_offset_rex64 (tmp_reg, label));
!   emit_insn (ix86_gen_add3 (pic_offset_table_rtx,
! 			    pic_offset_table_rtx, tmp_reg));
    const char *name = LABEL_NAME (label);
    PUT_CODE (label, NOTE);
    NOTE_KIND (label) = NOTE_INSN_DELETED_LABEL;
--- 1637,1643 ----
    emit_insn (gen_set_rip_rex64 (pic_offset_table_rtx,
  				label));
    emit_insn (gen_set_got_offset_rex64 (tmp_reg, label));
!   emit_insn (gen_add2_insn (pic_offset_table_rtx, tmp_reg));
    const char *name = LABEL_NAME (label);
    PUT_CODE (label, NOTE);
    NOTE_KIND (label) = NOTE_INSN_DELETED_LABEL;
*************** init_cumulative_args (CUMULATIVE_ARGS *c
*** 7209,7215 ****
  		      tree fndecl,
  		      int caller)
  {
!   struct cgraph_local_info *i = NULL;
    struct cgraph_node *target = NULL;
  
    memset (cum, 0, sizeof (*cum));
--- 1696,1702 ----
  		      tree fndecl,
  		      int caller)
  {
!   struct cgraph_node *local_info_node = NULL;
    struct cgraph_node *target = NULL;
  
    memset (cum, 0, sizeof (*cum));
*************** init_cumulative_args (CUMULATIVE_ARGS *c
*** 7220,7226 ****
        if (target)
  	{
  	  target = target->function_symbol ();
! 	  i = cgraph_node::local_info (target->decl);
  	  cum->call_abi = ix86_function_abi (target->decl);
  	}
        else
--- 1707,1713 ----
        if (target)
  	{
  	  target = target->function_symbol ();
! 	  local_info_node = cgraph_node::local_info_node (target->decl);
  	  cum->call_abi = ix86_function_abi (target->decl);
  	}
        else
*************** init_cumulative_args (CUMULATIVE_ARGS *c
*** 7262,7268 ****
       va_start so for local functions maybe_vaarg can be made aggressive
       helping K&R code.
       FIXME: once typesytem is fixed, we won't need this code anymore.  */
!   if (i && i->local && i->can_change_signature)
      fntype = TREE_TYPE (target->decl);
    cum->stdarg = stdarg_p (fntype);
    cum->maybe_vaarg = (fntype
--- 1749,1756 ----
       va_start so for local functions maybe_vaarg can be made aggressive
       helping K&R code.
       FIXME: once typesytem is fixed, we won't need this code anymore.  */
!   if (local_info_node && local_info_node->local
!       && local_info_node->can_change_signature)
      fntype = TREE_TYPE (target->decl);
    cum->stdarg = stdarg_p (fntype);
    cum->maybe_vaarg = (fntype
*************** classify_argument (machine_mode mode, co
*** 7570,7578 ****
    if (bytes < 0)
      return 0;
  
!   if (mode != VOIDmode
!       && targetm.calls.must_pass_in_stack (mode, type))
!     return 0;
  
    if (type && AGGREGATE_TYPE_P (type))
      {
--- 2058,2070 ----
    if (bytes < 0)
      return 0;
  
!   if (mode != VOIDmode)
!     {
!       /* The value of "named" doesn't matter.  */
!       function_arg_info arg (const_cast<tree> (type), mode, /*named=*/true);
!       if (targetm.calls.must_pass_in_stack (arg))
! 	return 0;
!     }
  
    if (type && AGGREGATE_TYPE_P (type))
      {
*************** classify_argument (machine_mode mode, co
*** 7759,7765 ****
  		{
  		  warned = true;
  		  inform (input_location,
! 			  "the ABI of passing union with long double"
  			  " has changed in GCC 4.4");
  		}
  	      return 0;
--- 2251,2257 ----
  		{
  		  warned = true;
  		  inform (input_location,
! 			  "the ABI of passing union with %<long double%>"
  			  " has changed in GCC 4.4");
  		}
  	      return 0;
*************** classify_argument (machine_mode mode, co
*** 7877,7883 ****
  	    {
  	      warned = true;
  	      inform (input_location,
! 		      "the ABI of passing structure with complex float"
  		      " member has changed in GCC 4.4");
  	    }
  	  classes[1] = X86_64_SSESF_CLASS;
--- 2369,2375 ----
  	    {
  	      warned = true;
  	      inform (input_location,
! 		      "the ABI of passing structure with %<complex float%>"
  		      " member has changed in GCC 4.4");
  	    }
  	  classes[1] = X86_64_SSESF_CLASS;
*************** function_arg_advance_ms_64 (CUMULATIVE_A
*** 8427,8441 ****
    return 0;
  }
  
! /* Update the data in CUM to advance over an argument of mode MODE and
!    data type TYPE.  (TYPE is null for libcalls where that information
!    may not be available.)  */
  
  static void
! ix86_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
! 			   const_tree type, bool named)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    HOST_WIDE_INT bytes, words;
    int nregs;
  
--- 2919,2932 ----
    return 0;
  }
  
! /* Update the data in CUM to advance over argument ARG.  */
  
  static void
! ix86_function_arg_advance (cumulative_args_t cum_v,
! 			   const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
+   machine_mode mode = arg.mode;
    HOST_WIDE_INT bytes, words;
    int nregs;
  
*************** ix86_function_arg_advance (cumulative_ar
*** 8444,8457 ****
    if (!cum->caller && cfun->machine->func_type != TYPE_NORMAL)
      return;
  
!   if (mode == BLKmode)
!     bytes = int_size_in_bytes (type);
!   else
!     bytes = GET_MODE_SIZE (mode);
    words = CEIL (bytes, UNITS_PER_WORD);
  
!   if (type)
!     mode = type_natural_mode (type, NULL, false);
  
    if (TARGET_64BIT)
      {
--- 2935,2945 ----
    if (!cum->caller && cfun->machine->func_type != TYPE_NORMAL)
      return;
  
!   bytes = arg.promoted_size_in_bytes ();
    words = CEIL (bytes, UNITS_PER_WORD);
  
!   if (arg.type)
!     mode = type_natural_mode (arg.type, NULL, false);
  
    if (TARGET_64BIT)
      {
*************** ix86_function_arg_advance (cumulative_ar
*** 8460,8469 ****
        if (call_abi == MS_ABI)
  	nregs = function_arg_advance_ms_64 (cum, bytes, words);
        else
! 	nregs = function_arg_advance_64 (cum, mode, type, words, named);
      }
    else
!     nregs = function_arg_advance_32 (cum, mode, type, bytes, words);
  
    if (!nregs)
      {
--- 2948,2958 ----
        if (call_abi == MS_ABI)
  	nregs = function_arg_advance_ms_64 (cum, bytes, words);
        else
! 	nregs = function_arg_advance_64 (cum, mode, arg.type, words,
! 					 arg.named);
      }
    else
!     nregs = function_arg_advance_32 (cum, mode, arg.type, bytes, words);
  
    if (!nregs)
      {
*************** function_arg_ms_64 (const CUMULATIVE_ARG
*** 8717,8793 ****
  /* Return where to put the arguments to a function.
     Return zero to push the argument on the stack, or a hard register in which to store the argument.
  
!    MODE is the argument's machine mode.  TYPE is the data type of the
!    argument.  It is null for libcalls where that information may not be
!    available.  CUM gives information about the preceding args and about
!    the function being called.  NAMED is nonzero if this argument is a
!    named parameter (otherwise it is an extra parameter matching an
!    ellipsis).  */
  
  static rtx
! ix86_function_arg (cumulative_args_t cum_v, machine_mode omode,
! 		   const_tree type, bool named)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   machine_mode mode = omode;
    HOST_WIDE_INT bytes, words;
!   rtx arg;
  
    if (!cum->caller && cfun->machine->func_type != TYPE_NORMAL)
      {
!       gcc_assert (type != NULL_TREE);
!       if (POINTER_TYPE_P (type))
  	{
  	  /* This is the pointer argument.  */
! 	  gcc_assert (TYPE_MODE (type) == Pmode);
  	  /* It is at -WORD(AP) in the current frame in interrupt and
  	     exception handlers.  */
! 	  arg = plus_constant (Pmode, arg_pointer_rtx, -UNITS_PER_WORD);
  	}
        else
  	{
  	  gcc_assert (cfun->machine->func_type == TYPE_EXCEPTION
! 		      && TREE_CODE (type) == INTEGER_TYPE
! 		      && TYPE_MODE (type) == word_mode);
  	  /* The error code is the word-mode integer argument at
  	     -2 * WORD(AP) in the current frame of the exception
  	     handler.  */
! 	  arg = gen_rtx_MEM (word_mode,
  			     plus_constant (Pmode,
  					    arg_pointer_rtx,
  					    -2 * UNITS_PER_WORD));
  	}
!       return arg;
      }
  
!   if (mode == BLKmode)
!     bytes = int_size_in_bytes (type);
!   else
!     bytes = GET_MODE_SIZE (mode);
    words = CEIL (bytes, UNITS_PER_WORD);
  
    /* To simplify the code below, represent vector types with a vector mode
       even if MMX/SSE are not active.  */
!   if (type && TREE_CODE (type) == VECTOR_TYPE)
!     mode = type_natural_mode (type, cum, false);
  
    if (TARGET_64BIT)
      {
        enum calling_abi call_abi = cum ? cum->call_abi : ix86_abi;
  
        if (call_abi == MS_ABI)
! 	arg = function_arg_ms_64 (cum, mode, omode, named, type, bytes);
        else
! 	arg = function_arg_64 (cum, mode, omode, type, named);
      }
    else
!     arg = function_arg_32 (cum, mode, omode, type, bytes, words);
  
    /* Track if there are outgoing arguments on stack.  */
!   if (arg == NULL_RTX && cum->caller)
      cfun->machine->outgoing_args_on_stack = true;
  
!   return arg;
  }
  
  /* A C expression that indicates when an argument must be passed by
--- 3206,3275 ----
  /* Return where to put the arguments to a function.
     Return zero to push the argument on the stack, or a hard register in which to store the argument.
  
!    ARG describes the argument while CUM gives information about the
!    preceding args and about the function being called.  */
  
  static rtx
! ix86_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
!   machine_mode mode = arg.mode;
    HOST_WIDE_INT bytes, words;
!   rtx reg;
  
    if (!cum->caller && cfun->machine->func_type != TYPE_NORMAL)
      {
!       gcc_assert (arg.type != NULL_TREE);
!       if (POINTER_TYPE_P (arg.type))
  	{
  	  /* This is the pointer argument.  */
! 	  gcc_assert (TYPE_MODE (arg.type) == Pmode);
  	  /* It is at -WORD(AP) in the current frame in interrupt and
  	     exception handlers.  */
! 	  reg = plus_constant (Pmode, arg_pointer_rtx, -UNITS_PER_WORD);
  	}
        else
  	{
  	  gcc_assert (cfun->machine->func_type == TYPE_EXCEPTION
! 		      && TREE_CODE (arg.type) == INTEGER_TYPE
! 		      && TYPE_MODE (arg.type) == word_mode);
  	  /* The error code is the word-mode integer argument at
  	     -2 * WORD(AP) in the current frame of the exception
  	     handler.  */
! 	  reg = gen_rtx_MEM (word_mode,
  			     plus_constant (Pmode,
  					    arg_pointer_rtx,
  					    -2 * UNITS_PER_WORD));
  	}
!       return reg;
      }
  
!   bytes = arg.promoted_size_in_bytes ();
    words = CEIL (bytes, UNITS_PER_WORD);
  
    /* To simplify the code below, represent vector types with a vector mode
       even if MMX/SSE are not active.  */
!   if (arg.type && TREE_CODE (arg.type) == VECTOR_TYPE)
!     mode = type_natural_mode (arg.type, cum, false);
  
    if (TARGET_64BIT)
      {
        enum calling_abi call_abi = cum ? cum->call_abi : ix86_abi;
  
        if (call_abi == MS_ABI)
! 	reg = function_arg_ms_64 (cum, mode, arg.mode, arg.named,
! 				  arg.type, bytes);
        else
! 	reg = function_arg_64 (cum, mode, arg.mode, arg.type, arg.named);
      }
    else
!     reg = function_arg_32 (cum, mode, arg.mode, arg.type, bytes, words);
  
    /* Track if there are outgoing arguments on stack.  */
!   if (reg == NULL_RTX && cum->caller)
      cfun->machine->outgoing_args_on_stack = true;
  
!   return reg;
  }
  
  /* A C expression that indicates when an argument must be passed by
*************** ix86_function_arg (cumulative_args_t cum
*** 8797,8804 ****
     appropriate for passing a pointer to that type.  */
  
  static bool
! ix86_pass_by_reference (cumulative_args_t cum_v, machine_mode mode,
! 			const_tree type, bool)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
--- 3279,3285 ----
     appropriate for passing a pointer to that type.  */
  
  static bool
! ix86_pass_by_reference (cumulative_args_t cum_v, const function_arg_info &arg)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
  
*************** ix86_pass_by_reference (cumulative_args_
*** 8809,8817 ****
        /* See Windows x64 Software Convention.  */
        if (call_abi == MS_ABI)
  	{
! 	  HOST_WIDE_INT msize = GET_MODE_SIZE (mode);
  
! 	  if (type)
  	    {
  	      /* Arrays are passed by reference.  */
  	      if (TREE_CODE (type) == ARRAY_TYPE)
--- 3290,3298 ----
        /* See Windows x64 Software Convention.  */
        if (call_abi == MS_ABI)
  	{
! 	  HOST_WIDE_INT msize = GET_MODE_SIZE (arg.mode);
  
! 	  if (tree type = arg.type)
  	    {
  	      /* Arrays are passed by reference.  */
  	      if (TREE_CODE (type) == ARRAY_TYPE)
*************** ix86_pass_by_reference (cumulative_args_
*** 8828,8834 ****
  	  /* __m128 is passed by reference.  */
  	  return msize != 1 && msize != 2 && msize != 4 && msize != 8;
  	}
!       else if (type && int_size_in_bytes (type) == -1)
  	return true;
      }
  
--- 3309,3315 ----
  	  /* __m128 is passed by reference.  */
  	  return msize != 1 && msize != 2 && msize != 4 && msize != 8;
  	}
!       else if (arg.type && int_size_in_bytes (arg.type) == -1)
  	return true;
      }
  
*************** setup_incoming_varargs_ms_64 (CUMULATIVE
*** 9608,9615 ****
  }
  
  static void
! ix86_setup_incoming_varargs (cumulative_args_t cum_v, machine_mode mode,
! 			     tree type, int *, int no_rtl)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    CUMULATIVE_ARGS next_cum;
--- 4089,4097 ----
  }
  
  static void
! ix86_setup_incoming_varargs (cumulative_args_t cum_v,
! 			     const function_arg_info &arg,
! 			     int *, int no_rtl)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
    CUMULATIVE_ARGS next_cum;
*************** ix86_setup_incoming_varargs (cumulative_
*** 9628,9635 ****
       For stdargs, we do want to skip the last named argument.  */
    next_cum = *cum;
    if (stdarg_p (fntype))
!     ix86_function_arg_advance (pack_cumulative_args (&next_cum), mode, type,
! 			       true);
  
    if (cum->call_abi == MS_ABI)
      setup_incoming_varargs_ms_64 (&next_cum);
--- 4110,4116 ----
       For stdargs, we do want to skip the last named argument.  */
    next_cum = *cum;
    if (stdarg_p (fntype))
!     ix86_function_arg_advance (pack_cumulative_args (&next_cum), arg);
  
    if (cum->call_abi == MS_ABI)
      setup_incoming_varargs_ms_64 (&next_cum);
*************** ix86_setup_incoming_varargs (cumulative_
*** 9637,9675 ****
      setup_incoming_varargs_64 (&next_cum);
  }
  
- static void
- ix86_setup_incoming_vararg_bounds (cumulative_args_t cum_v,
- 				   machine_mode mode,
- 				   tree type,
- 				   int *pretend_size ATTRIBUTE_UNUSED,
- 				   int no_rtl)
- {
-   CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
-   CUMULATIVE_ARGS next_cum;
-   tree fntype;
-   int max;
- 
-   gcc_assert (!no_rtl);
- 
-   /* Do nothing if we use plain pointer to argument area.  */
-   if (!TARGET_64BIT || cum->call_abi == MS_ABI)
-     return;
- 
-   fntype = TREE_TYPE (current_function_decl);
- 
-   /* For varargs, we do not want to skip the dummy va_dcl argument.
-      For stdargs, we do want to skip the last named argument.  */
-   next_cum = *cum;
-   if (stdarg_p (fntype))
-     ix86_function_arg_advance (pack_cumulative_args (&next_cum), mode, type,
- 			       true);
- 
-   max = cum->regno + cfun->va_list_gpr_size / UNITS_PER_WORD;
-   if (max > X86_64_REGPARM_MAX)
-     max = X86_64_REGPARM_MAX;
- }
- 
- 
  /* Checks if TYPE is of kind va_list char *.  */
  
  static bool
--- 4118,4123 ----
*************** ix86_gimplify_va_arg (tree valist, tree
*** 9852,9858 ****
    ovf = build3 (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
    sav = build3 (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
  
!   indirect_p = pass_by_reference (NULL, TYPE_MODE (type), type, false);
    if (indirect_p)
      type = build_pointer_type (type);
    size = arg_int_size_in_bytes (type);
--- 4300,4306 ----
    ovf = build3 (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
    sav = build3 (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
  
!   indirect_p = pass_va_arg_by_reference (type);
    if (indirect_p)
      type = build_pointer_type (type);
    size = arg_int_size_in_bytes (type);
*************** ix86_standard_x87sse_constant_load_p (co
*** 10455,10460 ****
--- 4903,5162 ----
    return true;
  }
  
+ /* Predicate for pre-reload splitters with associated instructions,
+    which can match any time before the split1 pass (usually combine),
+    then are unconditionally split in that pass and should not be
+    matched again afterwards.  */
+ 
+ bool
+ ix86_pre_reload_split (void)
+ {
+   return (can_create_pseudo_p ()
+ 	  && !(cfun->curr_properties & PROP_rtl_split_insns));
+ }
+ 
+ /* Return the opcode of the TYPE_SSEMOV instruction.  To move from
+    or to xmm16-xmm31/ymm16-ymm31 registers, we either require
+    TARGET_AVX512VL or it is a register to register move which can
+    be done with zmm register move. */
+ 
+ static const char *
+ ix86_get_ssemov (rtx *operands, unsigned size,
+ 		 enum attr_mode insn_mode, machine_mode mode)
+ {
+   char buf[128];
+   bool misaligned_p = (misaligned_operand (operands[0], mode)
+ 		       || misaligned_operand (operands[1], mode));
+   bool evex_reg_p = (size == 64
+ 		     || EXT_REX_SSE_REG_P (operands[0])
+ 		     || EXT_REX_SSE_REG_P (operands[1]));
+   machine_mode scalar_mode;
+ 
+   const char *opcode = NULL;
+   enum
+     {
+       opcode_int,
+       opcode_float,
+       opcode_double
+     } type = opcode_int;
+ 
+   switch (insn_mode)
+     {
+     case MODE_V16SF:
+     case MODE_V8SF:
+     case MODE_V4SF:
+       scalar_mode = E_SFmode;
+       type = opcode_float;
+       break;
+     case MODE_V8DF:
+     case MODE_V4DF:
+     case MODE_V2DF:
+       scalar_mode = E_DFmode;
+       type = opcode_double;
+       break;
+     case MODE_XI:
+     case MODE_OI:
+     case MODE_TI:
+       scalar_mode = GET_MODE_INNER (mode);
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   /* NB: To move xmm16-xmm31/ymm16-ymm31 registers without AVX512VL,
+      we can only use zmm register move without memory operand.  */
+   if (evex_reg_p
+       && !TARGET_AVX512VL
+       && GET_MODE_SIZE (mode) < 64)
+     {
+       /* NB: Even though ix86_hard_regno_mode_ok doesn't allow
+ 	 xmm16-xmm31 nor ymm16-ymm31 in 128/256 bit modes when
+ 	 AVX512VL is disabled, LRA can still generate reg to
+ 	 reg moves with xmm16-xmm31 and ymm16-ymm31 in 128/256 bit
+ 	 modes.  */
+       if (memory_operand (operands[0], mode)
+ 	  || memory_operand (operands[1], mode))
+ 	gcc_unreachable ();
+       size = 64;
+       switch (type)
+ 	{
+ 	case opcode_int:
+ 	  opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32";
+ 	  break;
+ 	case opcode_float:
+ 	  opcode = misaligned_p ? "vmovups" : "vmovaps";
+ 	  break;
+ 	case opcode_double:
+ 	  opcode = misaligned_p ? "vmovupd" : "vmovapd";
+ 	  break;
+ 	}
+     }
+   else if (SCALAR_FLOAT_MODE_P (scalar_mode))
+     {
+       switch (scalar_mode)
+ 	{
+ 	case E_SFmode:
+ 	  opcode = misaligned_p ? "%vmovups" : "%vmovaps";
+ 	  break;
+ 	case E_DFmode:
+ 	  opcode = misaligned_p ? "%vmovupd" : "%vmovapd";
+ 	  break;
+ 	case E_TFmode:
+ 	  if (evex_reg_p)
+ 	    opcode = misaligned_p ? "vmovdqu64" : "vmovdqa64";
+ 	  else
+ 	    opcode = misaligned_p ? "%vmovdqu" : "%vmovdqa";
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+     }
+   else if (SCALAR_INT_MODE_P (scalar_mode))
+     {
+       switch (scalar_mode)
+ 	{
+ 	case E_QImode:
+ 	  if (evex_reg_p)
+ 	    opcode = (misaligned_p
+ 		      ? (TARGET_AVX512BW
+ 			 ? "vmovdqu8"
+ 			 : "vmovdqu64")
+ 		      : "vmovdqa64");
+ 	  else
+ 	    opcode = (misaligned_p
+ 		      ? (TARGET_AVX512BW
+ 			 ? "vmovdqu8"
+ 			 : "%vmovdqu")
+ 		      : "%vmovdqa");
+ 	  break;
+ 	case E_HImode:
+ 	  if (evex_reg_p)
+ 	    opcode = (misaligned_p
+ 		      ? (TARGET_AVX512BW
+ 			 ? "vmovdqu16"
+ 			 : "vmovdqu64")
+ 		      : "vmovdqa64");
+ 	  else
+ 	    opcode = (misaligned_p
+ 		      ? (TARGET_AVX512BW
+ 			 ? "vmovdqu16"
+ 			 : "%vmovdqu")
+ 		      : "%vmovdqa");
+ 	  break;
+ 	case E_SImode:
+ 	  if (evex_reg_p)
+ 	    opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32";
+ 	  else
+ 	    opcode = misaligned_p ? "%vmovdqu" : "%vmovdqa";
+ 	  break;
+ 	case E_DImode:
+ 	case E_TImode:
+ 	case E_OImode:
+ 	  if (evex_reg_p)
+ 	    opcode = misaligned_p ? "vmovdqu64" : "vmovdqa64";
+ 	  else
+ 	    opcode = misaligned_p ? "%vmovdqu" : "%vmovdqa";
+ 	  break;
+ 	case E_XImode:
+ 	  opcode = misaligned_p ? "vmovdqu64" : "vmovdqa64";
+ 	  break;
+ 	default:
+ 	  gcc_unreachable ();
+ 	}
+     }
+   else
+     gcc_unreachable ();
+ 
+   switch (size)
+     {
+     case 64:
+       snprintf (buf, sizeof (buf), "%s\t{%%g1, %%g0|%%g0, %%g1}",
+ 		opcode);
+       break;
+     case 32:
+       snprintf (buf, sizeof (buf), "%s\t{%%t1, %%t0|%%t0, %%t1}",
+ 		opcode);
+       break;
+     case 16:
+       snprintf (buf, sizeof (buf), "%s\t{%%x1, %%x0|%%x0, %%x1}",
+ 		opcode);
+       break;
+     default:
+       gcc_unreachable ();
+     }
+   output_asm_insn (buf, operands);
+   return "";
+ }
+ 
+ /* Return the template of the TYPE_SSEMOV instruction to move
+    operands[1] into operands[0].  */
+ 
+ const char *
+ ix86_output_ssemov (rtx_insn *insn, rtx *operands)
+ {
+   machine_mode mode = GET_MODE (operands[0]);
+   if (get_attr_type (insn) != TYPE_SSEMOV
+       || mode != GET_MODE (operands[1]))
+     gcc_unreachable ();
+ 
+   enum attr_mode insn_mode = get_attr_mode (insn);
+ 
+   switch (insn_mode)
+     {
+     case MODE_XI:
+     case MODE_V8DF:
+     case MODE_V16SF:
+       return ix86_get_ssemov (operands, 64, insn_mode, mode);
+ 
+     case MODE_OI:
+     case MODE_V4DF:
+     case MODE_V8SF:
+       return ix86_get_ssemov (operands, 32, insn_mode, mode);
+ 
+     case MODE_TI:
+     case MODE_V2DF:
+     case MODE_V4SF:
+       return ix86_get_ssemov (operands, 16, insn_mode, mode);
+ 
+     case MODE_DI:
+       /* Handle broken assemblers that require movd instead of movq. */
+       if (!HAVE_AS_IX86_INTERUNIT_MOVQ
+ 	  && (GENERAL_REG_P (operands[0])
+ 	      || GENERAL_REG_P (operands[1])))
+ 	return "%vmovd\t{%1, %0|%0, %1}";
+       else
+ 	return "%vmovq\t{%1, %0|%0, %1}";
+ 
+     case MODE_SI:
+       return "%vmovd\t{%1, %0|%0, %1}";
+ 
+     case MODE_DF:
+       if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
+ 	return "vmovsd\t{%d1, %0|%0, %d1}";
+       else
+ 	return "%vmovsd\t{%1, %0|%0, %1}";
+ 
+     case MODE_SF:
+       if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
+ 	return "vmovss\t{%d1, %0|%0, %d1}";
+       else
+ 	return "%vmovss\t{%1, %0|%0, %1}";
+ 
+     case MODE_V1DF:
+       gcc_assert (!TARGET_AVX);
+       return "movlpd\t{%1, %0|%0, %1}";
+ 
+     case MODE_V2SF:
+       if (TARGET_AVX && REG_P (operands[0]))
+ 	return "vmovlps\t{%1, %d0|%d0, %1}";
+       else
+ 	return "%vmovlps\t{%1, %0|%0, %1}";
+ 
+     default:
+       gcc_unreachable ();
+     }
+ }
+ 
  /* Returns true if OP contains a symbol reference */
  
  bool
*************** ix86_can_use_return_insn_p (void)
*** 10513,10518 ****
--- 5215,5233 ----
  	  && (frame.nregs + frame.nsseregs) == 0);
  }
  
+ /* Return stack frame size.  get_frame_size () returns used stack slots
+    during compilation, which may be optimized out later.  If stack frame
+    is needed, stack_frame_required should be true.  */
+ 
+ static HOST_WIDE_INT
+ ix86_get_frame_size (void)
+ {
+   if (cfun->machine->stack_frame_required)
+     return get_frame_size ();
+   else
+     return 0;
+ }
+ 
  /* Value should be nonzero if functions must have frame pointers.
     Zero means the frame pointer need not be set up (and parms may
     be accessed via the stack pointer) in functions that seem suitable.  */
*************** ix86_frame_pointer_required (void)
*** 10536,10542 ****
  
    /* Win64 SEH, very large frames need a frame-pointer as maximum stack
       allocation is 4GB.  */
!   if (TARGET_64BIT_MS_ABI && get_frame_size () > SEH_MAX_FRAME_SIZE)
      return true;
  
    /* SSE saves require frame-pointer when stack is misaligned.  */
--- 5251,5257 ----
  
    /* Win64 SEH, very large frames need a frame-pointer as maximum stack
       allocation is 4GB.  */
!   if (TARGET_64BIT_MS_ABI && ix86_get_frame_size () > SEH_MAX_FRAME_SIZE)
      return true;
  
    /* SSE saves require frame-pointer when stack is misaligned.  */
*************** output_set_got (rtx dest, rtx label)
*** 11049,11055 ****
  
  /* Generate an "push" pattern for input ARG.  */
  
! static rtx
  gen_push (rtx arg)
  {
    struct machine_function *m = cfun->machine;
--- 5764,5770 ----
  
  /* Generate an "push" pattern for input ARG.  */
  
! rtx
  gen_push (rtx arg)
  {
    struct machine_function *m = cfun->machine;
*************** gen_push (rtx arg)
*** 11069,11075 ****
  
  /* Generate an "pop" pattern for input ARG.  */
  
! static rtx
  gen_pop (rtx arg)
  {
    if (REG_P (arg) && GET_MODE (arg) != word_mode)
--- 5784,5790 ----
  
  /* Generate an "pop" pattern for input ARG.  */
  
! rtx
  gen_pop (rtx arg)
  {
    if (REG_P (arg) && GET_MODE (arg) != word_mode)
*************** ix86_hard_regno_scratch_ok (unsigned int
*** 11141,11147 ****
  
  /* Return TRUE if we need to save REGNO.  */
  
! static bool
  ix86_save_reg (unsigned int regno, bool maybe_eh_return, bool ignore_outlined)
  {
    /* If there are no caller-saved registers, we preserve all registers,
--- 5856,5862 ----
  
  /* Return TRUE if we need to save REGNO.  */
  
! bool
  ix86_save_reg (unsigned int regno, bool maybe_eh_return, bool ignore_outlined)
  {
    /* If there are no caller-saved registers, we preserve all registers,
*************** ix86_save_reg (unsigned int regno, bool
*** 11214,11221 ****
      return true;
  
    return (df_regs_ever_live_p (regno)
! 	  && !call_used_regs[regno]
! 	  && !fixed_regs[regno]
  	  && (regno != HARD_FRAME_POINTER_REGNUM || !frame_pointer_needed));
  }
  
--- 5929,5935 ----
      return true;
  
    return (df_regs_ever_live_p (regno)
! 	  && !call_used_or_fixed_reg_p (regno)
  	  && (regno != HARD_FRAME_POINTER_REGNUM || !frame_pointer_needed));
  }
  
*************** ix86_initial_elimination_offset (int fro
*** 11292,11310 ****
      }
  }
  
- /* In a dynamically-aligned function, we can't know the offset from
-    stack pointer to frame pointer, so we must ensure that setjmp
-    eliminates fp against the hard fp (%ebp) rather than trying to
-    index from %esp up to the top of the frame across a gap that is
-    of unknown (at compile-time) size.  */
- static rtx
- ix86_builtin_setjmp_frame_value (void)
- {
-   return stack_realign_fp ? hard_frame_pointer_rtx : virtual_stack_vars_rtx;
- }
- 
  /* Emits a warning for unsupported msabi to sysv pro/epilogues.  */
! static void warn_once_call_ms2sysv_xlogues (const char *feature)
  {
    static bool warned_once = false;
    if (!warned_once)
--- 6006,6013 ----
      }
  }
  
  /* Emits a warning for unsupported msabi to sysv pro/epilogues.  */
! void warn_once_call_ms2sysv_xlogues (const char *feature)
  {
    static bool warned_once = false;
    if (!warned_once)
*************** get_probe_interval (void)
*** 11322,11328 ****
  {
    if (flag_stack_clash_protection)
      return (HOST_WIDE_INT_1U
! 	    << PARAM_VALUE (PARAM_STACK_CLASH_PROTECTION_PROBE_INTERVAL));
    else
      return (HOST_WIDE_INT_1U << STACK_CHECK_PROBE_INTERVAL_EXP);
  }
--- 6025,6031 ----
  {
    if (flag_stack_clash_protection)
      return (HOST_WIDE_INT_1U
! 	    << param_stack_clash_protection_probe_interval);
    else
      return (HOST_WIDE_INT_1U << STACK_CHECK_PROBE_INTERVAL_EXP);
  }
*************** ix86_compute_frame_layout (void)
*** 11343,11349 ****
    unsigned HOST_WIDE_INT stack_alignment_needed;
    HOST_WIDE_INT offset;
    unsigned HOST_WIDE_INT preferred_alignment;
!   HOST_WIDE_INT size = get_frame_size ();
    HOST_WIDE_INT to_allocate;
  
    /* m->call_ms2sysv is initially enabled in ix86_expand_call for all 64-bit
--- 6046,6052 ----
    unsigned HOST_WIDE_INT stack_alignment_needed;
    HOST_WIDE_INT offset;
    unsigned HOST_WIDE_INT preferred_alignment;
!   HOST_WIDE_INT size = ix86_get_frame_size ();
    HOST_WIDE_INT to_allocate;
  
    /* m->call_ms2sysv is initially enabled in ix86_expand_call for all 64-bit
*************** ix86_compute_frame_layout (void)
*** 11437,11443 ****
  	 case function is known to be outside hot spot (this is known with
  	 feedback only).  Weight the size of function by number of registers
  	 to save as it is cheap to use one or two push instructions but very
! 	 slow to use many of them.  */
        if (count)
  	count = (count - 1) * FAST_PROLOGUE_INSN_COUNT;
        if (node->frequency < NODE_FREQUENCY_NORMAL
--- 6140,6153 ----
  	 case function is known to be outside hot spot (this is known with
  	 feedback only).  Weight the size of function by number of registers
  	 to save as it is cheap to use one or two push instructions but very
! 	 slow to use many of them.
! 
! 	 Calling this hook multiple times with the same frame requirements
! 	 must produce the same layout, since the RA might otherwise be
! 	 unable to reach a fixed point or might fail its final sanity checks.
! 	 This means that once we've assumed that a function does or doesn't
! 	 have a particular size, we have to stick to that assumption
! 	 regardless of how the function has changed since.  */
        if (count)
  	count = (count - 1) * FAST_PROLOGUE_INSN_COUNT;
        if (node->frequency < NODE_FREQUENCY_NORMAL
*************** ix86_compute_frame_layout (void)
*** 11445,11452 ****
  	      && node->frequency < NODE_FREQUENCY_HOT))
  	m->use_fast_prologue_epilogue = false;
        else
! 	m->use_fast_prologue_epilogue
! 	   = !expensive_function_p (count);
      }
  
    frame->save_regs_using_mov
--- 6155,6168 ----
  	      && node->frequency < NODE_FREQUENCY_HOT))
  	m->use_fast_prologue_epilogue = false;
        else
! 	{
! 	  if (count != frame->expensive_count)
! 	    {
! 	      frame->expensive_count = count;
! 	      frame->expensive_p = expensive_function_p (count);
! 	    }
! 	  m->use_fast_prologue_epilogue = !frame->expensive_p;
! 	}
      }
  
    frame->save_regs_using_mov
*************** choose_basereg (HOST_WIDE_INT cfa_offset
*** 11806,11812 ****
  	    {
  	      base_reg = hard_frame_pointer_rtx;
  	      base_offset = toffset;
- 	      len = tlen;
  	    }
  	}
      }
--- 6522,6527 ----
*************** pro_epilogue_adjust_stack (rtx dest, rtx
*** 12039,12072 ****
  			   int style, bool set_cfa)
  {
    struct machine_function *m = cfun->machine;
    rtx insn;
    bool add_frame_related_expr = false;
  
!   if (Pmode == SImode)
!     insn = gen_pro_epilogue_adjust_stack_si_add (dest, src, offset);
!   else if (x86_64_immediate_operand (offset, DImode))
!     insn = gen_pro_epilogue_adjust_stack_di_add (dest, src, offset);
!   else
      {
-       rtx tmp;
        /* r11 is used by indirect sibcall return as well, set before the
  	 epilogue and used after the epilogue.  */
        if (style)
!         tmp = gen_rtx_REG (DImode, R11_REG);
        else
  	{
  	  gcc_assert (src != hard_frame_pointer_rtx
  		      && dest != hard_frame_pointer_rtx);
! 	  tmp = hard_frame_pointer_rtx;
  	}
!       insn = emit_insn (gen_rtx_SET (tmp, offset));
        if (style < 0)
  	add_frame_related_expr = true;
- 
-       insn = gen_pro_epilogue_adjust_stack_di_add (dest, src, tmp);
      }
  
!   insn = emit_insn (insn);
    if (style >= 0)
      ix86_add_queued_cfa_restore_notes (insn);
  
--- 6754,6782 ----
  			   int style, bool set_cfa)
  {
    struct machine_function *m = cfun->machine;
+   rtx addend = offset;
    rtx insn;
    bool add_frame_related_expr = false;
  
!   if (!x86_64_immediate_operand (offset, Pmode))
      {
        /* r11 is used by indirect sibcall return as well, set before the
  	 epilogue and used after the epilogue.  */
        if (style)
!         addend = gen_rtx_REG (Pmode, R11_REG);
        else
  	{
  	  gcc_assert (src != hard_frame_pointer_rtx
  		      && dest != hard_frame_pointer_rtx);
! 	  addend = hard_frame_pointer_rtx;
  	}
!       emit_insn (gen_rtx_SET (addend, offset));
        if (style < 0)
  	add_frame_related_expr = true;
      }
  
!   insn = emit_insn (gen_pro_epilogue_adjust_stack_add
! 		    (Pmode, dest, src, addend));
    if (style >= 0)
      ix86_add_queued_cfa_restore_notes (insn);
  
*************** find_drap_reg (void)
*** 12182,12206 ****
      }
  }
  
- /* Handle a "force_align_arg_pointer" attribute.  */
- 
- static tree
- ix86_handle_force_align_arg_pointer_attribute (tree *node, tree name,
- 					       tree, int, bool *no_add_attrs)
- {
-   if (TREE_CODE (*node) != FUNCTION_TYPE
-       && TREE_CODE (*node) != METHOD_TYPE
-       && TREE_CODE (*node) != FIELD_DECL
-       && TREE_CODE (*node) != TYPE_DECL)
-     {
-       warning (OPT_Wattributes, "%qE attribute only applies to functions",
- 	       name);
-       *no_add_attrs = true;
-     }
- 
-   return NULL_TREE;
- }
- 
  /* Return minimum incoming stack alignment.  */
  
  static unsigned int
--- 6892,6897 ----
*************** ix86_minimum_incoming_stack_boundary (bo
*** 12228,12234 ****
       via force_align_arg_pointer attribute.  We use the smallest
       incoming stack boundary.  */
    if (incoming_stack_boundary > MIN_STACK_BOUNDARY
!       && lookup_attribute (ix86_force_align_arg_pointer_string,
  			   TYPE_ATTRIBUTES (TREE_TYPE (current_function_decl))))
      incoming_stack_boundary = MIN_STACK_BOUNDARY;
  
--- 6919,6925 ----
       via force_align_arg_pointer attribute.  We use the smallest
       incoming stack boundary.  */
    if (incoming_stack_boundary > MIN_STACK_BOUNDARY
!       && lookup_attribute ("force_align_arg_pointer",
  			   TYPE_ATTRIBUTES (TREE_TYPE (current_function_decl))))
      incoming_stack_boundary = MIN_STACK_BOUNDARY;
  
*************** ix86_adjust_stack_and_probe_stack_clash
*** 12503,12509 ****
    /* If we allocate less than the size of the guard statically,
       then no probing is necessary, but we do need to allocate
       the stack.  */
!   if (size < (1 << PARAM_VALUE (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE)))
      {
        pro_epilogue_adjust_stack (stack_pointer_rtx, stack_pointer_rtx,
  			         GEN_INT (-size), -1,
--- 7194,7200 ----
    /* If we allocate less than the size of the guard statically,
       then no probing is necessary, but we do need to allocate
       the stack.  */
!   if (size < (1 << param_stack_clash_protection_guard_size))
      {
        pro_epilogue_adjust_stack (stack_pointer_rtx, stack_pointer_rtx,
  			         GEN_INT (-size), -1,
*************** ix86_adjust_stack_and_probe_stack_clash
*** 12585,12592 ****
  
        /* Step 3: the loop.  */
        rtx size_rtx = GEN_INT (rounded_size);
!       insn = emit_insn (ix86_gen_adjust_stack_and_probe (sr.reg, sr.reg,
! 							 size_rtx));
        if (m->fs.cfa_reg == stack_pointer_rtx)
  	{
  	  m->fs.cfa_offset += rounded_size;
--- 7276,7283 ----
  
        /* Step 3: the loop.  */
        rtx size_rtx = GEN_INT (rounded_size);
!       insn = emit_insn (gen_adjust_stack_and_probe (Pmode, sr.reg, sr.reg,
! 						    size_rtx));
        if (m->fs.cfa_reg == stack_pointer_rtx)
  	{
  	  m->fs.cfa_offset += rounded_size;
*************** ix86_adjust_stack_and_probe (HOST_WIDE_I
*** 12739,12745 ****
  	 adjusts SP and probes to PROBE_INTERVAL + N * PROBE_INTERVAL for
  	 values of N from 1 until it is equal to ROUNDED_SIZE.  */
  
!       emit_insn (ix86_gen_adjust_stack_and_probe (sr.reg, sr.reg, size_rtx));
  
  
        /* Step 4: adjust SP and probe at PROBE_INTERVAL + SIZE if we cannot
--- 7430,7436 ----
  	 adjusts SP and probes to PROBE_INTERVAL + N * PROBE_INTERVAL for
  	 values of N from 1 until it is equal to ROUNDED_SIZE.  */
  
!       emit_insn (gen_adjust_stack_and_probe (Pmode, sr.reg, sr.reg, size_rtx));
  
  
        /* Step 4: adjust SP and probe at PROBE_INTERVAL + SIZE if we cannot
*************** ix86_emit_probe_stack_range (HOST_WIDE_I
*** 12897,12903 ****
           probes at FIRST + N * PROBE_INTERVAL for values of N from 1
           until it is equal to ROUNDED_SIZE.  */
  
!       emit_insn (ix86_gen_probe_stack_range (sr.reg, sr.reg, GEN_INT (-last)));
  
  
        /* Step 4: probe at FIRST + SIZE if we cannot assert at compile-time
--- 7588,7595 ----
           probes at FIRST + N * PROBE_INTERVAL for values of N from 1
           until it is equal to ROUNDED_SIZE.  */
  
!       emit_insn
! 	(gen_probe_stack_range (Pmode, sr.reg, sr.reg, GEN_INT (-last)));
  
  
        /* Step 4: probe at FIRST + SIZE if we cannot assert at compile-time
*************** output_probe_stack_range (rtx reg, rtx e
*** 12956,12966 ****
    return "";
  }
  
! /* Return true if stack frame is required.  Update STACK_ALIGNMENT
!    to the largest alignment, in bits, of stack slot used if stack
!    frame is required and CHECK_STACK_SLOT is true.  */
  
! static bool
  ix86_find_max_used_stack_alignment (unsigned int &stack_alignment,
  				    bool check_stack_slot)
  {
--- 7648,7658 ----
    return "";
  }
  
! /* Set stack_frame_required to false if stack frame isn't required.
!    Update STACK_ALIGNMENT to the largest alignment, in bits, of stack
!    slot used if stack frame is required and CHECK_STACK_SLOT is true.  */
  
! static void
  ix86_find_max_used_stack_alignment (unsigned int &stack_alignment,
  				    bool check_stack_slot)
  {
*************** ix86_find_max_used_stack_alignment (unsi
*** 13009,13015 ****
  	  }
      }
  
!   return require_stack_frame;
  }
  
  /* Finalize stack_realign_needed and frame_pointer_needed flags, which
--- 7701,7707 ----
  	  }
      }
  
!   cfun->machine->stack_frame_required = require_stack_frame;
  }
  
  /* Finalize stack_realign_needed and frame_pointer_needed flags, which
*************** ix86_finalize_stack_frame_flags (void)
*** 13039,13044 ****
--- 7731,7744 ----
        return;
      }
  
+   /* It is always safe to compute max_used_stack_alignment.  We
+      compute it only if 128-bit aligned load/store may be generated
+      on misaligned stack slot which will lead to segfault. */
+   bool check_stack_slot
+     = (stack_realign || crtl->max_used_stack_slot_alignment >= 128);
+   ix86_find_max_used_stack_alignment (stack_alignment,
+ 				      check_stack_slot);
+ 
    /* If the only reason for frame_pointer_needed is that we conservatively
       assumed stack realignment might be needed or -fno-omit-frame-pointer
       is used, but in the end nothing that needed the stack alignment had
*************** ix86_finalize_stack_frame_flags (void)
*** 13058,13069 ****
  	   && flag_exceptions
  	   && cfun->can_throw_non_call_exceptions)
        && !ix86_frame_pointer_required ()
!       && get_frame_size () == 0
        && ix86_nsaved_sseregs () == 0
        && ix86_varargs_gpr_size + ix86_varargs_fpr_size == 0)
      {
!       if (ix86_find_max_used_stack_alignment (stack_alignment,
! 					      stack_realign))
  	{
  	  /* Stack frame is required.  If stack alignment needed is less
  	     than incoming stack boundary, don't realign stack.  */
--- 7758,7768 ----
  	   && flag_exceptions
  	   && cfun->can_throw_non_call_exceptions)
        && !ix86_frame_pointer_required ()
!       && ix86_get_frame_size () == 0
        && ix86_nsaved_sseregs () == 0
        && ix86_varargs_gpr_size + ix86_varargs_fpr_size == 0)
      {
!       if (cfun->machine->stack_frame_required)
  	{
  	  /* Stack frame is required.  If stack alignment needed is less
  	     than incoming stack boundary, don't realign stack.  */
*************** ix86_finalize_stack_frame_flags (void)
*** 13151,13167 ****
  	  recompute_frame_layout_p = true;
  	}
      }
!   else if (crtl->max_used_stack_slot_alignment >= 128)
      {
        /* We don't need to realign stack.  max_used_stack_alignment is
  	 used to decide how stack frame should be aligned.  This is
! 	 independent of any psABIs nor 32-bit vs 64-bit.  It is always
! 	 safe to compute max_used_stack_alignment.  We compute it only
! 	 if 128-bit aligned load/store may be generated on misaligned
! 	 stack slot which will lead to segfault.   */
!       if (ix86_find_max_used_stack_alignment (stack_alignment, true))
! 	cfun->machine->max_used_stack_alignment
! 	  = stack_alignment / BITS_PER_UNIT;
      }
  
    if (crtl->stack_realign_needed != stack_realign)
--- 7850,7863 ----
  	  recompute_frame_layout_p = true;
  	}
      }
!   else if (crtl->max_used_stack_slot_alignment >= 128
! 	   && cfun->machine->stack_frame_required)
      {
        /* We don't need to realign stack.  max_used_stack_alignment is
  	 used to decide how stack frame should be aligned.  This is
! 	 independent of any psABIs nor 32-bit vs 64-bit.  */
!       cfun->machine->max_used_stack_alignment
! 	= stack_alignment / BITS_PER_UNIT;
      }
  
    if (crtl->stack_realign_needed != stack_realign)
*************** ix86_emit_outlined_ms2sysv_save (const s
*** 13229,13235 ****
    rtx_insn *insn;
    rtx sym, addr;
    rtx rax = gen_rtx_REG (word_mode, AX_REG);
!   const struct xlogue_layout &xlogue = xlogue_layout::get_instance ();
  
    /* AL should only be live with sysv_abi.  */
    gcc_assert (!ix86_eax_live_at_start_p ());
--- 7925,7931 ----
    rtx_insn *insn;
    rtx sym, addr;
    rtx rax = gen_rtx_REG (word_mode, AX_REG);
!   const class xlogue_layout &xlogue = xlogue_layout::get_instance ();
  
    /* AL should only be live with sysv_abi.  */
    gcc_assert (!ix86_eax_live_at_start_p ());
*************** ix86_emit_outlined_ms2sysv_save (const s
*** 13263,13268 ****
--- 7959,7978 ----
    RTX_FRAME_RELATED_P (insn) = true;
  }
  
+ /* Generate and return an insn body to AND X with Y.  */
+ 
+ static rtx_insn *
+ gen_and2_insn (rtx x, rtx y)
+ {
+   enum insn_code icode = optab_handler (and_optab, GET_MODE (x));
+ 
+   gcc_assert (insn_operand_matches (icode, 0, x));
+   gcc_assert (insn_operand_matches (icode, 1, x));
+   gcc_assert (insn_operand_matches (icode, 2, y));
+ 
+   return GEN_FCN (icode) (x, x, y);
+ }
+ 
  /* Expand the prologue into a bunch of separate insns.  */
  
  void
*************** ix86_expand_prologue (void)
*** 13308,13314 ****
        /* Check if profiling is active and we shall use profiling before
           prologue variant. If so sorry.  */
        if (crtl->profile && flag_fentry != 0)
!         sorry ("ms_hook_prologue attribute isn%'t compatible "
  	       "with %<-mfentry%> for 32-bit");
  
        /* In ix86_asm_output_function_label we emitted:
--- 8018,8024 ----
        /* Check if profiling is active and we shall use profiling before
           prologue variant. If so sorry.  */
        if (crtl->profile && flag_fentry != 0)
! 	sorry ("%<ms_hook_prologue%> attribute is not compatible "
  	       "with %<-mfentry%> for 32-bit");
  
        /* In ix86_asm_output_function_label we emitted:
*************** ix86_expand_prologue (void)
*** 13403,13409 ****
  	       "around by avoiding functions with aggregate return.");
  
        /* Only need to push parameter pointer reg if it is caller saved.  */
!       if (!call_used_regs[REGNO (crtl->drap_reg)])
  	{
  	  /* Push arg pointer reg */
  	  insn = emit_insn (gen_push (crtl->drap_reg));
--- 8113,8119 ----
  	       "around by avoiding functions with aggregate return.");
  
        /* Only need to push parameter pointer reg if it is caller saved.  */
!       if (!call_used_or_fixed_reg_p (REGNO (crtl->drap_reg)))
  	{
  	  /* Push arg pointer reg */
  	  insn = emit_insn (gen_push (crtl->drap_reg));
*************** ix86_expand_prologue (void)
*** 13418,13426 ****
        m->fs.cfa_offset = 0;
  
        /* Align the stack.  */
!       insn = emit_insn (ix86_gen_andsp (stack_pointer_rtx,
! 					stack_pointer_rtx,
! 					GEN_INT (-align_bytes)));
        RTX_FRAME_RELATED_P (insn) = 1;
  
        /* Replicate the return address on the stack so that return
--- 8128,8135 ----
        m->fs.cfa_offset = 0;
  
        /* Align the stack.  */
!       insn = emit_insn (gen_and2_insn (stack_pointer_rtx,
! 				       GEN_INT (-align_bytes)));
        RTX_FRAME_RELATED_P (insn) = 1;
  
        /* Replicate the return address on the stack so that return
*************** ix86_expand_prologue (void)
*** 13524,13532 ****
  				   GEN_INT (-allocate), -1, false);
  
        /* Align the stack.  */
!       insn = emit_insn (ix86_gen_andsp (stack_pointer_rtx,
! 					stack_pointer_rtx,
! 					GEN_INT (-align_bytes)));
        m->fs.sp_offset = ROUND_UP (m->fs.sp_offset, align_bytes);
        m->fs.sp_realigned_offset = m->fs.sp_offset
  					      - frame.stack_realign_allocate;
--- 8233,8239 ----
  				   GEN_INT (-allocate), -1, false);
  
        /* Align the stack.  */
!       emit_insn (gen_and2_insn (stack_pointer_rtx, GEN_INT (-align_bytes)));
        m->fs.sp_offset = ROUND_UP (m->fs.sp_offset, align_bytes);
        m->fs.sp_realigned_offset = m->fs.sp_offset
  					      - frame.stack_realign_allocate;
*************** ix86_expand_prologue (void)
*** 13581,13587 ****
  	  if (ix86_static_chain_on_stack)
  	    stack_size += UNITS_PER_WORD;
  
! 	  if (!call_used_regs[REGNO (crtl->drap_reg)])
  	    stack_size += UNITS_PER_WORD;
  
  	  /* This over-estimates by 1 minimal-stack-alignment-unit but
--- 8288,8294 ----
  	  if (ix86_static_chain_on_stack)
  	    stack_size += UNITS_PER_WORD;
  
! 	  if (!call_used_or_fixed_reg_p (REGNO (crtl->drap_reg)))
  	    stack_size += UNITS_PER_WORD;
  
  	  /* This over-estimates by 1 minimal-stack-alignment-unit but
*************** ix86_expand_prologue (void)
*** 13685,13691 ****
      {
        rtx eax = gen_rtx_REG (Pmode, AX_REG);
        rtx r10 = NULL;
-       rtx (*adjust_stack_insn)(rtx, rtx, rtx);
        const bool sp_is_cfa_reg = (m->fs.cfa_reg == stack_pointer_rtx);
        bool eax_live = ix86_eax_live_at_start_p ();
        bool r10_live = false;
--- 8392,8397 ----
*************** ix86_expand_prologue (void)
*** 13706,13712 ****
  	      RTX_FRAME_RELATED_P (insn) = 1;
  	      add_reg_note (insn, REG_FRAME_RELATED_EXPR,
  			    gen_rtx_SET (stack_pointer_rtx,
! 					 plus_constant (Pmode, stack_pointer_rtx,
  							-UNITS_PER_WORD)));
  	    }
  	}
--- 8412,8419 ----
  	      RTX_FRAME_RELATED_P (insn) = 1;
  	      add_reg_note (insn, REG_FRAME_RELATED_EXPR,
  			    gen_rtx_SET (stack_pointer_rtx,
! 					 plus_constant (Pmode,
! 							stack_pointer_rtx,
  							-UNITS_PER_WORD)));
  	    }
  	}
*************** ix86_expand_prologue (void)
*** 13723,13743 ****
  	      RTX_FRAME_RELATED_P (insn) = 1;
  	      add_reg_note (insn, REG_FRAME_RELATED_EXPR,
  			    gen_rtx_SET (stack_pointer_rtx,
! 					 plus_constant (Pmode, stack_pointer_rtx,
  							-UNITS_PER_WORD)));
  	    }
  	}
  
        emit_move_insn (eax, GEN_INT (allocate));
!       emit_insn (ix86_gen_allocate_stack_worker (eax, eax));
  
        /* Use the fact that AX still contains ALLOCATE.  */
!       adjust_stack_insn = (Pmode == DImode
! 			   ? gen_pro_epilogue_adjust_stack_di_sub
! 			   : gen_pro_epilogue_adjust_stack_si_sub);
! 
!       insn = emit_insn (adjust_stack_insn (stack_pointer_rtx,
! 					   stack_pointer_rtx, eax));
  
        if (sp_is_cfa_reg || TARGET_SEH)
  	{
--- 8430,8447 ----
  	      RTX_FRAME_RELATED_P (insn) = 1;
  	      add_reg_note (insn, REG_FRAME_RELATED_EXPR,
  			    gen_rtx_SET (stack_pointer_rtx,
! 					 plus_constant (Pmode,
! 							stack_pointer_rtx,
  							-UNITS_PER_WORD)));
  	    }
  	}
  
        emit_move_insn (eax, GEN_INT (allocate));
!       emit_insn (gen_allocate_stack_worker_probe (Pmode, eax, eax));
  
        /* Use the fact that AX still contains ALLOCATE.  */
!       insn = emit_insn (gen_pro_epilogue_adjust_stack_sub
! 			(Pmode, stack_pointer_rtx, stack_pointer_rtx, eax));
  
        if (sp_is_cfa_reg || TARGET_SEH)
  	{
*************** ix86_expand_prologue (void)
*** 13778,13784 ****
    /* If we havn't already set up the frame pointer, do so now.  */
    if (frame_pointer_needed && !m->fs.fp_valid)
      {
!       insn = ix86_gen_add3 (hard_frame_pointer_rtx, stack_pointer_rtx,
  			    GEN_INT (frame.stack_pointer_offset
  				     - frame.hard_frame_pointer_offset));
        insn = emit_insn (insn);
--- 8482,8488 ----
    /* If we havn't already set up the frame pointer, do so now.  */
    if (frame_pointer_needed && !m->fs.fp_valid)
      {
!       insn = gen_add3_insn (hard_frame_pointer_rtx, stack_pointer_rtx,
  			    GEN_INT (frame.stack_pointer_offset
  				     - frame.hard_frame_pointer_offset));
        insn = emit_insn (insn);
*************** static void
*** 13915,13922 ****
  ix86_emit_leave (rtx_insn *insn)
  {
    struct machine_function *m = cfun->machine;
    if (!insn)
!     insn = emit_insn (ix86_gen_leave ());
  
    ix86_add_queued_cfa_restore_notes (insn);
  
--- 8619,8627 ----
  ix86_emit_leave (rtx_insn *insn)
  {
    struct machine_function *m = cfun->machine;
+ 
    if (!insn)
!     insn = emit_insn (gen_leave (word_mode));
  
    ix86_add_queued_cfa_restore_notes (insn);
  
*************** ix86_emit_outlined_ms2sysv_restore (cons
*** 14023,14029 ****
    rtx sym, tmp;
    rtx rsi = gen_rtx_REG (word_mode, SI_REG);
    rtx r10 = NULL_RTX;
!   const struct xlogue_layout &xlogue = xlogue_layout::get_instance ();
    HOST_WIDE_INT stub_ptr_offset = xlogue.get_stub_ptr_offset ();
    HOST_WIDE_INT rsi_offset = frame.stack_realign_offset + stub_ptr_offset;
    rtx rsi_frame_load = NULL_RTX;
--- 8728,8734 ----
    rtx sym, tmp;
    rtx rsi = gen_rtx_REG (word_mode, SI_REG);
    rtx r10 = NULL_RTX;
!   const class xlogue_layout &xlogue = xlogue_layout::get_instance ();
    HOST_WIDE_INT stub_ptr_offset = xlogue.get_stub_ptr_offset ();
    HOST_WIDE_INT rsi_offset = frame.stack_realign_offset + stub_ptr_offset;
    rtx rsi_frame_load = NULL_RTX;
*************** ix86_expand_epilogue (int style)
*** 14347,14354 ****
  	      t = plus_constant (Pmode, t, m->fs.fp_offset - UNITS_PER_WORD);
  	      emit_insn (gen_rtx_SET (sa, t));
  
! 	      t = gen_frame_mem (Pmode, hard_frame_pointer_rtx);
! 	      insn = emit_move_insn (hard_frame_pointer_rtx, t);
  
  	      /* Note that we use SA as a temporary CFA, as the return
  		 address is at the proper place relative to it.  We
--- 9052,9064 ----
  	      t = plus_constant (Pmode, t, m->fs.fp_offset - UNITS_PER_WORD);
  	      emit_insn (gen_rtx_SET (sa, t));
  
! 	      /* NB: eh_return epilogues must restore the frame pointer
! 		 in word_mode since the upper 32 bits of RBP register
! 		 can have any values.  */
! 	      t = gen_frame_mem (word_mode, hard_frame_pointer_rtx);
! 	      rtx frame_reg = gen_rtx_REG (word_mode,
! 					   HARD_FRAME_POINTER_REGNUM);
! 	      insn = emit_move_insn (frame_reg, t);
  
  	      /* Note that we use SA as a temporary CFA, as the return
  		 address is at the proper place relative to it.  We
*************** ix86_expand_epilogue (int style)
*** 14363,14369 ****
  	      add_reg_note (insn, REG_CFA_DEF_CFA,
  			    plus_constant (Pmode, sa, UNITS_PER_WORD));
  	      ix86_add_queued_cfa_restore_notes (insn);
! 	      add_reg_note (insn, REG_CFA_RESTORE, hard_frame_pointer_rtx);
  	      RTX_FRAME_RELATED_P (insn) = 1;
  
  	      m->fs.cfa_reg = sa;
--- 9073,9079 ----
  	      add_reg_note (insn, REG_CFA_DEF_CFA,
  			    plus_constant (Pmode, sa, UNITS_PER_WORD));
  	      ix86_add_queued_cfa_restore_notes (insn);
! 	      add_reg_note (insn, REG_CFA_RESTORE, frame_reg);
  	      RTX_FRAME_RELATED_P (insn) = 1;
  
  	      m->fs.cfa_reg = sa;
*************** ix86_expand_epilogue (int style)
*** 14474,14480 ****
  
        if (ix86_static_chain_on_stack)
  	param_ptr_offset += UNITS_PER_WORD;
!       if (!call_used_regs[REGNO (crtl->drap_reg)])
  	param_ptr_offset += UNITS_PER_WORD;
  
        insn = emit_insn (gen_rtx_SET
--- 9184,9190 ----
  
        if (ix86_static_chain_on_stack)
  	param_ptr_offset += UNITS_PER_WORD;
!       if (!call_used_or_fixed_reg_p (REGNO (crtl->drap_reg)))
  	param_ptr_offset += UNITS_PER_WORD;
  
        insn = emit_insn (gen_rtx_SET
*************** ix86_expand_epilogue (int style)
*** 14492,14498 ****
  				  GEN_INT (param_ptr_offset)));
        RTX_FRAME_RELATED_P (insn) = 1;
  
!       if (!call_used_regs[REGNO (crtl->drap_reg)])
  	ix86_emit_restore_reg_using_pop (crtl->drap_reg);
      }
  
--- 9202,9208 ----
  				  GEN_INT (param_ptr_offset)));
        RTX_FRAME_RELATED_P (insn) = 1;
  
!       if (!call_used_or_fixed_reg_p (REGNO (crtl->drap_reg)))
  	ix86_emit_restore_reg_using_pop (crtl->drap_reg);
      }
  
*************** ix86_expand_split_stack_prologue (void)
*** 14810,14816 ****
        scratch_reg = gen_rtx_REG (Pmode, scratch_regno);
        if (!TARGET_64BIT || x86_64_immediate_operand (offset, Pmode))
  	{
! 	  /* We don't use ix86_gen_add3 in this case because it will
  	     want to split to lea, but when not optimizing the insn
  	     will not be split after this point.  */
  	  emit_insn (gen_rtx_SET (scratch_reg,
--- 9520,9526 ----
        scratch_reg = gen_rtx_REG (Pmode, scratch_regno);
        if (!TARGET_64BIT || x86_64_immediate_operand (offset, Pmode))
  	{
! 	  /* We don't use gen_add in this case because it will
  	     want to split to lea, but when not optimizing the insn
  	     will not be split after this point.  */
  	  emit_insn (gen_rtx_SET (scratch_reg,
*************** ix86_expand_split_stack_prologue (void)
*** 14820,14827 ****
        else
  	{
  	  emit_move_insn (scratch_reg, offset);
! 	  emit_insn (ix86_gen_add3 (scratch_reg, scratch_reg,
! 				    stack_pointer_rtx));
  	}
        current = scratch_reg;
      }
--- 9530,9536 ----
        else
  	{
  	  emit_move_insn (scratch_reg, offset);
! 	  emit_insn (gen_add2_insn (scratch_reg, stack_pointer_rtx));
  	}
        current = scratch_reg;
      }
*************** ix86_expand_split_stack_prologue (void)
*** 14898,14904 ****
  	      LABEL_PRESERVE_P (label) = 1;
  	      emit_insn (gen_set_rip_rex64 (reg10, label));
  	      emit_insn (gen_set_got_offset_rex64 (reg11, label));
! 	      emit_insn (ix86_gen_add3 (reg10, reg10, reg11));
  	      x = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, split_stack_fn_large),
  				  UNSPEC_GOT);
  	      x = gen_rtx_CONST (Pmode, x);
--- 9607,9613 ----
  	      LABEL_PRESERVE_P (label) = 1;
  	      emit_insn (gen_set_rip_rex64 (reg10, label));
  	      emit_insn (gen_set_got_offset_rex64 (reg11, label));
! 	      emit_insn (gen_add2_insn (reg10, reg11));
  	      x = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, split_stack_fn_large),
  				  UNSPEC_GOT);
  	      x = gen_rtx_CONST (Pmode, x);
*************** constant_address_p (rtx x)
*** 15974,15980 ****
  
  /* Return a unique alias set for the GOT.  */
  
! static alias_set_type
  ix86_GOT_alias_set (void)
  {
    static alias_set_type set = -1;
--- 10683,10689 ----
  
  /* Return a unique alias set for the GOT.  */
  
! alias_set_type
  ix86_GOT_alias_set (void)
  {
    static alias_set_type set = -1;
*************** ix86_GOT_alias_set (void)
*** 16001,16007 ****
     TARGET_LEGITIMATE_ADDRESS_P rejects symbolic references unless the PIC
     reg also appears in the address.  */
  
! static rtx
  legitimize_pic_address (rtx orig, rtx reg)
  {
    rtx addr = orig;
--- 10710,10716 ----
     TARGET_LEGITIMATE_ADDRESS_P rejects symbolic references unless the PIC
     reg also appears in the address.  */
  
! rtx
  legitimize_pic_address (rtx orig, rtx reg)
  {
    rtx addr = orig;
*************** ix86_tls_module_base (void)
*** 16260,16266 ****
    if (!ix86_tls_module_base_symbol)
      {
        ix86_tls_module_base_symbol
! 	= gen_rtx_SYMBOL_REF (Pmode, "_TLS_MODULE_BASE_");
  
        SYMBOL_REF_FLAGS (ix86_tls_module_base_symbol)
  	|= TLS_MODEL_GLOBAL_DYNAMIC << SYMBOL_FLAG_TLS_SHIFT;
--- 10969,10975 ----
    if (!ix86_tls_module_base_symbol)
      {
        ix86_tls_module_base_symbol
! 	= gen_rtx_SYMBOL_REF (ptr_mode, "_TLS_MODULE_BASE_");
  
        SYMBOL_REF_FLAGS (ix86_tls_module_base_symbol)
  	|= TLS_MODEL_GLOBAL_DYNAMIC << SYMBOL_FLAG_TLS_SHIFT;
*************** ix86_tls_module_base (void)
*** 16273,16279 ****
     false if we expect this to be used for a memory address and true if
     we expect to load the address into a register.  */
  
! static rtx
  legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
  {
    rtx dest, base, off;
--- 10982,10988 ----
     false if we expect this to be used for a memory address and true if
     we expect to load the address into a register.  */
  
! rtx
  legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
  {
    rtx dest, base, off;
*************** legitimize_tls_address (rtx x, enum tls_
*** 16291,16298 ****
    switch (model)
      {
      case TLS_MODEL_GLOBAL_DYNAMIC:
-       dest = gen_reg_rtx (Pmode);
- 
        if (!TARGET_64BIT)
  	{
  	  if (flag_pic && !TARGET_PECOFF)
--- 11000,11005 ----
*************** legitimize_tls_address (rtx x, enum tls_
*** 16306,16318 ****
  
        if (TARGET_GNU2_TLS)
  	{
  	  if (TARGET_64BIT)
! 	    emit_insn (gen_tls_dynamic_gnu2_64 (dest, x));
  	  else
  	    emit_insn (gen_tls_dynamic_gnu2_32 (dest, x, pic));
  
! 	  tp = get_thread_pointer (Pmode, true);
! 	  dest = force_reg (Pmode, gen_rtx_PLUS (Pmode, tp, dest));
  
  	  if (GET_MODE (x) != Pmode)
  	    x = gen_rtx_ZERO_EXTEND (Pmode, x);
--- 11013,11029 ----
  
        if (TARGET_GNU2_TLS)
  	{
+ 	  dest = gen_reg_rtx (ptr_mode);
  	  if (TARGET_64BIT)
! 	    emit_insn (gen_tls_dynamic_gnu2_64 (ptr_mode, dest, x));
  	  else
  	    emit_insn (gen_tls_dynamic_gnu2_32 (dest, x, pic));
  
! 	  tp = get_thread_pointer (ptr_mode, true);
! 	  dest = gen_rtx_PLUS (ptr_mode, tp, dest);
! 	  if (GET_MODE (dest) != Pmode)
! 	     dest = gen_rtx_ZERO_EXTEND (Pmode, dest);
! 	  dest = force_reg (Pmode, dest);
  
  	  if (GET_MODE (x) != Pmode)
  	    x = gen_rtx_ZERO_EXTEND (Pmode, x);
*************** legitimize_tls_address (rtx x, enum tls_
*** 16323,16328 ****
--- 11034,11040 ----
  	{
  	  rtx caddr = ix86_tls_get_addr ();
  
+ 	  dest = gen_reg_rtx (Pmode);
  	  if (TARGET_64BIT)
  	    {
  	      rtx rax = gen_rtx_REG (Pmode, AX_REG);
*************** legitimize_tls_address (rtx x, enum tls_
*** 16330,16336 ****
  
  	      start_sequence ();
  	      emit_call_insn
! 		(ix86_gen_tls_global_dynamic_64 (rax, x, caddr));
  	      insns = get_insns ();
  	      end_sequence ();
  
--- 11042,11048 ----
  
  	      start_sequence ();
  	      emit_call_insn
! 		(gen_tls_global_dynamic_64 (Pmode, rax, x, caddr));
  	      insns = get_insns ();
  	      end_sequence ();
  
*************** legitimize_tls_address (rtx x, enum tls_
*** 16346,16353 ****
        break;
  
      case TLS_MODEL_LOCAL_DYNAMIC:
-       base = gen_reg_rtx (Pmode);
- 
        if (!TARGET_64BIT)
  	{
  	  if (flag_pic)
--- 11058,11063 ----
*************** legitimize_tls_address (rtx x, enum tls_
*** 16363,16381 ****
  	{
  	  rtx tmp = ix86_tls_module_base ();
  
  	  if (TARGET_64BIT)
! 	    emit_insn (gen_tls_dynamic_gnu2_64 (base, tmp));
  	  else
  	    emit_insn (gen_tls_dynamic_gnu2_32 (base, tmp, pic));
  
! 	  tp = get_thread_pointer (Pmode, true);
! 	  set_unique_reg_note (get_last_insn (), REG_EQUAL,
! 			       gen_rtx_MINUS (Pmode, tmp, tp));
  	}
        else
  	{
  	  rtx caddr = ix86_tls_get_addr ();
  
  	  if (TARGET_64BIT)
  	    {
  	      rtx rax = gen_rtx_REG (Pmode, AX_REG);
--- 11073,11094 ----
  	{
  	  rtx tmp = ix86_tls_module_base ();
  
+ 	  base = gen_reg_rtx (ptr_mode);
  	  if (TARGET_64BIT)
! 	    emit_insn (gen_tls_dynamic_gnu2_64 (ptr_mode, base, tmp));
  	  else
  	    emit_insn (gen_tls_dynamic_gnu2_32 (base, tmp, pic));
  
! 	  tp = get_thread_pointer (ptr_mode, true);
! 	  if (GET_MODE (base) != Pmode)
! 	    base = gen_rtx_ZERO_EXTEND (Pmode, base);
! 	  base = force_reg (Pmode, base);
  	}
        else
  	{
  	  rtx caddr = ix86_tls_get_addr ();
  
+ 	  base = gen_reg_rtx (Pmode);
  	  if (TARGET_64BIT)
  	    {
  	      rtx rax = gen_rtx_REG (Pmode, AX_REG);
*************** legitimize_tls_address (rtx x, enum tls_
*** 16384,16390 ****
  
  	      start_sequence ();
  	      emit_call_insn
! 		(ix86_gen_tls_local_dynamic_base_64 (rax, caddr));
  	      insns = get_insns ();
  	      end_sequence ();
  
--- 11097,11103 ----
  
  	      start_sequence ();
  	      emit_call_insn
! 		(gen_tls_local_dynamic_base_64 (Pmode, rax, caddr));
  	      insns = get_insns ();
  	      end_sequence ();
  
*************** legitimize_tls_address (rtx x, enum tls_
*** 16407,16413 ****
  
        if (TARGET_GNU2_TLS)
  	{
! 	  dest = force_reg (Pmode, gen_rtx_PLUS (Pmode, dest, tp));
  
  	  if (GET_MODE (x) != Pmode)
  	    x = gen_rtx_ZERO_EXTEND (Pmode, x);
--- 11120,11134 ----
  
        if (TARGET_GNU2_TLS)
  	{
! 	  if (GET_MODE (tp) != Pmode)
! 	    {
! 	      dest = lowpart_subreg (ptr_mode, dest, Pmode);
! 	      dest = gen_rtx_PLUS (ptr_mode, tp, dest);
! 	      dest = gen_rtx_ZERO_EXTEND (Pmode, dest);
! 	    }
! 	  else
! 	    dest = gen_rtx_PLUS (Pmode, tp, dest);
! 	  dest = force_reg (Pmode, dest);
  
  	  if (GET_MODE (x) != Pmode)
  	    x = gen_rtx_ZERO_EXTEND (Pmode, x);
*************** legitimize_tls_address (rtx x, enum tls_
*** 16473,16479 ****
  	{
  	  base = get_thread_pointer (Pmode, true);
  	  dest = gen_reg_rtx (Pmode);
! 	  emit_insn (ix86_gen_sub3 (dest, base, off));
  	}
        break;
  
--- 11194,11200 ----
  	{
  	  base = get_thread_pointer (Pmode, true);
  	  dest = gen_reg_rtx (Pmode);
! 	  emit_insn (gen_sub3_insn (dest, base, off));
  	}
        break;
  
*************** legitimize_tls_address (rtx x, enum tls_
*** 16493,16499 ****
  	{
  	  base = get_thread_pointer (Pmode, true);
  	  dest = gen_reg_rtx (Pmode);
! 	  emit_insn (ix86_gen_sub3 (dest, base, off));
  	}
        break;
  
--- 11214,11220 ----
  	{
  	  base = get_thread_pointer (Pmode, true);
  	  dest = gen_reg_rtx (Pmode);
! 	  emit_insn (gen_sub3_insn (dest, base, off));
  	}
        break;
  
*************** legitimize_dllimport_symbol (rtx symbol,
*** 16713,16719 ****
  /* Expand SYMBOL into its corresponding dllimport or refptr symbol.  WANT_REG 
     is true if we require the result be a register.  */
  
! static rtx
  legitimize_pe_coff_symbol (rtx addr, bool inreg)
  {
    if (!TARGET_PECOFF)
--- 11434,11440 ----
  /* Expand SYMBOL into its corresponding dllimport or refptr symbol.  WANT_REG 
     is true if we require the result be a register.  */
  
! rtx
  legitimize_pe_coff_symbol (rtx addr, bool inreg)
  {
    if (!TARGET_PECOFF)
*************** ix86_print_operand (FILE *file, rtx x, i
*** 18017,18022 ****
--- 12738,12777 ----
  	    }
  	  return;
  
+ 	case 'I':
+ 	  if (ASSEMBLER_DIALECT == ASM_ATT)
+ 	    putc ('$', file);
+ 	  switch (GET_CODE (x))
+ 	    {
+ 	    case EQ:
+ 	      putc ('0', file);
+ 	      break;
+ 	    case NE:
+ 	      putc ('4', file);
+ 	      break;
+ 	    case GE:
+ 	    case GEU:
+ 	      putc ('5', file);
+ 	      break;
+ 	    case GT:
+ 	    case GTU:
+ 	      putc ('6', file);
+ 	      break;
+ 	    case LE:
+ 	    case LEU:
+ 	      putc ('2', file);
+ 	      break;
+ 	    case LT:
+ 	    case LTU:
+ 	      putc ('1', file);
+ 	      break;
+ 	    default:
+ 	      output_operand_lossage ("operand is not a condition code, "
+ 				      "invalid operand code 'I'");
+ 	      return;
+ 	    }
+ 	  return;
+ 
  	case 'Y':
  	  switch (GET_CODE (x))
  	    {
*************** i386_asm_output_addr_const_extra (FILE *
*** 18815,18869 ****
    return true;
  }
  
- /* Split one or more double-mode RTL references into pairs of half-mode
-    references.  The RTL can be REG, offsettable MEM, integer constant, or
-    CONST_DOUBLE.  "operands" is a pointer to an array of double-mode RTLs to
-    split and "num" is its length.  lo_half and hi_half are output arrays
-    that parallel "operands".  */
- 
- void
- split_double_mode (machine_mode mode, rtx operands[],
- 		   int num, rtx lo_half[], rtx hi_half[])
- {
-   machine_mode half_mode;
-   unsigned int byte;
- 
-   switch (mode)
-     {
-     case E_TImode:
-       half_mode = DImode;
-       break;
-     case E_DImode:
-       half_mode = SImode;
-       break;
-     default:
-       gcc_unreachable ();
-     }
- 
-   byte = GET_MODE_SIZE (half_mode);
- 
-   while (num--)
-     {
-       rtx op = operands[num];
- 
-       /* simplify_subreg refuse to split volatile memory addresses,
-          but we still have to handle it.  */
-       if (MEM_P (op))
- 	{
- 	  lo_half[num] = adjust_address (op, half_mode, 0);
- 	  hi_half[num] = adjust_address (op, half_mode, byte);
- 	}
-       else
- 	{
- 	  lo_half[num] = simplify_gen_subreg (half_mode, op,
- 					      GET_MODE (op) == VOIDmode
- 					      ? mode : GET_MODE (op), 0);
- 	  hi_half[num] = simplify_gen_subreg (half_mode, op,
- 					      GET_MODE (op) == VOIDmode
- 					      ? mode : GET_MODE (op), byte);
- 	}
-     }
- }
  
  /* Output code to perform a 387 binary operation in INSN, one of PLUS,
     MINUS, MULT or DIV.  OPERANDS are the insn operands, where operands[3]
--- 13570,13575 ----
*************** ix86_avx_u128_mode_needed (rtx_insn *ins
*** 19133,19138 ****
--- 13839,13853 ----
  	    }
  	}
  
+       /* If the function is known to preserve some SSE registers,
+ 	 RA and previous passes can legitimately rely on that for
+ 	 modes wider than 256 bits.  It's only safe to issue a
+ 	 vzeroupper if all SSE registers are clobbered.  */
+       const function_abi &abi = insn_callee_abi (insn);
+       if (!hard_reg_set_subset_p (reg_class_contents[SSE_REGS],
+ 				  abi.mode_clobbers (V4DImode)))
+ 	return AVX_U128_ANY;
+ 
        return AVX_U128_CLEAN;
      }
  
*************** ix86_i387_mode_needed (int entity, rtx_i
*** 19174,19179 ****
--- 13889,13899 ----
  
    switch (entity)
      {
+     case I387_ROUNDEVEN:
+       if (mode == I387_CW_ROUNDEVEN)
+ 	return mode;
+       break;
+ 
      case I387_TRUNC:
        if (mode == I387_CW_TRUNC)
  	return mode;
*************** ix86_mode_needed (int entity, rtx_insn *
*** 19208,19213 ****
--- 13928,13934 ----
        return ix86_dirflag_mode_needed (insn);
      case AVX_U128:
        return ix86_avx_u128_mode_needed (insn);
+     case I387_ROUNDEVEN:
      case I387_TRUNC:
      case I387_FLOOR:
      case I387_CEIL:
*************** ix86_avx_u128_mode_after (int mode, rtx_
*** 19246,19252 ****
    if (CALL_P (insn))
      {
        bool avx_upper_reg_found = false;
!       note_stores (pat, ix86_check_avx_upper_stores, &avx_upper_reg_found);
  
        return avx_upper_reg_found ? AVX_U128_DIRTY : AVX_U128_CLEAN;
      }
--- 13967,13973 ----
    if (CALL_P (insn))
      {
        bool avx_upper_reg_found = false;
!       note_stores (insn, ix86_check_avx_upper_stores, &avx_upper_reg_found);
  
        return avx_upper_reg_found ? AVX_U128_DIRTY : AVX_U128_CLEAN;
      }
*************** ix86_mode_after (int entity, int mode, r
*** 19268,19273 ****
--- 13989,13995 ----
        return mode;
      case AVX_U128:
        return ix86_avx_u128_mode_after (mode, insn);
+     case I387_ROUNDEVEN:
      case I387_TRUNC:
      case I387_FLOOR:
      case I387_CEIL:
*************** ix86_mode_entry (int entity)
*** 19320,19325 ****
--- 14042,14048 ----
        return ix86_dirflag_mode_entry ();
      case AVX_U128:
        return ix86_avx_u128_mode_entry ();
+     case I387_ROUNDEVEN:
      case I387_TRUNC:
      case I387_FLOOR:
      case I387_CEIL:
*************** ix86_mode_exit (int entity)
*** 19357,19362 ****
--- 14080,14086 ----
        return X86_DIRFLAG_ANY;
      case AVX_U128:
        return ix86_avx_u128_mode_exit ();
+     case I387_ROUNDEVEN:
      case I387_TRUNC:
      case I387_FLOOR:
      case I387_CEIL:
*************** emit_i387_cw_initialization (int mode)
*** 19391,19396 ****
--- 14115,14126 ----
  
    switch (mode)
      {
+     case I387_CW_ROUNDEVEN:
+       /* round to nearest */
+       emit_insn (gen_andhi3 (reg, reg, GEN_INT (~0x0c00)));
+       slot = SLOT_CW_ROUNDEVEN;
+       break;
+ 
      case I387_CW_TRUNC:
        /* round toward zero (truncate) */
        emit_insn (gen_iorhi3 (reg, reg, GEN_INT (0x0c00)));
*************** ix86_emit_mode_set (int entity, int mode
*** 19437,19442 ****
--- 14167,14173 ----
        if (mode == AVX_U128_CLEAN)
  	emit_insn (gen_avx_vzeroupper ());
        break;
+     case I387_ROUNDEVEN:
      case I387_TRUNC:
      case I387_FLOOR:
      case I387_CEIL:
*************** ix86_output_addr_diff_elt (FILE *file, i
*** 19630,20583 ****
  		 GOT_SYMBOL_NAME, LPREFIX, value);
  }
  
- /* Generate either "mov $0, reg" or "xor reg, reg", as appropriate
-    for the target.  */
- 
- void
- ix86_expand_clear (rtx dest)
- {
-   rtx tmp;
- 
-   /* We play register width games, which are only valid after reload.  */
-   gcc_assert (reload_completed);
- 
-   /* Avoid HImode and its attendant prefix byte.  */
-   if (GET_MODE_SIZE (GET_MODE (dest)) < 4)
-     dest = gen_rtx_REG (SImode, REGNO (dest));
-   tmp = gen_rtx_SET (dest, const0_rtx);
- 
-   if (!TARGET_USE_MOV0 || optimize_insn_for_size_p ())
-     {
-       rtx clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
-       tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, tmp, clob));
-     }
- 
-   emit_insn (tmp);
- }
- 
- void
- ix86_expand_move (machine_mode mode, rtx operands[])
- {
-   rtx op0, op1;
-   rtx tmp, addend = NULL_RTX;
-   enum tls_model model;
- 
-   op0 = operands[0];
-   op1 = operands[1];
- 
-   switch (GET_CODE (op1))
-     {
-     case CONST:
-       tmp = XEXP (op1, 0);
- 
-       if (GET_CODE (tmp) != PLUS
- 	  || GET_CODE (XEXP (tmp, 0)) != SYMBOL_REF)
- 	break;
- 
-       op1 = XEXP (tmp, 0);
-       addend = XEXP (tmp, 1);
-       /* FALLTHRU */
- 
-     case SYMBOL_REF:
-       model = SYMBOL_REF_TLS_MODEL (op1);
- 
-       if (model)
- 	op1 = legitimize_tls_address (op1, model, true);
-       else if (ix86_force_load_from_GOT_p (op1))
- 	{
- 	  /* Load the external function address via GOT slot to avoid PLT.  */
- 	  op1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op1),
- 				(TARGET_64BIT
- 				 ? UNSPEC_GOTPCREL
- 				 : UNSPEC_GOT));
- 	  op1 = gen_rtx_CONST (Pmode, op1);
- 	  op1 = gen_const_mem (Pmode, op1);
- 	  set_mem_alias_set (op1, ix86_GOT_alias_set ());
- 	}
-       else
- 	{
- 	  tmp = legitimize_pe_coff_symbol (op1, addend != NULL_RTX);
- 	  if (tmp)
- 	    {
- 	      op1 = tmp;
- 	      if (!addend)
- 		break;
- 	    }
- 	  else
- 	    {
- 	      op1 = operands[1];
- 	      break;
- 	    }
- 	}
- 
-       if (addend)
- 	{
- 	  op1 = force_operand (op1, NULL_RTX);
- 	  op1 = expand_simple_binop (Pmode, PLUS, op1, addend,
- 				     op0, 1, OPTAB_DIRECT);
- 	}
-       else
- 	op1 = force_operand (op1, op0);
- 
-       if (op1 == op0)
- 	return;
- 
-       op1 = convert_to_mode (mode, op1, 1);
- 
-     default:
-       break;
-     }
- 
-   if ((flag_pic || MACHOPIC_INDIRECT)
-       && symbolic_operand (op1, mode))
-     {
-       if (TARGET_MACHO && !TARGET_64BIT)
- 	{
- #if TARGET_MACHO
- 	  /* dynamic-no-pic */
- 	  if (MACHOPIC_INDIRECT)
- 	    {
- 	      rtx temp = (op0 && REG_P (op0) && mode == Pmode)
- 			 ? op0 : gen_reg_rtx (Pmode);
- 	      op1 = machopic_indirect_data_reference (op1, temp);
- 	      if (MACHOPIC_PURE)
- 		op1 = machopic_legitimize_pic_address (op1, mode,
- 						       temp == op1 ? 0 : temp);
- 	    }
- 	  if (op0 != op1 && GET_CODE (op0) != MEM)
- 	    {
- 	      rtx insn = gen_rtx_SET (op0, op1);
- 	      emit_insn (insn);
- 	      return;
- 	    }
- 	  if (GET_CODE (op0) == MEM)
- 	    op1 = force_reg (Pmode, op1);
- 	  else
- 	    {
- 	      rtx temp = op0;
- 	      if (GET_CODE (temp) != REG)
- 		temp = gen_reg_rtx (Pmode);
- 	      temp = legitimize_pic_address (op1, temp);
- 	      if (temp == op0)
- 	    return;
- 	      op1 = temp;
- 	    }
-       /* dynamic-no-pic */
- #endif
- 	}
-       else
- 	{
- 	  if (MEM_P (op0))
- 	    op1 = force_reg (mode, op1);
- 	  else if (!(TARGET_64BIT && x86_64_movabs_operand (op1, DImode)))
- 	    {
- 	      rtx reg = can_create_pseudo_p () ? NULL_RTX : op0;
- 	      op1 = legitimize_pic_address (op1, reg);
- 	      if (op0 == op1)
- 		return;
- 	      op1 = convert_to_mode (mode, op1, 1);
- 	    }
- 	}
-     }
-   else
-     {
-       if (MEM_P (op0)
- 	  && (PUSH_ROUNDING (GET_MODE_SIZE (mode)) != GET_MODE_SIZE (mode)
- 	      || !push_operand (op0, mode))
- 	  && MEM_P (op1))
- 	op1 = force_reg (mode, op1);
- 
-       if (push_operand (op0, mode)
- 	  && ! general_no_elim_operand (op1, mode))
- 	op1 = copy_to_mode_reg (mode, op1);
- 
-       /* Force large constants in 64bit compilation into register
- 	 to get them CSEed.  */
-       if (can_create_pseudo_p ()
- 	  && (mode == DImode) && TARGET_64BIT
- 	  && immediate_operand (op1, mode)
- 	  && !x86_64_zext_immediate_operand (op1, VOIDmode)
- 	  && !register_operand (op0, mode)
- 	  && optimize)
- 	op1 = copy_to_mode_reg (mode, op1);
- 
-       if (can_create_pseudo_p ()
- 	  && CONST_DOUBLE_P (op1))
- 	{
- 	  /* If we are loading a floating point constant to a register,
- 	     force the value to memory now, since we'll get better code
- 	     out the back end.  */
- 
- 	  op1 = validize_mem (force_const_mem (mode, op1));
- 	  if (!register_operand (op0, mode))
- 	    {
- 	      rtx temp = gen_reg_rtx (mode);
- 	      emit_insn (gen_rtx_SET (temp, op1));
- 	      emit_move_insn (op0, temp);
- 	      return;
- 	    }
- 	}
-     }
- 
-   emit_insn (gen_rtx_SET (op0, op1));
- }
- 
- void
- ix86_expand_vector_move (machine_mode mode, rtx operands[])
- {
-   rtx op0 = operands[0], op1 = operands[1];
-   /* Use GET_MODE_BITSIZE instead of GET_MODE_ALIGNMENT for IA MCU
-      psABI since the biggest alignment is 4 byte for IA MCU psABI.  */
-   unsigned int align = (TARGET_IAMCU
- 			? GET_MODE_BITSIZE (mode)
- 			: GET_MODE_ALIGNMENT (mode));
- 
-   if (push_operand (op0, VOIDmode))
-     op0 = emit_move_resolve_push (mode, op0);
- 
-   /* Force constants other than zero into memory.  We do not know how
-      the instructions used to build constants modify the upper 64 bits
-      of the register, once we have that information we may be able
-      to handle some of them more efficiently.  */
-   if (can_create_pseudo_p ()
-       && (CONSTANT_P (op1)
- 	  || (SUBREG_P (op1)
- 	      && CONSTANT_P (SUBREG_REG (op1))))
-       && ((register_operand (op0, mode)
- 	   && !standard_sse_constant_p (op1, mode))
- 	  /* ix86_expand_vector_move_misalign() does not like constants.  */
- 	  || (SSE_REG_MODE_P (mode)
- 	      && MEM_P (op0)
- 	      && MEM_ALIGN (op0) < align)))
-     {
-       if (SUBREG_P (op1))
- 	{
- 	  machine_mode imode = GET_MODE (SUBREG_REG (op1));
- 	  rtx r = force_const_mem (imode, SUBREG_REG (op1));
- 	  if (r)
- 	    r = validize_mem (r);
- 	  else
- 	    r = force_reg (imode, SUBREG_REG (op1));
- 	  op1 = simplify_gen_subreg (mode, r, imode, SUBREG_BYTE (op1));
- 	}
-       else
- 	op1 = validize_mem (force_const_mem (mode, op1));
-     }
- 
-   /* We need to check memory alignment for SSE mode since attribute
-      can make operands unaligned.  */
-   if (can_create_pseudo_p ()
-       && SSE_REG_MODE_P (mode)
-       && ((MEM_P (op0) && (MEM_ALIGN (op0) < align))
- 	  || (MEM_P (op1) && (MEM_ALIGN (op1) < align))))
-     {
-       rtx tmp[2];
- 
-       /* ix86_expand_vector_move_misalign() does not like both
- 	 arguments in memory.  */
-       if (!register_operand (op0, mode)
- 	  && !register_operand (op1, mode))
- 	op1 = force_reg (mode, op1);
- 
-       tmp[0] = op0; tmp[1] = op1;
-       ix86_expand_vector_move_misalign (mode, tmp);
-       return;
-     }
- 
-   /* Make operand1 a register if it isn't already.  */
-   if (can_create_pseudo_p ()
-       && !register_operand (op0, mode)
-       && !register_operand (op1, mode))
-     {
-       emit_move_insn (op0, force_reg (GET_MODE (op0), op1));
-       return;
-     }
- 
-   emit_insn (gen_rtx_SET (op0, op1));
- }
- 
- /* Split 32-byte AVX unaligned load and store if needed.  */
- 
- static void
- ix86_avx256_split_vector_move_misalign (rtx op0, rtx op1)
- {
-   rtx m;
-   rtx (*extract) (rtx, rtx, rtx);
-   machine_mode mode;
- 
-   if ((MEM_P (op1) && !TARGET_AVX256_SPLIT_UNALIGNED_LOAD)
-       || (MEM_P (op0) && !TARGET_AVX256_SPLIT_UNALIGNED_STORE))
-     {
-       emit_insn (gen_rtx_SET (op0, op1));
-       return;
-     }
- 
-   rtx orig_op0 = NULL_RTX;
-   mode = GET_MODE (op0);
-   switch (GET_MODE_CLASS (mode))
-     {
-     case MODE_VECTOR_INT:
-     case MODE_INT:
-       if (mode != V32QImode)
- 	{
- 	  if (!MEM_P (op0))
- 	    {
- 	      orig_op0 = op0;
- 	      op0 = gen_reg_rtx (V32QImode);
- 	    }
- 	  else
- 	    op0 = gen_lowpart (V32QImode, op0);
- 	  op1 = gen_lowpart (V32QImode, op1);
- 	  mode = V32QImode;
- 	}
-       break;
-     case MODE_VECTOR_FLOAT:
-       break;
-     default:
-       gcc_unreachable ();
-     }
- 
-   switch (mode)
-     {
-     default:
-       gcc_unreachable ();
-     case E_V32QImode:
-       extract = gen_avx_vextractf128v32qi;
-       mode = V16QImode;
-       break;
-     case E_V8SFmode:
-       extract = gen_avx_vextractf128v8sf;
-       mode = V4SFmode;
-       break;
-     case E_V4DFmode:
-       extract = gen_avx_vextractf128v4df;
-       mode = V2DFmode;
-       break;
-     }
- 
-   if (MEM_P (op1))
-     {
-       rtx r = gen_reg_rtx (mode);
-       m = adjust_address (op1, mode, 0);
-       emit_move_insn (r, m);
-       m = adjust_address (op1, mode, 16);
-       r = gen_rtx_VEC_CONCAT (GET_MODE (op0), r, m);
-       emit_move_insn (op0, r);
-     }
-   else if (MEM_P (op0))
-     {
-       m = adjust_address (op0, mode, 0);
-       emit_insn (extract (m, op1, const0_rtx));
-       m = adjust_address (op0, mode, 16);
-       emit_insn (extract (m, copy_rtx (op1), const1_rtx));
-     }
-   else
-     gcc_unreachable ();
- 
-   if (orig_op0)
-     emit_move_insn (orig_op0, gen_lowpart (GET_MODE (orig_op0), op0));
- }
- 
- /* Implement the movmisalign patterns for SSE.  Non-SSE modes go
-    straight to ix86_expand_vector_move.  */
- /* Code generation for scalar reg-reg moves of single and double precision data:
-      if (x86_sse_partial_reg_dependency == true | x86_sse_split_regs == true)
-        movaps reg, reg
-      else
-        movss reg, reg
-      if (x86_sse_partial_reg_dependency == true)
-        movapd reg, reg
-      else
-        movsd reg, reg
- 
-    Code generation for scalar loads of double precision data:
-      if (x86_sse_split_regs == true)
-        movlpd mem, reg      (gas syntax)
-      else
-        movsd mem, reg
- 
-    Code generation for unaligned packed loads of single precision data
-    (x86_sse_unaligned_move_optimal overrides x86_sse_partial_reg_dependency):
-      if (x86_sse_unaligned_move_optimal)
-        movups mem, reg
- 
-      if (x86_sse_partial_reg_dependency == true)
-        {
-          xorps  reg, reg
-          movlps mem, reg
-          movhps mem+8, reg
-        }
-      else
-        {
-          movlps mem, reg
-          movhps mem+8, reg
-        }
- 
-    Code generation for unaligned packed loads of double precision data
-    (x86_sse_unaligned_move_optimal overrides x86_sse_split_regs):
-      if (x86_sse_unaligned_move_optimal)
-        movupd mem, reg
- 
-      if (x86_sse_split_regs == true)
-        {
-          movlpd mem, reg
-          movhpd mem+8, reg
-        }
-      else
-        {
-          movsd  mem, reg
-          movhpd mem+8, reg
-        }
-  */
- 
- void
- ix86_expand_vector_move_misalign (machine_mode mode, rtx operands[])
- {
-   rtx op0, op1, m;
- 
-   op0 = operands[0];
-   op1 = operands[1];
- 
-   /* Use unaligned load/store for AVX512 or when optimizing for size.  */
-   if (GET_MODE_SIZE (mode) == 64 || optimize_insn_for_size_p ())
-     {
-       emit_insn (gen_rtx_SET (op0, op1));
-       return;
-     }
- 
-   if (TARGET_AVX)
-     {
-       if (GET_MODE_SIZE (mode) == 32)
- 	ix86_avx256_split_vector_move_misalign (op0, op1);
-       else
- 	/* Always use 128-bit mov<mode>_internal pattern for AVX.  */
- 	emit_insn (gen_rtx_SET (op0, op1));
-       return;
-     }
- 
-   if (TARGET_SSE_UNALIGNED_LOAD_OPTIMAL
-       || TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL)
-     {
-       emit_insn (gen_rtx_SET (op0, op1));
-       return;
-     }
- 
-   /* ??? If we have typed data, then it would appear that using
-      movdqu is the only way to get unaligned data loaded with
-      integer type.  */
-   if (TARGET_SSE2 && GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
-     {
-       emit_insn (gen_rtx_SET (op0, op1));
-       return;
-     }
- 
-   if (MEM_P (op1))
-     {
-       if (TARGET_SSE2 && mode == V2DFmode)
-         {
-           rtx zero;
- 
- 	  /* When SSE registers are split into halves, we can avoid
- 	     writing to the top half twice.  */
- 	  if (TARGET_SSE_SPLIT_REGS)
- 	    {
- 	      emit_clobber (op0);
- 	      zero = op0;
- 	    }
- 	  else
- 	    {
- 	      /* ??? Not sure about the best option for the Intel chips.
- 		 The following would seem to satisfy; the register is
- 		 entirely cleared, breaking the dependency chain.  We
- 		 then store to the upper half, with a dependency depth
- 		 of one.  A rumor has it that Intel recommends two movsd
- 		 followed by an unpacklpd, but this is unconfirmed.  And
- 		 given that the dependency depth of the unpacklpd would
- 		 still be one, I'm not sure why this would be better.  */
- 	      zero = CONST0_RTX (V2DFmode);
- 	    }
- 
- 	  m = adjust_address (op1, DFmode, 0);
- 	  emit_insn (gen_sse2_loadlpd (op0, zero, m));
- 	  m = adjust_address (op1, DFmode, 8);
- 	  emit_insn (gen_sse2_loadhpd (op0, op0, m));
- 	}
-       else
-         {
- 	  rtx t;
- 
- 	  if (mode != V4SFmode)
- 	    t = gen_reg_rtx (V4SFmode);
- 	  else
- 	    t = op0;
- 	    
- 	  if (TARGET_SSE_PARTIAL_REG_DEPENDENCY)
- 	    emit_move_insn (t, CONST0_RTX (V4SFmode));
- 	  else
- 	    emit_clobber (t);
- 
- 	  m = adjust_address (op1, V2SFmode, 0);
- 	  emit_insn (gen_sse_loadlps (t, t, m));
- 	  m = adjust_address (op1, V2SFmode, 8);
- 	  emit_insn (gen_sse_loadhps (t, t, m));
- 	  if (mode != V4SFmode)
- 	    emit_move_insn (op0, gen_lowpart (mode, t));
- 	}
-     }
-   else if (MEM_P (op0))
-     {
-       if (TARGET_SSE2 && mode == V2DFmode)
- 	{
- 	  m = adjust_address (op0, DFmode, 0);
- 	  emit_insn (gen_sse2_storelpd (m, op1));
- 	  m = adjust_address (op0, DFmode, 8);
- 	  emit_insn (gen_sse2_storehpd (m, op1));
- 	}
-       else
- 	{
- 	  if (mode != V4SFmode)
- 	    op1 = gen_lowpart (V4SFmode, op1);
- 
- 	  m = adjust_address (op0, V2SFmode, 0);
- 	  emit_insn (gen_sse_storelps (m, op1));
- 	  m = adjust_address (op0, V2SFmode, 8);
- 	  emit_insn (gen_sse_storehps (m, copy_rtx (op1)));
- 	}
-     }
-   else
-     gcc_unreachable ();
- }
- 
- /* Helper function of ix86_fixup_binary_operands to canonicalize
-    operand order.  Returns true if the operands should be swapped.  */
- 
- static bool
- ix86_swap_binary_operands_p (enum rtx_code code, machine_mode mode,
- 			     rtx operands[])
- {
-   rtx dst = operands[0];
-   rtx src1 = operands[1];
-   rtx src2 = operands[2];
- 
-   /* If the operation is not commutative, we can't do anything.  */
-   if (GET_RTX_CLASS (code) != RTX_COMM_ARITH
-       && GET_RTX_CLASS (code) != RTX_COMM_COMPARE)
-     return false;
- 
-   /* Highest priority is that src1 should match dst.  */
-   if (rtx_equal_p (dst, src1))
-     return false;
-   if (rtx_equal_p (dst, src2))
-     return true;
- 
-   /* Next highest priority is that immediate constants come second.  */
-   if (immediate_operand (src2, mode))
-     return false;
-   if (immediate_operand (src1, mode))
-     return true;
- 
-   /* Lowest priority is that memory references should come second.  */
-   if (MEM_P (src2))
-     return false;
-   if (MEM_P (src1))
-     return true;
- 
-   return false;
- }
- 
- 
- /* Fix up OPERANDS to satisfy ix86_binary_operator_ok.  Return the
-    destination to use for the operation.  If different from the true
-    destination in operands[0], a copy operation will be required.  */
- 
- rtx
- ix86_fixup_binary_operands (enum rtx_code code, machine_mode mode,
- 			    rtx operands[])
- {
-   rtx dst = operands[0];
-   rtx src1 = operands[1];
-   rtx src2 = operands[2];
- 
-   /* Canonicalize operand order.  */
-   if (ix86_swap_binary_operands_p (code, mode, operands))
-     {
-       /* It is invalid to swap operands of different modes.  */
-       gcc_assert (GET_MODE (src1) == GET_MODE (src2));
- 
-       std::swap (src1, src2);
-     }
- 
-   /* Both source operands cannot be in memory.  */
-   if (MEM_P (src1) && MEM_P (src2))
-     {
-       /* Optimization: Only read from memory once.  */
-       if (rtx_equal_p (src1, src2))
- 	{
- 	  src2 = force_reg (mode, src2);
- 	  src1 = src2;
- 	}
-       else if (rtx_equal_p (dst, src1))
- 	src2 = force_reg (mode, src2);
-       else
- 	src1 = force_reg (mode, src1);
-     }
- 
-   /* If the destination is memory, and we do not have matching source
-      operands, do things in registers.  */
-   if (MEM_P (dst) && !rtx_equal_p (dst, src1))
-     dst = gen_reg_rtx (mode);
- 
-   /* Source 1 cannot be a constant.  */
-   if (CONSTANT_P (src1))
-     src1 = force_reg (mode, src1);
- 
-   /* Source 1 cannot be a non-matching memory.  */
-   if (MEM_P (src1) && !rtx_equal_p (dst, src1))
-     src1 = force_reg (mode, src1);
- 
-   /* Improve address combine.  */
-   if (code == PLUS
-       && GET_MODE_CLASS (mode) == MODE_INT
-       && MEM_P (src2))
-     src2 = force_reg (mode, src2);
- 
-   operands[1] = src1;
-   operands[2] = src2;
-   return dst;
- }
- 
- /* Similarly, but assume that the destination has already been
-    set up properly.  */
- 
- void
- ix86_fixup_binary_operands_no_copy (enum rtx_code code,
- 				    machine_mode mode, rtx operands[])
- {
-   rtx dst = ix86_fixup_binary_operands (code, mode, operands);
-   gcc_assert (dst == operands[0]);
- }
- 
- /* Attempt to expand a binary operator.  Make the expansion closer to the
-    actual machine, then just general_operand, which will allow 3 separate
-    memory references (one output, two input) in a single insn.  */
- 
- void
- ix86_expand_binary_operator (enum rtx_code code, machine_mode mode,
- 			     rtx operands[])
- {
-   rtx src1, src2, dst, op, clob;
- 
-   dst = ix86_fixup_binary_operands (code, mode, operands);
-   src1 = operands[1];
-   src2 = operands[2];
- 
-  /* Emit the instruction.  */
- 
-   op = gen_rtx_SET (dst, gen_rtx_fmt_ee (code, mode, src1, src2));
- 
-   if (reload_completed
-       && code == PLUS
-       && !rtx_equal_p (dst, src1))
-     {
-       /* This is going to be an LEA; avoid splitting it later.  */
-       emit_insn (op);
-     }
-   else
-     {
-       clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
-       emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, op, clob)));
-     }
- 
-   /* Fix up the destination if needed.  */
-   if (dst != operands[0])
-     emit_move_insn (operands[0], dst);
- }
- 
- /* Expand vector logical operation CODE (AND, IOR, XOR) in MODE with
-    the given OPERANDS.  */
- 
- void
- ix86_expand_vector_logical_operator (enum rtx_code code, machine_mode mode,
- 				     rtx operands[])
- {
-   rtx op1 = NULL_RTX, op2 = NULL_RTX;
-   if (SUBREG_P (operands[1]))
-     {
-       op1 = operands[1];
-       op2 = operands[2];
-     }
-   else if (SUBREG_P (operands[2]))
-     {
-       op1 = operands[2];
-       op2 = operands[1];
-     }
-   /* Optimize (__m128i) d | (__m128i) e and similar code
-      when d and e are float vectors into float vector logical
-      insn.  In C/C++ without using intrinsics there is no other way
-      to express vector logical operation on float vectors than
-      to cast them temporarily to integer vectors.  */
-   if (op1
-       && !TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL
-       && (SUBREG_P (op2) || GET_CODE (op2) == CONST_VECTOR)
-       && GET_MODE_CLASS (GET_MODE (SUBREG_REG (op1))) == MODE_VECTOR_FLOAT
-       && GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))) == GET_MODE_SIZE (mode)
-       && SUBREG_BYTE (op1) == 0
-       && (GET_CODE (op2) == CONST_VECTOR
- 	  || (GET_MODE (SUBREG_REG (op1)) == GET_MODE (SUBREG_REG (op2))
- 	      && SUBREG_BYTE (op2) == 0))
-       && can_create_pseudo_p ())
-     {
-       rtx dst;
-       switch (GET_MODE (SUBREG_REG (op1)))
- 	{
- 	case E_V4SFmode:
- 	case E_V8SFmode:
- 	case E_V16SFmode:
- 	case E_V2DFmode:
- 	case E_V4DFmode:
- 	case E_V8DFmode:
- 	  dst = gen_reg_rtx (GET_MODE (SUBREG_REG (op1)));
- 	  if (GET_CODE (op2) == CONST_VECTOR)
- 	    {
- 	      op2 = gen_lowpart (GET_MODE (dst), op2);
- 	      op2 = force_reg (GET_MODE (dst), op2);
- 	    }
- 	  else
- 	    {
- 	      op1 = operands[1];
- 	      op2 = SUBREG_REG (operands[2]);
- 	      if (!vector_operand (op2, GET_MODE (dst)))
- 		op2 = force_reg (GET_MODE (dst), op2);
- 	    }
- 	  op1 = SUBREG_REG (op1);
- 	  if (!vector_operand (op1, GET_MODE (dst)))
- 	    op1 = force_reg (GET_MODE (dst), op1);
- 	  emit_insn (gen_rtx_SET (dst,
- 				  gen_rtx_fmt_ee (code, GET_MODE (dst),
- 						  op1, op2)));
- 	  emit_move_insn (operands[0], gen_lowpart (mode, dst));
- 	  return;
- 	default:
- 	  break;
- 	}
-     }
-   if (!vector_operand (operands[1], mode))
-     operands[1] = force_reg (mode, operands[1]);
-   if (!vector_operand (operands[2], mode))
-     operands[2] = force_reg (mode, operands[2]);
-   ix86_fixup_binary_operands_no_copy (code, mode, operands);
-   emit_insn (gen_rtx_SET (operands[0],
- 			  gen_rtx_fmt_ee (code, mode, operands[1],
- 					  operands[2])));
- }
- 
- /* Return TRUE or FALSE depending on whether the binary operator meets the
-    appropriate constraints.  */
- 
- bool
- ix86_binary_operator_ok (enum rtx_code code, machine_mode mode,
- 			 rtx operands[3])
- {
-   rtx dst = operands[0];
-   rtx src1 = operands[1];
-   rtx src2 = operands[2];
- 
-   /* Both source operands cannot be in memory.  */
-   if (MEM_P (src1) && MEM_P (src2))
-     return false;
- 
-   /* Canonicalize operand order for commutative operators.  */
-   if (ix86_swap_binary_operands_p (code, mode, operands))
-     std::swap (src1, src2);
- 
-   /* If the destination is memory, we must have a matching source operand.  */
-   if (MEM_P (dst) && !rtx_equal_p (dst, src1))
-     return false;
- 
-   /* Source 1 cannot be a constant.  */
-   if (CONSTANT_P (src1))
-     return false;
- 
-   /* Source 1 cannot be a non-matching memory.  */
-   if (MEM_P (src1) && !rtx_equal_p (dst, src1))
-     /* Support "andhi/andsi/anddi" as a zero-extending move.  */
-     return (code == AND
- 	    && (mode == HImode
- 		|| mode == SImode
- 		|| (TARGET_64BIT && mode == DImode))
- 	    && satisfies_constraint_L (src2));
- 
-   return true;
- }
- 
- /* Attempt to expand a unary operator.  Make the expansion closer to the
-    actual machine, then just general_operand, which will allow 2 separate
-    memory references (one output, one input) in a single insn.  */
- 
- void
- ix86_expand_unary_operator (enum rtx_code code, machine_mode mode,
- 			    rtx operands[])
- {
-   bool matching_memory = false;
-   rtx src, dst, op, clob;
- 
-   dst = operands[0];
-   src = operands[1];
- 
-   /* If the destination is memory, and we do not have matching source
-      operands, do things in registers.  */
-   if (MEM_P (dst))
-     {
-       if (rtx_equal_p (dst, src))
- 	matching_memory = true;
-       else
- 	dst = gen_reg_rtx (mode);
-     }
- 
-   /* When source operand is memory, destination must match.  */
-   if (MEM_P (src) && !matching_memory)
-     src = force_reg (mode, src);
- 
-   /* Emit the instruction.  */
- 
-   op = gen_rtx_SET (dst, gen_rtx_fmt_e (code, mode, src));
- 
-   if (code == NOT)
-     emit_insn (op);
-   else
-     {
-       clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
-       emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, op, clob)));
-     }
- 
-   /* Fix up the destination if needed.  */
-   if (dst != operands[0])
-     emit_move_insn (operands[0], dst);
- }
- 
- /* Split 32bit/64bit divmod with 8bit unsigned divmod if dividend and
-    divisor are within the range [0-255].  */
- 
- void
- ix86_split_idivmod (machine_mode mode, rtx operands[],
- 		    bool signed_p)
- {
-   rtx_code_label *end_label, *qimode_label;
-   rtx div, mod;
-   rtx_insn *insn;
-   rtx scratch, tmp0, tmp1, tmp2;
-   rtx (*gen_divmod4_1) (rtx, rtx, rtx, rtx);
-   rtx (*gen_zero_extend) (rtx, rtx);
-   rtx (*gen_test_ccno_1) (rtx, rtx);
- 
-   switch (mode)
-     {
-     case E_SImode:
-       if (GET_MODE (operands[0]) == SImode)
- 	{
- 	  if (GET_MODE (operands[1]) == SImode)
- 	    gen_divmod4_1 = signed_p ? gen_divmodsi4_1 : gen_udivmodsi4_1;
- 	  else
- 	    gen_divmod4_1
- 	      = signed_p ? gen_divmodsi4_zext_2 : gen_udivmodsi4_zext_2;
- 	  gen_zero_extend = gen_zero_extendqisi2;
- 	}
-       else
- 	{
- 	  gen_divmod4_1
- 	    = signed_p ? gen_divmodsi4_zext_1 : gen_udivmodsi4_zext_1;
- 	  gen_zero_extend = gen_zero_extendqidi2;
- 	}
-       gen_test_ccno_1 = gen_testsi_ccno_1;
-       break;
-     case E_DImode:
-       gen_divmod4_1 = signed_p ? gen_divmoddi4_1 : gen_udivmoddi4_1;
-       gen_test_ccno_1 = gen_testdi_ccno_1;
-       gen_zero_extend = gen_zero_extendqidi2;
-       break;
-     default:
-       gcc_unreachable ();
-     }
- 
-   end_label = gen_label_rtx ();
-   qimode_label = gen_label_rtx ();
- 
-   scratch = gen_reg_rtx (mode);
- 
-   /* Use 8bit unsigned divimod if dividend and divisor are within
-      the range [0-255].  */
-   emit_move_insn (scratch, operands[2]);
-   scratch = expand_simple_binop (mode, IOR, scratch, operands[3],
- 				 scratch, 1, OPTAB_DIRECT);
-   emit_insn (gen_test_ccno_1 (scratch, GEN_INT (-0x100)));
-   tmp0 = gen_rtx_REG (CCNOmode, FLAGS_REG);
-   tmp0 = gen_rtx_EQ (VOIDmode, tmp0, const0_rtx);
-   tmp0 = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp0,
- 			       gen_rtx_LABEL_REF (VOIDmode, qimode_label),
- 			       pc_rtx);
-   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp0));
-   predict_jump (REG_BR_PROB_BASE * 50 / 100);
-   JUMP_LABEL (insn) = qimode_label;
- 
-   /* Generate original signed/unsigned divimod.  */
-   div = gen_divmod4_1 (operands[0], operands[1],
- 		       operands[2], operands[3]);
-   emit_insn (div);
- 
-   /* Branch to the end.  */
-   emit_jump_insn (gen_jump (end_label));
-   emit_barrier ();
- 
-   /* Generate 8bit unsigned divide.  */
-   emit_label (qimode_label);
-   /* Don't use operands[0] for result of 8bit divide since not all
-      registers support QImode ZERO_EXTRACT.  */
-   tmp0 = lowpart_subreg (HImode, scratch, mode);
-   tmp1 = lowpart_subreg (HImode, operands[2], mode);
-   tmp2 = lowpart_subreg (QImode, operands[3], mode);
-   emit_insn (gen_udivmodhiqi3 (tmp0, tmp1, tmp2));
- 
-   if (signed_p)
-     {
-       div = gen_rtx_DIV (mode, operands[2], operands[3]);
-       mod = gen_rtx_MOD (mode, operands[2], operands[3]);
-     }
-   else
-     {
-       div = gen_rtx_UDIV (mode, operands[2], operands[3]);
-       mod = gen_rtx_UMOD (mode, operands[2], operands[3]);
-     }
-   if (mode == SImode)
-     {
-       if (GET_MODE (operands[0]) != SImode)
- 	div = gen_rtx_ZERO_EXTEND (DImode, div);
-       if (GET_MODE (operands[1]) != SImode)
- 	mod = gen_rtx_ZERO_EXTEND (DImode, mod);
-     }
- 
-   /* Extract remainder from AH.  */
-   tmp1 = gen_rtx_ZERO_EXTRACT (GET_MODE (operands[1]),
- 			       tmp0, GEN_INT (8), GEN_INT (8));
-   if (REG_P (operands[1]))
-     insn = emit_move_insn (operands[1], tmp1);
-   else
-     {
-       /* Need a new scratch register since the old one has result
- 	 of 8bit divide.  */
-       scratch = gen_reg_rtx (GET_MODE (operands[1]));
-       emit_move_insn (scratch, tmp1);
-       insn = emit_move_insn (operands[1], scratch);
-     }
-   set_unique_reg_note (insn, REG_EQUAL, mod);
- 
-   /* Zero extend quotient from AL.  */
-   tmp1 = gen_lowpart (QImode, tmp0);
-   insn = emit_insn (gen_zero_extend (operands[0], tmp1));
-   set_unique_reg_note (insn, REG_EQUAL, div);
- 
-   emit_label (end_label);
- }
- 
  #define LEA_MAX_STALL (3)
  #define LEA_SEARCH_THRESHOLD (LEA_MAX_STALL << 1)
  
--- 14361,14366 ----
*************** increase_distance (rtx_insn *prev, rtx_i
*** 20609,20615 ****
  /* Function checks if instruction INSN defines register number
     REGNO1 or REGNO2.  */
  
! static bool
  insn_defines_reg (unsigned int regno1, unsigned int regno2,
  		  rtx_insn *insn)
  {
--- 14392,14398 ----
  /* Function checks if instruction INSN defines register number
     REGNO1 or REGNO2.  */
  
! bool
  insn_defines_reg (unsigned int regno1, unsigned int regno2,
  		  rtx_insn *insn)
  {
*************** distance_agu_use (unsigned int regno0, r
*** 20898,20907 ****
  }
  
  /* Define this macro to tune LEA priority vs ADD, it take effect when
!    there is a dilemma of choicing LEA or ADD
     Negative value: ADD is more preferred than LEA
!    Zero: Netrual
!    Positive value: LEA is more preferred than ADD*/
  #define IX86_LEA_PRIORITY 0
  
  /* Return true if usage of lea INSN has performance advantage
--- 14681,14690 ----
  }
  
  /* Define this macro to tune LEA priority vs ADD, it take effect when
!    there is a dilemma of choosing LEA or ADD
     Negative value: ADD is more preferred than LEA
!    Zero: Neutral
!    Positive value: LEA is more preferred than ADD.  */
  #define IX86_LEA_PRIORITY 0
  
  /* Return true if usage of lea INSN has performance advantage
*************** ix86_lea_outperforms (rtx_insn *insn, un
*** 20914,20924 ****
  {
    int dist_define, dist_use;
  
!   /* For Silvermont if using a 2-source or 3-source LEA for
!      non-destructive destination purposes, or due to wanting
!      ability to use SCALE, the use of LEA is justified.  */
!   if (TARGET_SILVERMONT || TARGET_GOLDMONT || TARGET_GOLDMONT_PLUS
!       || TARGET_TREMONT || TARGET_INTEL)
      {
        if (has_scale)
  	return true;
--- 14697,14706 ----
  {
    int dist_define, dist_use;
  
!   /* For Atom processors newer than Bonnell, if using a 2-source or
!      3-source LEA for non-destructive destination purposes, or due to
!      wanting ability to use SCALE, the use of LEA is justified.  */
!   if (!TARGET_BONNELL)
      {
        if (has_scale)
  	return true;
*************** ix86_lea_outperforms (rtx_insn *insn, un
*** 20929,20937 ****
--- 14711,14728 ----
        return true;
      }
  
+   rtx_insn *rinsn = recog_data.insn;
+ 
    dist_define = distance_non_agu_define (regno1, regno2, insn);
    dist_use = distance_agu_use (regno0, insn);
  
+   /* distance_non_agu_define can call extract_insn_cached.  If this function
+      is called from define_split conditions, that can break insn splitting,
+      because split_insns works by clearing recog_data.insn and then modifying
+      recog_data.operand array and match the various split conditions.  */
+   if (recog_data.insn != rinsn)
+     recog_data.insn = NULL;
+ 
    if (dist_define < 0 || dist_define >= LEA_MAX_STALL)
      {
        /* If there is no non AGU operand definition, no AGU
*************** ix86_avoid_lea_for_addr (rtx_insn *insn,
*** 21053,21062 ****
    struct ix86_address parts;
    int ok;
  
-   /* Check we need to optimize.  */
-   if (!TARGET_AVOID_LEA_FOR_ADDR || optimize_function_for_size_p (cfun))
-     return false;
- 
    /* The "at least two components" test below might not catch simple
       move or zero extension insns if parts.base is non-NULL and parts.disp
       is const0_rtx as the only components in the address, e.g. if the
--- 14844,14849 ----
*************** ix86_avoid_lea_for_addr (rtx_insn *insn,
*** 21093,21098 ****
--- 14880,14899 ----
    if (parts.index)
      regno2 = true_regnum (parts.index);
  
+   /* Use add for a = a + b and a = b + a since it is faster and shorter
+      than lea for most processors.  For the processors like BONNELL, if
+      the destination register of LEA holds an actual address which will
+      be used soon, LEA is better and otherwise ADD is better.  */
+   if (!TARGET_BONNELL
+       && parts.scale == 1
+       && (!parts.disp || parts.disp == const0_rtx)
+       && (regno0 == regno1 || regno0 == regno2))
+     return true;
+ 
+   /* Check we need to optimize.  */
+   if (!TARGET_AVOID_LEA_FOR_ADDR || optimize_function_for_size_p (cfun))
+     return false;
+ 
    split_cost = 0;
  
    /* Compute how many cycles we will add to execution time
*************** ix86_avoid_lea_for_addr (rtx_insn *insn,
*** 21132,21299 ****
  				parts.scale > 1);
  }
  
- /* Emit x86 binary operand CODE in mode MODE, where the first operand
-    matches destination.  RTX includes clobber of FLAGS_REG.  */
- 
- static void
- ix86_emit_binop (enum rtx_code code, machine_mode mode,
- 		 rtx dst, rtx src)
- {
-   rtx op, clob;
- 
-   op = gen_rtx_SET (dst, gen_rtx_fmt_ee (code, mode, dst, src));
-   clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
-   
-   emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, op, clob)));
- }
- 
- /* Return true if regno1 def is nearest to the insn.  */
- 
- static bool
- find_nearest_reg_def (rtx_insn *insn, int regno1, int regno2)
- {
-   rtx_insn *prev = insn;
-   rtx_insn *start = BB_HEAD (BLOCK_FOR_INSN (insn));
- 
-   if (insn == start)
-     return false;
-   while (prev && prev != start)
-     {
-       if (!INSN_P (prev) || !NONDEBUG_INSN_P (prev))
- 	{
- 	  prev = PREV_INSN (prev);
- 	  continue;
- 	}
-       if (insn_defines_reg (regno1, INVALID_REGNUM, prev))
- 	return true;
-       else if (insn_defines_reg (regno2, INVALID_REGNUM, prev))
- 	return false;
-       prev = PREV_INSN (prev);
-     }
- 
-   /* None of the regs is defined in the bb.  */
-   return false;
- }
- 
- /* Split lea instructions into a sequence of instructions
-    which are executed on ALU to avoid AGU stalls.
-    It is assumed that it is allowed to clobber flags register
-    at lea position.  */
- 
- void
- ix86_split_lea_for_addr (rtx_insn *insn, rtx operands[], machine_mode mode)
- {
-   unsigned int regno0, regno1, regno2;
-   struct ix86_address parts;
-   rtx target, tmp;
-   int ok, adds;
- 
-   ok = ix86_decompose_address (operands[1], &parts);
-   gcc_assert (ok);
- 
-   target = gen_lowpart (mode, operands[0]);
- 
-   regno0 = true_regnum (target);
-   regno1 = INVALID_REGNUM;
-   regno2 = INVALID_REGNUM;
- 
-   if (parts.base)
-     {
-       parts.base = gen_lowpart (mode, parts.base);
-       regno1 = true_regnum (parts.base);
-     }
- 
-   if (parts.index)
-     {
-       parts.index = gen_lowpart (mode, parts.index);
-       regno2 = true_regnum (parts.index);
-     }
- 
-   if (parts.disp)
-     parts.disp = gen_lowpart (mode, parts.disp);
- 
-   if (parts.scale > 1)
-     {
-       /* Case r1 = r1 + ...  */
-       if (regno1 == regno0)
- 	{
- 	  /* If we have a case r1 = r1 + C * r2 then we
- 	     should use multiplication which is very
- 	     expensive.  Assume cost model is wrong if we
- 	     have such case here.  */
- 	  gcc_assert (regno2 != regno0);
- 
- 	  for (adds = parts.scale; adds > 0; adds--)
- 	    ix86_emit_binop (PLUS, mode, target, parts.index);
- 	}
-       else
- 	{
- 	  /* r1 = r2 + r3 * C case.  Need to move r3 into r1.  */
- 	  if (regno0 != regno2)
- 	    emit_insn (gen_rtx_SET (target, parts.index));
- 
- 	  /* Use shift for scaling.  */
- 	  ix86_emit_binop (ASHIFT, mode, target,
- 			   GEN_INT (exact_log2 (parts.scale)));
- 
- 	  if (parts.base)
- 	    ix86_emit_binop (PLUS, mode, target, parts.base);
- 
- 	  if (parts.disp && parts.disp != const0_rtx)
- 	    ix86_emit_binop (PLUS, mode, target, parts.disp);
- 	}
-     }
-   else if (!parts.base && !parts.index)
-     {
-       gcc_assert(parts.disp);
-       emit_insn (gen_rtx_SET (target, parts.disp));
-     }
-   else
-     {
-       if (!parts.base)
- 	{
- 	  if (regno0 != regno2)
- 	    emit_insn (gen_rtx_SET (target, parts.index));
- 	}
-       else if (!parts.index)
- 	{
- 	  if (regno0 != regno1)
- 	    emit_insn (gen_rtx_SET (target, parts.base));
- 	}
-       else
- 	{
- 	  if (regno0 == regno1)
- 	    tmp = parts.index;
- 	  else if (regno0 == regno2)
- 	    tmp = parts.base;
- 	  else
- 	    {
- 	      rtx tmp1;
- 
- 	      /* Find better operand for SET instruction, depending
- 		 on which definition is farther from the insn.  */
- 	      if (find_nearest_reg_def (insn, regno1, regno2))
- 		tmp = parts.index, tmp1 = parts.base;
- 	      else
- 		tmp = parts.base, tmp1 = parts.index;
- 
- 	      emit_insn (gen_rtx_SET (target, tmp));
- 
- 	      if (parts.disp && parts.disp != const0_rtx)
- 		ix86_emit_binop (PLUS, mode, target, parts.disp);
- 
- 	      ix86_emit_binop (PLUS, mode, target, tmp1);
- 	      return;
- 	    }
- 
- 	  ix86_emit_binop (PLUS, mode, target, tmp);
- 	}
- 
-       if (parts.disp && parts.disp != const0_rtx)
- 	ix86_emit_binop (PLUS, mode, target, parts.disp);
-     }
- }
- 
  /* Return true if it is ok to optimize an ADD operation to LEA
     operation to avoid flag register consumation.  For most processors,
     ADD is faster than LEA.  For the processors like BONNELL, if the
--- 14933,14938 ----
*************** ix86_vec_interleave_v2df_operator_ok (rt
*** 21425,21729 ****
    return true;
  }
  
- /* Post-reload splitter for converting an SF or DFmode value in an
-    SSE register into an unsigned SImode.  */
- 
- void
- ix86_split_convert_uns_si_sse (rtx operands[])
- {
-   machine_mode vecmode;
-   rtx value, large, zero_or_two31, input, two31, x;
- 
-   large = operands[1];
-   zero_or_two31 = operands[2];
-   input = operands[3];
-   two31 = operands[4];
-   vecmode = GET_MODE (large);
-   value = gen_rtx_REG (vecmode, REGNO (operands[0]));
- 
-   /* Load up the value into the low element.  We must ensure that the other
-      elements are valid floats -- zero is the easiest such value.  */
-   if (MEM_P (input))
-     {
-       if (vecmode == V4SFmode)
- 	emit_insn (gen_vec_setv4sf_0 (value, CONST0_RTX (V4SFmode), input));
-       else
- 	emit_insn (gen_sse2_loadlpd (value, CONST0_RTX (V2DFmode), input));
-     }
-   else
-     {
-       input = gen_rtx_REG (vecmode, REGNO (input));
-       emit_move_insn (value, CONST0_RTX (vecmode));
-       if (vecmode == V4SFmode)
- 	emit_insn (gen_sse_movss (value, value, input));
-       else
- 	emit_insn (gen_sse2_movsd (value, value, input));
-     }
- 
-   emit_move_insn (large, two31);
-   emit_move_insn (zero_or_two31, MEM_P (two31) ? large : two31);
- 
-   x = gen_rtx_fmt_ee (LE, vecmode, large, value);
-   emit_insn (gen_rtx_SET (large, x));
- 
-   x = gen_rtx_AND (vecmode, zero_or_two31, large);
-   emit_insn (gen_rtx_SET (zero_or_two31, x));
- 
-   x = gen_rtx_MINUS (vecmode, value, zero_or_two31);
-   emit_insn (gen_rtx_SET (value, x));
- 
-   large = gen_rtx_REG (V4SImode, REGNO (large));
-   emit_insn (gen_ashlv4si3 (large, large, GEN_INT (31)));
- 
-   x = gen_rtx_REG (V4SImode, REGNO (value));
-   if (vecmode == V4SFmode)
-     emit_insn (gen_fix_truncv4sfv4si2 (x, value));
-   else
-     emit_insn (gen_sse2_cvttpd2dq (x, value));
-   value = x;
- 
-   emit_insn (gen_xorv4si3 (value, value, large));
- }
- 
- /* Convert an unsigned DImode value into a DFmode, using only SSE.
-    Expects the 64-bit DImode to be supplied in a pair of integral
-    registers.  Requires SSE2; will use SSE3 if available.  For x86_32,
-    -mfpmath=sse, !optimize_size only.  */
- 
- void
- ix86_expand_convert_uns_didf_sse (rtx target, rtx input)
- {
-   REAL_VALUE_TYPE bias_lo_rvt, bias_hi_rvt;
-   rtx int_xmm, fp_xmm;
-   rtx biases, exponents;
-   rtx x;
- 
-   int_xmm = gen_reg_rtx (V4SImode);
-   if (TARGET_INTER_UNIT_MOVES_TO_VEC)
-     emit_insn (gen_movdi_to_sse (int_xmm, input));
-   else if (TARGET_SSE_SPLIT_REGS)
-     {
-       emit_clobber (int_xmm);
-       emit_move_insn (gen_lowpart (DImode, int_xmm), input);
-     }
-   else
-     {
-       x = gen_reg_rtx (V2DImode);
-       ix86_expand_vector_init_one_nonzero (false, V2DImode, x, input, 0);
-       emit_move_insn (int_xmm, gen_lowpart (V4SImode, x));
-     }
- 
-   x = gen_rtx_CONST_VECTOR (V4SImode,
- 			    gen_rtvec (4, GEN_INT (0x43300000UL),
- 				       GEN_INT (0x45300000UL),
- 				       const0_rtx, const0_rtx));
-   exponents = validize_mem (force_const_mem (V4SImode, x));
- 
-   /* int_xmm = {0x45300000UL, fp_xmm/hi, 0x43300000, fp_xmm/lo } */
-   emit_insn (gen_vec_interleave_lowv4si (int_xmm, int_xmm, exponents));
- 
-   /* Concatenating (juxtaposing) (0x43300000UL ## fp_value_low_xmm)
-      yields a valid DF value equal to (0x1.0p52 + double(fp_value_lo_xmm)).
-      Similarly (0x45300000UL ## fp_value_hi_xmm) yields
-      (0x1.0p84 + double(fp_value_hi_xmm)).
-      Note these exponents differ by 32.  */
- 
-   fp_xmm = copy_to_mode_reg (V2DFmode, gen_lowpart (V2DFmode, int_xmm));
- 
-   /* Subtract off those 0x1.0p52 and 0x1.0p84 biases, to produce values
-      in [0,2**32-1] and [0]+[2**32,2**64-1] respectively.  */
-   real_ldexp (&bias_lo_rvt, &dconst1, 52);
-   real_ldexp (&bias_hi_rvt, &dconst1, 84);
-   biases = const_double_from_real_value (bias_lo_rvt, DFmode);
-   x = const_double_from_real_value (bias_hi_rvt, DFmode);
-   biases = gen_rtx_CONST_VECTOR (V2DFmode, gen_rtvec (2, biases, x));
-   biases = validize_mem (force_const_mem (V2DFmode, biases));
-   emit_insn (gen_subv2df3 (fp_xmm, fp_xmm, biases));
- 
-   /* Add the upper and lower DFmode values together.  */
-   if (TARGET_SSE3)
-     emit_insn (gen_sse3_haddv2df3 (fp_xmm, fp_xmm, fp_xmm));
-   else
-     {
-       x = copy_to_mode_reg (V2DFmode, fp_xmm);
-       emit_insn (gen_vec_interleave_highv2df (fp_xmm, fp_xmm, fp_xmm));
-       emit_insn (gen_addv2df3 (fp_xmm, fp_xmm, x));
-     }
- 
-   ix86_expand_vector_extract (false, target, fp_xmm, 0);
- }
- 
- /* Not used, but eases macroization of patterns.  */
- void
- ix86_expand_convert_uns_sixf_sse (rtx, rtx)
- {
-   gcc_unreachable ();
- }
- 
- /* Convert an unsigned SImode value into a DFmode.  Only currently used
-    for SSE, but applicable anywhere.  */
- 
- void
- ix86_expand_convert_uns_sidf_sse (rtx target, rtx input)
- {
-   REAL_VALUE_TYPE TWO31r;
-   rtx x, fp;
- 
-   x = expand_simple_binop (SImode, PLUS, input, GEN_INT (-2147483647 - 1),
- 			   NULL, 1, OPTAB_DIRECT);
- 
-   fp = gen_reg_rtx (DFmode);
-   emit_insn (gen_floatsidf2 (fp, x));
- 
-   real_ldexp (&TWO31r, &dconst1, 31);
-   x = const_double_from_real_value (TWO31r, DFmode);
- 
-   x = expand_simple_binop (DFmode, PLUS, fp, x, target, 0, OPTAB_DIRECT);
-   if (x != target)
-     emit_move_insn (target, x);
- }
- 
- /* Convert a signed DImode value into a DFmode.  Only used for SSE in
-    32-bit mode; otherwise we have a direct convert instruction.  */
- 
- void
- ix86_expand_convert_sign_didf_sse (rtx target, rtx input)
- {
-   REAL_VALUE_TYPE TWO32r;
-   rtx fp_lo, fp_hi, x;
- 
-   fp_lo = gen_reg_rtx (DFmode);
-   fp_hi = gen_reg_rtx (DFmode);
- 
-   emit_insn (gen_floatsidf2 (fp_hi, gen_highpart (SImode, input)));
- 
-   real_ldexp (&TWO32r, &dconst1, 32);
-   x = const_double_from_real_value (TWO32r, DFmode);
-   fp_hi = expand_simple_binop (DFmode, MULT, fp_hi, x, fp_hi, 0, OPTAB_DIRECT);
- 
-   ix86_expand_convert_uns_sidf_sse (fp_lo, gen_lowpart (SImode, input));
- 
-   x = expand_simple_binop (DFmode, PLUS, fp_hi, fp_lo, target,
- 			   0, OPTAB_DIRECT);
-   if (x != target)
-     emit_move_insn (target, x);
- }
- 
- /* Convert an unsigned SImode value into a SFmode, using only SSE.
-    For x86_32, -mfpmath=sse, !optimize_size only.  */
- void
- ix86_expand_convert_uns_sisf_sse (rtx target, rtx input)
- {
-   REAL_VALUE_TYPE ONE16r;
-   rtx fp_hi, fp_lo, int_hi, int_lo, x;
- 
-   real_ldexp (&ONE16r, &dconst1, 16);
-   x = const_double_from_real_value (ONE16r, SFmode);
-   int_lo = expand_simple_binop (SImode, AND, input, GEN_INT(0xffff),
- 				      NULL, 0, OPTAB_DIRECT);
-   int_hi = expand_simple_binop (SImode, LSHIFTRT, input, GEN_INT(16),
- 				      NULL, 0, OPTAB_DIRECT);
-   fp_hi = gen_reg_rtx (SFmode);
-   fp_lo = gen_reg_rtx (SFmode);
-   emit_insn (gen_floatsisf2 (fp_hi, int_hi));
-   emit_insn (gen_floatsisf2 (fp_lo, int_lo));
-   fp_hi = expand_simple_binop (SFmode, MULT, fp_hi, x, fp_hi,
- 			       0, OPTAB_DIRECT);
-   fp_hi = expand_simple_binop (SFmode, PLUS, fp_hi, fp_lo, target,
- 			       0, OPTAB_DIRECT);
-   if (!rtx_equal_p (target, fp_hi))
-     emit_move_insn (target, fp_hi);
- }
- 
- /* floatunsv{4,8}siv{4,8}sf2 expander.  Expand code to convert
-    a vector of unsigned ints VAL to vector of floats TARGET.  */
- 
- void
- ix86_expand_vector_convert_uns_vsivsf (rtx target, rtx val)
- {
-   rtx tmp[8];
-   REAL_VALUE_TYPE TWO16r;
-   machine_mode intmode = GET_MODE (val);
-   machine_mode fltmode = GET_MODE (target);
-   rtx (*cvt) (rtx, rtx);
- 
-   if (intmode == V4SImode)
-     cvt = gen_floatv4siv4sf2;
-   else
-     cvt = gen_floatv8siv8sf2;
-   tmp[0] = ix86_build_const_vector (intmode, 1, GEN_INT (0xffff));
-   tmp[0] = force_reg (intmode, tmp[0]);
-   tmp[1] = expand_simple_binop (intmode, AND, val, tmp[0], NULL_RTX, 1,
- 				OPTAB_DIRECT);
-   tmp[2] = expand_simple_binop (intmode, LSHIFTRT, val, GEN_INT (16),
- 				NULL_RTX, 1, OPTAB_DIRECT);
-   tmp[3] = gen_reg_rtx (fltmode);
-   emit_insn (cvt (tmp[3], tmp[1]));
-   tmp[4] = gen_reg_rtx (fltmode);
-   emit_insn (cvt (tmp[4], tmp[2]));
-   real_ldexp (&TWO16r, &dconst1, 16);
-   tmp[5] = const_double_from_real_value (TWO16r, SFmode);
-   tmp[5] = force_reg (fltmode, ix86_build_const_vector (fltmode, 1, tmp[5]));
-   tmp[6] = expand_simple_binop (fltmode, MULT, tmp[4], tmp[5], NULL_RTX, 1,
- 				OPTAB_DIRECT);
-   tmp[7] = expand_simple_binop (fltmode, PLUS, tmp[3], tmp[6], target, 1,
- 				OPTAB_DIRECT);
-   if (tmp[7] != target)
-     emit_move_insn (target, tmp[7]);
- }
- 
- /* Adjust a V*SFmode/V*DFmode value VAL so that *sfix_trunc* resp. fix_trunc*
-    pattern can be used on it instead of *ufix_trunc* resp. fixuns_trunc*.
-    This is done by doing just signed conversion if < 0x1p31, and otherwise by
-    subtracting 0x1p31 first and xoring in 0x80000000 from *XORP afterwards.  */
- 
- rtx
- ix86_expand_adjust_ufix_to_sfix_si (rtx val, rtx *xorp)
- {
-   REAL_VALUE_TYPE TWO31r;
-   rtx two31r, tmp[4];
-   machine_mode mode = GET_MODE (val);
-   machine_mode scalarmode = GET_MODE_INNER (mode);
-   machine_mode intmode = GET_MODE_SIZE (mode) == 32 ? V8SImode : V4SImode;
-   rtx (*cmp) (rtx, rtx, rtx, rtx);
-   int i;
- 
-   for (i = 0; i < 3; i++)
-     tmp[i] = gen_reg_rtx (mode);
-   real_ldexp (&TWO31r, &dconst1, 31);
-   two31r = const_double_from_real_value (TWO31r, scalarmode);
-   two31r = ix86_build_const_vector (mode, 1, two31r);
-   two31r = force_reg (mode, two31r);
-   switch (mode)
-     {
-     case E_V8SFmode: cmp = gen_avx_maskcmpv8sf3; break;
-     case E_V4SFmode: cmp = gen_sse_maskcmpv4sf3; break;
-     case E_V4DFmode: cmp = gen_avx_maskcmpv4df3; break;
-     case E_V2DFmode: cmp = gen_sse2_maskcmpv2df3; break;
-     default: gcc_unreachable ();
-     }
-   tmp[3] = gen_rtx_LE (mode, two31r, val);
-   emit_insn (cmp (tmp[0], two31r, val, tmp[3]));
-   tmp[1] = expand_simple_binop (mode, AND, tmp[0], two31r, tmp[1],
- 				0, OPTAB_DIRECT);
-   if (intmode == V4SImode || TARGET_AVX2)
-     *xorp = expand_simple_binop (intmode, ASHIFT,
- 				 gen_lowpart (intmode, tmp[0]),
- 				 GEN_INT (31), NULL_RTX, 0,
- 				 OPTAB_DIRECT);
-   else
-     {
-       rtx two31 = GEN_INT (HOST_WIDE_INT_1U << 31);
-       two31 = ix86_build_const_vector (intmode, 1, two31);
-       *xorp = expand_simple_binop (intmode, AND,
- 				   gen_lowpart (intmode, tmp[0]),
- 				   two31, NULL_RTX, 0,
- 				   OPTAB_DIRECT);
-     }
-   return expand_simple_binop (mode, MINUS, val, tmp[1], tmp[2],
- 			      0, OPTAB_DIRECT);
- }
- 
  /* A subroutine of ix86_build_signbit_mask.  If VECT is true,
     then replicate the value for all elements of the vector
     register.  */
--- 15064,15069 ----
*************** ix86_build_signbit_mask (machine_mode mo
*** 21835,22124 ****
    return force_reg (vec_mode, v);
  }
  
- /* Generate code for floating point ABS or NEG.  */
- 
- void
- ix86_expand_fp_absneg_operator (enum rtx_code code, machine_mode mode,
- 				rtx operands[])
- {
-   rtx mask, set, dst, src;
-   bool use_sse = false;
-   bool vector_mode = VECTOR_MODE_P (mode);
-   machine_mode vmode = mode;
- 
-   if (vector_mode)
-     use_sse = true;
-   else if (mode == TFmode)
-     use_sse = true;
-   else if (TARGET_SSE_MATH)
-     {
-       use_sse = SSE_FLOAT_MODE_P (mode);
-       if (mode == SFmode)
- 	vmode = V4SFmode;
-       else if (mode == DFmode)
- 	vmode = V2DFmode;
-     }
- 
-   /* NEG and ABS performed with SSE use bitwise mask operations.
-      Create the appropriate mask now.  */
-   if (use_sse)
-     mask = ix86_build_signbit_mask (vmode, vector_mode, code == ABS);
-   else
-     mask = NULL_RTX;
- 
-   dst = operands[0];
-   src = operands[1];
- 
-   set = gen_rtx_fmt_e (code, mode, src);
-   set = gen_rtx_SET (dst, set);
- 
-   if (mask)
-     {
-       rtx use, clob;
-       rtvec par;
- 
-       use = gen_rtx_USE (VOIDmode, mask);
-       if (vector_mode)
- 	par = gen_rtvec (2, set, use);
-       else
- 	{
-           clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
- 	  par = gen_rtvec (3, set, use, clob);
-         }
-       emit_insn (gen_rtx_PARALLEL (VOIDmode, par));
-     }
-   else
-     emit_insn (set);
- }
- 
- /* Expand a copysign operation.  Special case operand 0 being a constant.  */
- 
- void
- ix86_expand_copysign (rtx operands[])
- {
-   machine_mode mode, vmode;
-   rtx dest, op0, op1, mask, nmask;
- 
-   dest = operands[0];
-   op0 = operands[1];
-   op1 = operands[2];
- 
-   mode = GET_MODE (dest);
- 
-   if (mode == SFmode)
-     vmode = V4SFmode;
-   else if (mode == DFmode)
-     vmode = V2DFmode;
-   else
-     vmode = mode;
- 
-   if (CONST_DOUBLE_P (op0))
-     {
-       rtx (*copysign_insn)(rtx, rtx, rtx, rtx);
- 
-       if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0)))
- 	op0 = simplify_unary_operation (ABS, mode, op0, mode);
- 
-       if (mode == SFmode || mode == DFmode)
- 	{
- 	  if (op0 == CONST0_RTX (mode))
- 	    op0 = CONST0_RTX (vmode);
- 	  else
- 	    {
- 	      rtx v = ix86_build_const_vector (vmode, false, op0);
- 
- 	      op0 = force_reg (vmode, v);
- 	    }
- 	}
-       else if (op0 != CONST0_RTX (mode))
- 	op0 = force_reg (mode, op0);
- 
-       mask = ix86_build_signbit_mask (vmode, 0, 0);
- 
-       if (mode == SFmode)
- 	copysign_insn = gen_copysignsf3_const;
-       else if (mode == DFmode)
- 	copysign_insn = gen_copysigndf3_const;
-       else
- 	copysign_insn = gen_copysigntf3_const;
- 
-       emit_insn (copysign_insn (dest, op0, op1, mask));
-     }
-   else
-     {
-       rtx (*copysign_insn)(rtx, rtx, rtx, rtx, rtx, rtx);
- 
-       nmask = ix86_build_signbit_mask (vmode, 0, 1);
-       mask = ix86_build_signbit_mask (vmode, 0, 0);
- 
-       if (mode == SFmode)
- 	copysign_insn = gen_copysignsf3_var;
-       else if (mode == DFmode)
- 	copysign_insn = gen_copysigndf3_var;
-       else
- 	copysign_insn = gen_copysigntf3_var;
- 
-       emit_insn (copysign_insn (dest, NULL_RTX, op0, op1, nmask, mask));
-     }
- }
- 
- /* Deconstruct a copysign operation into bit masks.  Operand 0 is known to
-    be a constant, and so has already been expanded into a vector constant.  */
- 
- void
- ix86_split_copysign_const (rtx operands[])
- {
-   machine_mode mode, vmode;
-   rtx dest, op0, mask, x;
- 
-   dest = operands[0];
-   op0 = operands[1];
-   mask = operands[3];
- 
-   mode = GET_MODE (dest);
-   vmode = GET_MODE (mask);
- 
-   dest = lowpart_subreg (vmode, dest, mode);
-   x = gen_rtx_AND (vmode, dest, mask);
-   emit_insn (gen_rtx_SET (dest, x));
- 
-   if (op0 != CONST0_RTX (vmode))
-     {
-       x = gen_rtx_IOR (vmode, dest, op0);
-       emit_insn (gen_rtx_SET (dest, x));
-     }
- }
- 
- /* Deconstruct a copysign operation into bit masks.  Operand 0 is variable,
-    so we have to do two masks.  */
- 
- void
- ix86_split_copysign_var (rtx operands[])
- {
-   machine_mode mode, vmode;
-   rtx dest, scratch, op0, op1, mask, nmask, x;
- 
-   dest = operands[0];
-   scratch = operands[1];
-   op0 = operands[2];
-   op1 = operands[3];
-   nmask = operands[4];
-   mask = operands[5];
- 
-   mode = GET_MODE (dest);
-   vmode = GET_MODE (mask);
- 
-   if (rtx_equal_p (op0, op1))
-     {
-       /* Shouldn't happen often (it's useless, obviously), but when it does
- 	 we'd generate incorrect code if we continue below.  */
-       emit_move_insn (dest, op0);
-       return;
-     }
- 
-   if (REG_P (mask) && REGNO (dest) == REGNO (mask))	/* alternative 0 */
-     {
-       gcc_assert (REGNO (op1) == REGNO (scratch));
- 
-       x = gen_rtx_AND (vmode, scratch, mask);
-       emit_insn (gen_rtx_SET (scratch, x));
- 
-       dest = mask;
-       op0 = lowpart_subreg (vmode, op0, mode);
-       x = gen_rtx_NOT (vmode, dest);
-       x = gen_rtx_AND (vmode, x, op0);
-       emit_insn (gen_rtx_SET (dest, x));
-     }
-   else
-     {
-       if (REGNO (op1) == REGNO (scratch))		/* alternative 1,3 */
- 	{
- 	  x = gen_rtx_AND (vmode, scratch, mask);
- 	}
-       else						/* alternative 2,4 */
- 	{
-           gcc_assert (REGNO (mask) == REGNO (scratch));
-           op1 = lowpart_subreg (vmode, op1, mode);
- 	  x = gen_rtx_AND (vmode, scratch, op1);
- 	}
-       emit_insn (gen_rtx_SET (scratch, x));
- 
-       if (REGNO (op0) == REGNO (dest))			/* alternative 1,2 */
- 	{
- 	  dest = lowpart_subreg (vmode, op0, mode);
- 	  x = gen_rtx_AND (vmode, dest, nmask);
- 	}
-       else						/* alternative 3,4 */
- 	{
-           gcc_assert (REGNO (nmask) == REGNO (dest));
- 	  dest = nmask;
- 	  op0 = lowpart_subreg (vmode, op0, mode);
- 	  x = gen_rtx_AND (vmode, dest, op0);
- 	}
-       emit_insn (gen_rtx_SET (dest, x));
-     }
- 
-   x = gen_rtx_IOR (vmode, dest, scratch);
-   emit_insn (gen_rtx_SET (dest, x));
- }
- 
- /* Expand an xorsign operation.  */
- 
- void
- ix86_expand_xorsign (rtx operands[])
- {
-   rtx (*xorsign_insn)(rtx, rtx, rtx, rtx);
-   machine_mode mode, vmode;
-   rtx dest, op0, op1, mask;
- 
-   dest = operands[0];
-   op0 = operands[1];
-   op1 = operands[2];
- 
-   mode = GET_MODE (dest);
- 
-   if (mode == SFmode)
-     {
-       xorsign_insn = gen_xorsignsf3_1;
-       vmode = V4SFmode;
-     }
-   else if (mode == DFmode)
-     {
-       xorsign_insn = gen_xorsigndf3_1;
-       vmode = V2DFmode;
-     }
-   else
-     gcc_unreachable ();
- 
-   mask = ix86_build_signbit_mask (vmode, 0, 0);
- 
-   emit_insn (xorsign_insn (dest, op0, op1, mask));
- }
- 
- /* Deconstruct an xorsign operation into bit masks.  */
- 
- void
- ix86_split_xorsign (rtx operands[])
- {
-   machine_mode mode, vmode;
-   rtx dest, op0, mask, x;
- 
-   dest = operands[0];
-   op0 = operands[1];
-   mask = operands[3];
- 
-   mode = GET_MODE (dest);
-   vmode = GET_MODE (mask);
- 
-   dest = lowpart_subreg (vmode, dest, mode);
-   x = gen_rtx_AND (vmode, dest, mask);
-   emit_insn (gen_rtx_SET (dest, x));
- 
-   op0 = lowpart_subreg (vmode, op0, mode);
-   x = gen_rtx_XOR (vmode, dest, op0);
-   emit_insn (gen_rtx_SET (dest, x));
- }
- 
  /* Return TRUE or FALSE depending on whether the first SET in INSN
     has source and destination with matching CC modes, and that the
     CC mode is at least as constrained as REQ_MODE.  */
--- 15175,15180 ----
*************** ix86_match_ccmode (rtx insn, machine_mod
*** 22177,22237 ****
    return GET_MODE (SET_SRC (set)) == set_mode;
  }
  
- /* Generate insn patterns to do an integer compare of OPERANDS.  */
- 
- static rtx
- ix86_expand_int_compare (enum rtx_code code, rtx op0, rtx op1)
- {
-   machine_mode cmpmode;
-   rtx tmp, flags;
- 
-   cmpmode = SELECT_CC_MODE (code, op0, op1);
-   flags = gen_rtx_REG (cmpmode, FLAGS_REG);
- 
-   /* This is very simple, but making the interface the same as in the
-      FP case makes the rest of the code easier.  */
-   tmp = gen_rtx_COMPARE (cmpmode, op0, op1);
-   emit_insn (gen_rtx_SET (flags, tmp));
- 
-   /* Return the test that should be put into the flags user, i.e.
-      the bcc, scc, or cmov instruction.  */
-   return gen_rtx_fmt_ee (code, VOIDmode, flags, const0_rtx);
- }
- 
- /* Figure out whether to use unordered fp comparisons.  */
- 
- static bool
- ix86_unordered_fp_compare (enum rtx_code code)
- {
-   if (!TARGET_IEEE_FP)
-     return false;
- 
-   switch (code)
-     {
-     case GT:
-     case GE:
-     case LT:
-     case LE:
-       return false;
- 
-     case EQ:
-     case NE:
- 
-     case LTGT:
-     case UNORDERED:
-     case ORDERED:
-     case UNLT:
-     case UNLE:
-     case UNGT:
-     case UNGE:
-     case UNEQ:
-       return true;
- 
-     default:
-       gcc_unreachable ();
-     }
- }
- 
  machine_mode
  ix86_cc_mode (enum rtx_code code, rtx op0, rtx op1)
  {
--- 15233,15238 ----
*************** ix86_cc_modes_compatible (machine_mode m
*** 22368,22445 ****
      }
  }
  
- 
- /* Return a comparison we can do and that it is equivalent to
-    swap_condition (code) apart possibly from orderedness.
-    But, never change orderedness if TARGET_IEEE_FP, returning
-    UNKNOWN in that case if necessary.  */
- 
- static enum rtx_code
- ix86_fp_swap_condition (enum rtx_code code)
- {
-   switch (code)
-     {
-     case GT:                   /* GTU - CF=0 & ZF=0 */
-       return TARGET_IEEE_FP ? UNKNOWN : UNLT;
-     case GE:                   /* GEU - CF=0 */
-       return TARGET_IEEE_FP ? UNKNOWN : UNLE;
-     case UNLT:                 /* LTU - CF=1 */
-       return TARGET_IEEE_FP ? UNKNOWN : GT;
-     case UNLE:                 /* LEU - CF=1 | ZF=1 */
-       return TARGET_IEEE_FP ? UNKNOWN : GE;
-     default:
-       return swap_condition (code);
-     }
- }
- 
- /* Return cost of comparison CODE using the best strategy for performance.
-    All following functions do use number of instructions as a cost metrics.
-    In future this should be tweaked to compute bytes for optimize_size and
-    take into account performance of various instructions on various CPUs.  */
- 
- static int
- ix86_fp_comparison_cost (enum rtx_code code)
- {
-   int arith_cost;
- 
-   /* The cost of code using bit-twiddling on %ah.  */
-   switch (code)
-     {
-     case UNLE:
-     case UNLT:
-     case LTGT:
-     case GT:
-     case GE:
-     case UNORDERED:
-     case ORDERED:
-     case UNEQ:
-       arith_cost = 4;
-       break;
-     case LT:
-     case NE:
-     case EQ:
-     case UNGE:
-       arith_cost = TARGET_IEEE_FP ? 5 : 4;
-       break;
-     case LE:
-     case UNGT:
-       arith_cost = TARGET_IEEE_FP ? 6 : 4;
-       break;
-     default:
-       gcc_unreachable ();
-     }
- 
-   switch (ix86_fp_comparison_strategy (code))
-     {
-     case IX86_FPCMP_COMI:
-       return arith_cost > 4 ? 3 : 2;
-     case IX86_FPCMP_SAHF:
-       return arith_cost > 4 ? 4 : 3;
-     default:
-       return arith_cost;
-     }
- }
- 
  /* Return strategy to use for floating-point.  We assume that fcomi is always
     preferrable where available, since that is also true when looking at size
     (2 bytes, vs. 3 for fnstsw+sahf and at least 5 for fnstsw+test).  */
--- 15369,15374 ----
*************** ix86_fp_comparison_strategy (enum rtx_co
*** 22458,22545 ****
    return IX86_FPCMP_ARITH;
  }
  
- /* Swap, force into registers, or otherwise massage the two operands
-    to a fp comparison.  The operands are updated in place; the new
-    comparison code is returned.  */
- 
- static enum rtx_code
- ix86_prepare_fp_compare_args (enum rtx_code code, rtx *pop0, rtx *pop1)
- {
-   bool unordered_compare = ix86_unordered_fp_compare (code);
-   rtx op0 = *pop0, op1 = *pop1;
-   machine_mode op_mode = GET_MODE (op0);
-   bool is_sse = TARGET_SSE_MATH && SSE_FLOAT_MODE_P (op_mode);
- 
-   /* All of the unordered compare instructions only work on registers.
-      The same is true of the fcomi compare instructions.  The XFmode
-      compare instructions require registers except when comparing
-      against zero or when converting operand 1 from fixed point to
-      floating point.  */
- 
-   if (!is_sse
-       && (unordered_compare
- 	  || (op_mode == XFmode
- 	      && ! (standard_80387_constant_p (op0) == 1
- 		    || standard_80387_constant_p (op1) == 1)
- 	      && GET_CODE (op1) != FLOAT)
- 	  || ix86_fp_comparison_strategy (code) == IX86_FPCMP_COMI))
-     {
-       op0 = force_reg (op_mode, op0);
-       op1 = force_reg (op_mode, op1);
-     }
-   else
-     {
-       /* %%% We only allow op1 in memory; op0 must be st(0).  So swap
- 	 things around if they appear profitable, otherwise force op0
- 	 into a register.  */
- 
-       if (standard_80387_constant_p (op0) == 0
- 	  || (MEM_P (op0)
- 	      && ! (standard_80387_constant_p (op1) == 0
- 		    || MEM_P (op1))))
- 	{
- 	  enum rtx_code new_code = ix86_fp_swap_condition (code);
- 	  if (new_code != UNKNOWN)
- 	    {
- 	      std::swap (op0, op1);
- 	      code = new_code;
- 	    }
- 	}
- 
-       if (!REG_P (op0))
- 	op0 = force_reg (op_mode, op0);
- 
-       if (CONSTANT_P (op1))
- 	{
- 	  int tmp = standard_80387_constant_p (op1);
- 	  if (tmp == 0)
- 	    op1 = validize_mem (force_const_mem (op_mode, op1));
- 	  else if (tmp == 1)
- 	    {
- 	      if (TARGET_CMOVE)
- 		op1 = force_reg (op_mode, op1);
- 	    }
- 	  else
- 	    op1 = force_reg (op_mode, op1);
- 	}
-     }
- 
-   /* Try to rearrange the comparison to make it cheaper.  */
-   if (ix86_fp_comparison_cost (code)
-       > ix86_fp_comparison_cost (swap_condition (code))
-       && (REG_P (op1) || can_create_pseudo_p ()))
-     {
-       std::swap (op0, op1);
-       code = swap_condition (code);
-       if (!REG_P (op0))
- 	op0 = force_reg (op_mode, op0);
-     }
- 
-   *pop0 = op0;
-   *pop1 = op1;
-   return code;
- }
- 
  /* Convert comparison codes we use to represent FP comparison to integer
     code that will result in proper branch.  Return UNKNOWN if no such code
     is available.  */
--- 15387,15392 ----
*************** ix86_fp_compare_code_to_integer (enum rt
*** 22569,26223 ****
      }
  }
  
- /* Generate insn patterns to do a floating point compare of OPERANDS.  */
- 
- static rtx
- ix86_expand_fp_compare (enum rtx_code code, rtx op0, rtx op1)
- {
-   bool unordered_compare = ix86_unordered_fp_compare (code);
-   machine_mode cmp_mode;
-   rtx tmp, scratch;
- 
-   code = ix86_prepare_fp_compare_args (code, &op0, &op1);
- 
-   tmp = gen_rtx_COMPARE (CCFPmode, op0, op1);
-   if (unordered_compare)
-     tmp = gen_rtx_UNSPEC (CCFPmode, gen_rtvec (1, tmp), UNSPEC_NOTRAP);
- 
-   /* Do fcomi/sahf based test when profitable.  */
-   switch (ix86_fp_comparison_strategy (code))
-     {
-     case IX86_FPCMP_COMI:
-       cmp_mode = CCFPmode;
-       emit_insn (gen_rtx_SET (gen_rtx_REG (CCFPmode, FLAGS_REG), tmp));
-       break;
- 
-     case IX86_FPCMP_SAHF:
-       cmp_mode = CCFPmode;
-       tmp = gen_rtx_UNSPEC (HImode, gen_rtvec (1, tmp), UNSPEC_FNSTSW);
-       scratch = gen_reg_rtx (HImode);
-       emit_insn (gen_rtx_SET (scratch, tmp));
-       emit_insn (gen_x86_sahf_1 (scratch));
-       break;
- 
-     case IX86_FPCMP_ARITH:
-       cmp_mode = CCNOmode;
-       tmp = gen_rtx_UNSPEC (HImode, gen_rtvec (1, tmp), UNSPEC_FNSTSW);
-       scratch = gen_reg_rtx (HImode);
-       emit_insn (gen_rtx_SET (scratch, tmp));
- 
-       /* In the unordered case, we have to check C2 for NaN's, which
- 	 doesn't happen to work out to anything nice combination-wise.
- 	 So do some bit twiddling on the value we've got in AH to come
- 	 up with an appropriate set of condition codes.  */
- 
-       switch (code)
- 	{
- 	case GT:
- 	case UNGT:
- 	  if (code == GT || !TARGET_IEEE_FP)
- 	    {
- 	      emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x45)));
- 	      code = EQ;
- 	    }
- 	  else
- 	    {
- 	      emit_insn (gen_andqi_ext_1 (scratch, scratch, GEN_INT (0x45)));
- 	      emit_insn (gen_addqi_ext_1 (scratch, scratch, constm1_rtx));
- 	      emit_insn (gen_cmpqi_ext_3 (scratch, GEN_INT (0x44)));
- 	      cmp_mode = CCmode;
- 	      code = GEU;
- 	    }
- 	  break;
- 	case LT:
- 	case UNLT:
- 	  if (code == LT && TARGET_IEEE_FP)
- 	    {
- 	      emit_insn (gen_andqi_ext_1 (scratch, scratch, GEN_INT (0x45)));
- 	      emit_insn (gen_cmpqi_ext_3 (scratch, const1_rtx));
- 	      cmp_mode = CCmode;
- 	      code = EQ;
- 	    }
- 	  else
- 	    {
- 	      emit_insn (gen_testqi_ext_1_ccno (scratch, const1_rtx));
- 	      code = NE;
- 	    }
- 	  break;
- 	case GE:
- 	case UNGE:
- 	  if (code == GE || !TARGET_IEEE_FP)
- 	    {
- 	      emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x05)));
- 	      code = EQ;
- 	    }
- 	  else
- 	    {
- 	      emit_insn (gen_andqi_ext_1 (scratch, scratch, GEN_INT (0x45)));
- 	      emit_insn (gen_xorqi_ext_1_cc (scratch, scratch, const1_rtx));
- 	      code = NE;
- 	    }
- 	  break;
- 	case LE:
- 	case UNLE:
- 	  if (code == LE && TARGET_IEEE_FP)
- 	    {
- 	      emit_insn (gen_andqi_ext_1 (scratch, scratch, GEN_INT (0x45)));
- 	      emit_insn (gen_addqi_ext_1 (scratch, scratch, constm1_rtx));
- 	      emit_insn (gen_cmpqi_ext_3 (scratch, GEN_INT (0x40)));
- 	      cmp_mode = CCmode;
- 	      code = LTU;
- 	    }
- 	  else
- 	    {
- 	      emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x45)));
- 	      code = NE;
- 	    }
- 	  break;
- 	case EQ:
- 	case UNEQ:
- 	  if (code == EQ && TARGET_IEEE_FP)
- 	    {
- 	      emit_insn (gen_andqi_ext_1 (scratch, scratch, GEN_INT (0x45)));
- 	      emit_insn (gen_cmpqi_ext_3 (scratch, GEN_INT (0x40)));
- 	      cmp_mode = CCmode;
- 	      code = EQ;
- 	    }
- 	  else
- 	    {
- 	      emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x40)));
- 	      code = NE;
- 	    }
- 	  break;
- 	case NE:
- 	case LTGT:
- 	  if (code == NE && TARGET_IEEE_FP)
- 	    {
- 	      emit_insn (gen_andqi_ext_1 (scratch, scratch, GEN_INT (0x45)));
- 	      emit_insn (gen_xorqi_ext_1_cc (scratch, scratch,
- 					     GEN_INT (0x40)));
- 	      code = NE;
- 	    }
- 	  else
- 	    {
- 	      emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x40)));
- 	      code = EQ;
- 	    }
- 	  break;
- 
- 	case UNORDERED:
- 	  emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x04)));
- 	  code = NE;
- 	  break;
- 	case ORDERED:
- 	  emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x04)));
- 	  code = EQ;
- 	  break;
- 
- 	default:
- 	  gcc_unreachable ();
- 	}
- 	break;
- 
-     default:
-       gcc_unreachable();
-     }
- 
-   /* Return the test that should be put into the flags user, i.e.
-      the bcc, scc, or cmov instruction.  */
-   return gen_rtx_fmt_ee (code, VOIDmode,
- 			 gen_rtx_REG (cmp_mode, FLAGS_REG),
- 			 const0_rtx);
- }
- 
- static rtx
- ix86_expand_compare (enum rtx_code code, rtx op0, rtx op1)
- {
-   rtx ret;
- 
-   if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
-     ret = gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
- 
-   else if (SCALAR_FLOAT_MODE_P (GET_MODE (op0)))
-     {
-       gcc_assert (!DECIMAL_FLOAT_MODE_P (GET_MODE (op0)));
-       ret = ix86_expand_fp_compare (code, op0, op1);
-     }
-   else
-     ret = ix86_expand_int_compare (code, op0, op1);
- 
-   return ret;
- }
- 
- void
- ix86_expand_branch (enum rtx_code code, rtx op0, rtx op1, rtx label)
- {
-   machine_mode mode = GET_MODE (op0);
-   rtx tmp;
- 
-   /* Handle special case - vector comparsion with boolean result, transform
-      it using ptest instruction.  */
-   if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
-     {
-       rtx flag = gen_rtx_REG (CCZmode, FLAGS_REG);
-       machine_mode p_mode = GET_MODE_SIZE (mode) == 32 ? V4DImode : V2DImode;
- 
-       gcc_assert (code == EQ || code == NE);
-       /* Generate XOR since we can't check that one operand is zero vector.  */
-       tmp = gen_reg_rtx (mode);
-       emit_insn (gen_rtx_SET (tmp, gen_rtx_XOR (mode, op0, op1)));
-       tmp = gen_lowpart (p_mode, tmp);
-       emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode, FLAGS_REG),
- 			      gen_rtx_UNSPEC (CCmode,
- 					      gen_rtvec (2, tmp, tmp),
- 					      UNSPEC_PTEST)));
-       tmp = gen_rtx_fmt_ee (code, VOIDmode, flag, const0_rtx);
-       tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp,
- 				  gen_rtx_LABEL_REF (VOIDmode, label),
- 				  pc_rtx);
-       emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
-       return;
-     }
- 
-   switch (mode)
-     {
-     case E_SFmode:
-     case E_DFmode:
-     case E_XFmode:
-     case E_QImode:
-     case E_HImode:
-     case E_SImode:
-       simple:
-       tmp = ix86_expand_compare (code, op0, op1);
-       tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp,
- 				  gen_rtx_LABEL_REF (VOIDmode, label),
- 				  pc_rtx);
-       emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
-       return;
- 
-     case E_DImode:
-       if (TARGET_64BIT)
- 	goto simple;
-       /* For 32-bit target DI comparison may be performed on
- 	 SSE registers.  To allow this we should avoid split
- 	 to SI mode which is achieved by doing xor in DI mode
- 	 and then comparing with zero (which is recognized by
- 	 STV pass).  We don't compare using xor when optimizing
- 	 for size.  */
-       if (!optimize_insn_for_size_p ()
- 	  && TARGET_STV
- 	  && (code == EQ || code == NE))
- 	{
- 	  op0 = force_reg (mode, gen_rtx_XOR (mode, op0, op1));
- 	  op1 = const0_rtx;
- 	}
-       /* FALLTHRU */
-     case E_TImode:
-       /* Expand DImode branch into multiple compare+branch.  */
-       {
- 	rtx lo[2], hi[2];
- 	rtx_code_label *label2;
- 	enum rtx_code code1, code2, code3;
- 	machine_mode submode;
- 
- 	if (CONSTANT_P (op0) && !CONSTANT_P (op1))
- 	  {
- 	    std::swap (op0, op1);
- 	    code = swap_condition (code);
- 	  }
- 
- 	split_double_mode (mode, &op0, 1, lo+0, hi+0);
- 	split_double_mode (mode, &op1, 1, lo+1, hi+1);
- 
- 	submode = mode == DImode ? SImode : DImode;
- 
- 	/* When comparing for equality, we can use (hi0^hi1)|(lo0^lo1) to
- 	   avoid two branches.  This costs one extra insn, so disable when
- 	   optimizing for size.  */
- 
- 	if ((code == EQ || code == NE)
- 	    && (!optimize_insn_for_size_p ()
- 	        || hi[1] == const0_rtx || lo[1] == const0_rtx))
- 	  {
- 	    rtx xor0, xor1;
- 
- 	    xor1 = hi[0];
- 	    if (hi[1] != const0_rtx)
- 	      xor1 = expand_binop (submode, xor_optab, xor1, hi[1],
- 				   NULL_RTX, 0, OPTAB_WIDEN);
- 
- 	    xor0 = lo[0];
- 	    if (lo[1] != const0_rtx)
- 	      xor0 = expand_binop (submode, xor_optab, xor0, lo[1],
- 				   NULL_RTX, 0, OPTAB_WIDEN);
- 
- 	    tmp = expand_binop (submode, ior_optab, xor1, xor0,
- 				NULL_RTX, 0, OPTAB_WIDEN);
- 
- 	    ix86_expand_branch (code, tmp, const0_rtx, label);
- 	    return;
- 	  }
- 
- 	/* Otherwise, if we are doing less-than or greater-or-equal-than,
- 	   op1 is a constant and the low word is zero, then we can just
- 	   examine the high word.  Similarly for low word -1 and
- 	   less-or-equal-than or greater-than.  */
- 
- 	if (CONST_INT_P (hi[1]))
- 	  switch (code)
- 	    {
- 	    case LT: case LTU: case GE: case GEU:
- 	      if (lo[1] == const0_rtx)
- 		{
- 		  ix86_expand_branch (code, hi[0], hi[1], label);
- 		  return;
- 		}
- 	      break;
- 	    case LE: case LEU: case GT: case GTU:
- 	      if (lo[1] == constm1_rtx)
- 		{
- 		  ix86_expand_branch (code, hi[0], hi[1], label);
- 		  return;
- 		}
- 	      break;
- 	    default:
- 	      break;
- 	    }
- 
- 	/* Emulate comparisons that do not depend on Zero flag with
- 	   double-word subtraction.  Note that only Overflow, Sign
- 	   and Carry flags are valid, so swap arguments and condition
- 	   of comparisons that would otherwise test Zero flag.  */
- 
- 	switch (code)
- 	  {
- 	  case LE: case LEU: case GT: case GTU:
- 	    std::swap (lo[0], lo[1]);
- 	    std::swap (hi[0], hi[1]);
- 	    code = swap_condition (code);
- 	    /* FALLTHRU */
- 
- 	  case LT: case LTU: case GE: case GEU:
- 	    {
- 	      rtx (*cmp_insn) (rtx, rtx);
- 	      rtx (*sbb_insn) (rtx, rtx, rtx);
- 	      bool uns = (code == LTU || code == GEU);
- 
- 	      if (TARGET_64BIT)
- 		{
- 		  cmp_insn = gen_cmpdi_1;
- 		  sbb_insn
- 		    = uns ? gen_subdi3_carry_ccc : gen_subdi3_carry_ccgz;
- 		}
- 	      else
- 		{
- 		  cmp_insn = gen_cmpsi_1;
- 		  sbb_insn
- 		    = uns ? gen_subsi3_carry_ccc : gen_subsi3_carry_ccgz;
- 		}
- 
- 	      if (!nonimmediate_operand (lo[0], submode))
- 		lo[0] = force_reg (submode, lo[0]);
- 	      if (!x86_64_general_operand (lo[1], submode))
- 		lo[1] = force_reg (submode, lo[1]);
- 
- 	      if (!register_operand (hi[0], submode))
- 		hi[0] = force_reg (submode, hi[0]);
- 	      if ((uns && !nonimmediate_operand (hi[1], submode))
- 		  || (!uns && !x86_64_general_operand (hi[1], submode)))
- 		hi[1] = force_reg (submode, hi[1]);
- 
- 	      emit_insn (cmp_insn (lo[0], lo[1]));
- 	      emit_insn (sbb_insn (gen_rtx_SCRATCH (submode), hi[0], hi[1]));
- 
- 	      tmp = gen_rtx_REG (uns ? CCCmode : CCGZmode, FLAGS_REG);
- 
- 	      ix86_expand_branch (code, tmp, const0_rtx, label);
- 	      return;
- 	    }
- 
- 	  default:
- 	    break;
- 	  }
- 
- 	/* Otherwise, we need two or three jumps.  */
- 
- 	label2 = gen_label_rtx ();
- 
- 	code1 = code;
- 	code2 = swap_condition (code);
- 	code3 = unsigned_condition (code);
- 
- 	switch (code)
- 	  {
- 	  case LT: case GT: case LTU: case GTU:
- 	    break;
- 
- 	  case LE:   code1 = LT;  code2 = GT;  break;
- 	  case GE:   code1 = GT;  code2 = LT;  break;
- 	  case LEU:  code1 = LTU; code2 = GTU; break;
- 	  case GEU:  code1 = GTU; code2 = LTU; break;
- 
- 	  case EQ:   code1 = UNKNOWN; code2 = NE;  break;
- 	  case NE:   code2 = UNKNOWN; break;
- 
- 	  default:
- 	    gcc_unreachable ();
- 	  }
- 
- 	/*
- 	 * a < b =>
- 	 *    if (hi(a) < hi(b)) goto true;
- 	 *    if (hi(a) > hi(b)) goto false;
- 	 *    if (lo(a) < lo(b)) goto true;
- 	 *  false:
- 	 */
- 
- 	if (code1 != UNKNOWN)
- 	  ix86_expand_branch (code1, hi[0], hi[1], label);
- 	if (code2 != UNKNOWN)
- 	  ix86_expand_branch (code2, hi[0], hi[1], label2);
- 
- 	ix86_expand_branch (code3, lo[0], lo[1], label);
- 
- 	if (code2 != UNKNOWN)
- 	  emit_label (label2);
- 	return;
-       }
- 
-     default:
-       gcc_assert (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC);
-       goto simple;
-     }
- }
- 
- void
- ix86_expand_setcc (rtx dest, enum rtx_code code, rtx op0, rtx op1)
- {
-   rtx ret;
- 
-   gcc_assert (GET_MODE (dest) == QImode);
- 
-   ret = ix86_expand_compare (code, op0, op1);
-   PUT_MODE (ret, QImode);
-   emit_insn (gen_rtx_SET (dest, ret));
- }
- 
- /* Expand comparison setting or clearing carry flag.  Return true when
-    successful and set pop for the operation.  */
- static bool
- ix86_expand_carry_flag_compare (enum rtx_code code, rtx op0, rtx op1, rtx *pop)
- {
-   machine_mode mode
-     = GET_MODE (op0) != VOIDmode ? GET_MODE (op0) : GET_MODE (op1);
- 
-   /* Do not handle double-mode compares that go through special path.  */
-   if (mode == (TARGET_64BIT ? TImode : DImode))
-     return false;
- 
-   if (SCALAR_FLOAT_MODE_P (mode))
-     {
-       rtx compare_op;
-       rtx_insn *compare_seq;
- 
-       gcc_assert (!DECIMAL_FLOAT_MODE_P (mode));
- 
-       /* Shortcut:  following common codes never translate
- 	 into carry flag compares.  */
-       if (code == EQ || code == NE || code == UNEQ || code == LTGT
- 	  || code == ORDERED || code == UNORDERED)
- 	return false;
- 
-       /* These comparisons require zero flag; swap operands so they won't.  */
-       if ((code == GT || code == UNLE || code == LE || code == UNGT)
- 	  && !TARGET_IEEE_FP)
- 	{
- 	  std::swap (op0, op1);
- 	  code = swap_condition (code);
- 	}
- 
-       /* Try to expand the comparison and verify that we end up with
- 	 carry flag based comparison.  This fails to be true only when
- 	 we decide to expand comparison using arithmetic that is not
- 	 too common scenario.  */
-       start_sequence ();
-       compare_op = ix86_expand_fp_compare (code, op0, op1);
-       compare_seq = get_insns ();
-       end_sequence ();
- 
-       if (GET_MODE (XEXP (compare_op, 0)) == CCFPmode)
-         code = ix86_fp_compare_code_to_integer (GET_CODE (compare_op));
-       else
- 	code = GET_CODE (compare_op);
- 
-       if (code != LTU && code != GEU)
- 	return false;
- 
-       emit_insn (compare_seq);
-       *pop = compare_op;
-       return true;
-     }
- 
-   if (!INTEGRAL_MODE_P (mode))
-     return false;
- 
-   switch (code)
-     {
-     case LTU:
-     case GEU:
-       break;
- 
-     /* Convert a==0 into (unsigned)a<1.  */
-     case EQ:
-     case NE:
-       if (op1 != const0_rtx)
- 	return false;
-       op1 = const1_rtx;
-       code = (code == EQ ? LTU : GEU);
-       break;
- 
-     /* Convert a>b into b<a or a>=b-1.  */
-     case GTU:
-     case LEU:
-       if (CONST_INT_P (op1))
- 	{
- 	  op1 = gen_int_mode (INTVAL (op1) + 1, GET_MODE (op0));
- 	  /* Bail out on overflow.  We still can swap operands but that
- 	     would force loading of the constant into register.  */
- 	  if (op1 == const0_rtx
- 	      || !x86_64_immediate_operand (op1, GET_MODE (op1)))
- 	    return false;
- 	  code = (code == GTU ? GEU : LTU);
- 	}
-       else
- 	{
- 	  std::swap (op0, op1);
- 	  code = (code == GTU ? LTU : GEU);
- 	}
-       break;
- 
-     /* Convert a>=0 into (unsigned)a<0x80000000.  */
-     case LT:
-     case GE:
-       if (mode == DImode || op1 != const0_rtx)
- 	return false;
-       op1 = gen_int_mode (1 << (GET_MODE_BITSIZE (mode) - 1), mode);
-       code = (code == LT ? GEU : LTU);
-       break;
-     case LE:
-     case GT:
-       if (mode == DImode || op1 != constm1_rtx)
- 	return false;
-       op1 = gen_int_mode (1 << (GET_MODE_BITSIZE (mode) - 1), mode);
-       code = (code == LE ? GEU : LTU);
-       break;
- 
-     default:
-       return false;
-     }
-   /* Swapping operands may cause constant to appear as first operand.  */
-   if (!nonimmediate_operand (op0, VOIDmode))
-     {
-       if (!can_create_pseudo_p ())
- 	return false;
-       op0 = force_reg (mode, op0);
-     }
-   *pop = ix86_expand_compare (code, op0, op1);
-   gcc_assert (GET_CODE (*pop) == LTU || GET_CODE (*pop) == GEU);
-   return true;
- }
- 
- bool
- ix86_expand_int_movcc (rtx operands[])
- {
-   enum rtx_code code = GET_CODE (operands[1]), compare_code;
-   rtx_insn *compare_seq;
-   rtx compare_op;
-   machine_mode mode = GET_MODE (operands[0]);
-   bool sign_bit_compare_p = false;
-   rtx op0 = XEXP (operands[1], 0);
-   rtx op1 = XEXP (operands[1], 1);
- 
-   if (GET_MODE (op0) == TImode
-       || (GET_MODE (op0) == DImode
- 	  && !TARGET_64BIT))
-     return false;
- 
-   start_sequence ();
-   compare_op = ix86_expand_compare (code, op0, op1);
-   compare_seq = get_insns ();
-   end_sequence ();
- 
-   compare_code = GET_CODE (compare_op);
- 
-   if ((op1 == const0_rtx && (code == GE || code == LT))
-       || (op1 == constm1_rtx && (code == GT || code == LE)))
-     sign_bit_compare_p = true;
- 
-   /* Don't attempt mode expansion here -- if we had to expand 5 or 6
-      HImode insns, we'd be swallowed in word prefix ops.  */
- 
-   if ((mode != HImode || TARGET_FAST_PREFIX)
-       && (mode != (TARGET_64BIT ? TImode : DImode))
-       && CONST_INT_P (operands[2])
-       && CONST_INT_P (operands[3]))
-     {
-       rtx out = operands[0];
-       HOST_WIDE_INT ct = INTVAL (operands[2]);
-       HOST_WIDE_INT cf = INTVAL (operands[3]);
-       HOST_WIDE_INT diff;
- 
-       diff = ct - cf;
-       /*  Sign bit compares are better done using shifts than we do by using
- 	  sbb.  */
-       if (sign_bit_compare_p
- 	  || ix86_expand_carry_flag_compare (code, op0, op1, &compare_op))
- 	{
- 	  /* Detect overlap between destination and compare sources.  */
- 	  rtx tmp = out;
- 
-           if (!sign_bit_compare_p)
- 	    {
- 	      rtx flags;
- 	      bool fpcmp = false;
- 
- 	      compare_code = GET_CODE (compare_op);
- 
- 	      flags = XEXP (compare_op, 0);
- 
- 	      if (GET_MODE (flags) == CCFPmode)
- 		{
- 		  fpcmp = true;
- 		  compare_code
- 		    = ix86_fp_compare_code_to_integer (compare_code);
- 		}
- 
- 	      /* To simplify rest of code, restrict to the GEU case.  */
- 	      if (compare_code == LTU)
- 		{
- 		  std::swap (ct, cf);
- 		  compare_code = reverse_condition (compare_code);
- 		  code = reverse_condition (code);
- 		}
- 	      else
- 		{
- 		  if (fpcmp)
- 		    PUT_CODE (compare_op,
- 			      reverse_condition_maybe_unordered
- 			        (GET_CODE (compare_op)));
- 		  else
- 		    PUT_CODE (compare_op,
- 			      reverse_condition (GET_CODE (compare_op)));
- 		}
- 	      diff = ct - cf;
- 
- 	      if (reg_overlap_mentioned_p (out, op0)
- 		  || reg_overlap_mentioned_p (out, op1))
- 		tmp = gen_reg_rtx (mode);
- 
- 	      if (mode == DImode)
- 		emit_insn (gen_x86_movdicc_0_m1 (tmp, flags, compare_op));
- 	      else
- 		emit_insn (gen_x86_movsicc_0_m1	(gen_lowpart (SImode, tmp),
- 						 flags, compare_op));
- 	    }
- 	  else
- 	    {
- 	      if (code == GT || code == GE)
- 		code = reverse_condition (code);
- 	      else
- 		{
- 		  std::swap (ct, cf);
- 		  diff = ct - cf;
- 		}
- 	      tmp = emit_store_flag (tmp, code, op0, op1, VOIDmode, 0, -1);
- 	    }
- 
- 	  if (diff == 1)
- 	    {
- 	      /*
- 	       * cmpl op0,op1
- 	       * sbbl dest,dest
- 	       * [addl dest, ct]
- 	       *
- 	       * Size 5 - 8.
- 	       */
- 	      if (ct)
- 		tmp = expand_simple_binop (mode, PLUS,
- 					   tmp, GEN_INT (ct),
- 					   copy_rtx (tmp), 1, OPTAB_DIRECT);
- 	    }
- 	  else if (cf == -1)
- 	    {
- 	      /*
- 	       * cmpl op0,op1
- 	       * sbbl dest,dest
- 	       * orl $ct, dest
- 	       *
- 	       * Size 8.
- 	       */
- 	      tmp = expand_simple_binop (mode, IOR,
- 					 tmp, GEN_INT (ct),
- 					 copy_rtx (tmp), 1, OPTAB_DIRECT);
- 	    }
- 	  else if (diff == -1 && ct)
- 	    {
- 	      /*
- 	       * cmpl op0,op1
- 	       * sbbl dest,dest
- 	       * notl dest
- 	       * [addl dest, cf]
- 	       *
- 	       * Size 8 - 11.
- 	       */
- 	      tmp = expand_simple_unop (mode, NOT, tmp, copy_rtx (tmp), 1);
- 	      if (cf)
- 		tmp = expand_simple_binop (mode, PLUS,
- 					   copy_rtx (tmp), GEN_INT (cf),
- 					   copy_rtx (tmp), 1, OPTAB_DIRECT);
- 	    }
- 	  else
- 	    {
- 	      /*
- 	       * cmpl op0,op1
- 	       * sbbl dest,dest
- 	       * [notl dest]
- 	       * andl cf - ct, dest
- 	       * [addl dest, ct]
- 	       *
- 	       * Size 8 - 11.
- 	       */
- 
- 	      if (cf == 0)
- 		{
- 		  cf = ct;
- 		  ct = 0;
- 		  tmp = expand_simple_unop (mode, NOT, tmp, copy_rtx (tmp), 1);
- 		}
- 
- 	      tmp = expand_simple_binop (mode, AND,
- 					 copy_rtx (tmp),
- 					 gen_int_mode (cf - ct, mode),
- 					 copy_rtx (tmp), 1, OPTAB_DIRECT);
- 	      if (ct)
- 		tmp = expand_simple_binop (mode, PLUS,
- 					   copy_rtx (tmp), GEN_INT (ct),
- 					   copy_rtx (tmp), 1, OPTAB_DIRECT);
- 	    }
- 
- 	  if (!rtx_equal_p (tmp, out))
- 	    emit_move_insn (copy_rtx (out), copy_rtx (tmp));
- 
- 	  return true;
- 	}
- 
-       if (diff < 0)
- 	{
- 	  machine_mode cmp_mode = GET_MODE (op0);
- 	  enum rtx_code new_code;
- 
- 	  if (SCALAR_FLOAT_MODE_P (cmp_mode))
- 	    {
- 	      gcc_assert (!DECIMAL_FLOAT_MODE_P (cmp_mode));
- 
- 	      /* We may be reversing unordered compare to normal compare, that
- 		 is not valid in general (we may convert non-trapping condition
- 		 to trapping one), however on i386 we currently emit all
- 		 comparisons unordered.  */
- 	      new_code = reverse_condition_maybe_unordered (code);
- 	    }
- 	  else
- 	    new_code = ix86_reverse_condition (code, cmp_mode);
- 	  if (new_code != UNKNOWN)
- 	    {
- 	      std::swap (ct, cf);
- 	      diff = -diff;
- 	      code = new_code;
- 	    }
- 	}
- 
-       compare_code = UNKNOWN;
-       if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
- 	  && CONST_INT_P (op1))
- 	{
- 	  if (op1 == const0_rtx
- 	      && (code == LT || code == GE))
- 	    compare_code = code;
- 	  else if (op1 == constm1_rtx)
- 	    {
- 	      if (code == LE)
- 		compare_code = LT;
- 	      else if (code == GT)
- 		compare_code = GE;
- 	    }
- 	}
- 
-       /* Optimize dest = (op0 < 0) ? -1 : cf.  */
-       if (compare_code != UNKNOWN
- 	  && GET_MODE (op0) == GET_MODE (out)
- 	  && (cf == -1 || ct == -1))
- 	{
- 	  /* If lea code below could be used, only optimize
- 	     if it results in a 2 insn sequence.  */
- 
- 	  if (! (diff == 1 || diff == 2 || diff == 4 || diff == 8
- 		 || diff == 3 || diff == 5 || diff == 9)
- 	      || (compare_code == LT && ct == -1)
- 	      || (compare_code == GE && cf == -1))
- 	    {
- 	      /*
- 	       * notl op1	(if necessary)
- 	       * sarl $31, op1
- 	       * orl cf, op1
- 	       */
- 	      if (ct != -1)
- 		{
- 		  cf = ct;
- 		  ct = -1;
- 		  code = reverse_condition (code);
- 		}
- 
- 	      out = emit_store_flag (out, code, op0, op1, VOIDmode, 0, -1);
- 
- 	      out = expand_simple_binop (mode, IOR,
- 					 out, GEN_INT (cf),
- 					 out, 1, OPTAB_DIRECT);
- 	      if (out != operands[0])
- 		emit_move_insn (operands[0], out);
- 
- 	      return true;
- 	    }
- 	}
- 
- 
-       if ((diff == 1 || diff == 2 || diff == 4 || diff == 8
- 	   || diff == 3 || diff == 5 || diff == 9)
- 	  && ((mode != QImode && mode != HImode) || !TARGET_PARTIAL_REG_STALL)
- 	  && (mode != DImode
- 	      || x86_64_immediate_operand (GEN_INT (cf), VOIDmode)))
- 	{
- 	  /*
- 	   * xorl dest,dest
- 	   * cmpl op1,op2
- 	   * setcc dest
- 	   * lea cf(dest*(ct-cf)),dest
- 	   *
- 	   * Size 14.
- 	   *
- 	   * This also catches the degenerate setcc-only case.
- 	   */
- 
- 	  rtx tmp;
- 	  int nops;
- 
- 	  out = emit_store_flag (out, code, op0, op1, VOIDmode, 0, 1);
- 
- 	  nops = 0;
- 	  /* On x86_64 the lea instruction operates on Pmode, so we need
- 	     to get arithmetics done in proper mode to match.  */
- 	  if (diff == 1)
- 	    tmp = copy_rtx (out);
- 	  else
- 	    {
- 	      rtx out1;
- 	      out1 = copy_rtx (out);
- 	      tmp = gen_rtx_MULT (mode, out1, GEN_INT (diff & ~1));
- 	      nops++;
- 	      if (diff & 1)
- 		{
- 		  tmp = gen_rtx_PLUS (mode, tmp, out1);
- 		  nops++;
- 		}
- 	    }
- 	  if (cf != 0)
- 	    {
- 	      tmp = gen_rtx_PLUS (mode, tmp, GEN_INT (cf));
- 	      nops++;
- 	    }
- 	  if (!rtx_equal_p (tmp, out))
- 	    {
- 	      if (nops == 1)
- 		out = force_operand (tmp, copy_rtx (out));
- 	      else
- 		emit_insn (gen_rtx_SET (copy_rtx (out), copy_rtx (tmp)));
- 	    }
- 	  if (!rtx_equal_p (out, operands[0]))
- 	    emit_move_insn (operands[0], copy_rtx (out));
- 
- 	  return true;
- 	}
- 
-       /*
-        * General case:			Jumpful:
-        *   xorl dest,dest		cmpl op1, op2
-        *   cmpl op1, op2		movl ct, dest
-        *   setcc dest			jcc 1f
-        *   decl dest			movl cf, dest
-        *   andl (cf-ct),dest		1:
-        *   addl ct,dest
-        *
-        * Size 20.			Size 14.
-        *
-        * This is reasonably steep, but branch mispredict costs are
-        * high on modern cpus, so consider failing only if optimizing
-        * for space.
-        */
- 
-       if ((!TARGET_CMOVE || (mode == QImode && TARGET_PARTIAL_REG_STALL))
- 	  && BRANCH_COST (optimize_insn_for_speed_p (),
- 		  	  false) >= 2)
- 	{
- 	  if (cf == 0)
- 	    {
- 	      machine_mode cmp_mode = GET_MODE (op0);
- 	      enum rtx_code new_code;
- 
- 	      if (SCALAR_FLOAT_MODE_P (cmp_mode))
- 		{
- 		  gcc_assert (!DECIMAL_FLOAT_MODE_P (cmp_mode));
- 
- 		  /* We may be reversing unordered compare to normal compare,
- 		     that is not valid in general (we may convert non-trapping
- 		     condition to trapping one), however on i386 we currently
- 		     emit all comparisons unordered.  */
- 		  new_code = reverse_condition_maybe_unordered (code);
- 		}
- 	      else
- 		{
- 		  new_code = ix86_reverse_condition (code, cmp_mode);
- 		  if (compare_code != UNKNOWN && new_code != UNKNOWN)
- 		    compare_code = reverse_condition (compare_code);
- 		}
- 
- 	      if (new_code != UNKNOWN)
- 		{
- 		  cf = ct;
- 		  ct = 0;
- 		  code = new_code;
- 		}
- 	    }
- 
- 	  if (compare_code != UNKNOWN)
- 	    {
- 	      /* notl op1	(if needed)
- 		 sarl $31, op1
- 		 andl (cf-ct), op1
- 		 addl ct, op1
- 
- 		 For x < 0 (resp. x <= -1) there will be no notl,
- 		 so if possible swap the constants to get rid of the
- 		 complement.
- 		 True/false will be -1/0 while code below (store flag
- 		 followed by decrement) is 0/-1, so the constants need
- 		 to be exchanged once more.  */
- 
- 	      if (compare_code == GE || !cf)
- 		{
- 		  code = reverse_condition (code);
- 		  compare_code = LT;
- 		}
- 	      else
- 		std::swap (ct, cf);
- 
- 	      out = emit_store_flag (out, code, op0, op1, VOIDmode, 0, -1);
- 	    }
- 	  else
- 	    {
- 	      out = emit_store_flag (out, code, op0, op1, VOIDmode, 0, 1);
- 
- 	      out = expand_simple_binop (mode, PLUS, copy_rtx (out),
- 					 constm1_rtx,
- 					 copy_rtx (out), 1, OPTAB_DIRECT);
- 	    }
- 
- 	  out = expand_simple_binop (mode, AND, copy_rtx (out),
- 				     gen_int_mode (cf - ct, mode),
- 				     copy_rtx (out), 1, OPTAB_DIRECT);
- 	  if (ct)
- 	    out = expand_simple_binop (mode, PLUS, copy_rtx (out), GEN_INT (ct),
- 				       copy_rtx (out), 1, OPTAB_DIRECT);
- 	  if (!rtx_equal_p (out, operands[0]))
- 	    emit_move_insn (operands[0], copy_rtx (out));
- 
- 	  return true;
- 	}
-     }
- 
-   if (!TARGET_CMOVE || (mode == QImode && TARGET_PARTIAL_REG_STALL))
-     {
-       /* Try a few things more with specific constants and a variable.  */
- 
-       optab op;
-       rtx var, orig_out, out, tmp;
- 
-       if (BRANCH_COST (optimize_insn_for_speed_p (), false) <= 2)
- 	return false;
- 
-       /* If one of the two operands is an interesting constant, load a
- 	 constant with the above and mask it in with a logical operation.  */
- 
-       if (CONST_INT_P (operands[2]))
- 	{
- 	  var = operands[3];
- 	  if (INTVAL (operands[2]) == 0 && operands[3] != constm1_rtx)
- 	    operands[3] = constm1_rtx, op = and_optab;
- 	  else if (INTVAL (operands[2]) == -1 && operands[3] != const0_rtx)
- 	    operands[3] = const0_rtx, op = ior_optab;
- 	  else
- 	    return false;
- 	}
-       else if (CONST_INT_P (operands[3]))
- 	{
- 	  var = operands[2];
- 	  if (INTVAL (operands[3]) == 0 && operands[2] != constm1_rtx)
- 	    operands[2] = constm1_rtx, op = and_optab;
- 	  else if (INTVAL (operands[3]) == -1 && operands[3] != const0_rtx)
- 	    operands[2] = const0_rtx, op = ior_optab;
- 	  else
- 	    return false;
- 	}
-       else
-         return false;
- 
-       orig_out = operands[0];
-       tmp = gen_reg_rtx (mode);
-       operands[0] = tmp;
- 
-       /* Recurse to get the constant loaded.  */
-       if (!ix86_expand_int_movcc (operands))
-         return false;
- 
-       /* Mask in the interesting variable.  */
-       out = expand_binop (mode, op, var, tmp, orig_out, 0,
- 			  OPTAB_WIDEN);
-       if (!rtx_equal_p (out, orig_out))
- 	emit_move_insn (copy_rtx (orig_out), copy_rtx (out));
- 
-       return true;
-     }
- 
-   /*
-    * For comparison with above,
-    *
-    * movl cf,dest
-    * movl ct,tmp
-    * cmpl op1,op2
-    * cmovcc tmp,dest
-    *
-    * Size 15.
-    */
- 
-   if (! nonimmediate_operand (operands[2], mode))
-     operands[2] = force_reg (mode, operands[2]);
-   if (! nonimmediate_operand (operands[3], mode))
-     operands[3] = force_reg (mode, operands[3]);
- 
-   if (! register_operand (operands[2], VOIDmode)
-       && (mode == QImode
-           || ! register_operand (operands[3], VOIDmode)))
-     operands[2] = force_reg (mode, operands[2]);
- 
-   if (mode == QImode
-       && ! register_operand (operands[3], VOIDmode))
-     operands[3] = force_reg (mode, operands[3]);
- 
-   emit_insn (compare_seq);
-   emit_insn (gen_rtx_SET (operands[0],
- 			  gen_rtx_IF_THEN_ELSE (mode,
- 						compare_op, operands[2],
- 						operands[3])));
-   return true;
- }
- 
- /* Swap, force into registers, or otherwise massage the two operands
-    to an sse comparison with a mask result.  Thus we differ a bit from
-    ix86_prepare_fp_compare_args which expects to produce a flags result.
- 
-    The DEST operand exists to help determine whether to commute commutative
-    operators.  The POP0/POP1 operands are updated in place.  The new
-    comparison code is returned, or UNKNOWN if not implementable.  */
- 
- static enum rtx_code
- ix86_prepare_sse_fp_compare_args (rtx dest, enum rtx_code code,
- 				  rtx *pop0, rtx *pop1)
- {
-   switch (code)
-     {
-     case LTGT:
-     case UNEQ:
-       /* AVX supports all the needed comparisons.  */
-       if (TARGET_AVX)
- 	break;
-       /* We have no LTGT as an operator.  We could implement it with
- 	 NE & ORDERED, but this requires an extra temporary.  It's
- 	 not clear that it's worth it.  */
-       return UNKNOWN;
- 
-     case LT:
-     case LE:
-     case UNGT:
-     case UNGE:
-       /* These are supported directly.  */
-       break;
- 
-     case EQ:
-     case NE:
-     case UNORDERED:
-     case ORDERED:
-       /* AVX has 3 operand comparisons, no need to swap anything.  */
-       if (TARGET_AVX)
- 	break;
-       /* For commutative operators, try to canonicalize the destination
- 	 operand to be first in the comparison - this helps reload to
- 	 avoid extra moves.  */
-       if (!dest || !rtx_equal_p (dest, *pop1))
- 	break;
-       /* FALLTHRU */
- 
-     case GE:
-     case GT:
-     case UNLE:
-     case UNLT:
-       /* These are not supported directly before AVX, and furthermore
- 	 ix86_expand_sse_fp_minmax only optimizes LT/UNGE.  Swap the
- 	 comparison operands to transform into something that is
- 	 supported.  */
-       std::swap (*pop0, *pop1);
-       code = swap_condition (code);
-       break;
- 
-     default:
-       gcc_unreachable ();
-     }
- 
-   return code;
- }
- 
- /* Detect conditional moves that exactly match min/max operational
-    semantics.  Note that this is IEEE safe, as long as we don't
-    interchange the operands.
- 
-    Returns FALSE if this conditional move doesn't match a MIN/MAX,
-    and TRUE if the operation is successful and instructions are emitted.  */
- 
- static bool
- ix86_expand_sse_fp_minmax (rtx dest, enum rtx_code code, rtx cmp_op0,
- 			   rtx cmp_op1, rtx if_true, rtx if_false)
- {
-   machine_mode mode;
-   bool is_min;
-   rtx tmp;
- 
-   if (code == LT)
-     ;
-   else if (code == UNGE)
-     std::swap (if_true, if_false);
-   else
-     return false;
- 
-   if (rtx_equal_p (cmp_op0, if_true) && rtx_equal_p (cmp_op1, if_false))
-     is_min = true;
-   else if (rtx_equal_p (cmp_op1, if_true) && rtx_equal_p (cmp_op0, if_false))
-     is_min = false;
-   else
-     return false;
- 
-   mode = GET_MODE (dest);
- 
-   /* We want to check HONOR_NANS and HONOR_SIGNED_ZEROS here,
-      but MODE may be a vector mode and thus not appropriate.  */
-   if (!flag_finite_math_only || flag_signed_zeros)
-     {
-       int u = is_min ? UNSPEC_IEEE_MIN : UNSPEC_IEEE_MAX;
-       rtvec v;
- 
-       if_true = force_reg (mode, if_true);
-       v = gen_rtvec (2, if_true, if_false);
-       tmp = gen_rtx_UNSPEC (mode, v, u);
-     }
-   else
-     {
-       code = is_min ? SMIN : SMAX;
-       if (MEM_P (if_true) && MEM_P (if_false))
- 	if_true = force_reg (mode, if_true);
-       tmp = gen_rtx_fmt_ee (code, mode, if_true, if_false);
-     }
- 
-   emit_insn (gen_rtx_SET (dest, tmp));
-   return true;
- }
- 
- /* Expand an SSE comparison.  Return the register with the result.  */
- 
- static rtx
- ix86_expand_sse_cmp (rtx dest, enum rtx_code code, rtx cmp_op0, rtx cmp_op1,
- 		     rtx op_true, rtx op_false)
- {
-   machine_mode mode = GET_MODE (dest);
-   machine_mode cmp_ops_mode = GET_MODE (cmp_op0);
- 
-   /* In general case result of comparison can differ from operands' type.  */
-   machine_mode cmp_mode;
- 
-   /* In AVX512F the result of comparison is an integer mask.  */
-   bool maskcmp = false;
-   rtx x;
- 
-   if (GET_MODE_SIZE (cmp_ops_mode) == 64)
-     {
-       unsigned int nbits = GET_MODE_NUNITS (cmp_ops_mode);
-       cmp_mode = int_mode_for_size (nbits, 0).require ();
-       maskcmp = true;
-     }
-   else
-     cmp_mode = cmp_ops_mode;
- 
-   cmp_op0 = force_reg (cmp_ops_mode, cmp_op0);
- 
-   int (*op1_predicate)(rtx, machine_mode)
-     = VECTOR_MODE_P (cmp_ops_mode) ? vector_operand : nonimmediate_operand;
- 
-   if (!op1_predicate (cmp_op1, cmp_ops_mode))
-     cmp_op1 = force_reg (cmp_ops_mode, cmp_op1);
- 
-   if (optimize
-       || (maskcmp && cmp_mode != mode)
-       || (op_true && reg_overlap_mentioned_p (dest, op_true))
-       || (op_false && reg_overlap_mentioned_p (dest, op_false)))
-     dest = gen_reg_rtx (maskcmp ? cmp_mode : mode);
- 
-   /* Compare patterns for int modes are unspec in AVX512F only.  */
-   if (maskcmp && (code == GT || code == EQ))
-     {
-       rtx (*gen)(rtx, rtx, rtx);
- 
-       switch (cmp_ops_mode)
- 	{
- 	case E_V64QImode:
- 	  gcc_assert (TARGET_AVX512BW);
- 	  gen = code == GT ? gen_avx512bw_gtv64qi3 : gen_avx512bw_eqv64qi3_1;
- 	  break;
- 	case E_V32HImode:
- 	  gcc_assert (TARGET_AVX512BW);
- 	  gen = code == GT ? gen_avx512bw_gtv32hi3 : gen_avx512bw_eqv32hi3_1;
- 	  break;
- 	case E_V16SImode:
- 	  gen = code == GT ? gen_avx512f_gtv16si3 : gen_avx512f_eqv16si3_1;
- 	  break;
- 	case E_V8DImode:
- 	  gen = code == GT ? gen_avx512f_gtv8di3 : gen_avx512f_eqv8di3_1;
- 	  break;
- 	default:
- 	  gen = NULL;
- 	}
- 
-       if (gen)
- 	{
- 	  emit_insn (gen (dest, cmp_op0, cmp_op1));
- 	  return dest;
- 	}
-     }
-   x = gen_rtx_fmt_ee (code, cmp_mode, cmp_op0, cmp_op1);
- 
-   if (cmp_mode != mode && !maskcmp)
-     {
-       x = force_reg (cmp_ops_mode, x);
-       convert_move (dest, x, false);
-     }
-   else
-     emit_insn (gen_rtx_SET (dest, x));
- 
-   return dest;
- }
- 
- /* Expand DEST = CMP ? OP_TRUE : OP_FALSE into a sequence of logical
-    operations.  This is used for both scalar and vector conditional moves.  */
- 
- void
- ix86_expand_sse_movcc (rtx dest, rtx cmp, rtx op_true, rtx op_false)
- {
-   machine_mode mode = GET_MODE (dest);
-   machine_mode cmpmode = GET_MODE (cmp);
- 
-   /* In AVX512F the result of comparison is an integer mask.  */
-   bool maskcmp = (mode != cmpmode && TARGET_AVX512F);
- 
-   rtx t2, t3, x;
- 
-   /* If we have an integer mask and FP value then we need
-      to cast mask to FP mode.  */
-   if (mode != cmpmode && VECTOR_MODE_P (cmpmode))
-     {
-       cmp = force_reg (cmpmode, cmp);
-       cmp = gen_rtx_SUBREG (mode, cmp, 0);
-     }
- 
-   if (maskcmp)
-     {
-       rtx (*gen) (rtx, rtx) = NULL;
-       if ((op_true == CONST0_RTX (mode)
- 	   && vector_all_ones_operand (op_false, mode))
- 	  || (op_false == CONST0_RTX (mode)
- 	      && vector_all_ones_operand (op_true, mode)))
- 	switch (mode)
- 	  {
- 	  case E_V64QImode:
- 	    if (TARGET_AVX512BW)
- 	      gen = gen_avx512bw_cvtmask2bv64qi;
- 	    break;
- 	  case E_V32QImode:
- 	    if (TARGET_AVX512VL && TARGET_AVX512BW)
- 	      gen = gen_avx512vl_cvtmask2bv32qi;
- 	    break;
- 	  case E_V16QImode:
- 	    if (TARGET_AVX512VL && TARGET_AVX512BW)
- 	      gen = gen_avx512vl_cvtmask2bv16qi;
- 	    break;
- 	  case E_V32HImode:
- 	    if (TARGET_AVX512BW)
- 	      gen = gen_avx512bw_cvtmask2wv32hi;
- 	    break;
- 	  case E_V16HImode:
- 	    if (TARGET_AVX512VL && TARGET_AVX512BW)
- 	      gen = gen_avx512vl_cvtmask2wv16hi;
- 	    break;
- 	  case E_V8HImode:
- 	    if (TARGET_AVX512VL && TARGET_AVX512BW)
- 	      gen = gen_avx512vl_cvtmask2wv8hi;
- 	    break;
- 	  case E_V16SImode:
- 	    if (TARGET_AVX512DQ)
- 	      gen = gen_avx512f_cvtmask2dv16si;
- 	    break;
- 	  case E_V8SImode:
- 	    if (TARGET_AVX512VL && TARGET_AVX512DQ)
- 	      gen = gen_avx512vl_cvtmask2dv8si;
- 	    break;
- 	  case E_V4SImode:
- 	    if (TARGET_AVX512VL && TARGET_AVX512DQ)
- 	      gen = gen_avx512vl_cvtmask2dv4si;
- 	    break;
- 	  case E_V8DImode:
- 	    if (TARGET_AVX512DQ)
- 	      gen = gen_avx512f_cvtmask2qv8di;
- 	    break;
- 	  case E_V4DImode:
- 	    if (TARGET_AVX512VL && TARGET_AVX512DQ)
- 	      gen = gen_avx512vl_cvtmask2qv4di;
- 	    break;
- 	  case E_V2DImode:
- 	    if (TARGET_AVX512VL && TARGET_AVX512DQ)
- 	      gen = gen_avx512vl_cvtmask2qv2di;
- 	    break;
- 	  default:
- 	    break;
- 	  }
-       if (gen && SCALAR_INT_MODE_P (cmpmode))
- 	{
- 	  cmp = force_reg (cmpmode, cmp);
- 	  if (op_true == CONST0_RTX (mode))
- 	    {
- 	      rtx (*gen_not) (rtx, rtx);
- 	      switch (cmpmode)
- 		{
- 		case E_QImode: gen_not = gen_knotqi; break;
- 		case E_HImode: gen_not = gen_knothi; break;
- 		case E_SImode: gen_not = gen_knotsi; break;
- 		case E_DImode: gen_not = gen_knotdi; break;
- 		default: gcc_unreachable ();
- 		}
- 	      rtx n = gen_reg_rtx (cmpmode);
- 	      emit_insn (gen_not (n, cmp));
- 	      cmp = n;
- 	    }
- 	  emit_insn (gen (dest, cmp));
- 	  return;
- 	}
-     }
-   else if (vector_all_ones_operand (op_true, mode)
- 	   && op_false == CONST0_RTX (mode))
-     {
-       emit_insn (gen_rtx_SET (dest, cmp));
-       return;
-     }
-   else if (op_false == CONST0_RTX (mode))
-     {
-       op_true = force_reg (mode, op_true);
-       x = gen_rtx_AND (mode, cmp, op_true);
-       emit_insn (gen_rtx_SET (dest, x));
-       return;
-     }
-   else if (op_true == CONST0_RTX (mode))
-     {
-       op_false = force_reg (mode, op_false);
-       x = gen_rtx_NOT (mode, cmp);
-       x = gen_rtx_AND (mode, x, op_false);
-       emit_insn (gen_rtx_SET (dest, x));
-       return;
-     }
-   else if (INTEGRAL_MODE_P (mode) && op_true == CONSTM1_RTX (mode))
-     {
-       op_false = force_reg (mode, op_false);
-       x = gen_rtx_IOR (mode, cmp, op_false);
-       emit_insn (gen_rtx_SET (dest, x));
-       return;
-     }
-   else if (TARGET_XOP)
-     {
-       op_true = force_reg (mode, op_true);
- 
-       if (!nonimmediate_operand (op_false, mode))
- 	op_false = force_reg (mode, op_false);
- 
-       emit_insn (gen_rtx_SET (dest, gen_rtx_IF_THEN_ELSE (mode, cmp,
- 							  op_true,
- 							  op_false)));
-       return;
-     }
- 
-   rtx (*gen) (rtx, rtx, rtx, rtx) = NULL;
-   rtx d = dest;
- 
-   if (!vector_operand (op_true, mode))
-     op_true = force_reg (mode, op_true);
- 
-   op_false = force_reg (mode, op_false);
- 
-   switch (mode)
-     {
-     case E_V4SFmode:
-       if (TARGET_SSE4_1)
- 	gen = gen_sse4_1_blendvps;
-       break;
-     case E_V2DFmode:
-       if (TARGET_SSE4_1)
- 	gen = gen_sse4_1_blendvpd;
-       break;
-     case E_SFmode:
-       if (TARGET_SSE4_1)
- 	{
- 	  gen = gen_sse4_1_blendvss;
- 	  op_true = force_reg (mode, op_true);
- 	}
-       break;
-     case E_DFmode:
-       if (TARGET_SSE4_1)
- 	{
- 	  gen = gen_sse4_1_blendvsd;
- 	  op_true = force_reg (mode, op_true);
- 	}
-       break;
-     case E_V16QImode:
-     case E_V8HImode:
-     case E_V4SImode:
-     case E_V2DImode:
-       if (TARGET_SSE4_1)
- 	{
- 	  gen = gen_sse4_1_pblendvb;
- 	  if (mode != V16QImode)
- 	    d = gen_reg_rtx (V16QImode);
- 	  op_false = gen_lowpart (V16QImode, op_false);
- 	  op_true = gen_lowpart (V16QImode, op_true);
- 	  cmp = gen_lowpart (V16QImode, cmp);
- 	}
-       break;
-     case E_V8SFmode:
-       if (TARGET_AVX)
- 	gen = gen_avx_blendvps256;
-       break;
-     case E_V4DFmode:
-       if (TARGET_AVX)
- 	gen = gen_avx_blendvpd256;
-       break;
-     case E_V32QImode:
-     case E_V16HImode:
-     case E_V8SImode:
-     case E_V4DImode:
-       if (TARGET_AVX2)
- 	{
- 	  gen = gen_avx2_pblendvb;
- 	  if (mode != V32QImode)
- 	    d = gen_reg_rtx (V32QImode);
- 	  op_false = gen_lowpart (V32QImode, op_false);
- 	  op_true = gen_lowpart (V32QImode, op_true);
- 	  cmp = gen_lowpart (V32QImode, cmp);
- 	}
-       break;
- 
-     case E_V64QImode:
-       gen = gen_avx512bw_blendmv64qi;
-       break;
-     case E_V32HImode:
-       gen = gen_avx512bw_blendmv32hi;
-       break;
-     case E_V16SImode:
-       gen = gen_avx512f_blendmv16si;
-       break;
-     case E_V8DImode:
-       gen = gen_avx512f_blendmv8di;
-       break;
-     case E_V8DFmode:
-       gen = gen_avx512f_blendmv8df;
-       break;
-     case E_V16SFmode:
-       gen = gen_avx512f_blendmv16sf;
-       break;
- 
-     default:
-       break;
-     }
- 
-   if (gen != NULL)
-     {
-       emit_insn (gen (d, op_false, op_true, cmp));
-       if (d != dest)
- 	emit_move_insn (dest, gen_lowpart (GET_MODE (dest), d));
-     }
-   else
-     {
-       op_true = force_reg (mode, op_true);
- 
-       t2 = gen_reg_rtx (mode);
-       if (optimize)
- 	t3 = gen_reg_rtx (mode);
-       else
- 	t3 = dest;
- 
-       x = gen_rtx_AND (mode, op_true, cmp);
-       emit_insn (gen_rtx_SET (t2, x));
- 
-       x = gen_rtx_NOT (mode, cmp);
-       x = gen_rtx_AND (mode, x, op_false);
-       emit_insn (gen_rtx_SET (t3, x));
- 
-       x = gen_rtx_IOR (mode, t3, t2);
-       emit_insn (gen_rtx_SET (dest, x));
-     }
- }
- 
- /* Expand a floating-point conditional move.  Return true if successful.  */
- 
- bool
- ix86_expand_fp_movcc (rtx operands[])
- {
-   machine_mode mode = GET_MODE (operands[0]);
-   enum rtx_code code = GET_CODE (operands[1]);
-   rtx tmp, compare_op;
-   rtx op0 = XEXP (operands[1], 0);
-   rtx op1 = XEXP (operands[1], 1);
- 
-   if (TARGET_SSE_MATH && SSE_FLOAT_MODE_P (mode))
-     {
-       machine_mode cmode;
- 
-       /* Since we've no cmove for sse registers, don't force bad register
- 	 allocation just to gain access to it.  Deny movcc when the
- 	 comparison mode doesn't match the move mode.  */
-       cmode = GET_MODE (op0);
-       if (cmode == VOIDmode)
- 	cmode = GET_MODE (op1);
-       if (cmode != mode)
- 	return false;
- 
-       code = ix86_prepare_sse_fp_compare_args (operands[0], code, &op0, &op1);
-       if (code == UNKNOWN)
- 	return false;
- 
-       if (ix86_expand_sse_fp_minmax (operands[0], code, op0, op1,
- 				     operands[2], operands[3]))
- 	return true;
- 
-       tmp = ix86_expand_sse_cmp (operands[0], code, op0, op1,
- 				 operands[2], operands[3]);
-       ix86_expand_sse_movcc (operands[0], tmp, operands[2], operands[3]);
-       return true;
-     }
- 
-   if (GET_MODE (op0) == TImode
-       || (GET_MODE (op0) == DImode
- 	  && !TARGET_64BIT))
-     return false;
- 
-   /* The floating point conditional move instructions don't directly
-      support conditions resulting from a signed integer comparison.  */
- 
-   compare_op = ix86_expand_compare (code, op0, op1);
-   if (!fcmov_comparison_operator (compare_op, VOIDmode))
-     {
-       tmp = gen_reg_rtx (QImode);
-       ix86_expand_setcc (tmp, code, op0, op1);
- 
-       compare_op = ix86_expand_compare (NE, tmp, const0_rtx);
-     }
- 
-   emit_insn (gen_rtx_SET (operands[0],
- 			  gen_rtx_IF_THEN_ELSE (mode, compare_op,
- 						operands[2], operands[3])));
- 
-   return true;
- }
- 
- /* Helper for ix86_cmp_code_to_pcmp_immediate for int modes.  */
- 
- static int
- ix86_int_cmp_code_to_pcmp_immediate (enum rtx_code code)
- {
-   switch (code)
-     {
-     case EQ:
-       return 0;
-     case LT:
-     case LTU:
-       return 1;
-     case LE:
-     case LEU:
-       return 2;
-     case NE:
-       return 4;
-     case GE:
-     case GEU:
-       return 5;
-     case GT:
-     case GTU:
-       return 6;
-     default:
-       gcc_unreachable ();
-     }
- }
- 
- /* Helper for ix86_cmp_code_to_pcmp_immediate for fp modes.  */
- 
- static int
- ix86_fp_cmp_code_to_pcmp_immediate (enum rtx_code code)
- {
-   switch (code)
-     {
-     case EQ:
-       return 0x00;
-     case NE:
-       return 0x04;
-     case GT:
-       return 0x0e;
-     case LE:
-       return 0x02;
-     case GE:
-       return 0x0d;
-     case LT:
-       return 0x01;
-     case UNLE:
-       return 0x0a;
-     case UNLT:
-       return 0x09;
-     case UNGE:
-       return 0x05;
-     case UNGT:
-       return 0x06;
-     case UNEQ:
-       return 0x18;
-     case LTGT:
-       return 0x0c;
-     case ORDERED:
-       return 0x07;
-     case UNORDERED:
-       return 0x03;
-     default:
-       gcc_unreachable ();
-     }
- }
- 
- /* Return immediate value to be used in UNSPEC_PCMP
-    for comparison CODE in MODE.  */
- 
- static int
- ix86_cmp_code_to_pcmp_immediate (enum rtx_code code, machine_mode mode)
- {
-   if (FLOAT_MODE_P (mode))
-     return ix86_fp_cmp_code_to_pcmp_immediate (code);
-   return ix86_int_cmp_code_to_pcmp_immediate (code);
- }
- 
- /* Expand AVX-512 vector comparison.  */
- 
- bool
- ix86_expand_mask_vec_cmp (rtx operands[])
- {
-   machine_mode mask_mode = GET_MODE (operands[0]);
-   machine_mode cmp_mode = GET_MODE (operands[2]);
-   enum rtx_code code = GET_CODE (operands[1]);
-   rtx imm = GEN_INT (ix86_cmp_code_to_pcmp_immediate (code, cmp_mode));
-   int unspec_code;
-   rtx unspec;
- 
-   switch (code)
-     {
-     case LEU:
-     case GTU:
-     case GEU:
-     case LTU:
-       unspec_code = UNSPEC_UNSIGNED_PCMP;
-       break;
- 
-     default:
-       unspec_code = UNSPEC_PCMP;
-     }
- 
-   unspec = gen_rtx_UNSPEC (mask_mode, gen_rtvec (3, operands[2],
- 						 operands[3], imm),
- 			   unspec_code);
-   emit_insn (gen_rtx_SET (operands[0], unspec));
- 
-   return true;
- }
- 
- /* Expand fp vector comparison.  */
- 
- bool
- ix86_expand_fp_vec_cmp (rtx operands[])
- {
-   enum rtx_code code = GET_CODE (operands[1]);
-   rtx cmp;
- 
-   code = ix86_prepare_sse_fp_compare_args (operands[0], code,
- 					   &operands[2], &operands[3]);
-   if (code == UNKNOWN)
-     {
-       rtx temp;
-       switch (GET_CODE (operands[1]))
- 	{
- 	case LTGT:
- 	  temp = ix86_expand_sse_cmp (operands[0], ORDERED, operands[2],
- 				      operands[3], NULL, NULL);
- 	  cmp = ix86_expand_sse_cmp (operands[0], NE, operands[2],
- 				     operands[3], NULL, NULL);
- 	  code = AND;
- 	  break;
- 	case UNEQ:
- 	  temp = ix86_expand_sse_cmp (operands[0], UNORDERED, operands[2],
- 				      operands[3], NULL, NULL);
- 	  cmp = ix86_expand_sse_cmp (operands[0], EQ, operands[2],
- 				     operands[3], NULL, NULL);
- 	  code = IOR;
- 	  break;
- 	default:
- 	  gcc_unreachable ();
- 	}
-       cmp = expand_simple_binop (GET_MODE (cmp), code, temp, cmp, cmp, 1,
- 				 OPTAB_DIRECT);
-     }
-   else
-     cmp = ix86_expand_sse_cmp (operands[0], code, operands[2], operands[3],
- 			       operands[1], operands[2]);
- 
-   if (operands[0] != cmp)
-     emit_move_insn (operands[0], cmp);
- 
-   return true;
- }
- 
- static rtx
- ix86_expand_int_sse_cmp (rtx dest, enum rtx_code code, rtx cop0, rtx cop1,
- 			 rtx op_true, rtx op_false, bool *negate)
- {
-   machine_mode data_mode = GET_MODE (dest);
-   machine_mode mode = GET_MODE (cop0);
-   rtx x;
- 
-   *negate = false;
- 
-   /* XOP supports all of the comparisons on all 128-bit vector int types.  */
-   if (TARGET_XOP
-       && (mode == V16QImode || mode == V8HImode
- 	  || mode == V4SImode || mode == V2DImode))
-     ;
-   else
-     {
-       /* Canonicalize the comparison to EQ, GT, GTU.  */
-       switch (code)
- 	{
- 	case EQ:
- 	case GT:
- 	case GTU:
- 	  break;
- 
- 	case NE:
- 	case LE:
- 	case LEU:
- 	  code = reverse_condition (code);
- 	  *negate = true;
- 	  break;
- 
- 	case GE:
- 	case GEU:
- 	  code = reverse_condition (code);
- 	  *negate = true;
- 	  /* FALLTHRU */
- 
- 	case LT:
- 	case LTU:
- 	  std::swap (cop0, cop1);
- 	  code = swap_condition (code);
- 	  break;
- 
- 	default:
- 	  gcc_unreachable ();
- 	}
- 
-       /* Only SSE4.1/SSE4.2 supports V2DImode.  */
-       if (mode == V2DImode)
- 	{
- 	  switch (code)
- 	    {
- 	    case EQ:
- 	      /* SSE4.1 supports EQ.  */
- 	      if (!TARGET_SSE4_1)
- 		return NULL;
- 	      break;
- 
- 	    case GT:
- 	    case GTU:
- 	      /* SSE4.2 supports GT/GTU.  */
- 	      if (!TARGET_SSE4_2)
- 		return NULL;
- 	      break;
- 
- 	    default:
- 	      gcc_unreachable ();
- 	    }
- 	}
- 
-       rtx optrue = op_true ? op_true : CONSTM1_RTX (data_mode);
-       rtx opfalse = op_false ? op_false : CONST0_RTX (data_mode);
-       if (*negate)
- 	std::swap (optrue, opfalse);
- 
-       /* Transform x > y ? 0 : -1 (i.e. x <= y ? -1 : 0 or x <= y) when
- 	 not using integer masks into min (x, y) == x ? -1 : 0 (i.e.
- 	 min (x, y) == x).  While we add one instruction (the minimum),
- 	 we remove the need for two instructions in the negation, as the
- 	 result is done this way.
- 	 When using masks, do it for SI/DImode element types, as it is shorter
- 	 than the two subtractions.  */
-       if ((code != EQ
- 	   && GET_MODE_SIZE (mode) != 64
- 	   && vector_all_ones_operand (opfalse, data_mode)
- 	   && optrue == CONST0_RTX (data_mode))
- 	  || (code == GTU
- 	      && GET_MODE_SIZE (GET_MODE_INNER (mode)) >= 4
- 	      /* Don't do it if not using integer masks and we'd end up with
- 		 the right values in the registers though.  */
- 	      && (GET_MODE_SIZE (mode) == 64
- 		  || !vector_all_ones_operand (optrue, data_mode)
- 		  || opfalse != CONST0_RTX (data_mode))))
- 	{
- 	  rtx (*gen) (rtx, rtx, rtx) = NULL;
- 
- 	  switch (mode)
- 	    {
- 	    case E_V16SImode:
- 	      gen = (code == GTU) ? gen_uminv16si3 : gen_sminv16si3;
- 	      break;
- 	    case E_V8DImode:
- 	      gen = (code == GTU) ? gen_uminv8di3 : gen_sminv8di3;
- 	      cop0 = force_reg (mode, cop0);
- 	      cop1 = force_reg (mode, cop1);
- 	      break;
- 	    case E_V32QImode:
- 	      if (TARGET_AVX2)
- 		gen = (code == GTU) ? gen_uminv32qi3 : gen_sminv32qi3;
- 	      break;
- 	    case E_V16HImode:
- 	      if (TARGET_AVX2)
- 		gen = (code == GTU) ? gen_uminv16hi3 : gen_sminv16hi3;
- 	      break;
- 	    case E_V8SImode:
- 	      if (TARGET_AVX2)
- 		gen = (code == GTU) ? gen_uminv8si3 : gen_sminv8si3;
- 	      break;
- 	    case E_V4DImode:
- 	      if (TARGET_AVX512VL)
- 		{
- 		  gen = (code == GTU) ? gen_uminv4di3 : gen_sminv4di3;
- 		  cop0 = force_reg (mode, cop0);
- 		  cop1 = force_reg (mode, cop1);
- 		}
- 	      break;
- 	    case E_V16QImode:
- 	      if (code == GTU && TARGET_SSE2)
- 		gen = gen_uminv16qi3;
- 	      else if (code == GT && TARGET_SSE4_1)
- 		gen = gen_sminv16qi3;
- 	      break;
- 	    case E_V8HImode:
- 	      if (code == GTU && TARGET_SSE4_1)
- 		gen = gen_uminv8hi3;
- 	      else if (code == GT && TARGET_SSE2)
- 		gen = gen_sminv8hi3;
- 	      break;
- 	    case E_V4SImode:
- 	      if (TARGET_SSE4_1)
- 		gen = (code == GTU) ? gen_uminv4si3 : gen_sminv4si3;
- 	      break;
- 	    case E_V2DImode:
- 	      if (TARGET_AVX512VL)
- 		{
- 		  gen = (code == GTU) ? gen_uminv2di3 : gen_sminv2di3;
- 		  cop0 = force_reg (mode, cop0);
- 		  cop1 = force_reg (mode, cop1);
- 		}
- 	      break;
- 	    default:
- 	      break;
- 	    }
- 
- 	  if (gen)
- 	    {
- 	      rtx tem = gen_reg_rtx (mode);
- 	      if (!vector_operand (cop0, mode))
- 		cop0 = force_reg (mode, cop0);
- 	      if (!vector_operand (cop1, mode))
- 		cop1 = force_reg (mode, cop1);
- 	      *negate = !*negate;
- 	      emit_insn (gen (tem, cop0, cop1));
- 	      cop1 = tem;
- 	      code = EQ;
- 	    }
- 	}
- 
-       /* Unsigned parallel compare is not supported by the hardware.
- 	 Play some tricks to turn this into a signed comparison
- 	 against 0.  */
-       if (code == GTU)
- 	{
- 	  cop0 = force_reg (mode, cop0);
- 
- 	  switch (mode)
- 	    {
- 	    case E_V16SImode:
- 	    case E_V8DImode:
- 	    case E_V8SImode:
- 	    case E_V4DImode:
- 	    case E_V4SImode:
- 	    case E_V2DImode:
- 		{
- 		  rtx t1, t2, mask;
- 		  rtx (*gen_sub3) (rtx, rtx, rtx);
- 
- 		  switch (mode)
- 		    {
- 		    case E_V16SImode: gen_sub3 = gen_subv16si3; break;
- 		    case E_V8DImode: gen_sub3 = gen_subv8di3; break;
- 		    case E_V8SImode: gen_sub3 = gen_subv8si3; break;
- 		    case E_V4DImode: gen_sub3 = gen_subv4di3; break;
- 		    case E_V4SImode: gen_sub3 = gen_subv4si3; break;
- 		    case E_V2DImode: gen_sub3 = gen_subv2di3; break;
- 		    default:
- 		      gcc_unreachable ();
- 		    }
- 		  /* Subtract (-(INT MAX) - 1) from both operands to make
- 		     them signed.  */
- 		  mask = ix86_build_signbit_mask (mode, true, false);
- 		  t1 = gen_reg_rtx (mode);
- 		  emit_insn (gen_sub3 (t1, cop0, mask));
- 
- 		  t2 = gen_reg_rtx (mode);
- 		  emit_insn (gen_sub3 (t2, cop1, mask));
- 
- 		  cop0 = t1;
- 		  cop1 = t2;
- 		  code = GT;
- 		}
- 	      break;
- 
- 	    case E_V64QImode:
- 	    case E_V32HImode:
- 	    case E_V32QImode:
- 	    case E_V16HImode:
- 	    case E_V16QImode:
- 	    case E_V8HImode:
- 	      /* Perform a parallel unsigned saturating subtraction.  */
- 	      x = gen_reg_rtx (mode);
- 	      emit_insn (gen_rtx_SET (x, gen_rtx_US_MINUS (mode, cop0,
- 							   cop1)));
- 
- 	      cop0 = x;
- 	      cop1 = CONST0_RTX (mode);
- 	      code = EQ;
- 	      *negate = !*negate;
- 	      break;
- 
- 	    default:
- 	      gcc_unreachable ();
- 	    }
- 	}
-     }
- 
-   if (*negate)
-     std::swap (op_true, op_false);
- 
-   /* Allow the comparison to be done in one mode, but the movcc to
-      happen in another mode.  */
-   if (data_mode == mode)
-     {
-       x = ix86_expand_sse_cmp (dest, code, cop0, cop1,
- 			       op_true, op_false);
-     }
-   else
-     {
-       gcc_assert (GET_MODE_SIZE (data_mode) == GET_MODE_SIZE (mode));
-       x = ix86_expand_sse_cmp (gen_reg_rtx (mode), code, cop0, cop1,
- 			       op_true, op_false);
-       if (GET_MODE (x) == mode)
- 	x = gen_lowpart (data_mode, x);
-     }
- 
-   return x;
- }
- 
- /* Expand integer vector comparison.  */
- 
- bool
- ix86_expand_int_vec_cmp (rtx operands[])
- {
-   rtx_code code = GET_CODE (operands[1]);
-   bool negate = false;
-   rtx cmp = ix86_expand_int_sse_cmp (operands[0], code, operands[2],
- 				     operands[3], NULL, NULL, &negate);
- 
-   if (!cmp)
-     return false;
- 
-   if (negate)
-     cmp = ix86_expand_int_sse_cmp (operands[0], EQ, cmp,
- 				   CONST0_RTX (GET_MODE (cmp)),
- 				   NULL, NULL, &negate);
- 
-   gcc_assert (!negate);
- 
-   if (operands[0] != cmp)
-     emit_move_insn (operands[0], cmp);
- 
-   return true;
- }
- 
- /* Expand a floating-point vector conditional move; a vcond operation
-    rather than a movcc operation.  */
- 
- bool
- ix86_expand_fp_vcond (rtx operands[])
- {
-   enum rtx_code code = GET_CODE (operands[3]);
-   rtx cmp;
- 
-   code = ix86_prepare_sse_fp_compare_args (operands[0], code,
- 					   &operands[4], &operands[5]);
-   if (code == UNKNOWN)
-     {
-       rtx temp;
-       switch (GET_CODE (operands[3]))
- 	{
- 	case LTGT:
- 	  temp = ix86_expand_sse_cmp (operands[0], ORDERED, operands[4],
- 				      operands[5], operands[0], operands[0]);
- 	  cmp = ix86_expand_sse_cmp (operands[0], NE, operands[4],
- 				     operands[5], operands[1], operands[2]);
- 	  code = AND;
- 	  break;
- 	case UNEQ:
- 	  temp = ix86_expand_sse_cmp (operands[0], UNORDERED, operands[4],
- 				      operands[5], operands[0], operands[0]);
- 	  cmp = ix86_expand_sse_cmp (operands[0], EQ, operands[4],
- 				     operands[5], operands[1], operands[2]);
- 	  code = IOR;
- 	  break;
- 	default:
- 	  gcc_unreachable ();
- 	}
-       cmp = expand_simple_binop (GET_MODE (cmp), code, temp, cmp, cmp, 1,
- 				 OPTAB_DIRECT);
-       ix86_expand_sse_movcc (operands[0], cmp, operands[1], operands[2]);
-       return true;
-     }
- 
-   if (ix86_expand_sse_fp_minmax (operands[0], code, operands[4],
- 				 operands[5], operands[1], operands[2]))
-     return true;
- 
-   cmp = ix86_expand_sse_cmp (operands[0], code, operands[4], operands[5],
- 			     operands[1], operands[2]);
-   ix86_expand_sse_movcc (operands[0], cmp, operands[1], operands[2]);
-   return true;
- }
- 
- /* Expand a signed/unsigned integral vector conditional move.  */
- 
- bool
- ix86_expand_int_vcond (rtx operands[])
- {
-   machine_mode data_mode = GET_MODE (operands[0]);
-   machine_mode mode = GET_MODE (operands[4]);
-   enum rtx_code code = GET_CODE (operands[3]);
-   bool negate = false;
-   rtx x, cop0, cop1;
- 
-   cop0 = operands[4];
-   cop1 = operands[5];
- 
-   /* Try to optimize x < 0 ? -1 : 0 into (signed) x >> 31
-      and x < 0 ? 1 : 0 into (unsigned) x >> 31.  */
-   if ((code == LT || code == GE)
-       && data_mode == mode
-       && cop1 == CONST0_RTX (mode)
-       && operands[1 + (code == LT)] == CONST0_RTX (data_mode)
-       && GET_MODE_UNIT_SIZE (data_mode) > 1
-       && GET_MODE_UNIT_SIZE (data_mode) <= 8
-       && (GET_MODE_SIZE (data_mode) == 16
- 	  || (TARGET_AVX2 && GET_MODE_SIZE (data_mode) == 32)))
-     {
-       rtx negop = operands[2 - (code == LT)];
-       int shift = GET_MODE_UNIT_BITSIZE (data_mode) - 1;
-       if (negop == CONST1_RTX (data_mode))
- 	{
- 	  rtx res = expand_simple_binop (mode, LSHIFTRT, cop0, GEN_INT (shift),
- 					 operands[0], 1, OPTAB_DIRECT);
- 	  if (res != operands[0])
- 	    emit_move_insn (operands[0], res);
- 	  return true;
- 	}
-       else if (GET_MODE_INNER (data_mode) != DImode
- 	       && vector_all_ones_operand (negop, data_mode))
- 	{
- 	  rtx res = expand_simple_binop (mode, ASHIFTRT, cop0, GEN_INT (shift),
- 					 operands[0], 0, OPTAB_DIRECT);
- 	  if (res != operands[0])
- 	    emit_move_insn (operands[0], res);
- 	  return true;
- 	}
-     }
- 
-   if (!nonimmediate_operand (cop1, mode))
-     cop1 = force_reg (mode, cop1);
-   if (!general_operand (operands[1], data_mode))
-     operands[1] = force_reg (data_mode, operands[1]);
-   if (!general_operand (operands[2], data_mode))
-     operands[2] = force_reg (data_mode, operands[2]);
- 
-   x = ix86_expand_int_sse_cmp (operands[0], code, cop0, cop1,
- 			       operands[1], operands[2], &negate);
- 
-   if (!x)
-     return false;
- 
-   ix86_expand_sse_movcc (operands[0], x, operands[1+negate],
- 			 operands[2-negate]);
-   return true;
- }
- 
- /* AVX512F does support 64-byte integer vector operations,
-    thus the longest vector we are faced with is V64QImode.  */
- #define MAX_VECT_LEN	64
- 
- struct expand_vec_perm_d
- {
-   rtx target, op0, op1;
-   unsigned char perm[MAX_VECT_LEN];
-   machine_mode vmode;
-   unsigned char nelt;
-   bool one_operand_p;
-   bool testing_p;
- };
- 
- static bool
- ix86_expand_vec_perm_vpermt2 (rtx target, rtx mask, rtx op0, rtx op1,
- 			      struct expand_vec_perm_d *d)
- {
-   /* ix86_expand_vec_perm_vpermt2 is called from both const and non-const
-      expander, so args are either in d, or in op0, op1 etc.  */
-   machine_mode mode = GET_MODE (d ? d->op0 : op0);
-   machine_mode maskmode = mode;
-   rtx (*gen) (rtx, rtx, rtx, rtx) = NULL;
- 
-   switch (mode)
-     {
-     case E_V8HImode:
-       if (TARGET_AVX512VL && TARGET_AVX512BW)
- 	gen = gen_avx512vl_vpermt2varv8hi3;
-       break;
-     case E_V16HImode:
-       if (TARGET_AVX512VL && TARGET_AVX512BW)
- 	gen = gen_avx512vl_vpermt2varv16hi3;
-       break;
-     case E_V64QImode:
-       if (TARGET_AVX512VBMI)
- 	gen = gen_avx512bw_vpermt2varv64qi3;
-       break;
-     case E_V32HImode:
-       if (TARGET_AVX512BW)
- 	gen = gen_avx512bw_vpermt2varv32hi3;
-       break;
-     case E_V4SImode:
-       if (TARGET_AVX512VL)
- 	gen = gen_avx512vl_vpermt2varv4si3;
-       break;
-     case E_V8SImode:
-       if (TARGET_AVX512VL)
- 	gen = gen_avx512vl_vpermt2varv8si3;
-       break;
-     case E_V16SImode:
-       if (TARGET_AVX512F)
- 	gen = gen_avx512f_vpermt2varv16si3;
-       break;
-     case E_V4SFmode:
-       if (TARGET_AVX512VL)
- 	{
- 	  gen = gen_avx512vl_vpermt2varv4sf3;
- 	  maskmode = V4SImode;
- 	}
-       break;
-     case E_V8SFmode:
-       if (TARGET_AVX512VL)
- 	{
- 	  gen = gen_avx512vl_vpermt2varv8sf3;
- 	  maskmode = V8SImode;
- 	}
-       break;
-     case E_V16SFmode:
-       if (TARGET_AVX512F)
- 	{
- 	  gen = gen_avx512f_vpermt2varv16sf3;
- 	  maskmode = V16SImode;
- 	}
-       break;
-     case E_V2DImode:
-       if (TARGET_AVX512VL)
- 	gen = gen_avx512vl_vpermt2varv2di3;
-       break;
-     case E_V4DImode:
-       if (TARGET_AVX512VL)
- 	gen = gen_avx512vl_vpermt2varv4di3;
-       break;
-     case E_V8DImode:
-       if (TARGET_AVX512F)
- 	gen = gen_avx512f_vpermt2varv8di3;
-       break;
-     case E_V2DFmode:
-       if (TARGET_AVX512VL)
- 	{
- 	  gen = gen_avx512vl_vpermt2varv2df3;
- 	  maskmode = V2DImode;
- 	}
-       break;
-     case E_V4DFmode:
-       if (TARGET_AVX512VL)
- 	{
- 	  gen = gen_avx512vl_vpermt2varv4df3;
- 	  maskmode = V4DImode;
- 	}
-       break;
-     case E_V8DFmode:
-       if (TARGET_AVX512F)
- 	{
- 	  gen = gen_avx512f_vpermt2varv8df3;
- 	  maskmode = V8DImode;
- 	}
-       break;
-     default:
-       break;
-     }
- 
-   if (gen == NULL)
-     return false;
- 
-   /* ix86_expand_vec_perm_vpermt2 is called from both const and non-const
-      expander, so args are either in d, or in op0, op1 etc.  */
-   if (d)
-     {
-       rtx vec[64];
-       target = d->target;
-       op0 = d->op0;
-       op1 = d->op1;
-       for (int i = 0; i < d->nelt; ++i)
- 	vec[i] = GEN_INT (d->perm[i]);
-       mask = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (d->nelt, vec));
-     }
- 
-   emit_insn (gen (target, force_reg (maskmode, mask), op0, op1));
-   return true;
- }
- 
- /* Expand a variable vector permutation.  */
- 
- void
- ix86_expand_vec_perm (rtx operands[])
- {
-   rtx target = operands[0];
-   rtx op0 = operands[1];
-   rtx op1 = operands[2];
-   rtx mask = operands[3];
-   rtx t1, t2, t3, t4, t5, t6, t7, t8, vt, vt2, vec[32];
-   machine_mode mode = GET_MODE (op0);
-   machine_mode maskmode = GET_MODE (mask);
-   int w, e, i;
-   bool one_operand_shuffle = rtx_equal_p (op0, op1);
- 
-   /* Number of elements in the vector.  */
-   w = GET_MODE_NUNITS (mode);
-   e = GET_MODE_UNIT_SIZE (mode);
-   gcc_assert (w <= 64);
- 
-   if (TARGET_AVX512F && one_operand_shuffle)
-     {
-       rtx (*gen) (rtx, rtx, rtx) = NULL;
-       switch (mode)
- 	{
- 	case E_V16SImode:
- 	  gen =gen_avx512f_permvarv16si;
- 	  break;
- 	case E_V16SFmode:
- 	  gen = gen_avx512f_permvarv16sf;
- 	  break;
- 	case E_V8DImode:
- 	  gen = gen_avx512f_permvarv8di;
- 	  break;
- 	case E_V8DFmode:
- 	  gen = gen_avx512f_permvarv8df;
- 	  break;
- 	default:
- 	  break;
- 	}
-       if (gen != NULL)
- 	{
- 	  emit_insn (gen (target, op0, mask));
- 	  return;
- 	}
-     }
- 
-   if (ix86_expand_vec_perm_vpermt2 (target, mask, op0, op1, NULL))
-     return;
- 
-   if (TARGET_AVX2)
-     {
-       if (mode == V4DImode || mode == V4DFmode || mode == V16HImode)
- 	{
- 	  /* Unfortunately, the VPERMQ and VPERMPD instructions only support
- 	     an constant shuffle operand.  With a tiny bit of effort we can
- 	     use VPERMD instead.  A re-interpretation stall for V4DFmode is
- 	     unfortunate but there's no avoiding it.
- 	     Similarly for V16HImode we don't have instructions for variable
- 	     shuffling, while for V32QImode we can use after preparing suitable
- 	     masks vpshufb; vpshufb; vpermq; vpor.  */
- 
- 	  if (mode == V16HImode)
- 	    {
- 	      maskmode = mode = V32QImode;
- 	      w = 32;
- 	      e = 1;
- 	    }
- 	  else
- 	    {
- 	      maskmode = mode = V8SImode;
- 	      w = 8;
- 	      e = 4;
- 	    }
- 	  t1 = gen_reg_rtx (maskmode);
- 
- 	  /* Replicate the low bits of the V4DImode mask into V8SImode:
- 	       mask = { A B C D }
- 	       t1 = { A A B B C C D D }.  */
- 	  for (i = 0; i < w / 2; ++i)
- 	    vec[i*2 + 1] = vec[i*2] = GEN_INT (i * 2);
- 	  vt = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (w, vec));
- 	  vt = force_reg (maskmode, vt);
- 	  mask = gen_lowpart (maskmode, mask);
- 	  if (maskmode == V8SImode)
- 	    emit_insn (gen_avx2_permvarv8si (t1, mask, vt));
- 	  else
- 	    emit_insn (gen_avx2_pshufbv32qi3 (t1, mask, vt));
- 
- 	  /* Multiply the shuffle indicies by two.  */
- 	  t1 = expand_simple_binop (maskmode, PLUS, t1, t1, t1, 1,
- 				    OPTAB_DIRECT);
- 
- 	  /* Add one to the odd shuffle indicies:
- 		t1 = { A*2, A*2+1, B*2, B*2+1, ... }.  */
- 	  for (i = 0; i < w / 2; ++i)
- 	    {
- 	      vec[i * 2] = const0_rtx;
- 	      vec[i * 2 + 1] = const1_rtx;
- 	    }
- 	  vt = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (w, vec));
- 	  vt = validize_mem (force_const_mem (maskmode, vt));
- 	  t1 = expand_simple_binop (maskmode, PLUS, t1, vt, t1, 1,
- 				    OPTAB_DIRECT);
- 
- 	  /* Continue as if V8SImode (resp. V32QImode) was used initially.  */
- 	  operands[3] = mask = t1;
- 	  target = gen_reg_rtx (mode);
- 	  op0 = gen_lowpart (mode, op0);
- 	  op1 = gen_lowpart (mode, op1);
- 	}
- 
-       switch (mode)
- 	{
- 	case E_V8SImode:
- 	  /* The VPERMD and VPERMPS instructions already properly ignore
- 	     the high bits of the shuffle elements.  No need for us to
- 	     perform an AND ourselves.  */
- 	  if (one_operand_shuffle)
- 	    {
- 	      emit_insn (gen_avx2_permvarv8si (target, op0, mask));
- 	      if (target != operands[0])
- 		emit_move_insn (operands[0],
- 				gen_lowpart (GET_MODE (operands[0]), target));
- 	    }
- 	  else
- 	    {
- 	      t1 = gen_reg_rtx (V8SImode);
- 	      t2 = gen_reg_rtx (V8SImode);
- 	      emit_insn (gen_avx2_permvarv8si (t1, op0, mask));
- 	      emit_insn (gen_avx2_permvarv8si (t2, op1, mask));
- 	      goto merge_two;
- 	    }
- 	  return;
- 
- 	case E_V8SFmode:
- 	  mask = gen_lowpart (V8SImode, mask);
- 	  if (one_operand_shuffle)
- 	    emit_insn (gen_avx2_permvarv8sf (target, op0, mask));
- 	  else
- 	    {
- 	      t1 = gen_reg_rtx (V8SFmode);
- 	      t2 = gen_reg_rtx (V8SFmode);
- 	      emit_insn (gen_avx2_permvarv8sf (t1, op0, mask));
- 	      emit_insn (gen_avx2_permvarv8sf (t2, op1, mask));
- 	      goto merge_two;
- 	    }
- 	  return;
- 
-         case E_V4SImode:
- 	  /* By combining the two 128-bit input vectors into one 256-bit
- 	     input vector, we can use VPERMD and VPERMPS for the full
- 	     two-operand shuffle.  */
- 	  t1 = gen_reg_rtx (V8SImode);
- 	  t2 = gen_reg_rtx (V8SImode);
- 	  emit_insn (gen_avx_vec_concatv8si (t1, op0, op1));
- 	  emit_insn (gen_avx_vec_concatv8si (t2, mask, mask));
- 	  emit_insn (gen_avx2_permvarv8si (t1, t1, t2));
- 	  emit_insn (gen_avx_vextractf128v8si (target, t1, const0_rtx));
- 	  return;
- 
-         case E_V4SFmode:
- 	  t1 = gen_reg_rtx (V8SFmode);
- 	  t2 = gen_reg_rtx (V8SImode);
- 	  mask = gen_lowpart (V4SImode, mask);
- 	  emit_insn (gen_avx_vec_concatv8sf (t1, op0, op1));
- 	  emit_insn (gen_avx_vec_concatv8si (t2, mask, mask));
- 	  emit_insn (gen_avx2_permvarv8sf (t1, t1, t2));
- 	  emit_insn (gen_avx_vextractf128v8sf (target, t1, const0_rtx));
- 	  return;
- 
- 	case E_V32QImode:
- 	  t1 = gen_reg_rtx (V32QImode);
- 	  t2 = gen_reg_rtx (V32QImode);
- 	  t3 = gen_reg_rtx (V32QImode);
- 	  vt2 = GEN_INT (-128);
- 	  vt = gen_const_vec_duplicate (V32QImode, vt2);
- 	  vt = force_reg (V32QImode, vt);
- 	  for (i = 0; i < 32; i++)
- 	    vec[i] = i < 16 ? vt2 : const0_rtx;
- 	  vt2 = gen_rtx_CONST_VECTOR (V32QImode, gen_rtvec_v (32, vec));
- 	  vt2 = force_reg (V32QImode, vt2);
- 	  /* From mask create two adjusted masks, which contain the same
- 	     bits as mask in the low 7 bits of each vector element.
- 	     The first mask will have the most significant bit clear
- 	     if it requests element from the same 128-bit lane
- 	     and MSB set if it requests element from the other 128-bit lane.
- 	     The second mask will have the opposite values of the MSB,
- 	     and additionally will have its 128-bit lanes swapped.
- 	     E.g. { 07 12 1e 09 ... | 17 19 05 1f ... } mask vector will have
- 	     t1   { 07 92 9e 09 ... | 17 19 85 1f ... } and
- 	     t3   { 97 99 05 9f ... | 87 12 1e 89 ... } where each ...
- 	     stands for other 12 bytes.  */
- 	  /* The bit whether element is from the same lane or the other
- 	     lane is bit 4, so shift it up by 3 to the MSB position.  */
- 	  t5 = gen_reg_rtx (V4DImode);
- 	  emit_insn (gen_ashlv4di3 (t5, gen_lowpart (V4DImode, mask),
- 				    GEN_INT (3)));
- 	  /* Clear MSB bits from the mask just in case it had them set.  */
- 	  emit_insn (gen_avx2_andnotv32qi3 (t2, vt, mask));
- 	  /* After this t1 will have MSB set for elements from other lane.  */
- 	  emit_insn (gen_xorv32qi3 (t1, gen_lowpart (V32QImode, t5), vt2));
- 	  /* Clear bits other than MSB.  */
- 	  emit_insn (gen_andv32qi3 (t1, t1, vt));
- 	  /* Or in the lower bits from mask into t3.  */
- 	  emit_insn (gen_iorv32qi3 (t3, t1, t2));
- 	  /* And invert MSB bits in t1, so MSB is set for elements from the same
- 	     lane.  */
- 	  emit_insn (gen_xorv32qi3 (t1, t1, vt));
- 	  /* Swap 128-bit lanes in t3.  */
- 	  t6 = gen_reg_rtx (V4DImode);
- 	  emit_insn (gen_avx2_permv4di_1 (t6, gen_lowpart (V4DImode, t3),
- 					  const2_rtx, GEN_INT (3),
- 					  const0_rtx, const1_rtx));
- 	  /* And or in the lower bits from mask into t1.  */
- 	  emit_insn (gen_iorv32qi3 (t1, t1, t2));
- 	  if (one_operand_shuffle)
- 	    {
- 	      /* Each of these shuffles will put 0s in places where
- 		 element from the other 128-bit lane is needed, otherwise
- 		 will shuffle in the requested value.  */
- 	      emit_insn (gen_avx2_pshufbv32qi3 (t3, op0,
- 						gen_lowpart (V32QImode, t6)));
- 	      emit_insn (gen_avx2_pshufbv32qi3 (t1, op0, t1));
- 	      /* For t3 the 128-bit lanes are swapped again.  */
- 	      t7 = gen_reg_rtx (V4DImode);
- 	      emit_insn (gen_avx2_permv4di_1 (t7, gen_lowpart (V4DImode, t3),
- 					      const2_rtx, GEN_INT (3),
- 					      const0_rtx, const1_rtx));
- 	      /* And oring both together leads to the result.  */
- 	      emit_insn (gen_iorv32qi3 (target, t1,
- 					gen_lowpart (V32QImode, t7)));
- 	      if (target != operands[0])
- 		emit_move_insn (operands[0],
- 				gen_lowpart (GET_MODE (operands[0]), target));
- 	      return;
- 	    }
- 
- 	  t4 = gen_reg_rtx (V32QImode);
- 	  /* Similarly to the above one_operand_shuffle code,
- 	     just for repeated twice for each operand.  merge_two:
- 	     code will merge the two results together.  */
- 	  emit_insn (gen_avx2_pshufbv32qi3 (t4, op0,
- 					    gen_lowpart (V32QImode, t6)));
- 	  emit_insn (gen_avx2_pshufbv32qi3 (t3, op1,
- 					    gen_lowpart (V32QImode, t6)));
- 	  emit_insn (gen_avx2_pshufbv32qi3 (t2, op0, t1));
- 	  emit_insn (gen_avx2_pshufbv32qi3 (t1, op1, t1));
- 	  t7 = gen_reg_rtx (V4DImode);
- 	  emit_insn (gen_avx2_permv4di_1 (t7, gen_lowpart (V4DImode, t4),
- 					  const2_rtx, GEN_INT (3),
- 					  const0_rtx, const1_rtx));
- 	  t8 = gen_reg_rtx (V4DImode);
- 	  emit_insn (gen_avx2_permv4di_1 (t8, gen_lowpart (V4DImode, t3),
- 					  const2_rtx, GEN_INT (3),
- 					  const0_rtx, const1_rtx));
- 	  emit_insn (gen_iorv32qi3 (t4, t2, gen_lowpart (V32QImode, t7)));
- 	  emit_insn (gen_iorv32qi3 (t3, t1, gen_lowpart (V32QImode, t8)));
- 	  t1 = t4;
- 	  t2 = t3;
- 	  goto merge_two;
- 
- 	default:
- 	  gcc_assert (GET_MODE_SIZE (mode) <= 16);
- 	  break;
- 	}
-     }
- 
-   if (TARGET_XOP)
-     {
-       /* The XOP VPPERM insn supports three inputs.  By ignoring the 
- 	 one_operand_shuffle special case, we avoid creating another
- 	 set of constant vectors in memory.  */
-       one_operand_shuffle = false;
- 
-       /* mask = mask & {2*w-1, ...} */
-       vt = GEN_INT (2*w - 1);
-     }
-   else
-     {
-       /* mask = mask & {w-1, ...} */
-       vt = GEN_INT (w - 1);
-     }
- 
-   vt = gen_const_vec_duplicate (maskmode, vt);
-   mask = expand_simple_binop (maskmode, AND, mask, vt,
- 			      NULL_RTX, 0, OPTAB_DIRECT);
- 
-   /* For non-QImode operations, convert the word permutation control
-      into a byte permutation control.  */
-   if (mode != V16QImode)
-     {
-       mask = expand_simple_binop (maskmode, ASHIFT, mask,
- 				  GEN_INT (exact_log2 (e)),
- 				  NULL_RTX, 0, OPTAB_DIRECT);
- 
-       /* Convert mask to vector of chars.  */
-       mask = force_reg (V16QImode, gen_lowpart (V16QImode, mask));
- 
-       /* Replicate each of the input bytes into byte positions:
- 	 (v2di) --> {0,0,0,0,0,0,0,0, 8,8,8,8,8,8,8,8}
- 	 (v4si) --> {0,0,0,0, 4,4,4,4, 8,8,8,8, 12,12,12,12}
- 	 (v8hi) --> {0,0, 2,2, 4,4, 6,6, ...}.  */
-       for (i = 0; i < 16; ++i)
- 	vec[i] = GEN_INT (i/e * e);
-       vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec));
-       vt = validize_mem (force_const_mem (V16QImode, vt));
-       if (TARGET_XOP)
- 	emit_insn (gen_xop_pperm (mask, mask, mask, vt));
-       else
- 	emit_insn (gen_ssse3_pshufbv16qi3 (mask, mask, vt));
- 
-       /* Convert it into the byte positions by doing
- 	 mask = mask + {0,1,..,16/w, 0,1,..,16/w, ...}  */
-       for (i = 0; i < 16; ++i)
- 	vec[i] = GEN_INT (i % e);
-       vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec));
-       vt = validize_mem (force_const_mem (V16QImode, vt));
-       emit_insn (gen_addv16qi3 (mask, mask, vt));
-     }
- 
-   /* The actual shuffle operations all operate on V16QImode.  */
-   op0 = gen_lowpart (V16QImode, op0);
-   op1 = gen_lowpart (V16QImode, op1);
- 
-   if (TARGET_XOP)
-     {
-       if (GET_MODE (target) != V16QImode)
- 	target = gen_reg_rtx (V16QImode);
-       emit_insn (gen_xop_pperm (target, op0, op1, mask));
-       if (target != operands[0])
- 	emit_move_insn (operands[0],
- 			gen_lowpart (GET_MODE (operands[0]), target));
-     }
-   else if (one_operand_shuffle)
-     {
-       if (GET_MODE (target) != V16QImode)
- 	target = gen_reg_rtx (V16QImode);
-       emit_insn (gen_ssse3_pshufbv16qi3 (target, op0, mask));
-       if (target != operands[0])
- 	emit_move_insn (operands[0],
- 			gen_lowpart (GET_MODE (operands[0]), target));
-     }
-   else
-     {
-       rtx xops[6];
-       bool ok;
- 
-       /* Shuffle the two input vectors independently.  */
-       t1 = gen_reg_rtx (V16QImode);
-       t2 = gen_reg_rtx (V16QImode);
-       emit_insn (gen_ssse3_pshufbv16qi3 (t1, op0, mask));
-       emit_insn (gen_ssse3_pshufbv16qi3 (t2, op1, mask));
- 
-  merge_two:
-       /* Then merge them together.  The key is whether any given control
-          element contained a bit set that indicates the second word.  */
-       mask = operands[3];
-       vt = GEN_INT (w);
-       if (maskmode == V2DImode && !TARGET_SSE4_1)
- 	{
- 	  /* Without SSE4.1, we don't have V2DImode EQ.  Perform one
- 	     more shuffle to convert the V2DI input mask into a V4SI
- 	     input mask.  At which point the masking that expand_int_vcond
- 	     will work as desired.  */
- 	  rtx t3 = gen_reg_rtx (V4SImode);
- 	  emit_insn (gen_sse2_pshufd_1 (t3, gen_lowpart (V4SImode, mask),
- 				        const0_rtx, const0_rtx,
- 				        const2_rtx, const2_rtx));
- 	  mask = t3;
- 	  maskmode = V4SImode;
- 	  e = w = 4;
- 	}
- 
-       vt = gen_const_vec_duplicate (maskmode, vt);
-       vt = force_reg (maskmode, vt);
-       mask = expand_simple_binop (maskmode, AND, mask, vt,
- 				  NULL_RTX, 0, OPTAB_DIRECT);
- 
-       if (GET_MODE (target) != mode)
- 	target = gen_reg_rtx (mode);
-       xops[0] = target;
-       xops[1] = gen_lowpart (mode, t2);
-       xops[2] = gen_lowpart (mode, t1);
-       xops[3] = gen_rtx_EQ (maskmode, mask, vt);
-       xops[4] = mask;
-       xops[5] = vt;
-       ok = ix86_expand_int_vcond (xops);
-       gcc_assert (ok);
-       if (target != operands[0])
- 	emit_move_insn (operands[0],
- 			gen_lowpart (GET_MODE (operands[0]), target));
-     }
- }
- 
- /* Unpack OP[1] into the next wider integer vector type.  UNSIGNED_P is
-    true if we should do zero extension, else sign extension.  HIGH_P is
-    true if we want the N/2 high elements, else the low elements.  */
- 
- void
- ix86_expand_sse_unpack (rtx dest, rtx src, bool unsigned_p, bool high_p)
- {
-   machine_mode imode = GET_MODE (src);
-   rtx tmp;
- 
-   if (TARGET_SSE4_1)
-     {
-       rtx (*unpack)(rtx, rtx);
-       rtx (*extract)(rtx, rtx) = NULL;
-       machine_mode halfmode = BLKmode;
- 
-       switch (imode)
- 	{
- 	case E_V64QImode:
- 	  if (unsigned_p)
- 	    unpack = gen_avx512bw_zero_extendv32qiv32hi2;
- 	  else
- 	    unpack = gen_avx512bw_sign_extendv32qiv32hi2;
- 	  halfmode = V32QImode;
- 	  extract
- 	    = high_p ? gen_vec_extract_hi_v64qi : gen_vec_extract_lo_v64qi;
- 	  break;
- 	case E_V32QImode:
- 	  if (unsigned_p)
- 	    unpack = gen_avx2_zero_extendv16qiv16hi2;
- 	  else
- 	    unpack = gen_avx2_sign_extendv16qiv16hi2;
- 	  halfmode = V16QImode;
- 	  extract
- 	    = high_p ? gen_vec_extract_hi_v32qi : gen_vec_extract_lo_v32qi;
- 	  break;
- 	case E_V32HImode:
- 	  if (unsigned_p)
- 	    unpack = gen_avx512f_zero_extendv16hiv16si2;
- 	  else
- 	    unpack = gen_avx512f_sign_extendv16hiv16si2;
- 	  halfmode = V16HImode;
- 	  extract
- 	    = high_p ? gen_vec_extract_hi_v32hi : gen_vec_extract_lo_v32hi;
- 	  break;
- 	case E_V16HImode:
- 	  if (unsigned_p)
- 	    unpack = gen_avx2_zero_extendv8hiv8si2;
- 	  else
- 	    unpack = gen_avx2_sign_extendv8hiv8si2;
- 	  halfmode = V8HImode;
- 	  extract
- 	    = high_p ? gen_vec_extract_hi_v16hi : gen_vec_extract_lo_v16hi;
- 	  break;
- 	case E_V16SImode:
- 	  if (unsigned_p)
- 	    unpack = gen_avx512f_zero_extendv8siv8di2;
- 	  else
- 	    unpack = gen_avx512f_sign_extendv8siv8di2;
- 	  halfmode = V8SImode;
- 	  extract
- 	    = high_p ? gen_vec_extract_hi_v16si : gen_vec_extract_lo_v16si;
- 	  break;
- 	case E_V8SImode:
- 	  if (unsigned_p)
- 	    unpack = gen_avx2_zero_extendv4siv4di2;
- 	  else
- 	    unpack = gen_avx2_sign_extendv4siv4di2;
- 	  halfmode = V4SImode;
- 	  extract
- 	    = high_p ? gen_vec_extract_hi_v8si : gen_vec_extract_lo_v8si;
- 	  break;
- 	case E_V16QImode:
- 	  if (unsigned_p)
- 	    unpack = gen_sse4_1_zero_extendv8qiv8hi2;
- 	  else
- 	    unpack = gen_sse4_1_sign_extendv8qiv8hi2;
- 	  break;
- 	case E_V8HImode:
- 	  if (unsigned_p)
- 	    unpack = gen_sse4_1_zero_extendv4hiv4si2;
- 	  else
- 	    unpack = gen_sse4_1_sign_extendv4hiv4si2;
- 	  break;
- 	case E_V4SImode:
- 	  if (unsigned_p)
- 	    unpack = gen_sse4_1_zero_extendv2siv2di2;
- 	  else
- 	    unpack = gen_sse4_1_sign_extendv2siv2di2;
- 	  break;
- 	default:
- 	  gcc_unreachable ();
- 	}
- 
-       if (GET_MODE_SIZE (imode) >= 32)
- 	{
- 	  tmp = gen_reg_rtx (halfmode);
- 	  emit_insn (extract (tmp, src));
- 	}
-       else if (high_p)
- 	{
- 	  /* Shift higher 8 bytes to lower 8 bytes.  */
- 	  tmp = gen_reg_rtx (V1TImode);
- 	  emit_insn (gen_sse2_lshrv1ti3 (tmp, gen_lowpart (V1TImode, src),
- 					 GEN_INT (64)));
- 	  tmp = gen_lowpart (imode, tmp);
- 	}
-       else
- 	tmp = src;
- 
-       emit_insn (unpack (dest, tmp));
-     }
-   else
-     {
-       rtx (*unpack)(rtx, rtx, rtx);
- 
-       switch (imode)
- 	{
- 	case E_V16QImode:
- 	  if (high_p)
- 	    unpack = gen_vec_interleave_highv16qi;
- 	  else
- 	    unpack = gen_vec_interleave_lowv16qi;
- 	  break;
- 	case E_V8HImode:
- 	  if (high_p)
- 	    unpack = gen_vec_interleave_highv8hi;
- 	  else
- 	    unpack = gen_vec_interleave_lowv8hi;
- 	  break;
- 	case E_V4SImode:
- 	  if (high_p)
- 	    unpack = gen_vec_interleave_highv4si;
- 	  else
- 	    unpack = gen_vec_interleave_lowv4si;
- 	  break;
- 	default:
- 	  gcc_unreachable ();
- 	}
- 
-       if (unsigned_p)
- 	tmp = force_reg (imode, CONST0_RTX (imode));
-       else
- 	tmp = ix86_expand_sse_cmp (gen_reg_rtx (imode), GT, CONST0_RTX (imode),
- 				   src, pc_rtx, pc_rtx);
- 
-       rtx tmp2 = gen_reg_rtx (imode);
-       emit_insn (unpack (tmp2, src, tmp));
-       emit_move_insn (dest, gen_lowpart (GET_MODE (dest), tmp2));
-     }
- }
- 
- /* Expand conditional increment or decrement using adb/sbb instructions.
-    The default case using setcc followed by the conditional move can be
-    done by generic code.  */
- bool
- ix86_expand_int_addcc (rtx operands[])
- {
-   enum rtx_code code = GET_CODE (operands[1]);
-   rtx flags;
-   rtx (*insn)(rtx, rtx, rtx, rtx, rtx);
-   rtx compare_op;
-   rtx val = const0_rtx;
-   bool fpcmp = false;
-   machine_mode mode;
-   rtx op0 = XEXP (operands[1], 0);
-   rtx op1 = XEXP (operands[1], 1);
- 
-   if (operands[3] != const1_rtx
-       && operands[3] != constm1_rtx)
-     return false;
-   if (!ix86_expand_carry_flag_compare (code, op0, op1, &compare_op))
-      return false;
-   code = GET_CODE (compare_op);
- 
-   flags = XEXP (compare_op, 0);
- 
-   if (GET_MODE (flags) == CCFPmode)
-     {
-       fpcmp = true;
-       code = ix86_fp_compare_code_to_integer (code);
-     }
- 
-   if (code != LTU)
-     {
-       val = constm1_rtx;
-       if (fpcmp)
- 	PUT_CODE (compare_op,
- 		  reverse_condition_maybe_unordered
- 		    (GET_CODE (compare_op)));
-       else
- 	PUT_CODE (compare_op, reverse_condition (GET_CODE (compare_op)));
-     }
- 
-   mode = GET_MODE (operands[0]);
- 
-   /* Construct either adc or sbb insn.  */
-   if ((code == LTU) == (operands[3] == constm1_rtx))
-     {
-       switch (mode)
- 	{
- 	  case E_QImode:
- 	    insn = gen_subqi3_carry;
- 	    break;
- 	  case E_HImode:
- 	    insn = gen_subhi3_carry;
- 	    break;
- 	  case E_SImode:
- 	    insn = gen_subsi3_carry;
- 	    break;
- 	  case E_DImode:
- 	    insn = gen_subdi3_carry;
- 	    break;
- 	  default:
- 	    gcc_unreachable ();
- 	}
-     }
-   else
-     {
-       switch (mode)
- 	{
- 	  case E_QImode:
- 	    insn = gen_addqi3_carry;
- 	    break;
- 	  case E_HImode:
- 	    insn = gen_addhi3_carry;
- 	    break;
- 	  case E_SImode:
- 	    insn = gen_addsi3_carry;
- 	    break;
- 	  case E_DImode:
- 	    insn = gen_adddi3_carry;
- 	    break;
- 	  default:
- 	    gcc_unreachable ();
- 	}
-     }
-   emit_insn (insn (operands[0], operands[2], val, flags, compare_op));
- 
-   return true;
- }
- 
- 
- /* Split operands 0 and 1 into half-mode parts.  Similar to split_double_mode,
-    but works for floating pointer parameters and nonoffsetable memories.
-    For pushes, it returns just stack offsets; the values will be saved
-    in the right order.  Maximally three parts are generated.  */
- 
- static int
- ix86_split_to_parts (rtx operand, rtx *parts, machine_mode mode)
- {
-   int size;
- 
-   if (!TARGET_64BIT)
-     size = mode==XFmode ? 3 : GET_MODE_SIZE (mode) / 4;
-   else
-     size = (GET_MODE_SIZE (mode) + 4) / 8;
- 
-   gcc_assert (!REG_P (operand) || !MMX_REGNO_P (REGNO (operand)));
-   gcc_assert (size >= 2 && size <= 4);
- 
-   /* Optimize constant pool reference to immediates.  This is used by fp
-      moves, that force all constants to memory to allow combining.  */
-   if (MEM_P (operand) && MEM_READONLY_P (operand))
-     operand = avoid_constant_pool_reference (operand);
- 
-   if (MEM_P (operand) && !offsettable_memref_p (operand))
-     {
-       /* The only non-offsetable memories we handle are pushes.  */
-       int ok = push_operand (operand, VOIDmode);
- 
-       gcc_assert (ok);
- 
-       operand = copy_rtx (operand);
-       PUT_MODE (operand, word_mode);
-       parts[0] = parts[1] = parts[2] = parts[3] = operand;
-       return size;
-     }
- 
-   if (GET_CODE (operand) == CONST_VECTOR)
-     {
-       scalar_int_mode imode = int_mode_for_mode (mode).require ();
-       /* Caution: if we looked through a constant pool memory above,
- 	 the operand may actually have a different mode now.  That's
- 	 ok, since we want to pun this all the way back to an integer.  */
-       operand = simplify_subreg (imode, operand, GET_MODE (operand), 0);
-       gcc_assert (operand != NULL);
-       mode = imode;
-     }
- 
-   if (!TARGET_64BIT)
-     {
-       if (mode == DImode)
- 	split_double_mode (mode, &operand, 1, &parts[0], &parts[1]);
-       else
- 	{
- 	  int i;
- 
- 	  if (REG_P (operand))
- 	    {
- 	      gcc_assert (reload_completed);
- 	      for (i = 0; i < size; i++)
- 		parts[i] = gen_rtx_REG (SImode, REGNO (operand) + i);
- 	    }
- 	  else if (offsettable_memref_p (operand))
- 	    {
- 	      operand = adjust_address (operand, SImode, 0);
- 	      parts[0] = operand;
- 	      for (i = 1; i < size; i++)
- 		parts[i] = adjust_address (operand, SImode, 4 * i);
- 	    }
- 	  else if (CONST_DOUBLE_P (operand))
- 	    {
- 	      const REAL_VALUE_TYPE *r;
- 	      long l[4];
- 
- 	      r = CONST_DOUBLE_REAL_VALUE (operand);
- 	      switch (mode)
- 		{
- 		case E_TFmode:
- 		  real_to_target (l, r, mode);
- 		  parts[3] = gen_int_mode (l[3], SImode);
- 		  parts[2] = gen_int_mode (l[2], SImode);
- 		  break;
- 		case E_XFmode:
- 		  /* We can't use REAL_VALUE_TO_TARGET_LONG_DOUBLE since
- 		     long double may not be 80-bit.  */
- 		  real_to_target (l, r, mode);
- 		  parts[2] = gen_int_mode (l[2], SImode);
- 		  break;
- 		case E_DFmode:
- 		  REAL_VALUE_TO_TARGET_DOUBLE (*r, l);
- 		  break;
- 		default:
- 		  gcc_unreachable ();
- 		}
- 	      parts[1] = gen_int_mode (l[1], SImode);
- 	      parts[0] = gen_int_mode (l[0], SImode);
- 	    }
- 	  else
- 	    gcc_unreachable ();
- 	}
-     }
-   else
-     {
-       if (mode == TImode)
- 	split_double_mode (mode, &operand, 1, &parts[0], &parts[1]);
-       if (mode == XFmode || mode == TFmode)
- 	{
- 	  machine_mode upper_mode = mode==XFmode ? SImode : DImode;
- 	  if (REG_P (operand))
- 	    {
- 	      gcc_assert (reload_completed);
- 	      parts[0] = gen_rtx_REG (DImode, REGNO (operand) + 0);
- 	      parts[1] = gen_rtx_REG (upper_mode, REGNO (operand) + 1);
- 	    }
- 	  else if (offsettable_memref_p (operand))
- 	    {
- 	      operand = adjust_address (operand, DImode, 0);
- 	      parts[0] = operand;
- 	      parts[1] = adjust_address (operand, upper_mode, 8);
- 	    }
- 	  else if (CONST_DOUBLE_P (operand))
- 	    {
- 	      long l[4];
- 
- 	      real_to_target (l, CONST_DOUBLE_REAL_VALUE (operand), mode);
- 
- 	      /* real_to_target puts 32-bit pieces in each long.  */
- 	      parts[0] = gen_int_mode ((l[0] & HOST_WIDE_INT_C (0xffffffff))
- 				       | ((l[1] & HOST_WIDE_INT_C (0xffffffff))
- 					  << 32), DImode);
- 
- 	      if (upper_mode == SImode)
- 	        parts[1] = gen_int_mode (l[2], SImode);
- 	      else
- 	        parts[1]
- 		  = gen_int_mode ((l[2] & HOST_WIDE_INT_C (0xffffffff))
- 				  | ((l[3] & HOST_WIDE_INT_C (0xffffffff))
- 				     << 32), DImode);
- 	    }
- 	  else
- 	    gcc_unreachable ();
- 	}
-     }
- 
-   return size;
- }
- 
- /* Emit insns to perform a move or push of DI, DF, XF, and TF values.
-    Return false when normal moves are needed; true when all required
-    insns have been emitted.  Operands 2-4 contain the input values
-    int the correct order; operands 5-7 contain the output values.  */
- 
- void
- ix86_split_long_move (rtx operands[])
- {
-   rtx part[2][4];
-   int nparts, i, j;
-   int push = 0;
-   int collisions = 0;
-   machine_mode mode = GET_MODE (operands[0]);
-   bool collisionparts[4];
- 
-   /* The DFmode expanders may ask us to move double.
-      For 64bit target this is single move.  By hiding the fact
-      here we simplify i386.md splitters.  */
-   if (TARGET_64BIT && GET_MODE_SIZE (GET_MODE (operands[0])) == 8)
-     {
-       /* Optimize constant pool reference to immediates.  This is used by
- 	 fp moves, that force all constants to memory to allow combining.  */
- 
-       if (MEM_P (operands[1])
- 	  && GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF
- 	  && CONSTANT_POOL_ADDRESS_P (XEXP (operands[1], 0)))
- 	operands[1] = get_pool_constant (XEXP (operands[1], 0));
-       if (push_operand (operands[0], VOIDmode))
- 	{
- 	  operands[0] = copy_rtx (operands[0]);
- 	  PUT_MODE (operands[0], word_mode);
- 	}
-       else
-         operands[0] = gen_lowpart (DImode, operands[0]);
-       operands[1] = gen_lowpart (DImode, operands[1]);
-       emit_move_insn (operands[0], operands[1]);
-       return;
-     }
- 
-   /* The only non-offsettable memory we handle is push.  */
-   if (push_operand (operands[0], VOIDmode))
-     push = 1;
-   else
-     gcc_assert (!MEM_P (operands[0])
- 		|| offsettable_memref_p (operands[0]));
- 
-   nparts = ix86_split_to_parts (operands[1], part[1], GET_MODE (operands[0]));
-   ix86_split_to_parts (operands[0], part[0], GET_MODE (operands[0]));
- 
-   /* When emitting push, take care for source operands on the stack.  */
-   if (push && MEM_P (operands[1])
-       && reg_overlap_mentioned_p (stack_pointer_rtx, operands[1]))
-     {
-       rtx src_base = XEXP (part[1][nparts - 1], 0);
- 
-       /* Compensate for the stack decrement by 4.  */
-       if (!TARGET_64BIT && nparts == 3
- 	  && mode == XFmode && TARGET_128BIT_LONG_DOUBLE)
- 	src_base = plus_constant (Pmode, src_base, 4);
- 
-       /* src_base refers to the stack pointer and is
- 	 automatically decreased by emitted push.  */
-       for (i = 0; i < nparts; i++)
- 	part[1][i] = change_address (part[1][i],
- 				     GET_MODE (part[1][i]), src_base);
-     }
- 
-   /* We need to do copy in the right order in case an address register
-      of the source overlaps the destination.  */
-   if (REG_P (part[0][0]) && MEM_P (part[1][0]))
-     {
-       rtx tmp;
- 
-       for (i = 0; i < nparts; i++)
- 	{
- 	  collisionparts[i]
- 	    = reg_overlap_mentioned_p (part[0][i], XEXP (part[1][0], 0));
- 	  if (collisionparts[i])
- 	    collisions++;
- 	}
- 
-       /* Collision in the middle part can be handled by reordering.  */
-       if (collisions == 1 && nparts == 3 && collisionparts [1])
- 	{
- 	  std::swap (part[0][1], part[0][2]);
- 	  std::swap (part[1][1], part[1][2]);
- 	}
-       else if (collisions == 1
- 	       && nparts == 4
- 	       && (collisionparts [1] || collisionparts [2]))
- 	{
- 	  if (collisionparts [1])
- 	    {
- 	      std::swap (part[0][1], part[0][2]);
- 	      std::swap (part[1][1], part[1][2]);
- 	    }
- 	  else
- 	    {
- 	      std::swap (part[0][2], part[0][3]);
- 	      std::swap (part[1][2], part[1][3]);
- 	    }
- 	}
- 
-       /* If there are more collisions, we can't handle it by reordering.
- 	 Do an lea to the last part and use only one colliding move.  */
-       else if (collisions > 1)
- 	{
- 	  rtx base, addr;
- 
- 	  collisions = 1;
- 
- 	  base = part[0][nparts - 1];
- 
- 	  /* Handle the case when the last part isn't valid for lea.
- 	     Happens in 64-bit mode storing the 12-byte XFmode.  */
- 	  if (GET_MODE (base) != Pmode)
- 	    base = gen_rtx_REG (Pmode, REGNO (base));
- 
- 	  addr = XEXP (part[1][0], 0);
- 	  if (TARGET_TLS_DIRECT_SEG_REFS)
- 	    {
- 	      struct ix86_address parts;
- 	      int ok = ix86_decompose_address (addr, &parts);
- 	      gcc_assert (ok);
- 	      /* It is not valid to use %gs: or %fs: in lea.  */
- 	      gcc_assert (parts.seg == ADDR_SPACE_GENERIC);
- 	    }
- 	  emit_insn (gen_rtx_SET (base, addr));
- 	  part[1][0] = replace_equiv_address (part[1][0], base);
- 	  for (i = 1; i < nparts; i++)
- 	    {
- 	      tmp = plus_constant (Pmode, base, UNITS_PER_WORD * i);
- 	      part[1][i] = replace_equiv_address (part[1][i], tmp);
- 	    }
- 	}
-     }
- 
-   if (push)
-     {
-       if (!TARGET_64BIT)
- 	{
- 	  if (nparts == 3)
- 	    {
- 	      if (TARGET_128BIT_LONG_DOUBLE && mode == XFmode)
-                 emit_insn (ix86_gen_add3 (stack_pointer_rtx,
- 					  stack_pointer_rtx, GEN_INT (-4)));
- 	      emit_move_insn (part[0][2], part[1][2]);
- 	    }
- 	  else if (nparts == 4)
- 	    {
- 	      emit_move_insn (part[0][3], part[1][3]);
- 	      emit_move_insn (part[0][2], part[1][2]);
- 	    }
- 	}
-       else
- 	{
- 	  /* In 64bit mode we don't have 32bit push available.  In case this is
- 	     register, it is OK - we will just use larger counterpart.  We also
- 	     retype memory - these comes from attempt to avoid REX prefix on
- 	     moving of second half of TFmode value.  */
- 	  if (GET_MODE (part[1][1]) == SImode)
- 	    {
- 	      switch (GET_CODE (part[1][1]))
- 		{
- 		case MEM:
- 		  part[1][1] = adjust_address (part[1][1], DImode, 0);
- 		  break;
- 
- 		case REG:
- 		  part[1][1] = gen_rtx_REG (DImode, REGNO (part[1][1]));
- 		  break;
- 
- 		default:
- 		  gcc_unreachable ();
- 		}
- 
- 	      if (GET_MODE (part[1][0]) == SImode)
- 		part[1][0] = part[1][1];
- 	    }
- 	}
-       emit_move_insn (part[0][1], part[1][1]);
-       emit_move_insn (part[0][0], part[1][0]);
-       return;
-     }
- 
-   /* Choose correct order to not overwrite the source before it is copied.  */
-   if ((REG_P (part[0][0])
-        && REG_P (part[1][1])
-        && (REGNO (part[0][0]) == REGNO (part[1][1])
- 	   || (nparts == 3
- 	       && REGNO (part[0][0]) == REGNO (part[1][2]))
- 	   || (nparts == 4
- 	       && REGNO (part[0][0]) == REGNO (part[1][3]))))
-       || (collisions > 0
- 	  && reg_overlap_mentioned_p (part[0][0], XEXP (part[1][0], 0))))
-     {
-       for (i = 0, j = nparts - 1; i < nparts; i++, j--)
- 	{
- 	  operands[2 + i] = part[0][j];
- 	  operands[6 + i] = part[1][j];
- 	}
-     }
-   else
-     {
-       for (i = 0; i < nparts; i++)
- 	{
- 	  operands[2 + i] = part[0][i];
- 	  operands[6 + i] = part[1][i];
- 	}
-     }
- 
-   /* If optimizing for size, attempt to locally unCSE nonzero constants.  */
-   if (optimize_insn_for_size_p ())
-     {
-       for (j = 0; j < nparts - 1; j++)
- 	if (CONST_INT_P (operands[6 + j])
- 	    && operands[6 + j] != const0_rtx
- 	    && REG_P (operands[2 + j]))
- 	  for (i = j; i < nparts - 1; i++)
- 	    if (CONST_INT_P (operands[7 + i])
- 		&& INTVAL (operands[7 + i]) == INTVAL (operands[6 + j]))
- 	      operands[7 + i] = operands[2 + j];
-     }
- 
-   for (i = 0; i < nparts; i++)
-     emit_move_insn (operands[2 + i], operands[6 + i]);
- 
-   return;
- }
- 
- /* Helper function of ix86_split_ashl used to generate an SImode/DImode
-    left shift by a constant, either using a single shift or
-    a sequence of add instructions.  */
- 
- static void
- ix86_expand_ashl_const (rtx operand, int count, machine_mode mode)
- {
-   rtx (*insn)(rtx, rtx, rtx);
- 
-   if (count == 1
-       || (count * ix86_cost->add <= ix86_cost->shift_const
- 	  && !optimize_insn_for_size_p ()))
-     {
-       insn = mode == DImode ? gen_addsi3 : gen_adddi3;
-       while (count-- > 0)
- 	emit_insn (insn (operand, operand, operand));
-     }
-   else
-     {
-       insn = mode == DImode ? gen_ashlsi3 : gen_ashldi3;
-       emit_insn (insn (operand, operand, GEN_INT (count)));
-     }
- }
- 
- void
- ix86_split_ashl (rtx *operands, rtx scratch, machine_mode mode)
- {
-   rtx (*gen_ashl3)(rtx, rtx, rtx);
-   rtx (*gen_shld)(rtx, rtx, rtx);
-   int half_width = GET_MODE_BITSIZE (mode) >> 1;
- 
-   rtx low[2], high[2];
-   int count;
- 
-   if (CONST_INT_P (operands[2]))
-     {
-       split_double_mode (mode, operands, 2, low, high);
-       count = INTVAL (operands[2]) & (GET_MODE_BITSIZE (mode) - 1);
- 
-       if (count >= half_width)
- 	{
- 	  emit_move_insn (high[0], low[1]);
- 	  emit_move_insn (low[0], const0_rtx);
- 
- 	  if (count > half_width)
- 	    ix86_expand_ashl_const (high[0], count - half_width, mode);
- 	}
-       else
- 	{
- 	  gen_shld = mode == DImode ? gen_x86_shld : gen_x86_64_shld;
- 
- 	  if (!rtx_equal_p (operands[0], operands[1]))
- 	    emit_move_insn (operands[0], operands[1]);
- 
- 	  emit_insn (gen_shld (high[0], low[0], GEN_INT (count)));
- 	  ix86_expand_ashl_const (low[0], count, mode);
- 	}
-       return;
-     }
- 
-   split_double_mode (mode, operands, 1, low, high);
- 
-   gen_ashl3 = mode == DImode ? gen_ashlsi3 : gen_ashldi3;
- 
-   if (operands[1] == const1_rtx)
-     {
-       /* Assuming we've chosen a QImode capable registers, then 1 << N
- 	 can be done with two 32/64-bit shifts, no branches, no cmoves.  */
-       if (ANY_QI_REG_P (low[0]) && ANY_QI_REG_P (high[0]))
- 	{
- 	  rtx s, d, flags = gen_rtx_REG (CCZmode, FLAGS_REG);
- 
- 	  ix86_expand_clear (low[0]);
- 	  ix86_expand_clear (high[0]);
- 	  emit_insn (gen_testqi_ccz_1 (operands[2], GEN_INT (half_width)));
- 
- 	  d = gen_lowpart (QImode, low[0]);
- 	  d = gen_rtx_STRICT_LOW_PART (VOIDmode, d);
- 	  s = gen_rtx_EQ (QImode, flags, const0_rtx);
- 	  emit_insn (gen_rtx_SET (d, s));
- 
- 	  d = gen_lowpart (QImode, high[0]);
- 	  d = gen_rtx_STRICT_LOW_PART (VOIDmode, d);
- 	  s = gen_rtx_NE (QImode, flags, const0_rtx);
- 	  emit_insn (gen_rtx_SET (d, s));
- 	}
- 
-       /* Otherwise, we can get the same results by manually performing
- 	 a bit extract operation on bit 5/6, and then performing the two
- 	 shifts.  The two methods of getting 0/1 into low/high are exactly
- 	 the same size.  Avoiding the shift in the bit extract case helps
- 	 pentium4 a bit; no one else seems to care much either way.  */
-       else
- 	{
- 	  machine_mode half_mode;
- 	  rtx (*gen_lshr3)(rtx, rtx, rtx);
- 	  rtx (*gen_and3)(rtx, rtx, rtx);
- 	  rtx (*gen_xor3)(rtx, rtx, rtx);
- 	  HOST_WIDE_INT bits;
- 	  rtx x;
- 
- 	  if (mode == DImode)
- 	    {
- 	      half_mode = SImode;
- 	      gen_lshr3 = gen_lshrsi3;
- 	      gen_and3 = gen_andsi3;
- 	      gen_xor3 = gen_xorsi3;
- 	      bits = 5;
- 	    }
- 	  else
- 	    {
- 	      half_mode = DImode;
- 	      gen_lshr3 = gen_lshrdi3;
- 	      gen_and3 = gen_anddi3;
- 	      gen_xor3 = gen_xordi3;
- 	      bits = 6;
- 	    }
- 
- 	  if (TARGET_PARTIAL_REG_STALL && !optimize_insn_for_size_p ())
- 	    x = gen_rtx_ZERO_EXTEND (half_mode, operands[2]);
- 	  else
- 	    x = gen_lowpart (half_mode, operands[2]);
- 	  emit_insn (gen_rtx_SET (high[0], x));
- 
- 	  emit_insn (gen_lshr3 (high[0], high[0], GEN_INT (bits)));
- 	  emit_insn (gen_and3 (high[0], high[0], const1_rtx));
- 	  emit_move_insn (low[0], high[0]);
- 	  emit_insn (gen_xor3 (low[0], low[0], const1_rtx));
- 	}
- 
-       emit_insn (gen_ashl3 (low[0], low[0], operands[2]));
-       emit_insn (gen_ashl3 (high[0], high[0], operands[2]));
-       return;
-     }
- 
-   if (operands[1] == constm1_rtx)
-     {
-       /* For -1 << N, we can avoid the shld instruction, because we
- 	 know that we're shifting 0...31/63 ones into a -1.  */
-       emit_move_insn (low[0], constm1_rtx);
-       if (optimize_insn_for_size_p ())
- 	emit_move_insn (high[0], low[0]);
-       else
- 	emit_move_insn (high[0], constm1_rtx);
-     }
-   else
-     {
-       gen_shld = mode == DImode ? gen_x86_shld : gen_x86_64_shld;
- 
-       if (!rtx_equal_p (operands[0], operands[1]))
- 	emit_move_insn (operands[0], operands[1]);
- 
-       split_double_mode (mode, operands, 1, low, high);
-       emit_insn (gen_shld (high[0], low[0], operands[2]));
-     }
- 
-   emit_insn (gen_ashl3 (low[0], low[0], operands[2]));
- 
-   if (TARGET_CMOVE && scratch)
-     {
-       rtx (*gen_x86_shift_adj_1)(rtx, rtx, rtx, rtx)
- 	= mode == DImode ? gen_x86_shiftsi_adj_1 : gen_x86_shiftdi_adj_1;
- 
-       ix86_expand_clear (scratch);
-       emit_insn (gen_x86_shift_adj_1 (high[0], low[0], operands[2], scratch));
-     }
-   else
-     {
-       rtx (*gen_x86_shift_adj_2)(rtx, rtx, rtx)
- 	= mode == DImode ? gen_x86_shiftsi_adj_2 : gen_x86_shiftdi_adj_2;
- 
-       emit_insn (gen_x86_shift_adj_2 (high[0], low[0], operands[2]));
-     }
- }
- 
- void
- ix86_split_ashr (rtx *operands, rtx scratch, machine_mode mode)
- {
-   rtx (*gen_ashr3)(rtx, rtx, rtx)
-     = mode == DImode ? gen_ashrsi3 : gen_ashrdi3;
-   rtx (*gen_shrd)(rtx, rtx, rtx);
-   int half_width = GET_MODE_BITSIZE (mode) >> 1;
- 
-   rtx low[2], high[2];
-   int count;
- 
-   if (CONST_INT_P (operands[2]))
-     {
-       split_double_mode (mode, operands, 2, low, high);
-       count = INTVAL (operands[2]) & (GET_MODE_BITSIZE (mode) - 1);
- 
-       if (count == GET_MODE_BITSIZE (mode) - 1)
- 	{
- 	  emit_move_insn (high[0], high[1]);
- 	  emit_insn (gen_ashr3 (high[0], high[0],
- 				GEN_INT (half_width - 1)));
- 	  emit_move_insn (low[0], high[0]);
- 
- 	}
-       else if (count >= half_width)
- 	{
- 	  emit_move_insn (low[0], high[1]);
- 	  emit_move_insn (high[0], low[0]);
- 	  emit_insn (gen_ashr3 (high[0], high[0],
- 				GEN_INT (half_width - 1)));
- 
- 	  if (count > half_width)
- 	    emit_insn (gen_ashr3 (low[0], low[0],
- 				  GEN_INT (count - half_width)));
- 	}
-       else
- 	{
- 	  gen_shrd = mode == DImode ? gen_x86_shrd : gen_x86_64_shrd;
- 
- 	  if (!rtx_equal_p (operands[0], operands[1]))
- 	    emit_move_insn (operands[0], operands[1]);
- 
- 	  emit_insn (gen_shrd (low[0], high[0], GEN_INT (count)));
- 	  emit_insn (gen_ashr3 (high[0], high[0], GEN_INT (count)));
- 	}
-     }
-   else
-     {
-       gen_shrd = mode == DImode ? gen_x86_shrd : gen_x86_64_shrd;
- 
-      if (!rtx_equal_p (operands[0], operands[1]))
- 	emit_move_insn (operands[0], operands[1]);
- 
-       split_double_mode (mode, operands, 1, low, high);
- 
-       emit_insn (gen_shrd (low[0], high[0], operands[2]));
-       emit_insn (gen_ashr3 (high[0], high[0], operands[2]));
- 
-       if (TARGET_CMOVE && scratch)
- 	{
- 	  rtx (*gen_x86_shift_adj_1)(rtx, rtx, rtx, rtx)
- 	    = mode == DImode ? gen_x86_shiftsi_adj_1 : gen_x86_shiftdi_adj_1;
- 
- 	  emit_move_insn (scratch, high[0]);
- 	  emit_insn (gen_ashr3 (scratch, scratch,
- 				GEN_INT (half_width - 1)));
- 	  emit_insn (gen_x86_shift_adj_1 (low[0], high[0], operands[2],
- 					  scratch));
- 	}
-       else
- 	{
- 	  rtx (*gen_x86_shift_adj_3)(rtx, rtx, rtx)
- 	    = mode == DImode ? gen_x86_shiftsi_adj_3 : gen_x86_shiftdi_adj_3;
- 
- 	  emit_insn (gen_x86_shift_adj_3 (low[0], high[0], operands[2]));
- 	}
-     }
- }
- 
- void
- ix86_split_lshr (rtx *operands, rtx scratch, machine_mode mode)
- {
-   rtx (*gen_lshr3)(rtx, rtx, rtx)
-     = mode == DImode ? gen_lshrsi3 : gen_lshrdi3;
-   rtx (*gen_shrd)(rtx, rtx, rtx);
-   int half_width = GET_MODE_BITSIZE (mode) >> 1;
- 
-   rtx low[2], high[2];
-   int count;
- 
-   if (CONST_INT_P (operands[2]))
-     {
-       split_double_mode (mode, operands, 2, low, high);
-       count = INTVAL (operands[2]) & (GET_MODE_BITSIZE (mode) - 1);
- 
-       if (count >= half_width)
- 	{
- 	  emit_move_insn (low[0], high[1]);
- 	  ix86_expand_clear (high[0]);
- 
- 	  if (count > half_width)
- 	    emit_insn (gen_lshr3 (low[0], low[0],
- 				  GEN_INT (count - half_width)));
- 	}
-       else
- 	{
- 	  gen_shrd = mode == DImode ? gen_x86_shrd : gen_x86_64_shrd;
- 
- 	  if (!rtx_equal_p (operands[0], operands[1]))
- 	    emit_move_insn (operands[0], operands[1]);
- 
- 	  emit_insn (gen_shrd (low[0], high[0], GEN_INT (count)));
- 	  emit_insn (gen_lshr3 (high[0], high[0], GEN_INT (count)));
- 	}
-     }
-   else
-     {
-       gen_shrd = mode == DImode ? gen_x86_shrd : gen_x86_64_shrd;
- 
-       if (!rtx_equal_p (operands[0], operands[1]))
- 	emit_move_insn (operands[0], operands[1]);
- 
-       split_double_mode (mode, operands, 1, low, high);
- 
-       emit_insn (gen_shrd (low[0], high[0], operands[2]));
-       emit_insn (gen_lshr3 (high[0], high[0], operands[2]));
- 
-       if (TARGET_CMOVE && scratch)
- 	{
- 	  rtx (*gen_x86_shift_adj_1)(rtx, rtx, rtx, rtx)
- 	    = mode == DImode ? gen_x86_shiftsi_adj_1 : gen_x86_shiftdi_adj_1;
- 
- 	  ix86_expand_clear (scratch);
- 	  emit_insn (gen_x86_shift_adj_1 (low[0], high[0], operands[2],
- 					  scratch));
- 	}
-       else
- 	{
- 	  rtx (*gen_x86_shift_adj_2)(rtx, rtx, rtx)
- 	    = mode == DImode ? gen_x86_shiftsi_adj_2 : gen_x86_shiftdi_adj_2;
- 
- 	  emit_insn (gen_x86_shift_adj_2 (low[0], high[0], operands[2]));
- 	}
-     }
- }
- 
- /* Predict just emitted jump instruction to be taken with probability PROB.  */
- static void
- predict_jump (int prob)
- {
-   rtx_insn *insn = get_last_insn ();
-   gcc_assert (JUMP_P (insn));
-   add_reg_br_prob_note (insn, profile_probability::from_reg_br_prob_base (prob));
- }
- 
- /* Helper function for the string operations below.  Dest VARIABLE whether
-    it is aligned to VALUE bytes.  If true, jump to the label.  */
- static rtx_code_label *
- ix86_expand_aligntest (rtx variable, int value, bool epilogue)
- {
-   rtx_code_label *label = gen_label_rtx ();
-   rtx tmpcount = gen_reg_rtx (GET_MODE (variable));
-   if (GET_MODE (variable) == DImode)
-     emit_insn (gen_anddi3 (tmpcount, variable, GEN_INT (value)));
-   else
-     emit_insn (gen_andsi3 (tmpcount, variable, GEN_INT (value)));
-   emit_cmp_and_jump_insns (tmpcount, const0_rtx, EQ, 0, GET_MODE (variable),
- 			   1, label);
-   if (epilogue)
-     predict_jump (REG_BR_PROB_BASE * 50 / 100);
-   else
-     predict_jump (REG_BR_PROB_BASE * 90 / 100);
-   return label;
- }
- 
- /* Adjust COUNTER by the VALUE.  */
- static void
- ix86_adjust_counter (rtx countreg, HOST_WIDE_INT value)
- {
-   rtx (*gen_add)(rtx, rtx, rtx)
-     = GET_MODE (countreg) == DImode ? gen_adddi3 : gen_addsi3;
- 
-   emit_insn (gen_add (countreg, countreg, GEN_INT (-value)));
- }
- 
  /* Zero extend possibly SImode EXP to Pmode register.  */
  rtx
  ix86_zero_extend_to_Pmode (rtx exp)
--- 15416,15421 ----
*************** ix86_zero_extend_to_Pmode (rtx exp)
*** 26225,28583 ****
    return force_reg (Pmode, convert_to_mode (Pmode, exp, 1));
  }
  
- /* Divide COUNTREG by SCALE.  */
- static rtx
- scale_counter (rtx countreg, int scale)
- {
-   rtx sc;
- 
-   if (scale == 1)
-     return countreg;
-   if (CONST_INT_P (countreg))
-     return GEN_INT (INTVAL (countreg) / scale);
-   gcc_assert (REG_P (countreg));
- 
-   sc = expand_simple_binop (GET_MODE (countreg), LSHIFTRT, countreg,
- 			    GEN_INT (exact_log2 (scale)),
- 			    NULL, 1, OPTAB_DIRECT);
-   return sc;
- }
- 
- /* Return mode for the memcpy/memset loop counter.  Prefer SImode over
-    DImode for constant loop counts.  */
- 
- static machine_mode
- counter_mode (rtx count_exp)
- {
-   if (GET_MODE (count_exp) != VOIDmode)
-     return GET_MODE (count_exp);
-   if (!CONST_INT_P (count_exp))
-     return Pmode;
-   if (TARGET_64BIT && (INTVAL (count_exp) & ~0xffffffff))
-     return DImode;
-   return SImode;
- }
- 
- /* Copy the address to a Pmode register.  This is used for x32 to
-    truncate DImode TLS address to a SImode register. */
- 
- static rtx
- ix86_copy_addr_to_reg (rtx addr)
- {
-   rtx reg;
-   if (GET_MODE (addr) == Pmode || GET_MODE (addr) == VOIDmode)
-     {
-       reg = copy_addr_to_reg (addr);
-       REG_POINTER (reg) = 1;
-       return reg;
-     }
-   else
-     {
-       gcc_assert (GET_MODE (addr) == DImode && Pmode == SImode);
-       reg = copy_to_mode_reg (DImode, addr);
-       REG_POINTER (reg) = 1;
-       return gen_rtx_SUBREG (SImode, reg, 0);
-     }
- }
- 
- /* When ISSETMEM is FALSE, output simple loop to move memory pointer to SRCPTR
-    to DESTPTR via chunks of MODE unrolled UNROLL times, overall size is COUNT
-    specified in bytes.  When ISSETMEM is TRUE, output the equivalent loop to set
-    memory by VALUE (supposed to be in MODE).
- 
-    The size is rounded down to whole number of chunk size moved at once.
-    SRCMEM and DESTMEM provide MEMrtx to feed proper aliasing info.  */
- 
- 
- static void
- expand_set_or_movmem_via_loop (rtx destmem, rtx srcmem,
- 			       rtx destptr, rtx srcptr, rtx value,
- 			       rtx count, machine_mode mode, int unroll,
- 			       int expected_size, bool issetmem)
- {
-   rtx_code_label *out_label, *top_label;
-   rtx iter, tmp;
-   machine_mode iter_mode = counter_mode (count);
-   int piece_size_n = GET_MODE_SIZE (mode) * unroll;
-   rtx piece_size = GEN_INT (piece_size_n);
-   rtx piece_size_mask = GEN_INT (~((GET_MODE_SIZE (mode) * unroll) - 1));
-   rtx size;
-   int i;
- 
-   top_label = gen_label_rtx ();
-   out_label = gen_label_rtx ();
-   iter = gen_reg_rtx (iter_mode);
- 
-   size = expand_simple_binop (iter_mode, AND, count, piece_size_mask,
- 			      NULL, 1, OPTAB_DIRECT);
-   /* Those two should combine.  */
-   if (piece_size == const1_rtx)
-     {
-       emit_cmp_and_jump_insns (size, const0_rtx, EQ, NULL_RTX, iter_mode,
- 			       true, out_label);
-       predict_jump (REG_BR_PROB_BASE * 10 / 100);
-     }
-   emit_move_insn (iter, const0_rtx);
- 
-   emit_label (top_label);
- 
-   tmp = convert_modes (Pmode, iter_mode, iter, true);
- 
-   /* This assert could be relaxed - in this case we'll need to compute
-      smallest power of two, containing in PIECE_SIZE_N and pass it to
-      offset_address.  */
-   gcc_assert ((piece_size_n & (piece_size_n - 1)) == 0);
-   destmem = offset_address (destmem, tmp, piece_size_n);
-   destmem = adjust_address (destmem, mode, 0);
- 
-   if (!issetmem)
-     {
-       srcmem = offset_address (srcmem, copy_rtx (tmp), piece_size_n);
-       srcmem = adjust_address (srcmem, mode, 0);
- 
-       /* When unrolling for chips that reorder memory reads and writes,
- 	 we can save registers by using single temporary.
- 	 Also using 4 temporaries is overkill in 32bit mode.  */
-       if (!TARGET_64BIT && 0)
- 	{
- 	  for (i = 0; i < unroll; i++)
- 	    {
- 	      if (i)
- 		{
- 		  destmem = adjust_address (copy_rtx (destmem), mode,
- 					    GET_MODE_SIZE (mode));
- 		  srcmem = adjust_address (copy_rtx (srcmem), mode,
- 					   GET_MODE_SIZE (mode));
- 		}
- 	      emit_move_insn (destmem, srcmem);
- 	    }
- 	}
-       else
- 	{
- 	  rtx tmpreg[4];
- 	  gcc_assert (unroll <= 4);
- 	  for (i = 0; i < unroll; i++)
- 	    {
- 	      tmpreg[i] = gen_reg_rtx (mode);
- 	      if (i)
- 		srcmem = adjust_address (copy_rtx (srcmem), mode,
- 					 GET_MODE_SIZE (mode));
- 	      emit_move_insn (tmpreg[i], srcmem);
- 	    }
- 	  for (i = 0; i < unroll; i++)
- 	    {
- 	      if (i)
- 		destmem = adjust_address (copy_rtx (destmem), mode,
- 					  GET_MODE_SIZE (mode));
- 	      emit_move_insn (destmem, tmpreg[i]);
- 	    }
- 	}
-     }
-   else
-     for (i = 0; i < unroll; i++)
-       {
- 	if (i)
- 	  destmem = adjust_address (copy_rtx (destmem), mode,
- 				    GET_MODE_SIZE (mode));
- 	emit_move_insn (destmem, value);
-       }
- 
-   tmp = expand_simple_binop (iter_mode, PLUS, iter, piece_size, iter,
- 			     true, OPTAB_LIB_WIDEN);
-   if (tmp != iter)
-     emit_move_insn (iter, tmp);
- 
-   emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
- 			   true, top_label);
-   if (expected_size != -1)
-     {
-       expected_size /= GET_MODE_SIZE (mode) * unroll;
-       if (expected_size == 0)
- 	predict_jump (0);
-       else if (expected_size > REG_BR_PROB_BASE)
- 	predict_jump (REG_BR_PROB_BASE - 1);
-       else
-         predict_jump (REG_BR_PROB_BASE - (REG_BR_PROB_BASE + expected_size / 2)
- 		      / expected_size);
-     }
-   else
-     predict_jump (REG_BR_PROB_BASE * 80 / 100);
-   iter = ix86_zero_extend_to_Pmode (iter);
-   tmp = expand_simple_binop (Pmode, PLUS, destptr, iter, destptr,
- 			     true, OPTAB_LIB_WIDEN);
-   if (tmp != destptr)
-     emit_move_insn (destptr, tmp);
-   if (!issetmem)
-     {
-       tmp = expand_simple_binop (Pmode, PLUS, srcptr, iter, srcptr,
- 				 true, OPTAB_LIB_WIDEN);
-       if (tmp != srcptr)
- 	emit_move_insn (srcptr, tmp);
-     }
-   emit_label (out_label);
- }
- 
- /* Output "rep; mov" or "rep; stos" instruction depending on ISSETMEM argument.
-    When ISSETMEM is true, arguments SRCMEM and SRCPTR are ignored.
-    When ISSETMEM is false, arguments VALUE and ORIG_VALUE are ignored.
-    For setmem case, VALUE is a promoted to a wider size ORIG_VALUE.
-    ORIG_VALUE is the original value passed to memset to fill the memory with.
-    Other arguments have same meaning as for previous function.  */
- 
- static void
- expand_set_or_movmem_via_rep (rtx destmem, rtx srcmem,
- 			   rtx destptr, rtx srcptr, rtx value, rtx orig_value,
- 			   rtx count,
- 			   machine_mode mode, bool issetmem)
- {
-   rtx destexp;
-   rtx srcexp;
-   rtx countreg;
-   HOST_WIDE_INT rounded_count;
- 
-   /* If possible, it is shorter to use rep movs.
-      TODO: Maybe it is better to move this logic to decide_alg.  */
-   if (mode == QImode && CONST_INT_P (count) && !(INTVAL (count) & 3)
-       && (!issetmem || orig_value == const0_rtx))
-     mode = SImode;
- 
-   if (destptr != XEXP (destmem, 0) || GET_MODE (destmem) != BLKmode)
-     destmem = adjust_automodify_address_nv (destmem, BLKmode, destptr, 0);
- 
-   countreg = ix86_zero_extend_to_Pmode (scale_counter (count,
- 						       GET_MODE_SIZE (mode)));
-   if (mode != QImode)
-     {
-       destexp = gen_rtx_ASHIFT (Pmode, countreg,
- 				GEN_INT (exact_log2 (GET_MODE_SIZE (mode))));
-       destexp = gen_rtx_PLUS (Pmode, destexp, destptr);
-     }
-   else
-     destexp = gen_rtx_PLUS (Pmode, destptr, countreg);
-   if ((!issetmem || orig_value == const0_rtx) && CONST_INT_P (count))
-     {
-       rounded_count
- 	= ROUND_DOWN (INTVAL (count), (HOST_WIDE_INT) GET_MODE_SIZE (mode));
-       destmem = shallow_copy_rtx (destmem);
-       set_mem_size (destmem, rounded_count);
-     }
-   else if (MEM_SIZE_KNOWN_P (destmem))
-     clear_mem_size (destmem);
- 
-   if (issetmem)
-     {
-       value = force_reg (mode, gen_lowpart (mode, value));
-       emit_insn (gen_rep_stos (destptr, countreg, destmem, value, destexp));
-     }
-   else
-     {
-       if (srcptr != XEXP (srcmem, 0) || GET_MODE (srcmem) != BLKmode)
- 	srcmem = adjust_automodify_address_nv (srcmem, BLKmode, srcptr, 0);
-       if (mode != QImode)
- 	{
- 	  srcexp = gen_rtx_ASHIFT (Pmode, countreg,
- 				   GEN_INT (exact_log2 (GET_MODE_SIZE (mode))));
- 	  srcexp = gen_rtx_PLUS (Pmode, srcexp, srcptr);
- 	}
-       else
- 	srcexp = gen_rtx_PLUS (Pmode, srcptr, countreg);
-       if (CONST_INT_P (count))
- 	{
- 	  rounded_count
- 	    = ROUND_DOWN (INTVAL (count), (HOST_WIDE_INT) GET_MODE_SIZE (mode));
- 	  srcmem = shallow_copy_rtx (srcmem);
- 	  set_mem_size (srcmem, rounded_count);
- 	}
-       else
- 	{
- 	  if (MEM_SIZE_KNOWN_P (srcmem))
- 	    clear_mem_size (srcmem);
- 	}
-       emit_insn (gen_rep_mov (destptr, destmem, srcptr, srcmem, countreg,
- 			      destexp, srcexp));
-     }
- }
- 
- /* This function emits moves to copy SIZE_TO_MOVE bytes from SRCMEM to
-    DESTMEM.
-    SRC is passed by pointer to be updated on return.
-    Return value is updated DST.  */
- static rtx
- emit_memmov (rtx destmem, rtx *srcmem, rtx destptr, rtx srcptr,
- 	     HOST_WIDE_INT size_to_move)
- {
-   rtx dst = destmem, src = *srcmem, adjust, tempreg;
-   enum insn_code code;
-   machine_mode move_mode;
-   int piece_size, i;
- 
-   /* Find the widest mode in which we could perform moves.
-      Start with the biggest power of 2 less than SIZE_TO_MOVE and half
-      it until move of such size is supported.  */
-   piece_size = 1 << floor_log2 (size_to_move);
-   while (!int_mode_for_size (piece_size * BITS_PER_UNIT, 0).exists (&move_mode)
- 	 || (code = optab_handler (mov_optab, move_mode)) == CODE_FOR_nothing)
-     {
-       gcc_assert (piece_size > 1);
-       piece_size >>= 1;
-     }
- 
-   /* Find the corresponding vector mode with the same size as MOVE_MODE.
-      MOVE_MODE is an integer mode at the moment (SI, DI, TI, etc.).  */
-   if (GET_MODE_SIZE (move_mode) > GET_MODE_SIZE (word_mode))
-     {
-       int nunits = GET_MODE_SIZE (move_mode) / GET_MODE_SIZE (word_mode);
-       if (!mode_for_vector (word_mode, nunits).exists (&move_mode)
- 	  || (code = optab_handler (mov_optab, move_mode)) == CODE_FOR_nothing)
- 	{
- 	  move_mode = word_mode;
- 	  piece_size = GET_MODE_SIZE (move_mode);
- 	  code = optab_handler (mov_optab, move_mode);
- 	}
-     }
-   gcc_assert (code != CODE_FOR_nothing);
- 
-   dst = adjust_automodify_address_nv (dst, move_mode, destptr, 0);
-   src = adjust_automodify_address_nv (src, move_mode, srcptr, 0);
- 
-   /* Emit moves.  We'll need SIZE_TO_MOVE/PIECE_SIZES moves.  */
-   gcc_assert (size_to_move % piece_size == 0);
-   adjust = GEN_INT (piece_size);
-   for (i = 0; i < size_to_move; i += piece_size)
-     {
-       /* We move from memory to memory, so we'll need to do it via
- 	 a temporary register.  */
-       tempreg = gen_reg_rtx (move_mode);
-       emit_insn (GEN_FCN (code) (tempreg, src));
-       emit_insn (GEN_FCN (code) (dst, tempreg));
- 
-       emit_move_insn (destptr,
- 		      gen_rtx_PLUS (Pmode, copy_rtx (destptr), adjust));
-       emit_move_insn (srcptr,
- 		      gen_rtx_PLUS (Pmode, copy_rtx (srcptr), adjust));
- 
-       dst = adjust_automodify_address_nv (dst, move_mode, destptr,
- 					  piece_size);
-       src = adjust_automodify_address_nv (src, move_mode, srcptr,
- 					  piece_size);
-     }
- 
-   /* Update DST and SRC rtx.  */
-   *srcmem = src;
-   return dst;
- }
- 
- /* Output code to copy at most count & (max_size - 1) bytes from SRC to DEST.  */
- static void
- expand_movmem_epilogue (rtx destmem, rtx srcmem,
- 			rtx destptr, rtx srcptr, rtx count, int max_size)
- {
-   rtx src, dest;
-   if (CONST_INT_P (count))
-     {
-       HOST_WIDE_INT countval = INTVAL (count);
-       HOST_WIDE_INT epilogue_size = countval % max_size;
-       int i;
- 
-       /* For now MAX_SIZE should be a power of 2.  This assert could be
- 	 relaxed, but it'll require a bit more complicated epilogue
- 	 expanding.  */
-       gcc_assert ((max_size & (max_size - 1)) == 0);
-       for (i = max_size; i >= 1; i >>= 1)
- 	{
- 	  if (epilogue_size & i)
- 	    destmem = emit_memmov (destmem, &srcmem, destptr, srcptr, i);
- 	}
-       return;
-     }
-   if (max_size > 8)
-     {
-       count = expand_simple_binop (GET_MODE (count), AND, count, GEN_INT (max_size - 1),
- 				    count, 1, OPTAB_DIRECT);
-       expand_set_or_movmem_via_loop (destmem, srcmem, destptr, srcptr, NULL,
- 				     count, QImode, 1, 4, false);
-       return;
-     }
- 
-   /* When there are stringops, we can cheaply increase dest and src pointers.
-      Otherwise we save code size by maintaining offset (zero is readily
-      available from preceding rep operation) and using x86 addressing modes.
-    */
-   if (TARGET_SINGLE_STRINGOP)
-     {
-       if (max_size > 4)
- 	{
- 	  rtx_code_label *label = ix86_expand_aligntest (count, 4, true);
- 	  src = change_address (srcmem, SImode, srcptr);
- 	  dest = change_address (destmem, SImode, destptr);
- 	  emit_insn (gen_strmov (destptr, dest, srcptr, src));
- 	  emit_label (label);
- 	  LABEL_NUSES (label) = 1;
- 	}
-       if (max_size > 2)
- 	{
- 	  rtx_code_label *label = ix86_expand_aligntest (count, 2, true);
- 	  src = change_address (srcmem, HImode, srcptr);
- 	  dest = change_address (destmem, HImode, destptr);
- 	  emit_insn (gen_strmov (destptr, dest, srcptr, src));
- 	  emit_label (label);
- 	  LABEL_NUSES (label) = 1;
- 	}
-       if (max_size > 1)
- 	{
- 	  rtx_code_label *label = ix86_expand_aligntest (count, 1, true);
- 	  src = change_address (srcmem, QImode, srcptr);
- 	  dest = change_address (destmem, QImode, destptr);
- 	  emit_insn (gen_strmov (destptr, dest, srcptr, src));
- 	  emit_label (label);
- 	  LABEL_NUSES (label) = 1;
- 	}
-     }
-   else
-     {
-       rtx offset = force_reg (Pmode, const0_rtx);
-       rtx tmp;
- 
-       if (max_size > 4)
- 	{
- 	  rtx_code_label *label = ix86_expand_aligntest (count, 4, true);
- 	  src = change_address (srcmem, SImode, srcptr);
- 	  dest = change_address (destmem, SImode, destptr);
- 	  emit_move_insn (dest, src);
- 	  tmp = expand_simple_binop (Pmode, PLUS, offset, GEN_INT (4), NULL,
- 				     true, OPTAB_LIB_WIDEN);
- 	  if (tmp != offset)
- 	    emit_move_insn (offset, tmp);
- 	  emit_label (label);
- 	  LABEL_NUSES (label) = 1;
- 	}
-       if (max_size > 2)
- 	{
- 	  rtx_code_label *label = ix86_expand_aligntest (count, 2, true);
- 	  tmp = gen_rtx_PLUS (Pmode, srcptr, offset);
- 	  src = change_address (srcmem, HImode, tmp);
- 	  tmp = gen_rtx_PLUS (Pmode, destptr, offset);
- 	  dest = change_address (destmem, HImode, tmp);
- 	  emit_move_insn (dest, src);
- 	  tmp = expand_simple_binop (Pmode, PLUS, offset, GEN_INT (2), tmp,
- 				     true, OPTAB_LIB_WIDEN);
- 	  if (tmp != offset)
- 	    emit_move_insn (offset, tmp);
- 	  emit_label (label);
- 	  LABEL_NUSES (label) = 1;
- 	}
-       if (max_size > 1)
- 	{
- 	  rtx_code_label *label = ix86_expand_aligntest (count, 1, true);
- 	  tmp = gen_rtx_PLUS (Pmode, srcptr, offset);
- 	  src = change_address (srcmem, QImode, tmp);
- 	  tmp = gen_rtx_PLUS (Pmode, destptr, offset);
- 	  dest = change_address (destmem, QImode, tmp);
- 	  emit_move_insn (dest, src);
- 	  emit_label (label);
- 	  LABEL_NUSES (label) = 1;
- 	}
-     }
- }
- 
- /* This function emits moves to fill SIZE_TO_MOVE bytes starting from DESTMEM
-    with value PROMOTED_VAL.
-    SRC is passed by pointer to be updated on return.
-    Return value is updated DST.  */
- static rtx
- emit_memset (rtx destmem, rtx destptr, rtx promoted_val,
- 	     HOST_WIDE_INT size_to_move)
- {
-   rtx dst = destmem, adjust;
-   enum insn_code code;
-   machine_mode move_mode;
-   int piece_size, i;
- 
-   /* Find the widest mode in which we could perform moves.
-      Start with the biggest power of 2 less than SIZE_TO_MOVE and half
-      it until move of such size is supported.  */
-   move_mode = GET_MODE (promoted_val);
-   if (move_mode == VOIDmode)
-     move_mode = QImode;
-   if (size_to_move < GET_MODE_SIZE (move_mode))
-     {
-       unsigned int move_bits = size_to_move * BITS_PER_UNIT;
-       move_mode = int_mode_for_size (move_bits, 0).require ();
-       promoted_val = gen_lowpart (move_mode, promoted_val);
-     }
-   piece_size = GET_MODE_SIZE (move_mode);
-   code = optab_handler (mov_optab, move_mode);
-   gcc_assert (code != CODE_FOR_nothing && promoted_val != NULL_RTX);
- 
-   dst = adjust_automodify_address_nv (dst, move_mode, destptr, 0);
- 
-   /* Emit moves.  We'll need SIZE_TO_MOVE/PIECE_SIZES moves.  */
-   gcc_assert (size_to_move % piece_size == 0);
-   adjust = GEN_INT (piece_size);
-   for (i = 0; i < size_to_move; i += piece_size)
-     {
-       if (piece_size <= GET_MODE_SIZE (word_mode))
- 	{
- 	  emit_insn (gen_strset (destptr, dst, promoted_val));
- 	  dst = adjust_automodify_address_nv (dst, move_mode, destptr,
- 					      piece_size);
- 	  continue;
- 	}
- 
-       emit_insn (GEN_FCN (code) (dst, promoted_val));
- 
-       emit_move_insn (destptr,
- 		      gen_rtx_PLUS (Pmode, copy_rtx (destptr), adjust));
- 
-       dst = adjust_automodify_address_nv (dst, move_mode, destptr,
- 					  piece_size);
-     }
- 
-   /* Update DST rtx.  */
-   return dst;
- }
- /* Output code to set at most count & (max_size - 1) bytes starting by DEST.  */
- static void
- expand_setmem_epilogue_via_loop (rtx destmem, rtx destptr, rtx value,
- 				 rtx count, int max_size)
- {
-   count = expand_simple_binop (counter_mode (count), AND, count,
- 			       GEN_INT (max_size - 1), count, 1, OPTAB_DIRECT);
-   expand_set_or_movmem_via_loop (destmem, NULL, destptr, NULL,
- 				 gen_lowpart (QImode, value), count, QImode,
- 				 1, max_size / 2, true);
- }
- 
- /* Output code to set at most count & (max_size - 1) bytes starting by DEST.  */
- static void
- expand_setmem_epilogue (rtx destmem, rtx destptr, rtx value, rtx vec_value,
- 			rtx count, int max_size)
- {
-   rtx dest;
- 
-   if (CONST_INT_P (count))
-     {
-       HOST_WIDE_INT countval = INTVAL (count);
-       HOST_WIDE_INT epilogue_size = countval % max_size;
-       int i;
- 
-       /* For now MAX_SIZE should be a power of 2.  This assert could be
- 	 relaxed, but it'll require a bit more complicated epilogue
- 	 expanding.  */
-       gcc_assert ((max_size & (max_size - 1)) == 0);
-       for (i = max_size; i >= 1; i >>= 1)
- 	{
- 	  if (epilogue_size & i)
- 	    {
- 	      if (vec_value && i > GET_MODE_SIZE (GET_MODE (value)))
- 		destmem = emit_memset (destmem, destptr, vec_value, i);
- 	      else
- 		destmem = emit_memset (destmem, destptr, value, i);
- 	    }
- 	}
-       return;
-     }
-   if (max_size > 32)
-     {
-       expand_setmem_epilogue_via_loop (destmem, destptr, value, count, max_size);
-       return;
-     }
-   if (max_size > 16)
-     {
-       rtx_code_label *label = ix86_expand_aligntest (count, 16, true);
-       if (TARGET_64BIT)
- 	{
- 	  dest = change_address (destmem, DImode, destptr);
- 	  emit_insn (gen_strset (destptr, dest, value));
- 	  dest = adjust_automodify_address_nv (dest, DImode, destptr, 8);
- 	  emit_insn (gen_strset (destptr, dest, value));
- 	}
-       else
- 	{
- 	  dest = change_address (destmem, SImode, destptr);
- 	  emit_insn (gen_strset (destptr, dest, value));
- 	  dest = adjust_automodify_address_nv (dest, SImode, destptr, 4);
- 	  emit_insn (gen_strset (destptr, dest, value));
- 	  dest = adjust_automodify_address_nv (dest, SImode, destptr, 8);
- 	  emit_insn (gen_strset (destptr, dest, value));
- 	  dest = adjust_automodify_address_nv (dest, SImode, destptr, 12);
- 	  emit_insn (gen_strset (destptr, dest, value));
- 	}
-       emit_label (label);
-       LABEL_NUSES (label) = 1;
-     }
-   if (max_size > 8)
-     {
-       rtx_code_label *label = ix86_expand_aligntest (count, 8, true);
-       if (TARGET_64BIT)
- 	{
- 	  dest = change_address (destmem, DImode, destptr);
- 	  emit_insn (gen_strset (destptr, dest, value));
- 	}
-       else
- 	{
- 	  dest = change_address (destmem, SImode, destptr);
- 	  emit_insn (gen_strset (destptr, dest, value));
- 	  dest = adjust_automodify_address_nv (dest, SImode, destptr, 4);
- 	  emit_insn (gen_strset (destptr, dest, value));
- 	}
-       emit_label (label);
-       LABEL_NUSES (label) = 1;
-     }
-   if (max_size > 4)
-     {
-       rtx_code_label *label = ix86_expand_aligntest (count, 4, true);
-       dest = change_address (destmem, SImode, destptr);
-       emit_insn (gen_strset (destptr, dest, gen_lowpart (SImode, value)));
-       emit_label (label);
-       LABEL_NUSES (label) = 1;
-     }
-   if (max_size > 2)
-     {
-       rtx_code_label *label = ix86_expand_aligntest (count, 2, true);
-       dest = change_address (destmem, HImode, destptr);
-       emit_insn (gen_strset (destptr, dest, gen_lowpart (HImode, value)));
-       emit_label (label);
-       LABEL_NUSES (label) = 1;
-     }
-   if (max_size > 1)
-     {
-       rtx_code_label *label = ix86_expand_aligntest (count, 1, true);
-       dest = change_address (destmem, QImode, destptr);
-       emit_insn (gen_strset (destptr, dest, gen_lowpart (QImode, value)));
-       emit_label (label);
-       LABEL_NUSES (label) = 1;
-     }
- }
- 
- /* Depending on ISSETMEM, copy enough from SRCMEM to DESTMEM or set enough to
-    DESTMEM to align it to DESIRED_ALIGNMENT.  Original alignment is ALIGN.
-    Depending on ISSETMEM, either arguments SRCMEM/SRCPTR or VALUE/VEC_VALUE are
-    ignored.
-    Return value is updated DESTMEM.  */
- static rtx
- expand_set_or_movmem_prologue (rtx destmem, rtx srcmem,
- 				  rtx destptr, rtx srcptr, rtx value,
- 				  rtx vec_value, rtx count, int align,
- 				  int desired_alignment, bool issetmem)
- {
-   int i;
-   for (i = 1; i < desired_alignment; i <<= 1)
-     {
-       if (align <= i)
- 	{
- 	  rtx_code_label *label = ix86_expand_aligntest (destptr, i, false);
- 	  if (issetmem)
- 	    {
- 	      if (vec_value && i > GET_MODE_SIZE (GET_MODE (value)))
- 		destmem = emit_memset (destmem, destptr, vec_value, i);
- 	      else
- 		destmem = emit_memset (destmem, destptr, value, i);
- 	    }
- 	  else
- 	    destmem = emit_memmov (destmem, &srcmem, destptr, srcptr, i);
- 	  ix86_adjust_counter (count, i);
- 	  emit_label (label);
- 	  LABEL_NUSES (label) = 1;
- 	  set_mem_align (destmem, i * 2 * BITS_PER_UNIT);
- 	}
-     }
-   return destmem;
- }
- 
- /* Test if COUNT&SIZE is nonzero and if so, expand movme
-    or setmem sequence that is valid for SIZE..2*SIZE-1 bytes
-    and jump to DONE_LABEL.  */
- static void
- expand_small_movmem_or_setmem (rtx destmem, rtx srcmem,
- 			       rtx destptr, rtx srcptr,
- 			       rtx value, rtx vec_value,
- 			       rtx count, int size,
- 			       rtx done_label, bool issetmem)
- {
-   rtx_code_label *label = ix86_expand_aligntest (count, size, false);
-   machine_mode mode = int_mode_for_size (size * BITS_PER_UNIT, 1).else_blk ();
-   rtx modesize;
-   int n;
- 
-   /* If we do not have vector value to copy, we must reduce size.  */
-   if (issetmem)
-     {
-       if (!vec_value)
- 	{
- 	  if (GET_MODE (value) == VOIDmode && size > 8)
- 	    mode = Pmode;
- 	  else if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (value)))
- 	    mode = GET_MODE (value);
- 	}
-       else
- 	mode = GET_MODE (vec_value), value = vec_value;
-     }
-   else
-     {
-       /* Choose appropriate vector mode.  */
-       if (size >= 32)
- 	mode = TARGET_AVX ? V32QImode : TARGET_SSE ? V16QImode : DImode;
-       else if (size >= 16)
- 	mode = TARGET_SSE ? V16QImode : DImode;
-       srcmem = change_address (srcmem, mode, srcptr);
-     }
-   destmem = change_address (destmem, mode, destptr);
-   modesize = GEN_INT (GET_MODE_SIZE (mode));
-   gcc_assert (GET_MODE_SIZE (mode) <= size);
-   for (n = 0; n * GET_MODE_SIZE (mode) < size; n++)
-     {
-       if (issetmem)
- 	emit_move_insn (destmem, gen_lowpart (mode, value));
-       else
- 	{
-           emit_move_insn (destmem, srcmem);
-           srcmem = offset_address (srcmem, modesize, GET_MODE_SIZE (mode));
- 	}
-       destmem = offset_address (destmem, modesize, GET_MODE_SIZE (mode));
-     }
- 
-   destmem = offset_address (destmem, count, 1);
-   destmem = offset_address (destmem, GEN_INT (-2 * size),
- 			    GET_MODE_SIZE (mode));
-   if (!issetmem)
-     {
-       srcmem = offset_address (srcmem, count, 1);
-       srcmem = offset_address (srcmem, GEN_INT (-2 * size),
- 			       GET_MODE_SIZE (mode));
-     }
-   for (n = 0; n * GET_MODE_SIZE (mode) < size; n++)
-     {
-       if (issetmem)
- 	emit_move_insn (destmem, gen_lowpart (mode, value));
-       else
- 	{
- 	  emit_move_insn (destmem, srcmem);
- 	  srcmem = offset_address (srcmem, modesize, GET_MODE_SIZE (mode));
- 	}
-       destmem = offset_address (destmem, modesize, GET_MODE_SIZE (mode));
-     }
-   emit_jump_insn (gen_jump (done_label));
-   emit_barrier ();
- 
-   emit_label (label);
-   LABEL_NUSES (label) = 1;
- }
- 
- /* Handle small memcpy (up to SIZE that is supposed to be small power of 2.
-    and get ready for the main memcpy loop by copying iniital DESIRED_ALIGN-ALIGN
-    bytes and last SIZE bytes adjusitng DESTPTR/SRCPTR/COUNT in a way we can
-    proceed with an loop copying SIZE bytes at once. Do moves in MODE.
-    DONE_LABEL is a label after the whole copying sequence. The label is created
-    on demand if *DONE_LABEL is NULL.
-    MIN_SIZE is minimal size of block copied.  This value gets adjusted for new
-    bounds after the initial copies. 
- 
-    DESTMEM/SRCMEM are memory expressions pointing to the copies block,
-    DESTPTR/SRCPTR are pointers to the block. DYNAMIC_CHECK indicate whether
-    we will dispatch to a library call for large blocks.
- 
-    In pseudocode we do:
- 
-    if (COUNT < SIZE)
-      {
-        Assume that SIZE is 4. Bigger sizes are handled analogously
-        if (COUNT & 4)
- 	 {
- 	    copy 4 bytes from SRCPTR to DESTPTR
- 	    copy 4 bytes from SRCPTR + COUNT - 4 to DESTPTR + COUNT - 4
- 	    goto done_label
- 	 }
-        if (!COUNT)
- 	 goto done_label;
-        copy 1 byte from SRCPTR to DESTPTR
-        if (COUNT & 2)
- 	 {
- 	    copy 2 bytes from SRCPTR to DESTPTR
- 	    copy 2 bytes from SRCPTR + COUNT - 2 to DESTPTR + COUNT - 2
- 	 }
-      }
-    else
-      {
-        copy at least DESIRED_ALIGN-ALIGN bytes from SRCPTR to DESTPTR
-        copy SIZE bytes from SRCPTR + COUNT - SIZE to DESTPTR + COUNT -SIZE
- 
-        OLD_DESPTR = DESTPTR;
-        Align DESTPTR up to DESIRED_ALIGN
-        SRCPTR += DESTPTR - OLD_DESTPTR
-        COUNT -= DEST_PTR - OLD_DESTPTR
-        if (DYNAMIC_CHECK)
- 	 Round COUNT down to multiple of SIZE
-        << optional caller supplied zero size guard is here >>
-        << optional caller supplied dynamic check is here >>
-        << caller supplied main copy loop is here >>
-      }
-    done_label:
-   */
- static void
- expand_set_or_movmem_prologue_epilogue_by_misaligned_moves (rtx destmem, rtx srcmem,
- 							    rtx *destptr, rtx *srcptr,
- 							    machine_mode mode,
- 							    rtx value, rtx vec_value,
- 							    rtx *count,
- 							    rtx_code_label **done_label,
- 							    int size,
- 							    int desired_align,
- 							    int align,
- 							    unsigned HOST_WIDE_INT *min_size,
- 							    bool dynamic_check,
- 							    bool issetmem)
- {
-   rtx_code_label *loop_label = NULL, *label;
-   int n;
-   rtx modesize;
-   int prolog_size = 0;
-   rtx mode_value;
- 
-   /* Chose proper value to copy.  */
-   if (issetmem && VECTOR_MODE_P (mode))
-     mode_value = vec_value;
-   else
-     mode_value = value;
-   gcc_assert (GET_MODE_SIZE (mode) <= size);
- 
-   /* See if block is big or small, handle small blocks.  */
-   if (!CONST_INT_P (*count) && *min_size < (unsigned HOST_WIDE_INT)size)
-     {
-       int size2 = size;
-       loop_label = gen_label_rtx ();
- 
-       if (!*done_label)
- 	*done_label = gen_label_rtx ();
- 
-       emit_cmp_and_jump_insns (*count, GEN_INT (size2), GE, 0, GET_MODE (*count),
- 			       1, loop_label);
-       size2 >>= 1;
- 
-       /* Handle sizes > 3.  */
-       for (;size2 > 2; size2 >>= 1)
- 	expand_small_movmem_or_setmem (destmem, srcmem,
- 				       *destptr, *srcptr,
- 				       value, vec_value,
- 				       *count,
- 				       size2, *done_label, issetmem);
-       /* Nothing to copy?  Jump to DONE_LABEL if so */
-       emit_cmp_and_jump_insns (*count, const0_rtx, EQ, 0, GET_MODE (*count),
- 			       1, *done_label);
- 
-       /* Do a byte copy.  */
-       destmem = change_address (destmem, QImode, *destptr);
-       if (issetmem)
- 	emit_move_insn (destmem, gen_lowpart (QImode, value));
-       else
- 	{
-           srcmem = change_address (srcmem, QImode, *srcptr);
-           emit_move_insn (destmem, srcmem);
- 	}
- 
-       /* Handle sizes 2 and 3.  */
-       label = ix86_expand_aligntest (*count, 2, false);
-       destmem = change_address (destmem, HImode, *destptr);
-       destmem = offset_address (destmem, *count, 1);
-       destmem = offset_address (destmem, GEN_INT (-2), 2);
-       if (issetmem)
-         emit_move_insn (destmem, gen_lowpart (HImode, value));
-       else
- 	{
- 	  srcmem = change_address (srcmem, HImode, *srcptr);
- 	  srcmem = offset_address (srcmem, *count, 1);
- 	  srcmem = offset_address (srcmem, GEN_INT (-2), 2);
- 	  emit_move_insn (destmem, srcmem);
- 	}
- 
-       emit_label (label);
-       LABEL_NUSES (label) = 1;
-       emit_jump_insn (gen_jump (*done_label));
-       emit_barrier ();
-     }
-   else
-     gcc_assert (*min_size >= (unsigned HOST_WIDE_INT)size
- 		|| UINTVAL (*count) >= (unsigned HOST_WIDE_INT)size);
- 
-   /* Start memcpy for COUNT >= SIZE.  */
-   if (loop_label)
-     {
-        emit_label (loop_label);
-        LABEL_NUSES (loop_label) = 1;
-     }
- 
-   /* Copy first desired_align bytes.  */
-   if (!issetmem)
-     srcmem = change_address (srcmem, mode, *srcptr);
-   destmem = change_address (destmem, mode, *destptr);
-   modesize = GEN_INT (GET_MODE_SIZE (mode));
-   for (n = 0; prolog_size < desired_align - align; n++)
-     {
-       if (issetmem)
-         emit_move_insn (destmem, mode_value);
-       else
- 	{
-           emit_move_insn (destmem, srcmem);
-           srcmem = offset_address (srcmem, modesize, GET_MODE_SIZE (mode));
- 	}
-       destmem = offset_address (destmem, modesize, GET_MODE_SIZE (mode));
-       prolog_size += GET_MODE_SIZE (mode);
-     }
- 
- 
-   /* Copy last SIZE bytes.  */
-   destmem = offset_address (destmem, *count, 1);
-   destmem = offset_address (destmem,
- 			    GEN_INT (-size - prolog_size),
- 			    1);
-   if (issetmem)
-     emit_move_insn (destmem, mode_value);
-   else
-     {
-       srcmem = offset_address (srcmem, *count, 1);
-       srcmem = offset_address (srcmem,
- 			       GEN_INT (-size - prolog_size),
- 			       1);
-       emit_move_insn (destmem, srcmem);
-     }
-   for (n = 1; n * GET_MODE_SIZE (mode) < size; n++)
-     {
-       destmem = offset_address (destmem, modesize, 1);
-       if (issetmem)
- 	emit_move_insn (destmem, mode_value);
-       else
- 	{
-           srcmem = offset_address (srcmem, modesize, 1);
-           emit_move_insn (destmem, srcmem);
- 	}
-     }
- 
-   /* Align destination.  */
-   if (desired_align > 1 && desired_align > align)
-     {
-       rtx saveddest = *destptr;
- 
-       gcc_assert (desired_align <= size);
-       /* Align destptr up, place it to new register.  */
-       *destptr = expand_simple_binop (GET_MODE (*destptr), PLUS, *destptr,
- 				      GEN_INT (prolog_size),
- 				      NULL_RTX, 1, OPTAB_DIRECT);
-       if (REG_P (*destptr) && REG_P (saveddest) && REG_POINTER (saveddest))
- 	REG_POINTER (*destptr) = 1;
-       *destptr = expand_simple_binop (GET_MODE (*destptr), AND, *destptr,
- 				      GEN_INT (-desired_align),
- 				      *destptr, 1, OPTAB_DIRECT);
-       /* See how many bytes we skipped.  */
-       saveddest = expand_simple_binop (GET_MODE (*destptr), MINUS, saveddest,
- 				       *destptr,
- 				       saveddest, 1, OPTAB_DIRECT);
-       /* Adjust srcptr and count.  */
-       if (!issetmem)
- 	*srcptr = expand_simple_binop (GET_MODE (*srcptr), MINUS, *srcptr,
- 				       saveddest, *srcptr, 1, OPTAB_DIRECT);
-       *count = expand_simple_binop (GET_MODE (*count), PLUS, *count,
- 				    saveddest, *count, 1, OPTAB_DIRECT);
-       /* We copied at most size + prolog_size.  */
-       if (*min_size > (unsigned HOST_WIDE_INT)(size + prolog_size))
- 	*min_size
- 	  = ROUND_DOWN (*min_size - size, (unsigned HOST_WIDE_INT)size);
-       else
- 	*min_size = 0;
- 
-       /* Our loops always round down the block size, but for dispatch to
-          library we need precise value.  */
-       if (dynamic_check)
- 	*count = expand_simple_binop (GET_MODE (*count), AND, *count,
- 				      GEN_INT (-size), *count, 1, OPTAB_DIRECT);
-     }
-   else
-     {
-       gcc_assert (prolog_size == 0);
-       /* Decrease count, so we won't end up copying last word twice.  */
-       if (!CONST_INT_P (*count))
- 	*count = expand_simple_binop (GET_MODE (*count), PLUS, *count,
- 				      constm1_rtx, *count, 1, OPTAB_DIRECT);
-       else
- 	*count = GEN_INT (ROUND_DOWN (UINTVAL (*count) - 1,
- 				      (unsigned HOST_WIDE_INT)size));
-       if (*min_size)
- 	*min_size = ROUND_DOWN (*min_size - 1, (unsigned HOST_WIDE_INT)size);
-     }
- }
- 
- 
- /* This function is like the previous one, except here we know how many bytes
-    need to be copied.  That allows us to update alignment not only of DST, which
-    is returned, but also of SRC, which is passed as a pointer for that
-    reason.  */
- static rtx
- expand_set_or_movmem_constant_prologue (rtx dst, rtx *srcp, rtx destreg,
- 					   rtx srcreg, rtx value, rtx vec_value,
- 					   int desired_align, int align_bytes,
- 					   bool issetmem)
- {
-   rtx src = NULL;
-   rtx orig_dst = dst;
-   rtx orig_src = NULL;
-   int piece_size = 1;
-   int copied_bytes = 0;
- 
-   if (!issetmem)
-     {
-       gcc_assert (srcp != NULL);
-       src = *srcp;
-       orig_src = src;
-     }
- 
-   for (piece_size = 1;
-        piece_size <= desired_align && copied_bytes < align_bytes;
-        piece_size <<= 1)
-     {
-       if (align_bytes & piece_size)
- 	{
- 	  if (issetmem)
- 	    {
- 	      if (vec_value && piece_size > GET_MODE_SIZE (GET_MODE (value)))
- 		dst = emit_memset (dst, destreg, vec_value, piece_size);
- 	      else
- 		dst = emit_memset (dst, destreg, value, piece_size);
- 	    }
- 	  else
- 	    dst = emit_memmov (dst, &src, destreg, srcreg, piece_size);
- 	  copied_bytes += piece_size;
- 	}
-     }
-   if (MEM_ALIGN (dst) < (unsigned int) desired_align * BITS_PER_UNIT)
-     set_mem_align (dst, desired_align * BITS_PER_UNIT);
-   if (MEM_SIZE_KNOWN_P (orig_dst))
-     set_mem_size (dst, MEM_SIZE (orig_dst) - align_bytes);
- 
-   if (!issetmem)
-     {
-       int src_align_bytes = get_mem_align_offset (src, desired_align
- 						       * BITS_PER_UNIT);
-       if (src_align_bytes >= 0)
- 	src_align_bytes = desired_align - src_align_bytes;
-       if (src_align_bytes >= 0)
- 	{
- 	  unsigned int src_align;
- 	  for (src_align = desired_align; src_align >= 2; src_align >>= 1)
- 	    {
- 	      if ((src_align_bytes & (src_align - 1))
- 		   == (align_bytes & (src_align - 1)))
- 		break;
- 	    }
- 	  if (src_align > (unsigned int) desired_align)
- 	    src_align = desired_align;
- 	  if (MEM_ALIGN (src) < src_align * BITS_PER_UNIT)
- 	    set_mem_align (src, src_align * BITS_PER_UNIT);
- 	}
-       if (MEM_SIZE_KNOWN_P (orig_src))
- 	set_mem_size (src, MEM_SIZE (orig_src) - align_bytes);
-       *srcp = src;
-     }
- 
-   return dst;
- }
- 
- /* Return true if ALG can be used in current context.  
-    Assume we expand memset if MEMSET is true.  */
- static bool
- alg_usable_p (enum stringop_alg alg, bool memset, bool have_as)
- {
-   if (alg == no_stringop)
-     return false;
-   if (alg == vector_loop)
-     return TARGET_SSE || TARGET_AVX;
-   /* Algorithms using the rep prefix want at least edi and ecx;
-      additionally, memset wants eax and memcpy wants esi.  Don't
-      consider such algorithms if the user has appropriated those
-      registers for their own purposes, or if we have a non-default
-      address space, since some string insns cannot override the segment.  */
-   if (alg == rep_prefix_1_byte
-       || alg == rep_prefix_4_byte
-       || alg == rep_prefix_8_byte)
-     {
-       if (have_as)
- 	return false;
-       if (fixed_regs[CX_REG]
- 	  || fixed_regs[DI_REG]
- 	  || (memset ? fixed_regs[AX_REG] : fixed_regs[SI_REG]))
- 	return false;
-     }
-   return true;
- }
- 
- /* Given COUNT and EXPECTED_SIZE, decide on codegen of string operation.  */
- static enum stringop_alg
- decide_alg (HOST_WIDE_INT count, HOST_WIDE_INT expected_size,
- 	    unsigned HOST_WIDE_INT min_size, unsigned HOST_WIDE_INT max_size,
- 	    bool memset, bool zero_memset, bool have_as,
- 	    int *dynamic_check, bool *noalign, bool recur)
- {
-   const struct stringop_algs *algs;
-   bool optimize_for_speed;
-   int max = 0;
-   const struct processor_costs *cost;
-   int i;
-   bool any_alg_usable_p = false;
- 
-   *noalign = false;
-   *dynamic_check = -1;
- 
-   /* Even if the string operation call is cold, we still might spend a lot
-      of time processing large blocks.  */
-   if (optimize_function_for_size_p (cfun)
-       || (optimize_insn_for_size_p ()
-  	  && (max_size < 256
-               || (expected_size != -1 && expected_size < 256))))
-     optimize_for_speed = false;
-   else
-     optimize_for_speed = true;
- 
-   cost = optimize_for_speed ? ix86_cost : &ix86_size_cost;
-   if (memset)
-     algs = &cost->memset[TARGET_64BIT != 0];
-   else
-     algs = &cost->memcpy[TARGET_64BIT != 0];
- 
-   /* See maximal size for user defined algorithm.  */
-   for (i = 0; i < MAX_STRINGOP_ALGS; i++)
-     {
-       enum stringop_alg candidate = algs->size[i].alg;
-       bool usable = alg_usable_p (candidate, memset, have_as);
-       any_alg_usable_p |= usable;
- 
-       if (candidate != libcall && candidate && usable)
- 	max = algs->size[i].max;
-     }
- 
-   /* If expected size is not known but max size is small enough
-      so inline version is a win, set expected size into
-      the range.  */
-   if (((max > 1 && (unsigned HOST_WIDE_INT) max >= max_size) || max == -1)
-       && expected_size == -1)
-     expected_size = min_size / 2 + max_size / 2;
- 
-   /* If user specified the algorithm, honor it if possible.  */
-   if (ix86_stringop_alg != no_stringop
-       && alg_usable_p (ix86_stringop_alg, memset, have_as))
-     return ix86_stringop_alg;
-   /* rep; movq or rep; movl is the smallest variant.  */
-   else if (!optimize_for_speed)
-     {
-       *noalign = true;
-       if (!count || (count & 3) || (memset && !zero_memset))
- 	return alg_usable_p (rep_prefix_1_byte, memset, have_as)
- 	       ? rep_prefix_1_byte : loop_1_byte;
-       else
- 	return alg_usable_p (rep_prefix_4_byte, memset, have_as)
- 	       ? rep_prefix_4_byte : loop;
-     }
-   /* Very tiny blocks are best handled via the loop, REP is expensive to
-      setup.  */
-   else if (expected_size != -1 && expected_size < 4)
-     return loop_1_byte;
-   else if (expected_size != -1)
-     {
-       enum stringop_alg alg = libcall;
-       bool alg_noalign = false;
-       for (i = 0; i < MAX_STRINGOP_ALGS; i++)
- 	{
- 	  /* We get here if the algorithms that were not libcall-based
- 	     were rep-prefix based and we are unable to use rep prefixes
- 	     based on global register usage.  Break out of the loop and
- 	     use the heuristic below.  */
- 	  if (algs->size[i].max == 0)
- 	    break;
- 	  if (algs->size[i].max >= expected_size || algs->size[i].max == -1)
- 	    {
- 	      enum stringop_alg candidate = algs->size[i].alg;
- 
- 	      if (candidate != libcall
- 		  && alg_usable_p (candidate, memset, have_as))
- 		{
- 		  alg = candidate;
- 		  alg_noalign = algs->size[i].noalign;
- 		}
- 	      /* Honor TARGET_INLINE_ALL_STRINGOPS by picking
- 		 last non-libcall inline algorithm.  */
- 	      if (TARGET_INLINE_ALL_STRINGOPS)
- 		{
- 		  /* When the current size is best to be copied by a libcall,
- 		     but we are still forced to inline, run the heuristic below
- 		     that will pick code for medium sized blocks.  */
- 		  if (alg != libcall)
- 		    {
- 		      *noalign = alg_noalign;
- 		      return alg;
- 		    }
- 		  else if (!any_alg_usable_p)
- 		    break;
- 		}
- 	      else if (alg_usable_p (candidate, memset, have_as))
- 		{
- 		  *noalign = algs->size[i].noalign;
- 		  return candidate;
- 		}
- 	    }
- 	}
-     }
-   /* When asked to inline the call anyway, try to pick meaningful choice.
-      We look for maximal size of block that is faster to copy by hand and
-      take blocks of at most of that size guessing that average size will
-      be roughly half of the block.
- 
-      If this turns out to be bad, we might simply specify the preferred
-      choice in ix86_costs.  */
-   if ((TARGET_INLINE_ALL_STRINGOPS || TARGET_INLINE_STRINGOPS_DYNAMICALLY)
-       && (algs->unknown_size == libcall
- 	  || !alg_usable_p (algs->unknown_size, memset, have_as)))
-     {
-       enum stringop_alg alg;
-       HOST_WIDE_INT new_expected_size = (max > 0 ? max : 4096) / 2;
- 
-       /* If there aren't any usable algorithms or if recursing already,
- 	 then recursing on smaller sizes or same size isn't going to
- 	 find anything.  Just return the simple byte-at-a-time copy loop.  */
-       if (!any_alg_usable_p || recur)
- 	{
- 	  /* Pick something reasonable.  */
- 	  if (TARGET_INLINE_STRINGOPS_DYNAMICALLY && !recur)
- 	    *dynamic_check = 128;
- 	  return loop_1_byte;
- 	}
-       alg = decide_alg (count, new_expected_size, min_size, max_size, memset,
- 			zero_memset, have_as, dynamic_check, noalign, true);
-       gcc_assert (*dynamic_check == -1);
-       if (TARGET_INLINE_STRINGOPS_DYNAMICALLY)
- 	*dynamic_check = max;
-       else
- 	gcc_assert (alg != libcall);
-       return alg;
-     }
-   return (alg_usable_p (algs->unknown_size, memset, have_as)
- 	  ? algs->unknown_size : libcall);
- }
- 
- /* Decide on alignment.  We know that the operand is already aligned to ALIGN
-    (ALIGN can be based on profile feedback and thus it is not 100% guaranteed).  */
- static int
- decide_alignment (int align,
- 		  enum stringop_alg alg,
- 		  int expected_size,
- 		  machine_mode move_mode)
- {
-   int desired_align = 0;
- 
-   gcc_assert (alg != no_stringop);
- 
-   if (alg == libcall)
-     return 0;
-   if (move_mode == VOIDmode)
-     return 0;
- 
-   desired_align = GET_MODE_SIZE (move_mode);
-   /* PentiumPro has special logic triggering for 8 byte aligned blocks.
-      copying whole cacheline at once.  */
-   if (TARGET_PENTIUMPRO
-       && (alg == rep_prefix_4_byte || alg == rep_prefix_1_byte))
-     desired_align = 8;
- 
-   if (optimize_size)
-     desired_align = 1;
-   if (desired_align < align)
-     desired_align = align;
-   if (expected_size != -1 && expected_size < 4)
-     desired_align = align;
- 
-   return desired_align;
- }
- 
- 
- /* Helper function for memcpy.  For QImode value 0xXY produce
-    0xXYXYXYXY of wide specified by MODE.  This is essentially
-    a * 0x10101010, but we can do slightly better than
-    synth_mult by unwinding the sequence by hand on CPUs with
-    slow multiply.  */
- static rtx
- promote_duplicated_reg (machine_mode mode, rtx val)
- {
-   machine_mode valmode = GET_MODE (val);
-   rtx tmp;
-   int nops = mode == DImode ? 3 : 2;
- 
-   gcc_assert (mode == SImode || mode == DImode || val == const0_rtx);
-   if (val == const0_rtx)
-     return copy_to_mode_reg (mode, CONST0_RTX (mode));
-   if (CONST_INT_P (val))
-     {
-       HOST_WIDE_INT v = INTVAL (val) & 255;
- 
-       v |= v << 8;
-       v |= v << 16;
-       if (mode == DImode)
-         v |= (v << 16) << 16;
-       return copy_to_mode_reg (mode, gen_int_mode (v, mode));
-     }
- 
-   if (valmode == VOIDmode)
-     valmode = QImode;
-   if (valmode != QImode)
-     val = gen_lowpart (QImode, val);
-   if (mode == QImode)
-     return val;
-   if (!TARGET_PARTIAL_REG_STALL)
-     nops--;
-   if (ix86_cost->mult_init[mode == DImode ? 3 : 2]
-       + ix86_cost->mult_bit * (mode == DImode ? 8 : 4)
-       <= (ix86_cost->shift_const + ix86_cost->add) * nops
-           + (COSTS_N_INSNS (TARGET_PARTIAL_REG_STALL == 0)))
-     {
-       rtx reg = convert_modes (mode, QImode, val, true);
-       tmp = promote_duplicated_reg (mode, const1_rtx);
-       return expand_simple_binop (mode, MULT, reg, tmp, NULL, 1,
- 				  OPTAB_DIRECT);
-     }
-   else
-     {
-       rtx reg = convert_modes (mode, QImode, val, true);
- 
-       if (!TARGET_PARTIAL_REG_STALL)
- 	if (mode == SImode)
- 	  emit_insn (gen_insvsi_1 (reg, reg));
- 	else
- 	  emit_insn (gen_insvdi_1 (reg, reg));
-       else
- 	{
- 	  tmp = expand_simple_binop (mode, ASHIFT, reg, GEN_INT (8),
- 				     NULL, 1, OPTAB_DIRECT);
- 	  reg = expand_simple_binop (mode, IOR, reg, tmp, reg, 1,
- 				     OPTAB_DIRECT);
- 	}
-       tmp = expand_simple_binop (mode, ASHIFT, reg, GEN_INT (16),
- 			         NULL, 1, OPTAB_DIRECT);
-       reg = expand_simple_binop (mode, IOR, reg, tmp, reg, 1, OPTAB_DIRECT);
-       if (mode == SImode)
- 	return reg;
-       tmp = expand_simple_binop (mode, ASHIFT, reg, GEN_INT (32),
- 				 NULL, 1, OPTAB_DIRECT);
-       reg = expand_simple_binop (mode, IOR, reg, tmp, reg, 1, OPTAB_DIRECT);
-       return reg;
-     }
- }
- 
- /* Duplicate value VAL using promote_duplicated_reg into maximal size that will
-    be needed by main loop copying SIZE_NEEDED chunks and prologue getting
-    alignment from ALIGN to DESIRED_ALIGN.  */
- static rtx
- promote_duplicated_reg_to_size (rtx val, int size_needed, int desired_align,
- 				int align)
- {
-   rtx promoted_val;
- 
-   if (TARGET_64BIT
-       && (size_needed > 4 || (desired_align > align && desired_align > 4)))
-     promoted_val = promote_duplicated_reg (DImode, val);
-   else if (size_needed > 2 || (desired_align > align && desired_align > 2))
-     promoted_val = promote_duplicated_reg (SImode, val);
-   else if (size_needed > 1 || (desired_align > align && desired_align > 1))
-     promoted_val = promote_duplicated_reg (HImode, val);
-   else
-     promoted_val = val;
- 
-   return promoted_val;
- }
- 
- /* Expand string move (memcpy) ot store (memset) operation.  Use i386 string
-    operations when profitable.  The code depends upon architecture, block size
-    and alignment, but always has one of the following overall structures:
- 
-    Aligned move sequence:
- 
-      1) Prologue guard: Conditional that jumps up to epilogues for small
- 	blocks that can be handled by epilogue alone.  This is faster
- 	but also needed for correctness, since prologue assume the block
- 	is larger than the desired alignment.
- 
- 	Optional dynamic check for size and libcall for large
- 	blocks is emitted here too, with -minline-stringops-dynamically.
- 
-      2) Prologue: copy first few bytes in order to get destination
- 	aligned to DESIRED_ALIGN.  It is emitted only when ALIGN is less
- 	than DESIRED_ALIGN and up to DESIRED_ALIGN - ALIGN bytes can be
- 	copied.  We emit either a jump tree on power of two sized
- 	blocks, or a byte loop.
- 
-      3) Main body: the copying loop itself, copying in SIZE_NEEDED chunks
- 	with specified algorithm.
- 
-      4) Epilogue: code copying tail of the block that is too small to be
- 	handled by main body (or up to size guarded by prologue guard). 
- 
-   Misaligned move sequence
- 
-      1) missaligned move prologue/epilogue containing:
-         a) Prologue handling small memory blocks and jumping to done_label
- 	   (skipped if blocks are known to be large enough)
- 	b) Signle move copying first DESIRED_ALIGN-ALIGN bytes if alignment is
-            needed by single possibly misaligned move
- 	   (skipped if alignment is not needed)
-         c) Copy of last SIZE_NEEDED bytes by possibly misaligned moves
- 
-      2) Zero size guard dispatching to done_label, if needed
- 
-      3) dispatch to library call, if needed,
- 
-      3) Main body: the copying loop itself, copying in SIZE_NEEDED chunks
- 	with specified algorithm.  */
- bool
- ix86_expand_set_or_movmem (rtx dst, rtx src, rtx count_exp, rtx val_exp,
- 			   rtx align_exp, rtx expected_align_exp,
- 			   rtx expected_size_exp, rtx min_size_exp,
- 			   rtx max_size_exp, rtx probable_max_size_exp,
- 			   bool issetmem)
- {
-   rtx destreg;
-   rtx srcreg = NULL;
-   rtx_code_label *label = NULL;
-   rtx tmp;
-   rtx_code_label *jump_around_label = NULL;
-   HOST_WIDE_INT align = 1;
-   unsigned HOST_WIDE_INT count = 0;
-   HOST_WIDE_INT expected_size = -1;
-   int size_needed = 0, epilogue_size_needed;
-   int desired_align = 0, align_bytes = 0;
-   enum stringop_alg alg;
-   rtx promoted_val = NULL;
-   rtx vec_promoted_val = NULL;
-   bool force_loopy_epilogue = false;
-   int dynamic_check;
-   bool need_zero_guard = false;
-   bool noalign;
-   machine_mode move_mode = VOIDmode;
-   machine_mode wider_mode;
-   int unroll_factor = 1;
-   /* TODO: Once value ranges are available, fill in proper data.  */
-   unsigned HOST_WIDE_INT min_size = 0;
-   unsigned HOST_WIDE_INT max_size = -1;
-   unsigned HOST_WIDE_INT probable_max_size = -1;
-   bool misaligned_prologue_used = false;
-   bool have_as;
- 
-   if (CONST_INT_P (align_exp))
-     align = INTVAL (align_exp);
-   /* i386 can do misaligned access on reasonably increased cost.  */
-   if (CONST_INT_P (expected_align_exp)
-       && INTVAL (expected_align_exp) > align)
-     align = INTVAL (expected_align_exp);
-   /* ALIGN is the minimum of destination and source alignment, but we care here
-      just about destination alignment.  */
-   else if (!issetmem
- 	   && MEM_ALIGN (dst) > (unsigned HOST_WIDE_INT) align * BITS_PER_UNIT)
-     align = MEM_ALIGN (dst) / BITS_PER_UNIT;
- 
-   if (CONST_INT_P (count_exp))
-     {
-       min_size = max_size = probable_max_size = count = expected_size
- 	= INTVAL (count_exp);
-       /* When COUNT is 0, there is nothing to do.  */
-       if (!count)
- 	return true;
-     }
-   else
-     {
-       if (min_size_exp)
- 	min_size = INTVAL (min_size_exp);
-       if (max_size_exp)
- 	max_size = INTVAL (max_size_exp);
-       if (probable_max_size_exp)
- 	probable_max_size = INTVAL (probable_max_size_exp);
-       if (CONST_INT_P (expected_size_exp))
- 	expected_size = INTVAL (expected_size_exp);
-      }
- 
-   /* Make sure we don't need to care about overflow later on.  */
-   if (count > (HOST_WIDE_INT_1U << 30))
-     return false;
- 
-   have_as = !ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (dst));
-   if (!issetmem)
-     have_as |= !ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (src));
- 
-   /* Step 0: Decide on preferred algorithm, desired alignment and
-      size of chunks to be copied by main loop.  */
-   alg = decide_alg (count, expected_size, min_size, probable_max_size,
- 		    issetmem,
- 		    issetmem && val_exp == const0_rtx, have_as,
- 		    &dynamic_check, &noalign, false);
- 
-   if (dump_file)
-     fprintf (dump_file, "Selected stringop expansion strategy: %s\n",
- 	     stringop_alg_names[alg]);
- 
-   if (alg == libcall)
-     return false;
-   gcc_assert (alg != no_stringop);
- 
-   /* For now vector-version of memset is generated only for memory zeroing, as
-      creating of promoted vector value is very cheap in this case.  */
-   if (issetmem && alg == vector_loop && val_exp != const0_rtx)
-     alg = unrolled_loop;
- 
-   if (!count)
-     count_exp = copy_to_mode_reg (GET_MODE (count_exp), count_exp);
-   destreg = ix86_copy_addr_to_reg (XEXP (dst, 0));
-   if (!issetmem)
-     srcreg = ix86_copy_addr_to_reg (XEXP (src, 0));
- 
-   unroll_factor = 1;
-   move_mode = word_mode;
-   switch (alg)
-     {
-     case libcall:
-     case no_stringop:
-     case last_alg:
-       gcc_unreachable ();
-     case loop_1_byte:
-       need_zero_guard = true;
-       move_mode = QImode;
-       break;
-     case loop:
-       need_zero_guard = true;
-       break;
-     case unrolled_loop:
-       need_zero_guard = true;
-       unroll_factor = (TARGET_64BIT ? 4 : 2);
-       break;
-     case vector_loop:
-       need_zero_guard = true;
-       unroll_factor = 4;
-       /* Find the widest supported mode.  */
-       move_mode = word_mode;
-       while (GET_MODE_WIDER_MODE (move_mode).exists (&wider_mode)
- 	     && optab_handler (mov_optab, wider_mode) != CODE_FOR_nothing)
- 	move_mode = wider_mode;
- 
-       if (TARGET_AVX128_OPTIMAL && GET_MODE_BITSIZE (move_mode) > 128)
- 	move_mode = TImode;
- 
-       /* Find the corresponding vector mode with the same size as MOVE_MODE.
- 	 MOVE_MODE is an integer mode at the moment (SI, DI, TI, etc.).  */
-       if (GET_MODE_SIZE (move_mode) > GET_MODE_SIZE (word_mode))
- 	{
- 	  int nunits = GET_MODE_SIZE (move_mode) / GET_MODE_SIZE (word_mode);
- 	  if (!mode_for_vector (word_mode, nunits).exists (&move_mode)
- 	      || optab_handler (mov_optab, move_mode) == CODE_FOR_nothing)
- 	    move_mode = word_mode;
- 	}
-       gcc_assert (optab_handler (mov_optab, move_mode) != CODE_FOR_nothing);
-       break;
-     case rep_prefix_8_byte:
-       move_mode = DImode;
-       break;
-     case rep_prefix_4_byte:
-       move_mode = SImode;
-       break;
-     case rep_prefix_1_byte:
-       move_mode = QImode;
-       break;
-     }
-   size_needed = GET_MODE_SIZE (move_mode) * unroll_factor;
-   epilogue_size_needed = size_needed;
- 
-   /* If we are going to call any library calls conditionally, make sure any
-      pending stack adjustment happen before the first conditional branch,
-      otherwise they will be emitted before the library call only and won't
-      happen from the other branches.  */
-   if (dynamic_check != -1)
-     do_pending_stack_adjust ();
- 
-   desired_align = decide_alignment (align, alg, expected_size, move_mode);
-   if (!TARGET_ALIGN_STRINGOPS || noalign)
-     align = desired_align;
- 
-   /* Step 1: Prologue guard.  */
- 
-   /* Alignment code needs count to be in register.  */
-   if (CONST_INT_P (count_exp) && desired_align > align)
-     {
-       if (INTVAL (count_exp) > desired_align
- 	  && INTVAL (count_exp) > size_needed)
- 	{
- 	  align_bytes
- 	    = get_mem_align_offset (dst, desired_align * BITS_PER_UNIT);
- 	  if (align_bytes <= 0)
- 	    align_bytes = 0;
- 	  else
- 	    align_bytes = desired_align - align_bytes;
- 	}
-       if (align_bytes == 0)
- 	count_exp = force_reg (counter_mode (count_exp), count_exp);
-     }
-   gcc_assert (desired_align >= 1 && align >= 1);
- 
-   /* Misaligned move sequences handle both prologue and epilogue at once.
-      Default code generation results in a smaller code for large alignments
-      and also avoids redundant job when sizes are known precisely.  */
-   misaligned_prologue_used
-     = (TARGET_MISALIGNED_MOVE_STRING_PRO_EPILOGUES
-        && MAX (desired_align, epilogue_size_needed) <= 32
-        && desired_align <= epilogue_size_needed
-        && ((desired_align > align && !align_bytes)
- 	   || (!count && epilogue_size_needed > 1)));
- 
-   /* Do the cheap promotion to allow better CSE across the
-      main loop and epilogue (ie one load of the big constant in the
-      front of all code.  
-      For now the misaligned move sequences do not have fast path
-      without broadcasting.  */
-   if (issetmem && ((CONST_INT_P (val_exp) || misaligned_prologue_used)))
-     {
-       if (alg == vector_loop)
- 	{
- 	  gcc_assert (val_exp == const0_rtx);
- 	  vec_promoted_val = promote_duplicated_reg (move_mode, val_exp);
- 	  promoted_val = promote_duplicated_reg_to_size (val_exp,
- 							 GET_MODE_SIZE (word_mode),
- 							 desired_align, align);
- 	}
-       else
- 	{
- 	  promoted_val = promote_duplicated_reg_to_size (val_exp, size_needed,
- 							 desired_align, align);
- 	}
-     }
-   /* Misaligned move sequences handles both prologues and epilogues at once.
-      Default code generation results in smaller code for large alignments and
-      also avoids redundant job when sizes are known precisely.  */
-   if (misaligned_prologue_used)
-     {
-       /* Misaligned move prologue handled small blocks by itself.  */
-       expand_set_or_movmem_prologue_epilogue_by_misaligned_moves
- 	   (dst, src, &destreg, &srcreg,
- 	    move_mode, promoted_val, vec_promoted_val,
- 	    &count_exp,
- 	    &jump_around_label,
-             desired_align < align
- 	    ? MAX (desired_align, epilogue_size_needed) : epilogue_size_needed,
- 	    desired_align, align, &min_size, dynamic_check, issetmem);
-       if (!issetmem)
-         src = change_address (src, BLKmode, srcreg);
-       dst = change_address (dst, BLKmode, destreg);
-       set_mem_align (dst, desired_align * BITS_PER_UNIT);
-       epilogue_size_needed = 0;
-       if (need_zero_guard
- 	  && min_size < (unsigned HOST_WIDE_INT) size_needed)
- 	{
- 	  /* It is possible that we copied enough so the main loop will not
- 	     execute.  */
- 	  gcc_assert (size_needed > 1);
- 	  if (jump_around_label == NULL_RTX)
- 	    jump_around_label = gen_label_rtx ();
- 	  emit_cmp_and_jump_insns (count_exp,
- 				   GEN_INT (size_needed),
- 				   LTU, 0, counter_mode (count_exp), 1, jump_around_label);
- 	  if (expected_size == -1
- 	      || expected_size < (desired_align - align) / 2 + size_needed)
- 	    predict_jump (REG_BR_PROB_BASE * 20 / 100);
- 	  else
- 	    predict_jump (REG_BR_PROB_BASE * 60 / 100);
- 	}
-     }
-   /* Ensure that alignment prologue won't copy past end of block.  */
-   else if (size_needed > 1 || (desired_align > 1 && desired_align > align))
-     {
-       epilogue_size_needed = MAX (size_needed - 1, desired_align - align);
-       /* Epilogue always copies COUNT_EXP & EPILOGUE_SIZE_NEEDED bytes.
- 	 Make sure it is power of 2.  */
-       epilogue_size_needed = 1 << (floor_log2 (epilogue_size_needed) + 1);
- 
-       /* To improve performance of small blocks, we jump around the VAL
- 	 promoting mode.  This mean that if the promoted VAL is not constant,
- 	 we might not use it in the epilogue and have to use byte
- 	 loop variant.  */
-       if (issetmem && epilogue_size_needed > 2 && !promoted_val)
- 	force_loopy_epilogue = true;
-       if ((count && count < (unsigned HOST_WIDE_INT) epilogue_size_needed)
- 	  || max_size < (unsigned HOST_WIDE_INT) epilogue_size_needed)
- 	{
- 	  /* If main algorithm works on QImode, no epilogue is needed.
- 	     For small sizes just don't align anything.  */
- 	  if (size_needed == 1)
- 	    desired_align = align;
- 	  else
- 	    goto epilogue;
- 	}
-       else if (!count
- 	       && min_size < (unsigned HOST_WIDE_INT) epilogue_size_needed)
- 	{
- 	  label = gen_label_rtx ();
- 	  emit_cmp_and_jump_insns (count_exp,
- 				   GEN_INT (epilogue_size_needed),
- 				   LTU, 0, counter_mode (count_exp), 1, label);
- 	  if (expected_size == -1 || expected_size < epilogue_size_needed)
- 	    predict_jump (REG_BR_PROB_BASE * 60 / 100);
- 	  else
- 	    predict_jump (REG_BR_PROB_BASE * 20 / 100);
- 	}
-     }
- 
-   /* Emit code to decide on runtime whether library call or inline should be
-      used.  */
-   if (dynamic_check != -1)
-     {
-       if (!issetmem && CONST_INT_P (count_exp))
- 	{
- 	  if (UINTVAL (count_exp) >= (unsigned HOST_WIDE_INT)dynamic_check)
- 	    {
- 	      emit_block_copy_via_libcall (dst, src, count_exp);
- 	      count_exp = const0_rtx;
- 	      goto epilogue;
- 	    }
- 	}
-       else
- 	{
- 	  rtx_code_label *hot_label = gen_label_rtx ();
- 	  if (jump_around_label == NULL_RTX)
- 	    jump_around_label = gen_label_rtx ();
- 	  emit_cmp_and_jump_insns (count_exp, GEN_INT (dynamic_check - 1),
- 				   LEU, 0, counter_mode (count_exp),
- 				   1, hot_label);
- 	  predict_jump (REG_BR_PROB_BASE * 90 / 100);
- 	  if (issetmem)
- 	    set_storage_via_libcall (dst, count_exp, val_exp);
- 	  else
- 	    emit_block_copy_via_libcall (dst, src, count_exp);
- 	  emit_jump (jump_around_label);
- 	  emit_label (hot_label);
- 	}
-     }
- 
-   /* Step 2: Alignment prologue.  */
-   /* Do the expensive promotion once we branched off the small blocks.  */
-   if (issetmem && !promoted_val)
-     promoted_val = promote_duplicated_reg_to_size (val_exp, size_needed,
- 						   desired_align, align);
- 
-   if (desired_align > align && !misaligned_prologue_used)
-     {
-       if (align_bytes == 0)
- 	{
- 	  /* Except for the first move in prologue, we no longer know
- 	     constant offset in aliasing info.  It don't seems to worth
- 	     the pain to maintain it for the first move, so throw away
- 	     the info early.  */
- 	  dst = change_address (dst, BLKmode, destreg);
- 	  if (!issetmem)
- 	    src = change_address (src, BLKmode, srcreg);
- 	  dst = expand_set_or_movmem_prologue (dst, src, destreg, srcreg,
- 					    promoted_val, vec_promoted_val,
- 					    count_exp, align, desired_align,
- 					    issetmem);
- 	  /* At most desired_align - align bytes are copied.  */
- 	  if (min_size < (unsigned)(desired_align - align))
- 	    min_size = 0;
- 	  else
- 	    min_size -= desired_align - align;
- 	}
-       else
- 	{
- 	  /* If we know how many bytes need to be stored before dst is
- 	     sufficiently aligned, maintain aliasing info accurately.  */
- 	  dst = expand_set_or_movmem_constant_prologue (dst, &src, destreg,
- 							   srcreg,
- 							   promoted_val,
- 							   vec_promoted_val,
- 							   desired_align,
- 							   align_bytes,
- 							   issetmem);
- 
- 	  count_exp = plus_constant (counter_mode (count_exp),
- 				     count_exp, -align_bytes);
- 	  count -= align_bytes;
- 	  min_size -= align_bytes;
- 	  max_size -= align_bytes;
- 	}
-       if (need_zero_guard
- 	  && min_size < (unsigned HOST_WIDE_INT) size_needed
- 	  && (count < (unsigned HOST_WIDE_INT) size_needed
- 	      || (align_bytes == 0
- 		  && count < ((unsigned HOST_WIDE_INT) size_needed
- 			      + desired_align - align))))
- 	{
- 	  /* It is possible that we copied enough so the main loop will not
- 	     execute.  */
- 	  gcc_assert (size_needed > 1);
- 	  if (label == NULL_RTX)
- 	    label = gen_label_rtx ();
- 	  emit_cmp_and_jump_insns (count_exp,
- 				   GEN_INT (size_needed),
- 				   LTU, 0, counter_mode (count_exp), 1, label);
- 	  if (expected_size == -1
- 	      || expected_size < (desired_align - align) / 2 + size_needed)
- 	    predict_jump (REG_BR_PROB_BASE * 20 / 100);
- 	  else
- 	    predict_jump (REG_BR_PROB_BASE * 60 / 100);
- 	}
-     }
-   if (label && size_needed == 1)
-     {
-       emit_label (label);
-       LABEL_NUSES (label) = 1;
-       label = NULL;
-       epilogue_size_needed = 1;
-       if (issetmem)
- 	promoted_val = val_exp;
-     }
-   else if (label == NULL_RTX && !misaligned_prologue_used)
-     epilogue_size_needed = size_needed;
- 
-   /* Step 3: Main loop.  */
- 
-   switch (alg)
-     {
-     case libcall:
-     case no_stringop:
-     case last_alg:
-       gcc_unreachable ();
-     case loop_1_byte:
-     case loop:
-     case unrolled_loop:
-       expand_set_or_movmem_via_loop (dst, src, destreg, srcreg, promoted_val,
- 				     count_exp, move_mode, unroll_factor,
- 				     expected_size, issetmem);
-       break;
-     case vector_loop:
-       expand_set_or_movmem_via_loop (dst, src, destreg, srcreg,
- 				     vec_promoted_val, count_exp, move_mode,
- 				     unroll_factor, expected_size, issetmem);
-       break;
-     case rep_prefix_8_byte:
-     case rep_prefix_4_byte:
-     case rep_prefix_1_byte:
-       expand_set_or_movmem_via_rep (dst, src, destreg, srcreg, promoted_val,
- 				       val_exp, count_exp, move_mode, issetmem);
-       break;
-     }
-   /* Adjust properly the offset of src and dest memory for aliasing.  */
-   if (CONST_INT_P (count_exp))
-     {
-       if (!issetmem)
- 	src = adjust_automodify_address_nv (src, BLKmode, srcreg,
- 					    (count / size_needed) * size_needed);
-       dst = adjust_automodify_address_nv (dst, BLKmode, destreg,
- 					  (count / size_needed) * size_needed);
-     }
-   else
-     {
-       if (!issetmem)
- 	src = change_address (src, BLKmode, srcreg);
-       dst = change_address (dst, BLKmode, destreg);
-     }
- 
-   /* Step 4: Epilogue to copy the remaining bytes.  */
-  epilogue:
-   if (label)
-     {
-       /* When the main loop is done, COUNT_EXP might hold original count,
- 	 while we want to copy only COUNT_EXP & SIZE_NEEDED bytes.
- 	 Epilogue code will actually copy COUNT_EXP & EPILOGUE_SIZE_NEEDED
- 	 bytes. Compensate if needed.  */
- 
-       if (size_needed < epilogue_size_needed)
- 	{
- 	  tmp = expand_simple_binop (counter_mode (count_exp), AND, count_exp,
- 				     GEN_INT (size_needed - 1), count_exp, 1,
- 				     OPTAB_DIRECT);
- 	  if (tmp != count_exp)
- 	    emit_move_insn (count_exp, tmp);
- 	}
-       emit_label (label);
-       LABEL_NUSES (label) = 1;
-     }
- 
-   if (count_exp != const0_rtx && epilogue_size_needed > 1)
-     {
-       if (force_loopy_epilogue)
- 	expand_setmem_epilogue_via_loop (dst, destreg, val_exp, count_exp,
- 					 epilogue_size_needed);
-       else
- 	{
- 	  if (issetmem)
- 	    expand_setmem_epilogue (dst, destreg, promoted_val,
- 				    vec_promoted_val, count_exp,
- 				    epilogue_size_needed);
- 	  else
- 	    expand_movmem_epilogue (dst, src, destreg, srcreg, count_exp,
- 				    epilogue_size_needed);
- 	}
-     }
-   if (jump_around_label)
-     emit_label (jump_around_label);
-   return true;
- }
- 
- 
- /* Expand the appropriate insns for doing strlen if not just doing
-    repnz; scasb
- 
-    out = result, initialized with the start address
-    align_rtx = alignment of the address.
-    scratch = scratch register, initialized with the startaddress when
- 	not aligned, otherwise undefined
- 
-    This is just the body. It needs the initializations mentioned above and
-    some address computing at the end.  These things are done in i386.md.  */
- 
- static void
- ix86_expand_strlensi_unroll_1 (rtx out, rtx src, rtx align_rtx)
- {
-   int align;
-   rtx tmp;
-   rtx_code_label *align_2_label = NULL;
-   rtx_code_label *align_3_label = NULL;
-   rtx_code_label *align_4_label = gen_label_rtx ();
-   rtx_code_label *end_0_label = gen_label_rtx ();
-   rtx mem;
-   rtx tmpreg = gen_reg_rtx (SImode);
-   rtx scratch = gen_reg_rtx (SImode);
-   rtx cmp;
- 
-   align = 0;
-   if (CONST_INT_P (align_rtx))
-     align = INTVAL (align_rtx);
- 
-   /* Loop to check 1..3 bytes for null to get an aligned pointer.  */
- 
-   /* Is there a known alignment and is it less than 4?  */
-   if (align < 4)
-     {
-       rtx scratch1 = gen_reg_rtx (Pmode);
-       emit_move_insn (scratch1, out);
-       /* Is there a known alignment and is it not 2? */
-       if (align != 2)
- 	{
- 	  align_3_label = gen_label_rtx (); /* Label when aligned to 3-byte */
- 	  align_2_label = gen_label_rtx (); /* Label when aligned to 2-byte */
- 
- 	  /* Leave just the 3 lower bits.  */
- 	  align_rtx = expand_binop (Pmode, and_optab, scratch1, GEN_INT (3),
- 				    NULL_RTX, 0, OPTAB_WIDEN);
- 
- 	  emit_cmp_and_jump_insns (align_rtx, const0_rtx, EQ, NULL,
- 				   Pmode, 1, align_4_label);
- 	  emit_cmp_and_jump_insns (align_rtx, const2_rtx, EQ, NULL,
- 				   Pmode, 1, align_2_label);
- 	  emit_cmp_and_jump_insns (align_rtx, const2_rtx, GTU, NULL,
- 				   Pmode, 1, align_3_label);
- 	}
-       else
-         {
- 	  /* Since the alignment is 2, we have to check 2 or 0 bytes;
- 	     check if is aligned to 4 - byte.  */
- 
- 	  align_rtx = expand_binop (Pmode, and_optab, scratch1, const2_rtx,
- 				    NULL_RTX, 0, OPTAB_WIDEN);
- 
- 	  emit_cmp_and_jump_insns (align_rtx, const0_rtx, EQ, NULL,
- 				   Pmode, 1, align_4_label);
-         }
- 
-       mem = change_address (src, QImode, out);
- 
-       /* Now compare the bytes.  */
- 
-       /* Compare the first n unaligned byte on a byte per byte basis.  */
-       emit_cmp_and_jump_insns (mem, const0_rtx, EQ, NULL,
- 			       QImode, 1, end_0_label);
- 
-       /* Increment the address.  */
-       emit_insn (ix86_gen_add3 (out, out, const1_rtx));
- 
-       /* Not needed with an alignment of 2 */
-       if (align != 2)
- 	{
- 	  emit_label (align_2_label);
- 
- 	  emit_cmp_and_jump_insns (mem, const0_rtx, EQ, NULL, QImode, 1,
- 				   end_0_label);
- 
- 	  emit_insn (ix86_gen_add3 (out, out, const1_rtx));
- 
- 	  emit_label (align_3_label);
- 	}
- 
-       emit_cmp_and_jump_insns (mem, const0_rtx, EQ, NULL, QImode, 1,
- 			       end_0_label);
- 
-       emit_insn (ix86_gen_add3 (out, out, const1_rtx));
-     }
- 
-   /* Generate loop to check 4 bytes at a time.  It is not a good idea to
-      align this loop.  It gives only huge programs, but does not help to
-      speed up.  */
-   emit_label (align_4_label);
- 
-   mem = change_address (src, SImode, out);
-   emit_move_insn (scratch, mem);
-   emit_insn (ix86_gen_add3 (out, out, GEN_INT (4)));
- 
-   /* This formula yields a nonzero result iff one of the bytes is zero.
-      This saves three branches inside loop and many cycles.  */
- 
-   emit_insn (gen_addsi3 (tmpreg, scratch, GEN_INT (-0x01010101)));
-   emit_insn (gen_one_cmplsi2 (scratch, scratch));
-   emit_insn (gen_andsi3 (tmpreg, tmpreg, scratch));
-   emit_insn (gen_andsi3 (tmpreg, tmpreg,
- 			 gen_int_mode (0x80808080, SImode)));
-   emit_cmp_and_jump_insns (tmpreg, const0_rtx, EQ, 0, SImode, 1,
- 			   align_4_label);
- 
-   if (TARGET_CMOVE)
-     {
-        rtx reg = gen_reg_rtx (SImode);
-        rtx reg2 = gen_reg_rtx (Pmode);
-        emit_move_insn (reg, tmpreg);
-        emit_insn (gen_lshrsi3 (reg, reg, GEN_INT (16)));
- 
-        /* If zero is not in the first two bytes, move two bytes forward.  */
-        emit_insn (gen_testsi_ccno_1 (tmpreg, GEN_INT (0x8080)));
-        tmp = gen_rtx_REG (CCNOmode, FLAGS_REG);
-        tmp = gen_rtx_EQ (VOIDmode, tmp, const0_rtx);
-        emit_insn (gen_rtx_SET (tmpreg,
- 			       gen_rtx_IF_THEN_ELSE (SImode, tmp,
- 						     reg,
- 						     tmpreg)));
-        /* Emit lea manually to avoid clobbering of flags.  */
-        emit_insn (gen_rtx_SET (reg2, gen_rtx_PLUS (Pmode, out, const2_rtx)));
- 
-        tmp = gen_rtx_REG (CCNOmode, FLAGS_REG);
-        tmp = gen_rtx_EQ (VOIDmode, tmp, const0_rtx);
-        emit_insn (gen_rtx_SET (out,
- 			       gen_rtx_IF_THEN_ELSE (Pmode, tmp,
- 						     reg2,
- 						     out)));
-     }
-   else
-     {
-        rtx_code_label *end_2_label = gen_label_rtx ();
-        /* Is zero in the first two bytes? */
- 
-        emit_insn (gen_testsi_ccno_1 (tmpreg, GEN_INT (0x8080)));
-        tmp = gen_rtx_REG (CCNOmode, FLAGS_REG);
-        tmp = gen_rtx_NE (VOIDmode, tmp, const0_rtx);
-        tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp,
-                             gen_rtx_LABEL_REF (VOIDmode, end_2_label),
-                             pc_rtx);
-        tmp = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
-        JUMP_LABEL (tmp) = end_2_label;
- 
-        /* Not in the first two.  Move two bytes forward.  */
-        emit_insn (gen_lshrsi3 (tmpreg, tmpreg, GEN_INT (16)));
-        emit_insn (ix86_gen_add3 (out, out, const2_rtx));
- 
-        emit_label (end_2_label);
- 
-     }
- 
-   /* Avoid branch in fixing the byte.  */
-   tmpreg = gen_lowpart (QImode, tmpreg);
-   emit_insn (gen_addqi3_cconly_overflow (tmpreg, tmpreg));
-   tmp = gen_rtx_REG (CCmode, FLAGS_REG);
-   cmp = gen_rtx_LTU (VOIDmode, tmp, const0_rtx);
-   emit_insn (ix86_gen_sub3_carry (out, out, GEN_INT (3), tmp, cmp));
- 
-   emit_label (end_0_label);
- }
- 
- /* Expand strlen.  */
- 
- bool
- ix86_expand_strlen (rtx out, rtx src, rtx eoschar, rtx align)
- {
-   rtx addr, scratch1, scratch2, scratch3, scratch4;
- 
-   /* The generic case of strlen expander is long.  Avoid it's
-      expanding unless TARGET_INLINE_ALL_STRINGOPS.  */
- 
-   if (TARGET_UNROLL_STRLEN && eoschar == const0_rtx && optimize > 1
-       && !TARGET_INLINE_ALL_STRINGOPS
-       && !optimize_insn_for_size_p ()
-       && (!CONST_INT_P (align) || INTVAL (align) < 4))
-     return false;
- 
-   addr = force_reg (Pmode, XEXP (src, 0));
-   scratch1 = gen_reg_rtx (Pmode);
- 
-   if (TARGET_UNROLL_STRLEN && eoschar == const0_rtx && optimize > 1
-       && !optimize_insn_for_size_p ())
-     {
-       /* Well it seems that some optimizer does not combine a call like
-          foo(strlen(bar), strlen(bar));
-          when the move and the subtraction is done here.  It does calculate
-          the length just once when these instructions are done inside of
-          output_strlen_unroll().  But I think since &bar[strlen(bar)] is
-          often used and I use one fewer register for the lifetime of
-          output_strlen_unroll() this is better.  */
- 
-       emit_move_insn (out, addr);
- 
-       ix86_expand_strlensi_unroll_1 (out, src, align);
- 
-       /* strlensi_unroll_1 returns the address of the zero at the end of
-          the string, like memchr(), so compute the length by subtracting
-          the start address.  */
-       emit_insn (ix86_gen_sub3 (out, out, addr));
-     }
-   else
-     {
-       rtx unspec;
- 
-       /* Can't use this if the user has appropriated eax, ecx, or edi.  */
-       if (fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])
-         return false;
-       /* Can't use this for non-default address spaces.  */
-       if (!ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (src)))
- 	return false;
- 
-       scratch2 = gen_reg_rtx (Pmode);
-       scratch3 = gen_reg_rtx (Pmode);
-       scratch4 = force_reg (Pmode, constm1_rtx);
- 
-       emit_move_insn (scratch3, addr);
-       eoschar = force_reg (QImode, eoschar);
- 
-       src = replace_equiv_address_nv (src, scratch3);
- 
-       /* If .md starts supporting :P, this can be done in .md.  */
-       unspec = gen_rtx_UNSPEC (Pmode, gen_rtvec (4, src, eoschar, align,
- 						 scratch4), UNSPEC_SCAS);
-       emit_insn (gen_strlenqi_1 (scratch1, scratch3, unspec));
-       emit_insn (ix86_gen_one_cmpl2 (scratch2, scratch1));
-       emit_insn (ix86_gen_add3 (out, scratch2, constm1_rtx));
-     }
-   return true;
- }
- 
- /* For given symbol (function) construct code to compute address of it's PLT
-    entry in large x86-64 PIC model.  */
- static rtx
- construct_plt_address (rtx symbol)
- {
-   rtx tmp, unspec;
- 
-   gcc_assert (GET_CODE (symbol) == SYMBOL_REF);
-   gcc_assert (ix86_cmodel == CM_LARGE_PIC && !TARGET_PECOFF);
-   gcc_assert (Pmode == DImode);
- 
-   tmp = gen_reg_rtx (Pmode);
-   unspec = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, symbol), UNSPEC_PLTOFF);
- 
-   emit_move_insn (tmp, gen_rtx_CONST (Pmode, unspec));
-   emit_insn (ix86_gen_add3 (tmp, tmp, pic_offset_table_rtx));
-   return tmp;
- }
- 
- rtx_insn *
- ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1,
- 		  rtx callarg2,
- 		  rtx pop, bool sibcall)
- {
-   rtx vec[3];
-   rtx use = NULL, call;
-   unsigned int vec_len = 0;
-   tree fndecl;
- 
-   if (GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF)
-     {
-       fndecl = SYMBOL_REF_DECL (XEXP (fnaddr, 0));
-       if (fndecl
- 	  && (lookup_attribute ("interrupt",
- 				TYPE_ATTRIBUTES (TREE_TYPE (fndecl)))))
- 	error ("interrupt service routine can%'t be called directly");
-     }
-   else
-     fndecl = NULL_TREE;
- 
-   if (pop == const0_rtx)
-     pop = NULL;
-   gcc_assert (!TARGET_64BIT || !pop);
- 
-   if (TARGET_MACHO && !TARGET_64BIT)
-     {
- #if TARGET_MACHO
-       if (flag_pic && GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF)
- 	fnaddr = machopic_indirect_call_target (fnaddr);
- #endif
-     }
-   else
-     {
-       /* Static functions and indirect calls don't need the pic register.  Also,
- 	 check if PLT was explicitly avoided via no-plt or "noplt" attribute, making
- 	 it an indirect call.  */
-       rtx addr = XEXP (fnaddr, 0);
-       if (flag_pic
- 	  && GET_CODE (addr) == SYMBOL_REF
- 	  && !SYMBOL_REF_LOCAL_P (addr))
- 	{
- 	  if (flag_plt
- 	      && (SYMBOL_REF_DECL (addr) == NULL_TREE
- 		  || !lookup_attribute ("noplt",
- 					DECL_ATTRIBUTES (SYMBOL_REF_DECL (addr)))))
- 	    {
- 	      if (!TARGET_64BIT
- 		  || (ix86_cmodel == CM_LARGE_PIC
- 		      && DEFAULT_ABI != MS_ABI))
- 		{
- 		  use_reg (&use, gen_rtx_REG (Pmode,
- 					      REAL_PIC_OFFSET_TABLE_REGNUM));
- 		  if (ix86_use_pseudo_pic_reg ())
- 		    emit_move_insn (gen_rtx_REG (Pmode,
- 						 REAL_PIC_OFFSET_TABLE_REGNUM),
- 				    pic_offset_table_rtx);
- 		}
- 	    }
- 	  else if (!TARGET_PECOFF && !TARGET_MACHO)
- 	    {
- 	      if (TARGET_64BIT)
- 		{
- 		  fnaddr = gen_rtx_UNSPEC (Pmode,
- 					   gen_rtvec (1, addr),
- 					   UNSPEC_GOTPCREL);
- 		  fnaddr = gen_rtx_CONST (Pmode, fnaddr);
- 		}
- 	      else
- 		{
- 		  fnaddr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
- 					   UNSPEC_GOT);
- 		  fnaddr = gen_rtx_CONST (Pmode, fnaddr);
- 		  fnaddr = gen_rtx_PLUS (Pmode, pic_offset_table_rtx,
- 					 fnaddr);
- 		}
- 	      fnaddr = gen_const_mem (Pmode, fnaddr);
- 	      /* Pmode may not be the same as word_mode for x32, which
- 		 doesn't support indirect branch via 32-bit memory slot.
- 		 Since x32 GOT slot is 64 bit with zero upper 32 bits,
- 		 indirect branch via x32 GOT slot is OK.  */
- 	      if (GET_MODE (fnaddr) != word_mode)
- 		fnaddr = gen_rtx_ZERO_EXTEND (word_mode, fnaddr);
- 	      fnaddr = gen_rtx_MEM (QImode, fnaddr);
- 	    }
- 	}
-     }
- 
-   /* Skip setting up RAX register for -mskip-rax-setup when there are no
-      parameters passed in vector registers.  */
-   if (TARGET_64BIT
-       && (INTVAL (callarg2) > 0
- 	  || (INTVAL (callarg2) == 0
- 	      && (TARGET_SSE || !flag_skip_rax_setup))))
-     {
-       rtx al = gen_rtx_REG (QImode, AX_REG);
-       emit_move_insn (al, callarg2);
-       use_reg (&use, al);
-     }
- 
-   if (ix86_cmodel == CM_LARGE_PIC
-       && !TARGET_PECOFF
-       && MEM_P (fnaddr)
-       && GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF
-       && !local_symbolic_operand (XEXP (fnaddr, 0), VOIDmode))
-     fnaddr = gen_rtx_MEM (QImode, construct_plt_address (XEXP (fnaddr, 0)));
-   /* Since x32 GOT slot is 64 bit with zero upper 32 bits, indirect
-      branch via x32 GOT slot is OK.  */
-   else if (!(TARGET_X32
- 	     && MEM_P (fnaddr)
- 	     && GET_CODE (XEXP (fnaddr, 0)) == ZERO_EXTEND
- 	     && GOT_memory_operand (XEXP (XEXP (fnaddr, 0), 0), Pmode))
- 	   && (sibcall
- 	       ? !sibcall_insn_operand (XEXP (fnaddr, 0), word_mode)
- 	       : !call_insn_operand (XEXP (fnaddr, 0), word_mode)))
-     {
-       fnaddr = convert_to_mode (word_mode, XEXP (fnaddr, 0), 1);
-       fnaddr = gen_rtx_MEM (QImode, copy_to_mode_reg (word_mode, fnaddr));
-     }
- 
-   call = gen_rtx_CALL (VOIDmode, fnaddr, callarg1);
- 
-   if (retval)
-     call = gen_rtx_SET (retval, call);
-   vec[vec_len++] = call;
- 
-   if (pop)
-     {
-       pop = gen_rtx_PLUS (Pmode, stack_pointer_rtx, pop);
-       pop = gen_rtx_SET (stack_pointer_rtx, pop);
-       vec[vec_len++] = pop;
-     }
- 
-   if (cfun->machine->no_caller_saved_registers
-       && (!fndecl
- 	  || (!TREE_THIS_VOLATILE (fndecl)
- 	      && !lookup_attribute ("no_caller_saved_registers",
- 				    TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))))
-     {
-       static const char ix86_call_used_regs[] = CALL_USED_REGISTERS;
-       bool is_64bit_ms_abi = (TARGET_64BIT
- 			      && ix86_function_abi (fndecl) == MS_ABI);
-       char c_mask = CALL_USED_REGISTERS_MASK (is_64bit_ms_abi);
- 
-       /* If there are no caller-saved registers, add all registers
- 	 that are clobbered by the call which returns.  */
-       for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++)
- 	if (!fixed_regs[i]
- 	    && (ix86_call_used_regs[i] == 1
- 		|| (ix86_call_used_regs[i] & c_mask))
- 	    && !STACK_REGNO_P (i)
- 	    && !MMX_REGNO_P (i))
- 	  clobber_reg (&use,
- 		       gen_rtx_REG (GET_MODE (regno_reg_rtx[i]), i));
-     }
-   else if (TARGET_64BIT_MS_ABI
- 	   && (!callarg2 || INTVAL (callarg2) != -2))
-     {
-       unsigned i;
- 
-       for (i = 0; i < NUM_X86_64_MS_CLOBBERED_REGS; i++)
- 	{
- 	  int regno = x86_64_ms_sysv_extra_clobbered_registers[i];
- 	  machine_mode mode = SSE_REGNO_P (regno) ? TImode : DImode;
- 
- 	  clobber_reg (&use, gen_rtx_REG (mode, regno));
- 	}
- 
-       /* Set here, but it may get cleared later.  */
-       if (TARGET_CALL_MS2SYSV_XLOGUES)
- 	{
- 	  if (!TARGET_SSE)
- 	    ;
- 
- 	  /* Don't break hot-patched functions.  */
- 	  else if (ix86_function_ms_hook_prologue (current_function_decl))
- 	    ;
- 
- 	  /* TODO: Cases not yet examined.  */
- 	  else if (flag_split_stack)
- 	    warn_once_call_ms2sysv_xlogues ("-fsplit-stack");
- 
- 	  else
- 	    {
- 	      gcc_assert (!reload_completed);
- 	      cfun->machine->call_ms2sysv = true;
- 	    }
- 	}
-     }
- 
-   if (vec_len > 1)
-     call = gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (vec_len, vec));
-   rtx_insn *call_insn = emit_call_insn (call);
-   if (use)
-     CALL_INSN_FUNCTION_USAGE (call_insn) = use;
- 
-   return call_insn;
- }
- 
  /* Return true if the function being called was marked with attribute
     "noplt" or using -fno-plt and we are compiling for non-PIC.  We need
     to handle the non-PIC case in the backend because there is no easy
--- 15423,15428 ----
*************** ix86_output_indirect_function_return (rt
*** 28951,28989 ****
      return "%!jmp\t%A0";
  }
  
- /* Split simple return with popping POPC bytes from stack to indirect
-    branch with stack adjustment .  */
- 
- void
- ix86_split_simple_return_pop_internal (rtx popc)
- {
-   struct machine_function *m = cfun->machine;
-   rtx ecx = gen_rtx_REG (SImode, CX_REG);
-   rtx_insn *insn;
- 
-   /* There is no "pascal" calling convention in any 64bit ABI.  */
-   gcc_assert (!TARGET_64BIT);
- 
-   insn = emit_insn (gen_pop (ecx));
-   m->fs.cfa_offset -= UNITS_PER_WORD;
-   m->fs.sp_offset -= UNITS_PER_WORD;
- 
-   rtx x = plus_constant (Pmode, stack_pointer_rtx, UNITS_PER_WORD);
-   x = gen_rtx_SET (stack_pointer_rtx, x);
-   add_reg_note (insn, REG_CFA_ADJUST_CFA, x);
-   add_reg_note (insn, REG_CFA_REGISTER, gen_rtx_SET (ecx, pc_rtx));
-   RTX_FRAME_RELATED_P (insn) = 1;
- 
-   x = gen_rtx_PLUS (Pmode, stack_pointer_rtx, popc);
-   x = gen_rtx_SET (stack_pointer_rtx, x);
-   insn = emit_insn (x);
-   add_reg_note (insn, REG_CFA_ADJUST_CFA, x);
-   RTX_FRAME_RELATED_P (insn) = 1;
- 
-   /* Now return address is in ECX.  */
-   emit_jump_insn (gen_simple_return_indirect_internal (ecx));
- }
- 
  /* Output the assembly for a call instruction.  */
  
  const char *
--- 15796,15801 ----
*************** ix86_output_call_insn (rtx_insn *insn, r
*** 29121,29141 ****
    return "";
  }
  
- /* Clear stack slot assignments remembered from previous functions.
-    This is called from INIT_EXPANDERS once before RTL is emitted for each
-    function.  */
- 
- static struct machine_function *
- ix86_init_machine_status (void)
- {
-   struct machine_function *f;
- 
-   f = ggc_cleared_alloc<machine_function> ();
-   f->call_abi = ix86_abi;
- 
-   return f;
- }
- 
  /* Return a MEM corresponding to a stack slot with mode MODE.
     Allocate a new slot if necessary.
  
--- 15933,15938 ----
*************** iamcu_alignment (tree type, int align)
*** 29834,29840 ****
     instead of that alignment to align the object.  */
  
  int
! ix86_data_alignment (tree type, int align, bool opt)
  {
    /* GCC 4.8 and earlier used to incorrectly assume this alignment even
       for symbols from other compilation units or symbols that don't need
--- 16631,16637 ----
     instead of that alignment to align the object.  */
  
  int
! ix86_data_alignment (tree type, unsigned int align, bool opt)
  {
    /* GCC 4.8 and earlier used to incorrectly assume this alignment even
       for symbols from other compilation units or symbols that don't need
*************** ix86_data_alignment (tree type, int alig
*** 29842,29855 ****
       those compilers, ensure we don't decrease alignment from what we
       used to assume.  */
  
!   int max_align_compat = MIN (256, MAX_OFILE_ALIGNMENT);
  
    /* A data structure, equal or greater than the size of a cache line
       (64 bytes in the Pentium 4 and other recent Intel processors, including
       processors based on Intel Core microarchitecture) should be aligned
       so that its base address is a multiple of a cache line size.  */
  
!   int max_align
      = MIN ((unsigned) ix86_tune_cost->prefetch_block * 8, MAX_OFILE_ALIGNMENT);
  
    if (max_align < BITS_PER_WORD)
--- 16639,16652 ----
       those compilers, ensure we don't decrease alignment from what we
       used to assume.  */
  
!   unsigned int max_align_compat = MIN (256, MAX_OFILE_ALIGNMENT);
  
    /* A data structure, equal or greater than the size of a cache line
       (64 bytes in the Pentium 4 and other recent Intel processors, including
       processors based on Intel Core microarchitecture) should be aligned
       so that its base address is a multiple of a cache line size.  */
  
!   unsigned int max_align
      = MIN ((unsigned) ix86_tune_cost->prefetch_block * 8, MAX_OFILE_ALIGNMENT);
  
    if (max_align < BITS_PER_WORD)
*************** ix86_warn_func_return (tree decl)
*** 30327,33008 ****
    return !ix86_function_naked (decl);
  }
  
- /* The following file contains several enumerations and data structures
-    built from the definitions in i386-builtin-types.def.  */
- 
- #include "i386-builtin-types.inc"
- 
- /* Table for the ix86 builtin non-function types.  */
- static GTY(()) tree ix86_builtin_type_tab[(int) IX86_BT_LAST_CPTR + 1];
- 
- /* Retrieve an element from the above table, building some of
-    the types lazily.  */
- 
- static tree
- ix86_get_builtin_type (enum ix86_builtin_type tcode)
- {
-   unsigned int index;
-   tree type, itype;
- 
-   gcc_assert ((unsigned)tcode < ARRAY_SIZE(ix86_builtin_type_tab));
- 
-   type = ix86_builtin_type_tab[(int) tcode];
-   if (type != NULL)
-     return type;
- 
-   gcc_assert (tcode > IX86_BT_LAST_PRIM);
-   if (tcode <= IX86_BT_LAST_VECT)
-     {
-       machine_mode mode;
- 
-       index = tcode - IX86_BT_LAST_PRIM - 1;
-       itype = ix86_get_builtin_type (ix86_builtin_type_vect_base[index]);
-       mode = ix86_builtin_type_vect_mode[index];
- 
-       type = build_vector_type_for_mode (itype, mode);
-     }
-   else
-     {
-       int quals;
- 
-       index = tcode - IX86_BT_LAST_VECT - 1;
-       if (tcode <= IX86_BT_LAST_PTR)
- 	quals = TYPE_UNQUALIFIED;
-       else
- 	quals = TYPE_QUAL_CONST;
- 
-       itype = ix86_get_builtin_type (ix86_builtin_type_ptr_base[index]);
-       if (quals != TYPE_UNQUALIFIED)
- 	itype = build_qualified_type (itype, quals);
- 
-       type = build_pointer_type (itype);
-     }
- 
-   ix86_builtin_type_tab[(int) tcode] = type;
-   return type;
- }
- 
- /* Table for the ix86 builtin function types.  */
- static GTY(()) tree ix86_builtin_func_type_tab[(int) IX86_BT_LAST_ALIAS + 1];
- 
- /* Retrieve an element from the above table, building some of
-    the types lazily.  */
- 
- static tree
- ix86_get_builtin_func_type (enum ix86_builtin_func_type tcode)
- {
-   tree type;
- 
-   gcc_assert ((unsigned)tcode < ARRAY_SIZE (ix86_builtin_func_type_tab));
- 
-   type = ix86_builtin_func_type_tab[(int) tcode];
-   if (type != NULL)
-     return type;
- 
-   if (tcode <= IX86_BT_LAST_FUNC)
-     {
-       unsigned start = ix86_builtin_func_start[(int) tcode];
-       unsigned after = ix86_builtin_func_start[(int) tcode + 1];
-       tree rtype, atype, args = void_list_node;
-       unsigned i;
- 
-       rtype = ix86_get_builtin_type (ix86_builtin_func_args[start]);
-       for (i = after - 1; i > start; --i)
- 	{
- 	  atype = ix86_get_builtin_type (ix86_builtin_func_args[i]);
- 	  args = tree_cons (NULL, atype, args);
- 	}
- 
-       type = build_function_type (rtype, args);
-     }
-   else
-     {
-       unsigned index = tcode - IX86_BT_LAST_FUNC - 1;
-       enum ix86_builtin_func_type icode;
- 
-       icode = ix86_builtin_func_alias_base[index];
-       type = ix86_get_builtin_func_type (icode);
-     }
- 
-   ix86_builtin_func_type_tab[(int) tcode] = type;
-   return type;
- }
- 
- 
- /* Codes for all the SSE/MMX builtins.  Builtins not mentioned in any
-    bdesc_* arrays below should come first, then builtins for each bdesc_*
-    array in ascending order, so that we can use direct array accesses.  */
- enum ix86_builtins
- {
-   IX86_BUILTIN_MASKMOVQ,
-   IX86_BUILTIN_LDMXCSR,
-   IX86_BUILTIN_STMXCSR,
-   IX86_BUILTIN_MASKMOVDQU,
-   IX86_BUILTIN_PSLLDQ128,
-   IX86_BUILTIN_CLFLUSH,
-   IX86_BUILTIN_MONITOR,
-   IX86_BUILTIN_MWAIT,
-   IX86_BUILTIN_UMONITOR,
-   IX86_BUILTIN_UMWAIT,
-   IX86_BUILTIN_TPAUSE,
-   IX86_BUILTIN_CLZERO,
-   IX86_BUILTIN_CLDEMOTE,
-   IX86_BUILTIN_VEC_INIT_V2SI,
-   IX86_BUILTIN_VEC_INIT_V4HI,
-   IX86_BUILTIN_VEC_INIT_V8QI,
-   IX86_BUILTIN_VEC_EXT_V2DF,
-   IX86_BUILTIN_VEC_EXT_V2DI,
-   IX86_BUILTIN_VEC_EXT_V4SF,
-   IX86_BUILTIN_VEC_EXT_V4SI,
-   IX86_BUILTIN_VEC_EXT_V8HI,
-   IX86_BUILTIN_VEC_EXT_V2SI,
-   IX86_BUILTIN_VEC_EXT_V4HI,
-   IX86_BUILTIN_VEC_EXT_V16QI,
-   IX86_BUILTIN_VEC_SET_V2DI,
-   IX86_BUILTIN_VEC_SET_V4SF,
-   IX86_BUILTIN_VEC_SET_V4SI,
-   IX86_BUILTIN_VEC_SET_V8HI,
-   IX86_BUILTIN_VEC_SET_V4HI,
-   IX86_BUILTIN_VEC_SET_V16QI,
-   IX86_BUILTIN_GATHERSIV2DF,
-   IX86_BUILTIN_GATHERSIV4DF,
-   IX86_BUILTIN_GATHERDIV2DF,
-   IX86_BUILTIN_GATHERDIV4DF,
-   IX86_BUILTIN_GATHERSIV4SF,
-   IX86_BUILTIN_GATHERSIV8SF,
-   IX86_BUILTIN_GATHERDIV4SF,
-   IX86_BUILTIN_GATHERDIV8SF,
-   IX86_BUILTIN_GATHERSIV2DI,
-   IX86_BUILTIN_GATHERSIV4DI,
-   IX86_BUILTIN_GATHERDIV2DI,
-   IX86_BUILTIN_GATHERDIV4DI,
-   IX86_BUILTIN_GATHERSIV4SI,
-   IX86_BUILTIN_GATHERSIV8SI,
-   IX86_BUILTIN_GATHERDIV4SI,
-   IX86_BUILTIN_GATHERDIV8SI,
-   IX86_BUILTIN_GATHER3SIV8SF,
-   IX86_BUILTIN_GATHER3SIV4SF,
-   IX86_BUILTIN_GATHER3SIV4DF,
-   IX86_BUILTIN_GATHER3SIV2DF,
-   IX86_BUILTIN_GATHER3DIV8SF,
-   IX86_BUILTIN_GATHER3DIV4SF,
-   IX86_BUILTIN_GATHER3DIV4DF,
-   IX86_BUILTIN_GATHER3DIV2DF,
-   IX86_BUILTIN_GATHER3SIV8SI,
-   IX86_BUILTIN_GATHER3SIV4SI,
-   IX86_BUILTIN_GATHER3SIV4DI,
-   IX86_BUILTIN_GATHER3SIV2DI,
-   IX86_BUILTIN_GATHER3DIV8SI,
-   IX86_BUILTIN_GATHER3DIV4SI,
-   IX86_BUILTIN_GATHER3DIV4DI,
-   IX86_BUILTIN_GATHER3DIV2DI,
-   IX86_BUILTIN_SCATTERSIV8SF,
-   IX86_BUILTIN_SCATTERSIV4SF,
-   IX86_BUILTIN_SCATTERSIV4DF,
-   IX86_BUILTIN_SCATTERSIV2DF,
-   IX86_BUILTIN_SCATTERDIV8SF,
-   IX86_BUILTIN_SCATTERDIV4SF,
-   IX86_BUILTIN_SCATTERDIV4DF,
-   IX86_BUILTIN_SCATTERDIV2DF,
-   IX86_BUILTIN_SCATTERSIV8SI,
-   IX86_BUILTIN_SCATTERSIV4SI,
-   IX86_BUILTIN_SCATTERSIV4DI,
-   IX86_BUILTIN_SCATTERSIV2DI,
-   IX86_BUILTIN_SCATTERDIV8SI,
-   IX86_BUILTIN_SCATTERDIV4SI,
-   IX86_BUILTIN_SCATTERDIV4DI,
-   IX86_BUILTIN_SCATTERDIV2DI,
-   /* Alternate 4 and 8 element gather/scatter for the vectorizer
-      where all operands are 32-byte or 64-byte wide respectively.  */
-   IX86_BUILTIN_GATHERALTSIV4DF,
-   IX86_BUILTIN_GATHERALTDIV8SF,
-   IX86_BUILTIN_GATHERALTSIV4DI,
-   IX86_BUILTIN_GATHERALTDIV8SI,
-   IX86_BUILTIN_GATHER3ALTDIV16SF,
-   IX86_BUILTIN_GATHER3ALTDIV16SI,
-   IX86_BUILTIN_GATHER3ALTSIV4DF,
-   IX86_BUILTIN_GATHER3ALTDIV8SF,
-   IX86_BUILTIN_GATHER3ALTSIV4DI,
-   IX86_BUILTIN_GATHER3ALTDIV8SI,
-   IX86_BUILTIN_GATHER3ALTSIV8DF,
-   IX86_BUILTIN_GATHER3ALTSIV8DI,
-   IX86_BUILTIN_GATHER3DIV16SF,
-   IX86_BUILTIN_GATHER3DIV16SI,
-   IX86_BUILTIN_GATHER3DIV8DF,
-   IX86_BUILTIN_GATHER3DIV8DI,
-   IX86_BUILTIN_GATHER3SIV16SF,
-   IX86_BUILTIN_GATHER3SIV16SI,
-   IX86_BUILTIN_GATHER3SIV8DF,
-   IX86_BUILTIN_GATHER3SIV8DI,
-   IX86_BUILTIN_SCATTERALTSIV8DF,
-   IX86_BUILTIN_SCATTERALTDIV16SF,
-   IX86_BUILTIN_SCATTERALTSIV8DI,
-   IX86_BUILTIN_SCATTERALTDIV16SI,
-   IX86_BUILTIN_SCATTERALTSIV4DF,
-   IX86_BUILTIN_SCATTERALTDIV8SF,
-   IX86_BUILTIN_SCATTERALTSIV4DI,
-   IX86_BUILTIN_SCATTERALTDIV8SI,
-   IX86_BUILTIN_SCATTERALTSIV2DF,
-   IX86_BUILTIN_SCATTERALTDIV4SF,
-   IX86_BUILTIN_SCATTERALTSIV2DI,
-   IX86_BUILTIN_SCATTERALTDIV4SI,
-   IX86_BUILTIN_SCATTERDIV16SF,
-   IX86_BUILTIN_SCATTERDIV16SI,
-   IX86_BUILTIN_SCATTERDIV8DF,
-   IX86_BUILTIN_SCATTERDIV8DI,
-   IX86_BUILTIN_SCATTERSIV16SF,
-   IX86_BUILTIN_SCATTERSIV16SI,
-   IX86_BUILTIN_SCATTERSIV8DF,
-   IX86_BUILTIN_SCATTERSIV8DI,
-   IX86_BUILTIN_GATHERPFQPD,
-   IX86_BUILTIN_GATHERPFDPS,
-   IX86_BUILTIN_GATHERPFDPD,
-   IX86_BUILTIN_GATHERPFQPS,
-   IX86_BUILTIN_SCATTERPFDPD,
-   IX86_BUILTIN_SCATTERPFDPS,
-   IX86_BUILTIN_SCATTERPFQPD,
-   IX86_BUILTIN_SCATTERPFQPS,
-   IX86_BUILTIN_CLWB,
-   IX86_BUILTIN_CLFLUSHOPT,
-   IX86_BUILTIN_INFQ,
-   IX86_BUILTIN_HUGE_VALQ,
-   IX86_BUILTIN_NANQ,
-   IX86_BUILTIN_NANSQ,
-   IX86_BUILTIN_XABORT,
-   IX86_BUILTIN_ADDCARRYX32,
-   IX86_BUILTIN_ADDCARRYX64,
-   IX86_BUILTIN_SBB32,
-   IX86_BUILTIN_SBB64,
-   IX86_BUILTIN_RDRAND16_STEP,
-   IX86_BUILTIN_RDRAND32_STEP,
-   IX86_BUILTIN_RDRAND64_STEP,
-   IX86_BUILTIN_RDSEED16_STEP,
-   IX86_BUILTIN_RDSEED32_STEP,
-   IX86_BUILTIN_RDSEED64_STEP,
-   IX86_BUILTIN_MONITORX,
-   IX86_BUILTIN_MWAITX,
-   IX86_BUILTIN_CFSTRING,
-   IX86_BUILTIN_CPU_INIT,
-   IX86_BUILTIN_CPU_IS,
-   IX86_BUILTIN_CPU_SUPPORTS,
-   IX86_BUILTIN_READ_FLAGS,
-   IX86_BUILTIN_WRITE_FLAGS,
- 
-   /* All the remaining builtins are tracked in bdesc_* arrays in
-      i386-builtin.def.  Don't add any IX86_BUILTIN_* enumerators after
-      this point.  */
- #define BDESC(mask, mask2, icode, name, code, comparison, flag)	\
-   code,
- #define BDESC_FIRST(kind, kindu, mask, mask2, icode, name, code, comparison, flag) \
-   code,									\
-   IX86_BUILTIN__BDESC_##kindu##_FIRST = code,
- #define BDESC_END(kind, next_kind)
- 
- #include "i386-builtin.def"
- 
- #undef BDESC
- #undef BDESC_FIRST
- #undef BDESC_END
- 
-   IX86_BUILTIN_MAX,
- 
-   IX86_BUILTIN__BDESC_MAX_FIRST = IX86_BUILTIN_MAX,
- 
-   /* Now just the aliases for bdesc_* start/end.  */
- #define BDESC(mask, mask2, icode, name, code, comparison, flag)
- #define BDESC_FIRST(kind, kindu, mask, mask2, icode, name, code, comparison, flag)
- #define BDESC_END(kind, next_kind) \
-   IX86_BUILTIN__BDESC_##kind##_LAST					    \
-     = IX86_BUILTIN__BDESC_##next_kind##_FIRST - 1,
- 
- #include "i386-builtin.def"
- 
- #undef BDESC
- #undef BDESC_FIRST
- #undef BDESC_END
- 
-   /* Just to make sure there is no comma after the last enumerator.  */
-   IX86_BUILTIN__BDESC_MAX_LAST = IX86_BUILTIN__BDESC_MAX_FIRST
- };
- 
- /* Table for the ix86 builtin decls.  */
- static GTY(()) tree ix86_builtins[(int) IX86_BUILTIN_MAX];
- 
- /* Table of all of the builtin functions that are possible with different ISA's
-    but are waiting to be built until a function is declared to use that
-    ISA.  */
- struct builtin_isa {
-   HOST_WIDE_INT isa;		/* isa_flags this builtin is defined for */
-   HOST_WIDE_INT isa2;		/* additional isa_flags this builtin is defined for */
-   const char *name;		/* function name */
-   enum ix86_builtin_func_type tcode; /* type to use in the declaration */
-   unsigned char const_p:1;	/* true if the declaration is constant */
-   unsigned char pure_p:1;	/* true if the declaration has pure attribute */
-   bool set_and_not_built_p;
- };
- 
- static struct builtin_isa ix86_builtins_isa[(int) IX86_BUILTIN_MAX];
- 
- /* Bits that can still enable any inclusion of a builtin.  */
- static HOST_WIDE_INT deferred_isa_values = 0;
- static HOST_WIDE_INT deferred_isa_values2 = 0;
- 
- /* Add an ix86 target builtin function with CODE, NAME and TYPE.  Save the
-    MASK and MASK2 of which isa_flags and ix86_isa_flags2 to use in the
-    ix86_builtins_isa array.  Stores the function decl in the ix86_builtins
-    array.  Returns the function decl or NULL_TREE, if the builtin was not
-    added.
- 
-    If the front end has a special hook for builtin functions, delay adding
-    builtin functions that aren't in the current ISA until the ISA is changed
-    with function specific optimization.  Doing so, can save about 300K for the
-    default compiler.  When the builtin is expanded, check at that time whether
-    it is valid.
- 
-    If the front end doesn't have a special hook, record all builtins, even if
-    it isn't an instruction set in the current ISA in case the user uses
-    function specific options for a different ISA, so that we don't get scope
-    errors if a builtin is added in the middle of a function scope.  */
- 
- static inline tree
- def_builtin (HOST_WIDE_INT mask, HOST_WIDE_INT mask2,
- 	     const char *name,
- 	     enum ix86_builtin_func_type tcode,
- 	     enum ix86_builtins code)
- {
-   tree decl = NULL_TREE;
- 
-   /* An instruction may be 64bit only regardless of ISAs.  */
-   if (!(mask & OPTION_MASK_ISA_64BIT) || TARGET_64BIT)
-     {
-       ix86_builtins_isa[(int) code].isa = mask;
-       ix86_builtins_isa[(int) code].isa2 = mask2;
- 
-       mask &= ~OPTION_MASK_ISA_64BIT;
- 
-       /* Filter out the masks most often ored together with others.  */
-       if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512VL)
- 	  && mask != OPTION_MASK_ISA_AVX512VL)
- 	mask &= ~OPTION_MASK_ISA_AVX512VL;
-       if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512BW)
- 	  && mask != OPTION_MASK_ISA_AVX512BW)
- 	mask &= ~OPTION_MASK_ISA_AVX512BW;
- 
-       if (((mask2 == 0 || (mask2 & ix86_isa_flags2) != 0)
- 	   && (mask == 0 || (mask & ix86_isa_flags) != 0))
- 	  || (lang_hooks.builtin_function
- 	      == lang_hooks.builtin_function_ext_scope))
- 	{
- 	  tree type = ix86_get_builtin_func_type (tcode);
- 	  decl = add_builtin_function (name, type, code, BUILT_IN_MD,
- 				       NULL, NULL_TREE);
- 	  ix86_builtins[(int) code] = decl;
- 	  ix86_builtins_isa[(int) code].set_and_not_built_p = false;
- 	}
-       else
- 	{
- 	  /* Just MASK and MASK2 where set_and_not_built_p == true can potentially
- 	     include a builtin.  */
- 	  deferred_isa_values |= mask;
- 	  deferred_isa_values2 |= mask2;
- 	  ix86_builtins[(int) code] = NULL_TREE;
- 	  ix86_builtins_isa[(int) code].tcode = tcode;
- 	  ix86_builtins_isa[(int) code].name = name;
- 	  ix86_builtins_isa[(int) code].const_p = false;
- 	  ix86_builtins_isa[(int) code].pure_p = false;
- 	  ix86_builtins_isa[(int) code].set_and_not_built_p = true;
- 	}
-     }
- 
-   return decl;
- }
- 
- /* Like def_builtin, but also marks the function decl "const".  */
- 
- static inline tree
- def_builtin_const (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
- 		   enum ix86_builtin_func_type tcode, enum ix86_builtins code)
- {
-   tree decl = def_builtin (mask, mask2, name, tcode, code);
-   if (decl)
-     TREE_READONLY (decl) = 1;
-   else
-     ix86_builtins_isa[(int) code].const_p = true;
- 
-   return decl;
- }
- 
- /* Like def_builtin, but also marks the function decl "pure".  */
- 
- static inline tree
- def_builtin_pure (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
- 		  enum ix86_builtin_func_type tcode, enum ix86_builtins code)
- {
-   tree decl = def_builtin (mask, mask2, name, tcode, code);
-   if (decl)
-     DECL_PURE_P (decl) = 1;
-   else
-     ix86_builtins_isa[(int) code].pure_p = true;
- 
-   return decl;
- }
- 
- /* Add any new builtin functions for a given ISA that may not have been
-    declared.  This saves a bit of space compared to adding all of the
-    declarations to the tree, even if we didn't use them.  */
- 
- static void
- ix86_add_new_builtins (HOST_WIDE_INT isa, HOST_WIDE_INT isa2)
- {
-   isa &= ~OPTION_MASK_ISA_64BIT;
- 
-   if ((isa & deferred_isa_values) == 0
-       && (isa2 & deferred_isa_values2) == 0)
-     return;
- 
-   /* Bits in ISA value can be removed from potential isa values.  */
-   deferred_isa_values &= ~isa;
-   deferred_isa_values2 &= ~isa2;
- 
-   int i;
-   tree saved_current_target_pragma = current_target_pragma;
-   current_target_pragma = NULL_TREE;
- 
-   for (i = 0; i < (int)IX86_BUILTIN_MAX; i++)
-     {
-       if (((ix86_builtins_isa[i].isa & isa) != 0
- 	   || (ix86_builtins_isa[i].isa2 & isa2) != 0)
- 	  && ix86_builtins_isa[i].set_and_not_built_p)
- 	{
- 	  tree decl, type;
- 
- 	  /* Don't define the builtin again.  */
- 	  ix86_builtins_isa[i].set_and_not_built_p = false;
- 
- 	  type = ix86_get_builtin_func_type (ix86_builtins_isa[i].tcode);
- 	  decl = add_builtin_function_ext_scope (ix86_builtins_isa[i].name,
- 						 type, i, BUILT_IN_MD, NULL,
- 						 NULL_TREE);
- 
- 	  ix86_builtins[i] = decl;
- 	  if (ix86_builtins_isa[i].const_p)
- 	    TREE_READONLY (decl) = 1;
- 	}
-     }
- 
-   current_target_pragma = saved_current_target_pragma;
- }
- 
- /* Bits for builtin_description.flag.  */
- 
- /* Set when we don't support the comparison natively, and should
-    swap_comparison in order to support it.  */
- #define BUILTIN_DESC_SWAP_OPERANDS	1
- 
- struct builtin_description
- {
-   const HOST_WIDE_INT mask;
-   const HOST_WIDE_INT mask2;
-   const enum insn_code icode;
-   const char *const name;
-   const enum ix86_builtins code;
-   const enum rtx_code comparison;
-   const int flag;
- };
- 
- #define MULTI_ARG_4_DF2_DI_I	V2DF_FTYPE_V2DF_V2DF_V2DI_INT
- #define MULTI_ARG_4_DF2_DI_I1	V4DF_FTYPE_V4DF_V4DF_V4DI_INT
- #define MULTI_ARG_4_SF2_SI_I	V4SF_FTYPE_V4SF_V4SF_V4SI_INT
- #define MULTI_ARG_4_SF2_SI_I1	V8SF_FTYPE_V8SF_V8SF_V8SI_INT
- #define MULTI_ARG_3_SF		V4SF_FTYPE_V4SF_V4SF_V4SF
- #define MULTI_ARG_3_DF		V2DF_FTYPE_V2DF_V2DF_V2DF
- #define MULTI_ARG_3_SF2		V8SF_FTYPE_V8SF_V8SF_V8SF
- #define MULTI_ARG_3_DF2		V4DF_FTYPE_V4DF_V4DF_V4DF
- #define MULTI_ARG_3_DI		V2DI_FTYPE_V2DI_V2DI_V2DI
- #define MULTI_ARG_3_SI		V4SI_FTYPE_V4SI_V4SI_V4SI
- #define MULTI_ARG_3_SI_DI	V4SI_FTYPE_V4SI_V4SI_V2DI
- #define MULTI_ARG_3_HI		V8HI_FTYPE_V8HI_V8HI_V8HI
- #define MULTI_ARG_3_HI_SI	V8HI_FTYPE_V8HI_V8HI_V4SI
- #define MULTI_ARG_3_QI		V16QI_FTYPE_V16QI_V16QI_V16QI
- #define MULTI_ARG_3_DI2		V4DI_FTYPE_V4DI_V4DI_V4DI
- #define MULTI_ARG_3_SI2		V8SI_FTYPE_V8SI_V8SI_V8SI
- #define MULTI_ARG_3_HI2		V16HI_FTYPE_V16HI_V16HI_V16HI
- #define MULTI_ARG_3_QI2		V32QI_FTYPE_V32QI_V32QI_V32QI
- #define MULTI_ARG_2_SF		V4SF_FTYPE_V4SF_V4SF
- #define MULTI_ARG_2_DF		V2DF_FTYPE_V2DF_V2DF
- #define MULTI_ARG_2_DI		V2DI_FTYPE_V2DI_V2DI
- #define MULTI_ARG_2_SI		V4SI_FTYPE_V4SI_V4SI
- #define MULTI_ARG_2_HI		V8HI_FTYPE_V8HI_V8HI
- #define MULTI_ARG_2_QI		V16QI_FTYPE_V16QI_V16QI
- #define MULTI_ARG_2_DI_IMM	V2DI_FTYPE_V2DI_SI
- #define MULTI_ARG_2_SI_IMM	V4SI_FTYPE_V4SI_SI
- #define MULTI_ARG_2_HI_IMM	V8HI_FTYPE_V8HI_SI
- #define MULTI_ARG_2_QI_IMM	V16QI_FTYPE_V16QI_SI
- #define MULTI_ARG_2_DI_CMP	V2DI_FTYPE_V2DI_V2DI_CMP
- #define MULTI_ARG_2_SI_CMP	V4SI_FTYPE_V4SI_V4SI_CMP
- #define MULTI_ARG_2_HI_CMP	V8HI_FTYPE_V8HI_V8HI_CMP
- #define MULTI_ARG_2_QI_CMP	V16QI_FTYPE_V16QI_V16QI_CMP
- #define MULTI_ARG_2_SF_TF	V4SF_FTYPE_V4SF_V4SF_TF
- #define MULTI_ARG_2_DF_TF	V2DF_FTYPE_V2DF_V2DF_TF
- #define MULTI_ARG_2_DI_TF	V2DI_FTYPE_V2DI_V2DI_TF
- #define MULTI_ARG_2_SI_TF	V4SI_FTYPE_V4SI_V4SI_TF
- #define MULTI_ARG_2_HI_TF	V8HI_FTYPE_V8HI_V8HI_TF
- #define MULTI_ARG_2_QI_TF	V16QI_FTYPE_V16QI_V16QI_TF
- #define MULTI_ARG_1_SF		V4SF_FTYPE_V4SF
- #define MULTI_ARG_1_DF		V2DF_FTYPE_V2DF
- #define MULTI_ARG_1_SF2		V8SF_FTYPE_V8SF
- #define MULTI_ARG_1_DF2		V4DF_FTYPE_V4DF
- #define MULTI_ARG_1_DI		V2DI_FTYPE_V2DI
- #define MULTI_ARG_1_SI		V4SI_FTYPE_V4SI
- #define MULTI_ARG_1_HI		V8HI_FTYPE_V8HI
- #define MULTI_ARG_1_QI		V16QI_FTYPE_V16QI
- #define MULTI_ARG_1_SI_DI	V2DI_FTYPE_V4SI
- #define MULTI_ARG_1_HI_DI	V2DI_FTYPE_V8HI
- #define MULTI_ARG_1_HI_SI	V4SI_FTYPE_V8HI
- #define MULTI_ARG_1_QI_DI	V2DI_FTYPE_V16QI
- #define MULTI_ARG_1_QI_SI	V4SI_FTYPE_V16QI
- #define MULTI_ARG_1_QI_HI	V8HI_FTYPE_V16QI
- 
- #define BDESC(mask, mask2, icode, name, code, comparison, flag)	\
-   { mask, mask2, icode, name, code, comparison, flag },
- #define BDESC_FIRST(kind, kindu, mask, mask2, icode, name, code, comparison, flag) \
- static const struct builtin_description bdesc_##kind[] =		    \
- {									    \
-   BDESC (mask, mask2, icode, name, code, comparison, flag)
- #define BDESC_END(kind, next_kind) \
- };
- 
- #include "i386-builtin.def"
- 
- #undef BDESC
- #undef BDESC_FIRST
- #undef BDESC_END
- 
- 
- /* TM vector builtins.  */
- 
- /* Reuse the existing x86-specific `struct builtin_description' cause
-    we're lazy.  Add casts to make them fit.  */
- static const struct builtin_description bdesc_tm[] =
- {
-   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WM64", (enum ix86_builtins) BUILT_IN_TM_STORE_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
-   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM64", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
-   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM64", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
-   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
-   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
-   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
-   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
- 
-   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WM128", (enum ix86_builtins) BUILT_IN_TM_STORE_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
-   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM128", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
-   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM128", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
-   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
-   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
-   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
-   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
- 
-   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WM256", (enum ix86_builtins) BUILT_IN_TM_STORE_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
-   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM256", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
-   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM256", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
-   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
-   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
-   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
-   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
- 
-   { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_LM64", (enum ix86_builtins) BUILT_IN_TM_LOG_M64, UNKNOWN, VOID_FTYPE_PCVOID },
-   { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_LM128", (enum ix86_builtins) BUILT_IN_TM_LOG_M128, UNKNOWN, VOID_FTYPE_PCVOID },
-   { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_LM256", (enum ix86_builtins) BUILT_IN_TM_LOG_M256, UNKNOWN, VOID_FTYPE_PCVOID },
- };
- 
- /* Initialize the transactional memory vector load/store builtins.  */
- 
- static void
- ix86_init_tm_builtins (void)
- {
-   enum ix86_builtin_func_type ftype;
-   const struct builtin_description *d;
-   size_t i;
-   tree decl;
-   tree attrs_load, attrs_type_load, attrs_store, attrs_type_store;
-   tree attrs_log, attrs_type_log;
- 
-   if (!flag_tm)
-     return;
- 
-   /* If there are no builtins defined, we must be compiling in a
-      language without trans-mem support.  */
-   if (!builtin_decl_explicit_p (BUILT_IN_TM_LOAD_1))
-     return;
- 
-   /* Use whatever attributes a normal TM load has.  */
-   decl = builtin_decl_explicit (BUILT_IN_TM_LOAD_1);
-   attrs_load = DECL_ATTRIBUTES (decl);
-   attrs_type_load = TYPE_ATTRIBUTES (TREE_TYPE (decl));
-   /* Use whatever attributes a normal TM store has.  */
-   decl = builtin_decl_explicit (BUILT_IN_TM_STORE_1);
-   attrs_store = DECL_ATTRIBUTES (decl);
-   attrs_type_store = TYPE_ATTRIBUTES (TREE_TYPE (decl));
-   /* Use whatever attributes a normal TM log has.  */
-   decl = builtin_decl_explicit (BUILT_IN_TM_LOG);
-   attrs_log = DECL_ATTRIBUTES (decl);
-   attrs_type_log = TYPE_ATTRIBUTES (TREE_TYPE (decl));
- 
-   for (i = 0, d = bdesc_tm;
-        i < ARRAY_SIZE (bdesc_tm);
-        i++, d++)
-     {
-       if ((d->mask & ix86_isa_flags) != 0
- 	  || (lang_hooks.builtin_function
- 	      == lang_hooks.builtin_function_ext_scope))
- 	{
- 	  tree type, attrs, attrs_type;
- 	  enum built_in_function code = (enum built_in_function) d->code;
- 
- 	  ftype = (enum ix86_builtin_func_type) d->flag;
- 	  type = ix86_get_builtin_func_type (ftype);
- 
- 	  if (BUILTIN_TM_LOAD_P (code))
- 	    {
- 	      attrs = attrs_load;
- 	      attrs_type = attrs_type_load;
- 	    }
- 	  else if (BUILTIN_TM_STORE_P (code))
- 	    {
- 	      attrs = attrs_store;
- 	      attrs_type = attrs_type_store;
- 	    }
- 	  else
- 	    {
- 	      attrs = attrs_log;
- 	      attrs_type = attrs_type_log;
- 	    }
- 	  decl = add_builtin_function (d->name, type, code, BUILT_IN_NORMAL,
- 				       /* The builtin without the prefix for
- 					  calling it directly.  */
- 				       d->name + strlen ("__builtin_"),
- 				       attrs);
- 	  /* add_builtin_function() will set the DECL_ATTRIBUTES, now
- 	     set the TYPE_ATTRIBUTES.  */
- 	  decl_attributes (&TREE_TYPE (decl), attrs_type, ATTR_FLAG_BUILT_IN);
- 
- 	  set_builtin_decl (code, decl, false);
- 	}
-     }
- }
- 
- /* Macros for verification of enum ix86_builtins order.  */
- #define BDESC_VERIFY(x, y, z) \
-   gcc_checking_assert ((x) == (enum ix86_builtins) ((y) + (z)))
- #define BDESC_VERIFYS(x, y, z) \
-   STATIC_ASSERT ((x) == (enum ix86_builtins) ((y) + (z)))
- 
- BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
- 	       IX86_BUILTIN__BDESC_COMI_LAST, 1);
- BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
- 	       IX86_BUILTIN__BDESC_PCMPESTR_LAST, 1);
- BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
- 	       IX86_BUILTIN__BDESC_PCMPISTR_LAST, 1);
- BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_FIRST,
- 	       IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST, 1);
- BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
- 	       IX86_BUILTIN__BDESC_ARGS_LAST, 1);
- BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
- 	       IX86_BUILTIN__BDESC_ROUND_ARGS_LAST, 1);
- BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_FIRST,
- 	       IX86_BUILTIN__BDESC_MULTI_ARG_LAST, 1);
- BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_NORMAL_FIRST,
- 	       IX86_BUILTIN__BDESC_CET_LAST, 1);
- BDESC_VERIFYS (IX86_BUILTIN_MAX,
- 	       IX86_BUILTIN__BDESC_CET_NORMAL_LAST, 1);
- 
- /* Set up all the MMX/SSE builtins, even builtins for instructions that are not
-    in the current target ISA to allow the user to compile particular modules
-    with different target specific options that differ from the command line
-    options.  */
- static void
- ix86_init_mmx_sse_builtins (void)
- {
-   const struct builtin_description * d;
-   enum ix86_builtin_func_type ftype;
-   size_t i;
- 
-   /* Add all special builtins with variable number of operands.  */
-   for (i = 0, d = bdesc_special_args;
-        i < ARRAY_SIZE (bdesc_special_args);
-        i++, d++)
-     {
-       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST, i);
-       if (d->name == 0)
- 	continue;
- 
-       ftype = (enum ix86_builtin_func_type) d->flag;
-       def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
-     }
-   BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST,
- 		 IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
- 		 ARRAY_SIZE (bdesc_special_args) - 1);
- 
-   /* Add all builtins with variable number of operands.  */
-   for (i = 0, d = bdesc_args;
-        i < ARRAY_SIZE (bdesc_args);
-        i++, d++)
-     {
-       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ARGS_FIRST, i);
-       if (d->name == 0)
- 	continue;
- 
-       ftype = (enum ix86_builtin_func_type) d->flag;
-       def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
-     }
-   BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_LAST,
- 		 IX86_BUILTIN__BDESC_ARGS_FIRST,
- 		 ARRAY_SIZE (bdesc_args) - 1);
- 
-   /* Add all builtins with rounding.  */
-   for (i = 0, d = bdesc_round_args;
-        i < ARRAY_SIZE (bdesc_round_args);
-        i++, d++)
-     {
-       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST, i);
-       if (d->name == 0)
- 	continue;
- 
-       ftype = (enum ix86_builtin_func_type) d->flag;
-       def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
-     }
-   BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_LAST,
- 		 IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
- 		 ARRAY_SIZE (bdesc_round_args) - 1);
- 
-   /* pcmpestr[im] insns.  */
-   for (i = 0, d = bdesc_pcmpestr;
-        i < ARRAY_SIZE (bdesc_pcmpestr);
-        i++, d++)
-     {
-       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPESTR_FIRST, i);
-       if (d->code == IX86_BUILTIN_PCMPESTRM128)
- 	ftype = V16QI_FTYPE_V16QI_INT_V16QI_INT_INT;
-       else
- 	ftype = INT_FTYPE_V16QI_INT_V16QI_INT_INT;
-       def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
-     }
-   BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_LAST,
- 		 IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
- 		 ARRAY_SIZE (bdesc_pcmpestr) - 1);
- 
-   /* pcmpistr[im] insns.  */
-   for (i = 0, d = bdesc_pcmpistr;
-        i < ARRAY_SIZE (bdesc_pcmpistr);
-        i++, d++)
-     {
-       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPISTR_FIRST, i);
-       if (d->code == IX86_BUILTIN_PCMPISTRM128)
- 	ftype = V16QI_FTYPE_V16QI_V16QI_INT;
-       else
- 	ftype = INT_FTYPE_V16QI_V16QI_INT;
-       def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
-     }
-   BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_LAST,
- 		 IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
- 		 ARRAY_SIZE (bdesc_pcmpistr) - 1);
- 
-   /* comi/ucomi insns.  */
-   for (i = 0, d = bdesc_comi; i < ARRAY_SIZE (bdesc_comi); i++, d++)
-     {
-       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_COMI_FIRST, i);
-       if (d->mask == OPTION_MASK_ISA_SSE2)
- 	ftype = INT_FTYPE_V2DF_V2DF;
-       else
- 	ftype = INT_FTYPE_V4SF_V4SF;
-       def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
-     }
-   BDESC_VERIFYS (IX86_BUILTIN__BDESC_COMI_LAST,
- 		 IX86_BUILTIN__BDESC_COMI_FIRST,
- 		 ARRAY_SIZE (bdesc_comi) - 1);
- 
-   /* SSE */
-   def_builtin (OPTION_MASK_ISA_SSE, 0,  "__builtin_ia32_ldmxcsr",
- 	       VOID_FTYPE_UNSIGNED, IX86_BUILTIN_LDMXCSR);
-   def_builtin_pure (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_stmxcsr",
- 		    UNSIGNED_FTYPE_VOID, IX86_BUILTIN_STMXCSR);
- 
-   /* SSE or 3DNow!A */
-   def_builtin (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
- 	       /* As it uses V4HImode, we have to require -mmmx too.  */
- 	       | OPTION_MASK_ISA_MMX, 0,
- 	       "__builtin_ia32_maskmovq", VOID_FTYPE_V8QI_V8QI_PCHAR,
- 	       IX86_BUILTIN_MASKMOVQ);
- 
-   /* SSE2 */
-   def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_maskmovdqu",
- 	       VOID_FTYPE_V16QI_V16QI_PCHAR, IX86_BUILTIN_MASKMOVDQU);
- 
-   def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_clflush",
- 	       VOID_FTYPE_PCVOID, IX86_BUILTIN_CLFLUSH);
-   x86_mfence = def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_mfence",
- 			    VOID_FTYPE_VOID, IX86_BUILTIN_MFENCE);
- 
-   /* SSE3.  */
-   def_builtin (OPTION_MASK_ISA_SSE3, 0, "__builtin_ia32_monitor",
- 	       VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITOR);
-   def_builtin (OPTION_MASK_ISA_SSE3, 0, "__builtin_ia32_mwait",
- 	       VOID_FTYPE_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAIT);
- 
-   /* AES */
-   def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
- 		     "__builtin_ia32_aesenc128",
- 		     V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENC128);
-   def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
- 		     "__builtin_ia32_aesenclast128",
- 		     V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENCLAST128);
-   def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
- 		     "__builtin_ia32_aesdec128",
- 		     V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDEC128);
-   def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
- 		     "__builtin_ia32_aesdeclast128",
- 		     V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDECLAST128);
-   def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
- 		     "__builtin_ia32_aesimc128",
- 		     V2DI_FTYPE_V2DI, IX86_BUILTIN_AESIMC128);
-   def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
- 		     "__builtin_ia32_aeskeygenassist128",
- 		     V2DI_FTYPE_V2DI_INT, IX86_BUILTIN_AESKEYGENASSIST128);
- 
-   /* PCLMUL */
-   def_builtin_const (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2, 0,
- 		     "__builtin_ia32_pclmulqdq128",
- 		     V2DI_FTYPE_V2DI_V2DI_INT, IX86_BUILTIN_PCLMULQDQ128);
- 
-   /* RDRND */
-   def_builtin (OPTION_MASK_ISA_RDRND, 0, "__builtin_ia32_rdrand16_step",
- 	       INT_FTYPE_PUSHORT, IX86_BUILTIN_RDRAND16_STEP);
-   def_builtin (OPTION_MASK_ISA_RDRND, 0,  "__builtin_ia32_rdrand32_step",
- 	       INT_FTYPE_PUNSIGNED, IX86_BUILTIN_RDRAND32_STEP);
-   def_builtin (OPTION_MASK_ISA_RDRND | OPTION_MASK_ISA_64BIT, 0,
- 	       "__builtin_ia32_rdrand64_step", INT_FTYPE_PULONGLONG,
- 	       IX86_BUILTIN_RDRAND64_STEP);
- 
-   /* AVX2 */
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv2df",
- 		    V2DF_FTYPE_V2DF_PCDOUBLE_V4SI_V2DF_INT,
- 		    IX86_BUILTIN_GATHERSIV2DF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4df",
- 		    V4DF_FTYPE_V4DF_PCDOUBLE_V4SI_V4DF_INT,
- 		    IX86_BUILTIN_GATHERSIV4DF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv2df",
- 		    V2DF_FTYPE_V2DF_PCDOUBLE_V2DI_V2DF_INT,
- 		    IX86_BUILTIN_GATHERDIV2DF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4df",
- 		    V4DF_FTYPE_V4DF_PCDOUBLE_V4DI_V4DF_INT,
- 		    IX86_BUILTIN_GATHERDIV4DF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4sf",
- 		    V4SF_FTYPE_V4SF_PCFLOAT_V4SI_V4SF_INT,
- 		    IX86_BUILTIN_GATHERSIV4SF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv8sf",
- 		    V8SF_FTYPE_V8SF_PCFLOAT_V8SI_V8SF_INT,
- 		    IX86_BUILTIN_GATHERSIV8SF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4sf",
- 		    V4SF_FTYPE_V4SF_PCFLOAT_V2DI_V4SF_INT,
- 		    IX86_BUILTIN_GATHERDIV4SF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4sf256",
- 		    V4SF_FTYPE_V4SF_PCFLOAT_V4DI_V4SF_INT,
- 		    IX86_BUILTIN_GATHERDIV8SF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv2di",
- 		    V2DI_FTYPE_V2DI_PCINT64_V4SI_V2DI_INT,
- 		    IX86_BUILTIN_GATHERSIV2DI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4di",
- 		    V4DI_FTYPE_V4DI_PCINT64_V4SI_V4DI_INT,
- 		    IX86_BUILTIN_GATHERSIV4DI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv2di",
- 		    V2DI_FTYPE_V2DI_PCINT64_V2DI_V2DI_INT,
- 		    IX86_BUILTIN_GATHERDIV2DI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4di",
- 		    V4DI_FTYPE_V4DI_PCINT64_V4DI_V4DI_INT,
- 		    IX86_BUILTIN_GATHERDIV4DI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4si",
- 		    V4SI_FTYPE_V4SI_PCINT_V4SI_V4SI_INT,
- 		    IX86_BUILTIN_GATHERSIV4SI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv8si",
- 		    V8SI_FTYPE_V8SI_PCINT_V8SI_V8SI_INT,
- 		    IX86_BUILTIN_GATHERSIV8SI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4si",
- 		    V4SI_FTYPE_V4SI_PCINT_V2DI_V4SI_INT,
- 		    IX86_BUILTIN_GATHERDIV4SI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4si256",
- 		    V4SI_FTYPE_V4SI_PCINT_V4DI_V4SI_INT,
- 		    IX86_BUILTIN_GATHERDIV8SI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltsiv4df ",
- 		    V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_V4DF_INT,
- 		    IX86_BUILTIN_GATHERALTSIV4DF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltdiv8sf ",
- 		    V8SF_FTYPE_V8SF_PCFLOAT_V4DI_V8SF_INT,
- 		    IX86_BUILTIN_GATHERALTDIV8SF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltsiv4di ",
- 		    V4DI_FTYPE_V4DI_PCINT64_V8SI_V4DI_INT,
- 		    IX86_BUILTIN_GATHERALTSIV4DI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltdiv8si ",
- 		    V8SI_FTYPE_V8SI_PCINT_V4DI_V8SI_INT,
- 		    IX86_BUILTIN_GATHERALTDIV8SI);
- 
-   /* AVX512F */
-   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv16sf",
- 		    V16SF_FTYPE_V16SF_PCVOID_V16SI_HI_INT,
- 		    IX86_BUILTIN_GATHER3SIV16SF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv8df",
- 		    V8DF_FTYPE_V8DF_PCVOID_V8SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3SIV8DF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv16sf",
- 		    V8SF_FTYPE_V8SF_PCVOID_V8DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3DIV16SF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv8df",
- 		    V8DF_FTYPE_V8DF_PCVOID_V8DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3DIV8DF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv16si",
- 		    V16SI_FTYPE_V16SI_PCVOID_V16SI_HI_INT,
- 		    IX86_BUILTIN_GATHER3SIV16SI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv8di",
- 		    V8DI_FTYPE_V8DI_PCVOID_V8SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3SIV8DI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv16si",
- 		    V8SI_FTYPE_V8SI_PCVOID_V8DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3DIV16SI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv8di",
- 		    V8DI_FTYPE_V8DI_PCVOID_V8DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3DIV8DI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altsiv8df ",
- 		    V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3ALTSIV8DF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altdiv16sf ",
- 		    V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT,
- 		    IX86_BUILTIN_GATHER3ALTDIV16SF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altsiv8di ",
- 		    V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3ALTSIV8DI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altdiv16si ",
- 		    V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT,
- 		    IX86_BUILTIN_GATHER3ALTDIV16SI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv16sf",
- 	       VOID_FTYPE_PVOID_HI_V16SI_V16SF_INT,
- 	       IX86_BUILTIN_SCATTERSIV16SF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv8df",
- 	       VOID_FTYPE_PVOID_QI_V8SI_V8DF_INT,
- 	       IX86_BUILTIN_SCATTERSIV8DF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv16sf",
- 	       VOID_FTYPE_PVOID_QI_V8DI_V8SF_INT,
- 	       IX86_BUILTIN_SCATTERDIV16SF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv8df",
- 	       VOID_FTYPE_PVOID_QI_V8DI_V8DF_INT,
- 	       IX86_BUILTIN_SCATTERDIV8DF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv16si",
- 	       VOID_FTYPE_PVOID_HI_V16SI_V16SI_INT,
- 	       IX86_BUILTIN_SCATTERSIV16SI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv8di",
- 	       VOID_FTYPE_PVOID_QI_V8SI_V8DI_INT,
- 	       IX86_BUILTIN_SCATTERSIV8DI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv16si",
- 	       VOID_FTYPE_PVOID_QI_V8DI_V8SI_INT,
- 	       IX86_BUILTIN_SCATTERDIV16SI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv8di",
- 	       VOID_FTYPE_PVOID_QI_V8DI_V8DI_INT,
- 	       IX86_BUILTIN_SCATTERDIV8DI);
- 
-   /* AVX512VL */
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv2df",
- 		    V2DF_FTYPE_V2DF_PCVOID_V4SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3SIV2DF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4df",
- 		    V4DF_FTYPE_V4DF_PCVOID_V4SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3SIV4DF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div2df",
- 		    V2DF_FTYPE_V2DF_PCVOID_V2DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3DIV2DF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4df",
- 		    V4DF_FTYPE_V4DF_PCVOID_V4DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3DIV4DF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4sf",
- 		    V4SF_FTYPE_V4SF_PCVOID_V4SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3SIV4SF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv8sf",
- 		    V8SF_FTYPE_V8SF_PCVOID_V8SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3SIV8SF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4sf",
- 		    V4SF_FTYPE_V4SF_PCVOID_V2DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3DIV4SF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div8sf",
- 		    V4SF_FTYPE_V4SF_PCVOID_V4DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3DIV8SF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv2di",
- 		    V2DI_FTYPE_V2DI_PCVOID_V4SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3SIV2DI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4di",
- 		    V4DI_FTYPE_V4DI_PCVOID_V4SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3SIV4DI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div2di",
- 		    V2DI_FTYPE_V2DI_PCVOID_V2DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3DIV2DI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4di",
- 		    V4DI_FTYPE_V4DI_PCVOID_V4DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3DIV4DI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4si",
- 		    V4SI_FTYPE_V4SI_PCVOID_V4SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3SIV4SI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv8si",
- 		    V8SI_FTYPE_V8SI_PCVOID_V8SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3SIV8SI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4si",
- 		    V4SI_FTYPE_V4SI_PCVOID_V2DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3DIV4SI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div8si",
- 		    V4SI_FTYPE_V4SI_PCVOID_V4DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3DIV8SI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altsiv4df ",
- 		    V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3ALTSIV4DF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altdiv8sf ",
- 		    V8SF_FTYPE_V8SF_PCFLOAT_V4DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3ALTDIV8SF);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altsiv4di ",
- 		    V4DI_FTYPE_V4DI_PCINT64_V8SI_QI_INT,
- 		    IX86_BUILTIN_GATHER3ALTSIV4DI);
- 
-   def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altdiv8si ",
- 		    V8SI_FTYPE_V8SI_PCINT_V4DI_QI_INT,
- 		    IX86_BUILTIN_GATHER3ALTDIV8SI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv8sf",
- 	       VOID_FTYPE_PVOID_QI_V8SI_V8SF_INT,
- 	       IX86_BUILTIN_SCATTERSIV8SF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4sf",
- 	       VOID_FTYPE_PVOID_QI_V4SI_V4SF_INT,
- 	       IX86_BUILTIN_SCATTERSIV4SF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4df",
- 	       VOID_FTYPE_PVOID_QI_V4SI_V4DF_INT,
- 	       IX86_BUILTIN_SCATTERSIV4DF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv2df",
- 	       VOID_FTYPE_PVOID_QI_V4SI_V2DF_INT,
- 	       IX86_BUILTIN_SCATTERSIV2DF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv8sf",
- 	       VOID_FTYPE_PVOID_QI_V4DI_V4SF_INT,
- 	       IX86_BUILTIN_SCATTERDIV8SF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4sf",
- 	       VOID_FTYPE_PVOID_QI_V2DI_V4SF_INT,
- 	       IX86_BUILTIN_SCATTERDIV4SF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4df",
- 	       VOID_FTYPE_PVOID_QI_V4DI_V4DF_INT,
- 	       IX86_BUILTIN_SCATTERDIV4DF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv2df",
- 	       VOID_FTYPE_PVOID_QI_V2DI_V2DF_INT,
- 	       IX86_BUILTIN_SCATTERDIV2DF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv8si",
- 	       VOID_FTYPE_PVOID_QI_V8SI_V8SI_INT,
- 	       IX86_BUILTIN_SCATTERSIV8SI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4si",
- 	       VOID_FTYPE_PVOID_QI_V4SI_V4SI_INT,
- 	       IX86_BUILTIN_SCATTERSIV4SI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4di",
- 	       VOID_FTYPE_PVOID_QI_V4SI_V4DI_INT,
- 	       IX86_BUILTIN_SCATTERSIV4DI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv2di",
- 	       VOID_FTYPE_PVOID_QI_V4SI_V2DI_INT,
- 	       IX86_BUILTIN_SCATTERSIV2DI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv8si",
- 	       VOID_FTYPE_PVOID_QI_V4DI_V4SI_INT,
- 	       IX86_BUILTIN_SCATTERDIV8SI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4si",
- 	       VOID_FTYPE_PVOID_QI_V2DI_V4SI_INT,
- 	       IX86_BUILTIN_SCATTERDIV4SI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4di",
- 	       VOID_FTYPE_PVOID_QI_V4DI_V4DI_INT,
- 	       IX86_BUILTIN_SCATTERDIV4DI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv2di",
- 	       VOID_FTYPE_PVOID_QI_V2DI_V2DI_INT,
- 	       IX86_BUILTIN_SCATTERDIV2DI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltsiv8df ",
- 	       VOID_FTYPE_PDOUBLE_QI_V16SI_V8DF_INT,
- 	       IX86_BUILTIN_SCATTERALTSIV8DF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltdiv16sf ",
- 	       VOID_FTYPE_PFLOAT_HI_V8DI_V16SF_INT,
- 	       IX86_BUILTIN_SCATTERALTDIV16SF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltsiv8di ",
- 	       VOID_FTYPE_PLONGLONG_QI_V16SI_V8DI_INT,
- 	       IX86_BUILTIN_SCATTERALTSIV8DI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltdiv16si ",
- 	       VOID_FTYPE_PINT_HI_V8DI_V16SI_INT,
- 	       IX86_BUILTIN_SCATTERALTDIV16SI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv4df ",
- 	       VOID_FTYPE_PDOUBLE_QI_V8SI_V4DF_INT,
- 	       IX86_BUILTIN_SCATTERALTSIV4DF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv8sf ",
- 	       VOID_FTYPE_PFLOAT_QI_V4DI_V8SF_INT,
- 	       IX86_BUILTIN_SCATTERALTDIV8SF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv4di ",
- 	       VOID_FTYPE_PLONGLONG_QI_V8SI_V4DI_INT,
- 	       IX86_BUILTIN_SCATTERALTSIV4DI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv8si ",
- 	       VOID_FTYPE_PINT_QI_V4DI_V8SI_INT,
- 	       IX86_BUILTIN_SCATTERALTDIV8SI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv2df ",
- 	       VOID_FTYPE_PDOUBLE_QI_V4SI_V2DF_INT,
- 	       IX86_BUILTIN_SCATTERALTSIV2DF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv4sf ",
- 	       VOID_FTYPE_PFLOAT_QI_V2DI_V4SF_INT,
- 	       IX86_BUILTIN_SCATTERALTDIV4SF);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv2di ",
- 	       VOID_FTYPE_PLONGLONG_QI_V4SI_V2DI_INT,
- 	       IX86_BUILTIN_SCATTERALTSIV2DI);
- 
-   def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv4si ",
- 	       VOID_FTYPE_PINT_QI_V2DI_V4SI_INT,
- 	       IX86_BUILTIN_SCATTERALTDIV4SI);
- 
-   /* AVX512PF */
-   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfdpd",
- 	       VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
- 	       IX86_BUILTIN_GATHERPFDPD);
-   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfdps",
- 	       VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
- 	       IX86_BUILTIN_GATHERPFDPS);
-   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfqpd",
- 	       VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
- 	       IX86_BUILTIN_GATHERPFQPD);
-   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfqps",
- 	       VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
- 	       IX86_BUILTIN_GATHERPFQPS);
-   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfdpd",
- 	       VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
- 	       IX86_BUILTIN_SCATTERPFDPD);
-   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfdps",
- 	       VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
- 	       IX86_BUILTIN_SCATTERPFDPS);
-   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfqpd",
- 	       VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
- 	       IX86_BUILTIN_SCATTERPFQPD);
-   def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfqps",
- 	       VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
- 	       IX86_BUILTIN_SCATTERPFQPS);
- 
-   /* SHA */
-   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1msg1",
- 		     V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1MSG1);
-   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1msg2",
- 		     V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1MSG2);
-   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1nexte",
- 		     V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1NEXTE);
-   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1rnds4",
- 		     V4SI_FTYPE_V4SI_V4SI_INT, IX86_BUILTIN_SHA1RNDS4);
-   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256msg1",
- 		     V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA256MSG1);
-   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256msg2",
- 		     V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA256MSG2);
-   def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256rnds2",
- 		     V4SI_FTYPE_V4SI_V4SI_V4SI, IX86_BUILTIN_SHA256RNDS2);
- 
-   /* RTM.  */
-   def_builtin (OPTION_MASK_ISA_RTM, 0, "__builtin_ia32_xabort",
- 	       VOID_FTYPE_UNSIGNED, IX86_BUILTIN_XABORT);
- 
-   /* MMX access to the vec_init patterns.  */
-   def_builtin_const (OPTION_MASK_ISA_MMX, 0, "__builtin_ia32_vec_init_v2si",
- 		     V2SI_FTYPE_INT_INT, IX86_BUILTIN_VEC_INIT_V2SI);
- 
-   def_builtin_const (OPTION_MASK_ISA_MMX, 0, "__builtin_ia32_vec_init_v4hi",
- 		     V4HI_FTYPE_HI_HI_HI_HI,
- 		     IX86_BUILTIN_VEC_INIT_V4HI);
- 
-   def_builtin_const (OPTION_MASK_ISA_MMX, 0, "__builtin_ia32_vec_init_v8qi",
- 		     V8QI_FTYPE_QI_QI_QI_QI_QI_QI_QI_QI,
- 		     IX86_BUILTIN_VEC_INIT_V8QI);
- 
-   /* Access to the vec_extract patterns.  */
-   def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v2df",
- 		     DOUBLE_FTYPE_V2DF_INT, IX86_BUILTIN_VEC_EXT_V2DF);
-   def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v2di",
- 		     DI_FTYPE_V2DI_INT, IX86_BUILTIN_VEC_EXT_V2DI);
-   def_builtin_const (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_vec_ext_v4sf",
- 		     FLOAT_FTYPE_V4SF_INT, IX86_BUILTIN_VEC_EXT_V4SF);
-   def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v4si",
- 		     SI_FTYPE_V4SI_INT, IX86_BUILTIN_VEC_EXT_V4SI);
-   def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v8hi",
- 		     HI_FTYPE_V8HI_INT, IX86_BUILTIN_VEC_EXT_V8HI);
- 
-   def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
- 		     /* As it uses V4HImode, we have to require -mmmx too.  */
- 		     | OPTION_MASK_ISA_MMX, 0,
- 		     "__builtin_ia32_vec_ext_v4hi",
- 		     HI_FTYPE_V4HI_INT, IX86_BUILTIN_VEC_EXT_V4HI);
- 
-   def_builtin_const (OPTION_MASK_ISA_MMX, 0, "__builtin_ia32_vec_ext_v2si",
- 		     SI_FTYPE_V2SI_INT, IX86_BUILTIN_VEC_EXT_V2SI);
- 
-   def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v16qi",
- 		     QI_FTYPE_V16QI_INT, IX86_BUILTIN_VEC_EXT_V16QI);
- 
-   /* Access to the vec_set patterns.  */
-   def_builtin_const (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_64BIT, 0,
- 		     "__builtin_ia32_vec_set_v2di",
- 		     V2DI_FTYPE_V2DI_DI_INT, IX86_BUILTIN_VEC_SET_V2DI);
- 
-   def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v4sf",
- 		     V4SF_FTYPE_V4SF_FLOAT_INT, IX86_BUILTIN_VEC_SET_V4SF);
- 
-   def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v4si",
- 		     V4SI_FTYPE_V4SI_SI_INT, IX86_BUILTIN_VEC_SET_V4SI);
- 
-   def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_set_v8hi",
- 		     V8HI_FTYPE_V8HI_HI_INT, IX86_BUILTIN_VEC_SET_V8HI);
- 
-   def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
- 		     /* As it uses V4HImode, we have to require -mmmx too.  */
- 		     | OPTION_MASK_ISA_MMX, 0,
- 		     "__builtin_ia32_vec_set_v4hi",
- 		     V4HI_FTYPE_V4HI_HI_INT, IX86_BUILTIN_VEC_SET_V4HI);
- 
-   def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v16qi",
- 		     V16QI_FTYPE_V16QI_QI_INT, IX86_BUILTIN_VEC_SET_V16QI);
- 
-   /* RDSEED */
-   def_builtin (OPTION_MASK_ISA_RDSEED, 0, "__builtin_ia32_rdseed_hi_step",
- 	       INT_FTYPE_PUSHORT, IX86_BUILTIN_RDSEED16_STEP);
-   def_builtin (OPTION_MASK_ISA_RDSEED, 0, "__builtin_ia32_rdseed_si_step",
- 	       INT_FTYPE_PUNSIGNED, IX86_BUILTIN_RDSEED32_STEP);
-   def_builtin (OPTION_MASK_ISA_RDSEED | OPTION_MASK_ISA_64BIT, 0,
- 	       "__builtin_ia32_rdseed_di_step",
- 	       INT_FTYPE_PULONGLONG, IX86_BUILTIN_RDSEED64_STEP);
- 
-   /* ADCX */
-   def_builtin (0, 0, "__builtin_ia32_addcarryx_u32",
- 	       UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, IX86_BUILTIN_ADDCARRYX32);
-   def_builtin (OPTION_MASK_ISA_64BIT, 0,
- 	       "__builtin_ia32_addcarryx_u64",
- 	       UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
- 	       IX86_BUILTIN_ADDCARRYX64);
- 
-   /* SBB */
-   def_builtin (0, 0, "__builtin_ia32_sbb_u32",
- 	       UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, IX86_BUILTIN_SBB32);
-   def_builtin (OPTION_MASK_ISA_64BIT, 0,
- 	       "__builtin_ia32_sbb_u64",
- 	       UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
- 	       IX86_BUILTIN_SBB64);
- 
-   /* Read/write FLAGS.  */
-   if (TARGET_64BIT)
-     {
-       def_builtin (OPTION_MASK_ISA_64BIT, 0, "__builtin_ia32_readeflags_u64",
- 		   UINT64_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS);
-       def_builtin (OPTION_MASK_ISA_64BIT, 0, "__builtin_ia32_writeeflags_u64",
- 		   VOID_FTYPE_UINT64, IX86_BUILTIN_WRITE_FLAGS);
-     }
-   else
-     {
-       def_builtin (0, 0, "__builtin_ia32_readeflags_u32",
- 		   UNSIGNED_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS);
-       def_builtin (0, 0, "__builtin_ia32_writeeflags_u32",
- 		   VOID_FTYPE_UNSIGNED, IX86_BUILTIN_WRITE_FLAGS);
-     }
- 
-   /* CLFLUSHOPT.  */
-   def_builtin (OPTION_MASK_ISA_CLFLUSHOPT, 0, "__builtin_ia32_clflushopt",
- 	       VOID_FTYPE_PCVOID, IX86_BUILTIN_CLFLUSHOPT);
- 
-   /* CLWB.  */
-   def_builtin (OPTION_MASK_ISA_CLWB, 0, "__builtin_ia32_clwb",
- 	       VOID_FTYPE_PCVOID, IX86_BUILTIN_CLWB);
- 
-   /* MONITORX and MWAITX.  */
-   def_builtin (0, OPTION_MASK_ISA_MWAITX, "__builtin_ia32_monitorx",
- 		VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITORX);
-   def_builtin (0, OPTION_MASK_ISA_MWAITX, "__builtin_ia32_mwaitx",
- 		VOID_FTYPE_UNSIGNED_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAITX);
- 
-   /* CLZERO.  */
-   def_builtin (0, OPTION_MASK_ISA_CLZERO, "__builtin_ia32_clzero",
- 		VOID_FTYPE_PCVOID, IX86_BUILTIN_CLZERO);
- 
-   /* WAITPKG.  */
-   def_builtin (0, OPTION_MASK_ISA_WAITPKG, "__builtin_ia32_umonitor",
- 	       VOID_FTYPE_PVOID, IX86_BUILTIN_UMONITOR);
-   def_builtin (0, OPTION_MASK_ISA_WAITPKG, "__builtin_ia32_umwait",
- 	       UINT8_FTYPE_UNSIGNED_UINT64, IX86_BUILTIN_UMWAIT);
-   def_builtin (0, OPTION_MASK_ISA_WAITPKG, "__builtin_ia32_tpause",
- 	       UINT8_FTYPE_UNSIGNED_UINT64, IX86_BUILTIN_TPAUSE);
- 
-   /* CLDEMOTE.  */
-   def_builtin (0, OPTION_MASK_ISA_CLDEMOTE, "__builtin_ia32_cldemote",
- 	       VOID_FTYPE_PCVOID, IX86_BUILTIN_CLDEMOTE);
- 
-   /* Add FMA4 multi-arg argument instructions */
-   for (i = 0, d = bdesc_multi_arg; i < ARRAY_SIZE (bdesc_multi_arg); i++, d++)
-     {
-       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_MULTI_ARG_FIRST, i);
-       if (d->name == 0)
- 	continue;
- 
-       ftype = (enum ix86_builtin_func_type) d->flag;
-       def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
-     }
-   BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_LAST,
- 		 IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
- 		 ARRAY_SIZE (bdesc_multi_arg) - 1);
- 
-   /* Add CET inrinsics.  */
-   for (i = 0, d = bdesc_cet; i < ARRAY_SIZE (bdesc_cet); i++, d++)
-     {
-       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_CET_FIRST, i);
-       if (d->name == 0)
- 	continue;
- 
-       ftype = (enum ix86_builtin_func_type) d->flag;
-       def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
-     }
-   BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_LAST,
- 		 IX86_BUILTIN__BDESC_CET_FIRST,
- 		 ARRAY_SIZE (bdesc_cet) - 1);
- 
-   for (i = 0, d = bdesc_cet_rdssp;
-        i < ARRAY_SIZE (bdesc_cet_rdssp);
-        i++, d++)
-     {
-       BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_CET_NORMAL_FIRST, i);
-       if (d->name == 0)
- 	continue;
- 
-       ftype = (enum ix86_builtin_func_type) d->flag;
-       def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
-     }
-   BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_NORMAL_LAST,
- 		 IX86_BUILTIN__BDESC_CET_NORMAL_FIRST,
- 		 ARRAY_SIZE (bdesc_cet_rdssp) - 1);
- }
- 
- #undef BDESC_VERIFY
- #undef BDESC_VERIFYS
- 
- /* This adds a condition to the basic_block NEW_BB in function FUNCTION_DECL
-    to return a pointer to VERSION_DECL if the outcome of the expression
-    formed by PREDICATE_CHAIN is true.  This function will be called during
-    version dispatch to decide which function version to execute.  It returns
-    the basic block at the end, to which more conditions can be added.  */
- 
- static basic_block
- add_condition_to_bb (tree function_decl, tree version_decl,
- 		     tree predicate_chain, basic_block new_bb)
- {
-   gimple *return_stmt;
-   tree convert_expr, result_var;
-   gimple *convert_stmt;
-   gimple *call_cond_stmt;
-   gimple *if_else_stmt;
- 
-   basic_block bb1, bb2, bb3;
-   edge e12, e23;
- 
-   tree cond_var, and_expr_var = NULL_TREE;
-   gimple_seq gseq;
- 
-   tree predicate_decl, predicate_arg;
- 
-   push_cfun (DECL_STRUCT_FUNCTION (function_decl));
- 
-   gcc_assert (new_bb != NULL);
-   gseq = bb_seq (new_bb);
- 
- 
-   convert_expr = build1 (CONVERT_EXPR, ptr_type_node,
- 	     		 build_fold_addr_expr (version_decl));
-   result_var = create_tmp_var (ptr_type_node);
-   convert_stmt = gimple_build_assign (result_var, convert_expr); 
-   return_stmt = gimple_build_return (result_var);
- 
-   if (predicate_chain == NULL_TREE)
-     {
-       gimple_seq_add_stmt (&gseq, convert_stmt);
-       gimple_seq_add_stmt (&gseq, return_stmt);
-       set_bb_seq (new_bb, gseq);
-       gimple_set_bb (convert_stmt, new_bb);
-       gimple_set_bb (return_stmt, new_bb);
-       pop_cfun ();
-       return new_bb;
-     }
- 
-   while (predicate_chain != NULL)
-     {
-       cond_var = create_tmp_var (integer_type_node);
-       predicate_decl = TREE_PURPOSE (predicate_chain);
-       predicate_arg = TREE_VALUE (predicate_chain);
-       call_cond_stmt = gimple_build_call (predicate_decl, 1, predicate_arg);
-       gimple_call_set_lhs (call_cond_stmt, cond_var);
- 
-       gimple_set_block (call_cond_stmt, DECL_INITIAL (function_decl));
-       gimple_set_bb (call_cond_stmt, new_bb);
-       gimple_seq_add_stmt (&gseq, call_cond_stmt);
- 
-       predicate_chain = TREE_CHAIN (predicate_chain);
-       
-       if (and_expr_var == NULL)
-         and_expr_var = cond_var;
-       else
- 	{
- 	  gimple *assign_stmt;
- 	  /* Use MIN_EXPR to check if any integer is zero?.
- 	     and_expr_var = min_expr <cond_var, and_expr_var>  */
- 	  assign_stmt = gimple_build_assign (and_expr_var,
- 			  build2 (MIN_EXPR, integer_type_node,
- 				  cond_var, and_expr_var));
- 
- 	  gimple_set_block (assign_stmt, DECL_INITIAL (function_decl));
- 	  gimple_set_bb (assign_stmt, new_bb);
- 	  gimple_seq_add_stmt (&gseq, assign_stmt);
- 	}
-     }
- 
-   if_else_stmt = gimple_build_cond (GT_EXPR, and_expr_var,
- 	  		            integer_zero_node,
- 				    NULL_TREE, NULL_TREE);
-   gimple_set_block (if_else_stmt, DECL_INITIAL (function_decl));
-   gimple_set_bb (if_else_stmt, new_bb);
-   gimple_seq_add_stmt (&gseq, if_else_stmt);
- 
-   gimple_seq_add_stmt (&gseq, convert_stmt);
-   gimple_seq_add_stmt (&gseq, return_stmt);
-   set_bb_seq (new_bb, gseq);
- 
-   bb1 = new_bb;
-   e12 = split_block (bb1, if_else_stmt);
-   bb2 = e12->dest;
-   e12->flags &= ~EDGE_FALLTHRU;
-   e12->flags |= EDGE_TRUE_VALUE;
- 
-   e23 = split_block (bb2, return_stmt);
- 
-   gimple_set_bb (convert_stmt, bb2);
-   gimple_set_bb (return_stmt, bb2);
- 
-   bb3 = e23->dest;
-   make_edge (bb1, bb3, EDGE_FALSE_VALUE); 
- 
-   remove_edge (e23);
-   make_edge (bb2, EXIT_BLOCK_PTR_FOR_FN (cfun), 0);
- 
-   pop_cfun ();
- 
-   return bb3;
- }
- 
- /* Priority of i386 features, greater value is higher priority.   This is
-    used to decide the order in which function dispatch must happen.  For
-    instance, a version specialized for SSE4.2 should be checked for dispatch
-    before a version for SSE3, as SSE4.2 implies SSE3.  */
- enum feature_priority
- {
-   P_ZERO = 0,
-   P_MMX,
-   P_SSE,
-   P_SSE2,
-   P_SSE3,
-   P_SSSE3,
-   P_PROC_SSSE3,
-   P_SSE4_A,
-   P_PROC_SSE4_A,
-   P_SSE4_1,
-   P_SSE4_2,
-   P_PROC_SSE4_2,
-   P_POPCNT,
-   P_AES,
-   P_PCLMUL,
-   P_AVX,
-   P_PROC_AVX,
-   P_BMI,
-   P_PROC_BMI,
-   P_FMA4,
-   P_XOP,
-   P_PROC_XOP,
-   P_FMA,
-   P_PROC_FMA,
-   P_BMI2,
-   P_AVX2,
-   P_PROC_AVX2,
-   P_AVX512F,
-   P_PROC_AVX512F
- };
- 
- /* This is the order of bit-fields in __processor_features in cpuinfo.c */
- enum processor_features
- {
-   F_CMOV = 0,
-   F_MMX,
-   F_POPCNT,
-   F_SSE,
-   F_SSE2,
-   F_SSE3,
-   F_SSSE3,
-   F_SSE4_1,
-   F_SSE4_2,
-   F_AVX,
-   F_AVX2,
-   F_SSE4_A,
-   F_FMA4,
-   F_XOP,
-   F_FMA,
-   F_AVX512F,
-   F_BMI,
-   F_BMI2,
-   F_AES,
-   F_PCLMUL,
-   F_AVX512VL,
-   F_AVX512BW,
-   F_AVX512DQ,
-   F_AVX512CD,
-   F_AVX512ER,
-   F_AVX512PF,
-   F_AVX512VBMI,
-   F_AVX512IFMA,
-   F_AVX5124VNNIW,
-   F_AVX5124FMAPS,
-   F_AVX512VPOPCNTDQ,
-   F_AVX512VBMI2,
-   F_GFNI,
-   F_VPCLMULQDQ,
-   F_AVX512VNNI,
-   F_AVX512BITALG,
-   F_MAX
- };
- 
- /* These are the values for vendor types and cpu types  and subtypes
-    in cpuinfo.c.  Cpu types and subtypes should be subtracted by
-    the corresponding start value.  */
- enum processor_model
- {
-   M_INTEL = 1,
-   M_AMD,
-   M_CPU_TYPE_START,
-   M_INTEL_BONNELL,
-   M_INTEL_CORE2,
-   M_INTEL_COREI7,
-   M_AMDFAM10H,
-   M_AMDFAM15H,
-   M_INTEL_SILVERMONT,
-   M_INTEL_KNL,
-   M_AMD_BTVER1,
-   M_AMD_BTVER2,
-   M_AMDFAM17H,
-   M_INTEL_KNM,
-   M_INTEL_GOLDMONT,
-   M_INTEL_GOLDMONT_PLUS,
-   M_INTEL_TREMONT,
-   M_CPU_SUBTYPE_START,
-   M_INTEL_COREI7_NEHALEM,
-   M_INTEL_COREI7_WESTMERE,
-   M_INTEL_COREI7_SANDYBRIDGE,
-   M_AMDFAM10H_BARCELONA,
-   M_AMDFAM10H_SHANGHAI,
-   M_AMDFAM10H_ISTANBUL,
-   M_AMDFAM15H_BDVER1,
-   M_AMDFAM15H_BDVER2,
-   M_AMDFAM15H_BDVER3,
-   M_AMDFAM15H_BDVER4,
-   M_AMDFAM17H_ZNVER1,
-   M_INTEL_COREI7_IVYBRIDGE,
-   M_INTEL_COREI7_HASWELL,
-   M_INTEL_COREI7_BROADWELL,
-   M_INTEL_COREI7_SKYLAKE,
-   M_INTEL_COREI7_SKYLAKE_AVX512,
-   M_INTEL_COREI7_CANNONLAKE,
-   M_INTEL_COREI7_ICELAKE_CLIENT,
-   M_INTEL_COREI7_ICELAKE_SERVER,
-   M_AMDFAM17H_ZNVER2,
-   M_INTEL_COREI7_CASCADELAKE
- };
- 
- struct _arch_names_table
- {
-   const char *const name;
-   const enum processor_model model;
- };
- 
- static const _arch_names_table arch_names_table[] =
- {
-   {"amd", M_AMD},
-   {"intel", M_INTEL},
-   {"atom", M_INTEL_BONNELL},
-   {"slm", M_INTEL_SILVERMONT},
-   {"core2", M_INTEL_CORE2},
-   {"corei7", M_INTEL_COREI7},
-   {"nehalem", M_INTEL_COREI7_NEHALEM},
-   {"westmere", M_INTEL_COREI7_WESTMERE},
-   {"sandybridge", M_INTEL_COREI7_SANDYBRIDGE},
-   {"ivybridge", M_INTEL_COREI7_IVYBRIDGE},
-   {"haswell", M_INTEL_COREI7_HASWELL},
-   {"broadwell", M_INTEL_COREI7_BROADWELL},
-   {"skylake", M_INTEL_COREI7_SKYLAKE},
-   {"skylake-avx512", M_INTEL_COREI7_SKYLAKE_AVX512},
-   {"cannonlake", M_INTEL_COREI7_CANNONLAKE},
-   {"icelake-client", M_INTEL_COREI7_ICELAKE_CLIENT},
-   {"icelake-server", M_INTEL_COREI7_ICELAKE_SERVER},
-   {"cascadelake", M_INTEL_COREI7_CASCADELAKE},
-   {"bonnell", M_INTEL_BONNELL},
-   {"silvermont", M_INTEL_SILVERMONT},
-   {"goldmont", M_INTEL_GOLDMONT},
-   {"goldmont-plus", M_INTEL_GOLDMONT_PLUS},
-   {"tremont", M_INTEL_TREMONT},
-   {"knl", M_INTEL_KNL},
-   {"knm", M_INTEL_KNM},
-   {"amdfam10h", M_AMDFAM10H},
-   {"barcelona", M_AMDFAM10H_BARCELONA},
-   {"shanghai", M_AMDFAM10H_SHANGHAI},
-   {"istanbul", M_AMDFAM10H_ISTANBUL},
-   {"btver1", M_AMD_BTVER1},
-   {"amdfam15h", M_AMDFAM15H},
-   {"bdver1", M_AMDFAM15H_BDVER1},
-   {"bdver2", M_AMDFAM15H_BDVER2},
-   {"bdver3", M_AMDFAM15H_BDVER3},
-   {"bdver4", M_AMDFAM15H_BDVER4},
-   {"btver2", M_AMD_BTVER2},
-   {"amdfam17h", M_AMDFAM17H},
-   {"znver1", M_AMDFAM17H_ZNVER1},
-   {"znver2", M_AMDFAM17H_ZNVER2},
- };
- 
- /* These are the target attribute strings for which a dispatcher is
-    available, from fold_builtin_cpu.  */
- struct _isa_names_table
- {
-   const char *const name;
-   const enum processor_features feature;
-   const enum feature_priority priority;
- };
- 
- static const _isa_names_table isa_names_table[] =
- {
-   {"cmov",    F_CMOV,	P_ZERO},
-   {"mmx",     F_MMX,	P_MMX},
-   {"popcnt",  F_POPCNT,	P_POPCNT},
-   {"sse",     F_SSE,	P_SSE},
-   {"sse2",    F_SSE2,	P_SSE2},
-   {"sse3",    F_SSE3,	P_SSE3},
-   {"ssse3",   F_SSSE3,	P_SSSE3},
-   {"sse4a",   F_SSE4_A,	P_SSE4_A},
-   {"sse4.1",  F_SSE4_1,	P_SSE4_1},
-   {"sse4.2",  F_SSE4_2,	P_SSE4_2},
-   {"avx",     F_AVX,	P_AVX},
-   {"fma4",    F_FMA4,	P_FMA4},
-   {"xop",     F_XOP,	P_XOP},
-   {"fma",     F_FMA,	P_FMA},
-   {"avx2",    F_AVX2,	P_AVX2},
-   {"avx512f", F_AVX512F, P_AVX512F},
-   {"bmi",     F_BMI,	P_BMI},
-   {"bmi2",    F_BMI2,	P_BMI2},
-   {"aes",     F_AES,	P_AES},
-   {"pclmul",  F_PCLMUL,	P_PCLMUL},
-   {"avx512vl",F_AVX512VL, P_ZERO},
-   {"avx512bw",F_AVX512BW, P_ZERO},
-   {"avx512dq",F_AVX512DQ, P_ZERO},
-   {"avx512cd",F_AVX512CD, P_ZERO},
-   {"avx512er",F_AVX512ER, P_ZERO},
-   {"avx512pf",F_AVX512PF, P_ZERO},
-   {"avx512vbmi",F_AVX512VBMI, P_ZERO},
-   {"avx512ifma",F_AVX512IFMA, P_ZERO},
-   {"avx5124vnniw",F_AVX5124VNNIW, P_ZERO},
-   {"avx5124fmaps",F_AVX5124FMAPS, P_ZERO},
-   {"avx512vpopcntdq",F_AVX512VPOPCNTDQ,	P_ZERO},
-   {"avx512vbmi2", F_AVX512VBMI2, P_ZERO},
-   {"gfni",	F_GFNI,	P_ZERO},
-   {"vpclmulqdq", F_VPCLMULQDQ, P_ZERO},
-   {"avx512vnni", F_AVX512VNNI, P_ZERO},
-   {"avx512bitalg", F_AVX512BITALG, P_ZERO}
- };
- 
- /* This parses the attribute arguments to target in DECL and determines
-    the right builtin to use to match the platform specification.
-    It returns the priority value for this version decl.  If PREDICATE_LIST
-    is not NULL, it stores the list of cpu features that need to be checked
-    before dispatching this function.  */
- 
- static unsigned int
- get_builtin_code_for_version (tree decl, tree *predicate_list)
- {
-   tree attrs;
-   struct cl_target_option cur_target;
-   tree target_node;
-   struct cl_target_option *new_target;
-   const char *arg_str = NULL;
-   const char *attrs_str = NULL;
-   char *tok_str = NULL;
-   char *token;
- 
-   enum feature_priority priority = P_ZERO;
- 
-   static unsigned int NUM_FEATURES
-     = sizeof (isa_names_table) / sizeof (_isa_names_table);
- 
-   unsigned int i;
- 
-   tree predicate_chain = NULL_TREE;
-   tree predicate_decl, predicate_arg;
- 
-   attrs = lookup_attribute ("target", DECL_ATTRIBUTES (decl));
-   gcc_assert (attrs != NULL);
- 
-   attrs = TREE_VALUE (TREE_VALUE (attrs));
- 
-   gcc_assert (TREE_CODE (attrs) == STRING_CST);
-   attrs_str = TREE_STRING_POINTER (attrs);
- 
-   /* Return priority zero for default function.  */
-   if (strcmp (attrs_str, "default") == 0)
-     return 0;
- 
-   /* Handle arch= if specified.  For priority, set it to be 1 more than
-      the best instruction set the processor can handle.  For instance, if
-      there is a version for atom and a version for ssse3 (the highest ISA
-      priority for atom), the atom version must be checked for dispatch
-      before the ssse3 version. */
-   if (strstr (attrs_str, "arch=") != NULL)
-     {
-       cl_target_option_save (&cur_target, &global_options);
-       target_node = ix86_valid_target_attribute_tree (attrs, &global_options,
- 						      &global_options_set);
-     
-       gcc_assert (target_node);
-       if (target_node == error_mark_node)
- 	return 0;
-       new_target = TREE_TARGET_OPTION (target_node);
-       gcc_assert (new_target);
-       
-       if (new_target->arch_specified && new_target->arch > 0)
- 	{
- 	  switch (new_target->arch)
- 	    {
- 	    case PROCESSOR_CORE2:
- 	      arg_str = "core2";
- 	      priority = P_PROC_SSSE3;
- 	      break;
- 	    case PROCESSOR_NEHALEM:
- 	      if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_PCLMUL)
- 		{
- 		  arg_str = "westmere";
- 		  priority = P_PCLMUL;
- 		}
- 	      else
- 		{
- 		  /* We translate "arch=corei7" and "arch=nehalem" to
- 		     "corei7" so that it will be mapped to M_INTEL_COREI7
- 		     as cpu type to cover all M_INTEL_COREI7_XXXs.  */
- 		  arg_str = "corei7";
- 		  priority = P_PROC_SSE4_2;
- 		}
- 	      break;
- 	    case PROCESSOR_SANDYBRIDGE:
- 	      if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_F16C)
- 		arg_str = "ivybridge";
- 	      else
- 		arg_str = "sandybridge";
- 	      priority = P_PROC_AVX;
- 	      break;
- 	    case PROCESSOR_HASWELL:
- 	      if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_ADX)
- 		arg_str = "broadwell";
- 	      else
- 		arg_str = "haswell";
- 	      priority = P_PROC_AVX2;
- 	      break;
- 	    case PROCESSOR_SKYLAKE:
- 	      arg_str = "skylake";
- 	      priority = P_PROC_AVX2;
- 	      break;
- 	    case PROCESSOR_SKYLAKE_AVX512:
- 	      arg_str = "skylake-avx512";
- 	      priority = P_PROC_AVX512F;
- 	      break;
- 	    case PROCESSOR_CANNONLAKE:
- 	      arg_str = "cannonlake";
- 	      priority = P_PROC_AVX512F;
- 	      break;
- 	    case PROCESSOR_ICELAKE_CLIENT:
- 	      arg_str = "icelake-client";
- 	      priority = P_PROC_AVX512F;
- 	      break;
- 	    case PROCESSOR_ICELAKE_SERVER:
- 	      arg_str = "icelake-server";
- 	      priority = P_PROC_AVX512F;
- 	      break;
- 	    case PROCESSOR_CASCADELAKE:
- 	      arg_str = "cascadelake";
- 	      priority = P_PROC_AVX512F;
- 	      break;
- 	    case PROCESSOR_BONNELL:
- 	      arg_str = "bonnell";
- 	      priority = P_PROC_SSSE3;
- 	      break;
- 	    case PROCESSOR_KNL:
- 	      arg_str = "knl";
- 	      priority = P_PROC_AVX512F;
- 	      break;
- 	    case PROCESSOR_KNM:
- 	      arg_str = "knm";
- 	      priority = P_PROC_AVX512F;
- 	      break;
- 	    case PROCESSOR_SILVERMONT:
- 	      arg_str = "silvermont";
- 	      priority = P_PROC_SSE4_2;
- 	      break;
- 	    case PROCESSOR_GOLDMONT:
- 	      arg_str = "goldmont";
- 	      priority = P_PROC_SSE4_2;
- 	      break;
- 	    case PROCESSOR_GOLDMONT_PLUS:
- 	      arg_str = "goldmont-plus";
- 	      priority = P_PROC_SSE4_2;
- 	      break;
- 	    case PROCESSOR_TREMONT:
- 	      arg_str = "tremont";
- 	      priority = P_PROC_SSE4_2;
- 	      break;
- 	    case PROCESSOR_AMDFAM10:
- 	      arg_str = "amdfam10h";
- 	      priority = P_PROC_SSE4_A;
- 	      break;
- 	    case PROCESSOR_BTVER1:
- 	      arg_str = "btver1";
- 	      priority = P_PROC_SSE4_A;
- 	      break;
- 	    case PROCESSOR_BTVER2:
- 	      arg_str = "btver2";
- 	      priority = P_PROC_BMI;
- 	      break;
- 	    case PROCESSOR_BDVER1:
- 	      arg_str = "bdver1";
- 	      priority = P_PROC_XOP;
- 	      break;
- 	    case PROCESSOR_BDVER2:
- 	      arg_str = "bdver2";
- 	      priority = P_PROC_FMA;
- 	      break;
- 	    case PROCESSOR_BDVER3:
- 	      arg_str = "bdver3";
- 	      priority = P_PROC_FMA;
- 	      break;
- 	    case PROCESSOR_BDVER4:
- 	      arg_str = "bdver4";
- 	      priority = P_PROC_AVX2;
- 	      break;
- 	    case PROCESSOR_ZNVER1:
- 	      arg_str = "znver1";
- 	      priority = P_PROC_AVX2;
- 	      break;
- 	    case PROCESSOR_ZNVER2:
- 	      arg_str = "znver2";
- 	      priority = P_PROC_AVX2;
- 	      break;
- 	    }
- 	}
- 
-       cl_target_option_restore (&global_options, &cur_target);
- 	
-       if (predicate_list && arg_str == NULL)
- 	{
- 	  error_at (DECL_SOURCE_LOCATION (decl),
- 		    "no dispatcher found for the versioning attributes");
- 	  return 0;
- 	}
-     
-       if (predicate_list)
- 	{
-           predicate_decl = ix86_builtins [(int) IX86_BUILTIN_CPU_IS];
-           /* For a C string literal the length includes the trailing NULL.  */
-           predicate_arg = build_string_literal (strlen (arg_str) + 1, arg_str);
-           predicate_chain = tree_cons (predicate_decl, predicate_arg,
- 				       predicate_chain);
- 	}
-     }
- 
-   /* Process feature name.  */
-   tok_str =  (char *) xmalloc (strlen (attrs_str) + 1);
-   strcpy (tok_str, attrs_str);
-   token = strtok (tok_str, ",");
-   predicate_decl = ix86_builtins [(int) IX86_BUILTIN_CPU_SUPPORTS];
- 
-   while (token != NULL)
-     {
-       /* Do not process "arch="  */
-       if (strncmp (token, "arch=", 5) == 0)
- 	{
- 	  token = strtok (NULL, ",");
- 	  continue;
- 	}
-       for (i = 0; i < NUM_FEATURES; ++i)
- 	{
- 	  if (strcmp (token, isa_names_table[i].name) == 0)
- 	    {
- 	      if (predicate_list)
- 		{
- 		  predicate_arg = build_string_literal (
- 				  strlen (isa_names_table[i].name) + 1,
- 				  isa_names_table[i].name);
- 		  predicate_chain = tree_cons (predicate_decl, predicate_arg,
- 					       predicate_chain);
- 		}
- 	      /* Find the maximum priority feature.  */
- 	      if (isa_names_table[i].priority > priority)
- 		priority = isa_names_table[i].priority;
- 
- 	      break;
- 	    }
- 	}
-       if (predicate_list && priority == P_ZERO)
- 	{
- 	  error_at (DECL_SOURCE_LOCATION (decl),
- 		    "ISA %qs is not supported in %<target%> attribute, "
- 		    "use %<arch=%> syntax", token);
- 	  return 0;
- 	}
-       token = strtok (NULL, ",");
-     }
-   free (tok_str);
- 
-   if (predicate_list && predicate_chain == NULL_TREE)
-     {
-       error_at (DECL_SOURCE_LOCATION (decl),
- 	        "no dispatcher found for the versioning attributes: %s",
- 	        attrs_str);
-       return 0;
-     }
-   else if (predicate_list)
-     {
-       predicate_chain = nreverse (predicate_chain);
-       *predicate_list = predicate_chain;
-     }
- 
-   return priority; 
- }
- 
- /* This compares the priority of target features in function DECL1
-    and DECL2.  It returns positive value if DECL1 is higher priority,
-    negative value if DECL2 is higher priority and 0 if they are the
-    same.  */
- 
- static int
- ix86_compare_version_priority (tree decl1, tree decl2)
- {
-   unsigned int priority1 = get_builtin_code_for_version (decl1, NULL);
-   unsigned int priority2 = get_builtin_code_for_version (decl2, NULL);
- 
-   return (int)priority1 - (int)priority2;
- }
- 
- /* V1 and V2 point to function versions with different priorities
-    based on the target ISA.  This function compares their priorities.  */
-  
- static int
- feature_compare (const void *v1, const void *v2)
- {
-   typedef struct _function_version_info
-     {
-       tree version_decl;
-       tree predicate_chain;
-       unsigned int dispatch_priority;
-     } function_version_info;
- 
-   const function_version_info c1 = *(const function_version_info *)v1;
-   const function_version_info c2 = *(const function_version_info *)v2;
-   return (c2.dispatch_priority - c1.dispatch_priority);
- }
- 
- /* This function generates the dispatch function for
-    multi-versioned functions.  DISPATCH_DECL is the function which will
-    contain the dispatch logic.  FNDECLS are the function choices for
-    dispatch, and is a tree chain.  EMPTY_BB is the basic block pointer
-    in DISPATCH_DECL in which the dispatch code is generated.  */
- 
- static int
- dispatch_function_versions (tree dispatch_decl,
- 			    void *fndecls_p,
- 			    basic_block *empty_bb)
- {
-   tree default_decl;
-   gimple *ifunc_cpu_init_stmt;
-   gimple_seq gseq;
-   int ix;
-   tree ele;
-   vec<tree> *fndecls;
-   unsigned int num_versions = 0;
-   unsigned int actual_versions = 0;
-   unsigned int i;
- 
-   struct _function_version_info
-     {
-       tree version_decl;
-       tree predicate_chain;
-       unsigned int dispatch_priority;
-     }*function_version_info;
- 
-   gcc_assert (dispatch_decl != NULL
- 	      && fndecls_p != NULL
- 	      && empty_bb != NULL);
- 
-   /*fndecls_p is actually a vector.  */
-   fndecls = static_cast<vec<tree> *> (fndecls_p);
- 
-   /* At least one more version other than the default.  */
-   num_versions = fndecls->length ();
-   gcc_assert (num_versions >= 2);
- 
-   function_version_info = (struct _function_version_info *)
-     XNEWVEC (struct _function_version_info, (num_versions - 1));
- 
-   /* The first version in the vector is the default decl.  */
-   default_decl = (*fndecls)[0];
- 
-   push_cfun (DECL_STRUCT_FUNCTION (dispatch_decl));
- 
-   gseq = bb_seq (*empty_bb);
-   /* Function version dispatch is via IFUNC.  IFUNC resolvers fire before
-      constructors, so explicity call __builtin_cpu_init here.  */
-   ifunc_cpu_init_stmt = gimple_build_call_vec (
-                      ix86_builtins [(int) IX86_BUILTIN_CPU_INIT], vNULL);
-   gimple_seq_add_stmt (&gseq, ifunc_cpu_init_stmt);
-   gimple_set_bb (ifunc_cpu_init_stmt, *empty_bb);
-   set_bb_seq (*empty_bb, gseq);
- 
-   pop_cfun ();
- 
- 
-   for (ix = 1; fndecls->iterate (ix, &ele); ++ix)
-     {
-       tree version_decl = ele;
-       tree predicate_chain = NULL_TREE;
-       unsigned int priority;
-       /* Get attribute string, parse it and find the right predicate decl.
-          The predicate function could be a lengthy combination of many
- 	 features, like arch-type and various isa-variants.  */
-       priority = get_builtin_code_for_version (version_decl,
- 	 			               &predicate_chain);
- 
-       if (predicate_chain == NULL_TREE)
- 	continue;
- 
-       function_version_info [actual_versions].version_decl = version_decl;
-       function_version_info [actual_versions].predicate_chain
- 	 = predicate_chain;
-       function_version_info [actual_versions].dispatch_priority = priority;
-       actual_versions++;
-     }
- 
-   /* Sort the versions according to descending order of dispatch priority.  The
-      priority is based on the ISA.  This is not a perfect solution.  There
-      could still be ambiguity.  If more than one function version is suitable
-      to execute,  which one should be dispatched?  In future, allow the user
-      to specify a dispatch  priority next to the version.  */
-   qsort (function_version_info, actual_versions,
-          sizeof (struct _function_version_info), feature_compare);
- 
-   for  (i = 0; i < actual_versions; ++i)
-     *empty_bb = add_condition_to_bb (dispatch_decl,
- 				     function_version_info[i].version_decl,
- 				     function_version_info[i].predicate_chain,
- 				     *empty_bb);
- 
-   /* dispatch default version at the end.  */
-   *empty_bb = add_condition_to_bb (dispatch_decl, default_decl,
- 				   NULL, *empty_bb);
- 
-   free (function_version_info);
-   return 0;
- }
- 
- /* This function changes the assembler name for functions that are
-    versions.  If DECL is a function version and has a "target"
-    attribute, it appends the attribute string to its assembler name.  */
- 
- static tree
- ix86_mangle_function_version_assembler_name (tree decl, tree id)
- {
-   tree version_attr;
-   const char *orig_name, *version_string;
-   char *attr_str, *assembler_name;
- 
-   if (DECL_DECLARED_INLINE_P (decl)
-       && lookup_attribute ("gnu_inline",
- 			   DECL_ATTRIBUTES (decl)))
-     error_at (DECL_SOURCE_LOCATION (decl),
- 	      "function versions cannot be marked as gnu_inline,"
- 	      " bodies have to be generated");
- 
-   if (DECL_VIRTUAL_P (decl)
-       || DECL_VINDEX (decl))
-     sorry ("virtual function multiversioning not supported");
- 
-   version_attr = lookup_attribute ("target", DECL_ATTRIBUTES (decl));
- 
-   /* target attribute string cannot be NULL.  */
-   gcc_assert (version_attr != NULL_TREE);
- 
-   orig_name = IDENTIFIER_POINTER (id);
-   version_string
-     = TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (version_attr)));
- 
-   if (strcmp (version_string, "default") == 0)
-     return id;
- 
-   attr_str = sorted_attr_string (TREE_VALUE (version_attr));
-   assembler_name = XNEWVEC (char, strlen (orig_name) + strlen (attr_str) + 2);
- 
-   sprintf (assembler_name, "%s.%s", orig_name, attr_str);
- 
-   /* Allow assembler name to be modified if already set.  */
-   if (DECL_ASSEMBLER_NAME_SET_P (decl))
-     SET_DECL_RTL (decl, NULL);
- 
-   tree ret = get_identifier (assembler_name);
-   XDELETEVEC (attr_str);
-   XDELETEVEC (assembler_name);
-   return ret;
- }
- 
- 
- static tree 
- ix86_mangle_decl_assembler_name (tree decl, tree id)
- {
-   /* For function version, add the target suffix to the assembler name.  */
-   if (TREE_CODE (decl) == FUNCTION_DECL
-       && DECL_FUNCTION_VERSIONED (decl))
-     id = ix86_mangle_function_version_assembler_name (decl, id);
- #ifdef SUBTARGET_MANGLE_DECL_ASSEMBLER_NAME
-   id = SUBTARGET_MANGLE_DECL_ASSEMBLER_NAME (decl, id);
- #endif
- 
-   return id;
- }
- 
- /* Make a dispatcher declaration for the multi-versioned function DECL.
-    Calls to DECL function will be replaced with calls to the dispatcher
-    by the front-end.  Returns the decl of the dispatcher function.  */
- 
- static tree
- ix86_get_function_versions_dispatcher (void *decl)
- {
-   tree fn = (tree) decl;
-   struct cgraph_node *node = NULL;
-   struct cgraph_node *default_node = NULL;
-   struct cgraph_function_version_info *node_v = NULL;
-   struct cgraph_function_version_info *first_v = NULL;
- 
-   tree dispatch_decl = NULL;
- 
-   struct cgraph_function_version_info *default_version_info = NULL;
-  
-   gcc_assert (fn != NULL && DECL_FUNCTION_VERSIONED (fn));
- 
-   node = cgraph_node::get (fn);
-   gcc_assert (node != NULL);
- 
-   node_v = node->function_version ();
-   gcc_assert (node_v != NULL);
-  
-   if (node_v->dispatcher_resolver != NULL)
-     return node_v->dispatcher_resolver;
- 
-   /* Find the default version and make it the first node.  */
-   first_v = node_v;
-   /* Go to the beginning of the chain.  */
-   while (first_v->prev != NULL)
-     first_v = first_v->prev;
-   default_version_info = first_v;
-   while (default_version_info != NULL)
-     {
-       if (is_function_default_version
- 	    (default_version_info->this_node->decl))
-         break;
-       default_version_info = default_version_info->next;
-     }
- 
-   /* If there is no default node, just return NULL.  */
-   if (default_version_info == NULL)
-     return NULL;
- 
-   /* Make default info the first node.  */
-   if (first_v != default_version_info)
-     {
-       default_version_info->prev->next = default_version_info->next;
-       if (default_version_info->next)
-         default_version_info->next->prev = default_version_info->prev;
-       first_v->prev = default_version_info;
-       default_version_info->next = first_v;
-       default_version_info->prev = NULL;
-     }
- 
-   default_node = default_version_info->this_node;
- 
- #if defined (ASM_OUTPUT_TYPE_DIRECTIVE)
-   if (targetm.has_ifunc_p ())
-     {
-       struct cgraph_function_version_info *it_v = NULL;
-       struct cgraph_node *dispatcher_node = NULL;
-       struct cgraph_function_version_info *dispatcher_version_info = NULL;
- 
-       /* Right now, the dispatching is done via ifunc.  */
-       dispatch_decl = make_dispatcher_decl (default_node->decl);
- 
-       dispatcher_node = cgraph_node::get_create (dispatch_decl);
-       gcc_assert (dispatcher_node != NULL);
-       dispatcher_node->dispatcher_function = 1;
-       dispatcher_version_info
- 	= dispatcher_node->insert_new_function_version ();
-       dispatcher_version_info->next = default_version_info;
-       dispatcher_node->definition = 1;
- 
-       /* Set the dispatcher for all the versions.  */
-       it_v = default_version_info;
-       while (it_v != NULL)
- 	{
- 	  it_v->dispatcher_resolver = dispatch_decl;
- 	  it_v = it_v->next;
- 	}
-     }
-   else
- #endif
-     {
-       error_at (DECL_SOURCE_LOCATION (default_node->decl),
- 		"multiversioning needs ifunc which is not supported "
- 		"on this target");
-     }
- 
-   return dispatch_decl;
- }
- 
- /* Make the resolver function decl to dispatch the versions of
-    a multi-versioned function,  DEFAULT_DECL.  IFUNC_ALIAS_DECL is
-    ifunc alias that will point to the created resolver.  Create an
-    empty basic block in the resolver and store the pointer in
-    EMPTY_BB.  Return the decl of the resolver function.  */
- 
- static tree
- make_resolver_func (const tree default_decl,
- 		    const tree ifunc_alias_decl,
- 		    basic_block *empty_bb)
- {
-   char *resolver_name;
-   tree decl, type, decl_name, t;
- 
-   /* IFUNC's have to be globally visible.  So, if the default_decl is
-      not, then the name of the IFUNC should be made unique.  */
-   if (TREE_PUBLIC (default_decl) == 0)
-     {
-       char *ifunc_name = make_unique_name (default_decl, "ifunc", true);
-       symtab->change_decl_assembler_name (ifunc_alias_decl,
- 					  get_identifier (ifunc_name));
-       XDELETEVEC (ifunc_name);
-     }
- 
-   resolver_name = make_unique_name (default_decl, "resolver", false);
- 
-   /* The resolver function should return a (void *). */
-   type = build_function_type_list (ptr_type_node, NULL_TREE);
- 
-   decl = build_fn_decl (resolver_name, type);
-   decl_name = get_identifier (resolver_name);
-   SET_DECL_ASSEMBLER_NAME (decl, decl_name);
- 
-   DECL_NAME (decl) = decl_name;
-   TREE_USED (decl) = 1;
-   DECL_ARTIFICIAL (decl) = 1;
-   DECL_IGNORED_P (decl) = 1;
-   TREE_PUBLIC (decl) = 0;
-   DECL_UNINLINABLE (decl) = 1;
- 
-   /* Resolver is not external, body is generated.  */
-   DECL_EXTERNAL (decl) = 0;
-   DECL_EXTERNAL (ifunc_alias_decl) = 0;
- 
-   DECL_CONTEXT (decl) = NULL_TREE;
-   DECL_INITIAL (decl) = make_node (BLOCK);
-   DECL_STATIC_CONSTRUCTOR (decl) = 0;
- 
-   if (DECL_COMDAT_GROUP (default_decl)
-       || TREE_PUBLIC (default_decl))
-     {
-       /* In this case, each translation unit with a call to this
- 	 versioned function will put out a resolver.  Ensure it
- 	 is comdat to keep just one copy.  */
-       DECL_COMDAT (decl) = 1;
-       make_decl_one_only (decl, DECL_ASSEMBLER_NAME (decl));
-     }
-   /* Build result decl and add to function_decl. */
-   t = build_decl (UNKNOWN_LOCATION, RESULT_DECL, NULL_TREE, ptr_type_node);
-   DECL_CONTEXT (t) = decl;
-   DECL_ARTIFICIAL (t) = 1;
-   DECL_IGNORED_P (t) = 1;
-   DECL_RESULT (decl) = t;
- 
-   gimplify_function_tree (decl);
-   push_cfun (DECL_STRUCT_FUNCTION (decl));
-   *empty_bb = init_lowered_empty_function (decl, false,
- 					   profile_count::uninitialized ());
- 
-   cgraph_node::add_new_function (decl, true);
-   symtab->call_cgraph_insertion_hooks (cgraph_node::get_create (decl));
- 
-   pop_cfun ();
- 
-   gcc_assert (ifunc_alias_decl != NULL);
-   /* Mark ifunc_alias_decl as "ifunc" with resolver as resolver_name.  */
-   DECL_ATTRIBUTES (ifunc_alias_decl)
-     = make_attribute ("ifunc", resolver_name,
- 		      DECL_ATTRIBUTES (ifunc_alias_decl));
- 
-   /* Create the alias for dispatch to resolver here.  */
-   cgraph_node::create_same_body_alias (ifunc_alias_decl, decl);
-   XDELETEVEC (resolver_name);
-   return decl;
- }
- 
- /* Generate the dispatching code body to dispatch multi-versioned function
-    DECL.  The target hook is called to process the "target" attributes and
-    provide the code to dispatch the right function at run-time.  NODE points
-    to the dispatcher decl whose body will be created.  */
- 
- static tree 
- ix86_generate_version_dispatcher_body (void *node_p)
- {
-   tree resolver_decl;
-   basic_block empty_bb;
-   tree default_ver_decl;
-   struct cgraph_node *versn;
-   struct cgraph_node *node;
- 
-   struct cgraph_function_version_info *node_version_info = NULL;
-   struct cgraph_function_version_info *versn_info = NULL;
- 
-   node = (cgraph_node *)node_p;
- 
-   node_version_info = node->function_version ();
-   gcc_assert (node->dispatcher_function
- 	      && node_version_info != NULL);
- 
-   if (node_version_info->dispatcher_resolver)
-     return node_version_info->dispatcher_resolver;
- 
-   /* The first version in the chain corresponds to the default version.  */
-   default_ver_decl = node_version_info->next->this_node->decl;
- 
-   /* node is going to be an alias, so remove the finalized bit.  */
-   node->definition = false;
- 
-   resolver_decl = make_resolver_func (default_ver_decl,
- 				      node->decl, &empty_bb);
- 
-   node_version_info->dispatcher_resolver = resolver_decl;
- 
-   push_cfun (DECL_STRUCT_FUNCTION (resolver_decl));
- 
-   auto_vec<tree, 2> fn_ver_vec;
- 
-   for (versn_info = node_version_info->next; versn_info;
-        versn_info = versn_info->next)
-     {
-       versn = versn_info->this_node;
-       /* Check for virtual functions here again, as by this time it should
- 	 have been determined if this function needs a vtable index or
- 	 not.  This happens for methods in derived classes that override
- 	 virtual methods in base classes but are not explicitly marked as
- 	 virtual.  */
-       if (DECL_VINDEX (versn->decl))
- 	sorry ("virtual function multiversioning not supported");
- 
-       fn_ver_vec.safe_push (versn->decl);
-     }
- 
-   dispatch_function_versions (resolver_decl, &fn_ver_vec, &empty_bb);
-   cgraph_edge::rebuild_edges ();
-   pop_cfun ();
-   return resolver_decl;
- }
- /* This builds the processor_model struct type defined in
-    libgcc/config/i386/cpuinfo.c  */
- 
- static tree
- build_processor_model_struct (void)
- {
-   const char *field_name[] = {"__cpu_vendor", "__cpu_type", "__cpu_subtype",
- 			      "__cpu_features"};
-   tree field = NULL_TREE, field_chain = NULL_TREE;
-   int i;
-   tree type = make_node (RECORD_TYPE);
- 
-   /* The first 3 fields are unsigned int.  */
-   for (i = 0; i < 3; ++i)
-     {
-       field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
- 			  get_identifier (field_name[i]), unsigned_type_node);
-       if (field_chain != NULL_TREE)
- 	DECL_CHAIN (field) = field_chain;
-       field_chain = field;
-     }
- 
-   /* The last field is an array of unsigned integers of size one.  */
-   field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
- 		      get_identifier (field_name[3]),
- 		      build_array_type (unsigned_type_node,
- 					build_index_type (size_one_node)));
-   if (field_chain != NULL_TREE)
-     DECL_CHAIN (field) = field_chain;
-   field_chain = field;
- 
-   finish_builtin_struct (type, "__processor_model", field_chain, NULL_TREE);
-   return type;
- }
- 
- /* Returns a extern, comdat VAR_DECL of type TYPE and name NAME. */
- 
- static tree
- make_var_decl (tree type, const char *name)
- {
-   tree new_decl;
- 
-   new_decl = build_decl (UNKNOWN_LOCATION,
- 	                 VAR_DECL,
- 	  	         get_identifier(name),
- 		         type);
- 
-   DECL_EXTERNAL (new_decl) = 1;
-   TREE_STATIC (new_decl) = 1;
-   TREE_PUBLIC (new_decl) = 1;
-   DECL_INITIAL (new_decl) = 0;
-   DECL_ARTIFICIAL (new_decl) = 0;
-   DECL_PRESERVE_P (new_decl) = 1;
- 
-   make_decl_one_only (new_decl, DECL_ASSEMBLER_NAME (new_decl));
-   assemble_variable (new_decl, 0, 0, 0);
- 
-   return new_decl;
- }
- 
- /* FNDECL is a __builtin_cpu_is or a __builtin_cpu_supports call that is folded
-    into an integer defined in libgcc/config/i386/cpuinfo.c */
- 
- static tree
- fold_builtin_cpu (tree fndecl, tree *args)
- {
-   unsigned int i;
-   enum ix86_builtins fn_code = (enum ix86_builtins)
- 				DECL_FUNCTION_CODE (fndecl);
-   tree param_string_cst = NULL;
- 
-   tree __processor_model_type = build_processor_model_struct ();
-   tree __cpu_model_var = make_var_decl (__processor_model_type,
- 					"__cpu_model");
- 
- 
-   varpool_node::add (__cpu_model_var);
- 
-   gcc_assert ((args != NULL) && (*args != NULL));
- 
-   param_string_cst = *args;
-   while (param_string_cst
- 	 && TREE_CODE (param_string_cst) !=  STRING_CST)
-     {
-       /* *args must be a expr that can contain other EXPRS leading to a
- 	 STRING_CST.   */
-       if (!EXPR_P (param_string_cst))
-  	{
- 	  error ("parameter to builtin must be a string constant or literal");
- 	  return integer_zero_node;
- 	}
-       param_string_cst = TREE_OPERAND (EXPR_CHECK (param_string_cst), 0);
-     }
- 
-   gcc_assert (param_string_cst);
- 
-   if (fn_code == IX86_BUILTIN_CPU_IS)
-     {
-       tree ref;
-       tree field;
-       tree final;
- 
-       unsigned int field_val = 0;
-       unsigned int NUM_ARCH_NAMES
- 	= sizeof (arch_names_table) / sizeof (struct _arch_names_table);
- 
-       for (i = 0; i < NUM_ARCH_NAMES; i++)
- 	if (strcmp (arch_names_table[i].name,
- 	    TREE_STRING_POINTER (param_string_cst)) == 0)
- 	  break;
- 
-       if (i == NUM_ARCH_NAMES)
- 	{
- 	  error ("parameter to builtin not valid: %s",
- 	         TREE_STRING_POINTER (param_string_cst));
- 	  return integer_zero_node;
- 	}
- 
-       field = TYPE_FIELDS (__processor_model_type);
-       field_val = arch_names_table[i].model;
- 
-       /* CPU types are stored in the next field.  */
-       if (field_val > M_CPU_TYPE_START
- 	  && field_val < M_CPU_SUBTYPE_START)
- 	{
- 	  field = DECL_CHAIN (field);
- 	  field_val -= M_CPU_TYPE_START;
- 	}
- 
-       /* CPU subtypes are stored in the next field.  */
-       if (field_val > M_CPU_SUBTYPE_START)
- 	{
- 	  field = DECL_CHAIN ( DECL_CHAIN (field));
- 	  field_val -= M_CPU_SUBTYPE_START;
- 	}
- 
-       /* Get the appropriate field in __cpu_model.  */
-       ref = build3 (COMPONENT_REF, TREE_TYPE (field), __cpu_model_var,
- 		    field, NULL_TREE);
- 
-       /* Check the value.  */
-       final = build2 (EQ_EXPR, unsigned_type_node, ref,
- 		      build_int_cstu (unsigned_type_node, field_val));
-       return build1 (CONVERT_EXPR, integer_type_node, final);
-     }
-   else if (fn_code == IX86_BUILTIN_CPU_SUPPORTS)
-     {
-       tree ref;
-       tree array_elt;
-       tree field;
-       tree final;
- 
-       unsigned int field_val = 0;
-       unsigned int NUM_ISA_NAMES
- 	= sizeof (isa_names_table) / sizeof (struct _isa_names_table);
- 
-       for (i = 0; i < NUM_ISA_NAMES; i++)
- 	if (strcmp (isa_names_table[i].name,
- 	    TREE_STRING_POINTER (param_string_cst)) == 0)
- 	  break;
- 
-       if (i == NUM_ISA_NAMES)
- 	{
- 	  error ("parameter to builtin not valid: %s",
- 	       	 TREE_STRING_POINTER (param_string_cst));
- 	  return integer_zero_node;
- 	}
- 
-       if (isa_names_table[i].feature >= 32)
- 	{
- 	  tree __cpu_features2_var = make_var_decl (unsigned_type_node,
- 						    "__cpu_features2");
- 
- 	  varpool_node::add (__cpu_features2_var);
- 	  field_val = (1U << (isa_names_table[i].feature - 32));
- 	  /* Return __cpu_features2 & field_val  */
- 	  final = build2 (BIT_AND_EXPR, unsigned_type_node,
- 			  __cpu_features2_var,
- 			  build_int_cstu (unsigned_type_node, field_val));
- 	  return build1 (CONVERT_EXPR, integer_type_node, final);
- 	}
- 
-       field = TYPE_FIELDS (__processor_model_type);
-       /* Get the last field, which is __cpu_features.  */
-       while (DECL_CHAIN (field))
-         field = DECL_CHAIN (field);
- 
-       /* Get the appropriate field: __cpu_model.__cpu_features  */
-       ref = build3 (COMPONENT_REF, TREE_TYPE (field), __cpu_model_var,
- 		    field, NULL_TREE);
- 
-       /* Access the 0th element of __cpu_features array.  */
-       array_elt = build4 (ARRAY_REF, unsigned_type_node, ref,
- 			  integer_zero_node, NULL_TREE, NULL_TREE);
- 
-       field_val = (1U << isa_names_table[i].feature);
-       /* Return __cpu_model.__cpu_features[0] & field_val  */
-       final = build2 (BIT_AND_EXPR, unsigned_type_node, array_elt,
- 		      build_int_cstu (unsigned_type_node, field_val));
-       return build1 (CONVERT_EXPR, integer_type_node, final);
-     }
-   gcc_unreachable ();
- }
- 
  /* Return the shift count of a vector by scalar shift builtin second argument
     ARG1.  */
  static tree
--- 17124,17129 ----
*************** ix86_fold_builtin (tree fndecl, int n_ar
*** 33031,33038 ****
  {
    if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_MD)
      {
!       enum ix86_builtins fn_code = (enum ix86_builtins)
! 				   DECL_FUNCTION_CODE (fndecl);
        enum rtx_code rcode;
        bool is_vshift;
        unsigned HOST_WIDE_INT mask;
--- 17152,17159 ----
  {
    if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_MD)
      {
!       enum ix86_builtins fn_code
! 	= (enum ix86_builtins) DECL_MD_FUNCTION_CODE (fndecl);
        enum rtx_code rcode;
        bool is_vshift;
        unsigned HOST_WIDE_INT mask;
*************** ix86_gimple_fold_builtin (gimple_stmt_it
*** 33502,33510 ****
    tree fndecl = gimple_call_fndecl (stmt);
    gcc_checking_assert (fndecl && fndecl_built_in_p (fndecl, BUILT_IN_MD));
    int n_args = gimple_call_num_args (stmt);
!   enum ix86_builtins fn_code = (enum ix86_builtins) DECL_FUNCTION_CODE (fndecl);
    tree decl = NULL_TREE;
!   tree arg0, arg1;
    enum rtx_code rcode;
    unsigned HOST_WIDE_INT count;
    bool is_vshift;
--- 17623,17632 ----
    tree fndecl = gimple_call_fndecl (stmt);
    gcc_checking_assert (fndecl && fndecl_built_in_p (fndecl, BUILT_IN_MD));
    int n_args = gimple_call_num_args (stmt);
!   enum ix86_builtins fn_code
!     = (enum ix86_builtins) DECL_MD_FUNCTION_CODE (fndecl);
    tree decl = NULL_TREE;
!   tree arg0, arg1, arg2;
    enum rtx_code rcode;
    unsigned HOST_WIDE_INT count;
    bool is_vshift;
*************** ix86_gimple_fold_builtin (gimple_stmt_it
*** 33808,39026 ****
  	}
        break;
  
!     default:
!       break;
!     }
! 
!   return false;
! }
! 
! /* Make builtins to detect cpu type and features supported.  NAME is
!    the builtin name, CODE is the builtin code, and FTYPE is the function
!    type of the builtin.  */
! 
! static void
! make_cpu_type_builtin (const char* name, int code,
! 		       enum ix86_builtin_func_type ftype, bool is_const)
! {
!   tree decl;
!   tree type;
! 
!   type = ix86_get_builtin_func_type (ftype);
!   decl = add_builtin_function (name, type, code, BUILT_IN_MD,
! 			       NULL, NULL_TREE);
!   gcc_assert (decl != NULL_TREE);
!   ix86_builtins[(int) code] = decl;
!   TREE_READONLY (decl) = is_const;
! }
! 
! /* Make builtins to get CPU type and features supported.  The created
!    builtins are :
! 
!    __builtin_cpu_init (), to detect cpu type and features,
!    __builtin_cpu_is ("<CPUNAME>"), to check if cpu is of type <CPUNAME>,
!    __builtin_cpu_supports ("<FEATURE>"), to check if cpu supports <FEATURE>
!    */
! 
! static void
! ix86_init_platform_type_builtins (void)
! {
!   make_cpu_type_builtin ("__builtin_cpu_init", IX86_BUILTIN_CPU_INIT,
! 			 INT_FTYPE_VOID, false);
!   make_cpu_type_builtin ("__builtin_cpu_is", IX86_BUILTIN_CPU_IS,
! 			 INT_FTYPE_PCCHAR, true);
!   make_cpu_type_builtin ("__builtin_cpu_supports", IX86_BUILTIN_CPU_SUPPORTS,
! 			 INT_FTYPE_PCCHAR, true);
! }
! 
! /* Internal method for ix86_init_builtins.  */
! 
! static void
! ix86_init_builtins_va_builtins_abi (void)
! {
!   tree ms_va_ref, sysv_va_ref;
!   tree fnvoid_va_end_ms, fnvoid_va_end_sysv;
!   tree fnvoid_va_start_ms, fnvoid_va_start_sysv;
!   tree fnvoid_va_copy_ms, fnvoid_va_copy_sysv;
!   tree fnattr_ms = NULL_TREE, fnattr_sysv = NULL_TREE;
! 
!   if (!TARGET_64BIT)
!     return;
!   fnattr_ms = build_tree_list (get_identifier ("ms_abi"), NULL_TREE);
!   fnattr_sysv = build_tree_list (get_identifier ("sysv_abi"), NULL_TREE);
!   ms_va_ref = build_reference_type (ms_va_list_type_node);
!   sysv_va_ref = build_pointer_type (TREE_TYPE (sysv_va_list_type_node));
! 
!   fnvoid_va_end_ms = build_function_type_list (void_type_node, ms_va_ref,
! 					       NULL_TREE);
!   fnvoid_va_start_ms
!     = build_varargs_function_type_list (void_type_node, ms_va_ref, NULL_TREE);
!   fnvoid_va_end_sysv
!     = build_function_type_list (void_type_node, sysv_va_ref, NULL_TREE);
!   fnvoid_va_start_sysv
!     = build_varargs_function_type_list (void_type_node, sysv_va_ref,
! 					NULL_TREE);
!   fnvoid_va_copy_ms
!     = build_function_type_list (void_type_node, ms_va_ref,
! 				ms_va_list_type_node, NULL_TREE);
!   fnvoid_va_copy_sysv
!     = build_function_type_list (void_type_node, sysv_va_ref,
! 				sysv_va_ref, NULL_TREE);
! 
!   add_builtin_function ("__builtin_ms_va_start", fnvoid_va_start_ms,
!   			BUILT_IN_VA_START, BUILT_IN_NORMAL, NULL, fnattr_ms);
!   add_builtin_function ("__builtin_ms_va_end", fnvoid_va_end_ms,
!   			BUILT_IN_VA_END, BUILT_IN_NORMAL, NULL, fnattr_ms);
!   add_builtin_function ("__builtin_ms_va_copy", fnvoid_va_copy_ms,
! 			BUILT_IN_VA_COPY, BUILT_IN_NORMAL, NULL, fnattr_ms);
!   add_builtin_function ("__builtin_sysv_va_start", fnvoid_va_start_sysv,
!   			BUILT_IN_VA_START, BUILT_IN_NORMAL, NULL, fnattr_sysv);
!   add_builtin_function ("__builtin_sysv_va_end", fnvoid_va_end_sysv,
!   			BUILT_IN_VA_END, BUILT_IN_NORMAL, NULL, fnattr_sysv);
!   add_builtin_function ("__builtin_sysv_va_copy", fnvoid_va_copy_sysv,
! 			BUILT_IN_VA_COPY, BUILT_IN_NORMAL, NULL, fnattr_sysv);
! }
! 
! static void
! ix86_init_builtin_types (void)
! {
!   tree float80_type_node, const_string_type_node;
! 
!   /* The __float80 type.  */
!   float80_type_node = long_double_type_node;
!   if (TYPE_MODE (float80_type_node) != XFmode)
!     {
!       if (float64x_type_node != NULL_TREE
! 	  && TYPE_MODE (float64x_type_node) == XFmode)
! 	float80_type_node = float64x_type_node;
!       else
! 	{
! 	  /* The __float80 type.  */
! 	  float80_type_node = make_node (REAL_TYPE);
! 
! 	  TYPE_PRECISION (float80_type_node) = 80;
! 	  layout_type (float80_type_node);
! 	}
!     }
!   lang_hooks.types.register_builtin_type (float80_type_node, "__float80");
! 
!   /* The __float128 type.  The node has already been created as
!      _Float128, so we only need to register the __float128 name for
!      it.  */
!   lang_hooks.types.register_builtin_type (float128_type_node, "__float128");
! 
!   const_string_type_node
!     = build_pointer_type (build_qualified_type
! 			  (char_type_node, TYPE_QUAL_CONST));
! 
!   /* This macro is built by i386-builtin-types.awk.  */
!   DEFINE_BUILTIN_PRIMITIVE_TYPES;
! }
! 
! static void
! ix86_init_builtins (void)
! {
!   tree ftype, decl;
! 
!   ix86_init_builtin_types ();
! 
!   /* Builtins to get CPU type and features. */
!   ix86_init_platform_type_builtins ();
! 
!   /* TFmode support builtins.  */
!   def_builtin_const (0, 0, "__builtin_infq",
! 		     FLOAT128_FTYPE_VOID, IX86_BUILTIN_INFQ);
!   def_builtin_const (0, 0, "__builtin_huge_valq",
! 		     FLOAT128_FTYPE_VOID, IX86_BUILTIN_HUGE_VALQ);
! 
!   ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_CONST_STRING);
!   decl = add_builtin_function ("__builtin_nanq", ftype, IX86_BUILTIN_NANQ,
! 			       BUILT_IN_MD, "nanq", NULL_TREE);
!   TREE_READONLY (decl) = 1;
!   ix86_builtins[(int) IX86_BUILTIN_NANQ] = decl;
! 
!   decl = add_builtin_function ("__builtin_nansq", ftype, IX86_BUILTIN_NANSQ,
! 			       BUILT_IN_MD, "nansq", NULL_TREE);
!   TREE_READONLY (decl) = 1;
!   ix86_builtins[(int) IX86_BUILTIN_NANSQ] = decl;
! 
!   /* We will expand them to normal call if SSE isn't available since
!      they are used by libgcc. */
!   ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128);
!   decl = add_builtin_function ("__builtin_fabsq", ftype, IX86_BUILTIN_FABSQ,
! 			       BUILT_IN_MD, "__fabstf2", NULL_TREE);
!   TREE_READONLY (decl) = 1;
!   ix86_builtins[(int) IX86_BUILTIN_FABSQ] = decl;
! 
!   ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128_FLOAT128);
!   decl = add_builtin_function ("__builtin_copysignq", ftype,
! 			       IX86_BUILTIN_COPYSIGNQ, BUILT_IN_MD,
! 			       "__copysigntf3", NULL_TREE);
!   TREE_READONLY (decl) = 1;
!   ix86_builtins[(int) IX86_BUILTIN_COPYSIGNQ] = decl;
! 
!   ix86_init_tm_builtins ();
!   ix86_init_mmx_sse_builtins ();
! 
!   if (TARGET_LP64)
!     ix86_init_builtins_va_builtins_abi ();
! 
! #ifdef SUBTARGET_INIT_BUILTINS
!   SUBTARGET_INIT_BUILTINS;
! #endif
! }
! 
! /* Return the ix86 builtin for CODE.  */
! 
! static tree
! ix86_builtin_decl (unsigned code, bool)
! {
!   if (code >= IX86_BUILTIN_MAX)
!     return error_mark_node;
! 
!   return ix86_builtins[code];
! }
! 
! /* Errors in the source file can cause expand_expr to return const0_rtx
!    where we expect a vector.  To avoid crashing, use one of the vector
!    clear instructions.  */
! static rtx
! safe_vector_operand (rtx x, machine_mode mode)
! {
!   if (x == const0_rtx)
!     x = CONST0_RTX (mode);
!   return x;
! }
! 
! /* Fixup modeless constants to fit required mode.  */
! static rtx
! fixup_modeless_constant (rtx x, machine_mode mode)
! {
!   if (GET_MODE (x) == VOIDmode)
!     x = convert_to_mode (mode, x, 1);
!   return x;
! }
! 
! /* Subroutine of ix86_expand_builtin to take care of binop insns.  */
! 
! static rtx
! ix86_expand_binop_builtin (enum insn_code icode, tree exp, rtx target)
! {
!   rtx pat;
!   tree arg0 = CALL_EXPR_ARG (exp, 0);
!   tree arg1 = CALL_EXPR_ARG (exp, 1);
!   rtx op0 = expand_normal (arg0);
!   rtx op1 = expand_normal (arg1);
!   machine_mode tmode = insn_data[icode].operand[0].mode;
!   machine_mode mode0 = insn_data[icode].operand[1].mode;
!   machine_mode mode1 = insn_data[icode].operand[2].mode;
! 
!   if (VECTOR_MODE_P (mode0))
!     op0 = safe_vector_operand (op0, mode0);
!   if (VECTOR_MODE_P (mode1))
!     op1 = safe_vector_operand (op1, mode1);
! 
!   if (optimize || !target
!       || GET_MODE (target) != tmode
!       || !insn_data[icode].operand[0].predicate (target, tmode))
!     target = gen_reg_rtx (tmode);
! 
!   if (GET_MODE (op1) == SImode && mode1 == TImode)
!     {
!       rtx x = gen_reg_rtx (V4SImode);
!       emit_insn (gen_sse2_loadd (x, op1));
!       op1 = gen_lowpart (TImode, x);
!     }
! 
!   if (!insn_data[icode].operand[1].predicate (op0, mode0))
!     op0 = copy_to_mode_reg (mode0, op0);
!   if (!insn_data[icode].operand[2].predicate (op1, mode1))
!     op1 = copy_to_mode_reg (mode1, op1);
! 
!   pat = GEN_FCN (icode) (target, op0, op1);
!   if (! pat)
!     return 0;
! 
!   emit_insn (pat);
! 
!   return target;
! }
! 
! /* Subroutine of ix86_expand_builtin to take care of 2-4 argument insns.  */
! 
! static rtx
! ix86_expand_multi_arg_builtin (enum insn_code icode, tree exp, rtx target,
! 			       enum ix86_builtin_func_type m_type,
! 			       enum rtx_code sub_code)
! {
!   rtx pat;
!   int i;
!   int nargs;
!   bool comparison_p = false;
!   bool tf_p = false;
!   bool last_arg_constant = false;
!   int num_memory = 0;
!   struct {
!     rtx op;
!     machine_mode mode;
!   } args[4];
! 
!   machine_mode tmode = insn_data[icode].operand[0].mode;
! 
!   switch (m_type)
!     {
!     case MULTI_ARG_4_DF2_DI_I:
!     case MULTI_ARG_4_DF2_DI_I1:
!     case MULTI_ARG_4_SF2_SI_I:
!     case MULTI_ARG_4_SF2_SI_I1:
!       nargs = 4;
!       last_arg_constant = true;
!       break;
! 
!     case MULTI_ARG_3_SF:
!     case MULTI_ARG_3_DF:
!     case MULTI_ARG_3_SF2:
!     case MULTI_ARG_3_DF2:
!     case MULTI_ARG_3_DI:
!     case MULTI_ARG_3_SI:
!     case MULTI_ARG_3_SI_DI:
!     case MULTI_ARG_3_HI:
!     case MULTI_ARG_3_HI_SI:
!     case MULTI_ARG_3_QI:
!     case MULTI_ARG_3_DI2:
!     case MULTI_ARG_3_SI2:
!     case MULTI_ARG_3_HI2:
!     case MULTI_ARG_3_QI2:
!       nargs = 3;
!       break;
! 
!     case MULTI_ARG_2_SF:
!     case MULTI_ARG_2_DF:
!     case MULTI_ARG_2_DI:
!     case MULTI_ARG_2_SI:
!     case MULTI_ARG_2_HI:
!     case MULTI_ARG_2_QI:
!       nargs = 2;
!       break;
! 
!     case MULTI_ARG_2_DI_IMM:
!     case MULTI_ARG_2_SI_IMM:
!     case MULTI_ARG_2_HI_IMM:
!     case MULTI_ARG_2_QI_IMM:
!       nargs = 2;
!       last_arg_constant = true;
!       break;
! 
!     case MULTI_ARG_1_SF:
!     case MULTI_ARG_1_DF:
!     case MULTI_ARG_1_SF2:
!     case MULTI_ARG_1_DF2:
!     case MULTI_ARG_1_DI:
!     case MULTI_ARG_1_SI:
!     case MULTI_ARG_1_HI:
!     case MULTI_ARG_1_QI:
!     case MULTI_ARG_1_SI_DI:
!     case MULTI_ARG_1_HI_DI:
!     case MULTI_ARG_1_HI_SI:
!     case MULTI_ARG_1_QI_DI:
!     case MULTI_ARG_1_QI_SI:
!     case MULTI_ARG_1_QI_HI:
!       nargs = 1;
!       break;
! 
!     case MULTI_ARG_2_DI_CMP:
!     case MULTI_ARG_2_SI_CMP:
!     case MULTI_ARG_2_HI_CMP:
!     case MULTI_ARG_2_QI_CMP:
!       nargs = 2;
!       comparison_p = true;
!       break;
! 
!     case MULTI_ARG_2_SF_TF:
!     case MULTI_ARG_2_DF_TF:
!     case MULTI_ARG_2_DI_TF:
!     case MULTI_ARG_2_SI_TF:
!     case MULTI_ARG_2_HI_TF:
!     case MULTI_ARG_2_QI_TF:
!       nargs = 2;
!       tf_p = true;
!       break;
! 
!     default:
!       gcc_unreachable ();
!     }
! 
!   if (optimize || !target
!       || GET_MODE (target) != tmode
!       || !insn_data[icode].operand[0].predicate (target, tmode))
!     target = gen_reg_rtx (tmode);
!   else if (memory_operand (target, tmode))
!     num_memory++;
! 
!   gcc_assert (nargs <= 4);
! 
!   for (i = 0; i < nargs; i++)
!     {
!       tree arg = CALL_EXPR_ARG (exp, i);
!       rtx op = expand_normal (arg);
!       int adjust = (comparison_p) ? 1 : 0;
!       machine_mode mode = insn_data[icode].operand[i+adjust+1].mode;
! 
!       if (last_arg_constant && i == nargs - 1)
! 	{
! 	  if (!insn_data[icode].operand[i + 1].predicate (op, mode))
! 	    {
! 	      enum insn_code new_icode = icode;
! 	      switch (icode)
! 		{
! 		case CODE_FOR_xop_vpermil2v2df3:
! 		case CODE_FOR_xop_vpermil2v4sf3:
! 		case CODE_FOR_xop_vpermil2v4df3:
! 		case CODE_FOR_xop_vpermil2v8sf3:
! 		  error ("the last argument must be a 2-bit immediate");
! 		  return gen_reg_rtx (tmode);
! 		case CODE_FOR_xop_rotlv2di3:
! 		  new_icode = CODE_FOR_rotlv2di3;
! 		  goto xop_rotl;
! 		case CODE_FOR_xop_rotlv4si3:
! 		  new_icode = CODE_FOR_rotlv4si3;
! 		  goto xop_rotl;
! 		case CODE_FOR_xop_rotlv8hi3:
! 		  new_icode = CODE_FOR_rotlv8hi3;
! 		  goto xop_rotl;
! 		case CODE_FOR_xop_rotlv16qi3:
! 		  new_icode = CODE_FOR_rotlv16qi3;
! 		xop_rotl:
! 		  if (CONST_INT_P (op))
! 		    {
! 		      int mask = GET_MODE_UNIT_BITSIZE (tmode) - 1;
! 		      op = GEN_INT (INTVAL (op) & mask);
! 		      gcc_checking_assert
! 			(insn_data[icode].operand[i + 1].predicate (op, mode));
! 		    }
! 		  else
! 		    {
! 		      gcc_checking_assert
! 			(nargs == 2
! 			 && insn_data[new_icode].operand[0].mode == tmode
! 			 && insn_data[new_icode].operand[1].mode == tmode
! 			 && insn_data[new_icode].operand[2].mode == mode
! 			 && insn_data[new_icode].operand[0].predicate
! 			    == insn_data[icode].operand[0].predicate
! 			 && insn_data[new_icode].operand[1].predicate
! 			    == insn_data[icode].operand[1].predicate);
! 		      icode = new_icode;
! 		      goto non_constant;
! 		    }
! 		  break;
! 		default:
! 		  gcc_unreachable ();
! 		}
! 	    }
! 	}
!       else
! 	{
! 	non_constant:
! 	  if (VECTOR_MODE_P (mode))
! 	    op = safe_vector_operand (op, mode);
! 
! 	  /* If we aren't optimizing, only allow one memory operand to be
! 	     generated.  */
! 	  if (memory_operand (op, mode))
! 	    num_memory++;
! 
! 	  gcc_assert (GET_MODE (op) == mode || GET_MODE (op) == VOIDmode);
! 
! 	  if (optimize
! 	      || !insn_data[icode].operand[i+adjust+1].predicate (op, mode)
! 	      || num_memory > 1)
! 	    op = force_reg (mode, op);
! 	}
! 
!       args[i].op = op;
!       args[i].mode = mode;
!     }
! 
!   switch (nargs)
!     {
!     case 1:
!       pat = GEN_FCN (icode) (target, args[0].op);
!       break;
! 
!     case 2:
!       if (tf_p)
! 	pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
! 			       GEN_INT ((int)sub_code));
!       else if (! comparison_p)
! 	pat = GEN_FCN (icode) (target, args[0].op, args[1].op);
!       else
! 	{
! 	  rtx cmp_op = gen_rtx_fmt_ee (sub_code, GET_MODE (target),
! 				       args[0].op,
! 				       args[1].op);
! 
! 	  pat = GEN_FCN (icode) (target, cmp_op, args[0].op, args[1].op);
! 	}
!       break;
! 
!     case 3:
!       pat = GEN_FCN (icode) (target, args[0].op, args[1].op, args[2].op);
!       break;
! 
!     case 4:
!       pat = GEN_FCN (icode) (target, args[0].op, args[1].op, args[2].op, args[3].op);
!       break;
! 
!     default:
!       gcc_unreachable ();
!     }
! 
!   if (! pat)
!     return 0;
! 
!   emit_insn (pat);
!   return target;
! }
! 
! /* Subroutine of ix86_expand_args_builtin to take care of scalar unop
!    insns with vec_merge.  */
! 
! static rtx
! ix86_expand_unop_vec_merge_builtin (enum insn_code icode, tree exp,
! 				    rtx target)
! {
!   rtx pat;
!   tree arg0 = CALL_EXPR_ARG (exp, 0);
!   rtx op1, op0 = expand_normal (arg0);
!   machine_mode tmode = insn_data[icode].operand[0].mode;
!   machine_mode mode0 = insn_data[icode].operand[1].mode;
! 
!   if (optimize || !target
!       || GET_MODE (target) != tmode
!       || !insn_data[icode].operand[0].predicate (target, tmode))
!     target = gen_reg_rtx (tmode);
! 
!   if (VECTOR_MODE_P (mode0))
!     op0 = safe_vector_operand (op0, mode0);
! 
!   if ((optimize && !register_operand (op0, mode0))
!       || !insn_data[icode].operand[1].predicate (op0, mode0))
!     op0 = copy_to_mode_reg (mode0, op0);
! 
!   op1 = op0;
!   if (!insn_data[icode].operand[2].predicate (op1, mode0))
!     op1 = copy_to_mode_reg (mode0, op1);
! 
!   pat = GEN_FCN (icode) (target, op0, op1);
!   if (! pat)
!     return 0;
!   emit_insn (pat);
!   return target;
! }
! 
! /* Subroutine of ix86_expand_builtin to take care of comparison insns.  */
! 
! static rtx
! ix86_expand_sse_compare (const struct builtin_description *d,
! 			 tree exp, rtx target, bool swap)
! {
!   rtx pat;
!   tree arg0 = CALL_EXPR_ARG (exp, 0);
!   tree arg1 = CALL_EXPR_ARG (exp, 1);
!   rtx op0 = expand_normal (arg0);
!   rtx op1 = expand_normal (arg1);
!   rtx op2;
!   machine_mode tmode = insn_data[d->icode].operand[0].mode;
!   machine_mode mode0 = insn_data[d->icode].operand[1].mode;
!   machine_mode mode1 = insn_data[d->icode].operand[2].mode;
!   enum rtx_code comparison = d->comparison;
! 
!   if (VECTOR_MODE_P (mode0))
!     op0 = safe_vector_operand (op0, mode0);
!   if (VECTOR_MODE_P (mode1))
!     op1 = safe_vector_operand (op1, mode1);
! 
!   /* Swap operands if we have a comparison that isn't available in
!      hardware.  */
!   if (swap)
!     std::swap (op0, op1);
! 
!   if (optimize || !target
!       || GET_MODE (target) != tmode
!       || !insn_data[d->icode].operand[0].predicate (target, tmode))
!     target = gen_reg_rtx (tmode);
! 
!   if ((optimize && !register_operand (op0, mode0))
!       || !insn_data[d->icode].operand[1].predicate (op0, mode0))
!     op0 = copy_to_mode_reg (mode0, op0);
!   if ((optimize && !register_operand (op1, mode1))
!       || !insn_data[d->icode].operand[2].predicate (op1, mode1))
!     op1 = copy_to_mode_reg (mode1, op1);
! 
!   op2 = gen_rtx_fmt_ee (comparison, mode0, op0, op1);
!   pat = GEN_FCN (d->icode) (target, op0, op1, op2);
!   if (! pat)
!     return 0;
!   emit_insn (pat);
!   return target;
! }
! 
! /* Subroutine of ix86_expand_builtin to take care of comi insns.  */
! 
! static rtx
! ix86_expand_sse_comi (const struct builtin_description *d, tree exp,
! 		      rtx target)
! {
!   rtx pat;
!   tree arg0 = CALL_EXPR_ARG (exp, 0);
!   tree arg1 = CALL_EXPR_ARG (exp, 1);
!   rtx op0 = expand_normal (arg0);
!   rtx op1 = expand_normal (arg1);
!   machine_mode mode0 = insn_data[d->icode].operand[0].mode;
!   machine_mode mode1 = insn_data[d->icode].operand[1].mode;
!   enum rtx_code comparison = d->comparison;
! 
!   if (VECTOR_MODE_P (mode0))
!     op0 = safe_vector_operand (op0, mode0);
!   if (VECTOR_MODE_P (mode1))
!     op1 = safe_vector_operand (op1, mode1);
! 
!   /* Swap operands if we have a comparison that isn't available in
!      hardware.  */
!   if (d->flag & BUILTIN_DESC_SWAP_OPERANDS)
!     std::swap (op0, op1);
! 
!   target = gen_reg_rtx (SImode);
!   emit_move_insn (target, const0_rtx);
!   target = gen_rtx_SUBREG (QImode, target, 0);
! 
!   if ((optimize && !register_operand (op0, mode0))
!       || !insn_data[d->icode].operand[0].predicate (op0, mode0))
!     op0 = copy_to_mode_reg (mode0, op0);
!   if ((optimize && !register_operand (op1, mode1))
!       || !insn_data[d->icode].operand[1].predicate (op1, mode1))
!     op1 = copy_to_mode_reg (mode1, op1);
! 
!   pat = GEN_FCN (d->icode) (op0, op1);
!   if (! pat)
!     return 0;
!   emit_insn (pat);
!   emit_insn (gen_rtx_SET (gen_rtx_STRICT_LOW_PART (VOIDmode, target),
! 			  gen_rtx_fmt_ee (comparison, QImode,
! 					  SET_DEST (pat),
! 					  const0_rtx)));
! 
!   return SUBREG_REG (target);
! }
! 
! /* Subroutines of ix86_expand_args_builtin to take care of round insns.  */
! 
! static rtx
! ix86_expand_sse_round (const struct builtin_description *d, tree exp,
! 		       rtx target)
! {
!   rtx pat;
!   tree arg0 = CALL_EXPR_ARG (exp, 0);
!   rtx op1, op0 = expand_normal (arg0);
!   machine_mode tmode = insn_data[d->icode].operand[0].mode;
!   machine_mode mode0 = insn_data[d->icode].operand[1].mode;
! 
!   if (optimize || target == 0
!       || GET_MODE (target) != tmode
!       || !insn_data[d->icode].operand[0].predicate (target, tmode))
!     target = gen_reg_rtx (tmode);
! 
!   if (VECTOR_MODE_P (mode0))
!     op0 = safe_vector_operand (op0, mode0);
! 
!   if ((optimize && !register_operand (op0, mode0))
!       || !insn_data[d->icode].operand[0].predicate (op0, mode0))
!     op0 = copy_to_mode_reg (mode0, op0);
! 
!   op1 = GEN_INT (d->comparison);
! 
!   pat = GEN_FCN (d->icode) (target, op0, op1);
!   if (! pat)
!     return 0;
!   emit_insn (pat);
!   return target;
! }
! 
! static rtx
! ix86_expand_sse_round_vec_pack_sfix (const struct builtin_description *d,
! 				     tree exp, rtx target)
! {
!   rtx pat;
!   tree arg0 = CALL_EXPR_ARG (exp, 0);
!   tree arg1 = CALL_EXPR_ARG (exp, 1);
!   rtx op0 = expand_normal (arg0);
!   rtx op1 = expand_normal (arg1);
!   rtx op2;
!   machine_mode tmode = insn_data[d->icode].operand[0].mode;
!   machine_mode mode0 = insn_data[d->icode].operand[1].mode;
!   machine_mode mode1 = insn_data[d->icode].operand[2].mode;
! 
!   if (optimize || target == 0
!       || GET_MODE (target) != tmode
!       || !insn_data[d->icode].operand[0].predicate (target, tmode))
!     target = gen_reg_rtx (tmode);
! 
!   op0 = safe_vector_operand (op0, mode0);
!   op1 = safe_vector_operand (op1, mode1);
! 
!   if ((optimize && !register_operand (op0, mode0))
!       || !insn_data[d->icode].operand[0].predicate (op0, mode0))
!     op0 = copy_to_mode_reg (mode0, op0);
!   if ((optimize && !register_operand (op1, mode1))
!       || !insn_data[d->icode].operand[1].predicate (op1, mode1))
!     op1 = copy_to_mode_reg (mode1, op1);
! 
!   op2 = GEN_INT (d->comparison);
! 
!   pat = GEN_FCN (d->icode) (target, op0, op1, op2);
!   if (! pat)
!     return 0;
!   emit_insn (pat);
!   return target;
! }
! 
! /* Subroutine of ix86_expand_builtin to take care of ptest insns.  */
! 
! static rtx
! ix86_expand_sse_ptest (const struct builtin_description *d, tree exp,
! 		       rtx target)
! {
!   rtx pat;
!   tree arg0 = CALL_EXPR_ARG (exp, 0);
!   tree arg1 = CALL_EXPR_ARG (exp, 1);
!   rtx op0 = expand_normal (arg0);
!   rtx op1 = expand_normal (arg1);
!   machine_mode mode0 = insn_data[d->icode].operand[0].mode;
!   machine_mode mode1 = insn_data[d->icode].operand[1].mode;
!   enum rtx_code comparison = d->comparison;
! 
!   if (VECTOR_MODE_P (mode0))
!     op0 = safe_vector_operand (op0, mode0);
!   if (VECTOR_MODE_P (mode1))
!     op1 = safe_vector_operand (op1, mode1);
! 
!   target = gen_reg_rtx (SImode);
!   emit_move_insn (target, const0_rtx);
!   target = gen_rtx_SUBREG (QImode, target, 0);
! 
!   if ((optimize && !register_operand (op0, mode0))
!       || !insn_data[d->icode].operand[0].predicate (op0, mode0))
!     op0 = copy_to_mode_reg (mode0, op0);
!   if ((optimize && !register_operand (op1, mode1))
!       || !insn_data[d->icode].operand[1].predicate (op1, mode1))
!     op1 = copy_to_mode_reg (mode1, op1);
! 
!   pat = GEN_FCN (d->icode) (op0, op1);
!   if (! pat)
!     return 0;
!   emit_insn (pat);
!   emit_insn (gen_rtx_SET (gen_rtx_STRICT_LOW_PART (VOIDmode, target),
! 			  gen_rtx_fmt_ee (comparison, QImode,
! 					  SET_DEST (pat),
! 					  const0_rtx)));
! 
!   return SUBREG_REG (target);
! }
! 
! /* Subroutine of ix86_expand_builtin to take care of pcmpestr[im] insns.  */
! 
! static rtx
! ix86_expand_sse_pcmpestr (const struct builtin_description *d,
! 			  tree exp, rtx target)
! {
!   rtx pat;
!   tree arg0 = CALL_EXPR_ARG (exp, 0);
!   tree arg1 = CALL_EXPR_ARG (exp, 1);
!   tree arg2 = CALL_EXPR_ARG (exp, 2);
!   tree arg3 = CALL_EXPR_ARG (exp, 3);
!   tree arg4 = CALL_EXPR_ARG (exp, 4);
!   rtx scratch0, scratch1;
!   rtx op0 = expand_normal (arg0);
!   rtx op1 = expand_normal (arg1);
!   rtx op2 = expand_normal (arg2);
!   rtx op3 = expand_normal (arg3);
!   rtx op4 = expand_normal (arg4);
!   machine_mode tmode0, tmode1, modev2, modei3, modev4, modei5, modeimm;
! 
!   tmode0 = insn_data[d->icode].operand[0].mode;
!   tmode1 = insn_data[d->icode].operand[1].mode;
!   modev2 = insn_data[d->icode].operand[2].mode;
!   modei3 = insn_data[d->icode].operand[3].mode;
!   modev4 = insn_data[d->icode].operand[4].mode;
!   modei5 = insn_data[d->icode].operand[5].mode;
!   modeimm = insn_data[d->icode].operand[6].mode;
! 
!   if (VECTOR_MODE_P (modev2))
!     op0 = safe_vector_operand (op0, modev2);
!   if (VECTOR_MODE_P (modev4))
!     op2 = safe_vector_operand (op2, modev4);
! 
!   if (!insn_data[d->icode].operand[2].predicate (op0, modev2))
!     op0 = copy_to_mode_reg (modev2, op0);
!   if (!insn_data[d->icode].operand[3].predicate (op1, modei3))
!     op1 = copy_to_mode_reg (modei3, op1);
!   if ((optimize && !register_operand (op2, modev4))
!       || !insn_data[d->icode].operand[4].predicate (op2, modev4))
!     op2 = copy_to_mode_reg (modev4, op2);
!   if (!insn_data[d->icode].operand[5].predicate (op3, modei5))
!     op3 = copy_to_mode_reg (modei5, op3);
! 
!   if (!insn_data[d->icode].operand[6].predicate (op4, modeimm))
!     {
!       error ("the fifth argument must be an 8-bit immediate");
!       return const0_rtx;
!     }
! 
!   if (d->code == IX86_BUILTIN_PCMPESTRI128)
!     {
!       if (optimize || !target
! 	  || GET_MODE (target) != tmode0
! 	  || !insn_data[d->icode].operand[0].predicate (target, tmode0))
! 	target = gen_reg_rtx (tmode0);
! 
!       scratch1 = gen_reg_rtx (tmode1);
! 
!       pat = GEN_FCN (d->icode) (target, scratch1, op0, op1, op2, op3, op4);
!     }
!   else if (d->code == IX86_BUILTIN_PCMPESTRM128)
!     {
!       if (optimize || !target
! 	  || GET_MODE (target) != tmode1
! 	  || !insn_data[d->icode].operand[1].predicate (target, tmode1))
! 	target = gen_reg_rtx (tmode1);
! 
!       scratch0 = gen_reg_rtx (tmode0);
! 
!       pat = GEN_FCN (d->icode) (scratch0, target, op0, op1, op2, op3, op4);
!     }
!   else
!     {
!       gcc_assert (d->flag);
! 
!       scratch0 = gen_reg_rtx (tmode0);
!       scratch1 = gen_reg_rtx (tmode1);
! 
!       pat = GEN_FCN (d->icode) (scratch0, scratch1, op0, op1, op2, op3, op4);
!     }
! 
!   if (! pat)
!     return 0;
! 
!   emit_insn (pat);
! 
!   if (d->flag)
!     {
!       target = gen_reg_rtx (SImode);
!       emit_move_insn (target, const0_rtx);
!       target = gen_rtx_SUBREG (QImode, target, 0);
! 
!       emit_insn
! 	(gen_rtx_SET (gen_rtx_STRICT_LOW_PART (VOIDmode, target),
! 		      gen_rtx_fmt_ee (EQ, QImode,
! 				      gen_rtx_REG ((machine_mode) d->flag,
! 						   FLAGS_REG),
! 				      const0_rtx)));
!       return SUBREG_REG (target);
!     }
!   else
!     return target;
! }
! 
! 
! /* Subroutine of ix86_expand_builtin to take care of pcmpistr[im] insns.  */
! 
! static rtx
! ix86_expand_sse_pcmpistr (const struct builtin_description *d,
! 			  tree exp, rtx target)
! {
!   rtx pat;
!   tree arg0 = CALL_EXPR_ARG (exp, 0);
!   tree arg1 = CALL_EXPR_ARG (exp, 1);
!   tree arg2 = CALL_EXPR_ARG (exp, 2);
!   rtx scratch0, scratch1;
!   rtx op0 = expand_normal (arg0);
!   rtx op1 = expand_normal (arg1);
!   rtx op2 = expand_normal (arg2);
!   machine_mode tmode0, tmode1, modev2, modev3, modeimm;
! 
!   tmode0 = insn_data[d->icode].operand[0].mode;
!   tmode1 = insn_data[d->icode].operand[1].mode;
!   modev2 = insn_data[d->icode].operand[2].mode;
!   modev3 = insn_data[d->icode].operand[3].mode;
!   modeimm = insn_data[d->icode].operand[4].mode;
! 
!   if (VECTOR_MODE_P (modev2))
!     op0 = safe_vector_operand (op0, modev2);
!   if (VECTOR_MODE_P (modev3))
!     op1 = safe_vector_operand (op1, modev3);
! 
!   if (!insn_data[d->icode].operand[2].predicate (op0, modev2))
!     op0 = copy_to_mode_reg (modev2, op0);
!   if ((optimize && !register_operand (op1, modev3))
!       || !insn_data[d->icode].operand[3].predicate (op1, modev3))
!     op1 = copy_to_mode_reg (modev3, op1);
! 
!   if (!insn_data[d->icode].operand[4].predicate (op2, modeimm))
!     {
!       error ("the third argument must be an 8-bit immediate");
!       return const0_rtx;
!     }
! 
!   if (d->code == IX86_BUILTIN_PCMPISTRI128)
!     {
!       if (optimize || !target
! 	  || GET_MODE (target) != tmode0
! 	  || !insn_data[d->icode].operand[0].predicate (target, tmode0))
! 	target = gen_reg_rtx (tmode0);
! 
!       scratch1 = gen_reg_rtx (tmode1);
! 
!       pat = GEN_FCN (d->icode) (target, scratch1, op0, op1, op2);
!     }
!   else if (d->code == IX86_BUILTIN_PCMPISTRM128)
!     {
!       if (optimize || !target
! 	  || GET_MODE (target) != tmode1
! 	  || !insn_data[d->icode].operand[1].predicate (target, tmode1))
! 	target = gen_reg_rtx (tmode1);
! 
!       scratch0 = gen_reg_rtx (tmode0);
! 
!       pat = GEN_FCN (d->icode) (scratch0, target, op0, op1, op2);
!     }
!   else
!     {
!       gcc_assert (d->flag);
! 
!       scratch0 = gen_reg_rtx (tmode0);
!       scratch1 = gen_reg_rtx (tmode1);
! 
!       pat = GEN_FCN (d->icode) (scratch0, scratch1, op0, op1, op2);
!     }
! 
!   if (! pat)
!     return 0;
! 
!   emit_insn (pat);
! 
!   if (d->flag)
!     {
!       target = gen_reg_rtx (SImode);
!       emit_move_insn (target, const0_rtx);
!       target = gen_rtx_SUBREG (QImode, target, 0);
! 
!       emit_insn
! 	(gen_rtx_SET (gen_rtx_STRICT_LOW_PART (VOIDmode, target),
! 		      gen_rtx_fmt_ee (EQ, QImode,
! 				      gen_rtx_REG ((machine_mode) d->flag,
! 						   FLAGS_REG),
! 				      const0_rtx)));
!       return SUBREG_REG (target);
!     }
!   else
!     return target;
! }
! 
! /* Subroutine of ix86_expand_builtin to take care of insns with
!    variable number of operands.  */
! 
! static rtx
! ix86_expand_args_builtin (const struct builtin_description *d,
! 			  tree exp, rtx target)
! {
!   rtx pat, real_target;
!   unsigned int i, nargs;
!   unsigned int nargs_constant = 0;
!   unsigned int mask_pos = 0;
!   int num_memory = 0;
!   struct
!     {
!       rtx op;
!       machine_mode mode;
!     } args[6];
!   bool second_arg_count = false;
!   enum insn_code icode = d->icode;
!   const struct insn_data_d *insn_p = &insn_data[icode];
!   machine_mode tmode = insn_p->operand[0].mode;
!   machine_mode rmode = VOIDmode;
!   bool swap = false;
!   enum rtx_code comparison = d->comparison;
! 
!   switch ((enum ix86_builtin_func_type) d->flag)
!     {
!     case V2DF_FTYPE_V2DF_ROUND:
!     case V4DF_FTYPE_V4DF_ROUND:
!     case V8DF_FTYPE_V8DF_ROUND:
!     case V4SF_FTYPE_V4SF_ROUND:
!     case V8SF_FTYPE_V8SF_ROUND:
!     case V16SF_FTYPE_V16SF_ROUND:
!     case V4SI_FTYPE_V4SF_ROUND:
!     case V8SI_FTYPE_V8SF_ROUND:
!     case V16SI_FTYPE_V16SF_ROUND:
!       return ix86_expand_sse_round (d, exp, target);
!     case V4SI_FTYPE_V2DF_V2DF_ROUND:
!     case V8SI_FTYPE_V4DF_V4DF_ROUND:
!     case V16SI_FTYPE_V8DF_V8DF_ROUND:
!       return ix86_expand_sse_round_vec_pack_sfix (d, exp, target);
!     case INT_FTYPE_V8SF_V8SF_PTEST:
!     case INT_FTYPE_V4DI_V4DI_PTEST:
!     case INT_FTYPE_V4DF_V4DF_PTEST:
!     case INT_FTYPE_V4SF_V4SF_PTEST:
!     case INT_FTYPE_V2DI_V2DI_PTEST:
!     case INT_FTYPE_V2DF_V2DF_PTEST:
!       return ix86_expand_sse_ptest (d, exp, target);
!     case FLOAT128_FTYPE_FLOAT128:
!     case FLOAT_FTYPE_FLOAT:
!     case INT_FTYPE_INT:
!     case UINT_FTYPE_UINT:
!     case UINT16_FTYPE_UINT16:
!     case UINT64_FTYPE_INT:
!     case UINT64_FTYPE_UINT64:
!     case INT64_FTYPE_INT64:
!     case INT64_FTYPE_V4SF:
!     case INT64_FTYPE_V2DF:
!     case INT_FTYPE_V16QI:
!     case INT_FTYPE_V8QI:
!     case INT_FTYPE_V8SF:
!     case INT_FTYPE_V4DF:
!     case INT_FTYPE_V4SF:
!     case INT_FTYPE_V2DF:
!     case INT_FTYPE_V32QI:
!     case V16QI_FTYPE_V16QI:
!     case V8SI_FTYPE_V8SF:
!     case V8SI_FTYPE_V4SI:
!     case V8HI_FTYPE_V8HI:
!     case V8HI_FTYPE_V16QI:
!     case V8QI_FTYPE_V8QI:
!     case V8SF_FTYPE_V8SF:
!     case V8SF_FTYPE_V8SI:
!     case V8SF_FTYPE_V4SF:
!     case V8SF_FTYPE_V8HI:
!     case V4SI_FTYPE_V4SI:
!     case V4SI_FTYPE_V16QI:
!     case V4SI_FTYPE_V4SF:
!     case V4SI_FTYPE_V8SI:
!     case V4SI_FTYPE_V8HI:
!     case V4SI_FTYPE_V4DF:
!     case V4SI_FTYPE_V2DF:
!     case V4HI_FTYPE_V4HI:
!     case V4DF_FTYPE_V4DF:
!     case V4DF_FTYPE_V4SI:
!     case V4DF_FTYPE_V4SF:
!     case V4DF_FTYPE_V2DF:
!     case V4SF_FTYPE_V4SF:
!     case V4SF_FTYPE_V4SI:
!     case V4SF_FTYPE_V8SF:
!     case V4SF_FTYPE_V4DF:
!     case V4SF_FTYPE_V8HI:
!     case V4SF_FTYPE_V2DF:
!     case V2DI_FTYPE_V2DI:
!     case V2DI_FTYPE_V16QI:
!     case V2DI_FTYPE_V8HI:
!     case V2DI_FTYPE_V4SI:
!     case V2DF_FTYPE_V2DF:
!     case V2DF_FTYPE_V4SI:
!     case V2DF_FTYPE_V4DF:
!     case V2DF_FTYPE_V4SF:
!     case V2DF_FTYPE_V2SI:
!     case V2SI_FTYPE_V2SI:
!     case V2SI_FTYPE_V4SF:
!     case V2SI_FTYPE_V2SF:
!     case V2SI_FTYPE_V2DF:
!     case V2SF_FTYPE_V2SF:
!     case V2SF_FTYPE_V2SI:
!     case V32QI_FTYPE_V32QI:
!     case V32QI_FTYPE_V16QI:
!     case V16HI_FTYPE_V16HI:
!     case V16HI_FTYPE_V8HI:
!     case V8SI_FTYPE_V8SI:
!     case V16HI_FTYPE_V16QI:
!     case V8SI_FTYPE_V16QI:
!     case V4DI_FTYPE_V16QI:
!     case V8SI_FTYPE_V8HI:
!     case V4DI_FTYPE_V8HI:
!     case V4DI_FTYPE_V4SI:
!     case V4DI_FTYPE_V2DI:
!     case UQI_FTYPE_UQI:
!     case UHI_FTYPE_UHI:
!     case USI_FTYPE_USI:
!     case USI_FTYPE_UQI:
!     case USI_FTYPE_UHI:
!     case UDI_FTYPE_UDI:
!     case UHI_FTYPE_V16QI:
!     case USI_FTYPE_V32QI:
!     case UDI_FTYPE_V64QI:
!     case V16QI_FTYPE_UHI:
!     case V32QI_FTYPE_USI:
!     case V64QI_FTYPE_UDI:
!     case V8HI_FTYPE_UQI:
!     case V16HI_FTYPE_UHI:
!     case V32HI_FTYPE_USI:
!     case V4SI_FTYPE_UQI:
!     case V8SI_FTYPE_UQI:
!     case V4SI_FTYPE_UHI:
!     case V8SI_FTYPE_UHI:
!     case UQI_FTYPE_V8HI:
!     case UHI_FTYPE_V16HI:
!     case USI_FTYPE_V32HI:
!     case UQI_FTYPE_V4SI:
!     case UQI_FTYPE_V8SI:
!     case UHI_FTYPE_V16SI:
!     case UQI_FTYPE_V2DI:
!     case UQI_FTYPE_V4DI:
!     case UQI_FTYPE_V8DI:
!     case V16SI_FTYPE_UHI:
!     case V2DI_FTYPE_UQI:
!     case V4DI_FTYPE_UQI:
!     case V16SI_FTYPE_INT:
!     case V16SF_FTYPE_V8SF:
!     case V16SI_FTYPE_V8SI:
!     case V16SF_FTYPE_V4SF:
!     case V16SI_FTYPE_V4SI:
!     case V16SI_FTYPE_V16SF:
!     case V16SI_FTYPE_V16SI:
!     case V64QI_FTYPE_V64QI:
!     case V32HI_FTYPE_V32HI:
!     case V16SF_FTYPE_V16SF:
!     case V8DI_FTYPE_UQI:
!     case V8DI_FTYPE_V8DI:
!     case V8DF_FTYPE_V4DF:
!     case V8DF_FTYPE_V2DF:
!     case V8DF_FTYPE_V8DF:
!     case V4DI_FTYPE_V4DI:
!       nargs = 1;
!       break;
!     case V4SF_FTYPE_V4SF_VEC_MERGE:
!     case V2DF_FTYPE_V2DF_VEC_MERGE:
!       return ix86_expand_unop_vec_merge_builtin (icode, exp, target);
!     case FLOAT128_FTYPE_FLOAT128_FLOAT128:
!     case V16QI_FTYPE_V16QI_V16QI:
!     case V16QI_FTYPE_V8HI_V8HI:
!     case V16SF_FTYPE_V16SF_V16SF:
!     case V8QI_FTYPE_V8QI_V8QI:
!     case V8QI_FTYPE_V4HI_V4HI:
!     case V8HI_FTYPE_V8HI_V8HI:
!     case V8HI_FTYPE_V16QI_V16QI:
!     case V8HI_FTYPE_V4SI_V4SI:
!     case V8SF_FTYPE_V8SF_V8SF:
!     case V8SF_FTYPE_V8SF_V8SI:
!     case V8DF_FTYPE_V8DF_V8DF:
!     case V4SI_FTYPE_V4SI_V4SI:
!     case V4SI_FTYPE_V8HI_V8HI:
!     case V4SI_FTYPE_V2DF_V2DF:
!     case V4HI_FTYPE_V4HI_V4HI:
!     case V4HI_FTYPE_V8QI_V8QI:
!     case V4HI_FTYPE_V2SI_V2SI:
!     case V4DF_FTYPE_V4DF_V4DF:
!     case V4DF_FTYPE_V4DF_V4DI:
!     case V4SF_FTYPE_V4SF_V4SF:
!     case V4SF_FTYPE_V4SF_V4SI:
!     case V4SF_FTYPE_V4SF_V2SI:
!     case V4SF_FTYPE_V4SF_V2DF:
!     case V4SF_FTYPE_V4SF_UINT:
!     case V4SF_FTYPE_V4SF_DI:
!     case V4SF_FTYPE_V4SF_SI:
!     case V2DI_FTYPE_V2DI_V2DI:
!     case V2DI_FTYPE_V16QI_V16QI:
!     case V2DI_FTYPE_V4SI_V4SI:
!     case V2DI_FTYPE_V2DI_V16QI:
!     case V2SI_FTYPE_V2SI_V2SI:
!     case V2SI_FTYPE_V4HI_V4HI:
!     case V2SI_FTYPE_V2SF_V2SF:
!     case V2DF_FTYPE_V2DF_V2DF:
!     case V2DF_FTYPE_V2DF_V4SF:
!     case V2DF_FTYPE_V2DF_V2DI:
!     case V2DF_FTYPE_V2DF_DI:
!     case V2DF_FTYPE_V2DF_SI:
!     case V2DF_FTYPE_V2DF_UINT:
!     case V2SF_FTYPE_V2SF_V2SF:
!     case V1DI_FTYPE_V1DI_V1DI:
!     case V1DI_FTYPE_V8QI_V8QI:
!     case V1DI_FTYPE_V2SI_V2SI:
!     case V32QI_FTYPE_V16HI_V16HI:
!     case V16HI_FTYPE_V8SI_V8SI:
!     case V64QI_FTYPE_V64QI_V64QI:
!     case V32QI_FTYPE_V32QI_V32QI:
!     case V16HI_FTYPE_V32QI_V32QI:
!     case V16HI_FTYPE_V16HI_V16HI:
!     case V8SI_FTYPE_V4DF_V4DF:
!     case V8SI_FTYPE_V8SI_V8SI:
!     case V8SI_FTYPE_V16HI_V16HI:
!     case V4DI_FTYPE_V4DI_V4DI:
!     case V4DI_FTYPE_V8SI_V8SI:
!     case V8DI_FTYPE_V64QI_V64QI:
!       if (comparison == UNKNOWN)
! 	return ix86_expand_binop_builtin (icode, exp, target);
!       nargs = 2;
!       break;
!     case V4SF_FTYPE_V4SF_V4SF_SWAP:
!     case V2DF_FTYPE_V2DF_V2DF_SWAP:
!       gcc_assert (comparison != UNKNOWN);
!       nargs = 2;
!       swap = true;
!       break;
!     case V16HI_FTYPE_V16HI_V8HI_COUNT:
!     case V16HI_FTYPE_V16HI_SI_COUNT:
!     case V8SI_FTYPE_V8SI_V4SI_COUNT:
!     case V8SI_FTYPE_V8SI_SI_COUNT:
!     case V4DI_FTYPE_V4DI_V2DI_COUNT:
!     case V4DI_FTYPE_V4DI_INT_COUNT:
!     case V8HI_FTYPE_V8HI_V8HI_COUNT:
!     case V8HI_FTYPE_V8HI_SI_COUNT:
!     case V4SI_FTYPE_V4SI_V4SI_COUNT:
!     case V4SI_FTYPE_V4SI_SI_COUNT:
!     case V4HI_FTYPE_V4HI_V4HI_COUNT:
!     case V4HI_FTYPE_V4HI_SI_COUNT:
!     case V2DI_FTYPE_V2DI_V2DI_COUNT:
!     case V2DI_FTYPE_V2DI_SI_COUNT:
!     case V2SI_FTYPE_V2SI_V2SI_COUNT:
!     case V2SI_FTYPE_V2SI_SI_COUNT:
!     case V1DI_FTYPE_V1DI_V1DI_COUNT:
!     case V1DI_FTYPE_V1DI_SI_COUNT:
!       nargs = 2;
!       second_arg_count = true;
!       break;
!     case V16HI_FTYPE_V16HI_INT_V16HI_UHI_COUNT:
!     case V16HI_FTYPE_V16HI_V8HI_V16HI_UHI_COUNT:
!     case V16SI_FTYPE_V16SI_INT_V16SI_UHI_COUNT:
!     case V16SI_FTYPE_V16SI_V4SI_V16SI_UHI_COUNT:
!     case V2DI_FTYPE_V2DI_INT_V2DI_UQI_COUNT:
!     case V2DI_FTYPE_V2DI_V2DI_V2DI_UQI_COUNT:
!     case V32HI_FTYPE_V32HI_INT_V32HI_USI_COUNT:
!     case V32HI_FTYPE_V32HI_V8HI_V32HI_USI_COUNT:
!     case V4DI_FTYPE_V4DI_INT_V4DI_UQI_COUNT:
!     case V4DI_FTYPE_V4DI_V2DI_V4DI_UQI_COUNT:
!     case V4SI_FTYPE_V4SI_INT_V4SI_UQI_COUNT:
!     case V4SI_FTYPE_V4SI_V4SI_V4SI_UQI_COUNT:
!     case V8DI_FTYPE_V8DI_INT_V8DI_UQI_COUNT:
!     case V8DI_FTYPE_V8DI_V2DI_V8DI_UQI_COUNT:
!     case V8HI_FTYPE_V8HI_INT_V8HI_UQI_COUNT:
!     case V8HI_FTYPE_V8HI_V8HI_V8HI_UQI_COUNT:
!     case V8SI_FTYPE_V8SI_INT_V8SI_UQI_COUNT:
!     case V8SI_FTYPE_V8SI_V4SI_V8SI_UQI_COUNT:
!       nargs = 4;
!       second_arg_count = true;
!       break;
!     case UINT64_FTYPE_UINT64_UINT64:
!     case UINT_FTYPE_UINT_UINT:
!     case UINT_FTYPE_UINT_USHORT:
!     case UINT_FTYPE_UINT_UCHAR:
!     case UINT16_FTYPE_UINT16_INT:
!     case UINT8_FTYPE_UINT8_INT:
!     case UQI_FTYPE_UQI_UQI:
!     case UHI_FTYPE_UHI_UHI:
!     case USI_FTYPE_USI_USI:
!     case UDI_FTYPE_UDI_UDI:
!     case V16SI_FTYPE_V8DF_V8DF:
!       nargs = 2;
!       break;
!     case V2DI_FTYPE_V2DI_INT_CONVERT:
!       nargs = 2;
!       rmode = V1TImode;
!       nargs_constant = 1;
!       break;
!     case V4DI_FTYPE_V4DI_INT_CONVERT:
!       nargs = 2;
!       rmode = V2TImode;
!       nargs_constant = 1;
!       break;
!     case V8DI_FTYPE_V8DI_INT_CONVERT:
!       nargs = 2;
!       rmode = V4TImode;
!       nargs_constant = 1;
!       break;
!     case V8HI_FTYPE_V8HI_INT:
!     case V8HI_FTYPE_V8SF_INT:
!     case V16HI_FTYPE_V16SF_INT:
!     case V8HI_FTYPE_V4SF_INT:
!     case V8SF_FTYPE_V8SF_INT:
!     case V4SF_FTYPE_V16SF_INT:
!     case V16SF_FTYPE_V16SF_INT:
!     case V4SI_FTYPE_V4SI_INT:
!     case V4SI_FTYPE_V8SI_INT:
!     case V4HI_FTYPE_V4HI_INT:
!     case V4DF_FTYPE_V4DF_INT:
!     case V4DF_FTYPE_V8DF_INT:
!     case V4SF_FTYPE_V4SF_INT:
!     case V4SF_FTYPE_V8SF_INT:
!     case V2DI_FTYPE_V2DI_INT:
!     case V2DF_FTYPE_V2DF_INT:
!     case V2DF_FTYPE_V4DF_INT:
!     case V16HI_FTYPE_V16HI_INT:
!     case V8SI_FTYPE_V8SI_INT:
!     case V16SI_FTYPE_V16SI_INT:
!     case V4SI_FTYPE_V16SI_INT:
!     case V4DI_FTYPE_V4DI_INT:
!     case V2DI_FTYPE_V4DI_INT:
!     case V4DI_FTYPE_V8DI_INT:
!     case QI_FTYPE_V4SF_INT:
!     case QI_FTYPE_V2DF_INT:
!     case UQI_FTYPE_UQI_UQI_CONST:
!     case UHI_FTYPE_UHI_UQI:
!     case USI_FTYPE_USI_UQI:
!     case UDI_FTYPE_UDI_UQI:
!       nargs = 2;
!       nargs_constant = 1;
!       break;
!     case V16QI_FTYPE_V16QI_V16QI_V16QI:
!     case V8SF_FTYPE_V8SF_V8SF_V8SF:
!     case V4DF_FTYPE_V4DF_V4DF_V4DF:
!     case V4SF_FTYPE_V4SF_V4SF_V4SF:
!     case V2DF_FTYPE_V2DF_V2DF_V2DF:
!     case V32QI_FTYPE_V32QI_V32QI_V32QI:
!     case UHI_FTYPE_V16SI_V16SI_UHI:
!     case UQI_FTYPE_V8DI_V8DI_UQI:
!     case V16HI_FTYPE_V16SI_V16HI_UHI:
!     case V16QI_FTYPE_V16SI_V16QI_UHI:
!     case V16QI_FTYPE_V8DI_V16QI_UQI:
!     case V16SF_FTYPE_V16SF_V16SF_UHI:
!     case V16SF_FTYPE_V4SF_V16SF_UHI:
!     case V16SI_FTYPE_SI_V16SI_UHI:
!     case V16SI_FTYPE_V16HI_V16SI_UHI:
!     case V16SI_FTYPE_V16QI_V16SI_UHI:
!     case V8SF_FTYPE_V4SF_V8SF_UQI:
!     case V4DF_FTYPE_V2DF_V4DF_UQI:
!     case V8SI_FTYPE_V4SI_V8SI_UQI:
!     case V8SI_FTYPE_SI_V8SI_UQI:
!     case V4SI_FTYPE_V4SI_V4SI_UQI:
!     case V4SI_FTYPE_SI_V4SI_UQI:
!     case V4DI_FTYPE_V2DI_V4DI_UQI:
!     case V4DI_FTYPE_DI_V4DI_UQI:
!     case V2DI_FTYPE_V2DI_V2DI_UQI:
!     case V2DI_FTYPE_DI_V2DI_UQI:
!     case V64QI_FTYPE_V64QI_V64QI_UDI:
!     case V64QI_FTYPE_V16QI_V64QI_UDI:
!     case V64QI_FTYPE_QI_V64QI_UDI:
!     case V32QI_FTYPE_V32QI_V32QI_USI:
!     case V32QI_FTYPE_V16QI_V32QI_USI:
!     case V32QI_FTYPE_QI_V32QI_USI:
!     case V16QI_FTYPE_V16QI_V16QI_UHI:
!     case V16QI_FTYPE_QI_V16QI_UHI:
!     case V32HI_FTYPE_V8HI_V32HI_USI:
!     case V32HI_FTYPE_HI_V32HI_USI:
!     case V16HI_FTYPE_V8HI_V16HI_UHI:
!     case V16HI_FTYPE_HI_V16HI_UHI:
!     case V8HI_FTYPE_V8HI_V8HI_UQI:
!     case V8HI_FTYPE_HI_V8HI_UQI:
!     case V8SF_FTYPE_V8HI_V8SF_UQI:
!     case V4SF_FTYPE_V8HI_V4SF_UQI:
!     case V8SI_FTYPE_V8SF_V8SI_UQI:
!     case V4SI_FTYPE_V4SF_V4SI_UQI:
!     case V4DI_FTYPE_V4SF_V4DI_UQI:
!     case V2DI_FTYPE_V4SF_V2DI_UQI:
!     case V4SF_FTYPE_V4DI_V4SF_UQI:
!     case V4SF_FTYPE_V2DI_V4SF_UQI:
!     case V4DF_FTYPE_V4DI_V4DF_UQI:
!     case V2DF_FTYPE_V2DI_V2DF_UQI:
!     case V16QI_FTYPE_V8HI_V16QI_UQI:
!     case V16QI_FTYPE_V16HI_V16QI_UHI:
!     case V16QI_FTYPE_V4SI_V16QI_UQI:
!     case V16QI_FTYPE_V8SI_V16QI_UQI:
!     case V8HI_FTYPE_V4SI_V8HI_UQI:
!     case V8HI_FTYPE_V8SI_V8HI_UQI:
!     case V16QI_FTYPE_V2DI_V16QI_UQI:
!     case V16QI_FTYPE_V4DI_V16QI_UQI:
!     case V8HI_FTYPE_V2DI_V8HI_UQI:
!     case V8HI_FTYPE_V4DI_V8HI_UQI:
!     case V4SI_FTYPE_V2DI_V4SI_UQI:
!     case V4SI_FTYPE_V4DI_V4SI_UQI:
!     case V32QI_FTYPE_V32HI_V32QI_USI:
!     case UHI_FTYPE_V16QI_V16QI_UHI:
!     case USI_FTYPE_V32QI_V32QI_USI:
!     case UDI_FTYPE_V64QI_V64QI_UDI:
!     case UQI_FTYPE_V8HI_V8HI_UQI:
!     case UHI_FTYPE_V16HI_V16HI_UHI:
!     case USI_FTYPE_V32HI_V32HI_USI:
!     case UQI_FTYPE_V4SI_V4SI_UQI:
!     case UQI_FTYPE_V8SI_V8SI_UQI:
!     case UQI_FTYPE_V2DI_V2DI_UQI:
!     case UQI_FTYPE_V4DI_V4DI_UQI:
!     case V4SF_FTYPE_V2DF_V4SF_UQI:
!     case V4SF_FTYPE_V4DF_V4SF_UQI:
!     case V16SI_FTYPE_V16SI_V16SI_UHI:
!     case V16SI_FTYPE_V4SI_V16SI_UHI:
!     case V2DI_FTYPE_V4SI_V2DI_UQI:
!     case V2DI_FTYPE_V8HI_V2DI_UQI:
!     case V2DI_FTYPE_V16QI_V2DI_UQI:
!     case V4DI_FTYPE_V4DI_V4DI_UQI:
!     case V4DI_FTYPE_V4SI_V4DI_UQI:
!     case V4DI_FTYPE_V8HI_V4DI_UQI:
!     case V4DI_FTYPE_V16QI_V4DI_UQI:
!     case V4DI_FTYPE_V4DF_V4DI_UQI:
!     case V2DI_FTYPE_V2DF_V2DI_UQI:
!     case V4SI_FTYPE_V4DF_V4SI_UQI:
!     case V4SI_FTYPE_V2DF_V4SI_UQI:
!     case V4SI_FTYPE_V8HI_V4SI_UQI:
!     case V4SI_FTYPE_V16QI_V4SI_UQI:
!     case V4DI_FTYPE_V4DI_V4DI_V4DI:
!     case V8DF_FTYPE_V2DF_V8DF_UQI:
!     case V8DF_FTYPE_V4DF_V8DF_UQI:
!     case V8DF_FTYPE_V8DF_V8DF_UQI:
!     case V8SF_FTYPE_V8SF_V8SF_UQI:
!     case V8SF_FTYPE_V8SI_V8SF_UQI:
!     case V4DF_FTYPE_V4DF_V4DF_UQI:
!     case V4SF_FTYPE_V4SF_V4SF_UQI:
!     case V2DF_FTYPE_V2DF_V2DF_UQI:
!     case V2DF_FTYPE_V4SF_V2DF_UQI:
!     case V2DF_FTYPE_V4SI_V2DF_UQI:
!     case V4SF_FTYPE_V4SI_V4SF_UQI:
!     case V4DF_FTYPE_V4SF_V4DF_UQI:
!     case V4DF_FTYPE_V4SI_V4DF_UQI:
!     case V8SI_FTYPE_V8SI_V8SI_UQI:
!     case V8SI_FTYPE_V8HI_V8SI_UQI:
!     case V8SI_FTYPE_V16QI_V8SI_UQI:
!     case V8DF_FTYPE_V8SI_V8DF_UQI:
!     case V8DI_FTYPE_DI_V8DI_UQI:
!     case V16SF_FTYPE_V8SF_V16SF_UHI:
!     case V16SI_FTYPE_V8SI_V16SI_UHI:
!     case V16HI_FTYPE_V16HI_V16HI_UHI:
!     case V8HI_FTYPE_V16QI_V8HI_UQI:
!     case V16HI_FTYPE_V16QI_V16HI_UHI:
!     case V32HI_FTYPE_V32HI_V32HI_USI:
!     case V32HI_FTYPE_V32QI_V32HI_USI:
!     case V8DI_FTYPE_V16QI_V8DI_UQI:
!     case V8DI_FTYPE_V2DI_V8DI_UQI:
!     case V8DI_FTYPE_V4DI_V8DI_UQI:
!     case V8DI_FTYPE_V8DI_V8DI_UQI:
!     case V8DI_FTYPE_V8HI_V8DI_UQI:
!     case V8DI_FTYPE_V8SI_V8DI_UQI:
!     case V8HI_FTYPE_V8DI_V8HI_UQI:
!     case V8SI_FTYPE_V8DI_V8SI_UQI:
!     case V4SI_FTYPE_V4SI_V4SI_V4SI:
!     case V16SI_FTYPE_V16SI_V16SI_V16SI:
!     case V8DI_FTYPE_V8DI_V8DI_V8DI:
!     case V32HI_FTYPE_V32HI_V32HI_V32HI:
!     case V2DI_FTYPE_V2DI_V2DI_V2DI:
!     case V16HI_FTYPE_V16HI_V16HI_V16HI:
!     case V8SI_FTYPE_V8SI_V8SI_V8SI:
!     case V8HI_FTYPE_V8HI_V8HI_V8HI:
!       nargs = 3;
!       break;
!     case V32QI_FTYPE_V32QI_V32QI_INT:
!     case V16HI_FTYPE_V16HI_V16HI_INT:
!     case V16QI_FTYPE_V16QI_V16QI_INT:
!     case V4DI_FTYPE_V4DI_V4DI_INT:
!     case V8HI_FTYPE_V8HI_V8HI_INT:
!     case V8SI_FTYPE_V8SI_V8SI_INT:
!     case V8SI_FTYPE_V8SI_V4SI_INT:
!     case V8SF_FTYPE_V8SF_V8SF_INT:
!     case V8SF_FTYPE_V8SF_V4SF_INT:
!     case V4SI_FTYPE_V4SI_V4SI_INT:
!     case V4DF_FTYPE_V4DF_V4DF_INT:
!     case V16SF_FTYPE_V16SF_V16SF_INT:
!     case V16SF_FTYPE_V16SF_V4SF_INT:
!     case V16SI_FTYPE_V16SI_V4SI_INT:
!     case V4DF_FTYPE_V4DF_V2DF_INT:
!     case V4SF_FTYPE_V4SF_V4SF_INT:
!     case V2DI_FTYPE_V2DI_V2DI_INT:
!     case V4DI_FTYPE_V4DI_V2DI_INT:
!     case V2DF_FTYPE_V2DF_V2DF_INT:
!     case UQI_FTYPE_V8DI_V8UDI_INT:
!     case UQI_FTYPE_V8DF_V8DF_INT:
!     case UQI_FTYPE_V2DF_V2DF_INT:
!     case UQI_FTYPE_V4SF_V4SF_INT:
!     case UHI_FTYPE_V16SI_V16SI_INT:
!     case UHI_FTYPE_V16SF_V16SF_INT:
!     case V64QI_FTYPE_V64QI_V64QI_INT:
!     case V32HI_FTYPE_V32HI_V32HI_INT:
!     case V16SI_FTYPE_V16SI_V16SI_INT:
!     case V8DI_FTYPE_V8DI_V8DI_INT:
!       nargs = 3;
!       nargs_constant = 1;
!       break;
!     case V4DI_FTYPE_V4DI_V4DI_INT_CONVERT:
!       nargs = 3;
!       rmode = V4DImode;
!       nargs_constant = 1;
!       break;
!     case V2DI_FTYPE_V2DI_V2DI_INT_CONVERT:
!       nargs = 3;
!       rmode = V2DImode;
!       nargs_constant = 1;
!       break;
!     case V1DI_FTYPE_V1DI_V1DI_INT_CONVERT:
!       nargs = 3;
!       rmode = DImode;
!       nargs_constant = 1;
!       break;
!     case V2DI_FTYPE_V2DI_UINT_UINT:
!       nargs = 3;
!       nargs_constant = 2;
!       break;
!     case V8DI_FTYPE_V8DI_V8DI_INT_CONVERT:
!       nargs = 3;
!       rmode = V8DImode;
!       nargs_constant = 1;
!       break;
!     case V8DI_FTYPE_V8DI_V8DI_INT_V8DI_UDI_CONVERT:
!       nargs = 5;
!       rmode = V8DImode;
!       mask_pos = 2;
!       nargs_constant = 1;
!       break;
!     case QI_FTYPE_V8DF_INT_UQI:
!     case QI_FTYPE_V4DF_INT_UQI:
!     case QI_FTYPE_V2DF_INT_UQI:
!     case HI_FTYPE_V16SF_INT_UHI:
!     case QI_FTYPE_V8SF_INT_UQI:
!     case QI_FTYPE_V4SF_INT_UQI:
!     case V4SI_FTYPE_V4SI_V4SI_UHI:
!     case V8SI_FTYPE_V8SI_V8SI_UHI:
!       nargs = 3;
!       mask_pos = 1;
!       nargs_constant = 1;
!       break;
!     case V4DI_FTYPE_V4DI_V4DI_INT_V4DI_USI_CONVERT:
!       nargs = 5;
!       rmode = V4DImode;
!       mask_pos = 2;
!       nargs_constant = 1;
!       break;
!     case V2DI_FTYPE_V2DI_V2DI_INT_V2DI_UHI_CONVERT:
!       nargs = 5;
!       rmode = V2DImode;
!       mask_pos = 2;
!       nargs_constant = 1;
!       break;
!     case V32QI_FTYPE_V32QI_V32QI_V32QI_USI:
!     case V32HI_FTYPE_V32HI_V32HI_V32HI_USI:
!     case V32HI_FTYPE_V64QI_V64QI_V32HI_USI:
!     case V16SI_FTYPE_V32HI_V32HI_V16SI_UHI:
!     case V64QI_FTYPE_V64QI_V64QI_V64QI_UDI:
!     case V32HI_FTYPE_V32HI_V8HI_V32HI_USI:
!     case V16HI_FTYPE_V16HI_V8HI_V16HI_UHI:
!     case V8SI_FTYPE_V8SI_V4SI_V8SI_UQI:
!     case V4DI_FTYPE_V4DI_V2DI_V4DI_UQI:
!     case V64QI_FTYPE_V32HI_V32HI_V64QI_UDI:
!     case V32QI_FTYPE_V16HI_V16HI_V32QI_USI:
!     case V16QI_FTYPE_V8HI_V8HI_V16QI_UHI:
!     case V32HI_FTYPE_V16SI_V16SI_V32HI_USI:
!     case V16HI_FTYPE_V8SI_V8SI_V16HI_UHI:
!     case V8HI_FTYPE_V4SI_V4SI_V8HI_UQI:
!     case V4DF_FTYPE_V4DF_V4DI_V4DF_UQI:
!     case V8SF_FTYPE_V8SF_V8SI_V8SF_UQI:
!     case V4SF_FTYPE_V4SF_V4SI_V4SF_UQI:
!     case V2DF_FTYPE_V2DF_V2DI_V2DF_UQI:
!     case V2DI_FTYPE_V4SI_V4SI_V2DI_UQI:
!     case V4DI_FTYPE_V8SI_V8SI_V4DI_UQI:
!     case V4DF_FTYPE_V4DI_V4DF_V4DF_UQI:
!     case V8SF_FTYPE_V8SI_V8SF_V8SF_UQI:
!     case V2DF_FTYPE_V2DI_V2DF_V2DF_UQI:
!     case V4SF_FTYPE_V4SI_V4SF_V4SF_UQI:
!     case V16SF_FTYPE_V16SF_V16SF_V16SF_UHI:
!     case V16SF_FTYPE_V16SF_V16SI_V16SF_UHI:
!     case V16SF_FTYPE_V16SI_V16SF_V16SF_UHI:
!     case V16SI_FTYPE_V16SI_V16SI_V16SI_UHI:
!     case V16SI_FTYPE_V16SI_V4SI_V16SI_UHI:
!     case V8HI_FTYPE_V8HI_V8HI_V8HI_UQI:
!     case V8SI_FTYPE_V8SI_V8SI_V8SI_UQI:
!     case V4SI_FTYPE_V4SI_V4SI_V4SI_UQI:
!     case V8SF_FTYPE_V8SF_V8SF_V8SF_UQI:
!     case V16QI_FTYPE_V16QI_V16QI_V16QI_UHI:
!     case V16HI_FTYPE_V16HI_V16HI_V16HI_UHI:
!     case V2DI_FTYPE_V2DI_V2DI_V2DI_UQI:
!     case V2DF_FTYPE_V2DF_V2DF_V2DF_UQI:
!     case V4DI_FTYPE_V4DI_V4DI_V4DI_UQI:
!     case V4DF_FTYPE_V4DF_V4DF_V4DF_UQI:
!     case V4SF_FTYPE_V4SF_V4SF_V4SF_UQI:
!     case V8DF_FTYPE_V8DF_V8DF_V8DF_UQI:
!     case V8DF_FTYPE_V8DF_V8DI_V8DF_UQI:
!     case V8DF_FTYPE_V8DI_V8DF_V8DF_UQI:
!     case V8DI_FTYPE_V16SI_V16SI_V8DI_UQI:
!     case V8DI_FTYPE_V8DI_V2DI_V8DI_UQI:
!     case V8DI_FTYPE_V8DI_V8DI_V8DI_UQI:
!     case V8HI_FTYPE_V16QI_V16QI_V8HI_UQI:
!     case V16HI_FTYPE_V32QI_V32QI_V16HI_UHI:
!     case V8SI_FTYPE_V16HI_V16HI_V8SI_UQI:
!     case V4SI_FTYPE_V8HI_V8HI_V4SI_UQI:
!       nargs = 4;
!       break;
!     case V2DF_FTYPE_V2DF_V2DF_V2DI_INT:
!     case V4DF_FTYPE_V4DF_V4DF_V4DI_INT:
!     case V4SF_FTYPE_V4SF_V4SF_V4SI_INT:
!     case V8SF_FTYPE_V8SF_V8SF_V8SI_INT:
!     case V16SF_FTYPE_V16SF_V16SF_V16SI_INT:
!       nargs = 4;
!       nargs_constant = 1;
!       break;
!     case UQI_FTYPE_V4DI_V4DI_INT_UQI:
!     case UQI_FTYPE_V8SI_V8SI_INT_UQI:
!     case QI_FTYPE_V4DF_V4DF_INT_UQI:
!     case QI_FTYPE_V8SF_V8SF_INT_UQI:
!     case UQI_FTYPE_V2DI_V2DI_INT_UQI:
!     case UQI_FTYPE_V4SI_V4SI_INT_UQI:
!     case UQI_FTYPE_V2DF_V2DF_INT_UQI:
!     case UQI_FTYPE_V4SF_V4SF_INT_UQI:
!     case UDI_FTYPE_V64QI_V64QI_INT_UDI:
!     case USI_FTYPE_V32QI_V32QI_INT_USI:
!     case UHI_FTYPE_V16QI_V16QI_INT_UHI:
!     case USI_FTYPE_V32HI_V32HI_INT_USI:
!     case UHI_FTYPE_V16HI_V16HI_INT_UHI:
!     case UQI_FTYPE_V8HI_V8HI_INT_UQI:
!     case V32HI_FTYPE_V32HI_V32HI_V32HI_INT:
!     case V16HI_FTYPE_V16HI_V16HI_V16HI_INT:
!     case V8HI_FTYPE_V8HI_V8HI_V8HI_INT:
!     case V8SI_FTYPE_V8SI_V8SI_V8SI_INT:
!     case V4DI_FTYPE_V4DI_V4DI_V4DI_INT:
!     case V8DI_FTYPE_V8DI_V8DI_V8DI_INT:
!     case V16SI_FTYPE_V16SI_V16SI_V16SI_INT:
!     case V2DI_FTYPE_V2DI_V2DI_V2DI_INT:
!     case V4SI_FTYPE_V4SI_V4SI_V4SI_INT:
!       nargs = 4;
!       mask_pos = 1;
!       nargs_constant = 1;
!       break;
!     case V2DI_FTYPE_V2DI_V2DI_UINT_UINT:
!       nargs = 4;
!       nargs_constant = 2;
!       break;
!     case UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED:
!     case UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG:
!       nargs = 4;
!       break;
!     case UQI_FTYPE_V8DI_V8DI_INT_UQI:
!     case UHI_FTYPE_V16SI_V16SI_INT_UHI:
!       mask_pos = 1;
!       nargs = 4;
!       nargs_constant = 1;
!       break;
!     case V8SF_FTYPE_V8SF_INT_V8SF_UQI:
!     case V4SF_FTYPE_V4SF_INT_V4SF_UQI:
!     case V2DF_FTYPE_V4DF_INT_V2DF_UQI:
!     case V2DI_FTYPE_V4DI_INT_V2DI_UQI:
!     case V8SF_FTYPE_V16SF_INT_V8SF_UQI:
!     case V8SI_FTYPE_V16SI_INT_V8SI_UQI:
!     case V2DF_FTYPE_V8DF_INT_V2DF_UQI:
!     case V2DI_FTYPE_V8DI_INT_V2DI_UQI:
!     case V4SF_FTYPE_V8SF_INT_V4SF_UQI:
!     case V4SI_FTYPE_V8SI_INT_V4SI_UQI:
!     case V8HI_FTYPE_V8SF_INT_V8HI_UQI:
!     case V8HI_FTYPE_V4SF_INT_V8HI_UQI:
!     case V32HI_FTYPE_V32HI_INT_V32HI_USI:
!     case V16HI_FTYPE_V16HI_INT_V16HI_UHI:
!     case V8HI_FTYPE_V8HI_INT_V8HI_UQI:
!     case V4DI_FTYPE_V4DI_INT_V4DI_UQI:
!     case V2DI_FTYPE_V2DI_INT_V2DI_UQI:
!     case V8SI_FTYPE_V8SI_INT_V8SI_UQI:
!     case V4SI_FTYPE_V4SI_INT_V4SI_UQI:
!     case V4DF_FTYPE_V4DF_INT_V4DF_UQI:
!     case V2DF_FTYPE_V2DF_INT_V2DF_UQI:
!     case V8DF_FTYPE_V8DF_INT_V8DF_UQI:
!     case V16SF_FTYPE_V16SF_INT_V16SF_UHI:
!     case V16HI_FTYPE_V16SF_INT_V16HI_UHI:
!     case V16SI_FTYPE_V16SI_INT_V16SI_UHI:
!     case V4SI_FTYPE_V16SI_INT_V4SI_UQI:
!     case V4DI_FTYPE_V8DI_INT_V4DI_UQI:
!     case V4DF_FTYPE_V8DF_INT_V4DF_UQI:
!     case V4SF_FTYPE_V16SF_INT_V4SF_UQI:
!     case V8DI_FTYPE_V8DI_INT_V8DI_UQI:
!       nargs = 4;
!       mask_pos = 2;
!       nargs_constant = 1;
!       break;
!     case V16SF_FTYPE_V16SF_V4SF_INT_V16SF_UHI:
!     case V16SI_FTYPE_V16SI_V4SI_INT_V16SI_UHI:
!     case V8DF_FTYPE_V8DF_V8DF_INT_V8DF_UQI:
!     case V8DI_FTYPE_V8DI_V8DI_INT_V8DI_UQI:
!     case V16SF_FTYPE_V16SF_V16SF_INT_V16SF_UHI:
!     case V16SI_FTYPE_V16SI_V16SI_INT_V16SI_UHI:
!     case V4SF_FTYPE_V4SF_V4SF_INT_V4SF_UQI:
!     case V2DF_FTYPE_V2DF_V2DF_INT_V2DF_UQI:
!     case V8DF_FTYPE_V8DF_V4DF_INT_V8DF_UQI:
!     case V8DI_FTYPE_V8DI_V4DI_INT_V8DI_UQI:
!     case V4DF_FTYPE_V4DF_V4DF_INT_V4DF_UQI:
!     case V8SF_FTYPE_V8SF_V8SF_INT_V8SF_UQI:
!     case V8DF_FTYPE_V8DF_V2DF_INT_V8DF_UQI:
!     case V8DI_FTYPE_V8DI_V2DI_INT_V8DI_UQI:
!     case V8SI_FTYPE_V8SI_V8SI_INT_V8SI_UQI:
!     case V4DI_FTYPE_V4DI_V4DI_INT_V4DI_UQI:
!     case V4SI_FTYPE_V4SI_V4SI_INT_V4SI_UQI:
!     case V2DI_FTYPE_V2DI_V2DI_INT_V2DI_UQI:
!     case V32HI_FTYPE_V64QI_V64QI_INT_V32HI_USI:
!     case V16HI_FTYPE_V32QI_V32QI_INT_V16HI_UHI:
!     case V8HI_FTYPE_V16QI_V16QI_INT_V8HI_UQI:
!     case V16SF_FTYPE_V16SF_V8SF_INT_V16SF_UHI:
!     case V16SI_FTYPE_V16SI_V8SI_INT_V16SI_UHI:
!     case V8SF_FTYPE_V8SF_V4SF_INT_V8SF_UQI:
!     case V8SI_FTYPE_V8SI_V4SI_INT_V8SI_UQI:
!     case V4DI_FTYPE_V4DI_V2DI_INT_V4DI_UQI:
!     case V4DF_FTYPE_V4DF_V2DF_INT_V4DF_UQI:
!       nargs = 5;
!       mask_pos = 2;
!       nargs_constant = 1;
!       break;
!     case V8DI_FTYPE_V8DI_V8DI_V8DI_INT_UQI:
!     case V16SI_FTYPE_V16SI_V16SI_V16SI_INT_UHI:
!     case V2DF_FTYPE_V2DF_V2DF_V2DI_INT_UQI:
!     case V4SF_FTYPE_V4SF_V4SF_V4SI_INT_UQI:
!     case V8SF_FTYPE_V8SF_V8SF_V8SI_INT_UQI:
!     case V8SI_FTYPE_V8SI_V8SI_V8SI_INT_UQI:
!     case V4DF_FTYPE_V4DF_V4DF_V4DI_INT_UQI:
!     case V4DI_FTYPE_V4DI_V4DI_V4DI_INT_UQI:
!     case V4SI_FTYPE_V4SI_V4SI_V4SI_INT_UQI:
!     case V2DI_FTYPE_V2DI_V2DI_V2DI_INT_UQI:
!       nargs = 5;
!       mask_pos = 1;
!       nargs_constant = 1;
!       break;
!     case V64QI_FTYPE_V64QI_V64QI_INT_V64QI_UDI:
!     case V32QI_FTYPE_V32QI_V32QI_INT_V32QI_USI:
!     case V16QI_FTYPE_V16QI_V16QI_INT_V16QI_UHI:
!     case V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT:
!     case V16SI_FTYPE_V16SI_V16SI_INT_V16SI_INT:
!     case V8DI_FTYPE_V8DI_V8DI_INT_V8DI_INT:
!     case V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT:
!     case V8SI_FTYPE_V8SI_V8SI_INT_V8SI_INT:
!     case V4DI_FTYPE_V4DI_V4DI_INT_V4DI_INT:
!     case V8HI_FTYPE_V8HI_V8HI_INT_V8HI_INT:
!     case V4SI_FTYPE_V4SI_V4SI_INT_V4SI_INT:
!     case V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT:
!       nargs = 5;
!       mask_pos = 1;
!       nargs_constant = 2;
!       break;
! 
!     default:
!       gcc_unreachable ();
!     }
! 
!   gcc_assert (nargs <= ARRAY_SIZE (args));
! 
!   if (comparison != UNKNOWN)
!     {
!       gcc_assert (nargs == 2);
!       return ix86_expand_sse_compare (d, exp, target, swap);
!     }
! 
!   if (rmode == VOIDmode || rmode == tmode)
!     {
!       if (optimize
! 	  || target == 0
! 	  || GET_MODE (target) != tmode
! 	  || !insn_p->operand[0].predicate (target, tmode))
! 	target = gen_reg_rtx (tmode);
!       else if (memory_operand (target, tmode))
! 	num_memory++;
!       real_target = target;
!     }
!   else
!     {
!       real_target = gen_reg_rtx (tmode);
!       target = lowpart_subreg (rmode, real_target, tmode);
!     }
! 
!   for (i = 0; i < nargs; i++)
!     {
!       tree arg = CALL_EXPR_ARG (exp, i);
!       rtx op = expand_normal (arg);
!       machine_mode mode = insn_p->operand[i + 1].mode;
!       bool match = insn_p->operand[i + 1].predicate (op, mode);
! 
!       if (second_arg_count && i == 1)
! 	{
! 	  /* SIMD shift insns take either an 8-bit immediate or
! 	     register as count.  But builtin functions take int as
! 	     count.  If count doesn't match, we put it in register.
! 	     The instructions are using 64-bit count, if op is just
! 	     32-bit, zero-extend it, as negative shift counts
! 	     are undefined behavior and zero-extension is more
! 	     efficient.  */
! 	  if (!match)
! 	    {
! 	      if (SCALAR_INT_MODE_P (GET_MODE (op)))
! 		op = convert_modes (mode, GET_MODE (op), op, 1);
! 	      else
! 		op = lowpart_subreg (mode, op, GET_MODE (op));
! 	      if (!insn_p->operand[i + 1].predicate (op, mode))
! 		op = copy_to_reg (op);
! 	    }
! 	}
!       else if ((mask_pos && (nargs - i - mask_pos) == nargs_constant) ||
! 	       (!mask_pos && (nargs - i) <= nargs_constant))
! 	{
! 	  if (!match)
! 	    switch (icode)
! 	      {
! 	      case CODE_FOR_avx_vinsertf128v4di:
! 	      case CODE_FOR_avx_vextractf128v4di:
! 		error ("the last argument must be an 1-bit immediate");
! 		return const0_rtx;
! 
! 	      case CODE_FOR_avx512f_cmpv8di3_mask:
! 	      case CODE_FOR_avx512f_cmpv16si3_mask:
! 	      case CODE_FOR_avx512f_ucmpv8di3_mask:
! 	      case CODE_FOR_avx512f_ucmpv16si3_mask:
! 	      case CODE_FOR_avx512vl_cmpv4di3_mask:
! 	      case CODE_FOR_avx512vl_cmpv8si3_mask:
! 	      case CODE_FOR_avx512vl_ucmpv4di3_mask:
! 	      case CODE_FOR_avx512vl_ucmpv8si3_mask:
! 	      case CODE_FOR_avx512vl_cmpv2di3_mask:
! 	      case CODE_FOR_avx512vl_cmpv4si3_mask:
! 	      case CODE_FOR_avx512vl_ucmpv2di3_mask:
! 	      case CODE_FOR_avx512vl_ucmpv4si3_mask:
! 		error ("the last argument must be a 3-bit immediate");
! 		return const0_rtx;
! 
! 	      case CODE_FOR_sse4_1_roundsd:
! 	      case CODE_FOR_sse4_1_roundss:
! 
! 	      case CODE_FOR_sse4_1_roundpd:
! 	      case CODE_FOR_sse4_1_roundps:
! 	      case CODE_FOR_avx_roundpd256:
! 	      case CODE_FOR_avx_roundps256:
! 
! 	      case CODE_FOR_sse4_1_roundpd_vec_pack_sfix:
! 	      case CODE_FOR_sse4_1_roundps_sfix:
! 	      case CODE_FOR_avx_roundpd_vec_pack_sfix256:
! 	      case CODE_FOR_avx_roundps_sfix256:
! 
! 	      case CODE_FOR_sse4_1_blendps:
! 	      case CODE_FOR_avx_blendpd256:
! 	      case CODE_FOR_avx_vpermilv4df:
! 	      case CODE_FOR_avx_vpermilv4df_mask:
! 	      case CODE_FOR_avx512f_getmantv8df_mask:
! 	      case CODE_FOR_avx512f_getmantv16sf_mask:
! 	      case CODE_FOR_avx512vl_getmantv8sf_mask:
! 	      case CODE_FOR_avx512vl_getmantv4df_mask:
! 	      case CODE_FOR_avx512vl_getmantv4sf_mask:
! 	      case CODE_FOR_avx512vl_getmantv2df_mask:
! 	      case CODE_FOR_avx512dq_rangepv8df_mask_round:
! 	      case CODE_FOR_avx512dq_rangepv16sf_mask_round:
! 	      case CODE_FOR_avx512dq_rangepv4df_mask:
! 	      case CODE_FOR_avx512dq_rangepv8sf_mask:
! 	      case CODE_FOR_avx512dq_rangepv2df_mask:
! 	      case CODE_FOR_avx512dq_rangepv4sf_mask:
! 	      case CODE_FOR_avx_shufpd256_mask:
! 		error ("the last argument must be a 4-bit immediate");
! 		return const0_rtx;
! 
! 	      case CODE_FOR_sha1rnds4:
! 	      case CODE_FOR_sse4_1_blendpd:
! 	      case CODE_FOR_avx_vpermilv2df:
! 	      case CODE_FOR_avx_vpermilv2df_mask:
! 	      case CODE_FOR_xop_vpermil2v2df3:
! 	      case CODE_FOR_xop_vpermil2v4sf3:
! 	      case CODE_FOR_xop_vpermil2v4df3:
! 	      case CODE_FOR_xop_vpermil2v8sf3:
! 	      case CODE_FOR_avx512f_vinsertf32x4_mask:
! 	      case CODE_FOR_avx512f_vinserti32x4_mask:
! 	      case CODE_FOR_avx512f_vextractf32x4_mask:
! 	      case CODE_FOR_avx512f_vextracti32x4_mask:
! 	      case CODE_FOR_sse2_shufpd:
! 	      case CODE_FOR_sse2_shufpd_mask:
! 	      case CODE_FOR_avx512dq_shuf_f64x2_mask:
! 	      case CODE_FOR_avx512dq_shuf_i64x2_mask:
! 	      case CODE_FOR_avx512vl_shuf_i32x4_mask:
! 	      case CODE_FOR_avx512vl_shuf_f32x4_mask:
! 		error ("the last argument must be a 2-bit immediate");
! 		return const0_rtx;
! 
! 	      case CODE_FOR_avx_vextractf128v4df:
! 	      case CODE_FOR_avx_vextractf128v8sf:
! 	      case CODE_FOR_avx_vextractf128v8si:
! 	      case CODE_FOR_avx_vinsertf128v4df:
! 	      case CODE_FOR_avx_vinsertf128v8sf:
! 	      case CODE_FOR_avx_vinsertf128v8si:
! 	      case CODE_FOR_avx512f_vinsertf64x4_mask:
! 	      case CODE_FOR_avx512f_vinserti64x4_mask:
! 	      case CODE_FOR_avx512f_vextractf64x4_mask:
! 	      case CODE_FOR_avx512f_vextracti64x4_mask:
! 	      case CODE_FOR_avx512dq_vinsertf32x8_mask:
! 	      case CODE_FOR_avx512dq_vinserti32x8_mask:
! 	      case CODE_FOR_avx512vl_vinsertv4df:
! 	      case CODE_FOR_avx512vl_vinsertv4di:
! 	      case CODE_FOR_avx512vl_vinsertv8sf:
! 	      case CODE_FOR_avx512vl_vinsertv8si:
! 		error ("the last argument must be a 1-bit immediate");
! 		return const0_rtx;
! 
! 	      case CODE_FOR_avx_vmcmpv2df3:
! 	      case CODE_FOR_avx_vmcmpv4sf3:
! 	      case CODE_FOR_avx_cmpv2df3:
! 	      case CODE_FOR_avx_cmpv4sf3:
! 	      case CODE_FOR_avx_cmpv4df3:
! 	      case CODE_FOR_avx_cmpv8sf3:
! 	      case CODE_FOR_avx512f_cmpv8df3_mask:
! 	      case CODE_FOR_avx512f_cmpv16sf3_mask:
! 	      case CODE_FOR_avx512f_vmcmpv2df3_mask:
! 	      case CODE_FOR_avx512f_vmcmpv4sf3_mask:
! 		error ("the last argument must be a 5-bit immediate");
! 		return const0_rtx;
! 
! 	      default:
! 		switch (nargs_constant)
! 		  {
! 		  case 2:
! 		    if ((mask_pos && (nargs - i - mask_pos) == nargs_constant) ||
! 			(!mask_pos && (nargs - i) == nargs_constant))
! 		      {
! 			error ("the next to last argument must be an 8-bit immediate");
! 			break;
! 		      }
! 		    /* FALLTHRU */
! 		  case 1:
! 		    error ("the last argument must be an 8-bit immediate");
! 		    break;
! 		  default:
! 		    gcc_unreachable ();
! 		  }
! 		return const0_rtx;
! 	      }
! 	}
!       else
! 	{
! 	  if (VECTOR_MODE_P (mode))
! 	    op = safe_vector_operand (op, mode);
! 
! 	  /* If we aren't optimizing, only allow one memory operand to
! 	     be generated.  */
! 	  if (memory_operand (op, mode))
! 	    num_memory++;
! 
! 	  op = fixup_modeless_constant (op, mode);
! 
! 	  if (GET_MODE (op) == mode || GET_MODE (op) == VOIDmode)
! 	    {
! 	      if (optimize || !match || num_memory > 1)
! 		op = copy_to_mode_reg (mode, op);
! 	    }
! 	  else
! 	    {
! 	      op = copy_to_reg (op);
! 	      op = lowpart_subreg (mode, op, GET_MODE (op));
! 	    }
! 	}
! 
!       args[i].op = op;
!       args[i].mode = mode;
!     }
! 
!   switch (nargs)
!     {
!     case 1:
!       pat = GEN_FCN (icode) (real_target, args[0].op);
!       break;
!     case 2:
!       pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op);
!       break;
!     case 3:
!       pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
! 			     args[2].op);
!       break;
!     case 4:
!       pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
! 			     args[2].op, args[3].op);
!       break;
!     case 5:
!       pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
! 			     args[2].op, args[3].op, args[4].op);
!       break;
!     case 6:
!       pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
! 			     args[2].op, args[3].op, args[4].op,
! 			     args[5].op);
!       break;
!     default:
!       gcc_unreachable ();
!     }
! 
!   if (! pat)
!     return 0;
! 
!   emit_insn (pat);
!   return target;
! }
! 
! /* Transform pattern of following layout:
!      (set A
!        (unspec [B C] UNSPEC_EMBEDDED_ROUNDING))
!      )
!    into:
!      (set (A B)) */
! 
! static rtx
! ix86_erase_embedded_rounding (rtx pat)
! {
!   if (GET_CODE (pat) == INSN)
!     pat = PATTERN (pat);
! 
!   gcc_assert (GET_CODE (pat) == SET);
!   rtx src = SET_SRC (pat);
!   gcc_assert (XVECLEN (src, 0) == 2);
!   rtx p0 = XVECEXP (src, 0, 0);
!   gcc_assert (GET_CODE (src) == UNSPEC
! 	      && XINT (src, 1) == UNSPEC_EMBEDDED_ROUNDING);
!   rtx res = gen_rtx_SET (SET_DEST (pat), p0);
!   return res;
! }
! 
! /* Subroutine of ix86_expand_round_builtin to take care of comi insns
!    with rounding.  */
! static rtx
! ix86_expand_sse_comi_round (const struct builtin_description *d,
! 			    tree exp, rtx target)
! {
!   rtx pat, set_dst;
!   tree arg0 = CALL_EXPR_ARG (exp, 0);
!   tree arg1 = CALL_EXPR_ARG (exp, 1);
!   tree arg2 = CALL_EXPR_ARG (exp, 2);
!   tree arg3 = CALL_EXPR_ARG (exp, 3);
!   rtx op0 = expand_normal (arg0);
!   rtx op1 = expand_normal (arg1);
!   rtx op2 = expand_normal (arg2);
!   rtx op3 = expand_normal (arg3);
!   enum insn_code icode = d->icode;
!   const struct insn_data_d *insn_p = &insn_data[icode];
!   machine_mode mode0 = insn_p->operand[0].mode;
!   machine_mode mode1 = insn_p->operand[1].mode;
!   enum rtx_code comparison = UNEQ;
!   bool need_ucomi = false;
! 
!   /* See avxintrin.h for values.  */
!   enum rtx_code comi_comparisons[32] =
!     {
!       UNEQ, GT, GE, UNORDERED, LTGT, UNLE, UNLT, ORDERED, UNEQ, UNLT,
!       UNLE, LT, LTGT, GE, GT, LT, UNEQ, GT, GE, UNORDERED, LTGT, UNLE,
!       UNLT, ORDERED, UNEQ, UNLT, UNLE, LT, LTGT, GE, GT, LT
!     };
!   bool need_ucomi_values[32] =
!     {
!       true,  false, false, true,  true,  false, false, true,
!       true,  false, false, true,  true,  false, false, true,
!       false, true,  true,  false, false, true,  true,  false,
!       false, true,  true,  false, false, true,  true,  false
!     };
! 
!   if (!CONST_INT_P (op2))
!     {
!       error ("the third argument must be comparison constant");
!       return const0_rtx;
!     }
!   if (INTVAL (op2) < 0 || INTVAL (op2) >= 32)
!     {
!       error ("incorrect comparison mode");
!       return const0_rtx;
!     }
! 
!   if (!insn_p->operand[2].predicate (op3, SImode))
!     {
!       error ("incorrect rounding operand");
!       return const0_rtx;
!     }
! 
!   comparison = comi_comparisons[INTVAL (op2)];
!   need_ucomi = need_ucomi_values[INTVAL (op2)];
! 
!   if (VECTOR_MODE_P (mode0))
!     op0 = safe_vector_operand (op0, mode0);
!   if (VECTOR_MODE_P (mode1))
!     op1 = safe_vector_operand (op1, mode1);
! 
!   target = gen_reg_rtx (SImode);
!   emit_move_insn (target, const0_rtx);
!   target = gen_rtx_SUBREG (QImode, target, 0);
! 
!   if ((optimize && !register_operand (op0, mode0))
!       || !insn_p->operand[0].predicate (op0, mode0))
!     op0 = copy_to_mode_reg (mode0, op0);
!   if ((optimize && !register_operand (op1, mode1))
!       || !insn_p->operand[1].predicate (op1, mode1))
!     op1 = copy_to_mode_reg (mode1, op1);
! 
!   if (need_ucomi)
!     icode = icode == CODE_FOR_sse_comi_round
! 		     ? CODE_FOR_sse_ucomi_round
! 		     : CODE_FOR_sse2_ucomi_round;
! 
!   pat = GEN_FCN (icode) (op0, op1, op3);
!   if (! pat)
!     return 0;
! 
!   /* Rounding operand can be either NO_ROUND or ROUND_SAE at this point.  */
!   if (INTVAL (op3) == NO_ROUND)
!     {
!       pat = ix86_erase_embedded_rounding (pat);
!       if (! pat)
! 	return 0;
! 
!       set_dst = SET_DEST (pat);
!     }
!   else
!     {
!       gcc_assert (GET_CODE (pat) == SET);
!       set_dst = SET_DEST (pat);
!     }
! 
!   emit_insn (pat);
!   emit_insn (gen_rtx_SET (gen_rtx_STRICT_LOW_PART (VOIDmode, target),
! 			  gen_rtx_fmt_ee (comparison, QImode,
! 					  set_dst,
! 					  const0_rtx)));
! 
!   return SUBREG_REG (target);
! }
! 
! static rtx
! ix86_expand_round_builtin (const struct builtin_description *d,
! 			   tree exp, rtx target)
! {
!   rtx pat;
!   unsigned int i, nargs;
!   struct
!     {
!       rtx op;
!       machine_mode mode;
!     } args[6];
!   enum insn_code icode = d->icode;
!   const struct insn_data_d *insn_p = &insn_data[icode];
!   machine_mode tmode = insn_p->operand[0].mode;
!   unsigned int nargs_constant = 0;
!   unsigned int redundant_embed_rnd = 0;
! 
!   switch ((enum ix86_builtin_func_type) d->flag)
!     {
!     case UINT64_FTYPE_V2DF_INT:
!     case UINT64_FTYPE_V4SF_INT:
!     case UINT_FTYPE_V2DF_INT:
!     case UINT_FTYPE_V4SF_INT:
!     case INT64_FTYPE_V2DF_INT:
!     case INT64_FTYPE_V4SF_INT:
!     case INT_FTYPE_V2DF_INT:
!     case INT_FTYPE_V4SF_INT:
!       nargs = 2;
!       break;
!     case V4SF_FTYPE_V4SF_UINT_INT:
!     case V4SF_FTYPE_V4SF_UINT64_INT:
!     case V2DF_FTYPE_V2DF_UINT64_INT:
!     case V4SF_FTYPE_V4SF_INT_INT:
!     case V4SF_FTYPE_V4SF_INT64_INT:
!     case V2DF_FTYPE_V2DF_INT64_INT:
!     case V4SF_FTYPE_V4SF_V4SF_INT:
!     case V2DF_FTYPE_V2DF_V2DF_INT:
!     case V4SF_FTYPE_V4SF_V2DF_INT:
!     case V2DF_FTYPE_V2DF_V4SF_INT:
!       nargs = 3;
!       break;
!     case V8SF_FTYPE_V8DF_V8SF_QI_INT:
!     case V8DF_FTYPE_V8DF_V8DF_QI_INT:
!     case V8SI_FTYPE_V8DF_V8SI_QI_INT:
!     case V8DI_FTYPE_V8DF_V8DI_QI_INT:
!     case V8SF_FTYPE_V8DI_V8SF_QI_INT:
!     case V8DF_FTYPE_V8DI_V8DF_QI_INT:
!     case V16SF_FTYPE_V16SF_V16SF_HI_INT:
!     case V8DI_FTYPE_V8SF_V8DI_QI_INT:
!     case V16SF_FTYPE_V16SI_V16SF_HI_INT:
!     case V16SI_FTYPE_V16SF_V16SI_HI_INT:
!     case V8DF_FTYPE_V8SF_V8DF_QI_INT:
!     case V16SF_FTYPE_V16HI_V16SF_HI_INT:
!     case V2DF_FTYPE_V2DF_V2DF_V2DF_INT:
!     case V4SF_FTYPE_V4SF_V4SF_V4SF_INT:
!       nargs = 4;
!       break;
!     case V4SF_FTYPE_V4SF_V4SF_INT_INT:
!     case V2DF_FTYPE_V2DF_V2DF_INT_INT:
!       nargs_constant = 2;
!       nargs = 4;
!       break;
!     case INT_FTYPE_V4SF_V4SF_INT_INT:
!     case INT_FTYPE_V2DF_V2DF_INT_INT:
!       return ix86_expand_sse_comi_round (d, exp, target);
!     case V8DF_FTYPE_V8DF_V8DF_V8DF_UQI_INT:
!     case V2DF_FTYPE_V2DF_V2DF_V2DF_UQI_INT:
!     case V4SF_FTYPE_V4SF_V4SF_V4SF_UQI_INT:
!     case V16SF_FTYPE_V16SF_V16SF_V16SF_HI_INT:
!     case V2DF_FTYPE_V2DF_V2DF_V2DF_QI_INT:
!     case V2DF_FTYPE_V2DF_V4SF_V2DF_QI_INT:
!     case V4SF_FTYPE_V4SF_V4SF_V4SF_QI_INT:
!     case V4SF_FTYPE_V4SF_V2DF_V4SF_QI_INT:
!       nargs = 5;
!       break;
!     case V16SF_FTYPE_V16SF_INT_V16SF_HI_INT:
!     case V8DF_FTYPE_V8DF_INT_V8DF_QI_INT:
!       nargs_constant = 4;
!       nargs = 5;
!       break;
!     case UQI_FTYPE_V8DF_V8DF_INT_UQI_INT:
!     case UQI_FTYPE_V2DF_V2DF_INT_UQI_INT:
!     case UHI_FTYPE_V16SF_V16SF_INT_UHI_INT:
!     case UQI_FTYPE_V4SF_V4SF_INT_UQI_INT:
!       nargs_constant = 3;
!       nargs = 5;
!       break;
!     case V16SF_FTYPE_V16SF_V16SF_INT_V16SF_HI_INT:
!     case V8DF_FTYPE_V8DF_V8DF_INT_V8DF_QI_INT:
!     case V4SF_FTYPE_V4SF_V4SF_INT_V4SF_QI_INT:
!     case V2DF_FTYPE_V2DF_V2DF_INT_V2DF_QI_INT:
!     case V2DF_FTYPE_V2DF_V2DF_INT_V2DF_UQI_INT:
!     case V4SF_FTYPE_V4SF_V4SF_INT_V4SF_UQI_INT:
!       nargs = 6;
!       nargs_constant = 4;
!       break;
!     case V8DF_FTYPE_V8DF_V8DF_V8DI_INT_QI_INT:
!     case V16SF_FTYPE_V16SF_V16SF_V16SI_INT_HI_INT:
!     case V2DF_FTYPE_V2DF_V2DF_V2DI_INT_QI_INT:
!     case V4SF_FTYPE_V4SF_V4SF_V4SI_INT_QI_INT:
!       nargs = 6;
!       nargs_constant = 3;
!       break;
!     default:
!       gcc_unreachable ();
!     }
!   gcc_assert (nargs <= ARRAY_SIZE (args));
! 
!   if (optimize
!       || target == 0
!       || GET_MODE (target) != tmode
!       || !insn_p->operand[0].predicate (target, tmode))
!     target = gen_reg_rtx (tmode);
! 
!   for (i = 0; i < nargs; i++)
!     {
!       tree arg = CALL_EXPR_ARG (exp, i);
!       rtx op = expand_normal (arg);
!       machine_mode mode = insn_p->operand[i + 1].mode;
!       bool match = insn_p->operand[i + 1].predicate (op, mode);
! 
!       if (i == nargs - nargs_constant)
! 	{
! 	  if (!match)
! 	    {
! 	      switch (icode)
! 		{
! 		case CODE_FOR_avx512f_getmantv8df_mask_round:
! 		case CODE_FOR_avx512f_getmantv16sf_mask_round:
! 		case CODE_FOR_avx512f_vgetmantv2df_round:
! 		case CODE_FOR_avx512f_vgetmantv2df_mask_round:
! 		case CODE_FOR_avx512f_vgetmantv4sf_round:
! 		case CODE_FOR_avx512f_vgetmantv4sf_mask_round:
! 		  error ("the immediate argument must be a 4-bit immediate");
! 		  return const0_rtx;
! 		case CODE_FOR_avx512f_cmpv8df3_mask_round:
! 		case CODE_FOR_avx512f_cmpv16sf3_mask_round:
! 		case CODE_FOR_avx512f_vmcmpv2df3_mask_round:
! 		case CODE_FOR_avx512f_vmcmpv4sf3_mask_round:
! 		  error ("the immediate argument must be a 5-bit immediate");
! 		  return const0_rtx;
! 		default:
! 		  error ("the immediate argument must be an 8-bit immediate");
! 		  return const0_rtx;
! 		}
! 	    }
! 	}
!       else if (i == nargs-1)
! 	{
! 	  if (!insn_p->operand[nargs].predicate (op, SImode))
! 	    {
! 	      error ("incorrect rounding operand");
! 	      return const0_rtx;
! 	    }
! 
! 	  /* If there is no rounding use normal version of the pattern.  */
! 	  if (INTVAL (op) == NO_ROUND)
! 	    redundant_embed_rnd = 1;
! 	}
!       else
! 	{
! 	  if (VECTOR_MODE_P (mode))
! 	    op = safe_vector_operand (op, mode);
! 
! 	  op = fixup_modeless_constant (op, mode);
! 
! 	  if (GET_MODE (op) == mode || GET_MODE (op) == VOIDmode)
! 	    {
! 	      if (optimize || !match)
! 		op = copy_to_mode_reg (mode, op);
! 	    }
! 	  else
! 	    {
! 	      op = copy_to_reg (op);
! 	      op = lowpart_subreg (mode, op, GET_MODE (op));
! 	    }
! 	}
! 
!       args[i].op = op;
!       args[i].mode = mode;
!     }
! 
!   switch (nargs)
!     {
!     case 1:
!       pat = GEN_FCN (icode) (target, args[0].op);
!       break;
!     case 2:
!       pat = GEN_FCN (icode) (target, args[0].op, args[1].op);
!       break;
!     case 3:
!       pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
! 			     args[2].op);
!       break;
!     case 4:
!       pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
! 			     args[2].op, args[3].op);
!       break;
!     case 5:
!       pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
! 			     args[2].op, args[3].op, args[4].op);
!       break;
!     case 6:
!       pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
! 			     args[2].op, args[3].op, args[4].op,
! 			     args[5].op);
!       break;
!     default:
!       gcc_unreachable ();
!     }
! 
!   if (!pat)
!     return 0;
! 
!   if (redundant_embed_rnd)
!     pat = ix86_erase_embedded_rounding (pat);
! 
!   emit_insn (pat);
!   return target;
! }
! 
! /* Subroutine of ix86_expand_builtin to take care of special insns
!    with variable number of operands.  */
! 
! static rtx
! ix86_expand_special_args_builtin (const struct builtin_description *d,
! 				  tree exp, rtx target)
! {
!   tree arg;
!   rtx pat, op;
!   unsigned int i, nargs, arg_adjust, memory;
!   bool aligned_mem = false;
!   struct
!     {
!       rtx op;
!       machine_mode mode;
!     } args[3];
!   enum insn_code icode = d->icode;
!   bool last_arg_constant = false;
!   const struct insn_data_d *insn_p = &insn_data[icode];
!   machine_mode tmode = insn_p->operand[0].mode;
!   enum { load, store } klass;
! 
!   switch ((enum ix86_builtin_func_type) d->flag)
!     {
!     case VOID_FTYPE_VOID:
!       emit_insn (GEN_FCN (icode) (target));
!       return 0;
!     case VOID_FTYPE_UINT64:
!     case VOID_FTYPE_UNSIGNED:
!       nargs = 0;
!       klass = store;
!       memory = 0;
!       break;
! 
!     case INT_FTYPE_VOID:
!     case USHORT_FTYPE_VOID:
!     case UINT64_FTYPE_VOID:
!     case UINT_FTYPE_VOID:
!     case UNSIGNED_FTYPE_VOID:
!       nargs = 0;
!       klass = load;
!       memory = 0;
!       break;
!     case UINT64_FTYPE_PUNSIGNED:
!     case V2DI_FTYPE_PV2DI:
!     case V4DI_FTYPE_PV4DI:
!     case V32QI_FTYPE_PCCHAR:
!     case V16QI_FTYPE_PCCHAR:
!     case V8SF_FTYPE_PCV4SF:
!     case V8SF_FTYPE_PCFLOAT:
!     case V4SF_FTYPE_PCFLOAT:
!     case V4DF_FTYPE_PCV2DF:
!     case V4DF_FTYPE_PCDOUBLE:
!     case V2DF_FTYPE_PCDOUBLE:
!     case VOID_FTYPE_PVOID:
!     case V8DI_FTYPE_PV8DI:
!       nargs = 1;
!       klass = load;
!       memory = 0;
!       switch (icode)
! 	{
! 	case CODE_FOR_sse4_1_movntdqa:
! 	case CODE_FOR_avx2_movntdqa:
! 	case CODE_FOR_avx512f_movntdqa:
! 	  aligned_mem = true;
! 	  break;
! 	default:
! 	  break;
! 	}
!       break;
!     case VOID_FTYPE_PV2SF_V4SF:
!     case VOID_FTYPE_PV8DI_V8DI:
!     case VOID_FTYPE_PV4DI_V4DI:
!     case VOID_FTYPE_PV2DI_V2DI:
!     case VOID_FTYPE_PCHAR_V32QI:
!     case VOID_FTYPE_PCHAR_V16QI:
!     case VOID_FTYPE_PFLOAT_V16SF:
!     case VOID_FTYPE_PFLOAT_V8SF:
!     case VOID_FTYPE_PFLOAT_V4SF:
!     case VOID_FTYPE_PDOUBLE_V8DF:
!     case VOID_FTYPE_PDOUBLE_V4DF:
!     case VOID_FTYPE_PDOUBLE_V2DF:
!     case VOID_FTYPE_PLONGLONG_LONGLONG:
!     case VOID_FTYPE_PULONGLONG_ULONGLONG:
!     case VOID_FTYPE_PUNSIGNED_UNSIGNED:
!     case VOID_FTYPE_PINT_INT:
!       nargs = 1;
!       klass = store;
!       /* Reserve memory operand for target.  */
!       memory = ARRAY_SIZE (args);
!       switch (icode)
! 	{
! 	/* These builtins and instructions require the memory
! 	   to be properly aligned.  */
! 	case CODE_FOR_avx_movntv4di:
! 	case CODE_FOR_sse2_movntv2di:
! 	case CODE_FOR_avx_movntv8sf:
! 	case CODE_FOR_sse_movntv4sf:
! 	case CODE_FOR_sse4a_vmmovntv4sf:
! 	case CODE_FOR_avx_movntv4df:
! 	case CODE_FOR_sse2_movntv2df:
! 	case CODE_FOR_sse4a_vmmovntv2df:
! 	case CODE_FOR_sse2_movntidi:
! 	case CODE_FOR_sse_movntq:
! 	case CODE_FOR_sse2_movntisi:
! 	case CODE_FOR_avx512f_movntv16sf:
! 	case CODE_FOR_avx512f_movntv8df:
! 	case CODE_FOR_avx512f_movntv8di:
! 	  aligned_mem = true;
! 	  break;
! 	default:
! 	  break;
! 	}
!       break;
!     case VOID_FTYPE_PVOID_PCVOID:
! 	nargs = 1;
! 	klass = store;
! 	memory = 0;
! 
! 	break;
!     case V4SF_FTYPE_V4SF_PCV2SF:
!     case V2DF_FTYPE_V2DF_PCDOUBLE:
!       nargs = 2;
!       klass = load;
!       memory = 1;
!       break;
!     case V8SF_FTYPE_PCV8SF_V8SI:
!     case V4DF_FTYPE_PCV4DF_V4DI:
!     case V4SF_FTYPE_PCV4SF_V4SI:
!     case V2DF_FTYPE_PCV2DF_V2DI:
!     case V8SI_FTYPE_PCV8SI_V8SI:
!     case V4DI_FTYPE_PCV4DI_V4DI:
!     case V4SI_FTYPE_PCV4SI_V4SI:
!     case V2DI_FTYPE_PCV2DI_V2DI:
!     case VOID_FTYPE_INT_INT64:
!       nargs = 2;
!       klass = load;
!       memory = 0;
!       break;
!     case VOID_FTYPE_PV8DF_V8DF_UQI:
!     case VOID_FTYPE_PV4DF_V4DF_UQI:
!     case VOID_FTYPE_PV2DF_V2DF_UQI:
!     case VOID_FTYPE_PV16SF_V16SF_UHI:
!     case VOID_FTYPE_PV8SF_V8SF_UQI:
!     case VOID_FTYPE_PV4SF_V4SF_UQI:
!     case VOID_FTYPE_PV8DI_V8DI_UQI:
!     case VOID_FTYPE_PV4DI_V4DI_UQI:
!     case VOID_FTYPE_PV2DI_V2DI_UQI:
!     case VOID_FTYPE_PV16SI_V16SI_UHI:
!     case VOID_FTYPE_PV8SI_V8SI_UQI:
!     case VOID_FTYPE_PV4SI_V4SI_UQI:
!     case VOID_FTYPE_PV64QI_V64QI_UDI:
!     case VOID_FTYPE_PV32HI_V32HI_USI:
!     case VOID_FTYPE_PV32QI_V32QI_USI:
!     case VOID_FTYPE_PV16QI_V16QI_UHI:
!     case VOID_FTYPE_PV16HI_V16HI_UHI:
!     case VOID_FTYPE_PV8HI_V8HI_UQI:
!       switch (icode)
! 	{
! 	/* These builtins and instructions require the memory
! 	   to be properly aligned.  */
! 	case CODE_FOR_avx512f_storev16sf_mask:
! 	case CODE_FOR_avx512f_storev16si_mask:
! 	case CODE_FOR_avx512f_storev8df_mask:
! 	case CODE_FOR_avx512f_storev8di_mask:
! 	case CODE_FOR_avx512vl_storev8sf_mask:
! 	case CODE_FOR_avx512vl_storev8si_mask:
! 	case CODE_FOR_avx512vl_storev4df_mask:
! 	case CODE_FOR_avx512vl_storev4di_mask:
! 	case CODE_FOR_avx512vl_storev4sf_mask:
! 	case CODE_FOR_avx512vl_storev4si_mask:
! 	case CODE_FOR_avx512vl_storev2df_mask:
! 	case CODE_FOR_avx512vl_storev2di_mask:
! 	  aligned_mem = true;
! 	  break;
! 	default:
! 	  break;
! 	}
!       /* FALLTHRU */
!     case VOID_FTYPE_PV8SF_V8SI_V8SF:
!     case VOID_FTYPE_PV4DF_V4DI_V4DF:
!     case VOID_FTYPE_PV4SF_V4SI_V4SF:
!     case VOID_FTYPE_PV2DF_V2DI_V2DF:
!     case VOID_FTYPE_PV8SI_V8SI_V8SI:
!     case VOID_FTYPE_PV4DI_V4DI_V4DI:
!     case VOID_FTYPE_PV4SI_V4SI_V4SI:
!     case VOID_FTYPE_PV2DI_V2DI_V2DI:
!     case VOID_FTYPE_PV8SI_V8DI_UQI:
!     case VOID_FTYPE_PV8HI_V8DI_UQI:
!     case VOID_FTYPE_PV16HI_V16SI_UHI:
!     case VOID_FTYPE_PV16QI_V8DI_UQI:
!     case VOID_FTYPE_PV16QI_V16SI_UHI:
!     case VOID_FTYPE_PV4SI_V4DI_UQI:
!     case VOID_FTYPE_PV4SI_V2DI_UQI:
!     case VOID_FTYPE_PV8HI_V4DI_UQI:
!     case VOID_FTYPE_PV8HI_V2DI_UQI:
!     case VOID_FTYPE_PV8HI_V8SI_UQI:
!     case VOID_FTYPE_PV8HI_V4SI_UQI:
!     case VOID_FTYPE_PV16QI_V4DI_UQI:
!     case VOID_FTYPE_PV16QI_V2DI_UQI:
!     case VOID_FTYPE_PV16QI_V8SI_UQI:
!     case VOID_FTYPE_PV16QI_V4SI_UQI:
!     case VOID_FTYPE_PCHAR_V64QI_UDI:
!     case VOID_FTYPE_PCHAR_V32QI_USI:
!     case VOID_FTYPE_PCHAR_V16QI_UHI:
!     case VOID_FTYPE_PSHORT_V32HI_USI:
!     case VOID_FTYPE_PSHORT_V16HI_UHI:
!     case VOID_FTYPE_PSHORT_V8HI_UQI:
!     case VOID_FTYPE_PINT_V16SI_UHI:
!     case VOID_FTYPE_PINT_V8SI_UQI:
!     case VOID_FTYPE_PINT_V4SI_UQI:
!     case VOID_FTYPE_PINT64_V8DI_UQI:
!     case VOID_FTYPE_PINT64_V4DI_UQI:
!     case VOID_FTYPE_PINT64_V2DI_UQI:
!     case VOID_FTYPE_PDOUBLE_V8DF_UQI:
!     case VOID_FTYPE_PDOUBLE_V4DF_UQI:
!     case VOID_FTYPE_PDOUBLE_V2DF_UQI:
!     case VOID_FTYPE_PFLOAT_V16SF_UHI:
!     case VOID_FTYPE_PFLOAT_V8SF_UQI:
!     case VOID_FTYPE_PFLOAT_V4SF_UQI:
!     case VOID_FTYPE_PV32QI_V32HI_USI:
!     case VOID_FTYPE_PV16QI_V16HI_UHI:
!     case VOID_FTYPE_PV8QI_V8HI_UQI:
!       nargs = 2;
!       klass = store;
!       /* Reserve memory operand for target.  */
!       memory = ARRAY_SIZE (args);
!       break;
!     case V4SF_FTYPE_PCV4SF_V4SF_UQI:
!     case V8SF_FTYPE_PCV8SF_V8SF_UQI:
!     case V16SF_FTYPE_PCV16SF_V16SF_UHI:
!     case V4SI_FTYPE_PCV4SI_V4SI_UQI:
!     case V8SI_FTYPE_PCV8SI_V8SI_UQI:
!     case V16SI_FTYPE_PCV16SI_V16SI_UHI:
!     case V2DF_FTYPE_PCV2DF_V2DF_UQI:
!     case V4DF_FTYPE_PCV4DF_V4DF_UQI:
!     case V8DF_FTYPE_PCV8DF_V8DF_UQI:
!     case V2DI_FTYPE_PCV2DI_V2DI_UQI:
!     case V4DI_FTYPE_PCV4DI_V4DI_UQI:
!     case V8DI_FTYPE_PCV8DI_V8DI_UQI:
!     case V64QI_FTYPE_PCV64QI_V64QI_UDI:
!     case V32HI_FTYPE_PCV32HI_V32HI_USI:
!     case V32QI_FTYPE_PCV32QI_V32QI_USI:
!     case V16QI_FTYPE_PCV16QI_V16QI_UHI:
!     case V16HI_FTYPE_PCV16HI_V16HI_UHI:
!     case V8HI_FTYPE_PCV8HI_V8HI_UQI:
!       switch (icode)
! 	{
! 	/* These builtins and instructions require the memory
! 	   to be properly aligned.  */
! 	case CODE_FOR_avx512f_loadv16sf_mask:
! 	case CODE_FOR_avx512f_loadv16si_mask:
! 	case CODE_FOR_avx512f_loadv8df_mask:
! 	case CODE_FOR_avx512f_loadv8di_mask:
! 	case CODE_FOR_avx512vl_loadv8sf_mask:
! 	case CODE_FOR_avx512vl_loadv8si_mask:
! 	case CODE_FOR_avx512vl_loadv4df_mask:
! 	case CODE_FOR_avx512vl_loadv4di_mask:
! 	case CODE_FOR_avx512vl_loadv4sf_mask:
! 	case CODE_FOR_avx512vl_loadv4si_mask:
! 	case CODE_FOR_avx512vl_loadv2df_mask:
! 	case CODE_FOR_avx512vl_loadv2di_mask:
! 	case CODE_FOR_avx512bw_loadv64qi_mask:
! 	case CODE_FOR_avx512vl_loadv32qi_mask:
! 	case CODE_FOR_avx512vl_loadv16qi_mask:
! 	case CODE_FOR_avx512bw_loadv32hi_mask:
! 	case CODE_FOR_avx512vl_loadv16hi_mask:
! 	case CODE_FOR_avx512vl_loadv8hi_mask:
! 	  aligned_mem = true;
! 	  break;
! 	default:
! 	  break;
! 	}
!       /* FALLTHRU */
!     case V64QI_FTYPE_PCCHAR_V64QI_UDI:
!     case V32QI_FTYPE_PCCHAR_V32QI_USI:
!     case V16QI_FTYPE_PCCHAR_V16QI_UHI:
!     case V32HI_FTYPE_PCSHORT_V32HI_USI:
!     case V16HI_FTYPE_PCSHORT_V16HI_UHI:
!     case V8HI_FTYPE_PCSHORT_V8HI_UQI:
!     case V16SI_FTYPE_PCINT_V16SI_UHI:
!     case V8SI_FTYPE_PCINT_V8SI_UQI:
!     case V4SI_FTYPE_PCINT_V4SI_UQI:
!     case V8DI_FTYPE_PCINT64_V8DI_UQI:
!     case V4DI_FTYPE_PCINT64_V4DI_UQI:
!     case V2DI_FTYPE_PCINT64_V2DI_UQI:
!     case V8DF_FTYPE_PCDOUBLE_V8DF_UQI:
!     case V4DF_FTYPE_PCDOUBLE_V4DF_UQI:
!     case V2DF_FTYPE_PCDOUBLE_V2DF_UQI:
!     case V16SF_FTYPE_PCFLOAT_V16SF_UHI:
!     case V8SF_FTYPE_PCFLOAT_V8SF_UQI:
!     case V4SF_FTYPE_PCFLOAT_V4SF_UQI:
!       nargs = 3;
!       klass = load;
!       memory = 0;
!       break;
!     case VOID_FTYPE_UINT_UINT_UINT:
!     case VOID_FTYPE_UINT64_UINT_UINT:
!     case UCHAR_FTYPE_UINT_UINT_UINT:
!     case UCHAR_FTYPE_UINT64_UINT_UINT:
!       nargs = 3;
!       klass = load;
!       memory = ARRAY_SIZE (args);
!       last_arg_constant = true;
!       break;
!     default:
!       gcc_unreachable ();
!     }
! 
!   gcc_assert (nargs <= ARRAY_SIZE (args));
! 
!   if (klass == store)
!     {
!       arg = CALL_EXPR_ARG (exp, 0);
!       op = expand_normal (arg);
!       gcc_assert (target == 0);
!       if (memory)
! 	{
! 	  op = ix86_zero_extend_to_Pmode (op);
! 	  target = gen_rtx_MEM (tmode, op);
! 	  /* target at this point has just BITS_PER_UNIT MEM_ALIGN
! 	     on it.  Try to improve it using get_pointer_alignment,
! 	     and if the special builtin is one that requires strict
! 	     mode alignment, also from it's GET_MODE_ALIGNMENT.
! 	     Failure to do so could lead to ix86_legitimate_combined_insn
! 	     rejecting all changes to such insns.  */
! 	  unsigned int align = get_pointer_alignment (arg);
! 	  if (aligned_mem && align < GET_MODE_ALIGNMENT (tmode))
! 	    align = GET_MODE_ALIGNMENT (tmode);
! 	  if (MEM_ALIGN (target) < align)
! 	    set_mem_align (target, align);
! 	}
!       else
! 	target = force_reg (tmode, op);
!       arg_adjust = 1;
!     }
!   else
!     {
!       arg_adjust = 0;
!       if (optimize
! 	  || target == 0
! 	  || !register_operand (target, tmode)
! 	  || GET_MODE (target) != tmode)
! 	target = gen_reg_rtx (tmode);
!     }
! 
!   for (i = 0; i < nargs; i++)
!     {
!       machine_mode mode = insn_p->operand[i + 1].mode;
!       bool match;
! 
!       arg = CALL_EXPR_ARG (exp, i + arg_adjust);
!       op = expand_normal (arg);
!       match = insn_p->operand[i + 1].predicate (op, mode);
! 
!       if (last_arg_constant && (i + 1) == nargs)
! 	{
! 	  if (!match)
! 	    {
! 	      if (icode == CODE_FOR_lwp_lwpvalsi3
! 		  || icode == CODE_FOR_lwp_lwpinssi3
! 		  || icode == CODE_FOR_lwp_lwpvaldi3
! 		  || icode == CODE_FOR_lwp_lwpinsdi3)
! 		error ("the last argument must be a 32-bit immediate");
! 	      else
! 		error ("the last argument must be an 8-bit immediate");
! 	      return const0_rtx;
! 	    }
! 	}
!       else
! 	{
! 	  if (i == memory)
! 	    {
! 	      /* This must be the memory operand.  */
! 	      op = ix86_zero_extend_to_Pmode (op);
! 	      op = gen_rtx_MEM (mode, op);
! 	      /* op at this point has just BITS_PER_UNIT MEM_ALIGN
! 		 on it.  Try to improve it using get_pointer_alignment,
! 		 and if the special builtin is one that requires strict
! 		 mode alignment, also from it's GET_MODE_ALIGNMENT.
! 		 Failure to do so could lead to ix86_legitimate_combined_insn
! 		 rejecting all changes to such insns.  */
! 	      unsigned int align = get_pointer_alignment (arg);
! 	      if (aligned_mem && align < GET_MODE_ALIGNMENT (mode))
! 		align = GET_MODE_ALIGNMENT (mode);
! 	      if (MEM_ALIGN (op) < align)
! 		set_mem_align (op, align);
! 	    }
! 	  else
! 	    {
! 	      /* This must be register.  */
! 	      if (VECTOR_MODE_P (mode))
! 		op = safe_vector_operand (op, mode);
! 
! 	      op = fixup_modeless_constant (op, mode);
! 
! 	      if (GET_MODE (op) == mode || GET_MODE (op) == VOIDmode)
! 		op = copy_to_mode_reg (mode, op);
! 	      else
! 	        {
! 	          op = copy_to_reg (op);
! 	          op = lowpart_subreg (mode, op, GET_MODE (op));
! 	        }
! 	    }
! 	}
! 
!       args[i].op = op;
!       args[i].mode = mode;
!     }
! 
!   switch (nargs)
!     {
!     case 0:
!       pat = GEN_FCN (icode) (target);
!       break;
!     case 1:
!       pat = GEN_FCN (icode) (target, args[0].op);
!       break;
!     case 2:
!       pat = GEN_FCN (icode) (target, args[0].op, args[1].op);
!       break;
!     case 3:
!       pat = GEN_FCN (icode) (target, args[0].op, args[1].op, args[2].op);
!       break;
!     default:
!       gcc_unreachable ();
!     }
! 
!   if (! pat)
!     return 0;
!   emit_insn (pat);
!   return klass == store ? 0 : target;
! }
! 
! /* Return the integer constant in ARG.  Constrain it to be in the range
!    of the subparts of VEC_TYPE; issue an error if not.  */
! 
! static int
! get_element_number (tree vec_type, tree arg)
! {
!   unsigned HOST_WIDE_INT elt, max = TYPE_VECTOR_SUBPARTS (vec_type) - 1;
! 
!   if (!tree_fits_uhwi_p (arg)
!       || (elt = tree_to_uhwi (arg), elt > max))
!     {
!       error ("selector must be an integer constant in the range 0..%wi", max);
!       return 0;
!     }
! 
!   return elt;
! }
! 
! /* A subroutine of ix86_expand_builtin.  These builtins are a wrapper around
!    ix86_expand_vector_init.  We DO have language-level syntax for this, in
!    the form of  (type){ init-list }.  Except that since we can't place emms
!    instructions from inside the compiler, we can't allow the use of MMX
!    registers unless the user explicitly asks for it.  So we do *not* define
!    vec_set/vec_extract/vec_init patterns for MMX modes in mmx.md.  Instead
!    we have builtins invoked by mmintrin.h that gives us license to emit
!    these sorts of instructions.  */
! 
! static rtx
! ix86_expand_vec_init_builtin (tree type, tree exp, rtx target)
! {
!   machine_mode tmode = TYPE_MODE (type);
!   machine_mode inner_mode = GET_MODE_INNER (tmode);
!   int i, n_elt = GET_MODE_NUNITS (tmode);
!   rtvec v = rtvec_alloc (n_elt);
! 
!   gcc_assert (VECTOR_MODE_P (tmode));
!   gcc_assert (call_expr_nargs (exp) == n_elt);
! 
!   for (i = 0; i < n_elt; ++i)
!     {
!       rtx x = expand_normal (CALL_EXPR_ARG (exp, i));
!       RTVEC_ELT (v, i) = gen_lowpart (inner_mode, x);
!     }
! 
!   if (!target || !register_operand (target, tmode))
!     target = gen_reg_rtx (tmode);
! 
!   ix86_expand_vector_init (true, target, gen_rtx_PARALLEL (tmode, v));
!   return target;
! }
! 
! /* A subroutine of ix86_expand_builtin.  These builtins are a wrapper around
!    ix86_expand_vector_extract.  They would be redundant (for non-MMX) if we
!    had a language-level syntax for referencing vector elements.  */
! 
! static rtx
! ix86_expand_vec_ext_builtin (tree exp, rtx target)
! {
!   machine_mode tmode, mode0;
!   tree arg0, arg1;
!   int elt;
!   rtx op0;
! 
!   arg0 = CALL_EXPR_ARG (exp, 0);
!   arg1 = CALL_EXPR_ARG (exp, 1);
! 
!   op0 = expand_normal (arg0);
!   elt = get_element_number (TREE_TYPE (arg0), arg1);
! 
!   tmode = TYPE_MODE (TREE_TYPE (TREE_TYPE (arg0)));
!   mode0 = TYPE_MODE (TREE_TYPE (arg0));
!   gcc_assert (VECTOR_MODE_P (mode0));
! 
!   op0 = force_reg (mode0, op0);
! 
!   if (optimize || !target || !register_operand (target, tmode))
!     target = gen_reg_rtx (tmode);
! 
!   ix86_expand_vector_extract (true, target, op0, elt);
! 
!   return target;
! }
! 
! /* A subroutine of ix86_expand_builtin.  These builtins are a wrapper around
!    ix86_expand_vector_set.  They would be redundant (for non-MMX) if we had
!    a language-level syntax for referencing vector elements.  */
! 
! static rtx
! ix86_expand_vec_set_builtin (tree exp)
! {
!   machine_mode tmode, mode1;
!   tree arg0, arg1, arg2;
!   int elt;
!   rtx op0, op1, target;
! 
!   arg0 = CALL_EXPR_ARG (exp, 0);
!   arg1 = CALL_EXPR_ARG (exp, 1);
!   arg2 = CALL_EXPR_ARG (exp, 2);
! 
!   tmode = TYPE_MODE (TREE_TYPE (arg0));
!   mode1 = TYPE_MODE (TREE_TYPE (TREE_TYPE (arg0)));
!   gcc_assert (VECTOR_MODE_P (tmode));
! 
!   op0 = expand_expr (arg0, NULL_RTX, tmode, EXPAND_NORMAL);
!   op1 = expand_expr (arg1, NULL_RTX, mode1, EXPAND_NORMAL);
!   elt = get_element_number (TREE_TYPE (arg0), arg2);
! 
!   if (GET_MODE (op1) != mode1 && GET_MODE (op1) != VOIDmode)
!     op1 = convert_modes (mode1, GET_MODE (op1), op1, true);
! 
!   op0 = force_reg (tmode, op0);
!   op1 = force_reg (mode1, op1);
! 
!   /* OP0 is the source of these builtin functions and shouldn't be
!      modified.  Create a copy, use it and return it as target.  */
!   target = gen_reg_rtx (tmode);
!   emit_move_insn (target, op0);
!   ix86_expand_vector_set (true, target, op1, elt);
! 
!   return target;
! }
! 
! /* Expand an expression EXP that calls a built-in function,
!    with result going to TARGET if that's convenient
!    (and in mode MODE if that's convenient).
!    SUBTARGET may be used as the target for computing one of EXP's operands.
!    IGNORE is nonzero if the value is to be ignored.  */
! 
! static rtx
! ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
! 		     machine_mode mode, int ignore)
! {
!   size_t i;
!   enum insn_code icode, icode2;
!   tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
!   tree arg0, arg1, arg2, arg3, arg4;
!   rtx op0, op1, op2, op3, op4, pat, pat2, insn;
!   machine_mode mode0, mode1, mode2, mode3, mode4;
!   unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
! 
!   /* For CPU builtins that can be folded, fold first and expand the fold.  */
!   switch (fcode)
!     {
!     case IX86_BUILTIN_CPU_INIT:
!       {
! 	/* Make it call __cpu_indicator_init in libgcc. */
! 	tree call_expr, fndecl, type;
!         type = build_function_type_list (integer_type_node, NULL_TREE); 
! 	fndecl = build_fn_decl ("__cpu_indicator_init", type);
! 	call_expr = build_call_expr (fndecl, 0); 
! 	return expand_expr (call_expr, target, mode, EXPAND_NORMAL);
!       }
!     case IX86_BUILTIN_CPU_IS:
!     case IX86_BUILTIN_CPU_SUPPORTS:
!       {
! 	tree arg0 = CALL_EXPR_ARG (exp, 0);
! 	tree fold_expr = fold_builtin_cpu (fndecl, &arg0);
! 	gcc_assert (fold_expr != NULL_TREE);
! 	return expand_expr (fold_expr, target, mode, EXPAND_NORMAL);
!       }
!     }
! 
!   HOST_WIDE_INT isa = ix86_isa_flags;
!   HOST_WIDE_INT isa2 = ix86_isa_flags2;
!   HOST_WIDE_INT bisa = ix86_builtins_isa[fcode].isa;
!   HOST_WIDE_INT bisa2 = ix86_builtins_isa[fcode].isa2;
!   /* The general case is we require all the ISAs specified in bisa{,2}
!      to be enabled.
!      The exceptions are:
!      OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
!      OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32
!      OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4
!      where for each this pair it is sufficient if either of the ISAs is
!      enabled, plus if it is ored with other options also those others.  */
!   if (((bisa & (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A))
!        == (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A))
!       && (isa & (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A)) != 0)
!     isa |= (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A);
!   if (((bisa & (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32))
!        == (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32))
!       && (isa & (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32)) != 0)
!     isa |= (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32);
!   if (((bisa & (OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4))
!        == (OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4))
!       && (isa & (OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4)) != 0)
!     isa |= (OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4);
!   if ((bisa & isa) != bisa || (bisa2 & isa2) != bisa2)
!     {
!       bool add_abi_p = bisa & OPTION_MASK_ISA_64BIT;
!       if (TARGET_ABI_X32)
! 	bisa |= OPTION_MASK_ABI_X32;
!       else
! 	bisa |= OPTION_MASK_ABI_64;
!       char *opts = ix86_target_string (bisa, bisa2, 0, 0, NULL, NULL,
! 				       (enum fpmath_unit) 0, false, add_abi_p);
!       if (!opts)
! 	error ("%qE needs unknown isa option", fndecl);
!       else
! 	{
! 	  gcc_assert (opts != NULL);
! 	  error ("%qE needs isa option %s", fndecl, opts);
! 	  free (opts);
! 	}
!       return expand_call (exp, target, ignore);
!     }
! 
!   switch (fcode)
!     {
!     case IX86_BUILTIN_MASKMOVQ:
!     case IX86_BUILTIN_MASKMOVDQU:
!       icode = (fcode == IX86_BUILTIN_MASKMOVQ
! 	       ? CODE_FOR_mmx_maskmovq
! 	       : CODE_FOR_sse2_maskmovdqu);
!       /* Note the arg order is different from the operand order.  */
!       arg1 = CALL_EXPR_ARG (exp, 0);
!       arg2 = CALL_EXPR_ARG (exp, 1);
!       arg0 = CALL_EXPR_ARG (exp, 2);
!       op0 = expand_normal (arg0);
!       op1 = expand_normal (arg1);
!       op2 = expand_normal (arg2);
!       mode0 = insn_data[icode].operand[0].mode;
!       mode1 = insn_data[icode].operand[1].mode;
!       mode2 = insn_data[icode].operand[2].mode;
! 
!       op0 = ix86_zero_extend_to_Pmode (op0);
!       op0 = gen_rtx_MEM (mode1, op0);
! 
!       if (!insn_data[icode].operand[0].predicate (op0, mode0))
! 	op0 = copy_to_mode_reg (mode0, op0);
!       if (!insn_data[icode].operand[1].predicate (op1, mode1))
! 	op1 = copy_to_mode_reg (mode1, op1);
!       if (!insn_data[icode].operand[2].predicate (op2, mode2))
! 	op2 = copy_to_mode_reg (mode2, op2);
!       pat = GEN_FCN (icode) (op0, op1, op2);
!       if (! pat)
! 	return 0;
!       emit_insn (pat);
!       return 0;
! 
!     case IX86_BUILTIN_LDMXCSR:
!       op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
!       target = assign_386_stack_local (SImode, SLOT_TEMP);
!       emit_move_insn (target, op0);
!       emit_insn (gen_sse_ldmxcsr (target));
!       return 0;
! 
!     case IX86_BUILTIN_STMXCSR:
!       target = assign_386_stack_local (SImode, SLOT_TEMP);
!       emit_insn (gen_sse_stmxcsr (target));
!       return copy_to_mode_reg (SImode, target);
! 
!     case IX86_BUILTIN_CLFLUSH:
! 	arg0 = CALL_EXPR_ARG (exp, 0);
! 	op0 = expand_normal (arg0);
! 	icode = CODE_FOR_sse2_clflush;
! 	if (!insn_data[icode].operand[0].predicate (op0, Pmode))
! 	  op0 = ix86_zero_extend_to_Pmode (op0);
! 
! 	emit_insn (gen_sse2_clflush (op0));
! 	return 0;
! 
!     case IX86_BUILTIN_CLWB:
! 	arg0 = CALL_EXPR_ARG (exp, 0);
! 	op0 = expand_normal (arg0);
! 	icode = CODE_FOR_clwb;
! 	if (!insn_data[icode].operand[0].predicate (op0, Pmode))
! 	  op0 = ix86_zero_extend_to_Pmode (op0);
! 
! 	emit_insn (gen_clwb (op0));
! 	return 0;
! 
!     case IX86_BUILTIN_CLFLUSHOPT:
! 	arg0 = CALL_EXPR_ARG (exp, 0);
! 	op0 = expand_normal (arg0);
! 	icode = CODE_FOR_clflushopt;
! 	if (!insn_data[icode].operand[0].predicate (op0, Pmode))
! 	  op0 = ix86_zero_extend_to_Pmode (op0);
! 
! 	emit_insn (gen_clflushopt (op0));
! 	return 0;
! 
!     case IX86_BUILTIN_MONITOR:
!     case IX86_BUILTIN_MONITORX:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       arg1 = CALL_EXPR_ARG (exp, 1);
!       arg2 = CALL_EXPR_ARG (exp, 2);
!       op0 = expand_normal (arg0);
!       op1 = expand_normal (arg1);
!       op2 = expand_normal (arg2);
!       if (!REG_P (op0))
! 	op0 = ix86_zero_extend_to_Pmode (op0);
!       if (!REG_P (op1))
! 	op1 = copy_to_mode_reg (SImode, op1);
!       if (!REG_P (op2))
! 	op2 = copy_to_mode_reg (SImode, op2);
! 
!       emit_insn (fcode == IX86_BUILTIN_MONITOR 
! 		 ? ix86_gen_monitor (op0, op1, op2)
! 		 : ix86_gen_monitorx (op0, op1, op2));
!       return 0;
! 
!     case IX86_BUILTIN_MWAIT:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       arg1 = CALL_EXPR_ARG (exp, 1);
!       op0 = expand_normal (arg0);
!       op1 = expand_normal (arg1);
!       if (!REG_P (op0))
! 	op0 = copy_to_mode_reg (SImode, op0);
!       if (!REG_P (op1))
! 	op1 = copy_to_mode_reg (SImode, op1);
!       emit_insn (gen_sse3_mwait (op0, op1));
!       return 0;
! 
!     case IX86_BUILTIN_MWAITX:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       arg1 = CALL_EXPR_ARG (exp, 1);
!       arg2 = CALL_EXPR_ARG (exp, 2);
!       op0 = expand_normal (arg0);
!       op1 = expand_normal (arg1);
!       op2 = expand_normal (arg2);
!       if (!REG_P (op0))
! 	op0 = copy_to_mode_reg (SImode, op0);
!       if (!REG_P (op1))
! 	op1 = copy_to_mode_reg (SImode, op1);
!       if (!REG_P (op2))
! 	op2 = copy_to_mode_reg (SImode, op2);
!       emit_insn (gen_mwaitx (op0, op1, op2));
!       return 0;
! 
!     case IX86_BUILTIN_UMONITOR:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       op0 = expand_normal (arg0);
! 
!       op0 = ix86_zero_extend_to_Pmode (op0);
! 
!       insn = (TARGET_64BIT
! 	      ? gen_umonitor_di (op0)
! 	      : gen_umonitor_si (op0));
! 
!       emit_insn (insn);
!       return 0;
! 
!     case IX86_BUILTIN_UMWAIT:
!     case IX86_BUILTIN_TPAUSE:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       arg1 = CALL_EXPR_ARG (exp, 1);
!       op0 = expand_normal (arg0);
!       op1 = expand_normal (arg1);
! 
!       if (!REG_P (op0))
! 	op0 = copy_to_mode_reg (SImode, op0);
! 
!       op1 = force_reg (DImode, op1);
! 
!       if (TARGET_64BIT)
! 	{
! 	  op2 = expand_simple_binop (DImode, LSHIFTRT, op1, GEN_INT (32),
! 				     NULL, 1, OPTAB_DIRECT);
! 	  switch (fcode)
! 	    {
! 	    case IX86_BUILTIN_UMWAIT:
! 	      icode = CODE_FOR_umwait_rex64;
! 	      break;
! 	    case IX86_BUILTIN_TPAUSE:
! 	      icode = CODE_FOR_tpause_rex64;
! 	      break;
! 	    default:
! 	      gcc_unreachable ();
! 	    }
! 
! 	  op2 = gen_lowpart (SImode, op2);
! 	  op1 = gen_lowpart (SImode, op1);
! 	  pat = GEN_FCN (icode) (op0, op1, op2);
! 	}
!       else
! 	{
! 	  switch (fcode)
! 	    {
! 	    case IX86_BUILTIN_UMWAIT:
! 	      icode = CODE_FOR_umwait;
! 	      break;
! 	    case IX86_BUILTIN_TPAUSE:
! 	      icode = CODE_FOR_tpause;
! 	      break;
! 	    default:
! 	      gcc_unreachable ();
! 	    }
! 	  pat = GEN_FCN (icode) (op0, op1);
! 	}
! 
!       if (!pat)
! 	return 0;
! 
!       emit_insn (pat);
! 
!       if (target == 0
! 	  || !register_operand (target, QImode))
! 	target = gen_reg_rtx (QImode);
! 
!       pat = gen_rtx_EQ (QImode, gen_rtx_REG (CCCmode, FLAGS_REG),
! 			const0_rtx);
!       emit_insn (gen_rtx_SET (target, pat));
! 
!       return target;
! 
!     case IX86_BUILTIN_CLZERO:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       op0 = expand_normal (arg0);
!       if (!REG_P (op0))
! 	op0 = ix86_zero_extend_to_Pmode (op0);
!       emit_insn (ix86_gen_clzero (op0));
!       return 0;
! 
!     case IX86_BUILTIN_CLDEMOTE:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       op0 = expand_normal (arg0);
!       icode = CODE_FOR_cldemote;
!       if (!insn_data[icode].operand[0].predicate (op0, Pmode))
! 	op0 = ix86_zero_extend_to_Pmode (op0);
! 
!       emit_insn (gen_cldemote (op0));
!       return 0;
! 
!     case IX86_BUILTIN_VEC_INIT_V2SI:
!     case IX86_BUILTIN_VEC_INIT_V4HI:
!     case IX86_BUILTIN_VEC_INIT_V8QI:
!       return ix86_expand_vec_init_builtin (TREE_TYPE (exp), exp, target);
! 
!     case IX86_BUILTIN_VEC_EXT_V2DF:
!     case IX86_BUILTIN_VEC_EXT_V2DI:
!     case IX86_BUILTIN_VEC_EXT_V4SF:
!     case IX86_BUILTIN_VEC_EXT_V4SI:
!     case IX86_BUILTIN_VEC_EXT_V8HI:
!     case IX86_BUILTIN_VEC_EXT_V2SI:
!     case IX86_BUILTIN_VEC_EXT_V4HI:
!     case IX86_BUILTIN_VEC_EXT_V16QI:
!       return ix86_expand_vec_ext_builtin (exp, target);
! 
!     case IX86_BUILTIN_VEC_SET_V2DI:
!     case IX86_BUILTIN_VEC_SET_V4SF:
!     case IX86_BUILTIN_VEC_SET_V4SI:
!     case IX86_BUILTIN_VEC_SET_V8HI:
!     case IX86_BUILTIN_VEC_SET_V4HI:
!     case IX86_BUILTIN_VEC_SET_V16QI:
!       return ix86_expand_vec_set_builtin (exp);
! 
!     case IX86_BUILTIN_NANQ:
!     case IX86_BUILTIN_NANSQ:
!       return expand_call (exp, target, ignore);
! 
!     case IX86_BUILTIN_RDPID:
! 
!       op0 = gen_reg_rtx (word_mode);
! 
!       if (TARGET_64BIT)
! 	{
! 	  insn = gen_rdpid_rex64 (op0);
! 	  op0 = convert_to_mode (SImode, op0, 1);
! 	}
!       else
! 	insn = gen_rdpid (op0);
! 
!       emit_insn (insn);
! 
!       if (target == 0
! 	  || !register_operand (target, SImode))
! 	target = gen_reg_rtx (SImode);
! 
!       emit_move_insn (target, op0);
!       return target;
! 
!     case IX86_BUILTIN_RDPMC:
!     case IX86_BUILTIN_RDTSC:
!     case IX86_BUILTIN_RDTSCP:
!     case IX86_BUILTIN_XGETBV:
! 
!       op0 = gen_reg_rtx (DImode);
!       op1 = gen_reg_rtx (DImode);
! 
!       if (fcode == IX86_BUILTIN_RDPMC)
! 	{
! 	  arg0 = CALL_EXPR_ARG (exp, 0);
! 	  op2 = expand_normal (arg0);
! 	  if (!register_operand (op2, SImode))
! 	    op2 = copy_to_mode_reg (SImode, op2);
! 
! 	  insn = (TARGET_64BIT
! 		  ? gen_rdpmc_rex64 (op0, op1, op2)
! 		  : gen_rdpmc (op0, op2));
! 	  emit_insn (insn);
! 	}
!       else if (fcode == IX86_BUILTIN_XGETBV)
! 	{
! 	  arg0 = CALL_EXPR_ARG (exp, 0);
! 	  op2 = expand_normal (arg0);
! 	  if (!register_operand (op2, SImode))
! 	    op2 = copy_to_mode_reg (SImode, op2);
! 
! 	  insn = (TARGET_64BIT
! 		  ? gen_xgetbv_rex64 (op0, op1, op2)
! 		  : gen_xgetbv (op0, op2));
! 	  emit_insn (insn);
! 	}
!       else if (fcode == IX86_BUILTIN_RDTSC)
! 	{
! 	  insn = (TARGET_64BIT
! 		  ? gen_rdtsc_rex64 (op0, op1)
! 		  : gen_rdtsc (op0));
! 	  emit_insn (insn);
! 	}
!       else
! 	{
! 	  op2 = gen_reg_rtx (SImode);
! 
! 	  insn = (TARGET_64BIT
! 		  ? gen_rdtscp_rex64 (op0, op1, op2)
! 		  : gen_rdtscp (op0, op2));
! 	  emit_insn (insn);
! 
! 	  arg0 = CALL_EXPR_ARG (exp, 0);
! 	  op4 = expand_normal (arg0);
! 	  if (!address_operand (op4, VOIDmode))
! 	    {
! 	      op4 = convert_memory_address (Pmode, op4);
! 	      op4 = copy_addr_to_reg (op4);
! 	    }
! 	  emit_move_insn (gen_rtx_MEM (SImode, op4), op2);
! 	}
! 
!       if (target == 0
! 	  || !register_operand (target, DImode))
!         target = gen_reg_rtx (DImode);
! 
!       if (TARGET_64BIT)
! 	{
! 	  op1 = expand_simple_binop (DImode, ASHIFT, op1, GEN_INT (32),
! 				     op1, 1, OPTAB_DIRECT);
! 	  op0 = expand_simple_binop (DImode, IOR, op0, op1,
! 				     op0, 1, OPTAB_DIRECT);
! 	}
! 
!       emit_move_insn (target, op0);
!       return target;
! 
!     case IX86_BUILTIN_MOVDIR64B:
! 
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       arg1 = CALL_EXPR_ARG (exp, 1);
!       op0 = expand_normal (arg0);
!       op1 = expand_normal (arg1);
! 
!       op0 = ix86_zero_extend_to_Pmode (op0);
!       if (!address_operand (op1, VOIDmode))
!       {
! 	op1 = convert_memory_address (Pmode, op1);
! 	op1 = copy_addr_to_reg (op1);
!       }
!       op1 = gen_rtx_MEM (XImode, op1);
! 
!       insn = (TARGET_64BIT
! 		? gen_movdir64b_di (op0, op1)
! 		: gen_movdir64b_si (op0, op1));
!       emit_insn (insn);
!       return 0;
! 
!     case IX86_BUILTIN_FXSAVE:
!     case IX86_BUILTIN_FXRSTOR:
!     case IX86_BUILTIN_FXSAVE64:
!     case IX86_BUILTIN_FXRSTOR64:
!     case IX86_BUILTIN_FNSTENV:
!     case IX86_BUILTIN_FLDENV:
!       mode0 = BLKmode;
!       switch (fcode)
! 	{
! 	case IX86_BUILTIN_FXSAVE:
! 	  icode = CODE_FOR_fxsave;
! 	  break;
! 	case IX86_BUILTIN_FXRSTOR:
! 	  icode = CODE_FOR_fxrstor;
! 	  break;
! 	case IX86_BUILTIN_FXSAVE64:
! 	  icode = CODE_FOR_fxsave64;
! 	  break;
! 	case IX86_BUILTIN_FXRSTOR64:
! 	  icode = CODE_FOR_fxrstor64;
! 	  break;
! 	case IX86_BUILTIN_FNSTENV:
! 	  icode = CODE_FOR_fnstenv;
! 	  break;
! 	case IX86_BUILTIN_FLDENV:
! 	  icode = CODE_FOR_fldenv;
! 	  break;
! 	default:
! 	  gcc_unreachable ();
! 	}
! 
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       op0 = expand_normal (arg0);
! 
!       if (!address_operand (op0, VOIDmode))
! 	{
! 	  op0 = convert_memory_address (Pmode, op0);
! 	  op0 = copy_addr_to_reg (op0);
! 	}
!       op0 = gen_rtx_MEM (mode0, op0);
! 
!       pat = GEN_FCN (icode) (op0);
!       if (pat)
! 	emit_insn (pat);
!       return 0;
! 
!     case IX86_BUILTIN_XSETBV:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       arg1 = CALL_EXPR_ARG (exp, 1);
!       op0 = expand_normal (arg0);
!       op1 = expand_normal (arg1);
! 
!       if (!REG_P (op0))
! 	op0 = copy_to_mode_reg (SImode, op0);
! 
!       op1 = force_reg (DImode, op1);
! 
!       if (TARGET_64BIT)
! 	{
! 	  op2 = expand_simple_binop (DImode, LSHIFTRT, op1, GEN_INT (32),
! 				     NULL, 1, OPTAB_DIRECT);
! 
! 	  icode = CODE_FOR_xsetbv_rex64;
! 
! 	  op2 = gen_lowpart (SImode, op2);
! 	  op1 = gen_lowpart (SImode, op1);
! 	  pat = GEN_FCN (icode) (op0, op1, op2);
! 	}
!       else
! 	{
! 	  icode = CODE_FOR_xsetbv;
! 
! 	  pat = GEN_FCN (icode) (op0, op1);
! 	}
!       if (pat)
! 	emit_insn (pat);
!       return 0;
! 
!     case IX86_BUILTIN_XSAVE:
!     case IX86_BUILTIN_XRSTOR:
!     case IX86_BUILTIN_XSAVE64:
!     case IX86_BUILTIN_XRSTOR64:
!     case IX86_BUILTIN_XSAVEOPT:
!     case IX86_BUILTIN_XSAVEOPT64:
!     case IX86_BUILTIN_XSAVES:
!     case IX86_BUILTIN_XRSTORS:
!     case IX86_BUILTIN_XSAVES64:
!     case IX86_BUILTIN_XRSTORS64:
!     case IX86_BUILTIN_XSAVEC:
!     case IX86_BUILTIN_XSAVEC64:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       arg1 = CALL_EXPR_ARG (exp, 1);
!       op0 = expand_normal (arg0);
!       op1 = expand_normal (arg1);
! 
!       if (!address_operand (op0, VOIDmode))
! 	{
! 	  op0 = convert_memory_address (Pmode, op0);
! 	  op0 = copy_addr_to_reg (op0);
! 	}
!       op0 = gen_rtx_MEM (BLKmode, op0);
! 
!       op1 = force_reg (DImode, op1);
! 
!       if (TARGET_64BIT)
! 	{
! 	  op2 = expand_simple_binop (DImode, LSHIFTRT, op1, GEN_INT (32),
! 				     NULL, 1, OPTAB_DIRECT);
! 	  switch (fcode)
! 	    {
! 	    case IX86_BUILTIN_XSAVE:
! 	      icode = CODE_FOR_xsave_rex64;
! 	      break;
! 	    case IX86_BUILTIN_XRSTOR:
! 	      icode = CODE_FOR_xrstor_rex64;
! 	      break;
! 	    case IX86_BUILTIN_XSAVE64:
! 	      icode = CODE_FOR_xsave64;
! 	      break;
! 	    case IX86_BUILTIN_XRSTOR64:
! 	      icode = CODE_FOR_xrstor64;
! 	      break;
! 	    case IX86_BUILTIN_XSAVEOPT:
! 	      icode = CODE_FOR_xsaveopt_rex64;
! 	      break;
! 	    case IX86_BUILTIN_XSAVEOPT64:
! 	      icode = CODE_FOR_xsaveopt64;
! 	      break;
! 	    case IX86_BUILTIN_XSAVES:
! 	      icode = CODE_FOR_xsaves_rex64;
! 	      break;
! 	    case IX86_BUILTIN_XRSTORS:
! 	      icode = CODE_FOR_xrstors_rex64;
! 	      break;
! 	    case IX86_BUILTIN_XSAVES64:
! 	      icode = CODE_FOR_xsaves64;
! 	      break;
! 	    case IX86_BUILTIN_XRSTORS64:
! 	      icode = CODE_FOR_xrstors64;
! 	      break;
! 	    case IX86_BUILTIN_XSAVEC:
! 	      icode = CODE_FOR_xsavec_rex64;
! 	      break;
! 	    case IX86_BUILTIN_XSAVEC64:
! 	      icode = CODE_FOR_xsavec64;
! 	      break;
! 	    default:
! 	      gcc_unreachable ();
! 	    }
! 
! 	  op2 = gen_lowpart (SImode, op2);
! 	  op1 = gen_lowpart (SImode, op1);
! 	  pat = GEN_FCN (icode) (op0, op1, op2);
! 	}
!       else
! 	{
! 	  switch (fcode)
! 	    {
! 	    case IX86_BUILTIN_XSAVE:
! 	      icode = CODE_FOR_xsave;
! 	      break;
! 	    case IX86_BUILTIN_XRSTOR:
! 	      icode = CODE_FOR_xrstor;
! 	      break;
! 	    case IX86_BUILTIN_XSAVEOPT:
! 	      icode = CODE_FOR_xsaveopt;
! 	      break;
! 	    case IX86_BUILTIN_XSAVES:
! 	      icode = CODE_FOR_xsaves;
! 	      break;
! 	    case IX86_BUILTIN_XRSTORS:
! 	      icode = CODE_FOR_xrstors;
! 	      break;
! 	    case IX86_BUILTIN_XSAVEC:
! 	      icode = CODE_FOR_xsavec;
! 	      break;
! 	    default:
! 	      gcc_unreachable ();
! 	    }
! 	  pat = GEN_FCN (icode) (op0, op1);
! 	}
! 
!       if (pat)
! 	emit_insn (pat);
!       return 0;
! 
!     case IX86_BUILTIN_LLWPCB:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       op0 = expand_normal (arg0);
!       icode = CODE_FOR_lwp_llwpcb;
!       if (!insn_data[icode].operand[0].predicate (op0, Pmode))
! 	op0 = ix86_zero_extend_to_Pmode (op0);
!       emit_insn (gen_lwp_llwpcb (op0));
!       return 0;
! 
!     case IX86_BUILTIN_SLWPCB:
!       icode = CODE_FOR_lwp_slwpcb;
!       if (!target
! 	  || !insn_data[icode].operand[0].predicate (target, Pmode))
! 	target = gen_reg_rtx (Pmode);
!       emit_insn (gen_lwp_slwpcb (target));
!       return target;
! 
!     case IX86_BUILTIN_BEXTRI32:
!     case IX86_BUILTIN_BEXTRI64:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       arg1 = CALL_EXPR_ARG (exp, 1);
!       op0 = expand_normal (arg0);
!       op1 = expand_normal (arg1);
!       icode = (fcode == IX86_BUILTIN_BEXTRI32
! 	  ? CODE_FOR_tbm_bextri_si
! 	  : CODE_FOR_tbm_bextri_di);
!       if (!CONST_INT_P (op1))
!         {
!           error ("last argument must be an immediate");
!           return const0_rtx;
!         }
!       else
!         {
!           unsigned char length = (INTVAL (op1) >> 8) & 0xFF;
!           unsigned char lsb_index = INTVAL (op1) & 0xFF;
!           op1 = GEN_INT (length);
!           op2 = GEN_INT (lsb_index);
! 
! 	  mode1 = insn_data[icode].operand[1].mode;
! 	  if (!insn_data[icode].operand[1].predicate (op0, mode1))
! 	    op0 = copy_to_mode_reg (mode1, op0);
! 
! 	  mode0 = insn_data[icode].operand[0].mode;
! 	  if (target == 0
! 	      || !register_operand (target, mode0))
! 	    target = gen_reg_rtx (mode0);
! 
!           pat = GEN_FCN (icode) (target, op0, op1, op2);
!           if (pat)
!             emit_insn (pat);
!           return target;
!         }
! 
!     case IX86_BUILTIN_RDRAND16_STEP:
!       icode = CODE_FOR_rdrandhi_1;
!       mode0 = HImode;
!       goto rdrand_step;
! 
!     case IX86_BUILTIN_RDRAND32_STEP:
!       icode = CODE_FOR_rdrandsi_1;
!       mode0 = SImode;
!       goto rdrand_step;
! 
!     case IX86_BUILTIN_RDRAND64_STEP:
!       icode = CODE_FOR_rdranddi_1;
!       mode0 = DImode;
! 
! rdrand_step:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       op1 = expand_normal (arg0);
!       if (!address_operand (op1, VOIDmode))
! 	{
! 	  op1 = convert_memory_address (Pmode, op1);
! 	  op1 = copy_addr_to_reg (op1);
! 	}
! 
!       op0 = gen_reg_rtx (mode0);
!       emit_insn (GEN_FCN (icode) (op0));
! 
!       emit_move_insn (gen_rtx_MEM (mode0, op1), op0);
! 
!       op1 = gen_reg_rtx (SImode);
!       emit_move_insn (op1, CONST1_RTX (SImode));
! 
!       /* Emit SImode conditional move.  */
!       if (mode0 == HImode)
! 	{
! 	  if (TARGET_ZERO_EXTEND_WITH_AND
! 	      && optimize_function_for_speed_p (cfun))
! 	    {
! 	      op2 = force_reg (SImode, const0_rtx);
! 
! 	      emit_insn (gen_movstricthi
! 			 (gen_lowpart (HImode, op2), op0));
! 	    }
! 	  else
! 	    {
! 	      op2 = gen_reg_rtx (SImode);
! 
! 	      emit_insn (gen_zero_extendhisi2 (op2, op0));
! 	    }
! 	}
!       else if (mode0 == SImode)
! 	op2 = op0;
!       else
! 	op2 = gen_rtx_SUBREG (SImode, op0, 0);
! 
!       if (target == 0
! 	  || !register_operand (target, SImode))
! 	target = gen_reg_rtx (SImode);
! 
!       pat = gen_rtx_GEU (VOIDmode, gen_rtx_REG (CCCmode, FLAGS_REG),
! 			 const0_rtx);
!       emit_insn (gen_rtx_SET (target,
! 			      gen_rtx_IF_THEN_ELSE (SImode, pat, op2, op1)));
!       return target;
! 
!     case IX86_BUILTIN_RDSEED16_STEP:
!       icode = CODE_FOR_rdseedhi_1;
!       mode0 = HImode;
!       goto rdseed_step;
! 
!     case IX86_BUILTIN_RDSEED32_STEP:
!       icode = CODE_FOR_rdseedsi_1;
!       mode0 = SImode;
!       goto rdseed_step;
! 
!     case IX86_BUILTIN_RDSEED64_STEP:
!       icode = CODE_FOR_rdseeddi_1;
!       mode0 = DImode;
! 
! rdseed_step:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       op1 = expand_normal (arg0);
!       if (!address_operand (op1, VOIDmode))
! 	{
! 	  op1 = convert_memory_address (Pmode, op1);
! 	  op1 = copy_addr_to_reg (op1);
! 	}
! 
!       op0 = gen_reg_rtx (mode0);
!       emit_insn (GEN_FCN (icode) (op0));
! 
!       emit_move_insn (gen_rtx_MEM (mode0, op1), op0);
! 
!       op2 = gen_reg_rtx (QImode);
! 
!       pat = gen_rtx_LTU (QImode, gen_rtx_REG (CCCmode, FLAGS_REG),
!                          const0_rtx);
!       emit_insn (gen_rtx_SET (op2, pat));
! 
!       if (target == 0
! 	  || !register_operand (target, SImode))
!         target = gen_reg_rtx (SImode);
! 
!       emit_insn (gen_zero_extendqisi2 (target, op2));
!       return target;
! 
!     case IX86_BUILTIN_SBB32:
!       icode = CODE_FOR_subborrowsi;
!       icode2 = CODE_FOR_subborrowsi_0;
!       mode0 = SImode;
!       mode1 = DImode;
!       mode2 = CCmode;
!       goto handlecarry;
! 
!     case IX86_BUILTIN_SBB64:
!       icode = CODE_FOR_subborrowdi;
!       icode2 = CODE_FOR_subborrowdi_0;
!       mode0 = DImode;
!       mode1 = TImode;
!       mode2 = CCmode;
!       goto handlecarry;
! 
!     case IX86_BUILTIN_ADDCARRYX32:
!       icode = CODE_FOR_addcarrysi;
!       icode2 = CODE_FOR_addcarrysi_0;
!       mode0 = SImode;
!       mode1 = DImode;
!       mode2 = CCCmode;
!       goto handlecarry;
! 
!     case IX86_BUILTIN_ADDCARRYX64:
!       icode = CODE_FOR_addcarrydi;
!       icode2 = CODE_FOR_addcarrydi_0;
!       mode0 = DImode;
!       mode1 = TImode;
!       mode2 = CCCmode;
! 
!     handlecarry:
!       arg0 = CALL_EXPR_ARG (exp, 0); /* unsigned char c_in.  */
!       arg1 = CALL_EXPR_ARG (exp, 1); /* unsigned int src1.  */
!       arg2 = CALL_EXPR_ARG (exp, 2); /* unsigned int src2.  */
!       arg3 = CALL_EXPR_ARG (exp, 3); /* unsigned int *sum_out.  */
! 
!       op1 = expand_normal (arg0);
!       if (!integer_zerop (arg0))
! 	op1 = copy_to_mode_reg (QImode, convert_to_mode (QImode, op1, 1));
! 
!       op2 = expand_normal (arg1);
!       if (!register_operand (op2, mode0))
! 	op2 = copy_to_mode_reg (mode0, op2);
! 
!       op3 = expand_normal (arg2);
!       if (!register_operand (op3, mode0))
! 	op3 = copy_to_mode_reg (mode0, op3);
! 
!       op4 = expand_normal (arg3);
!       if (!address_operand (op4, VOIDmode))
! 	{
! 	  op4 = convert_memory_address (Pmode, op4);
! 	  op4 = copy_addr_to_reg (op4);
! 	}
! 
!       op0 = gen_reg_rtx (mode0);
!       if (integer_zerop (arg0))
! 	{
! 	  /* If arg0 is 0, optimize right away into add or sub
! 	     instruction that sets CCCmode flags.  */
! 	  op1 = gen_rtx_REG (mode2, FLAGS_REG);
! 	  emit_insn (GEN_FCN (icode2) (op0, op2, op3));
! 	}
!       else
! 	{
! 	  /* Generate CF from input operand.  */
! 	  emit_insn (gen_addqi3_cconly_overflow (op1, constm1_rtx));
! 
! 	  /* Generate instruction that consumes CF.  */
! 	  op1 = gen_rtx_REG (CCCmode, FLAGS_REG);
! 	  pat = gen_rtx_LTU (mode1, op1, const0_rtx);
! 	  pat2 = gen_rtx_LTU (mode0, op1, const0_rtx);
! 	  emit_insn (GEN_FCN (icode) (op0, op2, op3, op1, pat, pat2));
! 	}
! 
!       /* Return current CF value.  */
!       if (target == 0)
!         target = gen_reg_rtx (QImode);
! 
!       pat = gen_rtx_LTU (QImode, op1, const0_rtx);
!       emit_insn (gen_rtx_SET (target, pat));
! 
!       /* Store the result.  */
!       emit_move_insn (gen_rtx_MEM (mode0, op4), op0);
! 
!       return target;
! 
!     case IX86_BUILTIN_READ_FLAGS:
!       emit_insn (gen_push (gen_rtx_REG (word_mode, FLAGS_REG)));
! 
!       if (optimize
! 	  || target == NULL_RTX
! 	  || !nonimmediate_operand (target, word_mode)
! 	  || GET_MODE (target) != word_mode)
! 	target = gen_reg_rtx (word_mode);
! 
!       emit_insn (gen_pop (target));
!       return target;
! 
!     case IX86_BUILTIN_WRITE_FLAGS:
! 
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       op0 = expand_normal (arg0);
!       if (!general_no_elim_operand (op0, word_mode))
! 	op0 = copy_to_mode_reg (word_mode, op0);
! 
!       emit_insn (gen_push (op0));
!       emit_insn (gen_pop (gen_rtx_REG (word_mode, FLAGS_REG)));
!       return 0;
! 
!     case IX86_BUILTIN_KTESTC8:
!       icode = CODE_FOR_ktestqi;
!       mode3 = CCCmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KTESTZ8:
!       icode = CODE_FOR_ktestqi;
!       mode3 = CCZmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KTESTC16:
!       icode = CODE_FOR_ktesthi;
!       mode3 = CCCmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KTESTZ16:
!       icode = CODE_FOR_ktesthi;
!       mode3 = CCZmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KTESTC32:
!       icode = CODE_FOR_ktestsi;
!       mode3 = CCCmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KTESTZ32:
!       icode = CODE_FOR_ktestsi;
!       mode3 = CCZmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KTESTC64:
!       icode = CODE_FOR_ktestdi;
!       mode3 = CCCmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KTESTZ64:
!       icode = CODE_FOR_ktestdi;
!       mode3 = CCZmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KORTESTC8:
!       icode = CODE_FOR_kortestqi;
!       mode3 = CCCmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KORTESTZ8:
!       icode = CODE_FOR_kortestqi;
!       mode3 = CCZmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KORTESTC16:
!       icode = CODE_FOR_kortesthi;
!       mode3 = CCCmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KORTESTZ16:
!       icode = CODE_FOR_kortesthi;
!       mode3 = CCZmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KORTESTC32:
!       icode = CODE_FOR_kortestsi;
!       mode3 = CCCmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KORTESTZ32:
!       icode = CODE_FOR_kortestsi;
!       mode3 = CCZmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KORTESTC64:
!       icode = CODE_FOR_kortestdi;
!       mode3 = CCCmode;
!       goto kortest;
! 
!     case IX86_BUILTIN_KORTESTZ64:
!       icode = CODE_FOR_kortestdi;
!       mode3 = CCZmode;
! 
!     kortest:
!       arg0 = CALL_EXPR_ARG (exp, 0); /* Mask reg src1.  */
!       arg1 = CALL_EXPR_ARG (exp, 1); /* Mask reg src2.  */
!       op0 = expand_normal (arg0);
!       op1 = expand_normal (arg1);
! 
!       mode0 = insn_data[icode].operand[0].mode;
!       mode1 = insn_data[icode].operand[1].mode;
! 
!       if (GET_MODE (op0) != VOIDmode)
! 	op0 = force_reg (GET_MODE (op0), op0);
! 
!       op0 = gen_lowpart (mode0, op0);
! 
!       if (!insn_data[icode].operand[0].predicate (op0, mode0))
! 	op0 = copy_to_mode_reg (mode0, op0);
! 
!       if (GET_MODE (op1) != VOIDmode)
! 	op1 = force_reg (GET_MODE (op1), op1);
! 
!       op1 = gen_lowpart (mode1, op1);
! 
!       if (!insn_data[icode].operand[1].predicate (op1, mode1))
! 	op1 = copy_to_mode_reg (mode1, op1);
! 
!       target = gen_reg_rtx (QImode);
! 
!       /* Emit kortest.  */
!       emit_insn (GEN_FCN (icode) (op0, op1));
!       /* And use setcc to return result from flags.  */
!       ix86_expand_setcc (target, EQ,
! 			 gen_rtx_REG (mode3, FLAGS_REG), const0_rtx);
!       return target;
! 
!     case IX86_BUILTIN_GATHERSIV2DF:
!       icode = CODE_FOR_avx2_gathersiv2df;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERSIV4DF:
!       icode = CODE_FOR_avx2_gathersiv4df;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERDIV2DF:
!       icode = CODE_FOR_avx2_gatherdiv2df;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERDIV4DF:
!       icode = CODE_FOR_avx2_gatherdiv4df;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERSIV4SF:
!       icode = CODE_FOR_avx2_gathersiv4sf;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERSIV8SF:
!       icode = CODE_FOR_avx2_gathersiv8sf;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERDIV4SF:
!       icode = CODE_FOR_avx2_gatherdiv4sf;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERDIV8SF:
!       icode = CODE_FOR_avx2_gatherdiv8sf;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERSIV2DI:
!       icode = CODE_FOR_avx2_gathersiv2di;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERSIV4DI:
!       icode = CODE_FOR_avx2_gathersiv4di;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERDIV2DI:
!       icode = CODE_FOR_avx2_gatherdiv2di;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERDIV4DI:
!       icode = CODE_FOR_avx2_gatherdiv4di;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERSIV4SI:
!       icode = CODE_FOR_avx2_gathersiv4si;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERSIV8SI:
!       icode = CODE_FOR_avx2_gathersiv8si;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERDIV4SI:
!       icode = CODE_FOR_avx2_gatherdiv4si;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERDIV8SI:
!       icode = CODE_FOR_avx2_gatherdiv8si;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERALTSIV4DF:
!       icode = CODE_FOR_avx2_gathersiv4df;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERALTDIV8SF:
!       icode = CODE_FOR_avx2_gatherdiv8sf;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERALTSIV4DI:
!       icode = CODE_FOR_avx2_gathersiv4di;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHERALTDIV8SI:
!       icode = CODE_FOR_avx2_gatherdiv8si;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3SIV16SF:
!       icode = CODE_FOR_avx512f_gathersiv16sf;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3SIV8DF:
!       icode = CODE_FOR_avx512f_gathersiv8df;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3DIV16SF:
!       icode = CODE_FOR_avx512f_gatherdiv16sf;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3DIV8DF:
!       icode = CODE_FOR_avx512f_gatherdiv8df;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3SIV16SI:
!       icode = CODE_FOR_avx512f_gathersiv16si;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3SIV8DI:
!       icode = CODE_FOR_avx512f_gathersiv8di;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3DIV16SI:
!       icode = CODE_FOR_avx512f_gatherdiv16si;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3DIV8DI:
!       icode = CODE_FOR_avx512f_gatherdiv8di;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3ALTSIV8DF:
!       icode = CODE_FOR_avx512f_gathersiv8df;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3ALTDIV16SF:
!       icode = CODE_FOR_avx512f_gatherdiv16sf;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3ALTSIV8DI:
!       icode = CODE_FOR_avx512f_gathersiv8di;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3ALTDIV16SI:
!       icode = CODE_FOR_avx512f_gatherdiv16si;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3SIV2DF:
!       icode = CODE_FOR_avx512vl_gathersiv2df;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3SIV4DF:
!       icode = CODE_FOR_avx512vl_gathersiv4df;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3DIV2DF:
!       icode = CODE_FOR_avx512vl_gatherdiv2df;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3DIV4DF:
!       icode = CODE_FOR_avx512vl_gatherdiv4df;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3SIV4SF:
!       icode = CODE_FOR_avx512vl_gathersiv4sf;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3SIV8SF:
!       icode = CODE_FOR_avx512vl_gathersiv8sf;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3DIV4SF:
!       icode = CODE_FOR_avx512vl_gatherdiv4sf;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3DIV8SF:
!       icode = CODE_FOR_avx512vl_gatherdiv8sf;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3SIV2DI:
!       icode = CODE_FOR_avx512vl_gathersiv2di;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3SIV4DI:
!       icode = CODE_FOR_avx512vl_gathersiv4di;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3DIV2DI:
!       icode = CODE_FOR_avx512vl_gatherdiv2di;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3DIV4DI:
!       icode = CODE_FOR_avx512vl_gatherdiv4di;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3SIV4SI:
!       icode = CODE_FOR_avx512vl_gathersiv4si;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3SIV8SI:
!       icode = CODE_FOR_avx512vl_gathersiv8si;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3DIV4SI:
!       icode = CODE_FOR_avx512vl_gatherdiv4si;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3DIV8SI:
!       icode = CODE_FOR_avx512vl_gatherdiv8si;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3ALTSIV4DF:
!       icode = CODE_FOR_avx512vl_gathersiv4df;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3ALTDIV8SF:
!       icode = CODE_FOR_avx512vl_gatherdiv8sf;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3ALTSIV4DI:
!       icode = CODE_FOR_avx512vl_gathersiv4di;
!       goto gather_gen;
!     case IX86_BUILTIN_GATHER3ALTDIV8SI:
!       icode = CODE_FOR_avx512vl_gatherdiv8si;
!       goto gather_gen;
!     case IX86_BUILTIN_SCATTERSIV16SF:
!       icode = CODE_FOR_avx512f_scattersiv16sf;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERSIV8DF:
!       icode = CODE_FOR_avx512f_scattersiv8df;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERDIV16SF:
!       icode = CODE_FOR_avx512f_scatterdiv16sf;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERDIV8DF:
!       icode = CODE_FOR_avx512f_scatterdiv8df;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERSIV16SI:
!       icode = CODE_FOR_avx512f_scattersiv16si;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERSIV8DI:
!       icode = CODE_FOR_avx512f_scattersiv8di;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERDIV16SI:
!       icode = CODE_FOR_avx512f_scatterdiv16si;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERDIV8DI:
!       icode = CODE_FOR_avx512f_scatterdiv8di;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERSIV8SF:
!       icode = CODE_FOR_avx512vl_scattersiv8sf;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERSIV4SF:
!       icode = CODE_FOR_avx512vl_scattersiv4sf;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERSIV4DF:
!       icode = CODE_FOR_avx512vl_scattersiv4df;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERSIV2DF:
!       icode = CODE_FOR_avx512vl_scattersiv2df;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERDIV8SF:
!       icode = CODE_FOR_avx512vl_scatterdiv8sf;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERDIV4SF:
!       icode = CODE_FOR_avx512vl_scatterdiv4sf;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERDIV4DF:
!       icode = CODE_FOR_avx512vl_scatterdiv4df;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERDIV2DF:
!       icode = CODE_FOR_avx512vl_scatterdiv2df;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERSIV8SI:
!       icode = CODE_FOR_avx512vl_scattersiv8si;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERSIV4SI:
!       icode = CODE_FOR_avx512vl_scattersiv4si;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERSIV4DI:
!       icode = CODE_FOR_avx512vl_scattersiv4di;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERSIV2DI:
!       icode = CODE_FOR_avx512vl_scattersiv2di;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERDIV8SI:
!       icode = CODE_FOR_avx512vl_scatterdiv8si;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERDIV4SI:
!       icode = CODE_FOR_avx512vl_scatterdiv4si;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERDIV4DI:
!       icode = CODE_FOR_avx512vl_scatterdiv4di;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERDIV2DI:
!       icode = CODE_FOR_avx512vl_scatterdiv2di;
!       goto scatter_gen;
!     case IX86_BUILTIN_GATHERPFDPD:
!       icode = CODE_FOR_avx512pf_gatherpfv8sidf;
!       goto vec_prefetch_gen;
!     case IX86_BUILTIN_SCATTERALTSIV8DF:
!       icode = CODE_FOR_avx512f_scattersiv8df;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERALTDIV16SF:
!       icode = CODE_FOR_avx512f_scatterdiv16sf;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERALTSIV8DI:
!       icode = CODE_FOR_avx512f_scattersiv8di;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERALTDIV16SI:
!       icode = CODE_FOR_avx512f_scatterdiv16si;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERALTSIV4DF:
!       icode = CODE_FOR_avx512vl_scattersiv4df;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERALTDIV8SF:
!       icode = CODE_FOR_avx512vl_scatterdiv8sf;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERALTSIV4DI:
!       icode = CODE_FOR_avx512vl_scattersiv4di;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERALTDIV8SI:
!       icode = CODE_FOR_avx512vl_scatterdiv8si;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERALTSIV2DF:
!       icode = CODE_FOR_avx512vl_scattersiv2df;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERALTDIV4SF:
!       icode = CODE_FOR_avx512vl_scatterdiv4sf;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERALTSIV2DI:
!       icode = CODE_FOR_avx512vl_scattersiv2di;
!       goto scatter_gen;
!     case IX86_BUILTIN_SCATTERALTDIV4SI:
!       icode = CODE_FOR_avx512vl_scatterdiv4si;
!       goto scatter_gen;
!     case IX86_BUILTIN_GATHERPFDPS:
!       icode = CODE_FOR_avx512pf_gatherpfv16sisf;
!       goto vec_prefetch_gen;
!     case IX86_BUILTIN_GATHERPFQPD:
!       icode = CODE_FOR_avx512pf_gatherpfv8didf;
!       goto vec_prefetch_gen;
!     case IX86_BUILTIN_GATHERPFQPS:
!       icode = CODE_FOR_avx512pf_gatherpfv8disf;
!       goto vec_prefetch_gen;
!     case IX86_BUILTIN_SCATTERPFDPD:
!       icode = CODE_FOR_avx512pf_scatterpfv8sidf;
!       goto vec_prefetch_gen;
!     case IX86_BUILTIN_SCATTERPFDPS:
!       icode = CODE_FOR_avx512pf_scatterpfv16sisf;
!       goto vec_prefetch_gen;
!     case IX86_BUILTIN_SCATTERPFQPD:
!       icode = CODE_FOR_avx512pf_scatterpfv8didf;
!       goto vec_prefetch_gen;
!     case IX86_BUILTIN_SCATTERPFQPS:
!       icode = CODE_FOR_avx512pf_scatterpfv8disf;
!       goto vec_prefetch_gen;
! 
!     gather_gen:
!       rtx half;
!       rtx (*gen) (rtx, rtx);
! 
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       arg1 = CALL_EXPR_ARG (exp, 1);
!       arg2 = CALL_EXPR_ARG (exp, 2);
!       arg3 = CALL_EXPR_ARG (exp, 3);
!       arg4 = CALL_EXPR_ARG (exp, 4);
!       op0 = expand_normal (arg0);
!       op1 = expand_normal (arg1);
!       op2 = expand_normal (arg2);
!       op3 = expand_normal (arg3);
!       op4 = expand_normal (arg4);
!       /* Note the arg order is different from the operand order.  */
!       mode0 = insn_data[icode].operand[1].mode;
!       mode2 = insn_data[icode].operand[3].mode;
!       mode3 = insn_data[icode].operand[4].mode;
!       mode4 = insn_data[icode].operand[5].mode;
! 
!       if (target == NULL_RTX
! 	  || GET_MODE (target) != insn_data[icode].operand[0].mode
! 	  || !insn_data[icode].operand[0].predicate (target,
! 						     GET_MODE (target)))
! 	subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
!       else
! 	subtarget = target;
! 
!       switch (fcode)
! 	{
! 	case IX86_BUILTIN_GATHER3ALTSIV8DF:
! 	case IX86_BUILTIN_GATHER3ALTSIV8DI:
! 	  half = gen_reg_rtx (V8SImode);
! 	  if (!nonimmediate_operand (op2, V16SImode))
! 	    op2 = copy_to_mode_reg (V16SImode, op2);
! 	  emit_insn (gen_vec_extract_lo_v16si (half, op2));
! 	  op2 = half;
! 	  break;
! 	case IX86_BUILTIN_GATHER3ALTSIV4DF:
! 	case IX86_BUILTIN_GATHER3ALTSIV4DI:
! 	case IX86_BUILTIN_GATHERALTSIV4DF:
! 	case IX86_BUILTIN_GATHERALTSIV4DI:
! 	  half = gen_reg_rtx (V4SImode);
! 	  if (!nonimmediate_operand (op2, V8SImode))
! 	    op2 = copy_to_mode_reg (V8SImode, op2);
! 	  emit_insn (gen_vec_extract_lo_v8si (half, op2));
! 	  op2 = half;
! 	  break;
! 	case IX86_BUILTIN_GATHER3ALTDIV16SF:
! 	case IX86_BUILTIN_GATHER3ALTDIV16SI:
! 	  half = gen_reg_rtx (mode0);
! 	  if (mode0 == V8SFmode)
! 	    gen = gen_vec_extract_lo_v16sf;
! 	  else
! 	    gen = gen_vec_extract_lo_v16si;
! 	  if (!nonimmediate_operand (op0, GET_MODE (op0)))
! 	    op0 = copy_to_mode_reg (GET_MODE (op0), op0);
! 	  emit_insn (gen (half, op0));
! 	  op0 = half;
! 	  op3 = lowpart_subreg (QImode, op3, HImode);
! 	  break;
! 	case IX86_BUILTIN_GATHER3ALTDIV8SF:
! 	case IX86_BUILTIN_GATHER3ALTDIV8SI:
! 	case IX86_BUILTIN_GATHERALTDIV8SF:
! 	case IX86_BUILTIN_GATHERALTDIV8SI:
! 	  half = gen_reg_rtx (mode0);
! 	  if (mode0 == V4SFmode)
! 	    gen = gen_vec_extract_lo_v8sf;
! 	  else
! 	    gen = gen_vec_extract_lo_v8si;
! 	  if (!nonimmediate_operand (op0, GET_MODE (op0)))
! 	    op0 = copy_to_mode_reg (GET_MODE (op0), op0);
! 	  emit_insn (gen (half, op0));
! 	  op0 = half;
! 	  if (VECTOR_MODE_P (GET_MODE (op3)))
! 	    {
! 	      half = gen_reg_rtx (mode0);
! 	      if (!nonimmediate_operand (op3, GET_MODE (op3)))
! 		op3 = copy_to_mode_reg (GET_MODE (op3), op3);
! 	      emit_insn (gen (half, op3));
! 	      op3 = half;
! 	    }
! 	  break;
! 	default:
! 	  break;
! 	}
! 
!       /* Force memory operand only with base register here.  But we
! 	 don't want to do it on memory operand for other builtin
! 	 functions.  */
!       op1 = ix86_zero_extend_to_Pmode (op1);
! 
!       if (!insn_data[icode].operand[1].predicate (op0, mode0))
! 	op0 = copy_to_mode_reg (mode0, op0);
!       if (!insn_data[icode].operand[2].predicate (op1, Pmode))
! 	op1 = copy_to_mode_reg (Pmode, op1);
!       if (!insn_data[icode].operand[3].predicate (op2, mode2))
! 	op2 = copy_to_mode_reg (mode2, op2);
! 
!       op3 = fixup_modeless_constant (op3, mode3);
! 
!       if (GET_MODE (op3) == mode3 || GET_MODE (op3) == VOIDmode)
! 	{
! 	  if (!insn_data[icode].operand[4].predicate (op3, mode3))
! 	    op3 = copy_to_mode_reg (mode3, op3);
! 	}
!       else
! 	{
! 	  op3 = copy_to_reg (op3);
! 	  op3 = lowpart_subreg (mode3, op3, GET_MODE (op3));
! 	}
!       if (!insn_data[icode].operand[5].predicate (op4, mode4))
! 	{
!           error ("the last argument must be scale 1, 2, 4, 8");
!           return const0_rtx;
! 	}
! 
!       /* Optimize.  If mask is known to have all high bits set,
! 	 replace op0 with pc_rtx to signal that the instruction
! 	 overwrites the whole destination and doesn't use its
! 	 previous contents.  */
!       if (optimize)
! 	{
! 	  if (TREE_CODE (arg3) == INTEGER_CST)
! 	    {
! 	      if (integer_all_onesp (arg3))
! 		op0 = pc_rtx;
! 	    }
! 	  else if (TREE_CODE (arg3) == VECTOR_CST)
! 	    {
! 	      unsigned int negative = 0;
! 	      for (i = 0; i < VECTOR_CST_NELTS (arg3); ++i)
! 		{
! 		  tree cst = VECTOR_CST_ELT (arg3, i);
! 		  if (TREE_CODE (cst) == INTEGER_CST
! 		      && tree_int_cst_sign_bit (cst))
! 		    negative++;
! 		  else if (TREE_CODE (cst) == REAL_CST
! 			   && REAL_VALUE_NEGATIVE (TREE_REAL_CST (cst)))
! 		    negative++;
! 		}
! 	      if (negative == TYPE_VECTOR_SUBPARTS (TREE_TYPE (arg3)))
! 		op0 = pc_rtx;
! 	    }
! 	  else if (TREE_CODE (arg3) == SSA_NAME
! 		   && TREE_CODE (TREE_TYPE (arg3)) == VECTOR_TYPE)
! 	    {
! 	      /* Recognize also when mask is like:
! 		 __v2df src = _mm_setzero_pd ();
! 		 __v2df mask = _mm_cmpeq_pd (src, src);
! 		 or
! 		 __v8sf src = _mm256_setzero_ps ();
! 		 __v8sf mask = _mm256_cmp_ps (src, src, _CMP_EQ_OQ);
! 		 as that is a cheaper way to load all ones into
! 		 a register than having to load a constant from
! 		 memory.  */
! 	      gimple *def_stmt = SSA_NAME_DEF_STMT (arg3);
! 	      if (is_gimple_call (def_stmt))
! 		{
! 		  tree fndecl = gimple_call_fndecl (def_stmt);
! 		  if (fndecl
! 		      && fndecl_built_in_p (fndecl, BUILT_IN_MD))
! 		    switch ((unsigned int) DECL_FUNCTION_CODE (fndecl))
! 		      {
! 		      case IX86_BUILTIN_CMPPD:
! 		      case IX86_BUILTIN_CMPPS:
! 		      case IX86_BUILTIN_CMPPD256:
! 		      case IX86_BUILTIN_CMPPS256:
! 			if (!integer_zerop (gimple_call_arg (def_stmt, 2)))
! 			  break;
! 			/* FALLTHRU */
! 		      case IX86_BUILTIN_CMPEQPD:
! 		      case IX86_BUILTIN_CMPEQPS:
! 			if (initializer_zerop (gimple_call_arg (def_stmt, 0))
! 			    && initializer_zerop (gimple_call_arg (def_stmt,
! 								   1)))
! 			  op0 = pc_rtx;
! 			break;
! 		      default:
! 			break;
! 		      }
! 		}
! 	    }
! 	}
! 
!       pat = GEN_FCN (icode) (subtarget, op0, op1, op2, op3, op4);
!       if (! pat)
! 	return const0_rtx;
!       emit_insn (pat);
! 
!       switch (fcode)
! 	{
! 	case IX86_BUILTIN_GATHER3DIV16SF:
! 	  if (target == NULL_RTX)
! 	    target = gen_reg_rtx (V8SFmode);
! 	  emit_insn (gen_vec_extract_lo_v16sf (target, subtarget));
! 	  break;
! 	case IX86_BUILTIN_GATHER3DIV16SI:
! 	  if (target == NULL_RTX)
! 	    target = gen_reg_rtx (V8SImode);
! 	  emit_insn (gen_vec_extract_lo_v16si (target, subtarget));
! 	  break;
! 	case IX86_BUILTIN_GATHER3DIV8SF:
! 	case IX86_BUILTIN_GATHERDIV8SF:
! 	  if (target == NULL_RTX)
! 	    target = gen_reg_rtx (V4SFmode);
! 	  emit_insn (gen_vec_extract_lo_v8sf (target, subtarget));
! 	  break;
! 	case IX86_BUILTIN_GATHER3DIV8SI:
! 	case IX86_BUILTIN_GATHERDIV8SI:
! 	  if (target == NULL_RTX)
! 	    target = gen_reg_rtx (V4SImode);
! 	  emit_insn (gen_vec_extract_lo_v8si (target, subtarget));
! 	  break;
! 	default:
! 	  target = subtarget;
! 	  break;
! 	}
!       return target;
! 
!     scatter_gen:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       arg1 = CALL_EXPR_ARG (exp, 1);
!       arg2 = CALL_EXPR_ARG (exp, 2);
!       arg3 = CALL_EXPR_ARG (exp, 3);
!       arg4 = CALL_EXPR_ARG (exp, 4);
!       op0 = expand_normal (arg0);
!       op1 = expand_normal (arg1);
!       op2 = expand_normal (arg2);
!       op3 = expand_normal (arg3);
!       op4 = expand_normal (arg4);
!       mode1 = insn_data[icode].operand[1].mode;
!       mode2 = insn_data[icode].operand[2].mode;
!       mode3 = insn_data[icode].operand[3].mode;
!       mode4 = insn_data[icode].operand[4].mode;
! 
!       /* Scatter instruction stores operand op3 to memory with
! 	 indices from op2 and scale from op4 under writemask op1.
! 	 If index operand op2 has more elements then source operand
! 	 op3 one need to use only its low half. And vice versa.  */
!       switch (fcode)
! 	{
! 	case IX86_BUILTIN_SCATTERALTSIV8DF:
! 	case IX86_BUILTIN_SCATTERALTSIV8DI:
! 	  half = gen_reg_rtx (V8SImode);
! 	  if (!nonimmediate_operand (op2, V16SImode))
! 	    op2 = copy_to_mode_reg (V16SImode, op2);
! 	  emit_insn (gen_vec_extract_lo_v16si (half, op2));
! 	  op2 = half;
! 	  break;
! 	case IX86_BUILTIN_SCATTERALTDIV16SF:
! 	case IX86_BUILTIN_SCATTERALTDIV16SI:
! 	  half = gen_reg_rtx (mode3);
! 	  if (mode3 == V8SFmode)
! 	    gen = gen_vec_extract_lo_v16sf;
! 	  else
! 	    gen = gen_vec_extract_lo_v16si;
! 	  if (!nonimmediate_operand (op3, GET_MODE (op3)))
! 	    op3 = copy_to_mode_reg (GET_MODE (op3), op3);
! 	  emit_insn (gen (half, op3));
! 	  op3 = half;
! 	  break;
! 	case IX86_BUILTIN_SCATTERALTSIV4DF:
! 	case IX86_BUILTIN_SCATTERALTSIV4DI:
! 	  half = gen_reg_rtx (V4SImode);
! 	  if (!nonimmediate_operand (op2, V8SImode))
! 	    op2 = copy_to_mode_reg (V8SImode, op2);
! 	  emit_insn (gen_vec_extract_lo_v8si (half, op2));
! 	  op2 = half;
! 	  break;
! 	case IX86_BUILTIN_SCATTERALTDIV8SF:
! 	case IX86_BUILTIN_SCATTERALTDIV8SI:
! 	  half = gen_reg_rtx (mode3);
! 	  if (mode3 == V4SFmode)
! 	    gen = gen_vec_extract_lo_v8sf;
! 	  else
! 	    gen = gen_vec_extract_lo_v8si;
! 	  if (!nonimmediate_operand (op3, GET_MODE (op3)))
! 	    op3 = copy_to_mode_reg (GET_MODE (op3), op3);
! 	  emit_insn (gen (half, op3));
! 	  op3 = half;
! 	  break;
! 	case IX86_BUILTIN_SCATTERALTSIV2DF:
! 	case IX86_BUILTIN_SCATTERALTSIV2DI:
! 	  if (!nonimmediate_operand (op2, V4SImode))
! 	    op2 = copy_to_mode_reg (V4SImode, op2);
! 	  break;
! 	case IX86_BUILTIN_SCATTERALTDIV4SF:
! 	case IX86_BUILTIN_SCATTERALTDIV4SI:
! 	  if (!nonimmediate_operand (op3, GET_MODE (op3)))
! 	    op3 = copy_to_mode_reg (GET_MODE (op3), op3);
! 	  break;
! 	default:
! 	  break;
! 	}
! 
!       /* Force memory operand only with base register here.  But we
! 	 don't want to do it on memory operand for other builtin
! 	 functions.  */
!       op0 = force_reg (Pmode, convert_to_mode (Pmode, op0, 1));
! 
!       if (!insn_data[icode].operand[0].predicate (op0, Pmode))
! 	op0 = copy_to_mode_reg (Pmode, op0);
! 
!       op1 = fixup_modeless_constant (op1, mode1);
! 
!       if (GET_MODE (op1) == mode1 || GET_MODE (op1) == VOIDmode)
! 	{
! 	  if (!insn_data[icode].operand[1].predicate (op1, mode1))
! 	    op1 = copy_to_mode_reg (mode1, op1);
! 	}
!       else
! 	{
! 	  op1 = copy_to_reg (op1);
! 	  op1 = lowpart_subreg (mode1, op1, GET_MODE (op1));
! 	}
! 
!       if (!insn_data[icode].operand[2].predicate (op2, mode2))
! 	op2 = copy_to_mode_reg (mode2, op2);
! 
!       if (!insn_data[icode].operand[3].predicate (op3, mode3))
! 	op3 = copy_to_mode_reg (mode3, op3);
! 
!       if (!insn_data[icode].operand[4].predicate (op4, mode4))
! 	{
! 	  error ("the last argument must be scale 1, 2, 4, 8");
! 	  return const0_rtx;
! 	}
! 
!       pat = GEN_FCN (icode) (op0, op1, op2, op3, op4);
!       if (! pat)
! 	return const0_rtx;
! 
!       emit_insn (pat);
!       return 0;
! 
!     vec_prefetch_gen:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       arg1 = CALL_EXPR_ARG (exp, 1);
!       arg2 = CALL_EXPR_ARG (exp, 2);
!       arg3 = CALL_EXPR_ARG (exp, 3);
!       arg4 = CALL_EXPR_ARG (exp, 4);
!       op0 = expand_normal (arg0);
!       op1 = expand_normal (arg1);
!       op2 = expand_normal (arg2);
!       op3 = expand_normal (arg3);
!       op4 = expand_normal (arg4);
!       mode0 = insn_data[icode].operand[0].mode;
!       mode1 = insn_data[icode].operand[1].mode;
!       mode3 = insn_data[icode].operand[3].mode;
!       mode4 = insn_data[icode].operand[4].mode;
! 
!       op0 = fixup_modeless_constant (op0, mode0);
! 
!       if (GET_MODE (op0) == mode0 || GET_MODE (op0) == VOIDmode)
! 	{
! 	  if (!insn_data[icode].operand[0].predicate (op0, mode0))
! 	    op0 = copy_to_mode_reg (mode0, op0);
! 	}
!       else
! 	{
! 	  op0 = copy_to_reg (op0);
! 	  op0 = lowpart_subreg (mode0, op0, GET_MODE (op0));
! 	}
! 
!       if (!insn_data[icode].operand[1].predicate (op1, mode1))
! 	op1 = copy_to_mode_reg (mode1, op1);
! 
!       /* Force memory operand only with base register here.  But we
! 	 don't want to do it on memory operand for other builtin
! 	 functions.  */
!       op2 = force_reg (Pmode, convert_to_mode (Pmode, op2, 1));
! 
!       if (!insn_data[icode].operand[2].predicate (op2, Pmode))
! 	op2 = copy_to_mode_reg (Pmode, op2);
! 
!       if (!insn_data[icode].operand[3].predicate (op3, mode3))
! 	{
! 	  error ("the forth argument must be scale 1, 2, 4, 8");
! 	  return const0_rtx;
! 	}
! 
!       if (!insn_data[icode].operand[4].predicate (op4, mode4))
! 	{
! 	  error ("incorrect hint operand");
! 	  return const0_rtx;
! 	}
! 
!       pat = GEN_FCN (icode) (op0, op1, op2, op3, op4);
!       if (! pat)
! 	return const0_rtx;
! 
!       emit_insn (pat);
! 
!       return 0;
! 
!     case IX86_BUILTIN_XABORT:
!       icode = CODE_FOR_xabort;
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       op0 = expand_normal (arg0);
!       mode0 = insn_data[icode].operand[0].mode;
!       if (!insn_data[icode].operand[0].predicate (op0, mode0))
! 	{
! 	  error ("the argument to %<xabort%> intrinsic must "
! 		 "be an 8-bit immediate");
! 	  return const0_rtx;
! 	}
!       emit_insn (gen_xabort (op0));
!       return 0;
! 
!     case IX86_BUILTIN_RSTORSSP:
!     case IX86_BUILTIN_CLRSSBSY:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       op0 = expand_normal (arg0);
!       icode = (fcode == IX86_BUILTIN_RSTORSSP
! 	  ? CODE_FOR_rstorssp
! 	  : CODE_FOR_clrssbsy);
!       if (!address_operand (op0, VOIDmode))
! 	{
! 	  op1 = convert_memory_address (Pmode, op0);
! 	  op0 = copy_addr_to_reg (op1);
! 	}
!       emit_insn (GEN_FCN (icode) (gen_rtx_MEM (Pmode, op0)));
!       return 0;
! 
!     case IX86_BUILTIN_WRSSD:
!     case IX86_BUILTIN_WRSSQ:
!     case IX86_BUILTIN_WRUSSD:
!     case IX86_BUILTIN_WRUSSQ:
!       arg0 = CALL_EXPR_ARG (exp, 0);
!       op0 = expand_normal (arg0);
!       arg1 = CALL_EXPR_ARG (exp, 1);
!       op1 = expand_normal (arg1);
!       switch (fcode)
! 	{
! 	case IX86_BUILTIN_WRSSD:
! 	  icode = CODE_FOR_wrsssi;
! 	  mode = SImode;
! 	  break;
! 	case IX86_BUILTIN_WRSSQ:
! 	  icode = CODE_FOR_wrssdi;
! 	  mode = DImode;
! 	  break;
! 	case IX86_BUILTIN_WRUSSD:
! 	  icode = CODE_FOR_wrusssi;
! 	  mode = SImode;
! 	  break;
! 	case IX86_BUILTIN_WRUSSQ:
! 	  icode = CODE_FOR_wrussdi;
! 	  mode = DImode;
! 	  break;
! 	}
!       op0 = force_reg (mode, op0);
!       if (!address_operand (op1, VOIDmode))
! 	{
! 	  op2 = convert_memory_address (Pmode, op1);
! 	  op1 = copy_addr_to_reg (op2);
! 	}
!       emit_insn (GEN_FCN (icode) (op0, gen_rtx_MEM (mode, op1)));
!       return 0;
! 
!     default:
!       break;
!     }
! 
!   if (fcode >= IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST
!       && fcode <= IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST)
!     {
!       i = fcode - IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST;
!       return ix86_expand_special_args_builtin (bdesc_special_args + i, exp,
! 					       target);
!     }
! 
!   if (fcode >= IX86_BUILTIN__BDESC_ARGS_FIRST
!       && fcode <= IX86_BUILTIN__BDESC_ARGS_LAST)
!     {
!       i = fcode - IX86_BUILTIN__BDESC_ARGS_FIRST;
!       rtx (*fcn) (rtx, rtx, rtx, rtx) = NULL;
!       rtx (*fcn_mask) (rtx, rtx, rtx, rtx, rtx);
!       rtx (*fcn_maskz) (rtx, rtx, rtx, rtx, rtx, rtx);
!       int masked = 1;
!       machine_mode mode, wide_mode, nar_mode;
! 
!       nar_mode  = V4SFmode;
!       mode      = V16SFmode;
!       wide_mode = V64SFmode;
!       fcn_mask  = gen_avx5124fmaddps_4fmaddps_mask;
!       fcn_maskz = gen_avx5124fmaddps_4fmaddps_maskz;
! 
!       switch (fcode)
! 	{
! 	case IX86_BUILTIN_4FMAPS:
! 	  fcn = gen_avx5124fmaddps_4fmaddps;
! 	  masked = 0;
! 	  goto v4fma_expand;
! 
! 	case IX86_BUILTIN_4DPWSSD:
! 	  nar_mode  = V4SImode;
! 	  mode      = V16SImode;
! 	  wide_mode = V64SImode;
! 	  fcn = gen_avx5124vnniw_vp4dpwssd;
! 	  masked = 0;
! 	  goto v4fma_expand;
! 
! 	case IX86_BUILTIN_4DPWSSDS:
! 	  nar_mode  = V4SImode;
! 	  mode      = V16SImode;
! 	  wide_mode = V64SImode;
! 	  fcn = gen_avx5124vnniw_vp4dpwssds;
! 	  masked = 0;
! 	  goto v4fma_expand;
! 
! 	case IX86_BUILTIN_4FNMAPS:
! 	  fcn = gen_avx5124fmaddps_4fnmaddps;
! 	  masked = 0;
! 	  goto v4fma_expand;
! 
! 	case IX86_BUILTIN_4FNMAPS_MASK:
! 	  fcn_mask  = gen_avx5124fmaddps_4fnmaddps_mask;
! 	  fcn_maskz = gen_avx5124fmaddps_4fnmaddps_maskz;
! 	  goto v4fma_expand;
! 
! 	case IX86_BUILTIN_4DPWSSD_MASK:
! 	  nar_mode  = V4SImode;
! 	  mode      = V16SImode;
! 	  wide_mode = V64SImode;
! 	  fcn_mask  = gen_avx5124vnniw_vp4dpwssd_mask;
! 	  fcn_maskz = gen_avx5124vnniw_vp4dpwssd_maskz;
! 	  goto v4fma_expand;
! 
! 	case IX86_BUILTIN_4DPWSSDS_MASK:
! 	  nar_mode  = V4SImode;
! 	  mode      = V16SImode;
! 	  wide_mode = V64SImode;
! 	  fcn_mask  = gen_avx5124vnniw_vp4dpwssds_mask;
! 	  fcn_maskz = gen_avx5124vnniw_vp4dpwssds_maskz;
! 	  goto v4fma_expand;
! 
! 	case IX86_BUILTIN_4FMAPS_MASK:
! 	  {
! 	    tree args[4];
! 	    rtx ops[4];
! 	    rtx wide_reg;
! 	    rtx accum;
! 	    rtx addr;
! 	    rtx mem;
! 
! v4fma_expand:
! 	    wide_reg = gen_reg_rtx (wide_mode);
! 	    for (i = 0; i < 4; i++)
! 	      {
! 		args[i] = CALL_EXPR_ARG (exp, i);
! 		ops[i] = expand_normal (args[i]);
! 
! 		emit_move_insn (gen_rtx_SUBREG (mode, wide_reg, i * 64),
! 				ops[i]);
! 	      }
! 
! 	    accum = expand_normal (CALL_EXPR_ARG (exp, 4));
! 	    accum = force_reg (mode, accum);
! 
! 	    addr = expand_normal (CALL_EXPR_ARG (exp, 5));
! 	    addr = force_reg (Pmode, addr);
! 
! 	    mem = gen_rtx_MEM (nar_mode, addr);
! 
! 	    target = gen_reg_rtx (mode);
! 
! 	    emit_move_insn (target, accum);
! 
! 	    if (! masked)
! 	      emit_insn (fcn (target, accum, wide_reg, mem));
! 	    else
! 	      {
! 		rtx merge, mask;
! 		merge = expand_normal (CALL_EXPR_ARG (exp, 6));
! 
! 		mask = expand_normal (CALL_EXPR_ARG (exp, 7));
! 
! 		if (CONST_INT_P (mask))
! 		  mask = fixup_modeless_constant (mask, HImode);
! 
! 		mask = force_reg (HImode, mask);
! 
! 		if (GET_MODE (mask) != HImode)
! 		  mask = gen_rtx_SUBREG (HImode, mask, 0);
! 
! 		/* If merge is 0 then we're about to emit z-masked variant.  */
! 		if (const0_operand (merge, mode))
! 		  emit_insn (fcn_maskz (target, accum, wide_reg, mem, merge, mask));
! 		/* If merge is the same as accum then emit merge-masked variant.  */
! 		else if (CALL_EXPR_ARG (exp, 6) == CALL_EXPR_ARG (exp, 4))
! 		  {
! 		    merge = force_reg (mode, merge);
! 		    emit_insn (fcn_mask (target, wide_reg, mem, merge, mask));
! 		  }
! 		/* Merge with something unknown might happen if we z-mask w/ -O0.  */
! 		else
! 		  {
! 		    target = gen_reg_rtx (mode);
! 		    emit_move_insn (target, merge);
! 		    emit_insn (fcn_mask (target, wide_reg, mem, target, mask));
! 		  }
! 	      }
! 	    return target;
! 	  }
! 
! 	case IX86_BUILTIN_4FNMASS:
! 	  fcn = gen_avx5124fmaddps_4fnmaddss;
! 	  masked = 0;
! 	  goto s4fma_expand;
! 
! 	case IX86_BUILTIN_4FMASS:
! 	  fcn = gen_avx5124fmaddps_4fmaddss;
! 	  masked = 0;
! 	  goto s4fma_expand;
! 
! 	case IX86_BUILTIN_4FNMASS_MASK:
! 	  fcn_mask = gen_avx5124fmaddps_4fnmaddss_mask;
! 	  fcn_maskz = gen_avx5124fmaddps_4fnmaddss_maskz;
! 	  goto s4fma_expand;
! 
! 	case IX86_BUILTIN_4FMASS_MASK:
! 	  {
! 	    tree args[4];
! 	    rtx ops[4];
! 	    rtx wide_reg;
! 	    rtx accum;
! 	    rtx addr;
! 	    rtx mem;
! 
! 	    fcn_mask = gen_avx5124fmaddps_4fmaddss_mask;
! 	    fcn_maskz = gen_avx5124fmaddps_4fmaddss_maskz;
! 
! s4fma_expand:
! 	    mode = V4SFmode;
! 	    wide_reg = gen_reg_rtx (V64SFmode);
! 	    for (i = 0; i < 4; i++)
! 	      {
! 		rtx tmp;
! 		args[i] = CALL_EXPR_ARG (exp, i);
! 		ops[i] = expand_normal (args[i]);
! 
! 		tmp = gen_reg_rtx (SFmode);
! 		emit_move_insn (tmp, gen_rtx_SUBREG (SFmode, ops[i], 0));
! 
! 		emit_move_insn (gen_rtx_SUBREG (V16SFmode, wide_reg, i * 64),
! 				gen_rtx_SUBREG (V16SFmode, tmp, 0));
! 	      }
! 
! 	    accum = expand_normal (CALL_EXPR_ARG (exp, 4));
! 	    accum = force_reg (V4SFmode, accum);
! 
! 	    addr = expand_normal (CALL_EXPR_ARG (exp, 5));
! 	    addr = force_reg (Pmode, addr);
! 
! 	    mem = gen_rtx_MEM (V4SFmode, addr);
! 
! 	    target = gen_reg_rtx (V4SFmode);
! 
! 	    emit_move_insn (target, accum);
! 
! 	    if (! masked)
! 	      emit_insn (fcn (target, accum, wide_reg, mem));
! 	    else
! 	      {
! 		rtx merge, mask;
! 		merge = expand_normal (CALL_EXPR_ARG (exp, 6));
! 
! 		mask = expand_normal (CALL_EXPR_ARG (exp, 7));
! 
! 		if (CONST_INT_P (mask))
! 		  mask = fixup_modeless_constant (mask, QImode);
! 
! 		mask = force_reg (QImode, mask);
! 
! 		if (GET_MODE (mask) != QImode)
! 		  mask = gen_rtx_SUBREG (QImode, mask, 0);
! 
! 		/* If merge is 0 then we're about to emit z-masked variant.  */
! 		if (const0_operand (merge, mode))
! 		  emit_insn (fcn_maskz (target, accum, wide_reg, mem, merge, mask));
! 		/* If merge is the same as accum then emit merge-masked
! 		   variant.  */
! 		else if (CALL_EXPR_ARG (exp, 6) == CALL_EXPR_ARG (exp, 4))
! 		  {
! 		    merge = force_reg (mode, merge);
! 		    emit_insn (fcn_mask (target, wide_reg, mem, merge, mask));
! 		  }
! 		/* Merge with something unknown might happen if we z-mask
! 		   w/ -O0.  */
! 		else
! 		  {
! 		    target = gen_reg_rtx (mode);
! 		    emit_move_insn (target, merge);
! 		    emit_insn (fcn_mask (target, wide_reg, mem, target, mask));
! 		  }
! 		}
! 	      return target;
! 	    }
! 	  case IX86_BUILTIN_RDPID:
! 	    return ix86_expand_special_args_builtin (bdesc_args + i, exp,
! 						     target);
! 	  case IX86_BUILTIN_FABSQ:
! 	  case IX86_BUILTIN_COPYSIGNQ:
! 	    if (!TARGET_SSE)
! 	      /* Emit a normal call if SSE isn't available.  */
! 	      return expand_call (exp, target, ignore);
! 	    /* FALLTHRU */
! 	  default:
! 	    return ix86_expand_args_builtin (bdesc_args + i, exp, target);
! 	  }
!     }
! 
!   if (fcode >= IX86_BUILTIN__BDESC_COMI_FIRST
!       && fcode <= IX86_BUILTIN__BDESC_COMI_LAST)
!     {
!       i = fcode - IX86_BUILTIN__BDESC_COMI_FIRST;
!       return ix86_expand_sse_comi (bdesc_comi + i, exp, target);
!     }
! 
!   if (fcode >= IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST
!       && fcode <= IX86_BUILTIN__BDESC_ROUND_ARGS_LAST)
!     {
!       i = fcode - IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST;
!       return ix86_expand_round_builtin (bdesc_round_args + i, exp, target);
!     }
! 
!   if (fcode >= IX86_BUILTIN__BDESC_PCMPESTR_FIRST
!       && fcode <= IX86_BUILTIN__BDESC_PCMPESTR_LAST)
!     {
!       i = fcode - IX86_BUILTIN__BDESC_PCMPESTR_FIRST;
!       return ix86_expand_sse_pcmpestr (bdesc_pcmpestr + i, exp, target);
!     }
! 
!   if (fcode >= IX86_BUILTIN__BDESC_PCMPISTR_FIRST
!       && fcode <= IX86_BUILTIN__BDESC_PCMPISTR_LAST)
!     {
!       i = fcode - IX86_BUILTIN__BDESC_PCMPISTR_FIRST;
!       return ix86_expand_sse_pcmpistr (bdesc_pcmpistr + i, exp, target);
!     }
! 
!   if (fcode >= IX86_BUILTIN__BDESC_MULTI_ARG_FIRST
!       && fcode <= IX86_BUILTIN__BDESC_MULTI_ARG_LAST)
!     {
!       i = fcode - IX86_BUILTIN__BDESC_MULTI_ARG_FIRST;
!       const struct builtin_description *d = bdesc_multi_arg + i;
!       return ix86_expand_multi_arg_builtin (d->icode, exp, target,
! 					    (enum ix86_builtin_func_type)
! 					    d->flag, d->comparison);
!     }
! 
!   if (fcode >= IX86_BUILTIN__BDESC_CET_FIRST
!       && fcode <= IX86_BUILTIN__BDESC_CET_LAST)
!     {
!       i = fcode - IX86_BUILTIN__BDESC_CET_FIRST;
!       return ix86_expand_special_args_builtin (bdesc_cet + i, exp,
! 					       target);
!     }
! 
!   if (fcode >= IX86_BUILTIN__BDESC_CET_NORMAL_FIRST
!       && fcode <= IX86_BUILTIN__BDESC_CET_NORMAL_LAST)
!     {
!       i = fcode - IX86_BUILTIN__BDESC_CET_NORMAL_FIRST;
!       return ix86_expand_special_args_builtin (bdesc_cet_rdssp + i, exp,
! 				       target);
!     }
! 
!   gcc_unreachable ();
! }
! 
! /* This returns the target-specific builtin with code CODE if
!    current_function_decl has visibility on this builtin, which is checked
!    using isa flags.  Returns NULL_TREE otherwise.  */
! 
! static tree ix86_get_builtin (enum ix86_builtins code)
! {
!   struct cl_target_option *opts;
!   tree target_tree = NULL_TREE;
! 
!   /* Determine the isa flags of current_function_decl.  */
! 
!   if (current_function_decl)
!     target_tree = DECL_FUNCTION_SPECIFIC_TARGET (current_function_decl);
! 
!   if (target_tree == NULL)
!     target_tree = target_option_default_node;
! 
!   opts = TREE_TARGET_OPTION (target_tree);
! 
!   if ((ix86_builtins_isa[(int) code].isa & opts->x_ix86_isa_flags)
!       || (ix86_builtins_isa[(int) code].isa2 & opts->x_ix86_isa_flags2))
!     return ix86_builtin_decl (code, true);
!   else
!     return NULL_TREE;
! }
! 
! /* Returns a function decl for a vectorized version of the combined function
!    with combined_fn code FN and the result vector type TYPE, or NULL_TREE
!    if it is not available.  */
! 
! static tree
! ix86_builtin_vectorized_function (unsigned int fn, tree type_out,
! 				  tree type_in)
! {
!   machine_mode in_mode, out_mode;
!   int in_n, out_n;
! 
!   if (TREE_CODE (type_out) != VECTOR_TYPE
!       || TREE_CODE (type_in) != VECTOR_TYPE)
!     return NULL_TREE;
! 
!   out_mode = TYPE_MODE (TREE_TYPE (type_out));
!   out_n = TYPE_VECTOR_SUBPARTS (type_out);
!   in_mode = TYPE_MODE (TREE_TYPE (type_in));
!   in_n = TYPE_VECTOR_SUBPARTS (type_in);
! 
!   switch (fn)
!     {
!     CASE_CFN_EXP2:
!       if (out_mode == SFmode && in_mode == SFmode)
! 	{
! 	  if (out_n == 16 && in_n == 16)
! 	    return ix86_get_builtin (IX86_BUILTIN_EXP2PS);
! 	}
!       break;
! 
!     CASE_CFN_IFLOOR:
!     CASE_CFN_LFLOOR:
!     CASE_CFN_LLFLOOR:
!       /* The round insn does not trap on denormals.  */
!       if (flag_trapping_math || !TARGET_SSE4_1)
! 	break;
! 
!       if (out_mode == SImode && in_mode == DFmode)
! 	{
! 	  if (out_n == 4 && in_n == 2)
! 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX);
! 	  else if (out_n == 8 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX256);
! 	  else if (out_n == 16 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512);
! 	}
!       if (out_mode == SImode && in_mode == SFmode)
! 	{
! 	  if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX);
! 	  else if (out_n == 8 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX256);
! 	  else if (out_n == 16 && in_n == 16)
! 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX512);
! 	}
!       break;
! 
!     CASE_CFN_ICEIL:
!     CASE_CFN_LCEIL:
!     CASE_CFN_LLCEIL:
!       /* The round insn does not trap on denormals.  */
!       if (flag_trapping_math || !TARGET_SSE4_1)
! 	break;
! 
!       if (out_mode == SImode && in_mode == DFmode)
! 	{
! 	  if (out_n == 4 && in_n == 2)
! 	    return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX);
! 	  else if (out_n == 8 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX256);
! 	  else if (out_n == 16 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512);
! 	}
!       if (out_mode == SImode && in_mode == SFmode)
! 	{
! 	  if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX);
! 	  else if (out_n == 8 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX256);
! 	  else if (out_n == 16 && in_n == 16)
! 	    return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX512);
! 	}
!       break;
! 
!     CASE_CFN_IRINT:
!     CASE_CFN_LRINT:
!     CASE_CFN_LLRINT:
!       if (out_mode == SImode && in_mode == DFmode)
! 	{
! 	  if (out_n == 4 && in_n == 2)
! 	    return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX);
! 	  else if (out_n == 8 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX256);
! 	  else if (out_n == 16 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX512);
! 	}
!       if (out_mode == SImode && in_mode == SFmode)
! 	{
! 	  if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ);
! 	  else if (out_n == 8 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ256);
! 	  else if (out_n == 16 && in_n == 16)
! 	    return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ512);
! 	}
!       break;
! 
!     CASE_CFN_IROUND:
!     CASE_CFN_LROUND:
!     CASE_CFN_LLROUND:
!       /* The round insn does not trap on denormals.  */
!       if (flag_trapping_math || !TARGET_SSE4_1)
! 	break;
! 
!       if (out_mode == SImode && in_mode == DFmode)
! 	{
! 	  if (out_n == 4 && in_n == 2)
! 	    return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX);
! 	  else if (out_n == 8 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX256);
! 	  else if (out_n == 16 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512);
! 	}
!       if (out_mode == SImode && in_mode == SFmode)
! 	{
! 	  if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX);
! 	  else if (out_n == 8 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX256);
! 	  else if (out_n == 16 && in_n == 16)
! 	    return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX512);
! 	}
!       break;
! 
!     CASE_CFN_FLOOR:
!       /* The round insn does not trap on denormals.  */
!       if (flag_trapping_math || !TARGET_SSE4_1)
! 	break;
! 
!       if (out_mode == DFmode && in_mode == DFmode)
! 	{
! 	  if (out_n == 2 && in_n == 2)
! 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPD);
! 	  else if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPD256);
! 	  else if (out_n == 8 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPD512);
! 	}
!       if (out_mode == SFmode && in_mode == SFmode)
! 	{
! 	  if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPS);
! 	  else if (out_n == 8 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPS256);
! 	  else if (out_n == 16 && in_n == 16)
! 	    return ix86_get_builtin (IX86_BUILTIN_FLOORPS512);
! 	}
!       break;
! 
!     CASE_CFN_CEIL:
!       /* The round insn does not trap on denormals.  */
!       if (flag_trapping_math || !TARGET_SSE4_1)
! 	break;
! 
!       if (out_mode == DFmode && in_mode == DFmode)
! 	{
! 	  if (out_n == 2 && in_n == 2)
! 	    return ix86_get_builtin (IX86_BUILTIN_CEILPD);
! 	  else if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_CEILPD256);
! 	  else if (out_n == 8 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_CEILPD512);
! 	}
!       if (out_mode == SFmode && in_mode == SFmode)
! 	{
! 	  if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_CEILPS);
! 	  else if (out_n == 8 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_CEILPS256);
! 	  else if (out_n == 16 && in_n == 16)
! 	    return ix86_get_builtin (IX86_BUILTIN_CEILPS512);
! 	}
!       break;
! 
!     CASE_CFN_TRUNC:
!       /* The round insn does not trap on denormals.  */
!       if (flag_trapping_math || !TARGET_SSE4_1)
! 	break;
! 
!       if (out_mode == DFmode && in_mode == DFmode)
! 	{
! 	  if (out_n == 2 && in_n == 2)
! 	    return ix86_get_builtin (IX86_BUILTIN_TRUNCPD);
! 	  else if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_TRUNCPD256);
! 	  else if (out_n == 8 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_TRUNCPD512);
! 	}
!       if (out_mode == SFmode && in_mode == SFmode)
! 	{
! 	  if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_TRUNCPS);
! 	  else if (out_n == 8 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_TRUNCPS256);
! 	  else if (out_n == 16 && in_n == 16)
! 	    return ix86_get_builtin (IX86_BUILTIN_TRUNCPS512);
! 	}
!       break;
! 
!     CASE_CFN_RINT:
!       /* The round insn does not trap on denormals.  */
!       if (flag_trapping_math || !TARGET_SSE4_1)
! 	break;
! 
!       if (out_mode == DFmode && in_mode == DFmode)
! 	{
! 	  if (out_n == 2 && in_n == 2)
! 	    return ix86_get_builtin (IX86_BUILTIN_RINTPD);
! 	  else if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_RINTPD256);
! 	}
!       if (out_mode == SFmode && in_mode == SFmode)
! 	{
! 	  if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_RINTPS);
! 	  else if (out_n == 8 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_RINTPS256);
! 	}
!       break;
! 
!     CASE_CFN_FMA:
!       if (out_mode == DFmode && in_mode == DFmode)
! 	{
! 	  if (out_n == 2 && in_n == 2)
! 	    return ix86_get_builtin (IX86_BUILTIN_VFMADDPD);
! 	  if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_VFMADDPD256);
! 	}
!       if (out_mode == SFmode && in_mode == SFmode)
  	{
! 	  if (out_n == 4 && in_n == 4)
! 	    return ix86_get_builtin (IX86_BUILTIN_VFMADDPS);
! 	  if (out_n == 8 && in_n == 8)
! 	    return ix86_get_builtin (IX86_BUILTIN_VFMADDPS256);
  	}
        break;
  
      default:
        break;
      }
  
!   /* Dispatch to a handler for a vectorization library.  */
!   if (ix86_veclib_handler)
!     return ix86_veclib_handler (combined_fn (fn), type_out, type_in);
! 
!   return NULL_TREE;
  }
  
  /* Handler for an SVML-style interface to
     a library with vectorized intrinsics.  */
  
! static tree
  ix86_veclibabi_svml (combined_fn fn, tree type_out, tree type_in)
  {
    char name[20];
--- 17930,17972 ----
  	}
        break;
  
!     case IX86_BUILTIN_SHUFPD:
!       arg2 = gimple_call_arg (stmt, 2);
!       if (TREE_CODE (arg2) == INTEGER_CST)
  	{
! 	  location_t loc = gimple_location (stmt);
! 	  unsigned HOST_WIDE_INT imask = TREE_INT_CST_LOW (arg2);
! 	  arg0 = gimple_call_arg (stmt, 0);
! 	  arg1 = gimple_call_arg (stmt, 1);
! 	  tree itype = long_long_integer_type_node;
! 	  tree vtype = build_vector_type (itype, 2); /* V2DI */
! 	  tree_vector_builder elts (vtype, 2, 1);
! 	  /* Ignore bits other than the lowest 2.  */
! 	  elts.quick_push (build_int_cst (itype, imask & 1));
! 	  imask >>= 1;
! 	  elts.quick_push (build_int_cst (itype, 2 + (imask & 1)));
! 	  tree omask = elts.build ();
! 	  gimple *g = gimple_build_assign (gimple_call_lhs (stmt),
! 					   VEC_PERM_EXPR,
! 					   arg0, arg1, omask);
! 	  gimple_set_location (g, loc);
! 	  gsi_replace (gsi, g, false);
! 	  return true;
  	}
+       // Do not error yet, the constant could be propagated later?
        break;
  
      default:
        break;
      }
  
!   return false;
  }
  
  /* Handler for an SVML-style interface to
     a library with vectorized intrinsics.  */
  
! tree
  ix86_veclibabi_svml (combined_fn fn, tree type_out, tree type_in)
  {
    char name[20];
*************** ix86_veclibabi_svml (combined_fn fn, tre
*** 39112,39118 ****
  /* Handler for an ACML-style interface to
     a library with vectorized intrinsics.  */
  
! static tree
  ix86_veclibabi_acml (combined_fn fn, tree type_out, tree type_in)
  {
    char name[20] = "__vr.._";
--- 18058,18064 ----
  /* Handler for an ACML-style interface to
     a library with vectorized intrinsics.  */
  
! tree
  ix86_veclibabi_acml (combined_fn fn, tree type_out, tree type_in)
  {
    char name[20] = "__vr.._";
*************** ix86_veclibabi_acml (combined_fn fn, tre
*** 39187,39307 ****
    return new_fndecl;
  }
  
- /* Returns a decl of a function that implements gather load with
-    memory type MEM_VECTYPE and index type INDEX_VECTYPE and SCALE.
-    Return NULL_TREE if it is not available.  */
- 
- static tree
- ix86_vectorize_builtin_gather (const_tree mem_vectype,
- 			       const_tree index_type, int scale)
- {
-   bool si;
-   enum ix86_builtins code;
- 
-   if (! TARGET_AVX2 || !TARGET_USE_GATHER)
-     return NULL_TREE;
- 
-   if ((TREE_CODE (index_type) != INTEGER_TYPE
-        && !POINTER_TYPE_P (index_type))
-       || (TYPE_MODE (index_type) != SImode
- 	  && TYPE_MODE (index_type) != DImode))
-     return NULL_TREE;
- 
-   if (TYPE_PRECISION (index_type) > POINTER_SIZE)
-     return NULL_TREE;
- 
-   /* v*gather* insn sign extends index to pointer mode.  */
-   if (TYPE_PRECISION (index_type) < POINTER_SIZE
-       && TYPE_UNSIGNED (index_type))
-     return NULL_TREE;
- 
-   if (scale <= 0
-       || scale > 8
-       || (scale & (scale - 1)) != 0)
-     return NULL_TREE;
- 
-   si = TYPE_MODE (index_type) == SImode;
-   switch (TYPE_MODE (mem_vectype))
-     {
-     case E_V2DFmode:
-       if (TARGET_AVX512VL)
- 	code = si ? IX86_BUILTIN_GATHER3SIV2DF : IX86_BUILTIN_GATHER3DIV2DF;
-       else
- 	code = si ? IX86_BUILTIN_GATHERSIV2DF : IX86_BUILTIN_GATHERDIV2DF;
-       break;
-     case E_V4DFmode:
-       if (TARGET_AVX512VL)
- 	code = si ? IX86_BUILTIN_GATHER3ALTSIV4DF : IX86_BUILTIN_GATHER3DIV4DF;
-       else
- 	code = si ? IX86_BUILTIN_GATHERALTSIV4DF : IX86_BUILTIN_GATHERDIV4DF;
-       break;
-     case E_V2DImode:
-       if (TARGET_AVX512VL)
- 	code = si ? IX86_BUILTIN_GATHER3SIV2DI : IX86_BUILTIN_GATHER3DIV2DI;
-       else
- 	code = si ? IX86_BUILTIN_GATHERSIV2DI : IX86_BUILTIN_GATHERDIV2DI;
-       break;
-     case E_V4DImode:
-       if (TARGET_AVX512VL)
- 	code = si ? IX86_BUILTIN_GATHER3ALTSIV4DI : IX86_BUILTIN_GATHER3DIV4DI;
-       else
- 	code = si ? IX86_BUILTIN_GATHERALTSIV4DI : IX86_BUILTIN_GATHERDIV4DI;
-       break;
-     case E_V4SFmode:
-       if (TARGET_AVX512VL)
- 	code = si ? IX86_BUILTIN_GATHER3SIV4SF : IX86_BUILTIN_GATHER3DIV4SF;
-       else
- 	code = si ? IX86_BUILTIN_GATHERSIV4SF : IX86_BUILTIN_GATHERDIV4SF;
-       break;
-     case E_V8SFmode:
-       if (TARGET_AVX512VL)
- 	code = si ? IX86_BUILTIN_GATHER3SIV8SF : IX86_BUILTIN_GATHER3ALTDIV8SF;
-       else
- 	code = si ? IX86_BUILTIN_GATHERSIV8SF : IX86_BUILTIN_GATHERALTDIV8SF;
-       break;
-     case E_V4SImode:
-       if (TARGET_AVX512VL)
- 	code = si ? IX86_BUILTIN_GATHER3SIV4SI : IX86_BUILTIN_GATHER3DIV4SI;
-       else
- 	code = si ? IX86_BUILTIN_GATHERSIV4SI : IX86_BUILTIN_GATHERDIV4SI;
-       break;
-     case E_V8SImode:
-       if (TARGET_AVX512VL)
- 	code = si ? IX86_BUILTIN_GATHER3SIV8SI : IX86_BUILTIN_GATHER3ALTDIV8SI;
-       else
- 	code = si ? IX86_BUILTIN_GATHERSIV8SI : IX86_BUILTIN_GATHERALTDIV8SI;
-       break;
-     case E_V8DFmode:
-       if (TARGET_AVX512F)
- 	code = si ? IX86_BUILTIN_GATHER3ALTSIV8DF : IX86_BUILTIN_GATHER3DIV8DF;
-       else
- 	return NULL_TREE;
-       break;
-     case E_V8DImode:
-       if (TARGET_AVX512F)
- 	code = si ? IX86_BUILTIN_GATHER3ALTSIV8DI : IX86_BUILTIN_GATHER3DIV8DI;
-       else
- 	return NULL_TREE;
-       break;
-     case E_V16SFmode:
-       if (TARGET_AVX512F)
- 	code = si ? IX86_BUILTIN_GATHER3SIV16SF : IX86_BUILTIN_GATHER3ALTDIV16SF;
-       else
- 	return NULL_TREE;
-       break;
-     case E_V16SImode:
-       if (TARGET_AVX512F)
- 	code = si ? IX86_BUILTIN_GATHER3SIV16SI : IX86_BUILTIN_GATHER3ALTDIV16SI;
-       else
- 	return NULL_TREE;
-       break;
-     default:
-       return NULL_TREE;
-     }
- 
-   return ix86_get_builtin (code);
- }
- 
  /* Returns a decl of a function that implements scatter store with
     register type VECTYPE and index type INDEX_TYPE and SCALE.
     Return NULL_TREE if it is not available.  */
--- 18133,18138 ----
*************** ix86_vectorize_builtin_scatter (const_tr
*** 39403,39409 ****
        return NULL_TREE;
      }
  
!   return ix86_builtins[code];
  }
  
  /* Return true if it is safe to use the rsqrt optabs to optimize
--- 18234,18240 ----
        return NULL_TREE;
      }
  
!   return get_ix86_builtin (code);
  }
  
  /* Return true if it is safe to use the rsqrt optabs to optimize
*************** use_rsqrt_p ()
*** 39417,39442 ****
  	  && !flag_trapping_math
  	  && flag_unsafe_math_optimizations);
  }
- 
- /* Returns a code for a target-specific builtin that implements
-    reciprocal of the function, or NULL_TREE if not available.  */
- 
- static tree
- ix86_builtin_reciprocal (tree fndecl)
- {
-   switch (DECL_FUNCTION_CODE (fndecl))
-     {
-       /* Vectorized version of sqrt to rsqrt conversion.  */
-     case IX86_BUILTIN_SQRTPS_NR:
-       return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR);
- 
-     case IX86_BUILTIN_SQRTPS_NR256:
-       return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR256);
- 
-     default:
-       return NULL_TREE;
-     }
- }
  
  /* Helper for avx_vpermilps256_operand et al.  This is also used by
     the expansion functions to turn the parallel back into a mask.
--- 18248,18253 ----
*************** ix86_preferred_reload_class (rtx x, reg_
*** 39699,39710 ****
  static reg_class_t
  ix86_preferred_output_reload_class (rtx x, reg_class_t regclass)
  {
-   machine_mode mode = GET_MODE (x);
- 
    /* Restrict the output reload class to the register bank that we are doing
       math on.  If we would like not to return a subset of CLASS, reject this
       alternative: if reload cannot do this, it will still use its choice.  */
!   mode = GET_MODE (x);
    if (SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH)
      return MAYBE_SSE_CLASS_P (regclass) ? ALL_SSE_REGS : NO_REGS;
  
--- 18510,18519 ----
  static reg_class_t
  ix86_preferred_output_reload_class (rtx x, reg_class_t regclass)
  {
    /* Restrict the output reload class to the register bank that we are doing
       math on.  If we would like not to return a subset of CLASS, reject this
       alternative: if reload cannot do this, it will still use its choice.  */
!   machine_mode mode = GET_MODE (x);
    if (SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH)
      return MAYBE_SSE_CLASS_P (regclass) ? ALL_SSE_REGS : NO_REGS;
  
*************** inline_secondary_memory_needed (machine_
*** 39857,39888 ****
    if (FLOAT_CLASS_P (class1) != FLOAT_CLASS_P (class2))
      return true;
  
-   /* Between mask and general, we have moves no larger than word size.  */
-   if ((MASK_CLASS_P (class1) != MASK_CLASS_P (class2))
-       && (GET_MODE_SIZE (mode) > UNITS_PER_WORD))
-   return true;
- 
    /* ??? This is a lie.  We do have moves between mmx/general, and for
       mmx/sse2.  But by saying we need secondary memory we discourage the
       register allocator from using the mmx registers unless needed.  */
    if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2))
      return true;
  
    if (SSE_CLASS_P (class1) != SSE_CLASS_P (class2))
      {
        /* SSE1 doesn't have any direct moves from other classes.  */
        if (!TARGET_SSE2)
  	return true;
  
        /* If the target says that inter-unit moves are more expensive
  	 than moving through memory, then don't generate them.  */
        if ((SSE_CLASS_P (class1) && !TARGET_INTER_UNIT_MOVES_FROM_VEC)
  	  || (SSE_CLASS_P (class2) && !TARGET_INTER_UNIT_MOVES_TO_VEC))
  	return true;
- 
-       /* Between SSE and general, we have moves no larger than word size.  */
-       if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)
- 	return true;
      }
  
    return false;
--- 18666,18702 ----
    if (FLOAT_CLASS_P (class1) != FLOAT_CLASS_P (class2))
      return true;
  
    /* ??? This is a lie.  We do have moves between mmx/general, and for
       mmx/sse2.  But by saying we need secondary memory we discourage the
       register allocator from using the mmx registers unless needed.  */
    if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2))
      return true;
  
+   /* Between mask and general, we have moves no larger than word size.  */
+   if (MASK_CLASS_P (class1) != MASK_CLASS_P (class2))
+     {
+       if (!(INTEGER_CLASS_P (class1) || INTEGER_CLASS_P (class2))
+ 	  || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
+ 	return true;
+     }
+ 
    if (SSE_CLASS_P (class1) != SSE_CLASS_P (class2))
      {
        /* SSE1 doesn't have any direct moves from other classes.  */
        if (!TARGET_SSE2)
  	return true;
  
+       /* Between SSE and general, we have moves no larger than word size.  */
+       if (!(INTEGER_CLASS_P (class1) || INTEGER_CLASS_P (class2))
+ 	  || GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode)
+ 	  || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
+ 	return true;
+ 
        /* If the target says that inter-unit moves are more expensive
  	 than moving through memory, then don't generate them.  */
        if ((SSE_CLASS_P (class1) && !TARGET_INTER_UNIT_MOVES_FROM_VEC)
  	  || (SSE_CLASS_P (class2) && !TARGET_INTER_UNIT_MOVES_TO_VEC))
  	return true;
      }
  
    return false;
*************** inline_memory_move_cost (machine_mode mo
*** 40023,40030 ****
  	    return 100;
  	}
        if (in == 2)
!         return MAX (ix86_cost->fp_load [index], ix86_cost->fp_store [index]);
!       return in ? ix86_cost->fp_load [index] : ix86_cost->fp_store [index];
      }
    if (SSE_CLASS_P (regclass))
      {
--- 18837,18846 ----
  	    return 100;
  	}
        if (in == 2)
!         return MAX (ix86_cost->hard_register.fp_load [index],
! 		    ix86_cost->hard_register.fp_store [index]);
!       return in ? ix86_cost->hard_register.fp_load [index]
! 		: ix86_cost->hard_register.fp_store [index];
      }
    if (SSE_CLASS_P (regclass))
      {
*************** inline_memory_move_cost (machine_mode mo
*** 40032,40039 ****
        if (index == -1)
  	return 100;
        if (in == 2)
!         return MAX (ix86_cost->sse_load [index], ix86_cost->sse_store [index]);
!       return in ? ix86_cost->sse_load [index] : ix86_cost->sse_store [index];
      }
    if (MMX_CLASS_P (regclass))
      {
--- 18848,18857 ----
        if (index == -1)
  	return 100;
        if (in == 2)
!         return MAX (ix86_cost->hard_register.sse_load [index],
! 		    ix86_cost->hard_register.sse_store [index]);
!       return in ? ix86_cost->hard_register.sse_load [index]
! 		: ix86_cost->hard_register.sse_store [index];
      }
    if (MMX_CLASS_P (regclass))
      {
*************** inline_memory_move_cost (machine_mode mo
*** 40050,40057 ****
  	    return 100;
  	}
        if (in == 2)
!         return MAX (ix86_cost->mmx_load [index], ix86_cost->mmx_store [index]);
!       return in ? ix86_cost->mmx_load [index] : ix86_cost->mmx_store [index];
      }
    switch (GET_MODE_SIZE (mode))
      {
--- 18868,18877 ----
  	    return 100;
  	}
        if (in == 2)
!         return MAX (ix86_cost->hard_register.mmx_load [index],
! 		    ix86_cost->hard_register.mmx_store [index]);
!       return in ? ix86_cost->hard_register.mmx_load [index]
! 		: ix86_cost->hard_register.mmx_store [index];
      }
    switch (GET_MODE_SIZE (mode))
      {
*************** inline_memory_move_cost (machine_mode mo
*** 40059,40095 ****
  	if (Q_CLASS_P (regclass) || TARGET_64BIT)
  	  {
  	    if (!in)
! 	      return ix86_cost->int_store[0];
  	    if (TARGET_PARTIAL_REG_DEPENDENCY
  	        && optimize_function_for_speed_p (cfun))
! 	      cost = ix86_cost->movzbl_load;
  	    else
! 	      cost = ix86_cost->int_load[0];
  	    if (in == 2)
! 	      return MAX (cost, ix86_cost->int_store[0]);
  	    return cost;
  	  }
  	else
  	  {
  	   if (in == 2)
! 	     return MAX (ix86_cost->movzbl_load, ix86_cost->int_store[0] + 4);
  	   if (in)
! 	     return ix86_cost->movzbl_load;
  	   else
! 	     return ix86_cost->int_store[0] + 4;
  	  }
  	break;
        case 2:
  	if (in == 2)
! 	  return MAX (ix86_cost->int_load[1], ix86_cost->int_store[1]);
! 	return in ? ix86_cost->int_load[1] : ix86_cost->int_store[1];
        default:
  	if (in == 2)
! 	  cost = MAX (ix86_cost->int_load[2], ix86_cost->int_store[2]);
  	else if (in)
! 	  cost = ix86_cost->int_load[2];
  	else
! 	  cost = ix86_cost->int_store[2];
  	/* Multiply with the number of GPR moves needed.  */
  	return cost * CEIL ((int) GET_MODE_SIZE (mode), UNITS_PER_WORD);
      }
--- 18879,18919 ----
  	if (Q_CLASS_P (regclass) || TARGET_64BIT)
  	  {
  	    if (!in)
! 	      return ix86_cost->hard_register.int_store[0];
  	    if (TARGET_PARTIAL_REG_DEPENDENCY
  	        && optimize_function_for_speed_p (cfun))
! 	      cost = ix86_cost->hard_register.movzbl_load;
  	    else
! 	      cost = ix86_cost->hard_register.int_load[0];
  	    if (in == 2)
! 	      return MAX (cost, ix86_cost->hard_register.int_store[0]);
  	    return cost;
  	  }
  	else
  	  {
  	   if (in == 2)
! 	     return MAX (ix86_cost->hard_register.movzbl_load,
! 			 ix86_cost->hard_register.int_store[0] + 4);
  	   if (in)
! 	     return ix86_cost->hard_register.movzbl_load;
  	   else
! 	     return ix86_cost->hard_register.int_store[0] + 4;
  	  }
  	break;
        case 2:
  	if (in == 2)
! 	  return MAX (ix86_cost->hard_register.int_load[1],
! 		      ix86_cost->hard_register.int_store[1]);
! 	return in ? ix86_cost->hard_register.int_load[1]
! 		  : ix86_cost->hard_register.int_store[1];
        default:
  	if (in == 2)
! 	  cost = MAX (ix86_cost->hard_register.int_load[2],
! 		      ix86_cost->hard_register.int_store[2]);
  	else if (in)
! 	  cost = ix86_cost->hard_register.int_load[2];
  	else
! 	  cost = ix86_cost->hard_register.int_store[2];
  	/* Multiply with the number of GPR moves needed.  */
  	return cost * CEIL ((int) GET_MODE_SIZE (mode), UNITS_PER_WORD);
      }
*************** ix86_register_move_cost (machine_mode mo
*** 40145,40175 ****
        return cost;
      }
  
!   /* Moves between SSE/MMX and integer unit are expensive.  */
!   if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2)
!       || SSE_CLASS_P (class1) != SSE_CLASS_P (class2))
  
!     /* ??? By keeping returned value relatively high, we limit the number
!        of moves between integer and MMX/SSE registers for all targets.
!        Additionally, high value prevents problem with x86_modes_tieable_p(),
!        where integer modes in MMX/SSE registers are not tieable
!        because of missing QImode and HImode moves to, from or between
!        MMX/SSE registers.  */
!     return MAX (8, MMX_CLASS_P (class1) || MMX_CLASS_P (class2)
! 		? ix86_cost->mmxsse_to_integer : ix86_cost->ssemmx_to_integer);
  
    if (MAYBE_FLOAT_CLASS_P (class1))
!     return ix86_cost->fp_move;
    if (MAYBE_SSE_CLASS_P (class1))
      {
        if (GET_MODE_BITSIZE (mode) <= 128)
! 	return ix86_cost->xmm_move;
        if (GET_MODE_BITSIZE (mode) <= 256)
! 	return ix86_cost->ymm_move;
!       return ix86_cost->zmm_move;
      }
    if (MAYBE_MMX_CLASS_P (class1))
!     return ix86_cost->mmx_move;
    return 2;
  }
  
--- 18969,18995 ----
        return cost;
      }
  
!   /* Moves between MMX and non-MMX units require secondary memory.  */
!   if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2))
!     gcc_unreachable ();
  
!   if (SSE_CLASS_P (class1) != SSE_CLASS_P (class2))
!     return (SSE_CLASS_P (class1)
! 	    ? ix86_cost->hard_register.sse_to_integer
! 	    : ix86_cost->hard_register.integer_to_sse);
  
    if (MAYBE_FLOAT_CLASS_P (class1))
!     return ix86_cost->hard_register.fp_move;
    if (MAYBE_SSE_CLASS_P (class1))
      {
        if (GET_MODE_BITSIZE (mode) <= 128)
! 	return ix86_cost->hard_register.xmm_move;
        if (GET_MODE_BITSIZE (mode) <= 256)
! 	return ix86_cost->hard_register.ymm_move;
!       return ix86_cost->hard_register.zmm_move;
      }
    if (MAYBE_MMX_CLASS_P (class1))
!     return ix86_cost->hard_register.mmx_move;
    return 2;
  }
  
*************** ix86_hard_regno_nregs (unsigned int regn
*** 40194,40204 ****
--- 19014,19036 ----
      }
    if (COMPLEX_MODE_P (mode))
      return 2;
+   /* Register pair for mask registers.  */
+   if (mode == P2QImode || mode == P2HImode)
+     return 2;
    if (mode == V64SFmode || mode == V64SImode)
      return 4;
    return 1;
  }
  
+ /* Implement REGMODE_NATURAL_SIZE(MODE).  */
+ unsigned int
+ ix86_regmode_natural_size (machine_mode mode)
+ {
+   if (mode == P2HImode || mode == P2QImode)
+     return GET_MODE_SIZE (mode) / 2;
+   return UNITS_PER_WORD;
+ }
+ 
  /* Implement TARGET_HARD_REGNO_MODE_OK.  */
  
  static bool
*************** ix86_hard_regno_mode_ok (unsigned int re
*** 40208,40222 ****
    if (CC_REGNO_P (regno))
      return GET_MODE_CLASS (mode) == MODE_CC;
    if (GET_MODE_CLASS (mode) == MODE_CC
!       || GET_MODE_CLASS (mode) == MODE_RANDOM
!       || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
      return false;
    if (STACK_REGNO_P (regno))
      return VALID_FP_MODE_P (mode);
    if (MASK_REGNO_P (regno))
!     return (VALID_MASK_REG_MODE (mode)
! 	    || (TARGET_AVX512BW
! 		&& VALID_MASK_AVX512BW_MODE (mode)));
    if (SSE_REGNO_P (regno))
      {
        /* We implement the move patterns for all vector modes into and
--- 19040,19063 ----
    if (CC_REGNO_P (regno))
      return GET_MODE_CLASS (mode) == MODE_CC;
    if (GET_MODE_CLASS (mode) == MODE_CC
!       || GET_MODE_CLASS (mode) == MODE_RANDOM)
      return false;
    if (STACK_REGNO_P (regno))
      return VALID_FP_MODE_P (mode);
    if (MASK_REGNO_P (regno))
!     {
!       /* Register pair only starts at even register number.  */
!       if ((mode == P2QImode || mode == P2HImode))
! 	return MASK_PAIR_REGNO_P(regno);
! 
!       return (VALID_MASK_REG_MODE (mode)
! 	      || (TARGET_AVX512BW
! 		  && VALID_MASK_AVX512BW_MODE (mode)));
!     }
! 
!   if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
!     return false;
! 
    if (SSE_REGNO_P (regno))
      {
        /* We implement the move patterns for all vector modes into and
*************** ix86_hard_regno_mode_ok (unsigned int re
*** 40308,40315 ****
     the low 16 bytes are saved.  */
  
  static bool
! ix86_hard_regno_call_part_clobbered (rtx_insn *insn ATTRIBUTE_UNUSED,
! 				     unsigned int regno, machine_mode mode)
  {
    return SSE_REGNO_P (regno) && GET_MODE_SIZE (mode) > 16;
  }
--- 19149,19156 ----
     the low 16 bytes are saved.  */
  
  static bool
! ix86_hard_regno_call_part_clobbered (unsigned int, unsigned int regno,
! 				     machine_mode mode)
  {
    return SSE_REGNO_P (regno) && GET_MODE_SIZE (mode) > 16;
  }
*************** ix86_set_reg_reg_cost (machine_mode mode
*** 40427,40433 ****
  	  || (TARGET_AVX && VALID_AVX256_REG_MODE (mode))
  	  || (TARGET_SSE2 && VALID_SSE2_REG_MODE (mode))
  	  || (TARGET_SSE && VALID_SSE_REG_MODE (mode))
! 	  || (TARGET_MMX && VALID_MMX_REG_MODE (mode)))
  	units = GET_MODE_SIZE (mode);
      }
  
--- 19268,19275 ----
  	  || (TARGET_AVX && VALID_AVX256_REG_MODE (mode))
  	  || (TARGET_SSE2 && VALID_SSE2_REG_MODE (mode))
  	  || (TARGET_SSE && VALID_SSE_REG_MODE (mode))
! 	  || ((TARGET_MMX || TARGET_MMX_WITH_SSE)
! 	      && VALID_MMX_REG_MODE (mode)))
  	units = GET_MODE_SIZE (mode);
      }
  
*************** ix86_vec_cost (machine_mode mode, int co
*** 40449,40455 ****
        && TARGET_SSE_SPLIT_REGS)
      return cost * 2;
    if (GET_MODE_BITSIZE (mode) > 128
!       && TARGET_AVX128_OPTIMAL)
      return cost * GET_MODE_BITSIZE (mode) / 128;
    return cost;
  }
--- 19291,19297 ----
        && TARGET_SSE_SPLIT_REGS)
      return cost * 2;
    if (GET_MODE_BITSIZE (mode) > 128
!       && TARGET_AVX256_SPLIT_REGS)
      return cost * GET_MODE_BITSIZE (mode) / 128;
    return cost;
  }
*************** ix86_division_cost (const struct process
*** 40527,40532 ****
--- 19369,19376 ----
      return cost->divide[MODE_INDEX (mode)];
  }
  
+ #define COSTS_N_BYTES(N) ((N) * 2)
+ 
  /* Return cost of shift in MODE.
     If CONSTANT_OP1 is true, the op1 value is known and set in OP1_VAL.
     AND_IN_OP1 specify in op1 is result of and and SHIFT_AND_TRUNCATE
*************** ix86_rtx_costs (rtx x, machine_mode mode
*** 40622,40628 ****
    rtx mask;
    enum rtx_code code = GET_CODE (x);
    enum rtx_code outer_code = (enum rtx_code) outer_code_i;
!   const struct processor_costs *cost = speed ? ix86_cost : &ix86_size_cost;
    int src_cost;
  
    switch (code)
--- 19466,19473 ----
    rtx mask;
    enum rtx_code code = GET_CODE (x);
    enum rtx_code outer_code = (enum rtx_code) outer_code_i;
!   const struct processor_costs *cost
!     = speed ? ix86_tune_cost : &ix86_size_cost;
    int src_cost;
  
    switch (code)
*************** ix86_rtx_costs (rtx x, machine_mode mode
*** 40988,40993 ****
--- 19833,19847 ----
  	  return true;
  	}
  
+       if (GET_CODE (XEXP (x, 0)) == PLUS
+ 	  && rtx_equal_p (XEXP (XEXP (x, 0), 0), XEXP (x, 1)))
+ 	{
+ 	  /* This is an overflow detection, count it as a normal compare.  */
+ 	  *total = rtx_cost (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
+ 			     COMPARE, 0, speed);
+ 	  return true;
+ 	}
+ 
        /* The embedded comparison operand is completely free.  */
        if (!general_operand (XEXP (x, 0), GET_MODE (XEXP (x, 0)))
  	  && XEXP (x, 1) == const0_rtx)
*************** x86_order_regs_for_local_alloc (void)
*** 41162,41173 ****
  
     /* First allocate the local general purpose registers.  */
     for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
!      if (GENERAL_REGNO_P (i) && call_used_regs[i])
  	reg_alloc_order [pos++] = i;
  
     /* Global general purpose registers.  */
     for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
!      if (GENERAL_REGNO_P (i) && !call_used_regs[i])
  	reg_alloc_order [pos++] = i;
  
     /* x87 registers come first in case we are doing FP math
--- 20016,20027 ----
  
     /* First allocate the local general purpose registers.  */
     for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
!      if (GENERAL_REGNO_P (i) && call_used_or_fixed_reg_p (i))
  	reg_alloc_order [pos++] = i;
  
     /* Global general purpose registers.  */
     for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
!      if (GENERAL_REGNO_P (i) && !call_used_or_fixed_reg_p (i))
  	reg_alloc_order [pos++] = i;
  
     /* x87 registers come first in case we are doing FP math
*************** x86_order_regs_for_local_alloc (void)
*** 41204,41441 ****
       reg_alloc_order [pos++] = 0;
  }
  
- /* Handle a "callee_pop_aggregate_return" attribute; arguments as
-    in struct attribute_spec handler.  */
- static tree
- ix86_handle_callee_pop_aggregate_return (tree *node, tree name, tree args, int,
- 					 bool *no_add_attrs)
- {
-   if (TREE_CODE (*node) != FUNCTION_TYPE
-       && TREE_CODE (*node) != METHOD_TYPE
-       && TREE_CODE (*node) != FIELD_DECL
-       && TREE_CODE (*node) != TYPE_DECL)
-     {
-       warning (OPT_Wattributes, "%qE attribute only applies to functions",
- 	       name);
-       *no_add_attrs = true;
-       return NULL_TREE;
-     }
-   if (TARGET_64BIT)
-     {
-       warning (OPT_Wattributes, "%qE attribute only available for 32-bit",
- 	       name);
-       *no_add_attrs = true;
-       return NULL_TREE;
-     }
-   if (is_attribute_p ("callee_pop_aggregate_return", name))
-     {
-       tree cst;
- 
-       cst = TREE_VALUE (args);
-       if (TREE_CODE (cst) != INTEGER_CST)
- 	{
- 	  warning (OPT_Wattributes,
- 		   "%qE attribute requires an integer constant argument",
- 		   name);
- 	  *no_add_attrs = true;
- 	}
-       else if (compare_tree_int (cst, 0) != 0
- 	       && compare_tree_int (cst, 1) != 0)
- 	{
- 	  warning (OPT_Wattributes,
- 		   "argument to %qE attribute is neither zero, nor one",
- 		   name);
- 	  *no_add_attrs = true;
- 	}
- 
-       return NULL_TREE;
-     }
- 
-   return NULL_TREE;
- }
- 
- /* Handle a "ms_abi" or "sysv" attribute; arguments as in
-    struct attribute_spec.handler.  */
- static tree
- ix86_handle_abi_attribute (tree *node, tree name, tree, int,
- 			   bool *no_add_attrs)
- {
-   if (TREE_CODE (*node) != FUNCTION_TYPE
-       && TREE_CODE (*node) != METHOD_TYPE
-       && TREE_CODE (*node) != FIELD_DECL
-       && TREE_CODE (*node) != TYPE_DECL)
-     {
-       warning (OPT_Wattributes, "%qE attribute only applies to functions",
- 	       name);
-       *no_add_attrs = true;
-       return NULL_TREE;
-     }
- 
-   /* Can combine regparm with all attributes but fastcall.  */
-   if (is_attribute_p ("ms_abi", name))
-     {
-       if (lookup_attribute ("sysv_abi", TYPE_ATTRIBUTES (*node)))
-         {
- 	  error ("ms_abi and sysv_abi attributes are not compatible");
- 	}
- 
-       return NULL_TREE;
-     }
-   else if (is_attribute_p ("sysv_abi", name))
-     {
-       if (lookup_attribute ("ms_abi", TYPE_ATTRIBUTES (*node)))
-         {
- 	  error ("ms_abi and sysv_abi attributes are not compatible");
- 	}
- 
-       return NULL_TREE;
-     }
- 
-   return NULL_TREE;
- }
- 
- /* Handle a "ms_struct" or "gcc_struct" attribute; arguments as in
-    struct attribute_spec.handler.  */
- static tree
- ix86_handle_struct_attribute (tree *node, tree name, tree, int,
- 			      bool *no_add_attrs)
- {
-   tree *type = NULL;
-   if (DECL_P (*node))
-     {
-       if (TREE_CODE (*node) == TYPE_DECL)
- 	type = &TREE_TYPE (*node);
-     }
-   else
-     type = node;
- 
-   if (!(type && RECORD_OR_UNION_TYPE_P (*type)))
-     {
-       warning (OPT_Wattributes, "%qE attribute ignored",
- 	       name);
-       *no_add_attrs = true;
-     }
- 
-   else if ((is_attribute_p ("ms_struct", name)
- 	    && lookup_attribute ("gcc_struct", TYPE_ATTRIBUTES (*type)))
- 	   || ((is_attribute_p ("gcc_struct", name)
- 		&& lookup_attribute ("ms_struct", TYPE_ATTRIBUTES (*type)))))
-     {
-       warning (OPT_Wattributes, "%qE incompatible attribute ignored",
-                name);
-       *no_add_attrs = true;
-     }
- 
-   return NULL_TREE;
- }
- 
- static tree
- ix86_handle_fndecl_attribute (tree *node, tree name, tree args, int,
- 			      bool *no_add_attrs)
- {
-   if (TREE_CODE (*node) != FUNCTION_DECL)
-     {
-       warning (OPT_Wattributes, "%qE attribute only applies to functions",
-                name);
-       *no_add_attrs = true;
-     }
- 
-   if (is_attribute_p ("indirect_branch", name))
-     {
-       tree cst = TREE_VALUE (args);
-       if (TREE_CODE (cst) != STRING_CST)
- 	{
- 	  warning (OPT_Wattributes,
- 		   "%qE attribute requires a string constant argument",
- 		   name);
- 	  *no_add_attrs = true;
- 	}
-       else if (strcmp (TREE_STRING_POINTER (cst), "keep") != 0
- 	       && strcmp (TREE_STRING_POINTER (cst), "thunk") != 0
- 	       && strcmp (TREE_STRING_POINTER (cst), "thunk-inline") != 0
- 	       && strcmp (TREE_STRING_POINTER (cst), "thunk-extern") != 0)
- 	{
- 	  warning (OPT_Wattributes,
- 		   "argument to %qE attribute is not "
- 		   "(keep|thunk|thunk-inline|thunk-extern)", name);
- 	  *no_add_attrs = true;
- 	}
-     }
- 
-   if (is_attribute_p ("function_return", name))
-     {
-       tree cst = TREE_VALUE (args);
-       if (TREE_CODE (cst) != STRING_CST)
- 	{
- 	  warning (OPT_Wattributes,
- 		   "%qE attribute requires a string constant argument",
- 		   name);
- 	  *no_add_attrs = true;
- 	}
-       else if (strcmp (TREE_STRING_POINTER (cst), "keep") != 0
- 	       && strcmp (TREE_STRING_POINTER (cst), "thunk") != 0
- 	       && strcmp (TREE_STRING_POINTER (cst), "thunk-inline") != 0
- 	       && strcmp (TREE_STRING_POINTER (cst), "thunk-extern") != 0)
- 	{
- 	  warning (OPT_Wattributes,
- 		   "argument to %qE attribute is not "
- 		   "(keep|thunk|thunk-inline|thunk-extern)", name);
- 	  *no_add_attrs = true;
- 	}
-     }
- 
-   return NULL_TREE;
- }
- 
- static tree
- ix86_handle_no_caller_saved_registers_attribute (tree *, tree, tree,
- 						 int, bool *)
- {
-   return NULL_TREE;
- }
- 
- static tree
- ix86_handle_interrupt_attribute (tree *node, tree, tree, int, bool *)
- {
-   /* DECL_RESULT and DECL_ARGUMENTS do not exist there yet,
-      but the function type contains args and return type data.  */
-   tree func_type = *node;
-   tree return_type = TREE_TYPE (func_type);
- 
-   int nargs = 0;
-   tree current_arg_type = TYPE_ARG_TYPES (func_type);
-   while (current_arg_type
- 	 && ! VOID_TYPE_P (TREE_VALUE (current_arg_type)))
-     {
-       if (nargs == 0)
- 	{
- 	  if (! POINTER_TYPE_P (TREE_VALUE (current_arg_type)))
- 	    error ("interrupt service routine should have a pointer "
- 		   "as the first argument");
- 	}
-       else if (nargs == 1)
- 	{
- 	  if (TREE_CODE (TREE_VALUE (current_arg_type)) != INTEGER_TYPE
- 	      || TYPE_MODE (TREE_VALUE (current_arg_type)) != word_mode)
- 	    error ("interrupt service routine should have %qs "
- 		   "as the second argument",
- 		   TARGET_64BIT
- 		   ? (TARGET_X32 ? "unsigned long long int"
- 				 : "unsigned long int")
- 		   : "unsigned int");
- 	}
-       nargs++;
-       current_arg_type = TREE_CHAIN (current_arg_type);
-     }
-   if (!nargs || nargs > 2)
-     error ("interrupt service routine can only have a pointer argument "
- 	   "and an optional integer argument");
-   if (! VOID_TYPE_P (return_type))
-     error ("interrupt service routine can%'t have non-void return value");
- 
-   return NULL_TREE;
- }
- 
  static bool
  ix86_ms_bitfield_layout_p (const_tree record_type)
  {
--- 20058,20063 ----
*************** x86_can_output_mi_thunk (const_tree, HOS
*** 41533,41541 ****
     *(*this + vcall_offset) should be added to THIS.  */
  
  static void
! x86_output_mi_thunk (FILE *file, tree, HOST_WIDE_INT delta,
  		     HOST_WIDE_INT vcall_offset, tree function)
  {
    rtx this_param = x86_this_parameter (function);
    rtx this_reg, tmp, fnaddr;
    unsigned int tmp_regno;
--- 20155,20164 ----
     *(*this + vcall_offset) should be added to THIS.  */
  
  static void
! x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta,
  		     HOST_WIDE_INT vcall_offset, tree function)
  {
+   const char *fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunk_fndecl));
    rtx this_param = x86_this_parameter (function);
    rtx this_reg, tmp, fnaddr;
    unsigned int tmp_regno;
*************** x86_output_mi_thunk (FILE *file, tree, H
*** 41711,41723 ****
      }
    emit_barrier ();
  
!   /* Emit just enough of rest_of_compilation to get the insns emitted.
!      Note that use_thunk calls assemble_start_function et al.  */
    insn = get_insns ();
    shorten_branches (insn);
    final_start_function (insn, file, 1);
    final (insn, file, 1);
    final_end_function ();
  }
  
  static void
--- 20334,20347 ----
      }
    emit_barrier ();
  
!   /* Emit just enough of rest_of_compilation to get the insns emitted.  */
    insn = get_insns ();
    shorten_branches (insn);
+   assemble_start_function (thunk_fndecl, fnname);
    final_start_function (insn, file, 1);
    final (insn, file, 1);
    final_end_function ();
+   assemble_end_function (thunk_fndecl, fnname);
  }
  
  static void
*************** x86_emit_floatuns (rtx operands[2])
*** 42362,44235 ****
    emit_label (donelab);
  }
  
- static bool canonicalize_perm (struct expand_vec_perm_d *d);
- static bool expand_vec_perm_1 (struct expand_vec_perm_d *d);
- static bool expand_vec_perm_broadcast_1 (struct expand_vec_perm_d *d);
- static bool expand_vec_perm_palignr (struct expand_vec_perm_d *d, bool);
- 
- /* Get a vector mode of the same size as the original but with elements
-    twice as wide.  This is only guaranteed to apply to integral vectors.  */
- 
- static inline machine_mode
- get_mode_wider_vector (machine_mode o)
- {
-   /* ??? Rely on the ordering that genmodes.c gives to vectors.  */
-   machine_mode n = GET_MODE_WIDER_MODE (o).require ();
-   gcc_assert (GET_MODE_NUNITS (o) == GET_MODE_NUNITS (n) * 2);
-   gcc_assert (GET_MODE_SIZE (o) == GET_MODE_SIZE (n));
-   return n;
- }
- 
- /* A subroutine of ix86_expand_vector_init_duplicate.  Tries to
-    fill target with val via vec_duplicate.  */
- 
- static bool
- ix86_vector_duplicate_value (machine_mode mode, rtx target, rtx val)
- {
-   bool ok;
-   rtx_insn *insn;
-   rtx dup;
- 
-   /* First attempt to recognize VAL as-is.  */
-   dup = gen_vec_duplicate (mode, val);
-   insn = emit_insn (gen_rtx_SET (target, dup));
-   if (recog_memoized (insn) < 0)
-     {
-       rtx_insn *seq;
-       machine_mode innermode = GET_MODE_INNER (mode);
-       rtx reg;
- 
-       /* If that fails, force VAL into a register.  */
- 
-       start_sequence ();
-       reg = force_reg (innermode, val);
-       if (GET_MODE (reg) != innermode)
- 	reg = gen_lowpart (innermode, reg);
-       SET_SRC (PATTERN (insn)) = gen_vec_duplicate (mode, reg);
-       seq = get_insns ();
-       end_sequence ();
-       if (seq)
- 	emit_insn_before (seq, insn);
- 
-       ok = recog_memoized (insn) >= 0;
-       gcc_assert (ok);
-     }
-   return true;
- }
- 
- /* A subroutine of ix86_expand_vector_init.  Store into TARGET a vector
-    with all elements equal to VAR.  Return true if successful.  */
- 
- static bool
- ix86_expand_vector_init_duplicate (bool mmx_ok, machine_mode mode,
- 				   rtx target, rtx val)
- {
-   bool ok;
- 
-   switch (mode)
-     {
-     case E_V2SImode:
-     case E_V2SFmode:
-       if (!mmx_ok)
- 	return false;
-       /* FALLTHRU */
- 
-     case E_V4DFmode:
-     case E_V4DImode:
-     case E_V8SFmode:
-     case E_V8SImode:
-     case E_V2DFmode:
-     case E_V2DImode:
-     case E_V4SFmode:
-     case E_V4SImode:
-     case E_V16SImode:
-     case E_V8DImode:
-     case E_V16SFmode:
-     case E_V8DFmode:
-       return ix86_vector_duplicate_value (mode, target, val);
- 
-     case E_V4HImode:
-       if (!mmx_ok)
- 	return false;
-       if (TARGET_SSE || TARGET_3DNOW_A)
- 	{
- 	  rtx x;
- 
- 	  val = gen_lowpart (SImode, val);
- 	  x = gen_rtx_TRUNCATE (HImode, val);
- 	  x = gen_rtx_VEC_DUPLICATE (mode, x);
- 	  emit_insn (gen_rtx_SET (target, x));
- 	  return true;
- 	}
-       goto widen;
- 
-     case E_V8QImode:
-       if (!mmx_ok)
- 	return false;
-       goto widen;
- 
-     case E_V8HImode:
-       if (TARGET_AVX2)
- 	return ix86_vector_duplicate_value (mode, target, val);
- 
-       if (TARGET_SSE2)
- 	{
- 	  struct expand_vec_perm_d dperm;
- 	  rtx tmp1, tmp2;
- 
- 	permute:
- 	  memset (&dperm, 0, sizeof (dperm));
- 	  dperm.target = target;
- 	  dperm.vmode = mode;
- 	  dperm.nelt = GET_MODE_NUNITS (mode);
- 	  dperm.op0 = dperm.op1 = gen_reg_rtx (mode);
- 	  dperm.one_operand_p = true;
- 
- 	  /* Extend to SImode using a paradoxical SUBREG.  */
- 	  tmp1 = gen_reg_rtx (SImode);
- 	  emit_move_insn (tmp1, gen_lowpart (SImode, val));
- 
- 	  /* Insert the SImode value as low element of a V4SImode vector. */
- 	  tmp2 = gen_reg_rtx (V4SImode);
- 	  emit_insn (gen_vec_setv4si_0 (tmp2, CONST0_RTX (V4SImode), tmp1));
- 	  emit_move_insn (dperm.op0, gen_lowpart (mode, tmp2));
- 
- 	  ok = (expand_vec_perm_1 (&dperm)
- 		|| expand_vec_perm_broadcast_1 (&dperm));
- 	  gcc_assert (ok);
- 	  return ok;
- 	}
-       goto widen;
- 
-     case E_V16QImode:
-       if (TARGET_AVX2)
- 	return ix86_vector_duplicate_value (mode, target, val);
- 
-       if (TARGET_SSE2)
- 	goto permute;
-       goto widen;
- 
-     widen:
-       /* Replicate the value once into the next wider mode and recurse.  */
-       {
- 	machine_mode smode, wsmode, wvmode;
- 	rtx x;
- 
- 	smode = GET_MODE_INNER (mode);
- 	wvmode = get_mode_wider_vector (mode);
- 	wsmode = GET_MODE_INNER (wvmode);
- 
- 	val = convert_modes (wsmode, smode, val, true);
- 	x = expand_simple_binop (wsmode, ASHIFT, val,
- 				 GEN_INT (GET_MODE_BITSIZE (smode)),
- 				 NULL_RTX, 1, OPTAB_LIB_WIDEN);
- 	val = expand_simple_binop (wsmode, IOR, val, x, x, 1, OPTAB_LIB_WIDEN);
- 
- 	x = gen_reg_rtx (wvmode);
- 	ok = ix86_expand_vector_init_duplicate (mmx_ok, wvmode, x, val);
- 	gcc_assert (ok);
- 	emit_move_insn (target, gen_lowpart (GET_MODE (target), x));
- 	return ok;
-       }
- 
-     case E_V16HImode:
-     case E_V32QImode:
-       if (TARGET_AVX2)
- 	return ix86_vector_duplicate_value (mode, target, val);
-       else
- 	{
- 	  machine_mode hvmode = (mode == V16HImode ? V8HImode : V16QImode);
- 	  rtx x = gen_reg_rtx (hvmode);
- 
- 	  ok = ix86_expand_vector_init_duplicate (false, hvmode, x, val);
- 	  gcc_assert (ok);
- 
- 	  x = gen_rtx_VEC_CONCAT (mode, x, x);
- 	  emit_insn (gen_rtx_SET (target, x));
- 	}
-       return true;
- 
-     case E_V64QImode:
-     case E_V32HImode:
-       if (TARGET_AVX512BW)
- 	return ix86_vector_duplicate_value (mode, target, val);
-       else
- 	{
- 	  machine_mode hvmode = (mode == V32HImode ? V16HImode : V32QImode);
- 	  rtx x = gen_reg_rtx (hvmode);
- 
- 	  ok = ix86_expand_vector_init_duplicate (false, hvmode, x, val);
- 	  gcc_assert (ok);
- 
- 	  x = gen_rtx_VEC_CONCAT (mode, x, x);
- 	  emit_insn (gen_rtx_SET (target, x));
- 	}
-       return true;
- 
-     default:
-       return false;
-     }
- }
- 
- /* A subroutine of ix86_expand_vector_init.  Store into TARGET a vector
-    whose ONE_VAR element is VAR, and other elements are zero.  Return true
-    if successful.  */
- 
- static bool
- ix86_expand_vector_init_one_nonzero (bool mmx_ok, machine_mode mode,
- 				     rtx target, rtx var, int one_var)
- {
-   machine_mode vsimode;
-   rtx new_target;
-   rtx x, tmp;
-   bool use_vector_set = false;
-   rtx (*gen_vec_set_0) (rtx, rtx, rtx) = NULL;
- 
-   switch (mode)
-     {
-     case E_V2DImode:
-       /* For SSE4.1, we normally use vector set.  But if the second
- 	 element is zero and inter-unit moves are OK, we use movq
- 	 instead.  */
-       use_vector_set = (TARGET_64BIT && TARGET_SSE4_1
- 			&& !(TARGET_INTER_UNIT_MOVES_TO_VEC
- 			     && one_var == 0));
-       break;
-     case E_V16QImode:
-     case E_V4SImode:
-     case E_V4SFmode:
-       use_vector_set = TARGET_SSE4_1;
-       break;
-     case E_V8HImode:
-       use_vector_set = TARGET_SSE2;
-       break;
-     case E_V4HImode:
-       use_vector_set = TARGET_SSE || TARGET_3DNOW_A;
-       break;
-     case E_V32QImode:
-     case E_V16HImode:
-       use_vector_set = TARGET_AVX;
-       break;
-     case E_V8SImode:
-       use_vector_set = TARGET_AVX;
-       gen_vec_set_0 = gen_vec_setv8si_0;
-       break;
-     case E_V8SFmode:
-       use_vector_set = TARGET_AVX;
-       gen_vec_set_0 = gen_vec_setv8sf_0;
-       break;
-     case E_V4DFmode:
-       use_vector_set = TARGET_AVX;
-       gen_vec_set_0 = gen_vec_setv4df_0;
-       break;
-     case E_V4DImode:
-       /* Use ix86_expand_vector_set in 64bit mode only.  */
-       use_vector_set = TARGET_AVX && TARGET_64BIT;
-       gen_vec_set_0 = gen_vec_setv4di_0;
-       break;
-     case E_V16SImode:
-       use_vector_set = TARGET_AVX512F && one_var == 0;
-       gen_vec_set_0 = gen_vec_setv16si_0;
-       break;
-     case E_V16SFmode:
-       use_vector_set = TARGET_AVX512F && one_var == 0;
-       gen_vec_set_0 = gen_vec_setv16sf_0;
-       break;
-     case E_V8DFmode:
-       use_vector_set = TARGET_AVX512F && one_var == 0;
-       gen_vec_set_0 = gen_vec_setv8df_0;
-       break;
-     case E_V8DImode:
-       /* Use ix86_expand_vector_set in 64bit mode only.  */
-       use_vector_set = TARGET_AVX512F && TARGET_64BIT && one_var == 0;
-       gen_vec_set_0 = gen_vec_setv8di_0;
-       break;
-     default:
-       break;
-     }
- 
-   if (use_vector_set)
-     {
-       if (gen_vec_set_0 && one_var == 0)
- 	{
- 	  var = force_reg (GET_MODE_INNER (mode), var);
- 	  emit_insn (gen_vec_set_0 (target, CONST0_RTX (mode), var));
- 	  return true;
- 	}
-       emit_insn (gen_rtx_SET (target, CONST0_RTX (mode)));
-       var = force_reg (GET_MODE_INNER (mode), var);
-       ix86_expand_vector_set (mmx_ok, target, var, one_var);
-       return true;
-     }
- 
-   switch (mode)
-     {
-     case E_V2SFmode:
-     case E_V2SImode:
-       if (!mmx_ok)
- 	return false;
-       /* FALLTHRU */
- 
-     case E_V2DFmode:
-     case E_V2DImode:
-       if (one_var != 0)
- 	return false;
-       var = force_reg (GET_MODE_INNER (mode), var);
-       x = gen_rtx_VEC_CONCAT (mode, var, CONST0_RTX (GET_MODE_INNER (mode)));
-       emit_insn (gen_rtx_SET (target, x));
-       return true;
- 
-     case E_V4SFmode:
-     case E_V4SImode:
-       if (!REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER)
- 	new_target = gen_reg_rtx (mode);
-       else
- 	new_target = target;
-       var = force_reg (GET_MODE_INNER (mode), var);
-       x = gen_rtx_VEC_DUPLICATE (mode, var);
-       x = gen_rtx_VEC_MERGE (mode, x, CONST0_RTX (mode), const1_rtx);
-       emit_insn (gen_rtx_SET (new_target, x));
-       if (one_var != 0)
- 	{
- 	  /* We need to shuffle the value to the correct position, so
- 	     create a new pseudo to store the intermediate result.  */
- 
- 	  /* With SSE2, we can use the integer shuffle insns.  */
- 	  if (mode != V4SFmode && TARGET_SSE2)
- 	    {
- 	      emit_insn (gen_sse2_pshufd_1 (new_target, new_target,
- 					    const1_rtx,
- 					    GEN_INT (one_var == 1 ? 0 : 1),
- 					    GEN_INT (one_var == 2 ? 0 : 1),
- 					    GEN_INT (one_var == 3 ? 0 : 1)));
- 	      if (target != new_target)
- 		emit_move_insn (target, new_target);
- 	      return true;
- 	    }
- 
- 	  /* Otherwise convert the intermediate result to V4SFmode and
- 	     use the SSE1 shuffle instructions.  */
- 	  if (mode != V4SFmode)
- 	    {
- 	      tmp = gen_reg_rtx (V4SFmode);
- 	      emit_move_insn (tmp, gen_lowpart (V4SFmode, new_target));
- 	    }
- 	  else
- 	    tmp = new_target;
- 
- 	  emit_insn (gen_sse_shufps_v4sf (tmp, tmp, tmp,
- 				       const1_rtx,
- 				       GEN_INT (one_var == 1 ? 0 : 1),
- 				       GEN_INT (one_var == 2 ? 0+4 : 1+4),
- 				       GEN_INT (one_var == 3 ? 0+4 : 1+4)));
- 
- 	  if (mode != V4SFmode)
- 	    emit_move_insn (target, gen_lowpart (V4SImode, tmp));
- 	  else if (tmp != target)
- 	    emit_move_insn (target, tmp);
- 	}
-       else if (target != new_target)
- 	emit_move_insn (target, new_target);
-       return true;
- 
-     case E_V8HImode:
-     case E_V16QImode:
-       vsimode = V4SImode;
-       goto widen;
-     case E_V4HImode:
-     case E_V8QImode:
-       if (!mmx_ok)
- 	return false;
-       vsimode = V2SImode;
-       goto widen;
-     widen:
-       if (one_var != 0)
- 	return false;
- 
-       /* Zero extend the variable element to SImode and recurse.  */
-       var = convert_modes (SImode, GET_MODE_INNER (mode), var, true);
- 
-       x = gen_reg_rtx (vsimode);
-       if (!ix86_expand_vector_init_one_nonzero (mmx_ok, vsimode, x,
- 						var, one_var))
- 	gcc_unreachable ();
- 
-       emit_move_insn (target, gen_lowpart (mode, x));
-       return true;
- 
-     default:
-       return false;
-     }
- }
- 
- /* A subroutine of ix86_expand_vector_init.  Store into TARGET a vector
-    consisting of the values in VALS.  It is known that all elements
-    except ONE_VAR are constants.  Return true if successful.  */
- 
- static bool
- ix86_expand_vector_init_one_var (bool mmx_ok, machine_mode mode,
- 				 rtx target, rtx vals, int one_var)
- {
-   rtx var = XVECEXP (vals, 0, one_var);
-   machine_mode wmode;
-   rtx const_vec, x;
- 
-   const_vec = copy_rtx (vals);
-   XVECEXP (const_vec, 0, one_var) = CONST0_RTX (GET_MODE_INNER (mode));
-   const_vec = gen_rtx_CONST_VECTOR (mode, XVEC (const_vec, 0));
- 
-   switch (mode)
-     {
-     case E_V2DFmode:
-     case E_V2DImode:
-     case E_V2SFmode:
-     case E_V2SImode:
-       /* For the two element vectors, it's just as easy to use
- 	 the general case.  */
-       return false;
- 
-     case E_V4DImode:
-       /* Use ix86_expand_vector_set in 64bit mode only.  */
-       if (!TARGET_64BIT)
- 	return false;
-       /* FALLTHRU */
-     case E_V4DFmode:
-     case E_V8SFmode:
-     case E_V8SImode:
-     case E_V16HImode:
-     case E_V32QImode:
-     case E_V4SFmode:
-     case E_V4SImode:
-     case E_V8HImode:
-     case E_V4HImode:
-       break;
- 
-     case E_V16QImode:
-       if (TARGET_SSE4_1)
- 	break;
-       wmode = V8HImode;
-       goto widen;
-     case E_V8QImode:
-       wmode = V4HImode;
-       goto widen;
-     widen:
-       /* There's no way to set one QImode entry easily.  Combine
- 	 the variable value with its adjacent constant value, and
- 	 promote to an HImode set.  */
-       x = XVECEXP (vals, 0, one_var ^ 1);
-       if (one_var & 1)
- 	{
- 	  var = convert_modes (HImode, QImode, var, true);
- 	  var = expand_simple_binop (HImode, ASHIFT, var, GEN_INT (8),
- 				     NULL_RTX, 1, OPTAB_LIB_WIDEN);
- 	  x = GEN_INT (INTVAL (x) & 0xff);
- 	}
-       else
- 	{
- 	  var = convert_modes (HImode, QImode, var, true);
- 	  x = gen_int_mode (UINTVAL (x) << 8, HImode);
- 	}
-       if (x != const0_rtx)
- 	var = expand_simple_binop (HImode, IOR, var, x, var,
- 				   1, OPTAB_LIB_WIDEN);
- 
-       x = gen_reg_rtx (wmode);
-       emit_move_insn (x, gen_lowpart (wmode, const_vec));
-       ix86_expand_vector_set (mmx_ok, x, var, one_var >> 1);
- 
-       emit_move_insn (target, gen_lowpart (mode, x));
-       return true;
- 
-     default:
-       return false;
-     }
- 
-   emit_move_insn (target, const_vec);
-   ix86_expand_vector_set (mmx_ok, target, var, one_var);
-   return true;
- }
- 
- /* A subroutine of ix86_expand_vector_init_general.  Use vector
-    concatenate to handle the most general case: all values variable,
-    and none identical.  */
- 
- static void
- ix86_expand_vector_init_concat (machine_mode mode,
- 				rtx target, rtx *ops, int n)
- {
-   machine_mode cmode, hmode = VOIDmode, gmode = VOIDmode;
-   rtx first[16], second[8], third[4];
-   rtvec v;
-   int i, j;
- 
-   switch (n)
-     {
-     case 2:
-       switch (mode)
- 	{
- 	case E_V16SImode:
- 	  cmode = V8SImode;
- 	  break;
- 	case E_V16SFmode:
- 	  cmode = V8SFmode;
- 	  break;
- 	case E_V8DImode:
- 	  cmode = V4DImode;
- 	  break;
- 	case E_V8DFmode:
- 	  cmode = V4DFmode;
- 	  break;
- 	case E_V8SImode:
- 	  cmode = V4SImode;
- 	  break;
- 	case E_V8SFmode:
- 	  cmode = V4SFmode;
- 	  break;
- 	case E_V4DImode:
- 	  cmode = V2DImode;
- 	  break;
- 	case E_V4DFmode:
- 	  cmode = V2DFmode;
- 	  break;
- 	case E_V4SImode:
- 	  cmode = V2SImode;
- 	  break;
- 	case E_V4SFmode:
- 	  cmode = V2SFmode;
- 	  break;
- 	case E_V2DImode:
- 	  cmode = DImode;
- 	  break;
- 	case E_V2SImode:
- 	  cmode = SImode;
- 	  break;
- 	case E_V2DFmode:
- 	  cmode = DFmode;
- 	  break;
- 	case E_V2SFmode:
- 	  cmode = SFmode;
- 	  break;
- 	default:
- 	  gcc_unreachable ();
- 	}
- 
-       if (!register_operand (ops[1], cmode))
- 	ops[1] = force_reg (cmode, ops[1]);
-       if (!register_operand (ops[0], cmode))
- 	ops[0] = force_reg (cmode, ops[0]);
-       emit_insn (gen_rtx_SET (target, gen_rtx_VEC_CONCAT (mode, ops[0],
- 							  ops[1])));
-       break;
- 
-     case 4:
-       switch (mode)
- 	{
- 	case E_V4DImode:
- 	  cmode = V2DImode;
- 	  break;
- 	case E_V4DFmode:
- 	  cmode = V2DFmode;
- 	  break;
- 	case E_V4SImode:
- 	  cmode = V2SImode;
- 	  break;
- 	case E_V4SFmode:
- 	  cmode = V2SFmode;
- 	  break;
- 	default:
- 	  gcc_unreachable ();
- 	}
-       goto half;
- 
-     case 8:
-       switch (mode)
- 	{
- 	case E_V8DImode:
- 	  cmode = V2DImode;
- 	  hmode = V4DImode;
- 	  break;
- 	case E_V8DFmode:
- 	  cmode = V2DFmode;
- 	  hmode = V4DFmode;
- 	  break;
- 	case E_V8SImode:
- 	  cmode = V2SImode;
- 	  hmode = V4SImode;
- 	  break;
- 	case E_V8SFmode:
- 	  cmode = V2SFmode;
- 	  hmode = V4SFmode;
- 	  break;
- 	default:
- 	  gcc_unreachable ();
- 	}
-       goto half;
- 
-     case 16:
-       switch (mode)
- 	{
- 	case E_V16SImode:
- 	  cmode = V2SImode;
- 	  hmode = V4SImode;
- 	  gmode = V8SImode;
- 	  break;
- 	case E_V16SFmode:
- 	  cmode = V2SFmode;
- 	  hmode = V4SFmode;
- 	  gmode = V8SFmode;
- 	  break;
- 	default:
- 	  gcc_unreachable ();
- 	}
-       goto half;
- 
- half:
-       /* FIXME: We process inputs backward to help RA.  PR 36222.  */
-       i = n - 1;
-       j = (n >> 1) - 1;
-       for (; i > 0; i -= 2, j--)
- 	{
- 	  first[j] = gen_reg_rtx (cmode);
- 	  v = gen_rtvec (2, ops[i - 1], ops[i]);
- 	  ix86_expand_vector_init (false, first[j],
- 				   gen_rtx_PARALLEL (cmode, v));
- 	}
- 
-       n >>= 1;
-       if (n > 4)
- 	{
- 	  gcc_assert (hmode != VOIDmode);
- 	  gcc_assert (gmode != VOIDmode);
- 	  for (i = j = 0; i < n; i += 2, j++)
- 	    {
- 	      second[j] = gen_reg_rtx (hmode);
- 	      ix86_expand_vector_init_concat (hmode, second [j],
- 					      &first [i], 2);
- 	    }
- 	  n >>= 1;
- 	  for (i = j = 0; i < n; i += 2, j++)
- 	    {
- 	      third[j] = gen_reg_rtx (gmode);
- 	      ix86_expand_vector_init_concat (gmode, third[j],
- 					      &second[i], 2);
- 	    }
- 	  n >>= 1;
- 	  ix86_expand_vector_init_concat (mode, target, third, n);
- 	}
-       else if (n > 2)
- 	{
- 	  gcc_assert (hmode != VOIDmode);
- 	  for (i = j = 0; i < n; i += 2, j++)
- 	    {
- 	      second[j] = gen_reg_rtx (hmode);
- 	      ix86_expand_vector_init_concat (hmode, second [j],
- 					      &first [i], 2);
- 	    }
- 	  n >>= 1;
- 	  ix86_expand_vector_init_concat (mode, target, second, n);
- 	}
-       else
- 	ix86_expand_vector_init_concat (mode, target, first, n);
-       break;
- 
-     default:
-       gcc_unreachable ();
-     }
- }
- 
- /* A subroutine of ix86_expand_vector_init_general.  Use vector
-    interleave to handle the most general case: all values variable,
-    and none identical.  */
- 
- static void
- ix86_expand_vector_init_interleave (machine_mode mode,
- 				    rtx target, rtx *ops, int n)
- {
-   machine_mode first_imode, second_imode, third_imode, inner_mode;
-   int i, j;
-   rtx op0, op1;
-   rtx (*gen_load_even) (rtx, rtx, rtx);
-   rtx (*gen_interleave_first_low) (rtx, rtx, rtx);
-   rtx (*gen_interleave_second_low) (rtx, rtx, rtx);
- 
-   switch (mode)
-     {
-     case E_V8HImode:
-       gen_load_even = gen_vec_setv8hi;
-       gen_interleave_first_low = gen_vec_interleave_lowv4si;
-       gen_interleave_second_low = gen_vec_interleave_lowv2di;
-       inner_mode = HImode;
-       first_imode = V4SImode;
-       second_imode = V2DImode;
-       third_imode = VOIDmode;
-       break;
-     case E_V16QImode:
-       gen_load_even = gen_vec_setv16qi;
-       gen_interleave_first_low = gen_vec_interleave_lowv8hi;
-       gen_interleave_second_low = gen_vec_interleave_lowv4si;
-       inner_mode = QImode;
-       first_imode = V8HImode;
-       second_imode = V4SImode;
-       third_imode = V2DImode;
-       break;
-     default:
-       gcc_unreachable ();
-     }
- 
-   for (i = 0; i < n; i++)
-     {
-       /* Extend the odd elment to SImode using a paradoxical SUBREG.  */
-       op0 = gen_reg_rtx (SImode);
-       emit_move_insn (op0, gen_lowpart (SImode, ops [i + i]));
- 
-       /* Insert the SImode value as low element of V4SImode vector. */
-       op1 = gen_reg_rtx (V4SImode);
-       op0 = gen_rtx_VEC_MERGE (V4SImode,
- 			       gen_rtx_VEC_DUPLICATE (V4SImode,
- 						      op0),
- 			       CONST0_RTX (V4SImode),
- 			       const1_rtx);
-       emit_insn (gen_rtx_SET (op1, op0));
- 
-       /* Cast the V4SImode vector back to a vector in orignal mode.  */
-       op0 = gen_reg_rtx (mode);
-       emit_move_insn (op0, gen_lowpart (mode, op1));
- 
-       /* Load even elements into the second position.  */
-       emit_insn (gen_load_even (op0,
- 				force_reg (inner_mode,
- 					   ops [i + i + 1]),
- 				const1_rtx));
- 
-       /* Cast vector to FIRST_IMODE vector.  */
-       ops[i] = gen_reg_rtx (first_imode);
-       emit_move_insn (ops[i], gen_lowpart (first_imode, op0));
-     }
- 
-   /* Interleave low FIRST_IMODE vectors.  */
-   for (i = j = 0; i < n; i += 2, j++)
-     {
-       op0 = gen_reg_rtx (first_imode);
-       emit_insn (gen_interleave_first_low (op0, ops[i], ops[i + 1]));
- 
-       /* Cast FIRST_IMODE vector to SECOND_IMODE vector.  */
-       ops[j] = gen_reg_rtx (second_imode);
-       emit_move_insn (ops[j], gen_lowpart (second_imode, op0));
-     }
- 
-   /* Interleave low SECOND_IMODE vectors.  */
-   switch (second_imode)
-     {
-     case E_V4SImode:
-       for (i = j = 0; i < n / 2; i += 2, j++)
- 	{
- 	  op0 = gen_reg_rtx (second_imode);
- 	  emit_insn (gen_interleave_second_low (op0, ops[i],
- 						ops[i + 1]));
- 
- 	  /* Cast the SECOND_IMODE vector to the THIRD_IMODE
- 	     vector.  */
- 	  ops[j] = gen_reg_rtx (third_imode);
- 	  emit_move_insn (ops[j], gen_lowpart (third_imode, op0));
- 	}
-       second_imode = V2DImode;
-       gen_interleave_second_low = gen_vec_interleave_lowv2di;
-       /* FALLTHRU */
- 
-     case E_V2DImode:
-       op0 = gen_reg_rtx (second_imode);
-       emit_insn (gen_interleave_second_low (op0, ops[0],
- 					    ops[1]));
- 
-       /* Cast the SECOND_IMODE vector back to a vector on original
- 	 mode.  */
-       emit_insn (gen_rtx_SET (target, gen_lowpart (mode, op0)));
-       break;
- 
-     default:
-       gcc_unreachable ();
-     }
- }
- 
- /* A subroutine of ix86_expand_vector_init.  Handle the most general case:
-    all values variable, and none identical.  */
- 
- static void
- ix86_expand_vector_init_general (bool mmx_ok, machine_mode mode,
- 				 rtx target, rtx vals)
- {
-   rtx ops[64], op0, op1, op2, op3, op4, op5;
-   machine_mode half_mode = VOIDmode;
-   machine_mode quarter_mode = VOIDmode;
-   int n, i;
- 
-   switch (mode)
-     {
-     case E_V2SFmode:
-     case E_V2SImode:
-       if (!mmx_ok && !TARGET_SSE)
- 	break;
-       /* FALLTHRU */
- 
-     case E_V16SImode:
-     case E_V16SFmode:
-     case E_V8DFmode:
-     case E_V8DImode:
-     case E_V8SFmode:
-     case E_V8SImode:
-     case E_V4DFmode:
-     case E_V4DImode:
-     case E_V4SFmode:
-     case E_V4SImode:
-     case E_V2DFmode:
-     case E_V2DImode:
-       n = GET_MODE_NUNITS (mode);
-       for (i = 0; i < n; i++)
- 	ops[i] = XVECEXP (vals, 0, i);
-       ix86_expand_vector_init_concat (mode, target, ops, n);
-       return;
- 
-     case E_V2TImode:
-       for (i = 0; i < 2; i++)
- 	ops[i] = gen_lowpart (V2DImode, XVECEXP (vals, 0, i));
-       op0 = gen_reg_rtx (V4DImode);
-       ix86_expand_vector_init_concat (V4DImode, op0, ops, 2);
-       emit_move_insn (target, gen_lowpart (GET_MODE (target), op0));
-       return;
- 
-     case E_V4TImode:
-       for (i = 0; i < 4; i++)
- 	ops[i] = gen_lowpart (V2DImode, XVECEXP (vals, 0, i));
-       ops[4] = gen_reg_rtx (V4DImode);
-       ix86_expand_vector_init_concat (V4DImode, ops[4], ops, 2);
-       ops[5] = gen_reg_rtx (V4DImode);
-       ix86_expand_vector_init_concat (V4DImode, ops[5], ops + 2, 2);
-       op0 = gen_reg_rtx (V8DImode);
-       ix86_expand_vector_init_concat (V8DImode, op0, ops + 4, 2);
-       emit_move_insn (target, gen_lowpart (GET_MODE (target), op0));
-       return;
- 
-     case E_V32QImode:
-       half_mode = V16QImode;
-       goto half;
- 
-     case E_V16HImode:
-       half_mode = V8HImode;
-       goto half;
- 
- half:
-       n = GET_MODE_NUNITS (mode);
-       for (i = 0; i < n; i++)
- 	ops[i] = XVECEXP (vals, 0, i);
-       op0 = gen_reg_rtx (half_mode);
-       op1 = gen_reg_rtx (half_mode);
-       ix86_expand_vector_init_interleave (half_mode, op0, ops,
- 					  n >> 2);
-       ix86_expand_vector_init_interleave (half_mode, op1,
- 					  &ops [n >> 1], n >> 2);
-       emit_insn (gen_rtx_SET (target, gen_rtx_VEC_CONCAT (mode, op0, op1)));
-       return;
- 
-     case E_V64QImode:
-       quarter_mode = V16QImode;
-       half_mode = V32QImode;
-       goto quarter;
- 
-     case E_V32HImode:
-       quarter_mode = V8HImode;
-       half_mode = V16HImode;
-       goto quarter;
- 
- quarter:
-       n = GET_MODE_NUNITS (mode);
-       for (i = 0; i < n; i++)
- 	ops[i] = XVECEXP (vals, 0, i);
-       op0 = gen_reg_rtx (quarter_mode);
-       op1 = gen_reg_rtx (quarter_mode);
-       op2 = gen_reg_rtx (quarter_mode);
-       op3 = gen_reg_rtx (quarter_mode);
-       op4 = gen_reg_rtx (half_mode);
-       op5 = gen_reg_rtx (half_mode);
-       ix86_expand_vector_init_interleave (quarter_mode, op0, ops,
- 					  n >> 3);
-       ix86_expand_vector_init_interleave (quarter_mode, op1,
- 					  &ops [n >> 2], n >> 3);
-       ix86_expand_vector_init_interleave (quarter_mode, op2,
- 					  &ops [n >> 1], n >> 3);
-       ix86_expand_vector_init_interleave (quarter_mode, op3,
- 					  &ops [(n >> 1) | (n >> 2)], n >> 3);
-       emit_insn (gen_rtx_SET (op4, gen_rtx_VEC_CONCAT (half_mode, op0, op1)));
-       emit_insn (gen_rtx_SET (op5, gen_rtx_VEC_CONCAT (half_mode, op2, op3)));
-       emit_insn (gen_rtx_SET (target, gen_rtx_VEC_CONCAT (mode, op4, op5)));
-       return;
- 
-     case E_V16QImode:
-       if (!TARGET_SSE4_1)
- 	break;
-       /* FALLTHRU */
- 
-     case E_V8HImode:
-       if (!TARGET_SSE2)
- 	break;
- 
-       /* Don't use ix86_expand_vector_init_interleave if we can't
- 	 move from GPR to SSE register directly.  */
-       if (!TARGET_INTER_UNIT_MOVES_TO_VEC)
- 	break;
- 
-       n = GET_MODE_NUNITS (mode);
-       for (i = 0; i < n; i++)
- 	ops[i] = XVECEXP (vals, 0, i);
-       ix86_expand_vector_init_interleave (mode, target, ops, n >> 1);
-       return;
- 
-     case E_V4HImode:
-     case E_V8QImode:
-       break;
- 
-     default:
-       gcc_unreachable ();
-     }
- 
-     {
-       int i, j, n_elts, n_words, n_elt_per_word;
-       machine_mode inner_mode;
-       rtx words[4], shift;
- 
-       inner_mode = GET_MODE_INNER (mode);
-       n_elts = GET_MODE_NUNITS (mode);
-       n_words = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
-       n_elt_per_word = n_elts / n_words;
-       shift = GEN_INT (GET_MODE_BITSIZE (inner_mode));
- 
-       for (i = 0; i < n_words; ++i)
- 	{
- 	  rtx word = NULL_RTX;
- 
- 	  for (j = 0; j < n_elt_per_word; ++j)
- 	    {
- 	      rtx elt = XVECEXP (vals, 0, (i+1)*n_elt_per_word - j - 1);
- 	      elt = convert_modes (word_mode, inner_mode, elt, true);
- 
- 	      if (j == 0)
- 		word = elt;
- 	      else
- 		{
- 		  word = expand_simple_binop (word_mode, ASHIFT, word, shift,
- 					      word, 1, OPTAB_LIB_WIDEN);
- 		  word = expand_simple_binop (word_mode, IOR, word, elt,
- 					      word, 1, OPTAB_LIB_WIDEN);
- 		}
- 	    }
- 
- 	  words[i] = word;
- 	}
- 
-       if (n_words == 1)
- 	emit_move_insn (target, gen_lowpart (mode, words[0]));
-       else if (n_words == 2)
- 	{
- 	  rtx tmp = gen_reg_rtx (mode);
- 	  emit_clobber (tmp);
- 	  emit_move_insn (gen_lowpart (word_mode, tmp), words[0]);
- 	  emit_move_insn (gen_highpart (word_mode, tmp), words[1]);
- 	  emit_move_insn (target, tmp);
- 	}
-       else if (n_words == 4)
- 	{
- 	  rtx tmp = gen_reg_rtx (V4SImode);
- 	  gcc_assert (word_mode == SImode);
- 	  vals = gen_rtx_PARALLEL (V4SImode, gen_rtvec_v (4, words));
- 	  ix86_expand_vector_init_general (false, V4SImode, tmp, vals);
- 	  emit_move_insn (target, gen_lowpart (mode, tmp));
- 	}
-       else
- 	gcc_unreachable ();
-     }
- }
- 
- /* Initialize vector TARGET via VALS.  Suppress the use of MMX
-    instructions unless MMX_OK is true.  */
- 
- void
- ix86_expand_vector_init (bool mmx_ok, rtx target, rtx vals)
- {
-   machine_mode mode = GET_MODE (target);
-   machine_mode inner_mode = GET_MODE_INNER (mode);
-   int n_elts = GET_MODE_NUNITS (mode);
-   int n_var = 0, one_var = -1;
-   bool all_same = true, all_const_zero = true;
-   int i;
-   rtx x;
- 
-   /* Handle first initialization from vector elts.  */
-   if (n_elts != XVECLEN (vals, 0))
-     {
-       rtx subtarget = target;
-       x = XVECEXP (vals, 0, 0);
-       gcc_assert (GET_MODE_INNER (GET_MODE (x)) == inner_mode);
-       if (GET_MODE_NUNITS (GET_MODE (x)) * 2 == n_elts)
- 	{
- 	  rtx ops[2] = { XVECEXP (vals, 0, 0), XVECEXP (vals, 0, 1) };
- 	  if (inner_mode == QImode || inner_mode == HImode)
- 	    {
- 	      unsigned int n_bits = n_elts * GET_MODE_SIZE (inner_mode);
- 	      mode = mode_for_vector (SImode, n_bits / 4).require ();
- 	      inner_mode = mode_for_vector (SImode, n_bits / 8).require ();
- 	      ops[0] = gen_lowpart (inner_mode, ops[0]);
- 	      ops[1] = gen_lowpart (inner_mode, ops[1]);
- 	      subtarget = gen_reg_rtx (mode);
- 	    }
- 	  ix86_expand_vector_init_concat (mode, subtarget, ops, 2);
- 	  if (subtarget != target)
- 	    emit_move_insn (target, gen_lowpart (GET_MODE (target), subtarget));
- 	  return;
- 	}
-       gcc_unreachable ();
-     }
- 
-   for (i = 0; i < n_elts; ++i)
-     {
-       x = XVECEXP (vals, 0, i);
-       if (!(CONST_SCALAR_INT_P (x)
- 	    || CONST_DOUBLE_P (x)
- 	    || CONST_FIXED_P (x)))
- 	n_var++, one_var = i;
-       else if (x != CONST0_RTX (inner_mode))
- 	all_const_zero = false;
-       if (i > 0 && !rtx_equal_p (x, XVECEXP (vals, 0, 0)))
- 	all_same = false;
-     }
- 
-   /* Constants are best loaded from the constant pool.  */
-   if (n_var == 0)
-     {
-       emit_move_insn (target, gen_rtx_CONST_VECTOR (mode, XVEC (vals, 0)));
-       return;
-     }
- 
-   /* If all values are identical, broadcast the value.  */
-   if (all_same
-       && ix86_expand_vector_init_duplicate (mmx_ok, mode, target,
- 					    XVECEXP (vals, 0, 0)))
-     return;
- 
-   /* Values where only one field is non-constant are best loaded from
-      the pool and overwritten via move later.  */
-   if (n_var == 1)
-     {
-       if (all_const_zero
- 	  && ix86_expand_vector_init_one_nonzero (mmx_ok, mode, target,
- 						  XVECEXP (vals, 0, one_var),
- 						  one_var))
- 	return;
- 
-       if (ix86_expand_vector_init_one_var (mmx_ok, mode, target, vals, one_var))
- 	return;
-     }
- 
-   ix86_expand_vector_init_general (mmx_ok, mode, target, vals);
- }
- 
- void
- ix86_expand_vector_set (bool mmx_ok, rtx target, rtx val, int elt)
- {
-   machine_mode mode = GET_MODE (target);
-   machine_mode inner_mode = GET_MODE_INNER (mode);
-   machine_mode half_mode;
-   bool use_vec_merge = false;
-   rtx tmp;
-   static rtx (*gen_extract[6][2]) (rtx, rtx)
-     = {
- 	{ gen_vec_extract_lo_v32qi, gen_vec_extract_hi_v32qi },
- 	{ gen_vec_extract_lo_v16hi, gen_vec_extract_hi_v16hi },
- 	{ gen_vec_extract_lo_v8si, gen_vec_extract_hi_v8si },
- 	{ gen_vec_extract_lo_v4di, gen_vec_extract_hi_v4di },
- 	{ gen_vec_extract_lo_v8sf, gen_vec_extract_hi_v8sf },
- 	{ gen_vec_extract_lo_v4df, gen_vec_extract_hi_v4df }
-       };
-   static rtx (*gen_insert[6][2]) (rtx, rtx, rtx)
-     = {
- 	{ gen_vec_set_lo_v32qi, gen_vec_set_hi_v32qi },
- 	{ gen_vec_set_lo_v16hi, gen_vec_set_hi_v16hi },
- 	{ gen_vec_set_lo_v8si, gen_vec_set_hi_v8si },
- 	{ gen_vec_set_lo_v4di, gen_vec_set_hi_v4di },
- 	{ gen_vec_set_lo_v8sf, gen_vec_set_hi_v8sf },
- 	{ gen_vec_set_lo_v4df, gen_vec_set_hi_v4df }
-       };
-   int i, j, n;
-   machine_mode mmode = VOIDmode;
-   rtx (*gen_blendm) (rtx, rtx, rtx, rtx);
- 
-   switch (mode)
-     {
-     case E_V2SFmode:
-     case E_V2SImode:
-       if (mmx_ok)
- 	{
- 	  tmp = gen_reg_rtx (GET_MODE_INNER (mode));
- 	  ix86_expand_vector_extract (true, tmp, target, 1 - elt);
- 	  if (elt == 0)
- 	    tmp = gen_rtx_VEC_CONCAT (mode, val, tmp);
- 	  else
- 	    tmp = gen_rtx_VEC_CONCAT (mode, tmp, val);
- 	  emit_insn (gen_rtx_SET (target, tmp));
- 	  return;
- 	}
-       break;
- 
-     case E_V2DImode:
-       use_vec_merge = TARGET_SSE4_1 && TARGET_64BIT;
-       if (use_vec_merge)
- 	break;
- 
-       tmp = gen_reg_rtx (GET_MODE_INNER (mode));
-       ix86_expand_vector_extract (false, tmp, target, 1 - elt);
-       if (elt == 0)
- 	tmp = gen_rtx_VEC_CONCAT (mode, val, tmp);
-       else
- 	tmp = gen_rtx_VEC_CONCAT (mode, tmp, val);
-       emit_insn (gen_rtx_SET (target, tmp));
-       return;
- 
-     case E_V2DFmode:
-       {
- 	rtx op0, op1;
- 
- 	/* For the two element vectors, we implement a VEC_CONCAT with
- 	   the extraction of the other element.  */
- 
- 	tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, GEN_INT (1 - elt)));
- 	tmp = gen_rtx_VEC_SELECT (inner_mode, target, tmp);
- 
- 	if (elt == 0)
- 	  op0 = val, op1 = tmp;
- 	else
- 	  op0 = tmp, op1 = val;
- 
- 	tmp = gen_rtx_VEC_CONCAT (mode, op0, op1);
- 	emit_insn (gen_rtx_SET (target, tmp));
-       }
-       return;
- 
-     case E_V4SFmode:
-       use_vec_merge = TARGET_SSE4_1;
-       if (use_vec_merge)
- 	break;
- 
-       switch (elt)
- 	{
- 	case 0:
- 	  use_vec_merge = true;
- 	  break;
- 
- 	case 1:
- 	  /* tmp = target = A B C D */
- 	  tmp = copy_to_reg (target);
- 	  /* target = A A B B */
- 	  emit_insn (gen_vec_interleave_lowv4sf (target, target, target));
- 	  /* target = X A B B */
- 	  ix86_expand_vector_set (false, target, val, 0);
- 	  /* target = A X C D  */
- 	  emit_insn (gen_sse_shufps_v4sf (target, target, tmp,
- 					  const1_rtx, const0_rtx,
- 					  GEN_INT (2+4), GEN_INT (3+4)));
- 	  return;
- 
- 	case 2:
- 	  /* tmp = target = A B C D */
- 	  tmp = copy_to_reg (target);
- 	  /* tmp = X B C D */
- 	  ix86_expand_vector_set (false, tmp, val, 0);
- 	  /* target = A B X D */
- 	  emit_insn (gen_sse_shufps_v4sf (target, target, tmp,
- 					  const0_rtx, const1_rtx,
- 					  GEN_INT (0+4), GEN_INT (3+4)));
- 	  return;
- 
- 	case 3:
- 	  /* tmp = target = A B C D */
- 	  tmp = copy_to_reg (target);
- 	  /* tmp = X B C D */
- 	  ix86_expand_vector_set (false, tmp, val, 0);
- 	  /* target = A B X D */
- 	  emit_insn (gen_sse_shufps_v4sf (target, target, tmp,
- 					  const0_rtx, const1_rtx,
- 					  GEN_INT (2+4), GEN_INT (0+4)));
- 	  return;
- 
- 	default:
- 	  gcc_unreachable ();
- 	}
-       break;
- 
-     case E_V4SImode:
-       use_vec_merge = TARGET_SSE4_1;
-       if (use_vec_merge)
- 	break;
- 
-       /* Element 0 handled by vec_merge below.  */
-       if (elt == 0)
- 	{
- 	  use_vec_merge = true;
- 	  break;
- 	}
- 
-       if (TARGET_SSE2)
- 	{
- 	  /* With SSE2, use integer shuffles to swap element 0 and ELT,
- 	     store into element 0, then shuffle them back.  */
- 
- 	  rtx order[4];
- 
- 	  order[0] = GEN_INT (elt);
- 	  order[1] = const1_rtx;
- 	  order[2] = const2_rtx;
- 	  order[3] = GEN_INT (3);
- 	  order[elt] = const0_rtx;
- 
- 	  emit_insn (gen_sse2_pshufd_1 (target, target, order[0],
- 					order[1], order[2], order[3]));
- 
- 	  ix86_expand_vector_set (false, target, val, 0);
- 
- 	  emit_insn (gen_sse2_pshufd_1 (target, target, order[0],
- 					order[1], order[2], order[3]));
- 	}
-       else
- 	{
- 	  /* For SSE1, we have to reuse the V4SF code.  */
- 	  rtx t = gen_reg_rtx (V4SFmode);
- 	  emit_move_insn (t, gen_lowpart (V4SFmode, target));
- 	  ix86_expand_vector_set (false, t, gen_lowpart (SFmode, val), elt);
- 	  emit_move_insn (target, gen_lowpart (mode, t));
- 	}
-       return;
- 
-     case E_V8HImode:
-       use_vec_merge = TARGET_SSE2;
-       break;
-     case E_V4HImode:
-       use_vec_merge = mmx_ok && (TARGET_SSE || TARGET_3DNOW_A);
-       break;
- 
-     case E_V16QImode:
-       use_vec_merge = TARGET_SSE4_1;
-       break;
- 
-     case E_V8QImode:
-       break;
- 
-     case E_V32QImode:
-       half_mode = V16QImode;
-       j = 0;
-       n = 16;
-       goto half;
- 
-     case E_V16HImode:
-       half_mode = V8HImode;
-       j = 1;
-       n = 8;
-       goto half;
- 
-     case E_V8SImode:
-       half_mode = V4SImode;
-       j = 2;
-       n = 4;
-       goto half;
- 
-     case E_V4DImode:
-       half_mode = V2DImode;
-       j = 3;
-       n = 2;
-       goto half;
- 
-     case E_V8SFmode:
-       half_mode = V4SFmode;
-       j = 4;
-       n = 4;
-       goto half;
- 
-     case E_V4DFmode:
-       half_mode = V2DFmode;
-       j = 5;
-       n = 2;
-       goto half;
- 
- half:
-       /* Compute offset.  */
-       i = elt / n;
-       elt %= n;
- 
-       gcc_assert (i <= 1);
- 
-       /* Extract the half.  */
-       tmp = gen_reg_rtx (half_mode);
-       emit_insn (gen_extract[j][i] (tmp, target));
- 
-       /* Put val in tmp at elt.  */
-       ix86_expand_vector_set (false, tmp, val, elt);
- 
-       /* Put it back.  */
-       emit_insn (gen_insert[j][i] (target, target, tmp));
-       return;
- 
-     case E_V8DFmode:
-       if (TARGET_AVX512F)
- 	{
- 	  mmode = QImode;
- 	  gen_blendm = gen_avx512f_blendmv8df;
- 	}
-       break;
- 
-     case E_V8DImode:
-       if (TARGET_AVX512F)
- 	{
- 	  mmode = QImode;
- 	  gen_blendm = gen_avx512f_blendmv8di;
- 	}
-       break;
- 
-     case E_V16SFmode:
-       if (TARGET_AVX512F)
- 	{
- 	  mmode = HImode;
- 	  gen_blendm = gen_avx512f_blendmv16sf;
- 	}
-       break;
- 
-     case E_V16SImode:
-       if (TARGET_AVX512F)
- 	{
- 	  mmode = HImode;
- 	  gen_blendm = gen_avx512f_blendmv16si;
- 	}
-       break;
- 
-     case E_V32HImode:
-       if (TARGET_AVX512BW)
- 	{
- 	  mmode = SImode;
- 	  gen_blendm = gen_avx512bw_blendmv32hi;
- 	}
-       else if (TARGET_AVX512F)
- 	{
- 	  half_mode = E_V8HImode;
- 	  n = 8;
- 	  goto quarter;
- 	}
-       break;
- 
-     case E_V64QImode:
-       if (TARGET_AVX512BW)
- 	{
- 	  mmode = DImode;
- 	  gen_blendm = gen_avx512bw_blendmv64qi;
- 	}
-       else if (TARGET_AVX512F)
- 	{
- 	  half_mode = E_V16QImode;
- 	  n = 16;
- 	  goto quarter;
- 	}
-       break;
- 
- quarter:
-       /* Compute offset.  */
-       i = elt / n;
-       elt %= n;
- 
-       gcc_assert (i <= 3);
- 
-       {
- 	/* Extract the quarter.  */
- 	tmp = gen_reg_rtx (V4SImode);
- 	rtx tmp2 = gen_lowpart (V16SImode, target);
- 	rtx mask = gen_reg_rtx (QImode);
- 
- 	emit_move_insn (mask, constm1_rtx);
- 	emit_insn (gen_avx512f_vextracti32x4_mask (tmp, tmp2, GEN_INT (i),
- 						   tmp, mask));
- 
- 	tmp2 = gen_reg_rtx (half_mode);
- 	emit_move_insn (tmp2, gen_lowpart (half_mode, tmp));
- 	tmp = tmp2;
- 
- 	/* Put val in tmp at elt.  */
- 	ix86_expand_vector_set (false, tmp, val, elt);
- 
- 	/* Put it back.  */
- 	tmp2 = gen_reg_rtx (V16SImode);
- 	rtx tmp3 = gen_lowpart (V16SImode, target);
- 	mask = gen_reg_rtx (HImode);
- 	emit_move_insn (mask, constm1_rtx);
- 	tmp = gen_lowpart (V4SImode, tmp);
- 	emit_insn (gen_avx512f_vinserti32x4_mask (tmp2, tmp3, tmp, GEN_INT (i),
- 						  tmp3, mask));
- 	emit_move_insn (target, gen_lowpart (mode, tmp2));
-       }
-       return;
- 
-     default:
-       break;
-     }
- 
-   if (mmode != VOIDmode)
-     {
-       tmp = gen_reg_rtx (mode);
-       emit_insn (gen_rtx_SET (tmp, gen_rtx_VEC_DUPLICATE (mode, val)));
-       /* The avx512*_blendm<mode> expanders have different operand order
- 	 from VEC_MERGE.  In VEC_MERGE, the first input operand is used for
- 	 elements where the mask is set and second input operand otherwise,
- 	 in {sse,avx}*_*blend* the first input operand is used for elements
- 	 where the mask is clear and second input operand otherwise.  */
-       emit_insn (gen_blendm (target, target, tmp,
- 			     force_reg (mmode,
- 					gen_int_mode (HOST_WIDE_INT_1U << elt,
- 						      mmode))));
-     }
-   else if (use_vec_merge)
-     {
-       tmp = gen_rtx_VEC_DUPLICATE (mode, val);
-       tmp = gen_rtx_VEC_MERGE (mode, tmp, target,
- 			       GEN_INT (HOST_WIDE_INT_1U << elt));
-       emit_insn (gen_rtx_SET (target, tmp));
-     }
-   else
-     {
-       rtx mem = assign_stack_temp (mode, GET_MODE_SIZE (mode));
- 
-       emit_move_insn (mem, target);
- 
-       tmp = adjust_address (mem, inner_mode, elt * GET_MODE_SIZE (inner_mode));
-       emit_move_insn (tmp, val);
- 
-       emit_move_insn (target, mem);
-     }
- }
- 
- void
- ix86_expand_vector_extract (bool mmx_ok, rtx target, rtx vec, int elt)
- {
-   machine_mode mode = GET_MODE (vec);
-   machine_mode inner_mode = GET_MODE_INNER (mode);
-   bool use_vec_extr = false;
-   rtx tmp;
- 
-   switch (mode)
-     {
-     case E_V2SImode:
-     case E_V2SFmode:
-       if (!mmx_ok)
- 	break;
-       /* FALLTHRU */
- 
-     case E_V2DFmode:
-     case E_V2DImode:
-     case E_V2TImode:
-     case E_V4TImode:
-       use_vec_extr = true;
-       break;
- 
-     case E_V4SFmode:
-       use_vec_extr = TARGET_SSE4_1;
-       if (use_vec_extr)
- 	break;
- 
-       switch (elt)
- 	{
- 	case 0:
- 	  tmp = vec;
- 	  break;
- 
- 	case 1:
- 	case 3:
- 	  tmp = gen_reg_rtx (mode);
- 	  emit_insn (gen_sse_shufps_v4sf (tmp, vec, vec,
- 				       GEN_INT (elt), GEN_INT (elt),
- 				       GEN_INT (elt+4), GEN_INT (elt+4)));
- 	  break;
- 
- 	case 2:
- 	  tmp = gen_reg_rtx (mode);
- 	  emit_insn (gen_vec_interleave_highv4sf (tmp, vec, vec));
- 	  break;
- 
- 	default:
- 	  gcc_unreachable ();
- 	}
-       vec = tmp;
-       use_vec_extr = true;
-       elt = 0;
-       break;
- 
-     case E_V4SImode:
-       use_vec_extr = TARGET_SSE4_1;
-       if (use_vec_extr)
- 	break;
- 
-       if (TARGET_SSE2)
- 	{
- 	  switch (elt)
- 	    {
- 	    case 0:
- 	      tmp = vec;
- 	      break;
- 
- 	    case 1:
- 	    case 3:
- 	      tmp = gen_reg_rtx (mode);
- 	      emit_insn (gen_sse2_pshufd_1 (tmp, vec,
- 					    GEN_INT (elt), GEN_INT (elt),
- 					    GEN_INT (elt), GEN_INT (elt)));
- 	      break;
- 
- 	    case 2:
- 	      tmp = gen_reg_rtx (mode);
- 	      emit_insn (gen_vec_interleave_highv4si (tmp, vec, vec));
- 	      break;
- 
- 	    default:
- 	      gcc_unreachable ();
- 	    }
- 	  vec = tmp;
- 	  use_vec_extr = true;
- 	  elt = 0;
- 	}
-       else
- 	{
- 	  /* For SSE1, we have to reuse the V4SF code.  */
- 	  ix86_expand_vector_extract (false, gen_lowpart (SFmode, target),
- 				      gen_lowpart (V4SFmode, vec), elt);
- 	  return;
- 	}
-       break;
- 
-     case E_V8HImode:
-       use_vec_extr = TARGET_SSE2;
-       break;
-     case E_V4HImode:
-       use_vec_extr = mmx_ok && (TARGET_SSE || TARGET_3DNOW_A);
-       break;
- 
-     case E_V16QImode:
-       use_vec_extr = TARGET_SSE4_1;
-       break;
- 
-     case E_V8SFmode:
-       if (TARGET_AVX)
- 	{
- 	  tmp = gen_reg_rtx (V4SFmode);
- 	  if (elt < 4)
- 	    emit_insn (gen_vec_extract_lo_v8sf (tmp, vec));
- 	  else
- 	    emit_insn (gen_vec_extract_hi_v8sf (tmp, vec));
- 	  ix86_expand_vector_extract (false, target, tmp, elt & 3);
- 	  return;
- 	}
-       break;
- 
-     case E_V4DFmode:
-       if (TARGET_AVX)
- 	{
- 	  tmp = gen_reg_rtx (V2DFmode);
- 	  if (elt < 2)
- 	    emit_insn (gen_vec_extract_lo_v4df (tmp, vec));
- 	  else
- 	    emit_insn (gen_vec_extract_hi_v4df (tmp, vec));
- 	  ix86_expand_vector_extract (false, target, tmp, elt & 1);
- 	  return;
- 	}
-       break;
- 
-     case E_V32QImode:
-       if (TARGET_AVX)
- 	{
- 	  tmp = gen_reg_rtx (V16QImode);
- 	  if (elt < 16)
- 	    emit_insn (gen_vec_extract_lo_v32qi (tmp, vec));
- 	  else
- 	    emit_insn (gen_vec_extract_hi_v32qi (tmp, vec));
- 	  ix86_expand_vector_extract (false, target, tmp, elt & 15);
- 	  return;
- 	}
-       break;
- 
-     case E_V16HImode:
-       if (TARGET_AVX)
- 	{
- 	  tmp = gen_reg_rtx (V8HImode);
- 	  if (elt < 8)
- 	    emit_insn (gen_vec_extract_lo_v16hi (tmp, vec));
- 	  else
- 	    emit_insn (gen_vec_extract_hi_v16hi (tmp, vec));
- 	  ix86_expand_vector_extract (false, target, tmp, elt & 7);
- 	  return;
- 	}
-       break;
- 
-     case E_V8SImode:
-       if (TARGET_AVX)
- 	{
- 	  tmp = gen_reg_rtx (V4SImode);
- 	  if (elt < 4)
- 	    emit_insn (gen_vec_extract_lo_v8si (tmp, vec));
- 	  else
- 	    emit_insn (gen_vec_extract_hi_v8si (tmp, vec));
- 	  ix86_expand_vector_extract (false, target, tmp, elt & 3);
- 	  return;
- 	}
-       break;
- 
-     case E_V4DImode:
-       if (TARGET_AVX)
- 	{
- 	  tmp = gen_reg_rtx (V2DImode);
- 	  if (elt < 2)
- 	    emit_insn (gen_vec_extract_lo_v4di (tmp, vec));
- 	  else
- 	    emit_insn (gen_vec_extract_hi_v4di (tmp, vec));
- 	  ix86_expand_vector_extract (false, target, tmp, elt & 1);
- 	  return;
- 	}
-       break;
- 
-     case E_V32HImode:
-       if (TARGET_AVX512BW)
- 	{
- 	  tmp = gen_reg_rtx (V16HImode);
- 	  if (elt < 16)
- 	    emit_insn (gen_vec_extract_lo_v32hi (tmp, vec));
- 	  else
- 	    emit_insn (gen_vec_extract_hi_v32hi (tmp, vec));
- 	  ix86_expand_vector_extract (false, target, tmp, elt & 15);
- 	  return;
- 	}
-       break;
- 
-     case E_V64QImode:
-       if (TARGET_AVX512BW)
- 	{
- 	  tmp = gen_reg_rtx (V32QImode);
- 	  if (elt < 32)
- 	    emit_insn (gen_vec_extract_lo_v64qi (tmp, vec));
- 	  else
- 	    emit_insn (gen_vec_extract_hi_v64qi (tmp, vec));
- 	  ix86_expand_vector_extract (false, target, tmp, elt & 31);
- 	  return;
- 	}
-       break;
- 
-     case E_V16SFmode:
-       tmp = gen_reg_rtx (V8SFmode);
-       if (elt < 8)
- 	emit_insn (gen_vec_extract_lo_v16sf (tmp, vec));
-       else
- 	emit_insn (gen_vec_extract_hi_v16sf (tmp, vec));
-       ix86_expand_vector_extract (false, target, tmp, elt & 7);
-       return;
- 
-     case E_V8DFmode:
-       tmp = gen_reg_rtx (V4DFmode);
-       if (elt < 4)
- 	emit_insn (gen_vec_extract_lo_v8df (tmp, vec));
-       else
- 	emit_insn (gen_vec_extract_hi_v8df (tmp, vec));
-       ix86_expand_vector_extract (false, target, tmp, elt & 3);
-       return;
- 
-     case E_V16SImode:
-       tmp = gen_reg_rtx (V8SImode);
-       if (elt < 8)
- 	emit_insn (gen_vec_extract_lo_v16si (tmp, vec));
-       else
- 	emit_insn (gen_vec_extract_hi_v16si (tmp, vec));
-       ix86_expand_vector_extract (false, target, tmp, elt & 7);
-       return;
- 
-     case E_V8DImode:
-       tmp = gen_reg_rtx (V4DImode);
-       if (elt < 4)
- 	emit_insn (gen_vec_extract_lo_v8di (tmp, vec));
-       else
- 	emit_insn (gen_vec_extract_hi_v8di (tmp, vec));
-       ix86_expand_vector_extract (false, target, tmp, elt & 3);
-       return;
- 
-     case E_V8QImode:
-       /* ??? Could extract the appropriate HImode element and shift.  */
-     default:
-       break;
-     }
- 
-   if (use_vec_extr)
-     {
-       tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, GEN_INT (elt)));
-       tmp = gen_rtx_VEC_SELECT (inner_mode, vec, tmp);
- 
-       /* Let the rtl optimizers know about the zero extension performed.  */
-       if (inner_mode == QImode || inner_mode == HImode)
- 	{
- 	  tmp = gen_rtx_ZERO_EXTEND (SImode, tmp);
- 	  target = gen_lowpart (SImode, target);
- 	}
- 
-       emit_insn (gen_rtx_SET (target, tmp));
-     }
-   else
-     {
-       rtx mem = assign_stack_temp (mode, GET_MODE_SIZE (mode));
- 
-       emit_move_insn (mem, vec);
- 
-       tmp = adjust_address (mem, inner_mode, elt*GET_MODE_SIZE (inner_mode));
-       emit_move_insn (target, tmp);
-     }
- }
- 
- /* Generate code to copy vector bits i / 2 ... i - 1 from vector SRC
-    to bits 0 ... i / 2 - 1 of vector DEST, which has the same mode.
-    The upper bits of DEST are undefined, though they shouldn't cause
-    exceptions (some bits from src or all zeros are ok).  */
- 
- static void
- emit_reduc_half (rtx dest, rtx src, int i)
- {
-   rtx tem, d = dest;
-   switch (GET_MODE (src))
-     {
-     case E_V4SFmode:
-       if (i == 128)
- 	tem = gen_sse_movhlps (dest, src, src);
-       else
- 	tem = gen_sse_shufps_v4sf (dest, src, src, const1_rtx, const1_rtx,
- 				   GEN_INT (1 + 4), GEN_INT (1 + 4));
-       break;
-     case E_V2DFmode:
-       tem = gen_vec_interleave_highv2df (dest, src, src);
-       break;
-     case E_V16QImode:
-     case E_V8HImode:
-     case E_V4SImode:
-     case E_V2DImode:
-       d = gen_reg_rtx (V1TImode);
-       tem = gen_sse2_lshrv1ti3 (d, gen_lowpart (V1TImode, src),
- 				GEN_INT (i / 2));
-       break;
-     case E_V8SFmode:
-       if (i == 256)
- 	tem = gen_avx_vperm2f128v8sf3 (dest, src, src, const1_rtx);
-       else
- 	tem = gen_avx_shufps256 (dest, src, src,
- 				 GEN_INT (i == 128 ? 2 + (3 << 2) : 1));
-       break;
-     case E_V4DFmode:
-       if (i == 256)
- 	tem = gen_avx_vperm2f128v4df3 (dest, src, src, const1_rtx);
-       else
- 	tem = gen_avx_shufpd256 (dest, src, src, const1_rtx);
-       break;
-     case E_V32QImode:
-     case E_V16HImode:
-     case E_V8SImode:
-     case E_V4DImode:
-       if (i == 256)
- 	{
- 	  if (GET_MODE (dest) != V4DImode)
- 	    d = gen_reg_rtx (V4DImode);
- 	  tem = gen_avx2_permv2ti (d, gen_lowpart (V4DImode, src),
- 				   gen_lowpart (V4DImode, src),
- 				   const1_rtx);
- 	}
-       else
- 	{
- 	  d = gen_reg_rtx (V2TImode);
- 	  tem = gen_avx2_lshrv2ti3 (d, gen_lowpart (V2TImode, src),
- 				    GEN_INT (i / 2));
- 	}
-       break;
-     case E_V64QImode:
-     case E_V32HImode:
-     case E_V16SImode:
-     case E_V16SFmode:
-     case E_V8DImode:
-     case E_V8DFmode:
-       if (i > 128)
- 	tem = gen_avx512f_shuf_i32x4_1 (gen_lowpart (V16SImode, dest),
- 				      gen_lowpart (V16SImode, src),
- 				      gen_lowpart (V16SImode, src),
- 				      GEN_INT (0x4 + (i == 512 ? 4 : 0)),
- 				      GEN_INT (0x5 + (i == 512 ? 4 : 0)),
- 				      GEN_INT (0x6 + (i == 512 ? 4 : 0)),
- 				      GEN_INT (0x7 + (i == 512 ? 4 : 0)),
- 				      GEN_INT (0xC), GEN_INT (0xD),
- 				      GEN_INT (0xE), GEN_INT (0xF),
- 				      GEN_INT (0x10), GEN_INT (0x11),
- 				      GEN_INT (0x12), GEN_INT (0x13),
- 				      GEN_INT (0x14), GEN_INT (0x15),
- 				      GEN_INT (0x16), GEN_INT (0x17));
-       else
- 	tem = gen_avx512f_pshufd_1 (gen_lowpart (V16SImode, dest),
- 				   gen_lowpart (V16SImode, src),
- 				   GEN_INT (i == 128 ? 0x2 : 0x1),
- 				   GEN_INT (0x3),
- 				   GEN_INT (0x3),
- 				   GEN_INT (0x3),
- 				   GEN_INT (i == 128 ? 0x6 : 0x5),
- 				   GEN_INT (0x7),
- 				   GEN_INT (0x7),
- 				   GEN_INT (0x7),
- 				   GEN_INT (i == 128 ? 0xA : 0x9),
- 				   GEN_INT (0xB),
- 				   GEN_INT (0xB),
- 				   GEN_INT (0xB),
- 				   GEN_INT (i == 128 ? 0xE : 0xD),
- 				   GEN_INT (0xF),
- 				   GEN_INT (0xF),
- 				   GEN_INT (0xF));
-       break;
-     default:
-       gcc_unreachable ();
-     }
-   emit_insn (tem);
-   if (d != dest)
-     emit_move_insn (dest, gen_lowpart (GET_MODE (dest), d));
- }
- 
- /* Expand a vector reduction.  FN is the binary pattern to reduce;
-    DEST is the destination; IN is the input vector.  */
- 
- void
- ix86_expand_reduc (rtx (*fn) (rtx, rtx, rtx), rtx dest, rtx in)
- {
-   rtx half, dst, vec = in;
-   machine_mode mode = GET_MODE (in);
-   int i;
- 
-   /* SSE4 has a special instruction for V8HImode UMIN reduction.  */
-   if (TARGET_SSE4_1
-       && mode == V8HImode
-       && fn == gen_uminv8hi3)
-     {
-       emit_insn (gen_sse4_1_phminposuw (dest, in));
-       return;
-     }
- 
-   for (i = GET_MODE_BITSIZE (mode);
-        i > GET_MODE_UNIT_BITSIZE (mode);
-        i >>= 1)
-     {
-       half = gen_reg_rtx (mode);
-       emit_reduc_half (half, vec, i);
-       if (i == GET_MODE_UNIT_BITSIZE (mode) * 2)
- 	dst = dest;
-       else
- 	dst = gen_reg_rtx (mode);
-       emit_insn (fn (dst, half, vec));
-       vec = dst;
-     }
- }
- 
  /* Target hook for scalar_mode_supported_p.  */
  static bool
  ix86_scalar_mode_supported_p (scalar_mode mode)
--- 20986,20991 ----
*************** ix86_vector_mode_supported_p (machine_mo
*** 44254,44260 ****
      return true;
    if (TARGET_AVX512F && VALID_AVX512F_REG_MODE (mode))
      return true;
!   if (TARGET_MMX && VALID_MMX_REG_MODE (mode))
      return true;
    if (TARGET_3DNOW && VALID_MMX_REG_MODE_3DNOW (mode))
      return true;
--- 21010,21016 ----
      return true;
    if (TARGET_AVX512F && VALID_AVX512F_REG_MODE (mode))
      return true;
!   if ((TARGET_MMX || TARGET_MMX_WITH_SSE) && VALID_MMX_REG_MODE (mode))
      return true;
    if (TARGET_3DNOW && VALID_MMX_REG_MODE_3DNOW (mode))
      return true;
*************** ix86_md_asm_adjust (vec<rtx> &outputs, v
*** 44294,44300 ****
        con += 4;
        if (strchr (con, ',') != NULL)
  	{
! 	  error ("alternatives not allowed in asm flag output");
  	  continue;
  	}
  
--- 21050,21056 ----
        con += 4;
        if (strchr (con, ',') != NULL)
  	{
! 	  error ("alternatives not allowed in %<asm%> flag output");
  	  continue;
  	}
  
*************** ix86_md_asm_adjust (vec<rtx> &outputs, v
*** 44358,44364 ****
  	}
        if (code == UNKNOWN)
  	{
! 	  error ("unknown asm flag output %qs", constraints[i]);
  	  continue;
  	}
        if (invert)
--- 21114,21120 ----
  	}
        if (code == UNKNOWN)
  	{
! 	  error ("unknown %<asm%> flag output %qs", constraints[i]);
  	  continue;
  	}
        if (invert)
*************** ix86_md_asm_adjust (vec<rtx> &outputs, v
*** 44387,44393 ****
        machine_mode dest_mode = GET_MODE (dest);
        if (!SCALAR_INT_MODE_P (dest_mode))
  	{
! 	  error ("invalid type for asm flag output");
  	  continue;
  	}
  
--- 21143,21149 ----
        machine_mode dest_mode = GET_MODE (dest);
        if (!SCALAR_INT_MODE_P (dest_mode))
  	{
! 	  error ("invalid type for %<asm%> flag output");
  	  continue;
  	}
  
*************** output_387_reg_move (rtx_insn *insn, rtx
*** 44497,45086 ****
    else
      gcc_unreachable();
  }
- 
- /* Output code to perform a conditional jump to LABEL, if C2 flag in
-    FP status register is set.  */
- 
- void
- ix86_emit_fp_unordered_jump (rtx label)
- {
-   rtx reg = gen_reg_rtx (HImode);
-   rtx_insn *insn;
-   rtx temp;
- 
-   emit_insn (gen_x86_fnstsw_1 (reg));
- 
-   if (TARGET_SAHF && (TARGET_USE_SAHF || optimize_insn_for_size_p ()))
-     {
-       emit_insn (gen_x86_sahf_1 (reg));
- 
-       temp = gen_rtx_REG (CCmode, FLAGS_REG);
-       temp = gen_rtx_UNORDERED (VOIDmode, temp, const0_rtx);
-     }
-   else
-     {
-       emit_insn (gen_testqi_ext_1_ccno (reg, GEN_INT (0x04)));
- 
-       temp = gen_rtx_REG (CCNOmode, FLAGS_REG);
-       temp = gen_rtx_NE (VOIDmode, temp, const0_rtx);
-     }
- 
-   temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
- 			      gen_rtx_LABEL_REF (VOIDmode, label),
- 			      pc_rtx);
-   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, temp));
-   predict_jump (REG_BR_PROB_BASE * 10 / 100);
-   JUMP_LABEL (insn) = label;
- }
- 
- /* Output code to perform an sinh XFmode calculation.  */
- 
- void ix86_emit_i387_sinh (rtx op0, rtx op1)
- {
-   rtx e1 = gen_reg_rtx (XFmode);
-   rtx e2 = gen_reg_rtx (XFmode);
-   rtx scratch = gen_reg_rtx (HImode);
-   rtx flags = gen_rtx_REG (CCNOmode, FLAGS_REG);
-   rtx half = const_double_from_real_value (dconsthalf, XFmode);
-   rtx cst1, tmp;
-   rtx_code_label *jump_label = gen_label_rtx ();
-   rtx_insn *insn;
- 
-   /* scratch = fxam (op1) */
-   emit_insn (gen_fxamxf2_i387 (scratch, op1));
- 
-   /* e1 = expm1 (|op1|) */
-   emit_insn (gen_absxf2 (e2, op1));
-   emit_insn (gen_expm1xf2 (e1, e2));
- 
-   /* e2 = e1 / (e1 + 1.0) + e1 */
-   cst1 = force_reg (XFmode, CONST1_RTX (XFmode));
-   emit_insn (gen_addxf3 (e2, e1, cst1));
-   emit_insn (gen_divxf3 (e2, e1, e2));
-   emit_insn (gen_addxf3 (e2, e2, e1));
- 
-   /* flags = signbit (op1) */
-   emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x02)));
- 
-   /* if (flags) then e2 = -e2 */
-   tmp = gen_rtx_IF_THEN_ELSE (VOIDmode,
- 			      gen_rtx_EQ (VOIDmode, flags, const0_rtx),
- 			      gen_rtx_LABEL_REF (VOIDmode, jump_label),
- 			      pc_rtx);
-   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
-   predict_jump (REG_BR_PROB_BASE * 50 / 100);
-   JUMP_LABEL (insn) = jump_label;
- 
-   emit_insn (gen_negxf2 (e2, e2));
- 
-   emit_label (jump_label);
-   LABEL_NUSES (jump_label) = 1;
- 
-   /* op0 = 0.5 * e2 */
-   half = force_reg (XFmode, half);
-   emit_insn (gen_mulxf3 (op0, e2, half));
- }
- 
- /* Output code to perform an cosh XFmode calculation.  */
- 
- void ix86_emit_i387_cosh (rtx op0, rtx op1)
- {
-   rtx e1 = gen_reg_rtx (XFmode);
-   rtx e2 = gen_reg_rtx (XFmode);
-   rtx half = const_double_from_real_value (dconsthalf, XFmode);
-   rtx cst1;
- 
-   /* e1 = exp (op1) */
-   emit_insn (gen_expxf2 (e1, op1));
- 
-   /* e2 = e1 + 1.0 / e1 */
-   cst1 = force_reg (XFmode, CONST1_RTX (XFmode));
-   emit_insn (gen_divxf3 (e2, cst1, e1));
-   emit_insn (gen_addxf3 (e2, e1, e2));
- 
-   /* op0 = 0.5 * e2 */
-   half = force_reg (XFmode, half);
-   emit_insn (gen_mulxf3 (op0, e2, half));
- }
- 
- /* Output code to perform an tanh XFmode calculation.  */
- 
- void ix86_emit_i387_tanh (rtx op0, rtx op1)
- {
-   rtx e1 = gen_reg_rtx (XFmode);
-   rtx e2 = gen_reg_rtx (XFmode);
-   rtx scratch = gen_reg_rtx (HImode);
-   rtx flags = gen_rtx_REG (CCNOmode, FLAGS_REG);
-   rtx cst2, tmp;
-   rtx_code_label *jump_label = gen_label_rtx ();
-   rtx_insn *insn;
- 
-   /* scratch = fxam (op1) */
-   emit_insn (gen_fxamxf2_i387 (scratch, op1));
- 
-   /* e1 = expm1 (-|2 * op1|) */
-   emit_insn (gen_addxf3 (e2, op1, op1));
-   emit_insn (gen_absxf2 (e2, e2));
-   emit_insn (gen_negxf2 (e2, e2));
-   emit_insn (gen_expm1xf2 (e1, e2));
- 
-   /* e2 = e1 / (e1 + 2.0) */
-   cst2 = force_reg (XFmode, CONST2_RTX (XFmode));
-   emit_insn (gen_addxf3 (e2, e1, cst2));
-   emit_insn (gen_divxf3 (e2, e1, e2));
- 
-   /* flags = signbit (op1) */
-   emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x02)));
- 
-   /* if (!flags) then e2 = -e2 */
-   tmp = gen_rtx_IF_THEN_ELSE (VOIDmode,
- 			      gen_rtx_NE (VOIDmode, flags, const0_rtx),
- 			      gen_rtx_LABEL_REF (VOIDmode, jump_label),
- 			      pc_rtx);
-   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
-   predict_jump (REG_BR_PROB_BASE * 50 / 100);
-   JUMP_LABEL (insn) = jump_label;
- 
-   emit_insn (gen_negxf2 (e2, e2));
- 
-   emit_label (jump_label);
-   LABEL_NUSES (jump_label) = 1;
- 
-   emit_move_insn (op0, e2);
- }
- 
- /* Output code to perform an asinh XFmode calculation.  */
- 
- void ix86_emit_i387_asinh (rtx op0, rtx op1)
- {
-   rtx e1 = gen_reg_rtx (XFmode);
-   rtx e2 = gen_reg_rtx (XFmode);
-   rtx scratch = gen_reg_rtx (HImode);
-   rtx flags = gen_rtx_REG (CCNOmode, FLAGS_REG);
-   rtx cst1, tmp;
-   rtx_code_label *jump_label = gen_label_rtx ();
-   rtx_insn *insn;
- 
-   /* e2 = sqrt (op1^2 + 1.0) + 1.0 */
-   emit_insn (gen_mulxf3 (e1, op1, op1));
-   cst1 = force_reg (XFmode, CONST1_RTX (XFmode));
-   emit_insn (gen_addxf3 (e2, e1, cst1));
-   emit_insn (gen_sqrtxf2 (e2, e2));
-   emit_insn (gen_addxf3 (e2, e2, cst1));
- 
-   /* e1 = e1 / e2 */
-   emit_insn (gen_divxf3 (e1, e1, e2));
- 
-   /* scratch = fxam (op1) */
-   emit_insn (gen_fxamxf2_i387 (scratch, op1));
- 
-   /* e1 = e1 + |op1| */
-   emit_insn (gen_absxf2 (e2, op1));
-   emit_insn (gen_addxf3 (e1, e1, e2));
- 
-   /* e2 = log1p (e1) */
-   ix86_emit_i387_log1p (e2, e1);
- 
-   /* flags = signbit (op1) */
-   emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x02)));
- 
-   /* if (flags) then e2 = -e2 */
-   tmp = gen_rtx_IF_THEN_ELSE (VOIDmode,
- 			      gen_rtx_EQ (VOIDmode, flags, const0_rtx),
- 			      gen_rtx_LABEL_REF (VOIDmode, jump_label),
- 			      pc_rtx);
-   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
-   predict_jump (REG_BR_PROB_BASE * 50 / 100);
-   JUMP_LABEL (insn) = jump_label;
- 
-   emit_insn (gen_negxf2 (e2, e2));
- 
-   emit_label (jump_label);
-   LABEL_NUSES (jump_label) = 1;
- 
-   emit_move_insn (op0, e2);
- }
- 
- /* Output code to perform an acosh XFmode calculation.  */
- 
- void ix86_emit_i387_acosh (rtx op0, rtx op1)
- {
-   rtx e1 = gen_reg_rtx (XFmode);
-   rtx e2 = gen_reg_rtx (XFmode);
-   rtx cst1 = force_reg (XFmode, CONST1_RTX (XFmode));
- 
-   /* e2 = sqrt (op1 + 1.0) */
-   emit_insn (gen_addxf3 (e2, op1, cst1));
-   emit_insn (gen_sqrtxf2 (e2, e2));
- 
-   /* e1 = sqrt (op1 - 1.0) */
-   emit_insn (gen_subxf3 (e1, op1, cst1));
-   emit_insn (gen_sqrtxf2 (e1, e1));
- 
-   /* e1 = e1 * e2 */
-   emit_insn (gen_mulxf3 (e1, e1, e2));
- 
-   /* e1 = e1 + op1 */
-   emit_insn (gen_addxf3 (e1, e1, op1));
- 
-   /* op0 = log (e1) */
-   emit_insn (gen_logxf2 (op0, e1));
- }
- 
- /* Output code to perform an atanh XFmode calculation.  */
- 
- void ix86_emit_i387_atanh (rtx op0, rtx op1)
- {
-   rtx e1 = gen_reg_rtx (XFmode);
-   rtx e2 = gen_reg_rtx (XFmode);
-   rtx scratch = gen_reg_rtx (HImode);
-   rtx flags = gen_rtx_REG (CCNOmode, FLAGS_REG);
-   rtx half = const_double_from_real_value (dconsthalf, XFmode);
-   rtx cst1, tmp;
-   rtx_code_label *jump_label = gen_label_rtx ();
-   rtx_insn *insn;
- 
-   /* scratch = fxam (op1) */
-   emit_insn (gen_fxamxf2_i387 (scratch, op1));
- 
-   /* e2 = |op1| */
-   emit_insn (gen_absxf2 (e2, op1));
- 
-   /* e1 = -(e2 + e2) / (e2 + 1.0) */
-   cst1 = force_reg (XFmode, CONST1_RTX (XFmode));
-   emit_insn (gen_addxf3 (e1, e2, cst1));
-   emit_insn (gen_addxf3 (e2, e2, e2));
-   emit_insn (gen_negxf2 (e2, e2));
-   emit_insn (gen_divxf3 (e1, e2, e1));
- 
-   /* e2 = log1p (e1) */
-   ix86_emit_i387_log1p (e2, e1);
- 
-   /* flags = signbit (op1) */
-   emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x02)));
- 
-   /* if (!flags) then e2 = -e2 */
-   tmp = gen_rtx_IF_THEN_ELSE (VOIDmode,
- 			      gen_rtx_NE (VOIDmode, flags, const0_rtx),
- 			      gen_rtx_LABEL_REF (VOIDmode, jump_label),
- 			      pc_rtx);
-   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
-   predict_jump (REG_BR_PROB_BASE * 50 / 100);
-   JUMP_LABEL (insn) = jump_label;
- 
-   emit_insn (gen_negxf2 (e2, e2));
- 
-   emit_label (jump_label);
-   LABEL_NUSES (jump_label) = 1;
- 
-   /* op0 = 0.5 * e2 */
-   half = force_reg (XFmode, half);
-   emit_insn (gen_mulxf3 (op0, e2, half));
- }
- 
- /* Output code to perform a log1p XFmode calculation.  */
- 
- void ix86_emit_i387_log1p (rtx op0, rtx op1)
- {
-   rtx_code_label *label1 = gen_label_rtx ();
-   rtx_code_label *label2 = gen_label_rtx ();
- 
-   rtx tmp = gen_reg_rtx (XFmode);
-   rtx res = gen_reg_rtx (XFmode);
-   rtx cst, cstln2, cst1;
-   rtx_insn *insn;
- 
-   cst = const_double_from_real_value
-     (REAL_VALUE_ATOF ("0.29289321881345247561810596348408353", XFmode), XFmode);
-   cstln2 = force_reg (XFmode, standard_80387_constant_rtx (4)); /* fldln2 */
- 
-   emit_insn (gen_absxf2 (tmp, op1));
- 
-   cst = force_reg (XFmode, cst);
-   ix86_expand_branch (GE, tmp, cst, label1);
-   predict_jump (REG_BR_PROB_BASE * 10 / 100);
-   insn = get_last_insn ();
-   JUMP_LABEL (insn) = label1;
- 
-   emit_insn (gen_fyl2xp1xf3_i387 (res, op1, cstln2));
-   emit_jump (label2);
- 
-   emit_label (label1);
-   LABEL_NUSES (label1) = 1;
- 
-   cst1 = force_reg (XFmode, CONST1_RTX (XFmode));
-   emit_insn (gen_rtx_SET (tmp, gen_rtx_PLUS (XFmode, op1, cst1)));
-   emit_insn (gen_fyl2xxf3_i387 (res, tmp, cstln2));
- 
-   emit_label (label2);
-   LABEL_NUSES (label2) = 1;
- 
-   emit_move_insn (op0, res);
- }
- 
- /* Emit code for round calculation.  */
- void ix86_emit_i387_round (rtx op0, rtx op1)
- {
-   machine_mode inmode = GET_MODE (op1);
-   machine_mode outmode = GET_MODE (op0);
-   rtx e1 = gen_reg_rtx (XFmode);
-   rtx e2 = gen_reg_rtx (XFmode);
-   rtx scratch = gen_reg_rtx (HImode);
-   rtx flags = gen_rtx_REG (CCNOmode, FLAGS_REG);
-   rtx half = const_double_from_real_value (dconsthalf, XFmode);
-   rtx res = gen_reg_rtx (outmode);
-   rtx_code_label *jump_label = gen_label_rtx ();
-   rtx (*floor_insn) (rtx, rtx);
-   rtx (*neg_insn) (rtx, rtx);
-   rtx_insn *insn;
-   rtx tmp;
- 
-   switch (inmode)
-     {
-     case E_SFmode:
-     case E_DFmode:
-       tmp = gen_reg_rtx (XFmode);
- 
-       emit_insn (gen_rtx_SET (tmp, gen_rtx_FLOAT_EXTEND (XFmode, op1)));
-       op1 = tmp;
-       break;
-     case E_XFmode:
-       break;
-     default:
-       gcc_unreachable ();
-     }
- 
-   switch (outmode)
-     {
-     case E_SFmode:
-       floor_insn = gen_frndintxf2_floor;
-       neg_insn = gen_negsf2;
-       break;
-     case E_DFmode:
-       floor_insn = gen_frndintxf2_floor;
-       neg_insn = gen_negdf2;
-       break;
-     case E_XFmode:
-       floor_insn = gen_frndintxf2_floor;
-       neg_insn = gen_negxf2;
-       break;
-     case E_HImode:
-       floor_insn = gen_lfloorxfhi2;
-       neg_insn = gen_neghi2;
-       break;
-     case E_SImode:
-       floor_insn = gen_lfloorxfsi2;
-       neg_insn = gen_negsi2;
-       break;
-     case E_DImode:
-       floor_insn = gen_lfloorxfdi2;
-       neg_insn = gen_negdi2;
-       break;
-     default:
-       gcc_unreachable ();
-     }
- 
-   /* round(a) = sgn(a) * floor(fabs(a) + 0.5) */
- 
-   /* scratch = fxam(op1) */
-   emit_insn (gen_fxamxf2_i387 (scratch, op1));
- 
-   /* e1 = fabs(op1) */
-   emit_insn (gen_absxf2 (e1, op1));
- 
-   /* e2 = e1 + 0.5 */
-   half = force_reg (XFmode, half);
-   emit_insn (gen_rtx_SET (e2, gen_rtx_PLUS (XFmode, e1, half)));
- 
-   /* res = floor(e2) */
-   switch (outmode)
-     {
-     case E_SFmode:
-     case E_DFmode:
-       {
- 	tmp = gen_reg_rtx (XFmode);
- 
- 	emit_insn (floor_insn (tmp, e2));
- 	emit_insn (gen_rtx_SET (res,
- 				gen_rtx_UNSPEC (outmode, gen_rtvec (1, tmp),
- 						UNSPEC_TRUNC_NOOP)));
-       }
-       break;
-     default:
-       emit_insn (floor_insn (res, e2));
-     }
- 
-   /* flags = signbit(a) */
-   emit_insn (gen_testqi_ext_1_ccno (scratch, GEN_INT (0x02)));
- 
-   /* if (flags) then res = -res */
-   tmp = gen_rtx_IF_THEN_ELSE (VOIDmode,
- 			      gen_rtx_EQ (VOIDmode, flags, const0_rtx),
- 			      gen_rtx_LABEL_REF (VOIDmode, jump_label),
- 			      pc_rtx);
-   insn = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
-   predict_jump (REG_BR_PROB_BASE * 50 / 100);
-   JUMP_LABEL (insn) = jump_label;
- 
-   emit_insn (neg_insn (res, res));
- 
-   emit_label (jump_label);
-   LABEL_NUSES (jump_label) = 1;
- 
-   emit_move_insn (op0, res);
- }
- 
- /* Output code to perform a Newton-Rhapson approximation of a single precision
-    floating point divide [http://en.wikipedia.org/wiki/N-th_root_algorithm].  */
- 
- void ix86_emit_swdivsf (rtx res, rtx a, rtx b, machine_mode mode)
- {
-   rtx x0, x1, e0, e1;
- 
-   x0 = gen_reg_rtx (mode);
-   e0 = gen_reg_rtx (mode);
-   e1 = gen_reg_rtx (mode);
-   x1 = gen_reg_rtx (mode);
- 
-   /* a / b = a * ((rcp(b) + rcp(b)) - (b * rcp(b) * rcp (b))) */
- 
-   b = force_reg (mode, b);
- 
-   /* x0 = rcp(b) estimate */
-   if (mode == V16SFmode || mode == V8DFmode)
-     {
-       if (TARGET_AVX512ER)
- 	{
- 	  emit_insn (gen_rtx_SET (x0, gen_rtx_UNSPEC (mode, gen_rtvec (1, b),
- 						      UNSPEC_RCP28)));
- 	  /* res = a * x0 */
- 	  emit_insn (gen_rtx_SET (res, gen_rtx_MULT (mode, a, x0)));
- 	  return;
- 	}
-       else
- 	emit_insn (gen_rtx_SET (x0, gen_rtx_UNSPEC (mode, gen_rtvec (1, b),
- 						    UNSPEC_RCP14)));
-     }
-   else
-     emit_insn (gen_rtx_SET (x0, gen_rtx_UNSPEC (mode, gen_rtvec (1, b),
- 						UNSPEC_RCP)));
- 
-   /* e0 = x0 * b */
-   emit_insn (gen_rtx_SET (e0, gen_rtx_MULT (mode, x0, b)));
- 
-   /* e0 = x0 * e0 */
-   emit_insn (gen_rtx_SET (e0, gen_rtx_MULT (mode, x0, e0)));
- 
-   /* e1 = x0 + x0 */
-   emit_insn (gen_rtx_SET (e1, gen_rtx_PLUS (mode, x0, x0)));
- 
-   /* x1 = e1 - e0 */
-   emit_insn (gen_rtx_SET (x1, gen_rtx_MINUS (mode, e1, e0)));
- 
-   /* res = a * x1 */
-   emit_insn (gen_rtx_SET (res, gen_rtx_MULT (mode, a, x1)));
- }
- 
- /* Output code to perform a Newton-Rhapson approximation of a
-    single precision floating point [reciprocal] square root.  */
- 
- void ix86_emit_swsqrtsf (rtx res, rtx a, machine_mode mode, bool recip)
- {
-   rtx x0, e0, e1, e2, e3, mthree, mhalf;
-   REAL_VALUE_TYPE r;
-   int unspec;
- 
-   x0 = gen_reg_rtx (mode);
-   e0 = gen_reg_rtx (mode);
-   e1 = gen_reg_rtx (mode);
-   e2 = gen_reg_rtx (mode);
-   e3 = gen_reg_rtx (mode);
- 
-   if (TARGET_AVX512ER && mode == V16SFmode)
-     {
-       if (recip)
- 	/* res = rsqrt28(a) estimate */
- 	emit_insn (gen_rtx_SET (res, gen_rtx_UNSPEC (mode, gen_rtvec (1, a),
- 						     UNSPEC_RSQRT28)));
-       else
- 	{
- 	  /* x0 = rsqrt28(a) estimate */
- 	  emit_insn (gen_rtx_SET (x0, gen_rtx_UNSPEC (mode, gen_rtvec (1, a),
- 						      UNSPEC_RSQRT28)));
- 	  /* res = rcp28(x0) estimate */
- 	  emit_insn (gen_rtx_SET (res, gen_rtx_UNSPEC (mode, gen_rtvec (1, x0),
- 						       UNSPEC_RCP28)));
- 	}
-       return;
-     }
- 
-   real_from_integer (&r, VOIDmode, -3, SIGNED);
-   mthree = const_double_from_real_value (r, SFmode);
- 
-   real_arithmetic (&r, NEGATE_EXPR, &dconsthalf, NULL);
-   mhalf = const_double_from_real_value (r, SFmode);
-   unspec = UNSPEC_RSQRT;
- 
-   if (VECTOR_MODE_P (mode))
-     {
-       mthree = ix86_build_const_vector (mode, true, mthree);
-       mhalf = ix86_build_const_vector (mode, true, mhalf);
-       /* There is no 512-bit rsqrt.  There is however rsqrt14.  */
-       if (GET_MODE_SIZE (mode) == 64)
- 	unspec = UNSPEC_RSQRT14;
-     }
- 
-   /* sqrt(a)  = -0.5 * a * rsqrtss(a) * (a * rsqrtss(a) * rsqrtss(a) - 3.0)
-      rsqrt(a) = -0.5     * rsqrtss(a) * (a * rsqrtss(a) * rsqrtss(a) - 3.0) */
- 
-   a = force_reg (mode, a);
- 
-   /* x0 = rsqrt(a) estimate */
-   emit_insn (gen_rtx_SET (x0, gen_rtx_UNSPEC (mode, gen_rtvec (1, a),
- 					      unspec)));
- 
-   /* If (a == 0.0) Filter out infinity to prevent NaN for sqrt(0.0).  */
-   if (!recip)
-     {
-       rtx zero = force_reg (mode, CONST0_RTX(mode));
-       rtx mask;
- 
-       /* Handle masked compare.  */
-       if (VECTOR_MODE_P (mode) && GET_MODE_SIZE (mode) == 64)
- 	{
- 	  mask = gen_reg_rtx (HImode);
- 	  /* Imm value 0x4 corresponds to not-equal comparison.  */
- 	  emit_insn (gen_avx512f_cmpv16sf3 (mask, zero, a, GEN_INT (0x4)));
- 	  emit_insn (gen_avx512f_blendmv16sf (x0, zero, x0, mask));
- 	}
-       else
- 	{
- 	  mask = gen_reg_rtx (mode);
- 	  emit_insn (gen_rtx_SET (mask, gen_rtx_NE (mode, zero, a)));
- 	  emit_insn (gen_rtx_SET (x0, gen_rtx_AND (mode, x0, mask)));
- 	}
-     }
- 
-   /* e0 = x0 * a */
-   emit_insn (gen_rtx_SET (e0, gen_rtx_MULT (mode, x0, a)));
-   /* e1 = e0 * x0 */
-   emit_insn (gen_rtx_SET (e1, gen_rtx_MULT (mode, e0, x0)));
- 
-   /* e2 = e1 - 3. */
-   mthree = force_reg (mode, mthree);
-   emit_insn (gen_rtx_SET (e2, gen_rtx_PLUS (mode, e1, mthree)));
- 
-   mhalf = force_reg (mode, mhalf);
-   if (recip)
-     /* e3 = -.5 * x0 */
-     emit_insn (gen_rtx_SET (e3, gen_rtx_MULT (mode, x0, mhalf)));
-   else
-     /* e3 = -.5 * e0 */
-     emit_insn (gen_rtx_SET (e3, gen_rtx_MULT (mode, e0, mhalf)));
-   /* ret = e2 * e3 */
-   emit_insn (gen_rtx_SET (res, gen_rtx_MULT (mode, e2, e3)));
- }
- 
  #ifdef TARGET_SOLARIS
  /* Solaris implementation of TARGET_ASM_NAMED_SECTION.  */
  
--- 21253,21258 ----
*************** asm_preferred_eh_data_format (int code,
*** 45239,45997 ****
    return DW_EH_PE_absptr;
  }
  
- /* Expand copysign from SIGN to the positive value ABS_VALUE
-    storing in RESULT.  If MASK is non-null, it shall be a mask to mask out
-    the sign-bit.  */
- static void
- ix86_sse_copysign_to_positive (rtx result, rtx abs_value, rtx sign, rtx mask)
- {
-   machine_mode mode = GET_MODE (sign);
-   rtx sgn = gen_reg_rtx (mode);
-   if (mask == NULL_RTX)
-     {
-       machine_mode vmode;
- 
-       if (mode == SFmode)
- 	vmode = V4SFmode;
-       else if (mode == DFmode)
- 	vmode = V2DFmode;
-       else
- 	vmode = mode;
- 
-       mask = ix86_build_signbit_mask (vmode, VECTOR_MODE_P (mode), false);
-       if (!VECTOR_MODE_P (mode))
- 	{
- 	  /* We need to generate a scalar mode mask in this case.  */
- 	  rtx tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, const0_rtx));
- 	  tmp = gen_rtx_VEC_SELECT (mode, mask, tmp);
- 	  mask = gen_reg_rtx (mode);
- 	  emit_insn (gen_rtx_SET (mask, tmp));
- 	}
-     }
-   else
-     mask = gen_rtx_NOT (mode, mask);
-   emit_insn (gen_rtx_SET (sgn, gen_rtx_AND (mode, mask, sign)));
-   emit_insn (gen_rtx_SET (result, gen_rtx_IOR (mode, abs_value, sgn)));
- }
- 
- /* Expand fabs (OP0) and return a new rtx that holds the result.  The
-    mask for masking out the sign-bit is stored in *SMASK, if that is
-    non-null.  */
- static rtx
- ix86_expand_sse_fabs (rtx op0, rtx *smask)
- {
-   machine_mode vmode, mode = GET_MODE (op0);
-   rtx xa, mask;
- 
-   xa = gen_reg_rtx (mode);
-   if (mode == SFmode)
-     vmode = V4SFmode;
-   else if (mode == DFmode)
-     vmode = V2DFmode;
-   else
-     vmode = mode;
-   mask = ix86_build_signbit_mask (vmode, VECTOR_MODE_P (mode), true);
-   if (!VECTOR_MODE_P (mode))
-     {
-       /* We need to generate a scalar mode mask in this case.  */
-       rtx tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, const0_rtx));
-       tmp = gen_rtx_VEC_SELECT (mode, mask, tmp);
-       mask = gen_reg_rtx (mode);
-       emit_insn (gen_rtx_SET (mask, tmp));
-     }
-   emit_insn (gen_rtx_SET (xa, gen_rtx_AND (mode, op0, mask)));
- 
-   if (smask)
-     *smask = mask;
- 
-   return xa;
- }
- 
- /* Expands a comparison of OP0 with OP1 using comparison code CODE,
-    swapping the operands if SWAP_OPERANDS is true.  The expanded
-    code is a forward jump to a newly created label in case the
-    comparison is true.  The generated label rtx is returned.  */
- static rtx_code_label *
- ix86_expand_sse_compare_and_jump (enum rtx_code code, rtx op0, rtx op1,
-                                   bool swap_operands)
- {
-   bool unordered_compare = ix86_unordered_fp_compare (code);
-   rtx_code_label *label;
-   rtx tmp, reg;
- 
-   if (swap_operands)
-     std::swap (op0, op1);
- 
-   label = gen_label_rtx ();
-   tmp = gen_rtx_COMPARE (CCFPmode, op0, op1);
-   if (unordered_compare)
-     tmp = gen_rtx_UNSPEC (CCFPmode, gen_rtvec (1, tmp), UNSPEC_NOTRAP);
-   reg = gen_rtx_REG (CCFPmode, FLAGS_REG);
-   emit_insn (gen_rtx_SET (reg, tmp));
-   tmp = gen_rtx_fmt_ee (code, VOIDmode, reg, const0_rtx);
-   tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp,
- 			      gen_rtx_LABEL_REF (VOIDmode, label), pc_rtx);
-   tmp = emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
-   JUMP_LABEL (tmp) = label;
- 
-   return label;
- }
- 
- /* Expand a mask generating SSE comparison instruction comparing OP0 with OP1
-    using comparison code CODE.  Operands are swapped for the comparison if
-    SWAP_OPERANDS is true.  Returns a rtx for the generated mask.  */
- static rtx
- ix86_expand_sse_compare_mask (enum rtx_code code, rtx op0, rtx op1,
- 			      bool swap_operands)
- {
-   rtx (*insn)(rtx, rtx, rtx, rtx);
-   machine_mode mode = GET_MODE (op0);
-   rtx mask = gen_reg_rtx (mode);
- 
-   if (swap_operands)
-     std::swap (op0, op1);
- 
-   insn = mode == DFmode ? gen_setcc_df_sse : gen_setcc_sf_sse;
- 
-   emit_insn (insn (mask, op0, op1,
- 		   gen_rtx_fmt_ee (code, mode, op0, op1)));
-   return mask;
- }
- 
- /* Generate and return a rtx of mode MODE for 2**n where n is the number
-    of bits of the mantissa of MODE, which must be one of DFmode or SFmode.  */
- static rtx
- ix86_gen_TWO52 (machine_mode mode)
- {
-   REAL_VALUE_TYPE TWO52r;
-   rtx TWO52;
- 
-   real_ldexp (&TWO52r, &dconst1, mode == DFmode ? 52 : 23);
-   TWO52 = const_double_from_real_value (TWO52r, mode);
-   TWO52 = force_reg (mode, TWO52);
- 
-   return TWO52;
- }
- 
- /* Expand SSE sequence for computing lround from OP1 storing
-    into OP0.  */
- void
- ix86_expand_lround (rtx op0, rtx op1)
- {
-   /* C code for the stuff we're doing below:
-        tmp = op1 + copysign (nextafter (0.5, 0.0), op1)
-        return (long)tmp;
-    */
-   machine_mode mode = GET_MODE (op1);
-   const struct real_format *fmt;
-   REAL_VALUE_TYPE pred_half, half_minus_pred_half;
-   rtx adj;
- 
-   /* load nextafter (0.5, 0.0) */
-   fmt = REAL_MODE_FORMAT (mode);
-   real_2expN (&half_minus_pred_half, -(fmt->p) - 1, mode);
-   real_arithmetic (&pred_half, MINUS_EXPR, &dconsthalf, &half_minus_pred_half);
- 
-   /* adj = copysign (0.5, op1) */
-   adj = force_reg (mode, const_double_from_real_value (pred_half, mode));
-   ix86_sse_copysign_to_positive (adj, adj, force_reg (mode, op1), NULL_RTX);
- 
-   /* adj = op1 + adj */
-   adj = expand_simple_binop (mode, PLUS, adj, op1, NULL_RTX, 0, OPTAB_DIRECT);
- 
-   /* op0 = (imode)adj */
-   expand_fix (op0, adj, 0);
- }
- 
- /* Expand SSE2 sequence for computing lround from OPERAND1 storing
-    into OPERAND0.  */
- void
- ix86_expand_lfloorceil (rtx op0, rtx op1, bool do_floor)
- {
-   /* C code for the stuff we're doing below (for do_floor):
- 	xi = (long)op1;
-         xi -= (double)xi > op1 ? 1 : 0;
-         return xi;
-    */
-   machine_mode fmode = GET_MODE (op1);
-   machine_mode imode = GET_MODE (op0);
-   rtx ireg, freg, tmp;
-   rtx_code_label *label;
- 
-   /* reg = (long)op1 */
-   ireg = gen_reg_rtx (imode);
-   expand_fix (ireg, op1, 0);
- 
-   /* freg = (double)reg */
-   freg = gen_reg_rtx (fmode);
-   expand_float (freg, ireg, 0);
- 
-   /* ireg = (freg > op1) ? ireg - 1 : ireg */
-   label = ix86_expand_sse_compare_and_jump (UNLE,
- 					    freg, op1, !do_floor);
-   tmp = expand_simple_binop (imode, do_floor ? MINUS : PLUS,
- 			     ireg, const1_rtx, NULL_RTX, 0, OPTAB_DIRECT);
-   emit_move_insn (ireg, tmp);
- 
-   emit_label (label);
-   LABEL_NUSES (label) = 1;
- 
-   emit_move_insn (op0, ireg);
- }
- 
- /* Expand rint rounding OPERAND1 and storing the result in OPERAND0.  */
- void
- ix86_expand_rint (rtx operand0, rtx operand1)
- {
-   /* C code for the stuff we're doing below:
- 	xa = fabs (operand1);
-         if (!isless (xa, 2**52))
- 	  return operand1;
-         two52 = 2**52;
-         if (flag_rounding_math)
- 	  {
- 	    two52 = copysign (two52, operand1);
- 	    xa = operand1;
- 	  }
-         xa = xa + two52 - two52;
-         return copysign (xa, operand1);
-    */
-   machine_mode mode = GET_MODE (operand0);
-   rtx res, xa, TWO52, two52, mask;
-   rtx_code_label *label;
- 
-   res = gen_reg_rtx (mode);
-   emit_move_insn (res, operand1);
- 
-   /* xa = abs (operand1) */
-   xa = ix86_expand_sse_fabs (res, &mask);
- 
-   /* if (!isless (xa, TWO52)) goto label; */
-   TWO52 = ix86_gen_TWO52 (mode);
-   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
- 
-   two52 = TWO52;
-   if (flag_rounding_math)
-     {
-       two52 = gen_reg_rtx (mode);
-       ix86_sse_copysign_to_positive (two52, TWO52, res, mask);
-       xa = res;
-     }
- 
-   xa = expand_simple_binop (mode, PLUS, xa, two52, NULL_RTX, 0, OPTAB_DIRECT);
-   xa = expand_simple_binop (mode, MINUS, xa, two52, xa, 0, OPTAB_DIRECT);
- 
-   ix86_sse_copysign_to_positive (res, xa, res, mask);
- 
-   emit_label (label);
-   LABEL_NUSES (label) = 1;
- 
-   emit_move_insn (operand0, res);
- }
- 
- /* Expand SSE2 sequence for computing floor or ceil from OPERAND1 storing
-    into OPERAND0.  */
- void
- ix86_expand_floorceildf_32 (rtx operand0, rtx operand1, bool do_floor)
- {
-   /* C code for the stuff we expand below.
-         double xa = fabs (x), x2;
-         if (!isless (xa, TWO52))
-           return x;
-         xa = xa + TWO52 - TWO52;
-         x2 = copysign (xa, x);
-      Compensate.  Floor:
-         if (x2 > x)
-           x2 -= 1;
-      Compensate.  Ceil:
-         if (x2 < x)
-           x2 += 1;
- 	if (HONOR_SIGNED_ZEROS (mode))
- 	  x2 = copysign (x2, x);
- 	return x2;
-    */
-   machine_mode mode = GET_MODE (operand0);
-   rtx xa, TWO52, tmp, one, res, mask;
-   rtx_code_label *label;
- 
-   TWO52 = ix86_gen_TWO52 (mode);
- 
-   /* Temporary for holding the result, initialized to the input
-      operand to ease control flow.  */
-   res = gen_reg_rtx (mode);
-   emit_move_insn (res, operand1);
- 
-   /* xa = abs (operand1) */
-   xa = ix86_expand_sse_fabs (res, &mask);
- 
-   /* if (!isless (xa, TWO52)) goto label; */
-   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
- 
-   /* xa = xa + TWO52 - TWO52; */
-   xa = expand_simple_binop (mode, PLUS, xa, TWO52, NULL_RTX, 0, OPTAB_DIRECT);
-   xa = expand_simple_binop (mode, MINUS, xa, TWO52, xa, 0, OPTAB_DIRECT);
- 
-   /* xa = copysign (xa, operand1) */
-   ix86_sse_copysign_to_positive (xa, xa, res, mask);
- 
-   /* generate 1.0 */
-   one = force_reg (mode, const_double_from_real_value (dconst1, mode));
- 
-   /* Compensate: xa = xa - (xa > operand1 ? 1 : 0) */
-   tmp = ix86_expand_sse_compare_mask (UNGT, xa, res, !do_floor);
-   emit_insn (gen_rtx_SET (tmp, gen_rtx_AND (mode, one, tmp)));
-   tmp = expand_simple_binop (mode, do_floor ? MINUS : PLUS,
- 			     xa, tmp, NULL_RTX, 0, OPTAB_DIRECT);
-   if (!do_floor && HONOR_SIGNED_ZEROS (mode))
-     ix86_sse_copysign_to_positive (tmp, tmp, res, mask);
-   emit_move_insn (res, tmp);
- 
-   emit_label (label);
-   LABEL_NUSES (label) = 1;
- 
-   emit_move_insn (operand0, res);
- }
- 
- /* Expand SSE2 sequence for computing floor or ceil from OPERAND1 storing
-    into OPERAND0.  */
- void
- ix86_expand_floorceil (rtx operand0, rtx operand1, bool do_floor)
- {
-   /* C code for the stuff we expand below.
- 	double xa = fabs (x), x2;
-         if (!isless (xa, TWO52))
-           return x;
- 	x2 = (double)(long)x;
-      Compensate.  Floor:
- 	if (x2 > x)
- 	  x2 -= 1;
-      Compensate.  Ceil:
- 	if (x2 < x)
- 	  x2 += 1;
- 	if (HONOR_SIGNED_ZEROS (mode))
- 	  return copysign (x2, x);
- 	return x2;
-    */
-   machine_mode mode = GET_MODE (operand0);
-   rtx xa, xi, TWO52, tmp, one, res, mask;
-   rtx_code_label *label;
- 
-   TWO52 = ix86_gen_TWO52 (mode);
- 
-   /* Temporary for holding the result, initialized to the input
-      operand to ease control flow.  */
-   res = gen_reg_rtx (mode);
-   emit_move_insn (res, operand1);
- 
-   /* xa = abs (operand1) */
-   xa = ix86_expand_sse_fabs (res, &mask);
- 
-   /* if (!isless (xa, TWO52)) goto label; */
-   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
- 
-   /* xa = (double)(long)x */
-   xi = gen_reg_rtx (mode == DFmode ? DImode : SImode);
-   expand_fix (xi, res, 0);
-   expand_float (xa, xi, 0);
- 
-   /* generate 1.0 */
-   one = force_reg (mode, const_double_from_real_value (dconst1, mode));
- 
-   /* Compensate: xa = xa - (xa > operand1 ? 1 : 0) */
-   tmp = ix86_expand_sse_compare_mask (UNGT, xa, res, !do_floor);
-   emit_insn (gen_rtx_SET (tmp, gen_rtx_AND (mode, one, tmp)));
-   tmp = expand_simple_binop (mode, do_floor ? MINUS : PLUS,
- 			     xa, tmp, NULL_RTX, 0, OPTAB_DIRECT);
-   emit_move_insn (res, tmp);
- 
-   if (HONOR_SIGNED_ZEROS (mode))
-     ix86_sse_copysign_to_positive (res, res, force_reg (mode, operand1), mask);
- 
-   emit_label (label);
-   LABEL_NUSES (label) = 1;
- 
-   emit_move_insn (operand0, res);
- }
- 
- /* Expand SSE sequence for computing round from OPERAND1 storing
-    into OPERAND0.  Sequence that works without relying on DImode truncation
-    via cvttsd2siq that is only available on 64bit targets.  */
- void
- ix86_expand_rounddf_32 (rtx operand0, rtx operand1)
- {
-   /* C code for the stuff we expand below.
-         double xa = fabs (x), xa2, x2;
-         if (!isless (xa, TWO52))
-           return x;
-      Using the absolute value and copying back sign makes
-      -0.0 -> -0.0 correct.
-         xa2 = xa + TWO52 - TWO52;
-      Compensate.
- 	dxa = xa2 - xa;
-         if (dxa <= -0.5)
-           xa2 += 1;
-         else if (dxa > 0.5)
-           xa2 -= 1;
-         x2 = copysign (xa2, x);
-         return x2;
-    */
-   machine_mode mode = GET_MODE (operand0);
-   rtx xa, xa2, dxa, TWO52, tmp, half, mhalf, one, res, mask;
-   rtx_code_label *label;
- 
-   TWO52 = ix86_gen_TWO52 (mode);
- 
-   /* Temporary for holding the result, initialized to the input
-      operand to ease control flow.  */
-   res = gen_reg_rtx (mode);
-   emit_move_insn (res, operand1);
- 
-   /* xa = abs (operand1) */
-   xa = ix86_expand_sse_fabs (res, &mask);
- 
-   /* if (!isless (xa, TWO52)) goto label; */
-   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
- 
-   /* xa2 = xa + TWO52 - TWO52; */
-   xa2 = expand_simple_binop (mode, PLUS, xa, TWO52, NULL_RTX, 0, OPTAB_DIRECT);
-   xa2 = expand_simple_binop (mode, MINUS, xa2, TWO52, xa2, 0, OPTAB_DIRECT);
- 
-   /* dxa = xa2 - xa; */
-   dxa = expand_simple_binop (mode, MINUS, xa2, xa, NULL_RTX, 0, OPTAB_DIRECT);
- 
-   /* generate 0.5, 1.0 and -0.5 */
-   half = force_reg (mode, const_double_from_real_value (dconsthalf, mode));
-   one = expand_simple_binop (mode, PLUS, half, half, NULL_RTX, 0, OPTAB_DIRECT);
-   mhalf = expand_simple_binop (mode, MINUS, half, one, NULL_RTX,
- 			       0, OPTAB_DIRECT);
- 
-   /* Compensate.  */
-   tmp = gen_reg_rtx (mode);
-   /* xa2 = xa2 - (dxa > 0.5 ? 1 : 0) */
-   tmp = ix86_expand_sse_compare_mask (UNGT, dxa, half, false);
-   emit_insn (gen_rtx_SET (tmp, gen_rtx_AND (mode, one, tmp)));
-   xa2 = expand_simple_binop (mode, MINUS, xa2, tmp, NULL_RTX, 0, OPTAB_DIRECT);
-   /* xa2 = xa2 + (dxa <= -0.5 ? 1 : 0) */
-   tmp = ix86_expand_sse_compare_mask (UNGE, mhalf, dxa, false);
-   emit_insn (gen_rtx_SET (tmp, gen_rtx_AND (mode, one, tmp)));
-   xa2 = expand_simple_binop (mode, PLUS, xa2, tmp, NULL_RTX, 0, OPTAB_DIRECT);
- 
-   /* res = copysign (xa2, operand1) */
-   ix86_sse_copysign_to_positive (res, xa2, force_reg (mode, operand1), mask);
- 
-   emit_label (label);
-   LABEL_NUSES (label) = 1;
- 
-   emit_move_insn (operand0, res);
- }
- 
- /* Expand SSE sequence for computing trunc from OPERAND1 storing
-    into OPERAND0.  */
- void
- ix86_expand_trunc (rtx operand0, rtx operand1)
- {
-   /* C code for SSE variant we expand below.
-         double xa = fabs (x), x2;
-         if (!isless (xa, TWO52))
-           return x;
-         x2 = (double)(long)x;
- 	if (HONOR_SIGNED_ZEROS (mode))
- 	  return copysign (x2, x);
- 	return x2;
-    */
-   machine_mode mode = GET_MODE (operand0);
-   rtx xa, xi, TWO52, res, mask;
-   rtx_code_label *label;
- 
-   TWO52 = ix86_gen_TWO52 (mode);
- 
-   /* Temporary for holding the result, initialized to the input
-      operand to ease control flow.  */
-   res = gen_reg_rtx (mode);
-   emit_move_insn (res, operand1);
- 
-   /* xa = abs (operand1) */
-   xa = ix86_expand_sse_fabs (res, &mask);
- 
-   /* if (!isless (xa, TWO52)) goto label; */
-   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
- 
-   /* x = (double)(long)x */
-   xi = gen_reg_rtx (mode == DFmode ? DImode : SImode);
-   expand_fix (xi, res, 0);
-   expand_float (res, xi, 0);
- 
-   if (HONOR_SIGNED_ZEROS (mode))
-     ix86_sse_copysign_to_positive (res, res, force_reg (mode, operand1), mask);
- 
-   emit_label (label);
-   LABEL_NUSES (label) = 1;
- 
-   emit_move_insn (operand0, res);
- }
- 
- /* Expand SSE sequence for computing trunc from OPERAND1 storing
-    into OPERAND0.  */
- void
- ix86_expand_truncdf_32 (rtx operand0, rtx operand1)
- {
-   machine_mode mode = GET_MODE (operand0);
-   rtx xa, mask, TWO52, one, res, smask, tmp;
-   rtx_code_label *label;
- 
-   /* C code for SSE variant we expand below.
-         double xa = fabs (x), x2;
-         if (!isless (xa, TWO52))
-           return x;
-         xa2 = xa + TWO52 - TWO52;
-      Compensate:
-         if (xa2 > xa)
-           xa2 -= 1.0;
-         x2 = copysign (xa2, x);
-         return x2;
-    */
- 
-   TWO52 = ix86_gen_TWO52 (mode);
- 
-   /* Temporary for holding the result, initialized to the input
-      operand to ease control flow.  */
-   res = gen_reg_rtx (mode);
-   emit_move_insn (res, operand1);
- 
-   /* xa = abs (operand1) */
-   xa = ix86_expand_sse_fabs (res, &smask);
- 
-   /* if (!isless (xa, TWO52)) goto label; */
-   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
- 
-   /* res = xa + TWO52 - TWO52; */
-   tmp = expand_simple_binop (mode, PLUS, xa, TWO52, NULL_RTX, 0, OPTAB_DIRECT);
-   tmp = expand_simple_binop (mode, MINUS, tmp, TWO52, tmp, 0, OPTAB_DIRECT);
-   emit_move_insn (res, tmp);
- 
-   /* generate 1.0 */
-   one = force_reg (mode, const_double_from_real_value (dconst1, mode));
- 
-   /* Compensate: res = xa2 - (res > xa ? 1 : 0)  */
-   mask = ix86_expand_sse_compare_mask (UNGT, res, xa, false);
-   emit_insn (gen_rtx_SET (mask, gen_rtx_AND (mode, mask, one)));
-   tmp = expand_simple_binop (mode, MINUS,
- 			     res, mask, NULL_RTX, 0, OPTAB_DIRECT);
-   emit_move_insn (res, tmp);
- 
-   /* res = copysign (res, operand1) */
-   ix86_sse_copysign_to_positive (res, res, force_reg (mode, operand1), smask);
- 
-   emit_label (label);
-   LABEL_NUSES (label) = 1;
- 
-   emit_move_insn (operand0, res);
- }
- 
- /* Expand SSE sequence for computing round from OPERAND1 storing
-    into OPERAND0.  */
- void
- ix86_expand_round (rtx operand0, rtx operand1)
- {
-   /* C code for the stuff we're doing below:
-         double xa = fabs (x);
-         if (!isless (xa, TWO52))
-           return x;
-         xa = (double)(long)(xa + nextafter (0.5, 0.0));
-         return copysign (xa, x);
-    */
-   machine_mode mode = GET_MODE (operand0);
-   rtx res, TWO52, xa, xi, half, mask;
-   rtx_code_label *label;
-   const struct real_format *fmt;
-   REAL_VALUE_TYPE pred_half, half_minus_pred_half;
- 
-   /* Temporary for holding the result, initialized to the input
-      operand to ease control flow.  */
-   res = gen_reg_rtx (mode);
-   emit_move_insn (res, operand1);
- 
-   TWO52 = ix86_gen_TWO52 (mode);
-   xa = ix86_expand_sse_fabs (res, &mask);
-   label = ix86_expand_sse_compare_and_jump (UNLE, TWO52, xa, false);
- 
-   /* load nextafter (0.5, 0.0) */
-   fmt = REAL_MODE_FORMAT (mode);
-   real_2expN (&half_minus_pred_half, -(fmt->p) - 1, mode);
-   real_arithmetic (&pred_half, MINUS_EXPR, &dconsthalf, &half_minus_pred_half);
- 
-   /* xa = xa + 0.5 */
-   half = force_reg (mode, const_double_from_real_value (pred_half, mode));
-   xa = expand_simple_binop (mode, PLUS, xa, half, NULL_RTX, 0, OPTAB_DIRECT);
- 
-   /* xa = (double)(int64_t)xa */
-   xi = gen_reg_rtx (mode == DFmode ? DImode : SImode);
-   expand_fix (xi, xa, 0);
-   expand_float (xa, xi, 0);
- 
-   /* res = copysign (xa, operand1) */
-   ix86_sse_copysign_to_positive (res, xa, force_reg (mode, operand1), mask);
- 
-   emit_label (label);
-   LABEL_NUSES (label) = 1;
- 
-   emit_move_insn (operand0, res);
- }
- 
- /* Expand SSE sequence for computing round
-    from OP1 storing into OP0 using sse4 round insn.  */
- void
- ix86_expand_round_sse4 (rtx op0, rtx op1)
- {
-   machine_mode mode = GET_MODE (op0);
-   rtx e1, e2, res, half;
-   const struct real_format *fmt;
-   REAL_VALUE_TYPE pred_half, half_minus_pred_half;
-   rtx (*gen_copysign) (rtx, rtx, rtx);
-   rtx (*gen_round) (rtx, rtx, rtx);
- 
-   switch (mode)
-     {
-     case E_SFmode:
-       gen_copysign = gen_copysignsf3;
-       gen_round = gen_sse4_1_roundsf2;
-       break;
-     case E_DFmode:
-       gen_copysign = gen_copysigndf3;
-       gen_round = gen_sse4_1_rounddf2;
-       break;
-     default:
-       gcc_unreachable ();
-     }
- 
-   /* round (a) = trunc (a + copysign (0.5, a)) */
- 
-   /* load nextafter (0.5, 0.0) */
-   fmt = REAL_MODE_FORMAT (mode);
-   real_2expN (&half_minus_pred_half, -(fmt->p) - 1, mode);
-   real_arithmetic (&pred_half, MINUS_EXPR, &dconsthalf, &half_minus_pred_half);
-   half = const_double_from_real_value (pred_half, mode);
- 
-   /* e1 = copysign (0.5, op1) */
-   e1 = gen_reg_rtx (mode);
-   emit_insn (gen_copysign (e1, half, op1));
- 
-   /* e2 = op1 + e1 */
-   e2 = expand_simple_binop (mode, PLUS, op1, e1, NULL_RTX, 0, OPTAB_DIRECT);
- 
-   /* res = trunc (e2) */
-   res = gen_reg_rtx (mode);
-   emit_insn (gen_round (res, e2, GEN_INT (ROUND_TRUNC)));
- 
-   emit_move_insn (op0, res);
- }
- 
- /* Handle fentry_name / fentry_section attribute.  */
- 
- static tree
- ix86_handle_fentry_name (tree *node, tree name, tree args,
- 			 int, bool *no_add_attrs)
- {
-   if (TREE_CODE (*node) == FUNCTION_DECL
-       && TREE_CODE (TREE_VALUE (args)) == STRING_CST)
-     /* Do nothing else, just set the attribute.  We'll get at
-        it later with lookup_attribute.  */
-     ;
-   else
-     {
-       warning (OPT_Wattributes, "%qE attribute ignored", name);
-       *no_add_attrs = true;
-     }
- 
-   return NULL_TREE;
- }
- 
- 
- /* Table of valid machine attributes.  */
- static const struct attribute_spec ix86_attribute_table[] =
- {
-   /* { name, min_len, max_len, decl_req, type_req, fn_type_req,
-        affects_type_identity, handler, exclude } */
-   /* Stdcall attribute says callee is responsible for popping arguments
-      if they are not variable.  */
-   { "stdcall",   0, 0, false, true,  true,  true, ix86_handle_cconv_attribute,
-     NULL },
-   /* Fastcall attribute says callee is responsible for popping arguments
-      if they are not variable.  */
-   { "fastcall",  0, 0, false, true,  true,  true, ix86_handle_cconv_attribute,
-     NULL },
-   /* Thiscall attribute says callee is responsible for popping arguments
-      if they are not variable.  */
-   { "thiscall",  0, 0, false, true,  true,  true, ix86_handle_cconv_attribute,
-     NULL },
-   /* Cdecl attribute says the callee is a normal C declaration */
-   { "cdecl",     0, 0, false, true,  true,  true, ix86_handle_cconv_attribute,
-     NULL },
-   /* Regparm attribute specifies how many integer arguments are to be
-      passed in registers.  */
-   { "regparm",   1, 1, false, true,  true,  true, ix86_handle_cconv_attribute,
-     NULL },
-   /* Sseregparm attribute says we are using x86_64 calling conventions
-      for FP arguments.  */
-   { "sseregparm", 0, 0, false, true, true,  true, ix86_handle_cconv_attribute,
-     NULL },
-   /* The transactional memory builtins are implicitly regparm or fastcall
-      depending on the ABI.  Override the generic do-nothing attribute that
-      these builtins were declared with.  */
-   { "*tm regparm", 0, 0, false, true, true, true,
-     ix86_handle_tm_regparm_attribute, NULL },
-   /* force_align_arg_pointer says this function realigns the stack at entry.  */
-   { (const char *)&ix86_force_align_arg_pointer_string, 0, 0,
-     false, true,  true, false, ix86_handle_force_align_arg_pointer_attribute,
-     NULL },
- #if TARGET_DLLIMPORT_DECL_ATTRIBUTES
-   { "dllimport", 0, 0, false, false, false, false, handle_dll_attribute,
-     NULL },
-   { "dllexport", 0, 0, false, false, false, false, handle_dll_attribute,
-     NULL },
-   { "shared",    0, 0, true,  false, false, false,
-     ix86_handle_shared_attribute, NULL },
- #endif
-   { "ms_struct", 0, 0, false, false,  false, false,
-     ix86_handle_struct_attribute, NULL },
-   { "gcc_struct", 0, 0, false, false,  false, false,
-     ix86_handle_struct_attribute, NULL },
- #ifdef SUBTARGET_ATTRIBUTE_TABLE
-   SUBTARGET_ATTRIBUTE_TABLE,
- #endif
-   /* ms_abi and sysv_abi calling convention function attributes.  */
-   { "ms_abi", 0, 0, false, true, true, true, ix86_handle_abi_attribute, NULL },
-   { "sysv_abi", 0, 0, false, true, true, true, ix86_handle_abi_attribute,
-     NULL },
-   { "ms_abi va_list", 0, 0, false, false, false, false, NULL, NULL },
-   { "sysv_abi va_list", 0, 0, false, false, false, false, NULL, NULL },
-   { "ms_hook_prologue", 0, 0, true, false, false, false,
-     ix86_handle_fndecl_attribute, NULL },
-   { "callee_pop_aggregate_return", 1, 1, false, true, true, true,
-     ix86_handle_callee_pop_aggregate_return, NULL },
-   { "interrupt", 0, 0, false, true, true, false,
-     ix86_handle_interrupt_attribute, NULL },
-   { "no_caller_saved_registers", 0, 0, false, true, true, false,
-     ix86_handle_no_caller_saved_registers_attribute, NULL },
-   { "naked", 0, 0, true, false, false, false,
-     ix86_handle_fndecl_attribute, NULL },
-   { "indirect_branch", 1, 1, true, false, false, false,
-     ix86_handle_fndecl_attribute, NULL },
-   { "function_return", 1, 1, true, false, false, false,
-     ix86_handle_fndecl_attribute, NULL },
-   { "indirect_return", 0, 0, false, true, true, false,
-     NULL, NULL },
-   { "fentry_name", 1, 1, true, false, false, false,
-     ix86_handle_fentry_name, NULL },
-   { "fentry_section", 1, 1, true, false, false, false,
-     ix86_handle_fentry_name, NULL },
-   { "cf_check", 0, 0, true, false, false, false,
-     ix86_handle_fndecl_attribute, NULL },
- 
-   /* End element.  */
-   { NULL, 0, 0, false, false, false, false, NULL, NULL }
- };
- 
  /* Implement targetm.vectorize.builtin_vectorization_cost.  */
  static int
  ix86_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
--- 21411,21416 ----
*************** ix86_builtin_vectorization_cost (enum ve
*** 46102,50002 ****
      }
  }
  
- /* A cached (set (nil) (vselect (vconcat (nil) (nil)) (parallel [])))
-    insn, so that expand_vselect{,_vconcat} doesn't have to create a fresh
-    insn every time.  */
- 
- static GTY(()) rtx_insn *vselect_insn;
- 
- /* Initialize vselect_insn.  */
- 
- static void
- init_vselect_insn (void)
- {
-   unsigned i;
-   rtx x;
- 
-   x = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (MAX_VECT_LEN));
-   for (i = 0; i < MAX_VECT_LEN; ++i)
-     XVECEXP (x, 0, i) = const0_rtx;
-   x = gen_rtx_VEC_SELECT (V2DFmode, gen_rtx_VEC_CONCAT (V4DFmode, const0_rtx,
- 							const0_rtx), x);
-   x = gen_rtx_SET (const0_rtx, x);
-   start_sequence ();
-   vselect_insn = emit_insn (x);
-   end_sequence ();
- }
- 
- /* Construct (set target (vec_select op0 (parallel perm))) and
-    return true if that's a valid instruction in the active ISA.  */
- 
- static bool
- expand_vselect (rtx target, rtx op0, const unsigned char *perm,
- 		unsigned nelt, bool testing_p)
- {
-   unsigned int i;
-   rtx x, save_vconcat;
-   int icode;
- 
-   if (vselect_insn == NULL_RTX)
-     init_vselect_insn ();
- 
-   x = XEXP (SET_SRC (PATTERN (vselect_insn)), 1);
-   PUT_NUM_ELEM (XVEC (x, 0), nelt);
-   for (i = 0; i < nelt; ++i)
-     XVECEXP (x, 0, i) = GEN_INT (perm[i]);
-   save_vconcat = XEXP (SET_SRC (PATTERN (vselect_insn)), 0);
-   XEXP (SET_SRC (PATTERN (vselect_insn)), 0) = op0;
-   PUT_MODE (SET_SRC (PATTERN (vselect_insn)), GET_MODE (target));
-   SET_DEST (PATTERN (vselect_insn)) = target;
-   icode = recog_memoized (vselect_insn);
- 
-   if (icode >= 0 && !testing_p)
-     emit_insn (copy_rtx (PATTERN (vselect_insn)));
- 
-   SET_DEST (PATTERN (vselect_insn)) = const0_rtx;
-   XEXP (SET_SRC (PATTERN (vselect_insn)), 0) = save_vconcat;
-   INSN_CODE (vselect_insn) = -1;
- 
-   return icode >= 0;
- }
- 
- /* Similar, but generate a vec_concat from op0 and op1 as well.  */
- 
- static bool
- expand_vselect_vconcat (rtx target, rtx op0, rtx op1,
- 			const unsigned char *perm, unsigned nelt,
- 			bool testing_p)
- {
-   machine_mode v2mode;
-   rtx x;
-   bool ok;
- 
-   if (vselect_insn == NULL_RTX)
-     init_vselect_insn ();
- 
-   if (!GET_MODE_2XWIDER_MODE (GET_MODE (op0)).exists (&v2mode))
-     return false;
-   x = XEXP (SET_SRC (PATTERN (vselect_insn)), 0);
-   PUT_MODE (x, v2mode);
-   XEXP (x, 0) = op0;
-   XEXP (x, 1) = op1;
-   ok = expand_vselect (target, x, perm, nelt, testing_p);
-   XEXP (x, 0) = const0_rtx;
-   XEXP (x, 1) = const0_rtx;
-   return ok;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Try to implement D
-    using movss or movsd.  */
- static bool
- expand_vec_perm_movs (struct expand_vec_perm_d *d)
- {
-   machine_mode vmode = d->vmode;
-   unsigned i, nelt = d->nelt;
-   rtx x;
- 
-   if (d->one_operand_p)
-     return false;
- 
-   if (!(TARGET_SSE && vmode == V4SFmode)
-       && !(TARGET_SSE2 && vmode == V2DFmode))
-     return false;
- 
-   /* Only the first element is changed.  */
-   if (d->perm[0] != nelt && d->perm[0] != 0)
-     return false;
-   for (i = 1; i < nelt; ++i)
-     if (d->perm[i] != i + nelt - d->perm[0])
-       return false;
- 
-   if (d->testing_p)
-     return true;
- 
-   if (d->perm[0] == nelt)
-     x = gen_rtx_VEC_MERGE (vmode, d->op1, d->op0, GEN_INT (1));
-   else
-     x = gen_rtx_VEC_MERGE (vmode, d->op0, d->op1, GEN_INT (1));
- 
-   emit_insn (gen_rtx_SET (d->target, x));
- 
-   return true;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Try to implement D
-    in terms of blendp[sd] / pblendw / pblendvb / vpblendd.  */
- 
- static bool
- expand_vec_perm_blend (struct expand_vec_perm_d *d)
- {
-   machine_mode mmode, vmode = d->vmode;
-   unsigned i, nelt = d->nelt;
-   unsigned HOST_WIDE_INT mask;
-   rtx target, op0, op1, maskop, x;
-   rtx rperm[32], vperm;
- 
-   if (d->one_operand_p)
-     return false;
-   if (TARGET_AVX512F && GET_MODE_SIZE (vmode) == 64
-       && (TARGET_AVX512BW
- 	  || GET_MODE_UNIT_SIZE (vmode) >= 4))
-     ;
-   else if (TARGET_AVX2 && GET_MODE_SIZE (vmode) == 32)
-     ;
-   else if (TARGET_AVX && (vmode == V4DFmode || vmode == V8SFmode))
-     ;
-   else if (TARGET_SSE4_1 && GET_MODE_SIZE (vmode) == 16)
-     ;
-   else
-     return false;
- 
-   /* This is a blend, not a permute.  Elements must stay in their
-      respective lanes.  */
-   for (i = 0; i < nelt; ++i)
-     {
-       unsigned e = d->perm[i];
-       if (!(e == i || e == i + nelt))
- 	return false;
-     }
- 
-   if (d->testing_p)
-     return true;
- 
-   /* ??? Without SSE4.1, we could implement this with and/andn/or.  This
-      decision should be extracted elsewhere, so that we only try that
-      sequence once all budget==3 options have been tried.  */
-   target = d->target;
-   op0 = d->op0;
-   op1 = d->op1;
-   mask = 0;
- 
-   switch (vmode)
-     {
-     case E_V8DFmode:
-     case E_V16SFmode:
-     case E_V4DFmode:
-     case E_V8SFmode:
-     case E_V2DFmode:
-     case E_V4SFmode:
-     case E_V8HImode:
-     case E_V8SImode:
-     case E_V32HImode:
-     case E_V64QImode:
-     case E_V16SImode:
-     case E_V8DImode:
-       for (i = 0; i < nelt; ++i)
- 	mask |= ((unsigned HOST_WIDE_INT) (d->perm[i] >= nelt)) << i;
-       break;
- 
-     case E_V2DImode:
-       for (i = 0; i < 2; ++i)
- 	mask |= (d->perm[i] >= 2 ? 15 : 0) << (i * 4);
-       vmode = V8HImode;
-       goto do_subreg;
- 
-     case E_V4SImode:
-       for (i = 0; i < 4; ++i)
- 	mask |= (d->perm[i] >= 4 ? 3 : 0) << (i * 2);
-       vmode = V8HImode;
-       goto do_subreg;
- 
-     case E_V16QImode:
-       /* See if bytes move in pairs so we can use pblendw with
- 	 an immediate argument, rather than pblendvb with a vector
- 	 argument.  */
-       for (i = 0; i < 16; i += 2)
- 	if (d->perm[i] + 1 != d->perm[i + 1])
- 	  {
- 	  use_pblendvb:
- 	    for (i = 0; i < nelt; ++i)
- 	      rperm[i] = (d->perm[i] < nelt ? const0_rtx : constm1_rtx);
- 
- 	  finish_pblendvb:
- 	    vperm = gen_rtx_CONST_VECTOR (vmode, gen_rtvec_v (nelt, rperm));
- 	    vperm = force_reg (vmode, vperm);
- 
- 	    if (GET_MODE_SIZE (vmode) == 16)
- 	      emit_insn (gen_sse4_1_pblendvb (target, op0, op1, vperm));
- 	    else
- 	      emit_insn (gen_avx2_pblendvb (target, op0, op1, vperm));
- 	    if (target != d->target)
- 	      emit_move_insn (d->target, gen_lowpart (d->vmode, target));
- 	    return true;
- 	  }
- 
-       for (i = 0; i < 8; ++i)
- 	mask |= (d->perm[i * 2] >= 16) << i;
-       vmode = V8HImode;
-       /* FALLTHRU */
- 
-     do_subreg:
-       target = gen_reg_rtx (vmode);
-       op0 = gen_lowpart (vmode, op0);
-       op1 = gen_lowpart (vmode, op1);
-       break;
- 
-     case E_V32QImode:
-       /* See if bytes move in pairs.  If not, vpblendvb must be used.  */
-       for (i = 0; i < 32; i += 2)
- 	if (d->perm[i] + 1 != d->perm[i + 1])
- 	  goto use_pblendvb;
-       /* See if bytes move in quadruplets.  If yes, vpblendd
- 	 with immediate can be used.  */
-       for (i = 0; i < 32; i += 4)
- 	if (d->perm[i] + 2 != d->perm[i + 2])
- 	  break;
-       if (i < 32)
- 	{
- 	  /* See if bytes move the same in both lanes.  If yes,
- 	     vpblendw with immediate can be used.  */
- 	  for (i = 0; i < 16; i += 2)
- 	    if (d->perm[i] + 16 != d->perm[i + 16])
- 	      goto use_pblendvb;
- 
- 	  /* Use vpblendw.  */
- 	  for (i = 0; i < 16; ++i)
- 	    mask |= (d->perm[i * 2] >= 32) << i;
- 	  vmode = V16HImode;
- 	  goto do_subreg;
- 	}
- 
-       /* Use vpblendd.  */
-       for (i = 0; i < 8; ++i)
- 	mask |= (d->perm[i * 4] >= 32) << i;
-       vmode = V8SImode;
-       goto do_subreg;
- 
-     case E_V16HImode:
-       /* See if words move in pairs.  If yes, vpblendd can be used.  */
-       for (i = 0; i < 16; i += 2)
- 	if (d->perm[i] + 1 != d->perm[i + 1])
- 	  break;
-       if (i < 16)
- 	{
- 	  /* See if words move the same in both lanes.  If not,
- 	     vpblendvb must be used.  */
- 	  for (i = 0; i < 8; i++)
- 	    if (d->perm[i] + 8 != d->perm[i + 8])
- 	      {
- 		/* Use vpblendvb.  */
- 		for (i = 0; i < 32; ++i)
- 		  rperm[i] = (d->perm[i / 2] < 16 ? const0_rtx : constm1_rtx);
- 
- 		vmode = V32QImode;
- 		nelt = 32;
- 		target = gen_reg_rtx (vmode);
- 		op0 = gen_lowpart (vmode, op0);
- 		op1 = gen_lowpart (vmode, op1);
- 		goto finish_pblendvb;
- 	      }
- 
- 	  /* Use vpblendw.  */
- 	  for (i = 0; i < 16; ++i)
- 	    mask |= (d->perm[i] >= 16) << i;
- 	  break;
- 	}
- 
-       /* Use vpblendd.  */
-       for (i = 0; i < 8; ++i)
- 	mask |= (d->perm[i * 2] >= 16) << i;
-       vmode = V8SImode;
-       goto do_subreg;
- 
-     case E_V4DImode:
-       /* Use vpblendd.  */
-       for (i = 0; i < 4; ++i)
- 	mask |= (d->perm[i] >= 4 ? 3 : 0) << (i * 2);
-       vmode = V8SImode;
-       goto do_subreg;
- 
-     default:
-       gcc_unreachable ();
-     }
- 
-   switch (vmode)
-     {
-     case E_V8DFmode:
-     case E_V8DImode:
-       mmode = QImode;
-       break;
-     case E_V16SFmode:
-     case E_V16SImode:
-       mmode = HImode;
-       break;
-     case E_V32HImode:
-       mmode = SImode;
-       break;
-     case E_V64QImode:
-       mmode = DImode;
-       break;
-     default:
-       mmode = VOIDmode;
-     }
- 
-   if (mmode != VOIDmode)
-     maskop = force_reg (mmode, gen_int_mode (mask, mmode));
-   else
-     maskop = GEN_INT (mask);
- 
-   /* This matches five different patterns with the different modes.  */
-   x = gen_rtx_VEC_MERGE (vmode, op1, op0, maskop);
-   x = gen_rtx_SET (target, x);
-   emit_insn (x);
-   if (target != d->target)
-     emit_move_insn (d->target, gen_lowpart (d->vmode, target));
- 
-   return true;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Try to implement D
-    in terms of the variable form of vpermilps.
- 
-    Note that we will have already failed the immediate input vpermilps,
-    which requires that the high and low part shuffle be identical; the
-    variable form doesn't require that.  */
- 
- static bool
- expand_vec_perm_vpermil (struct expand_vec_perm_d *d)
- {
-   rtx rperm[8], vperm;
-   unsigned i;
- 
-   if (!TARGET_AVX || d->vmode != V8SFmode || !d->one_operand_p)
-     return false;
- 
-   /* We can only permute within the 128-bit lane.  */
-   for (i = 0; i < 8; ++i)
-     {
-       unsigned e = d->perm[i];
-       if (i < 4 ? e >= 4 : e < 4)
- 	return false;
-     }
- 
-   if (d->testing_p)
-     return true;
- 
-   for (i = 0; i < 8; ++i)
-     {
-       unsigned e = d->perm[i];
- 
-       /* Within each 128-bit lane, the elements of op0 are numbered
- 	 from 0 and the elements of op1 are numbered from 4.  */
-       if (e >= 8 + 4)
- 	e -= 8;
-       else if (e >= 4)
- 	e -= 4;
- 
-       rperm[i] = GEN_INT (e);
-     }
- 
-   vperm = gen_rtx_CONST_VECTOR (V8SImode, gen_rtvec_v (8, rperm));
-   vperm = force_reg (V8SImode, vperm);
-   emit_insn (gen_avx_vpermilvarv8sf3 (d->target, d->op0, vperm));
- 
-   return true;
- }
- 
- /* Return true if permutation D can be performed as VMODE permutation
-    instead.  */
- 
- static bool
- valid_perm_using_mode_p (machine_mode vmode, struct expand_vec_perm_d *d)
- {
-   unsigned int i, j, chunk;
- 
-   if (GET_MODE_CLASS (vmode) != MODE_VECTOR_INT
-       || GET_MODE_CLASS (d->vmode) != MODE_VECTOR_INT
-       || GET_MODE_SIZE (vmode) != GET_MODE_SIZE (d->vmode))
-     return false;
- 
-   if (GET_MODE_NUNITS (vmode) >= d->nelt)
-     return true;
- 
-   chunk = d->nelt / GET_MODE_NUNITS (vmode);
-   for (i = 0; i < d->nelt; i += chunk)
-     if (d->perm[i] & (chunk - 1))
-       return false;
-     else
-       for (j = 1; j < chunk; ++j)
- 	if (d->perm[i] + j != d->perm[i + j])
- 	  return false;
- 
-   return true;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Try to implement D
-    in terms of pshufb, vpperm, vpermq, vpermd, vpermps or vperm2i128.  */
- 
- static bool
- expand_vec_perm_pshufb (struct expand_vec_perm_d *d)
- {
-   unsigned i, nelt, eltsz, mask;
-   unsigned char perm[64];
-   machine_mode vmode = V16QImode;
-   rtx rperm[64], vperm, target, op0, op1;
- 
-   nelt = d->nelt;
- 
-   if (!d->one_operand_p)
-     {
-       if (!TARGET_XOP || GET_MODE_SIZE (d->vmode) != 16)
- 	{
- 	  if (TARGET_AVX2
- 	      && valid_perm_using_mode_p (V2TImode, d))
- 	    {
- 	      if (d->testing_p)
- 		return true;
- 
- 	      /* Use vperm2i128 insn.  The pattern uses
- 		 V4DImode instead of V2TImode.  */
- 	      target = d->target;
- 	      if (d->vmode != V4DImode)
- 		target = gen_reg_rtx (V4DImode);
- 	      op0 = gen_lowpart (V4DImode, d->op0);
- 	      op1 = gen_lowpart (V4DImode, d->op1);
- 	      rperm[0]
- 		= GEN_INT ((d->perm[0] / (nelt / 2))
- 			   | ((d->perm[nelt / 2] / (nelt / 2)) * 16));
- 	      emit_insn (gen_avx2_permv2ti (target, op0, op1, rperm[0]));
- 	      if (target != d->target)
- 		emit_move_insn (d->target, gen_lowpart (d->vmode, target));
- 	      return true;
- 	    }
- 	  return false;
- 	}
-     }
-   else
-     {
-       if (GET_MODE_SIZE (d->vmode) == 16)
- 	{
- 	  if (!TARGET_SSSE3)
- 	    return false;
- 	}
-       else if (GET_MODE_SIZE (d->vmode) == 32)
- 	{
- 	  if (!TARGET_AVX2)
- 	    return false;
- 
- 	  /* V4DImode should be already handled through
- 	     expand_vselect by vpermq instruction.  */
- 	  gcc_assert (d->vmode != V4DImode);
- 
- 	  vmode = V32QImode;
- 	  if (d->vmode == V8SImode
- 	      || d->vmode == V16HImode
- 	      || d->vmode == V32QImode)
- 	    {
- 	      /* First see if vpermq can be used for
- 		 V8SImode/V16HImode/V32QImode.  */
- 	      if (valid_perm_using_mode_p (V4DImode, d))
- 		{
- 		  for (i = 0; i < 4; i++)
- 		    perm[i] = (d->perm[i * nelt / 4] * 4 / nelt) & 3;
- 		  if (d->testing_p)
- 		    return true;
- 		  target = gen_reg_rtx (V4DImode);
- 		  if (expand_vselect (target, gen_lowpart (V4DImode, d->op0),
- 				      perm, 4, false))
- 		    {
- 		      emit_move_insn (d->target,
- 				      gen_lowpart (d->vmode, target));
- 		      return true;
- 		    }
- 		  return false;
- 		}
- 
- 	      /* Next see if vpermd can be used.  */
- 	      if (valid_perm_using_mode_p (V8SImode, d))
- 		vmode = V8SImode;
- 	    }
- 	  /* Or if vpermps can be used.  */
- 	  else if (d->vmode == V8SFmode)
- 	    vmode = V8SImode;
- 
- 	  if (vmode == V32QImode)
- 	    {
- 	      /* vpshufb only works intra lanes, it is not
- 		 possible to shuffle bytes in between the lanes.  */
- 	      for (i = 0; i < nelt; ++i)
- 		if ((d->perm[i] ^ i) & (nelt / 2))
- 		  return false;
- 	    }
- 	}
-       else if (GET_MODE_SIZE (d->vmode) == 64)
- 	{
- 	  if (!TARGET_AVX512BW)
- 	    return false;
- 
- 	  /* If vpermq didn't work, vpshufb won't work either.  */
- 	  if (d->vmode == V8DFmode || d->vmode == V8DImode)
- 	    return false;
- 
- 	  vmode = V64QImode;
- 	  if (d->vmode == V16SImode
- 	      || d->vmode == V32HImode
- 	      || d->vmode == V64QImode)
- 	    {
- 	      /* First see if vpermq can be used for
- 		 V16SImode/V32HImode/V64QImode.  */
- 	      if (valid_perm_using_mode_p (V8DImode, d))
- 		{
- 		  for (i = 0; i < 8; i++)
- 		    perm[i] = (d->perm[i * nelt / 8] * 8 / nelt) & 7;
- 		  if (d->testing_p)
- 		    return true;
- 		  target = gen_reg_rtx (V8DImode);
- 		  if (expand_vselect (target, gen_lowpart (V8DImode, d->op0),
- 				      perm, 8, false))
- 		    {
- 		      emit_move_insn (d->target,
- 				      gen_lowpart (d->vmode, target));
- 		      return true;
- 		    }
- 		  return false;
- 		}
- 
- 	      /* Next see if vpermd can be used.  */
- 	      if (valid_perm_using_mode_p (V16SImode, d))
- 		vmode = V16SImode;
- 	    }
- 	  /* Or if vpermps can be used.  */
- 	  else if (d->vmode == V16SFmode)
- 	    vmode = V16SImode;
- 	  if (vmode == V64QImode)
- 	    {
- 	      /* vpshufb only works intra lanes, it is not
- 		 possible to shuffle bytes in between the lanes.  */
- 	      for (i = 0; i < nelt; ++i)
- 		if ((d->perm[i] ^ i) & (nelt / 4))
- 		  return false;
- 	    }
- 	}
-       else
- 	return false;
-     }
- 
-   if (d->testing_p)
-     return true;
- 
-   if (vmode == V8SImode)
-     for (i = 0; i < 8; ++i)
-       rperm[i] = GEN_INT ((d->perm[i * nelt / 8] * 8 / nelt) & 7);
-   else if (vmode == V16SImode)
-     for (i = 0; i < 16; ++i)
-       rperm[i] = GEN_INT ((d->perm[i * nelt / 16] * 16 / nelt) & 15);
-   else
-     {
-       eltsz = GET_MODE_UNIT_SIZE (d->vmode);
-       if (!d->one_operand_p)
- 	mask = 2 * nelt - 1;
-       else if (vmode == V16QImode)
- 	mask = nelt - 1;
-       else if (vmode == V64QImode)
- 	mask = nelt / 4 - 1;
-       else
- 	mask = nelt / 2 - 1;
- 
-       for (i = 0; i < nelt; ++i)
- 	{
- 	  unsigned j, e = d->perm[i] & mask;
- 	  for (j = 0; j < eltsz; ++j)
- 	    rperm[i * eltsz + j] = GEN_INT (e * eltsz + j);
- 	}
-     }
- 
-   vperm = gen_rtx_CONST_VECTOR (vmode,
- 				gen_rtvec_v (GET_MODE_NUNITS (vmode), rperm));
-   vperm = force_reg (vmode, vperm);
- 
-   target = d->target;
-   if (d->vmode != vmode)
-     target = gen_reg_rtx (vmode);
-   op0 = gen_lowpart (vmode, d->op0);
-   if (d->one_operand_p)
-     {
-       if (vmode == V16QImode)
- 	emit_insn (gen_ssse3_pshufbv16qi3 (target, op0, vperm));
-       else if (vmode == V32QImode)
- 	emit_insn (gen_avx2_pshufbv32qi3 (target, op0, vperm));
-       else if (vmode == V64QImode)
- 	emit_insn (gen_avx512bw_pshufbv64qi3 (target, op0, vperm));
-       else if (vmode == V8SFmode)
- 	emit_insn (gen_avx2_permvarv8sf (target, op0, vperm));
-       else if (vmode == V8SImode)
- 	emit_insn (gen_avx2_permvarv8si (target, op0, vperm));
-       else if (vmode == V16SFmode)
- 	emit_insn (gen_avx512f_permvarv16sf (target, op0, vperm));
-       else if (vmode == V16SImode)
- 	emit_insn (gen_avx512f_permvarv16si (target, op0, vperm));
-       else
- 	gcc_unreachable ();
-     }
-   else
-     {
-       op1 = gen_lowpart (vmode, d->op1);
-       emit_insn (gen_xop_pperm (target, op0, op1, vperm));
-     }
-   if (target != d->target)
-     emit_move_insn (d->target, gen_lowpart (d->vmode, target));
- 
-   return true;
- }
- 
- /* For V*[QHS]Imode permutations, check if the same permutation
-    can't be performed in a 2x, 4x or 8x wider inner mode.  */
- 
- static bool
- canonicalize_vector_int_perm (const struct expand_vec_perm_d *d,
- 			      struct expand_vec_perm_d *nd)
- {
-   int i;
-   machine_mode mode = VOIDmode;
- 
-   switch (d->vmode)
-     {
-     case E_V16QImode: mode = V8HImode; break;
-     case E_V32QImode: mode = V16HImode; break;
-     case E_V64QImode: mode = V32HImode; break;
-     case E_V8HImode: mode = V4SImode; break;
-     case E_V16HImode: mode = V8SImode; break;
-     case E_V32HImode: mode = V16SImode; break;
-     case E_V4SImode: mode = V2DImode; break;
-     case E_V8SImode: mode = V4DImode; break;
-     case E_V16SImode: mode = V8DImode; break;
-     default: return false;
-     }
-   for (i = 0; i < d->nelt; i += 2)
-     if ((d->perm[i] & 1) || d->perm[i + 1] != d->perm[i] + 1)
-       return false;
-   nd->vmode = mode;
-   nd->nelt = d->nelt / 2;
-   for (i = 0; i < nd->nelt; i++)
-     nd->perm[i] = d->perm[2 * i] / 2;
-   if (GET_MODE_INNER (mode) != DImode)
-     canonicalize_vector_int_perm (nd, nd);
-   if (nd != d)
-     {
-       nd->one_operand_p = d->one_operand_p;
-       nd->testing_p = d->testing_p;
-       if (d->op0 == d->op1)
- 	nd->op0 = nd->op1 = gen_lowpart (nd->vmode, d->op0);
-       else
- 	{
- 	  nd->op0 = gen_lowpart (nd->vmode, d->op0);
- 	  nd->op1 = gen_lowpart (nd->vmode, d->op1);
- 	}
-       if (d->testing_p)
- 	nd->target = gen_raw_REG (nd->vmode, LAST_VIRTUAL_REGISTER + 1);
-       else
- 	nd->target = gen_reg_rtx (nd->vmode);
-     }
-   return true;
- }
- 
- /* Try to expand one-operand permutation with constant mask.  */
- 
- static bool
- ix86_expand_vec_one_operand_perm_avx512 (struct expand_vec_perm_d *d)
- {
-   machine_mode mode = GET_MODE (d->op0);
-   machine_mode maskmode = mode;
-   rtx (*gen) (rtx, rtx, rtx) = NULL;
-   rtx target, op0, mask;
-   rtx vec[64];
- 
-   if (!rtx_equal_p (d->op0, d->op1))
-     return false;
- 
-   if (!TARGET_AVX512F)
-     return false;
- 
-   switch (mode)
-     {
-     case E_V16SImode:
-       gen = gen_avx512f_permvarv16si;
-       break;
-     case E_V16SFmode:
-       gen = gen_avx512f_permvarv16sf;
-       maskmode = V16SImode;
-       break;
-     case E_V8DImode:
-       gen = gen_avx512f_permvarv8di;
-       break;
-     case E_V8DFmode:
-       gen = gen_avx512f_permvarv8df;
-       maskmode = V8DImode;
-       break;
-     default:
-       return false;
-     }
- 
-   target = d->target;
-   op0 = d->op0;
-   for (int i = 0; i < d->nelt; ++i)
-     vec[i] = GEN_INT (d->perm[i]);
-   mask = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (d->nelt, vec));
-   emit_insn (gen (target, op0, force_reg (maskmode, mask)));
-   return true;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Try to instantiate D
-    in a single instruction.  */
- 
- static bool
- expand_vec_perm_1 (struct expand_vec_perm_d *d)
- {
-   unsigned i, nelt = d->nelt;
-   struct expand_vec_perm_d nd;
- 
-   /* Check plain VEC_SELECT first, because AVX has instructions that could
-      match both SEL and SEL+CONCAT, but the plain SEL will allow a memory
-      input where SEL+CONCAT may not.  */
-   if (d->one_operand_p)
-     {
-       int mask = nelt - 1;
-       bool identity_perm = true;
-       bool broadcast_perm = true;
- 
-       for (i = 0; i < nelt; i++)
- 	{
- 	  nd.perm[i] = d->perm[i] & mask;
- 	  if (nd.perm[i] != i)
- 	    identity_perm = false;
- 	  if (nd.perm[i])
- 	    broadcast_perm = false;
- 	}
- 
-       if (identity_perm)
- 	{
- 	  if (!d->testing_p)
- 	    emit_move_insn (d->target, d->op0);
- 	  return true;
- 	}
-       else if (broadcast_perm && TARGET_AVX2)
- 	{
- 	  /* Use vpbroadcast{b,w,d}.  */
- 	  rtx (*gen) (rtx, rtx) = NULL;
- 	  switch (d->vmode)
- 	    {
- 	    case E_V64QImode:
- 	      if (TARGET_AVX512BW)
- 		gen = gen_avx512bw_vec_dupv64qi_1;
- 	      break;
- 	    case E_V32QImode:
- 	      gen = gen_avx2_pbroadcastv32qi_1;
- 	      break;
- 	    case E_V32HImode:
- 	      if (TARGET_AVX512BW)
- 		gen = gen_avx512bw_vec_dupv32hi_1;
- 	      break;
- 	    case E_V16HImode:
- 	      gen = gen_avx2_pbroadcastv16hi_1;
- 	      break;
- 	    case E_V16SImode:
- 	      if (TARGET_AVX512F)
- 		gen = gen_avx512f_vec_dupv16si_1;
- 	      break;
- 	    case E_V8SImode:
- 	      gen = gen_avx2_pbroadcastv8si_1;
- 	      break;
- 	    case E_V16QImode:
- 	      gen = gen_avx2_pbroadcastv16qi;
- 	      break;
- 	    case E_V8HImode:
- 	      gen = gen_avx2_pbroadcastv8hi;
- 	      break;
- 	    case E_V16SFmode:
- 	      if (TARGET_AVX512F)
- 		gen = gen_avx512f_vec_dupv16sf_1;
- 	      break;
- 	    case E_V8SFmode:
- 	      gen = gen_avx2_vec_dupv8sf_1;
- 	      break;
- 	    case E_V8DFmode:
- 	      if (TARGET_AVX512F)
- 		gen = gen_avx512f_vec_dupv8df_1;
- 	      break;
- 	    case E_V8DImode:
- 	      if (TARGET_AVX512F)
- 		gen = gen_avx512f_vec_dupv8di_1;
- 	      break;
- 	    /* For other modes prefer other shuffles this function creates.  */
- 	    default: break;
- 	    }
- 	  if (gen != NULL)
- 	    {
- 	      if (!d->testing_p)
- 		emit_insn (gen (d->target, d->op0));
- 	      return true;
- 	    }
- 	}
- 
-       if (expand_vselect (d->target, d->op0, nd.perm, nelt, d->testing_p))
- 	return true;
- 
-       /* There are plenty of patterns in sse.md that are written for
- 	 SEL+CONCAT and are not replicated for a single op.  Perhaps
- 	 that should be changed, to avoid the nastiness here.  */
- 
-       /* Recognize interleave style patterns, which means incrementing
- 	 every other permutation operand.  */
-       for (i = 0; i < nelt; i += 2)
- 	{
- 	  nd.perm[i] = d->perm[i] & mask;
- 	  nd.perm[i + 1] = (d->perm[i + 1] & mask) + nelt;
- 	}
-       if (expand_vselect_vconcat (d->target, d->op0, d->op0, nd.perm, nelt,
- 				  d->testing_p))
- 	return true;
- 
-       /* Recognize shufps, which means adding {0, 0, nelt, nelt}.  */
-       if (nelt >= 4)
- 	{
- 	  for (i = 0; i < nelt; i += 4)
- 	    {
- 	      nd.perm[i + 0] = d->perm[i + 0] & mask;
- 	      nd.perm[i + 1] = d->perm[i + 1] & mask;
- 	      nd.perm[i + 2] = (d->perm[i + 2] & mask) + nelt;
- 	      nd.perm[i + 3] = (d->perm[i + 3] & mask) + nelt;
- 	    }
- 
- 	  if (expand_vselect_vconcat (d->target, d->op0, d->op0, nd.perm, nelt,
- 				      d->testing_p))
- 	    return true;
- 	}
-     }
- 
-   /* Try movss/movsd instructions.  */
-   if (expand_vec_perm_movs (d))
-     return true;
- 
-   /* Finally, try the fully general two operand permute.  */
-   if (expand_vselect_vconcat (d->target, d->op0, d->op1, d->perm, nelt,
- 			      d->testing_p))
-     return true;
- 
-   /* Recognize interleave style patterns with reversed operands.  */
-   if (!d->one_operand_p)
-     {
-       for (i = 0; i < nelt; ++i)
- 	{
- 	  unsigned e = d->perm[i];
- 	  if (e >= nelt)
- 	    e -= nelt;
- 	  else
- 	    e += nelt;
- 	  nd.perm[i] = e;
- 	}
- 
-       if (expand_vselect_vconcat (d->target, d->op1, d->op0, nd.perm, nelt,
- 				  d->testing_p))
- 	return true;
-     }
- 
-   /* Try the SSE4.1 blend variable merge instructions.  */
-   if (expand_vec_perm_blend (d))
-     return true;
- 
-   /* Try one of the AVX vpermil variable permutations.  */
-   if (expand_vec_perm_vpermil (d))
-     return true;
- 
-   /* Try the SSSE3 pshufb or XOP vpperm or AVX2 vperm2i128,
-      vpshufb, vpermd, vpermps or vpermq variable permutation.  */
-   if (expand_vec_perm_pshufb (d))
-     return true;
- 
-   /* Try the AVX2 vpalignr instruction.  */
-   if (expand_vec_perm_palignr (d, true))
-     return true;
- 
-   /* Try the AVX512F vperm{s,d} instructions.  */
-   if (ix86_expand_vec_one_operand_perm_avx512 (d))
-     return true;
- 
-   /* Try the AVX512F vpermt2/vpermi2 instructions.  */
-   if (ix86_expand_vec_perm_vpermt2 (NULL_RTX, NULL_RTX, NULL_RTX, NULL_RTX, d))
-     return true;
- 
-   /* See if we can get the same permutation in different vector integer
-      mode.  */
-   if (canonicalize_vector_int_perm (d, &nd) && expand_vec_perm_1 (&nd))
-     {
-       if (!d->testing_p)
- 	emit_move_insn (d->target, gen_lowpart (d->vmode, nd.target));
-       return true;
-     }
-   return false;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Try to implement D
-    in terms of a pair of pshuflw + pshufhw instructions.  */
- 
- static bool
- expand_vec_perm_pshuflw_pshufhw (struct expand_vec_perm_d *d)
- {
-   unsigned char perm2[MAX_VECT_LEN];
-   unsigned i;
-   bool ok;
- 
-   if (d->vmode != V8HImode || !d->one_operand_p)
-     return false;
- 
-   /* The two permutations only operate in 64-bit lanes.  */
-   for (i = 0; i < 4; ++i)
-     if (d->perm[i] >= 4)
-       return false;
-   for (i = 4; i < 8; ++i)
-     if (d->perm[i] < 4)
-       return false;
- 
-   if (d->testing_p)
-     return true;
- 
-   /* Emit the pshuflw.  */
-   memcpy (perm2, d->perm, 4);
-   for (i = 4; i < 8; ++i)
-     perm2[i] = i;
-   ok = expand_vselect (d->target, d->op0, perm2, 8, d->testing_p);
-   gcc_assert (ok);
- 
-   /* Emit the pshufhw.  */
-   memcpy (perm2 + 4, d->perm + 4, 4);
-   for (i = 0; i < 4; ++i)
-     perm2[i] = i;
-   ok = expand_vselect (d->target, d->target, perm2, 8, d->testing_p);
-   gcc_assert (ok);
- 
-   return true;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Try to simplify
-    the permutation using the SSSE3 palignr instruction.  This succeeds
-    when all of the elements in PERM fit within one vector and we merely
-    need to shift them down so that a single vector permutation has a
-    chance to succeed.  If SINGLE_INSN_ONLY_P, succeed if only
-    the vpalignr instruction itself can perform the requested permutation.  */
- 
- static bool
- expand_vec_perm_palignr (struct expand_vec_perm_d *d, bool single_insn_only_p)
- {
-   unsigned i, nelt = d->nelt;
-   unsigned min, max, minswap, maxswap;
-   bool in_order, ok, swap = false;
-   rtx shift, target;
-   struct expand_vec_perm_d dcopy;
- 
-   /* Even with AVX, palignr only operates on 128-bit vectors,
-      in AVX2 palignr operates on both 128-bit lanes.  */
-   if ((!TARGET_SSSE3 || GET_MODE_SIZE (d->vmode) != 16)
-       && (!TARGET_AVX2 || GET_MODE_SIZE (d->vmode) != 32))
-     return false;
- 
-   min = 2 * nelt;
-   max = 0;
-   minswap = 2 * nelt;
-   maxswap = 0;
-   for (i = 0; i < nelt; ++i)
-     {
-       unsigned e = d->perm[i];
-       unsigned eswap = d->perm[i] ^ nelt;
-       if (GET_MODE_SIZE (d->vmode) == 32)
- 	{
- 	  e = (e & ((nelt / 2) - 1)) | ((e & nelt) >> 1);
- 	  eswap = e ^ (nelt / 2);
- 	}
-       if (e < min)
- 	min = e;
-       if (e > max)
- 	max = e;
-       if (eswap < minswap)
- 	minswap = eswap;
-       if (eswap > maxswap)
- 	maxswap = eswap;
-     }
-   if (min == 0
-       || max - min >= (GET_MODE_SIZE (d->vmode) == 32 ? nelt / 2 : nelt))
-     {
-       if (d->one_operand_p
- 	  || minswap == 0
- 	  || maxswap - minswap >= (GET_MODE_SIZE (d->vmode) == 32
- 				   ? nelt / 2 : nelt))
- 	return false;
-       swap = true;
-       min = minswap;
-       max = maxswap;
-     }
- 
-   /* Given that we have SSSE3, we know we'll be able to implement the
-      single operand permutation after the palignr with pshufb for
-      128-bit vectors.  If SINGLE_INSN_ONLY_P, in_order has to be computed
-      first.  */
-   if (d->testing_p && GET_MODE_SIZE (d->vmode) == 16 && !single_insn_only_p)
-     return true;
- 
-   dcopy = *d;
-   if (swap)
-     {
-       dcopy.op0 = d->op1;
-       dcopy.op1 = d->op0;
-       for (i = 0; i < nelt; ++i)
- 	dcopy.perm[i] ^= nelt;
-     }
- 
-   in_order = true;
-   for (i = 0; i < nelt; ++i)
-     {
-       unsigned e = dcopy.perm[i];
-       if (GET_MODE_SIZE (d->vmode) == 32
- 	  && e >= nelt
- 	  && (e & (nelt / 2 - 1)) < min)
- 	e = e - min - (nelt / 2);
-       else
- 	e = e - min;
-       if (e != i)
- 	in_order = false;
-       dcopy.perm[i] = e;
-     }
-   dcopy.one_operand_p = true;
- 
-   if (single_insn_only_p && !in_order)
-     return false;
- 
-   /* For AVX2, test whether we can permute the result in one instruction.  */
-   if (d->testing_p)
-     {
-       if (in_order)
- 	return true;
-       dcopy.op1 = dcopy.op0;
-       return expand_vec_perm_1 (&dcopy);
-     }
- 
-   shift = GEN_INT (min * GET_MODE_UNIT_BITSIZE (d->vmode));
-   if (GET_MODE_SIZE (d->vmode) == 16)
-     {
-       target = gen_reg_rtx (TImode);
-       emit_insn (gen_ssse3_palignrti (target, gen_lowpart (TImode, dcopy.op1),
- 				      gen_lowpart (TImode, dcopy.op0), shift));
-     }
-   else
-     {
-       target = gen_reg_rtx (V2TImode);
-       emit_insn (gen_avx2_palignrv2ti (target,
- 				       gen_lowpart (V2TImode, dcopy.op1),
- 				       gen_lowpart (V2TImode, dcopy.op0),
- 				       shift));
-     }
- 
-   dcopy.op0 = dcopy.op1 = gen_lowpart (d->vmode, target);
- 
-   /* Test for the degenerate case where the alignment by itself
-      produces the desired permutation.  */
-   if (in_order)
-     {
-       emit_move_insn (d->target, dcopy.op0);
-       return true;
-     }
- 
-   ok = expand_vec_perm_1 (&dcopy);
-   gcc_assert (ok || GET_MODE_SIZE (d->vmode) == 32);
- 
-   return ok;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_const_1.  Try to simplify
-    the permutation using the SSE4_1 pblendv instruction.  Potentially
-    reduces permutation from 2 pshufb and or to 1 pshufb and pblendv.  */
- 
- static bool
- expand_vec_perm_pblendv (struct expand_vec_perm_d *d)
- {
-   unsigned i, which, nelt = d->nelt;
-   struct expand_vec_perm_d dcopy, dcopy1;
-   machine_mode vmode = d->vmode;
-   bool ok;
- 
-   /* Use the same checks as in expand_vec_perm_blend.  */
-   if (d->one_operand_p)
-     return false;
-   if (TARGET_AVX2 && GET_MODE_SIZE (vmode) == 32)
-     ;
-   else if (TARGET_AVX && (vmode == V4DFmode || vmode == V8SFmode))
-     ;
-   else if (TARGET_SSE4_1 && GET_MODE_SIZE (vmode) == 16)
-     ;
-   else
-     return false;
- 
-   /* Figure out where permutation elements stay not in their
-      respective lanes.  */
-   for (i = 0, which = 0; i < nelt; ++i)
-     {
-       unsigned e = d->perm[i];
-       if (e != i)
- 	which |= (e < nelt ? 1 : 2);
-     }
-   /* We can pblend the part where elements stay not in their
-      respective lanes only when these elements are all in one
-      half of a permutation.
-      {0 1 8 3 4 5 9 7} is ok as 8, 9 are at not at their respective
-      lanes, but both 8 and 9 >= 8
-      {0 1 8 3 4 5 2 7} is not ok as 2 and 8 are not at their
-      respective lanes and 8 >= 8, but 2 not.  */
-   if (which != 1 && which != 2)
-     return false;
-   if (d->testing_p && GET_MODE_SIZE (vmode) == 16)
-     return true;
- 
-   /* First we apply one operand permutation to the part where
-      elements stay not in their respective lanes.  */
-   dcopy = *d;
-   if (which == 2)
-     dcopy.op0 = dcopy.op1 = d->op1;
-   else
-     dcopy.op0 = dcopy.op1 = d->op0;
-   if (!d->testing_p)
-     dcopy.target = gen_reg_rtx (vmode);
-   dcopy.one_operand_p = true;
- 
-   for (i = 0; i < nelt; ++i)
-     dcopy.perm[i] = d->perm[i] & (nelt - 1);
- 
-   ok = expand_vec_perm_1 (&dcopy);
-   if (GET_MODE_SIZE (vmode) != 16 && !ok)
-     return false;
-   else
-     gcc_assert (ok);
-   if (d->testing_p)
-     return true;
- 
-   /* Next we put permuted elements into their positions.  */
-   dcopy1 = *d;
-   if (which == 2)
-     dcopy1.op1 = dcopy.target;
-   else
-     dcopy1.op0 = dcopy.target;
- 
-   for (i = 0; i < nelt; ++i)
-     dcopy1.perm[i] = ((d->perm[i] >= nelt) ? (nelt + i) : i);
- 
-   ok = expand_vec_perm_blend (&dcopy1);
-   gcc_assert (ok);
- 
-   return true;
- }
- 
- static bool expand_vec_perm_interleave3 (struct expand_vec_perm_d *d);
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Try to simplify
-    a two vector permutation into a single vector permutation by using
-    an interleave operation to merge the vectors.  */
- 
- static bool
- expand_vec_perm_interleave2 (struct expand_vec_perm_d *d)
- {
-   struct expand_vec_perm_d dremap, dfinal;
-   unsigned i, nelt = d->nelt, nelt2 = nelt / 2;
-   unsigned HOST_WIDE_INT contents;
-   unsigned char remap[2 * MAX_VECT_LEN];
-   rtx_insn *seq;
-   bool ok, same_halves = false;
- 
-   if (GET_MODE_SIZE (d->vmode) == 16)
-     {
-       if (d->one_operand_p)
- 	return false;
-     }
-   else if (GET_MODE_SIZE (d->vmode) == 32)
-     {
-       if (!TARGET_AVX)
- 	return false;
-       /* For 32-byte modes allow even d->one_operand_p.
- 	 The lack of cross-lane shuffling in some instructions
- 	 might prevent a single insn shuffle.  */
-       dfinal = *d;
-       dfinal.testing_p = true;
-       /* If expand_vec_perm_interleave3 can expand this into
- 	 a 3 insn sequence, give up and let it be expanded as
- 	 3 insn sequence.  While that is one insn longer,
- 	 it doesn't need a memory operand and in the common
- 	 case that both interleave low and high permutations
- 	 with the same operands are adjacent needs 4 insns
- 	 for both after CSE.  */
-       if (expand_vec_perm_interleave3 (&dfinal))
- 	return false;
-     }
-   else
-     return false;
- 
-   /* Examine from whence the elements come.  */
-   contents = 0;
-   for (i = 0; i < nelt; ++i)
-     contents |= HOST_WIDE_INT_1U << d->perm[i];
- 
-   memset (remap, 0xff, sizeof (remap));
-   dremap = *d;
- 
-   if (GET_MODE_SIZE (d->vmode) == 16)
-     {
-       unsigned HOST_WIDE_INT h1, h2, h3, h4;
- 
-       /* Split the two input vectors into 4 halves.  */
-       h1 = (HOST_WIDE_INT_1U << nelt2) - 1;
-       h2 = h1 << nelt2;
-       h3 = h2 << nelt2;
-       h4 = h3 << nelt2;
- 
-       /* If the elements from the low halves use interleave low, and similarly
- 	 for interleave high.  If the elements are from mis-matched halves, we
- 	 can use shufps for V4SF/V4SI or do a DImode shuffle.  */
-       if ((contents & (h1 | h3)) == contents)
- 	{
- 	  /* punpckl* */
- 	  for (i = 0; i < nelt2; ++i)
- 	    {
- 	      remap[i] = i * 2;
- 	      remap[i + nelt] = i * 2 + 1;
- 	      dremap.perm[i * 2] = i;
- 	      dremap.perm[i * 2 + 1] = i + nelt;
- 	    }
- 	  if (!TARGET_SSE2 && d->vmode == V4SImode)
- 	    dremap.vmode = V4SFmode;
- 	}
-       else if ((contents & (h2 | h4)) == contents)
- 	{
- 	  /* punpckh* */
- 	  for (i = 0; i < nelt2; ++i)
- 	    {
- 	      remap[i + nelt2] = i * 2;
- 	      remap[i + nelt + nelt2] = i * 2 + 1;
- 	      dremap.perm[i * 2] = i + nelt2;
- 	      dremap.perm[i * 2 + 1] = i + nelt + nelt2;
- 	    }
- 	  if (!TARGET_SSE2 && d->vmode == V4SImode)
- 	    dremap.vmode = V4SFmode;
- 	}
-       else if ((contents & (h1 | h4)) == contents)
- 	{
- 	  /* shufps */
- 	  for (i = 0; i < nelt2; ++i)
- 	    {
- 	      remap[i] = i;
- 	      remap[i + nelt + nelt2] = i + nelt2;
- 	      dremap.perm[i] = i;
- 	      dremap.perm[i + nelt2] = i + nelt + nelt2;
- 	    }
- 	  if (nelt != 4)
- 	    {
- 	      /* shufpd */
- 	      dremap.vmode = V2DImode;
- 	      dremap.nelt = 2;
- 	      dremap.perm[0] = 0;
- 	      dremap.perm[1] = 3;
- 	    }
- 	}
-       else if ((contents & (h2 | h3)) == contents)
- 	{
- 	  /* shufps */
- 	  for (i = 0; i < nelt2; ++i)
- 	    {
- 	      remap[i + nelt2] = i;
- 	      remap[i + nelt] = i + nelt2;
- 	      dremap.perm[i] = i + nelt2;
- 	      dremap.perm[i + nelt2] = i + nelt;
- 	    }
- 	  if (nelt != 4)
- 	    {
- 	      /* shufpd */
- 	      dremap.vmode = V2DImode;
- 	      dremap.nelt = 2;
- 	      dremap.perm[0] = 1;
- 	      dremap.perm[1] = 2;
- 	    }
- 	}
-       else
- 	return false;
-     }
-   else
-     {
-       unsigned int nelt4 = nelt / 4, nzcnt = 0;
-       unsigned HOST_WIDE_INT q[8];
-       unsigned int nonzero_halves[4];
- 
-       /* Split the two input vectors into 8 quarters.  */
-       q[0] = (HOST_WIDE_INT_1U << nelt4) - 1;
-       for (i = 1; i < 8; ++i)
- 	q[i] = q[0] << (nelt4 * i);
-       for (i = 0; i < 4; ++i)
- 	if (((q[2 * i] | q[2 * i + 1]) & contents) != 0)
- 	  {
- 	    nonzero_halves[nzcnt] = i;
- 	    ++nzcnt;
- 	  }
- 
-       if (nzcnt == 1)
- 	{
- 	  gcc_assert (d->one_operand_p);
- 	  nonzero_halves[1] = nonzero_halves[0];
- 	  same_halves = true;
- 	}
-       else if (d->one_operand_p)
- 	{
- 	  gcc_assert (nonzero_halves[0] == 0);
- 	  gcc_assert (nonzero_halves[1] == 1);
- 	}
- 
-       if (nzcnt <= 2)
- 	{
- 	  if (d->perm[0] / nelt2 == nonzero_halves[1])
- 	    {
- 	      /* Attempt to increase the likelihood that dfinal
- 		 shuffle will be intra-lane.  */
- 	      std::swap (nonzero_halves[0], nonzero_halves[1]);
- 	    }
- 
- 	  /* vperm2f128 or vperm2i128.  */
- 	  for (i = 0; i < nelt2; ++i)
- 	    {
- 	      remap[i + nonzero_halves[1] * nelt2] = i + nelt2;
- 	      remap[i + nonzero_halves[0] * nelt2] = i;
- 	      dremap.perm[i + nelt2] = i + nonzero_halves[1] * nelt2;
- 	      dremap.perm[i] = i + nonzero_halves[0] * nelt2;
- 	    }
- 
- 	  if (d->vmode != V8SFmode
- 	      && d->vmode != V4DFmode
- 	      && d->vmode != V8SImode)
- 	    {
- 	      dremap.vmode = V8SImode;
- 	      dremap.nelt = 8;
- 	      for (i = 0; i < 4; ++i)
- 		{
- 		  dremap.perm[i] = i + nonzero_halves[0] * 4;
- 		  dremap.perm[i + 4] = i + nonzero_halves[1] * 4;
- 		}
- 	    }
- 	}
-       else if (d->one_operand_p)
- 	return false;
-       else if (TARGET_AVX2
- 	       && (contents & (q[0] | q[2] | q[4] | q[6])) == contents)
- 	{
- 	  /* vpunpckl* */
- 	  for (i = 0; i < nelt4; ++i)
- 	    {
- 	      remap[i] = i * 2;
- 	      remap[i + nelt] = i * 2 + 1;
- 	      remap[i + nelt2] = i * 2 + nelt2;
- 	      remap[i + nelt + nelt2] = i * 2 + nelt2 + 1;
- 	      dremap.perm[i * 2] = i;
- 	      dremap.perm[i * 2 + 1] = i + nelt;
- 	      dremap.perm[i * 2 + nelt2] = i + nelt2;
- 	      dremap.perm[i * 2 + nelt2 + 1] = i + nelt + nelt2;
- 	    }
- 	}
-       else if (TARGET_AVX2
- 	       && (contents & (q[1] | q[3] | q[5] | q[7])) == contents)
- 	{
- 	  /* vpunpckh* */
- 	  for (i = 0; i < nelt4; ++i)
- 	    {
- 	      remap[i + nelt4] = i * 2;
- 	      remap[i + nelt + nelt4] = i * 2 + 1;
- 	      remap[i + nelt2 + nelt4] = i * 2 + nelt2;
- 	      remap[i + nelt + nelt2 + nelt4] = i * 2 + nelt2 + 1;
- 	      dremap.perm[i * 2] = i + nelt4;
- 	      dremap.perm[i * 2 + 1] = i + nelt + nelt4;
- 	      dremap.perm[i * 2 + nelt2] = i + nelt2 + nelt4;
- 	      dremap.perm[i * 2 + nelt2 + 1] = i + nelt + nelt2 + nelt4;
- 	    }
- 	}
-       else
- 	return false;
-     }
- 
-   /* Use the remapping array set up above to move the elements from their
-      swizzled locations into their final destinations.  */
-   dfinal = *d;
-   for (i = 0; i < nelt; ++i)
-     {
-       unsigned e = remap[d->perm[i]];
-       gcc_assert (e < nelt);
-       /* If same_halves is true, both halves of the remapped vector are the
- 	 same.  Avoid cross-lane accesses if possible.  */
-       if (same_halves && i >= nelt2)
- 	{
- 	  gcc_assert (e < nelt2);
- 	  dfinal.perm[i] = e + nelt2;
- 	}
-       else
- 	dfinal.perm[i] = e;
-     }
-   if (!d->testing_p)
-     {
-       dremap.target = gen_reg_rtx (dremap.vmode);
-       dfinal.op0 = gen_lowpart (dfinal.vmode, dremap.target);
-     }
-   dfinal.op1 = dfinal.op0;
-   dfinal.one_operand_p = true;
- 
-   /* Test if the final remap can be done with a single insn.  For V4SFmode or
-      V4SImode this *will* succeed.  For V8HImode or V16QImode it may not.  */
-   start_sequence ();
-   ok = expand_vec_perm_1 (&dfinal);
-   seq = get_insns ();
-   end_sequence ();
- 
-   if (!ok)
-     return false;
- 
-   if (d->testing_p)
-     return true;
- 
-   if (dremap.vmode != dfinal.vmode)
-     {
-       dremap.op0 = gen_lowpart (dremap.vmode, dremap.op0);
-       dremap.op1 = gen_lowpart (dremap.vmode, dremap.op1);
-     }
- 
-   ok = expand_vec_perm_1 (&dremap);
-   gcc_assert (ok);
- 
-   emit_insn (seq);
-   return true;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Try to simplify
-    a single vector cross-lane permutation into vpermq followed
-    by any of the single insn permutations.  */
- 
- static bool
- expand_vec_perm_vpermq_perm_1 (struct expand_vec_perm_d *d)
- {
-   struct expand_vec_perm_d dremap, dfinal;
-   unsigned i, j, nelt = d->nelt, nelt2 = nelt / 2, nelt4 = nelt / 4;
-   unsigned contents[2];
-   bool ok;
- 
-   if (!(TARGET_AVX2
- 	&& (d->vmode == V32QImode || d->vmode == V16HImode)
- 	&& d->one_operand_p))
-     return false;
- 
-   contents[0] = 0;
-   contents[1] = 0;
-   for (i = 0; i < nelt2; ++i)
-     {
-       contents[0] |= 1u << (d->perm[i] / nelt4);
-       contents[1] |= 1u << (d->perm[i + nelt2] / nelt4);
-     }
- 
-   for (i = 0; i < 2; ++i)
-     {
-       unsigned int cnt = 0;
-       for (j = 0; j < 4; ++j)
- 	if ((contents[i] & (1u << j)) != 0 && ++cnt > 2)
- 	  return false;
-     }
- 
-   if (d->testing_p)
-     return true;
- 
-   dremap = *d;
-   dremap.vmode = V4DImode;
-   dremap.nelt = 4;
-   dremap.target = gen_reg_rtx (V4DImode);
-   dremap.op0 = gen_lowpart (V4DImode, d->op0);
-   dremap.op1 = dremap.op0;
-   dremap.one_operand_p = true;
-   for (i = 0; i < 2; ++i)
-     {
-       unsigned int cnt = 0;
-       for (j = 0; j < 4; ++j)
- 	if ((contents[i] & (1u << j)) != 0)
- 	  dremap.perm[2 * i + cnt++] = j;
-       for (; cnt < 2; ++cnt)
- 	dremap.perm[2 * i + cnt] = 0;
-     }
- 
-   dfinal = *d;
-   dfinal.op0 = gen_lowpart (dfinal.vmode, dremap.target);
-   dfinal.op1 = dfinal.op0;
-   dfinal.one_operand_p = true;
-   for (i = 0, j = 0; i < nelt; ++i)
-     {
-       if (i == nelt2)
- 	j = 2;
-       dfinal.perm[i] = (d->perm[i] & (nelt4 - 1)) | (j ? nelt2 : 0);
-       if ((d->perm[i] / nelt4) == dremap.perm[j])
- 	;
-       else if ((d->perm[i] / nelt4) == dremap.perm[j + 1])
- 	dfinal.perm[i] |= nelt4;
-       else
- 	gcc_unreachable ();
-     }
- 
-   ok = expand_vec_perm_1 (&dremap);
-   gcc_assert (ok);
- 
-   ok = expand_vec_perm_1 (&dfinal);
-   gcc_assert (ok);
- 
-   return true;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Try to expand
-    a vector permutation using two instructions, vperm2f128 resp.
-    vperm2i128 followed by any single in-lane permutation.  */
- 
- static bool
- expand_vec_perm_vperm2f128 (struct expand_vec_perm_d *d)
- {
-   struct expand_vec_perm_d dfirst, dsecond;
-   unsigned i, j, nelt = d->nelt, nelt2 = nelt / 2, perm;
-   bool ok;
- 
-   if (!TARGET_AVX
-       || GET_MODE_SIZE (d->vmode) != 32
-       || (d->vmode != V8SFmode && d->vmode != V4DFmode && !TARGET_AVX2))
-     return false;
- 
-   dsecond = *d;
-   dsecond.one_operand_p = false;
-   dsecond.testing_p = true;
- 
-   /* ((perm << 2)|perm) & 0x33 is the vperm2[fi]128
-      immediate.  For perm < 16 the second permutation uses
-      d->op0 as first operand, for perm >= 16 it uses d->op1
-      as first operand.  The second operand is the result of
-      vperm2[fi]128.  */
-   for (perm = 0; perm < 32; perm++)
-     {
-       /* Ignore permutations which do not move anything cross-lane.  */
-       if (perm < 16)
- 	{
- 	  /* The second shuffle for e.g. V4DFmode has
- 	     0123 and ABCD operands.
- 	     Ignore AB23, as 23 is already in the second lane
- 	     of the first operand.  */
- 	  if ((perm & 0xc) == (1 << 2)) continue;
- 	  /* And 01CD, as 01 is in the first lane of the first
- 	     operand.  */
- 	  if ((perm & 3) == 0) continue;
- 	  /* And 4567, as then the vperm2[fi]128 doesn't change
- 	     anything on the original 4567 second operand.  */
- 	  if ((perm & 0xf) == ((3 << 2) | 2)) continue;
- 	}
-       else
- 	{
- 	  /* The second shuffle for e.g. V4DFmode has
- 	     4567 and ABCD operands.
- 	     Ignore AB67, as 67 is already in the second lane
- 	     of the first operand.  */
- 	  if ((perm & 0xc) == (3 << 2)) continue;
- 	  /* And 45CD, as 45 is in the first lane of the first
- 	     operand.  */
- 	  if ((perm & 3) == 2) continue;
- 	  /* And 0123, as then the vperm2[fi]128 doesn't change
- 	     anything on the original 0123 first operand.  */
- 	  if ((perm & 0xf) == (1 << 2)) continue;
- 	}
- 
-       for (i = 0; i < nelt; i++)
- 	{
- 	  j = d->perm[i] / nelt2;
- 	  if (j == ((perm >> (2 * (i >= nelt2))) & 3))
- 	    dsecond.perm[i] = nelt + (i & nelt2) + (d->perm[i] & (nelt2 - 1));
- 	  else if (j == (unsigned) (i >= nelt2) + 2 * (perm >= 16))
- 	    dsecond.perm[i] = d->perm[i] & (nelt - 1);
- 	  else
- 	    break;
- 	}
- 
-       if (i == nelt)
- 	{
- 	  start_sequence ();
- 	  ok = expand_vec_perm_1 (&dsecond);
- 	  end_sequence ();
- 	}
-       else
- 	ok = false;
- 
-       if (ok)
- 	{
- 	  if (d->testing_p)
- 	    return true;
- 
- 	  /* Found a usable second shuffle.  dfirst will be
- 	     vperm2f128 on d->op0 and d->op1.  */
- 	  dsecond.testing_p = false;
- 	  dfirst = *d;
- 	  dfirst.target = gen_reg_rtx (d->vmode);
- 	  for (i = 0; i < nelt; i++)
- 	    dfirst.perm[i] = (i & (nelt2 - 1))
- 			     + ((perm >> (2 * (i >= nelt2))) & 3) * nelt2;
- 
- 	  canonicalize_perm (&dfirst);
- 	  ok = expand_vec_perm_1 (&dfirst);
- 	  gcc_assert (ok);
- 
- 	  /* And dsecond is some single insn shuffle, taking
- 	     d->op0 and result of vperm2f128 (if perm < 16) or
- 	     d->op1 and result of vperm2f128 (otherwise).  */
- 	  if (perm >= 16)
- 	    dsecond.op0 = dsecond.op1;
- 	  dsecond.op1 = dfirst.target;
- 
- 	  ok = expand_vec_perm_1 (&dsecond);
- 	  gcc_assert (ok);
- 
- 	  return true;
- 	}
- 
-       /* For one operand, the only useful vperm2f128 permutation is 0x01
- 	 aka lanes swap.  */
-       if (d->one_operand_p)
- 	return false;
-     }
- 
-   return false;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Try to simplify
-    a two vector permutation using 2 intra-lane interleave insns
-    and cross-lane shuffle for 32-byte vectors.  */
- 
- static bool
- expand_vec_perm_interleave3 (struct expand_vec_perm_d *d)
- {
-   unsigned i, nelt;
-   rtx (*gen) (rtx, rtx, rtx);
- 
-   if (d->one_operand_p)
-     return false;
-   if (TARGET_AVX2 && GET_MODE_SIZE (d->vmode) == 32)
-     ;
-   else if (TARGET_AVX && (d->vmode == V8SFmode || d->vmode == V4DFmode))
-     ;
-   else
-     return false;
- 
-   nelt = d->nelt;
-   if (d->perm[0] != 0 && d->perm[0] != nelt / 2)
-     return false;
-   for (i = 0; i < nelt; i += 2)
-     if (d->perm[i] != d->perm[0] + i / 2
- 	|| d->perm[i + 1] != d->perm[0] + i / 2 + nelt)
-       return false;
- 
-   if (d->testing_p)
-     return true;
- 
-   switch (d->vmode)
-     {
-     case E_V32QImode:
-       if (d->perm[0])
- 	gen = gen_vec_interleave_highv32qi;
-       else
- 	gen = gen_vec_interleave_lowv32qi;
-       break;
-     case E_V16HImode:
-       if (d->perm[0])
- 	gen = gen_vec_interleave_highv16hi;
-       else
- 	gen = gen_vec_interleave_lowv16hi;
-       break;
-     case E_V8SImode:
-       if (d->perm[0])
- 	gen = gen_vec_interleave_highv8si;
-       else
- 	gen = gen_vec_interleave_lowv8si;
-       break;
-     case E_V4DImode:
-       if (d->perm[0])
- 	gen = gen_vec_interleave_highv4di;
-       else
- 	gen = gen_vec_interleave_lowv4di;
-       break;
-     case E_V8SFmode:
-       if (d->perm[0])
- 	gen = gen_vec_interleave_highv8sf;
-       else
- 	gen = gen_vec_interleave_lowv8sf;
-       break;
-     case E_V4DFmode:
-       if (d->perm[0])
- 	gen = gen_vec_interleave_highv4df;
-       else
- 	gen = gen_vec_interleave_lowv4df;
-       break;
-     default:
-       gcc_unreachable ();
-     }
- 
-   emit_insn (gen (d->target, d->op0, d->op1));
-   return true;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Try to implement
-    a single vector permutation using a single intra-lane vector
-    permutation, vperm2f128 swapping the lanes and vblend* insn blending
-    the non-swapped and swapped vectors together.  */
- 
- static bool
- expand_vec_perm_vperm2f128_vblend (struct expand_vec_perm_d *d)
- {
-   struct expand_vec_perm_d dfirst, dsecond;
-   unsigned i, j, msk, nelt = d->nelt, nelt2 = nelt / 2;
-   rtx_insn *seq;
-   bool ok;
-   rtx (*blend) (rtx, rtx, rtx, rtx) = NULL;
- 
-   if (!TARGET_AVX
-       || TARGET_AVX2
-       || (d->vmode != V8SFmode && d->vmode != V4DFmode)
-       || !d->one_operand_p)
-     return false;
- 
-   dfirst = *d;
-   for (i = 0; i < nelt; i++)
-     dfirst.perm[i] = 0xff;
-   for (i = 0, msk = 0; i < nelt; i++)
-     {
-       j = (d->perm[i] & nelt2) ? i | nelt2 : i & ~nelt2;
-       if (dfirst.perm[j] != 0xff && dfirst.perm[j] != d->perm[i])
- 	return false;
-       dfirst.perm[j] = d->perm[i];
-       if (j != i)
- 	msk |= (1 << i);
-     }
-   for (i = 0; i < nelt; i++)
-     if (dfirst.perm[i] == 0xff)
-       dfirst.perm[i] = i;
- 
-   if (!d->testing_p)
-     dfirst.target = gen_reg_rtx (dfirst.vmode);
- 
-   start_sequence ();
-   ok = expand_vec_perm_1 (&dfirst);
-   seq = get_insns ();
-   end_sequence ();
- 
-   if (!ok)
-     return false;
- 
-   if (d->testing_p)
-     return true;
- 
-   emit_insn (seq);
- 
-   dsecond = *d;
-   dsecond.op0 = dfirst.target;
-   dsecond.op1 = dfirst.target;
-   dsecond.one_operand_p = true;
-   dsecond.target = gen_reg_rtx (dsecond.vmode);
-   for (i = 0; i < nelt; i++)
-     dsecond.perm[i] = i ^ nelt2;
- 
-   ok = expand_vec_perm_1 (&dsecond);
-   gcc_assert (ok);
- 
-   blend = d->vmode == V8SFmode ? gen_avx_blendps256 : gen_avx_blendpd256;
-   emit_insn (blend (d->target, dfirst.target, dsecond.target, GEN_INT (msk)));
-   return true;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Implement a V4DF
-    permutation using two vperm2f128, followed by a vshufpd insn blending
-    the two vectors together.  */
- 
- static bool
- expand_vec_perm_2vperm2f128_vshuf (struct expand_vec_perm_d *d)
- {
-   struct expand_vec_perm_d dfirst, dsecond, dthird;
-   bool ok;
- 
-   if (!TARGET_AVX || (d->vmode != V4DFmode))
-     return false;
- 
-   if (d->testing_p)
-     return true;
- 
-   dfirst = *d;
-   dsecond = *d;
-   dthird = *d;
- 
-   dfirst.perm[0] = (d->perm[0] & ~1);
-   dfirst.perm[1] = (d->perm[0] & ~1) + 1;
-   dfirst.perm[2] = (d->perm[2] & ~1);
-   dfirst.perm[3] = (d->perm[2] & ~1) + 1;
-   dsecond.perm[0] = (d->perm[1] & ~1);
-   dsecond.perm[1] = (d->perm[1] & ~1) + 1;
-   dsecond.perm[2] = (d->perm[3] & ~1);
-   dsecond.perm[3] = (d->perm[3] & ~1) + 1;
-   dthird.perm[0] = (d->perm[0] % 2);
-   dthird.perm[1] = (d->perm[1] % 2) + 4;
-   dthird.perm[2] = (d->perm[2] % 2) + 2;
-   dthird.perm[3] = (d->perm[3] % 2) + 6;
- 
-   dfirst.target = gen_reg_rtx (dfirst.vmode);
-   dsecond.target = gen_reg_rtx (dsecond.vmode);
-   dthird.op0 = dfirst.target;
-   dthird.op1 = dsecond.target;
-   dthird.one_operand_p = false;
- 
-   canonicalize_perm (&dfirst);
-   canonicalize_perm (&dsecond);
- 
-   ok = expand_vec_perm_1 (&dfirst)
-        && expand_vec_perm_1 (&dsecond)
-        && expand_vec_perm_1 (&dthird);
- 
-   gcc_assert (ok);
- 
-   return true;
- }
- 
- /* A subroutine of expand_vec_perm_even_odd_1.  Implement the double-word
-    permutation with two pshufb insns and an ior.  We should have already
-    failed all two instruction sequences.  */
- 
- static bool
- expand_vec_perm_pshufb2 (struct expand_vec_perm_d *d)
- {
-   rtx rperm[2][16], vperm, l, h, op, m128;
-   unsigned int i, nelt, eltsz;
- 
-   if (!TARGET_SSSE3 || GET_MODE_SIZE (d->vmode) != 16)
-     return false;
-   gcc_assert (!d->one_operand_p);
- 
-   if (d->testing_p)
-     return true;
- 
-   nelt = d->nelt;
-   eltsz = GET_MODE_UNIT_SIZE (d->vmode);
- 
-   /* Generate two permutation masks.  If the required element is within
-      the given vector it is shuffled into the proper lane.  If the required
-      element is in the other vector, force a zero into the lane by setting
-      bit 7 in the permutation mask.  */
-   m128 = GEN_INT (-128);
-   for (i = 0; i < nelt; ++i)
-     {
-       unsigned j, e = d->perm[i];
-       unsigned which = (e >= nelt);
-       if (e >= nelt)
- 	e -= nelt;
- 
-       for (j = 0; j < eltsz; ++j)
- 	{
- 	  rperm[which][i*eltsz + j] = GEN_INT (e*eltsz + j);
- 	  rperm[1-which][i*eltsz + j] = m128;
- 	}
-     }
- 
-   vperm = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, rperm[0]));
-   vperm = force_reg (V16QImode, vperm);
- 
-   l = gen_reg_rtx (V16QImode);
-   op = gen_lowpart (V16QImode, d->op0);
-   emit_insn (gen_ssse3_pshufbv16qi3 (l, op, vperm));
- 
-   vperm = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, rperm[1]));
-   vperm = force_reg (V16QImode, vperm);
- 
-   h = gen_reg_rtx (V16QImode);
-   op = gen_lowpart (V16QImode, d->op1);
-   emit_insn (gen_ssse3_pshufbv16qi3 (h, op, vperm));
- 
-   op = d->target;
-   if (d->vmode != V16QImode)
-     op = gen_reg_rtx (V16QImode);
-   emit_insn (gen_iorv16qi3 (op, l, h));
-   if (op != d->target)
-     emit_move_insn (d->target, gen_lowpart (d->vmode, op));
- 
-   return true;
- }
- 
- /* Implement arbitrary permutation of one V32QImode and V16QImode operand
-    with two vpshufb insns, vpermq and vpor.  We should have already failed
-    all two or three instruction sequences.  */
- 
- static bool
- expand_vec_perm_vpshufb2_vpermq (struct expand_vec_perm_d *d)
- {
-   rtx rperm[2][32], vperm, l, h, hp, op, m128;
-   unsigned int i, nelt, eltsz;
- 
-   if (!TARGET_AVX2
-       || !d->one_operand_p
-       || (d->vmode != V32QImode && d->vmode != V16HImode))
-     return false;
- 
-   if (d->testing_p)
-     return true;
- 
-   nelt = d->nelt;
-   eltsz = GET_MODE_UNIT_SIZE (d->vmode);
- 
-   /* Generate two permutation masks.  If the required element is within
-      the same lane, it is shuffled in.  If the required element from the
-      other lane, force a zero by setting bit 7 in the permutation mask.
-      In the other mask the mask has non-negative elements if element
-      is requested from the other lane, but also moved to the other lane,
-      so that the result of vpshufb can have the two V2TImode halves
-      swapped.  */
-   m128 = GEN_INT (-128);
-   for (i = 0; i < nelt; ++i)
-     {
-       unsigned j, e = d->perm[i] & (nelt / 2 - 1);
-       unsigned which = ((d->perm[i] ^ i) & (nelt / 2)) * eltsz;
- 
-       for (j = 0; j < eltsz; ++j)
- 	{
- 	  rperm[!!which][(i * eltsz + j) ^ which] = GEN_INT (e * eltsz + j);
- 	  rperm[!which][(i * eltsz + j) ^ (which ^ 16)] = m128;
- 	}
-     }
- 
-   vperm = gen_rtx_CONST_VECTOR (V32QImode, gen_rtvec_v (32, rperm[1]));
-   vperm = force_reg (V32QImode, vperm);
- 
-   h = gen_reg_rtx (V32QImode);
-   op = gen_lowpart (V32QImode, d->op0);
-   emit_insn (gen_avx2_pshufbv32qi3 (h, op, vperm));
- 
-   /* Swap the 128-byte lanes of h into hp.  */
-   hp = gen_reg_rtx (V4DImode);
-   op = gen_lowpart (V4DImode, h);
-   emit_insn (gen_avx2_permv4di_1 (hp, op, const2_rtx, GEN_INT (3), const0_rtx,
- 				  const1_rtx));
- 
-   vperm = gen_rtx_CONST_VECTOR (V32QImode, gen_rtvec_v (32, rperm[0]));
-   vperm = force_reg (V32QImode, vperm);
- 
-   l = gen_reg_rtx (V32QImode);
-   op = gen_lowpart (V32QImode, d->op0);
-   emit_insn (gen_avx2_pshufbv32qi3 (l, op, vperm));
- 
-   op = d->target;
-   if (d->vmode != V32QImode)
-     op = gen_reg_rtx (V32QImode);
-   emit_insn (gen_iorv32qi3 (op, l, gen_lowpart (V32QImode, hp)));
-   if (op != d->target)
-     emit_move_insn (d->target, gen_lowpart (d->vmode, op));
- 
-   return true;
- }
- 
- /* A subroutine of expand_vec_perm_even_odd_1.  Implement extract-even
-    and extract-odd permutations of two V32QImode and V16QImode operand
-    with two vpshufb insns, vpor and vpermq.  We should have already
-    failed all two or three instruction sequences.  */
- 
- static bool
- expand_vec_perm_vpshufb2_vpermq_even_odd (struct expand_vec_perm_d *d)
- {
-   rtx rperm[2][32], vperm, l, h, ior, op, m128;
-   unsigned int i, nelt, eltsz;
- 
-   if (!TARGET_AVX2
-       || d->one_operand_p
-       || (d->vmode != V32QImode && d->vmode != V16HImode))
-     return false;
- 
-   for (i = 0; i < d->nelt; ++i)
-     if ((d->perm[i] ^ (i * 2)) & (3 * d->nelt / 2))
-       return false;
- 
-   if (d->testing_p)
-     return true;
- 
-   nelt = d->nelt;
-   eltsz = GET_MODE_UNIT_SIZE (d->vmode);
- 
-   /* Generate two permutation masks.  In the first permutation mask
-      the first quarter will contain indexes for the first half
-      of the op0, the second quarter will contain bit 7 set, third quarter
-      will contain indexes for the second half of the op0 and the
-      last quarter bit 7 set.  In the second permutation mask
-      the first quarter will contain bit 7 set, the second quarter
-      indexes for the first half of the op1, the third quarter bit 7 set
-      and last quarter indexes for the second half of the op1.
-      I.e. the first mask e.g. for V32QImode extract even will be:
-      0, 2, ..., 0xe, -128, ..., -128, 0, 2, ..., 0xe, -128, ..., -128
-      (all values masked with 0xf except for -128) and second mask
-      for extract even will be
-      -128, ..., -128, 0, 2, ..., 0xe, -128, ..., -128, 0, 2, ..., 0xe.  */
-   m128 = GEN_INT (-128);
-   for (i = 0; i < nelt; ++i)
-     {
-       unsigned j, e = d->perm[i] & (nelt / 2 - 1);
-       unsigned which = d->perm[i] >= nelt;
-       unsigned xorv = (i >= nelt / 4 && i < 3 * nelt / 4) ? 24 : 0;
- 
-       for (j = 0; j < eltsz; ++j)
- 	{
- 	  rperm[which][(i * eltsz + j) ^ xorv] = GEN_INT (e * eltsz + j);
- 	  rperm[1 - which][(i * eltsz + j) ^ xorv] = m128;
- 	}
-     }
- 
-   vperm = gen_rtx_CONST_VECTOR (V32QImode, gen_rtvec_v (32, rperm[0]));
-   vperm = force_reg (V32QImode, vperm);
- 
-   l = gen_reg_rtx (V32QImode);
-   op = gen_lowpart (V32QImode, d->op0);
-   emit_insn (gen_avx2_pshufbv32qi3 (l, op, vperm));
- 
-   vperm = gen_rtx_CONST_VECTOR (V32QImode, gen_rtvec_v (32, rperm[1]));
-   vperm = force_reg (V32QImode, vperm);
- 
-   h = gen_reg_rtx (V32QImode);
-   op = gen_lowpart (V32QImode, d->op1);
-   emit_insn (gen_avx2_pshufbv32qi3 (h, op, vperm));
- 
-   ior = gen_reg_rtx (V32QImode);
-   emit_insn (gen_iorv32qi3 (ior, l, h));
- 
-   /* Permute the V4DImode quarters using { 0, 2, 1, 3 } permutation.  */
-   op = gen_reg_rtx (V4DImode);
-   ior = gen_lowpart (V4DImode, ior);
-   emit_insn (gen_avx2_permv4di_1 (op, ior, const0_rtx, const2_rtx,
- 				  const1_rtx, GEN_INT (3)));
-   emit_move_insn (d->target, gen_lowpart (d->vmode, op));
- 
-   return true;
- }
- 
- /* A subroutine of expand_vec_perm_even_odd_1.  Implement extract-even
-    and extract-odd permutations of two V16QI, V8HI, V16HI or V32QI operands
-    with two "and" and "pack" or two "shift" and "pack" insns.  We should
-    have already failed all two instruction sequences.  */
- 
- static bool
- expand_vec_perm_even_odd_pack (struct expand_vec_perm_d *d)
- {
-   rtx op, dop0, dop1, t;
-   unsigned i, odd, c, s, nelt = d->nelt;
-   bool end_perm = false;
-   machine_mode half_mode;
-   rtx (*gen_and) (rtx, rtx, rtx);
-   rtx (*gen_pack) (rtx, rtx, rtx);
-   rtx (*gen_shift) (rtx, rtx, rtx);
- 
-   if (d->one_operand_p)
-     return false;
- 
-   switch (d->vmode)
-     {
-     case E_V8HImode:
-       /* Required for "pack".  */
-       if (!TARGET_SSE4_1)
-         return false;
-       c = 0xffff;
-       s = 16;
-       half_mode = V4SImode;
-       gen_and = gen_andv4si3;
-       gen_pack = gen_sse4_1_packusdw;
-       gen_shift = gen_lshrv4si3;
-       break;
-     case E_V16QImode:
-       /* No check as all instructions are SSE2.  */
-       c = 0xff;
-       s = 8;
-       half_mode = V8HImode;
-       gen_and = gen_andv8hi3;
-       gen_pack = gen_sse2_packuswb;
-       gen_shift = gen_lshrv8hi3;
-       break;
-     case E_V16HImode:
-       if (!TARGET_AVX2)
-         return false;
-       c = 0xffff;
-       s = 16;
-       half_mode = V8SImode;
-       gen_and = gen_andv8si3;
-       gen_pack = gen_avx2_packusdw;
-       gen_shift = gen_lshrv8si3;
-       end_perm = true;
-       break;
-     case E_V32QImode:
-       if (!TARGET_AVX2)
-         return false;
-       c = 0xff;
-       s = 8;
-       half_mode = V16HImode;
-       gen_and = gen_andv16hi3;
-       gen_pack = gen_avx2_packuswb;
-       gen_shift = gen_lshrv16hi3;
-       end_perm = true;
-       break;
-     default:
-       /* Only V8HI, V16QI, V16HI and V32QI modes are more profitable than
- 	 general shuffles.  */
-       return false;
-     }
- 
-   /* Check that permutation is even or odd.  */
-   odd = d->perm[0];
-   if (odd > 1)
-     return false;
- 
-   for (i = 1; i < nelt; ++i)
-     if (d->perm[i] != 2 * i + odd)
-       return false;
- 
-   if (d->testing_p)
-     return true;
- 
-   dop0 = gen_reg_rtx (half_mode);
-   dop1 = gen_reg_rtx (half_mode);
-   if (odd == 0)
-     {
-       t = gen_const_vec_duplicate (half_mode, GEN_INT (c));
-       t = force_reg (half_mode, t);
-       emit_insn (gen_and (dop0, t, gen_lowpart (half_mode, d->op0)));
-       emit_insn (gen_and (dop1, t, gen_lowpart (half_mode, d->op1)));
-     }
-   else
-     {
-       emit_insn (gen_shift (dop0,
- 			    gen_lowpart (half_mode, d->op0),
- 			    GEN_INT (s)));
-       emit_insn (gen_shift (dop1,
- 			    gen_lowpart (half_mode, d->op1),
- 			    GEN_INT (s)));
-     }
-   /* In AVX2 for 256 bit case we need to permute pack result.  */
-   if (TARGET_AVX2 && end_perm)
-     {
-       op = gen_reg_rtx (d->vmode);
-       t = gen_reg_rtx (V4DImode);
-       emit_insn (gen_pack (op, dop0, dop1));
-       emit_insn (gen_avx2_permv4di_1 (t,
- 				      gen_lowpart (V4DImode, op),
- 				      const0_rtx,
- 				      const2_rtx,
- 				      const1_rtx,
- 				      GEN_INT (3)));
-       emit_move_insn (d->target, gen_lowpart (d->vmode, t));
-     }
-   else
-     emit_insn (gen_pack (d->target, dop0, dop1));
- 
-   return true;
- }
- 
- /* A subroutine of expand_vec_perm_even_odd_1.  Implement extract-even
-    and extract-odd permutations of two V64QI operands
-    with two "shifts", two "truncs" and one "concat" insns for "odd"
-    and two "truncs" and one concat insn for "even."
-    Have already failed all two instruction sequences.  */
- 
- static bool
- expand_vec_perm_even_odd_trunc (struct expand_vec_perm_d *d)
- {
-   rtx t1, t2, t3, t4;
-   unsigned i, odd, nelt = d->nelt;
- 
-   if (!TARGET_AVX512BW
-       || d->one_operand_p
-       || d->vmode != V64QImode)
-     return false;
- 
-   /* Check that permutation is even or odd.  */
-   odd = d->perm[0];
-   if (odd > 1)
-     return false;
- 
-   for (i = 1; i < nelt; ++i)
-     if (d->perm[i] != 2 * i + odd)
-       return false;
- 
-   if (d->testing_p)
-     return true;
- 
- 
-   if (odd)
-     {
-       t1 = gen_reg_rtx (V32HImode);
-       t2 = gen_reg_rtx (V32HImode);
-       emit_insn (gen_lshrv32hi3 (t1,
- 				 gen_lowpart (V32HImode, d->op0),
- 				 GEN_INT (8)));
-       emit_insn (gen_lshrv32hi3 (t2,
- 				 gen_lowpart (V32HImode, d->op1),
- 				 GEN_INT (8)));
-     }
-   else
-     {
-       t1 = gen_lowpart (V32HImode, d->op0);
-       t2 = gen_lowpart (V32HImode, d->op1);
-     }
- 
-   t3 = gen_reg_rtx (V32QImode);
-   t4 = gen_reg_rtx (V32QImode);
-   emit_insn (gen_avx512bw_truncatev32hiv32qi2 (t3, t1));
-   emit_insn (gen_avx512bw_truncatev32hiv32qi2 (t4, t2));
-   emit_insn (gen_avx_vec_concatv64qi (d->target, t3, t4));
- 
-   return true;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Implement extract-even
-    and extract-odd permutations.  */
- 
- static bool
- expand_vec_perm_even_odd_1 (struct expand_vec_perm_d *d, unsigned odd)
- {
-   rtx t1, t2, t3, t4, t5;
- 
-   switch (d->vmode)
-     {
-     case E_V4DFmode:
-       if (d->testing_p)
- 	break;
-       t1 = gen_reg_rtx (V4DFmode);
-       t2 = gen_reg_rtx (V4DFmode);
- 
-       /* Shuffle the lanes around into { 0 1 4 5 } and { 2 3 6 7 }.  */
-       emit_insn (gen_avx_vperm2f128v4df3 (t1, d->op0, d->op1, GEN_INT (0x20)));
-       emit_insn (gen_avx_vperm2f128v4df3 (t2, d->op0, d->op1, GEN_INT (0x31)));
- 
-       /* Now an unpck[lh]pd will produce the result required.  */
-       if (odd)
- 	t3 = gen_avx_unpckhpd256 (d->target, t1, t2);
-       else
- 	t3 = gen_avx_unpcklpd256 (d->target, t1, t2);
-       emit_insn (t3);
-       break;
- 
-     case E_V8SFmode:
-       {
- 	int mask = odd ? 0xdd : 0x88;
- 
- 	if (d->testing_p)
- 	  break;
- 	t1 = gen_reg_rtx (V8SFmode);
- 	t2 = gen_reg_rtx (V8SFmode);
- 	t3 = gen_reg_rtx (V8SFmode);
- 
- 	/* Shuffle within the 128-bit lanes to produce:
- 	   { 0 2 8 a 4 6 c e } | { 1 3 9 b 5 7 d f }.  */
- 	emit_insn (gen_avx_shufps256 (t1, d->op0, d->op1,
- 				      GEN_INT (mask)));
- 
- 	/* Shuffle the lanes around to produce:
- 	   { 4 6 c e 0 2 8 a } and { 5 7 d f 1 3 9 b }.  */
- 	emit_insn (gen_avx_vperm2f128v8sf3 (t2, t1, t1,
- 					    GEN_INT (0x3)));
- 
- 	/* Shuffle within the 128-bit lanes to produce:
- 	   { 0 2 4 6 4 6 0 2 } | { 1 3 5 7 5 7 1 3 }.  */
- 	emit_insn (gen_avx_shufps256 (t3, t1, t2, GEN_INT (0x44)));
- 
- 	/* Shuffle within the 128-bit lanes to produce:
- 	   { 8 a c e c e 8 a } | { 9 b d f d f 9 b }.  */
- 	emit_insn (gen_avx_shufps256 (t2, t1, t2, GEN_INT (0xee)));
- 
- 	/* Shuffle the lanes around to produce:
- 	   { 0 2 4 6 8 a c e } | { 1 3 5 7 9 b d f }.  */
- 	emit_insn (gen_avx_vperm2f128v8sf3 (d->target, t3, t2,
- 					    GEN_INT (0x20)));
-       }
-       break;
- 
-     case E_V2DFmode:
-     case E_V4SFmode:
-     case E_V2DImode:
-     case E_V4SImode:
-       /* These are always directly implementable by expand_vec_perm_1.  */
-       gcc_unreachable ();
- 
-     case E_V8HImode:
-       if (TARGET_SSE4_1)
- 	return expand_vec_perm_even_odd_pack (d);
-       else if (TARGET_SSSE3 && !TARGET_SLOW_PSHUFB)
- 	return expand_vec_perm_pshufb2 (d);
-       else
- 	{
- 	  if (d->testing_p)
- 	    break;
- 	  /* We need 2*log2(N)-1 operations to achieve odd/even
- 	     with interleave. */
- 	  t1 = gen_reg_rtx (V8HImode);
- 	  t2 = gen_reg_rtx (V8HImode);
- 	  emit_insn (gen_vec_interleave_highv8hi (t1, d->op0, d->op1));
- 	  emit_insn (gen_vec_interleave_lowv8hi (d->target, d->op0, d->op1));
- 	  emit_insn (gen_vec_interleave_highv8hi (t2, d->target, t1));
- 	  emit_insn (gen_vec_interleave_lowv8hi (d->target, d->target, t1));
- 	  if (odd)
- 	    t3 = gen_vec_interleave_highv8hi (d->target, d->target, t2);
- 	  else
- 	    t3 = gen_vec_interleave_lowv8hi (d->target, d->target, t2);
- 	  emit_insn (t3);
- 	}
-       break;
- 
-     case E_V16QImode:
-       return expand_vec_perm_even_odd_pack (d);
- 
-     case E_V16HImode:
-     case E_V32QImode:
-       return expand_vec_perm_even_odd_pack (d);
- 
-     case E_V64QImode:
-       return expand_vec_perm_even_odd_trunc (d);
- 
-     case E_V4DImode:
-       if (!TARGET_AVX2)
- 	{
- 	  struct expand_vec_perm_d d_copy = *d;
- 	  d_copy.vmode = V4DFmode;
- 	  if (d->testing_p)
- 	    d_copy.target = gen_raw_REG (V4DFmode, LAST_VIRTUAL_REGISTER + 1);
- 	  else
- 	    d_copy.target = gen_reg_rtx (V4DFmode);
- 	  d_copy.op0 = gen_lowpart (V4DFmode, d->op0);
- 	  d_copy.op1 = gen_lowpart (V4DFmode, d->op1);
- 	  if (expand_vec_perm_even_odd_1 (&d_copy, odd))
- 	    {
- 	      if (!d->testing_p)
- 		emit_move_insn (d->target,
- 				gen_lowpart (V4DImode, d_copy.target));
- 	      return true;
- 	    }
- 	  return false;
- 	}
- 
-       if (d->testing_p)
- 	break;
- 
-       t1 = gen_reg_rtx (V4DImode);
-       t2 = gen_reg_rtx (V4DImode);
- 
-       /* Shuffle the lanes around into { 0 1 4 5 } and { 2 3 6 7 }.  */
-       emit_insn (gen_avx2_permv2ti (t1, d->op0, d->op1, GEN_INT (0x20)));
-       emit_insn (gen_avx2_permv2ti (t2, d->op0, d->op1, GEN_INT (0x31)));
- 
-       /* Now an vpunpck[lh]qdq will produce the result required.  */
-       if (odd)
- 	t3 = gen_avx2_interleave_highv4di (d->target, t1, t2);
-       else
- 	t3 = gen_avx2_interleave_lowv4di (d->target, t1, t2);
-       emit_insn (t3);
-       break;
- 
-     case E_V8SImode:
-       if (!TARGET_AVX2)
- 	{
- 	  struct expand_vec_perm_d d_copy = *d;
- 	  d_copy.vmode = V8SFmode;
- 	  if (d->testing_p)
- 	    d_copy.target = gen_raw_REG (V8SFmode, LAST_VIRTUAL_REGISTER + 1);
- 	  else
- 	    d_copy.target = gen_reg_rtx (V8SFmode);
- 	  d_copy.op0 = gen_lowpart (V8SFmode, d->op0);
- 	  d_copy.op1 = gen_lowpart (V8SFmode, d->op1);
- 	  if (expand_vec_perm_even_odd_1 (&d_copy, odd))
- 	    {
- 	      if (!d->testing_p)
- 		emit_move_insn (d->target,
- 				gen_lowpart (V8SImode, d_copy.target));
- 	      return true;
- 	    }
- 	  return false;
- 	}
- 
-       if (d->testing_p)
- 	break;
- 
-       t1 = gen_reg_rtx (V8SImode);
-       t2 = gen_reg_rtx (V8SImode);
-       t3 = gen_reg_rtx (V4DImode);
-       t4 = gen_reg_rtx (V4DImode);
-       t5 = gen_reg_rtx (V4DImode);
- 
-       /* Shuffle the lanes around into
- 	 { 0 1 2 3 8 9 a b } and { 4 5 6 7 c d e f }.  */
-       emit_insn (gen_avx2_permv2ti (t3, gen_lowpart (V4DImode, d->op0),
- 				    gen_lowpart (V4DImode, d->op1),
- 				    GEN_INT (0x20)));
-       emit_insn (gen_avx2_permv2ti (t4, gen_lowpart (V4DImode, d->op0),
- 				    gen_lowpart (V4DImode, d->op1),
- 				    GEN_INT (0x31)));
- 
-       /* Swap the 2nd and 3rd position in each lane into
- 	 { 0 2 1 3 8 a 9 b } and { 4 6 5 7 c e d f }.  */
-       emit_insn (gen_avx2_pshufdv3 (t1, gen_lowpart (V8SImode, t3),
- 				    GEN_INT (2 * 4 + 1 * 16 + 3 * 64)));
-       emit_insn (gen_avx2_pshufdv3 (t2, gen_lowpart (V8SImode, t4),
- 				    GEN_INT (2 * 4 + 1 * 16 + 3 * 64)));
- 
-       /* Now an vpunpck[lh]qdq will produce
- 	 { 0 2 4 6 8 a c e } resp. { 1 3 5 7 9 b d f }.  */
-       if (odd)
- 	t3 = gen_avx2_interleave_highv4di (t5, gen_lowpart (V4DImode, t1),
- 					   gen_lowpart (V4DImode, t2));
-       else
- 	t3 = gen_avx2_interleave_lowv4di (t5, gen_lowpart (V4DImode, t1),
- 					  gen_lowpart (V4DImode, t2));
-       emit_insn (t3);
-       emit_move_insn (d->target, gen_lowpart (V8SImode, t5));
-       break;
- 
-     default:
-       gcc_unreachable ();
-     }
- 
-   return true;
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Pattern match
-    extract-even and extract-odd permutations.  */
- 
- static bool
- expand_vec_perm_even_odd (struct expand_vec_perm_d *d)
- {
-   unsigned i, odd, nelt = d->nelt;
- 
-   odd = d->perm[0];
-   if (odd != 0 && odd != 1)
-     return false;
- 
-   for (i = 1; i < nelt; ++i)
-     if (d->perm[i] != 2 * i + odd)
-       return false;
- 
-   return expand_vec_perm_even_odd_1 (d, odd);
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Implement broadcast
-    permutations.  We assume that expand_vec_perm_1 has already failed.  */
- 
- static bool
- expand_vec_perm_broadcast_1 (struct expand_vec_perm_d *d)
- {
-   unsigned elt = d->perm[0], nelt2 = d->nelt / 2;
-   machine_mode vmode = d->vmode;
-   unsigned char perm2[4];
-   rtx op0 = d->op0, dest;
-   bool ok;
- 
-   switch (vmode)
-     {
-     case E_V4DFmode:
-     case E_V8SFmode:
-       /* These are special-cased in sse.md so that we can optionally
- 	 use the vbroadcast instruction.  They expand to two insns
- 	 if the input happens to be in a register.  */
-       gcc_unreachable ();
- 
-     case E_V2DFmode:
-     case E_V2DImode:
-     case E_V4SFmode:
-     case E_V4SImode:
-       /* These are always implementable using standard shuffle patterns.  */
-       gcc_unreachable ();
- 
-     case E_V8HImode:
-     case E_V16QImode:
-       /* These can be implemented via interleave.  We save one insn by
- 	 stopping once we have promoted to V4SImode and then use pshufd.  */
-       if (d->testing_p)
- 	return true;
-       do
- 	{
- 	  rtx dest;
- 	  rtx (*gen) (rtx, rtx, rtx)
- 	    = vmode == V16QImode ? gen_vec_interleave_lowv16qi
- 				 : gen_vec_interleave_lowv8hi;
- 
- 	  if (elt >= nelt2)
- 	    {
- 	      gen = vmode == V16QImode ? gen_vec_interleave_highv16qi
- 				       : gen_vec_interleave_highv8hi;
- 	      elt -= nelt2;
- 	    }
- 	  nelt2 /= 2;
- 
- 	  dest = gen_reg_rtx (vmode);
- 	  emit_insn (gen (dest, op0, op0));
- 	  vmode = get_mode_wider_vector (vmode);
- 	  op0 = gen_lowpart (vmode, dest);
- 	}
-       while (vmode != V4SImode);
- 
-       memset (perm2, elt, 4);
-       dest = gen_reg_rtx (V4SImode);
-       ok = expand_vselect (dest, op0, perm2, 4, d->testing_p);
-       gcc_assert (ok);
-       if (!d->testing_p)
- 	emit_move_insn (d->target, gen_lowpart (d->vmode, dest));
-       return true;
- 
-     case E_V64QImode:
-     case E_V32QImode:
-     case E_V16HImode:
-     case E_V8SImode:
-     case E_V4DImode:
-       /* For AVX2 broadcasts of the first element vpbroadcast* or
- 	 vpermq should be used by expand_vec_perm_1.  */
-       gcc_assert (!TARGET_AVX2 || d->perm[0]);
-       return false;
- 
-     default:
-       gcc_unreachable ();
-     }
- }
- 
- /* A subroutine of ix86_expand_vec_perm_builtin_1.  Pattern match
-    broadcast permutations.  */
- 
- static bool
- expand_vec_perm_broadcast (struct expand_vec_perm_d *d)
- {
-   unsigned i, elt, nelt = d->nelt;
- 
-   if (!d->one_operand_p)
-     return false;
- 
-   elt = d->perm[0];
-   for (i = 1; i < nelt; ++i)
-     if (d->perm[i] != elt)
-       return false;
- 
-   return expand_vec_perm_broadcast_1 (d);
- }
- 
- /* Implement arbitrary permutations of two V64QImode operands
-    with 2 vperm[it]2w, 2 vpshufb and one vpor instruction.  */
- static bool
- expand_vec_perm_vpermt2_vpshub2 (struct expand_vec_perm_d *d)
- {
-   if (!TARGET_AVX512BW || !(d->vmode == V64QImode))
-     return false;
- 
-   if (d->testing_p)
-     return true;
- 
-   struct expand_vec_perm_d ds[2];
-   rtx rperm[128], vperm, target0, target1;
-   unsigned int i, nelt;
-   machine_mode vmode;
- 
-   nelt = d->nelt;
-   vmode = V64QImode;
- 
-   for (i = 0; i < 2; i++)
-     {
-       ds[i] = *d;
-       ds[i].vmode = V32HImode;
-       ds[i].nelt = 32;
-       ds[i].target = gen_reg_rtx (V32HImode);
-       ds[i].op0 = gen_lowpart (V32HImode, d->op0);
-       ds[i].op1 = gen_lowpart (V32HImode, d->op1);
-     }
- 
-   /* Prepare permutations such that the first one takes care of
-      putting the even bytes into the right positions or one higher
-      positions (ds[0]) and the second one takes care of
-      putting the odd bytes into the right positions or one below
-      (ds[1]).  */
- 
-   for (i = 0; i < nelt; i++)
-     {
-       ds[i & 1].perm[i / 2] = d->perm[i] / 2;
-       if (i & 1)
- 	{
- 	  rperm[i] = constm1_rtx;
- 	  rperm[i + 64] = GEN_INT ((i & 14) + (d->perm[i] & 1));
- 	}
-       else
- 	{
- 	  rperm[i] = GEN_INT ((i & 14) + (d->perm[i] & 1));
- 	  rperm[i + 64] = constm1_rtx;
- 	}
-     }
- 
-   bool ok = expand_vec_perm_1 (&ds[0]);
-   gcc_assert (ok);
-   ds[0].target = gen_lowpart (V64QImode, ds[0].target);
- 
-   ok = expand_vec_perm_1 (&ds[1]);
-   gcc_assert (ok);
-   ds[1].target = gen_lowpart (V64QImode, ds[1].target);
- 
-   vperm = gen_rtx_CONST_VECTOR (V64QImode, gen_rtvec_v (64, rperm));
-   vperm = force_reg (vmode, vperm);
-   target0 = gen_reg_rtx (V64QImode);
-   emit_insn (gen_avx512bw_pshufbv64qi3 (target0, ds[0].target, vperm));
- 
-   vperm = gen_rtx_CONST_VECTOR (V64QImode, gen_rtvec_v (64, rperm + 64));
-   vperm = force_reg (vmode, vperm);
-   target1 = gen_reg_rtx (V64QImode);
-   emit_insn (gen_avx512bw_pshufbv64qi3 (target1, ds[1].target, vperm));
- 
-   emit_insn (gen_iorv64qi3 (d->target, target0, target1));
-   return true;
- }
- 
- /* Implement arbitrary permutation of two V32QImode and V16QImode operands
-    with 4 vpshufb insns, 2 vpermq and 3 vpor.  We should have already failed
-    all the shorter instruction sequences.  */
- 
- static bool
- expand_vec_perm_vpshufb4_vpermq2 (struct expand_vec_perm_d *d)
- {
-   rtx rperm[4][32], vperm, l[2], h[2], op, m128;
-   unsigned int i, nelt, eltsz;
-   bool used[4];
- 
-   if (!TARGET_AVX2
-       || d->one_operand_p
-       || (d->vmode != V32QImode && d->vmode != V16HImode))
-     return false;
- 
-   if (d->testing_p)
-     return true;
- 
-   nelt = d->nelt;
-   eltsz = GET_MODE_UNIT_SIZE (d->vmode);
- 
-   /* Generate 4 permutation masks.  If the required element is within
-      the same lane, it is shuffled in.  If the required element from the
-      other lane, force a zero by setting bit 7 in the permutation mask.
-      In the other mask the mask has non-negative elements if element
-      is requested from the other lane, but also moved to the other lane,
-      so that the result of vpshufb can have the two V2TImode halves
-      swapped.  */
-   m128 = GEN_INT (-128);
-   for (i = 0; i < 32; ++i)
-     {
-       rperm[0][i] = m128;
-       rperm[1][i] = m128;
-       rperm[2][i] = m128;
-       rperm[3][i] = m128;
-     }
-   used[0] = false;
-   used[1] = false;
-   used[2] = false;
-   used[3] = false;
-   for (i = 0; i < nelt; ++i)
-     {
-       unsigned j, e = d->perm[i] & (nelt / 2 - 1);
-       unsigned xlane = ((d->perm[i] ^ i) & (nelt / 2)) * eltsz;
-       unsigned int which = ((d->perm[i] & nelt) ? 2 : 0) + (xlane ? 1 : 0);
- 
-       for (j = 0; j < eltsz; ++j)
- 	rperm[which][(i * eltsz + j) ^ xlane] = GEN_INT (e * eltsz + j);
-       used[which] = true;
-     }
- 
-   for (i = 0; i < 2; ++i)
-     {
-       if (!used[2 * i + 1])
- 	{
- 	  h[i] = NULL_RTX;
- 	  continue;
- 	}
-       vperm = gen_rtx_CONST_VECTOR (V32QImode,
- 				    gen_rtvec_v (32, rperm[2 * i + 1]));
-       vperm = force_reg (V32QImode, vperm);
-       h[i] = gen_reg_rtx (V32QImode);
-       op = gen_lowpart (V32QImode, i ? d->op1 : d->op0);
-       emit_insn (gen_avx2_pshufbv32qi3 (h[i], op, vperm));
-     }
- 
-   /* Swap the 128-byte lanes of h[X].  */
-   for (i = 0; i < 2; ++i)
-    {
-      if (h[i] == NULL_RTX)
-        continue;
-      op = gen_reg_rtx (V4DImode);
-      emit_insn (gen_avx2_permv4di_1 (op, gen_lowpart (V4DImode, h[i]),
- 				     const2_rtx, GEN_INT (3), const0_rtx,
- 				     const1_rtx));
-      h[i] = gen_lowpart (V32QImode, op);
-    }
- 
-   for (i = 0; i < 2; ++i)
-     {
-       if (!used[2 * i])
- 	{
- 	  l[i] = NULL_RTX;
- 	  continue;
- 	}
-       vperm = gen_rtx_CONST_VECTOR (V32QImode, gen_rtvec_v (32, rperm[2 * i]));
-       vperm = force_reg (V32QImode, vperm);
-       l[i] = gen_reg_rtx (V32QImode);
-       op = gen_lowpart (V32QImode, i ? d->op1 : d->op0);
-       emit_insn (gen_avx2_pshufbv32qi3 (l[i], op, vperm));
-     }
- 
-   for (i = 0; i < 2; ++i)
-     {
-       if (h[i] && l[i])
- 	{
- 	  op = gen_reg_rtx (V32QImode);
- 	  emit_insn (gen_iorv32qi3 (op, l[i], h[i]));
- 	  l[i] = op;
- 	}
-       else if (h[i])
- 	l[i] = h[i];
-     }
- 
-   gcc_assert (l[0] && l[1]);
-   op = d->target;
-   if (d->vmode != V32QImode)
-     op = gen_reg_rtx (V32QImode);
-   emit_insn (gen_iorv32qi3 (op, l[0], l[1]));
-   if (op != d->target)
-     emit_move_insn (d->target, gen_lowpart (d->vmode, op));
-   return true;
- }
- 
- /* The guts of ix86_vectorize_vec_perm_const.  With all of the interface bits
-    taken care of, perform the expansion in D and return true on success.  */
- 
- static bool
- ix86_expand_vec_perm_const_1 (struct expand_vec_perm_d *d)
- {
-   /* Try a single instruction expansion.  */
-   if (expand_vec_perm_1 (d))
-     return true;
- 
-   /* Try sequences of two instructions.  */
- 
-   if (expand_vec_perm_pshuflw_pshufhw (d))
-     return true;
- 
-   if (expand_vec_perm_palignr (d, false))
-     return true;
- 
-   if (expand_vec_perm_interleave2 (d))
-     return true;
- 
-   if (expand_vec_perm_broadcast (d))
-     return true;
- 
-   if (expand_vec_perm_vpermq_perm_1 (d))
-     return true;
- 
-   if (expand_vec_perm_vperm2f128 (d))
-     return true;
- 
-   if (expand_vec_perm_pblendv (d))
-     return true;
- 
-   /* Try sequences of three instructions.  */
- 
-   if (expand_vec_perm_even_odd_pack (d))
-     return true;
- 
-   if (expand_vec_perm_2vperm2f128_vshuf (d))
-     return true;
- 
-   if (expand_vec_perm_pshufb2 (d))
-     return true;
- 
-   if (expand_vec_perm_interleave3 (d))
-     return true;
- 
-   if (expand_vec_perm_vperm2f128_vblend (d))
-     return true;
- 
-   /* Try sequences of four instructions.  */
- 
-   if (expand_vec_perm_even_odd_trunc (d))
-     return true;
-   if (expand_vec_perm_vpshufb2_vpermq (d))
-     return true;
- 
-   if (expand_vec_perm_vpshufb2_vpermq_even_odd (d))
-     return true;
- 
-   if (expand_vec_perm_vpermt2_vpshub2 (d))
-     return true;
- 
-   /* ??? Look for narrow permutations whose element orderings would
-      allow the promotion to a wider mode.  */
- 
-   /* ??? Look for sequences of interleave or a wider permute that place
-      the data into the correct lanes for a half-vector shuffle like
-      pshuf[lh]w or vpermilps.  */
- 
-   /* ??? Look for sequences of interleave that produce the desired results.
-      The combinatorics of punpck[lh] get pretty ugly... */
- 
-   if (expand_vec_perm_even_odd (d))
-     return true;
- 
-   /* Even longer sequences.  */
-   if (expand_vec_perm_vpshufb4_vpermq2 (d))
-     return true;
- 
-   /* See if we can get the same permutation in different vector integer
-      mode.  */
-   struct expand_vec_perm_d nd;
-   if (canonicalize_vector_int_perm (d, &nd) && expand_vec_perm_1 (&nd))
-     {
-       if (!d->testing_p)
- 	emit_move_insn (d->target, gen_lowpart (d->vmode, nd.target));
-       return true;
-     }
- 
-   return false;
- }
- 
- /* If a permutation only uses one operand, make it clear. Returns true
-    if the permutation references both operands.  */
- 
- static bool
- canonicalize_perm (struct expand_vec_perm_d *d)
- {
-   int i, which, nelt = d->nelt;
- 
-   for (i = which = 0; i < nelt; ++i)
-       which |= (d->perm[i] < nelt ? 1 : 2);
- 
-   d->one_operand_p = true;
-   switch (which)
-     {
-     default:
-       gcc_unreachable();
- 
-     case 3:
-       if (!rtx_equal_p (d->op0, d->op1))
-         {
- 	  d->one_operand_p = false;
- 	  break;
-         }
-       /* The elements of PERM do not suggest that only the first operand
- 	 is used, but both operands are identical.  Allow easier matching
- 	 of the permutation by folding the permutation into the single
- 	 input vector.  */
-       /* FALLTHRU */
- 
-     case 2:
-       for (i = 0; i < nelt; ++i)
-         d->perm[i] &= nelt - 1;
-       d->op0 = d->op1;
-       break;
- 
-     case 1:
-       d->op1 = d->op0;
-       break;
-     }
- 
-   return (which == 3);
- }
- 
- /* Implement TARGET_VECTORIZE_VEC_PERM_CONST.  */
- 
- static bool
- ix86_vectorize_vec_perm_const (machine_mode vmode, rtx target, rtx op0,
- 			       rtx op1, const vec_perm_indices &sel)
- {
-   struct expand_vec_perm_d d;
-   unsigned char perm[MAX_VECT_LEN];
-   unsigned int i, nelt, which;
-   bool two_args;
- 
-   d.target = target;
-   d.op0 = op0;
-   d.op1 = op1;
- 
-   d.vmode = vmode;
-   gcc_assert (VECTOR_MODE_P (d.vmode));
-   d.nelt = nelt = GET_MODE_NUNITS (d.vmode);
-   d.testing_p = !target;
- 
-   gcc_assert (sel.length () == nelt);
-   gcc_checking_assert (sizeof (d.perm) == sizeof (perm));
- 
-   /* Given sufficient ISA support we can just return true here
-      for selected vector modes.  */
-   switch (d.vmode)
-     {
-     case E_V16SFmode:
-     case E_V16SImode:
-     case E_V8DImode:
-     case E_V8DFmode:
-       if (!TARGET_AVX512F)
- 	return false;
-       /* All implementable with a single vperm[it]2 insn.  */
-       if (d.testing_p)
- 	return true;
-       break;
-     case E_V32HImode:
-       if (!TARGET_AVX512BW)
- 	return false;
-       if (d.testing_p)
- 	/* All implementable with a single vperm[it]2 insn.  */
- 	return true;
-       break;
-     case E_V64QImode:
-       if (!TARGET_AVX512BW)
- 	return false;
-       if (d.testing_p)
- 	/* Implementable with 2 vperm[it]2, 2 vpshufb and 1 or insn.  */
- 	return true;
-       break;
-     case E_V8SImode:
-     case E_V8SFmode:
-     case E_V4DFmode:
-     case E_V4DImode:
-       if (!TARGET_AVX)
- 	return false;
-       if (d.testing_p && TARGET_AVX512VL)
- 	/* All implementable with a single vperm[it]2 insn.  */
- 	return true;
-       break;
-     case E_V16HImode:
-       if (!TARGET_SSE2)
- 	return false;
-       if (d.testing_p && TARGET_AVX2)
- 	/* Implementable with 4 vpshufb insns, 2 vpermq and 3 vpor insns.  */
- 	return true;
-       break;
-     case E_V32QImode:
-       if (!TARGET_SSE2)
- 	return false;
-       if (d.testing_p && TARGET_AVX2)
- 	/* Implementable with 4 vpshufb insns, 2 vpermq and 3 vpor insns.  */
- 	return true;
-       break;
-     case E_V8HImode:
-     case E_V16QImode:
-       if (!TARGET_SSE2)
- 	return false;
-       /* Fall through.  */
-     case E_V4SImode:
-     case E_V4SFmode:
-       if (!TARGET_SSE)
- 	return false;
-       /* All implementable with a single vpperm insn.  */
-       if (d.testing_p && TARGET_XOP)
- 	return true;
-       /* All implementable with 2 pshufb + 1 ior.  */
-       if (d.testing_p && TARGET_SSSE3)
- 	return true;
-       break;
-     case E_V2DImode:
-     case E_V2DFmode:
-       if (!TARGET_SSE)
- 	return false;
-       /* All implementable with shufpd or unpck[lh]pd.  */
-       if (d.testing_p)
- 	return true;
-       break;
-     default:
-       return false;
-     }
- 
-   for (i = which = 0; i < nelt; ++i)
-     {
-       unsigned char e = sel[i];
-       gcc_assert (e < 2 * nelt);
-       d.perm[i] = e;
-       perm[i] = e;
-       which |= (e < nelt ? 1 : 2);
-     }
- 
-   if (d.testing_p)
-     {
-       /* For all elements from second vector, fold the elements to first.  */
-       if (which == 2)
- 	for (i = 0; i < nelt; ++i)
- 	  d.perm[i] -= nelt;
- 
-       /* Check whether the mask can be applied to the vector type.  */
-       d.one_operand_p = (which != 3);
- 
-       /* Implementable with shufps or pshufd.  */
-       if (d.one_operand_p && (d.vmode == V4SFmode || d.vmode == V4SImode))
- 	return true;
- 
-       /* Otherwise we have to go through the motions and see if we can
- 	 figure out how to generate the requested permutation.  */
-       d.target = gen_raw_REG (d.vmode, LAST_VIRTUAL_REGISTER + 1);
-       d.op1 = d.op0 = gen_raw_REG (d.vmode, LAST_VIRTUAL_REGISTER + 2);
-       if (!d.one_operand_p)
- 	d.op1 = gen_raw_REG (d.vmode, LAST_VIRTUAL_REGISTER + 3);
- 
-       start_sequence ();
-       bool ret = ix86_expand_vec_perm_const_1 (&d);
-       end_sequence ();
- 
-       return ret;
-     }
- 
-   two_args = canonicalize_perm (&d);
- 
-   if (ix86_expand_vec_perm_const_1 (&d))
-     return true;
- 
-   /* If the selector says both arguments are needed, but the operands are the
-      same, the above tried to expand with one_operand_p and flattened selector.
-      If that didn't work, retry without one_operand_p; we succeeded with that
-      during testing.  */
-   if (two_args && d.one_operand_p)
-     {
-       d.one_operand_p = false;
-       memcpy (d.perm, perm, sizeof (perm));
-       return ix86_expand_vec_perm_const_1 (&d);
-     }
- 
-   return false;
- }
- 
- void
- ix86_expand_vec_extract_even_odd (rtx targ, rtx op0, rtx op1, unsigned odd)
- {
-   struct expand_vec_perm_d d;
-   unsigned i, nelt;
- 
-   d.target = targ;
-   d.op0 = op0;
-   d.op1 = op1;
-   d.vmode = GET_MODE (targ);
-   d.nelt = nelt = GET_MODE_NUNITS (d.vmode);
-   d.one_operand_p = false;
-   d.testing_p = false;
- 
-   for (i = 0; i < nelt; ++i)
-     d.perm[i] = i * 2 + odd;
- 
-   /* We'll either be able to implement the permutation directly...  */
-   if (expand_vec_perm_1 (&d))
-     return;
- 
-   /* ... or we use the special-case patterns.  */
-   expand_vec_perm_even_odd_1 (&d, odd);
- }
- 
- static void
- ix86_expand_vec_interleave (rtx targ, rtx op0, rtx op1, bool high_p)
- {
-   struct expand_vec_perm_d d;
-   unsigned i, nelt, base;
-   bool ok;
- 
-   d.target = targ;
-   d.op0 = op0;
-   d.op1 = op1;
-   d.vmode = GET_MODE (targ);
-   d.nelt = nelt = GET_MODE_NUNITS (d.vmode);
-   d.one_operand_p = false;
-   d.testing_p = false;
- 
-   base = high_p ? nelt / 2 : 0;
-   for (i = 0; i < nelt / 2; ++i)
-     {
-       d.perm[i * 2] = i + base;
-       d.perm[i * 2 + 1] = i + base + nelt;
-     }
- 
-   /* Note that for AVX this isn't one instruction.  */
-   ok = ix86_expand_vec_perm_const_1 (&d);
-   gcc_assert (ok);
- }
- 
- 
- /* Expand a vector operation CODE for a V*QImode in terms of the
-    same operation on V*HImode.  */
- 
- void
- ix86_expand_vecop_qihi (enum rtx_code code, rtx dest, rtx op1, rtx op2)
- {
-   machine_mode qimode = GET_MODE (dest);
-   machine_mode himode;
-   rtx (*gen_il) (rtx, rtx, rtx);
-   rtx (*gen_ih) (rtx, rtx, rtx);
-   rtx op1_l, op1_h, op2_l, op2_h, res_l, res_h;
-   struct expand_vec_perm_d d;
-   bool ok, full_interleave;
-   bool uns_p = false;
-   int i;
- 
-   switch (qimode)
-     {
-     case E_V16QImode:
-       himode = V8HImode;
-       gen_il = gen_vec_interleave_lowv16qi;
-       gen_ih = gen_vec_interleave_highv16qi;
-       break;
-     case E_V32QImode:
-       himode = V16HImode;
-       gen_il = gen_avx2_interleave_lowv32qi;
-       gen_ih = gen_avx2_interleave_highv32qi;
-       break;
-     case E_V64QImode:
-       himode = V32HImode;
-       gen_il = gen_avx512bw_interleave_lowv64qi;
-       gen_ih = gen_avx512bw_interleave_highv64qi;
-       break;
-     default:
-       gcc_unreachable ();
-     }
- 
-   op2_l = op2_h = op2;
-   switch (code)
-     {
-     case MULT:
-       /* Unpack data such that we've got a source byte in each low byte of
- 	 each word.  We don't care what goes into the high byte of each word.
- 	 Rather than trying to get zero in there, most convenient is to let
- 	 it be a copy of the low byte.  */
-       op2_l = gen_reg_rtx (qimode);
-       op2_h = gen_reg_rtx (qimode);
-       emit_insn (gen_il (op2_l, op2, op2));
-       emit_insn (gen_ih (op2_h, op2, op2));
- 
-       op1_l = gen_reg_rtx (qimode);
-       op1_h = gen_reg_rtx (qimode);
-       emit_insn (gen_il (op1_l, op1, op1));
-       emit_insn (gen_ih (op1_h, op1, op1));
-       full_interleave = qimode == V16QImode;
-       break;
- 
-     case ASHIFT:
-     case LSHIFTRT:
-       uns_p = true;
-       /* FALLTHRU */
-     case ASHIFTRT:
-       op1_l = gen_reg_rtx (himode);
-       op1_h = gen_reg_rtx (himode);
-       ix86_expand_sse_unpack (op1_l, op1, uns_p, false);
-       ix86_expand_sse_unpack (op1_h, op1, uns_p, true);
-       full_interleave = true;
-       break;
-     default:
-       gcc_unreachable ();
-     }
- 
-   /* Perform the operation.  */
-   res_l = expand_simple_binop (himode, code, op1_l, op2_l, NULL_RTX,
- 			       1, OPTAB_DIRECT);
-   res_h = expand_simple_binop (himode, code, op1_h, op2_h, NULL_RTX,
- 			       1, OPTAB_DIRECT);
-   gcc_assert (res_l && res_h);
- 
-   /* Merge the data back into the right place.  */
-   d.target = dest;
-   d.op0 = gen_lowpart (qimode, res_l);
-   d.op1 = gen_lowpart (qimode, res_h);
-   d.vmode = qimode;
-   d.nelt = GET_MODE_NUNITS (qimode);
-   d.one_operand_p = false;
-   d.testing_p = false;
- 
-   if (full_interleave)
-     {
-       /* For SSE2, we used an full interleave, so the desired
- 	 results are in the even elements.  */
-       for (i = 0; i < d.nelt; ++i)
- 	d.perm[i] = i * 2;
-     }
-   else
-     {
-       /* For AVX, the interleave used above was not cross-lane.  So the
- 	 extraction is evens but with the second and third quarter swapped.
- 	 Happily, that is even one insn shorter than even extraction.
- 	 For AVX512BW we have 4 lanes.  We extract evens from within a lane,
- 	 always first from the first and then from the second source operand,
- 	 the index bits above the low 4 bits remains the same.
- 	 Thus, for d.nelt == 32 we want permutation
- 	 0,2,4,..14, 32,34,36,..46, 16,18,20,..30, 48,50,52,..62
- 	 and for d.nelt == 64 we want permutation
- 	 0,2,4,..14, 64,66,68,..78, 16,18,20,..30, 80,82,84,..94,
- 	 32,34,36,..46, 96,98,100,..110, 48,50,52,..62, 112,114,116,..126.  */
-       for (i = 0; i < d.nelt; ++i)
- 	d.perm[i] = ((i * 2) & 14) + ((i & 8) ? d.nelt : 0) + (i & ~15);
-     }
- 
-   ok = ix86_expand_vec_perm_const_1 (&d);
-   gcc_assert (ok);
- 
-   set_unique_reg_note (get_last_insn (), REG_EQUAL,
- 		       gen_rtx_fmt_ee (code, qimode, op1, op2));
- }
- 
- /* Helper function of ix86_expand_mul_widen_evenodd.  Return true
-    if op is CONST_VECTOR with all odd elements equal to their
-    preceding element.  */
- 
- static bool
- const_vector_equal_evenodd_p (rtx op)
- {
-   machine_mode mode = GET_MODE (op);
-   int i, nunits = GET_MODE_NUNITS (mode);
-   if (GET_CODE (op) != CONST_VECTOR
-       || nunits != CONST_VECTOR_NUNITS (op))
-     return false;
-   for (i = 0; i < nunits; i += 2)
-     if (CONST_VECTOR_ELT (op, i) != CONST_VECTOR_ELT (op, i + 1))
-       return false;
-   return true;
- }
- 
- void
- ix86_expand_mul_widen_evenodd (rtx dest, rtx op1, rtx op2,
- 			       bool uns_p, bool odd_p)
- {
-   machine_mode mode = GET_MODE (op1);
-   machine_mode wmode = GET_MODE (dest);
-   rtx x;
-   rtx orig_op1 = op1, orig_op2 = op2;
- 
-   if (!nonimmediate_operand (op1, mode))
-     op1 = force_reg (mode, op1);
-   if (!nonimmediate_operand (op2, mode))
-     op2 = force_reg (mode, op2);
- 
-   /* We only play even/odd games with vectors of SImode.  */
-   gcc_assert (mode == V4SImode || mode == V8SImode || mode == V16SImode);
- 
-   /* If we're looking for the odd results, shift those members down to
-      the even slots.  For some cpus this is faster than a PSHUFD.  */
-   if (odd_p)
-     {
-       /* For XOP use vpmacsdqh, but only for smult, as it is only
- 	 signed.  */
-       if (TARGET_XOP && mode == V4SImode && !uns_p)
- 	{
- 	  x = force_reg (wmode, CONST0_RTX (wmode));
- 	  emit_insn (gen_xop_pmacsdqh (dest, op1, op2, x));
- 	  return;
- 	}
- 
-       x = GEN_INT (GET_MODE_UNIT_BITSIZE (mode));
-       if (!const_vector_equal_evenodd_p (orig_op1))
- 	op1 = expand_binop (wmode, lshr_optab, gen_lowpart (wmode, op1),
- 			    x, NULL, 1, OPTAB_DIRECT);
-       if (!const_vector_equal_evenodd_p (orig_op2))
- 	op2 = expand_binop (wmode, lshr_optab, gen_lowpart (wmode, op2),
- 			    x, NULL, 1, OPTAB_DIRECT);
-       op1 = gen_lowpart (mode, op1);
-       op2 = gen_lowpart (mode, op2);
-     }
- 
-   if (mode == V16SImode)
-     {
-       if (uns_p)
- 	x = gen_vec_widen_umult_even_v16si (dest, op1, op2);
-       else
- 	x = gen_vec_widen_smult_even_v16si (dest, op1, op2);
-     }
-   else if (mode == V8SImode)
-     {
-       if (uns_p)
- 	x = gen_vec_widen_umult_even_v8si (dest, op1, op2);
-       else
- 	x = gen_vec_widen_smult_even_v8si (dest, op1, op2);
-     }
-   else if (uns_p)
-     x = gen_vec_widen_umult_even_v4si (dest, op1, op2);
-   else if (TARGET_SSE4_1)
-     x = gen_sse4_1_mulv2siv2di3 (dest, op1, op2);
-   else
-     {
-       rtx s1, s2, t0, t1, t2;
- 
-       /* The easiest way to implement this without PMULDQ is to go through
- 	 the motions as if we are performing a full 64-bit multiply.  With
- 	 the exception that we need to do less shuffling of the elements.  */
- 
-       /* Compute the sign-extension, aka highparts, of the two operands.  */
-       s1 = ix86_expand_sse_cmp (gen_reg_rtx (mode), GT, CONST0_RTX (mode),
- 				op1, pc_rtx, pc_rtx);
-       s2 = ix86_expand_sse_cmp (gen_reg_rtx (mode), GT, CONST0_RTX (mode),
- 				op2, pc_rtx, pc_rtx);
- 
-       /* Multiply LO(A) * HI(B), and vice-versa.  */
-       t1 = gen_reg_rtx (wmode);
-       t2 = gen_reg_rtx (wmode);
-       emit_insn (gen_vec_widen_umult_even_v4si (t1, s1, op2));
-       emit_insn (gen_vec_widen_umult_even_v4si (t2, s2, op1));
- 
-       /* Multiply LO(A) * LO(B).  */
-       t0 = gen_reg_rtx (wmode);
-       emit_insn (gen_vec_widen_umult_even_v4si (t0, op1, op2));
- 
-       /* Combine and shift the highparts into place.  */
-       t1 = expand_binop (wmode, add_optab, t1, t2, t1, 1, OPTAB_DIRECT);
-       t1 = expand_binop (wmode, ashl_optab, t1, GEN_INT (32), t1,
- 			 1, OPTAB_DIRECT);
- 
-       /* Combine high and low parts.  */
-       force_expand_binop (wmode, add_optab, t0, t1, dest, 1, OPTAB_DIRECT);
-       return;
-     }
-   emit_insn (x);
- }
- 
- void
- ix86_expand_mul_widen_hilo (rtx dest, rtx op1, rtx op2,
- 			    bool uns_p, bool high_p)
- {
-   machine_mode wmode = GET_MODE (dest);
-   machine_mode mode = GET_MODE (op1);
-   rtx t1, t2, t3, t4, mask;
- 
-   switch (mode)
-     {
-     case E_V4SImode:
-       t1 = gen_reg_rtx (mode);
-       t2 = gen_reg_rtx (mode);
-       if (TARGET_XOP && !uns_p)
- 	{
- 	  /* With XOP, we have pmacsdqh, aka mul_widen_odd.  In this case,
- 	     shuffle the elements once so that all elements are in the right
- 	     place for immediate use: { A C B D }.  */
- 	  emit_insn (gen_sse2_pshufd_1 (t1, op1, const0_rtx, const2_rtx,
- 					const1_rtx, GEN_INT (3)));
- 	  emit_insn (gen_sse2_pshufd_1 (t2, op2, const0_rtx, const2_rtx,
- 					const1_rtx, GEN_INT (3)));
- 	}
-       else
- 	{
- 	  /* Put the elements into place for the multiply.  */
- 	  ix86_expand_vec_interleave (t1, op1, op1, high_p);
- 	  ix86_expand_vec_interleave (t2, op2, op2, high_p);
- 	  high_p = false;
- 	}
-       ix86_expand_mul_widen_evenodd (dest, t1, t2, uns_p, high_p);
-       break;
- 
-     case E_V8SImode:
-       /* Shuffle the elements between the lanes.  After this we
- 	 have { A B E F | C D G H } for each operand.  */
-       t1 = gen_reg_rtx (V4DImode);
-       t2 = gen_reg_rtx (V4DImode);
-       emit_insn (gen_avx2_permv4di_1 (t1, gen_lowpart (V4DImode, op1),
- 				      const0_rtx, const2_rtx,
- 				      const1_rtx, GEN_INT (3)));
-       emit_insn (gen_avx2_permv4di_1 (t2, gen_lowpart (V4DImode, op2),
- 				      const0_rtx, const2_rtx,
- 				      const1_rtx, GEN_INT (3)));
- 
-       /* Shuffle the elements within the lanes.  After this we
- 	 have { A A B B | C C D D } or { E E F F | G G H H }.  */
-       t3 = gen_reg_rtx (V8SImode);
-       t4 = gen_reg_rtx (V8SImode);
-       mask = GEN_INT (high_p
- 		      ? 2 + (2 << 2) + (3 << 4) + (3 << 6)
- 		      : 0 + (0 << 2) + (1 << 4) + (1 << 6));
-       emit_insn (gen_avx2_pshufdv3 (t3, gen_lowpart (V8SImode, t1), mask));
-       emit_insn (gen_avx2_pshufdv3 (t4, gen_lowpart (V8SImode, t2), mask));
- 
-       ix86_expand_mul_widen_evenodd (dest, t3, t4, uns_p, false);
-       break;
- 
-     case E_V8HImode:
-     case E_V16HImode:
-       t1 = expand_binop (mode, smul_optab, op1, op2, NULL_RTX,
- 			 uns_p, OPTAB_DIRECT);
-       t2 = expand_binop (mode,
- 			 uns_p ? umul_highpart_optab : smul_highpart_optab,
- 			 op1, op2, NULL_RTX, uns_p, OPTAB_DIRECT);
-       gcc_assert (t1 && t2);
- 
-       t3 = gen_reg_rtx (mode);
-       ix86_expand_vec_interleave (t3, t1, t2, high_p);
-       emit_move_insn (dest, gen_lowpart (wmode, t3));
-       break;
- 
-     case E_V16QImode:
-     case E_V32QImode:
-     case E_V32HImode:
-     case E_V16SImode:
-     case E_V64QImode:
-       t1 = gen_reg_rtx (wmode);
-       t2 = gen_reg_rtx (wmode);
-       ix86_expand_sse_unpack (t1, op1, uns_p, high_p);
-       ix86_expand_sse_unpack (t2, op2, uns_p, high_p);
- 
-       emit_insn (gen_rtx_SET (dest, gen_rtx_MULT (wmode, t1, t2)));
-       break;
- 
-     default:
-       gcc_unreachable ();
-     }
- }
- 
- void
- ix86_expand_sse2_mulv4si3 (rtx op0, rtx op1, rtx op2)
- {
-   rtx res_1, res_2, res_3, res_4;
- 
-   res_1 = gen_reg_rtx (V4SImode);
-   res_2 = gen_reg_rtx (V4SImode);
-   res_3 = gen_reg_rtx (V2DImode);
-   res_4 = gen_reg_rtx (V2DImode);
-   ix86_expand_mul_widen_evenodd (res_3, op1, op2, true, false);
-   ix86_expand_mul_widen_evenodd (res_4, op1, op2, true, true);
- 
-   /* Move the results in element 2 down to element 1; we don't care
-      what goes in elements 2 and 3.  Then we can merge the parts
-      back together with an interleave.
- 
-      Note that two other sequences were tried:
-      (1) Use interleaves at the start instead of psrldq, which allows
-      us to use a single shufps to merge things back at the end.
-      (2) Use shufps here to combine the two vectors, then pshufd to
-      put the elements in the correct order.
-      In both cases the cost of the reformatting stall was too high
-      and the overall sequence slower.  */
- 
-   emit_insn (gen_sse2_pshufd_1 (res_1, gen_lowpart (V4SImode, res_3),
- 				const0_rtx, const2_rtx,
- 				const0_rtx, const0_rtx));
-   emit_insn (gen_sse2_pshufd_1 (res_2, gen_lowpart (V4SImode, res_4),
- 				const0_rtx, const2_rtx,
- 				const0_rtx, const0_rtx));
-   res_1 = emit_insn (gen_vec_interleave_lowv4si (op0, res_1, res_2));
- 
-   set_unique_reg_note (res_1, REG_EQUAL, gen_rtx_MULT (V4SImode, op1, op2));
- }
- 
- void
- ix86_expand_sse2_mulvxdi3 (rtx op0, rtx op1, rtx op2)
- {
-   machine_mode mode = GET_MODE (op0);
-   rtx t1, t2, t3, t4, t5, t6;
- 
-   if (TARGET_AVX512DQ && mode == V8DImode)
-     emit_insn (gen_avx512dq_mulv8di3 (op0, op1, op2));
-   else if (TARGET_AVX512DQ && TARGET_AVX512VL && mode == V4DImode)
-     emit_insn (gen_avx512dq_mulv4di3 (op0, op1, op2));
-   else if (TARGET_AVX512DQ && TARGET_AVX512VL && mode == V2DImode)
-     emit_insn (gen_avx512dq_mulv2di3 (op0, op1, op2));
-   else if (TARGET_XOP && mode == V2DImode)
-     {
-       /* op1: A,B,C,D, op2: E,F,G,H */
-       op1 = gen_lowpart (V4SImode, op1);
-       op2 = gen_lowpart (V4SImode, op2);
- 
-       t1 = gen_reg_rtx (V4SImode);
-       t2 = gen_reg_rtx (V4SImode);
-       t3 = gen_reg_rtx (V2DImode);
-       t4 = gen_reg_rtx (V2DImode);
- 
-       /* t1: B,A,D,C */
-       emit_insn (gen_sse2_pshufd_1 (t1, op1,
- 				    GEN_INT (1),
- 				    GEN_INT (0),
- 				    GEN_INT (3),
- 				    GEN_INT (2)));
- 
-       /* t2: (B*E),(A*F),(D*G),(C*H) */
-       emit_insn (gen_mulv4si3 (t2, t1, op2));
- 
-       /* t3: (B*E)+(A*F), (D*G)+(C*H) */
-       emit_insn (gen_xop_phadddq (t3, t2));
- 
-       /* t4: ((B*E)+(A*F))<<32, ((D*G)+(C*H))<<32 */
-       emit_insn (gen_ashlv2di3 (t4, t3, GEN_INT (32)));
- 
-       /* Multiply lower parts and add all */
-       t5 = gen_reg_rtx (V2DImode);
-       emit_insn (gen_vec_widen_umult_even_v4si (t5, 
- 					gen_lowpart (V4SImode, op1),
- 					gen_lowpart (V4SImode, op2)));
-       op0 = expand_binop (mode, add_optab, t5, t4, op0, 1, OPTAB_DIRECT);
- 
-     }
-   else
-     {
-       machine_mode nmode;
-       rtx (*umul) (rtx, rtx, rtx);
- 
-       if (mode == V2DImode)
- 	{
- 	  umul = gen_vec_widen_umult_even_v4si;
- 	  nmode = V4SImode;
- 	}
-       else if (mode == V4DImode)
- 	{
- 	  umul = gen_vec_widen_umult_even_v8si;
- 	  nmode = V8SImode;
- 	}
-       else if (mode == V8DImode)
- 	{
- 	  umul = gen_vec_widen_umult_even_v16si;
- 	  nmode = V16SImode;
- 	}
-       else
- 	gcc_unreachable ();
- 
- 
-       /* Multiply low parts.  */
-       t1 = gen_reg_rtx (mode);
-       emit_insn (umul (t1, gen_lowpart (nmode, op1), gen_lowpart (nmode, op2)));
- 
-       /* Shift input vectors right 32 bits so we can multiply high parts.  */
-       t6 = GEN_INT (32);
-       t2 = expand_binop (mode, lshr_optab, op1, t6, NULL, 1, OPTAB_DIRECT);
-       t3 = expand_binop (mode, lshr_optab, op2, t6, NULL, 1, OPTAB_DIRECT);
- 
-       /* Multiply high parts by low parts.  */
-       t4 = gen_reg_rtx (mode);
-       t5 = gen_reg_rtx (mode);
-       emit_insn (umul (t4, gen_lowpart (nmode, t2), gen_lowpart (nmode, op2)));
-       emit_insn (umul (t5, gen_lowpart (nmode, t3), gen_lowpart (nmode, op1)));
- 
-       /* Combine and shift the highparts back.  */
-       t4 = expand_binop (mode, add_optab, t4, t5, t4, 1, OPTAB_DIRECT);
-       t4 = expand_binop (mode, ashl_optab, t4, t6, t4, 1, OPTAB_DIRECT);
- 
-       /* Combine high and low parts.  */
-       force_expand_binop (mode, add_optab, t1, t4, op0, 1, OPTAB_DIRECT);
-     }
- 
-   set_unique_reg_note (get_last_insn (), REG_EQUAL,
- 		       gen_rtx_MULT (mode, op1, op2));
- }
- 
- /* Return 1 if control tansfer instruction INSN
-    should be encoded with notrack prefix.  */
- 
- static bool
- ix86_notrack_prefixed_insn_p (rtx insn)
- {
-   if (!insn || !((flag_cf_protection & CF_BRANCH)))
-     return false;
- 
-   if (CALL_P (insn))
-     {
-       rtx call = get_call_rtx_from (insn);
-       gcc_assert (call != NULL_RTX);
-       rtx addr = XEXP (call, 0);
- 
-       /* Do not emit 'notrack' if it's not an indirect call.  */
-       if (MEM_P (addr)
- 	  && GET_CODE (XEXP (addr, 0)) == SYMBOL_REF)
- 	return false;
-       else
- 	return find_reg_note (insn, REG_CALL_NOCF_CHECK, 0);
-     }
- 
-   if (JUMP_P (insn) && !flag_cet_switch)
-     {
-       rtx target = JUMP_LABEL (insn);
-       if (target == NULL_RTX || ANY_RETURN_P (target))
- 	return false;
- 
-       /* Check the jump is a switch table.  */
-       rtx_insn *label = as_a<rtx_insn *> (target);
-       rtx_insn *table = next_insn (label);
-       if (table == NULL_RTX || !JUMP_TABLE_DATA_P (table))
- 	return false;
-       else
- 	return true;
-     }
-   return false;
- }
- 
- /* Calculate integer abs() using only SSE2 instructions.  */
- 
- void
- ix86_expand_sse2_abs (rtx target, rtx input)
- {
-   machine_mode mode = GET_MODE (target);
-   rtx tmp0, tmp1, x;
- 
-   switch (mode)
-     {
-     case E_V2DImode:
-     case E_V4DImode:
-       /* For 64-bit signed integer X, with SSE4.2 use
- 	 pxor t0, t0; pcmpgtq X, t0; pxor t0, X; psubq t0, X.
- 	 Otherwise handle it similarly to V4SImode, except use 64 as W instead of
- 	 32 and use logical instead of arithmetic right shift (which is
- 	 unimplemented) and subtract.  */
-       if (TARGET_SSE4_2)
- 	{
- 	  tmp0 = gen_reg_rtx (mode);
- 	  tmp1 = gen_reg_rtx (mode);
- 	  emit_move_insn (tmp1, CONST0_RTX (mode));
- 	  if (mode == E_V2DImode)
- 	    emit_insn (gen_sse4_2_gtv2di3 (tmp0, tmp1, input));
- 	  else
- 	    emit_insn (gen_avx2_gtv4di3 (tmp0, tmp1, input));
- 	}
-       else
- 	{
- 	  tmp0 = expand_simple_binop (mode, LSHIFTRT, input,
- 				      GEN_INT (GET_MODE_UNIT_BITSIZE (mode)
- 					       - 1), NULL, 0, OPTAB_DIRECT);
- 	  tmp0 = expand_simple_unop (mode, NEG, tmp0, NULL, false);
- 	}
- 
-       tmp1 = expand_simple_binop (mode, XOR, tmp0, input,
- 				  NULL, 0, OPTAB_DIRECT);
-       x = expand_simple_binop (mode, MINUS, tmp1, tmp0,
- 			       target, 0, OPTAB_DIRECT);
-       break;
- 
-     case E_V4SImode:
-       /* For 32-bit signed integer X, the best way to calculate the absolute
- 	 value of X is (((signed) X >> (W-1)) ^ X) - ((signed) X >> (W-1)).  */
-       tmp0 = expand_simple_binop (mode, ASHIFTRT, input,
- 				  GEN_INT (GET_MODE_UNIT_BITSIZE (mode) - 1),
- 				  NULL, 0, OPTAB_DIRECT);
-       tmp1 = expand_simple_binop (mode, XOR, tmp0, input,
- 				  NULL, 0, OPTAB_DIRECT);
-       x = expand_simple_binop (mode, MINUS, tmp1, tmp0,
- 			       target, 0, OPTAB_DIRECT);
-       break;
- 
-     case E_V8HImode:
-       /* For 16-bit signed integer X, the best way to calculate the absolute
- 	 value of X is max (X, -X), as SSE2 provides the PMAXSW insn.  */
-       tmp0 = expand_unop (mode, neg_optab, input, NULL_RTX, 0);
- 
-       x = expand_simple_binop (mode, SMAX, tmp0, input,
- 			       target, 0, OPTAB_DIRECT);
-       break;
- 
-     case E_V16QImode:
-       /* For 8-bit signed integer X, the best way to calculate the absolute
- 	 value of X is min ((unsigned char) X, (unsigned char) (-X)),
- 	 as SSE2 provides the PMINUB insn.  */
-       tmp0 = expand_unop (mode, neg_optab, input, NULL_RTX, 0);
- 
-       x = expand_simple_binop (V16QImode, UMIN, tmp0, input,
- 			       target, 0, OPTAB_DIRECT);
-       break;
- 
-     default:
-       gcc_unreachable ();
-     }
- 
-   if (x != target)
-     emit_move_insn (target, x);
- }
- 
- /* Expand an extract from a vector register through pextr insn.
-    Return true if successful.  */
- 
- bool
- ix86_expand_pextr (rtx *operands)
- {
-   rtx dst = operands[0];
-   rtx src = operands[1];
- 
-   unsigned int size = INTVAL (operands[2]);
-   unsigned int pos = INTVAL (operands[3]);
- 
-   if (SUBREG_P (dst))
-     {
-       /* Reject non-lowpart subregs.  */
-       if (SUBREG_BYTE (dst) > 0)
- 	return false;
-       dst = SUBREG_REG (dst);
-     }
- 	
-   if (SUBREG_P (src))
-     {
-       pos += SUBREG_BYTE (src) * BITS_PER_UNIT;
-       src = SUBREG_REG (src);
-     }
- 
-   switch (GET_MODE (src))
-     {
-     case E_V16QImode:
-     case E_V8HImode:
-     case E_V4SImode:
-     case E_V2DImode:
-     case E_V1TImode:
-     case E_TImode:
-       {
- 	machine_mode srcmode, dstmode;
- 	rtx d, pat;
- 
- 	if (!int_mode_for_size (size, 0).exists (&dstmode))
- 	  return false;
- 
- 	switch (dstmode)
- 	  {
- 	  case E_QImode:
- 	    if (!TARGET_SSE4_1)
- 	      return false;
- 	    srcmode = V16QImode;
- 	    break;
- 
- 	  case E_HImode:
- 	    if (!TARGET_SSE2)
- 	      return false;
- 	    srcmode = V8HImode;
- 	    break;
- 
- 	  case E_SImode:
- 	    if (!TARGET_SSE4_1)
- 	      return false;
- 	    srcmode = V4SImode;
- 	    break;
- 
- 	  case E_DImode:
- 	    gcc_assert (TARGET_64BIT);
- 	    if (!TARGET_SSE4_1)
- 	      return false;
- 	    srcmode = V2DImode;
- 	    break;
- 
- 	  default:
- 	    return false;
- 	  }
- 
- 	/* Reject extractions from misaligned positions.  */
- 	if (pos & (size-1))
- 	  return false;
- 
- 	if (GET_MODE (dst) == dstmode)
- 	  d = dst;
- 	else
- 	  d = gen_reg_rtx (dstmode);
- 
- 	/* Construct insn pattern.  */
- 	pat = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, GEN_INT (pos / size)));
- 	pat = gen_rtx_VEC_SELECT (dstmode, gen_lowpart (srcmode, src), pat);
- 
- 	/* Let the rtl optimizers know about the zero extension performed.  */
- 	if (dstmode == QImode || dstmode == HImode)
- 	  {
- 	    pat = gen_rtx_ZERO_EXTEND (SImode, pat);
- 	    d = gen_lowpart (SImode, d);
- 	  }
- 
- 	emit_insn (gen_rtx_SET (d, pat));
- 
- 	if (d != dst)
- 	  emit_move_insn (dst, gen_lowpart (GET_MODE (dst), d));
- 	return true;
-       }
- 
-     default:
-       return false;
-     }
- }
- 
- /* Expand an insert into a vector register through pinsr insn.
-    Return true if successful.  */
- 
- bool
- ix86_expand_pinsr (rtx *operands)
- {
-   rtx dst = operands[0];
-   rtx src = operands[3];
- 
-   unsigned int size = INTVAL (operands[1]);
-   unsigned int pos = INTVAL (operands[2]);
- 
-   if (SUBREG_P (dst))
-     {
-       pos += SUBREG_BYTE (dst) * BITS_PER_UNIT;
-       dst = SUBREG_REG (dst);
-     }
- 
-   switch (GET_MODE (dst))
-     {
-     case E_V16QImode:
-     case E_V8HImode:
-     case E_V4SImode:
-     case E_V2DImode:
-     case E_V1TImode:
-     case E_TImode:
-       {
- 	machine_mode srcmode, dstmode;
- 	rtx (*pinsr)(rtx, rtx, rtx, rtx);
- 	rtx d;
- 
- 	if (!int_mode_for_size (size, 0).exists (&srcmode))
- 	  return false;
- 
- 	switch (srcmode)
- 	  {
- 	  case E_QImode:
- 	    if (!TARGET_SSE4_1)
- 	      return false;
- 	    dstmode = V16QImode;
- 	    pinsr = gen_sse4_1_pinsrb;
- 	    break;
- 
- 	  case E_HImode:
- 	    if (!TARGET_SSE2)
- 	      return false;
- 	    dstmode = V8HImode;
- 	    pinsr = gen_sse2_pinsrw;
- 	    break;
- 
- 	  case E_SImode:
- 	    if (!TARGET_SSE4_1)
- 	      return false;
- 	    dstmode = V4SImode;
- 	    pinsr = gen_sse4_1_pinsrd;
- 	    break;
- 
- 	  case E_DImode:
- 	    gcc_assert (TARGET_64BIT);
- 	    if (!TARGET_SSE4_1)
- 	      return false;
- 	    dstmode = V2DImode;
- 	    pinsr = gen_sse4_1_pinsrq;
- 	    break;
- 
- 	  default:
- 	    return false;
- 	  }
- 
- 	/* Reject insertions to misaligned positions.  */
- 	if (pos & (size-1))
- 	  return false;
- 
- 	if (SUBREG_P (src))
- 	  {
- 	    unsigned int srcpos = SUBREG_BYTE (src);
- 
- 	    if (srcpos > 0)
- 	      {
- 		rtx extr_ops[4];
- 
- 		extr_ops[0] = gen_reg_rtx (srcmode);
- 		extr_ops[1] = gen_lowpart (srcmode, SUBREG_REG (src));
- 		extr_ops[2] = GEN_INT (size);
- 		extr_ops[3] = GEN_INT (srcpos * BITS_PER_UNIT);
- 
- 		if (!ix86_expand_pextr (extr_ops))
- 		  return false;
- 
- 		src = extr_ops[0];
- 	      }
- 	    else
- 	      src = gen_lowpart (srcmode, SUBREG_REG (src));
- 	  }
- 
- 	if (GET_MODE (dst) == dstmode)
- 	  d = dst;
- 	else
- 	  d = gen_reg_rtx (dstmode);
- 
- 	emit_insn (pinsr (d, gen_lowpart (dstmode, dst),
- 			  gen_lowpart (srcmode, src),
- 			  GEN_INT (1 << (pos / size))));
- 	if (d != dst)
- 	  emit_move_insn (dst, gen_lowpart (GET_MODE (dst), d));
- 	return true;
-       }
- 
-     default:
-       return false;
-     }
- }
  
  /* This function returns the calling abi specific va_list type node.
     It returns  the FNDECL specific va_list type.  */
--- 21521,21526 ----
*************** ix86_reassociation_width (unsigned int o
*** 50118,50124 ****
  	return 1;
  
        /* Account for targets that splits wide vectors into multiple parts.  */
!       if (TARGET_AVX128_OPTIMAL && GET_MODE_BITSIZE (mode) > 128)
  	div = GET_MODE_BITSIZE (mode) / 128;
        else if (TARGET_SSE_SPLIT_REGS && GET_MODE_BITSIZE (mode) > 64)
  	div = GET_MODE_BITSIZE (mode) / 64;
--- 21642,21648 ----
  	return 1;
  
        /* Account for targets that splits wide vectors into multiple parts.  */
!       if (TARGET_AVX256_SPLIT_REGS && GET_MODE_BITSIZE (mode) > 128)
  	div = GET_MODE_BITSIZE (mode) / 128;
        else if (TARGET_SSE_SPLIT_REGS && GET_MODE_BITSIZE (mode) > 64)
  	div = GET_MODE_BITSIZE (mode) / 64;
*************** ix86_preferred_simd_mode (scalar_mode mo
*** 50201,50271 ****
      }
  }
  
- /* All CPUs prefer to avoid cross-lane operations so perform reductions
-    upper against lower halves up to SSE reg size.  */
- 
- static machine_mode
- ix86_split_reduction (machine_mode mode)
- {
-   /* Reduce lowpart against highpart until we reach SSE reg width to
-      avoid cross-lane operations.  */
-   switch (mode)
-     {
-     case E_V8DImode:
-     case E_V4DImode:
-       return V2DImode;
-     case E_V16SImode:
-     case E_V8SImode:
-       return V4SImode;
-     case E_V32HImode:
-     case E_V16HImode:
-       return V8HImode;
-     case E_V64QImode:
-     case E_V32QImode:
-       return V16QImode;
-     case E_V16SFmode:
-     case E_V8SFmode:
-       return V4SFmode;
-     case E_V8DFmode:
-     case E_V4DFmode:
-       return V2DFmode;
-     default:
-       return mode;
-     }
- }
- 
  /* If AVX is enabled then try vectorizing with both 256bit and 128bit
     vectors.  If AVX512F is enabled then try vectorizing with 512bit,
     256bit and 128bit vectors.  */
  
! static void
! ix86_autovectorize_vector_sizes (vector_sizes *sizes)
  {
    if (TARGET_AVX512F && !TARGET_PREFER_AVX256)
      {
!       sizes->safe_push (64);
!       sizes->safe_push (32);
!       sizes->safe_push (16);
      }
    else if (TARGET_AVX && !TARGET_PREFER_AVX128)
      {
!       sizes->safe_push (32);
!       sizes->safe_push (16);
      }
  }
  
  /* Implemenation of targetm.vectorize.get_mask_mode.  */
  
  static opt_machine_mode
! ix86_get_mask_mode (poly_uint64 nunits, poly_uint64 vector_size)
  {
    unsigned elem_size = vector_size / nunits;
  
    /* Scalar mask case.  */
    if ((TARGET_AVX512F && vector_size == 64)
        || (TARGET_AVX512VL && (vector_size == 32 || vector_size == 16)))
      {
!       if (elem_size == 4 || elem_size == 8 || TARGET_AVX512BW)
  	return smallest_int_mode_for_size (nunits);
      }
  
--- 21725,21784 ----
      }
  }
  
  /* If AVX is enabled then try vectorizing with both 256bit and 128bit
     vectors.  If AVX512F is enabled then try vectorizing with 512bit,
     256bit and 128bit vectors.  */
  
! static unsigned int
! ix86_autovectorize_vector_modes (vector_modes *modes, bool all)
  {
    if (TARGET_AVX512F && !TARGET_PREFER_AVX256)
      {
!       modes->safe_push (V64QImode);
!       modes->safe_push (V32QImode);
!       modes->safe_push (V16QImode);
!     }
!   else if (TARGET_AVX512F && all)
!     {
!       modes->safe_push (V32QImode);
!       modes->safe_push (V16QImode);
!       modes->safe_push (V64QImode);
      }
    else if (TARGET_AVX && !TARGET_PREFER_AVX128)
      {
!       modes->safe_push (V32QImode);
!       modes->safe_push (V16QImode);
!     }
!   else if (TARGET_AVX && all)
!     {
!       modes->safe_push (V16QImode);
!       modes->safe_push (V32QImode);
      }
+   else if (TARGET_MMX_WITH_SSE)
+     modes->safe_push (V16QImode);
+ 
+   if (TARGET_MMX_WITH_SSE)
+     modes->safe_push (V8QImode);
+ 
+   return 0;
  }
  
  /* Implemenation of targetm.vectorize.get_mask_mode.  */
  
  static opt_machine_mode
! ix86_get_mask_mode (machine_mode data_mode)
  {
+   unsigned vector_size = GET_MODE_SIZE (data_mode);
+   unsigned nunits = GET_MODE_NUNITS (data_mode);
    unsigned elem_size = vector_size / nunits;
  
    /* Scalar mask case.  */
    if ((TARGET_AVX512F && vector_size == 64)
        || (TARGET_AVX512VL && (vector_size == 32 || vector_size == 16)))
      {
!       if (elem_size == 4
! 	  || elem_size == 8
! 	  || (TARGET_AVX512BW && (elem_size == 1 || elem_size == 2)))
  	return smallest_int_mode_for_size (nunits);
      }
  
*************** static unsigned int
*** 50305,50322 ****
  ix86_max_noce_ifcvt_seq_cost (edge e)
  {
    bool predictable_p = predictable_edge_p (e);
! 
!   enum compiler_param param
!     = (predictable_p
!        ? PARAM_MAX_RTL_IF_CONVERSION_PREDICTABLE_COST
!        : PARAM_MAX_RTL_IF_CONVERSION_UNPREDICTABLE_COST);
! 
!   /* If we have a parameter set, use that, otherwise take a guess using
!      BRANCH_COST.  */
!   if (global_options_set.x_param_values[param])
!     return PARAM_VALUE (param);
    else
!     return BRANCH_COST (true, predictable_p) * COSTS_N_INSNS (2);
  }
  
  /* Return true if SEQ is a good candidate as a replacement for the
--- 21818,21835 ----
  ix86_max_noce_ifcvt_seq_cost (edge e)
  {
    bool predictable_p = predictable_edge_p (e);
!   if (predictable_p)
!     {
!       if (global_options_set.x_param_max_rtl_if_conversion_predictable_cost)
! 	return param_max_rtl_if_conversion_predictable_cost;
!     }
    else
!     {
!       if (global_options_set.x_param_max_rtl_if_conversion_unpredictable_cost)
! 	return param_max_rtl_if_conversion_unpredictable_cost;
!     }
! 
!   return BRANCH_COST (true, predictable_p) * COSTS_N_INSNS (2);
  }
  
  /* Return true if SEQ is a good candidate as a replacement for the
*************** ix86_noce_conversion_profitable_p (rtx_i
*** 50358,50364 ****
  /* Implement targetm.vectorize.init_cost.  */
  
  static void *
! ix86_init_cost (struct loop *)
  {
    unsigned *cost = XNEWVEC (unsigned, 3);
    cost[vect_prologue] = cost[vect_body] = cost[vect_epilogue] = 0;
--- 21871,21877 ----
  /* Implement targetm.vectorize.init_cost.  */
  
  static void *
! ix86_init_cost (class loop *)
  {
    unsigned *cost = XNEWVEC (unsigned, 3);
    cost[vect_prologue] = cost[vect_body] = cost[vect_epilogue] = 0;
*************** ix86_init_cost (struct loop *)
*** 50369,50375 ****
  
  static unsigned
  ix86_add_stmt_cost (void *data, int count, enum vect_cost_for_stmt kind,
! 		    struct _stmt_vec_info *stmt_info, int misalign,
  		    enum vect_cost_model_location where)
  {
    unsigned *cost = (unsigned *) data;
--- 21882,21888 ----
  
  static unsigned
  ix86_add_stmt_cost (void *data, int count, enum vect_cost_for_stmt kind,
! 		    class _stmt_vec_info *stmt_info, int misalign,
  		    enum vect_cost_model_location where)
  {
    unsigned *cost = (unsigned *) data;
*************** ix86_memmodel_check (unsigned HOST_WIDE_
*** 50590,50602 ****
    if (val & IX86_HLE_ACQUIRE && !(is_mm_acquire (model) || strong))
      {
        warning (OPT_Winvalid_memory_model,
!               "HLE_ACQUIRE not used with ACQUIRE or stronger memory model");
        return MEMMODEL_SEQ_CST | IX86_HLE_ACQUIRE;
      }
    if (val & IX86_HLE_RELEASE && !(is_mm_release (model) || strong))
      {
        warning (OPT_Winvalid_memory_model,
!               "HLE_RELEASE not used with RELEASE or stronger memory model");
        return MEMMODEL_SEQ_CST | IX86_HLE_RELEASE;
      }
    return val;
--- 22103,22117 ----
    if (val & IX86_HLE_ACQUIRE && !(is_mm_acquire (model) || strong))
      {
        warning (OPT_Winvalid_memory_model,
! 	      "%<HLE_ACQUIRE%> not used with %<ACQUIRE%> or stronger "
! 	       "memory model");
        return MEMMODEL_SEQ_CST | IX86_HLE_ACQUIRE;
      }
    if (val & IX86_HLE_RELEASE && !(is_mm_release (model) || strong))
      {
        warning (OPT_Winvalid_memory_model,
! 	      "%<HLE_RELEASE%> not used with %<RELEASE%> or stronger "
! 	       "memory model");
        return MEMMODEL_SEQ_CST | IX86_HLE_RELEASE;
      }
    return val;
*************** ix86_simd_clone_compute_vecsize_and_simd
*** 50754,50803 ****
    return ret;
  }
  
- /* Add target attribute to SIMD clone NODE if needed.  */
- 
- static void
- ix86_simd_clone_adjust (struct cgraph_node *node)
- {
-   const char *str = NULL;
- 
-   /* Attributes need to be adjusted for definitions, not declarations.  */
-   if (!node->definition)
-     return;
- 
-   gcc_assert (node->decl == cfun->decl);
-   switch (node->simdclone->vecsize_mangle)
-     {
-     case 'b':
-       if (!TARGET_SSE2)
- 	str = "sse2";
-       break;
-     case 'c':
-       if (!TARGET_AVX)
- 	str = "avx";
-       break;
-     case 'd':
-       if (!TARGET_AVX2)
- 	str = "avx2";
-       break;
-     case 'e':
-       if (!TARGET_AVX512F)
- 	str = "avx512f";
-       break;
-     default:
-       gcc_unreachable ();
-     }
-   if (str == NULL)
-     return;
-   push_cfun (NULL);
-   tree args = build_tree_list (NULL_TREE, build_string (strlen (str), str));
-   bool ok = ix86_valid_target_attribute_p (node->decl, NULL, args, 0);
-   gcc_assert (ok);
-   pop_cfun ();
-   ix86_reset_previous_fndecl ();
-   ix86_set_current_function (node->decl);
- }
- 
  /* If SIMD clone NODE can't be used in a vectorized loop
     in current function, return -1, otherwise return a badness of using it
     (0 if it is most desirable from vecsize_mangle point of view, 1
--- 22269,22274 ----
*************** ix86_simd_clone_usable (struct cgraph_no
*** 50839,50845 ****
     (value 32 is used) as a heuristic. */
  
  static unsigned
! ix86_loop_unroll_adjust (unsigned nunroll, struct loop *loop)
  {
    basic_block *bbs;
    rtx_insn *insn;
--- 22310,22316 ----
     (value 32 is used) as a heuristic. */
  
  static unsigned
! ix86_loop_unroll_adjust (unsigned nunroll, class loop *loop)
  {
    basic_block *bbs;
    rtx_insn *insn;
*************** ix86_atomic_assign_expand_fenv (tree *ho
*** 50906,50915 ****
        tree fenv_ptr = build_pointer_type (fenv_type);
        tree fenv_addr = build1 (ADDR_EXPR, fenv_ptr, fenv_var);
        fenv_addr = fold_convert (ptr_type_node, fenv_addr);
!       tree fnstenv = ix86_builtins[IX86_BUILTIN_FNSTENV];
!       tree fldenv = ix86_builtins[IX86_BUILTIN_FLDENV];
!       tree fnstsw = ix86_builtins[IX86_BUILTIN_FNSTSW];
!       tree fnclex = ix86_builtins[IX86_BUILTIN_FNCLEX];
        tree hold_fnstenv = build_call_expr (fnstenv, 1, fenv_addr);
        tree hold_fnclex = build_call_expr (fnclex, 0);
        fenv_var = build4 (TARGET_EXPR, fenv_type, fenv_var, hold_fnstenv,
--- 22377,22386 ----
        tree fenv_ptr = build_pointer_type (fenv_type);
        tree fenv_addr = build1 (ADDR_EXPR, fenv_ptr, fenv_var);
        fenv_addr = fold_convert (ptr_type_node, fenv_addr);
!       tree fnstenv = get_ix86_builtin (IX86_BUILTIN_FNSTENV);
!       tree fldenv = get_ix86_builtin (IX86_BUILTIN_FLDENV);
!       tree fnstsw = get_ix86_builtin (IX86_BUILTIN_FNSTSW);
!       tree fnclex = get_ix86_builtin (IX86_BUILTIN_FNCLEX);
        tree hold_fnstenv = build_call_expr (fnstenv, 1, fenv_addr);
        tree hold_fnclex = build_call_expr (fnclex, 0);
        fenv_var = build4 (TARGET_EXPR, fenv_type, fenv_var, hold_fnstenv,
*************** ix86_atomic_assign_expand_fenv (tree *ho
*** 50919,50929 ****
        *clear = build_call_expr (fnclex, 0);
        tree sw_var = create_tmp_var_raw (short_unsigned_type_node);
        tree fnstsw_call = build_call_expr (fnstsw, 0);
!       tree sw_mod = build2 (MODIFY_EXPR, short_unsigned_type_node,
! 			    sw_var, fnstsw_call);
        tree exceptions_x87 = fold_convert (integer_type_node, sw_var);
!       tree update_mod = build2 (MODIFY_EXPR, integer_type_node,
! 				exceptions_var, exceptions_x87);
        *update = build2 (COMPOUND_EXPR, integer_type_node,
  			sw_mod, update_mod);
        tree update_fldenv = build_call_expr (fldenv, 1, fenv_addr);
--- 22390,22401 ----
        *clear = build_call_expr (fnclex, 0);
        tree sw_var = create_tmp_var_raw (short_unsigned_type_node);
        tree fnstsw_call = build_call_expr (fnstsw, 0);
!       tree sw_mod = build4 (TARGET_EXPR, short_unsigned_type_node, sw_var,
! 			    fnstsw_call, NULL_TREE, NULL_TREE);
        tree exceptions_x87 = fold_convert (integer_type_node, sw_var);
!       tree update_mod = build4 (TARGET_EXPR, integer_type_node,
! 				exceptions_var, exceptions_x87,
! 				NULL_TREE, NULL_TREE);
        *update = build2 (COMPOUND_EXPR, integer_type_node,
  			sw_mod, update_mod);
        tree update_fldenv = build_call_expr (fldenv, 1, fenv_addr);
*************** ix86_atomic_assign_expand_fenv (tree *ho
*** 50933,50950 ****
      {
        tree mxcsr_orig_var = create_tmp_var_raw (unsigned_type_node);
        tree mxcsr_mod_var = create_tmp_var_raw (unsigned_type_node);
!       tree stmxcsr = ix86_builtins[IX86_BUILTIN_STMXCSR];
!       tree ldmxcsr = ix86_builtins[IX86_BUILTIN_LDMXCSR];
        tree stmxcsr_hold_call = build_call_expr (stmxcsr, 0);
!       tree hold_assign_orig = build2 (MODIFY_EXPR, unsigned_type_node,
! 				      mxcsr_orig_var, stmxcsr_hold_call);
        tree hold_mod_val = build2 (BIT_IOR_EXPR, unsigned_type_node,
  				  mxcsr_orig_var,
  				  build_int_cst (unsigned_type_node, 0x1f80));
        hold_mod_val = build2 (BIT_AND_EXPR, unsigned_type_node, hold_mod_val,
  			     build_int_cst (unsigned_type_node, 0xffffffc0));
!       tree hold_assign_mod = build2 (MODIFY_EXPR, unsigned_type_node,
! 				     mxcsr_mod_var, hold_mod_val);
        tree ldmxcsr_hold_call = build_call_expr (ldmxcsr, 1, mxcsr_mod_var);
        tree hold_all = build2 (COMPOUND_EXPR, unsigned_type_node,
  			      hold_assign_orig, hold_assign_mod);
--- 22405,22424 ----
      {
        tree mxcsr_orig_var = create_tmp_var_raw (unsigned_type_node);
        tree mxcsr_mod_var = create_tmp_var_raw (unsigned_type_node);
!       tree stmxcsr = get_ix86_builtin (IX86_BUILTIN_STMXCSR);
!       tree ldmxcsr = get_ix86_builtin (IX86_BUILTIN_LDMXCSR);
        tree stmxcsr_hold_call = build_call_expr (stmxcsr, 0);
!       tree hold_assign_orig = build4 (TARGET_EXPR, unsigned_type_node,
! 				      mxcsr_orig_var, stmxcsr_hold_call,
! 				      NULL_TREE, NULL_TREE);
        tree hold_mod_val = build2 (BIT_IOR_EXPR, unsigned_type_node,
  				  mxcsr_orig_var,
  				  build_int_cst (unsigned_type_node, 0x1f80));
        hold_mod_val = build2 (BIT_AND_EXPR, unsigned_type_node, hold_mod_val,
  			     build_int_cst (unsigned_type_node, 0xffffffc0));
!       tree hold_assign_mod = build4 (TARGET_EXPR, unsigned_type_node,
! 				     mxcsr_mod_var, hold_mod_val,
! 				     NULL_TREE, NULL_TREE);
        tree ldmxcsr_hold_call = build_call_expr (ldmxcsr, 1, mxcsr_mod_var);
        tree hold_all = build2 (COMPOUND_EXPR, unsigned_type_node,
  			      hold_assign_orig, hold_assign_mod);
*************** ix86_atomic_assign_expand_fenv (tree *ho
*** 50973,50980 ****
  			    exceptions_assign);
  	}
        else
! 	*update = build2 (MODIFY_EXPR, integer_type_node,
! 			  exceptions_var, exceptions_sse);
        tree ldmxcsr_update_call = build_call_expr (ldmxcsr, 1, mxcsr_orig_var);
        *update = build2 (COMPOUND_EXPR, void_type_node, *update,
  			ldmxcsr_update_call);
--- 22447,22454 ----
  			    exceptions_assign);
  	}
        else
! 	*update = build4 (TARGET_EXPR, integer_type_node, exceptions_var,
! 			  exceptions_sse, NULL_TREE, NULL_TREE);
        tree ldmxcsr_update_call = build_call_expr (ldmxcsr, 1, mxcsr_orig_var);
        *update = build2 (COMPOUND_EXPR, void_type_node, *update,
  			ldmxcsr_update_call);
*************** ix86_init_libfuncs (void)
*** 51177,51198 ****
  #endif
  }
  
- /* Generate call to __divmoddi4.  */
- 
- static void
- ix86_expand_divmod_libfunc (rtx libfunc, machine_mode mode,
- 			    rtx op0, rtx op1,
- 			    rtx *quot_p, rtx *rem_p)
- {
-   rtx rem = assign_386_stack_local (mode, SLOT_TEMP);
- 
-   rtx quot = emit_library_call_value (libfunc, NULL_RTX, LCT_NORMAL,
- 				      mode, op0, mode, op1, mode,
- 				      XEXP (rem, 0), Pmode);
-   *quot_p = quot;
-   *rem_p = rem;
- }
- 
  /* Set the value of FLT_EVAL_METHOD in float.h.  When using only the
     FPU, assume that the fpcw is set to extended precision; when using
     only SSE, rounding is correct; when using both SSE and the FPU,
--- 22651,22656 ----
*************** ix86_test_loading_unspec ()
*** 51480,51486 ****
    /* Verify that the two mems are thus treated as equal.  */
    ASSERT_TRUE (rtx_equal_p (dst, v0));
  
!   /* Verify the the insn is recognized.  */
    ASSERT_NE(-1, recog_memoized (insn));
  
    /* Test of an UNSPEC_VOLATILE, which has its own enum values.  */
--- 22938,22944 ----
    /* Verify that the two mems are thus treated as equal.  */
    ASSERT_TRUE (rtx_equal_p (dst, v0));
  
!   /* Verify that the insn is recognized.  */
    ASSERT_NE(-1, recog_memoized (insn));
  
    /* Test of an UNSPEC_VOLATILE, which has its own enum values.  */
*************** ix86_run_selftests (void)
*** 51686,51694 ****
  #undef TARGET_MACHINE_DEPENDENT_REORG
  #define TARGET_MACHINE_DEPENDENT_REORG ix86_reorg
  
- #undef TARGET_BUILTIN_SETJMP_FRAME_VALUE
- #define TARGET_BUILTIN_SETJMP_FRAME_VALUE ix86_builtin_setjmp_frame_value
- 
  #undef TARGET_BUILD_BUILTIN_VA_LIST
  #define TARGET_BUILD_BUILTIN_VA_LIST ix86_build_builtin_va_list
  
--- 23144,23149 ----
*************** ix86_run_selftests (void)
*** 51849,51857 ****
  #undef TARGET_VECTORIZE_SPLIT_REDUCTION
  #define TARGET_VECTORIZE_SPLIT_REDUCTION \
    ix86_split_reduction
! #undef TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES
! #define TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES \
!   ix86_autovectorize_vector_sizes
  #undef TARGET_VECTORIZE_GET_MASK_MODE
  #define TARGET_VECTORIZE_GET_MASK_MODE ix86_get_mask_mode
  #undef TARGET_VECTORIZE_INIT_COST
--- 23304,23312 ----
  #undef TARGET_VECTORIZE_SPLIT_REDUCTION
  #define TARGET_VECTORIZE_SPLIT_REDUCTION \
    ix86_split_reduction
! #undef TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES
! #define TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES \
!   ix86_autovectorize_vector_modes
  #undef TARGET_VECTORIZE_GET_MASK_MODE
  #define TARGET_VECTORIZE_GET_MASK_MODE ix86_get_mask_mode
  #undef TARGET_VECTORIZE_INIT_COST
*************** ix86_run_selftests (void)
*** 51932,51943 ****
    ix86_simd_clone_compute_vecsize_and_simdlen
  
  #undef TARGET_SIMD_CLONE_ADJUST
! #define TARGET_SIMD_CLONE_ADJUST \
!   ix86_simd_clone_adjust
  
  #undef TARGET_SIMD_CLONE_USABLE
! #define TARGET_SIMD_CLONE_USABLE \
!   ix86_simd_clone_usable
  
  #undef TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P
  #define TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P \
--- 23387,23399 ----
    ix86_simd_clone_compute_vecsize_and_simdlen
  
  #undef TARGET_SIMD_CLONE_ADJUST
! #define TARGET_SIMD_CLONE_ADJUST ix86_simd_clone_adjust
  
  #undef TARGET_SIMD_CLONE_USABLE
! #define TARGET_SIMD_CLONE_USABLE ix86_simd_clone_usable
! 
! #undef TARGET_OMP_DEVICE_KIND_ARCH_ISA
! #define TARGET_OMP_DEVICE_KIND_ARCH_ISA ix86_omp_device_kind_arch_isa
  
  #undef TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P
  #define TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P \
*************** ix86_run_selftests (void)
*** 51964,51972 ****
  #undef TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS
  #define TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS true
  
- #undef TARGET_SETUP_INCOMING_VARARG_BOUNDS
- #define TARGET_SETUP_INCOMING_VARARG_BOUNDS ix86_setup_incoming_vararg_bounds
- 
  #undef TARGET_OFFLOAD_OPTIONS
  #define TARGET_OFFLOAD_OPTIONS \
    ix86_offload_options
--- 23420,23425 ----
*************** ix86_run_selftests (void)
*** 52028,52033 ****
--- 23481,23501 ----
  #define TARGET_GET_MULTILIB_ABI_NAME \
    ix86_get_multilib_abi_name
  
+ static bool ix86_libc_has_fast_function (int fcode ATTRIBUTE_UNUSED)
+ {
+ #ifdef OPTION_GLIBC
+   if (OPTION_GLIBC)
+     return (built_in_function)fcode == BUILT_IN_MEMPCPY;
+   else
+     return false;
+ #else
+   return false;
+ #endif
+ }
+ 
+ #undef TARGET_LIBC_HAS_FAST_FUNCTION
+ #define TARGET_LIBC_HAS_FAST_FUNCTION ix86_libc_has_fast_function
+ 
  #if CHECKING_P
  #undef TARGET_RUN_TARGET_SELFTESTS
  #define TARGET_RUN_TARGET_SELFTESTS selftest::ix86_run_selftests
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386.h gcc-10.1.0/gcc/config/i386/i386.h
*** gcc-9.3.0/gcc/config/i386/i386.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for GCC for IA-32.
!    Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions of target machine for GCC for IA-32.
!    Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
*************** see the files COPYING3 and COPYING.RUNTI
*** 81,90 ****
  #define TARGET_AVX512VBMI_P(x)	TARGET_ISA_AVX512VBMI_P(x)
  #define TARGET_AVX512IFMA	TARGET_ISA_AVX512IFMA
  #define TARGET_AVX512IFMA_P(x)	TARGET_ISA_AVX512IFMA_P(x)
! #define TARGET_AVX5124FMAPS	TARGET_ISA_AVX5124FMAPS
! #define TARGET_AVX5124FMAPS_P(x) TARGET_ISA_AVX5124FMAPS_P(x)
! #define TARGET_AVX5124VNNIW	TARGET_ISA_AVX5124VNNIW
! #define TARGET_AVX5124VNNIW_P(x) TARGET_ISA_AVX5124VNNIW_P(x)
  #define TARGET_AVX512VBMI2	TARGET_ISA_AVX512VBMI2
  #define TARGET_AVX512VBMI2_P(x) TARGET_ISA_AVX512VBMI2_P(x)
  #define TARGET_AVX512VPOPCNTDQ	TARGET_ISA_AVX512VPOPCNTDQ
--- 81,90 ----
  #define TARGET_AVX512VBMI_P(x)	TARGET_ISA_AVX512VBMI_P(x)
  #define TARGET_AVX512IFMA	TARGET_ISA_AVX512IFMA
  #define TARGET_AVX512IFMA_P(x)	TARGET_ISA_AVX512IFMA_P(x)
! #define TARGET_AVX5124FMAPS	TARGET_ISA2_AVX5124FMAPS
! #define TARGET_AVX5124FMAPS_P(x) TARGET_ISA2_AVX5124FMAPS_P(x)
! #define TARGET_AVX5124VNNIW	TARGET_ISA2_AVX5124VNNIW
! #define TARGET_AVX5124VNNIW_P(x) TARGET_ISA2_AVX5124VNNIW_P(x)
  #define TARGET_AVX512VBMI2	TARGET_ISA_AVX512VBMI2
  #define TARGET_AVX512VBMI2_P(x) TARGET_ISA_AVX512VBMI2_P(x)
  #define TARGET_AVX512VPOPCNTDQ	TARGET_ISA_AVX512VPOPCNTDQ
*************** see the files COPYING3 and COPYING.RUNTI
*** 93,98 ****
--- 93,100 ----
  #define TARGET_AVX512VNNI_P(x) TARGET_ISA_AVX512VNNI_P(x)
  #define TARGET_AVX512BITALG	TARGET_ISA_AVX512BITALG
  #define TARGET_AVX512BITALG_P(x) TARGET_ISA_AVX512BITALG_P(x)
+ #define TARGET_AVX512VP2INTERSECT	TARGET_ISA2_AVX512VP2INTERSECT
+ #define TARGET_AVX512VP2INTERSECT_P(x) TARGET_ISA2_AVX512VP2INTERSECT_P(x)
  #define TARGET_FMA	TARGET_ISA_FMA
  #define TARGET_FMA_P(x)	TARGET_ISA_FMA_P(x)
  #define TARGET_SSE4A	TARGET_ISA_SSE4A
*************** see the files COPYING3 and COPYING.RUNTI
*** 105,122 ****
  #define TARGET_LWP_P(x)	TARGET_ISA_LWP_P(x)
  #define TARGET_ABM	TARGET_ISA_ABM
  #define TARGET_ABM_P(x)	TARGET_ISA_ABM_P(x)
! #define TARGET_PCONFIG	TARGET_ISA_PCONFIG
! #define TARGET_PCONFIG_P(x)	TARGET_ISA_PCONFIG_P(x)
! #define TARGET_WBNOINVD	TARGET_ISA_WBNOINVD
! #define TARGET_WBNOINVD_P(x)	TARGET_ISA_WBNOINVD_P(x)
! #define TARGET_SGX	TARGET_ISA_SGX
! #define TARGET_SGX_P(x)	TARGET_ISA_SGX_P(x)
! #define TARGET_RDPID	TARGET_ISA_RDPID
! #define TARGET_RDPID_P(x)	TARGET_ISA_RDPID_P(x)
  #define TARGET_GFNI	TARGET_ISA_GFNI
  #define TARGET_GFNI_P(x)	TARGET_ISA_GFNI_P(x)
! #define TARGET_VAES	TARGET_ISA_VAES
! #define TARGET_VAES_P(x)	TARGET_ISA_VAES_P(x)
  #define TARGET_VPCLMULQDQ	TARGET_ISA_VPCLMULQDQ
  #define TARGET_VPCLMULQDQ_P(x)	TARGET_ISA_VPCLMULQDQ_P(x)
  #define TARGET_BMI	TARGET_ISA_BMI
--- 107,124 ----
  #define TARGET_LWP_P(x)	TARGET_ISA_LWP_P(x)
  #define TARGET_ABM	TARGET_ISA_ABM
  #define TARGET_ABM_P(x)	TARGET_ISA_ABM_P(x)
! #define TARGET_PCONFIG	TARGET_ISA2_PCONFIG
! #define TARGET_PCONFIG_P(x)	TARGET_ISA2_PCONFIG_P(x)
! #define TARGET_WBNOINVD	TARGET_ISA2_WBNOINVD
! #define TARGET_WBNOINVD_P(x)	TARGET_ISA2_WBNOINVD_P(x)
! #define TARGET_SGX	TARGET_ISA2_SGX
! #define TARGET_SGX_P(x)	TARGET_ISA2_SGX_P(x)
! #define TARGET_RDPID	TARGET_ISA2_RDPID
! #define TARGET_RDPID_P(x)	TARGET_ISA2_RDPID_P(x)
  #define TARGET_GFNI	TARGET_ISA_GFNI
  #define TARGET_GFNI_P(x)	TARGET_ISA_GFNI_P(x)
! #define TARGET_VAES	TARGET_ISA2_VAES
! #define TARGET_VAES_P(x)	TARGET_ISA2_VAES_P(x)
  #define TARGET_VPCLMULQDQ	TARGET_ISA_VPCLMULQDQ
  #define TARGET_VPCLMULQDQ_P(x)	TARGET_ISA_VPCLMULQDQ_P(x)
  #define TARGET_BMI	TARGET_ISA_BMI
*************** see the files COPYING3 and COPYING.RUNTI
*** 131,138 ****
  #define TARGET_POPCNT_P(x)	TARGET_ISA_POPCNT_P(x)
  #define TARGET_SAHF	TARGET_ISA_SAHF
  #define TARGET_SAHF_P(x)	TARGET_ISA_SAHF_P(x)
! #define TARGET_MOVBE	TARGET_ISA_MOVBE
! #define TARGET_MOVBE_P(x)	TARGET_ISA_MOVBE_P(x)
  #define TARGET_CRC32	TARGET_ISA_CRC32
  #define TARGET_CRC32_P(x)	TARGET_ISA_CRC32_P(x)
  #define TARGET_AES	TARGET_ISA_AES
--- 133,140 ----
  #define TARGET_POPCNT_P(x)	TARGET_ISA_POPCNT_P(x)
  #define TARGET_SAHF	TARGET_ISA_SAHF
  #define TARGET_SAHF_P(x)	TARGET_ISA_SAHF_P(x)
! #define TARGET_MOVBE	TARGET_ISA2_MOVBE
! #define TARGET_MOVBE_P(x)	TARGET_ISA2_MOVBE_P(x)
  #define TARGET_CRC32	TARGET_ISA_CRC32
  #define TARGET_CRC32_P(x)	TARGET_ISA_CRC32_P(x)
  #define TARGET_AES	TARGET_ISA_AES
*************** see the files COPYING3 and COPYING.RUNTI
*** 141,156 ****
  #define TARGET_SHA_P(x)	TARGET_ISA_SHA_P(x)
  #define TARGET_CLFLUSHOPT	TARGET_ISA_CLFLUSHOPT
  #define TARGET_CLFLUSHOPT_P(x)	TARGET_ISA_CLFLUSHOPT_P(x)
! #define TARGET_CLZERO	TARGET_ISA_CLZERO
! #define TARGET_CLZERO_P(x)	TARGET_ISA_CLZERO_P(x)
  #define TARGET_XSAVEC	TARGET_ISA_XSAVEC
  #define TARGET_XSAVEC_P(x)	TARGET_ISA_XSAVEC_P(x)
  #define TARGET_XSAVES	TARGET_ISA_XSAVES
  #define TARGET_XSAVES_P(x)	TARGET_ISA_XSAVES_P(x)
  #define TARGET_PCLMUL	TARGET_ISA_PCLMUL
  #define TARGET_PCLMUL_P(x)	TARGET_ISA_PCLMUL_P(x)
! #define TARGET_CMPXCHG16B	TARGET_ISA_CX16
! #define TARGET_CMPXCHG16B_P(x)	TARGET_ISA_CX16_P(x)
  #define TARGET_FSGSBASE	TARGET_ISA_FSGSBASE
  #define TARGET_FSGSBASE_P(x)	TARGET_ISA_FSGSBASE_P(x)
  #define TARGET_RDRND	TARGET_ISA_RDRND
--- 143,158 ----
  #define TARGET_SHA_P(x)	TARGET_ISA_SHA_P(x)
  #define TARGET_CLFLUSHOPT	TARGET_ISA_CLFLUSHOPT
  #define TARGET_CLFLUSHOPT_P(x)	TARGET_ISA_CLFLUSHOPT_P(x)
! #define TARGET_CLZERO	TARGET_ISA2_CLZERO
! #define TARGET_CLZERO_P(x)	TARGET_ISA2_CLZERO_P(x)
  #define TARGET_XSAVEC	TARGET_ISA_XSAVEC
  #define TARGET_XSAVEC_P(x)	TARGET_ISA_XSAVEC_P(x)
  #define TARGET_XSAVES	TARGET_ISA_XSAVES
  #define TARGET_XSAVES_P(x)	TARGET_ISA_XSAVES_P(x)
  #define TARGET_PCLMUL	TARGET_ISA_PCLMUL
  #define TARGET_PCLMUL_P(x)	TARGET_ISA_PCLMUL_P(x)
! #define TARGET_CMPXCHG16B	TARGET_ISA2_CX16
! #define TARGET_CMPXCHG16B_P(x)	TARGET_ISA2_CX16_P(x)
  #define TARGET_FSGSBASE	TARGET_ISA_FSGSBASE
  #define TARGET_FSGSBASE_P(x)	TARGET_ISA_FSGSBASE_P(x)
  #define TARGET_RDRND	TARGET_ISA_RDRND
*************** see the files COPYING3 and COPYING.RUNTI
*** 159,166 ****
  #define TARGET_F16C_P(x)	TARGET_ISA_F16C_P(x)
  #define TARGET_RTM	TARGET_ISA_RTM
  #define TARGET_RTM_P(x)	TARGET_ISA_RTM_P(x)
! #define TARGET_HLE	TARGET_ISA_HLE
! #define TARGET_HLE_P(x)	TARGET_ISA_HLE_P(x)
  #define TARGET_RDSEED	TARGET_ISA_RDSEED
  #define TARGET_RDSEED_P(x)	TARGET_ISA_RDSEED_P(x)
  #define TARGET_PRFCHW	TARGET_ISA_PRFCHW
--- 161,168 ----
  #define TARGET_F16C_P(x)	TARGET_ISA_F16C_P(x)
  #define TARGET_RTM	TARGET_ISA_RTM
  #define TARGET_RTM_P(x)	TARGET_ISA_RTM_P(x)
! #define TARGET_HLE	TARGET_ISA2_HLE
! #define TARGET_HLE_P(x)	TARGET_ISA2_HLE_P(x)
  #define TARGET_RDSEED	TARGET_ISA_RDSEED
  #define TARGET_RDSEED_P(x)	TARGET_ISA_RDSEED_P(x)
  #define TARGET_PRFCHW	TARGET_ISA_PRFCHW
*************** see the files COPYING3 and COPYING.RUNTI
*** 177,198 ****
  #define TARGET_PREFETCHWT1_P(x)	TARGET_ISA_PREFETCHWT1_P(x)
  #define TARGET_CLWB	TARGET_ISA_CLWB
  #define TARGET_CLWB_P(x)	TARGET_ISA_CLWB_P(x)
! #define TARGET_MWAITX	TARGET_ISA_MWAITX
! #define TARGET_MWAITX_P(x)	TARGET_ISA_MWAITX_P(x)
  #define TARGET_PKU	TARGET_ISA_PKU
  #define TARGET_PKU_P(x)	TARGET_ISA_PKU_P(x)
  #define TARGET_SHSTK	TARGET_ISA_SHSTK
  #define TARGET_SHSTK_P(x)	TARGET_ISA_SHSTK_P(x)
  #define TARGET_MOVDIRI	TARGET_ISA_MOVDIRI
  #define TARGET_MOVDIRI_P(x) TARGET_ISA_MOVDIRI_P(x)
! #define TARGET_MOVDIR64B	TARGET_ISA_MOVDIR64B
! #define TARGET_MOVDIR64B_P(x) TARGET_ISA_MOVDIR64B_P(x)
! #define TARGET_WAITPKG	TARGET_ISA_WAITPKG
! #define TARGET_WAITPKG_P(x)	TARGET_ISA_WAITPKG_P(x)
! #define TARGET_CLDEMOTE	TARGET_ISA_CLDEMOTE
! #define TARGET_CLDEMOTE_P(x) TARGET_ISA_CLDEMOTE_P(x)
! #define TARGET_PTWRITE	TARGET_ISA_PTWRITE
! #define TARGET_PTWRITE_P(x)	TARGET_ISA_PTWRITE_P(x)
  
  #define TARGET_LP64	TARGET_ABI_64
  #define TARGET_LP64_P(x)	TARGET_ABI_64_P(x)
--- 179,204 ----
  #define TARGET_PREFETCHWT1_P(x)	TARGET_ISA_PREFETCHWT1_P(x)
  #define TARGET_CLWB	TARGET_ISA_CLWB
  #define TARGET_CLWB_P(x)	TARGET_ISA_CLWB_P(x)
! #define TARGET_MWAITX	TARGET_ISA2_MWAITX
! #define TARGET_MWAITX_P(x)	TARGET_ISA2_MWAITX_P(x)
  #define TARGET_PKU	TARGET_ISA_PKU
  #define TARGET_PKU_P(x)	TARGET_ISA_PKU_P(x)
  #define TARGET_SHSTK	TARGET_ISA_SHSTK
  #define TARGET_SHSTK_P(x)	TARGET_ISA_SHSTK_P(x)
  #define TARGET_MOVDIRI	TARGET_ISA_MOVDIRI
  #define TARGET_MOVDIRI_P(x) TARGET_ISA_MOVDIRI_P(x)
! #define TARGET_MOVDIR64B	TARGET_ISA2_MOVDIR64B
! #define TARGET_MOVDIR64B_P(x) TARGET_ISA2_MOVDIR64B_P(x)
! #define TARGET_WAITPKG	TARGET_ISA2_WAITPKG
! #define TARGET_WAITPKG_P(x)	TARGET_ISA2_WAITPKG_P(x)
! #define TARGET_CLDEMOTE	TARGET_ISA2_CLDEMOTE
! #define TARGET_CLDEMOTE_P(x) TARGET_ISA2_CLDEMOTE_P(x)
! #define TARGET_PTWRITE	TARGET_ISA2_PTWRITE
! #define TARGET_PTWRITE_P(x)	TARGET_ISA2_PTWRITE_P(x)
! #define TARGET_AVX512BF16	TARGET_ISA2_AVX512BF16
! #define TARGET_AVX512BF16_P(x)	TARGET_ISA2_AVX512BF16_P(x)
! #define TARGET_ENQCMD	TARGET_ISA2_ENQCMD
! #define TARGET_ENQCMD_P(x) TARGET_ISA2_ENQCMD_P(x)
  
  #define TARGET_LP64	TARGET_ABI_64
  #define TARGET_LP64_P(x)	TARGET_ABI_64_P(x)
*************** see the files COPYING3 and COPYING.RUNTI
*** 201,206 ****
--- 207,214 ----
  #define TARGET_16BIT	TARGET_CODE16
  #define TARGET_16BIT_P(x)	TARGET_CODE16_P(x)
  
+ #define TARGET_MMX_WITH_SSE	(TARGET_64BIT && TARGET_SSE2)
+ 
  #include "config/vxworks-dummy.h"
  
  #include "config/i386/i386-opts.h"
*************** struct stringop_algs
*** 229,237 ****
    } size [MAX_STRINGOP_ALGS];
  };
  
! /* Define the specific costs for a given cpu */
  
  struct processor_costs {
    const int add;		/* cost of an add instruction */
    const int lea;		/* cost of a lea instruction */
    const int shift_var;		/* variable shift costs */
--- 237,282 ----
    } size [MAX_STRINGOP_ALGS];
  };
  
! /* Define the specific costs for a given cpu.  NB: hard_register is used
!    by TARGET_REGISTER_MOVE_COST and TARGET_MEMORY_MOVE_COST to compute
!    hard register move costs by register allocator.  Relative costs of
!    pseudo register load and store versus pseudo register moves in RTL
!    expressions for TARGET_RTX_COSTS can be different from relative
!    costs of hard registers to get the most efficient operations with
!    pseudo registers.  */
  
  struct processor_costs {
+   /* Costs used by register allocator.  integer->integer register move
+      cost is 2.  */
+   struct
+     {
+       const int movzbl_load;	/* cost of loading using movzbl */
+       const int int_load[3];	/* cost of loading integer registers
+ 				   in QImode, HImode and SImode relative
+ 				   to reg-reg move (2).  */
+       const int int_store[3];	/* cost of storing integer register
+ 				   in QImode, HImode and SImode */
+       const int fp_move;	/* cost of reg,reg fld/fst */
+       const int fp_load[3];	/* cost of loading FP register
+ 				   in SFmode, DFmode and XFmode */
+       const int fp_store[3];	/* cost of storing FP register
+ 				   in SFmode, DFmode and XFmode */
+       const int mmx_move;	/* cost of moving MMX register.  */
+       const int mmx_load[2];	/* cost of loading MMX register
+ 				   in SImode and DImode */
+       const int mmx_store[2];	/* cost of storing MMX register
+ 				   in SImode and DImode */
+       const int xmm_move;	/* cost of moving XMM register.  */
+       const int ymm_move;	/* cost of moving XMM register.  */
+       const int zmm_move;	/* cost of moving XMM register.  */
+       const int sse_load[5];	/* cost of loading SSE register
+ 				   in 32bit, 64bit, 128bit, 256bit and 512bit */
+       const int sse_store[5];	/* cost of storing SSE register
+ 				   in SImode, DImode and TImode.  */
+       const int sse_to_integer;	/* cost of moving SSE register to integer.  */
+       const int integer_to_sse;	/* cost of moving integer register to SSE. */
+     } hard_register;
+ 
    const int add;		/* cost of an add instruction */
    const int lea;		/* cost of a lea instruction */
    const int shift_var;		/* variable shift costs */
*************** struct processor_costs {
*** 246,278 ****
    const int large_insn;		/* insns larger than this cost more */
    const int move_ratio;		/* The threshold of number of scalar
  				   memory-to-memory move insns.  */
!   const int movzbl_load;	/* cost of loading using movzbl */
    const int int_load[3];	/* cost of loading integer registers
  				   in QImode, HImode and SImode relative
  				   to reg-reg move (2).  */
    const int int_store[3];	/* cost of storing integer register
  				   in QImode, HImode and SImode */
-   const int fp_move;		/* cost of reg,reg fld/fst */
-   const int fp_load[3];		/* cost of loading FP register
- 				   in SFmode, DFmode and XFmode */
-   const int fp_store[3];	/* cost of storing FP register
- 				   in SFmode, DFmode and XFmode */
-   const int mmx_move;		/* cost of moving MMX register.  */
-   const int mmx_load[2];	/* cost of loading MMX register
- 				   in SImode and DImode */
-   const int mmx_store[2];	/* cost of storing MMX register
- 				   in SImode and DImode */
-   const int xmm_move, ymm_move, /* cost of moving XMM and YMM register.  */
- 	    zmm_move;
    const int sse_load[5];	/* cost of loading SSE register
  				   in 32bit, 64bit, 128bit, 256bit and 512bit */
-   const int sse_unaligned_load[5];/* cost of unaligned load.  */
    const int sse_store[5];	/* cost of storing SSE register
! 				   in SImode, DImode and TImode.  */
    const int sse_unaligned_store[5];/* cost of unaligned store.  */
!   const int mmxsse_to_integer;	/* cost of moving mmxsse register to
! 				   integer.  */
!   const int ssemmx_to_integer;  /* cost of moving integer to mmxsse register. */
    const int gather_static, gather_per_elt; /* Cost of gather load is computed
  				   as static + per_item * nelts. */
    const int scatter_static, scatter_per_elt; /* Cost of gather store is
--- 291,312 ----
    const int large_insn;		/* insns larger than this cost more */
    const int move_ratio;		/* The threshold of number of scalar
  				   memory-to-memory move insns.  */
!   const int clear_ratio;	/* The threshold of number of scalar
! 				   memory clearing insns.  */
    const int int_load[3];	/* cost of loading integer registers
  				   in QImode, HImode and SImode relative
  				   to reg-reg move (2).  */
    const int int_store[3];	/* cost of storing integer register
  				   in QImode, HImode and SImode */
    const int sse_load[5];	/* cost of loading SSE register
  				   in 32bit, 64bit, 128bit, 256bit and 512bit */
    const int sse_store[5];	/* cost of storing SSE register
! 				   in 32bit, 64bit, 128bit, 256bit and 512bit */
!   const int sse_unaligned_load[5];/* cost of unaligned load.  */
    const int sse_unaligned_store[5];/* cost of unaligned store.  */
!   const int xmm_move, ymm_move, /* cost of moving XMM and YMM register.  */
! 	    zmm_move;
!   const int sse_to_integer;	/* cost of moving SSE register to integer.  */
    const int gather_static, gather_per_elt; /* Cost of gather load is computed
  				   as static + per_item * nelts. */
    const int scatter_static, scatter_per_elt; /* Cost of gather store is
*************** extern const struct processor_costs ix86
*** 408,413 ****
--- 442,449 ----
  #define TARGET_ICELAKE_CLIENT (ix86_tune == PROCESSOR_ICELAKE_CLIENT)
  #define TARGET_ICELAKE_SERVER (ix86_tune == PROCESSOR_ICELAKE_SERVER)
  #define TARGET_CASCADELAKE (ix86_tune == PROCESSOR_CASCADELAKE)
+ #define TARGET_TIGERLAKE (ix86_tune == PROCESSOR_TIGERLAKE)
+ #define TARGET_COOPERLAKE (ix86_tune == PROCESSOR_COOPERLAKE)
  #define TARGET_INTEL (ix86_tune == PROCESSOR_INTEL)
  #define TARGET_GENERIC (ix86_tune == PROCESSOR_GENERIC)
  #define TARGET_AMDFAM10 (ix86_tune == PROCESSOR_AMDFAM10)
*************** extern unsigned char ix86_tune_features[
*** 542,549 ****
  	ix86_tune_features[X86_TUNE_AVOID_LEA_FOR_ADDR]
  #define TARGET_SOFTWARE_PREFETCHING_BENEFICIAL \
  	ix86_tune_features[X86_TUNE_SOFTWARE_PREFETCHING_BENEFICIAL]
! #define TARGET_AVX128_OPTIMAL \
! 	ix86_tune_features[X86_TUNE_AVX128_OPTIMAL]
  #define TARGET_GENERAL_REGS_SSE_SPILL \
  	ix86_tune_features[X86_TUNE_GENERAL_REGS_SSE_SPILL]
  #define TARGET_AVOID_MEM_OPND_FOR_CMOVE \
--- 578,585 ----
  	ix86_tune_features[X86_TUNE_AVOID_LEA_FOR_ADDR]
  #define TARGET_SOFTWARE_PREFETCHING_BENEFICIAL \
  	ix86_tune_features[X86_TUNE_SOFTWARE_PREFETCHING_BENEFICIAL]
! #define TARGET_AVX256_SPLIT_REGS \
! 	ix86_tune_features[X86_TUNE_AVX256_SPLIT_REGS]
  #define TARGET_GENERAL_REGS_SSE_SPILL \
  	ix86_tune_features[X86_TUNE_GENERAL_REGS_SSE_SPILL]
  #define TARGET_AVOID_MEM_OPND_FOR_CMOVE \
*************** extern unsigned char ix86_tune_features[
*** 556,563 ****
--- 592,603 ----
  	ix86_tune_features[X86_TUNE_AVOID_FALSE_DEP_FOR_BMI]
  #define TARGET_ONE_IF_CONV_INSN \
  	ix86_tune_features[X86_TUNE_ONE_IF_CONV_INSN]
+ #define TARGET_USE_XCHG_FOR_ATOMIC_STORE \
+ 	ix86_tune_features[X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE]
  #define TARGET_EMIT_VZEROUPPER \
  	ix86_tune_features[X86_TUNE_EMIT_VZEROUPPER]
+ #define TARGET_EXPAND_ABS \
+ 	ix86_tune_features[X86_TUNE_EXPAND_ABS]
  
  /* Feature tests against the various architecture variations.  */
  enum ix86_arch_indices {
*************** extern tree x86_mfence;
*** 670,675 ****
--- 710,721 ----
     with the rounding mode forced to 53 bits.  */
  #define TARGET_96_ROUND_53_LONG_DOUBLE 0
  
+ #ifndef SUBTARGET_DRIVER_SELF_SPECS
+ # define SUBTARGET_DRIVER_SELF_SPECS ""
+ #endif
+ 
+ #define DRIVER_SELF_SPECS SUBTARGET_DRIVER_SELF_SPECS
+ 
  /* -march=native handling only makes sense with compiler running on
     an x86 or x86_64 chip.  If changing this condition, also change
     the condition in driver-i386.c.  */
*************** extern const char *host_detect_local_cpu
*** 1120,1125 ****
--- 1166,1173 ----
  
  #define HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE) ((MODE) == XFmode ? 4 : 8)
  
+ #define REGMODE_NATURAL_SIZE(MODE) ix86_regmode_natural_size (MODE)
+ 
  #define VALID_AVX256_REG_MODE(MODE)					\
    ((MODE) == V32QImode || (MODE) == V16HImode || (MODE) == V8SImode	\
     || (MODE) == V4DImode || (MODE) == V2TImode || (MODE) == V8SFmode	\
*************** extern const char *host_detect_local_cpu
*** 1214,1220 ****
  #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE)			\
    (CC_REGNO_P (REGNO) ? VOIDmode					\
     : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode			\
!    : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS), false) \
     : (MODE) == HImode && !((GENERAL_REGNO_P (REGNO)			\
  			    && TARGET_PARTIAL_REG_STALL)		\
  			   || MASK_REGNO_P (REGNO)) ? SImode		\
--- 1262,1268 ----
  #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE)			\
    (CC_REGNO_P (REGNO) ? VOIDmode					\
     : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode			\
!    : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS), NULL)	\
     : (MODE) == HImode && !((GENERAL_REGNO_P (REGNO)			\
  			    && TARGET_PARTIAL_REG_STALL)		\
  			   || MASK_REGNO_P (REGNO)) ? SImode		\
*************** enum reg_class
*** 1504,1509 ****
--- 1552,1558 ----
  
  #define MASK_REG_P(X) (REG_P (X) && MASK_REGNO_P (REGNO (X)))
  #define MASK_REGNO_P(N) IN_RANGE ((N), FIRST_MASK_REG, LAST_MASK_REG)
+ #define MASK_PAIR_REGNO_P(N) ((((N) - FIRST_MASK_REG) & 1) == 0)
  
  #define MMX_REG_P(X) (REG_P (X) && MMX_REGNO_P (REGNO (X)))
  #define MMX_REGNO_P(N) IN_RANGE ((N), FIRST_MMX_REG, LAST_MMX_REG)
*************** typedef struct ix86_args {
*** 1891,1897 ****
     ? GET_MODE_SIZE (TImode) : UNITS_PER_WORD)
  
  /* If a memory-to-memory move would take MOVE_RATIO or more simple
!    move-instruction pairs, we will do a movmem or libcall instead.
     Increasing the value will always make code faster, but eventually
     incurs high cost in increased code size.
  
--- 1940,1946 ----
     ? GET_MODE_SIZE (TImode) : UNITS_PER_WORD)
  
  /* If a memory-to-memory move would take MOVE_RATIO or more simple
!    move-instruction pairs, we will do a cpymem or libcall instead.
     Increasing the value will always make code faster, but eventually
     incurs high cost in increased code size.
  
*************** typedef struct ix86_args {
*** 1902,1908 ****
  /* If a clear memory operation would take CLEAR_RATIO or more simple
     move-instruction sequences, we will do a clrmem or libcall instead.  */
  
! #define CLEAR_RATIO(speed) ((speed) ? MIN (6, ix86_cost->move_ratio) : 2)
  
  /* Define if shifts truncate the shift count which implies one can
     omit a sign-extension or zero-extension of a shift count.
--- 1951,1957 ----
  /* If a clear memory operation would take CLEAR_RATIO or more simple
     move-instruction sequences, we will do a clrmem or libcall instead.  */
  
! #define CLEAR_RATIO(speed) ((speed) ? ix86_cost->clear_ratio : 2)
  
  /* Define if shifts truncate the shift count which implies one can
     omit a sign-extension or zero-extension of a shift count.
*************** do {							\
*** 1943,1948 ****
--- 1992,2001 ----
  #define STACK_SAVEAREA_MODE(LEVEL)			\
    ((LEVEL) == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode)
  
+ /* Specify the machine_mode of the size increment
+    operand of an 'allocate_stack' named pattern.  */
+ #define STACK_SIZE_MODE Pmode
+ 
  /* A C expression whose value is zero if pointers that need to be extended
     from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and
     greater then zero if they are zero-extended and less then zero if the
*************** extern int const svr4_dbx_register_map[F
*** 2232,2242 ****
  
  /* Under some conditions we need jump tables in the text section,
     because the assembler cannot handle label differences between
!    sections.  This is the case for x86_64 on Mach-O for example.  */
  
  #define JUMP_TABLES_IN_TEXT_SECTION \
!   (flag_pic && ((TARGET_MACHO && TARGET_64BIT) \
!    || (!TARGET_64BIT && !HAVE_AS_GOTOFF_IN_DATA)))
  
  /* Switch to init or fini section via SECTION_OP, emit a call to FUNC,
     and switch back.  For x86 we do this only to save a few bytes that
--- 2285,2294 ----
  
  /* Under some conditions we need jump tables in the text section,
     because the assembler cannot handle label differences between
!    sections.  */
  
  #define JUMP_TABLES_IN_TEXT_SECTION \
!   (flag_pic && !(TARGET_64BIT || HAVE_AS_GOTOFF_IN_DATA))
  
  /* Switch to init or fini section via SECTION_OP, emit a call to FUNC,
     and switch back.  For x86 we do this only to save a few bytes that
*************** enum processor_type
*** 2283,2288 ****
--- 2335,2342 ----
    PROCESSOR_ICELAKE_CLIENT,
    PROCESSOR_ICELAKE_SERVER,
    PROCESSOR_CASCADELAKE,
+   PROCESSOR_TIGERLAKE,
+   PROCESSOR_COOPERLAKE,
    PROCESSOR_INTEL,
    PROCESSOR_GEODE,
    PROCESSOR_K6,
*************** const wide_int_bitmask PTA_AVX512BITALG
*** 2378,2385 ****
--- 2432,2443 ----
  const wide_int_bitmask PTA_RDPID (0, HOST_WIDE_INT_1U << 6);
  const wide_int_bitmask PTA_PCONFIG (0, HOST_WIDE_INT_1U << 7);
  const wide_int_bitmask PTA_WBNOINVD (0, HOST_WIDE_INT_1U << 8);
+ const wide_int_bitmask PTA_AVX512VP2INTERSECT (0, HOST_WIDE_INT_1U << 9);
  const wide_int_bitmask PTA_WAITPKG (0, HOST_WIDE_INT_1U << 9);
  const wide_int_bitmask PTA_PTWRITE (0, HOST_WIDE_INT_1U << 10);
+ const wide_int_bitmask PTA_AVX512BF16 (0, HOST_WIDE_INT_1U << 11);
+ const wide_int_bitmask PTA_MOVDIRI(0, HOST_WIDE_INT_1U << 13);
+ const wide_int_bitmask PTA_MOVDIR64B(0, HOST_WIDE_INT_1U << 14);
  
  const wide_int_bitmask PTA_CORE2 = PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2
    | PTA_SSE3 | PTA_SSSE3 | PTA_CX16 | PTA_FXSR;
*************** const wide_int_bitmask PTA_SKYLAKE_AVX51
*** 2400,2405 ****
--- 2458,2464 ----
    | PTA_AVX512CD | PTA_AVX512VL | PTA_AVX512BW | PTA_AVX512DQ | PTA_PKU
    | PTA_CLWB;
  const wide_int_bitmask PTA_CASCADELAKE = PTA_SKYLAKE_AVX512 | PTA_AVX512VNNI;
+ const wide_int_bitmask PTA_COOPERLAKE = PTA_CASCADELAKE | PTA_AVX512BF16;
  const wide_int_bitmask PTA_CANNONLAKE = PTA_SKYLAKE | PTA_AVX512F
    | PTA_AVX512CD | PTA_AVX512VL | PTA_AVX512BW | PTA_AVX512DQ | PTA_PKU
    | PTA_AVX512VBMI | PTA_AVX512IFMA | PTA_SHA;
*************** const wide_int_bitmask PTA_ICELAKE_CLIEN
*** 2408,2413 ****
--- 2467,2474 ----
    | PTA_RDPID | PTA_CLWB | PTA_AVX512VPOPCNTDQ;
  const wide_int_bitmask PTA_ICELAKE_SERVER = PTA_ICELAKE_CLIENT | PTA_PCONFIG
    | PTA_WBNOINVD;
+ const wide_int_bitmask PTA_TIGERLAKE = PTA_ICELAKE_CLIENT | PTA_MOVDIRI
+   | PTA_MOVDIR64B | PTA_AVX512VP2INTERSECT;
  const wide_int_bitmask PTA_KNL = PTA_BROADWELL | PTA_AVX512PF | PTA_AVX512ER
    | PTA_AVX512F | PTA_AVX512CD;
  const wide_int_bitmask PTA_BONNELL = PTA_CORE2 | PTA_MOVBE;
*************** const wide_int_bitmask PTA_KNM = PTA_KNL
*** 2426,2433 ****
  
  #include "insn-attr-common.h"
  
! struct pta
  {
    const char *const name;		/* processor name or nickname.  */
    const enum processor_type processor;
    const enum attr_cpu schedule;
--- 2487,2495 ----
  
  #include "insn-attr-common.h"
  
! class pta
  {
+ public:
    const char *const name;		/* processor name or nickname.  */
    const enum processor_type processor;
    const enum attr_cpu schedule;
*************** enum ix86_stack_slot
*** 2479,2484 ****
--- 2541,2547 ----
  {
    SLOT_TEMP = 0,
    SLOT_CW_STORED,
+   SLOT_CW_ROUNDEVEN,
    SLOT_CW_TRUNC,
    SLOT_CW_FLOOR,
    SLOT_CW_CEIL,
*************** enum ix86_entity
*** 2490,2495 ****
--- 2553,2559 ----
  {
    X86_DIRFLAG = 0,
    AVX_U128,
+   I387_ROUNDEVEN,
    I387_TRUNC,
    I387_FLOOR,
    I387_CEIL,
*************** enum avx_u128_state
*** 2525,2531 ****
  
  #define NUM_MODES_FOR_MODE_SWITCHING			\
    { X86_DIRFLAG_ANY, AVX_U128_ANY,			\
!     I387_CW_ANY, I387_CW_ANY, I387_CW_ANY }
  
  
  /* Avoid renaming of stack registers, as doing so in combination with
--- 2589,2595 ----
  
  #define NUM_MODES_FOR_MODE_SWITCHING			\
    { X86_DIRFLAG_ANY, AVX_U128_ANY,			\
!     I387_CW_ANY, I387_CW_ANY, I387_CW_ANY, I387_CW_ANY  }
  
  
  /* Avoid renaming of stack registers, as doing so in combination with
*************** struct GTY(()) ix86_frame
*** 2607,2612 ****
--- 2671,2681 ----
    /* When save_regs_using_mov is set, emit prologue using
       move instead of push instructions.  */
    bool save_regs_using_mov;
+ 
+   /* Assume without checking that:
+        EXPENSIVE_P = expensive_function_p (EXPENSIVE_COUNT).  */
+   bool expensive_p;
+   int expensive_count;
  };
  
  /* Machine specific frame tracking during prologue/epilogue generation.  All
*************** struct GTY(()) machine_function {
*** 2774,2779 ****
--- 2843,2851 ----
    /* If true, ENDBR is queued at function entrance.  */
    BOOL_BITFIELD endbr_queued_at_entrance : 1;
  
+   /* True if the function needs a stack frame.  */
+   BOOL_BITFIELD stack_frame_required : 1;
+ 
    /* The largest alignment, in bytes, of stack slot actually used.  */
    unsigned int max_used_stack_alignment;
  
*************** struct GTY(()) machine_function {
*** 2784,2789 ****
--- 2856,2864 ----
    /* During SEH output, this is non-null.  */
    struct seh_frame_state * GTY((skip(""))) seh;
  };
+ 
+ extern GTY(()) tree sysv_va_list_type_node;
+ extern GTY(()) tree ms_va_list_type_node;
  #endif
  
  #define ix86_stack_locals (cfun->machine->stack_locals)
*************** extern void debug_dispatch_window (int);
*** 2881,2886 ****
--- 2956,2967 ----
  
  #define TARGET_SUPPORTS_WIDE_INT 1
  
+ #if !defined(GENERATOR_FILE) && !defined(IN_LIBGCC2)
+ extern enum attr_cpu ix86_schedule;
+ 
+ #define NUM_X86_64_MS_CLOBBERED_REGS 12
+ #endif
+ 
  /*
  Local variables:
  version-control: t
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386.md gcc-10.1.0/gcc/config/i386/i386.md
*** gcc-9.3.0/gcc/config/i386/i386.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; GCC machine description for IA-32 and x86-64.
! ;; Copyright (C) 1988-2019 Free Software Foundation, Inc.
  ;; Mostly by William Schelter.
  ;; x86_64 support added by Jan Hubicka
  ;;
--- 1,5 ----
  ;; GCC machine description for IA-32 and x86-64.
! ;; Copyright (C) 1988-2020 Free Software Foundation, Inc.
  ;; Mostly by William Schelter.
  ;; x86_64 support added by Jan Hubicka
  ;;
***************
*** 141,146 ****
--- 141,147 ----
    UNSPEC_FXAM
  
    ;; x87 Rounding
+   UNSPEC_FRNDINT_ROUNDEVEN
    UNSPEC_FRNDINT_FLOOR
    UNSPEC_FRNDINT_CEIL
    UNSPEC_FRNDINT_TRUNC
***************
*** 295,305 ****
    UNSPECV_SPECULATION_BARRIER
  
    UNSPECV_PTWRITE
  ])
  
  ;; Constants to represent rounding modes in the ROUND instruction
  (define_constants
!   [(ROUND_FLOOR			0x1)
     (ROUND_CEIL			0x2)
     (ROUND_TRUNC			0x3)
     (ROUND_MXCSR			0x4)
--- 296,311 ----
    UNSPECV_SPECULATION_BARRIER
  
    UNSPECV_PTWRITE
+ 
+   ;; For ENQCMD and ENQCMDS support
+   UNSPECV_ENQCMD
+   UNSPECV_ENQCMDS
  ])
  
  ;; Constants to represent rounding modes in the ROUND instruction
  (define_constants
!   [(ROUND_ROUNDEVEN		0x0)
!    (ROUND_FLOOR			0x1)
     (ROUND_CEIL			0x2)
     (ROUND_TRUNC			0x3)
     (ROUND_MXCSR			0x4)
***************
*** 775,781 ****
  
  ;; Defines rounding mode of an FP operation.
  
! (define_attr "i387_cw" "trunc,floor,ceil,uninitialized,any"
    (const_string "any"))
  
  ;; Define attribute to indicate AVX insns with partial XMM register update.
--- 781,787 ----
  
  ;; Defines rounding mode of an FP operation.
  
! (define_attr "i387_cw" "roundeven,floor,ceil,trunc,uninitialized,any"
    (const_string "any"))
  
  ;; Define attribute to indicate AVX insns with partial XMM register update.
***************
*** 790,801 ****
  
  ;; Used to control the "enabled" attribute on a per-instruction basis.
  (define_attr "isa" "base,x64,x64_sse2,x64_sse4,x64_sse4_noavx,x64_avx,nox64,
! 		    sse2,sse2_noavx,sse3,sse4,sse4_noavx,avx,noavx,
  		    avx2,noavx2,bmi,bmi2,fma4,fma,avx512f,noavx512f,
  		    avx512bw,noavx512bw,avx512dq,noavx512dq,
  		    avx512vl,noavx512vl,x64_avx512dq,x64_avx512bw"
    (const_string "base"))
  
  (define_attr "enabled" ""
    (cond [(eq_attr "isa" "x64") (symbol_ref "TARGET_64BIT")
  	 (eq_attr "isa" "x64_sse2")
--- 796,811 ----
  
  ;; Used to control the "enabled" attribute on a per-instruction basis.
  (define_attr "isa" "base,x64,x64_sse2,x64_sse4,x64_sse4_noavx,x64_avx,nox64,
! 		    sse_noavx,sse2,sse2_noavx,sse3,sse4,sse4_noavx,avx,noavx,
  		    avx2,noavx2,bmi,bmi2,fma4,fma,avx512f,noavx512f,
  		    avx512bw,noavx512bw,avx512dq,noavx512dq,
  		    avx512vl,noavx512vl,x64_avx512dq,x64_avx512bw"
    (const_string "base"))
  
+ ;; Define instruction set of MMX instructions
+ (define_attr "mmx_isa" "base,native,sse,sse_noavx,avx"
+   (const_string "base"))
+ 
  (define_attr "enabled" ""
    (cond [(eq_attr "isa" "x64") (symbol_ref "TARGET_64BIT")
  	 (eq_attr "isa" "x64_sse2")
***************
*** 812,817 ****
--- 822,829 ----
  	   (symbol_ref "TARGET_64BIT && TARGET_AVX512BW")
  	 (eq_attr "isa" "nox64") (symbol_ref "!TARGET_64BIT")
  	 (eq_attr "isa" "sse2") (symbol_ref "TARGET_SSE2")
+ 	 (eq_attr "isa" "sse_noavx")
+ 	   (symbol_ref "TARGET_SSE && !TARGET_AVX")
  	 (eq_attr "isa" "sse2_noavx")
  	   (symbol_ref "TARGET_SSE2 && !TARGET_AVX")
  	 (eq_attr "isa" "sse3") (symbol_ref "TARGET_SSE3")
***************
*** 834,839 ****
--- 846,860 ----
  	 (eq_attr "isa" "noavx512dq") (symbol_ref "!TARGET_AVX512DQ")
  	 (eq_attr "isa" "avx512vl") (symbol_ref "TARGET_AVX512VL")
  	 (eq_attr "isa" "noavx512vl") (symbol_ref "!TARGET_AVX512VL")
+ 
+ 	 (eq_attr "mmx_isa" "native")
+ 	   (symbol_ref "!TARGET_MMX_WITH_SSE")
+ 	 (eq_attr "mmx_isa" "sse")
+ 	   (symbol_ref "TARGET_MMX_WITH_SSE")
+ 	 (eq_attr "mmx_isa" "sse_noavx")
+ 	   (symbol_ref "TARGET_MMX_WITH_SSE && !TARGET_AVX")
+ 	 (eq_attr "mmx_isa" "avx")
+ 	   (symbol_ref "TARGET_MMX_WITH_SSE && TARGET_AVX")
  	]
  	(const_int 1)))
  
***************
*** 933,944 ****
  (define_code_iterator any_extend [sign_extend zero_extend])
  
  ;; Prefix for insn menmonic.
! (define_code_attr sgnprefix [(sign_extend "i") (zero_extend "")])
! 
  ;; Prefix for define_insn
- (define_code_attr u [(sign_extend "") (zero_extend "u")])
  (define_code_attr s [(sign_extend "s") (zero_extend "u")])
! (define_code_attr u_bool [(sign_extend "false") (zero_extend "true")])
  
  ;; Used in signed and unsigned truncations.
  (define_code_iterator any_truncate [ss_truncate truncate us_truncate])
--- 954,967 ----
  (define_code_iterator any_extend [sign_extend zero_extend])
  
  ;; Prefix for insn menmonic.
! (define_code_attr sgnprefix [(sign_extend "i") (zero_extend "")
! 			     (div "i") (udiv "")])
  ;; Prefix for define_insn
  (define_code_attr s [(sign_extend "s") (zero_extend "u")])
! (define_code_attr u [(sign_extend "") (zero_extend "u")
! 		     (div "") (udiv "u")])
! (define_code_attr u_bool [(sign_extend "false") (zero_extend "true")
! 			  (div "false") (udiv "true")])
  
  ;; Used in signed and unsigned truncations.
  (define_code_iterator any_truncate [ss_truncate truncate us_truncate])
***************
*** 999,1008 ****
  			       (HI "TARGET_HIMODE_MATH")
  			       SI])
  
! ;; Math-dependant integer modes with DImode.
! (define_mode_iterator SWIM1248x [(QI "TARGET_QIMODE_MATH")
! 				 (HI "TARGET_HIMODE_MATH")
! 				 SI (DI "(TARGET_STV && TARGET_SSE2) || TARGET_64BIT")])
  
  ;; Math-dependant single word integer modes without QImode.
  (define_mode_iterator SWIM248 [(HI "TARGET_HIMODE_MATH")
--- 1022,1032 ----
  			       (HI "TARGET_HIMODE_MATH")
  			       SI])
  
! ;; Math-dependant integer modes with DImode (enabled for 32bit with STV).
! (define_mode_iterator SWIM1248s
! 	[(QI "TARGET_QIMODE_MATH")
! 	 (HI "TARGET_HIMODE_MATH")
! 	 SI (DI "TARGET_64BIT || (TARGET_STV && TARGET_SSE2)")])
  
  ;; Math-dependant single word integer modes without QImode.
  (define_mode_iterator SWIM248 [(HI "TARGET_HIMODE_MATH")
***************
*** 1012,1017 ****
--- 1036,1044 ----
  (define_mode_iterator DWI [(DI "!TARGET_64BIT")
  			   (TI "TARGET_64BIT")])
  
+ ;; SWI and DWI together.
+ (define_mode_iterator SWIDWI [QI HI SI DI (TI "TARGET_64BIT")])
+ 
  ;; GET_MODE_SIZE for selected modes.  As GET_MODE_SIZE is not
  ;; compile time constant, it is faster to use <MODE_SIZE> than
  ;; GET_MODE_SIZE (<MODE>mode).  For XFmode which depends on
***************
*** 1027,1034 ****
  			     (V4SF "16") (V8SF "32") (V16SF "64")])
  
  ;; Double word integer modes as mode attribute.
! (define_mode_attr DWI [(QI "HI") (HI "SI") (SI "DI") (DI "TI")])
! (define_mode_attr dwi [(QI "hi") (HI "si") (SI "di") (DI "ti")])
  
  ;; LEA mode corresponding to an integer mode
  (define_mode_attr LEAMODE [(QI "SI") (HI "SI") (SI "SI") (DI "DI")])
--- 1054,1061 ----
  			     (V4SF "16") (V8SF "32") (V16SF "64")])
  
  ;; Double word integer modes as mode attribute.
! (define_mode_attr DWI [(QI "HI") (HI "SI") (SI "DI") (DI "TI") (TI "OI")])
! (define_mode_attr dwi [(QI "hi") (HI "si") (SI "di") (DI "ti") (TI "oi")])
  
  ;; LEA mode corresponding to an integer mode
  (define_mode_attr LEAMODE [(QI "SI") (HI "SI") (SI "SI") (DI "DI")])
***************
*** 1100,1105 ****
--- 1127,1138 ----
  	 (SI "x86_64_szext_general_operand")
  	 (DI "x86_64_szext_general_operand")])
  
+ (define_mode_attr nonmemory_szext_operand
+ 	[(QI "nonmemory_operand")
+ 	 (HI "nonmemory_operand")
+ 	 (SI "x86_64_szext_nonmemory_operand")
+ 	 (DI "x86_64_szext_nonmemory_operand")])
+ 
  ;; Immediate operand predicate for integer modes.
  (define_mode_attr immediate_operand
  	[(QI "immediate_operand")
***************
*** 1143,1148 ****
--- 1176,1185 ----
  ;; All x87 floating point modes
  (define_mode_iterator X87MODEF [SF DF XF])
  
+ ;; All SSE floating point modes
+ (define_mode_iterator SSEMODEF [SF DF TF])
+ (define_mode_attr ssevecmodef [(SF "V4SF") (DF "V2DF") (TF "TF")])
+ 
  ;; SSE instruction suffix for various modes
  (define_mode_attr ssemodesuffix
    [(SF "ss") (DF "sd")
***************
*** 1244,1250 ****
    DONE;
  })
  
! (define_expand "cmp<mode>_1"
    [(set (reg:CC FLAGS_REG)
  	(compare:CC (match_operand:SWI48 0 "nonimmediate_operand")
  		    (match_operand:SWI48 1 "<general_operand>")))])
--- 1281,1287 ----
    DONE;
  })
  
! (define_expand "@cmp<mode>_1"
    [(set (reg:CC FLAGS_REG)
  	(compare:CC (match_operand:SWI48 0 "nonimmediate_operand")
  		    (match_operand:SWI48 1 "<general_operand>")))])
***************
*** 1651,1688 ****
  ;; First try to get scratch register and go through it.  In case this
  ;; fails, push sign extended lower part first and then overwrite
  ;; upper part by 32bit move.
  (define_peephole2
    [(match_scratch:DI 2 "r")
     (set (match_operand:DI 0 "push_operand")
          (match_operand:DI 1 "immediate_operand"))]
!   "TARGET_64BIT && !symbolic_operand (operands[1], DImode)
     && !x86_64_immediate_operand (operands[1], DImode)"
    [(set (match_dup 2) (match_dup 1))
     (set (match_dup 0) (match_dup 2))])
  
- ;; We need to define this as both peepholer and splitter for case
- ;; peephole2 pass is not run.
- ;; "&& 1" is needed to keep it from matching the previous pattern.
- (define_peephole2
-   [(set (match_operand:DI 0 "push_operand")
-         (match_operand:DI 1 "immediate_operand"))]
-   "TARGET_64BIT && !symbolic_operand (operands[1], DImode)
-    && !x86_64_immediate_operand (operands[1], DImode) && 1"
-   [(set (match_dup 0) (match_dup 1))
-    (set (match_dup 2) (match_dup 3))]
- {
-   split_double_mode (DImode, &operands[1], 1, &operands[2], &operands[3]);
- 
-   operands[1] = gen_lowpart (DImode, operands[2]);
-   operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx,
- 						   GEN_INT (4)));
- })
- 
  (define_split
    [(set (match_operand:DI 0 "push_operand")
          (match_operand:DI 1 "immediate_operand"))]
!   "TARGET_64BIT && ((optimize > 0 && flag_peephole2)
! 		    ? epilogue_completed : reload_completed)
     && !symbolic_operand (operands[1], DImode)
     && !x86_64_immediate_operand (operands[1], DImode)"
    [(set (match_dup 0) (match_dup 1))
--- 1688,1708 ----
  ;; First try to get scratch register and go through it.  In case this
  ;; fails, push sign extended lower part first and then overwrite
  ;; upper part by 32bit move.
+ 
  (define_peephole2
    [(match_scratch:DI 2 "r")
     (set (match_operand:DI 0 "push_operand")
          (match_operand:DI 1 "immediate_operand"))]
!   "TARGET_64BIT
!    && !symbolic_operand (operands[1], DImode)
     && !x86_64_immediate_operand (operands[1], DImode)"
    [(set (match_dup 2) (match_dup 1))
     (set (match_dup 0) (match_dup 2))])
  
  (define_split
    [(set (match_operand:DI 0 "push_operand")
          (match_operand:DI 1 "immediate_operand"))]
!   "TARGET_64BIT && epilogue_completed
     && !symbolic_operand (operands[1], DImode)
     && !x86_64_immediate_operand (operands[1], DImode)"
    [(set (match_dup 0) (match_dup 1))
***************
*** 1882,1892 ****
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       if (misaligned_operand (operands[0], XImode)
! 	  || misaligned_operand (operands[1], XImode))
! 	return "vmovdqu32\t{%1, %0|%0, %1}";
!       else
! 	return "vmovdqa32\t{%1, %0|%0, %1}";
  
      default:
        gcc_unreachable ();
--- 1902,1908 ----
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       return ix86_output_ssemov (insn, operands);
  
      default:
        gcc_unreachable ();
***************
*** 1909,1933 ****
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       if (misaligned_operand (operands[0], OImode)
! 	  || misaligned_operand (operands[1], OImode))
! 	{
! 	  if (get_attr_mode (insn) == MODE_V8SF)
! 	    return "vmovups\t{%1, %0|%0, %1}";
! 	  else if (get_attr_mode (insn) == MODE_XI)
! 	    return "vmovdqu32\t{%1, %0|%0, %1}";
! 	  else
! 	    return "vmovdqu\t{%1, %0|%0, %1}";
! 	}
!       else
! 	{
! 	  if (get_attr_mode (insn) == MODE_V8SF)
! 	    return "vmovaps\t{%1, %0|%0, %1}";
! 	  else if (get_attr_mode (insn) == MODE_XI)
! 	    return "vmovdqa32\t{%1, %0|%0, %1}";
! 	  else
! 	    return "vmovdqa\t{%1, %0|%0, %1}";
! 	}
  
      default:
        gcc_unreachable ();
--- 1925,1931 ----
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       return ix86_output_ssemov (insn, operands);
  
      default:
        gcc_unreachable ();
***************
*** 1936,1954 ****
    [(set_attr "isa" "*,avx2,*,*")
     (set_attr "type" "sselog1,sselog1,ssemov,ssemov")
     (set_attr "prefix" "vex")
!    (set (attr "mode")
! 	(cond [(ior (match_operand 0 "ext_sse_reg_operand")
! 		    (match_operand 1 "ext_sse_reg_operand"))
! 		 (const_string "XI")
! 	       (and (eq_attr "alternative" "1")
! 		    (match_test "TARGET_AVX512VL"))
! 		 (const_string "XI")
! 	       (ior (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
! 		    (and (eq_attr "alternative" "3")
! 			 (match_test "TARGET_SSE_TYPELESS_STORES")))
! 		 (const_string "V8SF")
! 	      ]
! 	      (const_string "OI")))])
  
  (define_insn "*movti_internal"
    [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,o ,v,v ,v ,m,?r,?Yd")
--- 1934,1940 ----
    [(set_attr "isa" "*,avx2,*,*")
     (set_attr "type" "sselog1,sselog1,ssemov,ssemov")
     (set_attr "prefix" "vex")
!    (set_attr "mode" "OI")])
  
  (define_insn "*movti_internal"
    [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,o ,v,v ,v ,m,?r,?Yd")
***************
*** 1969,1995 ****
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       /* TDmode values are passed as TImode on the stack.  Moving them
! 	 to stack may result in unaligned memory access.  */
!       if (misaligned_operand (operands[0], TImode)
! 	  || misaligned_operand (operands[1], TImode))
! 	{
! 	  if (get_attr_mode (insn) == MODE_V4SF)
! 	    return "%vmovups\t{%1, %0|%0, %1}";
! 	  else if (get_attr_mode (insn) == MODE_XI)
! 	    return "vmovdqu32\t{%1, %0|%0, %1}";
! 	  else
! 	    return "%vmovdqu\t{%1, %0|%0, %1}";
! 	}
!       else
! 	{
! 	  if (get_attr_mode (insn) == MODE_V4SF)
! 	    return "%vmovaps\t{%1, %0|%0, %1}";
! 	  else if (get_attr_mode (insn) == MODE_XI)
! 	    return "vmovdqa32\t{%1, %0|%0, %1}";
! 	  else
! 	    return "%vmovdqa\t{%1, %0|%0, %1}";
! 	}
  
      default:
        gcc_unreachable ();
--- 1955,1961 ----
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       return ix86_output_ssemov (insn, operands);
  
      default:
        gcc_unreachable ();
***************
*** 2016,2035 ****
     (set (attr "mode")
  	(cond [(eq_attr "alternative" "0,1")
  		 (const_string "DI")
- 	       (ior (match_operand 0 "ext_sse_reg_operand")
- 		    (match_operand 1 "ext_sse_reg_operand"))
- 		 (const_string "XI")
- 	       (and (eq_attr "alternative" "3")
- 		    (match_test "TARGET_AVX512VL"))
- 		 (const_string "XI")
- 	       (ior (not (match_test "TARGET_SSE2"))
- 		    (ior (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
- 			 (and (eq_attr "alternative" "5")
- 			      (match_test "TARGET_SSE_TYPELESS_STORES"))))
- 		 (const_string "V4SF")
  	       (match_test "TARGET_AVX")
  		 (const_string "TI")
! 	       (match_test "optimize_function_for_size_p (cfun)")
  		 (const_string "V4SF")
  	       ]
  	       (const_string "TI")))
--- 1982,1994 ----
     (set (attr "mode")
  	(cond [(eq_attr "alternative" "0,1")
  		 (const_string "DI")
  	       (match_test "TARGET_AVX")
  		 (const_string "TI")
! 	       (ior (not (match_test "TARGET_SSE2"))
! 		    (match_test "optimize_function_for_size_p (cfun)"))
! 		 (const_string "V4SF")
! 	       (and (eq_attr "alternative" "5")
! 		    (match_test "TARGET_SSE_TYPELESS_STORES"))
  		 (const_string "V4SF")
  	       ]
  	       (const_string "TI")))
***************
*** 2095,2125 ****
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       switch (get_attr_mode (insn))
! 	{
! 	case MODE_DI:
! 	  /* Handle broken assemblers that require movd instead of movq.  */
! 	  if (!HAVE_AS_IX86_INTERUNIT_MOVQ
! 	      && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1])))
! 	    return "%vmovd\t{%1, %0|%0, %1}";
! 	  return "%vmovq\t{%1, %0|%0, %1}";
! 
! 	case MODE_TI:
! 	  /* Handle AVX512 registers set.  */
! 	  if (EXT_REX_SSE_REG_P (operands[0])
! 	      || EXT_REX_SSE_REG_P (operands[1]))
! 	    return "vmovdqa64\t{%1, %0|%0, %1}";
! 	  return "%vmovdqa\t{%1, %0|%0, %1}";
! 
! 	case MODE_V2SF:
! 	  gcc_assert (!TARGET_AVX);
! 	  return "movlps\t{%1, %0|%0, %1}";
! 	case MODE_V4SF:
! 	  return "%vmovaps\t{%1, %0|%0, %1}";
! 
! 	default:
! 	  gcc_unreachable ();
! 	}
  
      case TYPE_SSECVT:
        if (SSE_REG_P (operands[0]))
--- 2054,2060 ----
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       return ix86_output_ssemov (insn, operands);
  
      case TYPE_SSECVT:
        if (SSE_REG_P (operands[0]))
***************
*** 2205,2219 ****
       (cond [(eq_attr "alternative" "2")
  	      (const_string "SI")
  	    (eq_attr "alternative" "12,13")
! 	      (cond [(ior (match_operand 0 "ext_sse_reg_operand")
! 			  (match_operand 1 "ext_sse_reg_operand"))
  		       (const_string "TI")
  		     (ior (not (match_test "TARGET_SSE2"))
! 			  (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
! 		       (const_string "V4SF")
! 		     (match_test "TARGET_AVX")
! 		       (const_string "TI")
! 		     (match_test "optimize_function_for_size_p (cfun)")
  		       (const_string "V4SF")
  		    ]
  		    (const_string "TI"))
--- 2140,2149 ----
       (cond [(eq_attr "alternative" "2")
  	      (const_string "SI")
  	    (eq_attr "alternative" "12,13")
! 	      (cond [(match_test "TARGET_AVX")
  		       (const_string "TI")
  		     (ior (not (match_test "TARGET_SSE2"))
! 			  (match_test "optimize_function_for_size_p (cfun)"))
  		       (const_string "V4SF")
  		    ]
  		    (const_string "TI"))
***************
*** 2331,2355 ****
        gcc_unreachable ();
  
      case TYPE_SSEMOV:
!       switch (get_attr_mode (insn))
! 	{
! 	case MODE_SI:
!           return "%vmovd\t{%1, %0|%0, %1}";
! 	case MODE_TI:
! 	  return "%vmovdqa\t{%1, %0|%0, %1}";
! 	case MODE_XI:
! 	  return "vmovdqa32\t{%g1, %g0|%g0, %g1}";
! 
! 	case MODE_V4SF:
! 	  return "%vmovaps\t{%1, %0|%0, %1}";
! 
! 	case MODE_SF:
! 	  gcc_assert (!TARGET_AVX);
!           return "movss\t{%1, %0|%0, %1}";
! 
! 	default:
! 	  gcc_unreachable ();
! 	}
  
      case TYPE_MMX:
        return "pxor\t%0, %0";
--- 2261,2267 ----
        gcc_unreachable ();
  
      case TYPE_SSEMOV:
!       return ix86_output_ssemov (insn, operands);
  
      case TYPE_MMX:
        return "pxor\t%0, %0";
***************
*** 2415,2429 ****
       (cond [(eq_attr "alternative" "2,3")
  	      (const_string "DI")
  	    (eq_attr "alternative" "8,9")
! 	      (cond [(ior (match_operand 0 "ext_sse_reg_operand")
! 			  (match_operand 1 "ext_sse_reg_operand"))
! 		       (const_string "XI")
! 		     (ior (not (match_test "TARGET_SSE2"))
! 			  (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
! 		       (const_string "V4SF")
! 		     (match_test "TARGET_AVX")
  		       (const_string "TI")
! 		     (match_test "optimize_function_for_size_p (cfun)")
  		       (const_string "V4SF")
  		    ]
  		    (const_string "TI"))
--- 2327,2336 ----
       (cond [(eq_attr "alternative" "2,3")
  	      (const_string "DI")
  	    (eq_attr "alternative" "8,9")
! 	      (cond [(match_test "TARGET_AVX")
  		       (const_string "TI")
! 		     (ior (not (match_test "TARGET_SSE2"))
! 			  (match_test "optimize_function_for_size_p (cfun)"))
  		       (const_string "V4SF")
  		    ]
  		    (const_string "TI"))
***************
*** 2753,2779 ****
     (set_attr "amdfam10_decode" "double")
     (set_attr "bdver1_decode" "double")])
  
  (define_expand "movstrict<mode>"
!   [(set (strict_low_part (match_operand:SWI12 0 "nonimmediate_operand"))
  	(match_operand:SWI12 1 "general_operand"))]
    ""
  {
!   if (TARGET_PARTIAL_REG_STALL && optimize_function_for_speed_p (cfun))
!     FAIL;
!   if (SUBREG_P (operands[0])
!       && GET_MODE_CLASS (GET_MODE (SUBREG_REG (operands[0]))) != MODE_INT)
      FAIL;
-   /* Don't generate memory->memory moves, go through a register */
-   if (MEM_P (operands[0]) && MEM_P (operands[1]))
-     operands[1] = force_reg (<MODE>mode, operands[1]);
  })
  
  (define_insn "*movstrict<mode>_1"
    [(set (strict_low_part
! 	  (match_operand:SWI12 0 "nonimmediate_operand" "+<r>m,<r>"))
! 	(match_operand:SWI12 1 "general_operand" "<r>n,m"))]
!   "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
!    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
    "mov{<imodesuffix>}\t{%1, %0|%0, %1}"
    [(set_attr "type" "imov")
     (set_attr "mode" "<MODE>")])
--- 2660,2692 ----
     (set_attr "amdfam10_decode" "double")
     (set_attr "bdver1_decode" "double")])
  
+ (define_peephole2
+   [(set (match_operand:SWI 0 "general_reg_operand")
+ 	(match_operand:SWI 1 "general_reg_operand"))
+    (set (match_dup 1)
+ 	(match_operand:SWI 2 "general_reg_operand"))
+    (set (match_dup 2) (match_dup 0))]
+   "peep2_reg_dead_p (3, operands[0])
+    && optimize_insn_for_size_p ()"
+   [(parallel [(set (match_dup 1) (match_dup 2))
+ 	      (set (match_dup 2) (match_dup 1))])])
+ 
  (define_expand "movstrict<mode>"
!   [(set (strict_low_part (match_operand:SWI12 0 "register_operand"))
  	(match_operand:SWI12 1 "general_operand"))]
    ""
  {
!   gcc_assert (SUBREG_P (operands[0]));
!   if ((TARGET_PARTIAL_REG_STALL && optimize_function_for_speed_p (cfun))
!       || !VALID_INT_MODE_P (GET_MODE (SUBREG_REG (operands[0]))))
      FAIL;
  })
  
  (define_insn "*movstrict<mode>_1"
    [(set (strict_low_part
! 	  (match_operand:SWI12 0 "register_operand" "+<r>"))
! 	(match_operand:SWI12 1 "general_operand" "<r>mn"))]
!   "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
    "mov{<imodesuffix>}\t{%1, %0|%0, %1}"
    [(set_attr "type" "imov")
     (set_attr "mode" "<MODE>")])
***************
*** 3019,3025 ****
    "TARGET_64BIT || TARGET_SSE"
  {
    /* This insn should be already split before reg-stack.  */
!   gcc_unreachable ();
  }
    [(set_attr "isa" "*,x64")
     (set_attr "type" "multi")
--- 2932,2938 ----
    "TARGET_64BIT || TARGET_SSE"
  {
    /* This insn should be already split before reg-stack.  */
!   return "#";
  }
    [(set_attr "isa" "*,x64")
     (set_attr "type" "multi")
***************
*** 3074,3080 ****
    ""
  {
    /* This insn should be already split before reg-stack.  */
!   gcc_unreachable ();
  }
    [(set_attr "isa" "*,*,*,nox64,x64")
     (set_attr "type" "multi")
--- 2987,2993 ----
    ""
  {
    /* This insn should be already split before reg-stack.  */
!   return "#";
  }
    [(set_attr "isa" "*,*,*,nox64,x64")
     (set_attr "type" "multi")
***************
*** 3110,3116 ****
    ""
  {
    /* This insn should be already split before reg-stack.  */
!   gcc_unreachable ();
  }
    [(set_attr "isa" "*,nox64,nox64,nox64,x64,sse2")
     (set_attr "type" "multi")
--- 3023,3029 ----
    ""
  {
    /* This insn should be already split before reg-stack.  */
!   return "#";
  }
    [(set_attr "isa" "*,nox64,nox64,nox64,x64,sse2")
     (set_attr "type" "multi")
***************
*** 3143,3149 ****
    "TARGET_64BIT"
  {
    /* Anything else should be already split before reg-stack.  */
!   gcc_assert (which_alternative == 1);
    return "push{q}\t%q1";
  }
    [(set_attr "type" "multi,push,multi")
--- 3056,3063 ----
    "TARGET_64BIT"
  {
    /* Anything else should be already split before reg-stack.  */
!   if (which_alternative != 1)
!     return "#";
    return "push{q}\t%q1";
  }
    [(set_attr "type" "multi,push,multi")
***************
*** 3156,3162 ****
    "!TARGET_64BIT"
  {
    /* Anything else should be already split before reg-stack.  */
!   gcc_assert (which_alternative == 1);
    return "push{l}\t%1";
  }
    [(set_attr "type" "multi,push,multi")
--- 3070,3077 ----
    "!TARGET_64BIT"
  {
    /* Anything else should be already split before reg-stack.  */
!   if (which_alternative != 1)
!     return "#";
    return "push{l}\t%1";
  }
    [(set_attr "type" "multi,push,multi")
***************
*** 3239,3269 ****
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       /* Handle misaligned load/store since we
!          don't have movmisaligntf pattern. */
!       if (misaligned_operand (operands[0], TFmode)
! 	  || misaligned_operand (operands[1], TFmode))
! 	{
! 	  if (get_attr_mode (insn) == MODE_V4SF)
! 	    return "%vmovups\t{%1, %0|%0, %1}";
! 	  else if (TARGET_AVX512VL
! 		   && (EXT_REX_SSE_REG_P (operands[0])
! 		       || EXT_REX_SSE_REG_P (operands[1])))
! 	    return "vmovdqu64\t{%1, %0|%0, %1}";
! 	  else
! 	    return "%vmovdqu\t{%1, %0|%0, %1}";
! 	}
!       else
! 	{
! 	  if (get_attr_mode (insn) == MODE_V4SF)
! 	    return "%vmovaps\t{%1, %0|%0, %1}";
! 	  else if (TARGET_AVX512VL
! 		   && (EXT_REX_SSE_REG_P (operands[0])
! 		       || EXT_REX_SSE_REG_P (operands[1])))
! 	    return "vmovdqa64\t{%1, %0|%0, %1}";
! 	  else
! 	    return "%vmovdqa\t{%1, %0|%0, %1}";
! 	}
  
      case TYPE_MULTI:
  	return "#";
--- 3154,3160 ----
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       return ix86_output_ssemov (insn, operands);
  
      case TYPE_MULTI:
  	return "#";
***************
*** 3281,3296 ****
     (set (attr "mode")
          (cond [(eq_attr "alternative" "3,4")
  		 (const_string "DI")
- 	       (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
- 		 (const_string "V4SF")
- 	       (and (eq_attr "alternative" "2")
- 		    (match_test "TARGET_SSE_TYPELESS_STORES"))
- 		 (const_string "V4SF")
  	       (match_test "TARGET_AVX")
  		 (const_string "TI")
  	       (ior (not (match_test "TARGET_SSE2"))
  		    (match_test "optimize_function_for_size_p (cfun)"))
  		 (const_string "V4SF")
  	       ]
  	       (const_string "TI")))])
  
--- 3172,3187 ----
     (set (attr "mode")
          (cond [(eq_attr "alternative" "3,4")
  		 (const_string "DI")
  	       (match_test "TARGET_AVX")
  		 (const_string "TI")
  	       (ior (not (match_test "TARGET_SSE2"))
  		    (match_test "optimize_function_for_size_p (cfun)"))
  		 (const_string "V4SF")
+ 	       (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
+ 		 (const_string "V4SF")
+ 	       (and (eq_attr "alternative" "2")
+ 		    (match_test "TARGET_SSE_TYPELESS_STORES"))
+ 		 (const_string "V4SF")
  	       ]
  	       (const_string "TI")))])
  
***************
*** 3416,3452 ****
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       switch (get_attr_mode (insn))
! 	{
! 	case MODE_DF:
! 	  if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
! 	    return "vmovsd\t{%d1, %0|%0, %d1}";
! 	  return "%vmovsd\t{%1, %0|%0, %1}";
! 
! 	case MODE_V4SF:
! 	  return "%vmovaps\t{%1, %0|%0, %1}";
! 	case MODE_V8DF:
! 	  return "vmovapd\t{%g1, %g0|%g0, %g1}";
! 	case MODE_V2DF:
! 	  return "%vmovapd\t{%1, %0|%0, %1}";
! 
! 	case MODE_V2SF:
! 	  gcc_assert (!TARGET_AVX);
! 	  return "movlps\t{%1, %0|%0, %1}";
! 	case MODE_V1DF:
! 	  gcc_assert (!TARGET_AVX);
! 	  return "movlpd\t{%1, %0|%0, %1}";
! 
! 	case MODE_DI:
! 	  /* Handle broken assemblers that require movd instead of movq.  */
! 	  if (!HAVE_AS_IX86_INTERUNIT_MOVQ
! 	      && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1])))
! 	    return "%vmovd\t{%1, %0|%0, %1}";
! 	  return "%vmovq\t{%1, %0|%0, %1}";
! 
! 	default:
! 	  gcc_unreachable ();
! 	}
  
      default:
        gcc_unreachable ();
--- 3307,3313 ----
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       return ix86_output_ssemov (insn, operands);
  
      default:
        gcc_unreachable ();
***************
*** 3500,3513 ****
  
  	       /* xorps is one byte shorter for non-AVX targets.  */
  	       (eq_attr "alternative" "12,16")
! 		 (cond [(not (match_test "TARGET_SSE2"))
! 		 	  (const_string "V4SF")
! 			(and (match_test "TARGET_AVX512F")
! 			  (not (match_test "TARGET_PREFER_AVX256")))
! 			  (const_string "XI")
! 			(match_test "TARGET_AVX")
  			  (const_string "V2DF")
! 			(match_test "optimize_function_for_size_p (cfun)")
  			  (const_string "V4SF")
  			(match_test "TARGET_SSE_LOAD0_BY_PXOR")
  			  (const_string "TI")
--- 3361,3370 ----
  
  	       /* xorps is one byte shorter for non-AVX targets.  */
  	       (eq_attr "alternative" "12,16")
! 		 (cond [(match_test "TARGET_AVX")
  			  (const_string "V2DF")
! 			(ior (not (match_test "TARGET_SSE2"))
! 			     (match_test "optimize_function_for_size_p (cfun)"))
  			  (const_string "V4SF")
  			(match_test "TARGET_SSE_LOAD0_BY_PXOR")
  			  (const_string "TI")
***************
*** 3520,3539 ****
  
  	       /* movaps is one byte shorter for non-AVX targets.  */
  	       (eq_attr "alternative" "13,17")
! 		 (cond [(and (ior (not (match_test "TARGET_PREFER_AVX256"))
! 				  (not (match_test "TARGET_AVX512VL")))
! 			     (ior (match_operand 0 "ext_sse_reg_operand")
! 				  (match_operand 1 "ext_sse_reg_operand")))
! 			  (const_string "V8DF")
  			(ior (not (match_test "TARGET_SSE2"))
! 			     (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
  			  (const_string "V4SF")
  			(match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
  			  (const_string "V2DF")
- 			(match_test "TARGET_AVX")
- 			  (const_string "DF")
- 			(match_test "optimize_function_for_size_p (cfun)")
- 			  (const_string "V4SF")
  		       ]
  		       (const_string "DF"))
  
--- 3377,3391 ----
  
  	       /* movaps is one byte shorter for non-AVX targets.  */
  	       (eq_attr "alternative" "13,17")
! 		 (cond [(match_test "TARGET_AVX")
! 			  (const_string "DF")
  			(ior (not (match_test "TARGET_SSE2"))
! 			     (match_test "optimize_function_for_size_p (cfun)"))
! 			  (const_string "V4SF")
! 			(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
  			  (const_string "V4SF")
  			(match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
  			  (const_string "V2DF")
  		       ]
  		       (const_string "DF"))
  
***************
*** 3617,3640 ****
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       switch (get_attr_mode (insn))
! 	{
! 	case MODE_SF:
! 	  if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1]))
! 	    return "vmovss\t{%d1, %0|%0, %d1}";
! 	  return "%vmovss\t{%1, %0|%0, %1}";
! 
! 	case MODE_V16SF:
! 	  return "vmovaps\t{%g1, %g0|%g0, %g1}";
! 	case MODE_V4SF:
! 	  return "%vmovaps\t{%1, %0|%0, %1}";
! 
! 	case MODE_SI:
! 	  return "%vmovd\t{%1, %0|%0, %1}";
! 
! 	default:
! 	  gcc_unreachable ();
! 	}
  
      case TYPE_MMXMOV:
        switch (get_attr_mode (insn))
--- 3469,3475 ----
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       return ix86_output_ssemov (insn, operands);
  
      case TYPE_MMXMOV:
        switch (get_attr_mode (insn))
***************
*** 3682,3697 ****
  	       (eq_attr "alternative" "11")
  		 (const_string "DI")
  	       (eq_attr "alternative" "5")
! 		 (cond [(not (match_test "TARGET_SSE2"))
!  		 	  (const_string "V4SF")
! 			(and (match_test "TARGET_AVX512F")
! 			  (not (match_test "TARGET_PREFER_AVX256")))
  			  (const_string "V16SF")
  			(match_test "TARGET_AVX")
  			  (const_string "V4SF")
!  			(match_test "optimize_function_for_size_p (cfun)")
  			  (const_string "V4SF")
!  			(match_test "TARGET_SSE_LOAD0_BY_PXOR")
  			  (const_string "TI")
  		       ]
  		       (const_string "V4SF"))
--- 3517,3531 ----
  	       (eq_attr "alternative" "11")
  		 (const_string "DI")
  	       (eq_attr "alternative" "5")
! 		 (cond [(and (match_test "TARGET_AVX512F")
! 			     (not (match_test "TARGET_PREFER_AVX256")))
  			  (const_string "V16SF")
  			(match_test "TARGET_AVX")
  			  (const_string "V4SF")
! 			(ior (not (match_test "TARGET_SSE2"))
! 			     (match_test "optimize_function_for_size_p (cfun)"))
  			  (const_string "V4SF")
! 			(match_test "TARGET_SSE_LOAD0_BY_PXOR")
  			  (const_string "TI")
  		       ]
  		       (const_string "V4SF"))
***************
*** 3707,3718 ****
  		  better to maintain the whole registers in single format
  		  to avoid problems on using packed logical operations.  */
  	       (eq_attr "alternative" "6")
! 		 (cond [(and (ior (not (match_test "TARGET_PREFER_AVX256"))
! 				  (not (match_test "TARGET_AVX512VL")))
! 			     (ior (match_operand 0 "ext_sse_reg_operand")
! 				  (match_operand 1 "ext_sse_reg_operand")))
! 			  (const_string "V16SF")
! 			(ior (match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
  			     (match_test "TARGET_SSE_SPLIT_REGS"))
  			  (const_string "V4SF")
  		       ]
--- 3541,3547 ----
  		  better to maintain the whole registers in single format
  		  to avoid problems on using packed logical operations.  */
  	       (eq_attr "alternative" "6")
! 		 (cond [(ior (match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
  			     (match_test "TARGET_SSE_SPLIT_REGS"))
  			  (const_string "V4SF")
  		       ]
***************
*** 3860,3865 ****
--- 3689,3698 ----
  	      (const_string "avx512bw")
  	   ]
  	   (const_string "*")))
+    (set (attr "mmx_isa")
+      (if_then_else (eq_attr "alternative" "5,6")
+ 		   (const_string "native")
+ 		   (const_string "*")))
     (set (attr "type")
       (cond [(eq_attr "alternative" "0,1,2,4")
  	      (const_string "multi")
***************
*** 3975,3982 ****
        ix86_expand_clear (operands[0]);
  
        gcc_assert (!TARGET_PARTIAL_REG_STALL);
!       emit_insn (gen_movstrict<mode>
! 		  (gen_lowpart (<MODE>mode, operands[0]), operands[1]));
        DONE;
      }
  
--- 3808,3817 ----
        ix86_expand_clear (operands[0]);
  
        gcc_assert (!TARGET_PARTIAL_REG_STALL);
!       emit_insn (gen_rtx_SET
!       		 (gen_rtx_STRICT_LOW_PART
! 		  (VOIDmode, gen_lowpart (<MODE>mode, operands[0])),
! 		  operands[1]));
        DONE;
      }
  
***************
*** 4027,4034 ****
        ix86_expand_clear (operands[0]);
  
        gcc_assert (!TARGET_PARTIAL_REG_STALL);
!       emit_insn (gen_movstrictqi
! 		  (gen_lowpart (QImode, operands[0]), operands[1]));
        DONE;
      }
  
--- 3862,3871 ----
        ix86_expand_clear (operands[0]);
  
        gcc_assert (!TARGET_PARTIAL_REG_STALL);
!       emit_insn (gen_rtx_SET
! 		 (gen_rtx_STRICT_LOW_PART
! 		  (VOIDmode, gen_lowpart (QImode, operands[0])),
! 		  operands[1]));
        DONE;
      }
  
***************
*** 4049,4093 ****
    [(set_attr "isa" "*,avx512dq,avx512dq")
     (set_attr "type" "imovx,mskmov,mskmov")
     (set_attr "mode" "SI,QI,QI")])
- 
- (define_insn_and_split "*zext<mode>_doubleword_and"
-   [(set (match_operand:DI 0 "register_operand" "=&<r>")
- 	(zero_extend:DI (match_operand:SWI12 1 "nonimmediate_operand" "<r>m")))]
-   "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
-    && TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun)"
-   "#"
-   "&& reload_completed && GENERAL_REG_P (operands[0])"
-   [(set (match_dup 2) (const_int 0))]
- {
-   split_double_mode (DImode, &operands[0], 1, &operands[0], &operands[2]);
- 
-   emit_move_insn (operands[0], const0_rtx);
- 
-   gcc_assert (!TARGET_PARTIAL_REG_STALL);
-   emit_insn (gen_movstrict<mode>
- 	     (gen_lowpart (<MODE>mode, operands[0]), operands[1]));
- })
- 
- (define_insn_and_split "*zext<mode>_doubleword"
-   [(set (match_operand:DI 0 "register_operand" "=r")
- 	(zero_extend:DI (match_operand:SWI12 1 "nonimmediate_operand" "<r>m")))]
-   "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
-    && !(TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun))"
-   "#"
-   "&& reload_completed && GENERAL_REG_P (operands[0])"
-   [(set (match_dup 0) (zero_extend:SI (match_dup 1)))
-    (set (match_dup 2) (const_int 0))]
-   "split_double_mode (DImode, &operands[0], 1, &operands[0], &operands[2]);")
- 
- (define_insn_and_split "*zextsi_doubleword"
-   [(set (match_operand:DI 0 "register_operand" "=r")
- 	(zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "rm")))]
-   "!TARGET_64BIT && TARGET_STV && TARGET_SSE2"
-   "#"
-   "&& reload_completed && GENERAL_REG_P (operands[0])"
-   [(set (match_dup 0) (match_dup 1))
-    (set (match_dup 2) (const_int 0))]
-   "split_double_mode (DImode, &operands[0], 1, &operands[0], &operands[2]);")
  
  ;; Sign extension instructions
  
--- 3886,3891 ----
***************
*** 4923,4929 ****
     && !TARGET_FISTTP
     && !(SSE_FLOAT_MODE_P (GET_MODE (operands[1]))
  	 && (TARGET_64BIT || <MODE>mode != DImode))
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(const_int 0)]
--- 4721,4727 ----
     && !TARGET_FISTTP
     && !(SSE_FLOAT_MODE_P (GET_MODE (operands[1]))
  	 && (TARGET_64BIT || <MODE>mode != DImode))
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(const_int 0)]
***************
*** 5117,5128 ****
  })
  
  (define_insn_and_split "floatdi<X87MODEF:mode>2_i387_with_xmm"
!   [(set (match_operand:X87MODEF 0 "register_operand" "=f")
  	(float:X87MODEF
! 	  (match_operand:DI 1 "register_operand" "r")))
!    (clobber (match_scratch:V4SI 3 "=x"))
!    (clobber (match_scratch:V4SI 4 "=x"))
!    (clobber (match_operand:DI 2 "memory_operand" "=m"))]
    "!TARGET_64BIT && TARGET_INTER_UNIT_MOVES_TO_VEC
     && TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
     && TARGET_SSE2 && optimize_function_for_speed_p (cfun)"
--- 4915,4926 ----
  })
  
  (define_insn_and_split "floatdi<X87MODEF:mode>2_i387_with_xmm"
!   [(set (match_operand:X87MODEF 0 "register_operand" "=f,f")
  	(float:X87MODEF
! 	  (match_operand:DI 1 "register_operand" "r,r")))
!    (clobber (match_operand:DI 2 "memory_operand" "=m,m"))
!    (clobber (match_scratch:V4SI 3 "=x,x"))
!    (clobber (match_scratch:V4SI 4 "=X,x"))]
    "!TARGET_64BIT && TARGET_INTER_UNIT_MOVES_TO_VEC
     && TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
     && TARGET_SSE2 && optimize_function_for_speed_p (cfun)"
***************
*** 5135,5148 ****
       Assemble the 64-bit DImode value in an xmm register.  */
    emit_insn (gen_sse2_loadld (operands[3], CONST0_RTX (V4SImode),
  			      gen_lowpart (SImode, operands[1])));
!   emit_insn (gen_sse2_loadld (operands[4], CONST0_RTX (V4SImode),
! 			      gen_highpart (SImode, operands[1])));
!   emit_insn (gen_vec_interleave_lowv4si (operands[3], operands[3],
! 					 operands[4]));
! 
    operands[3] = gen_lowpart (DImode, operands[3]);
  }
!   [(set_attr "type" "multi")
     (set_attr "mode" "<X87MODEF:MODE>")
     (set_attr "unit" "i387")
     (set_attr "fp_int_src" "true")])
--- 4933,4953 ----
       Assemble the 64-bit DImode value in an xmm register.  */
    emit_insn (gen_sse2_loadld (operands[3], CONST0_RTX (V4SImode),
  			      gen_lowpart (SImode, operands[1])));
!   if (TARGET_SSE4_1)
!     emit_insn (gen_sse4_1_pinsrd (operands[3], operands[3],
! 				  gen_highpart (SImode, operands[1]),
! 				  GEN_INT (2)));
!   else
!     {
!       emit_insn (gen_sse2_loadld (operands[4], CONST0_RTX (V4SImode),
! 				  gen_highpart (SImode, operands[1])));
!       emit_insn (gen_vec_interleave_lowv4si (operands[3], operands[3],
! 					     operands[4]));
!     }
    operands[3] = gen_lowpart (DImode, operands[3]);
  }
!   [(set_attr "isa" "sse4,*")
!    (set_attr "type" "multi")
     (set_attr "mode" "<X87MODEF:MODE>")
     (set_attr "unit" "i387")
     (set_attr "fp_int_src" "true")])
***************
*** 5192,5197 ****
--- 4997,5003 ----
    "TARGET_AVX512F && TARGET_SSE_MATH"
    "vcvtusi2<MODEF:ssemodesuffix><SWI48:rex64suffix>\t{%1, %0, %0|%0, %0, %1}"
    [(set_attr "type" "sseicvt")
+    (set_attr "avx_partial_xmm_update" "true")
     (set_attr "prefix" "evex")
     (set_attr "mode" "<MODEF:MODE>")])
  
***************
*** 5333,5343 ****
    "ix86_expand_binary_operator (PLUS, <MODE>mode, operands); DONE;")
  
  (define_insn_and_split "*add<dwi>3_doubleword"
!   [(set (match_operand:<DWI> 0 "nonimmediate_operand" "=r,o")
  	(plus:<DWI>
  	  (match_operand:<DWI> 1 "nonimmediate_operand" "%0,0")
! 	  (match_operand:<DWI> 2 "x86_64_hilo_general_operand"
! 							"ro<di>,r<di>")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (PLUS, <DWI>mode, operands)"
    "#"
--- 5139,5148 ----
    "ix86_expand_binary_operator (PLUS, <MODE>mode, operands); DONE;")
  
  (define_insn_and_split "*add<dwi>3_doubleword"
!   [(set (match_operand:<DWI> 0 "nonimmediate_operand" "=ro,r")
  	(plus:<DWI>
  	  (match_operand:<DWI> 1 "nonimmediate_operand" "%0,0")
! 	  (match_operand:<DWI> 2 "x86_64_hilo_general_operand" "r<di>,o")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (PLUS, <DWI>mode, operands)"
    "#"
***************
*** 5365,5374 ****
  })
  
  (define_insn "*add<mode>_1"
!   [(set (match_operand:SWI48 0 "nonimmediate_operand" "=r,rm,r,r")
  	(plus:SWI48
  	  (match_operand:SWI48 1 "nonimmediate_operand" "%0,0,r,r")
! 	  (match_operand:SWI48 2 "x86_64_general_operand" "rme,re,0,le")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
  {
--- 5170,5179 ----
  })
  
  (define_insn "*add<mode>_1"
!   [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm,r,r,r")
  	(plus:SWI48
  	  (match_operand:SWI48 1 "nonimmediate_operand" "%0,0,r,r")
! 	  (match_operand:SWI48 2 "x86_64_general_operand" "re,m,0,le")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
  {
***************
*** 5471,5477 ****
  (define_insn "*addhi_1"
    [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,r,Yp")
  	(plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,r,Yp")
! 		 (match_operand:HI 2 "general_operand" "rn,rm,0,ln")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (PLUS, HImode, operands)"
  {
--- 5276,5282 ----
  (define_insn "*addhi_1"
    [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,r,Yp")
  	(plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,r,Yp")
! 		 (match_operand:HI 2 "general_operand" "rn,m,0,ln")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (PLUS, HImode, operands)"
  {
***************
*** 5520,5526 ****
  (define_insn "*addqi_1"
    [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,q,r,r,Yp")
  	(plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,q,0,r,Yp")
! 		 (match_operand:QI 2 "general_operand" "qn,qm,0,rn,0,ln")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (PLUS, QImode, operands)"
  {
--- 5325,5331 ----
  (define_insn "*addqi_1"
    [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,q,r,r,Yp")
  	(plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,q,0,r,Yp")
! 		 (match_operand:QI 2 "general_operand" "qn,m,0,rn,0,ln")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (PLUS, QImode, operands)"
  {
***************
*** 5580,5620 ****
  	      (symbol_ref "!TARGET_PARTIAL_REG_STALL")]
  	   (symbol_ref "true")))])
  
! (define_insn "*addqi_1_slp"
!   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm,q"))
! 	(plus:QI (match_dup 0)
! 		 (match_operand:QI 1 "general_operand" "qn,qm")))
     (clobber (reg:CC FLAGS_REG))]
!   "(! TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
!    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
  {
    switch (get_attr_type (insn))
      {
      case TYPE_INCDEC:
!       if (operands[1] == const1_rtx)
! 	return "inc{b}\t%0";
        else
  	{
! 	  gcc_assert (operands[1] == constm1_rtx);
! 	  return "dec{b}\t%0";
  	}
  
      default:
!       if (x86_maybe_negate_const_int (&operands[1], QImode))
! 	return "sub{b}\t{%1, %0|%0, %1}";
  
!       return "add{b}\t{%1, %0|%0, %1}";
      }
  }
    [(set (attr "type")
!      (if_then_else (match_operand:QI 1 "incdec_operand")
  	(const_string "incdec")
! 	(const_string "alu1")))
!    (set (attr "memory")
!      (if_then_else (match_operand 1 "memory_operand")
!         (const_string "load")
!         (const_string "none")))
!    (set_attr "mode" "QI")])
  
  ;; Split non destructive adds if we cannot use lea.
  (define_split
--- 5385,5423 ----
  	      (symbol_ref "!TARGET_PARTIAL_REG_STALL")]
  	   (symbol_ref "true")))])
  
! (define_insn "*add<mode>_1_slp"
!   [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>"))
! 	(plus:SWI12 (match_operand:SWI12 1 "nonimmediate_operand" "%0")
! 		    (match_operand:SWI12 2 "general_operand" "<r>mn")))
     (clobber (reg:CC FLAGS_REG))]
!   "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
!    /* FIXME: without this LRA can't reload this pattern, see PR82524.  */
!    && (rtx_equal_p (operands[0], operands[1])
!        || rtx_equal_p (operands[0], operands[2]))"
  {
    switch (get_attr_type (insn))
      {
      case TYPE_INCDEC:
!       if (operands[2] == const1_rtx)
! 	return "inc{<imodesuffix>}\t%0";
        else
  	{
! 	  gcc_assert (operands[2] == constm1_rtx);
! 	  return "dec{<imodesuffix>}\t%0";
  	}
  
      default:
!       if (x86_maybe_negate_const_int (&operands[2], QImode))
! 	return "sub{<imodesuffix>}\t{%2, %0|%0, %2}";
  
!       return "add{<imodesuffix>}\t{%2, %0|%0, %2}";
      }
  }
    [(set (attr "type")
!      (if_then_else (match_operand:QI 2 "incdec_operand")
  	(const_string "incdec")
! 	(const_string "alu")))
!    (set_attr "mode" "<MODE>")])
  
  ;; Split non destructive adds if we cannot use lea.
  (define_split
***************
*** 5676,5684 ****
  	(compare
  	  (plus:SWI
  	    (match_operand:SWI 1 "nonimmediate_operand" "%0,0,<r>")
! 	    (match_operand:SWI 2 "<general_operand>" "<g>,<r><i>,0"))
  	  (const_int 0)))
!    (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>,<r>m,<r>")
  	(plus:SWI (match_dup 1) (match_dup 2)))]
    "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
--- 5479,5487 ----
  	(compare
  	  (plus:SWI
  	    (match_operand:SWI 1 "nonimmediate_operand" "%0,0,<r>")
! 	    (match_operand:SWI 2 "<general_operand>" "<r><i>,m,0"))
  	  (const_int 0)))
!    (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>,<r>")
  	(plus:SWI (match_dup 1) (match_dup 2)))]
    "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
***************
*** 6037,6055 ****
    [(set_attr "type" "alu")
     (set_attr "mode" "QI")])
  
  ;; Add with jump on overflow.
  (define_expand "addv<mode>4"
    [(parallel [(set (reg:CCO FLAGS_REG)
! 		   (eq:CCO (plus:<DWI>
! 			      (sign_extend:<DWI>
! 				 (match_operand:SWI 1 "nonimmediate_operand"))
! 			      (match_dup 4))
! 			   (sign_extend:<DWI>
! 			      (plus:SWI (match_dup 1)
! 					(match_operand:SWI 2
! 					   "<general_operand>")))))
! 	      (set (match_operand:SWI 0 "register_operand")
! 		   (plus:SWI (match_dup 1) (match_dup 2)))])
     (set (pc) (if_then_else
  	       (eq (reg:CCO FLAGS_REG) (const_int 0))
  	       (label_ref (match_operand 3))
--- 5840,5862 ----
    [(set_attr "type" "alu")
     (set_attr "mode" "QI")])
  
+ ;; Like DWI, but use POImode instead of OImode.
+ (define_mode_attr DPWI [(QI "HI") (HI "SI") (SI "DI") (DI "TI") (TI "POI")])
+ 
  ;; Add with jump on overflow.
  (define_expand "addv<mode>4"
    [(parallel [(set (reg:CCO FLAGS_REG)
! 		   (eq:CCO
! 		     (plus:<DPWI>
! 		       (sign_extend:<DPWI>
! 			 (match_operand:SWIDWI 1 "nonimmediate_operand"))
! 		       (match_dup 4))
! 			 (sign_extend:<DPWI>
! 			   (plus:SWIDWI (match_dup 1)
! 			     (match_operand:SWIDWI 2
! 			       "<general_hilo_operand>")))))
! 	      (set (match_operand:SWIDWI 0 "register_operand")
! 		   (plus:SWIDWI (match_dup 1) (match_dup 2)))])
     (set (pc) (if_then_else
  	       (eq (reg:CCO FLAGS_REG) (const_int 0))
  	       (label_ref (match_operand 3))
***************
*** 6057,6066 ****
    ""
  {
    ix86_fixup_binary_operands_no_copy (PLUS, <MODE>mode, operands);
!   if (CONST_INT_P (operands[2]))
      operands[4] = operands[2];
    else
!     operands[4] = gen_rtx_SIGN_EXTEND (<DWI>mode, operands[2]);
  })
  
  (define_insn "*addv<mode>4"
--- 5864,5873 ----
    ""
  {
    ix86_fixup_binary_operands_no_copy (PLUS, <MODE>mode, operands);
!   if (CONST_SCALAR_INT_P (operands[2]))
      operands[4] = operands[2];
    else
!     operands[4] = gen_rtx_SIGN_EXTEND (<DPWI>mode, operands[2]);
  })
  
  (define_insn "*addv<mode>4"
***************
*** 6069,6095 ****
  		   (sign_extend:<DWI>
  		      (match_operand:SWI 1 "nonimmediate_operand" "%0,0"))
  		   (sign_extend:<DWI>
! 		      (match_operand:SWI 2 "<general_sext_operand>"
! 					   "<r>mWe,<r>We")))
  		(sign_extend:<DWI>
  		   (plus:SWI (match_dup 1) (match_dup 2)))))
!    (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>,<r>m")
  	(plus:SWI (match_dup 1) (match_dup 2)))]
    "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
    "add{<imodesuffix>}\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*addv<mode>4_1"
    [(set (reg:CCO FLAGS_REG)
  	(eq:CCO (plus:<DWI>
  		   (sign_extend:<DWI>
  		      (match_operand:SWI 1 "nonimmediate_operand" "0"))
  		   (match_operand:<DWI> 3 "const_int_operand" "i"))
  		(sign_extend:<DWI>
! 		   (plus:SWI (match_dup 1)
! 			     (match_operand:SWI 2 "x86_64_immediate_operand"
! 						  "<i>")))))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
  	(plus:SWI (match_dup 1) (match_dup 2)))]
    "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)
--- 5876,5901 ----
  		   (sign_extend:<DWI>
  		      (match_operand:SWI 1 "nonimmediate_operand" "%0,0"))
  		   (sign_extend:<DWI>
! 		      (match_operand:SWI 2 "<general_sext_operand>" "<r>We,m")))
  		(sign_extend:<DWI>
  		   (plus:SWI (match_dup 1) (match_dup 2)))))
!    (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(plus:SWI (match_dup 1) (match_dup 2)))]
    "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
    "add{<imodesuffix>}\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "addv<mode>4_1"
    [(set (reg:CCO FLAGS_REG)
  	(eq:CCO (plus:<DWI>
  		   (sign_extend:<DWI>
  		      (match_operand:SWI 1 "nonimmediate_operand" "0"))
  		   (match_operand:<DWI> 3 "const_int_operand" "i"))
  		(sign_extend:<DWI>
! 		   (plus:SWI
! 		     (match_dup 1)
! 		     (match_operand:SWI 2 "x86_64_immediate_operand" "<i>")))))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
  	(plus:SWI (match_dup 1) (match_dup 2)))]
    "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)
***************
*** 6105,6119 ****
  		  (const_string "4")]
  	      (const_string "<MODE_SIZE>")))])
  
  (define_expand "uaddv<mode>4"
    [(parallel [(set (reg:CCC FLAGS_REG)
  		   (compare:CCC
! 		     (plus:SWI
! 		       (match_operand:SWI 1 "nonimmediate_operand")
! 		       (match_operand:SWI 2 "<general_operand>"))
  		     (match_dup 1)))
! 	      (set (match_operand:SWI 0 "register_operand")
! 		   (plus:SWI (match_dup 1) (match_dup 2)))])
     (set (pc) (if_then_else
  	       (ltu (reg:CCC FLAGS_REG) (const_int 0))
  	       (label_ref (match_operand 3))
--- 5911,6088 ----
  		  (const_string "4")]
  	      (const_string "<MODE_SIZE>")))])
  
+ ;; Quad word integer modes as mode attribute.
+ (define_mode_attr QPWI [(SI "TI") (DI "POI")])
+ 
+ (define_insn_and_split "*addv<dwi>4_doubleword"
+   [(set (reg:CCO FLAGS_REG)
+ 	(eq:CCO
+ 	  (plus:<QPWI>
+ 	    (sign_extend:<QPWI>
+ 	      (match_operand:<DWI> 1 "nonimmediate_operand" "%0,0"))
+ 	    (sign_extend:<QPWI>
+ 	      (match_operand:<DWI> 2 "nonimmediate_operand" "r,o")))
+ 	  (sign_extend:<QPWI>
+ 	    (plus:<DWI> (match_dup 1) (match_dup 2)))))
+    (set (match_operand:<DWI> 0 "nonimmediate_operand" "=ro,r")
+ 	(plus:<DWI> (match_dup 1) (match_dup 2)))]
+   "ix86_binary_operator_ok (PLUS, <DWI>mode, operands)"
+   "#"
+   "reload_completed"
+   [(parallel [(set (reg:CCC FLAGS_REG)
+ 		   (compare:CCC
+ 		     (plus:DWIH (match_dup 1) (match_dup 2))
+ 		     (match_dup 1)))
+ 	      (set (match_dup 0)
+ 		   (plus:DWIH (match_dup 1) (match_dup 2)))])
+    (parallel [(set (reg:CCO FLAGS_REG)
+ 		   (eq:CCO
+ 		     (plus:<DWI>
+ 		       (plus:<DWI>
+ 			 (ltu:<DWI> (reg:CC FLAGS_REG) (const_int 0))
+ 			 (sign_extend:<DWI> (match_dup 4)))
+ 		       (sign_extend:<DWI> (match_dup 5)))
+ 		     (sign_extend:<DWI>
+ 		       (plus:DWIH
+ 			 (plus:DWIH
+ 			   (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0))
+ 			   (match_dup 4))
+ 			 (match_dup 5)))))
+ 	      (set (match_dup 3)
+ 		   (plus:DWIH
+ 		     (plus:DWIH
+ 		       (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0))
+ 		       (match_dup 4))
+ 		     (match_dup 5)))])]
+ {
+   split_double_mode (<DWI>mode, &operands[0], 3, &operands[0], &operands[3]);
+ })
+ 
+ (define_insn_and_split "*addv<dwi>4_doubleword_1"
+   [(set (reg:CCO FLAGS_REG)
+ 	(eq:CCO
+ 	  (plus:<QPWI>
+ 	    (sign_extend:<QPWI>
+ 	      (match_operand:<DWI> 1 "nonimmediate_operand" "%0"))
+ 	    (match_operand:<QPWI> 3 "const_scalar_int_operand" ""))
+ 	  (sign_extend:<QPWI>
+ 	    (plus:<DWI>
+ 	      (match_dup 1)
+ 	      (match_operand:<DWI> 2 "x86_64_hilo_general_operand" "<di>")))))
+    (set (match_operand:<DWI> 0 "nonimmediate_operand" "=ro")
+ 	(plus:<DWI> (match_dup 1) (match_dup 2)))]
+   "ix86_binary_operator_ok (PLUS, <DWI>mode, operands)
+    && CONST_SCALAR_INT_P (operands[2])
+    && rtx_equal_p (operands[2], operands[3])"
+   "#"
+   "reload_completed"
+   [(parallel [(set (reg:CCC FLAGS_REG)
+ 		   (compare:CCC
+ 		     (plus:DWIH (match_dup 1) (match_dup 2))
+ 		     (match_dup 1)))
+ 	      (set (match_dup 0)
+ 		   (plus:DWIH (match_dup 1) (match_dup 2)))])
+    (parallel [(set (reg:CCO FLAGS_REG)
+ 		   (eq:CCO
+ 		     (plus:<DWI>
+ 		       (plus:<DWI>
+ 			 (ltu:<DWI> (reg:CC FLAGS_REG) (const_int 0))
+ 			 (sign_extend:<DWI> (match_dup 4)))
+ 		       (match_dup 5))
+ 		     (sign_extend:<DWI>
+ 		       (plus:DWIH
+ 			 (plus:DWIH
+ 			   (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0))
+ 			   (match_dup 4))
+ 			 (match_dup 5)))))
+ 	      (set (match_dup 3)
+ 		   (plus:DWIH
+ 		     (plus:DWIH
+ 		       (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0))
+ 		       (match_dup 4))
+ 		     (match_dup 5)))])]
+ {
+   split_double_mode (<DWI>mode, &operands[0], 3, &operands[0], &operands[3]);
+   if (operands[2] == const0_rtx)
+     {
+       emit_insn (gen_addv<mode>4_1 (operands[3], operands[4], operands[5],
+ 				    operands[5]));
+       DONE;
+     }
+ })
+ 
+ (define_insn "*addv<mode>4_overflow_1"
+   [(set (reg:CCO FLAGS_REG)
+ 	(eq:CCO
+ 	  (plus:<DWI>
+ 	    (plus:<DWI>
+ 	      (match_operator:<DWI> 4 "ix86_carry_flag_operator"
+ 		[(match_operand 3 "flags_reg_operand") (const_int 0)])
+ 	      (sign_extend:<DWI>
+ 		(match_operand:SWI 1 "nonimmediate_operand" "%0,0")))
+ 	    (sign_extend:<DWI>
+ 	      (match_operand:SWI 2 "<general_sext_operand>" "rWe,m")))
+ 	  (sign_extend:<DWI>
+ 	    (plus:SWI
+ 	      (plus:SWI
+ 		(match_operator:SWI 5 "ix86_carry_flag_operator"
+ 		  [(match_dup 3) (const_int 0)])
+ 		(match_dup 1))
+ 	      (match_dup 2)))))
+    (set (match_operand:SWI 0 "nonimmediate_operand" "=rm,r")
+ 	(plus:SWI
+ 	  (plus:SWI
+ 	    (match_op_dup 5 [(match_dup 3) (const_int 0)])
+ 	    (match_dup 1))
+ 	  (match_dup 2)))]
+   "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
+   "adc{<imodesuffix>}\t{%2, %0|%0, %2}"
+   [(set_attr "type" "alu")
+    (set_attr "mode" "<MODE>")])
+ 
+ (define_insn "*addv<mode>4_overflow_2"
+   [(set (reg:CCO FLAGS_REG)
+ 	(eq:CCO
+ 	  (plus:<DWI>
+ 	    (plus:<DWI>
+ 	      (match_operator:<DWI> 4 "ix86_carry_flag_operator"
+ 		[(match_operand 3 "flags_reg_operand") (const_int 0)])
+ 	      (sign_extend:<DWI>
+ 		(match_operand:SWI 1 "nonimmediate_operand" "%0")))
+ 	    (match_operand:<DWI> 6 "const_int_operand" ""))
+ 	  (sign_extend:<DWI>
+ 	    (plus:SWI
+ 	      (plus:SWI
+ 		(match_operator:SWI 5 "ix86_carry_flag_operator"
+ 		  [(match_dup 3) (const_int 0)])
+ 		(match_dup 1))
+ 	      (match_operand:SWI 2 "x86_64_immediate_operand" "e")))))
+    (set (match_operand:SWI 0 "nonimmediate_operand" "=rm")
+ 	(plus:SWI
+ 	  (plus:SWI
+ 	    (match_op_dup 5 [(match_dup 3) (const_int 0)])
+ 	    (match_dup 1))
+ 	  (match_dup 2)))]
+   "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)
+    && CONST_INT_P (operands[2])
+    && INTVAL (operands[2]) == INTVAL (operands[6])"
+   "adc{<imodesuffix>}\t{%2, %0|%0, %2}"
+   [(set_attr "type" "alu")
+    (set_attr "mode" "<MODE>")
+    (set (attr "length_immediate")
+      (if_then_else (match_test "IN_RANGE (INTVAL (operands[2]), -128, 127)")
+        (const_string "1")
+        (const_string "4")))])
+ 
  (define_expand "uaddv<mode>4"
    [(parallel [(set (reg:CCC FLAGS_REG)
  		   (compare:CCC
! 		     (plus:SWIDWI
! 		       (match_operand:SWIDWI 1 "nonimmediate_operand")
! 		       (match_operand:SWIDWI 2 "<general_hilo_operand>"))
  		     (match_dup 1)))
! 	      (set (match_operand:SWIDWI 0 "register_operand")
! 		   (plus:SWIDWI (match_dup 1) (match_dup 2)))])
     (set (pc) (if_then_else
  	       (ltu (reg:CCC FLAGS_REG) (const_int 0))
  	       (label_ref (match_operand 3))
***************
*** 6293,6303 ****
    "ix86_expand_binary_operator (MINUS, <MODE>mode, operands); DONE;")
  
  (define_insn_and_split "*sub<dwi>3_doubleword"
!   [(set (match_operand:<DWI> 0 "nonimmediate_operand" "=r,o")
  	(minus:<DWI>
  	  (match_operand:<DWI> 1 "nonimmediate_operand" "0,0")
! 	  (match_operand:<DWI> 2 "x86_64_hilo_general_operand"
! 							"ro<di>,r<di>")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
    "#"
--- 6262,6271 ----
    "ix86_expand_binary_operator (MINUS, <MODE>mode, operands); DONE;")
  
  (define_insn_and_split "*sub<dwi>3_doubleword"
!   [(set (match_operand:<DWI> 0 "nonimmediate_operand" "=ro,r")
  	(minus:<DWI>
  	  (match_operand:<DWI> 1 "nonimmediate_operand" "0,0")
! 	  (match_operand:<DWI> 2 "x86_64_hilo_general_operand" "r<di>,o")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
    "#"
***************
*** 6326,6332 ****
    [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(minus:SWI
  	  (match_operand:SWI 1 "nonimmediate_operand" "0,0")
! 	  (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
    "sub{<imodesuffix>}\t{%2, %0|%0, %2}"
--- 6294,6300 ----
    [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(minus:SWI
  	  (match_operand:SWI 1 "nonimmediate_operand" "0,0")
! 	  (match_operand:SWI 2 "<general_operand>" "<r><i>,m")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
    "sub{<imodesuffix>}\t{%2, %0|%0, %2}"
***************
*** 6344,6366 ****
    [(set_attr "type" "alu")
     (set_attr "mode" "SI")])
  
! (define_insn "*subqi_1_slp"
!   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm,q"))
! 	(minus:QI (match_dup 0)
! 		  (match_operand:QI 1 "general_operand" "qn,qm")))
     (clobber (reg:CC FLAGS_REG))]
!   "(! TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
!    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
!   "sub{b}\t{%1, %0|%0, %1}"
!   [(set_attr "type" "alu1")
!    (set_attr "mode" "QI")])
  
  (define_insn "*sub<mode>_2"
    [(set (reg FLAGS_REG)
  	(compare
  	  (minus:SWI
  	    (match_operand:SWI 1 "nonimmediate_operand" "0,0")
! 	    (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))
  	  (const_int 0)))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(minus:SWI (match_dup 1) (match_dup 2)))]
--- 6312,6335 ----
    [(set_attr "type" "alu")
     (set_attr "mode" "SI")])
  
! (define_insn "*sub<mode>_1_slp"
!   [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>"))
! 	(minus:SWI12 (match_operand:SWI12 1 "register_operand" "0")
! 		     (match_operand:SWI12 2 "general_operand" "<r>mn")))
     (clobber (reg:CC FLAGS_REG))]
!   "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
!    /* FIXME: without this LRA can't reload this pattern, see PR82524.  */
!    && rtx_equal_p (operands[0], operands[1])"
!   "sub{<imodesuffix>}\t{%2, %0|%0, %2}"
!   [(set_attr "type" "alu")
!    (set_attr "mode" "<MODE>")])
  
  (define_insn "*sub<mode>_2"
    [(set (reg FLAGS_REG)
  	(compare
  	  (minus:SWI
  	    (match_operand:SWI 1 "nonimmediate_operand" "0,0")
! 	    (match_operand:SWI 2 "<general_operand>" "<r><i>,m"))
  	  (const_int 0)))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(minus:SWI (match_dup 1) (match_dup 2)))]
***************
*** 6389,6404 ****
  ;; Subtract with jump on overflow.
  (define_expand "subv<mode>4"
    [(parallel [(set (reg:CCO FLAGS_REG)
! 		   (eq:CCO (minus:<DWI>
! 			      (sign_extend:<DWI>
! 				 (match_operand:SWI 1 "nonimmediate_operand"))
! 			      (match_dup 4))
! 			   (sign_extend:<DWI>
! 			      (minus:SWI (match_dup 1)
! 					 (match_operand:SWI 2
! 					    "<general_operand>")))))
! 	      (set (match_operand:SWI 0 "register_operand")
! 		   (minus:SWI (match_dup 1) (match_dup 2)))])
     (set (pc) (if_then_else
  	       (eq (reg:CCO FLAGS_REG) (const_int 0))
  	       (label_ref (match_operand 3))
--- 6358,6374 ----
  ;; Subtract with jump on overflow.
  (define_expand "subv<mode>4"
    [(parallel [(set (reg:CCO FLAGS_REG)
! 		   (eq:CCO
! 		     (minus:<DPWI>
! 		       (sign_extend:<DPWI>
! 			 (match_operand:SWIDWI 1 "nonimmediate_operand"))
! 		       (match_dup 4))
! 		     (sign_extend:<DPWI>
! 		       (minus:SWIDWI (match_dup 1)
! 				     (match_operand:SWIDWI 2
! 						"<general_hilo_operand>")))))
! 	      (set (match_operand:SWIDWI 0 "register_operand")
! 		   (minus:SWIDWI (match_dup 1) (match_dup 2)))])
     (set (pc) (if_then_else
  	       (eq (reg:CCO FLAGS_REG) (const_int 0))
  	       (label_ref (match_operand 3))
***************
*** 6406,6415 ****
    ""
  {
    ix86_fixup_binary_operands_no_copy (MINUS, <MODE>mode, operands);
!   if (CONST_INT_P (operands[2]))
      operands[4] = operands[2];
    else
!     operands[4] = gen_rtx_SIGN_EXTEND (<DWI>mode, operands[2]);
  })
  
  (define_insn "*subv<mode>4"
--- 6376,6385 ----
    ""
  {
    ix86_fixup_binary_operands_no_copy (MINUS, <MODE>mode, operands);
!   if (CONST_SCALAR_INT_P (operands[2]))
      operands[4] = operands[2];
    else
!     operands[4] = gen_rtx_SIGN_EXTEND (<DPWI>mode, operands[2]);
  })
  
  (define_insn "*subv<mode>4"
***************
*** 6418,6425 ****
  		   (sign_extend:<DWI>
  		      (match_operand:SWI 1 "nonimmediate_operand" "0,0"))
  		   (sign_extend:<DWI>
! 		      (match_operand:SWI 2 "<general_sext_operand>"
! 					   "<r>We,<r>m")))
  		(sign_extend:<DWI>
  		   (minus:SWI (match_dup 1) (match_dup 2)))))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
--- 6388,6394 ----
  		   (sign_extend:<DWI>
  		      (match_operand:SWI 1 "nonimmediate_operand" "0,0"))
  		   (sign_extend:<DWI>
! 		      (match_operand:SWI 2 "<general_sext_operand>" "<r>We,m")))
  		(sign_extend:<DWI>
  		   (minus:SWI (match_dup 1) (match_dup 2)))))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
***************
*** 6429,6444 ****
    [(set_attr "type" "alu")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*subv<mode>4_1"
    [(set (reg:CCO FLAGS_REG)
  	(eq:CCO (minus:<DWI>
  		   (sign_extend:<DWI>
  		      (match_operand:SWI 1 "nonimmediate_operand" "0"))
  		   (match_operand:<DWI> 3 "const_int_operand" "i"))
  		(sign_extend:<DWI>
! 		   (minus:SWI (match_dup 1)
! 			      (match_operand:SWI 2 "x86_64_immediate_operand"
! 						   "<i>")))))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
  	(minus:SWI (match_dup 1) (match_dup 2)))]
    "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
--- 6398,6413 ----
    [(set_attr "type" "alu")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "subv<mode>4_1"
    [(set (reg:CCO FLAGS_REG)
  	(eq:CCO (minus:<DWI>
  		   (sign_extend:<DWI>
  		      (match_operand:SWI 1 "nonimmediate_operand" "0"))
  		   (match_operand:<DWI> 3 "const_int_operand" "i"))
  		(sign_extend:<DWI>
! 		   (minus:SWI
! 		     (match_dup 1)
! 		     (match_operand:SWI 2 "x86_64_immediate_operand" "<i>")))))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
  	(minus:SWI (match_dup 1) (match_dup 2)))]
    "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
***************
*** 6454,6459 ****
--- 6423,6584 ----
  		  (const_string "4")]
  	      (const_string "<MODE_SIZE>")))])
  
+ (define_insn_and_split "*subv<dwi>4_doubleword"
+   [(set (reg:CCO FLAGS_REG)
+ 	(eq:CCO
+ 	  (minus:<QPWI>
+ 	    (sign_extend:<QPWI>
+ 	      (match_operand:<DWI> 1 "nonimmediate_operand" "0,0"))
+ 	    (sign_extend:<QPWI>
+ 	      (match_operand:<DWI> 2 "nonimmediate_operand" "r,o")))
+ 	  (sign_extend:<QPWI>
+ 	    (minus:<DWI> (match_dup 1) (match_dup 2)))))
+    (set (match_operand:<DWI> 0 "nonimmediate_operand" "=ro,r")
+ 	(minus:<DWI> (match_dup 1) (match_dup 2)))]
+   "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
+   "#"
+   "reload_completed"
+   [(parallel [(set (reg:CC FLAGS_REG)
+ 		   (compare:CC (match_dup 1) (match_dup 2)))
+ 	      (set (match_dup 0)
+ 		   (minus:DWIH (match_dup 1) (match_dup 2)))])
+    (parallel [(set (reg:CCO FLAGS_REG)
+ 		   (eq:CCO
+ 		     (minus:<DWI>
+ 		       (minus:<DWI>
+ 			 (sign_extend:<DWI> (match_dup 4))
+ 			 (ltu:<DWI> (reg:CC FLAGS_REG) (const_int 0)))
+ 		       (sign_extend:<DWI> (match_dup 5)))
+ 		     (sign_extend:<DWI>
+ 		       (minus:DWIH
+ 			 (minus:DWIH
+ 			   (match_dup 4)
+ 			   (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0)))
+ 			 (match_dup 5)))))
+ 	      (set (match_dup 3)
+ 		   (minus:DWIH
+ 		     (minus:DWIH
+ 		       (match_dup 4)
+ 		       (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0)))
+ 		     (match_dup 5)))])]
+ {
+   split_double_mode (<DWI>mode, &operands[0], 3, &operands[0], &operands[3]);
+ })
+ 
+ (define_insn_and_split "*subv<dwi>4_doubleword_1"
+   [(set (reg:CCO FLAGS_REG)
+ 	(eq:CCO
+ 	  (minus:<QPWI>
+ 	    (sign_extend:<QPWI>
+ 	      (match_operand:<DWI> 1 "nonimmediate_operand" "0"))
+ 	    (match_operand:<QPWI> 3 "const_scalar_int_operand" ""))
+ 	  (sign_extend:<QPWI>
+ 	    (minus:<DWI>
+ 	      (match_dup 1)
+ 	      (match_operand:<DWI> 2 "x86_64_hilo_general_operand" "<di>")))))
+    (set (match_operand:<DWI> 0 "nonimmediate_operand" "=ro")
+ 	(minus:<DWI> (match_dup 1) (match_dup 2)))]
+   "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
+    && CONST_SCALAR_INT_P (operands[2])
+    && rtx_equal_p (operands[2], operands[3])"
+   "#"
+   "reload_completed"
+   [(parallel [(set (reg:CC FLAGS_REG)
+ 		   (compare:CC (match_dup 1) (match_dup 2)))
+ 	      (set (match_dup 0)
+ 		   (minus:DWIH (match_dup 1) (match_dup 2)))])
+    (parallel [(set (reg:CCO FLAGS_REG)
+ 		   (eq:CCO
+ 		     (minus:<DWI>
+ 		       (minus:<DWI>
+ 			 (sign_extend:<DWI> (match_dup 4))
+ 			 (ltu:<DWI> (reg:CC FLAGS_REG) (const_int 0)))
+ 		       (match_dup 5))
+ 		     (sign_extend:<DWI>
+ 		       (minus:DWIH
+ 			 (minus:DWIH
+ 			   (match_dup 4)
+ 			   (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0)))
+ 			 (match_dup 5)))))
+ 	      (set (match_dup 3)
+ 		   (minus:DWIH
+ 		     (minus:DWIH
+ 		       (match_dup 4)
+ 		       (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0)))
+ 		     (match_dup 5)))])]
+ {
+   split_double_mode (<DWI>mode, &operands[0], 3, &operands[0], &operands[3]);
+   if (operands[2] == const0_rtx)
+     {
+       emit_insn (gen_subv<mode>4_1 (operands[3], operands[4], operands[5],
+ 				    operands[5]));
+       DONE;
+     }
+ })
+ 
+ (define_insn "*subv<mode>4_overflow_1"
+   [(set (reg:CCO FLAGS_REG)
+ 	(eq:CCO
+ 	  (minus:<DWI>
+ 	    (minus:<DWI>
+ 	      (sign_extend:<DWI>
+ 		(match_operand:SWI 1 "nonimmediate_operand" "%0,0"))
+ 	      (match_operator:<DWI> 4 "ix86_carry_flag_operator"
+ 		[(match_operand 3 "flags_reg_operand") (const_int 0)]))
+ 	    (sign_extend:<DWI>
+ 	      (match_operand:SWI 2 "<general_sext_operand>" "rWe,m")))
+ 	  (sign_extend:<DWI>
+ 	    (minus:SWI
+ 	      (minus:SWI
+ 		(match_dup 1)
+ 		(match_operator:SWI 5 "ix86_carry_flag_operator"
+ 		  [(match_dup 3) (const_int 0)]))
+ 	      (match_dup 2)))))
+    (set (match_operand:SWI 0 "nonimmediate_operand" "=rm,r")
+ 	(minus:SWI
+ 	  (minus:SWI
+ 	    (match_dup 1)
+ 	    (match_op_dup 5 [(match_dup 3) (const_int 0)]))
+ 	  (match_dup 2)))]
+   "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
+   "sbb{<imodesuffix>}\t{%2, %0|%0, %2}"
+   [(set_attr "type" "alu")
+    (set_attr "mode" "<MODE>")])
+ 
+ (define_insn "*subv<mode>4_overflow_2"
+   [(set (reg:CCO FLAGS_REG)
+ 	(eq:CCO
+ 	  (minus:<DWI>
+ 	    (minus:<DWI>
+ 	      (sign_extend:<DWI>
+ 		(match_operand:SWI 1 "nonimmediate_operand" "%0"))
+ 	      (match_operator:<DWI> 4 "ix86_carry_flag_operator"
+ 		[(match_operand 3 "flags_reg_operand") (const_int 0)]))
+ 	    (match_operand:<DWI> 6 "const_int_operand" ""))
+ 	  (sign_extend:<DWI>
+ 	    (minus:SWI
+ 	      (minus:SWI
+ 		(match_dup 1)
+ 		(match_operator:SWI 5 "ix86_carry_flag_operator"
+ 		  [(match_dup 3) (const_int 0)]))
+ 	      (match_operand:SWI 2 "x86_64_immediate_operand" "e")))))
+    (set (match_operand:SWI 0 "nonimmediate_operand" "=rm")
+ 	(minus:SWI
+ 	  (minus:SWI
+ 	    (match_dup 1)
+ 	    (match_op_dup 5 [(match_dup 3) (const_int 0)]))
+ 	  (match_dup 2)))]
+   "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
+    && CONST_INT_P (operands[2])
+    && INTVAL (operands[2]) == INTVAL (operands[6])"
+   "sbb{<imodesuffix>}\t{%2, %0|%0, %2}"
+   [(set_attr "type" "alu")
+    (set_attr "mode" "<MODE>")
+    (set (attr "length_immediate")
+      (if_then_else (match_test "IN_RANGE (INTVAL (operands[2]), -128, 127)")
+        (const_string "1")
+        (const_string "4")))])
+ 
  (define_expand "usubv<mode>4"
    [(parallel [(set (reg:CC FLAGS_REG)
  		   (compare:CC
***************
*** 6471,6477 ****
  (define_insn "*sub<mode>_3"
    [(set (reg FLAGS_REG)
  	(compare (match_operand:SWI 1 "nonimmediate_operand" "0,0")
! 		 (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m")))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(minus:SWI (match_dup 1) (match_dup 2)))]
    "ix86_match_ccmode (insn, CCmode)
--- 6596,6602 ----
  (define_insn "*sub<mode>_3"
    [(set (reg FLAGS_REG)
  	(compare (match_operand:SWI 1 "nonimmediate_operand" "0,0")
! 		 (match_operand:SWI 2 "<general_operand>" "<r><i>,m")))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(minus:SWI (match_dup 1) (match_dup 2)))]
    "ix86_match_ccmode (insn, CCmode)
***************
*** 6491,6496 ****
--- 6616,6651 ----
    [(set (reg:CC FLAGS_REG)
  	(compare:CC (match_dup 0) (match_dup 1)))])
  
+ ;; decl %eax; cmpl $-1, %eax; jne .Lxx; can be optimized into
+ ;; subl $1, %eax; jnc .Lxx;
+ (define_peephole2
+   [(parallel
+      [(set (match_operand:SWI 0 "general_reg_operand")
+ 	   (plus:SWI (match_dup 0) (const_int -1)))
+       (clobber (reg FLAGS_REG))])
+    (set (reg:CCZ FLAGS_REG)
+ 	(compare:CCZ (match_dup 0) (const_int -1)))
+    (set (pc)
+ 	(if_then_else (match_operator 1 "bt_comparison_operator"
+ 			[(reg:CCZ FLAGS_REG) (const_int 0)])
+ 		      (match_operand 2)
+ 		      (pc)))]
+    "peep2_regno_dead_p (3, FLAGS_REG)"
+    [(parallel
+       [(set (reg:CC FLAGS_REG)
+ 	    (compare:CC (match_dup 0) (const_int 1)))
+        (set (match_dup 0)
+ 	    (minus:SWI (match_dup 0) (const_int 1)))])
+     (set (pc)
+ 	 (if_then_else (match_dup 3)
+ 		       (match_dup 2)
+ 		       (pc)))]
+ {
+   rtx cc = gen_rtx_REG (CCmode, FLAGS_REG);
+   operands[3] = gen_rtx_fmt_ee (GET_CODE (operands[1]) == NE
+ 				? GEU : LTU, VOIDmode, cc, const0_rtx);
+ })
+ 
  (define_insn "*subsi_3_zext"
    [(set (reg FLAGS_REG)
  	(compare (match_operand:SI 1 "register_operand" "0")
***************
*** 6507,6520 ****
  
  ;; Add with carry and subtract with borrow
  
! (define_insn "add<mode>3_carry"
    [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(plus:SWI
  	  (plus:SWI
  	    (match_operator:SWI 4 "ix86_carry_flag_operator"
  	     [(match_operand 3 "flags_reg_operand") (const_int 0)])
  	    (match_operand:SWI 1 "nonimmediate_operand" "%0,0"))
! 	  (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
    "adc{<imodesuffix>}\t{%2, %0|%0, %2}"
--- 6662,6675 ----
  
  ;; Add with carry and subtract with borrow
  
! (define_insn "@add<mode>3_carry"
    [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(plus:SWI
  	  (plus:SWI
  	    (match_operator:SWI 4 "ix86_carry_flag_operator"
  	     [(match_operand 3 "flags_reg_operand") (const_int 0)])
  	    (match_operand:SWI 1 "nonimmediate_operand" "%0,0"))
! 	  (match_operand:SWI 2 "<general_operand>" "<r><i>,m")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
    "adc{<imodesuffix>}\t{%2, %0|%0, %2}"
***************
*** 6577,6589 ****
  	      (plus:SWI48
  		(match_operator:SWI48 5 "ix86_carry_flag_operator"
  		  [(match_operand 3 "flags_reg_operand") (const_int 0)])
! 		(match_operand:SWI48 1 "nonimmediate_operand" "%0"))
! 	      (match_operand:SWI48 2 "nonimmediate_operand" "rm")))
  	  (plus:<DWI>
  	    (zero_extend:<DWI> (match_dup 2))
  	    (match_operator:<DWI> 4 "ix86_carry_flag_operator"
  	      [(match_dup 3) (const_int 0)]))))
!    (set (match_operand:SWI48 0 "register_operand" "=r")
  	(plus:SWI48 (plus:SWI48 (match_op_dup 5
  				 [(match_dup 3) (const_int 0)])
  				(match_dup 1))
--- 6732,6744 ----
  	      (plus:SWI48
  		(match_operator:SWI48 5 "ix86_carry_flag_operator"
  		  [(match_operand 3 "flags_reg_operand") (const_int 0)])
! 		(match_operand:SWI48 1 "nonimmediate_operand" "%0,0"))
! 	      (match_operand:SWI48 2 "nonimmediate_operand" "r,rm")))
  	  (plus:<DWI>
  	    (zero_extend:<DWI> (match_dup 2))
  	    (match_operator:<DWI> 4 "ix86_carry_flag_operator"
  	      [(match_dup 3) (const_int 0)]))))
!    (set (match_operand:SWI48 0 "nonimmediate_operand" "=rm,r")
  	(plus:SWI48 (plus:SWI48 (match_op_dup 5
  				 [(match_dup 3) (const_int 0)])
  				(match_dup 1))
***************
*** 6603,6620 ****
  	       (match_operand:SWI48 1 "nonimmediate_operand")
  	       (match_operand:SWI48 2 "x86_64_general_operand"))
  	     (match_dup 1)))
!       (set (match_operand:SWI48 0 "register_operand")
  	   (plus:SWI48 (match_dup 1) (match_dup 2)))])]
    "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)")
  
! (define_insn "sub<mode>3_carry"
    [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(minus:SWI
  	  (minus:SWI
  	    (match_operand:SWI 1 "nonimmediate_operand" "0,0")
  	    (match_operator:SWI 4 "ix86_carry_flag_operator"
  	     [(match_operand 3 "flags_reg_operand") (const_int 0)]))
! 	  (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
    "sbb{<imodesuffix>}\t{%2, %0|%0, %2}"
--- 6758,6817 ----
  	       (match_operand:SWI48 1 "nonimmediate_operand")
  	       (match_operand:SWI48 2 "x86_64_general_operand"))
  	     (match_dup 1)))
!       (set (match_operand:SWI48 0 "nonimmediate_operand")
  	   (plus:SWI48 (match_dup 1) (match_dup 2)))])]
    "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)")
  
! (define_insn "*addcarry<mode>_1"
!   [(set (reg:CCC FLAGS_REG)
! 	(compare:CCC
! 	  (zero_extend:<DWI>
! 	    (plus:SWI48
! 	      (plus:SWI48
! 		(match_operator:SWI48 5 "ix86_carry_flag_operator"
! 		  [(match_operand 3 "flags_reg_operand") (const_int 0)])
! 		(match_operand:SWI48 1 "nonimmediate_operand" "%0"))
! 	      (match_operand:SWI48 2 "x86_64_immediate_operand" "e")))
! 	  (plus:<DWI>
! 	    (match_operand:<DWI> 6 "const_scalar_int_operand" "")
! 	    (match_operator:<DWI> 4 "ix86_carry_flag_operator"
! 	      [(match_dup 3) (const_int 0)]))))
!    (set (match_operand:SWI48 0 "nonimmediate_operand" "=rm")
! 	(plus:SWI48 (plus:SWI48 (match_op_dup 5
! 				 [(match_dup 3) (const_int 0)])
! 				(match_dup 1))
! 		    (match_dup 2)))]
!   "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)
!    && CONST_INT_P (operands[2])
!    /* Check that operands[6] is operands[2] zero extended from
!       <MODE>mode to <DWI>mode.  */
!    && ((<MODE>mode == SImode || INTVAL (operands[2]) >= 0)
!        ? (CONST_INT_P (operands[6])
! 	  && UINTVAL (operands[6]) == (UINTVAL (operands[2])
! 				       & GET_MODE_MASK (<MODE>mode)))
!        : (CONST_WIDE_INT_P (operands[6])
! 	  && CONST_WIDE_INT_NUNITS (operands[6]) == 2
! 	  && ((unsigned HOST_WIDE_INT) CONST_WIDE_INT_ELT (operands[6], 0)
! 	      == UINTVAL (operands[2]))
! 	  && CONST_WIDE_INT_ELT (operands[6], 1) == 0))"
!   "adc{<imodesuffix>}\t{%2, %0|%0, %2}"
!   [(set_attr "type" "alu")
!    (set_attr "use_carry" "1")
!    (set_attr "pent_pair" "pu")
!    (set_attr "mode" "<MODE>")
!    (set (attr "length_immediate")
!      (if_then_else (match_test "IN_RANGE (INTVAL (operands[2]), -128, 127)")
!        (const_string "1")
!        (const_string "4")))])
! 
! (define_insn "@sub<mode>3_carry"
    [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(minus:SWI
  	  (minus:SWI
  	    (match_operand:SWI 1 "nonimmediate_operand" "0,0")
  	    (match_operator:SWI 4 "ix86_carry_flag_operator"
  	     [(match_operand 3 "flags_reg_operand") (const_int 0)]))
! 	  (match_operand:SWI 2 "<general_operand>" "<r><i>,m")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
    "sbb{<imodesuffix>}\t{%2, %0|%0, %2}"
***************
*** 6669,6675 ****
     (set_attr "pent_pair" "pu")
     (set_attr "mode" "SI")])
  
! (define_insn "sub<mode>3_carry_ccc"
    [(set (reg:CCC FLAGS_REG)
  	(compare:CCC
  	  (zero_extend:<DWI> (match_operand:DWIH 1 "register_operand" "0"))
--- 6866,6872 ----
     (set_attr "pent_pair" "pu")
     (set_attr "mode" "SI")])
  
! (define_insn "@sub<mode>3_carry_ccc"
    [(set (reg:CCC FLAGS_REG)
  	(compare:CCC
  	  (zero_extend:<DWI> (match_operand:DWIH 1 "register_operand" "0"))
***************
*** 6703,6709 ****
  ;; (compare (match_dup 1) (plus:DWIH (ltu:DWIH ...) (match_dup 2)))
  ;; result, the overflow flag likewise, but the overflow flag is also
  ;; set if the (plus:DWIH (ltu:DWIH ...) (match_dup 2)) overflows.
! (define_insn "sub<mode>3_carry_ccgz"
    [(set (reg:CCGZ FLAGS_REG)
  	(unspec:CCGZ [(match_operand:DWIH 1 "register_operand" "0")
  		      (match_operand:DWIH 2 "x86_64_general_operand" "rme")
--- 6900,6906 ----
  ;; (compare (match_dup 1) (plus:DWIH (ltu:DWIH ...) (match_dup 2)))
  ;; result, the overflow flag likewise, but the overflow flag is also
  ;; set if the (plus:DWIH (ltu:DWIH ...) (match_dup 2)) overflows.
! (define_insn "@sub<mode>3_carry_ccgz"
    [(set (reg:CCGZ FLAGS_REG)
  	(unspec:CCGZ [(match_operand:DWIH 1 "register_operand" "0")
  		      (match_operand:DWIH 2 "x86_64_general_operand" "rme")
***************
*** 6779,6785 ****
  	(compare:CCC
  	    (plus:SWI
  		(match_operand:SWI 1 "nonimmediate_operand" "%0,0")
! 		(match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))
  	    (match_dup 1)))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(plus:SWI (match_dup 1) (match_dup 2)))]
--- 6976,6982 ----
  	(compare:CCC
  	    (plus:SWI
  		(match_operand:SWI 1 "nonimmediate_operand" "%0,0")
! 		(match_operand:SWI 2 "<general_operand>" "<r><i>,m"))
  	    (match_dup 1)))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(plus:SWI (match_dup 1) (match_dup 2)))]
***************
*** 6820,6826 ****
  	(compare:CCC
  	    (plus:SWI
  		(match_operand:SWI 1 "nonimmediate_operand" "%0,0")
! 		(match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))
  	    (match_dup 2)))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(plus:SWI (match_dup 1) (match_dup 2)))]
--- 7017,7023 ----
  	(compare:CCC
  	    (plus:SWI
  		(match_operand:SWI 1 "nonimmediate_operand" "%0,0")
! 		(match_operand:SWI 2 "<general_operand>" "<r><i>,m"))
  	    (match_dup 2)))
     (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(plus:SWI (match_dup 1) (match_dup 2)))]
***************
*** 6843,6848 ****
--- 7040,7315 ----
    [(set_attr "type" "alu")
     (set_attr "mode" "SI")])
  
+ (define_insn_and_split "*add<dwi>3_doubleword_cc_overflow_1"
+   [(set (reg:CCC FLAGS_REG)
+ 	(compare:CCC
+ 	  (plus:<DWI>
+ 	    (match_operand:<DWI> 1 "nonimmediate_operand" "%0,0")
+ 	    (match_operand:<DWI> 2 "x86_64_hilo_general_operand" "r<di>,o"))
+ 	  (match_dup 1)))
+    (set (match_operand:<DWI> 0 "nonimmediate_operand" "=ro,r")
+ 	(plus:<DWI> (match_dup 1) (match_dup 2)))]
+   "ix86_binary_operator_ok (PLUS, <DWI>mode, operands)"
+   "#"
+   "reload_completed"
+   [(parallel [(set (reg:CCC FLAGS_REG)
+ 		   (compare:CCC
+ 		     (plus:DWIH (match_dup 1) (match_dup 2))
+ 		     (match_dup 1)))
+ 	      (set (match_dup 0)
+ 		   (plus:DWIH (match_dup 1) (match_dup 2)))])
+    (parallel [(set (reg:CCC FLAGS_REG)
+ 		   (compare:CCC
+ 		     (zero_extend:<DWI>
+ 		       (plus:DWIH
+ 			 (plus:DWIH
+ 			   (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0))
+ 			   (match_dup 4))
+ 			 (match_dup 5)))
+ 		     (plus:<DWI>
+ 		       (match_dup 6)
+ 		       (ltu:<DWI> (reg:CC FLAGS_REG) (const_int 0)))))
+ 	      (set (match_dup 3)
+ 		   (plus:DWIH
+ 		     (plus:DWIH (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0))
+ 				(match_dup 4))
+ 		     (match_dup 5)))])]
+ {
+   split_double_mode (<DWI>mode, &operands[0], 3, &operands[0], &operands[3]);
+   if (operands[2] == const0_rtx)
+     {
+       emit_insn (gen_addcarry<mode>_0 (operands[3], operands[4], operands[5]));
+       DONE;
+     }
+   if (CONST_INT_P (operands[5]))
+     operands[6] = simplify_unary_operation (ZERO_EXTEND, <DWI>mode,
+ 					    operands[5], <MODE>mode);
+   else
+     operands[6] = gen_rtx_ZERO_EXTEND (<DWI>mode, operands[5]);
+ })
+ 
+ ;; x == 0 with zero flag test can be done also as x < 1U with carry flag
+ ;; test, where the latter is preferrable if we have some carry consuming
+ ;; instruction.
+ ;; For x != 0, we need to use x < 1U with negation of carry, i.e.
+ ;; + (1 - CF).
+ (define_insn_and_split "*add<mode>3_eq"
+   [(set (match_operand:SWI 0 "nonimmediate_operand")
+ 	(plus:SWI
+ 	  (plus:SWI
+ 	    (eq:SWI (match_operand 3 "int_nonimmediate_operand") (const_int 0))
+ 	    (match_operand:SWI 1 "nonimmediate_operand"))
+ 	  (match_operand:SWI 2 "<general_operand>")))
+    (clobber (reg:CC FLAGS_REG))]
+   "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (reg:CC FLAGS_REG)
+ 	(compare:CC (match_dup 3) (const_int 1)))
+    (parallel [(set (match_dup 0)
+ 		   (plus:SWI
+ 		     (plus:SWI (ltu:SWI (reg:CC FLAGS_REG) (const_int 0))
+ 			       (match_dup 1))
+ 		     (match_dup 2)))
+ 	      (clobber (reg:CC FLAGS_REG))])])
+ 
+ (define_insn_and_split "*add<mode>3_ne"
+   [(set (match_operand:SWI 0 "nonimmediate_operand")
+ 	(plus:SWI
+ 	  (plus:SWI
+ 	    (ne:SWI (match_operand 3 "int_nonimmediate_operand") (const_int 0))
+ 	    (match_operand:SWI 1 "nonimmediate_operand"))
+ 	  (match_operand:SWI 2 "<immediate_operand>")))
+    (clobber (reg:CC FLAGS_REG))]
+   "CONST_INT_P (operands[2])
+    && (<MODE>mode != DImode
+        || INTVAL (operands[2]) != HOST_WIDE_INT_C (-0x80000000))
+    && ix86_binary_operator_ok (PLUS, <MODE>mode, operands)
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (reg:CC FLAGS_REG)
+ 	(compare:CC (match_dup 3) (const_int 1)))
+    (parallel [(set (match_dup 0)
+ 		   (minus:SWI
+ 		     (minus:SWI (match_dup 1)
+ 				(ltu:SWI (reg:CC FLAGS_REG) (const_int 0)))
+ 		     (match_dup 2)))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+ {
+   operands[2] = gen_int_mode (~INTVAL (operands[2]),
+ 			      <MODE>mode == DImode ? SImode : <MODE>mode);
+ })
+ 
+ (define_insn_and_split "*add<mode>3_eq_0"
+   [(set (match_operand:SWI 0 "nonimmediate_operand")
+ 	(plus:SWI
+ 	  (eq:SWI (match_operand 2 "int_nonimmediate_operand") (const_int 0))
+ 	  (match_operand:SWI 1 "<general_operand>")))
+    (clobber (reg:CC FLAGS_REG))]
+   "ix86_unary_operator_ok (PLUS, <MODE>mode, operands)
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (reg:CC FLAGS_REG)
+ 	(compare:CC (match_dup 2) (const_int 1)))
+    (parallel [(set (match_dup 0)
+ 		   (plus:SWI (ltu:SWI (reg:CC FLAGS_REG) (const_int 0))
+ 			     (match_dup 1)))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+ {
+   if (!nonimmediate_operand (operands[1], <MODE>mode))
+     operands[1] = force_reg (<MODE>mode, operands[1]);
+ })
+ 
+ (define_insn_and_split "*add<mode>3_ne_0"
+   [(set (match_operand:SWI 0 "nonimmediate_operand")
+ 	(plus:SWI
+ 	  (ne:SWI (match_operand 2 "int_nonimmediate_operand") (const_int 0))
+ 	  (match_operand:SWI 1 "<general_operand>")))
+    (clobber (reg:CC FLAGS_REG))]
+   "ix86_unary_operator_ok (PLUS, <MODE>mode, operands)
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (reg:CC FLAGS_REG)
+ 	(compare:CC (match_dup 2) (const_int 1)))
+    (parallel [(set (match_dup 0)
+ 		   (minus:SWI (minus:SWI
+ 				(match_dup 1)
+ 				(ltu:SWI (reg:CC FLAGS_REG) (const_int 0)))
+ 			      (const_int -1)))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+ {
+   if (!nonimmediate_operand (operands[1], <MODE>mode))
+     operands[1] = force_reg (<MODE>mode, operands[1]);
+ })
+ 
+ (define_insn_and_split "*sub<mode>3_eq"
+   [(set (match_operand:SWI 0 "nonimmediate_operand")
+ 	(minus:SWI
+ 	  (minus:SWI
+ 	    (match_operand:SWI 1 "nonimmediate_operand")
+ 	    (eq:SWI (match_operand 3 "int_nonimmediate_operand")
+ 		    (const_int 0)))
+ 	  (match_operand:SWI 2 "<general_operand>")))
+    (clobber (reg:CC FLAGS_REG))]
+   "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (reg:CC FLAGS_REG)
+ 	(compare:CC (match_dup 3) (const_int 1)))
+    (parallel [(set (match_dup 0)
+ 		   (minus:SWI
+ 		     (minus:SWI (match_dup 1)
+ 				(ltu:SWI (reg:CC FLAGS_REG) (const_int 0)))
+ 		     (match_dup 2)))
+ 	      (clobber (reg:CC FLAGS_REG))])])
+ 
+ (define_insn_and_split "*sub<mode>3_ne"
+   [(set (match_operand:SWI 0 "nonimmediate_operand")
+ 	(plus:SWI
+ 	  (minus:SWI
+ 	    (match_operand:SWI 1 "nonimmediate_operand")
+ 	    (ne:SWI (match_operand 3 "int_nonimmediate_operand")
+ 		    (const_int 0)))
+ 	  (match_operand:SWI 2 "<immediate_operand>")))
+    (clobber (reg:CC FLAGS_REG))]
+   "CONST_INT_P (operands[2])
+    && (<MODE>mode != DImode
+        || INTVAL (operands[2]) != HOST_WIDE_INT_C (-0x80000000))
+    && ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (reg:CC FLAGS_REG)
+ 	(compare:CC (match_dup 3) (const_int 1)))
+    (parallel [(set (match_dup 0)
+ 		   (plus:SWI
+ 		     (plus:SWI (ltu:SWI (reg:CC FLAGS_REG) (const_int 0))
+ 			       (match_dup 1))
+ 		     (match_dup 2)))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+ {
+   operands[2] = gen_int_mode (INTVAL (operands[2]) - 1,
+ 			      <MODE>mode == DImode ? SImode : <MODE>mode);
+ })
+ 
+ (define_insn_and_split "*sub<mode>3_eq_1"
+   [(set (match_operand:SWI 0 "nonimmediate_operand")
+ 	(plus:SWI
+ 	  (minus:SWI
+ 	    (match_operand:SWI 1 "nonimmediate_operand")
+ 	    (eq:SWI (match_operand 3 "int_nonimmediate_operand")
+ 		    (const_int 0)))
+ 	  (match_operand:SWI 2 "<immediate_operand>")))
+    (clobber (reg:CC FLAGS_REG))]
+   "CONST_INT_P (operands[2])
+    && (<MODE>mode != DImode
+        || INTVAL (operands[2]) != HOST_WIDE_INT_C (-0x80000000))
+    && ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (reg:CC FLAGS_REG)
+ 	(compare:CC (match_dup 3) (const_int 1)))
+    (parallel [(set (match_dup 0)
+ 		   (minus:SWI
+ 		     (minus:SWI (match_dup 1)
+ 				(ltu:SWI (reg:CC FLAGS_REG) (const_int 0)))
+ 		     (match_dup 2)))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+ {
+   operands[2] = gen_int_mode (-INTVAL (operands[2]),
+ 			      <MODE>mode == DImode ? SImode : <MODE>mode);
+ })
+ 
+ (define_insn_and_split "*sub<mode>3_eq_0"
+   [(set (match_operand:SWI 0 "nonimmediate_operand")
+ 	(minus:SWI
+ 	  (match_operand:SWI 1 "<general_operand>")
+ 	  (eq:SWI (match_operand 2 "int_nonimmediate_operand") (const_int 0))))
+    (clobber (reg:CC FLAGS_REG))]
+   "ix86_unary_operator_ok (MINUS, <MODE>mode, operands)
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (reg:CC FLAGS_REG)
+ 	(compare:CC (match_dup 2) (const_int 1)))
+    (parallel [(set (match_dup 0)
+ 		   (minus:SWI (match_dup 1)
+ 			      (ltu:SWI (reg:CC FLAGS_REG) (const_int 0))))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+ {
+   if (!nonimmediate_operand (operands[1], <MODE>mode))
+     operands[1] = force_reg (<MODE>mode, operands[1]);
+ })
+ 
+ (define_insn_and_split "*sub<mode>3_ne_0"
+   [(set (match_operand:SWI 0 "nonimmediate_operand")
+ 	(minus:SWI
+ 	  (match_operand:SWI 1 "<general_operand>")
+ 	  (ne:SWI (match_operand 2 "int_nonimmediate_operand") (const_int 0))))
+    (clobber (reg:CC FLAGS_REG))]
+   "ix86_unary_operator_ok (MINUS, <MODE>mode, operands)
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (reg:CC FLAGS_REG)
+ 	(compare:CC (match_dup 2) (const_int 1)))
+    (parallel [(set (match_dup 0)
+ 		   (plus:SWI (plus:SWI
+ 			       (ltu:SWI (reg:CC FLAGS_REG) (const_int 0))
+ 			       (match_dup 1))
+ 			     (const_int -1)))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+ {
+   if (!nonimmediate_operand (operands[1], <MODE>mode))
+     operands[1] = force_reg (<MODE>mode, operands[1]);
+ })
+ 
  ;; The patterns that match these are at the end of this file.
  
  (define_expand "<plusminus_insn>xf3"
***************
*** 7468,7480 ****
  
  ;; Divmod instructions.
  
! (define_expand "divmod<mode>4"
    [(parallel [(set (match_operand:SWIM248 0 "register_operand")
! 		   (div:SWIM248
  		     (match_operand:SWIM248 1 "register_operand")
  		     (match_operand:SWIM248 2 "nonimmediate_operand")))
  	      (set (match_operand:SWIM248 3 "register_operand")
! 		   (mod:SWIM248 (match_dup 1) (match_dup 2)))
  	      (clobber (reg:CC FLAGS_REG))])])
  
  ;; Split with 8bit unsigned divide:
--- 7935,7950 ----
  
  ;; Divmod instructions.
  
! (define_code_iterator any_div [div udiv])
! (define_code_attr paired_mod [(div "mod") (udiv "umod")])
! 
! (define_expand "<u>divmod<mode>4"
    [(parallel [(set (match_operand:SWIM248 0 "register_operand")
! 		   (any_div:SWIM248
  		     (match_operand:SWIM248 1 "register_operand")
  		     (match_operand:SWIM248 2 "nonimmediate_operand")))
  	      (set (match_operand:SWIM248 3 "register_operand")
! 		   (<paired_mod>:SWIM248 (match_dup 1) (match_dup 2)))
  	      (clobber (reg:CC FLAGS_REG))])])
  
  ;; Split with 8bit unsigned divide:
***************
*** 7484,7530 ****
  ;;	   use original integer divide
  (define_split
    [(set (match_operand:SWI48 0 "register_operand")
! 	(div:SWI48 (match_operand:SWI48 2 "register_operand")
! 		    (match_operand:SWI48 3 "nonimmediate_operand")))
     (set (match_operand:SWI48 1 "register_operand")
! 	(mod:SWI48 (match_dup 2) (match_dup 3)))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_USE_8BIT_IDIV
     && TARGET_QIMODE_MATH
     && can_create_pseudo_p ()
     && !optimize_insn_for_size_p ()"
    [(const_int 0)]
!   "ix86_split_idivmod (<MODE>mode, operands, true); DONE;")
  
  (define_split
    [(set (match_operand:DI 0 "register_operand")
  	(zero_extend:DI
! 	  (div:SI (match_operand:SI 2 "register_operand")
! 		  (match_operand:SI 3 "nonimmediate_operand"))))
     (set (match_operand:SI 1 "register_operand")
! 	(mod:SI (match_dup 2) (match_dup 3)))
     (clobber (reg:CC FLAGS_REG))]
!   "TARGET_USE_8BIT_IDIV
     && TARGET_QIMODE_MATH
     && can_create_pseudo_p ()
     && !optimize_insn_for_size_p ()"
    [(const_int 0)]
!   "ix86_split_idivmod (SImode, operands, true); DONE;")
  
  (define_split
    [(set (match_operand:DI 1 "register_operand")
  	(zero_extend:DI
! 	  (mod:SI (match_operand:SI 2 "register_operand")
! 		  (match_operand:SI 3 "nonimmediate_operand"))))
     (set (match_operand:SI 0 "register_operand")
! 	(div:SI  (match_dup 2) (match_dup 3)))
     (clobber (reg:CC FLAGS_REG))]
!   "TARGET_USE_8BIT_IDIV
     && TARGET_QIMODE_MATH
     && can_create_pseudo_p ()
     && !optimize_insn_for_size_p ()"
    [(const_int 0)]
!   "ix86_split_idivmod (SImode, operands, true); DONE;")
  
  (define_insn_and_split "divmod<mode>4_1"
    [(set (match_operand:SWI48 0 "register_operand" "=a")
--- 7954,8002 ----
  ;;	   use original integer divide
  (define_split
    [(set (match_operand:SWI48 0 "register_operand")
! 	(any_div:SWI48 (match_operand:SWI48 2 "register_operand")
! 		       (match_operand:SWI48 3 "nonimmediate_operand")))
     (set (match_operand:SWI48 1 "register_operand")
! 	(<paired_mod>:SWI48 (match_dup 2) (match_dup 3)))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_USE_8BIT_IDIV
     && TARGET_QIMODE_MATH
     && can_create_pseudo_p ()
     && !optimize_insn_for_size_p ()"
    [(const_int 0)]
!   "ix86_split_idivmod (<MODE>mode, operands, <u_bool>); DONE;")
  
  (define_split
    [(set (match_operand:DI 0 "register_operand")
  	(zero_extend:DI
! 	  (any_div:SI (match_operand:SI 2 "register_operand")
! 		      (match_operand:SI 3 "nonimmediate_operand"))))
     (set (match_operand:SI 1 "register_operand")
! 	(<paired_mod>:SI (match_dup 2) (match_dup 3)))
     (clobber (reg:CC FLAGS_REG))]
!   "TARGET_64BIT
!    && TARGET_USE_8BIT_IDIV
     && TARGET_QIMODE_MATH
     && can_create_pseudo_p ()
     && !optimize_insn_for_size_p ()"
    [(const_int 0)]
!   "ix86_split_idivmod (SImode, operands, <u_bool>); DONE;")
  
  (define_split
    [(set (match_operand:DI 1 "register_operand")
  	(zero_extend:DI
! 	  (<paired_mod>:SI (match_operand:SI 2 "register_operand")
! 			   (match_operand:SI 3 "nonimmediate_operand"))))
     (set (match_operand:SI 0 "register_operand")
! 	(any_div:SI  (match_dup 2) (match_dup 3)))
     (clobber (reg:CC FLAGS_REG))]
!   "TARGET_64BIT
!    && TARGET_USE_8BIT_IDIV
     && TARGET_QIMODE_MATH
     && can_create_pseudo_p ()
     && !optimize_insn_for_size_p ()"
    [(const_int 0)]
!   "ix86_split_idivmod (SImode, operands, <u_bool>); DONE;")
  
  (define_insn_and_split "divmod<mode>4_1"
    [(set (match_operand:SWI48 0 "register_operand" "=a")
***************
*** 7561,7566 ****
--- 8033,8060 ----
    [(set_attr "type" "multi")
     (set_attr "mode" "<MODE>")])
  
+ (define_insn_and_split "udivmod<mode>4_1"
+   [(set (match_operand:SWI48 0 "register_operand" "=a")
+ 	(udiv:SWI48 (match_operand:SWI48 2 "register_operand" "0")
+ 		    (match_operand:SWI48 3 "nonimmediate_operand" "rm")))
+    (set (match_operand:SWI48 1 "register_operand" "=&d")
+ 	(umod:SWI48 (match_dup 2) (match_dup 3)))
+    (unspec [(const_int 0)] UNSPEC_DIV_ALREADY_SPLIT)
+    (clobber (reg:CC FLAGS_REG))]
+   ""
+   "#"
+   "reload_completed"
+   [(set (match_dup 1) (const_int 0))
+    (parallel [(set (match_dup 0)
+ 		   (udiv:SWI48 (match_dup 2) (match_dup 3)))
+ 	      (set (match_dup 1)
+ 		   (umod:SWI48 (match_dup 2) (match_dup 3)))
+ 	      (use (match_dup 1))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+   ""
+   [(set_attr "type" "multi")
+    (set_attr "mode" "<MODE>")])
+ 
  (define_insn_and_split "divmodsi4_zext_1"
    [(set (match_operand:DI 0 "register_operand" "=a")
  	(zero_extend:DI
***************
*** 7572,7578 ****
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
    "#"
!   "reload_completed"
    [(parallel [(set (match_dup 1)
  		   (ashiftrt:SI (match_dup 4) (match_dup 5)))
  	      (clobber (reg:CC FLAGS_REG))])
--- 8066,8072 ----
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
    "#"
!   "&& reload_completed"
    [(parallel [(set (match_dup 1)
  		   (ashiftrt:SI (match_dup 4) (match_dup 5)))
  	      (clobber (reg:CC FLAGS_REG))])
***************
*** 7597,7602 ****
--- 8091,8119 ----
    [(set_attr "type" "multi")
     (set_attr "mode" "SI")])
  
+ (define_insn_and_split "udivmodsi4_zext_1"
+   [(set (match_operand:DI 0 "register_operand" "=a")
+ 	(zero_extend:DI
+ 	  (udiv:SI (match_operand:SI 2 "register_operand" "0")
+ 		   (match_operand:SI 3 "nonimmediate_operand" "rm"))))
+    (set (match_operand:SI 1 "register_operand" "=&d")
+ 	(umod:SI (match_dup 2) (match_dup 3)))
+    (unspec [(const_int 0)] UNSPEC_DIV_ALREADY_SPLIT)
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_64BIT"
+   "#"
+   "&& reload_completed"
+   [(set (match_dup 1) (const_int 0))
+    (parallel [(set (match_dup 0)
+ 		   (zero_extend:DI (udiv:SI (match_dup 2) (match_dup 3))))
+ 	      (set (match_dup 1)
+ 		   (umod:SI (match_dup 2) (match_dup 3)))
+ 	      (use (match_dup 1))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+   ""
+   [(set_attr "type" "multi")
+    (set_attr "mode" "SI")])
+ 
  (define_insn_and_split "divmodsi4_zext_2"
    [(set (match_operand:DI 1 "register_operand" "=&d")
  	(zero_extend:DI
***************
*** 7608,7614 ****
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
    "#"
!   "reload_completed"
    [(parallel [(set (match_dup 6)
  		   (ashiftrt:SI (match_dup 4) (match_dup 5)))
  	      (clobber (reg:CC FLAGS_REG))])
--- 8125,8131 ----
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
    "#"
!   "&& reload_completed"
    [(parallel [(set (match_dup 6)
  		   (ashiftrt:SI (match_dup 4) (match_dup 5)))
  	      (clobber (reg:CC FLAGS_REG))])
***************
*** 7634,7639 ****
--- 8151,8179 ----
    [(set_attr "type" "multi")
     (set_attr "mode" "SI")])
  
+ (define_insn_and_split "udivmodsi4_zext_2"
+   [(set (match_operand:DI 1 "register_operand" "=&d")
+ 	(zero_extend:DI
+ 	  (umod:SI (match_operand:SI 2 "register_operand" "0")
+ 		 (match_operand:SI 3 "nonimmediate_operand" "rm"))))
+    (set (match_operand:SI 0 "register_operand" "=a")
+ 	(udiv:SI (match_dup 2) (match_dup 3)))
+    (unspec [(const_int 0)] UNSPEC_DIV_ALREADY_SPLIT)
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_64BIT"
+   "#"
+   "&& reload_completed"
+   [(set (match_dup 4) (const_int 0))
+    (parallel [(set (match_dup 1)
+ 		   (zero_extend:DI (umod:SI (match_dup 2) (match_dup 3))))
+ 	      (set (match_dup 0)
+ 		   (udiv:SI (match_dup 2) (match_dup 3)))
+ 	      (use (match_dup 4))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+   "operands[4] = gen_lowpart (SImode, operands[1]);"
+   [(set_attr "type" "multi")
+    (set_attr "mode" "SI")])
+ 
  (define_insn_and_split "*divmod<mode>4"
    [(set (match_operand:SWIM248 0 "register_operand" "=a")
  	(div:SWIM248 (match_operand:SWIM248 2 "register_operand" "0")
***************
*** 7669,7674 ****
--- 8209,8260 ----
    [(set_attr "type" "multi")
     (set_attr "mode" "<MODE>")])
  
+ (define_insn_and_split "*udivmod<mode>4"
+   [(set (match_operand:SWIM248 0 "register_operand" "=a")
+ 	(udiv:SWIM248 (match_operand:SWIM248 2 "register_operand" "0")
+ 		      (match_operand:SWIM248 3 "nonimmediate_operand" "rm")))
+    (set (match_operand:SWIM248 1 "register_operand" "=&d")
+ 	(umod:SWIM248 (match_dup 2) (match_dup 3)))
+    (clobber (reg:CC FLAGS_REG))]
+   ""
+   "#"
+   "reload_completed"
+   [(set (match_dup 1) (const_int 0))
+    (parallel [(set (match_dup 0)
+ 		   (udiv:SWIM248 (match_dup 2) (match_dup 3)))
+ 	      (set (match_dup 1)
+ 		   (umod:SWIM248 (match_dup 2) (match_dup 3)))
+ 	      (use (match_dup 1))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+   ""
+   [(set_attr "type" "multi")
+    (set_attr "mode" "<MODE>")])
+ 
+ ;; Optimize division or modulo by constant power of 2, if the constant
+ ;; materializes only after expansion.
+ (define_insn_and_split "*udivmod<mode>4_pow2"
+   [(set (match_operand:SWI48 0 "register_operand" "=r")
+ 	(udiv:SWI48 (match_operand:SWI48 2 "register_operand" "0")
+ 		    (match_operand:SWI48 3 "const_int_operand" "n")))
+    (set (match_operand:SWI48 1 "register_operand" "=r")
+ 	(umod:SWI48 (match_dup 2) (match_dup 3)))
+    (clobber (reg:CC FLAGS_REG))]
+   "IN_RANGE (exact_log2 (UINTVAL (operands[3])), 1, 31)"
+   "#"
+   "&& reload_completed"
+   [(set (match_dup 1) (match_dup 2))
+    (parallel [(set (match_dup 0) (lshiftrt:<MODE> (match_dup 2) (match_dup 4)))
+ 	      (clobber (reg:CC FLAGS_REG))])
+    (parallel [(set (match_dup 1) (and:<MODE> (match_dup 1) (match_dup 5)))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+ {
+   int v = exact_log2 (UINTVAL (operands[3]));
+   operands[4] = GEN_INT (v);
+   operands[5] = GEN_INT ((HOST_WIDE_INT_1U << v) - 1);
+ }
+   [(set_attr "type" "multi")
+    (set_attr "mode" "<MODE>")])
+ 
  (define_insn_and_split "*divmodsi4_zext_1"
    [(set (match_operand:DI 0 "register_operand" "=a")
  	(zero_extend:DI
***************
*** 7679,7685 ****
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
    "#"
!   "reload_completed"
    [(parallel [(set (match_dup 1)
  		   (ashiftrt:SI (match_dup 4) (match_dup 5)))
  	      (clobber (reg:CC FLAGS_REG))])
--- 8265,8271 ----
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
    "#"
!   "&& reload_completed"
    [(parallel [(set (match_dup 1)
  		   (ashiftrt:SI (match_dup 4) (match_dup 5)))
  	      (clobber (reg:CC FLAGS_REG))])
***************
*** 7704,8016 ****
    [(set_attr "type" "multi")
     (set_attr "mode" "SI")])
  
! (define_insn_and_split "*divmodsi4_zext_2"
!   [(set (match_operand:DI 1 "register_operand" "=&d")
! 	(zero_extend:DI
! 	  (mod:SI (match_operand:SI 2 "register_operand" "0")
! 		  (match_operand:SI 3 "nonimmediate_operand" "rm"))))
!    (set (match_operand:SI 0 "register_operand" "=a")
! 	(div:SI (match_dup 2) (match_dup 3)))
!    (clobber (reg:CC FLAGS_REG))]
!   "TARGET_64BIT"
!   "#"
!   "reload_completed"
!   [(parallel [(set (match_dup 6)
! 		   (ashiftrt:SI (match_dup 4) (match_dup 5)))
! 	      (clobber (reg:CC FLAGS_REG))])
!    (parallel [(set (match_dup 1)
! 		   (zero_extend:DI (mod:SI (match_dup 2) (match_dup 3))))
! 	      (set (match_dup 0)
! 		   (div:SI (match_dup 2) (match_dup 3)))
! 	      (use (match_dup 6))
! 	      (clobber (reg:CC FLAGS_REG))])]
! {
!   operands[5] = GEN_INT (GET_MODE_BITSIZE (SImode)-1);
!   operands[6] = gen_lowpart (SImode, operands[1]);
! 
!   if (optimize_function_for_size_p (cfun) || TARGET_USE_CLTD)
!     operands[4] = operands[2];
!   else
!     {
!       /* Avoid use of cltd in favor of a mov+shift.  */
!       emit_move_insn (operands[6], operands[2]);
!       operands[4] = operands[6];
!     }
! }
!   [(set_attr "type" "multi")
!    (set_attr "mode" "SI")])
! 
! (define_insn "*divmod<mode>4_noext"
!   [(set (match_operand:SWIM248 0 "register_operand" "=a")
! 	(div:SWIM248 (match_operand:SWIM248 2 "register_operand" "0")
! 		    (match_operand:SWIM248 3 "nonimmediate_operand" "rm")))
!    (set (match_operand:SWIM248 1 "register_operand" "=d")
! 	(mod:SWIM248 (match_dup 2) (match_dup 3)))
!    (use (match_operand:SWIM248 4 "register_operand" "1"))
!    (clobber (reg:CC FLAGS_REG))]
!   ""
!   "idiv{<imodesuffix>}\t%3"
!   [(set_attr "type" "idiv")
!    (set_attr "mode" "<MODE>")])
! 
! (define_insn "*divmodsi4_noext_zext_1"
    [(set (match_operand:DI 0 "register_operand" "=a")
  	(zero_extend:DI
! 	  (div:SI (match_operand:SI 2 "register_operand" "0")
! 		  (match_operand:SI 3 "nonimmediate_operand" "rm"))))
!    (set (match_operand:SI 1 "register_operand" "=d")
! 	(mod:SI (match_dup 2) (match_dup 3)))
!    (use (match_operand:SI 4 "register_operand" "1"))
!    (clobber (reg:CC FLAGS_REG))]
!   "TARGET_64BIT"
!   "idiv{l}\t%3"
!   [(set_attr "type" "idiv")
!    (set_attr "mode" "SI")])
! 
! (define_insn "*divmodsi4_noext_zext_2"
!   [(set (match_operand:DI 1 "register_operand" "=d")
! 	(zero_extend:DI
! 	  (mod:SI (match_operand:SI 2 "register_operand" "0")
! 		  (match_operand:SI 3 "nonimmediate_operand" "rm"))))
!    (set (match_operand:SI 0 "register_operand" "=a")
! 	(div:SI (match_dup 2) (match_dup 3)))
!    (use (match_operand:SI 4 "register_operand" "1"))
!    (clobber (reg:CC FLAGS_REG))]
!   "TARGET_64BIT"
!   "idiv{l}\t%3"
!   [(set_attr "type" "idiv")
!    (set_attr "mode" "SI")])
! 
! (define_expand "divmodqi4"
!   [(parallel [(set (match_operand:QI 0 "register_operand")
! 		   (div:QI
! 		     (match_operand:QI 1 "register_operand")
! 		     (match_operand:QI 2 "nonimmediate_operand")))
! 	      (set (match_operand:QI 3 "register_operand")
! 		   (mod:QI (match_dup 1) (match_dup 2)))
! 	      (clobber (reg:CC FLAGS_REG))])]
!   "TARGET_QIMODE_MATH"
! {
!   rtx div, mod;
!   rtx tmp0, tmp1;
!   
!   tmp0 = gen_reg_rtx (HImode);
!   tmp1 = gen_reg_rtx (HImode);
! 
!   /* Extend operands[1] to HImode.  Generate 8bit divide.  Result is in AX.  */
!   emit_insn (gen_extendqihi2 (tmp1, operands[1]));
!   emit_insn (gen_divmodhiqi3 (tmp0, tmp1, operands[2]));
! 
!   /* Extract remainder from AH.  */
!   tmp1 = gen_rtx_ZERO_EXTRACT (SImode, tmp0, GEN_INT (8), GEN_INT (8));
!   tmp1 = lowpart_subreg (QImode, tmp1, SImode);
!   rtx_insn *insn = emit_move_insn (operands[3], tmp1);
! 
!   mod = gen_rtx_MOD (QImode, operands[1], operands[2]);
!   set_unique_reg_note (insn, REG_EQUAL, mod);
! 
!   /* Extract quotient from AL.  */
!   insn = emit_move_insn (operands[0], gen_lowpart (QImode, tmp0));
! 
!   div = gen_rtx_DIV (QImode, operands[1], operands[2]);
!   set_unique_reg_note (insn, REG_EQUAL, div);
! 
!   DONE;
! })
! 
! ;; Divide AX by r/m8, with result stored in
! ;; AL <- Quotient
! ;; AH <- Remainder
! ;; Change div/mod to HImode and extend the second argument to HImode
! ;; so that mode of div/mod matches with mode of arguments.  Otherwise
! ;; combine may fail.
! (define_insn "divmodhiqi3"
!   [(set (match_operand:HI 0 "register_operand" "=a")
! 	(ior:HI
! 	  (ashift:HI
! 	    (zero_extend:HI
! 	      (truncate:QI
! 		(mod:HI (match_operand:HI 1 "register_operand" "0")
! 			(sign_extend:HI
! 			  (match_operand:QI 2 "nonimmediate_operand" "qm")))))
! 	    (const_int 8))
! 	  (zero_extend:HI
! 	    (truncate:QI
! 	      (div:HI (match_dup 1) (sign_extend:HI (match_dup 2)))))))
!    (clobber (reg:CC FLAGS_REG))]
!   "TARGET_QIMODE_MATH"
!   "idiv{b}\t%2"
!   [(set_attr "type" "idiv")
!    (set_attr "mode" "QI")])
! 
! (define_expand "udivmod<mode>4"
!   [(parallel [(set (match_operand:SWIM248 0 "register_operand")
! 		   (udiv:SWIM248
! 		     (match_operand:SWIM248 1 "register_operand")
! 		     (match_operand:SWIM248 2 "nonimmediate_operand")))
! 	      (set (match_operand:SWIM248 3 "register_operand")
! 		   (umod:SWIM248 (match_dup 1) (match_dup 2)))
! 	      (clobber (reg:CC FLAGS_REG))])])
! 
! ;; Split with 8bit unsigned divide:
! ;; 	if (dividend an divisor are in [0-255])
! ;;	   use 8bit unsigned integer divide
! ;;	 else
! ;;	   use original integer divide
! (define_split
!   [(set (match_operand:SWI48 0 "register_operand")
! 	(udiv:SWI48 (match_operand:SWI48 2 "register_operand")
! 		    (match_operand:SWI48 3 "nonimmediate_operand")))
!    (set (match_operand:SWI48 1 "register_operand")
! 	(umod:SWI48 (match_dup 2) (match_dup 3)))
!    (clobber (reg:CC FLAGS_REG))]
!   "TARGET_USE_8BIT_IDIV
!    && TARGET_QIMODE_MATH
!    && can_create_pseudo_p ()
!    && !optimize_insn_for_size_p ()"
!   [(const_int 0)]
!   "ix86_split_idivmod (<MODE>mode, operands, false); DONE;")
! 
! (define_split
!   [(set (match_operand:DI 0 "register_operand")
! 	(zero_extend:DI
! 	  (udiv:SI (match_operand:SI 2 "register_operand")
! 		   (match_operand:SI 3 "nonimmediate_operand"))))
!    (set (match_operand:SI 1 "register_operand")
  	(umod:SI (match_dup 2) (match_dup 3)))
     (clobber (reg:CC FLAGS_REG))]
!   "TARGET_64BIT
!    && TARGET_USE_8BIT_IDIV
!    && TARGET_QIMODE_MATH
!    && can_create_pseudo_p ()
!    && !optimize_insn_for_size_p ()"
!   [(const_int 0)]
!   "ix86_split_idivmod (SImode, operands, false); DONE;")
! 
! (define_split
!   [(set (match_operand:DI 1 "register_operand")
! 	(zero_extend:DI
! 	  (umod:SI (match_operand:SI 2 "register_operand")
! 		   (match_operand:SI 3 "nonimmediate_operand"))))
!    (set (match_operand:SI 0 "register_operand")
! 	(udiv:SI (match_dup 2) (match_dup 3)))
!    (clobber (reg:CC FLAGS_REG))]
!   "TARGET_64BIT
!    && TARGET_USE_8BIT_IDIV
!    && TARGET_QIMODE_MATH
!    && can_create_pseudo_p ()
!    && !optimize_insn_for_size_p ()"
!   [(const_int 0)]
!   "ix86_split_idivmod (SImode, operands, false); DONE;")
! 
! (define_insn_and_split "udivmod<mode>4_1"
!   [(set (match_operand:SWI48 0 "register_operand" "=a")
! 	(udiv:SWI48 (match_operand:SWI48 2 "register_operand" "0")
! 		    (match_operand:SWI48 3 "nonimmediate_operand" "rm")))
!    (set (match_operand:SWI48 1 "register_operand" "=&d")
! 	(umod:SWI48 (match_dup 2) (match_dup 3)))
!    (unspec [(const_int 0)] UNSPEC_DIV_ALREADY_SPLIT)
!    (clobber (reg:CC FLAGS_REG))]
!   ""
    "#"
!   "reload_completed"
    [(set (match_dup 1) (const_int 0))
     (parallel [(set (match_dup 0)
! 		   (udiv:SWI48 (match_dup 2) (match_dup 3)))
  	      (set (match_dup 1)
! 		   (umod:SWI48 (match_dup 2) (match_dup 3)))
  	      (use (match_dup 1))
  	      (clobber (reg:CC FLAGS_REG))])]
    ""
    [(set_attr "type" "multi")
!    (set_attr "mode" "<MODE>")])
  
! (define_insn_and_split "udivmodsi4_zext_1"
!   [(set (match_operand:DI 0 "register_operand" "=a")
  	(zero_extend:DI
  	  (udiv:SI (match_operand:SI 2 "register_operand" "0")
! 		   (match_operand:SI 3 "nonimmediate_operand" "rm"))))
!    (set (match_operand:SI 1 "register_operand" "=&d")
  	(umod:SI (match_dup 2) (match_dup 3)))
-    (unspec [(const_int 0)] UNSPEC_DIV_ALREADY_SPLIT)
     (clobber (reg:CC FLAGS_REG))]
!   "TARGET_64BIT"
    "#"
!   "reload_completed"
!   [(set (match_dup 1) (const_int 0))
     (parallel [(set (match_dup 0)
! 		   (zero_extend:DI (udiv:SI (match_dup 2) (match_dup 3))))
! 	      (set (match_dup 1)
! 		   (umod:SI (match_dup 2) (match_dup 3)))
! 	      (use (match_dup 1))
  	      (clobber (reg:CC FLAGS_REG))])]
!   ""
    [(set_attr "type" "multi")
     (set_attr "mode" "SI")])
  
! (define_insn_and_split "udivmodsi4_zext_2"
    [(set (match_operand:DI 1 "register_operand" "=&d")
  	(zero_extend:DI
! 	  (umod:SI (match_operand:SI 2 "register_operand" "0")
! 		 (match_operand:SI 3 "nonimmediate_operand" "rm"))))
     (set (match_operand:SI 0 "register_operand" "=a")
! 	(udiv:SI (match_dup 2) (match_dup 3)))
!    (unspec [(const_int 0)] UNSPEC_DIV_ALREADY_SPLIT)
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
    "#"
!   "reload_completed"
!   [(set (match_dup 4) (const_int 0))
     (parallel [(set (match_dup 1)
! 		   (zero_extend:DI (umod:SI (match_dup 2) (match_dup 3))))
  	      (set (match_dup 0)
! 		   (udiv:SI (match_dup 2) (match_dup 3)))
! 	      (use (match_dup 4))
! 	      (clobber (reg:CC FLAGS_REG))])]
!   "operands[4] = gen_lowpart (SImode, operands[1]);"
!   [(set_attr "type" "multi")
!    (set_attr "mode" "SI")])
! 
! (define_insn_and_split "*udivmod<mode>4"
!   [(set (match_operand:SWIM248 0 "register_operand" "=a")
! 	(udiv:SWIM248 (match_operand:SWIM248 2 "register_operand" "0")
! 		      (match_operand:SWIM248 3 "nonimmediate_operand" "rm")))
!    (set (match_operand:SWIM248 1 "register_operand" "=&d")
! 	(umod:SWIM248 (match_dup 2) (match_dup 3)))
!    (clobber (reg:CC FLAGS_REG))]
!   ""
!   "#"
!   "reload_completed"
!   [(set (match_dup 1) (const_int 0))
!    (parallel [(set (match_dup 0)
! 		   (udiv:SWIM248 (match_dup 2) (match_dup 3)))
! 	      (set (match_dup 1)
! 		   (umod:SWIM248 (match_dup 2) (match_dup 3)))
! 	      (use (match_dup 1))
  	      (clobber (reg:CC FLAGS_REG))])]
!   ""
!   [(set_attr "type" "multi")
!    (set_attr "mode" "<MODE>")])
  
! (define_insn_and_split "*udivmodsi4_zext_1"
!   [(set (match_operand:DI 0 "register_operand" "=a")
! 	(zero_extend:DI
! 	  (udiv:SI (match_operand:SI 2 "register_operand" "0")
! 		   (match_operand:SI 3 "nonimmediate_operand" "rm"))))
!    (set (match_operand:SI 1 "register_operand" "=&d")
! 	(umod:SI (match_dup 2) (match_dup 3)))
!    (clobber (reg:CC FLAGS_REG))]
!   "TARGET_64BIT"
!   "#"
!   "reload_completed"
!   [(set (match_dup 1) (const_int 0))
!    (parallel [(set (match_dup 0)
! 		   (zero_extend:DI (udiv:SI (match_dup 2) (match_dup 3))))
! 	      (set (match_dup 1)
! 		   (umod:SI (match_dup 2) (match_dup 3)))
! 	      (use (match_dup 1))
! 	      (clobber (reg:CC FLAGS_REG))])]
!   ""
    [(set_attr "type" "multi")
     (set_attr "mode" "SI")])
  
--- 8290,8376 ----
    [(set_attr "type" "multi")
     (set_attr "mode" "SI")])
  
! (define_insn_and_split "*udivmodsi4_zext_1"
    [(set (match_operand:DI 0 "register_operand" "=a")
  	(zero_extend:DI
! 	  (udiv:SI (match_operand:SI 2 "register_operand" "0")
! 		   (match_operand:SI 3 "nonimmediate_operand" "rm"))))
!    (set (match_operand:SI 1 "register_operand" "=&d")
  	(umod:SI (match_dup 2) (match_dup 3)))
     (clobber (reg:CC FLAGS_REG))]
!   "TARGET_64BIT"
    "#"
!   "&& reload_completed"
    [(set (match_dup 1) (const_int 0))
     (parallel [(set (match_dup 0)
! 		   (zero_extend:DI (udiv:SI (match_dup 2) (match_dup 3))))
  	      (set (match_dup 1)
! 		   (umod:SI (match_dup 2) (match_dup 3)))
  	      (use (match_dup 1))
  	      (clobber (reg:CC FLAGS_REG))])]
    ""
    [(set_attr "type" "multi")
!    (set_attr "mode" "SI")])
  
! (define_insn_and_split "*udivmodsi4_pow2_zext_1"
!   [(set (match_operand:DI 0 "register_operand" "=r")
  	(zero_extend:DI
  	  (udiv:SI (match_operand:SI 2 "register_operand" "0")
! 		   (match_operand:SI 3 "const_int_operand" "n"))))
!    (set (match_operand:SI 1 "register_operand" "=r")
  	(umod:SI (match_dup 2) (match_dup 3)))
     (clobber (reg:CC FLAGS_REG))]
!   "TARGET_64BIT
!    && exact_log2 (UINTVAL (operands[3])) > 0"
    "#"
!   "&& reload_completed"
!   [(set (match_dup 1) (match_dup 2))
     (parallel [(set (match_dup 0)
! 		   (zero_extend:DI (lshiftrt:SI (match_dup 2) (match_dup 4))))
! 	      (clobber (reg:CC FLAGS_REG))])
!    (parallel [(set (match_dup 1) (and:SI (match_dup 1) (match_dup 5)))
  	      (clobber (reg:CC FLAGS_REG))])]
! {
!   int v = exact_log2 (UINTVAL (operands[3]));
!   operands[4] = GEN_INT (v);
!   operands[5] = GEN_INT ((HOST_WIDE_INT_1U << v) - 1);
! }
    [(set_attr "type" "multi")
     (set_attr "mode" "SI")])
  
! (define_insn_and_split "*divmodsi4_zext_2"
    [(set (match_operand:DI 1 "register_operand" "=&d")
  	(zero_extend:DI
! 	  (mod:SI (match_operand:SI 2 "register_operand" "0")
! 		  (match_operand:SI 3 "nonimmediate_operand" "rm"))))
     (set (match_operand:SI 0 "register_operand" "=a")
! 	(div:SI (match_dup 2) (match_dup 3)))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
    "#"
!   "&& reload_completed"
!   [(parallel [(set (match_dup 6)
! 		   (ashiftrt:SI (match_dup 4) (match_dup 5)))
! 	      (clobber (reg:CC FLAGS_REG))])
     (parallel [(set (match_dup 1)
! 		   (zero_extend:DI (mod:SI (match_dup 2) (match_dup 3))))
  	      (set (match_dup 0)
! 		   (div:SI (match_dup 2) (match_dup 3)))
! 	      (use (match_dup 6))
  	      (clobber (reg:CC FLAGS_REG))])]
! {
!   operands[5] = GEN_INT (GET_MODE_BITSIZE (SImode)-1);
!   operands[6] = gen_lowpart (SImode, operands[1]);
  
!   if (optimize_function_for_size_p (cfun) || TARGET_USE_CLTD)
!     operands[4] = operands[2];
!   else
!     {
!       /* Avoid use of cltd in favor of a mov+shift.  */
!       emit_move_insn (operands[6], operands[2]);
!       operands[4] = operands[6];
!     }
! }
    [(set_attr "type" "multi")
     (set_attr "mode" "SI")])
  
***************
*** 8024,8030 ****
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
    "#"
!   "reload_completed"
    [(set (match_dup 4) (const_int 0))
     (parallel [(set (match_dup 1)
  		   (zero_extend:DI (umod:SI (match_dup 2) (match_dup 3))))
--- 8384,8390 ----
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
    "#"
!   "&& reload_completed"
    [(set (match_dup 4) (const_int 0))
     (parallel [(set (match_dup 1)
  		   (zero_extend:DI (umod:SI (match_dup 2) (match_dup 3))))
***************
*** 8036,8094 ****
    [(set_attr "type" "multi")
     (set_attr "mode" "SI")])
  
- ;; Optimize division or modulo by constant power of 2, if the constant
- ;; materializes only after expansion.
- (define_insn_and_split "*udivmod<mode>4_pow2"
-   [(set (match_operand:SWI48 0 "register_operand" "=r")
- 	(udiv:SWI48 (match_operand:SWI48 2 "register_operand" "0")
- 		    (match_operand:SWI48 3 "const_int_operand" "n")))
-    (set (match_operand:SWI48 1 "register_operand" "=r")
- 	(umod:SWI48 (match_dup 2) (match_dup 3)))
-    (clobber (reg:CC FLAGS_REG))]
-   "IN_RANGE (INTVAL (operands[3]), 2, HOST_WIDE_INT_UC (0x80000000))
-    && (UINTVAL (operands[3]) & (UINTVAL (operands[3]) - 1)) == 0"
-   "#"
-   "&& 1"
-   [(set (match_dup 1) (match_dup 2))
-    (parallel [(set (match_dup 0) (lshiftrt:<MODE> (match_dup 2) (match_dup 4)))
- 	      (clobber (reg:CC FLAGS_REG))])
-    (parallel [(set (match_dup 1) (and:<MODE> (match_dup 1) (match_dup 5)))
- 	      (clobber (reg:CC FLAGS_REG))])]
- {
-   int v = exact_log2 (UINTVAL (operands[3]));
-   operands[4] = GEN_INT (v);
-   operands[5] = GEN_INT ((HOST_WIDE_INT_1U << v) - 1);
- }
-   [(set_attr "type" "multi")
-    (set_attr "mode" "<MODE>")])
- 
- (define_insn_and_split "*udivmodsi4_pow2_zext_1"
-   [(set (match_operand:DI 0 "register_operand" "=r")
- 	(zero_extend:DI
- 	  (udiv:SI (match_operand:SI 2 "register_operand" "0")
- 		   (match_operand:SI 3 "const_int_operand" "n"))))
-    (set (match_operand:SI 1 "register_operand" "=r")
- 	(umod:SI (match_dup 2) (match_dup 3)))
-    (clobber (reg:CC FLAGS_REG))]
-   "TARGET_64BIT
-    && IN_RANGE (INTVAL (operands[3]), 2, HOST_WIDE_INT_UC (0x80000000))
-    && (UINTVAL (operands[3]) & (UINTVAL (operands[3]) - 1)) == 0"
-   "#"
-   "&& 1"
-   [(set (match_dup 1) (match_dup 2))
-    (parallel [(set (match_dup 0)
- 		   (zero_extend:DI (lshiftrt:SI (match_dup 2) (match_dup 4))))
- 	      (clobber (reg:CC FLAGS_REG))])
-    (parallel [(set (match_dup 1) (and:SI (match_dup 1) (match_dup 5)))
- 	      (clobber (reg:CC FLAGS_REG))])]
- {
-   int v = exact_log2 (UINTVAL (operands[3]));
-   operands[4] = GEN_INT (v);
-   operands[5] = GEN_INT ((HOST_WIDE_INT_1U << v) - 1);
- }
-   [(set_attr "type" "multi")
-    (set_attr "mode" "SI")])
- 
  (define_insn_and_split "*udivmodsi4_pow2_zext_2"
    [(set (match_operand:DI 1 "register_operand" "=r")
  	(zero_extend:DI
--- 8396,8401 ----
***************
*** 8098,8107 ****
  	(umod:SI (match_dup 2) (match_dup 3)))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT
!    && IN_RANGE (INTVAL (operands[3]), 2, HOST_WIDE_INT_UC (0x80000000))
!    && (UINTVAL (operands[3]) & (UINTVAL (operands[3]) - 1)) == 0"
    "#"
!   "&& 1"
    [(set (match_dup 1) (match_dup 2))
     (parallel [(set (match_dup 0) (lshiftrt:SI (match_dup 2) (match_dup 4)))
  	      (clobber (reg:CC FLAGS_REG))])
--- 8405,8413 ----
  	(umod:SI (match_dup 2) (match_dup 3)))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT
!    && exact_log2 (UINTVAL (operands[3])) > 0"
    "#"
!   "&& reload_completed"
    [(set (match_dup 1) (match_dup 2))
     (parallel [(set (match_dup 0) (lshiftrt:SI (match_dup 2) (match_dup 4)))
  	      (clobber (reg:CC FLAGS_REG))])
***************
*** 8116,8162 ****
    [(set_attr "type" "multi")
     (set_attr "mode" "SI")])
  
! (define_insn "*udivmod<mode>4_noext"
    [(set (match_operand:SWIM248 0 "register_operand" "=a")
! 	(udiv:SWIM248 (match_operand:SWIM248 2 "register_operand" "0")
! 		      (match_operand:SWIM248 3 "nonimmediate_operand" "rm")))
     (set (match_operand:SWIM248 1 "register_operand" "=d")
! 	(umod:SWIM248 (match_dup 2) (match_dup 3)))
     (use (match_operand:SWIM248 4 "register_operand" "1"))
     (clobber (reg:CC FLAGS_REG))]
    ""
!   "div{<imodesuffix>}\t%3"
    [(set_attr "type" "idiv")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*udivmodsi4_noext_zext_1"
    [(set (match_operand:DI 0 "register_operand" "=a")
  	(zero_extend:DI
! 	  (udiv:SI (match_operand:SI 2 "register_operand" "0")
! 		   (match_operand:SI 3 "nonimmediate_operand" "rm"))))
     (set (match_operand:SI 1 "register_operand" "=d")
! 	(umod:SI (match_dup 2) (match_dup 3)))
     (use (match_operand:SI 4 "register_operand" "1"))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
!   "div{l}\t%3"
    [(set_attr "type" "idiv")
     (set_attr "mode" "SI")])
  
! (define_insn "*udivmodsi4_noext_zext_2"
    [(set (match_operand:DI 1 "register_operand" "=d")
  	(zero_extend:DI
! 	  (umod:SI (match_operand:SI 2 "register_operand" "0")
! 		   (match_operand:SI 3 "nonimmediate_operand" "rm"))))
     (set (match_operand:SI 0 "register_operand" "=a")
! 	(udiv:SI (match_dup 2) (match_dup 3)))
     (use (match_operand:SI 4 "register_operand" "1"))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
!   "div{l}\t%3"
    [(set_attr "type" "idiv")
     (set_attr "mode" "SI")])
  
  (define_expand "udivmodqi4"
    [(parallel [(set (match_operand:QI 0 "register_operand")
  		   (udiv:QI
--- 8422,8506 ----
    [(set_attr "type" "multi")
     (set_attr "mode" "SI")])
  
! (define_insn "*<u>divmod<mode>4_noext"
    [(set (match_operand:SWIM248 0 "register_operand" "=a")
! 	(any_div:SWIM248
! 	  (match_operand:SWIM248 2 "register_operand" "0")
! 	  (match_operand:SWIM248 3 "nonimmediate_operand" "rm")))
     (set (match_operand:SWIM248 1 "register_operand" "=d")
! 	(<paired_mod>:SWIM248 (match_dup 2) (match_dup 3)))
     (use (match_operand:SWIM248 4 "register_operand" "1"))
     (clobber (reg:CC FLAGS_REG))]
    ""
!   "<sgnprefix>div{<imodesuffix>}\t%3"
    [(set_attr "type" "idiv")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*<u>divmodsi4_noext_zext_1"
    [(set (match_operand:DI 0 "register_operand" "=a")
  	(zero_extend:DI
! 	  (any_div:SI (match_operand:SI 2 "register_operand" "0")
! 		      (match_operand:SI 3 "nonimmediate_operand" "rm"))))
     (set (match_operand:SI 1 "register_operand" "=d")
! 	(<paired_mod>:SI (match_dup 2) (match_dup 3)))
     (use (match_operand:SI 4 "register_operand" "1"))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
!   "<sgnprefix>div{l}\t%3"
    [(set_attr "type" "idiv")
     (set_attr "mode" "SI")])
  
! (define_insn "*<u>divmodsi4_noext_zext_2"
    [(set (match_operand:DI 1 "register_operand" "=d")
  	(zero_extend:DI
! 	  (<paired_mod>:SI (match_operand:SI 2 "register_operand" "0")
! 			   (match_operand:SI 3 "nonimmediate_operand" "rm"))))
     (set (match_operand:SI 0 "register_operand" "=a")
! 	(any_div:SI (match_dup 2) (match_dup 3)))
     (use (match_operand:SI 4 "register_operand" "1"))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT"
!   "<sgnprefix>div{l}\t%3"
    [(set_attr "type" "idiv")
     (set_attr "mode" "SI")])
  
+ (define_expand "divmodqi4"
+   [(parallel [(set (match_operand:QI 0 "register_operand")
+ 		   (div:QI
+ 		     (match_operand:QI 1 "register_operand")
+ 		     (match_operand:QI 2 "nonimmediate_operand")))
+ 	      (set (match_operand:QI 3 "register_operand")
+ 		   (mod:QI (match_dup 1) (match_dup 2)))
+ 	      (clobber (reg:CC FLAGS_REG))])]
+   "TARGET_QIMODE_MATH"
+ {
+   rtx div, mod;
+   rtx tmp0, tmp1;
+ 
+   tmp0 = gen_reg_rtx (HImode);
+   tmp1 = gen_reg_rtx (HImode);
+ 
+   /* Extend operands[1] to HImode.  Generate 8bit divide.  Result is in AX.  */
+   emit_insn (gen_extendqihi2 (tmp1, operands[1]));
+   emit_insn (gen_divmodhiqi3 (tmp0, tmp1, operands[2]));
+ 
+   /* Extract remainder from AH.  */
+   tmp1 = gen_rtx_ZERO_EXTRACT (SImode, tmp0, GEN_INT (8), GEN_INT (8));
+   tmp1 = lowpart_subreg (QImode, tmp1, SImode);
+   rtx_insn *insn = emit_move_insn (operands[3], tmp1);
+ 
+   mod = gen_rtx_MOD (QImode, operands[1], operands[2]);
+   set_unique_reg_note (insn, REG_EQUAL, mod);
+ 
+   /* Extract quotient from AL.  */
+   insn = emit_move_insn (operands[0], gen_lowpart (QImode, tmp0));
+ 
+   div = gen_rtx_DIV (QImode, operands[1], operands[2]);
+   set_unique_reg_note (insn, REG_EQUAL, div);
+ 
+   DONE;
+ })
+ 
  (define_expand "udivmodqi4"
    [(parallel [(set (match_operand:QI 0 "register_operand")
  		   (udiv:QI
***************
*** 8169,8175 ****
  {
    rtx div, mod;
    rtx tmp0, tmp1;
!   
    tmp0 = gen_reg_rtx (HImode);
    tmp1 = gen_reg_rtx (HImode);
  
--- 8513,8519 ----
  {
    rtx div, mod;
    rtx tmp0, tmp1;
! 
    tmp0 = gen_reg_rtx (HImode);
    tmp1 = gen_reg_rtx (HImode);
  
***************
*** 8194,8215 ****
    DONE;
  })
  
! (define_insn "udivmodhiqi3"
    [(set (match_operand:HI 0 "register_operand" "=a")
  	(ior:HI
  	  (ashift:HI
  	    (zero_extend:HI
  	      (truncate:QI
  		(mod:HI (match_operand:HI 1 "register_operand" "0")
! 			(zero_extend:HI
  			  (match_operand:QI 2 "nonimmediate_operand" "qm")))))
  	    (const_int 8))
  	  (zero_extend:HI
  	    (truncate:QI
! 	      (div:HI (match_dup 1) (zero_extend:HI (match_dup 2)))))))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_QIMODE_MATH"
!   "div{b}\t%2"
    [(set_attr "type" "idiv")
     (set_attr "mode" "QI")])
  
--- 8538,8565 ----
    DONE;
  })
  
! ;; Divide AX by r/m8, with result stored in
! ;; AL <- Quotient
! ;; AH <- Remainder
! ;; Change div/mod to HImode and extend the second argument to HImode
! ;; so that mode of div/mod matches with mode of arguments.  Otherwise
! ;; combine may fail.
! (define_insn "<u>divmodhiqi3"
    [(set (match_operand:HI 0 "register_operand" "=a")
  	(ior:HI
  	  (ashift:HI
  	    (zero_extend:HI
  	      (truncate:QI
  		(mod:HI (match_operand:HI 1 "register_operand" "0")
! 			(any_extend:HI
  			  (match_operand:QI 2 "nonimmediate_operand" "qm")))))
  	    (const_int 8))
  	  (zero_extend:HI
  	    (truncate:QI
! 	      (div:HI (match_dup 1) (any_extend:HI (match_dup 2)))))))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_QIMODE_MATH"
!   "<sgnprefix>div{b}\t%2"
    [(set_attr "type" "idiv")
     (set_attr "mode" "QI")])
  
***************
*** 8237,8293 ****
  ;; On Pentium, "test imm, reg" is pairable only with eax, ax, and al.
  ;; Note that this excludes ah.
  
! (define_expand "testsi_ccno_1"
    [(set (reg:CCNO FLAGS_REG)
  	(compare:CCNO
! 	  (and:SI (match_operand:SI 0 "nonimmediate_operand")
! 		  (match_operand:SI 1 "x86_64_nonmemory_operand"))
  	  (const_int 0)))])
  
  (define_expand "testqi_ccz_1"
    [(set (reg:CCZ FLAGS_REG)
!         (compare:CCZ (and:QI (match_operand:QI 0 "nonimmediate_operand")
! 			     (match_operand:QI 1 "nonmemory_operand"))
! 		 (const_int 0)))])
! 
! (define_expand "testdi_ccno_1"
!   [(set (reg:CCNO FLAGS_REG)
! 	(compare:CCNO
! 	  (and:DI (match_operand:DI 0 "nonimmediate_operand")
! 		  (match_operand:DI 1 "x86_64_szext_general_operand"))
! 	  (const_int 0)))]
!   "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))")
  
  (define_insn "*testdi_1"
    [(set (reg FLAGS_REG)
  	(compare
! 	 (and:DI
! 	  (match_operand:DI 0 "nonimmediate_operand" "%!*a,r,!*a,r,rm")
! 	  (match_operand:DI 1 "x86_64_szext_general_operand" "Z,Z,e,e,re"))
  	 (const_int 0)))]
!   "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)
!    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
    "@
     test{l}\t{%k1, %k0|%k0, %k1}
-    test{l}\t{%k1, %k0|%k0, %k1}
-    test{q}\t{%1, %0|%0, %1}
-    test{q}\t{%1, %0|%0, %1}
     test{q}\t{%1, %0|%0, %1}"
    [(set_attr "type" "test")
!    (set_attr "modrm" "0,1,0,1,1")
!    (set_attr "mode" "SI,SI,DI,DI,DI")])
  
  (define_insn "*testqi_1_maybe_si"
    [(set (reg FLAGS_REG)
!         (compare
  	  (and:QI
! 	    (match_operand:QI 0 "nonimmediate_operand" "%!*a,q,qm,r")
! 	    (match_operand:QI 1 "general_operand" "n,n,qn,n"))
  	  (const_int 0)))]
!    "!(MEM_P (operands[0]) && MEM_P (operands[1]))
!     && ix86_match_ccmode (insn,
!  			 CONST_INT_P (operands[1])
!  			 && INTVAL (operands[1]) >= 0 ? CCNOmode : CCZmode)"
  {
    if (which_alternative == 3)
      {
--- 8587,8643 ----
  ;; On Pentium, "test imm, reg" is pairable only with eax, ax, and al.
  ;; Note that this excludes ah.
  
! (define_expand "@test<mode>_ccno_1"
    [(set (reg:CCNO FLAGS_REG)
  	(compare:CCNO
! 	  (and:SWI48
! 	    (match_operand:SWI48 0 "nonimmediate_operand")
! 	    (match_operand:SWI48 1 "<nonmemory_szext_operand>"))
  	  (const_int 0)))])
  
  (define_expand "testqi_ccz_1"
    [(set (reg:CCZ FLAGS_REG)
! 	(compare:CCZ
! 	  (and:QI
! 	    (match_operand:QI 0 "nonimmediate_operand")
! 	    (match_operand:QI 1 "nonmemory_operand"))
! 	  (const_int 0)))])
  
  (define_insn "*testdi_1"
    [(set (reg FLAGS_REG)
  	(compare
! 	  (and:DI
! 	    (match_operand:DI 0 "nonimmediate_operand" "%r,rm")
! 	    (match_operand:DI 1 "x86_64_szext_nonmemory_operand" "Z,re"))
  	 (const_int 0)))]
!   "TARGET_64BIT
!    && ix86_match_ccmode
! 	(insn,
! 	 /* If we are going to emit testl instead of testq, and the operands[1]
! 	    constant might have the SImode sign bit set, make sure the sign
! 	    flag isn't tested, because the instruction will set the sign flag
! 	    based on bit 31 rather than bit 63.  If it isn't CONST_INT,
! 	    conservatively assume it might have bit 31 set.  */
! 	 (satisfies_constraint_Z (operands[1])
! 	  && (!CONST_INT_P (operands[1])
! 	      || val_signbit_known_set_p (SImode, INTVAL (operands[1]))))
! 	 ? CCZmode : CCNOmode)"
    "@
     test{l}\t{%k1, %k0|%k0, %k1}
     test{q}\t{%1, %0|%0, %1}"
    [(set_attr "type" "test")
!    (set_attr "mode" "SI,DI")])
  
  (define_insn "*testqi_1_maybe_si"
    [(set (reg FLAGS_REG)
! 	(compare
  	  (and:QI
! 	    (match_operand:QI 0 "nonimmediate_operand" "%qm,*a,qm,r")
! 	    (match_operand:QI 1 "nonmemory_operand" "q,n,n,n"))
  	  (const_int 0)))]
!   "ix86_match_ccmode (insn,
! 		      CONST_INT_P (operands[1])
! 		      && INTVAL (operands[1]) >= 0 ? CCNOmode : CCZmode)"
  {
    if (which_alternative == 3)
      {
***************
*** 8298,8321 ****
    return "test{b}\t{%1, %0|%0, %1}";
  }
    [(set_attr "type" "test")
-    (set_attr "modrm" "0,1,1,1")
     (set_attr "mode" "QI,QI,QI,SI")
!    (set_attr "pent_pair" "uv,np,uv,np")])
  
  (define_insn "*test<mode>_1"
    [(set (reg FLAGS_REG)
  	(compare
! 	 (and:SWI124
! 	  (match_operand:SWI124 0 "nonimmediate_operand" "%!*a,<r>,<r>m")
! 	  (match_operand:SWI124 1 "<general_operand>" "<i>,<i>,<r><i>"))
  	 (const_int 0)))]
!   "ix86_match_ccmode (insn, CCNOmode)
!    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
    "test{<imodesuffix>}\t{%1, %0|%0, %1}"
    [(set_attr "type" "test")
-    (set_attr "modrm" "0,1,1")
     (set_attr "mode" "<MODE>")
!    (set_attr "pent_pair" "uv,np,uv")])
  
  (define_expand "testqi_ext_1_ccno"
    [(set (reg:CCNO FLAGS_REG)
--- 8648,8668 ----
    return "test{b}\t{%1, %0|%0, %1}";
  }
    [(set_attr "type" "test")
     (set_attr "mode" "QI,QI,QI,SI")
!    (set_attr "pent_pair" "uv,uv,np,np")])
  
  (define_insn "*test<mode>_1"
    [(set (reg FLAGS_REG)
  	(compare
! 	  (and:SWI124
! 	    (match_operand:SWI124 0 "nonimmediate_operand" "%<r>m,*a,<r>m")
! 	    (match_operand:SWI124 1 "<nonmemory_szext_operand>" "<r>,<i>,<i>"))
  	 (const_int 0)))]
!   "ix86_match_ccmode (insn, CCNOmode)"
    "test{<imodesuffix>}\t{%1, %0|%0, %1}"
    [(set_attr "type" "test")
     (set_attr "mode" "<MODE>")
!    (set_attr "pent_pair" "uv,uv,np")])
  
  (define_expand "testqi_ext_1_ccno"
    [(set (reg:CCNO FLAGS_REG)
***************
*** 8371,8388 ****
  	     (match_operand 3 "const_int_operand" "n")
  	     (match_operand 4 "const_int_operand" "n"))
  	   (const_int 0)]))]
!   "ix86_match_ccmode (insn, CCNOmode)
!    && ((TARGET_64BIT && GET_MODE (operands[2]) == DImode)
!        || GET_MODE (operands[2]) == SImode
!        || GET_MODE (operands[2]) == HImode
!        || GET_MODE (operands[2]) == QImode)
     /* Ensure that resulting mask is zero or sign extended operand.  */
     && INTVAL (operands[4]) >= 0
     && ((INTVAL (operands[3]) > 0
  	&& INTVAL (operands[3]) + INTVAL (operands[4]) <= 32)
         || (<MODE>mode == DImode
  	   && INTVAL (operands[3]) > 32
! 	   && INTVAL (operands[3]) + INTVAL (operands[4]) == 64))"
    "#"
    "&& 1"
    [(set (match_dup 0) (match_op_dup 1 [(match_dup 2) (const_int 0)]))]
--- 8718,8768 ----
  	     (match_operand 3 "const_int_operand" "n")
  	     (match_operand 4 "const_int_operand" "n"))
  	   (const_int 0)]))]
!   "((TARGET_64BIT && GET_MODE (operands[2]) == DImode)
!     || GET_MODE (operands[2]) == SImode
!     || GET_MODE (operands[2]) == HImode
!     || GET_MODE (operands[2]) == QImode)
     /* Ensure that resulting mask is zero or sign extended operand.  */
     && INTVAL (operands[4]) >= 0
     && ((INTVAL (operands[3]) > 0
  	&& INTVAL (operands[3]) + INTVAL (operands[4]) <= 32)
         || (<MODE>mode == DImode
  	   && INTVAL (operands[3]) > 32
! 	   && INTVAL (operands[3]) + INTVAL (operands[4]) == 64))
!    && ix86_match_ccmode (insn,
! 			 /* If zero_extract mode precision is the same
! 			    as len, the SF of the zero_extract
! 			    comparison will be the most significant
! 			    extracted bit, but this could be matched
! 			    after splitting only for pos 0 len all bits
! 			    trivial extractions.  Require CCZmode.  */
! 			 (GET_MODE_PRECISION (<MODE>mode)
! 			  == INTVAL (operands[3]))
! 			 /* Otherwise, require CCZmode if we'd use a mask
! 			    with the most significant bit set and can't
! 			    widen it to wider mode.  *testdi_1 also
! 			    requires CCZmode if the mask has bit
! 			    31 set and all bits above it clear.  */
! 			 || (INTVAL (operands[3]) + INTVAL (operands[4])
! 			     >= 32)
! 			 /* We can't widen also if val is not a REG.  */
! 			 || (INTVAL (operands[3]) + INTVAL (operands[4])
! 			     == GET_MODE_PRECISION (GET_MODE (operands[2]))
! 			     && !register_operand (operands[2],
! 						   GET_MODE (operands[2])))
! 			 /* And we shouldn't widen if
! 			    TARGET_PARTIAL_REG_STALL.  */
! 			 || (TARGET_PARTIAL_REG_STALL
! 			     && (INTVAL (operands[3]) + INTVAL (operands[4])
! 				 >= (paradoxical_subreg_p (operands[2])
! 				     && (GET_MODE_CLASS
! 					  (GET_MODE (SUBREG_REG (operands[2])))
! 					 == MODE_INT)
! 				     ? GET_MODE_PRECISION
! 					 (GET_MODE (SUBREG_REG (operands[2])))
! 				     : GET_MODE_PRECISION
! 					 (GET_MODE (operands[2])))))
! 			 ? CCZmode : CCNOmode)"
    "#"
    "&& 1"
    [(set (match_dup 0) (match_op_dup 1 [(match_dup 2) (const_int 0)]))]
***************
*** 8398,8404 ****
  
        /* Narrow paradoxical subregs to prevent partial register stalls.  */
        if (GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (submode)
! 	  && GET_MODE_CLASS (submode) == MODE_INT)
  	{
  	  val = SUBREG_REG (val);
  	  mode = submode;
--- 8778,8787 ----
  
        /* Narrow paradoxical subregs to prevent partial register stalls.  */
        if (GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (submode)
! 	  && GET_MODE_CLASS (submode) == MODE_INT
! 	  && (GET_MODE (operands[0]) == CCZmode
! 	      || pos + len < GET_MODE_PRECISION (submode)
! 	      || REG_P (SUBREG_REG (val))))
  	{
  	  val = SUBREG_REG (val);
  	  mode = submode;
***************
*** 8406,8419 ****
      }
  
    /* Small HImode tests can be converted to QImode.  */
!   if (register_operand (val, HImode) && pos + len <= 8)
      {
!       val = gen_lowpart (QImode, val);
!       mode = QImode;
      }
  
    gcc_assert (pos + len <= GET_MODE_PRECISION (mode));
  
    wide_int mask
      = wi::shifted_mask (pos, len, false, GET_MODE_PRECISION (mode));
  
--- 8789,8820 ----
      }
  
    /* Small HImode tests can be converted to QImode.  */
!   if (pos + len <= 8
!       && register_operand (val, HImode))
      {
!       rtx nval = gen_lowpart (QImode, val);
!       if (!MEM_P (nval)
! 	  || GET_MODE (operands[0]) == CCZmode
! 	  || pos + len < 8)
! 	{
! 	  val = nval;
! 	  mode = QImode;
! 	}
      }
  
    gcc_assert (pos + len <= GET_MODE_PRECISION (mode));
  
+   /* If the mask is going to have the sign bit set in the mode
+      we want to do the comparison in and user isn't interested just
+      in the zero flag, then we must widen the target mode.  */
+   if (pos + len == GET_MODE_PRECISION (mode)
+       && GET_MODE (operands[0]) != CCZmode)
+     {
+       gcc_assert (pos + len < 32 && !MEM_P (val));
+       mode = SImode;
+       val = gen_lowpart (mode, val);
+     }
+ 
    wide_int mask
      = wi::shifted_mask (pos, len, false, GET_MODE_PRECISION (mode));
  
***************
*** 8477,8556 ****
  ;; it should be done with splitters.
  
  (define_expand "and<mode>3"
!   [(set (match_operand:SWIM1248x 0 "nonimmediate_operand")
! 	(and:SWIM1248x (match_operand:SWIM1248x 1 "nonimmediate_operand")
! 		      (match_operand:SWIM1248x 2 "<general_szext_operand>")))]
    ""
  {
    machine_mode mode = <MODE>mode;
-   rtx (*insn) (rtx, rtx);
  
!   if (CONST_INT_P (operands[2]) && REG_P (operands[0]))
      {
!       HOST_WIDE_INT ival = INTVAL (operands[2]);
  
!       if (ival == (HOST_WIDE_INT) 0xffffffff)
  	mode = SImode;
!       else if (ival == 0xffff)
  	mode = HImode;
!       else if (ival == 0xff)
  	mode = QImode;
-       }
- 
-   if (mode == <MODE>mode)
-     {
-       ix86_expand_binary_operator (AND, <MODE>mode, operands);
-       DONE;
      }
  
!   if (<MODE>mode == DImode)
!     insn = (mode == SImode)
! 	   ? gen_zero_extendsidi2
! 	   : (mode == HImode)
! 	   ? gen_zero_extendhidi2
! 	   : gen_zero_extendqidi2;
!   else if (<MODE>mode == SImode)
!     insn = (mode == HImode)
! 	   ? gen_zero_extendhisi2
! 	   : gen_zero_extendqisi2;
!   else if (<MODE>mode == HImode)
!     insn = gen_zero_extendqihi2;
    else
!     gcc_unreachable ();
  
-   emit_insn (insn (operands[0], gen_lowpart (mode, operands[1])));
    DONE;
  })
  
  (define_insn_and_split "*anddi3_doubleword"
!   [(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r")
  	(and:DI
! 	 (match_operand:DI 1 "nonimmediate_operand" "%0,0,0")
! 	 (match_operand:DI 2 "x86_64_szext_general_operand" "Z,re,rm")))
     (clobber (reg:CC FLAGS_REG))]
    "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
!    && ix86_binary_operator_ok (AND, DImode, operands)"
    "#"
!   "&& reload_completed"
    [(const_int 0)]
  {
    split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);
    if (operands[2] == const0_rtx)
!     {
!       operands[1] = const0_rtx;
!       ix86_expand_move (SImode, &operands[0]);
!     }
!   else if (operands[2] != constm1_rtx)
!     ix86_expand_binary_operator (AND, SImode, &operands[0]);
!   else if (operands[5] == constm1_rtx)
!     emit_note (NOTE_INSN_DELETED);
    if (operands[5] == const0_rtx)
!     {
!       operands[4] = const0_rtx;
!       ix86_expand_move (SImode, &operands[3]);
!     }
!   else if (operands[5] != constm1_rtx)
!     ix86_expand_binary_operator (AND, SImode, &operands[3]);
    DONE;
  })
  
--- 8878,8946 ----
  ;; it should be done with splitters.
  
  (define_expand "and<mode>3"
!   [(set (match_operand:SWIM1248s 0 "nonimmediate_operand")
! 	(and:SWIM1248s (match_operand:SWIM1248s 1 "nonimmediate_operand")
! 		       (match_operand:SWIM1248s 2 "<general_szext_operand>")))]
    ""
  {
    machine_mode mode = <MODE>mode;
  
!   if (<MODE>mode == DImode && !TARGET_64BIT)
!     ;
!   else if (const_int_operand (operands[2], <MODE>mode)
! 	   && register_operand (operands[0], <MODE>mode)
! 	   && !(TARGET_ZERO_EXTEND_WITH_AND
! 		&& optimize_function_for_speed_p (cfun)))
      {
!       unsigned HOST_WIDE_INT ival = UINTVAL (operands[2]);
  
!       if (ival == GET_MODE_MASK (SImode))
  	mode = SImode;
!       else if (ival == GET_MODE_MASK (HImode))
  	mode = HImode;
!       else if (ival == GET_MODE_MASK (QImode))
  	mode = QImode;
      }
  
!   if (mode != <MODE>mode)
!     emit_insn (gen_extend_insn
! 	       (operands[0], gen_lowpart (mode, operands[1]),
! 		<MODE>mode, mode, 1));
    else
!     ix86_expand_binary_operator (AND, <MODE>mode, operands);
  
    DONE;
  })
  
  (define_insn_and_split "*anddi3_doubleword"
!   [(set (match_operand:DI 0 "nonimmediate_operand")
  	(and:DI
! 	 (match_operand:DI 1 "nonimmediate_operand")
! 	 (match_operand:DI 2 "x86_64_szext_general_operand")))
     (clobber (reg:CC FLAGS_REG))]
    "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
!    && ix86_binary_operator_ok (AND, DImode, operands)
!    && ix86_pre_reload_split ()"
    "#"
!   "&& 1"
    [(const_int 0)]
  {
    split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);
+ 
    if (operands[2] == const0_rtx)
!     emit_move_insn (operands[0], const0_rtx);
!   else if (operands[2] == constm1_rtx)
!     emit_move_insn (operands[0], operands[1]);
!   else
!     emit_insn (gen_andsi3 (operands[0], operands[1], operands[2]));
! 
    if (operands[5] == const0_rtx)
!     emit_move_insn (operands[3], const0_rtx);
!   else if (operands[5] == constm1_rtx)
!     emit_move_insn (operands[3], operands[4]);
!   else
!     emit_insn (gen_andsi3 (operands[3], operands[4], operands[5]));
! 
    DONE;
  })
  
***************
*** 8558,8564 ****
    [(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r,r")
  	(and:DI
  	 (match_operand:DI 1 "nonimmediate_operand" "%0,0,0,qm")
! 	 (match_operand:DI 2 "x86_64_szext_general_operand" "Z,re,rm,L")))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT && ix86_binary_operator_ok (AND, DImode, operands)"
    "@
--- 8948,8954 ----
    [(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r,r")
  	(and:DI
  	 (match_operand:DI 1 "nonimmediate_operand" "%0,0,0,qm")
! 	 (match_operand:DI 2 "x86_64_szext_general_operand" "Z,re,m,L")))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT && ix86_binary_operator_ok (AND, DImode, operands)"
    "@
***************
*** 8643,8649 ****
  (define_insn "*and<mode>_1"
    [(set (match_operand:SWI24 0 "nonimmediate_operand" "=rm,r,Ya")
  	(and:SWI24 (match_operand:SWI24 1 "nonimmediate_operand" "%0,0,qm")
! 		   (match_operand:SWI24 2 "<general_operand>" "r<i>,rm,L")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (AND, <MODE>mode, operands)"
    "@
--- 9033,9039 ----
  (define_insn "*and<mode>_1"
    [(set (match_operand:SWI24 0 "nonimmediate_operand" "=rm,r,Ya")
  	(and:SWI24 (match_operand:SWI24 1 "nonimmediate_operand" "%0,0,qm")
! 		   (match_operand:SWI24 2 "<general_operand>" "r<i>,m,L")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (AND, <MODE>mode, operands)"
    "@
***************
*** 8664,8670 ****
  (define_insn "*andqi_1"
    [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r")
  	(and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
! 		(match_operand:QI 2 "general_operand" "qn,qmn,rn")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (AND, QImode, operands)"
    "@
--- 9054,9060 ----
  (define_insn "*andqi_1"
    [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r")
  	(and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
! 		(match_operand:QI 2 "general_operand" "qn,m,rn")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (AND, QImode, operands)"
    "@
***************
*** 8679,8694 ****
  	      (symbol_ref "!TARGET_PARTIAL_REG_STALL")]
  	   (symbol_ref "true")))])
  
! (define_insn "*andqi_1_slp"
!   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm,q"))
! 	(and:QI (match_dup 0)
! 		(match_operand:QI 1 "general_operand" "qn,qmn")))
     (clobber (reg:CC FLAGS_REG))]
    "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
!    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
!   "and{b}\t{%1, %0|%0, %1}"
!   [(set_attr "type" "alu1")
!    (set_attr "mode" "QI")])
  
  (define_split
    [(set (match_operand:SWI248 0 "register_operand")
--- 9069,9086 ----
  	      (symbol_ref "!TARGET_PARTIAL_REG_STALL")]
  	   (symbol_ref "true")))])
  
! (define_insn "*and<mode>_1_slp"
!   [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>"))
! 	(and:SWI12 (match_operand:SWI12 1 "nonimmediate_operand" "%0")
! 		   (match_operand:SWI12 2 "general_operand" "<r>mn")))
     (clobber (reg:CC FLAGS_REG))]
    "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
!    /* FIXME: without this LRA can't reload this pattern, see PR82524.  */
!    && (rtx_equal_p (operands[0], operands[1])
!        || rtx_equal_p (operands[0], operands[2]))"
!   "and{<imodesuffix>}\t{%2, %0|%0, %2}"
!   [(set_attr "type" "alu")
!    (set_attr "mode" "<MODE>")])
  
  (define_split
    [(set (match_operand:SWI248 0 "register_operand")
***************
*** 8700,8736 ****
         || REGNO (operands[0]) != REGNO (operands[1]))"
    [(const_int 0)]
  {
!   HOST_WIDE_INT ival = INTVAL (operands[2]);
    machine_mode mode;
-   rtx (*insn) (rtx, rtx);
  
!   if (ival == (HOST_WIDE_INT) 0xffffffff)
      mode = SImode;
!   else if (ival == 0xffff)
      mode = HImode;
    else
!     {
!       gcc_assert (ival == 0xff);
!       mode = QImode;
!     }
  
!   if (<MODE>mode == DImode)
!     insn = (mode == SImode)
! 	   ? gen_zero_extendsidi2
! 	   : (mode == HImode)
! 	   ? gen_zero_extendhidi2
! 	   : gen_zero_extendqidi2;
!   else
!     {
!       if (<MODE>mode != SImode)
! 	/* Zero extend to SImode to avoid partial register stalls.  */
! 	operands[0] = gen_lowpart (SImode, operands[0]);
  
!       insn = (mode == HImode)
! 	     ? gen_zero_extendhisi2
! 	     : gen_zero_extendqisi2;
!     }
!   emit_insn (insn (operands[0], gen_lowpart (mode, operands[1])));
    DONE;
  })
  
--- 9092,9116 ----
         || REGNO (operands[0]) != REGNO (operands[1]))"
    [(const_int 0)]
  {
!   unsigned HOST_WIDE_INT ival = UINTVAL (operands[2]);
    machine_mode mode;
  
!   if (ival == GET_MODE_MASK (SImode))
      mode = SImode;
!   else if (ival == GET_MODE_MASK (HImode))
      mode = HImode;
+   else if (ival == GET_MODE_MASK (QImode))
+     mode = QImode;
    else
!     gcc_unreachable ();
  
!   /* Zero extend to SImode to avoid partial register stalls.  */
!   if (<MODE_SIZE> < GET_MODE_SIZE (SImode))
!     operands[0] = gen_lowpart (SImode, operands[0]);
  
!   emit_insn (gen_extend_insn
! 	     (operands[0], gen_lowpart (mode, operands[1]),
! 	      GET_MODE (operands[0]), mode, 1));
    DONE;
  })
  
***************
*** 8783,8791 ****
  	(compare
  	 (and:DI
  	  (match_operand:DI 1 "nonimmediate_operand" "%0,0,0")
! 	  (match_operand:DI 2 "x86_64_szext_general_operand" "Z,rem,re"))
  	 (const_int 0)))
!    (set (match_operand:DI 0 "nonimmediate_operand" "=r,r,rm")
  	(and:DI (match_dup 1) (match_dup 2)))]
    "TARGET_64BIT
     && ix86_match_ccmode
--- 9163,9171 ----
  	(compare
  	 (and:DI
  	  (match_operand:DI 1 "nonimmediate_operand" "%0,0,0")
! 	  (match_operand:DI 2 "x86_64_szext_general_operand" "Z,re,m"))
  	 (const_int 0)))
!    (set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r")
  	(and:DI (match_dup 1) (match_dup 2)))]
    "TARGET_64BIT
     && ix86_match_ccmode
***************
*** 8826,8834 ****
    [(set (reg FLAGS_REG)
  	(compare (and:QI
  		  (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
! 		  (match_operand:QI 2 "general_operand" "qmn,qn,n"))
  		 (const_int 0)))
!    (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm,*r")
  	(and:QI (match_dup 1) (match_dup 2)))]
    "ix86_binary_operator_ok (AND, QImode, operands)
     && ix86_match_ccmode (insn,
--- 9206,9214 ----
    [(set (reg FLAGS_REG)
  	(compare (and:QI
  		  (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
! 		  (match_operand:QI 2 "general_operand" "qn,m,n"))
  		 (const_int 0)))
!    (set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r")
  	(and:QI (match_dup 1) (match_dup 2)))]
    "ix86_binary_operator_ok (AND, QImode, operands)
     && ix86_match_ccmode (insn,
***************
*** 8844,8858 ****
    return "and{b}\t{%2, %0|%0, %2}";
  }
    [(set_attr "type" "alu")
!    (set_attr "mode" "QI,QI,SI")])
  
  (define_insn "*and<mode>_2"
    [(set (reg FLAGS_REG)
  	(compare (and:SWI124
  		  (match_operand:SWI124 1 "nonimmediate_operand" "%0,0")
! 		  (match_operand:SWI124 2 "<general_operand>" "<g>,<r><i>"))
  		 (const_int 0)))
!    (set (match_operand:SWI124 0 "nonimmediate_operand" "=<r>,<r>m")
  	(and:SWI124 (match_dup 1) (match_dup 2)))]
    "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (AND, <MODE>mode, operands)"
--- 9224,9243 ----
    return "and{b}\t{%2, %0|%0, %2}";
  }
    [(set_attr "type" "alu")
!    (set_attr "mode" "QI,QI,SI")
!    ;; Potential partial reg stall on alternative 2.
!    (set (attr "preferred_for_speed")
!      (cond [(eq_attr "alternative" "2")
! 	      (symbol_ref "!TARGET_PARTIAL_REG_STALL")]
! 	   (symbol_ref "true")))])
  
  (define_insn "*and<mode>_2"
    [(set (reg FLAGS_REG)
  	(compare (and:SWI124
  		  (match_operand:SWI124 1 "nonimmediate_operand" "%0,0")
! 		  (match_operand:SWI124 2 "<general_operand>" "<r><i>,m"))
  		 (const_int 0)))
!    (set (match_operand:SWI124 0 "nonimmediate_operand" "=<r>m,<r>")
  	(and:SWI124 (match_dup 1) (match_dup 2)))]
    "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (AND, <MODE>mode, operands)"
***************
*** 8860,8880 ****
    [(set_attr "type" "alu")
     (set_attr "mode" "<MODE>")])
  
- (define_insn "*andqi_2_slp"
-   [(set (reg FLAGS_REG)
- 	(compare (and:QI
- 		   (match_operand:QI 0 "nonimmediate_operand" "+q,qm")
- 		   (match_operand:QI 1 "nonimmediate_operand" "qmn,qn"))
- 		 (const_int 0)))
-    (set (strict_low_part (match_dup 0))
- 	(and:QI (match_dup 0) (match_dup 1)))]
-   "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
-    && ix86_match_ccmode (insn, CCNOmode)
-    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
-   "and{b}\t{%1, %0|%0, %1}"
-   [(set_attr "type" "alu1")
-    (set_attr "mode" "QI")])
- 
  (define_insn "andqi_ext_1"
    [(set (zero_extract:SI (match_operand 0 "ext_register_operand" "+Q,Q")
  			 (const_int 8)
--- 9245,9250 ----
***************
*** 8999,9012 ****
  })
  
  (define_insn "*andndi3_doubleword"
!   [(set (match_operand:DI 0 "register_operand" "=&r,r,r,&r")
  	(and:DI
! 	  (not:DI (match_operand:DI 1 "register_operand" "r,0,r,0"))
! 	  (match_operand:DI 2 "nonimmediate_operand" "rm,rm,0,rm")))
     (clobber (reg:CC FLAGS_REG))]
!   "!TARGET_64BIT && TARGET_STV && TARGET_SSE2"
!   "#"
!   [(set_attr "isa" "bmi,bmi,bmi,*")])
  
  (define_split
    [(set (match_operand:DI 0 "register_operand")
--- 9369,9382 ----
  })
  
  (define_insn "*andndi3_doubleword"
!   [(set (match_operand:DI 0 "register_operand")
  	(and:DI
! 	  (not:DI (match_operand:DI 1 "register_operand"))
! 	  (match_operand:DI 2 "nonimmediate_operand")))
     (clobber (reg:CC FLAGS_REG))]
!   "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
!    && ix86_pre_reload_split ()"
!   "#")
  
  (define_split
    [(set (match_operand:DI 0 "register_operand")
***************
*** 9015,9021 ****
  	  (match_operand:DI 2 "nonimmediate_operand")))
     (clobber (reg:CC FLAGS_REG))]
    "!TARGET_64BIT && TARGET_BMI && TARGET_STV && TARGET_SSE2
!    && reload_completed"
    [(parallel [(set (match_dup 0)
  		   (and:SI (not:SI (match_dup 1)) (match_dup 2)))
  	      (clobber (reg:CC FLAGS_REG))])
--- 9385,9391 ----
  	  (match_operand:DI 2 "nonimmediate_operand")))
     (clobber (reg:CC FLAGS_REG))]
    "!TARGET_64BIT && TARGET_BMI && TARGET_STV && TARGET_SSE2
!    && can_create_pseudo_p ()"
    [(parallel [(set (match_dup 0)
  		   (and:SI (not:SI (match_dup 1)) (match_dup 2)))
  	      (clobber (reg:CC FLAGS_REG))])
***************
*** 9027,9046 ****
  (define_split
    [(set (match_operand:DI 0 "register_operand")
  	(and:DI
! 	  (not:DI (match_dup 0))
! 	  (match_operand:DI 1 "nonimmediate_operand")))
     (clobber (reg:CC FLAGS_REG))]
    "!TARGET_64BIT && !TARGET_BMI && TARGET_STV && TARGET_SSE2
!    && reload_completed"
!   [(set (match_dup 0) (not:SI (match_dup 0)))
     (parallel [(set (match_dup 0)
! 		   (and:SI (match_dup 0) (match_dup 1)))
  	      (clobber (reg:CC FLAGS_REG))])
!    (set (match_dup 2) (not:SI (match_dup 2)))
!    (parallel [(set (match_dup 2)
! 		   (and:SI (match_dup 2) (match_dup 3)))
  	      (clobber (reg:CC FLAGS_REG))])]
!   "split_double_mode (DImode, &operands[0], 2, &operands[0], &operands[2]);")
  
  (define_insn "*andn<mode>_1"
    [(set (match_operand:SWI48 0 "register_operand" "=r,r")
--- 9397,9421 ----
  (define_split
    [(set (match_operand:DI 0 "register_operand")
  	(and:DI
! 	  (not:DI (match_operand:DI 1 "register_operand"))
! 	  (match_operand:DI 2 "nonimmediate_operand")))
     (clobber (reg:CC FLAGS_REG))]
    "!TARGET_64BIT && !TARGET_BMI && TARGET_STV && TARGET_SSE2
!    && can_create_pseudo_p ()"
!   [(set (match_dup 6) (not:SI (match_dup 1)))
     (parallel [(set (match_dup 0)
! 		   (and:SI (match_dup 6) (match_dup 2)))
  	      (clobber (reg:CC FLAGS_REG))])
!    (set (match_dup 7) (not:SI (match_dup 4)))
!    (parallel [(set (match_dup 3)
! 		   (and:SI (match_dup 7) (match_dup 5)))
  	      (clobber (reg:CC FLAGS_REG))])]
! {
!   operands[6] = gen_reg_rtx (SImode);
!   operands[7] = gen_reg_rtx (SImode);
! 
!   split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);
! })
  
  (define_insn "*andn<mode>_1"
    [(set (match_operand:SWI48 0 "register_operand" "=r,r")
***************
*** 9086,9144 ****
  ;; If this is considered useful, it should be done with splitters.
  
  (define_expand "<code><mode>3"
!   [(set (match_operand:SWIM1248x 0 "nonimmediate_operand")
! 	(any_or:SWIM1248x (match_operand:SWIM1248x 1 "nonimmediate_operand")
! 			     (match_operand:SWIM1248x 2 "<general_operand>")))]
    ""
    "ix86_expand_binary_operator (<CODE>, <MODE>mode, operands); DONE;")
  
  (define_insn_and_split "*<code>di3_doubleword"
!   [(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r")
  	(any_or:DI
! 	 (match_operand:DI 1 "nonimmediate_operand" "%0,0,0")
! 	 (match_operand:DI 2 "x86_64_szext_general_operand" "Z,re,rm")))
     (clobber (reg:CC FLAGS_REG))]
    "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
!    && ix86_binary_operator_ok (<CODE>, DImode, operands)"
    "#"
!   "&& reload_completed"
    [(const_int 0)]
  {
    split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);
!   if (operands[2] == constm1_rtx)
      {
        if (<CODE> == IOR)
! 	{
! 	  operands[1] = constm1_rtx;
! 	  ix86_expand_move (SImode, &operands[0]);
! 	}
        else
  	ix86_expand_unary_operator (NOT, SImode, &operands[0]);
      }
!   else if (operands[2] != const0_rtx)
      ix86_expand_binary_operator (<CODE>, SImode, &operands[0]);
!   else if (operands[5] == const0_rtx)
!     emit_note (NOTE_INSN_DELETED);
!   if (operands[5] == constm1_rtx)
      {
        if (<CODE> == IOR)
! 	{
! 	  operands[4] = constm1_rtx;
! 	  ix86_expand_move (SImode, &operands[3]);
! 	}
        else
  	ix86_expand_unary_operator (NOT, SImode, &operands[3]);
      }
!   else if (operands[5] != const0_rtx)
      ix86_expand_binary_operator (<CODE>, SImode, &operands[3]);
    DONE;
  })
  
  (define_insn "*<code><mode>_1"
!   [(set (match_operand:SWI248 0 "nonimmediate_operand" "=r,rm")
  	(any_or:SWI248
  	 (match_operand:SWI248 1 "nonimmediate_operand" "%0,0")
! 	 (match_operand:SWI248 2 "<general_operand>" "<g>,r<i>")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
    "<logic>{<imodesuffix>}\t{%2, %0|%0, %2}"
--- 9461,9519 ----
  ;; If this is considered useful, it should be done with splitters.
  
  (define_expand "<code><mode>3"
!   [(set (match_operand:SWIM1248s 0 "nonimmediate_operand")
! 	(any_or:SWIM1248s (match_operand:SWIM1248s 1 "nonimmediate_operand")
! 			  (match_operand:SWIM1248s 2 "<general_operand>")))]
    ""
    "ix86_expand_binary_operator (<CODE>, <MODE>mode, operands); DONE;")
  
  (define_insn_and_split "*<code>di3_doubleword"
!   [(set (match_operand:DI 0 "nonimmediate_operand")
  	(any_or:DI
! 	 (match_operand:DI 1 "nonimmediate_operand")
! 	 (match_operand:DI 2 "x86_64_szext_general_operand")))
     (clobber (reg:CC FLAGS_REG))]
    "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
!    && ix86_binary_operator_ok (<CODE>, DImode, operands)
!    && ix86_pre_reload_split ()"
    "#"
!   "&& 1"
    [(const_int 0)]
  {
    split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);
! 
!   if (operands[2] == const0_rtx)
!     emit_move_insn (operands[0], operands[1]);
!   else if (operands[2] == constm1_rtx)
      {
        if (<CODE> == IOR)
! 	emit_move_insn (operands[0], constm1_rtx);
        else
  	ix86_expand_unary_operator (NOT, SImode, &operands[0]);
      }
!   else
      ix86_expand_binary_operator (<CODE>, SImode, &operands[0]);
! 
!   if (operands[5] == const0_rtx)
!     emit_move_insn (operands[3], operands[4]);
!   else if (operands[5] == constm1_rtx)
      {
        if (<CODE> == IOR)
! 	emit_move_insn (operands[3], constm1_rtx);
        else
  	ix86_expand_unary_operator (NOT, SImode, &operands[3]);
      }
!   else
      ix86_expand_binary_operator (<CODE>, SImode, &operands[3]);
+ 
    DONE;
  })
  
  (define_insn "*<code><mode>_1"
!   [(set (match_operand:SWI248 0 "nonimmediate_operand" "=rm,r")
  	(any_or:SWI248
  	 (match_operand:SWI248 1 "nonimmediate_operand" "%0,0")
! 	 (match_operand:SWI248 2 "<general_operand>" "r<i>,m")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
    "<logic>{<imodesuffix>}\t{%2, %0|%0, %2}"
***************
*** 9215,9223 ****
     (set_attr "mode" "SI")])
  
  (define_insn "*<code>qi_1"
!   [(set (match_operand:QI 0 "nonimmediate_operand" "=q,m,r")
  	(any_or:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
! 		   (match_operand:QI 2 "general_operand" "qmn,qn,rn")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (<CODE>, QImode, operands)"
    "@
--- 9590,9598 ----
     (set_attr "mode" "SI")])
  
  (define_insn "*<code>qi_1"
!   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r")
  	(any_or:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
! 		   (match_operand:QI 2 "general_operand" "qn,m,rn")))
     (clobber (reg:CC FLAGS_REG))]
    "ix86_binary_operator_ok (<CODE>, QImode, operands)"
    "@
***************
*** 9232,9255 ****
  	      (symbol_ref "!TARGET_PARTIAL_REG_STALL")]
  	   (symbol_ref "true")))])
  
! (define_insn "*<code>qi_1_slp"
!   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+q,m"))
! 	(any_or:QI (match_dup 0)
! 		   (match_operand:QI 1 "general_operand" "qmn,qn")))
     (clobber (reg:CC FLAGS_REG))]
    "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
!    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
!   "<logic>{b}\t{%1, %0|%0, %1}"
!   [(set_attr "type" "alu1")
!    (set_attr "mode" "QI")])
  
  (define_insn "*<code><mode>_2"
    [(set (reg FLAGS_REG)
  	(compare (any_or:SWI
  		  (match_operand:SWI 1 "nonimmediate_operand" "%0,0")
! 		  (match_operand:SWI 2 "<general_operand>" "<g>,<r><i>"))
  		 (const_int 0)))
!    (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>,<r>m")
  	(any_or:SWI (match_dup 1) (match_dup 2)))]
    "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
--- 9607,9632 ----
  	      (symbol_ref "!TARGET_PARTIAL_REG_STALL")]
  	   (symbol_ref "true")))])
  
! (define_insn "*<code><mode>_1_slp"
!   [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>"))
! 	(any_or:SWI12 (match_operand:SWI12 1 "nonimmediate_operand" "%0")
! 		      (match_operand:SWI12 2 "general_operand" "<r>mn")))
     (clobber (reg:CC FLAGS_REG))]
    "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
!    /* FIXME: without this LRA can't reload this pattern, see PR82524.  */
!    && (rtx_equal_p (operands[0], operands[1])
!        || rtx_equal_p (operands[0], operands[2]))"
!   "<logic>{<imodesuffix>}\t{%2, %0|%0, %2}"
!   [(set_attr "type" "alu")
!    (set_attr "mode" "<MODE>")])
  
  (define_insn "*<code><mode>_2"
    [(set (reg FLAGS_REG)
  	(compare (any_or:SWI
  		  (match_operand:SWI 1 "nonimmediate_operand" "%0,0")
! 		  (match_operand:SWI 2 "<general_operand>" "<r><i>,m"))
  		 (const_int 0)))
!    (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
  	(any_or:SWI (match_dup 1) (match_dup 2)))]
    "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
***************
*** 9286,9305 ****
    [(set_attr "type" "alu")
     (set_attr "mode" "SI")])
  
- (define_insn "*<code>qi_2_slp"
-   [(set (reg FLAGS_REG)
- 	(compare (any_or:QI (match_operand:QI 0 "nonimmediate_operand" "+q,qm")
- 			    (match_operand:QI 1 "general_operand" "qmn,qn"))
- 		 (const_int 0)))
-    (set (strict_low_part (match_dup 0))
- 	(any_or:QI (match_dup 0) (match_dup 1)))]
-   "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
-    && ix86_match_ccmode (insn, CCNOmode)
-    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
-   "<logic>{b}\t{%1, %0|%0, %1}"
-   [(set_attr "type" "alu1")
-    (set_attr "mode" "QI")])
- 
  (define_insn "*<code><mode>_3"
    [(set (reg FLAGS_REG)
  	(compare (any_or:SWI
--- 9663,9668 ----
***************
*** 9498,9510 ****
    [(set_attr "type" "negnot")
     (set_attr "mode" "<MODE>")])
  
- ;; Combine is quite creative about this pattern.
  (define_insn "*negsi2_1_zext"
    [(set (match_operand:DI 0 "register_operand" "=r")
! 	(lshiftrt:DI
! 	  (neg:DI (ashift:DI (match_operand:DI 1 "register_operand" "0")
! 			     (const_int 32)))
! 	(const_int 32)))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT && ix86_unary_operator_ok (NEG, SImode, operands)"
    "neg{l}\t%k0"
--- 9861,9870 ----
    [(set_attr "type" "negnot")
     (set_attr "mode" "<MODE>")])
  
  (define_insn "*negsi2_1_zext"
    [(set (match_operand:DI 0 "register_operand" "=r")
! 	(zero_extend:DI
! 	  (neg:SI (match_operand:SI 1 "register_operand" "0"))))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT && ix86_unary_operator_ok (NEG, SImode, operands)"
    "neg{l}\t%k0"
***************
*** 9530,9545 ****
  (define_insn "*negsi2_cmpz_zext"
    [(set (reg:CCZ FLAGS_REG)
  	(compare:CCZ
! 	  (lshiftrt:DI
! 	    (neg:DI (ashift:DI
! 		      (match_operand:DI 1 "register_operand" "0")
! 		      (const_int 32)))
! 	    (const_int 32))
  	  (const_int 0)))
     (set (match_operand:DI 0 "register_operand" "=r")
! 	(lshiftrt:DI (neg:DI (ashift:DI (match_dup 1)
! 					(const_int 32)))
! 		     (const_int 32)))]
    "TARGET_64BIT && ix86_unary_operator_ok (NEG, SImode, operands)"
    "neg{l}\t%k0"
    [(set_attr "type" "negnot")
--- 9890,9900 ----
  (define_insn "*negsi2_cmpz_zext"
    [(set (reg:CCZ FLAGS_REG)
  	(compare:CCZ
! 	  (neg:SI (match_operand:SI 1 "register_operand" "0"))
  	  (const_int 0)))
     (set (match_operand:DI 0 "register_operand" "=r")
! 	(zero_extend:DI
! 	  (neg:SI (match_dup 1))))]
    "TARGET_64BIT && ix86_unary_operator_ok (NEG, SImode, operands)"
    "neg{l}\t%k0"
    [(set_attr "type" "negnot")
***************
*** 9575,9581 ****
    [(set_attr "type" "negnot")
     (set_attr "mode" "<MODE>")])
  
! ;; Changing of sign for FP values is doable using integer unit too.
  
  (define_expand "<code><mode>2"
    [(set (match_operand:X87MODEF 0 "register_operand")
--- 9930,9985 ----
    [(set_attr "type" "negnot")
     (set_attr "mode" "<MODE>")])
  
! (define_expand "<code>tf2"
!   [(set (match_operand:TF 0 "register_operand")
! 	(absneg:TF (match_operand:TF 1 "register_operand")))]
!   "TARGET_SSE"
!   "ix86_expand_fp_absneg_operator (<CODE>, TFmode, operands); DONE;")
! 
! (define_insn "*<code>tf2_1"
!   [(set (match_operand:TF 0 "register_operand" "=x,x,Yv,Yv")
! 	(absneg:TF
! 	  (match_operand:TF 1 "vector_operand" "0,xBm,Yv,m")))
!    (use (match_operand:TF 2 "vector_operand" "xBm,0,Yvm,Yv"))
!    (clobber (reg:CC FLAGS_REG))]
!   "TARGET_SSE"
!   "#"
!   [(set_attr "isa" "noavx,noavx,avx,avx")])
! 
! (define_insn "*nabstf2_1"
!   [(set (match_operand:TF 0 "register_operand" "=x,x,Yv,Yv")
! 	(neg:TF
! 	  (abs:TF
! 	    (match_operand:TF 1 "vector_operand" "0,xBm,Yv,m"))))
!    (use (match_operand:TF 2 "vector_operand" "xBm,0,Yvm,Yv"))]
!   "TARGET_SSE"
!   "#"
!   [(set_attr "isa" "noavx,noavx,avx,avx")])
! 
! ;; Special expand pattern to handle integer mode abs
! 
! (define_expand "abs<mode>2"
!   [(set (match_operand:SWI48x 0 "register_operand")
!     (abs:SWI48x
!       (match_operand:SWI48x 1 "register_operand")))]
!   "TARGET_EXPAND_ABS"
!   {
!     machine_mode mode = <MODE>mode;
! 
!     /* Generate rtx abs using abs (x) = (((signed) x >> (W-1)) ^ x) -
!        ((signed) x >> (W-1)) */
!     rtx shift_amount = gen_int_mode (GET_MODE_PRECISION (mode) - 1, QImode);
!     rtx shift_dst = expand_simple_binop (mode, ASHIFTRT, operands[1],
! 					 shift_amount, NULL_RTX,
! 					 0, OPTAB_DIRECT);
!     rtx xor_dst = expand_simple_binop (mode, XOR, shift_dst, operands[1],
! 				       operands[0], 0, OPTAB_DIRECT);
!     rtx minus_dst = expand_simple_binop (mode, MINUS, xor_dst, shift_dst,
! 					 operands[0], 0, OPTAB_DIRECT);
!     if (!rtx_equal_p (minus_dst, operands[0]))
!       emit_move_insn (operands[0], minus_dst);
!     DONE;
!   })
  
  (define_expand "<code><mode>2"
    [(set (match_operand:X87MODEF 0 "register_operand")
***************
*** 9583,9785 ****
    "TARGET_80387 || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)"
    "ix86_expand_fp_absneg_operator (<CODE>, <MODE>mode, operands); DONE;")
  
! (define_insn "*absneg<mode>2"
!   [(set (match_operand:MODEF 0 "register_operand" "=Yv,Yv,f,!r")
! 	(match_operator:MODEF 3 "absneg_operator"
! 	  [(match_operand:MODEF 1 "register_operand" "0,Yv,0,0")]))
!    (use (match_operand:<ssevecmode> 2 "nonimmediate_operand" "Yvm,0,X,X"))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_80387 || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)"
    "#"
!   [(set (attr "enabled")
       (if_then_else
         (match_test ("SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"))
         (if_then_else
! 	 (eq_attr "alternative" "2")
  	 (symbol_ref "TARGET_MIX_SSE_I387")
! 	 (symbol_ref "true"))
         (if_then_else
! 	 (eq_attr "alternative" "2,3")
  	 (symbol_ref "true")
  	 (symbol_ref "false"))))])
  
- (define_insn "*absnegxf2_i387"
-   [(set (match_operand:XF 0 "register_operand" "=f,!r")
- 	(match_operator:XF 3 "absneg_operator"
- 	  [(match_operand:XF 1 "register_operand" "0,0")]))
-    (use (match_operand 2))
-    (clobber (reg:CC FLAGS_REG))]
-   "TARGET_80387"
-   "#")
- 
- (define_expand "<code>tf2"
-   [(set (match_operand:TF 0 "register_operand")
- 	(absneg:TF (match_operand:TF 1 "register_operand")))]
-   "TARGET_SSE"
-   "ix86_expand_fp_absneg_operator (<CODE>, TFmode, operands); DONE;")
- 
- (define_insn "*absnegtf2_sse"
-   [(set (match_operand:TF 0 "register_operand" "=Yv,Yv")
- 	(match_operator:TF 3 "absneg_operator"
- 	  [(match_operand:TF 1 "register_operand" "0,Yv")]))
-    (use (match_operand:TF 2 "nonimmediate_operand" "Yvm,0"))
-    (clobber (reg:CC FLAGS_REG))]
-   "TARGET_SSE"
-   "#")
- 
- ;; Splitters for fp abs and neg.
- 
- (define_split
-   [(set (match_operand 0 "fp_register_operand")
- 	(match_operator 1 "absneg_operator" [(match_dup 0)]))
-    (use (match_operand 2))
-    (clobber (reg:CC FLAGS_REG))]
-   "reload_completed"
-   [(set (match_dup 0) (match_op_dup 1 [(match_dup 0)]))])
- 
  (define_split
!   [(set (match_operand 0 "sse_reg_operand")
! 	(match_operator 3 "absneg_operator"
! 	  [(match_operand 1 "register_operand")]))
!    (use (match_operand 2 "nonimmediate_operand"))
     (clobber (reg:CC FLAGS_REG))]
!   "reload_completed"
    [(set (match_dup 0) (match_dup 3))]
  {
!   machine_mode mode = GET_MODE (operands[0]);
!   machine_mode vmode = GET_MODE (operands[2]);
!   rtx tmp;
  
    operands[0] = lowpart_subreg (vmode, operands[0], mode);
    operands[1] = lowpart_subreg (vmode, operands[1], mode);
-   if (operands_match_p (operands[0], operands[2]))
-     std::swap (operands[1], operands[2]);
-   if (GET_CODE (operands[3]) == ABS)
-     tmp = gen_rtx_AND (vmode, operands[1], operands[2]);
-   else
-     tmp = gen_rtx_XOR (vmode, operands[1], operands[2]);
-   operands[3] = tmp;
- })
  
! (define_split
!   [(set (match_operand:SF 0 "general_reg_operand")
! 	(match_operator:SF 1 "absneg_operator" [(match_dup 0)]))
!    (use (match_operand:V4SF 2))
!    (clobber (reg:CC FLAGS_REG))]
!   "reload_completed"
!   [(parallel [(set (match_dup 0) (match_dup 1))
! 	      (clobber (reg:CC FLAGS_REG))])]
! {
!   rtx tmp;
!   operands[0] = gen_lowpart (SImode, operands[0]);
!   if (GET_CODE (operands[1]) == ABS)
      {
!       tmp = gen_int_mode (0x7fffffff, SImode);
!       tmp = gen_rtx_AND (SImode, operands[0], tmp);
      }
    else
!     {
!       tmp = gen_int_mode (0x80000000, SImode);
!       tmp = gen_rtx_XOR (SImode, operands[0], tmp);
!     }
!   operands[1] = tmp;
  })
  
  (define_split
!   [(set (match_operand:DF 0 "general_reg_operand")
! 	(match_operator:DF 1 "absneg_operator" [(match_dup 0)]))
     (use (match_operand 2))
     (clobber (reg:CC FLAGS_REG))]
!   "reload_completed"
!   [(parallel [(set (match_dup 0) (match_dup 1))
! 	      (clobber (reg:CC FLAGS_REG))])]
! {
!   rtx tmp;
!   if (TARGET_64BIT)
!     {
!       tmp = gen_lowpart (DImode, operands[0]);
!       tmp = gen_rtx_ZERO_EXTRACT (DImode, tmp, const1_rtx, GEN_INT (63));
!       operands[0] = tmp;
! 
!       if (GET_CODE (operands[1]) == ABS)
! 	tmp = const0_rtx;
!       else
! 	tmp = gen_rtx_NOT (DImode, tmp);
!     }
!   else
!     {
!       operands[0] = gen_highpart (SImode, operands[0]);
!       if (GET_CODE (operands[1]) == ABS)
! 	{
! 	  tmp = gen_int_mode (0x7fffffff, SImode);
! 	  tmp = gen_rtx_AND (SImode, operands[0], tmp);
! 	}
!       else
! 	{
! 	  tmp = gen_int_mode (0x80000000, SImode);
! 	  tmp = gen_rtx_XOR (SImode, operands[0], tmp);
! 	}
!     }
!   operands[1] = tmp;
! })
  
  (define_split
!   [(set (match_operand:XF 0 "general_reg_operand")
! 	(match_operator:XF 1 "absneg_operator" [(match_dup 0)]))
     (use (match_operand 2))
     (clobber (reg:CC FLAGS_REG))]
!   "reload_completed"
!   [(parallel [(set (match_dup 0) (match_dup 1))
! 	      (clobber (reg:CC FLAGS_REG))])]
  {
!   rtx tmp;
!   operands[0] = gen_rtx_REG (SImode,
! 			     REGNO (operands[0]) + (TARGET_64BIT ? 1 : 2));
!   if (GET_CODE (operands[1]) == ABS)
      {
!       tmp = GEN_INT (0x7fff);
!       tmp = gen_rtx_AND (SImode, operands[0], tmp);
      }
    else
!     {
!       tmp = GEN_INT (0x8000);
!       tmp = gen_rtx_XOR (SImode, operands[0], tmp);
!     }
!   operands[1] = tmp;
  })
  
  ;; Conditionalize these after reload. If they match before reload, we
  ;; lose the clobber and ability to use integer instructions.
  
! (define_insn "*<code><mode>2_1"
    [(set (match_operand:X87MODEF 0 "register_operand" "=f")
  	(absneg:X87MODEF (match_operand:X87MODEF 1 "register_operand" "0")))]
!   "TARGET_80387
!    && (reload_completed
!        || !(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH))"
    "<absneg_mnemonic>"
    [(set_attr "type" "fsgn")
     (set_attr "mode" "<MODE>")])
  
  ;; Copysign instructions
  
- (define_mode_iterator CSGNMODE [SF DF TF])
- (define_mode_attr CSGNVMODE [(SF "V4SF") (DF "V2DF") (TF "TF")])
- 
  (define_expand "copysign<mode>3"
!   [(match_operand:CSGNMODE 0 "register_operand")
!    (match_operand:CSGNMODE 1 "nonmemory_operand")
!    (match_operand:CSGNMODE 2 "register_operand")]
    "(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
     || (TARGET_SSE && (<MODE>mode == TFmode))"
    "ix86_expand_copysign (operands); DONE;")
  
! (define_insn_and_split "copysign<mode>3_const"
!   [(set (match_operand:CSGNMODE 0 "register_operand" "=Yv")
! 	(unspec:CSGNMODE
! 	  [(match_operand:<CSGNVMODE> 1 "nonimm_or_0_operand" "YvmC")
! 	   (match_operand:CSGNMODE 2 "register_operand" "0")
! 	   (match_operand:<CSGNVMODE> 3 "nonimmediate_operand" "Yvm")]
  	  UNSPEC_COPYSIGN))]
    "(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
     || (TARGET_SSE && (<MODE>mode == TFmode))"
--- 9987,10156 ----
    "TARGET_80387 || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)"
    "ix86_expand_fp_absneg_operator (<CODE>, <MODE>mode, operands); DONE;")
  
! ;; Changing of sign for FP values is doable using integer unit too.
! (define_insn "*<code><mode>2_i387_1"
!   [(set (match_operand:X87MODEF 0 "register_operand" "=f,!r")
! 	(absneg:X87MODEF
! 	  (match_operand:X87MODEF 1 "register_operand" "0,0")))
!    (clobber (reg:CC FLAGS_REG))]
!   "TARGET_80387"
!   "#")
! 
! (define_split
!   [(set (match_operand:X87MODEF 0 "fp_register_operand")
! 	(absneg:X87MODEF (match_operand:X87MODEF 1 "fp_register_operand")))
!    (clobber (reg:CC FLAGS_REG))]
!   "TARGET_80387 && reload_completed"
!   [(set (match_dup 0) (absneg:X87MODEF (match_dup 1)))])
! 
! (define_split
!   [(set (match_operand:X87MODEF 0 "general_reg_operand")
! 	(absneg:X87MODEF (match_operand:X87MODEF 1 "general_reg_operand")))
!    (clobber (reg:CC FLAGS_REG))]
!   "TARGET_80387 && reload_completed"
!   [(const_int 0)]
!   "ix86_split_fp_absneg_operator (<CODE>, <MODE>mode, operands); DONE;")
! 
! (define_insn "*<code><mode>2_1"
!   [(set (match_operand:MODEF 0 "register_operand" "=x,x,Yv,f,!r")
! 	(absneg:MODEF
! 	  (match_operand:MODEF 1 "register_operand" "0,x,Yv,0,0")))
!    (use (match_operand:<ssevecmode> 2 "vector_operand" "xBm,0,Yvm,X,X"))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_80387 || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)"
    "#"
!   [(set_attr "isa" "noavx,noavx,avx,*,*")
!    (set (attr "enabled")
       (if_then_else
         (match_test ("SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"))
         (if_then_else
! 	 (eq_attr "alternative" "3,4")
  	 (symbol_ref "TARGET_MIX_SSE_I387")
! 	 (const_string "*"))
         (if_then_else
! 	 (eq_attr "alternative" "3,4")
  	 (symbol_ref "true")
  	 (symbol_ref "false"))))])
  
  (define_split
!   [(set (match_operand:SSEMODEF 0 "sse_reg_operand")
! 	(absneg:SSEMODEF
! 	  (match_operand:SSEMODEF 1 "vector_operand")))
!    (use (match_operand:<ssevecmodef> 2 "vector_operand"))
     (clobber (reg:CC FLAGS_REG))]
!   "((SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
!     || (TARGET_SSE && (<MODE>mode == TFmode)))
!    && reload_completed"
    [(set (match_dup 0) (match_dup 3))]
  {
!   machine_mode mode = <MODE>mode;
!   machine_mode vmode = <ssevecmodef>mode;
!   enum rtx_code absneg_op = <CODE> == ABS ? AND : XOR;
  
    operands[0] = lowpart_subreg (vmode, operands[0], mode);
    operands[1] = lowpart_subreg (vmode, operands[1], mode);
  
!   if (TARGET_AVX)
      {
!       if (MEM_P (operands[1]))
!         std::swap (operands[1], operands[2]);
      }
    else
!    {
!      if (operands_match_p (operands[0], operands[2]))
!        std::swap (operands[1], operands[2]);
!    }
! 
!   operands[3]
!     = gen_rtx_fmt_ee (absneg_op, vmode, operands[1], operands[2]);
  })
  
  (define_split
!   [(set (match_operand:MODEF 0 "fp_register_operand")
! 	(absneg:MODEF (match_operand:MODEF 1 "fp_register_operand")))
     (use (match_operand 2))
     (clobber (reg:CC FLAGS_REG))]
!   "TARGET_80387 && reload_completed"
!   [(set (match_dup 0) (absneg:MODEF (match_dup 1)))])
  
  (define_split
!   [(set (match_operand:MODEF 0 "general_reg_operand")
! 	(absneg:MODEF (match_operand:MODEF 1 "general_reg_operand")))
     (use (match_operand 2))
     (clobber (reg:CC FLAGS_REG))]
!   "TARGET_80387 && reload_completed"
!   [(const_int 0)]
!   "ix86_split_fp_absneg_operator (<CODE>, <MODE>mode, operands); DONE;")
! 
! (define_insn "*nabs<mode>2_1"
!   [(set (match_operand:MODEF 0 "register_operand" "=x,x,Yv")
! 	(neg:MODEF
! 	  (abs:MODEF
! 	    (match_operand:MODEF 1 "register_operand" "0,x,Yv"))))
!    (use (match_operand:<ssevecmode> 2 "vector_operand" "xBm,0,Yvm"))]
!   "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
!   "#"
!   [(set_attr "isa" "noavx,noavx,avx")])
! 
! (define_split
!   [(set (match_operand:SSEMODEF 0 "sse_reg_operand")
! 	(neg:SSEMODEF
! 	  (abs:SSEMODEF
! 	    (match_operand:SSEMODEF 1 "vector_operand"))))
!    (use (match_operand:<ssevecmodef> 2 "vector_operand"))]
!   "((SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
!     || (TARGET_SSE && (<MODE>mode == TFmode)))
!    && reload_completed"
!   [(set (match_dup 0) (match_dup 3))]
  {
!   machine_mode mode = <MODE>mode;
!   machine_mode vmode = <ssevecmodef>mode;
! 
!   operands[0] = lowpart_subreg (vmode, operands[0], mode);
!   operands[1] = lowpart_subreg (vmode, operands[1], mode);
! 
!   if (TARGET_AVX)
      {
!       if (MEM_P (operands[1]))
!         std::swap (operands[1], operands[2]);
      }
    else
!    {
!      if (operands_match_p (operands[0], operands[2]))
!        std::swap (operands[1], operands[2]);
!    }
! 
!   operands[3]
!     = gen_rtx_fmt_ee (IOR, vmode, operands[1], operands[2]);
  })
  
  ;; Conditionalize these after reload. If they match before reload, we
  ;; lose the clobber and ability to use integer instructions.
  
! (define_insn "*<code><mode>2_i387"
    [(set (match_operand:X87MODEF 0 "register_operand" "=f")
  	(absneg:X87MODEF (match_operand:X87MODEF 1 "register_operand" "0")))]
!   "TARGET_80387 && reload_completed"
    "<absneg_mnemonic>"
    [(set_attr "type" "fsgn")
     (set_attr "mode" "<MODE>")])
  
  ;; Copysign instructions
  
  (define_expand "copysign<mode>3"
!   [(match_operand:SSEMODEF 0 "register_operand")
!    (match_operand:SSEMODEF 1 "nonmemory_operand")
!    (match_operand:SSEMODEF 2 "register_operand")]
    "(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
     || (TARGET_SSE && (<MODE>mode == TFmode))"
    "ix86_expand_copysign (operands); DONE;")
  
! (define_insn_and_split "@copysign<mode>3_const"
!   [(set (match_operand:SSEMODEF 0 "register_operand" "=Yv")
! 	(unspec:SSEMODEF
! 	  [(match_operand:<ssevecmodef> 1 "nonimm_or_0_operand" "YvmC")
! 	   (match_operand:SSEMODEF 2 "register_operand" "0")
! 	   (match_operand:<ssevecmodef> 3 "nonimmediate_operand" "Yvm")]
  	  UNSPEC_COPYSIGN))]
    "(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
     || (TARGET_SSE && (<MODE>mode == TFmode))"
***************
*** 9788,9817 ****
    [(const_int 0)]
    "ix86_split_copysign_const (operands); DONE;")
  
! (define_insn "copysign<mode>3_var"
!   [(set (match_operand:CSGNMODE 0 "register_operand" "=Yv,Yv,Yv,Yv,Yv")
! 	(unspec:CSGNMODE
! 	  [(match_operand:CSGNMODE 2 "register_operand"	"Yv,0,0,Yv,Yv")
! 	   (match_operand:CSGNMODE 3 "register_operand"	"1,1,Yv,1,Yv")
! 	   (match_operand:<CSGNVMODE> 4
  	     "nonimmediate_operand" "X,Yvm,Yvm,0,0")
! 	   (match_operand:<CSGNVMODE> 5
  	     "nonimmediate_operand" "0,Yvm,1,Yvm,1")]
  	  UNSPEC_COPYSIGN))
!    (clobber (match_scratch:<CSGNVMODE> 1 "=Yv,Yv,Yv,Yv,Yv"))]
    "(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
     || (TARGET_SSE && (<MODE>mode == TFmode))"
    "#")
  
  (define_split
!   [(set (match_operand:CSGNMODE 0 "register_operand")
! 	(unspec:CSGNMODE
! 	  [(match_operand:CSGNMODE 2 "register_operand")
! 	   (match_operand:CSGNMODE 3 "register_operand")
! 	   (match_operand:<CSGNVMODE> 4)
! 	   (match_operand:<CSGNVMODE> 5)]
  	  UNSPEC_COPYSIGN))
!    (clobber (match_scratch:<CSGNVMODE> 1))]
    "((SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
      || (TARGET_SSE && (<MODE>mode == TFmode)))
     && reload_completed"
--- 10159,10188 ----
    [(const_int 0)]
    "ix86_split_copysign_const (operands); DONE;")
  
! (define_insn "@copysign<mode>3_var"
!   [(set (match_operand:SSEMODEF 0 "register_operand" "=Yv,Yv,Yv,Yv,Yv")
! 	(unspec:SSEMODEF
! 	  [(match_operand:SSEMODEF 2 "register_operand"	"Yv,0,0,Yv,Yv")
! 	   (match_operand:SSEMODEF 3 "register_operand"	"1,1,Yv,1,Yv")
! 	   (match_operand:<ssevecmodef> 4
  	     "nonimmediate_operand" "X,Yvm,Yvm,0,0")
! 	   (match_operand:<ssevecmodef> 5
  	     "nonimmediate_operand" "0,Yvm,1,Yvm,1")]
  	  UNSPEC_COPYSIGN))
!    (clobber (match_scratch:<ssevecmodef> 1 "=Yv,Yv,Yv,Yv,Yv"))]
    "(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
     || (TARGET_SSE && (<MODE>mode == TFmode))"
    "#")
  
  (define_split
!   [(set (match_operand:SSEMODEF 0 "register_operand")
! 	(unspec:SSEMODEF
! 	  [(match_operand:SSEMODEF 2 "register_operand")
! 	   (match_operand:SSEMODEF 3 "register_operand")
! 	   (match_operand:<ssevecmodef> 4)
! 	   (match_operand:<ssevecmodef> 5)]
  	  UNSPEC_COPYSIGN))
!    (clobber (match_scratch:<ssevecmodef> 1))]
    "((SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
      || (TARGET_SSE && (<MODE>mode == TFmode)))
     && reload_completed"
***************
*** 9825,9831 ****
    "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
    "ix86_expand_xorsign (operands); DONE;")
  
! (define_insn_and_split "xorsign<mode>3_1"
    [(set (match_operand:MODEF 0 "register_operand" "=Yv")
  	(unspec:MODEF
  	  [(match_operand:MODEF 1 "register_operand" "Yv")
--- 10196,10202 ----
    "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
    "ix86_expand_xorsign (operands); DONE;")
  
! (define_insn_and_split "@xorsign<mode>3_1"
    [(set (match_operand:MODEF 0 "register_operand" "=Yv")
  	(unspec:MODEF
  	  [(match_operand:MODEF 1 "register_operand" "Yv")
***************
*** 9841,9858 ****
  ;; One complement instructions
  
  (define_expand "one_cmpl<mode>2"
!   [(set (match_operand:SWIM1248x 0 "nonimmediate_operand")
! 	(not:SWIM1248x (match_operand:SWIM1248x 1 "nonimmediate_operand")))]
    ""
    "ix86_expand_unary_operator (NOT, <MODE>mode, operands); DONE;")
  
  (define_insn_and_split "*one_cmpldi2_doubleword"
!   [(set (match_operand:DI 0 "nonimmediate_operand" "=rm")
! 	(not:DI (match_operand:DI 1 "nonimmediate_operand" "0")))]
    "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
!    && ix86_unary_operator_ok (NOT, DImode, operands)"
    "#"
!   "&& reload_completed"
    [(set (match_dup 0)
  	(not:SI (match_dup 1)))
     (set (match_dup 2)
--- 10212,10230 ----
  ;; One complement instructions
  
  (define_expand "one_cmpl<mode>2"
!   [(set (match_operand:SWIM1248s 0 "nonimmediate_operand")
! 	(not:SWIM1248s (match_operand:SWIM1248s 1 "nonimmediate_operand")))]
    ""
    "ix86_expand_unary_operator (NOT, <MODE>mode, operands); DONE;")
  
  (define_insn_and_split "*one_cmpldi2_doubleword"
!   [(set (match_operand:DI 0 "nonimmediate_operand")
! 	(not:DI (match_operand:DI 1 "nonimmediate_operand")))]
    "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
!    && ix86_unary_operator_ok (NOT, DImode, operands)
!    && ix86_pre_reload_split ()"
    "#"
!   "&& 1"
    [(set (match_dup 0)
  	(not:SI (match_dup 1)))
     (set (match_dup 2)
***************
*** 9867,9873 ****
    [(set_attr "type" "negnot")
     (set_attr "mode" "<MODE>")])
  
- ;; ??? Currently never generated - xor is used instead.
  (define_insn "*one_cmplsi2_1_zext"
    [(set (match_operand:DI 0 "register_operand" "=r")
  	(zero_extend:DI
--- 10239,10244 ----
***************
*** 9918,9924 ****
  	      (set (match_dup 1)
  		   (xor:SWI (match_dup 3) (const_int -1)))])])
  
- ;; ??? Currently never generated - xor is used instead.
  (define_insn "*one_cmplsi2_2_zext"
    [(set (reg FLAGS_REG)
  	(compare (not:SI (match_operand:SI 1 "register_operand" "0"))
--- 10289,10294 ----
***************
*** 9986,9992 ****
  	      (match_operand:SI 3 "const_int_operand")) 0)))
     (clobber (reg:CC FLAGS_REG))]
    "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT)) == 0
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 10356,10362 ----
  	      (match_operand:SI 3 "const_int_operand")) 0)))
     (clobber (reg:CC FLAGS_REG))]
    "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT)) == 0
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 10027,10033 ****
  	    (match_operand:QI 3 "const_int_operand"))))
     (clobber (reg:CC FLAGS_REG))]
    "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT)) == 0
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 10397,10403 ----
  	    (match_operand:QI 3 "const_int_operand"))))
     (clobber (reg:CC FLAGS_REG))]
    "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT)) == 0
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 10071,10077 ****
  	(ashift:DWI (match_operand:DWI 1 "nonmemory_operand")
  		    (match_operand:QI 2 "nonmemory_operand")))
     (clobber (reg:CC FLAGS_REG))]
!   "(optimize && flag_peephole2) ? epilogue_completed : reload_completed"
    [(const_int 0)]
    "ix86_split_ashl (operands, NULL_RTX, <MODE>mode); DONE;")
  
--- 10441,10447 ----
  	(ashift:DWI (match_operand:DWI 1 "nonmemory_operand")
  		    (match_operand:QI 2 "nonmemory_operand")))
     (clobber (reg:CC FLAGS_REG))]
!   "epilogue_completed"
    [(const_int 0)]
    "ix86_split_ashl (operands, NULL_RTX, <MODE>mode); DONE;")
  
***************
*** 10124,10130 ****
     (set_attr "amdfam10_decode" "vector")
     (set_attr "bdver1_decode" "vector")])
  
! (define_expand "x86_shift<mode>_adj_1"
    [(set (reg:CCZ FLAGS_REG)
  	(compare:CCZ (and:QI (match_operand:QI 2 "register_operand")
  			     (match_dup 4))
--- 10494,10500 ----
     (set_attr "amdfam10_decode" "vector")
     (set_attr "bdver1_decode" "vector")])
  
! (define_expand "@x86_shift<mode>_adj_1"
    [(set (reg:CCZ FLAGS_REG)
  	(compare:CCZ (and:QI (match_operand:QI 2 "register_operand")
  			     (match_dup 4))
***************
*** 10140,10146 ****
    "TARGET_CMOVE"
    "operands[4] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode));")
  
! (define_expand "x86_shift<mode>_adj_2"
    [(use (match_operand:SWI48 0 "register_operand"))
     (use (match_operand:SWI48 1 "register_operand"))
     (use (match_operand:QI 2 "register_operand"))]
--- 10510,10516 ----
    "TARGET_CMOVE"
    "operands[4] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode));")
  
! (define_expand "@x86_shift<mode>_adj_2"
    [(use (match_operand:SWI48 0 "register_operand"))
     (use (match_operand:SWI48 1 "register_operand"))
     (use (match_operand:QI 2 "register_operand"))]
***************
*** 10182,10188 ****
    "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 10552,10558 ----
    "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 10204,10210 ****
    "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 10574,10580 ----
    "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 10460,10507 ****
  	      (symbol_ref "!TARGET_PARTIAL_REG_STALL")]
  	   (symbol_ref "true")))])
  
! (define_insn "*ashlqi3_1_slp"
!   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
! 	(ashift:QI (match_dup 0)
! 		   (match_operand:QI 1 "nonmemory_operand" "cI")))
     (clobber (reg:CC FLAGS_REG))]
!   "(optimize_function_for_size_p (cfun)
!     || !TARGET_PARTIAL_FLAG_REG_STALL
!     || (operands[1] == const1_rtx
! 	&& (TARGET_SHIFT1
! 	    || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))"
  {
    switch (get_attr_type (insn))
      {
!     case TYPE_ALU1:
!       gcc_assert (operands[1] == const1_rtx);
!       return "add{b}\t%0, %0";
  
      default:
!       if (operands[1] == const1_rtx
  	  && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)))
! 	return "sal{b}\t%0";
        else
! 	return "sal{b}\t{%1, %0|%0, %1}";
      }
  }
    [(set (attr "type")
!      (cond [(and (and (match_test "TARGET_DOUBLE_WITH_ADD")
! 		      (match_operand 0 "register_operand"))
! 		 (match_operand 1 "const1_operand"))
! 	      (const_string "alu1")
  	   ]
! 	   (const_string "ishift1")))
     (set (attr "length_immediate")
       (if_then_else
!        (ior (eq_attr "type" "alu1")
! 	    (and (eq_attr "type" "ishift1")
! 		 (and (match_operand 1 "const1_operand")
  		      (ior (match_test "TARGET_SHIFT1")
  			   (match_test "optimize_function_for_size_p (cfun)")))))
         (const_string "0")
         (const_string "*")))
!    (set_attr "mode" "QI")])
  
  ;; Convert ashift to the lea pattern to avoid flags dependency.
  (define_split
--- 10830,10874 ----
  	      (symbol_ref "!TARGET_PARTIAL_REG_STALL")]
  	   (symbol_ref "true")))])
  
! (define_insn "*ashl<mode>3_1_slp"
!   [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>"))
! 	(ashift:SWI12 (match_operand:SWI12 1 "register_operand" "0")
! 		      (match_operand:QI 2 "nonmemory_operand" "cI")))
     (clobber (reg:CC FLAGS_REG))]
!   "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
!    /* FIXME: without this LRA can't reload this pattern, see PR82524.  */
!    && rtx_equal_p (operands[0], operands[1])"
  {
    switch (get_attr_type (insn))
      {
!     case TYPE_ALU:
!       gcc_assert (operands[2] == const1_rtx);
!       return "add{<imodesuffix>}\t%0, %0";
  
      default:
!       if (operands[2] == const1_rtx
  	  && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)))
! 	return "sal{<imodesuffix>}\t%0";
        else
! 	return "sal{<imodesuffix>}\t{%2, %0|%0, %2}";
      }
  }
    [(set (attr "type")
!      (cond [(and (match_test "TARGET_DOUBLE_WITH_ADD")
! 		 (match_operand 2 "const1_operand"))
! 	      (const_string "alu")
  	   ]
! 	   (const_string "ishift")))
     (set (attr "length_immediate")
       (if_then_else
!        (ior (eq_attr "type" "alu")
! 	    (and (eq_attr "type" "ishift")
! 		 (and (match_operand 2 "const1_operand")
  		      (ior (match_test "TARGET_SHIFT1")
  			   (match_test "optimize_function_for_size_p (cfun)")))))
         (const_string "0")
         (const_string "*")))
!    (set_attr "mode" "<MODE>")])
  
  ;; Convert ashift to the lea pattern to avoid flags dependency.
  (define_split
***************
*** 10705,10711 ****
    "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 11072,11078 ----
    "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 10727,10733 ****
    "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 11094,11100 ----
    "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 10748,10754 ****
  	      (match_operand:SI 3 "const_int_operand")) 0)))
     (clobber (reg:CC FLAGS_REG))]
    "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT)) == 0
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 11115,11121 ----
  	      (match_operand:SI 3 "const_int_operand")) 0)))
     (clobber (reg:CC FLAGS_REG))]
    "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT)) == 0
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 10789,10795 ****
  	    (match_operand:QI 3 "const_int_operand"))))
     (clobber (reg:CC FLAGS_REG))]
    "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT)) == 0
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 11156,11162 ----
  	    (match_operand:QI 3 "const_int_operand"))))
     (clobber (reg:CC FLAGS_REG))]
    "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT)) == 0
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 10826,10832 ****
     (clobber (reg:CC FLAGS_REG))]
    ""
    "#"
!   "(optimize && flag_peephole2) ? epilogue_completed : reload_completed"
    [(const_int 0)]
    "ix86_split_<shift_insn> (operands, NULL_RTX, <MODE>mode); DONE;"
    [(set_attr "type" "multi")])
--- 11193,11199 ----
     (clobber (reg:CC FLAGS_REG))]
    ""
    "#"
!   "epilogue_completed"
    [(const_int 0)]
    "ix86_split_<shift_insn> (operands, NULL_RTX, <MODE>mode); DONE;"
    [(set_attr "type" "multi")])
***************
*** 10880,10901 ****
     (set_attr "amdfam10_decode" "vector")
     (set_attr "bdver1_decode" "vector")])
  
! (define_insn "ashrdi3_cvt"
!   [(set (match_operand:DI 0 "nonimmediate_operand" "=*d,rm")
! 	(ashiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "*a,0")
! 		     (match_operand:QI 2 "const_int_operand")))
     (clobber (reg:CC FLAGS_REG))]
!   "TARGET_64BIT && INTVAL (operands[2]) == 63
     && (TARGET_USE_CLTD || optimize_function_for_size_p (cfun))
!    && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)"
    "@
!    {cqto|cqo}
!    sar{q}\t{%2, %0|%0, %2}"
    [(set_attr "type" "imovx,ishift")
     (set_attr "prefix_0f" "0,*")
     (set_attr "length_immediate" "0,*")
     (set_attr "modrm" "0,1")
!    (set_attr "mode" "DI")])
  
  (define_insn "*ashrsi3_cvt_zext"
    [(set (match_operand:DI 0 "register_operand" "=*d,r")
--- 11247,11273 ----
     (set_attr "amdfam10_decode" "vector")
     (set_attr "bdver1_decode" "vector")])
  
! ;; Base name for insn mnemonic.
! (define_mode_attr cvt_mnemonic
!   [(SI "{cltd|cdq}") (DI "{cqto|cqo}")])
! 
! (define_insn "ashr<mode>3_cvt"
!   [(set (match_operand:SWI48 0 "nonimmediate_operand" "=*d,rm")
! 	(ashiftrt:SWI48
! 	  (match_operand:SWI48 1 "nonimmediate_operand" "*a,0")
! 	  (match_operand:QI 2 "const_int_operand")))
     (clobber (reg:CC FLAGS_REG))]
!   "INTVAL (operands[2]) == GET_MODE_BITSIZE (<MODE>mode)-1
     && (TARGET_USE_CLTD || optimize_function_for_size_p (cfun))
!    && ix86_binary_operator_ok (ASHIFTRT, <MODE>mode, operands)"
    "@
!    <cvt_mnemonic>
!    sar{<imodesuffix>}\t{%2, %0|%0, %2}"
    [(set_attr "type" "imovx,ishift")
     (set_attr "prefix_0f" "0,*")
     (set_attr "length_immediate" "0,*")
     (set_attr "modrm" "0,1")
!    (set_attr "mode" "<MODE>")])
  
  (define_insn "*ashrsi3_cvt_zext"
    [(set (match_operand:DI 0 "register_operand" "=*d,r")
***************
*** 10915,10938 ****
     (set_attr "modrm" "0,1")
     (set_attr "mode" "SI")])
  
! (define_insn "ashrsi3_cvt"
!   [(set (match_operand:SI 0 "nonimmediate_operand" "=*d,rm")
! 	(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "*a,0")
! 		     (match_operand:QI 2 "const_int_operand")))
!    (clobber (reg:CC FLAGS_REG))]
!   "INTVAL (operands[2]) == 31
!    && (TARGET_USE_CLTD || optimize_function_for_size_p (cfun))
!    && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
!   "@
!    {cltd|cdq}
!    sar{l}\t{%2, %0|%0, %2}"
!   [(set_attr "type" "imovx,ishift")
!    (set_attr "prefix_0f" "0,*")
!    (set_attr "length_immediate" "0,*")
!    (set_attr "modrm" "0,1")
!    (set_attr "mode" "SI")])
! 
! (define_expand "x86_shift<mode>_adj_3"
    [(use (match_operand:SWI48 0 "register_operand"))
     (use (match_operand:SWI48 1 "register_operand"))
     (use (match_operand:QI 2 "register_operand"))]
--- 11287,11293 ----
     (set_attr "modrm" "0,1")
     (set_attr "mode" "SI")])
  
! (define_expand "@x86_shift<mode>_adj_3"
    [(use (match_operand:SWI48 0 "register_operand"))
     (use (match_operand:SWI48 1 "register_operand"))
     (use (match_operand:QI 2 "register_operand"))]
***************
*** 11091,11121 ****
         (const_string "*")))
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*<shift_insn>qi3_1_slp"
!   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
! 	(any_shiftrt:QI (match_dup 0)
! 			(match_operand:QI 1 "nonmemory_operand" "cI")))
     (clobber (reg:CC FLAGS_REG))]
!   "(optimize_function_for_size_p (cfun)
!     || !TARGET_PARTIAL_REG_STALL
!     || (operands[1] == const1_rtx
! 	&& TARGET_SHIFT1))"
  {
!   if (operands[1] == const1_rtx
        && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)))
!     return "<shift>{b}\t%0";
    else
!     return "<shift>{b}\t{%1, %0|%0, %1}";
  }
!   [(set_attr "type" "ishift1")
     (set (attr "length_immediate")
       (if_then_else
!        (and (match_operand 1 "const1_operand")
  	    (ior (match_test "TARGET_SHIFT1")
  		 (match_test "optimize_function_for_size_p (cfun)")))
         (const_string "0")
         (const_string "*")))
!    (set_attr "mode" "QI")])
  
  ;; This pattern can't accept a variable shift count, since shifts by
  ;; zero don't affect the flags.  We assume that shifts by constant
--- 11446,11475 ----
         (const_string "*")))
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*<shift_insn><mode>3_1_slp"
!   [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>"))
! 	(any_shiftrt:SWI12 (match_operand:SWI12 1 "register_operand" "0")
! 			   (match_operand:QI 2 "nonmemory_operand" "cI")))
     (clobber (reg:CC FLAGS_REG))]
!   "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
!    /* FIXME: without this LRA can't reload this pattern, see PR82524.  */
!    && rtx_equal_p (operands[0], operands[1])"
  {
!   if (operands[2] == const1_rtx
        && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)))
!     return "<shift>{<imodesuffix>}\t%0";
    else
!     return "<shift>{<imodesuffix>}\t{%2, %0|%0, %2}";
  }
!   [(set_attr "type" "ishift")
     (set (attr "length_immediate")
       (if_then_else
!        (and (match_operand 2 "const1_operand")
  	    (ior (match_test "TARGET_SHIFT1")
  		 (match_test "optimize_function_for_size_p (cfun)")))
         (const_string "0")
         (const_string "*")))
!    (set_attr "mode" "<MODE>")])
  
  ;; This pattern can't accept a variable shift count, since shifts by
  ;; zero don't affect the flags.  We assume that shifts by constant
***************
*** 11268,11274 ****
    "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 11622,11628 ----
    "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 11289,11295 ****
    "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 11643,11649 ----
    "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 11520,11550 ****
         (const_string "*")))
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*<rotate_insn>qi3_1_slp"
!   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
! 	(any_rotate:QI (match_dup 0)
! 		       (match_operand:QI 1 "nonmemory_operand" "cI")))
     (clobber (reg:CC FLAGS_REG))]
!   "(optimize_function_for_size_p (cfun)
!     || !TARGET_PARTIAL_REG_STALL
!     || (operands[1] == const1_rtx
! 	&& TARGET_SHIFT1))"
  {
!   if (operands[1] == const1_rtx
        && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)))
!     return "<rotate>{b}\t%0";
    else
!     return "<rotate>{b}\t{%1, %0|%0, %1}";
  }
!   [(set_attr "type" "rotate1")
     (set (attr "length_immediate")
       (if_then_else
!        (and (match_operand 1 "const1_operand")
  	    (ior (match_test "TARGET_SHIFT1")
  		 (match_test "optimize_function_for_size_p (cfun)")))
         (const_string "0")
         (const_string "*")))
!    (set_attr "mode" "QI")])
  
  (define_split
   [(set (match_operand:HI 0 "QIreg_operand")
--- 11874,11903 ----
         (const_string "*")))
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*<rotate_insn><mode>3_1_slp"
!   [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>"))
! 	(any_rotate:SWI12 (match_operand:SWI12 1 "register_operand" "0")
! 			  (match_operand:QI 2 "nonmemory_operand" "cI")))
     (clobber (reg:CC FLAGS_REG))]
!   "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
!    /* FIXME: without this LRA can't reload this pattern, see PR82524.  */
!    && rtx_equal_p (operands[0], operands[1])"
  {
!   if (operands[2] == const1_rtx
        && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)))
!     return "<rotate>{<imodesuffix>}\t%0";
    else
!     return "<rotate>{<imodesuffix>}\t{%2, %0|%0, %2}";
  }
!   [(set_attr "type" "rotate")
     (set (attr "length_immediate")
       (if_then_else
!        (and (match_operand 2 "const1_operand")
  	    (ior (match_test "TARGET_SHIFT1")
  		 (match_test "optimize_function_for_size_p (cfun)")))
         (const_string "0")
         (const_string "*")))
!    (set_attr "mode" "<MODE>")])
  
  (define_split
   [(set (match_operand:HI 0 "QIreg_operand")
***************
*** 11593,11599 ****
    "TARGET_USE_BT
     && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 11946,11952 ----
    "TARGET_USE_BT
     && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 11618,11624 ****
    "TARGET_USE_BT
     && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 11971,11977 ----
    "TARGET_USE_BT
     && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 11658,11664 ****
    "TARGET_USE_BT
     && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 12011,12017 ----
    "TARGET_USE_BT
     && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 11683,11689 ****
    "TARGET_USE_BT
     && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(parallel
--- 12036,12042 ----
    "TARGET_USE_BT
     && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(parallel
***************
*** 11868,11874 ****
  	  && INTVAL (operands[2])
  	       >= (optimize_function_for_size_p (cfun) ? 8 : 32))
         : !memory_operand (operands[1], <MODE>mode))
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(set (reg:CCC FLAGS_REG)
--- 12221,12227 ----
  	  && INTVAL (operands[2])
  	       >= (optimize_function_for_size_p (cfun) ? 8 : 32))
         : !memory_operand (operands[1], <MODE>mode))
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(set (reg:CCC FLAGS_REG)
***************
*** 11900,11906 ****
  		      (pc)))
     (clobber (reg:CC FLAGS_REG))]
    "(TARGET_USE_BT || optimize_function_for_size_p (cfun))
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(set (reg:CCC FLAGS_REG)
--- 12253,12259 ----
  		      (pc)))
     (clobber (reg:CC FLAGS_REG))]
    "(TARGET_USE_BT || optimize_function_for_size_p (cfun))
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(set (reg:CCC FLAGS_REG)
***************
*** 11936,11942 ****
    "(TARGET_USE_BT || optimize_function_for_size_p (cfun))
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(set (reg:CCC FLAGS_REG)
--- 12289,12295 ----
    "(TARGET_USE_BT || optimize_function_for_size_p (cfun))
     && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
        == GET_MODE_BITSIZE (<MODE>mode)-1
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(set (reg:CCC FLAGS_REG)
***************
*** 12019,12025 ****
     (set_attr "mode" "QI")])
  
  (define_insn "*setcc_qi_slp"
!   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
  	(match_operator:QI 1 "ix86_comparison_operator"
  	  [(reg FLAGS_REG) (const_int 0)]))]
    ""
--- 12372,12378 ----
     (set_attr "mode" "QI")])
  
  (define_insn "*setcc_qi_slp"
!   [(set (strict_low_part (match_operand:QI 0 "register_operand" "+q"))
  	(match_operator:QI 1 "ix86_comparison_operator"
  	  [(reg FLAGS_REG) (const_int 0)]))]
    ""
***************
*** 12048,12054 ****
  })
  
  (define_split
!   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand"))
  	(ne:QI (match_operator 1 "ix86_comparison_operator"
  	         [(reg FLAGS_REG) (const_int 0)])
  	    (const_int 0)))]
--- 12401,12407 ----
  })
  
  (define_split
!   [(set (strict_low_part (match_operand:QI 0 "register_operand"))
  	(ne:QI (match_operator 1 "ix86_comparison_operator"
  	         [(reg FLAGS_REG) (const_int 0)])
  	    (const_int 0)))]
***************
*** 12080,12086 ****
  })
  
  (define_split
!   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand"))
  	(eq:QI (match_operator 1 "ix86_comparison_operator"
  	         [(reg FLAGS_REG) (const_int 0)])
  	    (const_int 0)))]
--- 12433,12439 ----
  })
  
  (define_split
!   [(set (strict_low_part (match_operand:QI 0 "register_operand"))
  	(eq:QI (match_operator 1 "ix86_comparison_operator"
  	         [(reg FLAGS_REG) (const_int 0)])
  	    (const_int 0)))]
***************
*** 13200,13206 ****
    [(const_int 0)]
    "ix86_expand_epilogue (2); DONE;")
  
! (define_insn "leave"
    [(set (reg:SI SP_REG) (plus:SI (reg:SI BP_REG) (const_int 4)))
     (set (reg:SI BP_REG) (mem:SI (reg:SI BP_REG)))
     (clobber (mem:BLK (scratch)))]
--- 13553,13567 ----
    [(const_int 0)]
    "ix86_expand_epilogue (2); DONE;")
  
! (define_expand "@leave_<mode>"
!   [(parallel
!     [(set (reg:W SP_REG) (plus:W (reg:W BP_REG) (match_dup 0)))
!      (set (reg:W BP_REG) (mem:W (reg:W BP_REG)))
!      (clobber (mem:BLK (scratch)))])]
!   ""
!   "operands[0] = GEN_INT (<MODE_SIZE>);")
! 
! (define_insn "*leave"
    [(set (reg:SI SP_REG) (plus:SI (reg:SI BP_REG) (const_int 4)))
     (set (reg:SI BP_REG) (mem:SI (reg:SI BP_REG)))
     (clobber (mem:BLK (scratch)))]
***************
*** 13208,13214 ****
    "leave"
    [(set_attr "type" "leave")])
  
! (define_insn "leave_rex64"
    [(set (reg:DI SP_REG) (plus:DI (reg:DI BP_REG) (const_int 8)))
     (set (reg:DI BP_REG) (mem:DI (reg:DI BP_REG)))
     (clobber (mem:BLK (scratch)))]
--- 13569,13575 ----
    "leave"
    [(set_attr "type" "leave")])
  
! (define_insn "*leave_rex64"
    [(set (reg:DI SP_REG) (plus:DI (reg:DI BP_REG) (const_int 8)))
     (set (reg:DI BP_REG) (mem:DI (reg:DI BP_REG)))
     (clobber (mem:BLK (scratch)))]
***************
*** 13786,13791 ****
--- 14147,14181 ----
     (set_attr "prefix" "vex")
     (set_attr "mode" "<MODE>")])
  
+ (define_insn "*bmi2_bzhi_<mode>3_2"
+   [(set (match_operand:SWI48 0 "register_operand" "=r")
+ 	(and:SWI48
+ 	  (plus:SWI48
+ 	    (ashift:SWI48 (const_int 1)
+ 			  (match_operand:QI 2 "register_operand" "r"))
+ 	    (const_int -1))
+ 	  (match_operand:SWI48 1 "nonimmediate_operand" "rm")))
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_BMI2"
+   "bzhi\t{%<k>2, %1, %0|%0, %1, %<k>2}"
+   [(set_attr "type" "bitmanip")
+    (set_attr "prefix" "vex")
+    (set_attr "mode" "<MODE>")])
+ 
+ (define_insn "*bmi2_bzhi_<mode>3_3"
+   [(set (match_operand:SWI48 0 "register_operand" "=r")
+ 	(and:SWI48
+ 	  (not:SWI48
+ 	    (ashift:SWI48 (const_int -1)
+ 			  (match_operand:QI 2 "register_operand" "r")))
+ 	  (match_operand:SWI48 1 "nonimmediate_operand" "rm")))
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_BMI2"
+   "bzhi\t{%<k>2, %1, %0|%0, %1, %<k>2}"
+   [(set_attr "type" "bitmanip")
+    (set_attr "prefix" "vex")
+    (set_attr "mode" "<MODE>")])
+ 
  (define_insn "bmi2_pdep_<mode>3"
    [(set (match_operand:SWI48 0 "register_operand" "=r")
          (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r")
***************
*** 14015,14027 ****
     (set_attr "type" "bitmanip")
     (set_attr "mode" "<MODE>")])
  
  (define_insn_and_split "*popcounthi2_1"
    [(set (match_operand:SI 0 "register_operand")
  	(popcount:SI
  	  (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand"))))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_POPCNT
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(const_int 0)]
--- 14405,14471 ----
     (set_attr "type" "bitmanip")
     (set_attr "mode" "<MODE>")])
  
+ (define_insn_and_split "*popcountsi2_zext"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(and:DI
+ 	  (subreg:DI
+ 	    (popcount:SI
+ 	      (match_operand:SI 1 "nonimmediate_operand" "rm")) 0)
+ 	  (const_int 63)))
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_POPCNT && TARGET_64BIT"
+ {
+ #if TARGET_MACHO
+   return "popcnt\t{%1, %k0|%k0, %1}";
+ #else
+   return "popcnt{l}\t{%1, %k0|%k0, %1}";
+ #endif
+ }
+   "&& TARGET_AVOID_FALSE_DEP_FOR_BMI && epilogue_completed
+    && optimize_function_for_speed_p (cfun)
+    && !reg_mentioned_p (operands[0], operands[1])"
+   [(parallel
+     [(set (match_dup 0)
+ 	  (and:DI (subreg:DI (popcount:SI (match_dup 1)) 0) (const_int 63)))
+      (unspec [(match_dup 0)] UNSPEC_INSN_FALSE_DEP)
+      (clobber (reg:CC FLAGS_REG))])]
+   "ix86_expand_clear (operands[0]);"
+   [(set_attr "prefix_rep" "1")
+    (set_attr "type" "bitmanip")
+    (set_attr "mode" "SI")])
+ 
+ ; False dependency happens when destination is only updated by tzcnt,
+ ; lzcnt or popcnt.  There is no false dependency when destination is
+ ; also used in source.
+ (define_insn "*popcountsi2_zext_falsedep"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(and:DI
+ 	  (subreg:DI
+ 	    (popcount:SI
+ 	      (match_operand:SI 1 "nonimmediate_operand" "rm")) 0)
+ 	  (const_int 63)))
+    (unspec [(match_operand:DI 2 "register_operand" "0")]
+ 	   UNSPEC_INSN_FALSE_DEP)
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_POPCNT && TARGET_64BIT"
+ {
+ #if TARGET_MACHO
+   return "popcnt\t{%1, %k0|%k0, %1}";
+ #else
+   return "popcnt{l}\t{%1, %k0|%k0, %1}";
+ #endif
+ }
+   [(set_attr "prefix_rep" "1")
+    (set_attr "type" "bitmanip")
+    (set_attr "mode" "SI")])
+ 
  (define_insn_and_split "*popcounthi2_1"
    [(set (match_operand:SI 0 "register_operand")
  	(popcount:SI
  	  (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand"))))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_POPCNT
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(const_int 0)]
***************
*** 14377,14383 ****
    [(set_attr "type" "multi")
     (set_attr "length" "22")])
  
! (define_expand "tls_global_dynamic_64_<mode>"
    [(parallel
      [(set (match_operand:P 0 "register_operand")
  	  (call:P
--- 14821,14827 ----
    [(set_attr "type" "multi")
     (set_attr "length" "22")])
  
! (define_expand "@tls_global_dynamic_64_<mode>"
    [(parallel
      [(set (match_operand:P 0 "register_operand")
  	  (call:P
***************
*** 14471,14477 ****
    [(set_attr "type" "multi")
     (set_attr "length" "22")])
  
! (define_expand "tls_local_dynamic_base_64_<mode>"
    [(parallel
       [(set (match_operand:P 0 "register_operand")
  	   (call:P
--- 14915,14921 ----
    [(set_attr "type" "multi")
     (set_attr "length" "22")])
  
! (define_expand "@tls_local_dynamic_base_64_<mode>"
    [(parallel
       [(set (match_operand:P 0 "register_operand")
  	   (call:P
***************
*** 14667,14704 ****
    emit_insn (gen_tls_dynamic_gnu2_32 (operands[5], operands[1], operands[2]));
  })
  
! (define_expand "tls_dynamic_gnu2_64"
    [(set (match_dup 2)
! 	(unspec:DI [(match_operand 1 "tls_symbolic_operand")]
! 		   UNSPEC_TLSDESC))
     (parallel
!     [(set (match_operand:DI 0 "register_operand")
! 	  (unspec:DI [(match_dup 1) (match_dup 2) (reg:DI SP_REG)]
! 		     UNSPEC_TLSDESC))
       (clobber (reg:CC FLAGS_REG))])]
    "TARGET_64BIT && TARGET_GNU2_TLS"
  {
!   operands[2] = can_create_pseudo_p () ? gen_reg_rtx (Pmode) : operands[0];
    ix86_tls_descriptor_calls_expanded_in_cfun = true;
  })
  
! (define_insn "*tls_dynamic_gnu2_lea_64"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(unspec:DI [(match_operand 1 "tls_symbolic_operand")]
! 		   UNSPEC_TLSDESC))]
    "TARGET_64BIT && TARGET_GNU2_TLS"
!   "lea{q}\t{%E1@TLSDESC(%%rip), %0|%0, %E1@TLSDESC[rip]}"
    [(set_attr "type" "lea")
!    (set_attr "mode" "DI")
     (set_attr "length" "7")
     (set_attr "length_address" "4")])
  
! (define_insn "*tls_dynamic_gnu2_call_64"
!   [(set (match_operand:DI 0 "register_operand" "=a")
! 	(unspec:DI [(match_operand 1 "tls_symbolic_operand")
! 		    (match_operand:DI 2 "register_operand" "0")
! 		    (reg:DI SP_REG)]
! 		   UNSPEC_TLSDESC))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT && TARGET_GNU2_TLS"
    "call\t{*%a1@TLSCALL(%2)|[QWORD PTR [%2+%a1@TLSCALL]]}"
--- 15111,15148 ----
    emit_insn (gen_tls_dynamic_gnu2_32 (operands[5], operands[1], operands[2]));
  })
  
! (define_expand "@tls_dynamic_gnu2_64_<mode>"
    [(set (match_dup 2)
! 	(unspec:PTR [(match_operand 1 "tls_symbolic_operand")]
! 		    UNSPEC_TLSDESC))
     (parallel
!     [(set (match_operand:PTR 0 "register_operand")
! 	  (unspec:PTR [(match_dup 1) (match_dup 2) (reg:PTR SP_REG)]
! 		      UNSPEC_TLSDESC))
       (clobber (reg:CC FLAGS_REG))])]
    "TARGET_64BIT && TARGET_GNU2_TLS"
  {
!   operands[2] = can_create_pseudo_p () ? gen_reg_rtx (ptr_mode) : operands[0];
    ix86_tls_descriptor_calls_expanded_in_cfun = true;
  })
  
! (define_insn "*tls_dynamic_gnu2_lea_64_<mode>"
!   [(set (match_operand:PTR 0 "register_operand" "=r")
! 	(unspec:PTR [(match_operand 1 "tls_symbolic_operand")]
! 		    UNSPEC_TLSDESC))]
    "TARGET_64BIT && TARGET_GNU2_TLS"
!   "lea%z0\t{%E1@TLSDESC(%%rip), %0|%0, %E1@TLSDESC[rip]}"
    [(set_attr "type" "lea")
!    (set_attr "mode" "<MODE>")
     (set_attr "length" "7")
     (set_attr "length_address" "4")])
  
! (define_insn "*tls_dynamic_gnu2_call_64_<mode>"
!   [(set (match_operand:PTR 0 "register_operand" "=a")
! 	(unspec:PTR [(match_operand 1 "tls_symbolic_operand")
! 		   (match_operand:PTR 2 "register_operand" "0")
! 		   (reg:PTR SP_REG)]
! 		  UNSPEC_TLSDESC))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT && TARGET_GNU2_TLS"
    "call\t{*%a1@TLSCALL(%2)|[QWORD PTR [%2+%a1@TLSCALL]]}"
***************
*** 14706,14729 ****
     (set_attr "length" "2")
     (set_attr "length_address" "0")])
  
! (define_insn_and_split "*tls_dynamic_gnu2_combine_64"
!   [(set (match_operand:DI 0 "register_operand" "=&a")
! 	(plus:DI
! 	 (unspec:DI [(match_operand 2 "tls_modbase_operand")
! 		     (match_operand:DI 3)
! 		     (reg:DI SP_REG)]
! 		    UNSPEC_TLSDESC)
! 	 (const:DI (unspec:DI
! 		    [(match_operand 1 "tls_symbolic_operand")]
! 		    UNSPEC_DTPOFF))))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT && TARGET_GNU2_TLS"
    "#"
    ""
    [(set (match_dup 0) (match_dup 4))]
  {
!   operands[4] = can_create_pseudo_p () ? gen_reg_rtx (Pmode) : operands[0];
!   emit_insn (gen_tls_dynamic_gnu2_64 (operands[4], operands[1]));
  })
  
  (define_split
--- 15150,15173 ----
     (set_attr "length" "2")
     (set_attr "length_address" "0")])
  
! (define_insn_and_split "*tls_dynamic_gnu2_combine_64_<mode>"
!   [(set (match_operand:PTR 0 "register_operand" "=&a")
! 	(plus:PTR
! 	 (unspec:PTR [(match_operand 2 "tls_modbase_operand")
! 		      (match_operand:PTR 3)
! 		      (reg:PTR SP_REG)]
! 		     UNSPEC_TLSDESC)
! 	 (const:PTR (unspec:PTR
! 		     [(match_operand 1 "tls_symbolic_operand")]
! 		     UNSPEC_DTPOFF))))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_64BIT && TARGET_GNU2_TLS"
    "#"
    ""
    [(set (match_dup 0) (match_dup 4))]
  {
!   operands[4] = can_create_pseudo_p () ? gen_reg_rtx (ptr_mode) : operands[0];
!   emit_insn (gen_tls_dynamic_gnu2_64 (ptr_mode, operands[4], operands[1]));
  })
  
  (define_split
***************
*** 14806,14818 ****
     (set_attr "btver2_sse_attr" "rcp")
     (set_attr "prefix" "maybe_vex")
     (set_attr "mode" "SF")
     (set (attr "preferred_for_speed")
!      (cond [(eq_attr "alternative" "1")
! 	      (symbol_ref "TARGET_AVX || !TARGET_SSE_PARTIAL_REG_DEPENDENCY")
! 	   (eq_attr "alternative" "2")
! 	      (symbol_ref "!TARGET_SSE_PARTIAL_REG_DEPENDENCY")
! 	   ]
! 	   (symbol_ref "true")))])
  
  (define_insn "*fop_xf_1_i387"
    [(set (match_operand:XF 0 "register_operand" "=f,f")
--- 15250,15263 ----
     (set_attr "btver2_sse_attr" "rcp")
     (set_attr "prefix" "maybe_vex")
     (set_attr "mode" "SF")
+    (set_attr "avx_partial_xmm_update" "false,false,true")
     (set (attr "preferred_for_speed")
!       (cond [(match_test "TARGET_AVX")
! 	       (symbol_ref "true")
! 	     (eq_attr "alternative" "1,2")
! 	       (symbol_ref "!TARGET_SSE_PARTIAL_REG_DEPENDENCY")
! 	    ]
! 	    (symbol_ref "true")))])
  
  (define_insn "*fop_xf_1_i387"
    [(set (match_operand:XF 0 "register_operand" "=f,f")
***************
*** 14904,14910 ****
  	      ]
  	      (const_string "fop")))
     (set_attr "fp_int_src" "true")
!    (set_attr "mode" "<MODE>")])
  
  (define_insn "*fop_xf_4_i387"
    [(set (match_operand:XF 0 "register_operand" "=f,f")
--- 15349,15355 ----
  	      ]
  	      (const_string "fop")))
     (set_attr "fp_int_src" "true")
!    (set_attr "mode" "<SWI24:MODE>")])
  
  (define_insn "*fop_xf_4_i387"
    [(set (match_operand:XF 0 "register_operand" "=f,f")
***************
*** 15052,15064 ****
     (set_attr "btver2_sse_attr" "rcp")
     (set_attr "prefix" "maybe_vex")
     (set_attr "mode" "SF")
     (set (attr "preferred_for_speed")
!      (cond [(eq_attr "alternative" "1")
! 	      (symbol_ref "TARGET_AVX || !TARGET_SSE_PARTIAL_REG_DEPENDENCY")
! 	   (eq_attr "alternative" "2")
! 	      (symbol_ref "!TARGET_SSE_PARTIAL_REG_DEPENDENCY")
! 	   ]
! 	   (symbol_ref "true")))])
  
  (define_expand "rsqrtsf2"
    [(set (match_operand:SF 0 "register_operand")
--- 15497,15510 ----
     (set_attr "btver2_sse_attr" "rcp")
     (set_attr "prefix" "maybe_vex")
     (set_attr "mode" "SF")
+    (set_attr "avx_partial_xmm_update" "false,false,true")
     (set (attr "preferred_for_speed")
!       (cond [(match_test "TARGET_AVX")
! 	       (symbol_ref "true")
! 	     (eq_attr "alternative" "1,2")
! 	       (symbol_ref "!TARGET_SSE_PARTIAL_REG_DEPENDENCY")
! 	    ]
! 	    (symbol_ref "true")))])
  
  (define_expand "rsqrtsf2"
    [(set (match_operand:SF 0 "register_operand")
***************
*** 15083,15096 ****
     (set_attr "atom_sse_attr" "sqrt")
     (set_attr "btver2_sse_attr" "sqrt")
     (set_attr "prefix" "maybe_vex")
     (set_attr "mode" "<MODE>")
     (set (attr "preferred_for_speed")
!      (cond [(eq_attr "alternative" "1")
! 	      (symbol_ref "TARGET_AVX || !TARGET_SSE_PARTIAL_REG_DEPENDENCY")
! 	   (eq_attr "alternative" "2")
! 	      (symbol_ref "!TARGET_SSE_PARTIAL_REG_DEPENDENCY")
! 	   ]
! 	   (symbol_ref "true")))])
  
  (define_expand "sqrt<mode>2"
    [(set (match_operand:MODEF 0 "register_operand")
--- 15529,15543 ----
     (set_attr "atom_sse_attr" "sqrt")
     (set_attr "btver2_sse_attr" "sqrt")
     (set_attr "prefix" "maybe_vex")
+    (set_attr "avx_partial_xmm_update" "false,false,true")
     (set_attr "mode" "<MODE>")
     (set (attr "preferred_for_speed")
!       (cond [(match_test "TARGET_AVX")
! 	       (symbol_ref "true")
! 	     (eq_attr "alternative" "1,2")
! 	       (symbol_ref "!TARGET_SSE_PARTIAL_REG_DEPENDENCY")
! 	    ]
! 	    (symbol_ref "true")))])
  
  (define_expand "sqrt<mode>2"
    [(set (match_operand:MODEF 0 "register_operand")
***************
*** 16224,16253 ****
  
  
  (define_insn "sse4_1_round<mode>2"
!   [(set (match_operand:MODEF 0 "register_operand" "=x,x,x,v")
  	(unspec:MODEF
! 	  [(match_operand:MODEF 1 "nonimmediate_operand" "0,x,m,vm")
! 	   (match_operand:SI 2 "const_0_to_15_operand" "n,n,n,n")]
  	  UNSPEC_ROUND))]
    "TARGET_SSE4_1"
    "@
     %vround<ssemodesuffix>\t{%2, %d1, %0|%0, %d1, %2}
     %vround<ssemodesuffix>\t{%2, %d1, %0|%0, %d1, %2}
     %vround<ssemodesuffix>\t{%2, %1, %d0|%d0, %1, %2}
     vrndscale<ssemodesuffix>\t{%2, %1, %d0|%d0, %1, %2}"
    [(set_attr "type" "ssecvt")
!    (set_attr "prefix_extra" "1,1,1,*")
!    (set_attr "length_immediate" "*,*,*,1")
!    (set_attr "prefix" "maybe_vex,maybe_vex,maybe_vex,evex")
!    (set_attr "isa" "noavx512f,noavx512f,noavx512f,avx512f")
     (set_attr "mode" "<MODE>")
     (set (attr "preferred_for_speed")
!      (cond [(eq_attr "alternative" "1")
! 	      (symbol_ref "TARGET_AVX || !TARGET_SSE_PARTIAL_REG_DEPENDENCY")
! 	   (eq_attr "alternative" "2")
! 	      (symbol_ref "!TARGET_SSE_PARTIAL_REG_DEPENDENCY")
! 	   ]
! 	   (symbol_ref "true")))])
  
  (define_insn "rintxf2"
    [(set (match_operand:XF 0 "register_operand" "=f")
--- 16671,16702 ----
  
  
  (define_insn "sse4_1_round<mode>2"
!   [(set (match_operand:MODEF 0 "register_operand" "=x,x,x,v,v")
  	(unspec:MODEF
! 	  [(match_operand:MODEF 1 "nonimmediate_operand" "0,x,m,v,m")
! 	   (match_operand:SI 2 "const_0_to_15_operand" "n,n,n,n,n")]
  	  UNSPEC_ROUND))]
    "TARGET_SSE4_1"
    "@
     %vround<ssemodesuffix>\t{%2, %d1, %0|%0, %d1, %2}
     %vround<ssemodesuffix>\t{%2, %d1, %0|%0, %d1, %2}
     %vround<ssemodesuffix>\t{%2, %1, %d0|%d0, %1, %2}
+    vrndscale<ssemodesuffix>\t{%2, %d1, %0|%0, %d1, %2}
     vrndscale<ssemodesuffix>\t{%2, %1, %d0|%d0, %1, %2}"
    [(set_attr "type" "ssecvt")
!    (set_attr "prefix_extra" "1,1,1,*,*")
!    (set_attr "length_immediate" "*,*,*,1,1")
!    (set_attr "prefix" "maybe_vex,maybe_vex,maybe_vex,evex,evex")
!    (set_attr "isa" "noavx512f,noavx512f,noavx512f,avx512f,avx512f")
!    (set_attr "avx_partial_xmm_update" "false,false,true,false,true")
     (set_attr "mode" "<MODE>")
     (set (attr "preferred_for_speed")
!       (cond [(match_test "TARGET_AVX")
! 	       (symbol_ref "true")
! 	     (eq_attr "alternative" "1,2")
! 	       (symbol_ref "!TARGET_SSE_PARTIAL_REG_DEPENDENCY")
! 	    ]
! 	    (symbol_ref "true")))])
  
  (define_insn "rintxf2"
    [(set (match_operand:XF 0 "register_operand" "=f")
***************
*** 16400,16406 ****
  })
  
  (define_int_iterator FRNDINT_ROUNDING
! 	[UNSPEC_FRNDINT_FLOOR
  	 UNSPEC_FRNDINT_CEIL
  	 UNSPEC_FRNDINT_TRUNC])
  
--- 16849,16856 ----
  })
  
  (define_int_iterator FRNDINT_ROUNDING
! 	[UNSPEC_FRNDINT_ROUNDEVEN
! 	 UNSPEC_FRNDINT_FLOOR
  	 UNSPEC_FRNDINT_CEIL
  	 UNSPEC_FRNDINT_TRUNC])
  
***************
*** 16410,16430 ****
  
  ;; Base name for define_insn
  (define_int_attr rounding_insn
! 	[(UNSPEC_FRNDINT_FLOOR "floor")
  	 (UNSPEC_FRNDINT_CEIL "ceil")
  	 (UNSPEC_FRNDINT_TRUNC "btrunc")
  	 (UNSPEC_FIST_FLOOR "floor")
  	 (UNSPEC_FIST_CEIL "ceil")])
  
  (define_int_attr rounding
! 	[(UNSPEC_FRNDINT_FLOOR "floor")
  	 (UNSPEC_FRNDINT_CEIL "ceil")
  	 (UNSPEC_FRNDINT_TRUNC "trunc")
  	 (UNSPEC_FIST_FLOOR "floor")
  	 (UNSPEC_FIST_CEIL "ceil")])
  
  (define_int_attr ROUNDING
! 	[(UNSPEC_FRNDINT_FLOOR "FLOOR")
  	 (UNSPEC_FRNDINT_CEIL "CEIL")
  	 (UNSPEC_FRNDINT_TRUNC "TRUNC")
  	 (UNSPEC_FIST_FLOOR "FLOOR")
--- 16860,16883 ----
  
  ;; Base name for define_insn
  (define_int_attr rounding_insn
! 	[(UNSPEC_FRNDINT_ROUNDEVEN "roundeven")
! 	 (UNSPEC_FRNDINT_FLOOR "floor")
  	 (UNSPEC_FRNDINT_CEIL "ceil")
  	 (UNSPEC_FRNDINT_TRUNC "btrunc")
  	 (UNSPEC_FIST_FLOOR "floor")
  	 (UNSPEC_FIST_CEIL "ceil")])
  
  (define_int_attr rounding
! 	[(UNSPEC_FRNDINT_ROUNDEVEN "roundeven")
! 	 (UNSPEC_FRNDINT_FLOOR "floor")
  	 (UNSPEC_FRNDINT_CEIL "ceil")
  	 (UNSPEC_FRNDINT_TRUNC "trunc")
  	 (UNSPEC_FIST_FLOOR "floor")
  	 (UNSPEC_FIST_CEIL "ceil")])
  
  (define_int_attr ROUNDING
! 	[(UNSPEC_FRNDINT_ROUNDEVEN "ROUNDEVEN")
! 	 (UNSPEC_FRNDINT_FLOOR "FLOOR")
  	 (UNSPEC_FRNDINT_CEIL "CEIL")
  	 (UNSPEC_FRNDINT_TRUNC "TRUNC")
  	 (UNSPEC_FIST_FLOOR "FLOOR")
***************
*** 16438,16444 ****
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_USE_FANCY_MATH_387
     && (flag_fp_int_builtin_inexact || !flag_trapping_math)
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(const_int 0)]
--- 16891,16897 ----
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_USE_FANCY_MATH_387
     && (flag_fp_int_builtin_inexact || !flag_trapping_math)
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(const_int 0)]
***************
*** 16487,16494 ****
  	|| TARGET_MIX_SSE_I387)
      && (flag_fp_int_builtin_inexact || !flag_trapping_math))
     || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
!        && (TARGET_SSE4_1 || flag_fp_int_builtin_inexact
! 	   || !flag_trapping_math))"
  {
    if (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
        && (TARGET_SSE4_1 || flag_fp_int_builtin_inexact || !flag_trapping_math))
--- 16940,16948 ----
  	|| TARGET_MIX_SSE_I387)
      && (flag_fp_int_builtin_inexact || !flag_trapping_math))
     || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
!        && (TARGET_SSE4_1
! 	  || (ROUND_<ROUNDING> != ROUND_ROUNDEVEN
! 	      && (flag_fp_int_builtin_inexact || !flag_trapping_math))))"
  {
    if (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
        && (TARGET_SSE4_1 || flag_fp_int_builtin_inexact || !flag_trapping_math))
***************
*** 16540,16546 ****
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_USE_FANCY_MATH_387
     && flag_unsafe_math_optimizations
!    && can_create_pseudo_p ()"
    "#"
    "&& 1"
    [(const_int 0)]
--- 16994,17000 ----
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_USE_FANCY_MATH_387
     && flag_unsafe_math_optimizations
!    && ix86_pre_reload_split ()"
    "#"
    "&& 1"
    [(const_int 0)]
***************
*** 16606,16612 ****
      {
        rtx tmp = gen_reg_rtx (<MODEF:MODE>mode);
  
!       emit_insn (gen_sse4_1_round<mode>2
  		 (tmp, operands[1], GEN_INT (ROUND_<ROUNDING>
  					     | ROUND_NO_EXC)));
        emit_insn (gen_fix_trunc<MODEF:mode><SWI48:mode>2
--- 17060,17066 ----
      {
        rtx tmp = gen_reg_rtx (<MODEF:MODE>mode);
  
!       emit_insn (gen_sse4_1_round<MODEF:mode>2
  		 (tmp, operands[1], GEN_INT (ROUND_<ROUNDING>
  					     | ROUND_NO_EXC)));
        emit_insn (gen_fix_trunc<MODEF:mode><SWI48:mode>2
***************
*** 16731,16737 ****
     (set_attr "length_immediate" "0")
     (set_attr "modrm" "0")])
  
! (define_expand "movmem<mode>"
    [(use (match_operand:BLK 0 "memory_operand"))
     (use (match_operand:BLK 1 "memory_operand"))
     (use (match_operand:SWI48 2 "nonmemory_operand"))
--- 17185,17191 ----
     (set_attr "length_immediate" "0")
     (set_attr "modrm" "0")])
  
! (define_expand "cpymem<mode>"
    [(use (match_operand:BLK 0 "memory_operand"))
     (use (match_operand:BLK 1 "memory_operand"))
     (use (match_operand:SWI48 2 "nonmemory_operand"))
***************
*** 16743,16749 ****
     (use (match_operand:SI 8 ""))]
    ""
  {
!  if (ix86_expand_set_or_movmem (operands[0], operands[1],
  			        operands[2], NULL, operands[3],
  			        operands[4], operands[5],
  				operands[6], operands[7],
--- 17197,17203 ----
     (use (match_operand:SI 8 ""))]
    ""
  {
!  if (ix86_expand_set_or_cpymem (operands[0], operands[1],
  			        operands[2], NULL, operands[3],
  			        operands[4], operands[5],
  				operands[6], operands[7],
***************
*** 16958,16964 ****
      (use (match_operand:SI 8 ""))]
    ""
  {
!  if (ix86_expand_set_or_movmem (operands[0], NULL,
  			        operands[1], operands[2],
  				operands[3], operands[4],
  			        operands[5], operands[6],
--- 17412,17418 ----
      (use (match_operand:SI 8 ""))]
    ""
  {
!  if (ix86_expand_set_or_cpymem (operands[0], NULL,
  			        operands[1], operands[2],
  				operands[3], operands[4],
  			        operands[5], operands[6],
***************
*** 17155,17161 ****
     (use (match_operand 4 "immediate_operand"))]
    ""
  {
!   rtx addr1, addr2, out, outlow, count, countreg, align;
  
    if (optimize_insn_for_size_p () && !TARGET_INLINE_ALL_STRINGOPS)
      FAIL;
--- 17609,17615 ----
     (use (match_operand 4 "immediate_operand"))]
    ""
  {
!   rtx addr1, addr2, countreg, align, out;
  
    if (optimize_insn_for_size_p () && !TARGET_INLINE_ALL_STRINGOPS)
      FAIL;
***************
*** 17179,17188 ****
            && TREE_CODE (TREE_OPERAND (TREE_OPERAND (t2, 0), 0)) == STRING_CST)))
      FAIL;
  
-   out = operands[0];
-   if (!REG_P (out))
-     out = gen_reg_rtx (SImode);
- 
    addr1 = copy_addr_to_reg (XEXP (operands[1], 0));
    addr2 = copy_addr_to_reg (XEXP (operands[2], 0));
    if (addr1 != XEXP (operands[1], 0))
--- 17633,17638 ----
***************
*** 17190,17206 ****
    if (addr2 != XEXP (operands[2], 0))
      operands[2] = replace_equiv_address_nv (operands[2], addr2);
  
!   count = operands[3];
!   countreg = ix86_zero_extend_to_Pmode (count);
  
    /* %%% Iff we are testing strict equality, we can use known alignment
       to good advantage.  This may be possible with combine, particularly
       once cc0 is dead.  */
    align = operands[4];
  
!   if (CONST_INT_P (count))
      {
!       if (INTVAL (count) == 0)
  	{
  	  emit_move_insn (operands[0], const0_rtx);
  	  DONE;
--- 17640,17655 ----
    if (addr2 != XEXP (operands[2], 0))
      operands[2] = replace_equiv_address_nv (operands[2], addr2);
  
!   countreg = ix86_zero_extend_to_Pmode (operands[3]);
  
    /* %%% Iff we are testing strict equality, we can use known alignment
       to good advantage.  This may be possible with combine, particularly
       once cc0 is dead.  */
    align = operands[4];
  
!   if (CONST_INT_P (operands[3]))
      {
!       if (operands[3] == const0_rtx)
  	{
  	  emit_move_insn (operands[0], const0_rtx);
  	  DONE;
***************
*** 17210,17231 ****
      }
    else
      {
!       rtx (*gen_cmp) (rtx, rtx);
! 
!       gen_cmp = (TARGET_64BIT
! 		 ? gen_cmpdi_1 : gen_cmpsi_1);
! 
!       emit_insn (gen_cmp (countreg, countreg));
        emit_insn (gen_cmpstrnqi_1 (addr1, addr2, countreg, align,
  				  operands[1], operands[2]));
      }
  
!   outlow = gen_lowpart (QImode, out);
!   emit_insn (gen_cmpintqi (outlow));
!   emit_move_insn (out, gen_rtx_SIGN_EXTEND (SImode, outlow));
! 
!   if (operands[0] != out)
!     emit_move_insn (operands[0], out);
  
    DONE;
  })
--- 17659,17672 ----
      }
    else
      {
!       emit_insn (gen_cmp_1 (Pmode, countreg, countreg));
        emit_insn (gen_cmpstrnqi_1 (addr1, addr2, countreg, align,
  				  operands[1], operands[2]));
      }
  
!   out = gen_lowpart (QImode, operands[0]);
!   emit_insn (gen_cmpintqi (out));
!   emit_move_insn (operands[0], gen_rtx_SIGN_EXTEND (SImode, out));
  
    DONE;
  })
***************
*** 17920,17925 ****
--- 18361,18470 ----
     (match_operand:SWI 3 "const_int_operand")]
    ""
    "if (ix86_expand_int_addcc (operands)) DONE; else FAIL;")
+ 
+ ;; min/max patterns
+ 
+ (define_mode_iterator MAXMIN_IMODE
+   [(SI "TARGET_SSE4_1") (DI "TARGET_AVX512VL")])
+ (define_code_attr maxmin_rel
+   [(smax "GE") (smin "LE") (umax "GEU") (umin "LEU")])
+ 
+ (define_expand "<code><mode>3"
+   [(parallel
+     [(set (match_operand:MAXMIN_IMODE 0 "register_operand")
+ 	  (maxmin:MAXMIN_IMODE
+ 	    (match_operand:MAXMIN_IMODE 1 "register_operand")
+ 	    (match_operand:MAXMIN_IMODE 2 "nonimmediate_operand")))
+      (clobber (reg:CC FLAGS_REG))])]
+   "TARGET_STV")
+ 
+ (define_insn_and_split "*<code><mode>3_1"
+   [(set (match_operand:MAXMIN_IMODE 0 "register_operand")
+ 	(maxmin:MAXMIN_IMODE
+ 	  (match_operand:MAXMIN_IMODE 1 "register_operand")
+ 	  (match_operand:MAXMIN_IMODE 2 "nonimmediate_operand")))
+    (clobber (reg:CC FLAGS_REG))]
+   "(TARGET_64BIT || <MODE>mode != DImode) && TARGET_STV
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (match_dup 0)
+ 	(if_then_else:MAXMIN_IMODE (match_dup 3)
+ 	  (match_dup 1)
+ 	  (match_dup 2)))]
+ {
+   machine_mode mode = <MODE>mode;
+ 
+   if (!register_operand (operands[2], mode))
+     operands[2] = force_reg (mode, operands[2]);
+ 
+   enum rtx_code code = <maxmin_rel>;
+   machine_mode cmpmode = SELECT_CC_MODE (code, operands[1], operands[2]);
+   rtx flags = gen_rtx_REG (cmpmode, FLAGS_REG);
+ 
+   rtx tmp = gen_rtx_COMPARE (cmpmode, operands[1], operands[2]);
+   emit_insn (gen_rtx_SET (flags, tmp));
+ 
+   operands[3] = gen_rtx_fmt_ee (code, VOIDmode, flags, const0_rtx);
+ })
+ 
+ (define_insn_and_split "*<code>di3_doubleword"
+   [(set (match_operand:DI 0 "register_operand")
+ 	(maxmin:DI (match_operand:DI 1 "register_operand")
+ 		   (match_operand:DI 2 "nonimmediate_operand")))
+    (clobber (reg:CC FLAGS_REG))]
+   "!TARGET_64BIT && TARGET_STV && TARGET_AVX512VL
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (match_dup 0)
+ 	(if_then_else:SI (match_dup 6)
+ 	  (match_dup 1)
+ 	  (match_dup 2)))
+    (set (match_dup 3)
+ 	(if_then_else:SI (match_dup 6)
+ 	  (match_dup 4)
+ 	  (match_dup 5)))]
+ {
+   if (!register_operand (operands[2], DImode))
+     operands[2] = force_reg (DImode, operands[2]);
+ 
+   split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);
+ 
+   rtx cmplo[2] = { operands[1], operands[2] };
+   rtx cmphi[2] = { operands[4], operands[5] };
+ 
+   enum rtx_code code = <maxmin_rel>;
+ 
+   switch (code)
+     {
+     case LE: case LEU:
+       std::swap (cmplo[0], cmplo[1]);
+       std::swap (cmphi[0], cmphi[1]);
+       code = swap_condition (code);
+       /* FALLTHRU */
+ 
+     case GE: case GEU:
+       {
+ 	bool uns = (code == GEU);
+ 	rtx (*sbb_insn) (machine_mode, rtx, rtx, rtx)
+ 	  = uns ? gen_sub3_carry_ccc : gen_sub3_carry_ccgz;
+ 
+ 	emit_insn (gen_cmp_1 (SImode, cmplo[0], cmplo[1]));
+ 
+ 	rtx tmp = gen_rtx_SCRATCH (SImode);
+ 	emit_insn (sbb_insn (SImode, tmp, cmphi[0], cmphi[1]));
+ 
+ 	rtx flags = gen_rtx_REG (uns ? CCCmode : CCGZmode, FLAGS_REG);
+ 	operands[6] = gen_rtx_fmt_ee (code, VOIDmode, flags, const0_rtx);
+ 
+ 	break;
+       }
+ 
+     default:
+       gcc_unreachable ();
+     }
+ })
  
  ;; Misc patterns (?)
  
***************
*** 17933,17939 ****
  ;;
  ;; in proper program order.
  
! (define_insn "pro_epilogue_adjust_stack_<mode>_add"
    [(set (match_operand:P 0 "register_operand" "=r,r")
  	(plus:P (match_operand:P 1 "register_operand" "0,r")
  	        (match_operand:P 2 "<nonmemory_operand>" "r<i>,l<i>")))
--- 18478,18484 ----
  ;;
  ;; in proper program order.
  
! (define_insn "@pro_epilogue_adjust_stack_add_<mode>"
    [(set (match_operand:P 0 "register_operand" "=r,r")
  	(plus:P (match_operand:P 1 "register_operand" "0,r")
  	        (match_operand:P 2 "<nonmemory_operand>" "r<i>,l<i>")))
***************
*** 17976,17982 ****
  	      (const_string "*")))
     (set_attr "mode" "<MODE>")])
  
! (define_insn "pro_epilogue_adjust_stack_<mode>_sub"
    [(set (match_operand:P 0 "register_operand" "=r")
  	(minus:P (match_operand:P 1 "register_operand" "0")
  		 (match_operand:P 2 "register_operand" "r")))
--- 18521,18527 ----
  	      (const_string "*")))
     (set_attr "mode" "<MODE>")])
  
! (define_insn "@pro_epilogue_adjust_stack_sub_<mode>"
    [(set (match_operand:P 0 "register_operand" "=r")
  	(minus:P (match_operand:P 1 "register_operand" "0")
  		 (match_operand:P 2 "register_operand" "r")))
***************
*** 17987,17993 ****
    [(set_attr "type" "alu")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "allocate_stack_worker_probe_<mode>"
    [(set (match_operand:P 0 "register_operand" "=a")
  	(unspec_volatile:P [(match_operand:P 1 "register_operand" "0")]
  			    UNSPECV_STACK_PROBE))
--- 18532,18538 ----
    [(set_attr "type" "alu")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "@allocate_stack_worker_probe_<mode>"
    [(set (match_operand:P 0 "register_operand" "=a")
  	(unspec_volatile:P [(match_operand:P 1 "register_operand" "0")]
  			    UNSPECV_STACK_PROBE))
***************
*** 18013,18027 ****
      x = operands[1];
    else
      {
-       rtx (*insn) (rtx, rtx);
- 
        x = copy_to_mode_reg (Pmode, operands[1]);
  
!       insn = (TARGET_64BIT
! 	      ? gen_allocate_stack_worker_probe_di
! 	      : gen_allocate_stack_worker_probe_si);
! 
!       emit_insn (insn (x, x));
      }
  
    x = expand_simple_binop (Pmode, MINUS, stack_pointer_rtx, x,
--- 18558,18566 ----
      x = operands[1];
    else
      {
        x = copy_to_mode_reg (Pmode, operands[1]);
  
!       emit_insn (gen_allocate_stack_worker_probe (Pmode, x, x));
      }
  
    x = expand_simple_binop (Pmode, MINUS, stack_pointer_rtx, x,
***************
*** 18038,18053 ****
    [(match_operand 0 "memory_operand")]
    ""
  {
!   rtx (*insn) (rtx, rtx)
!     = (GET_MODE (operands[0]) == DImode
!        ? gen_probe_stack_di : gen_probe_stack_si);
! 
!   emit_insn (insn (operands[0], const0_rtx));
    DONE;
  })
  
  ;; Use OR for stack probes, this is shorter.
! (define_insn "probe_stack_<mode>"
    [(set (match_operand:W 0 "memory_operand" "=m")
  	(unspec:W [(match_operand:W 1 "const0_operand")]
  		  UNSPEC_PROBE_STACK))
--- 18577,18589 ----
    [(match_operand 0 "memory_operand")]
    ""
  {
!   emit_insn (gen_probe_stack_1
! 	     (word_mode, operands[0], const0_rtx));
    DONE;
  })
  
  ;; Use OR for stack probes, this is shorter.
! (define_insn "@probe_stack_1_<mode>"
    [(set (match_operand:W 0 "memory_operand" "=m")
  	(unspec:W [(match_operand:W 1 "const0_operand")]
  		  UNSPEC_PROBE_STACK))
***************
*** 18058,18064 ****
     (set_attr "mode" "<MODE>")
     (set_attr "length_immediate" "1")])
    
! (define_insn "adjust_stack_and_probe<mode>"
    [(set (match_operand:P 0 "register_operand" "=r")
  	(unspec_volatile:P [(match_operand:P 1 "register_operand" "0")]
  			    UNSPECV_PROBE_STACK_RANGE))
--- 18594,18600 ----
     (set_attr "mode" "<MODE>")
     (set_attr "length_immediate" "1")])
    
! (define_insn "@adjust_stack_and_probe_<mode>"
    [(set (match_operand:P 0 "register_operand" "=r")
  	(unspec_volatile:P [(match_operand:P 1 "register_operand" "0")]
  			    UNSPECV_PROBE_STACK_RANGE))
***************
*** 18070,18076 ****
    "* return output_adjust_stack_and_probe (operands[0]);"
    [(set_attr "type" "multi")])
  
! (define_insn "probe_stack_range<mode>"
    [(set (match_operand:P 0 "register_operand" "=r")
  	(unspec_volatile:P [(match_operand:P 1 "register_operand" "0")
  			    (match_operand:P 2 "const_int_operand" "n")]
--- 18606,18612 ----
    "* return output_adjust_stack_and_probe (operands[0]);"
    [(set_attr "type" "multi")])
  
! (define_insn "@probe_stack_range_<mode>"
    [(set (match_operand:P 0 "register_operand" "=r")
  	(unspec_volatile:P [(match_operand:P 1 "register_operand" "0")
  			    (match_operand:P 2 "const_int_operand" "n")]
***************
*** 19485,19491 ****
  	     (match_operand:SI 2 "const_int_operand"))]
    "TARGET_3DNOW || TARGET_PREFETCH_SSE || TARGET_PRFCHW || TARGET_PREFETCHWT1"
  {
!   bool write = INTVAL (operands[1]) != 0;
    int locality = INTVAL (operands[2]);
  
    gcc_assert (IN_RANGE (locality, 0, 3));
--- 20021,20027 ----
  	     (match_operand:SI 2 "const_int_operand"))]
    "TARGET_3DNOW || TARGET_PREFETCH_SSE || TARGET_PRFCHW || TARGET_PREFETCHWT1"
  {
!   bool write = operands[1] != const0_rtx;
    int locality = INTVAL (operands[2]);
  
    gcc_assert (IN_RANGE (locality, 0, 3));
***************
*** 19550,19556 ****
  	     (const_int 3))]
    "TARGET_3DNOW || TARGET_PRFCHW || TARGET_PREFETCHWT1"
  {
!   if (INTVAL (operands[1]) == 0)
      return "prefetch\t%a0";
    else
      return "prefetchw\t%a0";
--- 20086,20092 ----
  	     (const_int 3))]
    "TARGET_3DNOW || TARGET_PRFCHW || TARGET_PREFETCHWT1"
  {
!   if (operands[1] == const0_rtx)
      return "prefetch\t%a0";
    else
      return "prefetchw\t%a0";
***************
*** 19576,19601 ****
     (match_operand 1 "memory_operand")]
    ""
  {
!   rtx (*insn)(rtx, rtx);
! 
!   insn = (TARGET_LP64
! 	  ? gen_stack_protect_set_di
! 	  : gen_stack_protect_set_si);
! 
!   emit_insn (insn (operands[0], operands[1]));
    DONE;
  })
  
! (define_insn "stack_protect_set_<mode>"
    [(set (match_operand:PTR 0 "memory_operand" "=m")
  	(unspec:PTR [(match_operand:PTR 1 "memory_operand" "m")]
  		    UNSPEC_SP_SET))
     (set (match_scratch:PTR 2 "=&r") (const_int 0))
     (clobber (reg:CC FLAGS_REG))]
    ""
!   "mov{<imodesuffix>}\t{%1, %2|%2, %1}\;mov{<imodesuffix>}\t{%2, %0|%0, %2}\;xor{l}\t%k2, %k2"
    [(set_attr "type" "multi")])
  
  (define_expand "stack_protect_test"
    [(match_operand 0 "memory_operand")
     (match_operand 1 "memory_operand")
--- 20112,20230 ----
     (match_operand 1 "memory_operand")]
    ""
  {
!   emit_insn (gen_stack_protect_set_1
! 	     (ptr_mode, operands[0], operands[1]));
    DONE;
  })
  
! (define_insn "@stack_protect_set_1_<mode>"
    [(set (match_operand:PTR 0 "memory_operand" "=m")
  	(unspec:PTR [(match_operand:PTR 1 "memory_operand" "m")]
  		    UNSPEC_SP_SET))
     (set (match_scratch:PTR 2 "=&r") (const_int 0))
     (clobber (reg:CC FLAGS_REG))]
    ""
! {
!   output_asm_insn ("mov{<imodesuffix>}\t{%1, %2|%2, %1}", operands);
!   output_asm_insn ("mov{<imodesuffix>}\t{%2, %0|%0, %2}", operands);
!   return "xor{l}\t%k2, %k2";
! }
    [(set_attr "type" "multi")])
  
+ ;; Patterns and peephole2s to optimize stack_protect_set_1_<mode>
+ ;; immediately followed by *mov{s,d}i_internal to the same register,
+ ;; where we can avoid the xor{l} above.  We don't split this, so that
+ ;; scheduling or anything else doesn't separate the *stack_protect_set*
+ ;; pattern from the set of the register that overwrites the register
+ ;; with a new value.
+ (define_insn "*stack_protect_set_2_<mode>"
+   [(set (match_operand:PTR 0 "memory_operand" "=m")
+ 	(unspec:PTR [(match_operand:PTR 3 "memory_operand" "m")]
+ 		    UNSPEC_SP_SET))
+    (set (match_operand:SI 1 "register_operand" "=&r")
+ 	(match_operand:SI 2 "general_operand" "g"))
+    (clobber (reg:CC FLAGS_REG))]
+   "reload_completed
+    && !reg_overlap_mentioned_p (operands[1], operands[2])"
+ {
+   output_asm_insn ("mov{<imodesuffix>}\t{%3, %<k>1|%<k>1, %3}", operands);
+   output_asm_insn ("mov{<imodesuffix>}\t{%<k>1, %0|%0, %<k>1}", operands);
+   if (pic_32bit_operand (operands[2], SImode)
+       || ix86_use_lea_for_mov (insn, operands + 1))
+     return "lea{l}\t{%E2, %1|%1, %E2}";
+   else
+     return "mov{l}\t{%2, %1|%1, %2}";
+ }
+   [(set_attr "type" "multi")
+    (set_attr "length" "24")])
+ 
+ (define_peephole2
+  [(parallel [(set (match_operand:PTR 0 "memory_operand")
+ 		  (unspec:PTR [(match_operand:PTR 1 "memory_operand")]
+ 			      UNSPEC_SP_SET))
+ 	     (set (match_operand:PTR 2 "general_reg_operand") (const_int 0))
+ 	     (clobber (reg:CC FLAGS_REG))])
+   (set (match_operand:SI 3 "general_reg_operand")
+        (match_operand:SI 4))]
+  "REGNO (operands[2]) == REGNO (operands[3])
+   && general_operand (operands[4], SImode)
+   && (general_reg_operand (operands[4], SImode)
+       || memory_operand (operands[4], SImode)
+       || immediate_operand (operands[4], SImode))
+   && !reg_overlap_mentioned_p (operands[3], operands[4])"
+  [(parallel [(set (match_dup 0)
+ 		  (unspec:PTR [(match_dup 1)] UNSPEC_SP_SET))
+ 	     (set (match_dup 3) (match_dup 4))
+ 	     (clobber (reg:CC FLAGS_REG))])])
+ 
+ (define_insn "*stack_protect_set_3"
+   [(set (match_operand:DI 0 "memory_operand" "=m,m,m")
+ 	(unspec:DI [(match_operand:DI 3 "memory_operand" "m,m,m")]
+ 		   UNSPEC_SP_SET))
+    (set (match_operand:DI 1 "register_operand" "=&r,r,r")
+ 	(match_operand:DI 2 "general_operand" "Z,rem,i"))
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_64BIT
+    && reload_completed
+    && !reg_overlap_mentioned_p (operands[1], operands[2])"
+ {
+   output_asm_insn ("mov{q}\t{%3, %1|%1, %3}", operands);
+   output_asm_insn ("mov{q}\t{%1, %0|%0, %1}", operands);
+   if (pic_32bit_operand (operands[2], DImode))
+     return "lea{q}\t{%E2, %1|%1, %E2}";
+   else if (which_alternative == 0)
+     return "mov{l}\t{%k2, %k1|%k1, %k2}";
+   else if (which_alternative == 2)
+     return "movabs{q}\t{%2, %1|%1, %2}";
+   else if (ix86_use_lea_for_mov (insn, operands + 1))
+     return "lea{q}\t{%E2, %1|%1, %E2}";
+   else
+     return "mov{q}\t{%2, %1|%1, %2}";
+ }
+   [(set_attr "type" "multi")
+    (set_attr "length" "24")])
+ 
+ (define_peephole2
+  [(parallel [(set (match_operand:DI 0 "memory_operand")
+ 		  (unspec:DI [(match_operand:DI 1 "memory_operand")]
+ 			     UNSPEC_SP_SET))
+ 	     (set (match_operand:DI 2 "general_reg_operand") (const_int 0))
+ 	     (clobber (reg:CC FLAGS_REG))])
+   (set (match_dup 2) (match_operand:DI 3))]
+  "TARGET_64BIT
+   && general_operand (operands[3], DImode)
+   && (general_reg_operand (operands[3], DImode)
+       || memory_operand (operands[3], DImode)
+       || x86_64_zext_immediate_operand (operands[3], DImode)
+       || x86_64_immediate_operand (operands[3], DImode)
+       || (CONSTANT_P (operands[3])
+ 	  && (!flag_pic || LEGITIMATE_PIC_OPERAND_P (operands[3]))))
+   && !reg_overlap_mentioned_p (operands[2], operands[3])"
+  [(parallel [(set (match_dup 0)
+ 		  (unspec:PTR [(match_dup 1)] UNSPEC_SP_SET))
+ 	     (set (match_dup 2) (match_dup 3))
+ 	     (clobber (reg:CC FLAGS_REG))])])
+ 
  (define_expand "stack_protect_test"
    [(match_operand 0 "memory_operand")
     (match_operand 1 "memory_operand")
***************
*** 19604,19630 ****
  {
    rtx flags = gen_rtx_REG (CCZmode, FLAGS_REG);
  
!   rtx (*insn)(rtx, rtx, rtx);
! 
!   insn = (TARGET_LP64
! 	  ? gen_stack_protect_test_di
! 	  : gen_stack_protect_test_si);
! 
!   emit_insn (insn (flags, operands[0], operands[1]));
  
    emit_jump_insn (gen_cbranchcc4 (gen_rtx_EQ (VOIDmode, flags, const0_rtx),
  				  flags, const0_rtx, operands[2]));
    DONE;
  })
  
! (define_insn "stack_protect_test_<mode>"
    [(set (match_operand:CCZ 0 "flags_reg_operand")
  	(unspec:CCZ [(match_operand:PTR 1 "memory_operand" "m")
  		     (match_operand:PTR 2 "memory_operand" "m")]
  		    UNSPEC_SP_TEST))
     (clobber (match_scratch:PTR 3 "=&r"))]
    ""
!   "mov{<imodesuffix>}\t{%1, %3|%3, %1}\;xor{<imodesuffix>}\t{%2, %3|%3, %2}"
    [(set_attr "type" "multi")])
  
  (define_insn "sse4_2_crc32<mode>"
--- 20233,20257 ----
  {
    rtx flags = gen_rtx_REG (CCZmode, FLAGS_REG);
  
!   emit_insn (gen_stack_protect_test_1
! 	     (ptr_mode, flags, operands[0], operands[1]));
  
    emit_jump_insn (gen_cbranchcc4 (gen_rtx_EQ (VOIDmode, flags, const0_rtx),
  				  flags, const0_rtx, operands[2]));
    DONE;
  })
  
! (define_insn "@stack_protect_test_1_<mode>"
    [(set (match_operand:CCZ 0 "flags_reg_operand")
  	(unspec:CCZ [(match_operand:PTR 1 "memory_operand" "m")
  		     (match_operand:PTR 2 "memory_operand" "m")]
  		    UNSPEC_SP_TEST))
     (clobber (match_scratch:PTR 3 "=&r"))]
    ""
! {
!   output_asm_insn ("mov{<imodesuffix>}\t{%1, %3|%3, %1}", operands);
!   return "sub{<imodesuffix>}\t{%2, %3|%3, %2}";
! }
    [(set_attr "type" "multi")])
  
  (define_insn "sse4_2_crc32<mode>"
***************
*** 19989,19995 ****
  		    UNSPECV_LLWP_INTRINSIC)]
    "TARGET_LWP")
  
! (define_insn "*lwp_llwpcb<mode>1"
    [(unspec_volatile [(match_operand:P 0 "register_operand" "r")]
  		    UNSPECV_LLWP_INTRINSIC)]
    "TARGET_LWP"
--- 20616,20622 ----
  		    UNSPECV_LLWP_INTRINSIC)]
    "TARGET_LWP")
  
! (define_insn "*lwp_llwpcb<mode>_1"
    [(unspec_volatile [(match_operand:P 0 "register_operand" "r")]
  		    UNSPECV_LLWP_INTRINSIC)]
    "TARGET_LWP"
***************
*** 20002,20019 ****
    [(set (match_operand 0 "register_operand")
  	(unspec_volatile [(const_int 0)] UNSPECV_SLWP_INTRINSIC))]
    "TARGET_LWP"
! {
!   rtx (*insn)(rtx);
! 
!   insn = (Pmode == DImode
! 	  ? gen_lwp_slwpcbdi
! 	  : gen_lwp_slwpcbsi);
! 
!   emit_insn (insn (operands[0]));
!   DONE;
! })
  
! (define_insn "lwp_slwpcb<mode>"
    [(set (match_operand:P 0 "register_operand" "=r")
  	(unspec_volatile:P [(const_int 0)] UNSPECV_SLWP_INTRINSIC))]
    "TARGET_LWP"
--- 20629,20637 ----
    [(set (match_operand 0 "register_operand")
  	(unspec_volatile [(const_int 0)] UNSPECV_SLWP_INTRINSIC))]
    "TARGET_LWP"
!   "emit_insn (gen_lwp_slwpcb_1 (Pmode, operands[0])); DONE;")
  
! (define_insn "@lwp_slwpcb<mode>_1"
    [(set (match_operand:P 0 "register_operand" "=r")
  	(unspec_volatile:P [(const_int 0)] UNSPECV_SLWP_INTRINSIC))]
    "TARGET_LWP"
***************
*** 20330,20336 ****
    "mwaitx"
    [(set_attr "length" "3")])
  
! (define_insn "monitorx_<mode>"
    [(unspec_volatile [(match_operand:P 0 "register_operand" "a")
  		     (match_operand:SI 1 "register_operand" "c")
  		     (match_operand:SI 2 "register_operand" "d")]
--- 20948,20954 ----
    "mwaitx"
    [(set_attr "length" "3")])
  
! (define_insn "@monitorx_<mode>"
    [(unspec_volatile [(match_operand:P 0 "register_operand" "a")
  		     (match_operand:SI 1 "register_operand" "c")
  		     (match_operand:SI 2 "register_operand" "d")]
***************
*** 20344,20350 ****
       (symbol_ref ("(Pmode != word_mode) + 3")))])
  
  ;; CLZERO
! (define_insn "clzero_<mode>"
    [(unspec_volatile [(match_operand: P 0 "register_operand" "a")]
                     UNSPECV_CLZERO)]
    "TARGET_CLZERO"
--- 20962,20968 ----
       (symbol_ref ("(Pmode != word_mode) + 3")))])
  
  ;; CLZERO
! (define_insn "@clzero_<mode>"
    [(unspec_volatile [(match_operand: P 0 "register_operand" "a")]
                     UNSPECV_CLZERO)]
    "TARGET_CLZERO"
***************
*** 20432,20438 ****
    "movdiri\t{%1, %0|%0, %1}"
    [(set_attr "type" "other")])
  
! (define_insn "movdir64b_<mode>"
    [(unspec_volatile:XI [(match_operand:P 0 "register_operand" "r")
  			(match_operand:XI 1 "memory_operand")]
  		       UNSPECV_MOVDIR64B)]
--- 21050,21056 ----
    "movdiri\t{%1, %0|%0, %1}"
    [(set_attr "type" "other")])
  
! (define_insn "@movdir64b_<mode>"
    [(unspec_volatile:XI [(match_operand:P 0 "register_operand" "r")
  			(match_operand:XI 1 "memory_operand")]
  		       UNSPECV_MOVDIR64B)]
***************
*** 20440,20445 ****
--- 21058,21077 ----
    "movdir64b\t{%1, %0|%0, %1}"
    [(set_attr "type" "other")])
  
+ ;; ENQCMD and ENQCMDS
+ 
+ (define_int_iterator ENQCMD [UNSPECV_ENQCMD UNSPECV_ENQCMDS])
+ (define_int_attr enqcmd_sfx [(UNSPECV_ENQCMD "") (UNSPECV_ENQCMDS "s")])
+ 
+ (define_insn "@enqcmd<enqcmd_sfx>_<mode>"
+   [(set (reg:CCZ FLAGS_REG)
+ 	(unspec_volatile:CCZ [(match_operand:P 0 "register_operand" "r")
+ 			      (match_operand:XI 1 "memory_operand" "m")]
+ 			     ENQCMD))]
+   "TARGET_ENQCMD"
+   "enqcmd<enqcmd_sfx>\t{%1, %0|%0, %1}"
+   [(set_attr "type" "other")])
+ 
  ;; WAITPKG
  
  (define_insn "umwait"
***************
*** 20461,20467 ****
    "umwait\t%0"
    [(set_attr "length" "3")])
  
! (define_insn "umonitor_<mode>"
    [(unspec_volatile [(match_operand:P 0 "register_operand" "r")]
  		    UNSPECV_UMONITOR)]
    "TARGET_WAITPKG"
--- 21093,21099 ----
    "umwait\t%0"
    [(set_attr "length" "3")])
  
! (define_insn "@umonitor_<mode>"
    [(unspec_volatile [(match_operand:P 0 "register_operand" "r")]
  		    UNSPECV_UMONITOR)]
    "TARGET_WAITPKG"
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386.opt gcc-10.1.0/gcc/config/i386/i386.opt
*** gcc-9.3.0/gcc/config/i386/i386.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; Options for the IA-32 and AMD64 ports of the compiler.
  
! ; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; Options for the IA-32 and AMD64 ports of the compiler.
  
! ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
*************** int x_ix86_tune_no_default
*** 182,191 ****
  TargetSave
  enum ix86_veclibabi x_ix86_veclibabi_type
  
- ;; -mprefer-vector-width=
- TargetSave
- enum prefer_vector_width x_prefer_vector_width_type
- 
  ;; x86 options
  m128bit-long-double
  Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save
--- 182,187 ----
*************** Inline memset/memcpy string operations,
*** 377,383 ****
  
  mintel-syntax
  Target Undocumented Alias(masm=, intel, att) Warn(%<-mintel-syntax%> and %<-mno-intel-syntax%> are deprecated; use %<-masm=intel%> and %<-masm=att%> instead)
- ;; Deprecated
  
  mms-bitfields
  Target Report Mask(MS_BITFIELD_LAYOUT) Save
--- 373,378 ----
*************** Target Alias(mprefer-vector-width=, 128,
*** 596,602 ****
  Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer.
  
  mprefer-vector-width=
! Target Report RejectNegative Joined Var(prefer_vector_width_type) Enum(prefer_vector_width) Init(PVW_NONE)
  Use given register vector width instructions instead of maximum register width in the auto-vectorizer.
  
  Enum
--- 591,597 ----
  Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer.
  
  mprefer-vector-width=
! Target Report RejectNegative Joined Var(prefer_vector_width_type) Enum(prefer_vector_width) Init(PVW_NONE) Save
  Use given register vector width instructions instead of maximum register width in the auto-vectorizer.
  
  Enum
*************** Target Report Mask(ISA_AVX512VBMI) Var(i
*** 726,736 ****
  Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VBMI built-in functions and code generation.
  
  mavx5124fmaps
! Target Report Mask(ISA_AVX5124FMAPS) Var(ix86_isa_flags2) Save
  Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124FMAPS built-in functions and code generation.
  
  mavx5124vnniw
! Target Report Mask(ISA_AVX5124VNNIW) Var(ix86_isa_flags2) Save
  Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124VNNIW built-in functions and code generation.
  
  mavx512vpopcntdq
--- 721,731 ----
  Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VBMI built-in functions and code generation.
  
  mavx5124fmaps
! Target Report Mask(ISA2_AVX5124FMAPS) Var(ix86_isa_flags2) Save
  Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124FMAPS built-in functions and code generation.
  
  mavx5124vnniw
! Target Report Mask(ISA2_AVX5124VNNIW) Var(ix86_isa_flags2) Save
  Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124VNNIW built-in functions and code generation.
  
  mavx512vpopcntdq
*************** mavx512bitalg
*** 749,754 ****
--- 744,753 ----
  Target Report Mask(ISA_AVX512BITALG) Var(ix86_isa_flags) Save
  Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512BITALG built-in functions and code generation.
  
+ mavx512vp2intersect
+ Target Report Mask(ISA2_AVX512VP2INTERSECT) Var(ix86_isa_flags2) Save
+ Support AVX512VP2INTERSECT built-in functions and code generation.
+ 
  mfma
  Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
  Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation.
*************** Target Report Mask(ISA_POPCNT) Var(ix86_
*** 778,800 ****
  Support code generation of popcnt instruction.
  
  mpconfig
! Target Report Mask(ISA_PCONFIG) Var(ix86_isa_flags2) Save
  Support PCONFIG built-in functions and code generation.
  
  mwbnoinvd
! Target Report Mask(ISA_WBNOINVD) Var(ix86_isa_flags2) Save
  Support WBNOINVD built-in functions and code generation.
  
  mptwrite
! Target Report Mask(ISA_PTWRITE) Var(ix86_isa_flags2) Save
  Support PTWRITE built-in functions and code generation.
  
  msgx
! Target Report Mask(ISA_SGX) Var(ix86_isa_flags2) Save
  Support SGX built-in functions and code generation.
  
  mrdpid
! Target Report Mask(ISA_RDPID) Var(ix86_isa_flags2) Save
  Support RDPID built-in functions and code generation.
  
  mgfni
--- 777,799 ----
  Support code generation of popcnt instruction.
  
  mpconfig
! Target Report Mask(ISA2_PCONFIG) Var(ix86_isa_flags2) Save
  Support PCONFIG built-in functions and code generation.
  
  mwbnoinvd
! Target Report Mask(ISA2_WBNOINVD) Var(ix86_isa_flags2) Save
  Support WBNOINVD built-in functions and code generation.
  
  mptwrite
! Target Report Mask(ISA2_PTWRITE) Var(ix86_isa_flags2) Save
  Support PTWRITE built-in functions and code generation.
  
  msgx
! Target Report Mask(ISA2_SGX) Var(ix86_isa_flags2) Save
  Support SGX built-in functions and code generation.
  
  mrdpid
! Target Report Mask(ISA2_RDPID) Var(ix86_isa_flags2) Save
  Support RDPID built-in functions and code generation.
  
  mgfni
*************** Target Report Mask(ISA_GFNI) Var(ix86_is
*** 802,808 ****
  Support GFNI built-in functions and code generation.
  
  mvaes
! Target Report Mask(ISA_VAES) Var(ix86_isa_flags2) Save
  Support VAES built-in functions and code generation.
  
  mvpclmulqdq
--- 801,807 ----
  Support GFNI built-in functions and code generation.
  
  mvaes
! Target Report Mask(ISA2_VAES) Var(ix86_isa_flags2) Save
  Support VAES built-in functions and code generation.
  
  mvpclmulqdq
*************** Target Report Mask(ISA_LZCNT) Var(ix86_i
*** 822,828 ****
  Support LZCNT built-in function and code generation.
  
  mhle
! Target Report Mask(ISA_HLE) Var(ix86_isa_flags2) Save
  Support Hardware Lock Elision prefixes.
  
  mrdseed
--- 821,827 ----
  Support LZCNT built-in function and code generation.
  
  mhle
! Target Report Mask(ISA2_HLE) Var(ix86_isa_flags2) Save
  Support Hardware Lock Elision prefixes.
  
  mrdseed
*************** Target Report Mask(ISA_CLWB) Var(ix86_is
*** 846,853 ****
  Support CLWB instruction.
  
  mpcommit
! Target Deprecated
! ;; Deprecated
  
  mfxsr
  Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save
--- 845,851 ----
  Support CLWB instruction.
  
  mpcommit
! Target WarnRemoved
  
  mfxsr
  Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save
*************** Target Report Mask(ISA_TBM) Var(ix86_isa
*** 874,880 ****
  Support TBM built-in functions and code generation.
  
  mcx16
! Target Report Mask(ISA_CX16) Var(ix86_isa_flags2) Save
  Support code generation of cmpxchg16b instruction.
  
  msahf
--- 872,878 ----
  Support TBM built-in functions and code generation.
  
  mcx16
! Target Report Mask(ISA2_CX16) Var(ix86_isa_flags2) Save
  Support code generation of cmpxchg16b instruction.
  
  msahf
*************** Target Report Mask(ISA_SAHF) Var(ix86_is
*** 882,888 ****
  Support code generation of sahf instruction in 64bit x86-64 code.
  
  mmovbe
! Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags2) Save
  Support code generation of movbe instruction.
  
  mcrc32
--- 880,886 ----
  Support code generation of sahf instruction in 64bit x86-64 code.
  
  mmovbe
! Target Report Mask(ISA2_MOVBE) Var(ix86_isa_flags2) Save
  Support code generation of movbe instruction.
  
  mcrc32
*************** Target Report Mask(ISA_RTM) Var(ix86_isa
*** 963,977 ****
  Support RTM built-in functions and code generation.
  
  mmpx
! Target Deprecated
! Deprecated in GCC 9.  This switch has no effect.
  
  mmwaitx
! Target Report Mask(ISA_MWAITX) Var(ix86_isa_flags2) Save
  Support MWAITX and MONITORX built-in functions and code generation.
  
  mclzero
! Target Report Mask(ISA_CLZERO) Var(ix86_isa_flags2) Save
  Support CLZERO built-in functions and code generation.
  
  mpku
--- 961,975 ----
  Support RTM built-in functions and code generation.
  
  mmpx
! Target WarnRemoved
! Removed in GCC 9.  This switch has no effect.
  
  mmwaitx
! Target Report Mask(ISA2_MWAITX) Var(ix86_isa_flags2) Save
  Support MWAITX and MONITORX built-in functions and code generation.
  
  mclzero
! Target Report Mask(ISA2_CLZERO) Var(ix86_isa_flags2) Save
  Support CLZERO built-in functions and code generation.
  
  mpku
*************** Target RejectNegative Joined Integer Var
*** 1011,1018 ****
  Use the given symbol for addressing the stack-protector guard.
  
  mmitigate-rop
! Target Deprecated
! ;; Deprecated
  
  mgeneral-regs-only
  Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Var(ix86_target_flags) Save
--- 1009,1015 ----
  Use the given symbol for addressing the stack-protector guard.
  
  mmitigate-rop
! Target WarnRemoved
  
  mgeneral-regs-only
  Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Var(ix86_target_flags) Save
*************** Target Report Mask(ISA_MOVDIRI) Var(ix86
*** 1070,1084 ****
  Support MOVDIRI built-in functions and code generation.
  
  mmovdir64b
! Target Report Mask(ISA_MOVDIR64B) Var(ix86_isa_flags2) Save
  Support MOVDIR64B built-in functions and code generation.
  
  mwaitpkg
! Target Report Mask(ISA_WAITPKG) Var(ix86_isa_flags2) Save
  Support WAITPKG built-in functions and code generation.
  
  mcldemote
! Target Report Mask(ISA_CLDEMOTE) Var(ix86_isa_flags2) Save
  Support CLDEMOTE built-in functions and code generation.
  
  minstrument-return=
--- 1067,1081 ----
  Support MOVDIRI built-in functions and code generation.
  
  mmovdir64b
! Target Report Mask(ISA2_MOVDIR64B) Var(ix86_isa_flags2) Save
  Support MOVDIR64B built-in functions and code generation.
  
  mwaitpkg
! Target Report Mask(ISA2_WAITPKG) Var(ix86_isa_flags2) Save
  Support WAITPKG built-in functions and code generation.
  
  mcldemote
! Target Report Mask(ISA2_CLDEMOTE) Var(ix86_isa_flags2) Save
  Support CLDEMOTE built-in functions and code generation.
  
  minstrument-return=
*************** Enum(instrument_return) String(nop5) Val
*** 1101,1103 ****
--- 1098,1109 ----
  mrecord-return
  Target Report Var(ix86_flag_record_return) Init(0)
  Generate a __return_loc section pointing to all return instrumentation code.
+ 
+ mavx512bf16
+ Target Report Mask(ISA2_AVX512BF16) Var(ix86_isa_flags2) Save
+ Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
+ AVX512BF16 built-in functions and code generation.
+ 
+ menqcmd
+ Target Report Mask(ISA2_ENQCMD) Var(ix86_isa_flags2) Save
+ Support ENQCMD built-in functions and code generation.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/i386elf.h gcc-10.1.0/gcc/config/i386/i386elf.h
*** gcc-9.3.0/gcc/config/i386/i386elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/i386elf.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target definitions for GCC for Intel 80386 using ELF
!    Copyright (C) 1988-2019 Free Software Foundation, Inc.
  
     Derived from sysv4.h written by Ron Guilmette (rfg@netcom.com).
  
--- 1,5 ----
  /* Target definitions for GCC for Intel 80386 using ELF
!    Copyright (C) 1988-2020 Free Software Foundation, Inc.
  
     Derived from sysv4.h written by Ron Guilmette (rfg@netcom.com).
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/ia32intrin.h gcc-10.1.0/gcc/config/i386/ia32intrin.h
*** gcc-9.3.0/gcc/config/i386/ia32intrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/ia32intrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/iamcu.h gcc-10.1.0/gcc/config/i386/iamcu.h
*** gcc-9.3.0/gcc/config/i386/iamcu.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/iamcu.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions of target machine for Intel MCU psABI.
!    Copyright (C) 2015-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions of target machine for Intel MCU psABI.
!    Copyright (C) 2015-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/immintrin.h gcc-10.1.0/gcc/config/i386/immintrin.h
*** gcc-9.3.0/gcc/config/i386/immintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/immintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2008-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2008-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
***************
*** 96,101 ****
--- 96,105 ----
  
  #include <avx512bitalgintrin.h>
  
+ #include <avx512vp2intersectintrin.h>
+ 
+ #include <avx512vp2intersectvlintrin.h>
+ 
  #include <shaintrin.h>
  
  #include <lzcntintrin.h>
***************
*** 130,135 ****
--- 134,145 ----
  
  #include <cldemoteintrin.h>
  
+ #include <avx512bf16vlintrin.h>
+ 
+ #include <avx512bf16intrin.h>
+ 
+ #include <enqcmdintrin.h>
+ 
  #include <rdseedintrin.h>
  
  #include <prfchwintrin.h>
diff -Nrcpad gcc-9.3.0/gcc/config/i386/intelmic-mkoffload.c gcc-10.1.0/gcc/config/i386/intelmic-mkoffload.c
*** gcc-9.3.0/gcc/config/i386/intelmic-mkoffload.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/intelmic-mkoffload.c	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Offload image generation tool for Intel MIC devices.
  
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
     Contributed by Ilya Verbin <ilya.verbin@intel.com>.
  
--- 1,6 ----
  /* Offload image generation tool for Intel MIC devices.
  
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
     Contributed by Ilya Verbin <ilya.verbin@intel.com>.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/intelmic-offload.h gcc-10.1.0/gcc/config/i386/intelmic-offload.h
*** gcc-9.3.0/gcc/config/i386/intelmic-offload.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/intelmic-offload.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Support for Intel MIC offloading.
  
!    Copyright (C) 2014-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,6 ----
  /* Support for Intel MIC offloading.
  
!    Copyright (C) 2014-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/k6.md gcc-10.1.0/gcc/config/i386/k6.md
*** gcc-9.3.0/gcc/config/i386/k6.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/k6.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; AMD K6/K6-2 Scheduling
! ;; Copyright (C) 2002-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; AMD K6/K6-2 Scheduling
! ;; Copyright (C) 2002-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/kfreebsd-gnu.h gcc-10.1.0/gcc/config/i386/kfreebsd-gnu.h
*** gcc-9.3.0/gcc/config/i386/kfreebsd-gnu.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/kfreebsd-gnu.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for Intel 386 running kFreeBSD-based GNU systems with ELF format
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by Robert Millan.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for Intel 386 running kFreeBSD-based GNU systems with ELF format
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by Robert Millan.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/kfreebsd-gnu64.h gcc-10.1.0/gcc/config/i386/kfreebsd-gnu64.h
*** gcc-9.3.0/gcc/config/i386/kfreebsd-gnu64.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/kfreebsd-gnu64.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for AMD x86-64 running kFreeBSD-based GNU systems with ELF format
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
     Contributed by Robert Millan.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for AMD x86-64 running kFreeBSD-based GNU systems with ELF format
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
     Contributed by Robert Millan.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/kopensolaris-gnu.h gcc-10.1.0/gcc/config/i386/kopensolaris-gnu.h
*** gcc-9.3.0/gcc/config/i386/kopensolaris-gnu.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/kopensolaris-gnu.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for Intel 386 running kOpenSolaris-based GNU systems with ELF format
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
     Contributed by Robert Millan.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for Intel 386 running kOpenSolaris-based GNU systems with ELF format
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
     Contributed by Robert Millan.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/linux-common.h gcc-10.1.0/gcc/config/i386/linux-common.h
*** gcc-9.3.0/gcc/config/i386/linux-common.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/linux-common.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for Intel 386 running Linux-based GNU systems with ELF format.
!    Copyright (C) 2012-2019 Free Software Foundation, Inc.
     Contributed by Ilya Enkovich.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for Intel 386 running Linux-based GNU systems with ELF format.
!    Copyright (C) 2012-2020 Free Software Foundation, Inc.
     Contributed by Ilya Enkovich.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/linux.h gcc-10.1.0/gcc/config/i386/linux.h
*** gcc-9.3.0/gcc/config/i386/linux.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/linux.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for Intel 386 running Linux-based GNU systems with ELF format.
!    Copyright (C) 1994-2019 Free Software Foundation, Inc.
     Contributed by Eric Youngdale.
     Modified for stabs-in-ELF by H.J. Lu.
  
--- 1,5 ----
  /* Definitions for Intel 386 running Linux-based GNU systems with ELF format.
!    Copyright (C) 1994-2020 Free Software Foundation, Inc.
     Contributed by Eric Youngdale.
     Modified for stabs-in-ELF by H.J. Lu.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/linux64.h gcc-10.1.0/gcc/config/i386/linux64.h
*** gcc-9.3.0/gcc/config/i386/linux64.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/linux64.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for AMD x86-64 running Linux-based GNU systems with ELF format.
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
     Contributed by Jan Hubicka <jh@suse.cz>, based on linux.h.
  
  This file is part of GCC.
--- 1,5 ----
  /* Definitions for AMD x86-64 running Linux-based GNU systems with ELF format.
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
     Contributed by Jan Hubicka <jh@suse.cz>, based on linux.h.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/lwpintrin.h gcc-10.1.0/gcc/config/i386/lwpintrin.h
*** gcc-9.3.0/gcc/config/i386/lwpintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/lwpintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2007-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2007-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/lynx.h gcc-10.1.0/gcc/config/i386/lynx.h
*** gcc-9.3.0/gcc/config/i386/lynx.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/lynx.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for LynxOS on i386.
!    Copyright (C) 1993-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for LynxOS on i386.
!    Copyright (C) 1993-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/lzcntintrin.h gcc-10.1.0/gcc/config/i386/lzcntintrin.h
*** gcc-9.3.0/gcc/config/i386/lzcntintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/lzcntintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/mingw-pthread.h gcc-10.1.0/gcc/config/i386/mingw-pthread.h
*** gcc-9.3.0/gcc/config/i386/mingw-pthread.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/mingw-pthread.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Defines that pthread library shall be enabled by default
     for target.
!    Copyright (C) 2011-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,6 ----
  /* Defines that pthread library shall be enabled by default
     for target.
!    Copyright (C) 2011-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/mingw-stdint.h gcc-10.1.0/gcc/config/i386/mingw-stdint.h
*** gcc-9.3.0/gcc/config/i386/mingw-stdint.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/mingw-stdint.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for <stdint.h> types on systems using mingw.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for <stdint.h> types on systems using mingw.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/mingw-w64.h gcc-10.1.0/gcc/config/i386/mingw-w64.h
*** gcc-9.3.0/gcc/config/i386/mingw-w64.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/mingw-w64.h	Thu May  7 10:49:59 2020
***************
*** 1,7 ****
  /* Operating system specific defines to be used when targeting GCC for
     hosting on Windows 32/64 via mingw-w64 runtime, using GNU tools and
     the Windows API Library.
!    Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,7 ----
  /* Operating system specific defines to be used when targeting GCC for
     hosting on Windows 32/64 via mingw-w64 runtime, using GNU tools and
     the Windows API Library.
!    Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/mingw-w64.opt gcc-10.1.0/gcc/config/i386/mingw-w64.opt
*** gcc-9.3.0/gcc/config/i386/mingw-w64.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/mingw-w64.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; MinGW-w64-specific options.
  
! ; Copyright (C) 2009-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; MinGW-w64-specific options.
  
! ; Copyright (C) 2009-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/mingw.opt gcc-10.1.0/gcc/config/i386/mingw.opt
*** gcc-9.3.0/gcc/config/i386/mingw.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/mingw.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; MinGW-specific options.
  
! ; Copyright (C) 2008-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; MinGW-specific options.
  
! ; Copyright (C) 2008-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/mingw32.h gcc-10.1.0/gcc/config/i386/mingw32.h
*** gcc-9.3.0/gcc/config/i386/mingw32.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/mingw32.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Operating system specific defines to be used when targeting GCC for
     hosting on Windows32, using GNU tools and the Windows32 API Library.
!    Copyright (C) 1997-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,6 ----
  /* Operating system specific defines to be used when targeting GCC for
     hosting on Windows32, using GNU tools and the Windows32 API Library.
!    Copyright (C) 1997-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/mm3dnow.h gcc-10.1.0/gcc/config/i386/mm3dnow.h
*** gcc-9.3.0/gcc/config/i386/mm3dnow.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/mm3dnow.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2004-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2004-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/mmintrin.h gcc-10.1.0/gcc/config/i386/mmintrin.h
*** gcc-9.3.0/gcc/config/i386/mmintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/mmintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2002-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2002-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
***************
*** 29,35 ****
  
  #if defined __x86_64__ && !defined __SSE__ || !defined __MMX__
  #pragma GCC push_options
! #ifdef __x86_64__
  #pragma GCC target("sse,mmx")
  #else
  #pragma GCC target("mmx")
--- 29,37 ----
  
  #if defined __x86_64__ && !defined __SSE__ || !defined __MMX__
  #pragma GCC push_options
! #ifdef __MMX_WITH_SSE__
! #pragma GCC target("sse2")
! #elif defined __x86_64__
  #pragma GCC target("sse,mmx")
  #else
  #pragma GCC target("mmx")
*************** _m_paddd (__m64 __m1, __m64 __m2)
*** 315,321 ****
--- 317,327 ----
  /* Add the 64-bit values in M1 to the 64-bit values in M2.  */
  #ifndef __SSE2__
  #pragma GCC push_options
+ #ifdef __MMX_WITH_SSE__
+ #pragma GCC target("sse2")
+ #else
  #pragma GCC target("sse2,mmx")
+ #endif
  #define __DISABLE_SSE2__
  #endif /* __SSE2__ */
  
*************** _m_psubd (__m64 __m1, __m64 __m2)
*** 427,433 ****
--- 433,443 ----
  /* Add the 64-bit values in M1 to the 64-bit values in M2.  */
  #ifndef __SSE2__
  #pragma GCC push_options
+ #ifdef __MMX_WITH_SSE__
+ #pragma GCC target("sse2")
+ #else
  #pragma GCC target("sse2,mmx")
+ #endif
  #define __DISABLE_SSE2__
  #endif /* __SSE2__ */
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/mmx.md gcc-10.1.0/gcc/config/i386/mmx.md
*** gcc-9.3.0/gcc/config/i386/mmx.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/mmx.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; GCC machine description for MMX and 3dNOW! instructions
! ;; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; GCC machine description for MMX and 3dNOW! instructions
! ;; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 45,51 ****
  
  ;; 8 byte integral modes handled by MMX (and by extension, SSE)
  (define_mode_iterator MMXMODEI [V8QI V4HI V2SI])
! (define_mode_iterator MMXMODEI8 [V8QI V4HI V2SI V1DI])
  
  ;; All 8-byte vector modes handled by MMX
  (define_mode_iterator MMXMODE [V8QI V4HI V2SI V1DI V2SF])
--- 45,51 ----
  
  ;; 8 byte integral modes handled by MMX (and by extension, SSE)
  (define_mode_iterator MMXMODEI [V8QI V4HI V2SI])
! (define_mode_iterator MMXMODEI8 [V8QI V4HI V2SI (V1DI "TARGET_SSE2")])
  
  ;; All 8-byte vector modes handled by MMX
  (define_mode_iterator MMXMODE [V8QI V4HI V2SI V1DI V2SF])
***************
*** 58,63 ****
--- 58,66 ----
  ;; Mapping from integer vector mode to mnemonic suffix
  (define_mode_attr mmxvecsize [(V8QI "b") (V4HI "w") (V2SI "d") (V1DI "q")])
  
+ (define_mode_attr mmxdoublemode
+   [(V8QI "V8HI") (V4HI "V4SI")])
+ 
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;
  ;; Move patterns
***************
*** 70,76 ****
  (define_expand "mov<mode>"
    [(set (match_operand:MMXMODE 0 "nonimmediate_operand")
  	(match_operand:MMXMODE 1 "nonimmediate_operand"))]
!   "TARGET_MMX"
  {
    ix86_expand_vector_move (<MODE>mode, operands);
    DONE;
--- 73,79 ----
  (define_expand "mov<mode>"
    [(set (match_operand:MMXMODE 0 "nonimmediate_operand")
  	(match_operand:MMXMODE 1 "nonimmediate_operand"))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
  {
    ix86_expand_vector_move (<MODE>mode, operands);
    DONE;
***************
*** 81,87 ****
      "=r ,o ,r,r ,m ,?!y,!y,?!y,m  ,r  ,?!y,v,v,v,m,r,v,!y,*x")
  	(match_operand:MMXMODE 1 "nonimm_or_0_operand"
      "rCo,rC,C,rm,rC,C  ,!y,m  ,?!y,?!y,r  ,C,v,m,v,v,r,*x,!y"))]
!   "TARGET_MMX
     && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
  {
    switch (get_attr_type (insn))
--- 84,90 ----
      "=r ,o ,r,r ,m ,?!y,!y,?!y,m  ,r  ,?!y,v,v,v,m,r,v,!y,*x")
  	(match_operand:MMXMODE 1 "nonimm_or_0_operand"
      "rCo,rC,C,rm,rC,C  ,!y,m  ,?!y,?!y,r  ,C,v,m,v,v,r,*x,!y"))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
     && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
  {
    switch (get_attr_type (insn))
***************
*** 115,143 ****
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       switch (get_attr_mode (insn))
! 	{
! 	case MODE_DI:
! 	  /* Handle broken assemblers that require movd instead of movq.  */
! 	  if (!HAVE_AS_IX86_INTERUNIT_MOVQ
! 	      && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1])))
! 	    return "%vmovd\t{%1, %0|%0, %1}";
! 	  return "%vmovq\t{%1, %0|%0, %1}";
! 	case MODE_TI:
! 	  return "%vmovdqa\t{%1, %0|%0, %1}";
! 	case MODE_XI:
! 	  return "vmovdqa64\t{%g1, %g0|%g0, %g1}";
! 
! 	case MODE_V2SF:
! 	  if (TARGET_AVX && REG_P (operands[0]))
! 	    return "vmovlps\t{%1, %0, %0|%0, %0, %1}";
! 	  return "%vmovlps\t{%1, %0|%0, %1}";
! 	case MODE_V4SF:
! 	  return "%vmovaps\t{%1, %0|%0, %1}";
! 
! 	default:
! 	  gcc_unreachable ();
! 	}
  
      default:
        gcc_unreachable ();
--- 118,124 ----
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       return ix86_output_ssemov (insn, operands);
  
      default:
        gcc_unreachable ();
***************
*** 186,202 ****
       (cond [(eq_attr "alternative" "2")
  	      (const_string "SI")
  	    (eq_attr "alternative" "11,12")
! 	      (cond [(ior (match_operand 0 "ext_sse_reg_operand")
! 			  (match_operand 1 "ext_sse_reg_operand"))
! 			(const_string "XI")
! 		     (match_test "<MODE>mode == V2SFmode")
  		       (const_string "V4SF")
  		     (ior (not (match_test "TARGET_SSE2"))
! 			  (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
! 		       (const_string "V4SF")
! 		     (match_test "TARGET_AVX")
! 		       (const_string "TI")
! 		     (match_test "optimize_function_for_size_p (cfun)")
  		       (const_string "V4SF")
  		    ]
  		    (const_string "TI"))
--- 167,176 ----
       (cond [(eq_attr "alternative" "2")
  	      (const_string "SI")
  	    (eq_attr "alternative" "11,12")
! 	      (cond [(match_test "<MODE>mode == V2SFmode")
  		       (const_string "V4SF")
  		     (ior (not (match_test "TARGET_SSE2"))
! 			  (match_test "optimize_function_for_size_p (cfun)"))
  		       (const_string "V4SF")
  		    ]
  		    (const_string "TI"))
***************
*** 232,250 ****
  (define_expand "movmisalign<mode>"
    [(set (match_operand:MMXMODE 0 "nonimmediate_operand")
  	(match_operand:MMXMODE 1 "nonimmediate_operand"))]
!   "TARGET_MMX"
  {
    ix86_expand_vector_move (<MODE>mode, operands);
    DONE;
  })
  
  (define_insn "sse_movntq"
!   [(set (match_operand:DI 0 "memory_operand" "=m")
! 	(unspec:DI [(match_operand:DI 1 "register_operand" "y")]
  		   UNSPEC_MOVNTQ))]
!   "TARGET_SSE || TARGET_3DNOW_A"
!   "movntq\t{%1, %0|%0, %1}"
!   [(set_attr "type" "mmxmov")
     (set_attr "mode" "DI")])
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
--- 206,229 ----
  (define_expand "movmisalign<mode>"
    [(set (match_operand:MMXMODE 0 "nonimmediate_operand")
  	(match_operand:MMXMODE 1 "nonimmediate_operand"))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
  {
    ix86_expand_vector_move (<MODE>mode, operands);
    DONE;
  })
  
  (define_insn "sse_movntq"
!   [(set (match_operand:DI 0 "memory_operand" "=m,m")
! 	(unspec:DI [(match_operand:DI 1 "register_operand" "y,r")]
  		   UNSPEC_MOVNTQ))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)"
!   "@
!    movntq\t{%1, %0|%0, %1}
!    movnti\t{%1, %0|%0, %1}"
!   [(set_attr "isa" "*,x64")
!    (set_attr "mmx_isa" "native,*")
!    (set_attr "type" "mmxmov,ssemov")
     (set_attr "mode" "DI")])
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
***************
*** 576,589 ****
     (set_attr "prefix_extra" "1")
     (set_attr "mode" "V2SF")])
  
! (define_insn "*vec_dupv2sf"
!   [(set (match_operand:V2SF 0 "register_operand" "=y")
  	(vec_duplicate:V2SF
! 	  (match_operand:SF 1 "register_operand" "0")))]
!   "TARGET_MMX"
!   "punpckldq\t%0, %0"
!   [(set_attr "type" "mmxcvt")
!    (set_attr "mode" "DI")])
  
  (define_insn "*mmx_concatv2sf"
    [(set (match_operand:V2SF 0 "register_operand"     "=y,y")
--- 555,581 ----
     (set_attr "prefix_extra" "1")
     (set_attr "mode" "V2SF")])
  
! (define_insn_and_split "*vec_dupv2sf"
!   [(set (match_operand:V2SF 0 "register_operand" "=y,x,Yv")
  	(vec_duplicate:V2SF
! 	  (match_operand:SF 1 "register_operand" "0,0,Yv")))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    punpckldq\t%0, %0
!    #
!    #"
!   "TARGET_SSE && reload_completed
!    && SSE_REGNO_P (REGNO (operands[0]))"
!   [(set (match_dup 0)
! 	(vec_duplicate:V4SF (match_dup 1)))]
! {
!   operands[0] = lowpart_subreg (V4SFmode, operands[0],
! 				GET_MODE (operands[0]));
! }
!   [(set_attr "isa" "*,sse_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxcvt,ssemov,ssemov")
!    (set_attr "mode" "DI,TI,TI")])
  
  (define_insn "*mmx_concatv2sf"
    [(set (match_operand:V2SF 0 "register_operand"     "=y,y")
***************
*** 601,609 ****
    [(match_operand:V2SF 0 "register_operand")
     (match_operand:SF 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX"
  {
!   ix86_expand_vector_set (false, operands[0], operands[1],
  			  INTVAL (operands[2]));
    DONE;
  })
--- 593,601 ----
    [(match_operand:V2SF 0 "register_operand")
     (match_operand:SF 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
  {
!   ix86_expand_vector_set (TARGET_MMX_WITH_SSE, operands[0], operands[1],
  			  INTVAL (operands[2]));
    DONE;
  })
***************
*** 615,625 ****
  	(vec_select:SF
  	  (match_operand:V2SF 1 "nonimmediate_operand" " xm,x,ym,y,m,m")
  	  (parallel [(const_int 0)])))]
!   "TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
    "#"
    "&& reload_completed"
    [(set (match_dup 0) (match_dup 1))]
!   "operands[1] = gen_lowpart (SFmode, operands[1]);")
  
  ;; Avoid combining registers from different units in a single alternative,
  ;; see comment above inline_secondary_memory_needed function in i386.c
--- 607,619 ----
  	(vec_select:SF
  	  (match_operand:V2SF 1 "nonimmediate_operand" " xm,x,ym,y,m,m")
  	  (parallel [(const_int 0)])))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
    "#"
    "&& reload_completed"
    [(set (match_dup 0) (match_dup 1))]
!   "operands[1] = gen_lowpart (SFmode, operands[1]);"
!   [(set_attr "mmx_isa" "*,*,native,native,*,*")])
  
  ;; Avoid combining registers from different units in a single alternative,
  ;; see comment above inline_secondary_memory_needed function in i386.c
***************
*** 628,634 ****
  	(vec_select:SF
  	  (match_operand:V2SF 1 "nonimmediate_operand" " 0,x,0,o,o,o,o")
  	  (parallel [(const_int 1)])))]
!   "TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
    "@
     punpckhdq\t%0, %0
     %vmovshdup\t{%1, %0|%0, %1}
--- 622,629 ----
  	(vec_select:SF
  	  (match_operand:V2SF 1 "nonimmediate_operand" " 0,x,0,o,o,o,o")
  	  (parallel [(const_int 1)])))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
    "@
     punpckhdq\t%0, %0
     %vmovshdup\t{%1, %0|%0, %1}
***************
*** 638,643 ****
--- 633,639 ----
     #
     #"
    [(set_attr "isa" "*,sse3,noavx,*,*,*,*")
+    (set_attr "mmx_isa" "native,*,*,native,*,*,*")
     (set_attr "type" "mmxcvt,sse,sseshuf1,mmxmov,ssemov,fmov,imov")
     (set (attr "length_immediate")
       (if_then_else (eq_attr "alternative" "2")
***************
*** 655,661 ****
  	(vec_select:SF
  	  (match_operand:V2SF 1 "memory_operand")
  	  (parallel [(const_int 1)])))]
!   "TARGET_MMX && reload_completed"
    [(set (match_dup 0) (match_dup 1))]
    "operands[1] = adjust_address (operands[1], SFmode, 4);")
  
--- 651,657 ----
  	(vec_select:SF
  	  (match_operand:V2SF 1 "memory_operand")
  	  (parallel [(const_int 1)])))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE) && reload_completed"
    [(set (match_dup 0) (match_dup 1))]
    "operands[1] = adjust_address (operands[1], SFmode, 4);")
  
***************
*** 663,681 ****
    [(match_operand:SF 0 "register_operand")
     (match_operand:V2SF 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX"
  {
!   ix86_expand_vector_extract (false, operands[0], operands[1],
! 			      INTVAL (operands[2]));
    DONE;
  })
  
  (define_expand "vec_initv2sfsf"
    [(match_operand:V2SF 0 "register_operand")
     (match_operand 1)]
!   "TARGET_SSE"
  {
!   ix86_expand_vector_init (false, operands[0], operands[1]);
    DONE;
  })
  
--- 659,678 ----
    [(match_operand:SF 0 "register_operand")
     (match_operand:V2SF 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
  {
!   ix86_expand_vector_extract (TARGET_MMX_WITH_SSE, operands[0],
! 			      operands[1], INTVAL (operands[2]));
    DONE;
  })
  
  (define_expand "vec_initv2sfsf"
    [(match_operand:V2SF 0 "register_operand")
     (match_operand 1)]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE"
  {
!   ix86_expand_vector_init (TARGET_MMX_WITH_SSE, operands[0],
! 			   operands[1]);
    DONE;
  })
  
***************
*** 688,742 ****
  (define_expand "mmx_<plusminus_insn><mode>3"
    [(set (match_operand:MMXMODEI8 0 "register_operand")
  	(plusminus:MMXMODEI8
! 	  (match_operand:MMXMODEI8 1 "nonimmediate_operand")
! 	  (match_operand:MMXMODEI8 2 "nonimmediate_operand")))]
!   "TARGET_MMX || (TARGET_SSE2 && <MODE>mode == V1DImode)"
    "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
  
  (define_insn "*mmx_<plusminus_insn><mode>3"
!   [(set (match_operand:MMXMODEI8 0 "register_operand" "=y")
          (plusminus:MMXMODEI8
! 	  (match_operand:MMXMODEI8 1 "nonimmediate_operand" "<comm>0")
! 	  (match_operand:MMXMODEI8 2 "nonimmediate_operand" "ym")))]
!   "(TARGET_MMX || (TARGET_SSE2 && <MODE>mode == V1DImode))
     && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
!   "p<plusminus_mnemonic><mmxvecsize>\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxadd")
!    (set_attr "mode" "DI")])
  
  (define_expand "mmx_<plusminus_insn><mode>3"
    [(set (match_operand:MMXMODE12 0 "register_operand")
  	(sat_plusminus:MMXMODE12
! 	  (match_operand:MMXMODE12 1 "nonimmediate_operand")
! 	  (match_operand:MMXMODE12 2 "nonimmediate_operand")))]
!   "TARGET_MMX"
    "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
  
  (define_insn "*mmx_<plusminus_insn><mode>3"
!   [(set (match_operand:MMXMODE12 0 "register_operand" "=y")
          (sat_plusminus:MMXMODE12
! 	  (match_operand:MMXMODE12 1 "nonimmediate_operand" "<comm>0")
! 	  (match_operand:MMXMODE12 2 "nonimmediate_operand" "ym")))]
!   "TARGET_MMX && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
!   "p<plusminus_mnemonic><mmxvecsize>\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxadd")
!    (set_attr "mode" "DI")])
  
  (define_expand "mmx_mulv4hi3"
    [(set (match_operand:V4HI 0 "register_operand")
!         (mult:V4HI (match_operand:V4HI 1 "nonimmediate_operand")
! 		   (match_operand:V4HI 2 "nonimmediate_operand")))]
!   "TARGET_MMX"
    "ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")
  
  (define_insn "*mmx_mulv4hi3"
!   [(set (match_operand:V4HI 0 "register_operand" "=y")
!         (mult:V4HI (match_operand:V4HI 1 "nonimmediate_operand" "%0")
! 		   (match_operand:V4HI 2 "nonimmediate_operand" "ym")))]
!   "TARGET_MMX && ix86_binary_operator_ok (MULT, V4HImode, operands)"
!   "pmullw\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxmul")
!    (set_attr "mode" "DI")])
  
  (define_expand "mmx_smulv4hi3_highpart"
    [(set (match_operand:V4HI 0 "register_operand")
--- 685,771 ----
  (define_expand "mmx_<plusminus_insn><mode>3"
    [(set (match_operand:MMXMODEI8 0 "register_operand")
  	(plusminus:MMXMODEI8
! 	  (match_operand:MMXMODEI8 1 "register_mmxmem_operand")
! 	  (match_operand:MMXMODEI8 2 "register_mmxmem_operand")))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
! 
! (define_expand "<plusminus_insn><mode>3"
!   [(set (match_operand:MMXMODEI 0 "register_operand")
! 	(plusminus:MMXMODEI
! 	  (match_operand:MMXMODEI 1 "register_operand")
! 	  (match_operand:MMXMODEI 2 "register_operand")))]
!   "TARGET_MMX_WITH_SSE"
    "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
  
  (define_insn "*mmx_<plusminus_insn><mode>3"
!   [(set (match_operand:MMXMODEI8 0 "register_operand" "=y,x,Yv")
          (plusminus:MMXMODEI8
! 	  (match_operand:MMXMODEI8 1 "register_mmxmem_operand" "<comm>0,0,Yv")
! 	  (match_operand:MMXMODEI8 2 "register_mmxmem_operand" "ym,x,Yv")))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
     && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
!   "@
!    p<plusminus_mnemonic><mmxvecsize>\t{%2, %0|%0, %2}
!    p<plusminus_mnemonic><mmxvecsize>\t{%2, %0|%0, %2}
!    vp<plusminus_mnemonic><mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxadd,sseadd,sseadd")
!    (set_attr "mode" "DI,TI,TI")])
  
  (define_expand "mmx_<plusminus_insn><mode>3"
    [(set (match_operand:MMXMODE12 0 "register_operand")
  	(sat_plusminus:MMXMODE12
! 	  (match_operand:MMXMODE12 1 "register_mmxmem_operand")
! 	  (match_operand:MMXMODE12 2 "register_mmxmem_operand")))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
    "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
  
  (define_insn "*mmx_<plusminus_insn><mode>3"
!   [(set (match_operand:MMXMODE12 0 "register_operand" "=y,x,Yv")
          (sat_plusminus:MMXMODE12
! 	  (match_operand:MMXMODE12 1 "register_mmxmem_operand" "<comm>0,0,Yv")
! 	  (match_operand:MMXMODE12 2 "register_mmxmem_operand" "ym,x,Yv")))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
!   "@
!    p<plusminus_mnemonic><mmxvecsize>\t{%2, %0|%0, %2}
!    p<plusminus_mnemonic><mmxvecsize>\t{%2, %0|%0, %2}
!    vp<plusminus_mnemonic><mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxadd,sseadd,sseadd")
!    (set_attr "mode" "DI,TI,TI")])
  
  (define_expand "mmx_mulv4hi3"
    [(set (match_operand:V4HI 0 "register_operand")
!         (mult:V4HI (match_operand:V4HI 1 "register_mmxmem_operand")
! 		   (match_operand:V4HI 2 "register_mmxmem_operand")))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")
! 
! (define_expand "mulv4hi3"
!   [(set (match_operand:V4HI 0 "register_operand")
!         (mult:V4HI (match_operand:V4HI 1 "register_operand")
! 		   (match_operand:V4HI 2 "register_operand")))]
!   "TARGET_MMX_WITH_SSE"
    "ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")
  
  (define_insn "*mmx_mulv4hi3"
!   [(set (match_operand:V4HI 0 "register_operand" "=y,x,Yv")
!         (mult:V4HI (match_operand:V4HI 1 "register_mmxmem_operand" "%0,0,Yv")
! 		   (match_operand:V4HI 2 "register_mmxmem_operand" "ym,x,Yv")))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && ix86_binary_operator_ok (MULT, V4HImode, operands)"
!   "@
!    pmullw\t{%2, %0|%0, %2}
!    pmullw\t{%2, %0|%0, %2}
!    vpmullw\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxmul,ssemul,ssemul")
!    (set_attr "mode" "DI,TI,TI")])
  
  (define_expand "mmx_smulv4hi3_highpart"
    [(set (match_operand:V4HI 0 "register_operand")
***************
*** 744,770 ****
  	  (lshiftrt:V4SI
  	    (mult:V4SI
  	      (sign_extend:V4SI
! 		(match_operand:V4HI 1 "nonimmediate_operand"))
  	      (sign_extend:V4SI
! 		(match_operand:V4HI 2 "nonimmediate_operand")))
  	    (const_int 16))))]
!   "TARGET_MMX"
    "ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")
  
  (define_insn "*mmx_smulv4hi3_highpart"
!   [(set (match_operand:V4HI 0 "register_operand" "=y")
  	(truncate:V4HI
  	  (lshiftrt:V4SI
  	    (mult:V4SI
  	      (sign_extend:V4SI
! 		(match_operand:V4HI 1 "nonimmediate_operand" "%0"))
  	      (sign_extend:V4SI
! 		(match_operand:V4HI 2 "nonimmediate_operand" "ym")))
  	    (const_int 16))))]
!   "TARGET_MMX && ix86_binary_operator_ok (MULT, V4HImode, operands)"
!   "pmulhw\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxmul")
!    (set_attr "mode" "DI")])
  
  (define_expand "mmx_umulv4hi3_highpart"
    [(set (match_operand:V4HI 0 "register_operand")
--- 773,805 ----
  	  (lshiftrt:V4SI
  	    (mult:V4SI
  	      (sign_extend:V4SI
! 		(match_operand:V4HI 1 "register_mmxmem_operand"))
  	      (sign_extend:V4SI
! 		(match_operand:V4HI 2 "register_mmxmem_operand")))
  	    (const_int 16))))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
    "ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")
  
  (define_insn "*mmx_smulv4hi3_highpart"
!   [(set (match_operand:V4HI 0 "register_operand" "=y,x,Yv")
  	(truncate:V4HI
  	  (lshiftrt:V4SI
  	    (mult:V4SI
  	      (sign_extend:V4SI
! 		(match_operand:V4HI 1 "register_mmxmem_operand" "%0,0,Yv"))
  	      (sign_extend:V4SI
! 		(match_operand:V4HI 2 "register_mmxmem_operand" "ym,x,Yv")))
  	    (const_int 16))))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && ix86_binary_operator_ok (MULT, V4HImode, operands)"
!   "@
!    pmulhw\t{%2, %0|%0, %2}
!    pmulhw\t{%2, %0|%0, %2}
!    vpmulhw\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxmul,ssemul,ssemul")
!    (set_attr "mode" "DI,TI,TI")])
  
  (define_expand "mmx_umulv4hi3_highpart"
    [(set (match_operand:V4HI 0 "register_operand")
***************
*** 772,799 ****
  	  (lshiftrt:V4SI
  	    (mult:V4SI
  	      (zero_extend:V4SI
! 		(match_operand:V4HI 1 "nonimmediate_operand"))
  	      (zero_extend:V4SI
! 		(match_operand:V4HI 2 "nonimmediate_operand")))
  	    (const_int 16))))]
!   "TARGET_SSE || TARGET_3DNOW_A"
    "ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")
  
  (define_insn "*mmx_umulv4hi3_highpart"
!   [(set (match_operand:V4HI 0 "register_operand" "=y")
  	(truncate:V4HI
  	  (lshiftrt:V4SI
  	    (mult:V4SI
  	      (zero_extend:V4SI
! 		(match_operand:V4HI 1 "nonimmediate_operand" "%0"))
  	      (zero_extend:V4SI
! 		(match_operand:V4HI 2 "nonimmediate_operand" "ym")))
  	  (const_int 16))))]
!   "(TARGET_SSE || TARGET_3DNOW_A)
     && ix86_binary_operator_ok (MULT, V4HImode, operands)"
!   "pmulhuw\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxmul")
!    (set_attr "mode" "DI")])
  
  (define_expand "mmx_pmaddwd"
    [(set (match_operand:V2SI 0 "register_operand")
--- 807,841 ----
  	  (lshiftrt:V4SI
  	    (mult:V4SI
  	      (zero_extend:V4SI
! 		(match_operand:V4HI 1 "register_mmxmem_operand"))
  	      (zero_extend:V4SI
! 		(match_operand:V4HI 2 "register_mmxmem_operand")))
  	    (const_int 16))))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)"
    "ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")
  
  (define_insn "*mmx_umulv4hi3_highpart"
!   [(set (match_operand:V4HI 0 "register_operand" "=y,x,Yv")
  	(truncate:V4HI
  	  (lshiftrt:V4SI
  	    (mult:V4SI
  	      (zero_extend:V4SI
! 		(match_operand:V4HI 1 "register_mmxmem_operand" "%0,0,Yv"))
  	      (zero_extend:V4SI
! 		(match_operand:V4HI 2 "register_mmxmem_operand" "ym,x,Yv")))
  	  (const_int 16))))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)
     && ix86_binary_operator_ok (MULT, V4HImode, operands)"
!   "@
!    pmulhuw\t{%2, %0|%0, %2}
!    pmulhuw\t{%2, %0|%0, %2}
!    vpmulhuw\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxmul,ssemul,ssemul")
!    (set_attr "mode" "DI,TI,TI")])
  
  (define_expand "mmx_pmaddwd"
    [(set (match_operand:V2SI 0 "register_operand")
***************
*** 801,811 ****
  	  (mult:V2SI
  	    (sign_extend:V2SI
  	      (vec_select:V2HI
! 		(match_operand:V4HI 1 "nonimmediate_operand")
  		(parallel [(const_int 0) (const_int 2)])))
  	    (sign_extend:V2SI
  	      (vec_select:V2HI
! 		(match_operand:V4HI 2 "nonimmediate_operand")
  		(parallel [(const_int 0) (const_int 2)]))))
  	  (mult:V2SI
  	    (sign_extend:V2SI
--- 843,853 ----
  	  (mult:V2SI
  	    (sign_extend:V2SI
  	      (vec_select:V2HI
! 		(match_operand:V4HI 1 "register_mmxmem_operand")
  		(parallel [(const_int 0) (const_int 2)])))
  	    (sign_extend:V2SI
  	      (vec_select:V2HI
! 		(match_operand:V4HI 2 "register_mmxmem_operand")
  		(parallel [(const_int 0) (const_int 2)]))))
  	  (mult:V2SI
  	    (sign_extend:V2SI
***************
*** 814,833 ****
  	    (sign_extend:V2SI
  	      (vec_select:V2HI (match_dup 2)
  		(parallel [(const_int 1) (const_int 3)]))))))]
!   "TARGET_MMX"
    "ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")
  
  (define_insn "*mmx_pmaddwd"
!   [(set (match_operand:V2SI 0 "register_operand" "=y")
          (plus:V2SI
  	  (mult:V2SI
  	    (sign_extend:V2SI
  	      (vec_select:V2HI
! 		(match_operand:V4HI 1 "nonimmediate_operand" "%0")
  		(parallel [(const_int 0) (const_int 2)])))
  	    (sign_extend:V2SI
  	      (vec_select:V2HI
! 		(match_operand:V4HI 2 "nonimmediate_operand" "ym")
  		(parallel [(const_int 0) (const_int 2)]))))
  	  (mult:V2SI
  	    (sign_extend:V2SI
--- 856,875 ----
  	    (sign_extend:V2SI
  	      (vec_select:V2HI (match_dup 2)
  		(parallel [(const_int 1) (const_int 3)]))))))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
    "ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")
  
  (define_insn "*mmx_pmaddwd"
!   [(set (match_operand:V2SI 0 "register_operand" "=y,x,Yv")
          (plus:V2SI
  	  (mult:V2SI
  	    (sign_extend:V2SI
  	      (vec_select:V2HI
! 		(match_operand:V4HI 1 "register_mmxmem_operand" "%0,0,Yv")
  		(parallel [(const_int 0) (const_int 2)])))
  	    (sign_extend:V2SI
  	      (vec_select:V2HI
! 		(match_operand:V4HI 2 "register_mmxmem_operand" "ym,x,Yv")
  		(parallel [(const_int 0) (const_int 2)]))))
  	  (mult:V2SI
  	    (sign_extend:V2SI
***************
*** 836,845 ****
  	    (sign_extend:V2SI
  	      (vec_select:V2HI (match_dup 2)
  		(parallel [(const_int 1) (const_int 3)]))))))]
!   "TARGET_MMX && ix86_binary_operator_ok (MULT, V4HImode, operands)"
!   "pmaddwd\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxmul")
!    (set_attr "mode" "DI")])
  
  (define_expand "mmx_pmulhrwv4hi3"
    [(set (match_operand:V4HI 0 "register_operand")
--- 878,893 ----
  	    (sign_extend:V2SI
  	      (vec_select:V2HI (match_dup 2)
  		(parallel [(const_int 1) (const_int 3)]))))))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && ix86_binary_operator_ok (MULT, V4HImode, operands)"
!   "@
!    pmaddwd\t{%2, %0|%0, %2}
!    pmaddwd\t{%2, %0|%0, %2}
!    vpmaddwd\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxmul,sseiadd,sseiadd")
!    (set_attr "mode" "DI,TI,TI")])
  
  (define_expand "mmx_pmulhrwv4hi3"
    [(set (match_operand:V4HI 0 "register_operand")
***************
*** 881,976 ****
          (mult:V1DI
  	  (zero_extend:V1DI
  	    (vec_select:V1SI
! 	      (match_operand:V2SI 1 "nonimmediate_operand")
  	      (parallel [(const_int 0)])))
  	  (zero_extend:V1DI
  	    (vec_select:V1SI
! 	      (match_operand:V2SI 2 "nonimmediate_operand")
  	      (parallel [(const_int 0)])))))]
!   "TARGET_SSE2"
    "ix86_fixup_binary_operands_no_copy (MULT, V2SImode, operands);")
  
  (define_insn "*sse2_umulv1siv1di3"
!   [(set (match_operand:V1DI 0 "register_operand" "=y")
          (mult:V1DI
  	  (zero_extend:V1DI
  	    (vec_select:V1SI
! 	      (match_operand:V2SI 1 "nonimmediate_operand" "%0")
  	      (parallel [(const_int 0)])))
  	  (zero_extend:V1DI
  	    (vec_select:V1SI
! 	      (match_operand:V2SI 2 "nonimmediate_operand" "ym")
  	      (parallel [(const_int 0)])))))]
!   "TARGET_SSE2 && ix86_binary_operator_ok (MULT, V2SImode, operands)"
!   "pmuludq\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxmul")
!    (set_attr "mode" "DI")])
  
  (define_expand "mmx_<code>v4hi3"
    [(set (match_operand:V4HI 0 "register_operand")
          (smaxmin:V4HI
! 	  (match_operand:V4HI 1 "nonimmediate_operand")
! 	  (match_operand:V4HI 2 "nonimmediate_operand")))]
!   "TARGET_SSE || TARGET_3DNOW_A"
    "ix86_fixup_binary_operands_no_copy (<CODE>, V4HImode, operands);")
  
  (define_insn "*mmx_<code>v4hi3"
!   [(set (match_operand:V4HI 0 "register_operand" "=y")
          (smaxmin:V4HI
! 	  (match_operand:V4HI 1 "nonimmediate_operand" "%0")
! 	  (match_operand:V4HI 2 "nonimmediate_operand" "ym")))]
!   "(TARGET_SSE || TARGET_3DNOW_A)
     && ix86_binary_operator_ok (<CODE>, V4HImode, operands)"
!   "p<maxmin_int>w\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxadd")
!    (set_attr "mode" "DI")])
  
  (define_expand "mmx_<code>v8qi3"
    [(set (match_operand:V8QI 0 "register_operand")
          (umaxmin:V8QI
! 	  (match_operand:V8QI 1 "nonimmediate_operand")
! 	  (match_operand:V8QI 2 "nonimmediate_operand")))]
!   "TARGET_SSE || TARGET_3DNOW_A"
    "ix86_fixup_binary_operands_no_copy (<CODE>, V8QImode, operands);")
  
  (define_insn "*mmx_<code>v8qi3"
!   [(set (match_operand:V8QI 0 "register_operand" "=y")
          (umaxmin:V8QI
! 	  (match_operand:V8QI 1 "nonimmediate_operand" "%0")
! 	  (match_operand:V8QI 2 "nonimmediate_operand" "ym")))]
!   "(TARGET_SSE || TARGET_3DNOW_A)
     && ix86_binary_operator_ok (<CODE>, V8QImode, operands)"
!   "p<maxmin_int>b\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxadd")
!    (set_attr "mode" "DI")])
  
  (define_insn "mmx_ashr<mode>3"
!   [(set (match_operand:MMXMODE24 0 "register_operand" "=y")
          (ashiftrt:MMXMODE24
! 	  (match_operand:MMXMODE24 1 "register_operand" "0")
! 	  (match_operand:DI 2 "nonmemory_operand" "yN")))]
!   "TARGET_MMX"
!   "psra<mmxvecsize>\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxshft")
     (set (attr "length_immediate")
       (if_then_else (match_operand 2 "const_int_operand")
         (const_string "1")
         (const_string "0")))
!    (set_attr "mode" "DI")])
  
  (define_insn "mmx_<shift_insn><mode>3"
!   [(set (match_operand:MMXMODE248 0 "register_operand" "=y")
          (any_lshift:MMXMODE248
! 	  (match_operand:MMXMODE248 1 "register_operand" "0")
! 	  (match_operand:DI 2 "nonmemory_operand" "yN")))]
!   "TARGET_MMX"
!   "p<vshift><mmxvecsize>\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxshft")
     (set (attr "length_immediate")
       (if_then_else (match_operand 2 "const_int_operand")
         (const_string "1")
         (const_string "0")))
!    (set_attr "mode" "DI")])
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;
--- 929,1085 ----
          (mult:V1DI
  	  (zero_extend:V1DI
  	    (vec_select:V1SI
! 	      (match_operand:V2SI 1 "register_mmxmem_operand")
  	      (parallel [(const_int 0)])))
  	  (zero_extend:V1DI
  	    (vec_select:V1SI
! 	      (match_operand:V2SI 2 "register_mmxmem_operand")
  	      (parallel [(const_int 0)])))))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE2"
    "ix86_fixup_binary_operands_no_copy (MULT, V2SImode, operands);")
  
  (define_insn "*sse2_umulv1siv1di3"
!   [(set (match_operand:V1DI 0 "register_operand" "=y,x,Yv")
          (mult:V1DI
  	  (zero_extend:V1DI
  	    (vec_select:V1SI
! 	      (match_operand:V2SI 1 "register_mmxmem_operand" "%0,0,Yv")
  	      (parallel [(const_int 0)])))
  	  (zero_extend:V1DI
  	    (vec_select:V1SI
! 	      (match_operand:V2SI 2 "register_mmxmem_operand" "ym,x,Yv")
  	      (parallel [(const_int 0)])))))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && TARGET_SSE2
!    && ix86_binary_operator_ok (MULT, V2SImode, operands)"
!   "@
!    pmuludq\t{%2, %0|%0, %2}
!    pmuludq\t{%2, %0|%0, %2}
!    vpmuludq\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxmul,ssemul,ssemul")
!    (set_attr "mode" "DI,TI,TI")])
  
  (define_expand "mmx_<code>v4hi3"
    [(set (match_operand:V4HI 0 "register_operand")
          (smaxmin:V4HI
! 	  (match_operand:V4HI 1 "register_mmxmem_operand")
! 	  (match_operand:V4HI 2 "register_mmxmem_operand")))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)"
!   "ix86_fixup_binary_operands_no_copy (<CODE>, V4HImode, operands);")
! 
! (define_expand "<code>v4hi3"
!   [(set (match_operand:V4HI 0 "register_operand")
!         (smaxmin:V4HI
! 	  (match_operand:V4HI 1 "register_operand")
! 	  (match_operand:V4HI 2 "register_operand")))]
!   "TARGET_MMX_WITH_SSE"
    "ix86_fixup_binary_operands_no_copy (<CODE>, V4HImode, operands);")
  
  (define_insn "*mmx_<code>v4hi3"
!   [(set (match_operand:V4HI 0 "register_operand" "=y,x,Yv")
          (smaxmin:V4HI
! 	  (match_operand:V4HI 1 "register_mmxmem_operand" "%0,0,Yv")
! 	  (match_operand:V4HI 2 "register_mmxmem_operand" "ym,x,Yv")))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)
     && ix86_binary_operator_ok (<CODE>, V4HImode, operands)"
!   "@
!    p<maxmin_int>w\t{%2, %0|%0, %2}
!    p<maxmin_int>w\t{%2, %0|%0, %2}
!    vp<maxmin_int>w\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxadd,sseiadd,sseiadd")
!    (set_attr "mode" "DI,TI,TI")])
  
  (define_expand "mmx_<code>v8qi3"
    [(set (match_operand:V8QI 0 "register_operand")
          (umaxmin:V8QI
! 	  (match_operand:V8QI 1 "register_mmxmem_operand")
! 	  (match_operand:V8QI 2 "register_mmxmem_operand")))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)"
!   "ix86_fixup_binary_operands_no_copy (<CODE>, V8QImode, operands);")
! 
! (define_expand "<code>v8qi3"
!   [(set (match_operand:V8QI 0 "register_operand")
!         (umaxmin:V8QI
! 	  (match_operand:V8QI 1 "register_operand")
! 	  (match_operand:V8QI 2 "register_operand")))]
!   "TARGET_MMX_WITH_SSE"
    "ix86_fixup_binary_operands_no_copy (<CODE>, V8QImode, operands);")
  
  (define_insn "*mmx_<code>v8qi3"
!   [(set (match_operand:V8QI 0 "register_operand" "=y,x,Yv")
          (umaxmin:V8QI
! 	  (match_operand:V8QI 1 "register_mmxmem_operand" "%0,0,Yv")
! 	  (match_operand:V8QI 2 "register_mmxmem_operand" "ym,x,Yv")))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)
     && ix86_binary_operator_ok (<CODE>, V8QImode, operands)"
!   "@
!    p<maxmin_int>b\t{%2, %0|%0, %2}
!    p<maxmin_int>b\t{%2, %0|%0, %2}
!    vp<maxmin_int>b\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxadd,sseiadd,sseiadd")
!    (set_attr "mode" "DI,TI,TI")])
  
  (define_insn "mmx_ashr<mode>3"
!   [(set (match_operand:MMXMODE24 0 "register_operand" "=y,x,Yv")
          (ashiftrt:MMXMODE24
! 	  (match_operand:MMXMODE24 1 "register_operand" "0,0,Yv")
! 	  (match_operand:DI 2 "nonmemory_operand" "yN,xN,YvN")))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    psra<mmxvecsize>\t{%2, %0|%0, %2}
!    psra<mmxvecsize>\t{%2, %0|%0, %2}
!    vpsra<mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxshft,sseishft,sseishft")
     (set (attr "length_immediate")
       (if_then_else (match_operand 2 "const_int_operand")
         (const_string "1")
         (const_string "0")))
!    (set_attr "mode" "DI,TI,TI")])
! 
! (define_expand "ashr<mode>3"
!   [(set (match_operand:MMXMODE24 0 "register_operand")
!         (ashiftrt:MMXMODE24
! 	  (match_operand:MMXMODE24 1 "register_operand")
! 	  (match_operand:DI 2 "nonmemory_operand")))]
!   "TARGET_MMX_WITH_SSE")
  
  (define_insn "mmx_<shift_insn><mode>3"
!   [(set (match_operand:MMXMODE248 0 "register_operand" "=y,x,Yv")
          (any_lshift:MMXMODE248
! 	  (match_operand:MMXMODE248 1 "register_operand" "0,0,Yv")
! 	  (match_operand:DI 2 "nonmemory_operand" "yN,xN,YvN")))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    p<vshift><mmxvecsize>\t{%2, %0|%0, %2}
!    p<vshift><mmxvecsize>\t{%2, %0|%0, %2}
!    vp<vshift><mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxshft,sseishft,sseishft")
     (set (attr "length_immediate")
       (if_then_else (match_operand 2 "const_int_operand")
         (const_string "1")
         (const_string "0")))
!    (set_attr "mode" "DI,TI,TI")])
! 
! (define_expand "<shift_insn><mode>3"
!   [(set (match_operand:MMXMODE248 0 "register_operand")
!         (any_lshift:MMXMODE248
! 	  (match_operand:MMXMODE248 1 "register_operand")
! 	  (match_operand:DI 2 "nonmemory_operand")))]
!   "TARGET_MMX_WITH_SSE")
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;
***************
*** 981,1010 ****
  (define_expand "mmx_eq<mode>3"
    [(set (match_operand:MMXMODEI 0 "register_operand")
          (eq:MMXMODEI
! 	  (match_operand:MMXMODEI 1 "nonimmediate_operand")
! 	  (match_operand:MMXMODEI 2 "nonimmediate_operand")))]
!   "TARGET_MMX"
    "ix86_fixup_binary_operands_no_copy (EQ, <MODE>mode, operands);")
  
  (define_insn "*mmx_eq<mode>3"
!   [(set (match_operand:MMXMODEI 0 "register_operand" "=y")
          (eq:MMXMODEI
! 	  (match_operand:MMXMODEI 1 "nonimmediate_operand" "%0")
! 	  (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym")))]
!   "TARGET_MMX && ix86_binary_operator_ok (EQ, <MODE>mode, operands)"
!   "pcmpeq<mmxvecsize>\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxcmp")
!    (set_attr "mode" "DI")])
  
  (define_insn "mmx_gt<mode>3"
!   [(set (match_operand:MMXMODEI 0 "register_operand" "=y")
          (gt:MMXMODEI
! 	  (match_operand:MMXMODEI 1 "register_operand" "0")
! 	  (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym")))]
!   "TARGET_MMX"
!   "pcmpgt<mmxvecsize>\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxcmp")
!    (set_attr "mode" "DI")])
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;
--- 1090,1130 ----
  (define_expand "mmx_eq<mode>3"
    [(set (match_operand:MMXMODEI 0 "register_operand")
          (eq:MMXMODEI
! 	  (match_operand:MMXMODEI 1 "register_mmxmem_operand")
! 	  (match_operand:MMXMODEI 2 "register_mmxmem_operand")))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
    "ix86_fixup_binary_operands_no_copy (EQ, <MODE>mode, operands);")
  
  (define_insn "*mmx_eq<mode>3"
!   [(set (match_operand:MMXMODEI 0 "register_operand" "=y,x,Yv")
          (eq:MMXMODEI
! 	  (match_operand:MMXMODEI 1 "register_mmxmem_operand" "%0,0,Yv")
! 	  (match_operand:MMXMODEI 2 "register_mmxmem_operand" "ym,x,Yv")))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && ix86_binary_operator_ok (EQ, <MODE>mode, operands)"
!   "@
!    pcmpeq<mmxvecsize>\t{%2, %0|%0, %2}
!    pcmpeq<mmxvecsize>\t{%2, %0|%0, %2}
!    vpcmpeq<mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxcmp,ssecmp,ssecmp")
!    (set_attr "mode" "DI,TI,TI")])
  
  (define_insn "mmx_gt<mode>3"
!   [(set (match_operand:MMXMODEI 0 "register_operand" "=y,x,Yv")
          (gt:MMXMODEI
! 	  (match_operand:MMXMODEI 1 "register_operand" "0,0,Yv")
! 	  (match_operand:MMXMODEI 2 "register_mmxmem_operand" "ym,x,Yv")))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    pcmpgt<mmxvecsize>\t{%2, %0|%0, %2}
!    pcmpgt<mmxvecsize>\t{%2, %0|%0, %2}
!    vpcmpgt<mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxcmp,ssecmp,ssecmp")
!    (set_attr "mode" "DI,TI,TI")])
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;
***************
*** 1012,1044 ****
  ;;
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  
  (define_insn "mmx_andnot<mode>3"
!   [(set (match_operand:MMXMODEI 0 "register_operand" "=y")
  	(and:MMXMODEI
! 	  (not:MMXMODEI (match_operand:MMXMODEI 1 "register_operand" "0"))
! 	  (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym")))]
!   "TARGET_MMX"
!   "pandn\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxadd")
!    (set_attr "mode" "DI")])
  
  (define_expand "mmx_<code><mode>3"
    [(set (match_operand:MMXMODEI 0 "register_operand")
  	(any_logic:MMXMODEI
! 	  (match_operand:MMXMODEI 1 "nonimmediate_operand")
! 	  (match_operand:MMXMODEI 2 "nonimmediate_operand")))]
!   "TARGET_MMX"
    "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
  
  (define_insn "*mmx_<code><mode>3"
!   [(set (match_operand:MMXMODEI 0 "register_operand" "=y")
          (any_logic:MMXMODEI
! 	  (match_operand:MMXMODEI 1 "nonimmediate_operand" "%0")
! 	  (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym")))]
!   "TARGET_MMX && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
!   "p<logic>\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxadd")
!    (set_attr "mode" "DI")])
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;
--- 1132,1191 ----
  ;;
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  
+ (define_expand "one_cmpl<mode>2"
+   [(set (match_operand:MMXMODEI 0 "register_operand")
+ 	(xor:MMXMODEI
+ 	  (match_operand:MMXMODEI 1 "register_operand")
+ 	  (match_dup 2)))]
+   "TARGET_MMX_WITH_SSE"
+   "operands[2] = force_reg (<MODE>mode, CONSTM1_RTX (<MODE>mode));")
+ 
  (define_insn "mmx_andnot<mode>3"
!   [(set (match_operand:MMXMODEI 0 "register_operand" "=y,x,Yv")
  	(and:MMXMODEI
! 	  (not:MMXMODEI (match_operand:MMXMODEI 1 "register_operand" "0,0,Yv"))
! 	  (match_operand:MMXMODEI 2 "register_mmxmem_operand" "ym,x,Yv")))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    pandn\t{%2, %0|%0, %2}
!    pandn\t{%2, %0|%0, %2}
!    vpandn\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxadd,sselog,sselog")
!    (set_attr "mode" "DI,TI,TI")])
  
  (define_expand "mmx_<code><mode>3"
    [(set (match_operand:MMXMODEI 0 "register_operand")
  	(any_logic:MMXMODEI
! 	  (match_operand:MMXMODEI 1 "register_mmxmem_operand")
! 	  (match_operand:MMXMODEI 2 "register_mmxmem_operand")))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
! 
! (define_expand "<code><mode>3"
!   [(set (match_operand:MMXMODEI 0 "register_operand")
! 	(any_logic:MMXMODEI
! 	  (match_operand:MMXMODEI 1 "register_operand")
! 	  (match_operand:MMXMODEI 2 "register_operand")))]
!   "TARGET_MMX_WITH_SSE"
    "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
  
  (define_insn "*mmx_<code><mode>3"
!   [(set (match_operand:MMXMODEI 0 "register_operand" "=y,x,Yv")
          (any_logic:MMXMODEI
! 	  (match_operand:MMXMODEI 1 "register_mmxmem_operand" "%0,0,Yv")
! 	  (match_operand:MMXMODEI 2 "register_mmxmem_operand" "ym,x,Yv")))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
!   "@
!    p<logic>\t{%2, %0|%0, %2}
!    p<logic>\t{%2, %0|%0, %2}
!    vp<logic>\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxadd,sselog,sselog")
!    (set_attr "mode" "DI,TI,TI")])
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;
***************
*** 1046,1168 ****
  ;;
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  
! (define_insn "mmx_packsswb"
!   [(set (match_operand:V8QI 0 "register_operand" "=y")
  	(vec_concat:V8QI
! 	  (ss_truncate:V4QI
! 	    (match_operand:V4HI 1 "register_operand" "0"))
! 	  (ss_truncate:V4QI
! 	    (match_operand:V4HI 2 "nonimmediate_operand" "ym"))))]
!   "TARGET_MMX"
!   "packsswb\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxshft")
!    (set_attr "mode" "DI")])
  
! (define_insn "mmx_packssdw"
!   [(set (match_operand:V4HI 0 "register_operand" "=y")
  	(vec_concat:V4HI
  	  (ss_truncate:V2HI
! 	    (match_operand:V2SI 1 "register_operand" "0"))
  	  (ss_truncate:V2HI
! 	    (match_operand:V2SI 2 "nonimmediate_operand" "ym"))))]
!   "TARGET_MMX"
!   "packssdw\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxshft")
!    (set_attr "mode" "DI")])
! 
! (define_insn "mmx_packuswb"
!   [(set (match_operand:V8QI 0 "register_operand" "=y")
! 	(vec_concat:V8QI
! 	  (us_truncate:V4QI
! 	    (match_operand:V4HI 1 "register_operand" "0"))
! 	  (us_truncate:V4QI
! 	    (match_operand:V4HI 2 "nonimmediate_operand" "ym"))))]
!   "TARGET_MMX"
!   "packuswb\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxshft")
!    (set_attr "mode" "DI")])
  
! (define_insn "mmx_punpckhbw"
!   [(set (match_operand:V8QI 0 "register_operand" "=y")
  	(vec_select:V8QI
  	  (vec_concat:V16QI
! 	    (match_operand:V8QI 1 "register_operand" "0")
! 	    (match_operand:V8QI 2 "nonimmediate_operand" "ym"))
            (parallel [(const_int 4) (const_int 12)
                       (const_int 5) (const_int 13)
                       (const_int 6) (const_int 14)
                       (const_int 7) (const_int 15)])))]
!   "TARGET_MMX"
!   "punpckhbw\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxcvt")
!    (set_attr "mode" "DI")])
  
! (define_insn "mmx_punpcklbw"
!   [(set (match_operand:V8QI 0 "register_operand" "=y")
  	(vec_select:V8QI
  	  (vec_concat:V16QI
! 	    (match_operand:V8QI 1 "register_operand" "0")
! 	    (match_operand:V8QI 2 "nonimmediate_operand" "ym"))
            (parallel [(const_int 0) (const_int 8)
                       (const_int 1) (const_int 9)
                       (const_int 2) (const_int 10)
                       (const_int 3) (const_int 11)])))]
!   "TARGET_MMX"
!   "punpcklbw\t{%2, %0|%0, %k2}"
!   [(set_attr "type" "mmxcvt")
!    (set_attr "mode" "DI")])
  
! (define_insn "mmx_punpckhwd"
!   [(set (match_operand:V4HI 0 "register_operand" "=y")
  	(vec_select:V4HI
  	  (vec_concat:V8HI
! 	    (match_operand:V4HI 1 "register_operand" "0")
! 	    (match_operand:V4HI 2 "nonimmediate_operand" "ym"))
            (parallel [(const_int 2) (const_int 6)
                       (const_int 3) (const_int 7)])))]
!   "TARGET_MMX"
!   "punpckhwd\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxcvt")
!    (set_attr "mode" "DI")])
  
! (define_insn "mmx_punpcklwd"
!   [(set (match_operand:V4HI 0 "register_operand" "=y")
  	(vec_select:V4HI
  	  (vec_concat:V8HI
! 	    (match_operand:V4HI 1 "register_operand" "0")
! 	    (match_operand:V4HI 2 "nonimmediate_operand" "ym"))
            (parallel [(const_int 0) (const_int 4)
                       (const_int 1) (const_int 5)])))]
!   "TARGET_MMX"
!   "punpcklwd\t{%2, %0|%0, %k2}"
!   [(set_attr "type" "mmxcvt")
!    (set_attr "mode" "DI")])
  
! (define_insn "mmx_punpckhdq"
!   [(set (match_operand:V2SI 0 "register_operand" "=y")
  	(vec_select:V2SI
  	  (vec_concat:V4SI
! 	    (match_operand:V2SI 1 "register_operand" "0")
! 	    (match_operand:V2SI 2 "nonimmediate_operand" "ym"))
  	  (parallel [(const_int 1)
  		     (const_int 3)])))]
!   "TARGET_MMX"
!   "punpckhdq\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxcvt")
!    (set_attr "mode" "DI")])
  
! (define_insn "mmx_punpckldq"
!   [(set (match_operand:V2SI 0 "register_operand" "=y")
  	(vec_select:V2SI
  	  (vec_concat:V4SI
! 	    (match_operand:V2SI 1 "register_operand" "0")
! 	    (match_operand:V2SI 2 "nonimmediate_operand" "ym"))
  	  (parallel [(const_int 0)
  		     (const_int 2)])))]
!   "TARGET_MMX"
!   "punpckldq\t{%2, %0|%0, %k2}"
!   [(set_attr "type" "mmxcvt")
!    (set_attr "mode" "DI")])
  
  (define_expand "mmx_pinsrw"
    [(set (match_operand:V4HI 0 "register_operand")
--- 1193,1402 ----
  ;;
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  
! ;; Used in signed and unsigned truncations with saturation.
! (define_code_iterator any_s_truncate [ss_truncate us_truncate])
! ;; Instruction suffix for truncations with saturation.
! (define_code_attr s_trunsuffix [(ss_truncate "s") (us_truncate "u")])
! 
! (define_insn_and_split "mmx_pack<s_trunsuffix>swb"
!   [(set (match_operand:V8QI 0 "register_operand" "=y,x,Yv")
  	(vec_concat:V8QI
! 	  (any_s_truncate:V4QI
! 	    (match_operand:V4HI 1 "register_operand" "0,0,Yv"))
! 	  (any_s_truncate:V4QI
! 	    (match_operand:V4HI 2 "register_mmxmem_operand" "ym,x,Yv"))))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    pack<s_trunsuffix>swb\t{%2, %0|%0, %2}
!    #
!    #"
!   "TARGET_SSE2 && reload_completed
!    && SSE_REGNO_P (REGNO (operands[0]))"
!   [(const_int 0)]
!   "ix86_split_mmx_pack (operands, <any_s_truncate:CODE>); DONE;"
!   [(set_attr "mmx_isa" "native,sse_noavx,avx")
!    (set_attr "type" "mmxshft,sselog,sselog")
!    (set_attr "mode" "DI,TI,TI")])
  
! (define_insn_and_split "mmx_packssdw"
!   [(set (match_operand:V4HI 0 "register_operand" "=y,x,Yv")
  	(vec_concat:V4HI
  	  (ss_truncate:V2HI
! 	    (match_operand:V2SI 1 "register_operand" "0,0,Yv"))
  	  (ss_truncate:V2HI
! 	    (match_operand:V2SI 2 "register_mmxmem_operand" "ym,x,Yv"))))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    packssdw\t{%2, %0|%0, %2}
!    #
!    #"
!   "TARGET_SSE2 && reload_completed
!    && SSE_REGNO_P (REGNO (operands[0]))"
!   [(const_int 0)]
!   "ix86_split_mmx_pack (operands, SS_TRUNCATE); DONE;"
!   [(set_attr "mmx_isa" "native,sse_noavx,avx")
!    (set_attr "type" "mmxshft,sselog,sselog")
!    (set_attr "mode" "DI,TI,TI")])
  
! (define_insn_and_split "mmx_punpckhbw"
!   [(set (match_operand:V8QI 0 "register_operand" "=y,x,Yv")
  	(vec_select:V8QI
  	  (vec_concat:V16QI
! 	    (match_operand:V8QI 1 "register_operand" "0,0,Yv")
! 	    (match_operand:V8QI 2 "register_mmxmem_operand" "ym,x,Yv"))
            (parallel [(const_int 4) (const_int 12)
                       (const_int 5) (const_int 13)
                       (const_int 6) (const_int 14)
                       (const_int 7) (const_int 15)])))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    punpckhbw\t{%2, %0|%0, %2}
!    #
!    #"
!   "TARGET_SSE2 && reload_completed
!    && SSE_REGNO_P (REGNO (operands[0]))"
!   [(const_int 0)]
!   "ix86_split_mmx_punpck (operands, true); DONE;"
!   [(set_attr "mmx_isa" "native,sse_noavx,avx")
!    (set_attr "type" "mmxcvt,sselog,sselog")
!    (set_attr "mode" "DI,TI,TI")])
  
! (define_insn_and_split "mmx_punpcklbw"
!   [(set (match_operand:V8QI 0 "register_operand" "=y,x,Yv")
  	(vec_select:V8QI
  	  (vec_concat:V16QI
! 	    (match_operand:V8QI 1 "register_operand" "0,0,Yv")
! 	    (match_operand:V8QI 2 "register_mmxmem_operand" "ym,x,Yv"))
            (parallel [(const_int 0) (const_int 8)
                       (const_int 1) (const_int 9)
                       (const_int 2) (const_int 10)
                       (const_int 3) (const_int 11)])))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    punpcklbw\t{%2, %0|%0, %k2}
!    #
!    #"
!   "TARGET_SSE2 && reload_completed
!    && SSE_REGNO_P (REGNO (operands[0]))"
!   [(const_int 0)]
!   "ix86_split_mmx_punpck (operands, false); DONE;"
!   [(set_attr "mmx_isa" "native,sse_noavx,avx")
!    (set_attr "type" "mmxcvt,sselog,sselog")
!    (set_attr "mode" "DI,TI,TI")])
  
! (define_insn_and_split "mmx_punpckhwd"
!   [(set (match_operand:V4HI 0 "register_operand" "=y,x,Yv")
  	(vec_select:V4HI
  	  (vec_concat:V8HI
! 	    (match_operand:V4HI 1 "register_operand" "0,0,Yv")
! 	    (match_operand:V4HI 2 "register_mmxmem_operand" "ym,x,Yv"))
            (parallel [(const_int 2) (const_int 6)
                       (const_int 3) (const_int 7)])))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    punpckhwd\t{%2, %0|%0, %2}
!    #
!    #"
!   "TARGET_SSE2 && reload_completed
!    && SSE_REGNO_P (REGNO (operands[0]))"
!   [(const_int 0)]
!   "ix86_split_mmx_punpck (operands, true); DONE;"
!   [(set_attr "mmx_isa" "native,sse_noavx,avx")
!    (set_attr "type" "mmxcvt,sselog,sselog")
!    (set_attr "mode" "DI,TI,TI")])
  
! (define_insn_and_split "mmx_punpcklwd"
!   [(set (match_operand:V4HI 0 "register_operand" "=y,x,Yv")
  	(vec_select:V4HI
  	  (vec_concat:V8HI
! 	    (match_operand:V4HI 1 "register_operand" "0,0,Yv")
! 	    (match_operand:V4HI 2 "register_mmxmem_operand" "ym,x,Yv"))
            (parallel [(const_int 0) (const_int 4)
                       (const_int 1) (const_int 5)])))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    punpcklwd\t{%2, %0|%0, %k2}
!    #
!    #"
!   "TARGET_SSE2 && reload_completed
!    && SSE_REGNO_P (REGNO (operands[0]))"
!   [(const_int 0)]
!   "ix86_split_mmx_punpck (operands, false); DONE;"
!   [(set_attr "mmx_isa" "native,sse_noavx,avx")
!    (set_attr "type" "mmxcvt,sselog,sselog")
!    (set_attr "mode" "DI,TI,TI")])
  
! (define_insn_and_split "mmx_punpckhdq"
!   [(set (match_operand:V2SI 0 "register_operand" "=y,x,Yv")
  	(vec_select:V2SI
  	  (vec_concat:V4SI
! 	    (match_operand:V2SI 1 "register_operand" "0,0,Yv")
! 	    (match_operand:V2SI 2 "register_mmxmem_operand" "ym,x,Yv"))
  	  (parallel [(const_int 1)
  		     (const_int 3)])))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    punpckhdq\t{%2, %0|%0, %2}
!    #
!    #"
!   "TARGET_SSE2 && reload_completed
!    && SSE_REGNO_P (REGNO (operands[0]))"
!   [(const_int 0)]
!   "ix86_split_mmx_punpck (operands, true); DONE;"
!   [(set_attr "mmx_isa" "native,sse_noavx,avx")
!    (set_attr "type" "mmxcvt,sselog,sselog")
!    (set_attr "mode" "DI,TI,TI")])
  
! (define_insn_and_split "mmx_punpckldq"
!   [(set (match_operand:V2SI 0 "register_operand" "=y,x,Yv")
  	(vec_select:V2SI
  	  (vec_concat:V4SI
! 	    (match_operand:V2SI 1 "register_operand" "0,0,Yv")
! 	    (match_operand:V2SI 2 "register_mmxmem_operand" "ym,x,Yv"))
  	  (parallel [(const_int 0)
  		     (const_int 2)])))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    punpckldq\t{%2, %0|%0, %k2}
!    #
!    #"
!   "TARGET_SSE2 && reload_completed
!    && SSE_REGNO_P (REGNO (operands[0]))"
!   [(const_int 0)]
!   "ix86_split_mmx_punpck (operands, false); DONE;"
!   [(set_attr "mmx_isa" "native,sse_noavx,avx")
!    (set_attr "type" "mmxcvt,sselog,sselog")
!    (set_attr "mode" "DI,TI,TI")])
! 
! (define_insn "*mmx_pinsrd"
!   [(set (match_operand:V2SI 0 "register_operand" "=x,Yv")
!         (vec_merge:V2SI
!           (vec_duplicate:V2SI
!             (match_operand:SI 2 "nonimmediate_operand" "rm,rm"))
! 	  (match_operand:V2SI 1 "register_operand" "0,Yv")
!           (match_operand:SI 3 "const_int_operand")))]
!   "TARGET_MMX_WITH_SSE && TARGET_SSE4_1
!    && ((unsigned) exact_log2 (INTVAL (operands[3]))
!        < GET_MODE_NUNITS (V2SImode))"
! {
!   operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3])));
!   switch (which_alternative)
!     {
!     case 1:
!       return "vpinsrd\t{%3, %2, %1, %0|%0, %1, %2, %3}";
!     case 0:
!       return "pinsrd\t{%3, %2, %0|%0, %2, %3}";
!     default:
!       gcc_unreachable ();
!     }
! }
!   [(set_attr "isa" "noavx,avx")
!    (set_attr "prefix_data16" "1")
!    (set_attr "prefix_extra" "1")
!    (set_attr "type" "sselog")
!    (set_attr "length_immediate" "1")
!    (set_attr "prefix" "orig,vex")
!    (set_attr "mode" "TI")])
  
  (define_expand "mmx_pinsrw"
    [(set (match_operand:V4HI 0 "register_operand")
***************
*** 1171,1220 ****
              (match_operand:SI 2 "nonimmediate_operand"))
  	  (match_operand:V4HI 1 "register_operand")
            (match_operand:SI 3 "const_0_to_3_operand")))]
!   "TARGET_SSE || TARGET_3DNOW_A"
  {
    operands[2] = gen_lowpart (HImode, operands[2]);
    operands[3] = GEN_INT (1 << INTVAL (operands[3]));
  })
  
  (define_insn "*mmx_pinsrw"
!   [(set (match_operand:V4HI 0 "register_operand" "=y")
          (vec_merge:V4HI
            (vec_duplicate:V4HI
!             (match_operand:HI 2 "nonimmediate_operand" "rm"))
! 	  (match_operand:V4HI 1 "register_operand" "0")
            (match_operand:SI 3 "const_int_operand")))]
!   "(TARGET_SSE || TARGET_3DNOW_A)
     && ((unsigned) exact_log2 (INTVAL (operands[3]))
         < GET_MODE_NUNITS (V4HImode))"
  {
    operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3])));
!   if (MEM_P (operands[2]))
!     return "pinsrw\t{%3, %2, %0|%0, %2, %3}";
!   else
!     return "pinsrw\t{%3, %k2, %0|%0, %k2, %3}";
  }
!   [(set_attr "type" "mmxcvt")
     (set_attr "length_immediate" "1")
!    (set_attr "mode" "DI")])
  
! (define_insn "mmx_pextrw"
!   [(set (match_operand:SI 0 "register_operand" "=r")
!         (zero_extend:SI
  	  (vec_select:HI
! 	    (match_operand:V4HI 1 "register_operand" "y")
! 	    (parallel [(match_operand:SI 2 "const_0_to_3_operand" "n")]))))]
!   "TARGET_SSE || TARGET_3DNOW_A"
!   "pextrw\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "type" "mmxcvt")
     (set_attr "length_immediate" "1")
!    (set_attr "mode" "DI")])
  
  (define_expand "mmx_pshufw"
    [(match_operand:V4HI 0 "register_operand")
!    (match_operand:V4HI 1 "nonimmediate_operand")
     (match_operand:SI 2 "const_int_operand")]
!   "TARGET_SSE || TARGET_3DNOW_A"
  {
    int mask = INTVAL (operands[2]);
    emit_insn (gen_mmx_pshufw_1 (operands[0], operands[1],
--- 1405,1562 ----
              (match_operand:SI 2 "nonimmediate_operand"))
  	  (match_operand:V4HI 1 "register_operand")
            (match_operand:SI 3 "const_0_to_3_operand")))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)"
  {
    operands[2] = gen_lowpart (HImode, operands[2]);
    operands[3] = GEN_INT (1 << INTVAL (operands[3]));
  })
  
  (define_insn "*mmx_pinsrw"
!   [(set (match_operand:V4HI 0 "register_operand" "=y,x,Yv")
          (vec_merge:V4HI
            (vec_duplicate:V4HI
!             (match_operand:HI 2 "nonimmediate_operand" "rm,rm,rm"))
! 	  (match_operand:V4HI 1 "register_operand" "0,0,Yv")
            (match_operand:SI 3 "const_int_operand")))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)
     && ((unsigned) exact_log2 (INTVAL (operands[3]))
         < GET_MODE_NUNITS (V4HImode))"
  {
    operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3])));
!   switch (which_alternative)
!     {
!     case 2:
!       if (MEM_P (operands[2]))
! 	return "vpinsrw\t{%3, %2, %1, %0|%0, %1, %2, %3}";
!       else
! 	return "vpinsrw\t{%3, %k2, %1, %0|%0, %1, %k2, %3}";
!     case 1:
!     case 0:
!       if (MEM_P (operands[2]))
! 	return "pinsrw\t{%3, %2, %0|%0, %2, %3}";
!       else
! 	return "pinsrw\t{%3, %k2, %0|%0, %k2, %3}";
!     default:
!       gcc_unreachable ();
!     }
  }
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxcvt,sselog,sselog")
     (set_attr "length_immediate" "1")
!    (set_attr "mode" "DI,TI,TI")])
  
! (define_insn "*mmx_pinsrb"
!   [(set (match_operand:V8QI 0 "register_operand" "=x,Yv")
!         (vec_merge:V8QI
!           (vec_duplicate:V8QI
!             (match_operand:QI 2 "nonimmediate_operand" "rm,rm"))
! 	  (match_operand:V8QI 1 "register_operand" "0,Yv")
!           (match_operand:SI 3 "const_int_operand")))]
!   "TARGET_MMX_WITH_SSE && TARGET_SSE4_1
!    && ((unsigned) exact_log2 (INTVAL (operands[3]))
!        < GET_MODE_NUNITS (V8QImode))"
! {
!   operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3])));
!   switch (which_alternative)
!     {
!     case 1:
!       if (MEM_P (operands[2]))
! 	return "vpinsrb\t{%3, %2, %1, %0|%0, %1, %2, %3}";
!       else
! 	return "vpinsrb\t{%3, %k2, %1, %0|%0, %1, %k2, %3}";
!     case 0:
!       if (MEM_P (operands[2]))
! 	return "pinsrb\t{%3, %2, %0|%0, %2, %3}";
!       else
! 	return "pinsrb\t{%3, %k2, %0|%0, %k2, %3}";
!     default:
!       gcc_unreachable ();
!     }
! }
!   [(set_attr "isa" "noavx,avx")
!    (set_attr "type" "sselog")
!    (set_attr "prefix_data16" "1")
!    (set_attr "prefix_extra" "1")
!    (set_attr "length_immediate" "1")
!    (set_attr "prefix" "orig,vex")
!    (set_attr "mode" "TI")])
! 
! (define_insn "*mmx_pextrw"
!   [(set (match_operand:HI 0 "register_sse4nonimm_operand" "=r,r,m")
! 	(vec_select:HI
! 	  (match_operand:V4HI 1 "register_operand" "y,Yv,Yv")
! 	  (parallel [(match_operand:SI 2 "const_0_to_3_operand" "n,n,n")])))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)"
!   "@
!    pextrw\t{%2, %1, %k0|%k0, %1, %2}
!    %vpextrw\t{%2, %1, %k0|%k0, %1, %2}
!    %vpextrw\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2,sse4")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxcvt,sselog1,sselog1")
!    (set_attr "length_immediate" "1")
!    (set_attr "prefix" "orig,maybe_vex,maybe_vex")
!    (set_attr "mode" "DI,TI,TI")])
! 
! (define_insn "*mmx_pextrw_zext"
!   [(set (match_operand:SWI48 0 "register_operand" "=r,r")
! 	(zero_extend:SWI48
  	  (vec_select:HI
! 	    (match_operand:V4HI 1 "register_operand" "y,Yv")
! 	    (parallel [(match_operand:SI 2 "const_0_to_3_operand" "n,n")]))))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)"
!   "@
!    pextrw\t{%2, %1, %k0|%k0, %1, %2}
!    %vpextrw\t{%2, %1, %k0|%k0, %1, %2}"
!   [(set_attr "isa" "*,sse2")
!    (set_attr "mmx_isa" "native,*")
!    (set_attr "type" "mmxcvt,sselog1")
     (set_attr "length_immediate" "1")
!    (set_attr "prefix" "orig,maybe_vex")
!    (set_attr "mode" "DI,TI")])
! 
! (define_insn "*mmx_pextrb"
!   [(set (match_operand:QI 0 "nonimmediate_operand" "=r,m")
! 	(vec_select:QI
! 	  (match_operand:V8QI 1 "register_operand" "Yv,Yv")
! 	  (parallel [(match_operand:SI 2 "const_0_to_7_operand" "n,n")])))]
!   "TARGET_MMX_WITH_SSE && TARGET_SSE4_1"
!   "@
!    %vpextrb\t{%2, %1, %k0|%k0, %1, %2}
!    %vpextrb\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "type" "sselog1")
!    (set_attr "prefix_data16" "1")
!    (set_attr "prefix_extra" "1")
!    (set_attr "length_immediate" "1")
!    (set_attr "prefix" "maybe_vex")
!    (set_attr "mode" "TI")])
! 
! (define_insn "*mmx_pextrb_zext"
!   [(set (match_operand:SWI248 0 "register_operand" "=r")
! 	(zero_extend:SWI248
! 	  (vec_select:QI
! 	    (match_operand:V8QI 1 "register_operand" "Yv")
! 	    (parallel [(match_operand:SI 2 "const_0_to_7_operand" "n")]))))]
!   "TARGET_MMX_WITH_SSE && TARGET_SSE4_1"
!   "%vpextrb\t{%2, %1, %k0|%k0, %1, %2}"
!   [(set_attr "type" "sselog1")
!    (set_attr "prefix_data16" "1")
!    (set_attr "prefix_extra" "1")
!    (set_attr "length_immediate" "1")
!    (set_attr "prefix" "maybe_vex")
!    (set_attr "mode" "TI")])
  
  (define_expand "mmx_pshufw"
    [(match_operand:V4HI 0 "register_operand")
!    (match_operand:V4HI 1 "register_mmxmem_operand")
     (match_operand:SI 2 "const_int_operand")]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)"
  {
    int mask = INTVAL (operands[2]);
    emit_insn (gen_mmx_pshufw_1 (operands[0], operands[1],
***************
*** 1226,1239 ****
  })
  
  (define_insn "mmx_pshufw_1"
!   [(set (match_operand:V4HI 0 "register_operand" "=y")
          (vec_select:V4HI
!           (match_operand:V4HI 1 "nonimmediate_operand" "ym")
            (parallel [(match_operand 2 "const_0_to_3_operand")
                       (match_operand 3 "const_0_to_3_operand")
                       (match_operand 4 "const_0_to_3_operand")
                       (match_operand 5 "const_0_to_3_operand")])))]
!   "TARGET_SSE || TARGET_3DNOW_A"
  {
    int mask = 0;
    mask |= INTVAL (operands[2]) << 0;
--- 1568,1582 ----
  })
  
  (define_insn "mmx_pshufw_1"
!   [(set (match_operand:V4HI 0 "register_operand" "=y,Yv")
          (vec_select:V4HI
!           (match_operand:V4HI 1 "register_mmxmem_operand" "ym,Yv")
            (parallel [(match_operand 2 "const_0_to_3_operand")
                       (match_operand 3 "const_0_to_3_operand")
                       (match_operand 4 "const_0_to_3_operand")
                       (match_operand 5 "const_0_to_3_operand")])))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)"
  {
    int mask = 0;
    mask |= INTVAL (operands[2]) << 0;
***************
*** 1242,1252 ****
    mask |= INTVAL (operands[5]) << 6;
    operands[2] = GEN_INT (mask);
  
!   return "pshufw\t{%2, %1, %0|%0, %1, %2}";
  }
!   [(set_attr "type" "mmxcvt")
     (set_attr "length_immediate" "1")
!    (set_attr "mode" "DI")])
  
  (define_insn "mmx_pswapdv2si2"
    [(set (match_operand:V2SI 0 "register_operand" "=y")
--- 1585,1605 ----
    mask |= INTVAL (operands[5]) << 6;
    operands[2] = GEN_INT (mask);
  
!   switch (which_alternative)
!     {
!     case 0:
!       return "pshufw\t{%2, %1, %0|%0, %1, %2}";
!     case 1:
!       return "%vpshuflw\t{%2, %1, %0|%0, %1, %2}";
!     default:
!       gcc_unreachable ();
!     }
  }
!   [(set_attr "isa" "*,sse2")
!    (set_attr "mmx_isa" "native,*")
!    (set_attr "type" "mmxcvt,sselog")
     (set_attr "length_immediate" "1")
!    (set_attr "mode" "DI,TI")])
  
  (define_insn "mmx_pswapdv2si2"
    [(set (match_operand:V2SI 0 "register_operand" "=y")
***************
*** 1259,1283 ****
     (set_attr "prefix_extra" "1")
     (set_attr "mode" "DI")])
  
! (define_insn "*vec_dupv4hi"
!   [(set (match_operand:V4HI 0 "register_operand" "=y")
  	(vec_duplicate:V4HI
  	  (truncate:HI
! 	    (match_operand:SI 1 "register_operand" "0"))))]
!   "TARGET_SSE || TARGET_3DNOW_A"
!   "pshufw\t{$0, %0, %0|%0, %0, 0}"
!   [(set_attr "type" "mmxcvt")
!    (set_attr "length_immediate" "1")
!    (set_attr "mode" "DI")])
  
! (define_insn "*vec_dupv2si"
!   [(set (match_operand:V2SI 0 "register_operand" "=y")
  	(vec_duplicate:V2SI
! 	  (match_operand:SI 1 "register_operand" "0")))]
!   "TARGET_MMX"
!   "punpckldq\t%0, %0"
!   [(set_attr "type" "mmxcvt")
!    (set_attr "mode" "DI")])
  
  (define_insn "*mmx_concatv2si"
    [(set (match_operand:V2SI 0 "register_operand"     "=y,y")
--- 1612,1688 ----
     (set_attr "prefix_extra" "1")
     (set_attr "mode" "DI")])
  
! (define_insn_and_split "*vec_dupv4hi"
!   [(set (match_operand:V4HI 0 "register_operand" "=y,Yv,Yw")
  	(vec_duplicate:V4HI
  	  (truncate:HI
! 	    (match_operand:SI 1 "register_operand" "0,Yv,r"))))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)"
!   "@
!    pshufw\t{$0, %0, %0|%0, %0, 0}
!    #
!    #"
!   "TARGET_SSE2 && reload_completed
!    && SSE_REGNO_P (REGNO (operands[0]))"
!   [(const_int 0)]
! {
!   rtx op;
!   operands[0] = lowpart_subreg (V8HImode, operands[0],
! 				GET_MODE (operands[0]));
!   if (TARGET_AVX2)
!     {
!       operands[1] = lowpart_subreg (HImode, operands[1],
! 				    GET_MODE (operands[1]));
!       op = gen_rtx_VEC_DUPLICATE (V8HImode, operands[1]);
!     }
!   else
!     {
!       operands[1] = lowpart_subreg (V8HImode, operands[1],
! 				    GET_MODE (operands[1]));
!       rtx mask = gen_rtx_PARALLEL (VOIDmode,
! 				   gen_rtvec (8,
! 					      GEN_INT (0),
! 					      GEN_INT (0),
! 					      GEN_INT (0),
! 					      GEN_INT (0),
! 					      GEN_INT (4),
! 					      GEN_INT (5),
! 					      GEN_INT (6),
! 					      GEN_INT (7)));
  
!       op = gen_rtx_VEC_SELECT (V8HImode, operands[1], mask);
!     }
!   emit_insn (gen_rtx_SET (operands[0], op));
!   DONE;
! }
!   [(set_attr "mmx_isa" "native,sse,avx")
!    (set_attr "type" "mmxcvt,sselog1,ssemov")
!    (set_attr "length_immediate" "1,1,0")
!    (set_attr "mode" "DI,TI,TI")])
! 
! (define_insn_and_split "*vec_dupv2si"
!   [(set (match_operand:V2SI 0 "register_operand" "=y,x,Yv,Yw")
  	(vec_duplicate:V2SI
! 	  (match_operand:SI 1 "register_operand" "0,0,Yv,r")))]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
!   "@
!    punpckldq\t%0, %0
!    #
!    #
!    #"
!   "TARGET_SSE && reload_completed
!    && SSE_REGNO_P (REGNO (operands[0]))"
!   [(set (match_dup 0)
! 	(vec_duplicate:V4SI (match_dup 1)))]
! {
!   operands[0] = lowpart_subreg (V4SImode, operands[0],
! 				GET_MODE (operands[0]));
! }
!   [(set_attr "isa" "*,sse_noavx,avx,avx")
!    (set_attr "mmx_isa" "native,*,*,*")
!    (set_attr "type" "mmxcvt,ssemov,ssemov,ssemov")
!    (set_attr "mode" "DI,TI,TI,TI")])
  
  (define_insn "*mmx_concatv2si"
    [(set (match_operand:V2SI 0 "register_operand"     "=y,y")
***************
*** 1295,1303 ****
    [(match_operand:V2SI 0 "register_operand")
     (match_operand:SI 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX"
  {
!   ix86_expand_vector_set (false, operands[0], operands[1],
  			  INTVAL (operands[2]));
    DONE;
  })
--- 1700,1708 ----
    [(match_operand:V2SI 0 "register_operand")
     (match_operand:SI 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
  {
!   ix86_expand_vector_set (TARGET_MMX_WITH_SSE, operands[0], operands[1],
  			  INTVAL (operands[2]));
    DONE;
  })
***************
*** 1305,1385 ****
  ;; Avoid combining registers from different units in a single alternative,
  ;; see comment above inline_secondary_memory_needed function in i386.c
  (define_insn_and_split "*vec_extractv2si_0"
!   [(set (match_operand:SI 0 "nonimmediate_operand"     "=x,m,y, m,r")
  	(vec_select:SI
! 	  (match_operand:V2SI 1 "nonimmediate_operand" "xm,x,ym,y,m")
  	  (parallel [(const_int 0)])))]
!   "TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
    "#"
    "&& reload_completed"
    [(set (match_dup 0) (match_dup 1))]
    "operands[1] = gen_lowpart (SImode, operands[1]);")
  
  ;; Avoid combining registers from different units in a single alternative,
  ;; see comment above inline_secondary_memory_needed function in i386.c
  (define_insn "*vec_extractv2si_1"
!   [(set (match_operand:SI 0 "nonimmediate_operand"     "=y,x,x,y,x,r")
  	(vec_select:SI
! 	  (match_operand:V2SI 1 "nonimmediate_operand" " 0,x,0,o,o,o")
  	  (parallel [(const_int 1)])))]
!   "TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
    "@
     punpckhdq\t%0, %0
     %vpshufd\t{$0xe5, %1, %0|%0, %1, 0xe5}
     shufps\t{$0xe5, %0, %0|%0, %0, 0xe5}
     #
     #
     #"
!   [(set_attr "isa" "*,sse2,noavx,*,*,*")
!    (set_attr "type" "mmxcvt,sseshuf1,sseshuf1,mmxmov,ssemov,imov")
     (set (attr "length_immediate")
!      (if_then_else (eq_attr "alternative" "1,2")
  		   (const_string "1")
  		   (const_string "*")))
!    (set_attr "prefix" "orig,maybe_vex,orig,orig,orig,orig")
!    (set_attr "mode" "DI,TI,V4SF,SI,SI,SI")])
  
  (define_split
    [(set (match_operand:SI 0 "register_operand")
  	(vec_select:SI
  	  (match_operand:V2SI 1 "memory_operand")
  	  (parallel [(const_int 1)])))]
!   "TARGET_MMX && reload_completed"
    [(set (match_dup 0) (match_dup 1))]
    "operands[1] = adjust_address (operands[1], SImode, 4);")
  
  (define_insn_and_split "*vec_extractv2si_zext_mem"
    [(set (match_operand:DI 0 "register_operand" "=y,x,r")
  	(zero_extend:DI
  	  (vec_select:SI
  	    (match_operand:V2SI 1 "memory_operand" "o,o,o")
  	    (parallel [(match_operand:SI 2 "const_0_to_1_operand")]))))]
!   "TARGET_64BIT"
    "#"
    "&& reload_completed"
    [(set (match_dup 0) (zero_extend:DI (match_dup 1)))]
  {
    operands[1] = adjust_address (operands[1], SImode, INTVAL (operands[2]) * 4);
  }
!   [(set_attr "isa" "*,sse2,*")])
  
  (define_expand "vec_extractv2sisi"
    [(match_operand:SI 0 "register_operand")
     (match_operand:V2SI 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX"
  {
!   ix86_expand_vector_extract (false, operands[0], operands[1],
! 			      INTVAL (operands[2]));
    DONE;
  })
  
  (define_expand "vec_initv2sisi"
    [(match_operand:V2SI 0 "register_operand")
     (match_operand 1)]
!   "TARGET_SSE"
  {
!   ix86_expand_vector_init (false, operands[0], operands[1]);
    DONE;
  })
  
--- 1710,1854 ----
  ;; Avoid combining registers from different units in a single alternative,
  ;; see comment above inline_secondary_memory_needed function in i386.c
  (define_insn_and_split "*vec_extractv2si_0"
!   [(set (match_operand:SI 0 "nonimmediate_operand"     "=x,m,y, m,r,r")
  	(vec_select:SI
! 	  (match_operand:V2SI 1 "nonimmediate_operand" "xm,x,ym,y,m,x")
  	  (parallel [(const_int 0)])))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
    "#"
    "&& reload_completed"
    [(set (match_dup 0) (match_dup 1))]
+   "operands[1] = gen_lowpart (SImode, operands[1]);"
+   [(set_attr "isa" "*,*,*,*,*,sse2")
+    (set_attr "mmx_isa" "*,*,native,native,*,*")
+    (set (attr "preferred_for_speed")
+      (cond [(eq_attr "alternative" "5")
+ 	      (symbol_ref "TARGET_INTER_UNIT_MOVES_FROM_VEC")
+ 	   ]
+ 	   (symbol_ref "true")))])
+ 
+ (define_insn "*vec_extractv2si_0_zext_sse4"
+   [(set (match_operand:DI 0 "register_operand" "=r,x")
+ 	(zero_extend:DI
+ 	  (vec_select:SI
+ 	    (match_operand:V2SI 1 "register_operand" "x,x")
+ 	    (parallel [(const_int 0)]))))]
+   "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE4_1"
+   "#"
+   [(set_attr "isa" "x64,*")
+    (set (attr "preferred_for_speed")
+      (cond [(eq_attr "alternative" "0")
+ 	      (symbol_ref "TARGET_INTER_UNIT_MOVES_FROM_VEC")
+ 	   ]
+ 	   (symbol_ref "true")))])
+ 
+ (define_insn "*vec_extractv2si_0_zext"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(zero_extend:DI
+ 	  (vec_select:SI
+ 	    (match_operand:V2SI 1 "register_operand" "x")
+ 	    (parallel [(const_int 0)]))))]
+   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
+    && TARGET_64BIT && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_FROM_VEC"
+   "#")
+ 
+ (define_split
+   [(set (match_operand:DI 0 "register_operand")
+ 	(zero_extend:DI
+ 	  (vec_select:SI
+ 	    (match_operand:V2SI 1 "register_operand")
+ 	    (parallel [(const_int 0)]))))]
+   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
+    && TARGET_SSE2 && reload_completed"
+   [(set (match_dup 0) (zero_extend:DI (match_dup 1)))]
    "operands[1] = gen_lowpart (SImode, operands[1]);")
  
  ;; Avoid combining registers from different units in a single alternative,
  ;; see comment above inline_secondary_memory_needed function in i386.c
  (define_insn "*vec_extractv2si_1"
!   [(set (match_operand:SI 0 "nonimmediate_operand"     "=y,rm,x,x,y,x,r")
  	(vec_select:SI
! 	  (match_operand:V2SI 1 "nonimmediate_operand" " 0,x ,x,0,o,o,o")
  	  (parallel [(const_int 1)])))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
    "@
     punpckhdq\t%0, %0
+    %vpextrd\t{$1, %1, %0|%0, %1, 1}
     %vpshufd\t{$0xe5, %1, %0|%0, %1, 0xe5}
     shufps\t{$0xe5, %0, %0|%0, %0, 0xe5}
     #
     #
     #"
!   [(set_attr "isa" "*,sse4,sse2,noavx,*,*,*")
!    (set_attr "mmx_isa" "native,*,*,*,native,*,*")
!    (set_attr "type" "mmxcvt,ssemov,sseshuf1,sseshuf1,mmxmov,ssemov,imov")
     (set (attr "length_immediate")
!      (if_then_else (eq_attr "alternative" "1,2,3")
  		   (const_string "1")
  		   (const_string "*")))
!    (set_attr "prefix" "orig,maybe_vex,maybe_vex,orig,orig,orig,orig")
!    (set_attr "mode" "DI,TI,TI,V4SF,SI,SI,SI")])
  
  (define_split
    [(set (match_operand:SI 0 "register_operand")
  	(vec_select:SI
  	  (match_operand:V2SI 1 "memory_operand")
  	  (parallel [(const_int 1)])))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE) && reload_completed"
    [(set (match_dup 0) (match_dup 1))]
    "operands[1] = adjust_address (operands[1], SImode, 4);")
  
+ (define_insn "*vec_extractv2si_1_zext"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(zero_extend:DI
+ 	  (vec_select:SI
+ 	    (match_operand:V2SI 1 "register_operand" "x")
+ 	    (parallel [(const_int 1)]))))]
+   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
+    && TARGET_64BIT && TARGET_SSE4_1"
+   "%vpextrd\t{$1, %1, %k0|%k0, %1, 1}"
+   [(set_attr "type" "sselog1")
+    (set_attr "prefix_extra" "1")
+    (set_attr "length_immediate" "1")
+    (set_attr "prefix" "maybe_vex")
+    (set_attr "mode" "TI")])
+ 
  (define_insn_and_split "*vec_extractv2si_zext_mem"
    [(set (match_operand:DI 0 "register_operand" "=y,x,r")
  	(zero_extend:DI
  	  (vec_select:SI
  	    (match_operand:V2SI 1 "memory_operand" "o,o,o")
  	    (parallel [(match_operand:SI 2 "const_0_to_1_operand")]))))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_64BIT"
    "#"
    "&& reload_completed"
    [(set (match_dup 0) (zero_extend:DI (match_dup 1)))]
  {
    operands[1] = adjust_address (operands[1], SImode, INTVAL (operands[2]) * 4);
  }
!   [(set_attr "isa" "*,sse2,*")
!    (set_attr "mmx_isa" "native,*,*")])
  
  (define_expand "vec_extractv2sisi"
    [(match_operand:SI 0 "register_operand")
     (match_operand:V2SI 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
  {
!   ix86_expand_vector_extract (TARGET_MMX_WITH_SSE, operands[0],
! 			      operands[1], INTVAL (operands[2]));
    DONE;
  })
  
  (define_expand "vec_initv2sisi"
    [(match_operand:V2SI 0 "register_operand")
     (match_operand 1)]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE"
  {
!   ix86_expand_vector_init (TARGET_MMX_WITH_SSE, operands[0],
! 			   operands[1]);
    DONE;
  })
  
***************
*** 1387,1395 ****
    [(match_operand:V4HI 0 "register_operand")
     (match_operand:HI 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX"
  {
!   ix86_expand_vector_set (false, operands[0], operands[1],
  			  INTVAL (operands[2]));
    DONE;
  })
--- 1856,1864 ----
    [(match_operand:V4HI 0 "register_operand")
     (match_operand:HI 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
  {
!   ix86_expand_vector_set (TARGET_MMX_WITH_SSE, operands[0], operands[1],
  			  INTVAL (operands[2]));
    DONE;
  })
***************
*** 1398,1416 ****
    [(match_operand:HI 0 "register_operand")
     (match_operand:V4HI 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX"
  {
!   ix86_expand_vector_extract (false, operands[0], operands[1],
! 			      INTVAL (operands[2]));
    DONE;
  })
  
  (define_expand "vec_initv4hihi"
    [(match_operand:V4HI 0 "register_operand")
     (match_operand 1)]
!   "TARGET_SSE"
  {
!   ix86_expand_vector_init (false, operands[0], operands[1]);
    DONE;
  })
  
--- 1867,1886 ----
    [(match_operand:HI 0 "register_operand")
     (match_operand:V4HI 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
  {
!   ix86_expand_vector_extract (TARGET_MMX_WITH_SSE, operands[0],
! 			      operands[1], INTVAL (operands[2]));
    DONE;
  })
  
  (define_expand "vec_initv4hihi"
    [(match_operand:V4HI 0 "register_operand")
     (match_operand 1)]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE"
  {
!   ix86_expand_vector_init (TARGET_MMX_WITH_SSE, operands[0],
! 			   operands[1]);
    DONE;
  })
  
***************
*** 1418,1426 ****
    [(match_operand:V8QI 0 "register_operand")
     (match_operand:QI 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX"
  {
!   ix86_expand_vector_set (false, operands[0], operands[1],
  			  INTVAL (operands[2]));
    DONE;
  })
--- 1888,1896 ----
    [(match_operand:V8QI 0 "register_operand")
     (match_operand:QI 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
  {
!   ix86_expand_vector_set (TARGET_MMX_WITH_SSE, operands[0], operands[1],
  			  INTVAL (operands[2]));
    DONE;
  })
***************
*** 1429,1447 ****
    [(match_operand:QI 0 "register_operand")
     (match_operand:V8QI 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX"
  {
!   ix86_expand_vector_extract (false, operands[0], operands[1],
! 			      INTVAL (operands[2]));
    DONE;
  })
  
  (define_expand "vec_initv8qiqi"
    [(match_operand:V8QI 0 "register_operand")
     (match_operand 1)]
!   "TARGET_SSE"
  {
!   ix86_expand_vector_init (false, operands[0], operands[1]);
    DONE;
  })
  
--- 1899,1918 ----
    [(match_operand:QI 0 "register_operand")
     (match_operand:V8QI 1 "register_operand")
     (match_operand 2 "const_int_operand")]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
  {
!   ix86_expand_vector_extract (TARGET_MMX_WITH_SSE, operands[0],
! 			      operands[1], INTVAL (operands[2]));
    DONE;
  })
  
  (define_expand "vec_initv8qiqi"
    [(match_operand:V8QI 0 "register_operand")
     (match_operand 1)]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE"
  {
!   ix86_expand_vector_init (TARGET_MMX_WITH_SSE, operands[0],
! 			   operands[1]);
    DONE;
  })
  
***************
*** 1451,1561 ****
  ;;
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  
! (define_expand "mmx_uavgv8qi3"
!   [(set (match_operand:V8QI 0 "register_operand")
! 	(truncate:V8QI
! 	  (lshiftrt:V8HI
! 	    (plus:V8HI
! 	      (plus:V8HI
! 		(zero_extend:V8HI
! 		  (match_operand:V8QI 1 "nonimmediate_operand"))
! 		(zero_extend:V8HI
! 		  (match_operand:V8QI 2 "nonimmediate_operand")))
! 	      (const_vector:V8HI [(const_int 1) (const_int 1)
! 				  (const_int 1) (const_int 1)
! 				  (const_int 1) (const_int 1)
! 				  (const_int 1) (const_int 1)]))
  	    (const_int 1))))]
!   "TARGET_SSE || TARGET_3DNOW"
!   "ix86_fixup_binary_operands_no_copy (PLUS, V8QImode, operands);")
  
  (define_insn "*mmx_uavgv8qi3"
!   [(set (match_operand:V8QI 0 "register_operand" "=y")
  	(truncate:V8QI
  	  (lshiftrt:V8HI
  	    (plus:V8HI
  	      (plus:V8HI
  		(zero_extend:V8HI
! 		  (match_operand:V8QI 1 "nonimmediate_operand" "%0"))
  		(zero_extend:V8HI
! 		  (match_operand:V8QI 2 "nonimmediate_operand" "ym")))
  	      (const_vector:V8HI [(const_int 1) (const_int 1)
  				  (const_int 1) (const_int 1)
  				  (const_int 1) (const_int 1)
  				  (const_int 1) (const_int 1)]))
  	    (const_int 1))))]
!   "(TARGET_SSE || TARGET_3DNOW)
!    && ix86_binary_operator_ok (PLUS, V8QImode, operands)"
  {
!   /* These two instructions have the same operation, but their encoding
!      is different.  Prefer the one that is de facto standard.  */
!   if (TARGET_SSE || TARGET_3DNOW_A)
!     return "pavgb\t{%2, %0|%0, %2}";
!   else
!     return "pavgusb\t{%2, %0|%0, %2}";
  }
!   [(set_attr "type" "mmxshft")
     (set (attr "prefix_extra")
       (if_then_else
         (not (ior (match_test "TARGET_SSE")
  		 (match_test "TARGET_3DNOW_A")))
         (const_string "1")
         (const_string "*")))
!    (set_attr "mode" "DI")])
  
! (define_expand "mmx_uavgv4hi3"
!   [(set (match_operand:V4HI 0 "register_operand")
  	(truncate:V4HI
  	  (lshiftrt:V4SI
  	    (plus:V4SI
  	      (plus:V4SI
  		(zero_extend:V4SI
! 		  (match_operand:V4HI 1 "nonimmediate_operand"))
  		(zero_extend:V4SI
! 		  (match_operand:V4HI 2 "nonimmediate_operand")))
  	      (const_vector:V4SI [(const_int 1) (const_int 1)
  				  (const_int 1) (const_int 1)]))
  	    (const_int 1))))]
!   "TARGET_SSE || TARGET_3DNOW_A"
!   "ix86_fixup_binary_operands_no_copy (PLUS, V4HImode, operands);")
  
! (define_insn "*mmx_uavgv4hi3"
!   [(set (match_operand:V4HI 0 "register_operand" "=y")
! 	(truncate:V4HI
! 	  (lshiftrt:V4SI
! 	    (plus:V4SI
! 	      (plus:V4SI
! 		(zero_extend:V4SI
! 		  (match_operand:V4HI 1 "nonimmediate_operand" "%0"))
! 		(zero_extend:V4SI
! 		  (match_operand:V4HI 2 "nonimmediate_operand" "ym")))
! 	      (const_vector:V4SI [(const_int 1) (const_int 1)
! 				  (const_int 1) (const_int 1)]))
  	    (const_int 1))))]
!   "(TARGET_SSE || TARGET_3DNOW_A)
!    && ix86_binary_operator_ok (PLUS, V4HImode, operands)"
!   "pavgw\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxshft")
!    (set_attr "mode" "DI")])
  
  (define_insn "mmx_psadbw"
!   [(set (match_operand:V1DI 0 "register_operand" "=y")
!         (unspec:V1DI [(match_operand:V8QI 1 "register_operand" "0")
! 		      (match_operand:V8QI 2 "nonimmediate_operand" "ym")]
  		     UNSPEC_PSADBW))]
!   "TARGET_SSE || TARGET_3DNOW_A"
!   "psadbw\t{%2, %0|%0, %2}"
!   [(set_attr "type" "mmxshft")
!    (set_attr "mode" "DI")])
  
! (define_insn "mmx_pmovmskb"
!   [(set (match_operand:SI 0 "register_operand" "=r")
! 	(unspec:SI [(match_operand:V8QI 1 "register_operand" "y")]
  		   UNSPEC_MOVMSK))]
!   "TARGET_SSE || TARGET_3DNOW_A"
!   "pmovmskb\t{%1, %0|%0, %1}"
!   [(set_attr "type" "mmxcvt")
!    (set_attr "mode" "DI")])
  
  (define_expand "mmx_maskmovq"
    [(set (match_operand:V8QI 0 "memory_operand")
--- 1922,2106 ----
  ;;
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  
! (define_expand "mmx_uavg<mode>3"
!   [(set (match_operand:MMXMODE12 0 "register_operand")
! 	(truncate:MMXMODE12
! 	  (lshiftrt:<mmxdoublemode>
! 	    (plus:<mmxdoublemode>
! 	      (plus:<mmxdoublemode>
! 		(zero_extend:<mmxdoublemode>
! 		  (match_operand:MMXMODE12 1 "register_mmxmem_operand"))
! 		(zero_extend:<mmxdoublemode>
! 		  (match_operand:MMXMODE12 2 "register_mmxmem_operand")))
! 	      (match_dup 3))
  	    (const_int 1))))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW)"
! {
!   operands[3] = CONST1_RTX(<mmxdoublemode>mode);
!   ix86_fixup_binary_operands_no_copy (PLUS, <MODE>mode, operands);
! })
  
  (define_insn "*mmx_uavgv8qi3"
!   [(set (match_operand:V8QI 0 "register_operand" "=y,x,Yv")
  	(truncate:V8QI
  	  (lshiftrt:V8HI
  	    (plus:V8HI
  	      (plus:V8HI
  		(zero_extend:V8HI
! 		  (match_operand:V8QI 1 "register_mmxmem_operand" "%0,0,Yv"))
  		(zero_extend:V8HI
! 		  (match_operand:V8QI 2 "register_mmxmem_operand" "ym,x,Yv")))
  	      (const_vector:V8HI [(const_int 1) (const_int 1)
  				  (const_int 1) (const_int 1)
  				  (const_int 1) (const_int 1)
  				  (const_int 1) (const_int 1)]))
  	    (const_int 1))))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW)
!    && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
  {
!   switch (which_alternative)
!     {
!     case 2:
!       return "vpavgb\t{%2, %1, %0|%0, %1, %2}";
!     case 1:
!     case 0:
!       /* These two instructions have the same operation, but their encoding
! 	 is different.  Prefer the one that is de facto standard.  */
!       if (TARGET_SSE || TARGET_3DNOW_A)
! 	return "pavgb\t{%2, %0|%0, %2}";
!       else
! 	return "pavgusb\t{%2, %0|%0, %2}";
!       default:
! 	gcc_unreachable ();
!     }
  }
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxshft,sseiadd,sseiadd")
     (set (attr "prefix_extra")
       (if_then_else
         (not (ior (match_test "TARGET_SSE")
  		 (match_test "TARGET_3DNOW_A")))
         (const_string "1")
         (const_string "*")))
!    (set_attr "mode" "DI,TI,TI")])
  
! (define_insn "*mmx_uavgv4hi3"
!   [(set (match_operand:V4HI 0 "register_operand" "=y,x,Yv")
  	(truncate:V4HI
  	  (lshiftrt:V4SI
  	    (plus:V4SI
  	      (plus:V4SI
  		(zero_extend:V4SI
! 		  (match_operand:V4HI 1 "register_mmxmem_operand" "%0,0,Yv"))
  		(zero_extend:V4SI
! 		  (match_operand:V4HI 2 "register_mmxmem_operand" "ym,x,Yv")))
  	      (const_vector:V4SI [(const_int 1) (const_int 1)
  				  (const_int 1) (const_int 1)]))
  	    (const_int 1))))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)
!    && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
!   "@
!    pavgw\t{%2, %0|%0, %2}
!    pavgw\t{%2, %0|%0, %2}
!    vpavgw\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxshft,sseiadd,sseiadd")
!    (set_attr "mode" "DI,TI,TI")])
  
! (define_expand "uavg<mode>3_ceil"
!   [(set (match_operand:MMXMODE12 0 "register_operand")
! 	(truncate:MMXMODE12
! 	  (lshiftrt:<mmxdoublemode>
! 	    (plus:<mmxdoublemode>
! 	      (plus:<mmxdoublemode>
! 		(zero_extend:<mmxdoublemode>
! 		  (match_operand:MMXMODE12 1 "register_operand"))
! 		(zero_extend:<mmxdoublemode>
! 		  (match_operand:MMXMODE12 2 "register_operand")))
! 	      (match_dup 3))
  	    (const_int 1))))]
!   "TARGET_MMX_WITH_SSE"
! {
!   operands[3] = CONST1_RTX(<mmxdoublemode>mode);
!   ix86_fixup_binary_operands_no_copy (PLUS, <MODE>mode, operands);
! })
  
  (define_insn "mmx_psadbw"
!   [(set (match_operand:V1DI 0 "register_operand" "=y,x,Yv")
!         (unspec:V1DI [(match_operand:V8QI 1 "register_operand" "0,0,Yv")
! 		      (match_operand:V8QI 2 "register_mmxmem_operand" "ym,x,Yv")]
  		     UNSPEC_PSADBW))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)"
!   "@
!    psadbw\t{%2, %0|%0, %2}
!    psadbw\t{%2, %0|%0, %2}
!    vpsadbw\t{%2, %1, %0|%0, %1, %2}"
!   [(set_attr "isa" "*,sse2_noavx,avx")
!    (set_attr "mmx_isa" "native,*,*")
!    (set_attr "type" "mmxshft,sseiadd,sseiadd")
!    (set_attr "mode" "DI,TI,TI")])
  
! (define_expand "reduc_plus_scal_v8qi"
!  [(plus:V8QI
!     (match_operand:QI 0 "register_operand")
!     (match_operand:V8QI 1 "register_operand"))]
!  "TARGET_MMX_WITH_SSE"
! {
!   rtx tmp = gen_reg_rtx (V8QImode);
!   emit_move_insn (tmp, CONST0_RTX (V8QImode));
!   rtx tmp2 = gen_reg_rtx (V1DImode);
!   emit_insn (gen_mmx_psadbw (tmp2, operands[1], tmp));
!   tmp2 = gen_lowpart (V8QImode, tmp2);
!   emit_insn (gen_vec_extractv8qiqi (operands[0], tmp2, const0_rtx));
!   DONE;
! })
! 
! (define_expand "usadv8qi"
!   [(match_operand:V2SI 0 "register_operand")
!    (match_operand:V8QI 1 "register_operand")
!    (match_operand:V8QI 2 "register_operand")
!    (match_operand:V2SI 3 "register_operand")]
!   "TARGET_MMX_WITH_SSE"
! {
!   rtx t1 = gen_reg_rtx (V1DImode);
!   rtx t2 = gen_reg_rtx (V2SImode);
!   emit_insn (gen_mmx_psadbw (t1, operands[1], operands[2]));
!   convert_move (t2, t1, 0);
!   emit_insn (gen_addv2si3 (operands[0], t2, operands[3]));
!   DONE;
! })
! 
! (define_insn_and_split "mmx_pmovmskb"
!   [(set (match_operand:SI 0 "register_operand" "=r,r")
! 	(unspec:SI [(match_operand:V8QI 1 "register_operand" "y,x")]
  		   UNSPEC_MOVMSK))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
!    && (TARGET_SSE || TARGET_3DNOW_A)"
!   "@
!    pmovmskb\t{%1, %0|%0, %1}
!    #"
!   "TARGET_SSE2 && reload_completed
!    && SSE_REGNO_P (REGNO (operands[1]))"
!   [(set (match_dup 0)
!         (unspec:SI [(match_dup 1)] UNSPEC_MOVMSK))
!    (set (match_dup 0)
! 	(zero_extend:SI (match_dup 2)))]
! {
!   /* Generate SSE pmovmskb and zero-extend from QImode to SImode.  */
!   operands[1] = lowpart_subreg (V16QImode, operands[1],
! 				GET_MODE (operands[1]));
!   operands[2] = lowpart_subreg (QImode, operands[0],
! 				GET_MODE (operands[0]));
! }
!   [(set_attr "mmx_isa" "native,sse")
!    (set_attr "type" "mmxcvt,ssemov")
!    (set_attr "mode" "DI,TI")])
  
  (define_expand "mmx_maskmovq"
    [(set (match_operand:V8QI 0 "memory_operand")
***************
*** 1586,1592 ****
    [(UNSPECV_EMMS "emms")
     (UNSPECV_FEMMS "femms")])
  
! (define_insn "mmx_<emms>"
    [(unspec_volatile [(const_int 0)] EMMS)
     (clobber (reg:XF ST0_REG))
     (clobber (reg:XF ST1_REG))
--- 2131,2165 ----
    [(UNSPECV_EMMS "emms")
     (UNSPECV_FEMMS "femms")])
  
! (define_expand "mmx_<emms>"
!   [(parallel
!     [(unspec_volatile [(const_int 0)] EMMS)
!       (clobber (reg:XF ST0_REG))
!       (clobber (reg:XF ST1_REG))
!       (clobber (reg:XF ST2_REG))
!       (clobber (reg:XF ST3_REG))
!       (clobber (reg:XF ST4_REG))
!       (clobber (reg:XF ST5_REG))
!       (clobber (reg:XF ST6_REG))
!       (clobber (reg:XF ST7_REG))
!       (clobber (reg:DI MM0_REG))
!       (clobber (reg:DI MM1_REG))
!       (clobber (reg:DI MM2_REG))
!       (clobber (reg:DI MM3_REG))
!       (clobber (reg:DI MM4_REG))
!       (clobber (reg:DI MM5_REG))
!       (clobber (reg:DI MM6_REG))
!       (clobber (reg:DI MM7_REG))])]
!   "TARGET_MMX || TARGET_MMX_WITH_SSE"
! {
!    if (!TARGET_MMX)
!      {
!        emit_insn (gen_nop ());
!        DONE;
!      }
! })
! 
! (define_insn "*mmx_<emms>"
    [(unspec_volatile [(const_int 0)] EMMS)
     (clobber (reg:XF ST0_REG))
     (clobber (reg:XF ST1_REG))
diff -Nrcpad gcc-9.3.0/gcc/config/i386/movdirintrin.h gcc-10.1.0/gcc/config/i386/movdirintrin.h
*** gcc-9.3.0/gcc/config/i386/movdirintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/movdirintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2018-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2018-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/msformat-c.c gcc-10.1.0/gcc/config/i386/msformat-c.c
*** gcc-9.3.0/gcc/config/i386/msformat-c.c	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/msformat-c.c	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Check calls to formatted I/O functions (-Wformat).
!    Copyright (C) 1992-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Check calls to formatted I/O functions (-Wformat).
!    Copyright (C) 1992-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/mwaitxintrin.h gcc-10.1.0/gcc/config/i386/mwaitxintrin.h
*** gcc-9.3.0/gcc/config/i386/mwaitxintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/mwaitxintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/netbsd-elf.h gcc-10.1.0/gcc/config/i386/netbsd-elf.h
*** gcc-9.3.0/gcc/config/i386/netbsd-elf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/netbsd-elf.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for GCC,
     for i386/ELF NetBSD systems.
!    Copyright (C) 2001-2019 Free Software Foundation, Inc.
     Contributed by matthew green <mrg@eterna.com.au>
  
  This file is part of GCC.
--- 1,6 ----
  /* Definitions of target machine for GCC,
     for i386/ELF NetBSD systems.
!    Copyright (C) 2001-2020 Free Software Foundation, Inc.
     Contributed by matthew green <mrg@eterna.com.au>
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/netbsd64.h gcc-10.1.0/gcc/config/i386/netbsd64.h
*** gcc-9.3.0/gcc/config/i386/netbsd64.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/netbsd64.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Definitions of target machine for GCC,
     for x86-64/ELF NetBSD systems.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
     Contributed by Wasabi Systems, Inc.
  
  This file is part of GCC.
--- 1,6 ----
  /* Definitions of target machine for GCC,
     for x86-64/ELF NetBSD systems.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
     Contributed by Wasabi Systems, Inc.
  
  This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/nmmintrin.h gcc-10.1.0/gcc/config/i386/nmmintrin.h
*** gcc-9.3.0/gcc/config/i386/nmmintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/nmmintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2007-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2007-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/nto.h gcc-10.1.0/gcc/config/i386/nto.h
*** gcc-9.3.0/gcc/config/i386/nto.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/nto.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for Intel 386 running QNX/Neutrino.
!    Copyright (C) 2002-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for Intel 386 running QNX/Neutrino.
!    Copyright (C) 2002-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/nto.opt gcc-10.1.0/gcc/config/i386/nto.opt
*** gcc-9.3.0/gcc/config/i386/nto.opt	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/nto.opt	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  ; QNX options.
  
! ; Copyright (C) 2011-2019 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
--- 1,6 ----
  ; QNX options.
  
! ; Copyright (C) 2011-2020 Free Software Foundation, Inc.
  ;
  ; This file is part of GCC.
  ;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/openbsdelf.h gcc-10.1.0/gcc/config/i386/openbsdelf.h
*** gcc-9.3.0/gcc/config/i386/openbsdelf.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/openbsdelf.h	Thu May  7 10:49:59 2020
***************
*** 1,6 ****
  /* Configuration for an OpenBSD i386 target.
     
!    Copyright (C) 2005-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,6 ----
  /* Configuration for an OpenBSD i386 target.
     
!    Copyright (C) 2005-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/pentium.md gcc-10.1.0/gcc/config/i386/pentium.md
*** gcc-9.3.0/gcc/config/i386/pentium.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/pentium.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Pentium Scheduling
! ;; Copyright (C) 2002-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Pentium Scheduling
! ;; Copyright (C) 2002-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/pkuintrin.h gcc-10.1.0/gcc/config/i386/pkuintrin.h
*** gcc-9.3.0/gcc/config/i386/pkuintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/pkuintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2015-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2015-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/pmm_malloc.h gcc-10.1.0/gcc/config/i386/pmm_malloc.h
*** gcc-9.3.0/gcc/config/i386/pmm_malloc.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/pmm_malloc.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2004-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2004-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/pmmintrin.h gcc-10.1.0/gcc/config/i386/pmmintrin.h
*** gcc-9.3.0/gcc/config/i386/pmmintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/pmmintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2003-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2003-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/popcntintrin.h gcc-10.1.0/gcc/config/i386/popcntintrin.h
*** gcc-9.3.0/gcc/config/i386/popcntintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/popcntintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2009-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2009-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/ppro.md gcc-10.1.0/gcc/config/i386/ppro.md
*** gcc-9.3.0/gcc/config/i386/ppro.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/ppro.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Scheduling for the Intel P6 family of processors
! ;; Copyright (C) 2004-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Scheduling for the Intel P6 family of processors
! ;; Copyright (C) 2004-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/predicates.md gcc-10.1.0/gcc/config/i386/predicates.md
*** gcc-9.3.0/gcc/config/i386/predicates.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/predicates.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Predicate definitions for IA-32 and x86-64.
! ;; Copyright (C) 2004-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Predicate definitions for IA-32 and x86-64.
! ;; Copyright (C) 2004-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 49,64 ****
    (and (match_code "reg")
         (match_test "MMX_REGNO_P (REGNO (op))")))
  
  ;; True if the operand is an SSE register.
  (define_predicate "sse_reg_operand"
    (and (match_code "reg")
         (match_test "SSE_REGNO_P (REGNO (op))")))
  
- ;; True if the operand is an AVX-512 new register.
- (define_predicate "ext_sse_reg_operand"
-   (and (match_code "reg")
-        (match_test "EXT_REX_SSE_REGNO_P (REGNO (op))")))
- 
  ;; Return true if op is a QImode register.
  (define_predicate "any_QIreg_operand"
    (and (match_code "reg")
--- 49,66 ----
    (and (match_code "reg")
         (match_test "MMX_REGNO_P (REGNO (op))")))
  
+ ;; Match register operands, but include memory operands for
+ ;; !TARGET_MMX_WITH_SSE.
+ (define_predicate "register_mmxmem_operand"
+   (ior (match_operand 0 "register_operand")
+        (and (not (match_test "TARGET_MMX_WITH_SSE"))
+ 	    (match_operand 0 "memory_operand"))))
+ 
  ;; True if the operand is an SSE register.
  (define_predicate "sse_reg_operand"
    (and (match_code "reg")
         (match_test "SSE_REGNO_P (REGNO (op))")))
  
  ;; Return true if op is a QImode register.
  (define_predicate "any_QIreg_operand"
    (and (match_code "reg")
***************
*** 93,98 ****
--- 95,109 ----
  	    (match_test "GET_MODE (op) == SImode")
  	    (match_test "GET_MODE (op) == HImode"))))
  
+ ;; Match a DI, SI, HI or QImode nonimmediate_operand.
+ (define_special_predicate "int_nonimmediate_operand"
+   (and (match_operand 0 "nonimmediate_operand")
+        (ior (and (match_test "TARGET_64BIT")
+ 		 (match_test "GET_MODE (op) == DImode"))
+ 	    (match_test "GET_MODE (op) == SImode")
+ 	    (match_test "GET_MODE (op) == HImode")
+ 	    (match_test "GET_MODE (op) == QImode"))))
+ 
  ;; Match register operands, but include memory operands for TARGET_SSE_MATH.
  (define_predicate "register_ssemem_operand"
    (if_then_else
***************
*** 683,689 ****
    if (GET_CODE (op) == PLUS && REG_P (XEXP (op, 0)))
      {
        int regno = REGNO (XEXP (op, 0));
!       if (!HARD_REGISTER_NUM_P (regno) || call_used_regs[regno])
  	{
  	  op = XEXP (op, 1);
  	  if (GOT32_symbol_operand (op, VOIDmode))
--- 694,700 ----
    if (GET_CODE (op) == PLUS && REG_P (XEXP (op, 0)))
      {
        int regno = REGNO (XEXP (op, 0));
!       if (!HARD_REGISTER_NUM_P (regno) || call_used_or_fixed_reg_p (regno))
  	{
  	  op = XEXP (op, 1);
  	  if (GOT32_symbol_operand (op, VOIDmode))
***************
*** 1397,1405 ****
  (define_predicate "compare_operator"
    (match_code "compare"))
  
- (define_predicate "absneg_operator"
-   (match_code "abs,neg"))
- 
  ;; Return true if OP is a memory operand, aligned to
  ;; less than its natural alignment.
  (define_predicate "misaligned_operand"
--- 1408,1413 ----
***************
*** 1437,1444 ****
  
  ;; return true if OP is a vzeroupper pattern.
  (define_predicate "vzeroupper_pattern"
!   (and (match_code "unspec_volatile")
!        (match_test "XINT (op, 1) == UNSPECV_VZEROUPPER")))
  
  ;; Return true if OP is an addsub vec_merge operation
  (define_predicate "addsub_vm_operator"
--- 1445,1453 ----
  
  ;; return true if OP is a vzeroupper pattern.
  (define_predicate "vzeroupper_pattern"
!   (and (match_code "parallel")
!        (match_code "unspec_volatile" "a")
!        (match_test "XINT (XVECEXP (op, 0, 0), 1) == UNSPECV_VZEROUPPER")))
  
  ;; Return true if OP is an addsub vec_merge operation
  (define_predicate "addsub_vm_operator"
diff -Nrcpad gcc-9.3.0/gcc/config/i386/prfchwintrin.h gcc-10.1.0/gcc/config/i386/prfchwintrin.h
*** gcc-9.3.0/gcc/config/i386/prfchwintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/prfchwintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/rdos.h gcc-10.1.0/gcc/config/i386/rdos.h
*** gcc-9.3.0/gcc/config/i386/rdos.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/rdos.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for RDOS on i386.
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for RDOS on i386.
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/rdos64.h gcc-10.1.0/gcc/config/i386/rdos64.h
*** gcc-9.3.0/gcc/config/i386/rdos64.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/rdos64.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for RDOS on x86_64.
!    Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
--- 1,5 ----
  /* Definitions for RDOS on x86_64.
!    Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
  This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/rdseedintrin.h gcc-10.1.0/gcc/config/i386/rdseedintrin.h
*** gcc-9.3.0/gcc/config/i386/rdseedintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/rdseedintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/rtemself.h gcc-10.1.0/gcc/config/i386/rtemself.h
*** gcc-9.3.0/gcc/config/i386/rtemself.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/rtemself.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Definitions for rtems targeting an ix86 using ELF.
!    Copyright (C) 1996-2019 Free Software Foundation, Inc.
     Contributed by Joel Sherrill (joel@OARcorp.com).
  
     This file is part of GCC.
--- 1,5 ----
  /* Definitions for rtems targeting an ix86 using ELF.
!    Copyright (C) 1996-2020 Free Software Foundation, Inc.
     Contributed by Joel Sherrill (joel@OARcorp.com).
  
     This file is part of GCC.
diff -Nrcpad gcc-9.3.0/gcc/config/i386/rtmintrin.h gcc-10.1.0/gcc/config/i386/rtmintrin.h
*** gcc-9.3.0/gcc/config/i386/rtmintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/rtmintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2012-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2012-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/sgxintrin.h gcc-10.1.0/gcc/config/i386/sgxintrin.h
*** gcc-9.3.0/gcc/config/i386/sgxintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/sgxintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2017-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2017-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/shaintrin.h gcc-10.1.0/gcc/config/i386/shaintrin.h
*** gcc-9.3.0/gcc/config/i386/shaintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/shaintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2013-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2013-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
*************** _mm_sha1rnds4_epu32 (__m128i __A, __m128
*** 64,71 ****
  }
  #else
  #define _mm_sha1rnds4_epu32(A, B, I)				    \
!   ((__m128i) __builtin_ia32_sha1rnds4 ((__v4si)(__m128i)A,	    \
! 				       (__v4si)(__m128i)B, (int)I))
  #endif
  
  extern __inline __m128i
--- 64,71 ----
  }
  #else
  #define _mm_sha1rnds4_epu32(A, B, I)				    \
!   ((__m128i) __builtin_ia32_sha1rnds4 ((__v4si)(__m128i)(A),	    \
! 				       (__v4si)(__m128i)(B), (int)(I)))
  #endif
  
  extern __inline __m128i
diff -Nrcpad gcc-9.3.0/gcc/config/i386/slm.md gcc-10.1.0/gcc/config/i386/slm.md
*** gcc-9.3.0/gcc/config/i386/slm.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/slm.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; Slivermont(SLM) Scheduling
! ;; Copyright (C) 2009-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; Slivermont(SLM) Scheduling
! ;; Copyright (C) 2009-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
diff -Nrcpad gcc-9.3.0/gcc/config/i386/smmintrin.h gcc-10.1.0/gcc/config/i386/smmintrin.h
*** gcc-9.3.0/gcc/config/i386/smmintrin.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/smmintrin.h	Thu May  7 10:49:59 2020
***************
*** 1,4 ****
! /* Copyright (C) 2007-2019 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
--- 1,4 ----
! /* Copyright (C) 2007-2020 Free Software Foundation, Inc.
  
     This file is part of GCC.
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/sol2.h gcc-10.1.0/gcc/config/i386/sol2.h
*** gcc-9.3.0/gcc/config/i386/sol2.h	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/sol2.h	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  /* Target definitions for GCC for Intel 80386 running Solaris 2
!    Copyright (C) 1993-2019 Free Software Foundation, Inc.
     Contributed by Fred Fish (fnf@cygnus.com).
  
  This file is part of GCC.
--- 1,5 ----
  /* Target definitions for GCC for Intel 80386 running Solaris 2
!    Copyright (C) 1993-2020 Free Software Foundation, Inc.
     Contributed by Fred Fish (fnf@cygnus.com).
  
  This file is part of GCC.
*************** along with GCC; see the file COPYING3.
*** 55,61 ****
  #define CPP_SPEC "%(cpp_subtarget)"
  
  #undef CC1_SPEC
! #define CC1_SPEC "%(cc1_cpu) " ASAN_CC1_SPEC
  
  /* GNU as understands --32 and --64, but the native Solaris
     assembler requires -xarch=generic or -xarch=generic64 instead.  */
--- 55,62 ----
  #define CPP_SPEC "%(cpp_subtarget)"
  
  #undef CC1_SPEC
! #define CC1_SPEC "%(cc1_cpu) " ASAN_CC1_SPEC \
!   " %{mx32:%e-mx32 is not supported on Solaris}"
  
  /* GNU as understands --32 and --64, but the native Solaris
     assembler requires -xarch=generic or -xarch=generic64 instead.  */
*************** along with GCC; see the file COPYING3.
*** 117,127 ****
  #undef LOCAL_LABEL_PREFIX
  #define LOCAL_LABEL_PREFIX "."
  
- /* The Solaris 10 FCS as doesn't accept "#" comments, while later versions
-    do.  */
- #undef ASM_COMMENT_START
- #define ASM_COMMENT_START "/"
- 
  /* The 32-bit Solaris assembler does not support .quad.  Do not use it.  */
  #ifndef HAVE_AS_IX86_QUAD
  #undef ASM_QUAD
--- 118,123 ----
*************** along with GCC; see the file COPYING3.
*** 246,255 ****
  
  /* -fsanitize=address is currently only supported for 32-bit.  */
  #define ASAN_REJECT_SPEC \
!   DEF_ARCH64_SPEC("%e:-fsanitize=address is not supported in this configuration")
! 
! #define USE_IX86_FRAME_POINTER 1
! #define USE_X86_64_FRAME_POINTER 1
  
  #undef NO_PROFILE_COUNTERS
  
--- 242,248 ----
  
  /* -fsanitize=address is currently only supported for 32-bit.  */
  #define ASAN_REJECT_SPEC \
!   DEF_ARCH64_SPEC("%e-fsanitize=address is not supported in this configuration")
  
  #undef NO_PROFILE_COUNTERS
  
diff -Nrcpad gcc-9.3.0/gcc/config/i386/sse.md gcc-10.1.0/gcc/config/i386/sse.md
*** gcc-9.3.0/gcc/config/i386/sse.md	Thu Mar 12 11:07:21 2020
--- gcc-10.1.0/gcc/config/i386/sse.md	Thu May  7 10:49:59 2020
***************
*** 1,5 ****
  ;; GCC machine description for SSE instructions
! ;; Copyright (C) 2005-2019 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
--- 1,5 ----
  ;; GCC machine description for SSE instructions
! ;; Copyright (C) 2005-2020 Free Software Foundation, Inc.
  ;;
  ;; This file is part of GCC.
  ;;
***************
*** 187,192 ****
--- 187,200 ----
  
    ;; For AVX512BITALG support
    UNSPEC_VPSHUFBIT
+ 
+   ;; For VP2INTERSECT support
+   UNSPEC_VP2INTERSECT
+ 
+   ;; For AVX512BF16 support
+   UNSPEC_VCVTNE2PS2BF16
+   UNSPEC_VCVTNEPS2BF16
+   UNSPEC_VDPBF16PS
  ])
  
  (define_c_enum "unspecv" [
***************
*** 274,279 ****
--- 282,290 ----
  (define_mode_iterator VF1
    [(V16SF "TARGET_AVX512F") (V8SF "TARGET_AVX") V4SF])
  
+ (define_mode_iterator VF1_AVX2
+   [(V16SF "TARGET_AVX512F") (V8SF "TARGET_AVX2") V4SF])
+ 
  ;; 128- and 256-bit SF vector modes
  (define_mode_iterator VF1_128_256
    [(V8SF "TARGET_AVX") V4SF])
***************
*** 587,592 ****
--- 598,607 ----
  (define_mode_attr ssequarterinsnmode
    [(V16SF "V4SF") (V8DF "V2DF") (V16SI "TI") (V8DI "TI")])
  
+ (define_mode_attr vecmemsuffix
+   [(V16SF "{z}") (V8SF "{y}") (V4SF "{x}")
+    (V8DF "{z}") (V4DF "{y}") (V2DF "{x}")])
+ 
  (define_mode_attr ssedoublemodelower
    [(V16QI "v16hi") (V32QI "v32hi") (V64QI "v64hi")
     (V8HI "v8si")   (V16HI "v16si") (V32HI "v32si")
***************
*** 726,731 ****
--- 741,755 ----
     (V16SF "hi") (V8SF  "qi") (V4SF  "qi")
     (V8DF  "qi") (V4DF  "qi") (V2DF  "qi")])
  
+ ;; Mapping of vector modes to corresponding mask half size
+ (define_mode_attr avx512fmaskhalfmode
+   [(V64QI "SI") (V32QI "HI") (V16QI "QI")
+    (V32HI "HI") (V16HI "QI") (V8HI  "QI") (V4HI "QI")
+    (V16SI "QI") (V8SI  "QI") (V4SI  "QI")
+    (V8DI  "QI") (V4DI  "QI") (V2DI  "QI")
+    (V16SF "QI") (V8SF  "QI") (V4SF  "QI")
+    (V8DF  "QI") (V4DF  "QI") (V2DF  "QI")])
+ 
  ;; Mapping of vector float modes to an integer mode of the same size
  (define_mode_attr sseintvecmode
    [(V16SF "V16SI") (V8DF  "V8DI")
***************
*** 829,834 ****
--- 853,865 ----
     (V4SF "k") (V2DF "q")
     (SF "k") (DF "q")])
  
+ ;; Mapping of vector modes to VPTERNLOG suffix
+ (define_mode_attr ternlogsuffix
+   [(V8DI "q") (V4DI "q") (V2DI "q")
+    (V16SI "d") (V8SI "d") (V4SI "d")
+    (V32HI "d") (V16HI "d") (V8HI "d")
+    (V64QI "d") (V32QI "d") (V16QI "d")])
+ 
  ;; Number of scalar elements in each vector type
  (define_mode_attr ssescalarnum
    [(V64QI "64") (V16SI "16") (V8DI "8")
***************
*** 982,1079 ****
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       /* There is no evex-encoded vmov* for sizes smaller than 64-bytes
! 	 in avx512f, so we need to use workarounds, to access sse registers
! 	 16-31, which are evex-only. In avx512vl we don't need workarounds.  */
!       if (TARGET_AVX512F && <MODE_SIZE> < 64 && !TARGET_AVX512VL
! 	  && (EXT_REX_SSE_REG_P (operands[0])
! 	      || EXT_REX_SSE_REG_P (operands[1])))
! 	{
! 	  if (memory_operand (operands[0], <MODE>mode))
! 	    {
! 	      if (<MODE_SIZE> == 32)
! 		return "vextract<shuffletype>64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}";
! 	      else if (<MODE_SIZE> == 16)
! 		return "vextract<shuffletype>32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}";
! 	      else
! 		gcc_unreachable ();
! 	    }
! 	  else if (memory_operand (operands[1], <MODE>mode))
! 	    {
! 	      if (<MODE_SIZE> == 32)
! 		return "vbroadcast<shuffletype>64x4\t{%1, %g0|%g0, %1}";
! 	      else if (<MODE_SIZE> == 16)
! 		return "vbroadcast<shuffletype>32x4\t{%1, %g0|%g0, %1}";
! 	      else
! 		gcc_unreachable ();
! 	    }
! 	  else
! 	    /* Reg -> reg move is always aligned.  Just use wider move.  */
! 	    switch (get_attr_mode (insn))
! 	      {
! 	      case MODE_V8SF:
! 	      case MODE_V4SF:
! 		return "vmovaps\t{%g1, %g0|%g0, %g1}";
! 	      case MODE_V4DF:
! 	      case MODE_V2DF:
! 		return "vmovapd\t{%g1, %g0|%g0, %g1}";
! 	      case MODE_OI:
! 	      case MODE_TI:
! 		return "vmovdqa64\t{%g1, %g0|%g0, %g1}";
! 	      default:
! 		gcc_unreachable ();
! 	      }
! 	}
! 
!       switch (get_attr_mode (insn))
! 	{
! 	case MODE_V16SF:
! 	case MODE_V8SF:
! 	case MODE_V4SF:
! 	  if (misaligned_operand (operands[0], <MODE>mode)
! 	      || misaligned_operand (operands[1], <MODE>mode))
! 	    return "%vmovups\t{%1, %0|%0, %1}";
! 	  else
! 	    return "%vmovaps\t{%1, %0|%0, %1}";
! 
! 	case MODE_V8DF:
! 	case MODE_V4DF:
! 	case MODE_V2DF:
! 	  if (misaligned_operand (operands[0], <MODE>mode)
! 	      || misaligned_operand (operands[1], <MODE>mode))
! 	    return "%vmovupd\t{%1, %0|%0, %1}";
! 	  else
! 	    return "%vmovapd\t{%1, %0|%0, %1}";
! 
! 	case MODE_OI:
! 	case MODE_TI:
! 	  if (misaligned_operand (operands[0], <MODE>mode)
! 	      || misaligned_operand (operands[1], <MODE>mode))
! 	    return TARGET_AVX512VL
! 		   && (<MODE>mode == V4SImode
! 		       || <MODE>mode == V2DImode
! 		       || <MODE>mode == V8SImode
! 		       || <MODE>mode == V4DImode
! 		       || TARGET_AVX512BW)
! 		   ? "vmovdqu<ssescalarsize>\t{%1, %0|%0, %1}"
! 		   : "%vmovdqu\t{%1, %0|%0, %1}";
! 	  else
! 	    return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}"
! 				   : "%vmovdqa\t{%1, %0|%0, %1}";
! 	case MODE_XI:
! 	  if (misaligned_operand (operands[0], <MODE>mode)
! 	      || misaligned_operand (operands[1], <MODE>mode))
! 	    return (<MODE>mode == V16SImode
! 		    || <MODE>mode == V8DImode
! 		    || TARGET_AVX512BW)
! 		   ? "vmovdqu<ssescalarsize>\t{%1, %0|%0, %1}"
! 		   : "vmovdqu64\t{%1, %0|%0, %1}";
! 	  else
! 	    return "vmovdqa64\t{%1, %0|%0, %1}";
! 
! 	default:
! 	  gcc_unreachable ();
! 	}
  
      default:
        gcc_unreachable ();
--- 1013,1019 ----
        return standard_sse_constant_opcode (insn, operands);
  
      case TYPE_SSEMOV:
!       return ix86_output_ssemov (insn, operands);
  
      default:
        gcc_unreachable ();
***************
*** 1082,1100 ****
    [(set_attr "type" "sselog1,sselog1,ssemov,ssemov")
     (set_attr "prefix" "maybe_vex")
     (set (attr "mode")
! 	(cond [(and (eq_attr "alternative" "1")
! 		    (match_test "TARGET_AVX512VL"))
! 		 (const_string "<sseinsnmode>")
! 	       (and (match_test "<MODE_SIZE> == 16")
! 		    (ior (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
! 			 (and (eq_attr "alternative" "3")
! 			      (match_test "TARGET_SSE_TYPELESS_STORES"))))
! 		 (const_string "<ssePSmode>")
! 	       (match_test "TARGET_AVX")
  		 (const_string "<sseinsnmode>")
  	       (ior (not (match_test "TARGET_SSE2"))
  		    (match_test "optimize_function_for_size_p (cfun)"))
  		 (const_string "V4SF")
  	       (and (eq_attr "alternative" "0")
  		    (match_test "TARGET_SSE_LOAD0_BY_PXOR"))
  		 (const_string "TI")
--- 1022,1038 ----
    [(set_attr "type" "sselog1,sselog1,ssemov,ssemov")
     (set_attr "prefix" "maybe_vex")
     (set (attr "mode")
! 	(cond [(match_test "TARGET_AVX")
  		 (const_string "<sseinsnmode>")
  	       (ior (not (match_test "TARGET_SSE2"))
  		    (match_test "optimize_function_for_size_p (cfun)"))
  		 (const_string "V4SF")
+ 	       (and (match_test "<MODE>mode == V2DFmode")
+ 		    (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
+ 		 (const_string "V4SF")
+ 	       (and (eq_attr "alternative" "3")
+ 		    (match_test "TARGET_SSE_TYPELESS_STORES"))
+ 		 (const_string "V4SF")
  	       (and (eq_attr "alternative" "0")
  		    (match_test "TARGET_SSE_LOAD0_BY_PXOR"))
  		 (const_string "TI")
***************
*** 1300,1309 ****
  ;; from there.
  
  (define_insn_and_split "movdi_to_sse"
!   [(set (match_operand:V4SI 0 "register_operand" "=?x,x")
! 	(unspec:V4SI [(match_operand:DI 1 "nonimmediate_operand" "r,m")]
  		     UNSPEC_MOVDI_TO_SSE))
!      (clobber (match_scratch:V4SI 2 "=&x,X"))]
    "!TARGET_64BIT && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC"
    "#"
    "&& reload_completed"
--- 1238,1247 ----
  ;; from there.
  
  (define_insn_and_split "movdi_to_sse"
!   [(set (match_operand:V4SI 0 "register_operand" "=x,x,?x")
! 	(unspec:V4SI [(match_operand:DI 1 "nonimmediate_operand" "r,m,r")]
  		     UNSPEC_MOVDI_TO_SSE))
!      (clobber (match_scratch:V4SI 2 "=X,X,&x"))]
    "!TARGET_64BIT && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC"
    "#"
    "&& reload_completed"
***************
*** 1315,1332 ****
  	 Assemble the 64-bit DImode value in an xmm register.  */
        emit_insn (gen_sse2_loadld (operands[0], CONST0_RTX (V4SImode),
  				  gen_lowpart (SImode, operands[1])));
!       emit_insn (gen_sse2_loadld (operands[2], CONST0_RTX (V4SImode),
! 				  gen_highpart (SImode, operands[1])));
!       emit_insn (gen_vec_interleave_lowv4si (operands[0], operands[0],
! 					     operands[2]));
!    }
   else if (memory_operand (operands[1], DImode))
     emit_insn (gen_vec_concatv2di (gen_lowpart (V2DImode, operands[0]),
  				  operands[1], const0_rtx));
   else
     gcc_unreachable ();
   DONE;
! })
  
  (define_split
    [(set (match_operand:V4SF 0 "register_operand")
--- 1253,1278 ----
  	 Assemble the 64-bit DImode value in an xmm register.  */
        emit_insn (gen_sse2_loadld (operands[0], CONST0_RTX (V4SImode),
  				  gen_lowpart (SImode, operands[1])));
!       if (TARGET_SSE4_1)
!         emit_insn (gen_sse4_1_pinsrd (operands[0], operands[0],
! 				      gen_highpart (SImode, operands[1]),
! 				      GEN_INT (2)));
!       else
! 	{
! 	  emit_insn (gen_sse2_loadld (operands[2], CONST0_RTX (V4SImode),
! 				      gen_highpart (SImode, operands[1])));
! 	  emit_insn (gen_vec_interleave_lowv4si (operands[0], operands[0],
! 						 operands[2]));
! 	}
!   }
   else if (memory_operand (operands[1], DImode))
     emit_insn (gen_vec_concatv2di (gen_lowpart (V2DImode, operands[0]),
  				  operands[1], const0_rtx));
   else
     gcc_unreachable ();
   DONE;
! }
!   [(set_attr "isa" "sse4,*,*")])
  
  (define_split
    [(set (match_operand:V4SF 0 "register_operand")
***************
*** 1691,1731 ****
    "TARGET_SSE"
    "ix86_expand_fp_absneg_operator (<CODE>, <MODE>mode, operands); DONE;")
  
! (define_insn_and_split "*absneg<mode>2"
    [(set (match_operand:VF 0 "register_operand" "=x,x,v,v")
! 	(match_operator:VF 3 "absneg_operator"
! 	  [(match_operand:VF 1 "vector_operand" "0,  xBm,v, m")]))
     (use (match_operand:VF 2 "vector_operand"    "xBm,0,  vm,v"))]
    "TARGET_SSE"
    "#"
    "&& reload_completed"
!   [(const_int 0)]
  {
!   enum rtx_code absneg_op;
!   rtx op1, op2;
!   rtx t;
  
    if (TARGET_AVX)
      {
        if (MEM_P (operands[1]))
! 	op1 = operands[2], op2 = operands[1];
!       else
! 	op1 = operands[1], op2 = operands[2];
      }
    else
      {
!       op1 = operands[0];
!       if (rtx_equal_p (operands[0], operands[1]))
! 	op2 = operands[2];
!       else
! 	op2 = operands[1];
      }
  
!   absneg_op = GET_CODE (operands[3]) == NEG ? XOR : AND;
!   t = gen_rtx_fmt_ee (absneg_op, <MODE>mode, op1, op2);
!   t = gen_rtx_SET (operands[0], t);
!   emit_insn (t);
!   DONE;
  }
    [(set_attr "isa" "noavx,noavx,avx,avx")])
  
--- 1637,1694 ----
    "TARGET_SSE"
    "ix86_expand_fp_absneg_operator (<CODE>, <MODE>mode, operands); DONE;")
  
! (define_insn_and_split "*<code><mode>2"
    [(set (match_operand:VF 0 "register_operand" "=x,x,v,v")
! 	(absneg:VF
! 	  (match_operand:VF 1 "vector_operand" "0,  xBm,v, m")))
     (use (match_operand:VF 2 "vector_operand"    "xBm,0,  vm,v"))]
    "TARGET_SSE"
    "#"
    "&& reload_completed"
!   [(set (match_dup 0) (match_dup 3))]
  {
!   enum rtx_code absneg_op = <CODE> == ABS ? AND : XOR;
  
    if (TARGET_AVX)
      {
        if (MEM_P (operands[1]))
!         std::swap (operands[1], operands[2]);
      }
    else
+    {
+      if (operands_match_p (operands[0], operands[2]))
+        std::swap (operands[1], operands[2]);
+    }
+ 
+   operands[3]
+     = gen_rtx_fmt_ee (absneg_op, <MODE>mode, operands[1], operands[2]);
+ }
+   [(set_attr "isa" "noavx,noavx,avx,avx")])
+ 
+ (define_insn_and_split "*nabs<mode>2"
+   [(set (match_operand:VF 0 "register_operand" "=x,x,v,v")
+ 	(neg:VF
+ 	  (abs:VF
+ 	    (match_operand:VF 1 "vector_operand" "0,xBm,v,m"))))
+    (use (match_operand:VF 2 "vector_operand"    "xBm,0,vm,v"))]
+   "TARGET_SSE"
+   "#"
+   "&& reload_completed"
+   [(set (match_dup 0) (match_dup 3))]
+ {
+   if (TARGET_AVX)
      {
!       if (MEM_P (operands[1]))
!         std::swap (operands[1], operands[2]);
      }
+   else
+    {
+      if (operands_match_p (operands[0], operands[2]))
+        std::swap (operands[1], operands[2]);
+    }
  
!   operands[3]
!     = gen_rtx_fmt_ee (IOR, <MODE>mode, operands[1], operands[2]);
  }
    [(set_attr "isa" "noavx,noavx,avx,avx")])
  
***************
*** 1780,1791 ****
     (set_attr "type" "sseadd")
     (set_attr "mode" "<MODE>")])
  
  (define_insn "<sse>_vm<plusminus_insn><mode>3<mask_scalar_name><round_scalar_name>"
    [(set (match_operand:VF_128 0 "register_operand" "=x,v")
  	(vec_merge:VF_128
  	  (plusminus:VF_128
  	    (match_operand:VF_128 1 "register_operand" "0,v")
! 	    (match_operand:VF_128 2 "vector_operand" "xBm,<round_scalar_constraint>"))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_SSE"
--- 1743,1776 ----
     (set_attr "type" "sseadd")
     (set_attr "mode" "<MODE>")])
  
+ ;; Standard scalar operation patterns which preserve the rest of the
+ ;; vector for combiner.
+ (define_insn "*<sse>_vm<plusminus_insn><mode>3"
+   [(set (match_operand:VF_128 0 "register_operand" "=x,v")
+ 	(vec_merge:VF_128
+ 	  (vec_duplicate:VF_128
+ 	    (plusminus:<ssescalarmode>
+ 	      (vec_select:<ssescalarmode>
+ 	        (match_operand:VF_128 1 "register_operand" "0,v")
+ 		(parallel [(const_int 0)]))
+ 	      (match_operand:<ssescalarmode> 2 "nonimmediate_operand" "xm,vm")))
+ 	  (match_dup 1)
+ 	  (const_int 1)))]
+   "TARGET_SSE"
+   "@
+    <plusminus_mnemonic><ssescalarmodesuffix>\t{%2, %0|%0, %2}
+    v<plusminus_mnemonic><ssescalarmodesuffix>\t{%2, %1, %0|%0, %1, %2}"
+   [(set_attr "isa" "noavx,avx")
+    (set_attr "type" "sseadd")
+    (set_attr "prefix" "orig,vex")
+    (set_attr "mode" "<ssescalarmode>")])
+ 
  (define_insn "<sse>_vm<plusminus_insn><mode>3<mask_scalar_name><round_scalar_name>"
    [(set (match_operand:VF_128 0 "register_operand" "=x,v")
  	(vec_merge:VF_128
  	  (plusminus:VF_128
  	    (match_operand:VF_128 1 "register_operand" "0,v")
! 	    (match_operand:VF_128 2 "nonimmediate_operand" "xm,<round_scalar_constraint>"))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_SSE"
***************
*** 1834,1845 ****
     (set_attr "type" "ssemul")
     (set_attr "mode" "<MODE>")])
  
  (define_insn "<sse>_vm<multdiv_mnemonic><mode>3<mask_scalar_name><round_scalar_name>"
    [(set (match_operand:VF_128 0 "register_operand" "=x,v")
  	(vec_merge:VF_128
  	  (multdiv:VF_128
  	    (match_operand:VF_128 1 "register_operand" "0,v")
! 	    (match_operand:VF_128 2 "vector_operand" "xBm,<round_scalar_constraint>"))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_SSE"
--- 1819,1853 ----
     (set_attr "type" "ssemul")
     (set_attr "mode" "<MODE>")])
  
+ ;; Standard scalar operation patterns which preserve the rest of the
+ ;; vector for combiner.
+ (define_insn "*<sse>_vm<multdiv_mnemonic><mode>3"
+   [(set (match_operand:VF_128 0 "register_operand" "=x,v")
+ 	(vec_merge:VF_128
+ 	  (vec_duplicate:VF_128
+ 	    (multdiv:<ssescalarmode>
+ 	      (vec_select:<ssescalarmode>
+ 	        (match_operand:VF_128 1 "register_operand" "0,v")
+ 		(parallel [(const_int 0)]))
+ 	      (match_operand:<ssescalarmode> 2 "nonimmediate_operand" "xm,vm")))
+ 	  (match_dup 1)
+ 	  (const_int 1)))]
+   "TARGET_SSE"
+   "@
+    <multdiv_mnemonic><ssescalarmodesuffix>\t{%2, %0|%0, %2}
+    v<multdiv_mnemonic><ssescalarmodesuffix>\t{%2, %1, %0|%0, %1, %2}"
+   [(set_attr "isa" "noavx,avx")
+    (set_attr "type" "sse<multdiv_mnemonic>")
+    (set_attr "prefix" "orig,vex")
+    (set_attr "btver2_decode" "direct,double")
+    (set_attr "mode" "<ssescalarmode>")])
+ 
  (define_insn "<sse>_vm<multdiv_mnemonic><mode>3<mask_scalar_name><round_scalar_name>"
    [(set (match_operand:VF_128 0 "register_operand" "=x,v")
  	(vec_merge:VF_128
  	  (multdiv:VF_128
  	    (match_operand:VF_128 1 "register_operand" "0,v")
! 	    (match_operand:VF_128 2 "nonimmediate_operand" "xm,<round_scalar_constraint>"))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_SSE"
***************
*** 1934,1939 ****
--- 1942,1966 ----
     (set_attr "prefix" "orig,vex")
     (set_attr "mode" "SF")])
  
+ (define_insn "*sse_vmrcpv4sf2"
+   [(set (match_operand:V4SF 0 "register_operand" "=x,x")
+ 	(vec_merge:V4SF
+ 	  (vec_duplicate:V4SF
+ 	    (unspec:SF [(match_operand:SF 1 "nonimmediate_operand" "xm,xm")]
+ 		         UNSPEC_RCP))
+ 	  (match_operand:V4SF 2 "register_operand" "0,x")
+ 	  (const_int 1)))]
+   "TARGET_SSE"
+   "@
+    rcpss\t{%1, %0|%0, %1}
+    vrcpss\t{%1, %2, %0|%0, %2, %1}"
+   [(set_attr "isa" "noavx,avx")
+    (set_attr "type" "sse")
+    (set_attr "atom_sse_attr" "rcp")
+    (set_attr "btver2_sse_attr" "rcp")
+    (set_attr "prefix" "orig,vex")
+    (set_attr "mode" "SF")])
+ 
  (define_insn "<mask_codefor>rcp14<mode><mask_name>"
    [(set (match_operand:VF_AVX512VL 0 "register_operand" "=v")
  	(unspec:VF_AVX512VL
***************
*** 2015,2021 ****
    [(set (match_operand:VF_128 0 "register_operand" "=x,v")
  	(vec_merge:VF_128
  	  (sqrt:VF_128
! 	    (match_operand:VF_128 1 "vector_operand" "xBm,<round_scalar_constraint>"))
  	  (match_operand:VF_128 2 "register_operand" "0,v")
  	  (const_int 1)))]
    "TARGET_SSE"
--- 2042,2048 ----
    [(set (match_operand:VF_128 0 "register_operand" "=x,v")
  	(vec_merge:VF_128
  	  (sqrt:VF_128
! 	    (match_operand:VF_128 1 "nonimmediate_operand" "xm,<round_scalar_constraint>"))
  	  (match_operand:VF_128 2 "register_operand" "0,v")
  	  (const_int 1)))]
    "TARGET_SSE"
***************
*** 2029,2034 ****
--- 2056,2080 ----
     (set_attr "btver2_sse_attr" "sqrt")
     (set_attr "mode" "<ssescalarmode>")])
  
+ (define_insn "*<sse>_vmsqrt<mode>2<mask_scalar_name><round_scalar_name>"
+   [(set (match_operand:VF_128 0 "register_operand" "=x,v")
+ 	(vec_merge:VF_128
+ 	  (vec_duplicate:VF_128
+ 	    (sqrt:<ssescalarmode>
+ 	      (match_operand:<ssescalarmode> 1 "nonimmediate_operand" "xm,<round_scalar_constraint>")))
+ 	  (match_operand:VF_128 2 "register_operand" "0,v")
+ 	  (const_int 1)))]
+   "TARGET_SSE"
+   "@
+    sqrt<ssescalarmodesuffix>\t{%1, %0|%0, %1}
+    vsqrt<ssescalarmodesuffix>\t{<round_scalar_mask_op3>%1, %2, %0<mask_scalar_operand3>|%0<mask_scalar_operand3>, %2, %1<round_scalar_mask_op3>}"
+   [(set_attr "isa" "noavx,avx")
+    (set_attr "type" "sse")
+    (set_attr "atom_sse_attr" "sqrt")
+    (set_attr "prefix" "<round_scalar_prefix>")
+    (set_attr "btver2_sse_attr" "sqrt")
+    (set_attr "mode" "<ssescalarmode>")])
+ 
  (define_expand "rsqrt<mode>2"
    [(set (match_operand:VF1_128_256 0 "register_operand")
  	(unspec:VF1_128_256
***************
*** 2118,2123 ****
--- 2164,2186 ----
     (set_attr "prefix" "orig,vex")
     (set_attr "mode" "SF")])
  
+ (define_insn "*sse_vmrsqrtv4sf2"
+   [(set (match_operand:V4SF 0 "register_operand" "=x,x")
+ 	(vec_merge:V4SF
+ 	  (vec_duplicate:V4SF
+ 	    (unspec:SF [(match_operand:SF 1 "nonimmediate_operand" "xm,xm")]
+ 		         UNSPEC_RSQRT))
+ 	  (match_operand:V4SF 2 "register_operand" "0,x")
+ 	  (const_int 1)))]
+   "TARGET_SSE"
+   "@
+    rsqrtss\t{%1, %0|%0, %1}
+    vrsqrtss\t{%1, %2, %0|%0, %2, %1}"
+   [(set_attr "isa" "noavx,avx")
+    (set_attr "type" "sse")
+    (set_attr "prefix" "orig,vex")
+    (set_attr "mode" "SF")])
+ 
  (define_expand "<code><mode>3<mask_name><round_saeonly_name>"
    [(set (match_operand:VF 0 "register_operand")
  	(smaxmin:VF
***************
*** 2183,2194 ****
     (set_attr "prefix" "<mask_prefix3>")
     (set_attr "mode" "<MODE>")])
  
  (define_insn "<sse>_vm<code><mode>3<mask_scalar_name><round_saeonly_scalar_name>"
    [(set (match_operand:VF_128 0 "register_operand" "=x,v")
  	(vec_merge:VF_128
  	  (smaxmin:VF_128
  	    (match_operand:VF_128 1 "register_operand" "0,v")
! 	    (match_operand:VF_128 2 "vector_operand" "xBm,<round_saeonly_scalar_constraint>"))
  	 (match_dup 1)
  	 (const_int 1)))]
    "TARGET_SSE"
--- 2246,2281 ----
     (set_attr "prefix" "<mask_prefix3>")
     (set_attr "mode" "<MODE>")])
  
+ ;; Standard scalar operation patterns which preserve the rest of the
+ ;; vector for combiner.
+ (define_insn "*ieee_<ieee_maxmin><mode>3"
+   [(set (match_operand:VF_128 0 "register_operand" "=x,v")
+ 	(vec_merge:VF_128
+ 	  (vec_duplicate:VF_128
+ 	    (unspec:<ssescalarmode>
+ 	      [(vec_select:<ssescalarmode>
+ 	         (match_operand:VF_128 1 "register_operand" "0,v")
+ 		 (parallel [(const_int 0)]))
+ 	       (match_operand:<ssescalarmode> 2 "nonimmediate_operand" "xm,vm")]
+ 	       IEEE_MAXMIN))
+ 	  (match_dup 1)
+ 	  (const_int 1)))]
+   "TARGET_SSE"
+   "@
+    <ieee_maxmin><ssescalarmodesuffix>\t{%2, %0|%0, %2}
+    v<ieee_maxmin><ssescalarmodesuffix>\t{%2, %1, %0|%0, %1, %2}"
+   [(set_attr "isa" "noavx,avx")
+    (set_attr "type" "sseadd")
+    (set_attr "btver2_sse_attr" "maxmin")
+    (set_attr "prefix" "orig,vex")
+    (set_attr "mode" "<ssescalarmode>")])
+ 
  (define_insn "<sse>_vm<code><mode>3<mask_scalar_name><round_saeonly_scalar_name>"
    [(set (match_operand:VF_128 0 "register_operand" "=x,v")
  	(vec_merge:VF_128
  	  (smaxmin:VF_128
  	    (match_operand:VF_128 1 "register_operand" "0,v")
! 	    (match_operand:VF_128 2 "nonimmediate_operand" "xm,<round_saeonly_scalar_constraint>"))
  	 (match_dup 1)
  	 (const_int 1)))]
    "TARGET_SSE"
***************
*** 2603,2611 ****
    DONE;
  })
  
  (define_mode_iterator REDUC_PLUS_MODE
   [(V4DF "TARGET_AVX") (V8SF "TARGET_AVX")
!   (V8DF "TARGET_AVX512F") (V16SF "TARGET_AVX512F")])
  
  (define_expand "reduc_plus_scal_<mode>"
   [(plus:REDUC_PLUS_MODE
--- 2690,2719 ----
    DONE;
  })
  
+ (define_expand "reduc_plus_scal_v16qi"
+  [(plus:V16QI
+     (match_operand:QI 0 "register_operand")
+     (match_operand:V16QI 1 "register_operand"))]
+  "TARGET_SSE2"
+ {
+   rtx tmp = gen_reg_rtx (V1TImode);
+   emit_insn (gen_sse2_lshrv1ti3 (tmp, gen_lowpart (V1TImode, operands[1]),
+ 				 GEN_INT (64)));
+   rtx tmp2 = gen_reg_rtx (V16QImode);
+   emit_insn (gen_addv16qi3 (tmp2, operands[1], gen_lowpart (V16QImode, tmp)));
+   rtx tmp3 = gen_reg_rtx (V16QImode);
+   emit_move_insn (tmp3, CONST0_RTX (V16QImode));
+   rtx tmp4 = gen_reg_rtx (V2DImode);
+   emit_insn (gen_sse2_psadbw (tmp4, tmp2, tmp3));
+   tmp4 = gen_lowpart (V16QImode, tmp4);
+   emit_insn (gen_vec_extractv16qiqi (operands[0], tmp4, const0_rtx));
+   DONE;
+ })
+ 
  (define_mode_iterator REDUC_PLUS_MODE
   [(V4DF "TARGET_AVX") (V8SF "TARGET_AVX")
!   (V8DF "TARGET_AVX512F") (V16SF "TARGET_AVX512F")
!   (V32QI "TARGET_AVX") (V64QI "TARGET_AVX512F")])
  
  (define_expand "reduc_plus_scal_<mode>"
   [(plus:REDUC_PLUS_MODE
***************
*** 2616,2623 ****
    rtx tmp = gen_reg_rtx (<ssehalfvecmode>mode);
    emit_insn (gen_vec_extract_hi_<mode> (tmp, operands[1]));
    rtx tmp2 = gen_reg_rtx (<ssehalfvecmode>mode);
!   emit_insn (gen_add<ssehalfvecmodelower>3
!     (tmp2, tmp, gen_lowpart (<ssehalfvecmode>mode, operands[1])));
    emit_insn (gen_reduc_plus_scal_<ssehalfvecmodelower> (operands[0], tmp2));
    DONE;
  })
--- 2724,2731 ----
    rtx tmp = gen_reg_rtx (<ssehalfvecmode>mode);
    emit_insn (gen_vec_extract_hi_<mode> (tmp, operands[1]));
    rtx tmp2 = gen_reg_rtx (<ssehalfvecmode>mode);
!   rtx tmp3 = gen_lowpart (<ssehalfvecmode>mode, operands[1]);
!   emit_insn (gen_add<ssehalfvecmodelower>3 (tmp2, tmp, tmp3));
    emit_insn (gen_reduc_plus_scal_<ssehalfvecmodelower> (operands[0], tmp2));
    DONE;
  })
***************
*** 2625,2632 ****
  ;; Modes handled by reduc_sm{in,ax}* patterns.
  (define_mode_iterator REDUC_SSE_SMINMAX_MODE
    [(V4SF "TARGET_SSE") (V2DF "TARGET_SSE")
!    (V2DI "TARGET_SSE4_2") (V4SI "TARGET_SSE") (V8HI "TARGET_SSE")
!    (V16QI "TARGET_SSE")])
  
  (define_expand "reduc_<code>_scal_<mode>"
    [(smaxmin:REDUC_SSE_SMINMAX_MODE
--- 2733,2740 ----
  ;; Modes handled by reduc_sm{in,ax}* patterns.
  (define_mode_iterator REDUC_SSE_SMINMAX_MODE
    [(V4SF "TARGET_SSE") (V2DF "TARGET_SSE")
!    (V4SI "TARGET_SSE2") (V8HI "TARGET_SSE2") (V16QI "TARGET_SSE2")
!    (V2DI "TARGET_SSE4_2")])
  
  (define_expand "reduc_<code>_scal_<mode>"
    [(smaxmin:REDUC_SSE_SMINMAX_MODE
***************
*** 2811,2817 ****
  	(vec_merge:VF_128
  	 (match_operator:VF_128 3 "sse_comparison_operator"
  	   [(match_operand:VF_128 1 "register_operand" "0,x")
! 	    (match_operand:VF_128 2 "vector_operand" "xBm,xm")])
  	 (match_dup 1)
  	 (const_int 1)))]
    "TARGET_SSE"
--- 2919,2925 ----
  	(vec_merge:VF_128
  	 (match_operator:VF_128 3 "sse_comparison_operator"
  	   [(match_operand:VF_128 1 "register_operand" "0,x")
! 	    (match_operand:VF_128 2 "nonimmediate_operand" "xm,xm")])
  	 (match_dup 1)
  	 (const_int 1)))]
    "TARGET_SSE"
***************
*** 2849,2854 ****
--- 2957,2974 ----
     (set_attr "prefix" "evex")
     (set_attr "mode" "<sseinsnmode>")])
  
+ (define_insn "*<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>"
+   [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
+ 	(match_operator:<avx512fmaskmode> 3 "ix86_comparison_int_operator"
+ 	  [(match_operand:VI48_AVX512VL 1 "register_operand" "v")
+ 	   (match_operand:VI48_AVX512VL 2 "nonimmediate_operand" "<round_saeonly_constraint>")]))]
+   "TARGET_AVX512F && <round_saeonly_mode512bit_condition>"
+   "vpcmp<ssemodesuffix>\t{%I3, <round_saeonly_mask_scalar_merge_op4>%2, %1, %0<mask_scalar_merge_operand4>|%0<mask_scalar_merge_operand4>, %1, %2<round_saeonly_mask_scalar_merge_op4>, %I3}"
+   [(set_attr "type" "ssecmp")
+    (set_attr "length_immediate" "1")
+    (set_attr "prefix" "evex")
+    (set_attr "mode" "<sseinsnmode>")])
+ 
  (define_insn "<avx512>_cmp<mode>3<mask_scalar_merge_name>"
    [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
  	(unspec:<avx512fmaskmode>
***************
*** 2863,2868 ****
--- 2983,3000 ----
     (set_attr "prefix" "evex")
     (set_attr "mode" "<sseinsnmode>")])
  
+ (define_insn "*<avx512>_cmp<mode>3<mask_scalar_merge_name>"
+   [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
+ 	(match_operator:<avx512fmaskmode> 3 "ix86_comparison_int_operator"
+ 	  [(match_operand:VI12_AVX512VL 1 "register_operand" "v")
+ 	   (match_operand:VI12_AVX512VL 2 "nonimmediate_operand" "vm")]))]
+   "TARGET_AVX512BW"
+   "vpcmp<ssemodesuffix>\t{%I3, %2, %1, %0<mask_scalar_merge_operand4>|%0<mask_scalar_merge_operand4>, %1, %2, %I3}"
+   [(set_attr "type" "ssecmp")
+    (set_attr "length_immediate" "1")
+    (set_attr "prefix" "evex")
+    (set_attr "mode" "<sseinsnmode>")])
+ 
  (define_insn "<avx512>_ucmp<mode>3<mask_scalar_merge_name>"
    [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
  	(unspec:<avx512fmaskmode>
***************
*** 2877,2882 ****
--- 3009,3026 ----
     (set_attr "prefix" "evex")
     (set_attr "mode" "<sseinsnmode>")])
  
+ (define_insn "*<avx512>_ucmp<mode>3<mask_scalar_merge_name>"
+   [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
+ 	(match_operator:<avx512fmaskmode> 3 "ix86_comparison_uns_operator"
+ 	  [(match_operand:VI12_AVX512VL 1 "register_operand" "v")
+ 	   (match_operand:VI12_AVX512VL 2 "nonimmediate_operand" "vm")]))]
+   "TARGET_AVX512BW"
+   "vpcmpu<ssemodesuffix>\t{%I3, %2, %1, %0<mask_scalar_merge_operand4>|%0<mask_scalar_merge_operand4>, %1, %2, %I3}"
+   [(set_attr "type" "ssecmp")
+    (set_attr "length_immediate" "1")
+    (set_attr "prefix" "evex")
+    (set_attr "mode" "<sseinsnmode>")])
+ 
  (define_insn "<avx512>_ucmp<mode>3<mask_scalar_merge_name>"
    [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
  	(unspec:<avx512fmaskmode>
***************
*** 2891,2902 ****
     (set_attr "prefix" "evex")
     (set_attr "mode" "<sseinsnmode>")])
  
  (define_insn "avx512f_vmcmp<mode>3<round_saeonly_name>"
    [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
  	(and:<avx512fmaskmode>
  	  (unspec:<avx512fmaskmode>
  	    [(match_operand:VF_128 1 "register_operand" "v")
! 	     (match_operand:VF_128 2 "<round_saeonly_nimm_predicate>" "<round_saeonly_constraint>")
  	     (match_operand:SI 3 "const_0_to_31_operand" "n")]
  	    UNSPEC_PCMP)
  	  (const_int 1)))]
--- 3035,3058 ----
     (set_attr "prefix" "evex")
     (set_attr "mode" "<sseinsnmode>")])
  
+ (define_insn "*<avx512>_ucmp<mode>3<mask_scalar_merge_name>"
+   [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
+ 	(match_operator:<avx512fmaskmode> 3 "ix86_comparison_uns_operator"
+ 	  [(match_operand:VI48_AVX512VL 1 "register_operand" "v")
+ 	   (match_operand:VI48_AVX512VL 2 "nonimmediate_operand" "vm")]))]
+   "TARGET_AVX512F"
+   "vpcmpu<ssemodesuffix>\t{%I3, %2, %1, %0<mask_scalar_merge_operand4>|%0<mask_scalar_merge_operand4>, %1, %2, %I3}"
+   [(set_attr "type" "ssecmp")
+    (set_attr "length_immediate" "1")
+    (set_attr "prefix" "evex")
+    (set_attr "mode" "<sseinsnmode>")])
+ 
  (define_insn "avx512f_vmcmp<mode>3<round_saeonly_name>"
    [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
  	(and:<avx512fmaskmode>
  	  (unspec:<avx512fmaskmode>
  	    [(match_operand:VF_128 1 "register_operand" "v")
! 	     (match_operand:VF_128 2 "<round_saeonly_nimm_scalar_predicate>" "<round_saeonly_constraint>")
  	     (match_operand:SI 3 "const_0_to_31_operand" "n")]
  	    UNSPEC_PCMP)
  	  (const_int 1)))]
***************
*** 2912,2918 ****
  	(and:<avx512fmaskmode>
  	  (unspec:<avx512fmaskmode>
  	    [(match_operand:VF_128 1 "register_operand" "v")
! 	     (match_operand:VF_128 2 "<round_saeonly_nimm_predicate>" "<round_saeonly_constraint>")
  	     (match_operand:SI 3 "const_0_to_31_operand" "n")]
  	    UNSPEC_PCMP)
  	  (and:<avx512fmaskmode>
--- 3068,3074 ----
  	(and:<avx512fmaskmode>
  	  (unspec:<avx512fmaskmode>
  	    [(match_operand:VF_128 1 "register_operand" "v")
! 	     (match_operand:VF_128 2 "<round_saeonly_nimm_scalar_predicate>" "<round_saeonly_constraint>")
  	     (match_operand:SI 3 "const_0_to_31_operand" "n")]
  	    UNSPEC_PCMP)
  	  (and:<avx512fmaskmode>
***************
*** 2928,2935 ****
  (define_insn "avx512f_maskcmp<mode>3"
    [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
  	(match_operator:<avx512fmaskmode> 3 "sse_comparison_operator"
! 	  [(match_operand:VF 1 "register_operand" "v")
! 	   (match_operand:VF 2 "nonimmediate_operand" "vm")]))]
    "TARGET_AVX512F"
    "vcmp%D3<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
    [(set_attr "type" "ssecmp")
--- 3084,3091 ----
  (define_insn "avx512f_maskcmp<mode>3"
    [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
  	(match_operator:<avx512fmaskmode> 3 "sse_comparison_operator"
! 	  [(match_operand:VF_AVX512VL 1 "register_operand" "v")
! 	   (match_operand:VF_AVX512VL 2 "nonimmediate_operand" "vm")]))]
    "TARGET_AVX512F"
    "vcmp%D3<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
    [(set_attr "type" "ssecmp")
***************
*** 3313,3328 ****
  		 (const_string "<sseintvecmode2>")
  	       (eq_attr "alternative" "3")
  		 (const_string "<sseintvecmode2>")
- 	       (and (match_test "<MODE_SIZE> == 16")
- 		    (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
- 		 (const_string "<ssePSmode>")
  	       (match_test "TARGET_AVX")
  		 (const_string "<MODE>")
  	       (match_test "optimize_function_for_size_p (cfun)")
  		 (const_string "V4SF")
! 	       ]
! 	       (const_string "<MODE>")))])
! 
  
  (define_insn "<sse>_andnot<mode>3<mask_name>"
    [(set (match_operand:VF_512 0 "register_operand" "=v")
--- 3469,3482 ----
  		 (const_string "<sseintvecmode2>")
  	       (eq_attr "alternative" "3")
  		 (const_string "<sseintvecmode2>")
  	       (match_test "TARGET_AVX")
  		 (const_string "<MODE>")
  	       (match_test "optimize_function_for_size_p (cfun)")
  		 (const_string "V4SF")
! 	       (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
! 		 (const_string "V4SF")
! 	      ]
! 	      (const_string "<MODE>")))])
  
  (define_insn "<sse>_andnot<mode>3<mask_name>"
    [(set (match_operand:VF_512 0 "register_operand" "=v")
***************
*** 3431,3445 ****
  		 (const_string "<sseintvecmode2>")
  	       (eq_attr "alternative" "3")
  		 (const_string "<sseintvecmode2>")
- 	       (and (match_test "<MODE_SIZE> == 16")
- 		    (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
- 		 (const_string "<ssePSmode>")
  	       (match_test "TARGET_AVX")
  		 (const_string "<MODE>")
  	       (match_test "optimize_function_for_size_p (cfun)")
  		 (const_string "V4SF")
! 	       ]
! 	       (const_string "<MODE>")))])
  
  (define_insn "*<code><mode>3<mask_name>"
    [(set (match_operand:VF_512 0 "register_operand" "=v")
--- 3585,3598 ----
  		 (const_string "<sseintvecmode2>")
  	       (eq_attr "alternative" "3")
  		 (const_string "<sseintvecmode2>")
  	       (match_test "TARGET_AVX")
  		 (const_string "<MODE>")
  	       (match_test "optimize_function_for_size_p (cfun)")
  		 (const_string "V4SF")
! 	       (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
! 		 (const_string "V4SF")
! 	      ]
! 	      (const_string "<MODE>")))])
  
  (define_insn "*<code><mode>3<mask_name>"
    [(set (match_operand:VF_512 0 "register_operand" "=v")
***************
*** 3507,3512 ****
--- 3660,3674 ----
    operands[4] = gen_reg_rtx (<MODE>mode);
  })
  
+ (define_expand "signbit<mode>2"
+   [(set (match_operand:<sseintvecmode> 0 "register_operand")
+ 	(lshiftrt:<sseintvecmode>
+ 	  (subreg:<sseintvecmode>
+ 	    (match_operand:VF1_AVX2 1 "register_operand") 0)
+ 	  (match_dup 2)))]
+   "TARGET_SSE2"
+   "operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (<MODE>mode)-1);")
+ 
  ;; Also define scalar versions.  These are used for abs, neg, and
  ;; conditional move.  Using subregs into vector modes causes register
  ;; allocation lossage.  These patterns do not allow memory operands
***************
*** 3571,3585 ****
  		 (if_then_else (match_test "TARGET_AVX512DQ")
  			       (const_string "<avx512fvecmode>")
  			       (const_string "XI"))
- 	       (and (match_test "<MODE_SIZE> == 16")
- 		    (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
- 		 (const_string "V4SF")
  	       (match_test "TARGET_AVX")
  		 (const_string "<ssevecmode>")
  	       (match_test "optimize_function_for_size_p (cfun)")
  		 (const_string "V4SF")
! 	       ]
! 	       (const_string "<ssevecmode>")))])
  
  (define_insn "*andnottf3"
    [(set (match_operand:TF 0 "register_operand" "=x,x,v,v")
--- 3733,3746 ----
  		 (if_then_else (match_test "TARGET_AVX512DQ")
  			       (const_string "<avx512fvecmode>")
  			       (const_string "XI"))
  	       (match_test "TARGET_AVX")
  		 (const_string "<ssevecmode>")
  	       (match_test "optimize_function_for_size_p (cfun)")
  		 (const_string "V4SF")
! 	       (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
! 		 (const_string "V4SF")
! 	      ]
! 	      (const_string "<ssevecmode>")))])
  
  (define_insn "*andnottf3"
    [(set (match_operand:TF 0 "register_operand" "=x,x,v,v")
***************
*** 3628,3642 ****
  		 (const_string "TI")
  	       (eq_attr "alternative" "3")
  		 (const_string "XI")
- 	       (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
- 		 (const_string "V4SF")
  	       (match_test "TARGET_AVX")
  		 (const_string "TI")
  	       (ior (not (match_test "TARGET_SSE2"))
  		    (match_test "optimize_function_for_size_p (cfun)"))
  		 (const_string "V4SF")
! 	       ]
! 	       (const_string "TI")))])
  
  (define_insn "*<code><mode>3"
    [(set (match_operand:MODEF 0 "register_operand" "=x,x,v,v")
--- 3789,3803 ----
  		 (const_string "TI")
  	       (eq_attr "alternative" "3")
  		 (const_string "XI")
  	       (match_test "TARGET_AVX")
  		 (const_string "TI")
  	       (ior (not (match_test "TARGET_SSE2"))
  		    (match_test "optimize_function_for_size_p (cfun)"))
  		 (const_string "V4SF")
! 	       (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
! 		 (const_string "V4SF")
! 	      ]
! 	      (const_string "TI")))])
  
  (define_insn "*<code><mode>3"
    [(set (match_operand:MODEF 0 "register_operand" "=x,x,v,v")
***************
*** 3695,3709 ****
  		 (if_then_else (match_test "TARGET_AVX512DQ")
  			       (const_string "<avx512fvecmode>")
  			       (const_string "XI"))
- 	       (and (match_test "<MODE_SIZE> == 16")
- 		    (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
- 		 (const_string "V4SF")
  	       (match_test "TARGET_AVX")
  		 (const_string "<ssevecmode>")
  	       (match_test "optimize_function_for_size_p (cfun)")
  		 (const_string "V4SF")
! 	       ]
! 	       (const_string "<ssevecmode>")))])
  
  (define_expand "<code>tf3"
    [(set (match_operand:TF 0 "register_operand")
--- 3856,3869 ----
  		 (if_then_else (match_test "TARGET_AVX512DQ")
  			       (const_string "<avx512fvecmode>")
  			       (const_string "XI"))
  	       (match_test "TARGET_AVX")
  		 (const_string "<ssevecmode>")
  	       (match_test "optimize_function_for_size_p (cfun)")
  		 (const_string "V4SF")
! 	       (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
! 		 (const_string "V4SF")
! 	      ]
! 	      (const_string "<ssevecmode>")))])
  
  (define_expand "<code>tf3"
    [(set (match_operand:TF 0 "register_operand")
***************
*** 3760,3774 ****
  		 (const_string "TI")
  	       (eq_attr "alternative" "3")
  		 (const_string "QI")
- 	       (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
- 		 (const_string "V4SF")
  	       (match_test "TARGET_AVX")
  		 (const_string "TI")
  	       (ior (not (match_test "TARGET_SSE2"))
  		    (match_test "optimize_function_for_size_p (cfun)"))
  		 (const_string "V4SF")
! 	       ]
! 	       (const_string "TI")))])
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;
--- 3920,3934 ----
  		 (const_string "TI")
  	       (eq_attr "alternative" "3")
  		 (const_string "QI")
  	       (match_test "TARGET_AVX")
  		 (const_string "TI")
  	       (ior (not (match_test "TARGET_SSE2"))
  		    (match_test "optimize_function_for_size_p (cfun)"))
  		 (const_string "V4SF")
! 	       (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
! 		 (const_string "V4SF")
! 	      ]
! 	      (const_string "TI")))])
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;
***************
*** 4538,4545 ****
  	(vec_merge:VF_128
  	  (fma:VF_128
  	    (match_operand:VF_128 1 "register_operand")
! 	    (match_operand:VF_128 2 "<round_nimm_predicate>")
! 	    (match_operand:VF_128 3 "<round_nimm_predicate>"))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA")
--- 4698,4705 ----
  	(vec_merge:VF_128
  	  (fma:VF_128
  	    (match_operand:VF_128 1 "register_operand")
! 	    (match_operand:VF_128 2 "<round_nimm_scalar_predicate>")
! 	    (match_operand:VF_128 3 "<round_nimm_scalar_predicate>"))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA")
***************
*** 4549,4557 ****
  	(vec_merge:VF_128
  	  (fma:VF_128
  	    (match_operand:VF_128 1 "register_operand")
! 	    (match_operand:VF_128 2 "<round_nimm_predicate>")
  	    (neg:VF_128
! 	      (match_operand:VF_128 3 "<round_nimm_predicate>")))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA")
--- 4709,4717 ----
  	(vec_merge:VF_128
  	  (fma:VF_128
  	    (match_operand:VF_128 1 "register_operand")
! 	    (match_operand:VF_128 2 "<round_nimm_scalar_predicate>")
  	    (neg:VF_128
! 	      (match_operand:VF_128 3 "<round_nimm_scalar_predicate>")))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA")
***************
*** 4561,4569 ****
  	(vec_merge:VF_128
  	  (fma:VF_128
  	    (neg:VF_128
! 	      (match_operand:VF_128 2 "<round_nimm_predicate>"))
  	    (match_operand:VF_128 1 "register_operand")
! 	    (match_operand:VF_128 3 "<round_nimm_predicate>"))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA")
--- 4721,4729 ----
  	(vec_merge:VF_128
  	  (fma:VF_128
  	    (neg:VF_128
! 	      (match_operand:VF_128 2 "<round_nimm_scalar_predicate>"))
  	    (match_operand:VF_128 1 "register_operand")
! 	    (match_operand:VF_128 3 "<round_nimm_scalar_predicate>"))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA")
***************
*** 4573,4582 ****
  	(vec_merge:VF_128
  	  (fma:VF_128
  	    (neg:VF_128
! 	      (match_operand:VF_128 2 "<round_nimm_predicate>"))
  	    (match_operand:VF_128 1 "register_operand")
  	    (neg:VF_128
! 	      (match_operand:VF_128 3 "<round_nimm_predicate>")))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA")
--- 4733,4742 ----
  	(vec_merge:VF_128
  	  (fma:VF_128
  	    (neg:VF_128
! 	      (match_operand:VF_128 2 "<round_nimm_scalar_predicate>"))
  	    (match_operand:VF_128 1 "register_operand")
  	    (neg:VF_128
! 	      (match_operand:VF_128 3 "<round_nimm_scalar_predicate>")))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA")
***************
*** 4586,4593 ****
          (vec_merge:VF_128
  	  (fma:VF_128
  	    (match_operand:VF_128 1 "register_operand" "0,0")
! 	    (match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>, v")
! 	    (match_operand:VF_128 3 "<round_nimm_predicate>" "v,<round_constraint>"))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA || TARGET_AVX512F"
--- 4746,4753 ----
          (vec_merge:VF_128
  	  (fma:VF_128
  	    (match_operand:VF_128 1 "register_operand" "0,0")
! 	    (match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>, v")
! 	    (match_operand:VF_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>"))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA || TARGET_AVX512F"
***************
*** 4602,4610 ****
          (vec_merge:VF_128
  	  (fma:VF_128
  	    (match_operand:VF_128   1 "register_operand" "0,0")
! 	    (match_operand:VF_128   2 "<round_nimm_predicate>" "<round_constraint>,v")
  	    (neg:VF_128
! 	      (match_operand:VF_128 3 "<round_nimm_predicate>" "v,<round_constraint>")))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA || TARGET_AVX512F"
--- 4762,4770 ----
          (vec_merge:VF_128
  	  (fma:VF_128
  	    (match_operand:VF_128   1 "register_operand" "0,0")
! 	    (match_operand:VF_128   2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
  	    (neg:VF_128
! 	      (match_operand:VF_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>")))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA || TARGET_AVX512F"
***************
*** 4619,4627 ****
          (vec_merge:VF_128
  	  (fma:VF_128
  	    (neg:VF_128
! 	      (match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>,v"))
  	    (match_operand:VF_128   1 "register_operand" "0,0")
! 	    (match_operand:VF_128   3 "<round_nimm_predicate>" "v,<round_constraint>"))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA || TARGET_AVX512F"
--- 4779,4787 ----
          (vec_merge:VF_128
  	  (fma:VF_128
  	    (neg:VF_128
! 	      (match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v"))
  	    (match_operand:VF_128   1 "register_operand" "0,0")
! 	    (match_operand:VF_128   3 "<round_nimm_scalar_predicate>" "v,<round_constraint>"))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA || TARGET_AVX512F"
***************
*** 4636,4645 ****
          (vec_merge:VF_128
  	  (fma:VF_128
  	    (neg:VF_128
! 	      (match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>,v"))
  	    (match_operand:VF_128   1 "register_operand" "0,0")
  	    (neg:VF_128
! 	      (match_operand:VF_128 3 "<round_nimm_predicate>" "v,<round_constraint>")))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA || TARGET_AVX512F"
--- 4796,4805 ----
          (vec_merge:VF_128
  	  (fma:VF_128
  	    (neg:VF_128
! 	      (match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v"))
  	    (match_operand:VF_128   1 "register_operand" "0,0")
  	    (neg:VF_128
! 	      (match_operand:VF_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>")))
  	  (match_dup 1)
  	  (const_int 1)))]
    "TARGET_FMA || TARGET_AVX512F"
***************
*** 4655,4662 ****
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (match_operand:VF_128 1 "register_operand" "0,0")
! 	      (match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>,v")
! 	      (match_operand:VF_128 3 "<round_nimm_predicate>" "v,<round_constraint>"))
  	    (match_dup 1)
  	    (match_operand:QI 4 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
--- 4815,4822 ----
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (match_operand:VF_128 1 "register_operand" "0,0")
! 	      (match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
! 	      (match_operand:VF_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>"))
  	    (match_dup 1)
  	    (match_operand:QI 4 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
***************
*** 4673,4680 ****
  	(vec_merge:VF_128
  	  (vec_merge:VF_128
  	    (fma:VF_128
! 	      (match_operand:VF_128 1 "<round_nimm_predicate>" "%v")
! 	      (match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>")
  	      (match_operand:VF_128 3 "register_operand" "0"))
  	    (match_dup 3)
  	    (match_operand:QI 4 "register_operand" "Yk"))
--- 4833,4840 ----
  	(vec_merge:VF_128
  	  (vec_merge:VF_128
  	    (fma:VF_128
! 	      (match_operand:VF_128 1 "<round_nimm_scalar_predicate>" "%v")
! 	      (match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>")
  	      (match_operand:VF_128 3 "register_operand" "0"))
  	    (match_dup 3)
  	    (match_operand:QI 4 "register_operand" "Yk"))
***************
*** 4705,4712 ****
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (match_operand:VF_128 1 "register_operand" "0,0")
! 	      (match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>,v")
! 	      (match_operand:VF_128 3 "<round_nimm_predicate>" "v,<round_constraint>"))
  	    (match_operand:VF_128 4 "const0_operand" "C,C")
  	    (match_operand:QI 5 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
--- 4865,4872 ----
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (match_operand:VF_128 1 "register_operand" "0,0")
! 	      (match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
! 	      (match_operand:VF_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>"))
  	    (match_operand:VF_128 4 "const0_operand" "C,C")
  	    (match_operand:QI 5 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
***************
*** 4724,4732 ****
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (match_operand:VF_128 1 "register_operand" "0,0")
! 	      (match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>,v")
  	      (neg:VF_128
! 		(match_operand:VF_128 3 "<round_nimm_predicate>" "v,<round_constraint>")))
  	    (match_dup 1)
  	    (match_operand:QI 4 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
--- 4884,4892 ----
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (match_operand:VF_128 1 "register_operand" "0,0")
! 	      (match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
  	      (neg:VF_128
! 		(match_operand:VF_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>")))
  	    (match_dup 1)
  	    (match_operand:QI 4 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
***************
*** 4743,4750 ****
  	(vec_merge:VF_128
  	  (vec_merge:VF_128
  	    (fma:VF_128
! 	      (match_operand:VF_128 1 "<round_nimm_predicate>" "%v")
! 	      (match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>")
  	      (neg:VF_128
  		(match_operand:VF_128 3 "register_operand" "0")))
  	    (match_dup 3)
--- 4903,4910 ----
  	(vec_merge:VF_128
  	  (vec_merge:VF_128
  	    (fma:VF_128
! 	      (match_operand:VF_128 1 "<round_nimm_scalar_predicate>" "%v")
! 	      (match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>")
  	      (neg:VF_128
  		(match_operand:VF_128 3 "register_operand" "0")))
  	    (match_dup 3)
***************
*** 4762,4770 ****
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (match_operand:VF_128 1 "register_operand" "0,0")
! 	      (match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>,v")
  	      (neg:VF_128
! 		(match_operand:VF_128 3 "<round_nimm_predicate>" "v,<round_constraint>")))
  	    (match_operand:VF_128 4 "const0_operand" "C,C")
  	    (match_operand:QI 5 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
--- 4922,4930 ----
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (match_operand:VF_128 1 "register_operand" "0,0")
! 	      (match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
  	      (neg:VF_128
! 		(match_operand:VF_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>")))
  	    (match_operand:VF_128 4 "const0_operand" "C,C")
  	    (match_operand:QI 5 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
***************
*** 4782,4790 ****
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (neg:VF_128
! 		(match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>,v"))
  	      (match_operand:VF_128 1 "register_operand" "0,0")
! 	      (match_operand:VF_128 3 "<round_nimm_predicate>" "v,<round_constraint>"))
  	    (match_dup 1)
  	    (match_operand:QI 4 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
--- 4942,4950 ----
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (neg:VF_128
! 		(match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v"))
  	      (match_operand:VF_128 1 "register_operand" "0,0")
! 	      (match_operand:VF_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>"))
  	    (match_dup 1)
  	    (match_operand:QI 4 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
***************
*** 4802,4809 ****
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (neg:VF_128
! 		(match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>"))
! 	      (match_operand:VF_128 1 "<round_nimm_predicate>" "%v")
  	      (match_operand:VF_128 3 "register_operand" "0"))
  	    (match_dup 3)
  	    (match_operand:QI 4 "register_operand" "Yk"))
--- 4962,4969 ----
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (neg:VF_128
! 		(match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>"))
! 	      (match_operand:VF_128 1 "<round_nimm_scalar_predicate>" "%v")
  	      (match_operand:VF_128 3 "register_operand" "0"))
  	    (match_dup 3)
  	    (match_operand:QI 4 "register_operand" "Yk"))
***************
*** 4820,4828 ****
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (neg:VF_128
! 		(match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>,v"))
  	      (match_operand:VF_128 1 "register_operand" "0,0")
! 	      (match_operand:VF_128 3 "<round_nimm_predicate>" "v,<round_constraint>"))
  	    (match_operand:VF_128 4 "const0_operand" "C,C")
  	    (match_operand:QI 5 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
--- 4980,4988 ----
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (neg:VF_128
! 		(match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v"))
  	      (match_operand:VF_128 1 "register_operand" "0,0")
! 	      (match_operand:VF_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>"))
  	    (match_operand:VF_128 4 "const0_operand" "C,C")
  	    (match_operand:QI 5 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
***************
*** 4840,4849 ****
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (neg:VF_128
! 		(match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>,v"))
  	      (match_operand:VF_128 1 "register_operand" "0,0")
  	      (neg:VF_128
! 		(match_operand:VF_128 3 "<round_nimm_predicate>" "v,<round_constraint>")))
  	    (match_dup 1)
  	    (match_operand:QI 4 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
--- 5000,5009 ----
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (neg:VF_128
! 		(match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v"))
  	      (match_operand:VF_128 1 "register_operand" "0,0")
  	      (neg:VF_128
! 		(match_operand:VF_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>")))
  	    (match_dup 1)
  	    (match_operand:QI 4 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
***************
*** 4861,4868 ****
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (neg:VF_128
! 		(match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>"))
! 	      (match_operand:VF_128 1 "<round_nimm_predicate>" "%v")
  	      (neg:VF_128
  		(match_operand:VF_128 3 "register_operand" "0")))
  	    (match_dup 3)
--- 5021,5028 ----
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (neg:VF_128
! 		(match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>"))
! 	      (match_operand:VF_128 1 "<round_nimm_scalar_predicate>" "%v")
  	      (neg:VF_128
  		(match_operand:VF_128 3 "register_operand" "0")))
  	    (match_dup 3)
***************
*** 4880,4889 ****
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (neg:VF_128
! 		(match_operand:VF_128 2 "<round_nimm_predicate>" "<round_constraint>,v"))
  	      (match_operand:VF_128 1 "register_operand" "0,0")
  	      (neg:VF_128
! 		(match_operand:VF_128 3 "<round_nimm_predicate>" "v,<round_constraint>")))
  	    (match_operand:VF_128 4 "const0_operand" "C,C")
  	    (match_operand:QI 5 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
--- 5040,5049 ----
  	  (vec_merge:VF_128
  	    (fma:VF_128
  	      (neg:VF_128
! 		(match_operand:VF_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v"))
  	      (match_operand:VF_128 1 "register_operand" "0,0")
  	      (neg:VF_128
! 		(match_operand:VF_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>")))
  	    (match_operand:VF_128 4 "const0_operand" "C,C")
  	    (match_operand:QI 5 "register_operand" "Yk,Yk"))
  	  (match_dup 1)
***************
*** 4976,5014 ****
  ;;
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  
! (define_insn "sse_cvtpi2ps"
!   [(set (match_operand:V4SF 0 "register_operand" "=x")
  	(vec_merge:V4SF
  	  (vec_duplicate:V4SF
! 	    (float:V2SF (match_operand:V2SI 2 "nonimmediate_operand" "ym")))
! 	  (match_operand:V4SF 1 "register_operand" "0")
! 	  (const_int 3)))]
!   "TARGET_SSE"
!   "cvtpi2ps\t{%2, %0|%0, %2}"
!   [(set_attr "type" "ssecvt")
     (set_attr "mode" "V4SF")])
  
  (define_insn "sse_cvtps2pi"
!   [(set (match_operand:V2SI 0 "register_operand" "=y")
  	(vec_select:V2SI
! 	  (unspec:V4SI [(match_operand:V4SF 1 "nonimmediate_operand" "xm")]
  		       UNSPEC_FIX_NOTRUNC)
  	  (parallel [(const_int 0) (const_int 1)])))]
!   "TARGET_SSE"
!   "cvtps2pi\t{%1, %0|%0, %q1}"
!   [(set_attr "type" "ssecvt")
!    (set_attr "unit" "mmx")
     (set_attr "mode" "DI")])
  
  (define_insn "sse_cvttps2pi"
!   [(set (match_operand:V2SI 0 "register_operand" "=y")
  	(vec_select:V2SI
! 	  (fix:V4SI (match_operand:V4SF 1 "nonimmediate_operand" "xm"))
  	  (parallel [(const_int 0) (const_int 1)])))]
!   "TARGET_SSE"
!   "cvttps2pi\t{%1, %0|%0, %q1}"
!   [(set_attr "type" "ssecvt")
!    (set_attr "unit" "mmx")
     (set_attr "prefix_rep" "0")
     (set_attr "mode" "SF")])
  
--- 5136,5228 ----
  ;;
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  
! (define_insn_and_split "sse_cvtpi2ps"
!   [(set (match_operand:V4SF 0 "register_operand" "=x,x,Yv")
  	(vec_merge:V4SF
  	  (vec_duplicate:V4SF
! 	    (float:V2SF (match_operand:V2SI 2 "register_mmxmem_operand" "ym,x,Yv")))
! 	  (match_operand:V4SF 1 "register_operand" "0,0,Yv")
! 	  (const_int 3)))
!    (clobber (match_scratch:V4SF 3 "=X,x,Yv"))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE"
!   "@
!    cvtpi2ps\t{%2, %0|%0, %2}
!    #
!    #"
!   "TARGET_SSE2 && reload_completed
!    && SSE_REG_P (operands[2])"
!   [(const_int 0)]
! {
!   rtx op2 = lowpart_subreg (V4SImode, operands[2],
! 			    GET_MODE (operands[2]));
!   /* Generate SSE2 cvtdq2ps.  */
!   emit_insn (gen_floatv4siv4sf2 (operands[3], op2));
! 
!   /* Merge operands[3] with operands[0].  */
!   rtx mask, op1;
!   if (TARGET_AVX)
!     {
!       mask = gen_rtx_PARALLEL (VOIDmode,
! 			       gen_rtvec (4, GEN_INT (0), GEN_INT (1),
! 					  GEN_INT (6), GEN_INT (7)));
!       op1 = gen_rtx_VEC_CONCAT (V8SFmode, operands[3], operands[1]);
!       op2 = gen_rtx_VEC_SELECT (V4SFmode, op1, mask);
!       emit_insn (gen_rtx_SET (operands[0], op2));
!     }
!   else
!     {
!       /* NB: SSE can only concatenate OP0 and OP3 to OP0.  */
!       mask = gen_rtx_PARALLEL (VOIDmode,
! 			       gen_rtvec (4, GEN_INT (2), GEN_INT (3),
! 					  GEN_INT (4), GEN_INT (5)));
!       op1 = gen_rtx_VEC_CONCAT (V8SFmode, operands[0], operands[3]);
!       op2 = gen_rtx_VEC_SELECT (V4SFmode, op1, mask);
!       emit_insn (gen_rtx_SET (operands[0], op2));
! 
!       /* Swap bits 0:63 with bits 64:127.  */
!       mask = gen_rtx_PARALLEL (VOIDmode,
! 			       gen_rtvec (4, GEN_INT (2), GEN_INT (3),
! 					  GEN_INT (0), GEN_INT (1)));
!       rtx dest = lowpart_subreg (V4SImode, operands[0],
! 				 GET_MODE (operands[0]));
!       op1 = gen_rtx_VEC_SELECT (V4SImode, dest, mask);
!       emit_insn (gen_rtx_SET (dest, op1));
!     }
!   DONE;
! }
!   [(set_attr "mmx_isa" "native,sse_noavx,avx")
!    (set_attr "type" "ssecvt")
     (set_attr "mode" "V4SF")])
  
  (define_insn "sse_cvtps2pi"
!   [(set (match_operand:V2SI 0 "register_operand" "=y,Yv")
  	(vec_select:V2SI
! 	  (unspec:V4SI [(match_operand:V4SF 1 "register_mmxmem_operand" "xm,YvBm")]
  		       UNSPEC_FIX_NOTRUNC)
  	  (parallel [(const_int 0) (const_int 1)])))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE"
!   "@
!    cvtps2pi\t{%1, %0|%0, %q1}
!    %vcvtps2dq\t{%1, %0|%0, %1}"
!   [(set_attr "isa" "*,sse2")
!    (set_attr "mmx_isa" "native,*")
!    (set_attr "type" "ssecvt")
!    (set_attr "unit" "mmx,*")
     (set_attr "mode" "DI")])
  
  (define_insn "sse_cvttps2pi"
!   [(set (match_operand:V2SI 0 "register_operand" "=y,Yv")
  	(vec_select:V2SI
! 	  (fix:V4SI (match_operand:V4SF 1 "register_mmxmem_operand" "xm,YvBm"))
  	  (parallel [(const_int 0) (const_int 1)])))]
!   "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE"
!   "@
!    cvttps2pi\t{%1, %0|%0, %q1}
!    %vcvttps2dq\t{%1, %0|%0, %1}"
!   [(set_attr "isa" "*,sse2")
!    (set_attr "mmx_isa" "native,*")
!    (set_attr "type" "ssecvt")
!    (set_attr "unit" "mmx,*")
     (set_attr "prefix_rep" "0")
     (set_attr "mode" "SF")])
  
***************
*** 5067,5073 ****
  	(unspec:SWI48 [(match_operand:SF 1 "nonimmediate_operand" "v,m")]
  		      UNSPEC_FIX_NOTRUNC))]
    "TARGET_SSE"
!   "%vcvtss2si<rex64suffix>\t{%1, %0|%0, %k1}"
    [(set_attr "type" "sseicvt")
     (set_attr "athlon_decode" "double,vector")
     (set_attr "amdfam10_decode" "double,double")
--- 5281,5287 ----
  	(unspec:SWI48 [(match_operand:SF 1 "nonimmediate_operand" "v,m")]
  		      UNSPEC_FIX_NOTRUNC))]
    "TARGET_SSE"
!   "%vcvtss2si<rex64suffix>\t{%1, %0|%0, %1}"
    [(set_attr "type" "sseicvt")
     (set_attr "athlon_decode" "double,vector")
     (set_attr "amdfam10_decode" "double,double")
***************
*** 5097,5103 ****
  	(vec_merge:VF_128
  	  (vec_duplicate:VF_128
  	    (unsigned_float:<ssescalarmode>
! 	      (match_operand:SI 2 "<round_nimm_predicate>" "<round_constraint3>")))
  	  (match_operand:VF_128 1 "register_operand" "v")
  	  (const_int 1)))]
    "TARGET_AVX512F && <round_modev4sf_condition>"
--- 5311,5317 ----
  	(vec_merge:VF_128
  	  (vec_duplicate:VF_128
  	    (unsigned_float:<ssescalarmode>
! 	      (match_operand:SI 2 "<round_nimm_scalar_predicate>" "<round_constraint3>")))
  	  (match_operand:VF_128 1 "register_operand" "v")
  	  (const_int 1)))]
    "TARGET_AVX512F && <round_modev4sf_condition>"
***************
*** 5111,5117 ****
  	(vec_merge:VF_128
  	  (vec_duplicate:VF_128
  	    (unsigned_float:<ssescalarmode>
! 	      (match_operand:DI 2 "<round_nimm_predicate>" "<round_constraint3>")))
  	  (match_operand:VF_128 1 "register_operand" "v")
  	  (const_int 1)))]
    "TARGET_AVX512F && TARGET_64BIT"
--- 5325,5331 ----
  	(vec_merge:VF_128
  	  (vec_duplicate:VF_128
  	    (unsigned_float:<ssescalarmode>
! 	      (match_operand:DI 2 "<round_nimm_scalar_predicate>" "<round_constraint3>")))
  	  (match_operand:VF_128 1 "register_operand" "v")
  	  (const_int 1)))]
    "TARGET_AVX512F && TARGET_64BIT"
***************
*** 5324,5330 ****
    "@
     %vcvtdq2pd\t{%1, %0|%0, %1}
     cvtpi2pd\t{%1, %0|%0, %1}"
!   [(set_attr "type" "ssecvt")
     (set_attr "unit" "*,mmx")
     (set_attr "prefix_data16" "*,1")
     (set_attr "prefix" "maybe_vex,*")
--- 5538,5545 ----
    "@
     %vcvtdq2pd\t{%1, %0|%0, %1}
     cvtpi2pd\t{%1, %0|%0, %1}"
!   [(set_attr "mmx_isa" "*,native")
!    (set_attr "type" "ssecvt")
     (set_attr "unit" "*,mmx")
     (set_attr "prefix_data16" "*,1")
     (set_attr "prefix" "maybe_vex,*")
***************
*** 5332,5344 ****
  
  (define_insn "sse2_cvtpd2pi"
    [(set (match_operand:V2SI 0 "register_operand" "=v,?!y")
! 	(unspec:V2SI [(match_operand:V2DF 1 "nonimmediate_operand" "vBm,xm")]
  		     UNSPEC_FIX_NOTRUNC))]
    "TARGET_SSE2"
    "@
     * return TARGET_AVX ? \"vcvtpd2dq{x}\t{%1, %0|%0, %1}\" : \"cvtpd2dq\t{%1, %0|%0, %1}\";
     cvtpd2pi\t{%1, %0|%0, %1}"
!   [(set_attr "type" "ssecvt")
     (set_attr "unit" "*,mmx")
     (set_attr "amdfam10_decode" "double")
     (set_attr "athlon_decode" "vector")
--- 5547,5560 ----
  
  (define_insn "sse2_cvtpd2pi"
    [(set (match_operand:V2SI 0 "register_operand" "=v,?!y")
! 	(unspec:V2SI [(match_operand:V2DF 1 "vector_operand" "vBm,xBm")]
  		     UNSPEC_FIX_NOTRUNC))]
    "TARGET_SSE2"
    "@
     * return TARGET_AVX ? \"vcvtpd2dq{x}\t{%1, %0|%0, %1}\" : \"cvtpd2dq\t{%1, %0|%0, %1}\";
     cvtpd2pi\t{%1, %0|%0, %1}"
!   [(set_attr "mmx_isa" "*,native")
!    (set_attr "type" "ssecvt")
     (set_attr "unit" "*,mmx")
     (set_attr "amdfam10_decode" "double")
     (set_attr "athlon_decode" "vector")
***************
*** 5349,5360 ****
  
  (define_insn "sse2_cvttpd2pi"
    [(set (match_operand:V2SI 0 "register_operand" "=v,?!y")
! 	(fix:V2SI (match_operand:V2DF 1 "nonimmediate_operand" "vBm,xm")))]
    "TARGET_SSE2"
    "@
     * return TARGET_AVX ? \"vcvttpd2dq{x}\t{%1, %0|%0, %1}\" : \"cvttpd2dq\t{%1, %0|%0, %1}\";
     cvttpd2pi\t{%1, %0|%0, %1}"
!   [(set_attr "type" "ssecvt")
     (set_attr "unit" "*,mmx")
     (set_attr "amdfam10_decode" "double")
     (set_attr "athlon_decode" "vector")
--- 5565,5577 ----
  
  (define_insn "sse2_cvttpd2pi"
    [(set (match_operand:V2SI 0 "register_operand" "=v,?!y")
! 	(fix:V2SI (match_operand:V2DF 1 "vector_operand" "vBm,xBm")))]
    "TARGET_SSE2"
    "@
     * return TARGET_AVX ? \"vcvttpd2dq{x}\t{%1, %0|%0, %1}\" : \"cvttpd2dq\t{%1, %0|%0, %1}\";
     cvttpd2pi\t{%1, %0|%0, %1}"
!   [(set_attr "mmx_isa" "*,native")
!    (set_attr "type" "ssecvt")
     (set_attr "unit" "*,mmx")
     (set_attr "amdfam10_decode" "double")
     (set_attr "athlon_decode" "vector")
***************
*** 5749,5764 ****
     (set_attr "btver2_decode" "vector")
     (set_attr "mode" "OI")])
  
! (define_insn "sse2_cvtpd2dq<mask_name>"
    [(set (match_operand:V4SI 0 "register_operand" "=v")
  	(vec_concat:V4SI
  	  (unspec:V2SI [(match_operand:V2DF 1 "vector_operand" "vBm")]
  		       UNSPEC_FIX_NOTRUNC)
  	  (const_vector:V2SI [(const_int 0) (const_int 0)])))]
!   "TARGET_SSE2 && <mask_avx512vl_condition>"
  {
    if (TARGET_AVX)
!     return "vcvtpd2dq{x}\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}";
    else
      return "cvtpd2dq\t{%1, %0|%0, %1}";
  }
--- 5966,5981 ----
     (set_attr "btver2_decode" "vector")
     (set_attr "mode" "OI")])
  
! (define_insn "sse2_cvtpd2dq"
    [(set (match_operand:V4SI 0 "register_operand" "=v")
  	(vec_concat:V4SI
  	  (unspec:V2SI [(match_operand:V2DF 1 "vector_operand" "vBm")]
  		       UNSPEC_FIX_NOTRUNC)
  	  (const_vector:V2SI [(const_int 0) (const_int 0)])))]
!   "TARGET_SSE2"
  {
    if (TARGET_AVX)
!     return "vcvtpd2dq{x}\t{%1, %0|%0, %1}";
    else
      return "cvtpd2dq\t{%1, %0|%0, %1}";
  }
***************
*** 5771,5776 ****
--- 5988,6025 ----
     (set_attr "athlon_decode" "vector")
     (set_attr "bdver1_decode" "double")])
  
+ (define_insn "sse2_cvtpd2dq_mask"
+   [(set (match_operand:V4SI 0 "register_operand" "=v")
+ 	(vec_concat:V4SI
+ 	  (vec_merge:V2SI
+ 	    (unspec:V2SI [(match_operand:V2DF 1 "nonimmediate_operand" "vm")]
+ 			  UNSPEC_FIX_NOTRUNC)
+ 	    (vec_select:V2SI
+ 	      (match_operand:V4SI 2 "nonimm_or_0_operand" "0C")
+ 	      (parallel [(const_int 0) (const_int 1)]))
+ 	    (match_operand:QI 3 "register_operand" "Yk"))
+ 	  (const_vector:V2SI [(const_int 0) (const_int 0)])))]
+   "TARGET_AVX512VL"
+   "vcvtpd2dq{x}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
+   [(set_attr "type" "ssecvt")
+    (set_attr "prefix" "evex")
+    (set_attr "mode" "TI")])
+ 
+ (define_insn "*sse2_cvtpd2dq_mask_1"
+   [(set (match_operand:V4SI 0 "register_operand" "=v")
+ 	(vec_concat:V4SI
+ 	  (vec_merge:V2SI
+ 	    (unspec:V2SI [(match_operand:V2DF 1 "nonimmediate_operand" "vm")]
+ 			  UNSPEC_FIX_NOTRUNC)
+ 	    (const_vector:V2SI [(const_int 0) (const_int 0)])
+ 	    (match_operand:QI 2 "register_operand" "Yk"))
+ 	  (const_vector:V2SI [(const_int 0) (const_int 0)])))]
+   "TARGET_AVX512VL"
+   "vcvtpd2dq{x}\t{%1, %0%{%2%}%{z%}|%0%{%2%}%{z%}, %1}"
+   [(set_attr "type" "ssecvt")
+    (set_attr "prefix" "evex")
+    (set_attr "mode" "TI")])
+ 
  ;; For ufix_notrunc* insn patterns
  (define_mode_attr pd2udqsuff
    [(V8DF "") (V4DF "{y}")])
***************
*** 5786,5800 ****
     (set_attr "prefix" "evex")
     (set_attr "mode" "<sseinsnmode>")])
  
! (define_insn "ufix_notruncv2dfv2si2<mask_name>"
    [(set (match_operand:V4SI 0 "register_operand" "=v")
  	(vec_concat:V4SI
  	  (unspec:V2SI
  	    [(match_operand:V2DF 1 "nonimmediate_operand" "vm")]
! 	    UNSPEC_UNSIGNED_FIX_NOTRUNC)
  	  (const_vector:V2SI [(const_int 0) (const_int 0)])))]
    "TARGET_AVX512VL"
!   "vcvtpd2udq{x}\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
    [(set_attr "type" "ssecvt")
     (set_attr "prefix" "evex")
     (set_attr "mode" "TI")])
--- 6035,6083 ----
     (set_attr "prefix" "evex")
     (set_attr "mode" "<sseinsnmode>")])
  
! (define_insn "ufix_notruncv2dfv2si2"
    [(set (match_operand:V4SI 0 "register_operand" "=v")
  	(vec_concat:V4SI
  	  (unspec:V2SI
  	    [(match_operand:V2DF 1 "nonimmediate_operand" "vm")]
! 	       UNSPEC_UNSIGNED_FIX_NOTRUNC)
  	  (const_vector:V2SI [(const_int 0) (const_int 0)])))]
    "TARGET_AVX512VL"
!   "vcvtpd2udq{x}\t{%1, %0|%0, %1}"
!   [(set_attr "type" "ssecvt")
!    (set_attr "prefix" "evex")
!    (set_attr "mode" "TI")])
! 
! (define_insn "ufix_notruncv2dfv2si2_mask"
!   [(set (match_operand:V4SI 0 "register_operand" "=v")
! 	(vec_concat:V4SI
! 	  (vec_merge:V2SI
! 	    (unspec:V2SI
! 	      [(match_operand:V2DF 1 "nonimmediate_operand" "vm")]
! 		 UNSPEC_UNSIGNED_FIX_NOTRUNC)
! 	    (vec_select:V2SI
! 	      (match_operand:V4SI 2 "nonimm_or_0_operand" "0C")
! 	      (parallel [(const_int 0) (const_int 1)]))
! 	    (match_operand:QI 3 "register_operand" "Yk"))
! 	  (const_vector:V2SI [(const_int 0) (const_int 0)])))]
!   "TARGET_AVX512VL"
!   "vcvtpd2udq{x}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
!   [(set_attr "type" "ssecvt")
!    (set_attr "prefix" "evex")
!    (set_attr "mode" "TI")])
! 
! (define_insn "*ufix_notruncv2dfv2si2_mask_1"
!   [(set (match_operand:V4SI 0 "register_operand" "=v")
! 	(vec_concat:V4SI
! 	  (vec_merge:V2SI
! 	    (unspec:V2SI
! 	      [(match_operand:V2DF 1 "nonimmediate_operand" "vm")]
! 		 UNSPEC_UNSIGNED_FIX_NOTRUNC)
! 	    (const_vector:V2SI [(const_int 0) (const_int 0)])
! 	    (match_operand:QI 2 "register_operand" "Yk"))
! 	  (const_vector:V2SI [(const_int 0) (const_int 0)])))]
!   "TARGET_AVX512VL"
!   "vcvtpd2udq{x}\t{%1, %0%{%2%}%{z%}|%0%{%2%}%{z%}, %1}"
    [(set_attr "type" "ssecvt")
     (set_attr "prefix" "evex")
     (set_attr "mode" "TI")])
***************
*** 5809,5821 ****
     (set_attr "prefix" "evex")
     (set_attr "mode" "OI")])
  
! (define_insn "ufix_truncv2dfv2si2<mask_name>"
    [(set (match_operand:V4SI 0 "register_operand" "=v")
  	(vec_concat:V4SI
  	  (unsigned_fix:V2SI (match_operand:V2DF 1 "nonimmediate_operand" "vm"))
  	  (const_vector:V2SI [(const_int 0) (const_int 0)])))]
    "TARGET_AVX512VL"
!   "vcvttpd2udq{x}\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
    [(set_attr "type" "ssecvt")
     (set_attr "prefix" "evex")
     (set_attr "mode" "TI")])
--- 6092,6134 ----
     (set_attr "prefix" "evex")
     (set_attr "mode" "OI")])
  
! (define_insn "ufix_truncv2dfv2si2"
    [(set (match_operand:V4SI 0 "register_operand" "=v")
  	(vec_concat:V4SI
  	  (unsigned_fix:V2SI (match_operand:V2DF 1 "nonimmediate_operand" "vm"))
  	  (const_vector:V2SI [(const_int 0) (const_int 0)])))]
    "TARGET_AVX512VL"
!   "vcvttpd2udq{x}\t{%1, %0|%0, %1}"
!   [(set_attr "type" "ssecvt")
!    (set_attr "prefix" "evex")
!    (set_attr "mode" "TI")])
! 
! (define_insn "ufix_truncv2dfv2si2_mask"
!   [(set (match_operand:V4SI 0 "register_operand" "=v")
! 	(vec_concat:V4SI
! 	  (vec_merge:V2SI
! 	    (unsigned_fix:V2SI (match_operand:V2DF 1 "nonimmediate_operand" "vm"))
! 	    (vec_select:V2SI
! 	      (match_operand:V4SI 2 "nonimm_or_0_operand" "0C")
! 	      (parallel [(const_int 0) (const_int 1)]))
! 	    (match_operand:QI 3 "register_operand" "Yk"))
! 	  (const_vector:V2SI [(const_int 0) (const_int 0)])))]
!   "TARGET_AVX512VL"
!   "vcvttpd2udq{x}\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
!   [(set_attr "type" "ssecvt")
!    (set_attr "prefix" "evex")
!    (set_attr "mode" "TI")])
! 
! (define_insn "*ufix_truncv2dfv2si2_mask_1"
!   [(set (match_operand:V4SI 0 "register_operand" "=v")
! 	(vec_concat:V4SI
! 	  (vec_merge:V2SI
! 	    (unsigned_fix:V2SI (match_operand:V2DF 1 "nonimmediate_operand" "vm"))
! 	    (const_vector:V2SI [(const_int 0) (const_int 0)])
! 	    (match_operand:QI 2 "register_operand" "Yk"))
! 	  (const_vector:V2SI [(const_int 0) (const_int 0)])))]
!   "TARGET_AVX512VL"
!   "vcvttpd2udq{x}\t{%1, %0%{%2%}%{z%}|%0%{%2%}%{z%}, %1}"
    [(set_attr "type" "ssecvt")
     (set_attr "prefix" "evex")
     (set_attr "mode" "TI")])
***************
*** 5960,5974 ****
    "TARGET_AVX"
    "operands[2] = CONST0_RTX (V4SImode);")
  
! (define_insn "sse2_cvttpd2dq<mask_name>"
    [(set (match_operand:V4SI 0 "register_operand" "=v")
  	(vec_concat:V4SI
  	  (fix:V2SI (match_operand:V2DF 1 "vector_operand" "vBm"))
  	  (const_vector:V2SI [(const_int 0) (const_int 0)])))]
!   "TARGET_SSE2 && <mask_avx512vl_condition>"
  {
    if (TARGET_AVX)
!     return "vcvttpd2dq{x}\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}";
    else
      return "cvttpd2dq\t{%1, %0|%0, %1}";
  }
--- 6273,6287 ----
    "TARGET_AVX"
    "operands[2] = CONST0_RTX (V4SImode);")
  
! (define_insn "sse2_cvttpd2dq"
    [(set (match_operand:V4SI 0 "register_operand" "=v")
  	(vec_concat:V4SI
  	  (fix:V2SI (match_operand:V2DF 1 "vector_operand" "vBm"))
  	  (const_vector:V2SI [(const_int 0) (c